From d9079b3c4ab8ea3ab49e7c923e435ff355c4ecc0 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 12 Sep 2024 19:01:02 +0800
Subject: [PATCH 001/364] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#20238)

#### Why I did it
src/sonic-platform-daemons
```
* f581c06 - (HEAD -> master, origin/master, origin/HEAD) [PMON][psud] Fix the repeated NOTICE log message on Chassis platform (#529) (50 minutes ago) [Marty Y. Lok]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index b3189e32dcc0..f581c06cd8ad 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit b3189e32dcc070c09bf575ed7366b6930c50d9ef
+Subproject commit f581c06cd8adeb4b82816ee0fc38fd07b3f9e692

From 46069d144de102363431054d7972ce084b3fbbac Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 12 Sep 2024 19:01:08 +0800
Subject: [PATCH 002/364] [submodule] Update submodule sonic-swss-common to the
 latest HEAD automatically (#20221)

#### Why I did it
src/sonic-swss-common
```
* e271c9b - (HEAD -> master, origin/master, origin/HEAD) [DASH] Add support for ENI Counters (#904) (5 hours ago) [Vivek]
* a76b983 - run DASH vs tests (#913) (29 hours ago) [Lawrence Lee]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 636f565025d5..e271c9bef5ae 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 636f565025d5b4b235791c71e8c9ca25ce289f47
+Subproject commit e271c9bef5aea4801b01a88a54ec589d81b47a2b

From 9080f811c77fb3b8bf25f0e9eaa57c84a15e38f7 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <zyq1512099831@gmail.com>
Date: Fri, 13 Sep 2024 00:08:46 +0800
Subject: [PATCH 003/364] [ntp] Add interface existance check for ntp
 configuration (#20205)

Why I did it
NTP configuration wouldn't check existence of configured interface in config_db if it is eth0. This PR is to add this check

Work item tracking
Microsoft ADO (number only): 29385974

How I did it
Add interface existence check in config_db for ntp configuration

How to verify it
Generate NTP configuration and run ntp test in sonic-mgmt with new template
---
 files/image_config/ntp/ntp.conf.j2 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/files/image_config/ntp/ntp.conf.j2 b/files/image_config/ntp/ntp.conf.j2
index e50822a67a9d..9b8b9264a396 100644
--- a/files/image_config/ntp/ntp.conf.j2
+++ b/files/image_config/ntp/ntp.conf.j2
@@ -102,7 +102,7 @@ interface ignore wildcard
     {%- set ns.source_intf = global.src_intf %}
     {%- if ns.source_intf != "" %}
         {%- if ns.source_intf == "eth0" %}
-            {%- set ns.source_intf_ip = 'true' %}
+            {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, MGMT_INTERFACE) %}
         {%- elif ns.source_intf.startswith('Vlan') %}
             {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, VLAN_INTERFACE) %}
         {%- elif ns.source_intf.startswith('Ethernet') %}

From 702dd4e29189c40dd0dd130a644fc67997e70802 Mon Sep 17 00:00:00 2001
From: Longxiang Lyu <35479537+lolyu@users.noreply.github.com>
Date: Fri, 13 Sep 2024 00:43:19 +0800
Subject: [PATCH 004/364] [subnet decap] Fix VLAN prefix decap term  (#19229)

Why I did it
If subnet decap is enabled on T0, the subnet decap term should be created for VLAN prefixes.

Work item tracking
Microsoft ADO (number only): 28316828

How I did it
For VLAN prefixes, if subnet decap is enabled, created MP2MP decap terms with subnet type vlan and under the subnet decap tunnels.

Signed-off-by: Longxiang Lyu <lolv@microsoft.com>
---
 dockers/docker-orchagent/ipinip.json.j2       | 26 +++++++++++++++++--
 .../py2/ipinip_subnet_decap_enable.json       | 14 ++++++++++
 .../py3/ipinip_subnet_decap_enable.json       | 14 ++++++++++
 3 files changed, 52 insertions(+), 2 deletions(-)

diff --git a/dockers/docker-orchagent/ipinip.json.j2 b/dockers/docker-orchagent/ipinip.json.j2
index f25f7d9fb695..478a19a8fe2b 100644
--- a/dockers/docker-orchagent/ipinip.json.j2
+++ b/dockers/docker-orchagent/ipinip.json.j2
@@ -3,6 +3,8 @@
 {% else %}
 {% set ipv4_addresses = [] %}
 {% set ipv6_addresses = [] %}
+{% set ipv4_vlan_addresses = [] %}
+{% set ipv6_vlan_addresses = [] %}
 {% set ipv4_loopback_addresses = [] %}
 {% set ipv6_loopback_addresses = [] %}
 {% if DEVICE_METADATA['localhost']['sub_role'] == 'FrontEnd' or  DEVICE_METADATA['localhost']['sub_role'] == 'BackEnd'%}
@@ -44,12 +46,14 @@
 {% endfor %}
 {% for (name, prefix) in VLAN_INTERFACE|pfx_filter %}
     {%- if prefix | ipv4 %}
-        {%- set ipv4_addresses = ipv4_addresses.append(prefix) %}
+        {%- set ipv4_vlan_addresses = ipv4_vlan_addresses.append(prefix) %}
     {%- endif %}
     {%- if prefix | ipv6 %}
-        {%- set ipv6_addresses = ipv6_addresses.append(prefix) %}
+        {%- set ipv6_vlan_addresses = ipv6_vlan_addresses.append(prefix) %}
     {%- endif %}
 {% endfor %}
+{%- set ipv4_addresses = ipv4_addresses + ipv4_vlan_addresses %}
+{%- set ipv6_addresses = ipv6_addresses + ipv6_vlan_addresses %}
 [
 {% if ipv4_loopback_addresses %}
 {% if subnet_decap.enable %}
@@ -66,6 +70,15 @@
         },
         "OP": "SET"
     },
+{% for prefix in ipv4_vlan_addresses|sort %}
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET:{{ prefix | network }}/{{ prefix | prefixlen }}" : {
+            "term_type":"MP2MP",
+            "subnet_type": "vlan"
+        },
+        "OP": "SET"
+    },
+{% endfor %}
 {% endif %}
     {
         "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : {
@@ -110,6 +123,15 @@
         },
         "OP": "SET"
     },
+{% for prefix in ipv6_vlan_addresses|sort %}
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET_V6:{{ prefix | network }}/{{ prefix | prefixlen }}" : {
+            "term_type":"MP2MP",
+            "subnet_type": "vlan"
+        },
+        "OP": "SET"
+    },
+{% endfor %}
 {% endif %}
     {
         "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : {
diff --git a/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json b/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json
index ad978b8865a7..abcfa56eaea9 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json
@@ -8,6 +8,20 @@
         },
         "OP": "SET"
     },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET:192.168.0.0/27" : {
+            "term_type":"MP2MP",
+            "subnet_type": "vlan"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET:192.168.200.0/27" : {
+            "term_type":"MP2MP",
+            "subnet_type": "vlan"
+        },
+        "OP": "SET"
+    },
     {
         "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : {
             "tunnel_type":"IPINIP",
diff --git a/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json b/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json
index ad978b8865a7..abcfa56eaea9 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json
@@ -8,6 +8,20 @@
         },
         "OP": "SET"
     },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET:192.168.0.0/27" : {
+            "term_type":"MP2MP",
+            "subnet_type": "vlan"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET:192.168.200.0/27" : {
+            "term_type":"MP2MP",
+            "subnet_type": "vlan"
+        },
+        "OP": "SET"
+    },
     {
         "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : {
             "tunnel_type":"IPINIP",

From b73d613bf581076192dd0150cb35d6d2de6645b1 Mon Sep 17 00:00:00 2001
From: Yilan Ji <baxia.lan@gmail.com>
Date: Thu, 12 Sep 2024 21:22:02 +0000
Subject: [PATCH 005/364] Update ipmitool version to ipmitool_1.8.19-4+deb12u1
 (#20241)

---
 rules/ipmitool.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rules/ipmitool.mk b/rules/ipmitool.mk
index aad6fea3a86f..a3d08452473f 100644
--- a/rules/ipmitool.mk
+++ b/rules/ipmitool.mk
@@ -1,6 +1,6 @@
 # ipmitool packages
 IPMITOOL_VERSION = 1.8.19
-IPMITOOL_VERSION_SUFFIX = 4
+IPMITOOL_VERSION_SUFFIX = 4+deb12u1
 IPMITOOL_VERSION_FULL = $(IPMITOOL_VERSION)-$(IPMITOOL_VERSION_SUFFIX)
 IPMITOOL = ipmitool_$(IPMITOOL_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 $(IPMITOOL)_SRC_PATH = $(SRC_PATH)/ipmitool

From 64c818b3a3d30d16a0b9e9a03d4447ceca5fa70d Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 13 Sep 2024 19:01:22 +0800
Subject: [PATCH 006/364] [submodule] Update submodule sonic-platform-common to
 the latest HEAD automatically (#20201)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

#### Why I did it
src/sonic-platform-common
```
* 174bbd4 - (HEAD -> master, origin/master, origin/HEAD) [CMIS] Return the CDB status value for the caller to check the status… (#485) (4 days ago) [Xinyu Lin]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index ccea99528a50..174bbd47f0c5 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit ccea99528a5054bd5c172b4a7e0c34f84c103a69
+Subproject commit 174bbd47f0c5a3b8bd181f79b9e700ffa38906f6

From 8afb10332e3a016672e79603d9a916ceaa5df4ff Mon Sep 17 00:00:00 2001
From: Justin Thomas <justin@jdt.io>
Date: Fri, 13 Sep 2024 15:07:22 -0700
Subject: [PATCH 007/364] eliminate dmidecode because it requires root
 privileges (#17509)

Why I did it
As described in #16878, every show command on the N3248TE-ON results in an error about dmidecode not being found. This is because that command is called in the get_bios_version function of component.py, which is used in a lot of places (many which should not require privileged access).

The error message prior to this change:

jdt@sonic:~$ show system-health
failed to import plugin show.plugins.cisco-8000: [Errno 2] No such file or directory: 'dmidecode'
Usage: show system-health [OPTIONS] COMMAND [ARGS]...

  Show system-health information

How I did it
On this platform, at least, the BIOS version can be obtained from /sys/class/dmi/id/bios_versionwithout requiring root privileges. I adjusted component.py to use that instead of dmidecode.

How to verify it
With that change in place, you can see that commands no longer complain about dmidecode:
---
 .../n3248te/sonic_platform/component.py                         | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sonic-platform-modules-dell/n3248te/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-dell/n3248te/sonic_platform/component.py
index c69d5ef34ea0..800f895d0fb0 100644
--- a/platform/broadcom/sonic-platform-modules-dell/n3248te/sonic_platform/component.py
+++ b/platform/broadcom/sonic-platform-modules-dell/n3248te/sonic_platform/component.py
@@ -16,7 +16,7 @@
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 def get_bios_version():
-    return subprocess.check_output(['dmidecode', '-s', 'system-version']).strip().decode()
+    return subprocess.check_output(['cat', '/sys/class/dmi/id/bios_version']).strip().decode()
 
 def get_cpld_version(cpld):
     mjr_ver_path = '/sys/devices/platform/dell-n3248te-cpld.0/' + cpld + '_mjr_ver'

From 87282ed27cdca92bfed7f6cd1c4fc036fa6d4b52 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <zyq1512099831@gmail.com>
Date: Sat, 14 Sep 2024 07:08:22 +0800
Subject: [PATCH 008/364] [ntp] Add support for ntp to listen ipv4/ipv6 address
 depends on server config (#20227)

Why I did it
Switch cannot connect to NTP server with Loopback ipv6 in Loopback ipv6 only scenario.

Work item tracking
Microsoft ADO (number only): 29415265

How I did it
Add support for ntp to listen ipv4/ipv6 address depends on server config

How to verify it
Run ntp test with new template
---
 files/image_config/ntp/ntp.conf.j2 | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/files/image_config/ntp/ntp.conf.j2 b/files/image_config/ntp/ntp.conf.j2
index 9b8b9264a396..a3b0f0909728 100644
--- a/files/image_config/ntp/ntp.conf.j2
+++ b/files/image_config/ntp/ntp.conf.j2
@@ -18,6 +18,7 @@ leapfile /usr/share/zoneinfo/leap-seconds.list
 {# Adding NTP servers. We need to know if we have some pools, to set proper
 config -#}
 {% set ns = namespace(is_pools=false) %}
+{% set ip_ver_ns = namespace(ipv4_server=false, ipv6_server=false) %}
 {% for server in NTP_SERVER if NTP_SERVER[server].admin_state != 'disabled' -%}
     {% set config = NTP_SERVER[server] -%}
     {# Server options -#}
@@ -56,6 +57,13 @@ config -#}
 restrict {{ resolve_as }} kod limited nomodify noquery
 {% endif %}
 
+{% if resolve_as | ipv4 -%}
+    {% set ip_ver_ns.ipv4_server = true %}
+{% elif resolve_as | ipv6 %}
+    {% set ip_ver_ns.ipv6_server = true %}
+{% endif -%}
+
+
 {% endfor -%}
 
 {% set trusted_keys_arr = [] -%}
@@ -125,9 +133,11 @@ interface listen {{ mgmt_prefix | ip }}
 {% endfor %}
 {% elif LOOPBACK_INTERFACE %}
 {% for (name, prefix) in LOOPBACK_INTERFACE|pfx_filter %}
-{% if prefix | ipv4 and name == 'Loopback0' %}
+{% if name == 'Loopback0' %}
+{% if prefix | ipv4 and ip_ver_ns.ipv4_server or prefix | ipv6 and ip_ver_ns.ipv6_server %}
 interface listen {{ prefix | ip }}
 {% endif %}
+{% endif %}
 {% endfor %}
 {% else %}
 interface listen eth0

From 050a2aee51a7880fa3c4668ebc3639a93ad31c5c Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 14 Sep 2024 19:00:47 +0800
Subject: [PATCH 009/364] [submodule] Update submodule sonic-swss-common to the
 latest HEAD automatically (#20263)

#### Why I did it
src/sonic-swss-common
```
* 24979b0 - (HEAD -> master, origin/master, origin/HEAD) Add dpu db in schema (#903) (5 hours ago) [Ze Gan]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index e271c9bef5ae..24979b05ff9c 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit e271c9bef5aea4801b01a88a54ec589d81b47a2b
+Subproject commit 24979b05ff9c2daa18432abcd0dd8518bd5c7e60

From 35e87a69ff6467a0191a81de787ce1cc737b5b5b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 14 Sep 2024 19:00:56 +0800
Subject: [PATCH 010/364] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20240)

#### Why I did it
src/sonic-utilities
```
* 2cb8cc65 - (HEAD -> master, origin/master, origin/HEAD) [sfputil] Configure the debug loopback mode only on the relevant lanes of the logical port (#3485) (2 days ago) [Xinyu Lin]
* 1aac5e2c - [VoQ chassis] : Script to debug packet drops (#3536) (2 days ago) [Vineet Mittal]
* ad5b0c0a - [Mellanox] Add SPC5 to generic config updater file (#3542) (3 days ago) [noaOrMlnx]
* 8fa076d2 - sonic-installer: enhance next image detection for Aboot (#3433) (3 days ago) [Samuel Angebault]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index a7897d1fd436..2cb8cc65b6dc 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit a7897d1fd43603272f99dd7daaa08dc28f5bda7a
+Subproject commit 2cb8cc65b6dc57d9613ce271a681743aa4fa0f3c

From fe553ab3fc33eacaf07310f0c3a745d194e67509 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Sun, 15 Sep 2024 15:43:19 -0700
Subject: [PATCH 011/364] [Mellanox] Add dpuctl services to support "dark
 mode". (#19931)

- Why I did it
Smart Switch Dark Mode allows disabling of all DPUs, removing any influence the DPU has on the system.

- How I did it
Add the dpuctl.service that runs on system start and shuts down DPUs if needed.

- How to verify it
Compile the image and run it on the Nvidia Smart Switch. Verify that all DPUs are down after the system starts.
---
 .../x86_64-nvidia_sn4280-r0/services.conf     |  2 +-
 .../build_templates/sonic_debian_extension.j2 |  8 +++
 platform/mellanox/smartswitch/dpuctl/dpu.conf |  1 +
 .../smartswitch/dpuctl/dpuctl.service         | 12 ++++
 .../mellanox/smartswitch/dpuctl/dpuctl.sh     | 60 +++++++++++++++++++
 5 files changed, 82 insertions(+), 1 deletion(-)
 create mode 100644 platform/mellanox/smartswitch/dpuctl/dpu.conf
 create mode 100644 platform/mellanox/smartswitch/dpuctl/dpuctl.service
 create mode 100644 platform/mellanox/smartswitch/dpuctl/dpuctl.sh

diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf
index 7621d96e72ac..a9030b0901f0 100644
--- a/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf
@@ -1 +1 @@
-rshim-manager.service
+dpuctl.service
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 1845f9b8c18e..e76505f9f78a 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -1095,6 +1095,14 @@ sudo install -m 755 platform/mellanox/rshim/files/rshim.sh $FILESYSTEM_ROOT/usr/
 # Install rshim services
 sudo cp platform/mellanox/rshim/files/rshim@.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/
 sudo cp platform/mellanox/rshim/files/rshim-manager.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/
+
+# Install dpuctl script and config file
+sudo install -m 755 platform/mellanox/smartswitch/dpuctl/dpuctl.sh $FILESYSTEM_ROOT/usr/bin/dpuctl.sh
+sudo install -m 755 platform/mellanox/smartswitch/dpuctl/dpu.conf $FILESYSTEM_ROOT_ETC/mlnx/
+
+# Install dpuctl services
+sudo cp platform/mellanox/smartswitch/dpuctl/dpuctl.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/
+
 {% endif %}
 
 {% if sonic_asic_platform == "nvidia-bluefield" %}
diff --git a/platform/mellanox/smartswitch/dpuctl/dpu.conf b/platform/mellanox/smartswitch/dpuctl/dpu.conf
new file mode 100644
index 000000000000..b0dcbfee98e6
--- /dev/null
+++ b/platform/mellanox/smartswitch/dpuctl/dpu.conf
@@ -0,0 +1 @@
+DARK_MODE=true
diff --git a/platform/mellanox/smartswitch/dpuctl/dpuctl.service b/platform/mellanox/smartswitch/dpuctl/dpuctl.service
new file mode 100644
index 000000000000..e914d3e7abed
--- /dev/null
+++ b/platform/mellanox/smartswitch/dpuctl/dpuctl.service
@@ -0,0 +1,12 @@
+[Unit]
+Description=Controle DPUs state
+Requires=hw-management.service
+After=hw-management.service
+
+[Service]
+Type=oneshot
+RemainAfterExit=yes
+ExecStart=/usr/bin/dpuctl.sh start
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/mellanox/smartswitch/dpuctl/dpuctl.sh b/platform/mellanox/smartswitch/dpuctl/dpuctl.sh
new file mode 100644
index 000000000000..c5393aa1f6d0
--- /dev/null
+++ b/platform/mellanox/smartswitch/dpuctl/dpuctl.sh
@@ -0,0 +1,60 @@
+#!/usr/bin/env bash
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+# By default the dark mode is enabled
+DARK_MODE=true
+
+bf3_pci_id="15b3:c2d5"
+dpu2pcie[0]="08:00.0"
+dpu2pcie[1]="07:00.0"
+dpu2pcie[2]="01:00.0"
+dpu2pcie[3]="02:00.0"
+
+if [[ -f /etc/mlnx/dpu.conf ]]; then
+    . /etc/mlnx/dpu.conf
+fi
+
+do_start() {
+    if [[ $DARK_MODE == "true" ]]; then
+        # By default all the DPUs are on. Power off the DPUs when is dark mode is required.
+
+        for dpu_id in ${!dpu2pcie[@]}; do
+            pci_id=$(lspci -n | grep "${dpu2pcie[$dpu_id]}" | awk '{print $3}')
+            if [[ $pci_id == $bf3_pci_id ]]; then
+                dpuctl dpu-power-off dpu${dpu_id} &
+            fi
+        done
+
+        # Wait for all dpuctl processes to finish
+        wait
+    else
+        # Start RSHIM per each DPU to create interfaces
+        systemctl start rshim-manager.service
+    fi
+}
+
+case "$1" in
+    start)
+        do_start
+        ;;
+    *)
+        echo "Error: Invalid argument."
+        echo "Usage: $0 {start}"
+        exit 1
+        ;;
+esac

From 20ea16fa8c8852bb04514e570d1bcf4f638b8308 Mon Sep 17 00:00:00 2001
From: Gagan Punathil Ellath <gpunathilell@nvidia.com>
Date: Sun, 15 Sep 2024 15:44:15 -0700
Subject: [PATCH 012/364] [Mellanox] SN4280 Platform pcie changes (#20093)

- Why I did it
The pcie ids of some specific devices is updated for the SN4280 device. Due to this there are some changes to be updated in the platform specific code for mellanox
sensors.conf - This change is due to pci id change for a sensor
rshim..sh - This change is due to the pci id changes for the dpus, which have to be aligned to the platform
pcie.yaml - This change is due to pci id change for the devices
---
 .../x86_64-nvidia_sn4280-r0/pcie.yaml         | 58 +++++++++----------
 .../x86_64-nvidia_sn4280-r0/sensors.conf      |  2 +-
 platform/mellanox/rshim/files/rshim.sh        |  4 +-
 3 files changed, 29 insertions(+), 35 deletions(-)

diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml b/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml
index c9ef7ee705d3..99ebce459458 100644
--- a/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml
@@ -51,6 +51,18 @@
   id: '1453'
   name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
     PCIe GPP Bridge'
+- bus: '00'
+  dev: '01'
+  fn: '5'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
+- bus: '00'
+  dev: '01'
+  fn: '6'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
 - bus: '00'
   dev: '02'
   fn: '0'
@@ -217,75 +229,57 @@
   id: '1467'
   name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
     Data Fabric: Device 18h; Function 7'
-- bus: '01'
-  dev: '00'
-  fn: '0'
-  id: c2d5
-  name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management
-    Interface (rev 01)'
-- bus: '02'
-  dev: '00'
-  fn: '0'
-  id: c2d5
-  name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management
-    Interface (rev 01)'
 - bus: '03'
   dev: '00'
   fn: '0'
   id: '5765'
-  name: 'Non-Volatile memory controller: Device 1f9f:5765 (rev 01)'
-- bus: '04'
+  name: 'Non-Volatile memory controller: Realtek Semiconductor Co., Ltd. RTS5765DL
+    NVMe SSD Controller (DRAM-less) (rev 01)'
+- bus: '06'
   dev: '00'
   fn: '0'
   id: cf70
   name: 'Ethernet controller: Mellanox Technologies Spectrum-3'
-- bus: '05'
-  dev: '00'
-  fn: '0'
-  id: c2d5
-  name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management
-    Interface (rev 01)'
-- bus: '06'
-  dev: '00'
-  fn: '0'
-  id: c2d5
-  name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management
-    Interface (rev 01)'
-- bus: '07'
+- bus: 09
   dev: '00'
   fn: '0'
   id: 145a
   name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD]
     Zeppelin/Raven/Raven2 PCIe Dummy Function'
-- bus: '07'
+- bus: 09
   dev: '00'
   fn: '2'
   id: '1456'
   name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Family 17h (Models
     00h-0fh) Platform Security Processor (PSP) 3.0 Device'
-- bus: '07'
+- bus: 09
   dev: '00'
   fn: '3'
   id: 145f
   name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Zeppelin USB 3.0 xHCI
     Compliant Host Controller'
-- bus: 08
+- bus: 0a
   dev: '00'
   fn: '0'
   id: '1455'
   name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD]
     Zeppelin/Renoir PCIe Dummy Function'
-- bus: 08
+- bus: 0a
   dev: '00'
   fn: '1'
   id: '1468'
   name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Zeppelin Cryptographic
     Coprocessor NTBCCP'
-- bus: 08
+- bus: 0a
   dev: '00'
   fn: '4'
   id: '1458'
   name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller'
+- bus: 0a
+  dev: '00'
+  fn: '5'
+  id: '1458'
+  name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller'
 - bus: '40'
   dev: '00'
   fn: '0'
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf
index 111e469675d3..4e607aaa0fbf 100644
--- a/device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf
@@ -561,5 +561,5 @@ chip "nvme-pci-*"
     ignore temp2
     ignore temp3
 
-chip "00000400400-mdio-*"
+chip "00000a00400-mdio-*"
    label temp1 "PHY TEMP"
\ No newline at end of file
diff --git a/platform/mellanox/rshim/files/rshim.sh b/platform/mellanox/rshim/files/rshim.sh
index e384ba9c18b2..9663e39a6381 100644
--- a/platform/mellanox/rshim/files/rshim.sh
+++ b/platform/mellanox/rshim/files/rshim.sh
@@ -24,8 +24,8 @@ fi
 dpu_id=$1
 
 declare -A dpu2pcie
-dpu2pcie[0]="06:00.0"
-dpu2pcie[1]="05:00.0"
+dpu2pcie[0]="08:00.0"
+dpu2pcie[1]="07:00.0"
 dpu2pcie[2]="01:00.0"
 dpu2pcie[3]="02:00.0"
 

From 367495d03632f6dd12577ef118cd02c3f1dd96fc Mon Sep 17 00:00:00 2001
From: i-davydenko <41341620+i-davydenko@users.noreply.github.com>
Date: Mon, 16 Sep 2024 03:56:44 +0300
Subject: [PATCH 013/364] Dev cli sessions (#17623)

https://github.com/sonic-net/SONiC/pull/1367

Why I did it
Give ability to:
1. configure limit for active login sessions.
2. configure ssh-server / serial console autologout timeout
3. configure sysrq-capabilities (enable / disable)

Work item tracking
Microsoft ADO (number only):

How I did it
Add new service that responsible for serial configuration;
Update existing flows for extended ssh-server configurations in hostcfgd;
Add YANG model to support new configuration.

How to verify it
Which release branch to backport (provide reason below if selected)

Tested branch (Please provide the tested image version)

Description for the changelog
Link to config_db schema for YANG module changes
[ssh_server](https://github.com/sonic-net/sonic-buildimage/blob/master/src/sonic-yang-models/doc/Configuration.md#ssh_server)
[serial_console](https://github.com/sonic-net/sonic-buildimage/blob/master/src/sonic-yang-models/doc/Configuration.md#serial_console)
---
 .../build_templates/sonic_debian_extension.j2 |  7 ++++
 .../cli_sessions/serial-config.service        | 13 +++++++
 .../cli_sessions/serial-config.sh             | 15 ++++++++
 .../cli_sessions/sysrq-sysctl.conf.j2         | 10 +++++
 .../image_config/cli_sessions/tmout-env.sh.j2 | 11 ++++++
 src/sonic-yang-models/doc/Configuration.md    | 25 ++++++++++++-
 src/sonic-yang-models/setup.py                |  3 ++
 .../tests/files/sample_config_db.json         | 11 +++++-
 .../tests/serial_console.json                 | 13 +++++++
 .../yang_model_tests/tests/ssh-server.json    | 10 ++++-
 .../tests_config/serial_console.json          | 31 ++++++++++++++++
 .../tests_config/ssh-server.json              | 20 +++++++++-
 .../yang-models/sonic-serial-console.yang     | 37 +++++++++++++++++++
 .../yang-models/sonic-ssh-server.yang         | 19 ++++++++++
 14 files changed, 220 insertions(+), 5 deletions(-)
 create mode 100644 files/image_config/cli_sessions/serial-config.service
 create mode 100755 files/image_config/cli_sessions/serial-config.sh
 create mode 100644 files/image_config/cli_sessions/sysrq-sysctl.conf.j2
 create mode 100644 files/image_config/cli_sessions/tmout-env.sh.j2
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests/serial_console.json
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests_config/serial_console.json
 create mode 100644 src/sonic-yang-models/yang-models/sonic-serial-console.yang

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index e76505f9f78a..5b5c6a080d15 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -431,6 +431,13 @@ echo "ntpsec.service" | sudo tee -a $GENERATED_SERVICE_FILE
 # Copy DNS templates
 sudo cp $BUILD_TEMPLATES/dns.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/
 
+# Copy cli-sessions config files
+sudo cp $IMAGE_CONFIGS/cli_sessions/tmout-env.sh.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/
+sudo cp $IMAGE_CONFIGS/cli_sessions/sysrq-sysctl.conf.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/
+sudo cp $IMAGE_CONFIGS/cli_sessions/serial-config.sh $FILESYSTEM_ROOT/usr/bin/
+sudo cp $IMAGE_CONFIGS/cli_sessions/serial-config.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM
+echo "serial-config.service" | sudo tee -a $GENERATED_SERVICE_FILE
+
 # Copy warmboot-finalizer files
 sudo LANG=C cp $IMAGE_CONFIGS/warmboot-finalizer/finalize-warmboot.sh $FILESYSTEM_ROOT/usr/local/bin/finalize-warmboot.sh
 sudo LANG=C cp $IMAGE_CONFIGS/warmboot-finalizer/warmboot-finalizer.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM
diff --git a/files/image_config/cli_sessions/serial-config.service b/files/image_config/cli_sessions/serial-config.service
new file mode 100644
index 000000000000..6211ecaaae28
--- /dev/null
+++ b/files/image_config/cli_sessions/serial-config.service
@@ -0,0 +1,13 @@
+[Unit]
+Description=Update serial console config
+Requires=sonic.target
+After=sonic.target
+Before=getty-pre.target
+StartLimitIntervalSec=0
+
+[Service]
+Type=oneshot
+ExecStart=/usr/bin/serial-config.sh
+
+[Install]
+WantedBy=sonic.target
diff --git a/files/image_config/cli_sessions/serial-config.sh b/files/image_config/cli_sessions/serial-config.sh
new file mode 100755
index 000000000000..b02d65ffae49
--- /dev/null
+++ b/files/image_config/cli_sessions/serial-config.sh
@@ -0,0 +1,15 @@
+#!/bin/bash
+
+# generate conf file for sysrq capabilities.
+sonic-cfggen -d -t /usr/share/sonic/templates/sysrq-sysctl.conf.j2 > /etc/sysctl.d/95-sysrq-sysctl.conf
+
+SYSRQ_CONF=0
+# update sysrq for current boot.
+sysrq_conf=`sonic-db-cli CONFIG_DB HGET "SERIAL_CONSOLE|POLICIES" sysrq_capabilities`
+if [ ${sysrq_conf} = "enabled" ]; then
+        SYSRQ_CONF=1
+fi
+sudo echo $SYSRQ_CONF > /proc/sys/kernel/sysrq
+
+# generate env file for profile.d to set auto-logout timeout for serial consoles.
+sonic-cfggen -d -t /usr/share/sonic/templates/tmout-env.sh.j2 > /etc/profile.d/tmout-env.sh
diff --git a/files/image_config/cli_sessions/sysrq-sysctl.conf.j2 b/files/image_config/cli_sessions/sysrq-sysctl.conf.j2
new file mode 100644
index 000000000000..9d7b96660b74
--- /dev/null
+++ b/files/image_config/cli_sessions/sysrq-sysctl.conf.j2
@@ -0,0 +1,10 @@
+###############################################################################
+# This file was AUTOMATICALLY GENERATED. DO NOT MODIFY.
+# Controlled by serial-config.sh
+###############################################################################
+{% set sysrq = 0 %}
+{% set serial_policies = (SERIAL_CONSOLE | d({})).get('POLICIES', {}) -%}
+{% if serial_policies.sysrq_capabilities == 'enabled' %}
+{% set sysrq = 1 %}
+{% endif %}
+kernel.sysrq={{ sysrq }}
\ No newline at end of file
diff --git a/files/image_config/cli_sessions/tmout-env.sh.j2 b/files/image_config/cli_sessions/tmout-env.sh.j2
new file mode 100644
index 000000000000..528504ee7218
--- /dev/null
+++ b/files/image_config/cli_sessions/tmout-env.sh.j2
@@ -0,0 +1,11 @@
+{# Default timeout (15 min) #}
+{% set inactivity_timeout_sec = 900 %}
+
+{% set serial_pol = (SERIAL_CONSOLE | d({})).get('POLICIES', {}) -%}
+{% if serial_pol and serial_pol.inactivity_timeout and serial_pol.inactivity_timeout | int >= 0 %}
+{% set inactivity_timeout_sec = serial_pol.inactivity_timeout | int * 60 %}
+{% endif %}
+
+{# apply only for serial tty #}
+tty | grep -q tty &&  \
+export TMOUT={{ inactivity_timeout_sec }}
diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index 090bebc39372..06ee8d26a8dc 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -2694,20 +2694,41 @@ There are 4 classes
 }
 ```
 
+### SERIAL_CONSOLE
+
+In this table collected configuration of the next serial-console attributes:
+-   inactivity_timeout - Inactivity timeout for serial-console session, allowed values: 0-35000 (minutes), default value: 15
+-   sysrq_capabilities - Enabling or disabling SysRq functionality for serial-console session, allowed values: enabled/disabled, default value disabled
+
+```
+{
+    SERIAL_CONSOLE:{
+        "POLICIES":{
+            "inactivity_timeout": 15
+            "sysrq_capabilities": "disabled"
+        }
+    }
+}
+```
+
 ### SSH_SERVER
 
-In this table, we allow configuring ssh server global settings. This will feature includes 3 configurations:
+In this table, we allow configuring ssh server global settings. This will feature includes 5 configurations:
 
 -   authentication_retries - number of login attepmts 1-100
 -   login_timeout - Timeout in seconds for login session for user to connect 1-600
 -   ports - Ssh port numbers - string of port numbers seperated by ','
+-   inactivity_timeout - Inactivity timeout for SSH session, allowed values: 0-35000 (min), default value: 15 (min)
+-   max_sessions - Max number of concurrent logins, allowed values: 0-100 (where 0 means no limit), default value: 0
 ```
 {
     "SSH_SERVER": {
         "POLICIES":{
             "authentication_retries": "6",
             "login_timeout": "120",
-            "ports": "22"
+            "ports": "22",
+            "inactivity_timeout": "15",
+            "max_sessions": "0"
         }
     }
 }
diff --git a/src/sonic-yang-models/setup.py b/src/sonic-yang-models/setup.py
index 6748bb137848..420dd36a24ca 100644
--- a/src/sonic-yang-models/setup.py
+++ b/src/sonic-yang-models/setup.py
@@ -203,6 +203,7 @@ def run(self):
                          './yang-models/sonic-macsec.yang',
                          './yang-models/sonic-bgp-sentinel.yang',
                          './yang-models/sonic-bmp.yang',
+                         './yang-models/sonic-serial-console.yang',
                          './yang-models/sonic-smart-switch.yang',]),
         ('cvlyang-models', ['./cvlyang-models/sonic-acl.yang',
                          './cvlyang-models/sonic-banner.yang',
@@ -245,6 +246,7 @@ def run(self):
                          './cvlyang-models/sonic-nat.yang',
                          './cvlyang-models/sonic-nvgre-tunnel.yang',
                          './cvlyang-models/sonic-pbh.yang',
+                         './cvlyang-models/sonic-ssh-server.yang',
                          './cvlyang-models/sonic-policer.yang',
                          './cvlyang-models/sonic-port.yang',
                          './cvlyang-models/sonic-portchannel.yang',
@@ -280,6 +282,7 @@ def run(self):
                          './cvlyang-models/sonic-system-port.yang',
                          './cvlyang-models/sonic-macsec.yang',
                          './cvlyang-models/sonic-bmp.yang',
+                         './cvlyang-models/sonic-serial-console.yang',
                          './cvlyang-models/sonic-bgp-sentinel.yang']),
     ],
     zip_safe=False,
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index b47805d14004..8fefa69f88f9 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -2448,7 +2448,16 @@
             "POLICIES":{
                 "authentication_retries": "6",
                 "login_timeout": "120",
-                "ports": "22"
+                "ports": "22",
+                "inactivity_timeout": "15",
+                "max_sessions": "0"
+            }
+        },
+
+        "SERIAL_CONSOLE": {
+            "POLICIES":{
+                "inactivity_timeout": "15",
+                "sysrq_capabilities": "disabled"
             }
         },
 
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/serial_console.json b/src/sonic-yang-models/tests/yang_model_tests/tests/serial_console.json
new file mode 100644
index 000000000000..76e39bb17944
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/serial_console.json
@@ -0,0 +1,13 @@
+{
+    "SERIAL_CONSOLE": {
+        "desc": "SERIAL_CONSOLE configuration in the Config DB table."
+    },
+    "SERIAL_CONSOLE_INVALID_INACTIVITY_TIMEOUT": {
+        "desc": "SERIAL_CONSOLE attribute 'inactivity_timeout' set to invalid value (out of allowed range of [0, 35000] minutes).",
+        "eStr": "does not satisfy the constraint \"0..35000\""
+    },
+    "SERIAL_CONSOLE_INVALID_SYSRQ" : {
+        "desc": "SERIAL_CONSOLE attribute 'sysrq' set to invalid value",
+        "eStr": "Invalid value"
+    }
+}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/ssh-server.json b/src/sonic-yang-models/tests/yang_model_tests/tests/ssh-server.json
index f3a1c30ef47a..e7bc0af10acb 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/ssh-server.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/ssh-server.json
@@ -22,5 +22,13 @@
     "SSH_SERVER_INVALID_PORTS_2": {
         "desc": "Configure invalid port value in SSH_SERVER.",
         "eStr": "Invalid port numbers value"
+    },
+    "SSH_SERVER_INVALID_INACTIVITY_TIMEOUT": {
+        "desc": "Configure invalid inactivity_timeout value in SSH_SERVER.",
+        "eStr": "does not satisfy the constraint \"0..35000\""
+    },
+    "SSH_SERVER_INVALID_MAX_SESSIONS": {
+        "desc": "Configure invalid max_sessions value in SSH_SERVER.",
+        "eStr": "does not satisfy the constraint \"0..100\""
     }
-}
\ No newline at end of file
+}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/serial_console.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/serial_console.json
new file mode 100644
index 000000000000..34453ac63b51
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/serial_console.json
@@ -0,0 +1,31 @@
+{
+    "SERIAL_CONSOLE": {
+        "sonic-serial-console:sonic-serial-console": {
+            "sonic-serial-console:SERIAL_CONSOLE": {
+                "POLICIES": {
+                        "inactivity_timeout": 900,
+                        "sysrq_capabilities": "disabled"
+                }
+            }
+        }
+    },
+
+    "SERIAL_CONSOLE_INVALID_INACTIVITY_TIMEOUT": {
+        "sonic-serial-console:sonic-serial-console": {
+            "sonic-serial-console:SERIAL_CONSOLE": {
+                "POLICIES": {
+                        "inactivity_timeout": -500
+                }
+            }
+        }
+    },
+    "SERIAL_CONSOLE_INVALID_SYSRQ" : {
+        "sonic-serial-console:sonic-serial-console": {
+            "sonic-serial-console:SERIAL_CONSOLE": {
+                "POLICIES": {
+                        "sysrq_capabilities": "negative"
+                }
+            }
+        }
+    }
+}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/ssh-server.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/ssh-server.json
index e0abc1a1320a..1780bab89582 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/ssh-server.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/ssh-server.json
@@ -56,5 +56,23 @@
                 }
             }
         }
+    },
+    "SSH_SERVER_INVALID_INACTIVITY_TIMEOUT": {
+        "sonic-ssh-server:sonic-ssh-server": {
+            "sonic-ssh-server:SSH_SERVER": {
+                "POLICIES":{
+                    "inactivity_timeout": 500000
+                }
+            }
+        }
+    },
+    "SSH_SERVER_INVALID_MAX_SESSIONS": {
+        "sonic-ssh-server:sonic-ssh-server": {
+            "sonic-ssh-server:SSH_SERVER": {
+                "POLICIES":{
+                    "max_sessions": 222
+                }
+            }
+        }
     }
-}
\ No newline at end of file
+}
diff --git a/src/sonic-yang-models/yang-models/sonic-serial-console.yang b/src/sonic-yang-models/yang-models/sonic-serial-console.yang
new file mode 100644
index 000000000000..378910e72f0b
--- /dev/null
+++ b/src/sonic-yang-models/yang-models/sonic-serial-console.yang
@@ -0,0 +1,37 @@
+//filename:  sonic-serial-console.yang
+module sonic-serial-console {
+    yang-version 1.1;
+    namespace "http://github.com/Azure/sonic-serial-console";
+    prefix cli-sessions;
+    import sonic-types {
+        prefix stypes;
+    }
+    description "SERIAL_CONSOLE YANG Module for SONiC-based OS";
+    revision 2023-06-07 {
+        description "First Revision";
+    }
+    container sonic-serial-console {
+        container SERIAL_CONSOLE {
+            description "SERIAL_CONSOLE part of config_db.json";
+            container POLICIES {
+                leaf inactivity_timeout {
+                    description "serial-console inactivity-timeout timer value in minutes";
+                    type int32 {
+                        range "0..35000";
+                    }
+                    default 15;
+                }
+
+                leaf sysrq_capabilities {
+                    type stypes:admin_mode;
+                    description "managing SysRq capabilities";
+                    default disabled;
+                }
+        }
+        /* end of container POLICIES */
+        }
+        /* end of container SERIAL_CONSOLE */
+    }
+    /* end of top level container */
+}
+/* end of module sonic-serial-console */
diff --git a/src/sonic-yang-models/yang-models/sonic-ssh-server.yang b/src/sonic-yang-models/yang-models/sonic-ssh-server.yang
index a53fddac5bfc..fb17159eea94 100644
--- a/src/sonic-yang-models/yang-models/sonic-ssh-server.yang
+++ b/src/sonic-yang-models/yang-models/sonic-ssh-server.yang
@@ -11,6 +11,11 @@ module sonic-ssh-server {
         description
             "First Revision";
     }
+    
+    revision 2023-06-07 {
+        description
+            "Introduce inactivity timeout and max syslogins options";
+    }
 
     container sonic-ssh-server {
         container SSH_SERVER {
@@ -40,6 +45,20 @@ module sonic-ssh-server {
                         }
                     }
                 }
+                leaf inactivity_timeout {
+                    description "inactivity timeout (in minutes), 0 means no timeout";
+                    default 15;
+                    type uint32 {
+                        range 0..35000;
+                    }
+                }
+                leaf max_sessions {
+                    description "limit of concurrent system logins, 0 means no limit";
+                    default 0;
+                    type uint32 {
+                        range 0..100;
+                    }
+                }
             }/*container policies */
         } /* container SSH_SERVER  */
     }/* container sonic-ssh-server */

From 9b415fd4ece83d9ec4c0f1ca49a57d09575f5600 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 16 Sep 2024 19:00:54 +0800
Subject: [PATCH 014/364] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20268)

#### Why I did it
src/sonic-utilities
```
* ed624895 - (HEAD -> master, origin/master, origin/HEAD) SONIC CLI for CLI-Sessions feature (#3175) (2 hours ago) [i-davydenko]
* c6637553 - Move from bootctl to mokutil when checking for Secure Boot status (#3486) (3 hours ago) [DavidZagury]
* 5fc0ee6c - [spm]: Clean up timers auto generation logic. (#3523) (3 hours ago) [Nazarii Hnydyn]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 2cb8cc65b6dc..ed624895f218 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 2cb8cc65b6dc57d9613ce271a681743aa4fa0f3c
+Subproject commit ed624895f218b5c81fabc0c4655b317374e246d7

From 69f94421c8e2436c62054dda05413840ff417e85 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 16 Sep 2024 19:01:03 +0800
Subject: [PATCH 015/364] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#20266)

#### Why I did it
src/sonic-host-services
```
* b7f26d4 - (HEAD -> master, origin/master, origin/HEAD) [cli-sessions] Add support for cli-sessions feature (#99) (2 hours ago) [i-davydenko]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index d2170c9d48e5..b7f26d4eaf12 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit d2170c9d48e59aeeec2058cb9a85e59b7761ad36
+Subproject commit b7f26d4eaf125af4c889a9dbadeebacbeb9e9271

From e40ff63835fceed5c0120f21f9e2ef7072782c41 Mon Sep 17 00:00:00 2001
From: Janet Cui <janet970527@gmail.com>
Date: Tue, 17 Sep 2024 02:58:48 +1000
Subject: [PATCH 016/364] Revert "[Arista]: Fix TH5 egress pool creation
 failure with BCM YAML file and SAI update on 07/16 (#19640)" (#20245)

This reverts commit 0344d4a8ba674d224ade7fc61d30997974697f51.
---
 .../BALANCED/buffers_defaults_t0.j2                           | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2
index b1418a68eb31..f4b26e0f3497 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2
@@ -5,13 +5,13 @@
 {%- macro generate_buffer_pool_and_profiles() %}
     "BUFFER_POOL": {
         "ingress_lossless_pool": {
-            "size": "165603428",
+            "size": "165660324",
             "type": "ingress",
             "mode": "dynamic",
             "xoff": "29520896"
         },
         "egress_lossless_pool": {
-            "size": "165603428",
+            "size": "165660324",
             "type": "egress",
             "mode": "dynamic"
         }

From e4808cffaeb703119670b06ee3ed40429a0d5428 Mon Sep 17 00:00:00 2001
From: Junhua Zhai <junhua.zhai@outlook.com>
Date: Tue, 17 Sep 2024 01:03:47 +0800
Subject: [PATCH 017/364] [arista]: Upgrade credo sai package to v0.9.9
 (#20209)

Upgrade credo sai package to the latest v0.9.9 to deliver a key fix from Credo to the community
or the blackhawk phys used on Arista platform 7060dx5_64s.

ADO: 29387310
---
 platform/components/docker-gbsyncd-credo.mk | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/platform/components/docker-gbsyncd-credo.mk b/platform/components/docker-gbsyncd-credo.mk
index e0833068d008..c8b14c93fb19 100644
--- a/platform/components/docker-gbsyncd-credo.mk
+++ b/platform/components/docker-gbsyncd-credo.mk
@@ -1,11 +1,11 @@
 DOCKER_GBSYNCD_PLATFORM_CODE = credo
 
-LIBSAI_CREDO = libsaicredo_0.9.6_amd64.deb
-$(LIBSAI_CREDO)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/libsaicredo_0.9.6_amd64.deb"
-LIBSAI_CREDO_OWL = libsaicredo-owl_0.9.6_amd64.deb
-$(LIBSAI_CREDO_OWL)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/libsaicredo-owl_0.9.6_amd64.deb"
-LIBSAI_CREDO_BLACKHAWK = libsaicredo-blackhawk_0.9.6_amd64.deb
-$(LIBSAI_CREDO_BLACKHAWK)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/libsaicredo-blackhawk_0.9.6_amd64.deb"
+LIBSAI_CREDO = libsaicredo_0.9.9_amd64.deb
+$(LIBSAI_CREDO)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/$(LIBSAI_CREDO)"
+LIBSAI_CREDO_OWL = libsaicredo-owl_0.9.9_amd64.deb
+$(LIBSAI_CREDO_OWL)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/$(LIBSAI_CREDO_OWL)"
+LIBSAI_CREDO_BLACKHAWK = libsaicredo-blackhawk_0.9.9_amd64.deb
+$(LIBSAI_CREDO_BLACKHAWK)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/$(LIBSAI_CREDO_BLACKHAWK)"
 
 ifneq ($($(LIBSAI_CREDO)_URL),)
 include $(PLATFORM_PATH)/../template/docker-gbsyncd-base.mk

From 7167382778cb6e05ce228b75b424cc9f9e01495b Mon Sep 17 00:00:00 2001
From: Kumaresh Perumal <kperumal@microsoft.com>
Date: Mon, 16 Sep 2024 10:24:26 -0700
Subject: [PATCH 018/364] Update default Mellanox WRED profile (#20265)

Why I did it
Update default WRED profile values.

Work item tracking
Microsoft ADO (number only): 29444846

How I did it
Update Mellanox qos j2 file to generate WRED profile values.

How to verify it
Redeploy minigraph with the new image and verify the latest WRED profile values.
---
 .../Mellanox-SN4600C-C64/qos.json.j2          | 20 +++++++++++++++++++
 .../qos-mellanox4600c-c64-remap-disabled.json | 12 +++++------
 .../py3/qos-mellanox4600c-c64.json            | 12 +++++------
 ...ellanox4600c-d48c40-t0-remap-disabled.json | 12 +++++------
 .../py3/qos-mellanox4600c-d48c40-t0.json      | 12 +++++------
 5 files changed, 44 insertions(+), 24 deletions(-)

diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2
index b3bc96fb83c3..8e736843dcfe 100644
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2
@@ -277,4 +277,24 @@
 
 {% endif %}
 
+{%- macro generate_wred_profiles() %}
+    "WRED_PROFILE": {
+        "AZURE_LOSSLESS" : {
+            "wred_green_enable"      : "true",
+            "wred_yellow_enable"     : "true",
+            "wred_red_enable"        : "true",
+            "ecn"                    : "ecn_all",
+            "green_max_threshold"    : "10000000",
+            "green_min_threshold"    : "2000000",
+            "yellow_max_threshold"   : "10000000",
+            "yellow_min_threshold"   : "2000000",
+            "red_max_threshold"      : "10000000",
+            "red_min_threshold"      : "2000000",
+            "green_drop_probability" : "5",
+            "yellow_drop_probability": "5",
+            "red_drop_probability"   : "5"
+        }
+    },
+{%- endmacro %}
+
 {%- include 'qos_config.j2' %}
diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64-remap-disabled.json b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64-remap-disabled.json
index 6e15d72074ff..d3abbd4da38e 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64-remap-disabled.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64-remap-disabled.json
@@ -345,12 +345,12 @@
             "wred_yellow_enable"     : "true",
             "wred_red_enable"        : "true",
             "ecn"                    : "ecn_all",
-            "green_max_threshold"    : "2097152",
-            "green_min_threshold"    : "1048576",
-            "yellow_max_threshold"   : "2097152",
-            "yellow_min_threshold"   : "1048576",
-            "red_max_threshold"      : "2097152",
-            "red_min_threshold"      : "1048576",
+            "green_max_threshold"    : "10000000",
+            "green_min_threshold"    : "2000000",
+            "yellow_max_threshold"   : "10000000",
+            "yellow_min_threshold"   : "2000000",
+            "red_max_threshold"      : "10000000",
+            "red_min_threshold"      : "2000000",
             "green_drop_probability" : "5",
             "yellow_drop_probability": "5",
             "red_drop_probability"   : "5"
diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64.json b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64.json
index df3e773b7328..c09f14c4bc90 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64.json
@@ -411,12 +411,12 @@
             "wred_yellow_enable"     : "true",
             "wred_red_enable"        : "true",
             "ecn"                    : "ecn_all",
-            "green_max_threshold"    : "2097152",
-            "green_min_threshold"    : "1048576",
-            "yellow_max_threshold"   : "2097152",
-            "yellow_min_threshold"   : "1048576",
-            "red_max_threshold"      : "2097152",
-            "red_min_threshold"      : "1048576",
+            "green_max_threshold"    : "10000000",
+            "green_min_threshold"    : "2000000",
+            "yellow_max_threshold"   : "10000000",
+            "yellow_min_threshold"   : "2000000",
+            "red_max_threshold"      : "10000000",
+            "red_min_threshold"      : "2000000",
             "green_drop_probability" : "5",
             "yellow_drop_probability": "5",
             "red_drop_probability"   : "5"
diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0-remap-disabled.json b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0-remap-disabled.json
index a131d36a5f82..3b205e0a1226 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0-remap-disabled.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0-remap-disabled.json
@@ -316,12 +316,12 @@
             "wred_yellow_enable"     : "true",
             "wred_red_enable"        : "true",
             "ecn"                    : "ecn_all",
-            "green_max_threshold"    : "2097152",
-            "green_min_threshold"    : "1048576",
-            "yellow_max_threshold"   : "2097152",
-            "yellow_min_threshold"   : "1048576",
-            "red_max_threshold"      : "2097152",
-            "red_min_threshold"      : "1048576",
+            "green_max_threshold"    : "10000000",
+            "green_min_threshold"    : "2000000",
+            "yellow_max_threshold"   : "10000000",
+            "yellow_min_threshold"   : "2000000",
+            "red_max_threshold"      : "10000000",
+            "red_min_threshold"      : "2000000",
             "green_drop_probability" : "5",
             "yellow_drop_probability": "5",
             "red_drop_probability"   : "5"
diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0.json b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0.json
index 6c15a0fd9803..14cdb37ab994 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0.json
@@ -507,12 +507,12 @@
             "wred_yellow_enable"     : "true",
             "wred_red_enable"        : "true",
             "ecn"                    : "ecn_all",
-            "green_max_threshold"    : "2097152",
-            "green_min_threshold"    : "1048576",
-            "yellow_max_threshold"   : "2097152",
-            "yellow_min_threshold"   : "1048576",
-            "red_max_threshold"      : "2097152",
-            "red_min_threshold"      : "1048576",
+            "green_max_threshold"    : "10000000",
+            "green_min_threshold"    : "2000000",
+            "yellow_max_threshold"   : "10000000",
+            "yellow_min_threshold"   : "2000000",
+            "red_max_threshold"      : "10000000",
+            "red_min_threshold"      : "2000000",
             "green_drop_probability" : "5",
             "yellow_drop_probability": "5",
             "red_drop_probability"   : "5"

From 433d039a4ff87b038bde293c1083b9e5a8e570d0 Mon Sep 17 00:00:00 2001
From: Lawrence Lee <lawlee@microsoft.com>
Date: Mon, 16 Sep 2024 17:40:11 -0700
Subject: [PATCH 019/364] Update swss and sairedis submodules (#20213)

Update swss and sairedis submodules (#20213)

Signed-off-by: Lawrence Lee <lawlee@microsoft.com>
---
 src/sonic-sairedis | 2 +-
 src/sonic-swss     | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 45ff42c3ca00..dbcba69b04e7 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 45ff42c3ca002b4426f6dad1fe8fc132be9dece7
+Subproject commit dbcba69b04e774a442cccda642d9bddbe82b9ee9
diff --git a/src/sonic-swss b/src/sonic-swss
index 42ea859ce982..8e81856ef1bf 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 42ea859ce982b21ff40c78c92a5ab21aafb52fad
+Subproject commit 8e81856ef1bf28f86c805f98899adf12d2a7e491

From 0760229dbf64d74568d7f4343ab5727bf808c77a Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 17 Sep 2024 19:01:08 +0800
Subject: [PATCH 020/364] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#20185)

#### Why I did it
src/sonic-sairedis
```
* 9b9d3306 - (HEAD -> master, origin/master, origin/HEAD) Add support for DASH ENI Counters (#1418) (5 hours ago) [Vivek]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index dbcba69b04e7..9b9d3306080e 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit dbcba69b04e774a442cccda642d9bddbe82b9ee9
+Subproject commit 9b9d3306080e25568dd89261de87beac01738a0a

From c0eebae0bccbbcc90b188773a642542fb670baaa Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 17 Sep 2024 19:01:12 +0800
Subject: [PATCH 021/364] [submodule] Update submodule sonic-swss to the latest
 HEAD automatically (#20159)

#### Why I did it
src/sonic-swss
```
* 20e8b362 - (HEAD -> master, origin/master, origin/HEAD) [dash] Set CA to PA underlay DIP for static encap (#3286) (5 days ago) [Lawrence Lee]
* 60f9dde5 - Add pass pl_sip_encoding to SAI (#3285) (5 days ago) [Lawrence Lee]
* 3943093d - [Mellanox] Update headroom calculation algorithm (#3235) (6 days ago) [Stephen Sun]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 8e81856ef1bf..20e8b362a5e4 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 8e81856ef1bf28f86c805f98899adf12d2a7e491
+Subproject commit 20e8b362a5e4fd5361a6f08effddd08d61d5d262

From 2c47e35472b1f9fd5801a884ce7993d873c07afa Mon Sep 17 00:00:00 2001
From: ntt-omw <133925107+ntt-omw@users.noreply.github.com>
Date: Wed, 18 Sep 2024 00:51:00 +0900
Subject: [PATCH 022/364] [fpmsyncd] Fpmsyncd Next Hop Table Enhancement
 (#16762)

[fpmsyncd] Fpmsyncd Next Hop Table Enhancement (#16762)

Signed-off-by: nakano.kanji <kanji.nakano@ntt.com>
---
 .../docker-fpm-frr/frr/zebra/zebra.conf.j2    |   6 +
 ...ding-support-for-RTA_NH_ID-attribute.patch | 154 ++++++++++++++++++
 src/libnl3/patch/series                       |   1 +
 .../tests/files/sample_config_db.json         |   3 +-
 .../tests/device_metadata.json                |   5 +-
 .../tests_config/device_metadata.json         |   9 +
 .../yang-models/sonic-device_metadata.yang    |   9 +
 7 files changed, 185 insertions(+), 2 deletions(-)
 create mode 100644 src/libnl3/patch/0003-Adding-support-for-RTA_NH_ID-attribute.patch

diff --git a/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2 b/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2
index f5a56c316d41..673918b3d948 100644
--- a/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2
+++ b/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2
@@ -7,8 +7,14 @@
 {% endblock banner %}
 !
 {% block fpm %}
+{% if ( ('localhost' in DEVICE_METADATA) and ('nexthop_group' in  DEVICE_METADATA['localhost']) and
+        (DEVICE_METADATA['localhost']['nexthop_group'] == 'enabled') ) %}
+! enable next hop group support
+fpm use-next-hop-groups
+{% else %}
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
+{% endif %}
 !
 fpm address 127.0.0.1
 {% endblock fpm %}
diff --git a/src/libnl3/patch/0003-Adding-support-for-RTA_NH_ID-attribute.patch b/src/libnl3/patch/0003-Adding-support-for-RTA_NH_ID-attribute.patch
new file mode 100644
index 000000000000..80f94a2a02b7
--- /dev/null
+++ b/src/libnl3/patch/0003-Adding-support-for-RTA_NH_ID-attribute.patch
@@ -0,0 +1,154 @@
+From 70e995bd076b5027414e1332a453f366f20c7002 Mon Sep 17 00:00:00 2001
+From: Fernando <fernando.agnes@venkonetworks.com.br>
+Date: Mon, 19 Sep 2022 12:56:46 -0300
+Subject: Adding support for RTA_NH_ID attribute
+
+---
+ include/netlink-private/types.h |  1 +
+ include/netlink/route/route.h   |  2 ++
+ lib/route/route_obj.c           | 23 +++++++++++++++++++++++
+ 3 files changed, 26 insertions(+)
+
+diff --git a/include/netlink-private/types.h b/include/netlink-private/types.h
+index 97af3e5..51e58b1 100644
+--- a/include/netlink-private/types.h
++++ b/include/netlink-private/types.h
+@@ -348,6 +348,7 @@ struct rtnl_route
+ 	uint32_t		rt_metrics[RTAX_MAX];
+ 	uint32_t		rt_metrics_mask;
+ 	uint32_t		rt_nr_nh;
++	uint32_t		rt_nh_id;
+ 	struct nl_addr *	rt_pref_src;
+ 	struct nl_list_head	rt_nexthops;
+ 	struct rtnl_rtcacheinfo	rt_cacheinfo;
+diff --git a/include/netlink/route/route.h b/include/netlink/route/route.h
+index 824dae3..9cfa393 100644
+--- a/include/netlink/route/route.h
++++ b/include/netlink/route/route.h
+@@ -93,6 +93,8 @@ extern int	rtnl_route_set_pref_src(struct rtnl_route *, struct nl_addr *);
+ extern struct nl_addr *rtnl_route_get_pref_src(struct rtnl_route *);
+ extern void	rtnl_route_set_iif(struct rtnl_route *, int);
+ extern int	rtnl_route_get_iif(struct rtnl_route *);
++extern void	rtnl_route_set_nh_id(struct rtnl_route *, uint32_t);
++extern uint32_t	rtnl_route_get_nh_id(struct rtnl_route *);
+ extern int	rtnl_route_get_src_len(struct rtnl_route *);
+ extern void	rtnl_route_set_ttl_propagate(struct rtnl_route *route,
+ 					     uint8_t ttl_prop);
+diff --git a/lib/route/route_obj.c b/lib/route/route_obj.c
+index bacabe8..5d9d4ce 100644
+--- a/lib/route/route_obj.c
++++ b/lib/route/route_obj.c
+@@ -65,6 +65,7 @@
+ #define ROUTE_ATTR_REALMS    0x010000
+ #define ROUTE_ATTR_CACHEINFO 0x020000
+ #define ROUTE_ATTR_TTL_PROPAGATE 0x040000
++#define ROUTE_ATTR_NH_ID     0x080000
+ /** @endcond */
+ 
+ static void route_constructor(struct nl_object *c)
+@@ -252,6 +253,8 @@ static void route_dump_details(struct nl_object *a, struct nl_dump_params *p)
+ 		nl_dump(p, " ttl-propagate %s",
+ 			r->rt_ttl_propagate ? "enabled" : "disabled");
+ 	}
++	if (r->ce_mask & ROUTE_ATTR_NH_ID)
++		nl_dump(p, "nh id %d ", r->rt_nh_id);
+ 
+ 	nl_dump(p, "\n");
+ 
+@@ -391,6 +394,7 @@ static uint64_t route_compare(struct nl_object *_a, struct nl_object *_b,
+ 						    b->rt_pref_src));
+ 	diff |= ROUTE_DIFF(TTL_PROPAGATE,
+ 			   a->rt_ttl_propagate != b->rt_ttl_propagate);
++	diff |= ROUTE_DIFF(NH_ID,		a->rt_nh_id != b->rt_nh_id);
+ 
+ 	if (flags & LOOSE_COMPARISON) {
+ 		nl_list_for_each_entry(nh_b, &b->rt_nexthops, rtnh_list) {
+@@ -589,6 +593,7 @@ static const struct trans_tbl route_attrs[] = {
+ 	__ADD(ROUTE_ATTR_REALMS, realms),
+ 	__ADD(ROUTE_ATTR_CACHEINFO, cacheinfo),
+ 	__ADD(ROUTE_ATTR_TTL_PROPAGATE, ttl_propagate),
++	__ADD(ROUTE_ATTR_NH_ID, nh_id),
+ };
+ 
+ static char *route_attrs2str(int attrs, char *buf, size_t len)
+@@ -862,6 +867,17 @@ int rtnl_route_get_iif(struct rtnl_route *route)
+ 	return route->rt_iif;
+ }
+ 
++void rtnl_route_set_nh_id(struct rtnl_route *route, uint32_t nhid)
++{
++	route->rt_nh_id = nhid;
++	route->ce_mask |= ROUTE_ATTR_NH_ID;
++}
++
++uint32_t rtnl_route_get_nh_id(struct rtnl_route *route)
++{
++	return route->rt_nh_id;
++}
++
+ void rtnl_route_add_nexthop(struct rtnl_route *route, struct rtnl_nexthop *nh)
+ {
+ 	nl_list_add_tail(&nh->rtnh_list, &route->rt_nexthops);
+@@ -1018,6 +1034,7 @@ static struct nla_policy route_policy[RTA_MAX+1] = {
+ 	[RTA_TTL_PROPAGATE] = { .type = NLA_U8 },
+ 	[RTA_ENCAP]	= { .type = NLA_NESTED },
+ 	[RTA_ENCAP_TYPE] = { .type = NLA_U16 },
++	[RTA_NH_ID] = { .type = NLA_U32 },
+ };
+ 
+ static int parse_multipath(struct rtnl_route *route, struct nlattr *attr)
+@@ -1201,6 +1218,9 @@ int rtnl_route_parse(struct nlmsghdr *nlh, struct rtnl_route **result)
+ 		nl_addr_put(addr);
+ 	}
+ 
++	if (tb[RTA_NH_ID])
++		rtnl_route_set_nh_id(route, nla_get_u32(tb[RTA_NH_ID]));
++
+ 	if (tb[RTA_METRICS]) {
+ 		struct nlattr *mtb[RTAX_MAX + 1];
+ 		int i;
+@@ -1404,6 +1424,9 @@ int rtnl_route_build_msg(struct nl_msg *msg, struct rtnl_route *route)
+ 	if (route->ce_mask & ROUTE_ATTR_TTL_PROPAGATE)
+ 		NLA_PUT_U8(msg, RTA_TTL_PROPAGATE, route->rt_ttl_propagate);
+ 
++	if (route->ce_mask & ROUTE_ATTR_NH_ID)
++		NLA_PUT_U32(msg, RTA_NH_ID, route->rt_nh_id);
++
+ 	if (route->rt_nmetrics > 0) {
+ 		uint32_t val;
+ 
+-- 
+2.25.1
+
+diff --git a/include/linux-private/linux/rtnetlink.h b/include/linux-private/linux/rtnetlink.h
+index 8c1d600..82fb56b 100644
+--- a/include/linux-private/linux/rtnetlink.h
++++ b/include/linux-private/linux/rtnetlink.h
+@@ -342,6 +342,7 @@ enum rtattr_type_t {
+ 	RTA_IP_PROTO,
+ 	RTA_SPORT,
+ 	RTA_DPORT,
++	RTA_NH_ID,
+ 	__RTA_MAX
+ };
+ 
+diff --git a/libnl-route-3.sym b/libnl-route-3.sym
+index ce6d714..fb81b7f 100644
+--- a/libnl-route-3.sym
++++ b/libnl-route-3.sym
+@@ -690,6 +690,7 @@ global:
+ 	rtnl_route_get_family;
+ 	rtnl_route_get_flags;
+ 	rtnl_route_get_iif;
++	rtnl_route_get_nh_id;
+ 	rtnl_route_get_metric;
+ 	rtnl_route_get_nexthops;
+ 	rtnl_route_get_nnexthops;
+@@ -732,6 +733,7 @@ global:
+ 	rtnl_route_set_family;
+ 	rtnl_route_set_flags;
+ 	rtnl_route_set_iif;
++	rtnl_route_set_nh_id;
+ 	rtnl_route_set_metric;
+ 	rtnl_route_set_pref_src;
+ 	rtnl_route_set_priority;
diff --git a/src/libnl3/patch/series b/src/libnl3/patch/series
index 4508b1dd652a..4c7c2d8e25a5 100644
--- a/src/libnl3/patch/series
+++ b/src/libnl3/patch/series
@@ -1,2 +1,3 @@
 0001-mpls-encap-accessors.patch
 0002-mpls-remove-nl_addr_valid.patch
+0003-Adding-support-for-RTA_NH_ID-attribute.patch
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 8fefa69f88f9..d7f640667ade 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -377,7 +377,8 @@
                 "timezone": "Europe/Kiev",
                 "bgp_router_id": "8.8.8.8",
                 "chassis_hostname": "str-sonic-chassis-1",
-                "slice_type": "AZNG_Production"
+                "slice_type": "AZNG_Production",
+                "nexthop_group": "disabled"
             }
         },
         "VLAN": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
index bd3a44c3764f..119e5b7cec44 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
@@ -178,5 +178,8 @@
     },
     "DEVICE_METADATA_VALID_SLICE_TYPE": {
         "desc": "Verifying valid slice_type configuration."
-    }
+    },
+    "DEVICE_METADATA_VALID_NEXTHOP_GROUP": {
+        "desc": "Verifying nexthop_group configuration."
+     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
index 3d5adcabc4ea..5d0e0201b4ff 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
@@ -490,5 +490,14 @@
                 }
             }
         }
+    },
+    "DEVICE_METADATA_VALID_NEXTHOP_GROUP": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "nexthop_group": "disabled"
+                }
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
index 5c5abdeb1a6f..c097da81a870 100644
--- a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
+++ b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
@@ -265,6 +265,15 @@ module sonic-device_metadata {
                     type string;
                 }
 
+                leaf nexthop_group {
+                    description "Enable or disable Nexthop Group feature. This value only takes effect during boot time.";
+                    type enumeration {
+                        enum enabled;
+                        enum disabled;
+                    }
+                    default disabled;
+                }
+
             }
             /* end of container localhost */
         }

From e0e0c0c1b3c58635bc25fde6a77ca3b0849dfde1 Mon Sep 17 00:00:00 2001
From: Vivek <vivekreddykarri98@gmail.com>
Date: Wed, 18 Sep 2024 18:26:19 -0500
Subject: [PATCH 023/364] [DASH] Add support for ENI counters (#19997)

[DASH] Add support for ENI counters

Signed-off-by: Vivek Reddy <vkarri@nvidia.com>
---
 dockers/docker-orchagent/enable_counters.py         |  9 ++++++++-
 .../tests/files/sample_config_db.json               |  4 ++++
 .../yang_model_tests/tests_config/flex_counter.json |  4 ++++
 .../yang-models/sonic-flex_counter.yang             | 13 +++++++++++++
 4 files changed, 29 insertions(+), 1 deletion(-)

diff --git a/dockers/docker-orchagent/enable_counters.py b/dockers/docker-orchagent/enable_counters.py
index 6054503892d0..53b9568cf9ec 100755
--- a/dockers/docker-orchagent/enable_counters.py
+++ b/dockers/docker-orchagent/enable_counters.py
@@ -2,6 +2,7 @@
 
 import time
 from swsscommon import swsscommon
+from sonic_py_common import device_info
 
 # ALPHA defines the size of the window over which we calculate the average value. ALPHA is 2/(N+1) where N is the interval(window size)
 # In this case we configure the window to be 10s. This way if we have a huge 1s spike in traffic,
@@ -40,11 +41,17 @@ def enable_counters():
     db.connect()
     default_enabled_counters = ['PORT', 'RIF', 'QUEUE', 'PFCWD', 'PG_WATERMARK', 'PG_DROP', 
                                 'QUEUE_WATERMARK', 'BUFFER_POOL_WATERMARK', 'PORT_BUFFER_DROP', 'ACL']
-    
+    dpu_counters = ["ENI"]
+
     # Enable those default counters
     for key in default_enabled_counters:
         enable_counter_group(db, key)
 
+    platform_info = device_info.get_platform_info(db)
+    if platform_info.get('switch_type') == 'dpu':
+        for key in dpu_counters:
+            enable_counter_group(db, key)
+
     # Set FLEX_COUNTER_DELAY_STATUS to false for those non-default counters
     keys = db.get_keys('FLEX_COUNTER_TABLE')
     for key in keys:
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index d7f640667ade..e48260714361 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -1447,6 +1447,10 @@
             "TUNNEL": {
                 "FLEX_COUNTER_STATUS": "enable",
                 "POLL_INTERVAL": "10000"
+            },
+            "ENI": {
+                "FLEX_COUNTER_STATUS": "enable",
+                "POLL_INTERVAL": "10000"
             }
         },
         "FLOW_COUNTER_ROUTE_PATTERN": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json
index 73da6d21d2d9..60386bdd72ea 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json
@@ -9,6 +9,10 @@
                 "DEBUG_COUNTER": {
                     "FLEX_COUNTER_STATUS": "enable"
                 },
+                "ENI": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "POLL_INTERVAL": 10000
+                },
                 "PFCWD": {
                     "FLEX_COUNTER_STATUS": "enable"
                 },
diff --git a/src/sonic-yang-models/yang-models/sonic-flex_counter.yang b/src/sonic-yang-models/yang-models/sonic-flex_counter.yang
index 90c75eadc60d..11e09f9f2a9f 100644
--- a/src/sonic-yang-models/yang-models/sonic-flex_counter.yang
+++ b/src/sonic-yang-models/yang-models/sonic-flex_counter.yang
@@ -68,6 +68,19 @@ module sonic-flex_counter {
                 }
             }
 
+            container ENI {
+                /* ENI_STAT_COUNTER_FLEX_COUNTER_GROUP */
+                leaf FLEX_COUNTER_STATUS {
+                    type flex_status;
+                }
+                leaf FLEX_COUNTER_DELAY_STATUS {
+                    type flex_delay_status;
+                }
+                leaf POLL_INTERVAL {
+                    type poll_interval;
+                }
+            }
+
             container PFCWD {
                 /* PFC_WD_FLEX_COUNTER_GROUP */
                 leaf FLEX_COUNTER_STATUS {

From 82861b162244568e1f5b5e3bb29226c55c4d3a13 Mon Sep 17 00:00:00 2001
From: Ashwin Srinivasan <93744978+assrinivasan@users.noreply.github.com>
Date: Thu, 19 Sep 2024 09:12:34 -0700
Subject: [PATCH 024/364] Adds blkinfo for use by stormond to instantiate
 UsbUtil object (#20053)

Why I did it
This module is required in the pmon container for Storage Monitoring Daemon (stormond) to instantiate objects of type (UsbUtil)[https://github.com/sonic-net/sonic-platform-common/pull/493].

Work item tracking
Microsoft ADO (number only): 29203991

How I did it
Added config to pmon Dockerfile.j2 to install blkinfo

How to verify it
On an image containing this change, verify following output:

root@str2-7050qx-32s-acs-03:/# pip3 list | grep -i blkinfo
blkinfo                       0.2.0
---
 dockers/docker-platform-monitor/Dockerfile.j2 | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/dockers/docker-platform-monitor/Dockerfile.j2 b/dockers/docker-platform-monitor/Dockerfile.j2
index 1bd0b1b1c082..b357133f5b91 100755
--- a/dockers/docker-platform-monitor/Dockerfile.j2
+++ b/dockers/docker-platform-monitor/Dockerfile.j2
@@ -54,6 +54,10 @@ RUN pip3 install libpci
 # Install psutil for process and system monitoring operations
 RUN pip3 install psutil
 
+# Install blkinfo for block device information gathering operations
+RUN pip3 install blkinfo
+
+
 {% if docker_platform_monitor_debs.strip() -%}
 # Copy locally-built Debian package dependencies
 {{ copy_files("debs/", docker_platform_monitor_debs.split(' '), "/debs/") }}

From b9e70a3f40a8e030f508a1de0de5f4976c40af12 Mon Sep 17 00:00:00 2001
From: Xichen96 <lukelin0907@gmail.com>
Date: Fri, 20 Sep 2024 00:14:00 +0800
Subject: [PATCH 025/364] [dhcp_relay] optimize dhcp relay cli (#20094)

Why I did it
Dhcp implementation included inefficient code

How I did it
Using redis.keys with pattern instead of looping over all keys.

How to verify it
Run unit tests.
---
 .../docker-dhcp-relay/cli-plugin-tests/mock_tables.py | 11 +++++++++++
 .../cli/show/plugins/show_dhcp_relay.py               |  6 +++---
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/dockers/docker-dhcp-relay/cli-plugin-tests/mock_tables.py b/dockers/docker-dhcp-relay/cli-plugin-tests/mock_tables.py
index 650d2cf489e1..e81a041ee9d3 100644
--- a/dockers/docker-dhcp-relay/cli-plugin-tests/mock_tables.py
+++ b/dockers/docker-dhcp-relay/cli-plugin-tests/mock_tables.py
@@ -58,6 +58,16 @@ def connect_SonicV2Connector(self, db_name, retry_on=True):
 def _subscribe_keyspace_notification(self, db_name, client):
     pass
 
+def keys(self, db_name, pattern='*'):
+    """
+    Retrieve all the keys of DB %db_name
+    """
+    client = self.redis_clients[db_name]
+    keys = client.keys(pattern=pattern)
+    if not keys:
+        return []
+    else:
+        return keys
 
 def config_set(self, *args):
     pass
@@ -146,6 +156,7 @@ def keys(self, pattern='*'):
 
 
 swsssdk.interface.DBInterface._subscribe_keyspace_notification = _subscribe_keyspace_notification
+swsssdk.interface.DBInterface.keys = keys
 mockredis.MockRedis.config_set = config_set
 redis.StrictRedis = SwssSyncClient
 SonicV2Connector.connect = connect_SonicV2Connector
diff --git a/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py b/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py
index d9e87b2b347c..7a3ea15d5f47 100644
--- a/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py
+++ b/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py
@@ -45,13 +45,13 @@ def __init__(self):
         self.db = SonicV2Connector(use_unix_socket_path=False)
         self.db.connect(self.db.STATE_DB)
         self.table_name = DHCPv6_COUNTER_TABLE + self.db.get_db_separator(self.db.STATE_DB)
+        self.table_prefix_len = len(self.table_name)
 
     def get_interface(self):
         """ Get all names of all interfaces in DHCPv6_COUNTER_TABLE """
         vlans = []
-        for key in self.db.keys(self.db.STATE_DB):
-            if DHCPv6_COUNTER_TABLE in key:
-                vlans.append(key[21:])
+        for key in self.db.keys(self.db.STATE_DB, self.table_name + "*"):
+            vlans.append(key[self.table_prefix_len:])
         return vlans
 
     def get_dhcp6relay_msg_count(self, interface, msg):

From 856fcc96edbcddcd49731dc2d5a27232e07e6204 Mon Sep 17 00:00:00 2001
From: DavidZagury <32644413+DavidZagury@users.noreply.github.com>
Date: Thu, 19 Sep 2024 21:03:15 +0300
Subject: [PATCH 026/364] [Mellanox] Adding SKU Mellanox-SN5600-C256A1 (#19619)

Why I did it
Support Mellanox-SN5600-C256A1

How I did it
Add relevant files to support the new SKU

How to verify it
Regression test
---
 .../Mellanox-SN5600-C256A1/buffers.json.j2    |   1 +
 .../buffers_defaults_objects.j2               |   1 +
 .../buffers_defaults_t0.j2                    |  47 ++
 .../buffers_defaults_t1.j2                    |  47 ++
 .../buffers_dynamic.json.j2                   |  16 +
 .../create_only_config_db_buffers.json        |   7 +
 .../media_settings.json                       |   1 +
 .../optics_si_settings.json                   |   1 +
 .../pg_profile_lookup.ini                     |  42 ++
 .../pmon_daemon_control.json                  |   5 +
 .../Mellanox-SN5600-C256A1/port_config.ini    | 275 +++++++++
 .../Mellanox-SN5600-C256A1/qos.json.j2        |   1 +
 .../Mellanox-SN5600-C256A1/sai.profile        |   4 +
 .../sai_5600_256x100g.xml                     | 560 ++++++++++++++++++
 14 files changed, 1008 insertions(+)
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers.json.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_objects.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t0.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t1.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_dynamic.json.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/create_only_config_db_buffers.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/media_settings.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/optics_si_settings.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pg_profile_lookup.ini
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pmon_daemon_control.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/port_config.ini
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/qos.json.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai.profile
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai_5600_256x100g.xml

diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers.json.j2
new file mode 120000
index 000000000000..add8bf8bb7c2
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_objects.j2
new file mode 120000
index 000000000000..c01aebb7ae12
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_objects.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_objects.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t0.j2
new file mode 100644
index 000000000000..664f3a7a61d4
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t0.j2
@@ -0,0 +1,47 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '40m' %}
+{% set ingress_lossless_pool_size =  '118249472' %}
+{% set ingress_lossless_pool_xoff =  '15728640' %}
+{% set egress_lossless_pool_size =  '158229504' %}
+{% set egress_lossy_pool_size =  '118249472' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t1.j2
new file mode 100644
index 000000000000..6a576b70d2f0
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t1.j2
@@ -0,0 +1,47 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '300m' %}
+{% set ingress_lossless_pool_size =  '137779200' %}
+{% set ingress_lossless_pool_xoff =  '10092544' %}
+{% set egress_lossless_pool_size =  '158229504' %}
+{% set egress_lossy_pool_size =  '137779200' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_dynamic.json.j2
new file mode 100644
index 000000000000..b2cc958b7c45
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_dynamic.json.j2
@@ -0,0 +1,16 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{%- set default_topo = 't0' %}
+{%- set dynamic_mode = 'true' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/create_only_config_db_buffers.json
new file mode 100644
index 000000000000..6feb156714fe
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/create_only_config_db_buffers.json
@@ -0,0 +1,7 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "create_only_config_db_buffers": "true"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/media_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/media_settings.json
new file mode 120000
index 000000000000..2f4f358b3ba1
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/media_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN5600-V256/media_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/optics_si_settings.json
new file mode 120000
index 000000000000..f0e582a4d772
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/optics_si_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN5600-V256/optics_si_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pg_profile_lookup.ini
new file mode 100644
index 000000000000..54a46fff3bf7
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pg_profile_lookup.ini
@@ -0,0 +1,42 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+#  PG lossless profiles.
+# speed cable  size   xon    xoff   threshold
+  10000    5m 39936   19456  20480         0
+  25000    5m 40960   19456  21504         0
+  40000    5m 44032   19456  24576         0
+  50000    5m 46080   19456  26624         0
+ 100000    5m 63488   19456  44032         0
+ 200000    5m 69632   19456  50176         0
+ 400000    5m 105472  19456  86016         0
+ 800000    5m 134144  38912  95232         0
+  10000   40m 39936   19456  20480         0
+  25000   40m 41984   19456  22528         0
+  40000   40m 45056   19456  25600         0
+  50000   40m 48128   19456  28672         0
+ 100000   40m 68608   19456  49152         0
+ 200000   40m 79872   19456  60416         0
+ 400000   40m 123904  19456  104448        0
+ 800000   40m 171008  38912  132096        0
+  10000  300m 43008   19456  23552         0
+  25000  300m 50176   19456  30720         0
+  40000  300m 59392   19456  39936         0
+  50000  300m 65536   19456  46080         0
+ 100000  300m 103424  19456  83968         0
+ 200000  300m 149504  19456  130048        0
+ 400000  300m 263168  19456  243712        0
+ 800000  300m 450560  38912  411648        0
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pmon_daemon_control.json
new file mode 100644
index 000000000000..281b96b71cc6
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pmon_daemon_control.json
@@ -0,0 +1,5 @@
+{
+    "skip_ledd": true,
+    "skip_fancontrol": true,
+    "skip_xcvrd_cmis_mgr": false
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/port_config.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/port_config.ini
new file mode 100644
index 000000000000..ab734780f602
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/port_config.ini
@@ -0,0 +1,275 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+# name         lanes                                  alias     index    speed    fec   autoneg subport
+Ethernet0      0                                      etp1a     1        100000   rs    off     1
+Ethernet1      1                                      etp1b     1        100000   rs    off     2
+Ethernet2      2                                      etp1c     1        100000   rs    off     3
+Ethernet3      3                                      etp1d     1        100000   rs    off     4
+Ethernet4      4                                      etp1e     1        100000   rs    off     5
+Ethernet5      5                                      etp1f     1        100000   rs    off     6
+Ethernet6      6                                      etp1g     1        100000   rs    off     7
+Ethernet7      7                                      etp1h     1        100000   rs    off     8
+Ethernet16     16                                     etp3a     3        100000   rs    off     1
+Ethernet17     17                                     etp3b     3        100000   rs    off     2
+Ethernet18     18                                     etp3c     3        100000   rs    off     3
+Ethernet19     19                                     etp3d     3        100000   rs    off     4
+Ethernet20     20                                     etp3e     3        100000   rs    off     5
+Ethernet21     21                                     etp3f     3        100000   rs    off     6
+Ethernet22     22                                     etp3g     3        100000   rs    off     7
+Ethernet23     23                                     etp3h     3        100000   rs    off     8
+Ethernet32     32                                     etp5a     5        100000   rs    off     1
+Ethernet33     33                                     etp5b     5        100000   rs    off     2
+Ethernet34     34                                     etp5c     5        100000   rs    off     3
+Ethernet35     35                                     etp5d     5        100000   rs    off     4
+Ethernet36     36                                     etp5e     5        100000   rs    off     5
+Ethernet37     37                                     etp5f     5        100000   rs    off     6
+Ethernet38     38                                     etp5g     5        100000   rs    off     7
+Ethernet39     39                                     etp5h     5        100000   rs    off     8
+Ethernet48     48                                     etp7a     7        100000   rs    off     1
+Ethernet49     49                                     etp7b     7        100000   rs    off     2
+Ethernet50     50                                     etp7c     7        100000   rs    off     3
+Ethernet51     51                                     etp7d     7        100000   rs    off     4
+Ethernet52     52                                     etp7e     7        100000   rs    off     5
+Ethernet53     53                                     etp7f     7        100000   rs    off     6
+Ethernet54     54                                     etp7g     7        100000   rs    off     7
+Ethernet55     55                                     etp7h     7        100000   rs    off     8
+Ethernet64     64                                     etp9a     9        100000   rs    off     1
+Ethernet65     65                                     etp9b     9        100000   rs    off     2
+Ethernet66     66                                     etp9c     9        100000   rs    off     3
+Ethernet67     67                                     etp9d     9        100000   rs    off     4
+Ethernet68     68                                     etp9e     9        100000   rs    off     5
+Ethernet69     69                                     etp9f     9        100000   rs    off     6
+Ethernet70     70                                     etp9g     9        100000   rs    off     7
+Ethernet71     71                                     etp9h     9        100000   rs    off     8
+Ethernet80     80                                     etp11a    11       100000   rs    off     1
+Ethernet81     81                                     etp11b    11       100000   rs    off     2
+Ethernet82     82                                     etp11c    11       100000   rs    off     3
+Ethernet83     83                                     etp11d    11       100000   rs    off     4
+Ethernet84     84                                     etp11e    11       100000   rs    off     5
+Ethernet85     85                                     etp11f    11       100000   rs    off     6
+Ethernet86     86                                     etp11g    11       100000   rs    off     7
+Ethernet87     87                                     etp11h    11       100000   rs    off     8
+Ethernet96     96                                     etp13a    13       100000   rs    off     1
+Ethernet97     97                                     etp13b    13       100000   rs    off     2
+Ethernet98     98                                     etp13c    13       100000   rs    off     3
+Ethernet99     99                                     etp13d    13       100000   rs    off     4
+Ethernet100    100                                    etp13e    13       100000   rs    off     5
+Ethernet101    101                                    etp13f    13       100000   rs    off     6
+Ethernet102    102                                    etp13g    13       100000   rs    off     7
+Ethernet103    103                                    etp13h    13       100000   rs    off     8
+Ethernet112    112                                    etp15a    15       100000   rs    off     1
+Ethernet113    113                                    etp15b    15       100000   rs    off     2
+Ethernet114    114                                    etp15c    15       100000   rs    off     3
+Ethernet115    115                                    etp15d    15       100000   rs    off     4
+Ethernet116    116                                    etp15e    15       100000   rs    off     5
+Ethernet117    117                                    etp15f    15       100000   rs    off     6
+Ethernet118    118                                    etp15g    15       100000   rs    off     7
+Ethernet119    119                                    etp15h    15       100000   rs    off     8
+Ethernet128    128                                    etp17a    17       100000   rs    off     1
+Ethernet129    129                                    etp17b    17       100000   rs    off     2
+Ethernet130    130                                    etp17c    17       100000   rs    off     3
+Ethernet131    131                                    etp17d    17       100000   rs    off     4
+Ethernet132    132                                    etp17e    17       100000   rs    off     5
+Ethernet133    133                                    etp17f    17       100000   rs    off     6
+Ethernet134    134                                    etp17g    17       100000   rs    off     7
+Ethernet135    135                                    etp17h    17       100000   rs    off     8
+Ethernet144    144                                    etp19a    19       100000   rs    off     1
+Ethernet145    145                                    etp19b    19       100000   rs    off     2
+Ethernet146    146                                    etp19c    19       100000   rs    off     3
+Ethernet147    147                                    etp19d    19       100000   rs    off     4
+Ethernet148    148                                    etp19e    19       100000   rs    off     5
+Ethernet149    149                                    etp19f    19       100000   rs    off     6
+Ethernet150    150                                    etp19g    19       100000   rs    off     7
+Ethernet151    151                                    etp19h    19       100000   rs    off     8
+Ethernet160    160                                    etp21a    21       100000   rs    off     1
+Ethernet161    161                                    etp21b    21       100000   rs    off     2
+Ethernet162    162                                    etp21c    21       100000   rs    off     3
+Ethernet163    163                                    etp21d    21       100000   rs    off     4
+Ethernet164    164                                    etp21e    21       100000   rs    off     5
+Ethernet165    165                                    etp21f    21       100000   rs    off     6
+Ethernet166    166                                    etp21g    21       100000   rs    off     7
+Ethernet167    167                                    etp21h    21       100000   rs    off     8
+Ethernet176    176                                    etp23a    23       100000   rs    off     1
+Ethernet177    177                                    etp23b    23       100000   rs    off     2
+Ethernet178    178                                    etp23c    23       100000   rs    off     3
+Ethernet179    179                                    etp23d    23       100000   rs    off     4
+Ethernet180    180                                    etp23e    23       100000   rs    off     5
+Ethernet181    181                                    etp23f    23       100000   rs    off     6
+Ethernet182    182                                    etp23g    23       100000   rs    off     7
+Ethernet183    183                                    etp23h    23       100000   rs    off     8
+Ethernet192    192                                    etp25a    25       100000   rs    off     1
+Ethernet193    193                                    etp25b    25       100000   rs    off     2
+Ethernet194    194                                    etp25c    25       100000   rs    off     3
+Ethernet195    195                                    etp25d    25       100000   rs    off     4
+Ethernet196    196                                    etp25e    25       100000   rs    off     5
+Ethernet197    197                                    etp25f    25       100000   rs    off     6
+Ethernet198    198                                    etp25g    25       100000   rs    off     7
+Ethernet199    199                                    etp25h    25       100000   rs    off     8
+Ethernet208    208                                    etp27a    27       100000   rs    off     1
+Ethernet209    209                                    etp27b    27       100000   rs    off     2
+Ethernet210    210                                    etp27c    27       100000   rs    off     3
+Ethernet211    211                                    etp27d    27       100000   rs    off     4
+Ethernet212    212                                    etp27e    27       100000   rs    off     5
+Ethernet213    213                                    etp27f    27       100000   rs    off     6
+Ethernet214    214                                    etp27g    27       100000   rs    off     7
+Ethernet215    215                                    etp27h    27       100000   rs    off     8
+Ethernet224    224                                    etp29a    29       100000   rs    off     1
+Ethernet225    225                                    etp29b    29       100000   rs    off     2
+Ethernet226    226                                    etp29c    29       100000   rs    off     3
+Ethernet227    227                                    etp29d    29       100000   rs    off     4
+Ethernet228    228                                    etp29e    29       100000   rs    off     5
+Ethernet229    229                                    etp29f    29       100000   rs    off     6
+Ethernet230    230                                    etp29g    29       100000   rs    off     7
+Ethernet231    231                                    etp29h    29       100000   rs    off     8
+Ethernet240    240                                    etp31a    31       100000   rs    off     1
+Ethernet241    241                                    etp31b    31       100000   rs    off     2
+Ethernet242    242                                    etp31c    31       100000   rs    off     3
+Ethernet243    243                                    etp31d    31       100000   rs    off     4
+Ethernet244    244                                    etp31e    31       100000   rs    off     5
+Ethernet245    245                                    etp31f    31       100000   rs    off     6
+Ethernet246    246                                    etp31g    31       100000   rs    off     7
+Ethernet247    247                                    etp31h    31       100000   rs    off     8
+Ethernet256    256                                    etp33a    33       100000   rs    off     1
+Ethernet257    257                                    etp33b    33       100000   rs    off     2
+Ethernet258    258                                    etp33c    33       100000   rs    off     3
+Ethernet259    259                                    etp33d    33       100000   rs    off     4
+Ethernet260    260                                    etp33e    33       100000   rs    off     5
+Ethernet261    261                                    etp33f    33       100000   rs    off     6
+Ethernet262    262                                    etp33g    33       100000   rs    off     7
+Ethernet263    263                                    etp33h    33       100000   rs    off     8
+Ethernet272    272                                    etp35a    35       100000   rs    off     1
+Ethernet273    273                                    etp35b    35       100000   rs    off     2
+Ethernet274    274                                    etp35c    35       100000   rs    off     3
+Ethernet275    275                                    etp35d    35       100000   rs    off     4
+Ethernet276    276                                    etp35e    35       100000   rs    off     5
+Ethernet277    277                                    etp35f    35       100000   rs    off     6
+Ethernet278    278                                    etp35g    35       100000   rs    off     7
+Ethernet279    279                                    etp35h    35       100000   rs    off     8
+Ethernet288    288                                    etp37a    37       100000   rs    off     1
+Ethernet289    289                                    etp37b    37       100000   rs    off     2
+Ethernet290    290                                    etp37c    37       100000   rs    off     3
+Ethernet291    291                                    etp37d    37       100000   rs    off     4
+Ethernet292    292                                    etp37e    37       100000   rs    off     5
+Ethernet293    293                                    etp37f    37       100000   rs    off     6
+Ethernet294    294                                    etp37g    37       100000   rs    off     7
+Ethernet295    295                                    etp37h    37       100000   rs    off     8
+Ethernet304    304                                    etp39a    39       100000   rs    off     1
+Ethernet305    305                                    etp39b    39       100000   rs    off     2
+Ethernet306    306                                    etp39c    39       100000   rs    off     3
+Ethernet307    307                                    etp39d    39       100000   rs    off     4
+Ethernet308    308                                    etp39e    39       100000   rs    off     5
+Ethernet309    309                                    etp39f    39       100000   rs    off     6
+Ethernet310    310                                    etp39g    39       100000   rs    off     7
+Ethernet311    311                                    etp39h    39       100000   rs    off     8
+Ethernet320    320                                    etp41a    41       100000   rs    off     1
+Ethernet321    321                                    etp41b    41       100000   rs    off     2
+Ethernet322    322                                    etp41c    41       100000   rs    off     3
+Ethernet323    323                                    etp41d    41       100000   rs    off     4
+Ethernet324    324                                    etp41e    41       100000   rs    off     5
+Ethernet325    325                                    etp41f    41       100000   rs    off     6
+Ethernet326    326                                    etp41g    41       100000   rs    off     7
+Ethernet327    327                                    etp41h    41       100000   rs    off     8
+Ethernet336    336                                    etp43a    43       100000   rs    off     1
+Ethernet337    337                                    etp43b    43       100000   rs    off     2
+Ethernet338    338                                    etp43c    43       100000   rs    off     3
+Ethernet339    339                                    etp43d    43       100000   rs    off     4
+Ethernet340    340                                    etp43e    43       100000   rs    off     5
+Ethernet341    341                                    etp43f    43       100000   rs    off     6
+Ethernet342    342                                    etp43g    43       100000   rs    off     7
+Ethernet343    343                                    etp43h    43       100000   rs    off     8
+Ethernet352    352                                    etp45a    45       100000   rs    off     1
+Ethernet353    353                                    etp45b    45       100000   rs    off     2
+Ethernet354    354                                    etp45c    45       100000   rs    off     3
+Ethernet355    355                                    etp45d    45       100000   rs    off     4
+Ethernet356    356                                    etp45e    45       100000   rs    off     5
+Ethernet357    357                                    etp45f    45       100000   rs    off     6
+Ethernet358    358                                    etp45g    45       100000   rs    off     7
+Ethernet359    359                                    etp45h    45       100000   rs    off     8
+Ethernet368    368                                    etp47a    47       100000   rs    off     1
+Ethernet369    369                                    etp47b    47       100000   rs    off     2
+Ethernet370    370                                    etp47c    47       100000   rs    off     3
+Ethernet371    371                                    etp47d    47       100000   rs    off     4
+Ethernet372    372                                    etp47e    47       100000   rs    off     5
+Ethernet373    373                                    etp47f    47       100000   rs    off     6
+Ethernet374    374                                    etp47g    47       100000   rs    off     7
+Ethernet375    375                                    etp47h    47       100000   rs    off     8
+Ethernet384    384                                    etp49a    49       100000   rs    off     1
+Ethernet385    385                                    etp49b    49       100000   rs    off     2
+Ethernet386    386                                    etp49c    49       100000   rs    off     3
+Ethernet387    387                                    etp49d    49       100000   rs    off     4
+Ethernet388    388                                    etp49e    49       100000   rs    off     5
+Ethernet389    389                                    etp49f    49       100000   rs    off     6
+Ethernet390    390                                    etp49g    49       100000   rs    off     7
+Ethernet391    391                                    etp49h    49       100000   rs    off     8
+Ethernet400    400                                    etp51a    51       100000   rs    off     1
+Ethernet401    401                                    etp51b    51       100000   rs    off     2
+Ethernet402    402                                    etp51c    51       100000   rs    off     3
+Ethernet403    403                                    etp51d    51       100000   rs    off     4
+Ethernet404    404                                    etp51e    51       100000   rs    off     5
+Ethernet405    405                                    etp51f    51       100000   rs    off     6
+Ethernet406    406                                    etp51g    51       100000   rs    off     7
+Ethernet407    407                                    etp51h    51       100000   rs    off     8
+Ethernet416    416                                    etp53a    53       100000   rs    off     1
+Ethernet417    417                                    etp53b    53       100000   rs    off     2
+Ethernet418    418                                    etp53c    53       100000   rs    off     3
+Ethernet419    419                                    etp53d    53       100000   rs    off     4
+Ethernet420    420                                    etp53e    53       100000   rs    off     5
+Ethernet421    421                                    etp53f    53       100000   rs    off     6
+Ethernet422    422                                    etp53g    53       100000   rs    off     7
+Ethernet423    423                                    etp53h    53       100000   rs    off     8
+Ethernet432    432                                    etp55a    55       100000   rs    off     1
+Ethernet433    433                                    etp55b    55       100000   rs    off     2
+Ethernet434    434                                    etp55c    55       100000   rs    off     3
+Ethernet435    435                                    etp55d    55       100000   rs    off     4
+Ethernet436    436                                    etp55e    55       100000   rs    off     5
+Ethernet437    437                                    etp55f    55       100000   rs    off     6
+Ethernet438    438                                    etp55g    55       100000   rs    off     7
+Ethernet439    439                                    etp55h    55       100000   rs    off     8
+Ethernet448    448                                    etp57a    57       100000   rs    off     1
+Ethernet449    449                                    etp57b    57       100000   rs    off     2
+Ethernet450    450                                    etp57c    57       100000   rs    off     3
+Ethernet451    451                                    etp57d    57       100000   rs    off     4
+Ethernet452    452                                    etp57e    57       100000   rs    off     5
+Ethernet453    453                                    etp57f    57       100000   rs    off     6
+Ethernet454    454                                    etp57g    57       100000   rs    off     7
+Ethernet455    455                                    etp57h    57       100000   rs    off     8
+Ethernet464    464                                    etp59a    59       100000   rs    off     1
+Ethernet465    465                                    etp59b    59       100000   rs    off     2
+Ethernet466    466                                    etp59c    59       100000   rs    off     3
+Ethernet467    467                                    etp59d    59       100000   rs    off     4
+Ethernet468    468                                    etp59e    59       100000   rs    off     5
+Ethernet469    469                                    etp59f    59       100000   rs    off     6
+Ethernet470    470                                    etp59g    59       100000   rs    off     7
+Ethernet471    471                                    etp59h    59       100000   rs    off     8
+Ethernet480    480                                    etp61a    61       100000   rs    off     1
+Ethernet481    481                                    etp61b    61       100000   rs    off     2
+Ethernet482    482                                    etp61c    61       100000   rs    off     3
+Ethernet483    483                                    etp61d    61       100000   rs    off     4
+Ethernet484    484                                    etp61e    61       100000   rs    off     5
+Ethernet485    485                                    etp61f    61       100000   rs    off     6
+Ethernet486    486                                    etp61g    61       100000   rs    off     7
+Ethernet487    487                                    etp61h    61       100000   rs    off     8
+Ethernet496    496                                    etp63a    63       100000   rs    off     1
+Ethernet497    497                                    etp63b    63       100000   rs    off     2
+Ethernet498    498                                    etp63c    63       100000   rs    off     3
+Ethernet499    499                                    etp63d    63       100000   rs    off     4
+Ethernet500    500                                    etp63e    63       100000   rs    off     5
+Ethernet501    501                                    etp63f    63       100000   rs    off     6
+Ethernet502    502                                    etp63g    63       100000   rs    off     7
+Ethernet503    503                                    etp63h    63       100000   rs    off     8
+Ethernet512    512                                    etp65     65        25000   rs
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/qos.json.j2
new file mode 120000
index 000000000000..eccf286dc879
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/qos.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai.profile
new file mode 100644
index 000000000000..271c8cf70fd8
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai.profile
@@ -0,0 +1,4 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5600_256x100g.xml
+SAI_INDEPENDENT_MODULE_MODE=1
+SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai_5600_256x100g.xml b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai_5600_256x100g.xml
new file mode 100644
index 000000000000..f45f28da357b
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai_5600_256x100g.xml
@@ -0,0 +1,560 @@
+<?xml version="1.0"?>
+<!--
+  Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+  Apache-2.0
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+  http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+-->
+<root>
+    <platform_info type="5600">
+
+        <!-- Device MAC address  -->
+        <device-mac-address>00:02:03:04:05:00</device-mac-address>
+
+        <!-- ISSU enabled -->
+        <issu-enabled>0</issu-enabled>
+
+        <!-- Number of ports in the following port list -->
+        <number-of-physical-ports>65</number-of-physical-ports>
+
+        <!-- Global port late create -->
+        <late-create-all-ports>1</late-create-all-ports>
+
+        <!-- List of ports in the device -->
+        <ports-list>
+            <port-info>
+                <local-port>1</local-port>
+                <width>8</width>
+                <module>34</module>
+
+                <!-- 0 none, 1=2, 2=4, 3=2,4 -->
+                <breakout-modes>3</breakout-modes>
+
+                <!-- (BITMASK) 2 - 1Gb , 16 - 10Gb , 32 - 40Gb , 384 - 50Gb , 4096 - 100Gb , 4096 - 200Gb, 32768 - 400G, 262144 - 800G -->
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>5</local-port>
+                <width>8</width>
+                <module>35</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>9</local-port>
+                <width>8</width>
+                <module>33</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>13</local-port>
+                <width>8</width>
+                <module>32</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>17</local-port>
+                <width>8</width>
+                <module>38</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>21</local-port>
+                <width>8</width>
+                <module>39</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>25</local-port>
+                <width>8</width>
+                <module>37</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>29</local-port>
+                <width>8</width>
+                <module>36</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>33</local-port>
+                <width>8</width>
+                <module>42</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>37</local-port>
+                <width>8</width>
+                <module>43</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>41</local-port>
+                <width>8</width>
+                <module>41</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>45</local-port>
+                <width>8</width>
+                <module>40</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>49</local-port>
+                <width>8</width>
+                <module>46</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>53</local-port>
+                <width>8</width>
+                <module>47</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>57</local-port>
+                <width>8</width>
+                <module>45</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>61</local-port>
+                <width>8</width>
+                <module>44</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>65</local-port>
+                <width>8</width>
+                <module>51</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>69</local-port>
+                <width>8</width>
+                <module>50</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>73</local-port>
+                <width>8</width>
+                <module>48</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>77</local-port>
+                <width>8</width>
+                <module>49</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>81</local-port>
+                <width>8</width>
+                <module>55</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>85</local-port>
+                <width>8</width>
+                <module>54</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>89</local-port>
+                <width>8</width>
+                <module>52</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>93</local-port>
+                <width>8</width>
+                <module>53</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>97</local-port>
+                <width>8</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>101</local-port>
+                <width>8</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>105</local-port>
+                <width>8</width>
+                <module>56</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>109</local-port>
+                <width>8</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>113</local-port>
+                <width>8</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>117</local-port>
+                <width>8</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>121</local-port>
+                <width>8</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>125</local-port>
+                <width>8</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>129</local-port>
+                <width>8</width>
+                <module>29</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>133</local-port>
+                <width>8</width>
+                <module>28</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>137</local-port>
+                <width>8</width>
+                <module>30</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>141</local-port>
+                <width>8</width>
+                <module>31</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>145</local-port>
+                <width>8</width>
+                <module>25</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>149</local-port>
+                <width>8</width>
+                <module>24</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>153</local-port>
+                <width>8</width>
+                <module>26</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>157</local-port>
+                <width>8</width>
+                <module>27</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>161</local-port>
+                <width>8</width>
+                <module>21</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>165</local-port>
+                <width>8</width>
+                <module>20</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>169</local-port>
+                <width>8</width>
+                <module>22</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>173</local-port>
+                <width>8</width>
+                <module>23</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>177</local-port>
+                <width>8</width>
+                <module>17</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>181</local-port>
+                <width>8</width>
+                <module>16</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>185</local-port>
+                <width>8</width>
+                <module>18</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>189</local-port>
+                <width>8</width>
+                <module>19</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>193</local-port>
+                <width>8</width>
+                <module>12</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>197</local-port>
+                <width>8</width>
+                <module>13</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>201</local-port>
+                <width>8</width>
+                <module>15</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>205</local-port>
+                <width>8</width>
+                <module>14</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>209</local-port>
+                <width>8</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>213</local-port>
+                <width>8</width>
+                <module>9</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>217</local-port>
+                <width>8</width>
+                <module>11</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>221</local-port>
+                <width>8</width>
+                <module>10</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>225</local-port>
+                <width>8</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>229</local-port>
+                <width>8</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>233</local-port>
+                <width>8</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>237</local-port>
+                <width>8</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>241</local-port>
+                <width>8</width>
+                <module>0</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>245</local-port>
+                <width>8</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>249</local-port>
+                <width>8</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>253</local-port>
+                <width>8</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>257</local-port>
+                <width>1</width>
+                <module>64</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>64</port-speed>
+            </port-info>
+        </ports-list>
+    </platform_info>
+</root>

From 2ed6e1734c0992c401debc8bfb81d5d77080f4c3 Mon Sep 17 00:00:00 2001
From: rameshraghupathy <43161235+rameshraghupathy@users.noreply.github.com>
Date: Thu, 19 Sep 2024 14:12:40 -0700
Subject: [PATCH 027/364] Smartswitch support for container checker and frr
 (#19729)

[Smartswitch] support for container checker and frr
---
 dockers/docker-fpm-frr/base_image_files/TSA    |  5 ++++-
 dockers/docker-fpm-frr/base_image_files/TSB    |  5 ++++-
 dockers/docker-fpm-frr/base_image_files/TSC    |  5 ++++-
 .../base_image_files/platform_utils            | 18 ++++++++++++++++++
 .../docker-pmon.supervisord.conf.j2            |  2 +-
 files/image_config/monit/container_checker     |  9 ++++++++-
 rules/config                                   |  8 ++++++++
 .../sonic_py_common/device_info.py             | 16 ++++++++++++++++
 8 files changed, 63 insertions(+), 5 deletions(-)
 create mode 100755 dockers/docker-fpm-frr/base_image_files/platform_utils

diff --git a/dockers/docker-fpm-frr/base_image_files/TSA b/dockers/docker-fpm-frr/base_image_files/TSA
index beeb86819f67..4f78cd58ce1c 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSA
+++ b/dockers/docker-fpm-frr/base_image_files/TSA
@@ -1,12 +1,15 @@
 #!/bin/bash
 
+# Source the platform_utils script
+source "$(dirname "$0")/platform_utils"
+
 # Restrict command to sudo users
 if [ "$EUID" -ne 0 ] ; then
   echo "Root priveleges are needed for this operation"
   exit 1
 fi
 
-if [ -f /etc/sonic/chassisdb.conf ]; then
+if [ -f /etc/sonic/chassisdb.conf ] && [ "$SMARTSWITCH" = false ] ; then
   CHASSIS_TSA_STATE_UPDATE="CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL\|STATE" tsa_enabled "true""
   CONFIG_DB_TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "true"}}}'
   current_tsa_state="$(sonic-cfggen -d -v BGP_DEVICE_GLOBAL.STATE.tsa_enabled)"
diff --git a/dockers/docker-fpm-frr/base_image_files/TSB b/dockers/docker-fpm-frr/base_image_files/TSB
index 36c69843b1b3..8c82796f18c1 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSB
+++ b/dockers/docker-fpm-frr/base_image_files/TSB
@@ -1,12 +1,15 @@
 #!/bin/bash
 
+# Source the platform_utils script
+source "$(dirname "$0")/platform_utils"
+
 # Restrict command to sudo users
 if [ "$EUID" -ne 0 ] ; then
   echo "Root priveleges are needed for this operation"
   exit 1
 fi
 
-if [ -f /etc/sonic/chassisdb.conf ]; then
+if [ -f /etc/sonic/chassisdb.conf ] && [ "$SMARTSWITCH" = false ] ; then
   CHASSIS_TSA_STATE_UPDATE="CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL\|STATE" tsa_enabled "false""
   CONFIG_DB_TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "false"}}}'
   current_tsa_state="$(sonic-cfggen -d -v BGP_DEVICE_GLOBAL.STATE.tsa_enabled)"
diff --git a/dockers/docker-fpm-frr/base_image_files/TSC b/dockers/docker-fpm-frr/base_image_files/TSC
index bcdd9d1872ae..ccb6c7d6ea21 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSC
+++ b/dockers/docker-fpm-frr/base_image_files/TSC
@@ -1,12 +1,15 @@
 #!/bin/bash
 
+# Source the platform_utils script
+source "$(dirname "$0")/platform_utils"
+
 # Restrict command to sudo users
 if [ "$EUID" -ne 0 ] ; then
   echo "Root priveleges are needed for this operation"
   exit 1
 fi
 
-if [ -f /etc/sonic/chassisdb.conf ]; then
+if [ -f /etc/sonic/chassisdb.conf ] && [ "$SMARTSWITCH" = false ] ; then
   if [[ $1 == "no-stats" ]]; then
     rexec all -c "sudo TSC no-stats"
   else
diff --git a/dockers/docker-fpm-frr/base_image_files/platform_utils b/dockers/docker-fpm-frr/base_image_files/platform_utils
new file mode 100755
index 000000000000..e4d8da76e95d
--- /dev/null
+++ b/dockers/docker-fpm-frr/base_image_files/platform_utils
@@ -0,0 +1,18 @@
+#!/bin/bash
+
+# platform_utils
+
+# Determine platform and is smartswitch
+PLATFORM="$(sonic-cfggen -d -v DEVICE_METADATA.localhost.platform)"
+SMARTSWITCH=false
+PLATFORM_JSON=/usr/share/sonic/device/$PLATFORM/platform.json
+
+if [ -f "$PLATFORM_JSON" ]; then
+    NUM_DPU=$(jq -r '.DPUS | length' $PLATFORM_JSON 2>/dev/null)
+    if [[ $NUM_DPU -gt 0 ]]; then
+        SMARTSWITCH=true
+    fi
+fi
+
+# Export SMARTSWITCH for other scripts
+export SMARTSWITCH
diff --git a/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2 b/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2
index 1cfd61ee8474..b023a8f2b0e7 100644
--- a/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2
+++ b/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2
@@ -28,7 +28,7 @@ stdout_logfile=syslog
 stderr_logfile=syslog
 dependent_startup=true
 
-{% if not skip_chassisd and IS_MODULAR_CHASSIS == 1 %}
+{% if not skip_chassisd and (IS_MODULAR_CHASSIS == 1 or is_smartswitch) %}
 [program:chassisd]
 command=/usr/local/bin/chassisd
 priority=3
diff --git a/files/image_config/monit/container_checker b/files/image_config/monit/container_checker
index f4e4995060c8..58f5aa75cf94 100755
--- a/files/image_config/monit/container_checker
+++ b/files/image_config/monit/container_checker
@@ -109,8 +109,15 @@ def get_expected_running_containers():
             else:
                 always_running_containers.add(container_name)
 
-    if device_info.is_supervisor():
+    if device_info.is_supervisor() or device_info.is_smartswitch():
         always_running_containers.add("database-chassis")
+
+    if device_info.is_smartswitch():
+        raw_dpustable = config_db.get_table("DPUS")
+        for dpu_name in raw_dpustable:
+            container_name = f"databasedpu{dpu_name.replace('dpu', '')}"
+            always_running_containers.add(container_name)
+
     return expected_running_containers, always_running_containers
 
 def get_current_running_from_DB(always_running_containers):
diff --git a/rules/config b/rules/config
index d2ddcb704fbe..8229160b0d78 100644
--- a/rules/config
+++ b/rules/config
@@ -42,6 +42,9 @@ DEFAULT_BUILD_LOG_TIMESTAMP = none
 # CHANGE_DEFAULT_PASSWORD - enforce default user/users to change password on 1st login
 CHANGE_DEFAULT_PASSWORD ?= n
 
+# Default value for SMARTSWITCH
+SMARTSWITCH ?= 0
+
 # DEFAULT_USERNAME - default username for installer build
 DEFAULT_USERNAME = admin
 
@@ -152,6 +155,11 @@ INCLUDE_DHCP_RELAY = y
 # INCLUDE_DHCP_SERVER - build and install dhcp-server package
 INCLUDE_DHCP_SERVER ?= n
 
+# Conditionally enable DHCP_SERVER when SMARTSWITCH is set to 1
+ifeq ($(SMARTSWITCH), 1)
+    INCLUDE_DHCP_SERVER = y
+endif
+
 # INCLUDE_P4RT - build docker-p4rt for P4RT support
 INCLUDE_P4RT = n
 
diff --git a/src/sonic-py-common/sonic_py_common/device_info.py b/src/sonic-py-common/sonic_py_common/device_info.py
index a5f982130484..75e8dcb5761a 100644
--- a/src/sonic-py-common/sonic_py_common/device_info.py
+++ b/src/sonic-py-common/sonic_py_common/device_info.py
@@ -576,6 +576,22 @@ def is_chassis():
     return is_voq_chassis() or is_packet_chassis()
 
 
+def is_smartswitch():
+    # Get platform
+    platform = get_platform()
+    if not platform:
+        return False
+
+    # get platform.json file path
+    platform_json = os.path.join(HOST_DEVICE_PATH, platform, "platform.json")
+    try:
+        with open(platform_json, 'r') as f:
+            platform_cfg = json.loads(f.read())
+            return "DPUS" in platform_cfg
+    except IOError:
+        return False
+
+
 def is_supervisor():
     platform_env_conf_file_path = get_platform_env_conf_file_path()
     if platform_env_conf_file_path is None:

From e1069096beb4aa8658d6fd08463459b7144e6f2c Mon Sep 17 00:00:00 2001
From: Feng-msft <fenpan@microsoft.com>
Date: Fri, 20 Sep 2024 07:26:17 +0800
Subject: [PATCH 028/364] Add bmpcfgd for monitoring config_db state change.
 (#18940)

#### Why I did it
https://github.com/sonic-net/SONiC/pull/1621, need dedicated daemon to monitor config_db and manage openbmpd state.
#### How I did it
Use swss-common lib to monitor config_db change.
---
 src/sonic-bmpcfgd/__init__.py                 |   0
 .../sonic-services-data.bmpcfgd.service       |  14 ++
 src/sonic-bmpcfgd/scripts/bmpcfgd             | 111 ++++++++++++
 src/sonic-bmpcfgd/setup.cfg                   |   5 +
 src/sonic-bmpcfgd/setup.py                    |  75 ++++++++
 src/sonic-bmpcfgd/tests/__init__.py           |   0
 src/sonic-bmpcfgd/tests/bmpcfgd_test.py       | 116 +++++++++++++
 .../tests/common/mock_configdb.py             | 162 ++++++++++++++++++
 src/sonic-bmpcfgd/tests/mock_connector.py     |  39 +++++
 9 files changed, 522 insertions(+)
 create mode 100644 src/sonic-bmpcfgd/__init__.py
 create mode 100644 src/sonic-bmpcfgd/data/debian/sonic-services-data.bmpcfgd.service
 create mode 100644 src/sonic-bmpcfgd/scripts/bmpcfgd
 create mode 100644 src/sonic-bmpcfgd/setup.cfg
 create mode 100644 src/sonic-bmpcfgd/setup.py
 create mode 100644 src/sonic-bmpcfgd/tests/__init__.py
 create mode 100644 src/sonic-bmpcfgd/tests/bmpcfgd_test.py
 create mode 100644 src/sonic-bmpcfgd/tests/common/mock_configdb.py
 create mode 100644 src/sonic-bmpcfgd/tests/mock_connector.py

diff --git a/src/sonic-bmpcfgd/__init__.py b/src/sonic-bmpcfgd/__init__.py
new file mode 100644
index 000000000000..e69de29bb2d1
diff --git a/src/sonic-bmpcfgd/data/debian/sonic-services-data.bmpcfgd.service b/src/sonic-bmpcfgd/data/debian/sonic-services-data.bmpcfgd.service
new file mode 100644
index 000000000000..0a16edf77fe1
--- /dev/null
+++ b/src/sonic-bmpcfgd/data/debian/sonic-services-data.bmpcfgd.service
@@ -0,0 +1,14 @@
+[Unit]
+Description=Process which monitors config_db and manage openbmpd daemon
+Requires=database.service config-setup.service
+After=database.service config-setup.service
+BindsTo=sonic.target
+After=sonic.target
+
+[Service]
+Type=simple
+ExecStart=/usr/local/bin/bmpcfgd
+Restart=always
+
+[Install]
+WantedBy=sonic.target
diff --git a/src/sonic-bmpcfgd/scripts/bmpcfgd b/src/sonic-bmpcfgd/scripts/bmpcfgd
new file mode 100644
index 000000000000..448ca5b24617
--- /dev/null
+++ b/src/sonic-bmpcfgd/scripts/bmpcfgd
@@ -0,0 +1,111 @@
+#!/usr/bin/env python3
+'''
+bmpcfgd
+Daemon which monitors bmp relevant table enablement from CONFIG_DB, and reset BMP states
+'''
+
+import os
+import sys
+import subprocess
+import syslog
+import signal
+from shutil import copy2
+from datetime import datetime
+from sonic_py_common import device_info
+from sonic_py_common.general import check_output_pipe
+from swsscommon.swsscommon import ConfigDBConnector, DBConnector, Table
+from swsscommon import swsscommon
+from sonic_py_common.daemon_base import DaemonBase
+
+CFG_DB = "CONFIG_DB"
+BMP_STATE_DB = "BMP_STATE_DB"
+REDIS_HOSTIP = "127.0.0.1"
+BMP_TABLE = "BMP"
+
+def is_true(val):
+    return str(val).lower() == 'true'
+
+class BMPCfg(DaemonBase):
+    def __init__(self, state_db_conn):
+        DaemonBase.__init__(self, SYSLOG_IDENTIFIER)
+        self.bgp_neighbor_table  = False
+        self.bgp_rib_in_table  = False
+        self.bgp_rib_out_table  = False
+        self.state_db_conn = state_db_conn
+
+
+    def load(self, data={}):
+        common_config = data.get('table', {})
+
+        self.bgp_neighbor_table = is_true(common_config.get('bgp_neighbor_table', 'false'))
+        self.bgp_rib_in_table = is_true(common_config.get('bgp_rib_in_table', 'false'))
+        self.bgp_rib_out_table = is_true(common_config.get('bgp_rib_out_table', 'false'))
+        self.log_info(f'BMPCfg: update : {self.bgp_neighbor_table}, {self.bgp_rib_in_table}, {self.bgp_rib_out_table}')
+
+        # reset bmp table state once config is changed.
+        self.stop_bmp()
+        self.reset_bmp_table()
+        self.start_bmp()
+
+
+    def cfg_handler(self, data):
+        self.load(data)
+
+
+    def stop_bmp(self):
+        self.log_info('BMPCfg: stop bmp daemon')
+        subprocess.call(["service", "openbmpd", "stop"])
+
+
+    def reset_bmp_table(self):
+        self.log_info('BMPCfg: Reset bmp table from state_db')
+        self.state_db_conn.delete_all_by_pattern(BMP_STATE_DB, 'BGP_NEIGHBOR*')
+        self.state_db_conn.delete_all_by_pattern(BMP_STATE_DB, 'BGP_RIB_IN_TABLE*')
+        self.state_db_conn.delete_all_by_pattern(BMP_STATE_DB, 'BGP_RIB_OUT_TABLE*')
+
+
+    def start_bmp(self):
+        self.log_info('BMPCfg: start bmp daemon')
+        subprocess.call(["service", "openbmpd", "start"])
+
+
+class BMPCfgDaemon:
+    def __init__(self):
+        self.state_db_conn = swsscommon.SonicV2Connector(host=REDIS_HOSTIP)
+        self.state_db_conn.connect(BMP_STATE_DB)
+        self.config_db = ConfigDBConnector()
+        self.config_db.connect(wait_for_init=True, retry_on=True)
+        self.bmpcfg = BMPCfg(self.state_db_conn)
+
+    def bmp_handler(self, key, op, data):
+        data = self.config_db.get_table(BMP_TABLE)
+        self.bmpcfg.cfg_handler(data)
+
+    def register_callbacks(self):
+        self.config_db.subscribe(BMP_TABLE,
+                                 lambda table, key, data:
+                                     self.bmp_handler(key, op, data))
+
+def signal_handler(sig, frame):
+    if sig == signal.SIGHUP:
+        self.log_info("bmpcfgd: signal 'SIGHUP' is caught and ignoring..")
+    elif sig == signal.SIGINT:
+        self.log_info("bmpcfgd: signal 'SIGINT' is caught and exiting...")
+        sys.exit(128 + sig)
+    elif sig == signal.SIGTERM:
+        self.log_info("bmpcfgd: signal 'SIGTERM' is caught and exiting...")
+        sys.exit(128 + sig)
+    else:
+        self.log_info("bmpcfgd: invalid signal - ignoring..")
+
+
+def main():
+    signal.signal(signal.SIGTERM, signal_handler)
+    signal.signal(signal.SIGINT, signal_handler)
+    signal.signal(signal.SIGHUP, signal_handler)
+    daemon = BMPCfgDaemon()
+    daemon.register_callbacks()
+
+
+if __name__ == "__main__":
+    main()
diff --git a/src/sonic-bmpcfgd/setup.cfg b/src/sonic-bmpcfgd/setup.cfg
new file mode 100644
index 000000000000..1ce2f2f07257
--- /dev/null
+++ b/src/sonic-bmpcfgd/setup.cfg
@@ -0,0 +1,5 @@
+[aliases]
+test=pytest
+[tool:pytest]
+addopts = --verbose
+python_files = tests/*.py
\ No newline at end of file
diff --git a/src/sonic-bmpcfgd/setup.py b/src/sonic-bmpcfgd/setup.py
new file mode 100644
index 000000000000..33c3fd9803e7
--- /dev/null
+++ b/src/sonic-bmpcfgd/setup.py
@@ -0,0 +1,75 @@
+from __future__ import print_function
+import sys
+from setuptools import setup
+import pkg_resources
+from packaging import version
+
+# sonic_dependencies, version requirement only supports '>='
+sonic_dependencies = ['sonic-py-common', 'sonic-utilities']
+for package in sonic_dependencies:
+    try:
+        package_dist = pkg_resources.get_distribution(package.split(">=")[0])
+    except pkg_resources.DistributionNotFound:
+        print(package + " is not found!", file=sys.stderr)
+        print("Please build and install SONiC python wheels dependencies from sonic-buildimage", file=sys.stderr)
+        exit(1)
+    if ">=" in package:
+        if version.parse(package_dist.version) >= version.parse(package.split(">=")[1]):
+            continue
+        print(package + " version not match!", file=sys.stderr)
+        exit(1)
+
+setup(
+    name = 'sonic-bmpcfgd-services',
+    version = '1.0',
+    description = 'Python services which run in the bmp container',
+    license = 'Apache 2.0',
+    author = 'SONiC Team',
+    author_email = 'linuxnetdev@microsoft.com',
+    url = 'https://github.com/Azure/sonic-buildimage',
+    maintainer = 'Feng Pan',
+    maintainer_email = 'fenpan@microsoft.com',
+    packages = setuptools.find_packages(),
+    scripts = [
+        'scripts/bmpcfgd'
+    ],
+    install_requires = [
+        'jinja2>=2.10',
+        'netaddr==0.8.0',
+        'pyyaml==6.0.1',
+        'ipaddress==1.0.23'
+    ] + sonic_dependencies,
+    setup_requires = [
+        'pytest-runner',
+        'wheel'
+    ],
+    tests_require = [
+        'parameterized',
+        'pytest',
+        'pyfakefs',
+        'sonic-py-common',
+        'pytest-cov'
+    ],
+    extras_require = {
+        "testing": [
+            'parameterized',
+            'pytest',
+            'pyfakefs',
+            'sonic-py-common'
+        ]
+    },
+    classifiers = [
+        'Development Status :: 3 - Alpha',
+        'Environment :: Console',
+        'Intended Audience :: Developers',
+        'Intended Audience :: Information Technology',
+        'Intended Audience :: System Administrators',
+        'License :: OSI Approved :: Apache Software License',
+        'Natural Language :: English',
+        'Operating System :: POSIX :: Linux',
+        'Programming Language :: Python :: 3.7',
+        'Topic :: System',
+    ],
+    keywords = 'sonic SONiC bmp services',
+    test_suite = 'setup.get_test_suite'
+)
diff --git a/src/sonic-bmpcfgd/tests/__init__.py b/src/sonic-bmpcfgd/tests/__init__.py
new file mode 100644
index 000000000000..e69de29bb2d1
diff --git a/src/sonic-bmpcfgd/tests/bmpcfgd_test.py b/src/sonic-bmpcfgd/tests/bmpcfgd_test.py
new file mode 100644
index 000000000000..a6abc6c3b703
--- /dev/null
+++ b/src/sonic-bmpcfgd/tests/bmpcfgd_test.py
@@ -0,0 +1,116 @@
+import importlib.machinery
+import importlib.util
+import filecmp
+import json
+import shutil
+import os
+import sys
+import signal
+from swsscommon import swsscommon
+
+from parameterized import parameterized
+from unittest import TestCase, mock
+from tests.common.mock_configdb import MockConfigDb, MockDBConnector
+from tests.common.mock_bootloader import MockBootloader
+from sonic_py_common.general import getstatusoutput_noshell
+from .mock_connector import MockConnector
+from sonic_py_common.general import load_module_from_source
+from mock import patch
+
+test_path = os.path.dirname(os.path.abspath(__file__))
+modules_path = os.path.dirname(test_path)
+scripts_path = os.path.join(modules_path, "scripts")
+sys.path.insert(0, modules_path)
+
+# Load the file under test
+bmpcfgd_path = os.path.join(scripts_path, 'bmpcfgd')
+bmpcfgd = load_module_from_source('bmpcfgd', bmpcfgd_path)
+
+
+from bmpcfgd import signal_handler
+
+original_syslog = bmpcfgd.syslog
+
+# Mock swsscommon classes
+bmpcfgd.ConfigDBConnector = MockConfigDb
+bmpcfgd.DBConnector = MockDBConnector
+bmpcfgd.Table = mock.Mock()
+swsscommon.SonicV2Connector = MockConnector
+
+class TestBMPCfgDaemon(TestCase):
+    """
+        Test bmpcfgd daemon
+    """
+    def setUp(self):
+        self.test_data = {}
+        self.test_data['BMP'] = {}
+        self.test_data['BMP']['table'] = {'bgp_neighbor_table': 'false', 'bgp_rib_in_table': 'false', 'bgp_rib_out_table': 'false'}
+
+    @mock.patch('sonic_installer.bootloader.get_bootloader', side_effect=[MockBootloader()])
+    @mock.patch('syslog.syslog')
+    @mock.patch('subprocess.call')
+    def test_bmpcfgd_neighbor_enable(self, mock_check_call, mock_syslog, mock_get_bootloader):
+        self.test_data['BMP']['table']['bgp_neighbor_table'] = 'true'
+        MockConfigDb.set_config_db(self.test_data)
+        bmp_config_daemon = bmpcfgd.BMPCfgDaemon()
+        bmp_config_daemon.register_callbacks()
+        bmp_config_daemon.bmp_handler("BMP", '', self.test_data)
+        expected_calls = [
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: update : True, False, False'),
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: stop bmp daemon'),
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: Reset bmp table from state_db'),
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: start bmp daemon'),
+        ]
+        mock_syslog.assert_has_calls(expected_calls)
+
+    @mock.patch('sonic_installer.bootloader.get_bootloader', side_effect=[MockBootloader()])
+    @mock.patch('syslog.syslog')
+    @mock.patch('subprocess.check_call')
+    def test_bmpcfgd_bgp_rib_in_enable(self, mock_check_call, mock_syslog, mock_get_bootloader):
+        self.test_data['BMP']['table']['bgp_rib_in_table'] = 'true'
+        MockConfigDb.set_config_db(self.test_data)
+        bmp_config_daemon = bmpcfgd.BMPCfgDaemon()
+        bmp_config_daemon.bmp_handler("BMP", '', self.test_data)
+        expected_calls = [
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: update : False, True, False'),
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: stop bmp daemon'),
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: Reset bmp table from state_db'),
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: start bmp daemon'),
+        ]
+        mock_syslog.assert_has_calls(expected_calls)
+
+    @mock.patch('sonic_installer.bootloader.get_bootloader', side_effect=[MockBootloader()])
+    @mock.patch('syslog.syslog')
+    @mock.patch('subprocess.check_call')
+    def test_bmpcfgd_bgp_rib_out_enable(self, mock_check_call, mock_syslog, mock_get_bootloader):
+        self.test_data['BMP']['table']['bgp_rib_out_table'] = 'true'
+        MockConfigDb.set_config_db(self.test_data)
+        bmp_config_daemon = bmpcfgd.BMPCfgDaemon()
+        bmp_config_daemon.bmp_handler("BMP", '', self.test_data)
+        expected_calls = [
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: update : False, False, True'),
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: stop bmp daemon'),
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: Reset bmp table from state_db'),
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: start bmp daemon'),
+        ]
+        mock_syslog.assert_has_calls(expected_calls)
+
+
+    @mock.patch('syslog.syslog')
+    @mock.patch.object(sys, 'exit')
+    def test_signal_handler(self, mock_exit, mock_syslog):
+        # Test SIGHUP signal
+        signal_handler(signal.SIGHUP, None)
+        mock_syslog.assert_called_with(original_syslog.LOG_INFO, "bmpcfgd: signal 'SIGHUP' is caught and ignoring..")
+        mock_exit.assert_not_called()
+        # Test SIGINT signal
+        signal_handler(signal.SIGINT, None)
+        mock_syslog.assert_called_with(original_syslog.LOG_INFO, "bmpcfgd: signal 'SIGINT' is caught and exiting...")
+        mock_exit.assert_called_once_with(128 + signal.SIGINT)
+        # Test SIGTERM signal
+        signal_handler(signal.SIGTERM, None)
+        mock_syslog.assert_called_with(original_syslog.LOG_INFO, "bmpcfgd: signal 'SIGTERM' is caught and exiting...")
+        mock_exit.assert_called_with(128 + signal.SIGTERM)
+        # Test invalid signal
+        signal_handler(999, None)
+        mock_syslog.assert_called_with(original_syslog.LOG_INFO, "bmpcfgd: invalid signal - ignoring..")
diff --git a/src/sonic-bmpcfgd/tests/common/mock_configdb.py b/src/sonic-bmpcfgd/tests/common/mock_configdb.py
new file mode 100644
index 000000000000..d6c3c055bc57
--- /dev/null
+++ b/src/sonic-bmpcfgd/tests/common/mock_configdb.py
@@ -0,0 +1,162 @@
+class MockConfigDb(object):
+    """
+        Mock Config DB which responds to data tables requests and store updates to the data table
+    """
+    STATE_DB = None
+    CONFIG_DB = None
+    event_queue = []
+
+    def __init__(self, **kwargs):
+        self.handlers = {}
+
+    @staticmethod
+    def set_config_db(test_config_db):
+        MockConfigDb.CONFIG_DB = test_config_db
+
+    @staticmethod
+    def mod_config_db(test_config_db):
+        MockConfigDb.CONFIG_DB.update(test_config_db)
+
+    @staticmethod
+    def deserialize_key(key, separator="|"):
+        tokens = key.split(separator)
+        if len(tokens) > 1:
+            return tuple(tokens)
+        else:
+            return key
+
+    @staticmethod
+    def get_config_db():
+        return MockConfigDb.CONFIG_DB
+
+    def connect(self, wait_for_init=True, retry_on=True):
+        pass
+
+    def close(self, db_name):
+        pass
+
+    def get(self, db_id, key, field):
+        return MockConfigDb.CONFIG_DB[key][field]
+
+    def get_entry(self, key, field):
+        return MockConfigDb.CONFIG_DB[key][field]
+
+    def mod_entry(self, key, field, data):
+        existing_data = self.get_entry(key, field)
+        existing_data.update(data)
+        self.set_entry(key, field, existing_data)
+
+    def set_entry(self, key, field, data):
+        MockConfigDb.CONFIG_DB[key][field] = data
+
+    def get_table(self, table_name):
+        data = {}
+        if table_name in MockConfigDb.CONFIG_DB:
+            for k, v in MockConfigDb.CONFIG_DB[table_name].items():
+                data[self.deserialize_key(k)] = v
+        return data
+
+    def subscribe(self, table_name, callback):
+        self.handlers[table_name] = callback
+
+    def publish(self, table_name, key, op, data):
+        self.handlers[table_name](key, op, data)
+
+    def listen(self, init_data_handler=None):
+        for e in MockConfigDb.event_queue:
+            self.handlers[e[0]](e[0], e[1], self.get_entry(e[0], e[1]))
+
+
+class MockSelect():
+
+    event_queue = []
+    OBJECT = "OBJECT"
+    TIMEOUT = "TIMEOUT"
+    ERROR = ""
+    NUM_TIMEOUT_TRIES = 0
+
+    @staticmethod
+    def set_event_queue(Q):
+        MockSelect.event_queue = Q
+
+    @staticmethod
+    def get_event_queue():
+        return MockSelect.event_queue
+
+    @staticmethod
+    def reset_event_queue():
+        MockSelect.event_queue = []
+
+    def __init__(self):
+        self.sub_map = {}
+        self.TIMEOUT = "TIMEOUT"
+        self.ERROR = "ERROR"
+
+    def addSelectable(self, subscriber):
+        self.sub_map[subscriber.table] = subscriber
+
+    def select(self, TIMEOUT):
+        if not MockSelect.get_event_queue() and MockSelect.NUM_TIMEOUT_TRIES == 0:
+            raise TimeoutError
+        elif MockSelect.NUM_TIMEOUT_TRIES != 0:
+            MockSelect.NUM_TIMEOUT_TRIES = MockSelect.NUM_TIMEOUT_TRIES - 1
+            return MockSelect.TIMEOUT, 0
+        
+        table, key = MockSelect.get_event_queue().pop(0)
+        self.sub_map[table].nextKey(key)
+        return "OBJECT", self.sub_map[table]
+
+
+class MockSubscriberStateTable():
+
+    FD_INIT = 0
+
+    @staticmethod
+    def generate_fd():
+        curr = MockSubscriberStateTable.FD_INIT
+        MockSubscriberStateTable.FD_INIT = curr + 1
+        return curr
+
+    @staticmethod
+    def reset_fd():
+        MockSubscriberStateTable.FD_INIT = 0
+
+    def __init__(self, conn, table, pop=None, pri=None):
+        self.fd = MockSubscriberStateTable.generate_fd()
+        self.next_key = ''
+        self.table = table
+
+    def getFd(self):
+        return self.fd
+
+    def nextKey(self, key):
+        print("next key")
+        self.next_key = key
+
+    def pop(self):
+        table = MockConfigDb.CONFIG_DB.get(self.table, {})
+        print(self.next_key)
+        if self.next_key not in table:
+            op = "DEL"
+            fvs = {}
+        else:
+            op = "SET"
+            fvs = table.get(self.next_key, {})
+        return self.next_key, op, fvs
+
+
+class MockDBConnector():
+    def __init__(self, db, val, tcpFlag=False, name=None):
+        self.data = {}
+
+    def hget(self, key, field):
+        if key not in self.data:
+            return None
+        if field not in self.data[key]:
+            return None
+        return self.data[key][field]
+
+    def hset(self, key, field, value):
+        if key not in self.data:
+            self.data[key] = {}
+        self.data[key][field] = value
diff --git a/src/sonic-bmpcfgd/tests/mock_connector.py b/src/sonic-bmpcfgd/tests/mock_connector.py
new file mode 100644
index 000000000000..71490796c823
--- /dev/null
+++ b/src/sonic-bmpcfgd/tests/mock_connector.py
@@ -0,0 +1,39 @@
+class MockConnector(object):
+    STATE_DB = None
+    data = {}
+
+    def __init__(self, host):
+        pass
+
+    def connect(self, db_id):
+        pass
+
+    def get(self, db_id, key, field):
+        return MockConnector.data[key][field]
+
+    def set(self, db_id, key, field, value):
+        if key not in MockConnector.data:
+            MockConnector.data[key] = {}
+        MockConnector.data[key][field] = value
+
+    def keys(self, db_id, pattern):
+        match = pattern.split('*')[0]
+        ret = []
+        for key in MockConnector.data.keys():
+            if match in key:
+                ret.append(key)
+
+        return ret
+
+    def get_all(self, db_id, key):
+        return MockConnector.data[key]
+
+    def delete(self, db_id, key):
+        return MockConnector.data.delete(key)
+
+    def delete_all_by_pattern(self, db_id, pattern):
+        keys = self.keys(db_id, pattern)
+        for key in keys:
+            self.delete(db_id, key)
+
+

From 75e4bbef8bc9468397c30dd6f2b2cbe5535ad979 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 20 Sep 2024 19:01:31 +0800
Subject: [PATCH 029/364] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#20309)

#### Why I did it
src/sonic-platform-daemons
```
* 2c39785 - (HEAD -> master, origin/master, origin/HEAD) [xcvrd] Add logs to improve debugging in xcvrd (#539) (4 hours ago) [mihirpat1]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index f581c06cd8ad..2c39785a8d82 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit f581c06cd8adeb4b82816ee0fc38fd07b3f9e692
+Subproject commit 2c39785a8d82a57429b1bc5b3b544751ca18aa88

From e598de678096668ec6e75969ee08cbf277812ed6 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 20 Sep 2024 19:01:40 +0800
Subject: [PATCH 030/364] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20290)

#### Why I did it
src/sonic-utilities
```
* 867fc540 - (HEAD -> master, origin/master, origin/HEAD) [DASH] Add support for ENI counters (#3496) (28 hours ago) [Vivek]
* b4d27c4b - Fix multi-asic behaviour for watermarkstat (#3060) (2 days ago) [bktsim]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index ed624895f218..867fc5400e7c 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit ed624895f218b5c81fabc0c4655b317374e246d7
+Subproject commit 867fc5400e7c53e068bf61e7c4c9e33b54a3fea3

From 50ddacb382ea89a9ddecd11e11cf9a8ab75f40ba Mon Sep 17 00:00:00 2001
From: Gagan Punathil Ellath <gpunathilell@nvidia.com>
Date: Fri, 20 Sep 2024 11:10:48 -0700
Subject: [PATCH 031/364] [SmartSwitch] Yang model change for bridge midplane
 (#19819)

- Why I did it
The yang model for bridge-midplane is not aligned with the actual implementation present in #18178,
This PR is to align the yang model to change bridge_midplane to bridge-midplane since this is the value used in the systemd-networkd in CONFIG_DB so that the yang validation does not fail

- How I did it

- How to verify it
Enhance unit test
---
 .../dhcp_utilities/dhcpservd/dhcp_cfggen.py        |  2 +-
 .../tests/test_data/dhcp_db_monitor_test_data.json |  4 ++--
 .../test_data/mock_config_db_smart_switch.json     | 12 ++++++------
 src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py |  4 ++--
 .../tests/test_dhcp_db_monitor.py                  |  2 +-
 .../tests/test_smart_switch.py                     | 10 +++++-----
 src/sonic-yang-models/doc/Configuration.md         |  2 +-
 .../tests/files/sample_config_db.json              |  2 +-
 .../tests/yang_model_pytests/test_smart_switch.py  |  8 ++++----
 .../tests_config/dhcp_server_ipv4.json             | 14 +++++++-------
 .../yang-models/sonic-smart-switch.yang            |  2 +-
 11 files changed, 31 insertions(+), 31 deletions(-)

diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
index c41e61d5f9f8..53eab7b20aec 100755
--- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
@@ -107,7 +107,7 @@ def _parse_dpu(self, dpus_table, mid_plane_table):
         Returns:
             Parsed obj, sample:
                 mid_plane = {
-                    "bridge": "bridge_midplane",
+                    "bridge": "bridge-midplane",
                     "address": "169.254.200.254/24"
                 }
                 dpus = {
diff --git a/src/sonic-dhcp-utilities/tests/test_data/dhcp_db_monitor_test_data.json b/src/sonic-dhcp-utilities/tests/test_data/dhcp_db_monitor_test_data.json
index da422685a017..c22cc6f24eff 100644
--- a/src/sonic-dhcp-utilities/tests/test_data/dhcp_db_monitor_test_data.json
+++ b/src/sonic-dhcp-utilities/tests/test_data/dhcp_db_monitor_test_data.json
@@ -293,13 +293,13 @@
     "test_mid_plane_update": [
         {
             "table": [
-                ["GLOBAL", "SET", [["bridge", "bridge_midplane"], ["ip_prefix", "169.254.200.254/24"]]]
+                ["GLOBAL", "SET", [["bridge", "bridge-midplane"], ["ip_prefix", "169.254.200.254/24"]]]
             ],
             "exp_res": true
         },
         {
             "table": [
-                ["GLOBAL", "SET", [["bridge", "bridge_midplane2"], ["ip_prefix", "169.254.200.254/24"]]]
+                ["GLOBAL", "SET", [["bridge", "bridge-midplane2"], ["ip_prefix", "169.254.200.254/24"]]]
             ],
             "exp_res": false
         },
diff --git a/src/sonic-dhcp-utilities/tests/test_data/mock_config_db_smart_switch.json b/src/sonic-dhcp-utilities/tests/test_data/mock_config_db_smart_switch.json
index 06c3050a28af..c30716de7823 100644
--- a/src/sonic-dhcp-utilities/tests/test_data/mock_config_db_smart_switch.json
+++ b/src/sonic-dhcp-utilities/tests/test_data/mock_config_db_smart_switch.json
@@ -7,12 +7,12 @@
     },
     "MID_PLANE_BRIDGE": {
         "GLOBAL": {
-            "bridge": "bridge_midplane",
+            "bridge": "bridge-midplane",
             "ip_prefix": "169.254.200.254/24"
         }
     },
     "DHCP_SERVER_IPV4": {
-        "bridge_midplane": {
+        "bridge-midplane": {
             "customized_options": [
                 "option60",
                 "option223"
@@ -25,22 +25,22 @@
         }
     },
     "DHCP_SERVER_IPV4_PORT": {
-        "bridge_midplane|dpu0": {
+        "bridge-midplane|dpu0": {
             "ips": [
                 "169.254.200.1"
             ]
         },
-        "bridge_midplane|dpu1": {
+        "bridge-midplane|dpu1": {
             "ips": [
                 "169.254.200.2"
             ]
         },
-        "bridge_midplane|dpu2": {
+        "bridge-midplane|dpu2": {
             "ips": [
                 "169.254.200.3"
             ]
         },
-        "bridge_midplane|dpu3": {
+        "bridge-midplane|dpu3": {
             "ips": [
                 "169.254.200.4"
             ]
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
index 3548e39c1435..4e8b0504b01c 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
@@ -416,7 +416,7 @@ def test_parse_dpus(mock_swsscommon_dbconnector_init, mock_get_render_template,
     dhcp_db_connector = DhcpDbConnector()
     dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector, "/usr/local/lib/kea/hooks/libdhcp_run_script.so")
     dpus_table = {"dpu0": {"midplane_interface": "dpu0"}}
-    mid_plane_table = {"GLOBAL": {"bridge": "bridge_midplane", "ip_prefix": "169.254.200.254/24"}}
+    mid_plane_table = {"GLOBAL": {"bridge": "bridge-midplane", "ip_prefix": "169.254.200.254/24"}}
     mid_plane, dpus = dhcp_cfg_generator._parse_dpu(dpus_table, mid_plane_table)
-    assert mid_plane == {"bridge": "bridge_midplane", "ip_prefix": "169.254.200.254/24"}
+    assert mid_plane == {"bridge": "bridge-midplane", "ip_prefix": "169.254.200.254/24"}
     assert dpus == set(["dpu0"])
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py b/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py
index 4352ee60f7a7..86c34663b485 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py
@@ -369,7 +369,7 @@ def test_feature_table_checker(mock_swsscommon_dbconnector_init, tested_data, te
             assert expected_res == check_res
 
 
-@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": {"bridge_midplane"}}, {}])
+@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": {"bridge-midplane"}}, {}])
 @pytest.mark.parametrize("tested_data", get_subscribe_table_tested_data("test_mid_plane_update"))
 def test_mid_plane_table_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot):
     with patch.object(ConfigDbEventChecker, "enable"), \
diff --git a/src/sonic-dhcp-utilities/tests/test_smart_switch.py b/src/sonic-dhcp-utilities/tests/test_smart_switch.py
index a5c6be2fd273..239cc00bacea 100644
--- a/src/sonic-dhcp-utilities/tests/test_smart_switch.py
+++ b/src/sonic-dhcp-utilities/tests/test_smart_switch.py
@@ -106,22 +106,22 @@
 
 
 expected_lease = {
-    'bridge_midplane|aa:bb:cc:dd:ff:01': {
+    'bridge-midplane|aa:bb:cc:dd:ff:01': {
         'ip': '169.254.200.1',
         'lease_end': '1718053209',
         'lease_start': '1718052309'
     },
-    'bridge_midplane|aa:bb:cc:dd:ff:02': {
+    'bridge-midplane|aa:bb:cc:dd:ff:02': {
         'ip': '169.254.200.2',
         'lease_end': '1718053210',
         'lease_start': '1718052310'
     },
-    'bridge_midplane|aa:bb:cc:dd:ff:03': {
+    'bridge-midplane|aa:bb:cc:dd:ff:03': {
         'ip': '169.254.200.3',
         'lease_end': '1718053210',
         'lease_start': '1718052310'
     },
-   'bridge_midplane|aa:bb:cc:dd:ff:04': {
+   'bridge-midplane|aa:bb:cc:dd:ff:04': {
        'ip': '169.254.200.4',
        'lease_end': '1718053209',
        'lease_start': '1718052309'
@@ -154,7 +154,7 @@ def test_dhcp_dhcp_cfggen_generate(mock_swsscommon_dbconnector_init, mock_parse_
             dhcp_cfg_generator.generate()
         assert json.loads(kea_dhcp4_config) == expected_kea_config
         assert used_ranges == set()
-        assert enabled_dhcp_interfaces == set(["bridge_midplane"])
+        assert enabled_dhcp_interfaces == set(["bridge-midplane"])
         assert used_options == set(["option60", "option223"])
         expected_tables = set(["DpusTableEventChecker", "MidPlaneTableEventChecker", "VlanTableEventChecker",
                                "VlanIntfTableEventChecker", "DhcpRangeTableEventChecker", "VlanMemberTableEventChecker",
diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index 06ee8d26a8dc..4d264417d509 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -2871,7 +2871,7 @@ The MID_PLANE_BRIDGE" table introduces the configuration for the midplane bridge
 {
     "MID_PLANE_BRIDGE": {
         "GLOBAL" : {
-            "bridge": "bridge_midplane",
+            "bridge": "bridge-midplane",
             "ip_prefix": "169.254.200.254/24"
         }
     }
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index e48260714361..1ed8940f826c 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -2691,7 +2691,7 @@
         },
         "MID_PLANE_BRIDGE": {
             "GLOBAL" : {
-                "bridge": "bridge_midplane",
+                "bridge": "bridge-midplane",
                 "ip_prefix": "169.254.200.254/24"
             }
         },
diff --git a/src/sonic-yang-models/tests/yang_model_pytests/test_smart_switch.py b/src/sonic-yang-models/tests/yang_model_pytests/test_smart_switch.py
index ccd0f312e676..f1242719c028 100644
--- a/src/sonic-yang-models/tests/yang_model_pytests/test_smart_switch.py
+++ b/src/sonic-yang-models/tests/yang_model_pytests/test_smart_switch.py
@@ -8,7 +8,7 @@ def test_valid_data(self, yang_model):
             "sonic-smart-switch:sonic-smart-switch": {
                 "sonic-smart-switch:MID_PLANE_BRIDGE": {
                     "GLOBAL": {
-                        "bridge": "bridge_midplane",
+                        "bridge": "bridge-midplane",
                         "ip_prefix": "169.254.200.254/24"
                     }
                 },
@@ -31,8 +31,8 @@ def test_valid_data(self, yang_model):
 
     @pytest.mark.parametrize(
         "bridge_name, error_message", [
-            ("bridge_midplane", None),
-            ("wrong_name", 'Value "wrong_name" does not satisfy the constraint "bridge_midplane"')]
+            ("bridge-midplane", None),
+            ("wrong_name", 'Value "wrong_name" does not satisfy the constraint "bridge-midplane"')]
         )
     def test_bridge_name(self, yang_model, bridge_name, error_message):
         data = {
@@ -58,7 +58,7 @@ def test_bridge_ip_prefix(self, yang_model, ip_prefix, error_message):
             "sonic-smart-switch:sonic-smart-switch": {
                 "sonic-smart-switch:MID_PLANE_BRIDGE": {
                     "GLOBAL": {
-                        "bridge": "bridge_midplane",
+                        "bridge": "bridge-midplane",
                         "ip_prefix": ip_prefix
                     }
                 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json
index 9e0f6f686172..42e03c647227 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json
@@ -3,7 +3,7 @@
         "sonic-smart-switch:sonic-smart-switch": {
             "sonic-smart-switch:MID_PLANE_BRIDGE": {
                 "GLOBAL": {
-                    "bridge": "bridge_midplane",
+                    "bridge": "bridge-midplane",
                     "ip_prefix": "169.254.200.254/24"
                 }
             }
@@ -49,7 +49,7 @@
                         "state": "enabled"
                     },
                     {
-                        "name": "bridge_midplane",
+                        "name": "bridge-midplane",
                         "gateway": "169.254.200.254",
                         "lease_time": 3600,
                         "mode": "PORT",
@@ -185,7 +185,7 @@
         "sonic-smart-switch:sonic-smart-switch": {
             "sonic-smart-switch:MID_PLANE_BRIDGE": {
                 "GLOBAL": {
-                    "bridge": "bridge_midplane",
+                    "bridge": "bridge-midplane",
                     "ip_prefix": "169.254.200.254/24"
                 }
             }
@@ -194,7 +194,7 @@
             "sonic-dhcp-server-ipv4:DHCP_SERVER_IPV4": {
                 "DHCP_SERVER_IPV4_LIST": [
                     {
-                        "name": "non_exist_bridge_midplane",
+                        "name": "non_exist_bridge-midplane",
                         "gateway": "192.168.0.1",
                         "lease_time": 3600,
                         "mode": "PORT",
@@ -294,7 +294,7 @@
         "sonic-smart-switch:sonic-smart-switch": {
             "sonic-smart-switch:MID_PLANE_BRIDGE": {
                 "GLOBAL": {
-                    "bridge": "bridge_midplane",
+                    "bridge": "bridge-midplane",
                     "ip_prefix": "169.254.200.254/24"
                 }
             }
@@ -303,7 +303,7 @@
             "sonic-dhcp-server-ipv4:DHCP_SERVER_IPV4": {
                 "DHCP_SERVER_IPV4_LIST": [
                     {
-                        "name": "bridge_midplane",
+                        "name": "bridge-midplane",
                         "gateway": "169.254.200.254",
                         "lease_time": 3600,
                         "mode": "PORT",
@@ -315,7 +315,7 @@
             "sonic-dhcp-server-ipv4:DHCP_SERVER_IPV4_PORT": {
                 "DHCP_SERVER_IPV4_PORT_LIST": [
                     {
-                        "name": "bridge_midplane",
+                        "name": "bridge-midplane",
                         "port": "non_exit_dpu",
                         "ips": [
                             "169.254.200.1"
diff --git a/src/sonic-yang-models/yang-models/sonic-smart-switch.yang b/src/sonic-yang-models/yang-models/sonic-smart-switch.yang
index fdd4deb17551..77880f0362c3 100644
--- a/src/sonic-yang-models/yang-models/sonic-smart-switch.yang
+++ b/src/sonic-yang-models/yang-models/sonic-smart-switch.yang
@@ -32,7 +32,7 @@ module sonic-smart-switch {
 			container GLOBAL {
 				leaf bridge {
 					type string {
-						pattern "bridge_midplane";
+						pattern "bridge-midplane";
 					}
 					description "Name of the midplane bridge";
 

From 3d452b412637dc82273c34252d80ba82d4f49f39 Mon Sep 17 00:00:00 2001
From: arista-nwolfe <94405414+arista-nwolfe@users.noreply.github.com>
Date: Fri, 20 Sep 2024 15:53:12 -0400
Subject: [PATCH 032/364] [Arista]: Fix tuning values in the
 media_settings.json of 7800r3a_36d2_lc (#20308)

Master PR of #20283 which was made for 202405
---
 .../media_settings.json                       | 2552 ++++++++---------
 1 file changed, 1276 insertions(+), 1276 deletions(-)

diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/media_settings.json b/device/arista/x86_64-arista_7800r3a_36d2_lc/media_settings.json
index 7ce47e003202..e9f452042347 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/media_settings.json
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/media_settings.json
@@ -13,44 +13,44 @@
                     "lane7": "0x88"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x5",
-                    "lane2": "-0x7",
-                    "lane3": "-0x1",
-                    "lane4": "-0xc",
-                    "lane5": "-0x5",
-                    "lane6": "-0x3",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffff2"
                 },
                 "post2": {
                     "lane0": "0x0",
-                    "lane1": "-0x2",
-                    "lane2": "-0x2",
-                    "lane3": "-0x3",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffd",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
                     "lane6": "0x0",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x3",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x3",
-                    "lane5": "-0x3",
-                    "lane6": "-0x1",
-                    "lane7": "-0x4"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xfffffffc"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0x10",
-                    "lane2": "-0x10",
-                    "lane3": "-0x11",
-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xffffffef",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -71,10 +71,10 @@
                     "lane3": "0x4b"
                 },
                 "post1": {
-                    "lane0": "-0x1d",
-                    "lane1": "-0x19",
-                    "lane2": "-0x17",
-                    "lane3": "-0x15"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe7",
+                    "lane2": "0xffffffe9",
+                    "lane3": "0xffffffeb"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -89,10 +89,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x8",
-                    "lane1": "-0x7",
-                    "lane2": "-0x5",
-                    "lane3": "-0x4"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffc"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -115,44 +115,44 @@
                     "lane7": "0x8d"
                 },
                 "post1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x8",
-                    "lane2": "-0xc",
-                    "lane3": "-0x5",
-                    "lane4": "-0x8",
-                    "lane5": "-0xa",
-                    "lane6": "-0x5",
-                    "lane7": "-0x8"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff6",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffff8"
                 },
                 "post2": {
-                    "lane0": "-0x2",
-                    "lane1": "-0x3",
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffd",
                     "lane2": "0x0",
-                    "lane3": "-0x2",
-                    "lane4": "-0x3",
-                    "lane5": "-0x2",
-                    "lane6": "-0x2",
-                    "lane7": "-0x3"
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffd"
                 },
                 "post3": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x1",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0xf",
-                    "lane2": "-0x10",
-                    "lane3": "-0x10",
-                    "lane4": "-0xf",
-                    "lane5": "-0x14",
-                    "lane6": "-0x10",
-                    "lane7": "-0xf"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff1",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff1"
                 },
                 "pre2": {
                     "lane0": "0x3",
@@ -173,10 +173,10 @@
                     "lane3": "0x4e"
                 },
                 "post1": {
-                    "lane0": "-0x14",
-                    "lane1": "-0x14",
-                    "lane2": "-0x16",
-                    "lane3": "-0x16"
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffea",
+                    "lane3": "0xffffffea"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -191,10 +191,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x5",
-                    "lane2": "-0x5",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -217,44 +217,44 @@
                     "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "-0xc",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7",
-                    "lane4": "-0x3",
-                    "lane5": "-0xe",
-                    "lane6": "-0x7",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x4",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0x10",
-                    "lane4": "-0x10",
-                    "lane5": "-0xe",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -275,10 +275,10 @@
                     "lane3": "0x55"
                 },
                 "post1": {
-                    "lane0": "-0x17",
-                    "lane1": "-0x17",
-                    "lane2": "-0x19",
-                    "lane3": "-0x19"
+                    "lane0": "0xffffffe9",
+                    "lane1": "0xffffffe9",
+                    "lane2": "0xffffffe7",
+                    "lane3": "0xffffffe7"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -293,10 +293,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x5",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -319,44 +319,44 @@
                     "lane7": "0x8d"
                 },
                 "post1": {
-                    "lane0": "-0xc",
-                    "lane1": "-0x5",
-                    "lane2": "-0x8",
-                    "lane3": "-0x5",
-                    "lane4": "-0xc",
-                    "lane5": "-0x8",
-                    "lane6": "-0x8",
-                    "lane7": "-0x5"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffffb"
                 },
                 "post2": {
                     "lane0": "0x0",
-                    "lane1": "-0x2",
-                    "lane2": "-0x3",
-                    "lane3": "-0x2",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x2"
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffe"
                 },
                 "post3": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x3",
-                    "lane2": "-0x1",
-                    "lane3": "-0x3",
-                    "lane4": "-0x3",
-                    "lane5": "-0x1",
-                    "lane6": "-0x1",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xfffffffd"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0x10",
-                    "lane2": "-0xf",
-                    "lane3": "-0x10",
-                    "lane4": "-0x10",
-                    "lane5": "-0xf",
-                    "lane6": "-0xf",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff1",
+                    "lane6": "0xfffffff1",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -377,10 +377,10 @@
                     "lane3": "0x59"
                 },
                 "post1": {
-                    "lane0": "-0x1d",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -395,10 +395,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x8",
-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -421,44 +421,44 @@
                     "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0xc",
-                    "lane2": "-0xe",
-                    "lane3": "-0x7",
-                    "lane4": "-0xe",
-                    "lane5": "-0x7",
-                    "lane6": "-0xe",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
                     "lane2": "0x0",
-                    "lane3": "-0x2",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
                     "lane6": "0x0",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x3",
-                    "lane2": "-0x4",
-                    "lane3": "-0x3",
-                    "lane4": "-0x4",
-                    "lane5": "-0x3",
-                    "lane6": "-0x4",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0x10",
-                    "lane2": "-0xe",
-                    "lane3": "-0x10",
-                    "lane4": "-0xe",
-                    "lane5": "-0x10",
-                    "lane6": "-0xe",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -479,10 +479,10 @@
                     "lane3": "0x59"
                 },
                 "post1": {
-                    "lane0": "-0x1d",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -497,10 +497,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x8",
-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -523,44 +523,44 @@
                     "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7",
-                    "lane4": "-0x3",
-                    "lane5": "-0xe",
-                    "lane6": "-0x7",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x4",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0x10",
-                    "lane4": "-0x10",
-                    "lane5": "-0xe",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -581,10 +581,10 @@
                     "lane3": "0x59"
                 },
                 "post1": {
-                    "lane0": "-0x1d",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -599,10 +599,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x8",
-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -625,44 +625,44 @@
                     "lane7": "0x88"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0xe",
-                    "lane4": "-0x3",
-                    "lane5": "-0x7",
-                    "lane6": "-0x7",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
+                    "lane2": "0xfffffffe",
                     "lane3": "0x0",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
-                    "lane6": "-0x2",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x4",
-                    "lane4": "-0x1",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x4"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0xe",
-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -683,10 +683,10 @@
                     "lane3": "0x59"
                 },
                 "post1": {
-                    "lane0": "-0x1d",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -701,10 +701,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x8",
-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -727,44 +727,44 @@
                     "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x3",
-                    "lane2": "-0xe",
-                    "lane3": "-0x7",
-                    "lane4": "-0xe",
-                    "lane5": "-0x7",
-                    "lane6": "-0xe",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
                     "lane2": "0x0",
-                    "lane3": "-0x2",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
                     "lane6": "0x0",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x1",
-                    "lane2": "-0x4",
-                    "lane3": "-0x3",
-                    "lane4": "-0x4",
-                    "lane5": "-0x3",
-                    "lane6": "-0x4",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0x10",
-                    "lane2": "-0xe",
-                    "lane3": "-0x10",
-                    "lane4": "-0xe",
-                    "lane5": "-0x10",
-                    "lane6": "-0xe",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -785,10 +785,10 @@
                     "lane3": "0x59"
                 },
                 "post1": {
-                    "lane0": "-0x1d",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -803,10 +803,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x8",
-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -829,44 +829,44 @@
                     "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7",
-                    "lane4": "-0x3",
-                    "lane5": "-0xe",
-                    "lane6": "-0x7",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x4",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0x10",
-                    "lane4": "-0x10",
-                    "lane5": "-0xe",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -887,10 +887,10 @@
                     "lane3": "0x59"
                 },
                 "post1": {
-                    "lane0": "-0x1d",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -905,10 +905,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x8",
-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -931,44 +931,44 @@
                     "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7",
-                    "lane4": "-0x3",
-                    "lane5": "-0xe",
-                    "lane6": "-0x7",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x4",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0x10",
-                    "lane4": "-0x10",
-                    "lane5": "-0xe",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -989,10 +989,10 @@
                     "lane3": "0x53"
                 },
                 "post1": {
-                    "lane0": "-0x15",
-                    "lane1": "-0x16",
-                    "lane2": "-0x14",
-                    "lane3": "-0x16"
+                    "lane0": "0xffffffeb",
+                    "lane1": "0xffffffea",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffea"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -1007,10 +1007,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x6",
-                    "lane1": "-0x5",
-                    "lane2": "-0x5",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -1033,44 +1033,44 @@
                     "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x3",
-                    "lane2": "-0xe",
-                    "lane3": "-0x7",
-                    "lane4": "-0xe",
-                    "lane5": "-0x7",
-                    "lane6": "-0xe",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
                     "lane2": "0x0",
-                    "lane3": "-0x2",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
                     "lane6": "0x0",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x1",
-                    "lane2": "-0x4",
-                    "lane3": "-0x3",
-                    "lane4": "-0x4",
-                    "lane5": "-0x3",
-                    "lane6": "-0x4",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0x10",
-                    "lane2": "-0xe",
-                    "lane3": "-0x10",
-                    "lane4": "-0xe",
-                    "lane5": "-0x10",
-                    "lane6": "-0xe",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -1091,10 +1091,10 @@
                     "lane3": "0x59"
                 },
                 "post1": {
-                    "lane0": "-0x15",
-                    "lane1": "-0x15",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffeb",
+                    "lane1": "0xffffffeb",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -1109,10 +1109,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x4",
-                    "lane1": "-0x4",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -1135,44 +1135,44 @@
                     "lane7": "0x88"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0xe",
-                    "lane4": "-0x3",
-                    "lane5": "-0x7",
-                    "lane6": "-0x7",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
+                    "lane2": "0xfffffffe",
                     "lane3": "0x0",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
-                    "lane6": "-0x2",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x4",
-                    "lane4": "-0x1",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x4"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0xe",
-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -1193,10 +1193,10 @@
                     "lane3": "0x53"
                 },
                 "post1": {
-                    "lane0": "-0x15",
-                    "lane1": "-0x16",
-                    "lane2": "-0x15",
-                    "lane3": "-0x16"
+                    "lane0": "0xffffffeb",
+                    "lane1": "0xffffffea",
+                    "lane2": "0xffffffeb",
+                    "lane3": "0xffffffea"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -1211,10 +1211,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x6",
-                    "lane1": "-0x5",
-                    "lane2": "-0x6",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffb"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -1237,44 +1237,44 @@
                     "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7",
-                    "lane4": "-0x3",
-                    "lane5": "-0xe",
-                    "lane6": "-0x7",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x4",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0x10",
-                    "lane4": "-0x10",
-                    "lane5": "-0xe",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -1295,10 +1295,10 @@
                     "lane3": "0x4b"
                 },
                 "post1": {
-                    "lane0": "-0x16",
-                    "lane1": "-0x16",
-                    "lane2": "-0x16",
-                    "lane3": "-0x14"
+                    "lane0": "0xffffffea",
+                    "lane1": "0xffffffea",
+                    "lane2": "0xffffffea",
+                    "lane3": "0xffffffec"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -1313,10 +1313,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x5",
-                    "lane2": "-0x5",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -1339,44 +1339,44 @@
                     "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x3",
-                    "lane2": "-0xe",
-                    "lane3": "-0x7",
-                    "lane4": "-0xe",
-                    "lane5": "-0x7",
-                    "lane6": "-0xe",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
                     "lane2": "0x0",
-                    "lane3": "-0x2",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
                     "lane6": "0x0",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x1",
-                    "lane2": "-0x4",
-                    "lane3": "-0x3",
-                    "lane4": "-0x4",
-                    "lane5": "-0x3",
-                    "lane6": "-0x4",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0x10",
-                    "lane2": "-0xe",
-                    "lane3": "-0x10",
-                    "lane4": "-0xe",
-                    "lane5": "-0x10",
-                    "lane6": "-0xe",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -1397,10 +1397,10 @@
                     "lane3": "0x50"
                 },
                 "post1": {
-                    "lane0": "-0x19",
-                    "lane1": "-0x19",
-                    "lane2": "-0x15",
-                    "lane3": "-0x17"
+                    "lane0": "0xffffffe7",
+                    "lane1": "0xffffffe7",
+                    "lane2": "0xffffffeb",
+                    "lane3": "0xffffffe9"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -1415,10 +1415,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x7",
-                    "lane1": "-0x7",
-                    "lane2": "-0x4",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffb"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -1441,44 +1441,44 @@
                     "lane7": "0x88"
                 },
                 "post1": {
-                    "lane0": "-0xc",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0x5",
-                    "lane4": "-0x3",
-                    "lane5": "-0x7",
-                    "lane6": "-0x7",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
-                    "lane6": "-0x2",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x4"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0x10",
-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
                 },
                 "pre2": {
                     "lane0": "0x3",
@@ -1499,10 +1499,10 @@
                     "lane3": "0x53"
                 },
                 "post1": {
-                    "lane0": "-0x16",
-                    "lane1": "-0x16",
-                    "lane2": "-0x15",
-                    "lane3": "-0x16"
+                    "lane0": "0xffffffea",
+                    "lane1": "0xffffffea",
+                    "lane2": "0xffffffeb",
+                    "lane3": "0xffffffea"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -1517,10 +1517,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x5",
-                    "lane2": "-0x6",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffb"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -1543,44 +1543,44 @@
                     "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7",
-                    "lane4": "-0x3",
-                    "lane5": "-0xe",
-                    "lane6": "-0x7",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x4",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0x10",
-                    "lane4": "-0x10",
-                    "lane5": "-0xe",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -1601,10 +1601,10 @@
                     "lane3": "0x50"
                 },
                 "post1": {
-                    "lane0": "-0x19",
-                    "lane1": "-0x15",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x17"
+                    "lane0": "0xffffffe7",
+                    "lane1": "0xffffffeb",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe9"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -1619,10 +1619,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x7",
-                    "lane1": "-0x4",
-                    "lane2": "-0x8",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffffb"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -1645,44 +1645,44 @@
                     "lane7": "0x90"
                 },
                 "post1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x1",
-                    "lane2": "-0xc",
-                    "lane3": "-0xe",
-                    "lane4": "-0x7",
-                    "lane5": "-0xc",
-                    "lane6": "-0x5",
-                    "lane7": "-0x1"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xffffffff"
                 },
                 "post2": {
-                    "lane0": "-0x2",
-                    "lane1": "-0x3",
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffd",
                     "lane2": "0x0",
                     "lane3": "0x0",
-                    "lane4": "-0x2",
+                    "lane4": "0xfffffffe",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
-                    "lane7": "-0x3"
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffd"
                 },
                 "post3": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x3",
-                    "lane2": "-0x3",
-                    "lane3": "-0x4",
-                    "lane4": "-0x3",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0x11",
-                    "lane2": "-0x10",
-                    "lane3": "-0xe",
-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0x11"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xffffffef",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xffffffef"
                 },
                 "pre2": {
                     "lane0": "0x3",
@@ -1703,10 +1703,10 @@
                     "lane3": "0x55"
                 },
                 "post1": {
-                    "lane0": "-0x16",
-                    "lane1": "-0x16",
-                    "lane2": "-0x15",
-                    "lane3": "-0x15"
+                    "lane0": "0xffffffea",
+                    "lane1": "0xffffffea",
+                    "lane2": "0xffffffeb",
+                    "lane3": "0xffffffeb"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -1721,10 +1721,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x5",
-                    "lane2": "-0x6",
-                    "lane3": "-0x6"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -1747,44 +1747,44 @@
                     "lane7": "0x8d"
                 },
                 "post1": {
-                    "lane0": "-0xc",
-                    "lane1": "-0x5",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8",
-                    "lane4": "-0xc",
-                    "lane5": "-0x5",
-                    "lane6": "-0xc",
-                    "lane7": "-0x5"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffffb"
                 },
                 "post2": {
                     "lane0": "0x0",
-                    "lane1": "-0x2",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
                     "lane6": "0x0",
-                    "lane7": "-0x2"
+                    "lane7": "0xfffffffe"
                 },
                 "post3": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x3",
-                    "lane2": "-0x1",
-                    "lane3": "-0x1",
-                    "lane4": "-0x3",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0x10",
-                    "lane2": "-0xf",
-                    "lane3": "-0xf",
-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -1805,10 +1805,10 @@
                     "lane3": "0x4b"
                 },
                 "post1": {
-                    "lane0": "-0x15",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x15"
+                    "lane0": "0xffffffeb",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffeb"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -1823,10 +1823,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x4",
-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x4"
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffffc"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -1849,44 +1849,44 @@
                     "lane7": "0x8d"
                 },
                 "post1": {
-                    "lane0": "-0xc",
-                    "lane1": "-0x5",
-                    "lane2": "-0x1",
-                    "lane3": "-0x1",
-                    "lane4": "-0xc",
-                    "lane5": "-0x5",
-                    "lane6": "-0xc",
-                    "lane7": "-0x5"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffffb"
                 },
                 "post2": {
                     "lane0": "0x0",
-                    "lane1": "-0x2",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
                     "lane6": "0x0",
-                    "lane7": "-0x2"
+                    "lane7": "0xfffffffe"
                 },
                 "post3": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x3",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x3",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0x10",
-                    "lane2": "-0x11",
-                    "lane3": "-0x11",
-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xffffffef",
+                    "lane3": "0xffffffef",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -1907,10 +1907,10 @@
                     "lane3": "0x50"
                 },
                 "post1": {
-                    "lane0": "-0x19",
-                    "lane1": "-0x19",
-                    "lane2": "-0x17",
-                    "lane3": "-0x17"
+                    "lane0": "0xffffffe7",
+                    "lane1": "0xffffffe7",
+                    "lane2": "0xffffffe9",
+                    "lane3": "0xffffffe9"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -1925,10 +1925,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x7",
-                    "lane1": "-0x7",
-                    "lane2": "-0x5",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -1951,44 +1951,44 @@
                     "lane7": "0x8d"
                 },
                 "post1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x8",
-                    "lane2": "-0xc",
-                    "lane3": "-0x5",
-                    "lane4": "-0x8",
-                    "lane5": "-0xc",
-                    "lane6": "-0x5",
-                    "lane7": "-0x8"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffff8"
                 },
                 "post2": {
-                    "lane0": "-0x2",
-                    "lane1": "-0x3",
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffd",
                     "lane2": "0x0",
-                    "lane3": "-0x2",
-                    "lane4": "-0x3",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffd",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
-                    "lane7": "-0x3"
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffd"
                 },
                 "post3": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x1",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0xf",
-                    "lane2": "-0x10",
-                    "lane3": "-0x10",
-                    "lane4": "-0xf",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0xf"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff1",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff1"
                 },
                 "pre2": {
                     "lane0": "0x3",
@@ -2009,10 +2009,10 @@
                     "lane3": "0x4e"
                 },
                 "post1": {
-                    "lane0": "-0x14",
-                    "lane1": "-0x14",
-                    "lane2": "-0x16",
-                    "lane3": "-0x16"
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffea",
+                    "lane3": "0xffffffea"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -2027,10 +2027,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x5",
-                    "lane2": "-0x5",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -2053,44 +2053,44 @@
                     "lane7": "0x89"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7",
-                    "lane4": "-0x3",
-                    "lane5": "-0xe",
-                    "lane6": "-0x7",
-                    "lane7": "-0xc"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff4"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x4",
-                    "lane6": "-0x3",
-                    "lane7": "-0x3"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0x10",
-                    "lane4": "-0x10",
-                    "lane5": "-0xe",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -2111,10 +2111,10 @@
                     "lane3": "0x55"
                 },
                 "post1": {
-                    "lane0": "-0x17",
-                    "lane1": "-0x17",
-                    "lane2": "-0x19",
-                    "lane3": "-0x19"
+                    "lane0": "0xffffffe9",
+                    "lane1": "0xffffffe9",
+                    "lane2": "0xffffffe7",
+                    "lane3": "0xffffffe7"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -2129,10 +2129,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x5",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -2155,44 +2155,44 @@
                     "lane7": "0x88"
                 },
                 "post1": {
-                    "lane0": "-0xc",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0xe",
-                    "lane4": "-0x3",
-                    "lane5": "-0x7",
-                    "lane6": "-0x7",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
+                    "lane2": "0xfffffffe",
                     "lane3": "0x0",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
-                    "lane6": "-0x2",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x4",
-                    "lane4": "-0x1",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x4"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0xe",
-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -2213,10 +2213,10 @@
                     "lane3": "0x59"
                 },
                 "post1": {
-                    "lane0": "-0x1d",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -2231,10 +2231,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x8",
-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -2257,44 +2257,44 @@
                     "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x3",
-                    "lane2": "-0xe",
-                    "lane3": "-0x7",
-                    "lane4": "-0xe",
-                    "lane5": "-0x7",
-                    "lane6": "-0xe",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
                     "lane2": "0x0",
-                    "lane3": "-0x2",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
                     "lane6": "0x0",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x1",
-                    "lane2": "-0x4",
-                    "lane3": "-0x3",
-                    "lane4": "-0x4",
-                    "lane5": "-0x3",
-                    "lane6": "-0x4",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0x10",
-                    "lane2": "-0xe",
-                    "lane3": "-0x10",
-                    "lane4": "-0xe",
-                    "lane5": "-0x10",
-                    "lane6": "-0xe",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -2315,10 +2315,10 @@
                     "lane3": "0x59"
                 },
                 "post1": {
-                    "lane0": "-0x1d",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -2333,10 +2333,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x8",
-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -2359,44 +2359,44 @@
                     "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7",
-                    "lane4": "-0x3",
-                    "lane5": "-0xe",
-                    "lane6": "-0x7",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x4",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0x10",
-                    "lane4": "-0x10",
-                    "lane5": "-0xe",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -2417,10 +2417,10 @@
                     "lane3": "0x59"
                 },
                 "post1": {
-                    "lane0": "-0x1d",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -2435,10 +2435,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x8",
-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -2461,44 +2461,44 @@
                     "lane7": "0x88"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0xe",
-                    "lane4": "-0x3",
-                    "lane5": "-0x7",
-                    "lane6": "-0x7",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
+                    "lane2": "0xfffffffe",
                     "lane3": "0x0",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
-                    "lane6": "-0x2",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x4",
-                    "lane4": "-0x1",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x4"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0xe",
-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -2519,10 +2519,10 @@
                     "lane3": "0x59"
                 },
                 "post1": {
-                    "lane0": "-0x1d",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -2537,10 +2537,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x8",
-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -2563,44 +2563,44 @@
                     "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x3",
-                    "lane2": "-0xe",
-                    "lane3": "-0x7",
-                    "lane4": "-0xe",
-                    "lane5": "-0x7",
-                    "lane6": "-0xe",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
                     "lane2": "0x0",
-                    "lane3": "-0x2",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
                     "lane6": "0x0",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x1",
-                    "lane2": "-0x4",
-                    "lane3": "-0x3",
-                    "lane4": "-0x4",
-                    "lane5": "-0x3",
-                    "lane6": "-0x4",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0x10",
-                    "lane2": "-0xe",
-                    "lane3": "-0x10",
-                    "lane4": "-0xe",
-                    "lane5": "-0x10",
-                    "lane6": "-0xe",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -2621,10 +2621,10 @@
                     "lane3": "0x59"
                 },
                 "post1": {
-                    "lane0": "-0x1d",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -2639,10 +2639,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x8",
-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -2665,44 +2665,44 @@
                     "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7",
-                    "lane4": "-0x3",
-                    "lane5": "-0xe",
-                    "lane6": "-0x7",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x4",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0x10",
-                    "lane4": "-0x10",
-                    "lane5": "-0xe",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -2723,10 +2723,10 @@
                     "lane3": "0x59"
                 },
                 "post1": {
-                    "lane0": "-0x1d",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -2741,10 +2741,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x8",
-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -2767,44 +2767,44 @@
                     "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7",
-                    "lane4": "-0x3",
-                    "lane5": "-0xe",
-                    "lane6": "-0x7",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x4",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0x10",
-                    "lane4": "-0x10",
-                    "lane5": "-0xe",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -2825,10 +2825,10 @@
                     "lane3": "0x4b"
                 },
                 "post1": {
-                    "lane0": "-0x16",
-                    "lane1": "-0x16",
-                    "lane2": "-0x14",
-                    "lane3": "-0x14"
+                    "lane0": "0xffffffea",
+                    "lane1": "0xffffffea",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -2843,10 +2843,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x5",
-                    "lane2": "-0x5",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -2869,44 +2869,44 @@
                     "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x3",
-                    "lane2": "-0xe",
-                    "lane3": "-0x7",
-                    "lane4": "-0xe",
-                    "lane5": "-0x7",
-                    "lane6": "-0xe",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
                     "lane2": "0x0",
-                    "lane3": "-0x2",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
                     "lane6": "0x0",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x1",
-                    "lane2": "-0x4",
-                    "lane3": "-0x3",
-                    "lane4": "-0x4",
-                    "lane5": "-0x3",
-                    "lane6": "-0x4",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0x10",
-                    "lane2": "-0xe",
-                    "lane3": "-0x10",
-                    "lane4": "-0xe",
-                    "lane5": "-0x10",
-                    "lane6": "-0xe",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -2927,10 +2927,10 @@
                     "lane3": "0x59"
                 },
                 "post1": {
-                    "lane0": "-0x15",
-                    "lane1": "-0x17",
-                    "lane2": "-0x19",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffeb",
+                    "lane1": "0xffffffe9",
+                    "lane2": "0xffffffe7",
+                    "lane3": "0xffffffe3"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -2945,10 +2945,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x4",
-                    "lane1": "-0x5",
-                    "lane2": "-0x7",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff8"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -2971,44 +2971,44 @@
                     "lane7": "0x88"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0xe",
-                    "lane4": "-0x3",
-                    "lane5": "-0x7",
-                    "lane6": "-0x7",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
+                    "lane2": "0xfffffffe",
                     "lane3": "0x0",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
-                    "lane6": "-0x2",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x4",
-                    "lane4": "-0x1",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x4"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0xe",
-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -3029,10 +3029,10 @@
                     "lane3": "0x4b"
                 },
                 "post1": {
-                    "lane0": "-0x16",
-                    "lane1": "-0x16",
-                    "lane2": "-0x16",
-                    "lane3": "-0x14"
+                    "lane0": "0xffffffea",
+                    "lane1": "0xffffffea",
+                    "lane2": "0xffffffea",
+                    "lane3": "0xffffffec"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -3047,10 +3047,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x5",
-                    "lane2": "-0x5",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -3073,44 +3073,44 @@
                     "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7",
-                    "lane4": "-0x3",
-                    "lane5": "-0xe",
-                    "lane6": "-0x7",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x4",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0x10",
-                    "lane4": "-0x10",
-                    "lane5": "-0xe",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -3131,10 +3131,10 @@
                     "lane3": "0x4b"
                 },
                 "post1": {
-                    "lane0": "-0x16",
-                    "lane1": "-0x16",
-                    "lane2": "-0x14",
-                    "lane3": "-0x14"
+                    "lane0": "0xffffffea",
+                    "lane1": "0xffffffea",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -3149,10 +3149,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x5",
-                    "lane2": "-0x5",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -3175,44 +3175,44 @@
                     "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x3",
-                    "lane2": "-0xe",
-                    "lane3": "-0x7",
-                    "lane4": "-0xe",
-                    "lane5": "-0x7",
-                    "lane6": "-0xe",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
                     "lane2": "0x0",
-                    "lane3": "-0x2",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
                     "lane6": "0x0",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x1",
-                    "lane2": "-0x4",
-                    "lane3": "-0x3",
-                    "lane4": "-0x4",
-                    "lane5": "-0x3",
-                    "lane6": "-0x4",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0x10",
-                    "lane2": "-0xe",
-                    "lane3": "-0x10",
-                    "lane4": "-0xe",
-                    "lane5": "-0x10",
-                    "lane6": "-0xe",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -3233,10 +3233,10 @@
                     "lane3": "0x50"
                 },
                 "post1": {
-                    "lane0": "-0x19",
-                    "lane1": "-0x19",
-                    "lane2": "-0x17",
-                    "lane3": "-0x17"
+                    "lane0": "0xffffffe7",
+                    "lane1": "0xffffffe7",
+                    "lane2": "0xffffffe9",
+                    "lane3": "0xffffffe9"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -3251,10 +3251,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x7",
-                    "lane1": "-0x7",
-                    "lane2": "-0x5",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -3277,44 +3277,44 @@
                     "lane7": "0x88"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0xe",
-                    "lane4": "-0x3",
-                    "lane5": "-0x7",
-                    "lane6": "-0x7",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
+                    "lane2": "0xfffffffe",
                     "lane3": "0x0",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
-                    "lane6": "-0x2",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x4",
-                    "lane4": "-0x1",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x4"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0xe",
-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -3335,10 +3335,10 @@
                     "lane3": "0x4b"
                 },
                 "post1": {
-                    "lane0": "-0x16",
-                    "lane1": "-0x14",
-                    "lane2": "-0x16",
-                    "lane3": "-0x14"
+                    "lane0": "0xffffffea",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffea",
+                    "lane3": "0xffffffec"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -3353,10 +3353,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x5",
-                    "lane2": "-0x5",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -3379,44 +3379,44 @@
                     "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "-0xc",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0x8",
-                    "lane4": "-0x3",
-                    "lane5": "-0x5",
-                    "lane6": "-0xf",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffff1",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x3",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffd",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
-                    "lane6": "-0x3",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffd",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x1",
-                    "lane4": "-0x1",
-                    "lane5": "-0x3",
-                    "lane6": "-0x2",
-                    "lane7": "-0x1"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0xf",
-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x12",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xffffffee",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -3437,10 +3437,10 @@
                     "lane3": "0x50"
                 },
                 "post1": {
-                    "lane0": "-0x19",
-                    "lane1": "-0x17",
-                    "lane2": "-0x19",
-                    "lane3": "-0x17"
+                    "lane0": "0xffffffe7",
+                    "lane1": "0xffffffe9",
+                    "lane2": "0xffffffe7",
+                    "lane3": "0xffffffe9"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -3455,10 +3455,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x7",
-                    "lane1": "-0x5",
-                    "lane2": "-0x7",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffffb"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -3481,44 +3481,44 @@
                     "lane7": "0x90"
                 },
                 "post1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x1",
-                    "lane2": "-0xc",
-                    "lane3": "-0x5",
-                    "lane4": "-0x1",
-                    "lane5": "-0xc",
-                    "lane6": "-0x5",
-                    "lane7": "-0x1"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xffffffff"
                 },
                 "post2": {
-                    "lane0": "-0x2",
-                    "lane1": "-0x3",
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffd",
                     "lane2": "0x0",
-                    "lane3": "-0x2",
-                    "lane4": "-0x3",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffd",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
-                    "lane7": "-0x3"
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffd"
                 },
                 "post3": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x3",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x3",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0x11",
-                    "lane2": "-0x10",
-                    "lane3": "-0x10",
-                    "lane4": "-0x11",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0x11"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xffffffef",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xffffffef",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xffffffef"
                 },
                 "pre2": {
                     "lane0": "0x3",
@@ -3539,10 +3539,10 @@
                     "lane3": "0x4e"
                 },
                 "post1": {
-                    "lane0": "-0x14",
-                    "lane1": "-0x14",
-                    "lane2": "-0x16",
-                    "lane3": "-0x16"
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffea",
+                    "lane3": "0xffffffea"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -3557,10 +3557,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x5",
-                    "lane2": "-0x5",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -3583,44 +3583,44 @@
                     "lane7": "0x8d"
                 },
                 "post1": {
-                    "lane0": "-0xc",
-                    "lane1": "-0x5",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8",
-                    "lane4": "-0xc",
-                    "lane5": "-0x5",
-                    "lane6": "-0xc",
-                    "lane7": "-0x5"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffffb"
                 },
                 "post2": {
                     "lane0": "0x0",
-                    "lane1": "-0x2",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
                     "lane6": "0x0",
-                    "lane7": "-0x2"
+                    "lane7": "0xfffffffe"
                 },
                 "post3": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x3",
-                    "lane2": "-0x1",
-                    "lane3": "-0x1",
-                    "lane4": "-0x3",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0x10",
-                    "lane2": "-0xf",
-                    "lane3": "-0xf",
-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -3641,10 +3641,10 @@
                     "lane3": "0x50"
                 },
                 "post1": {
-                    "lane0": "-0x17",
-                    "lane1": "-0x19",
-                    "lane2": "-0x19",
-                    "lane3": "-0x17"
+                    "lane0": "0xffffffe9",
+                    "lane1": "0xffffffe7",
+                    "lane2": "0xffffffe7",
+                    "lane3": "0xffffffe9"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -3659,10 +3659,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x7",
-                    "lane2": "-0x7",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffffb"
                 },
                 "pre2": {
                     "lane0": "0x0",

From a63a837378621d98df625b1139f2ca8ce84ffb10 Mon Sep 17 00:00:00 2001
From: Nazarii Hnydyn <nazariig@nvidia.com>
Date: Sat, 21 Sep 2024 04:06:34 +0300
Subject: [PATCH 033/364] [Mellanox]: Add Mellanox-SN4600C-D24C52 SKU. (#20142)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

A new SKU for `MSN4600C` platform: `Mellanox-SN4600C-D24C52`

Requirements for `Mellanox-SN4600C-D24C52`:
* 8 x 100Gbps uplink to T2 switch (C25, C26, C29-C30, C33-C34, C37-C38)
* 12 x 100Gbps downlinks to T0 switch (C1-C2, C3-C4, C7-C8, C53-C54, C57-C58, C63-C64)
* 1 x 50Gbps downlinks to T0 switch (D62)
* Type of transceiver: "100Gb AOC between T0-T1, 100G DAC between T0-Server"
* Cable length: “T0-T1 40m default, 300m max; T0-Server 2m”
* Breakout mode: "per port layout"
* FEC mode: "none"
* VxLAN source port: "no"
* Static Policy Based Hashing: "no"
* Traditional buffer model: "yes"
* Shared headroom: “yes”
* Over-subscription ratio: “2”
* Warm boot: “yes”

Additional details:
* `Mellanox-SN4600C-D24C52` is a replacement for [Mellanox-SN3800-D24C52](https://github.com/sonic-net/sonic-buildimage/tree/master/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D24C52)

#### Why I did it
* Added `Mellanox-SN4600C-D24C52` to replace `Mellanox-SN3800-D24C52`

### How I did it
* Added relevant configuration files

#### How to verify it
1. Generate port configuration:
```bash
sonic-cfggen -H -k Mellanox-SN4600C-D24C52 --preset t1 > /etc/sonic/config_db.json
```
2. Generate QoS configuration:
```bash
config qos clear
config qos reload --no-dynamic-buffer
config save -y
```
---
 .../Mellanox-SN4600C-D24C52/buffers.json.j2   |   1 +
 .../buffers_defaults_objects.j2               |   1 +
 .../buffers_defaults_t0.j2                    |  39 ++
 .../buffers_defaults_t1.j2                    |  39 ++
 .../buffers_dynamic.json.j2                   |   1 +
 .../Mellanox-SN4600C-D24C52/hwsku.json        | 308 +++++++++++
 .../pg_profile_lookup.ini                     |  44 ++
 .../Mellanox-SN4600C-D24C52/port_config.ini   |  94 ++++
 .../Mellanox-SN4600C-D24C52/qos.json.j2       |   1 +
 .../Mellanox-SN4600C-D24C52/sai.profile       |   1 +
 .../sai_4600c_24x50g_52x100g.xml              | 501 ++++++++++++++++++
 11 files changed, 1030 insertions(+)
 create mode 120000 device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers.json.j2
 create mode 120000 device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_objects.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_t0.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_t1.j2
 create mode 120000 device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_dynamic.json.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/hwsku.json
 create mode 100644 device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/pg_profile_lookup.ini
 create mode 100644 device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/port_config.ini
 create mode 120000 device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/qos.json.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai.profile
 create mode 100644 device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai_4600c_24x50g_52x100g.xml

diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers.json.j2
new file mode 120000
index 000000000000..117d740b0f5b
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers.json.j2
@@ -0,0 +1 @@
+../ACS-MSN4600C/buffers.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_objects.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_objects.j2
new file mode 120000
index 000000000000..c01aebb7ae12
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_objects.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_objects.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_t0.j2
new file mode 100644
index 000000000000..c9f4597a6727
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_t0.j2
@@ -0,0 +1,39 @@
+{#
+    Copyright (c) 2020-2021 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '2m' %}
+{% set ingress_lossless_pool_size = '57176064' %}
+{% set ingress_lossless_pool_xoff = '1099776' %}
+{% set egress_lossless_pool_size = '60817392' %}
+{% set egress_lossy_pool_size = '57176064' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_t1.j2
new file mode 100644
index 000000000000..1b3b9c50d354
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_t1.j2
@@ -0,0 +1,39 @@
+{#
+    Copyright (c) 2020-2021 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '40m' %}
+{% set ingress_lossless_pool_size = '57099264' %}
+{% set ingress_lossless_pool_xoff = '1176576' %}
+{% set egress_lossless_pool_size = '60817392' %}
+{% set egress_lossy_pool_size = '57099264' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_dynamic.json.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_dynamic.json.j2
new file mode 120000
index 000000000000..8c4117c66214
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_dynamic.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_dynamic.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/hwsku.json b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/hwsku.json
new file mode 100644
index 000000000000..839ad08f5257
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/hwsku.json
@@ -0,0 +1,308 @@
+{
+    "interfaces": {
+        "Ethernet0":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet4":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet8":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet12":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet16":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet20":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet24":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet28":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet32":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet34":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet36":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet38":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet40":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet42":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet44":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet46":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet48":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet52":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet56":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet60":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet64":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet68":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet72":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet76":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet80":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet84":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet88":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet92":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet96":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet100":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet104":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet106":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet108":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet110":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet112":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet116":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet120":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet124":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet128":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet132":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet136":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet140":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet144":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet148":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet152":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet156":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet160":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet164":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet168":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet172":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet176":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet178":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet180":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet182":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet184":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet186":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet188":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet190":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet192":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet196":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet200":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet204":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet208":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet212":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet216":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet220":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet224":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet228":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet232":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet236":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet240":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet242":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet244":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet246":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet248":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet252":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/pg_profile_lookup.ini
new file mode 100644
index 000000000000..7523a8d4dea0
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/pg_profile_lookup.ini
@@ -0,0 +1,44 @@
+##
+## Copyright (c) 2019-2021 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+# PG lossless profiles
+# speed  cable   size    xon    xoff  threshold
+  10000     2m  19456  19456   18432          0
+  25000     2m  19456  19456   19456          0
+  40000     2m  19456  19456   21504          0
+  50000     2m  19456  19456   23552          0
+ 100000     2m  19456  19456   41984          0
+  10000     5m  19456  19456   18432          0
+  25000     5m  19456  19456   19456          0
+  40000     5m  19456  19456   21504          0
+  50000     5m  19456  19456   24576          0
+ 100000     5m  19456  19456   43008          0
+  10000    40m  19456  19456   18432          0
+  25000    40m  19456  19456   20480          0
+  40000    40m  19456  19456   23552          0
+  50000    40m  19456  19456   26624          0
+ 100000    40m  19456  19456   48128          0
+  10000   300m  19456  19456   22528          0
+  25000   300m  19456  19456   29696          0
+  40000   300m  19456  19456   38912          0
+  50000   300m  19456  19456   45056          0
+ 100000   300m  19456  19456   84992          0
+  10000  2000m  19456  19456   47104          0
+  25000  2000m  19456  19456   91136          0
+  40000  2000m  19456  19456  137216          0
+  50000  2000m  19456  19456  168960          0
+ 100000  2000m  19456  19456  331776          0
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/port_config.ini b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/port_config.ini
new file mode 100644
index 000000000000..cd067d6da16f
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/port_config.ini
@@ -0,0 +1,94 @@
+##
+## Copyright (c) 2020-2021 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+# name       lanes            alias   index   speed
+Ethernet0    0,1,2,3          etp1        1  100000
+Ethernet4    8,9,10,11        etp2        2  100000
+Ethernet8    16,17,18,19      etp3        3  100000
+Ethernet12   24,25,26,27      etp4        4  100000
+Ethernet16   32,33,34,35      etp5        5  100000
+Ethernet20   40,41,42,43      etp6        6  100000
+Ethernet24   48,49,50,51      etp7        7  100000
+Ethernet28   56,57,58,59      etp8        8  100000
+Ethernet32   64,65            etp9a       9   50000
+Ethernet34   66,67            etp9b       9   50000
+Ethernet36   72,73            etp10a     10   50000
+Ethernet38   74,75            etp10b     10   50000
+Ethernet40   80,81            etp11a     11   50000
+Ethernet42   82,83            etp11b     11   50000
+Ethernet44   88,89            etp12a     12   50000
+Ethernet46   90,91            etp12b     12   50000
+Ethernet48   96,97,98,99      etp13      13  100000
+Ethernet52   104,105,106,107  etp14      14  100000
+Ethernet56   112,113,114,115  etp15      15  100000
+Ethernet60   120,121,122,123  etp16      16  100000
+Ethernet64   128,129,130,131  etp17      17  100000
+Ethernet68   136,137,138,139  etp18      18  100000
+Ethernet72   144,145,146,147  etp19      19  100000
+Ethernet76   152,153,154,155  etp20      20  100000
+Ethernet80   160,161,162,163  etp21      21  100000
+Ethernet84   168,169,170,171  etp22      22  100000
+Ethernet88   176,177,178,179  etp23      23  100000
+Ethernet92   184,185,186,187  etp24      24  100000
+Ethernet96   192,193,194,195  etp25      25  100000
+Ethernet100  200,201,202,203  etp26      26  100000
+Ethernet104  208,209          etp27a     27   50000
+Ethernet106  210,211          etp27b     27   50000
+Ethernet108  216,217          etp28a     28   50000
+Ethernet110  218,219          etp28b     28   50000
+Ethernet112  224,225,226,227  etp29      29  100000
+Ethernet116  232,233,234,235  etp30      30  100000
+Ethernet120  240,241,242,243  etp31      31  100000
+Ethernet124  248,249,250,251  etp32      32  100000
+Ethernet128  256,257,258,259  etp33      33  100000
+Ethernet132  264,265,266,267  etp34      34  100000
+Ethernet136  272,273,274,275  etp35      35  100000
+Ethernet140  280,281,282,283  etp36      36  100000
+Ethernet144  288,289,290,291  etp37      37  100000
+Ethernet148  296,297,298,299  etp38      38  100000
+Ethernet152  304,305,306,307  etp39      39  100000
+Ethernet156  312,313,314,315  etp40      40  100000
+Ethernet160  320,321,322,323  etp41      41  100000
+Ethernet164  328,329,330,331  etp42      42  100000
+Ethernet168  336,337,338,339  etp43      43  100000
+Ethernet172  344,345,346,347  etp44      44  100000
+Ethernet176  352,353          etp45a     45   50000
+Ethernet178  354,355          etp45b     45   50000
+Ethernet180  360,361          etp46a     46   50000
+Ethernet182  362,363          etp46b     46   50000
+Ethernet184  368,369          etp47a     47   50000
+Ethernet186  370,371          etp47b     47   50000
+Ethernet188  376,377          etp48a     48   50000
+Ethernet190  378,379          etp48b     48   50000
+Ethernet192  384,385,386,387  etp49      49  100000
+Ethernet196  392,393,394,395  etp50      50  100000
+Ethernet200  400,401,402,403  etp51      51  100000
+Ethernet204  408,409,410,411  etp52      52  100000
+Ethernet208  416,417,418,419  etp53      53  100000
+Ethernet212  424,425,426,427  etp54      54  100000
+Ethernet216  432,433,434,435  etp55      55  100000
+Ethernet220  440,441,442,443  etp56      56  100000
+Ethernet224  448,449,450,451  etp57      57  100000
+Ethernet228  456,457,458,459  etp58      58  100000
+Ethernet232  464,465,466,467  etp59      59  100000
+Ethernet236  472,473,474,475  etp60      60  100000
+Ethernet240  480,481          etp61a     61   50000
+Ethernet242  482,483          etp61b     61   50000
+Ethernet244  488,489          etp62a     62   50000
+Ethernet246  490,491          etp62b     62   50000
+Ethernet248  496,497,498,499  etp63      63  100000
+Ethernet252  504,505,506,507  etp64      64  100000
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/qos.json.j2
new file mode 120000
index 000000000000..05394016a129
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/qos.json.j2
@@ -0,0 +1 @@
+../ACS-MSN4600C/qos.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai.profile b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai.profile
new file mode 100644
index 000000000000..2bde3a0748a6
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4600c_24x50g_52x100g.xml
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai_4600c_24x50g_52x100g.xml b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai_4600c_24x50g_52x100g.xml
new file mode 100644
index 000000000000..b069da68bc82
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai_4600c_24x50g_52x100g.xml
@@ -0,0 +1,501 @@
+<?xml version="1.0"?>
+<!--
+  Copyright (c) 2019-2023 NVIDIA CORPORATION & AFFILIATES.
+  Apache-2.0
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+  http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+-->
+<root>
+    <platform_info type="4601">
+
+        <!-- Device MAC address  -->
+        <device-mac-address>00:02:03:04:05:80</device-mac-address>
+
+        <!-- ISSU enabled -->
+        <issu-enabled>1</issu-enabled>
+
+        <!-- Number of ports in the following port list -->
+        <number-of-physical-ports>64</number-of-physical-ports>
+
+        <!-- Global port late create -->
+        <late-create-all-ports>1</late-create-all-ports>
+
+        <!-- List of ports in the device -->
+        <ports-list>
+            <port-info>
+                <local-port>105</local-port>
+                <width>4</width>
+                <module>0</module>
+
+                <!-- 0 none, 1=2, 2=4, 3=2,4 -->
+                <breakout-modes>3</breakout-modes>
+
+                <!-- (BITMASK) 2 - 1Gb , 16 - 10Gb , 32 - 40Gb , 384 - 50Gb , 1536 - 100Gb , 1536 - 200Gb -->
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>107</local-port>
+                <width>4</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>109</local-port>
+                <width>4</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>111</local-port>
+                <width>4</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>97</local-port>
+                <width>4</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>99</local-port>
+                <width>4</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>101</local-port>
+                <width>4</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>103</local-port>
+                <width>4</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>121</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>123</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>9</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>125</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>10</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>127</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>11</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>113</local-port>
+                <width>4</width>
+                <module>12</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>115</local-port>
+                <width>4</width>
+                <module>13</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>117</local-port>
+                <width>4</width>
+                <module>14</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>119</local-port>
+                <width>4</width>
+                <module>15</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>89</local-port>
+                <width>4</width>
+                <module>16</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>91</local-port>
+                <width>4</width>
+                <module>17</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>93</local-port>
+                <width>4</width>
+                <module>18</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>95</local-port>
+                <width>4</width>
+                <module>19</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>81</local-port>
+                <width>4</width>
+                <module>20</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>83</local-port>
+                <width>4</width>
+                <module>21</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>85</local-port>
+                <width>4</width>
+                <module>22</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>87</local-port>
+                <width>4</width>
+                <module>23</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>73</local-port>
+                <width>4</width>
+                <module>24</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>75</local-port>
+                <width>4</width>
+                <module>25</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>77</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>26</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>79</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>27</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>65</local-port>
+                <width>4</width>
+                <module>28</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>67</local-port>
+                <width>4</width>
+                <module>29</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>69</local-port>
+                <width>4</width>
+                <module>30</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>71</local-port>
+                <width>4</width>
+                <module>31</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>5</local-port>
+                <width>4</width>
+                <module>32</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>7</local-port>
+                <width>4</width>
+                <module>33</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>1</local-port>
+                <width>4</width>
+                <module>34</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>3</local-port>
+                <width>4</width>
+                <module>35</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>13</local-port>
+                <width>4</width>
+                <module>36</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>15</local-port>
+                <width>4</width>
+                <module>37</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>9</local-port>
+                <width>4</width>
+                <module>38</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>11</local-port>
+                <width>4</width>
+                <module>39</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>21</local-port>
+                <width>4</width>
+                <module>40</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>23</local-port>
+                <width>4</width>
+                <module>41</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>17</local-port>
+                <width>4</width>
+                <module>42</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>19</local-port>
+                <width>4</width>
+                <module>43</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>29</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>44</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>31</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>45</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>25</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>46</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>27</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>47</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>53</local-port>
+                <width>4</width>
+                <module>48</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>55</local-port>
+                <width>4</width>
+                <module>49</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>49</local-port>
+                <width>4</width>
+                <module>50</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>51</local-port>
+                <width>4</width>
+                <module>51</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>61</local-port>
+                <width>4</width>
+                <module>52</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>63</local-port>
+                <width>4</width>
+                <module>53</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>57</local-port>
+                <width>4</width>
+                <module>54</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>59</local-port>
+                <width>4</width>
+                <module>55</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>37</local-port>
+                <width>4</width>
+                <module>56</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>39</local-port>
+                <width>4</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>33</local-port>
+                <width>4</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>35</local-port>
+                <width>4</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>45</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>47</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>41</local-port>
+                <width>4</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>43</local-port>
+                <width>4</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+        </ports-list>
+    </platform_info>
+</root>

From d36056f6ad871a982f8581444b97a8cfd4ef3f55 Mon Sep 17 00:00:00 2001
From: Philo <135693886+philo-micas@users.noreply.github.com>
Date: Sat, 21 Sep 2024 09:27:43 +0800
Subject: [PATCH 034/364] [Micas/Platform]platform M2-W6510 uses Linux kernel
 drivers (#19599)

### Why I did it

### How I did it
We try to use Linux kernel drivers to replace our drivers, except for some drivers that we have implemented ourselves.
For this purpose, we have submitted the following PR to the sonic-linux-kernel repository:
https://github.com/sonic-net/sonic-linux-kernel/pull/411
https://github.com/sonic-net/sonic-linux-kernel/pull/413
https://github.com/sonic-net/sonic-linux-kernel/pull/417
---
 .../kernel_drivers_blacklist.conf             |    2 -
 .../common/modules/Makefile                   |    8 +-
 .../common/modules/linux/Makefile             |   36 -
 .../common/modules/linux/wb_i2c_algo_bit.c    |  725 -----
 .../common/modules/linux/wb_i2c_gpio.c        |  431 ---
 .../common/modules/linux/wb_i2c_i801.c        | 2114 -------------
 .../common/modules/linux/wb_i2c_ismt.c        | 1131 -------
 .../common/modules/linux/wb_ina3221.c         | 1031 ------
 .../common/modules/linux/wb_isl68137.c        |  577 ----
 .../common/modules/linux/wb_lm75.c            |  992 ------
 .../common/modules/linux/wb_lm75.h            |   40 -
 .../common/modules/linux/wb_pmbus.h           |  535 ----
 .../common/modules/linux/wb_pmbus_core.c      | 2780 -----------------
 .../common/modules/linux/wb_tmp401.c          | 1010 ------
 .../common/modules/linux/wb_tps53622.c        |  265 --
 .../common/modules/linux/wb_ucd9000.c         |  720 -----
 .../common/modules/linux/wb_xdpe12284.c       |  499 ---
 .../common/modules/pmbus.h                    |  511 +++
 .../common/modules/{linux => }/wb_csu550.c    |   58 +-
 .../modules/{linux => }/wb_i2c_gpio_device.c  |    6 +-
 .../modules/{linux => }/wb_i2c_mux_pca954x.c  |    0
 .../modules/{linux => }/wb_i2c_mux_pca954x.h  |    0
 .../modules/{linux => }/wb_i2c_mux_pca9641.c  |    0
 .../modules/{linux => }/wb_i2c_mux_pca9641.h  |    0
 .../modules/{linux => }/wb_xdpe132g5c_pmbus.c |  152 +-
 .../debian/changelog                          |    2 +-
 .../x86_64_micas_m2_w6510_48v8c_r0_config.py  |   77 +-
 .../m2-w6510-48v8c/modules/driver/Makefile    |    1 -
 28 files changed, 603 insertions(+), 13100 deletions(-)
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/Makefile
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_algo_bit.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_i801.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_ismt.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ina3221.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_isl68137.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus_core.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tmp401.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tps53622.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ucd9000.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe12284.c
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/modules/pmbus.h
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux => }/wb_csu550.c (76%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux => }/wb_i2c_gpio_device.c (96%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux => }/wb_i2c_mux_pca954x.c (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux => }/wb_i2c_mux_pca954x.h (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux => }/wb_i2c_mux_pca9641.c (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux => }/wb_i2c_mux_pca9641.h (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux => }/wb_xdpe132g5c_pmbus.c (69%)
 mode change 100755 => 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile

diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf b/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf
index a49166ab6207..9e0111a733cf 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf
@@ -1,3 +1 @@
 blacklist wb_fpga_pcie
-blacklist wb_i2c_i801
-blacklist wb_i2c_ismt
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
index bacb3839e834..e432430dba46 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
@@ -7,8 +7,6 @@ KERNEL_SRC ?=  /lib/modules/$(KVERSION)
 module_out_put_dir := $(PWD)/build
 export module_out_put_dir
 
-KERNEL_MODULES_SRC = $(PWD)/linux
-
 PLAT_SYSFS_DIR = $(PWD)/plat_sysfs
 PINCTRL = $(PWD)/pinctrl
 
@@ -36,9 +34,13 @@ obj-m += wb_xdpe132g5c.o
 obj-m += wb_uio_irq.o
 obj-m += hw_test.o
 obj-m += wb_mdio_gpio_device.o
+obj-m += wb_csu550.o
+obj-m += wb_i2c_mux_pca9641.o
+obj-m += wb_i2c_mux_pca954x.o
+obj-m += wb_xdpe132g5c_pmbus.o
+obj-m += wb_i2c_gpio_device.o
 
 all :
-	$(MAKE) -C $(KERNEL_MODULES_SRC)
 	$(MAKE) -C $(PLAT_SYSFS_DIR)
 	$(MAKE) -C $(PINCTRL)
 	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/Makefile
deleted file mode 100644
index a3da5aadf5ab..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/Makefile
+++ /dev/null
@@ -1,36 +0,0 @@
-PWD		= $(shell pwd)
-
-EXTRA_CFLAGS:= -I$(M)/include
-EXTRA_CFLAGS+= -Wall
-#ifdef ENABLE_GCOV
-#ifeq ($(ENABLE_GCOV), y)
-#EXTRA_CFLAGS+= -fprofile-arcs -ftest-coverage -lgcov
-#endif
-#endif # ENABLE_GCOV
-
-obj-m := wb_lm75.o
-obj-m += wb_tmp401.o
-obj-m += wb_i2c_mux_pca9641.o
-obj-m += wb_i2c_mux_pca954x.o
-obj-m += wb_i2c_i801.o
-obj-m += wb_i2c_algo_bit.o
-obj-m += wb_i2c_gpio.o
-obj-m += wb_i2c_gpio_device.o
-obj-m += wb_pmbus_core.o
-obj-m += wb_csu550.o
-obj-m += wb_ina3221.o
-obj-m += wb_isl68137.o
-obj-m += wb_tps53622.o
-obj-m += wb_ucd9000.o
-obj-m += wb_xdpe12284.o
-obj-m += wb_xdpe132g5c_pmbus.o
-obj-m += wb_i2c_ismt.o
-
-all:
-	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
-	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
-	cp -p  $(PWD)/*.ko $(module_out_put_dir)
-clean:
-	rm -f $(PWD)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd $(PWD)/*.mod
-	rm -f $(PWD)/Module.markers $(PWD)/Module.symvers $(PWD)/modules.order
-	rm -rf $(PWD)/.tmp_versions
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_algo_bit.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_algo_bit.c
deleted file mode 100644
index c98ac7a1c5b6..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_algo_bit.c
+++ /dev/null
@@ -1,725 +0,0 @@
-/* -------------------------------------------------------------------------
- * i2c-algo-bit.c i2c driver algorithms for bit-shift adapters
- * -------------------------------------------------------------------------
- *   Copyright (C) 1995-2000 Simon G. Vogl
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
- * ------------------------------------------------------------------------- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/i2c.h>
-#include <linux/i2c-algo-bit.h>
-
-static int g_i2c_algo_bit_debug = 0;
-static int g_i2c_algo_bit_error = 0;
-
-module_param(g_i2c_algo_bit_debug, int, S_IRUGO | S_IWUSR);
-module_param(g_i2c_algo_bit_error, int, S_IRUGO | S_IWUSR);
-
-#define I2C_ALGO_BIT_DEBUG(fmt, args...) do {                                        \
-    if (g_i2c_algo_bit_debug) { \
-        printk(KERN_INFO "[I2C_ALGO_BIT][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-#define I2C_ALGO_BIT_ERROR(fmt, args...) do {                                        \
-    if (g_i2c_algo_bit_error) { \
-        printk(KERN_ERR "[I2C_ALGO_BIT][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-/* ----- global defines ----------------------------------------------- */
-
-#ifdef DEBUG
-#define bit_dbg(level, dev, format, args...) \
-	do { \
-		if (i2c_debug >= level) \
-			dev_dbg(dev, format, ##args); \
-	} while (0)
-#else
-#define bit_dbg(level, dev, format, args...) \
-	do {} while (0)
-#endif /* DEBUG */
-
-/* ----- global variables ---------------------------------------------	*/
-
-static int bit_test;	/* see if the line-setting functions work	*/
-module_param(bit_test, int, S_IRUGO);
-MODULE_PARM_DESC(bit_test, "lines testing - 0 off; 1 report; 2 fail if stuck");
-
-#ifdef DEBUG
-static int i2c_debug = 1;
-module_param(i2c_debug, int, S_IRUGO | S_IWUSR);
-MODULE_PARM_DESC(i2c_debug,
-		 "debug level - 0 off; 1 normal; 2 verbose; 3 very verbose");
-#endif
-
-/* --- setting states on the bus with the right timing: ---------------	*/
-
-#define setsda(adap, val)	adap->setsda(adap->data, val)
-#define setscl(adap, val)	adap->setscl(adap->data, val)
-#define getsda(adap)		adap->getsda(adap->data)
-#define getscl(adap)		adap->getscl(adap->data)
-
-static inline void sdalo(struct i2c_algo_bit_data *adap)
-{
-	setsda(adap, 0);
-	udelay((adap->udelay + 1) / 2);
-}
-
-static inline void sdahi(struct i2c_algo_bit_data *adap)
-{
-	setsda(adap, 1);
-	udelay((adap->udelay + 1) / 2);
-}
-
-static inline void scllo(struct i2c_algo_bit_data *adap)
-{
-	setscl(adap, 0);
-	udelay(adap->udelay / 2);
-}
-
-/*
- * Raise scl line, and do checking for delays. This is necessary for slower
- * devices.
- */
-static int sclhi(struct i2c_algo_bit_data *adap)
-{
-	unsigned long start;
-
-	setscl(adap, 1);
-
-	/* Not all adapters have scl sense line... */
-	if (!adap->getscl)
-		goto done;
-
-	start = jiffies;
-	while (!getscl(adap)) {
-		/* This hw knows how to read the clock line, so we wait
-		 * until it actually gets high.  This is safer as some
-		 * chips may hold it low ("clock stretching") while they
-		 * are processing data internally.
-		 */
-		if (time_after(jiffies, start + adap->timeout)) {
-			/* Test one last time, as we may have been preempted
-			 * between last check and timeout test.
-			 */
-			if (getscl(adap))
-				break;
-			return -ETIMEDOUT;
-		}
-		cpu_relax();
-	}
-#ifdef DEBUG
-	if (jiffies != start && i2c_debug >= 3)
-		pr_debug("i2c-algo-bit: needed %ld jiffies for SCL to go "
-			 "high\n", jiffies - start);
-#endif
-
-done:
-	udelay(adap->udelay);
-	return 0;
-}
-
-/* --- other auxiliary functions --------------------------------------	*/
-static void i2c_start(struct i2c_algo_bit_data *adap)
-{
-	/* assert: scl, sda are high */
-	setsda(adap, 0);
-	udelay(adap->udelay);
-	scllo(adap);
-}
-
-static void i2c_repstart(struct i2c_algo_bit_data *adap)
-{
-	/* assert: scl is low */
-	sdahi(adap);
-	sclhi(adap);
-	setsda(adap, 0);
-	udelay(adap->udelay);
-	scllo(adap);
-}
-
-static void i2c_stop(struct i2c_algo_bit_data *adap)
-{
-	/* assert: scl is low */
-	sdalo(adap);
-	sclhi(adap);
-	setsda(adap, 1);
-	udelay(adap->udelay);
-}
-
-/* send a byte without start cond., look for arbitration,
-   check ackn. from slave */
-/* returns:
- * 1 if the device acknowledged
- * 0 if the device did not ack
- * -ETIMEDOUT if an error occurred (while raising the scl line)
- */
-static int i2c_outb(struct i2c_adapter *i2c_adap, unsigned char c)
-{
-	int i;
-	int sb;
-	int ack;
-	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
-
-	/* assert: scl is low */
-	for (i = 7; i >= 0; i--) {
-		sb = (c >> i) & 1;
-		setsda(adap, sb);
-		udelay((adap->udelay + 1) / 2);
-		if (sclhi(adap) < 0) { /* timed out */
-			bit_dbg(1, &i2c_adap->dev, "i2c_outb: 0x%02x, "
-				"timeout at bit #%d\n", (int)c, i);
-			return -ETIMEDOUT;
-		}
-		/* FIXME do arbitration here:
-		 * if (sb && !getsda(adap)) -> ouch! Get out of here.
-		 *
-		 * Report a unique code, so higher level code can retry
-		 * the whole (combined) message and *NOT* issue STOP.
-		 */
-		scllo(adap);
-	}
-	sdahi(adap);
-	if (sclhi(adap) < 0) { /* timeout */
-		bit_dbg(1, &i2c_adap->dev, "i2c_outb: 0x%02x, "
-			"timeout at ack\n", (int)c);
-		return -ETIMEDOUT;
-	}
-
-	/* read ack: SDA should be pulled down by slave, or it may
-	 * NAK (usually to report problems with the data we wrote).
-	 */
-	ack = !getsda(adap);    /* ack: sda is pulled low -> success */
-	bit_dbg(2, &i2c_adap->dev, "i2c_outb: 0x%02x %s\n", (int)c,
-		ack ? "A" : "NA");
-
-	scllo(adap);
-	return ack;
-	/* assert: scl is low (sda undef) */
-}
-
-static int i2c_inb(struct i2c_adapter *i2c_adap)
-{
-	/* read byte via i2c port, without start/stop sequence	*/
-	/* acknowledge is sent in i2c_read.			*/
-	int i;
-	unsigned char indata = 0;
-	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
-
-	/* assert: scl is low */
-	sdahi(adap);
-	for (i = 0; i < 8; i++) {
-		if (sclhi(adap) < 0) { /* timeout */
-			bit_dbg(1, &i2c_adap->dev, "i2c_inb: timeout at bit "
-				"#%d\n", 7 - i);
-			return -ETIMEDOUT;
-		}
-		indata *= 2;
-		if (getsda(adap))
-			indata |= 0x01;
-		setscl(adap, 0);
-		udelay(i == 7 ? adap->udelay / 2 : adap->udelay);
-	}
-	/* assert: scl is low */
-	return indata;
-}
-
-/*
- * Sanity check for the adapter hardware - check the reaction of
- * the bus lines only if it seems to be idle.
- */
-static int test_bus(struct i2c_adapter *i2c_adap)
-{
-	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
-	const char *name = i2c_adap->name;
-	int scl, sda, ret;
-
-	if (adap->pre_xfer) {
-		ret = adap->pre_xfer(i2c_adap);
-		if (ret < 0)
-			return -ENODEV;
-	}
-
-	if (adap->getscl == NULL)
-		pr_info("%s: Testing SDA only, SCL is not readable\n", name);
-
-	sda = getsda(adap);
-	scl = (adap->getscl == NULL) ? 1 : getscl(adap);
-	if (!scl || !sda) {
-		printk(KERN_WARNING
-		       "%s: bus seems to be busy (scl=%d, sda=%d)\n",
-		       name, scl, sda);
-		goto bailout;
-	}
-
-	sdalo(adap);
-	sda = getsda(adap);
-	scl = (adap->getscl == NULL) ? 1 : getscl(adap);
-	if (sda) {
-		printk(KERN_WARNING "%s: SDA stuck high!\n", name);
-		goto bailout;
-	}
-	if (!scl) {
-		printk(KERN_WARNING "%s: SCL unexpected low "
-		       "while pulling SDA low!\n", name);
-		goto bailout;
-	}
-
-	sdahi(adap);
-	sda = getsda(adap);
-	scl = (adap->getscl == NULL) ? 1 : getscl(adap);
-	if (!sda) {
-		printk(KERN_WARNING "%s: SDA stuck low!\n", name);
-		goto bailout;
-	}
-	if (!scl) {
-		printk(KERN_WARNING "%s: SCL unexpected low "
-		       "while pulling SDA high!\n", name);
-		goto bailout;
-	}
-
-	scllo(adap);
-	sda = getsda(adap);
-	scl = (adap->getscl == NULL) ? 0 : getscl(adap);
-	if (scl) {
-		printk(KERN_WARNING "%s: SCL stuck high!\n", name);
-		goto bailout;
-	}
-	if (!sda) {
-		printk(KERN_WARNING "%s: SDA unexpected low "
-		       "while pulling SCL low!\n", name);
-		goto bailout;
-	}
-
-	sclhi(adap);
-	sda = getsda(adap);
-	scl = (adap->getscl == NULL) ? 1 : getscl(adap);
-	if (!scl) {
-		printk(KERN_WARNING "%s: SCL stuck low!\n", name);
-		goto bailout;
-	}
-	if (!sda) {
-		printk(KERN_WARNING "%s: SDA unexpected low "
-		       "while pulling SCL high!\n", name);
-		goto bailout;
-	}
-
-	if (adap->post_xfer)
-		adap->post_xfer(i2c_adap);
-
-	pr_info("%s: Test OK\n", name);
-	return 0;
-bailout:
-	sdahi(adap);
-	sclhi(adap);
-
-	if (adap->post_xfer)
-		adap->post_xfer(i2c_adap);
-
-	return -ENODEV;
-}
-
-/* ----- Utility functions
- */
-
-/* try_address tries to contact a chip for a number of
- * times before it gives up.
- * return values:
- * 1 chip answered
- * 0 chip did not answer
- * -x transmission error
- */
-static int try_address(struct i2c_adapter *i2c_adap,
-		       unsigned char addr, int retries)
-{
-	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
-	int i, ret = 0;
-
-	for (i = 0; i <= retries; i++) {
-		ret = i2c_outb(i2c_adap, addr);
-		if (ret == 1 || i == retries)
-			break;
-		bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
-		i2c_stop(adap);
-		udelay(adap->udelay);
-		yield();
-		bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
-		i2c_start(adap);
-	}
-	if (i && ret)
-		bit_dbg(1, &i2c_adap->dev, "Used %d tries to %s client at "
-			"0x%02x: %s\n", i + 1,
-			addr & 1 ? "read from" : "write to", addr >> 1,
-			ret == 1 ? "success" : "failed, timeout?");
-	return ret;
-}
-
-static int sendbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
-{
-	const unsigned char *temp = msg->buf;
-	int count = msg->len;
-	unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
-	int retval;
-	int wrcount = 0;
-
-	while (count > 0) {
-		retval = i2c_outb(i2c_adap, *temp);
-
-		/* OK/ACK; or ignored NAK */
-		if ((retval > 0) || (nak_ok && (retval == 0))) {
-			count--;
-			temp++;
-			wrcount++;
-
-		/* A slave NAKing the master means the slave didn't like
-		 * something about the data it saw.  For example, maybe
-		 * the SMBus PEC was wrong.
-		 */
-		} else if (retval == 0) {
-			dev_err(&i2c_adap->dev, "sendbytes: NAK bailout.\n");
-			return -EIO;
-
-		/* Timeout; or (someday) lost arbitration
-		 *
-		 * FIXME Lost ARB implies retrying the transaction from
-		 * the first message, after the "winning" master issues
-		 * its STOP.  As a rule, upper layer code has no reason
-		 * to know or care about this ... it is *NOT* an error.
-		 */
-		} else {
-			dev_err(&i2c_adap->dev, "sendbytes: error %d\n",
-					retval);
-			return retval;
-		}
-	}
-	return wrcount;
-}
-
-static int acknak(struct i2c_adapter *i2c_adap, int is_ack)
-{
-	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
-
-	/* assert: sda is high */
-	if (is_ack)		/* send ack */
-		setsda(adap, 0);
-	udelay((adap->udelay + 1) / 2);
-	if (sclhi(adap) < 0) {	/* timeout */
-		dev_err(&i2c_adap->dev, "readbytes: ack/nak timeout\n");
-		return -ETIMEDOUT;
-	}
-	scllo(adap);
-	return 0;
-}
-
-static int readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
-{
-	int inval;
-	int rdcount = 0;	/* counts bytes read */
-	unsigned char *temp = msg->buf;
-	int count = msg->len;
-	const unsigned flags = msg->flags;
-
-	while (count > 0) {
-		inval = i2c_inb(i2c_adap);
-		if (inval >= 0) {
-			*temp = inval;
-			rdcount++;
-		} else {   /* read timed out */
-			break;
-		}
-
-		temp++;
-		count--;
-
-		/* Some SMBus transactions require that we receive the
-		   transaction length as the first read byte. */
-		if (rdcount == 1 && (flags & I2C_M_RECV_LEN)) {
-			if (inval <= 0 || inval > I2C_SMBUS_BLOCK_MAX) {
-				if (!(flags & I2C_M_NO_RD_ACK))
-					acknak(i2c_adap, 0);
-				dev_err(&i2c_adap->dev, "readbytes: invalid "
-					"block length (%d)\n", inval);
-				return -EPROTO;
-			}
-			/* The original count value accounts for the extra
-			   bytes, that is, either 1 for a regular transaction,
-			   or 2 for a PEC transaction. */
-			count += inval;
-			msg->len += inval;
-		}
-
-		bit_dbg(2, &i2c_adap->dev, "readbytes: 0x%02x %s\n",
-			inval,
-			(flags & I2C_M_NO_RD_ACK)
-				? "(no ack/nak)"
-				: (count ? "A" : "NA"));
-
-		if (!(flags & I2C_M_NO_RD_ACK)) {
-			inval = acknak(i2c_adap, count);
-			if (inval < 0)
-				return inval;
-		}
-	}
-	return rdcount;
-}
-
-/* doAddress initiates the transfer by generating the start condition (in
- * try_address) and transmits the address in the necessary format to handle
- * reads, writes as well as 10bit-addresses.
- * returns:
- *  0 everything went okay, the chip ack'ed, or IGNORE_NAK flag was set
- * -x an error occurred (like: -ENXIO if the device did not answer, or
- *	-ETIMEDOUT, for example if the lines are stuck...)
- */
-static int bit_doAddress(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
-{
-	unsigned short flags = msg->flags;
-	unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
-	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
-
-	unsigned char addr;
-	int ret, retries;
-
-	retries = nak_ok ? 0 : i2c_adap->retries;
-
-	if (flags & I2C_M_TEN) {
-		/* a ten bit address */
-		addr = 0xf0 | ((msg->addr >> 7) & 0x06);
-		bit_dbg(2, &i2c_adap->dev, "addr0: %d\n", addr);
-		/* try extended address code...*/
-		ret = try_address(i2c_adap, addr, retries);
-		if ((ret != 1) && !nak_ok)  {
-			dev_err(&i2c_adap->dev,
-				"died at extended address code\n");
-			return -ENXIO;
-		}
-		/* the remaining 8 bit address */
-		ret = i2c_outb(i2c_adap, msg->addr & 0xff);
-		if ((ret != 1) && !nak_ok) {
-			/* the chip did not ack / xmission error occurred */
-			dev_err(&i2c_adap->dev, "died at 2nd address code\n");
-			return -ENXIO;
-		}
-		if (flags & I2C_M_RD) {
-			bit_dbg(3, &i2c_adap->dev, "emitting repeated "
-				"start condition\n");
-			i2c_repstart(adap);
-			/* okay, now switch into reading mode */
-			addr |= 0x01;
-			ret = try_address(i2c_adap, addr, retries);
-			if ((ret != 1) && !nak_ok) {
-				dev_err(&i2c_adap->dev,
-					"died at repeated address code\n");
-				return -EIO;
-			}
-		}
-	} else {		/* normal 7bit address	*/
-		addr = msg->addr << 1;
-		if (flags & I2C_M_RD)
-			addr |= 1;
-		if (flags & I2C_M_REV_DIR_ADDR)
-			addr ^= 1;
-		ret = try_address(i2c_adap, addr, retries);
-		if ((ret != 1) && !nak_ok)
-			return -ENXIO;
-	}
-
-	return 0;
-}
-
-static void bit_i2c_unblock(struct i2c_adapter *i2c_adap)
-{
-    int i;
-    struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
-
-    for (i = 0; i < 9; i++) {
-        setscl(adap, 0);
-        udelay(5);
-        setscl(adap, 1);
-        udelay(5);
-    }
-    setscl(adap, 0);
-    setsda(adap, 0);
-    udelay(5);
-    setscl(adap, 1);
-    udelay(5);
-    setsda(adap, 1);
-}
-
-static int check_bit_i2c_unblock(struct i2c_adapter *i2c_adap)
-{
-    struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
-    int sda, scl;
-
-    sda = getsda(adap);
-    scl = getscl(adap);
-    if ((sda == 0) && scl) {
-        I2C_ALGO_BIT_ERROR("SCL is high and SDA is low, send 9 clock to device.\n");
-        bit_i2c_unblock(i2c_adap);
-    }
-
-    sda = getsda(adap);
-    scl = getscl(adap);
-    if (sda && scl) {
-        I2C_ALGO_BIT_DEBUG("SCL and SDA are both high, i2c level check ok.\n");
-        return 0;
-    }
-    dev_warn(&i2c_adap->dev, "Check i2c level failed, SCL %s, SDA %s.\n", scl ? "high" : "low", sda ? "high" : "low");
-    return -EIO;
-}
-
-static int bit_xfer(struct i2c_adapter *i2c_adap,
-		    struct i2c_msg msgs[], int num)
-{
-	struct i2c_msg *pmsg;
-	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
-	int i, ret;
-	unsigned short nak_ok;
-
-	if (adap->pre_xfer) {
-		ret = adap->pre_xfer(i2c_adap);
-		if (ret < 0)
-			return ret;
-	}
-
-    if (check_bit_i2c_unblock(i2c_adap) < 0) {
-        I2C_ALGO_BIT_ERROR("check i2c is block.\n");
-        return -EIO;
-    }
-
-	bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
-	i2c_start(adap);
-	for (i = 0; i < num; i++) {
-		pmsg = &msgs[i];
-		nak_ok = pmsg->flags & I2C_M_IGNORE_NAK;
-		if (!(pmsg->flags & I2C_M_NOSTART)) {
-			if (i) {
-				bit_dbg(3, &i2c_adap->dev, "emitting "
-					"repeated start condition\n");
-				i2c_repstart(adap);
-			}
-			ret = bit_doAddress(i2c_adap, pmsg);
-			if ((ret != 0) && !nak_ok) {
-				bit_dbg(1, &i2c_adap->dev, "NAK from "
-					"device addr 0x%02x msg #%d\n",
-					msgs[i].addr, i);
-				goto bailout;
-			}
-		}
-		if (pmsg->flags & I2C_M_RD) {
-			/* read bytes into buffer*/
-			ret = readbytes(i2c_adap, pmsg);
-			if (ret >= 1)
-				bit_dbg(2, &i2c_adap->dev, "read %d byte%s\n",
-					ret, ret == 1 ? "" : "s");
-			if (ret < pmsg->len) {
-				if (ret >= 0)
-					ret = -EIO;
-				goto bailout;
-			}
-		} else {
-			/* write bytes from buffer */
-			ret = sendbytes(i2c_adap, pmsg);
-			if (ret >= 1)
-				bit_dbg(2, &i2c_adap->dev, "wrote %d byte%s\n",
-					ret, ret == 1 ? "" : "s");
-			if (ret < pmsg->len) {
-				if (ret >= 0)
-					ret = -EIO;
-				goto bailout;
-			}
-		}
-	}
-	ret = i;
-
-bailout:
-	bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
-	i2c_stop(adap);
-
-	if (adap->post_xfer)
-		adap->post_xfer(i2c_adap);
-	return ret;
-}
-
-static u32 bit_func(struct i2c_adapter *adap)
-{
-	return I2C_FUNC_I2C | I2C_FUNC_NOSTART | I2C_FUNC_SMBUS_EMUL |
-	       I2C_FUNC_SMBUS_READ_BLOCK_DATA |
-	       I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
-	       I2C_FUNC_10BIT_ADDR | I2C_FUNC_PROTOCOL_MANGLING;
-}
-
-/* -----exported algorithm data: -------------------------------------	*/
-
-const struct i2c_algorithm wb_i2c_bit_algo = {
-	.master_xfer	= bit_xfer,
-	.functionality	= bit_func,
-};
-EXPORT_SYMBOL(wb_i2c_bit_algo);
-
-static const struct i2c_adapter_quirks i2c_bit_quirk_no_clk_stretch = {
-	.flags = I2C_AQ_NO_CLK_STRETCH,
-};
-
-/*
- * registering functions to load algorithms at runtime
- */
-static int __i2c_bit_add_bus(struct i2c_adapter *adap,
-			     int (*add_adapter)(struct i2c_adapter *))
-{
-	struct i2c_algo_bit_data *bit_adap = adap->algo_data;
-	int ret;
-
-	if (bit_test) {
-		ret = test_bus(adap);
-		if (bit_test >= 2 && ret < 0)
-			return -ENODEV;
-	}
-
-	/* register new adapter to i2c module... */
-	adap->algo = &wb_i2c_bit_algo;
-	adap->retries = 3;
-	if (bit_adap->getscl == NULL)
-		adap->quirks = &i2c_bit_quirk_no_clk_stretch;
-
-	ret = add_adapter(adap);
-	if (ret < 0)
-		return ret;
-
-	/* Complain if SCL can't be read */
-	if (bit_adap->getscl == NULL) {
-		dev_warn(&adap->dev, "Not I2C compliant: can't read SCL\n");
-		dev_warn(&adap->dev, "Bus may be unreliable\n");
-	}
-	return 0;
-}
-
-int wb_i2c_bit_add_bus(struct i2c_adapter *adap)
-{
-	return __i2c_bit_add_bus(adap, i2c_add_adapter);
-}
-EXPORT_SYMBOL(wb_i2c_bit_add_bus);
-
-int wb_i2c_bit_add_numbered_bus(struct i2c_adapter *adap)
-{
-	return __i2c_bit_add_bus(adap, i2c_add_numbered_adapter);
-}
-EXPORT_SYMBOL(wb_i2c_bit_add_numbered_bus);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("I2C-Bus bit-banging algorithm");
-MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio.c
deleted file mode 100644
index 0362e905fddb..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio.c
+++ /dev/null
@@ -1,431 +0,0 @@
-/*
- * Bitbanging I2C bus driver using the GPIO API
- *
- * Copyright (C) 2007 Atmel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/debugfs.h>
-#include <linux/delay.h>
-#include <linux/i2c.h>
-#include <linux/i2c-algo-bit.h>
-#include <linux/platform_data/i2c-gpio.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/slab.h>
-#include <linux/platform_device.h>
-#include <linux/gpio/consumer.h>
-#include <linux/of.h>
-
-extern int wb_i2c_bit_add_numbered_bus(struct i2c_adapter *adap);
-
-struct i2c_gpio_private_data {
-	struct gpio_desc *sda;
-	struct gpio_desc *scl;
-	struct i2c_adapter adap;
-	struct i2c_algo_bit_data bit_data;
-	struct i2c_gpio_platform_data pdata;
-#ifdef CONFIG_I2C_GPIO_FAULT_INJECTOR
-	struct dentry *debug_dir;
-#endif
-};
-
-/*
- * Toggle SDA by changing the output value of the pin. This is only
- * valid for pins configured as open drain (i.e. setting the value
- * high effectively turns off the output driver.)
- */
-static void i2c_gpio_setsda_val(void *data, int state)
-{
-	struct i2c_gpio_private_data *priv = data;
-
-	gpiod_set_value_cansleep(priv->sda, state);
-}
-
-/*
- * Toggle SCL by changing the output value of the pin. This is used
- * for pins that are configured as open drain and for output-only
- * pins. The latter case will break the i2c protocol, but it will
- * often work in practice.
- */
-static void i2c_gpio_setscl_val(void *data, int state)
-{
-	struct i2c_gpio_private_data *priv = data;
-
-	gpiod_set_value_cansleep(priv->scl, state);
-}
-
-static int i2c_gpio_getsda(void *data)
-{
-	struct i2c_gpio_private_data *priv = data;
-
-	return gpiod_get_value_cansleep(priv->sda);
-}
-
-static int i2c_gpio_getscl(void *data)
-{
-	struct i2c_gpio_private_data *priv = data;
-
-	return gpiod_get_value_cansleep(priv->scl);
-}
-
-#ifdef CONFIG_I2C_GPIO_FAULT_INJECTOR
-static struct dentry *i2c_gpio_debug_dir;
-
-#define setsda(bd, val)	((bd)->setsda((bd)->data, val))
-#define setscl(bd, val)	((bd)->setscl((bd)->data, val))
-#define getsda(bd)	((bd)->getsda((bd)->data))
-#define getscl(bd)	((bd)->getscl((bd)->data))
-
-#define WIRE_ATTRIBUTE(wire) \
-static int fops_##wire##_get(void *data, u64 *val)		\
-{								\
-	struct i2c_gpio_private_data *priv = data;		\
-								\
-	i2c_lock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);	\
-	*val = get##wire(&priv->bit_data);			\
-	i2c_unlock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);	\
-	return 0;						\
-}								\
-static int fops_##wire##_set(void *data, u64 val)		\
-{								\
-	struct i2c_gpio_private_data *priv = data;		\
-								\
-	i2c_lock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);	\
-	set##wire(&priv->bit_data, val);			\
-	i2c_unlock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);	\
-	return 0;						\
-}								\
-DEFINE_DEBUGFS_ATTRIBUTE(fops_##wire, fops_##wire##_get, fops_##wire##_set, "%llu\n")
-
-WIRE_ATTRIBUTE(scl);
-WIRE_ATTRIBUTE(sda);
-
-static void i2c_gpio_incomplete_transfer(struct i2c_gpio_private_data *priv,
-					u32 pattern, u8 pattern_size)
-{
-	struct i2c_algo_bit_data *bit_data = &priv->bit_data;
-	int i;
-
-	i2c_lock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);
-
-	/* START condition */
-	setsda(bit_data, 0);
-	udelay(bit_data->udelay);
-
-	/* Send pattern, request ACK, don't send STOP */
-	for (i = pattern_size - 1; i >= 0; i--) {
-		setscl(bit_data, 0);
-		udelay(bit_data->udelay / 2);
-		setsda(bit_data, (pattern >> i) & 1);
-		udelay((bit_data->udelay + 1) / 2);
-		setscl(bit_data, 1);
-		udelay(bit_data->udelay);
-	}
-
-	i2c_unlock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);
-}
-
-static int fops_incomplete_addr_phase_set(void *data, u64 addr)
-{
-	struct i2c_gpio_private_data *priv = data;
-	u32 pattern;
-
-	if (addr > 0x7f)
-		return -EINVAL;
-
-	/* ADDR (7 bit) + RD (1 bit) + Client ACK, keep SDA hi (1 bit) */
-	pattern = (addr << 2) | 3;
-
-	i2c_gpio_incomplete_transfer(priv, pattern, 9);
-
-	return 0;
-}
-DEFINE_DEBUGFS_ATTRIBUTE(fops_incomplete_addr_phase, NULL, fops_incomplete_addr_phase_set, "%llu\n");
-
-static int fops_incomplete_write_byte_set(void *data, u64 addr)
-{
-	struct i2c_gpio_private_data *priv = data;
-	u32 pattern;
-
-	if (addr > 0x7f)
-		return -EINVAL;
-
-	/* ADDR (7 bit) + WR (1 bit) + Client ACK (1 bit) */
-	pattern = (addr << 2) | 1;
-	/* 0x00 (8 bit) + Client ACK, keep SDA hi (1 bit) */
-	pattern = (pattern << 9) | 1;
-
-	i2c_gpio_incomplete_transfer(priv, pattern, 18);
-
-	return 0;
-}
-DEFINE_DEBUGFS_ATTRIBUTE(fops_incomplete_write_byte, NULL, fops_incomplete_write_byte_set, "%llu\n");
-
-static void i2c_gpio_fault_injector_init(struct platform_device *pdev)
-{
-	struct i2c_gpio_private_data *priv = platform_get_drvdata(pdev);
-
-	/*
-	 * If there will be a debugfs-dir per i2c adapter somewhen, put the
-	 * 'fault-injector' dir there. Until then, we have a global dir with
-	 * all adapters as subdirs.
-	 */
-	if (!i2c_gpio_debug_dir) {
-		i2c_gpio_debug_dir = debugfs_create_dir("i2c-fault-injector", NULL);
-		if (!i2c_gpio_debug_dir)
-			return;
-	}
-
-	priv->debug_dir = debugfs_create_dir(pdev->name, i2c_gpio_debug_dir);
-	if (!priv->debug_dir)
-		return;
-
-	debugfs_create_file_unsafe("scl", 0600, priv->debug_dir, priv, &fops_scl);
-	debugfs_create_file_unsafe("sda", 0600, priv->debug_dir, priv, &fops_sda);
-	debugfs_create_file_unsafe("incomplete_address_phase", 0200, priv->debug_dir,
-				   priv, &fops_incomplete_addr_phase);
-	debugfs_create_file_unsafe("incomplete_write_byte", 0200, priv->debug_dir,
-				   priv, &fops_incomplete_write_byte);
-}
-
-static void i2c_gpio_fault_injector_exit(struct platform_device *pdev)
-{
-	struct i2c_gpio_private_data *priv = platform_get_drvdata(pdev);
-
-	debugfs_remove_recursive(priv->debug_dir);
-}
-#else
-static inline void i2c_gpio_fault_injector_init(struct platform_device *pdev) {}
-static inline void i2c_gpio_fault_injector_exit(struct platform_device *pdev) {}
-#endif /* CONFIG_I2C_GPIO_FAULT_INJECTOR*/
-
-static void of_i2c_gpio_get_props(struct device_node *np,
-				  struct i2c_gpio_platform_data *pdata)
-{
-	u32 reg;
-
-	of_property_read_u32(np, "i2c-gpio,delay-us", &pdata->udelay);
-
-	if (!of_property_read_u32(np, "i2c-gpio,timeout-ms", &reg))
-		pdata->timeout = msecs_to_jiffies(reg);
-
-	pdata->sda_is_open_drain =
-		of_property_read_bool(np, "i2c-gpio,sda-open-drain");
-	pdata->scl_is_open_drain =
-		of_property_read_bool(np, "i2c-gpio,scl-open-drain");
-	pdata->scl_is_output_only =
-		of_property_read_bool(np, "i2c-gpio,scl-output-only");
-}
-
-static struct gpio_desc *i2c_gpio_get_desc(struct device *dev,
-					   const char *con_id,
-					   unsigned int index,
-					   enum gpiod_flags gflags)
-{
-	struct gpio_desc *retdesc;
-	int ret;
-
-	retdesc = devm_gpiod_get(dev, con_id, gflags);
-	if (!IS_ERR(retdesc)) {
-		dev_dbg(dev, "got GPIO from name %s\n", con_id);
-		return retdesc;
-	}
-
-	retdesc = devm_gpiod_get_index(dev, NULL, index, gflags);
-	if (!IS_ERR(retdesc)) {
-		dev_dbg(dev, "got GPIO from index %u\n", index);
-		return retdesc;
-	}
-
-	ret = PTR_ERR(retdesc);
-
-	/* FIXME: hack in the old code, is this really necessary? */
-	if (ret == -EINVAL)
-		retdesc = ERR_PTR(-EPROBE_DEFER);
-
-	/* This happens if the GPIO driver is not yet probed, let's defer */
-	if (ret == -ENOENT)
-		retdesc = ERR_PTR(-EPROBE_DEFER);
-
-	if (PTR_ERR(retdesc) != -EPROBE_DEFER)
-		dev_err(dev, "error trying to get descriptor: %d\n", ret);
-
-	return retdesc;
-}
-
-static int i2c_gpio_probe(struct platform_device *pdev)
-{
-	struct i2c_gpio_private_data *priv;
-	struct i2c_gpio_platform_data *pdata;
-	struct i2c_algo_bit_data *bit_data;
-	struct i2c_adapter *adap;
-	struct device *dev = &pdev->dev;
-	struct device_node *np = dev->of_node;
-	enum gpiod_flags gflags;
-	int ret;
-
-	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
-	if (!priv)
-		return -ENOMEM;
-
-	adap = &priv->adap;
-	bit_data = &priv->bit_data;
-	pdata = &priv->pdata;
-
-	if (np) {
-		of_i2c_gpio_get_props(np, pdata);
-	} else {
-		/*
-		 * If all platform data settings are zero it is OK
-		 * to not provide any platform data from the board.
-		 */
-		if (dev_get_platdata(dev))
-			memcpy(pdata, dev_get_platdata(dev), sizeof(*pdata));
-	}
-
-	/*
-	 * First get the GPIO pins; if it fails, we'll defer the probe.
-	 * If the SDA line is marked from platform data or device tree as
-	 * "open drain" it means something outside of our control is making
-	 * this line being handled as open drain, and we should just handle
-	 * it as any other output. Else we enforce open drain as this is
-	 * required for an I2C bus.
-	 */
-	if (pdata->sda_is_open_drain)
-		gflags = GPIOD_OUT_HIGH;
-	else
-		gflags = GPIOD_OUT_HIGH_OPEN_DRAIN;
-	priv->sda = i2c_gpio_get_desc(dev, "sda", 0, gflags);
-	if (IS_ERR(priv->sda))
-		return PTR_ERR(priv->sda);
-
-	/*
-	 * If the SCL line is marked from platform data or device tree as
-	 * "open drain" it means something outside of our control is making
-	 * this line being handled as open drain, and we should just handle
-	 * it as any other output. Else we enforce open drain as this is
-	 * required for an I2C bus.
-	 */
-	if (pdata->scl_is_open_drain)
-		gflags = GPIOD_OUT_HIGH;
-	else
-		gflags = GPIOD_OUT_HIGH_OPEN_DRAIN;
-	priv->scl = i2c_gpio_get_desc(dev, "scl", 1, gflags);
-	if (IS_ERR(priv->scl))
-		return PTR_ERR(priv->scl);
-
-	if (gpiod_cansleep(priv->sda) || gpiod_cansleep(priv->scl))
-		dev_warn(dev, "Slow GPIO pins might wreak havoc into I2C/SMBus bus timing");
-
-	bit_data->setsda = i2c_gpio_setsda_val;
-	bit_data->setscl = i2c_gpio_setscl_val;
-
-	if (!pdata->scl_is_output_only)
-		bit_data->getscl = i2c_gpio_getscl;
-	bit_data->getsda = i2c_gpio_getsda;
-
-	if (pdata->udelay)
-		bit_data->udelay = pdata->udelay;
-	else if (pdata->scl_is_output_only)
-		bit_data->udelay = 50;			/* 10 kHz */
-	else
-		bit_data->udelay = 5;			/* 100 kHz */
-
-	if (pdata->timeout)
-		bit_data->timeout = pdata->timeout;
-	else
-		bit_data->timeout = HZ / 10;		/* 100 ms */
-
-	bit_data->data = priv;
-
-	adap->owner = THIS_MODULE;
-	if (np)
-		strlcpy(adap->name, dev_name(dev), sizeof(adap->name));
-	else
-		snprintf(adap->name, sizeof(adap->name), "i2c-gpio%d", pdev->id);
-
-	adap->algo_data = bit_data;
-	adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
-	adap->dev.parent = dev;
-	adap->dev.of_node = np;
-
-	adap->nr = pdev->id;
-	ret = wb_i2c_bit_add_numbered_bus(adap);
-	if (ret)
-		return ret;
-
-	platform_set_drvdata(pdev, priv);
-
-	/*
-	 * FIXME: using global GPIO numbers is not helpful. If/when we
-	 * get accessors to get the actual name of the GPIO line,
-	 * from the descriptor, then provide that instead.
-	 */
-	dev_info(dev, "using lines %u (SDA) and %u (SCL%s)\n",
-		 desc_to_gpio(priv->sda), desc_to_gpio(priv->scl),
-		 pdata->scl_is_output_only
-		 ? ", no clock stretching" : "");
-
-	i2c_gpio_fault_injector_init(pdev);
-
-	return 0;
-}
-
-static int i2c_gpio_remove(struct platform_device *pdev)
-{
-	struct i2c_gpio_private_data *priv;
-	struct i2c_adapter *adap;
-
-	i2c_gpio_fault_injector_exit(pdev);
-
-	priv = platform_get_drvdata(pdev);
-	adap = &priv->adap;
-
-	i2c_del_adapter(adap);
-
-	return 0;
-}
-
-#if defined(CONFIG_OF)
-static const struct of_device_id i2c_gpio_dt_ids[] = {
-	{ .compatible = "wb-i2c-gpio", },
-	{ /* sentinel */ }
-};
-
-MODULE_DEVICE_TABLE(of, i2c_gpio_dt_ids);
-#endif
-
-static struct platform_driver i2c_gpio_driver = {
-	.driver		= {
-		.name	= "wb-i2c-gpio",
-		.of_match_table	= of_match_ptr(i2c_gpio_dt_ids),
-	},
-	.probe		= i2c_gpio_probe,
-	.remove		= i2c_gpio_remove,
-};
-
-static int __init i2c_gpio_init(void)
-{
-	int ret;
-
-	ret = platform_driver_register(&i2c_gpio_driver);
-	if (ret)
-		printk(KERN_ERR "i2c-gpio: probe failed: %d\n", ret);
-
-	return ret;
-}
-subsys_initcall(i2c_gpio_init);
-
-static void __exit i2c_gpio_exit(void)
-{
-	platform_driver_unregister(&i2c_gpio_driver);
-}
-module_exit(i2c_gpio_exit);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("Platform-independent bitbanging I2C driver");
-MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform:i2c-gpio");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_i801.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_i801.c
deleted file mode 100644
index a733c115487e..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_i801.c
+++ /dev/null
@@ -1,2114 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
-    Copyright (c) 1998 - 2002  Frodo Looijaard <frodol@dds.nl>,
-    Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker
-    <mdsxyz123@yahoo.com>
-    Copyright (C) 2007 - 2014  Jean Delvare <jdelvare@suse.de>
-    Copyright (C) 2010         Intel Corporation,
-                               David Woodhouse <dwmw2@infradead.org>
-
-*/
-
-/*
- * Supports the following Intel I/O Controller Hubs (ICH):
- *
- *					I/O			Block	I2C
- *					region	SMBus	Block	proc.	block
- * Chip name			PCI ID	size	PEC	buffer	call	read
- * ---------------------------------------------------------------------------
- * 82801AA (ICH)		0x2413	16	no	no	no	no
- * 82801AB (ICH0)		0x2423	16	no	no	no	no
- * 82801BA (ICH2)		0x2443	16	no	no	no	no
- * 82801CA (ICH3)		0x2483	32	soft	no	no	no
- * 82801DB (ICH4)		0x24c3	32	hard	yes	no	no
- * 82801E (ICH5)		0x24d3	32	hard	yes	yes	yes
- * 6300ESB			0x25a4	32	hard	yes	yes	yes
- * 82801F (ICH6)		0x266a	32	hard	yes	yes	yes
- * 6310ESB/6320ESB		0x269b	32	hard	yes	yes	yes
- * 82801G (ICH7)		0x27da	32	hard	yes	yes	yes
- * 82801H (ICH8)		0x283e	32	hard	yes	yes	yes
- * 82801I (ICH9)		0x2930	32	hard	yes	yes	yes
- * EP80579 (Tolapai)		0x5032	32	hard	yes	yes	yes
- * ICH10			0x3a30	32	hard	yes	yes	yes
- * ICH10			0x3a60	32	hard	yes	yes	yes
- * 5/3400 Series (PCH)		0x3b30	32	hard	yes	yes	yes
- * 6 Series (PCH)		0x1c22	32	hard	yes	yes	yes
- * Patsburg (PCH)		0x1d22	32	hard	yes	yes	yes
- * Patsburg (PCH) IDF		0x1d70	32	hard	yes	yes	yes
- * Patsburg (PCH) IDF		0x1d71	32	hard	yes	yes	yes
- * Patsburg (PCH) IDF		0x1d72	32	hard	yes	yes	yes
- * DH89xxCC (PCH)		0x2330	32	hard	yes	yes	yes
- * Panther Point (PCH)		0x1e22	32	hard	yes	yes	yes
- * Lynx Point (PCH)		0x8c22	32	hard	yes	yes	yes
- * Lynx Point-LP (PCH)		0x9c22	32	hard	yes	yes	yes
- * Avoton (SOC)			0x1f3c	32	hard	yes	yes	yes
- * Wellsburg (PCH)		0x8d22	32	hard	yes	yes	yes
- * Wellsburg (PCH) MS		0x8d7d	32	hard	yes	yes	yes
- * Wellsburg (PCH) MS		0x8d7e	32	hard	yes	yes	yes
- * Wellsburg (PCH) MS		0x8d7f	32	hard	yes	yes	yes
- * Coleto Creek (PCH)		0x23b0	32	hard	yes	yes	yes
- * Wildcat Point (PCH)		0x8ca2	32	hard	yes	yes	yes
- * Wildcat Point-LP (PCH)	0x9ca2	32	hard	yes	yes	yes
- * BayTrail (SOC)		0x0f12	32	hard	yes	yes	yes
- * Braswell (SOC)		0x2292	32	hard	yes	yes	yes
- * Sunrise Point-H (PCH) 	0xa123  32	hard	yes	yes	yes
- * Sunrise Point-LP (PCH)	0x9d23	32	hard	yes	yes	yes
- * DNV (SOC)			0x19df	32	hard	yes	yes	yes
- * Emmitsburg (PCH)		0x1bc9	32	hard	yes	yes	yes
- * Broxton (SOC)		0x5ad4	32	hard	yes	yes	yes
- * Lewisburg (PCH)		0xa1a3	32	hard	yes	yes	yes
- * Lewisburg Supersku (PCH)	0xa223	32	hard	yes	yes	yes
- * Kaby Lake PCH-H (PCH)	0xa2a3	32	hard	yes	yes	yes
- * Gemini Lake (SOC)		0x31d4	32	hard	yes	yes	yes
- * Cannon Lake-H (PCH)		0xa323	32	hard	yes	yes	yes
- * Cannon Lake-LP (PCH)		0x9da3	32	hard	yes	yes	yes
- * Cedar Fork (PCH)		0x18df	32	hard	yes	yes	yes
- * Ice Lake-LP (PCH)		0x34a3	32	hard	yes	yes	yes
- * Comet Lake (PCH)		0x02a3	32	hard	yes	yes	yes
- * Comet Lake-H (PCH)		0x06a3	32	hard	yes	yes	yes
- * Elkhart Lake (PCH)		0x4b23	32	hard	yes	yes	yes
- * Tiger Lake-LP (PCH)		0xa0a3	32	hard	yes	yes	yes
- * Tiger Lake-H (PCH)		0x43a3	32	hard	yes	yes	yes
- * Jasper Lake (SOC)		0x4da3	32	hard	yes	yes	yes
- * Comet Lake-V (PCH)		0xa3a3	32	hard	yes	yes	yes
- * Alder Lake-S (PCH)		0x7aa3	32	hard	yes	yes	yes
- *
- * Features supported by this driver:
- * Software PEC				no
- * Hardware PEC				yes
- * Block buffer				yes
- * Block process call transaction	yes
- * I2C block read transaction		yes (doesn't use the block buffer)
- * Slave mode				no
- * SMBus Host Notify			yes
- * Interrupt processing			yes
- *
- * See the file Documentation/i2c/busses/i2c-i801.rst for details.
- */
-
-#include <linux/interrupt.h>
-#include <linux/module.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/stddef.h>
-#include <linux/delay.h>
-#include <linux/ioport.h>
-#include <linux/init.h>
-#include <linux/i2c.h>
-#include <linux/i2c-smbus.h>
-#include <linux/acpi.h>
-#include <linux/io.h>
-#include <linux/dmi.h>
-#include <linux/slab.h>
-#include <linux/string.h>
-#include <linux/wait.h>
-#include <linux/err.h>
-#include <linux/platform_device.h>
-#include <linux/platform_data/itco_wdt.h>
-#include <linux/pm_runtime.h>
-#include <linux/string.h>
-
-#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI
-#include <linux/gpio/machine.h>
-#include <linux/platform_data/i2c-mux-gpio.h>
-#endif
-
-#define mem_clear(data, size) memset((data), 0, (size))
-
-/* I801 SMBus address offsets */
-#define SMBHSTSTS(p)	(0 + (p)->smba)
-#define SMBHSTCNT(p)	(2 + (p)->smba)
-#define SMBHSTCMD(p)	(3 + (p)->smba)
-#define SMBHSTADD(p)	(4 + (p)->smba)
-#define SMBHSTDAT0(p)	(5 + (p)->smba)
-#define SMBHSTDAT1(p)	(6 + (p)->smba)
-#define SMBBLKDAT(p)	(7 + (p)->smba)
-#define SMBPEC(p)	(8 + (p)->smba)		/* ICH3 and later */
-#define SMBAUXSTS(p)	(12 + (p)->smba)	/* ICH4 and later */
-#define SMBAUXCTL(p)	(13 + (p)->smba)	/* ICH4 and later */
-#define SMBSLVSTS(p)	(16 + (p)->smba)	/* ICH3 and later */
-#define SMBSLVCMD(p)	(17 + (p)->smba)	/* ICH3 and later */
-#define SMBNTFDADD(p)	(20 + (p)->smba)	/* ICH3 and later */
-#define SMBPINCTL(p)	(15 + (p)->smba)	/* SMBus Pin Control Register */
-
-/* PCI Address Constants */
-#define SMBBAR		4
-#define SMBPCICTL	0x004
-#define SMBPCISTS	0x006
-#define SMBHSTCFG	0x040
-#define TCOBASE		0x050
-#define TCOCTL		0x054
-
-#define SBREG_BAR		0x10
-#define SBREG_SMBCTRL		0xc6000c
-#define SBREG_SMBCTRL_DNV	0xcf000c
-
-/* Host status bits for SMBPCISTS */
-#define SMBPCISTS_INTS		BIT(3)
-
-/* Control bits for SMBPCICTL */
-#define SMBPCICTL_INTDIS	BIT(10)
-
-/* Host configuration bits for SMBHSTCFG */
-#define SMBHSTCFG_HST_EN	BIT(0)
-#define SMBHSTCFG_SMB_SMI_EN	BIT(1)
-#define SMBHSTCFG_I2C_EN	BIT(2)
-#define SMBHSTCFG_SSRESET	BIT(3)
-#define SSRESET_SLEEP_TIME  1   /* 1us */
-#define SSRESET_RETRY_TIME  (1000 / SSRESET_SLEEP_TIME)
-
-/* Pin status for SMBPINCTL */
-#define SMBPINCTL_CLK_STS	1       /* bit0 SMBCLK_CUR_STS*/
-#define SMBPINCTL_SDA_STS	2       /* bit1 SMBDATA_CUR_STS*/
-#define SMBPINCTL_CLK_CTL	4       /* bit2 SMBCLK_CTL */
-
-#define SMBHSTCFG_SPD_WD	BIT(4)
-
-/* TCO configuration bits for TCOCTL */
-#define TCOCTL_EN		BIT(8)
-
-/* Auxiliary status register bits, ICH4+ only */
-#define SMBAUXSTS_CRCE		BIT(0)
-#define SMBAUXSTS_STCO		BIT(1)
-
-/* Auxiliary control register bits, ICH4+ only */
-#define SMBAUXCTL_CRC		BIT(0)
-#define SMBAUXCTL_E32B		BIT(1)
-
-/* Other settings */
-#define MAX_RETRIES		400
-
-/* I801 command constants */
-#define I801_QUICK		0x00
-#define I801_BYTE		0x04
-#define I801_BYTE_DATA		0x08
-#define I801_WORD_DATA		0x0C
-#define I801_PROC_CALL		0x10	/* unimplemented */
-#define I801_BLOCK_DATA		0x14
-#define I801_I2C_BLOCK_DATA	0x18	/* ICH5 and later */
-#define I801_BLOCK_PROC_CALL	0x1C
-
-/* I801 Host Control register bits */
-#define SMBHSTCNT_INTREN	BIT(0)
-#define SMBHSTCNT_KILL		BIT(1)
-#define SMBHSTCNT_LAST_BYTE	BIT(5)
-#define SMBHSTCNT_START		BIT(6)
-#define SMBHSTCNT_PEC_EN	BIT(7)	/* ICH3 and later */
-
-/* I801 Hosts Status register bits */
-#define SMBHSTSTS_BYTE_DONE	BIT(7)
-#define SMBHSTSTS_INUSE_STS	BIT(6)
-#define SMBHSTSTS_SMBALERT_STS	BIT(5)
-#define SMBHSTSTS_FAILED	BIT(4)
-#define SMBHSTSTS_BUS_ERR	BIT(3)
-#define SMBHSTSTS_DEV_ERR	BIT(2)
-#define SMBHSTSTS_INTR		BIT(1)
-#define SMBHSTSTS_HOST_BUSY	BIT(0)
-
-/* Host Notify Status register bits */
-#define SMBSLVSTS_HST_NTFY_STS	BIT(0)
-
-/* Host Notify Command register bits */
-#define SMBSLVCMD_HST_NTFY_INTREN	BIT(0)
-
-#define STATUS_ERROR_FLAGS	(SMBHSTSTS_FAILED | SMBHSTSTS_BUS_ERR | \
-				 SMBHSTSTS_DEV_ERR)
-
-#define STATUS_FLAGS		(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR | \
-				 STATUS_ERROR_FLAGS)
-
-/* Older devices have their ID defined in <linux/pci_ids.h> */
-#define PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS		0x02a3
-#define PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS		0x06a3
-#define PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS		0x0f12
-#define PCI_DEVICE_ID_INTEL_CDF_SMBUS			0x18df
-#define PCI_DEVICE_ID_INTEL_DNV_SMBUS			0x19df
-#define PCI_DEVICE_ID_INTEL_EBG_SMBUS			0x1bc9
-#define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS		0x1c22
-#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS		0x1d22
-/* Patsburg also has three 'Integrated Device Function' SMBus controllers */
-#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0		0x1d70
-#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1		0x1d71
-#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2		0x1d72
-#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS		0x1e22
-#define PCI_DEVICE_ID_INTEL_AVOTON_SMBUS		0x1f3c
-#define PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS		0x2292
-#define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS		0x2330
-#define PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS		0x23b0
-#define PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS		0x31d4
-#define PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS		0x34a3
-#define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS		0x3b30
-#define PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS		0x43a3
-#define PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS		0x4b23
-#define PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS		0x4da3
-#define PCI_DEVICE_ID_INTEL_BROXTON_SMBUS		0x5ad4
-#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS		0x7aa3
-#define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS		0x8c22
-#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS		0x8ca2
-#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS		0x8d22
-#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0		0x8d7d
-#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1		0x8d7e
-#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2		0x8d7f
-#define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS		0x9c22
-#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS	0x9ca2
-#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS	0x9d23
-#define PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS		0x9da3
-#define PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS		0xa0a3
-#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS	0xa123
-#define PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS		0xa1a3
-#define PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS	0xa223
-#define PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS	0xa2a3
-#define PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS		0xa323
-#define PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS		0xa3a3
-
-struct i801_mux_config {
-	char *gpio_chip;
-	unsigned values[3];
-	int n_values;
-	unsigned classes[3];
-	unsigned gpios[2];		/* Relative to gpio_chip->base */
-	int n_gpios;
-};
-
-struct i801_priv {
-	struct i2c_adapter adapter;
-	unsigned long smba;
-	unsigned char original_hstcfg;
-	unsigned char original_slvcmd;
-	struct pci_dev *pci_dev;
-	unsigned int features;
-
-	/* isr processing */
-	wait_queue_head_t waitq;
-	u8 status;
-
-	/* Command state used by isr for byte-by-byte block transactions */
-	u8 cmd;
-	bool is_read;
-	int count;
-	int len;
-	u8 *data;
-
-#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI
-	const struct i801_mux_config *mux_drvdata;
-	struct platform_device *mux_pdev;
-	struct gpiod_lookup_table *lookup;
-#endif
-	struct platform_device *tco_pdev;
-
-	/*
-	 * If set to true the host controller registers are reserved for
-	 * ACPI AML use. Protected by acpi_lock.
-	 */
-	bool acpi_reserved;
-	struct mutex acpi_lock;
-};
-
-#define FEATURE_SMBUS_PEC	BIT(0)
-#define FEATURE_BLOCK_BUFFER	BIT(1)
-#define FEATURE_BLOCK_PROC	BIT(2)
-#define FEATURE_I2C_BLOCK_READ	BIT(3)
-#define FEATURE_IRQ		BIT(4)
-#define FEATURE_HOST_NOTIFY	BIT(5)
-/* Not really a feature, but it's convenient to handle it as such */
-#define FEATURE_IDF		BIT(15)
-#define FEATURE_TCO_SPT		BIT(16)
-#define FEATURE_TCO_CNL		BIT(17)
-
-static const char *i801_feature_names[] = {
-	"SMBus PEC",
-	"Block buffer",
-	"Block process call",
-	"I2C block read",
-	"Interrupt",
-	"SMBus Host Notify",
-};
-
-static unsigned int disable_features;
-module_param(disable_features, uint, S_IRUGO | S_IWUSR);
-MODULE_PARM_DESC(disable_features, "Disable selected driver features:\n"
-	"\t\t  0x01  disable SMBus PEC\n"
-	"\t\t  0x02  disable the block buffer\n"
-	"\t\t  0x08  disable the I2C block read functionality\n"
-	"\t\t  0x10  don't use interrupts\n"
-	"\t\t  0x20  disable SMBus Host Notify ");
-
-static void i801_setscl(struct i801_priv *priv, unsigned int level)
-{
-    int pin_status;
-    pin_status = inb_p(SMBPINCTL(priv));
-    if (level == 0) {
-        pin_status &= (~SMBPINCTL_CLK_CTL);
-    }
-    else {
-        pin_status |= SMBPINCTL_CLK_CTL;
-    }
-    outb_p(pin_status, SMBPINCTL(priv));
-	return;
-}
-
-static void i801_i2c_unblock(struct i801_priv *priv)
-{
-    int i;
-    for (i = 0; i < 10; i++) {
-        i801_setscl(priv, 0);
-        udelay(5);
-        i801_setscl(priv, 1);
-        udelay(5);
-    }
-	return;
-}
-
-static int i801_check_i2c_unblock(struct i801_priv *priv)
-{
-	int pin_status;
-
-	pin_status = inb_p(SMBPINCTL(priv));
-    if ( (!(pin_status & SMBPINCTL_SDA_STS) ) && (pin_status & SMBPINCTL_CLK_STS) ) {
-        dev_dbg(&priv->pci_dev->dev, "SDA is low, send 9 clock to device!\n");
-        i801_i2c_unblock(priv);
-    }
-    return 0;
-}
-
-static void i801_do_reset(struct i801_priv *priv)
-{
-    unsigned char tmp;
-    unsigned int retry_count = 0;
-
-    pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &tmp);
-    tmp |= SMBHSTCFG_SSRESET;
-    pci_write_config_byte(priv->pci_dev, SMBHSTCFG, tmp);
-    pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &tmp);
-
-    while( ((tmp & SMBHSTCFG_SSRESET) != 0) && (retry_count < SSRESET_RETRY_TIME)) {
-        usleep_range(SSRESET_SLEEP_TIME, SSRESET_SLEEP_TIME + 1);
-        retry_count++;
-        pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &tmp);
-    }
-
-    return ;
-}
-
-static int i801_check_i2c_scl(struct i801_priv *priv)
-{
-	int pin_status;
-
-	pin_status = inb_p(SMBPINCTL(priv));
-    if ( (pin_status & SMBPINCTL_SDA_STS) && (pin_status & SMBPINCTL_CLK_STS) ) {
-        return 0;
-    }
-
-    dev_dbg(&priv->pci_dev->dev, "SDA or SCL is low, begin to reset SMBus adapter, pin_status: 0x%x\n",pin_status);
-    i801_do_reset(priv);
-    pin_status = inb_p(SMBPINCTL(priv));
-    if ( (pin_status & SMBPINCTL_SDA_STS) && (pin_status & SMBPINCTL_CLK_STS) ) {
-        return 0;
-    }
-    dev_warn(&priv->pci_dev->dev, "SDA or SCL is low.pin_status:0x%x\n",pin_status);
-    return -1;
-}
-
-/* Make sure the SMBus host is ready to start transmitting.
-   Return 0 if it is, -EBUSY if it is not. */
-static int i801_check_pre(struct i801_priv *priv)
-{
-	int status;
-
-	i801_check_i2c_unblock(priv);
-
-	if (i801_check_i2c_scl(priv)) {
-		return -EIO;
-	}
-
-	status = inb_p(SMBHSTSTS(priv));
-	if (status & SMBHSTSTS_HOST_BUSY) {
-		dev_dbg(&priv->pci_dev->dev, "SMBus is busy, begin to reset SMBus adapter!\n");
-
-		i801_do_reset(priv);
-
-		status = inb_p(SMBHSTSTS(priv));
-		if (status & SMBHSTSTS_HOST_BUSY) {
-			dev_err(&priv->pci_dev->dev, "SMBus is busy, can't use it!\n");
-			return -EBUSY;
-		}
-	}
-
-	status &= STATUS_FLAGS;
-	if (status) {
-		dev_dbg(&priv->pci_dev->dev, "Clearing status flags (%02x)\n",
-			status);
-		outb_p(status, SMBHSTSTS(priv));
-		status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS;
-		if (status) {
-			dev_err(&priv->pci_dev->dev,
-				"Failed clearing status flags (%02x)\n",
-				status);
-			return -EBUSY;
-		}
-	}
-
-	/*
-	 * Clear CRC status if needed.
-	 * During normal operation, i801_check_post() takes care
-	 * of it after every operation.  We do it here only in case
-	 * the hardware was already in this state when the driver
-	 * started.
-	 */
-	if (priv->features & FEATURE_SMBUS_PEC) {
-		status = inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE;
-		if (status) {
-			dev_dbg(&priv->pci_dev->dev,
-				"Clearing aux status flags (%02x)\n", status);
-			outb_p(status, SMBAUXSTS(priv));
-			status = inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE;
-			if (status) {
-				dev_err(&priv->pci_dev->dev,
-					"Failed clearing aux status flags (%02x)\n",
-					status);
-				return -EBUSY;
-			}
-		}
-	}
-
-	return 0;
-}
-
-/*
- * Convert the status register to an error code, and clear it.
- * Note that status only contains the bits we want to clear, not the
- * actual register value.
- */
-static int i801_check_post(struct i801_priv *priv, int status)
-{
-	int result = 0;
-
-	/*
-	 * If the SMBus is still busy, we give up
-	 * Note: This timeout condition only happens when using polling
-	 * transactions.  For interrupt operation, NAK/timeout is indicated by
-	 * DEV_ERR.
-	 */
-	if (unlikely(status < 0)) {
-		dev_err(&priv->pci_dev->dev, "Transaction timeout\n");
-		/* try to stop the current command */
-		dev_dbg(&priv->pci_dev->dev, "Terminating the current operation\n");
-		outb_p(SMBHSTCNT_KILL, SMBHSTCNT(priv));
-		usleep_range(1000, 2000);
-		outb_p(0, SMBHSTCNT(priv));
-
-		/* Check if it worked */
-		status = inb_p(SMBHSTSTS(priv));
-		if ((status & SMBHSTSTS_HOST_BUSY) ||
-		    !(status & SMBHSTSTS_FAILED))
-			dev_err(&priv->pci_dev->dev,
-				"Failed terminating the transaction\n");
-		outb_p(STATUS_FLAGS, SMBHSTSTS(priv));
-		return -ETIMEDOUT;
-	}
-
-	if (status & SMBHSTSTS_FAILED) {
-		result = -EIO;
-		dev_err(&priv->pci_dev->dev, "Transaction failed\n");
-	}
-	if (status & SMBHSTSTS_DEV_ERR) {
-		/*
-		 * This may be a PEC error, check and clear it.
-		 *
-		 * AUXSTS is handled differently from HSTSTS.
-		 * For HSTSTS, i801_isr() or i801_wait_intr()
-		 * has already cleared the error bits in hardware,
-		 * and we are passed a copy of the original value
-		 * in "status".
-		 * For AUXSTS, the hardware register is left
-		 * for us to handle here.
-		 * This is asymmetric, slightly iffy, but safe,
-		 * since all this code is serialized and the CRCE
-		 * bit is harmless as long as it's cleared before
-		 * the next operation.
-		 */
-		if ((priv->features & FEATURE_SMBUS_PEC) &&
-		    (inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE)) {
-			outb_p(SMBAUXSTS_CRCE, SMBAUXSTS(priv));
-			result = -EBADMSG;
-			dev_dbg(&priv->pci_dev->dev, "PEC error\n");
-		} else {
-			result = -ENXIO;
-			dev_dbg(&priv->pci_dev->dev, "No response\n");
-		}
-	}
-	if (status & SMBHSTSTS_BUS_ERR) {
-		result = -EAGAIN;
-		dev_dbg(&priv->pci_dev->dev, "Lost arbitration\n");
-	}
-
-	/* Clear status flags except BYTE_DONE, to be cleared by caller */
-	outb_p(status, SMBHSTSTS(priv));
-
-	return result;
-}
-
-/* Wait for BUSY being cleared and either INTR or an error flag being set */
-static int i801_wait_intr(struct i801_priv *priv)
-{
-	int timeout = 0;
-	int status;
-
-	/* We will always wait for a fraction of a second! */
-	do {
-		usleep_range(250, 500);
-		status = inb_p(SMBHSTSTS(priv));
-	} while (((status & SMBHSTSTS_HOST_BUSY) ||
-		  !(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR))) &&
-		 (timeout++ < MAX_RETRIES));
-
-	if (timeout > MAX_RETRIES) {
-		dev_dbg(&priv->pci_dev->dev, "INTR Timeout!\n");
-		return -ETIMEDOUT;
-	}
-	return status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR);
-}
-
-/* Wait for either BYTE_DONE or an error flag being set */
-static int i801_wait_byte_done(struct i801_priv *priv)
-{
-	int timeout = 0;
-	int status;
-
-	/* We will always wait for a fraction of a second! */
-	do {
-		usleep_range(250, 500);
-		status = inb_p(SMBHSTSTS(priv));
-	} while (!(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_BYTE_DONE)) &&
-		 (timeout++ < MAX_RETRIES));
-
-	if (timeout > MAX_RETRIES) {
-		dev_dbg(&priv->pci_dev->dev, "BYTE_DONE Timeout!\n");
-		return -ETIMEDOUT;
-	}
-	return status & STATUS_ERROR_FLAGS;
-}
-
-static int i801_transaction(struct i801_priv *priv, int xact)
-{
-	int status;
-	int result;
-	const struct i2c_adapter *adap = &priv->adapter;
-
-	result = i801_check_pre(priv);
-	if (result < 0)
-		return result;
-
-	if (priv->features & FEATURE_IRQ) {
-		outb_p(xact | SMBHSTCNT_INTREN | SMBHSTCNT_START,
-		       SMBHSTCNT(priv));
-		result = wait_event_timeout(priv->waitq,
-					    (status = priv->status),
-					    adap->timeout);
-		if (!result) {
-			status = -ETIMEDOUT;
-			dev_warn(&priv->pci_dev->dev,
-				 "Timeout waiting for interrupt!\n");
-		}
-		priv->status = 0;
-		return i801_check_post(priv, status);
-	}
-
-	/* the current contents of SMBHSTCNT can be overwritten, since PEC,
-	 * SMBSCMD are passed in xact */
-	outb_p(xact | SMBHSTCNT_START, SMBHSTCNT(priv));
-
-	status = i801_wait_intr(priv);
-	return i801_check_post(priv, status);
-}
-
-static int i801_block_transaction_by_block(struct i801_priv *priv,
-					   union i2c_smbus_data *data,
-					   char read_write, int command,
-					   int hwpec)
-{
-	int i, len;
-	int status;
-	int xact = hwpec ? SMBHSTCNT_PEC_EN : 0;
-
-	switch (command) {
-	case I2C_SMBUS_BLOCK_PROC_CALL:
-		xact |= I801_BLOCK_PROC_CALL;
-		break;
-	case I2C_SMBUS_BLOCK_DATA:
-		xact |= I801_BLOCK_DATA;
-		break;
-	default:
-		return -EOPNOTSUPP;
-	}
-
-	inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */
-
-	/* Use 32-byte buffer to process this transaction */
-	if (read_write == I2C_SMBUS_WRITE) {
-		len = data->block[0];
-		outb_p(len, SMBHSTDAT0(priv));
-		for (i = 0; i < len; i++)
-			outb_p(data->block[i+1], SMBBLKDAT(priv));
-	}
-
-	status = i801_transaction(priv, xact);
-	if (status)
-		return status;
-
-	if (read_write == I2C_SMBUS_READ ||
-	    command == I2C_SMBUS_BLOCK_PROC_CALL) {
-		len = inb_p(SMBHSTDAT0(priv));
-		if (len < 1 || len > I2C_SMBUS_BLOCK_MAX)
-			return -EPROTO;
-
-		data->block[0] = len;
-		for (i = 0; i < len; i++)
-			data->block[i + 1] = inb_p(SMBBLKDAT(priv));
-	}
-	return 0;
-}
-
-static void i801_isr_byte_done(struct i801_priv *priv)
-{
-	if (priv->is_read) {
-		/* For SMBus block reads, length is received with first byte */
-		if (((priv->cmd & 0x1c) == I801_BLOCK_DATA) &&
-		    (priv->count == 0)) {
-			priv->len = inb_p(SMBHSTDAT0(priv));
-			if (priv->len < 1 || priv->len > I2C_SMBUS_BLOCK_MAX) {
-				dev_err(&priv->pci_dev->dev,
-					"Illegal SMBus block read size %d\n",
-					priv->len);
-				/* FIXME: Recover */
-				priv->len = I2C_SMBUS_BLOCK_MAX;
-			} else {
-				dev_dbg(&priv->pci_dev->dev,
-					"SMBus block read size is %d\n",
-					priv->len);
-			}
-			priv->data[-1] = priv->len;
-		}
-
-		/* Read next byte */
-		if (priv->count < priv->len)
-			priv->data[priv->count++] = inb(SMBBLKDAT(priv));
-		else
-			dev_dbg(&priv->pci_dev->dev,
-				"Discarding extra byte on block read\n");
-
-		/* Set LAST_BYTE for last byte of read transaction */
-		if (priv->count == priv->len - 1)
-			outb_p(priv->cmd | SMBHSTCNT_LAST_BYTE,
-			       SMBHSTCNT(priv));
-	} else if (priv->count < priv->len - 1) {
-		/* Write next byte, except for IRQ after last byte */
-		outb_p(priv->data[++priv->count], SMBBLKDAT(priv));
-	}
-
-	/* Clear BYTE_DONE to continue with next byte */
-	outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv));
-}
-
-static irqreturn_t i801_host_notify_isr(struct i801_priv *priv)
-{
-	unsigned short addr;
-
-	addr = inb_p(SMBNTFDADD(priv)) >> 1;
-
-	/*
-	 * With the tested platforms, reading SMBNTFDDAT (22 + (p)->smba)
-	 * always returns 0. Our current implementation doesn't provide
-	 * data, so we just ignore it.
-	 */
-	i2c_handle_smbus_host_notify(&priv->adapter, addr);
-
-	/* clear Host Notify bit and return */
-	outb_p(SMBSLVSTS_HST_NTFY_STS, SMBSLVSTS(priv));
-	return IRQ_HANDLED;
-}
-
-/*
- * There are three kinds of interrupts:
- *
- * 1) i801 signals transaction completion with one of these interrupts:
- *      INTR - Success
- *      DEV_ERR - Invalid command, NAK or communication timeout
- *      BUS_ERR - SMI# transaction collision
- *      FAILED - transaction was canceled due to a KILL request
- *    When any of these occur, update ->status and wake up the waitq.
- *    ->status must be cleared before kicking off the next transaction.
- *
- * 2) For byte-by-byte (I2C read/write) transactions, one BYTE_DONE interrupt
- *    occurs for each byte of a byte-by-byte to prepare the next byte.
- *
- * 3) Host Notify interrupts
- */
-static irqreturn_t i801_isr(int irq, void *dev_id)
-{
-	struct i801_priv *priv = dev_id;
-	u16 pcists;
-	u8 status;
-
-	/* Confirm this is our interrupt */
-	pci_read_config_word(priv->pci_dev, SMBPCISTS, &pcists);
-	if (!(pcists & SMBPCISTS_INTS))
-		return IRQ_NONE;
-
-	if (priv->features & FEATURE_HOST_NOTIFY) {
-		status = inb_p(SMBSLVSTS(priv));
-		if (status & SMBSLVSTS_HST_NTFY_STS)
-			return i801_host_notify_isr(priv);
-	}
-
-	status = inb_p(SMBHSTSTS(priv));
-	if (status & SMBHSTSTS_BYTE_DONE)
-		i801_isr_byte_done(priv);
-
-	/*
-	 * Clear irq sources and report transaction result.
-	 * ->status must be cleared before the next transaction is started.
-	 */
-	status &= SMBHSTSTS_INTR | STATUS_ERROR_FLAGS;
-	if (status) {
-		outb_p(status, SMBHSTSTS(priv));
-		priv->status = status;
-		wake_up(&priv->waitq);
-	}
-
-	return IRQ_HANDLED;
-}
-
-/*
- * For "byte-by-byte" block transactions:
- *   I2C write uses cmd=I801_BLOCK_DATA, I2C_EN=1
- *   I2C read uses cmd=I801_I2C_BLOCK_DATA
- */
-static int i801_block_transaction_byte_by_byte(struct i801_priv *priv,
-					       union i2c_smbus_data *data,
-					       char read_write, int command,
-					       int hwpec)
-{
-	int i, len;
-	int smbcmd;
-	int status;
-	int result;
-	const struct i2c_adapter *adap = &priv->adapter;
-
-	if (command == I2C_SMBUS_BLOCK_PROC_CALL)
-		return -EOPNOTSUPP;
-
-	result = i801_check_pre(priv);
-	if (result < 0)
-		return result;
-
-	len = data->block[0];
-
-	if (read_write == I2C_SMBUS_WRITE) {
-		outb_p(len, SMBHSTDAT0(priv));
-		outb_p(data->block[1], SMBBLKDAT(priv));
-	}
-
-	if (command == I2C_SMBUS_I2C_BLOCK_DATA &&
-	    read_write == I2C_SMBUS_READ)
-		smbcmd = I801_I2C_BLOCK_DATA;
-	else
-		smbcmd = I801_BLOCK_DATA;
-
-	if (priv->features & FEATURE_IRQ) {
-		priv->is_read = (read_write == I2C_SMBUS_READ);
-		if (len == 1 && priv->is_read)
-			smbcmd |= SMBHSTCNT_LAST_BYTE;
-		priv->cmd = smbcmd | SMBHSTCNT_INTREN;
-		priv->len = len;
-		priv->count = 0;
-		priv->data = &data->block[1];
-
-		outb_p(priv->cmd | SMBHSTCNT_START, SMBHSTCNT(priv));
-		result = wait_event_timeout(priv->waitq,
-					    (status = priv->status),
-					    adap->timeout);
-		if (!result) {
-			status = -ETIMEDOUT;
-			dev_warn(&priv->pci_dev->dev,
-				 "Timeout waiting for interrupt!\n");
-		}
-		priv->status = 0;
-		return i801_check_post(priv, status);
-	}
-
-	for (i = 1; i <= len; i++) {
-		if (i == len && read_write == I2C_SMBUS_READ)
-			smbcmd |= SMBHSTCNT_LAST_BYTE;
-		outb_p(smbcmd, SMBHSTCNT(priv));
-
-		if (i == 1)
-			outb_p(inb(SMBHSTCNT(priv)) | SMBHSTCNT_START,
-			       SMBHSTCNT(priv));
-
-		status = i801_wait_byte_done(priv);
-		if (status)
-			goto exit;
-
-		if (i == 1 && read_write == I2C_SMBUS_READ
-		 && command != I2C_SMBUS_I2C_BLOCK_DATA) {
-			len = inb_p(SMBHSTDAT0(priv));
-			if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) {
-				dev_err(&priv->pci_dev->dev,
-					"Illegal SMBus block read size %d\n",
-					len);
-				/* Recover */
-				while (inb_p(SMBHSTSTS(priv)) &
-				       SMBHSTSTS_HOST_BUSY)
-					outb_p(SMBHSTSTS_BYTE_DONE,
-					       SMBHSTSTS(priv));
-				outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv));
-				return -EPROTO;
-			}
-			data->block[0] = len;
-		}
-
-		/* Retrieve/store value in SMBBLKDAT */
-		if (read_write == I2C_SMBUS_READ)
-			data->block[i] = inb_p(SMBBLKDAT(priv));
-		if (read_write == I2C_SMBUS_WRITE && i+1 <= len)
-			outb_p(data->block[i+1], SMBBLKDAT(priv));
-
-		/* signals SMBBLKDAT ready */
-		outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv));
-	}
-
-	status = i801_wait_intr(priv);
-exit:
-	return i801_check_post(priv, status);
-}
-
-static int i801_set_block_buffer_mode(struct i801_priv *priv)
-{
-	outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_E32B, SMBAUXCTL(priv));
-	if ((inb_p(SMBAUXCTL(priv)) & SMBAUXCTL_E32B) == 0)
-		return -EIO;
-	return 0;
-}
-
-/* Block transaction function */
-static int i801_block_transaction(struct i801_priv *priv,
-				  union i2c_smbus_data *data, char read_write,
-				  int command, int hwpec)
-{
-	int result = 0;
-	unsigned char hostc;
-
-	if (command == I2C_SMBUS_I2C_BLOCK_DATA) {
-		if (read_write == I2C_SMBUS_WRITE) {
-			/* set I2C_EN bit in configuration register */
-			pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &hostc);
-			pci_write_config_byte(priv->pci_dev, SMBHSTCFG,
-					      hostc | SMBHSTCFG_I2C_EN);
-		} else if (!(priv->features & FEATURE_I2C_BLOCK_READ)) {
-			dev_err(&priv->pci_dev->dev,
-				"I2C block read is unsupported!\n");
-			return -EOPNOTSUPP;
-		}
-	}
-
-	if (read_write == I2C_SMBUS_WRITE
-	 || command == I2C_SMBUS_I2C_BLOCK_DATA) {
-		if (data->block[0] < 1)
-			data->block[0] = 1;
-		if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
-			data->block[0] = I2C_SMBUS_BLOCK_MAX;
-	} else {
-		data->block[0] = 32;	/* max for SMBus block reads */
-	}
-
-	/* Experience has shown that the block buffer can only be used for
-	   SMBus (not I2C) block transactions, even though the datasheet
-	   doesn't mention this limitation. */
-	if ((priv->features & FEATURE_BLOCK_BUFFER)
-	 && command != I2C_SMBUS_I2C_BLOCK_DATA
-	 && i801_set_block_buffer_mode(priv) == 0)
-		result = i801_block_transaction_by_block(priv, data,
-							 read_write,
-							 command, hwpec);
-	else
-		result = i801_block_transaction_byte_by_byte(priv, data,
-							     read_write,
-							     command, hwpec);
-
-	if (command == I2C_SMBUS_I2C_BLOCK_DATA
-	 && read_write == I2C_SMBUS_WRITE) {
-		/* restore saved configuration register value */
-		pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc);
-	}
-	return result;
-}
-
-/* Return negative errno on error. */
-static s32 i801_access(struct i2c_adapter *adap, u16 addr,
-		       unsigned short flags, char read_write, u8 command,
-		       int size, union i2c_smbus_data *data)
-{
-	int hwpec;
-	int block = 0;
-	int ret = 0, xact = 0;
-	struct i801_priv *priv = i2c_get_adapdata(adap);
-
-	mutex_lock(&priv->acpi_lock);
-	if (priv->acpi_reserved) {
-		mutex_unlock(&priv->acpi_lock);
-		return -EBUSY;
-	}
-
-	pm_runtime_get_sync(&priv->pci_dev->dev);
-
-	hwpec = (priv->features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC)
-		&& size != I2C_SMBUS_QUICK
-		&& size != I2C_SMBUS_I2C_BLOCK_DATA;
-
-	switch (size) {
-	case I2C_SMBUS_QUICK:
-		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
-		       SMBHSTADD(priv));
-		xact = I801_QUICK;
-		break;
-	case I2C_SMBUS_BYTE:
-		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
-		       SMBHSTADD(priv));
-		if (read_write == I2C_SMBUS_WRITE)
-			outb_p(command, SMBHSTCMD(priv));
-		xact = I801_BYTE;
-		break;
-	case I2C_SMBUS_BYTE_DATA:
-		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
-		       SMBHSTADD(priv));
-		outb_p(command, SMBHSTCMD(priv));
-		if (read_write == I2C_SMBUS_WRITE)
-			outb_p(data->byte, SMBHSTDAT0(priv));
-		xact = I801_BYTE_DATA;
-		break;
-	case I2C_SMBUS_WORD_DATA:
-		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
-		       SMBHSTADD(priv));
-		outb_p(command, SMBHSTCMD(priv));
-		if (read_write == I2C_SMBUS_WRITE) {
-			outb_p(data->word & 0xff, SMBHSTDAT0(priv));
-			outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
-		}
-		xact = I801_WORD_DATA;
-		break;
-	case I2C_SMBUS_BLOCK_DATA:
-		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
-		       SMBHSTADD(priv));
-		outb_p(command, SMBHSTCMD(priv));
-		block = 1;
-		break;
-	case I2C_SMBUS_I2C_BLOCK_DATA:
-		/*
-		 * NB: page 240 of ICH5 datasheet shows that the R/#W
-		 * bit should be cleared here, even when reading.
-		 * However if SPD Write Disable is set (Lynx Point and later),
-		 * the read will fail if we don't set the R/#W bit.
-		 */
-		outb_p(((addr & 0x7f) << 1) |
-		       ((priv->original_hstcfg & SMBHSTCFG_SPD_WD) ?
-			(read_write & 0x01) : 0),
-		       SMBHSTADD(priv));
-		if (read_write == I2C_SMBUS_READ) {
-			/* NB: page 240 of ICH5 datasheet also shows
-			 * that DATA1 is the cmd field when reading */
-			outb_p(command, SMBHSTDAT1(priv));
-		} else
-			outb_p(command, SMBHSTCMD(priv));
-		block = 1;
-		break;
-	case I2C_SMBUS_BLOCK_PROC_CALL:
-		/*
-		 * Bit 0 of the slave address register always indicate a write
-		 * command.
-		 */
-		outb_p((addr & 0x7f) << 1, SMBHSTADD(priv));
-		outb_p(command, SMBHSTCMD(priv));
-		block = 1;
-		break;
-	default:
-		dev_err(&priv->pci_dev->dev, "Unsupported transaction %d\n",
-			size);
-		ret = -EOPNOTSUPP;
-		goto out;
-	}
-
-	if (hwpec)	/* enable/disable hardware PEC */
-		outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_CRC, SMBAUXCTL(priv));
-	else
-		outb_p(inb_p(SMBAUXCTL(priv)) & (~SMBAUXCTL_CRC),
-		       SMBAUXCTL(priv));
-
-	if (block)
-		ret = i801_block_transaction(priv, data, read_write, size,
-					     hwpec);
-	else
-		ret = i801_transaction(priv, xact);
-
-	/* Some BIOSes don't like it when PEC is enabled at reboot or resume
-	   time, so we forcibly disable it after every transaction. Turn off
-	   E32B for the same reason. */
-	if (hwpec || block)
-		outb_p(inb_p(SMBAUXCTL(priv)) &
-		       ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
-
-	if (block)
-		goto out;
-	if (ret)
-		goto out;
-	if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK))
-		goto out;
-
-	switch (xact & 0x7f) {
-	case I801_BYTE:	/* Result put in SMBHSTDAT0 */
-	case I801_BYTE_DATA:
-		data->byte = inb_p(SMBHSTDAT0(priv));
-		break;
-	case I801_WORD_DATA:
-		data->word = inb_p(SMBHSTDAT0(priv)) +
-			     (inb_p(SMBHSTDAT1(priv)) << 8);
-		break;
-	}
-
-out:
-	pm_runtime_mark_last_busy(&priv->pci_dev->dev);
-	pm_runtime_put_autosuspend(&priv->pci_dev->dev);
-	mutex_unlock(&priv->acpi_lock);
-	return ret;
-}
-
-static u32 i801_func(struct i2c_adapter *adapter)
-{
-	struct i801_priv *priv = i2c_get_adapdata(adapter);
-
-	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
-	       I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
-	       I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK |
-	       ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) |
-	       ((priv->features & FEATURE_BLOCK_PROC) ?
-		I2C_FUNC_SMBUS_BLOCK_PROC_CALL : 0) |
-	       ((priv->features & FEATURE_I2C_BLOCK_READ) ?
-		I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0) |
-	       ((priv->features & FEATURE_HOST_NOTIFY) ?
-		I2C_FUNC_SMBUS_HOST_NOTIFY : 0);
-}
-
-static void i801_enable_host_notify(struct i2c_adapter *adapter)
-{
-	struct i801_priv *priv = i2c_get_adapdata(adapter);
-
-	if (!(priv->features & FEATURE_HOST_NOTIFY))
-		return;
-
-	if (!(SMBSLVCMD_HST_NTFY_INTREN & priv->original_slvcmd))
-		outb_p(SMBSLVCMD_HST_NTFY_INTREN | priv->original_slvcmd,
-		       SMBSLVCMD(priv));
-
-	/* clear Host Notify bit to allow a new notification */
-	outb_p(SMBSLVSTS_HST_NTFY_STS, SMBSLVSTS(priv));
-}
-
-static void i801_disable_host_notify(struct i801_priv *priv)
-{
-	if (!(priv->features & FEATURE_HOST_NOTIFY))
-		return;
-
-	outb_p(priv->original_slvcmd, SMBSLVCMD(priv));
-}
-
-static const struct i2c_algorithm smbus_algorithm = {
-	.smbus_xfer	= i801_access,
-	.functionality	= i801_func,
-};
-
-static const struct pci_device_id i801_ids[] = {
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_2) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_3) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_3) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_3) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_4) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_16) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_17) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_17) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_5) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_6) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EP80579_1) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CDF_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EBG_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BROXTON_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS) },
-	{ 0, }
-};
-
-MODULE_DEVICE_TABLE(pci, i801_ids);
-
-#if defined CONFIG_X86 && defined CONFIG_DMI
-static unsigned char apanel_addr;
-
-/* Scan the system ROM for the signature "FJKEYINF" */
-static __init const void __iomem *bios_signature(const void __iomem *bios)
-{
-	ssize_t offset;
-	const unsigned char signature[] = "FJKEYINF";
-
-	for (offset = 0; offset < 0x10000; offset += 0x10) {
-		if (check_signature(bios + offset, signature,
-				    sizeof(signature)-1))
-			return bios + offset;
-	}
-	return NULL;
-}
-
-static void __init input_apanel_init(void)
-{
-	void __iomem *bios;
-	const void __iomem *p;
-
-	bios = ioremap(0xF0000, 0x10000); /* Can't fail */
-	p = bios_signature(bios);
-	if (p) {
-		/* just use the first address */
-		apanel_addr = readb(p + 8 + 3) >> 1;
-	}
-	iounmap(bios);
-}
-
-struct dmi_onboard_device_info {
-	const char *name;
-	u8 type;
-	unsigned short i2c_addr;
-	const char *i2c_type;
-};
-
-static const struct dmi_onboard_device_info dmi_devices[] = {
-	{ "Syleus", DMI_DEV_TYPE_OTHER, 0x73, "fscsyl" },
-	{ "Hermes", DMI_DEV_TYPE_OTHER, 0x73, "fscher" },
-	{ "Hades",  DMI_DEV_TYPE_OTHER, 0x73, "fschds" },
-};
-
-static void dmi_check_onboard_device(u8 type, const char *name,
-				     struct i2c_adapter *adap)
-{
-	int i;
-	struct i2c_board_info info;
-
-	for (i = 0; i < ARRAY_SIZE(dmi_devices); i++) {
-		/* & ~0x80, ignore enabled/disabled bit */
-		if ((type & ~0x80) != dmi_devices[i].type)
-			continue;
-		if (strcasecmp(name, dmi_devices[i].name))
-			continue;
-
-		mem_clear(&info, sizeof(struct i2c_board_info));
-		info.addr = dmi_devices[i].i2c_addr;
-		strlcpy(info.type, dmi_devices[i].i2c_type, I2C_NAME_SIZE);
-		i2c_new_client_device(adap, &info);
-		break;
-	}
-}
-
-/* We use our own function to check for onboard devices instead of
-   dmi_find_device() as some buggy BIOS's have the devices we are interested
-   in marked as disabled */
-static void dmi_check_onboard_devices(const struct dmi_header *dm, void *adap)
-{
-	int i, count;
-
-	if (dm->type != 10)
-		return;
-
-	count = (dm->length - sizeof(struct dmi_header)) / 2;
-	for (i = 0; i < count; i++) {
-		const u8 *d = (char *)(dm + 1) + (i * 2);
-		const char *name = ((char *) dm) + dm->length;
-		u8 type = d[0];
-		u8 s = d[1];
-
-		if (!s)
-			continue;
-		s--;
-		while (s > 0 && name[0]) {
-			name += strlen(name) + 1;
-			s--;
-		}
-		if (name[0] == 0) /* Bogus string reference */
-			continue;
-
-		dmi_check_onboard_device(type, name, adap);
-	}
-}
-
-/* NOTE: Keep this list in sync with drivers/platform/x86/dell-smo8800.c */
-static const char *const acpi_smo8800_ids[] = {
-	"SMO8800",
-	"SMO8801",
-	"SMO8810",
-	"SMO8811",
-	"SMO8820",
-	"SMO8821",
-	"SMO8830",
-	"SMO8831",
-};
-
-static acpi_status check_acpi_smo88xx_device(acpi_handle obj_handle,
-					     u32 nesting_level,
-					     void *context,
-					     void **return_value)
-{
-	struct acpi_device_info *info;
-	acpi_status status;
-	char *hid;
-	int i;
-
-	status = acpi_get_object_info(obj_handle, &info);
-	if (ACPI_FAILURE(status))
-		return AE_OK;
-
-	if (!(info->valid & ACPI_VALID_HID))
-		goto smo88xx_not_found;
-
-	hid = info->hardware_id.string;
-	if (!hid)
-		goto smo88xx_not_found;
-
-	i = match_string(acpi_smo8800_ids, ARRAY_SIZE(acpi_smo8800_ids), hid);
-	if (i < 0)
-		goto smo88xx_not_found;
-
-	kfree(info);
-
-	*((bool *)return_value) = true;
-	return AE_CTRL_TERMINATE;
-
-smo88xx_not_found:
-	kfree(info);
-	return AE_OK;
-}
-
-static bool is_dell_system_with_lis3lv02d(void)
-{
-	bool found;
-	const char *vendor;
-
-	vendor = dmi_get_system_info(DMI_SYS_VENDOR);
-	if (!vendor || strcmp(vendor, "Dell Inc."))
-		return false;
-
-	/*
-	 * Check that ACPI device SMO88xx is present and is functioning.
-	 * Function acpi_get_devices() already filters all ACPI devices
-	 * which are not present or are not functioning.
-	 * ACPI device SMO88xx represents our ST microelectronics lis3lv02d
-	 * accelerometer but unfortunately ACPI does not provide any other
-	 * information (like I2C address).
-	 */
-	found = false;
-	acpi_get_devices(NULL, check_acpi_smo88xx_device, NULL,
-			 (void **)&found);
-
-	return found;
-}
-
-/*
- * Accelerometer's I2C address is not specified in DMI nor ACPI,
- * so it is needed to define mapping table based on DMI product names.
- */
-static const struct {
-	const char *dmi_product_name;
-	unsigned short i2c_addr;
-} dell_lis3lv02d_devices[] = {
-	/*
-	 * Dell platform team told us that these Latitude devices have
-	 * ST microelectronics accelerometer at I2C address 0x29.
-	 */
-	{ "Latitude E5250",     0x29 },
-	{ "Latitude E5450",     0x29 },
-	{ "Latitude E5550",     0x29 },
-	{ "Latitude E6440",     0x29 },
-	{ "Latitude E6440 ATG", 0x29 },
-	{ "Latitude E6540",     0x29 },
-	/*
-	 * Additional individual entries were added after verification.
-	 */
-	{ "Latitude 5480",      0x29 },
-	{ "Vostro V131",        0x1d },
-};
-
-static void register_dell_lis3lv02d_i2c_device(struct i801_priv *priv)
-{
-	struct i2c_board_info info;
-	const char *dmi_product_name;
-	int i;
-
-	dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
-	for (i = 0; i < ARRAY_SIZE(dell_lis3lv02d_devices); ++i) {
-		if (strcmp(dmi_product_name,
-			   dell_lis3lv02d_devices[i].dmi_product_name) == 0)
-			break;
-	}
-
-	if (i == ARRAY_SIZE(dell_lis3lv02d_devices)) {
-		dev_warn(&priv->pci_dev->dev,
-			 "Accelerometer lis3lv02d is present on SMBus but its"
-			 " address is unknown, skipping registration\n");
-		return;
-	}
-
-	mem_clear(&info, sizeof(struct i2c_board_info));
-	info.addr = dell_lis3lv02d_devices[i].i2c_addr;
-	strlcpy(info.type, "lis3lv02d", I2C_NAME_SIZE);
-	i2c_new_client_device(&priv->adapter, &info);
-}
-
-/* Register optional slaves */
-static void i801_probe_optional_slaves(struct i801_priv *priv)
-{
-	/* Only register slaves on main SMBus channel */
-	if (priv->features & FEATURE_IDF)
-		return;
-
-	if (apanel_addr) {
-		struct i2c_board_info info;
-
-		mem_clear(&info, sizeof(struct i2c_board_info));
-		info.addr = apanel_addr;
-		strlcpy(info.type, "fujitsu_apanel", I2C_NAME_SIZE);
-		i2c_new_client_device(&priv->adapter, &info);
-	}
-
-	if (dmi_name_in_vendors("FUJITSU"))
-		dmi_walk(dmi_check_onboard_devices, &priv->adapter);
-
-	if (is_dell_system_with_lis3lv02d())
-		register_dell_lis3lv02d_i2c_device(priv);
-
-	/* Instantiate SPD EEPROMs unless the SMBus is multiplexed */
-#if IS_ENABLED(CONFIG_I2C_MUX_GPIO)
-	if (!priv->mux_drvdata)
-#endif
-		i2c_register_spd(&priv->adapter);
-}
-#else
-static void __init input_apanel_init(void) {}
-static void i801_probe_optional_slaves(struct i801_priv *priv) {}
-#endif	/* CONFIG_X86 && CONFIG_DMI */
-
-#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI
-static struct i801_mux_config i801_mux_config_asus_z8_d12 = {
-	.gpio_chip = "gpio_ich",
-	.values = { 0x02, 0x03 },
-	.n_values = 2,
-	.classes = { I2C_CLASS_SPD, I2C_CLASS_SPD },
-	.gpios = { 52, 53 },
-	.n_gpios = 2,
-};
-
-static struct i801_mux_config i801_mux_config_asus_z8_d18 = {
-	.gpio_chip = "gpio_ich",
-	.values = { 0x02, 0x03, 0x01 },
-	.n_values = 3,
-	.classes = { I2C_CLASS_SPD, I2C_CLASS_SPD, I2C_CLASS_SPD },
-	.gpios = { 52, 53 },
-	.n_gpios = 2,
-};
-
-static const struct dmi_system_id mux_dmi_table[] = {
-	{
-		.matches = {
-			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
-			DMI_MATCH(DMI_BOARD_NAME, "Z8NA-D6(C)"),
-		},
-		.driver_data = &i801_mux_config_asus_z8_d12,
-	},
-	{
-		.matches = {
-			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
-			DMI_MATCH(DMI_BOARD_NAME, "Z8P(N)E-D12(X)"),
-		},
-		.driver_data = &i801_mux_config_asus_z8_d12,
-	},
-	{
-		.matches = {
-			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
-			DMI_MATCH(DMI_BOARD_NAME, "Z8NH-D12"),
-		},
-		.driver_data = &i801_mux_config_asus_z8_d12,
-	},
-	{
-		.matches = {
-			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
-			DMI_MATCH(DMI_BOARD_NAME, "Z8PH-D12/IFB"),
-		},
-		.driver_data = &i801_mux_config_asus_z8_d12,
-	},
-	{
-		.matches = {
-			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
-			DMI_MATCH(DMI_BOARD_NAME, "Z8NR-D12"),
-		},
-		.driver_data = &i801_mux_config_asus_z8_d12,
-	},
-	{
-		.matches = {
-			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
-			DMI_MATCH(DMI_BOARD_NAME, "Z8P(N)H-D12"),
-		},
-		.driver_data = &i801_mux_config_asus_z8_d12,
-	},
-	{
-		.matches = {
-			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
-			DMI_MATCH(DMI_BOARD_NAME, "Z8PG-D18"),
-		},
-		.driver_data = &i801_mux_config_asus_z8_d18,
-	},
-	{
-		.matches = {
-			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
-			DMI_MATCH(DMI_BOARD_NAME, "Z8PE-D18"),
-		},
-		.driver_data = &i801_mux_config_asus_z8_d18,
-	},
-	{
-		.matches = {
-			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
-			DMI_MATCH(DMI_BOARD_NAME, "Z8PS-D12"),
-		},
-		.driver_data = &i801_mux_config_asus_z8_d12,
-	},
-	{ }
-};
-
-/* Setup multiplexing if needed */
-static int i801_add_mux(struct i801_priv *priv)
-{
-	struct device *dev = &priv->adapter.dev;
-	const struct i801_mux_config *mux_config;
-	struct i2c_mux_gpio_platform_data gpio_data;
-	struct gpiod_lookup_table *lookup;
-	int err, i;
-
-	if (!priv->mux_drvdata)
-		return 0;
-	mux_config = priv->mux_drvdata;
-
-	/* Prepare the platform data */
-	mem_clear(&gpio_data, sizeof(struct i2c_mux_gpio_platform_data));
-	gpio_data.parent = priv->adapter.nr;
-	gpio_data.values = mux_config->values;
-	gpio_data.n_values = mux_config->n_values;
-	gpio_data.classes = mux_config->classes;
-	gpio_data.idle = I2C_MUX_GPIO_NO_IDLE;
-
-	/* Register GPIO descriptor lookup table */
-	lookup = devm_kzalloc(dev,
-			      struct_size(lookup, table, mux_config->n_gpios + 1),
-			      GFP_KERNEL);
-	if (!lookup)
-		return -ENOMEM;
-	lookup->dev_id = "i2c-mux-gpio";
-	for (i = 0; i < mux_config->n_gpios; i++) {
-		lookup->table[i] = (struct gpiod_lookup)
-			GPIO_LOOKUP(mux_config->gpio_chip,
-				    mux_config->gpios[i], "mux", 0);
-	}
-	gpiod_add_lookup_table(lookup);
-	priv->lookup = lookup;
-
-	/*
-	 * Register the mux device, we use PLATFORM_DEVID_NONE here
-	 * because since we are referring to the GPIO chip by name we are
-	 * anyways in deep trouble if there is more than one of these
-	 * devices, and there should likely only be one platform controller
-	 * hub.
-	 */
-	priv->mux_pdev = platform_device_register_data(dev, "i2c-mux-gpio",
-				PLATFORM_DEVID_NONE, &gpio_data,
-				sizeof(struct i2c_mux_gpio_platform_data));
-	if (IS_ERR(priv->mux_pdev)) {
-		err = PTR_ERR(priv->mux_pdev);
-		gpiod_remove_lookup_table(lookup);
-		priv->mux_pdev = NULL;
-		dev_err(dev, "Failed to register i2c-mux-gpio device\n");
-		return err;
-	}
-
-	return 0;
-}
-
-static void i801_del_mux(struct i801_priv *priv)
-{
-	if (priv->mux_pdev)
-		platform_device_unregister(priv->mux_pdev);
-	if (priv->lookup)
-		gpiod_remove_lookup_table(priv->lookup);
-}
-
-static unsigned int i801_get_adapter_class(struct i801_priv *priv)
-{
-	const struct dmi_system_id *id;
-	const struct i801_mux_config *mux_config;
-	unsigned int class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
-	int i;
-
-	id = dmi_first_match(mux_dmi_table);
-	if (id) {
-		/* Remove branch classes from trunk */
-		mux_config = id->driver_data;
-		for (i = 0; i < mux_config->n_values; i++)
-			class &= ~mux_config->classes[i];
-
-		/* Remember for later */
-		priv->mux_drvdata = mux_config;
-	}
-
-	return class;
-}
-#else
-static inline int i801_add_mux(struct i801_priv *priv) { return 0; }
-static inline void i801_del_mux(struct i801_priv *priv) { }
-
-static inline unsigned int i801_get_adapter_class(struct i801_priv *priv)
-{
-	return I2C_CLASS_HWMON | I2C_CLASS_SPD;
-}
-#endif
-
-static const struct itco_wdt_platform_data spt_tco_platform_data = {
-	.name = "Intel PCH",
-	.version = 4,
-};
-
-static DEFINE_SPINLOCK(p2sb_spinlock);
-
-static struct platform_device *
-i801_add_tco_spt(struct i801_priv *priv, struct pci_dev *pci_dev,
-		 struct resource *tco_res)
-{
-	struct resource *res;
-	unsigned int devfn;
-	u64 base64_addr;
-	u32 base_addr;
-	u8 hidden;
-
-	/*
-	 * We must access the NO_REBOOT bit over the Primary to Sideband
-	 * bridge (P2SB). The BIOS prevents the P2SB device from being
-	 * enumerated by the PCI subsystem, so we need to unhide/hide it
-	 * to lookup the P2SB BAR.
-	 */
-	spin_lock(&p2sb_spinlock);
-
-	devfn = PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 1);
-
-	/* Unhide the P2SB device, if it is hidden */
-	pci_bus_read_config_byte(pci_dev->bus, devfn, 0xe1, &hidden);
-	if (hidden)
-		pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, 0x0);
-
-	pci_bus_read_config_dword(pci_dev->bus, devfn, SBREG_BAR, &base_addr);
-	base64_addr = base_addr & 0xfffffff0;
-
-	pci_bus_read_config_dword(pci_dev->bus, devfn, SBREG_BAR + 0x4, &base_addr);
-	base64_addr |= (u64)base_addr << 32;
-
-	/* Hide the P2SB device, if it was hidden before */
-	if (hidden)
-		pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, hidden);
-	spin_unlock(&p2sb_spinlock);
-
-	res = &tco_res[1];
-	if (pci_dev->device == PCI_DEVICE_ID_INTEL_DNV_SMBUS)
-		res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL_DNV;
-	else
-		res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL;
-
-	res->end = res->start + 3;
-	res->flags = IORESOURCE_MEM;
-
-	return platform_device_register_resndata(&pci_dev->dev, "iTCO_wdt", -1,
-					tco_res, 2, &spt_tco_platform_data,
-					sizeof(spt_tco_platform_data));
-}
-
-static const struct itco_wdt_platform_data cnl_tco_platform_data = {
-	.name = "Intel PCH",
-	.version = 6,
-};
-
-static struct platform_device *
-i801_add_tco_cnl(struct i801_priv *priv, struct pci_dev *pci_dev,
-		 struct resource *tco_res)
-{
-	return platform_device_register_resndata(&pci_dev->dev,
-			"iTCO_wdt", -1, tco_res, 1, &cnl_tco_platform_data,
-			sizeof(cnl_tco_platform_data));
-}
-
-static void i801_add_tco(struct i801_priv *priv)
-{
-	struct pci_dev *pci_dev = priv->pci_dev;
-	struct resource tco_res[2], *res;
-	u32 tco_base, tco_ctl;
-
-	/* If we have ACPI based watchdog use that instead */
-	if (acpi_has_watchdog())
-		return;
-
-	if (!(priv->features & (FEATURE_TCO_SPT | FEATURE_TCO_CNL)))
-		return;
-
-	pci_read_config_dword(pci_dev, TCOBASE, &tco_base);
-	pci_read_config_dword(pci_dev, TCOCTL, &tco_ctl);
-	if (!(tco_ctl & TCOCTL_EN))
-		return;
-
-	mem_clear(tco_res, sizeof(tco_res));
-	/*
-	 * Always populate the main iTCO IO resource here. The second entry
-	 * for NO_REBOOT MMIO is filled by the SPT specific function.
-	 */
-	res = &tco_res[0];
-	res->start = tco_base & ~1;
-	res->end = res->start + 32 - 1;
-	res->flags = IORESOURCE_IO;
-
-	if (priv->features & FEATURE_TCO_CNL)
-		priv->tco_pdev = i801_add_tco_cnl(priv, pci_dev, tco_res);
-	else
-		priv->tco_pdev = i801_add_tco_spt(priv, pci_dev, tco_res);
-
-	if (IS_ERR(priv->tco_pdev))
-		dev_warn(&pci_dev->dev, "failed to create iTCO device\n");
-}
-
-#ifdef CONFIG_ACPI
-static bool i801_acpi_is_smbus_ioport(const struct i801_priv *priv,
-				      acpi_physical_address address)
-{
-	return address >= priv->smba &&
-	       address <= pci_resource_end(priv->pci_dev, SMBBAR);
-}
-
-static acpi_status
-i801_acpi_io_handler(u32 function, acpi_physical_address address, u32 bits,
-		     u64 *value, void *handler_context, void *region_context)
-{
-	struct i801_priv *priv = handler_context;
-	struct pci_dev *pdev = priv->pci_dev;
-	acpi_status status;
-
-	/*
-	 * Once BIOS AML code touches the OpRegion we warn and inhibit any
-	 * further access from the driver itself. This device is now owned
-	 * by the system firmware.
-	 */
-	mutex_lock(&priv->acpi_lock);
-
-	if (!priv->acpi_reserved && i801_acpi_is_smbus_ioport(priv, address)) {
-		priv->acpi_reserved = true;
-
-		dev_warn(&pdev->dev, "BIOS is accessing SMBus registers\n");
-		dev_warn(&pdev->dev, "Driver SMBus register access inhibited\n");
-
-		/*
-		 * BIOS is accessing the host controller so prevent it from
-		 * suspending automatically from now on.
-		 */
-		pm_runtime_get_sync(&pdev->dev);
-	}
-
-	if ((function & ACPI_IO_MASK) == ACPI_READ)
-		status = acpi_os_read_port(address, (u32 *)value, bits);
-	else
-		status = acpi_os_write_port(address, (u32)*value, bits);
-
-	mutex_unlock(&priv->acpi_lock);
-
-	return status;
-}
-
-static int i801_acpi_probe(struct i801_priv *priv)
-{
-	struct acpi_device *adev;
-	acpi_status status;
-
-	adev = ACPI_COMPANION(&priv->pci_dev->dev);
-	if (adev) {
-		status = acpi_install_address_space_handler(adev->handle,
-				ACPI_ADR_SPACE_SYSTEM_IO, i801_acpi_io_handler,
-				NULL, priv);
-		if (ACPI_SUCCESS(status))
-			return 0;
-	}
-
-	return acpi_check_resource_conflict(&priv->pci_dev->resource[SMBBAR]);
-}
-
-static void i801_acpi_remove(struct i801_priv *priv)
-{
-	struct acpi_device *adev;
-
-	adev = ACPI_COMPANION(&priv->pci_dev->dev);
-	if (!adev)
-		return;
-
-	acpi_remove_address_space_handler(adev->handle,
-		ACPI_ADR_SPACE_SYSTEM_IO, i801_acpi_io_handler);
-
-	mutex_lock(&priv->acpi_lock);
-	if (priv->acpi_reserved)
-		pm_runtime_put(&priv->pci_dev->dev);
-	mutex_unlock(&priv->acpi_lock);
-}
-#else
-static inline int i801_acpi_probe(struct i801_priv *priv) { return 0; }
-static inline void i801_acpi_remove(struct i801_priv *priv) { }
-#endif
-
-static unsigned char i801_setup_hstcfg(struct i801_priv *priv)
-{
-	unsigned char hstcfg = priv->original_hstcfg;
-
-	hstcfg &= ~SMBHSTCFG_I2C_EN;	/* SMBus timing */
-	hstcfg |= SMBHSTCFG_HST_EN;
-	pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hstcfg);
-	return hstcfg;
-}
-
-static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
-{
-	unsigned char temp;
-	int err, i;
-	struct i801_priv *priv;
-
-	priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL);
-	if (!priv)
-		return -ENOMEM;
-
-	i2c_set_adapdata(&priv->adapter, priv);
-	priv->adapter.owner = THIS_MODULE;
-	priv->adapter.class = i801_get_adapter_class(priv);
-	priv->adapter.algo = &smbus_algorithm;
-	priv->adapter.dev.parent = &dev->dev;
-	ACPI_COMPANION_SET(&priv->adapter.dev, ACPI_COMPANION(&dev->dev));
-	priv->adapter.retries = 3;
-	mutex_init(&priv->acpi_lock);
-
-	priv->pci_dev = dev;
-	switch (dev->device) {
-	case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS:
-	case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS:
-	case PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS:
-	case PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS:
-	case PCI_DEVICE_ID_INTEL_DNV_SMBUS:
-	case PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS:
-	case PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS:
-		priv->features |= FEATURE_BLOCK_PROC;
-		priv->features |= FEATURE_I2C_BLOCK_READ;
-		priv->features |= FEATURE_IRQ;
-		priv->features |= FEATURE_SMBUS_PEC;
-		priv->features |= FEATURE_BLOCK_BUFFER;
-		priv->features |= FEATURE_TCO_SPT;
-		priv->features |= FEATURE_HOST_NOTIFY;
-		break;
-
-	case PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS:
-	case PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS:
-	case PCI_DEVICE_ID_INTEL_CDF_SMBUS:
-	case PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS:
-	case PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS:
-	case PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS:
-	case PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS:
-	case PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS:
-	case PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS:
-	case PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS:
-	case PCI_DEVICE_ID_INTEL_EBG_SMBUS:
-	case PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS:
-		priv->features |= FEATURE_BLOCK_PROC;
-		priv->features |= FEATURE_I2C_BLOCK_READ;
-		priv->features |= FEATURE_IRQ;
-		priv->features |= FEATURE_SMBUS_PEC;
-		priv->features |= FEATURE_BLOCK_BUFFER;
-		priv->features |= FEATURE_TCO_CNL;
-		priv->features |= FEATURE_HOST_NOTIFY;
-		break;
-
-	case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0:
-	case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1:
-	case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2:
-	case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0:
-	case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1:
-	case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2:
-		priv->features |= FEATURE_IDF;
-		fallthrough;
-	default:
-		priv->features |= FEATURE_BLOCK_PROC;
-		priv->features |= FEATURE_I2C_BLOCK_READ;
-		priv->features |= FEATURE_IRQ;
-		fallthrough;
-	case PCI_DEVICE_ID_INTEL_82801DB_3:
-		priv->features |= FEATURE_SMBUS_PEC;
-		priv->features |= FEATURE_BLOCK_BUFFER;
-		fallthrough;
-	case PCI_DEVICE_ID_INTEL_82801CA_3:
-		priv->features |= FEATURE_HOST_NOTIFY;
-		fallthrough;
-	case PCI_DEVICE_ID_INTEL_82801BA_2:
-	case PCI_DEVICE_ID_INTEL_82801AB_3:
-	case PCI_DEVICE_ID_INTEL_82801AA_3:
-		break;
-	}
-
-	/* Disable features on user request */
-	for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) {
-		if (priv->features & disable_features & (1 << i))
-			dev_notice(&dev->dev, "%s disabled by user\n",
-				   i801_feature_names[i]);
-	}
-	priv->features &= ~disable_features;
-
-	err = pcim_enable_device(dev);
-	if (err) {
-		dev_err(&dev->dev, "Failed to enable SMBus PCI device (%d)\n",
-			err);
-		return err;
-	}
-	pcim_pin_device(dev);
-
-	/* Determine the address of the SMBus area */
-	priv->smba = pci_resource_start(dev, SMBBAR);
-	if (!priv->smba) {
-		dev_err(&dev->dev,
-			"SMBus base address uninitialized, upgrade BIOS\n");
-		return -ENODEV;
-	}
-
-	if (i801_acpi_probe(priv))
-		return -ENODEV;
-
-	err = pcim_iomap_regions(dev, 1 << SMBBAR,
-				 dev_driver_string(&dev->dev));
-	if (err) {
-		dev_err(&dev->dev,
-			"Failed to request SMBus region 0x%lx-0x%Lx\n",
-			priv->smba,
-			(unsigned long long)pci_resource_end(dev, SMBBAR));
-		i801_acpi_remove(priv);
-		return err;
-	}
-
-	pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &priv->original_hstcfg);
-	temp = i801_setup_hstcfg(priv);
-	if (!(priv->original_hstcfg & SMBHSTCFG_HST_EN))
-		dev_info(&dev->dev, "Enabling SMBus device\n");
-
-	if (temp & SMBHSTCFG_SMB_SMI_EN) {
-		dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n");
-		/* Disable SMBus interrupt feature if SMBus using SMI# */
-		priv->features &= ~FEATURE_IRQ;
-	}
-	if (temp & SMBHSTCFG_SPD_WD)
-		dev_info(&dev->dev, "SPD Write Disable is set\n");
-
-	/* Clear special mode bits */
-	if (priv->features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER))
-		outb_p(inb_p(SMBAUXCTL(priv)) &
-		       ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
-
-	/* Remember original Host Notify setting */
-	if (priv->features & FEATURE_HOST_NOTIFY)
-		priv->original_slvcmd = inb_p(SMBSLVCMD(priv));
-
-	/* Default timeout in interrupt mode: 200 ms */
-	priv->adapter.timeout = HZ / 5;
-
-	if (dev->irq == IRQ_NOTCONNECTED)
-		priv->features &= ~FEATURE_IRQ;
-
-	if (priv->features & FEATURE_IRQ) {
-		u16 pcictl, pcists;
-
-		/* Complain if an interrupt is already pending */
-		pci_read_config_word(priv->pci_dev, SMBPCISTS, &pcists);
-		if (pcists & SMBPCISTS_INTS)
-			dev_warn(&dev->dev, "An interrupt is pending!\n");
-
-		/* Check if interrupts have been disabled */
-		pci_read_config_word(priv->pci_dev, SMBPCICTL, &pcictl);
-		if (pcictl & SMBPCICTL_INTDIS) {
-			dev_info(&dev->dev, "Interrupts are disabled\n");
-			priv->features &= ~FEATURE_IRQ;
-		}
-	}
-
-	if (priv->features & FEATURE_IRQ) {
-		init_waitqueue_head(&priv->waitq);
-
-		err = devm_request_irq(&dev->dev, dev->irq, i801_isr,
-				       IRQF_SHARED,
-				       dev_driver_string(&dev->dev), priv);
-		if (err) {
-			dev_err(&dev->dev, "Failed to allocate irq %d: %d\n",
-				dev->irq, err);
-			priv->features &= ~FEATURE_IRQ;
-		}
-	}
-	dev_info(&dev->dev, "SMBus using %s\n",
-		 priv->features & FEATURE_IRQ ? "PCI interrupt" : "polling");
-
-	i801_add_tco(priv);
-
-	snprintf(priv->adapter.name, sizeof(priv->adapter.name),
-		"SMBus I801 adapter at %04lx", priv->smba);
-	err = i2c_add_adapter(&priv->adapter);
-	if (err) {
-		i801_acpi_remove(priv);
-		return err;
-	}
-
-	i801_enable_host_notify(&priv->adapter);
-
-	i801_probe_optional_slaves(priv);
-	/* We ignore errors - multiplexing is optional */
-	i801_add_mux(priv);
-
-	pci_set_drvdata(dev, priv);
-
-	dev_pm_set_driver_flags(&dev->dev, DPM_FLAG_NO_DIRECT_COMPLETE);
-	pm_runtime_set_autosuspend_delay(&dev->dev, 1000);
-	pm_runtime_use_autosuspend(&dev->dev);
-	pm_runtime_put_autosuspend(&dev->dev);
-	pm_runtime_allow(&dev->dev);
-	dev_info(&dev->dev, "wb-i2c-i801 probe ok.\n");
-
-	return 0;
-}
-
-static void i801_remove(struct pci_dev *dev)
-{
-	struct i801_priv *priv = pci_get_drvdata(dev);
-
-	pm_runtime_forbid(&dev->dev);
-	pm_runtime_get_noresume(&dev->dev);
-
-	i801_disable_host_notify(priv);
-	i801_del_mux(priv);
-	i2c_del_adapter(&priv->adapter);
-	i801_acpi_remove(priv);
-	pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
-
-	platform_device_unregister(priv->tco_pdev);
-
-	/*
-	 * do not call pci_disable_device(dev) since it can cause hard hangs on
-	 * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010)
-	 */
-}
-
-static void i801_shutdown(struct pci_dev *dev)
-{
-	struct i801_priv *priv = pci_get_drvdata(dev);
-
-	/* Restore config registers to avoid hard hang on some systems */
-	i801_disable_host_notify(priv);
-	pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
-}
-
-#ifdef CONFIG_PM_SLEEP
-static int i801_suspend(struct device *dev)
-{
-	struct i801_priv *priv = dev_get_drvdata(dev);
-
-	pci_write_config_byte(priv->pci_dev, SMBHSTCFG, priv->original_hstcfg);
-	return 0;
-}
-
-static int i801_resume(struct device *dev)
-{
-	struct i801_priv *priv = dev_get_drvdata(dev);
-
-	i801_setup_hstcfg(priv);
-	i801_enable_host_notify(&priv->adapter);
-
-	return 0;
-}
-#endif
-
-static SIMPLE_DEV_PM_OPS(i801_pm_ops, i801_suspend, i801_resume);
-
-static struct pci_driver i801_driver = {
-	.name		= "wb_i801_smbus",
-	.id_table	= i801_ids,
-	.probe		= i801_probe,
-	.remove		= i801_remove,
-	.shutdown	= i801_shutdown,
-	.driver		= {
-		.pm	= &i801_pm_ops,
-	},
-};
-
-static int __init i2c_i801_init(void)
-{
-	if (dmi_name_in_vendors("FUJITSU"))
-		input_apanel_init();
-	return pci_register_driver(&i801_driver);
-}
-
-static void __exit i2c_i801_exit(void)
-{
-	pci_unregister_driver(&i801_driver);
-}
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("I801 SMBus driver");
-MODULE_LICENSE("GPL");
-
-module_init(i2c_i801_init);
-module_exit(i2c_i801_exit);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_ismt.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_ismt.c
deleted file mode 100644
index 94a3ed827209..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_ismt.c
+++ /dev/null
@@ -1,1131 +0,0 @@
-/*
- * This file is provided under a dual BSD/GPLv2 license.  When using or
- * redistributing this file, you may do so under either license.
- *
- * Copyright(c) 2012 Intel Corporation. All rights reserved.
- *
- * GPL LICENSE SUMMARY
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- * The full GNU General Public License is included in this distribution
- * in the file called LICENSE.GPL.
- *
- * BSD LICENSE
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- *   * Redistributions of source code must retain the above copyright
- *     notice, this list of conditions and the following disclaimer.
- *   * Redistributions in binary form must reproduce the above copyright
- *     notice, this list of conditions and the following disclaimer in
- *     the documentation and/or other materials provided with the
- *     distribution.
- *   * Neither the name of Intel Corporation nor the names of its
- *     contributors may be used to endorse or promote products derived
- *     from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- *  Supports the SMBus Message Transport (SMT) in the Intel Atom Processor
- *  S12xx Product Family.
- *
- *  Features supported by this driver:
- *  Hardware PEC                     yes
- *  Block buffer                     yes
- *  Block process call transaction   yes
- *  Slave mode                       no
- */
-
-#include <linux/module.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/stddef.h>
-#include <linux/completion.h>
-#include <linux/dma-mapping.h>
-#include <linux/i2c.h>
-#include <linux/acpi.h>
-#include <linux/interrupt.h>
-#include <linux/delay.h>
-
-#include <linux/io-64-nonatomic-lo-hi.h>
-#include <linux/string.h>
-
-#define mem_clear(data, size) memset((data), 0, (size))
-
-/* PCI Address Constants */
-#define SMBBAR		0
-
-#define ISMT_DBCTRL		0x388	/* ISMT PIN Control Register */
-#define ISMT_DBSTS		0X38C	/* ISMT PIN Status Register */
-
-#define ISMT_DBSTS_CLK_STS	(1<<9)	/* bit9 SMBCLK_CUR_STS */
-#define ISMT_DBSTS_SDA_STS	(1<<8)	/* bit8 SMBDATA_CUR_STS */
-#define ISMT_DBCTRL_CLK_CTL	(1<<1)	/* bit1 SMBCLK_CTL */
-#define ISMT_DBCTRL_ENABLE	(1<<31)	/* bit31 EN */
-
-/* PCI DIDs for the Intel SMBus Message Transport (SMT) Devices */
-#define PCI_DEVICE_ID_INTEL_S1200_SMT0	0x0c59
-#define PCI_DEVICE_ID_INTEL_S1200_SMT1	0x0c5a
-#define PCI_DEVICE_ID_INTEL_CDF_SMT	0x18ac
-#define PCI_DEVICE_ID_INTEL_DNV_SMT	0x19ac
-#define PCI_DEVICE_ID_INTEL_EBG_SMT	0x1bff
-#define PCI_DEVICE_ID_INTEL_AVOTON_SMT	0x1f15
-
-#define ISMT_DESC_ENTRIES	2	/* number of descriptor entries */
-#define ISMT_MAX_RETRIES	3	/* number of SMBus retries to attempt */
-#define ISMT_LOG_ENTRIES	3	/* number of interrupt cause log entries */
-
-/* Hardware Descriptor Constants - Control Field */
-#define ISMT_DESC_CWRL	0x01	/* Command/Write Length */
-#define ISMT_DESC_BLK	0X04	/* Perform Block Transaction */
-#define ISMT_DESC_FAIR	0x08	/* Set fairness flag upon successful arbit. */
-#define ISMT_DESC_PEC	0x10	/* Packet Error Code */
-#define ISMT_DESC_I2C	0x20	/* I2C Enable */
-#define ISMT_DESC_INT	0x40	/* Interrupt */
-#define ISMT_DESC_SOE	0x80	/* Stop On Error */
-
-/* Hardware Descriptor Constants - Status Field */
-#define ISMT_DESC_SCS	0x01	/* Success */
-#define ISMT_DESC_DLTO	0x04	/* Data Low Time Out */
-#define ISMT_DESC_NAK	0x08	/* NAK Received */
-#define ISMT_DESC_CRC	0x10	/* CRC Error */
-#define ISMT_DESC_CLTO	0x20	/* Clock Low Time Out */
-#define ISMT_DESC_COL	0x40	/* Collisions */
-#define ISMT_DESC_LPR	0x80	/* Large Packet Received */
-
-/* Macros */
-#define ISMT_DESC_ADDR_RW(addr, rw) (((addr) << 1) | (rw))
-
-/* iSMT General Register address offsets (SMBBAR + <addr>) */
-#define ISMT_GR_GCTRL		0x000	/* General Control */
-#define ISMT_GR_SMTICL		0x008	/* SMT Interrupt Cause Location */
-#define ISMT_GR_ERRINTMSK	0x010	/* Error Interrupt Mask */
-#define ISMT_GR_ERRAERMSK	0x014	/* Error AER Mask */
-#define ISMT_GR_ERRSTS		0x018	/* Error Status */
-#define ISMT_GR_ERRINFO		0x01c	/* Error Information */
-
-/* iSMT Master Registers */
-#define ISMT_MSTR_MDBA		0x100	/* Master Descriptor Base Address */
-#define ISMT_MSTR_MCTRL		0x108	/* Master Control */
-#define ISMT_MSTR_MSTS		0x10c	/* Master Status */
-#define ISMT_MSTR_MDS		0x110	/* Master Descriptor Size */
-#define ISMT_MSTR_RPOLICY	0x114	/* Retry Policy */
-
-/* iSMT Miscellaneous Registers */
-#define ISMT_SPGT	0x300	/* SMBus PHY Global Timing */
-
-/* General Control Register (GCTRL) bit definitions */
-#define ISMT_GCTRL_TRST	0x04	/* Target Reset */
-#define ISMT_GCTRL_KILL	0x08	/* Kill */
-#define ISMT_GCTRL_SRST	0x40	/* Soft Reset */
-
-/* Master Control Register (MCTRL) bit definitions */
-#define ISMT_MCTRL_SS	0x01		/* Start/Stop */
-#define ISMT_MCTRL_MEIE	0x10		/* Master Error Interrupt Enable */
-#define ISMT_MCTRL_FMHP	0x00ff0000	/* Firmware Master Head Ptr (FMHP) */
-
-/* Master Status Register (MSTS) bit definitions */
-#define ISMT_MSTS_HMTP	0xff0000	/* HW Master Tail Pointer (HMTP) */
-#define ISMT_MSTS_MIS	0x20		/* Master Interrupt Status (MIS) */
-#define ISMT_MSTS_MEIS	0x10		/* Master Error Int Status (MEIS) */
-#define ISMT_MSTS_IP	0x01		/* In Progress */
-
-/* Master Descriptor Size (MDS) bit definitions */
-#define ISMT_MDS_MASK	0xff	/* Master Descriptor Size mask (MDS) */
-
-/* SMBus PHY Global Timing Register (SPGT) bit definitions */
-#define ISMT_SPGT_SPD_MASK	0xc0000000	/* SMBus Speed mask */
-#define ISMT_SPGT_SPD_80K	0x00		/* 80 kHz */
-#define ISMT_SPGT_SPD_100K	(0x1 << 30)	/* 100 kHz */
-#define ISMT_SPGT_SPD_400K	(0x2U << 30)	/* 400 kHz */
-#define ISMT_SPGT_SPD_1M	(0x3U << 30)	/* 1 MHz */
-
-
-/* MSI Control Register (MSICTL) bit definitions */
-#define ISMT_MSICTL_MSIE	0x01	/* MSI Enable */
-
-/* iSMT Hardware Descriptor */
-struct ismt_desc {
-	u8 tgtaddr_rw;	/* target address & r/w bit */
-	u8 wr_len_cmd;	/* write length in bytes or a command */
-	u8 rd_len;	/* read length */
-	u8 control;	/* control bits */
-	u8 status;	/* status bits */
-	u8 retry;	/* collision retry and retry count */
-	u8 rxbytes;	/* received bytes */
-	u8 txbytes;	/* transmitted bytes */
-	u32 dptr_low;	/* lower 32 bit of the data pointer */
-	u32 dptr_high;	/* upper 32 bit of the data pointer */
-} __packed;
-
-struct ismt_priv {
-	struct i2c_adapter adapter;
-	void __iomem *smba;			/* PCI BAR */
-	struct pci_dev *pci_dev;
-	struct ismt_desc *hw;			/* descriptor virt base addr */
-	dma_addr_t io_rng_dma;			/* descriptor HW base addr */
-	u8 head;				/* ring buffer head pointer */
-	struct completion cmp;			/* interrupt completion */
-	u8 buffer[I2C_SMBUS_BLOCK_MAX + 16];	/* temp R/W data buffer */
-	dma_addr_t log_dma;
-	u32 *log;
-};
-
-static const struct pci_device_id ismt_ids[] = {
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT0) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT1) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CDF_SMT) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_SMT) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EBG_SMT) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMT) },
-	{ 0, }
-};
-
-MODULE_DEVICE_TABLE(pci, ismt_ids);
-
-/* Bus speed control bits for slow debuggers - refer to the docs for usage */
-static unsigned int bus_speed;
-module_param(bus_speed, uint, S_IRUGO);
-MODULE_PARM_DESC(bus_speed, "Bus Speed in kHz (0 = BIOS default)");
-
-static unsigned int dma_reset_timeout = 1000;
-module_param(dma_reset_timeout, uint, S_IRUGO);
-
-static void ismt_hw_init(struct ismt_priv *priv);
-
-/**
- * __ismt_desc_dump() - dump the contents of a specific descriptor
- * @dev: the iSMT device
- * @desc: the iSMT hardware descriptor
- */
-static void __ismt_desc_dump(struct device *dev, const struct ismt_desc *desc)
-{
-
-	dev_dbg(dev, "Descriptor struct:  %p\n", desc);
-	dev_dbg(dev, "\ttgtaddr_rw=0x%02X\n", desc->tgtaddr_rw);
-	dev_dbg(dev, "\twr_len_cmd=0x%02X\n", desc->wr_len_cmd);
-	dev_dbg(dev, "\trd_len=    0x%02X\n", desc->rd_len);
-	dev_dbg(dev, "\tcontrol=   0x%02X\n", desc->control);
-	dev_dbg(dev, "\tstatus=    0x%02X\n", desc->status);
-	dev_dbg(dev, "\tretry=     0x%02X\n", desc->retry);
-	dev_dbg(dev, "\trxbytes=   0x%02X\n", desc->rxbytes);
-	dev_dbg(dev, "\ttxbytes=   0x%02X\n", desc->txbytes);
-	dev_dbg(dev, "\tdptr_low=  0x%08X\n", desc->dptr_low);
-	dev_dbg(dev, "\tdptr_high= 0x%08X\n", desc->dptr_high);
-}
-/**
- * ismt_desc_dump() - dump the contents of a descriptor for debug purposes
- * @priv: iSMT private data
- */
-static void ismt_desc_dump(struct ismt_priv *priv)
-{
-	struct device *dev = &priv->pci_dev->dev;
-	struct ismt_desc *desc = &priv->hw[priv->head];
-
-	dev_dbg(dev, "Dump of the descriptor struct:  0x%X\n", priv->head);
-	__ismt_desc_dump(dev, desc);
-}
-
-static void ismt_reset_dma(struct ismt_priv *priv)
-{
-    uint val;
-    u16 ctrl;
-    struct pci_dev *pdev;
-    u32 addr_lo, addr_hi;
-
-    /* save msiaddr */
-    pdev = priv->pci_dev;
-    pci_read_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_LO, &addr_lo);
-    pci_read_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, &addr_hi);
-
-    /* Clear the start bit */
-    val = readl(priv->smba + ISMT_MSTR_MCTRL);
-    val &= ~ISMT_MCTRL_SS;
-    writel(val, priv->smba + ISMT_MSTR_MCTRL);
-
-    val = readl(priv->smba + ISMT_GR_GCTRL);
-    writel(val | ISMT_GCTRL_KILL | ISMT_GCTRL_TRST | ISMT_GCTRL_SRST, priv->smba + ISMT_GR_GCTRL);
-
-    if (dma_reset_timeout > 0) {
-        usleep_range(dma_reset_timeout, dma_reset_timeout + 1);
-    }
-
-    ismt_hw_init(priv);
-    pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_LO, addr_lo);
-    pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, addr_hi);
-    /* enable msi */
-    pci_read_config_word(pdev, pdev->msi_cap + PCI_MSI_FLAGS, &ctrl);
-    ctrl |= PCI_MSI_FLAGS_ENABLE;
-    pci_write_config_word(pdev, pdev->msi_cap + PCI_MSI_FLAGS, ctrl);
-}
-
-/**
- * ismt_gen_reg_dump() - dump the iSMT General Registers
- * @priv: iSMT private data
- */
-static void ismt_gen_reg_dump(struct ismt_priv *priv)
-{
-	struct device *dev = &priv->pci_dev->dev;
-
-	dev_dbg(dev, "Dump of the iSMT General Registers\n");
-	dev_dbg(dev, "  GCTRL.... : (0x%p)=0x%X\n",
-		priv->smba + ISMT_GR_GCTRL,
-		readl(priv->smba + ISMT_GR_GCTRL));
-	dev_dbg(dev, "  SMTICL... : (0x%p)=0x%016llX\n",
-		priv->smba + ISMT_GR_SMTICL,
-		(long long unsigned int)readq(priv->smba + ISMT_GR_SMTICL));
-	dev_dbg(dev, "  ERRINTMSK : (0x%p)=0x%X\n",
-		priv->smba + ISMT_GR_ERRINTMSK,
-		readl(priv->smba + ISMT_GR_ERRINTMSK));
-	dev_dbg(dev, "  ERRAERMSK : (0x%p)=0x%X\n",
-		priv->smba + ISMT_GR_ERRAERMSK,
-		readl(priv->smba + ISMT_GR_ERRAERMSK));
-	dev_dbg(dev, "  ERRSTS... : (0x%p)=0x%X\n",
-		priv->smba + ISMT_GR_ERRSTS,
-		readl(priv->smba + ISMT_GR_ERRSTS));
-	dev_dbg(dev, "  ERRINFO.. : (0x%p)=0x%X\n",
-		priv->smba + ISMT_GR_ERRINFO,
-		readl(priv->smba + ISMT_GR_ERRINFO));
-}
-
-/**
- * ismt_mstr_reg_dump() - dump the iSMT Master Registers
- * @priv: iSMT private data
- */
-static void ismt_mstr_reg_dump(struct ismt_priv *priv)
-{
-	struct device *dev = &priv->pci_dev->dev;
-
-	dev_dbg(dev, "Dump of the iSMT Master Registers\n");
-	dev_dbg(dev, "  MDBA..... : (0x%p)=0x%016llX\n",
-		priv->smba + ISMT_MSTR_MDBA,
-		(long long unsigned int)readq(priv->smba + ISMT_MSTR_MDBA));
-	dev_dbg(dev, "  MCTRL.... : (0x%p)=0x%X\n",
-		priv->smba + ISMT_MSTR_MCTRL,
-		readl(priv->smba + ISMT_MSTR_MCTRL));
-	dev_dbg(dev, "  MSTS..... : (0x%p)=0x%X\n",
-		priv->smba + ISMT_MSTR_MSTS,
-		readl(priv->smba + ISMT_MSTR_MSTS));
-	dev_dbg(dev, "  MDS...... : (0x%p)=0x%X\n",
-		priv->smba + ISMT_MSTR_MDS,
-		readl(priv->smba + ISMT_MSTR_MDS));
-	dev_dbg(dev, "  RPOLICY.. : (0x%p)=0x%X\n",
-		priv->smba + ISMT_MSTR_RPOLICY,
-		readl(priv->smba + ISMT_MSTR_RPOLICY));
-	dev_dbg(dev, "  SPGT..... : (0x%p)=0x%X\n",
-		priv->smba + ISMT_SPGT,
-		readl(priv->smba + ISMT_SPGT));
-}
-
-/**
- * ismt_submit_desc() - add a descriptor to the ring
- * @priv: iSMT private data
- */
-static void ismt_submit_desc(struct ismt_priv *priv)
-{
-	uint fmhp;
-	uint val;
-
-	ismt_desc_dump(priv);
-	ismt_gen_reg_dump(priv);
-	ismt_mstr_reg_dump(priv);
-
-	/* Set the FMHP (Firmware Master Head Pointer)*/
-	fmhp = ((priv->head + 1) % ISMT_DESC_ENTRIES) << 16;
-	val = readl(priv->smba + ISMT_MSTR_MCTRL);
-	writel((val & ~ISMT_MCTRL_FMHP) | fmhp,
-	       priv->smba + ISMT_MSTR_MCTRL);
-
-	/* Set the start bit */
-	val = readl(priv->smba + ISMT_MSTR_MCTRL);
-	writel(val | ISMT_MCTRL_SS,
-	       priv->smba + ISMT_MSTR_MCTRL);
-}
-
-/**
- * ismt_process_desc() - handle the completion of the descriptor
- * @desc: the iSMT hardware descriptor
- * @data: data buffer from the upper layer
- * @priv: ismt_priv struct holding our dma buffer
- * @size: SMBus transaction type
- * @read_write: flag to indicate if this is a read or write
- */
-static int ismt_process_desc(const struct ismt_desc *desc,
-			     union i2c_smbus_data *data,
-			     struct ismt_priv *priv, int size,
-			     char read_write)
-{
-	u8 *dma_buffer = PTR_ALIGN(&priv->buffer[0], 16);
-
-	dev_dbg(&priv->pci_dev->dev, "Processing completed descriptor\n");
-	__ismt_desc_dump(&priv->pci_dev->dev, desc);
-	ismt_gen_reg_dump(priv);
-	ismt_mstr_reg_dump(priv);
-
-	if (desc->status & ISMT_DESC_SCS) {
-		if (read_write == I2C_SMBUS_WRITE &&
-		    size != I2C_SMBUS_PROC_CALL &&
-		    size != I2C_SMBUS_BLOCK_PROC_CALL)
-			return 0;
-
-		switch (size) {
-		case I2C_SMBUS_BYTE:
-		case I2C_SMBUS_BYTE_DATA:
-			data->byte = dma_buffer[0];
-			break;
-		case I2C_SMBUS_WORD_DATA:
-		case I2C_SMBUS_PROC_CALL:
-			data->word = dma_buffer[0] | (dma_buffer[1] << 8);
-			break;
-		case I2C_SMBUS_BLOCK_DATA:
-		case I2C_SMBUS_BLOCK_PROC_CALL:
-			if (desc->rxbytes != dma_buffer[0] + 1)
-				return -EMSGSIZE;
-
-			memcpy(data->block, dma_buffer, desc->rxbytes);
-			break;
-		case I2C_SMBUS_I2C_BLOCK_DATA:
-			memcpy(&data->block[1], dma_buffer, desc->rxbytes);
-			data->block[0] = desc->rxbytes;
-			break;
-		}
-		return 0;
-	}
-
-	if (likely(desc->status & ISMT_DESC_NAK))
-		return -ENXIO;
-
-	if (desc->status & ISMT_DESC_CRC)
-		return -EBADMSG;
-
-	if (desc->status & ISMT_DESC_COL)
-		return -EAGAIN;
-
-	if (desc->status & ISMT_DESC_LPR)
-		return -EPROTO;
-
-	if (desc->status & (ISMT_DESC_DLTO | ISMT_DESC_CLTO))
-		return -ETIMEDOUT;
-
-	return -EIO;
-}
-
-static void ismt_setscl(struct ismt_priv *priv, unsigned int level)
-{
-    int pin_status;
-
-    pin_status = readl(priv->smba + ISMT_DBCTRL);
-    if (level == 0) {
-        pin_status &= (~ISMT_DBCTRL_CLK_CTL);
-    } else {
-        pin_status |= ISMT_DBCTRL_CLK_CTL;
-    }
-    writel(pin_status, priv->smba + ISMT_DBCTRL);
-    pin_status = readl(priv->smba + ISMT_DBCTRL);
-    dev_dbg(&priv->pci_dev->dev, "dbctrl status = 0x%04x\r\n", pin_status);
-    return;
-}
-
-static void ismt_i2c_unblock(struct ismt_priv *priv)
-{
-    int i;
-    int pin_status, ori_status;
-
-    pin_status = readl(priv->smba + ISMT_DBCTRL);
-    ori_status = pin_status;
-    if ((pin_status & ISMT_DBCTRL_ENABLE) == 0) {
-        pin_status |= ISMT_DBCTRL_ENABLE;
-        writel(pin_status, priv->smba + ISMT_DBCTRL);
-        pin_status = readl(priv->smba + ISMT_DBCTRL);
-        dev_dbg(&priv->pci_dev->dev, "enable dbctrl pin status = 0x%04x\r\n", pin_status);
-    }
-
-    for (i = 0; i < 10; i++) {
-        ismt_setscl(priv, 0);
-        udelay(5);
-        ismt_setscl(priv, 1);
-        udelay(5);
-    }
-
-    pin_status = readl(priv->smba + ISMT_DBCTRL);
-    if (pin_status != ori_status) {
-        writel(ori_status, priv->smba + ISMT_DBCTRL);
-        pin_status = readl(priv->smba + ISMT_DBCTRL);
-        dev_dbg(&priv->pci_dev->dev, "reback dbctrl pin status = 0x%04x\r\n", pin_status);
-    }
-
-    return;
-}
-
-static int ismt_check_i2c_unblock(struct ismt_priv *priv)
-{
-    int pin_status;
-
-    pin_status = readl(priv->smba + ISMT_DBSTS);
-
-    if ( (!(pin_status & ISMT_DBSTS_SDA_STS) ) && (pin_status & ISMT_DBSTS_CLK_STS) ) {
-        dev_dbg(&priv->pci_dev->dev, "SDA is low, send 9 clock to device!\n");
-        ismt_i2c_unblock(priv);
-    }
-    return 0;
-}
-
-static int ismt_check_i2c_scl(struct ismt_priv *priv)
-{
-    int pin_status;
-
-    pin_status = readl(priv->smba + ISMT_DBSTS);
-
-    if ( (pin_status & ISMT_DBSTS_SDA_STS) && (pin_status & ISMT_DBSTS_CLK_STS) ) {
-        return 0;
-    }
-
-    dev_warn(&priv->pci_dev->dev, "SDA or SCL is low.pin_status:0x%x\n", pin_status);
-    return -1;
-}
-
-/* Make sure the SMBus host is ready to start transmitting.
-   Return 0 if it is, -EIO if it is not. */
-static int ismt_check_pre(struct ismt_priv *priv)
-{
-    ismt_check_i2c_unblock(priv);
-
-    /* SDA or SCL is low, return -EIO */
-    if (ismt_check_i2c_scl(priv)) {
-        return -EIO;
-    }
-
-    return 0;
-}
-
-/**
- * ismt_access() - process an SMBus command
- * @adap: the i2c host adapter
- * @addr: address of the i2c/SMBus target
- * @flags: command options
- * @read_write: read from or write to device
- * @command: the i2c/SMBus command to issue
- * @size: SMBus transaction type
- * @data: read/write data buffer
- */
-static int ismt_access(struct i2c_adapter *adap, u16 addr,
-		       unsigned short flags, char read_write, u8 command,
-		       int size, union i2c_smbus_data *data)
-{
-	int ret;
-	unsigned long time_left;
-	dma_addr_t dma_addr = 0; /* address of the data buffer */
-	u8 dma_size = 0;
-	enum dma_data_direction dma_direction = 0;
-	struct ismt_desc *desc;
-	struct ismt_priv *priv = i2c_get_adapdata(adap);
-	struct device *dev = &priv->pci_dev->dev;
-	u8 *dma_buffer = PTR_ALIGN(&priv->buffer[0], 16);
-
-	ret = ismt_check_pre(priv);
-	if (ret < 0) {
-		return ret;
-	}
-
-	desc = &priv->hw[priv->head];
-
-	/* Initialize the DMA buffer */
-	mem_clear(priv->buffer, sizeof(priv->buffer));
-
-	/* Initialize the descriptor */
-	mem_clear(desc, sizeof(struct ismt_desc));
-	desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, read_write);
-
-	/* Always clear the log entries */
-	mem_clear(priv->log, ISMT_LOG_ENTRIES * sizeof(u32));
-
-	/* Initialize common control bits */
-	if (likely(pci_dev_msi_enabled(priv->pci_dev)))
-		desc->control = ISMT_DESC_INT | ISMT_DESC_FAIR;
-	else
-		desc->control = ISMT_DESC_FAIR;
-
-	if ((flags & I2C_CLIENT_PEC) && (size != I2C_SMBUS_QUICK)
-	    && (size != I2C_SMBUS_I2C_BLOCK_DATA))
-		desc->control |= ISMT_DESC_PEC;
-
-	switch (size) {
-	case I2C_SMBUS_QUICK:
-		dev_dbg(dev, "I2C_SMBUS_QUICK\n");
-		break;
-
-	case I2C_SMBUS_BYTE:
-		if (read_write == I2C_SMBUS_WRITE) {
-			/*
-			 * Send Byte
-			 * The command field contains the write data
-			 */
-			dev_dbg(dev, "I2C_SMBUS_BYTE:  WRITE\n");
-			desc->control |= ISMT_DESC_CWRL;
-			desc->wr_len_cmd = command;
-		} else {
-			/* Receive Byte */
-			dev_dbg(dev, "I2C_SMBUS_BYTE:  READ\n");
-			dma_size = 1;
-			dma_direction = DMA_FROM_DEVICE;
-			desc->rd_len = 1;
-		}
-		break;
-
-	case I2C_SMBUS_BYTE_DATA:
-		if (read_write == I2C_SMBUS_WRITE) {
-			/*
-			 * Write Byte
-			 * Command plus 1 data byte
-			 */
-			dev_dbg(dev, "I2C_SMBUS_BYTE_DATA:  WRITE\n");
-			desc->wr_len_cmd = 2;
-			dma_size = 2;
-			dma_direction = DMA_TO_DEVICE;
-			dma_buffer[0] = command;
-			dma_buffer[1] = data->byte;
-		} else {
-			/* Read Byte */
-			dev_dbg(dev, "I2C_SMBUS_BYTE_DATA:  READ\n");
-			desc->control |= ISMT_DESC_CWRL;
-			desc->wr_len_cmd = command;
-			desc->rd_len = 1;
-			dma_size = 1;
-			dma_direction = DMA_FROM_DEVICE;
-		}
-		break;
-
-	case I2C_SMBUS_WORD_DATA:
-		if (read_write == I2C_SMBUS_WRITE) {
-			/* Write Word */
-			dev_dbg(dev, "I2C_SMBUS_WORD_DATA:  WRITE\n");
-			desc->wr_len_cmd = 3;
-			dma_size = 3;
-			dma_direction = DMA_TO_DEVICE;
-			dma_buffer[0] = command;
-			dma_buffer[1] = data->word & 0xff;
-			dma_buffer[2] = data->word >> 8;
-		} else {
-			/* Read Word */
-			dev_dbg(dev, "I2C_SMBUS_WORD_DATA:  READ\n");
-			desc->wr_len_cmd = command;
-			desc->control |= ISMT_DESC_CWRL;
-			desc->rd_len = 2;
-			dma_size = 2;
-			dma_direction = DMA_FROM_DEVICE;
-		}
-		break;
-
-	case I2C_SMBUS_PROC_CALL:
-		dev_dbg(dev, "I2C_SMBUS_PROC_CALL\n");
-		desc->wr_len_cmd = 3;
-		desc->rd_len = 2;
-		dma_size = 3;
-		dma_direction = DMA_BIDIRECTIONAL;
-		dma_buffer[0] = command;
-		dma_buffer[1] = data->word & 0xff;
-		dma_buffer[2] = data->word >> 8;
-		break;
-
-	case I2C_SMBUS_BLOCK_DATA:
-		if (read_write == I2C_SMBUS_WRITE) {
-			/* Block Write */
-			dev_dbg(dev, "I2C_SMBUS_BLOCK_DATA:  WRITE\n");
-			if (data->block[0] < 1 || data->block[0] > I2C_SMBUS_BLOCK_MAX)
-				return -EINVAL;
-
-			dma_size = data->block[0] + 1;
-			dma_direction = DMA_TO_DEVICE;
-			desc->wr_len_cmd = dma_size;
-			desc->control |= ISMT_DESC_BLK;
-			dma_buffer[0] = command;
-			memcpy(&dma_buffer[1], &data->block[1], dma_size - 1);
-		} else {
-			/* Block Read */
-			dev_dbg(dev, "I2C_SMBUS_BLOCK_DATA:  READ\n");
-			dma_size = I2C_SMBUS_BLOCK_MAX;
-			dma_direction = DMA_FROM_DEVICE;
-			desc->rd_len = dma_size;
-			desc->wr_len_cmd = command;
-			desc->control |= (ISMT_DESC_BLK | ISMT_DESC_CWRL);
-		}
-		break;
-
-	case I2C_SMBUS_BLOCK_PROC_CALL:
-		dev_dbg(dev, "I2C_SMBUS_BLOCK_PROC_CALL\n");
-		if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
-			return -EINVAL;
-
-		dma_size = I2C_SMBUS_BLOCK_MAX;
-		desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, 1);
-		desc->wr_len_cmd = data->block[0] + 1;
-		desc->rd_len = dma_size;
-		desc->control |= ISMT_DESC_BLK;
-		dma_direction = DMA_BIDIRECTIONAL;
-		dma_buffer[0] = command;
-		memcpy(&dma_buffer[1], &data->block[1], data->block[0]);
-		break;
-
-	case I2C_SMBUS_I2C_BLOCK_DATA:
-		/* Make sure the length is valid */
-		if (data->block[0] < 1)
-			data->block[0] = 1;
-
-		if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
-			data->block[0] = I2C_SMBUS_BLOCK_MAX;
-
-		if (read_write == I2C_SMBUS_WRITE) {
-			/* i2c Block Write */
-			dev_dbg(dev, "I2C_SMBUS_I2C_BLOCK_DATA:  WRITE\n");
-			dma_size = data->block[0] + 1;
-			dma_direction = DMA_TO_DEVICE;
-			desc->wr_len_cmd = dma_size;
-			desc->control |= ISMT_DESC_I2C;
-			dma_buffer[0] = command;
-			memcpy(&dma_buffer[1], &data->block[1], dma_size - 1);
-		} else {
-			/* i2c Block Read */
-			dev_dbg(dev, "I2C_SMBUS_I2C_BLOCK_DATA:  READ\n");
-			dma_size = data->block[0];
-			dma_direction = DMA_FROM_DEVICE;
-			desc->rd_len = dma_size;
-			desc->wr_len_cmd = command;
-			desc->control |= (ISMT_DESC_I2C | ISMT_DESC_CWRL);
-			/*
-			 * Per the "Table 15-15. I2C Commands",
-			 * in the External Design Specification (EDS),
-			 * (Document Number: 508084, Revision: 2.0),
-			 * the _rw bit must be 0
-			 */
-			desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, 0);
-		}
-		break;
-
-	default:
-		dev_err(dev, "Unsupported transaction %d\n",
-			size);
-		return -EOPNOTSUPP;
-	}
-
-	/* map the data buffer */
-	if (dma_size != 0) {
-		dev_dbg(dev, " dev=%p\n", dev);
-		dev_dbg(dev, " data=%p\n", data);
-		dev_dbg(dev, " dma_buffer=%p\n", dma_buffer);
-		dev_dbg(dev, " dma_size=%d\n", dma_size);
-		dev_dbg(dev, " dma_direction=%d\n", dma_direction);
-
-		dma_addr = dma_map_single(dev,
-				      dma_buffer,
-				      dma_size,
-				      dma_direction);
-
-		if (dma_mapping_error(dev, dma_addr)) {
-			dev_err(dev, "Error in mapping dma buffer %p\n",
-				dma_buffer);
-			return -EIO;
-		}
-
-		dev_dbg(dev, " dma_addr = %pad\n", &dma_addr);
-
-		desc->dptr_low = lower_32_bits(dma_addr);
-		desc->dptr_high = upper_32_bits(dma_addr);
-	}
-
-	reinit_completion(&priv->cmp);
-
-	/* Add the descriptor */
-	ismt_submit_desc(priv);
-
-	/* Now we wait for interrupt completion, 1s */
-	time_left = wait_for_completion_timeout(&priv->cmp, HZ*1);
-
-	/* unmap the data buffer */
-	if (dma_size != 0)
-		dma_unmap_single(dev, dma_addr, dma_size, dma_direction);
-
-	if (unlikely(!time_left)) {
-		dev_warn(dev, "completion wait timed out:addr[%d-0x%x], read_write[%d], command[0x%x], size[%d]\n",
-					adap->nr, addr, read_write, command, size);
-		ismt_reset_dma(priv);
-		ret = -ETIMEDOUT;
-		priv->head = 0;
-		return ret;
-	}
-
-	/* do any post processing of the descriptor here */
-	ret = ismt_process_desc(desc, data, priv, size, read_write);
-
-	/* Update the ring pointer */
-	priv->head++;
-	priv->head %= ISMT_DESC_ENTRIES;
-
-	return ret;
-}
-
-/**
- * ismt_func() - report which i2c commands are supported by this adapter
- * @adap: the i2c host adapter
- */
-static u32 ismt_func(struct i2c_adapter *adap)
-{
-	return I2C_FUNC_SMBUS_QUICK		|
-	       I2C_FUNC_SMBUS_BYTE		|
-	       I2C_FUNC_SMBUS_BYTE_DATA		|
-	       I2C_FUNC_SMBUS_WORD_DATA		|
-	       I2C_FUNC_SMBUS_PROC_CALL		|
-	       I2C_FUNC_SMBUS_BLOCK_PROC_CALL	|
-	       I2C_FUNC_SMBUS_BLOCK_DATA	|
-	       I2C_FUNC_SMBUS_I2C_BLOCK		|
-	       I2C_FUNC_SMBUS_PEC;
-}
-
-static const struct i2c_algorithm smbus_algorithm = {
-	.smbus_xfer	= ismt_access,
-	.functionality	= ismt_func,
-};
-
-/**
- * ismt_handle_isr() - interrupt handler bottom half
- * @priv: iSMT private data
- */
-static irqreturn_t ismt_handle_isr(struct ismt_priv *priv)
-{
-	complete(&priv->cmp);
-
-	return IRQ_HANDLED;
-}
-
-
-/**
- * ismt_do_interrupt() - IRQ interrupt handler
- * @vec: interrupt vector
- * @data: iSMT private data
- */
-static irqreturn_t ismt_do_interrupt(int vec, void *data)
-{
-	u32 val;
-	struct ismt_priv *priv = data;
-
-	/*
-	 * check to see it's our interrupt, return IRQ_NONE if not ours
-	 * since we are sharing interrupt
-	 */
-	val = readl(priv->smba + ISMT_MSTR_MSTS);
-
-	if (!(val & (ISMT_MSTS_MIS | ISMT_MSTS_MEIS)))
-		return IRQ_NONE;
-	else
-		writel(val | ISMT_MSTS_MIS | ISMT_MSTS_MEIS,
-		       priv->smba + ISMT_MSTR_MSTS);
-
-	return ismt_handle_isr(priv);
-}
-
-/**
- * ismt_do_msi_interrupt() - MSI interrupt handler
- * @vec: interrupt vector
- * @data: iSMT private data
- */
-static irqreturn_t ismt_do_msi_interrupt(int vec, void *data)
-{
-	return ismt_handle_isr(data);
-}
-
-/**
- * ismt_hw_init() - initialize the iSMT hardware
- * @priv: iSMT private data
- */
-static void ismt_hw_init(struct ismt_priv *priv)
-{
-	u32 val;
-	struct device *dev = &priv->pci_dev->dev;
-
-	/* initialize the Master Descriptor Base Address (MDBA) */
-	writeq(priv->io_rng_dma, priv->smba + ISMT_MSTR_MDBA);
-
-	writeq(priv->log_dma, priv->smba + ISMT_GR_SMTICL);
-
-	/* initialize the Master Control Register (MCTRL) */
-	writel(ISMT_MCTRL_MEIE, priv->smba + ISMT_MSTR_MCTRL);
-
-	/* initialize the Master Status Register (MSTS) */
-	writel(0, priv->smba + ISMT_MSTR_MSTS);
-
-	/* initialize the Master Descriptor Size (MDS) */
-	val = readl(priv->smba + ISMT_MSTR_MDS);
-	writel((val & ~ISMT_MDS_MASK) | (ISMT_DESC_ENTRIES - 1),
-		priv->smba + ISMT_MSTR_MDS);
-
-	/*
-	 * Set the SMBus speed (could use this for slow HW debuggers)
-	 */
-
-	val = readl(priv->smba + ISMT_SPGT);
-
-	switch (bus_speed) {
-	case 0:
-		break;
-
-	case 80:
-		dev_dbg(dev, "Setting SMBus clock to 80 kHz\n");
-		writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_80K),
-			priv->smba + ISMT_SPGT);
-		break;
-
-	case 100:
-		dev_dbg(dev, "Setting SMBus clock to 100 kHz\n");
-		writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_100K),
-			priv->smba + ISMT_SPGT);
-		break;
-
-	case 400:
-		dev_dbg(dev, "Setting SMBus clock to 400 kHz\n");
-		writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_400K),
-			priv->smba + ISMT_SPGT);
-		break;
-
-	case 1000:
-		dev_dbg(dev, "Setting SMBus clock to 1000 kHz\n");
-		writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_1M),
-			priv->smba + ISMT_SPGT);
-		break;
-
-	default:
-		dev_warn(dev, "Invalid SMBus clock speed, only 0, 80, 100, 400, and 1000 are valid\n");
-		break;
-	}
-
-	val = readl(priv->smba + ISMT_SPGT);
-
-	switch (val & ISMT_SPGT_SPD_MASK) {
-	case ISMT_SPGT_SPD_80K:
-		bus_speed = 80;
-		break;
-	case ISMT_SPGT_SPD_100K:
-		bus_speed = 100;
-		break;
-	case ISMT_SPGT_SPD_400K:
-		bus_speed = 400;
-		break;
-	case ISMT_SPGT_SPD_1M:
-		bus_speed = 1000;
-		break;
-	}
-	dev_dbg(dev, "SMBus clock is running at %d kHz\n", bus_speed);
-}
-
-/**
- * ismt_dev_init() - initialize the iSMT data structures
- * @priv: iSMT private data
- */
-static int ismt_dev_init(struct ismt_priv *priv)
-{
-	/* allocate memory for the descriptor */
-	priv->hw = dmam_alloc_coherent(&priv->pci_dev->dev,
-				       (ISMT_DESC_ENTRIES
-					       * sizeof(struct ismt_desc)),
-				       &priv->io_rng_dma,
-				       GFP_KERNEL);
-	if (!priv->hw)
-		return -ENOMEM;
-
-	priv->head = 0;
-	init_completion(&priv->cmp);
-
-	priv->log = dmam_alloc_coherent(&priv->pci_dev->dev,
-					ISMT_LOG_ENTRIES * sizeof(u32),
-					&priv->log_dma, GFP_KERNEL);
-	if (!priv->log)
-		return -ENOMEM;
-
-	return 0;
-}
-
-/**
- * ismt_int_init() - initialize interrupts
- * @priv: iSMT private data
- */
-static int ismt_int_init(struct ismt_priv *priv)
-{
-	int err;
-
-	/* Try using MSI interrupts */
-	err = pci_enable_msi(priv->pci_dev);
-	if (err)
-		goto intx;
-
-	err = devm_request_irq(&priv->pci_dev->dev,
-			       priv->pci_dev->irq,
-			       ismt_do_msi_interrupt,
-			       0,
-			       "ismt-msi",
-			       priv);
-	if (err) {
-		pci_disable_msi(priv->pci_dev);
-		goto intx;
-	}
-
-	return 0;
-
-	/* Try using legacy interrupts */
-intx:
-	dev_warn(&priv->pci_dev->dev,
-		 "Unable to use MSI interrupts, falling back to legacy\n");
-
-	err = devm_request_irq(&priv->pci_dev->dev,
-			       priv->pci_dev->irq,
-			       ismt_do_interrupt,
-			       IRQF_SHARED,
-			       "ismt-intx",
-			       priv);
-	if (err) {
-		dev_err(&priv->pci_dev->dev, "no usable interrupts\n");
-		return err;
-	}
-
-	return 0;
-}
-
-static struct pci_driver ismt_driver;
-
-/**
- * ismt_probe() - probe for iSMT devices
- * @pdev: PCI-Express device
- * @id: PCI-Express device ID
- */
-static int
-ismt_probe(struct pci_dev *pdev, const struct pci_device_id *id)
-{
-	int err;
-	struct ismt_priv *priv;
-	unsigned long start, len;
-
-	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
-	if (!priv)
-		return -ENOMEM;
-
-	pci_set_drvdata(pdev, priv);
-
-	i2c_set_adapdata(&priv->adapter, priv);
-	priv->adapter.owner = THIS_MODULE;
-	priv->adapter.class = I2C_CLASS_HWMON;
-	priv->adapter.algo = &smbus_algorithm;
-	priv->adapter.dev.parent = &pdev->dev;
-	ACPI_COMPANION_SET(&priv->adapter.dev, ACPI_COMPANION(&pdev->dev));
-	priv->adapter.retries = ISMT_MAX_RETRIES;
-
-	priv->pci_dev = pdev;
-
-	err = pcim_enable_device(pdev);
-	if (err) {
-		dev_err(&pdev->dev, "Failed to enable SMBus PCI device (%d)\n",
-			err);
-		return err;
-	}
-
-	/* enable bus mastering */
-	pci_set_master(pdev);
-
-	/* Determine the address of the SMBus area */
-	start = pci_resource_start(pdev, SMBBAR);
-	len = pci_resource_len(pdev, SMBBAR);
-	if (!start || !len) {
-		dev_err(&pdev->dev,
-			"SMBus base address uninitialized, upgrade BIOS\n");
-		return -ENODEV;
-	}
-
-	snprintf(priv->adapter.name, sizeof(priv->adapter.name),
-		 "SMBus iSMT adapter at %lx", start);
-
-	dev_dbg(&priv->pci_dev->dev, " start=0x%lX\n", start);
-	dev_dbg(&priv->pci_dev->dev, " len=0x%lX\n", len);
-
-	err = acpi_check_resource_conflict(&pdev->resource[SMBBAR]);
-	if (err) {
-		dev_err(&pdev->dev, "ACPI resource conflict!\n");
-		return err;
-	}
-
-	err = pci_request_region(pdev, SMBBAR, ismt_driver.name);
-	if (err) {
-		dev_err(&pdev->dev,
-			"Failed to request SMBus region 0x%lx-0x%lx\n",
-			start, start + len);
-		return err;
-	}
-
-	priv->smba = pcim_iomap(pdev, SMBBAR, len);
-	if (!priv->smba) {
-		dev_err(&pdev->dev, "Unable to ioremap SMBus BAR\n");
-		return -ENODEV;
-	}
-
-	err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
-	if (err) {
-		dev_err(&pdev->dev, "dma_set_mask fail\n");
-		return -ENODEV;
-	}
-
-	err = ismt_dev_init(priv);
-	if (err)
-		return err;
-
-	ismt_hw_init(priv);
-
-	err = ismt_int_init(priv);
-	if (err)
-		return err;
-
-	err = i2c_add_adapter(&priv->adapter);
-	if (err)
-		return -ENODEV;
-    dev_info(&pdev->dev, "wb-i2c-ismt probe ok.\n");
-	return 0;
-}
-
-/**
- * ismt_remove() - release driver resources
- * @pdev: PCI-Express device
- */
-static void ismt_remove(struct pci_dev *pdev)
-{
-	struct ismt_priv *priv = pci_get_drvdata(pdev);
-
-	i2c_del_adapter(&priv->adapter);
-}
-
-static struct pci_driver ismt_driver = {
-	.name = "wb_ismt_smbus",
-	.id_table = ismt_ids,
-	.probe = ismt_probe,
-	.remove = ismt_remove,
-};
-
-module_pci_driver(ismt_driver);
-
-MODULE_LICENSE("Dual BSD/GPL");
-MODULE_AUTHOR("Bill E. Brown <bill.e.brown@intel.com>");
-MODULE_DESCRIPTION("Intel SMBus Message Transport (iSMT) driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ina3221.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ina3221.c
deleted file mode 100644
index 05b6da0284c0..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ina3221.c
+++ /dev/null
@@ -1,1031 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * INA3221 Triple Current/Voltage Monitor
- *
- * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
- *    Andrew F. Davis <afd@ti.com>
- */
-
-#include <linux/hwmon.h>
-#include <linux/hwmon-sysfs.h>
-#include <linux/i2c.h>
-#include <linux/module.h>
-#include <linux/mutex.h>
-#include <linux/of.h>
-#include <linux/pm_runtime.h>
-#include <linux/regmap.h>
-#include <linux/util_macros.h>
-
-#define INA3221_DRIVER_NAME        "wb_ina3221"
-
-#define INA3221_CONFIG             0x00
-#define INA3221_SHUNT1             0x01
-#define INA3221_BUS1               0x02
-#define INA3221_SHUNT2             0x03
-#define INA3221_BUS2               0x04
-#define INA3221_SHUNT3             0x05
-#define INA3221_BUS3               0x06
-#define INA3221_CRIT1              0x07
-#define INA3221_WARN1              0x08
-#define INA3221_CRIT2              0x09
-#define INA3221_WARN2              0x0a
-#define INA3221_CRIT3              0x0b
-#define INA3221_WARN3              0x0c
-#define INA3221_SHUNT_SUM          0x0d
-#define INA3221_CRIT_SUM           0x0e
-#define INA3221_MASK_ENABLE        0x0f
-
-#define INA3221_CONFIG_MODE_MASK    GENMASK(2, 0)
-#define INA3221_CONFIG_MODE_POWERDOWN    0
-#define INA3221_CONFIG_MODE_SHUNT    BIT(0)
-#define INA3221_CONFIG_MODE_BUS        BIT(1)
-#define INA3221_CONFIG_MODE_CONTINUOUS    BIT(2)
-#define INA3221_CONFIG_VSH_CT_SHIFT    3
-#define INA3221_CONFIG_VSH_CT_MASK    GENMASK(5, 3)
-#define INA3221_CONFIG_VSH_CT(x)    (((x) & GENMASK(5, 3)) >> 3)
-#define INA3221_CONFIG_VBUS_CT_SHIFT    6
-#define INA3221_CONFIG_VBUS_CT_MASK    GENMASK(8, 6)
-#define INA3221_CONFIG_VBUS_CT(x)    (((x) & GENMASK(8, 6)) >> 6)
-#define INA3221_CONFIG_AVG_SHIFT    9
-#define INA3221_CONFIG_AVG_MASK        GENMASK(11, 9)
-#define INA3221_CONFIG_AVG(x)        (((x) & GENMASK(11, 9)) >> 9)
-#define INA3221_CONFIG_CHs_EN_MASK    GENMASK(14, 12)
-#define INA3221_CONFIG_CHx_EN(x)    BIT(14 - (x))
-
-#define INA3221_MASK_ENABLE_SCC_MASK    GENMASK(14, 12)
-
-#define INA3221_CONFIG_DEFAULT        0x7127
-#define INA3221_RSHUNT_DEFAULT        10000
-
-enum ina3221_fields {
-    /* Configuration */
-    F_RST,
-
-    /* Status Flags */
-    F_CVRF,
-
-    /* Warning Flags */
-    F_WF3, F_WF2, F_WF1,
-
-    /* Alert Flags: SF is the summation-alert flag */
-    F_SF, F_CF3, F_CF2, F_CF1,
-
-    /* sentinel */
-    F_MAX_FIELDS
-};
-
-static const struct reg_field ina3221_reg_fields[] = {
-    [F_RST] = REG_FIELD(INA3221_CONFIG, 15, 15),
-
-    [F_CVRF] = REG_FIELD(INA3221_MASK_ENABLE, 0, 0),
-    [F_WF3] = REG_FIELD(INA3221_MASK_ENABLE, 3, 3),
-    [F_WF2] = REG_FIELD(INA3221_MASK_ENABLE, 4, 4),
-    [F_WF1] = REG_FIELD(INA3221_MASK_ENABLE, 5, 5),
-    [F_SF] = REG_FIELD(INA3221_MASK_ENABLE, 6, 6),
-    [F_CF3] = REG_FIELD(INA3221_MASK_ENABLE, 7, 7),
-    [F_CF2] = REG_FIELD(INA3221_MASK_ENABLE, 8, 8),
-    [F_CF1] = REG_FIELD(INA3221_MASK_ENABLE, 9, 9),
-};
-
-enum ina3221_channels {
-    INA3221_CHANNEL1,
-    INA3221_CHANNEL2,
-    INA3221_CHANNEL3,
-    INA3221_NUM_CHANNELS
-};
-
-/**
- * struct ina3221_input - channel input source specific information
- * @label: label of channel input source
- * @shunt_resistor: shunt resistor value of channel input source
- * @disconnected: connection status of channel input source
- */
-struct ina3221_input {
-    const char *label;
-    int shunt_resistor;
-    bool disconnected;
-};
-
-/**
- * struct ina3221_data - device specific information
- * @pm_dev: Device pointer for pm runtime
- * @regmap: Register map of the device
- * @fields: Register fields of the device
- * @inputs: Array of channel input source specific structures
- * @lock: mutex lock to serialize sysfs attribute accesses
- * @reg_config: Register value of INA3221_CONFIG
- * @summation_shunt_resistor: equivalent shunt resistor value for summation
- * @single_shot: running in single-shot operating mode
- */
-struct ina3221_data {
-    struct device *pm_dev;
-    struct regmap *regmap;
-    struct regmap_field *fields[F_MAX_FIELDS];
-    struct ina3221_input inputs[INA3221_NUM_CHANNELS];
-    struct mutex lock;
-    u32 reg_config;
-    int summation_shunt_resistor;
-
-    bool single_shot;
-};
-
-static inline bool ina3221_is_enabled(struct ina3221_data *ina, int channel)
-{
-    /* Summation channel checks shunt resistor values */
-    if (channel > INA3221_CHANNEL3)
-        return ina->summation_shunt_resistor != 0;
-
-    return pm_runtime_active(ina->pm_dev) &&
-           (ina->reg_config & INA3221_CONFIG_CHx_EN(channel));
-}
-
-/**
- * Helper function to return the resistor value for current summation.
- *
- * There is a condition to calculate current summation -- all the shunt
- * resistor values should be the same, so as to simply fit the formula:
- *     current summation = shunt voltage summation / shunt resistor
- *
- * Returns the equivalent shunt resistor value on success or 0 on failure
- */
-static inline int ina3221_summation_shunt_resistor(struct ina3221_data *ina)
-{
-    struct ina3221_input *input = ina->inputs;
-    int i, shunt_resistor = 0;
-
-    for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
-        if (input[i].disconnected || !input[i].shunt_resistor)
-            continue;
-        if (!shunt_resistor) {
-            /* Found the reference shunt resistor value */
-            shunt_resistor = input[i].shunt_resistor;
-        } else {
-            /* No summation if resistor values are different */
-            if (shunt_resistor != input[i].shunt_resistor)
-                return 0;
-        }
-    }
-
-    return shunt_resistor;
-}
-
-/* Lookup table for Bus and Shunt conversion times in usec */
-static const u16 ina3221_conv_time[] = {
-    140, 204, 332, 588, 1100, 2116, 4156, 8244,
-};
-
-/* Lookup table for number of samples using in averaging mode */
-static const int ina3221_avg_samples[] = {
-    1, 4, 16, 64, 128, 256, 512, 1024,
-};
-
-/* Converting update_interval in msec to conversion time in usec */
-static inline u32 ina3221_interval_ms_to_conv_time(u16 config, int interval)
-{
-    u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK);
-    u32 samples_idx = INA3221_CONFIG_AVG(config);
-    u32 samples = ina3221_avg_samples[samples_idx];
-
-    /* Bisect the result to Bus and Shunt conversion times */
-    return DIV_ROUND_CLOSEST(interval * 1000 / 2, channels * samples);
-}
-
-/* Converting CONFIG register value to update_interval in usec */
-static inline u32 ina3221_reg_to_interval_us(u16 config)
-{
-    u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK);
-    u32 vbus_ct_idx = INA3221_CONFIG_VBUS_CT(config);
-    u32 vsh_ct_idx = INA3221_CONFIG_VSH_CT(config);
-    u32 samples_idx = INA3221_CONFIG_AVG(config);
-    u32 samples = ina3221_avg_samples[samples_idx];
-    u32 vbus_ct = ina3221_conv_time[vbus_ct_idx];
-    u32 vsh_ct = ina3221_conv_time[vsh_ct_idx];
-
-    /* Calculate total conversion time */
-    return channels * (vbus_ct + vsh_ct) * samples;
-}
-
-static inline int ina3221_wait_for_data(struct ina3221_data *ina)
-{
-    u32 wait, cvrf;
-
-    wait = ina3221_reg_to_interval_us(ina->reg_config);
-
-    /* Polling the CVRF bit to make sure read data is ready */
-    return regmap_field_read_poll_timeout(ina->fields[F_CVRF],
-                          cvrf, cvrf, wait, wait * 2);
-}
-
-static int ina3221_read_value(struct ina3221_data *ina, unsigned int reg,
-                  int *val)
-{
-    unsigned int regval;
-    int ret;
-
-    ret = regmap_read(ina->regmap, reg, &regval);
-    if (ret)
-        return ret;
-
-    /*
-     * Shunt Voltage Sum register has 14-bit value with 1-bit shift
-     * Other Shunt Voltage registers have 12 bits with 3-bit shift
-     */
-    if (reg == INA3221_SHUNT_SUM)
-        *val = sign_extend32(regval >> 1, 14);
-    else
-        *val = sign_extend32(regval >> 3, 12);
-
-    return 0;
-}
-
-static const u8 ina3221_in_reg[] = {
-    INA3221_BUS1,
-    INA3221_BUS2,
-    INA3221_BUS3,
-    INA3221_SHUNT1,
-    INA3221_SHUNT2,
-    INA3221_SHUNT3,
-    INA3221_SHUNT_SUM,
-};
-
-static int ina3221_read_chip(struct device *dev, u32 attr, long *val)
-{
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    int regval;
-
-    switch (attr) {
-    case hwmon_chip_samples:
-        regval = INA3221_CONFIG_AVG(ina->reg_config);
-        *val = ina3221_avg_samples[regval];
-        return 0;
-    case hwmon_chip_update_interval:
-        /* Return in msec */
-        *val = ina3221_reg_to_interval_us(ina->reg_config);
-        *val = DIV_ROUND_CLOSEST(*val, 1000);
-        return 0;
-    default:
-        return -EOPNOTSUPP;
-    }
-}
-
-static int ina3221_read_in(struct device *dev, u32 attr, int channel, long *val)
-{
-    const bool is_shunt = channel > INA3221_CHANNEL3;
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    u8 reg = ina3221_in_reg[channel];
-    int regval, ret;
-
-    /*
-     * Translate shunt channel index to sensor channel index except
-     * the 7th channel (6 since being 0-aligned) is for summation.
-     */
-    if (channel != 6)
-        channel %= INA3221_NUM_CHANNELS;
-
-    switch (attr) {
-    case hwmon_in_input:
-        if (!ina3221_is_enabled(ina, channel))
-            return -ENODATA;
-
-        /* Write CONFIG register to trigger a single-shot measurement */
-        if (ina->single_shot)
-            regmap_write(ina->regmap, INA3221_CONFIG,
-                     ina->reg_config);
-
-        ret = ina3221_wait_for_data(ina);
-        if (ret)
-            return ret;
-
-        ret = ina3221_read_value(ina, reg, &regval);
-        if (ret)
-            return ret;
-
-        /*
-         * Scale of shunt voltage (uV): LSB is 40uV
-         * Scale of bus voltage (mV): LSB is 8mV
-         */
-        *val = regval * (is_shunt ? 40 : 8);
-        return 0;
-    case hwmon_in_enable:
-        *val = ina3221_is_enabled(ina, channel);
-        return 0;
-    default:
-        return -EOPNOTSUPP;
-    }
-}
-
-static const u8 ina3221_curr_reg[][INA3221_NUM_CHANNELS + 1] = {
-    [hwmon_curr_input] = { INA3221_SHUNT1, INA3221_SHUNT2,
-                   INA3221_SHUNT3, INA3221_SHUNT_SUM },
-    [hwmon_curr_max] = { INA3221_WARN1, INA3221_WARN2, INA3221_WARN3, 0 },
-    [hwmon_curr_crit] = { INA3221_CRIT1, INA3221_CRIT2,
-                  INA3221_CRIT3, INA3221_CRIT_SUM },
-    [hwmon_curr_max_alarm] = { F_WF1, F_WF2, F_WF3, 0 },
-    [hwmon_curr_crit_alarm] = { F_CF1, F_CF2, F_CF3, F_SF },
-};
-
-static int ina3221_read_curr(struct device *dev, u32 attr,
-                 int channel, long *val)
-{
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    struct ina3221_input *input = ina->inputs;
-    u8 reg = ina3221_curr_reg[attr][channel];
-    int resistance_uo, voltage_nv;
-    int regval, ret;
-
-    if (channel > INA3221_CHANNEL3)
-        resistance_uo = ina->summation_shunt_resistor;
-    else
-        resistance_uo = input[channel].shunt_resistor;
-
-    switch (attr) {
-    case hwmon_curr_input:
-        if (!ina3221_is_enabled(ina, channel))
-            return -ENODATA;
-
-        /* Write CONFIG register to trigger a single-shot measurement */
-        if (ina->single_shot)
-            regmap_write(ina->regmap, INA3221_CONFIG,
-                     ina->reg_config);
-
-        ret = ina3221_wait_for_data(ina);
-        if (ret)
-            return ret;
-
-        fallthrough;
-    case hwmon_curr_crit:
-    case hwmon_curr_max:
-        if (!resistance_uo)
-            return -ENODATA;
-
-        ret = ina3221_read_value(ina, reg, &regval);
-        if (ret)
-            return ret;
-
-        /* Scale of shunt voltage: LSB is 40uV (40000nV) */
-        voltage_nv = regval * 40000;
-        /* Return current in mA */
-        *val = DIV_ROUND_CLOSEST(voltage_nv, resistance_uo);
-        return 0;
-    case hwmon_curr_crit_alarm:
-    case hwmon_curr_max_alarm:
-        /* No actual register read if channel is disabled */
-        if (!ina3221_is_enabled(ina, channel)) {
-            /* Return 0 for alert flags */
-            *val = 0;
-            return 0;
-        }
-        ret = regmap_field_read(ina->fields[reg], &regval);
-        if (ret)
-            return ret;
-        *val = regval;
-        return 0;
-    default:
-        return -EOPNOTSUPP;
-    }
-}
-
-static int ina3221_write_chip(struct device *dev, u32 attr, long val)
-{
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    int ret, idx;
-    u32 tmp;
-
-    switch (attr) {
-    case hwmon_chip_samples:
-        idx = find_closest(val, ina3221_avg_samples,
-                   ARRAY_SIZE(ina3221_avg_samples));
-
-        tmp = (ina->reg_config & ~INA3221_CONFIG_AVG_MASK) |
-              (idx << INA3221_CONFIG_AVG_SHIFT);
-        ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
-        if (ret)
-            return ret;
-
-        /* Update reg_config accordingly */
-        ina->reg_config = tmp;
-        return 0;
-    case hwmon_chip_update_interval:
-        tmp = ina3221_interval_ms_to_conv_time(ina->reg_config, val);
-        idx = find_closest(tmp, ina3221_conv_time,
-                   ARRAY_SIZE(ina3221_conv_time));
-
-        /* Update Bus and Shunt voltage conversion times */
-        tmp = INA3221_CONFIG_VBUS_CT_MASK | INA3221_CONFIG_VSH_CT_MASK;
-        tmp = (ina->reg_config & ~tmp) |
-              (idx << INA3221_CONFIG_VBUS_CT_SHIFT) |
-              (idx << INA3221_CONFIG_VSH_CT_SHIFT);
-        ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
-        if (ret)
-            return ret;
-
-        /* Update reg_config accordingly */
-        ina->reg_config = tmp;
-        return 0;
-    default:
-        return -EOPNOTSUPP;
-    }
-}
-
-static int ina3221_write_curr(struct device *dev, u32 attr,
-                  int channel, long val)
-{
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    struct ina3221_input *input = ina->inputs;
-    u8 reg = ina3221_curr_reg[attr][channel];
-    int resistance_uo, current_ma, voltage_uv;
-    int regval;
-
-    if (channel > INA3221_CHANNEL3)
-        resistance_uo = ina->summation_shunt_resistor;
-    else
-        resistance_uo = input[channel].shunt_resistor;
-
-    if (!resistance_uo)
-        return -EOPNOTSUPP;
-
-    /* clamp current */
-    current_ma = clamp_val(val,
-                   INT_MIN / resistance_uo,
-                   INT_MAX / resistance_uo);
-
-    voltage_uv = DIV_ROUND_CLOSEST(current_ma * resistance_uo, 1000);
-
-    /* clamp voltage */
-    voltage_uv = clamp_val(voltage_uv, -163800, 163800);
-
-    /*
-     * Formula to convert voltage_uv to register value:
-     *     regval = (voltage_uv / scale) << shift
-     * Note:
-     *     The scale is 40uV for all shunt voltage registers
-     *     Shunt Voltage Sum register left-shifts 1 bit
-     *     All other Shunt Voltage registers shift 3 bits
-     * Results:
-     *     SHUNT_SUM: (1 / 40uV) << 1 = 1 / 20uV
-     *     SHUNT[1-3]: (1 / 40uV) << 3 = 1 / 5uV
-     */
-    if (reg == INA3221_SHUNT_SUM)
-        regval = DIV_ROUND_CLOSEST(voltage_uv, 20) & 0xfffe;
-    else
-        regval = DIV_ROUND_CLOSEST(voltage_uv, 5) & 0xfff8;
-
-    return regmap_write(ina->regmap, reg, regval);
-}
-
-static int ina3221_write_enable(struct device *dev, int channel, bool enable)
-{
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    u16 config, mask = INA3221_CONFIG_CHx_EN(channel);
-    u16 config_old = ina->reg_config & mask;
-    u32 tmp;
-    int ret;
-
-    config = enable ? mask : 0;
-
-    /* Bypass if enable status is not being changed */
-    if (config_old == config)
-        return 0;
-
-    /* For enabling routine, increase refcount and resume() at first */
-    if (enable) {
-        ret = pm_runtime_resume_and_get(ina->pm_dev);
-        if (ret < 0) {
-            dev_err(dev, "Failed to get PM runtime\n");
-            return ret;
-        }
-    }
-
-    /* Enable or disable the channel */
-    tmp = (ina->reg_config & ~mask) | (config & mask);
-    ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
-    if (ret)
-        goto fail;
-
-    /* Cache the latest config register value */
-    ina->reg_config = tmp;
-
-    /* For disabling routine, decrease refcount or suspend() at last */
-    if (!enable)
-        pm_runtime_put_sync(ina->pm_dev);
-
-    return 0;
-
-fail:
-    if (enable) {
-        dev_err(dev, "Failed to enable channel %d: error %d\n",
-            channel, ret);
-        pm_runtime_put_sync(ina->pm_dev);
-    }
-
-    return ret;
-}
-
-static int ina3221_read(struct device *dev, enum hwmon_sensor_types type,
-            u32 attr, int channel, long *val)
-{
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    int ret;
-
-    mutex_lock(&ina->lock);
-
-    switch (type) {
-    case hwmon_chip:
-        ret = ina3221_read_chip(dev, attr, val);
-        break;
-    case hwmon_in:
-        /* 0-align channel ID */
-        ret = ina3221_read_in(dev, attr, channel - 1, val);
-        break;
-    case hwmon_curr:
-        ret = ina3221_read_curr(dev, attr, channel, val);
-        break;
-    default:
-        ret = -EOPNOTSUPP;
-        break;
-    }
-
-    mutex_unlock(&ina->lock);
-
-    return ret;
-}
-
-static int ina3221_write(struct device *dev, enum hwmon_sensor_types type,
-             u32 attr, int channel, long val)
-{
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    int ret;
-
-    mutex_lock(&ina->lock);
-
-    switch (type) {
-    case hwmon_chip:
-        ret = ina3221_write_chip(dev, attr, val);
-        break;
-    case hwmon_in:
-        /* 0-align channel ID */
-        ret = ina3221_write_enable(dev, channel - 1, val);
-        break;
-    case hwmon_curr:
-        ret = ina3221_write_curr(dev, attr, channel, val);
-        break;
-    default:
-        ret = -EOPNOTSUPP;
-        break;
-    }
-
-    mutex_unlock(&ina->lock);
-
-    return ret;
-}
-
-static int ina3221_read_string(struct device *dev, enum hwmon_sensor_types type,
-                   u32 attr, int channel, const char **str)
-{
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    int index = channel - 1;
-
-    if (channel == 7)
-        *str = "sum of shunt voltages";
-    else
-        *str = ina->inputs[index].label;
-
-    return 0;
-}
-
-static umode_t ina3221_is_visible(const void *drvdata,
-                  enum hwmon_sensor_types type,
-                  u32 attr, int channel)
-{
-    const struct ina3221_data *ina = drvdata;
-    const struct ina3221_input *input = NULL;
-
-    switch (type) {
-    case hwmon_chip:
-        switch (attr) {
-        case hwmon_chip_samples:
-        case hwmon_chip_update_interval:
-            return 0644;
-        default:
-            return 0;
-        }
-    case hwmon_in:
-        /* Ignore in0_ */
-        if (channel == 0)
-            return 0;
-
-        switch (attr) {
-        case hwmon_in_label:
-            if (channel - 1 <= INA3221_CHANNEL3)
-                input = &ina->inputs[channel - 1];
-            else if (channel == 7)
-                return 0444;
-            /* Hide label node if label is not provided */
-            return (input && input->label) ? 0444 : 0;
-        case hwmon_in_input:
-            return 0444;
-        case hwmon_in_enable:
-            return 0644;
-        default:
-            return 0;
-        }
-    case hwmon_curr:
-        switch (attr) {
-        case hwmon_curr_input:
-        case hwmon_curr_crit_alarm:
-        case hwmon_curr_max_alarm:
-            return 0444;
-        case hwmon_curr_crit:
-        case hwmon_curr_max:
-            return 0644;
-        default:
-            return 0;
-        }
-    default:
-        return 0;
-    }
-}
-
-#define INA3221_HWMON_CURR_CONFIG (HWMON_C_INPUT | \
-                   HWMON_C_CRIT | HWMON_C_CRIT_ALARM | \
-                   HWMON_C_MAX | HWMON_C_MAX_ALARM)
-
-static const struct hwmon_channel_info *ina3221_info[] = {
-    HWMON_CHANNEL_INFO(chip,
-               HWMON_C_SAMPLES,
-               HWMON_C_UPDATE_INTERVAL),
-    HWMON_CHANNEL_INFO(in,
-               /* 0: dummy, skipped in is_visible */
-               HWMON_I_INPUT,
-               /* 1-3: input voltage Channels */
-               HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
-               HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
-               HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
-               /* 4-6: shunt voltage Channels */
-               HWMON_I_INPUT,
-               HWMON_I_INPUT,
-               HWMON_I_INPUT,
-               /* 7: summation of shunt voltage channels */
-               HWMON_I_INPUT | HWMON_I_LABEL),
-    HWMON_CHANNEL_INFO(curr,
-               /* 1-3: current channels*/
-               INA3221_HWMON_CURR_CONFIG,
-               INA3221_HWMON_CURR_CONFIG,
-               INA3221_HWMON_CURR_CONFIG,
-               /* 4: summation of current channels */
-               HWMON_C_INPUT | HWMON_C_CRIT | HWMON_C_CRIT_ALARM),
-    NULL
-};
-
-static const struct hwmon_ops ina3221_hwmon_ops = {
-    .is_visible = ina3221_is_visible,
-    .read_string = ina3221_read_string,
-    .read = ina3221_read,
-    .write = ina3221_write,
-};
-
-static const struct hwmon_chip_info ina3221_chip_info = {
-    .ops = &ina3221_hwmon_ops,
-    .info = ina3221_info,
-};
-
-/* Extra attribute groups */
-static ssize_t ina3221_shunt_show(struct device *dev,
-                  struct device_attribute *attr, char *buf)
-{
-    struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr);
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    unsigned int channel = sd_attr->index;
-    struct ina3221_input *input = &ina->inputs[channel];
-
-    return snprintf(buf, PAGE_SIZE, "%d\n", input->shunt_resistor);
-}
-
-static ssize_t ina3221_shunt_store(struct device *dev,
-                   struct device_attribute *attr,
-                   const char *buf, size_t count)
-{
-    struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr);
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    unsigned int channel = sd_attr->index;
-    struct ina3221_input *input = &ina->inputs[channel];
-    int val;
-    int ret;
-
-    ret = kstrtoint(buf, 0, &val);
-    if (ret)
-        return ret;
-
-    val = clamp_val(val, 1, INT_MAX);
-
-    input->shunt_resistor = val;
-
-    /* Update summation_shunt_resistor for summation channel */
-    ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina);
-
-    return count;
-}
-
-/* shunt resistance */
-static SENSOR_DEVICE_ATTR_RW(shunt1_resistor, ina3221_shunt, INA3221_CHANNEL1);
-static SENSOR_DEVICE_ATTR_RW(shunt2_resistor, ina3221_shunt, INA3221_CHANNEL2);
-static SENSOR_DEVICE_ATTR_RW(shunt3_resistor, ina3221_shunt, INA3221_CHANNEL3);
-
-static struct attribute *ina3221_attrs[] = {
-    &sensor_dev_attr_shunt1_resistor.dev_attr.attr,
-    &sensor_dev_attr_shunt2_resistor.dev_attr.attr,
-    &sensor_dev_attr_shunt3_resistor.dev_attr.attr,
-    NULL,
-};
-ATTRIBUTE_GROUPS(ina3221);
-
-static const struct regmap_range ina3221_yes_ranges[] = {
-    regmap_reg_range(INA3221_CONFIG, INA3221_BUS3),
-    regmap_reg_range(INA3221_SHUNT_SUM, INA3221_SHUNT_SUM),
-    regmap_reg_range(INA3221_MASK_ENABLE, INA3221_MASK_ENABLE),
-};
-
-static const struct regmap_access_table ina3221_volatile_table = {
-    .yes_ranges = ina3221_yes_ranges,
-    .n_yes_ranges = ARRAY_SIZE(ina3221_yes_ranges),
-};
-
-static const struct regmap_config ina3221_regmap_config = {
-    .reg_bits = 8,
-    .val_bits = 16,
-
-    .cache_type = REGCACHE_RBTREE,
-    .volatile_table = &ina3221_volatile_table,
-};
-
-static int ina3221_probe_child_from_dt(struct device *dev,
-                       struct device_node *child,
-                       struct ina3221_data *ina)
-{
-    struct ina3221_input *input;
-    u32 val;
-    int ret;
-
-    ret = of_property_read_u32(child, "reg", &val);
-    if (ret) {
-        dev_err(dev, "missing reg property of %pOFn\n", child);
-        return ret;
-    } else if (val > INA3221_CHANNEL3) {
-        dev_err(dev, "invalid reg %d of %pOFn\n", val, child);
-        return ret;
-    }
-
-    input = &ina->inputs[val];
-
-    /* Log the disconnected channel input */
-    if (!of_device_is_available(child)) {
-        input->disconnected = true;
-        return 0;
-    }
-
-    /* Save the connected input label if available */
-    of_property_read_string(child, "label", &input->label);
-
-    /* Overwrite default shunt resistor value optionally */
-    if (!of_property_read_u32(child, "shunt-resistor-micro-ohms", &val)) {
-        if (val < 1 || val > INT_MAX) {
-            dev_err(dev, "invalid shunt resistor value %u of %pOFn\n",
-                val, child);
-            return -EINVAL;
-        }
-        input->shunt_resistor = val;
-    }
-
-    return 0;
-}
-
-static int ina3221_probe_from_dt(struct device *dev, struct ina3221_data *ina)
-{
-    const struct device_node *np = dev->of_node;
-    struct device_node *child;
-    int ret;
-
-    /* Compatible with non-DT platforms */
-    if (!np)
-        return 0;
-
-    ina->single_shot = of_property_read_bool(np, "ti,single-shot");
-
-    for_each_child_of_node(np, child) {
-        ret = ina3221_probe_child_from_dt(dev, child, ina);
-        if (ret) {
-            of_node_put(child);
-            return ret;
-        }
-    }
-
-    return 0;
-}
-
-static int ina3221_probe(struct i2c_client *client)
-{
-    struct device *dev = &client->dev;
-    struct ina3221_data *ina;
-    struct device *hwmon_dev;
-    int i, ret;
-
-    ina = devm_kzalloc(dev, sizeof(*ina), GFP_KERNEL);
-    if (!ina)
-        return -ENOMEM;
-
-    ina->regmap = devm_regmap_init_i2c(client, &ina3221_regmap_config);
-    if (IS_ERR(ina->regmap)) {
-        dev_err(dev, "Unable to allocate register map\n");
-        return PTR_ERR(ina->regmap);
-    }
-
-    for (i = 0; i < F_MAX_FIELDS; i++) {
-        ina->fields[i] = devm_regmap_field_alloc(dev,
-                             ina->regmap,
-                             ina3221_reg_fields[i]);
-        if (IS_ERR(ina->fields[i])) {
-            dev_err(dev, "Unable to allocate regmap fields\n");
-            return PTR_ERR(ina->fields[i]);
-        }
-    }
-
-    for (i = 0; i < INA3221_NUM_CHANNELS; i++)
-        ina->inputs[i].shunt_resistor = INA3221_RSHUNT_DEFAULT;
-
-    ret = ina3221_probe_from_dt(dev, ina);
-    if (ret) {
-        dev_err(dev, "Unable to probe from device tree\n");
-        return ret;
-    }
-
-    /* The driver will be reset, so use reset value */
-    ina->reg_config = INA3221_CONFIG_DEFAULT;
-
-    /* Clear continuous bit to use single-shot mode */
-    if (ina->single_shot)
-        ina->reg_config &= ~INA3221_CONFIG_MODE_CONTINUOUS;
-
-    /* Disable channels if their inputs are disconnected */
-    for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
-        if (ina->inputs[i].disconnected)
-            ina->reg_config &= ~INA3221_CONFIG_CHx_EN(i);
-    }
-
-    /* Initialize summation_shunt_resistor for summation channel control */
-    ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina);
-
-    ina->pm_dev = dev;
-    mutex_init(&ina->lock);
-    dev_set_drvdata(dev, ina);
-
-    /* Enable PM runtime -- status is suspended by default */
-    pm_runtime_enable(ina->pm_dev);
-
-    /* Initialize (resume) the device */
-    for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
-        if (ina->inputs[i].disconnected)
-            continue;
-        /* Match the refcount with number of enabled channels */
-        ret = pm_runtime_get_sync(ina->pm_dev);
-        if (ret < 0)
-            goto fail;
-    }
-
-    hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, ina,
-                             &ina3221_chip_info,
-                             ina3221_groups);
-    if (IS_ERR(hwmon_dev)) {
-        dev_err(dev, "Unable to register hwmon device\n");
-        ret = PTR_ERR(hwmon_dev);
-        goto fail;
-    }
-
-    return 0;
-
-fail:
-    pm_runtime_disable(ina->pm_dev);
-    pm_runtime_set_suspended(ina->pm_dev);
-    /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */
-    for (i = 0; i < INA3221_NUM_CHANNELS; i++)
-        pm_runtime_put_noidle(ina->pm_dev);
-    mutex_destroy(&ina->lock);
-
-    return ret;
-}
-
-static void ina3221_remove(struct i2c_client *client)
-{
-    struct ina3221_data *ina = dev_get_drvdata(&client->dev);
-    int i;
-
-    pm_runtime_disable(ina->pm_dev);
-    pm_runtime_set_suspended(ina->pm_dev);
-
-    /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */
-    for (i = 0; i < INA3221_NUM_CHANNELS; i++)
-        pm_runtime_put_noidle(ina->pm_dev);
-
-    mutex_destroy(&ina->lock);
-
-    return;
-}
-
-static int __maybe_unused ina3221_suspend(struct device *dev)
-{
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    int ret;
-
-    /* Save config register value and enable cache-only */
-    ret = regmap_read(ina->regmap, INA3221_CONFIG, &ina->reg_config);
-    if (ret)
-        return ret;
-
-    /* Set to power-down mode for power saving */
-    ret = regmap_update_bits(ina->regmap, INA3221_CONFIG,
-                 INA3221_CONFIG_MODE_MASK,
-                 INA3221_CONFIG_MODE_POWERDOWN);
-    if (ret)
-        return ret;
-
-    regcache_cache_only(ina->regmap, true);
-    regcache_mark_dirty(ina->regmap);
-
-    return 0;
-}
-
-static int __maybe_unused ina3221_resume(struct device *dev)
-{
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    int ret;
-
-    regcache_cache_only(ina->regmap, false);
-
-    /* Software reset the chip */
-    ret = regmap_field_write(ina->fields[F_RST], true);
-    if (ret) {
-        dev_err(dev, "Unable to reset device\n");
-        return ret;
-    }
-
-    /* Restore cached register values to hardware */
-    ret = regcache_sync(ina->regmap);
-    if (ret)
-        return ret;
-
-    /* Restore config register value to hardware */
-    ret = regmap_write(ina->regmap, INA3221_CONFIG, ina->reg_config);
-    if (ret)
-        return ret;
-
-    /* Initialize summation channel control */
-    if (ina->summation_shunt_resistor) {
-        /*
-         * Take all three channels into summation by default
-         * Shunt measurements of disconnected channels should
-         * be 0, so it does not matter for summation.
-         */
-        ret = regmap_update_bits(ina->regmap, INA3221_MASK_ENABLE,
-                     INA3221_MASK_ENABLE_SCC_MASK,
-                     INA3221_MASK_ENABLE_SCC_MASK);
-        if (ret) {
-            dev_err(dev, "Unable to control summation channel\n");
-            return ret;
-        }
-    }
-
-    return 0;
-}
-
-static const struct dev_pm_ops ina3221_pm = {
-    SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
-                pm_runtime_force_resume)
-    SET_RUNTIME_PM_OPS(ina3221_suspend, ina3221_resume, NULL)
-};
-
-static const struct of_device_id ina3221_of_match_table[] = {
-    { .compatible = "ti,wb_ina3221", },
-    { /* sentinel */ }
-};
-MODULE_DEVICE_TABLE(of, ina3221_of_match_table);
-
-static const struct i2c_device_id ina3221_ids[] = {
-    { "wb_ina3221", 0 },
-    { /* sentinel */ }
-};
-MODULE_DEVICE_TABLE(i2c, ina3221_ids);
-
-static struct i2c_driver ina3221_i2c_driver = {
-    .probe_new = ina3221_probe,
-    .remove = ina3221_remove,
-    .driver = {
-        .name = INA3221_DRIVER_NAME,
-        .of_match_table = ina3221_of_match_table,
-        .pm = &ina3221_pm,
-    },
-    .id_table = ina3221_ids,
-};
-module_i2c_driver(ina3221_i2c_driver);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("Texas Instruments INA3221 HWMon Driver");
-MODULE_LICENSE("GPL v2");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_isl68137.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_isl68137.c
deleted file mode 100644
index 648020435311..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_isl68137.c
+++ /dev/null
@@ -1,577 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Hardware monitoring driver for Renesas Digital Multiphase Voltage Regulators
- *
- * Copyright (c) 2017 Google Inc
- * Copyright (c) 2020 Renesas Electronics America
- *
- */
-
-#include <linux/err.h>
-#include <linux/hwmon-sysfs.h>
-#include <linux/i2c.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/string.h>
-#include <linux/sysfs.h>
-
-#include "wb_pmbus.h"
-
-#define ISL68137_VOUT_AVS       (0x30)
-#define RAA_DMPVR2_READ_VMON    (0xc8)
-#define WRITE_PROTECT_CLOSE     (0x00)
-#define WRITE_PROTECT_OPEN      (0x40)
-
-static int g_wb_isl68137_debug = 0;
-static int g_wb_isl68137_error = 0;
-
-module_param(g_wb_isl68137_debug, int, S_IRUGO | S_IWUSR);
-module_param(g_wb_isl68137_error, int, S_IRUGO | S_IWUSR);
-
-#define WB_ISL68137_VERBOSE(fmt, args...) do {                                        \
-    if (g_wb_isl68137_debug) { \
-        printk(KERN_INFO "[WB_ISL68137][VER][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-#define WB_ISL68137_ERROR(fmt, args...) do {                                        \
-    if (g_wb_isl68137_error) { \
-        printk(KERN_ERR "[WB_ISL68137][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-enum chips {
-    isl68137,
-    isl68220,
-    isl68221,
-    isl68222,
-    isl68223,
-    isl68224,
-    isl68225,
-    isl68226,
-    isl68227,
-    isl68229,
-    isl68233,
-    isl68239,
-    isl69222,
-    isl69223,
-    isl69224,
-    isl69225,
-    isl69227,
-    isl69228,
-    isl69234,
-    isl69236,
-    isl69239,
-    isl69242,
-    isl69243,
-    isl69247,
-    isl69248,
-    isl69254,
-    isl69255,
-    isl69256,
-    isl69259,
-    isl69260,
-    isl69268,
-    isl69269,
-    isl69298,
-    raa228000,
-    raa228004,
-    raa228006,
-    raa228228,
-    raa229001,
-    raa229004,
-};
-
-enum variants {
-    raa_dmpvr1_2rail,
-    raa_dmpvr2_1rail,
-    raa_dmpvr2_2rail,
-    raa_dmpvr2_2rail_nontc,
-    raa_dmpvr2_3rail,
-    raa_dmpvr2_hv,
-};
-
-static const struct i2c_device_id raa_dmpvr_id[];
-
-static ssize_t isl68137_avs_enable_show_page(struct i2c_client *client,
-                         int page,
-                         char *buf)
-{
-    int val = wb_pmbus_read_byte_data(client, page, PMBUS_OPERATION);
-
-    return sprintf(buf, "%d\n",
-               (val & ISL68137_VOUT_AVS) == ISL68137_VOUT_AVS ? 1 : 0);
-}
-
-static ssize_t isl68137_avs_enable_store_page(struct i2c_client *client,
-                          int page,
-                          const char *buf, size_t count)
-{
-    int rc, op_val;
-    bool result;
-
-    rc = kstrtobool(buf, &result);
-    if (rc)
-        return rc;
-
-    op_val = result ? ISL68137_VOUT_AVS : 0;
-
-    /*
-     * Writes to VOUT setpoint over AVSBus will persist after the VRM is
-     * switched to PMBus control. Switching back to AVSBus control
-     * restores this persisted setpoint rather than re-initializing to
-     * PMBus VOUT_COMMAND. Writing VOUT_COMMAND first over PMBus before
-     * enabling AVS control is the workaround.
-     */
-    if (op_val == ISL68137_VOUT_AVS) {
-        rc = wb_pmbus_read_word_data(client, page, 0xff,
-                      PMBUS_VOUT_COMMAND);
-        if (rc < 0)
-            return rc;
-
-        rc = wb_pmbus_write_word_data(client, page, PMBUS_VOUT_COMMAND,
-                       rc);
-        if (rc < 0)
-            return rc;
-    }
-
-    rc = wb_pmbus_update_byte_data(client, page, PMBUS_OPERATION,
-                    ISL68137_VOUT_AVS, op_val);
-
-    return (rc < 0) ? rc : count;
-}
-
-static ssize_t isl68137_avs_enable_show(struct device *dev,
-                    struct device_attribute *devattr,
-                    char *buf)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-
-    return isl68137_avs_enable_show_page(client, attr->index, buf);
-}
-
-static ssize_t isl68137_avs_enable_store(struct device *dev,
-                struct device_attribute *devattr,
-                const char *buf, size_t count)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-
-    return isl68137_avs_enable_store_page(client, attr->index, buf, count);
-}
-
-static ssize_t isl68137_avs_vout_show(struct device *dev, struct device_attribute *devattr,
-                   char *buf)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int vout_cmd, vout;
-
-    mutex_lock(&data->update_lock);
-    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
-    if (vout_cmd < 0) {
-        WB_ISL68137_ERROR("%d-%04x: read page%d vout command reg: 0x%x failed, ret: %d\n",
-            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd);
-        mutex_unlock(&data->update_lock);
-        return vout_cmd;
-    }
-    vout = vout_cmd * 1000;
-    WB_ISL68137_VERBOSE("%d-%04x: page%d, vout: %d, vout_cmd: 0x%x\n", client->adapter->nr,
-        client->addr, attr->index, vout, vout_cmd);
-    mutex_unlock(&data->update_lock);
-    return snprintf(buf, PAGE_SIZE, "%d\n", vout);
-}
-
-static ssize_t isl68137_avs_vout_store(struct device *dev, struct device_attribute *devattr,
-                   const char *buf, size_t count)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int vout, vout_max, vout_min;
-    int ret, vout_cmd, vout_cmd_set;
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    ret = kstrtoint(buf, 0, &vout);
-    if (ret) {
-        WB_ISL68137_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
-        return -EINVAL;
-    }
-
-    if (vout <= 0) {
-        WB_ISL68137_ERROR("%d-%04x: invalid value: %d \n", client->adapter->nr, client->addr, vout);
-        return -EINVAL;
-    }
-
-    vout_max = data->vout_max[attr->index];
-    vout_min = data->vout_min[attr->index];
-    if ((vout > vout_max) || (vout < vout_min)) {
-        WB_ISL68137_ERROR("%d-%04x: vout value: %d, out of range [%d, %d] \n", client->adapter->nr,
-            client->addr, vout, vout_min, vout_max);
-        return -EINVAL;
-    }
-
-    /* calc VOUT_COMMAND set value */
-    vout_cmd_set = vout / 1000;
-    if (vout_cmd_set > 0xffff) {
-        WB_ISL68137_ERROR("%d-%04x: invalid value, vout %d, vout_cmd_set: 0x%x\n",
-            client->adapter->nr, client->addr, vout, vout_cmd_set);
-        return -EINVAL;
-    }
-
-    mutex_lock(&data->update_lock);
-
-    /* close write protect */
-    ret = wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, WRITE_PROTECT_CLOSE);
-    if (ret < 0) {
-        WB_ISL68137_ERROR("%d-%04x: close page%d write protect failed, ret: %d\n", client->adapter->nr,
-            client->addr, attr->index, ret);
-        mutex_unlock(&data->update_lock);
-        return ret;
-    }
-
-    /* set VOUT_COMMAND */
-    ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set);
-    if (ret < 0) {
-        WB_ISL68137_ERROR("%d-%04x: set page%d vout cmd reg: 0x%x, value: 0x%x failed, ret: %d\n",
-            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set, ret);
-        goto error;
-    }
-
-    /* read back VOUT_COMMAND */
-    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
-    if (vout_cmd < 0) {
-        ret = vout_cmd;
-        WB_ISL68137_ERROR("%d-%04x: read page%d vout command reg: 0x%x failed, ret: %d\n",
-            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, ret);
-        goto error;
-    }
-
-    /* compare vout_cmd and vout_cmd_set */
-    if (vout_cmd != vout_cmd_set) {
-        ret = -EIO;
-        WB_ISL68137_ERROR("%d-%04x: vout cmd value check error, vout cmd read: 0x%x, vout cmd set: 0x%x\n",
-            client->adapter->nr, client->addr, vout_cmd, vout_cmd_set);
-        goto error;
-    }
-
-    /* open write protect */
-    wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, WRITE_PROTECT_OPEN);
-    mutex_unlock(&data->update_lock);
-    WB_ISL68137_VERBOSE("%d-%04x: set page%d vout cmd success, vout %d, vout_cmd_set: 0x%x\n",
-        client->adapter->nr, client->addr, attr->index, vout, vout_cmd_set);
-    return count;
-error:
-    wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, WRITE_PROTECT_OPEN);
-    mutex_unlock(&data->update_lock);
-    return ret;
-}
-
-static ssize_t isl68137_avs_vout_max_store(struct device *dev,
-                   struct device_attribute *devattr, const char *buf, size_t count)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int ret, vout_threshold;
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    ret = kstrtoint(buf, 0, &vout_threshold);
-    if (ret) {
-        WB_ISL68137_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
-        return -EINVAL;
-    }
-
-    WB_ISL68137_VERBOSE("%d-%04x: vout%d max threshold: %d", client->adapter->nr, client->addr,
-        attr->index, vout_threshold);
-
-    data->vout_max[attr->index] = vout_threshold;
-    return count;
-}
-
-static ssize_t isl68137_avs_vout_max_show(struct device *dev,
-                   struct device_attribute *devattr, char *buf)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_max[attr->index]);
-}
-
-static ssize_t isl68137_avs_vout_min_store(struct device *dev,
-                   struct device_attribute *devattr, const char *buf, size_t count)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int ret, vout_threshold;
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    ret = kstrtoint(buf, 0, &vout_threshold);
-    if (ret) {
-        WB_ISL68137_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
-        return -EINVAL;
-    }
-
-    WB_ISL68137_VERBOSE("%d-%04x: vout%d min threshold: %d", client->adapter->nr, client->addr,
-        attr->index, vout_threshold);
-
-    data->vout_min[attr->index] = vout_threshold;
-    return count;
-}
-
-static ssize_t isl68137_avs_vout_min_show(struct device *dev,
-                   struct device_attribute *devattr, char *buf)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_min[attr->index]);
-}
-
-static SENSOR_DEVICE_ATTR_RW(avs0_enable, isl68137_avs_enable, 0);
-static SENSOR_DEVICE_ATTR_RW(avs1_enable, isl68137_avs_enable, 1);
-
-static SENSOR_DEVICE_ATTR_RW(avs0_vout, isl68137_avs_vout, 0);
-static SENSOR_DEVICE_ATTR_RW(avs1_vout, isl68137_avs_vout, 1);
-static SENSOR_DEVICE_ATTR_RW(avs0_vout_max, isl68137_avs_vout_max, 0);
-static SENSOR_DEVICE_ATTR_RW(avs0_vout_min, isl68137_avs_vout_min, 0);
-static SENSOR_DEVICE_ATTR_RW(avs1_vout_max, isl68137_avs_vout_max, 1);
-static SENSOR_DEVICE_ATTR_RW(avs1_vout_min, isl68137_avs_vout_min, 1);
-
-static struct attribute *enable_attrs[] = {
-    &sensor_dev_attr_avs0_enable.dev_attr.attr,
-    &sensor_dev_attr_avs1_enable.dev_attr.attr,
-    NULL,
-};
-
-static struct attribute *avs_ctrl_attrs[] = {
-    &sensor_dev_attr_avs0_vout.dev_attr.attr,
-    &sensor_dev_attr_avs1_vout.dev_attr.attr,
-    &sensor_dev_attr_avs0_vout_max.dev_attr.attr,
-    &sensor_dev_attr_avs0_vout_min.dev_attr.attr,
-    &sensor_dev_attr_avs1_vout_max.dev_attr.attr,
-    &sensor_dev_attr_avs1_vout_min.dev_attr.attr,
-    NULL,
-};
-
-static const struct attribute_group enable_group = {
-    .attrs = enable_attrs,
-};
-
-static const struct attribute_group avs_ctrl_group = {
-    .attrs = avs_ctrl_attrs,
-};
-
-static const struct attribute_group *isl68137_attribute_groups[] = {
-    &enable_group,
-    &avs_ctrl_group,
-    NULL,
-};
-
-static int raa_dmpvr2_read_word_data(struct i2c_client *client, int page,
-                     int phase, int reg)
-{
-    int ret;
-
-    switch (reg) {
-    case PMBUS_VIRT_READ_VMON:
-        ret = wb_pmbus_read_word_data(client, page, phase,
-                       RAA_DMPVR2_READ_VMON);
-        break;
-    default:
-        ret = -ENODATA;
-        break;
-    }
-
-    return ret;
-}
-
-static struct pmbus_driver_info raa_dmpvr_info = {
-    .pages = 3,
-    .format[PSC_VOLTAGE_IN] = direct,
-    .format[PSC_VOLTAGE_OUT] = direct,
-    .format[PSC_CURRENT_IN] = direct,
-    .format[PSC_CURRENT_OUT] = direct,
-    .format[PSC_POWER] = direct,
-    .format[PSC_TEMPERATURE] = direct,
-    .m[PSC_VOLTAGE_IN] = 1,
-    .b[PSC_VOLTAGE_IN] = 0,
-    .R[PSC_VOLTAGE_IN] = 2,
-    .m[PSC_VOLTAGE_OUT] = 1,
-    .b[PSC_VOLTAGE_OUT] = 0,
-    .R[PSC_VOLTAGE_OUT] = 3,
-    .m[PSC_CURRENT_IN] = 1,
-    .b[PSC_CURRENT_IN] = 0,
-    .R[PSC_CURRENT_IN] = 2,
-    .m[PSC_CURRENT_OUT] = 1,
-    .b[PSC_CURRENT_OUT] = 0,
-    .R[PSC_CURRENT_OUT] = 1,
-    .m[PSC_POWER] = 1,
-    .b[PSC_POWER] = 0,
-    .R[PSC_POWER] = 0,
-    .m[PSC_TEMPERATURE] = 1,
-    .b[PSC_TEMPERATURE] = 0,
-    .R[PSC_TEMPERATURE] = 0,
-    .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN
-        | PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2
-        | PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_TEMP
-        | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
-        | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT
-        | PMBUS_HAVE_VMON,
-    .func[1] = PMBUS_HAVE_IIN | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT
-        | PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_TEMP
-        | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_IOUT
-        | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT,
-    .func[2] = PMBUS_HAVE_IIN | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT
-        | PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_TEMP
-        | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_IOUT
-        | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT,
-};
-
-static int isl68137_probe(struct i2c_client *client)
-{
-    struct pmbus_driver_info *info;
-
-    info = devm_kzalloc(&client->dev, sizeof(*info), GFP_KERNEL);
-    if (!info)
-        return -ENOMEM;
-    memcpy(info, &raa_dmpvr_info, sizeof(*info));
-
-    switch (i2c_match_id(raa_dmpvr_id, client)->driver_data) {
-    case raa_dmpvr1_2rail:
-        info->pages = 2;
-        info->R[PSC_VOLTAGE_IN] = 3;
-        info->func[0] &= ~PMBUS_HAVE_VMON;
-        info->func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
-            | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
-            | PMBUS_HAVE_POUT;
-        info->groups = isl68137_attribute_groups;
-        break;
-    case raa_dmpvr2_1rail:
-        info->pages = 1;
-        info->read_word_data = raa_dmpvr2_read_word_data;
-        break;
-    case raa_dmpvr2_2rail_nontc:
-        info->func[0] &= ~PMBUS_HAVE_TEMP3;
-        info->func[1] &= ~PMBUS_HAVE_TEMP3;
-        fallthrough;
-    case raa_dmpvr2_2rail:
-        info->pages = 2;
-        info->read_word_data = raa_dmpvr2_read_word_data;
-        break;
-    case raa_dmpvr2_3rail:
-        info->read_word_data = raa_dmpvr2_read_word_data;
-        break;
-    case raa_dmpvr2_hv:
-        info->pages = 1;
-        info->R[PSC_VOLTAGE_IN] = 1;
-        info->m[PSC_VOLTAGE_OUT] = 2;
-        info->R[PSC_VOLTAGE_OUT] = 2;
-        info->m[PSC_CURRENT_IN] = 2;
-        info->m[PSC_POWER] = 2;
-        info->R[PSC_POWER] = -1;
-        info->read_word_data = raa_dmpvr2_read_word_data;
-        break;
-    default:
-        return -ENODEV;
-    }
-
-    return wb_pmbus_do_probe(client, info);
-}
-
-static const struct i2c_device_id raa_dmpvr_id[] = {
-    {"wb_isl68127", raa_dmpvr1_2rail},
-    {"wb_isl68137", raa_dmpvr1_2rail},
-    {"wb_isl68220", raa_dmpvr2_2rail},
-    {"wb_isl68221", raa_dmpvr2_3rail},
-    {"wb_isl68222", raa_dmpvr2_2rail},
-    {"wb_isl68223", raa_dmpvr2_2rail},
-    {"wb_isl68224", raa_dmpvr2_3rail},
-    {"wb_isl68225", raa_dmpvr2_2rail},
-    {"wb_isl68226", raa_dmpvr2_3rail},
-    {"wb_isl68227", raa_dmpvr2_1rail},
-    {"wb_isl68229", raa_dmpvr2_3rail},
-    {"wb_isl68233", raa_dmpvr2_2rail},
-    {"wb_isl68239", raa_dmpvr2_3rail},
-
-    {"wb_isl69222", raa_dmpvr2_2rail},
-    {"wb_isl69223", raa_dmpvr2_3rail},
-    {"wb_isl69224", raa_dmpvr2_2rail},
-    {"wb_isl69225", raa_dmpvr2_2rail},
-    {"wb_isl69227", raa_dmpvr2_3rail},
-    {"wb_isl69228", raa_dmpvr2_3rail},
-    {"wb_isl69234", raa_dmpvr2_2rail},
-    {"wb_isl69236", raa_dmpvr2_2rail},
-    {"wb_isl69239", raa_dmpvr2_3rail},
-    {"wb_isl69242", raa_dmpvr2_2rail},
-    {"wb_isl69243", raa_dmpvr2_1rail},
-    {"wb_isl69247", raa_dmpvr2_2rail},
-    {"wb_isl69248", raa_dmpvr2_2rail},
-    {"wb_isl69254", raa_dmpvr2_2rail},
-    {"wb_isl69255", raa_dmpvr2_2rail},
-    {"wb_isl69256", raa_dmpvr2_2rail},
-    {"wb_isl69259", raa_dmpvr2_2rail},
-    {"wb_isl69260", raa_dmpvr2_2rail},
-    {"wb_isl69268", raa_dmpvr2_2rail},
-    {"wb_isl69269", raa_dmpvr2_3rail},
-    {"wb_isl69298", raa_dmpvr2_2rail},
-
-    {"wb_raa228000", raa_dmpvr2_hv},
-    {"wb_raa228004", raa_dmpvr2_hv},
-    {"wb_raa228006", raa_dmpvr2_hv},
-    {"wb_raa228228", raa_dmpvr2_2rail_nontc},
-    {"wb_raa229001", raa_dmpvr2_2rail},
-    {"wb_raa229004", raa_dmpvr2_2rail},
-    {}
-};
-
-MODULE_DEVICE_TABLE(i2c, raa_dmpvr_id);
-
-/* This is the driver that will be inserted */
-static struct i2c_driver isl68137_driver = {
-    .driver = {
-           .name = "wb_isl68137",
-           },
-    .probe_new = isl68137_probe,
-    .remove = wb_pmbus_do_remove,
-    .id_table = raa_dmpvr_id,
-};
-
-module_i2c_driver(isl68137_driver);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("PMBus driver for Renesas digital multiphase voltage regulators");
-MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.c
deleted file mode 100644
index 0386cfb0b61d..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.c
+++ /dev/null
@@ -1,992 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * lm75.c - Part of lm_sensors, Linux kernel modules for hardware
- *	 monitoring
- * Copyright (c) 1998, 1999  Frodo Looijaard <frodol@dds.nl>
- */
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/jiffies.h>
-#include <linux/i2c.h>
-#include <linux/hwmon.h>
-#include <linux/hwmon-sysfs.h>
-#include <linux/err.h>
-#include <linux/of_device.h>
-#include <linux/of.h>
-#include <linux/regmap.h>
-#include <linux/util_macros.h>
-#include <linux/regulator/consumer.h>
-#include <linux/delay.h>
-#include "wb_lm75.h"
-
-/*
- * This driver handles the LM75 and compatible digital temperature sensors.
- */
-
-enum lm75_type {		/* keep sorted in alphabetical order */
-	adt75,
-	ds1775,
-	ds75,
-	ds7505,
-	g751,
-	lm75,
-	lm75a,
-	lm75b,
-	max6625,
-	max6626,
-	max31725,
-	mcp980x,
-	pct2075,
-	stds75,
-	stlm75,
-	tcn75,
-	tmp100,
-	tmp101,
-	tmp105,
-	tmp112,
-	tmp175,
-	tmp275,
-	tmp75,
-	tmp75b,
-	tmp75c,
-};
-
-/**
- * struct lm75_params - lm75 configuration parameters.
- * @set_mask:		Bits to set in configuration register when configuring
- *			the chip.
- * @clr_mask:		Bits to clear in configuration register when configuring
- *			the chip.
- * @default_resolution:	Default number of bits to represent the temperature
- *			value.
- * @resolution_limits:	Limit register resolution. Optional. Should be set if
- *			the resolution of limit registers does not match the
- *			resolution of the temperature register.
- * @resolutions:	List of resolutions associated with sample times.
- *			Optional. Should be set if num_sample_times is larger
- *			than 1, and if the resolution changes with sample times.
- *			If set, number of entries must match num_sample_times.
- * @default_sample_time:Sample time to be set by default.
- * @num_sample_times:	Number of possible sample times to be set. Optional.
- *			Should be set if the number of sample times is larger
- *			than one.
- * @sample_times:	All the possible sample times to be set. Mandatory if
- *			num_sample_times is larger than 1. If set, number of
- *			entries must match num_sample_times.
- */
-
-struct lm75_params {
-	u8			set_mask;
-	u8			clr_mask;
-	u8			default_resolution;
-	u8			resolution_limits;
-	const u8		*resolutions;
-	unsigned int		default_sample_time;
-	u8			num_sample_times;
-	const unsigned int	*sample_times;
-};
-#if 0
-/* Addresses scanned */
-static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4b, 0x4c,
-					0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
-#endif
-/* The LM75 registers */
-#define LM75_REG_TEMP		0x00
-#define LM75_REG_CONF		0x01
-#define LM75_REG_HYST		0x02
-#define LM75_REG_MAX		0x03
-#define PCT2075_REG_IDLE	0x04
-#define LM75_TEMP_INVALID_RETRY_TIMES    (3)
-
-/* Each client has this additional data */
-struct lm75_data {
-	struct i2c_client		*client;
-	struct regmap			*regmap;
-	struct regulator		*vs;
-	u8				orig_conf;
-	u8				current_conf;
-	u8				resolution;	/* In bits, 9 to 16 */
-	unsigned int			sample_time;	/* In ms */
-	enum lm75_type			kind;
-	const struct lm75_params	*params;
-};
-
-/*-----------------------------------------------------------------------*/
-
-static const u8 lm75_sample_set_masks[] = { 0 << 5, 1 << 5, 2 << 5, 3 << 5 };
-
-#define LM75_SAMPLE_CLEAR_MASK	(3 << 5)
-
-/* The structure below stores the configuration values of the supported devices.
- * In case of being supported multiple configurations, the default one must
- * always be the first element of the array
- */
-static const struct lm75_params device_params[] = {
-	[adt75] = {
-		.clr_mask = 1 << 5,	/* not one-shot mode */
-		.default_resolution = 12,
-		.default_sample_time = MSEC_PER_SEC / 10,
-	},
-	[ds1775] = {
-		.clr_mask = 3 << 5,
-		.set_mask = 2 << 5,	/* 11-bit mode */
-		.default_resolution = 11,
-		.default_sample_time = 500,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 125, 250, 500, 1000 },
-		.resolutions = (u8 []) {9, 10, 11, 12 },
-	},
-	[ds75] = {
-		.clr_mask = 3 << 5,
-		.set_mask = 2 << 5,	/* 11-bit mode */
-		.default_resolution = 11,
-		.default_sample_time = 600,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 150, 300, 600, 1200 },
-		.resolutions = (u8 []) {9, 10, 11, 12 },
-	},
-	[stds75] = {
-		.clr_mask = 3 << 5,
-		.set_mask = 2 << 5,	/* 11-bit mode */
-		.default_resolution = 11,
-		.default_sample_time = 600,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 150, 300, 600, 1200 },
-		.resolutions = (u8 []) {9, 10, 11, 12 },
-	},
-	[stlm75] = {
-		.default_resolution = 9,
-		.default_sample_time = MSEC_PER_SEC / 6,
-	},
-	[ds7505] = {
-		.set_mask = 3 << 5,	/* 12-bit mode*/
-		.default_resolution = 12,
-		.default_sample_time = 200,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 25, 50, 100, 200 },
-		.resolutions = (u8 []) {9, 10, 11, 12 },
-	},
-	[g751] = {
-		.default_resolution = 9,
-		.default_sample_time = MSEC_PER_SEC / 10,
-	},
-	[lm75] = {
-		.default_resolution = 9,
-		.default_sample_time = MSEC_PER_SEC / 10,
-	},
-	[lm75a] = {
-		.default_resolution = 9,
-		.default_sample_time = MSEC_PER_SEC / 10,
-	},
-	[lm75b] = {
-		.default_resolution = 11,
-		.default_sample_time = MSEC_PER_SEC / 10,
-	},
-	[max6625] = {
-		.default_resolution = 9,
-		.default_sample_time = MSEC_PER_SEC / 7,
-	},
-	[max6626] = {
-		.default_resolution = 12,
-		.default_sample_time = MSEC_PER_SEC / 7,
-		.resolution_limits = 9,
-	},
-	[max31725] = {
-		.default_resolution = 16,
-		.default_sample_time = MSEC_PER_SEC / 20,
-	},
-	[tcn75] = {
-		.default_resolution = 9,
-		.default_sample_time = MSEC_PER_SEC / 18,
-	},
-	[pct2075] = {
-		.default_resolution = 11,
-		.default_sample_time = MSEC_PER_SEC / 10,
-		.num_sample_times = 31,
-		.sample_times = (unsigned int []){ 100, 200, 300, 400, 500, 600,
-		700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500, 1600, 1700,
-		1800, 1900, 2000, 2100, 2200, 2300, 2400, 2500, 2600, 2700,
-		2800, 2900, 3000, 3100 },
-	},
-	[mcp980x] = {
-		.set_mask = 3 << 5,	/* 12-bit mode */
-		.clr_mask = 1 << 7,	/* not one-shot mode */
-		.default_resolution = 12,
-		.resolution_limits = 9,
-		.default_sample_time = 240,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 30, 60, 120, 240 },
-		.resolutions = (u8 []) {9, 10, 11, 12 },
-	},
-	[tmp100] = {
-		.set_mask = 3 << 5,	/* 12-bit mode */
-		.clr_mask = 1 << 7,	/* not one-shot mode */
-		.default_resolution = 12,
-		.default_sample_time = 320,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 40, 80, 160, 320 },
-		.resolutions = (u8 []) {9, 10, 11, 12 },
-	},
-	[tmp101] = {
-		.set_mask = 3 << 5,	/* 12-bit mode */
-		.clr_mask = 1 << 7,	/* not one-shot mode */
-		.default_resolution = 12,
-		.default_sample_time = 320,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 40, 80, 160, 320 },
-		.resolutions = (u8 []) {9, 10, 11, 12 },
-	},
-	[tmp105] = {
-		.set_mask = 3 << 5,	/* 12-bit mode */
-		.clr_mask = 1 << 7,	/* not one-shot mode*/
-		.default_resolution = 12,
-		.default_sample_time = 220,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 28, 55, 110, 220 },
-		.resolutions = (u8 []) {9, 10, 11, 12 },
-	},
-	[tmp112] = {
-		.set_mask = 3 << 5,	/* 8 samples / second */
-		.clr_mask = 1 << 7,	/* no one-shot mode*/
-		.default_resolution = 12,
-		.default_sample_time = 125,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 125, 250, 1000, 4000 },
-	},
-	[tmp175] = {
-		.set_mask = 3 << 5,	/* 12-bit mode */
-		.clr_mask = 1 << 7,	/* not one-shot mode*/
-		.default_resolution = 12,
-		.default_sample_time = 220,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 28, 55, 110, 220 },
-		.resolutions = (u8 []) {9, 10, 11, 12 },
-	},
-	[tmp275] = {
-		.set_mask = 3 << 5,	/* 12-bit mode */
-		.clr_mask = 1 << 7,	/* not one-shot mode*/
-		.default_resolution = 12,
-		.default_sample_time = 220,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 28, 55, 110, 220 },
-		.resolutions = (u8 []) {9, 10, 11, 12 },
-	},
-	[tmp75] = {
-		.set_mask = 3 << 5,	/* 12-bit mode */
-		.clr_mask = 1 << 7,	/* not one-shot mode*/
-		.default_resolution = 12,
-		.default_sample_time = 220,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 28, 55, 110, 220 },
-		.resolutions = (u8 []) {9, 10, 11, 12 },
-	},
-	[tmp75b] = { /* not one-shot mode, Conversion rate 37Hz */
-		.clr_mask = 1 << 7 | 3 << 5,
-		.default_resolution = 12,
-		.default_sample_time = MSEC_PER_SEC / 37,
-		.sample_times = (unsigned int []){ MSEC_PER_SEC / 37,
-			MSEC_PER_SEC / 18,
-			MSEC_PER_SEC / 9, MSEC_PER_SEC / 4 },
-		.num_sample_times = 4,
-	},
-	[tmp75c] = {
-		.clr_mask = 1 << 5,	/*not one-shot mode*/
-		.default_resolution = 12,
-		.default_sample_time = MSEC_PER_SEC / 12,
-	}
-};
-
-/* input temp threshold check */
-typedef struct lm75_temp_threshold_s {
-    int chip_type;
-    int temp_max;
-    int temp_min;
-} lm75_temp_threshold_t;
-
-static lm75_temp_threshold_t g_lm75_temp_threshold_info[] = {
-    {
-        .chip_type = lm75,
-        .temp_max = 125000,
-        .temp_min = -55000,
-    },
-    {
-        .chip_type = tmp275,
-        .temp_max = 125000,
-        .temp_min = -40000,
-    },
-};
-
-/*-----------------------------------------------------------------------*/
-static int lm75_input_temp_check(struct lm75_data *data, int input_val)
-{
-    int i, size;
-
-    size = ARRAY_SIZE(g_lm75_temp_threshold_info);
-
-    for (i = 0; i < size; i++) {
-        if (g_lm75_temp_threshold_info[i].chip_type == data->kind) {
-            if ((input_val > g_lm75_temp_threshold_info[i].temp_max)
-                    || (input_val < g_lm75_temp_threshold_info[i].temp_min)) {
-                dev_dbg(&data->client->dev, "input temp: %d not in range[%d, %d]\n",
-                    input_val, g_lm75_temp_threshold_info[i].temp_min,
-                    g_lm75_temp_threshold_info[i].temp_max);
-                return -EINVAL;
-            }
-            dev_dbg(&data->client->dev, "input temp: %d in range[%d, %d]", input_val,
-                g_lm75_temp_threshold_info[i].temp_min, g_lm75_temp_threshold_info[i].temp_max);
-            return 0;
-        }
-    }
-    return 0;
-}
-
-static inline long lm75_reg_to_mc(s16 temp, u8 resolution)
-{
-	return ((temp >> (16 - resolution)) * 1000) >> (resolution - 8);
-}
-
-static int lm75_write_config(struct lm75_data *data, u8 set_mask,
-			     u8 clr_mask)
-{
-	u8 value;
-
-	clr_mask |= LM75_SHUTDOWN;
-	value = data->current_conf & ~clr_mask;
-	value |= set_mask;
-
-	if (data->current_conf != value) {
-		s32 err;
-
-		err = i2c_smbus_write_byte_data(data->client, LM75_REG_CONF,
-						value);
-		if (err)
-			return err;
-		data->current_conf = value;
-	}
-	return 0;
-}
-
-static int lm75_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel,
-               long *val)
-{
-    struct lm75_data *data = dev_get_drvdata(dev);
-    unsigned int regval;
-    int err, reg, i, ret;
-
-    switch (type) {
-    case hwmon_chip:
-        switch (attr) {
-        case hwmon_chip_update_interval:
-            *val = data->sample_time;
-            break;
-        default:
-            return -EINVAL;
-        }
-        break;
-    case hwmon_temp:
-        switch (attr) {
-        case hwmon_temp_input:
-            reg = LM75_REG_TEMP;
-            break;
-        case hwmon_temp_max:
-            reg = LM75_REG_MAX;
-            break;
-        case hwmon_temp_max_hyst:
-            reg = LM75_REG_HYST;
-            break;
-        default:
-            return -EINVAL;
-        }
-        for (i = 0; i < LM75_TEMP_INVALID_RETRY_TIMES; i++) {
-            err = regmap_read(data->regmap, reg, &regval);
-            if (err < 0) {
-                return err;
-            }
-            *val = lm75_reg_to_mc(regval, data->resolution);
-            if (reg != LM75_REG_TEMP) {
-                return 0;
-            }
-            /* do input_temp_check */
-            ret = lm75_input_temp_check(data, *val);
-            if (ret == 0) { /* input temp check ok */
-               return 0;
-            }
-            if ((i + 1) < LM75_TEMP_INVALID_RETRY_TIMES) {
-                msleep(data->sample_time);
-            }
-        }
-        dev_info(&data->client->dev, "temp_input value: %ld invalid\n", *val);
-        return -EINVAL;
-    default:
-        return -EINVAL;
-    }
-    return 0;
-}
-
-static int lm75_write_temp(struct device *dev, u32 attr, long temp)
-{
-	struct lm75_data *data = dev_get_drvdata(dev);
-	u8 resolution;
-	int reg;
-
-	switch (attr) {
-	case hwmon_temp_max:
-		reg = LM75_REG_MAX;
-		break;
-	case hwmon_temp_max_hyst:
-		reg = LM75_REG_HYST;
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	/*
-	 * Resolution of limit registers is assumed to be the same as the
-	 * temperature input register resolution unless given explicitly.
-	 */
-	if (data->params->resolution_limits)
-		resolution = data->params->resolution_limits;
-	else
-		resolution = data->resolution;
-
-	temp = clamp_val(temp, LM75_TEMP_MIN, LM75_TEMP_MAX);
-	temp = DIV_ROUND_CLOSEST(temp  << (resolution - 8),
-				 1000) << (16 - resolution);
-
-	return regmap_write(data->regmap, reg, (u16)temp);
-}
-
-static int lm75_update_interval(struct device *dev, long val)
-{
-	struct lm75_data *data = dev_get_drvdata(dev);
-	unsigned int reg;
-	u8 index;
-	s32 err;
-
-	index = find_closest(val, data->params->sample_times,
-			     (int)data->params->num_sample_times);
-
-	switch (data->kind) {
-	default:
-		err = lm75_write_config(data, lm75_sample_set_masks[index],
-					LM75_SAMPLE_CLEAR_MASK);
-		if (err)
-			return err;
-
-		data->sample_time = data->params->sample_times[index];
-		if (data->params->resolutions)
-			data->resolution = data->params->resolutions[index];
-		break;
-	case tmp112:
-		err = regmap_read(data->regmap, LM75_REG_CONF, &reg);
-		if (err < 0)
-			return err;
-		reg &= ~0x00c0;
-		reg |= (3 - index) << 6;
-		err = regmap_write(data->regmap, LM75_REG_CONF, reg);
-		if (err < 0)
-			return err;
-		data->sample_time = data->params->sample_times[index];
-		break;
-	case pct2075:
-		err = i2c_smbus_write_byte_data(data->client, PCT2075_REG_IDLE,
-						index + 1);
-		if (err)
-			return err;
-		data->sample_time = data->params->sample_times[index];
-		break;
-	}
-	return 0;
-}
-
-static int lm75_write_chip(struct device *dev, u32 attr, long val)
-{
-	switch (attr) {
-	case hwmon_chip_update_interval:
-		return lm75_update_interval(dev, val);
-	default:
-		return -EINVAL;
-	}
-	return 0;
-}
-
-static int lm75_write(struct device *dev, enum hwmon_sensor_types type,
-		      u32 attr, int channel, long val)
-{
-	switch (type) {
-	case hwmon_chip:
-		return lm75_write_chip(dev, attr, val);
-	case hwmon_temp:
-		return lm75_write_temp(dev, attr, val);
-	default:
-		return -EINVAL;
-	}
-	return 0;
-}
-
-static umode_t lm75_is_visible(const void *data, enum hwmon_sensor_types type,
-			       u32 attr, int channel)
-{
-	const struct lm75_data *config_data = data;
-
-	switch (type) {
-	case hwmon_chip:
-		switch (attr) {
-		case hwmon_chip_update_interval:
-			if (config_data->params->num_sample_times > 1)
-				return 0644;
-			return 0444;
-		}
-		break;
-	case hwmon_temp:
-		switch (attr) {
-		case hwmon_temp_input:
-			return 0444;
-		case hwmon_temp_max:
-		case hwmon_temp_max_hyst:
-			return 0644;
-		}
-		break;
-	default:
-		break;
-	}
-	return 0;
-}
-
-static const struct hwmon_channel_info *lm75_info[] = {
-	HWMON_CHANNEL_INFO(chip,
-			   HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL),
-	HWMON_CHANNEL_INFO(temp,
-			   HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST),
-	NULL
-};
-
-static const struct hwmon_ops lm75_hwmon_ops = {
-	.is_visible = lm75_is_visible,
-	.read = lm75_read,
-	.write = lm75_write,
-};
-
-static const struct hwmon_chip_info lm75_chip_info = {
-	.ops = &lm75_hwmon_ops,
-	.info = lm75_info,
-};
-
-static bool lm75_is_writeable_reg(struct device *dev, unsigned int reg)
-{
-	return reg != LM75_REG_TEMP;
-}
-
-static bool lm75_is_volatile_reg(struct device *dev, unsigned int reg)
-{
-	return reg == LM75_REG_TEMP || reg == LM75_REG_CONF;
-}
-
-static const struct regmap_config lm75_regmap_config = {
-	.reg_bits = 8,
-	.val_bits = 16,
-	.max_register = PCT2075_REG_IDLE,
-	.writeable_reg = lm75_is_writeable_reg,
-	.volatile_reg = lm75_is_volatile_reg,
-	.val_format_endian = REGMAP_ENDIAN_BIG,
-	.cache_type = REGCACHE_RBTREE,
-	.use_single_read = true,
-	.use_single_write = true,
-};
-
-static void lm75_disable_regulator(void *data)
-{
-	struct lm75_data *lm75 = data;
-
-	regulator_disable(lm75->vs);
-}
-
-static void lm75_remove(void *data)
-{
-	struct lm75_data *lm75 = data;
-	struct i2c_client *client = lm75->client;
-
-	i2c_smbus_write_byte_data(client, LM75_REG_CONF, lm75->orig_conf);
-}
-
-static const struct i2c_device_id lm75_ids[];
-
-static int lm75_probe(struct i2c_client *client)
-{
-	struct device *dev = &client->dev;
-	struct device *hwmon_dev;
-	struct lm75_data *data;
-	int status, err;
-	enum lm75_type kind;
-
-	if (client->dev.of_node)
-		kind = (enum lm75_type)of_device_get_match_data(&client->dev);
-	else
-		kind = i2c_match_id(lm75_ids, client)->driver_data;
-
-	if (!i2c_check_functionality(client->adapter,
-			I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA))
-		return -EIO;
-
-	data = devm_kzalloc(dev, sizeof(struct lm75_data), GFP_KERNEL);
-	if (!data)
-		return -ENOMEM;
-
-	data->client = client;
-	data->kind = kind;
-
-	data->vs = devm_regulator_get(dev, "vs");
-	if (IS_ERR(data->vs))
-		return PTR_ERR(data->vs);
-
-	data->regmap = devm_regmap_init_i2c(client, &lm75_regmap_config);
-	if (IS_ERR(data->regmap))
-		return PTR_ERR(data->regmap);
-
-	/* Set to LM75 resolution (9 bits, 1/2 degree C) and range.
-	 * Then tweak to be more precise when appropriate.
-	 */
-
-	data->params = &device_params[data->kind];
-
-	/* Save default sample time and resolution*/
-	data->sample_time = data->params->default_sample_time;
-	data->resolution = data->params->default_resolution;
-
-	/* Enable the power */
-	err = regulator_enable(data->vs);
-	if (err) {
-		dev_err(dev, "failed to enable regulator: %d\n", err);
-		return err;
-	}
-
-	err = devm_add_action_or_reset(dev, lm75_disable_regulator, data);
-	if (err)
-		return err;
-
-	/* Cache original configuration */
-	status = i2c_smbus_read_byte_data(client, LM75_REG_CONF);
-	if (status < 0) {
-		dev_dbg(dev, "Can't read config? %d\n", status);
-		return status;
-	}
-	data->orig_conf = status;
-	data->current_conf = status;
-
-	err = lm75_write_config(data, data->params->set_mask,
-				data->params->clr_mask);
-	if (err)
-		return err;
-
-	err = devm_add_action_or_reset(dev, lm75_remove, data);
-	if (err)
-		return err;
-
-	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
-							 data, &lm75_chip_info,
-							 NULL);
-	if (IS_ERR(hwmon_dev))
-		return PTR_ERR(hwmon_dev);
-
-	dev_info(dev, "%s: sensor '%s'\n", dev_name(hwmon_dev), client->name);
-
-	return 0;
-}
-
-static const struct i2c_device_id lm75_ids[] = {
-	{ "wb_adt75", adt75, },
-	{ "wb_ds1775", ds1775, },
-	{ "wb_ds75", ds75, },
-	{ "wb_ds7505", ds7505, },
-	{ "wb_g751", g751, },
-	{ "wb_lm75", lm75, },
-	{ "wb_lm75a", lm75a, },
-	{ "wb_lm75b", lm75b, },
-	{ "wb_max6625", max6625, },
-	{ "wb_max6626", max6626, },
-	{ "wb_max31725", max31725, },
-	{ "wb_max31726", max31725, },
-	{ "wb_mcp980x", mcp980x, },
-	{ "wb_pct2075", pct2075, },
-	{ "wb_stds75", stds75, },
-	{ "wb_stlm75", stlm75, },
-	{ "wb_tcn75", tcn75, },
-	{ "wb_tmp100", tmp100, },
-	{ "wb_tmp101", tmp101, },
-	{ "wb_tmp105", tmp105, },
-	{ "wb_tmp112", tmp112, },
-	{ "wb_tmp175", tmp175, },
-	{ "wb_tmp275", tmp275, },
-	{ "wb_tmp75", tmp75, },
-	{ "wb_tmp75b", tmp75b, },
-	{ "wb_tmp75c", tmp75c, },
-	{ /* LIST END */ }
-};
-MODULE_DEVICE_TABLE(i2c, lm75_ids);
-
-static const struct of_device_id __maybe_unused lm75_of_match[] = {
-	{
-		.compatible = "adi,adt75",
-		.data = (void *)adt75
-	},
-	{
-		.compatible = "dallas,ds1775",
-		.data = (void *)ds1775
-	},
-	{
-		.compatible = "dallas,ds75",
-		.data = (void *)ds75
-	},
-	{
-		.compatible = "dallas,ds7505",
-		.data = (void *)ds7505
-	},
-	{
-		.compatible = "gmt,g751",
-		.data = (void *)g751
-	},
-	{
-		.compatible = "national,lm75",
-		.data = (void *)lm75
-	},
-	{
-		.compatible = "national,lm75a",
-		.data = (void *)lm75a
-	},
-	{
-		.compatible = "national,lm75b",
-		.data = (void *)lm75b
-	},
-	{
-		.compatible = "maxim,max6625",
-		.data = (void *)max6625
-	},
-	{
-		.compatible = "maxim,max6626",
-		.data = (void *)max6626
-	},
-	{
-		.compatible = "maxim,max31725",
-		.data = (void *)max31725
-	},
-	{
-		.compatible = "maxim,max31726",
-		.data = (void *)max31725
-	},
-	{
-		.compatible = "maxim,mcp980x",
-		.data = (void *)mcp980x
-	},
-	{
-		.compatible = "nxp,pct2075",
-		.data = (void *)pct2075
-	},
-	{
-		.compatible = "st,stds75",
-		.data = (void *)stds75
-	},
-	{
-		.compatible = "st,stlm75",
-		.data = (void *)stlm75
-	},
-	{
-		.compatible = "microchip,tcn75",
-		.data = (void *)tcn75
-	},
-	{
-		.compatible = "ti,tmp100",
-		.data = (void *)tmp100
-	},
-	{
-		.compatible = "ti,tmp101",
-		.data = (void *)tmp101
-	},
-	{
-		.compatible = "ti,tmp105",
-		.data = (void *)tmp105
-	},
-	{
-		.compatible = "ti,tmp112",
-		.data = (void *)tmp112
-	},
-	{
-		.compatible = "ti,tmp175",
-		.data = (void *)tmp175
-	},
-	{
-		.compatible = "ti,tmp275",
-		.data = (void *)tmp275
-	},
-	{
-		.compatible = "ti,tmp75",
-		.data = (void *)tmp75
-	},
-	{
-		.compatible = "ti,tmp75b",
-		.data = (void *)tmp75b
-	},
-	{
-		.compatible = "ti,tmp75c",
-		.data = (void *)tmp75c
-	},
-	{ },
-};
-MODULE_DEVICE_TABLE(of, lm75_of_match);
-
-#define LM75A_ID 0xA1
-#if 0
-/* Return 0 if detection is successful, -ENODEV otherwise */
-static int lm75_detect(struct i2c_client *new_client,
-		       struct i2c_board_info *info)
-{
-	struct i2c_adapter *adapter = new_client->adapter;
-	int i;
-	int conf, hyst, os;
-	bool is_lm75a = 0;
-
-	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
-				     I2C_FUNC_SMBUS_WORD_DATA))
-		return -ENODEV;
-
-	/*
-	 * Now, we do the remaining detection. There is no identification-
-	 * dedicated register so we have to rely on several tricks:
-	 * unused bits, registers cycling over 8-address boundaries,
-	 * addresses 0x04-0x07 returning the last read value.
-	 * The cycling+unused addresses combination is not tested,
-	 * since it would significantly slow the detection down and would
-	 * hardly add any value.
-	 *
-	 * The National Semiconductor LM75A is different than earlier
-	 * LM75s.  It has an ID byte of 0xaX (where X is the chip
-	 * revision, with 1 being the only revision in existence) in
-	 * register 7, and unused registers return 0xff rather than the
-	 * last read value.
-	 *
-	 * Note that this function only detects the original National
-	 * Semiconductor LM75 and the LM75A. Clones from other vendors
-	 * aren't detected, on purpose, because they are typically never
-	 * found on PC hardware. They are found on embedded designs where
-	 * they can be instantiated explicitly so detection is not needed.
-	 * The absence of identification registers on all these clones
-	 * would make their exhaustive detection very difficult and weak,
-	 * and odds are that the driver would bind to unsupported devices.
-	 */
-
-	/* Unused bits */
-	conf = i2c_smbus_read_byte_data(new_client, 1);
-	if (conf & 0xe0)
-		return -ENODEV;
-
-	/* First check for LM75A */
-	if (i2c_smbus_read_byte_data(new_client, 7) == LM75A_ID) {
-		/*
-		 * LM75A returns 0xff on unused registers so
-		 * just to be sure we check for that too.
-		 */
-		if (i2c_smbus_read_byte_data(new_client, 4) != 0xff
-		 || i2c_smbus_read_byte_data(new_client, 5) != 0xff
-		 || i2c_smbus_read_byte_data(new_client, 6) != 0xff)
-			return -ENODEV;
-		is_lm75a = 1;
-		hyst = i2c_smbus_read_byte_data(new_client, 2);
-		os = i2c_smbus_read_byte_data(new_client, 3);
-	} else { /* Traditional style LM75 detection */
-		/* Unused addresses */
-		hyst = i2c_smbus_read_byte_data(new_client, 2);
-		if (i2c_smbus_read_byte_data(new_client, 4) != hyst
-		 || i2c_smbus_read_byte_data(new_client, 5) != hyst
-		 || i2c_smbus_read_byte_data(new_client, 6) != hyst
-		 || i2c_smbus_read_byte_data(new_client, 7) != hyst)
-			return -ENODEV;
-		os = i2c_smbus_read_byte_data(new_client, 3);
-		if (i2c_smbus_read_byte_data(new_client, 4) != os
-		 || i2c_smbus_read_byte_data(new_client, 5) != os
-		 || i2c_smbus_read_byte_data(new_client, 6) != os
-		 || i2c_smbus_read_byte_data(new_client, 7) != os)
-			return -ENODEV;
-	}
-	/*
-	 * It is very unlikely that this is a LM75 if both
-	 * hysteresis and temperature limit registers are 0.
-	 */
-	if (hyst == 0 && os == 0)
-		return -ENODEV;
-
-	/* Addresses cycling */
-	for (i = 8; i <= 248; i += 40) {
-		if (i2c_smbus_read_byte_data(new_client, i + 1) != conf
-		 || i2c_smbus_read_byte_data(new_client, i + 2) != hyst
-		 || i2c_smbus_read_byte_data(new_client, i + 3) != os)
-			return -ENODEV;
-		if (is_lm75a && i2c_smbus_read_byte_data(new_client, i + 7)
-				!= LM75A_ID)
-			return -ENODEV;
-	}
-
-	strlcpy(info->type, is_lm75a ? "lm75a" : "lm75", I2C_NAME_SIZE);
-
-	return 0;
-}
-#endif
-
-#ifdef CONFIG_PM
-static int lm75_suspend(struct device *dev)
-{
-	int status;
-	struct i2c_client *client = to_i2c_client(dev);
-
-	status = i2c_smbus_read_byte_data(client, LM75_REG_CONF);
-	if (status < 0) {
-		dev_dbg(&client->dev, "Can't read config? %d\n", status);
-		return status;
-	}
-	status = status | LM75_SHUTDOWN;
-	i2c_smbus_write_byte_data(client, LM75_REG_CONF, status);
-	return 0;
-}
-
-static int lm75_resume(struct device *dev)
-{
-	int status;
-	struct i2c_client *client = to_i2c_client(dev);
-
-	status = i2c_smbus_read_byte_data(client, LM75_REG_CONF);
-	if (status < 0) {
-		dev_dbg(&client->dev, "Can't read config? %d\n", status);
-		return status;
-	}
-	status = status & ~LM75_SHUTDOWN;
-	i2c_smbus_write_byte_data(client, LM75_REG_CONF, status);
-	return 0;
-}
-
-static const struct dev_pm_ops lm75_dev_pm_ops = {
-	.suspend	= lm75_suspend,
-	.resume		= lm75_resume,
-};
-#define LM75_DEV_PM_OPS (&lm75_dev_pm_ops)
-#else
-#define LM75_DEV_PM_OPS NULL
-#endif /* CONFIG_PM */
-
-static struct i2c_driver lm75_driver = {
-	.class		= I2C_CLASS_HWMON,
-	.driver = {
-		.name	= "wb_lm75",
-		.of_match_table = of_match_ptr(lm75_of_match),
-		.pm	= LM75_DEV_PM_OPS,
-	},
-	.probe_new	= lm75_probe,
-	.id_table	= lm75_ids,
-	/* .detect		= lm75_detect, */
-	/* .address_list	= normal_i2c, */
-};
-
-module_i2c_driver(lm75_driver);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("LM75 driver");
-MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.h
deleted file mode 100644
index a398171162a8..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * lm75.h - Part of lm_sensors, Linux kernel modules for hardware monitoring
- * Copyright (c) 2003 Mark M. Hoffman <mhoffman@lightlink.com>
- */
-
-/*
- * This file contains common code for encoding/decoding LM75 type
- * temperature readings, which are emulated by many of the chips
- * we support.  As the user is unlikely to load more than one driver
- * which contains this code, we don't worry about the wasted space.
- */
-
-#include <linux/kernel.h>
-
-/* straight from the datasheet */
-#define LM75_TEMP_MIN (-55000)
-#define LM75_TEMP_MAX 125000
-#define LM75_SHUTDOWN 0x01
-
-/*
- * TEMP: 0.001C/bit (-55C to +125C)
- * REG: (0.5C/bit, two's complement) << 7
- */
-static inline u16 LM75_TEMP_TO_REG(long temp)
-{
-	int ntemp = clamp_val(temp, LM75_TEMP_MIN, LM75_TEMP_MAX);
-
-	ntemp += (ntemp < 0 ? -250 : 250);
-	return (u16)((ntemp / 500) << 7);
-}
-
-static inline int LM75_TEMP_FROM_REG(u16 reg)
-{
-	/*
-	 * use integer division instead of equivalent right shift to
-	 * guarantee arithmetic shift and preserve the sign
-	 */
-	return ((s16)reg / 128) * 500;
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus.h
deleted file mode 100644
index 781f2ee07198..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus.h
+++ /dev/null
@@ -1,535 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * wb_pmbus.h - Common defines and structures for PMBus devices
- *
- * Copyright (c) 2010, 2011 Ericsson AB.
- * Copyright (c) 2012 Guenter Roeck
- */
-
-#ifndef WB_PMBUS_H
-#define WB_PMBUS_H
-
-#include <linux/bitops.h>
-#include <linux/regulator/driver.h>
-#include <linux/string.h>
-
-#define mem_clear(data, size) memset((data), 0, (size))
-
-/*
- * Registers
- */
-enum pmbus_regs {
-    PMBUS_PAGE            = 0x00,
-    PMBUS_OPERATION            = 0x01,
-    PMBUS_ON_OFF_CONFIG        = 0x02,
-    PMBUS_CLEAR_FAULTS        = 0x03,
-    PMBUS_PHASE            = 0x04,
-
-    PMBUS_WRITE_PROTECT        = 0x10,
-
-    PMBUS_CAPABILITY        = 0x19,
-    PMBUS_QUERY            = 0x1A,
-
-    PMBUS_VOUT_MODE            = 0x20,
-    PMBUS_VOUT_COMMAND        = 0x21,
-    PMBUS_VOUT_TRIM            = 0x22,
-    PMBUS_VOUT_CAL_OFFSET        = 0x23,
-    PMBUS_VOUT_MAX            = 0x24,
-    PMBUS_VOUT_MARGIN_HIGH        = 0x25,
-    PMBUS_VOUT_MARGIN_LOW        = 0x26,
-    PMBUS_VOUT_TRANSITION_RATE    = 0x27,
-    PMBUS_VOUT_DROOP        = 0x28,
-    PMBUS_VOUT_SCALE_LOOP        = 0x29,
-    PMBUS_VOUT_SCALE_MONITOR    = 0x2A,
-
-    PMBUS_COEFFICIENTS        = 0x30,
-    PMBUS_POUT_MAX            = 0x31,
-
-    PMBUS_FAN_CONFIG_12        = 0x3A,
-    PMBUS_FAN_COMMAND_1        = 0x3B,
-    PMBUS_FAN_COMMAND_2        = 0x3C,
-    PMBUS_FAN_CONFIG_34        = 0x3D,
-    PMBUS_FAN_COMMAND_3        = 0x3E,
-    PMBUS_FAN_COMMAND_4        = 0x3F,
-
-    PMBUS_VOUT_OV_FAULT_LIMIT    = 0x40,
-    PMBUS_VOUT_OV_FAULT_RESPONSE    = 0x41,
-    PMBUS_VOUT_OV_WARN_LIMIT    = 0x42,
-    PMBUS_VOUT_UV_WARN_LIMIT    = 0x43,
-    PMBUS_VOUT_UV_FAULT_LIMIT    = 0x44,
-    PMBUS_VOUT_UV_FAULT_RESPONSE    = 0x45,
-    PMBUS_IOUT_OC_FAULT_LIMIT    = 0x46,
-    PMBUS_IOUT_OC_FAULT_RESPONSE    = 0x47,
-    PMBUS_IOUT_OC_LV_FAULT_LIMIT    = 0x48,
-    PMBUS_IOUT_OC_LV_FAULT_RESPONSE    = 0x49,
-    PMBUS_IOUT_OC_WARN_LIMIT    = 0x4A,
-    PMBUS_IOUT_UC_FAULT_LIMIT    = 0x4B,
-    PMBUS_IOUT_UC_FAULT_RESPONSE    = 0x4C,
-
-    PMBUS_OT_FAULT_LIMIT        = 0x4F,
-    PMBUS_OT_FAULT_RESPONSE        = 0x50,
-    PMBUS_OT_WARN_LIMIT        = 0x51,
-    PMBUS_UT_WARN_LIMIT        = 0x52,
-    PMBUS_UT_FAULT_LIMIT        = 0x53,
-    PMBUS_UT_FAULT_RESPONSE        = 0x54,
-    PMBUS_VIN_OV_FAULT_LIMIT    = 0x55,
-    PMBUS_VIN_OV_FAULT_RESPONSE    = 0x56,
-    PMBUS_VIN_OV_WARN_LIMIT        = 0x57,
-    PMBUS_VIN_UV_WARN_LIMIT        = 0x58,
-    PMBUS_VIN_UV_FAULT_LIMIT    = 0x59,
-
-    PMBUS_IIN_OC_FAULT_LIMIT    = 0x5B,
-    PMBUS_IIN_OC_WARN_LIMIT        = 0x5D,
-
-    PMBUS_POUT_OP_FAULT_LIMIT    = 0x68,
-    PMBUS_POUT_OP_WARN_LIMIT    = 0x6A,
-    PMBUS_PIN_OP_WARN_LIMIT        = 0x6B,
-
-    PMBUS_STATUS_BYTE        = 0x78,
-    PMBUS_STATUS_WORD        = 0x79,
-    PMBUS_STATUS_VOUT        = 0x7A,
-    PMBUS_STATUS_IOUT        = 0x7B,
-    PMBUS_STATUS_INPUT        = 0x7C,
-    PMBUS_STATUS_TEMPERATURE    = 0x7D,
-    PMBUS_STATUS_CML        = 0x7E,
-    PMBUS_STATUS_OTHER        = 0x7F,
-    PMBUS_STATUS_MFR_SPECIFIC    = 0x80,
-    PMBUS_STATUS_FAN_12        = 0x81,
-    PMBUS_STATUS_FAN_34        = 0x82,
-
-    PMBUS_READ_VIN            = 0x88,
-    PMBUS_READ_IIN            = 0x89,
-    PMBUS_READ_VCAP            = 0x8A,
-    PMBUS_READ_VOUT            = 0x8B,
-    PMBUS_READ_IOUT            = 0x8C,
-    PMBUS_READ_TEMPERATURE_1    = 0x8D,
-    PMBUS_READ_TEMPERATURE_2    = 0x8E,
-    PMBUS_READ_TEMPERATURE_3    = 0x8F,
-    PMBUS_READ_FAN_SPEED_1        = 0x90,
-    PMBUS_READ_FAN_SPEED_2        = 0x91,
-    PMBUS_READ_FAN_SPEED_3        = 0x92,
-    PMBUS_READ_FAN_SPEED_4        = 0x93,
-    PMBUS_READ_DUTY_CYCLE        = 0x94,
-    PMBUS_READ_FREQUENCY        = 0x95,
-    PMBUS_READ_POUT            = 0x96,
-    PMBUS_READ_PIN            = 0x97,
-
-    PMBUS_REVISION            = 0x98,
-    PMBUS_MFR_ID            = 0x99,
-    PMBUS_MFR_MODEL            = 0x9A,
-    PMBUS_MFR_REVISION        = 0x9B,
-    PMBUS_MFR_LOCATION        = 0x9C,
-    PMBUS_MFR_DATE            = 0x9D,
-    PMBUS_MFR_SERIAL        = 0x9E,
-
-    PMBUS_MFR_VIN_MIN        = 0xA0,
-    PMBUS_MFR_VIN_MAX        = 0xA1,
-    PMBUS_MFR_IIN_MAX        = 0xA2,
-    PMBUS_MFR_PIN_MAX        = 0xA3,
-    PMBUS_MFR_VOUT_MIN        = 0xA4,
-    PMBUS_MFR_VOUT_MAX        = 0xA5,
-    PMBUS_MFR_IOUT_MAX        = 0xA6,
-    PMBUS_MFR_POUT_MAX        = 0xA7,
-
-    PMBUS_IC_DEVICE_ID        = 0xAD,
-    PMBUS_IC_DEVICE_REV        = 0xAE,
-
-    PMBUS_MFR_MAX_TEMP_1        = 0xC0,
-    PMBUS_MFR_MAX_TEMP_2        = 0xC1,
-    PMBUS_MFR_MAX_TEMP_3        = 0xC2,
-
-/*
- * Virtual registers.
- * Useful to support attributes which are not supported by standard PMBus
- * registers but exist as manufacturer specific registers on individual chips.
- * Must be mapped to real registers in device specific code.
- *
- * Semantics:
- * Virtual registers are all word size.
- * READ registers are read-only; writes are either ignored or return an error.
- * RESET registers are read/write. Reading reset registers returns zero
- * (used for detection), writing any value causes the associated history to be
- * reset.
- * Virtual registers have to be handled in device specific driver code. Chip
- * driver code returns non-negative register values if a virtual register is
- * supported, or a negative error code if not. The chip driver may return
- * -ENODATA or any other error code in this case, though an error code other
- * than -ENODATA is handled more efficiently and thus preferred. Either case,
- * the calling PMBus core code will abort if the chip driver returns an error
- * code when reading or writing virtual registers.
- */
-    PMBUS_VIRT_BASE            = 0x100,
-    PMBUS_VIRT_READ_TEMP_AVG,
-    PMBUS_VIRT_READ_TEMP_MIN,
-    PMBUS_VIRT_READ_TEMP_MAX,
-    PMBUS_VIRT_RESET_TEMP_HISTORY,
-    PMBUS_VIRT_READ_VIN_AVG,
-    PMBUS_VIRT_READ_VIN_MIN,
-    PMBUS_VIRT_READ_VIN_MAX,
-    PMBUS_VIRT_RESET_VIN_HISTORY,
-    PMBUS_VIRT_READ_IIN_AVG,
-    PMBUS_VIRT_READ_IIN_MIN,
-    PMBUS_VIRT_READ_IIN_MAX,
-    PMBUS_VIRT_RESET_IIN_HISTORY,
-    PMBUS_VIRT_READ_PIN_AVG,
-    PMBUS_VIRT_READ_PIN_MIN,
-    PMBUS_VIRT_READ_PIN_MAX,
-    PMBUS_VIRT_RESET_PIN_HISTORY,
-    PMBUS_VIRT_READ_POUT_AVG,
-    PMBUS_VIRT_READ_POUT_MIN,
-    PMBUS_VIRT_READ_POUT_MAX,
-    PMBUS_VIRT_RESET_POUT_HISTORY,
-    PMBUS_VIRT_READ_VOUT_AVG,
-    PMBUS_VIRT_READ_VOUT_MIN,
-    PMBUS_VIRT_READ_VOUT_MAX,
-    PMBUS_VIRT_RESET_VOUT_HISTORY,
-    PMBUS_VIRT_READ_IOUT_AVG,
-    PMBUS_VIRT_READ_IOUT_MIN,
-    PMBUS_VIRT_READ_IOUT_MAX,
-    PMBUS_VIRT_RESET_IOUT_HISTORY,
-    PMBUS_VIRT_READ_TEMP2_AVG,
-    PMBUS_VIRT_READ_TEMP2_MIN,
-    PMBUS_VIRT_READ_TEMP2_MAX,
-    PMBUS_VIRT_RESET_TEMP2_HISTORY,
-
-    PMBUS_VIRT_READ_VMON,
-    PMBUS_VIRT_VMON_UV_WARN_LIMIT,
-    PMBUS_VIRT_VMON_OV_WARN_LIMIT,
-    PMBUS_VIRT_VMON_UV_FAULT_LIMIT,
-    PMBUS_VIRT_VMON_OV_FAULT_LIMIT,
-    PMBUS_VIRT_STATUS_VMON,
-
-    /*
-     * RPM and PWM Fan control
-     *
-     * Drivers wanting to expose PWM control must define the behaviour of
-     * PMBUS_VIRT_PWM_[1-4] and PMBUS_VIRT_PWM_ENABLE_[1-4] in the
-     * {read,write}_word_data callback.
-     *
-     * pmbus core provides a default implementation for
-     * PMBUS_VIRT_FAN_TARGET_[1-4].
-     *
-     * TARGET, PWM and PWM_ENABLE members must be defined sequentially;
-     * pmbus core uses the difference between the provided register and
-     * it's _1 counterpart to calculate the FAN/PWM ID.
-     */
-    PMBUS_VIRT_FAN_TARGET_1,
-    PMBUS_VIRT_FAN_TARGET_2,
-    PMBUS_VIRT_FAN_TARGET_3,
-    PMBUS_VIRT_FAN_TARGET_4,
-    PMBUS_VIRT_PWM_1,
-    PMBUS_VIRT_PWM_2,
-    PMBUS_VIRT_PWM_3,
-    PMBUS_VIRT_PWM_4,
-    PMBUS_VIRT_PWM_ENABLE_1,
-    PMBUS_VIRT_PWM_ENABLE_2,
-    PMBUS_VIRT_PWM_ENABLE_3,
-    PMBUS_VIRT_PWM_ENABLE_4,
-
-    /* Samples for average
-     *
-     * Drivers wanting to expose functionality for changing the number of
-     * samples used for average values should implement support in
-     * {read,write}_word_data callback for either PMBUS_VIRT_SAMPLES if it
-     * applies to all types of measurements, or any number of specific
-     * PMBUS_VIRT_*_SAMPLES registers to allow for individual control.
-     */
-    PMBUS_VIRT_SAMPLES,
-    PMBUS_VIRT_IN_SAMPLES,
-    PMBUS_VIRT_CURR_SAMPLES,
-    PMBUS_VIRT_POWER_SAMPLES,
-    PMBUS_VIRT_TEMP_SAMPLES,
-};
-
-/*
- * OPERATION
- */
-#define PB_OPERATION_CONTROL_ON        BIT(7)
-
-/*
- * WRITE_PROTECT
- */
-#define PB_WP_ALL    BIT(7)    /* all but WRITE_PROTECT */
-#define PB_WP_OP    BIT(6)    /* all but WP, OPERATION, PAGE */
-#define PB_WP_VOUT    BIT(5)    /* all but WP, OPERATION, PAGE, VOUT, ON_OFF */
-
-#define PB_WP_ANY    (PB_WP_ALL | PB_WP_OP | PB_WP_VOUT)
-
-/*
- * CAPABILITY
- */
-#define PB_CAPABILITY_SMBALERT        BIT(4)
-#define PB_CAPABILITY_ERROR_CHECK    BIT(7)
-
-/*
- * VOUT_MODE
- */
-#define PB_VOUT_MODE_MODE_MASK        0xe0
-#define PB_VOUT_MODE_PARAM_MASK        0x1f
-
-#define PB_VOUT_MODE_LINEAR        0x00
-#define PB_VOUT_MODE_VID        0x20
-#define PB_VOUT_MODE_DIRECT        0x40
-
-/*
- * Fan configuration
- */
-#define PB_FAN_2_PULSE_MASK        (BIT(0) | BIT(1))
-#define PB_FAN_2_RPM            BIT(2)
-#define PB_FAN_2_INSTALLED        BIT(3)
-#define PB_FAN_1_PULSE_MASK        (BIT(4) | BIT(5))
-#define PB_FAN_1_RPM            BIT(6)
-#define PB_FAN_1_INSTALLED        BIT(7)
-
-enum pmbus_fan_mode { percent = 0, rpm };
-
-/*
- * STATUS_BYTE, STATUS_WORD (lower)
- */
-#define PB_STATUS_NONE_ABOVE        BIT(0)
-#define PB_STATUS_CML            BIT(1)
-#define PB_STATUS_TEMPERATURE        BIT(2)
-#define PB_STATUS_VIN_UV        BIT(3)
-#define PB_STATUS_IOUT_OC        BIT(4)
-#define PB_STATUS_VOUT_OV        BIT(5)
-#define PB_STATUS_OFF            BIT(6)
-#define PB_STATUS_BUSY            BIT(7)
-
-/*
- * STATUS_WORD (upper)
- */
-#define PB_STATUS_UNKNOWN        BIT(8)
-#define PB_STATUS_OTHER            BIT(9)
-#define PB_STATUS_FANS            BIT(10)
-#define PB_STATUS_POWER_GOOD_N        BIT(11)
-#define PB_STATUS_WORD_MFR        BIT(12)
-#define PB_STATUS_INPUT            BIT(13)
-#define PB_STATUS_IOUT_POUT        BIT(14)
-#define PB_STATUS_VOUT            BIT(15)
-
-/*
- * STATUS_IOUT
- */
-#define PB_POUT_OP_WARNING        BIT(0)
-#define PB_POUT_OP_FAULT        BIT(1)
-#define PB_POWER_LIMITING        BIT(2)
-#define PB_CURRENT_SHARE_FAULT        BIT(3)
-#define PB_IOUT_UC_FAULT        BIT(4)
-#define PB_IOUT_OC_WARNING        BIT(5)
-#define PB_IOUT_OC_LV_FAULT        BIT(6)
-#define PB_IOUT_OC_FAULT        BIT(7)
-
-/*
- * STATUS_VOUT, STATUS_INPUT
- */
-#define PB_VOLTAGE_UV_FAULT        BIT(4)
-#define PB_VOLTAGE_UV_WARNING        BIT(5)
-#define PB_VOLTAGE_OV_WARNING        BIT(6)
-#define PB_VOLTAGE_OV_FAULT        BIT(7)
-
-/*
- * STATUS_INPUT
- */
-#define PB_PIN_OP_WARNING        BIT(0)
-#define PB_IIN_OC_WARNING        BIT(1)
-#define PB_IIN_OC_FAULT            BIT(2)
-
-/*
- * STATUS_TEMPERATURE
- */
-#define PB_TEMP_UT_FAULT        BIT(4)
-#define PB_TEMP_UT_WARNING        BIT(5)
-#define PB_TEMP_OT_WARNING        BIT(6)
-#define PB_TEMP_OT_FAULT        BIT(7)
-
-/*
- * STATUS_FAN
- */
-#define PB_FAN_AIRFLOW_WARNING        BIT(0)
-#define PB_FAN_AIRFLOW_FAULT        BIT(1)
-#define PB_FAN_FAN2_SPEED_OVERRIDE    BIT(2)
-#define PB_FAN_FAN1_SPEED_OVERRIDE    BIT(3)
-#define PB_FAN_FAN2_WARNING        BIT(4)
-#define PB_FAN_FAN1_WARNING        BIT(5)
-#define PB_FAN_FAN2_FAULT        BIT(6)
-#define PB_FAN_FAN1_FAULT        BIT(7)
-
-/*
- * CML_FAULT_STATUS
- */
-#define PB_CML_FAULT_OTHER_MEM_LOGIC    BIT(0)
-#define PB_CML_FAULT_OTHER_COMM        BIT(1)
-#define PB_CML_FAULT_PROCESSOR        BIT(3)
-#define PB_CML_FAULT_MEMORY        BIT(4)
-#define PB_CML_FAULT_PACKET_ERROR    BIT(5)
-#define PB_CML_FAULT_INVALID_DATA    BIT(6)
-#define PB_CML_FAULT_INVALID_COMMAND    BIT(7)
-
-enum pmbus_sensor_classes {
-    PSC_VOLTAGE_IN = 0,
-    PSC_VOLTAGE_OUT,
-    PSC_CURRENT_IN,
-    PSC_CURRENT_OUT,
-    PSC_POWER,
-    PSC_TEMPERATURE,
-    PSC_FAN,
-    PSC_PWM,
-    PSC_NUM_CLASSES        /* Number of power sensor classes */
-};
-
-#define PMBUS_PAGES    32    /* Per PMBus specification */
-#define PMBUS_PHASES    8    /* Maximum number of phases per page */
-
-/* Functionality bit mask */
-#define PMBUS_HAVE_VIN        BIT(0)
-#define PMBUS_HAVE_VCAP        BIT(1)
-#define PMBUS_HAVE_VOUT        BIT(2)
-#define PMBUS_HAVE_IIN        BIT(3)
-#define PMBUS_HAVE_IOUT        BIT(4)
-#define PMBUS_HAVE_PIN        BIT(5)
-#define PMBUS_HAVE_POUT        BIT(6)
-#define PMBUS_HAVE_FAN12    BIT(7)
-#define PMBUS_HAVE_FAN34    BIT(8)
-#define PMBUS_HAVE_TEMP        BIT(9)
-#define PMBUS_HAVE_TEMP2    BIT(10)
-#define PMBUS_HAVE_TEMP3    BIT(11)
-#define PMBUS_HAVE_STATUS_VOUT    BIT(12)
-#define PMBUS_HAVE_STATUS_IOUT    BIT(13)
-#define PMBUS_HAVE_STATUS_INPUT    BIT(14)
-#define PMBUS_HAVE_STATUS_TEMP    BIT(15)
-#define PMBUS_HAVE_STATUS_FAN12    BIT(16)
-#define PMBUS_HAVE_STATUS_FAN34    BIT(17)
-#define PMBUS_HAVE_VMON        BIT(18)
-#define PMBUS_HAVE_STATUS_VMON    BIT(19)
-#define PMBUS_HAVE_PWM12    BIT(20)
-#define PMBUS_HAVE_PWM34    BIT(21)
-#define PMBUS_HAVE_SAMPLES    BIT(22)
-
-#define PMBUS_PHASE_VIRTUAL    BIT(30)    /* Phases on this page are virtual */
-#define PMBUS_PAGE_VIRTUAL    BIT(31)    /* Page is virtual */
-
-enum pmbus_data_format { linear = 0, direct, vid };
-enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv };
-
-struct pmbus_driver_info {
-    int pages;        /* Total number of pages */
-    u8 phases[PMBUS_PAGES];    /* Number of phases per page */
-    enum pmbus_data_format format[PSC_NUM_CLASSES];
-    enum vrm_version vrm_version[PMBUS_PAGES]; /* vrm version per page */
-    /*
-     * Support one set of coefficients for each sensor type
-     * Used for chips providing data in direct mode.
-     */
-    int m[PSC_NUM_CLASSES];    /* mantissa for direct data format */
-    int b[PSC_NUM_CLASSES];    /* offset */
-    int R[PSC_NUM_CLASSES];    /* exponent */
-
-    u32 func[PMBUS_PAGES];    /* Functionality, per page */
-    u32 pfunc[PMBUS_PHASES];/* Functionality, per phase */
-    /*
-     * The following functions map manufacturing specific register values
-     * to PMBus standard register values. Specify only if mapping is
-     * necessary.
-     * Functions return the register value (read) or zero (write) if
-     * successful. A return value of -ENODATA indicates that there is no
-     * manufacturer specific register, but that a standard PMBus register
-     * may exist. Any other negative return value indicates that the
-     * register does not exist, and that no attempt should be made to read
-     * the standard register.
-     */
-    int (*read_byte_data)(struct i2c_client *client, int page, int reg);
-    int (*read_word_data)(struct i2c_client *client, int page, int phase,
-                  int reg);
-    int (*write_word_data)(struct i2c_client *client, int page, int reg,
-                   u16 word);
-    int (*write_byte)(struct i2c_client *client, int page, u8 value);
-    /*
-     * The identify function determines supported PMBus functionality.
-     * This function is only necessary if a chip driver supports multiple
-     * chips, and the chip functionality is not pre-determined.
-     */
-    int (*identify)(struct i2c_client *client,
-            struct pmbus_driver_info *info);
-
-    /* Regulator functionality, if supported by this chip driver. */
-    int num_regulators;
-    const struct regulator_desc *reg_desc;
-
-    /* custom attributes */
-    const struct attribute_group **groups;
-};
-
-/* Regulator ops */
-
-extern const struct regulator_ops wb_pmbus_regulator_ops;
-
-/* Macro for filling in array of struct regulator_desc */
-#define PMBUS_REGULATOR(_name, _id)                \
-    [_id] = {                        \
-        .name = (_name # _id),                \
-        .id = (_id),                    \
-        .of_match = of_match_ptr(_name # _id),        \
-        .regulators_node = of_match_ptr("regulators"),    \
-        .ops = &wb_pmbus_regulator_ops,            \
-        .type = REGULATOR_VOLTAGE,            \
-        .owner = THIS_MODULE,                \
-    }
-
-struct pmbus_data {
-    struct device *dev;
-    struct device *hwmon_dev;
-
-    u32 flags;        /* from platform data */
-
-    int exponent[PMBUS_PAGES]; /* linear mode: exponent for output voltages */
-
-    const struct pmbus_driver_info *info;
-
-    int max_attributes;
-    int num_attributes;
-    struct attribute_group group;
-    const struct attribute_group **groups;
-    struct dentry *debugfs;        /* debugfs device directory */
-
-    struct pmbus_sensor *sensors;
-
-    struct mutex update_lock;
-
-    bool has_status_word;        /* device uses STATUS_WORD register */
-    int (*read_status)(struct i2c_client *client, int page);
-
-    s16 currpage;     /* current page, -1 for unknown/unset */
-    s16 currphase;    /* current phase, 0xff for all, -1 for unknown/unset */
-    int vout_max[PMBUS_PAGES];    /* pmbus maximum output voltage */
-    int vout_min[PMBUS_PAGES];    /* pmbus minimum output voltage */
-};
-
-/* Function declarations */
-void wb_pmbus_clear_cache(struct i2c_client *client);
-int wb_pmbus_set_page(struct i2c_client *client, int page, int phase);
-int wb_pmbus_read_word_data(struct i2c_client *client, int page, int phase,
-             u8 reg);
-int wb_pmbus_write_word_data(struct i2c_client *client, int page, u8 reg,
-              u16 word);
-int wb_pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg);
-int wb_pmbus_write_byte(struct i2c_client *client, int page, u8 value);
-int wb_pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg,
-              u8 value);
-int wb_pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
-               u8 mask, u8 value);
-void wb_pmbus_clear_faults(struct i2c_client *client);
-bool wb_pmbus_check_byte_register(struct i2c_client *client, int page, int reg);
-bool wb_pmbus_check_word_register(struct i2c_client *client, int page, int reg);
-int wb_pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info);
-void wb_pmbus_do_remove(struct i2c_client *client);
-const struct pmbus_driver_info *wb_pmbus_get_driver_info(struct i2c_client
-                              *client);
-int wb_pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id,
-                  enum pmbus_fan_mode mode);
-int wb_pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id,
-                  enum pmbus_fan_mode mode);
-int wb_pmbus_update_fan(struct i2c_client *client, int page, int id,
-             u8 config, u8 mask, u16 command);
-struct dentry *wb_pmbus_get_debugfs_dir(struct i2c_client *client);
-
-#endif /* WB_PMBUS_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus_core.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus_core.c
deleted file mode 100644
index 3a86ade43b7e..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus_core.c
+++ /dev/null
@@ -1,2780 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Hardware monitoring driver for PMBus devices
- *
- * Copyright (c) 2010, 2011 Ericsson AB.
- * Copyright (c) 2012 Guenter Roeck
- */
-
-#include <linux/debugfs.h>
-#include <linux/kernel.h>
-#include <linux/math64.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/err.h>
-#include <linux/slab.h>
-#include <linux/i2c.h>
-#include <linux/hwmon.h>
-#include <linux/hwmon-sysfs.h>
-#include <linux/pmbus.h>
-#include <linux/regulator/driver.h>
-#include <linux/regulator/machine.h>
-#include <linux/delay.h>
-#include "wb_pmbus.h"
-
-/*
- * Number of additional attribute pointers to allocate
- * with each call to krealloc
- */
-#define PMBUS_ATTR_ALLOC_SIZE    (32)
-#define PMBUS_NAME_SIZE          (24)
-#define PMBUS_RETRY_SLEEP_TIME   (10000)   /* 10ms */
-#define PMBUS_RETRY_TIME         (3)
-
-struct pmbus_sensor {
-    struct pmbus_sensor *next;
-    char name[PMBUS_NAME_SIZE];    /* sysfs sensor name */
-    struct device_attribute attribute;
-    u8 page;        /* page number */
-    u8 phase;        /* phase number, 0xff for all phases */
-    u16 reg;        /* register */
-    enum pmbus_sensor_classes class;    /* sensor class */
-    bool update;        /* runtime sensor update needed */
-    bool convert;        /* Whether or not to apply linear/vid/direct */
-    int data;        /* Sensor data.
-                   Negative if there was a read error */
-};
-#define to_pmbus_sensor(_attr) \
-    container_of(_attr, struct pmbus_sensor, attribute)
-
-struct pmbus_boolean {
-    char name[PMBUS_NAME_SIZE];    /* sysfs boolean name */
-    struct sensor_device_attribute attribute;
-    struct pmbus_sensor *s1;
-    struct pmbus_sensor *s2;
-};
-#define to_pmbus_boolean(_attr) \
-    container_of(_attr, struct pmbus_boolean, attribute)
-
-struct pmbus_label {
-    char name[PMBUS_NAME_SIZE];    /* sysfs label name */
-    struct device_attribute attribute;
-    char label[PMBUS_NAME_SIZE];    /* label */
-};
-#define to_pmbus_label(_attr) \
-    container_of(_attr, struct pmbus_label, attribute)
-
-/* Macros for converting between sensor index and register/page/status mask */
-
-#define PB_STATUS_MASK    0xffff
-#define PB_REG_SHIFT    16
-#define PB_REG_MASK    0x3ff
-#define PB_PAGE_SHIFT    26
-#define PB_PAGE_MASK    0x3f
-
-#define pb_reg_to_index(page, reg, mask)    (((page) << PB_PAGE_SHIFT) | \
-                         ((reg) << PB_REG_SHIFT) | (mask))
-
-#define pb_index_to_page(index)            (((index) >> PB_PAGE_SHIFT) & PB_PAGE_MASK)
-#define pb_index_to_reg(index)            (((index) >> PB_REG_SHIFT) & PB_REG_MASK)
-#define pb_index_to_mask(index)            ((index) & PB_STATUS_MASK)
-
-struct pmbus_debugfs_entry {
-    struct i2c_client *client;
-    u8 page;
-    u8 reg;
-};
-
-static const int pmbus_fan_rpm_mask[] = {
-    PB_FAN_1_RPM,
-    PB_FAN_2_RPM,
-    PB_FAN_1_RPM,
-    PB_FAN_2_RPM,
-};
-
-static const int pmbus_fan_config_registers[] = {
-    PMBUS_FAN_CONFIG_12,
-    PMBUS_FAN_CONFIG_12,
-    PMBUS_FAN_CONFIG_34,
-    PMBUS_FAN_CONFIG_34
-};
-
-static const int pmbus_fan_command_registers[] = {
-    PMBUS_FAN_COMMAND_1,
-    PMBUS_FAN_COMMAND_2,
-    PMBUS_FAN_COMMAND_3,
-    PMBUS_FAN_COMMAND_4,
-};
-
-void wb_pmbus_clear_cache(struct i2c_client *client)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    struct pmbus_sensor *sensor;
-
-    for (sensor = data->sensors; sensor; sensor = sensor->next)
-        sensor->data = -ENODATA;
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_clear_cache);
-
-static int wb_pmbus_set_page_tmp(struct i2c_client *client, int page, int phase)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int rv;
-
-    if (page < 0)
-        return 0;
-
-    if (!(data->info->func[page] & PMBUS_PAGE_VIRTUAL) &&
-        data->info->pages > 1 && page != data->currpage) {
-        rv = i2c_smbus_write_byte_data(client, PMBUS_PAGE, page);
-        if (rv < 0)
-            return rv;
-
-        rv = i2c_smbus_read_byte_data(client, PMBUS_PAGE);
-        if (rv < 0)
-            return rv;
-
-        if (rv != page)
-            return -EIO;
-    }
-    data->currpage = page;
-
-    if (data->info->phases[page] && data->currphase != phase &&
-        !(data->info->func[page] & PMBUS_PHASE_VIRTUAL)) {
-        rv = i2c_smbus_write_byte_data(client, PMBUS_PHASE,
-                           phase);
-        if (rv)
-            return rv;
-    }
-    data->currphase = phase;
-
-    return 0;
-}
-
-int wb_pmbus_set_page(struct i2c_client *client, int page, int phase)
-{
-    int rv, i;
-    struct device *dev = &client->dev;
-
-    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
-        rv = wb_pmbus_set_page_tmp(client, page, phase);
-        if(rv >= 0){
-            return rv;
-        }
-        if ((i + 1) < PMBUS_RETRY_TIME) {
-            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
-        }
-    }
-    dev_dbg(dev, "wb_pmbus_set_page failed, page=%d, phase=%d, rv=%d\n",
-        page, phase, rv);
-    return rv;
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_set_page);
-
-static int wb_pmbus_write_byte_tmp(struct i2c_client *client, int page, u8 value)
-{
-    int rv;
-
-    rv = wb_pmbus_set_page(client, page, 0xff);
-    if (rv < 0)
-        return rv;
-
-    return i2c_smbus_write_byte(client, value);
-}
-
-int wb_pmbus_write_byte(struct i2c_client *client, int page, u8 value)
-{
-    int rv, i;
-    struct device *dev = &client->dev;
-
-    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
-        rv = wb_pmbus_write_byte_tmp(client, page, value);
-        if(rv >= 0){
-            return rv;
-        }
-        if ((i + 1) < PMBUS_RETRY_TIME) {
-            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
-        }
-    }
-    dev_dbg(dev, "wb_pmbus_write_byte failed, page=%d, value=0x%x, rv: %d\n",
-        page, value, rv);
-    return rv;
-}
-
-EXPORT_SYMBOL_GPL(wb_pmbus_write_byte);
-
-/*
- * _pmbus_write_byte() is similar to pmbus_write_byte(), but checks if
- * a device specific mapping function exists and calls it if necessary.
- */
-static int _pmbus_write_byte(struct i2c_client *client, int page, u8 value)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    const struct pmbus_driver_info *info = data->info;
-    int status;
-
-    if (info->write_byte) {
-        status = info->write_byte(client, page, value);
-        if (status != -ENODATA)
-            return status;
-    }
-    return wb_pmbus_write_byte(client, page, value);
-}
-
-static int wb_pmbus_write_word_data_tmp(struct i2c_client *client, int page, u8 reg,
-              u16 word)
-{
-    int rv;
-
-    rv = wb_pmbus_set_page(client, page, 0xff);
-    if (rv < 0)
-        return rv;
-
-    return i2c_smbus_write_word_data(client, reg, word);
-}
-
-int wb_pmbus_write_word_data(struct i2c_client *client, int page, u8 reg,
-              u16 word)
-{
-    int rv, i;
-    struct device *dev = &client->dev;
-
-    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
-        rv = wb_pmbus_write_word_data_tmp(client, page, reg, word);
-        if(rv >= 0){
-            return rv;
-        }
-        if ((i + 1) < PMBUS_RETRY_TIME) {
-            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
-        }
-    }
-    dev_dbg(dev, "wb_pmbus_write_word_data failed, page: %d, reg: 0x%x, value: 0x%x, rv: %d\n",
-        page, reg, word, rv);
-    return rv;
-
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_write_word_data);
-
-static int pmbus_write_virt_reg(struct i2c_client *client, int page, int reg,
-                u16 word)
-{
-    int bit;
-    int id;
-    int rv;
-
-    switch (reg) {
-    case PMBUS_VIRT_FAN_TARGET_1 ... PMBUS_VIRT_FAN_TARGET_4:
-        id = reg - PMBUS_VIRT_FAN_TARGET_1;
-        bit = pmbus_fan_rpm_mask[id];
-        rv = wb_pmbus_update_fan(client, page, id, bit, bit, word);
-        break;
-    default:
-        rv = -ENXIO;
-        break;
-    }
-
-    return rv;
-}
-
-/*
- * _pmbus_write_word_data() is similar to pmbus_write_word_data(), but checks if
- * a device specific mapping function exists and calls it if necessary.
- */
-static int _pmbus_write_word_data(struct i2c_client *client, int page, int reg,
-                  u16 word)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    const struct pmbus_driver_info *info = data->info;
-    int status;
-
-    if (info->write_word_data) {
-        status = info->write_word_data(client, page, reg, word);
-        if (status != -ENODATA)
-            return status;
-    }
-
-    if (reg >= PMBUS_VIRT_BASE)
-        return pmbus_write_virt_reg(client, page, reg, word);
-
-    return wb_pmbus_write_word_data(client, page, reg, word);
-}
-
-int wb_pmbus_update_fan(struct i2c_client *client, int page, int id,
-             u8 config, u8 mask, u16 command)
-{
-    int from;
-    int rv;
-    u8 to;
-
-    from = wb_pmbus_read_byte_data(client, page,
-                    pmbus_fan_config_registers[id]);
-    if (from < 0)
-        return from;
-
-    to = (from & ~mask) | (config & mask);
-    if (to != from) {
-        rv = wb_pmbus_write_byte_data(client, page,
-                       pmbus_fan_config_registers[id], to);
-        if (rv < 0)
-            return rv;
-    }
-
-    return _pmbus_write_word_data(client, page,
-                      pmbus_fan_command_registers[id], command);
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_update_fan);
-
-static int wb_pmbus_read_word_data_tmp(struct i2c_client *client, int page, int phase, u8 reg)
-{
-    int rv;
-
-    rv = wb_pmbus_set_page(client, page, phase);
-    if (rv < 0)
-        return rv;
-
-    return i2c_smbus_read_word_data(client, reg);
-}
-
-int wb_pmbus_read_word_data(struct i2c_client *client, int page, int phase, u8 reg)
-{
-    int rv, i;
-    struct device *dev = &client->dev;
-
-    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
-        rv = wb_pmbus_read_word_data_tmp(client, page, phase, reg);
-        if(rv >= 0){
-            return rv;
-        }
-        if ((i + 1) < PMBUS_RETRY_TIME) {
-            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
-        }
-    }
-    dev_dbg(dev, "wb_pmbus_read_word_data failed, page: %d, phase: %d, reg: 0x%x, rv: %d\n",
-        page, phase, reg, rv);
-    return rv;
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_read_word_data);
-
-static int pmbus_read_virt_reg(struct i2c_client *client, int page, int reg)
-{
-    int rv;
-    int id;
-
-    switch (reg) {
-    case PMBUS_VIRT_FAN_TARGET_1 ... PMBUS_VIRT_FAN_TARGET_4:
-        id = reg - PMBUS_VIRT_FAN_TARGET_1;
-        rv = wb_pmbus_get_fan_rate_device(client, page, id, rpm);
-        break;
-    default:
-        rv = -ENXIO;
-        break;
-    }
-
-    return rv;
-}
-
-/*
- * _pmbus_read_word_data() is similar to wb_pmbus_read_word_data(), but checks if
- * a device specific mapping function exists and calls it if necessary.
- */
-static int _pmbus_read_word_data(struct i2c_client *client, int page,
-                 int phase, int reg)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    const struct pmbus_driver_info *info = data->info;
-    int status;
-
-    if (info->read_word_data) {
-        status = info->read_word_data(client, page, phase, reg);
-        if (status != -ENODATA)
-            return status;
-    }
-
-    if (reg >= PMBUS_VIRT_BASE)
-        return pmbus_read_virt_reg(client, page, reg);
-
-    return wb_pmbus_read_word_data(client, page, phase, reg);
-}
-
-/* Same as above, but without phase parameter, for use in check functions */
-static int __pmbus_read_word_data(struct i2c_client *client, int page, int reg)
-{
-    return _pmbus_read_word_data(client, page, 0xff, reg);
-}
-
-static int wb_pmbus_read_byte_data_tmp(struct i2c_client *client, int page, u8 reg)
-{
-    int rv;
-
-    rv = wb_pmbus_set_page(client, page, 0xff);
-    if (rv < 0)
-        return rv;
-
-    return i2c_smbus_read_byte_data(client, reg);
-}
-
-int wb_pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg)
-{
-    int rv, i;
-    struct device *dev = &client->dev;
-
-    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
-        rv = wb_pmbus_read_byte_data_tmp(client, page, reg);
-        if(rv >= 0){
-            return rv;
-        }
-        if ((i + 1) < PMBUS_RETRY_TIME) {
-            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
-        }
-    }
-    dev_dbg(dev, "wb_pmbus_read_byte_data failed, page: %d, reg: 0x%x, rv: %d\n",
-        page, reg, rv);
-    return rv;
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_read_byte_data);
-
-static int wb_pmbus_write_byte_data_tmp(struct i2c_client *client, int page, u8 reg, u8 value)
-{
-    int rv;
-
-    rv = wb_pmbus_set_page(client, page, 0xff);
-    if (rv < 0)
-        return rv;
-
-    return i2c_smbus_write_byte_data(client, reg, value);
-}
-
-int wb_pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg, u8 value)
-{
-    int rv, i;
-    struct device *dev = &client->dev;
-
-    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
-        rv = wb_pmbus_write_byte_data_tmp(client, page, reg, value);
-        if(rv >= 0){
-            return rv;
-        }
-        if ((i + 1) < PMBUS_RETRY_TIME) {
-            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
-        }
-    }
-    dev_dbg(dev, "wb_pmbus_write_byte_data failed, page: %d, reg: 0x%x, value: 0x%x, rv: %d\n",
-        page, reg, value, rv);
-    return rv;
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_write_byte_data);
-
-int wb_pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
-               u8 mask, u8 value)
-{
-    unsigned int tmp;
-    int rv;
-
-    rv = wb_pmbus_read_byte_data(client, page, reg);
-    if (rv < 0)
-        return rv;
-
-    tmp = (rv & ~mask) | (value & mask);
-
-    if (tmp != rv)
-        rv = wb_pmbus_write_byte_data(client, page, reg, tmp);
-
-    return rv;
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_update_byte_data);
-
-/*
- * _pmbus_read_byte_data() is similar to wb_pmbus_read_byte_data(), but checks if
- * a device specific mapping function exists and calls it if necessary.
- */
-static int _pmbus_read_byte_data(struct i2c_client *client, int page, int reg)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    const struct pmbus_driver_info *info = data->info;
-    int status;
-
-    if (info->read_byte_data) {
-        status = info->read_byte_data(client, page, reg);
-        if (status != -ENODATA)
-            return status;
-    }
-    return wb_pmbus_read_byte_data(client, page, reg);
-}
-
-static struct pmbus_sensor *pmbus_find_sensor(struct pmbus_data *data, int page,
-                          int reg)
-{
-    struct pmbus_sensor *sensor;
-
-    for (sensor = data->sensors; sensor; sensor = sensor->next) {
-        if (sensor->page == page && sensor->reg == reg)
-            return sensor;
-    }
-
-    return ERR_PTR(-EINVAL);
-}
-
-static int pmbus_get_fan_rate(struct i2c_client *client, int page, int id,
-                  enum pmbus_fan_mode mode,
-                  bool from_cache)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    bool want_rpm, have_rpm;
-    struct pmbus_sensor *s;
-    int config;
-    int reg;
-
-    want_rpm = (mode == rpm);
-
-    if (from_cache) {
-        reg = want_rpm ? PMBUS_VIRT_FAN_TARGET_1 : PMBUS_VIRT_PWM_1;
-        s = pmbus_find_sensor(data, page, reg + id);
-        if (IS_ERR(s))
-            return PTR_ERR(s);
-
-        return s->data;
-    }
-
-    config = wb_pmbus_read_byte_data(client, page,
-                      pmbus_fan_config_registers[id]);
-    if (config < 0)
-        return config;
-
-    have_rpm = !!(config & pmbus_fan_rpm_mask[id]);
-    if (want_rpm == have_rpm)
-        return wb_pmbus_read_word_data(client, page, 0xff,
-                        pmbus_fan_command_registers[id]);
-
-    /* Can't sensibly map between RPM and PWM, just return zero */
-    return 0;
-}
-
-int wb_pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id,
-                  enum pmbus_fan_mode mode)
-{
-    return pmbus_get_fan_rate(client, page, id, mode, false);
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_get_fan_rate_device);
-
-int wb_pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id,
-                  enum pmbus_fan_mode mode)
-{
-    return pmbus_get_fan_rate(client, page, id, mode, true);
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_get_fan_rate_cached);
-
-static void pmbus_clear_fault_page(struct i2c_client *client, int page)
-{
-    _pmbus_write_byte(client, page, PMBUS_CLEAR_FAULTS);
-}
-
-void wb_pmbus_clear_faults(struct i2c_client *client)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int i;
-
-    for (i = 0; i < data->info->pages; i++)
-        pmbus_clear_fault_page(client, i);
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_clear_faults);
-
-static int pmbus_check_status_cml(struct i2c_client *client)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int status, status2;
-
-    status = data->read_status(client, -1);
-    if (status < 0 || (status & PB_STATUS_CML)) {
-        status2 = _pmbus_read_byte_data(client, -1, PMBUS_STATUS_CML);
-        if (status2 < 0 || (status2 & PB_CML_FAULT_INVALID_COMMAND))
-            return -EIO;
-    }
-    return 0;
-}
-
-static bool pmbus_check_register(struct i2c_client *client,
-                 int (*func)(struct i2c_client *client,
-                         int page, int reg),
-                 int page, int reg)
-{
-    int rv;
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    rv = func(client, page, reg);
-    if (rv >= 0 && !(data->flags & PMBUS_SKIP_STATUS_CHECK))
-        rv = pmbus_check_status_cml(client);
-    pmbus_clear_fault_page(client, -1);
-    return rv >= 0;
-}
-
-static bool pmbus_check_status_register(struct i2c_client *client, int page)
-{
-    int status;
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    status = data->read_status(client, page);
-    if (status >= 0 && !(data->flags & PMBUS_SKIP_STATUS_CHECK) &&
-        (status & PB_STATUS_CML)) {
-        status = _pmbus_read_byte_data(client, -1, PMBUS_STATUS_CML);
-        if (status < 0 || (status & PB_CML_FAULT_INVALID_COMMAND))
-            status = -EIO;
-    }
-
-    pmbus_clear_fault_page(client, -1);
-    return status >= 0;
-}
-
-bool wb_pmbus_check_byte_register(struct i2c_client *client, int page, int reg)
-{
-    return pmbus_check_register(client, _pmbus_read_byte_data, page, reg);
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_check_byte_register);
-
-bool wb_pmbus_check_word_register(struct i2c_client *client, int page, int reg)
-{
-    return pmbus_check_register(client, __pmbus_read_word_data, page, reg);
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_check_word_register);
-
-const struct pmbus_driver_info *wb_pmbus_get_driver_info(struct i2c_client *client)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    return data->info;
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_get_driver_info);
-
-static int pmbus_read_status_byte(struct i2c_client *client, int page)
-{
-    return _pmbus_read_byte_data(client, page, PMBUS_STATUS_BYTE);
-}
-
-static int pmbus_read_status_word(struct i2c_client *client, int page)
-{
-    return _pmbus_read_word_data(client, page, 0xff, PMBUS_STATUS_WORD);
-}
-
-static int pmbus_get_status(struct i2c_client *client, int page, int reg)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int status;
-
-    switch (reg) {
-    case PMBUS_STATUS_WORD:
-        status = data->read_status(client, page);
-        if ((status < 0) || (data->has_status_word && (status == 0xffff))
-            || (!data->has_status_word && (status == 0xff))) {
-            if (data->has_status_word) {
-                data->read_status = pmbus_read_status_byte;
-            } else {
-                data->read_status = pmbus_read_status_word;
-            }
-            data->has_status_word = !data->has_status_word;
-            status = data->read_status(client, page);
-        }
-        break;
-    default:
-        status = _pmbus_read_byte_data(client, page, reg);
-        break;
-    }
-    if (status < 0)
-        wb_pmbus_clear_faults(client);
-    return status;
-}
-
-static void pmbus_update_sensor_data(struct i2c_client *client, struct pmbus_sensor *sensor)
-{
-    if (sensor->data < 0 || sensor->update)
-        sensor->data = _pmbus_read_word_data(client, sensor->page,
-                             sensor->phase, sensor->reg);
-}
-
-/*
- * Convert linear sensor values to milli- or micro-units
- * depending on sensor type.
- */
-static s64 pmbus_reg2data_linear(struct pmbus_data *data,
-                 struct pmbus_sensor *sensor)
-{
-    s16 exponent;
-    s32 mantissa;
-    s64 val;
-
-    if (sensor->class == PSC_VOLTAGE_OUT) {    /* LINEAR16 */
-        exponent = data->exponent[sensor->page];
-        mantissa = (u16) sensor->data;
-    } else {                /* LINEAR11 */
-        exponent = ((s16)sensor->data) >> 11;
-        mantissa = ((s16)((sensor->data & 0x7ff) << 5)) >> 5;
-    }
-
-    val = mantissa;
-
-    /* scale result to milli-units for all sensors except fans */
-    if (sensor->class != PSC_FAN)
-        val = val * 1000LL;
-
-    /* scale result to micro-units for power sensors */
-    if (sensor->class == PSC_POWER)
-        val = val * 1000LL;
-
-    if (exponent >= 0)
-        val <<= exponent;
-    else
-        val >>= -exponent;
-
-    return val;
-}
-
-/*
- * Convert direct sensor values to milli- or micro-units
- * depending on sensor type.
- */
-static s64 pmbus_reg2data_direct(struct pmbus_data *data,
-                 struct pmbus_sensor *sensor)
-{
-    s64 b, val = (s16)sensor->data;
-    s32 m, R;
-
-    m = data->info->m[sensor->class];
-    b = data->info->b[sensor->class];
-    R = data->info->R[sensor->class];
-
-    if (m == 0)
-        return 0;
-
-    /* X = 1/m * (Y * 10^-R - b) */
-    R = -R;
-    /* scale result to milli-units for everything but fans */
-    if (!(sensor->class == PSC_FAN || sensor->class == PSC_PWM)) {
-        R += 3;
-        b *= 1000;
-    }
-
-    /* scale result to micro-units for power sensors */
-    if (sensor->class == PSC_POWER) {
-        R += 3;
-        b *= 1000;
-    }
-
-    while (R > 0) {
-        val *= 10;
-        R--;
-    }
-    while (R < 0) {
-        val = div_s64(val + 5LL, 10L);  /* round closest */
-        R++;
-    }
-
-    val = div_s64(val - b, m);
-    return val;
-}
-
-/*
- * Convert VID sensor values to milli- or micro-units
- * depending on sensor type.
- */
-static s64 pmbus_reg2data_vid(struct pmbus_data *data,
-                  struct pmbus_sensor *sensor)
-{
-    long val = sensor->data;
-    long rv = 0;
-
-    switch (data->info->vrm_version[sensor->page]) {
-    case vr11:
-        if (val >= 0x02 && val <= 0xb2)
-            rv = DIV_ROUND_CLOSEST(160000 - (val - 2) * 625, 100);
-        break;
-    case vr12:
-        if (val >= 0x01)
-            rv = 250 + (val - 1) * 5;
-        break;
-    case vr13:
-        if (val >= 0x01)
-            rv = 500 + (val - 1) * 10;
-        break;
-    case imvp9:
-        if (val >= 0x01)
-            rv = 200 + (val - 1) * 10;
-        break;
-    case amd625mv:
-        if (val >= 0x0 && val <= 0xd8)
-            rv = DIV_ROUND_CLOSEST(155000 - val * 625, 100);
-        break;
-    }
-    return rv;
-}
-
-static s64 pmbus_reg2data(struct pmbus_data *data, struct pmbus_sensor *sensor)
-{
-    s64 val;
-
-    if (!sensor->convert)
-        return sensor->data;
-
-    switch (data->info->format[sensor->class]) {
-    case direct:
-        val = pmbus_reg2data_direct(data, sensor);
-        break;
-    case vid:
-        val = pmbus_reg2data_vid(data, sensor);
-        break;
-    case linear:
-    default:
-        val = pmbus_reg2data_linear(data, sensor);
-        break;
-    }
-    return val;
-}
-
-#define MAX_MANTISSA    (1023 * 1000)
-#define MIN_MANTISSA    (511 * 1000)
-
-static u16 pmbus_data2reg_linear(struct pmbus_data *data,
-                 struct pmbus_sensor *sensor, s64 val)
-{
-    s16 exponent = 0, mantissa;
-    bool negative = false;
-
-    /* simple case */
-    if (val == 0)
-        return 0;
-
-    if (sensor->class == PSC_VOLTAGE_OUT) {
-        /* LINEAR16 does not support negative voltages */
-        if (val < 0)
-            return 0;
-
-        /*
-         * For a static exponents, we don't have a choice
-         * but to adjust the value to it.
-         */
-        if (data->exponent[sensor->page] < 0)
-            val <<= -data->exponent[sensor->page];
-        else
-            val >>= data->exponent[sensor->page];
-        val = DIV_ROUND_CLOSEST_ULL(val, 1000);
-        return clamp_val(val, 0, 0xffff);
-    }
-
-    if (val < 0) {
-        negative = true;
-        val = -val;
-    }
-
-    /* Power is in uW. Convert to mW before converting. */
-    if (sensor->class == PSC_POWER)
-        val = DIV_ROUND_CLOSEST_ULL(val, 1000);
-
-    /*
-     * For simplicity, convert fan data to milli-units
-     * before calculating the exponent.
-     */
-    if (sensor->class == PSC_FAN)
-        val = val * 1000LL;
-
-    /* Reduce large mantissa until it fits into 10 bit */
-    while (val >= MAX_MANTISSA && exponent < 15) {
-        exponent++;
-        val >>= 1;
-    }
-    /* Increase small mantissa to improve precision */
-    while (val < MIN_MANTISSA && exponent > -15) {
-        exponent--;
-        val <<= 1;
-    }
-
-    /* Convert mantissa from milli-units to units */
-    mantissa = clamp_val(DIV_ROUND_CLOSEST_ULL(val, 1000), 0, 0x3ff);
-
-    /* restore sign */
-    if (negative)
-        mantissa = -mantissa;
-
-    /* Convert to 5 bit exponent, 11 bit mantissa */
-    return (mantissa & 0x7ff) | ((exponent << 11) & 0xf800);
-}
-
-static u16 pmbus_data2reg_direct(struct pmbus_data *data,
-                 struct pmbus_sensor *sensor, s64 val)
-{
-    s64 b;
-    s32 m, R;
-
-    m = data->info->m[sensor->class];
-    b = data->info->b[sensor->class];
-    R = data->info->R[sensor->class];
-
-    /* Power is in uW. Adjust R and b. */
-    if (sensor->class == PSC_POWER) {
-        R -= 3;
-        b *= 1000;
-    }
-
-    /* Calculate Y = (m * X + b) * 10^R */
-    if (!(sensor->class == PSC_FAN || sensor->class == PSC_PWM)) {
-        R -= 3;        /* Adjust R and b for data in milli-units */
-        b *= 1000;
-    }
-    val = val * m + b;
-
-    while (R > 0) {
-        val *= 10;
-        R--;
-    }
-    while (R < 0) {
-        val = div_s64(val + 5LL, 10L);  /* round closest */
-        R++;
-    }
-
-    return (u16)clamp_val(val, S16_MIN, S16_MAX);
-}
-
-static u16 pmbus_data2reg_vid(struct pmbus_data *data,
-                  struct pmbus_sensor *sensor, s64 val)
-{
-    val = clamp_val(val, 500, 1600);
-
-    return 2 + DIV_ROUND_CLOSEST_ULL((1600LL - val) * 100LL, 625);
-}
-
-static u16 pmbus_data2reg(struct pmbus_data *data,
-              struct pmbus_sensor *sensor, s64 val)
-{
-    u16 regval;
-
-    if (!sensor->convert)
-        return val;
-
-    switch (data->info->format[sensor->class]) {
-    case direct:
-        regval = pmbus_data2reg_direct(data, sensor, val);
-        break;
-    case vid:
-        regval = pmbus_data2reg_vid(data, sensor, val);
-        break;
-    case linear:
-    default:
-        regval = pmbus_data2reg_linear(data, sensor, val);
-        break;
-    }
-    return regval;
-}
-
-/*
- * Return boolean calculated from converted data.
- * <index> defines a status register index and mask.
- * The mask is in the lower 8 bits, the register index is in bits 8..23.
- *
- * The associated pmbus_boolean structure contains optional pointers to two
- * sensor attributes. If specified, those attributes are compared against each
- * other to determine if a limit has been exceeded.
- *
- * If the sensor attribute pointers are NULL, the function returns true if
- * (status[reg] & mask) is true.
- *
- * If sensor attribute pointers are provided, a comparison against a specified
- * limit has to be performed to determine the boolean result.
- * In this case, the function returns true if v1 >= v2 (where v1 and v2 are
- * sensor values referenced by sensor attribute pointers s1 and s2).
- *
- * To determine if an object exceeds upper limits, specify <s1,s2> = <v,limit>.
- * To determine if an object exceeds lower limits, specify <s1,s2> = <limit,v>.
- *
- * If a negative value is stored in any of the referenced registers, this value
- * reflects an error code which will be returned.
- */
-static int pmbus_get_boolean(struct i2c_client *client, struct pmbus_boolean *b,
-                 int index)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    struct pmbus_sensor *s1 = b->s1;
-    struct pmbus_sensor *s2 = b->s2;
-    u16 mask = pb_index_to_mask(index);
-    u8 page = pb_index_to_page(index);
-    u16 reg = pb_index_to_reg(index);
-    int ret, status;
-    u16 regval;
-
-    mutex_lock(&data->update_lock);
-    status = pmbus_get_status(client, page, reg);
-    if (status < 0) {
-        ret = status;
-        goto unlock;
-    }
-
-    if (s1)
-        pmbus_update_sensor_data(client, s1);
-    if (s2)
-        pmbus_update_sensor_data(client, s2);
-
-    regval = status & mask;
-    if (s1 && s2) {
-        s64 v1, v2;
-
-        if (s1->data < 0) {
-            ret = s1->data;
-            goto unlock;
-        }
-        if (s2->data < 0) {
-            ret = s2->data;
-            goto unlock;
-        }
-
-        v1 = pmbus_reg2data(data, s1);
-        v2 = pmbus_reg2data(data, s2);
-        ret = !!(regval && v1 >= v2);
-    } else {
-        ret = !!regval;
-    }
-unlock:
-    mutex_unlock(&data->update_lock);
-    return ret;
-}
-
-static ssize_t pmbus_show_boolean(struct device *dev,
-                  struct device_attribute *da, char *buf)
-{
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
-    struct pmbus_boolean *boolean = to_pmbus_boolean(attr);
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    int val;
-
-    val = pmbus_get_boolean(client, boolean, attr->index);
-    if (val < 0)
-        return val;
-    return snprintf(buf, PAGE_SIZE, "%d\n", val);
-}
-
-static ssize_t pmbus_show_sensor(struct device *dev,
-                 struct device_attribute *devattr, char *buf)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct pmbus_sensor *sensor = to_pmbus_sensor(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    ssize_t ret;
-
-    mutex_lock(&data->update_lock);
-    pmbus_update_sensor_data(client, sensor);
-    if (sensor->data < 0)
-        ret = sensor->data;
-    else
-        ret = snprintf(buf, PAGE_SIZE, "%lld\n", pmbus_reg2data(data, sensor));
-    mutex_unlock(&data->update_lock);
-    return ret;
-}
-
-static ssize_t pmbus_set_sensor(struct device *dev,
-                struct device_attribute *devattr,
-                const char *buf, size_t count)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    struct pmbus_sensor *sensor = to_pmbus_sensor(devattr);
-    ssize_t rv = count;
-    s64 val;
-    int ret;
-    u16 regval;
-
-    if (kstrtos64(buf, 10, &val) < 0)
-        return -EINVAL;
-
-    mutex_lock(&data->update_lock);
-    regval = pmbus_data2reg(data, sensor, val);
-    ret = _pmbus_write_word_data(client, sensor->page, sensor->reg, regval);
-    if (ret < 0)
-        rv = ret;
-    else
-        sensor->data = regval;
-    mutex_unlock(&data->update_lock);
-    return rv;
-}
-
-static ssize_t pmbus_show_label(struct device *dev,
-                struct device_attribute *da, char *buf)
-{
-    struct pmbus_label *label = to_pmbus_label(da);
-
-    return snprintf(buf, PAGE_SIZE, "%s\n", label->label);
-}
-
-static int pmbus_add_attribute(struct pmbus_data *data, struct attribute *attr)
-{
-    if (data->num_attributes >= data->max_attributes - 1) {
-        int new_max_attrs = data->max_attributes + PMBUS_ATTR_ALLOC_SIZE;
-        void *new_attrs = devm_krealloc(data->dev, data->group.attrs,
-                        new_max_attrs * sizeof(void *),
-                        GFP_KERNEL);
-        if (!new_attrs)
-            return -ENOMEM;
-        data->group.attrs = new_attrs;
-        data->max_attributes = new_max_attrs;
-    }
-
-    data->group.attrs[data->num_attributes++] = attr;
-    data->group.attrs[data->num_attributes] = NULL;
-    return 0;
-}
-
-static void pmbus_dev_attr_init(struct device_attribute *dev_attr,
-                const char *name,
-                umode_t mode,
-                ssize_t (*show)(struct device *dev,
-                        struct device_attribute *attr,
-                        char *buf),
-                ssize_t (*store)(struct device *dev,
-                         struct device_attribute *attr,
-                         const char *buf, size_t count))
-{
-    sysfs_attr_init(&dev_attr->attr);
-    dev_attr->attr.name = name;
-    dev_attr->attr.mode = mode;
-    dev_attr->show = show;
-    dev_attr->store = store;
-}
-
-static void pmbus_attr_init(struct sensor_device_attribute *a,
-                const char *name,
-                umode_t mode,
-                ssize_t (*show)(struct device *dev,
-                        struct device_attribute *attr,
-                        char *buf),
-                ssize_t (*store)(struct device *dev,
-                         struct device_attribute *attr,
-                         const char *buf, size_t count),
-                int idx)
-{
-    pmbus_dev_attr_init(&a->dev_attr, name, mode, show, store);
-    a->index = idx;
-}
-
-static int pmbus_add_boolean(struct pmbus_data *data,
-                 const char *name, const char *type, int seq,
-                 struct pmbus_sensor *s1,
-                 struct pmbus_sensor *s2,
-                 u8 page, u16 reg, u16 mask)
-{
-    struct pmbus_boolean *boolean;
-    struct sensor_device_attribute *a;
-
-    if (WARN((s1 && !s2) || (!s1 && s2), "Bad s1/s2 parameters\n"))
-        return -EINVAL;
-
-    boolean = devm_kzalloc(data->dev, sizeof(*boolean), GFP_KERNEL);
-    if (!boolean)
-        return -ENOMEM;
-
-    a = &boolean->attribute;
-
-    snprintf(boolean->name, sizeof(boolean->name), "%s%d_%s",
-         name, seq, type);
-    boolean->s1 = s1;
-    boolean->s2 = s2;
-    pmbus_attr_init(a, boolean->name, 0444, pmbus_show_boolean, NULL,
-            pb_reg_to_index(page, reg, mask));
-
-    return pmbus_add_attribute(data, &a->dev_attr.attr);
-}
-
-static struct pmbus_sensor *pmbus_add_sensor(struct pmbus_data *data,
-                         const char *name, const char *type,
-                         int seq, int page, int phase,
-                         int reg,
-                         enum pmbus_sensor_classes class,
-                         bool update, bool readonly,
-                         bool convert)
-{
-    struct pmbus_sensor *sensor;
-    struct device_attribute *a;
-
-    sensor = devm_kzalloc(data->dev, sizeof(*sensor), GFP_KERNEL);
-    if (!sensor)
-        return NULL;
-    a = &sensor->attribute;
-
-    if (type)
-        snprintf(sensor->name, sizeof(sensor->name), "%s%d_%s",
-             name, seq, type);
-    else
-        snprintf(sensor->name, sizeof(sensor->name), "%s%d",
-             name, seq);
-
-    if (data->flags & PMBUS_WRITE_PROTECTED)
-        readonly = true;
-
-    sensor->page = page;
-    sensor->phase = phase;
-    sensor->reg = reg;
-    sensor->class = class;
-    sensor->update = update;
-    sensor->convert = convert;
-    sensor->data = -ENODATA;
-    pmbus_dev_attr_init(a, sensor->name,
-                readonly ? 0444 : 0644,
-                pmbus_show_sensor, pmbus_set_sensor);
-
-    if (pmbus_add_attribute(data, &a->attr))
-        return NULL;
-
-    sensor->next = data->sensors;
-    data->sensors = sensor;
-
-    return sensor;
-}
-
-static int pmbus_add_label(struct pmbus_data *data,
-               const char *name, int seq,
-               const char *lstring, int index, int phase)
-{
-    struct pmbus_label *label;
-    struct device_attribute *a;
-
-    label = devm_kzalloc(data->dev, sizeof(*label), GFP_KERNEL);
-    if (!label)
-        return -ENOMEM;
-
-    a = &label->attribute;
-
-    snprintf(label->name, sizeof(label->name), "%s%d_label", name, seq);
-    if (!index) {
-        if (phase == 0xff)
-            strlcpy(label->label, lstring,
-                sizeof(label->label));
-        else
-            snprintf(label->label, sizeof(label->label), "%s.%d",
-                 lstring, phase);
-    } else {
-        if (phase == 0xff)
-            snprintf(label->label, sizeof(label->label), "%s%d",
-                 lstring, index);
-        else
-            snprintf(label->label, sizeof(label->label), "%s%d.%d",
-                 lstring, index, phase);
-    }
-
-    pmbus_dev_attr_init(a, label->name, 0444, pmbus_show_label, NULL);
-    return pmbus_add_attribute(data, &a->attr);
-}
-
-/*
- * Search for attributes. Allocate sensors, booleans, and labels as needed.
- */
-
-/*
- * The pmbus_limit_attr structure describes a single limit attribute
- * and its associated alarm attribute.
- */
-struct pmbus_limit_attr {
-    u16 reg;        /* Limit register */
-    u16 sbit;        /* Alarm attribute status bit */
-    bool update;        /* True if register needs updates */
-    bool low;        /* True if low limit; for limits with compare
-                   functions only */
-    const char *attr;    /* Attribute name */
-    const char *alarm;    /* Alarm attribute name */
-};
-
-/*
- * The pmbus_sensor_attr structure describes one sensor attribute. This
- * description includes a reference to the associated limit attributes.
- */
-struct pmbus_sensor_attr {
-    u16 reg;            /* sensor register */
-    u16 gbit;            /* generic status bit */
-    u8 nlimit;            /* # of limit registers */
-    enum pmbus_sensor_classes class;/* sensor class */
-    const char *label;        /* sensor label */
-    bool paged;            /* true if paged sensor */
-    bool update;            /* true if update needed */
-    bool compare;            /* true if compare function needed */
-    u32 func;            /* sensor mask */
-    u32 sfunc;            /* sensor status mask */
-    int sreg;            /* status register */
-    const struct pmbus_limit_attr *limit;/* limit registers */
-};
-
-/*
- * Add a set of limit attributes and, if supported, the associated
- * alarm attributes.
- * returns 0 if no alarm register found, 1 if an alarm register was found,
- * < 0 on errors.
- */
-static int pmbus_add_limit_attrs(struct i2c_client *client,
-                 struct pmbus_data *data,
-                 const struct pmbus_driver_info *info,
-                 const char *name, int index, int page,
-                 struct pmbus_sensor *base,
-                 const struct pmbus_sensor_attr *attr)
-{
-    const struct pmbus_limit_attr *l = attr->limit;
-    int nlimit = attr->nlimit;
-    int have_alarm = 0;
-    int i, ret;
-    struct pmbus_sensor *curr;
-
-    for (i = 0; i < nlimit; i++) {
-        if (wb_pmbus_check_word_register(client, page, l->reg)) {
-            curr = pmbus_add_sensor(data, name, l->attr, index,
-                        page, 0xff, l->reg, attr->class,
-                        attr->update || l->update,
-                        false, true);
-            if (!curr)
-                return -ENOMEM;
-            if (l->sbit && (info->func[page] & attr->sfunc)) {
-                ret = pmbus_add_boolean(data, name,
-                    l->alarm, index,
-                    attr->compare ?  l->low ? curr : base
-                              : NULL,
-                    attr->compare ? l->low ? base : curr
-                              : NULL,
-                    page, attr->sreg, l->sbit);
-                if (ret)
-                    return ret;
-                have_alarm = 1;
-            }
-        }
-        l++;
-    }
-    return have_alarm;
-}
-
-static int pmbus_add_sensor_attrs_one(struct i2c_client *client,
-                      struct pmbus_data *data,
-                      const struct pmbus_driver_info *info,
-                      const char *name,
-                      int index, int page, int phase,
-                      const struct pmbus_sensor_attr *attr,
-                      bool paged)
-{
-    struct pmbus_sensor *base;
-    bool upper = !!(attr->gbit & 0xff00);    /* need to check STATUS_WORD */
-    int ret;
-
-    if (attr->label) {
-        ret = pmbus_add_label(data, name, index, attr->label,
-                      paged ? page + 1 : 0, phase);
-        if (ret)
-            return ret;
-    }
-    base = pmbus_add_sensor(data, name, "input", index, page, phase,
-                attr->reg, attr->class, true, true, true);
-    if (!base)
-        return -ENOMEM;
-    /* No limit and alarm attributes for phase specific sensors */
-    if (attr->sfunc && phase == 0xff) {
-        ret = pmbus_add_limit_attrs(client, data, info, name,
-                        index, page, base, attr);
-        if (ret < 0)
-            return ret;
-        /*
-         * Add generic alarm attribute only if there are no individual
-         * alarm attributes, if there is a global alarm bit, and if
-         * the generic status register (word or byte, depending on
-         * which global bit is set) for this page is accessible.
-         */
-        if (!ret && attr->gbit &&
-            (!upper || (upper && data->has_status_word)) &&
-            pmbus_check_status_register(client, page)) {
-            ret = pmbus_add_boolean(data, name, "alarm", index,
-                        NULL, NULL,
-                        page, PMBUS_STATUS_WORD,
-                        attr->gbit);
-            if (ret)
-                return ret;
-        }
-    }
-    return 0;
-}
-
-static bool pmbus_sensor_is_paged(const struct pmbus_driver_info *info,
-                  const struct pmbus_sensor_attr *attr)
-{
-    int p;
-
-    if (attr->paged)
-        return true;
-
-    /*
-     * Some attributes may be present on more than one page despite
-     * not being marked with the paged attribute. If that is the case,
-     * then treat the sensor as being paged and add the page suffix to the
-     * attribute name.
-     * We don't just add the paged attribute to all such attributes, in
-     * order to maintain the un-suffixed labels in the case where the
-     * attribute is only on page 0.
-     */
-    for (p = 1; p < info->pages; p++) {
-        if (info->func[p] & attr->func)
-            return true;
-    }
-    return false;
-}
-
-static int pmbus_add_sensor_attrs(struct i2c_client *client,
-                  struct pmbus_data *data,
-                  const char *name,
-                  const struct pmbus_sensor_attr *attrs,
-                  int nattrs)
-{
-    const struct pmbus_driver_info *info = data->info;
-    int index, i;
-    int ret;
-
-    index = 1;
-    for (i = 0; i < nattrs; i++) {
-        int page, pages;
-        bool paged = pmbus_sensor_is_paged(info, attrs);
-
-        pages = paged ? info->pages : 1;
-        for (page = 0; page < pages; page++) {
-            if (!(info->func[page] & attrs->func))
-                continue;
-            ret = pmbus_add_sensor_attrs_one(client, data, info,
-                             name, index, page,
-                             0xff, attrs, paged);
-            if (ret)
-                return ret;
-            index++;
-            if (info->phases[page]) {
-                int phase;
-
-                for (phase = 0; phase < info->phases[page];
-                     phase++) {
-                    if (!(info->pfunc[phase] & attrs->func))
-                        continue;
-                    ret = pmbus_add_sensor_attrs_one(client,
-                        data, info, name, index, page,
-                        phase, attrs, paged);
-                    if (ret)
-                        return ret;
-                    index++;
-                }
-            }
-        }
-        attrs++;
-    }
-    return 0;
-}
-
-static const struct pmbus_limit_attr vin_limit_attrs[] = {
-    {
-        .reg = PMBUS_VIN_UV_WARN_LIMIT,
-        .attr = "min",
-        .alarm = "min_alarm",
-        .sbit = PB_VOLTAGE_UV_WARNING,
-    }, {
-        .reg = PMBUS_VIN_UV_FAULT_LIMIT,
-        .attr = "lcrit",
-        .alarm = "lcrit_alarm",
-        .sbit = PB_VOLTAGE_UV_FAULT,
-    }, {
-        .reg = PMBUS_VIN_OV_WARN_LIMIT,
-        .attr = "max",
-        .alarm = "max_alarm",
-        .sbit = PB_VOLTAGE_OV_WARNING,
-    }, {
-        .reg = PMBUS_VIN_OV_FAULT_LIMIT,
-        .attr = "crit",
-        .alarm = "crit_alarm",
-        .sbit = PB_VOLTAGE_OV_FAULT,
-    }, {
-        .reg = PMBUS_VIRT_READ_VIN_AVG,
-        .update = true,
-        .attr = "average",
-    }, {
-        .reg = PMBUS_VIRT_READ_VIN_MIN,
-        .update = true,
-        .attr = "lowest",
-    }, {
-        .reg = PMBUS_VIRT_READ_VIN_MAX,
-        .update = true,
-        .attr = "highest",
-    }, {
-        .reg = PMBUS_VIRT_RESET_VIN_HISTORY,
-        .attr = "reset_history",
-    }, {
-        .reg = PMBUS_MFR_VIN_MIN,
-        .attr = "rated_min",
-    }, {
-        .reg = PMBUS_MFR_VIN_MAX,
-        .attr = "rated_max",
-    },
-};
-
-static const struct pmbus_limit_attr vmon_limit_attrs[] = {
-    {
-        .reg = PMBUS_VIRT_VMON_UV_WARN_LIMIT,
-        .attr = "min",
-        .alarm = "min_alarm",
-        .sbit = PB_VOLTAGE_UV_WARNING,
-    }, {
-        .reg = PMBUS_VIRT_VMON_UV_FAULT_LIMIT,
-        .attr = "lcrit",
-        .alarm = "lcrit_alarm",
-        .sbit = PB_VOLTAGE_UV_FAULT,
-    }, {
-        .reg = PMBUS_VIRT_VMON_OV_WARN_LIMIT,
-        .attr = "max",
-        .alarm = "max_alarm",
-        .sbit = PB_VOLTAGE_OV_WARNING,
-    }, {
-        .reg = PMBUS_VIRT_VMON_OV_FAULT_LIMIT,
-        .attr = "crit",
-        .alarm = "crit_alarm",
-        .sbit = PB_VOLTAGE_OV_FAULT,
-    }
-};
-
-static const struct pmbus_limit_attr vout_limit_attrs[] = {
-    {
-        .reg = PMBUS_VOUT_UV_WARN_LIMIT,
-        .attr = "min",
-        .alarm = "min_alarm",
-        .sbit = PB_VOLTAGE_UV_WARNING,
-    }, {
-        .reg = PMBUS_VOUT_UV_FAULT_LIMIT,
-        .attr = "lcrit",
-        .alarm = "lcrit_alarm",
-        .sbit = PB_VOLTAGE_UV_FAULT,
-    }, {
-        .reg = PMBUS_VOUT_OV_WARN_LIMIT,
-        .attr = "max",
-        .alarm = "max_alarm",
-        .sbit = PB_VOLTAGE_OV_WARNING,
-    }, {
-        .reg = PMBUS_VOUT_OV_FAULT_LIMIT,
-        .attr = "crit",
-        .alarm = "crit_alarm",
-        .sbit = PB_VOLTAGE_OV_FAULT,
-    }, {
-        .reg = PMBUS_VIRT_READ_VOUT_AVG,
-        .update = true,
-        .attr = "average",
-    }, {
-        .reg = PMBUS_VIRT_READ_VOUT_MIN,
-        .update = true,
-        .attr = "lowest",
-    }, {
-        .reg = PMBUS_VIRT_READ_VOUT_MAX,
-        .update = true,
-        .attr = "highest",
-    }, {
-        .reg = PMBUS_VIRT_RESET_VOUT_HISTORY,
-        .attr = "reset_history",
-    }, {
-        .reg = PMBUS_MFR_VOUT_MIN,
-        .attr = "rated_min",
-    }, {
-        .reg = PMBUS_MFR_VOUT_MAX,
-        .attr = "rated_max",
-    },
-};
-
-static const struct pmbus_sensor_attr voltage_attributes[] = {
-    {
-        .reg = PMBUS_READ_VIN,
-        .class = PSC_VOLTAGE_IN,
-        .label = "vin",
-        .func = PMBUS_HAVE_VIN,
-        .sfunc = PMBUS_HAVE_STATUS_INPUT,
-        .sreg = PMBUS_STATUS_INPUT,
-        .gbit = PB_STATUS_VIN_UV,
-        .limit = vin_limit_attrs,
-        .nlimit = 0,
-    }, {
-        .reg = PMBUS_VIRT_READ_VMON,
-        .class = PSC_VOLTAGE_IN,
-        .label = "vmon",
-        .func = PMBUS_HAVE_VMON,
-        .sfunc = PMBUS_HAVE_STATUS_VMON,
-        .sreg = PMBUS_VIRT_STATUS_VMON,
-        .limit = vmon_limit_attrs,
-        .nlimit = 0,
-    }, {
-        .reg = PMBUS_READ_VCAP,
-        .class = PSC_VOLTAGE_IN,
-        .label = "vcap",
-        .func = PMBUS_HAVE_VCAP,
-    }, {
-        .reg = PMBUS_READ_VOUT,
-        .class = PSC_VOLTAGE_OUT,
-        .label = "vout",
-        .paged = true,
-        .func = PMBUS_HAVE_VOUT,
-        .sfunc = PMBUS_HAVE_STATUS_VOUT,
-        .sreg = PMBUS_STATUS_VOUT,
-        .gbit = PB_STATUS_VOUT_OV,
-        .limit = vout_limit_attrs,
-        .nlimit = 0,
-    }
-};
-
-/* Current attributes */
-
-static const struct pmbus_limit_attr iin_limit_attrs[] = {
-    {
-        .reg = PMBUS_IIN_OC_WARN_LIMIT,
-        .attr = "max",
-        .alarm = "max_alarm",
-        .sbit = PB_IIN_OC_WARNING,
-    }, {
-        .reg = PMBUS_IIN_OC_FAULT_LIMIT,
-        .attr = "crit",
-        .alarm = "crit_alarm",
-        .sbit = PB_IIN_OC_FAULT,
-    }, {
-        .reg = PMBUS_VIRT_READ_IIN_AVG,
-        .update = true,
-        .attr = "average",
-    }, {
-        .reg = PMBUS_VIRT_READ_IIN_MIN,
-        .update = true,
-        .attr = "lowest",
-    }, {
-        .reg = PMBUS_VIRT_READ_IIN_MAX,
-        .update = true,
-        .attr = "highest",
-    }, {
-        .reg = PMBUS_VIRT_RESET_IIN_HISTORY,
-        .attr = "reset_history",
-    }, {
-        .reg = PMBUS_MFR_IIN_MAX,
-        .attr = "rated_max",
-    },
-};
-
-static const struct pmbus_limit_attr iout_limit_attrs[] = {
-    {
-        .reg = PMBUS_IOUT_OC_WARN_LIMIT,
-        .attr = "max",
-        .alarm = "max_alarm",
-        .sbit = PB_IOUT_OC_WARNING,
-    }, {
-        .reg = PMBUS_IOUT_UC_FAULT_LIMIT,
-        .attr = "lcrit",
-        .alarm = "lcrit_alarm",
-        .sbit = PB_IOUT_UC_FAULT,
-    }, {
-        .reg = PMBUS_IOUT_OC_FAULT_LIMIT,
-        .attr = "crit",
-        .alarm = "crit_alarm",
-        .sbit = PB_IOUT_OC_FAULT,
-    }, {
-        .reg = PMBUS_VIRT_READ_IOUT_AVG,
-        .update = true,
-        .attr = "average",
-    }, {
-        .reg = PMBUS_VIRT_READ_IOUT_MIN,
-        .update = true,
-        .attr = "lowest",
-    }, {
-        .reg = PMBUS_VIRT_READ_IOUT_MAX,
-        .update = true,
-        .attr = "highest",
-    }, {
-        .reg = PMBUS_VIRT_RESET_IOUT_HISTORY,
-        .attr = "reset_history",
-    }, {
-        .reg = PMBUS_MFR_IOUT_MAX,
-        .attr = "rated_max",
-    },
-};
-
-static const struct pmbus_sensor_attr current_attributes[] = {
-    {
-        .reg = PMBUS_READ_IIN,
-        .class = PSC_CURRENT_IN,
-        .label = "iin",
-        .func = PMBUS_HAVE_IIN,
-        .sfunc = PMBUS_HAVE_STATUS_INPUT,
-        .sreg = PMBUS_STATUS_INPUT,
-        .gbit = PB_STATUS_INPUT,
-        .limit = iin_limit_attrs,
-        .nlimit = 0,
-    }, {
-        .reg = PMBUS_READ_IOUT,
-        .class = PSC_CURRENT_OUT,
-        .label = "iout",
-        .paged = true,
-        .func = PMBUS_HAVE_IOUT,
-        .sfunc = PMBUS_HAVE_STATUS_IOUT,
-        .sreg = PMBUS_STATUS_IOUT,
-        .gbit = PB_STATUS_IOUT_OC,
-        .limit = iout_limit_attrs,
-        .nlimit = 0,
-    }
-};
-
-/* Power attributes */
-
-static const struct pmbus_limit_attr pin_limit_attrs[] = {
-    {
-        .reg = PMBUS_PIN_OP_WARN_LIMIT,
-        .attr = "max",
-        .alarm = "alarm",
-        .sbit = PB_PIN_OP_WARNING,
-    }, {
-        .reg = PMBUS_VIRT_READ_PIN_AVG,
-        .update = true,
-        .attr = "average",
-    }, {
-        .reg = PMBUS_VIRT_READ_PIN_MIN,
-        .update = true,
-        .attr = "input_lowest",
-    }, {
-        .reg = PMBUS_VIRT_READ_PIN_MAX,
-        .update = true,
-        .attr = "input_highest",
-    }, {
-        .reg = PMBUS_VIRT_RESET_PIN_HISTORY,
-        .attr = "reset_history",
-    }, {
-        .reg = PMBUS_MFR_PIN_MAX,
-        .attr = "rated_max",
-    },
-};
-
-static const struct pmbus_limit_attr pout_limit_attrs[] = {
-    {
-        .reg = PMBUS_POUT_MAX,
-        .attr = "cap",
-        .alarm = "cap_alarm",
-        .sbit = PB_POWER_LIMITING,
-    }, {
-        .reg = PMBUS_POUT_OP_WARN_LIMIT,
-        .attr = "max",
-        .alarm = "max_alarm",
-        .sbit = PB_POUT_OP_WARNING,
-    }, {
-        .reg = PMBUS_POUT_OP_FAULT_LIMIT,
-        .attr = "crit",
-        .alarm = "crit_alarm",
-        .sbit = PB_POUT_OP_FAULT,
-    }, {
-        .reg = PMBUS_VIRT_READ_POUT_AVG,
-        .update = true,
-        .attr = "average",
-    }, {
-        .reg = PMBUS_VIRT_READ_POUT_MIN,
-        .update = true,
-        .attr = "input_lowest",
-    }, {
-        .reg = PMBUS_VIRT_READ_POUT_MAX,
-        .update = true,
-        .attr = "input_highest",
-    }, {
-        .reg = PMBUS_VIRT_RESET_POUT_HISTORY,
-        .attr = "reset_history",
-    }, {
-        .reg = PMBUS_MFR_POUT_MAX,
-        .attr = "rated_max",
-    },
-};
-
-static const struct pmbus_sensor_attr power_attributes[] = {
-    {
-        .reg = PMBUS_READ_PIN,
-        .class = PSC_POWER,
-        .label = "pin",
-        .func = PMBUS_HAVE_PIN,
-        .sfunc = PMBUS_HAVE_STATUS_INPUT,
-        .sreg = PMBUS_STATUS_INPUT,
-        .gbit = PB_STATUS_INPUT,
-        .limit = pin_limit_attrs,
-        .nlimit = 0,
-    }, {
-        .reg = PMBUS_READ_POUT,
-        .class = PSC_POWER,
-        .label = "pout",
-        .paged = true,
-        .func = PMBUS_HAVE_POUT,
-        .sfunc = PMBUS_HAVE_STATUS_IOUT,
-        .sreg = PMBUS_STATUS_IOUT,
-        .limit = pout_limit_attrs,
-        .nlimit = 0,
-    }
-};
-
-/* Temperature atributes */
-
-static const struct pmbus_limit_attr temp_limit_attrs[] = {
-    {
-        .reg = PMBUS_UT_WARN_LIMIT,
-        .low = true,
-        .attr = "min",
-        .alarm = "min_alarm",
-        .sbit = PB_TEMP_UT_WARNING,
-    }, {
-        .reg = PMBUS_UT_FAULT_LIMIT,
-        .low = true,
-        .attr = "lcrit",
-        .alarm = "lcrit_alarm",
-        .sbit = PB_TEMP_UT_FAULT,
-    }, {
-        .reg = PMBUS_OT_WARN_LIMIT,
-        .attr = "max",
-        .alarm = "max_alarm",
-        .sbit = PB_TEMP_OT_WARNING,
-    }, {
-        .reg = PMBUS_OT_FAULT_LIMIT,
-        .attr = "crit",
-        .alarm = "crit_alarm",
-        .sbit = PB_TEMP_OT_FAULT,
-    }, {
-        .reg = PMBUS_VIRT_READ_TEMP_MIN,
-        .attr = "lowest",
-    }, {
-        .reg = PMBUS_VIRT_READ_TEMP_AVG,
-        .attr = "average",
-    }, {
-        .reg = PMBUS_VIRT_READ_TEMP_MAX,
-        .attr = "highest",
-    }, {
-        .reg = PMBUS_VIRT_RESET_TEMP_HISTORY,
-        .attr = "reset_history",
-    }, {
-        .reg = PMBUS_MFR_MAX_TEMP_1,
-        .attr = "rated_max",
-    },
-};
-
-static const struct pmbus_limit_attr temp_limit_attrs2[] = {
-    {
-        .reg = PMBUS_UT_WARN_LIMIT,
-        .low = true,
-        .attr = "min",
-        .alarm = "min_alarm",
-        .sbit = PB_TEMP_UT_WARNING,
-    }, {
-        .reg = PMBUS_UT_FAULT_LIMIT,
-        .low = true,
-        .attr = "lcrit",
-        .alarm = "lcrit_alarm",
-        .sbit = PB_TEMP_UT_FAULT,
-    }, {
-        .reg = PMBUS_OT_WARN_LIMIT,
-        .attr = "max",
-        .alarm = "max_alarm",
-        .sbit = PB_TEMP_OT_WARNING,
-    }, {
-        .reg = PMBUS_OT_FAULT_LIMIT,
-        .attr = "crit",
-        .alarm = "crit_alarm",
-        .sbit = PB_TEMP_OT_FAULT,
-    }, {
-        .reg = PMBUS_VIRT_READ_TEMP2_MIN,
-        .attr = "lowest",
-    }, {
-        .reg = PMBUS_VIRT_READ_TEMP2_AVG,
-        .attr = "average",
-    }, {
-        .reg = PMBUS_VIRT_READ_TEMP2_MAX,
-        .attr = "highest",
-    }, {
-        .reg = PMBUS_VIRT_RESET_TEMP2_HISTORY,
-        .attr = "reset_history",
-    }, {
-        .reg = PMBUS_MFR_MAX_TEMP_2,
-        .attr = "rated_max",
-    },
-};
-
-static const struct pmbus_limit_attr temp_limit_attrs3[] = {
-    {
-        .reg = PMBUS_UT_WARN_LIMIT,
-        .low = true,
-        .attr = "min",
-        .alarm = "min_alarm",
-        .sbit = PB_TEMP_UT_WARNING,
-    }, {
-        .reg = PMBUS_UT_FAULT_LIMIT,
-        .low = true,
-        .attr = "lcrit",
-        .alarm = "lcrit_alarm",
-        .sbit = PB_TEMP_UT_FAULT,
-    }, {
-        .reg = PMBUS_OT_WARN_LIMIT,
-        .attr = "max",
-        .alarm = "max_alarm",
-        .sbit = PB_TEMP_OT_WARNING,
-    }, {
-        .reg = PMBUS_OT_FAULT_LIMIT,
-        .attr = "crit",
-        .alarm = "crit_alarm",
-        .sbit = PB_TEMP_OT_FAULT,
-    }, {
-        .reg = PMBUS_MFR_MAX_TEMP_3,
-        .attr = "rated_max",
-    },
-};
-
-static const struct pmbus_sensor_attr temp_attributes[] = {
-    {
-        .reg = PMBUS_READ_TEMPERATURE_1,
-        .class = PSC_TEMPERATURE,
-        .paged = true,
-        .update = true,
-        .compare = true,
-        .func = PMBUS_HAVE_TEMP,
-        .sfunc = PMBUS_HAVE_STATUS_TEMP,
-        .sreg = PMBUS_STATUS_TEMPERATURE,
-        .gbit = PB_STATUS_TEMPERATURE,
-        .limit = temp_limit_attrs,
-        .nlimit = 0,
-    }, {
-        .reg = PMBUS_READ_TEMPERATURE_2,
-        .class = PSC_TEMPERATURE,
-        .paged = true,
-        .update = true,
-        .compare = true,
-        .func = PMBUS_HAVE_TEMP2,
-        .sfunc = PMBUS_HAVE_STATUS_TEMP,
-        .sreg = PMBUS_STATUS_TEMPERATURE,
-        .gbit = PB_STATUS_TEMPERATURE,
-        .limit = temp_limit_attrs2,
-        .nlimit = 0,
-    }, {
-        .reg = PMBUS_READ_TEMPERATURE_3,
-        .class = PSC_TEMPERATURE,
-        .paged = true,
-        .update = true,
-        .compare = true,
-        .func = PMBUS_HAVE_TEMP3,
-        .sfunc = PMBUS_HAVE_STATUS_TEMP,
-        .sreg = PMBUS_STATUS_TEMPERATURE,
-        .gbit = PB_STATUS_TEMPERATURE,
-        .limit = temp_limit_attrs3,
-        .nlimit = 0,
-    }
-};
-
-static const int pmbus_fan_registers[] = {
-    PMBUS_READ_FAN_SPEED_1,
-    PMBUS_READ_FAN_SPEED_2,
-    PMBUS_READ_FAN_SPEED_3,
-    PMBUS_READ_FAN_SPEED_4
-};
-
-static const int pmbus_fan_status_registers[] = {
-    PMBUS_STATUS_FAN_12,
-    PMBUS_STATUS_FAN_12,
-    PMBUS_STATUS_FAN_34,
-    PMBUS_STATUS_FAN_34
-};
-
-static const u32 pmbus_fan_flags[] = {
-    PMBUS_HAVE_FAN12,
-    PMBUS_HAVE_FAN12,
-    PMBUS_HAVE_FAN34,
-    PMBUS_HAVE_FAN34
-};
-
-static const u32 pmbus_fan_status_flags[] = {
-    PMBUS_HAVE_STATUS_FAN12,
-    PMBUS_HAVE_STATUS_FAN12,
-    PMBUS_HAVE_STATUS_FAN34,
-    PMBUS_HAVE_STATUS_FAN34
-};
-
-/* Fans */
-
-/* Precondition: FAN_CONFIG_x_y and FAN_COMMAND_x must exist for the fan ID */
-static int pmbus_add_fan_ctrl(struct i2c_client *client,
-        struct pmbus_data *data, int index, int page, int id,
-        u8 config)
-{
-    struct pmbus_sensor *sensor;
-
-    sensor = pmbus_add_sensor(data, "fan", "target", index, page,
-                  0xff, PMBUS_VIRT_FAN_TARGET_1 + id, PSC_FAN,
-                  false, false, true);
-
-    if (!sensor)
-        return -ENOMEM;
-
-    if (!((data->info->func[page] & PMBUS_HAVE_PWM12) ||
-            (data->info->func[page] & PMBUS_HAVE_PWM34)))
-        return 0;
-
-    sensor = pmbus_add_sensor(data, "pwm", NULL, index, page,
-                  0xff, PMBUS_VIRT_PWM_1 + id, PSC_PWM,
-                  false, false, true);
-
-    if (!sensor)
-        return -ENOMEM;
-
-    sensor = pmbus_add_sensor(data, "pwm", "enable", index, page,
-                  0xff, PMBUS_VIRT_PWM_ENABLE_1 + id, PSC_PWM,
-                  true, false, false);
-
-    if (!sensor)
-        return -ENOMEM;
-
-    return 0;
-}
-
-static int pmbus_add_fan_attributes(struct i2c_client *client,
-                    struct pmbus_data *data)
-{
-    const struct pmbus_driver_info *info = data->info;
-    int index = 1;
-    int page;
-    int ret;
-
-    for (page = 0; page < info->pages; page++) {
-        int f;
-
-        for (f = 0; f < ARRAY_SIZE(pmbus_fan_registers); f++) {
-            int regval;
-
-            if (!(info->func[page] & pmbus_fan_flags[f]))
-                break;
-
-            if (!wb_pmbus_check_word_register(client, page,
-                               pmbus_fan_registers[f]))
-                break;
-
-            /*
-             * Skip fan if not installed.
-             * Each fan configuration register covers multiple fans,
-             * so we have to do some magic.
-             */
-            regval = _pmbus_read_byte_data(client, page,
-                pmbus_fan_config_registers[f]);
-            if (regval < 0 ||
-                (!(regval & (PB_FAN_1_INSTALLED >> ((f & 1) * 4)))))
-                continue;
-
-            if (pmbus_add_sensor(data, "fan", "input", index,
-                         page, 0xff, pmbus_fan_registers[f],
-                         PSC_FAN, true, true, true) == NULL)
-                return -ENOMEM;
-
-            /* Fan control */
-            if (wb_pmbus_check_word_register(client, page,
-                    pmbus_fan_command_registers[f])) {
-                ret = pmbus_add_fan_ctrl(client, data, index,
-                             page, f, regval);
-                if (ret < 0)
-                    return ret;
-            }
-
-            /*
-             * Each fan status register covers multiple fans,
-             * so we have to do some magic.
-             */
-            if ((info->func[page] & pmbus_fan_status_flags[f]) &&
-                wb_pmbus_check_byte_register(client,
-                    page, pmbus_fan_status_registers[f])) {
-                int reg;
-
-                if (f > 1)    /* fan 3, 4 */
-                    reg = PMBUS_STATUS_FAN_34;
-                else
-                    reg = PMBUS_STATUS_FAN_12;
-                ret = pmbus_add_boolean(data, "fan",
-                    "alarm", index, NULL, NULL, page, reg,
-                    PB_FAN_FAN1_WARNING >> (f & 1));
-                if (ret)
-                    return ret;
-                ret = pmbus_add_boolean(data, "fan",
-                    "fault", index, NULL, NULL, page, reg,
-                    PB_FAN_FAN1_FAULT >> (f & 1));
-                if (ret)
-                    return ret;
-            }
-            index++;
-        }
-    }
-    return 0;
-}
-
-struct pmbus_samples_attr {
-    int reg;
-    char *name;
-};
-
-struct pmbus_samples_reg {
-    int page;
-    struct pmbus_samples_attr *attr;
-    struct device_attribute dev_attr;
-};
-
-static struct pmbus_samples_attr pmbus_samples_registers[] = {
-    {
-        .reg = PMBUS_VIRT_SAMPLES,
-        .name = "samples",
-    }, {
-        .reg = PMBUS_VIRT_IN_SAMPLES,
-        .name = "in_samples",
-    }, {
-        .reg = PMBUS_VIRT_CURR_SAMPLES,
-        .name = "curr_samples",
-    }, {
-        .reg = PMBUS_VIRT_POWER_SAMPLES,
-        .name = "power_samples",
-    }, {
-        .reg = PMBUS_VIRT_TEMP_SAMPLES,
-        .name = "temp_samples",
-    }
-};
-
-#define to_samples_reg(x) container_of(x, struct pmbus_samples_reg, dev_attr)
-
-static ssize_t pmbus_show_samples(struct device *dev,
-                  struct device_attribute *devattr, char *buf)
-{
-    int val;
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct pmbus_samples_reg *reg = to_samples_reg(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    mutex_lock(&data->update_lock);
-    val = _pmbus_read_word_data(client, reg->page, 0xff, reg->attr->reg);
-    mutex_unlock(&data->update_lock);
-    if (val < 0)
-        return val;
-
-    return snprintf(buf, PAGE_SIZE, "%d\n", val);
-}
-
-static ssize_t pmbus_set_samples(struct device *dev,
-                 struct device_attribute *devattr,
-                 const char *buf, size_t count)
-{
-    int ret;
-    long val;
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct pmbus_samples_reg *reg = to_samples_reg(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    if (kstrtol(buf, 0, &val) < 0)
-        return -EINVAL;
-
-    mutex_lock(&data->update_lock);
-    ret = _pmbus_write_word_data(client, reg->page, reg->attr->reg, val);
-    mutex_unlock(&data->update_lock);
-
-    return ret ? : count;
-}
-
-static int pmbus_add_samples_attr(struct pmbus_data *data, int page,
-                  struct pmbus_samples_attr *attr)
-{
-    struct pmbus_samples_reg *reg;
-
-    reg = devm_kzalloc(data->dev, sizeof(*reg), GFP_KERNEL);
-    if (!reg)
-        return -ENOMEM;
-
-    reg->attr = attr;
-    reg->page = page;
-
-    pmbus_dev_attr_init(&reg->dev_attr, attr->name, 0644,
-                pmbus_show_samples, pmbus_set_samples);
-
-    return pmbus_add_attribute(data, &reg->dev_attr.attr);
-}
-
-static int pmbus_add_samples_attributes(struct i2c_client *client,
-                    struct pmbus_data *data)
-{
-    const struct pmbus_driver_info *info = data->info;
-    int s;
-
-    if (!(info->func[0] & PMBUS_HAVE_SAMPLES))
-        return 0;
-
-    for (s = 0; s < ARRAY_SIZE(pmbus_samples_registers); s++) {
-        struct pmbus_samples_attr *attr;
-        int ret;
-
-        attr = &pmbus_samples_registers[s];
-        if (!wb_pmbus_check_word_register(client, 0, attr->reg))
-            continue;
-
-        ret = pmbus_add_samples_attr(data, 0, attr);
-        if (ret)
-            return ret;
-    }
-
-    return 0;
-}
-
-static int pmbus_find_attributes(struct i2c_client *client,
-                 struct pmbus_data *data)
-{
-    int ret;
-
-    /* Voltage sensors */
-    ret = pmbus_add_sensor_attrs(client, data, "in", voltage_attributes,
-                     ARRAY_SIZE(voltage_attributes));
-    if (ret)
-        return ret;
-
-    /* Current sensors */
-    ret = pmbus_add_sensor_attrs(client, data, "curr", current_attributes,
-                     ARRAY_SIZE(current_attributes));
-    if (ret)
-        return ret;
-
-    /* Power sensors */
-    ret = pmbus_add_sensor_attrs(client, data, "power", power_attributes,
-                     ARRAY_SIZE(power_attributes));
-    if (ret)
-        return ret;
-
-    /* Temperature sensors */
-    ret = pmbus_add_sensor_attrs(client, data, "temp", temp_attributes,
-                     ARRAY_SIZE(temp_attributes));
-    if (ret)
-        return ret;
-
-    /* Fans */
-    ret = pmbus_add_fan_attributes(client, data);
-    if (ret)
-        return ret;
-
-    ret = pmbus_add_samples_attributes(client, data);
-    return ret;
-}
-
-/*
- * Identify chip parameters.
- * This function is called for all chips.
- */
-static int pmbus_identify_common(struct i2c_client *client,
-                 struct pmbus_data *data, int page)
-{
-    int vout_mode = -1;
-
-    if (wb_pmbus_check_byte_register(client, page, PMBUS_VOUT_MODE))
-        vout_mode = _pmbus_read_byte_data(client, page,
-                          PMBUS_VOUT_MODE);
-    if (vout_mode >= 0 && vout_mode != 0xff) {
-        /*
-         * Not all chips support the VOUT_MODE command,
-         * so a failure to read it is not an error.
-         */
-        switch (vout_mode >> 5) {
-        case 0:    /* linear mode      */
-            if (data->info->format[PSC_VOLTAGE_OUT] != linear)
-                return -ENODEV;
-
-            data->exponent[page] = ((s8)(vout_mode << 3)) >> 3;
-            break;
-        case 1: /* VID mode         */
-            if (data->info->format[PSC_VOLTAGE_OUT] != vid)
-                return -ENODEV;
-            break;
-        case 2:    /* direct mode      */
-            if (data->info->format[PSC_VOLTAGE_OUT] != direct)
-                return -ENODEV;
-            break;
-        default:
-            return -ENODEV;
-        }
-    }
-
-    pmbus_clear_fault_page(client, page);
-    return 0;
-}
-
-static int pmbus_init_common(struct i2c_client *client, struct pmbus_data *data,
-                 struct pmbus_driver_info *info)
-{
-    struct device *dev = &client->dev;
-    int page, ret, i;
-
-    /*
-     * Some PMBus chips don't support PMBUS_STATUS_WORD, so try
-     * to use PMBUS_STATUS_BYTE instead if that is the case.
-     * Bail out if both registers are not supported.
-     */
-    for(i = 0; i < PMBUS_RETRY_TIME; i++) {
-        data->read_status = pmbus_read_status_word;
-        ret = i2c_smbus_read_word_data(client, PMBUS_STATUS_WORD);
-        if (ret < 0 || ret == 0xffff) {
-            data->read_status = pmbus_read_status_byte;
-            ret = i2c_smbus_read_byte_data(client, PMBUS_STATUS_BYTE);
-            if (ret < 0 || ret == 0xff) {
-                usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
-                continue;
-            }
-        } else {
-            data->has_status_word = true;
-        }
-        break;
-    }
-
-    if(i == PMBUS_RETRY_TIME) {
-        dev_err(dev, "PMBus status register not found\n");
-        return -ENODEV;
-    }
-
-    /* Enable PEC if the controller supports it */
-    for(i = 0; i < PMBUS_RETRY_TIME; i++) {
-        ret = i2c_smbus_read_byte_data(client, PMBUS_CAPABILITY);
-        if (ret >= 0) {
-            break;
-        }
-        usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
-    }
-
-    if (ret >= 0 && (ret & PB_CAPABILITY_ERROR_CHECK))
-        client->flags |= I2C_CLIENT_PEC;
-
-    /*
-     * Check if the chip is write protected. If it is, we can not clear
-     * faults, and we should not try it. Also, in that case, writes into
-     * limit registers need to be disabled.
-     */
-    for(i = 0; i < PMBUS_RETRY_TIME; i++) {
-        ret = i2c_smbus_read_byte_data(client, PMBUS_WRITE_PROTECT);
-        if (ret >= 0) {
-            break;
-        }
-        usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
-    }
-
-    if (ret > 0 && (ret & PB_WP_ANY))
-        data->flags |= PMBUS_WRITE_PROTECTED | PMBUS_SKIP_STATUS_CHECK;
-
-    if (data->info->pages)
-        wb_pmbus_clear_faults(client);
-    else
-        pmbus_clear_fault_page(client, -1);
-
-    if (info->identify) {
-        ret = (*info->identify)(client, info);
-        if (ret < 0) {
-            dev_err(dev, "Chip identification failed\n");
-            return ret;
-        }
-    }
-
-    if (info->pages <= 0 || info->pages > PMBUS_PAGES) {
-        dev_err(dev, "Bad number of PMBus pages: %d\n", info->pages);
-        return -ENODEV;
-    }
-
-    for (page = 0; page < info->pages; page++) {
-        ret = pmbus_identify_common(client, data, page);
-        if (ret < 0) {
-            dev_err(dev, "Failed to identify chip capabilities\n");
-            return ret;
-        }
-    }
-    return 0;
-}
-
-#if IS_ENABLED(CONFIG_REGULATOR)
-static int pmbus_regulator_is_enabled(struct regulator_dev *rdev)
-{
-    struct device *dev = rdev_get_dev(rdev);
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    u8 page = rdev_get_id(rdev);
-    int ret;
-
-    ret = wb_pmbus_read_byte_data(client, page, PMBUS_OPERATION);
-    if (ret < 0)
-        return ret;
-
-    return !!(ret & PB_OPERATION_CONTROL_ON);
-}
-
-static int _pmbus_regulator_on_off(struct regulator_dev *rdev, bool enable)
-{
-    struct device *dev = rdev_get_dev(rdev);
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    u8 page = rdev_get_id(rdev);
-
-    return wb_pmbus_update_byte_data(client, page, PMBUS_OPERATION,
-                      PB_OPERATION_CONTROL_ON,
-                      enable ? PB_OPERATION_CONTROL_ON : 0);
-}
-
-static int pmbus_regulator_enable(struct regulator_dev *rdev)
-{
-    return _pmbus_regulator_on_off(rdev, 1);
-}
-
-static int pmbus_regulator_disable(struct regulator_dev *rdev)
-{
-    return _pmbus_regulator_on_off(rdev, 0);
-}
-
-const struct regulator_ops wb_pmbus_regulator_ops = {
-    .enable = pmbus_regulator_enable,
-    .disable = pmbus_regulator_disable,
-    .is_enabled = pmbus_regulator_is_enabled,
-};
-EXPORT_SYMBOL_GPL(wb_pmbus_regulator_ops);
-
-static int pmbus_regulator_register(struct pmbus_data *data)
-{
-    struct device *dev = data->dev;
-    const struct pmbus_driver_info *info = data->info;
-    const struct pmbus_platform_data *pdata = dev_get_platdata(dev);
-    struct regulator_dev *rdev;
-    int i;
-
-    for (i = 0; i < info->num_regulators; i++) {
-        struct regulator_config config = { };
-
-        config.dev = dev;
-        config.driver_data = data;
-
-        if (pdata && pdata->reg_init_data)
-            config.init_data = &pdata->reg_init_data[i];
-
-        rdev = devm_regulator_register(dev, &info->reg_desc[i],
-                           &config);
-        if (IS_ERR(rdev)) {
-            dev_err(dev, "Failed to register %s regulator\n",
-                info->reg_desc[i].name);
-            return PTR_ERR(rdev);
-        }
-    }
-
-    return 0;
-}
-#else
-static int pmbus_regulator_register(struct pmbus_data *data)
-{
-    return 0;
-}
-#endif
-
-static struct dentry *pmbus_debugfs_dir;    /* pmbus debugfs directory */
-
-#if IS_ENABLED(CONFIG_DEBUG_FS)
-static int pmbus_debugfs_get(void *data, u64 *val)
-{
-    int rc;
-    struct pmbus_debugfs_entry *entry = data;
-
-    rc = _pmbus_read_byte_data(entry->client, entry->page, entry->reg);
-    if (rc < 0)
-        return rc;
-
-    *val = rc;
-
-    return 0;
-}
-DEFINE_DEBUGFS_ATTRIBUTE(pmbus_debugfs_ops, pmbus_debugfs_get, NULL,
-             "0x%02llx\n");
-
-static int pmbus_debugfs_get_status(void *data, u64 *val)
-{
-    int rc;
-    struct pmbus_debugfs_entry *entry = data;
-    struct pmbus_data *pdata = i2c_get_clientdata(entry->client);
-
-    rc = pdata->read_status(entry->client, entry->page);
-    if (rc < 0)
-        return rc;
-
-    *val = rc;
-
-    return 0;
-}
-DEFINE_DEBUGFS_ATTRIBUTE(pmbus_debugfs_ops_status, pmbus_debugfs_get_status,
-             NULL, "0x%04llx\n");
-
-static int pmbus_debugfs_get_pec(void *data, u64 *val)
-{
-    struct i2c_client *client = data;
-
-    *val = !!(client->flags & I2C_CLIENT_PEC);
-
-    return 0;
-}
-
-static int pmbus_debugfs_set_pec(void *data, u64 val)
-{
-    int rc;
-    struct i2c_client *client = data;
-
-    if (!val) {
-        client->flags &= ~I2C_CLIENT_PEC;
-        return 0;
-    }
-
-    if (val != 1)
-        return -EINVAL;
-
-    rc = i2c_smbus_read_byte_data(client, PMBUS_CAPABILITY);
-    if (rc < 0)
-        return rc;
-
-    if (!(rc & PB_CAPABILITY_ERROR_CHECK))
-        return -EOPNOTSUPP;
-
-    client->flags |= I2C_CLIENT_PEC;
-
-    return 0;
-}
-DEFINE_DEBUGFS_ATTRIBUTE(pmbus_debugfs_ops_pec, pmbus_debugfs_get_pec,
-             pmbus_debugfs_set_pec, "%llu\n");
-
-static int pmbus_init_debugfs(struct i2c_client *client,
-                  struct pmbus_data *data)
-{
-    int i, idx = 0;
-    char name[PMBUS_NAME_SIZE];
-    struct pmbus_debugfs_entry *entries;
-
-    if (!pmbus_debugfs_dir)
-        return -ENODEV;
-
-    /*
-     * Create the debugfs directory for this device. Use the hwmon device
-     * name to avoid conflicts (hwmon numbers are globally unique).
-     */
-    data->debugfs = debugfs_create_dir(dev_name(data->hwmon_dev),
-                       pmbus_debugfs_dir);
-    if (IS_ERR_OR_NULL(data->debugfs)) {
-        data->debugfs = NULL;
-        return -ENODEV;
-    }
-
-    /* Allocate the max possible entries we need. */
-    entries = devm_kcalloc(data->dev,
-                   data->info->pages * 10, sizeof(*entries),
-                   GFP_KERNEL);
-    if (!entries)
-        return -ENOMEM;
-
-    debugfs_create_file("pec", 0664, data->debugfs, client,
-                &pmbus_debugfs_ops_pec);
-
-    for (i = 0; i < data->info->pages; ++i) {
-        /* Check accessibility of status register if it's not page 0 */
-        if (!i || pmbus_check_status_register(client, i)) {
-            /* No need to set reg as we have special read op. */
-            entries[idx].client = client;
-            entries[idx].page = i;
-            scnprintf(name, PMBUS_NAME_SIZE, "status%d", i);
-            debugfs_create_file(name, 0444, data->debugfs,
-                        &entries[idx++],
-                        &pmbus_debugfs_ops_status);
-        }
-
-        if (data->info->func[i] & PMBUS_HAVE_STATUS_VOUT) {
-            entries[idx].client = client;
-            entries[idx].page = i;
-            entries[idx].reg = PMBUS_STATUS_VOUT;
-            scnprintf(name, PMBUS_NAME_SIZE, "status%d_vout", i);
-            debugfs_create_file(name, 0444, data->debugfs,
-                        &entries[idx++],
-                        &pmbus_debugfs_ops);
-        }
-
-        if (data->info->func[i] & PMBUS_HAVE_STATUS_IOUT) {
-            entries[idx].client = client;
-            entries[idx].page = i;
-            entries[idx].reg = PMBUS_STATUS_IOUT;
-            scnprintf(name, PMBUS_NAME_SIZE, "status%d_iout", i);
-            debugfs_create_file(name, 0444, data->debugfs,
-                        &entries[idx++],
-                        &pmbus_debugfs_ops);
-        }
-
-        if (data->info->func[i] & PMBUS_HAVE_STATUS_INPUT) {
-            entries[idx].client = client;
-            entries[idx].page = i;
-            entries[idx].reg = PMBUS_STATUS_INPUT;
-            scnprintf(name, PMBUS_NAME_SIZE, "status%d_input", i);
-            debugfs_create_file(name, 0444, data->debugfs,
-                        &entries[idx++],
-                        &pmbus_debugfs_ops);
-        }
-
-        if (data->info->func[i] & PMBUS_HAVE_STATUS_TEMP) {
-            entries[idx].client = client;
-            entries[idx].page = i;
-            entries[idx].reg = PMBUS_STATUS_TEMPERATURE;
-            scnprintf(name, PMBUS_NAME_SIZE, "status%d_temp", i);
-            debugfs_create_file(name, 0444, data->debugfs,
-                        &entries[idx++],
-                        &pmbus_debugfs_ops);
-        }
-
-        if (wb_pmbus_check_byte_register(client, i, PMBUS_STATUS_CML)) {
-            entries[idx].client = client;
-            entries[idx].page = i;
-            entries[idx].reg = PMBUS_STATUS_CML;
-            scnprintf(name, PMBUS_NAME_SIZE, "status%d_cml", i);
-            debugfs_create_file(name, 0444, data->debugfs,
-                        &entries[idx++],
-                        &pmbus_debugfs_ops);
-        }
-
-        if (wb_pmbus_check_byte_register(client, i, PMBUS_STATUS_OTHER)) {
-            entries[idx].client = client;
-            entries[idx].page = i;
-            entries[idx].reg = PMBUS_STATUS_OTHER;
-            scnprintf(name, PMBUS_NAME_SIZE, "status%d_other", i);
-            debugfs_create_file(name, 0444, data->debugfs,
-                        &entries[idx++],
-                        &pmbus_debugfs_ops);
-        }
-
-        if (wb_pmbus_check_byte_register(client, i,
-                          PMBUS_STATUS_MFR_SPECIFIC)) {
-            entries[idx].client = client;
-            entries[idx].page = i;
-            entries[idx].reg = PMBUS_STATUS_MFR_SPECIFIC;
-            scnprintf(name, PMBUS_NAME_SIZE, "status%d_mfr", i);
-            debugfs_create_file(name, 0444, data->debugfs,
-                        &entries[idx++],
-                        &pmbus_debugfs_ops);
-        }
-
-        if (data->info->func[i] & PMBUS_HAVE_STATUS_FAN12) {
-            entries[idx].client = client;
-            entries[idx].page = i;
-            entries[idx].reg = PMBUS_STATUS_FAN_12;
-            scnprintf(name, PMBUS_NAME_SIZE, "status%d_fan12", i);
-            debugfs_create_file(name, 0444, data->debugfs,
-                        &entries[idx++],
-                        &pmbus_debugfs_ops);
-        }
-
-        if (data->info->func[i] & PMBUS_HAVE_STATUS_FAN34) {
-            entries[idx].client = client;
-            entries[idx].page = i;
-            entries[idx].reg = PMBUS_STATUS_FAN_34;
-            scnprintf(name, PMBUS_NAME_SIZE, "status%d_fan34", i);
-            debugfs_create_file(name, 0444, data->debugfs,
-                        &entries[idx++],
-                        &pmbus_debugfs_ops);
-        }
-    }
-
-    return 0;
-}
-#else
-static int pmbus_init_debugfs(struct i2c_client *client,
-                  struct pmbus_data *data)
-{
-    return 0;
-}
-#endif    /* IS_ENABLED(CONFIG_DEBUG_FS) */
-
-int wb_pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info)
-{
-    struct device *dev = &client->dev;
-    const struct pmbus_platform_data *pdata = dev_get_platdata(dev);
-    struct pmbus_data *data;
-    size_t groups_num = 0;
-    int ret;
-
-    if (!info)
-        return -ENODEV;
-
-    if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WRITE_BYTE
-                     | I2C_FUNC_SMBUS_BYTE_DATA
-                     | I2C_FUNC_SMBUS_WORD_DATA))
-        return -ENODEV;
-
-    data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
-    if (!data)
-        return -ENOMEM;
-
-    if (info->groups)
-        while (info->groups[groups_num])
-            groups_num++;
-
-    data->groups = devm_kcalloc(dev, groups_num + 2, sizeof(void *),
-                    GFP_KERNEL);
-    if (!data->groups)
-        return -ENOMEM;
-
-    i2c_set_clientdata(client, data);
-    mutex_init(&data->update_lock);
-    data->dev = dev;
-
-    if (pdata)
-        data->flags = pdata->flags;
-    data->info = info;
-    data->currpage = -1;
-    data->currphase = -1;
-
-    ret = pmbus_init_common(client, data, info);
-    if (ret < 0)
-        return ret;
-
-    ret = pmbus_find_attributes(client, data);
-    if (ret)
-        return ret;
-
-    /*
-     * If there are no attributes, something is wrong.
-     * Bail out instead of trying to register nothing.
-     */
-    if (!data->num_attributes) {
-        dev_err(dev, "No attributes found\n");
-        return -ENODEV;
-    }
-
-    data->groups[0] = &data->group;
-    memcpy(data->groups + 1, info->groups, sizeof(void *) * groups_num);
-    data->hwmon_dev = devm_hwmon_device_register_with_groups(dev,
-                    client->name, data, data->groups);
-    if (IS_ERR(data->hwmon_dev)) {
-        dev_err(dev, "Failed to register hwmon device\n");
-        return PTR_ERR(data->hwmon_dev);
-    }
-
-    ret = pmbus_regulator_register(data);
-    if (ret)
-        return ret;
-
-    ret = pmbus_init_debugfs(client, data);
-    if (ret)
-        dev_warn(dev, "Failed to register debugfs\n");
-
-    return 0;
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_do_probe);
-
-void wb_pmbus_do_remove(struct i2c_client *client)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    debugfs_remove_recursive(data->debugfs);
-
-    return;
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_do_remove);
-
-struct dentry *wb_pmbus_get_debugfs_dir(struct i2c_client *client)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    return data->debugfs;
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_get_debugfs_dir);
-
-static int __init pmbus_core_init(void)
-{
-    pmbus_debugfs_dir = debugfs_create_dir("pmbus", NULL);
-    if (IS_ERR(pmbus_debugfs_dir))
-        pmbus_debugfs_dir = NULL;
-
-    return 0;
-}
-
-static void __exit pmbus_core_exit(void)
-{
-    debugfs_remove_recursive(pmbus_debugfs_dir);
-}
-
-module_init(pmbus_core_init);
-module_exit(pmbus_core_exit);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("PMBus core driver");
-MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tmp401.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tmp401.c
deleted file mode 100644
index b8d3a024f624..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tmp401.c
+++ /dev/null
@@ -1,1010 +0,0 @@
-/* tmp401.c
- *
- * Copyright (C) 2007,2008 Hans de Goede <hdegoede@redhat.com>
- * Preliminary tmp411 support by:
- * Gabriel Konat, Sander Leget, Wouter Willems
- * Copyright (C) 2009 Andre Prendel <andre.prendel@gmx.de>
- *
- * Cleanup and support for TMP431 and TMP432 by Guenter Roeck
- * Copyright (c) 2013 Guenter Roeck <linux@roeck-us.net>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-/*
- * Driver for the Texas Instruments TMP401 SMBUS temperature sensor IC.
- *
- * Note this IC is in some aspect similar to the LM90, but it has quite a
- * few differences too, for example the local temp has a higher resolution
- * and thus has 16 bits registers for its value and limit instead of 8 bits.
- */
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/bitops.h>
-#include <linux/slab.h>
-#include <linux/jiffies.h>
-#include <linux/i2c.h>
-#include <linux/hwmon.h>
-#include <linux/hwmon-sysfs.h>
-#include <linux/err.h>
-#include <linux/mutex.h>
-#include <linux/sysfs.h>
-#include <linux/delay.h>
-
-/* Addresses to scan */
-/* static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4c, 0x4d,
-	0x4e, 0x4f, I2C_CLIENT_END }; */
-
-enum chips { tmp401, tmp411, tmp431, tmp432, tmp435, tmp461 };
-
-/*
- * The TMP401 registers, note some registers have different addresses for
- * reading and writing
- */
-#define TMP401_STATUS                   (0x02)
-#define TMP401_CONFIG_READ              (0x03)
-#define TMP401_CONFIG_WRITE             (0x09)
-#define TMP401_CONVERSION_RATE_READ     (0x04)
-#define TMP401_CONVERSION_RATE_WRITE    (0x0A)
-#define TMP401_TEMP_CRIT_HYST           (0x21)
-#define TMP401_MANUFACTURER_ID_REG      (0xFE)
-#define TMP401_DEVICE_ID_REG            (0xFF)
-#define TMP401_DEVICE_CAR_REG           (0x22) /* Consecutive Alert Register */
-
-static const u8 TMP401_TEMP_MSB_READ[7][2] = {
-	{ 0x00, 0x01 },	/* temp */
-	{ 0x06, 0x08 },	/* low limit */
-	{ 0x05, 0x07 },	/* high limit */
-	{ 0x20, 0x19 },	/* therm (crit) limit */
-	{ 0x30, 0x34 },	/* lowest */
-	{ 0x32, 0x36 },	/* highest */
-	{ 0, 0x11 },	/* offset */
-};
-
-static const u8 TMP401_TEMP_MSB_WRITE[7][2] = {
-	{ 0, 0 },	/* temp (unused) */
-	{ 0x0C, 0x0E },	/* low limit */
-	{ 0x0B, 0x0D },	/* high limit */
-	{ 0x20, 0x19 },	/* therm (crit) limit */
-	{ 0x30, 0x34 },	/* lowest */
-	{ 0x32, 0x36 },	/* highest */
-	{ 0, 0x11 },	/* offset */
-};
-
-static const u8 TMP401_TEMP_LSB[7][2] = {
-	{ 0x15, 0x10 },	/* temp */
-	{ 0x17, 0x14 },	/* low limit */
-	{ 0x16, 0x13 },	/* high limit */
-	{ 0, 0 },	/* therm (crit) limit (unused) */
-	{ 0x31, 0x35 },	/* lowest */
-	{ 0x33, 0x37 },	/* highest */
-	{ 0, 0x12 },	/* offset */
-};
-
-static const u8 TMP432_TEMP_MSB_READ[4][3] = {
-	{ 0x00, 0x01, 0x23 },	/* temp */
-	{ 0x06, 0x08, 0x16 },	/* low limit */
-	{ 0x05, 0x07, 0x15 },	/* high limit */
-	{ 0x20, 0x19, 0x1A },	/* therm (crit) limit */
-};
-
-static const u8 TMP432_TEMP_MSB_WRITE[4][3] = {
-	{ 0, 0, 0 },		/* temp  - unused */
-	{ 0x0C, 0x0E, 0x16 },	/* low limit */
-	{ 0x0B, 0x0D, 0x15 },	/* high limit */
-	{ 0x20, 0x19, 0x1A },	/* therm (crit) limit */
-};
-
-static const u8 TMP432_TEMP_LSB[3][3] = {
-	{ 0x29, 0x10, 0x24 },	/* temp */
-	{ 0x3E, 0x14, 0x18 },	/* low limit */
-	{ 0x3D, 0x13, 0x17 },	/* high limit */
-};
-
-/* [0] = fault, [1] = low, [2] = high, [3] = therm/crit */
-static const u8 TMP432_STATUS_REG[] = {
-	0x1b, 0x36, 0x35, 0x37 };
-
-/* Flags */
-#define TMP401_CONFIG_RANGE             BIT(2)
-#define TMP401_CONFIG_SHUTDOWN          BIT(6)
-#define TMP401_STATUS_LOCAL_CRIT        BIT(0)
-#define TMP401_STATUS_REMOTE_CRIT       BIT(1)
-#define TMP401_STATUS_REMOTE_OPEN       BIT(2)
-#define TMP401_STATUS_REMOTE_LOW        BIT(3)
-#define TMP401_STATUS_REMOTE_HIGH       BIT(4)
-#define TMP401_STATUS_LOCAL_LOW         BIT(5)
-#define TMP401_STATUS_LOCAL_HIGH        BIT(6)
-
-/* On TMP432, each status has its own register */
-#define TMP432_STATUS_LOCAL             BIT(0)
-#define TMP432_STATUS_REMOTE1           BIT(1)
-#define TMP432_STATUS_REMOTE2           BIT(2)
-
-/* Manufacturer / Device ID's */
-#define TMP401_MANUFACTURER_ID      (0x55)
-#define TMP401_DEVICE_ID            (0x11)
-#define TMP411A_DEVICE_ID           (0x12)
-#define TMP411B_DEVICE_ID           (0x13)
-#define TMP411C_DEVICE_ID           (0x10)
-#define TMP431_DEVICE_ID            (0x31)
-#define TMP432_DEVICE_ID            (0x32)
-#define TMP435_DEVICE_ID            (0x35)
-
-/* Timeout function bit */
-#define TIMEOUT_STATE_BIT                  (7)   /* 1:enable 0:disable */
-#define TIMEOUT_STATE_EN                   (1)   /* 1:enable  */
-#define TIMEOUT_STATE_IEN                  (0)   /* 0:disable */
-#define TIMEOUT_STATE_NA                   "NA"
-#define TMP401_TEMP_INVALID_RETRY_TIMES    (3)
-
-/* input temp threshold check */
-typedef struct tmp401_temp_threshold_s {
-    int chip_type;
-    int temp_max;
-    int temp_min;
-} tmp401_temp_threshold_t;
-
-static tmp401_temp_threshold_t g_tmp401_input_threshold_info[] = {
-    {
-        .chip_type = tmp411,
-        .temp_max = 127000,
-        .temp_min = -55000,
-    },
-};
-
-/*
- * Driver data (common to all clients)
- */
-
-static const struct i2c_device_id tmp401_id[] = {
-	{ "wb_tmp401", tmp401 },
-	{ "wb_tmp411", tmp411 },
-	{ "wb_tmp431", tmp431 },
-	{ "wb_tmp432", tmp432 },
-	{ "wb_tmp435", tmp435 },
-	{ "wb_tmp461", tmp461 },
-	{ }
-};
-MODULE_DEVICE_TABLE(i2c, tmp401_id);
-
-/*
- * Client data (each client gets its own)
- */
-
-struct tmp401_data {
-	struct i2c_client *client;
-	const struct attribute_group *groups[3];
-	struct mutex update_lock;
-	char valid; /* zero until following fields are valid */
-	unsigned long last_updated; /* in jiffies */
-	enum chips kind;
-
-	unsigned int update_interval;	/* in milliseconds */
-
-	/* register values */
-	u8 status[4];
-	u8 config;
-	u16 temp[7][3];
-	u8 temp_crit_hyst;
-};
-
-/*
- * Sysfs attr show / store functions
- */
-
-static int tmp401_register_to_temp(u16 reg, u8 config)
-{
-	int temp = reg;
-
-	if (config & TMP401_CONFIG_RANGE)
-		temp -= 64 * 256;
-
-	return DIV_ROUND_CLOSEST(temp * 125, 32);
-}
-
-static u16 tmp401_temp_to_register(long temp, u8 config, int zbits)
-{
-	if (config & TMP401_CONFIG_RANGE) {
-		temp = clamp_val(temp, -64000, 191000);
-		temp += 64000;
-	} else
-		temp = clamp_val(temp, 0, 127000);
-
-	return DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits;
-}
-
-static int tmp401_update_device_reg16(struct i2c_client *client,
-				      struct tmp401_data *data)
-{
-	int i, j, val;
-	int num_regs = data->kind == tmp411 ? 6 : 4;
-	int num_sensors = data->kind == tmp432 ? 3 : 2;
-
-	for (i = 0; i < num_sensors; i++) {		/* local / r1 / r2 */
-		for (j = 0; j < num_regs; j++) {	/* temp / low / ... */
-			u8 regaddr;
-			/*
-			 * High byte must be read first immediately followed
-			 * by the low byte
-			 */
-			regaddr = data->kind == tmp432 ?
-						TMP432_TEMP_MSB_READ[j][i] :
-						TMP401_TEMP_MSB_READ[j][i];
-			val = i2c_smbus_read_byte_data(client, regaddr);
-			if (val < 0)
-				return val;
-			data->temp[j][i] = val << 8;
-			if (j == 3)		/* crit is msb only */
-				continue;
-			regaddr = data->kind == tmp432 ? TMP432_TEMP_LSB[j][i]
-						       : TMP401_TEMP_LSB[j][i];
-			val = i2c_smbus_read_byte_data(client, regaddr);
-			if (val < 0)
-				return val;
-			data->temp[j][i] |= val;
-		}
-	}
-	return 0;
-}
-
-static struct tmp401_data *tmp401_update_device(struct device *dev)
-{
-	struct tmp401_data *data = dev_get_drvdata(dev);
-	struct i2c_client *client = data->client;
-	struct tmp401_data *ret = data;
-	int i, val;
-	unsigned long next_update;
-
-	mutex_lock(&data->update_lock);
-
-	next_update = data->last_updated +
-		      msecs_to_jiffies(data->update_interval);
-	if (time_after(jiffies, next_update) || !data->valid) {
-		if (data->kind != tmp432) {
-			/*
-			 * The driver uses the TMP432 status format internally.
-			 * Convert status to TMP432 format for other chips.
-			 */
-			val = i2c_smbus_read_byte_data(client, TMP401_STATUS);
-			if (val < 0) {
-				ret = ERR_PTR(val);
-				goto abort;
-			}
-			data->status[0] =
-			  (val & TMP401_STATUS_REMOTE_OPEN) >> 1;
-			data->status[1] =
-			  ((val & TMP401_STATUS_REMOTE_LOW) >> 2) |
-			  ((val & TMP401_STATUS_LOCAL_LOW) >> 5);
-			data->status[2] =
-			  ((val & TMP401_STATUS_REMOTE_HIGH) >> 3) |
-			  ((val & TMP401_STATUS_LOCAL_HIGH) >> 6);
-			data->status[3] = val & (TMP401_STATUS_LOCAL_CRIT
-						| TMP401_STATUS_REMOTE_CRIT);
-		} else {
-			for (i = 0; i < ARRAY_SIZE(data->status); i++) {
-				val = i2c_smbus_read_byte_data(client,
-							TMP432_STATUS_REG[i]);
-				if (val < 0) {
-					ret = ERR_PTR(val);
-					goto abort;
-				}
-				data->status[i] = val;
-			}
-		}
-
-		val = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
-		if (val < 0) {
-			ret = ERR_PTR(val);
-			goto abort;
-		}
-		data->config = val;
-		val = tmp401_update_device_reg16(client, data);
-		if (val < 0) {
-			ret = ERR_PTR(val);
-			goto abort;
-		}
-		val = i2c_smbus_read_byte_data(client, TMP401_TEMP_CRIT_HYST);
-		if (val < 0) {
-			ret = ERR_PTR(val);
-			goto abort;
-		}
-		data->temp_crit_hyst = val;
-
-		data->last_updated = jiffies;
-		data->valid = 1;
-	}
-
-abort:
-	mutex_unlock(&data->update_lock);
-	return ret;
-}
-
-static int tmp401_input_temp_check(struct tmp401_data *data, int input_val)
-{
-    int i, size;
-
-    size = ARRAY_SIZE(g_tmp401_input_threshold_info);
-
-    for (i = 0; i < size; i++) {
-        if (g_tmp401_input_threshold_info[i].chip_type == data->kind) {
-            if ((input_val > g_tmp401_input_threshold_info[i].temp_max)
-                    || (input_val < g_tmp401_input_threshold_info[i].temp_min)) {
-                dev_dbg(&data->client->dev, "input temp: %d not in range[%d, %d]\n",
-                    input_val, g_tmp401_input_threshold_info[i].temp_min,
-                    g_tmp401_input_threshold_info[i].temp_max);
-                return -EINVAL;
-            }
-            dev_dbg(&data->client->dev, "input temp: %d in range[%d, %d]", input_val,
-                g_tmp401_input_threshold_info[i].temp_min, g_tmp401_input_threshold_info[i].temp_max);
-            return 0;
-        }
-    }
-    return 0;
-}
-
-static ssize_t show_temp(struct device *dev, struct device_attribute *devattr, char *buf)
-{
-    int nr, index, i, value, ret;
-    struct tmp401_data *data;
-    struct i2c_client *client;
-
-    data = dev_get_drvdata(dev);
-    client = data->client;
-
-    nr = to_sensor_dev_attr_2(devattr)->nr;
-    index = to_sensor_dev_attr_2(devattr)->index;
-
-    for (i = 0; i < TMP401_TEMP_INVALID_RETRY_TIMES; i++) {
-        data = tmp401_update_device(dev);
-        if (IS_ERR(data)) {
-            return PTR_ERR(data);
-        }
-        value = tmp401_register_to_temp(data->temp[nr][index], data->config);
-        if (nr != 0) {  /* not input temp, return value */
-            return sprintf(buf, "%d\n", value);
-        }
-        /* nr == 0 is temp input, do input_temp_check */
-        ret = tmp401_input_temp_check(data, value);
-        if (ret == 0) { /* input temp check ok */
-           return sprintf(buf, "%d\n", value);
-        }
-        if ((i + 1) < TMP401_TEMP_INVALID_RETRY_TIMES) {
-            msleep(data->update_interval);
-        }
-    }
-    dev_info(&client->dev, "temp%d_input value: %d invalid\n", index + 1, value);
-    return -EINVAL;
-}
-
-static ssize_t show_temp_crit_hyst(struct device *dev,
-	struct device_attribute *devattr, char *buf)
-{
-	int temp, index = to_sensor_dev_attr(devattr)->index;
-	struct tmp401_data *data = tmp401_update_device(dev);
-
-	if (IS_ERR(data))
-		return PTR_ERR(data);
-
-	mutex_lock(&data->update_lock);
-	temp = tmp401_register_to_temp(data->temp[3][index], data->config);
-	temp -= data->temp_crit_hyst * 1000;
-	mutex_unlock(&data->update_lock);
-
-	return sprintf(buf, "%d\n", temp);
-}
-
-static ssize_t show_status(struct device *dev,
-	struct device_attribute *devattr, char *buf)
-{
-	int nr = to_sensor_dev_attr_2(devattr)->nr;
-	int mask = to_sensor_dev_attr_2(devattr)->index;
-	struct tmp401_data *data = tmp401_update_device(dev);
-
-	if (IS_ERR(data))
-		return PTR_ERR(data);
-
-	return sprintf(buf, "%d\n", !!(data->status[nr] & mask));
-}
-
-static ssize_t store_temp(struct device *dev, struct device_attribute *devattr,
-			  const char *buf, size_t count)
-{
-	int nr = to_sensor_dev_attr_2(devattr)->nr;
-	int index = to_sensor_dev_attr_2(devattr)->index;
-	struct tmp401_data *data = dev_get_drvdata(dev);
-	struct i2c_client *client = data->client;
-	long val;
-	u16 reg;
-	u8 regaddr;
-
-	if (kstrtol(buf, 10, &val))
-		return -EINVAL;
-
-	reg = tmp401_temp_to_register(val, data->config, nr == 3 ? 8 : 4);
-
-	mutex_lock(&data->update_lock);
-
-	regaddr = data->kind == tmp432 ? TMP432_TEMP_MSB_WRITE[nr][index]
-				       : TMP401_TEMP_MSB_WRITE[nr][index];
-	i2c_smbus_write_byte_data(client, regaddr, reg >> 8);
-	if (nr != 3) {
-		regaddr = data->kind == tmp432 ? TMP432_TEMP_LSB[nr][index]
-					       : TMP401_TEMP_LSB[nr][index];
-		i2c_smbus_write_byte_data(client, regaddr, reg & 0xFF);
-	}
-	data->temp[nr][index] = reg;
-
-	mutex_unlock(&data->update_lock);
-
-	return count;
-}
-
-static ssize_t store_temp_crit_hyst(struct device *dev, struct device_attribute
-	*devattr, const char *buf, size_t count)
-{
-	int temp, index = to_sensor_dev_attr(devattr)->index;
-	struct tmp401_data *data = tmp401_update_device(dev);
-	long val;
-	u8 reg;
-
-	if (IS_ERR(data))
-		return PTR_ERR(data);
-
-	if (kstrtol(buf, 10, &val))
-		return -EINVAL;
-
-	if (data->config & TMP401_CONFIG_RANGE)
-		val = clamp_val(val, -64000, 191000);
-	else
-		val = clamp_val(val, 0, 127000);
-
-	mutex_lock(&data->update_lock);
-	temp = tmp401_register_to_temp(data->temp[3][index], data->config);
-	val = clamp_val(val, temp - 255000, temp);
-	reg = ((temp - val) + 500) / 1000;
-
-	i2c_smbus_write_byte_data(data->client, TMP401_TEMP_CRIT_HYST,
-				  reg);
-
-	data->temp_crit_hyst = reg;
-
-	mutex_unlock(&data->update_lock);
-
-	return count;
-}
-
-/*
- * Resets the historical measurements of minimum and maximum temperatures.
- * This is done by writing any value to any of the minimum/maximum registers
- * (0x30-0x37).
- */
-static ssize_t reset_temp_history(struct device *dev,
-	struct device_attribute	*devattr, const char *buf, size_t count)
-{
-	struct tmp401_data *data = dev_get_drvdata(dev);
-	struct i2c_client *client = data->client;
-	long val;
-
-	if (kstrtol(buf, 10, &val))
-		return -EINVAL;
-
-	if (val != 1) {
-		dev_err(dev,
-			"temp_reset_history value %ld not supported. Use 1 to reset the history!\n",
-			val);
-		return -EINVAL;
-	}
-	mutex_lock(&data->update_lock);
-	i2c_smbus_write_byte_data(client, TMP401_TEMP_MSB_WRITE[5][0], val);
-	data->valid = 0;
-	mutex_unlock(&data->update_lock);
-
-	return count;
-}
-
-static ssize_t show_update_interval(struct device *dev,
-				    struct device_attribute *attr, char *buf)
-{
-	struct tmp401_data *data = dev_get_drvdata(dev);
-
-	return sprintf(buf, "%u\n", data->update_interval);
-}
-
-static ssize_t set_update_interval(struct device *dev,
-				   struct device_attribute *attr,
-				   const char *buf, size_t count)
-{
-	struct tmp401_data *data = dev_get_drvdata(dev);
-	struct i2c_client *client = data->client;
-	unsigned long val;
-	int err, rate;
-
-	err = kstrtoul(buf, 10, &val);
-	if (err)
-		return err;
-
-	/*
-	 * For valid rates, interval can be calculated as
-	 *	interval = (1 << (7 - rate)) * 125;
-	 * Rounded rate is therefore
-	 *	rate = 7 - __fls(interval * 4 / (125 * 3));
-	 * Use clamp_val() to avoid overflows, and to ensure valid input
-	 * for __fls.
-	 */
-	val = clamp_val(val, 125, 16000);
-	rate = 7 - __fls(val * 4 / (125 * 3));
-	mutex_lock(&data->update_lock);
-	i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, rate);
-	data->update_interval = (1 << (7 - rate)) * 125;
-	mutex_unlock(&data->update_lock);
-
-	return count;
-}
-
-/*
- * Enable/disable the state of the timeout function
- * @dev: device info
- * @state: 1:enable 0:disable
- */
-static int timeout_cfg(struct device *dev, int state)
-{
-    int rv, chip_type;
-    u8 reg_value;
-    struct tmp401_data *data;
-    struct i2c_client *client;
-
-    data = dev_get_drvdata(dev);
-    client = data->client;
-
-    /* get chip type */
-    chip_type = data->kind;
-    dev_dbg(&client->dev, "set timeout. chip:%d, state:%d\n", chip_type, state);
-
-    /* chip type check */
-    if(chip_type != tmp401 && chip_type != tmp411)  {
-        dev_info(&client->dev,
-            "Chip type: %d, not support timeout config.!\n", chip_type);
-        return -EPERM;
-    }
-
-    /* parameter check */
-    if(state != TIMEOUT_STATE_EN && state != TIMEOUT_STATE_IEN) {
-        dev_err(&client->dev,
-            "Parameter check error. state: %d not supported.!\n", state);
-        return -EINVAL;
-    }
-
-    mutex_lock(&data->update_lock);
-    /* read the Consecutive alert register */
-    reg_value = i2c_smbus_read_byte_data(client, TMP401_DEVICE_CAR_REG);
-    if (reg_value < 0) {
-        dev_err(&client->dev, "Failed to read. reg:0x%0x, value:%d\n", TMP401_DEVICE_CAR_REG, reg_value);
-        mutex_unlock(&data->update_lock);
-        return -EIO;
-    }
-    dev_dbg(&client->dev, "get register value. reg:0x%0x, value:0x%0x\n", TMP401_DEVICE_CAR_REG, reg_value);
-
-    /* same value case, do not write */
-    if((u8)state == (reg_value >> TIMEOUT_STATE_BIT)) {
-        mutex_unlock(&data->update_lock);
-        dev_info(&client->dev, "timeout config has been set and the current state is %d.\n", state);
-        return 0;
-    }
-
-    /* calculate the register value */
-    reg_value = (reg_value & ~(1 << TIMEOUT_STATE_BIT)) | (state << TIMEOUT_STATE_BIT);
-
-    /* set the Consecutive alert register */
-    dev_dbg(&client->dev, "set register value. reg:0x%0x, value:0x%0x\n", TMP401_DEVICE_CAR_REG, reg_value);
-    rv = i2c_smbus_write_byte_data(client, TMP401_DEVICE_CAR_REG, reg_value);
-    if (rv < 0) {
-        dev_err(&client->dev,
-            "set the register Error. reg:0x%0x, value:%d\n", TMP401_DEVICE_CAR_REG, reg_value);
-        mutex_unlock(&data->update_lock);
-        return -EIO;
-    }
-    mutex_unlock(&data->update_lock);
-
-    dev_info(&client->dev, "set bus timeout success. reg:0x%0x, value:0x%0x\n", TMP401_DEVICE_CAR_REG, reg_value);
-
-    return 0;
-}
-
-static ssize_t set_timeout_en(struct device *dev,
-                   struct device_attribute *attr,
-                   const char *buf, size_t count)
-{
-    int val, err;
-    struct i2c_client *client;
-    struct tmp401_data *data;
-
-    data = dev_get_drvdata(dev);
-    client = data->client;
-
-    err = kstrtoint(buf, 0, &val);
-    if (err) {
-        dev_err(&client->dev,
-            "kstrtoint error: %d.\n", err);
-        return err;
-    }
-
-    err = timeout_cfg(dev, val);
-    if(err < 0) {
-        dev_err(&client->dev,
-            "set bus timeout error: %d. value:%d!\n", err, val);
-        return err;
-    }
-
-    return count;
-}
-
-static ssize_t show_timeout_en(struct device *dev,
-    struct device_attribute *devattr, char *buf)
-{
-    int chip_type;
-    u8 reg_value;
-    struct tmp401_data *data;
-    struct i2c_client *client;
-
-    data = dev_get_drvdata(dev);
-    client = data->client;
-
-    /* get chip type */
-    chip_type = data->kind;
-    dev_dbg(&client->dev, "get timeout. chip:%d\n", chip_type);
-
-    /* chip type check */
-    if(chip_type != tmp401 && chip_type != tmp411)  {
-        dev_info(&client->dev,
-            "Chip type: %d, not support timeout config.!\n", chip_type);
-        /* not support, return NA */
-        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", TIMEOUT_STATE_NA);
-    }
-
-    /* read the Consecutive alert register */
-    reg_value = i2c_smbus_read_byte_data(client, TMP401_DEVICE_CAR_REG);
-    if (reg_value < 0) {
-        dev_err(&client->dev, "Failed to read. reg:0x%0x, value:%d\n", TMP401_DEVICE_CAR_REG, reg_value);
-        return -EIO;
-    }
-    dev_dbg(&client->dev, "get register value. reg:0x%0x, value:0x%0x\n", TMP401_DEVICE_CAR_REG, reg_value);
-
-    /* decode the register value */
-    reg_value = reg_value >> TIMEOUT_STATE_BIT;
-
-    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", reg_value);
-}
-
-static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
-static SENSOR_DEVICE_ATTR_2(temp1_min, S_IWUSR | S_IRUGO, show_temp,
-			    store_temp, 1, 0);
-static SENSOR_DEVICE_ATTR_2(temp1_max, S_IWUSR | S_IRUGO, show_temp,
-			    store_temp, 2, 0);
-static SENSOR_DEVICE_ATTR_2(temp1_crit, S_IWUSR | S_IRUGO, show_temp,
-			    store_temp, 3, 0);
-static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IWUSR | S_IRUGO,
-			  show_temp_crit_hyst, store_temp_crit_hyst, 0);
-static SENSOR_DEVICE_ATTR_2(temp1_min_alarm, S_IRUGO, show_status, NULL,
-			    1, TMP432_STATUS_LOCAL);
-static SENSOR_DEVICE_ATTR_2(temp1_max_alarm, S_IRUGO, show_status, NULL,
-			    2, TMP432_STATUS_LOCAL);
-static SENSOR_DEVICE_ATTR_2(temp1_crit_alarm, S_IRUGO, show_status, NULL,
-			    3, TMP432_STATUS_LOCAL);
-static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1);
-static SENSOR_DEVICE_ATTR_2(temp2_min, S_IWUSR | S_IRUGO, show_temp,
-			    store_temp, 1, 1);
-static SENSOR_DEVICE_ATTR_2(temp2_max, S_IWUSR | S_IRUGO, show_temp,
-			    store_temp, 2, 1);
-static SENSOR_DEVICE_ATTR_2(temp2_crit, S_IWUSR | S_IRUGO, show_temp,
-			    store_temp, 3, 1);
-static SENSOR_DEVICE_ATTR(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst,
-			  NULL, 1);
-static SENSOR_DEVICE_ATTR_2(temp2_fault, S_IRUGO, show_status, NULL,
-			    0, TMP432_STATUS_REMOTE1);
-static SENSOR_DEVICE_ATTR_2(temp2_min_alarm, S_IRUGO, show_status, NULL,
-			    1, TMP432_STATUS_REMOTE1);
-static SENSOR_DEVICE_ATTR_2(temp2_max_alarm, S_IRUGO, show_status, NULL,
-			    2, TMP432_STATUS_REMOTE1);
-static SENSOR_DEVICE_ATTR_2(temp2_crit_alarm, S_IRUGO, show_status, NULL,
-			    3, TMP432_STATUS_REMOTE1);
-
-static DEVICE_ATTR(update_interval, S_IRUGO | S_IWUSR, show_update_interval,
-		   set_update_interval);
-static DEVICE_ATTR(timeout_en, S_IRUGO | S_IWUSR, show_timeout_en, set_timeout_en);
-
-static struct attribute *tmp401_attributes[] = {
-	&sensor_dev_attr_temp1_input.dev_attr.attr,
-	&sensor_dev_attr_temp1_min.dev_attr.attr,
-	&sensor_dev_attr_temp1_max.dev_attr.attr,
-	&sensor_dev_attr_temp1_crit.dev_attr.attr,
-	&sensor_dev_attr_temp1_crit_hyst.dev_attr.attr,
-	&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
-	&sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
-	&sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
-
-	&sensor_dev_attr_temp2_input.dev_attr.attr,
-	&sensor_dev_attr_temp2_min.dev_attr.attr,
-	&sensor_dev_attr_temp2_max.dev_attr.attr,
-	&sensor_dev_attr_temp2_crit.dev_attr.attr,
-	&sensor_dev_attr_temp2_crit_hyst.dev_attr.attr,
-	&sensor_dev_attr_temp2_fault.dev_attr.attr,
-	&sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
-	&sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
-	&sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
-
-	&dev_attr_update_interval.attr,
-	&dev_attr_timeout_en.attr,
-
-	NULL
-};
-
-static const struct attribute_group tmp401_group = {
-	.attrs = tmp401_attributes,
-};
-
-/*
- * Additional features of the TMP411 chip.
- * The TMP411 stores the minimum and maximum
- * temperature measured since power-on, chip-reset, or
- * minimum and maximum register reset for both the local
- * and remote channels.
- */
-static SENSOR_DEVICE_ATTR_2(temp1_lowest, S_IRUGO, show_temp, NULL, 4, 0);
-static SENSOR_DEVICE_ATTR_2(temp1_highest, S_IRUGO, show_temp, NULL, 5, 0);
-static SENSOR_DEVICE_ATTR_2(temp2_lowest, S_IRUGO, show_temp, NULL, 4, 1);
-static SENSOR_DEVICE_ATTR_2(temp2_highest, S_IRUGO, show_temp, NULL, 5, 1);
-static SENSOR_DEVICE_ATTR(temp_reset_history, S_IWUSR, NULL, reset_temp_history,
-			  0);
-
-static struct attribute *tmp411_attributes[] = {
-	&sensor_dev_attr_temp1_highest.dev_attr.attr,
-	&sensor_dev_attr_temp1_lowest.dev_attr.attr,
-	&sensor_dev_attr_temp2_highest.dev_attr.attr,
-	&sensor_dev_attr_temp2_lowest.dev_attr.attr,
-	&sensor_dev_attr_temp_reset_history.dev_attr.attr,
-	NULL
-};
-
-static const struct attribute_group tmp411_group = {
-	.attrs = tmp411_attributes,
-};
-
-static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2);
-static SENSOR_DEVICE_ATTR_2(temp3_min, S_IWUSR | S_IRUGO, show_temp,
-			    store_temp, 1, 2);
-static SENSOR_DEVICE_ATTR_2(temp3_max, S_IWUSR | S_IRUGO, show_temp,
-			    store_temp, 2, 2);
-static SENSOR_DEVICE_ATTR_2(temp3_crit, S_IWUSR | S_IRUGO, show_temp,
-			    store_temp, 3, 2);
-static SENSOR_DEVICE_ATTR(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst,
-			  NULL, 2);
-static SENSOR_DEVICE_ATTR_2(temp3_fault, S_IRUGO, show_status, NULL,
-			    0, TMP432_STATUS_REMOTE2);
-static SENSOR_DEVICE_ATTR_2(temp3_min_alarm, S_IRUGO, show_status, NULL,
-			    1, TMP432_STATUS_REMOTE2);
-static SENSOR_DEVICE_ATTR_2(temp3_max_alarm, S_IRUGO, show_status, NULL,
-			    2, TMP432_STATUS_REMOTE2);
-static SENSOR_DEVICE_ATTR_2(temp3_crit_alarm, S_IRUGO, show_status, NULL,
-			    3, TMP432_STATUS_REMOTE2);
-
-static struct attribute *tmp432_attributes[] = {
-	&sensor_dev_attr_temp3_input.dev_attr.attr,
-	&sensor_dev_attr_temp3_min.dev_attr.attr,
-	&sensor_dev_attr_temp3_max.dev_attr.attr,
-	&sensor_dev_attr_temp3_crit.dev_attr.attr,
-	&sensor_dev_attr_temp3_crit_hyst.dev_attr.attr,
-	&sensor_dev_attr_temp3_fault.dev_attr.attr,
-	&sensor_dev_attr_temp3_max_alarm.dev_attr.attr,
-	&sensor_dev_attr_temp3_min_alarm.dev_attr.attr,
-	&sensor_dev_attr_temp3_crit_alarm.dev_attr.attr,
-
-	NULL
-};
-
-static const struct attribute_group tmp432_group = {
-	.attrs = tmp432_attributes,
-};
-
-/*
- * Additional features of the TMP461 chip.
- * The TMP461 temperature offset for the remote channel.
- */
-static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IWUSR | S_IRUGO, show_temp,
-			    store_temp, 6, 1);
-
-static struct attribute *tmp461_attributes[] = {
-	&sensor_dev_attr_temp2_offset.dev_attr.attr,
-	NULL
-};
-
-static const struct attribute_group tmp461_group = {
-	.attrs = tmp461_attributes,
-};
-
-/*
- * Begin non sysfs callback code (aka Real code)
- */
-
-static int tmp401_init_client(struct tmp401_data *data,
-			      struct i2c_client *client)
-{
-	int config, config_orig, status = 0;
-
-	/* Set the conversion rate to 2 Hz */
-	i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, 5);
-	data->update_interval = 500;
-
-	/* Start conversions (disable shutdown if necessary) */
-	config = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
-	if (config < 0)
-		return config;
-
-	config_orig = config;
-	config &= ~TMP401_CONFIG_SHUTDOWN;
-
-	if (config != config_orig)
-		status = i2c_smbus_write_byte_data(client,
-						   TMP401_CONFIG_WRITE,
-						   config);
-
-	return status;
-}
-
-#if 0
-static int tmp401_detect(struct i2c_client *client,
-			 struct i2c_board_info *info)
-{
-	enum chips kind;
-	struct i2c_adapter *adapter = client->adapter;
-	u8 reg;
-
-	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
-		return -ENODEV;
-
-	/* Detect and identify the chip */
-	reg = i2c_smbus_read_byte_data(client, TMP401_MANUFACTURER_ID_REG);
-	if (reg != TMP401_MANUFACTURER_ID)
-		return -ENODEV;
-
-	reg = i2c_smbus_read_byte_data(client, TMP401_DEVICE_ID_REG);
-
-	switch (reg) {
-	case TMP401_DEVICE_ID:
-		if (client->addr != 0x4c)
-			return -ENODEV;
-		kind = tmp401;
-		break;
-	case TMP411A_DEVICE_ID:
-		if (client->addr != 0x4c)
-			return -ENODEV;
-		kind = tmp411;
-		break;
-	case TMP411B_DEVICE_ID:
-		if (client->addr != 0x4d)
-			return -ENODEV;
-		kind = tmp411;
-		break;
-	case TMP411C_DEVICE_ID:
-		if (client->addr != 0x4e)
-			return -ENODEV;
-		kind = tmp411;
-		break;
-	case TMP431_DEVICE_ID:
-		if (client->addr != 0x4c && client->addr != 0x4d)
-			return -ENODEV;
-		kind = tmp431;
-		break;
-	case TMP432_DEVICE_ID:
-		if (client->addr != 0x4c && client->addr != 0x4d)
-			return -ENODEV;
-		kind = tmp432;
-		break;
-	case TMP435_DEVICE_ID:
-		kind = tmp435;
-		break;
-	default:
-		return -ENODEV;
-	}
-
-	reg = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
-	if (reg & 0x1b)
-		return -ENODEV;
-
-	reg = i2c_smbus_read_byte_data(client, TMP401_CONVERSION_RATE_READ);
-	/* Datasheet says: 0x1-0x6 */
-	if (reg > 15)
-		return -ENODEV;
-
-	strlcpy(info->type, tmp401_id[kind].name, I2C_NAME_SIZE);
-
-	return 0;
-}
-#endif
-
-static int tmp401_probe(struct i2c_client *client,
-			const struct i2c_device_id *id)
-{
-	static const char * const names[] = {
-		"TMP401", "TMP411", "TMP431", "TMP432", "TMP435", "TMP461"
-	};
-	struct device *dev = &client->dev;
-	struct device *hwmon_dev;
-	struct tmp401_data *data;
-	int groups = 0, status;
-
-	data = devm_kzalloc(dev, sizeof(struct tmp401_data), GFP_KERNEL);
-	if (!data)
-		return -ENOMEM;
-
-	data->client = client;
-	mutex_init(&data->update_lock);
-	data->kind = id->driver_data;
-
-	/* Initialize the TMP401 chip */
-	status = tmp401_init_client(data, client);
-	if (status < 0)
-		return status;
-
-	/* Register sysfs hooks */
-	data->groups[groups++] = &tmp401_group;
-
-	/* Register additional tmp411 sysfs hooks */
-	if (data->kind == tmp411)
-		data->groups[groups++] = &tmp411_group;
-
-	/* Register additional tmp432 sysfs hooks */
-	if (data->kind == tmp432)
-		data->groups[groups++] = &tmp432_group;
-
-	if (data->kind == tmp461)
-		data->groups[groups++] = &tmp461_group;
-
-	hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
-							   data, data->groups);
-	if (IS_ERR(hwmon_dev))
-		return PTR_ERR(hwmon_dev);
-
-    /* disable the timeout function */
-    status = timeout_cfg(hwmon_dev, TIMEOUT_STATE_IEN);
-    if((status < 0) && (status != -EPERM)) {
-        dev_err(dev,
-            "set bus timeout error when probing: %d.!\n", status);
-        /* here, no need call devm_hwmon_device_unregister, device managed. */
-        return status;
-    }
-
-	dev_info(dev, "Detected TI %s chip\n", names[data->kind]);
-
-	return 0;
-}
-
-static struct i2c_driver tmp401_driver = {
-	.class		= I2C_CLASS_HWMON,
-	.driver = {
-		.name	= "wb_tmp401",
-	},
-	.probe		= tmp401_probe,
-	.id_table	= tmp401_id,
-	/* .detect		= tmp401_detect, */
-	/* .address_list	= normal_i2c, */
-};
-
-module_i2c_driver(tmp401_driver);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("Texas Instruments TMP401 temperature sensor driver");
-MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tps53622.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tps53622.c
deleted file mode 100644
index b68196d9f57c..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tps53622.c
+++ /dev/null
@@ -1,265 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Hardware monitoring driver for Texas Instruments TPS53679
- *
- * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
- * Copyright (c) 2017 Vadim Pasternak <vadimp@mellanox.com>
- */
-
-#include <linux/bits.h>
-#include <linux/err.h>
-#include <linux/i2c.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/of_device.h>
-#include "wb_pmbus.h"
-
-enum chips {
-    tps53647, tps53667, tps53679, tps53681, tps53688, tps53622
-};
-
-#define TPS53647_PAGE_NUM             1
-
-#define TPS53679_PROT_VR12_5MV        0x01 /* VR12.0 mode, 5-mV DAC */
-#define TPS53679_PROT_VR12_5_10MV     0x02 /* VR12.5 mode, 10-mV DAC */
-#define TPS53679_PROT_VR13_10MV       0x04 /* VR13.0 mode, 10-mV DAC */
-#define TPS53679_PROT_IMVP8_5MV       0x05 /* IMVP8 mode, 5-mV DAC */
-#define TPS53679_PROT_VR13_5MV        0x07 /* VR13.0 mode, 5-mV DAC */
-#define TPS53679_PAGE_NUM             2
-
-#define TPS53681_DEVICE_ID            0x81
-
-#define TPS53681_PMBUS_REVISION       0x33
-
-#define TPS53681_MFR_SPECIFIC_20      0xe4    /* Number of phases, per page */
-
-static const struct i2c_device_id tps53679_id[];
-
-static int tps53679_identify_mode(struct i2c_client *client,
-                  struct pmbus_driver_info *info)
-{
-    u8 vout_params;
-    int i, ret;
-
-    for (i = 0; i < info->pages; i++) {
-        /* Read the register with VOUT scaling value.*/
-        ret = wb_pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE);
-        if (ret < 0)
-            return ret;
-
-        vout_params = ret & GENMASK(4, 0);
-
-        switch (vout_params) {
-        case TPS53679_PROT_VR13_10MV:
-        case TPS53679_PROT_VR12_5_10MV:
-            info->vrm_version[i] = vr13;
-            break;
-        case TPS53679_PROT_VR13_5MV:
-        case TPS53679_PROT_VR12_5MV:
-        case TPS53679_PROT_IMVP8_5MV:
-            info->vrm_version[i] = vr12;
-            break;
-        default:
-            return -EINVAL;
-        }
-    }
-
-    return 0;
-}
-
-static int tps53679_identify_phases(struct i2c_client *client,
-                    struct pmbus_driver_info *info)
-{
-    int ret;
-
-    /* On TPS53681, only channel A provides per-phase output current */
-    ret = wb_pmbus_read_byte_data(client, 0, TPS53681_MFR_SPECIFIC_20);
-    if (ret < 0)
-        return ret;
-    info->phases[0] = (ret & 0x07) + 1;
-
-    return 0;
-}
-
-static int tps53679_identify_chip(struct i2c_client *client,
-                  u8 revision, u16 id)
-{
-    u8 buf[I2C_SMBUS_BLOCK_MAX];
-    int ret;
-
-    ret = wb_pmbus_read_byte_data(client, 0, PMBUS_REVISION);
-    if (ret < 0)
-        return ret;
-    if (ret != revision) {
-        dev_err(&client->dev, "Unexpected PMBus revision 0x%x\n", ret);
-        return -ENODEV;
-    }
-
-    ret = i2c_smbus_read_block_data(client, PMBUS_IC_DEVICE_ID, buf);
-    if (ret < 0)
-        return ret;
-    if (ret != 1 || buf[0] != id) {
-        dev_err(&client->dev, "Unexpected device ID 0x%x\n", buf[0]);
-        return -ENODEV;
-    }
-    return 0;
-}
-
-/*
- * Common identification function for chips with multi-phase support.
- * Since those chips have special configuration registers, we want to have
- * some level of reassurance that we are really talking with the chip
- * being probed. Check PMBus revision and chip ID.
- */
-static int tps53679_identify_multiphase(struct i2c_client *client,
-                    struct pmbus_driver_info *info,
-                    int pmbus_rev, int device_id)
-{
-    int ret;
-
-    ret = tps53679_identify_chip(client, pmbus_rev, device_id);
-    if (ret < 0)
-        return ret;
-
-    ret = tps53679_identify_mode(client, info);
-    if (ret < 0)
-        return ret;
-
-    return tps53679_identify_phases(client, info);
-}
-
-static int tps53679_identify(struct i2c_client *client,
-                 struct pmbus_driver_info *info)
-{
-    return tps53679_identify_mode(client, info);
-}
-
-static int tps53681_identify(struct i2c_client *client,
-                 struct pmbus_driver_info *info)
-{
-    return tps53679_identify_multiphase(client, info,
-                        TPS53681_PMBUS_REVISION,
-                        TPS53681_DEVICE_ID);
-}
-
-static int tps53681_read_word_data(struct i2c_client *client, int page,
-                   int phase, int reg)
-{
-    /*
-     * For reading the total output current (READ_IOUT) for all phases,
-     * the chip datasheet is a bit vague. It says "PHASE must be set to
-     * FFh to access all phases simultaneously. PHASE may also be set to
-     * 80h readack (!) the total phase current".
-     * Experiments show that the command does _not_ report the total
-     * current for all phases if the phase is set to 0xff. Instead, it
-     * appears to report the current of one of the phases. Override phase
-     * parameter with 0x80 when reading the total output current on page 0.
-     */
-    if (reg == PMBUS_READ_IOUT && page == 0 && phase == 0xff)
-        return wb_pmbus_read_word_data(client, page, 0x80, reg);
-    return -ENODATA;
-}
-
-static struct pmbus_driver_info tps53679_info = {
-    .format[PSC_VOLTAGE_IN] = linear,
-    .format[PSC_VOLTAGE_OUT] = vid,
-    .format[PSC_TEMPERATURE] = linear,
-    .format[PSC_CURRENT_OUT] = linear,
-    .format[PSC_POWER] = linear,
-    .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN |
-        PMBUS_HAVE_STATUS_INPUT |
-        PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
-        PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
-        PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
-        PMBUS_HAVE_POUT,
-    .func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
-        PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
-        PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
-        PMBUS_HAVE_POUT,
-    .pfunc[0] = PMBUS_HAVE_IOUT,
-    .pfunc[1] = PMBUS_HAVE_IOUT,
-    .pfunc[2] = PMBUS_HAVE_IOUT,
-    .pfunc[3] = PMBUS_HAVE_IOUT,
-    .pfunc[4] = PMBUS_HAVE_IOUT,
-    .pfunc[5] = PMBUS_HAVE_IOUT,
-};
-
-static int tps53679_probe(struct i2c_client *client)
-{
-    struct device *dev = &client->dev;
-    struct pmbus_driver_info *info;
-    enum chips chip_id;
-
-    if (dev->of_node)
-        chip_id = (enum chips)of_device_get_match_data(dev);
-    else
-        chip_id = i2c_match_id(tps53679_id, client)->driver_data;
-
-    info = devm_kmemdup(dev, &tps53679_info, sizeof(*info), GFP_KERNEL);
-    if (!info)
-        return -ENOMEM;
-
-    switch (chip_id) {
-    case tps53647:
-    case tps53667:
-        info->pages = TPS53647_PAGE_NUM;
-        info->identify = tps53679_identify;
-        break;
-    case tps53679:
-    case tps53688:
-	case tps53622:
-        info->pages = TPS53679_PAGE_NUM;
-        info->identify = tps53679_identify;
-        break;
-    case tps53681:
-        info->pages = TPS53679_PAGE_NUM;
-        info->phases[0] = 6;
-        info->identify = tps53681_identify;
-        info->read_word_data = tps53681_read_word_data;
-        break;
-    default:
-        return -ENODEV;
-    }
-
-    return wb_pmbus_do_probe(client, info);
-}
-
-static const struct i2c_device_id tps53679_id[] = {
-    {"wb_tps53647", tps53647},
-    {"wb_tps53667", tps53667},
-    {"wb_tps53679", tps53679},
-    {"wb_tps53681", tps53681},
-    {"wb_tps53688", tps53688},
-    {"wb_tps53622", tps53622},
-    {}
-};
-
-MODULE_DEVICE_TABLE(i2c, tps53679_id);
-
-static const struct of_device_id __maybe_unused tps53679_of_match[] = {
-    {.compatible = "ti,wb_tps53647", .data = (void *)tps53647},
-    {.compatible = "ti,wb_tps53667", .data = (void *)tps53667},
-    {.compatible = "ti,wb_tps53679", .data = (void *)tps53679},
-    {.compatible = "ti,wb_tps53681", .data = (void *)tps53681},
-    {.compatible = "ti,wb_tps53688", .data = (void *)tps53688},
-    {.compatible = "ti,wb_tps53622", .data = (void *)tps53622},
-    {}
-};
-MODULE_DEVICE_TABLE(of, tps53679_of_match);
-
-static struct i2c_driver tps53679_driver = {
-    .driver = {
-        .name = "wb_tps53622",
-        .of_match_table = of_match_ptr(tps53679_of_match),
-    },
-    .probe_new = tps53679_probe,
-    .remove = wb_pmbus_do_remove,
-    .id_table = tps53679_id,
-};
-
-module_i2c_driver(tps53679_driver);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("PMBus driver for Texas Instruments TPS53679");
-MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ucd9000.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ucd9000.c
deleted file mode 100644
index 6d60b9d876c2..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ucd9000.c
+++ /dev/null
@@ -1,720 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Hardware monitoring driver for UCD90xxx Sequencer and System Health
- * Controller series
- *
- * Copyright (C) 2011 Ericsson AB.
- */
-
-#include <linux/debugfs.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/of_device.h>
-#include <linux/init.h>
-#include <linux/err.h>
-#include <linux/slab.h>
-#include <linux/i2c.h>
-#include <linux/pmbus.h>
-#include <linux/gpio/driver.h>
-#include <linux/delay.h>
-#include "wb_pmbus.h"
-
-#define mem_clear(data, size) memset((data), 0, (size))
-
-enum chips { ucd9000, ucd90120, ucd90124, ucd90160, ucd90320, ucd9090,
-         ucd90910 };
-
-#define UCD9000_MONITOR_CONFIG      0xd5
-#define UCD9000_NUM_PAGES           0xd6
-#define UCD9000_FAN_CONFIG_INDEX    0xe7
-#define UCD9000_FAN_CONFIG          0xe8
-#define UCD9000_MFR_STATUS          0xf3
-#define UCD9000_GPIO_SELECT         0xfa
-#define UCD9000_GPIO_CONFIG         0xfb
-#define UCD9000_DEVICE_ID           0xfd
-
-/* GPIO CONFIG bits */
-#define UCD9000_GPIO_CONFIG_ENABLE        BIT(0)
-#define UCD9000_GPIO_CONFIG_OUT_ENABLE    BIT(1)
-#define UCD9000_GPIO_CONFIG_OUT_VALUE     BIT(2)
-#define UCD9000_GPIO_CONFIG_STATUS        BIT(3)
-#define UCD9000_GPIO_INPUT        0
-#define UCD9000_GPIO_OUTPUT       1
-
-#define UCD9000_MON_TYPE(x)       (((x) >> 5) & 0x07)
-#define UCD9000_MON_PAGE(x)       ((x) & 0x1f)
-
-#define UCD9000_MON_VOLTAGE       1
-#define UCD9000_MON_TEMPERATURE   2
-#define UCD9000_MON_CURRENT       3
-#define UCD9000_MON_VOLTAGE_HW    4
-
-#define UCD9000_NUM_FAN           4
-
-#define UCD9000_GPIO_NAME_LEN     16
-#define UCD9090_NUM_GPIOS         23
-#define UCD901XX_NUM_GPIOS        26
-#define UCD90320_NUM_GPIOS        84
-#define UCD90910_NUM_GPIOS        26
-
-#define UCD9000_DEBUGFS_NAME_LEN  24
-#define UCD9000_GPI_COUNT         8
-#define UCD90320_GPI_COUNT        32
-
-#define UCD9000_RETRY_SLEEP_TIME          (10000)   /* 10ms */
-#define UCD9000_RETRY_TIME                (3)
-#define WB_DEV_NAME_MAX_LEN               (64)
-
-static int g_wb_ucd9000_debug = 0;
-static int g_wb_ucd9000_error = 0;
-
-module_param(g_wb_ucd9000_debug, int, S_IRUGO | S_IWUSR);
-module_param(g_wb_ucd9000_error, int, S_IRUGO | S_IWUSR);
-
-#define WB_UDC9000_VERBOSE(fmt, args...) do {                                        \
-    if (g_wb_ucd9000_debug) { \
-        printk(KERN_INFO "[WB_UCD9000][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-#define WB_UDC9000_ERROR(fmt, args...) do {                                        \
-    if (g_wb_ucd9000_error) { \
-        printk(KERN_ERR "[WB_UCD9000][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-struct ucd9000_data {
-    u8 fan_data[UCD9000_NUM_FAN][I2C_SMBUS_BLOCK_MAX];
-    struct pmbus_driver_info info;
-#ifdef CONFIG_GPIOLIB
-    struct gpio_chip gpio;
-#endif
-    struct dentry *debugfs;
-};
-#define to_ucd9000_data(_info) container_of(_info, struct ucd9000_data, info)
-
-struct ucd9000_debugfs_entry {
-    struct i2c_client *client;
-    u8 index;
-};
-
-static int wb_i2c_smbus_read_block_data_tmp(const struct i2c_client *client, u8 command, u8 *values)
-{
-
-    struct i2c_msg msg[2];
-    int status;
-    u8 read_buf[I2C_SMBUS_BLOCK_MAX + 1];
-    int read_len, val_len;
-
-    val_len = i2c_smbus_read_byte_data(client, command);
-    if (val_len < 0) {
-        WB_UDC9000_ERROR("read byte failed. nr:%d, addr:0x%x, reg:0x%x, ret:%d.\n",
-            client->adapter->nr, client->addr, command, val_len);
-        return -ENXIO;
-    }
-    read_len = val_len + 1;
-    if (read_len > sizeof(read_buf)) {
-        WB_UDC9000_ERROR("Out of memory, val_len: %d, read length: %d, read buf len: %lu.\n",
-            val_len, read_len, sizeof(read_buf));
-        return -ENOMEM;
-    }
-
-    mem_clear(msg, sizeof(msg));
-    msg[0].addr = client->addr;
-    msg[0].buf = &command;
-    msg[0].len = 1;
-
-    msg[1].addr = client->addr;
-    msg[1].flags = I2C_M_RD;
-    msg[1].buf = read_buf;
-    msg[1].len = read_len;
-
-    status = i2c_transfer(client->adapter, msg, 2);
-    if (status != 2) {
-        WB_UDC9000_ERROR("i2c_transfer failed. nr:%d, addr:0x%x, reg:0x%x, read len:%d, status:%d.\n",
-            client->adapter->nr, client->addr, command, read_len, status);
-        return -EIO;
-    }
-    WB_UDC9000_VERBOSE("read_block_data success. nr:%d, addr:0x%x, reg:0x%x, read len:%d",
-        client->adapter->nr, client->addr, command, read_len);
-    memcpy(values, &read_buf[1], val_len);
-    return val_len;
-}
-
-static int wb_i2c_smbus_read_block_data(const struct i2c_client *client, u8 command, u8 *values)
-{
-    int rv, i;
-
-    for(i = 0; i < UCD9000_RETRY_TIME; i++) {
-        rv = wb_i2c_smbus_read_block_data_tmp(client, command, values);
-        if(rv >= 0){
-            return rv;
-        }
-        usleep_range(UCD9000_RETRY_SLEEP_TIME, UCD9000_RETRY_SLEEP_TIME + 1);
-    }
-    WB_UDC9000_ERROR("read_block_data failed. nr:  %d, addr: 0x%x, reg: 0x%x, rv: %d\n",
-        client->adapter->nr, client->addr, command, rv);
-    return rv;
-}
-
-static int ucd9000_get_fan_config(struct i2c_client *client, int fan)
-{
-    int fan_config = 0;
-    struct ucd9000_data *data
-      = to_ucd9000_data(wb_pmbus_get_driver_info(client));
-
-    if (data->fan_data[fan][3] & 1)
-        fan_config |= PB_FAN_2_INSTALLED;   /* Use lower bit position */
-
-    /* Pulses/revolution */
-    fan_config |= (data->fan_data[fan][3] & 0x06) >> 1;
-
-    return fan_config;
-}
-
-static int ucd9000_read_byte_data(struct i2c_client *client, int page, int reg)
-{
-    int ret = 0;
-    int fan_config;
-
-    switch (reg) {
-    case PMBUS_FAN_CONFIG_12:
-        if (page > 0)
-            return -ENXIO;
-
-        ret = ucd9000_get_fan_config(client, 0);
-        if (ret < 0)
-            return ret;
-        fan_config = ret << 4;
-        ret = ucd9000_get_fan_config(client, 1);
-        if (ret < 0)
-            return ret;
-        fan_config |= ret;
-        ret = fan_config;
-        break;
-    case PMBUS_FAN_CONFIG_34:
-        if (page > 0)
-            return -ENXIO;
-
-        ret = ucd9000_get_fan_config(client, 2);
-        if (ret < 0)
-            return ret;
-        fan_config = ret << 4;
-        ret = ucd9000_get_fan_config(client, 3);
-        if (ret < 0)
-            return ret;
-        fan_config |= ret;
-        ret = fan_config;
-        break;
-    default:
-        ret = -ENODATA;
-        break;
-    }
-    return ret;
-}
-
-static const struct i2c_device_id ucd9000_id[] = {
-    {"wb_ucd9000", ucd9000},
-    {"wb_ucd90120", ucd90120},
-    {"wb_ucd90124", ucd90124},
-    {"wb_ucd90160", ucd90160},
-    {"wb_ucd90320", ucd90320},
-    {"wb_ucd9090", ucd9090},
-    {"wb_ucd90910", ucd90910},
-    {}
-};
-MODULE_DEVICE_TABLE(i2c, ucd9000_id);
-
-static const struct of_device_id __maybe_unused ucd9000_of_match[] = {
-    {
-        .compatible = "ti,wb_ucd9000",
-        .data = (void *)ucd9000
-    },
-    {
-        .compatible = "ti,wb_ucd90120",
-        .data = (void *)ucd90120
-    },
-    {
-        .compatible = "ti,wb_ucd90124",
-        .data = (void *)ucd90124
-    },
-    {
-        .compatible = "ti,wb_ucd90160",
-        .data = (void *)ucd90160
-    },
-    {
-        .compatible = "ti,wb_ucd90320",
-        .data = (void *)ucd90320
-    },
-    {
-        .compatible = "ti,wb_ucd9090",
-        .data = (void *)ucd9090
-    },
-    {
-        .compatible = "ti,wb_ucd90910",
-        .data = (void *)ucd90910
-    },
-    { },
-};
-MODULE_DEVICE_TABLE(of, ucd9000_of_match);
-
-#ifdef CONFIG_GPIOLIB
-static int ucd9000_gpio_read_config(struct i2c_client *client,
-                    unsigned int offset)
-{
-    int ret;
-
-    /* No page set required */
-    ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_SELECT, offset);
-    if (ret < 0)
-        return ret;
-
-    return i2c_smbus_read_byte_data(client, UCD9000_GPIO_CONFIG);
-}
-
-static int ucd9000_gpio_get(struct gpio_chip *gc, unsigned int offset)
-{
-    struct i2c_client *client  = gpiochip_get_data(gc);
-    int ret;
-
-    ret = ucd9000_gpio_read_config(client, offset);
-    if (ret < 0)
-        return ret;
-
-    return !!(ret & UCD9000_GPIO_CONFIG_STATUS);
-}
-
-static void ucd9000_gpio_set(struct gpio_chip *gc, unsigned int offset,
-                 int value)
-{
-    struct i2c_client *client = gpiochip_get_data(gc);
-    int ret;
-
-    ret = ucd9000_gpio_read_config(client, offset);
-    if (ret < 0) {
-        dev_dbg(&client->dev, "failed to read GPIO %d config: %d\n",
-            offset, ret);
-        return;
-    }
-
-    if (value) {
-        if (ret & UCD9000_GPIO_CONFIG_STATUS)
-            return;
-
-        ret |= UCD9000_GPIO_CONFIG_STATUS;
-    } else {
-        if (!(ret & UCD9000_GPIO_CONFIG_STATUS))
-            return;
-
-        ret &= ~UCD9000_GPIO_CONFIG_STATUS;
-    }
-
-    ret |= UCD9000_GPIO_CONFIG_ENABLE;
-
-    /* Page set not required */
-    ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, ret);
-    if (ret < 0) {
-        dev_dbg(&client->dev, "Failed to write GPIO %d config: %d\n",
-            offset, ret);
-        return;
-    }
-
-    ret &= ~UCD9000_GPIO_CONFIG_ENABLE;
-
-    ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, ret);
-    if (ret < 0)
-        dev_dbg(&client->dev, "Failed to write GPIO %d config: %d\n",
-            offset, ret);
-}
-
-static int ucd9000_gpio_get_direction(struct gpio_chip *gc,
-                      unsigned int offset)
-{
-    struct i2c_client *client = gpiochip_get_data(gc);
-    int ret;
-
-    ret = ucd9000_gpio_read_config(client, offset);
-    if (ret < 0)
-        return ret;
-
-    return !(ret & UCD9000_GPIO_CONFIG_OUT_ENABLE);
-}
-
-static int ucd9000_gpio_set_direction(struct gpio_chip *gc,
-                      unsigned int offset, bool direction_out,
-                      int requested_out)
-{
-    struct i2c_client *client = gpiochip_get_data(gc);
-    int ret, config, out_val;
-
-    ret = ucd9000_gpio_read_config(client, offset);
-    if (ret < 0)
-        return ret;
-
-    if (direction_out) {
-        out_val = requested_out ? UCD9000_GPIO_CONFIG_OUT_VALUE : 0;
-
-        if (ret & UCD9000_GPIO_CONFIG_OUT_ENABLE) {
-            if ((ret & UCD9000_GPIO_CONFIG_OUT_VALUE) == out_val)
-                return 0;
-        } else {
-            ret |= UCD9000_GPIO_CONFIG_OUT_ENABLE;
-        }
-
-        if (out_val)
-            ret |= UCD9000_GPIO_CONFIG_OUT_VALUE;
-        else
-            ret &= ~UCD9000_GPIO_CONFIG_OUT_VALUE;
-
-    } else {
-        if (!(ret & UCD9000_GPIO_CONFIG_OUT_ENABLE))
-            return 0;
-
-        ret &= ~UCD9000_GPIO_CONFIG_OUT_ENABLE;
-    }
-
-    ret |= UCD9000_GPIO_CONFIG_ENABLE;
-    config = ret;
-
-    /* Page set not required */
-    ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, config);
-    if (ret < 0)
-        return ret;
-
-    config &= ~UCD9000_GPIO_CONFIG_ENABLE;
-
-    return i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, config);
-}
-
-static int ucd9000_gpio_direction_input(struct gpio_chip *gc,
-                    unsigned int offset)
-{
-    return ucd9000_gpio_set_direction(gc, offset, UCD9000_GPIO_INPUT, 0);
-}
-
-static int ucd9000_gpio_direction_output(struct gpio_chip *gc,
-                     unsigned int offset, int val)
-{
-    return ucd9000_gpio_set_direction(gc, offset, UCD9000_GPIO_OUTPUT,
-                      val);
-}
-
-static void ucd9000_probe_gpio(struct i2c_client *client,
-                   const struct i2c_device_id *mid,
-                   struct ucd9000_data *data)
-{
-    int rc;
-
-    switch (mid->driver_data) {
-    case ucd9090:
-        data->gpio.ngpio = UCD9090_NUM_GPIOS;
-        break;
-    case ucd90120:
-    case ucd90124:
-    case ucd90160:
-        data->gpio.ngpio = UCD901XX_NUM_GPIOS;
-        break;
-    case ucd90320:
-        data->gpio.ngpio = UCD90320_NUM_GPIOS;
-        break;
-    case ucd90910:
-        data->gpio.ngpio = UCD90910_NUM_GPIOS;
-        break;
-    default:
-        return; /* GPIO support is optional. */
-    }
-
-    /*
-     * Pinmux support has not been added to the new gpio_chip.
-     * This support should be added when possible given the mux
-     * behavior of these IO devices.
-     */
-    data->gpio.label = client->name;
-    data->gpio.get_direction = ucd9000_gpio_get_direction;
-    data->gpio.direction_input = ucd9000_gpio_direction_input;
-    data->gpio.direction_output = ucd9000_gpio_direction_output;
-    data->gpio.get = ucd9000_gpio_get;
-    data->gpio.set = ucd9000_gpio_set;
-    data->gpio.can_sleep = true;
-    data->gpio.base = -1;
-    data->gpio.parent = &client->dev;
-
-    rc = devm_gpiochip_add_data(&client->dev, &data->gpio, client);
-    if (rc)
-        dev_warn(&client->dev, "Could not add gpiochip: %d\n", rc);
-}
-#else
-static void ucd9000_probe_gpio(struct i2c_client *client,
-                   const struct i2c_device_id *mid,
-                   struct ucd9000_data *data)
-{
-}
-#endif /* CONFIG_GPIOLIB */
-
-#ifdef CONFIG_DEBUG_FS
-static int ucd9000_get_mfr_status(struct i2c_client *client, u8 *buffer)
-{
-    int ret = wb_pmbus_set_page(client, 0, 0xff);
-
-    if (ret < 0)
-        return ret;
-
-    return wb_i2c_smbus_read_block_data(client, UCD9000_MFR_STATUS, buffer);
-}
-
-static int ucd9000_debugfs_show_mfr_status_bit(void *data, u64 *val)
-{
-    struct ucd9000_debugfs_entry *entry = data;
-    struct i2c_client *client = entry->client;
-    u8 buffer[I2C_SMBUS_BLOCK_MAX];
-    int ret, i;
-
-    ret = ucd9000_get_mfr_status(client, buffer);
-    if (ret < 0)
-        return ret;
-
-    /*
-     * GPI fault bits are in sets of 8, two bytes from end of response.
-     */
-    i = ret - 3 - entry->index / 8;
-    if (i >= 0)
-        *val = !!(buffer[i] & BIT(entry->index % 8));
-
-    return 0;
-}
-DEFINE_DEBUGFS_ATTRIBUTE(ucd9000_debugfs_mfr_status_bit,
-             ucd9000_debugfs_show_mfr_status_bit, NULL, "%1lld\n");
-
-static ssize_t ucd9000_debugfs_read_mfr_status(struct file *file,
-                           char __user *buf, size_t count,
-                           loff_t *ppos)
-{
-    struct i2c_client *client = file->private_data;
-    u8 buffer[I2C_SMBUS_BLOCK_MAX];
-    char str[(I2C_SMBUS_BLOCK_MAX * 2) + 2];
-    char *res;
-    int rc;
-
-    rc = ucd9000_get_mfr_status(client, buffer);
-    if (rc < 0)
-        return rc;
-
-    res = bin2hex(str, buffer, min(rc, I2C_SMBUS_BLOCK_MAX));
-    *res++ = '\n';
-    *res = 0;
-
-    return simple_read_from_buffer(buf, count, ppos, str, res - str);
-}
-
-static const struct file_operations ucd9000_debugfs_show_mfr_status_fops = {
-    .llseek = noop_llseek,
-    .read = ucd9000_debugfs_read_mfr_status,
-    .open = simple_open,
-};
-
-static int ucd9000_init_debugfs(struct i2c_client *client,
-                const struct i2c_device_id *mid,
-                struct ucd9000_data *data)
-{
-    struct dentry *debugfs;
-    struct ucd9000_debugfs_entry *entries;
-    int i, gpi_count;
-    char name[UCD9000_DEBUGFS_NAME_LEN];
-
-    debugfs = wb_pmbus_get_debugfs_dir(client);
-    if (!debugfs)
-        return -ENOENT;
-
-    data->debugfs = debugfs_create_dir(client->name, debugfs);
-    if (!data->debugfs)
-        return -ENOENT;
-
-    /*
-     * Of the chips this driver supports, only the UCD9090, UCD90160,
-     * UCD90320, and UCD90910 report GPI faults in their MFR_STATUS
-     * register, so only create the GPI fault debugfs attributes for those
-     * chips.
-     */
-    if (mid->driver_data == ucd9090 || mid->driver_data == ucd90160 ||
-        mid->driver_data == ucd90320 || mid->driver_data == ucd90910) {
-        gpi_count = mid->driver_data == ucd90320 ? UCD90320_GPI_COUNT
-                             : UCD9000_GPI_COUNT;
-        entries = devm_kcalloc(&client->dev,
-                       gpi_count, sizeof(*entries),
-                       GFP_KERNEL);
-        if (!entries)
-            return -ENOMEM;
-
-        for (i = 0; i < gpi_count; i++) {
-            entries[i].client = client;
-            entries[i].index = i;
-            scnprintf(name, UCD9000_DEBUGFS_NAME_LEN,
-                  "gpi%d_alarm", i + 1);
-            debugfs_create_file(name, 0444, data->debugfs,
-                        &entries[i],
-                        &ucd9000_debugfs_mfr_status_bit);
-        }
-    }
-
-    scnprintf(name, UCD9000_DEBUGFS_NAME_LEN, "mfr_status");
-    debugfs_create_file(name, 0444, data->debugfs, client,
-                &ucd9000_debugfs_show_mfr_status_fops);
-
-    return 0;
-}
-#else
-static int ucd9000_init_debugfs(struct i2c_client *client,
-                const struct i2c_device_id *mid,
-                struct ucd9000_data *data)
-{
-    return 0;
-}
-#endif /* CONFIG_DEBUG_FS */
-
-static int ucd9000_probe(struct i2c_client *client)
-{
-    u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1];
-    char wb_device_name[WB_DEV_NAME_MAX_LEN];
-    struct ucd9000_data *data;
-    struct pmbus_driver_info *info;
-    const struct i2c_device_id *mid;
-    enum chips chip;
-    int i, ret;
-
-    if (!i2c_check_functionality(client->adapter,
-                     I2C_FUNC_SMBUS_BYTE_DATA))
-        return -ENODEV;
-
-    ret = wb_i2c_smbus_read_block_data(client, UCD9000_DEVICE_ID,
-                    block_buffer);
-    if (ret < 0) {
-        dev_err(&client->dev, "Failed to read device ID\n");
-        return ret;
-    }
-    block_buffer[ret] = '\0';
-    dev_info(&client->dev, "Device ID %s\n", block_buffer);
-
-    mem_clear(wb_device_name, sizeof(wb_device_name));
-    snprintf(wb_device_name, sizeof(wb_device_name), "wb_%s", block_buffer);
-
-    for (mid = ucd9000_id; mid->name[0]; mid++) {
-        if (!strncasecmp(mid->name, wb_device_name, strlen(mid->name)))
-            break;
-    }
-    if (!mid->name[0]) {
-        dev_err(&client->dev, "Unsupported device\n");
-        return -ENODEV;
-    }
-
-    if (client->dev.of_node)
-        chip = (enum chips)of_device_get_match_data(&client->dev);
-    else
-        chip = mid->driver_data;
-
-    if (chip != ucd9000 && strcmp(client->name, mid->name) != 0)
-        dev_notice(&client->dev,
-               "Device mismatch: Configured %s, detected %s\n",
-               client->name, mid->name);
-
-    data = devm_kzalloc(&client->dev, sizeof(struct ucd9000_data),
-                GFP_KERNEL);
-    if (!data)
-        return -ENOMEM;
-    info = &data->info;
-
-    ret = i2c_smbus_read_byte_data(client, UCD9000_NUM_PAGES);
-    if (ret < 0) {
-        dev_err(&client->dev,
-            "Failed to read number of active pages\n");
-        return ret;
-    }
-    info->pages = ret;
-    if (!info->pages) {
-        dev_err(&client->dev, "No pages configured\n");
-        return -ENODEV;
-    }
-
-    /* The internal temperature sensor is always active */
-    /* ucd90160 have no temperature */
-    /* info->func[0] = PMBUS_HAVE_TEMP; */
-
-    /* Everything else is configurable */
-    ret = wb_i2c_smbus_read_block_data(client, UCD9000_MONITOR_CONFIG,
-                    block_buffer);
-    if (ret <= 0) {
-        dev_err(&client->dev, "Failed to read configuration data\n");
-        return -ENODEV;
-    }
-    for (i = 0; i < ret; i++) {
-        int page = UCD9000_MON_PAGE(block_buffer[i]);
-
-        if (page >= info->pages)
-            continue;
-
-        switch (UCD9000_MON_TYPE(block_buffer[i])) {
-        case UCD9000_MON_VOLTAGE:
-        case UCD9000_MON_VOLTAGE_HW:
-            info->func[page] |= PMBUS_HAVE_VOUT
-              | PMBUS_HAVE_STATUS_VOUT;
-            break;
-        case UCD9000_MON_TEMPERATURE:
-            info->func[page] |= PMBUS_HAVE_TEMP2
-              | PMBUS_HAVE_STATUS_TEMP;
-            break;
-        case UCD9000_MON_CURRENT:
-            info->func[page] |= PMBUS_HAVE_IOUT
-              | PMBUS_HAVE_STATUS_IOUT;
-            break;
-        default:
-            break;
-        }
-    }
-
-    /* Fan configuration */
-    if (mid->driver_data == ucd90124) {
-        for (i = 0; i < UCD9000_NUM_FAN; i++) {
-            i2c_smbus_write_byte_data(client,
-                          UCD9000_FAN_CONFIG_INDEX, i);
-            ret = wb_i2c_smbus_read_block_data(client,
-                            UCD9000_FAN_CONFIG,
-                            data->fan_data[i]);
-            if (ret < 0)
-                return ret;
-        }
-        i2c_smbus_write_byte_data(client, UCD9000_FAN_CONFIG_INDEX, 0);
-
-        info->read_byte_data = ucd9000_read_byte_data;
-        info->func[0] |= PMBUS_HAVE_FAN12 | PMBUS_HAVE_STATUS_FAN12
-          | PMBUS_HAVE_FAN34 | PMBUS_HAVE_STATUS_FAN34;
-    }
-
-    ucd9000_probe_gpio(client, mid, data);
-
-    ret = wb_pmbus_do_probe(client, info);
-    if (ret)
-        return ret;
-
-    ret = ucd9000_init_debugfs(client, mid, data);
-    if (ret)
-        dev_warn(&client->dev, "Failed to register debugfs: %d\n",
-             ret);
-
-    return 0;
-}
-
-/* This is the driver that will be inserted */
-static struct i2c_driver ucd9000_driver = {
-    .driver = {
-        .name = "wb_ucd9000",
-        .of_match_table = of_match_ptr(ucd9000_of_match),
-    },
-    .probe_new = ucd9000_probe,
-    .remove = wb_pmbus_do_remove,
-    .id_table = ucd9000_id,
-};
-
-module_i2c_driver(ucd9000_driver);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("PMBus driver for TI UCD90xxx");
-MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe12284.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe12284.c
deleted file mode 100644
index f45d683e3464..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe12284.c
+++ /dev/null
@@ -1,499 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Hardware monitoring driver for Infineon Multi-phase Digital VR Controllers
- *
- * Copyright (c) 2020 Mellanox Technologies. All rights reserved.
- */
-
-#include <linux/err.h>
-#include <linux/hwmon-sysfs.h>
-#include <linux/i2c.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/sysfs.h>
-#include "wb_pmbus.h"
-
-#define XDPE122_PROT_VR12_5MV        (0x01) /* VR12.0 mode, 5-mV DAC */
-#define XDPE122_PROT_VR12_5_10MV     (0x02) /* VR12.5 mode, 10-mV DAC */
-#define XDPE122_PROT_IMVP9_10MV      (0x03) /* IMVP9 mode, 10-mV DAC */
-#define XDPE122_AMD_625MV            (0x10) /* AMD mode 6.25mV */
-#define XDPE122_PAGE_NUM             (2)
-#define XDPE122_WRITE_PROTECT_CLOSE  (0x00)
-#define XDPE122_WRITE_PROTECT_OPEN   (0x40)
-
-static int g_wb_xdpe122_debug = 0;
-static int g_wb_xdpe122_error = 0;
-
-module_param(g_wb_xdpe122_debug, int, S_IRUGO | S_IWUSR);
-module_param(g_wb_xdpe122_error, int, S_IRUGO | S_IWUSR);
-
-#define WB_XDPE122_VERBOSE(fmt, args...) do {                                        \
-    if (g_wb_xdpe122_debug) { \
-        printk(KERN_INFO "[WB_XDPE122][VER][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-#define WB_XDPE122_ERROR(fmt, args...) do {                                        \
-    if (g_wb_xdpe122_error) { \
-        printk(KERN_ERR "[WB_XDPE122][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-static int xdpe122_data2reg_vid(struct pmbus_data *data, int page, long val)
-{
-    int vrm_version;
-
-    vrm_version = data->info->vrm_version[page];
-    WB_XDPE122_VERBOSE("page%d, vrm_version: %d, data_val: %ld\n",
-        page, vrm_version, val);
-    /* Convert data to VID register. */
-    switch (vrm_version) {
-    case vr13:
-        if (val >= 500) {
-            return 1 + DIV_ROUND_CLOSEST(val - 500, 10);
-        }
-        return 0;
-    case vr12:
-        if (val >= 250) {
-            return 1 + DIV_ROUND_CLOSEST(val - 250, 5);
-        }
-        return 0;
-    case imvp9:
-        if (val >= 200) {
-            return 1 + DIV_ROUND_CLOSEST(val - 200, 10);
-        }
-        return 0;
-    case amd625mv:
-        if (val >= 200 && val <= 1550) {
-            return DIV_ROUND_CLOSEST((1550 - val) * 100, 625);
-        }
-        return 0;
-    default:
-        WB_XDPE122_ERROR("Unsupport vrm_version, page%d, vrm_version: %d\n",
-            page, vrm_version);
-        return -EINVAL;
-    }
-    return 0;
-}
-
-/*
- * Convert VID sensor values to milli- or micro-units
- * depending on sensor type.
- */
-static s64 xdpe122_reg2data_vid(struct pmbus_data *data, int page, long val)
-{
-
-    long rv;
-    int vrm_version;
-
-    rv = 0;
-    vrm_version = data->info->vrm_version[page];
-    switch (vrm_version) {
-    case vr11:
-        if (val >= 0x02 && val <= 0xb2)
-            rv = DIV_ROUND_CLOSEST(160000 - (val - 2) * 625, 100);
-        break;
-    case vr12:
-        if (val >= 0x01)
-            rv = 250 + (val - 1) * 5;
-        break;
-    case vr13:
-        if (val >= 0x01)
-            rv = 500 + (val - 1) * 10;
-        break;
-    case imvp9:
-        if (val >= 0x01)
-            rv = 200 + (val - 1) * 10;
-        break;
-    case amd625mv:
-        if (val >= 0x0 && val <= 0xd8)
-            rv = DIV_ROUND_CLOSEST(155000 - val * 625, 100);
-        break;
-    }
-    WB_XDPE122_VERBOSE("page%d, vrm_version: %d, reg_val: 0x%lx, data_val: %ld\n",
-        page, vrm_version, val, rv);
-    return rv;
-}
-
-static ssize_t xdpe122_avs_vout_show(struct device *dev, struct device_attribute *devattr,
-                   char *buf)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int vout_cmd, vout;
-
-    mutex_lock(&data->update_lock);
-    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
-    if (vout_cmd < 0) {
-        WB_XDPE122_ERROR("%d-%04x: read page%d, vout command reg: 0x%x failed, ret: %d\n",
-            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd);
-        mutex_unlock(&data->update_lock);
-        return vout_cmd;
-    }
-
-    vout = xdpe122_reg2data_vid(data, attr->index, vout_cmd);
-    vout = vout * 1000;
-    WB_XDPE122_VERBOSE("%d-%04x: page%d, vout command reg_val: 0x%x, vout: %d uV\n",
-        client->adapter->nr, client->addr, attr->index, vout_cmd, vout);
-
-    mutex_unlock(&data->update_lock);
-    return snprintf(buf, PAGE_SIZE, "%d\n", vout);
-}
-
-static ssize_t xdpe122_avs_vout_store(struct device *dev, struct device_attribute *devattr,
-                   const char *buf, size_t count)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int vout, vout_max, vout_min, vout_mv;
-    int ret, vout_cmd, vout_cmd_set;
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    ret = kstrtoint(buf, 0, &vout);
-    if (ret) {
-        WB_XDPE122_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
-        return -EINVAL;
-    }
-
-    if (vout <= 0) {
-        WB_XDPE122_ERROR("%d-%04x: invalid value: %d \n", client->adapter->nr, client->addr, vout);
-        return -EINVAL;
-    }
-
-    vout_max = data->vout_max[attr->index];
-    vout_min = data->vout_min[attr->index];
-    if ((vout > vout_max) || (vout < vout_min)) {
-        WB_XDPE122_ERROR("%d-%04x: vout value: %d, out of range [%d, %d] \n", client->adapter->nr,
-            client->addr, vout, vout_min, vout_max);
-        return -EINVAL;
-    }
-
-    /* calc VOUT_COMMAND set value Unit must be mV*/
-    vout_mv = vout / 1000;
-    vout_cmd_set = xdpe122_data2reg_vid(data, attr->index, vout_mv);
-    if ((vout_cmd_set < 0) || (vout_cmd_set > 0xffff)) {
-        WB_XDPE122_ERROR("%d-%04x: invalid value, vout %d uV, vout_cmd_set: %d\n",
-            client->adapter->nr, client->addr, vout, vout_cmd_set);
-        return -EINVAL;
-    }
-
-    mutex_lock(&data->update_lock);
-
-    /* close write protect */
-    ret = wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, XDPE122_WRITE_PROTECT_CLOSE);
-    if (ret < 0) {
-        WB_XDPE122_ERROR("%d-%04x: close page%d write protect failed, ret: %d\n", client->adapter->nr,
-            client->addr, attr->index, ret);
-        mutex_unlock(&data->update_lock);
-        return ret;
-    }
-
-    /* set VOUT_COMMAND */
-    ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set);
-    if (ret < 0) {
-        WB_XDPE122_ERROR("%d-%04x: set page%d vout cmd reg: 0x%x, value: 0x%x failed, ret: %d\n",
-            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set, ret);
-        goto error;
-    }
-
-    /* read back VOUT_COMMAND */
-    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
-    if (vout_cmd < 0) {
-        ret = vout_cmd;
-        WB_XDPE122_ERROR("%d-%04x: read page%d vout command reg: 0x%x failed, ret: %d\n",
-            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, ret);
-        goto error;
-    }
-
-    /* compare vout_cmd and vout_cmd_set */
-    if (vout_cmd != vout_cmd_set) {
-        ret = -EIO;
-        WB_XDPE122_ERROR("%d-%04x: vout cmd value check error, vout cmd read: 0x%x, vout cmd set: 0x%x\n",
-            client->adapter->nr, client->addr, vout_cmd, vout_cmd_set);
-        goto error;
-    }
-
-    /* open write protect */
-    wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, XDPE122_WRITE_PROTECT_OPEN);
-    mutex_unlock(&data->update_lock);
-    WB_XDPE122_VERBOSE("%d-%04x: set page%d vout cmd success, vout %d uV, vout_cmd_set: 0x%x\n",
-        client->adapter->nr, client->addr, attr->index, vout, vout_cmd_set);
-    return count;
-error:
-    wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, XDPE122_WRITE_PROTECT_OPEN);
-    mutex_unlock(&data->update_lock);
-    return ret;
-}
-
-static ssize_t xdpe122_avs_vout_max_store(struct device *dev,
-                   struct device_attribute *devattr, const char *buf, size_t count)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int ret, vout_threshold;
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    ret = kstrtoint(buf, 0, &vout_threshold);
-    if (ret) {
-        WB_XDPE122_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
-        return -EINVAL;
-    }
-
-    WB_XDPE122_VERBOSE("%d-%04x: vout%d max threshold: %d", client->adapter->nr, client->addr,
-        attr->index, vout_threshold);
-
-    data->vout_max[attr->index] = vout_threshold;
-    return count;
-}
-
-static ssize_t xdpe122_avs_vout_max_show(struct device *dev,
-                   struct device_attribute *devattr, char *buf)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_max[attr->index]);
-}
-
-static ssize_t xdpe122_avs_vout_min_store(struct device *dev,
-                   struct device_attribute *devattr, const char *buf, size_t count)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int ret, vout_threshold;
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    ret = kstrtoint(buf, 0, &vout_threshold);
-    if (ret) {
-        WB_XDPE122_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
-        return -EINVAL;
-    }
-
-    WB_XDPE122_VERBOSE("%d-%04x: vout%d min threshold: %d", client->adapter->nr, client->addr,
-        attr->index, vout_threshold);
-
-    data->vout_min[attr->index] = vout_threshold;
-    return count;
-}
-
-static ssize_t xdpe122_avs_vout_min_show(struct device *dev,
-                   struct device_attribute *devattr, char *buf)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_min[attr->index]);
-}
-
-static SENSOR_DEVICE_ATTR_RW(avs0_vout, xdpe122_avs_vout, 0);
-static SENSOR_DEVICE_ATTR_RW(avs1_vout, xdpe122_avs_vout, 1);
-static SENSOR_DEVICE_ATTR_RW(avs0_vout_max, xdpe122_avs_vout_max, 0);
-static SENSOR_DEVICE_ATTR_RW(avs0_vout_min, xdpe122_avs_vout_min, 0);
-static SENSOR_DEVICE_ATTR_RW(avs1_vout_max, xdpe122_avs_vout_max, 1);
-static SENSOR_DEVICE_ATTR_RW(avs1_vout_min, xdpe122_avs_vout_min, 1);
-
-static struct attribute *avs_ctrl_attrs[] = {
-    &sensor_dev_attr_avs0_vout.dev_attr.attr,
-    &sensor_dev_attr_avs1_vout.dev_attr.attr,
-    &sensor_dev_attr_avs0_vout_max.dev_attr.attr,
-    &sensor_dev_attr_avs0_vout_min.dev_attr.attr,
-    &sensor_dev_attr_avs1_vout_max.dev_attr.attr,
-    &sensor_dev_attr_avs1_vout_min.dev_attr.attr,
-    NULL,
-};
-
-static const struct attribute_group avs_ctrl_group = {
-    .attrs = avs_ctrl_attrs,
-};
-
-static const struct attribute_group *xdpe122_attribute_groups[] = {
-    &avs_ctrl_group,
-    NULL,
-};
-
-static int xdpe122_read_word_data(struct i2c_client *client, int page,
-				  int phase, int reg)
-{
-	const struct pmbus_driver_info *info = wb_pmbus_get_driver_info(client);
-	long val;
-	s16 exponent;
-	s32 mantissa;
-	int ret;
-
-	switch (reg) {
-	case PMBUS_VOUT_OV_FAULT_LIMIT:
-	case PMBUS_VOUT_UV_FAULT_LIMIT:
-		ret = wb_pmbus_read_word_data(client, page, phase, reg);
-		if (ret < 0)
-			return ret;
-
-		/* Convert register value to LINEAR11 data. */
-		exponent = ((s16)ret) >> 11;
-		mantissa = ((s16)((ret & GENMASK(10, 0)) << 5)) >> 5;
-		val = mantissa * 1000L;
-		if (exponent >= 0)
-			val <<= exponent;
-		else
-			val >>= -exponent;
-
-		/* Convert data to VID register. */
-		switch (info->vrm_version[page]) {
-		case vr13:
-			if (val >= 500)
-				return 1 + DIV_ROUND_CLOSEST(val - 500, 10);
-			return 0;
-		case vr12:
-			if (val >= 250)
-				return 1 + DIV_ROUND_CLOSEST(val - 250, 5);
-			return 0;
-		case imvp9:
-			if (val >= 200)
-				return 1 + DIV_ROUND_CLOSEST(val - 200, 10);
-			return 0;
-		case amd625mv:
-			if (val >= 200 && val <= 1550)
-				return DIV_ROUND_CLOSEST((1550 - val) * 100,
-							 625);
-			return 0;
-		default:
-			return -EINVAL;
-		}
-	default:
-		return -ENODATA;
-	}
-
-	return 0;
-}
-
-static int xdpe122_identify(struct i2c_client *client,
-			    struct pmbus_driver_info *info)
-{
-	u8 vout_params;
-	int i, ret;
-
-	for (i = 0; i < XDPE122_PAGE_NUM; i++) {
-		/* Read the register with VOUT scaling value.*/
-		ret = wb_pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE);
-		if (ret < 0)
-			return ret;
-
-		vout_params = ret & GENMASK(4, 0);
-
-		switch (vout_params) {
-		case XDPE122_PROT_VR12_5_10MV:
-			info->vrm_version[i] = vr13;
-			break;
-		case XDPE122_PROT_VR12_5MV:
-			info->vrm_version[i] = vr12;
-			break;
-		case XDPE122_PROT_IMVP9_10MV:
-			info->vrm_version[i] = imvp9;
-			break;
-		case XDPE122_AMD_625MV:
-			info->vrm_version[i] = amd625mv;
-			break;
-		default:
-			return -EINVAL;
-		}
-	}
-
-	return 0;
-}
-
-static struct pmbus_driver_info xdpe122_info = {
-	.pages = XDPE122_PAGE_NUM,
-	.format[PSC_VOLTAGE_IN] = linear,
-	.format[PSC_VOLTAGE_OUT] = vid,
-	.format[PSC_TEMPERATURE] = linear,
-	.format[PSC_CURRENT_IN] = linear,
-	.format[PSC_CURRENT_OUT] = linear,
-	.format[PSC_POWER] = linear,
-	.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
-		PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
-		PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
-		PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT,
-	.func[1] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
-		PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
-		PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
-		PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT,
-	.groups = xdpe122_attribute_groups,
-	.identify = xdpe122_identify,
-	.read_word_data = xdpe122_read_word_data,
-};
-
-static int xdpe122_probe(struct i2c_client *client)
-{
-	struct pmbus_driver_info *info;
-
-	info = devm_kmemdup(&client->dev, &xdpe122_info, sizeof(*info),
-			    GFP_KERNEL);
-	if (!info)
-		return -ENOMEM;
-
-	return wb_pmbus_do_probe(client, info);
-}
-
-static const struct i2c_device_id xdpe122_id[] = {
-	{"wb_xdpe12254", 0},
-	{"wb_xdpe12284", 0},
-	{}
-};
-
-MODULE_DEVICE_TABLE(i2c, xdpe122_id);
-
-static const struct of_device_id __maybe_unused xdpe122_of_match[] = {
-	{.compatible = "infineon,wb_xdpe12254"},
-	{.compatible = "infineon,wb_xdpe12284"},
-	{}
-};
-MODULE_DEVICE_TABLE(of, xdpe122_of_match);
-
-static struct i2c_driver xdpe122_driver = {
-	.driver = {
-		.name = "wb_xdpe12284",
-		.of_match_table = of_match_ptr(xdpe122_of_match),
-	},
-	.probe_new = xdpe122_probe,
-	.remove = wb_pmbus_do_remove,
-	.id_table = xdpe122_id,
-};
-
-module_i2c_driver(xdpe122_driver);
-
-MODULE_AUTHOR("Vadim Pasternak <vadimp@mellanox.com>");
-MODULE_DESCRIPTION("PMBus driver for Infineon XDPE122 family");
-MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pmbus.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/pmbus.h
new file mode 100755
index 000000000000..10fb17879f8e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/pmbus.h
@@ -0,0 +1,511 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * pmbus.h - Common defines and structures for PMBus devices
+ *
+ * Copyright (c) 2010, 2011 Ericsson AB.
+ * Copyright (c) 2012 Guenter Roeck
+ */
+
+#ifndef PMBUS_H
+#define PMBUS_H
+
+#include <linux/bitops.h>
+#include <linux/regulator/driver.h>
+
+/*
+ * Registers
+ */
+enum pmbus_regs {
+	PMBUS_PAGE			= 0x00,
+	PMBUS_OPERATION			= 0x01,
+	PMBUS_ON_OFF_CONFIG		= 0x02,
+	PMBUS_CLEAR_FAULTS		= 0x03,
+	PMBUS_PHASE			= 0x04,
+
+	PMBUS_WRITE_PROTECT		= 0x10,
+
+	PMBUS_CAPABILITY		= 0x19,
+	PMBUS_QUERY			= 0x1A,
+
+	PMBUS_VOUT_MODE			= 0x20,
+	PMBUS_VOUT_COMMAND		= 0x21,
+	PMBUS_VOUT_TRIM			= 0x22,
+	PMBUS_VOUT_CAL_OFFSET		= 0x23,
+	PMBUS_VOUT_MAX			= 0x24,
+	PMBUS_VOUT_MARGIN_HIGH		= 0x25,
+	PMBUS_VOUT_MARGIN_LOW		= 0x26,
+	PMBUS_VOUT_TRANSITION_RATE	= 0x27,
+	PMBUS_VOUT_DROOP		= 0x28,
+	PMBUS_VOUT_SCALE_LOOP		= 0x29,
+	PMBUS_VOUT_SCALE_MONITOR	= 0x2A,
+
+	PMBUS_COEFFICIENTS		= 0x30,
+	PMBUS_POUT_MAX			= 0x31,
+
+	PMBUS_FAN_CONFIG_12		= 0x3A,
+	PMBUS_FAN_COMMAND_1		= 0x3B,
+	PMBUS_FAN_COMMAND_2		= 0x3C,
+	PMBUS_FAN_CONFIG_34		= 0x3D,
+	PMBUS_FAN_COMMAND_3		= 0x3E,
+	PMBUS_FAN_COMMAND_4		= 0x3F,
+
+	PMBUS_VOUT_OV_FAULT_LIMIT	= 0x40,
+	PMBUS_VOUT_OV_FAULT_RESPONSE	= 0x41,
+	PMBUS_VOUT_OV_WARN_LIMIT	= 0x42,
+	PMBUS_VOUT_UV_WARN_LIMIT	= 0x43,
+	PMBUS_VOUT_UV_FAULT_LIMIT	= 0x44,
+	PMBUS_VOUT_UV_FAULT_RESPONSE	= 0x45,
+	PMBUS_IOUT_OC_FAULT_LIMIT	= 0x46,
+	PMBUS_IOUT_OC_FAULT_RESPONSE	= 0x47,
+	PMBUS_IOUT_OC_LV_FAULT_LIMIT	= 0x48,
+	PMBUS_IOUT_OC_LV_FAULT_RESPONSE	= 0x49,
+	PMBUS_IOUT_OC_WARN_LIMIT	= 0x4A,
+	PMBUS_IOUT_UC_FAULT_LIMIT	= 0x4B,
+	PMBUS_IOUT_UC_FAULT_RESPONSE	= 0x4C,
+
+	PMBUS_OT_FAULT_LIMIT		= 0x4F,
+	PMBUS_OT_FAULT_RESPONSE		= 0x50,
+	PMBUS_OT_WARN_LIMIT		= 0x51,
+	PMBUS_UT_WARN_LIMIT		= 0x52,
+	PMBUS_UT_FAULT_LIMIT		= 0x53,
+	PMBUS_UT_FAULT_RESPONSE		= 0x54,
+	PMBUS_VIN_OV_FAULT_LIMIT	= 0x55,
+	PMBUS_VIN_OV_FAULT_RESPONSE	= 0x56,
+	PMBUS_VIN_OV_WARN_LIMIT		= 0x57,
+	PMBUS_VIN_UV_WARN_LIMIT		= 0x58,
+	PMBUS_VIN_UV_FAULT_LIMIT	= 0x59,
+
+	PMBUS_IIN_OC_FAULT_LIMIT	= 0x5B,
+	PMBUS_IIN_OC_WARN_LIMIT		= 0x5D,
+
+	PMBUS_POUT_OP_FAULT_LIMIT	= 0x68,
+	PMBUS_POUT_OP_WARN_LIMIT	= 0x6A,
+	PMBUS_PIN_OP_WARN_LIMIT		= 0x6B,
+
+	PMBUS_STATUS_BYTE		= 0x78,
+	PMBUS_STATUS_WORD		= 0x79,
+	PMBUS_STATUS_VOUT		= 0x7A,
+	PMBUS_STATUS_IOUT		= 0x7B,
+	PMBUS_STATUS_INPUT		= 0x7C,
+	PMBUS_STATUS_TEMPERATURE	= 0x7D,
+	PMBUS_STATUS_CML		= 0x7E,
+	PMBUS_STATUS_OTHER		= 0x7F,
+	PMBUS_STATUS_MFR_SPECIFIC	= 0x80,
+	PMBUS_STATUS_FAN_12		= 0x81,
+	PMBUS_STATUS_FAN_34		= 0x82,
+
+	PMBUS_READ_VIN			= 0x88,
+	PMBUS_READ_IIN			= 0x89,
+	PMBUS_READ_VCAP			= 0x8A,
+	PMBUS_READ_VOUT			= 0x8B,
+	PMBUS_READ_IOUT			= 0x8C,
+	PMBUS_READ_TEMPERATURE_1	= 0x8D,
+	PMBUS_READ_TEMPERATURE_2	= 0x8E,
+	PMBUS_READ_TEMPERATURE_3	= 0x8F,
+	PMBUS_READ_FAN_SPEED_1		= 0x90,
+	PMBUS_READ_FAN_SPEED_2		= 0x91,
+	PMBUS_READ_FAN_SPEED_3		= 0x92,
+	PMBUS_READ_FAN_SPEED_4		= 0x93,
+	PMBUS_READ_DUTY_CYCLE		= 0x94,
+	PMBUS_READ_FREQUENCY		= 0x95,
+	PMBUS_READ_POUT			= 0x96,
+	PMBUS_READ_PIN			= 0x97,
+
+	PMBUS_REVISION			= 0x98,
+	PMBUS_MFR_ID			= 0x99,
+	PMBUS_MFR_MODEL			= 0x9A,
+	PMBUS_MFR_REVISION		= 0x9B,
+	PMBUS_MFR_LOCATION		= 0x9C,
+	PMBUS_MFR_DATE			= 0x9D,
+	PMBUS_MFR_SERIAL		= 0x9E,
+
+	PMBUS_MFR_VIN_MIN		= 0xA0,
+	PMBUS_MFR_VIN_MAX		= 0xA1,
+	PMBUS_MFR_IIN_MAX		= 0xA2,
+	PMBUS_MFR_PIN_MAX		= 0xA3,
+	PMBUS_MFR_VOUT_MIN		= 0xA4,
+	PMBUS_MFR_VOUT_MAX		= 0xA5,
+	PMBUS_MFR_IOUT_MAX		= 0xA6,
+	PMBUS_MFR_POUT_MAX		= 0xA7,
+
+	PMBUS_IC_DEVICE_ID		= 0xAD,
+	PMBUS_IC_DEVICE_REV		= 0xAE,
+
+	PMBUS_MFR_MAX_TEMP_1		= 0xC0,
+	PMBUS_MFR_MAX_TEMP_2		= 0xC1,
+	PMBUS_MFR_MAX_TEMP_3		= 0xC2,
+
+/*
+ * Virtual registers.
+ * Useful to support attributes which are not supported by standard PMBus
+ * registers but exist as manufacturer specific registers on individual chips.
+ * Must be mapped to real registers in device specific code.
+ *
+ * Semantics:
+ * Virtual registers are all word size.
+ * READ registers are read-only; writes are either ignored or return an error.
+ * RESET registers are read/write. Reading reset registers returns zero
+ * (used for detection), writing any value causes the associated history to be
+ * reset.
+ * Virtual registers have to be handled in device specific driver code. Chip
+ * driver code returns non-negative register values if a virtual register is
+ * supported, or a negative error code if not. The chip driver may return
+ * -ENODATA or any other error code in this case, though an error code other
+ * than -ENODATA is handled more efficiently and thus preferred. Either case,
+ * the calling PMBus core code will abort if the chip driver returns an error
+ * code when reading or writing virtual registers.
+ */
+	PMBUS_VIRT_BASE			= 0x100,
+	PMBUS_VIRT_READ_TEMP_AVG,
+	PMBUS_VIRT_READ_TEMP_MIN,
+	PMBUS_VIRT_READ_TEMP_MAX,
+	PMBUS_VIRT_RESET_TEMP_HISTORY,
+	PMBUS_VIRT_READ_VIN_AVG,
+	PMBUS_VIRT_READ_VIN_MIN,
+	PMBUS_VIRT_READ_VIN_MAX,
+	PMBUS_VIRT_RESET_VIN_HISTORY,
+	PMBUS_VIRT_READ_IIN_AVG,
+	PMBUS_VIRT_READ_IIN_MIN,
+	PMBUS_VIRT_READ_IIN_MAX,
+	PMBUS_VIRT_RESET_IIN_HISTORY,
+	PMBUS_VIRT_READ_PIN_AVG,
+	PMBUS_VIRT_READ_PIN_MIN,
+	PMBUS_VIRT_READ_PIN_MAX,
+	PMBUS_VIRT_RESET_PIN_HISTORY,
+	PMBUS_VIRT_READ_POUT_AVG,
+	PMBUS_VIRT_READ_POUT_MIN,
+	PMBUS_VIRT_READ_POUT_MAX,
+	PMBUS_VIRT_RESET_POUT_HISTORY,
+	PMBUS_VIRT_READ_VOUT_AVG,
+	PMBUS_VIRT_READ_VOUT_MIN,
+	PMBUS_VIRT_READ_VOUT_MAX,
+	PMBUS_VIRT_RESET_VOUT_HISTORY,
+	PMBUS_VIRT_READ_IOUT_AVG,
+	PMBUS_VIRT_READ_IOUT_MIN,
+	PMBUS_VIRT_READ_IOUT_MAX,
+	PMBUS_VIRT_RESET_IOUT_HISTORY,
+	PMBUS_VIRT_READ_TEMP2_AVG,
+	PMBUS_VIRT_READ_TEMP2_MIN,
+	PMBUS_VIRT_READ_TEMP2_MAX,
+	PMBUS_VIRT_RESET_TEMP2_HISTORY,
+
+	PMBUS_VIRT_READ_VMON,
+	PMBUS_VIRT_VMON_UV_WARN_LIMIT,
+	PMBUS_VIRT_VMON_OV_WARN_LIMIT,
+	PMBUS_VIRT_VMON_UV_FAULT_LIMIT,
+	PMBUS_VIRT_VMON_OV_FAULT_LIMIT,
+	PMBUS_VIRT_STATUS_VMON,
+
+	/*
+	 * RPM and PWM Fan control
+	 *
+	 * Drivers wanting to expose PWM control must define the behaviour of
+	 * PMBUS_VIRT_PWM_[1-4] and PMBUS_VIRT_PWM_ENABLE_[1-4] in the
+	 * {read,write}_word_data callback.
+	 *
+	 * pmbus core provides a default implementation for
+	 * PMBUS_VIRT_FAN_TARGET_[1-4].
+	 *
+	 * TARGET, PWM and PWM_ENABLE members must be defined sequentially;
+	 * pmbus core uses the difference between the provided register and
+	 * it's _1 counterpart to calculate the FAN/PWM ID.
+	 */
+	PMBUS_VIRT_FAN_TARGET_1,
+	PMBUS_VIRT_FAN_TARGET_2,
+	PMBUS_VIRT_FAN_TARGET_3,
+	PMBUS_VIRT_FAN_TARGET_4,
+	PMBUS_VIRT_PWM_1,
+	PMBUS_VIRT_PWM_2,
+	PMBUS_VIRT_PWM_3,
+	PMBUS_VIRT_PWM_4,
+	PMBUS_VIRT_PWM_ENABLE_1,
+	PMBUS_VIRT_PWM_ENABLE_2,
+	PMBUS_VIRT_PWM_ENABLE_3,
+	PMBUS_VIRT_PWM_ENABLE_4,
+
+	/* Samples for average
+	 *
+	 * Drivers wanting to expose functionality for changing the number of
+	 * samples used for average values should implement support in
+	 * {read,write}_word_data callback for either PMBUS_VIRT_SAMPLES if it
+	 * applies to all types of measurements, or any number of specific
+	 * PMBUS_VIRT_*_SAMPLES registers to allow for individual control.
+	 */
+	PMBUS_VIRT_SAMPLES,
+	PMBUS_VIRT_IN_SAMPLES,
+	PMBUS_VIRT_CURR_SAMPLES,
+	PMBUS_VIRT_POWER_SAMPLES,
+	PMBUS_VIRT_TEMP_SAMPLES,
+};
+
+/*
+ * OPERATION
+ */
+#define PB_OPERATION_CONTROL_ON		BIT(7)
+
+/*
+ * WRITE_PROTECT
+ */
+#define PB_WP_ALL	BIT(7)	/* all but WRITE_PROTECT */
+#define PB_WP_OP	BIT(6)	/* all but WP, OPERATION, PAGE */
+#define PB_WP_VOUT	BIT(5)	/* all but WP, OPERATION, PAGE, VOUT, ON_OFF */
+
+#define PB_WP_ANY	(PB_WP_ALL | PB_WP_OP | PB_WP_VOUT)
+
+/*
+ * CAPABILITY
+ */
+#define PB_CAPABILITY_SMBALERT		BIT(4)
+#define PB_CAPABILITY_ERROR_CHECK	BIT(7)
+
+/*
+ * VOUT_MODE
+ */
+#define PB_VOUT_MODE_MODE_MASK		0xe0
+#define PB_VOUT_MODE_PARAM_MASK		0x1f
+
+#define PB_VOUT_MODE_LINEAR		0x00
+#define PB_VOUT_MODE_VID		0x20
+#define PB_VOUT_MODE_DIRECT		0x40
+
+/*
+ * Fan configuration
+ */
+#define PB_FAN_2_PULSE_MASK		(BIT(0) | BIT(1))
+#define PB_FAN_2_RPM			BIT(2)
+#define PB_FAN_2_INSTALLED		BIT(3)
+#define PB_FAN_1_PULSE_MASK		(BIT(4) | BIT(5))
+#define PB_FAN_1_RPM			BIT(6)
+#define PB_FAN_1_INSTALLED		BIT(7)
+
+enum pmbus_fan_mode { percent = 0, rpm };
+
+/*
+ * STATUS_BYTE, STATUS_WORD (lower)
+ */
+#define PB_STATUS_NONE_ABOVE		BIT(0)
+#define PB_STATUS_CML			BIT(1)
+#define PB_STATUS_TEMPERATURE		BIT(2)
+#define PB_STATUS_VIN_UV		BIT(3)
+#define PB_STATUS_IOUT_OC		BIT(4)
+#define PB_STATUS_VOUT_OV		BIT(5)
+#define PB_STATUS_OFF			BIT(6)
+#define PB_STATUS_BUSY			BIT(7)
+
+/*
+ * STATUS_WORD (upper)
+ */
+#define PB_STATUS_UNKNOWN		BIT(8)
+#define PB_STATUS_OTHER			BIT(9)
+#define PB_STATUS_FANS			BIT(10)
+#define PB_STATUS_POWER_GOOD_N		BIT(11)
+#define PB_STATUS_WORD_MFR		BIT(12)
+#define PB_STATUS_INPUT			BIT(13)
+#define PB_STATUS_IOUT_POUT		BIT(14)
+#define PB_STATUS_VOUT			BIT(15)
+
+/*
+ * STATUS_IOUT
+ */
+#define PB_POUT_OP_WARNING		BIT(0)
+#define PB_POUT_OP_FAULT		BIT(1)
+#define PB_POWER_LIMITING		BIT(2)
+#define PB_CURRENT_SHARE_FAULT		BIT(3)
+#define PB_IOUT_UC_FAULT		BIT(4)
+#define PB_IOUT_OC_WARNING		BIT(5)
+#define PB_IOUT_OC_LV_FAULT		BIT(6)
+#define PB_IOUT_OC_FAULT		BIT(7)
+
+/*
+ * STATUS_VOUT, STATUS_INPUT
+ */
+#define PB_VOLTAGE_VIN_OFF		BIT(3)
+#define PB_VOLTAGE_UV_FAULT		BIT(4)
+#define PB_VOLTAGE_UV_WARNING		BIT(5)
+#define PB_VOLTAGE_OV_WARNING		BIT(6)
+#define PB_VOLTAGE_OV_FAULT		BIT(7)
+
+/*
+ * STATUS_INPUT
+ */
+#define PB_PIN_OP_WARNING		BIT(0)
+#define PB_IIN_OC_WARNING		BIT(1)
+#define PB_IIN_OC_FAULT			BIT(2)
+
+/*
+ * STATUS_TEMPERATURE
+ */
+#define PB_TEMP_UT_FAULT		BIT(4)
+#define PB_TEMP_UT_WARNING		BIT(5)
+#define PB_TEMP_OT_WARNING		BIT(6)
+#define PB_TEMP_OT_FAULT		BIT(7)
+
+/*
+ * STATUS_FAN
+ */
+#define PB_FAN_AIRFLOW_WARNING		BIT(0)
+#define PB_FAN_AIRFLOW_FAULT		BIT(1)
+#define PB_FAN_FAN2_SPEED_OVERRIDE	BIT(2)
+#define PB_FAN_FAN1_SPEED_OVERRIDE	BIT(3)
+#define PB_FAN_FAN2_WARNING		BIT(4)
+#define PB_FAN_FAN1_WARNING		BIT(5)
+#define PB_FAN_FAN2_FAULT		BIT(6)
+#define PB_FAN_FAN1_FAULT		BIT(7)
+
+/*
+ * CML_FAULT_STATUS
+ */
+#define PB_CML_FAULT_OTHER_MEM_LOGIC	BIT(0)
+#define PB_CML_FAULT_OTHER_COMM		BIT(1)
+#define PB_CML_FAULT_PROCESSOR		BIT(3)
+#define PB_CML_FAULT_MEMORY		BIT(4)
+#define PB_CML_FAULT_PACKET_ERROR	BIT(5)
+#define PB_CML_FAULT_INVALID_DATA	BIT(6)
+#define PB_CML_FAULT_INVALID_COMMAND	BIT(7)
+
+enum pmbus_sensor_classes {
+	PSC_VOLTAGE_IN = 0,
+	PSC_VOLTAGE_OUT,
+	PSC_CURRENT_IN,
+	PSC_CURRENT_OUT,
+	PSC_POWER,
+	PSC_TEMPERATURE,
+	PSC_FAN,
+	PSC_PWM,
+	PSC_NUM_CLASSES		/* Number of power sensor classes */
+};
+
+#define PMBUS_PAGES	32	/* Per PMBus specification */
+#define PMBUS_PHASES	10	/* Maximum number of phases per page */
+
+/* Functionality bit mask */
+#define PMBUS_HAVE_VIN		BIT(0)
+#define PMBUS_HAVE_VCAP		BIT(1)
+#define PMBUS_HAVE_VOUT		BIT(2)
+#define PMBUS_HAVE_IIN		BIT(3)
+#define PMBUS_HAVE_IOUT		BIT(4)
+#define PMBUS_HAVE_PIN		BIT(5)
+#define PMBUS_HAVE_POUT		BIT(6)
+#define PMBUS_HAVE_FAN12	BIT(7)
+#define PMBUS_HAVE_FAN34	BIT(8)
+#define PMBUS_HAVE_TEMP		BIT(9)
+#define PMBUS_HAVE_TEMP2	BIT(10)
+#define PMBUS_HAVE_TEMP3	BIT(11)
+#define PMBUS_HAVE_STATUS_VOUT	BIT(12)
+#define PMBUS_HAVE_STATUS_IOUT	BIT(13)
+#define PMBUS_HAVE_STATUS_INPUT	BIT(14)
+#define PMBUS_HAVE_STATUS_TEMP	BIT(15)
+#define PMBUS_HAVE_STATUS_FAN12	BIT(16)
+#define PMBUS_HAVE_STATUS_FAN34	BIT(17)
+#define PMBUS_HAVE_VMON		BIT(18)
+#define PMBUS_HAVE_STATUS_VMON	BIT(19)
+#define PMBUS_HAVE_PWM12	BIT(20)
+#define PMBUS_HAVE_PWM34	BIT(21)
+#define PMBUS_HAVE_SAMPLES	BIT(22)
+
+#define PMBUS_PHASE_VIRTUAL	BIT(30)	/* Phases on this page are virtual */
+#define PMBUS_PAGE_VIRTUAL	BIT(31)	/* Page is virtual */
+
+enum pmbus_data_format { linear = 0, ieee754, direct, vid };
+enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv };
+
+struct pmbus_driver_info {
+	int pages;		/* Total number of pages */
+	u8 phases[PMBUS_PAGES];	/* Number of phases per page */
+	enum pmbus_data_format format[PSC_NUM_CLASSES];
+	enum vrm_version vrm_version[PMBUS_PAGES]; /* vrm version per page */
+	/*
+	 * Support one set of coefficients for each sensor type
+	 * Used for chips providing data in direct mode.
+	 */
+	int m[PSC_NUM_CLASSES];	/* mantissa for direct data format */
+	int b[PSC_NUM_CLASSES];	/* offset */
+	int R[PSC_NUM_CLASSES];	/* exponent */
+
+	u32 func[PMBUS_PAGES];	/* Functionality, per page */
+	u32 pfunc[PMBUS_PHASES];/* Functionality, per phase */
+	/*
+	 * The following functions map manufacturing specific register values
+	 * to PMBus standard register values. Specify only if mapping is
+	 * necessary.
+	 * Functions return the register value (read) or zero (write) if
+	 * successful. A return value of -ENODATA indicates that there is no
+	 * manufacturer specific register, but that a standard PMBus register
+	 * may exist. Any other negative return value indicates that the
+	 * register does not exist, and that no attempt should be made to read
+	 * the standard register.
+	 */
+	int (*read_byte_data)(struct i2c_client *client, int page, int reg);
+	int (*read_word_data)(struct i2c_client *client, int page, int phase,
+			      int reg);
+	int (*write_byte_data)(struct i2c_client *client, int page, int reg,
+			      u8 byte);
+	int (*write_word_data)(struct i2c_client *client, int page, int reg,
+			       u16 word);
+	int (*write_byte)(struct i2c_client *client, int page, u8 value);
+	/*
+	 * The identify function determines supported PMBus functionality.
+	 * This function is only necessary if a chip driver supports multiple
+	 * chips, and the chip functionality is not pre-determined.
+	 */
+	int (*identify)(struct i2c_client *client,
+			struct pmbus_driver_info *info);
+
+	/* Regulator functionality, if supported by this chip driver. */
+	int num_regulators;
+	const struct regulator_desc *reg_desc;
+
+	/* custom attributes */
+	const struct attribute_group **groups;
+};
+
+/* Regulator ops */
+
+extern const struct regulator_ops pmbus_regulator_ops;
+
+/* Macros for filling in array of struct regulator_desc */
+#define PMBUS_REGULATOR_STEP(_name, _id, _voltages, _step)  \
+	[_id] = {						\
+		.name = (_name # _id),				\
+		.id = (_id),					\
+		.of_match = of_match_ptr(_name # _id),		\
+		.regulators_node = of_match_ptr("regulators"),	\
+		.ops = &pmbus_regulator_ops,			\
+		.type = REGULATOR_VOLTAGE,			\
+		.owner = THIS_MODULE,				\
+		.n_voltages = _voltages,			\
+		.uV_step = _step,				\
+	}
+
+#define PMBUS_REGULATOR(_name, _id)	PMBUS_REGULATOR_STEP(_name, _id, 0, 0)
+
+/* Function declarations */
+
+void pmbus_clear_cache(struct i2c_client *client);
+void pmbus_set_update(struct i2c_client *client, u8 reg, bool update);
+int pmbus_set_page(struct i2c_client *client, int page, int phase);
+int pmbus_read_word_data(struct i2c_client *client, int page, int phase,
+			 u8 reg);
+int pmbus_write_word_data(struct i2c_client *client, int page, u8 reg,
+			  u16 word);
+int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg);
+int pmbus_write_byte(struct i2c_client *client, int page, u8 value);
+int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg,
+			  u8 value);
+int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
+			   u8 mask, u8 value);
+void pmbus_clear_faults(struct i2c_client *client);
+bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg);
+bool pmbus_check_word_register(struct i2c_client *client, int page, int reg);
+int pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info);
+const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client
+						      *client);
+int pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id,
+			      enum pmbus_fan_mode mode);
+int pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id,
+			      enum pmbus_fan_mode mode);
+int pmbus_update_fan(struct i2c_client *client, int page, int id,
+		     u8 config, u8 mask, u16 command);
+struct dentry *pmbus_get_debugfs_dir(struct i2c_client *client);
+
+#endif /* PMBUS_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_csu550.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_csu550.c
similarity index 76%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_csu550.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/wb_csu550.c
index 36d07f071a71..0b95663b9bad 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_csu550.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_csu550.c
@@ -13,7 +13,7 @@
 #include <linux/mutex.h>
 #include <linux/i2c.h>
 #include <linux/pmbus.h>
-#include "wb_pmbus.h"
+#include "pmbus.h"
 
 struct pmbus_device_info {
     int pages;
@@ -31,54 +31,56 @@ static void pmbus_find_sensor_groups(struct i2c_client *client,
     int page;
 
     /* Sensors detected on page 0 only */
-    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_VIN))
+    if (pmbus_check_word_register(client, 0, PMBUS_READ_VIN))
         info->func[0] |= PMBUS_HAVE_VIN;
-    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_IIN))
+    if (pmbus_check_word_register(client, 0, PMBUS_READ_VCAP))
+        info->func[0] |= PMBUS_HAVE_VCAP;
+    if (pmbus_check_word_register(client, 0, PMBUS_READ_IIN))
         info->func[0] |= PMBUS_HAVE_IIN;
-    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_PIN))
+    if (pmbus_check_word_register(client, 0, PMBUS_READ_PIN))
         info->func[0] |= PMBUS_HAVE_PIN;
     if (info->func[0]
-        && wb_pmbus_check_byte_register(client, 0, PMBUS_STATUS_INPUT))
+        && pmbus_check_byte_register(client, 0, PMBUS_STATUS_INPUT))
         info->func[0] |= PMBUS_HAVE_STATUS_INPUT;
-    if (wb_pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_12) &&
-        wb_pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_1)) {
+    if (pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_12) &&
+        pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_1)) {
         info->func[0] |= PMBUS_HAVE_FAN12;
-        if (wb_pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_12))
+        if (pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_12))
             info->func[0] |= PMBUS_HAVE_STATUS_FAN12;
     }
-    if (wb_pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_34) &&
-        wb_pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_3)) {
+    if (pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_34) &&
+        pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_3)) {
         info->func[0] |= PMBUS_HAVE_FAN34;
-        if (wb_pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_34))
+        if (pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_34))
             info->func[0] |= PMBUS_HAVE_STATUS_FAN34;
     }
-    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_1))
+    if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_1))
         info->func[0] |= PMBUS_HAVE_TEMP;
-    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_2))
+    if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_2))
         info->func[0] |= PMBUS_HAVE_TEMP2;
-    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_3))
+    if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_3))
         info->func[0] |= PMBUS_HAVE_TEMP3;
     if (info->func[0] & (PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2
                  | PMBUS_HAVE_TEMP3)
-        && wb_pmbus_check_byte_register(client, 0,
+        && pmbus_check_byte_register(client, 0,
                      PMBUS_STATUS_TEMPERATURE))
             info->func[0] |= PMBUS_HAVE_STATUS_TEMP;
 
     /* Sensors detected on all pages */
     for (page = 0; page < info->pages; page++) {
-        if (wb_pmbus_check_word_register(client, page, PMBUS_READ_VOUT)) {
+        if (pmbus_check_word_register(client, page, PMBUS_READ_VOUT)) {
             info->func[page] |= PMBUS_HAVE_VOUT;
-            if (wb_pmbus_check_byte_register(client, page,
+            if (pmbus_check_byte_register(client, page,
                               PMBUS_STATUS_VOUT))
                 info->func[page] |= PMBUS_HAVE_STATUS_VOUT;
         }
-        if (wb_pmbus_check_word_register(client, page, PMBUS_READ_IOUT)) {
+        if (pmbus_check_word_register(client, page, PMBUS_READ_IOUT)) {
             info->func[page] |= PMBUS_HAVE_IOUT;
-            if (wb_pmbus_check_byte_register(client, 0,
+            if (pmbus_check_byte_register(client, 0,
                               PMBUS_STATUS_IOUT))
                 info->func[page] |= PMBUS_HAVE_STATUS_IOUT;
         }
-        if (wb_pmbus_check_word_register(client, page, PMBUS_READ_POUT))
+        if (pmbus_check_word_register(client, page, PMBUS_READ_POUT))
             info->func[page] |= PMBUS_HAVE_POUT;
     }
 }
@@ -98,26 +100,26 @@ static int pmbus_identify(struct i2c_client *client,
          * maximum number of pages has been reached. Assume that
          * this is the number of pages supported by the chip.
          */
-        if (wb_pmbus_check_byte_register(client, 0, PMBUS_PAGE)) {
+        if (pmbus_check_byte_register(client, 0, PMBUS_PAGE)) {
             int page;
 
             for (page = 1; page < PMBUS_PAGES; page++) {
-                if (wb_pmbus_set_page(client, page, 0xff) < 0)
+                if (pmbus_set_page(client, page, 0xff) < 0)
                     break;
             }
-            wb_pmbus_set_page(client, 0, 0xff);
+            pmbus_set_page(client, 0, 0xff);
             info->pages = page;
         } else {
             info->pages = 1;
         }
 
-        wb_pmbus_clear_faults(client);
+        pmbus_clear_faults(client);
     }
 
-    if (wb_pmbus_check_byte_register(client, 0, PMBUS_VOUT_MODE)) {
+    if (pmbus_check_byte_register(client, 0, PMBUS_VOUT_MODE)) {
         int vout_mode, i;
 
-        vout_mode = wb_pmbus_read_byte_data(client, 0, PMBUS_VOUT_MODE);
+        vout_mode = pmbus_read_byte_data(client, 0, PMBUS_VOUT_MODE);
         if (vout_mode >= 0 && vout_mode != 0xff) {
             switch (vout_mode >> 5) {
             case 0:
@@ -184,7 +186,7 @@ static int pmbus_probe(struct i2c_client *client)
     info->identify = pmbus_identify;
     dev->platform_data = pdata;
 
-    return wb_pmbus_do_probe(client, info);
+    return pmbus_do_probe(client, info);
 }
 
 static const struct pmbus_device_info pmbus_info_one = {
@@ -225,7 +227,6 @@ static struct i2c_driver pmbus_driver = {
            .name = "wb_pmbus",
            },
     .probe_new = pmbus_probe,
-    .remove = wb_pmbus_do_remove,
     .id_table = pmbus_id,
 };
 
@@ -234,3 +235,4 @@ module_i2c_driver(pmbus_driver);
 MODULE_AUTHOR("support");
 MODULE_DESCRIPTION("Generic PMBus driver");
 MODULE_LICENSE("GPL");
+MODULE_IMPORT_NS(PMBUS);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_gpio_device.c
similarity index 96%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio_device.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_gpio_device.c
index 1e1d815eedf1..80f18b2eab55 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio_device.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_gpio_device.c
@@ -64,7 +64,7 @@ static void i2c_gpio_release(struct device *dev)
 }
 
 static struct platform_device wb_i2c_gpio_device = {
-    .name       = "wb-i2c-gpio",
+    .name       = "i2c-gpio",
     .id     = -1,
     .num_resources  = 0,
     .resource   = NULL,
@@ -78,7 +78,7 @@ static struct platform_device wb_i2c_gpio_device = {
  * i2c
  */
 static struct gpiod_lookup_table wb_i2c_gpio_table = {
-    .dev_id = "wb-i2c-gpio",
+    .dev_id = "i2c-gpio",
     .table = {
         GPIO_LOOKUP("wb_gpio_d1500", 17, "sda",
                 GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
@@ -104,7 +104,7 @@ static int __init wb_i2c_gpio_device_init(void)
 
     if (bus_num >= 0) {
         wb_i2c_gpio_device.id = bus_num;
-        snprintf(i2c_gpio_dev_name, I2C_GPIO_DEV_NAME_LEN, "wb-i2c-gpio.%d", bus_num);
+        snprintf(i2c_gpio_dev_name, I2C_GPIO_DEV_NAME_LEN, "i2c-gpio.%d", bus_num);
         wb_i2c_gpio_table.dev_id = i2c_gpio_dev_name;
     }
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.c
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.h
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.h
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.h
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.c
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.h
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.h
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.h
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe132g5c_pmbus.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c_pmbus.c
similarity index 69%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe132g5c_pmbus.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c_pmbus.c
index dd7a97afb9ec..d1e0fa220725 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe132g5c_pmbus.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c_pmbus.c
@@ -8,7 +8,7 @@
 #include <linux/sysfs.h>
 #include <linux/delay.h>
 #include <linux/mutex.h>
-#include "wb_pmbus.h"
+#include "pmbus.h"
 
 static int g_wb_xdpe132g5_pmbus_debug = 0;
 static int g_wb_xdpe132g5_pmbus_error = 0;
@@ -57,23 +57,21 @@ static ssize_t set_xdpe132g5c_avs(struct device *dev, struct device_attribute *d
     unsigned long val;
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
     struct i2c_client *client = to_i2c_client(dev);
-    struct pmbus_data *data;
 
-    data = i2c_get_clientdata(client);
     ret = kstrtoul(buf, 0, &val);
     if (ret){
         return ret;
     }
-    mutex_lock(&data->update_lock);
+
     /* set value */
-    ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, (u16)val);
+    ret = pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, (u16)val);
     if (ret < 0) {
         WB_XDPE132G5_PMBUS_ERROR("set pmbus_vout_command fail\n");
         goto finish_set;
     }
 finish_set:
-    wb_pmbus_clear_faults(client);
-    mutex_unlock(&data->update_lock);
+    pmbus_clear_faults(client);
+
     return (ret < 0) ? ret : count;
 
 }
@@ -83,18 +81,15 @@ static ssize_t show_xdpe132g5c_avs(struct device *dev, struct device_attribute *
     int val;
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
     struct i2c_client *client = to_i2c_client(dev);
-    struct pmbus_data *data;
 
-    data = i2c_get_clientdata(client);
-    mutex_lock(&data->update_lock);
-    val = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
+    val = pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
     if (val < 0) {
         WB_XDPE132G5_PMBUS_ERROR("fail val = %d\n", val);
         goto finish_show;
     }
 finish_show:
-    wb_pmbus_clear_faults(client);
-    mutex_unlock(&data->update_lock);
+    pmbus_clear_faults(client);
+
     return snprintf(buf, BUF_SIZE, "0x%04x\n", val);
 }
 
@@ -102,7 +97,7 @@ static int xdpe_get_vout_precision(struct i2c_client *client, int page, int *vou
 {
     int i, vout_mode, a_size;
 
-    vout_mode = wb_pmbus_read_byte_data(client, page, PMBUS_VOUT_MODE);
+    vout_mode = pmbus_read_byte_data(client, page, PMBUS_VOUT_MODE);
     if (vout_mode < 0) {
         WB_XDPE132G5_PMBUS_ERROR("%d-%04x: read xdpe page%d vout mode reg: 0x%x failed, ret: %d\n",
             client->adapter->nr, client->addr, page, PMBUS_VOUT_MODE, vout_mode);
@@ -131,28 +126,23 @@ static ssize_t xdpe132g5_avs_vout_show(struct device *dev, struct device_attribu
 {
     struct i2c_client *client = to_i2c_client(dev->parent);
     struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
     int vout_cmd, ret, vout_precision;
     long vout;
 
-    mutex_lock(&data->update_lock);
     ret = xdpe_get_vout_precision(client, attr->index, &vout_precision);
     if (ret < 0) {
         WB_XDPE132G5_PMBUS_ERROR("%d-%04x: get xdpe avs%d vout precision failed, ret: %d\n",
             client->adapter->nr, client->addr, attr->index, ret);
-        mutex_unlock(&data->update_lock);
         return ret;
     }
 
-    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
+    vout_cmd = pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
     if (vout_cmd < 0) {
         WB_XDPE132G5_PMBUS_ERROR("%d-%04x: read page%d, vout command reg: 0x%x failed, ret: %d\n",
             client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd);
-        mutex_unlock(&data->update_lock);
         return vout_cmd;
     }
 
-    mutex_unlock(&data->update_lock);
     vout = vout_cmd * 1000L * 1000L / vout_precision;
     WB_XDPE132G5_PMBUS_DEBUG("%d-%04x: page%d vout: %ld, vout_cmd: 0x%x, precision: %d\n", client->adapter->nr,
         client->addr, attr->index, vout, vout_cmd, vout_precision);
@@ -164,8 +154,6 @@ static ssize_t xdpe132g5_avs_vout_store(struct device *dev, struct device_attrib
 {
     struct i2c_client *client = to_i2c_client(dev->parent);
     struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int vout_max, vout_min;
     int ret, vout_cmd, vout_cmd_set;
     int vout_precision;
     long vout;
@@ -187,20 +175,10 @@ static ssize_t xdpe132g5_avs_vout_store(struct device *dev, struct device_attrib
         return -EINVAL;
     }
 
-    vout_max = data->vout_max[attr->index];
-    vout_min = data->vout_min[attr->index];
-    if ((vout > vout_max) || (vout < vout_min)) {
-        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: vout value: %ld, out of range [%d, %d] \n", client->adapter->nr,
-            client->addr, vout, vout_min, vout_max);
-        return -EINVAL;
-    }
-
-    mutex_lock(&data->update_lock);
     ret = xdpe_get_vout_precision(client, attr->index, &vout_precision);
     if (ret < 0) {
         WB_XDPE132G5_PMBUS_ERROR("%d-%04x: get xdpe avs%d vout precision failed, ret: %d\n",
             client->adapter->nr, client->addr, attr->index, ret);
-        mutex_unlock(&data->update_lock);
         return ret;
     }
 
@@ -208,140 +186,42 @@ static ssize_t xdpe132g5_avs_vout_store(struct device *dev, struct device_attrib
     if (vout_cmd_set > 0xffff) {
         WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid value, page%d, vout: %ld, vout_precision: %d, vout_cmd_set: 0x%x\n",
             client->adapter->nr, client->addr, attr->index, vout, vout_precision, vout_cmd_set);
-        mutex_unlock(&data->update_lock);
         return -EINVAL;
     }
 
     /* set VOUT_COMMAND */
-    ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, (u16)vout_cmd_set);
+    ret = pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, (u16)vout_cmd_set);
     if (ret < 0) {
         WB_XDPE132G5_PMBUS_ERROR("%d-%04x: set xdpe page%d vout cmd reg: 0x%x, value: 0x%x failed, ret: %d\n",
             client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set, ret);
-        mutex_unlock(&data->update_lock);
         return ret;
     }
 
     /* read back VOUT_COMMAND */
-    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
+    vout_cmd = pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
     if (vout_cmd < 0) {
         WB_XDPE132G5_PMBUS_ERROR("%d-%04x: read page%d, vout command reg: 0x%x failed, ret: %d\n",
             client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd);
-        mutex_unlock(&data->update_lock);
         return vout_cmd;
     }
 
     if (vout_cmd != vout_cmd_set) {
         WB_XDPE132G5_PMBUS_ERROR("%d-%04x: page%d vout cmd value check error, vout cmd read: 0x%x, vout cmd set: 0x%x\n",
             client->adapter->nr, client->addr, attr->index, vout_cmd, vout_cmd_set);
-        mutex_unlock(&data->update_lock);
         return -EIO;
     }
-    mutex_unlock(&data->update_lock);
+
     WB_XDPE132G5_PMBUS_DEBUG("%d-%04x: set page%d vout cmd success, vout: %ld uV, vout_cmd_set: 0x%x\n",
         client->adapter->nr, client->addr, attr->index, vout, vout_cmd_set);
     return count;
 }
 
-static ssize_t xdpe132g5_avs_vout_max_store(struct device *dev,
-                   struct device_attribute *devattr, const char *buf, size_t count)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int ret, vout_threshold;
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    ret = kstrtoint(buf, 0, &vout_threshold);
-    if (ret) {
-        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
-        return -EINVAL;
-    }
-
-    WB_XDPE132G5_PMBUS_DEBUG("%d-%04x: vout%d max threshold: %d", client->adapter->nr, client->addr,
-        attr->index, vout_threshold);
-
-    data->vout_max[attr->index] = vout_threshold;
-    return count;
-}
-
-static ssize_t xdpe132g5_avs_vout_max_show(struct device *dev,
-                   struct device_attribute *devattr, char *buf)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_max[attr->index]);
-}
-
-static ssize_t xdpe132g5_avs_vout_min_store(struct device *dev,
-                   struct device_attribute *devattr, const char *buf, size_t count)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int ret, vout_threshold;
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    ret = kstrtoint(buf, 0, &vout_threshold);
-    if (ret) {
-        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
-        return -EINVAL;
-    }
-
-    WB_XDPE132G5_PMBUS_DEBUG("%d-%04x: vout%d min threshold: %d", client->adapter->nr, client->addr,
-        attr->index, vout_threshold);
-
-    data->vout_min[attr->index] = vout_threshold;
-    return count;
-}
-
-static ssize_t xdpe132g5_avs_vout_min_show(struct device *dev,
-                   struct device_attribute *devattr, char *buf)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_min[attr->index]);
-}
-
 static SENSOR_DEVICE_ATTR_RW(avs0_vout, xdpe132g5_avs_vout, 0);
 static SENSOR_DEVICE_ATTR_RW(avs1_vout, xdpe132g5_avs_vout, 1);
-static SENSOR_DEVICE_ATTR_RW(avs0_vout_max, xdpe132g5_avs_vout_max, 0);
-static SENSOR_DEVICE_ATTR_RW(avs0_vout_min, xdpe132g5_avs_vout_min, 0);
-static SENSOR_DEVICE_ATTR_RW(avs1_vout_max, xdpe132g5_avs_vout_max, 1);
-static SENSOR_DEVICE_ATTR_RW(avs1_vout_min, xdpe132g5_avs_vout_min, 1);
 
 static struct attribute *avs_ctrl_attrs[] = {
     &sensor_dev_attr_avs0_vout.dev_attr.attr,
     &sensor_dev_attr_avs1_vout.dev_attr.attr,
-    &sensor_dev_attr_avs0_vout_max.dev_attr.attr,
-    &sensor_dev_attr_avs0_vout_min.dev_attr.attr,
-    &sensor_dev_attr_avs1_vout_max.dev_attr.attr,
-    &sensor_dev_attr_avs1_vout_min.dev_attr.attr,
     NULL,
 };
 
@@ -375,7 +255,7 @@ static int xdpe132g5c_identify(struct i2c_client *client, struct pmbus_driver_in
     /* Read the register with VOUT scaling value.*/
     for (i = 0; i < XDPE132G5C_PAGE_NUM; i++) {
         for (retry = 0; retry < RETRY_TIME; retry++) {
-            ret = wb_pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE);
+            ret = pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE);
             if (ret < 0 || ret == 0xff) {
                 msleep(5);
                 continue;
@@ -460,7 +340,7 @@ static int xdpe132g5c_probe(struct i2c_client *client,
         return -ENOMEM;
     }
 
-    status = wb_pmbus_do_probe(client, &xdpe132g5c_info);
+    status = pmbus_do_probe(client, &xdpe132g5c_info);
     if (status != 0) {
         WB_XDPE132G5_PMBUS_ERROR("pmbus probe error %d\n", status);
         return status;
@@ -478,7 +358,6 @@ static int xdpe132g5c_probe(struct i2c_client *client,
 static void xdpe132g5c_remove(struct i2c_client *client)
 {
     sysfs_remove_group(&client->dev.kobj, &xdpe132g5c_sysfs_attrs_group);
-    wb_pmbus_do_remove(client);
     return;
 }
 
@@ -510,3 +389,4 @@ module_i2c_driver(xdpe132g5c_driver);
 MODULE_AUTHOR("support");
 MODULE_DESCRIPTION("PMBus driver for Infineon XDPE132g5 family");
 MODULE_LICENSE("GPL");
+MODULE_IMPORT_NS(PMBUS);
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/changelog b/platform/broadcom/sonic-platform-modules-micas/debian/changelog
index d908208c5e37..e4a1404b0997 100644
--- a/platform/broadcom/sonic-platform-modules-micas/debian/changelog
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/changelog
@@ -2,4 +2,4 @@ sonic-micas-platform-modules (1.0) unstable; urgency=low
 
   * Initial release
 
- -- support <support>  Fri, 21 APR 2017 11:11:11 -0800
+ -- support <support@micasnetworks.com> Mon, 12 Aug 2024 11:11:11 -0800
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
index 546e125314ff..3d212273ad7c 100755
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
@@ -5,7 +5,7 @@
 STARTMODULE = {
     "hal_fanctrl": 1,
     "hal_ledctrl": 1,
-    "avscontrol": 1,
+    "avscontrol": 0,
     "dev_monitor": 1,
     "pmon_syslog": 1,
     "tty_console": 1,
@@ -709,16 +709,12 @@
     }
 ]
 
-BLACKLIST_DRIVERS = [
-    {"name": "i2c_i801", "delay": 0},
-]
-
 DRIVERLISTS = [
-    {"name": "wb_i2c_i801", "delay": 0},
+    {"name": "i2c_i801", "delay": 0},
     {"name": "wb_gpio_d1500", "delay": 0},
     {"name": "i2c_dev", "delay": 0},
-    {"name": "wb_i2c_algo_bit", "delay": 0},
-    {"name": "wb_i2c_gpio", "delay": 0},
+    {"name": "i2c_algo_bit", "delay": 0},
+    {"name": "i2c_gpio", "delay": 0},
     {"name": "i2c_mux", "delay": 0},
     {"name": "wb_gpio_device", "delay": 0},
     {"name": "wb_i2c_gpio_device gpio_sda=17 gpio_scl=1 gpio_udelay=2", "delay": 0},
@@ -737,15 +733,15 @@
     {"name": "wb_i2c_mux_pca954x", "delay": 0},
     {"name": "wb_i2c_mux_pca954x_device", "delay": 0},
     {"name": "wb_i2c_dev_device", "delay": 0},
-    {"name": "wb_lm75", "delay": 0},
+    {"name": "lm75", "delay": 0},
     {"name": "optoe", "delay": 0},
     {"name": "at24", "delay": 0},
     {"name": "wb_mac_bsc", "delay": 0},
-    {"name": "wb_pmbus_core", "delay": 0},
-    {"name": "wb_isl68137", "delay": 0},
+    {"name": "pmbus_core", "delay": 0},
+    {"name": "isl68137", "delay": 0},
     {"name": "wb_csu550", "delay": 0},
-    {"name": "wb_ina3221", "delay": 0},
-    {"name": "wb_tps53622", "delay": 0},
+    {"name": "ina3221", "delay": 0},
+    {"name": "tps53679", "delay": 0},
     {"name": "plat_dfd", "delay": 0},
     {"name": "plat_switch", "delay": 0},
     {"name": "plat_fan", "delay": 0},
@@ -767,19 +763,19 @@
     {"name": "24c02", "bus": 25, "loc": 0x50},
     {"name": "wb_dps550", "bus": 25, "loc": 0x58},
     # temp
-    {"name": "wb_lm75", "bus": 3, "loc": 0x48},
-    {"name": "wb_lm75", "bus": 3, "loc": 0x49},
-    {"name": "wb_lm75", "bus": 3, "loc": 0x4a},
-    {"name": "wb_lm75", "bus": 3, "loc": 0x4b},
-    {"name": "wb_lm75", "bus": 3, "loc": 0x4c},
+    {"name": "lm75", "bus": 3, "loc": 0x48},
+    {"name": "lm75", "bus": 3, "loc": 0x49},
+    {"name": "lm75", "bus": 3, "loc": 0x4a},
+    {"name": "lm75", "bus": 3, "loc": 0x4b},
+    {"name": "lm75", "bus": 3, "loc": 0x4c},
     # dcdc
-    {"name": "wb_ina3221", "bus": 7, "loc": 0x40},
-    {"name": "wb_ina3221", "bus": 7, "loc": 0x41},
-    {"name": "wb_ina3221", "bus": 7, "loc": 0x42},
-    {"name": "wb_ina3221", "bus": 7, "loc": 0x43},
-    {"name": "wb_tps53622", "bus": 7, "loc": 0x60},
-    {"name": "wb_tps53622", "bus": 7, "loc": 0x6c},
-    {"name": "wb_isl68127", "bus": 7, "loc": 0x64},
+    {"name": "ina3221", "bus": 7, "loc": 0x40},
+    {"name": "ina3221", "bus": 7, "loc": 0x41},
+    {"name": "ina3221", "bus": 7, "loc": 0x42},
+    {"name": "ina3221", "bus": 7, "loc": 0x43},
+    {"name": "tps53688", "bus": 7, "loc": 0x60},
+    {"name": "tps53688", "bus": 7, "loc": 0x6c},
+    {"name": "isl68137", "bus": 7, "loc": 0x64},
 ]
 
 OPTOE = [
@@ -847,11 +843,11 @@
         {
             "name": "lm75",
             "device": [
-                {"id": "lm75_1", "name": "wb_lm75", "bus": 3, "loc": 0x48, "attr": "hwmon"},
-                {"id": "lm75_2", "name": "wb_lm75", "bus": 3, "loc": 0x49, "attr": "hwmon"},
-                {"id": "lm75_3", "name": "wb_lm75", "bus": 3, "loc": 0x4a, "attr": "hwmon"},
-                {"id": "lm75_4", "name": "wb_lm75", "bus": 3, "loc": 0x4b, "attr": "hwmon"},
-                {"id": "lm75_5", "name": "wb_lm75", "bus": 3, "loc": 0x4c, "attr": "hwmon"},
+                {"id": "lm75_1", "name": "lm75", "bus": 3, "loc": 0x48, "attr": "hwmon"},
+                {"id": "lm75_2", "name": "lm75", "bus": 3, "loc": 0x49, "attr": "hwmon"},
+                {"id": "lm75_3", "name": "lm75", "bus": 3, "loc": 0x4a, "attr": "hwmon"},
+                {"id": "lm75_4", "name": "lm75", "bus": 3, "loc": 0x4b, "attr": "hwmon"},
+                {"id": "lm75_5", "name": "lm75", "bus": 3, "loc": 0x4c, "attr": "hwmon"},
             ],
         },
         {
@@ -863,32 +859,33 @@
         {
             "name": "ina3221",
             "device": [
-                {"id": "ina3221_1", "name": "wb_ina3221", "bus": 7, "loc": 0x40, "attr": "hwmon"},
-                {"id": "ina3221_2", "name": "wb_ina3221", "bus": 7, "loc": 0x41, "attr": "hwmon"},
-                {"id": "ina3221_3", "name": "wb_ina3221", "bus": 7, "loc": 0x42, "attr": "hwmon"},
-                {"id": "ina3221_4", "name": "wb_ina3221", "bus": 7, "loc": 0x43, "attr": "hwmon"},
+                {"id": "ina3221_1", "name": "ina3221", "bus": 7, "loc": 0x40, "attr": "hwmon"},
+                {"id": "ina3221_2", "name": "ina3221", "bus": 7, "loc": 0x41, "attr": "hwmon"},
+                {"id": "ina3221_3", "name": "ina3221", "bus": 7, "loc": 0x42, "attr": "hwmon"},
+                {"id": "ina3221_4", "name": "ina3221", "bus": 7, "loc": 0x43, "attr": "hwmon"},
             ],
         },
         {
             "name": "tps53622",
             "device": [
-                {"id": "tps53622_1", "name": "wb_tps53622", "bus": 7, "loc": 0x60, "attr": "hwmon"},
-                {"id": "tps53622_2", "name": "wb_tps53622", "bus": 7, "loc": 0x6c, "attr": "hwmon"},
+                {"id": "tps53622_1", "name": "tps53688", "bus": 7, "loc": 0x60, "attr": "hwmon"},
+                {"id": "tps53622_2", "name": "tps53688", "bus": 7, "loc": 0x6c, "attr": "hwmon"},
             ],
         },
         {
-            "name": "isl68127",
+            "name": "isl68137",
             "device": [
-                {"id": "isl68127_1", "name": "wb_isl68127", "bus": 7, "loc": 0x64, "attr": "hwmon"},
+                {"id": "isl68137_1", "name": "isl68137", "bus": 7, "loc": 0x64, "attr": "hwmon"},
             ],
         }
     ],
 }
 
 INIT_PARAM_PRE = [
-    {"loc": "7-0064/hwmon/hwmon*/avs0_vout_max", "value": "900000"},
-    {"loc": "7-0064/hwmon/hwmon*/avs0_vout_min", "value": "750000"},
+    #{"loc": "7-0064/hwmon/hwmon*/avs0_vout_max", "value": "900000"},
+    #{"loc": "7-0064/hwmon/hwmon*/avs0_vout_min", "value": "750000"},
 ]
+
 INIT_COMMAND_PRE = [
     "i2cset -y -f 6 0x0d 0x91 0x48",
     "i2cset -y -f 6 0x0d 0x92 0x01",  # MAC_PWR_EN
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile
old mode 100755
new mode 100644
index 5573a18f0fcc..578b5fee1eba
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile
@@ -2,7 +2,6 @@ MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
 MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules)
 
 EXTRA_CFLAGS+= -I$(MODULES_DIR)
-EXTRA_CFLAGS+= -I$(MODULES_DIR)/linux
 
 obj-m :=  wb_pcie_dev_device.o
 obj-m += wb_i2c_mux_pca954x_device.o

From 007ccad7ec032df5ee4041ce56fbdcbefde1f8c8 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 21 Sep 2024 19:01:18 +0800
Subject: [PATCH 035/364] [submodule] Update submodule sonic-gnmi to the latest
 HEAD automatically (#20325)

#### Why I did it
src/sonic-gnmi
```
* 0f5c591 - (HEAD -> master, origin/master, origin/HEAD) Yang model change for bridge midplane (#281) (2 hours ago) [Gagan Punathil Ellath]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 95f4400d9698..0f5c591c225b 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 95f4400d96982c9f6a6a02ed62e30a9cb2454a85
+Subproject commit 0f5c591c225b54b4721c76dcafddc507e3472871

From 93fff33993c48cc035f8ced122a237d88b241127 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 21 Sep 2024 19:01:27 +0800
Subject: [PATCH 036/364] [submodule] Update submodule sonic-swss to the latest
 HEAD automatically (#20310)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

#### Why I did it
src/sonic-swss
```
* 9a6a86fe - (HEAD -> master, origin/master, origin/HEAD) Add FEC correctable bit error count to ports_stat_ids (#3291) (28 hours ago) [Prince George]
* 5126f88b - Fix the SAI status check for unsupported API on SAI_SWITCH_ATTR_SUPPO… (#3282) (32 hours ago) [DavidZagury]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 20e8b362a5e4..9a6a86fecb19 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 20e8b362a5e4fd5361a6f08effddd08d61d5d262
+Subproject commit 9a6a86fecb19efd8876ca7ab6bccdf6b68a13aa8

From 561479ec176910d1bee740e3f52732f3f29e3263 Mon Sep 17 00:00:00 2001
From: Zain Budhwani <99770260+zbud-msft@users.noreply.github.com>
Date: Mon, 23 Sep 2024 14:15:45 -0700
Subject: [PATCH 037/364] Move eventd enabled check from build time to runtime
 (#20248)

## How I did it

Remove eventd enabled/slim image check from Dockerfile (build time). As part of Dockerfile expose eventd_enabled and slim image flags to ENV which will be used docker_init/start.sh to check if rsyslog plugin should be moved to rsyslog.d

#### How to verify it

Manual test/pipeline
---
 dockers/docker-dhcp-relay/Dockerfile.j2         | 15 ++++++---------
 dockers/docker-dhcp-relay/docker_init.sh        |  3 +++
 dockers/docker-fpm-frr/Dockerfile.j2            | 13 ++++++-------
 dockers/docker-fpm-frr/docker_init.sh           |  3 +++
 dockers/docker-orchagent/Dockerfile.j2          | 15 ++++++---------
 dockers/docker-orchagent/docker-init.j2         |  3 +++
 files/build_templates/docker_image_ctl.j2       |  5 +++++
 files/build_templates/rsyslog_plugin.conf.j2    |  4 ++--
 files/build_templates/sonic_debian_extension.j2 | 11 +++++------
 9 files changed, 39 insertions(+), 33 deletions(-)

diff --git a/dockers/docker-dhcp-relay/Dockerfile.j2 b/dockers/docker-dhcp-relay/Dockerfile.j2
index 5b0dc82c314b..e7b70a954ce2 100644
--- a/dockers/docker-dhcp-relay/Dockerfile.j2
+++ b/dockers/docker-dhcp-relay/Dockerfile.j2
@@ -50,14 +50,11 @@ COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
 COPY ["critical_processes", "/etc/supervisor"]
 COPY ["cli", "/cli/"]
 
-{% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
-# Copy regex json and rsyslog_plugin.conf file into rsyslog.d
-COPY ["*.json", "/etc/rsyslog.d/"]
-COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"]
-# Create dhcp_relay_regex.conf
-RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json  > /etc/rsyslog.d/dhcp_relay_events.conf
-RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2
-RUN rm -f /etc/rsyslog.d/events_info.json
-{% endif %}
+RUN mkdir -p /usr/share/sonic/templates/rsyslog_plugin
+
+# Copy rsyslog plugin configuration file and regexes to docker
+COPY ["dhcp_relay_regex.json", "/etc/rsyslog.d/"]
+COPY ["events_info.json", "/usr/share/sonic/templates/rsyslog_plugin/"]
+COPY ["files/rsyslog_plugin.conf.j2", "/usr/share/sonic/templates/rsyslog_plugin/"]
 
 ENTRYPOINT ["/usr/bin/docker_init.sh"]
diff --git a/dockers/docker-dhcp-relay/docker_init.sh b/dockers/docker-dhcp-relay/docker_init.sh
index 1ff0e936ff68..94e2ddff0622 100755
--- a/dockers/docker-dhcp-relay/docker_init.sh
+++ b/dockers/docker-dhcp-relay/docker_init.sh
@@ -21,4 +21,7 @@ chmod +x /usr/bin/wait_for_intf.sh
 # The docker container should start this script as PID 1, so now that supervisord is
 # properly configured, we exec /usr/local/bin/supervisord so that it runs as PID 1 for the
 # duration of the container's lifetime
+export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state')
+j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json  > /etc/rsyslog.d/dhcp_relay_events.conf
+
 exec /usr/local/bin/supervisord
diff --git a/dockers/docker-fpm-frr/Dockerfile.j2 b/dockers/docker-fpm-frr/Dockerfile.j2
index 98c4593811f7..e39ffdadf4cc 100644
--- a/dockers/docker-fpm-frr/Dockerfile.j2
+++ b/dockers/docker-fpm-frr/Dockerfile.j2
@@ -59,12 +59,11 @@ RUN chmod a+x /usr/bin/TSA && \
     chmod a+x /usr/bin/TSC && \
     chmod a+x /usr/bin/zsocket.sh
 
-{% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
-COPY ["*.json", "/etc/rsyslog.d/"]
-COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"]
-RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json  > /etc/rsyslog.d/bgp_events.conf
-RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2
-RUN rm -f /etc/rsyslog.d/events_info.json
-{% endif %}
+RUN mkdir -p /usr/share/sonic/templates/rsyslog_plugin
+
+# Copy rsyslog plugin configuration file and regexes to docker
+COPY ["bgp_regex.json", "/etc/rsyslog.d/"]
+COPY ["events_info.json", "/usr/share/sonic/templates/rsyslog_plugin/"]
+COPY ["files/rsyslog_plugin.conf.j2", "/usr/share/sonic/templates/rsyslog_plugin/"]
 
 ENTRYPOINT ["/usr/bin/docker_init.sh"]
diff --git a/dockers/docker-fpm-frr/docker_init.sh b/dockers/docker-fpm-frr/docker_init.sh
index 662a78b5adcf..fbbcee8bd66c 100755
--- a/dockers/docker-fpm-frr/docker_init.sh
+++ b/dockers/docker-fpm-frr/docker_init.sh
@@ -112,4 +112,7 @@ TZ=$(cat /etc/timezone)
 rm -rf /etc/localtime
 ln -sf /usr/share/zoneinfo/$TZ /etc/localtime
 
+export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state')
+j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json  > /etc/rsyslog.d/bgp_events.conf
+
 exec /usr/local/bin/supervisord
diff --git a/dockers/docker-orchagent/Dockerfile.j2 b/dockers/docker-orchagent/Dockerfile.j2
index fb90b4f09c22..b3a7e49c3254 100755
--- a/dockers/docker-orchagent/Dockerfile.j2
+++ b/dockers/docker-orchagent/Dockerfile.j2
@@ -80,14 +80,11 @@ RUN sonic-cfggen -a "{\"ENABLE_ASAN\":\"{{ENABLE_ASAN}}\"}" -t /usr/share/sonic/
 RUN rm -f /usr/share/sonic/templates/docker-init.j2
 RUN chmod 755 /usr/bin/docker-init.sh
 
-{% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
-# Copy all regex json files and rsyslog_plugin.conf to rsyslog.d
-COPY ["*.json", "/etc/rsyslog.d/"]
-COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"]
-# Create swss rsyslog_plugin conf file
-RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json  > /etc/rsyslog.d/swss_events.conf
-RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2
-RUN rm -f /etc/rsyslog.d/events_info.json
-{% endif %}
+RUN mkdir -p /usr/share/sonic/templates/rsyslog_plugin
+
+# Copy rsyslog plugin configuration file and regexes to docker
+COPY ["swss_regex.json", "/etc/rsyslog.d/"]
+COPY ["events_info.json", "/usr/share/sonic/templates/rsyslog_plugin/"]
+COPY ["files/rsyslog_plugin.conf.j2", "/usr/share/sonic/templates/rsyslog_plugin/"]
 
 ENTRYPOINT ["/usr/bin/docker-init.sh"]
diff --git a/dockers/docker-orchagent/docker-init.j2 b/dockers/docker-orchagent/docker-init.j2
index 41dbe27285f1..143c9bd5229f 100755
--- a/dockers/docker-orchagent/docker-init.j2
+++ b/dockers/docker-orchagent/docker-init.j2
@@ -74,4 +74,7 @@ TZ=$(cat /etc/timezone)
 rm -rf /etc/localtime
 ln -sf /usr/share/zoneinfo/$TZ /etc/localtime
 
+export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state')
+j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json  > /etc/rsyslog.d/swss_events.conf
+
 exec /usr/local/bin/supervisord
diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 7e64845c8097..87f801c1549c 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -327,6 +327,11 @@ function postStartAction()
             docker cp $PSENSOR pmon:/usr/bin/
         fi
     fi
+{%- elif docker_container_name == "eventd" %}
+    export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state')
+    j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json  > /etc/rsyslog.d/host_events.conf
+    j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/syncd_events_info.json  > /etc/rsyslog.d/syncd_events.conf
+    systemctl restart rsyslog
 {%- else %}
     : # nothing
 {%- endif %}
diff --git a/files/build_templates/rsyslog_plugin.conf.j2 b/files/build_templates/rsyslog_plugin.conf.j2
index 56ec0f71d3f1..f69e58cf4313 100644
--- a/files/build_templates/rsyslog_plugin.conf.j2
+++ b/files/build_templates/rsyslog_plugin.conf.j2
@@ -1,7 +1,6 @@
 ## rsyslog-plugin for streaming telemetry via gnmi
 
-
-
+{% if ENVIRONMENT['EVENTD_STATE'] == "enabled" %}
 template(name="prog_msg" type="list") {
     property(name="msg")
     constant(value="\n")
@@ -16,3 +15,4 @@ if re_match($programname, "{{ proc.name }}") then {
         template="prog_msg")
 }
 {% endfor %}
+{% endif %}
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 5b5c6a080d15..68b57104bbb4 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -362,13 +362,16 @@ sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-db-cli_*.deb || \
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
 
 
-{% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
+{% if include_system_eventd == "y" %}
 # Install sonic-rsyslog-plugin
 sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-rsyslog-plugin_*.deb || \
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
 
 # Generate host conf for rsyslog_plugin
-j2 -f json $BUILD_TEMPLATES/rsyslog_plugin.conf.j2 $BUILD_TEMPLATES/events_info.json | sudo tee $FILESYSTEM_ROOT_ETC/rsyslog.d/host_events.conf
+sudo mkdir -p $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin
+sudo cp $BUILD_TEMPLATES/rsyslog_plugin.conf.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin/
+sudo cp $BUILD_TEMPLATES/events_info.json $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin/
+sudo cp $BUILD_TEMPLATES/syncd_events_info.json $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin/
 sudo cp $BUILD_TEMPLATES/monit_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
 sudo cp $BUILD_TEMPLATES/sshd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
 sudo cp $BUILD_TEMPLATES/systemd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
@@ -377,11 +380,7 @@ sudo cp $BUILD_TEMPLATES/dockerd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
 sudo cp $BUILD_TEMPLATES/seu_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
 sudo cp $BUILD_TEMPLATES/zebra_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
 sudo cp $BUILD_TEMPLATES/bgpd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
-
-
-j2 -f json $BUILD_TEMPLATES/rsyslog_plugin.conf.j2 $BUILD_TEMPLATES/syncd_events_info.json | sudo tee $FILESYSTEM_ROOT_ETC/rsyslog.d/syncd_events.conf
 sudo cp $BUILD_TEMPLATES/syncd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
-
 {% endif %}
 
 # Install custom-built monit package and SONiC configuration files

From 265a79f30f91b4be3a26bd53bd5892456a631f0a Mon Sep 17 00:00:00 2001
From: Zain Budhwani <99770260+zbud-msft@users.noreply.github.com>
Date: Mon, 23 Sep 2024 14:28:18 -0700
Subject: [PATCH 038/364] Add back publish events (#20306)

### Why I did it

https://github.com/sonic-net/sonic-buildimage/pull/19179 removed call to publish_events when memory usage container exceeds threshold, causing test_events to fail.

### How I did it

Add back call to publish_events

#### How to verify it

Manual test
---
 files/image_config/monit/memory_checker | 1 +
 1 file changed, 1 insertion(+)

diff --git a/files/image_config/monit/memory_checker b/files/image_config/monit/memory_checker
index 74779ffb3abc..6ea00cbc5e35 100755
--- a/files/image_config/monit/memory_checker
+++ b/files/image_config/monit/memory_checker
@@ -219,6 +219,7 @@ def check_memory_usage(container_name, threshold_value):
     if total_memory_usage > threshold_value:
         print("[{}]: Memory usage ({} Bytes) is larger than the threshold ({} Bytes)!"
               .format(container_name, total_memory_usage, threshold_value))
+        publish_events(container_name, "{:.2f}".format(total_memory_usage), str(threshold_value))
         sys.exit(EXCEED_THRESHOLD)
 
 def is_service_active(service_name):

From 783a5698b40dfab1302883ffbaf1893485d88de0 Mon Sep 17 00:00:00 2001
From: Vivek <vivekreddykarri98@gmail.com>
Date: Tue, 24 Sep 2024 10:01:44 -0700
Subject: [PATCH 039/364] [Mellanox] Disable SGX for SN5600/SN5400 platforms
 (#19701)

- Why I did it
Booting master/202405 images on SN5400 and SN5600 platforms is resulting the log

2024-07-23T21:01:07.972045+00:00 sonic kernel: [    0.110657] x86/cpu: SGX disabled by BIOS.
2024-07-23T21:01:07.972045+00:00 sonic kernel: [    0.110657] x86/cpu: SGX disabled by BIOS.
Processor on these systems supports the SGX but the BIOS does not. SGX feature is also not important and thus disable using the nosgx kernel boot parameter

- How I did it

- How to verify it
Added the parameter, reboot and check for log
---
 device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf | 2 +-
 device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf
index cdaaf72f616f..01fe2397ccd8 100644
--- a/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf
@@ -1 +1 @@
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="tpm_tis.interrupts=0"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="tpm_tis.interrupts=0 nosgx"
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf
index 71628d62e1f7..7be170196ce0 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf
@@ -1 +1 @@
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq tpm_tis.interrupts=0"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq tpm_tis.interrupts=0 nosgx"

From 73937cb202dfa0777235cbecda048d471a39e898 Mon Sep 17 00:00:00 2001
From: Stephen Sun <5379172+stephenxs@users.noreply.github.com>
Date: Wed, 25 Sep 2024 12:03:37 +0800
Subject: [PATCH 040/364] Update asic table template for shared headroom pool
 relevant information (#20085)

[Mellanox] Update asic table template for shared headroom pool relevant information

Signed-off-by: Stephen Sun <stephens@nvidia.com>
---
 platform/mellanox/asic_table.j2 | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/platform/mellanox/asic_table.j2 b/platform/mellanox/asic_table.j2
index 0069c6b77dfa..ede46d57619e 100644
--- a/platform/mellanox/asic_table.j2
+++ b/platform/mellanox/asic_table.j2
@@ -60,7 +60,9 @@
             "cell_size": "96",
             "pipeline_latency": "19",
             "mac_phy_delay": "0.8",
-            "peer_response_time": "3.8"
+            "peer_response_time": "3.8",
+            "port_reserved_shp": "20",
+            "port_max_shp": "8192"
         },
         "OP": "SET"
     }
@@ -70,7 +72,9 @@
             "cell_size": "144",
             "pipeline_latency": "19",
             "mac_phy_delay": "0.8",
-            "peer_response_time": "3.8"
+            "peer_response_time": "3.8",
+            "port_reserved_shp": "20",
+            "port_max_shp": "8192"
         },
         "OP": "SET"
     }
@@ -80,7 +84,9 @@
             "cell_size": "144",
             "pipeline_latency": "19",
             "mac_phy_delay": "0.8",
-            "peer_response_time": "3.8"
+            "peer_response_time": "3.8",
+            "port_reserved_shp": "20",
+            "port_max_shp": "8192"
         },
         "OP": "SET"
     }
@@ -90,7 +96,9 @@
             "cell_size": "192",
             "pipeline_latency": "19",
             "mac_phy_delay": "0.8",
-            "peer_response_time": "3.8"
+            "peer_response_time": "3.8",
+            "port_reserved_shp": "20",
+            "port_max_shp": "8192"
         },
         "OP": "SET"
     }

From 439e26612ffcfb3e4ee2bed16701a0b0070f6132 Mon Sep 17 00:00:00 2001
From: Longxiang Lyu <35479537+lolyu@users.noreply.github.com>
Date: Wed, 25 Sep 2024 14:18:28 +0800
Subject: [PATCH 041/364] [subnet decap] Flush state db tunnel && decap term
 entries when swss restarts (#20291)

Why I did it
When swss is restarted, let's cleanup the state db tunnel and decap term entries.

Signed-off-by: Longxiang Lyu lolv@microsoft.com

Work item tracking
Microsoft ADO (number only): 29507113

How I did it
flush the state db tunnel and decap term entries.

Signed-off-by: Longxiang Lyu <lolv@microsoft.com>
---
 files/scripts/swss.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/files/scripts/swss.sh b/files/scripts/swss.sh
index e00cc752ea04..35815fe4dfb9 100755
--- a/files/scripts/swss.sh
+++ b/files/scripts/swss.sh
@@ -328,7 +328,7 @@ start() {
         $SONIC_DB_CLI GB_ASIC_DB FLUSHDB
         $SONIC_DB_CLI GB_COUNTERS_DB FLUSHDB
         $SONIC_DB_CLI RESTAPI_DB FLUSHDB
-        clean_up_tables STATE_DB "'PORT_TABLE*', 'MGMT_PORT_TABLE*', 'VLAN_TABLE*', 'VLAN_MEMBER_TABLE*', 'LAG_TABLE*', 'LAG_MEMBER_TABLE*', 'INTERFACE_TABLE*', 'MIRROR_SESSION*', 'VRF_TABLE*', 'FDB_TABLE*', 'FG_ROUTE_TABLE*', 'BUFFER_POOL*', 'BUFFER_PROFILE*', 'MUX_CABLE_TABLE*', 'ADVERTISE_NETWORK_TABLE*', 'VXLAN_TUNNEL_TABLE*', 'VNET_ROUTE*', 'MACSEC_PORT_TABLE*', 'MACSEC_INGRESS_SA_TABLE*', 'MACSEC_EGRESS_SA_TABLE*', 'MACSEC_INGRESS_SC_TABLE*', 'MACSEC_EGRESS_SC_TABLE*', 'VRF_OBJECT_TABLE*', 'VNET_MONITOR_TABLE*', 'BFD_SESSION_TABLE*', 'SYSTEM_NEIGH_TABLE*', 'FABRIC_PORT_TABLE*'"
+        clean_up_tables STATE_DB "'PORT_TABLE*', 'MGMT_PORT_TABLE*', 'VLAN_TABLE*', 'VLAN_MEMBER_TABLE*', 'LAG_TABLE*', 'LAG_MEMBER_TABLE*', 'INTERFACE_TABLE*', 'MIRROR_SESSION*', 'VRF_TABLE*', 'FDB_TABLE*', 'FG_ROUTE_TABLE*', 'BUFFER_POOL*', 'BUFFER_PROFILE*', 'MUX_CABLE_TABLE*', 'ADVERTISE_NETWORK_TABLE*', 'VXLAN_TUNNEL_TABLE*', 'VNET_ROUTE*', 'MACSEC_PORT_TABLE*', 'MACSEC_INGRESS_SA_TABLE*', 'MACSEC_EGRESS_SA_TABLE*', 'MACSEC_INGRESS_SC_TABLE*', 'MACSEC_EGRESS_SC_TABLE*', 'VRF_OBJECT_TABLE*', 'VNET_MONITOR_TABLE*', 'BFD_SESSION_TABLE*', 'SYSTEM_NEIGH_TABLE*', 'FABRIC_PORT_TABLE*', 'TUNNEL_DECAP_TABLE*', 'TUNNEL_DECAP_TERM_TABLE*'"
         $SONIC_DB_CLI APPL_STATE_DB FLUSHDB
         clean_up_chassis_db_tables
         rm -rf /tmp/cache

From 8ad497f8cb5b4c21141e3c18e0140570956f6ef4 Mon Sep 17 00:00:00 2001
From: noaOrMlnx <58519608+noaOrMlnx@users.noreply.github.com>
Date: Wed, 25 Sep 2024 12:28:08 +0300
Subject: [PATCH 042/364] [Mellanox] Add SN5640 SIMX platform with default SKU
 (#20225)

- Why I did it
Introduce new Mellanox SIMX platform SN5640.
Number of up/down links - 256/256.
Default cable length for t0 - 40m.
Default cable length for t1 - 300m.
Default speed - 100G.

- How I did it
Added all relevant files of new SKU used for ASIC simulation

- How to verify it
Check that the SKU is up and running on simulation environment
---
 .../ACS-SN5640/buffers.json.j2                |    1 +
 .../ACS-SN5640/buffers_defaults_objects.j2    |    1 +
 .../ACS-SN5640/buffers_defaults_t0.j2         |   47 +
 .../ACS-SN5640/buffers_defaults_t1.j2         |   47 +
 .../ACS-SN5640/buffers_dynamic.json.j2        |   16 +
 .../create_only_config_db_buffers.json        |    7 +
 .../ACS-SN5640/hwsku.json                     |  202 +
 .../ACS-SN5640/pg_profile_lookup.ini          |   42 +
 .../ACS-SN5640/port_config.ini                |  532 +++
 .../ACS-SN5640/qos.json.j2                    |    1 +
 .../ACS-SN5640/sai.profile                    |    1 +
 .../ACS-SN5640/sai_5640.xml                   | 3637 +++++++++++++++++
 .../x86_64-nvidia_sn5640_simx-r0/default_sku  |    1 +
 .../platform.json                             | 1297 ++++++
 .../platform_asic                             |    1 +
 .../plugins/eeprom.py                         |    1 +
 .../plugins/psuutil.py                        |    1 +
 .../plugins/sfplpmget.py                      |    1 +
 .../plugins/sfplpmset.py                      |    1 +
 .../plugins/sfpreset.py                       |    1 +
 .../plugins/sfputil.py                        |    1 +
 .../pmon_daemon_control.json                  |    7 +
 .../system_health_monitoring_config.json      |    1 +
 platform/mellanox/asic_table.j2               |   11 +
 24 files changed, 5858 insertions(+)
 create mode 120000 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers.json.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_objects.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t0.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t1.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_dynamic.json.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/create_only_config_db_buffers.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/hwsku.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/pg_profile_lookup.ini
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/port_config.ini
 create mode 120000 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/qos.json.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai.profile
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai_5640.xml
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/default_sku
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform_asic
 create mode 120000 device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/eeprom.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/psuutil.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfplpmget.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfplpmset.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfpreset.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfputil.py
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/pmon_daemon_control.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn5640_simx-r0/system_health_monitoring_config.json

diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers.json.j2
new file mode 120000
index 000000000000..784bd5c08d14
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_objects.j2
new file mode 120000
index 000000000000..c01aebb7ae12
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_objects.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_objects.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t0.j2
new file mode 100644
index 000000000000..517e37b6e05a
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t0.j2
@@ -0,0 +1,47 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '40m' %}
+{% set ingress_lossless_pool_size =  '57828352' %}
+{% set ingress_lossless_pool_xoff =  '22544384' %}
+{% set egress_lossless_pool_size =  '136209408' %}
+{% set egress_lossy_pool_size =  '57828352' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t1.j2
new file mode 100644
index 000000000000..59dd8cf55649
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t1.j2
@@ -0,0 +1,47 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '300m' %}
+{% set ingress_lossless_pool_size =  '40002560' %}
+{% set ingress_lossless_pool_xoff =  '40370176' %}
+{% set egress_lossless_pool_size =  '136209408' %}
+{% set egress_lossy_pool_size =  '40002560' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_dynamic.json.j2
new file mode 100644
index 000000000000..b2cc958b7c45
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_dynamic.json.j2
@@ -0,0 +1,16 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{%- set default_topo = 't0' %}
+{%- set dynamic_mode = 'true' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/create_only_config_db_buffers.json
new file mode 100644
index 000000000000..6feb156714fe
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/create_only_config_db_buffers.json
@@ -0,0 +1,7 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "create_only_config_db_buffers": "true"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/hwsku.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/hwsku.json
new file mode 100644
index 000000000000..43d2fc1d25af
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/hwsku.json
@@ -0,0 +1,202 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet512": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet520": {
+            "default_brkout_mode": "1x25G[10G]"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/pg_profile_lookup.ini
new file mode 100644
index 000000000000..33878b38c6c2
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/pg_profile_lookup.ini
@@ -0,0 +1,42 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+#  PG lossless profiles.
+# speed cable  size   xon    xoff   threshold
+10000      5m  19456  19456  20480          0
+25000      5m  19456  19456  21504          0
+50000      5m  19456  19456  26624          0
+100000     5m  19456  19456  44032          0
+200000     5m  19456  19456  50176          0
+400000     5m  19456  19456  86016          0
+10000     30m  19456  19456  20480          0
+25000     30m  19456  19456  22528          0
+50000     30m  19456  19456  27648          0
+100000    30m  19456  19456  48128          0
+200000    30m  19456  19456  57344          0
+400000    30m  19456  19456  99328          0
+10000     40m  19456  19456  20480          0
+25000     40m  19456  19456  22528          0
+50000     40m  19456  19456  28672          0
+100000    40m  19456  19456  49152          0
+200000    40m  19456  19456  60416          0
+400000    40m  19456  19456  104448         0
+10000    300m  19456  19456  23552          0
+25000    300m  19456  19456  30720          0
+50000    300m  19456  19456  46080          0
+100000   300m  19456  19456  83968          0
+200000   300m  19456  19456  130048         0
+400000   300m  19456  19456  243712         0
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/port_config.ini b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/port_config.ini
new file mode 100644
index 000000000000..640299159fff
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/port_config.ini
@@ -0,0 +1,532 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+# name          lanes                                alias      index
+Ethernet0       0                                    etp1a      1
+Ethernet1       1                                    etp1b      1
+Ethernet2       2                                    etp1c      1
+Ethernet3       3                                    etp1d      1
+Ethernet4       4                                    etp1e      1
+Ethernet5       5                                    etp1f      1
+Ethernet6       6                                    etp1g      1
+Ethernet7       7                                    etp1h      1
+Ethernet8       8                                    etp2a      2
+Ethernet9       9                                    etp2b      2
+Ethernet10      10                                   etp2c      2
+Ethernet11      11                                   etp2d      2
+Ethernet12      12                                   etp2e      2
+Ethernet13      13                                   etp2f      2
+Ethernet14      14                                   etp2g      2
+Ethernet15      15                                   etp2h      2
+Ethernet16      16                                   etp3a      3
+Ethernet17      17                                   etp3b      3
+Ethernet18      18                                   etp3c      3
+Ethernet19      19                                   etp3d      3
+Ethernet20      20                                   etp3e      3
+Ethernet21      21                                   etp3f      3
+Ethernet22      22                                   etp3g      3
+Ethernet23      23                                   etp3h      3
+Ethernet24      24                                   etp4a      4
+Ethernet25      25                                   etp4b      4
+Ethernet26      26                                   etp4c      4
+Ethernet27      27                                   etp4d      4
+Ethernet28      28                                   etp4e      4
+Ethernet29      29                                   etp4f      4
+Ethernet30      30                                   etp4g      4
+Ethernet31      31                                   etp4h      4
+Ethernet32      32                                   etp5a      5
+Ethernet33      33                                   etp5b      5
+Ethernet34      34                                   etp5c      5
+Ethernet35      35                                   etp5d      5
+Ethernet36      36                                   etp5e      5
+Ethernet37      37                                   etp5f      5
+Ethernet38      38                                   etp5g      5
+Ethernet39      39                                   etp5h      5
+Ethernet40      40                                   etp6a      6
+Ethernet41      41                                   etp6b      6
+Ethernet42      42                                   etp6c      6
+Ethernet43      43                                   etp6d      6
+Ethernet44      44                                   etp6e      6
+Ethernet45      45                                   etp6f      6
+Ethernet46      46                                   etp6g      6
+Ethernet47      47                                   etp6h      6
+Ethernet48      48                                   etp7a      7
+Ethernet49      49                                   etp7b      7
+Ethernet50      50                                   etp7c      7
+Ethernet51      51                                   etp7d      7
+Ethernet52      52                                   etp7e      7
+Ethernet53      53                                   etp7f      7
+Ethernet54      54                                   etp7g      7
+Ethernet55      55                                   etp7h      7
+Ethernet56      56                                   etp8a      8
+Ethernet57      57                                   etp8b      8
+Ethernet58      58                                   etp8c      8
+Ethernet59      59                                   etp8d      8
+Ethernet60      60                                   etp8e      8
+Ethernet61      61                                   etp8f      8
+Ethernet62      62                                   etp8g      8
+Ethernet63      63                                   etp8h      8
+Ethernet64      64                                   etp9a      9
+Ethernet65      65                                   etp9b      9
+Ethernet66      66                                   etp9c      9
+Ethernet67      67                                   etp9d      9 
+Ethernet68      68                                   etp9e      9
+Ethernet69      69                                   etp9f      9
+Ethernet70      70                                   etp9g      9
+Ethernet71      71                                   etp9h      9
+Ethernet72      72                                   etp10a     10
+Ethernet73      73                                   etp10b     10
+Ethernet74      74                                   etp10c     10
+Ethernet75      75                                   etp10d     10
+Ethernet76      76                                   etp10e     10
+Ethernet77      77                                   etp10f     10
+Ethernet78      78                                   etp10g     10
+Ethernet79      79                                   etp10h     10
+Ethernet80      80                                   etp11a     11
+Ethernet81      81                                   etp11b     11
+Ethernet82      82                                   etp11c     11
+Ethernet83      83                                   etp11d     11
+Ethernet84      84                                   etp11e     11
+Ethernet85      85                                   etp11f     11
+Ethernet86      86                                   etp11g     11
+Ethernet87      87                                   etp11h     11
+Ethernet88      88                                   etp12a     12
+Ethernet89      89                                   etp12b     12
+Ethernet90      90                                   etp12c     12
+Ethernet91      91                                   etp12d     12
+Ethernet92      92                                   etp12e     12
+Ethernet93      93                                   etp12f     12
+Ethernet94      94                                   etp12g     12
+Ethernet95      95                                   etp12h     12
+Ethernet96      96                                   etp13a     13
+Ethernet97      97                                   etp13b     13
+Ethernet98      98                                   etp13c     13
+Ethernet99      99                                   etp13d     13
+Ethernet100     100                                  etp13e     13
+Ethernet101     101                                  etp13f     13
+Ethernet102     102                                  etp13g     13
+Ethernet103     103                                  etp13h     13
+Ethernet104     104                                  etp14a     14
+Ethernet105     105                                  etp14b     14
+Ethernet106     106                                  etp14c     14
+Ethernet107     107                                  etp14d     14
+Ethernet108     108                                  etp14e     14
+Ethernet109     109                                  etp14f     14
+Ethernet110     110                                  etp14g     14
+Ethernet111     111                                  etp14h     14
+Ethernet112     112                                  etp15a     15
+Ethernet113     113                                  etp15b     15
+Ethernet114     114                                  etp15c     15
+Ethernet115     115                                  etp15d     15
+Ethernet116     116                                  etp15e     15
+Ethernet117     117                                  etp15f     15
+Ethernet118     118                                  etp15g     15
+Ethernet119     119                                  etp15h     15
+Ethernet120     120                                  etp16a     16
+Ethernet121     121                                  etp16b     16
+Ethernet122     122                                  etp16c     16
+Ethernet123     123                                  etp16d     16
+Ethernet124     124                                  etp16e     16
+Ethernet125     125                                  etp16f     16
+Ethernet126     126                                  etp16g     16
+Ethernet127     127                                  etp16h     16
+Ethernet128     128                                  etp17a     17
+Ethernet129     129                                  etp17b     17
+Ethernet130     130                                  etp17c     17
+Ethernet131     131                                  etp17d     17
+Ethernet132     132                                  etp17e     17
+Ethernet133     133                                  etp17f     17
+Ethernet134     134                                  etp17g     17
+Ethernet135     135                                  etp17h     17
+Ethernet136     136                                  etp18a     18
+Ethernet137     137                                  etp18b     18
+Ethernet138     138                                  etp18c     18
+Ethernet139     139                                  etp18d     18
+Ethernet140     140                                  etp18e     18
+Ethernet141     141                                  etp18f     18
+Ethernet142     142                                  etp18g     18
+Ethernet143     143                                  etp18h     18
+Ethernet144     144                                  etp19a     19
+Ethernet145     145                                  etp19b     19
+Ethernet146     146                                  etp19c     19
+Ethernet147     147                                  etp19d     19
+Ethernet148     148                                  etp19e     19
+Ethernet149     149                                  etp19f     19
+Ethernet150     150                                  etp19g     19
+Ethernet151     151                                  etp19h     19
+Ethernet152     152                                  etp20a     20
+Ethernet153     153                                  etp20b     20
+Ethernet154     154                                  etp20c     20
+Ethernet155     155                                  etp20d     20
+Ethernet156     156                                  etp20e     20
+Ethernet157     157                                  etp20f     20
+Ethernet158     158                                  etp20g     20
+Ethernet159     159                                  etp20h     20
+Ethernet160     160                                  etp21a     21
+Ethernet161     161                                  etp21b     21
+Ethernet162     162                                  etp21c     21
+Ethernet163     163                                  etp21d     21
+Ethernet164     164                                  etp21e     21
+Ethernet165     165                                  etp21f     21
+Ethernet166     166                                  etp21g     21
+Ethernet167     167                                  etp21h     21
+Ethernet168     168                                  etp22a     22
+Ethernet169     169                                  etp22b     22
+Ethernet170     170                                  etp22c     22
+Ethernet171     171                                  etp22d     22
+Ethernet172     172                                  etp22e     22
+Ethernet173     173                                  etp22f     22
+Ethernet174     174                                  etp22g     22
+Ethernet175     175                                  etp22h     22
+Ethernet176     176                                  etp23a     23
+Ethernet177     177                                  etp23b     23
+Ethernet178     178                                  etp23c     23
+Ethernet179     179                                  etp23d     23
+Ethernet180     180                                  etp23e     23
+Ethernet181     181                                  etp23f     23
+Ethernet182     182                                  etp23g     23
+Ethernet183     183                                  etp23h     23
+Ethernet184     184                                  etp24a     24
+Ethernet185     185                                  etp24b     24
+Ethernet186     186                                  etp24c     24
+Ethernet187     187                                  etp24d     24
+Ethernet188     188                                  etp24e     24
+Ethernet189     189                                  etp24f     24
+Ethernet190     190                                  etp24g     24
+Ethernet191     191                                  etp24h     24
+Ethernet192     192                                  etp25a     25
+Ethernet193     193                                  etp25b     25
+Ethernet194     194                                  etp25c     25
+Ethernet195     195                                  etp25d     25
+Ethernet196     196                                  etp25e     25
+Ethernet197     197                                  etp25f     25
+Ethernet198     198                                  etp25g     25
+Ethernet199     199                                  etp25h     25
+Ethernet200     200                                  etp26a     26
+Ethernet201     201                                  etp26b     26
+Ethernet202     202                                  etp26c     26
+Ethernet203     203                                  etp26d     26
+Ethernet204     204                                  etp26e     26
+Ethernet205     205                                  etp26f     26
+Ethernet206     206                                  etp26g     26
+Ethernet207     207                                  etp26h     26
+Ethernet208     208                                  etp27a     27
+Ethernet209     209                                  etp27b     27
+Ethernet210     210                                  etp27c     27
+Ethernet211     211                                  etp27d     27
+Ethernet212     212                                  etp27e     27
+Ethernet213     213                                  etp27f     27
+Ethernet214     214                                  etp27g     27
+Ethernet215     215                                  etp27h     27
+Ethernet216     216                                  etp28a     28
+Ethernet217     217                                  etp28b     28
+Ethernet218     218                                  etp28c     28
+Ethernet219     219                                  etp28d     28
+Ethernet220     220                                  etp28e     28
+Ethernet221     221                                  etp28f     28
+Ethernet222     222                                  etp28g     28
+Ethernet223     223                                  etp28h     28
+Ethernet224     224                                  etp29a     29
+Ethernet225     225                                  etp29b     29
+Ethernet226     226                                  etp29c     29
+Ethernet227     227                                  etp29d     29
+Ethernet228     228                                  etp29e     29
+Ethernet229     229                                  etp29f     29
+Ethernet230     230                                  etp29g     29
+Ethernet231     231                                  etp29h     29
+Ethernet232     232                                  etp30a     30
+Ethernet233     233                                  etp30b     30
+Ethernet234     234                                  etp30c     30
+Ethernet235     235                                  etp30d     30
+Ethernet236     236                                  etp30e     30
+Ethernet237     237                                  etp30f     30
+Ethernet238     238                                  etp30g     30
+Ethernet239     239                                  etp30h     30
+Ethernet240     240                                  etp31a     31
+Ethernet241     241                                  etp31b     31
+Ethernet242     242                                  etp31c     31
+Ethernet243     243                                  etp31d     31
+Ethernet244     244                                  etp31e     31
+Ethernet245     245                                  etp31f     31
+Ethernet246     246                                  etp31g     31
+Ethernet247     247                                  etp31h     31
+Ethernet248     248                                  etp32a     32
+Ethernet249     249                                  etp32b     32
+Ethernet250     250                                  etp32c     32
+Ethernet251     251                                  etp32d     32
+Ethernet252     252                                  etp32e     32
+Ethernet253     253                                  etp32f     32
+Ethernet254     254                                  etp32g     32
+Ethernet255     255                                  etp32h     32
+Ethernet256     256                                  etp33a     33
+Ethernet257     257                                  etp33b     33
+Ethernet258     258                                  etp33c     33
+Ethernet259     259                                  etp33d     33
+Ethernet260     260                                  etp33e     33
+Ethernet261     261                                  etp33f     33
+Ethernet262     262                                  etp33g     33
+Ethernet263     263                                  etp33h     33
+Ethernet264     264                                  etp34a     34
+Ethernet265     265                                  etp34b     34
+Ethernet266     266                                  etp34c     34
+Ethernet267     267                                  etp34d     34
+Ethernet268     268                                  etp34e     34
+Ethernet269     269                                  etp34f     34
+Ethernet270     270                                  etp34g     34
+Ethernet271     271                                  etp34h     34
+Ethernet272     272                                  etp35a     35
+Ethernet273     273                                  etp35b     35
+Ethernet274     274                                  etp35c     35
+Ethernet275     275                                  etp35d     35
+Ethernet276     276                                  etp35e     35
+Ethernet277     277                                  etp35f     35
+Ethernet278     278                                  etp35g     35
+Ethernet279     279                                  etp35h     35
+Ethernet280     280                                  etp36a     36
+Ethernet281     281                                  etp36b     36
+Ethernet282     282                                  etp36c     36
+Ethernet283     283                                  etp36d     36
+Ethernet284     284                                  etp36e     36
+Ethernet285     285                                  etp36f     36
+Ethernet286     286                                  etp36g     36
+Ethernet287     287                                  etp36h     36
+Ethernet288     288                                  etp37a     37
+Ethernet289     289                                  etp37b     37
+Ethernet290     290                                  etp37c     37
+Ethernet291     291                                  etp37d     37
+Ethernet292     292                                  etp37e     37
+Ethernet293     293                                  etp37f     37
+Ethernet294     294                                  etp37g     37
+Ethernet295     295                                  etp37h     37
+Ethernet296     296                                  etp38a     38
+Ethernet297     297                                  etp38b     38
+Ethernet298     298                                  etp38c     38
+Ethernet299     299                                  etp38d     38
+Ethernet300     300                                  etp38e     38
+Ethernet301     301                                  etp38f     38
+Ethernet302     302                                  etp38g     38
+Ethernet303     303                                  etp38h     38
+Ethernet304     304                                  etp39a     39
+Ethernet305     305                                  etp39b     39
+Ethernet306     306                                  etp39c     39
+Ethernet307     307                                  etp39d     39
+Ethernet308     308                                  etp39e     39
+Ethernet309     309                                  etp39f     39
+Ethernet310     310                                  etp39g     39
+Ethernet311     311                                  etp39h     39
+Ethernet312     312                                  etp40a     40
+Ethernet313     313                                  etp40b     40
+Ethernet314     314                                  etp40c     40
+Ethernet315     315                                  etp40d     40
+Ethernet316     316                                  etp40e     40
+Ethernet317     317                                  etp40f     40
+Ethernet318     318                                  etp40g     40
+Ethernet319     319                                  etp40h     40
+Ethernet320     320                                  etp41a     41
+Ethernet321     321                                  etp41b     41
+Ethernet322     322                                  etp41c     41
+Ethernet323     323                                  etp41d     41
+Ethernet324     324                                  etp41e     41
+Ethernet325     325                                  etp41f     41
+Ethernet326     326                                  etp41g     41
+Ethernet327     327                                  etp41h     41
+Ethernet328     328                                  etp42a     42
+Ethernet329     329                                  etp42b     42
+Ethernet330     330                                  etp42c     42
+Ethernet331     331                                  etp42d     42
+Ethernet332     332                                  etp42e     42
+Ethernet333     333                                  etp42f     42
+Ethernet334     334                                  etp42g     42
+Ethernet335     335                                  etp42h     42
+Ethernet336     336                                  etp43a     43
+Ethernet337     337                                  etp43b     43
+Ethernet338     338                                  etp43c     43
+Ethernet339     339                                  etp43d     43
+Ethernet340     340                                  etp43e     43
+Ethernet341     341                                  etp43f     43
+Ethernet342     342                                  etp43g     43
+Ethernet343     343                                  etp43h     43
+Ethernet344     344                                  etp44a     44
+Ethernet345     345                                  etp44b     44
+Ethernet346     346                                  etp44c     44
+Ethernet347     347                                  etp44d     44
+Ethernet348     348                                  etp44e     44
+Ethernet349     349                                  etp44f     44
+Ethernet350     350                                  etp44g     44
+Ethernet351     351                                  etp44h     44
+Ethernet352     352                                  etp45a     45
+Ethernet353     353                                  etp45b     45
+Ethernet354     354                                  etp45c     45
+Ethernet355     355                                  etp45d     45
+Ethernet356     356                                  etp45e     45
+Ethernet357     357                                  etp45f     45
+Ethernet358     358                                  etp45g     45
+Ethernet359     359                                  etp45h     45
+Ethernet360     360                                  etp46a     46
+Ethernet361     361                                  etp46b     46
+Ethernet362     362                                  etp46c     46
+Ethernet363     363                                  etp46d     46
+Ethernet364     364                                  etp46e     46
+Ethernet365     365                                  etp46f     46
+Ethernet366     366                                  etp46g     46
+Ethernet367     367                                  etp46h     46
+Ethernet368     368                                  etp47a     47
+Ethernet369     369                                  etp47b     47
+Ethernet370     370                                  etp47c     47
+Ethernet371     371                                  etp47d     47
+Ethernet372     372                                  etp47e     47
+Ethernet373     373                                  etp47f     47
+Ethernet374     374                                  etp47g     47
+Ethernet375     375                                  etp47h     47
+Ethernet376     376                                  etp48a     48
+Ethernet377     377                                  etp48b     48
+Ethernet378     378                                  etp48c     48
+Ethernet379     379                                  etp48d     48
+Ethernet380     380                                  etp48e     48
+Ethernet381     381                                  etp48f     48
+Ethernet382     382                                  etp48g     48
+Ethernet383     383                                  etp48h     48
+Ethernet384     384                                  etp49a     49
+Ethernet385     385                                  etp49b     49
+Ethernet386     386                                  etp49c     49
+Ethernet387     387                                  etp49d     49
+Ethernet388     388                                  etp49e     49
+Ethernet389     389                                  etp49f     49
+Ethernet390     390                                  etp49g     49
+Ethernet391     391                                  etp49h     49
+Ethernet392     392                                  etp50a     50
+Ethernet393     393                                  etp50b     50
+Ethernet394     394                                  etp50c     50
+Ethernet395     395                                  etp50d     50
+Ethernet396     396                                  etp50e     50
+Ethernet397     397                                  etp50f     50
+Ethernet398     398                                  etp50g     50
+Ethernet399     399                                  etp50h     50
+Ethernet400     400                                  etp51a     51
+Ethernet401     401                                  etp51b     51
+Ethernet402     402                                  etp51c     51
+Ethernet403     403                                  etp51d     51
+Ethernet404     404                                  etp51e     51
+Ethernet405     405                                  etp51f     51
+Ethernet406     406                                  etp51g     51
+Ethernet407     407                                  etp51h     51
+Ethernet408     408                                  etp52a     52
+Ethernet409     409                                  etp52b     52
+Ethernet410     410                                  etp52c     52
+Ethernet411     411                                  etp52d     52
+Ethernet412     412                                  etp52e     52
+Ethernet413     413                                  etp52f     52
+Ethernet414     414                                  etp52g     52
+Ethernet415     415                                  etp52h     52
+Ethernet416     416                                  etp53a     53
+Ethernet417     417                                  etp53b     53
+Ethernet418     418                                  etp53c     53
+Ethernet419     419                                  etp53d     53
+Ethernet420     420                                  etp53e     53
+Ethernet421     421                                  etp53f     53
+Ethernet422     422                                  etp53g     53
+Ethernet423     423                                  etp53h     53
+Ethernet424     424                                  etp54a     54
+Ethernet425     425                                  etp54b     54
+Ethernet426     426                                  etp54c     54
+Ethernet427     427                                  etp54d     54
+Ethernet428     428                                  etp54e     54
+Ethernet429     429                                  etp54f     54
+Ethernet430     430                                  etp54g     54
+Ethernet431     431                                  etp54h     54
+Ethernet432     432                                  etp55a     55
+Ethernet433     433                                  etp55b     55
+Ethernet434     434                                  etp55c     55
+Ethernet435     435                                  etp55d     55
+Ethernet436     436                                  etp55e     55
+Ethernet437     437                                  etp55f     55
+Ethernet438     438                                  etp55g     55
+Ethernet439     439                                  etp55h     55
+Ethernet440     440                                  etp56a     56
+Ethernet441     441                                  etp56b     56
+Ethernet442     442                                  etp56c     56
+Ethernet443     443                                  etp56d     56
+Ethernet444     444                                  etp56e     56
+Ethernet445     445                                  etp56f     56
+Ethernet446     446                                  etp56g     56
+Ethernet447     447                                  etp56h     56
+Ethernet448     448                                  etp57a     57
+Ethernet449     449                                  etp57b     57
+Ethernet450     450                                  etp57c     57
+Ethernet451     451                                  etp57d     57
+Ethernet452     452                                  etp57e     57
+Ethernet453     453                                  etp57f     57
+Ethernet454     454                                  etp57g     57
+Ethernet455     455                                  etp57h     57
+Ethernet456     456                                  etp58a     58
+Ethernet457     457                                  etp58b     58
+Ethernet458     458                                  etp58c     58
+Ethernet459     459                                  etp58d     58
+Ethernet460     460                                  etp58e     58
+Ethernet461     461                                  etp58f     58
+Ethernet462     462                                  etp58g     58
+Ethernet463     463                                  etp58h     58
+Ethernet464     464                                  etp59a     59
+Ethernet465     465                                  etp59b     59
+Ethernet466     466                                  etp59c     59
+Ethernet467     467                                  etp59d     59
+Ethernet468     468                                  etp59e     59
+Ethernet469     469                                  etp59f     59
+Ethernet470     470                                  etp59g     59
+Ethernet471     471                                  etp59h     59
+Ethernet472     472                                  etp60a     60
+Ethernet473     473                                  etp60b     60
+Ethernet474     474                                  etp60c     60
+Ethernet475     475                                  etp60d     60
+Ethernet476     476                                  etp60e     60
+Ethernet477     477                                  etp60f     60
+Ethernet478     478                                  etp60g     60
+Ethernet479     479                                  etp60h     60
+Ethernet480     480                                  etp61a     61
+Ethernet481     481                                  etp61b     61
+Ethernet482     482                                  etp61c     61
+Ethernet483     483                                  etp61d     61
+Ethernet484     484                                  etp61e     61
+Ethernet485     485                                  etp61f     61
+Ethernet486     486                                  etp61g     61
+Ethernet487     487                                  etp61h     61
+Ethernet488     488                                  etp62a     62
+Ethernet489     489                                  etp62b     62
+Ethernet490     490                                  etp62c     62
+Ethernet491     491                                  etp62d     62
+Ethernet492     492                                  etp62e     62
+Ethernet493     493                                  etp62f     62
+Ethernet494     494                                  etp62g     62
+Ethernet495     495                                  etp62h     62
+Ethernet496     496                                  etp63a     63
+Ethernet497     497                                  etp63b     63
+Ethernet498     498                                  etp63c     63
+Ethernet499     499                                  etp63d     63
+Ethernet500     500                                  etp63e     63
+Ethernet501     501                                  etp63f     63
+Ethernet502     502                                  etp63g     63
+Ethernet503     503                                  etp63h     63
+Ethernet504     504                                  etp64a     64
+Ethernet505     505                                  etp64b     64
+Ethernet506     506                                  etp64c     64
+Ethernet507     507                                  etp64d     64
+Ethernet508     508                                  etp64e     64
+Ethernet509     509                                  etp64f     64
+Ethernet510     510                                  etp64g     64
+Ethernet511     511                                  etp64h     64
+Ethernet512     512                                  etp65      65
+Ethernet520     520                                  etp66      66
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/qos.json.j2
new file mode 120000
index 000000000000..a49c7427d324
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/qos.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/qos.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai.profile b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai.profile
new file mode 100644
index 000000000000..a1d251ac1ad4
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5640.xml
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai_5640.xml b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai_5640.xml
new file mode 100644
index 000000000000..d111ce9849a6
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai_5640.xml
@@ -0,0 +1,3637 @@
+<?xml version="1.0"?>
+
+<!--
+  Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+  Apache-2.0
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+  http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+-->
+
+<root>
+    <platform_info type="5640">
+
+        <!-- Device MAC address  -->
+        <device-mac-address>00:02:03:04:05:00</device-mac-address>
+
+        <!-- ISSU enabled -->
+        <issu-enabled>0</issu-enabled>
+
+        <!-- Number of ports in the following port list -->
+        <number-of-physical-ports>512</number-of-physical-ports>
+
+        <!-- List of ports in the device -->
+        <ports-list>
+            <port-info>
+                <local-port>481</local-port>
+                <width>1</width>
+                <module>0</module>
+                <!-- 0 none, 1=2, 2=4, 3=2,4, 4=8, 7=2,4,8 -->
+                <breakout-modes>3</breakout-modes>
+                <!-- (BITMASK) 2 - 1Gb , 16 - 10Gb , 32 - 40Gb , 384 - 50Gb , 1536 - 100Gb , 4096 - 200Gb, 32768 - 400G, 262144 - 800G -->
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>483</local-port>
+                <width>1</width>
+                <module>0</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>485</local-port>
+                <width>1</width>
+                <module>0</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>487</local-port>
+                <width>1</width>
+                <module>0</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>482</local-port>
+                <width>1</width>
+                <module>0</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>484</local-port>
+                <width>1</width>
+                <module>0</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>486</local-port>
+                <width>1</width>
+                <module>0</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>488</local-port>
+                <width>1</width>
+                <module>0</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>489</local-port>
+                <width>1</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>490</local-port>
+                <width>1</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>491</local-port>
+                <width>1</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>492</local-port>
+                <width>1</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>493</local-port>
+                <width>1</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>494</local-port>
+                <width>1</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>495</local-port>
+                <width>1</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>496</local-port>
+                <width>1</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>505</local-port>
+                <width>1</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>506</local-port>
+                <width>1</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>507</local-port>
+                <width>1</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>508</local-port>
+                <width>1</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>509</local-port>
+                <width>1</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>510</local-port>
+                <width>1</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>511</local-port>
+                <width>1</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>512</local-port>
+                <width>1</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>497</local-port>
+                <width>1</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>498</local-port>
+                <width>1</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>499</local-port>
+                <width>1</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>500</local-port>
+                <width>1</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>501</local-port>
+                <width>1</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>502</local-port>
+                <width>1</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>503</local-port>
+                <width>1</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>504</local-port>
+                <width>1</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>449</local-port>
+                <width>1</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>450</local-port>
+                <width>1</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>451</local-port>
+                <width>1</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>452</local-port>
+                <width>1</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>453</local-port>
+                <width>1</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>454</local-port>
+                <width>1</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>455</local-port>
+                <width>1</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>456</local-port>
+                <width>1</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>457</local-port>
+                <width>1</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>458</local-port>
+                <width>1</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>459</local-port>
+                <width>1</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>460</local-port>
+                <width>1</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>461</local-port>
+                <width>1</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>462</local-port>
+                <width>1</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>463</local-port>
+                <width>1</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>464</local-port>
+                <width>1</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>473</local-port>
+                <width>1</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>474</local-port>
+                <width>1</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>475</local-port>
+                <width>1</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>476</local-port>
+                <width>1</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>477</local-port>
+                <width>1</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>478</local-port>
+                <width>1</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>479</local-port>
+                <width>1</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>480</local-port>
+                <width>1</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>465</local-port>
+                <width>1</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>466</local-port>
+                <width>1</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>467</local-port>
+                <width>1</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>468</local-port>
+                <width>1</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>469</local-port>
+                <width>1</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>470</local-port>
+                <width>1</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>471</local-port>
+                <width>1</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>472</local-port>
+                <width>1</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>417</local-port>
+                <width>1</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>418</local-port>
+                <width>1</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>419</local-port>
+                <width>1</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>420</local-port>
+                <width>1</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>421</local-port>
+                <width>1</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>422</local-port>
+                <width>1</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>423</local-port>
+                <width>1</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>424</local-port>
+                <width>1</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>425</local-port>
+                <width>1</width>
+                <module>9</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>426</local-port>
+                <width>1</width>
+                <module>9</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>427</local-port>
+                <width>1</width>
+                <module>9</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>428</local-port>
+                <width>1</width>
+                <module>9</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>429</local-port>
+                <width>1</width>
+                <module>9</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>430</local-port>
+                <width>1</width>
+                <module>9</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>431</local-port>
+                <width>1</width>
+                <module>9</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>432</local-port>
+                <width>1</width>
+                <module>9</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>441</local-port>
+                <width>1</width>
+                <module>10</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>442</local-port>
+                <width>1</width>
+                <module>10</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>443</local-port>
+                <width>1</width>
+                <module>10</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>444</local-port>
+                <width>1</width>
+                <module>10</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>445</local-port>
+                <width>1</width>
+                <module>10</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>446</local-port>
+                <width>1</width>
+                <module>10</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>447</local-port>
+                <width>1</width>
+                <module>10</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>448</local-port>
+                <width>1</width>
+                <module>10</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>433</local-port>
+                <width>1</width>
+                <module>11</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>434</local-port>
+                <width>1</width>
+                <module>11</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>435</local-port>
+                <width>1</width>
+                <module>11</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>436</local-port>
+                <width>1</width>
+                <module>11</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>437</local-port>
+                <width>1</width>
+                <module>11</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>438</local-port>
+                <width>1</width>
+                <module>11</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>439</local-port>
+                <width>1</width>
+                <module>11</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>440</local-port>
+                <width>1</width>
+                <module>11</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>385</local-port>
+                <width>1</width>
+                <module>12</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>386</local-port>
+                <width>1</width>
+                <module>12</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>387</local-port>
+                <width>1</width>
+                <module>12</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>388</local-port>
+                <width>1</width>
+                <module>12</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>389</local-port>
+                <width>1</width>
+                <module>12</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>390</local-port>
+                <width>1</width>
+                <module>12</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>391</local-port>
+                <width>1</width>
+                <module>12</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>392</local-port>
+                <width>1</width>
+                <module>12</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>393</local-port>
+                <width>1</width>
+                <module>13</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>394</local-port>
+                <width>1</width>
+                <module>13</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>395</local-port>
+                <width>1</width>
+                <module>13</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>396</local-port>
+                <width>1</width>
+                <module>13</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>397</local-port>
+                <width>1</width>
+                <module>13</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>398</local-port>
+                <width>1</width>
+                <module>13</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>399</local-port>
+                <width>1</width>
+                <module>13</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>400</local-port>
+                <width>1</width>
+                <module>13</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>409</local-port>
+                <width>1</width>
+                <module>14</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>410</local-port>
+                <width>1</width>
+                <module>14</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>411</local-port>
+                <width>1</width>
+                <module>14</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>412</local-port>
+                <width>1</width>
+                <module>14</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>413</local-port>
+                <width>1</width>
+                <module>14</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>414</local-port>
+                <width>1</width>
+                <module>14</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>415</local-port>
+                <width>1</width>
+                <module>14</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>416</local-port>
+                <width>1</width>
+                <module>14</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>401</local-port>
+                <width>1</width>
+                <module>15</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>402</local-port>
+                <width>1</width>
+                <module>15</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>403</local-port>
+                <width>1</width>
+                <module>15</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>404</local-port>
+                <width>1</width>
+                <module>15</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>405</local-port>
+                <width>1</width>
+                <module>15</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>406</local-port>
+                <width>1</width>
+                <module>15</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>407</local-port>
+                <width>1</width>
+                <module>15</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>408</local-port>
+                <width>1</width>
+                <module>15</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>361</local-port>
+                <width>1</width>
+                <module>16</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>362</local-port>
+                <width>1</width>
+                <module>16</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>363</local-port>
+                <width>1</width>
+                <module>16</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>364</local-port>
+                <width>1</width>
+                <module>16</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>365</local-port>
+                <width>1</width>
+                <module>16</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>366</local-port>
+                <width>1</width>
+                <module>16</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>367</local-port>
+                <width>1</width>
+                <module>16</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>368</local-port>
+                <width>1</width>
+                <module>16</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>353</local-port>
+                <width>1</width>
+                <module>17</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>354</local-port>
+                <width>1</width>
+                <module>17</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>355</local-port>
+                <width>1</width>
+                <module>17</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>356</local-port>
+                <width>1</width>
+                <module>17</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>357</local-port>
+                <width>1</width>
+                <module>17</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>358</local-port>
+                <width>1</width>
+                <module>17</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>359</local-port>
+                <width>1</width>
+                <module>17</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>360</local-port>
+                <width>1</width>
+                <module>17</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>369</local-port>
+                <width>1</width>
+                <module>18</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>370</local-port>
+                <width>1</width>
+                <module>18</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>371</local-port>
+                <width>1</width>
+                <module>18</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>372</local-port>
+                <width>1</width>
+                <module>18</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>373</local-port>
+                <width>1</width>
+                <module>18</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>374</local-port>
+                <width>1</width>
+                <module>18</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>375</local-port>
+                <width>1</width>
+                <module>18</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>376</local-port>
+                <width>1</width>
+                <module>18</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>377</local-port>
+                <width>1</width>
+                <module>19</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>378</local-port>
+                <width>1</width>
+                <module>19</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>379</local-port>
+                <width>1</width>
+                <module>19</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>380</local-port>
+                <width>1</width>
+                <module>19</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>381</local-port>
+                <width>1</width>
+                <module>19</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>382</local-port>
+                <width>1</width>
+                <module>19</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>383</local-port>
+                <width>1</width>
+                <module>19</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>384</local-port>
+                <width>1</width>
+                <module>19</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>329</local-port>
+                <width>1</width>
+                <module>20</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>330</local-port>
+                <width>1</width>
+                <module>20</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>331</local-port>
+                <width>1</width>
+                <module>20</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>332</local-port>
+                <width>1</width>
+                <module>20</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>333</local-port>
+                <width>1</width>
+                <module>20</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>334</local-port>
+                <width>1</width>
+                <module>20</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>335</local-port>
+                <width>1</width>
+                <module>20</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>336</local-port>
+                <width>1</width>
+                <module>20</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>321</local-port>
+                <width>1</width>
+                <module>21</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>322</local-port>
+                <width>1</width>
+                <module>21</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>323</local-port>
+                <width>1</width>
+                <module>21</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>324</local-port>
+                <width>1</width>
+                <module>21</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>325</local-port>
+                <width>1</width>
+                <module>21</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>326</local-port>
+                <width>1</width>
+                <module>21</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>327</local-port>
+                <width>1</width>
+                <module>21</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>328</local-port>
+                <width>1</width>
+                <module>21</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>337</local-port>
+                <width>1</width>
+                <module>22</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>338</local-port>
+                <width>1</width>
+                <module>22</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>339</local-port>
+                <width>1</width>
+                <module>22</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>340</local-port>
+                <width>1</width>
+                <module>22</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>341</local-port>
+                <width>1</width>
+                <module>22</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>342</local-port>
+                <width>1</width>
+                <module>22</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>343</local-port>
+                <width>1</width>
+                <module>22</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>344</local-port>
+                <width>1</width>
+                <module>22</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>345</local-port>
+                <width>1</width>
+                <module>23</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>346</local-port>
+                <width>1</width>
+                <module>23</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>347</local-port>
+                <width>1</width>
+                <module>23</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>348</local-port>
+                <width>1</width>
+                <module>23</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>349</local-port>
+                <width>1</width>
+                <module>23</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>350</local-port>
+                <width>1</width>
+                <module>23</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>351</local-port>
+                <width>1</width>
+                <module>23</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>352</local-port>
+                <width>1</width>
+                <module>23</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>297</local-port>
+                <width>1</width>
+                <module>24</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>298</local-port>
+                <width>1</width>
+                <module>24</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>299</local-port>
+                <width>1</width>
+                <module>24</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>300</local-port>
+                <width>1</width>
+                <module>24</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>301</local-port>
+                <width>1</width>
+                <module>24</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>302</local-port>
+                <width>1</width>
+                <module>24</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>303</local-port>
+                <width>1</width>
+                <module>24</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>304</local-port>
+                <width>1</width>
+                <module>24</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>289</local-port>
+                <width>1</width>
+                <module>25</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>290</local-port>
+                <width>1</width>
+                <module>25</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>291</local-port>
+                <width>1</width>
+                <module>25</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>292</local-port>
+                <width>1</width>
+                <module>25</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>293</local-port>
+                <width>1</width>
+                <module>25</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>294</local-port>
+                <width>1</width>
+                <module>25</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>295</local-port>
+                <width>1</width>
+                <module>25</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>296</local-port>
+                <width>1</width>
+                <module>25</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>305</local-port>
+                <width>1</width>
+                <module>26</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>306</local-port>
+                <width>1</width>
+                <module>26</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>307</local-port>
+                <width>1</width>
+                <module>26</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>308</local-port>
+                <width>1</width>
+                <module>26</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>309</local-port>
+                <width>1</width>
+                <module>26</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>310</local-port>
+                <width>1</width>
+                <module>26</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>311</local-port>
+                <width>1</width>
+                <module>26</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>312</local-port>
+                <width>1</width>
+                <module>26</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>313</local-port>
+                <width>1</width>
+                <module>27</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>314</local-port>
+                <width>1</width>
+                <module>27</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>315</local-port>
+                <width>1</width>
+                <module>27</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>316</local-port>
+                <width>1</width>
+                <module>27</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>317</local-port>
+                <width>1</width>
+                <module>27</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>318</local-port>
+                <width>1</width>
+                <module>27</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>319</local-port>
+                <width>1</width>
+                <module>27</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>320</local-port>
+                <width>1</width>
+                <module>27</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>265</local-port>
+                <width>1</width>
+                <module>28</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>266</local-port>
+                <width>1</width>
+                <module>28</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>267</local-port>
+                <width>1</width>
+                <module>28</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>268</local-port>
+                <width>1</width>
+                <module>28</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>269</local-port>
+                <width>1</width>
+                <module>28</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>270</local-port>
+                <width>1</width>
+                <module>28</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>271</local-port>
+                <width>1</width>
+                <module>28</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>272</local-port>
+                <width>1</width>
+                <module>28</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>257</local-port>
+                <width>1</width>
+                <module>29</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>258</local-port>
+                <width>1</width>
+                <module>29</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>259</local-port>
+                <width>1</width>
+                <module>29</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>260</local-port>
+                <width>1</width>
+                <module>29</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>261</local-port>
+                <width>1</width>
+                <module>29</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>262</local-port>
+                <width>1</width>
+                <module>29</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>263</local-port>
+                <width>1</width>
+                <module>29</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>264</local-port>
+                <width>1</width>
+                <module>29</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>273</local-port>
+                <width>1</width>
+                <module>30</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>274</local-port>
+                <width>1</width>
+                <module>30</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>275</local-port>
+                <width>1</width>
+                <module>30</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>276</local-port>
+                <width>1</width>
+                <module>30</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>277</local-port>
+                <width>1</width>
+                <module>30</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>278</local-port>
+                <width>1</width>
+                <module>30</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>279</local-port>
+                <width>1</width>
+                <module>30</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>280</local-port>
+                <width>1</width>
+                <module>30</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>281</local-port>
+                <width>1</width>
+                <module>31</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>282</local-port>
+                <width>1</width>
+                <module>31</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>283</local-port>
+                <width>1</width>
+                <module>31</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>284</local-port>
+                <width>1</width>
+                <module>31</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>285</local-port>
+                <width>1</width>
+                <module>31</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>286</local-port>
+                <width>1</width>
+                <module>31</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>287</local-port>
+                <width>1</width>
+                <module>31</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>288</local-port>
+                <width>1</width>
+                <module>31</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>25</local-port>
+                <width>1</width>
+                <module>32</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>26</local-port>
+                <width>1</width>
+                <module>32</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>27</local-port>
+                <width>1</width>
+                <module>32</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>28</local-port>
+                <width>1</width>
+                <module>32</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>29</local-port>
+                <width>1</width>
+                <module>32</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>30</local-port>
+                <width>1</width>
+                <module>32</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>31</local-port>
+                <width>1</width>
+                <module>32</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>32</local-port>
+                <width>1</width>
+                <module>32</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>17</local-port>
+                <width>1</width>
+                <module>33</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>18</local-port>
+                <width>1</width>
+                <module>33</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>19</local-port>
+                <width>1</width>
+                <module>33</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>20</local-port>
+                <width>1</width>
+                <module>33</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>21</local-port>
+                <width>1</width>
+                <module>33</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>22</local-port>
+                <width>1</width>
+                <module>33</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>23</local-port>
+                <width>1</width>
+                <module>33</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>24</local-port>
+                <width>1</width>
+                <module>33</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>1</local-port>
+                <width>1</width>
+                <module>34</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>2</local-port>
+                <width>1</width>
+                <module>34</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>3</local-port>
+                <width>1</width>
+                <module>34</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>4</local-port>
+                <width>1</width>
+                <module>34</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>5</local-port>
+                <width>1</width>
+                <module>34</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>6</local-port>
+                <width>1</width>
+                <module>34</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>7</local-port>
+                <width>1</width>
+                <module>34</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>8</local-port>
+                <width>1</width>
+                <module>34</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>9</local-port>
+                <width>1</width>
+                <module>35</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>10</local-port>
+                <width>1</width>
+                <module>35</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>11</local-port>
+                <width>1</width>
+                <module>35</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>12</local-port>
+                <width>1</width>
+                <module>35</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>13</local-port>
+                <width>1</width>
+                <module>35</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>14</local-port>
+                <width>1</width>
+                <module>35</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>15</local-port>
+                <width>1</width>
+                <module>35</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>16</local-port>
+                <width>1</width>
+                <module>35</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>57</local-port>
+                <width>1</width>
+                <module>36</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>58</local-port>
+                <width>1</width>
+                <module>36</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>59</local-port>
+                <width>1</width>
+                <module>36</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>60</local-port>
+                <width>1</width>
+                <module>36</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>61</local-port>
+                <width>1</width>
+                <module>36</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>62</local-port>
+                <width>1</width>
+                <module>36</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>63</local-port>
+                <width>1</width>
+                <module>36</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>64</local-port>
+                <width>1</width>
+                <module>36</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>49</local-port>
+                <width>1</width>
+                <module>37</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>50</local-port>
+                <width>1</width>
+                <module>37</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>51</local-port>
+                <width>1</width>
+                <module>37</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>52</local-port>
+                <width>1</width>
+                <module>37</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>53</local-port>
+                <width>1</width>
+                <module>37</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>54</local-port>
+                <width>1</width>
+                <module>37</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>55</local-port>
+                <width>1</width>
+                <module>37</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>56</local-port>
+                <width>1</width>
+                <module>37</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>33</local-port>
+                <width>1</width>
+                <module>38</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>34</local-port>
+                <width>1</width>
+                <module>38</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>35</local-port>
+                <width>1</width>
+                <module>38</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>36</local-port>
+                <width>1</width>
+                <module>38</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>37</local-port>
+                <width>1</width>
+                <module>38</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>38</local-port>
+                <width>1</width>
+                <module>38</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>39</local-port>
+                <width>1</width>
+                <module>38</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>40</local-port>
+                <width>1</width>
+                <module>38</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>41</local-port>
+                <width>1</width>
+                <module>39</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>42</local-port>
+                <width>1</width>
+                <module>39</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>43</local-port>
+                <width>1</width>
+                <module>39</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>44</local-port>
+                <width>1</width>
+                <module>39</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>45</local-port>
+                <width>1</width>
+                <module>39</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>46</local-port>
+                <width>1</width>
+                <module>39</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>47</local-port>
+                <width>1</width>
+                <module>39</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>48</local-port>
+                <width>1</width>
+                <module>39</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>89</local-port>
+                <width>1</width>
+                <module>40</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>90</local-port>
+                <width>1</width>
+                <module>40</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>91</local-port>
+                <width>1</width>
+                <module>40</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>92</local-port>
+                <width>1</width>
+                <module>40</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>93</local-port>
+                <width>1</width>
+                <module>40</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>94</local-port>
+                <width>1</width>
+                <module>40</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>95</local-port>
+                <width>1</width>
+                <module>40</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>96</local-port>
+                <width>1</width>
+                <module>40</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>81</local-port>
+                <width>1</width>
+                <module>41</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>82</local-port>
+                <width>1</width>
+                <module>41</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>83</local-port>
+                <width>1</width>
+                <module>41</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>84</local-port>
+                <width>1</width>
+                <module>41</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>85</local-port>
+                <width>1</width>
+                <module>41</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>86</local-port>
+                <width>1</width>
+                <module>41</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>87</local-port>
+                <width>1</width>
+                <module>41</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>88</local-port>
+                <width>1</width>
+                <module>41</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>65</local-port>
+                <width>1</width>
+                <module>42</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>66</local-port>
+                <width>1</width>
+                <module>42</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>67</local-port>
+                <width>1</width>
+                <module>42</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>68</local-port>
+                <width>1</width>
+                <module>42</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>69</local-port>
+                <width>1</width>
+                <module>42</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>70</local-port>
+                <width>1</width>
+                <module>42</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>71</local-port>
+                <width>1</width>
+                <module>42</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>72</local-port>
+                <width>1</width>
+                <module>42</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>73</local-port>
+                <width>1</width>
+                <module>43</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>74</local-port>
+                <width>1</width>
+                <module>43</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>75</local-port>
+                <width>1</width>
+                <module>43</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>76</local-port>
+                <width>1</width>
+                <module>43</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>77</local-port>
+                <width>1</width>
+                <module>43</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>78</local-port>
+                <width>1</width>
+                <module>43</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>79</local-port>
+                <width>1</width>
+                <module>43</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>80</local-port>
+                <width>1</width>
+                <module>43</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>121</local-port>
+                <width>1</width>
+                <module>44</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>122</local-port>
+                <width>1</width>
+                <module>44</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>123</local-port>
+                <width>1</width>
+                <module>44</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>124</local-port>
+                <width>1</width>
+                <module>44</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>125</local-port>
+                <width>1</width>
+                <module>44</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>126</local-port>
+                <width>1</width>
+                <module>44</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>127</local-port>
+                <width>1</width>
+                <module>44</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>128</local-port>
+                <width>1</width>
+                <module>44</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>113</local-port>
+                <width>1</width>
+                <module>45</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>114</local-port>
+                <width>1</width>
+                <module>45</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>115</local-port>
+                <width>1</width>
+                <module>45</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>116</local-port>
+                <width>1</width>
+                <module>45</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>117</local-port>
+                <width>1</width>
+                <module>45</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>118</local-port>
+                <width>1</width>
+                <module>45</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>119</local-port>
+                <width>1</width>
+                <module>45</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>120</local-port>
+                <width>1</width>
+                <module>45</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>97</local-port>
+                <width>1</width>
+                <module>46</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>98</local-port>
+                <width>1</width>
+                <module>46</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>99</local-port>
+                <width>1</width>
+                <module>46</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>100</local-port>
+                <width>1</width>
+                <module>46</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>101</local-port>
+                <width>1</width>
+                <module>46</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>102</local-port>
+                <width>1</width>
+                <module>46</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>103</local-port>
+                <width>1</width>
+                <module>46</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>104</local-port>
+                <width>1</width>
+                <module>46</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>105</local-port>
+                <width>1</width>
+                <module>47</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>106</local-port>
+                <width>1</width>
+                <module>47</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>107</local-port>
+                <width>1</width>
+                <module>47</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>108</local-port>
+                <width>1</width>
+                <module>47</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>109</local-port>
+                <width>1</width>
+                <module>47</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>110</local-port>
+                <width>1</width>
+                <module>47</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>111</local-port>
+                <width>1</width>
+                <module>47</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>112</local-port>
+                <width>1</width>
+                <module>47</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>145</local-port>
+                <width>1</width>
+                <module>48</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>146</local-port>
+                <width>1</width>
+                <module>48</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>147</local-port>
+                <width>1</width>
+                <module>48</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>148</local-port>
+                <width>1</width>
+                <module>48</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>149</local-port>
+                <width>1</width>
+                <module>48</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>150</local-port>
+                <width>1</width>
+                <module>48</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>151</local-port>
+                <width>1</width>
+                <module>48</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>152</local-port>
+                <width>1</width>
+                <module>48</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>153</local-port>
+                <width>1</width>
+                <module>49</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>154</local-port>
+                <width>1</width>
+                <module>49</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>155</local-port>
+                <width>1</width>
+                <module>49</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>156</local-port>
+                <width>1</width>
+                <module>49</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>157</local-port>
+                <width>1</width>
+                <module>49</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>158</local-port>
+                <width>1</width>
+                <module>49</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>159</local-port>
+                <width>1</width>
+                <module>49</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>160</local-port>
+                <width>1</width>
+                <module>49</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>137</local-port>
+                <width>1</width>
+                <module>50</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>138</local-port>
+                <width>1</width>
+                <module>50</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>139</local-port>
+                <width>1</width>
+                <module>50</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>140</local-port>
+                <width>1</width>
+                <module>50</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>141</local-port>
+                <width>1</width>
+                <module>50</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>142</local-port>
+                <width>1</width>
+                <module>50</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>143</local-port>
+                <width>1</width>
+                <module>50</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>144</local-port>
+                <width>1</width>
+                <module>50</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>129</local-port>
+                <width>1</width>
+                <module>51</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>130</local-port>
+                <width>1</width>
+                <module>51</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>131</local-port>
+                <width>1</width>
+                <module>51</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>132</local-port>
+                <width>1</width>
+                <module>51</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>133</local-port>
+                <width>1</width>
+                <module>51</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>134</local-port>
+                <width>1</width>
+                <module>51</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>135</local-port>
+                <width>1</width>
+                <module>51</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>136</local-port>
+                <width>1</width>
+                <module>51</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>177</local-port>
+                <width>1</width>
+                <module>52</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>178</local-port>
+                <width>1</width>
+                <module>52</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>179</local-port>
+                <width>1</width>
+                <module>52</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>180</local-port>
+                <width>1</width>
+                <module>52</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>181</local-port>
+                <width>1</width>
+                <module>52</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>182</local-port>
+                <width>1</width>
+                <module>52</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>183</local-port>
+                <width>1</width>
+                <module>52</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>184</local-port>
+                <width>1</width>
+                <module>52</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>185</local-port>
+                <width>1</width>
+                <module>53</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>186</local-port>
+                <width>1</width>
+                <module>53</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>187</local-port>
+                <width>1</width>
+                <module>53</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>188</local-port>
+                <width>1</width>
+                <module>53</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>189</local-port>
+                <width>1</width>
+                <module>53</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>190</local-port>
+                <width>1</width>
+                <module>53</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>191</local-port>
+                <width>1</width>
+                <module>53</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>192</local-port>
+                <width>1</width>
+                <module>53</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>169</local-port>
+                <width>1</width>
+                <module>54</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>170</local-port>
+                <width>1</width>
+                <module>54</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>171</local-port>
+                <width>1</width>
+                <module>54</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>172</local-port>
+                <width>1</width>
+                <module>54</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>173</local-port>
+                <width>1</width>
+                <module>54</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>174</local-port>
+                <width>1</width>
+                <module>54</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>175</local-port>
+                <width>1</width>
+                <module>54</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>176</local-port>
+                <width>1</width>
+                <module>54</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>161</local-port>
+                <width>1</width>
+                <module>55</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>162</local-port>
+                <width>1</width>
+                <module>55</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>163</local-port>
+                <width>1</width>
+                <module>55</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>164</local-port>
+                <width>1</width>
+                <module>55</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>165</local-port>
+                <width>1</width>
+                <module>55</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>166</local-port>
+                <width>1</width>
+                <module>55</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>167</local-port>
+                <width>1</width>
+                <module>55</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>168</local-port>
+                <width>1</width>
+                <module>55</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>209</local-port>
+                <width>1</width>
+                <module>56</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>210</local-port>
+                <width>1</width>
+                <module>56</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>211</local-port>
+                <width>1</width>
+                <module>56</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>212</local-port>
+                <width>1</width>
+                <module>56</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>213</local-port>
+                <width>1</width>
+                <module>56</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>214</local-port>
+                <width>1</width>
+                <module>56</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>215</local-port>
+                <width>1</width>
+                <module>56</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>216</local-port>
+                <width>1</width>
+                <module>56</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>217</local-port>
+                <width>1</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>218</local-port>
+                <width>1</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>219</local-port>
+                <width>1</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>220</local-port>
+                <width>1</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>221</local-port>
+                <width>1</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>222</local-port>
+                <width>1</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>223</local-port>
+                <width>1</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>224</local-port>
+                <width>1</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>201</local-port>
+                <width>1</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>202</local-port>
+                <width>1</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>203</local-port>
+                <width>1</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>204</local-port>
+                <width>1</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>205</local-port>
+                <width>1</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>206</local-port>
+                <width>1</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>207</local-port>
+                <width>1</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>208</local-port>
+                <width>1</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>193</local-port>
+                <width>1</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>194</local-port>
+                <width>1</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>195</local-port>
+                <width>1</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>196</local-port>
+                <width>1</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>197</local-port>
+                <width>1</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>198</local-port>
+                <width>1</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>199</local-port>
+                <width>1</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>200</local-port>
+                <width>1</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>241</local-port>
+                <width>1</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>242</local-port>
+                <width>1</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>243</local-port>
+                <width>1</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>244</local-port>
+                <width>1</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>245</local-port>
+                <width>1</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>246</local-port>
+                <width>1</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>247</local-port>
+                <width>1</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>248</local-port>
+                <width>1</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>249</local-port>
+                <width>1</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>250</local-port>
+                <width>1</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>251</local-port>
+                <width>1</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>252</local-port>
+                <width>1</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>253</local-port>
+                <width>1</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>254</local-port>
+                <width>1</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>255</local-port>
+                <width>1</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>255</local-port>
+                <width>1</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>233</local-port>
+                <width>1</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>234</local-port>
+                <width>1</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>235</local-port>
+                <width>1</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>236</local-port>
+                <width>1</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>237</local-port>
+                <width>1</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>238</local-port>
+                <width>1</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>239</local-port>
+                <width>1</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>240</local-port>
+                <width>1</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>225</local-port>
+                <width>1</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>226</local-port>
+                <width>1</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>227</local-port>
+                <width>1</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>228</local-port>
+                <width>1</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>229</local-port>
+                <width>1</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>230</local-port>
+                <width>1</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>231</local-port>
+                <width>1</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>232</local-port>
+                <width>1</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <!--<port-info>
+                <local-port>512</local-port>
+                <width>1</width>
+                <module>64</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>64</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>514</local-port>
+                <width>1</width>
+                <module>65</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>64</port-speed>
+            </port-info>-->
+        </ports-list>
+    </platform_info>
+</root>
+
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/default_sku b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/default_sku
new file mode 100644
index 000000000000..2d1695dc3a92
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/default_sku
@@ -0,0 +1 @@
+ACS-SN5640 t1
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json
new file mode 100644
index 000000000000..d866c6a23ec2
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json
@@ -0,0 +1,1297 @@
+{
+    "chassis": {
+        "name": "SN5600_SIMX",
+        "components": [
+            {
+                "name": "ONIE"
+            },
+            {
+                "name": "SSD"
+            },
+            {
+                "name": "BIOS"
+            },
+            {
+                "name": "CPLD1"
+            },
+            {
+                "name": "CPLD2"
+            },
+            {
+                "name": "CPLD3"
+            },
+            {
+                "name": "CPLD4"
+            },
+            {
+                "name": "CPLD5"
+            },
+            {
+                "name": "CPLD6"
+            }
+        ],
+        "fans": [],
+        "fan_drawers": [
+            {
+                "name": "drawer1",
+                "fans": [
+                    {
+                        "name": "fan1"
+                    }
+                ]
+            },
+            {
+                "name": "drawer2",
+                "fans": [
+                    {
+                        "name": "fan2"
+                    }
+                ]
+            },
+            {
+                "name": "drawer3",
+                "fans": [
+                    {
+                        "name": "fan3"
+                    }
+                ]
+            },
+            {
+                "name": "drawer4",
+                "fans": [
+                    {
+                        "name": "fan4"
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "PSU 1",
+                "fans": [
+                    {
+                        "name": "psu1_fan1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU-1 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "PSU 2",
+                "fans": [
+                    {
+                        "name": "psu2_fan1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU-2 Temp"
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "ASIC"
+            },
+            {
+                "name": "Ambient COMEX Temp"
+            },
+            {
+                "name": "Ambient Fan Side Temp"
+            },
+            {
+                "name": "Ambient Port Side Temp"
+            },
+            {
+                "name": "CPU Core 0 Temp"
+            },
+            {
+                "name": "CPU Core 1 Temp"
+            },
+            {
+                "name": "CPU Core 2 Temp"
+            },
+            {
+                "name": "CPU Core 3 Temp"
+            },
+            {
+                "name": "CPU Pack Temp"
+            }
+        ],
+        "sfps": [
+            {
+                "name": "sfp1",
+                "thermals": [
+                    {
+                        "name": "xSFP module 1 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp2",
+                "thermals": [
+                    {
+                        "name": "xSFP module 2 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp3",
+                "thermals": [
+                    {
+                        "name": "xSFP module 3 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp4",
+                "thermals": [
+                    {
+                        "name": "xSFP module 4 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp5",
+                "thermals": [
+                    {
+                        "name": "xSFP module 5 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp6",
+                "thermals": [
+                    {
+                        "name": "xSFP module 6 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp7",
+                "thermals": [
+                    {
+                        "name": "xSFP module 7 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp8",
+                "thermals": [
+                    {
+                        "name": "xSFP module 8 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp9",
+                "thermals": [
+                    {
+                        "name": "xSFP module 9 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp10",
+                "thermals": [
+                    {
+                        "name": "xSFP module 10 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp11",
+                "thermals": [
+                    {
+                        "name": "xSFP module 11 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp12",
+                "thermals": [
+                    {
+                        "name": "xSFP module 12 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp13",
+                "thermals": [
+                    {
+                        "name": "xSFP module 13 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp14",
+                "thermals": [
+                    {
+                        "name": "xSFP module 14 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp15",
+                "thermals": [
+                    {
+                        "name": "xSFP module 15 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp16",
+                "thermals": [
+                    {
+                        "name": "xSFP module 16 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp17",
+                "thermals": [
+                    {
+                        "name": "xSFP module 17 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp18",
+                "thermals": [
+                    {
+                        "name": "xSFP module 18 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp19",
+                "thermals": [
+                    {
+                        "name": "xSFP module 19 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp20",
+                "thermals": [
+                    {
+                        "name": "xSFP module 20 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp21",
+                "thermals": [
+                    {
+                        "name": "xSFP module 21 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp22",
+                "thermals": [
+                    {
+                        "name": "xSFP module 22 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp23",
+                "thermals": [
+                    {
+                        "name": "xSFP module 23 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp24",
+                "thermals": [
+                    {
+                        "name": "xSFP module 24 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp25",
+                "thermals": [
+                    {
+                        "name": "xSFP module 25 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp26",
+                "thermals": [
+                    {
+                        "name": "xSFP module 26 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp27",
+                "thermals": [
+                    {
+                        "name": "xSFP module 27 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp28",
+                "thermals": [
+                    {
+                        "name": "xSFP module 28 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp29",
+                "thermals": [
+                    {
+                        "name": "xSFP module 29 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp30",
+                "thermals": [
+                    {
+                        "name": "xSFP module 30 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp31",
+                "thermals": [
+                    {
+                        "name": "xSFP module 31 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp32",
+                "thermals": [
+                    {
+                        "name": "xSFP module 32 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp33",
+                "thermals": [
+                    {
+                        "name": "xSFP module 33 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp34",
+                "thermals": [
+                    {
+                        "name": "xSFP module 34 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp35",
+                "thermals": [
+                    {
+                        "name": "xSFP module 35 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp36",
+                "thermals": [
+                    {
+                        "name": "xSFP module 36 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp37",
+                "thermals": [
+                    {
+                        "name": "xSFP module 37 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp38",
+                "thermals": [
+                    {
+                        "name": "xSFP module 38 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp39",
+                "thermals": [
+                    {
+                        "name": "xSFP module 39 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp40",
+                "thermals": [
+                    {
+                        "name": "xSFP module 40 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp41",
+                "thermals": [
+                    {
+                        "name": "xSFP module 41 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp42",
+                "thermals": [
+                    {
+                        "name": "xSFP module 42 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp43",
+                "thermals": [
+                    {
+                        "name": "xSFP module 43 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp44",
+                "thermals": [
+                    {
+                        "name": "xSFP module 44 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp45",
+                "thermals": [
+                    {
+                        "name": "xSFP module 45 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp46",
+                "thermals": [
+                    {
+                        "name": "xSFP module 46 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp47",
+                "thermals": [
+                    {
+                        "name": "xSFP module 47 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp48",
+                "thermals": [
+                    {
+                        "name": "xSFP module 48 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp49",
+                "thermals": [
+                    {
+                        "name": "xSFP module 49 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp50",
+                "thermals": [
+                    {
+                        "name": "xSFP module 50 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp51",
+                "thermals": [
+                    {
+                        "name": "xSFP module 51 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp52",
+                "thermals": [
+                    {
+                        "name": "xSFP module 52 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp53",
+                "thermals": [
+                    {
+                        "name": "xSFP module 53 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp54",
+                "thermals": [
+                    {
+                        "name": "xSFP module 54 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp55",
+                "thermals": [
+                    {
+                        "name": "xSFP module 55 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp56",
+                "thermals": [
+                    {
+                        "name": "xSFP module 56 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp57",
+                "thermals": [
+                    {
+                        "name": "xSFP module 57 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp58",
+                "thermals": [
+                    {
+                        "name": "xSFP module 58 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp59",
+                "thermals": [
+                    {
+                        "name": "xSFP module 59 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp60",
+                "thermals": [
+                    {
+                        "name": "xSFP module 60 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp61",
+                "thermals": [
+                    {
+                        "name": "xSFP module 61 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp62",
+                "thermals": [
+                    {
+                        "name": "xSFP module 62 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp63",
+                "thermals": [
+                    {
+                        "name": "xSFP module 63 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp64",
+                "thermals": [
+                    {
+                        "name": "xSFP module 64 Temp"
+                    }
+                ]
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1,1,1,1,1",
+            "lanes": "0,1,2,3,4,5,6,7,",
+            "breakout_modes": {
+                "1x400G": ["etp1"],
+                "2x400G[200G]": ["etp1a", "etp1b"],
+                "4x200G[100G]": ["etp1a", "etp1b", "etp1c", "etp1d"],
+                "8x100G[50G]": ["etp1a", "etp1b", "etp1c", "etp1d", "etp1e", "etp1f", "etp1g", "etp1h"]
+            }
+        },
+        "Ethernet8": {
+            "index": "2,2,2,2,2,2,2,2",
+            "lanes": "8,9,10,11,12,13,14,15,",
+            "breakout_modes": {
+                "1x400G": ["etp2"],
+                "2x400G[200G]": ["etp2a", "etp2b"],
+                "4x200G[100G]": ["etp2a", "etp2b", "etp2c", "etp2d"],
+                "8x100G[50G]": ["etp2a", "etp2b", "etp2c", "etp2d", "etp2e", "etp2f", "etp2g","etp2h"]
+            }
+        },
+        "Ethernet16": {
+            "index": "3,3,3,3,3,3,3,3",
+            "lanes": "16,17,18,19,20,21,22,23,",
+            "breakout_modes": {
+                "1x400G": ["etp3"],
+                "2x400G[200G]": ["etp3a", "etp3b"],
+                "4x200G[100G]": ["etp3a", "etp3b", "etp3c", "etp3d"],
+                "8x100G[50G]": ["etp3a", "etp3b", "etp3c", "etp3d", "etp3e", "etp3f", "etp3g", "etp3h"]
+            }
+        },
+        "Ethernet24": {
+            "index": "4,4,4,4,4,4,4,4",
+            "lanes": "24,25,26,27,28,29,30,31,",
+            "breakout_modes": {
+                "1x400G": ["etp4"],
+                "2x400G[200G]": ["etp4a", "etp4b"],
+                "4x200G[100G]": ["etp4a", "etp4b", "etp4c", "etp4d"],
+                "8x100G[50G]": ["etp4a", "etp4b", "etp4c", "etp4d", "etp4e", "etp4f", "etp4g", "etp4h"]
+            }
+        },
+        "Ethernet32": {
+            "index": "5,5,5,5,5,5,5,5",
+            "lanes": "32,33,34,35,36,37,38,39,",
+            "breakout_modes": {
+                "1x400G": ["etp5"],
+                "2x400G[200G]": ["etp5a", "etp5b"],
+                "4x200G[100G]": ["etp5a", "etp5b", "etp5c", "etp5d"],
+                "8x100G[50G]": ["etp5a", "etp5b", "etp5c", "etp5d", "etp5e", "etp5f", "etp5g", "etp5h"]
+            }
+        },
+        "Ethernet40": {
+            "index": "6,6,6,6,6,6,6,6",
+            "lanes": "40,41,42,43,44,45,46,47,",
+            "breakout_modes": {
+                "1x400G": ["etp6"],
+                "2x400G[200G]": ["etp6a", "etp6b"],
+                "4x200G[100G]": ["etp6a", "etp6b", "etp6c", "etp6d"],
+                "8x100G[50G]": ["etp6a", "etp6b", "etp6c", "etp6d", "etp6e", "etp6f", "etp6g", "etp6h"]
+            }
+        },
+        "Ethernet48": {
+            "index": "7,7,7,7,7,7,7,7",
+            "lanes": "48,49,50,51,52,53,54,55,",
+            "breakout_modes": {
+                "1x400G": ["etp7"],
+                "2x400G[200G]": ["etp7a", "etp7b"],
+                "4x200G[100G]": ["etp7a", "etp7b", "etp7c", "etp7d"],
+                "8x100G[50G]": ["etp7a", "etp7b", "etp7c", "etp7d", "etp7e", "etp7f", "etp7g", "etp7h"]
+            }
+        },
+        "Ethernet56": {
+            "index": "8,8,8,8,8,8,8,8",
+            "lanes": "56,57,58,59,60,61,62,63,",
+            "breakout_modes": {
+                "1x400G": ["etp8"],
+                "2x400G[200G]": ["etp8a", "etp8b"],
+                "4x200G[100G]": ["etp8a", "etp8b", "etp8c", "etp8d"],
+                "8x100G[50G]": ["etp8a", "etp8b", "etp8c", "etp8d", "etp8e", "etp8f",  "etp8g", "etp8h"]
+            }
+        },
+        "Ethernet64": {
+            "index": "9,9,9,9,9,9,9,9",
+            "lanes": "64,65,66,67,68,69,70,71,",
+            "breakout_modes": {
+                "1x400G": ["etp9"],
+                "2x400G[200G]": ["etp9a", "etp9b"],
+                "4x200G[100G]": ["etp9a", "etp9b", "etp9c", "etp9d"],
+                "8x100G[50G]": ["etp9a", "etp9b", "etp9c", "etp9d", "etp9e", "etp9f", "etp9g", "etp9h"]
+            }
+        },
+        "Ethernet72": {
+            "index": "10,10,10,10,10,10,10,10",
+            "lanes": "72,73,74,75,76,77,78,79,",
+            "breakout_modes": {
+                "1x400G": ["etp10"],
+                "2x400G[200G]": ["etp10a", "etp10b"],
+                "4x200G[100G]": ["etp10a", "etp10b", "etp10c", "etp10d"],
+                "8x100G[50G]": ["etp10a", "etp10b", "etp10c", "etp10d", "etp10e", "etp10f", "etp10g", "etp10h"]
+            }
+        },
+        "Ethernet80": {
+            "index": "11,11,11,11,11,11,11,11",
+            "lanes": "80,81,82,83,84,85,86,87,",
+            "breakout_modes": {
+                "1x400G": ["etp11"],
+                "2x400G[200G]": ["etp11a", "etp11b"],
+                "4x200G[100G]": ["etp11a", "etp11b", "etp11c", "etp11d"],
+                "8x100G[50G]": ["etp11a", "etp11b", "etp11c", "etp11d", "etp11e", "etp11f", "etp11g", "etp11h"]
+            }
+        },
+        "Ethernet88": {
+            "index": "12,12,12,12,12,12,12,12",
+            "lanes": "88,89,90,91,92,93,94,95,",
+            "breakout_modes": {
+                "1x400G": ["etp12"],
+                "2x400G[200G]": ["etp12a", "etp12b"],
+                "4x200G[100G]": ["etp12a", "etp12b", "etp12c", "etp12d"],
+                "8x100G[50G]": ["etp12a", "etp12b", "etp12c", "etp12d", "etp12e", "etp12f", "etp12g", "etp12h"]
+            }
+        },
+        "Ethernet96": {
+            "index": "13,13,13,13,13,13,13,13",
+            "lanes": "96,97,98,99,100,101,102,103,",
+            "breakout_modes": {
+                "1x400G": ["etp13"],
+                "2x400G[200G]": ["etp13a", "etp13b"],
+                "4x200G[100G]": ["etp13a", "etp13b", "etp13c", "etp13d"],
+                "8x100G[50G]": ["etp13a", "etp13b", "etp13c", "etp13d", "etp13e", "etp13f", "etp13g", "etp13h"]
+            }
+        },
+        "Ethernet104": {
+            "index": "14,14,14,14,14,14,14,14",
+            "lanes": "104,105,106,107,108,109,110,111,",
+            "breakout_modes": {
+                "1x400G": ["etp14"],
+                "2x400G[200G]": ["etp14a", "etp14b"],
+                "4x200G[100G]": ["etp14a", "etp14b", "etp14c", "etp14d"],
+                "8x100G[50G]": ["etp14a", "etp14b", "etp14c", "etp14d", "etp14e", "etp14f", "etp14g", "etp14h"]
+            }
+        },
+        "Ethernet112": {
+            "index": "15,15,15,15,15,15,15,15",
+            "lanes": "112,113,114,115,116,117,118,119,",
+            "breakout_modes": {
+                "1x400G": ["etp15"],
+                "2x400G[200G]": ["etp15a", "etp15b"],
+                "4x200G[100G]": ["etp15a", "etp15b", "etp15c", "etp15d"],
+                "8x100G[50G]": ["etp15a", "etp15b", "etp15c", "etp15d", "etp15e", "etp15f", "etp15g", "etp15h"]
+            }
+        },
+        "Ethernet120": {
+            "index": "16,16,16,16,16,16,16,16",
+            "lanes": "120,121,122,123,124,125,126,127,",
+            "breakout_modes": {
+                "1x400G": ["etp16"],
+                "2x400G[200G]": ["etp16a", "etp16b"],
+                "4x200G[100G]": ["etp16a", "etp16b", "etp16c", "etp16d"],
+                "8x100G[50G]": ["etp16a", "etp16b", "etp16c", "etp16d", "etp16e", "etp16f", "etp16g", "etp16h"]
+            }
+        },
+        "Ethernet128": {
+            "index": "17,17,17,17,17,17,17,17",
+            "lanes": "128,129,130,131,132,133,134,135,",
+            "breakout_modes": {
+                "1x400G": ["etp17"],
+                "2x400G[200G]": ["etp17a", "etp17b"],
+                "4x200G[100G]": ["etp17a", "etp17b", "etp17c", "etp17d"],
+                "8x100G[50G]": ["etp17a", "etp17b", "etp17c", "etp17d", "etp17e", "etp17f", "etp17g", "etp17h"]
+            }
+        },
+        "Ethernet136": {
+            "index": "18,18,18,18,18,18,18,18",
+            "lanes": "136,137,138,139,140,141,142,143,",
+            "breakout_modes": {
+                "1x400G": ["etp18"],
+                "2x400G[200G]": ["etp18a", "etp18b"],
+                "4x200G[100G]": ["etp18a", "etp18b", "etp18c", "etp18d"],
+                "8x100G[50G]": ["etp18a", "etp18b", "etp18c", "etp18d", "etp18e", "etp18f", "etp18g", "etp18h"]
+            }
+        },
+        "Ethernet144": {
+            "index": "19,19,19,19,19,19,19,19",
+            "lanes": "144,145,146,147,148,149,150,151,",
+            "breakout_modes": {
+                "1x400G": ["etp19"],
+                "2x400G[200G]": ["etp19a", "etp19b"],
+                "4x200G[100G]": ["etp19a", "etp19b", "etp19c", "etp19d"],
+                "8x100G[50G]": ["etp19a", "etp19b", "etp19c", "etp19d", "etp19e", "etp19f", "etp19g", "etp19h"]
+            }
+        },
+        "Ethernet152": {
+            "index": "20,20,20,20,20,20,20,20",
+            "lanes": "152,153,154,155,156,157,158,159,",
+            "breakout_modes": {
+                "1x400G": ["etp20"],
+                "2x400G[200G]": ["etp20a", "etp20b"],
+                "4x200G[100G]": ["etp20a", "etp20b", "etp20c", "etp20d"],
+                "8x100G[50G]": ["etp20a", "etp20b", "etp20c", "etp20d", "etp20e", "etp20f", "etp20g", "etp20h"]
+            }
+        },
+        "Ethernet160": {
+            "index": "21,21,21,21,21,21,21,21",
+            "lanes": "160,161,162,163,164,165,166,167,",
+            "breakout_modes": {
+                "1x400G": ["etp21"],
+                "2x400G[200G]": ["etp21a", "etp21b"],
+                "4x200G[100G]": ["etp21a", "etp21b", "etp21c", "etp21d"],
+                "8x100G[50G]": ["etp21a", "etp21b", "etp21c", "etp21d", "etp21e", "etp21f", "etp21g", "etp21h"]
+            }
+        },
+        "Ethernet168": {
+            "index": "22,22,22,22,22,22,22,22",
+            "lanes": "168,169,170,171,172,173,174,175,",
+            "breakout_modes": {
+                "1x400G": ["etp22"],
+                "2x400G[200G]": ["etp22a", "etp22b"],
+                "4x200G[100G]": ["etp22a", "etp22b", "etp22c", "etp22d"],
+                "8x100G[50G]": ["etp22a", "etp22b", "etp22c", "etp22d", "etp22e", "etp22f", "etp22g", "etp22h"]
+            }
+        },
+        "Ethernet176": {
+            "index": "23,23,23,23,23,23,23,23",
+            "lanes": "176,177,178,179,180,181,182,183,",
+            "breakout_modes": {
+                "1x400G": ["etp23"],
+                "2x400G[200G]": ["etp23a", "etp23b"],
+                "4x200G[100G]": ["etp23a", "etp23b", "etp23c", "etp23d"],
+                "8x100G[50G]": ["etp23a", "etp23b", "etp23c", "etp23d", "etp23e", "etp23f", "etp23g", "etp23h"]
+            }
+        },
+        "Ethernet184": {
+            "index": "24,24,24,24,24,24,24,24",
+            "lanes": "184,185,186,187,188,189,190,191,",
+            "breakout_modes": {
+                "1x400G": ["etp24"],
+                "2x400G[200G]": ["etp24a", "etp24b"],
+                "4x200G[100G]": ["etp24a", "etp24b", "etp24c", "etp24d"],
+                "8x100G[50G]": ["etp24a", "etp24b", "etp24c", "etp24d", "etp24e", "etp24f", "etp24g", "etp24h"]
+            }
+        },
+        "Ethernet192": {
+            "index": "25,25,25,25,25,25,25,25",
+            "lanes": "192,193,194,195,196,197,198,199,",
+            "breakout_modes": {
+                "1x400G": ["etp25"],
+                "2x400G[200G]": ["etp25a", "etp25b"],
+                "4x200G[100G]": ["etp25a", "etp25b", "etp25c", "etp25d"],
+                "8x100G[50G]": ["etp25a", "etp25b", "etp25c", "etp25d", "etp25e", "etp25f", "etp25g", "etp25h"]
+            }
+        },
+        "Ethernet200": {
+            "index": "26,26,26,26,26,26,26,26",
+            "lanes": "200,201,202,203,204,205,206,207,",
+            "breakout_modes": {
+                "1x400G": ["etp26"],
+                "2x400G[200G]": ["etp26a", "etp26b"],
+                "4x200G[100G]": ["etp26a", "etp26b", "etp26c", "etp26d"],
+                "8x100G[50G]": ["etp26a", "etp26b", "etp26c", "etp26d", "etp26e", "etp26f", "etp26g", "etp26h"]
+            }
+        },
+        "Ethernet208": {
+            "index": "27,27,27,27,27,27,27,27",
+            "lanes": "208,209,210,211,212,213,214,215,",
+            "breakout_modes": {
+                "1x400G": ["etp27"],
+                "2x400G[200G]": ["etp27a", "etp27b"],
+                "4x200G[100G]": ["etp27a", "etp27b", "etp27c", "etp27d"],
+                "8x100G[50G]": ["etp27a", "etp27b", "etp27c", "etp27d", "etp27e", "etp27f", "etp27g", "etp27h"]
+            }
+        },
+        "Ethernet216": {
+            "index": "28,28,28,28,28,28,28,28",
+            "lanes": "216,217,218,219,220,221,222,223,",
+            "breakout_modes": {
+                "1x400G": ["etp28"],
+                "2x400G[200G]": ["etp28a", "etp28b"],
+                "4x200G[100G]": ["etp28a", "etp28b", "etp28c", "etp28d"],
+                "8x100G[50G]": ["etp28a", "etp28b", "etp28c", "etp28d", "etp28e", "etp28f", "etp28g", "etp28h"]
+            }
+        },
+        "Ethernet224": {
+            "index": "29,29,29,29,29,29,29,29",
+            "lanes": "224,225,226,227,228,229,230,231,",
+            "breakout_modes": {
+                "1x400G": ["etp29"],
+                "2x400G[200G]": ["etp29a", "etp29b"],
+                "4x200G[100G]": ["etp29a", "etp29b", "etp29c", "etp29d"],
+                "8x100G[50G]": ["etp29a", "etp29b", "etp29c", "etp29d", "etp29e", "etp29f", "etp29g", "etp29h"]
+            }
+        },
+        "Ethernet232": {
+            "index": "30,30,30,30,30,30,30,30",
+            "lanes": "232,233,234,235,236,237,238,239,",
+            "breakout_modes": {
+                "1x400G": ["etp30"],
+                "2x400G[200G]": ["etp30a", "etp30b"],
+                "4x200G[100G]": ["etp30a", "etp30b", "etp30c", "etp30d"],
+                "8x100G[50G]": ["etp30a", "etp30b", "etp30c", "etp30d", "etp30e", "etp30f", "etp30g", "etp30h"]
+            }
+        },
+        "Ethernet240": {
+            "index": "31,31,31,31,31,31,31,31",
+            "lanes": "240,241,242,243,244,245,246,247,",
+            "breakout_modes": {
+                "1x400G": ["etp31"],
+                "2x400G[200G]": ["etp31a", "etp31b"],
+                "4x200G[100G]": ["etp31a", "etp31b", "etp31c", "etp31d"],
+                "8x100G[50G]": ["etp31a", "etp31b", "etp31c", "etp31d", "etp31e", "etp31f", "etp31g", "etp31h"]
+            }
+        },
+        "Ethernet248": {
+            "index": "32,32,32,32,32,32,32,32",
+            "lanes": "248,249,250,251,252,253,254,255,",
+            "breakout_modes": {
+                "1x400G": ["etp32"],
+                "2x400G[200G]": ["etp32a", "etp32b"],
+                "4x200G[100G]": ["etp32a", "etp32b", "etp32c", "etp32d"],
+                "8x100G[50G]": ["etp32a", "etp32b", "etp32c", "etp32d", "etp32e", "etp32f", "etp32g", "etp32h"]
+            }
+        },
+        "Ethernet256": {
+            "index": "33,33,33,33,33,33,33,33",
+            "lanes": "256,257,258,259,260,261,262,263,",
+            "breakout_modes": {
+                "1x400G": ["etp33"],
+                "2x400G[200G]": ["etp33a", "etp33b"],
+                "4x200G[100G]": ["etp33a", "etp33b", "etp33c", "etp33d"],
+                "8x100G[50G]": ["etp33a", "etp33b", "etp33c", "etp33d", "etp33e", "etp33f",  "etp33g", "etp33h"]
+            }
+        },
+        "Ethernet264": {
+            "index": "34,34,34,34,34,34,34,34",
+            "lanes": "264,265,266,267,268,269,270,271,",
+            "breakout_modes": {
+                "1x400G": ["etp34"],
+                "2x400G[200G]": ["etp34a", "etp34b"],
+                "4x200G[100G]": ["etp34a", "etp34b", "etp34c", "etp34d"],
+                "8x100G[50G]": ["etp34a", "etp34b", "etp34c", "etp34d", "etp34e", "etp34f", "etp34g", "etp34h"]
+            }
+        },
+        "Ethernet272": {
+            "index": "35,35,35,35,35,35,35,35",
+            "lanes": "272,273,274,275,276,277,278,279,",
+            "breakout_modes": {
+                "1x400G": ["etp35"],
+                "2x400G[200G]": ["etp35a", "etp35b"],
+                "4x200G[100G]": ["etp35a", "etp35b", "etp35c", "etp35d"],
+                "8x100G[50G]": ["etp35a", "etp35b", "etp35c", "etp35d", "etp35e", "etp35f", "etp35g", "etp35h"]
+            }
+        },
+        "Ethernet280": {
+            "index": "36,36,36,36,36,36,36,36",
+            "lanes": "280,281,282,283,284,285,286,287,",
+            "breakout_modes": {
+                "1x400G": ["etp36"],
+                "2x400G[200G]": ["etp36a", "etp36b"],
+                "4x200G[100G]": ["etp36a", "etp36b", "etp36c", "etp36d"],
+                "8x100G[50G]": ["etp36a", "etp36b", "etp36c", "etp36d", "etp36e", "etp36f", "etp36g", "etp36h"]
+            }
+        },
+        "Ethernet288": {
+            "index": "37,37,37,37,37,37,37,37",
+            "lanes": "288,289,290,291,292,293,294,295,",
+            "breakout_modes": {
+                "1x400G": ["etp37"],
+                "2x400G[200G]": ["etp37a", "etp37b"],
+                "4x200G[100G]": ["etp37a", "etp37b", "etp37c", "etp37d"],
+                "8x100G[50G]": ["etp37a", "etp37b", "etp37c", "etp37d", "etp37e", "etp37f", "etp37g", "etp37h"]
+            }
+        },
+        "Ethernet296": {
+            "index": "38,38,38,38,38,38,38,38",
+            "lanes": "296,297,298,299,300,301,302,303,",
+            "breakout_modes": {
+                "1x400G": ["etp38"],
+                "2x400G[200G]": ["etp38a", "etp38b"],
+                "4x200G[100G]": ["etp38a", "etp38b", "etp38c", "etp38d"],
+                "8x100G[50G]": ["etp38a", "etp38b", "etp38c", "etp38d", "etp38e", "etp38f", "etp38g", "etp38h"]
+            }
+        },
+        "Ethernet304": {
+            "index": "39,39,39,39,39,39,39,39",
+            "lanes": "304,305,306,307,308,309,310,311,",
+            "breakout_modes": {
+                "1x400G": ["etp39"],
+                "2x400G[200G]": ["etp39a", "etp39b"],
+                "4x200G[100G]": ["etp39a", "etp39b", "etp39c", "etp39d" ],
+                "8x100G[50G]": ["etp39a", "etp39b", "etp39c", "etp39d", "etp39e", "etp39f", "etp39g", "etp39h"]
+            }
+        },
+        "Ethernet312": {
+            "index": "40,40,40,40,40,40,40,40",
+            "lanes": "312,313,314,315,316,317,318,319,",
+            "breakout_modes": {
+                "1x400G": ["etp40"],
+                "2x400G[200G]": ["etp40a", "etp40b"],
+                "4x200G[100G]": ["etp40a", "etp40b", "etp40c", "etp40d"],
+                "8x100G[50G]": ["etp40a", "etp40b", "etp40c", "etp40d", "etp40e", "etp40f", "etp40g", "etp40h"]
+            }
+        },
+        "Ethernet320": {
+            "index": "41,41,41,41,41,41,41,41",
+            "lanes": "320,321,322,323,324,325,326,327,",
+            "breakout_modes": {
+                "1x400G": ["etp41"],
+                "2x400G[200G]": ["etp41a", "etp41b"],
+                "4x200G[100G]": ["etp41a", "etp41b", "etp41c", "etp41d"],
+                "8x100G[50G]": ["etp41a", "etp41b", "etp41c", "etp41d", "etp41e", "etp41f", "etp41g", "etp41h"]
+            }
+        },
+        "Ethernet328": {
+            "index": "42,42,42,42,42,42,42,42",
+            "lanes": "328,329,330,331,332,333,334,335,",
+            "breakout_modes": {
+                "1x400G": ["etp42"],
+                "2x400G[200G]": ["etp42a", "etp42b"],
+                "4x200G[100G]": ["etp42a", "etp42b", "etp42c", "etp42d"],
+                "8x100G[50G]": ["etp42a",  "etp42b", "etp42c", "etp42d", "etp42e", "etp42f", "etp42g", "etp42h"]
+            }
+        },
+        "Ethernet336": {
+            "index": "43,43,43,43,43,43,43,43",
+            "lanes": "336,337,338,339,340,341,342,343,",
+            "breakout_modes": {
+                "1x400G": ["etp43"],
+                "2x400G[200G]": ["etp43a", "etp43b"],
+                "4x200G[100G]": ["etp43a", "etp43b", "etp43c", "etp43d"],
+                "8x100G[50G]": ["etp43a", "etp43b", "etp43c", "etp43d", "etp43e", "etp43f", "etp43g", "etp43h"]
+            }
+        },
+        "Ethernet344": {
+            "index": "44,44,44,44,44,44,44,44",
+            "lanes": "344,345,346,347,348,349,350,351,",
+            "breakout_modes": {
+                "1x400G": ["etp44"],
+                "2x400G[200G]": ["etp44a", "etp44b"],
+                "4x200G[100G]": ["etp44a", "etp44b", "etp44c", "etp44d"],
+                "8x100G[50G]": ["etp44a", "etp44b", "etp44c", "etp44d", "etp44e", "etp44f", "etp44g", "etp44h"]
+            }
+        },
+        "Ethernet352": {
+            "index": "45,45,45,45,45,45,45,45",
+            "lanes": "352,353,354,355,356,357,358,359,",
+            "breakout_modes": {
+                "1x400G": ["etp45"],
+                "2x400G[200G]": ["etp45a", "etp45b"],
+                "4x200G[100G]": ["etp45a", "etp45b", "etp45c", "etp45d"],
+                "8x100G[50G]": ["etp45a", "etp45b", "etp45c", "etp45d", "etp45e", "etp45f", "etp45g", "etp45h"]
+            }
+        },
+        "Ethernet360": {
+            "index": "46,46,46,46,46,46,46,46",
+            "lanes": "360,361,362,363,364,365,366,367,",
+            "breakout_modes": {
+                "1x400G": ["etp46"],
+                "2x400G[200G]": ["etp46a", "etp46b"],
+                "4x200G[100G]": ["etp46a", "etp46b", "etp46c", "etp46d"],
+                "8x100G[50G]": ["etp46a", "etp46b", "etp46c", "etp46d", "etp46e", "etp46f", "etp46g", "etp46h"]
+            }
+        },
+        "Ethernet368": {
+            "index": "47,47,47,47,47,47,47,47",
+            "lanes": "368,369,370,371,372,373,374,375,",
+            "breakout_modes": {
+                "1x400G": ["etp47"],
+                "2x400G[200G]": ["etp47a", "etp47b"],
+                "4x200G[100G]": ["etp47a", "etp47b", "etp47c", "etp47d"],
+                "8x100G[50G]": ["etp47a", "etp47b","etp47c", "etp47d", "etp47e", "etp47f", "etp47g", "etp47h"]
+            }
+        },
+        "Ethernet376": {
+            "index": "48,48,48,48,48,48,48,48",
+            "lanes": "376,377,378,379,380,381,382,383,",
+            "breakout_modes": {
+                "1x400G": ["etp48"],
+                "2x400G[200G]": ["etp48a", "etp48b"],
+                "4x200G[100G]": ["etp48a", "etp48b", "etp48c", "etp48d"],
+                "8x100G[50G]": ["etp48a", "etp48b", "etp48c", "etp48d", "etp48e", "etp48f", "etp48g", "etp48h"]
+            }
+        },
+        "Ethernet384": {
+            "index": "49,49,49,49,49,49,49,49",
+            "lanes": "384,385,386,387,388,389,390,391,",
+            "breakout_modes": {
+                "1x400G": ["etp49"],
+                "2x400G[200G]": ["etp49a", "etp49b"],
+                "4x200G[100G]": ["etp49a", "etp49b", "etp49c", "etp49d"],
+                "8x100G[50G]": ["etp49a", "etp49b", "etp49c", "etp49d", "etp49e", "etp49f", "etp49g", "etp49h"]
+            }
+        },
+        "Ethernet392": {
+            "index": "50,50,50,50,50,50,50,50",
+            "lanes": "392,393,394,395,396,397,398,399,",
+            "breakout_modes": {
+                "1x400G": ["etp50"],
+                "2x400G[200G]": ["etp50a", "etp50b"],
+                "4x200G[100G]": ["etp50a", "etp50b", "etp50c", "etp50d"],
+                "8x100G[50G]": ["etp50a", "etp50b", "etp50c", "etp50d", "etp50e", "etp50f", "etp50g", "etp50h"]
+            }
+        },
+        "Ethernet400": {
+            "index": "51,51,51,51,51,51,51,51",
+            "lanes": "400,401,402,403,404,405,406,407,",
+            "breakout_modes": {
+                "1x400G": ["etp51"],
+                "2x400G[200G]": ["etp51a", "etp51b"],
+                "4x200G[100G]": ["etp51a", "etp51b", "etp51c", "etp51d"],
+                "8x100G[50G]": ["etp51a", "etp51b", "etp51c", "etp51d", "etp51e", "etp51f", "etp51g", "etp51h"]
+            }
+        },
+        "Ethernet408": {
+            "index": "52,52,52,52,52,52,52,52",
+            "lanes": "408,409,410,411,412,413,414,415,",
+            "breakout_modes": {
+                "1x400G": ["etp52"],
+                "2x400G[200G]": ["etp52a", "etp52b"],
+                "4x200G[100G]": ["etp52a", "etp52b", "etp52c", "etp52d"],
+                "8x100G[50G]": ["etp52a", "etp52b", "etp52c", "etp52d", "etp52e", "etp52f", "etp52g", "etp52h"]
+            }
+        },
+            "Ethernet416": {
+            "index": "53,53,53,53,53,53,53,53",
+            "lanes": "416,417,418,419,420,421,422,423,",
+            "breakout_modes": {
+                "1x400G": ["etp53"],
+                "2x400G[200G]": ["etp53a", "etp53b"],
+                "4x200G[100G]": ["etp53a", "etp53b", "etp53c", "etp53d"],
+                "8x100G[50G]": ["etp53a", "etp53b", "etp53c", "etp53d", "etp53e", "etp53f", "etp53g", "etp53h"]
+            }
+        },
+        "Ethernet424": {
+            "index": "54,54,54,54,54,54,54,54",
+            "lanes": "424,425,426,427,428,429,430,431,",
+            "breakout_modes": {
+                "1x400G": ["etp54"],
+                "2x400G[200G]": ["etp54a", "etp54b"],
+                "4x200G[100G]": ["etp54a", "etp54b", "etp54c", "etp54d"],
+                "8x100G[50G]": ["etp54a", "etp54b", "etp54c", "etp54d", "etp54e", "etp54f", "etp54g", "etp54h"]
+            }
+        },
+        "Ethernet432": {
+            "index": "55,55,55,55,55,55,55,55",
+            "lanes": "432,433,434,435,436,437,438,439,",
+            "breakout_modes": {
+                "1x400G": ["etp55"],
+                "2x400G[200G]": ["etp55a", "etp55b"],
+                "4x200G[100G]": ["etp55a", "etp55b", "etp55c", "etp55d"],
+                "8x100G[50G]": ["etp55a", "etp55b", "etp55c", "etp55d", "etp55e", "etp55f", "etp55g", "etp55h"]
+            }
+        },
+        "Ethernet440": {
+            "index": "56,56,56,56,56,56,56,56",
+            "lanes": "440,441,442,443,444,445,446,447,",
+            "breakout_modes": {
+                "1x400G": ["etp56"],
+                "2x400G[200G]": ["etp56a", "etp56b"],
+                "4x200G[100G]": ["etp56a", "etp56b", "etp56c", "etp56d"],
+                "8x100G[50G]": ["etp56a", "etp56b", "etp56c", "etp56d", "etp56e", "etp56f", "etp56g", "etp56h"]
+            }
+        },
+        "Ethernet448": {
+            "index": "57,57,57,57,57,57,57,57",
+            "lanes": "448,449,450,451,452,453,454,455,",
+            "breakout_modes": {
+                "1x400G": ["etp57"],
+                "2x400G[200G]": ["etp57a", "etp57b"],
+                "4x200G[100G]": ["etp57a", "etp57b", "etp57c", "etp57d"],
+                "8x100G[50G]": ["etp57a", "etp57b", "etp57c", "etp57d", "etp57e", "etp57f", "etp57g", "etp57h"]
+            }
+        },
+        "Ethernet456": {
+            "index": "58,58,58,58,58,58,58,58",
+            "lanes": "456,457,458,459,460,461,462,463,",
+            "breakout_modes": {
+                "1x400G": ["etp58"],
+                "2x400G[200G]": ["etp58a", "etp58b"],
+                "4x200G[100G]": ["etp58a", "etp58b", "etp58c", "etp58d"],
+                "8x100G[50G]": ["etp58a", "etp58b", "etp58c", "etp58d", "etp58e", "etp58f", "etp58g", "etp58h"]
+            }
+        },
+        "Ethernet464": {
+            "index": "59,59,59,59,59,59,59,59",
+            "lanes": "464,465,466,467,468,469,470,471,",
+            "breakout_modes": {
+                "1x400G": ["etp59"],
+                "2x400G[200G]": ["etp59a", "etp59b"],
+                "4x200G[100G]": ["etp59a", "etp59b", "etp59c", "etp59d"],
+                "8x100G[50G]": ["etp59a", "etp59b", "etp59c", "etp59d", "etp59e", "etp59f", "etp59g", "etp59h"]
+            }
+        },
+        "Ethernet472": {
+            "index": "60,60,60,60,60,60,60,60",
+            "lanes": "472,473,474,475,476,477,478,479,",
+            "breakout_modes": {
+                "1x400G": ["etp60"],
+                "2x400G[200G]": ["etp60a", "etp60b"],
+                "4x200G[100G]": ["etp60a", "etp60b", "etp60c", "etp60d"],
+                "8x100G[50G]": ["etp60a", "etp60b", "etp60c", "etp60d", "etp60e",  "etp60f", "etp60g", "etp60h"]
+            }
+        },
+        "Ethernet480": {
+            "index": "61,61,61,61,61,61,61,61",
+            "lanes": "480,481,482,483,484,485,486,487,",
+            "breakout_modes": {
+                "1x400G": ["etp61"],
+                "2x400G[200G]": ["etp61a", "etp61b"],
+                "4x200G[100G]": ["etp61a", "etp61b", "etp61c", "etp61d"],
+                "8x100G[50G]": ["etp61a", "etp61b", "etp61c",  "etp61d", "etp61e", "etp61f", "etp61g", "etp61h"]
+            }
+        },
+        "Ethernet488": {
+            "index": "62,62,62,62,62,62,62,62",
+            "lanes": "488,489,490,491,492,493,494,495,",
+            "breakout_modes": {
+                "1x400G": ["etp62"],
+                "2x400G[200G]": ["etp62a", "etp62b"],
+                "4x200G[100G]": ["etp62a", "etp62b", "etp62c", "etp62d"],
+                "8x100G[50G]": ["etp62a", "etp62b", "etp62c", "etp62d", "etp62e",  "etp62f", "etp62g", "etp62h"]
+            }
+        },
+        "Ethernet496": {
+            "index": "63,63,63,63,63,63,63,63",
+            "lanes": "496,497,498,499,500,501,502,503,",
+            "breakout_modes": {
+                "1x400G": ["etp63"],
+                "2x400G[200G]": ["etp63a", "etp63b"],
+                "4x200G[100G]": ["etp63a", "etp63b", "etp63c", "etp63d"],
+                "8x100G[50G]": ["etp63a", "etp63b", "etp63c", "etp63d", "etp63e", "etp63f", "etp63g", "etp63h"]
+            }
+        },
+        "Ethernet504": {
+            "index": "64,64,64,64,64,64,64,64",
+            "lanes": "504,505,506,507,508,509,510,511,",
+            "breakout_modes": {
+                "1x400G": ["etp64"],
+                "2x400G[200G]": ["etp64a", "etp64b"],
+                "4x200G[100G]": ["etp64a", "etp64b", "etp64c", "etp64d"],
+                "8x100G[50G]": ["etp64a", "etp64b", "etp64c", "etp64d", "etp64e", "etp64f", "etp64g", "etp64h"]
+            }
+        },
+        "Ethernet512": {
+            "index": "65",
+            "lanes": "512",
+            "breakout_modes": {
+                "1x25G[10G]": ["etp65"]
+            }
+        },
+        "Ethernet520": {
+            "index": "66",
+            "lanes": "520",
+            "breakout_modes": {
+                "1x25G[10G]": ["etp66"]
+            }
+        }
+    }
+}
+
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform_asic b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform_asic
new file mode 100644
index 000000000000..70c074885557
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform_asic
@@ -0,0 +1 @@
+mellanox
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/eeprom.py b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/eeprom.py
new file mode 120000
index 000000000000..b4e2a6a61671
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/eeprom.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/eeprom.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/psuutil.py b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/psuutil.py
new file mode 120000
index 000000000000..9f724238a8d5
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/psuutil.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/psuutil.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfplpmget.py b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfplpmget.py
new file mode 120000
index 000000000000..2e84f435abd9
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfplpmget.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/sfplpmget.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfplpmset.py b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfplpmset.py
new file mode 120000
index 000000000000..6a88bac30467
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfplpmset.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/sfplpmset.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfpreset.py b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfpreset.py
new file mode 120000
index 000000000000..fef2063e3496
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfpreset.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/sfpreset.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfputil.py b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfputil.py
new file mode 120000
index 000000000000..45909b880fc9
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfputil.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/sfputil.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/pmon_daemon_control.json
new file mode 100644
index 000000000000..dd83c2db12c5
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/pmon_daemon_control.json
@@ -0,0 +1,7 @@
+{
+        "skip_ledd": true,
+        "skip_xcvrd": true,
+        "skip_psud": true,
+        "skip_pcied": true,
+        "skip_thermalctld": true
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/system_health_monitoring_config.json
new file mode 120000
index 000000000000..98df66c27ca5
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/system_health_monitoring_config.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/system_health_monitoring_config.json
\ No newline at end of file
diff --git a/platform/mellanox/asic_table.j2 b/platform/mellanox/asic_table.j2
index ede46d57619e..b45d0588a555 100644
--- a/platform/mellanox/asic_table.j2
+++ b/platform/mellanox/asic_table.j2
@@ -50,6 +50,7 @@
         'x86_64-nvidia_sn5400_simx-r0':'MELLANOX-SPECTRUM-4',
         'x86_64-nvidia_sn5600_simx-r0':'MELLANOX-SPECTRUM-4',
         'x86_64-nvidia_sn4280-r0':'MELLANOX-SPECTRUM-3',
+        'x86_64-nvidia_sn5640_simx-r0':'MELLANOX-SPECTRUM-5',
         'vs-platform':'vs'
     }
 %}
@@ -102,5 +103,15 @@
         },
         "OP": "SET"
     }
+{% elif asic_type == 'MELLANOX-SPECTRUM-5' %}
+    {
+        "ASIC_TABLE:MELLANOX-SPECTRUM-5": {
+            "cell_size": "192",
+            "pipeline_latency": "19",
+            "mac_phy_delay": "0.8",
+            "peer_response_time": "3.8"
+        },
+        "OP": "SET"
+    }
 {% endif %}
 ]

From e821264b32fe597f2bf689b96513999e3cc19075 Mon Sep 17 00:00:00 2001
From: wenyiz2021 <91497961+wenyiz2021@users.noreply.github.com>
Date: Wed, 25 Sep 2024 21:28:04 -0700
Subject: [PATCH 043/364] [DNX SAI] bump to 11.2.9.1 (#20285)

* Update DNX SAI to 11.2.9.1
* Update sai-modules.mk

[SAI_BRANCH rel_ocp_sai_11_2] [CSP CS00012352844] Backport SONIC-92490 to rel_ocp_sai_11_2

JIRA# SONIC-92490

Issue Summary: Added missing DoNOtLearn action to knet port trap
---
 platform/broadcom/sai-modules.mk | 2 +-
 platform/broadcom/sai.mk         | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/broadcom/sai-modules.mk b/platform/broadcom/sai-modules.mk
index ffcdacbac659..e8ffcbfcc070 100644
--- a/platform/broadcom/sai-modules.mk
+++ b/platform/broadcom/sai-modules.mk
@@ -10,7 +10,7 @@ $(BRCM_OPENNSL_KERNEL)_MACHINE = broadcom
 SONIC_DPKG_DEBS += $(BRCM_OPENNSL_KERNEL)
 
 # SAI bcm modules for DNX family ASIC
-BRCM_DNX_OPENNSL_KERNEL_VERSION = 11.2.7.1
+BRCM_DNX_OPENNSL_KERNEL_VERSION = 11.2.9.1
 
 BRCM_DNX_OPENNSL_KERNEL = opennsl-modules-dnx_$(BRCM_DNX_OPENNSL_KERNEL_VERSION)_amd64.deb
 $(BRCM_DNX_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules-dnx
diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index ac5675bc50bb..45d8472f75a3 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,5 +1,5 @@
 LIBSAIBCM_XGS_VERSION = 10.1.42.0
-LIBSAIBCM_DNX_VERSION = 11.2.7.1
+LIBSAIBCM_DNX_VERSION = 11.2.9.1
 LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA
 LIBSAIBCM_DNX_BRANCH_NAME = SAI_11.2.0_GA
 LIBSAIBCM_XGS_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_XGS_BRANCH_NAME)/$(LIBSAIBCM_XGS_VERSION)/xgs"

From dbd6f5eac9d1aeb7e5585a123531e0453ef1908f Mon Sep 17 00:00:00 2001
From: DavidZagury <32644413+DavidZagury@users.noreply.github.com>
Date: Thu, 26 Sep 2024 20:14:37 +0300
Subject: [PATCH 044/364] [Mellanox] align SKU name to Mellanox-SN5600-C256X1
 (#20341)

---
 .../buffers.json.j2                                               | 0
 .../buffers_defaults_objects.j2                                   | 0
 .../buffers_defaults_t0.j2                                        | 0
 .../buffers_defaults_t1.j2                                        | 0
 .../buffers_dynamic.json.j2                                       | 0
 .../create_only_config_db_buffers.json                            | 0
 .../media_settings.json                                           | 0
 .../optics_si_settings.json                                       | 0
 .../pg_profile_lookup.ini                                         | 0
 .../pmon_daemon_control.json                                      | 0
 .../port_config.ini                                               | 0
 .../qos.json.j2                                                   | 0
 .../sai.profile                                                   | 0
 .../sai_5600_256x100g.xml                                         | 0
 14 files changed, 0 insertions(+), 0 deletions(-)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/buffers.json.j2 (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/buffers_defaults_objects.j2 (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/buffers_defaults_t0.j2 (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/buffers_defaults_t1.j2 (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/buffers_dynamic.json.j2 (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/create_only_config_db_buffers.json (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/media_settings.json (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/optics_si_settings.json (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/pg_profile_lookup.ini (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/pmon_daemon_control.json (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/port_config.ini (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/qos.json.j2 (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/sai.profile (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/sai_5600_256x100g.xml (100%)

diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers.json.j2
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers.json.j2
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers.json.j2
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_objects.j2
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_objects.j2
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_objects.j2
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_t0.j2
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t0.j2
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_t0.j2
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_t1.j2
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t1.j2
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_t1.j2
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_dynamic.json.j2
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_dynamic.json.j2
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_dynamic.json.j2
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/create_only_config_db_buffers.json
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/create_only_config_db_buffers.json
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/create_only_config_db_buffers.json
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/media_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/media_settings.json
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/media_settings.json
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/media_settings.json
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/optics_si_settings.json
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/optics_si_settings.json
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/optics_si_settings.json
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/pg_profile_lookup.ini
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pg_profile_lookup.ini
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/pg_profile_lookup.ini
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/pmon_daemon_control.json
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pmon_daemon_control.json
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/pmon_daemon_control.json
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/port_config.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/port_config.ini
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/port_config.ini
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/port_config.ini
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/qos.json.j2
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/qos.json.j2
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/qos.json.j2
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/sai.profile
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai.profile
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/sai.profile
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai_5600_256x100g.xml b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/sai_5600_256x100g.xml
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai_5600_256x100g.xml
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/sai_5600_256x100g.xml

From bd2d4c31c21edbf0f51ebba33f94689858052430 Mon Sep 17 00:00:00 2001
From: Yakiv Huryk <62013282+Yakiv-Huryk@users.noreply.github.com>
Date: Thu, 26 Sep 2024 20:15:16 +0300
Subject: [PATCH 045/364] [nvidia-bluefield] add sonic-byo python script
 (#19774)

- Why I did it
To add a possibility to disable SONiC containers and run a user-provided data-plane application.

- How I did it
Added Nvidia platform-specific script sonic-byo.py

- How to verify it
Manual test

---------

Signed-off-by: Yakiv Huryk <yhuryk@nvidia.com>
---
 .../build_templates/sonic_debian_extension.j2 |   2 +
 platform/nvidia-bluefield/byo/sonic-byo.py    | 192 ++++++++++++++++++
 2 files changed, 194 insertions(+)
 create mode 100644 platform/nvidia-bluefield/byo/sonic-byo.py

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 68b57104bbb4..003743cc9b75 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -1122,6 +1122,8 @@ for fw_file_name in ${!FW_FILE_MAP[@]}; do
     sudo ln -s /host/image-$SONIC_IMAGE_VERSION/$PLATFORM_DIR/fw/dpu/${FW_FILE_MAP[$fw_file_name]} $FILESYSTEM_ROOT/etc/bluefield/${FW_FILE_MAP[$fw_file_name]}
 done
 
+sudo install -m 755 platform/nvidia-bluefield/byo/sonic-byo.py $FILESYSTEM_ROOT/usr/bin/sonic-byo.py
+
 SONIC_PLATFORM_PY3_WHEEL_NAME=$(basename {{platform_api_py3_wheel_path}})
 sudo cp {{platform_api_py3_wheel_path}} $FILESYSTEM_ROOT/$SONIC_PLATFORM_PY3_WHEEL_NAME
 sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install $SONIC_PLATFORM_PY3_WHEEL_NAME
diff --git a/platform/nvidia-bluefield/byo/sonic-byo.py b/platform/nvidia-bluefield/byo/sonic-byo.py
new file mode 100644
index 000000000000..a5c933f8e34d
--- /dev/null
+++ b/platform/nvidia-bluefield/byo/sonic-byo.py
@@ -0,0 +1,192 @@
+#!/usr/bin/python
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import argparse
+import docker
+import subprocess
+import os
+import sys
+
+DOCKER_TIMEOUT = 600
+CONTAINER_NAME = 'byo-app-container'
+
+client = docker.DockerClient(timeout=DOCKER_TIMEOUT)
+api_client = docker.APIClient(timeout=DOCKER_TIMEOUT)
+
+
+def get_args():
+    parser = argparse.ArgumentParser(description='Utility for SONiC BYO configuration')
+    mode = parser.add_subparsers(dest='mode')
+    mode.required = True
+
+    mode.add_parser('disable', help='Stop BYO application, restart SONiC services')
+
+    enable_parser = mode.add_parser('enable', help='Stop SONiC services and run BYO application')
+    group = enable_parser.add_mutually_exclusive_group(required=True)
+    group.add_argument('--pull', help='Docker image URL to pull')
+    group.add_argument('--file', help='Docker image gz file to load')
+    group.add_argument('--image', help='Docker image name to run')
+
+    return parser.parse_args()
+
+
+def run_cmd(cmd, verbose=False):
+    if verbose:
+        print(' '.join(cmd))
+    subprocess.run(cmd)
+
+
+def sonic_services_ctl(start, verbose):
+    services = [
+        'featured',
+        'swss',
+        'syncd',
+        'pmon',
+        'snmp',
+        'lldp',
+        'gnmi',
+        'bgp',
+        'eventd'
+    ]
+
+    systemctlops_start = ['unmask', 'enable', 'start']
+    systemctlops_stop = ['stop', 'disable', 'mask']
+
+    # Start featured last
+    if start:
+        services = services[1:] + services[:1]
+
+    print('#', 'Starting' if start else 'Stopping', ', '.join(services))
+
+    ops = systemctlops_start if start else systemctlops_stop
+    for op in ops:
+        run_cmd(["systemctl", op] + services, verbose=verbose)
+
+
+def prepare_sonic(verbose=False):
+    print('# Preparing sonic..')
+
+    sonic_services_ctl(start=False, verbose=verbose)
+
+    print('# Loading mlx5_core driver')
+    run_cmd(["modprobe", "mlx5_core"], verbose=verbose)
+
+
+def restore_sonic(verbose=False):
+    print('# Restoring sonic..')
+    sonic_services_ctl(start=True, verbose=verbose)
+
+
+def pull_image(name):
+    try:
+        print(f'# Pulling image {name}')
+        for line in api_client.pull(name, stream=True, decode=True):
+            status = line.get('status', '')
+            progress = line.get('progress', '')
+            if progress:
+                sys.stdout.write(f'\r{status}: {progress}')
+            else:
+                sys.stdout.write(f'\r{status}')
+            sys.stdout.flush()
+        print()
+        return api_client.inspect_image(name)['Id']
+    except docker.errors.APIError as e:
+        print(f'Error pulling image: {e}')
+        return None
+
+
+def load_gz(file):
+    def chunked_file(f):
+        loaded = 0
+        total = os.path.getsize(file)
+        chunk_size = max(8192, int(total / 1000))
+        with open(file, 'rb') as f:
+            while True:
+                chunk = f.read(chunk_size)
+                if not chunk:
+                    print()
+                    break
+                loaded += len(chunk)
+                progress = loaded / total * 100
+                sys.stdout.write(f'\rLoading.. {progress:.2f}%')
+                sys.stdout.flush()
+                yield chunk
+
+    try:
+        print(f'# Loading image {file}')
+        return client.images.load(chunked_file(file))[0].id
+
+    except Exception as e:
+        print(f'Failed to load: {e}')
+        return None
+
+
+def run_container(image):
+    print(f'# Running image {image}')
+    config = {
+        'image': image,
+        'name': CONTAINER_NAME,
+        'detach': True,
+        'tty': True,
+        'privileged': True,
+        'network_mode': 'host',
+        'auto_remove': True
+    }
+
+    container = client.containers.run(**config) # nosemgrep: python.docker.security.audit.docker-arbitrary-container-run.docker-arbitrary-container-run
+    print(f'Container name: {container.name}')
+
+
+def stop_container():
+    try:
+        container = client.containers.get(CONTAINER_NAME)
+        container.stop()
+        print(f'Container {CONTAINER_NAME} stopped and removed successfully')
+
+    except docker.errors.NotFound:
+        print(f'Container {CONTAINER_NAME} not found')
+    except Exception as e:
+        print(f'Docker error occurred: {str(e)}')
+
+
+def byo_enable(args):
+    prepare_sonic(verbose=True)
+    if args.pull:
+        image_name = pull_image(args.pull)
+    elif args.file:
+        image_name = load_gz(args.file)
+    else:
+        image_name = args.image
+    run_container(image_name)
+
+
+def byo_disable():
+    stop_container()
+    restore_sonic(verbose=True)
+
+
+def main():
+    args = get_args()
+    if args.mode == 'enable':
+        byo_enable(args)
+    if args.mode == 'disable':
+        byo_disable()
+
+
+if __name__ == "__main__":
+    main()

From bfdc62c79bc1ceefe4f3cfb0773f3e6134443df0 Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Fri, 27 Sep 2024 15:50:49 +0800
Subject: [PATCH 046/364] [ci] Fix permission issue on docker-ptf /var/run/sshd
 (#20346)

Why I did it
Fix permission issue on docker-ptf /var/run/sshd.
sonic-net/sonic-mgmt#13545

Work item tracking
Microsoft ADO (number only): 29632874
How I did it
How to verify it
Check docker-ptf in this build. https://dev.azure.com/mssonic/build/_build/results?buildId=653508&view=results
---
 .azure-pipelines/azure-pipelines-image-template.yml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/.azure-pipelines/azure-pipelines-image-template.yml b/.azure-pipelines/azure-pipelines-image-template.yml
index c2e8b8856f50..fde8b76c4b83 100644
--- a/.azure-pipelines/azure-pipelines-image-template.yml
+++ b/.azure-pipelines/azure-pipelines-image-template.yml
@@ -42,6 +42,10 @@ jobs:
         fetchDepth: 0
         condition: and(succeeded(), eq(variables.SKIP_CHECKOUT, ''))
         displayName: 'Checkout code'
+      - script: |
+          set -x
+          sudo setfacl -R -b $(Agent.BuildDirectory)
+        displayName: 'setfacl'
       - script: |
           BRANCH_NAME=$(Build.SourceBranchName)
           [ -n "$SYSTEM_PULLREQUEST_PULLREQUESTID" ] && BRANCH_NAME="$SYSTEM_PULLREQUEST_TARGETBRANCH-$SYSTEM_PULLREQUEST_PULLREQUESTNUMBER"

From 7fcd58fc32d31014879f74332bb14f6e1210519c Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 28 Sep 2024 19:01:09 +0800
Subject: [PATCH 047/364] [submodule] Update submodule sonic-platform-common to
 the latest HEAD automatically (#20371)

#### Why I did it
src/sonic-platform-common
```
* daeed65 - (HEAD -> master, origin/master, origin/HEAD) Added new Platform APIs and modified APIs for supporting reboot on a SmartSwitch (#501) (9 hours ago) [Vasundhara Volam]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 174bbd47f0c5..daeed65100c9 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 174bbd47f0c5a3b8bd181f79b9e700ffa38906f6
+Subproject commit daeed65100c9250a704de223a771fdc7416a90f0

From 4d94ed553fcb13cd0173f74e8b5ef94c6b8b6288 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 28 Sep 2024 19:01:21 +0800
Subject: [PATCH 048/364] [submodule] Update submodule sonic-swss to the latest
 HEAD automatically (#20339)

#### Why I did it
src/sonic-swss
```
* 3c230d2b - (HEAD -> master, origin/master, origin/HEAD) [Orchagent] Add optional create_switch timeout parameter (#3258) (3 days ago) [Pavan Naregundi]
* be3a15f6 - Update CODEOWNERS VNET and ACL Orch (#3296) (3 days ago) [siqbal1986]
* 002cd256 - Close socket descriptor in checkPortIffUp. (#3263) (3 days ago) [mint570]
* 69cf0872 - [orchagent]: Skip installing ACL counter when ACL mirror rule is inactive (#3223) (3 days ago) [fountzou]
* 008f2865 - [crm][dash] Do not probe DASH resources on devices other than the DPU. (#3297) (3 days ago) [Oleksandr Ivantsiv]
* 971dfc1a - Add support for PACKET_ACTION_COPY (#3288) (4 days ago) [Devesh Pathak]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 9a6a86fecb19..3c230d2b51eb 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 9a6a86fecb19efd8876ca7ab6bccdf6b68a13aa8
+Subproject commit 3c230d2b51ebf2ffc7163b2641ffab7ef358bfd4

From d2074849fcf32c7e609424ab22eb7c9201bad446 Mon Sep 17 00:00:00 2001
From: DavidZagury <32644413+DavidZagury@users.noreply.github.com>
Date: Sat, 28 Sep 2024 21:38:03 +0300
Subject: [PATCH 049/364] Make sure logrotate send rsyslog HUP signal only if
 it is already running (#19947)

#### Why I did it
We encounter an error in the log, which came from the call to logrotate while rsyslog is not running.

### How I did it
Config logrotate to check that the HUP signal will only send when rsyslog is running.
---
 files/image_config/logrotate/rsyslog.j2 | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/files/image_config/logrotate/rsyslog.j2 b/files/image_config/logrotate/rsyslog.j2
index 4c40da24d256..b0a7ff7e7002 100644
--- a/files/image_config/logrotate/rsyslog.j2
+++ b/files/image_config/logrotate/rsyslog.j2
@@ -19,7 +19,9 @@
     delaycompress
     sharedscripts
     postrotate
-        /bin/kill -HUP $(cat /var/run/rsyslogd.pid)
+        if [ -f /var/run/rsyslogd.pid ]; then
+            /bin/kill -HUP $(cat /var/run/rsyslogd.pid)
+        fi
     endscript
 }
 
@@ -116,7 +118,9 @@
                 pgrep -x orchagent | xargs /bin/kill -HUP 2>/dev/null || true
             fi
         else
-            /bin/kill -HUP $(cat /var/run/rsyslogd.pid)
+            if [ -f /var/run/rsyslogd.pid ]; then
+                /bin/kill -HUP $(cat /var/run/rsyslogd.pid)
+            fi
         fi
     endscript
 }

From f442943749b9c3ea9f6e1cfc65ac5fb6a072ecab Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 29 Sep 2024 19:01:13 +0800
Subject: [PATCH 050/364] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20344)

#### Why I did it
src/sonic-utilities
```
* 94ec7108 - (HEAD -> master, origin/master, origin/HEAD) Enhance multi-asic support for queuestat (#3554) (29 hours ago) [HP]
* 688c1d1a - [dpu_tty]: Add a DPU TTY console utility (#3535) (3 days ago) [Wenchung Wang]
* b8f306f3 - [Nokia] Add J2C+/H3/H4/H5 to GCU validator (#3495) (3 days ago) [Dylan Godwin]
* 695cc9a7 - Upgrade pyroute2 and improve cli response time (#3513) (4 days ago) [Vivek]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 867fc5400e7c..94ec7108a85a 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 867fc5400e7c53e068bf61e7c4c9e33b54a3fea3
+Subproject commit 94ec7108a85aff9b89f5622ef768530b36450064

From f2ed2c93464162902b4f7e551f2960df7d40e66d Mon Sep 17 00:00:00 2001
From: anamehra <54692434+anamehra@users.noreply.github.com>
Date: Sun, 29 Sep 2024 21:55:24 -0700
Subject: [PATCH 051/364] Update cisco-8000.ini to 202405.0.5 release (#20362)

Signed-off-by: anamehra@cisco.com

Cisco platform 202405.0.5 release

Why I did it
Cisco platform 202405.0.5 release

Work item tracking
Microsoft ADO (number only):
---
 platform/checkout/cisco-8000.ini | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/checkout/cisco-8000.ini b/platform/checkout/cisco-8000.ini
index 0c22272d7883..8723b9435341 100644
--- a/platform/checkout/cisco-8000.ini
+++ b/platform/checkout/cisco-8000.ini
@@ -1,3 +1,3 @@
 [module]
 repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git
-ref=202405.0.4
+ref=202405.0.5

From 8756d3ce249d4f75be97fdf515549705bbb147cb Mon Sep 17 00:00:00 2001
From: Dror Prital <76714716+dprital@users.noreply.github.com>
Date: Mon, 30 Sep 2024 08:05:37 +0300
Subject: [PATCH 052/364] [Mellanox] Integrate HW-MGMT 7.0040.1011 Changes
 (#20148)

- Why I did it
Integrate HW-MGMT 7.0040.1011 Changes

- How I did it
Run make integrate-mlnx-hw-mgmt

- How to verify it
Build an image and run tests from "sonic-mgmt".
---
 platform/mellanox/hw-management.mk      | 2 +-
 platform/mellanox/hw-management/hw-mgmt | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/mellanox/hw-management.mk b/platform/mellanox/hw-management.mk
index cab5e2ecf7df..6255e17cef33 100644
--- a/platform/mellanox/hw-management.mk
+++ b/platform/mellanox/hw-management.mk
@@ -16,7 +16,7 @@
 #
 # Mellanox HW Management
 
-MLNX_HW_MANAGEMENT_VERSION = 7.0040.1008
+MLNX_HW_MANAGEMENT_VERSION = 7.0040.1011
 
 export MLNX_HW_MANAGEMENT_VERSION
 
diff --git a/platform/mellanox/hw-management/hw-mgmt b/platform/mellanox/hw-management/hw-mgmt
index cc3c0e00e8e0..164c9ef66b10 160000
--- a/platform/mellanox/hw-management/hw-mgmt
+++ b/platform/mellanox/hw-management/hw-mgmt
@@ -1 +1 @@
-Subproject commit cc3c0e00e8e03bf2edcffaaf356777292ad8d22b
+Subproject commit 164c9ef66b10eb88bad20225d200c048449033cb

From 23136e5c18f3a3083856d5d475997543c1536850 Mon Sep 17 00:00:00 2001
From: Carmine Scarpitta <carmine.scarpitta.94@gmail.com>
Date: Mon, 30 Sep 2024 18:06:46 +0200
Subject: [PATCH 053/364] Introduce new FRR-SONiC communication channel (FPM
 SONiC module). (#18715)

[FRR FPM] Introduce new FRR-SONiC communication channel (FPM SONiC module).

Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
---
 .../frr/supervisord/supervisord.conf.j2       |    2 +-
 .../vs/docker-sonic-vs/supervisord.conf.j2    |    2 +-
 src/sonic-frr/Makefile                        |    2 +
 .../dplane_fpm_sonic/dplane_fpm_sonic.c       | 2253 +++++++++++++++++
 .../patch/build-dplane-fpm-sonic-module.patch |   52 +
 src/sonic-frr/patch/series                    |    1 +
 6 files changed, 2310 insertions(+), 2 deletions(-)
 create mode 100644 src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c
 create mode 100644 src/sonic-frr/patch/build-dplane-fpm-sonic-module.patch

diff --git a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
index 0b26be8d3c45..15aa2ed55110 100644
--- a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
+++ b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
@@ -30,7 +30,7 @@ stderr_logfile=syslog
 dependent_startup=true
 
 [program:zebra]
-command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_nl -M snmp --asic-offload=notify_on_offload
+command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_sonic -M snmp --asic-offload=notify_on_offload
 priority=4
 autostart=false
 autorestart=false
diff --git a/platform/vs/docker-sonic-vs/supervisord.conf.j2 b/platform/vs/docker-sonic-vs/supervisord.conf.j2
index 5b988a5a5d92..d8d9ce390cb8 100644
--- a/platform/vs/docker-sonic-vs/supervisord.conf.j2
+++ b/platform/vs/docker-sonic-vs/supervisord.conf.j2
@@ -164,7 +164,7 @@ environment=ASAN_OPTIONS="log_path=/var/log/asan/teammgrd-asan.log{{ asan_extra_
 {% endif %}
 
 [program:zebra]
-command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_nl --asic-offload=notify_on_offload
+command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_sonic --asic-offload=notify_on_offload
 priority=13
 autostart=false
 autorestart=false
diff --git a/src/sonic-frr/Makefile b/src/sonic-frr/Makefile
index c7c43ccecc0e..307089d91eae 100644
--- a/src/sonic-frr/Makefile
+++ b/src/sonic-frr/Makefile
@@ -6,6 +6,7 @@ MAIN_TARGET = $(FRR)
 DERIVED_TARGET = $(FRR_PYTHONTOOLS) $(FRR_DBG) $(FRR_SNMP) $(FRR_SNMP_DBG)
 SUFFIX = $(shell date +%Y%m%d\.%H%M%S)
 STG_BRANCH = stg_temp.$(SUFFIX)
+DPLANE_FPM_SONIC_MODULE = dplane_fpm_sonic/dplane_fpm_sonic.c
 
 # DEBEMAIL required by gpb dch
 export DEBEMAIL := sonicproject@googlegroups.com
@@ -20,6 +21,7 @@ endif
 	stg branch --create $(STG_BRANCH) $(FRR_TAG)
 	stg import -s ../patch/series
 	gbp dch --ignore-branch --new-version=$(FRR_VERSION)-sonic-$(FRR_SUBVERSION) --dch-opt="--force-bad-version" --commit --git-author
+	cp ../$(DPLANE_FPM_SONIC_MODULE) zebra/
 
 ifeq ($(CROSS_BUILD_ENVIRON), y)
 	CFLAGS="-I $$CROSS_PERL_CORE_PATH" dpkg-buildpackage -rfakeroot -b -d -us -uc -Ppkg.frr.nortrlib -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
diff --git a/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c b/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c
new file mode 100644
index 000000000000..c87a913acb1c
--- /dev/null
+++ b/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c
@@ -0,0 +1,2253 @@
+/*
+ * Zebra dataplane plugin for Forwarding Plane Manager (FPM) using netlink.
+ *
+ * Copyright (C) 2019 Network Device Education Foundation, Inc. ("NetDEF")
+ *                    Rafael Zalamena
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; see the file COPYING; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h" /* Include this explicitly */
+#endif
+
+#include <arpa/inet.h>
+
+#include <sys/types.h>
+#include <sys/socket.h>
+
+#include <errno.h>
+#include <string.h>
+
+#include "lib/zebra.h"
+#include "lib/json.h"
+#include "lib/libfrr.h"
+#include "lib/frratomic.h"
+#include "lib/command.h"
+#include "lib/memory.h"
+#include "lib/network.h"
+#include "lib/ns.h"
+#include "lib/frr_pthread.h"
+#include "zebra/debug.h"
+#include "zebra/interface.h"
+#include "zebra/zebra_dplane.h"
+#include "zebra/zebra_mpls.h"
+#include "zebra/zebra_router.h"
+#include "zebra/zebra_evpn.h"
+#include "zebra/zebra_evpn_mac.h"
+#include "zebra/zebra_vxlan_private.h"
+#include "zebra/kernel_netlink.h"
+#include "zebra/rt_netlink.h"
+#include "zebra/debug.h"
+#include "zebra/zebra_srv6.h"
+#include "fpm/fpm.h"
+
+#define SOUTHBOUND_DEFAULT_ADDR INADDR_LOOPBACK
+#define SOUTHBOUND_DEFAULT_PORT 2620
+
+/**
+ * FPM header:
+ * {
+ *   version: 1 byte (always 1),
+ *   type: 1 byte (1 for netlink, 2 protobuf),
+ *   len: 2 bytes (network order),
+ * }
+ *
+ * This header is used with any format to tell the users how many bytes to
+ * expect.
+ */
+#define FPM_HEADER_SIZE 4
+
+/**
+ * Custom Netlink TLVs
+*/
+
+/* Custom Netlink message types */
+enum custom_nlmsg_types {
+	RTM_NEWSRV6LOCALSID		= 1000,
+	RTM_DELSRV6LOCALSID		= 1001,
+};
+
+/* Custom Netlink attribute types */
+enum custom_rtattr_encap {
+	FPM_ROUTE_ENCAP_SRV6		= 101,
+};
+
+enum custom_rtattr_srv6_localsid {
+	FPM_SRV6_LOCALSID_UNSPEC			= 0,
+	FPM_SRV6_LOCALSID_SID_VALUE			= 1,
+	FPM_SRV6_LOCALSID_FORMAT			= 2,
+	FPM_SRV6_LOCALSID_ACTION			= 3,
+	FPM_SRV6_LOCALSID_VRFNAME			= 4,
+	FPM_SRV6_LOCALSID_NH6				= 5,
+	FPM_SRV6_LOCALSID_NH4				= 6,
+	FPM_SRV6_LOCALSID_IIF				= 7,
+	FPM_SRV6_LOCALSID_OIF				= 8,
+	FPM_SRV6_LOCALSID_BPF				= 9,
+	FPM_SRV6_LOCALSID_SIDLIST			= 10,
+	FPM_SRV6_LOCALSID_ENCAP_SRC_ADDR	= 11,
+};
+
+enum custom_rtattr_encap_srv6 {
+	FPM_ROUTE_ENCAP_SRV6_ENCAP_UNSPEC		= 0,
+	FPM_ROUTE_ENCAP_SRV6_VPN_SID			= 1,
+	FPM_ROUTE_ENCAP_SRV6_ENCAP_SRC_ADDR		= 2,
+};
+
+enum custom_rtattr_srv6_localsid_format {
+	FPM_SRV6_LOCALSID_FORMAT_UNSPEC			= 0,
+	FPM_SRV6_LOCALSID_FORMAT_BLOCK_LEN		= 1,
+	FPM_SRV6_LOCALSID_FORMAT_NODE_LEN		= 2,
+	FPM_SRV6_LOCALSID_FORMAT_FUNC_LEN		= 3,
+	FPM_SRV6_LOCALSID_FORMAT_ARG_LEN		= 4,
+};
+
+enum custom_rtattr_srv6_localsid_action {
+	FPM_SRV6_LOCALSID_ACTION_UNSPEC				= 0,
+	FPM_SRV6_LOCALSID_ACTION_END				= 1,
+	FPM_SRV6_LOCALSID_ACTION_END_X				= 2,
+	FPM_SRV6_LOCALSID_ACTION_END_T				= 3,
+	FPM_SRV6_LOCALSID_ACTION_END_DX2			= 4,
+	FPM_SRV6_LOCALSID_ACTION_END_DX6			= 5,
+	FPM_SRV6_LOCALSID_ACTION_END_DX4			= 6,
+	FPM_SRV6_LOCALSID_ACTION_END_DT6			= 7,
+	FPM_SRV6_LOCALSID_ACTION_END_DT4			= 8,
+	FPM_SRV6_LOCALSID_ACTION_END_DT46			= 9,
+	FPM_SRV6_LOCALSID_ACTION_B6_ENCAPS			= 10,
+	FPM_SRV6_LOCALSID_ACTION_B6_ENCAPS_RED		= 11,
+	FPM_SRV6_LOCALSID_ACTION_B6_INSERT			= 12,
+	FPM_SRV6_LOCALSID_ACTION_B6_INSERT_RED		= 13,
+	FPM_SRV6_LOCALSID_ACTION_UN					= 14,
+	FPM_SRV6_LOCALSID_ACTION_UA					= 15,
+	FPM_SRV6_LOCALSID_ACTION_UDX2				= 16,
+	FPM_SRV6_LOCALSID_ACTION_UDX6				= 17,
+	FPM_SRV6_LOCALSID_ACTION_UDX4				= 18,
+	FPM_SRV6_LOCALSID_ACTION_UDT6				= 19,
+	FPM_SRV6_LOCALSID_ACTION_UDT4				= 20,
+	FPM_SRV6_LOCALSID_ACTION_UDT46				= 21,
+};
+
+static const char *prov_name = "dplane_fpm_sonic";
+
+struct fpm_nl_ctx {
+	/* data plane connection. */
+	int socket;
+	bool disabled;
+	bool connecting;
+	bool use_nhg;
+	struct sockaddr_storage addr;
+
+	/* data plane buffers. */
+	struct stream *ibuf;
+	struct stream *obuf;
+	pthread_mutex_t obuf_mutex;
+
+	/*
+	 * data plane context queue:
+	 * When a FPM server connection becomes a bottleneck, we must keep the
+	 * data plane contexts until we get a chance to process them.
+	 */
+	struct dplane_ctx_list_head ctxqueue;
+	pthread_mutex_t ctxqueue_mutex;
+
+	/* data plane events. */
+	struct zebra_dplane_provider *prov;
+	struct frr_pthread *fthread;
+	struct thread *t_connect;
+	struct thread *t_read;
+	struct thread *t_write;
+	struct thread *t_event;
+	struct thread *t_nhg;
+	struct thread *t_dequeue;
+
+	/* zebra events. */
+	struct thread *t_lspreset;
+	struct thread *t_lspwalk;
+	struct thread *t_nhgreset;
+	struct thread *t_nhgwalk;
+	struct thread *t_ribreset;
+	struct thread *t_ribwalk;
+	struct thread *t_rmacreset;
+	struct thread *t_rmacwalk;
+
+	/* Statistic counters. */
+	struct {
+		/* Amount of bytes read into ibuf. */
+		_Atomic uint32_t bytes_read;
+		/* Amount of bytes written from obuf. */
+		_Atomic uint32_t bytes_sent;
+		/* Output buffer current usage. */
+		_Atomic uint32_t obuf_bytes;
+		/* Output buffer peak usage. */
+		_Atomic uint32_t obuf_peak;
+
+		/* Amount of connection closes. */
+		_Atomic uint32_t connection_closes;
+		/* Amount of connection errors. */
+		_Atomic uint32_t connection_errors;
+
+		/* Amount of user configurations: FNE_RECONNECT. */
+		_Atomic uint32_t user_configures;
+		/* Amount of user disable requests: FNE_DISABLE. */
+		_Atomic uint32_t user_disables;
+
+		/* Amount of data plane context processed. */
+		_Atomic uint32_t dplane_contexts;
+		/* Amount of data plane contexts enqueued. */
+		_Atomic uint32_t ctxqueue_len;
+		/* Peak amount of data plane contexts enqueued. */
+		_Atomic uint32_t ctxqueue_len_peak;
+
+		/* Amount of buffer full events. */
+		_Atomic uint32_t buffer_full;
+	} counters;
+} *gfnc;
+
+enum fpm_nl_events {
+	/* Ask for FPM to reconnect the external server. */
+	FNE_RECONNECT,
+	/* Disable FPM. */
+	FNE_DISABLE,
+	/* Reset counters. */
+	FNE_RESET_COUNTERS,
+	/* Toggle next hop group feature. */
+	FNE_TOGGLE_NHG,
+	/* Reconnect request by our own code to avoid races. */
+	FNE_INTERNAL_RECONNECT,
+
+	/* LSP walk finished. */
+	FNE_LSP_FINISHED,
+	/* Next hop groups walk finished. */
+	FNE_NHG_FINISHED,
+	/* RIB walk finished. */
+	FNE_RIB_FINISHED,
+	/* RMAC walk finished. */
+	FNE_RMAC_FINISHED,
+};
+
+#define FPM_RECONNECT(fnc)                                                     \
+	thread_add_event((fnc)->fthread->master, fpm_process_event, (fnc),     \
+			 FNE_INTERNAL_RECONNECT, &(fnc)->t_event)
+
+#define WALK_FINISH(fnc, ev)                                                   \
+	thread_add_event((fnc)->fthread->master, fpm_process_event, (fnc),     \
+			 (ev), NULL)
+
+/*
+ * Prototypes.
+ */
+static void fpm_process_event(struct thread *t);
+static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx);
+static void fpm_lsp_send(struct thread *t);
+static void fpm_lsp_reset(struct thread *t);
+static void fpm_nhg_send(struct thread *t);
+static void fpm_nhg_reset(struct thread *t);
+static void fpm_rib_send(struct thread *t);
+static void fpm_rib_reset(struct thread *t);
+static void fpm_rmac_send(struct thread *t);
+static void fpm_rmac_reset(struct thread *t);
+
+/*
+ * CLI.
+ */
+#define FPM_STR "Forwarding Plane Manager configuration\n"
+
+DEFUN(fpm_set_address, fpm_set_address_cmd,
+      "fpm address <A.B.C.D|X:X::X:X> [port (1-65535)]",
+      FPM_STR
+      "FPM remote listening server address\n"
+      "Remote IPv4 FPM server\n"
+      "Remote IPv6 FPM server\n"
+      "FPM remote listening server port\n"
+      "Remote FPM server port\n")
+{
+	struct sockaddr_in *sin;
+	struct sockaddr_in6 *sin6;
+	uint16_t port = 0;
+	uint8_t naddr[INET6_BUFSIZ];
+
+	if (argc == 5)
+		port = strtol(argv[4]->arg, NULL, 10);
+
+	/* Handle IPv4 addresses. */
+	if (inet_pton(AF_INET, argv[2]->arg, naddr) == 1) {
+		sin = (struct sockaddr_in *)&gfnc->addr;
+
+		memset(sin, 0, sizeof(*sin));
+		sin->sin_family = AF_INET;
+		sin->sin_port =
+			port ? htons(port) : htons(SOUTHBOUND_DEFAULT_PORT);
+#ifdef HAVE_STRUCT_SOCKADDR_SA_LEN
+		sin->sin_len = sizeof(*sin);
+#endif /* HAVE_STRUCT_SOCKADDR_SA_LEN */
+		memcpy(&sin->sin_addr, naddr, sizeof(sin->sin_addr));
+
+		goto ask_reconnect;
+	}
+
+	/* Handle IPv6 addresses. */
+	if (inet_pton(AF_INET6, argv[2]->arg, naddr) != 1) {
+		vty_out(vty, "%% Invalid address: %s\n", argv[2]->arg);
+		return CMD_WARNING;
+	}
+
+	sin6 = (struct sockaddr_in6 *)&gfnc->addr;
+	memset(sin6, 0, sizeof(*sin6));
+	sin6->sin6_family = AF_INET6;
+	sin6->sin6_port = port ? htons(port) : htons(SOUTHBOUND_DEFAULT_PORT);
+#ifdef HAVE_STRUCT_SOCKADDR_SA_LEN
+	sin6->sin6_len = sizeof(*sin6);
+#endif /* HAVE_STRUCT_SOCKADDR_SA_LEN */
+	memcpy(&sin6->sin6_addr, naddr, sizeof(sin6->sin6_addr));
+
+ask_reconnect:
+	thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc,
+			 FNE_RECONNECT, &gfnc->t_event);
+	return CMD_SUCCESS;
+}
+
+DEFUN(no_fpm_set_address, no_fpm_set_address_cmd,
+      "no fpm address [<A.B.C.D|X:X::X:X> [port <1-65535>]]",
+      NO_STR
+      FPM_STR
+      "FPM remote listening server address\n"
+      "Remote IPv4 FPM server\n"
+      "Remote IPv6 FPM server\n"
+      "FPM remote listening server port\n"
+      "Remote FPM server port\n")
+{
+	thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc,
+			 FNE_DISABLE, &gfnc->t_event);
+	return CMD_SUCCESS;
+}
+
+DEFUN(fpm_use_nhg, fpm_use_nhg_cmd,
+      "fpm use-next-hop-groups",
+      FPM_STR
+      "Use netlink next hop groups feature.\n")
+{
+	/* Already enabled. */
+	if (gfnc->use_nhg)
+		return CMD_SUCCESS;
+
+	thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc,
+			 FNE_TOGGLE_NHG, &gfnc->t_nhg);
+
+	return CMD_SUCCESS;
+}
+
+DEFUN(no_fpm_use_nhg, no_fpm_use_nhg_cmd,
+      "no fpm use-next-hop-groups",
+      NO_STR
+      FPM_STR
+      "Use netlink next hop groups feature.\n")
+{
+	/* Already disabled. */
+	if (!gfnc->use_nhg)
+		return CMD_SUCCESS;
+
+	thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc,
+			 FNE_TOGGLE_NHG, &gfnc->t_nhg);
+
+	return CMD_SUCCESS;
+}
+
+DEFUN(fpm_reset_counters, fpm_reset_counters_cmd,
+      "clear fpm counters",
+      CLEAR_STR
+      FPM_STR
+      "FPM statistic counters\n")
+{
+	thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc,
+			 FNE_RESET_COUNTERS, &gfnc->t_event);
+	return CMD_SUCCESS;
+}
+
+DEFUN(fpm_show_counters, fpm_show_counters_cmd,
+      "show fpm counters",
+      SHOW_STR
+      FPM_STR
+      "FPM statistic counters\n")
+{
+	vty_out(vty, "%30s\n%30s\n", "FPM counters", "============");
+
+#define SHOW_COUNTER(label, counter) \
+	vty_out(vty, "%28s: %u\n", (label), (counter))
+
+	SHOW_COUNTER("Input bytes", gfnc->counters.bytes_read);
+	SHOW_COUNTER("Output bytes", gfnc->counters.bytes_sent);
+	SHOW_COUNTER("Output buffer current size", gfnc->counters.obuf_bytes);
+	SHOW_COUNTER("Output buffer peak size", gfnc->counters.obuf_peak);
+	SHOW_COUNTER("Connection closes", gfnc->counters.connection_closes);
+	SHOW_COUNTER("Connection errors", gfnc->counters.connection_errors);
+	SHOW_COUNTER("Data plane items processed",
+		     gfnc->counters.dplane_contexts);
+	SHOW_COUNTER("Data plane items enqueued",
+		     gfnc->counters.ctxqueue_len);
+	SHOW_COUNTER("Data plane items queue peak",
+		     gfnc->counters.ctxqueue_len_peak);
+	SHOW_COUNTER("Buffer full hits", gfnc->counters.buffer_full);
+	SHOW_COUNTER("User FPM configurations", gfnc->counters.user_configures);
+	SHOW_COUNTER("User FPM disable requests", gfnc->counters.user_disables);
+
+#undef SHOW_COUNTER
+
+	return CMD_SUCCESS;
+}
+
+DEFUN(fpm_show_counters_json, fpm_show_counters_json_cmd,
+      "show fpm counters json",
+      SHOW_STR
+      FPM_STR
+      "FPM statistic counters\n"
+      JSON_STR)
+{
+	struct json_object *jo;
+
+	jo = json_object_new_object();
+	json_object_int_add(jo, "bytes-read", gfnc->counters.bytes_read);
+	json_object_int_add(jo, "bytes-sent", gfnc->counters.bytes_sent);
+	json_object_int_add(jo, "obuf-bytes", gfnc->counters.obuf_bytes);
+	json_object_int_add(jo, "obuf-bytes-peak", gfnc->counters.obuf_peak);
+	json_object_int_add(jo, "connection-closes",
+			    gfnc->counters.connection_closes);
+	json_object_int_add(jo, "connection-errors",
+			    gfnc->counters.connection_errors);
+	json_object_int_add(jo, "data-plane-contexts",
+			    gfnc->counters.dplane_contexts);
+	json_object_int_add(jo, "data-plane-contexts-queue",
+			    gfnc->counters.ctxqueue_len);
+	json_object_int_add(jo, "data-plane-contexts-queue-peak",
+			    gfnc->counters.ctxqueue_len_peak);
+	json_object_int_add(jo, "buffer-full-hits", gfnc->counters.buffer_full);
+	json_object_int_add(jo, "user-configures",
+			    gfnc->counters.user_configures);
+	json_object_int_add(jo, "user-disables", gfnc->counters.user_disables);
+	vty_json(vty, jo);
+
+	return CMD_SUCCESS;
+}
+
+static int fpm_write_config(struct vty *vty)
+{
+	struct sockaddr_in *sin;
+	struct sockaddr_in6 *sin6;
+	int written = 0;
+
+	if (gfnc->disabled)
+		return written;
+
+	switch (gfnc->addr.ss_family) {
+	case AF_INET:
+		written = 1;
+		sin = (struct sockaddr_in *)&gfnc->addr;
+		vty_out(vty, "fpm address %pI4", &sin->sin_addr);
+		if (sin->sin_port != htons(SOUTHBOUND_DEFAULT_PORT))
+			vty_out(vty, " port %d", ntohs(sin->sin_port));
+
+		vty_out(vty, "\n");
+		break;
+	case AF_INET6:
+		written = 1;
+		sin6 = (struct sockaddr_in6 *)&gfnc->addr;
+		vty_out(vty, "fpm address %pI6", &sin6->sin6_addr);
+		if (sin6->sin6_port != htons(SOUTHBOUND_DEFAULT_PORT))
+			vty_out(vty, " port %d", ntohs(sin6->sin6_port));
+
+		vty_out(vty, "\n");
+		break;
+
+	default:
+		break;
+	}
+
+	if (!gfnc->use_nhg) {
+		vty_out(vty, "no fpm use-next-hop-groups\n");
+		written = 1;
+	}
+
+	return written;
+}
+
+static struct cmd_node fpm_node = {
+	.name = "fpm",
+	.node = FPM_NODE,
+	.prompt = "",
+	.config_write = fpm_write_config,
+};
+
+/*
+ * FPM functions.
+ */
+static void fpm_connect(struct thread *t);
+
+static void fpm_reconnect(struct fpm_nl_ctx *fnc)
+{
+	/* Cancel all zebra threads first. */
+	thread_cancel_async(zrouter.master, &fnc->t_lspreset, NULL);
+	thread_cancel_async(zrouter.master, &fnc->t_lspwalk, NULL);
+	thread_cancel_async(zrouter.master, &fnc->t_nhgreset, NULL);
+	thread_cancel_async(zrouter.master, &fnc->t_nhgwalk, NULL);
+	thread_cancel_async(zrouter.master, &fnc->t_ribreset, NULL);
+	thread_cancel_async(zrouter.master, &fnc->t_ribwalk, NULL);
+	thread_cancel_async(zrouter.master, &fnc->t_rmacreset, NULL);
+	thread_cancel_async(zrouter.master, &fnc->t_rmacwalk, NULL);
+
+	/*
+	 * Grab the lock to empty the streams (data plane might try to
+	 * enqueue updates while we are closing).
+	 */
+	frr_mutex_lock_autounlock(&fnc->obuf_mutex);
+
+	/* Avoid calling close on `-1`. */
+	if (fnc->socket != -1) {
+		close(fnc->socket);
+		fnc->socket = -1;
+	}
+
+	stream_reset(fnc->ibuf);
+	stream_reset(fnc->obuf);
+	THREAD_OFF(fnc->t_read);
+	THREAD_OFF(fnc->t_write);
+
+	/* FPM is disabled, don't attempt to connect. */
+	if (fnc->disabled)
+		return;
+
+	thread_add_timer(fnc->fthread->master, fpm_connect, fnc, 3,
+			 &fnc->t_connect);
+}
+
+static void fpm_read(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	fpm_msg_hdr_t fpm;
+	ssize_t rv;
+	char buf[65535];
+	struct nlmsghdr *hdr;
+	struct zebra_dplane_ctx *ctx;
+	size_t available_bytes;
+	size_t hdr_available_bytes;
+
+	/* Let's ignore the input at the moment. */
+	rv = stream_read_try(fnc->ibuf, fnc->socket,
+			     STREAM_WRITEABLE(fnc->ibuf));
+	if (rv == 0) {
+		atomic_fetch_add_explicit(&fnc->counters.connection_closes, 1,
+					  memory_order_relaxed);
+
+		if (IS_ZEBRA_DEBUG_FPM)
+			zlog_debug("%s: connection closed", __func__);
+
+		FPM_RECONNECT(fnc);
+		return;
+	}
+	if (rv == -1) {
+		atomic_fetch_add_explicit(&fnc->counters.connection_errors, 1,
+					  memory_order_relaxed);
+		zlog_warn("%s: connection failure: %s", __func__,
+			  strerror(errno));
+		FPM_RECONNECT(fnc);
+		return;
+	}
+
+	/* Schedule the next read */
+	thread_add_read(fnc->fthread->master, fpm_read, fnc, fnc->socket,
+			&fnc->t_read);
+
+	/* We've got an interruption. */
+	if (rv == -2)
+		return;
+
+
+	/* Account all bytes read. */
+	atomic_fetch_add_explicit(&fnc->counters.bytes_read, rv,
+				  memory_order_relaxed);
+
+	available_bytes = STREAM_READABLE(fnc->ibuf);
+	while (available_bytes) {
+		if (available_bytes < (ssize_t)FPM_MSG_HDR_LEN) {
+			stream_pulldown(fnc->ibuf);
+			return;
+		}
+
+		fpm.version = stream_getc(fnc->ibuf);
+		fpm.msg_type = stream_getc(fnc->ibuf);
+		fpm.msg_len = stream_getw(fnc->ibuf);
+
+		if (fpm.version != FPM_PROTO_VERSION &&
+		    fpm.msg_type != FPM_MSG_TYPE_NETLINK) {
+			stream_reset(fnc->ibuf);
+			zlog_warn(
+				"%s: Received version/msg_type %u/%u, expected 1/1",
+				__func__, fpm.version, fpm.msg_type);
+
+			FPM_RECONNECT(fnc);
+			return;
+		}
+
+		/*
+		 * If the passed in length doesn't even fill in the header
+		 * something is wrong and reset.
+		 */
+		if (fpm.msg_len < FPM_MSG_HDR_LEN) {
+			zlog_warn(
+				"%s: Received message length: %u that does not even fill the FPM header",
+				__func__, fpm.msg_len);
+			FPM_RECONNECT(fnc);
+			return;
+		}
+
+		/*
+		 * If we have not received the whole payload, reset the stream
+		 * back to the beginning of the header and move it to the
+		 * top.
+		 */
+		if (fpm.msg_len > available_bytes) {
+			stream_rewind_getp(fnc->ibuf, FPM_MSG_HDR_LEN);
+			stream_pulldown(fnc->ibuf);
+			return;
+		}
+
+		available_bytes -= FPM_MSG_HDR_LEN;
+
+		/*
+		 * Place the data from the stream into a buffer
+		 */
+		hdr = (struct nlmsghdr *)buf;
+		stream_get(buf, fnc->ibuf, fpm.msg_len - FPM_MSG_HDR_LEN);
+		hdr_available_bytes = fpm.msg_len - FPM_MSG_HDR_LEN;
+		available_bytes -= hdr_available_bytes;
+
+		/* Sanity check: must be at least header size. */
+		if (hdr->nlmsg_len < sizeof(*hdr)) {
+			zlog_warn(
+				"%s: [seq=%u] invalid message length %u (< %zu)",
+				__func__, hdr->nlmsg_seq, hdr->nlmsg_len,
+				sizeof(*hdr));
+			continue;
+		}
+		if (hdr->nlmsg_len > fpm.msg_len) {
+			zlog_warn(
+				"%s: Received a inner header length of %u that is greater than the fpm total length of %u",
+				__func__, hdr->nlmsg_len, fpm.msg_len);
+			FPM_RECONNECT(fnc);
+		}
+		/* Not enough bytes available. */
+		if (hdr->nlmsg_len > hdr_available_bytes) {
+			zlog_warn(
+				"%s: [seq=%u] invalid message length %u (> %zu)",
+				__func__, hdr->nlmsg_seq, hdr->nlmsg_len,
+				available_bytes);
+			continue;
+		}
+
+		if (!(hdr->nlmsg_flags & NLM_F_REQUEST)) {
+			if (IS_ZEBRA_DEBUG_FPM)
+				zlog_debug(
+					"%s: [seq=%u] not a request, skipping",
+					__func__, hdr->nlmsg_seq);
+
+			/*
+			 * This request is a bust, go to the next one
+			 */
+			continue;
+		}
+
+		switch (hdr->nlmsg_type) {
+		case RTM_NEWROUTE:
+			ctx = dplane_ctx_alloc();
+			dplane_ctx_route_init(ctx, DPLANE_OP_ROUTE_NOTIFY, NULL,
+ 					      NULL);
+			if (netlink_route_change_read_unicast_internal(
+				    hdr, 0, false, ctx) != 1) {
+				dplane_ctx_fini(&ctx);
+				stream_pulldown(fnc->ibuf);
+				/*
+				 * Let's continue to read other messages
+				 * Even if we ignore this one.
+				 */
+			}
+			break;
+		default:
+			if (IS_ZEBRA_DEBUG_FPM)
+				zlog_debug(
+					"%s: Received message type %u which is not currently handled",
+					__func__, hdr->nlmsg_type);
+			break;
+		}
+	}
+
+	stream_reset(fnc->ibuf);
+}
+
+static void fpm_write(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	socklen_t statuslen;
+	ssize_t bwritten;
+	int rv, status;
+	size_t btotal;
+
+	if (fnc->connecting == true) {
+		status = 0;
+		statuslen = sizeof(status);
+
+		rv = getsockopt(fnc->socket, SOL_SOCKET, SO_ERROR, &status,
+				&statuslen);
+		if (rv == -1 || status != 0) {
+			if (rv != -1)
+				zlog_warn("%s: connection failed: %s", __func__,
+					  strerror(status));
+			else
+				zlog_warn("%s: SO_ERROR failed: %s", __func__,
+					  strerror(status));
+
+			atomic_fetch_add_explicit(
+				&fnc->counters.connection_errors, 1,
+				memory_order_relaxed);
+
+			FPM_RECONNECT(fnc);
+			return;
+		}
+
+		fnc->connecting = false;
+
+		/*
+		 * Starting with LSPs walk all FPM objects, marking them
+		 * as unsent and then replaying them.
+		 */
+		thread_add_timer(zrouter.master, fpm_lsp_reset, fnc, 0,
+				 &fnc->t_lspreset);
+
+		/* Permit receiving messages now. */
+		thread_add_read(fnc->fthread->master, fpm_read, fnc,
+				fnc->socket, &fnc->t_read);
+	}
+
+	frr_mutex_lock_autounlock(&fnc->obuf_mutex);
+
+	while (true) {
+		/* Stream is empty: reset pointers and return. */
+		if (STREAM_READABLE(fnc->obuf) == 0) {
+			stream_reset(fnc->obuf);
+			break;
+		}
+
+		/* Try to write all at once. */
+		btotal = stream_get_endp(fnc->obuf) -
+			stream_get_getp(fnc->obuf);
+		bwritten = write(fnc->socket, stream_pnt(fnc->obuf), btotal);
+		if (bwritten == 0) {
+			atomic_fetch_add_explicit(
+				&fnc->counters.connection_closes, 1,
+				memory_order_relaxed);
+
+			if (IS_ZEBRA_DEBUG_FPM)
+				zlog_debug("%s: connection closed", __func__);
+			break;
+		}
+		if (bwritten == -1) {
+			/* Attempt to continue if blocked by a signal. */
+			if (errno == EINTR)
+				continue;
+			/* Receiver is probably slow, lets give it some time. */
+			if (errno == EAGAIN || errno == EWOULDBLOCK)
+				break;
+
+			atomic_fetch_add_explicit(
+				&fnc->counters.connection_errors, 1,
+				memory_order_relaxed);
+			zlog_warn("%s: connection failure: %s", __func__,
+				  strerror(errno));
+
+			FPM_RECONNECT(fnc);
+			return;
+		}
+
+		/* Account all bytes sent. */
+		atomic_fetch_add_explicit(&fnc->counters.bytes_sent, bwritten,
+					  memory_order_relaxed);
+
+		/* Account number of bytes free. */
+		atomic_fetch_sub_explicit(&fnc->counters.obuf_bytes, bwritten,
+					  memory_order_relaxed);
+
+		stream_forward_getp(fnc->obuf, (size_t)bwritten);
+	}
+
+	/* Stream is not empty yet, we must schedule more writes. */
+	if (STREAM_READABLE(fnc->obuf)) {
+		stream_pulldown(fnc->obuf);
+		thread_add_write(fnc->fthread->master, fpm_write, fnc,
+				 fnc->socket, &fnc->t_write);
+		return;
+	}
+}
+
+static void fpm_connect(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	struct sockaddr_in *sin = (struct sockaddr_in *)&fnc->addr;
+	struct sockaddr_in6 *sin6 = (struct sockaddr_in6 *)&fnc->addr;
+	socklen_t slen;
+	int rv, sock;
+	char addrstr[INET6_ADDRSTRLEN];
+
+	sock = socket(fnc->addr.ss_family, SOCK_STREAM, 0);
+	if (sock == -1) {
+		zlog_err("%s: fpm socket failed: %s", __func__,
+			 strerror(errno));
+		thread_add_timer(fnc->fthread->master, fpm_connect, fnc, 3,
+				 &fnc->t_connect);
+		return;
+	}
+
+	set_nonblocking(sock);
+
+	if (fnc->addr.ss_family == AF_INET) {
+		inet_ntop(AF_INET, &sin->sin_addr, addrstr, sizeof(addrstr));
+		slen = sizeof(*sin);
+	} else {
+		inet_ntop(AF_INET6, &sin6->sin6_addr, addrstr, sizeof(addrstr));
+		slen = sizeof(*sin6);
+	}
+
+	if (IS_ZEBRA_DEBUG_FPM)
+		zlog_debug("%s: attempting to connect to %s:%d", __func__,
+			   addrstr, ntohs(sin->sin_port));
+
+	rv = connect(sock, (struct sockaddr *)&fnc->addr, slen);
+	if (rv == -1 && errno != EINPROGRESS) {
+		atomic_fetch_add_explicit(&fnc->counters.connection_errors, 1,
+					  memory_order_relaxed);
+		close(sock);
+		zlog_warn("%s: fpm connection failed: %s", __func__,
+			  strerror(errno));
+		thread_add_timer(fnc->fthread->master, fpm_connect, fnc, 3,
+				 &fnc->t_connect);
+		return;
+	}
+
+	fnc->connecting = (errno == EINPROGRESS);
+	fnc->socket = sock;
+	if (!fnc->connecting)
+		thread_add_read(fnc->fthread->master, fpm_read, fnc, sock,
+				&fnc->t_read);
+	thread_add_write(fnc->fthread->master, fpm_write, fnc, sock,
+			 &fnc->t_write);
+
+	/*
+	 * Starting with LSPs walk all FPM objects, marking them
+	 * as unsent and then replaying them.
+	 *
+	 * If we are not connected, then delay the objects reset/send.
+	 */
+	if (!fnc->connecting)
+		thread_add_timer(zrouter.master, fpm_lsp_reset, fnc, 0,
+				 &fnc->t_lspreset);
+}
+
+static struct zebra_vrf *vrf_lookup_by_table_id(uint32_t table_id)
+{
+ 	struct vrf *vrf;
+ 	struct zebra_vrf *zvrf;
+
+ 	RB_FOREACH (vrf, vrf_id_head, &vrfs_by_id) {
+ 		zvrf = vrf->info;
+ 		if (zvrf == NULL)
+ 			continue;
+ 		/* case vrf with netns : match the netnsid */
+ 		if (vrf_is_backend_netns()) {
+ 			return NULL;
+ 		} else {
+ 			/* VRF is VRF_BACKEND_VRF_LITE */
+ 			if (zvrf->table_id != table_id)
+ 				continue;
+ 			return zvrf;
+ 		}
+ 	}
+
+ 	return NULL;
+ }
+
+/**
+ * Resets the SRv6 routes FPM flags so we send all SRv6 routes again.
+ */
+static void fpm_srv6_route_reset(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	rib_dest_t *dest;
+	struct route_node *rn;
+	struct route_entry *re;
+	struct route_table *rt;
+	struct nexthop *nexthop;
+	rib_tables_iter_t rt_iter;
+
+	rt_iter.state = RIB_TABLES_ITER_S_INIT;
+	while ((rt = rib_tables_iter_next(&rt_iter))) {
+		for (rn = route_top(rt); rn; rn = srcdest_route_next(rn)) {
+			dest = rib_dest_from_rnode(rn);
+			/* Skip bad route entries. */
+			if (dest == NULL)
+				continue;
+
+			re = dest->selected_fib;
+			if (re == NULL)
+				continue;
+
+			nexthop = re->nhe->nhg.nexthop;
+			if (nexthop && nexthop->nh_srv6 &&
+					!sid_zero(&nexthop->nh_srv6->seg6_segs))
+				/* Unset FPM installation flag so it gets installed again. */
+				UNSET_FLAG(dest->flags, RIB_DEST_UPDATE_FPM);
+		}
+	}
+
+	/* Schedule next step: send RIB routes. */
+	thread_add_event(zrouter.master, fpm_rib_send, fnc, 0, &fnc->t_ribwalk);
+}
+
+/*
+ * SRv6 localsid change via netlink interface, using a dataplane context object
+ *
+ * Returns -1 on failure, 0 when the msg doesn't fit entirely in the buffer
+ * otherwise the number of bytes written to buf.
+ */
+static ssize_t netlink_srv6_localsid_msg_encode(int cmd,
+					   struct zebra_dplane_ctx *ctx,
+					   uint8_t *data, size_t datalen,
+					   bool fpm, bool force_nhg)
+{
+	struct zebra_srv6 *srv6 = zebra_srv6_get_default();
+	struct zebra_vrf *zvrf;
+	struct srv6_locator *l, *locator = NULL;
+	struct listnode *node;
+	struct rtattr *nest;
+	const struct seg6local_context *seg6local_ctx;
+	struct nexthop *nexthop;
+	const struct prefix *p;
+	struct nlsock *nl;
+	int bytelen;
+	vrf_id_t vrf_id;
+	uint32_t table_id;
+	uint32_t action;
+
+	struct {
+		struct nlmsghdr n;
+		struct rtmsg r;
+		char buf[];
+	} *req = (void *)data;
+
+	nexthop = dplane_ctx_get_ng(ctx)->nexthop;
+	if (!nexthop || !nexthop->nh_srv6 || nexthop->nh_srv6->seg6local_action == ZEBRA_SEG6_LOCAL_ACTION_UNSPEC)
+		return -1;
+
+	p = dplane_ctx_get_dest(ctx);
+
+	if (datalen < sizeof(*req))
+		return 0;
+
+	nl = kernel_netlink_nlsock_lookup(dplane_ctx_get_ns_sock(ctx));
+
+	memset(req, 0, sizeof(*req));
+
+	if (p->family != AF_INET6) {
+		zlog_err("%s: invalid family: expected %u, got %u", __func__, AF_INET6, p->family);
+		return -1;
+	}
+
+	bytelen = IPV6_MAX_BYTELEN;
+
+	req->n.nlmsg_len = NLMSG_LENGTH(sizeof(struct rtmsg));
+	req->n.nlmsg_flags = NLM_F_CREATE | NLM_F_REQUEST;
+
+	if ((cmd == RTM_NEWSRV6LOCALSID) &&
+		(v6_rr_semantics))
+		req->n.nlmsg_flags |= NLM_F_REPLACE;
+
+	req->n.nlmsg_type = cmd;
+
+	req->n.nlmsg_pid = nl->snl.nl_pid;
+
+	req->r.rtm_family = p->family;
+	req->r.rtm_dst_len = p->prefixlen;
+	req->r.rtm_scope = RT_SCOPE_UNIVERSE;
+
+	if (cmd == RTM_DELSRV6LOCALSID)
+		req->r.rtm_protocol = zebra2proto(dplane_ctx_get_old_type(ctx));
+	else
+		req->r.rtm_protocol = zebra2proto(dplane_ctx_get_type(ctx));
+
+	if (!nl_attr_put(&req->n, datalen, FPM_SRV6_LOCALSID_SID_VALUE, &p->u.prefix, bytelen))
+		return 0;
+
+	/* Table corresponding to this route. */
+	table_id = dplane_ctx_get_table(ctx);
+	if (!fpm) {
+		if (table_id < 256)
+			req->r.rtm_table = table_id;
+		else {
+			req->r.rtm_table = RT_TABLE_UNSPEC;
+			if (!nl_attr_put32(&req->n, datalen, RTA_TABLE, table_id))
+				return 0;
+		}
+	} else {
+		/* Put vrf if_index instead of table id */
+		vrf_id = dplane_ctx_get_vrf(ctx);
+		if (vrf_id < 256)
+			req->r.rtm_table = vrf_id;
+		else {
+			req->r.rtm_table = RT_TABLE_UNSPEC;
+			if (!nl_attr_put32(&req->n, datalen, RTA_TABLE, vrf_id))
+				return 0;
+		}
+	}
+
+	if (IS_ZEBRA_DEBUG_FPM)
+		zlog_debug(
+			"%s: %s %pFX vrf %u(%u)", __func__,
+			(cmd == RTM_NEWSRV6LOCALSID) ? "RTM_NEWSRV6LOCALSID" : "RTM_DELSRV6LOCALSID", p, dplane_ctx_get_vrf(ctx),
+			table_id);
+
+	for (ALL_LIST_ELEMENTS_RO(srv6->locators, node, l)) {
+		if (prefix_match(&l->prefix, p)) {
+			locator = l;
+			break;
+		}
+	}
+
+	if (locator) {
+		nest =
+			nl_attr_nest(&req->n, datalen, 
+						FPM_SRV6_LOCALSID_FORMAT);
+
+		if (locator->block_bits_length)
+			if (!nl_attr_put8(
+					&req->n, datalen, 
+					FPM_SRV6_LOCALSID_FORMAT_BLOCK_LEN,
+					locator->block_bits_length))
+				return -1;
+
+		if (locator->node_bits_length)
+			if (!nl_attr_put8(
+					&req->n, datalen, 
+					FPM_SRV6_LOCALSID_FORMAT_NODE_LEN,
+					locator->node_bits_length))
+				return -1;
+
+		if (locator->function_bits_length)
+			if (!nl_attr_put8(
+					&req->n, datalen, 
+					FPM_SRV6_LOCALSID_FORMAT_FUNC_LEN,
+					locator->function_bits_length))
+				return -1;
+
+		if (locator->argument_bits_length)
+			if (!nl_attr_put8(
+					&req->n, datalen, 
+					FPM_SRV6_LOCALSID_FORMAT_ARG_LEN,
+					locator->argument_bits_length))
+				return -1;
+
+		nl_attr_nest_end(&req->n, nest);
+	}
+
+	if (cmd == RTM_DELSRV6LOCALSID)
+		return NLMSG_ALIGN(req->n.nlmsg_len);
+
+	seg6local_ctx = &nexthop->nh_srv6->seg6local_ctx;
+
+	switch (nexthop->nh_srv6->seg6local_action) {
+	case ZEBRA_SEG6_LOCAL_ACTION_END:
+		action = (locator && CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ? FPM_SRV6_LOCALSID_ACTION_UN : FPM_SRV6_LOCALSID_ACTION_END;
+		if (!nl_attr_put32(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_ACTION,
+					action))
+			return -1;
+		break;
+	case ZEBRA_SEG6_LOCAL_ACTION_END_X:
+		action = (locator && CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ? FPM_SRV6_LOCALSID_ACTION_UA : FPM_SRV6_LOCALSID_ACTION_END_X;
+		if (!nl_attr_put32(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_ACTION,
+					action))
+			return -1;
+		if (!nl_attr_put(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_NH6, &seg6local_ctx->nh6,
+					sizeof(struct in6_addr)))
+			return -1;
+		break;
+	case ZEBRA_SEG6_LOCAL_ACTION_END_T:
+		zvrf = vrf_lookup_by_table_id(seg6local_ctx->table);
+		if (!zvrf)
+			return false;
+
+		if (!nl_attr_put32(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_ACTION,
+					FPM_SRV6_LOCALSID_ACTION_END_T))
+			return -1;
+		if (!nl_attr_put(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_VRFNAME,
+					zvrf->vrf->name,
+					strlen(zvrf->vrf->name) + 1))
+			return -1;
+		break;
+	case ZEBRA_SEG6_LOCAL_ACTION_END_DX6:
+		action = (locator && CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ? FPM_SRV6_LOCALSID_ACTION_UDX6 : FPM_SRV6_LOCALSID_ACTION_END_DX6;
+		if (!nl_attr_put32(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_ACTION,
+					action))
+			return -1;
+		if (!nl_attr_put(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_NH6, &seg6local_ctx->nh6,
+					sizeof(struct in6_addr)))
+			return -1;
+		break;
+	case ZEBRA_SEG6_LOCAL_ACTION_END_DX4:
+		action = (locator && CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ? FPM_SRV6_LOCALSID_ACTION_UDX4 : FPM_SRV6_LOCALSID_ACTION_END_DX4;
+		if (!nl_attr_put32(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_ACTION,
+					action))
+			return -1;
+		if (!nl_attr_put(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_NH4, &seg6local_ctx->nh4,
+					sizeof(struct in_addr)))
+			return -1;
+		break;
+	case ZEBRA_SEG6_LOCAL_ACTION_END_DT6:
+		zvrf = vrf_lookup_by_table_id(seg6local_ctx->table);
+		if (!zvrf)
+			return false;
+
+		action = (locator && CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ? FPM_SRV6_LOCALSID_ACTION_UDT6 : FPM_SRV6_LOCALSID_ACTION_END_DT6;
+		if (!nl_attr_put32(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_ACTION,
+					action))
+			return -1;
+		if (!nl_attr_put(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_VRFNAME,
+					zvrf->vrf->name,
+					strlen(zvrf->vrf->name) + 1))
+			return -1;
+		break;
+	case ZEBRA_SEG6_LOCAL_ACTION_END_DT4:
+		zvrf = vrf_lookup_by_table_id(seg6local_ctx->table);
+		if (!zvrf)
+			return false;
+
+		action = (locator && CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ? FPM_SRV6_LOCALSID_ACTION_UDT4 : FPM_SRV6_LOCALSID_ACTION_END_DT4;
+		if (!nl_attr_put32(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_ACTION,
+					action))
+			return -1;
+		if (!nl_attr_put(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_VRFNAME,
+					zvrf->vrf->name,
+					strlen(zvrf->vrf->name) + 1))
+			return -1;
+		break;
+	case ZEBRA_SEG6_LOCAL_ACTION_END_DT46:
+		zvrf = vrf_lookup_by_table_id(seg6local_ctx->table);
+		if (!zvrf)
+			return false;
+
+		action = (locator && CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ? FPM_SRV6_LOCALSID_ACTION_UDT46 : FPM_SRV6_LOCALSID_ACTION_END_DT46;
+		if (!nl_attr_put32(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_ACTION,
+					action))
+			return -1;
+		if (!nl_attr_put(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_VRFNAME,
+					zvrf->vrf->name,
+					strlen(zvrf->vrf->name) + 1))
+			return -1;
+		break;
+	default:
+		zlog_err("%s: unsupport seg6local behaviour action=%u",
+				__func__,
+				nexthop->nh_srv6->seg6local_action);
+		return -1;
+	}
+
+	return NLMSG_ALIGN(req->n.nlmsg_len);
+}
+
+/*
+ * SRv6 VPN route change via netlink interface, using a dataplane context object
+ *
+ * Returns -1 on failure, 0 when the msg doesn't fit entirely in the buffer
+ * otherwise the number of bytes written to buf.
+ */
+static ssize_t netlink_srv6_vpn_route_msg_encode(int cmd,
+					   struct zebra_dplane_ctx *ctx,
+					   uint8_t *data, size_t datalen,
+					   bool fpm, bool force_nhg)
+{
+	struct rtattr *nest;
+	struct nexthop *nexthop;
+	const struct prefix *p;
+	struct nlsock *nl;
+	int bytelen;
+	vrf_id_t vrf_id;
+	uint32_t table_id;
+	struct interface *ifp;
+	struct in6_addr encap_src_addr = {};
+	struct listnode *node;
+	struct connected *connected;
+
+	struct {
+		struct nlmsghdr n;
+		struct rtmsg r;
+		char buf[];
+	} *req = (void *)data;
+
+	nexthop = dplane_ctx_get_ng(ctx)->nexthop;
+	if (!nexthop || !nexthop->nh_srv6 || sid_zero(&nexthop->nh_srv6->seg6_segs))
+		return -1;
+
+	p = dplane_ctx_get_dest(ctx);
+
+	if (datalen < sizeof(*req))
+		return 0;
+
+	nl = kernel_netlink_nlsock_lookup(dplane_ctx_get_ns_sock(ctx));
+
+	memset(req, 0, sizeof(*req));
+
+	bytelen = (p->family == AF_INET ? IPV4_MAX_BYTELEN : IPV6_MAX_BYTELEN);
+
+	req->n.nlmsg_len = NLMSG_LENGTH(sizeof(struct rtmsg));
+	req->n.nlmsg_flags = NLM_F_CREATE | NLM_F_REQUEST;
+
+	if ((cmd == RTM_NEWROUTE) &&
+	    ((p->family == AF_INET) || v6_rr_semantics))
+		req->n.nlmsg_flags |= NLM_F_REPLACE;
+
+	req->n.nlmsg_type = cmd;
+
+	req->n.nlmsg_pid = nl->snl.nl_pid;
+
+	req->r.rtm_family = p->family;
+	req->r.rtm_dst_len = p->prefixlen;
+	req->r.rtm_scope = RT_SCOPE_UNIVERSE;
+
+	if (cmd == RTM_DELROUTE)
+		req->r.rtm_protocol = zebra2proto(dplane_ctx_get_old_type(ctx));
+	else
+		req->r.rtm_protocol = zebra2proto(dplane_ctx_get_type(ctx));
+
+	req->r.rtm_type = RTN_UNICAST;
+
+	if (!nl_attr_put(&req->n, datalen, RTA_DST, &p->u.prefix, bytelen))
+		return 0;
+
+	/* Table corresponding to this route. */
+	table_id = dplane_ctx_get_table(ctx);
+	if (!fpm) {
+		if (table_id < 256)
+			req->r.rtm_table = table_id;
+		else {
+			req->r.rtm_table = RT_TABLE_UNSPEC;
+			if (!nl_attr_put32(&req->n, datalen, RTA_TABLE, table_id))
+				return 0;
+		}
+	} else {
+		/* Put vrf if_index instead of table id */
+		vrf_id = dplane_ctx_get_vrf(ctx);
+		if (vrf_id < 256)
+			req->r.rtm_table = vrf_id;
+		else {
+			req->r.rtm_table = RT_TABLE_UNSPEC;
+			if (!nl_attr_put32(&req->n, datalen, RTA_TABLE, vrf_id))
+				return 0;
+		}
+	}
+
+	if (IS_ZEBRA_DEBUG_FPM)
+		zlog_debug(
+			"%s: %s %pFX vrf %u(%u)", __func__,
+			nl_msg_type_to_str(cmd), p, dplane_ctx_get_vrf(ctx),
+			table_id);
+
+	if (!nl_attr_put16(&req->n, datalen, RTA_ENCAP_TYPE,
+				FPM_ROUTE_ENCAP_SRV6))
+		return false;
+	nest = nl_attr_nest(&req->n, datalen, RTA_ENCAP);
+	if (!nest)
+		return false;
+
+	/*
+	 * by default, we use the loopback address as encap source address,
+	 * if it is valid
+	 */
+	ifp = if_lookup_by_name("lo", VRF_DEFAULT);
+	if (ifp) {
+		FOR_ALL_INTERFACES_ADDRESSES(ifp, connected, node) {
+			if (connected->address->family == AF_INET6 &&
+					!IN6_IS_ADDR_LOOPBACK(&connected->address->u.prefix6) &&
+					!IN6_IS_ADDR_LINKLOCAL(&connected->address->u.prefix6)) {
+				encap_src_addr = connected->address->u.prefix6;
+				break;
+			}
+		}
+	}
+
+	if (!nl_attr_put(
+			&req->n, datalen, FPM_ROUTE_ENCAP_SRV6_ENCAP_SRC_ADDR,
+			&encap_src_addr, IPV6_MAX_BYTELEN))
+		return false;
+	if (!nl_attr_put(&req->n, datalen, FPM_ROUTE_ENCAP_SRV6_VPN_SID,
+				&nexthop->nh_srv6->seg6_segs,
+				IPV6_MAX_BYTELEN))
+		return false;
+	nl_attr_nest_end(&req->n, nest);
+
+	return NLMSG_ALIGN(req->n.nlmsg_len);
+}
+
+/*
+ * SRv6 change via netlink interface, using a dataplane context object
+ *
+ * Returns -1 on failure, 0 when the msg doesn't fit entirely in the buffer
+ * otherwise the number of bytes written to buf.
+ */
+static ssize_t netlink_srv6_msg_encode(int cmd,
+					   struct zebra_dplane_ctx *ctx,
+					   uint8_t *data, size_t datalen,
+					   bool fpm, bool force_nhg)
+{
+	struct nexthop *nexthop = NULL;
+
+	struct {
+		struct nlmsghdr n;
+		struct rtmsg r;
+		char buf[];
+	} *req = (void *)data;
+
+	nexthop = dplane_ctx_get_ng(ctx)->nexthop;
+	if (!nexthop || !nexthop->nh_srv6)
+		return -1;
+
+	if (nexthop->nh_srv6->seg6local_action !=
+ 		    ZEBRA_SEG6_LOCAL_ACTION_UNSPEC) {
+		if (cmd == RTM_NEWROUTE)
+			cmd = RTM_NEWSRV6LOCALSID;
+		else if (cmd == RTM_DELROUTE)
+			cmd = RTM_DELSRV6LOCALSID;
+
+		if (!netlink_srv6_localsid_msg_encode(
+				cmd, ctx, data, datalen, fpm, force_nhg))
+			return 0;
+	} else if (!sid_zero(&nexthop->nh_srv6->seg6_segs)) {
+		if (!netlink_srv6_vpn_route_msg_encode(
+				cmd, ctx, data, datalen, fpm, force_nhg))
+			return 0;
+	} else {
+		zlog_err(
+			"%s: invalid srv6 nexthop", __func__);
+		return -1;
+	}
+
+	return NLMSG_ALIGN(req->n.nlmsg_len);
+}
+
+/**
+ * Encode data plane operation context into netlink and enqueue it in the FPM
+ * output buffer.
+ *
+ * @param fnc the netlink FPM context.
+ * @param ctx the data plane operation context data.
+ * @return 0 on success or -1 on not enough space.
+ */
+static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx)
+{
+	uint8_t nl_buf[NL_PKT_BUF_SIZE];
+	size_t nl_buf_len;
+	ssize_t rv;
+	uint64_t obytes, obytes_peak;
+	enum dplane_op_e op = dplane_ctx_get_op(ctx);
+	struct nexthop *nexthop;
+
+	/*
+	 * If we were configured to not use next hop groups, then quit as soon
+	 * as possible.
+	 */
+	if ((!fnc->use_nhg)
+	    && (op == DPLANE_OP_NH_DELETE || op == DPLANE_OP_NH_INSTALL
+		|| op == DPLANE_OP_NH_UPDATE))
+		return 0;
+ 
+	/*
+	 * Ignore route from default table, because when mgmt port goes down,
+	 * zebra will remove the default route and causing ASIC to blackhole IO.
+	 */
+	if (dplane_ctx_get_table(ctx) == RT_TABLE_DEFAULT) {
+		zlog_debug("%s: discard default table route", __func__);
+		return 0;
+	}
+
+	nl_buf_len = 0;
+
+	frr_mutex_lock_autounlock(&fnc->obuf_mutex);
+
+	switch (op) {
+	case DPLANE_OP_ROUTE_UPDATE:
+	case DPLANE_OP_ROUTE_DELETE:
+		nexthop = dplane_ctx_get_ng(ctx)->nexthop;
+		if (nexthop && nexthop->nh_srv6) {
+			rv = netlink_srv6_msg_encode(RTM_DELROUTE, ctx,
+								nl_buf, sizeof(nl_buf),
+								true, fnc->use_nhg);
+			if (rv <= 0) {
+				zlog_err(
+					"%s: netlink_srv6_msg_encode failed",
+					__func__);
+				return 0;
+			}
+		} else {
+			rv = netlink_route_multipath_msg_encode(RTM_DELROUTE, ctx,
+								nl_buf, sizeof(nl_buf),
+								true, fnc->use_nhg);
+			if (rv <= 0) {
+				zlog_err(
+					"%s: netlink_route_multipath_msg_encode failed",
+					__func__);
+				return 0;
+			}
+		}
+
+		nl_buf_len = (size_t)rv;
+
+		/* UPDATE operations need a INSTALL, otherwise just quit. */
+		if (op == DPLANE_OP_ROUTE_DELETE)
+			break;
+
+		/* FALL THROUGH */
+	case DPLANE_OP_ROUTE_INSTALL:
+		nexthop = dplane_ctx_get_ng(ctx)->nexthop;
+		if (nexthop && nexthop->nh_srv6) {
+			rv = netlink_srv6_msg_encode(
+				RTM_NEWROUTE, ctx, &nl_buf[nl_buf_len],
+				sizeof(nl_buf) - nl_buf_len, true, fnc->use_nhg);
+			if (rv <= 0) {
+				zlog_err(
+					"%s: netlink_srv6_msg_encode failed",
+					__func__);
+				return 0;
+			}
+		} else {
+			rv = netlink_route_multipath_msg_encode(
+				RTM_NEWROUTE, ctx, &nl_buf[nl_buf_len],
+				sizeof(nl_buf) - nl_buf_len, true, fnc->use_nhg);
+			if (rv <= 0) {
+				zlog_err(
+					"%s: netlink_route_multipath_msg_encode failed",
+					__func__);
+				return 0;
+			}
+		}
+
+		nl_buf_len += (size_t)rv;
+
+		break;
+
+	case DPLANE_OP_MAC_INSTALL:
+	case DPLANE_OP_MAC_DELETE:
+		rv = netlink_macfdb_update_ctx(ctx, nl_buf, sizeof(nl_buf));
+		if (rv <= 0) {
+			zlog_err("%s: netlink_macfdb_update_ctx failed",
+				 __func__);
+			return 0;
+		}
+
+		nl_buf_len = (size_t)rv;
+		break;
+
+	case DPLANE_OP_NH_DELETE:
+		rv = netlink_nexthop_msg_encode(RTM_DELNEXTHOP, ctx, nl_buf,
+						sizeof(nl_buf), true);
+		if (rv <= 0) {
+			zlog_err("%s: netlink_nexthop_msg_encode failed",
+				 __func__);
+			return 0;
+		}
+
+		nl_buf_len = (size_t)rv;
+		break;
+	case DPLANE_OP_NH_INSTALL:
+	case DPLANE_OP_NH_UPDATE:
+		rv = netlink_nexthop_msg_encode(RTM_NEWNEXTHOP, ctx, nl_buf,
+						sizeof(nl_buf), true);
+		if (rv <= 0) {
+			zlog_err("%s: netlink_nexthop_msg_encode failed",
+				 __func__);
+			return 0;
+		}
+
+		nl_buf_len = (size_t)rv;
+		break;
+
+	case DPLANE_OP_LSP_INSTALL:
+	case DPLANE_OP_LSP_UPDATE:
+	case DPLANE_OP_LSP_DELETE:
+		rv = netlink_lsp_msg_encoder(ctx, nl_buf, sizeof(nl_buf));
+		if (rv <= 0) {
+			zlog_err("%s: netlink_lsp_msg_encoder failed",
+				 __func__);
+			return 0;
+		}
+
+		nl_buf_len += (size_t)rv;
+		break;
+
+	case DPLANE_OP_ADDR_INSTALL:
+	case DPLANE_OP_ADDR_UNINSTALL:
+		if (strmatch(dplane_ctx_get_ifname(ctx), "lo"))
+			thread_add_timer(fnc->fthread->master, fpm_srv6_route_reset,
+				 fnc, 0, &fnc->t_ribreset);
+		break;
+
+	/* Un-handled by FPM at this time. */
+	case DPLANE_OP_PW_INSTALL:
+	case DPLANE_OP_PW_UNINSTALL:
+	case DPLANE_OP_NEIGH_INSTALL:
+	case DPLANE_OP_NEIGH_UPDATE:
+	case DPLANE_OP_NEIGH_DELETE:
+	case DPLANE_OP_VTEP_ADD:
+	case DPLANE_OP_VTEP_DELETE:
+	case DPLANE_OP_SYS_ROUTE_ADD:
+	case DPLANE_OP_SYS_ROUTE_DELETE:
+	case DPLANE_OP_ROUTE_NOTIFY:
+	case DPLANE_OP_LSP_NOTIFY:
+	case DPLANE_OP_RULE_ADD:
+	case DPLANE_OP_RULE_DELETE:
+	case DPLANE_OP_RULE_UPDATE:
+	case DPLANE_OP_NEIGH_DISCOVER:
+	case DPLANE_OP_BR_PORT_UPDATE:
+	case DPLANE_OP_IPTABLE_ADD:
+	case DPLANE_OP_IPTABLE_DELETE:
+	case DPLANE_OP_IPSET_ADD:
+	case DPLANE_OP_IPSET_DELETE:
+	case DPLANE_OP_IPSET_ENTRY_ADD:
+	case DPLANE_OP_IPSET_ENTRY_DELETE:
+	case DPLANE_OP_NEIGH_IP_INSTALL:
+	case DPLANE_OP_NEIGH_IP_DELETE:
+	case DPLANE_OP_NEIGH_TABLE_UPDATE:
+	case DPLANE_OP_GRE_SET:
+	case DPLANE_OP_INTF_ADDR_ADD:
+	case DPLANE_OP_INTF_ADDR_DEL:
+	case DPLANE_OP_INTF_NETCONFIG:
+	case DPLANE_OP_INTF_INSTALL:
+	case DPLANE_OP_INTF_UPDATE:
+	case DPLANE_OP_INTF_DELETE:
+	case DPLANE_OP_TC_QDISC_INSTALL:
+	case DPLANE_OP_TC_QDISC_UNINSTALL:
+	case DPLANE_OP_TC_CLASS_ADD:
+	case DPLANE_OP_TC_CLASS_DELETE:
+	case DPLANE_OP_TC_CLASS_UPDATE:
+	case DPLANE_OP_TC_FILTER_ADD:
+	case DPLANE_OP_TC_FILTER_DELETE:
+	case DPLANE_OP_TC_FILTER_UPDATE:
+	case DPLANE_OP_NONE:
+	case DPLANE_OP_STARTUP_STAGE:
+		break;
+
+	}
+
+	/* Skip empty enqueues. */
+	if (nl_buf_len == 0)
+		return 0;
+
+	/* We must know if someday a message goes beyond 65KiB. */
+	assert((nl_buf_len + FPM_HEADER_SIZE) <= UINT16_MAX);
+
+	/* Check if we have enough buffer space. */
+	if (STREAM_WRITEABLE(fnc->obuf) < (nl_buf_len + FPM_HEADER_SIZE)) {
+		atomic_fetch_add_explicit(&fnc->counters.buffer_full, 1,
+					  memory_order_relaxed);
+
+		if (IS_ZEBRA_DEBUG_FPM)
+			zlog_debug(
+				"%s: buffer full: wants to write %zu but has %zu",
+				__func__, nl_buf_len + FPM_HEADER_SIZE,
+				STREAM_WRITEABLE(fnc->obuf));
+
+		return -1;
+	}
+
+	/*
+	 * Fill in the FPM header information.
+	 *
+	 * See FPM_HEADER_SIZE definition for more information.
+	 */
+	stream_putc(fnc->obuf, 1);
+	stream_putc(fnc->obuf, 1);
+	stream_putw(fnc->obuf, nl_buf_len + FPM_HEADER_SIZE);
+
+	/* Write current data. */
+	stream_write(fnc->obuf, nl_buf, (size_t)nl_buf_len);
+
+	/* Account number of bytes waiting to be written. */
+	atomic_fetch_add_explicit(&fnc->counters.obuf_bytes,
+				  nl_buf_len + FPM_HEADER_SIZE,
+				  memory_order_relaxed);
+	obytes = atomic_load_explicit(&fnc->counters.obuf_bytes,
+				      memory_order_relaxed);
+	obytes_peak = atomic_load_explicit(&fnc->counters.obuf_peak,
+					   memory_order_relaxed);
+	if (obytes_peak < obytes)
+		atomic_store_explicit(&fnc->counters.obuf_peak, obytes,
+				      memory_order_relaxed);
+
+	/* Tell the thread to start writing. */
+	thread_add_write(fnc->fthread->master, fpm_write, fnc, fnc->socket,
+			 &fnc->t_write);
+
+	return 0;
+}
+
+/*
+ * LSP walk/send functions
+ */
+struct fpm_lsp_arg {
+	struct zebra_dplane_ctx *ctx;
+	struct fpm_nl_ctx *fnc;
+	bool complete;
+};
+
+static int fpm_lsp_send_cb(struct hash_bucket *bucket, void *arg)
+{
+	struct zebra_lsp *lsp = bucket->data;
+	struct fpm_lsp_arg *fla = arg;
+
+	/* Skip entries which have already been sent */
+	if (CHECK_FLAG(lsp->flags, LSP_FLAG_FPM))
+		return HASHWALK_CONTINUE;
+
+	dplane_ctx_reset(fla->ctx);
+	dplane_ctx_lsp_init(fla->ctx, DPLANE_OP_LSP_INSTALL, lsp);
+
+	if (fpm_nl_enqueue(fla->fnc, fla->ctx) == -1) {
+		fla->complete = false;
+		return HASHWALK_ABORT;
+	}
+
+	/* Mark entry as sent */
+	SET_FLAG(lsp->flags, LSP_FLAG_FPM);
+	return HASHWALK_CONTINUE;
+}
+
+static void fpm_lsp_send(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	struct zebra_vrf *zvrf = vrf_info_lookup(VRF_DEFAULT);
+	struct fpm_lsp_arg fla;
+
+	fla.fnc = fnc;
+	fla.ctx = dplane_ctx_alloc();
+	fla.complete = true;
+
+	hash_walk(zvrf->lsp_table, fpm_lsp_send_cb, &fla);
+
+	dplane_ctx_fini(&fla.ctx);
+
+	if (fla.complete) {
+		WALK_FINISH(fnc, FNE_LSP_FINISHED);
+
+		/* Now move onto routes */
+		thread_add_timer(zrouter.master, fpm_nhg_reset, fnc, 0,
+				 &fnc->t_nhgreset);
+	} else {
+		/* Didn't finish - reschedule LSP walk */
+		thread_add_timer(zrouter.master, fpm_lsp_send, fnc, 0,
+				 &fnc->t_lspwalk);
+	}
+}
+
+/*
+ * Next hop walk/send functions.
+ */
+struct fpm_nhg_arg {
+	struct zebra_dplane_ctx *ctx;
+	struct fpm_nl_ctx *fnc;
+	bool complete;
+};
+
+static int fpm_nhg_send_cb(struct hash_bucket *bucket, void *arg)
+{
+	struct nhg_hash_entry *nhe = bucket->data;
+	struct fpm_nhg_arg *fna = arg;
+
+	/* This entry was already sent, skip it. */
+	if (CHECK_FLAG(nhe->flags, NEXTHOP_GROUP_FPM))
+		return HASHWALK_CONTINUE;
+
+	/* Reset ctx to reuse allocated memory, take a snapshot and send it. */
+	dplane_ctx_reset(fna->ctx);
+	dplane_ctx_nexthop_init(fna->ctx, DPLANE_OP_NH_INSTALL, nhe);
+	if (fpm_nl_enqueue(fna->fnc, fna->ctx) == -1) {
+		/* Our buffers are full, lets give it some cycles. */
+		fna->complete = false;
+		return HASHWALK_ABORT;
+	}
+
+	/* Mark group as sent, so it doesn't get sent again. */
+	SET_FLAG(nhe->flags, NEXTHOP_GROUP_FPM);
+
+	return HASHWALK_CONTINUE;
+}
+
+static void fpm_nhg_send(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	struct fpm_nhg_arg fna;
+
+	fna.fnc = fnc;
+	fna.ctx = dplane_ctx_alloc();
+	fna.complete = true;
+
+	/* Send next hops. */
+	if (fnc->use_nhg)
+		hash_walk(zrouter.nhgs_id, fpm_nhg_send_cb, &fna);
+
+	/* `free()` allocated memory. */
+	dplane_ctx_fini(&fna.ctx);
+
+	/* We are done sending next hops, lets install the routes now. */
+	if (fna.complete) {
+		WALK_FINISH(fnc, FNE_NHG_FINISHED);
+		thread_add_timer(zrouter.master, fpm_rib_reset, fnc, 0,
+				 &fnc->t_ribreset);
+	} else /* Otherwise reschedule next hop group again. */
+		thread_add_timer(zrouter.master, fpm_nhg_send, fnc, 0,
+				 &fnc->t_nhgwalk);
+}
+
+/**
+ * Send all RIB installed routes to the connected data plane.
+ */
+static void fpm_rib_send(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	rib_dest_t *dest;
+	struct route_node *rn;
+	struct route_table *rt;
+	struct zebra_dplane_ctx *ctx;
+	rib_tables_iter_t rt_iter;
+
+	/* Allocate temporary context for all transactions. */
+	ctx = dplane_ctx_alloc();
+
+	rt_iter.state = RIB_TABLES_ITER_S_INIT;
+	while ((rt = rib_tables_iter_next(&rt_iter))) {
+		for (rn = route_top(rt); rn; rn = srcdest_route_next(rn)) {
+			dest = rib_dest_from_rnode(rn);
+			/* Skip bad route entries. */
+			if (dest == NULL || dest->selected_fib == NULL)
+				continue;
+
+			/* Check for already sent routes. */
+			if (CHECK_FLAG(dest->flags, RIB_DEST_UPDATE_FPM))
+				continue;
+
+			/* Enqueue route install. */
+			dplane_ctx_reset(ctx);
+			dplane_ctx_route_init(ctx, DPLANE_OP_ROUTE_INSTALL, rn,
+					      dest->selected_fib);
+			if (fpm_nl_enqueue(fnc, ctx) == -1) {
+				/* Free the temporary allocated context. */
+				dplane_ctx_fini(&ctx);
+
+				thread_add_timer(zrouter.master, fpm_rib_send,
+						 fnc, 1, &fnc->t_ribwalk);
+				return;
+			}
+
+			/* Mark as sent. */
+			SET_FLAG(dest->flags, RIB_DEST_UPDATE_FPM);
+		}
+	}
+
+	/* Free the temporary allocated context. */
+	dplane_ctx_fini(&ctx);
+
+	/* All RIB routes sent! */
+	WALK_FINISH(fnc, FNE_RIB_FINISHED);
+
+	/* Schedule next event: RMAC reset. */
+	thread_add_event(zrouter.master, fpm_rmac_reset, fnc, 0,
+			 &fnc->t_rmacreset);
+}
+
+/*
+ * The next three functions will handle RMAC enqueue.
+ */
+struct fpm_rmac_arg {
+	struct zebra_dplane_ctx *ctx;
+	struct fpm_nl_ctx *fnc;
+	struct zebra_l3vni *zl3vni;
+	bool complete;
+};
+
+static void fpm_enqueue_rmac_table(struct hash_bucket *bucket, void *arg)
+{
+	struct fpm_rmac_arg *fra = arg;
+	struct zebra_mac *zrmac = bucket->data;
+	struct zebra_if *zif = fra->zl3vni->vxlan_if->info;
+	const struct zebra_l2info_vxlan *vxl = &zif->l2info.vxl;
+	struct zebra_if *br_zif;
+	vlanid_t vid;
+	bool sticky;
+
+	/* Entry already sent. */
+	if (CHECK_FLAG(zrmac->flags, ZEBRA_MAC_FPM_SENT) || !fra->complete)
+		return;
+
+	sticky = !!CHECK_FLAG(zrmac->flags,
+			      (ZEBRA_MAC_STICKY | ZEBRA_MAC_REMOTE_DEF_GW));
+	br_zif = (struct zebra_if *)(zif->brslave_info.br_if->info);
+	vid = IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(br_zif) ? vxl->access_vlan : 0;
+
+	dplane_ctx_reset(fra->ctx);
+	dplane_ctx_set_op(fra->ctx, DPLANE_OP_MAC_INSTALL);
+	dplane_mac_init(fra->ctx, fra->zl3vni->vxlan_if,
+			zif->brslave_info.br_if, vid,
+			&zrmac->macaddr, zrmac->fwd_info.r_vtep_ip, sticky,
+			0 /*nhg*/, 0 /*update_flags*/);
+	if (fpm_nl_enqueue(fra->fnc, fra->ctx) == -1) {
+		thread_add_timer(zrouter.master, fpm_rmac_send,
+				 fra->fnc, 1, &fra->fnc->t_rmacwalk);
+		fra->complete = false;
+	}
+}
+
+static void fpm_enqueue_l3vni_table(struct hash_bucket *bucket, void *arg)
+{
+	struct fpm_rmac_arg *fra = arg;
+	struct zebra_l3vni *zl3vni = bucket->data;
+
+	fra->zl3vni = zl3vni;
+	hash_iterate(zl3vni->rmac_table, fpm_enqueue_rmac_table, zl3vni);
+}
+
+static void fpm_rmac_send(struct thread *t)
+{
+	struct fpm_rmac_arg fra;
+
+	fra.fnc = THREAD_ARG(t);
+	fra.ctx = dplane_ctx_alloc();
+	fra.complete = true;
+	hash_iterate(zrouter.l3vni_table, fpm_enqueue_l3vni_table, &fra);
+	dplane_ctx_fini(&fra.ctx);
+
+	/* RMAC walk completed. */
+	if (fra.complete)
+		WALK_FINISH(fra.fnc, FNE_RMAC_FINISHED);
+}
+
+/*
+ * Resets the next hop FPM flags so we send all next hops again.
+ */
+static void fpm_nhg_reset_cb(struct hash_bucket *bucket, void *arg)
+{
+	struct nhg_hash_entry *nhe = bucket->data;
+
+	/* Unset FPM installation flag so it gets installed again. */
+	UNSET_FLAG(nhe->flags, NEXTHOP_GROUP_FPM);
+}
+
+static void fpm_nhg_reset(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+
+	hash_iterate(zrouter.nhgs_id, fpm_nhg_reset_cb, NULL);
+
+	/* Schedule next step: send next hop groups. */
+	thread_add_event(zrouter.master, fpm_nhg_send, fnc, 0, &fnc->t_nhgwalk);
+}
+
+/*
+ * Resets the LSP FPM flag so we send all LSPs again.
+ */
+static void fpm_lsp_reset_cb(struct hash_bucket *bucket, void *arg)
+{
+	struct zebra_lsp *lsp = bucket->data;
+
+	UNSET_FLAG(lsp->flags, LSP_FLAG_FPM);
+}
+
+static void fpm_lsp_reset(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	struct zebra_vrf *zvrf = vrf_info_lookup(VRF_DEFAULT);
+
+	hash_iterate(zvrf->lsp_table, fpm_lsp_reset_cb, NULL);
+
+	/* Schedule next step: send LSPs */
+	thread_add_event(zrouter.master, fpm_lsp_send, fnc, 0, &fnc->t_lspwalk);
+}
+
+/**
+ * Resets the RIB FPM flags so we send all routes again.
+ */
+static void fpm_rib_reset(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	rib_dest_t *dest;
+	struct route_node *rn;
+	struct route_table *rt;
+	rib_tables_iter_t rt_iter;
+
+	rt_iter.state = RIB_TABLES_ITER_S_INIT;
+	while ((rt = rib_tables_iter_next(&rt_iter))) {
+		for (rn = route_top(rt); rn; rn = srcdest_route_next(rn)) {
+			dest = rib_dest_from_rnode(rn);
+			/* Skip bad route entries. */
+			if (dest == NULL)
+				continue;
+
+			UNSET_FLAG(dest->flags, RIB_DEST_UPDATE_FPM);
+		}
+	}
+
+	/* Schedule next step: send RIB routes. */
+	thread_add_event(zrouter.master, fpm_rib_send, fnc, 0, &fnc->t_ribwalk);
+}
+
+/*
+ * The next three function will handle RMAC table reset.
+ */
+static void fpm_unset_rmac_table(struct hash_bucket *bucket, void *arg)
+{
+	struct zebra_mac *zrmac = bucket->data;
+
+	UNSET_FLAG(zrmac->flags, ZEBRA_MAC_FPM_SENT);
+}
+
+static void fpm_unset_l3vni_table(struct hash_bucket *bucket, void *arg)
+{
+	struct zebra_l3vni *zl3vni = bucket->data;
+
+	hash_iterate(zl3vni->rmac_table, fpm_unset_rmac_table, zl3vni);
+}
+
+static void fpm_rmac_reset(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+
+	hash_iterate(zrouter.l3vni_table, fpm_unset_l3vni_table, NULL);
+
+	/* Schedule next event: send RMAC entries. */
+	thread_add_event(zrouter.master, fpm_rmac_send, fnc, 0,
+			 &fnc->t_rmacwalk);
+}
+
+static void fpm_process_queue(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	struct zebra_dplane_ctx *ctx;
+	bool no_bufs = false;
+	uint64_t processed_contexts = 0;
+
+	while (true) {
+		/* No space available yet. */
+		if (STREAM_WRITEABLE(fnc->obuf) < NL_PKT_BUF_SIZE) {
+			no_bufs = true;
+			break;
+		}
+
+		/* Dequeue next item or quit processing. */
+		frr_with_mutex (&fnc->ctxqueue_mutex) {
+			ctx = dplane_ctx_dequeue(&fnc->ctxqueue);
+		}
+		if (ctx == NULL)
+			break;
+
+		/*
+		 * Intentionally ignoring the return value
+		 * as that we are ensuring that we can write to
+		 * the output data in the STREAM_WRITEABLE
+		 * check above, so we can ignore the return
+		 */
+		if (fnc->socket != -1)
+			(void)fpm_nl_enqueue(fnc, ctx);
+
+		/* Account the processed entries. */
+		processed_contexts++;
+		atomic_fetch_sub_explicit(&fnc->counters.ctxqueue_len, 1,
+					  memory_order_relaxed);
+
+		dplane_ctx_set_status(ctx, ZEBRA_DPLANE_REQUEST_SUCCESS);
+		dplane_provider_enqueue_out_ctx(fnc->prov, ctx);
+	}
+
+	/* Update count of processed contexts */
+	atomic_fetch_add_explicit(&fnc->counters.dplane_contexts,
+				  processed_contexts, memory_order_relaxed);
+
+	/* Re-schedule if we ran out of buffer space */
+	if (no_bufs)
+		thread_add_timer(fnc->fthread->master, fpm_process_queue,
+				 fnc, 0, &fnc->t_dequeue);
+
+	/*
+	 * Let the dataplane thread know if there are items in the
+	 * output queue to be processed. Otherwise they may sit
+	 * until the dataplane thread gets scheduled for new,
+	 * unrelated work.
+	 */
+	if (dplane_provider_out_ctx_queue_len(fnc->prov) > 0)
+		dplane_provider_work_ready();
+}
+
+/**
+ * Handles external (e.g. CLI, data plane or others) events.
+ */
+static void fpm_process_event(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	enum fpm_nl_events event = THREAD_VAL(t);
+
+	switch (event) {
+	case FNE_DISABLE:
+		zlog_info("%s: manual FPM disable event", __func__);
+		fnc->disabled = true;
+		atomic_fetch_add_explicit(&fnc->counters.user_disables, 1,
+					  memory_order_relaxed);
+
+		/* Call reconnect to disable timers and clean up context. */
+		fpm_reconnect(fnc);
+		break;
+
+	case FNE_RECONNECT:
+		zlog_info("%s: manual FPM reconnect event", __func__);
+		fnc->disabled = false;
+		atomic_fetch_add_explicit(&fnc->counters.user_configures, 1,
+					  memory_order_relaxed);
+		fpm_reconnect(fnc);
+		break;
+
+	case FNE_RESET_COUNTERS:
+		zlog_info("%s: manual FPM counters reset event", __func__);
+		memset(&fnc->counters, 0, sizeof(fnc->counters));
+		break;
+
+	case FNE_TOGGLE_NHG:
+		zlog_info("%s: toggle next hop groups support", __func__);
+		fnc->use_nhg = !fnc->use_nhg;
+		fpm_reconnect(fnc);
+		break;
+
+	case FNE_INTERNAL_RECONNECT:
+		fpm_reconnect(fnc);
+		break;
+
+	case FNE_NHG_FINISHED:
+		if (IS_ZEBRA_DEBUG_FPM)
+			zlog_debug("%s: next hop groups walk finished",
+				   __func__);
+		break;
+	case FNE_RIB_FINISHED:
+		if (IS_ZEBRA_DEBUG_FPM)
+			zlog_debug("%s: RIB walk finished", __func__);
+		break;
+	case FNE_RMAC_FINISHED:
+		if (IS_ZEBRA_DEBUG_FPM)
+			zlog_debug("%s: RMAC walk finished", __func__);
+		break;
+	case FNE_LSP_FINISHED:
+		if (IS_ZEBRA_DEBUG_FPM)
+			zlog_debug("%s: LSP walk finished", __func__);
+		break;
+	}
+}
+
+/*
+ * Data plane functions.
+ */
+static int fpm_nl_start(struct zebra_dplane_provider *prov)
+{
+	struct fpm_nl_ctx *fnc;
+
+	fnc = dplane_provider_get_data(prov);
+	fnc->fthread = frr_pthread_new(NULL, prov_name, prov_name);
+	assert(frr_pthread_run(fnc->fthread, NULL) == 0);
+	fnc->ibuf = stream_new(NL_PKT_BUF_SIZE);
+	fnc->obuf = stream_new(NL_PKT_BUF_SIZE * 128);
+	pthread_mutex_init(&fnc->obuf_mutex, NULL);
+	fnc->socket = -1;
+	fnc->disabled = true;
+	fnc->prov = prov;
+	dplane_ctx_q_init(&fnc->ctxqueue);
+	pthread_mutex_init(&fnc->ctxqueue_mutex, NULL);
+
+	/* Set default values. */
+	fnc->use_nhg = true;
+
+	return 0;
+}
+
+static int fpm_nl_finish_early(struct fpm_nl_ctx *fnc)
+{
+	/* Disable all events and close socket. */
+	THREAD_OFF(fnc->t_lspreset);
+	THREAD_OFF(fnc->t_lspwalk);
+	THREAD_OFF(fnc->t_nhgreset);
+	THREAD_OFF(fnc->t_nhgwalk);
+	THREAD_OFF(fnc->t_ribreset);
+	THREAD_OFF(fnc->t_ribwalk);
+	THREAD_OFF(fnc->t_rmacreset);
+	THREAD_OFF(fnc->t_rmacwalk);
+	THREAD_OFF(fnc->t_event);
+	THREAD_OFF(fnc->t_nhg);
+	thread_cancel_async(fnc->fthread->master, &fnc->t_read, NULL);
+	thread_cancel_async(fnc->fthread->master, &fnc->t_write, NULL);
+	thread_cancel_async(fnc->fthread->master, &fnc->t_connect, NULL);
+
+	if (fnc->socket != -1) {
+		close(fnc->socket);
+		fnc->socket = -1;
+	}
+
+	return 0;
+}
+
+static int fpm_nl_finish_late(struct fpm_nl_ctx *fnc)
+{
+	/* Stop the running thread. */
+	frr_pthread_stop(fnc->fthread, NULL);
+
+	/* Free all allocated resources. */
+	pthread_mutex_destroy(&fnc->obuf_mutex);
+	pthread_mutex_destroy(&fnc->ctxqueue_mutex);
+	stream_free(fnc->ibuf);
+	stream_free(fnc->obuf);
+	free(gfnc);
+	gfnc = NULL;
+
+	return 0;
+}
+
+static int fpm_nl_finish(struct zebra_dplane_provider *prov, bool early)
+{
+	struct fpm_nl_ctx *fnc;
+
+	fnc = dplane_provider_get_data(prov);
+	if (early)
+		return fpm_nl_finish_early(fnc);
+
+	return fpm_nl_finish_late(fnc);
+}
+
+static int fpm_nl_process(struct zebra_dplane_provider *prov)
+{
+	struct zebra_dplane_ctx *ctx;
+	struct fpm_nl_ctx *fnc;
+	int counter, limit;
+	uint64_t cur_queue, peak_queue = 0, stored_peak_queue;
+
+	fnc = dplane_provider_get_data(prov);
+	limit = dplane_provider_get_work_limit(prov);
+	for (counter = 0; counter < limit; counter++) {
+		ctx = dplane_provider_dequeue_in_ctx(prov);
+		if (ctx == NULL)
+			break;
+
+		/*
+		 * Skip all notifications if not connected, we'll walk the RIB
+		 * anyway.
+		 */
+		if (fnc->socket != -1 && fnc->connecting == false) {
+			/*
+			 * Update the number of queued contexts *before*
+			 * enqueueing, to ensure counter consistency.
+			 */
+			atomic_fetch_add_explicit(&fnc->counters.ctxqueue_len,
+						  1, memory_order_relaxed);
+
+			frr_with_mutex (&fnc->ctxqueue_mutex) {
+				dplane_ctx_enqueue_tail(&fnc->ctxqueue, ctx);
+			}
+
+			cur_queue = atomic_load_explicit(
+				&fnc->counters.ctxqueue_len,
+				memory_order_relaxed);
+			if (peak_queue < cur_queue)
+				peak_queue = cur_queue;
+			continue;
+		}
+
+		dplane_ctx_set_status(ctx, ZEBRA_DPLANE_REQUEST_SUCCESS);
+		dplane_provider_enqueue_out_ctx(prov, ctx);
+	}
+
+	/* Update peak queue length, if we just observed a new peak */
+	stored_peak_queue = atomic_load_explicit(
+		&fnc->counters.ctxqueue_len_peak, memory_order_relaxed);
+	if (stored_peak_queue < peak_queue)
+		atomic_store_explicit(&fnc->counters.ctxqueue_len_peak,
+				      peak_queue, memory_order_relaxed);
+
+	if (atomic_load_explicit(&fnc->counters.ctxqueue_len,
+				 memory_order_relaxed)
+	    > 0)
+		thread_add_timer(fnc->fthread->master, fpm_process_queue,
+				 fnc, 0, &fnc->t_dequeue);
+
+	/* Ensure dataplane thread is rescheduled if we hit the work limit */
+	if (counter >= limit)
+		dplane_provider_work_ready();
+
+	return 0;
+}
+
+static int fpm_nl_new(struct thread_master *tm)
+{
+	struct zebra_dplane_provider *prov = NULL;
+	int rv;
+
+	gfnc = calloc(1, sizeof(*gfnc));
+	rv = dplane_provider_register(prov_name, DPLANE_PRIO_POSTPROCESS,
+				      DPLANE_PROV_FLAG_THREADED, fpm_nl_start,
+				      fpm_nl_process, fpm_nl_finish, gfnc,
+				      &prov);
+
+	if (IS_ZEBRA_DEBUG_DPLANE)
+		zlog_debug("%s register status: %d", prov_name, rv);
+
+	install_node(&fpm_node);
+	install_element(ENABLE_NODE, &fpm_show_counters_cmd);
+	install_element(ENABLE_NODE, &fpm_show_counters_json_cmd);
+	install_element(ENABLE_NODE, &fpm_reset_counters_cmd);
+	install_element(CONFIG_NODE, &fpm_set_address_cmd);
+	install_element(CONFIG_NODE, &no_fpm_set_address_cmd);
+	install_element(CONFIG_NODE, &fpm_use_nhg_cmd);
+	install_element(CONFIG_NODE, &no_fpm_use_nhg_cmd);
+
+	return 0;
+}
+
+static int fpm_nl_init(void)
+{
+	hook_register(frr_late_init, fpm_nl_new);
+	return 0;
+}
+
+FRR_MODULE_SETUP(
+	.name = "dplane_fpm_sonic",
+	.version = "0.0.1",
+	.description = "Data plane plugin for FPM using netlink.",
+	.init = fpm_nl_init,
+);
diff --git a/src/sonic-frr/patch/build-dplane-fpm-sonic-module.patch b/src/sonic-frr/patch/build-dplane-fpm-sonic-module.patch
new file mode 100644
index 000000000000..1ada5d9604df
--- /dev/null
+++ b/src/sonic-frr/patch/build-dplane-fpm-sonic-module.patch
@@ -0,0 +1,52 @@
+Build dplane_fpm_sonic module
+
+From: Carmine Scarpitta <cscarpit@cisco.com>
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ debian/frr.install |    1 +
+ redhat/frr.spec.in |    1 +
+ zebra/subdir.am    |    6 ++++++
+ 3 files changed, 8 insertions(+)
+
+diff --git a/debian/frr.install b/debian/frr.install
+index 044b48498..f53b874e3 100644
+--- a/debian/frr.install
++++ b/debian/frr.install
+@@ -10,6 +10,7 @@ usr/lib/*/frr/libfrrcares.*
+ usr/lib/*/frr/libfrrospfapiclient.*
+ usr/lib/*/frr/modules/bgpd_bmp.so
+ usr/lib/*/frr/modules/dplane_fpm_nl.so
++usr/lib/*/frr/modules/dplane_fpm_sonic.so
+ usr/lib/*/frr/modules/zebra_cumulus_mlag.so
+ usr/lib/*/frr/modules/zebra_fpm.so
+ usr/lib/*/frr/modules/zebra_irdp.so
+diff --git a/redhat/frr.spec.in b/redhat/frr.spec.in
+index 4afd562a8..2eab817c9 100644
+--- a/redhat/frr.spec.in
++++ b/redhat/frr.spec.in
+@@ -714,6 +714,7 @@ fi
+ %endif
+ %{_libdir}/frr/modules/zebra_cumulus_mlag.so
+ %{_libdir}/frr/modules/dplane_fpm_nl.so
++%{_libdir}/frr/modules/dplane_fpm_sonic.so
+ %{_libdir}/frr/modules/zebra_irdp.so
+ %{_libdir}/frr/modules/bgpd_bmp.so
+ %{_bindir}/*
+diff --git a/zebra/subdir.am b/zebra/subdir.am
+index 5c4a87b93..3f1807d26 100644
+--- a/zebra/subdir.am
++++ b/zebra/subdir.am
+@@ -236,6 +236,12 @@ zebra_dplane_fpm_nl_la_LDFLAGS = $(MODULE_LDFLAGS)
+ zebra_dplane_fpm_nl_la_LIBADD  =
+ endif
+ 
++module_LTLIBRARIES += zebra/dplane_fpm_sonic.la
++
++zebra_dplane_fpm_sonic_la_SOURCES = zebra/dplane_fpm_sonic.c
++zebra_dplane_fpm_sonic_la_LDFLAGS = $(MODULE_LDFLAGS)
++zebra_dplane_fpm_sonic_la_LIBADD  =
++
+ if NETLINK_DEBUG
+ zebra_zebra_SOURCES += \
+ 	zebra/debug_nl.c \
diff --git a/src/sonic-frr/patch/series b/src/sonic-frr/patch/series
index 1606b67065e4..c14a56f5b10f 100644
--- a/src/sonic-frr/patch/series
+++ b/src/sonic-frr/patch/series
@@ -51,3 +51,4 @@
 0051-bgpd-backpressure-fix-ret-value-evpn_route_select_in.patch
 0052-bgpd-backpressure-log-error-for-evpn-when-route-inst.patch
 0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch
+build-dplane-fpm-sonic-module.patch

From 23792e64725f19bb95c6990b8e726d6842b319be Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 1 Oct 2024 19:01:11 +0800
Subject: [PATCH 054/364] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20392)

#### Why I did it
src/sonic-utilities
```
* 66b41e5f - (HEAD -> master, origin/master, origin/HEAD) [fast/warm-reboot] Improve retry mechanism to check if SAI_OBJECT_TYPE_ACL_ENTRY entries are in redis (#3548) (10 hours ago) [Andriy Yurkiv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 94ec7108a85a..66b41e5f3a4f 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 94ec7108a85aff9b89f5622ef768530b36450064
+Subproject commit 66b41e5f3a4f2ece1cf849a3810aeada602f6f7d

From aefaf9413894244ee0347e0961a5c2f1a834caec Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 1 Oct 2024 19:01:17 +0800
Subject: [PATCH 055/364] [submodule] Update submodule sonic-swss-common to the
 latest HEAD automatically (#20374)

#### Why I did it
src/sonic-swss-common
```
* 898aa5d - (HEAD -> master, origin/master, origin/HEAD) Add VRF support to ZMQ server/client (#920) (26 hours ago) [Hua Liu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 24979b05ff9c..898aa5dbee22 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 24979b05ff9c2daa18432abcd0dd8518bd5c7e60
+Subproject commit 898aa5dbee22920847dafb0849907d55c8a84816

From 8cd3cffad9aa030a284c641a06ba4ca3d467faee Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 2 Oct 2024 19:01:19 +0800
Subject: [PATCH 056/364] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#20403)

#### Why I did it
src/sonic-platform-daemons
```
* 604e454 - (HEAD -> master, origin/master, origin/HEAD) Improve parsing of media-settings.json for non-CMIS and breakout ports (#533) (22 hours ago) [longhuan-cisco]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 2c39785a8d82..604e454e6f54 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 2c39785a8d82a57429b1bc5b3b544751ca18aa88
+Subproject commit 604e454e6f54385961b0350cd0bb04a14daf4cc9

From a50fa4abf0775c8bc5b50b9a751569dfabbaf8cf Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 2 Oct 2024 19:01:30 +0800
Subject: [PATCH 057/364] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#20045)

#### Why I did it
src/sonic-linux-kernel
```
* b2f73b6 - (HEAD -> master, origin/master, origin/HEAD) include adm1275 config within kconfig for usage on cisco platform (#432) (35 hours ago) [Gregory Boudreau]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index 72d451673d0d..b2f73b600b0a 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit 72d451673d0d84ec274ebc5ad6fafc0ec7d6bd57
+Subproject commit b2f73b600b0aa97f7260006fb6d2eb87ca898246

From ec20ff3f4382f9b149ddeceafedb4cf220e80a17 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 3 Oct 2024 16:01:26 +0800
Subject: [PATCH 058/364] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20411)

#### Why I did it
src/sonic-utilities
```
* 008a078a - (HEAD -> master, origin/master, origin/HEAD) Add Unit Test for portstat (#3564) (5 hours ago) [Changrong Wu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 66b41e5f3a4f..008a078a5319 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 66b41e5f3a4f2ece1cf849a3810aeada602f6f7d
+Subproject commit 008a078a531965f589e319dab1c0b91ca13a6f28

From c7dc8e97108134caf6da68d2ecbb921b7da7e84b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 3 Oct 2024 19:01:05 +0800
Subject: [PATCH 059/364] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#20410)

#### Why I did it
src/sonic-sairedis
```
* 24843d41 - (HEAD -> master, origin/master, origin/HEAD) [Mellanox] Resolve New Line Formatting Issues in syncd's sai.profile (#1412) (14 hours ago) [Tomer Shalvi]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 9b9d3306080e..24843d41955c 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 9b9d3306080e25568dd89261de87beac01738a0a
+Subproject commit 24843d41955c8724bb7f196e38e420e760bce07f

From 7ca784a7e20cd75b004a7dcce9832cf2af78f34b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 3 Oct 2024 19:01:09 +0800
Subject: [PATCH 060/364] [submodule] Update submodule sonic-mgmt-common to the
 latest HEAD automatically (#20409)

#### Why I did it
src/sonic-mgmt-common
```
* b91a4df - (HEAD -> master, origin/master, origin/HEAD) PortChannel Interface Static Support - OpenConfig Yang (#142) (9 hours ago) [Satoru Shinohara]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common
index 966adc0d92f7..b91a4df3bd0e 160000
--- a/src/sonic-mgmt-common
+++ b/src/sonic-mgmt-common
@@ -1 +1 @@
-Subproject commit 966adc0d92f7c5e2f77636288653489bb97d9deb
+Subproject commit b91a4df3bd0e4be97e67ab3f27b1826b1713afc5

From e18cecb4f6282abc674998c46166c7a8a9f41df7 Mon Sep 17 00:00:00 2001
From: judyjoseph <53951155+judyjoseph@users.noreply.github.com>
Date: Thu, 3 Oct 2024 14:45:26 -0700
Subject: [PATCH 061/364] sort the system port ID generation (#20075)

#### Why I did it
The system_port_id generation was based on the loop below

for interface in **interface_metadata.findall**(str(QName(ns1, "DeviceInterfaceMetadata"))):

"DeviceInterfaceMetadata" defined in the minigraph in DeviceInfo section, which is per interface and in this loop we increment the system_port_id++ so that each interface will have a unique ID.

The for loop was based on interface_metadata list extracted by findall() API matching tag **"DeviceInterfaceMetadata"** [lxml.etree._Element](https://lxml.de/api/lxml.etree._Element-class.html). findall() doesn't guarantee document order. Hence the interface list and the corresponding system_port ids generated - has a possibility of not matching across config_db's in different linecards of a chassis.

When SYSTEM_PORT table entries hve mismatch across linecards, a few line cards behaving erratically, resulting in continuous pkt error interrupts getting fired and the IBGP sessions not getting established with other peer ASIC's in other line cards.

### How I did it
Add logic to do a sort of the system_ports dictionary based on the key (eg: "str-sonic-lc03|ASIC0|Ethernet120") and assign the system_port_id in an incremental way.

This makes sure the system_port_ids in SYSTEM_PORT table in config_db matches in all linecards/asic

Thanks to @abdosi and @vmittal-msft in triaging and coming to this solution.

#### How to verify it

Verified by manually patching this logic in the minigraph parser in the sonic T2 chassis and make sure the dockers, interfaces, IBGP, EBGP comes up in all linecards across the chassis.
---
 src/sonic-config-engine/minigraph.py          |   11 +-
 .../voq_chassis_data/system_ports.json        | 2282 ++++++++---------
 2 files changed, 1149 insertions(+), 1144 deletions(-)

diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py
index c9d060993e4a..41fbd383b9ce 100644
--- a/src/sonic-config-engine/minigraph.py
+++ b/src/sonic-config-engine/minigraph.py
@@ -342,14 +342,13 @@ def parse_chassis_deviceinfo_intf_metadata(device_info, chassis_linecards_info,
             if linecard_name is not None:
                 key = "%s|%s" % (linecard_name, key)
             system_ports[key] = {
-                "system_port_id": system_port_id,
+                "system_port_id": 0,
                 "switch_id": switch_id,
                 "core_index": core_id,
                 "core_port_index": core_port_id,
                 "speed": intf_speed,
                 "num_voq": num_voq
             }
-            system_port_id += 1
 
         chassis_port_alias.setdefault(slot_index, {}).update(
             {(intf_sonic_name, intf_speed): intf_name})
@@ -363,8 +362,14 @@ def parse_chassis_deviceinfo_intf_metadata(device_info, chassis_linecards_info,
             port_default_speed.setdefault(slot_index, {}).update(
                 {intf_sonic_name: intf_speed})
 
-    return system_ports, chassis_port_alias, port_default_speed
+    # The above loop with findall("DeviceInterfaceMetadata") was not giving interfaces from minigraph
+    # in document order. So doing an explict sort so that system_port_ids remain same across LCs
+    sorted_system_ports = { key:system_ports[key] for key in sorted(system_ports.keys()) }
+    for k,v in sorted_system_ports.items():
+        v["system_port_id"] = system_port_id
+        system_port_id += 1
 
+    return sorted_system_ports, chassis_port_alias, port_default_speed
 
 
 def parse_chassis_deviceinfo_voq_int_intfs(device_info):
diff --git a/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/system_ports.json b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/system_ports.json
index 0cb7e777b943..eb44ab1cc3f0 100644
--- a/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/system_ports.json
+++ b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/system_ports.json
@@ -1,22 +1,70 @@
 {
-    "str-sonic-lc03|ASIC0|Ethernet0": {
+    "str-sonic-lc03|ASIC0|Ethernet-IB0": {
         "system_port_id": 1,
         "switch_id": 8,
         "core_index": "1",
-        "core_port_index": "1",
+        "core_port_index": "50",
         "speed": "400000",
         "num_voq": "8"
     },
-    "str-sonic-lc03|ASIC0|Ethernet8": {
+    "str-sonic-lc03|ASIC0|Ethernet-Rec0": {
         "system_port_id": 2,
         "switch_id": 8,
+        "core_index": "0",
+        "core_port_index": "49",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet0": {
+        "system_port_id": 3,
+        "switch_id": 8,
         "core_index": "1",
-        "core_port_index": "2",
+        "core_port_index": "1",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet104": {
+        "system_port_id": 4,
+        "switch_id": 8,
+        "core_index": "0",
+        "core_port_index": "14",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet112": {
+        "system_port_id": 5,
+        "switch_id": 8,
+        "core_index": "0",
+        "core_port_index": "15",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet120": {
+        "system_port_id": 6,
+        "switch_id": 8,
+        "core_index": "0",
+        "core_port_index": "16",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet128": {
+        "system_port_id": 7,
+        "switch_id": 8,
+        "core_index": "0",
+        "core_port_index": "17",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet136": {
+        "system_port_id": 8,
+        "switch_id": 8,
+        "core_index": "0",
+        "core_port_index": "18",
         "speed": "400000",
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC0|Ethernet16": {
-        "system_port_id": 3,
+        "system_port_id": 9,
         "switch_id": 8,
         "core_index": "1",
         "core_port_index": "3",
@@ -24,7 +72,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC0|Ethernet24": {
-        "system_port_id": 4,
+        "system_port_id": 10,
         "switch_id": 8,
         "core_index": "1",
         "core_port_index": "4",
@@ -32,7 +80,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC0|Ethernet32": {
-        "system_port_id": 5,
+        "system_port_id": 11,
         "switch_id": 8,
         "core_index": "1",
         "core_port_index": "5",
@@ -40,7 +88,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC0|Ethernet40": {
-        "system_port_id": 6,
+        "system_port_id": 12,
         "switch_id": 8,
         "core_index": "1",
         "core_port_index": "6",
@@ -48,7 +96,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC0|Ethernet48": {
-        "system_port_id": 7,
+        "system_port_id": 13,
         "switch_id": 8,
         "core_index": "1",
         "core_port_index": "7",
@@ -56,7 +104,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC0|Ethernet56": {
-        "system_port_id": 8,
+        "system_port_id": 14,
         "switch_id": 8,
         "core_index": "1",
         "core_port_index": "8",
@@ -64,7 +112,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC0|Ethernet64": {
-        "system_port_id": 9,
+        "system_port_id": 15,
         "switch_id": 8,
         "core_index": "1",
         "core_port_index": "9",
@@ -72,15 +120,23 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC0|Ethernet72": {
-        "system_port_id": 10,
+        "system_port_id": 16,
         "switch_id": 8,
         "core_index": "0",
         "core_port_index": "10",
         "speed": "400000",
         "num_voq": "8"
     },
+    "str-sonic-lc03|ASIC0|Ethernet8": {
+        "system_port_id": 17,
+        "switch_id": 8,
+        "core_index": "1",
+        "core_port_index": "2",
+        "speed": "400000",
+        "num_voq": "8"
+    },
     "str-sonic-lc03|ASIC0|Ethernet80": {
-        "system_port_id": 11,
+        "system_port_id": 18,
         "switch_id": 8,
         "core_index": "0",
         "core_port_index": "11",
@@ -88,7 +144,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC0|Ethernet88": {
-        "system_port_id": 12,
+        "system_port_id": 19,
         "switch_id": 8,
         "core_index": "0",
         "core_port_index": "12",
@@ -96,55 +152,39 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC0|Ethernet96": {
-        "system_port_id": 13,
+        "system_port_id": 20,
         "switch_id": 8,
         "core_index": "0",
         "core_port_index": "13",
         "speed": "400000",
         "num_voq": "8"
     },
-    "str-sonic-lc03|ASIC0|Ethernet104": {
-        "system_port_id": 14,
-        "switch_id": 8,
-        "core_index": "0",
-        "core_port_index": "14",
-        "speed": "400000",
-        "num_voq": "8"
-    },
-    "str-sonic-lc03|ASIC0|Ethernet112": {
-        "system_port_id": 15,
-        "switch_id": 8,
-        "core_index": "0",
-        "core_port_index": "15",
-        "speed": "400000",
-        "num_voq": "8"
-    },
-    "str-sonic-lc03|ASIC0|Ethernet120": {
-        "system_port_id": 16,
+    "str-sonic-lc03|ASIC0|cpu0": {
+        "system_port_id": 21,
         "switch_id": 8,
-        "core_index": "0",
-        "core_port_index": "16",
-        "speed": "400000",
+        "core_index": 0,
+        "core_port_index": 0,
+        "speed": "10000",
         "num_voq": "8"
     },
-    "str-sonic-lc03|ASIC0|Ethernet128": {
-        "system_port_id": 17,
-        "switch_id": 8,
-        "core_index": "0",
-        "core_port_index": "17",
+    "str-sonic-lc03|ASIC1|Ethernet-IB1": {
+        "system_port_id": 22,
+        "switch_id": 10,
+        "core_index": "1",
+        "core_port_index": "50",
         "speed": "400000",
         "num_voq": "8"
     },
-    "str-sonic-lc03|ASIC0|Ethernet136": {
-        "system_port_id": 18,
-        "switch_id": 8,
+    "str-sonic-lc03|ASIC1|Ethernet-Rec1": {
+        "system_port_id": 23,
+        "switch_id": 10,
         "core_index": "0",
-        "core_port_index": "18",
+        "core_port_index": "49",
         "speed": "400000",
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet144": {
-        "system_port_id": 19,
+        "system_port_id": 24,
         "switch_id": 10,
         "core_index": "1",
         "core_port_index": "1",
@@ -152,7 +192,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet152": {
-        "system_port_id": 20,
+        "system_port_id": 25,
         "switch_id": 10,
         "core_index": "1",
         "core_port_index": "2",
@@ -160,7 +200,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet160": {
-        "system_port_id": 21,
+        "system_port_id": 26,
         "switch_id": 10,
         "core_index": "1",
         "core_port_index": "3",
@@ -168,7 +208,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet168": {
-        "system_port_id": 22,
+        "system_port_id": 27,
         "switch_id": 10,
         "core_index": "1",
         "core_port_index": "4",
@@ -176,7 +216,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet176": {
-        "system_port_id": 23,
+        "system_port_id": 28,
         "switch_id": 10,
         "core_index": "1",
         "core_port_index": "5",
@@ -184,7 +224,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet184": {
-        "system_port_id": 24,
+        "system_port_id": 29,
         "switch_id": 10,
         "core_index": "1",
         "core_port_index": "6",
@@ -192,7 +232,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet192": {
-        "system_port_id": 25,
+        "system_port_id": 30,
         "switch_id": 10,
         "core_index": "1",
         "core_port_index": "7",
@@ -200,7 +240,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet200": {
-        "system_port_id": 26,
+        "system_port_id": 31,
         "switch_id": 10,
         "core_index": "1",
         "core_port_index": "8",
@@ -208,7 +248,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet208": {
-        "system_port_id": 27,
+        "system_port_id": 32,
         "switch_id": 10,
         "core_index": "1",
         "core_port_index": "9",
@@ -216,7 +256,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet216": {
-        "system_port_id": 28,
+        "system_port_id": 33,
         "switch_id": 10,
         "core_index": "0",
         "core_port_index": "10",
@@ -224,7 +264,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet224": {
-        "system_port_id": 29,
+        "system_port_id": 34,
         "switch_id": 10,
         "core_index": "0",
         "core_port_index": "11",
@@ -232,7 +272,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet232": {
-        "system_port_id": 30,
+        "system_port_id": 35,
         "switch_id": 10,
         "core_index": "0",
         "core_port_index": "12",
@@ -240,7 +280,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet240": {
-        "system_port_id": 31,
+        "system_port_id": 36,
         "switch_id": 10,
         "core_index": "0",
         "core_port_index": "13",
@@ -248,7 +288,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet248": {
-        "system_port_id": 32,
+        "system_port_id": 37,
         "switch_id": 10,
         "core_index": "0",
         "core_port_index": "14",
@@ -256,7 +296,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet256": {
-        "system_port_id": 33,
+        "system_port_id": 38,
         "switch_id": 10,
         "core_index": "0",
         "core_port_index": "15",
@@ -264,7 +304,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet264": {
-        "system_port_id": 34,
+        "system_port_id": 39,
         "switch_id": 10,
         "core_index": "0",
         "core_port_index": "16",
@@ -272,7 +312,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet272": {
-        "system_port_id": 35,
+        "system_port_id": 40,
         "switch_id": 10,
         "core_index": "0",
         "core_port_index": "17",
@@ -280,2099 +320,2059 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet280": {
-        "system_port_id": 36,
+        "system_port_id": 41,
         "switch_id": 10,
         "core_index": "0",
         "core_port_index": "18",
         "speed": "400000",
         "num_voq": "8"
     },
-    "str-sonic-lc03|ASIC0|cpu0": {
-        "system_port_id": 37,
-        "switch_id": 8,
-        "core_index": 0,
-        "core_port_index": 0,
-        "speed": "10000",
-        "num_voq": "8"
-    },
     "str-sonic-lc03|ASIC1|cpu1": {
-        "system_port_id": 38,
+        "system_port_id": 42,
         "switch_id": 10,
         "core_index": 0,
         "core_port_index": 0,
         "speed": "10000",
         "num_voq": "8"
     },
-    "str-sonic-lc03|ASIC0|Ethernet-Rec0": {
-        "system_port_id": 39,
-        "switch_id": 8,
-        "core_index": "0",
-        "core_port_index": "49",
-        "speed": "400000",
-        "num_voq": "8"
-    },
-    "str-sonic-lc03|ASIC1|Ethernet-Rec1": {
-        "system_port_id": 40,
-        "switch_id": 10,
-        "core_index": "0",
-        "core_port_index": "49",
-        "speed": "400000",
-        "num_voq": "8"
-    },
-    "str-sonic-lc03|ASIC0|Ethernet-IB0": {
-        "system_port_id": 41,
-        "switch_id": 8,
-        "core_index": "1",
-        "core_port_index": "50",
-        "speed": "400000",
-        "num_voq": "8"
-    },
-    "str-sonic-lc03|ASIC1|Ethernet-IB1": {
-        "system_port_id": 42,
-        "switch_id": 10,
+    "str-sonic-lc04|ASIC0|Ethernet-IB0": {
+        "system_port_id": 43,
+        "switch_id": 12,
         "core_index": "1",
         "core_port_index": "50",
         "speed": "400000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet0": {
-        "system_port_id": 43,
-        "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "1",
-        "speed": "100000",
-        "num_voq": "8"
-    },
-    "str-sonic-lc04|ASIC0|Ethernet4": {
+    "str-sonic-lc04|ASIC0|Ethernet-Rec0": {
         "system_port_id": 44,
         "switch_id": 12,
         "core_index": "0",
-        "core_port_index": "2",
-        "speed": "100000",
+        "core_port_index": "49",
+        "speed": "400000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet8": {
+    "str-sonic-lc04|ASIC0|Ethernet0": {
         "system_port_id": 45,
         "switch_id": 12,
         "core_index": "0",
-        "core_port_index": "3",
+        "core_port_index": "1",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet12": {
+    "str-sonic-lc04|ASIC0|Ethernet100": {
         "system_port_id": 46,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "4",
+        "core_index": "1",
+        "core_port_index": "26",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet16": {
+    "str-sonic-lc04|ASIC0|Ethernet104": {
         "system_port_id": 47,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "5",
+        "core_index": "1",
+        "core_port_index": "27",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet20": {
+    "str-sonic-lc04|ASIC0|Ethernet108": {
         "system_port_id": 48,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "6",
+        "core_index": "1",
+        "core_port_index": "28",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet24": {
+    "str-sonic-lc04|ASIC0|Ethernet112": {
         "system_port_id": 49,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "7",
+        "core_index": "1",
+        "core_port_index": "29",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet28": {
+    "str-sonic-lc04|ASIC0|Ethernet116": {
         "system_port_id": 50,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "8",
+        "core_index": "1",
+        "core_port_index": "30",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet32": {
+    "str-sonic-lc04|ASIC0|Ethernet12": {
         "system_port_id": 51,
         "switch_id": 12,
         "core_index": "0",
-        "core_port_index": "9",
+        "core_port_index": "4",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet36": {
+    "str-sonic-lc04|ASIC0|Ethernet120": {
         "system_port_id": 52,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "10",
+        "core_index": "1",
+        "core_port_index": "31",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet40": {
+    "str-sonic-lc04|ASIC0|Ethernet124": {
         "system_port_id": 53,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "11",
+        "core_index": "1",
+        "core_port_index": "32",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet44": {
+    "str-sonic-lc04|ASIC0|Ethernet128": {
         "system_port_id": 54,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "12",
+        "core_index": "1",
+        "core_port_index": "33",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet48": {
+    "str-sonic-lc04|ASIC0|Ethernet132": {
         "system_port_id": 55,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "13",
+        "core_index": "1",
+        "core_port_index": "34",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet52": {
+    "str-sonic-lc04|ASIC0|Ethernet136": {
         "system_port_id": 56,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "14",
+        "core_index": "1",
+        "core_port_index": "35",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet56": {
+    "str-sonic-lc04|ASIC0|Ethernet140": {
         "system_port_id": 57,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "15",
+        "core_index": "1",
+        "core_port_index": "36",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet60": {
+    "str-sonic-lc04|ASIC0|Ethernet144": {
         "system_port_id": 58,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "16",
+        "core_index": "1",
+        "core_port_index": "37",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet64": {
+    "str-sonic-lc04|ASIC0|Ethernet148": {
         "system_port_id": 59,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "17",
+        "core_index": "1",
+        "core_port_index": "38",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet68": {
+    "str-sonic-lc04|ASIC0|Ethernet152": {
         "system_port_id": 60,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "18",
+        "core_index": "1",
+        "core_port_index": "39",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet72": {
+    "str-sonic-lc04|ASIC0|Ethernet156": {
         "system_port_id": 61,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "19",
+        "core_index": "1",
+        "core_port_index": "40",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet76": {
+    "str-sonic-lc04|ASIC0|Ethernet16": {
         "system_port_id": 62,
         "switch_id": 12,
         "core_index": "0",
-        "core_port_index": "20",
+        "core_port_index": "5",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet80": {
+    "str-sonic-lc04|ASIC0|Ethernet160": {
         "system_port_id": 63,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "21",
+        "core_index": "1",
+        "core_port_index": "41",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet84": {
+    "str-sonic-lc04|ASIC0|Ethernet164": {
         "system_port_id": 64,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "22",
+        "core_index": "1",
+        "core_port_index": "42",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet88": {
+    "str-sonic-lc04|ASIC0|Ethernet168": {
         "system_port_id": 65,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "23",
+        "core_index": "1",
+        "core_port_index": "43",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet92": {
+    "str-sonic-lc04|ASIC0|Ethernet172": {
         "system_port_id": 66,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "24",
+        "core_index": "1",
+        "core_port_index": "44",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet96": {
+    "str-sonic-lc04|ASIC0|Ethernet176": {
         "system_port_id": 67,
         "switch_id": 12,
         "core_index": "1",
-        "core_port_index": "25",
+        "core_port_index": "45",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet100": {
+    "str-sonic-lc04|ASIC0|Ethernet180": {
         "system_port_id": 68,
         "switch_id": 12,
         "core_index": "1",
-        "core_port_index": "26",
+        "core_port_index": "46",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet104": {
+    "str-sonic-lc04|ASIC0|Ethernet184": {
         "system_port_id": 69,
         "switch_id": 12,
         "core_index": "1",
-        "core_port_index": "27",
+        "core_port_index": "47",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet108": {
+    "str-sonic-lc04|ASIC0|Ethernet188": {
         "system_port_id": 70,
         "switch_id": 12,
         "core_index": "1",
-        "core_port_index": "28",
+        "core_port_index": "48",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet112": {
+    "str-sonic-lc04|ASIC0|Ethernet20": {
         "system_port_id": 71,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "29",
+        "core_index": "0",
+        "core_port_index": "6",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet116": {
+    "str-sonic-lc04|ASIC0|Ethernet24": {
         "system_port_id": 72,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "30",
+        "core_index": "0",
+        "core_port_index": "7",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet120": {
+    "str-sonic-lc04|ASIC0|Ethernet28": {
         "system_port_id": 73,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "31",
+        "core_index": "0",
+        "core_port_index": "8",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet124": {
+    "str-sonic-lc04|ASIC0|Ethernet32": {
         "system_port_id": 74,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "32",
+        "core_index": "0",
+        "core_port_index": "9",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet128": {
+    "str-sonic-lc04|ASIC0|Ethernet36": {
         "system_port_id": 75,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "33",
+        "core_index": "0",
+        "core_port_index": "10",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet132": {
+    "str-sonic-lc04|ASIC0|Ethernet4": {
         "system_port_id": 76,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "34",
+        "core_index": "0",
+        "core_port_index": "2",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet136": {
+    "str-sonic-lc04|ASIC0|Ethernet40": {
         "system_port_id": 77,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "35",
+        "core_index": "0",
+        "core_port_index": "11",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet140": {
+    "str-sonic-lc04|ASIC0|Ethernet44": {
         "system_port_id": 78,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "36",
+        "core_index": "0",
+        "core_port_index": "12",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet144": {
+    "str-sonic-lc04|ASIC0|Ethernet48": {
         "system_port_id": 79,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "37",
+        "core_index": "0",
+        "core_port_index": "13",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet148": {
+    "str-sonic-lc04|ASIC0|Ethernet52": {
         "system_port_id": 80,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "38",
+        "core_index": "0",
+        "core_port_index": "14",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet152": {
+    "str-sonic-lc04|ASIC0|Ethernet56": {
         "system_port_id": 81,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "39",
+        "core_index": "0",
+        "core_port_index": "15",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet156": {
+    "str-sonic-lc04|ASIC0|Ethernet60": {
         "system_port_id": 82,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "40",
+        "core_index": "0",
+        "core_port_index": "16",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet160": {
+    "str-sonic-lc04|ASIC0|Ethernet64": {
         "system_port_id": 83,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "41",
+        "core_index": "0",
+        "core_port_index": "17",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet164": {
+    "str-sonic-lc04|ASIC0|Ethernet68": {
         "system_port_id": 84,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "42",
+        "core_index": "0",
+        "core_port_index": "18",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet168": {
+    "str-sonic-lc04|ASIC0|Ethernet72": {
         "system_port_id": 85,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "43",
+        "core_index": "0",
+        "core_port_index": "19",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet172": {
+    "str-sonic-lc04|ASIC0|Ethernet76": {
         "system_port_id": 86,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "44",
+        "core_index": "0",
+        "core_port_index": "20",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet176": {
+    "str-sonic-lc04|ASIC0|Ethernet8": {
         "system_port_id": 87,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "45",
+        "core_index": "0",
+        "core_port_index": "3",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet180": {
+    "str-sonic-lc04|ASIC0|Ethernet80": {
         "system_port_id": 88,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "46",
+        "core_index": "0",
+        "core_port_index": "21",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet184": {
+    "str-sonic-lc04|ASIC0|Ethernet84": {
         "system_port_id": 89,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "47",
+        "core_index": "0",
+        "core_port_index": "22",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet188": {
+    "str-sonic-lc04|ASIC0|Ethernet88": {
         "system_port_id": 90,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "48",
+        "core_index": "0",
+        "core_port_index": "23",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|cpu0": {
+    "str-sonic-lc04|ASIC0|Ethernet92": {
         "system_port_id": 91,
         "switch_id": 12,
-        "core_index": 0,
-        "core_port_index": 0,
-        "speed": "10000",
+        "core_index": "0",
+        "core_port_index": "24",
+        "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet-Rec0": {
+    "str-sonic-lc04|ASIC0|Ethernet96": {
         "system_port_id": 92,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "49",
-        "speed": "400000",
+        "core_index": "1",
+        "core_port_index": "25",
+        "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet-IB0": {
+    "str-sonic-lc04|ASIC0|cpu0": {
         "system_port_id": 93,
         "switch_id": 12,
+        "core_index": 0,
+        "core_port_index": 0,
+        "speed": "10000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc05|ASIC0|Ethernet-IB0": {
+        "system_port_id": 94,
+        "switch_id": 16,
         "core_index": "1",
         "core_port_index": "50",
         "speed": "400000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet0": {
-        "system_port_id": 94,
+    "str-sonic-lc05|ASIC0|Ethernet-Rec0": {
+        "system_port_id": 95,
         "switch_id": 16,
         "core_index": "0",
-        "core_port_index": "1",
-        "speed": "100000",
-        "num_voq": "8"
-    },
-    "str-sonic-lc05|ASIC0|Ethernet4": {
-        "system_port_id": 95,
-        "switch_id": 16,
-        "core_index": "0",
-        "core_port_index": "2",
-        "speed": "100000",
+        "core_port_index": "49",
+        "speed": "400000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet8": {
+    "str-sonic-lc05|ASIC0|Ethernet0": {
         "system_port_id": 96,
         "switch_id": 16,
         "core_index": "0",
-        "core_port_index": "3",
+        "core_port_index": "1",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet12": {
+    "str-sonic-lc05|ASIC0|Ethernet100": {
         "system_port_id": 97,
         "switch_id": 16,
-        "core_index": "0",
-        "core_port_index": "4",
+        "core_index": "1",
+        "core_port_index": "26",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet16": {
+    "str-sonic-lc05|ASIC0|Ethernet104": {
         "system_port_id": 98,
         "switch_id": 16,
-        "core_index": "0",
-        "core_port_index": "5",
+        "core_index": "1",
+        "core_port_index": "27",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet20": {
+    "str-sonic-lc05|ASIC0|Ethernet108": {
         "system_port_id": 99,
         "switch_id": 16,
-        "core_index": "0",
-        "core_port_index": "6",
+        "core_index": "1",
+        "core_port_index": "28",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet24": {
+    "str-sonic-lc05|ASIC0|Ethernet112": {
         "system_port_id": 100,
         "switch_id": 16,
-        "core_index": "0",
-        "core_port_index": "7",
+        "core_index": "1",
+        "core_port_index": "29",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet28": {
+    "str-sonic-lc05|ASIC0|Ethernet116": {
         "system_port_id": 101,
         "switch_id": 16,
-        "core_index": "0",
-        "core_port_index": "8",
+        "core_index": "1",
+        "core_port_index": "30",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet32": {
+    "str-sonic-lc05|ASIC0|Ethernet12": {
         "system_port_id": 102,
         "switch_id": 16,
         "core_index": "0",
-        "core_port_index": "9",
+        "core_port_index": "4",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet36": {
+    "str-sonic-lc05|ASIC0|Ethernet120": {
         "system_port_id": 103,
         "switch_id": 16,
-        "core_index": "0",
-        "core_port_index": "10",
+        "core_index": "1",
+        "core_port_index": "31",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet40": {
+    "str-sonic-lc05|ASIC0|Ethernet124": {
         "system_port_id": 104,
         "switch_id": 16,
-        "core_index": "0",
-        "core_port_index": "11",
+        "core_index": "1",
+        "core_port_index": "32",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet44": {
+    "str-sonic-lc05|ASIC0|Ethernet128": {
         "system_port_id": 105,
         "switch_id": 16,
-        "core_index": "0",
-        "core_port_index": "12",
+        "core_index": "1",
+        "core_port_index": "33",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet48": {
+    "str-sonic-lc05|ASIC0|Ethernet132": {
         "system_port_id": 106,
         "switch_id": 16,
-        "core_index": "0",
-        "core_port_index": "13",
+        "core_index": "1",
+        "core_port_index": "34",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet52": {
+    "str-sonic-lc05|ASIC0|Ethernet136": {
         "system_port_id": 107,
         "switch_id": 16,
-        "core_index": "0",
-        "core_port_index": "14",
+        "core_index": "1",
+        "core_port_index": "35",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet56": {
+    "str-sonic-lc05|ASIC0|Ethernet140": {
         "system_port_id": 108,
         "switch_id": 16,
-        "core_index": "0",
-        "core_port_index": "15",
+        "core_index": "1",
+        "core_port_index": "36",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet60": {
+    "str-sonic-lc05|ASIC0|Ethernet144": {
         "system_port_id": 109,
         "switch_id": 16,
-        "core_index": "0",
-        "core_port_index": "16",
+        "core_index": "1",
+        "core_port_index": "37",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet64": {
+    "str-sonic-lc05|ASIC0|Ethernet148": {
         "system_port_id": 110,
         "switch_id": 16,
-        "core_index": "0",
-        "core_port_index": "17",
+        "core_index": "1",
+        "core_port_index": "38",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet68": {
+    "str-sonic-lc05|ASIC0|Ethernet152": {
         "system_port_id": 111,
         "switch_id": 16,
-        "core_index": "0",
-        "core_port_index": "18",
+        "core_index": "1",
+        "core_port_index": "39",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet72": {
+    "str-sonic-lc05|ASIC0|Ethernet156": {
         "system_port_id": 112,
         "switch_id": 16,
-        "core_index": "0",
-        "core_port_index": "19",
+        "core_index": "1",
+        "core_port_index": "40",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet76": {
+    "str-sonic-lc05|ASIC0|Ethernet16": {
         "system_port_id": 113,
         "switch_id": 16,
         "core_index": "0",
-        "core_port_index": "20",
+        "core_port_index": "5",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet80": {
+    "str-sonic-lc05|ASIC0|Ethernet160": {
         "system_port_id": 114,
         "switch_id": 16,
-        "core_index": "0",
-        "core_port_index": "21",
+        "core_index": "1",
+        "core_port_index": "41",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet84": {
+    "str-sonic-lc05|ASIC0|Ethernet164": {
         "system_port_id": 115,
         "switch_id": 16,
-        "core_index": "0",
-        "core_port_index": "22",
+        "core_index": "1",
+        "core_port_index": "42",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet88": {
+    "str-sonic-lc05|ASIC0|Ethernet168": {
         "system_port_id": 116,
         "switch_id": 16,
-        "core_index": "0",
-        "core_port_index": "23",
+        "core_index": "1",
+        "core_port_index": "43",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet92": {
+    "str-sonic-lc05|ASIC0|Ethernet172": {
         "system_port_id": 117,
         "switch_id": 16,
-        "core_index": "0",
-        "core_port_index": "24",
+        "core_index": "1",
+        "core_port_index": "44",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet96": {
+    "str-sonic-lc05|ASIC0|Ethernet176": {
         "system_port_id": 118,
         "switch_id": 16,
         "core_index": "1",
-        "core_port_index": "25",
+        "core_port_index": "45",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet100": {
+    "str-sonic-lc05|ASIC0|Ethernet180": {
         "system_port_id": 119,
         "switch_id": 16,
         "core_index": "1",
-        "core_port_index": "26",
+        "core_port_index": "46",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet104": {
+    "str-sonic-lc05|ASIC0|Ethernet184": {
         "system_port_id": 120,
         "switch_id": 16,
         "core_index": "1",
-        "core_port_index": "27",
+        "core_port_index": "47",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet108": {
+    "str-sonic-lc05|ASIC0|Ethernet188": {
         "system_port_id": 121,
         "switch_id": 16,
         "core_index": "1",
-        "core_port_index": "28",
+        "core_port_index": "48",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet112": {
+    "str-sonic-lc05|ASIC0|Ethernet20": {
         "system_port_id": 122,
         "switch_id": 16,
-        "core_index": "1",
-        "core_port_index": "29",
+        "core_index": "0",
+        "core_port_index": "6",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet116": {
+    "str-sonic-lc05|ASIC0|Ethernet24": {
         "system_port_id": 123,
         "switch_id": 16,
-        "core_index": "1",
-        "core_port_index": "30",
+        "core_index": "0",
+        "core_port_index": "7",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet120": {
+    "str-sonic-lc05|ASIC0|Ethernet28": {
         "system_port_id": 124,
         "switch_id": 16,
-        "core_index": "1",
-        "core_port_index": "31",
+        "core_index": "0",
+        "core_port_index": "8",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet124": {
+    "str-sonic-lc05|ASIC0|Ethernet32": {
         "system_port_id": 125,
         "switch_id": 16,
-        "core_index": "1",
-        "core_port_index": "32",
+        "core_index": "0",
+        "core_port_index": "9",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet128": {
+    "str-sonic-lc05|ASIC0|Ethernet36": {
         "system_port_id": 126,
         "switch_id": 16,
-        "core_index": "1",
-        "core_port_index": "33",
+        "core_index": "0",
+        "core_port_index": "10",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet132": {
+    "str-sonic-lc05|ASIC0|Ethernet4": {
         "system_port_id": 127,
         "switch_id": 16,
-        "core_index": "1",
-        "core_port_index": "34",
+        "core_index": "0",
+        "core_port_index": "2",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet136": {
+    "str-sonic-lc05|ASIC0|Ethernet40": {
         "system_port_id": 128,
         "switch_id": 16,
-        "core_index": "1",
-        "core_port_index": "35",
+        "core_index": "0",
+        "core_port_index": "11",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet140": {
+    "str-sonic-lc05|ASIC0|Ethernet44": {
         "system_port_id": 129,
         "switch_id": 16,
-        "core_index": "1",
-        "core_port_index": "36",
+        "core_index": "0",
+        "core_port_index": "12",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet144": {
+    "str-sonic-lc05|ASIC0|Ethernet48": {
         "system_port_id": 130,
         "switch_id": 16,
-        "core_index": "1",
-        "core_port_index": "37",
+        "core_index": "0",
+        "core_port_index": "13",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet148": {
+    "str-sonic-lc05|ASIC0|Ethernet52": {
         "system_port_id": 131,
         "switch_id": 16,
-        "core_index": "1",
-        "core_port_index": "38",
+        "core_index": "0",
+        "core_port_index": "14",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet152": {
+    "str-sonic-lc05|ASIC0|Ethernet56": {
         "system_port_id": 132,
         "switch_id": 16,
-        "core_index": "1",
-        "core_port_index": "39",
+        "core_index": "0",
+        "core_port_index": "15",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet156": {
+    "str-sonic-lc05|ASIC0|Ethernet60": {
         "system_port_id": 133,
         "switch_id": 16,
-        "core_index": "1",
-        "core_port_index": "40",
+        "core_index": "0",
+        "core_port_index": "16",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet160": {
+    "str-sonic-lc05|ASIC0|Ethernet64": {
         "system_port_id": 134,
         "switch_id": 16,
-        "core_index": "1",
-        "core_port_index": "41",
+        "core_index": "0",
+        "core_port_index": "17",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet164": {
+    "str-sonic-lc05|ASIC0|Ethernet68": {
         "system_port_id": 135,
         "switch_id": 16,
-        "core_index": "1",
-        "core_port_index": "42",
+        "core_index": "0",
+        "core_port_index": "18",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet168": {
+    "str-sonic-lc05|ASIC0|Ethernet72": {
         "system_port_id": 136,
         "switch_id": 16,
-        "core_index": "1",
-        "core_port_index": "43",
+        "core_index": "0",
+        "core_port_index": "19",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet172": {
+    "str-sonic-lc05|ASIC0|Ethernet76": {
         "system_port_id": 137,
         "switch_id": 16,
-        "core_index": "1",
-        "core_port_index": "44",
+        "core_index": "0",
+        "core_port_index": "20",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet176": {
+    "str-sonic-lc05|ASIC0|Ethernet8": {
         "system_port_id": 138,
         "switch_id": 16,
-        "core_index": "1",
-        "core_port_index": "45",
+        "core_index": "0",
+        "core_port_index": "3",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet180": {
+    "str-sonic-lc05|ASIC0|Ethernet80": {
         "system_port_id": 139,
         "switch_id": 16,
-        "core_index": "1",
-        "core_port_index": "46",
+        "core_index": "0",
+        "core_port_index": "21",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet184": {
+    "str-sonic-lc05|ASIC0|Ethernet84": {
         "system_port_id": 140,
         "switch_id": 16,
-        "core_index": "1",
-        "core_port_index": "47",
+        "core_index": "0",
+        "core_port_index": "22",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet188": {
+    "str-sonic-lc05|ASIC0|Ethernet88": {
         "system_port_id": 141,
         "switch_id": 16,
-        "core_index": "1",
-        "core_port_index": "48",
+        "core_index": "0",
+        "core_port_index": "23",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|cpu0": {
+    "str-sonic-lc05|ASIC0|Ethernet92": {
         "system_port_id": 142,
         "switch_id": 16,
-        "core_index": 0,
-        "core_port_index": 0,
-        "speed": "10000",
+        "core_index": "0",
+        "core_port_index": "24",
+        "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet-Rec0": {
+    "str-sonic-lc05|ASIC0|Ethernet96": {
         "system_port_id": 143,
         "switch_id": 16,
-        "core_index": "0",
-        "core_port_index": "49",
-        "speed": "400000",
+        "core_index": "1",
+        "core_port_index": "25",
+        "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc05|ASIC0|Ethernet-IB0": {
+    "str-sonic-lc05|ASIC0|cpu0": {
         "system_port_id": 144,
         "switch_id": 16,
-        "core_index": "1",
-        "core_port_index": "50",
-        "speed": "400000",
+        "core_index": 0,
+        "core_port_index": 0,
+        "speed": "10000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet0": {
+    "str-sonic-lc06|ASIC0|Ethernet-IB0": {
         "system_port_id": 145,
         "switch_id": 20,
-        "core_index": "0",
-        "core_port_index": "1",
-        "speed": "100000",
+        "core_index": "1",
+        "core_port_index": "50",
+        "speed": "400000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet4": {
+    "str-sonic-lc06|ASIC0|Ethernet-Rec0": {
         "system_port_id": 146,
         "switch_id": 20,
         "core_index": "0",
-        "core_port_index": "2",
-        "speed": "100000",
+        "core_port_index": "49",
+        "speed": "400000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet8": {
+    "str-sonic-lc06|ASIC0|Ethernet0": {
         "system_port_id": 147,
         "switch_id": 20,
         "core_index": "0",
-        "core_port_index": "3",
+        "core_port_index": "1",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet12": {
+    "str-sonic-lc06|ASIC0|Ethernet100": {
         "system_port_id": 148,
         "switch_id": 20,
-        "core_index": "0",
-        "core_port_index": "4",
+        "core_index": "1",
+        "core_port_index": "26",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet16": {
+    "str-sonic-lc06|ASIC0|Ethernet104": {
         "system_port_id": 149,
         "switch_id": 20,
-        "core_index": "0",
-        "core_port_index": "5",
+        "core_index": "1",
+        "core_port_index": "27",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet20": {
+    "str-sonic-lc06|ASIC0|Ethernet108": {
         "system_port_id": 150,
         "switch_id": 20,
-        "core_index": "0",
-        "core_port_index": "6",
+        "core_index": "1",
+        "core_port_index": "28",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet24": {
+    "str-sonic-lc06|ASIC0|Ethernet112": {
         "system_port_id": 151,
         "switch_id": 20,
-        "core_index": "0",
-        "core_port_index": "7",
+        "core_index": "1",
+        "core_port_index": "29",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet28": {
+    "str-sonic-lc06|ASIC0|Ethernet116": {
         "system_port_id": 152,
         "switch_id": 20,
-        "core_index": "0",
-        "core_port_index": "8",
+        "core_index": "1",
+        "core_port_index": "30",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet32": {
+    "str-sonic-lc06|ASIC0|Ethernet12": {
         "system_port_id": 153,
         "switch_id": 20,
         "core_index": "0",
-        "core_port_index": "9",
+        "core_port_index": "4",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet36": {
+    "str-sonic-lc06|ASIC0|Ethernet120": {
         "system_port_id": 154,
         "switch_id": 20,
-        "core_index": "0",
-        "core_port_index": "10",
+        "core_index": "1",
+        "core_port_index": "31",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet40": {
+    "str-sonic-lc06|ASIC0|Ethernet124": {
         "system_port_id": 155,
         "switch_id": 20,
-        "core_index": "0",
-        "core_port_index": "11",
+        "core_index": "1",
+        "core_port_index": "32",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet44": {
+    "str-sonic-lc06|ASIC0|Ethernet128": {
         "system_port_id": 156,
         "switch_id": 20,
-        "core_index": "0",
-        "core_port_index": "12",
+        "core_index": "1",
+        "core_port_index": "33",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet48": {
+    "str-sonic-lc06|ASIC0|Ethernet132": {
         "system_port_id": 157,
         "switch_id": 20,
-        "core_index": "0",
-        "core_port_index": "13",
+        "core_index": "1",
+        "core_port_index": "34",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet52": {
+    "str-sonic-lc06|ASIC0|Ethernet136": {
         "system_port_id": 158,
         "switch_id": 20,
-        "core_index": "0",
-        "core_port_index": "14",
+        "core_index": "1",
+        "core_port_index": "35",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet56": {
+    "str-sonic-lc06|ASIC0|Ethernet140": {
         "system_port_id": 159,
         "switch_id": 20,
-        "core_index": "0",
-        "core_port_index": "15",
+        "core_index": "1",
+        "core_port_index": "36",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet60": {
+    "str-sonic-lc06|ASIC0|Ethernet144": {
         "system_port_id": 160,
         "switch_id": 20,
-        "core_index": "0",
-        "core_port_index": "16",
+        "core_index": "1",
+        "core_port_index": "37",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet64": {
+    "str-sonic-lc06|ASIC0|Ethernet148": {
         "system_port_id": 161,
         "switch_id": 20,
-        "core_index": "0",
-        "core_port_index": "17",
+        "core_index": "1",
+        "core_port_index": "38",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet68": {
+    "str-sonic-lc06|ASIC0|Ethernet152": {
         "system_port_id": 162,
         "switch_id": 20,
-        "core_index": "0",
-        "core_port_index": "18",
+        "core_index": "1",
+        "core_port_index": "39",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet72": {
+    "str-sonic-lc06|ASIC0|Ethernet156": {
         "system_port_id": 163,
         "switch_id": 20,
-        "core_index": "0",
-        "core_port_index": "19",
+        "core_index": "1",
+        "core_port_index": "40",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet76": {
+    "str-sonic-lc06|ASIC0|Ethernet16": {
         "system_port_id": 164,
         "switch_id": 20,
         "core_index": "0",
-        "core_port_index": "20",
+        "core_port_index": "5",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet80": {
+    "str-sonic-lc06|ASIC0|Ethernet160": {
         "system_port_id": 165,
         "switch_id": 20,
-        "core_index": "0",
-        "core_port_index": "21",
+        "core_index": "1",
+        "core_port_index": "41",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet84": {
+    "str-sonic-lc06|ASIC0|Ethernet164": {
         "system_port_id": 166,
         "switch_id": 20,
-        "core_index": "0",
-        "core_port_index": "22",
+        "core_index": "1",
+        "core_port_index": "42",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet88": {
+    "str-sonic-lc06|ASIC0|Ethernet168": {
         "system_port_id": 167,
         "switch_id": 20,
-        "core_index": "0",
-        "core_port_index": "23",
+        "core_index": "1",
+        "core_port_index": "43",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet92": {
+    "str-sonic-lc06|ASIC0|Ethernet172": {
         "system_port_id": 168,
         "switch_id": 20,
-        "core_index": "0",
-        "core_port_index": "24",
+        "core_index": "1",
+        "core_port_index": "44",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet96": {
+    "str-sonic-lc06|ASIC0|Ethernet176": {
         "system_port_id": 169,
         "switch_id": 20,
         "core_index": "1",
-        "core_port_index": "25",
+        "core_port_index": "45",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet100": {
+    "str-sonic-lc06|ASIC0|Ethernet180": {
         "system_port_id": 170,
         "switch_id": 20,
         "core_index": "1",
-        "core_port_index": "26",
+        "core_port_index": "46",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet104": {
+    "str-sonic-lc06|ASIC0|Ethernet184": {
         "system_port_id": 171,
         "switch_id": 20,
         "core_index": "1",
-        "core_port_index": "27",
+        "core_port_index": "47",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet108": {
+    "str-sonic-lc06|ASIC0|Ethernet188": {
         "system_port_id": 172,
         "switch_id": 20,
         "core_index": "1",
-        "core_port_index": "28",
+        "core_port_index": "48",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet112": {
+    "str-sonic-lc06|ASIC0|Ethernet20": {
         "system_port_id": 173,
         "switch_id": 20,
-        "core_index": "1",
-        "core_port_index": "29",
+        "core_index": "0",
+        "core_port_index": "6",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet116": {
+    "str-sonic-lc06|ASIC0|Ethernet24": {
         "system_port_id": 174,
         "switch_id": 20,
-        "core_index": "1",
-        "core_port_index": "30",
+        "core_index": "0",
+        "core_port_index": "7",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet120": {
+    "str-sonic-lc06|ASIC0|Ethernet28": {
         "system_port_id": 175,
         "switch_id": 20,
-        "core_index": "1",
-        "core_port_index": "31",
+        "core_index": "0",
+        "core_port_index": "8",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet124": {
+    "str-sonic-lc06|ASIC0|Ethernet32": {
         "system_port_id": 176,
         "switch_id": 20,
-        "core_index": "1",
-        "core_port_index": "32",
+        "core_index": "0",
+        "core_port_index": "9",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet128": {
+    "str-sonic-lc06|ASIC0|Ethernet36": {
         "system_port_id": 177,
         "switch_id": 20,
-        "core_index": "1",
-        "core_port_index": "33",
+        "core_index": "0",
+        "core_port_index": "10",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet132": {
+    "str-sonic-lc06|ASIC0|Ethernet4": {
         "system_port_id": 178,
         "switch_id": 20,
-        "core_index": "1",
-        "core_port_index": "34",
+        "core_index": "0",
+        "core_port_index": "2",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet136": {
+    "str-sonic-lc06|ASIC0|Ethernet40": {
         "system_port_id": 179,
         "switch_id": 20,
-        "core_index": "1",
-        "core_port_index": "35",
+        "core_index": "0",
+        "core_port_index": "11",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet140": {
+    "str-sonic-lc06|ASIC0|Ethernet44": {
         "system_port_id": 180,
         "switch_id": 20,
-        "core_index": "1",
-        "core_port_index": "36",
+        "core_index": "0",
+        "core_port_index": "12",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet144": {
+    "str-sonic-lc06|ASIC0|Ethernet48": {
         "system_port_id": 181,
         "switch_id": 20,
-        "core_index": "1",
-        "core_port_index": "37",
+        "core_index": "0",
+        "core_port_index": "13",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet148": {
+    "str-sonic-lc06|ASIC0|Ethernet52": {
         "system_port_id": 182,
         "switch_id": 20,
-        "core_index": "1",
-        "core_port_index": "38",
+        "core_index": "0",
+        "core_port_index": "14",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet152": {
+    "str-sonic-lc06|ASIC0|Ethernet56": {
         "system_port_id": 183,
         "switch_id": 20,
-        "core_index": "1",
-        "core_port_index": "39",
+        "core_index": "0",
+        "core_port_index": "15",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet156": {
+    "str-sonic-lc06|ASIC0|Ethernet60": {
         "system_port_id": 184,
         "switch_id": 20,
-        "core_index": "1",
-        "core_port_index": "40",
+        "core_index": "0",
+        "core_port_index": "16",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet160": {
+    "str-sonic-lc06|ASIC0|Ethernet64": {
         "system_port_id": 185,
         "switch_id": 20,
-        "core_index": "1",
-        "core_port_index": "41",
+        "core_index": "0",
+        "core_port_index": "17",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet164": {
+    "str-sonic-lc06|ASIC0|Ethernet68": {
         "system_port_id": 186,
         "switch_id": 20,
-        "core_index": "1",
-        "core_port_index": "42",
+        "core_index": "0",
+        "core_port_index": "18",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet168": {
+    "str-sonic-lc06|ASIC0|Ethernet72": {
         "system_port_id": 187,
         "switch_id": 20,
-        "core_index": "1",
-        "core_port_index": "43",
+        "core_index": "0",
+        "core_port_index": "19",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet172": {
+    "str-sonic-lc06|ASIC0|Ethernet76": {
         "system_port_id": 188,
         "switch_id": 20,
-        "core_index": "1",
-        "core_port_index": "44",
+        "core_index": "0",
+        "core_port_index": "20",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet176": {
+    "str-sonic-lc06|ASIC0|Ethernet8": {
         "system_port_id": 189,
         "switch_id": 20,
-        "core_index": "1",
-        "core_port_index": "45",
+        "core_index": "0",
+        "core_port_index": "3",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet180": {
+    "str-sonic-lc06|ASIC0|Ethernet80": {
         "system_port_id": 190,
         "switch_id": 20,
-        "core_index": "1",
-        "core_port_index": "46",
+        "core_index": "0",
+        "core_port_index": "21",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet184": {
+    "str-sonic-lc06|ASIC0|Ethernet84": {
         "system_port_id": 191,
         "switch_id": 20,
-        "core_index": "1",
-        "core_port_index": "47",
+        "core_index": "0",
+        "core_port_index": "22",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet188": {
+    "str-sonic-lc06|ASIC0|Ethernet88": {
         "system_port_id": 192,
         "switch_id": 20,
-        "core_index": "1",
-        "core_port_index": "48",
+        "core_index": "0",
+        "core_port_index": "23",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|cpu0": {
+    "str-sonic-lc06|ASIC0|Ethernet92": {
         "system_port_id": 193,
         "switch_id": 20,
-        "core_index": 0,
-        "core_port_index": 0,
-        "speed": "10000",
+        "core_index": "0",
+        "core_port_index": "24",
+        "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet-Rec0": {
+    "str-sonic-lc06|ASIC0|Ethernet96": {
         "system_port_id": 194,
         "switch_id": 20,
-        "core_index": "0",
-        "core_port_index": "49",
-        "speed": "400000",
+        "core_index": "1",
+        "core_port_index": "25",
+        "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc06|ASIC0|Ethernet-IB0": {
+    "str-sonic-lc06|ASIC0|cpu0": {
         "system_port_id": 195,
         "switch_id": 20,
-        "core_index": "1",
-        "core_port_index": "50",
-        "speed": "400000",
+        "core_index": 0,
+        "core_port_index": 0,
+        "speed": "10000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet0": {
+    "str-sonic-lc07|ASIC0|Ethernet-IB0": {
         "system_port_id": 196,
         "switch_id": 24,
-        "core_index": "0",
-        "core_port_index": "1",
-        "speed": "100000",
+        "core_index": "1",
+        "core_port_index": "50",
+        "speed": "400000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet4": {
+    "str-sonic-lc07|ASIC0|Ethernet-Rec0": {
         "system_port_id": 197,
         "switch_id": 24,
         "core_index": "0",
-        "core_port_index": "2",
-        "speed": "100000",
+        "core_port_index": "49",
+        "speed": "400000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet8": {
+    "str-sonic-lc07|ASIC0|Ethernet0": {
         "system_port_id": 198,
         "switch_id": 24,
         "core_index": "0",
-        "core_port_index": "3",
+        "core_port_index": "1",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet12": {
+    "str-sonic-lc07|ASIC0|Ethernet100": {
         "system_port_id": 199,
         "switch_id": 24,
-        "core_index": "0",
-        "core_port_index": "4",
+        "core_index": "1",
+        "core_port_index": "26",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet16": {
+    "str-sonic-lc07|ASIC0|Ethernet104": {
         "system_port_id": 200,
         "switch_id": 24,
-        "core_index": "0",
-        "core_port_index": "5",
+        "core_index": "1",
+        "core_port_index": "27",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet20": {
+    "str-sonic-lc07|ASIC0|Ethernet108": {
         "system_port_id": 201,
         "switch_id": 24,
-        "core_index": "0",
-        "core_port_index": "6",
+        "core_index": "1",
+        "core_port_index": "28",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet24": {
+    "str-sonic-lc07|ASIC0|Ethernet112": {
         "system_port_id": 202,
         "switch_id": 24,
-        "core_index": "0",
-        "core_port_index": "7",
+        "core_index": "1",
+        "core_port_index": "29",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet28": {
+    "str-sonic-lc07|ASIC0|Ethernet116": {
         "system_port_id": 203,
         "switch_id": 24,
-        "core_index": "0",
-        "core_port_index": "8",
+        "core_index": "1",
+        "core_port_index": "30",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet32": {
+    "str-sonic-lc07|ASIC0|Ethernet12": {
         "system_port_id": 204,
         "switch_id": 24,
         "core_index": "0",
-        "core_port_index": "9",
+        "core_port_index": "4",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet36": {
+    "str-sonic-lc07|ASIC0|Ethernet120": {
         "system_port_id": 205,
         "switch_id": 24,
-        "core_index": "0",
-        "core_port_index": "10",
+        "core_index": "1",
+        "core_port_index": "31",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet40": {
+    "str-sonic-lc07|ASIC0|Ethernet124": {
         "system_port_id": 206,
         "switch_id": 24,
-        "core_index": "0",
-        "core_port_index": "11",
+        "core_index": "1",
+        "core_port_index": "32",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet44": {
+    "str-sonic-lc07|ASIC0|Ethernet128": {
         "system_port_id": 207,
         "switch_id": 24,
-        "core_index": "0",
-        "core_port_index": "12",
+        "core_index": "1",
+        "core_port_index": "33",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet48": {
+    "str-sonic-lc07|ASIC0|Ethernet132": {
         "system_port_id": 208,
         "switch_id": 24,
-        "core_index": "0",
-        "core_port_index": "13",
+        "core_index": "1",
+        "core_port_index": "34",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet52": {
+    "str-sonic-lc07|ASIC0|Ethernet136": {
         "system_port_id": 209,
         "switch_id": 24,
-        "core_index": "0",
-        "core_port_index": "14",
+        "core_index": "1",
+        "core_port_index": "35",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet56": {
+    "str-sonic-lc07|ASIC0|Ethernet140": {
         "system_port_id": 210,
         "switch_id": 24,
-        "core_index": "0",
-        "core_port_index": "15",
+        "core_index": "1",
+        "core_port_index": "36",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet60": {
+    "str-sonic-lc07|ASIC0|Ethernet144": {
         "system_port_id": 211,
         "switch_id": 24,
-        "core_index": "0",
-        "core_port_index": "16",
+        "core_index": "1",
+        "core_port_index": "37",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet64": {
+    "str-sonic-lc07|ASIC0|Ethernet148": {
         "system_port_id": 212,
         "switch_id": 24,
-        "core_index": "0",
-        "core_port_index": "17",
+        "core_index": "1",
+        "core_port_index": "38",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet68": {
+    "str-sonic-lc07|ASIC0|Ethernet152": {
         "system_port_id": 213,
         "switch_id": 24,
-        "core_index": "0",
-        "core_port_index": "18",
+        "core_index": "1",
+        "core_port_index": "39",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet72": {
+    "str-sonic-lc07|ASIC0|Ethernet156": {
         "system_port_id": 214,
         "switch_id": 24,
-        "core_index": "0",
-        "core_port_index": "19",
+        "core_index": "1",
+        "core_port_index": "40",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet76": {
+    "str-sonic-lc07|ASIC0|Ethernet16": {
         "system_port_id": 215,
         "switch_id": 24,
         "core_index": "0",
-        "core_port_index": "20",
+        "core_port_index": "5",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet80": {
+    "str-sonic-lc07|ASIC0|Ethernet160": {
         "system_port_id": 216,
         "switch_id": 24,
-        "core_index": "0",
-        "core_port_index": "21",
+        "core_index": "1",
+        "core_port_index": "41",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet84": {
+    "str-sonic-lc07|ASIC0|Ethernet164": {
         "system_port_id": 217,
         "switch_id": 24,
-        "core_index": "0",
-        "core_port_index": "22",
+        "core_index": "1",
+        "core_port_index": "42",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet88": {
+    "str-sonic-lc07|ASIC0|Ethernet168": {
         "system_port_id": 218,
         "switch_id": 24,
-        "core_index": "0",
-        "core_port_index": "23",
+        "core_index": "1",
+        "core_port_index": "43",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet92": {
+    "str-sonic-lc07|ASIC0|Ethernet172": {
         "system_port_id": 219,
         "switch_id": 24,
-        "core_index": "0",
-        "core_port_index": "24",
+        "core_index": "1",
+        "core_port_index": "44",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet96": {
+    "str-sonic-lc07|ASIC0|Ethernet176": {
         "system_port_id": 220,
         "switch_id": 24,
         "core_index": "1",
-        "core_port_index": "25",
+        "core_port_index": "45",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet100": {
+    "str-sonic-lc07|ASIC0|Ethernet180": {
         "system_port_id": 221,
         "switch_id": 24,
         "core_index": "1",
-        "core_port_index": "26",
+        "core_port_index": "46",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet104": {
+    "str-sonic-lc07|ASIC0|Ethernet184": {
         "system_port_id": 222,
         "switch_id": 24,
         "core_index": "1",
-        "core_port_index": "27",
+        "core_port_index": "47",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet108": {
+    "str-sonic-lc07|ASIC0|Ethernet188": {
         "system_port_id": 223,
         "switch_id": 24,
         "core_index": "1",
-        "core_port_index": "28",
+        "core_port_index": "48",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet112": {
+    "str-sonic-lc07|ASIC0|Ethernet20": {
         "system_port_id": 224,
         "switch_id": 24,
-        "core_index": "1",
-        "core_port_index": "29",
+        "core_index": "0",
+        "core_port_index": "6",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet116": {
+    "str-sonic-lc07|ASIC0|Ethernet24": {
         "system_port_id": 225,
         "switch_id": 24,
-        "core_index": "1",
-        "core_port_index": "30",
+        "core_index": "0",
+        "core_port_index": "7",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet120": {
+    "str-sonic-lc07|ASIC0|Ethernet28": {
         "system_port_id": 226,
         "switch_id": 24,
-        "core_index": "1",
-        "core_port_index": "31",
+        "core_index": "0",
+        "core_port_index": "8",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet124": {
+    "str-sonic-lc07|ASIC0|Ethernet32": {
         "system_port_id": 227,
         "switch_id": 24,
-        "core_index": "1",
-        "core_port_index": "32",
+        "core_index": "0",
+        "core_port_index": "9",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet128": {
+    "str-sonic-lc07|ASIC0|Ethernet36": {
         "system_port_id": 228,
         "switch_id": 24,
-        "core_index": "1",
-        "core_port_index": "33",
+        "core_index": "0",
+        "core_port_index": "10",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet132": {
+    "str-sonic-lc07|ASIC0|Ethernet4": {
         "system_port_id": 229,
         "switch_id": 24,
-        "core_index": "1",
-        "core_port_index": "34",
+        "core_index": "0",
+        "core_port_index": "2",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet136": {
+    "str-sonic-lc07|ASIC0|Ethernet40": {
         "system_port_id": 230,
         "switch_id": 24,
-        "core_index": "1",
-        "core_port_index": "35",
+        "core_index": "0",
+        "core_port_index": "11",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet140": {
+    "str-sonic-lc07|ASIC0|Ethernet44": {
         "system_port_id": 231,
         "switch_id": 24,
-        "core_index": "1",
-        "core_port_index": "36",
+        "core_index": "0",
+        "core_port_index": "12",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet144": {
+    "str-sonic-lc07|ASIC0|Ethernet48": {
         "system_port_id": 232,
         "switch_id": 24,
-        "core_index": "1",
-        "core_port_index": "37",
+        "core_index": "0",
+        "core_port_index": "13",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet148": {
+    "str-sonic-lc07|ASIC0|Ethernet52": {
         "system_port_id": 233,
         "switch_id": 24,
-        "core_index": "1",
-        "core_port_index": "38",
+        "core_index": "0",
+        "core_port_index": "14",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet152": {
+    "str-sonic-lc07|ASIC0|Ethernet56": {
         "system_port_id": 234,
         "switch_id": 24,
-        "core_index": "1",
-        "core_port_index": "39",
+        "core_index": "0",
+        "core_port_index": "15",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet156": {
+    "str-sonic-lc07|ASIC0|Ethernet60": {
         "system_port_id": 235,
         "switch_id": 24,
-        "core_index": "1",
-        "core_port_index": "40",
+        "core_index": "0",
+        "core_port_index": "16",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet160": {
+    "str-sonic-lc07|ASIC0|Ethernet64": {
         "system_port_id": 236,
         "switch_id": 24,
-        "core_index": "1",
-        "core_port_index": "41",
+        "core_index": "0",
+        "core_port_index": "17",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet164": {
+    "str-sonic-lc07|ASIC0|Ethernet68": {
         "system_port_id": 237,
         "switch_id": 24,
-        "core_index": "1",
-        "core_port_index": "42",
+        "core_index": "0",
+        "core_port_index": "18",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet168": {
+    "str-sonic-lc07|ASIC0|Ethernet72": {
         "system_port_id": 238,
         "switch_id": 24,
-        "core_index": "1",
-        "core_port_index": "43",
+        "core_index": "0",
+        "core_port_index": "19",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet172": {
+    "str-sonic-lc07|ASIC0|Ethernet76": {
         "system_port_id": 239,
         "switch_id": 24,
-        "core_index": "1",
-        "core_port_index": "44",
+        "core_index": "0",
+        "core_port_index": "20",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet176": {
+    "str-sonic-lc07|ASIC0|Ethernet8": {
         "system_port_id": 240,
         "switch_id": 24,
-        "core_index": "1",
-        "core_port_index": "45",
+        "core_index": "0",
+        "core_port_index": "3",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet180": {
+    "str-sonic-lc07|ASIC0|Ethernet80": {
         "system_port_id": 241,
         "switch_id": 24,
-        "core_index": "1",
-        "core_port_index": "46",
+        "core_index": "0",
+        "core_port_index": "21",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet184": {
+    "str-sonic-lc07|ASIC0|Ethernet84": {
         "system_port_id": 242,
         "switch_id": 24,
-        "core_index": "1",
-        "core_port_index": "47",
+        "core_index": "0",
+        "core_port_index": "22",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet188": {
+    "str-sonic-lc07|ASIC0|Ethernet88": {
         "system_port_id": 243,
         "switch_id": 24,
-        "core_index": "1",
-        "core_port_index": "48",
+        "core_index": "0",
+        "core_port_index": "23",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|cpu0": {
+    "str-sonic-lc07|ASIC0|Ethernet92": {
         "system_port_id": 244,
         "switch_id": 24,
-        "core_index": 0,
-        "core_port_index": 0,
-        "speed": "10000",
+        "core_index": "0",
+        "core_port_index": "24",
+        "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet-Rec0": {
+    "str-sonic-lc07|ASIC0|Ethernet96": {
         "system_port_id": 245,
         "switch_id": 24,
-        "core_index": "0",
-        "core_port_index": "49",
-        "speed": "400000",
+        "core_index": "1",
+        "core_port_index": "25",
+        "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc07|ASIC0|Ethernet-IB0": {
+    "str-sonic-lc07|ASIC0|cpu0": {
         "system_port_id": 246,
         "switch_id": 24,
-        "core_index": "1",
-        "core_port_index": "50",
-        "speed": "400000",
+        "core_index": 0,
+        "core_port_index": 0,
+        "speed": "10000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet0": {
+    "str-sonic-lc08|ASIC0|Ethernet-IB0": {
         "system_port_id": 247,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "1",
-        "speed": "100000",
+        "core_index": "1",
+        "core_port_index": "50",
+        "speed": "400000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet4": {
+    "str-sonic-lc08|ASIC0|Ethernet-Rec0": {
         "system_port_id": 248,
         "switch_id": 28,
         "core_index": "0",
-        "core_port_index": "2",
-        "speed": "100000",
+        "core_port_index": "49",
+        "speed": "400000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet8": {
+    "str-sonic-lc08|ASIC0|Ethernet0": {
         "system_port_id": 249,
         "switch_id": 28,
         "core_index": "0",
-        "core_port_index": "3",
+        "core_port_index": "1",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet12": {
+    "str-sonic-lc08|ASIC0|Ethernet100": {
         "system_port_id": 250,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "4",
+        "core_index": "1",
+        "core_port_index": "26",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet16": {
+    "str-sonic-lc08|ASIC0|Ethernet104": {
         "system_port_id": 251,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "5",
+        "core_index": "1",
+        "core_port_index": "27",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet20": {
+    "str-sonic-lc08|ASIC0|Ethernet108": {
         "system_port_id": 252,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "6",
+        "core_index": "1",
+        "core_port_index": "28",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet24": {
+    "str-sonic-lc08|ASIC0|Ethernet112": {
         "system_port_id": 253,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "7",
+        "core_index": "1",
+        "core_port_index": "29",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet28": {
+    "str-sonic-lc08|ASIC0|Ethernet116": {
         "system_port_id": 254,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "8",
+        "core_index": "1",
+        "core_port_index": "30",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet32": {
+    "str-sonic-lc08|ASIC0|Ethernet12": {
         "system_port_id": 255,
         "switch_id": 28,
         "core_index": "0",
-        "core_port_index": "9",
+        "core_port_index": "4",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet36": {
+    "str-sonic-lc08|ASIC0|Ethernet120": {
         "system_port_id": 256,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "10",
+        "core_index": "1",
+        "core_port_index": "31",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet40": {
+    "str-sonic-lc08|ASIC0|Ethernet124": {
         "system_port_id": 257,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "11",
+        "core_index": "1",
+        "core_port_index": "32",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet44": {
+    "str-sonic-lc08|ASIC0|Ethernet128": {
         "system_port_id": 258,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "12",
+        "core_index": "1",
+        "core_port_index": "33",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet48": {
+    "str-sonic-lc08|ASIC0|Ethernet132": {
         "system_port_id": 259,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "13",
+        "core_index": "1",
+        "core_port_index": "34",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet52": {
+    "str-sonic-lc08|ASIC0|Ethernet136": {
         "system_port_id": 260,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "14",
+        "core_index": "1",
+        "core_port_index": "35",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet56": {
+    "str-sonic-lc08|ASIC0|Ethernet140": {
         "system_port_id": 261,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "15",
+        "core_index": "1",
+        "core_port_index": "36",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet60": {
+    "str-sonic-lc08|ASIC0|Ethernet144": {
         "system_port_id": 262,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "16",
+        "core_index": "1",
+        "core_port_index": "37",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet64": {
+    "str-sonic-lc08|ASIC0|Ethernet148": {
         "system_port_id": 263,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "17",
+        "core_index": "1",
+        "core_port_index": "38",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet68": {
+    "str-sonic-lc08|ASIC0|Ethernet152": {
         "system_port_id": 264,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "18",
+        "core_index": "1",
+        "core_port_index": "39",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet72": {
+    "str-sonic-lc08|ASIC0|Ethernet156": {
         "system_port_id": 265,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "19",
+        "core_index": "1",
+        "core_port_index": "40",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet76": {
+    "str-sonic-lc08|ASIC0|Ethernet16": {
         "system_port_id": 266,
         "switch_id": 28,
         "core_index": "0",
-        "core_port_index": "20",
+        "core_port_index": "5",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet80": {
+    "str-sonic-lc08|ASIC0|Ethernet160": {
         "system_port_id": 267,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "21",
+        "core_index": "1",
+        "core_port_index": "41",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet84": {
+    "str-sonic-lc08|ASIC0|Ethernet164": {
         "system_port_id": 268,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "22",
+        "core_index": "1",
+        "core_port_index": "42",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet88": {
+    "str-sonic-lc08|ASIC0|Ethernet168": {
         "system_port_id": 269,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "23",
+        "core_index": "1",
+        "core_port_index": "43",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet92": {
+    "str-sonic-lc08|ASIC0|Ethernet172": {
         "system_port_id": 270,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "24",
+        "core_index": "1",
+        "core_port_index": "44",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet96": {
+    "str-sonic-lc08|ASIC0|Ethernet176": {
         "system_port_id": 271,
         "switch_id": 28,
         "core_index": "1",
-        "core_port_index": "25",
+        "core_port_index": "45",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet100": {
+    "str-sonic-lc08|ASIC0|Ethernet180": {
         "system_port_id": 272,
         "switch_id": 28,
         "core_index": "1",
-        "core_port_index": "26",
+        "core_port_index": "46",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet104": {
+    "str-sonic-lc08|ASIC0|Ethernet184": {
         "system_port_id": 273,
         "switch_id": 28,
         "core_index": "1",
-        "core_port_index": "27",
+        "core_port_index": "47",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet108": {
+    "str-sonic-lc08|ASIC0|Ethernet188": {
         "system_port_id": 274,
         "switch_id": 28,
         "core_index": "1",
-        "core_port_index": "28",
+        "core_port_index": "48",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet112": {
+    "str-sonic-lc08|ASIC0|Ethernet20": {
         "system_port_id": 275,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "29",
+        "core_index": "0",
+        "core_port_index": "6",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet116": {
+    "str-sonic-lc08|ASIC0|Ethernet24": {
         "system_port_id": 276,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "30",
+        "core_index": "0",
+        "core_port_index": "7",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet120": {
+    "str-sonic-lc08|ASIC0|Ethernet28": {
         "system_port_id": 277,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "31",
+        "core_index": "0",
+        "core_port_index": "8",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet124": {
+    "str-sonic-lc08|ASIC0|Ethernet32": {
         "system_port_id": 278,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "32",
+        "core_index": "0",
+        "core_port_index": "9",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet128": {
+    "str-sonic-lc08|ASIC0|Ethernet36": {
         "system_port_id": 279,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "33",
+        "core_index": "0",
+        "core_port_index": "10",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet132": {
+    "str-sonic-lc08|ASIC0|Ethernet4": {
         "system_port_id": 280,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "34",
+        "core_index": "0",
+        "core_port_index": "2",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet136": {
+    "str-sonic-lc08|ASIC0|Ethernet40": {
         "system_port_id": 281,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "35",
+        "core_index": "0",
+        "core_port_index": "11",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet140": {
+    "str-sonic-lc08|ASIC0|Ethernet44": {
         "system_port_id": 282,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "36",
+        "core_index": "0",
+        "core_port_index": "12",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet144": {
+    "str-sonic-lc08|ASIC0|Ethernet48": {
         "system_port_id": 283,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "37",
+        "core_index": "0",
+        "core_port_index": "13",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet148": {
+    "str-sonic-lc08|ASIC0|Ethernet52": {
         "system_port_id": 284,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "38",
+        "core_index": "0",
+        "core_port_index": "14",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet152": {
+    "str-sonic-lc08|ASIC0|Ethernet56": {
         "system_port_id": 285,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "39",
+        "core_index": "0",
+        "core_port_index": "15",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet156": {
+    "str-sonic-lc08|ASIC0|Ethernet60": {
         "system_port_id": 286,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "40",
+        "core_index": "0",
+        "core_port_index": "16",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet160": {
+    "str-sonic-lc08|ASIC0|Ethernet64": {
         "system_port_id": 287,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "41",
+        "core_index": "0",
+        "core_port_index": "17",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet164": {
+    "str-sonic-lc08|ASIC0|Ethernet68": {
         "system_port_id": 288,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "42",
+        "core_index": "0",
+        "core_port_index": "18",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet168": {
+    "str-sonic-lc08|ASIC0|Ethernet72": {
         "system_port_id": 289,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "43",
+        "core_index": "0",
+        "core_port_index": "19",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet172": {
+    "str-sonic-lc08|ASIC0|Ethernet76": {
         "system_port_id": 290,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "44",
+        "core_index": "0",
+        "core_port_index": "20",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet176": {
+    "str-sonic-lc08|ASIC0|Ethernet8": {
         "system_port_id": 291,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "45",
+        "core_index": "0",
+        "core_port_index": "3",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet180": {
+    "str-sonic-lc08|ASIC0|Ethernet80": {
         "system_port_id": 292,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "46",
+        "core_index": "0",
+        "core_port_index": "21",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet184": {
+    "str-sonic-lc08|ASIC0|Ethernet84": {
         "system_port_id": 293,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "47",
+        "core_index": "0",
+        "core_port_index": "22",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet188": {
+    "str-sonic-lc08|ASIC0|Ethernet88": {
         "system_port_id": 294,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "48",
+        "core_index": "0",
+        "core_port_index": "23",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|cpu0": {
+    "str-sonic-lc08|ASIC0|Ethernet92": {
         "system_port_id": 295,
         "switch_id": 28,
-        "core_index": 0,
-        "core_port_index": 0,
-        "speed": "10000",
+        "core_index": "0",
+        "core_port_index": "24",
+        "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet-Rec0": {
+    "str-sonic-lc08|ASIC0|Ethernet96": {
         "system_port_id": 296,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "49",
-        "speed": "400000",
+        "core_index": "1",
+        "core_port_index": "25",
+        "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet-IB0": {
+    "str-sonic-lc08|ASIC0|cpu0": {
         "system_port_id": 297,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "50",
-        "speed": "400000",
+        "core_index": 0,
+        "core_port_index": 0,
+        "speed": "10000",
         "num_voq": "8"
     },
     "str-sonic-lc09|ASIC0|Ethernet0": {
@@ -2383,788 +2383,788 @@
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet4": {
+    "str-sonic-lc09|ASIC0|Ethernet100": {
         "system_port_id": 299,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "2",
+        "core_index": "1",
+        "core_port_index": "26",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet8": {
+    "str-sonic-lc09|ASIC0|Ethernet104": {
         "system_port_id": 300,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "3",
+        "core_index": "1",
+        "core_port_index": "27",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet12": {
+    "str-sonic-lc09|ASIC0|Ethernet108": {
         "system_port_id": 301,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "4",
+        "core_index": "1",
+        "core_port_index": "28",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet16": {
+    "str-sonic-lc09|ASIC0|Ethernet112": {
         "system_port_id": 302,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "5",
+        "core_index": "1",
+        "core_port_index": "29",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet20": {
+    "str-sonic-lc09|ASIC0|Ethernet116": {
         "system_port_id": 303,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "6",
+        "core_index": "1",
+        "core_port_index": "30",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet24": {
+    "str-sonic-lc09|ASIC0|Ethernet12": {
         "system_port_id": 304,
         "switch_id": 32,
         "core_index": "0",
-        "core_port_index": "7",
+        "core_port_index": "4",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet28": {
+    "str-sonic-lc09|ASIC0|Ethernet120": {
         "system_port_id": 305,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "8",
+        "core_index": "1",
+        "core_port_index": "31",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet32": {
+    "str-sonic-lc09|ASIC0|Ethernet124": {
         "system_port_id": 306,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "9",
+        "core_index": "1",
+        "core_port_index": "32",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet36": {
+    "str-sonic-lc09|ASIC0|Ethernet128": {
         "system_port_id": 307,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "10",
+        "core_index": "1",
+        "core_port_index": "33",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet40": {
+    "str-sonic-lc09|ASIC0|Ethernet132": {
         "system_port_id": 308,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "11",
+        "core_index": "1",
+        "core_port_index": "34",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet44": {
+    "str-sonic-lc09|ASIC0|Ethernet136": {
         "system_port_id": 309,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "12",
+        "core_index": "1",
+        "core_port_index": "35",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet48": {
+    "str-sonic-lc09|ASIC0|Ethernet140": {
         "system_port_id": 310,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "13",
+        "core_index": "1",
+        "core_port_index": "36",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet52": {
+    "str-sonic-lc09|ASIC0|Ethernet144": {
         "system_port_id": 311,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "14",
+        "core_index": "1",
+        "core_port_index": "37",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet56": {
+    "str-sonic-lc09|ASIC0|Ethernet148": {
         "system_port_id": 312,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "15",
+        "core_index": "1",
+        "core_port_index": "38",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet60": {
+    "str-sonic-lc09|ASIC0|Ethernet152": {
         "system_port_id": 313,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "16",
+        "core_index": "1",
+        "core_port_index": "39",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet64": {
+    "str-sonic-lc09|ASIC0|Ethernet156": {
         "system_port_id": 314,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "17",
+        "core_index": "1",
+        "core_port_index": "40",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet68": {
+    "str-sonic-lc09|ASIC0|Ethernet16": {
         "system_port_id": 315,
         "switch_id": 32,
         "core_index": "0",
-        "core_port_index": "18",
+        "core_port_index": "5",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet72": {
+    "str-sonic-lc09|ASIC0|Ethernet160": {
         "system_port_id": 316,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "19",
+        "core_index": "1",
+        "core_port_index": "41",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet76": {
+    "str-sonic-lc09|ASIC0|Ethernet164": {
         "system_port_id": 317,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "20",
+        "core_index": "1",
+        "core_port_index": "42",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet80": {
+    "str-sonic-lc09|ASIC0|Ethernet168": {
         "system_port_id": 318,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "21",
+        "core_index": "1",
+        "core_port_index": "43",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet84": {
+    "str-sonic-lc09|ASIC0|Ethernet172": {
         "system_port_id": 319,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "22",
+        "core_index": "1",
+        "core_port_index": "44",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet88": {
+    "str-sonic-lc09|ASIC0|Ethernet176": {
         "system_port_id": 320,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "23",
+        "core_index": "1",
+        "core_port_index": "45",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet92": {
+    "str-sonic-lc09|ASIC0|Ethernet180": {
         "system_port_id": 321,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "24",
+        "core_index": "1",
+        "core_port_index": "46",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet96": {
+    "str-sonic-lc09|ASIC0|Ethernet184": {
         "system_port_id": 322,
         "switch_id": 32,
         "core_index": "1",
-        "core_port_index": "25",
+        "core_port_index": "47",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet100": {
+    "str-sonic-lc09|ASIC0|Ethernet188": {
         "system_port_id": 323,
         "switch_id": 32,
         "core_index": "1",
-        "core_port_index": "26",
+        "core_port_index": "48",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet104": {
+    "str-sonic-lc09|ASIC0|Ethernet20": {
         "system_port_id": 324,
         "switch_id": 32,
-        "core_index": "1",
-        "core_port_index": "27",
+        "core_index": "0",
+        "core_port_index": "6",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet108": {
+    "str-sonic-lc09|ASIC0|Ethernet24": {
         "system_port_id": 325,
         "switch_id": 32,
-        "core_index": "1",
-        "core_port_index": "28",
+        "core_index": "0",
+        "core_port_index": "7",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet112": {
+    "str-sonic-lc09|ASIC0|Ethernet28": {
         "system_port_id": 326,
         "switch_id": 32,
-        "core_index": "1",
-        "core_port_index": "29",
+        "core_index": "0",
+        "core_port_index": "8",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet116": {
+    "str-sonic-lc09|ASIC0|Ethernet32": {
         "system_port_id": 327,
         "switch_id": 32,
-        "core_index": "1",
-        "core_port_index": "30",
+        "core_index": "0",
+        "core_port_index": "9",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet120": {
+    "str-sonic-lc09|ASIC0|Ethernet36": {
         "system_port_id": 328,
         "switch_id": 32,
-        "core_index": "1",
-        "core_port_index": "31",
+        "core_index": "0",
+        "core_port_index": "10",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet124": {
+    "str-sonic-lc09|ASIC0|Ethernet4": {
         "system_port_id": 329,
         "switch_id": 32,
-        "core_index": "1",
-        "core_port_index": "32",
+        "core_index": "0",
+        "core_port_index": "2",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet128": {
+    "str-sonic-lc09|ASIC0|Ethernet40": {
         "system_port_id": 330,
         "switch_id": 32,
-        "core_index": "1",
-        "core_port_index": "33",
+        "core_index": "0",
+        "core_port_index": "11",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet132": {
+    "str-sonic-lc09|ASIC0|Ethernet44": {
         "system_port_id": 331,
         "switch_id": 32,
-        "core_index": "1",
-        "core_port_index": "34",
+        "core_index": "0",
+        "core_port_index": "12",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet136": {
+    "str-sonic-lc09|ASIC0|Ethernet48": {
         "system_port_id": 332,
         "switch_id": 32,
-        "core_index": "1",
-        "core_port_index": "35",
+        "core_index": "0",
+        "core_port_index": "13",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet140": {
+    "str-sonic-lc09|ASIC0|Ethernet52": {
         "system_port_id": 333,
         "switch_id": 32,
-        "core_index": "1",
-        "core_port_index": "36",
+        "core_index": "0",
+        "core_port_index": "14",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet144": {
+    "str-sonic-lc09|ASIC0|Ethernet56": {
         "system_port_id": 334,
         "switch_id": 32,
-        "core_index": "1",
-        "core_port_index": "37",
+        "core_index": "0",
+        "core_port_index": "15",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet148": {
+    "str-sonic-lc09|ASIC0|Ethernet60": {
         "system_port_id": 335,
         "switch_id": 32,
-        "core_index": "1",
-        "core_port_index": "38",
+        "core_index": "0",
+        "core_port_index": "16",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet152": {
+    "str-sonic-lc09|ASIC0|Ethernet64": {
         "system_port_id": 336,
         "switch_id": 32,
-        "core_index": "1",
-        "core_port_index": "39",
+        "core_index": "0",
+        "core_port_index": "17",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet156": {
+    "str-sonic-lc09|ASIC0|Ethernet68": {
         "system_port_id": 337,
         "switch_id": 32,
-        "core_index": "1",
-        "core_port_index": "40",
+        "core_index": "0",
+        "core_port_index": "18",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet160": {
+    "str-sonic-lc09|ASIC0|Ethernet72": {
         "system_port_id": 338,
         "switch_id": 32,
-        "core_index": "1",
-        "core_port_index": "41",
+        "core_index": "0",
+        "core_port_index": "19",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet164": {
+    "str-sonic-lc09|ASIC0|Ethernet76": {
         "system_port_id": 339,
         "switch_id": 32,
-        "core_index": "1",
-        "core_port_index": "42",
+        "core_index": "0",
+        "core_port_index": "20",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet168": {
+    "str-sonic-lc09|ASIC0|Ethernet8": {
         "system_port_id": 340,
         "switch_id": 32,
-        "core_index": "1",
-        "core_port_index": "43",
+        "core_index": "0",
+        "core_port_index": "3",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet172": {
+    "str-sonic-lc09|ASIC0|Ethernet80": {
         "system_port_id": 341,
         "switch_id": 32,
-        "core_index": "1",
-        "core_port_index": "44",
+        "core_index": "0",
+        "core_port_index": "21",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet176": {
+    "str-sonic-lc09|ASIC0|Ethernet84": {
         "system_port_id": 342,
         "switch_id": 32,
-        "core_index": "1",
-        "core_port_index": "45",
+        "core_index": "0",
+        "core_port_index": "22",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet180": {
+    "str-sonic-lc09|ASIC0|Ethernet88": {
         "system_port_id": 343,
         "switch_id": 32,
-        "core_index": "1",
-        "core_port_index": "46",
+        "core_index": "0",
+        "core_port_index": "23",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet184": {
+    "str-sonic-lc09|ASIC0|Ethernet92": {
         "system_port_id": 344,
         "switch_id": 32,
-        "core_index": "1",
-        "core_port_index": "47",
+        "core_index": "0",
+        "core_port_index": "24",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet188": {
+    "str-sonic-lc09|ASIC0|Ethernet96": {
         "system_port_id": 345,
         "switch_id": 32,
         "core_index": "1",
-        "core_port_index": "48",
+        "core_port_index": "25",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet0": {
+    "str-sonic-lc10|ASIC0|Ethernet-IB0": {
         "system_port_id": 346,
         "switch_id": 36,
-        "core_index": "0",
-        "core_port_index": "1",
-        "speed": "100000",
+        "core_index": "1",
+        "core_port_index": "50",
+        "speed": "400000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet4": {
+    "str-sonic-lc10|ASIC0|Ethernet-Rec0": {
         "system_port_id": 347,
         "switch_id": 36,
         "core_index": "0",
-        "core_port_index": "2",
-        "speed": "100000",
+        "core_port_index": "49",
+        "speed": "400000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet8": {
+    "str-sonic-lc10|ASIC0|Ethernet0": {
         "system_port_id": 348,
         "switch_id": 36,
         "core_index": "0",
-        "core_port_index": "3",
+        "core_port_index": "1",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet12": {
+    "str-sonic-lc10|ASIC0|Ethernet100": {
         "system_port_id": 349,
         "switch_id": 36,
-        "core_index": "0",
-        "core_port_index": "4",
+        "core_index": "1",
+        "core_port_index": "26",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet16": {
+    "str-sonic-lc10|ASIC0|Ethernet104": {
         "system_port_id": 350,
         "switch_id": 36,
-        "core_index": "0",
-        "core_port_index": "5",
+        "core_index": "1",
+        "core_port_index": "27",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet20": {
+    "str-sonic-lc10|ASIC0|Ethernet108": {
         "system_port_id": 351,
         "switch_id": 36,
-        "core_index": "0",
-        "core_port_index": "6",
+        "core_index": "1",
+        "core_port_index": "28",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet24": {
+    "str-sonic-lc10|ASIC0|Ethernet112": {
         "system_port_id": 352,
         "switch_id": 36,
-        "core_index": "0",
-        "core_port_index": "7",
+        "core_index": "1",
+        "core_port_index": "29",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet28": {
+    "str-sonic-lc10|ASIC0|Ethernet116": {
         "system_port_id": 353,
         "switch_id": 36,
-        "core_index": "0",
-        "core_port_index": "8",
+        "core_index": "1",
+        "core_port_index": "30",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet32": {
+    "str-sonic-lc10|ASIC0|Ethernet12": {
         "system_port_id": 354,
         "switch_id": 36,
         "core_index": "0",
-        "core_port_index": "9",
+        "core_port_index": "4",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet36": {
+    "str-sonic-lc10|ASIC0|Ethernet120": {
         "system_port_id": 355,
         "switch_id": 36,
-        "core_index": "0",
-        "core_port_index": "10",
+        "core_index": "1",
+        "core_port_index": "31",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet40": {
+    "str-sonic-lc10|ASIC0|Ethernet124": {
         "system_port_id": 356,
         "switch_id": 36,
-        "core_index": "0",
-        "core_port_index": "11",
+        "core_index": "1",
+        "core_port_index": "32",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet44": {
+    "str-sonic-lc10|ASIC0|Ethernet128": {
         "system_port_id": 357,
         "switch_id": 36,
-        "core_index": "0",
-        "core_port_index": "12",
+        "core_index": "1",
+        "core_port_index": "33",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet48": {
+    "str-sonic-lc10|ASIC0|Ethernet132": {
         "system_port_id": 358,
         "switch_id": 36,
-        "core_index": "0",
-        "core_port_index": "13",
+        "core_index": "1",
+        "core_port_index": "34",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet52": {
+    "str-sonic-lc10|ASIC0|Ethernet136": {
         "system_port_id": 359,
         "switch_id": 36,
-        "core_index": "0",
-        "core_port_index": "14",
+        "core_index": "1",
+        "core_port_index": "35",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet56": {
+    "str-sonic-lc10|ASIC0|Ethernet140": {
         "system_port_id": 360,
         "switch_id": 36,
-        "core_index": "0",
-        "core_port_index": "15",
+        "core_index": "1",
+        "core_port_index": "36",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet60": {
+    "str-sonic-lc10|ASIC0|Ethernet144": {
         "system_port_id": 361,
         "switch_id": 36,
-        "core_index": "0",
-        "core_port_index": "16",
+        "core_index": "1",
+        "core_port_index": "37",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet64": {
+    "str-sonic-lc10|ASIC0|Ethernet148": {
         "system_port_id": 362,
         "switch_id": 36,
-        "core_index": "0",
-        "core_port_index": "17",
+        "core_index": "1",
+        "core_port_index": "38",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet68": {
+    "str-sonic-lc10|ASIC0|Ethernet152": {
         "system_port_id": 363,
         "switch_id": 36,
-        "core_index": "0",
-        "core_port_index": "18",
+        "core_index": "1",
+        "core_port_index": "39",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet72": {
+    "str-sonic-lc10|ASIC0|Ethernet156": {
         "system_port_id": 364,
         "switch_id": 36,
-        "core_index": "0",
-        "core_port_index": "19",
+        "core_index": "1",
+        "core_port_index": "40",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet76": {
+    "str-sonic-lc10|ASIC0|Ethernet16": {
         "system_port_id": 365,
         "switch_id": 36,
         "core_index": "0",
-        "core_port_index": "20",
+        "core_port_index": "5",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet80": {
+    "str-sonic-lc10|ASIC0|Ethernet160": {
         "system_port_id": 366,
         "switch_id": 36,
-        "core_index": "0",
-        "core_port_index": "21",
+        "core_index": "1",
+        "core_port_index": "41",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet84": {
+    "str-sonic-lc10|ASIC0|Ethernet164": {
         "system_port_id": 367,
         "switch_id": 36,
-        "core_index": "0",
-        "core_port_index": "22",
+        "core_index": "1",
+        "core_port_index": "42",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet88": {
+    "str-sonic-lc10|ASIC0|Ethernet168": {
         "system_port_id": 368,
         "switch_id": 36,
-        "core_index": "0",
-        "core_port_index": "23",
+        "core_index": "1",
+        "core_port_index": "43",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet92": {
+    "str-sonic-lc10|ASIC0|Ethernet172": {
         "system_port_id": 369,
         "switch_id": 36,
-        "core_index": "0",
-        "core_port_index": "24",
+        "core_index": "1",
+        "core_port_index": "44",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet96": {
+    "str-sonic-lc10|ASIC0|Ethernet176": {
         "system_port_id": 370,
         "switch_id": 36,
         "core_index": "1",
-        "core_port_index": "25",
+        "core_port_index": "45",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet100": {
+    "str-sonic-lc10|ASIC0|Ethernet180": {
         "system_port_id": 371,
         "switch_id": 36,
         "core_index": "1",
-        "core_port_index": "26",
+        "core_port_index": "46",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet104": {
+    "str-sonic-lc10|ASIC0|Ethernet184": {
         "system_port_id": 372,
         "switch_id": 36,
         "core_index": "1",
-        "core_port_index": "27",
+        "core_port_index": "47",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet108": {
+    "str-sonic-lc10|ASIC0|Ethernet188": {
         "system_port_id": 373,
         "switch_id": 36,
         "core_index": "1",
-        "core_port_index": "28",
+        "core_port_index": "48",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet112": {
+    "str-sonic-lc10|ASIC0|Ethernet20": {
         "system_port_id": 374,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "29",
+        "core_index": "0",
+        "core_port_index": "6",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet116": {
+    "str-sonic-lc10|ASIC0|Ethernet24": {
         "system_port_id": 375,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "30",
+        "core_index": "0",
+        "core_port_index": "7",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet120": {
+    "str-sonic-lc10|ASIC0|Ethernet28": {
         "system_port_id": 376,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "31",
+        "core_index": "0",
+        "core_port_index": "8",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet124": {
+    "str-sonic-lc10|ASIC0|Ethernet32": {
         "system_port_id": 377,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "32",
+        "core_index": "0",
+        "core_port_index": "9",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet128": {
+    "str-sonic-lc10|ASIC0|Ethernet36": {
         "system_port_id": 378,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "33",
+        "core_index": "0",
+        "core_port_index": "10",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet132": {
+    "str-sonic-lc10|ASIC0|Ethernet4": {
         "system_port_id": 379,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "34",
+        "core_index": "0",
+        "core_port_index": "2",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet136": {
+    "str-sonic-lc10|ASIC0|Ethernet40": {
         "system_port_id": 380,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "35",
+        "core_index": "0",
+        "core_port_index": "11",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet140": {
+    "str-sonic-lc10|ASIC0|Ethernet44": {
         "system_port_id": 381,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "36",
+        "core_index": "0",
+        "core_port_index": "12",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet144": {
+    "str-sonic-lc10|ASIC0|Ethernet48": {
         "system_port_id": 382,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "37",
+        "core_index": "0",
+        "core_port_index": "13",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet148": {
+    "str-sonic-lc10|ASIC0|Ethernet52": {
         "system_port_id": 383,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "38",
+        "core_index": "0",
+        "core_port_index": "14",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet152": {
+    "str-sonic-lc10|ASIC0|Ethernet56": {
         "system_port_id": 384,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "39",
+        "core_index": "0",
+        "core_port_index": "15",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet156": {
+    "str-sonic-lc10|ASIC0|Ethernet60": {
         "system_port_id": 385,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "40",
+        "core_index": "0",
+        "core_port_index": "16",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet160": {
+    "str-sonic-lc10|ASIC0|Ethernet64": {
         "system_port_id": 386,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "41",
+        "core_index": "0",
+        "core_port_index": "17",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet164": {
+    "str-sonic-lc10|ASIC0|Ethernet68": {
         "system_port_id": 387,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "42",
+        "core_index": "0",
+        "core_port_index": "18",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet168": {
+    "str-sonic-lc10|ASIC0|Ethernet72": {
         "system_port_id": 388,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "43",
+        "core_index": "0",
+        "core_port_index": "19",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet172": {
+    "str-sonic-lc10|ASIC0|Ethernet76": {
         "system_port_id": 389,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "44",
+        "core_index": "0",
+        "core_port_index": "20",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet176": {
+    "str-sonic-lc10|ASIC0|Ethernet8": {
         "system_port_id": 390,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "45",
+        "core_index": "0",
+        "core_port_index": "3",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet180": {
+    "str-sonic-lc10|ASIC0|Ethernet80": {
         "system_port_id": 391,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "46",
+        "core_index": "0",
+        "core_port_index": "21",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet184": {
+    "str-sonic-lc10|ASIC0|Ethernet84": {
         "system_port_id": 392,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "47",
+        "core_index": "0",
+        "core_port_index": "22",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet188": {
+    "str-sonic-lc10|ASIC0|Ethernet88": {
         "system_port_id": 393,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "48",
+        "core_index": "0",
+        "core_port_index": "23",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|cpu0": {
+    "str-sonic-lc10|ASIC0|Ethernet92": {
         "system_port_id": 394,
         "switch_id": 36,
-        "core_index": 0,
-        "core_port_index": 0,
-        "speed": "10000",
+        "core_index": "0",
+        "core_port_index": "24",
+        "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet-Rec0": {
+    "str-sonic-lc10|ASIC0|Ethernet96": {
         "system_port_id": 395,
         "switch_id": 36,
-        "core_index": "0",
-        "core_port_index": "49",
-        "speed": "400000",
+        "core_index": "1",
+        "core_port_index": "25",
+        "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet-IB0": {
+    "str-sonic-lc10|ASIC0|cpu0": {
         "system_port_id": 396,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "50",
-        "speed": "400000",
+        "core_index": 0,
+        "core_port_index": 0,
+        "speed": "10000",
         "num_voq": "8"
     }
 }

From 81f1bf4a7fed131d872938cf04c7bed3522b4986 Mon Sep 17 00:00:00 2001
From: Vivek <vivekreddykarri98@gmail.com>
Date: Thu, 3 Oct 2024 17:25:39 -0700
Subject: [PATCH 062/364] Replace straightforward sonic-cfggen calls with
 sonic-db-cli (#20232)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

### Why I did it

Fix https://github.com/sonic-net/sonic-buildimage/issues/20048

It is explained in ticket above, how sonic-cfggen calls in the hostname.sh, pcie-check.sh and banner-config and hogging the CPU and slightly delaying the start of swss

**pcie-check.sh**
redis-cli call is also replaced with sonic-db-cli since redis-cli is a wrapper around the actual redis-cli under database container
<img width="1113" alt="image" src="https://github.com/user-attachments/assets/bed9d055-3b9f-4f75-aabd-1e0335716396">

**swss start**
If the SKU has create_only_config_db_buffers.json set to true, the only config that's updated today is.
```
{
    "DEVICE_METADATA": {
        "localhost": {
            "create_only_config_db_buffers": "true"
        }
    }
}
```
We use sonic-cfggen which cause 1.5 sec delay in the start of swss container. Thus replace with sonic-db-cli. If a complex use case arises in future, this can be updated.
<img width="1483" alt="Screenshot 2024-09-16 at 12 45 05 PM" src="https://github.com/user-attachments/assets/ee3248b5-7623-42c4-9b50-81b114c71ae7">


### How I did it

#### How to verify it

**Note: Everything was tested on MSN2700 device, Intel Celeron CPU with 2 cores**

- 1.5 sec saved in the swss container start
<img width="1298" alt="image" src="https://github.com/user-attachments/assets/817739f1-26a2-41ad-89e4-1e76e31532ac">

- 1.6 sec saved in the start of swss service. Previously, it took almost 1.8 sec after config-setup is finished for the swss to start. After replacing the calls, it start almost 0.2 sec after config-setup is finished

In total, anywhere between 2.5 - 3.5 sec is saved
---
 files/build_templates/docker_image_ctl.j2        | 2 +-
 files/image_config/bannerconfig/banner-config.sh | 8 ++++----
 files/image_config/hostname/hostname-config.sh   | 4 ++--
 files/image_config/pcie-check/pcie-check.sh      | 6 +++---
 files/image_config/rsyslog/rsyslog-config.sh     | 2 +-
 5 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 87f801c1549c..732681818824 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -433,7 +433,7 @@ start() {
     if [ -d "$HWSKU_FOLDER" ]; then
         CREATE_ONLY_CONFIG_DB_BUFFERS_JSON="$HWSKU_FOLDER/create_only_config_db_buffers.json"
         if [ -f "$CREATE_ONLY_CONFIG_DB_BUFFERS_JSON" ]; then
-            $SONIC_CFGGEN -j $CREATE_ONLY_CONFIG_DB_BUFFERS_JSON --write-to-db
+            $SONIC_DB_CLI CONFIG_DB HSET 'DEVICE_METADATA|localhost' create_only_config_db_buffers true
         fi
     fi
     {%- endif %}
diff --git a/files/image_config/bannerconfig/banner-config.sh b/files/image_config/bannerconfig/banner-config.sh
index b81b342bf52f..5c605a034ea0 100755
--- a/files/image_config/bannerconfig/banner-config.sh
+++ b/files/image_config/bannerconfig/banner-config.sh
@@ -1,14 +1,14 @@
 #!/bin/bash -e
 
-STATE=$(sonic-cfggen -d -v 'BANNER_MESSAGE["global"]["state"]')
+STATE=$(sonic-db-cli CONFIG_DB HGET 'BANNER_MESSAGE|global' state)
 LOGIN=
 MOTD=
 LOGOUT=
 
 if [[ $STATE == "enabled" ]]; then
-    LOGIN=$(sonic-cfggen -d -v 'BANNER_MESSAGE["global"]["login"]')
-    MOTD=$(sonic-cfggen -d -v 'BANNER_MESSAGE["global"]["motd"]')
-    LOGOUT=$(sonic-cfggen -d -v 'BANNER_MESSAGE["global"]["logout"]')
+    LOGIN=$(sonic-db-cli CONFIG_DB HGET 'BANNER_MESSAGE|global' login)
+    MOTD=$(sonic-db-cli CONFIG_DB HGET 'BANNER_MESSAGE|global' motd)
+    LOGOUT=$(sonic-db-cli CONFIG_DB HGET 'BANNER_MESSAGE|global' logout)
 
     echo -e "$LOGIN" > /etc/issue.net
     echo -e "$LOGIN" > /etc/issue
diff --git a/files/image_config/hostname/hostname-config.sh b/files/image_config/hostname/hostname-config.sh
index 5f4bfede2097..91b0b7b32f91 100755
--- a/files/image_config/hostname/hostname-config.sh
+++ b/files/image_config/hostname/hostname-config.sh
@@ -1,7 +1,7 @@
 #!/bin/bash -e
 
-CURRENT_HOSTNAME=`hostname`
-HOSTNAME=`sonic-cfggen -d -v DEVICE_METADATA[\'localhost\'][\'hostname\']`
+CURRENT_HOSTNAME=$(hostname)
+HOSTNAME=$(sonic-db-cli CONFIG_DB HGET 'DEVICE_METADATA|localhost' hostname)
 
 if [ -z "$HOSTNAME" ] ; then
        echo "Missing hostname in the config file, setting to default 'sonic'"
diff --git a/files/image_config/pcie-check/pcie-check.sh b/files/image_config/pcie-check/pcie-check.sh
index 3d4184c8684c..d8558da82701 100755
--- a/files/image_config/pcie-check/pcie-check.sh
+++ b/files/image_config/pcie-check/pcie-check.sh
@@ -18,7 +18,7 @@ function debug()
 function check_and_rescan_pcie_devices()
 {
     PCIE_CHK_CMD='sudo pcieutil check | grep "$RESULTS"'
-    PLATFORM=$(sonic-cfggen -H -v DEVICE_METADATA.localhost.platform)
+    PLATFORM=$(sonic-db-cli CONFIG_DB HGET 'DEVICE_METADATA|localhost' platform)
 
     if [ ! -f /usr/share/sonic/device/$PLATFORM/pcie*.yaml ]; then
         debug "pcie.yaml does not exist! Can't check PCIe status!"
@@ -38,7 +38,7 @@ function check_and_rescan_pcie_devices()
         fi
 
         if [ "$(eval $PCIE_CHK_CMD)" = "$EXPECTED" ]; then
-            redis-cli -n 6 HSET $PCIE_STATUS_TABLE "status" "PASSED"
+            sonic-db-cli STATE_DB HSET $PCIE_STATUS_TABLE "status" "PASSED"
             debug "PCIe check passed"
             exit
         else
@@ -54,7 +54,7 @@ function check_and_rescan_pcie_devices()
 
      done
      debug "PCIe check failed"
-     redis-cli -n 6 HSET $PCIE_STATUS_TABLE "status" "FAILED"
+     sonic-db-cli STATE_DB HSET $PCIE_STATUS_TABLE "status" "FAILED"
 }
 
 check_and_rescan_pcie_devices
diff --git a/files/image_config/rsyslog/rsyslog-config.sh b/files/image_config/rsyslog/rsyslog-config.sh
index 5f28708216ed..9c2da9780112 100755
--- a/files/image_config/rsyslog/rsyslog-config.sh
+++ b/files/image_config/rsyslog/rsyslog-config.sh
@@ -1,6 +1,6 @@
 #!/bin/bash
 
-PLATFORM=`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform`
+PLATFORM=$(sonic-db-cli CONFIG_DB HGET 'DEVICE_METADATA|localhost' platform)
 
 # Parse the device specific asic conf file, if it exists
 ASIC_CONF=/usr/share/sonic/device/$PLATFORM/asic.conf

From 456671cae8addd845b8d8336cfbda8809cd5c8cc Mon Sep 17 00:00:00 2001
From: Arun LK <83708154+arunlk-dell@users.noreply.github.com>
Date: Sat, 5 Oct 2024 06:07:13 +0530
Subject: [PATCH 063/364] [Dell]: S5248F: Dynamic port breakout support
 (#20287)

Added Dynamic port breakout support for S5248F DellEMC platform

How I did it
Modified the default hwsku profile for DPB support and updated the platform.json file with breakout options.
---
 .../DellEMC-S5248f-P-25G/hwsku.json           | 172 ++++
 .../DellEMC-S5248f-P-25G/port_config.ini      |  14 +-
 .../td3-s5248f-25g.config.bcm                 | 102 +-
 .../default_sku                               |   3 +-
 .../platform.json                             | 912 ++++++++++++++++++
 5 files changed, 1164 insertions(+), 39 deletions(-)
 create mode 100644 device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/hwsku.json
 create mode 100644 device/dell/x86_64-dellemc_s5248f_c3538-r0/platform.json

diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/hwsku.json b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/hwsku.json
new file mode 100644
index 000000000000..777b426a0656
--- /dev/null
+++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/hwsku.json
@@ -0,0 +1,172 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet1": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet2": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet3": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet4": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet5": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet6": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet7": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet9": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet10": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet11": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet12": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet13": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet14": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet15": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet17": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet18": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet19": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet20": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet21": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet22": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet23": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet25": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet26": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet27": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet28": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet29": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet30": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet31": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet33": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet34": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet35": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet36": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet37": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet38": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet39": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet41": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet42": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet43": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet44": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet45": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet46": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet47": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x100G[40G]"
+        },
+        "Ethernet52": {
+            "default_brkout_mode": "1x100G[40G]"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x100G[40G]"
+        },
+        "Ethernet60": {
+            "default_brkout_mode": "1x100G[40G]"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x100G[40G]"
+        },
+        "Ethernet68": {
+            "default_brkout_mode": "1x100G[40G]"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x100G[40G]"
+        },
+        "Ethernet76": {
+            "default_brkout_mode": "1x100G[40G]"
+        }
+    }
+}
diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/port_config.ini b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/port_config.ini
index 3dc16e2eb9b9..1570a8ff26ea 100644
--- a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/port_config.ini
+++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/port_config.ini
@@ -48,10 +48,10 @@ Ethernet45      114                   twentyfiveGigE1/12/2    46       25000
 Ethernet46      115                   twentyfiveGigE1/12/3    47       25000
 Ethernet47      116                   twentyfiveGigE1/12/4    48       25000
 Ethernet48      121,122,123,124       hundredGigE1/49         49       100000
-Ethernet49      125,126,127,128       hundredGigE1/50         50       100000
-Ethernet50      69,70,71,72           hundredGigE1/51         51       100000
-Ethernet51      65,66,67,68           hundredGigE1/52         52       100000
-Ethernet52      1,2,3,4               hundredGigE1/53         53       100000
-Ethernet53      33,34,35,36           hundredGigE1/54         54       100000
-Ethernet54      5,6,7,8               hundredGigE1/55         55       100000
-Ethernet55      41,42,43,44           hundredGigE1/56         56       100000
+Ethernet52      125,126,127,128       hundredGigE1/50         50       100000
+Ethernet56      69,70,71,72           hundredGigE1/51         51       100000
+Ethernet60      65,66,67,68           hundredGigE1/52         52       100000
+Ethernet64      1,2,3,4               hundredGigE1/53         53       100000
+Ethernet68      33,34,35,36           hundredGigE1/54         54       100000
+Ethernet72      5,6,7,8               hundredGigE1/55         55       100000
+Ethernet76      41,42,43,44           hundredGigE1/56         56       100000
diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/td3-s5248f-25g.config.bcm b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/td3-s5248f-25g.config.bcm
index 028a04484a88..249e3789bf2b 100644
--- a/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/td3-s5248f-25g.config.bcm
+++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/DellEMC-S5248f-P-25G/td3-s5248f-25g.config.bcm
@@ -1,41 +1,56 @@
-sai_load_hw_config=/etc/bcm/flex/bcm56870_a0_premium_issu/b870.6.4.1/
 os=unix
-
 dpp_clock_ratio=2:3
 oversubscribe_mode=1
 core_clock_frequency=1525
+
 l2xmsg_mode=1
-pbmp_oversubscribe=0x7f878787f878787f9fe1e1e1fe1e1e1fe
-pbmp_xport_xe=0x7f878787f878787f9fe1e1e1fe1e1e1fe
-ifp_inports_support_enable=1
-port_flex_enable=1
-phy_an_c73=3
-l2xmsg_hostbuf_size=8192
+# need for mac learn scale
+l2xmsg_hostbuf_size=16384
 module_64ports=0
-tdma_intr_enable=1
-ipv6_lpm_128b_enable=1
-stat_if_parity_enable=1
-bcm_tunnel_term_compatible_mode=1
-table_dma_enable=1
-schan_intr_enable=0
-parity_enable=1
-parity_correction=1
-miim_intr_enable=1
+
+#Interrupts and Parity
 max_vp_lags=0
-tdma_intr_enable=1
+
+schan_intr_enable=0
 tdma_timeout_usec=5000000
-mmu_lossless=0
-pdma_descriptor_prefetch_enable=1
-pktdma_poll_mode_channel_bitmap=1
 
+#Default L3 profile
 l3_alpm_enable=2
 l3_alpm_ipv6_128b_bkt_rsvd=1
 l2_mem_entries=40960
 l3_mem_entries=40960
-l3_max_ecmp_mode=1
 
+#Tunnels
+bcm_tunnel_term_compatible_mode=1
+use_all_splithorizon_groups=1
+sai_tunnel_support=1
+
+sai_interface_type_auto_detect=0
+
+#RIOT Enable
+riot_enable=1
+riot_overlay_l3_intf_mem_size=8192
+riot_overlay_l3_egress_mem_size=32768
+l3_ecmp_levels=2
+riot_overlay_ecmp_resilient_hash_size=16384
+
+
+stable_size=0x6400000
+
+
+#New Additions
+pfc_deadlock_seq_control=1
+
+#Common configs from broadcom/x86_64-broadcom_common/x86_64-broadcom_b87/broadcom-sonic-td3.config.bcm 
 
-stable_size=0x5500000
+#Port and Phy Configs
+
+pbmp_oversubscribe=0x7f878787f878787f9fe1e1e1fe1e1e1fe
+pbmp_xport_xe=0x7f878787f878787f9fe1e1e1fe1e1e1fe
+oversubscribe_mixed_sister_25_50_enable=1
+ifp_inports_support_enable=1
+port_flex_enable=1
+phy_an_c73=3
 
 portmap_1.0=1:100
 portmap_5.0=5:100
@@ -342,15 +357,40 @@ dport_map_port_115=45
 dport_map_port_116=46
 dport_map_port_117=47
 dport_map_port_118=48
+#100G
 dport_map_port_123=49
-dport_map_port_127=50
-dport_map_port_71=51
-dport_map_port_67=52
-dport_map_port_1=53
-dport_map_port_33=54
-dport_map_port_5=55
-dport_map_port_41=56
+dport_map_port_124=50
+dport_map_port_125=51
+dport_map_port_126=52
+dport_map_port_127=53
+dport_map_port_128=54
+dport_map_port_129=55
+dport_map_port_130=56
+dport_map_port_71=57
+dport_map_port_72=58
+dport_map_port_73=59
+dport_map_port_74=60
+dport_map_port_67=61
+dport_map_port_68=62
+dport_map_port_69=63
+dport_map_port_70=64
+dport_map_port_1=65
+dport_map_port_2=66
+dport_map_port_3=67
+dport_map_port_4=68
+dport_map_port_33=69
+dport_map_port_34=70
+dport_map_port_35=71
+dport_map_port_36=72
+dport_map_port_5=73
+dport_map_port_6=74
+dport_map_port_7=75
+dport_map_port_8=76
+dport_map_port_41=77
+dport_map_port_42=78
+dport_map_port_43=79
+dport_map_port_44=80
 
-mmu_init_config="TD3-DELL-lossless"
 sai_preinit_cmd_file=/usr/share/sonic/hwsku/sai_preinit_cmd.soc
 
+fpem_mem_entries=32768
diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/default_sku b/device/dell/x86_64-dellemc_s5248f_c3538-r0/default_sku
index 618471d5629d..f5ca196ea4e2 100644
--- a/device/dell/x86_64-dellemc_s5248f_c3538-r0/default_sku
+++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/default_sku
@@ -1 +1,2 @@
-DellEMC-S5248f-P-25G t1
\ No newline at end of file
+DellEMC-S5248f-P-25G t1
+
diff --git a/device/dell/x86_64-dellemc_s5248f_c3538-r0/platform.json b/device/dell/x86_64-dellemc_s5248f_c3538-r0/platform.json
new file mode 100644
index 000000000000..64002194a2d3
--- /dev/null
+++ b/device/dell/x86_64-dellemc_s5248f_c3538-r0/platform.json
@@ -0,0 +1,912 @@
+{
+    "chassis": {
+        "name": "S5248F-ON",
+        "status_led": {
+            "controllable": true,
+            "colors": ["green", "flashing green", "yellow", "flashing yellow"]
+        },
+        "thermal_manager" : false,
+        "components": [
+            {
+                "name": "BIOS"
+            },
+            {
+                "name": "FPGA"
+            },
+            {
+                "name": "BMC"
+            },
+            {
+                "name": "System CPLD"
+            },
+            {
+                "name": "Slave CPLD 1"
+            },
+            {
+                "name": "Slave CPLD 2"
+            }
+        ],
+        "fans": [
+            {
+                "name": "FanTray1-Fan1",
+                "speed": {
+                    "controllable": false
+                },
+                "status_led": {
+                    "available": false
+                }
+            },
+            {
+                "name": "FanTray1-Fan2",
+                "speed": {
+                    "controllable": false
+                },
+                "status_led": {
+                    "available": false
+                }
+            },
+            {
+                "name": "FanTray2-Fan1",
+                "speed": {
+                    "controllable": false
+                },
+                "status_led": {
+                    "available": false
+                }
+            },
+            {
+                "name": "FanTray2-Fan2",
+                "speed": {
+                    "controllable": false
+                },
+                "status_led": {
+                    "available": false
+                }
+            },
+            {
+                "name": "FanTray3-Fan1",
+                "speed": {
+                    "controllable": false
+                },
+                "status_led": {
+                    "available": false
+                }
+            },
+            {
+                "name": "FanTray3-Fan2",
+                "speed": {
+                    "controllable": false
+                },
+                "status_led": {
+                    "available": false
+                }
+            },
+            {
+                "name": "FanTray4-Fan1",
+                "speed": {
+                    "controllable": false
+                },
+                "status_led": {
+                    "available": false
+                }
+            },
+            {
+                "name": "FanTray4-Fan2",
+                "speed": {
+                    "controllable": false
+                },
+                "status_led": {
+                    "available": false
+                }
+            }
+        ],
+        "fan_drawers":[
+            {
+                "name": "FanTray1",
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "FanTray1-Fan1",
+                        "speed": {
+                            "controllable": false
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "FanTray1-Fan2",
+                        "speed": {
+                            "controllable": false
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "FanTray2",
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "FanTray2-Fan1",
+                        "speed": {
+                            "controllable": false
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "FanTray2-Fan2",
+                        "speed": {
+                            "controllable": false
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "FanTray3",
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "FanTray3-Fan1",
+                        "speed": {
+                            "controllable": false
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "FanTray3-Fan2",
+                        "speed": {
+                            "controllable": false
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "FanTray4",
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "FanTray4-Fan1",
+                        "speed": {
+                            "controllable": false
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "FanTray4-Fan2",
+                        "speed": {
+                            "controllable": false
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "PSU1",
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "PSU1 Fan",
+                        "speed": {
+                            "controllable": false
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "PSU2",
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "PSU2 Fan",
+                        "speed": {
+                            "controllable": false
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "ASIC On-board",
+                "controllable": false,
+                "low-crit-threshold": false,
+                "minimum-recorded": false,
+                "maximum-recorded": false
+            },
+            {
+                "name": "CPU On-board",
+                "controllable": false,
+                "low-crit-threshold": false,
+                "minimum-recorded": false,
+                "maximum-recorded": false
+            },
+            {
+                "name": "Inlet Airflow Sensor",
+                "controllable": false,
+                "low-crit-threshold": false,
+                "high-threshold": false,
+                "high-crit-threshold": false,
+                "minimum-recorded": false,
+                "maximum-recorded": false
+            },
+            {
+                "name": "PSU1 Airflow Sensor",
+                "controllable": false,
+                "low-crit-threshold": false,
+                "high-threshold": false,
+                "high-crit-threshold": false,
+                "minimum-recorded": false,
+                "maximum-recorded": false
+            },
+            {
+                "name": "PSU2 Airflow Sensor",
+                "controllable": false,
+                "low-crit-threshold": false,
+                "high-threshold": false,
+                "high-crit-threshold": false,
+                "minimum-recorded": false,
+                "maximum-recorded": false
+            },
+            {
+                "name": "System Front Left",
+                "controllable": false,
+                "low-crit-threshold": false,
+                "minimum-recorded": false,
+                "maximum-recorded": false
+            },
+            {
+                "name": "System Front Middler",
+                "controllable": false,
+                "low-crit-threshold": false,
+                "high-threshold": false,
+                "high-crit-threshold": false,
+                "minimum-recorded": false,
+                "maximum-recorded": false
+            },
+            {
+                "name": "System Front Right",
+                "controllable": false,
+                "low-crit-threshold": false,
+                "high-threshold": false,
+                "high-crit-threshold": false,
+                "minimum-recorded": false,
+                "maximum-recorded": false
+            }
+        ],
+        "modules": [],
+        "sfps": [
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "SFP/SFP+/SFP28"
+            },
+            {
+                "name": "QSFP28"
+            },
+            {
+                "name": "QSFP28"
+            },
+            {
+                "name": "QSFP28"
+            },
+            {
+                "name": "QSFP28"
+            },
+            {
+                "name": "QSFP28"
+            },
+            {
+                "name": "QSFP28"
+            },
+            {
+                "name": "QSFP28"
+            },
+            {
+                "name": "QSFP28"
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index":"1",
+            "lanes":"49",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth1"
+            }
+        },
+        "Ethernet1": {
+            "index":"2",
+            "lanes":"50",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth2"
+            }
+        },
+        "Ethernet2": {
+            "index":"3",
+            "lanes":"51",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth3"
+            }
+        },
+        "Ethernet3": {
+            "index":"4",
+            "lanes":"52",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth4"
+            }
+        },
+        "Ethernet4": {
+            "index":"5",
+            "lanes":"57",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth5"
+            }
+        },
+        "Ethernet5": {
+            "index":"6",
+            "lanes":"58",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth6"
+            }
+        },
+        "Ethernet6": {
+            "index":"7",
+            "lanes":"59",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth7"
+            }
+        },
+        "Ethernet7": {
+            "index":"8",
+            "lanes":"60",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth8"
+            }
+        },
+        "Ethernet8": {
+            "index":"9",
+            "lanes":"61",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth9"
+            }
+        },
+        "Ethernet9": {
+            "index":"10",
+            "lanes":"62",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth10"
+            }
+        },
+        "Ethernet10": {
+            "index":"11",
+            "lanes":"63",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth11"
+            }
+        },
+        "Ethernet11": {
+            "index":"12",
+            "lanes":"64",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth12"
+            }
+        },
+        "Ethernet12": {
+            "index":"13",
+            "lanes":"77",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth13"
+            }
+        },
+        "Ethernet13": {
+            "index":"14",
+            "lanes":"78",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth14"
+            }
+        },
+        "Ethernet14": {
+            "index":"15",
+            "lanes":"79",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth15"
+            }
+        },
+        "Ethernet15": {
+            "index":"16",
+            "lanes":"80",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth16"
+            }
+        },
+        "Ethernet16": {
+            "index":"17",
+            "lanes":"85",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth17"
+            }
+        },
+        "Ethernet17": {
+            "index":"18",
+            "lanes":"86",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth18"
+            }
+        },
+        "Ethernet18": {
+            "index":"19",
+            "lanes":"87",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth19"
+            }
+        },
+        "Ethernet19": {
+            "index":"20",
+            "lanes":"88",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth20"
+            }
+        },
+        "Ethernet20": {
+            "index":"21",
+            "lanes":"93",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth21"
+            }
+        },
+        "Ethernet21": {
+            "index":"22",
+            "lanes":"94",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth22"
+            }
+        },
+        "Ethernet22": {
+            "index":"23",
+            "lanes":"95",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth23"
+            }
+        },
+        "Ethernet23": {
+            "index":"24",
+            "lanes":"96",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth24"
+            }
+        },
+        "Ethernet24": {
+            "index":"25",
+            "lanes":"13",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth25"
+            }
+        },
+        "Ethernet25": {
+            "index":"26",
+            "lanes":"14",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth26"
+            }
+        },
+        "Ethernet26": {
+            "index":"27",
+            "lanes":"15",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth27"
+            }
+        },
+        "Ethernet27": {
+            "index":"28",
+            "lanes":"16",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth28"
+            }
+        },
+        "Ethernet28": {
+            "index":"29",
+            "lanes":"21",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth29"
+            }
+        },
+        "Ethernet29": {
+            "index":"30",
+            "lanes":"22",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth30"
+            }
+        },
+        "Ethernet30": {
+            "index":"31",
+            "lanes":"23",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth31"
+            }
+        },
+        "Ethernet31": {
+            "index":"32",
+            "lanes":"24",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth32"
+            }
+        },
+        "Ethernet32": {
+            "index":"33",
+            "lanes":"29",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth33"
+            }
+        },
+        "Ethernet33": {
+            "index":"34",
+            "lanes":"30",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth34"
+            }
+        },
+        "Ethernet34": {
+            "index":"35",
+            "lanes":"31",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth35"
+            }
+        },
+        "Ethernet35": {
+            "index":"36",
+            "lanes":"32",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth36"
+            }
+        },
+        "Ethernet36": {
+            "index":"37",
+            "lanes":"97",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth37"
+            }
+        },
+        "Ethernet37": {
+            "index":"38",
+            "lanes":"98",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth38"
+            }
+        },
+        "Ethernet38": {
+            "index":"39",
+            "lanes":"99",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth39"
+            }
+        },
+        "Ethernet39": {
+            "index":"40",
+            "lanes":"100",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth40"
+            }
+        },
+        "Ethernet40": {
+            "index":"41",
+            "lanes":"105",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth41"
+            }
+        },
+        "Ethernet41": {
+            "index":"42",
+            "lanes":"106",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth42"
+            }
+        },
+        "Ethernet42": {
+            "index":"43",
+            "lanes":"107",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth43"
+            }
+        },
+        "Ethernet43": {
+            "index":"44",
+            "lanes":"108",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth44"
+            }
+        },
+        "Ethernet44": {
+            "index":"45",
+            "lanes":"113",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth45"
+            }
+        },
+        "Ethernet45": {
+            "index":"46",
+            "lanes":"114",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth46"
+            }
+        },
+        "Ethernet46": {
+            "index":"47",
+            "lanes":"115",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth47"
+            }
+        },
+        "Ethernet47": {
+            "index":"48",
+            "lanes":"116",
+            "breakout_modes": {
+                "1x25G[10G]": "Eth48"
+            }
+        },
+        "Ethernet48": {
+            "index":"49,49,49,49",
+            "lanes":"121,122,123,124",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth49"],
+                "2x50G": ["Eth49/1", "Eth49/2"],
+                "1x50G": ["Eth49/1"],
+                "4x25G[10G]": ["Eth49/1", "Eth49/2", "Eth49/3", "Eth49/4"],
+                "1x25G[10G]": ["Eth49/1"]
+            }
+        },
+        "Ethernet52": {
+            "index":"50,50,50,50",
+            "lanes":"125,126,127,128",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth50"],
+                "2x50G": ["Eth50/1", "Eth50/2"],
+                "1x50G": ["Eth50/1"],
+                "4x25G[10G]": ["Eth50/1", "Eth50/2", "Eth50/3", "Eth50/4"],
+                "1x25G[10G]": ["Eth50/1"]
+            }
+        },
+        "Ethernet56": {
+            "index":"51,51,51,51",
+            "lanes":"69,70,71,72",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth51"],
+                "2x50G": ["Eth51/1", "Eth51/2"],
+                "1x50G": ["Eth51/1"],
+                "4x25G[10G]": ["Eth51/1", "Eth51/2", "Eth51/3", "Eth51/4"],
+                "1x25G[10G]": ["Eth51/1"]
+            }
+        },
+        "Ethernet60": {
+            "index":"52,52,52,52",
+            "lanes":"65,66,67,68",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth52"],
+                "2x50G": ["Eth52/1", "Eth52/2"],
+                "1x50G": ["Eth52/1"],
+                "4x25G[10G]": ["Eth52/1", "Eth52/2", "Eth52/3", "Eth52/4"],
+                "1x25G[10G]": ["Eth52/1"]
+            }
+        },
+        "Ethernet64": {
+            "index":"53,53,53,53",
+            "lanes":"1,2,3,4",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth53"],
+                "2x50G": ["Eth53/1", "Eth53/2"],
+                "1x50G": ["Eth53/1"],
+                "4x25G[10G]": ["Eth53/1", "Eth53/2", "Eth53/3", "Eth53/4"],
+                "1x25G[10G]": ["Eth53/1"]
+            }
+        },
+        "Ethernet68": {
+            "index":"54,54,54,54",
+            "lanes":"33,34,35,36",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth54"],
+                "2x50G": ["Eth54/1", "Eth54/2"],
+                "1x50G": ["Eth54/1"],
+                "4x25G[10G]": ["Eth54/1", "Eth54/2", "Eth54/3", "Eth54/4"],
+                "1x25G[10G]": ["Eth54/1"]
+            }
+        },
+        "Ethernet72": {
+            "index":"55,55,55,55",
+            "lanes":"5,6,7,8",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth55"],
+                "2x50G": ["Eth55/1", "Eth55/2"],
+                "1x50G": ["Eth55/1"],
+                "4x25G[10G]": ["Eth55/1", "Eth55/2", "Eth55/3", "Eth55/4"],
+                "1x25G[10G]": ["Eth55/1"]
+            }
+        },
+        "Ethernet76": {
+            "index":"56,56,56,56",
+            "lanes":"41,42,43,44",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth56"],
+                "2x50G": ["Eth56/1", "Eth56/2"],
+                "1x50G": ["Eth56/1"],
+                "4x25G[10G]": ["Eth56/1", "Eth56/2", "Eth56/3", "Eth56/4"],
+                "1x25G[10G]": ["Eth56/1"]
+            }
+        }
+
+    }
+}

From 47b8faa8798e576ab433c9beaabab45340bdbb7d Mon Sep 17 00:00:00 2001
From: Chris <156943338+ccroy-arista@users.noreply.github.com>
Date: Fri, 4 Oct 2024 17:48:23 -0700
Subject: [PATCH 064/364] [Arista]: 7060x6-64pe 256x100g support (#20107)

Baseline implementation for 256x100g support in the Arista-7060X6-64PE (DCS-7060X6-64PE) has been requested by MSFT.

How I did it
Added the necessary files for baseline implementation of 256x100g implementation for Quicksilver OSFP.
---
 .../Arista-7060X6-64PE-C256S2/BALANCED        |    1 +
 .../Arista-7060X6-64PE-C256S2/buffer_ports.j2 |    6 +
 .../Arista-7060X6-64PE-C256S2/buffers.json.j2 |    2 +
 .../buffers_defaults_t0.j2                    |    1 +
 .../buffers_defaults_t1.j2                    |    1 +
 .../Arista-7060X6-64PE-C256S2/hwsku.json      |  106 +
 .../pg_profile_lookup.ini                     |    1 +
 .../Arista-7060X6-64PE-C256S2/port_config.ini |  259 +++
 .../Arista-7060X6-64PE-C256S2/qos.json.j2     |    1 +
 .../Arista-7060X6-64PE-C256S2/sai.profile     |    1 +
 .../th5-a7060x6-64pe.config.bcm               | 1928 +++++++++++++++++
 .../x86_64-arista_7060x6_64pe/platform.json   |  640 ++++++
 12 files changed, 2947 insertions(+)
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/BALANCED
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffer_ports.j2
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffers.json.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffers_defaults_t0.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffers_defaults_t1.j2
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/hwsku.json
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/pg_profile_lookup.ini
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/port_config.ini
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/qos.json.j2
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/sai.profile
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/th5-a7060x6-64pe.config.bcm

diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/BALANCED b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/BALANCED
new file mode 120000
index 000000000000..afd21766cc64
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/BALANCED
@@ -0,0 +1 @@
+../../../common/profiles/th5/gen/BALANCED
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffer_ports.j2
new file mode 100644
index 000000000000..55d8aacb3400
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffer_ports.j2
@@ -0,0 +1,6 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0, 512, 2) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffers.json.j2
new file mode 100644
index 000000000000..0b1cb2c541b6
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffers_defaults_t0.j2
new file mode 120000
index 000000000000..9524e6a476ac
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffers_defaults_t1.j2
new file mode 120000
index 000000000000..c25cc95d6d57
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/buffers_defaults_t1.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/hwsku.json b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/hwsku.json
new file mode 100644
index 000000000000..a82d093767d3
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/hwsku.json
@@ -0,0 +1,106 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet512": {
+            "default_brkout_mode": "1x10G"
+        },
+        "Ethernet513": {
+            "default_brkout_mode": "1x10G"
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/pg_profile_lookup.ini
new file mode 120000
index 000000000000..297cddb2d223
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/pg_profile_lookup.ini
@@ -0,0 +1 @@
+BALANCED/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/port_config.ini
new file mode 100644
index 000000000000..be2e547eb6c8
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/port_config.ini
@@ -0,0 +1,259 @@
+# name          lanes                           alias           index   speed   fec
+Ethernet0       17                              Ethernet1/1     1       100000  rs
+Ethernet1       18                              Ethernet1/2     1       100000  rs
+Ethernet2       19                              Ethernet1/3     1       100000  rs
+Ethernet3       20                              Ethernet1/4     1       100000  rs
+Ethernet4       21                              Ethernet1/5     1       100000  rs
+Ethernet5       22                              Ethernet1/6     1       100000  rs
+Ethernet6       23                              Ethernet1/7     1       100000  rs
+Ethernet7       24                              Ethernet1/8     1       100000  rs
+Ethernet16      9                               Ethernet3/1     3       100000  rs
+Ethernet17      10                              Ethernet3/2     3       100000  rs
+Ethernet18      11                              Ethernet3/3     3       100000  rs
+Ethernet19      12                              Ethernet3/4     3       100000  rs
+Ethernet20      13                              Ethernet3/5     3       100000  rs
+Ethernet21      14                              Ethernet3/6     3       100000  rs
+Ethernet22      15                              Ethernet3/7     3       100000  rs
+Ethernet23      16                              Ethernet3/8     3       100000  rs
+Ethernet32      57                              Ethernet5/1     5       100000  rs
+Ethernet33      58                              Ethernet5/2     5       100000  rs
+Ethernet34      59                              Ethernet5/3     5       100000  rs
+Ethernet35      60                              Ethernet5/4     5       100000  rs
+Ethernet36      61                              Ethernet5/5     5       100000  rs
+Ethernet37      62                              Ethernet5/6     5       100000  rs
+Ethernet38      63                              Ethernet5/7     5       100000  rs
+Ethernet39      64                              Ethernet5/8     5       100000  rs
+Ethernet48      33                              Ethernet7/1     7       100000  rs
+Ethernet49      34                              Ethernet7/2     7       100000  rs
+Ethernet50      35                              Ethernet7/3     7       100000  rs
+Ethernet51      36                              Ethernet7/4     7       100000  rs
+Ethernet52      37                              Ethernet7/5     7       100000  rs
+Ethernet53      38                              Ethernet7/6     7       100000  rs
+Ethernet54      39                              Ethernet7/7     7       100000  rs
+Ethernet55      40                              Ethernet7/8     7       100000  rs
+Ethernet64      89                              Ethernet9/1     9       100000  rs
+Ethernet65      90                              Ethernet9/2     9       100000  rs
+Ethernet66      91                              Ethernet9/3     9       100000  rs
+Ethernet67      92                              Ethernet9/4     9       100000  rs
+Ethernet68      93                              Ethernet9/5     9       100000  rs
+Ethernet69      94                              Ethernet9/6     9       100000  rs
+Ethernet70      95                              Ethernet9/7     9       100000  rs
+Ethernet71      96                              Ethernet9/8     9       100000  rs
+Ethernet80      65                              Ethernet11/1    11      100000  rs
+Ethernet81      66                              Ethernet11/2    11      100000  rs
+Ethernet82      67                              Ethernet11/3    11      100000  rs
+Ethernet83      68                              Ethernet11/4    11      100000  rs
+Ethernet84      69                              Ethernet11/5    11      100000  rs
+Ethernet85      70                              Ethernet11/6    11      100000  rs
+Ethernet86      71                              Ethernet11/7    11      100000  rs
+Ethernet87      72                              Ethernet11/8    11      100000  rs
+Ethernet96      121                             Ethernet13/1    13      100000  rs
+Ethernet97      122                             Ethernet13/2    13      100000  rs
+Ethernet98      123                             Ethernet13/3    13      100000  rs
+Ethernet99      124                             Ethernet13/4    13      100000  rs
+Ethernet100     125                             Ethernet13/5    13      100000  rs
+Ethernet101     126                             Ethernet13/6    13      100000  rs
+Ethernet102     127                             Ethernet13/7    13      100000  rs
+Ethernet103     128                             Ethernet13/8    13      100000  rs
+Ethernet112     97                              Ethernet15/1    15      100000  rs
+Ethernet113     98                              Ethernet15/2    15      100000  rs
+Ethernet114     99                              Ethernet15/3    15      100000  rs
+Ethernet115     100                             Ethernet15/4    15      100000  rs
+Ethernet116     101                             Ethernet15/5    15      100000  rs
+Ethernet117     102                             Ethernet15/6    15      100000  rs
+Ethernet118     103                             Ethernet15/7    15      100000  rs
+Ethernet119     104                             Ethernet15/8    15      100000  rs
+Ethernet128     153                             Ethernet17/1    17      100000  rs
+Ethernet129     154                             Ethernet17/2    17      100000  rs
+Ethernet130     155                             Ethernet17/3    17      100000  rs
+Ethernet131     156                             Ethernet17/4    17      100000  rs
+Ethernet132     157                             Ethernet17/5    17      100000  rs
+Ethernet133     158                             Ethernet17/6    17      100000  rs
+Ethernet134     159                             Ethernet17/7    17      100000  rs
+Ethernet135     160                             Ethernet17/8    17      100000  rs
+Ethernet144     129                             Ethernet19/1    19      100000  rs
+Ethernet145     130                             Ethernet19/2    19      100000  rs
+Ethernet146     131                             Ethernet19/3    19      100000  rs
+Ethernet147     132                             Ethernet19/4    19      100000  rs
+Ethernet148     133                             Ethernet19/5    19      100000  rs
+Ethernet149     134                             Ethernet19/6    19      100000  rs
+Ethernet150     135                             Ethernet19/7    19      100000  rs
+Ethernet151     136                             Ethernet19/8    19      100000  rs
+Ethernet160     185                             Ethernet21/1    21      100000  rs
+Ethernet161     186                             Ethernet21/2    21      100000  rs
+Ethernet162     187                             Ethernet21/3    21      100000  rs
+Ethernet163     188                             Ethernet21/4    21      100000  rs
+Ethernet164     189                             Ethernet21/5    21      100000  rs
+Ethernet165     190                             Ethernet21/6    21      100000  rs
+Ethernet166     191                             Ethernet21/7    21      100000  rs
+Ethernet167     192                             Ethernet21/8    21      100000  rs
+Ethernet176     161                             Ethernet23/1    23      100000  rs
+Ethernet177     162                             Ethernet23/2    23      100000  rs
+Ethernet178     163                             Ethernet23/3    23      100000  rs
+Ethernet179     164                             Ethernet23/4    23      100000  rs
+Ethernet180     165                             Ethernet23/5    23      100000  rs
+Ethernet181     166                             Ethernet23/6    23      100000  rs
+Ethernet182     167                             Ethernet23/7    23      100000  rs
+Ethernet183     168                             Ethernet23/8    23      100000  rs
+Ethernet192     217                             Ethernet25/1    25      100000  rs
+Ethernet193     218                             Ethernet25/2    25      100000  rs
+Ethernet194     219                             Ethernet25/3    25      100000  rs
+Ethernet195     220                             Ethernet25/4    25      100000  rs
+Ethernet196     221                             Ethernet25/5    25      100000  rs
+Ethernet197     222                             Ethernet25/6    25      100000  rs
+Ethernet198     223                             Ethernet25/7    25      100000  rs
+Ethernet199     224                             Ethernet25/8    25      100000  rs
+Ethernet208     193                             Ethernet27/1    27      100000  rs
+Ethernet209     194                             Ethernet27/2    27      100000  rs
+Ethernet210     195                             Ethernet27/3    27      100000  rs
+Ethernet211     196                             Ethernet27/4    27      100000  rs
+Ethernet212     197                             Ethernet27/5    27      100000  rs
+Ethernet213     198                             Ethernet27/6    27      100000  rs
+Ethernet214     199                             Ethernet27/7    27      100000  rs
+Ethernet215     200                             Ethernet27/8    27      100000  rs
+Ethernet224     249                             Ethernet29/1    29      100000  rs
+Ethernet225     250                             Ethernet29/2    29      100000  rs
+Ethernet226     251                             Ethernet29/3    29      100000  rs
+Ethernet227     252                             Ethernet29/4    29      100000  rs
+Ethernet228     253                             Ethernet29/5    29      100000  rs
+Ethernet229     254                             Ethernet29/6    29      100000  rs
+Ethernet230     255                             Ethernet29/7    29      100000  rs
+Ethernet231     256                             Ethernet29/8    29      100000  rs
+Ethernet240     225                             Ethernet31/1    31      100000  rs
+Ethernet241     226                             Ethernet31/2    31      100000  rs
+Ethernet242     227                             Ethernet31/3    31      100000  rs
+Ethernet243     228                             Ethernet31/4    31      100000  rs
+Ethernet244     229                             Ethernet31/5    31      100000  rs
+Ethernet245     230                             Ethernet31/6    31      100000  rs
+Ethernet246     231                             Ethernet31/7    31      100000  rs
+Ethernet247     232                             Ethernet31/8    31      100000  rs
+Ethernet256     273                             Ethernet33/1    33      100000  rs
+Ethernet257     274                             Ethernet33/2    33      100000  rs
+Ethernet258     275                             Ethernet33/3    33      100000  rs
+Ethernet259     276                             Ethernet33/4    33      100000  rs
+Ethernet260     277                             Ethernet33/5    33      100000  rs
+Ethernet261     278                             Ethernet33/6    33      100000  rs
+Ethernet262     279                             Ethernet33/7    33      100000  rs
+Ethernet263     280                             Ethernet33/8    33      100000  rs
+Ethernet272     265                             Ethernet35/1    35      100000  rs
+Ethernet273     266                             Ethernet35/2    35      100000  rs
+Ethernet274     267                             Ethernet35/3    35      100000  rs
+Ethernet275     268                             Ethernet35/4    35      100000  rs
+Ethernet276     269                             Ethernet35/5    35      100000  rs
+Ethernet277     270                             Ethernet35/6    35      100000  rs
+Ethernet278     271                             Ethernet35/7    35      100000  rs
+Ethernet279     272                             Ethernet35/8    35      100000  rs
+Ethernet288     313                             Ethernet37/1    37      100000  rs
+Ethernet289     314                             Ethernet37/2    37      100000  rs
+Ethernet290     315                             Ethernet37/3    37      100000  rs
+Ethernet291     316                             Ethernet37/4    37      100000  rs
+Ethernet292     317                             Ethernet37/5    37      100000  rs
+Ethernet293     318                             Ethernet37/6    37      100000  rs
+Ethernet294     319                             Ethernet37/7    37      100000  rs
+Ethernet295     320                             Ethernet37/8    37      100000  rs
+Ethernet304     289                             Ethernet39/1    39      100000  rs
+Ethernet305     290                             Ethernet39/2    39      100000  rs
+Ethernet306     291                             Ethernet39/3    39      100000  rs
+Ethernet307     292                             Ethernet39/4    39      100000  rs
+Ethernet308     293                             Ethernet39/5    39      100000  rs
+Ethernet309     294                             Ethernet39/6    39      100000  rs
+Ethernet310     295                             Ethernet39/7    39      100000  rs
+Ethernet311     296                             Ethernet39/8    39      100000  rs
+Ethernet320     345                             Ethernet41/1    41      100000  rs
+Ethernet321     346                             Ethernet41/2    41      100000  rs
+Ethernet322     347                             Ethernet41/3    41      100000  rs
+Ethernet323     348                             Ethernet41/4    41      100000  rs
+Ethernet324     349                             Ethernet41/5    41      100000  rs
+Ethernet325     350                             Ethernet41/6    41      100000  rs
+Ethernet326     351                             Ethernet41/7    41      100000  rs
+Ethernet327     352                             Ethernet41/8    41      100000  rs
+Ethernet336     321                             Ethernet43/1    43      100000  rs
+Ethernet337     322                             Ethernet43/2    43      100000  rs
+Ethernet338     323                             Ethernet43/3    43      100000  rs
+Ethernet339     324                             Ethernet43/4    43      100000  rs
+Ethernet340     325                             Ethernet43/5    43      100000  rs
+Ethernet341     326                             Ethernet43/6    43      100000  rs
+Ethernet342     327                             Ethernet43/7    43      100000  rs
+Ethernet343     328                             Ethernet43/8    43      100000  rs
+Ethernet352     377                             Ethernet45/1    45      100000  rs
+Ethernet353     378                             Ethernet45/2    45      100000  rs
+Ethernet354     379                             Ethernet45/3    45      100000  rs
+Ethernet355     380                             Ethernet45/4    45      100000  rs
+Ethernet356     381                             Ethernet45/5    45      100000  rs
+Ethernet357     382                             Ethernet45/6    45      100000  rs
+Ethernet358     383                             Ethernet45/7    45      100000  rs
+Ethernet359     384                             Ethernet45/8    45      100000  rs
+Ethernet368     353                             Ethernet47/1    47      100000  rs
+Ethernet369     354                             Ethernet47/2    47      100000  rs
+Ethernet370     355                             Ethernet47/3    47      100000  rs
+Ethernet371     356                             Ethernet47/4    47      100000  rs
+Ethernet372     357                             Ethernet47/5    47      100000  rs
+Ethernet373     358                             Ethernet47/6    47      100000  rs
+Ethernet374     359                             Ethernet47/7    47      100000  rs
+Ethernet375     360                             Ethernet47/8    47      100000  rs
+Ethernet384     409                             Ethernet49/1    49      100000  rs
+Ethernet385     410                             Ethernet49/2    49      100000  rs
+Ethernet386     411                             Ethernet49/3    49      100000  rs
+Ethernet387     412                             Ethernet49/4    49      100000  rs
+Ethernet388     413                             Ethernet49/5    49      100000  rs
+Ethernet389     414                             Ethernet49/6    49      100000  rs
+Ethernet390     415                             Ethernet49/7    49      100000  rs
+Ethernet391     416                             Ethernet49/8    49      100000  rs
+Ethernet400     385                             Ethernet51/1    51      100000  rs
+Ethernet401     386                             Ethernet51/2    51      100000  rs
+Ethernet402     387                             Ethernet51/3    51      100000  rs
+Ethernet403     388                             Ethernet51/4    51      100000  rs
+Ethernet404     389                             Ethernet51/5    51      100000  rs
+Ethernet405     390                             Ethernet51/6    51      100000  rs
+Ethernet406     391                             Ethernet51/7    51      100000  rs
+Ethernet407     392                             Ethernet51/8    51      100000  rs
+Ethernet416     441                             Ethernet53/1    53      100000  rs
+Ethernet417     442                             Ethernet53/2    53      100000  rs
+Ethernet418     443                             Ethernet53/3    53      100000  rs
+Ethernet419     444                             Ethernet53/4    53      100000  rs
+Ethernet420     445                             Ethernet53/5    53      100000  rs
+Ethernet421     446                             Ethernet53/6    53      100000  rs
+Ethernet422     447                             Ethernet53/7    53      100000  rs
+Ethernet423     448                             Ethernet53/8    53      100000  rs
+Ethernet432     417                             Ethernet55/1    55      100000  rs
+Ethernet433     418                             Ethernet55/2    55      100000  rs
+Ethernet434     419                             Ethernet55/3    55      100000  rs
+Ethernet435     420                             Ethernet55/4    55      100000  rs
+Ethernet436     421                             Ethernet55/5    55      100000  rs
+Ethernet437     422                             Ethernet55/6    55      100000  rs
+Ethernet438     423                             Ethernet55/7    55      100000  rs
+Ethernet439     424                             Ethernet55/8    55      100000  rs
+Ethernet448     473                             Ethernet57/1    57      100000  rs
+Ethernet449     474                             Ethernet57/2    57      100000  rs
+Ethernet450     475                             Ethernet57/3    57      100000  rs
+Ethernet451     476                             Ethernet57/4    57      100000  rs
+Ethernet452     477                             Ethernet57/5    57      100000  rs
+Ethernet453     478                             Ethernet57/6    57      100000  rs
+Ethernet454     479                             Ethernet57/7    57      100000  rs
+Ethernet455     480                             Ethernet57/8    57      100000  rs
+Ethernet464     449                             Ethernet59/1    59      100000  rs
+Ethernet465     450                             Ethernet59/2    59      100000  rs
+Ethernet466     451                             Ethernet59/3    59      100000  rs
+Ethernet467     452                             Ethernet59/4    59      100000  rs
+Ethernet468     453                             Ethernet59/5    59      100000  rs
+Ethernet469     454                             Ethernet59/6    59      100000  rs
+Ethernet470     455                             Ethernet59/7    59      100000  rs
+Ethernet471     456                             Ethernet59/8    59      100000  rs
+Ethernet480     505                             Ethernet61/1    61      100000  rs
+Ethernet481     506                             Ethernet61/2    61      100000  rs
+Ethernet482     507                             Ethernet61/3    61      100000  rs
+Ethernet483     508                             Ethernet61/4    61      100000  rs
+Ethernet484     509                             Ethernet61/5    61      100000  rs
+Ethernet485     510                             Ethernet61/6    61      100000  rs
+Ethernet486     511                             Ethernet61/7    61      100000  rs
+Ethernet487     512                             Ethernet61/8    61      100000  rs
+Ethernet496     481                             Ethernet63/1    63      100000  rs
+Ethernet497     482                             Ethernet63/2    63      100000  rs
+Ethernet498     483                             Ethernet63/3    63      100000  rs
+Ethernet499     484                             Ethernet63/4    63      100000  rs
+Ethernet500     485                             Ethernet63/5    63      100000  rs
+Ethernet501     486                             Ethernet63/6    63      100000  rs
+Ethernet502     487                             Ethernet63/7    63      100000  rs
+Ethernet503     488                             Ethernet63/8    63      100000  rs
+Ethernet512     513                             Ethernet65      65      10000   none
+Ethernet513     515                             Ethernet66      66      10000   none
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/qos.json.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/qos.json.j2
new file mode 100644
index 000000000000..3e548325ea30
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/sai.profile b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/sai.profile
new file mode 100644
index 000000000000..50c136d97b24
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64pe.config.bcm
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/th5-a7060x6-64pe.config.bcm
new file mode 100644
index 000000000000..ba9dff7e73d3
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/th5-a7060x6-64pe.config.bcm
@@ -0,0 +1,1928 @@
+#
+# $Copyright: (c) 2022 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+# BCM78900 64x800g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 2
+            mmu_init_config: "\"TH5-MSFT-PROD\""
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 12288
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x26
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x67
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 2
+            ?
+                PORT_ID: 3
+            :
+                PC_PHYS_PORT_ID: 3
+            ?
+                PORT_ID: 4
+            :
+                PC_PHYS_PORT_ID: 4
+            ?
+                PORT_ID: 5
+            :
+                PC_PHYS_PORT_ID: 5
+            ?
+                PORT_ID: 6
+            :
+                PC_PHYS_PORT_ID: 6
+            ?
+                PORT_ID: 7
+            :
+                PC_PHYS_PORT_ID: 7
+            ?
+                PORT_ID: 8
+            :
+                PC_PHYS_PORT_ID: 8
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 12
+            :
+                PC_PHYS_PORT_ID: 18
+            ?
+                PORT_ID: 13
+            :
+                PC_PHYS_PORT_ID: 19
+            ?
+                PORT_ID: 14
+            :
+                PC_PHYS_PORT_ID: 20
+            ?
+                PORT_ID: 15
+            :
+                PC_PHYS_PORT_ID: 21
+            ?
+                PORT_ID: 16
+            :
+                PC_PHYS_PORT_ID: 22
+            ?
+                PORT_ID: 17
+            :
+                PC_PHYS_PORT_ID: 23
+            ?
+                PORT_ID: 18
+            :
+                PC_PHYS_PORT_ID: 24
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 23
+            :
+                PC_PHYS_PORT_ID: 34
+            ?
+                PORT_ID: 24
+            :
+                PC_PHYS_PORT_ID: 35
+            ?
+                PORT_ID: 25
+            :
+                PC_PHYS_PORT_ID: 36
+            ?
+                PORT_ID: 26
+            :
+                PC_PHYS_PORT_ID: 37
+            ?
+                PORT_ID: 27
+            :
+                PC_PHYS_PORT_ID: 38
+            ?
+                PORT_ID: 28
+            :
+                PC_PHYS_PORT_ID: 39
+            ?
+                PORT_ID: 29
+            :
+                PC_PHYS_PORT_ID: 40
+            ?
+                PORT_ID: 33
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 50
+            ?
+                PORT_ID: 35
+            :
+                PC_PHYS_PORT_ID: 51
+            ?
+                PORT_ID: 36
+            :
+                PC_PHYS_PORT_ID: 52
+            ?
+                PORT_ID: 37
+            :
+                PC_PHYS_PORT_ID: 53
+            ?
+                PORT_ID: 38
+            :
+                PC_PHYS_PORT_ID: 54
+            ?
+                PORT_ID: 39
+            :
+                PC_PHYS_PORT_ID: 55
+            ?
+                PORT_ID: 40
+            :
+                PC_PHYS_PORT_ID: 56
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 45
+            :
+                PC_PHYS_PORT_ID: 66
+            ?
+                PORT_ID: 46
+            :
+                PC_PHYS_PORT_ID: 67
+            ?
+                PORT_ID: 47
+            :
+                PC_PHYS_PORT_ID: 68
+            ?
+                PORT_ID: 48
+            :
+                PC_PHYS_PORT_ID: 69
+            ?
+                PORT_ID: 49
+            :
+                PC_PHYS_PORT_ID: 70
+            ?
+                PORT_ID: 50
+            :
+                PC_PHYS_PORT_ID: 71
+            ?
+                PORT_ID: 51
+            :
+                PC_PHYS_PORT_ID: 72
+            ?
+                PORT_ID: 55
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 56
+            :
+                PC_PHYS_PORT_ID: 82
+            ?
+                PORT_ID: 57
+            :
+                PC_PHYS_PORT_ID: 83
+            ?
+                PORT_ID: 58
+            :
+                PC_PHYS_PORT_ID: 84
+            ?
+                PORT_ID: 59
+            :
+                PC_PHYS_PORT_ID: 85
+            ?
+                PORT_ID: 60
+            :
+                PC_PHYS_PORT_ID: 86
+            ?
+                PORT_ID: 61
+            :
+                PC_PHYS_PORT_ID: 87
+            ?
+                PORT_ID: 62
+            :
+                PC_PHYS_PORT_ID: 88
+            ?
+                PORT_ID: 66
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 67
+            :
+                PC_PHYS_PORT_ID: 98
+            ?
+                PORT_ID: 68
+            :
+                PC_PHYS_PORT_ID: 99
+            ?
+                PORT_ID: 69
+            :
+                PC_PHYS_PORT_ID: 100
+            ?
+                PORT_ID: 70
+            :
+                PC_PHYS_PORT_ID: 101
+            ?
+                PORT_ID: 71
+            :
+                PC_PHYS_PORT_ID: 102
+            ?
+                PORT_ID: 72
+            :
+                PC_PHYS_PORT_ID: 103
+            ?
+                PORT_ID: 73
+            :
+                PC_PHYS_PORT_ID: 104
+            ?
+                PORT_ID: 77
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 78
+            :
+                PC_PHYS_PORT_ID: 114
+            ?
+                PORT_ID: 79
+            :
+                PC_PHYS_PORT_ID: 115
+            ?
+                PORT_ID: 80
+            :
+                PC_PHYS_PORT_ID: 116
+            ?
+                PORT_ID: 81
+            :
+                PC_PHYS_PORT_ID: 117
+            ?
+                PORT_ID: 82
+            :
+                PC_PHYS_PORT_ID: 118
+            ?
+                PORT_ID: 83
+            :
+                PC_PHYS_PORT_ID: 119
+            ?
+                PORT_ID: 84
+            :
+                PC_PHYS_PORT_ID: 120
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 89
+            :
+                PC_PHYS_PORT_ID: 130
+            ?
+                PORT_ID: 90
+            :
+                PC_PHYS_PORT_ID: 131
+            ?
+                PORT_ID: 91
+            :
+                PC_PHYS_PORT_ID: 132
+            ?
+                PORT_ID: 92
+            :
+                PC_PHYS_PORT_ID: 133
+            ?
+                PORT_ID: 93
+            :
+                PC_PHYS_PORT_ID: 134
+            ?
+                PORT_ID: 94
+            :
+                PC_PHYS_PORT_ID: 135
+            ?
+                PORT_ID: 95
+            :
+                PC_PHYS_PORT_ID: 136
+            ?
+                PORT_ID: 99
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 100
+            :
+                PC_PHYS_PORT_ID: 146
+            ?
+                PORT_ID: 101
+            :
+                PC_PHYS_PORT_ID: 147
+            ?
+                PORT_ID: 102
+            :
+                PC_PHYS_PORT_ID: 148
+            ?
+                PORT_ID: 103
+            :
+                PC_PHYS_PORT_ID: 149
+            ?
+                PORT_ID: 104
+            :
+                PC_PHYS_PORT_ID: 150
+            ?
+                PORT_ID: 105
+            :
+                PC_PHYS_PORT_ID: 151
+            ?
+                PORT_ID: 106
+            :
+                PC_PHYS_PORT_ID: 152
+            ?
+                PORT_ID: 110
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 111
+            :
+                PC_PHYS_PORT_ID: 162
+            ?
+                PORT_ID: 112
+            :
+                PC_PHYS_PORT_ID: 163
+            ?
+                PORT_ID: 113
+            :
+                PC_PHYS_PORT_ID: 164
+            ?
+                PORT_ID: 114
+            :
+                PC_PHYS_PORT_ID: 165
+            ?
+                PORT_ID: 115
+            :
+                PC_PHYS_PORT_ID: 166
+            ?
+                PORT_ID: 116
+            :
+                PC_PHYS_PORT_ID: 167
+            ?
+                PORT_ID: 117
+            :
+                PC_PHYS_PORT_ID: 168
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 122
+            :
+                PC_PHYS_PORT_ID: 178
+            ?
+                PORT_ID: 123
+            :
+                PC_PHYS_PORT_ID: 179
+            ?
+                PORT_ID: 124
+            :
+                PC_PHYS_PORT_ID: 180
+            ?
+                PORT_ID: 125
+            :
+                PC_PHYS_PORT_ID: 181
+            ?
+                PORT_ID: 126
+            :
+                PC_PHYS_PORT_ID: 182
+            ?
+                PORT_ID: 127
+            :
+                PC_PHYS_PORT_ID: 183
+            ?
+                PORT_ID: 128
+            :
+                PC_PHYS_PORT_ID: 184
+            ?
+                PORT_ID: 132
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 133
+            :
+                PC_PHYS_PORT_ID: 194
+            ?
+                PORT_ID: 134
+            :
+                PC_PHYS_PORT_ID: 195
+            ?
+                PORT_ID: 135
+            :
+                PC_PHYS_PORT_ID: 196
+            ?
+                PORT_ID: 136
+            :
+                PC_PHYS_PORT_ID: 197
+            ?
+                PORT_ID: 137
+            :
+                PC_PHYS_PORT_ID: 198
+            ?
+                PORT_ID: 138
+            :
+                PC_PHYS_PORT_ID: 199
+            ?
+                PORT_ID: 139
+            :
+                PC_PHYS_PORT_ID: 200
+            ?
+                PORT_ID: 143
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 144
+            :
+                PC_PHYS_PORT_ID: 210
+            ?
+                PORT_ID: 145
+            :
+                PC_PHYS_PORT_ID: 211
+            ?
+                PORT_ID: 146
+            :
+                PC_PHYS_PORT_ID: 212
+            ?
+                PORT_ID: 147
+            :
+                PC_PHYS_PORT_ID: 213
+            ?
+                PORT_ID: 148
+            :
+                PC_PHYS_PORT_ID: 214
+            ?
+                PORT_ID: 149
+            :
+                PC_PHYS_PORT_ID: 215
+            ?
+                PORT_ID: 150
+            :
+                PC_PHYS_PORT_ID: 216
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 155
+            :
+                PC_PHYS_PORT_ID: 226
+            ?
+                PORT_ID: 156
+            :
+                PC_PHYS_PORT_ID: 227
+            ?
+                PORT_ID: 157
+            :
+                PC_PHYS_PORT_ID: 228
+            ?
+                PORT_ID: 158
+            :
+                PC_PHYS_PORT_ID: 229
+            ?
+                PORT_ID: 159
+            :
+                PC_PHYS_PORT_ID: 230
+            ?
+                PORT_ID: 160
+            :
+                PC_PHYS_PORT_ID: 231
+            ?
+                PORT_ID: 161
+            :
+                PC_PHYS_PORT_ID: 232
+            ?
+                PORT_ID: 165
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 166
+            :
+                PC_PHYS_PORT_ID: 242
+            ?
+                PORT_ID: 167
+            :
+                PC_PHYS_PORT_ID: 243
+            ?
+                PORT_ID: 168
+            :
+                PC_PHYS_PORT_ID: 244
+            ?
+                PORT_ID: 169
+            :
+                PC_PHYS_PORT_ID: 245
+            ?
+                PORT_ID: 170
+            :
+                PC_PHYS_PORT_ID: 246
+            ?
+                PORT_ID: 171
+            :
+                PC_PHYS_PORT_ID: 247
+            ?
+                PORT_ID: 172
+            :
+                PC_PHYS_PORT_ID: 248
+            ?
+                PORT_ID: 176
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 177
+            :
+                PC_PHYS_PORT_ID: 258
+            ?
+                PORT_ID: 178
+            :
+                PC_PHYS_PORT_ID: 259
+            ?
+                PORT_ID: 179
+            :
+                PC_PHYS_PORT_ID: 260
+            ?
+                PORT_ID: 180
+            :
+                PC_PHYS_PORT_ID: 261
+            ?
+                PORT_ID: 181
+            :
+                PC_PHYS_PORT_ID: 262
+            ?
+                PORT_ID: 182
+            :
+                PC_PHYS_PORT_ID: 263
+            ?
+                PORT_ID: 183
+            :
+                PC_PHYS_PORT_ID: 264
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 274
+            ?
+                PORT_ID: 189
+            :
+                PC_PHYS_PORT_ID: 275
+            ?
+                PORT_ID: 190
+            :
+                PC_PHYS_PORT_ID: 276
+            ?
+                PORT_ID: 191
+            :
+                PC_PHYS_PORT_ID: 277
+            ?
+                PORT_ID: 192
+            :
+                PC_PHYS_PORT_ID: 278
+            ?
+                PORT_ID: 193
+            :
+                PC_PHYS_PORT_ID: 279
+            ?
+                PORT_ID: 194
+            :
+                PC_PHYS_PORT_ID: 280
+            ?
+                PORT_ID: 198
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 199
+            :
+                PC_PHYS_PORT_ID: 290
+            ?
+                PORT_ID: 200
+            :
+                PC_PHYS_PORT_ID: 291
+            ?
+                PORT_ID: 201
+            :
+                PC_PHYS_PORT_ID: 292
+            ?
+                PORT_ID: 202
+            :
+                PC_PHYS_PORT_ID: 293
+            ?
+                PORT_ID: 203
+            :
+                PC_PHYS_PORT_ID: 294
+            ?
+                PORT_ID: 204
+            :
+                PC_PHYS_PORT_ID: 295
+            ?
+                PORT_ID: 205
+            :
+                PC_PHYS_PORT_ID: 296
+            ?
+                PORT_ID: 209
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 210
+            :
+                PC_PHYS_PORT_ID: 306
+            ?
+                PORT_ID: 211
+            :
+                PC_PHYS_PORT_ID: 307
+            ?
+                PORT_ID: 212
+            :
+                PC_PHYS_PORT_ID: 308
+            ?
+                PORT_ID: 213
+            :
+                PC_PHYS_PORT_ID: 309
+            ?
+                PORT_ID: 214
+            :
+                PC_PHYS_PORT_ID: 310
+            ?
+                PORT_ID: 215
+            :
+                PC_PHYS_PORT_ID: 311
+            ?
+                PORT_ID: 216
+            :
+                PC_PHYS_PORT_ID: 312
+            ?
+                PORT_ID: 220
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 322
+            ?
+                PORT_ID: 222
+            :
+                PC_PHYS_PORT_ID: 323
+            ?
+                PORT_ID: 223
+            :
+                PC_PHYS_PORT_ID: 324
+            ?
+                PORT_ID: 224
+            :
+                PC_PHYS_PORT_ID: 325
+            ?
+                PORT_ID: 225
+            :
+                PC_PHYS_PORT_ID: 326
+            ?
+                PORT_ID: 226
+            :
+                PC_PHYS_PORT_ID: 327
+            ?
+                PORT_ID: 227
+            :
+                PC_PHYS_PORT_ID: 328
+            ?
+                PORT_ID: 231
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 232
+            :
+                PC_PHYS_PORT_ID: 338
+            ?
+                PORT_ID: 233
+            :
+                PC_PHYS_PORT_ID: 339
+            ?
+                PORT_ID: 234
+            :
+                PC_PHYS_PORT_ID: 340
+            ?
+                PORT_ID: 235
+            :
+                PC_PHYS_PORT_ID: 341
+            ?
+                PORT_ID: 236
+            :
+                PC_PHYS_PORT_ID: 342
+            ?
+                PORT_ID: 237
+            :
+                PC_PHYS_PORT_ID: 343
+            ?
+                PORT_ID: 238
+            :
+                PC_PHYS_PORT_ID: 344
+            ?
+                PORT_ID: 242
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 243
+            :
+                PC_PHYS_PORT_ID: 354
+            ?
+                PORT_ID: 244
+            :
+                PC_PHYS_PORT_ID: 355
+            ?
+                PORT_ID: 245
+            :
+                PC_PHYS_PORT_ID: 356
+            ?
+                PORT_ID: 246
+            :
+                PC_PHYS_PORT_ID: 357
+            ?
+                PORT_ID: 247
+            :
+                PC_PHYS_PORT_ID: 358
+            ?
+                PORT_ID: 248
+            :
+                PC_PHYS_PORT_ID: 359
+            ?
+                PORT_ID: 249
+            :
+                PC_PHYS_PORT_ID: 360
+            ?
+                PORT_ID: 253
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 254
+            :
+                PC_PHYS_PORT_ID: 370
+            ?
+                PORT_ID: 255
+            :
+                PC_PHYS_PORT_ID: 371
+            ?
+                PORT_ID: 256
+            :
+                PC_PHYS_PORT_ID: 372
+            ?
+                PORT_ID: 257
+            :
+                PC_PHYS_PORT_ID: 373
+            ?
+                PORT_ID: 258
+            :
+                PC_PHYS_PORT_ID: 374
+            ?
+                PORT_ID: 259
+            :
+                PC_PHYS_PORT_ID: 375
+            ?
+                PORT_ID: 260
+            :
+                PC_PHYS_PORT_ID: 376
+            ?
+                PORT_ID: 264
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 265
+            :
+                PC_PHYS_PORT_ID: 386
+            ?
+                PORT_ID: 266
+            :
+                PC_PHYS_PORT_ID: 387
+            ?
+                PORT_ID: 267
+            :
+                PC_PHYS_PORT_ID: 388
+            ?
+                PORT_ID: 268
+            :
+                PC_PHYS_PORT_ID: 389
+            ?
+                PORT_ID: 269
+            :
+                PC_PHYS_PORT_ID: 390
+            ?
+                PORT_ID: 270
+            :
+                PC_PHYS_PORT_ID: 391
+            ?
+                PORT_ID: 271
+            :
+                PC_PHYS_PORT_ID: 392
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 276
+            :
+                PC_PHYS_PORT_ID: 402
+            ?
+                PORT_ID: 277
+            :
+                PC_PHYS_PORT_ID: 403
+            ?
+                PORT_ID: 278
+            :
+                PC_PHYS_PORT_ID: 404
+            ?
+                PORT_ID: 279
+            :
+                PC_PHYS_PORT_ID: 405
+            ?
+                PORT_ID: 280
+            :
+                PC_PHYS_PORT_ID: 406
+            ?
+                PORT_ID: 281
+            :
+                PC_PHYS_PORT_ID: 407
+            ?
+                PORT_ID: 282
+            :
+                PC_PHYS_PORT_ID: 408
+            ?
+                PORT_ID: 286
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 287
+            :
+                PC_PHYS_PORT_ID: 418
+            ?
+                PORT_ID: 288
+            :
+                PC_PHYS_PORT_ID: 419
+            ?
+                PORT_ID: 289
+            :
+                PC_PHYS_PORT_ID: 420
+            ?
+                PORT_ID: 290
+            :
+                PC_PHYS_PORT_ID: 421
+            ?
+                PORT_ID: 291
+            :
+                PC_PHYS_PORT_ID: 422
+            ?
+                PORT_ID: 292
+            :
+                PC_PHYS_PORT_ID: 423
+            ?
+                PORT_ID: 293
+            :
+                PC_PHYS_PORT_ID: 424
+            ?
+                PORT_ID: 297
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 298
+            :
+                PC_PHYS_PORT_ID: 434
+            ?
+                PORT_ID: 299
+            :
+                PC_PHYS_PORT_ID: 435
+            ?
+                PORT_ID: 300
+            :
+                PC_PHYS_PORT_ID: 436
+            ?
+                PORT_ID: 301
+            :
+                PC_PHYS_PORT_ID: 437
+            ?
+                PORT_ID: 302
+            :
+                PC_PHYS_PORT_ID: 438
+            ?
+                PORT_ID: 303
+            :
+                PC_PHYS_PORT_ID: 439
+            ?
+                PORT_ID: 304
+            :
+                PC_PHYS_PORT_ID: 440
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 450
+            ?
+                PORT_ID: 310
+            :
+                PC_PHYS_PORT_ID: 451
+            ?
+                PORT_ID: 311
+            :
+                PC_PHYS_PORT_ID: 452
+            ?
+                PORT_ID: 312
+            :
+                PC_PHYS_PORT_ID: 453
+            ?
+                PORT_ID: 313
+            :
+                PC_PHYS_PORT_ID: 454
+            ?
+                PORT_ID: 314
+            :
+                PC_PHYS_PORT_ID: 455
+            ?
+                PORT_ID: 315
+            :
+                PC_PHYS_PORT_ID: 456
+            ?
+                PORT_ID: 319
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 320
+            :
+                PC_PHYS_PORT_ID: 466
+            ?
+                PORT_ID: 321
+            :
+                PC_PHYS_PORT_ID: 467
+            ?
+                PORT_ID: 322
+            :
+                PC_PHYS_PORT_ID: 468
+            ?
+                PORT_ID: 323
+            :
+                PC_PHYS_PORT_ID: 469
+            ?
+                PORT_ID: 324
+            :
+                PC_PHYS_PORT_ID: 470
+            ?
+                PORT_ID: 325
+            :
+                PC_PHYS_PORT_ID: 471
+            ?
+                PORT_ID: 326
+            :
+                PC_PHYS_PORT_ID: 472
+            ?
+                PORT_ID: 330
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 331
+            :
+                PC_PHYS_PORT_ID: 482
+            ?
+                PORT_ID: 332
+            :
+                PC_PHYS_PORT_ID: 483
+            ?
+                PORT_ID: 333
+            :
+                PC_PHYS_PORT_ID: 484
+            ?
+                PORT_ID: 334
+            :
+                PC_PHYS_PORT_ID: 485
+            ?
+                PORT_ID: 335
+            :
+                PC_PHYS_PORT_ID: 486
+            ?
+                PORT_ID: 336
+            :
+                PC_PHYS_PORT_ID: 487
+            ?
+                PORT_ID: 337
+            :
+                PC_PHYS_PORT_ID: 488
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 498
+            ?
+                PORT_ID: 343
+            :
+                PC_PHYS_PORT_ID: 499
+            ?
+                PORT_ID: 344
+            :
+                PC_PHYS_PORT_ID: 500
+            ?
+                PORT_ID: 345
+            :
+                PC_PHYS_PORT_ID: 501
+            ?
+                PORT_ID: 346
+            :
+                PC_PHYS_PORT_ID: 502
+            ?
+                PORT_ID: 347
+            :
+                PC_PHYS_PORT_ID: 503
+            ?
+                PORT_ID: 348
+            :
+                PC_PHYS_PORT_ID: 504
+            ?
+                PORT_ID: 76
+            :
+                PC_PHYS_PORT_ID: 513
+            ?
+                PORT_ID: 274
+            :
+                PC_PHYS_PORT_ID: 515
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[1, 8],
+                          [11, 18],
+                          [22, 29],
+                          [33, 40],
+                          [44, 51],
+                          [55, 62],
+                          [66, 73],
+                          [77, 84],
+                          [88, 95],
+                          [99, 106],
+                          [110, 117],
+                          [121, 128],
+                          [132, 139],
+                          [143, 150],
+                          [154, 161],
+                          [165, 172],
+                          [176, 183],
+                          [187, 194],
+                          [198, 205],
+                          [209, 216],
+                          [220, 227],
+                          [231, 238],
+                          [242, 249],
+                          [253, 260],
+                          [264, 271],
+                          [275, 282],
+                          [286, 293],
+                          [297, 304],
+                          [308, 315],
+                          [319, 326],
+                          [330, 337],
+                          [341, 348]]
+            :
+                ENABLE: 0
+                SPEED: 100000
+                NUM_LANES: 1
+                FEC_MODE: PC_FEC_RS544
+                MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [[76, 76], [274, 274]]
+            :
+                ENABLE: 0
+                MAX_FRAME_SIZE: 9416
+                SPEED: 10000
+                NUM_LANES: 1
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...
diff --git a/device/arista/x86_64-arista_7060x6_64pe/platform.json b/device/arista/x86_64-arista_7060x6_64pe/platform.json
index 1d8ef14e4a93..045388d03a23 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/platform.json
+++ b/device/arista/x86_64-arista_7060x6_64pe/platform.json
@@ -333,6 +333,16 @@
                     "Ethernet1/3",
                     "Ethernet1/5",
                     "Ethernet1/7"
+                ],
+                "8x100G": [
+                    "Ethernet1/1",
+                    "Ethernet1/2",
+                    "Ethernet1/3",
+                    "Ethernet1/4",
+                    "Ethernet1/5",
+                    "Ethernet1/6",
+                    "Ethernet1/7",
+                    "Ethernet1/8"
                 ]
             }
         },
@@ -355,6 +365,16 @@
                     "Ethernet2/3",
                     "Ethernet2/5",
                     "Ethernet2/7"
+                ],
+                "8x100G": [
+                    "Ethernet2/1",
+                    "Ethernet2/2",
+                    "Ethernet2/3",
+                    "Ethernet2/4",
+                    "Ethernet2/5",
+                    "Ethernet2/6",
+                    "Ethernet2/7",
+                    "Ethernet2/8"
                 ]
             }
         },
@@ -377,6 +397,16 @@
                     "Ethernet3/3",
                     "Ethernet3/5",
                     "Ethernet3/7"
+                ],
+                "8x100G": [
+                    "Ethernet3/1",
+                    "Ethernet3/2",
+                    "Ethernet3/3",
+                    "Ethernet3/4",
+                    "Ethernet3/5",
+                    "Ethernet3/6",
+                    "Ethernet3/7",
+                    "Ethernet3/8"
                 ]
             }
         },
@@ -399,6 +429,16 @@
                     "Ethernet4/3",
                     "Ethernet4/5",
                     "Ethernet4/7"
+                ],
+                "8x100G": [
+                    "Ethernet4/1",
+                    "Ethernet4/2",
+                    "Ethernet4/3",
+                    "Ethernet4/4",
+                    "Ethernet4/5",
+                    "Ethernet4/6",
+                    "Ethernet4/7",
+                    "Ethernet4/8"
                 ]
             }
         },
@@ -421,6 +461,16 @@
                     "Ethernet5/3",
                     "Ethernet5/5",
                     "Ethernet5/7"
+                ],
+                "8x100G": [
+                    "Ethernet5/1",
+                    "Ethernet5/2",
+                    "Ethernet5/3",
+                    "Ethernet5/4",
+                    "Ethernet5/5",
+                    "Ethernet5/6",
+                    "Ethernet5/7",
+                    "Ethernet5/8"
                 ]
             }
         },
@@ -443,6 +493,16 @@
                     "Ethernet6/3",
                     "Ethernet6/5",
                     "Ethernet6/7"
+                ],
+                "8x100G": [
+                    "Ethernet6/1",
+                    "Ethernet6/2",
+                    "Ethernet6/3",
+                    "Ethernet6/4",
+                    "Ethernet6/5",
+                    "Ethernet6/6",
+                    "Ethernet6/7",
+                    "Ethernet6/8"
                 ]
             }
         },
@@ -465,6 +525,16 @@
                     "Ethernet7/3",
                     "Ethernet7/5",
                     "Ethernet7/7"
+                ],
+                "8x100G": [
+                    "Ethernet7/1",
+                    "Ethernet7/2",
+                    "Ethernet7/3",
+                    "Ethernet7/4",
+                    "Ethernet7/5",
+                    "Ethernet7/6",
+                    "Ethernet7/7",
+                    "Ethernet7/8"
                 ]
             }
         },
@@ -487,6 +557,16 @@
                     "Ethernet8/3",
                     "Ethernet8/5",
                     "Ethernet8/7"
+                ],
+                "8x100G": [
+                    "Ethernet8/1",
+                    "Ethernet8/2",
+                    "Ethernet8/3",
+                    "Ethernet8/4",
+                    "Ethernet8/5",
+                    "Ethernet8/6",
+                    "Ethernet8/7",
+                    "Ethernet8/8"
                 ]
             }
         },
@@ -509,6 +589,16 @@
                     "Ethernet9/3",
                     "Ethernet9/5",
                     "Ethernet9/7"
+                ],
+                "8x100G": [
+                    "Ethernet9/1",
+                    "Ethernet9/2",
+                    "Ethernet9/3",
+                    "Ethernet9/4",
+                    "Ethernet9/5",
+                    "Ethernet9/6",
+                    "Ethernet9/7",
+                    "Ethernet9/8"
                 ]
             }
         },
@@ -531,6 +621,16 @@
                     "Ethernet10/3",
                     "Ethernet10/5",
                     "Ethernet10/7"
+                ],
+                "8x100G": [
+                    "Ethernet10/1",
+                    "Ethernet10/2",
+                    "Ethernet10/3",
+                    "Ethernet10/4",
+                    "Ethernet10/5",
+                    "Ethernet10/6",
+                    "Ethernet10/7",
+                    "Ethernet10/8"
                 ]
             }
         },
@@ -553,6 +653,16 @@
                     "Ethernet11/3",
                     "Ethernet11/5",
                     "Ethernet11/7"
+                ],
+                "8x100G": [
+                    "Ethernet11/1",
+                    "Ethernet11/2",
+                    "Ethernet11/3",
+                    "Ethernet11/4",
+                    "Ethernet11/5",
+                    "Ethernet11/6",
+                    "Ethernet11/7",
+                    "Ethernet11/8"
                 ]
             }
         },
@@ -575,6 +685,16 @@
                     "Ethernet12/3",
                     "Ethernet12/5",
                     "Ethernet12/7"
+                ],
+                "8x100G": [
+                    "Ethernet12/1",
+                    "Ethernet12/2",
+                    "Ethernet12/3",
+                    "Ethernet12/4",
+                    "Ethernet12/5",
+                    "Ethernet12/6",
+                    "Ethernet12/7",
+                    "Ethernet12/8"
                 ]
             }
         },
@@ -597,6 +717,16 @@
                     "Ethernet13/3",
                     "Ethernet13/5",
                     "Ethernet13/7"
+                ],
+                "8x100G": [
+                    "Ethernet13/1",
+                    "Ethernet13/2",
+                    "Ethernet13/3",
+                    "Ethernet13/4",
+                    "Ethernet13/5",
+                    "Ethernet13/6",
+                    "Ethernet13/7",
+                    "Ethernet13/8"
                 ]
             }
         },
@@ -619,6 +749,16 @@
                     "Ethernet14/3",
                     "Ethernet14/5",
                     "Ethernet14/7"
+                ],
+                "8x100G": [
+                    "Ethernet14/1",
+                    "Ethernet14/2",
+                    "Ethernet14/3",
+                    "Ethernet14/4",
+                    "Ethernet14/5",
+                    "Ethernet14/6",
+                    "Ethernet14/7",
+                    "Ethernet14/8"
                 ]
             }
         },
@@ -641,6 +781,16 @@
                     "Ethernet15/3",
                     "Ethernet15/5",
                     "Ethernet15/7"
+                ],
+                "8x100G": [
+                    "Ethernet15/1",
+                    "Ethernet15/2",
+                    "Ethernet15/3",
+                    "Ethernet15/4",
+                    "Ethernet15/5",
+                    "Ethernet15/6",
+                    "Ethernet15/7",
+                    "Ethernet15/8"
                 ]
             }
         },
@@ -663,6 +813,16 @@
                     "Ethernet16/3",
                     "Ethernet16/5",
                     "Ethernet16/7"
+                ],
+                "8x100G": [
+                    "Ethernet16/1",
+                    "Ethernet16/2",
+                    "Ethernet16/3",
+                    "Ethernet16/4",
+                    "Ethernet16/5",
+                    "Ethernet16/6",
+                    "Ethernet16/7",
+                    "Ethernet16/8"
                 ]
             }
         },
@@ -685,6 +845,16 @@
                     "Ethernet17/3",
                     "Ethernet17/5",
                     "Ethernet17/7"
+                ],
+                "8x100G": [
+                    "Ethernet17/1",
+                    "Ethernet17/2",
+                    "Ethernet17/3",
+                    "Ethernet17/4",
+                    "Ethernet17/5",
+                    "Ethernet17/6",
+                    "Ethernet17/7",
+                    "Ethernet17/8"
                 ]
             }
         },
@@ -707,6 +877,16 @@
                     "Ethernet18/3",
                     "Ethernet18/5",
                     "Ethernet18/7"
+                ],
+                "8x100G": [
+                    "Ethernet18/1",
+                    "Ethernet18/2",
+                    "Ethernet18/3",
+                    "Ethernet18/4",
+                    "Ethernet18/5",
+                    "Ethernet18/6",
+                    "Ethernet18/7",
+                    "Ethernet18/8"
                 ]
             }
         },
@@ -729,6 +909,16 @@
                     "Ethernet19/3",
                     "Ethernet19/5",
                     "Ethernet19/7"
+                ],
+                "8x100G": [
+                    "Ethernet19/1",
+                    "Ethernet19/2",
+                    "Ethernet19/3",
+                    "Ethernet19/4",
+                    "Ethernet19/5",
+                    "Ethernet19/6",
+                    "Ethernet19/7",
+                    "Ethernet19/8"
                 ]
             }
         },
@@ -751,6 +941,16 @@
                     "Ethernet20/3",
                     "Ethernet20/5",
                     "Ethernet20/7"
+                ],
+                "8x100G": [
+                    "Ethernet20/1",
+                    "Ethernet20/2",
+                    "Ethernet20/3",
+                    "Ethernet20/4",
+                    "Ethernet20/5",
+                    "Ethernet20/6",
+                    "Ethernet20/7",
+                    "Ethernet20/8"
                 ]
             }
         },
@@ -773,6 +973,16 @@
                     "Ethernet21/3",
                     "Ethernet21/5",
                     "Ethernet21/7"
+                ],
+                "8x100G": [
+                    "Ethernet21/1",
+                    "Ethernet21/2",
+                    "Ethernet21/3",
+                    "Ethernet21/4",
+                    "Ethernet21/5",
+                    "Ethernet21/6",
+                    "Ethernet21/7",
+                    "Ethernet21/8"
                 ]
             }
         },
@@ -795,6 +1005,16 @@
                     "Ethernet22/3",
                     "Ethernet22/5",
                     "Ethernet22/7"
+                ],
+                "8x100G": [
+                    "Ethernet22/1",
+                    "Ethernet22/2",
+                    "Ethernet22/3",
+                    "Ethernet22/4",
+                    "Ethernet22/5",
+                    "Ethernet22/6",
+                    "Ethernet22/7",
+                    "Ethernet22/8"
                 ]
             }
         },
@@ -817,6 +1037,16 @@
                     "Ethernet23/3",
                     "Ethernet23/5",
                     "Ethernet23/7"
+                ],
+                "8x100G": [
+                    "Ethernet23/1",
+                    "Ethernet23/2",
+                    "Ethernet23/3",
+                    "Ethernet23/4",
+                    "Ethernet23/5",
+                    "Ethernet23/6",
+                    "Ethernet23/7",
+                    "Ethernet23/8"
                 ]
             }
         },
@@ -839,6 +1069,16 @@
                     "Ethernet24/3",
                     "Ethernet24/5",
                     "Ethernet24/7"
+                ],
+                "8x100G": [
+                    "Ethernet24/1",
+                    "Ethernet24/2",
+                    "Ethernet24/3",
+                    "Ethernet24/4",
+                    "Ethernet24/5",
+                    "Ethernet24/6",
+                    "Ethernet24/7",
+                    "Ethernet24/8"
                 ]
             }
         },
@@ -861,6 +1101,16 @@
                     "Ethernet25/3",
                     "Ethernet25/5",
                     "Ethernet25/7"
+                ],
+                "8x100G": [
+                    "Ethernet25/1",
+                    "Ethernet25/2",
+                    "Ethernet25/3",
+                    "Ethernet25/4",
+                    "Ethernet25/5",
+                    "Ethernet25/6",
+                    "Ethernet25/7",
+                    "Ethernet25/8"
                 ]
             }
         },
@@ -883,6 +1133,16 @@
                     "Ethernet26/3",
                     "Ethernet26/5",
                     "Ethernet26/7"
+                ],
+                "8x100G": [
+                    "Ethernet26/1",
+                    "Ethernet26/2",
+                    "Ethernet26/3",
+                    "Ethernet26/4",
+                    "Ethernet26/5",
+                    "Ethernet26/6",
+                    "Ethernet26/7",
+                    "Ethernet26/8"
                 ]
             }
         },
@@ -905,6 +1165,16 @@
                     "Ethernet27/3",
                     "Ethernet27/5",
                     "Ethernet27/7"
+                ],
+                "8x100G": [
+                    "Ethernet27/1",
+                    "Ethernet27/2",
+                    "Ethernet27/3",
+                    "Ethernet27/4",
+                    "Ethernet27/5",
+                    "Ethernet27/6",
+                    "Ethernet27/7",
+                    "Ethernet27/8"
                 ]
             }
         },
@@ -927,6 +1197,16 @@
                     "Ethernet28/3",
                     "Ethernet28/5",
                     "Ethernet28/7"
+                ],
+                "8x100G": [
+                    "Ethernet28/1",
+                    "Ethernet28/2",
+                    "Ethernet28/3",
+                    "Ethernet28/4",
+                    "Ethernet28/5",
+                    "Ethernet28/6",
+                    "Ethernet28/7",
+                    "Ethernet28/8"
                 ]
             }
         },
@@ -949,6 +1229,16 @@
                     "Ethernet29/3",
                     "Ethernet29/5",
                     "Ethernet29/7"
+                ],
+                "8x100G": [
+                    "Ethernet29/1",
+                    "Ethernet29/2",
+                    "Ethernet29/3",
+                    "Ethernet29/4",
+                    "Ethernet29/5",
+                    "Ethernet29/6",
+                    "Ethernet29/7",
+                    "Ethernet29/8"
                 ]
             }
         },
@@ -971,6 +1261,16 @@
                     "Ethernet30/3",
                     "Ethernet30/5",
                     "Ethernet30/7"
+                ],
+                "8x100G": [
+                    "Ethernet30/1",
+                    "Ethernet30/2",
+                    "Ethernet30/3",
+                    "Ethernet30/4",
+                    "Ethernet30/5",
+                    "Ethernet30/6",
+                    "Ethernet30/7",
+                    "Ethernet30/8"
                 ]
             }
         },
@@ -993,6 +1293,16 @@
                     "Ethernet31/3",
                     "Ethernet31/5",
                     "Ethernet31/7"
+                ],
+                "8x100G": [
+                    "Ethernet31/1",
+                    "Ethernet31/2",
+                    "Ethernet31/3",
+                    "Ethernet31/4",
+                    "Ethernet31/5",
+                    "Ethernet31/6",
+                    "Ethernet31/7",
+                    "Ethernet31/8"
                 ]
             }
         },
@@ -1015,6 +1325,16 @@
                     "Ethernet32/3",
                     "Ethernet32/5",
                     "Ethernet32/7"
+                ],
+                "8x100G": [
+                    "Ethernet32/1",
+                    "Ethernet32/2",
+                    "Ethernet32/3",
+                    "Ethernet32/4",
+                    "Ethernet32/5",
+                    "Ethernet32/6",
+                    "Ethernet32/7",
+                    "Ethernet32/8"
                 ]
             }
         },
@@ -1037,6 +1357,16 @@
                     "Ethernet33/3",
                     "Ethernet33/5",
                     "Ethernet33/7"
+                ],
+                "8x100G": [
+                    "Ethernet33/1",
+                    "Ethernet33/2",
+                    "Ethernet33/3",
+                    "Ethernet33/4",
+                    "Ethernet33/5",
+                    "Ethernet33/6",
+                    "Ethernet33/7",
+                    "Ethernet33/8"
                 ]
             }
         },
@@ -1059,6 +1389,16 @@
                     "Ethernet34/3",
                     "Ethernet34/5",
                     "Ethernet34/7"
+                ],
+                "8x100G": [
+                    "Ethernet34/1",
+                    "Ethernet34/2",
+                    "Ethernet34/3",
+                    "Ethernet34/4",
+                    "Ethernet34/5",
+                    "Ethernet34/6",
+                    "Ethernet34/7",
+                    "Ethernet34/8"
                 ]
             }
         },
@@ -1081,6 +1421,16 @@
                     "Ethernet35/3",
                     "Ethernet35/5",
                     "Ethernet35/7"
+                ],
+                "8x100G": [
+                    "Ethernet35/1",
+                    "Ethernet35/2",
+                    "Ethernet35/3",
+                    "Ethernet35/4",
+                    "Ethernet35/5",
+                    "Ethernet35/6",
+                    "Ethernet35/7",
+                    "Ethernet35/8"
                 ]
             }
         },
@@ -1103,6 +1453,16 @@
                     "Ethernet36/3",
                     "Ethernet36/5",
                     "Ethernet36/7"
+                ],
+                "8x100G": [
+                    "Ethernet36/1",
+                    "Ethernet36/2",
+                    "Ethernet36/3",
+                    "Ethernet36/4",
+                    "Ethernet36/5",
+                    "Ethernet36/6",
+                    "Ethernet36/7",
+                    "Ethernet36/8"
                 ]
             }
         },
@@ -1125,6 +1485,16 @@
                     "Ethernet37/3",
                     "Ethernet37/5",
                     "Ethernet37/7"
+                ],
+                "8x100G": [
+                    "Ethernet37/1",
+                    "Ethernet37/2",
+                    "Ethernet37/3",
+                    "Ethernet37/4",
+                    "Ethernet37/5",
+                    "Ethernet37/6",
+                    "Ethernet37/7",
+                    "Ethernet37/8"
                 ]
             }
         },
@@ -1147,6 +1517,16 @@
                     "Ethernet38/3",
                     "Ethernet38/5",
                     "Ethernet38/7"
+                ],
+                "8x100G": [
+                    "Ethernet38/1",
+                    "Ethernet38/2",
+                    "Ethernet38/3",
+                    "Ethernet38/4",
+                    "Ethernet38/5",
+                    "Ethernet38/6",
+                    "Ethernet38/7",
+                    "Ethernet38/8"
                 ]
             }
         },
@@ -1169,6 +1549,16 @@
                     "Ethernet39/3",
                     "Ethernet39/5",
                     "Ethernet39/7"
+                ],
+                "8x100G": [
+                    "Ethernet39/1",
+                    "Ethernet39/2",
+                    "Ethernet39/3",
+                    "Ethernet39/4",
+                    "Ethernet39/5",
+                    "Ethernet39/6",
+                    "Ethernet39/7",
+                    "Ethernet39/8"
                 ]
             }
         },
@@ -1191,6 +1581,16 @@
                     "Ethernet40/3",
                     "Ethernet40/5",
                     "Ethernet40/7"
+                ],
+                "8x100G": [
+                    "Ethernet40/1",
+                    "Ethernet40/2",
+                    "Ethernet40/3",
+                    "Ethernet40/4",
+                    "Ethernet40/5",
+                    "Ethernet40/6",
+                    "Ethernet40/7",
+                    "Ethernet40/8"
                 ]
             }
         },
@@ -1213,6 +1613,16 @@
                     "Ethernet41/3",
                     "Ethernet41/5",
                     "Ethernet41/7"
+                ],
+                "8x100G": [
+                    "Ethernet41/1",
+                    "Ethernet41/2",
+                    "Ethernet41/3",
+                    "Ethernet41/4",
+                    "Ethernet41/5",
+                    "Ethernet41/6",
+                    "Ethernet41/7",
+                    "Ethernet41/8"
                 ]
             }
         },
@@ -1235,6 +1645,16 @@
                     "Ethernet42/3",
                     "Ethernet42/5",
                     "Ethernet42/7"
+                ],
+                "8x100G": [
+                    "Ethernet42/1",
+                    "Ethernet42/2",
+                    "Ethernet42/3",
+                    "Ethernet42/4",
+                    "Ethernet42/5",
+                    "Ethernet42/6",
+                    "Ethernet42/7",
+                    "Ethernet42/8"
                 ]
             }
         },
@@ -1257,6 +1677,16 @@
                     "Ethernet43/3",
                     "Ethernet43/5",
                     "Ethernet43/7"
+                ],
+                "8x100G": [
+                    "Ethernet43/1",
+                    "Ethernet43/2",
+                    "Ethernet43/3",
+                    "Ethernet43/4",
+                    "Ethernet43/5",
+                    "Ethernet43/6",
+                    "Ethernet43/7",
+                    "Ethernet43/8"
                 ]
             }
         },
@@ -1279,6 +1709,16 @@
                     "Ethernet44/3",
                     "Ethernet44/5",
                     "Ethernet44/7"
+                ],
+                "8x100G": [
+                    "Ethernet44/1",
+                    "Ethernet44/2",
+                    "Ethernet44/3",
+                    "Ethernet44/4",
+                    "Ethernet44/5",
+                    "Ethernet44/6",
+                    "Ethernet44/7",
+                    "Ethernet44/8"
                 ]
             }
         },
@@ -1301,6 +1741,16 @@
                     "Ethernet45/3",
                     "Ethernet45/5",
                     "Ethernet45/7"
+                ],
+                "8x100G": [
+                    "Ethernet45/1",
+                    "Ethernet45/2",
+                    "Ethernet45/3",
+                    "Ethernet45/4",
+                    "Ethernet45/5",
+                    "Ethernet45/6",
+                    "Ethernet45/7",
+                    "Ethernet45/8"
                 ]
             }
         },
@@ -1323,6 +1773,16 @@
                     "Ethernet46/3",
                     "Ethernet46/5",
                     "Ethernet46/7"
+                ],
+                "8x100G": [
+                    "Ethernet46/1",
+                    "Ethernet46/2",
+                    "Ethernet46/3",
+                    "Ethernet46/4",
+                    "Ethernet46/5",
+                    "Ethernet46/6",
+                    "Ethernet46/7",
+                    "Ethernet46/8"
                 ]
             }
         },
@@ -1345,6 +1805,16 @@
                     "Ethernet47/3",
                     "Ethernet47/5",
                     "Ethernet47/7"
+                ],
+                "8x100G": [
+                    "Ethernet47/1",
+                    "Ethernet47/2",
+                    "Ethernet47/3",
+                    "Ethernet47/4",
+                    "Ethernet47/5",
+                    "Ethernet47/6",
+                    "Ethernet47/7",
+                    "Ethernet47/8"
                 ]
             }
         },
@@ -1367,6 +1837,16 @@
                     "Ethernet48/3",
                     "Ethernet48/5",
                     "Ethernet48/7"
+                ],
+                "8x100G": [
+                    "Ethernet48/1",
+                    "Ethernet48/2",
+                    "Ethernet48/3",
+                    "Ethernet48/4",
+                    "Ethernet48/5",
+                    "Ethernet48/6",
+                    "Ethernet48/7",
+                    "Ethernet48/8"
                 ]
             }
         },
@@ -1389,6 +1869,16 @@
                     "Ethernet49/3",
                     "Ethernet49/5",
                     "Ethernet49/7"
+                ],
+                "8x100G": [
+                    "Ethernet49/1",
+                    "Ethernet49/2",
+                    "Ethernet49/3",
+                    "Ethernet49/4",
+                    "Ethernet49/5",
+                    "Ethernet49/6",
+                    "Ethernet49/7",
+                    "Ethernet49/8"
                 ]
             }
         },
@@ -1411,6 +1901,16 @@
                     "Ethernet50/3",
                     "Ethernet50/5",
                     "Ethernet50/7"
+                ],
+                "8x100G": [
+                    "Ethernet50/1",
+                    "Ethernet50/2",
+                    "Ethernet50/3",
+                    "Ethernet50/4",
+                    "Ethernet50/5",
+                    "Ethernet50/6",
+                    "Ethernet50/7",
+                    "Ethernet50/8"
                 ]
             }
         },
@@ -1433,6 +1933,16 @@
                     "Ethernet51/3",
                     "Ethernet51/5",
                     "Ethernet51/7"
+                ],
+                "8x100G": [
+                    "Ethernet51/1",
+                    "Ethernet51/2",
+                    "Ethernet51/3",
+                    "Ethernet51/4",
+                    "Ethernet51/5",
+                    "Ethernet51/6",
+                    "Ethernet51/7",
+                    "Ethernet51/8"
                 ]
             }
         },
@@ -1455,6 +1965,16 @@
                     "Ethernet52/3",
                     "Ethernet52/5",
                     "Ethernet52/7"
+                ],
+                "8x100G": [
+                    "Ethernet52/1",
+                    "Ethernet52/2",
+                    "Ethernet52/3",
+                    "Ethernet52/4",
+                    "Ethernet52/5",
+                    "Ethernet52/6",
+                    "Ethernet52/7",
+                    "Ethernet52/8"
                 ]
             }
         },
@@ -1477,6 +1997,16 @@
                     "Ethernet53/3",
                     "Ethernet53/5",
                     "Ethernet53/7"
+                ],
+                "8x100G": [
+                    "Ethernet53/1",
+                    "Ethernet53/2",
+                    "Ethernet53/3",
+                    "Ethernet53/4",
+                    "Ethernet53/5",
+                    "Ethernet53/6",
+                    "Ethernet53/7",
+                    "Ethernet53/8"
                 ]
             }
         },
@@ -1499,6 +2029,16 @@
                     "Ethernet54/3",
                     "Ethernet54/5",
                     "Ethernet54/7"
+                ],
+                "8x100G": [
+                    "Ethernet54/1",
+                    "Ethernet54/2",
+                    "Ethernet54/3",
+                    "Ethernet54/4",
+                    "Ethernet54/5",
+                    "Ethernet54/6",
+                    "Ethernet54/7",
+                    "Ethernet54/8"
                 ]
             }
         },
@@ -1521,6 +2061,16 @@
                     "Ethernet55/3",
                     "Ethernet55/5",
                     "Ethernet55/7"
+                ],
+                "8x100G": [
+                    "Ethernet55/1",
+                    "Ethernet55/2",
+                    "Ethernet55/3",
+                    "Ethernet55/4",
+                    "Ethernet55/5",
+                    "Ethernet55/6",
+                    "Ethernet55/7",
+                    "Ethernet55/8"
                 ]
             }
         },
@@ -1543,6 +2093,16 @@
                     "Ethernet56/3",
                     "Ethernet56/5",
                     "Ethernet56/7"
+                ],
+                "8x100G": [
+                    "Ethernet56/1",
+                    "Ethernet56/2",
+                    "Ethernet56/3",
+                    "Ethernet56/4",
+                    "Ethernet56/5",
+                    "Ethernet56/6",
+                    "Ethernet56/7",
+                    "Ethernet56/8"
                 ]
             }
         },
@@ -1565,6 +2125,16 @@
                     "Ethernet57/3",
                     "Ethernet57/5",
                     "Ethernet57/7"
+                ],
+                "8x100G": [
+                    "Ethernet57/1",
+                    "Ethernet57/2",
+                    "Ethernet57/3",
+                    "Ethernet57/4",
+                    "Ethernet57/5",
+                    "Ethernet57/6",
+                    "Ethernet57/7",
+                    "Ethernet57/8"
                 ]
             }
         },
@@ -1587,6 +2157,16 @@
                     "Ethernet58/3",
                     "Ethernet58/5",
                     "Ethernet58/7"
+                ],
+                "8x100G": [
+                    "Ethernet58/1",
+                    "Ethernet58/2",
+                    "Ethernet58/3",
+                    "Ethernet58/4",
+                    "Ethernet58/5",
+                    "Ethernet58/6",
+                    "Ethernet58/7",
+                    "Ethernet58/8"
                 ]
             }
         },
@@ -1609,6 +2189,16 @@
                     "Ethernet59/3",
                     "Ethernet59/5",
                     "Ethernet59/7"
+                ],
+                "8x100G": [
+                    "Ethernet59/1",
+                    "Ethernet59/2",
+                    "Ethernet59/3",
+                    "Ethernet59/4",
+                    "Ethernet59/5",
+                    "Ethernet59/6",
+                    "Ethernet59/7",
+                    "Ethernet59/8"
                 ]
             }
         },
@@ -1631,6 +2221,16 @@
                     "Ethernet60/3",
                     "Ethernet60/5",
                     "Ethernet60/7"
+                ],
+                "8x100G": [
+                    "Ethernet60/1",
+                    "Ethernet60/2",
+                    "Ethernet60/3",
+                    "Ethernet60/4",
+                    "Ethernet60/5",
+                    "Ethernet60/6",
+                    "Ethernet60/7",
+                    "Ethernet60/8"
                 ]
             }
         },
@@ -1653,6 +2253,16 @@
                     "Ethernet61/3",
                     "Ethernet61/5",
                     "Ethernet61/7"
+                ],
+                "8x100G": [
+                    "Ethernet61/1",
+                    "Ethernet61/2",
+                    "Ethernet61/3",
+                    "Ethernet61/4",
+                    "Ethernet61/5",
+                    "Ethernet61/6",
+                    "Ethernet61/7",
+                    "Ethernet61/8"
                 ]
             }
         },
@@ -1675,6 +2285,16 @@
                     "Ethernet62/3",
                     "Ethernet62/5",
                     "Ethernet62/7"
+                ],
+                "8x100G": [
+                    "Ethernet62/1",
+                    "Ethernet62/2",
+                    "Ethernet62/3",
+                    "Ethernet62/4",
+                    "Ethernet62/5",
+                    "Ethernet62/6",
+                    "Ethernet62/7",
+                    "Ethernet62/8"
                 ]
             }
         },
@@ -1697,6 +2317,16 @@
                     "Ethernet63/3",
                     "Ethernet63/5",
                     "Ethernet63/7"
+                ],
+                "8x100G": [
+                    "Ethernet63/1",
+                    "Ethernet63/2",
+                    "Ethernet63/3",
+                    "Ethernet63/4",
+                    "Ethernet63/5",
+                    "Ethernet63/6",
+                    "Ethernet63/7",
+                    "Ethernet63/8"
                 ]
             }
         },
@@ -1719,6 +2349,16 @@
                     "Ethernet64/3",
                     "Ethernet64/5",
                     "Ethernet64/7"
+                ],
+                "8x100G": [
+                    "Ethernet64/1",
+                    "Ethernet64/2",
+                    "Ethernet64/3",
+                    "Ethernet64/4",
+                    "Ethernet64/5",
+                    "Ethernet64/6",
+                    "Ethernet64/7",
+                    "Ethernet64/8"
                 ]
             }
         },

From 358d09303d85bf9d9c3cb3eddfb227f606082150 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 6 Oct 2024 19:00:53 +0800
Subject: [PATCH 065/364] [submodule] Update submodule sonic-swss to the latest
 HEAD automatically (#20424)

#### Why I did it
src/sonic-swss
```
* 8b99543f - (HEAD -> master, origin/master, origin/HEAD) Fix portmgr write partial port config to app DB issue. (#3304) (33 hours ago) [Hua Liu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 3c230d2b51eb..8b99543fa274 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 3c230d2b51ebf2ffc7163b2641ffab7ef358bfd4
+Subproject commit 8b99543fa274f083d81f6a07442b267741ceede9

From 23346de45f4e139d60f6119910b8f57ab7956520 Mon Sep 17 00:00:00 2001
From: Patrick MacArthur <pmacarthur@arista.com>
Date: Mon, 7 Oct 2024 14:08:55 -0400
Subject: [PATCH 066/364] [Arista]: Add chassis temperature sensors (#19718)

This allows the chassis temperature sensor sonic-mgmt tests to pass on Arista 7800 chassis platform.
---
 .../x86_64-arista_7800_sup/platform.json      | 35 ++++++++++++++++++-
 1 file changed, 34 insertions(+), 1 deletion(-)

diff --git a/device/arista/x86_64-arista_7800_sup/platform.json b/device/arista/x86_64-arista_7800_sup/platform.json
index 0f9e91af98e8..85f2949ac04d 100644
--- a/device/arista/x86_64-arista_7800_sup/platform.json
+++ b/device/arista/x86_64-arista_7800_sup/platform.json
@@ -210,7 +210,40 @@
                 ]
             }
         ],
-        "thermals": [],
+        "thermals": [
+            {
+                "name": "Supervisor front",
+                "controllable": false
+            },
+            {
+                "name": "Physical id 0",
+                "controllable": false
+            },
+            {
+                "name": "CPU core0",
+                "controllable": false
+            },
+            {
+                "name": "CPU core1",
+                "controllable": false
+            },
+            {
+                "name": "CPU core2",
+                "controllable": false
+            },
+            {
+                "name": "CPU core3",
+                "controllable": false
+            },
+            {
+                "name": "CPU core4",
+                "controllable": false
+            },
+            {
+                "name": "CPU core5",
+                "controllable": false
+            }
+        ],
         "sfps": []
     },
     "interfaces": {}

From b392123a8b125c5fb1a45e47d6d70c407c401dc1 Mon Sep 17 00:00:00 2001
From: Vijaya Kumar Abbaraju <vijaya-kumar.abbaraju@broadcom.com>
Date: Tue, 8 Oct 2024 03:05:12 +0530
Subject: [PATCH 067/364] PAC infra sysapi files (#18646)

---
 src/sonic-pac/fpinfra/sysapi/sysapi.c        | 137 +++++++
 src/sonic-pac/fpinfra/sysapi/sysapi_hpc.c    |  45 +++
 src/sonic-pac/fpinfra/sysapi/sysapi_if_net.c | 389 +++++++++++++++++++
 3 files changed, 571 insertions(+)
 create mode 100644 src/sonic-pac/fpinfra/sysapi/sysapi.c
 create mode 100644 src/sonic-pac/fpinfra/sysapi/sysapi_hpc.c
 create mode 100644 src/sonic-pac/fpinfra/sysapi/sysapi_if_net.c

diff --git a/src/sonic-pac/fpinfra/sysapi/sysapi.c b/src/sonic-pac/fpinfra/sysapi/sysapi.c
new file mode 100644
index 000000000000..642a9e62ca53
--- /dev/null
+++ b/src/sonic-pac/fpinfra/sysapi/sysapi.c
@@ -0,0 +1,137 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <string.h>
+#include "pacinfra_common.h"
+#include "product.h"
+#include "resources.h"
+#include "osapi.h"
+#include "sysapi.h"
+#include "defaultconfig.h"
+
+static void * sysapiTimerTaskID = 0;
+
+/*************************************
+ * Mbuf Queue declarations
+ *************************************/
+void **pMbufQTop;      /* top of queue */
+void **pMbufQBot;      /* bottom of queue */
+void **MbufQHead;
+void **MbufQTail;
+uint32 MbufsFree;
+uint32 MbufsRxUsed;
+uint32 MbufsMaxFree;
+void      *pMbufPool;
+
+
+/**************************************************************************
+ *
+ * @purpose  Task that creates the application timer function
+ *
+ * @param    none
+ *
+ * @returns  none.
+ *
+ * @notes If the task is already created, just return.
+ *
+ * @end
+ *
+ *************************************************************************/
+void sysapiTimerTaskStart(void)
+{
+  if ( sysapiTimerTaskID != 0 )
+  {
+    return;
+  }
+  sysapiTimerTaskID = osapiTaskCreate(   "osapiTimer",
+      (void *)osapiTimerHandler,
+      0,
+       NULLPTR,
+       DEFAULT_STACK_SIZE,
+       MEDIUM_TASK_PRIORITY,
+       DEFAULT_TASK_SLICE);
+
+  /* Wait for osapiTimer task to finish initialization.*/
+  if (osapiWaitForTaskInit( OSAPI_TIMER_TASK_SYNC,  WAIT_FOREVER) !=  SUCCESS)
+  {
+    //SYSAPI_PRINTF(SYSAPI_LOGGING_ALWAYS, "In routine %s line %d, osapiWaitForTaskInit failed\n",
+    //    __FUNCTION__, __LINE__);
+    //LOG_ERROR(0);
+  }
+  return;
+}
+
+/**************************************************************************
+ * @purpose  Initialize the sysapi component
+ *
+ * @param    none
+ *
+ * @returns   SUCCESS
+ * @returns   ERROR
+ *
+ * @notes
+ *
+ * @end
+ *
+ *************************************************************************/
+RC_t sysapiSystemInit(void)
+{
+   int32 i;
+  uint32 temp32;
+  uint32 phy_size = 0;
+  uint32 mtu_size = FD_NIM_DEFAULT_MTU_SIZE;
+
+  /* initialize system timers */
+  sysapiTimerTaskStart();
+
+  /* Reserve extra space for control overhead. */
+  phy_size += (sizeof(SYSAPI_NET_MBUF_HEADER_t) + NET_MBUF_START_OFFSET + 64);
+
+  temp32 = phy_size + mtu_size + SYSAPI_PKT_BUF_ALIGN_LEN;
+
+  pMbufPool = osapiMalloc (  SIM_COMPONENT_ID,  MAX_NETWORK_BUFF_PER_BOX * ( temp32 ) );
+  if ( pMbufPool ==  NULLPTR )
+    return( ERROR);
+
+
+  /********************************************************
+   * Allocate the "mbuf" Queue. Each entry is a 32 bit ptr
+   *********************************************************/
+  pMbufQTop = ( void ** )osapiMalloc (  SIM_COMPONENT_ID,  MAX_NETWORK_BUFF_PER_BOX * sizeof (void *));
+  if ( pMbufQTop ==  NULLPTR )
+    return( ERROR);
+
+  /***************************************************
+   * Initialize the "mbuf" Queue and counter.
+   ****************************************************/
+  MbufQHead = pMbufQTop;
+  MbufQTail = pMbufQTop;
+  MbufsMaxFree =  MAX_NETWORK_BUFF_PER_BOX;
+  MbufsFree = MbufsMaxFree;
+  MbufsRxUsed = 0;
+  memset(&mbuf_stats, 0, sizeof(mbuf_stats_t));
+
+  for ( i=0;i<( int32)MbufsFree;i++ )
+  {
+    *MbufQHead = ( void * ) ( ( uchar8 *)pMbufPool + i * ( temp32 ));
+    MbufQHead++;
+  }
+  pMbufQBot = --MbufQHead;            /* set bottom of queue ptr */
+  MbufQHead = pMbufQTop;              /* reset head ptr to top */
+
+
+  return( SUCCESS);
+}
diff --git a/src/sonic-pac/fpinfra/sysapi/sysapi_hpc.c b/src/sonic-pac/fpinfra/sysapi/sysapi_hpc.c
new file mode 100644
index 000000000000..1401c9662f38
--- /dev/null
+++ b/src/sonic-pac/fpinfra/sysapi/sysapi_hpc.c
@@ -0,0 +1,45 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "pacinfra_common.h"
+
+typedef struct
+{
+   IANA_INTF_TYPE_t   type;
+   PORT_SPEEDS_t      defaultSpeed;
+   uint64             phyCapabilities; /* combination of all applicable  PHY_CAPABILITIES_t */
+  /* CONNECTOR_TYPES_t  connectorType;*/
+   fec_mode_t         defaultFEC;
+  uint32             fecCapabilities; /* combination of all applicable  FEC_CAPABILITY_t */
+} SYSAPI_HPC_PORT_DESCRIPTOR_t;
+
+/**************************************************************************
+*
+* @purpose  Return the number of physical ports, given a slot number.
+*
+* @param    slotNum      slot number for requested card ID.
+*
+* @returns  portCount    Number of physical ports in slot number
+*
+* @notes
+*
+* @end
+*
+*************************************************************************/
+uint32 sysapiHpcPhysPortsInSlotGet(int slotNum)
+{
+  return 255; //needs to work on it
+}
diff --git a/src/sonic-pac/fpinfra/sysapi/sysapi_if_net.c b/src/sonic-pac/fpinfra/sysapi/sysapi_if_net.c
new file mode 100644
index 000000000000..778184fa11a7
--- /dev/null
+++ b/src/sonic-pac/fpinfra/sysapi/sysapi_if_net.c
@@ -0,0 +1,389 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include <string.h>
+#include "pacinfra_common.h"
+#include "product.h"
+#include "resources.h"
+#include "osapi.h"
+#include "sysapi.h"
+#include "system_exports.h"
+#include "log.h"
+
+/*************************************
+* Mbuf Queue declarations
+*************************************/
+extern void **pMbufQTop;     /* top of queue */
+extern void **pMbufQBot;     /* bottom of queue */
+extern void **MbufQHead;
+extern void **MbufQTail;
+extern uint32 MbufsFree;
+extern uint32 MbufsRxUsed;
+extern uint32 MbufsMaxFree;
+extern void      *pMbufPool;
+
+mbuf_stats_t mbuf_stats;
+
+#define __USE_GNU
+#include <pthread.h>
+#include <time.h>
+static pthread_mutex_t sysapiMbufMutex = PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP;
+#undef __USE_GNU
+#define SYSAPI_MBUF_LOCK() pthread_mutex_lock(&sysapiMbufMutex)
+#define SYSAPI_MBUF_UNLOCK() pthread_mutex_unlock(&sysapiMbufMutex)
+
+/**************************************************************************
+* @purpose  Function used to track the Mbuf with the file name and the line num.
+*           This can be used by the individual components for further tracking of Mbuf.
+*
+* @param    netMbufHandle - Ptr to network mbuf handle
+* @param    file - file name
+* @param    line - line number
+*
+* @returns  void
+*
+* @comments
+*
+* @end
+*************************************************************************/
+void sysapiNetMbufTrack( netBufHandle netMbufHandle,  uchar8 *file, uint32 line)
+{
+  SYSAPI_NET_MBUF_HEADER_t *bufHandle = (SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle;
+
+  osapiStrncpySafe(bufHandle->last_file, file, sizeof(bufHandle->last_file));
+  bufHandle->last_line = line;
+}
+
+
+/**************************************************************************
+*
+* @purpose  Retrieve a network mbuf to the caller (and track the caller)
+*
+* @param    none.
+*
+* @returns  A ptr to a network mbuf handle
+* @returns  0 if none are available
+*
+* @notes    Delegates to sysapiNetMbufGet
+*
+* @end
+*
+*************************************************************************/
+ netBufHandle sysapiNetMbufGetTrack(const  char8 *file, uint32 line)
+{
+  SYSAPI_NET_MBUF_HEADER_t *netMbufHandle = 0;
+
+  /* get the MBUF */
+  netMbufHandle = (SYSAPI_NET_MBUF_HEADER_t *)sysapiNetMbufGet();
+
+  /* store tracking information */
+  if(netMbufHandle)
+  {
+    osapiStrncpySafe(netMbufHandle->last_file, file, sizeof(netMbufHandle->last_file));
+    netMbufHandle->last_line = line;
+    netMbufHandle->mbufLoc = MBUF_LOC_ALLOC;
+
+  }
+
+  return(( netBufHandle)netMbufHandle);
+}
+
+
+/**************************************************************************
+* @purpose  Retrieve an mbuf to the caller
+*
+* @param    none.
+*
+* @returns  A ptr to an mbuf
+* @returns   NULL if none are available
+*
+* @comments    Use the Mutex semaphore to inhibit global variable corruption
+*
+* @end
+*************************************************************************/
+static uint32 *sysapiMbufGet( void )
+{
+  void * buffer;
+  uint32 mbufUsed = 0;
+
+  if ( MbufsFree != 0 )
+  {
+    buffer = *MbufQHead;
+    if ( MbufQHead >= pMbufQBot )
+      MbufQHead = pMbufQTop;    /* wrap the Q head ptr */
+    else
+      MbufQHead++;        /* move the Q head ptr */
+    MbufsFree--;         /* keep track...       */
+
+    ((SYSAPI_NET_MBUF_HEADER_t *)buffer)->in_use =  TRUE;
+  }
+  else
+  {
+    buffer =  NULL;
+  }
+
+  mbufUsed = MbufsMaxFree - MbufsFree;
+  /* (void) sysapiMbufUsedNotify(mbufUsed); */
+
+  return( ( uint32 * )buffer );
+}
+
+/**************************************************************************
+* @purpose  Retrieve a network mbuf to the caller
+*
+* @param    none.
+*
+* @returns  A ptr to a network mbuf handle
+* @returns  0 if none are available
+*
+* @comments
+*
+* @end
+*************************************************************************/
+ netBufHandle sysapiNetMbufGet( void )
+{
+  SYSAPI_NET_MBUF_HEADER_t *netMbufHandle;
+
+  SYSAPI_MBUF_LOCK();
+  mbuf_stats.alloc_tx_alloc_attempts++;
+
+  netMbufHandle = (SYSAPI_NET_MBUF_HEADER_t *)sysapiMbufGet();
+  if (netMbufHandle !=  NULL)
+  {
+    netMbufHandle->bufStart  = ( uchar8 *)netMbufHandle + sizeof(SYSAPI_NET_MBUF_HEADER_t) +
+                                NET_MBUF_START_OFFSET;
+
+    netMbufHandle->bufStart = ( char8 *)SYSAPI_BUF_ALIGN(netMbufHandle->bufStart, MBUF_ALIGN_BOUND);
+
+    netMbufHandle->bufLength = 0;
+    netMbufHandle->taskId    = osapiTaskIdSelf();
+    netMbufHandle->timeStamp = osapiUpTimeRaw();
+    netMbufHandle->rxBuffer  =  FALSE;
+
+    /* wipe out tracking information */
+    netMbufHandle->last_file[0] = 0;
+    netMbufHandle->last_line = 0;
+    netMbufHandle->mbufLoc = MBUF_LOC_ALLOC;
+  }
+  else
+  {
+    mbuf_stats.alloc_tx_failures++;
+  }
+
+  SYSAPI_MBUF_UNLOCK();
+
+  return(( netBufHandle)netMbufHandle);
+}
+
+
+/**************************************************************************
+* @purpose  Retrieve an aligned network mbuf to the caller
+*
+* @param    align   @b{(input)}  Alignment indicator, for IP or frame
+*
+* @returns  A ptr to a network mbuf handle
+* @returns  0 if none are available
+*
+* @note     All mbufs are 4 byte aligned
+*
+* @end
+*************************************************************************/
+ netBufHandle sysapiNetMbufAlignGet( uchar8 *file, uint32 line,
+                                       MBUF_ALIGNMENT alignType)
+{
+  SYSAPI_NET_MBUF_HEADER_t *netMbufHandle = 0;
+
+  /* get the MBUF */
+  netMbufHandle = (SYSAPI_NET_MBUF_HEADER_t *)sysapiNetMbufGet();
+
+  /* store tracking information */
+  if(netMbufHandle)
+  {
+    if ( MBUF_IP_ALIGNED == alignType)
+    {
+      /* Compensate for ipheader offset */
+      netMbufHandle->bufStart +=  MBUF_IP_CORRECTION;
+    }
+    osapiStrncpySafe(netMbufHandle->last_file, file, sizeof(netMbufHandle->last_file));
+    netMbufHandle->last_line = line;
+    netMbufHandle->mbufLoc = MBUF_LOC_ALLOC;
+  }
+
+  return(( netBufHandle)netMbufHandle);
+}
+
+/**************************************************************************
+* @purpose  Free a network mbuf with debug information.
+*
+* @param    Ptr to network mbuf handle
+*
+* @returns  void
+*
+* @comments
+*
+* @end
+*************************************************************************/
+void sysapiNetMbufFreeTrack(  netBufHandle netMbufHandle, const  char8 *file, uint32 line)
+{
+  SYSAPI_NET_MBUF_HEADER_t  *header;
+#if  FEAT_CPUSTATS
+  uint32 headNext =  NULL;
+  uint32 traceIndex =  NULL;
+  uint32 currentStep =  NULL;
+#endif /*  FEAT_CPUSTATS */
+
+  header = (SYSAPI_NET_MBUF_HEADER_t *) netMbufHandle;
+
+  if (header->in_use ==  FALSE)
+  {
+    LOG_ERROR ((uint32) ((unsigned long) netMbufHandle));
+  }
+
+  osapiStrncpySafe(header->last_file, file, sizeof(header->last_file));
+  header->last_line = line;
+  header->mbufLoc = MBUF_LOC_FREE;
+
+  sysapiNetMbufFree (netMbufHandle);
+
+}
+
+
+/**************************************************************************
+* @purpose  Return an mbuf to the mbuf pool
+*
+* @param    *mbuf ptr to the mbuf to return
+*
+* @returns  none.
+*
+* @comments    Use the Mutex semaphore to inhibit global variable corruption
+*
+* @end
+*************************************************************************/
+static void sysapiMbufFree(  uint32 *mbuf )
+{
+  uint32 mbufUsed = 0;
+
+
+  *MbufQTail = ( void * )mbuf;
+  if ( MbufQTail >= pMbufQBot )
+    MbufQTail = pMbufQTop;    /* wrap the Q tail ptr */
+  else
+    MbufQTail++;        /* move the Q tail ptr */
+
+  MbufsFree++;         /* keep track...       */
+
+  /* If we have extra buffers then somebody must have freed a buffer twice.
+  ** This is a fatal error.
+  */
+  if (MbufsFree > MbufsMaxFree)
+  {
+    LOG_ERROR ((unsigned long) mbuf);
+  }
+
+  mbufUsed = MbufsMaxFree - MbufsFree;
+  /*(void) sysapiMbufUsedNotify(mbufUsed);*/
+
+
+  return;
+}
+
+/**************************************************************************
+* @purpose  Free a network mbuf
+*
+* @param    Ptr to network mbuf handle
+*
+* @returns  void
+*
+* @comments
+*
+* @end
+*************************************************************************/
+void sysapiNetMbufFree(  netBufHandle netMbufHandle )
+{
+  SYSAPI_MBUF_LOCK();
+  if (netMbufHandle !=  NULL)
+  {
+    if (((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->in_use ==  TRUE)
+    {
+      sysapiMbufRxusedStatsUpdate(((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->priorityPool,
+                                     FALSE);
+    }
+    ((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->bufStart  =  NULL;
+    ((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->bufLength = 0;
+    ((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->taskId    = 0;
+    ((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->timeStamp = 0;
+    ((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->in_use    =  FALSE;
+    ((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->mbufLoc   = MBUF_LOC_FREE;
+    ((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->priorityPool =  MBUF_RX_PRIORITY_NULL;
+    ((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->rxCode    =  MBUF_RX_REASON_NONE;
+
+    if (((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->rxBuffer ==  TRUE)
+    {
+      ((SYSAPI_NET_MBUF_HEADER_t *)netMbufHandle)->rxBuffer =  FALSE;
+
+      MbufsRxUsed--;
+    }
+
+    sysapiMbufFree ((uint32 *)netMbufHandle);
+  }
+  SYSAPI_MBUF_UNLOCK();
+}
+
+
+/**********************************************************************
+* @pupose   To increment or decrement Mbuf stats per RX priority as in
+*            MBUF_RX_PRIORITY
+*
+* @param    priority @b{(input)}  Mbuf priority to increment/decrement
+*                                 corresponding stats
+*           operation @b{(input)} Bool value to increment/decrement
+*                                  TRUE - to increment
+*                                  FALSE - to decrement
+*
+* @returns  SUCCESS,
+*
+* @notes
+*
+* @end
+*
+*********************************************************************/
+RC_t sysapiMbufRxusedStatsUpdate( MBUF_RX_PRIORITY priority,
+                                     BOOL operation)
+{
+  switch(priority)
+  {
+    case  MBUF_RX_PRIORITY_HIGH:
+      operation ? mbuf_stats.alloc_rx_high++ : mbuf_stats.alloc_rx_high--;
+      break;
+    case  MBUF_RX_PRIORITY_MID0:
+      operation ? mbuf_stats.alloc_rx_mid0++ : mbuf_stats.alloc_rx_mid0--;
+      break;
+    case  MBUF_RX_PRIORITY_MID1:
+      operation ? mbuf_stats.alloc_rx_mid1++ : mbuf_stats.alloc_rx_mid1--;
+      break;
+    case  MBUF_RX_PRIORITY_MID2:
+      operation ? mbuf_stats.alloc_rx_mid2++ : mbuf_stats.alloc_rx_mid2--;
+      break;
+    case  MBUF_RX_PRIORITY_NORMAL:
+      operation ? mbuf_stats.alloc_rx_norm++ : mbuf_stats.alloc_rx_norm--;
+      break;
+    default :
+      break;
+  }
+  return  SUCCESS;
+}
+

From 09674f2e94a6293fe0d48534ce1e146e166da06e Mon Sep 17 00:00:00 2001
From: Vijaya Kumar Abbaraju <vijaya-kumar.abbaraju@broadcom.com>
Date: Tue, 8 Oct 2024 03:06:22 +0530
Subject: [PATCH 068/364] PAC infra system related APIs (#18642)

---
 src/sonic-pac/fpinfra/sim/sim.cpp | 122 ++++++++++++++++++++++++++++++
 1 file changed, 122 insertions(+)
 create mode 100644 src/sonic-pac/fpinfra/sim/sim.cpp

diff --git a/src/sonic-pac/fpinfra/sim/sim.cpp b/src/sonic-pac/fpinfra/sim/sim.cpp
new file mode 100644
index 000000000000..724e8df51a41
--- /dev/null
+++ b/src/sonic-pac/fpinfra/sim/sim.cpp
@@ -0,0 +1,122 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <time.h>
+#include "fpnim.h"
+
+extern "C" {
+#include "datatypes.h"
+#include "system_exports.h"
+#include "simapi.h"
+#include "osapi.h"
+}
+
+/*********************************************************************
+* @purpose  Get the Unit's System Mac Address Type
+*
+* @param    none
+*
+* @returns  sysMacType   System Mac Address Type
+*
+* @comments
+*
+* @end
+*********************************************************************/
+uint32 simGetSystemIPMacType(void)
+{
+  return( SYSMAC_BIA);
+}
+
+/*********************************************************************
+* @purpose  Get the Unit's System Burned in Mac Address
+*
+* @param    *sysBIA   @b{(output)} pointer to system burned in mac address
+*                              Length  MAC_ADDR_LEN
+*
+* @returns  none
+*
+* @comments
+*
+* @end
+*********************************************************************/
+void simGetSystemIPBurnedInMac( uchar8 *sysBIA)
+{
+  FpNim * nim = FpNim::getInstance();
+  if(nim)
+  {
+    nim->getSystemMac(sysBIA);
+  }
+}
+
+
+/*********************************************************************
+* @purpose  Get the Unit's System Locally Administered Mac Address
+*
+* @param    *sysLAA   @b{(output)} pointer to system local admin mac address
+*
+* @returns  none
+*
+* @comments
+*
+* @end
+*********************************************************************/
+void simGetSystemIPLocalAdminMac( uchar8 *sysLAA)
+{
+  simGetSystemIPBurnedInMac(sysLAA);
+}
+
+/*********************************************************************
+*
+* @purpose  Get the stack up time
+*
+* @param    none
+*
+* @returns  stack up time in seconds
+*
+* @comments  Stack up time is the time since the stack performed a cold
+*            restart. Stack up time does not reset on a warm restart.
+*
+* @end
+*
+*********************************************************************/
+uint32 simSystemUpTimeGet(void)
+{
+  return osapiUpTimeRaw();
+}
+
+/**********************************************************************
+* @purpose  Adjusts current time for timezone and summer time
+*
+* @returns  Adjusted time
+*
+*
+* @end
+*********************************************************************/
+uint32 simAdjustedTimeGet()
+{
+  struct timespec tp;
+  int rc;
+
+  rc = clock_gettime(CLOCK_REALTIME, &tp);
+  if (rc < 0)
+  {
+      return 0;
+  }
+  return(tp.tv_sec);
+}
+
+
+

From 1ae856e37505159f3eeb3b8bc3ef681166d9f4f5 Mon Sep 17 00:00:00 2001
From: Vijaya Kumar Abbaraju <vijaya-kumar.abbaraju@broadcom.com>
Date: Tue, 8 Oct 2024 04:32:39 +0530
Subject: [PATCH 069/364] Makefile changes for PAC (#18624)

---
 src/sonic-pac/Makefile.am  |  3 ++
 src/sonic-pac/autogen.sh   |  6 +++
 src/sonic-pac/configure.ac | 77 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 86 insertions(+)
 create mode 100644 src/sonic-pac/Makefile.am
 create mode 100755 src/sonic-pac/autogen.sh
 create mode 100644 src/sonic-pac/configure.ac

diff --git a/src/sonic-pac/Makefile.am b/src/sonic-pac/Makefile.am
new file mode 100644
index 000000000000..0b6907063e0e
--- /dev/null
+++ b/src/sonic-pac/Makefile.am
@@ -0,0 +1,3 @@
+SUBDIRS = fpinfra paccfg pacoper authmgr pacmgr hostapdmgr mab mabmgr
+
+ACLOCAL_AMFLAGS = -I m4
diff --git a/src/sonic-pac/autogen.sh b/src/sonic-pac/autogen.sh
new file mode 100755
index 000000000000..c8d0bbe4a251
--- /dev/null
+++ b/src/sonic-pac/autogen.sh
@@ -0,0 +1,6 @@
+#!/bin/bash
+
+libtoolize --force --copy &&
+autoreconf --force --install -I m4
+rm -Rf autom4te.cache
+
diff --git a/src/sonic-pac/configure.ac b/src/sonic-pac/configure.ac
new file mode 100644
index 000000000000..5c51b9d0a892
--- /dev/null
+++ b/src/sonic-pac/configure.ac
@@ -0,0 +1,77 @@
+AC_INIT([sonic-pac],[1.0.0])
+AC_CONFIG_SRCDIR([])
+AC_CONFIG_AUX_DIR(config)
+AM_CONFIG_HEADER(config.h)
+AM_INIT_AUTOMAKE([foreign subdir-objects])
+AC_LANG_C
+AC_LANG([C++])
+AC_PROG_CC
+AC_PROG_CXX
+AC_PROG_LIBTOOL
+AC_HEADER_STDC
+
+AC_CHECK_LIB([hiredis], [redisConnect],,
+    AC_MSG_ERROR([libhiredis is not installed.]))
+
+#AC_CHECK_LIB([nl-genl-3], [genl_connect])
+
+AC_ARG_ENABLE(debug,
+[  --enable-debug      Compile with debugging flags],
+[case "${enableval}" in
+	yes) debug=true ;;
+	no)  debug=false ;;
+	*) AC_MSG_ERROR(bad value ${enableval} for --enable-debug) ;;
+esac],[debug=false])
+AM_CONDITIONAL(DEBUG, test x$debug = xtrue)
+
+CFLAGS_COMMON="-std=c++11 -Wall -fPIC -Wno-write-strings -I/usr/include/libnl3 -I/usr/include/swss -I/usr/include/security"
+
+CFLAGS_COMMON+=" -Werror"
+CFLAGS_COMMON+=" -Wno-reorder"
+#CFLAGS_COMMON+=" -Wno-pointer-sign"
+CFLAGS_COMMON+=" -Wno-unused-but-set-variable"
+CFLAGS_COMMON+=" -Wcast-align"
+CFLAGS_COMMON+=" -Wcast-qual"
+CFLAGS_COMMON+=" -Wdisabled-optimization"
+CFLAGS_COMMON+=" -Wextra"
+CFLAGS_COMMON+=" -Wfloat-equal"
+CFLAGS_COMMON+=" -Wimport"
+CFLAGS_COMMON+=" -Winit-self"
+CFLAGS_COMMON+=" -Winvalid-pch"
+CFLAGS_COMMON+=" -Wlong-long"
+CFLAGS_COMMON+=" -Wmissing-field-initializers"
+CFLAGS_COMMON+=" -Wno-aggregate-return"
+CFLAGS_COMMON+=" -Wno-padded"
+CFLAGS_COMMON+=" -Wno-switch-enum"
+CFLAGS_COMMON+=" -Wno-unused-parameter"
+CFLAGS_COMMON+=" -Wpacked"
+CFLAGS_COMMON+=" -Wpointer-arith"
+CFLAGS_COMMON+=" -Wredundant-decls"
+CFLAGS_COMMON+=" -Wstack-protector"
+CFLAGS_COMMON+=" -Wstrict-aliasing=3"
+CFLAGS_COMMON+=" -Wswitch"
+CFLAGS_COMMON+=" -Wswitch-default"
+CFLAGS_COMMON+=" -Wunreachable-code"
+CFLAGS_COMMON+=" -Wunused"
+CFLAGS_COMMON+=" -Wvariadic-macros"
+CFLAGS_COMMON+=" -Wno-switch-default"
+CFLAGS_COMMON+=" -Wno-long-long"
+CFLAGS_COMMON+=" -Wno-redundant-decls"
+#CFLAGS_COMMON+=" -Wno-misleading-indentation"
+CFLAGS_COMMON+=" -save-temps"
+
+AC_SUBST(CFLAGS_COMMON)
+
+AC_CONFIG_FILES([
+    fpinfra/Makefile
+    paccfg/Makefile
+    pacoper/Makefile
+    authmgr/Makefile
+    pacmgr/Makefile
+    hostapdmgr/Makefile
+    mab/Makefile
+    mabmgr/Makefile
+    Makefile
+])
+
+AC_OUTPUT

From d5f694681231db48b98cb3cec29c1a355e971d1a Mon Sep 17 00:00:00 2001
From: Vijaya Kumar Abbaraju <vijaya-kumar.abbaraju@broadcom.com>
Date: Tue, 8 Oct 2024 04:33:28 +0530
Subject: [PATCH 070/364] Auth mgr Makefile and common header files (#18631)

---
 src/sonic-pac/authmgr/Makefile.am             |   18 +
 src/sonic-pac/authmgr/common/auth_mgr_api.h   | 1856 +++++++++++++++++
 .../authmgr/common/auth_mgr_common.h          |  354 ++++
 .../authmgr/common/auth_mgr_exports.h         |  412 ++++
 src/sonic-pac/authmgr/common/comm_mask.h      |  704 +++++++
 src/sonic-pac/authmgr/common/component_mask.h |  116 ++
 src/sonic-pac/authmgr/common/mab_api.h        |  310 +++
 src/sonic-pac/authmgr/common/mab_exports.h    |   93 +
 8 files changed, 3863 insertions(+)
 create mode 100755 src/sonic-pac/authmgr/Makefile.am
 create mode 100755 src/sonic-pac/authmgr/common/auth_mgr_api.h
 create mode 100755 src/sonic-pac/authmgr/common/auth_mgr_common.h
 create mode 100755 src/sonic-pac/authmgr/common/auth_mgr_exports.h
 create mode 100755 src/sonic-pac/authmgr/common/comm_mask.h
 create mode 100755 src/sonic-pac/authmgr/common/component_mask.h
 create mode 100755 src/sonic-pac/authmgr/common/mab_api.h
 create mode 100755 src/sonic-pac/authmgr/common/mab_exports.h

diff --git a/src/sonic-pac/authmgr/Makefile.am b/src/sonic-pac/authmgr/Makefile.am
new file mode 100755
index 000000000000..e339c3db1dda
--- /dev/null
+++ b/src/sonic-pac/authmgr/Makefile.am
@@ -0,0 +1,18 @@
+sonic_wpa_supp_path = $(top_srcdir)/../wpasupplicant/sonic-wpa-supplicant
+
+INCLUDES =  -I $(top_srcdir)/paccfg -I $(top_srcdir)/pacoper -I $(top_srcdir)/authmgr/common -I $(top_srcdir)/authmgr/mapping/include -I $(top_srcdir)/fpinfra/inc -I $(top_srcdir)/authmgr/mapping/auth_mgr_sid -I $(top_srcdir)/authmgr/protocol/include -I $(sonic_wpa_supp_path)/src/common -I $(sonic_wpa_supp_path)/src/utils -I $(sonic_wpa_supp_path)/src/radius -I $(top_srcdir)/mab/mapping/include
+
+lib_LTLIBRARIES = libauthmgr.la 
+
+if DEBUG
+DBGFLAGS = -ggdb -DDEBUG
+else
+DBGFLAGS = -g -DNDEBUG
+endif
+
+AM_CPPFLAGS = -save-temps -Wall -Wno-pointer-sign -Wno-pointer-sign -Wno-unused-but-set-variable -Wno-address -Wno-array-bounds -Wno-sequence-point -Wno-switch -Wno-uninitialized -Wno-unused-result -Wno-aggressive-loop-optimizations -Wno-sizeof-pointer-memaccess -Wno-unused-local-typedefs -Wno-unused-value -Wno-format-truncation -g  -Werror $(SONIC_COMMON_CFLAGS) -DCONFIG_CTRL_IFACE -DCONFIG_CTRL_IFACE_UNIX -DCONFIG_SONIC_HOSTAPD
+
+libauthmgr_la_SOURCES = $(top_srcdir)/authmgr/protocol/auth_mgr_db.c $(top_srcdir)/authmgr/mapping/auth_mgr_cnfgr.c $(top_srcdir)/authmgr/mapping/auth_mgr_cfg.c $(top_srcdir)/authmgr/mapping/auth_mgr_api.c $(top_srcdir)/authmgr/mapping/auth_mgr_control.c $(top_srcdir)/authmgr/mapping/auth_mgr_client.c $(top_srcdir)/authmgr/mapping/auth_mgr_ih.c $(top_srcdir)/authmgr/mapping/auth_mgr_debug.c $(top_srcdir)/authmgr/mapping/auth_mgr_sid/auth_mgr_sid.c $(top_srcdir)/authmgr/mapping/auth_mgr_dot1x.c $(top_srcdir)/authmgr/mapping/auth_mgr_mab.c $(top_srcdir)/authmgr/mapping/auth_mgr_socket.c $(top_srcdir)/authmgr/protocol/auth_mgr_sm.c $(top_srcdir)/authmgr/protocol/auth_mgr_mac_db.c $(top_srcdir)/authmgr/protocol/auth_mgr_radius.c $(top_srcdir)/authmgr/protocol/auth_mgr_timer.c $(top_srcdir)/authmgr/protocol/auth_mgr_utils.c $(top_srcdir)/authmgr/protocol/auth_mgr_vlan.c $(top_srcdir)/authmgr/protocol/auth_mgr_vlan_db.c $(top_srcdir)/authmgr/protocol/auth_mgr_txrx.c $(sonic_wpa_supp_path)/src/common/wpa_ctrl.c $(sonic_wpa_supp_path)/src/utils/os_unix.c
+
+libauthmgr_la_LIBADD = -L$(top_srcdir)/fpinfra/ -lfpinfra -L$(top_srcdir)/paccfg/ -lpaccfg -L$(top_srcdir)/pacoper/ -lpacoper $(SONIC_COMMON_LDFLAGS)
+
diff --git a/src/sonic-pac/authmgr/common/auth_mgr_api.h b/src/sonic-pac/authmgr/common/auth_mgr_api.h
new file mode 100755
index 000000000000..678fc7b7706c
--- /dev/null
+++ b/src/sonic-pac/authmgr/common/auth_mgr_api.h
@@ -0,0 +1,1856 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#ifndef __AUTH_MGR_API_H_
+#define __AUTH_MGR_API_H_
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "auth_mgr_exports.h"
+#include "datatypes.h" 
+
+
+typedef struct authmgrAuthRespParams_s
+{
+   AUTHMGR_METHOD_t method;
+   AUTHMGR_STATUS_t status;
+  authmgrClientStatusInfo_t clientParams;
+}authmgrAuthRespParams_t;
+
+
+/*********************************************************************
+* @purpose  Get initialize value for a port
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    *initialize @b{(output)} initialize value
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments This value indicates whether a port is being initialized
+*           due to a management request
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortInitializeGet(uint32 intIfNum,  BOOL *initialize);
+
+/*********************************************************************
+* @purpose  Set initialize value for a port
+*
+* @param    intIfNum   @b{(input)} internal interface number
+* @param    initialize @b{(input)} initialize value
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments This value is set to  TRUE by management in order to force
+*           initialization of a port.  It is re-set to  FALSE after
+*           initialization has completed.
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortInitializeSet(uint32 intIfNum,  BOOL initialize);
+
+/*********************************************************************
+* @purpose  Get auth mgr reauthenticate timer value
+*
+* @param    intIfNum     @b{(input)} internal interface number
+* @param    *timerVal@b{(output)}reauthenticate timer value 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments 
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortAuthRestartTimerGet(uint32 intIfNum, uint32 *timerVal);
+
+/*********************************************************************
+* @purpose  Set auth mgr reauthenticate timer value
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    timerval @b{(input)} reauthenticate timer value 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments Authentication restart timer value , for which the port will wait before,
+            retstarting authentication when all the authentication methods fail.
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortAuthRestartTimerSet(uint32 intIfNum, uint32 timerVal);
+
+/*********************************************************************
+* @purpose  Set auth mgr method or priority 
+*
+* @param    mode   @b{(input)} order or priority 
+* @param    index @b{(input)} position of the method or order 
+* @param    method @b{(input)} authentication manager methods,
+                               i.e.dot1x/mab/cp
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments Authentication restart timer value , for which the port will wait before,
+            retstarting authentication when all the authentication methods fail.
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortAuthMethodSet( AUTHMGR_METHOD_TYPE_t mode, uint32 intIfNum,
+        uint32 index,  AUTHMGR_METHOD_t method);
+/*********************************************************************
+* @purpose  Get auth mgr method or priority 
+*
+* @param    mode   @b{(input)} order or priority 
+* @param    index @b{(input)} position of the method or order 
+* @param    *method @b{(output)} authentication manager methods,
+                               i.e.dot1x/mab/cp
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments Authentication restart timer value , for which the port will wait before,
+            retstarting authentication when all the authentication methods fail.
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortAuthMethodGet( AUTHMGR_METHOD_TYPE_t mode, uint32 intIfNum,
+        uint32 index,  AUTHMGR_METHOD_t *method);
+
+/*********************************************************************
+ * @purpose  Clear authmgr stats for specified port
+ *
+ * @param    intIfNum     @b{(input)} internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrPortStatsClear(uint32 intIfNum);
+/*********************************************************************
+ * @purpose  Get authmgr stats for specified port
+ *
+ * @param    intIfNum     @b{(input)} internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrPortStatsGet(uint32 intIfNum,  AUTHMGR_STATS_TYPE_t method, uint32 *stats);
+
+/*********************************************************************
+* @purpose  Return Internal Interface Number of next valid interface for
+*           authmgr.
+*
+* @param    intIfNum  @b{(input)}   Internal Interface Number
+* @param    pNextintIfNum @b{(output)}  pointer to Next Internal Interface Number,
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrNextValidIntf(uint32 intIfNum, uint32 *pNextIntIfNum);
+/*********************************************************************
+* @purpose  Return Internal Interface Number of the first valid interface for
+*           authmgr.
+*
+* @param    pFirstIntIfNum @b{(output)}  pointer to first internal interface number
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrFirstValidIntfNumber(uint32 *pFirstIntIfNum);
+
+/*********************************************************************
+* @purpose  Returns the first logical port for the physcial interface
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    lIntIfNum    @b((output)) the logical interface
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortFirstGet(uint32 intIfNum,uint32 *lIntIfNum);
+
+/*********************************************************************
+* @purpose  Returns the first logical port for the physcial interface
+*
+* @param    lIntIfNum    @b((input)) the logical interface
+* @param    nextIntf    @b{(ouput)}  the next interface
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortNextGet(uint32 lIntIfNum,uint32 *nextIntf);
+
+/*********************************************************************
+* @purpose  Returns the User Name for the  logical interface
+*
+* @param    lIntIfNum    @b((input)) the specified interface
+* @param    userName     @b((output)) user name for the logical interface
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortUserNameGet (uint32 lIntIfNum,
+                                        uchar8 *userName);
+
+/*********************************************************************
+* @purpose  Returns the accouting session Id for the logical interface
+*
+* @param    lIntIfNum            @b((input)) the specified interface
+* @param    acctSessionIdStr     @b((output)) Accouting Session Id
+*                                  for the logical interface
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortAcctSessionIdGet (uint32 lIntIfNum,
+                                             uchar8 *acctSessionIdStr);
+
+/*********************************************************************
+* @purpose  Returns the client Mac address for the logical interface
+*
+* @param    lIntIfNum    @b((input)) the specified interface
+* @param    macAddr      @b((output)) Mac Address of the supplicant
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortClientMacAddrGet(uint32 lIntIfNum,
+                                              uchar8 *macAddr);
+
+
+/*********************************************************************
+* @purpose  Returns the physical port corresponding to the logical interface
+*
+* @param    lIntIfNum    @b((input)) the logical interface
+* @param    physport    @b{(ouput)}  the physical interface
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrPhysicalPortGet(uint32 lIntIfNum,uint32 *physPort);
+
+/*********************************************************************
+*
+* @purpose  Update the status and other information of the client 
+            from the authentication  method to Auth Mgr.
+*
+* @param    uint32        intIfNum  @b((input)) Internal interface number
+* @param    method @b{(input)} authentication manager methods,
+                               i.e.dot1x/mab/cp
+* @param    status @b{(input)} authentication status,
+                               i.e start/success/fail/timeout.
+* @param    clientParams @b{(input)} client status event related information
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @notes   This API is called from DOT1X and CP when they are starting the authentication 
+           and also when the method is success/failure/timedout
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortClientAuthStatusUpdate(uint32 intIfNum, 
+                                     AUTHMGR_METHOD_t method,
+                                     AUTHMGR_STATUS_t  status,
+                                    void *clientParams);
+
+
+/******************************************************************************
+ * @purpose  Gets the next History Log interface index
+ *
+ * @param    intIfNum   @b{(input/output)} Physical Interface Number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE  If there are no entries
+ *
+ * @notes
+ *
+ * @end
+ *******************************************************************************/
+RC_t authmgrAuthHistoryLogIfIndexNextGet(uint32 *intIfNum);
+
+
+/******************************************************************************
+ * @purpose  Gets the next History Log entry indexs
+ *
+ * @param    intIfNum   @b{(input/output)} Physical Interface Number
+ * @param    entryIndex @b{(input/output)} EntryIndex
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE  If there are no entries
+ *
+ * @notes
+ *
+ * @end
+ *******************************************************************************/
+RC_t authmgrAuthHistoryLogIndexNextGet(uint32 *intIfNum,
+                                        uint32 *entryIndex);
+/******************************************************************************
+ * @purpose  Gets the next History Log entry indexs in reverse order
+ *
+ * @param    intIfNum   @b{(input/output)} Physical Interface Number
+ * @param    entryIndex @b{(input/output)} EntryIndex
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE  If there are no entries
+ *
+ * @notes
+ *
+ * @end
+ *******************************************************************************/
+RC_t authmgrAuthHistoryLogReverseIndexNextGet(uint32 *intIfNum,
+                                               uint32 *entryIndex);
+
+/*********************************************************************
+ * @purpose  Purge all authmgr auth history log entries for the given
+ *           interface
+ *
+ * @param    intIfNum   @b{(input)} Physical Interface Number
+ *
+ * @returns  SUCCESS
+ * @returns  FAILURE
+ *
+ * @comments
+ *
+ * @notes
+ * @end
+ *
+ **********************************************************************/
+RC_t authmgrAuthHistoryLogInterfacePurge(uint32 intIfNum);
+
+/*********************************************************************
+ * @purpose  Purge all authmgr auth history log entries
+ *
+ * @param    void
+ *
+ * @returns  SUCCESS
+ * @returns  FAILURE
+ *
+ * @comments
+ *
+ * @notes
+ *
+ * @end
+ *
+ **********************************************************************/
+RC_t authmgrAuthHistoryLogPurgeAll();
+
+
+/*********************************************************************
+ * @purpose  Get the timestamp from the authmgr Auth History table
+ *          
+ * @param    intIfNum   @b{(input)} Physical Interface Number
+ * @param    entryIndex @b{(input)} EntryIndex
+ * @param    pTimeStamp @b{(output)} reference to the Reason Code
+ *
+ * @returns  SUCCESS  
+ * @returns  FAILURE
+ *
+ * @comments
+ *
+ * @notes 
+ *
+ * @end
+ *
+ *********************************************************************/
+RC_t authmgrAuthHistoryLogTimestampGet(uint32 intIfNum,
+                                        uint32 entryIndex,
+                                        uint32 *pTimeStamp);
+
+/*********************************************************************
+ * @purpose  Get the VlanId from the authmgr Auth History table
+ *
+ * @param    intIfNum   @b{(input)} Physical Interface Number
+ * @param    entryIndex @b{(input)} EntryIndex
+ * @param    pVlanId    @b{(output)} reference to the VLANID
+ *
+ * @returns  SUCCESS
+ * @returns  FAILURE
+ *
+ * @comments
+ *
+ * @notes
+ *
+ * @end
+ *
+ *********************************************************************/
+RC_t authmgrAuthHistoryLogVlanIdGet(uint32 intIfNum,
+                                     uint32 entryIndex,
+                                      ushort16 *pVlanId);
+
+/*********************************************************************
+ * @purpose  Get the VlanId from the authmgr Auth History table
+ *          
+ * @param    intIfNum   @b{(input)} Physical Interface Number
+ * @param    entryIndex @b{(input)} EntryIndex
+ * @param    pMethod    @b{(output)} reference to the auth Method 
+ *
+ * @returns  SUCCESS  
+ * @returns  FAILURE
+ *
+ * @comments
+ *
+ * @notes 
+ *
+ * @end
+ *
+ *********************************************************************/
+RC_t authmgrAuthHistoryLogMethodGet(uint32 intIfNum,
+                                     uint32 entryIndex,
+                                      AUTHMGR_METHOD_t *pMethod); 
+
+/*********************************************************************
+ * @purpose  Get the reasonCode from the authmgr Auth History table
+ *          
+ * @param    intIfNum   @b{(input)} Physical Interface Number
+ * @param    entryIndex @b{(input)} EntryIndex
+ * @param    pReasonCode @b{(output)} Reference to the Reason Code
+ *
+ * @returns  SUCCESS  
+ * @returns  FAILURE
+ *
+ * @comments
+ *
+ * @notes 
+ *
+ * @end
+ *
+ *********************************************************************/
+RC_t authmgrAuthHistoryLogReasonCodeGet(uint32 intIfNum,
+                                         uint32 entryIndex,
+                                         uint32 *pReasonCode); 
+
+/*********************************************************************
+ * @purpose  Get the accessStatus from the authmgr Auth History table
+ *          
+ * @param    intIfNum   @b{(input)} Physical Interface Number
+ * @param    entryIndex @b{(input)} EntryIndex
+ * @param    pStatus    @b{(output)} Reference to the Access Status
+ *
+ * @returns  SUCCESS  
+ * @returns  FAILURE
+ *
+ * @comments
+ *
+ * @notes 
+ *
+ * @end
+ *
+ *********************************************************************/
+RC_t authmgrAuthHistoryLogAuthStatusGet(uint32 intIfNum,
+                                           uint32 entryIndex,
+                                           uint32 *pStatus); 
+
+
+/*********************************************************************
+ * @purpose  Get the authmgr authentication Status from the authmgr Auth 
+ *           History table
+ *          
+ * @param    intIfNum   @b{(input)} Physical Interface Number
+ * @param    entryIndex @b{(input)} EntryIndex
+ * @param    pStatus    @b{(output)} Reference to the Auth Status
+ *
+ * @returns  SUCCESS  
+ * @returns  FAILURE
+ *
+ * @comments
+ *
+ * @notes 
+ *
+ * @end
+ *
+ *********************************************************************/
+RC_t authmgrAuthHistoryLogAuthStatusGet(uint32 intIfNum,
+                                         uint32 entryIndex,
+                                         uint32 *pStatus); 
+
+/*********************************************************************
+ * @purpose  Get the supplicant Mac Address from the authmgr Auth History table
+ *          
+ * @param    intIfNum   @b{(input)} Physical Interface Number
+ * @param    entryIndex @b{(input)} EntryIndex
+ * @param    pMacAddress @b{(output)} Reference to the Mac Address
+ *
+ * @returns  SUCCESS  
+ * @returns  FAILURE
+ *
+ * @comments
+ *
+ * @notes 
+ *
+ * @end
+ *
+ *********************************************************************/
+RC_t authmgrAuthHistoryLogClientMacAddressGet(uint32        intIfNum,
+                                                 uint32        entryIndex,
+                                                  enetMacAddr_t *pMacAddress); 
+
+/*********************************************************************
+ * @purpose  Get the FilterID for the Authmgr Radius Accept Packet
+ *           located in the authmgr Auth History table
+ *
+ * @param    intIfNum   @b{(input)} Physical Interface Number
+ * @param    entryIndex @b{(input)} EntryIndex
+ * @param    pFilterId  @b{(output)} Reference to the filter Id
+ * @param    pFilterLen @b{(input/output)} Reference to filter Length
+ *
+ * @returns  SUCCESS
+ * @returns  FAILURE
+ *
+ * @comments
+ *
+ * @notes
+ *
+ * @end
+ *
+ *********************************************************************/
+RC_t authmgrAuthHistoryLogFilterIdGet (uint32 intIfNum,
+                                          uint32 entryIndex,
+                                           uchar8 *pFilterIdName,
+                                          uint32 *pFilterLen);
+
+/*********************************************************************
+ * @purpose  Check if the authmgr auth history log entry exists in History
+ *           table
+ *          
+ * @param    intIfNum   @b{(input)} Physical Interface Number
+ * @param    entryIndex @b{(input)} EntryIndex
+ *
+ * @returns  SUCCESS  
+ * @returns  FAILURE
+ *
+ * @comments
+ *
+ * @notes 
+ *
+ * @end
+ *
+ *********************************************************************/
+RC_t authmgrAuthHistoryLogEntryIsValid(uint32 intIfNum,
+                                        uint32 entryIndex);
+ /*********************************************************************
+ * @purpose  Return Reason in String format for the given entry
+ *          
+ * @param    intIfNum   (input)  - Interface
+ *           entryIndex (input)  - Entry Index
+ *           reasonCode (input)  - Reason Code
+ *           strReason  (output) - Reason in String format
+ *           strLen     (input/output) - Length of Reason String
+ *
+ * @returns  SUCCESS/ FAILURE
+ *
+ * @comments
+ *
+ * @notes 
+ *
+ * @end
+ *
+ *********************************************************************/
+RC_t authmgrAuthHistoryLogReasonStringGet(uint32  intIfNum,
+                                           uint32  entryIndex,
+                                           uint32  reasonCode,
+                                            char8  *strReason,
+                                           uint32 *strLen);
+
+/*********************************************************************
+ * @purpose  Verify specified config interface index is valid
+ *
+ * @param    intIfNum    @b{(input)}  Internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrIntfIndexGet(uint32 intIfNum);
+
+/*********************************************************************
+ * @purpose  Determine next sequential auth Mgr config interface index
+ *
+ * @param    intIfNum    @b{(input)}  Internal interface number to begin search
+ * @param    *pNext      @b{(output)} Ptr to next internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrIntfIndexGetNext(uint32 intIfNum, uint32 *pNext);
+
+/*********************************************************************
+ * @purpose  Verify specified  index exists
+ *
+ * @param    index     @b{(input)} index of the config array 
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments Auth Mgr expects the index to come to the api with incremented by 1.
+             In the API we reduce the  index by 1 as the data structure is array.
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrMethodIndexGet(uint32 index);
+
+/*********************************************************************
+ * @purpose  Determine next sequential  index
+ *
+ * @param    index     @b{(input)} index of the config array 
+ * @param    *pNext      @b{(output)} Ptr to next priority
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrIndexGetNext(uint32 index, uint32 *pNext);
+
+/*********************************************************************
+ * @purpose  Determine next sequential auth Mgr config interface index
+ *
+ * @param    intIfNum    @b{(input)}  Internal interface number to begin search
+ * @param    *pNext      @b{(output)} Ptr to next internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrEntryIndexGet(uint32 intIfNum, uint32 index);
+/*********************************************************************
+ * @purpose  Determine next sequential auth Mgr config interface index
+ *
+ * @param    intIfNum    @b{(input)}  Internal interface number to begin search
+ * @param    *pNext      @b{(output)} Ptr to next internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrEntryIndexGetNext(uint32 intIfNum, uint32 *pNextNum,
+                                  uint32 index, uint32 *pNextIndex);
+
+/*********************************************************************
+ * @purpose  chechks if method order config is valid.
+ *
+ * @param    intIfNum    @b{(input)} internal interface number
+ * @param    method @b{(input)} authentication manager methods,
+ i.e.dot1x/mab/cp
+ *
+ * @returns   TRUE
+ * @returns   FALSE
+ *
+ * @comments  This API should only be called from the methods DOT1X and captive portal
+              applications only. When 8021x or CP  receives a PDU or packet then they 
+              query Auth mgr if the can start authentication process.This API returns if the
+              same can start the authentication process.
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrPortAuthMethodStartAuthAllowed(uint32 intIfNum, AUTHMGR_METHOD_t method); 
+/*********************************************************************
+ * @purpose  gets the authenticated method or currently running authenticated method for the client 
+ *
+ * @param    intIfNum    @b{(input)} internal interface number
+ * @param    mac_addr    @b{(input)}client's mac address 
+ * @param    *method    @b{(input)}reference to the method 
+ *
+ * @returns   FALSE_
+ * @returns   TRUE
+ *
+ * @comments  This API should only be called from the methods DOT1X and captive portal
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrClientAuthenticatedMethodGet(uint32 intIfNum,  enetMacAddr_t mac_addr,  AUTHMGR_METHOD_t *method );
+
+/*********************************************************************
+ * @purpose  chechs if method is Enabled.
+ *
+ * @param    intIfNum    @b{(input)} internal interface number
+ * @param    method @b{(input)} authentication method which is being checked,
+ i.e.dot1x/mab/cp
+ * @param    *entryIndex    @b{(outout)}reference to the entry index
+ *
+ * @returns   FALSE
+ * @returns   TRUE
+ *
+ * @comments  This API should only be called from the methods DOT1X and captive portal
+              applications only. 
+ *
+ * @end
+ *********************************************************************/
+
+ BOOL authmgrIsMethodEnabled(uint32 intIfNum,  AUTHMGR_METHOD_t method, uint32 *entryIndex);
+/*********************************************************************
+ * @purpose  Determine if the interface is valid for auth mgr
+ *
+ * @param    intIfNum  @b{(input)} internal interface number
+ *
+ * @returns   TRUE
+ * @returns   FALSE
+ *
+ * @comments none
+ *
+ * @end
+ *********************************************************************/
+ BOOL authmgrIsValidIntf(uint32 intIfNum);
+
+/*********************************************************************
+* @purpose  Get number of attempts for the method 
+*
+* @param    intIfNum     @b{(input)} internal interface number
+* @param    method       @b{(input)} method for which the attempts are requested 
+* @param    *numAttempts @b{(output)} number of attempts 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortAttemptsGet(uint32 intIfNum,  AUTHMGR_METHOD_t method, uint32 *numAttempts);
+
+/*********************************************************************
+* @purpose  Get number of failed attempts for the method 
+*
+* @param    intIfNum     @b{(input)} internal interface number
+* @param    method       @b{(input)} method for which the attempts are requested 
+* @param    *numAttempts @b{(output)} number of attempts 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortFailedAttemptsGet(uint32 intIfNum,  AUTHMGR_METHOD_t method, uint32 *numAttempts);
+
+
+/*********************************************************************
+ * @purpose  Determine next sequential  index
+ *
+ * @param    index     @b{(input)} index of the config array 
+ * @param    *pNext      @b{(output)} Ptr to next priority
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrMethodIndexGetNext(uint32 index, uint32 *pNext);
+
+/*********************************************************************
+ * @purpose  Get the number of clients authenticated.
+ *          
+ * @param    intIfNum @b((input)) interface number  
+ * @param    pCount @b((output)) ptr to the number of clients  
+ *
+ * @returns  SUCCESS  
+ * @returns  FAILURE
+ *
+ * @comments
+ *
+ * @notes 
+ * @notes 
+ *
+ * @end
+ *
+ *********************************************************************/
+RC_t authmgrNumClientsGet(uint32 intIfNum, uint32 *pCount);
+
+/*********************************************************************
+ * @purpose  Get the number of clients authenticated.
+ *          
+ * @param    intIfNum @b((input)) interface number  
+* @param    mode   @b{(input)} order or priority 
+* @param    index @b{(input)} position of the method or order 
+* @param    *method @b{(output)} authentication manager methods,
+                               i.e.dot1x/mab/cp
+ *
+ * @returns  SUCCESS  
+ * @returns  FAILURE
+ *
+ * @comments
+ *
+ * @notes 
+ * @notes 
+ *
+ * @end
+ *
+ *********************************************************************/
+RC_t authmgrEnabledMethodGet( AUTHMGR_METHOD_TYPE_t mode, uint32 intIfNum,
+        uint32 index,  AUTHMGR_METHOD_t *method);
+
+/*********************************************************************
+* @purpose  Returns the client authenticated Method for the logical interface
+*
+* @param    lIntIfNum    @b((input)) the specified interface
+* @param    method      @b((output)) authenticating method
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortClientAuthenticatedMethodGet(uint32 lIntIfNum,
+                                                        AUTHMGR_METHOD_t *method);
+
+
+/*********************************************************************
+* @purpose  Returns the client auth state for the logical interface
+*
+* @param    lIntIfNum    @b((input))  the specified interface
+* @param    state        @b((output)) authenticating state 
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortClientAuthStateGet(uint32 lIntIfNum,
+                                             AUTHMGR_STATES_t *state);
+
+/*********************************************************************
+* @purpose  Returns the client reauth state for the logical interface
+*
+* @param    lIntIfNum    @b((input))  the specified interface
+* @param    state        @b((output)) reauthenticating state 
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortClientReauthStateGet(uint32 lIntIfNum, 
+                                                BOOL *state);
+
+/*********************************************************************
+* @purpose  Returns the client auth status for the logical interface
+*
+* @param    lIntIfNum    @b((input)) the specified interface
+* @param    status       @b((output)) authenticated status 
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortClientAuthStatusGet(uint32 lIntIfNum,
+                                              AUTHMGR_PORT_STATUS_t *status);
+
+/*********************************************************************
+*
+* @purpose  Update the status and other information of the client 
+            from the authentication  method to Auth Mgr.
+*
+* @param    uint32        intIfNum  @b((input)) Internal interface number
+* @param    method @b{(input)} authentication manager methods,
+                               i.e.dot1x/mab/cp
+* @param    status @b{(input)}  TRUE/ FALSE 
+                               i.e start/success/fail/timeout.
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @notes   This API is called from DOT1X and CP when the feature is enabled or disabled.
+           In case of Global mode changes, the interface will come as  ALL_INTERFACES
+           and also when the method is success/failure/timedout
+*
+* @end
+*********************************************************************/
+RC_t authmgrMethodAdminModeCallback( uint32 intIfNum, 
+                                     AUTHMGR_METHOD_t method,
+                                     BOOL  status);
+/*********************************************************************
+* @purpose  Returns the logical port for the next client Mac Address
+*           in the mac address database
+*
+* @param    mac_addr    @b{(input)} supplicant mac address to be searched
+* @param    lIntIfNum    @b((output)) the logical interface
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments for SNMP
+*
+* @end
+*********************************************************************/
+RC_t authmgrClientMacAddressNextGet( enetMacAddr_t *macAddr,uint32 *lIntIfNum);
+/*********************************************************************
+* @purpose  Returns the logical port for the corresponding supplicant Mac Address
+*
+* @param    mac_addr    @b{(input)} supplicant mac address to be searched
+* @param    lIntIfNum    @b((output)) the logical interface
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments for SNMP
+*
+* @end
+*********************************************************************/
+RC_t authmgrClientMacAddressGet( enetMacAddr_t *macAddr,uint32 *lIntIfNum);
+/*********************************************************************
+* @purpose  function to validate of Mab is enabled before 8021x 
+* intIfNum : interface number
+*
+* @returns   SUCCESS  if MAB is enabled before 802.1X
+* @returns   FAILURE  
+*
+* @comments 
+*
+* @end
+*********************************************************************/
+ BOOL authmgrIsMabEnabledPriorToDot1x(uint32 intIfNum);
+/**************************************************************************
+* @purpose   Wrapper function to authentication manager API 
+*
+* @returns    SUCCESS
+* @returns    FAILURE
+*
+* @comments  
+*         
+* @end
+*************************************************************************/
+RC_t authmgrEnabledMethodGetNext(uint32 intIfNum, uint32 method, uint32 *nextMethod);
+
+/*********************************************************************
+ * @purpose  Get the Authentication Method string for given method type
+ *
+ * @param    method  @b{(input)} Authentication Method type
+ *
+ * @returns  Method name String for given input method
+ *
+ * @comments none
+ *
+ * @end
+ *********************************************************************/
+ uchar8 *authmgrMethodTypeToName( AUTHMGR_METHOD_t method);
+
+/*********************************************************************
+* @purpose  Get port control mode
+*
+* @param    intIfNum     @b{(input)} internal interface number
+* @param    *portControl @b{(output)} port control mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+extern RC_t authmgrPortControlModeGet(uint32 intIfNum,  AUTHMGR_PORT_CONTROL_t *portControl);
+
+/*********************************************************************
+* @purpose  Set port control mode
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    portControl @b{(input)} port control mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+extern RC_t authmgrPortControlModeSet(uint32 intIfNum,  AUTHMGR_PORT_CONTROL_t portControl);
+
+/*********************************************************************
+* @purpose  Get Authentiation Server timeout value
+*
+* @param    intIfNum       @b{(input)} internal interface number
+* @param    *serverTimeout @b{(output)} Authentication Server timeout
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments The serverTimeout is the initialization value for aWhile,
+*           which is a timer used by the Authenticator state machine
+*           to time out the Authentiation Server.
+*       
+* @end
+*********************************************************************/
+extern RC_t authmgrPortServerTimeoutGet(uint32 intIfNum, uint32 *serverTimeout);
+
+/*********************************************************************
+* @purpose  Set Authentiation Server timeout value
+*
+* @param    intIfNum      @b{(input)} internal interface number
+* @param    serverTimeout @b{(input)} Authentication Server timeout
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments The serverTimeout is the initialization value for aWhile,
+*           which is a timer used by the Authenticator state machine
+*           to time out the Authentiation Server.
+*       
+* @end
+*********************************************************************/
+extern RC_t authmgrPortServerTimeoutSet(uint32 intIfNum, uint32 serverTimeout);
+/*********************************************************************
+*
+* @purpose  Callback from DTL informing about an unauthorized address
+*
+* @param    uint32        intIfNum  @b((input)) Internal interface number
+* @param     enetMacAddr_t macAddr   @b((output)) MAC address
+* @param     ushort16      vlanId    @b((output)) VLAN ID
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+extern RC_t authmgrUnauthAddrCallBack( uint32 intIfNum,  enetMacAddr_t macAddr,  ushort16 vlanId );
+
+
+/*********************************************************************
+* @purpose  Get host control mode
+*
+* @param    intIfNum     @b{(input)} internal interface number
+* @param    *hostControl @b{(output)} host control mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+extern RC_t authmgrHostControlModeGet(uint32 intIfNum,  AUTHMGR_HOST_CONTROL_t *hostControl);
+
+/*********************************************************************
+* @purpose  Set port control mode
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    portControl @b{(input)} port control mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t authmgrHostControlModeSet(uint32 intIfNum,  AUTHMGR_HOST_CONTROL_t hostMode);
+
+/*********************************************************************
+  * @purpose  Determine if the interface type is valid to participate in authmgr
+  *
+  * @param    sysIntfType              @b{(input)} interface type
+  *
+  * @returns   TRUE
+  * @returns   FALSE
+  *
+  * @comments
+  *
+  * @end
+  *********************************************************************/
+ BOOL authmgrIsValidIntfType(uint32 sysIntfType);
+
+
+/*********************************************************************
+* @purpose  Determine if a client is authenticated on an interface
+*
+* @param    intIfNum      @b{(input)} internal interface number
+* @param    macAddr       @b{(input)} client's MAC address
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+ BOOL authmgrPortClientAuthenticationGet(uint32 intIfNum,  uchar8 *macAddr);
+
+/*********************************************************************
+* @purpose  Get operational value of controlled directions
+*
+* @param    intIfNum      @b{(input)} internal interface number
+* @param    *portStatus   @b{(output)} port authentication status
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+extern RC_t authmgrPortAuthControlledPortStatusGet(uint32 intIfNum,
+                                                     AUTHMGR_PORT_STATUS_t *portStatus);
+
+/*********************************************************************
+* @purpose  Get the port autherization status.
+*
+* @param    intIfNum               @b{(input)} internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+extern RC_t authmgrPortIsAuthorized(uint32 intIfNum);
+
+/*********************************************************************
+ * @purpose  Get the Authentication Method string for given method type
+ *
+ * @param    method  @b{(input)} Authentication Method type 
+ *
+ * @returns  Method name String for given input method
+ *
+ * @comments none
+ *
+ * @end
+ *********************************************************************/
+extern  uchar8 *authmgrMethodTypeToName( AUTHMGR_METHOD_t method);
+
+/*********************************************************************
+ * @purpose function to get max users 
+ *
+ * @param    hostMode   @b{(input))  hostmode 
+ * @param    *appyPolicy  @b{(input)) bool value 
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrMaxUsersGet(uint32 intIfNum, uint32 *maxUsers);
+
+/*********************************************************************
+* @purpose  Set administrative mode setting for authmgr Vlan Assignment
+*
+* @param    mode @b{(input)} radius vlan assignment mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments    
+*       
+* @end
+*********************************************************************/
+RC_t authmgrVlanAssignmentModeSet (uint32 mode);
+
+/*********************************************************************
+* @purpose  Get administrative mode setting for authmgr Vlan Assignment
+*
+* @param    mode @b{(input)} radius vlan assignment mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments    
+*       
+* @end
+*********************************************************************/
+RC_t authmgrVlanAssignmentModeGet(uint32 *mode);
+
+/*********************************************************************
+* @purpose  Set the Guest Vlan Id for the port.
+*
+* @param    intIfNum      @b{(input)} internal interface number
+* @param    *guestVlanId       @b{(output)} guest vlan Id
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrAdvancedGuestPortsCfgSet(uint32 intIfNum,uint32 guestVlanId);
+
+/*********************************************************************
+* @purpose  Set the Guest Vlan Id for the port.
+*
+* @param    intIfNum      @b{(input)} internal interface number
+* @param    *guestVlanId  @b{(output)} guest vlan Id
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrAdvancedGuestPortCfgGet(uint32 intIfNum,uint32 *guestVlanId);
+
+/*********************************************************************
+* @purpose  Set the Guest Vlan Period for the port.
+*
+* @param    intIfNum      @b{(input)} internal interface number
+* @param    guestVlanPeriod  @b{(output)} guest vlan Period
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrAdvancedGuestVlanPeriodSet(uint32 intIfNum,uint32 guestVlanPeriod);
+
+
+/*********************************************************************
+* @purpose  Set max users value
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    maxUsers @b{(input)} max users
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments The maxUsers is the maximum number of hosts that can be 
+*           authenticated on a port using mac based authentication
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortMaxUsersSet(uint32 intIfNum, uint32 maxUsers);
+
+/*********************************************************************
+* @purpose  Get max users value
+*
+* @param    intIfNum  @b{(input)} internal interface number
+* @param    *maxUsers @b{(output)} max users per port
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments The maxUsers is the maximum number of hosts that can be 
+*           authenticated on a port using mac based authentication
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortMaxUsersGet(uint32 intIfNum, uint32 *maxUsers);
+/*********************************************************************
+* @purpose  Returns the session timeout value for the  logical interface
+*
+* @param    lIntIfNum  @b((input)) the specified interface
+* @param    sessiontimeout  @b((output)) session timeout for the logical interface
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortSessionTimeoutGet(uint32 lIntIfNum,
+                                            uint32 *session_timeout);
+
+/*********************************************************************
+* @purpose  To get the time left for the session termination action
+*           to occur for the logical interface
+*
+* @param    lIntIfNum  @b((input))  Logical interface number
+* @param    timeLeft   @b((output)) Pointer to store the left out time
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortTimeLeftForTerminateActionGet(uint32 lIntIfNum,
+                                                        uint32 *timeLeft);
+
+/*********************************************************************
+* @purpose  Returns the termination Action for the  logical interface
+*
+* @param    lIntIfNum  @b((input)) the specified interface
+* @param    terminationAction  @b((output)) termination Action for the logical interface
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortTerminationActionGet(uint32 lIntIfNum,
+                                    uint32 *terminationAction);
+
+/*********************************************************************
+* @purpose  Check if the vlan is assigned to any client or port
+*
+* @param    phyPort       @b{(input)} physical port
+* @param    vlanId        @b{(input)} vlanId
+*
+* @returns   TRUE
+* @returns   FALSE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+ BOOL authmgrVlanAssignedCheck (uint32 phyPort, uint32 vlanId);
+
+
+/*********************************************************************
+* @purpose  Get reauthentication value for a port
+*
+* @param    intIfNum        @b{(input)} internal interface number
+* @param    *reauthenticate @b{(output)} reauthentication value
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments This value indicates whether a port is being reauthenticated
+*           due to a management request
+*       
+* @end
+*********************************************************************/
+extern RC_t authmgrPortReauthenticateGet(uint32 intIfNum,  BOOL *reauthenticate);
+
+/*********************************************************************
+* @purpose  Set reauthentication value for a port
+*
+* @param    intIfNum       @b{(input)} internal interface number
+* @param    reauthenticate @b{(input)} reauthentication value
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments This value is set to  TRUE by management in order to force
+*           reauthentication of a port.  It is re-set to  FALSE after
+*           reauthentication has completed.
+*       
+* @end
+*********************************************************************/
+extern RC_t authmgrPortReauthenticateSet(uint32 intIfNum,  BOOL reauthenticate);
+
+
+/*********************************************************************
+* @purpose  Get the Reauthentication period
+*
+* @param    intIfNum       @b{(input)}  internal interface number
+* @param    *reAuthPeriod  @b{(output)} reauthentication period
+* @param    serverConfig   @b{(output)} get reauthentication period
+*                                       from server option
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments The reAuthPeriod is the initialization value for reAuthWhen,
+*           which is a timer used by the Authenticator state machine to
+*           determine when reauthentication of the Supplicant takes place.
+*
+* @end
+*********************************************************************/
+extern RC_t authmgrPortReAuthPeriodGet(uint32 intIfNum,
+                                          uint32 *reAuthPeriod,
+                                           BOOL *serverConfig);
+
+/*********************************************************************
+* @purpose  Set the Reauthentication period
+*
+* @param    intIfNum      @b{(input)} internal interface number
+* @param    reAuthPeriod  @b{(input)} reauthentication period
+* @param    serverConfig  @b{(input)} set option to get reauthentication
+*                                     period from server option
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments The reAuthPeriod is the initialization value for reAuthWhen,
+*           which is a timer used by the Authenticator state machine to
+*           determine when reauthentication of the Supplicant takes place.
+*       
+* @end
+*********************************************************************/
+extern RC_t authmgrPortReAuthPeriodSet(uint32 intIfNum, 
+                                          uint32 reAuthPeriod, 
+                                           BOOL serverConfig);
+
+/*********************************************************************
+* @purpose  Get the Reauthentication mode
+*
+* @param    intIfNum        @b{(input)} internal interface number
+* @param    *reAuthEnabled  @b{(output)} reauthentication mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments The reAuthEnabled mode determines whether reauthentication
+*           of the Supplicant takes place.
+*       
+* @end
+*********************************************************************/
+extern RC_t authmgrPortReAuthEnabledGet(uint32 intIfNum,  BOOL *reAuthEnabled);
+
+/*********************************************************************
+* @purpose  Set the Reauthentication mode
+*
+* @param    intIfNum       @b{(input)} internal interface number
+* @param    reAuthEnabled  @b{(input)} reauthentication mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments The reAuthEnabled mode determines whether reauthentication
+*           of the Supplicant takes place.
+*       
+* @end
+*********************************************************************/
+extern RC_t authmgrPortReAuthEnabledSet(uint32 intIfNum,  BOOL reAuthEnabled);
+/*********************************************************************
+* @purpose  Get port operational mode
+*
+* @param    intIfNum     @b{(input)} internal interface number
+* @param    *portMode    @b{(output)} port operational mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+extern RC_t authmgrPortOperControlModeGet(uint32 intIfNum,  AUTHMGR_PORT_CONTROL_t *portMode);
+
+
+/*********************************************************************
+* @purpose  Set maximum number of times authentication
+*           may be reattempted by the user on the port.
+*
+* @param    intIfNum @b{(input)} internal interface number
+* @param    maxReq   @b{(input)} maximum request value
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+* @returns   NOT_SUPPORTED
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortMaxAuthAttemptsSet(uint32 intIfNum, uint32 maxAuthAttempts);
+
+/*********************************************************************
+* @purpose  Get maximum number of times authentication 
+*           may be reattempted by the user on the port.
+*
+* @param    intIfNum @b{(input)} internal interface number
+* @param    *maxReq  @b{(output)} maximum request value
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortMaxAuthAttemptsGet(uint32 intIfNum, uint32 *maxAuthAttempts);
+
+/*********************************************************************
+* @purpose  Returns the Supplicant Mac address for the logical interface
+*
+* @param    lIntIfNum    @b((input)) the specified interface
+* @param    macAddr      @b((output)) Mac Address of the supplicant
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortSupplicantMacAddrGet(uint32 lIntIfNum,
+                                              uchar8 *macAddr);
+/*********************************************************************
+* @purpose  Get the port acquire status.
+*
+* @param    intIfNum               @b{(input)} internal interface number
+*
+* @returns   TRUE if yes
+* @returns   FALSE otherwise
+*
+* @comments
+*
+* @end
+*********************************************************************/
+ BOOL authmgrPortIsAcquired(uint32 intIfNum);
+
+/*********************************************************************
+ *
+ * @purpose Register routines to be called by Auth Manager for various events.
+ *
+ * @param method @b((input)) authentication protocol
+ * @param *notify @b((input)) pointer to a routine to be invoked upon a respones.
+ *                       portCtrlFn: routine to set port control mode     
+ *                       hostCtrlFn: routine to set port host mode     
+ *                       eventNotifyFn: routine to handle Auth Mgr events     
+ *                       enableGetFn: routine to get admin mode of the authentication protocol     
+ *                       radiusEnableGetFn: routine to get whether RADIUS is configured as
+ *                       an authentication method
+ * 
+ * 
+ * @returns  SUCCESS
+ * @returns  FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *
+ *********************************************************************/
+RC_t authmgrEventCallbackRegister( AUTHMGR_METHOD_t method,
+    RC_t(*portCtrlFn) (uint32 intIfNum,  AUTHMGR_PORT_CONTROL_t portControl),
+    RC_t(*hostCtrlFn) (uint32 intIfNum,  AUTHMGR_HOST_CONTROL_t hostMode),
+    RC_t(*eventNotifyFn) (uint32 intIfNum, uint32 event,  enetMacAddr_t *macAddr),
+    RC_t(*enableGetFn) (uint32 intIfNum, uint32 *enabled),
+    RC_t(*radiusEnableGetFn) (uint32 intIfNum, uint32 *enabled));
+
+
+/*********************************************************************
+*
+* @purpose Deregister all routines to be called when a RADIUS response is
+*          received from a server for a previously submitted request.
+*
+* @param   componentId  @b{(input)}  one of  COMPONENT_IDS_t
+*
+* @returns  SUCCESS
+*
+* @comments
+*
+* @end
+*
+*********************************************************************/
+RC_t authmgrEventCallbackDeregister( AUTHMGR_METHOD_t method);
+
+/*********************************************************************
+*
+* @purpose Set the port capabilities
+*
+* @param   intIfNum  @b{(input)}  interface number
+* @param   paeCapabilities  @b{(input)}  capabiities (authenticator or supplicant)
+*
+* @returns  SUCCESS
+*
+* @comments
+*
+* @end
+*
+*********************************************************************/
+RC_t authmgrDot1xCapabilitiesUpdate(uint32 intIfNum, uint32 paeCapabilities);
+/*********************************************************************
+* @purpose  Returns the Vlan assigned for the  logical interface
+*
+* @param    lIntIfNum    @b((input)) the specified interface
+* @param    vlan        @b((output)) vlan assigned to the logical interface
+* @param    mode        @b((output)) mode of assignment Radius/Default
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortVlanAssignmentGet(uint32 lIntIfNum,
+                                          uint32 *vlanId,
+                                          uint32 *mode);
+
+/*********************************************************************
+* @purpose  Returns the authentication status of the client
+*
+* @param    lIntIfNum    @b((input)) the specified interface
+* @param    authStat @b((output)) auth status
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrClientVlanGet(uint32 lIntIfNum,
+                             uint32 *vlanType,
+                             uint32 *vlanId);
+
+/*********************************************************************
+* @purpose  Returns the authentication status of the client 
+*
+* @param    lIntIfNum    @b((input)) the specified interface
+* @param    authStat @b((output)) auth status 
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrClientAuthStatusGet(uint32 lIntIfNum,
+                                    uint32 *authStatus);
+
+/*********************************************************************
+* @purpose  Get global port control mode
+*
+* @param    *portControl @b{(output)} port control mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t authmgrGlobalPortControlModeGet( AUTHMGR_PORT_CONTROL_t *portControl);
+
+/*********************************************************************
+* @purpose  Set port control mode
+*
+* @param    portControl @b{(input)} port control mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t authmgrGlobalPortControlModeSet( AUTHMGR_PORT_CONTROL_t portControl);
+
+/*********************************************************************
+* @purpose  Set port control mode to default
+*
+* @param    intIfNum    @b{(input)} internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortControlModeReset(uint32 intIfNum);
+
+/*********************************************************************
+* @purpose  Set global host control mode
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    host @b{(input)} port control mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t authmgrGlobalHostModeSet( AUTHMGR_HOST_CONTROL_t hostMode);
+
+/*********************************************************************
+* @purpose  Get global host control mode
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    host @b{(input)} port control mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t authmgrGlobalHostModeGet( AUTHMGR_HOST_CONTROL_t *hostMode);
+
+/*********************************************************************
+* @purpose  Set host control mode to default
+*
+* @param    intIfNum    @b{(input)} internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t authmgrHostModeReset(uint32 intIfNum);
+
+/*********************************************************************
+* @purpose  Get number of authenticated clients on a port
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    *count @b{(output)} number of authenticated clients
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments none
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortAuthCountGet(uint32 intIfNum, uint32 *count);
+
+/*********************************************************************
+* @purpose  Get number of authenticated clients on a port
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    *count @b{(output)} number of authenticated clients
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments none
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortAuthCountGet(uint32 intIfNum, uint32 *count);
+/*********************************************************************
+* @purpose  Processes Authmgr-related event initiated by PACmgr.
+*
+* @param (in)    vlanData  VLAN data
+* @param (in)    intIfNum  Interface Number
+* @param (in)    event
+*
+* @returns   SUCCESS  or  FAILURE
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanChangeCallback (dot1qNotifyData_t * vlanData,
+                                   uint32 intIfNum, uint32 event);
+
+/*********************************************************************
+* @purpose  Processes Authmgr-related event initiated by PACmgr. 
+*
+* @param (in)    vlanData  VLAN data
+* @param (in)    intIfNum  Interface Number
+* @param (in)    event
+*
+* @returns   SUCCESS  or  FAILURE
+*
+* @end
+*********************************************************************/
+RC_t authmgrVlanConfChangeCallback (dot1qNotifyData_t * vlanData,
+                                       uint32 intIfNum, uint32 event);
+
+/*********************************************************************
+* @purpose  Reset port information
+*
+* @param    intIfNum   @b{(input)} internal interface number
+* @param    initialize @b{(input)} initialize value
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments This value is set to  TRUE by management in order to force
+*           initialization of a port.  It is re-set to  FALSE after
+*           initialization has completed.
+* 
+* @end
+*********************************************************************/
+RC_t authmgrPortInfoReset(uint32 intIfNum,  BOOL initialize);
+
+/*********************************************************************
+ * @purpose  Cleans up a client session
+ *
+ * @param    mac_addr    @b{(input)}client's mac address 
+ *
+ * @returns   FALSE_
+ * @returns   TRUE
+ *
+ * @comments 
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrClientDelete( enetMacAddr_t macAddr);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/sonic-pac/authmgr/common/auth_mgr_common.h b/src/sonic-pac/authmgr/common/auth_mgr_common.h
new file mode 100755
index 000000000000..0d62fff6d1a1
--- /dev/null
+++ b/src/sonic-pac/authmgr/common/auth_mgr_common.h
@@ -0,0 +1,354 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#ifndef INCLUDE_AUTH_MGR_COMMON
+#define INCLUDE_AUTH_MGR_COMMON
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "commdefs.h"
+#include "datatypes.h"
+#include "resources.h"
+#include "component_mask.h"
+#include "log.h"
+#include "packet.h"
+#include "cpustats_api.h"
+
+#define SYSAPI_PRINTF printf
+#define __FP_FILE__ __FILE__
+
+#define  AUTHMGR_INTF_MAX_COUNT ( MAX_PORT_COUNT + 1)
+
+#define  IP6_LEN           40
+#define  IP4_STR_LEN       20
+#define  IP6_ADDR_LEN      16
+
+#define  DOT1Q_NULL_VLAN_ID     0
+#define  DOT1Q_MIN_VLAN_ID      1
+#define  DOT1Q_MAX_VLAN_ID      4094 // - RESERVED VLANs if any
+#define  VLAN_MAX_MASK_BIT       DOT1Q_MAX_VLAN_ID
+
+#define  CLI_MAX_STRING_LENGTH  256
+
+#define  ETYPE_EAPOL    0x888E
+
+/* EAPOL Packet types */
+#define EAPOL_EAPPKT      0  /* 0000 0000B */
+#define EAPOL_START       1  /* 0000 0001B */
+#define EAPOL_LOGOFF      2  /* 0000 0010B */
+#define EAPOL_KEY         3  /* 0000 0011B */
+#define EAPOL_ENCASFALERT 4  /* 0000 0100B */
+
+/* EAPOL packet header */
+typedef struct  eapolPacket_s
+{
+   uchar8   protocolVersion;
+   uchar8   packetType;
+   ushort16 packetBodyLength;
+}  eapolPacket_t;
+
+/* Length defines for EAPOL-Key frame */
+#define EAPOL_KEY_REPLAY_COUNTER_LEN    8
+#define EAPOL_KEY_IV_LEN                16
+#define EAPOL_KEY_SIGNATURE_LEN         16
+
+/* Bitmask defines for keyIndex field in EAPOL-Key frame */
+#define EAPOL_KEY_UNICAST  0x80  /* first bit */
+#define EAPOL_KEY_INDEX    0x7F  /* last 7 bits */
+
+/* EAPOL-Key packet format */
+typedef struct  eapolKeyPacket_s
+{
+   uchar8   descriptorType;
+   ushort16 keyLength;
+   uchar8   replayCounter[EAPOL_KEY_REPLAY_COUNTER_LEN];
+   uchar8   keyIV[EAPOL_KEY_IV_LEN];
+   uchar8   keyIndex;
+   uchar8   keySignature[EAPOL_KEY_SIGNATURE_LEN];
+}  eapolKeyPacket_t;
+
+/* EAP Packet code types */
+#define EAP_REQUEST   1
+#define EAP_RESPONSE  2
+#define EAP_SUCCESS   3
+#define EAP_FAILURE   4
+
+/* EAP packet header */
+typedef struct  authmgrEapPacket_s
+{
+   uchar8   code;
+   uchar8   id;
+   ushort16 length;
+}  authmgrEapPacket_t;
+
+/* Defines for 'type' field of EAP Request and Response frames */
+#define EAP_RRIDENTITY  1  /* Request/Identity or Response/Identity */
+#define EAP_RRNOTIF     2  /* Notification */
+#define EAP_RRNAK       3  /* NAK (Response only) */
+#define EAP_RRMD5       4  /* MD5-Challenge */
+#define EAP_RROTP       5  /* One-Time Password */
+#define EAP_RRGTK       6  /* Generic Token Card */
+#define EAP_TLS         13 /* EAP/TLS */
+#define EAP_TTLS        21 /* EAP/TTLS */
+#define EAP_PEAP        25 /* EAP/PEAP */
+
+/* EAP Request/Response packet header */
+typedef struct  eapRrPacket_s
+{
+   uchar8   type;
+}  eapRrPacket_t;
+
+/* Ethernet Encapsulation Overlay */
+typedef struct  enet_encaps_s
+{
+   ushort16       type;   /* ether type */
+} enet_encaps_t;
+
+#define  ENET_ENCAPS_HDR_SIZE    (uint32)sizeof( enet_encaps_t)
+
+/* Ethernet MAC Address */
+
+#define  ENET_HDR_SIZE    (uint32)sizeof( enetHeader_t)
+#define  ETH_HDR_SIZE    (uint32)sizeof( ethHeader_t)
+
+typedef enum
+{
+   AUTH_METHOD_UNDEFINED = 0,
+   AUTH_METHOD_LOCAL,
+   AUTH_METHOD_NONE,
+   AUTH_METHOD_RADIUS,
+   AUTH_METHOD_REJECT
+}  USER_MGR_AUTH_METHOD_t;
+
+#define  MAX_AUTH_METHODS 4
+
+#define  MAX_FRAME_SIZE   3000
+
+#define  VLAN_INDICES   ((4095) / (sizeof( uchar8) * 8) + 1)
+
+typedef enum dot1qTaggingMode_s
+{
+   DOT1Q_MEMBER_UNTAGGED = 0,
+   DOT1Q_MEMBER_TAGGED = 1
+} dot1qTaggingMode_t;
+
+typedef struct
+{
+   uchar8   value[ VLAN_INDICES];
+}  VLAN_MASK_t;
+
+#define  VLAN_STRING_SIZE   (32 + 1)
+
+/* VLAN Notification Structure */
+typedef struct dot1qNotifyData_s
+{
+//    uint32 numVlans; /* If num Vlan is 1 use vlanId member of the union, else use vlanMask of the union*/
+//     VLAN_MASK_t vlanTagModeMask; /* If set, VLAN member is tagged else untagged. */
+     BOOL tagged; /* VLAN member is tagged else untagged. */
+    union
+    {
+        uint32 vlanId;
+         char8 vlanString[ VLAN_STRING_SIZE];
+//         VLAN_MASK_t vlanMask;
+    }data;
+}dot1qNotifyData_t;
+
+typedef struct sysnet_pdu_info_s
+{
+  /* Originally, this structure contained only intIfNum and vlanId on the
+   * receive side. Unfortunately, the meaning of intIfNum depends on context. 
+   * intIfNum is originally set to the ingress physical port. 
+   * Once IP MAP processes an incoming packet, it resets intIfNum to 
+   * the logical (e.g., VLAN routing interface) ingress interface. See ipMapPduRcv().
+   * All the software forwarding code and sysnet interceptors depend on 
+   * this behavior. DHCP relay needs to know the ingress physical port to
+   * set option 82 correctly. So we add a new member, rxPort, to this
+   * structure as a place to put this. If we were starting over, intIfNum
+   * would always have the same meaning and we'd add a field for the 
+   * logical ingress interface, but I'm afraid we're stuck with 
+   * a bunch of code that depends on the current behavior. NOTE:  rxPort is 
+   * only set in IP MAP. So if packet hasn't been handled by IP MAP, you can't
+   * use rxPort. */
+  uint32 intIfNum;          /* Receiving intIfNum */
+  uint32 rxPort;            /* Physical port where packet was received */
+  uint32 vlanId;            /* Receiving VLAN */
+  uint32 innerVlanId;        /* Receiving inner VLAN if the packet is double tagged.*/
+
+  uint32 destIntIfNum;      /* Destination intIfNum */
+  uint32 destVlanId;        /* Destination VLAN */
+
+  uint32 vrfId;             /* NOTE: Identifier of the VRF that this PDU is received on
+                                * and this field makes sense only when 'intIfNum' is not set.
+                                * If 'intIfNum' is set, this field can be derived from that
+                                * receiving interface number and 'vrfId' would be redundant. */
+} sysnet_pdu_info_t;
+
+typedef enum
+{
+  SYSNET_PDU_RC_DISCARD = 0,  /* Discard this frame */
+  SYSNET_PDU_RC_CONSUMED,     /* Frame has been consumed by interceptor */
+  SYSNET_PDU_RC_COPIED,       /* Frame has been copied by interceptor */
+  SYSNET_PDU_RC_IGNORED,      /* Frame ignored by interceptor */
+  SYSNET_PDU_RC_PROCESSED,    /* Frame has been processed by interceptor */
+  SYSNET_PDU_RC_MODIFIED,     /* Frame has been modified by interceptor */
+  SYSNET_PDU_RC_LAST
+} SYSNET_PDU_RC_t;
+
+/* TLV handle type */
+typedef uint32    tlvHandle_t;
+
+typedef struct
+{
+  uint32     type;                           /* TLV type identifier        */
+  uint32     length;                         /* TLV length of value field  */
+   uchar8     valueStart[1];                  /* start of TLV value field   */
+}  tlv_t;
+
+
+/* VLAN outcall notification events */
+typedef enum
+{
+  VLAN_ADD_NOTIFY = 0x00000001,     /* Create a new VLAN */
+  VLAN_DELETE_PENDING_NOTIFY = 0x00000002, /* Vlan is about to be deleted */
+  VLAN_DELETE_NOTIFY = 0x00000004,      /* Delete a VLAN */
+  VLAN_ADD_PORT_NOTIFY = 0x00000008,    /* Add a port to a VLAN */
+  VLAN_DELETE_PORT_NOTIFY = 0x00000010,  /* Delete a port from a VLAN */
+  VLAN_START_TAGGING_PORT_NOTIFY = 0x00000020,  /* Start tagging on a port */
+  VLAN_STOP_TAGGING_PORT_NOTIFY = 0x00000040,   /* Stop tagging on a port */
+  VLAN_INITIALIZED_NOTIFY = 0x00000080,
+  VLAN_RESTORE_NOTIFY = 0x00000100,
+  VLAN_PVID_CHANGE_NOTIFY = 0x00000200,        /* PVID change on a port*/
+  VLAN_DOT1P_PRIORITY_CHANGE_NOTIFY = 0x00000400,        /* dot1p priority change on port*/
+  VLAN_DYNAMIC_TO_STATIC_NOTIFY     = 0x00000800, /* Dynamic to static convert notification */
+  VLAN_INGRESS_FILTER_PORT_NOTIFY   = 0x00001000, /* Ingress filter notification on port */
+  VLAN_SWITCHPORT_MODE_CHANGE_NOTIFY = 0x00002000,  /* Switchport mode change on port notification */
+  VLAN_AUTO_TRUNK_CHANGE_NOTIFY   = 0x00004000, /* Change in auto-trunk configuration os a port */
+  VLAN_LAST_NOTIFY                = 0x00004000  /* Any time we add an event adjust this be the last in the series */
+} vlanNotifyEvent_t;
+
+
+/*
+** The Termination Action value codes
+*/
+#define RADIUS_TERMINATION_ACTION_DEFAULT  0
+#define RADIUS_TERMINATION_ACTION_RADIUS   1
+#define RADIUS_ACCT_TERM_CAUSE_REAUTHENTICATION_FAILURE       20
+
+
+#define RADIUS_VENDOR_9_VOICE 1<<0
+#define RADIUS_VENDOR_9_DACL 1<<1
+#define RADIUS_VENDOR_9_SWITCH 1<<2
+#define RADIUS_VENDOR_9_REDIRECT_URL 1<<3
+#define RADIUS_VENDOR_9_REDIRECT_ACL 1<<4
+#define RADIUS_VENDOR_9_ACS_SEC_DACL 1<<5
+#define RADIUS_VENDOR_9_LINKSEC_POLICY 1<<6
+
+#define RADIUS_VENDOR_311_MS_MPPE_SEND_KEY 1<<0
+#define RADIUS_VENDOR_311_MS_MPPE_RECV_KEY 1<<1
+
+/* The type of attribute values for Tunnel Medium type attribute
+*/
+#define RADIUS_TUNNEL_MEDIUM_TYPE_802    6
+
+#define RADIUS_ATTR_TYPE_TUNNEL_TYPE_SPECIFIED              0x1
+#define RADIUS_ATTR_TYPE_TUNNEL_MEDIUM_TYPE_SPECIFIED       0x2
+#define RADIUS_ATTR_TYPE_TUNNEL_PRIVATE_GROUP_ID_SPECIFIED  0x4
+#define RADIUS_REQUIRED_TUNNEL_ATTRIBUTES_SPECIFIED         0x7
+
+/* Downloadable ACL Fields */
+#define RADIUS_TLV_HEADER_LENGTH             2
+#define RADIUS_VALUE_LENGTH             253
+
+#define RADIUS_ATTR_SIZE_SERVICE_TYPE             6
+/*
+** The Service-Type value codes
+*/
+#define RADIUS_SERVICE_TYPE_LOGIN                 1
+#define RADIUS_SERVICE_TYPE_FRAMED                2
+#define RADIUS_SERVICE_TYPE_CALLBACK_LOGIN        3
+#define RADIUS_SERVICE_TYPE_CALLBACK_FRAMED       4
+#define RADIUS_SERVICE_TYPE_OUTBOUND              5
+#define RADIUS_SERVICE_TYPE_ADMIN                 6
+#define RADIUS_SERVICE_TYPE_NAS_PROMPT            7
+#define RADIUS_SERVICE_TYPE_AUTHEN_ONLY           8
+#define RADIUS_SERVICE_TYPE_CALLBACK_NAS_PROMPT   9
+#define RADIUS_SERVICE_TYPE_CALL_CHECK            10
+
+
+typedef struct radiusValuePair_s
+{
+   struct radiusValuePair_s *nextPair;
+   uint32                attrId;
+   uint32                attrType;
+   uint32                vendorCode;
+   uint32                vsAttrId;
+   uint32                intValue;
+    char8                 strValue[RADIUS_VALUE_LENGTH + 1];
+
+} radiusValuePair_t;
+
+typedef enum
+{
+   ACCT_METHOD_UNDEFINED = 0,
+   ACCT_METHOD_TACACS,
+   ACCT_METHOD_RADIUS,
+   ACCT_METHOD_MAX
+}  USER_MGR_ACCT_METHOD_t;
+
+#define  MAX_AML_NAME_LEN         15 /*Maximum length of the Accounting Method List Name*/
+
+/* Port PAE capabilities bitmask values */
+#define  DOT1X_PAE_PORT_NONE_CAPABLE 0x00
+#define  DOT1X_PAE_PORT_AUTH_CAPABLE 0x01
+#define  DOT1X_PAE_PORT_SUPP_CAPABLE 0x02
+
+#define  DOT1X_PAE_PORT_PROTOCOL_VERSION_2 2
+#define  DOT1X_PAE_PORT_PROTOCOL_VERSION_3 3
+
+#define RADIUS_ACCT_TERM_CAUSE_ADMIN_RESET 6
+
+#define DS_ADMIN_MODE_NOTIFY     0x00000001
+#define DSV6_ADMIN_MODE_NOTIFY   0x00000002
+
+typedef enum
+{
+   FDB_ADDR_FLAG_STATIC = 0,
+   FDB_ADDR_FLAG_LEARNED,
+   FDB_ADDR_FLAG_MANAGEMENT,
+   FDB_ADDR_FLAG_GMRP_LEARNED,
+   FDB_ADDR_FLAG_SELF,
+   FDB_ADDR_FLAG_AUTHMGR_STATIC,
+   FDB_ADDR_FLAG_DOT1X_STATIC,
+   FDB_ADDR_FLAG_DOT1AG_STATIC,
+   FDB_ADDR_FLAG_ETH_CFM_STATIC,
+   FDB_ADDR_FLAG_L3_MANAGEMENT, /* Routing Intf address */
+   FDB_ADDR_FLAG_LEARNED_UNCONFIRMED, /* Address is learned, but not guaranteed
+                                         * to be in HW (relevant for SW learning). */
+   FDB_ADDR_FLAG_FIP_SNOOP_LEARNED, /* MAC added by FIP snooping */
+   FDB_ADDR_FLAG_CAPTIVE_PORTAL_STATIC, /* CP client MAC Addr */
+   FDB_ADDR_FLAG_Y1731_STATIC,
+}  FDB_ADDR_FLAG_t;
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/sonic-pac/authmgr/common/auth_mgr_exports.h b/src/sonic-pac/authmgr/common/auth_mgr_exports.h
new file mode 100755
index 000000000000..311a19c64c89
--- /dev/null
+++ b/src/sonic-pac/authmgr/common/auth_mgr_exports.h
@@ -0,0 +1,412 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#ifndef __AUTHMGR_EXPORTS_H_
+#define __AUTHMGR_EXPORTS_H_
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "auth_mgr_common.h"
+#include "pacinfra_common.h"
+#include "defaultconfig.h"
+
+/* AUTHMGR Component Feature List */
+typedef enum
+{
+   AUTHMGR_FEATURE_ID = 0,                   /* general support statement */
+   AUTHMGR_VLANASSIGN_FEATURE_ID,           /* RFC 3580 VLAN Assignments via dot1x */
+   AUTHMGR_DYNAMIC_VLANASSIGN_FEATURE_ID,           
+   AUTHMGR_MAB_FEATURE_ID,
+   AUTHMGR_DACL_FEATURE_ID,
+   AUTHMGR_FEATURE_ID_TOTAL,                /* total number of enum values */
+}  AUTHMGR_FEATURE_IDS_t;
+
+
+
+#define  AUTHMGR_USER_NAME_LEN             65
+#define  AUTHMGR_CHALLENGE_LEN             32
+
+#define AUTHMGR_MAC_ADDR_STR_LEN (( MAC_ADDR_LEN * 2) + ( MAC_ADDR_LEN - 1))
+#define AUTHMGR_SESSION_ID_LEN   AUTHMGR_USER_NAME_LEN * 2
+
+
+/******************************************************************/
+/*************       Start AUTHMGR types and defines        *********/
+/******************************************************************/
+
+#define AUTHMGR_USER_INDEX_INVALID    -1
+
+#define AUTHMGR_SERVER_STATE_LEN 253
+#define AUTHMGR_SERVER_CLASS_LEN 253
+
+
+#define AUTHMGR_RADIUS_VLAN_ASSIGNED_LEN  32 /* Radius Assigned vlan length */
+
+typedef enum
+{
+   AUTHMGR_TYPE_ORDER = 1,
+   AUTHMGR_TYPE_PRIORITY,
+}  AUTHMGR_METHOD_TYPE_t;
+
+typedef enum
+{
+   AUTHMGR_METHOD_NONE = 0,
+   AUTHMGR_METHOD_8021X,
+   AUTHMGR_METHOD_MAB,
+   AUTHMGR_METHOD_LAST
+}  AUTHMGR_METHOD_t;
+
+typedef enum
+{
+   AUTHMGR_NEW_CLIENT = 1, /* fdb entry is received */
+   AUTHMGR_AUTH_FAIL,
+   AUTHMGR_AUTH_SUCCESS,
+   AUTHMGR_AUTH_TIMEOUT,
+   AUTHMGR_AUTH_SERVER_COMM_FAILURE,
+   AUTHMGR_CLIENT_DISCONNECTED,
+   AUTHMGR_METHOD_CHANGE,
+}  AUTHMGR_STATUS_t;
+
+typedef enum
+{
+  AUTHMGR_INITIALIZE = 0,
+  AUTHMGR_AUTHENTICATING,
+  AUTHMGR_AUTHENTICATED,
+  AUTHMGR_HELD,
+  AUTHMGR_UNAUTHENTICATED,
+  AUTHMGR_STATES
+} AUTHMGR_STATES_t;
+
+typedef enum
+{
+   AUTHMGR_ATTR_NA = 0,
+   AUTHMGR_ATTR_RADIUS
+}  AUTHMGR_ATTR_PROCESS_t;
+
+/* Port authorization status */
+typedef enum
+{
+   AUTHMGR_PORT_STATUS_NA = 0,
+   AUTHMGR_PORT_STATUS_AUTHORIZED,
+   AUTHMGR_PORT_STATUS_UNAUTHORIZED
+}  AUTHMGR_PORT_STATUS_t;
+
+typedef enum
+{
+   AUTHMGR_METHOD_8021X_ATTEMPTS = 1,
+   AUTHMGR_METHOD_8021X_FAILED_ATTEMPTS,
+   AUTHMGR_METHOD_MAB_ATTEMPTS,
+   AUTHMGR_METHOD_MAB_FAILED_ATTEMPTS,
+}  AUTHMGR_STATS_TYPE_t;
+
+
+/* Port authorization mode */
+typedef enum
+{
+   AUTHMGR_PORT_CONTROL_INVALID = 0,
+   AUTHMGR_PORT_FORCE_UNAUTHORIZED = 1,
+   AUTHMGR_PORT_FORCE_AUTHORIZED,
+   AUTHMGR_PORT_AUTO,
+   AUTHMGR_PORT_NA
+}  AUTHMGR_PORT_CONTROL_t;
+
+
+/* Port host mode */
+typedef enum
+{
+   AUTHMGR_INVALID_HOST_MODE = 0,
+   AUTHMGR_SINGLE_AUTH_MODE,
+   AUTHMGR_MULTI_HOST_MODE,
+   AUTHMGR_MULTI_AUTH_MODE
+}  AUTHMGR_HOST_CONTROL_t;
+
+
+/* L2 learning */
+typedef enum
+{
+   AUTHMGR_PORT_LEARNING_NA = 0,
+   AUTHMGR_PORT_LEARNING_DISABLE,
+   AUTHMGR_PORT_LEARNING_ENABLE,
+   AUTHMGR_PORT_LEARNING_CPU
+}  AUTHMGR_PORT_LEARNING_t;
+
+/* violation callback */
+typedef enum
+{
+   AUTHMGR_PORT_VIOLATION_CALLBACK_NA = 0,
+   AUTHMGR_PORT_VIOLATION_CALLBACK_DISABLE,
+   AUTHMGR_PORT_VIOLATION_CALLBACK_ENABLE
+}  AUTHMGR_PORT_VIOLATION_CALLBACK_t;
+
+typedef enum authmgrClientType_s
+{
+  AUTHMGR_CLIENT_UNASSIGNED = 0,
+  AUTHMGR_CLIENT_AWARE,
+  AUTHMGR_CLIENT_UNAWARE,
+  AUTHMGR_CLIENT_MAB
+}authmgrClientType_t;
+
+
+typedef enum authmgrVlanType_s
+{
+  AUTHMGR_VLAN_UNASSIGNED = 0,
+  AUTHMGR_VLAN_RADIUS,
+  AUTHMGR_VLAN_UNAUTH,
+  AUTHMGR_VLAN_GUEST,
+  AUTHMGR_VLAN_DEFAULT,
+  AUTHMGR_VLAN_BLOCKED
+}authmgrVlanType_t;
+
+/* Vlan Assignment Mode */
+typedef enum
+{
+   AUTHMGR_NOT_ASSIGNED = 0,
+   AUTHMGR_DEFAULT_ASSIGNED_VLAN,
+   AUTHMGR_RADIUS_ASSIGNED_VLAN,
+   AUTHMGR_UNAUTHENTICATED_VLAN,
+   AUTHMGR_GUEST_VLAN,
+}  AUTHMGR_VLAN_ASSIGNED_MODE_t;
+
+
+/* Authentication violation types */
+typedef enum
+{
+   AUTHMGR_PORT_AUTH_VIOLATION_INVALID = 0,
+   AUTHMGR_PORT_AUTH_VIOLATION_PROTECT,
+   AUTHMGR_PORT_AUTH_VIOLATION_RESTRICT,
+   AUTHMGR_PORT_AUTH_VIOLATION_SHUTDOWN,
+   AUTHMGR_PORT_AUTH_VIOLATION_MODE_LAST
+}  AUTHMGR_PORT_AUTH_VIOLATION_MODE_t;
+
+
+/* Radius Termination Action (needed by UI)*/
+typedef enum 
+{
+   AUTHMGR_TERMINATION_ACTION_DEFAULT = 1,
+   AUTHMGR_TERMINATION_ACTION_RADIUS
+}  AUTHMGR_TERMINATION_ACTION_t;
+
+
+/* Authentication types used for Mac-Authentication Bypass */
+typedef enum
+{
+   AUTHMGR_PORT_MAB_AUTH_TYPE_INVALID = 0,
+   AUTHMGR_PORT_MAB_AUTH_TYPE_EAP_MD5,
+   AUTHMGR_PORT_MAB_AUTH_TYPE_PAP,
+   AUTHMGR_PORT_MAB_AUTH_TYPE_CHAP,
+   AUTHMGR_PORT_MAB_AUTH_TYPE_LAST
+}  AUTHMGR_PORT_MAB_AUTH_TYPE_t;
+
+
+typedef enum authmgrFailureReason_s
+{
+  AUTHMGR_FAIL_REASON_INVALID  = 0,
+  AUTHMGR_FAIL_REASON_AUTH_FAILED  = 1,
+  AUTHMGR_FAIL_REASON_WRONG_AUTH     = 2,
+  AUTHMGR_FAIL_REASON_INVALID_USER   = 3
+  
+}authmgrFailureReason_t;
+
+typedef enum authmgrRadiusAttrFlags_s
+{
+  AUTHMGR_RADIUS_ATTR_TYPE_STATE = (1 << 0),
+  AUTHMGR_RADIUS_ATTR_TYPE_SERVICE_TYPE = (1 << 1),
+  AUTHMGR_RADIUS_ATTR_TYPE_CLASS = (1 << 2),
+  AUTHMGR_RADIUS_ATTR_TYPE_SESSION_TIMEOUT = (1 << 3),
+  AUTHMGR_RADIUS_ATTR_TYPE_TERMINATION_ACTION = (1 << 4),
+  AUTHMGR_RADIUS_ATTR_TYPE_EAP_MESSAGE = (1 << 5),
+  AUTHMGR_RADIUS_ATTR_TYPE_TUNNEL_TYPE = (1 << 6),
+  AUTHMGR_RADIUS_ATTR_TYPE_TUNNEL_MEDIUM_TYPE = (1 << 7),
+  AUTHMGR_RADIUS_ATTR_TYPE_TUNNEL_PRIVATE_GROUP_ID = (1 << 8),
+  AUTHMGR_RADIUS_ATTR_USER_NAME = (1 << 9)
+}authmgrRadiusAttrFlags_t;
+
+
+typedef enum authmgrClientEventCode_s
+{
+  AUTHMGR_8021X_FIRST = (1 << 0),
+  AUTHMGR_8021X_HIGHER_PRIO = (1 << 1)
+}authmgrClientEventCode_t;
+
+
+
+typedef struct authmgrPortSessionStats_s
+{
+  /* Authenticator Stats (9.4.4) */
+  uint32        sessionOctetsRx;
+  uint32        sessionOctetsTx;
+  uint32        sessionOctetsGbRx;
+  uint32        sessionOctetsGbTx;
+  uint32        sessionPacketsRx;
+  uint32        sessionPacketsGbRx;
+  uint32        sessionPacketsTx;
+  uint32        sessionPacketsGbTx;
+  uint32        sessionTime;
+   uchar8        userName[AUTHMGR_USER_NAME_LEN];
+   char8         sessionId[AUTHMGR_SESSION_ID_LEN];
+} authmgrPortSessionStats_t;
+
+typedef enum
+{
+  AUTHMGR_LOGICAL_PORT = 0,
+  AUTHMGR_PHYSICAL_PORT
+}authmgrPortType_t;
+
+typedef enum authmgrNodeType_s
+{
+  AUTHMGR_NODE_UNASSIGNED = 0,
+  AUTHMGR_PHYSICAL,
+  AUTHMGR_LOGICAL
+}authmgrNodeType_t;
+
+
+typedef enum authmgrFilterAssignedType_s
+{
+  AUTHMGR_FILTER_ASSIGNED_NONE = 0,
+  AUTHMGR_FILTER_ASSIGNED_RADIUS = 1,
+  AUTHMGR_FILTER_ASSIGNED_FAILED = 2
+}authmgrFilterAssignedType_t;
+
+
+
+typedef struct authmgrAuthAttributeInfo_s
+{
+   uchar8   userName[AUTHMGR_USER_NAME_LEN];
+  uint32   userNameLen;
+
+   uchar8   serverState[AUTHMGR_SERVER_STATE_LEN];
+  uint32   serverStateLen;
+
+   uchar8   serverClass[AUTHMGR_SERVER_CLASS_LEN];
+  uint32   serverClassLen;
+
+  uint32   sessionTimeout;
+  uint32   terminationAction;
+
+  uint32   accessLevel;  
+   uchar8   idFromServer;   /* Most recent ID in EAP pkt received from Auth Server (0-255) */
+   uchar8   vlanString[AUTHMGR_RADIUS_VLAN_ASSIGNED_LEN+1];
+  uint32   vlanId; /* parsed VLAN id from vlan string */ 
+  uint32   attrFlags;
+  uint32   vlanAttrFlags;
+   BOOL     rcvdEapAttr;
+}authmgrAuthAttributeInfo_t;
+
+
+typedef struct authmgrClientAuthInfo_s
+{
+   enetMacAddr_t          macAddr;
+  uint32                 eapolVersion;
+  uint32                 authMethod;
+  authmgrAuthAttributeInfo_t attrInfo;
+  uint32                 sessionId;
+   char8 authmgrUserName[AUTHMGR_USER_NAME_LEN];
+  uint32 authmgrUserNameLength;
+}authmgrClientAuthInfo_t;
+
+typedef struct authmgrClientStatusInfo_s
+{
+  union 
+  {
+    authmgrClientAuthInfo_t authInfo;
+    uint32               enableStatus;
+  }info;
+}authmgrClientStatusInfo_t;
+
+typedef struct authmgrClientStatusReply_s
+{
+  char intf[16];
+  char addr[6];
+  unsigned int method;
+  unsigned int status;
+  union 
+  {
+    unsigned int vlanId;
+    unsigned int enableStatus;
+  }info;
+}authmgrClientStatusReply_t;
+
+typedef enum authmgrNotifyEvent_s
+{
+  authmgrClientReAuthenticate = 1,
+  authmgrClientAuthStart,
+//  authmgrClientReqIdTx,
+  authmgrClientDisconnect
+}authmgrNotifyEvent_t;
+
+
+#define  AUTHMGR_MULTI_HOST_MODE_MAX_USERS 1
+#define  AUTHMGR_SINGLE_AUTH_MODE_MAX_USERS 1
+
+
+#define  AUTHMGR_RADIUS_MAX_AUTH_ATTEMPTS	1
+#define  AUTHMGR_RADIUS_MAX_AUTH_ATTEMPTS_RANGE_MIN 1
+#define  AUTHMGR_RADIUS_MAX_AUTH_ATTEMPTS_RANGE_MAX 5
+
+#define  AUTHMGR_AUTHENTICATION_MAX_EVENTS        1024
+
+#define  AUTHMGR_AUTHENTICATION_MAX_INTF_EVENTS   20
+
+
+#define  AUTHMGR_RESTART_TIMER_MIN      10 
+#define  AUTHMGR_RESTART_TIMER_MAX      65535 
+
+#define  AUTHMGR_PORT_MIN_MAC_USERS        1
+#define  AUTHMGR_PORT_MAX_MAC_USERS        FD_AUTHMGR_PORT_MAX_USERS 
+
+
+#define  AUTHMGR_PORT_MIN_QUIET_PERIOD     0
+#define  AUTHMGR_PORT_MAX_QUIET_PERIOD     65535
+
+#define  AUTHMGR_PORT_MIN_TX_PERIOD        1
+#define  AUTHMGR_PORT_MAX_TX_PERIOD        65535
+
+#define  AUTHMGR_PORT_MIN_SUPP_TIMEOUT     1
+#define  AUTHMGR_PORT_MAX_SUPP_TIMEOUT     65535
+
+#define  AUTHMGR_PORT_MIN_SERVER_TIMEOUT   1
+#define  AUTHMGR_PORT_MAX_SERVER_TIMEOUT   65535
+
+#define  AUTHMGR_PORT_MIN_MAX_REQ          1
+#define  AUTHMGR_PORT_MAX_MAX_REQ          20
+
+#define  AUTHMGR_PORT_MIN_MAX_REQ_IDENTITY     1
+#define  AUTHMGR_PORT_MAX_MAX_REQ_IDENTITY     20
+
+#define  AUTHMGR_PORT_MIN_REAUTH_PERIOD    1
+#define  AUTHMGR_PORT_MAX_REAUTH_PERIOD    65535
+
+#define  AUTHMGR_MAX_USERS_PER_PORT  FD_AUTHMGR_PORT_MAX_USERS
+
+/* Get the re-authentication timeout value from the server */
+#define  AUTHMGR_PORT_REAUTH_PERIOD_FROM_SERVER   TRUE 
+
+/******************** conditional Override *****************************/
+
+#ifdef INCLUDE_AUTH_MGR_EXPORTS_OVERRIDES
+#include "auth_mgr_exports_overrides.h"
+#endif
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __AUTHMGR_EXPORTS_H_*/
diff --git a/src/sonic-pac/authmgr/common/comm_mask.h b/src/sonic-pac/authmgr/common/comm_mask.h
new file mode 100755
index 000000000000..b09fa49fcc0e
--- /dev/null
+++ b/src/sonic-pac/authmgr/common/comm_mask.h
@@ -0,0 +1,704 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#ifndef INCLUDE_COMM_MASK
+#define INCLUDE_COMM_MASK
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//#include "default_cnfgr.h" // shiva check with amit
+#include "auth_mgr_common.h"
+#include "pacinfra_common.h"
+
+
+/*--------------------------------------*/
+/*  Common Mask Macros & Defines        */
+/*  Generic Mask Macros & Defines        */
+/*--------------------------------------*/
+
+/*
+ * Note that these macros are for one-based masks, not zero-based.
+ */
+
+typedef  uchar8  mask_values_t;
+
+/* Number of entries per mask unit */
+#define  MASK_UNIT                    (sizeof( mask_values_t) * 8)
+
+/*
+ *
+ * Number of elements of  mask_values_t in mask.
+ *
+ * Declare a mask using this macro where _size is the number of bits to be
+ * used, starting with bit 1.
+ *
+ * E.g., for a mask for interfaces:
+ *
+ *  mask_values_t myMask[ MASK_LEN( MAX_INTERFACE_COUNT)];
+ *
+ */
+#define  MASK_LEN(_size)              ((((_size) - 1) /  MASK_UNIT) + 1)
+
+#define  MASK_BYTE_NUM(j)             (sizeof((j)) / sizeof((j)[0]))
+
+/*
+ * NONZEROMASK returns 1 if any bit in word mask of NUM length
+ * is turned-on.  The result, 1 or 0 is stored in result.
+ */
+#define  NONZEROMASK(_mask, _result, _size)             \
+  do                                                      \
+  {                                                       \
+    uint32 _i_;                                        \
+     mask_values_t *_p_ = ( mask_values_t *)&(_mask); \
+                                                          \
+    (_result) = 0;                                        \
+    for (_i_ = 0; _i_ <  MASK_LEN(_size); _i_++)        \
+    {                                                     \
+      if (_p_[_i_] != 0)                                  \
+      {                                                   \
+        (_result) = 1;                                    \
+        break;                                            \
+      }                                                   \
+    }                                                     \
+  } while (0)
+
+
+/* SETMASKBIT turns on bit index # k in mask j. Note: k is one-based. */
+#define  SETMASKBIT(j, k)                                          \
+  ((j)[((k) - 1) /  MASK_UNIT] |= 1 << (((k) - 1) %  MASK_UNIT))
+
+/* CLRMASKBIT turns off bit index # k in mask j. Note: k is one-based. */
+#define  CLRMASKBIT(j, k)                                          \
+  ((j)[((k) - 1) /  MASK_UNIT] &= ~(1 << (((k)-1) %  MASK_UNIT)))
+
+/* SETMASKBITVAL sets bit index # k in mask j to value.  Any non-zero value is
+ * converted to 1. Note: k is one-based. 
+ */
+#define  SETMASKBITVAL(j, k, v)                                        \
+  ((j)[((k) - 1) /  MASK_UNIT] =                                       \
+   (((j)[((k) - 1) /  MASK_UNIT] & ~(1 << (((k)-1) %  MASK_UNIT))) | \
+    (!!(v) << (((k) - 1) %  MASK_UNIT))))
+
+
+
+/* MASKEQ sets mask j equal to mask k. */
+#define  MASKEQ(j, k, _size)                                       \
+  do                                                                 \
+  {                                                                  \
+    uint32 x;                                                     \
+                                                                     \
+    for (x = 0; x <  MASK_LEN(_size); x++)                         \
+    {                                                                \
+      (j)[x] = (k)[x];                                               \
+    }                                                                \
+  } while (0)
+
+/* MASKOREQ or's on the bits in mask j that are on in either mask j or k. */
+#define  MASKOREQ(j, k, _size)                                     \
+  do                                                                 \
+  {                                                                  \
+    uint32 x;                                                     \
+                                                                     \
+    for (x = 0; x <  MASK_LEN(_size); x++)                         \
+    {                                                                \
+      (j)[x] |= (k)[x];                                              \
+    }                                                                \
+  } while (0)
+
+/* MASKOR or's two masks on per byte basis */
+#define  MASKOR(j, k)                                              \
+  do                                                                 \
+  {                                                                  \
+    uint32 x;                                                     \
+                                                                     \
+    for (x = 0; x <  MASK_BYTE_NUM(j); x++)                       \
+    {                                                                \
+      (j)[x] |= (k)[x];                                              \
+    }                                                                \
+  } while (0)
+
+
+/* MASKEXOREQ turns-on the bits in mask j that are on in either mask j and k but not in both. */
+#define  MASKEXOREQ(j, k, _size)                                   \
+  do                                                                 \
+  {                                                                  \
+    uint32 x;                                                     \
+                                                                     \
+    for (x = 0; x <  MASK_LEN(_size); x++)                         \
+    {                                                                \
+      (j)[x] ^= (k)[x];                                              \
+    }                                                                \
+  } while (0)
+
+/* MASKANDEQ turns-on the bits in mask j that are on in both mask j and k. */
+#define  MASKANDEQ(j, k, _size)                                    \
+  do                                                                 \
+  {                                                                  \
+    uint32 x;                                                     \
+                                                                     \
+    for (x = 0; x <  MASK_LEN(_size); x++)                         \
+    {                                                                \
+      (j)[x] &= (k)[x];                                              \
+    }                                                                \
+  } while (0)
+
+/* MASKAND turns-on the bits in mask j that are on in both mask j and k. */
+#define  MASKAND(j, k)                                             \
+  do                                                                 \
+  {                                                                  \
+    uint32 x;                                                     \
+                                                                     \
+    for (x = 0; x <  MASK_BYTE_NUM(j); x++)                        \
+    {                                                                \
+      (j)[x] &= (k)[x];                                              \
+    }                                                                \
+  } while (0)
+
+/* MASKINV inverts the bits in mask j. */
+#define  MASKINV(j, _size)                                         \
+  do                                                                 \
+  {                                                                  \
+    uint32 x;                                                     \
+                                                                     \
+    for (x = 0; x <  MASK_LEN(_size); x++)                         \
+    {                                                                \
+      (j)[x] = ~((j)[x]);                                            \
+    }                                                                \
+  } while (0)
+
+/* MASKANDEQINV turns on the bits in mask j that are on in both mask j
+   and the bitwise-inverse of mask k. */
+#define  MASKANDEQINV(j, k, _size)                                 \
+  do                                                                 \
+  {                                                                  \
+    uint32 x;                                                     \
+                                                                     \
+    for (x = 0; x <  MASK_LEN(_size); x++)                         \
+    {                                                                \
+      (j)[x] &= ~((k)[x]);                                           \
+    }                                                                \
+  } while (0)
+
+/* MASKBITSCLR clears bits in mask j that are on in mask k */
+#define  MASKBITSCLR(j, k)                                         \
+  do                                                                 \
+  {                                                                  \
+    uint32 x;                                                     \
+                                                                     \
+    for (x = 0; x <  MASK_BYTE_NUM((j)); x++)                      \
+    {                                                                \
+      (j)[x] &= ~((k)[x]);                                           \
+    }                                                                \
+  } while (0)
+
+/* FHMASKBIT finds the index of the most-significant bit turned-on in
+   mask j and returns that index in k.  Since this is a 1-based
+   mask, 0 is returned for "no bits set". */
+#define  FHMASKBIT(j, k, _size)                                    \
+  do                                                                 \
+  {                                                                  \
+     int32 x;                                                      \
+                                                                     \
+    for (x = ( MASK_LEN(_size) - 1); x >= 0; x--)                  \
+    {                                                                \
+      if ( (j)[x] )                                                  \
+      {                                                              \
+        break;                                                       \
+      }                                                              \
+    }                                                                \
+                                                                     \
+    k = 0;                                                           \
+    if (x >= 0)                                                      \
+    {                                                                \
+       int32 i;                                                    \
+      for (i =  MASK_UNIT - 1; i >= 0; i--)                        \
+      {                                                              \
+        if ( (j)[x] & (1 << i))                                      \
+        {                                                            \
+          k = i + 1 + (x *  MASK_UNIT);                            \
+          break;                                                     \
+        }                                                            \
+      }                                                              \
+    }                                                                \
+  } while (0)
+
+/* ISMASKBITSET returns 0 if the interface k is not set in mask j */
+#define  ISMASKBITSET(j, k)                                        \
+  ((j)[(((k) - 1) /  MASK_UNIT)] & ( 1 << ((k-1) %  MASK_UNIT)))
+
+/* MASKREV reverses the bits in within each byte of mask j. */
+#define  MASKREV(j, _size)                     \
+  do                                             \
+  {                                              \
+    uint32 x,y;                               \
+     uchar8 b=0;                               \
+                                                 \
+    for (x = 0; x <  MASK_LEN(_size); x++)     \
+    {                                            \
+      b = 0;                                     \
+      for (y=0; y<8; y++)                        \
+      {                                          \
+        if ((j).value[x] & (0x80 >> y))          \
+        {                                        \
+          b |= 0x1 << y;                         \
+        }                                        \
+      }                                          \
+      (j).value[x] = b;                          \
+    }                                            \
+  } while (0)
+
+/* FLCLEARMASKBIT finds the index of the least-significant bit turned-off in
+ * mask _mask and returns that index in _result.  Since this is a 1-based
+ * mask, 0 is returned for "no bits set". */
+#define  FLCLEARMASKBIT(_mask, _result, _size)                     \
+    do                                                               \
+    {                                                                \
+         int32 x;                                                  \
+         mask_values_t *_p_ = ( mask_values_t *)&(_mask);        \
+                                                                     \
+        for (x = 0; x <  MASK_LEN(_size); x++)                     \
+        {                                                            \
+            if ( (_p_)[x]  != 0xFF)                                  \
+            {                                                        \
+                break;                                               \
+            }                                                        \
+        }                                                            \
+                                                                     \
+        if(x <  MASK_LEN(_size))                                   \
+        {                                                            \
+             int32 i;                                              \
+            for (i = 0; i <  MASK_UNIT; i++)                       \
+            {                                                        \
+                if ( ((_p_)[x] & (1 << i)) == 0)                     \
+                {                                                    \
+                    _result = i + 1 + (x *  MASK_UNIT);            \
+                    break;                                           \
+                }                                                    \
+            }                                                        \
+        }                                                            \
+        else                                                         \
+        {                                                            \
+            _result = 0;                                             \
+        }                                                            \
+    } while (0)
+
+/* FSCMASKBIT finds the number of bits turned-on in mask _mask and
+ *    returns that count in _result. */
+#define  FSCMASKBIT(_mask, _result, _size)                         \
+    do                                                               \
+    {                                                                \
+         int32 x;                                                  \
+         int32 i;                                                  \
+         mask_values_t *_p_ = ( mask_values_t *)&(_mask);        \
+                                                                     \
+        _result = 0;                                                 \
+        for (x = 0; x <  MASK_LEN(_size); x++)                     \
+        {                                                            \
+            if ( (_p_)[x]  != 0)                                     \
+            {                                                        \
+                for (i = 0; i <  MASK_UNIT; i++)                   \
+                {                                                    \
+                    if ( ((_p_)[x] & (1 << i)) != 0)                 \
+                    {                                                \
+                        _result++;                                   \
+                    }                                                \
+                                                }                    \
+            }                                                        \
+        }                                                            \
+                                                                     \
+    } while (0)
+
+
+/*--------------------------------------*/
+/*  Interface Mask Macros & Defines     */
+/*--------------------------------------*/
+
+/* Number of entries per mask byte */
+#define  INTF_MASK_UNIT               (sizeof( uchar8) * 8)
+
+/* Number of bytes in mask */
+#define  INTF_INDICES   (( MAX_INTERFACE_COUNT - 1) /  INTF_MASK_UNIT + 1)
+
+/* Interface storage */
+typedef struct
+{
+   uchar8   value[ INTF_INDICES];
+}  INTF_MASK_t;
+
+
+/*
+ * NONZEROMASK returns 1 if any bit in word mask of NUM length
+ * is turned-on.  The result, 1 or 0 is stored in result.
+ */
+#define  INTF_NONZEROMASK(mask, result){                           \
+    uint32 _i_;                                                   \
+     INTF_MASK_t *_p_;                                             \
+                                                                     \
+    _p_ = ( INTF_MASK_t *)&mask;                                   \
+    for(_i_ = 0; _i_ <  INTF_INDICES; _i_++)                       \
+        if(_p_->value[_i_] != 0){                                    \
+            result = 1;                                              \
+            break;                                                   \
+        }                                                            \
+        else                                                         \
+            result = 0;                                              \
+}
+
+
+/* Least significant bit/rightmost bit is lowest interface # */
+/* this is opposite of what SNMP wants */
+
+/* SETMASKBIT turns on bit index # k in mask j. */
+#define  INTF_SETMASKBIT(j, k)                                     \
+            ((j).value[((k-1)/(8*sizeof( uchar8)))]                \
+                         |= 1 << ((k-1) % (8*sizeof( uchar8))))
+                         
+
+/* CLRMASKBIT turns off bit index # k in mask j. */
+#define  INTF_CLRMASKBIT(j, k)                                     \
+           ((j).value[((k-1)/(8*sizeof( uchar8)))]                 \
+                        &= ~(1 << ((k-1) % (8*sizeof( uchar8)))))
+                        
+
+/* MASKEQ sets mask j equal to mask k. */
+#define  INTF_MASKEQ(j, k) {                                       \
+        uint32 x;                                                 \
+                                                                     \
+        for (x = 0; x <  INTF_INDICES; x++) {                      \
+                (j).value[x] = (k).value[x];                         \
+        }                                                            \
+}
+
+
+/* MASKOREQ or's on the bits in mask j that are on in either mask j or k. */
+#define  INTF_MASKOREQ(j, k) {                                     \
+        uint32 x;                                                 \
+                                                                     \
+        for (x = 0; x <  INTF_INDICES; x++) {                      \
+                (j).value[x] |= (k).value[x];                        \
+        }                                                            \
+}
+
+
+/* MASKEXOREQ turns-on the bits in mask j that are on in either mask j and k but not in both. */
+#define  INTF_MASKEXOREQ(j, k) {                                   \
+        uint32 x;                                                 \
+                                                                     \
+        for (x = 0; x <  INTF_INDICES; x++) {                      \
+                j.value[x] ^= k.value[x];                            \
+        }                                                            \
+}
+
+
+/* MASKANDEQ turns-on the bits in mask j that are on in both mask j and k. */
+#define  INTF_MASKANDEQ(j, k) {                                    \
+        uint32 x;                                                 \
+                                                                     \
+        for (x = 0; x <  INTF_INDICES; x++) {                      \
+                (j).value[x] &= (k).value[x];                            \
+        }                                                            \
+}
+
+
+/* MASKINV inverts the bits in mask j. */
+#define  INTF_MASKINV(j) {                                         \
+        uint32 x;                                                 \
+                                                                     \
+        for (x = 0; x <  INTF_INDICES; x++) {                      \
+                j.value[x] = ~(j.value[x]);                          \
+        }                                                            \
+}
+
+
+/* MASKANDEQINV turns on the bits in mask j that are on in both mask j
+   and the bitwise-inverse of mask k. */
+#define  INTF_MASKANDEQINV(j, k) {                                 \
+        uint32 x;                                                 \
+                                                                     \
+        for (x = 0; x <  INTF_INDICES; x++) {                      \
+                (j).value[x] &= ~((k).value[x]);                         \
+        }                                                            \
+}
+
+
+/* FHMASKBIT finds the index of the most-significant bit turned-on in
+   mask j and returns that index in k.  Since this is a 1-based
+   mask, 0 is returned for "no bits set". */
+#define  INTF_FHMASKBIT(j, k) {                                    \
+         int32 x;                                                  \
+                                                                     \
+        for (x = ( INTF_INDICES - 1); x >= 0; x--) {               \
+                if ( j.value[x] )                                    \
+                        break;                                       \
+        };                                                           \
+        k = 0;                                                       \
+        if (x >= 0) {                                                \
+/* This is for i960
+      asm volatile ("scanbit %1,%0" : "=d"(k) : "d"(j.value[x])); */ \
+/* This is not */                                                    \
+                 int32 i;                                          \
+                for (i = 7; i >= 0; i--) {                           \
+                    if ( j.value[x] & (1 << i)) {                    \
+                       k = i + 1 + (x * (8 * sizeof( uchar8)));    \
+                       break;                                        \
+                    }                                                \
+                }                                                    \
+/* End non-i960 */                                                   \
+        };                                                           \
+}
+
+/* FLMASKBIT finds the index of the least-significant bit turned-on in
+   mask j and returns that index in k.  Since this is a 1-based
+   mask, 0 is returned for "no bits set". */
+#define  INTF_FLMASKBIT(j, k) {                                    \
+         int32 x;                                                  \
+                                                                     \
+        for (x = 0; x <= ( INTF_INDICES - 1); x++) {               \
+                if ( j.value[x] )                                    \
+                        break;                                       \
+        };                                                           \
+        k = 0;                                                       \
+        if (x <  INTF_INDICES) {                                   \
+/* This is for i960
+      asm volatile ("scanbit %1,%0" : "=d"(k) : "d"(j.value[x])); */ \
+/* This is not */                                                    \
+                 int32 i;                                          \
+                for (i = 0; i <= 7; i++) {                           \
+                    if ( j.value[x] & (1 << i)) {                    \
+                       k = i + 1 + (x * (8 * sizeof( uchar8)));    \
+                       break;                                        \
+                    }                                                \
+                }                                                    \
+/* End non-i960 */                                                   \
+        };                                                           \
+}
+
+
+/* ISMASKBITSET returns 0 if the interface k is not set in mask j */
+#define  INTF_ISMASKBITSET(j, k)                                   \
+        ((j).value[((k-1)/(8*sizeof( uchar8)))]                    \
+                         & ( 1 << ((k-1) % (8*sizeof( char8)))) )
+                         
+
+/* MASKREV reverses the bits in within each byte of mask j. */
+#define  INTF_MASKREV(j) {                                         \
+        uint32 x,y;                                               \
+         uchar8 b=0;                                               \
+                                                                     \
+        for (x = 0; x <  INTF_INDICES; x++) {                      \
+                b = 0;                                               \
+                for (y=0; y<8; y++)                                  \
+                {                                                    \
+                  if ((j).value[x] & (0x80 >> y))                    \
+                    b |= 0x1 << y;                                   \
+                }                                                    \
+                (j).value[x] = b;                                    \
+        }                                                            \
+}
+
+
+
+/* Macro definitions for VLAN MASK operations */
+/*
+ * NONZEROMASK returns 1 if any bit in word mask of NUM length
+ * is turned-on.  The result, 1 or 0 is stored in result.
+ */
+#define  VLAN_NONZEROMASK(mask, result){                           \
+    uint32 _i_;                                                   \
+     VLAN_MASK_t *_p_;                                             \
+                                                                     \
+    _p_ = ( VLAN_MASK_t *)&mask;                                   \
+    for(_i_ = 0; _i_ <  VLAN_INDICES; _i_++)                       \
+        if(_p_->value[_i_] != 0){                                    \
+            result = 1;                                              \
+            break;                                                   \
+        }                                                            \
+        else                                                         \
+            result = 0;                                              \
+}
+
+#define  VLAN_NONZEROMASK_POINTER(mask, result){                   \
+    uint32 _i_;                                                   \
+     VLAN_MASK_t *_p_;                                             \
+                                                                     \
+    _p_ = mask;                                                      \
+    for(_i_ = 0; _i_ <  VLAN_INDICES; _i_++)                       \
+      if(_p_->value[_i_] != 0){                                      \
+          result = 1;                                                \
+          break;                                                     \
+      }                                                              \
+      else                                                           \
+          result = 0;                                                \
+   }
+
+/* Least significant bit/rightmost bit is lowest interface # */
+/* this is opposite of what SNMP wants */
+
+/* SETMASKBIT turns on bit index # k in mask j. */
+#define  VLAN_SETMASKBIT(j, k)                                     \
+            ((j).value[((k-1)/(8*sizeof( uchar8)))]                \
+                         |= 1 << ((k-1) % (8*sizeof( uchar8))))
+
+
+/* CLRMASKBIT turns off bit index # k in mask j. */
+#define  VLAN_CLRMASKBIT(j, k)                                     \
+           ((j).value[((k-1)/(8*sizeof( uchar8)))]                 \
+                        &= ~(1 << ((k-1) % (8*sizeof( uchar8)))))
+#define  VLAN_CLRMASKBIT_POINTER(j, k)                                     \
+           ((j)->value[((k-1)/(8*sizeof( uchar8)))]                 \
+                        &= ~(1 << ((k-1) % (8*sizeof( uchar8)))))
+
+/* MASKEQ sets mask j equal to mask k. */
+#define  VLAN_MASKEQ(j, k) {                                       \
+        uint32 x;                                                 \
+                                                                     \
+        for (x = 0; x <  VLAN_INDICES; x++) {                      \
+                (j).value[x] = (k).value[x];                         \
+        }                                                            \
+}
+
+
+/* MASKOREQ or's on the bits in mask j that are on in either mask j or k. */
+#define  VLAN_MASKOREQ(j, k) {                                     \
+        uint32 x;                                                 \
+                                                                     \
+        for (x = 0; x <  VLAN_INDICES; x++) {                      \
+                (j).value[x] |= (k).value[x];                        \
+        }                                                            \
+}
+
+
+/* MASKEXOREQ turns-on the bits in mask j that are on in either mask j and k but not in both. */
+#define  VLAN_MASKEXOREQ(j, k) {                                   \
+        uint32 x;                                                 \
+                                                                     \
+        for (x = 0; x <  VLAN_INDICES; x++) {                      \
+                j.value[x] ^= k.value[x];                            \
+        }                                                            \
+}
+
+
+/* MASKANDEQ turns-on the bits in mask j that are on in both mask j and k. */
+#define  VLAN_MASKANDEQ(j, k) {                                    \
+        uint32 x;                                                 \
+                                                                     \
+        for (x = 0; x <  VLAN_INDICES; x++) {                      \
+                j.value[x] &= k.value[x];                            \
+        }                                                            \
+}
+
+
+/* MASKINV inverts the bits in mask j. */
+#define  VLAN_MASKINV(j) {                                         \
+        uint32 x;                                                 \
+                                                                     \
+        for (x = 0; x <  VLAN_INDICES; x++) {                      \
+                j.value[x] = ~(j.value[x]);                          \
+        }                                                            \
+}
+
+
+/* MASKANDEQINV turns on the bits in mask j that are on in both mask j
+   and the bitwise-inverse of mask k. */
+#define  VLAN_MASKANDEQINV(j, k) {                                 \
+        uint32 x;                                                 \
+                                                                     \
+        for (x = 0; x <  VLAN_INDICES; x++) {                      \
+                j.value[x] &= ~(k.value[x]);                         \
+        }                                                            \
+}
+#define  VLAN_MASKANDEQINV_POINTER(j, k) {                                 \
+        uint32 x;                                                 \
+                                                                     \
+        for (x = 0; x <  VLAN_INDICES; x++) {                      \
+                j->value[x] &= ~(k.value[x]);                         \
+        }                                                            \
+}
+
+
+
+/* ISMASKBITSET returns 0 if the interface k is not set in mask j */
+#define  VLAN_ISMASKBITSET(j, k)                                   \
+        ((j).value[((k-1)/(8*sizeof( uchar8)))]                    \
+                         & ( 1 << ((k-1) % (8*sizeof( char8)))) )
+
+#define  VLAN_ISMASKBITSET_POINTER(j, k)                                   \
+        ((j)->value[((k-1)/(8*sizeof( uchar8)))]                    \
+                         & ( 1 << ((k-1) % (8*sizeof( char8)))) )
+
+
+/* FHMASKBIT finds the index of the most-significant bit turned-on in
+   mask j and returns that index in k.  Since this is a 1-based
+   mask, 0 is returned for "no bits set". */
+#define  VLAN_FHMASKBIT(j, k) {                                    \
+         int32 x;                                                  \
+                                                                     \
+        for (x = ( VLAN_INDICES - 1); x >= 0; x--) {               \
+                if ( j.value[x] )                                    \
+                        break;                                       \
+        };                                                           \
+        k = 0;                                                       \
+        if (x >= 0) {                                                \
+/* This is for i960
+      asm volatile ("scanbit %1,%0" : "=d"(k) : "d"(j.value[x])); */ \
+/* This is not */                                                    \
+                 int32 i;                                          \
+                for (i = 7; i >= 0; i--) {                           \
+                    if ( j.value[x] & (1 << i)) {                    \
+                       k = i + 1 + (x * (8 * sizeof( uchar8)));    \
+                       break;                                        \
+                    }                                                \
+                }                                                    \
+/* End non-i960 */                                                   \
+        };                                                           \
+}
+
+/* FLMASKBIT finds the index of the least-significant bit turned-on in
+   mask j and returns that index in k.  Since this is a 1-based
+   mask, 0 is returned for "no bits set". */
+#define  VLAN_FLMASKBIT(j, k) {                                    \
+         int32 x;                                                  \
+                                                                     \
+        for (x = 0; x <= ( VLAN_INDICES - 1); x++) {               \
+                if ( j.value[x] )                                    \
+                        break;                                       \
+        };                                                           \
+        k = 0;                                                       \
+        if (x <  VLAN_INDICES) {                                   \
+/* This is for i960
+      asm volatile ("scanbit %1,%0" : "=d"(k) : "d"(j.value[x])); */ \
+/* This is not */                                                    \
+                 int32 i;                                          \
+                for (i = 0; i <= 7; i++) {                           \
+                    if ( j.value[x] & (1 << i)) {                    \
+                       k = i + 1 + (x * (8 * sizeof( uchar8)));    \
+                       break;                                        \
+                    }                                                \
+                }                                                    \
+/* End non-i960 */                                                   \
+        };                                                           \
+}
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/sonic-pac/authmgr/common/component_mask.h b/src/sonic-pac/authmgr/common/component_mask.h
new file mode 100755
index 000000000000..6175963fbc7c
--- /dev/null
+++ b/src/sonic-pac/authmgr/common/component_mask.h
@@ -0,0 +1,116 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#ifndef COMPONENT_MASK_H
+#define COMPONENT_MASK_H
+
+/*-----------------------*/
+/* Component Mask Macros */
+/*-----------------------*/
+
+/* Number of bytes in mask */
+#define COMPONENT_INDICES   (( LAST_COMPONENT_ID - 1) / (sizeof( uchar8) * 8) + 1)
+
+/* Component Mask Storage */
+typedef struct {
+         uchar8 value[COMPONENT_INDICES];
+} COMPONENT_MASK_t;
+
+
+typedef COMPONENT_MASK_t ComponentMask; 
+                                        
+/*
+ * NONZEROMASK returns true if any bit in word mask of NUM length
+ * is turned-on.  The result, TRUE or FALSE is stored in
+ * result.
+ */
+#define COMPONENT_NONZEROMASK(mask, result){                          \
+    uint32 _i_;                                                    \
+    COMPONENT_MASK_t *_p_;                                            \
+                                                                      \
+    _p_ = (COMPONENT_MASK_t *)&(mask);                                \
+    for(_i_ = 0; _i_ < COMPONENT_INDICES; _i_++)                      \
+        if(_p_ -> value[_i_]){                                        \
+            result =  TRUE;                                         \
+            break;                                                    \
+        }                                                             \
+        else                                                          \
+            result =  FALSE;                                        \
+}
+
+
+#define COMPONENT_MASKNUMBITSETGET(mask, result){                          \
+    uint32 _i_;                                                    \
+    COMPONENT_MASK_t *_p_;                                            \
+                                                                      \
+    _p_ = (COMPONENT_MASK_t *)&(mask);result=0;                       \
+    for(_i_ = 0; _i_ < COMPONENT_INDICES; _i_++)                      \
+        if(_p_ -> value[_i_]){                                        \
+            result++;                                         \
+            break;                                                    \
+        }                                                             \
+}
+
+
+/* Least significant bit/rightmost bit is lowest interface # */
+
+/* SETMASKBIT turns on bit index # k in mask j. */
+#define COMPONENT_SETMASKBIT(j, k)                                      \
+            ((j).value[((k-1)/(8*sizeof( uchar8)))]                   \
+                         |= 1 << ((k-1) % (8*sizeof( uchar8))))   
+
+
+
+/* CLRMASKBIT turns off bit index # k in mask j. */
+#define COMPONENT_CLRMASKBIT(j, k)                                      \
+           ((j).value[((k-1)/(8*sizeof( uchar8)))]                    \
+                        &= ~(1 << ((k-1) % (8*sizeof( uchar8)))))      
+            
+
+/* ISMASKBITSET returns 0 if the interface k is not set in mask j */
+#define COMPONENT_ISMASKBITSET(j, k)                                    \
+        ((j).value[((k-1)/(8*sizeof( uchar8)))]                       \
+                         & ( 1 << ((k-1) % (8*sizeof( char8)))) )  
+
+
+
+
+
+/*--------------------------------------------*/
+/*   COMPONENT ACQUISITION MACROS             */
+/*
+     Used for managing masks of components 
+     which have acquired an interface
+*/
+/*--------------------------------------------*/
+
+/* Number of bytes in mask */
+#define COMPONENT_ACQ_INDICES COMPONENT_INDICES} 
+#define COMPONENT_ACQUIRED_MASK_t  COMPONENT_MASK_t
+
+
+typedef COMPONENT_ACQUIRED_MASK_t AcquiredMask;  /*  Mask of components which have 
+                                                    "acquired" an interface */
+
+#define COMPONENT_ACQ_NONZEROMASK  COMPONENT_NONZEROMASK 
+#define COMPONENT_ACQ_SETMASKBIT  COMPONENT_SETMASKBIT   
+#define COMPONENT_ACQ_CLRMASKBIT COMPONENT_CLRMASKBIT
+#define COMPONENT_ACQ_ISMASKBITSET  COMPONENT_ISMASKBITSET
+
+  
+#endif /* COMPONENT_MASK_H */
+
diff --git a/src/sonic-pac/authmgr/common/mab_api.h b/src/sonic-pac/authmgr/common/mab_api.h
new file mode 100755
index 000000000000..976b1a5185fb
--- /dev/null
+++ b/src/sonic-pac/authmgr/common/mab_api.h
@@ -0,0 +1,310 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#ifndef INCLUDE_MAB_API_H
+#define INCLUDE_MAB_API_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "pacinfra_common.h"
+#include "auth_mgr_exports.h"
+#include "mab_exports.h"
+
+/*********************************************************************
+* @purpose  Set initialize value for a port
+*
+* @param    intIfNum   @b{(input)} internal interface number
+* @param    initialize @b{(input)} initialize value
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments This value is set to  TRUE by management in order to force
+*           initialization of a port.  It is re-set to  FALSE after
+*           initialization has completed.
+*       
+* @end
+*********************************************************************/
+RC_t mabPortInitializeSet(uint32 intIfNum,  BOOL initialize);
+
+/*********************************************************************
+* @purpose  Clear mab stats for specified port
+*
+* @param    intIfNum     @b{(input)} internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t mabPortStatsClear(uint32 intIfNum);
+
+/*********************************************************************
+* @purpose  Get the configured MAB value on the port.
+*
+* @param    intIfNum      @b{(input)} internal interface number
+* @param    mabEnable    @b{(output)} value detrmining if MAB 
+*                                      has been enabled on the port 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t mabPortMABEnableGet(uint32 intIfNum, uint32 *mabEnable);
+
+/*********************************************************************
+* @purpose  Set the MAB value on the port.
+*
+* @param    intIfNum      @b{(input)} internal interface number
+* @param    mabEnable   @b{(output)} boolean value detrmining if MAB 
+*                                    has been configured on the port 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+* @results   REQUEST_DENIED     if port control mode of the port is 
+*                                 not mac-based  
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t mabPortMABEnableSet(uint32 intIfNum, uint32 mabEnable);
+
+/*********************************************************************
+* @purpose  Get the operational MAB value on the port.
+*
+* @param    intIfNum      @b{(input)} internal interface number
+* @param    mabEnabled    @b{(output)} value detrmining if MAB 
+*                                     has been operationally 
+*                                     enabled on the port 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t mabPortOperMABEnabledGet(uint32 intIfNum, uint32 *mabEnabled);
+
+/*********************************************************************
+* @purpose  Get the configured authentication type on the port to be used by MAB.
+*
+* @param    intIfNum      @b{(input)} internal interface number
+* @param    auth_type     @b{(output)} Pointer to the authentication type {EAP-MD5 or PAP} 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t mabPortMABAuthTypeGet(uint32 intIfNum,
+                               AUTHMGR_PORT_MAB_AUTH_TYPE_t *auth_type);
+
+/*********************************************************************
+* @purpose  Set the authentication type on the port to be used by MAB.
+*
+* @param    intIfNum      @b{(input)} internal interface number
+* @param    auth_type     @b{(input)} Authentication type {EAP-MD5 or PAP} 
+*
+* @returns   SUCCESS            if able to set the auth_type successfully
+* @results   REQUEST_DENIED     if MAB is not enabled on that port
+* @returns   FAILURE            otherwise
+*
+* @comments
+*       
+* @end 
+*********************************************************************/
+RC_t mabPortMABAuthTypeSet(uint32 intIfNum,
+                               AUTHMGR_PORT_MAB_AUTH_TYPE_t auth_type);
+
+/*********************************************************************
+* @purpose  Determine if the interface is valid to participate in mab
+*
+* @param    intIfNum              @b{(input)} internal interface number
+*
+* @returns   TRUE
+* @returns   FALSE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+ BOOL mabIsValidIntf(uint32 intIfNum);
+
+/*********************************************************************
+* @purpose  Determine if the interface type is valid to participate in mab
+*
+* @param    sysIntfType              @b{(input)} interface type
+*
+* @returns   TRUE
+* @returns   FALSE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+ BOOL mabIsValidIntfType(uint32 sysIntfType);
+
+/*********************************************************************
+* @purpose  Set port control mode
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    portControl @b{(input)} port control mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t mabPortControlModeSet(uint32 intIfNum,  AUTHMGR_PORT_CONTROL_t portControl);
+
+/*********************************************************************
+* @purpose  Set host control mode
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    hostControl @b{(input)} host control mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t mabPortControlHostModeSet(uint32 intIfNum,  AUTHMGR_HOST_CONTROL_t hostMode);
+
+/*********************************************************************
+  * @purpose  Handle Auth Manager event
+  *
+  * @param    intIfNum    @b{(input)} internal interface number
+  * @param    event       @b{(input)} event
+  * @param    macAddr     @b{(input)} client mac address
+  *
+  * @returns   SUCCESS
+  * @returns   FAILURE
+  *
+  * @comments
+  *
+  * @end
+  *********************************************************************/
+RC_t mabClientEventUpdate(uint32 intIfNum, uint32 event,  enetMacAddr_t *macAddr);
+
+/*********************************************************************
+* @purpose  Return Internal Interface Number of the first valid interface for
+*           mab.
+*
+* @param    pFirstIntIfNum @b{(output)}  pointer to first internal interface number
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t mabFirstValidIntfNumber(uint32 *pFirstIntIfNum);
+
+/*********************************************************************
+* @purpose  Return Internal Interface Number of next valid interface for
+*           mab.
+*
+* @param    intIfNum  @b{(input)}   Internal Interface Number
+* @param    pNextintIfNum @b{(output)}  pointer to Next Internal Interface Number,
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t mabNextValidIntf(uint32 intIfNum, uint32 *pNextIntIfNum);
+
+/*********************************************************************
+* @purpose  Get if RADIUS is configured as one of the authentication methods
+*           for MAB.
+*
+* @param    intIfNum @b{(input)}  interface number
+* @param    intIfNum @b{(output)}  enabled/disabled
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t mabAuthmethodRadiusEnabled(uint32 intIfNum, uint32 *enabled);
+
+/*********************************************************************
+* @purpose  Update the RADIUS server configuration
+*
+* @param    add           @b{(input)} whether server should be added or deleted
+* @param    radius_type   @b{(input)} radius server type
+* @param    serv_addr     @b{(input)} radius server address
+* @param    serv_priority @b{(input)} radius server priority
+* @param    radius_key    @b{(input)} radius server key
+* @param    serv_port     @b{(input)} radius server port
+*
+* @returns   SUCCESS    values are valid and are updated successfully
+* @returns   FAILURE    otherwise
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t mabRadiusServerUpdate(uint32 cmd, const char *radius_type,
+                              const char *serv_addr, const char *serv_priority,
+                              const char *radius_key, const char *serv_port);
+
+/*********************************************************************
+* @purpose  Get RADIUS stats from MAB
+*
+* @param    buf        @b{(output)} Buffer to store stats.
+* @param    buflen     @b{(output)} Length of buffer.
+* 
+* @returns   SUCCESS             Stats retrieved successfully.
+* @returns   FAILURE             Stats could not be retrieved.
+*
+* @comments    
+*       
+* @end 
+*********************************************************************/
+RC_t mabRadiusClientGetStats(char *buf, int buflen);
+
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_MAB_API_H */
diff --git a/src/sonic-pac/authmgr/common/mab_exports.h b/src/sonic-pac/authmgr/common/mab_exports.h
new file mode 100755
index 000000000000..6486db6012f5
--- /dev/null
+++ b/src/sonic-pac/authmgr/common/mab_exports.h
@@ -0,0 +1,93 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __MAB_EXPORTS_H_
+#define __MAB_EXPORTS_H_
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* MAB Component Feature List */
+typedef enum
+{
+   MAB_FEATURE_ID = 0,                   /* general support statement */
+   MAB_FEATURE_ID_TOTAL,                /* total number of enum values */
+}  MAB_FEATURE_IDS_t;
+
+#define  MAB_MAX_USERS_PER_PORT   FD_AUTHMGR_PORT_MAX_USERS
+
+#define  MAB_USER_NAME_LEN             65
+#define  MAB_CHALLENGE_LEN             32
+
+#define  MAB_CHAP_CHALLENGE_LEN        16
+#define  MAB_FILTER_NAME_LEN           256
+
+/******************************************************************/
+/*************       Start MAB types and defines        *********/
+/******************************************************************/
+
+/* Port protocol version */
+typedef enum
+{
+   MAB_PAE_PORT_PROTOCOL_VERSION_1 = 1
+}  MAB_PAE_PORT_PROTOCOL_VERSION_t;
+
+
+/* MAB Request Attribute1 Group Size types */
+typedef enum
+{
+   MAB_REQUEST_ATTRIBUTE1_GROUP_SIZE_INVALID = 0,
+   MAB_REQUEST_ATTRIBUTE1_GROUP_SIZE_1  = 1,
+   MAB_REQUEST_ATTRIBUTE1_GROUP_SIZE_2  = 2,
+   MAB_REQUEST_ATTRIBUTE1_GROUP_SIZE_4  = 4,
+   MAB_REQUEST_ATTRIBUTE1_GROUP_SIZE_12 = 12
+}  MAB_REQUEST_ATTRIBUTE1_GROUP_SIZE_t;
+
+/* MAB Request Attribute1 Separator types */
+typedef enum
+{
+   MAB_REQUEST_ATTRIBUTE1_SEPARATOR_INVALID = 0,
+   MAB_REQUEST_ATTRIBUTE1_SEPARATOR_IETF,     /* '-' is used as a separator */
+   MAB_REQUEST_ATTRIBUTE1_SEPARATOR_LEGACY,   /* ':' is used as a separator */
+   MAB_REQUEST_ATTRIBUTE1_SEPARATOR_DOT       /* '.' is used as a separator */
+}  MAB_REQUEST_ATTRIBUTE1_SEPARATOR_t;
+
+/* MAB Request Attribute1 Case types */
+typedef enum
+{
+   MAB_REQUEST_ATTRIBUTE1_CASE_INVALID = 0,
+   MAB_REQUEST_ATTRIBUTE1_CASE_UPPER,
+   MAB_REQUEST_ATTRIBUTE1_CASE_LOWER
+}  MAB_REQUEST_ATTRIBUTE1_CASE_t;
+
+
+
+
+
+/******************** conditional Override *****************************/
+
+#ifdef INCLUDE_MAB_EXPORTS_OVERRIDES
+#include "mab_exports_overrides.h"
+#endif
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAB_EXPORTS_H_*/

From e336c990fad33ef6843644330ecc2d2c57ec6485 Mon Sep 17 00:00:00 2001
From: Vijaya Kumar Abbaraju <vijaya-kumar.abbaraju@broadcom.com>
Date: Tue, 8 Oct 2024 04:33:48 +0530
Subject: [PATCH 071/364] Auth mgr API interface functions (#18634)

---
 src/sonic-pac/authmgr/mapping/auth_mgr_api.c  | 2998 +++++++++++++++++
 .../mapping/auth_mgr_sid/auth_mgr_sid.c       |   69 +
 .../mapping/auth_mgr_sid/auth_mgr_sid.h       |   63 +
 .../mapping/auth_mgr_sid/auth_mgr_sid_const.h |   47 +
 4 files changed, 3177 insertions(+)
 create mode 100755 src/sonic-pac/authmgr/mapping/auth_mgr_api.c
 create mode 100755 src/sonic-pac/authmgr/mapping/auth_mgr_sid/auth_mgr_sid.c
 create mode 100755 src/sonic-pac/authmgr/mapping/auth_mgr_sid/auth_mgr_sid.h
 create mode 100755 src/sonic-pac/authmgr/mapping/auth_mgr_sid/auth_mgr_sid_const.h

diff --git a/src/sonic-pac/authmgr/mapping/auth_mgr_api.c b/src/sonic-pac/authmgr/mapping/auth_mgr_api.c
new file mode 100755
index 000000000000..d86795237ee2
--- /dev/null
+++ b/src/sonic-pac/authmgr/mapping/auth_mgr_api.c
@@ -0,0 +1,2998 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include "auth_mgr_include.h"
+#include "auth_mgr_vlan.h"
+#include "auth_mgr_vlan_db.h"
+#include "auth_mgr_struct.h"
+#include "pacoper_common.h"
+
+extern authmgrCB_t *authmgrCB;
+
+/*********************************************************************
+* @purpose  Get initialize value for a port
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    *initialize @b{(output)} initialize value
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments This value indicates whether a port is being initialized
+*           due to a management request
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortInitializeGet(uint32 intIfNum,  BOOL *initialize)
+{
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  /* Setting this value to TRUE causes an action.  It is not actually
+   * stored in the config structure.  So, just return what's stored
+   * in the operational structure.
+   */
+  (void)osapiReadLockTake(authmgrCB->authmgrRWLock,  WAIT_FOREVER);
+  *initialize = authmgrCB->globalInfo->authmgrPortInfo[intIfNum].initialize;
+  (void)osapiReadLockGive(authmgrCB->authmgrRWLock);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Set initialize value for a port
+*
+* @param    intIfNum   @b{(input)} internal interface number
+* @param    initialize @b{(input)} initialize value
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments This value is set to  TRUE by management in order to force
+*           initialization of a port.  It is re-set to  FALSE after
+*           initialization has completed.
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortInitializeSet(uint32 intIfNum,  BOOL initialize)
+{
+  authmgrPortCfg_t *pCfg;
+  RC_t rc =  SUCCESS;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  /* Port Mode must be Auto (i.e. not ForceAuthorized
+   * or ForceUnauthorized)
+   */
+    if (pCfg->portControlMode ==  AUTHMGR_PORT_FORCE_AUTHORIZED ||
+      pCfg->portControlMode ==  AUTHMGR_PORT_FORCE_UNAUTHORIZED )
+    return  SUCCESS;
+ 
+  if (initialize ==  TRUE)
+    rc = authmgrIssueCmd(authmgrMgmtPortInitializeSet, intIfNum, &initialize);
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Get reauthentication value for a port
+*
+* @param    intIfNum        @b{(input)} internal interface number
+* @param    *reauthenticate @b{(output)} reauthentication value
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments This value indicates whether a port is being reauthenticated
+*           due to a management request.  Per the MIB, this object always
+*           returns FALSE when read.
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortReauthenticateGet(uint32 intIfNum,  BOOL *reauthenticate)
+{
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  /* Per the MIB, this object always returns FALSE when read */
+  *reauthenticate =  FALSE;
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Set reauthentication value for a port
+*
+* @param    intIfNum       @b{(input)} internal interface number
+* @param    reauthenticate @b{(input)} reauthentication value
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments This value is set to  TRUE by management in order to force
+*           reauthentication of a port.  It is re-set to  FALSE after
+*           reauthentication has completed.
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortReauthenticateSet(uint32 intIfNum,  BOOL reauthenticate)
+{
+  authmgrPortCfg_t *pCfg;
+  RC_t rc =  SUCCESS;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  /* Port Mode must be Auto (i.e. not ForceAuthorized
+   * or ForceUnauthorized)
+   */
+    if (pCfg->portControlMode ==  AUTHMGR_PORT_FORCE_AUTHORIZED ||
+      pCfg->portControlMode ==  AUTHMGR_PORT_FORCE_UNAUTHORIZED )
+    return  FAILURE;
+
+  if (reauthenticate ==  TRUE)
+    rc = authmgrIssueCmd(authmgrMgmtPortReauthenticateSet, intIfNum, &reauthenticate);
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Get port control mode
+*
+* @param    intIfNum     @b{(input)} internal interface number
+* @param    *portControl @b{(output)} port control mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortControlModeGet(uint32 intIfNum,  AUTHMGR_PORT_CONTROL_t *portControl)
+{
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  *portControl = pCfg->portControlMode;
+  (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Get global port control mode
+*
+* @param    *portControl @b{(output)} port control mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t authmgrGlobalPortControlModeGet( AUTHMGR_PORT_CONTROL_t *portControl)
+{
+  (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  *portControl = authmgrCB->globalInfo->authmgrCfg->portControlMode;
+  (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Set port control mode
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    portControl @b{(input)} port control mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortControlModeSet(uint32 intIfNum,  AUTHMGR_PORT_CONTROL_t portControl)
+{
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  pCfg->portControlMode = portControl;
+  (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock);
+  authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged =  TRUE;
+
+  return authmgrIssueCmd(authmgrMgmtPortControlModeSet, intIfNum, &portControl);
+}
+
+/*********************************************************************
+* @purpose  Set port control mode to default
+*
+* @param    intIfNum    @b{(input)} internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortControlModeReset(uint32 intIfNum)
+{
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+
+  (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  pCfg->portControlMode = FD_AUTHMGR_PORT_MODE;
+  (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock);
+  authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged =  TRUE;
+
+  return authmgrIssueCmd(authmgrMgmtPortControlModeSet, intIfNum, (void *)(&pCfg->portControlMode));
+}
+
+/*********************************************************************
+* @purpose  Get quiet period value
+*
+* @param    intIfNum     @b{(input)} internal interface number
+* @param    *quietPeriod @b{(output)} quiet period
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments The quietTime is the initialization value for quietWhile,
+*           which is a timer used by the Authenticator state machine
+*           to define periods of time in which it will not attempt to
+*           acquire a Supplicant.
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortAuthRestartTimerGet(uint32 intIfNum, uint32 *quietPeriod)
+{
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  *quietPeriod = pCfg->quietPeriod;
+  (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Set quiet period value
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    quietPeriod @b{(input)} quiet period
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments The quietPeriod is the initialization value for quietWhile,
+*           which is a timer used by the Authenticator state machine
+*           to define periods of time in which it will not attempt to
+*           acquire a Supplicant.
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortAuthRestartTimerSet(uint32 intIfNum, uint32 quietPeriod)
+{
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock);
+  pCfg->quietPeriod = quietPeriod;
+  (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock);
+  authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged =  TRUE;
+
+  return authmgrIssueCmd(authmgrMgmtPortQuietPeriodSet, intIfNum, &quietPeriod);
+}
+/*********************************************************************
+* @purpose  Get the Reauthentication period
+*
+* @param    intIfNum       @b{(input)}  internal interface number
+* @param    *reAuthPeriod  @b{(output)} reauthentication period
+* @param    serverConfig   @b{(output)} get reauthentication period 
+*                                       from server option 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments The reAuthPeriod is the initialization value for reAuthWhen,
+*           which is a timer used by the Authenticator state machine to
+*           determine when reauthentication of the Supplicant takes place.
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortReAuthPeriodGet(uint32 intIfNum, 
+                                   uint32 *reAuthPeriod, 
+                                    BOOL *serverConfig)
+{
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  *reAuthPeriod = pCfg->reAuthPeriod;
+  *serverConfig = pCfg->reAuthPeriodServer;
+  (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Set the Reauthentication period
+*
+* @param    intIfNum      @b{(input)} internal interface number
+* @param    reAuthPeriod  @b{(input)} reauthentication period
+* @param    serverConfig  @b{(input)} set option to get reauthentication
+*                                     period from server option
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments The reAuthPeriod is the initialization value for reAuthWhen,
+*           which is a timer used by the Authenticator state machine to
+*           determine when reauthentication of the Supplicant takes place.
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortReAuthPeriodSet(uint32 intIfNum, uint32 reAuthPeriod,  BOOL serverConfig)
+{
+  authmgrPortCfg_t *pCfg;
+  authmgrMgmtTimePeriod_t params;
+
+  memset(&params, 0, sizeof(authmgrMgmtTimePeriod_t));
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  if (serverConfig)
+  {
+    pCfg->reAuthPeriodServer =  TRUE;
+    pCfg->reAuthPeriod = FD_AUTHMGR_PORT_REAUTH_PERIOD;
+  }
+  else
+  {
+    pCfg->reAuthPeriodServer =  FALSE;
+    pCfg->reAuthPeriod = reAuthPeriod;
+  }
+  (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock);
+  authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged =  TRUE;
+
+  params.reAuthPeriodServer = pCfg->reAuthPeriodServer;
+  params.val = pCfg->reAuthPeriod;
+
+  return authmgrIssueCmd(authmgrMgmtPortReAuthPeriodSet, intIfNum, (void *)&params);
+}
+
+/*********************************************************************
+* @purpose  Get the Reauthentication mode
+*
+* @param    intIfNum        @b{(input)} internal interface number
+* @param    *reAuthEnabled  @b{(output)} reauthentication mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments The reAuthEnabled mode determines whether reauthentication
+*           of the Supplicant takes place.
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortReAuthEnabledGet(uint32 intIfNum,  BOOL *reAuthEnabled)
+{
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  *reAuthEnabled = pCfg->reAuthEnabled;
+  (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Set the Reauthentication mode
+*
+* @param    intIfNum       @b{(input)} internal interface number
+* @param    reAuthEnabled  @b{(input)} reauthentication mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments The reAuthEnabled mode determines whether reauthentication
+*           of the Supplicant takes place.
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortReAuthEnabledSet(uint32 intIfNum,  BOOL reAuthEnabled)
+{
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+
+  (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  pCfg->reAuthEnabled = reAuthEnabled;
+  (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock);
+  authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged =  TRUE;
+
+  return authmgrIssueCmd(authmgrMgmtPortReAuthEnabledSet, intIfNum, &reAuthEnabled);
+}
+
+
+/*********************************************************************
+* @purpose  Get operational value of controlled directions
+*
+* @param    intIfNum      @b{(input)} internal interface number
+* @param    *portStatus   @b{(output)} port authentication status
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortAuthControlledPortStatusGet(uint32 intIfNum,  AUTHMGR_PORT_STATUS_t *portStatus)
+{
+  if (authmgrCB->globalInfo->authmgrPortInfo ==  NULLPTR)
+    return  FAILURE;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  (void)osapiReadLockTake(authmgrCB->authmgrRWLock,  WAIT_FOREVER);
+
+  if ( AUTHMGR_PORT_STATUS_AUTHORIZED == authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portStatus)
+  {
+    *portStatus =  AUTHMGR_PORT_STATUS_AUTHORIZED;
+  }
+  else
+  {
+    *portStatus =  AUTHMGR_PORT_STATUS_UNAUTHORIZED;
+  }
+
+  (void)osapiReadLockGive(authmgrCB->authmgrRWLock);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Get port operational mode
+*
+* @param    intIfNum     @b{(input)} internal interface number
+* @param    *portMode    @b{(output)} port operational mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortOperControlModeGet(uint32 intIfNum,  AUTHMGR_PORT_CONTROL_t *portMode)
+{
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  (void)osapiReadLockTake(authmgrCB->authmgrRWLock,  WAIT_FOREVER);
+  if(authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portEnabled ==  TRUE)
+    *portMode = authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode;
+  else
+    *portMode =  AUTHMGR_PORT_NA; 
+  (void)osapiReadLockGive(authmgrCB->authmgrRWLock);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Clear authmgr stats for specified port
+*
+* @param    intIfNum     @b{(input)} internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortStatsClear(uint32 intIfNum)
+{
+  RC_t rc =  SUCCESS;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  rc = authmgrIssueCmd(authmgrMgmtPortStatsClear, intIfNum,  NULLPTR);
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Determine if the interface is valid to participate in authmgr
+*
+* @param    sysIntfType              @b{(input)} interface type
+*
+* @returns   TRUE
+* @returns   FALSE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+ BOOL authmgrIsValidIntfType(uint32 sysIntfType)
+{
+  if (sysIntfType !=  PHYSICAL_INTF)
+    return  FALSE;
+
+  return  TRUE;
+}
+
+/*********************************************************************
+* @purpose  Determine if the interface is valid to participate in authmgr
+*
+* @param    intIfNum              @b{(input)} internal interface number
+*
+* @returns   TRUE
+* @returns   FALSE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+BOOL authmgrIsValidIntf(uint32 intIfNum)
+{
+  INTF_TYPES_t sysIntfType;
+
+  if ((nimGetIntfType(intIfNum, &sysIntfType) !=  SUCCESS) || 
+      (authmgrIsValidIntfType(sysIntfType) !=  TRUE))
+  {
+    return  FALSE;
+  }
+
+  return  TRUE;
+}
+
+
+/*********************************************************************
+* @purpose  Return Internal Interface Number of next valid interface for
+*           authmgr.
+*
+* @param    intIfNum  @b{(input)}   Internal Interface Number
+* @param    pNextintIfNum @b{(output)}  pointer to Next Internal Interface Number,
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrNextValidIntf(uint32 intIfNum, uint32 *pNextIntIfNum)
+{
+  RC_t rc =  FAILURE;
+  uint32 nextIntIfNum = intIfNum;
+
+  while ( SUCCESS == nimNextValidIntfNumberByType( PHYSICAL_INTF, nextIntIfNum, &nextIntIfNum))
+  {
+    if ( TRUE == authmgrIsValidIntf(nextIntIfNum))
+    {
+      /* Next authmgr valid interface found. */
+      *pNextIntIfNum = nextIntIfNum;
+      rc =  SUCCESS; 
+      break;
+    }
+  }
+
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Return Internal Interface Number of the first valid interface for
+*           authmgr.
+*
+* @param    pFirstIntIfNum @b{(output)}  pointer to first internal interface number
+*
+* @returns   SUCCESS  if success
+* @returns   ERROR    if interface does not exist
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrFirstValidIntfNumber(uint32 *pFirstIntIfNum)
+{
+  RC_t rc =  FAILURE;
+  uint32 intIfNum =  NULL;
+  
+  if ( SUCCESS == nimFirstValidIntfNumberByType( PHYSICAL_INTF, &intIfNum))
+  {
+    if ( FALSE == authmgrIsValidIntf(intIfNum))
+    {    
+      /* Front panel  and fixed stack ports are not a valid authmgr interfaces.
+       * Hence get the next authmgr valid interface.
+       */
+      rc = authmgrNextValidIntf(intIfNum, &intIfNum);
+    }
+    else
+    {
+      rc =  SUCCESS;
+    }
+    
+    if ( SUCCESS == rc)
+    {
+      /* Copy the valid interface in the output pointer */
+      *pFirstIntIfNum = intIfNum;
+    }
+  } 
+  
+  return rc;
+
+}
+
+/*********************************************************************
+* @purpose  Set administrative mode setting for authmgr Vlan Assignment
+*
+* @param    mode @b{(input)} radius vlan assignment mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments    
+*       
+* @end
+*********************************************************************/
+RC_t authmgrVlanAssignmentModeSet (uint32 mode)
+{
+  if (authmgrCB->globalInfo->authmgrCfg->vlanAssignmentMode == mode)
+    return  SUCCESS;
+
+  (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  if(mode ==  ENABLE)
+  {
+    authmgrCB->globalInfo->authmgrCfg->vlanAssignmentMode =  ENABLE;
+  }
+  else
+  {
+    authmgrCB->globalInfo->authmgrCfg->vlanAssignmentMode =  DISABLE;
+  }
+  (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock);
+  authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged =  TRUE;
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Get administrative mode setting for authmgr Vlan Assignment
+*
+* @param    mode @b{(input)} radius vlan assignment mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments    
+*       
+* @end
+*********************************************************************/
+RC_t authmgrVlanAssignmentModeGet(uint32 *mode)
+{
+  (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  *mode = authmgrCB->globalInfo->authmgrCfg->vlanAssignmentMode;
+  (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Set max users value
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    maxUsers @b{(input)} max users
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments The maxUsers is the maximum number of hosts that can be 
+*           authenticated on a port using mac based authentication
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortMaxUsersSet(uint32 intIfNum, uint32 maxUsers)
+{
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  if ((maxUsers <  AUTHMGR_PORT_MIN_MAC_USERS) ||
+      (maxUsers >  AUTHMGR_PORT_MAX_MAC_USERS))
+  {
+    return  FAILURE;
+  }
+
+  (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  pCfg->maxUsers = maxUsers;
+  (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock);
+  authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged =  TRUE;
+
+  return authmgrIssueCmd(authmgrMgmtPortMaxUsersSet, intIfNum, &maxUsers);
+}
+
+/*********************************************************************
+* @purpose  Get max users value
+*
+* @param    intIfNum  @b{(input)} internal interface number
+* @param    *maxUsers @b{(output)} max users per port
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments The maxUsers is the maximum number of hosts that can be 
+*           authenticated on a port using mac based authentication
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortMaxUsersGet(uint32 intIfNum, uint32 *maxUsers)
+{
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  *maxUsers = pCfg->maxUsers;
+  (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Returns the first logical port in use for the physcial interface
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    lIntIfNum    @b((output)) the logical interface
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortFirstGet(uint32 intIfNum,uint32 *lIntIfNum)
+{
+  authmgrPortCfg_t *pCfg;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+  RC_t  rc =  FAILURE;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE)
+    return rc;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return rc;
+
+  if ( AUTHMGR_PORT_AUTO == pCfg->portControlMode)
+  {
+    (void)osapiReadLockTake(authmgrCB->authmgrRWLock,  WAIT_FOREVER);
+     authmgrLogicalPortInfoTakeLock();
+     logicalPortInfo = authmgrLogicalPortInfoFirstGet(intIfNum,lIntIfNum);
+
+     if ( NULLPTR != logicalPortInfo)
+     {
+       if (0 != logicalPortInfo->key.keyNum)
+       {
+         rc =  SUCCESS;
+       }
+     }
+     authmgrLogicalPortInfoGiveLock();
+    (void)osapiReadLockGive(authmgrCB->authmgrRWLock);
+  }
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Returns the next logical port for the physcial interface
+*
+* @param    lIntIfNum    @b((input)) the logical interface
+* @param    nextIntf    @b{(ouput)}  the next interface
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortNextGet(uint32 lIntIfNum,uint32 *nextIntf)
+{
+  authmgrPortCfg_t *pCfg;
+  uint32 next;
+  RC_t  rc =  FAILURE;
+  uint32 physPort = 0;
+
+  AUTHMGR_PORT_GET(physPort, lIntIfNum);
+
+  if (authmgrIsValidIntf(physPort) !=  TRUE)
+    return rc;
+
+  if (authmgrIntfIsConfigurable(physPort, &pCfg) !=  TRUE)
+    return rc;
+
+  if ( AUTHMGR_PORT_AUTO == pCfg->portControlMode)
+  {
+    next = lIntIfNum;
+    authmgrLogicalPortInfoTakeLock();
+    if(authmgrLogicalPortInfoGetNextNode(physPort,&next)!= NULLPTR)
+    {
+      *nextIntf = next;
+      rc =  SUCCESS;
+    }
+    authmgrLogicalPortInfoGiveLock();
+  }
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Returns the Supplicant Mac address for the logical interface
+*
+* @param    lIntIfNum    @b((input)) the specified interface
+* @param    macAddr      @b((output)) Mac Address of the supplicant
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortSupplicantMacAddrGet(uint32 lIntIfNum,
+                                              uchar8 *macAddr)
+{
+  uint32 physPort = 0;
+  authmgrPortCfg_t *pCfg;
+  RC_t  rc =  SUCCESS;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+
+  AUTHMGR_PORT_GET (physPort, lIntIfNum);
+
+  if (authmgrIsValidIntf(physPort) !=  TRUE)
+    return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(physPort, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+
+  (void)osapiReadLockTake(authmgrCB->authmgrRWLock,  WAIT_FOREVER);
+  authmgrLogicalPortInfoTakeLock();
+  logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum);
+  if(logicalPortInfo !=  NULLPTR)
+  {
+    memcpy(macAddr,&logicalPortInfo->client.suppMacAddr, ENET_MAC_ADDR_LEN);
+  }
+  else
+  {
+    rc =  FAILURE;
+  }
+  authmgrLogicalPortInfoGiveLock();
+  (void)osapiReadLockGive(authmgrCB->authmgrRWLock);
+  return rc;
+}
+
+
+/*********************************************************************
+* @purpose  Returns the PAE state for the logical interface
+*
+* @param    lIntIfNum    @b((input)) the specified interface
+* @param    authState @b((output)) PAE state
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortStateGet(uint32 lIntIfNum,
+                                    uint32 *authState)
+{
+  uint32 physPort;
+  authmgrPortCfg_t *pCfg;
+  RC_t  rc =  SUCCESS;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+
+  AUTHMGR_PORT_GET(physPort, lIntIfNum);
+
+  if (authmgrIsValidIntf(physPort) !=  TRUE)
+    return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(physPort, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  (void)osapiReadLockTake(authmgrCB->authmgrRWLock,  WAIT_FOREVER);
+  authmgrLogicalPortInfoTakeLock();
+  logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum);
+  if(logicalPortInfo !=  NULLPTR)
+  {
+    *authState = logicalPortInfo->protocol.authState + 1;
+  }
+  else
+  {
+    rc =  FAILURE;
+  }
+  authmgrLogicalPortInfoGiveLock();
+  (void)osapiReadLockGive(authmgrCB->authmgrRWLock);
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Returns the Vlan assigned for the  logical interface
+*
+* @param    lIntIfNum    @b((input)) the specified interface
+* @param    vlan        @b((output)) vlan assigned to the logical interface
+* @param    mode        @b((output)) mode of assignment Radius/unauthenticated/Default
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortVlanAssignmentGet(uint32 lIntIfNum,
+                                          uint32 *vlanId,
+                                          uint32 *mode)
+{
+  uint32 physPort;
+  authmgrPortCfg_t *pCfg;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+  authmgrVlanInfoEntry_t entry;
+
+  AUTHMGR_PORT_GET(physPort, lIntIfNum);
+
+  if (authmgrIsValidIntf(physPort) !=  TRUE)
+    return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(physPort, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  (void)osapiReadLockTake(authmgrCB->authmgrRWLock,  WAIT_FOREVER);
+  authmgrLogicalPortInfoTakeLock();
+  logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum);
+  if(logicalPortInfo !=  NULLPTR)
+  {
+    memset(&entry, 0, sizeof(authmgrVlanInfoEntry_t));
+    if ( SUCCESS != authmgrVlanTypeInfoGet(logicalPortInfo->client.vlanType, &entry))
+    {
+      AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_FAILURE,physPort,
+          "%s %s Unable to find the vlan Info entry for the vlan type %d\n",
+          __FUNCTION__, authmgrIntfIfNameGet(physPort), logicalPortInfo->client.vlanType);
+      authmgrLogicalPortInfoGiveLock();
+     (void)osapiReadLockGive(authmgrCB->authmgrRWLock);
+      return  FAILURE;
+    }
+
+    *vlanId =logicalPortInfo->client.vlanId;
+    *mode = entry.assignmentReason;
+  }
+
+    authmgrLogicalPortInfoGiveLock();
+    (void)osapiReadLockGive(authmgrCB->authmgrRWLock);
+    return  SUCCESS;
+  }
+
+/*********************************************************************
+* @purpose  Returns the User Name for the  logical interface
+*
+* @param    lIntIfNum    @b((input)) the specified interface
+* @param    userName     @b((output)) user name for the logical interface
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortUserNameGet(uint32 lIntIfNum,
+                                     uchar8 *userName)
+{
+  uint32 physPort;
+  authmgrPortCfg_t *pCfg;
+  RC_t  rc =  SUCCESS;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+
+  AUTHMGR_PORT_GET(physPort, lIntIfNum);
+
+  if (authmgrIsValidIntf(physPort) !=  TRUE)
+    return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(physPort, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  (void)osapiReadLockTake(authmgrCB->authmgrRWLock,  WAIT_FOREVER);
+  authmgrLogicalPortInfoTakeLock();
+  logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum);
+  if(logicalPortInfo !=  NULLPTR)
+  {
+    memcpy(userName,logicalPortInfo->client.authmgrUserName,
+           logicalPortInfo->client.authmgrUserNameLength);
+  }
+  else
+  {
+    rc =  FAILURE;
+  }
+  authmgrLogicalPortInfoGiveLock();
+  (void)osapiReadLockGive(authmgrCB->authmgrRWLock);
+  return rc;
+}
+
+
+/*********************************************************************
+* @purpose  Returns the session timeout value for the  logical interface
+*
+* @param    lIntIfNum  @b((input)) the specified interface
+* @param    sessiontimeout  @b((output)) session timeout for the logical interface
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortSessionTimeoutGet(uint32 lIntIfNum,
+                                    uint32 *session_timeout)
+{
+  uint32 physPort;
+  authmgrPortCfg_t *pCfg;
+  RC_t  rc =  SUCCESS;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+
+  AUTHMGR_PORT_GET(physPort, lIntIfNum);
+
+  if (authmgrIsValidIntf(physPort) !=  TRUE)
+    return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(physPort, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  (void)osapiReadLockTake(authmgrCB->authmgrRWLock,  WAIT_FOREVER);
+  authmgrLogicalPortInfoTakeLock();
+  logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum);
+  if(logicalPortInfo !=  NULLPTR)
+  {
+    *session_timeout = logicalPortInfo->client.sessionTimeout;
+  }
+  else
+  {
+    rc =  FAILURE;
+  }
+  authmgrLogicalPortInfoGiveLock();
+  (void)osapiReadLockGive(authmgrCB->authmgrRWLock);
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  To get the time left for the session termination action
+*           to occur for the logical interface
+*
+* @param    lIntIfNum  @b((input))  Logical interface number
+* @param    timeLeft   @b((output)) Pointer to store the left out time
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortTimeLeftForTerminateActionGet(uint32 lIntIfNum,
+                                                        uint32 *timeLeft)
+{
+  uint32 physPort;
+  authmgrPortCfg_t *pCfg;
+  RC_t  rc =  SUCCESS;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+
+  AUTHMGR_PORT_GET(physPort, lIntIfNum);
+
+  if (authmgrIsValidIntf(physPort) !=  TRUE)
+    return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(physPort, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  (void)osapiReadLockTake(authmgrCB->authmgrRWLock,  WAIT_FOREVER);
+  authmgrLogicalPortInfoTakeLock();
+  logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum);
+  if(logicalPortInfo !=  NULLPTR)
+  {
+    rc = appTimerTimeLeftGet(authmgrCB->globalInfo->authmgrTimerCB,
+                             logicalPortInfo->authmgrTimer.handle.timer,
+                             timeLeft);
+  }
+  else
+  {
+    rc =  FAILURE;
+  }
+  authmgrLogicalPortInfoGiveLock();
+  (void)osapiReadLockGive(authmgrCB->authmgrRWLock);
+  return rc;
+}
+
+
+/*********************************************************************
+* @purpose  Returns the termination Action for the  logical interface
+*
+* @param    lIntIfNum  @b((input)) the specified interface
+* @param    terminationAction  @b((output)) termination Action for the logical interface
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortTerminationActionGet(uint32 lIntIfNum,
+                                    uint32 *terminationAction)
+{
+  uint32 physPort;
+  authmgrPortCfg_t *pCfg;
+  RC_t  rc =  SUCCESS;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+
+  AUTHMGR_PORT_GET(physPort, lIntIfNum);
+
+  if (authmgrIsValidIntf(physPort) !=  TRUE)
+    return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(physPort, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  (void)osapiReadLockTake(authmgrCB->authmgrRWLock,  WAIT_FOREVER);
+  authmgrLogicalPortInfoTakeLock();
+  logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum);
+  if(logicalPortInfo !=  NULLPTR)
+  {
+    *terminationAction = logicalPortInfo->client.terminationAction + 1;
+  }
+  else
+  {
+    rc =  FAILURE;
+  }
+  authmgrLogicalPortInfoGiveLock();
+  (void)osapiReadLockGive(authmgrCB->authmgrRWLock);
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Returns the logical port for the corresponding supplicant Mac Address
+*
+* @param    mac_addr    @b{(input)} supplicant mac address to be searched
+* @param    lIntIfNum    @b((output)) the logical interface
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments for SNMP
+*
+* @end
+*********************************************************************/
+RC_t authmgrClientMacAddressGet( enetMacAddr_t *macAddr,uint32 *lIntIfNum)
+{
+    return authmgrMacAddrInfoFind(macAddr,lIntIfNum);
+}
+
+/*********************************************************************
+* @purpose  Returns the logical port for the next supplicant Mac Address
+*           in the mac address database
+*
+* @param    mac_addr    @b{(input)} supplicant mac address to be searched
+* @param    lIntIfNum    @b((output)) the logical interface
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments for SNMP
+*
+* @end
+*********************************************************************/
+RC_t authmgrClientMacAddressNextGet( enetMacAddr_t *macAddr,uint32 *lIntIfNum)
+{
+    return authmgrMacAddrInfoFindNext(macAddr,lIntIfNum);
+}
+
+/*********************************************************************
+* @purpose  Returns the physical port corresponding to the logical interface
+*
+* @param    lIntIfNum    @b((input)) the logical interface
+* @param    physport    @b{(ouput)}  the physical interface
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrPhysicalPortGet(uint32 lIntIfNum,uint32 *physPort)
+{
+  AUTHMGR_PORT_GET(*physPort, lIntIfNum)
+  return  SUCCESS;
+}
+/*********************************************************************
+*
+* @purpose  Callback from DTL informing about an unauthorized address
+*
+* @param    uint32        intIfNum  @b((input)) Internal interface number
+* @param     enetMacAddr_t macAddr   @b((output)) MAC address
+* @param     ushort16      vlanId    @b((output)) VLAN ID
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @notes    none
+*
+* @end
+*********************************************************************/
+RC_t authmgrUnauthAddrCallBack( uint32 intIfNum,  enetMacAddr_t macAddr,  ushort16 vlanId )
+{
+  authmgrPortCfg_t *pCfg;
+  authmgrUnauthCallbackParms_t      parms;
+
+  /* If it is not a valid interface drop the request */
+  if ( authmgrIsValidIntf( intIfNum ) !=  TRUE )
+  {
+    return  FAILURE;
+  }
+
+  /* check if Guest vlan is enabled */
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  memcpy(&parms.macAddr,&macAddr.addr, ENET_MAC_ADDR_LEN);
+  parms.vlanId = vlanId;
+
+  /* send the message to the authmgr component */
+  return authmgrIssueCmd(authmgrUnauthAddrCallBackEvent,intIfNum,(void *)&parms);
+}
+
+/*********************************************************************
+* @purpose  Returns the authentication status of the client 
+*
+* @param    lIntIfNum    @b((input)) the specified interface
+* @param    authStat @b((output)) auth status 
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrClientVlanGet(uint32 lIntIfNum,
+                                    uint32 *vlanType,
+                                    uint32 *vlanId)
+{
+  RC_t  rc =  SUCCESS;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+
+  (void)osapiReadLockTake(authmgrCB->authmgrRWLock,  WAIT_FOREVER);
+  authmgrLogicalPortInfoTakeLock();
+  logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum);
+  if(logicalPortInfo !=  NULLPTR)
+  {
+    *vlanType = logicalPortInfo->client.vlanType;
+    *vlanId = logicalPortInfo->client.vlanId;
+  }
+  else
+  {
+    rc =  FAILURE;
+  }
+  authmgrLogicalPortInfoGiveLock();
+  (void)osapiReadLockGive(authmgrCB->authmgrRWLock);
+  return rc;
+}
+
+
+/*********************************************************************
+* @purpose  Returns the authentication status of the client 
+*
+* @param    lIntIfNum    @b((input)) the specified interface
+* @param    authStat @b((output)) auth status 
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrClientAuthStatusGet(uint32 lIntIfNum,
+                                    uint32 *authStatus)
+{
+  RC_t  rc =  SUCCESS;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+
+  (void)osapiReadLockTake(authmgrCB->authmgrRWLock,  WAIT_FOREVER);
+  authmgrLogicalPortInfoTakeLock();
+  logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum);
+  if(logicalPortInfo !=  NULLPTR)
+  {
+    *authStatus = logicalPortInfo->client.logicalPortStatus;
+  }
+  else
+  {
+    rc =  FAILURE;
+  }
+  authmgrLogicalPortInfoGiveLock();
+  (void)osapiReadLockGive(authmgrCB->authmgrRWLock);
+  return rc;
+}
+
+/*********************************************************************
+* @purpose  Determine if a client is authenticated on an interface
+*
+* @param    intIfNum      @b{(input)} internal interface number
+* @param    macAddr       @b{(input)} client's MAC address
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+ BOOL authmgrPortClientAuthenticationGet(uint32 intIfNum,  uchar8 *macAddr)
+{
+   AUTHMGR_PORT_CONTROL_t portControl;
+   AUTHMGR_PORT_STATUS_t    status;
+  uint32               lIntIfNum;
+  uint32               physPort=0;
+
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    return  TRUE;
+  }
+  if ( SUCCESS != authmgrPortControlModeGet(intIfNum, &portControl))
+  {
+    return  TRUE;
+  }
+
+  if ( AUTHMGR_PORT_FORCE_UNAUTHORIZED == portControl)
+  {
+    /* If port is force unauthorized, client is not authenticated */
+    return  FALSE;
+  }
+
+  if ( AUTHMGR_PORT_FORCE_AUTHORIZED == portControl)
+  {
+    /* If port is force authorized, client is assumed to be authenticated */
+    return  TRUE;
+  }
+
+  if ( SUCCESS != authmgrClientMacAddressGet(( enetMacAddr_t *)macAddr, &lIntIfNum))
+  {
+    return  FALSE;
+  }
+
+  if (( SUCCESS != authmgrPhysicalPortGet(lIntIfNum, &physPort)) ||
+      (physPort != intIfNum))
+  {
+    return  FALSE;
+  }
+
+  if (( SUCCESS != authmgrClientAuthStatusGet(lIntIfNum, &status)) ||
+      ( AUTHMGR_PORT_STATUS_AUTHORIZED != status))
+  {
+    return  FALSE;
+  }
+
+  return  TRUE;
+
+}
+
+/*********************************************************************
+* @purpose  Get the port acquire status.
+*
+* @param    intIfNum               @b{(input)} internal interface number
+*
+* @returns   TRUE if yes
+* @returns   FALSE otherwise
+*
+* @comments
+*
+* @end
+*********************************************************************/
+ BOOL authmgrPortIsAcquired(uint32 intIfNum)
+{
+  authmgrPortCfg_t *pCfg;
+   BOOL val =  FALSE;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+    return  FALSE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FALSE;
+
+  (void)osapiReadLockTake(authmgrCB->authmgrRWLock,  WAIT_FOREVER);
+   val = authmgrCB->globalInfo->authmgrPortInfo[intIfNum].authmgrAcquire;
+  (void)osapiReadLockGive(authmgrCB->authmgrRWLock);
+
+  return val;
+}
+
+/*********************************************************************
+* @purpose  Get maximum number of times authentication 
+*           may be reattempted by the user on the port.
+*
+* @param    intIfNum @b{(input)} internal interface number
+* @param    *maxReq  @b{(output)} maximum request value
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortMaxAuthAttemptsGet(uint32 intIfNum, uint32 *maxAuthAttempts)
+{
+  authmgrPortCfg_t *pCfg =  NULLPTR;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  *maxAuthAttempts = pCfg->maxAuthAttempts;
+  (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Set maximum number of times authentication
+*           may be reattempted by the user on the port.
+*
+* @param    intIfNum @b{(input)} internal interface number
+* @param    maxReq   @b{(input)} maximum request value
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+* @returns   NOT_SUPPORTED
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortMaxAuthAttemptsSet(uint32 intIfNum, uint32 maxAuthAttempts)
+{
+  authmgrPortCfg_t *pCfg =  NULLPTR;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  if ((maxAuthAttempts <  AUTHMGR_RADIUS_MAX_AUTH_ATTEMPTS_RANGE_MIN) ||
+      (maxAuthAttempts >  AUTHMGR_RADIUS_MAX_AUTH_ATTEMPTS_RANGE_MAX))
+  {
+    return  FAILURE;
+  }
+
+  (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  pCfg->maxAuthAttempts = maxAuthAttempts;
+  (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock);
+  authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged =  TRUE;
+  return authmgrIssueCmd(authmgrMaxAuthAttemptsSet, intIfNum, (void *)&maxAuthAttempts);
+
+}
+
+/*********************************************************************
+* @purpose  Check if the vlan is assigned to any client or port
+*
+* @param    intIfNum        @b{(input)} internal interface number
+* @param    vlanId        @b{(input)} vlanId
+*
+* @returns   TRUE
+* @returns   FALSE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+ BOOL authmgrVlanAssignedCheck (uint32 intIfNum, uint32 vlanId)
+{
+  uint32 lIntIfNum;
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode !=  ENABLE)
+  {
+    return  FALSE;
+  }
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+  {
+    return  FALSE;
+  }
+
+   (void)osapiReadLockTake(authmgrCB->authmgrRWLock,  WAIT_FOREVER);
+    /* iterate through all the logical interfaces of the physical interface */
+    lIntIfNum = AUTHMGR_LOGICAL_PORT_ITERATE;
+    while((logicalPortInfo=authmgrLogicalPortInfoGetNextNode(intIfNum, &lIntIfNum))!=  NULLPTR)
+    {
+      if (0 != logicalPortInfo->key.keyNum)
+      {
+        if (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portEnabled ==  TRUE &&
+            (authmgrCB->globalInfo->authmgrPortInfo[intIfNum].portControlMode ==  AUTHMGR_PORT_AUTO))
+        {
+          if ((AUTHMGR_VLAN_RADIUS == logicalPortInfo->client.vlanType) && 
+              (logicalPortInfo->client.vlanId == vlanId)) 
+          {
+            /* Vlan is assigned. Return TRUE. */
+            (void)osapiReadLockGive(authmgrCB->authmgrRWLock);
+            return  TRUE;
+          }
+        }
+      }
+    }
+
+    (void)osapiReadLockGive(authmgrCB->authmgrRWLock);
+
+  /* If we reach here, Vlan is not assigned. Return FALSE. */
+  return  FALSE;
+}
+
+
+/*********************************************************************
+* @purpose  Get port control mode
+*
+* @param    intIfNum     @b{(input)} internal interface number
+* @param    *portControl @b{(output)} port control mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t authmgrHostControlModeGet(uint32 intIfNum,  AUTHMGR_HOST_CONTROL_t *hostMode)
+{
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  *hostMode = pCfg->hostMode;
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Set port control mode
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    portControl @b{(input)} port control mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t authmgrHostControlModeSet(uint32 intIfNum,  AUTHMGR_HOST_CONTROL_t hostMode)
+{
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  if (hostMode == pCfg->hostMode)
+  {
+    return  SUCCESS;
+  }
+
+  (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  pCfg->hostMode = hostMode;
+  (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock);
+  authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged =  TRUE;
+
+  return authmgrIssueCmd(authmgrMgmtHostControlModeSet, intIfNum, &hostMode);
+}
+
+/*********************************************************************
+* @purpose  Set host control mode to default
+*
+* @param    intIfNum    @b{(input)} internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t authmgrHostModeReset(uint32 intIfNum)
+{
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+
+  (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  pCfg->hostMode = FD_AUTHMGR_HOST_MODE;
+  (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock);
+  authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged =  TRUE;
+
+  return authmgrIssueCmd(authmgrMgmtHostControlModeSet, intIfNum, (void *)&pCfg->hostMode);
+}
+
+
+void debugUnLearnAddrCallback(uint32 intIfNum)
+{
+   enetMacAddr_t macAddr;
+   ushort16 vlanId;
+
+  memset(&macAddr, 0, sizeof( enetMacAddr_t));
+
+  macAddr.addr[5] = 1;
+  vlanId  = 1;
+  authmgrUnauthAddrCallBack(intIfNum, macAddr, vlanId);
+}
+/*********************************************************************
+ * @purpose  chechks if method order config is valid.
+ *
+ * @param    intIfNum    @b{(input)} internal interface number
+ * @param    index @b{(input)} position of the method or order
+ * @param    method @b{(input)} authentication manager methods,
+ i.e.dot1x/mab/cp
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments Captive portal is always the last method. If any other method is tried
+ to configure after captive portal it should not allow.
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrPortAuthMethodOrderValidate(uint32 intIfNum, uint32 index,
+     AUTHMGR_METHOD_t method)
+{
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE)
+    return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  /* either no command or 
+     first method in the list .
+     Allow */
+  if(( AUTHMGR_METHOD_NONE == method) || 
+      (0 == index))
+  {
+    return  SUCCESS;
+  }
+
+  else if ( AUTHMGR_METHOD_NONE == pCfg->methodList[index-1])
+  {
+    return  FAILURE;
+  }
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Set auth mgr method or priority 
+*
+* @param    mode   @b{(input)} order or priority 
+* @param    index @b{(input)} position of the method or order 
+* @param    method @b{(input)} authentication manager methods,
+                               i.e.dot1x/mab/cp
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments Authentication restart timer value , for which the port will wait before,
+            retstarting authentication when all the authentication methods fail.
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortAuthMethodSet( AUTHMGR_METHOD_TYPE_t mode, uint32 intIfNum,
+        uint32 index,  AUTHMGR_METHOD_t method)
+{
+  authmgrPortCfg_t *pCfg;
+  uint32 i = 0, j = 0;
+  RC_t rc =  FAILURE;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+    return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  if (( AUTHMGR_TYPE_ORDER != mode) && ( AUTHMGR_TYPE_PRIORITY != mode))
+  {
+    return  FAILURE;
+  }
+
+  if ((index <  AUTHMGR_METHOD_START ) || (index >  AUTHMGR_METHOD_MAX))
+  {
+    return  FAILURE;
+  }
+
+  if (( AUTHMGR_METHOD_8021X != method) &&
+      ( AUTHMGR_METHOD_MAB != method) &&
+      ( AUTHMGR_METHOD_NONE != method))
+  {
+    return  FAILURE;
+  }
+  /* Now input always comes with order+1, reduce the order by 1 */
+  j = index - 1;
+
+  if ( AUTHMGR_TYPE_ORDER == mode)
+  {
+    /* Validate if the config of the order is correct */
+    if ( FAILURE == authmgrPortAuthMethodOrderValidate(intIfNum, j, method))
+    {
+      return  ERROR;
+    }
+
+    if (pCfg->methodList[j] == method)
+    {
+      return  SUCCESS;
+    }
+    (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+
+    pCfg->methodList[j] = method;
+    for (i = index; i <  AUTHMGR_METHOD_MAX; i++)
+    {
+      /* reset the configuration after the passed order
+         since we don't know if the configuration stops here or not */
+      pCfg->methodList[i] =  AUTHMGR_METHOD_NONE;
+    }
+    (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock);
+  }
+  else if ( AUTHMGR_TYPE_PRIORITY == mode)
+  {
+    if (pCfg->priorityList[j] == method)
+    {
+      return  SUCCESS;
+    }
+   (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+    pCfg->priorityList[j] = method;
+    for (i = index; i <  AUTHMGR_METHOD_MAX; i++)
+    {
+      /* reset the configuration after the passed order
+         since we don't know if the configuration stops here or not */
+      pCfg->priorityList[i] =  AUTHMGR_METHOD_NONE;
+    }
+  }
+  (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock);
+
+  authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged =  TRUE;
+
+  AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_API_CALLS,intIfNum,"%s:exiting-%s \n",
+                      __FUNCTION__,authmgrIntfIfNameGet(intIfNum));
+  if ( AUTHMGR_TYPE_ORDER == mode)
+  {
+    rc = authmgrIssueCmd(authmgrMethodOrderModify, intIfNum,  NULL);
+  }
+  else if ( AUTHMGR_TYPE_PRIORITY == mode)
+  {
+    rc = authmgrIssueCmd(authmgrMethodPriorityModify, intIfNum,  NULL);
+  }
+  return rc;
+}
+
+
+/*********************************************************************
+* @purpose  Get auth mgr method or priority 
+*
+* @param    mode   @b{(input)} order or priority 
+* @param    index @b{(input)} position of the method or order 
+* @param    *method @b{(output)} authentication manager methods,
+                               i.e.dot1x/mab/cp
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments Authentication restart timer value , for which the port will wait before,
+            retstarting authentication when all the authentication methods fail.
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortAuthMethodGet( AUTHMGR_METHOD_TYPE_t mode, uint32 intIfNum,
+        uint32 index,  AUTHMGR_METHOD_t *method)
+{
+  authmgrPortCfg_t *pCfg;
+  uint32 j = 0;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+    return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  if (( AUTHMGR_TYPE_ORDER != mode) && ( AUTHMGR_TYPE_PRIORITY != mode))
+  {
+    return  FAILURE;
+  }
+
+  if ((index <  AUTHMGR_METHOD_START ) || (index >  AUTHMGR_METHOD_MAX))
+  {
+    return  FAILURE;
+  }
+
+  /* Now input always comes with order+1, reduce the order by 1 */
+  j = index - 1;
+
+  (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  if ( AUTHMGR_TYPE_ORDER == mode)
+  {
+    *method = pCfg->methodList[j];
+  }
+  else if ( AUTHMGR_TYPE_PRIORITY == mode)
+  {
+    *method = pCfg->priorityList[j];
+  }
+
+  (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock);
+
+  return  SUCCESS;
+}
+
+
+/*********************************************************************
+ * @purpose  Get the number of clients authenticated.
+ *          
+ * @param    intIfNum @b((input)) interface number  
+* @param    mode   @b{(input)} order or priority 
+* @param    index @b{(input)} position of the method or order 
+* @param    *method @b{(output)} authentication manager methods,
+                               i.e.dot1x/mab/cp
+ *
+ * @returns  SUCCESS  
+ * @returns  FAILURE
+ *
+ * @comments
+ *
+ * @notes 
+ * @notes 
+ *
+ * @end
+ *
+ *********************************************************************/
+RC_t authmgrEnabledMethodGet( AUTHMGR_METHOD_TYPE_t mode, uint32 intIfNum,
+        uint32 index,  AUTHMGR_METHOD_t *method)
+{
+  uint32 j = 0;
+
+  if ( TRUE != authmgrIsValidIntf(intIfNum))
+  {
+    return  FAILURE;
+  }
+  if (( AUTHMGR_TYPE_ORDER != mode) && ( AUTHMGR_TYPE_PRIORITY != mode))
+  {
+    return  FAILURE;
+  }
+
+  if ((index <  AUTHMGR_METHOD_START ) || (index >  AUTHMGR_METHOD_MAX))
+  {
+    return  FAILURE;
+  }
+
+  /* Now input always comes with order+1, reduce the order by 1 */
+  j = index - 1;
+
+  (void)osapiReadLockTake(authmgrCB->authmgrRWLock,  WAIT_FOREVER);
+  if ( AUTHMGR_TYPE_ORDER == mode)
+  {
+    *method = authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods[j];
+  }
+  else if ( AUTHMGR_TYPE_PRIORITY == mode)
+  {
+    *method = authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledPriority[j];
+  }
+  (void)osapiReadLockGive(authmgrCB->authmgrRWLock);
+
+  return  SUCCESS;
+}
+
+
+/*********************************************************************
+ *
+ * @purpose Register routines to be called by Auth Manager for various events.
+ *
+ * @param method @b((input)) authentication protocol
+ * @param *notify @b((input)) pointer to a routine to be invoked upon a respones.
+ *                       portCtrlFn: routine to set port control mode     
+ *                       hostCtrlFn: routine to set port host mode     
+ *                       eventNotifyFn: routine to handle Auth Mgr events     
+ *                       enableGetFn: routine to get admin mode of the authentication protocol     
+ *                       radiusEnableGetFn: routine to get whether RADIUS is configured as
+ *                       an authentication method
+ * 
+ * 
+ * @returns  SUCCESS
+ * @returns  FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *
+*********************************************************************/
+RC_t authmgrEventCallbackRegister( AUTHMGR_METHOD_t method,
+    RC_t(*portCtrlFn) (uint32 intIfNum,  AUTHMGR_PORT_CONTROL_t portControl),
+    RC_t(*hostCtrlFn) (uint32 intIfNum,  AUTHMGR_HOST_CONTROL_t hostMode),
+    RC_t(*eventNotifyFn) (uint32 intIfNum, uint32 event,  enetMacAddr_t *macAddr),
+    RC_t(*enableGetFn) (uint32 intIfNum, uint32 *enabled),
+    RC_t(*radiusEnabledGetFn) (uint32 intIfNum, uint32 *enabled))
+{
+
+  AUTHMGR_IF_INVALID_METHOD_RETURN_LOG(method);
+
+  if ((authmgrCB->globalInfo->authmgrCallbacks[method].method !=  AUTHMGR_METHOD_NONE) ||
+      (method ==  AUTHMGR_METHOD_NONE))
+  {
+     LOGF( LOG_SEVERITY_INFO,
+            "AUTHMGR: method ID %s already registered", authmgrMethodStringGet(authmgrCB->globalInfo->authmgrCallbacks[method].method));
+    return  FAILURE;
+  }
+
+  authmgrCB->globalInfo->authmgrCallbacks[method].method = method;
+  authmgrCB->globalInfo->authmgrCallbacks[method].portCtrlFn = portCtrlFn;
+  authmgrCB->globalInfo->authmgrCallbacks[method].hostCtrlFn = hostCtrlFn;
+  authmgrCB->globalInfo->authmgrCallbacks[method].eventNotifyFn = eventNotifyFn;
+  authmgrCB->globalInfo->authmgrCallbacks[method].enableGetFn = enableGetFn;
+  authmgrCB->globalInfo->authmgrCallbacks[method].radiusEnabledGetFn = radiusEnabledGetFn;
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+*
+* @purpose Deregister all routines to be called when a RADIUS response is
+*          received from a server for a previously submitted request.
+*
+* @param   componentId  @b{(input)}  one of  COMPONENT_IDS_t
+*
+* @returns  SUCCESS
+*
+* @comments
+*
+* @end
+*
+*********************************************************************/
+RC_t authmgrEventCallbackDeregister( AUTHMGR_METHOD_t method)
+{
+  AUTHMGR_IF_INVALID_METHOD_RETURN_LOG(method);
+
+  if ((authmgrCB->globalInfo->authmgrCallbacks[method].method ==  AUTHMGR_METHOD_NONE) ||
+      (method != authmgrCB->globalInfo->authmgrCallbacks[method].method))
+  {
+     LOGF( LOG_SEVERITY_INFO,
+            "AUTHMGR: fail to de reigister method ID %s, existing method is %s",
+            authmgrMethodStringGet(method), authmgrMethodStringGet(authmgrCB->globalInfo->authmgrCallbacks[method].method));
+    return  FAILURE;
+  }
+
+  memset(&authmgrCB->globalInfo->authmgrCallbacks[method], 0, sizeof(authmgrMethodCallbackNotifyMap_t));
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Get the port autherization status.
+*
+* @param    intIfNum               @b{(input)} internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortIsAuthorized(uint32 intIfNum)
+{
+  authmgrPortCfg_t *pCfg;
+   AUTHMGR_PORT_STATUS_t portStatus;
+
+  if (authmgrIsValidIntf(intIfNum) ==  TRUE)
+  {
+    if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    {
+      return  SUCCESS;
+    }
+    if ((authmgrPortAuthControlledPortStatusGet(intIfNum, &portStatus) !=  SUCCESS) ||
+        (portStatus !=  AUTHMGR_PORT_STATUS_AUTHORIZED))
+    {
+      return  FAILURE;
+    }
+  }
+  return  SUCCESS;
+}
+
+
+/*********************************************************************
+ * @purpose  Get the Authentication Method string for given method type
+ *
+ * @param    method  @b{(input)} Authentication Method type 
+ *
+ * @returns  Method name String for given input method
+ *
+ * @comments none
+ *
+ * @end
+ *********************************************************************/
+ uchar8 *authmgrMethodTypeToName( AUTHMGR_METHOD_t method)
+{
+  switch(method)
+  {
+    case  AUTHMGR_METHOD_NONE:
+      return ( uchar8 *)"Auth Method Undefined"; //shiva check with amit
+
+    case  AUTHMGR_METHOD_8021X:
+      return ( uchar8 *)"Dot1X"; 
+
+    case  AUTHMGR_METHOD_MAB:
+      return ( uchar8 *)"MAB"; 
+
+    default:
+      break;
+  }
+  return ( uchar8 *)"Invalid Auth Method"; 
+}
+
+
+/*********************************************************************
+ * @purpose function to get max users 
+ *
+ * @param    hostMode   @b{(input))  hostmode 
+ * @param    *appyPolicy  @b{(input)) bool value 
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrMaxUsersGet(uint32 intIfNum, uint32 *maxUsers)
+{
+  RC_t rc =  SUCCESS;
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  (void)osapiReadLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+  switch (pCfg->hostMode)
+  {
+    case  AUTHMGR_MULTI_HOST_MODE: 
+          *maxUsers =  AUTHMGR_MULTI_HOST_MODE_MAX_USERS;
+          break;
+          
+    case  AUTHMGR_SINGLE_AUTH_MODE: 
+          *maxUsers =  AUTHMGR_SINGLE_AUTH_MODE_MAX_USERS;
+          break;
+          
+    case  AUTHMGR_MULTI_AUTH_MODE: 
+          *maxUsers = pCfg->maxUsers;
+          break;
+
+    default:
+          rc =  FAILURE;
+  }
+  (void)osapiReadLockGive(authmgrCB->authmgrCfgRWLock);
+
+  return rc;
+}
+
+/*********************************************************************
+ * @purpose  Verify specified config interface index is valid
+ *
+ * @param    intIfNum    @b{(input)}  Internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrIntfIndexGet(uint32 intIfNum)
+{
+  /* the global  ALL_INTERFACES value is not valid in context of this API */
+  if (intIfNum ==  ALL_INTERFACES)
+    return  FAILURE;
+
+  if ( TRUE != authmgrIsValidIntf(intIfNum))
+    return  FAILURE;
+
+  return  SUCCESS;
+}
+
+
+/*********************************************************************
+ * @purpose  Determine next sequential auth Mgr config interface index
+ *
+ * @param    intIfNum    @b{(input)}  Internal interface number to begin search
+ * @param    *pNext      @b{(output)} Ptr to next internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrIntfIndexGetNext(uint32 intIfNum, uint32 *pNext)
+{   
+  RC_t rc =  FAILURE;
+  uint32 nextIntIfNum = intIfNum;
+    
+  while ( SUCCESS == nimNextValidIntfNumberByType( PHYSICAL_INTF, nextIntIfNum, &nextIntIfNum))
+  { 
+    if ( TRUE == authmgrIsValidIntf(nextIntIfNum))
+    {
+      /* Next authmgr valid interface found. */
+      *pNext = nextIntIfNum;
+      rc =  SUCCESS;
+      break;
+    }
+  } 
+    
+  return rc;
+}   
+
+/*********************************************************************
+ * @purpose  Verify specified  index exists
+ *
+ * @param    index     @b{(input)} index of the config array 
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments Auth Mgr expects the index to come to the api with incremented by 1.
+             In the API we reduce the  index by 1 as the data structure is array.
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrMethodIndexGet(uint32 index)
+{
+  if ((index >=  AUTHMGR_METHOD_START) &&
+      (index <=  AUTHMGR_METHOD_MAX))
+    return  SUCCESS;
+
+  return  FAILURE;
+}
+
+/*********************************************************************
+ * @purpose  Determine next sequential  index
+ *
+ * @param    index     @b{(input)} index of the config array 
+ * @param    *pNext      @b{(output)} Ptr to next priority
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrMethodIndexGetNext(uint32 index, uint32 *pNext)
+{
+  if (index >  AUTHMGR_METHOD_MAX)
+    return  FAILURE;
+
+  if (pNext ==  NULLPTR)
+    return  FAILURE;
+
+  if (index <  AUTHMGR_METHOD_START)
+    *pNext =  AUTHMGR_METHOD_START;
+  else
+    *pNext = index + 1;
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose  Determine next sequential auth Mgr config interface index
+ *
+ * @param    intIfNum    @b{(input)}  Internal interface number to begin search
+ * @param    *pNext      @b{(output)} Ptr to next internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrEntryIndexGet(uint32 intIfNum, uint32 index)
+{
+
+  if (( SUCCESS == authmgrIntfIndexGet(intIfNum))&&
+      ( SUCCESS == authmgrMethodIndexGet(index)))
+  {
+    return   SUCCESS;
+  }
+
+  return  FAILURE;
+}
+/*********************************************************************
+ * @purpose  Determine next sequential auth Mgr config interface index
+ *
+ * @param    intIfNum    @b{(input)}  Internal interface number to begin search
+ * @param    *pNext      @b{(output)} Ptr to next internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrEntryIndexGetNext(uint32 intIfNum, uint32 *pNextNum,
+                                  uint32 index, uint32 *pNextIndex)
+{
+  RC_t       rc =  FAILURE;
+
+  if ( SUCCESS == authmgrIntfIndexGet(intIfNum))
+  {
+    rc = authmgrMethodIndexGetNext(index,pNextIndex);
+  }
+  if ( SUCCESS != rc)
+  {
+    if ( SUCCESS == authmgrIntfIndexGetNext(intIfNum, pNextNum))
+    {
+      rc = authmgrMethodIndexGetNext(0,pNextIndex);
+    }
+  }
+  return rc;
+
+}
+/*********************************************************************
+ * @purpose  chechs if method is configured in the order.
+ *
+ * @param    intIfNum    @b{(input)} internal interface number
+ * @param    method @b{(input)} authentication method which is being checked,
+ i.e.dot1x/mab/cp
+ *
+ * @returns   FAILURE_
+ * @returns   SUCCESS
+ *
+ * @comments  This API should only be called from the methods DOT1X and captive portal
+              applications only. 
+ *
+ * @end
+ *********************************************************************/
+
+RC_t authmgrIsMethodConfigured(uint32 intIfNum,  AUTHMGR_METHOD_t method, uint32 *entryIndex)
+{
+  authmgrPortCfg_t *pCfg;
+  uint32 methodIndex = 0xFFFF;
+  uint32 i;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE)
+    return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+ for (i =  AUTHMGR_METHOD_MIN; i <  AUTHMGR_METHOD_MAX; i++)
+ {
+   if(method == pCfg->methodList[i])
+   {
+     methodIndex = i;
+     break;
+   }
+ }
+
+ if (methodIndex >=  AUTHMGR_METHOD_MAX)
+ {
+    return  FAILURE;
+ }
+  *entryIndex = methodIndex;
+ return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose  chechs if method is Enabled.
+ *
+ * @param    intIfNum    @b{(input)} internal interface number
+ * @param    method @b{(input)} authentication method which is being checked,
+ i.e.dot1x/mab/cp
+ * @param    *entryIndex    @b{(outout)}reference to the entry index
+ *
+ * @returns   FALSE
+ * @returns   TRUE
+ *
+ * @comments  This API should only be called from the methods DOT1X and captive portal
+              applications only. 
+ *
+ * @end
+ *********************************************************************/
+
+ BOOL authmgrIsMethodEnabled(uint32 intIfNum,  AUTHMGR_METHOD_t method, uint32 *entryIndex)
+{
+  uint32 methodIndex = 0xFF;
+  uint32 i;
+
+  if ( TRUE != authmgrIsValidIntf(intIfNum))
+      return  FALSE;
+
+
+ for (i =  AUTHMGR_METHOD_MIN; i <  AUTHMGR_METHOD_MAX; i++)
+ {
+   if(method == authmgrCB->globalInfo->authmgrPortInfo[intIfNum].enabledMethods[i])
+   {
+     methodIndex = i;
+     break;
+   }
+ }
+
+ if (methodIndex >=  AUTHMGR_METHOD_MAX)
+ {
+    return  FALSE;
+ }
+  *entryIndex = methodIndex;
+ return  TRUE;
+}
+
+/*********************************************************************
+* @purpose  Returns the client auth status for the logical interface
+*
+* @param    lIntIfNum    @b((input)) the specified interface
+* @param    status       @b((output)) authenticated status 
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortClientAuthStatusGet(uint32 lIntIfNum,  AUTHMGR_PORT_STATUS_t *status)
+{
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+  logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum);
+
+  authmgrLogicalPortInfoTakeLock();
+  if ( NULLPTR == logicalPortInfo)
+  {
+    authmgrLogicalPortInfoGiveLock();
+    return  FAILURE;
+  }
+
+  *status = logicalPortInfo->client.logicalPortStatus;
+  authmgrLogicalPortInfoGiveLock();
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Returns the client auth state for the logical interface
+*
+* @param    lIntIfNum    @b((input))  the specified interface
+* @param    state        @b((output)) authenticating state 
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortClientAuthStateGet(uint32 lIntIfNum, AUTHMGR_STATES_t *state)
+{
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+  logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum);
+
+  authmgrLogicalPortInfoTakeLock();
+  if ( NULLPTR == logicalPortInfo)
+  {
+    authmgrLogicalPortInfoGiveLock();
+    return  FAILURE;
+  }
+
+  *state = logicalPortInfo->protocol.authState;
+  authmgrLogicalPortInfoGiveLock();
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Returns the client reauth state for the logical interface
+*
+* @param    lIntIfNum    @b((input))  the specified interface
+* @param    state        @b((output)) reauthenticating state 
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortClientReauthStateGet(uint32 lIntIfNum,  BOOL *state)
+{
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+  logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum);
+
+  authmgrLogicalPortInfoTakeLock();
+  if ( NULLPTR == logicalPortInfo)
+  {
+    authmgrLogicalPortInfoGiveLock();
+    return  FAILURE;
+  }
+
+  *state = logicalPortInfo->protocol.reauth;
+  authmgrLogicalPortInfoGiveLock();
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Returns the client authenticated Method for the logical interface
+*
+* @param    lIntIfNum    @b((input)) the specified interface
+* @param    method       @b((output)) authenticating method
+*
+* @returns   SUCCESS  if success
+* @returns   FAILURE  if other failure
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortClientAuthenticatedMethodGet(uint32 lIntIfNum, 
+                                                        AUTHMGR_METHOD_t *method)
+{
+  authmgrLogicalPortInfo_t *logicalPortInfo;
+  logicalPortInfo = authmgrLogicalPortInfoGet(lIntIfNum);
+
+  authmgrLogicalPortInfoTakeLock();
+  if ( NULLPTR == logicalPortInfo)
+  {
+    authmgrLogicalPortInfoGiveLock();
+    return  FAILURE;
+  }
+
+  *method = logicalPortInfo->client.authenticatedMethod;
+  authmgrLogicalPortInfoGiveLock();
+
+  return  SUCCESS;
+}
+/*********************************************************************
+ * @purpose  gets the authenticated method or currently running authenticated method for the client 
+ *
+ * @param    intIfNum    @b{(input)} internal interface number
+ * @param    mac_addr    @b{(input)}client's mac address 
+ * @param    *method    @b{(input)}reference to the method 
+ *
+ * @returns   FALSE_
+ * @returns   TRUE
+ *
+ * @comments 
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrClientAuthenticatedMethodGet(uint32 intIfNum,  enetMacAddr_t macAddr,  AUTHMGR_METHOD_t *method )
+{
+  uint32 lIntIfNum;
+   enetMacAddr_t tempMac;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE)
+    return  FAILURE;
+
+  memset (tempMac.addr, 0,  ENET_MAC_ADDR_LEN);
+
+  if (0 == memcmp(tempMac.addr, macAddr.addr,  ENET_MAC_ADDR_LEN))
+  {
+    return  FAILURE;
+  } 
+  /* first find the logical node for this mac address */
+  if ( SUCCESS != authmgrMacAddrInfoFind(&macAddr, &lIntIfNum))
+  {
+    return  FAILURE;
+  }
+
+  if ( SUCCESS != authmgrLogicalPortClientAuthenticatedMethodGet(lIntIfNum, method))
+  {
+    return  FAILURE;
+  }
+  return  SUCCESS;
+}
+
+
+/*********************************************************************
+* @purpose  Get number of attempts for the method 
+*
+* @param    intIfNum     @b{(input)} internal interface number
+* @param    method       @b{(input)} method for which the attempts are requested 
+* @param    *numAttempts @b{(output)} number of attempts 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortAttemptsGet(uint32 intIfNum,  AUTHMGR_METHOD_t method, uint32 *numAttempts)
+{
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  switch (method)
+  {
+    case  AUTHMGR_METHOD_8021X:
+         *numAttempts = authmgrCB->globalInfo->authmgrPortStats[intIfNum].dot1x.authEntersAuthenticating;
+         break;
+    case  AUTHMGR_METHOD_MAB:
+         *numAttempts = authmgrCB->globalInfo->authmgrPortStats[intIfNum].mab.authEntersAuthenticating;
+         break;
+    default:
+         break;
+  }
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Get number of failed attempts for the method 
+*
+* @param    intIfNum     @b{(input)} internal interface number
+* @param    method       @b{(input)} method for which the attempts are requested 
+* @param    *numAttempts @b{(output)} number of attempts 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortFailedAttemptsGet(uint32 intIfNum,  AUTHMGR_METHOD_t method, uint32 *numAttempts)
+{
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  switch (method)
+  {
+    case  AUTHMGR_METHOD_8021X:
+         *numAttempts = authmgrCB->globalInfo->authmgrPortStats[intIfNum].dot1x.authFailure;
+         *numAttempts = *numAttempts + authmgrCB->globalInfo->authmgrPortStats[intIfNum].dot1x.authTimeout;
+         break;
+    case  AUTHMGR_METHOD_MAB:
+         *numAttempts = authmgrCB->globalInfo->authmgrPortStats[intIfNum].mab.authFailure;
+         *numAttempts = *numAttempts + authmgrCB->globalInfo->authmgrPortStats[intIfNum].mab.authTimeout;
+         break;
+    default:
+         break;
+  }
+  return  SUCCESS;
+}
+
+
+/*********************************************************************
+ * @purpose  Get the number of clients authenticated.
+ *          
+ * @param    intIfNum @b((input)) interface number  
+ * @param    pCount @b((output)) ptr to the number of clients  
+ *
+ * @returns  SUCCESS  
+ * @returns  FAILURE
+ *
+ * @comments
+ *
+ * @notes 
+ * @notes 
+ *
+ * @end
+ *
+ *********************************************************************/
+RC_t authmgrNumClientsGet(uint32 intIfNum, uint32 *pCount) 
+{
+
+  if ( TRUE != authmgrIsValidIntf(intIfNum))
+  {
+      return  FAILURE;
+  }
+
+  if(pCount ==  NULLPTR)
+  {
+    return  FAILURE;
+  }
+
+  *pCount = authmgrCB->globalInfo->authmgrPortInfo[intIfNum].numUsers;
+  return  SUCCESS;
+}
+
+/*********************************************************************
+*
+* @purpose  Update the status and other information of the client 
+            from the authentication  method to Auth Mgr.
+*
+* @param    uint32        intIfNum  @b((input)) Internal interface number
+* @param    method @b{(input)} authentication manager methods,
+                               i.e.dot1x/mab/cp
+* @param    status @b{(input)} authentication status,
+                               i.e start/success/fail/timeout.
+* @param    clientParams @b{(input)} client status event related information
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @notes   This API is called from DOT1X and CP when they are starting the authentication 
+           and also when the method is success/failure/timedout
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortClientAuthStatusUpdate(uint32 intIfNum, 
+                                     AUTHMGR_METHOD_t method,
+                                     AUTHMGR_STATUS_t status,
+                                    void *clientParams)
+{
+  authmgrPortCfg_t *pCfg;
+  authmgrAuthRespParams_t      parms;
+  authmgrClientStatusInfo_t *temp =  NULLPTR;
+  RC_t rc =  SUCCESS;
+ 
+
+  if ( ALL_INTERFACES != intIfNum)
+  {
+    /* If it is not a valid interface drop the request */
+    if ( authmgrIsValidIntf( intIfNum ) !=  TRUE )
+    {
+      return  FAILURE;
+    }
+    if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    {
+      return  FAILURE;
+    }
+  }
+
+  AUTHMGR_IF_NULLPTR_RETURN_LOG(clientParams);
+
+  temp = (authmgrClientStatusInfo_t *)clientParams;
+
+  parms.status = status;
+  parms.method = method;
+
+  parms.clientParams = *temp;
+  rc = authmgrIssueCmd(authmgrAuthMethodCallbackEvent, intIfNum, (void *)&parms);
+
+  AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_CLIENT, 0,
+      "Updated PAC on user %02X:%02X:%02X:%02X:%02X:%02X with Status %s  method %s, rc %d",
+      (unsigned int)parms.clientParams.info.authInfo.macAddr.addr[0], 
+      (unsigned int)parms.clientParams.info.authInfo.macAddr.addr[1], 
+      (unsigned int)parms.clientParams.info.authInfo.macAddr.addr[2],
+      (unsigned int)parms.clientParams.info.authInfo.macAddr.addr[3], 
+      (unsigned int)parms.clientParams.info.authInfo.macAddr.addr[4], 
+      (unsigned int)parms.clientParams.info.authInfo.macAddr.addr[5],
+      authmgrMethodStatusStringGet(parms.status), authmgrMethodStringGet(parms.method), rc);
+  /* send the message to the authmgr component */
+  AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_API_CALLS,intIfNum,"%s:exiting-%s \n",
+                      __FUNCTION__,authmgrIntfIfNameGet(intIfNum));
+
+  return rc;
+}
+
+/*********************************************************************
+*
+* @purpose Set the port capabilities
+*
+* @param   intIfNum  @b{(input)}  interface number
+* @param   paeCapabilities  @b{(input)}  capabiities (authenticator or supplicant)
+*
+* @returns  SUCCESS
+*
+* @comments
+*
+* @end
+*
+*********************************************************************/
+RC_t authmgrDot1xCapabilitiesUpdate(uint32 intIfNum, uint32 paeCapabilities)
+{
+  authmgrPortCfg_t *pCfg;
+
+  /* If it is not a valid interface drop the request */
+  if ( authmgrIsValidIntf( intIfNum ) !=  TRUE )
+  {
+    return  FAILURE;
+  }
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  if (paeCapabilities == pCfg->paeCapabilities)
+{
+  return  SUCCESS;
+}
+
+  (void)osapiWriteLockTake(authmgrCB->authmgrCfgRWLock,  WAIT_FOREVER);
+   pCfg->paeCapabilities = paeCapabilities;
+  (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock);
+
+  /* send the message to the authmgr component */
+  AUTHMGR_EVENT_TRACE(AUTHMGR_TRACE_API_CALLS,intIfNum,"%s:exiting-%s \n",
+                      __FUNCTION__,authmgrIntfIfNameGet(intIfNum));
+  return authmgrIssueCmd(authmgrPaeCapabilitiesEvent, intIfNum, &paeCapabilities);
+
+
+}
+
+/*********************************************************************
+* @purpose  Set administrative mode setting for authmgr
+*
+* @param    adminMode @b{(input)} authmgr admin mode
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments    
+*       
+* @end
+*********************************************************************/
+RC_t authmgrAdminModeSet(uint32 adminMode)
+{
+
+  if (authmgrCB->globalInfo->authmgrCfg->adminMode == adminMode)
+    return  SUCCESS;
+
+  authmgrCB->globalInfo->authmgrCfg->adminMode =  ENABLE;
+
+  authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged =  TRUE;
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Get administrative mode setting for authmgr
+*
+* @param    *adminMode @b{(output)} authmgr admin mode
+*
+* @returns   SUCCESS
+*
+* @comments    
+*       
+* @end
+*********************************************************************/
+RC_t authmgrAdminModeGet(uint32 *adminMode)
+{
+  *adminMode = authmgrCB->globalInfo->authmgrCfg->adminMode;
+
+  return  SUCCESS;
+}
+
+
+/*********************************************************************
+* @purpose  Get number of authenticated clients on a port
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    *count @b{(output)} number of authenticated clients
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments none
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortAuthCountGet(uint32 intIfNum, uint32 *count)
+{
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  (void)osapiReadLockTake(authmgrCB->authmgrRWLock,  WAIT_FOREVER);
+  *count = authmgrCB->globalInfo->authmgrPortInfo[intIfNum].authCount;
+  (void)osapiReadLockGive(authmgrCB->authmgrRWLock);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Set inactivity period value
+*
+* @param    intIfNum    @b{(input)} internal interface number
+* @param    inActivityPeriod @b{(input)} inActivity period
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments The inactivity period is the time period for which the system will
+*,          wait. At the expiry of this timer, the authenticated client is removed, if inactive.
+*       
+* @end
+*********************************************************************/
+RC_t authmgrPortAuthInactiveTimerSet(uint32 intIfNum, uint32 inActivityPeriod)
+{
+  authmgrPortCfg_t *pCfg;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE) 
+      return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+
+  if (inActivityPeriod == pCfg->inActivityPeriod)
+    return  SUCCESS;
+
+  (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock);
+  pCfg->inActivityPeriod = inActivityPeriod;
+  (void)osapiWriteLockGive(authmgrCB->authmgrCfgRWLock);
+  authmgrCB->globalInfo->authmgrCfg->cfgHdr.dataChanged =  TRUE;
+
+  return authmgrIssueCmd(authmgrMgmtPortInactivePeriodSet, intIfNum, &inActivityPeriod);
+}
+
+/*********************************************************************
+* @purpose  Reset port information
+*
+* @param    intIfNum   @b{(input)} internal interface number
+* @param    initialize @b{(input)} initialize value
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments This value is set to  TRUE by management in order to force
+*           initialization of a port.  It is re-set to  FALSE after
+*           initialization has completed.
+* 
+* @end
+*********************************************************************/
+RC_t authmgrPortInfoReset(uint32 intIfNum,  BOOL initialize)
+{
+  authmgrPortCfg_t *pCfg;
+  RC_t rc =  SUCCESS;
+
+  if (authmgrIsValidIntf(intIfNum) !=  TRUE)
+      return  FAILURE;
+
+  if (authmgrIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  /* Set the config values to default */
+   authmgrBuildDefaultIntfConfigData( NULLPTR, pCfg);
+
+  if (initialize ==  TRUE)
+    rc = authmgrIssueCmd(authmgrCtlPortInfoReset, intIfNum, &initialize);
+
+  return rc;
+}
+
+/*********************************************************************
+ * @purpose  Cleans up a client session
+ *
+ * @param    mac_addr    @b{(input)}client's mac address 
+ *
+ * @returns   FALSE_
+ * @returns   TRUE
+ *
+ * @comments 
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrClientDelete( enetMacAddr_t macAddr)
+{
+  uint32 lIntIfNum =  NULL;
+
+  if ( SUCCESS == authmgrClientMacAddressGet(( enetMacAddr_t *)&macAddr, &lIntIfNum))
+  {
+    return authmgrIssueCmd(authmgrClientCleanup, lIntIfNum,  NULLPTR);
+
+  }
+  else
+  {
+    AUTHMGR_EVENT_TRACE (AUTHMGR_TRACE_API_CALLS, 0,
+                         "%s: Device not found in Auth Mgr db \n",
+                         __FUNCTION__);
+  }
+  return  SUCCESS;
+}
+
diff --git a/src/sonic-pac/authmgr/mapping/auth_mgr_sid/auth_mgr_sid.c b/src/sonic-pac/authmgr/mapping/auth_mgr_sid/auth_mgr_sid.c
new file mode 100755
index 000000000000..cb43c2ee4989
--- /dev/null
+++ b/src/sonic-pac/authmgr/mapping/auth_mgr_sid/auth_mgr_sid.c
@@ -0,0 +1,69 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "pacinfra_common.h"
+#include "auth_mgr_sid.h"
+#include "auth_mgr_sid_const.h"
+
+
+/*********************************************************************
+* @purpose  Get thread default Stack Size
+*
+* @param    void    
+*
+* @returns  CNFGR_MSG_HANDLER_THREAD_STACK_SIZE 
+*
+* @comments none 
+*       
+* @end
+*********************************************************************/
+ int32 authmgrSidDefaultStackSize()
+{
+  return ( FD_CNFGR_AUTHMGR_DEFAULT_STACK_SIZE );
+}
+
+/*********************************************************************
+* @purpose  Get thread default task slice
+*
+* @param    void    
+*
+* @returns  CNFGR_MSG_HANDLER_THREAD_STACK_SIZE 
+*
+* @comments none 
+*       
+* @end
+*********************************************************************/
+ int32 authmgrSidDefaultTaskSlice()
+{
+  return ( FD_CNFGR_AUTHMGR_DEFAULT_TASK_SLICE );
+}
+
+/*********************************************************************
+* @purpose  Get thread default task priority
+*
+* @param    void    
+*
+* @returns  CNFGR_MSG_HANDLER_THREAD_STACK_SIZE 
+*
+* @comments none 
+*       
+* @end
+*********************************************************************/
+ int32 authmgrSidDefaultTaskPriority()
+{
+  return ( FD_CNFGR_AUTHMGR_DEFAULT_TASK_PRI );
+}
+
diff --git a/src/sonic-pac/authmgr/mapping/auth_mgr_sid/auth_mgr_sid.h b/src/sonic-pac/authmgr/mapping/auth_mgr_sid/auth_mgr_sid.h
new file mode 100755
index 000000000000..9663bc63fac2
--- /dev/null
+++ b/src/sonic-pac/authmgr/mapping/auth_mgr_sid/auth_mgr_sid.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_AUTHMGR_SID_H
+#define INCLUDE_AUTHMGR_SID_H
+
+#include "commdefs.h"
+#include "datatypes.h"
+
+/*********************************************************************
+* @purpose  Get thread default Stack Size
+*
+* @param    void    
+*
+* @returns  CNFGR_MSG_HANDLER_THREAD_STACK_SIZE 
+*
+* @comments none 
+*       
+* @end
+*********************************************************************/
+ int32 authmgrSidDefaultStackSize();
+
+/*********************************************************************
+* @purpose  Get thread default task slice
+*
+* @param    void    
+*
+* @returns  CNFGR_MSG_HANDLER_THREAD_STACK_SIZE 
+*
+* @comments none 
+*       
+* @end
+*********************************************************************/
+ int32 authmgrSidDefaultTaskSlice();
+
+/*********************************************************************
+* @purpose  Get thread default task priority
+*
+* @param    void    
+*
+* @returns  CNFGR_MSG_HANDLER_THREAD_STACK_SIZE 
+*
+* @comments none 
+*       
+* @end
+*********************************************************************/
+ int32 authmgrSidDefaultTaskPriority();
+
+
+#endif /* INCLUDE_AUTHMGR_SID_H */
diff --git a/src/sonic-pac/authmgr/mapping/auth_mgr_sid/auth_mgr_sid_const.h b/src/sonic-pac/authmgr/mapping/auth_mgr_sid/auth_mgr_sid_const.h
new file mode 100755
index 000000000000..1b4e239f2094
--- /dev/null
+++ b/src/sonic-pac/authmgr/mapping/auth_mgr_sid/auth_mgr_sid_const.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_AUTHMGR_SID_CONST_H
+#define INCLUDE_AUTHMGR_SID_CONST_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "auth_mgr_common.h"
+
+
+/*
+***********************************************************************
+*                          CONSTANTS
+***********************************************************************
+*/
+
+enum 
+{
+  FD_CNFGR_AUTHMGR_DEFAULT_STACK_SIZE     =  DEFAULT_STACK_SIZE,
+  FD_CNFGR_AUTHMGR_DEFAULT_TASK_SLICE     =  DEFAULT_TASK_SLICE,
+  FD_CNFGR_AUTHMGR_DEFAULT_TASK_PRI       =  TASK_PRIORITY_LEVEL( DEFAULT_TASK_PRIORITY)
+};
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_AUTHMGR_SID_CONST_H */
+

From 074caea85f6966d41578a24200b3fab63afd1705 Mon Sep 17 00:00:00 2001
From: Vijaya Kumar Abbaraju <vijaya-kumar.abbaraju@broadcom.com>
Date: Tue, 8 Oct 2024 04:34:03 +0530
Subject: [PATCH 072/364] MAB mgr changes for PAC (#18623)

---
 src/sonic-pac/mabmgr/Makefile.am     |  16 +
 src/sonic-pac/mabmgr/mabmgr.cpp      | 549 +++++++++++++++++++++++++++
 src/sonic-pac/mabmgr/mabmgr.h        |  97 +++++
 src/sonic-pac/mabmgr/mabmgr_main.cpp | 101 +++++
 4 files changed, 763 insertions(+)
 create mode 100644 src/sonic-pac/mabmgr/Makefile.am
 create mode 100644 src/sonic-pac/mabmgr/mabmgr.cpp
 create mode 100644 src/sonic-pac/mabmgr/mabmgr.h
 create mode 100644 src/sonic-pac/mabmgr/mabmgr_main.cpp

diff --git a/src/sonic-pac/mabmgr/Makefile.am b/src/sonic-pac/mabmgr/Makefile.am
new file mode 100644
index 000000000000..019ef7986b45
--- /dev/null
+++ b/src/sonic-pac/mabmgr/Makefile.am
@@ -0,0 +1,16 @@
+INCLUDES =  -I $(top_srcdir)/mab -I $(top_srcdir)/mab/common -I $(top_srcdir)/mab/mapping/include -I $(top_srcdir)/fpinfra/inc -I $(top_srcdir)/mab/mapping/mab_sid -I $(top_srcdir)/mab/protocol/include -I $(top_srcdir)/authmgr/common -I $(top_srcdir)/../wpasupplicant/sonic-wpa-supplicant/src/radius
+
+bin_PROGRAMS = mabd
+
+if DEBUG
+DBGFLAGS = -ggdb -DDEBUG
+else
+DBGFLAGS = -g -DNDEBUG
+endif
+
+mabd_SOURCES = $(top_srcdir)/mabmgr/mabmgr_main.cpp $(top_srcdir)/mabmgr/mabmgr.cpp
+
+mabd_CPPFLAGS = $(DBGFLAGS) $(AM_CFLAGS) $(CFLAGS_COMMON) $(SONIC_COMMON_CFLAGS)
+
+AM_LDFLAGS = -L$(top_srcdir)/fpinfra/ -lfpinfra
+AM_LDFLAGS += -lswsscommon -lnl-3 -lnl-route-3 -lhiredis -L$(top_srcdir)/mab/ -lmab $(SONIC_COMMON_LDFLAGS)
diff --git a/src/sonic-pac/mabmgr/mabmgr.cpp b/src/sonic-pac/mabmgr/mabmgr.cpp
new file mode 100644
index 000000000000..8ec30672bab3
--- /dev/null
+++ b/src/sonic-pac/mabmgr/mabmgr.cpp
@@ -0,0 +1,549 @@
+/*
+ * Copyright 2019 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <cstring>
+#include <string>
+#include "mabmgr.h"
+#include "mab_api.h"
+#include "mab_exports.h"
+#include "mab_include.h"
+#include "datatypes.h"
+#include "nimapi.h"
+#include <arpa/inet.h>
+#include <netdb.h>
+#include "fpSonicUtils.h"
+
+#define MABD_CMD_BUFFSZ  2048
+MabMgr *mab;
+
+const string INTFS_PREFIX = "E";
+
+MabMgr::MabMgr(DBConnector *configDb, DBConnector *stateDb, DBConnector *appDb) :
+                           m_confMabPortTbl(configDb, "MAB_PORT_CONFIG_TABLE"),
+                           m_confRadiusServerTable(configDb, "RADIUS_SERVER"),
+                           m_confRadiusGlobalTable(configDb, "RADIUS") {
+
+    Logger::linkToDbNative("mabmgr");
+    mab = this;
+}
+
+std::vector<Selectable*> MabMgr::getSelectables() {
+    vector<Selectable *> selectables{ &m_confMabPortTbl, &m_confRadiusServerTable, &m_confRadiusGlobalTable }; 
+    return selectables;
+}
+
+
+bool MabMgr::processDbEvent(Selectable *tbl) {
+
+    SWSS_LOG_DEBUG("Received a MAB Database event");
+
+    //check the source table and accordingly invoke the appropriate handlers
+
+    if (tbl == ((Selectable *) & m_confMabPortTbl)) {
+        return processMabConfigPortTblEvent(tbl);
+    }
+
+    if (tbl == ((Selectable *) & m_confRadiusServerTable)) {
+        return processRadiusServerTblEvent(tbl);
+    }
+
+    if (tbl == ((Selectable *) & m_confRadiusGlobalTable)) {
+        return processRadiusGlobalTblEvent(tbl);
+    }
+
+    SWSS_LOG_DEBUG("Received event UNKNOWN to MAB, ignoring ");
+    return false;
+}
+
+//Process the config db table events
+
+bool MabMgr::processMabConfigPortTblEvent(Selectable *tbl) 
+{
+  SWSS_LOG_ENTER();
+  SWSS_LOG_DEBUG("Received a table config event on MAB_PORT_CONFIG_TABLE table");
+
+  std::deque<KeyOpFieldsValuesTuple> entries;
+  m_confMabPortTbl.pops(entries);
+
+  SWSS_LOG_DEBUG("Received %d entries", (int) entries.size());
+
+  /* Nothing popped */
+  if (entries.empty())
+  {
+      return false;
+  }
+
+  // Check through all the data
+  for (auto entry : entries) 
+  {
+    std::string key = kfvKey(entry);
+    std::string  op = kfvOp(entry);
+    bool task_result = false;
+    uint32 intIfNum;
+
+    SWSS_LOG_DEBUG("Received %s as key and %s as OP", key.c_str(), op.c_str());
+
+    if(key.find(INTFS_PREFIX) == string::npos)
+    {
+        SWSS_LOG_NOTICE("Invalid key format. No 'E' prefix: %s", key.c_str());
+        continue;
+    }
+
+    if(fpGetIntIfNumFromHostIfName(key.c_str(), &intIfNum) !=  SUCCESS)
+    {
+        SWSS_LOG_NOTICE("Unable to get the internal interface number for %s.", key.c_str());
+        continue;
+    }
+
+    if (op == SET_COMMAND)
+        {
+            task_result = doMabPortTableSetTask(entry, intIfNum);
+        }
+        else if (op == DEL_COMMAND)
+        {
+            task_result = doMabPortTableDeleteTask(entry, intIfNum);
+        }
+        if (!task_result)
+            return false;
+     }
+     return true;
+}
+
+bool MabMgr::doMabPortTableSetTask(const KeyOpFieldsValuesTuple & t, uint32 & intIfNum)
+{
+    SWSS_LOG_ENTER();
+    const std::string & key = kfvKey(t);
+
+    // Update mabPortConfigCache cache with incoming table data
+    mabPortConfigCacheParams_t mabPortConfigCache;
+    mabPortConfigCache.mab_enable = MABMGR_MAB_PORT_ENABLE_DEF;
+    mabPortConfigCache.mab_auth_type = MABMGR_MAB_PORT_AUTH_TYPE_DEF;
+
+    for (auto item = kfvFieldsValues(t).begin(); item != kfvFieldsValues(t).end(); item++)
+    {
+        const std::string & field = fvField(*item);
+        const std::string & value = fvValue(*item);
+
+        if (field == "mab_enable")
+        {
+            if (value == "true")
+               mabPortConfigCache.mab_enable =  ENABLE;
+            else if (value == "false")
+               mabPortConfigCache.mab_enable =  DISABLE;
+            else {
+               SWSS_LOG_WARN("Invalid configuration option received for mab enable: %s", value.c_str());
+               continue;
+            }
+        }
+        if (field == "mab_auth_type")
+        {
+            if (value == "pap")
+                mabPortConfigCache.mab_auth_type=  AUTHMGR_PORT_MAB_AUTH_TYPE_PAP;
+            else if (value == "chap")
+                mabPortConfigCache.mab_auth_type =  AUTHMGR_PORT_MAB_AUTH_TYPE_CHAP;
+            else if (value == "eap-md5")
+                mabPortConfigCache.mab_auth_type =  AUTHMGR_PORT_MAB_AUTH_TYPE_EAP_MD5;
+            else {
+               SWSS_LOG_WARN("Invalid configuration option received for mab auth type: %s", value.c_str());
+               continue;
+            }
+        }
+    }
+
+    mabPortConfigTableMap::iterator iter = m_mabPortConfigMap.find(key);
+    if(iter == m_mabPortConfigMap.end())
+    {
+        m_mabPortConfigMap.insert(pair<std::string, mabPortConfigCacheParams_t>(key, mabPortConfigCache));
+        mabPortConfigTableMap::iterator iter = m_mabPortConfigMap.find(key);
+
+        if(mabPortConfigCache.mab_enable != MABMGR_MAB_PORT_ENABLE_DEF)
+        {
+            if ( SUCCESS != mabPortMABEnableSet(intIfNum, mabPortConfigCache.mab_enable))
+            {
+              iter->second.mab_enable = MABMGR_MAB_PORT_ENABLE_DEF;
+              SWSS_LOG_ERROR("Unable to enable MAB operationally.");
+            }
+        }
+        if(mabPortConfigCache.mab_auth_type != MABMGR_MAB_PORT_AUTH_TYPE_DEF)
+        {
+            if ( SUCCESS != mabPortMABAuthTypeSet(intIfNum, mabPortConfigCache.mab_auth_type))
+            {
+              iter->second.mab_auth_type = MABMGR_MAB_PORT_AUTH_TYPE_DEF;
+              SWSS_LOG_ERROR("Unable to set MAB authentication type operationally.");
+            }
+        }
+     }
+     else //Interface entry already exists in local cache, check for any parameter change for Add/Update/Delete
+     {
+        // mab_enable
+        if (((iter->second.mab_enable == MABMGR_MAB_PORT_ENABLE_DEF) &&
+            (mabPortConfigCache.mab_enable != MABMGR_MAB_PORT_ENABLE_DEF)) ||
+            ((iter->second.mab_enable != MABMGR_MAB_PORT_ENABLE_DEF) &&
+            (mabPortConfigCache.mab_enable != iter->second.mab_enable)))
+        {
+            if ( SUCCESS == mabPortMABEnableSet(intIfNum, mabPortConfigCache.mab_enable))
+            {
+              iter->second.mab_enable = mabPortConfigCache.mab_enable;
+            }
+            else
+	    {
+              SWSS_LOG_ERROR("Unable to enable/disable MAB operationally.");
+              return false;
+            }
+        }
+        // mab_auth_type
+        if (((iter->second.mab_auth_type == MABMGR_MAB_PORT_AUTH_TYPE_DEF) &&
+            (mabPortConfigCache.mab_auth_type != MABMGR_MAB_PORT_AUTH_TYPE_DEF)) ||
+            ((iter->second.mab_auth_type != MABMGR_MAB_PORT_AUTH_TYPE_DEF) &&
+            (mabPortConfigCache.mab_auth_type != iter->second.mab_auth_type)))
+        {
+            if ( SUCCESS == mabPortMABAuthTypeSet(intIfNum, mabPortConfigCache.mab_auth_type))
+            {
+              iter->second.mab_auth_type = mabPortConfigCache.mab_auth_type;
+            }
+            else
+	    {
+              SWSS_LOG_ERROR("Unable to set MAB authentication type operationally.");
+              return false;
+            }
+        }
+      }
+      return true;
+}
+
+bool MabMgr::doMabPortTableDeleteTask(const KeyOpFieldsValuesTuple & t, uint32 & intIfNum)
+{
+    SWSS_LOG_ENTER();
+    const std::string & key = kfvKey(t);
+    mabPortConfigTableMap::iterator iter = m_mabPortConfigMap.find(key);
+    if(iter != m_mabPortConfigMap.end())
+    {
+      if (iter->second.mab_enable != MABMGR_MAB_PORT_ENABLE_DEF)
+      {
+            if ( SUCCESS == mabPortMABEnableSet(intIfNum, MABMGR_MAB_PORT_ENABLE_DEF))
+            {
+                iter->second.mab_enable = MABMGR_MAB_PORT_ENABLE_DEF;
+            }
+            else
+            {
+              SWSS_LOG_ERROR("Unable to set MAB enable with default.");
+              return false;
+            }
+      }
+      if (iter->second.mab_auth_type != MABMGR_MAB_PORT_AUTH_TYPE_DEF)
+      {
+            if ( SUCCESS == mabPortMABAuthTypeSet(intIfNum, MABMGR_MAB_PORT_AUTH_TYPE_DEF))
+            {
+              iter->second.mab_auth_type = MABMGR_MAB_PORT_AUTH_TYPE_DEF;
+            }
+            else
+            {
+              SWSS_LOG_ERROR("Unable to set MAB authentication type with default.");
+              return false;
+            }
+      }
+    }
+    return true;
+}
+
+void MabMgr::updateRadiusServerGlobalKey(string newKey, string oldKey) {
+
+   SWSS_LOG_ENTER();
+   bool update = false;
+   RC_t rc =  FAILURE;
+
+   if (0 == newKey.compare(oldKey))
+   {
+      return;
+   }
+
+   for (auto& item: m_radius_info.radius_auth_server_list)
+   {
+      /* server specific is configured */
+      if (0 != item.second.server_key.size())
+      {
+         continue;
+      }
+
+      /* Check and update Radius server if using Global key */
+      if (0 != newKey.size())
+      {
+         item.second.server_update = true;
+         update = true;
+      }
+      else
+      {
+         rc = mabRadiusServerUpdate(RADIUS_MAB_SERVER_DELETE, "auth",
+                                    item.second.server_ip.c_str(),
+                                    item.second.server_priority.c_str(),
+                                    oldKey.c_str(),
+                                    item.second.server_port.c_str());
+         if ( SUCCESS != rc)
+         {
+             SWSS_LOG_ERROR("Unable to update radius server details for MAB ip = %s,  port = %s, priority = %s",
+                            item.second.server_ip.c_str(),
+                            item.second.server_port.c_str(),
+                            item.second.server_priority.c_str());
+         }
+      }
+   }
+
+   /* Due to global key change update server needed */
+   if (true == update)
+   {
+      updateRadiusServer();
+   }
+}
+
+void MabMgr::updateRadiusServer() {
+
+   SWSS_LOG_ENTER();
+   RC_t rc =  FAILURE;
+   struct addrinfo* result;
+   char ip[INET6_ADDRSTRLEN+1];
+   void * src = NULL;
+
+   SWSS_LOG_NOTICE("Deriving new RADIUS Servers for MAB");
+
+   for (auto& item: m_radius_info.radius_auth_server_list)
+   {
+       if (false == item.second.server_update)
+       {
+           SWSS_LOG_INFO("skipped %s as update not needed.", item.first.c_str());
+           continue;  
+       }
+
+       if (getaddrinfo(item.first.c_str(), NULL, NULL, &result) || result == NULL)
+       {
+           SWSS_LOG_WARN("skipped %s as it could not resolve.", item.first.c_str());
+           item.second.dns_ok = false;
+           continue;
+       }
+
+       if(result->ai_family == AF_INET)
+           src = &((struct sockaddr_in*)result->ai_addr)->sin_addr;
+       else
+           src = &((struct sockaddr_in6*)result->ai_addr)->sin6_addr;
+
+       inet_ntop(result->ai_family, src, ip, INET6_ADDRSTRLEN+1);
+       freeaddrinfo(result);
+
+       //Check if radius server has key configured. If not,
+       // pick global key. If key does not exist, skip to next server. 
+       if ((item.second.server_key  == "") && (m_radius_info.m_radiusGlobalKey == ""))
+       {
+           SWSS_LOG_WARN("skipped %s as no key is configured.", item.first.c_str());
+           continue;  
+       }
+
+       string newKey = m_radius_info.m_radiusGlobalKey; 
+       if (item.second.server_key != "")
+       {
+           newKey = item.second.server_key;
+       }
+
+       string radiusIp(ip);
+       item.second.server_ip = radiusIp;
+       
+       rc = mabRadiusServerUpdate(RADIUS_MAB_SERVER_ADD, "auth", item.second.server_ip.c_str(),
+                              item.second.server_priority.c_str(),
+                              newKey.c_str(),
+                              item.second.server_port.c_str());
+       if ( SUCCESS != rc)
+       {
+           SWSS_LOG_ERROR("Radius server update - Unable to update radius server details for MAB.");
+           return;
+       }
+       SWSS_LOG_NOTICE("Updating radius details for MAB  ip = %s,  port = %s, priority = %s", 
+                       item.second.server_ip.c_str(),
+                       item.second.server_port.c_str(),
+                       item.second.server_priority.c_str());
+       item.second.server_update = false;
+       item.second.dns_ok = true;
+   }
+   return;
+}
+
+void MabMgr::reloadRadiusServers() 
+{
+   SWSS_LOG_ENTER();
+   RC_t rc =  FAILURE;
+   bool server_update = false;
+
+   SWSS_LOG_NOTICE("Reloading RADIUS Servers for MAB");
+
+   /*Check for servers that failed DNS resolution  */
+   for (auto& item: m_radius_info.radius_auth_server_list)
+   {
+       if (false == item.second.dns_ok)
+       {
+           item.second.server_update = true;
+           server_update = true;
+       }
+   }
+
+   if (true == server_update)
+   {
+       SWSS_LOG_NOTICE("Reloading DNS failed RADIUS Servers for MAB");
+       updateRadiusServer();
+   }
+
+   rc = mabRadiusServerUpdate(RADIUS_MAB_SERVERS_RELOAD, "auth", 
+                              NULL, NULL, NULL, NULL);
+
+   if ( SUCCESS != rc)
+   {
+       SWSS_LOG_ERROR("RADIUS Servers reload - Unable to reload.");
+   }
+
+   return;
+}
+
+bool MabMgr::processRadiusServerTblEvent(Selectable *tbl) 
+{
+  SWSS_LOG_ENTER();
+  SWSS_LOG_NOTICE("Received a RADIUS_SERVER event");
+
+  deque<KeyOpFieldsValuesTuple> entries;
+  m_confRadiusServerTable.pops(entries);
+
+  SWSS_LOG_NOTICE("Received %d entries", (int) entries.size());
+
+  /* Nothing popped */
+  if (entries.empty())
+  {
+    return false;
+  }
+
+  // Check through all the data
+  for (auto entry : entries)
+  {
+    string key = kfvKey(entry);
+    string val = kfvOp(entry);
+    string cmd("");
+
+    SWSS_LOG_NOTICE("Received %s as key and %s as OP", key.c_str(), val.c_str());
+
+    if (val == SET_COMMAND)
+    {
+      SWSS_LOG_NOTICE("SET operation on RADIUS_SERVER table");
+
+      m_radius_info.radius_auth_server_list[key].server_port = "";
+      m_radius_info.radius_auth_server_list[key].server_key = "";
+      m_radius_info.radius_auth_server_list[key].server_priority = "";
+      m_radius_info.radius_auth_server_list[key].server_update = true;
+      m_radius_info.radius_auth_server_list[key].dns_ok = true;
+
+      // Look at the data that is sent for this key
+
+      for (auto i : kfvFieldsValues(entry))
+      {
+        string a = fvField(i);
+        string b = fvValue(i);
+
+        SWSS_LOG_DEBUG("Received %s as field and %s as value", a.c_str(), b.c_str());
+
+        if (a == "passkey")
+        {
+          m_radius_info.radius_auth_server_list[key].server_key = b;
+        }
+        else if (a == "auth_port")
+        {
+          m_radius_info.radius_auth_server_list[key].server_port = b; 
+        }
+        else if (a == "priority")
+        {
+          m_radius_info.radius_auth_server_list[key].server_priority = b; 
+        }
+      }
+      updateRadiusServer();
+    }
+    else if (val == DEL_COMMAND)
+    {
+      RC_t rc =  FAILURE;
+      SWSS_LOG_INFO("Delete Radius server for MAB %s ", 
+                       m_radius_info.radius_auth_server_list[key].server_ip.c_str()); 
+      // server deleted
+      rc = mabRadiusServerUpdate(RADIUS_MAB_SERVER_DELETE, "auth",
+                                 m_radius_info.radius_auth_server_list[key].server_ip.c_str(),
+                                 m_radius_info.radius_auth_server_list[key].server_priority.c_str(),
+                                 m_radius_info.radius_auth_server_list[key].server_key.c_str(),
+                                 m_radius_info.radius_auth_server_list[key].server_port.c_str());
+      if (rc !=  SUCCESS)
+      {
+         SWSS_LOG_ERROR("Radius server delete - Unable to delete radius server details for MAB.");
+      }
+      m_radius_info.radius_auth_server_list.erase(key);
+    }
+  }
+
+  return true;
+}
+
+bool MabMgr::processRadiusGlobalTblEvent(Selectable *tbl) 
+{
+  SWSS_LOG_ENTER();
+  SWSS_LOG_NOTICE("Received a RADIUS event");
+  string tmp_radiusGlobalKey(m_radius_info.m_radiusGlobalKey);
+
+  deque<KeyOpFieldsValuesTuple> entries;
+  m_confRadiusGlobalTable.pops(entries);
+
+  SWSS_LOG_NOTICE("Received %d entries", (int) entries.size());
+
+  /* Nothing popped */
+  if (entries.empty())
+  {
+    return false;
+  }
+
+  // Check through all the data
+  for (auto entry : entries)
+  {
+    string key = kfvKey(entry);
+    string val = kfvOp(entry);
+    string cmd("");
+
+    SWSS_LOG_NOTICE("Received %s as key and %s as OP", key.c_str(), val.c_str());
+
+    if (val == SET_COMMAND)
+    {
+      SWSS_LOG_NOTICE("SET operation on RADIUS table");
+
+      // Look at the data that is sent for this key
+      for (auto i : kfvFieldsValues(entry))
+      {
+        string a = fvField(i);
+        string b = fvValue(i);
+
+        SWSS_LOG_DEBUG("Received %s as field and %s as value", a.c_str(), b.c_str());
+
+        if (a == "passkey")
+        {
+          m_radius_info.m_radiusGlobalKey = b;
+        }
+      }
+    }
+    else if (val == DEL_COMMAND)
+    {
+      m_radius_info.m_radiusGlobalKey = ""; 
+    }
+  }
+
+  updateRadiusServerGlobalKey(m_radius_info.m_radiusGlobalKey, tmp_radiusGlobalKey);
+
+  return true;
+}
diff --git a/src/sonic-pac/mabmgr/mabmgr.h b/src/sonic-pac/mabmgr/mabmgr.h
new file mode 100644
index 000000000000..17bbc4a226f3
--- /dev/null
+++ b/src/sonic-pac/mabmgr/mabmgr.h
@@ -0,0 +1,97 @@
+/*
+ * Copyright 2019 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _MABMGR_H_
+#define _MABMGR_H_
+
+#include <swss/dbconnector.h>
+#include <swss/schema.h>
+#include <swss/table.h>
+#include <swss/macaddress.h>
+#include <swss/notificationproducer.h>
+#include <swss/subscriberstatetable.h>
+#include <swss/producerstatetable.h>
+#include <swss/table.h>
+#include <swss/select.h>
+#include <swss/timestamp.h>
+
+#include "redisapi.h"
+#include "auth_mgr_exports.h"
+#include "mab_exports.h"
+
+typedef struct radius_server_info_s {
+  std::string server_port;
+  std::string server_key;
+  std::string server_ip;
+  std::string server_priority;
+  bool        server_update;
+  bool        dns_ok;
+}radius_server_info_t;
+
+typedef std::map<std::string, radius_server_info_t> radius_server_info_map_t;
+
+typedef struct radius_info_s {
+  std::string m_radiusGlobalKey;
+  radius_server_info_map_t radius_auth_server_list;
+}radius_info_t;
+
+#define MABMGR_MAB_PORT_ENABLE_DEF     DISABLE
+#define MABMGR_MAB_PORT_AUTH_TYPE_DEF  AUTHMGR_PORT_MAB_AUTH_TYPE_EAP_MD5
+
+/* MAB port config table param cache Info */
+typedef struct mabPortConfigCacheParams_t {
+    bool mab_enable;
+    AUTHMGR_PORT_MAB_AUTH_TYPE_t  mab_auth_type;
+} mabPortConfigCacheParams_t;
+
+/* MAP to store MAB port config table params,
+ * Key is "interface-id" (Eg. Ethernet0)
+ * Value is "mabPortConfigCacheParams_t"
+ */
+typedef std::map<std::string, mabPortConfigCacheParams_t> mabPortConfigTableMap;
+
+using namespace swss;
+using namespace std;
+
+class MabMgr
+{ 
+public:
+    MabMgr(DBConnector *configDb, DBConnector *stateDb, DBConnector *appDb);
+    std::vector<Selectable*> getSelectables();
+    bool processDbEvent(Selectable *source);
+
+private:
+    //tables this component listens to
+    SubscriberStateTable m_confMabPortTbl;
+    SubscriberStateTable m_confRadiusServerTable;
+    SubscriberStateTable m_confRadiusGlobalTable;
+
+    radius_info_t m_radius_info;
+    mabPortConfigTableMap     m_mabPortConfigMap;
+
+    // DB Event handler functions
+    bool processMabConfigPortTblEvent(Selectable *tbl);
+    bool processRadiusServerTblEvent(Selectable *tbl);
+    bool processRadiusGlobalTblEvent(Selectable *tbl);
+    bool doMabPortTableSetTask(const KeyOpFieldsValuesTuple & t, uint32 & intIfNum);
+    bool doMabPortTableDeleteTask(const KeyOpFieldsValuesTuple & t, uint32 & intIfNum);
+
+    void updateRadiusServer();
+    void updateRadiusServerGlobalKey(std::string newKey, std::string oldKey);
+    void reloadRadiusServers() ;
+};
+
+#endif // _MABMGR_H_
diff --git a/src/sonic-pac/mabmgr/mabmgr_main.cpp b/src/sonic-pac/mabmgr/mabmgr_main.cpp
new file mode 100644
index 000000000000..4172eaf9d875
--- /dev/null
+++ b/src/sonic-pac/mabmgr/mabmgr_main.cpp
@@ -0,0 +1,101 @@
+/*
+ * Copyright 2019 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include <swss/subscriberstatetable.h>
+#include <swss/select.h>
+#include <iostream>
+#include "datatypes.h"
+#include "osapi.h"
+#include "mabmgr.h"
+#include "mab_include.h"
+#include <unistd.h>
+#include "fpinfra.h"
+
+int main(int argc, char *argv[])
+{
+    cout<<"Invoking fpinfraInit" << endl;
+    fpinfraInit();
+
+    if (mabInit () !=  SUCCESS)
+      cout<<"Fail" << endl;
+    else
+      cout<<"Success linked" << endl;
+
+    if (osapiWaitForTaskInit ( MAB_DB_TASK_SYNC,  WAIT_FOREVER) !=
+                               SUCCESS)
+    {
+      return -1;
+    }
+
+    cout<<"DB_TASK_SYNC Success" << endl;
+
+    /* Set log level MSG_DEBUG to get hostapd logs for debugging purposes
+     * Use the below values from wpa_debug.h
+     * enum { MSG_EXCESSIVE, MSG_MSGDUMP, MSG_DEBUG, MSG_INFO, MSG_WARNING, MSG_ERROR };
+     */
+   // mab_radius_server_debug_level_set(2 /*MSG_DEBUG*/);
+
+    try
+    {
+        SWSS_LOG_NOTICE("-----Starting MabMgr-----");
+        sleep(20);
+        swss::DBConnector stateDb("STATE_DB", 0);
+        swss::DBConnector configDb("CONFIG_DB", 0);
+        swss::DBConnector appDb("APPL_DB", 0);
+
+        MabMgr mab(&configDb, &stateDb, &appDb);
+
+#if 0
+        // App Marking closest UP status
+        Table feat_tbl(&stateDb, STATE_FEATURE_TABLE_NAME);
+        std::vector<FieldValueTuple> attrs;
+        FieldValueTuple up_ready_status("UP_STATUS", "True");
+        FieldValueTuple fail_reason("FAIL_REASON", "");
+        char buffer[100];
+        std::time_t rawtime;
+        struct tm *timeinfo;
+        time(&rawtime);
+        timeinfo = gmtime(&rawtime);
+        strftime(buffer, 100, "%Y-%m-%d %H:%M:%S", timeinfo);
+        FieldValueTuple time("TIME", string(buffer));
+        attrs.push_back(up_ready_status);
+        attrs.push_back(fail_reason);
+        attrs.push_back(time);
+        feat_tbl.set("mabd", attrs);
+        SWSS_LOG_NOTICE("mabd marked its UP Status to True");
+#endif
+	//register for the table events
+        swss::Select s;
+        s.addSelectables(mab.getSelectables());
+
+        //wait for the events and process them
+        while (true)
+        {
+            SWSS_LOG_NOTICE("Waiting for MAB Table Events");
+
+            swss::Selectable *sel = NULL;
+            s.select(&sel);
+
+            //Pass on the processing to the Mab Manager
+            mab.processDbEvent(sel);
+        }
+
+    }
+    catch (const exception &e)
+    {
+        SWSS_LOG_ERROR("Runtime error: %s", e.what());
+    }
+    return -1;
+}

From e8e358d9f511400269a47e1e572a382b5af19b40 Mon Sep 17 00:00:00 2001
From: anamehra <54692434+anamehra@users.noreply.github.com>
Date: Tue, 8 Oct 2024 07:15:49 -0700
Subject: [PATCH 073/364] Update cisco-8000.ini to 202405.0.7 release (#20423)

Cisco platform 202405.0.7 release

Why I did it
Cisco platform 202405.0.7 release

Work item tracking
Microsoft ADO (number only):
---
 platform/checkout/cisco-8000.ini | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/checkout/cisco-8000.ini b/platform/checkout/cisco-8000.ini
index 8723b9435341..bb495d263345 100644
--- a/platform/checkout/cisco-8000.ini
+++ b/platform/checkout/cisco-8000.ini
@@ -1,3 +1,3 @@
 [module]
 repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git
-ref=202405.0.5
+ref=202405.0.7

From 9f9d82dbd465978a389948f1f37d73f82211f07c Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Tue, 8 Oct 2024 08:02:08 -0700
Subject: [PATCH 074/364] [Mellanox] Fix retry logic on discovery of MST device
 (#20389)

- Why I did it
Fixing retry logic when MST device is discovered. The current implementation only fetches the name of the device but doesn't verify if the device is accessible which can be confirmed by querying the device and ensuring the command passes.

- How I did it
Added a query command with device as parameter and ensured it passes.

- How to verify it
Running upgrade tests.
---
 files/scripts/syncd.sh               | 19 +----------------
 platform/mellanox/mlnx-fw-upgrade.j2 | 31 ++++++++++++++++++++++------
 2 files changed, 26 insertions(+), 24 deletions(-)

diff --git a/files/scripts/syncd.sh b/files/scripts/syncd.sh
index 0930de72b87c..0c794ef5d9dc 100755
--- a/files/scripts/syncd.sh
+++ b/files/scripts/syncd.sh
@@ -2,18 +2,6 @@
 
 . /usr/local/bin/syncd_common.sh
 
-declare -r UNKN_MST="unknown"
-
-function GetMstDevice() {
-    local _MST_DEVICE="$(ls /dev/mst/*_pci_cr0 2>&1)"
-
-    if [[ ! -c "${_MST_DEVICE}" ]]; then
-        echo "${UNKN_MST}"
-    else
-        echo "${_MST_DEVICE}"
-    fi
-}
-
 function startplatform() {
 
     # platform specific tasks
@@ -36,12 +24,7 @@ function startplatform() {
         debug "Starting Firmware update procedure"
         /usr/bin/mst start --with_i2cdev
 
-        local -r _MST_DEVICE="$(GetMstDevice)"
-        if [[ "${_MST_DEVICE}" != "${UNKN_MST}" ]]; then
-            /usr/bin/flint -d $_MST_DEVICE --clear_semaphore
-        fi
-
-        /usr/bin/mlnx-fw-upgrade.sh -v
+        /usr/bin/mlnx-fw-upgrade.sh -c -v
         if [[ "$?" -ne "${EXIT_SUCCESS}" ]]; then
             debug "Failed to upgrade fw. " "$?" "Restart syncd"
             exit 1
diff --git a/platform/mellanox/mlnx-fw-upgrade.j2 b/platform/mellanox/mlnx-fw-upgrade.j2
index 6bfea7762070..00796d54b096 100755
--- a/platform/mellanox/mlnx-fw-upgrade.j2
+++ b/platform/mellanox/mlnx-fw-upgrade.j2
@@ -77,6 +77,7 @@ function PrintHelp() {
     echo "  -s, --syslog   Use syslog logger (enabled when -u|--upgrade)"
     echo "  -v, --verbose  Verbose mode (enabled when -u|--upgrade)"
     echo "  -d, --dry-run  Compare the FW versions without installation. Return code "0" means the FW is up-to-date, return code "10" means an upgrade is required, otherwise an error is detected."
+    echo "  -c, --clear-semaphore   Clear hw resources before updating firmware"
     echo "  -h, --help     Print help"
     echo
     echo "Examples:"
@@ -103,6 +104,9 @@ function ParseArguments() {
             -d|--dry-run)
                 DRY_RUN="${YES_PARAM}"
             ;;
+            -c|--clear-semaphore)
+                CLEAR_SEMAPHORE="${YES_PARAM}"
+            ;;
             -h|--help)
                 PrintHelp
                 exit "${EXIT_SUCCESS}"
@@ -210,16 +214,20 @@ function WaitForDevice() {
     local -i QUERY_RETRY_COUNT_MAX="10"
     local -i QUERY_RETRY_COUNT="0"
     local -r DEVICE_TYPE=$(GetMstDeviceType)
+    local SPC_MST_DEV
+    local QUERY_RC=""
 
-    local SPC_MST_DEV=$(GetSPCMstDevice)
-
-    while [[ ("${QUERY_RETRY_COUNT}" -lt "${QUERY_RETRY_COUNT_MAX}") && ("${SPC_MST_DEV}" == "${UNKN_MST}") ]]; do
+    while : ; do
+        SPC_MST_DEV=$(GetSPCMstDevice)
+        ${QUERY_XML} -d ${SPC_MST_DEV} -o ${QUERY_FILE}
+        QUERY_RC="$?"
+        [[ ("${QUERY_RETRY_COUNT}" -lt "${QUERY_RETRY_COUNT_MAX}") && ("${QUERY_RC}" != "${EXIT_SUCCESS}") ]] || break
         sleep 1s
         ((QUERY_RETRY_COUNT++))
-        SPC_MST_DEV=$(GetSPCMstDevice)
+        LogInfo "Retrying MST device query ${QUERY_RETRY_COUNT}"
     done
 
-    if [[ "${SPC_MST_DEV}" == "${UNKN_MST}" ]]; then
+    if [[ "${QUERY_RC}" != "${EXIT_SUCCESS}" ]]; then
         # Couldn't Detect the Spectrum ASIC. Exit failure and print the detailed information
         output=$(${QUERY_CMD})
         failure_msg="${output#*Fail : }"
@@ -265,7 +273,7 @@ function GetSPCMstDevice() {
 
     if [[ ! -c "${_MST_DEVICE}" ]]; then
         echo "${UNKN_MST}"
-    else 
+    else
         echo "${_MST_DEVICE}"
     fi
 
@@ -482,6 +490,15 @@ function Cleanup() {
     fi
 }
 
+function ClearSemaphore() {
+    if [[ "${CLEAR_SEMAPHORE}" == "${YES_PARAM}" ]]; then
+        local -r _MST_DEVICE="$(GetSPCMstDevice)"
+        if [[ "${_MST_DEVICE}" != "${UNKN_MST}" ]]; then
+            /usr/bin/flint -d $_MST_DEVICE --clear_semaphore
+        fi
+    fi
+}
+
 trap Cleanup EXIT
 
 ParseArguments "$@"
@@ -492,6 +509,8 @@ LockStateChange
 
 WaitForDevice
 
+ClearSemaphore
+
 if [ "${IMAGE_UPGRADE}" != "${YES_PARAM}" ]; then
     UpgradeFW
 else

From 287358aba2846d21e3717008dfa54f4a21c25332 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 9 Oct 2024 01:01:17 +0800
Subject: [PATCH 075/364] [submodule] Update submodule
 wpasupplicant/sonic-wpa-supplicant to the latest HEAD automatically (#20441)

#### Why I did it
src/wpasupplicant/sonic-wpa-supplicant
```
* 6153c6d52 - (HEAD -> master, origin/master, origin/HEAD) Changes to support PAC and 802.1X interaction (#89) (28 hours ago) [Vijaya Kumar Abbaraju]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/wpasupplicant/sonic-wpa-supplicant | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/wpasupplicant/sonic-wpa-supplicant b/src/wpasupplicant/sonic-wpa-supplicant
index 3c7fd8e10d0e..6153c6d52b40 160000
--- a/src/wpasupplicant/sonic-wpa-supplicant
+++ b/src/wpasupplicant/sonic-wpa-supplicant
@@ -1 +1 @@
-Subproject commit 3c7fd8e10d0e675c3cc1376206a2276e4d8e16da
+Subproject commit 6153c6d52b4056bf8b0860b343471c041cd38eea

From 50432290695539a27684a66cc8984f6d09cf93e4 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 9 Oct 2024 01:01:23 +0800
Subject: [PATCH 076/364] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20440)

#### Why I did it
src/sonic-utilities
```
* 72d1faa7 - (HEAD -> master, origin/master, origin/HEAD) Fix key error when checking for UTILITIES_UNIT_TESTING env var (#3563) (12 hours ago) [HP]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 008a078a5319..72d1faa7aedf 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 008a078a531965f589e319dab1c0b91ca13a6f28
+Subproject commit 72d1faa7aedf986f45d363838483b7398e2a4967

From 16bdefbf41bb0828c17b6c48ad18af2d796499f0 Mon Sep 17 00:00:00 2001
From: Xincun Li <147451452+xincunli-sonic@users.noreply.github.com>
Date: Tue, 8 Oct 2024 14:29:58 -0700
Subject: [PATCH 077/364] Change TTL value range (#20387)

### Why I did it

The industry standard of TTL is actually 0..255
---
 .../tests/yang_model_tests/tests/mirror_session.json      | 2 +-
 .../yang_model_tests/tests_config/mirror_session.json     | 8 ++++----
 .../yang-models/sonic-mirror-session.yang                 | 2 +-
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/mirror_session.json b/src/sonic-yang-models/tests/yang_model_tests/tests/mirror_session.json
index 0affa83c40a9..5bc6b54a0443 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/mirror_session.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/mirror_session.json
@@ -60,7 +60,7 @@
     },
     "MIRROR_ERSPAN_ENTRY_WRONG_TTL": {
         "desc": "Configuring ERSPAN entry with invalid ttl",
-        "eStr": "Invalid TTL value"
+        "eStr": "Invalid ttl value"
     },
     "MIRROR_ERSPAN_ENTRY_WRONG_TTL_TYPE": {
         "desc": "Configuring ERSPAN entry with invalid ttl",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/mirror_session.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/mirror_session.json
index 93a5afcdc76a..ac8293e88c12 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/mirror_session.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/mirror_session.json
@@ -266,7 +266,7 @@
                         "src_ip": "10.1.1.1",
                         "gre_type": "0x1234",
                         "dscp": "10",
-                        "ttl": "65"
+                        "ttl": "256"
                     }
                 ]
             }
@@ -283,7 +283,7 @@
                         "src_ip": "10.1.1.1",
                         "gre_type": "0x1234",
                         "dscp": "10",
-                        "ttl": "63"
+                        "ttl": "255"
                     }
                 ]
             }
@@ -315,7 +315,7 @@
                         "src_ip": "10.1.1.1",
                         "gre_type": "0x1234",
                         "dscp": "10",
-                        "ttl": "63",
+                        "ttl": "255",
                         "src_port": "Ethernet0"
                     }
                 ]
@@ -343,7 +343,7 @@
                         "src_ip": "10.1.1.1",
                         "gre_type": "0x1234",
                         "dscp": "10",
-                        "ttl": "63",
+                        "ttl": "255",
                         "src_port": "PortChannel5"
                     }
                 ]
diff --git a/src/sonic-yang-models/yang-models/sonic-mirror-session.yang b/src/sonic-yang-models/yang-models/sonic-mirror-session.yang
index b3e82f2d0c67..b0f695fbe9c5 100644
--- a/src/sonic-yang-models/yang-models/sonic-mirror-session.yang
+++ b/src/sonic-yang-models/yang-models/sonic-mirror-session.yang
@@ -125,7 +125,7 @@ module sonic-mirror-session {
                 leaf ttl {
                     when "current()/../type = 'ERSPAN'";
                     type uint8 {
-                        range "0..63" {
+                        range "0..255" {
                             error-message "Invalid TTL value";
                             error-app-tag ttl-invalid;
                         }

From c2f37a65b9a2c1636708fcb12a7ac1f7eec3dcfb Mon Sep 17 00:00:00 2001
From: Nonodark Huang <ef67891@yahoo.com.tw>
Date: Wed, 9 Oct 2024 06:56:33 +0800
Subject: [PATCH 078/364] Update the transceiver control virtual address to
 avoid an address conflict with SPD (#19759)

Why I did it
Update the transceiver control virtual address to avoid an address conflict with SPD

s6301-56st
s7801-54xs
s8901-54xc
s9110-32x

How I did it
Update the PDDF config files.

How to verify it
Run the PDDF commands and show commands to check the sysfs and transceiver status.

s6301-56st.txt
---
 .../pddf/pddf-device.json                     |  16 +--
 .../pddf/pddf-device.json                     | 108 +++++++++---------
 .../pddf/pddf-device.json                     | 108 +++++++++---------
 .../pddf/pddf-device-beta.json                |  66 +++++------
 .../pddf/pddf-device-pvt.json                 |  66 +++++------
 5 files changed, 182 insertions(+), 182 deletions(-)

diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json
index 5f906161fe21..58aa6892210b 100644
--- a/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json
+++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json
@@ -1603,7 +1603,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0xA",
-                "dev_addr": "0x54",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -1702,7 +1702,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0xB",
-                "dev_addr": "0x54",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -1801,7 +1801,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0xC",
-                "dev_addr": "0x54",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -1900,7 +1900,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0xD",
-                "dev_addr": "0x54",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -1999,7 +1999,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0xE",
-                "dev_addr": "0x54",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2098,7 +2098,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0xF",
-                "dev_addr": "0x54",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2197,7 +2197,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x10",
-                "dev_addr": "0x54",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2296,7 +2296,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x11",
-                "dev_addr": "0x54",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pddf-device.json
index 640a61800ed4..02a174049b37 100644
--- a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pddf-device.json
+++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pddf-device.json
@@ -2594,7 +2594,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1a",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2693,7 +2693,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1b",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2792,7 +2792,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1c",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2891,7 +2891,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1d",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2990,7 +2990,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1e",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3089,7 +3089,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1f",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3188,7 +3188,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x20",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3287,7 +3287,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x21",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3386,7 +3386,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x22",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3485,7 +3485,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x23",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3584,7 +3584,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x24",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3683,7 +3683,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x25",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3782,7 +3782,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x26",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3881,7 +3881,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x27",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3980,7 +3980,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x28",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4079,7 +4079,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x29",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4178,7 +4178,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2a",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4277,7 +4277,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2b",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4376,7 +4376,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2c",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4475,7 +4475,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2d",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4574,7 +4574,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2e",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4673,7 +4673,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2f",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4772,7 +4772,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x30",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4871,7 +4871,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x31",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4970,7 +4970,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x32",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -5069,7 +5069,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x33",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -5168,7 +5168,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x34",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -5267,7 +5267,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x35",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -5366,7 +5366,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x36",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -5465,7 +5465,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x37",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -5564,7 +5564,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x38",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -5663,7 +5663,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x39",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -5762,7 +5762,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x3a",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -5861,7 +5861,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x3b",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -5960,7 +5960,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x3c",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -6059,7 +6059,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x3d",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -6158,7 +6158,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x3e",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -6257,7 +6257,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x3f",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -6356,7 +6356,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x40",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -6455,7 +6455,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x41",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -6554,7 +6554,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x42",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -6653,7 +6653,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x43",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -6752,7 +6752,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x44",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -6851,7 +6851,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x45",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -6950,7 +6950,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x46",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -7049,7 +7049,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x47",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -7148,7 +7148,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x48",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -7247,7 +7247,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x49",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -7346,7 +7346,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x4a",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -7445,7 +7445,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x4b",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -7544,7 +7544,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x4c",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -7643,7 +7643,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x4d",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -7742,7 +7742,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x4e",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -7841,7 +7841,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x4f",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pddf-device.json
index 2fb21d277e57..e896471151db 100644
--- a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pddf-device.json
+++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pddf-device.json
@@ -2594,7 +2594,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1a",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2693,7 +2693,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1b",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2792,7 +2792,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1c",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2891,7 +2891,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1d",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2990,7 +2990,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1e",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3089,7 +3089,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1f",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3188,7 +3188,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x20",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3287,7 +3287,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x21",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3386,7 +3386,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x22",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3485,7 +3485,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x23",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3584,7 +3584,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x24",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3683,7 +3683,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x25",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3782,7 +3782,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x26",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3881,7 +3881,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x27",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3980,7 +3980,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x28",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4079,7 +4079,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x29",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4178,7 +4178,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2a",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4277,7 +4277,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2b",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4376,7 +4376,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2c",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4475,7 +4475,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2d",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4574,7 +4574,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2e",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4673,7 +4673,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2f",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4772,7 +4772,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x30",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4871,7 +4871,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x31",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4970,7 +4970,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x32",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -5069,7 +5069,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x33",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -5168,7 +5168,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x34",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -5267,7 +5267,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x35",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -5366,7 +5366,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x36",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -5465,7 +5465,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x37",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -5564,7 +5564,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x38",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -5663,7 +5663,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x39",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -5762,7 +5762,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x3a",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -5861,7 +5861,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x3b",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -5960,7 +5960,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x3c",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -6059,7 +6059,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x3d",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -6158,7 +6158,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x3e",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -6257,7 +6257,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x3f",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -6356,7 +6356,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x40",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -6455,7 +6455,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x41",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -6554,7 +6554,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x42",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -6653,7 +6653,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x43",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -6752,7 +6752,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x44",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -6851,7 +6851,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x45",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -6950,7 +6950,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x46",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -7049,7 +7049,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x47",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -7148,7 +7148,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x48",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -7247,7 +7247,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x49",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -7346,7 +7346,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x4a",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -7445,7 +7445,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x4b",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -7544,7 +7544,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x4c",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -7643,7 +7643,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x4d",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -7742,7 +7742,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x4e",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -7841,7 +7841,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x4f",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-beta.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-beta.json
index aafa6cc81447..9b785d47a81f 100644
--- a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-beta.json
+++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-beta.json
@@ -1451,7 +1451,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x12",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -1550,7 +1550,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x13",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -1649,7 +1649,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x14",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -1748,7 +1748,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x15",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -1847,7 +1847,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x16",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -1946,7 +1946,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x17",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2045,7 +2045,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x18",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2144,7 +2144,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x19",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2243,7 +2243,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1A",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2342,7 +2342,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1B",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2441,7 +2441,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1C",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2540,7 +2540,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1D",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2639,7 +2639,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1E",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2738,7 +2738,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1F",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2837,7 +2837,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x20",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2936,7 +2936,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x21",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3035,7 +3035,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x22",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3134,7 +3134,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x23",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3233,7 +3233,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x24",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3332,7 +3332,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x25",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3431,7 +3431,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x26",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3530,7 +3530,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x27",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3629,7 +3629,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x28",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3728,7 +3728,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x29",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3827,7 +3827,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2A",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3926,7 +3926,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2B",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4025,7 +4025,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2C",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4124,7 +4124,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2D",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4223,7 +4223,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2E",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4322,7 +4322,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2F",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4421,7 +4421,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x30",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4520,7 +4520,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x31",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4619,7 +4619,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x33",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json
index dec149491308..9e65e4f73347 100644
--- a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json
+++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json
@@ -1407,7 +1407,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x12",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -1506,7 +1506,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x13",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -1605,7 +1605,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x14",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -1704,7 +1704,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x15",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -1803,7 +1803,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x16",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -1902,7 +1902,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x17",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2001,7 +2001,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x18",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2100,7 +2100,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x19",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2199,7 +2199,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1A",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2298,7 +2298,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1B",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2397,7 +2397,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1C",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2496,7 +2496,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1D",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2595,7 +2595,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1E",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2694,7 +2694,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x1F",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2793,7 +2793,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x20",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2892,7 +2892,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x21",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -2991,7 +2991,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x22",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3090,7 +3090,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x23",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3189,7 +3189,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x24",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3288,7 +3288,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x25",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3387,7 +3387,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x26",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3486,7 +3486,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x27",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3585,7 +3585,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x28",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3684,7 +3684,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x29",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3783,7 +3783,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2A",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3882,7 +3882,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2B",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -3981,7 +3981,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2C",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4080,7 +4080,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2D",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4179,7 +4179,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2E",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4278,7 +4278,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x2F",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4377,7 +4377,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x30",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4476,7 +4476,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x31",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [
@@ -4575,7 +4575,7 @@
         "i2c": {
             "topo_info": {
                 "parent_bus": "0x33",
-                "dev_addr": "0x53",
+                "dev_addr": "0x5f",
                 "dev_type": "pddf_xcvr"
             },
             "attr_list": [

From ffb9bc0212803f94487b7a6b43b4658aac81d045 Mon Sep 17 00:00:00 2001
From: zitingguo-ms <zitingguo@microsoft.com>
Date: Tue, 8 Oct 2024 22:36:52 -0700
Subject: [PATCH 079/364] [Broadcom] Upgrade Broadcom xgs SAI to 11.2.4.1
 (#20101)

Why I did it
Upgrade xgs SAI version to 11.2.4.1

Work item tracking
Microsoft ADO (number only): 29003011
How I did it
Upgrade xgs SAI and saibcm-modules to 11.2

How to verify it
Load image on DUT and run test.
https://elastictest.org/scheduler/testplan/66eabf21349061778cb0c987

Signed-off-by: zitingguo-ms zitingguo@microsoft.com
---
 platform/broadcom/sai-modules.mk              |     2 +-
 platform/broadcom/sai.mk                      |     4 +-
 .../broadcom/saibcm-modules/debian/changelog  |     6 +
 .../broadcom/saibcm-modules/include/ibde.h    |     3 +-
 .../broadcom/saibcm-modules/include/kcom.h    |    38 +-
 .../saibcm-modules/include/sal/core/sync.h    |    46 -
 .../saibcm-modules/include/sal/core/thread.h  |    38 -
 .../saibcm-modules/include/sal/types.h        |     5 +-
 .../saibcm-modules/include/sdk_config.h       |     3 +-
 .../saibcm-modules/include/soc/devids.h       |    35 +-
 .../broadcom/saibcm-modules/make/Make.clang   |    69 +
 .../broadcom/saibcm-modules/make/Make.config  |     3 +-
 .../broadcom/saibcm-modules/make/Make.depend  |     3 +-
 .../broadcom/saibcm-modules/make/Make.kernlib |     3 +-
 .../broadcom/saibcm-modules/make/Make.lib     |     3 +-
 .../broadcom/saibcm-modules/make/Make.linux   |     3 +-
 .../broadcom/saibcm-modules/make/Make.subdirs |     3 +-
 .../broadcom/saibcm-modules/make/Make.tools   |     3 +-
 .../saibcm-modules/make/Makefile.linux-gts    |     3 +-
 .../saibcm-modules/make/Makefile.linux-iproc  |    20 +-
 .../make/Makefile.linux-iproc-3_14            |     3 +-
 .../make/Makefile.linux-iproc-4_4             |     3 +-
 .../make/Makefile.linux-iproc_64              |    21 +-
 .../saibcm-modules/make/Makefile.linux-kernel |     3 +-
 .../make/Makefile.linux-kernel-2_6            |     3 +-
 .../make/Makefile.linux-kernel-3_6            |     3 +-
 .../make/Makefile.linux-kernel-4_18           |   161 +
 .../make/Makefile.linux-kernel-4_4            |     3 +-
 .../make/Makefile.linux-kmodule               |    55 +-
 .../saibcm-modules/make/Makefile.linux-slk    |    11 +-
 .../make/Makefile.linux-x86-5_10              |   262 +
 .../make/Makefile.linux-x86-64-fc28           |   270 +
 .../make/Makefile.linux-x86-common-2_6        |     3 +-
 .../Makefile.linux-x86-generic-common-2_6     |     3 +-
 .../Makefile.linux-x86-smp_generic_64-2_6     |     3 +-
 .../saibcm-modules/make/Makefile.linux-xlr    |     3 +-
 .../broadcom/saibcm-modules/sdklt/Makefile    |     6 +-
 .../bcm56080_a0/bcm56080_a0_pdma_attach.c     |     4 +-
 .../bcm56690_a0/bcm56690_a0_pdma_attach.c     |     4 +-
 .../bcm56780_a0/bcm56780_a0_pdma_attach.c     |     4 +-
 .../bcm56880_a0/bcm56880_a0_pdma_attach.c     |     4 +-
 .../bcm56890_a0/bcm56890_a0_pdma_attach.c     |     4 +-
 .../bcm56990_a0/bcm56990_a0_pdma_attach.c     |     4 +-
 .../bcm56990_b0/bcm56990_b0_pdma_attach.c     |     4 +-
 .../bcm56996_a0/bcm56996_a0_pdma_attach.c     |     4 +-
 .../bcm56996_b0/bcm56996_b0_pdma_attach.c     |     4 +-
 .../bcm56998_a0/bcm56998_a0_pdma_attach.c     |     4 +-
 .../bcm56999_a0/bcm56999_a0_pdma_attach.c     |     4 +-
 .../bcm78800_a0/bcm78800_a0_pdma_attach.c     |    38 +
 .../bcm78900_b0/bcm78900_b0_pdma_attach.c     |     4 +-
 .../bcm78905_a0/bcm78905_a0_pdma_attach.c     |     4 +-
 .../bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c |    15 +-
 .../hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c       |     4 +-
 .../hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c      |     4 +-
 .../bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c |    38 +-
 .../hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c       |     4 +-
 .../bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c |     4 +-
 .../hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c       |     4 +-
 .../bcmcnet/include/bcmcnet/bcmcnet_cmicd.h   |     4 +-
 .../bcmcnet/include/bcmcnet/bcmcnet_cmicr.h   |     4 +-
 .../bcmcnet/include/bcmcnet/bcmcnet_cmicr2.h  |     4 +-
 .../include/bcmcnet/bcmcnet_cmicr_acc.h       |     4 +-
 .../bcmcnet/include/bcmcnet/bcmcnet_cmicx.h   |     4 +-
 .../bcmcnet/include/bcmcnet/bcmcnet_core.h    |    11 +-
 .../bcmcnet/include/bcmcnet/bcmcnet_dev.h     |    17 +-
 .../include/bcmcnet/bcmcnet_internal.h        |     4 +-
 .../bcmcnet/include/bcmcnet/bcmcnet_rxtx.h    |     4 +-
 .../bcmcnet/include/bcmcnet/bcmcnet_types.h   |     4 +-
 .../sdklt/bcmcnet/main/bcmcnet_core.c         |     4 +-
 .../sdklt/bcmcnet/main/bcmcnet_dev.c          |     4 +-
 .../sdklt/bcmcnet/main/bcmcnet_rxtx.c         |    54 +-
 .../bcmdrd/include/bcmdrd/bcmdrd_devlist.h    |    58 +-
 .../include/bcmdrd/bcmdrd_symbol_types.h      |     7 +-
 .../bcmdrd/include/bcmdrd/bcmdrd_symbols.h    |     4 +-
 .../bcmdrd/include/bcmdrd/bcmdrd_types.h      |    12 +-
 .../sdklt/bcmdrd/include/bcmdrd_config.h      |    20 +-
 .../bcmdrd/include/bcmdrd_config_chips.h      |   111 +-
 .../sdklt/bcmlrd/include/bcmlrd/bcmlrd_conf.h |   165 +
 .../bcmlrd/include/bcmlrd/bcmlrd_id_types.h   |    44 +
 .../include/bcmlrd/bcmlrd_local_types.h       |   127 -
 .../include/bcmlrd/bcmlrd_match_id_db.h       |   367 +
 .../bcmlrd/include/bcmlrd/bcmlrd_variant.h    |     4 +-
 .../include/bcmlrd/chip/bcmlrd_chip_variant.h |     4 +-
 .../chip/generated/bcmlrd_variant_defs.h      |     4 +-
 .../generated/bcmlrd_variant_defs_internal.h  |    24 +-
 .../chip/generated/bcmlrd_variant_limits.h    |     4 +-
 .../bcm56080_a0/bcm56080_a0_lrd_variant_def.h |     4 +-
 .../bcm56690_a0/bcm56690_a0_lrd_variant_def.h |     4 +-
 ...m56690_a0_dna_6_5_29_0_1_lrd_variant_def.h |     4 +-
 .../bcm56780_a0/bcm56780_a0_lrd_variant_def.h |     4 +-
 ...56780_a0_cna_6_5_30_2_0_lrd_variant_def.h} |    12 +-
 ...56780_a0_dna_6_5_30_2_0_lrd_variant_def.h} |    12 +-
 ...56780_a0_hna_6_5_30_6_0_lrd_variant_def.h} |    12 +-
 .../bcm56880_a0/bcm56880_a0_lrd_variant_def.h |     4 +-
 ...bcm56880_a0_dna_4_11_4_0_lrd_variant_def.h |    36 -
 ...m56880_a0_dna_6_5_30_1_1_lrd_variant_def.h |    36 +
 ...m56880_a0_hna_6_5_29_2_2_lrd_variant_def.h |    36 -
 ...m56880_a0_hna_6_5_30_3_0_lrd_variant_def.h |    36 +
 ...m56880_a0_nfa_6_5_30_1_1_lrd_variant_def.h |    36 +
 .../bcm56890_a0/bcm56890_a0_lrd_variant_def.h |     4 +-
 ...m56890_a0_cna_6_5_30_2_0_lrd_variant_def.h |    36 +
 ...m56890_a0_dna_6_5_29_1_2_lrd_variant_def.h |    36 -
 ...m56890_a0_dna_6_5_30_8_0_lrd_variant_def.h |    36 +
 .../bcm56990_a0/bcm56990_a0_lrd_variant_def.h |     4 +-
 .../bcm56990_b0/bcm56990_b0_lrd_variant_def.h |     4 +-
 .../bcm56996_a0/bcm56996_a0_lrd_variant_def.h |     4 +-
 .../bcm56996_b0/bcm56996_b0_lrd_variant_def.h |     4 +-
 .../bcm56998_a0/bcm56998_a0_lrd_variant_def.h |     4 +-
 .../bcm56999_a0/bcm56999_a0_lrd_variant_def.h |     4 +-
 .../bcm78800_a0_lrd_variant_def.h}            |    12 +-
 ...m78800_a0_dna_6_5_30_3_1_lrd_variant_def.h |    36 +
 .../bcm78900_b0/bcm78900_b0_lrd_variant_def.h |     4 +-
 .../bcm78905_a0/bcm78905_a0_lrd_variant_def.h |     4 +-
 .../bcmltd/include/bcmltd/bcmltd_id_types.h   |    59 +
 .../bcmltd/include/bcmltd/bcmltd_variant.h    |     4 +-
 .../include/bcmltd/chip/bcmltd_chip_variant.h |     4 +-
 .../include/bcmltd/chip/bcmltd_variant_defs.h |     4 +-
 .../chip/generated/bcmltd_config_variant.h    |     4 +-
 .../bcmltd_config_variant_internal.h          |    24 +-
 .../chip/generated/bcmltd_variant_defs.h      |     4 +-
 .../generated/bcmltd_variant_defs_internal.h  |    24 +-
 .../chip/generated/bcmltd_variant_entry.h     |    24 +-
 .../chip/generated/bcmltd_variant_limits.h    |     4 +-
 .../bcm56080_a0_ltd_config_variant.h          |     4 +-
 .../bcm56690_a0_ltd_config_variant.h          |     4 +-
 ...690_a0_dna_6_5_29_0_1_ltd_config_variant.h |     4 +-
 .../bcm56780_a0_ltd_config_variant.h          |     4 +-
 ...80_a0_cna_6_5_30_2_0_ltd_config_variant.h} |    20 +-
 ...80_a0_dna_6_5_30_2_0_ltd_config_variant.h} |    20 +-
 ...80_a0_hna_6_5_30_6_0_ltd_config_variant.h} |    20 +-
 .../bcm56880_a0_ltd_config_variant.h          |     4 +-
 ...80_a0_dna_6_5_30_1_1_ltd_config_variant.h} |    20 +-
 ...80_a0_hna_6_5_30_3_0_ltd_config_variant.h} |    20 +-
 ...m56880_a0_nfa_2_1_7_0_ltd_config_variant.h |    49 -
 ...80_a0_nfa_6_5_30_1_1_ltd_config_variant.h} |    20 +-
 .../bcm56890_a0_ltd_config_variant.h          |     4 +-
 ...90_a0_cna_6_5_30_2_0_ltd_config_variant.h} |    20 +-
 ...90_a0_dna_6_5_30_8_0_ltd_config_variant.h} |    20 +-
 .../bcm56990_a0_ltd_config_variant.h          |     4 +-
 .../bcm56990_b0_ltd_config_variant.h          |     4 +-
 .../bcm56996_a0_ltd_config_variant.h          |     4 +-
 .../bcm56996_b0_ltd_config_variant.h          |     4 +-
 .../bcm56998_a0_ltd_config_variant.h          |     4 +-
 .../bcm56999_a0_ltd_config_variant.h          |     4 +-
 .../bcm78800_a0_ltd_config_variant.h          |    45 +
 ...00_a0_dna_6_5_30_3_1_ltd_config_variant.h} |    28 +-
 .../bcm78900_b0_ltd_config_variant.h          |     6 +-
 .../bcm78905_a0_ltd_config_variant.h          |     6 +-
 .../bcm56080_a0/bcm56080_a0_ltd_variant_def.h |     4 +-
 .../bcm56690_a0/bcm56690_a0_ltd_variant_def.h |     4 +-
 ...m56690_a0_dna_6_5_29_0_1_ltd_variant_def.h |     6 +-
 .../bcm56780_a0/bcm56780_a0_ltd_variant_def.h |     4 +-
 .../bcm56780_a0_cna_6_5_29_ltd_variant_def.h  |    37 -
 ...56780_a0_cna_6_5_30_2_0_ltd_variant_def.h} |    13 +-
 .../bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h |    37 -
 ...56780_a0_dna_6_5_30_2_0_ltd_variant_def.h} |    13 +-
 ...m56780_a0_hna_6_5_29_2_1_ltd_variant_def.h |    37 -
 ...m56780_a0_hna_6_5_30_6_0_ltd_variant_def.h |    37 +
 ...bcm56780_a0_ina_2_6_11_0_ltd_variant_def.h |    37 -
 .../bcm56880_a0/bcm56880_a0_ltd_variant_def.h |     4 +-
 .../bcm56880_a0_cna_6_5_29_ltd_variant_def.h  |    37 -
 ...bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h |    37 -
 ...m56880_a0_dna_6_5_30_1_1_ltd_variant_def.h |    37 +
 ...m56880_a0_hna_6_5_29_2_2_ltd_variant_def.h |    37 -
 ...m56880_a0_hna_6_5_30_3_0_ltd_variant_def.h |    37 +
 .../bcm56880_a0_nfa_2_1_7_0_ltd_variant_def.h |    37 -
 ...m56880_a0_nfa_6_5_30_1_1_ltd_variant_def.h |    37 +
 .../bcm56890_a0/bcm56890_a0_ltd_variant_def.h |     4 +-
 .../bcm56890_a0_cna_6_5_29_ltd_variant_def.h  |    37 -
 ...m56890_a0_cna_6_5_30_2_0_ltd_variant_def.h |    37 +
 ...m56890_a0_dna_6_5_29_1_2_ltd_variant_def.h |    37 -
 ...m56890_a0_dna_6_5_30_8_0_ltd_variant_def.h |    37 +
 .../bcm56990_a0/bcm56990_a0_ltd_variant_def.h |     4 +-
 .../bcm56990_b0/bcm56990_b0_ltd_variant_def.h |     4 +-
 .../bcm56996_a0/bcm56996_a0_ltd_variant_def.h |     4 +-
 .../bcm56996_b0/bcm56996_b0_ltd_variant_def.h |     4 +-
 .../bcm56998_a0/bcm56998_a0_ltd_variant_def.h |     4 +-
 .../bcm56999_a0/bcm56999_a0_ltd_variant_def.h |     4 +-
 .../bcm78800_a0_ltd_variant_def.h}            |    13 +-
 ...m78800_a0_dna_6_5_30_3_1_ltd_variant_def.h |    37 +
 .../bcm78900_b0/bcm78900_b0_ltd_variant_def.h |     6 +-
 .../bcm78905_a0/bcm78905_a0_ltd_variant_def.h |     6 +-
 .../bcm56080_a0_ltd_variant_entry.h           |     4 +-
 .../bcm56690_a0_ltd_variant_entry.h           |     4 +-
 ...6690_a0_dna_6_5_29_0_1_ltd_variant_entry.h |     4 +-
 .../bcm56780_a0_ltd_variant_entry.h           |     4 +-
 ...bcm56780_a0_cna_6_5_29_ltd_variant_entry.h |    40 -
 ...780_a0_cna_6_5_30_2_0_ltd_variant_entry.h} |    16 +-
 ...cm56780_a0_dna_2_9_5_0_ltd_variant_entry.h |    40 -
 ...780_a0_dna_6_5_30_2_0_ltd_variant_entry.h} |    16 +-
 ...780_a0_hna_6_5_30_6_0_ltd_variant_entry.h} |    16 +-
 .../bcm56880_a0_ltd_variant_entry.h           |     4 +-
 ...bcm56880_a0_cna_6_5_29_ltd_variant_entry.h |    40 -
 ...m56880_a0_dna_4_11_4_0_ltd_variant_entry.h |    40 -
 ...880_a0_dna_6_5_30_1_1_ltd_variant_entry.h} |    16 +-
 ...6880_a0_hna_6_5_30_3_0_ltd_variant_entry.h |    40 +
 ...cm56880_a0_nfa_2_1_7_0_ltd_variant_entry.h |    40 -
 ...6880_a0_nfa_6_5_30_1_1_ltd_variant_entry.h |    40 +
 .../bcm56890_a0_ltd_variant_entry.h           |     4 +-
 ...bcm56890_a0_cna_6_5_29_ltd_variant_entry.h |    40 -
 ...6890_a0_cna_6_5_30_2_0_ltd_variant_entry.h |    40 +
 ...6890_a0_dna_6_5_30_8_0_ltd_variant_entry.h |    40 +
 .../bcm56990_a0_ltd_variant_entry.h           |     4 +-
 .../bcm56990_b0_ltd_variant_entry.h           |     4 +-
 .../bcm56996_a0_ltd_variant_entry.h           |     4 +-
 .../bcm56996_b0_ltd_variant_entry.h           |     4 +-
 .../bcm56998_a0_ltd_variant_entry.h           |     4 +-
 .../bcm56999_a0_ltd_variant_entry.h           |     4 +-
 .../bcm78800_a0_ltd_variant_entry.h           |    40 +
 ...8800_a0_dna_6_5_30_3_1_ltd_variant_entry.h |    40 +
 .../bcm78900_b0_ltd_variant_entry.h           |     4 +-
 .../bcm78905_a0_ltd_variant_entry.h           |     4 +-
 .../chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c  |    18 +-
 .../chip/bcm56080_a0/bcm56080_a0_pkt_rxpmd.c  |    19 +-
 .../chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c  |    20 +-
 .../chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c  |    18 +-
 .../chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd.c  |    19 +-
 .../bcm56690_a0/bcm56690_a0_pkt_rxpmd_field.c |     4 +-
 .../chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c  |    20 +-
 .../chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c  |    18 +-
 .../chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd.c  |    19 +-
 .../bcm56780_a0/bcm56780_a0_pkt_rxpmd_field.c |     4 +-
 .../chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c  |    20 +-
 .../chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c  |    18 +-
 .../chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd.c  |    19 +-
 .../bcm56880_a0/bcm56880_a0_pkt_rxpmd_field.c |     4 +-
 .../chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c  |    20 +-
 .../chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c  |    18 +-
 .../chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd.c  |    19 +-
 .../bcm56890_a0/bcm56890_a0_pkt_rxpmd_field.c |     4 +-
 .../chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c  |    20 +-
 .../chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c  |    18 +-
 .../chip/bcm56990_a0/bcm56990_a0_pkt_rxpmd.c  |    19 +-
 .../chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c  |    20 +-
 .../chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c  |    18 +-
 .../chip/bcm56990_b0/bcm56990_b0_pkt_rxpmd.c  |    19 +-
 .../chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c  |    20 +-
 .../chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c  |    18 +-
 .../chip/bcm56996_a0/bcm56996_a0_pkt_rxpmd.c  |    19 +-
 .../chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c  |    20 +-
 .../chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c  |    18 +-
 .../chip/bcm56996_b0/bcm56996_b0_pkt_rxpmd.c  |    19 +-
 .../chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c  |    20 +-
 .../chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c  |    18 +-
 .../chip/bcm56998_a0/bcm56998_a0_pkt_rxpmd.c  |    19 +-
 .../chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c  |    20 +-
 .../chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c  |    18 +-
 .../chip/bcm56999_a0/bcm56999_a0_pkt_rxpmd.c  |    19 +-
 .../chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c  |    20 +-
 .../chip/bcm78800_a0/bcm78800_a0_pkt_lbhdr.c  |   181 +
 .../chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd.c  |   559 +
 .../bcm78800_a0/bcm78800_a0_pkt_rxpmd_field.c |   108 +
 .../chip/bcm78800_a0/bcm78800_a0_pkt_txpmd.c  |   659 +
 .../chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c  |    18 +-
 .../chip/bcm78900_b0/bcm78900_b0_pkt_rxpmd.c  |    19 +-
 .../chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c  |    20 +-
 .../chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c  |    18 +-
 .../chip/bcm78905_a0/bcm78905_a0_pkt_rxpmd.c  |    19 +-
 .../chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c  |    20 +-
 .../sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c     |    78 +-
 .../bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h    |    41 +-
 .../include/bcmpkt/bcmpkt_flexhdr_field.h     |     4 +-
 .../include/bcmpkt/bcmpkt_flexhdr_internal.h  |     4 +-
 .../sdklt/bcmpkt/include/bcmpkt/bcmpkt_hg3.h  |     4 +-
 .../bcmpkt/include/bcmpkt/bcmpkt_higig_defs.h |     4 +-
 .../bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h      |     4 +-
 .../bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h |    24 +-
 .../include/bcmpkt/bcmpkt_lbhdr_field.h       |     4 +-
 .../include/bcmpkt/bcmpkt_lbhdr_internal.h    |     4 +-
 .../sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h  |     4 +-
 .../include/bcmpkt/bcmpkt_pmd_internal.h      |     4 +-
 .../bcmpkt/include/bcmpkt/bcmpkt_rcpu_hdr.h   |     4 +-
 .../bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h      |     7 +-
 .../bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h |    38 +-
 .../bcmpkt/include/bcmpkt/bcmpkt_rxpmd_fid.h  |     4 +-
 .../include/bcmpkt/bcmpkt_rxpmd_field.h       |     4 +-
 .../include/bcmpkt/bcmpkt_rxpmd_internal.h    |     4 +-
 .../include/bcmpkt/bcmpkt_rxpmd_match_id.h    |     6 +-
 .../bcmpkt/bcmpkt_rxpmd_match_id_defs.h       |     4 +-
 .../bcmpkt/include/bcmpkt/bcmpkt_txpmd.h      |     4 +-
 .../bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h |    29 +-
 .../include/bcmpkt/bcmpkt_txpmd_field.h       |     4 +-
 .../include/bcmpkt/bcmpkt_txpmd_internal.h    |     4 +-
 .../sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h |    29 +-
 .../bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h    |     4 +-
 .../bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h    |     4 +-
 .../bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h    |     4 +-
 .../bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h    |     4 +-
 .../bcm78800_a0/bcmpkt_bcm78800_a0_rxpmd.h    |    60 +
 ...cm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr.h |     4 +-
 ...90_a0_dna_6_5_29_0_1_bcmpkt_flexhdr_data.h |     4 +-
 ...a0_dna_6_5_29_0_1_bcmpkt_rxpmd_flex_data.h |     4 +-
 ...na_6_5_29_0_1_bcmpkt_rxpmd_match_id_defs.h |     4 +-
 .../bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr.h   |    96 -
 ...m56780_a0_cna_6_5_29_bcmpkt_flexhdr_data.h |   592 -
 ...780_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h |   124 -
 ...a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h |   213 -
 ...cm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h |    96 +
 ...80_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h |   592 +
 ...a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h |   124 +
 ...na_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h |   213 +
 .../bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr.h  |   180 -
 ...56780_a0_dna_2_9_5_0_bcmpkt_flexhdr_data.h |  1343 --
 ...80_a0_dna_2_9_5_0_bcmpkt_rxpmd_flex_data.h |   180 -
 ...0_dna_2_9_5_0_bcmpkt_rxpmd_match_id_defs.h |   415 -
 ...cm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr.h |   180 +
 ...80_a0_dna_6_5_30_2_0_bcmpkt_flexhdr_data.h |  1343 ++
 ...a0_dna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h |   180 +
 ...na_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h |   417 +
 ...cm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr.h |   174 -
 ...80_a0_hna_6_5_29_2_1_bcmpkt_flexhdr_data.h |  1258 --
 ...a0_hna_6_5_29_2_1_bcmpkt_rxpmd_flex_data.h |   181 -
 ...na_6_5_29_2_1_bcmpkt_rxpmd_match_id_defs.h |   405 -
 ...cm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr.h |   174 +
 ...80_a0_hna_6_5_30_6_0_bcmpkt_flexhdr_data.h |  1258 ++
 ...a0_hna_6_5_30_6_0_bcmpkt_rxpmd_flex_data.h |   181 +
 ...na_6_5_30_6_0_bcmpkt_rxpmd_match_id_defs.h |   405 +
 .../bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr.h |   166 -
 ...6780_a0_ina_2_6_11_0_bcmpkt_flexhdr_data.h |  1258 --
 ...0_a0_ina_2_6_11_0_bcmpkt_rxpmd_flex_data.h |   178 -
 ..._ina_2_6_11_0_bcmpkt_rxpmd_match_id_defs.h |   409 -
 .../bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr.h   |    92 -
 ...m56880_a0_cna_6_5_29_bcmpkt_flexhdr_data.h |   539 -
 ...880_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h |   117 -
 ...a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h |   209 -
 .../bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr.h |   174 -
 ...6880_a0_dna_4_11_4_0_bcmpkt_flexhdr_data.h |  1276 --
 ...0_a0_dna_4_11_4_0_bcmpkt_rxpmd_flex_data.h |   163 -
 ..._dna_4_11_4_0_bcmpkt_rxpmd_match_id_defs.h |   405 -
 ...cm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr.h |   178 +
 ...80_a0_dna_6_5_30_1_1_bcmpkt_flexhdr_data.h |  1324 ++
 ...a0_dna_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h |   163 +
 ...na_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h |   407 +
 ...cm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr.h |   170 -
 ...80_a0_hna_6_5_29_2_2_bcmpkt_flexhdr_data.h |  1212 --
 ...a0_hna_6_5_29_2_2_bcmpkt_rxpmd_flex_data.h |   165 -
 ...na_6_5_29_2_2_bcmpkt_rxpmd_match_id_defs.h |   395 -
 ...cm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr.h |   170 +
 ...80_a0_hna_6_5_30_3_0_bcmpkt_flexhdr_data.h |  1212 ++
 ...a0_hna_6_5_30_3_0_bcmpkt_rxpmd_flex_data.h |   165 +
 ...na_6_5_30_3_0_bcmpkt_rxpmd_match_id_defs.h |   395 +
 .../bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr.h  |   158 -
 ...56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr_data.h |  1126 --
 ...80_a0_nfa_2_1_7_0_bcmpkt_rxpmd_flex_data.h |   173 -
 ...0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id_defs.h |   415 -
 ...cm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr.h |   162 +
 ...80_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr_data.h |  1152 ++
 ...a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h |   173 +
 ...fa_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h |   427 +
 .../bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr.h   |    96 -
 ...m56890_a0_cna_6_5_29_bcmpkt_flexhdr_data.h |   592 -
 ...890_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h |   124 -
 ...a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h |   213 -
 ...cm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h |    96 +
 ...90_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h |   592 +
 ...a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h |   124 +
 ...na_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h |   213 +
 ...cm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr.h |   184 -
 ...90_a0_dna_6_5_29_1_2_bcmpkt_flexhdr_data.h |  1405 --
 ...a0_dna_6_5_29_1_2_bcmpkt_rxpmd_flex_data.h |   198 -
 ...na_6_5_29_1_2_bcmpkt_rxpmd_match_id_defs.h |   515 -
 ...cm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr.h |   176 +
 ...90_a0_dna_6_5_30_8_0_bcmpkt_flexhdr_data.h |  1361 ++
 ...a0_dna_6_5_30_8_0_bcmpkt_rxpmd_flex_data.h |   198 +
 ...na_6_5_30_8_0_bcmpkt_rxpmd_match_id_defs.h |   515 +
 ...cm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr.h |   180 +
 ...00_a0_dna_6_5_30_3_1_bcmpkt_flexhdr_data.h |  1419 ++
 ...a0_dna_6_5_30_3_1_bcmpkt_rxpmd_flex_data.h |   192 +
 ...na_6_5_30_3_1_bcmpkt_rxpmd_match_id_defs.h |   515 +
 .../sdklt/bcmpkt/lbpmd/bcmpkt_lbhdr.c         |     4 +-
 .../sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd.c         |     4 +-
 .../bcmpkt/rxpmd/bcmpkt_rxpmd_match_id.c      |     6 +-
 .../sdklt/bcmpkt/txpmd/bcmpkt_txpmd.c         |     4 +-
 .../sdklt/bcmpkt/util/bcmpkt_util.c           |    39 +-
 ..._a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id.c |     4 +-
 .../bcm56690_a0_dna_6_5_29_0_1_pkt_flexhdr.c  |     6 +-
 ...a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c} |   186 +-
 .../bcm56780_a0_cna_6_5_30_2_0_pkt_flexhdr.c} |   806 +-
 ...a0_dna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c} |   438 +-
 .../bcm56780_a0_dna_6_5_30_2_0_pkt_flexhdr.c} |  2230 +--
 ...a0_hna_6_5_30_6_0_bcmpkt_rxpmd_match_id.c} |   378 +-
 .../bcm56780_a0_hna_6_5_30_6_0_pkt_flexhdr.c} |  2120 +--
 ...80_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id.c |  2508 ----
 .../bcm56780_a0_ina_2_6_11_0_pkt_flexhdr.c    |  8131 -----------
 ...6880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c |  1108 --
 .../bcm56880_a0_cna_6_5_29_pkt_flexhdr.c      |  3453 -----
 ...a0_dna_6_5_30_1_1_bcmpkt_rxpmd_match_id.c} |   428 +-
 .../bcm56880_a0_dna_6_5_30_1_1_pkt_flexhdr.c} |  2180 +--
 ...a0_hna_6_5_30_3_0_bcmpkt_rxpmd_match_id.c} |   368 +-
 .../bcm56880_a0_hna_6_5_30_3_0_pkt_flexhdr.c} |  1792 +--
 ...a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_match_id.c} |   888 +-
 .../bcm56880_a0_nfa_6_5_30_1_1_pkt_flexhdr.c} |  1772 +--
 ...a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c} |   318 +-
 .../bcm56890_a0_cna_6_5_30_2_0_pkt_flexhdr.c} |   866 +-
 ...a0_dna_6_5_30_8_0_bcmpkt_rxpmd_match_id.c} |  2009 +--
 .../bcm56890_a0_dna_6_5_30_8_0_pkt_flexhdr.c} |  4511 +++---
 ..._a0_dna_6_5_30_3_1_bcmpkt_rxpmd_match_id.c |  7400 ++++++++++
 .../bcm78800_a0_dna_6_5_30_3_1_pkt_flexhdr.c  | 11476 ++++++++++++++++
 .../saibcm-modules/sdklt/linux/bcmgenl/Kbuild |    33 +-
 .../sdklt/linux/bcmgenl/Makefile              |     5 +-
 .../sdklt/linux/bcmgenl/bcmgenl.c             |   632 +-
 .../sdklt/linux/bcmgenl/bcmgenl.h             |    41 +-
 .../sdklt/linux/bcmgenl/bcmgenl_packet.c      |   124 +-
 .../sdklt/linux/bcmgenl/bcmgenl_packet.h      |     4 +-
 .../sdklt/linux/bcmgenl/bcmgenl_psample.c     |   267 +-
 .../sdklt/linux/bcmgenl/bcmgenl_psample.h     |     4 +-
 .../saibcm-modules/sdklt/linux/bde/Kbuild     |     4 +-
 .../saibcm-modules/sdklt/linux/bde/Makefile   |     4 +-
 .../saibcm-modules/sdklt/linux/bde/ngbde.h    |   107 +-
 .../sdklt/linux/bde/ngbde_dma.c               |     6 +-
 .../sdklt/linux/bde/ngbde_iio.c               |     4 +-
 .../sdklt/linux/bde/ngbde_intr.c              |   394 +-
 .../sdklt/linux/bde/ngbde_ioctl.c             |    49 +-
 .../sdklt/linux/bde/ngbde_iproc_probe.c       |    12 +-
 .../sdklt/linux/bde/ngbde_kapi.c              |    55 +-
 .../sdklt/linux/bde/ngbde_main.c              |    13 +-
 .../sdklt/linux/bde/ngbde_paxb.c              |     4 +-
 .../sdklt/linux/bde/ngbde_pci_probe.c         |    25 +-
 .../sdklt/linux/bde/ngbde_pgmem.c             |     4 +-
 .../sdklt/linux/bde/ngbde_pio.c               |     4 +-
 .../sdklt/linux/bde/ngbde_procfs.c            |    15 +-
 .../sdklt/linux/bde/ngbde_swdev.c             |     4 +-
 .../sdklt/linux/genl-packet/Kbuild            |     2 +-
 .../sdklt/linux/genl-packet/Makefile          |     2 +-
 .../sdklt/linux/include/lkm/lkm.h             |    38 +-
 .../sdklt/linux/include/lkm/ngbde_ioctl.h     |   174 +-
 .../sdklt/linux/include/lkm/ngbde_kapi.h      |    32 +-
 .../sdklt/linux/include/lkm/ngedk_ioctl.h     |     4 +-
 .../sdklt/linux/include/lkm/ngedk_kapi.h      |     4 +-
 .../sdklt/linux/include/lkm/ngknet_dev.h      |    11 +-
 .../sdklt/linux/include/lkm/ngknet_ioctl.h    |     4 +-
 .../sdklt/linux/include/lkm/ngknet_kapi.h     |     4 +-
 .../linux/include/lkm/ngptpclock_ioctl.h      |     4 +-
 .../saibcm-modules/sdklt/linux/knet/Kbuild    |     4 +-
 .../saibcm-modules/sdklt/linux/knet/Makefile  |     5 +-
 .../sdklt/linux/knet/ngknet_buff.c            |     4 +-
 .../sdklt/linux/knet/ngknet_buff.h            |     4 +-
 .../sdklt/linux/knet/ngknet_callback.c        |     6 +-
 .../sdklt/linux/knet/ngknet_callback.h        |     4 +-
 .../sdklt/linux/knet/ngknet_dep.h             |     4 +-
 .../sdklt/linux/knet/ngknet_extra.c           |    16 +-
 .../sdklt/linux/knet/ngknet_extra.h           |     4 +-
 .../sdklt/linux/knet/ngknet_linux.c           |     4 +-
 .../sdklt/linux/knet/ngknet_linux.h           |    36 +-
 .../sdklt/linux/knet/ngknet_main.c            |    34 +-
 .../sdklt/linux/knet/ngknet_main.h            |     5 +-
 .../sdklt/linux/knet/ngknet_procfs.c          |     4 +-
 .../sdklt/linux/knet/ngknet_procfs.h          |     4 +-
 .../sdklt/linux/knet/ngknet_ptp.c             |     4 +-
 .../sdklt/linux/knet/ngknet_ptp.h             |     4 +-
 .../saibcm-modules/sdklt/linux/knetcb/Kbuild  |     4 +-
 .../sdklt/linux/knetcb/Makefile               |     4 +-
 .../sdklt/linux/knetcb/ngknetcb_main.c        |     8 +-
 .../saibcm-modules/sdklt/make/kpmd.mk         |    99 +-
 .../broadcom/saibcm-modules/sdklt/make/lkm.mk |     4 +-
 .../saibcm-modules/sdklt/make/makeutils.mk    |     4 +-
 .../saibcm-modules/sdklt/make/partial.mk      |     4 +-
 .../sdklt/sal/include/sal/sal_libc.h          |     8 +-
 .../sdklt/sal/include/sal/sal_linux.h         |    15 +-
 .../sdklt/sal/include/sal/sal_types.h         |     4 +-
 .../sdklt/sal/include/sal_config.h            |     4 +-
 .../sdklt/shr/bitop/shr_bitop_range_clear.c   |     4 +-
 .../sdklt/shr/include/shr/shr_bitop.h         |     4 +-
 .../sdklt/shr/include/shr/shr_error.h         |     4 +-
 .../sdklt/shr/include/shr/shr_types.h         |     4 +-
 .../systems/bde/linux/include/linux-bde.h     |    17 +-
 .../systems/bde/linux/include/linux_dma.h     |     8 +-
 .../systems/bde/linux/include/mpool.h         |     3 +-
 .../systems/bde/linux/kernel/Makefile         |     8 +-
 .../bde/linux/kernel/linux-kernel-bde.c       |   252 +-
 .../systems/bde/linux/kernel/linux_dma.c      |    69 +-
 .../systems/bde/linux/kernel/linux_shbde.c    |     3 +-
 .../systems/bde/linux/kernel/linux_shbde.h    |     3 +-
 .../systems/bde/linux/shared/mpool.c          |     3 +-
 .../systems/bde/linux/user/kernel/Makefile    |    82 +-
 .../bde/linux/user/kernel/linux-user-bde.c    |    89 +-
 .../bde/linux/user/kernel/linux-user-bde.h    |    13 +-
 .../systems/bde/shared/include/shbde.h        |     3 +-
 .../systems/bde/shared/include/shbde_iproc.h  |     3 +-
 .../systems/bde/shared/include/shbde_mdio.h   |     3 +-
 .../systems/bde/shared/include/shbde_pci.h    |     3 +-
 .../systems/bde/shared/shbde_iproc.c          |     3 +-
 .../systems/bde/shared/shbde_mdio.c           |     3 +-
 .../systems/bde/shared/shbde_pci.c            |     3 +-
 .../systems/linux/kernel/modules/Makefile     |     3 +-
 .../linux/kernel/modules/bcm-genl/Makefile    |     4 +-
 .../kernel/modules/bcm-genl/bcm-genl-dev.c    |     3 +-
 .../kernel/modules/bcm-genl/bcm-genl-dev.h    |     3 +-
 .../kernel/modules/bcm-genl/bcm-genl-netif.c  |     3 +-
 .../kernel/modules/bcm-genl/bcm-genl-netif.h  |     5 +-
 .../kernel/modules/bcm-genl/bcm-genl-packet.c |     8 +-
 .../kernel/modules/bcm-genl/bcm-genl-packet.h |     3 +-
 .../modules/bcm-genl/bcm-genl-psample.c       |     7 +-
 .../modules/bcm-genl/bcm-genl-psample.h       |     3 +-
 .../linux/kernel/modules/bcm-genl/bcm-genl.c  |     7 +-
 .../linux/kernel/modules/bcm-knet/Makefile    |    11 +-
 .../linux/kernel/modules/bcm-knet/bcm-knet.c  |   370 +-
 .../modules/bcm-ptp-clock/bcm-ptp-clock.c     |  3923 ++++++
 .../systems/linux/kernel/modules/dcb/README   |     2 +-
 .../dcb/include/appl/dcb/dcb_handler.h        |     5 +-
 .../modules/dcb/include/appl/dcb/dcb_int.h    |     3 +-
 .../kernel/modules/dcb/include/sal/types.h    |     3 +-
 .../kernel/modules/dcb/include/sdk_config.h   |     3 +-
 .../kernel/modules/dcb/include/shared/bsl.h   |     3 +-
 .../kernel/modules/dcb/include/shared/rx.h    |     3 +-
 .../kernel/modules/dcb/include/soc/dcb.h      |     3 +-
 .../modules/dcb/include/soc/dcbformats.h      |     3 +-
 .../kernel/modules/dcb/include/soc/defs.h     |    15 +-
 .../kernel/modules/dcb/include/soc/devids.h   |    31 +-
 .../kernel/modules/dcb/include/soc/drv.h      |     3 +-
 .../kernel/modules/dcb/include/soc/enet.h     |     3 +-
 .../kernel/modules/dcb/include/soc/higig.h    |     3 +-
 .../kernel/modules/dcb/include/soc/maxdef.h   |     3 +-
 .../linux/kernel/modules/dcb/include/soc/rx.h |     3 +-
 .../include/soc/shared/dcbformats/type19.h    |     3 +-
 .../include/soc/shared/dcbformats/type23.h    |     3 +-
 .../include/soc/shared/dcbformats/type24.h    |     3 +-
 .../include/soc/shared/dcbformats/type26.h    |     3 +-
 .../include/soc/shared/dcbformats/type29.h    |     3 +-
 .../include/soc/shared/dcbformats/type31.h    |     3 +-
 .../include/soc/shared/dcbformats/type32.h    |     3 +-
 .../include/soc/shared/dcbformats/type33.h    |     3 +-
 .../include/soc/shared/dcbformats/type34.h    |     3 +-
 .../include/soc/shared/dcbformats/type35.h    |     3 +-
 .../include/soc/shared/dcbformats/type36.h    |     3 +-
 .../include/soc/shared/dcbformats/type37.h    |     3 +-
 .../include/soc/shared/dcbformats/type38.h    |     3 +-
 .../kernel/modules/dcb/include/soc/types.h    |     3 +-
 .../linux/kernel/modules/dcb/make/Makefile    |     5 +-
 .../modules/dcb/src/appl/dcb/dcb_handler.c    |     5 +-
 .../modules/dcb/src/appl/test/dcb_test.c      |     4 +-
 .../kernel/modules/dcb/src/soc/common/dcb.c   |     9 +-
 .../linux/kernel/modules/genl-packet/Makefile |     3 +-
 .../linux/kernel/modules/include/bcm-knet.h   |     3 +-
 .../linux/kernel/modules/include/gmodule.h    |     3 +-
 .../linux/kernel/modules/include/lkm.h        |     3 +-
 .../linux/kernel/modules/knet-cb/Makefile     |    11 +-
 .../linux/kernel/modules/knet-cb/knet-cb.c    |     2 +-
 .../linux/kernel/modules/shared/Makefile      |     3 +-
 .../linux/kernel/modules/shared/gmodule.c     |    11 +-
 .../linux/kernel/modules/shared/ksal.c        |   270 -
 .../systems/linux/user/common/Makefile        |    45 +-
 .../systems/linux/user/gts/Makefile           |     3 +-
 .../systems/linux/user/iproc-3_14/Makefile    |     3 +-
 .../systems/linux/user/iproc-4_4/Makefile     |     3 +-
 .../systems/linux/user/iproc/Makefile         |     3 +-
 .../systems/linux/user/iproc_64/Makefile      |     3 +-
 .../systems/linux/user/slk/Makefile           |     3 +-
 .../systems/linux/user/x86-5_10/Makefile      |    82 +
 .../systems/linux/user/x86-64-fc28/Makefile   |    86 +
 .../user/x86-smp_generic_64-2_6/Makefile      |     3 +-
 .../systems/linux/user/xlr/Makefile           |     3 +-
 .../broadcom/saibcm-modules/tools/mktool.pl   |     3 +-
 553 files changed, 58583 insertions(+), 46130 deletions(-)
 delete mode 100644 platform/broadcom/saibcm-modules/include/sal/core/sync.h
 delete mode 100644 platform/broadcom/saibcm-modules/include/sal/core/thread.h
 create mode 100644 platform/broadcom/saibcm-modules/make/Make.clang
 create mode 100644 platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_18
 create mode 100644 platform/broadcom/saibcm-modules/make/Makefile.linux-x86-5_10
 create mode 100644 platform/broadcom/saibcm-modules/make/Makefile.linux-x86-64-fc28
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78800_a0/bcm78800_a0_pdma_attach.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_conf.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_id_types.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_local_types.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_match_id_db.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h
 rename platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/{bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_lrd_variant_def.h => bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_lrd_variant_def.h} (74%)
 mode change 100644 => 100755
 rename platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/{dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_lrd_variant_def.h => dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_lrd_variant_def.h} (74%)
 mode change 100644 => 100755
 rename platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/{cna_6_5_29/bcm56780_a0_cna_6_5_29_lrd_variant_def.h => hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_lrd_variant_def.h} (74%)
 mode change 100644 => 100755
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_lrd_variant_def.h
 create mode 100755 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_lrd_variant_def.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_lrd_variant_def.h
 create mode 100755 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_lrd_variant_def.h
 create mode 100755 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_lrd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h
 create mode 100755 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_lrd_variant_def.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_lrd_variant_def.h
 create mode 100755 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_lrd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h
 rename platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/{bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_lrd_variant_def.h => bcm78800_a0/bcm78800_a0_lrd_variant_def.h} (74%)
 mode change 100644 => 100755
 create mode 100755 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_lrd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_id_types.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/{hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_config_variant.h => cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_config_variant.h} (69%)
 mode change 100644 => 100755
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/{cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_config_variant.h => dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_config_variant.h} (68%)
 mode change 100644 => 100755
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/{dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_config_variant.h => hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_config_variant.h} (68%)
 mode change 100644 => 100755
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/{hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_config_variant.h => dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_config_variant.h} (69%)
 mode change 100644 => 100755
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/{cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_config_variant.h => hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_config_variant.h} (68%)
 mode change 100644 => 100755
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_config_variant.h
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/{dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_config_variant.h => nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_config_variant.h} (68%)
 mode change 100644 => 100755
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/{dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_config_variant.h => cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_config_variant.h} (69%)
 mode change 100644 => 100755
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/{cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_config_variant.h => dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_config_variant.h} (68%)
 mode change 100644 => 100755
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h
 create mode 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/bcm78800_a0_ltd_config_variant.h
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/{bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_config_variant.h => bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_config_variant.h} (55%)
 mode change 100644 => 100755
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_def.h
 rename platform/broadcom/saibcm-modules/sdklt/{bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_lrd_variant_def.h => bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_def.h} (73%)
 mode change 100644 => 100755
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h
 rename platform/broadcom/saibcm-modules/sdklt/{bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_lrd_variant_def.h => bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_def.h} (73%)
 mode change 100644 => 100755
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_def.h
 create mode 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_def.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_def.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h
 create mode 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_def.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_def.h
 create mode 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_def.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_def.h
 create mode 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_def.h
 create mode 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_def.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_def.h
 create mode 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h
 rename platform/broadcom/saibcm-modules/sdklt/{bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_lrd_variant_def.h => bcmltd/include/bcmltd/defs/generated/bcm78800_a0/bcm78800_a0_ltd_variant_def.h} (74%)
 mode change 100644 => 100755
 create mode 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_entry.h
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/{bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_entry.h => bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_entry.h} (62%)
 mode change 100644 => 100755
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_entry.h
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/{bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_entry.h => bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_entry.h} (62%)
 mode change 100644 => 100755
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/{hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_entry.h => hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_entry.h} (62%)
 mode change 100644 => 100755
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_entry.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_entry.h
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/{bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_entry.h => bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_entry.h} (61%)
 mode change 100644 => 100755
 create mode 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_entry.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_entry.h
 create mode 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_entry.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_entry.h
 create mode 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_entry.h
 create mode 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_entry.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h
 create mode 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/bcm78800_a0_ltd_variant_entry.h
 create mode 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_entry.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_lbhdr.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd_field.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_txpmd.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78800_a0/bcmpkt_bcm78800_a0_rxpmd.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr_data.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr_data.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_flex_data.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr_data.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_flex_data.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_flex_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_match_id_defs.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr_data.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_flex_data.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id_defs.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr_data.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr_data.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_flex_data.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr_data.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_flex_data.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_flex_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_match_id_defs.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr_data.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_flex_data.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr_data.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr_data.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_flex_data.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_flex_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_match_id_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_flex_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_match_id_defs.h
 rename platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/{cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c => cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c} (76%)
 rename platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/{cna_6_5_29/bcm56780_a0_cna_6_5_29_pkt_flexhdr.c => cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_pkt_flexhdr.c} (75%)
 rename platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/{dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id.c => dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c} (77%)
 rename platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/{dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_pkt_flexhdr.c => dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_pkt_flexhdr.c} (69%)
 rename platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/{hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id.c => hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_match_id.c} (83%)
 rename platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/{hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_pkt_flexhdr.c => hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_pkt_flexhdr.c} (77%)
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id.c
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_pkt_flexhdr.c
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_pkt_flexhdr.c
 rename platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/{dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id.c => dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_match_id.c} (77%)
 rename platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/{dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_pkt_flexhdr.c => dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_pkt_flexhdr.c} (65%)
 rename platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/{hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id.c => hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_match_id.c} (83%)
 rename platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/{hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_pkt_flexhdr.c => hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_pkt_flexhdr.c} (73%)
 rename platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/{nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id.c => nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_match_id.c} (70%)
 rename platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/{nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_pkt_flexhdr.c => nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_pkt_flexhdr.c} (67%)
 rename platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/{cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c => cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c} (67%)
 rename platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/{cna_6_5_29/bcm56890_a0_cna_6_5_29_pkt_flexhdr.c => cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_pkt_flexhdr.c} (74%)
 rename platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/{dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id.c => dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_match_id.c} (78%)
 rename platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/{dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_pkt_flexhdr.c => dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_pkt_flexhdr.c} (79%)
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_match_id.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_pkt_flexhdr.c
 mode change 100644 => 100755 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/bcm-ptp-clock.c
 delete mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/ksal.c
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/user/x86-5_10/Makefile
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/user/x86-64-fc28/Makefile

diff --git a/platform/broadcom/sai-modules.mk b/platform/broadcom/sai-modules.mk
index e8ffcbfcc070..05ca22e7319d 100644
--- a/platform/broadcom/sai-modules.mk
+++ b/platform/broadcom/sai-modules.mk
@@ -1,6 +1,6 @@
 # Broadcom SAI modules
 
-BRCM_OPENNSL_KERNEL_VERSION = 10.1.0.0
+BRCM_OPENNSL_KERNEL_VERSION = 11.2.4.1
 
 BRCM_OPENNSL_KERNEL = opennsl-modules_$(BRCM_OPENNSL_KERNEL_VERSION)_amd64.deb
 $(BRCM_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules
diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index 45d8472f75a3..632a8c222c43 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,6 +1,6 @@
-LIBSAIBCM_XGS_VERSION = 10.1.42.0
+LIBSAIBCM_XGS_VERSION = 11.2.4.1
 LIBSAIBCM_DNX_VERSION = 11.2.9.1
-LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA
+LIBSAIBCM_XGS_BRANCH_NAME = SAI_11.2.0_GA
 LIBSAIBCM_DNX_BRANCH_NAME = SAI_11.2.0_GA
 LIBSAIBCM_XGS_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_XGS_BRANCH_NAME)/$(LIBSAIBCM_XGS_VERSION)/xgs"
 LIBSAIBCM_DNX_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_DNX_BRANCH_NAME)/$(LIBSAIBCM_DNX_VERSION)/dnx"
diff --git a/platform/broadcom/saibcm-modules/debian/changelog b/platform/broadcom/saibcm-modules/debian/changelog
index e4bbafd321cb..dd635964bc71 100644
--- a/platform/broadcom/saibcm-modules/debian/changelog
+++ b/platform/broadcom/saibcm-modules/debian/changelog
@@ -1,3 +1,9 @@
+opennsl (11.2.4.1) unstable; urgency=medium
+
+  * Update to Broadcom SAI 11.2.4.1
+
+ -- Ziting Guo <zitingguo@microsoft.com> Mon, 2 Sep 2024 02:53:09 +0000
+
 opennsl (10.1.0.0) unstable; urgency=medium
 
   * Update to Broadcom SAI 10.1.0.0
diff --git a/platform/broadcom/saibcm-modules/include/ibde.h b/platform/broadcom/saibcm-modules/include/ibde.h
index bb6e261e8d48..c28db2a76ad6 100644
--- a/platform/broadcom/saibcm-modules/include/ibde.h
+++ b/platform/broadcom/saibcm-modules/include/ibde.h
@@ -1,6 +1,6 @@
 /*
  * $Id: ibde.h,v 1.27 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  */
 
 #ifndef __IBDE_H__
diff --git a/platform/broadcom/saibcm-modules/include/kcom.h b/platform/broadcom/saibcm-modules/include/kcom.h
index c644828b94ff..6a20600469e5 100644
--- a/platform/broadcom/saibcm-modules/include/kcom.h
+++ b/platform/broadcom/saibcm-modules/include/kcom.h
@@ -1,6 +1,6 @@
 /*
  * $Id: kcom.h,v 1.9 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:    kcom.h
  * Purpose: User/Kernel message definitions
@@ -71,7 +72,7 @@
 #define KCOM_M_CLOCK_CMD        52 /* Clock Commands */
 #define KCOM_M_PCIE_LINK_STATUS 53 /* PCIe link status */
 
-#define KCOM_VERSION            13 /* Protocol version */
+#define KCOM_VERSION            16 /* Protocol version */
 
 /*
  * Message status codes
@@ -134,10 +135,10 @@ typedef struct kcom_msg_hdr_s {
 
 /*
  * Max size of Sand System Headers
- * For DNX, Module Header(20B) + PTCH(2B) + ITMH(5B)
+ * For DNX, Module Header(16B) + PTCH(2B/3B) + ITMH(5B)
  * For DPP, PTCH(2B) + ITMH(4B)
  */
-#define KCOM_NETIF_SYSTEM_HEADERS_SIZE_MAX     27
+#define KCOM_NETIF_SYSTEM_HEADERS_SIZE_MAX     64
 
 typedef struct kcom_netif_s {
     uint16 id;
@@ -353,6 +354,7 @@ typedef struct kcom_msg_version_s {
     uint32 version;
     uint32 netif_max;
     uint32 filter_max;
+    uint32 module_reload;
 } kcom_msg_version_t;
 
 /*
@@ -419,20 +421,6 @@ typedef struct kcom_msg_hw_init_s {
     uint8 pkt_hdr_size;
     uint32 dma_hi;
     uint32 cdma_channels;
-    /*
-     * Information to parse Dune system headers
-     */
-    uint32 ftmh_lb_key_ext_size;
-    uint32 ftmh_stacking_ext_size;
-    uint32 pph_base_size;
-    uint32 pph_lif_ext_size[8];
-    uint32 udh_length_type[4];
-    uint32 udh_size;
-    uint32 oamp_punted;
-    uint8 no_skip_udh_check;
-    uint8 oam_dm_tod_exist;
-    uint8 system_headers_mode;
-    uint8 udh_enable;
     /*
      * Bitmap of DMA channels reserved for the user mode network driver.
      * These channels cannot be used by the kernel network driver (KNET).
@@ -589,6 +577,20 @@ typedef struct kcom_msg_dma_info_s {
 typedef struct kcom_msg_hw_info_s {
     kcom_msg_hdr_t hdr;
     kcom_oamp_info_t oamp_info;
+    /*
+     * Information to parse Dune system headers
+     */
+    uint32 ftmh_lb_key_ext_size;
+    uint32 ftmh_stacking_ext_size;
+    uint32 pph_base_size;
+    uint32 pph_lif_ext_size[8];
+    uint32 udh_length_type[4];
+    uint32 udh_size;
+    uint32 oamp_punted;
+    uint8 no_skip_udh_check;
+    uint8 oam_dm_tod_exist;
+    uint8 system_headers_mode;
+    uint8 udh_enable;
 } kcom_msg_hw_info_t;
 
 /*
diff --git a/platform/broadcom/saibcm-modules/include/sal/core/sync.h b/platform/broadcom/saibcm-modules/include/sal/core/sync.h
deleted file mode 100644
index b45a15da7c8c..000000000000
--- a/platform/broadcom/saibcm-modules/include/sal/core/sync.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * $Id: sync.h,v 1.1 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
- * 
- * Permission is granted to use, copy, modify and/or distribute this
- * software under either one of the licenses below.
- * 
- * License Option 1: GPL
- * 
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License, version 2, as
- * published by the Free Software Foundation (the "GPL").
- * 
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License version 2 (GPLv2) for more details.
- * 
- * You should have received a copy of the GNU General Public License
- * version 2 (GPLv2) along with this source code.
- * 
- * 
- * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
- * 
- * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
- * 
- */
-
-#ifndef _SAL_SYNC_H
-#define _SAL_SYNC_H
-
-typedef struct sal_sem_s{
-    char sal_opaque_type;
-} *sal_sem_t;
-
-#define sal_sem_FOREVER		(-1)
-#define sal_sem_BINARY		1
-#define sal_sem_COUNTING	0
-
-sal_sem_t	sal_sem_create(char *desc, int binary, int initial_count);
-void		sal_sem_destroy(sal_sem_t b);
-int		sal_sem_take(sal_sem_t b, int usec);
-int		sal_sem_give(sal_sem_t b);
-
-#endif	/* !_SAL_SYNC_H */
diff --git a/platform/broadcom/saibcm-modules/include/sal/core/thread.h b/platform/broadcom/saibcm-modules/include/sal/core/thread.h
deleted file mode 100644
index 06260906315c..000000000000
--- a/platform/broadcom/saibcm-modules/include/sal/core/thread.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * $Id: thread.h,v 1.1 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
- * 
- * Permission is granted to use, copy, modify and/or distribute this
- * software under either one of the licenses below.
- * 
- * License Option 1: GPL
- * 
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License, version 2, as
- * published by the Free Software Foundation (the "GPL").
- * 
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License version 2 (GPLv2) for more details.
- * 
- * You should have received a copy of the GNU General Public License
- * version 2 (GPLv2) along with this source code.
- * 
- * 
- * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
- * 
- * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
- * 
- */
-
-#ifndef _SAL_THREAD_H
-#define _SAL_THREAD_H
-
-#include <sal/types.h>
-
-void		sal_usleep(uint32 usec);
-void		sal_udelay(uint32 usec);
-
-#endif	/* !_SAL_THREAD_H */
diff --git a/platform/broadcom/saibcm-modules/include/sal/types.h b/platform/broadcom/saibcm-modules/include/sal/types.h
index a0ffb72c86a3..11f85d0578d9 100644
--- a/platform/broadcom/saibcm-modules/include/sal/types.h
+++ b/platform/broadcom/saibcm-modules/include/sal/types.h
@@ -1,6 +1,6 @@
 /*
  * $Id: types.h,v 1.3 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File: 	types.h
  * Purpose: 	SAL type definitions
@@ -145,6 +146,8 @@ typedef union
 #define SAL_AXI_DEV_TYPE        0x00080 /* AXI device */
 #define SAL_EMMI_DEV_TYPE       0x10000 /* EMMI device */
 #define SAL_COMPOSITE_DEV_TYPE  0x20000 /* Composite device, composed of sub-devices with buses */
+#define SAL_USER_DEV_TYPE       0x40000 /* User implemented method of access to the device */
+#define SAL_SUB_DEV_TYPE        0x80000 /* A sub-device (with a bus) of a composite device */
 #define SAL_DEV_BUS_TYPE_MASK   0xf00ff /* Odd for historical reasons */
 
 /* Device types */
diff --git a/platform/broadcom/saibcm-modules/include/sdk_config.h b/platform/broadcom/saibcm-modules/include/sdk_config.h
index 93063cd9667b..36c33b8412c0 100644
--- a/platform/broadcom/saibcm-modules/include/sdk_config.h
+++ b/platform/broadcom/saibcm-modules/include/sdk_config.h
@@ -1,6 +1,6 @@
 /*
  * $Id: sdk_config.h,v 1.5 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  *
  */
diff --git a/platform/broadcom/saibcm-modules/include/soc/devids.h b/platform/broadcom/saibcm-modules/include/soc/devids.h
index de612137069b..a4ee14018a18 100644
--- a/platform/broadcom/saibcm-modules/include/soc/devids.h
+++ b/platform/broadcom/saibcm-modules/include/soc/devids.h
@@ -1,6 +1,6 @@
 /*
  * $Id: devids.h,v 1.309 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -26,6 +26,7 @@
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
  * 
+ * 
  */
 
 #ifndef _SOC_DEVIDS_H
@@ -1187,7 +1188,7 @@
 #define BCM53394_A0_REV_ID      1
 
 /* Greyhound , Ranger 2 */
-#define BCM53400_DEVICE_ID      0x8400 /* FIXME */
+#define BCM53400_DEVICE_ID      0x8400 
 #define BCM53400_A0_REV_ID      1
 #define BCM56060_DEVICE_ID      0xb060
 #define BCM56060_A0_REV_ID      1
@@ -1995,6 +1996,23 @@
 #define BCM8884E_DEVICE_ID      0x884E
 #define BCM8884F_DEVICE_ID      0x884F
 
+#define BCM88810_DEVICE_ID      0x8810
+#define BCM88811_DEVICE_ID      0x8811
+#define BCM88812_DEVICE_ID      0x8812
+#define BCM88813_DEVICE_ID      0x8813
+#define BCM88814_DEVICE_ID      0x8814
+#define BCM88815_DEVICE_ID      0x8815
+#define BCM88816_DEVICE_ID      0x8816
+#define BCM88817_DEVICE_ID      0x8817
+#define BCM88818_DEVICE_ID      0x8818
+#define BCM88819_DEVICE_ID      0x8819
+#define BCM8881A_DEVICE_ID      0x881A
+#define BCM8881B_DEVICE_ID      0x881B
+#define BCM8881C_DEVICE_ID      0x881C
+#define BCM8881D_DEVICE_ID      0x881D
+#define BCM8881E_DEVICE_ID      0x881E
+#define BCM8881F_DEVICE_ID      0x881F
+
 #define J2X_DEVICE_ID                 0x8830
 #define J2X_A0_REV_ID           DNXC_A0_REV_ID
 #define BCM88830_DEVICE_ID      J2X_DEVICE_ID
@@ -2015,6 +2033,11 @@
 #define BCM8883E_DEVICE_ID      0x883E
 #define BCM8883F_DEVICE_ID      0x883F
 
+#define J2Z_DEVICE_ID           0x216
+#define J2Z_A0_REV_ID           DNXC_A0_REV_ID
+#define BCM8216_DEVICE_ID       J2Z_DEVICE_ID
+#define BCM8216_A0_REV_ID       J2Z_A0_REV_ID
+
 #ifdef BCM_DNX3_SUPPORT
 #define JERICHO3_DEVICE_ID      0x8860
 #define Q3_DEVICE_ID_START      0x886a
@@ -2179,6 +2202,10 @@
 #define BCM56692_DEVICE_ID 0xb692
 #define BCM56692_A0_REV_ID 0x0001
 
+/* Trident5 X12*/
+#define BCM78800_DEVICE_ID 0xf800
+#define BCM78800_A0_REV_ID 0x0001
+
 /* Trident4 */
 #define BCM56880_DEVICE_ID 0xb880
 #define BCM56880_A0_REV_ID 0x0001
@@ -2211,6 +2238,10 @@
 #define BCM56788_A1_REV_ID 0x0002
 #define BCM56789_DEVICE_ID 0xb789
 #define BCM56789_A0_REV_ID 0x0001
+/* Firelight3 */
+#define BCM56089_DEVICE_ID 0xb089
+#define BCM56089_A0_REV_ID 0x0001
+#define BCM56089_A1_REV_ID 0x0002
 
 /* Tomahawk4 */
 #define BCM56990_DEVICE_ID 0xb990
diff --git a/platform/broadcom/saibcm-modules/make/Make.clang b/platform/broadcom/saibcm-modules/make/Make.clang
new file mode 100644
index 000000000000..fc80fb079bdc
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/make/Make.clang
@@ -0,0 +1,69 @@
+# $Id: Make.clang
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
+# 
+#
+# Build flags for CLANG.
+#
+
+SHELL := $(shell which bash)
+CHK_CC := $(shell PATH="$(PATH)" which $(CC))
+CLANG_MAJOR := $(shell $(CHK_CC) --version | sed -n 's/.* \([0-9]*\)\..*/\1/p')
+#
+# This is not suitable for CLANG compilation of DNX family so do not inclue.
+#
+ifneq (1,$(SAND_CHIPS))
+ifeq (true,$(shell [ $(CLANG_MAJOR) -ge 10 ] && echo true))
+# Support kernel module build
+export KERNEL_LLVM ?= 1
+
+# Suppress various Clang warnings
+CLANG_ADD_CFLAGS += \
+    -Wno-gnu-designator \
+    -Wno-gnu-variable-sized-type-not-at-end \
+    -Wno-address-of-packed-member \
+    -Wno-unused-command-line-argument \
+    -Wno-misleading-indentation
+
+# Suppress Clang build issues on TCL Bindings
+ifeq (TCL,$(findstring TCL,$(FEATURE_LIST)))
+CLANG_ADD_CFLAGS += \
+    -Wno-deprecated-non-prototype \
+    -Wno-incompatible-function-pointer-types \
+    -Wno-incompatible-pointer-types-discards-qualifiers \
+    -Wno-void-pointer-to-int-cast \
+    -Wno-int-to-void-pointer-cast \
+    -Wno-pointer-to-int-cast
+endif
+
+# Use LLD by default
+LDFLAGS += -fuse-ld=lld
+CLANG_ADD_CFLAGS += -fuse-ld=lld
+
+# Use DWARF V4 for compatibility
+CLANG_ADD_CFLAGS += -gdwarf-4
+endif
+endif
diff --git a/platform/broadcom/saibcm-modules/make/Make.config b/platform/broadcom/saibcm-modules/make/Make.config
index 163b085514fe..5e28e7222d24 100644
--- a/platform/broadcom/saibcm-modules/make/Make.config
+++ b/platform/broadcom/saibcm-modules/make/Make.config
@@ -1,5 +1,5 @@
 # $Id: Make.config,v 1.3 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -24,6 +24,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 #
 
 ifneq ($(strip $(override-target)),)
diff --git a/platform/broadcom/saibcm-modules/make/Make.depend b/platform/broadcom/saibcm-modules/make/Make.depend
index 061468fd6fb6..f51ffd77bbf6 100644
--- a/platform/broadcom/saibcm-modules/make/Make.depend
+++ b/platform/broadcom/saibcm-modules/make/Make.depend
@@ -1,5 +1,5 @@
 # $Id: Make.depend,v 1.14 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -24,6 +24,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 #
 # Default rule to build dependencies.  This builds a x.d file for each
 # x.c file that describes the dependencies.  We then conditionally include 
diff --git a/platform/broadcom/saibcm-modules/make/Make.kernlib b/platform/broadcom/saibcm-modules/make/Make.kernlib
index 52f2b7215f6d..3051da05e1ba 100644
--- a/platform/broadcom/saibcm-modules/make/Make.kernlib
+++ b/platform/broadcom/saibcm-modules/make/Make.kernlib
@@ -1,5 +1,5 @@
 # $Id: Make.kernlib,v 1.7 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -24,6 +24,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 #
 # Make rules/targets for handling libraries
 
diff --git a/platform/broadcom/saibcm-modules/make/Make.lib b/platform/broadcom/saibcm-modules/make/Make.lib
index c0877fb7a36a..c6558c0cb181 100644
--- a/platform/broadcom/saibcm-modules/make/Make.lib
+++ b/platform/broadcom/saibcm-modules/make/Make.lib
@@ -1,5 +1,5 @@
 # $Id: Make.lib,v 1.14 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -24,6 +24,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 #
 # Make rules/targets for handling libraries
 
diff --git a/platform/broadcom/saibcm-modules/make/Make.linux b/platform/broadcom/saibcm-modules/make/Make.linux
index ff7fc026f87f..83871cdbbe5b 100644
--- a/platform/broadcom/saibcm-modules/make/Make.linux
+++ b/platform/broadcom/saibcm-modules/make/Make.linux
@@ -1,6 +1,6 @@
 #
 # $Id: Make.linux,v 1.18 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -26,6 +26,7 @@
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
 # 
+# 
 # Common make targets for Linux user and kernel builds included by top
 # level Linux makefiles
 #
diff --git a/platform/broadcom/saibcm-modules/make/Make.subdirs b/platform/broadcom/saibcm-modules/make/Make.subdirs
index 637f0d376c86..2473764aec1c 100644
--- a/platform/broadcom/saibcm-modules/make/Make.subdirs
+++ b/platform/broadcom/saibcm-modules/make/Make.subdirs
@@ -1,5 +1,5 @@
 # $Id: Make.subdirs,v 1.8 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -24,6 +24,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 #
 # Make rules/targets for handling subdirectories
 
diff --git a/platform/broadcom/saibcm-modules/make/Make.tools b/platform/broadcom/saibcm-modules/make/Make.tools
index 7f3a6d83296a..189abf92c74f 100644
--- a/platform/broadcom/saibcm-modules/make/Make.tools
+++ b/platform/broadcom/saibcm-modules/make/Make.tools
@@ -1,5 +1,5 @@
 # $Id: Make.tools,v 1.2 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -24,6 +24,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 
 SYSNAME	:= $(shell uname -s)
 HCC ?=/usr/bin/gcc
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-gts b/platform/broadcom/saibcm-modules/make/Makefile.linux-gts
index f206b4d9a87a..5ac089618a60 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-gts
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-gts
@@ -1,5 +1,5 @@
 # $Id: Makefile.linux-xlr-4_19,v 0.1 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -24,6 +24,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 
 #
 # XLR system make file.
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc
index c3648ed85816..c38f713082bb 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc
@@ -1,5 +1,5 @@
 # $Id: Makefile.linux-iproc Exp $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -24,6 +24,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 # Makefile for iproc-CMICd
 
 # User must select one platform from below.By default ARM_LINUX is selected. .
@@ -77,7 +78,11 @@ endif
 
 CFLAGS += -fno-aggressive-loop-optimizations
 CFLAGS += -Wno-error=maybe-uninitialized
+CFLAGS += -Wno-error=unused-function
 CFLAGS += -Wno-error=array-bounds
+CFLAGS += -Wno-error=unused-variable
+CFLAGS += -Wno-error=memset-elt-size #SDK-232626
+CFLAGS += -Wno-error=unused-const-variable
 CFLAGS += -fgnu89-inline
 ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 8)" "1"
     CFLAGS += -Wno-stringop-overflow
@@ -87,25 +92,22 @@ endif
 ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 9)" "1"
 	CFLAGS += -Wno-address-of-packed-member
 endif
-ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \== 10)" "1"
-	#There might be a bug in GCC10 that cannot detect initialization correctly.
+ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 10)" "1"
 	CFLAGS += -Wno-error=uninitialized
 	CFLAGS += -Wno-error=format-overflow
 	CFLAGS += -fcommon
 endif
-ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \== 12)" "1"
+ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1"
 	CFLAGS += -flarge-source-files
 	CFLAGS += -Wno-error=address
 endif
+ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 13)" "1"
+	CFLAGS += -Wno-error=enum-int-mismatch
+endif
 
 CFGFLAGS += -D$(ENDIAN) -DIPROC_CMICD
 CFGFLAGS += -DBCM_PLATFORM_STRING=\"IPROC_CMICD\"
 
-#XLR-54
-CFLAGS += -Wno-error=memset-elt-size #SDK-232626
-CFLAGS += -Wno-error=unused-function
-CFLAGS += -Wno-error=unused-variable
-CFLAGS += -Wno-error=unused-const-variable
 ARCH = arm
 KBUILD_VERBOSE = 1
 
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-3_14 b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-3_14
index a71c3728b71e..61c7ad1d0e54 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-3_14
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-3_14
@@ -1,5 +1,5 @@
 # $Id: Makefile.linux-iproc-3_6,v 1.1 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -24,6 +24,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 # Makefile for iproc-CMICd
 
 # User must select one platform from below.By default ARM_LINUX is selected. .
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-4_4 b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-4_4
index 87e18c1a0591..f60d8c899109 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-4_4
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-4_4
@@ -1,5 +1,5 @@
 # $Id: Makefile.linux-iproc Exp $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -24,6 +24,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 # Makefile for iproc-CMICd
 
 # User must select one platform from below.By default ARM_LINUX is selected. .
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64 b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64
index 077d0c80355b..c98be8a2c04f 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64
@@ -1,5 +1,5 @@
 # $Id: Makefile.linux-iproc Exp $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -24,6 +24,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 # Makefile for iproc-CMICd
 
 # User must select one platform from below.By default ARM_LINUX is selected. .
@@ -59,12 +60,13 @@ endif
 
 # A72 tools
 # JIRA SONIC-69062
-TOOLCHAIN_BIN_DIR ?= $(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/bin
+TOOLCHAIN_BIN_DIR?=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/bin
 override PATH:=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/$(TARGET_ARCHITECTURE)/bin:$(TOOLCHAIN_BIN_DIR):$(PATH)
-LD_LIBRARY_PATH=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/lib
+LD_LIBRARY_PATH?=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/lib
 export TOOLCHAIN_BIN_DIR LD_LIBRARY_PATH
 
 CROSS_GCC_VER ?= $(shell $(TOOLCHAIN_BIN_DIR)/$(CROSS_COMPILE)gcc -dumpversion)
+CROSS_GCC_VER_MAJOR := $(shell echo $(CROSS_GCC_VER) | cut -f1 -d.)
 
 # Default Linux include directory
 ifeq (,$(LINUX_INCLUDE))
@@ -87,23 +89,26 @@ CFLAGS += -Wno-error=unused-function
 CFLAGS += -Wno-error=array-bounds
 CFLAGS += -Wno-error=format-overflow
 CFLAGS += -fgnu89-inline
-ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \>= 8)" "1"
+ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 8)" "1"
     CFLAGS += -Wno-stringop-overflow
     CFLAGS += -Wno-stringop-truncation
     CFLAGS += -Wno-error=restrict
 endif
-ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \>= 9)" "1"
+ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 9)" "1"
 	CFLAGS += -Wno-address-of-packed-member
 endif
-ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \== 10)" "1"
+ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 10)" "1"
 	CFLAGS += -Wno-error=uninitialized
 	CFLAGS += -Wno-error=format-overflow
 	CFLAGS += -fcommon
 endif
-ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \== 12)" "1"
+ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1"
 	CFLAGS += -flarge-source-files
 	CFLAGS += -Wno-error=address
 endif
+ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 13)" "1"
+	CFLAGS += -Wno-error=enum-int-mismatch
+endif
 
 CFGFLAGS += -D$(ENDIAN) -DIPROC_CMICD
 CFGFLAGS += -DBCM_PLATFORM_STRING=\"IPROC_CMICD\"
@@ -126,7 +131,7 @@ basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))"
 modname_flags  = $(if $(filter 1,$(words $(modname))),\
                  -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))")
 
-KFLAG_INCLD ?= $(LD_LIBRARY_PATH)/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include
+KFLAG_INCLD ?= $(LD_LIBRARY_PATH)/../gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include
 
 ifeq (,$(KFLAGS))
 KFLAGS := -D__LINUX_ARM_ARCH__=8 -D__KERNEL__ -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/generated/autoconf.h -I$(KERNDIR)/arch/arm64/include -I$(KERNDIR)/arch/arm64/include/generated -I$(KERNDIR)/arch/arm64/include/generated/uapi -I$(KERNDIR)/arch/arm64/include/generated/asm -I$(KERNDIR)/include/uapi -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/arch/arm64/include/uapi  -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -fno-pic -pipe -ffreestanding -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign -mcmodel=large
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel
index 39f7e53e32eb..37416d5897a4 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel
@@ -1,5 +1,5 @@
 # $Id: Makefile.linux-kernel,v 1.27 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -24,6 +24,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 
 # Configuration Flags
 
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6
index 94f25cf35868..229eee533163 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6
@@ -1,5 +1,5 @@
 # $Id: Makefile.linux-kernel-2_6,v 1.40 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -24,6 +24,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 
 # Configuration Flags
 
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6
index 028c90744f28..f5c51de59f5b 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6
@@ -1,5 +1,5 @@
 # $Id: Makefile.linux-kernel-3_6,v 1.2 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -24,6 +24,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 
 # Configuration Flags
 
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_18 b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_18
new file mode 100644
index 000000000000..535222656875
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_18
@@ -0,0 +1,161 @@
+# $Id: Makefile.linux-kernel-4_18,v 1.00 $
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
+# 
+
+# Configuration Flags
+
+# Filter out features that cannot or should not be supported in kernel mode
+
+_FEATURE_EXCLUDE_LIST += EDITLINE TCL OOB_RCPU CINT APIMODE DUNE_UI C_UNIT
+FEATURE_EXCLUDE_LIST = $(sort $(_FEATURE_EXCLUDE_LIST))
+
+# Tools
+
+# Conditionally Replaces DEFAULT var
+ifeq ($(origin CC),default)
+CC	= $(LSRUN) $(CROSS_COMPILE)gcc
+else
+# If using CLANG then revert the CC to default gcc tool
+ifeq ($(USE_CLANG),1)
+CC	= $(LSRUN) $(CROSS_COMPILE)gcc
+endif
+endif
+
+ifeq ($(origin CXX),default)
+CXX	= $(CROSS_COMPILE)g++
+endif
+
+ifeq ($(origin LD),default)
+LD	= $(CROSS_COMPILE)ld
+endif
+
+ifeq ($(origin AR),default)
+AR	= $(CROSS_COMPILE)gcc-ar
+endif
+
+ifeq ($(origin AS),default)
+AS	= $(CROSS_COMPILE)as
+endif
+
+ifeq ($(origin ARFLAGS),default)
+	ARFLAGS	= -rc
+endif
+
+STRIP	= $(CROSS_COMPILE)strip
+RANLIB  = $(CROSS_COMPILE)gcc-ranlib
+OBJCOPY = $(CROSS_COMPILE)objcopy
+NM      = $(CROSS_COMPILE)gcc-nm
+
+# Handle differences between gcc 2.x and gcc 3.x
+gcc-tune-flag = $(shell if ${CC} -dumpspecs | grep mcpu >/dev/null; then echo cpu; else echo tune; fi)
+
+# Configuration Variables
+
+# OSType Defines: This defines the type of RTOS or microkernel which you
+# are compiling the SAL (and its associated driver) for. New platforms
+# can be created by porting the routines (system.c) to your platform and
+# adding the define in this Makefile.
+OSTYPE = LINUX
+
+#
+# ORIGIN is used to Optionally select different CFLAGS. It is used to import
+# source from other vendors. If SOURCE=Broadcom, then the BCM_ flags are added
+# to those passed to the compiler. If SOURCE != Broadcom, BCM_ flags are NOT
+# added.
+#
+# Default specifies Broadcom
+#
+ifndef ORIGIN
+	ORIGIN = Broadcom
+endif
+
+#
+# STD_{C|CPP|CXX}FLAGS - Standard flags used by ALL compilations
+# BCM_{C|CPP|CXX}FLAGS - Flags used for Broadcom source files
+# OPT_{C|CPP|CXX}FLAGS - Defined in local make files BEFORE inclusion of 
+#			 this Makefile, to define local "Extra" flags.
+#
+ifdef IPROC_BUILD
+CFGFLAGS += -I$(SDK)/systems/linux/kernel/modules/include \
+	    -I$(SDK)/systems/bde/linux/include \
+	    -I$(LINUX_INCLUDE) \
+	    -I$(LINUX_INCLUDE)/uapi \
+	    -I$(LINUX_INCLUDE)/generated/uapi \
+	    -I$(KERNDIR)/arch/$(ARCH) \
+	    -I$(KERNDIR)/arch/$(ARCH)/include/uapi \
+	    -I$(KERNDIR)/arch/$(ARCH)/include/generated \
+	    -I$(KERNDIR)/arch/$(ARCH)/include/generated/uapi
+else
+CFGFLAGS += -I$(SDK)/systems/linux/kernel/modules/include \
+	    -I$(SDK)/systems/bde/linux/include \
+	    -I$(LINUX_INCLUDE) \
+	    -I$(LINUX_INCLUDE)/asm/gcc \
+	    -I$(LINUX_INCLUDE)/asm/mach-generic \
+	    -I$(LINUX_INCLUDE)/uapi \
+	    -I$(LINUX_INCLUDE)/generated/uapi \
+	    -I$(KERNDIR)/arch/$(ARCH) \
+	    -I$(KERNDIR)/arch/$(ARCH)/include/uapi \
+	    -I$(KERNDIR)/arch/$(ARCH)/include/generated \
+	    -I$(KERNDIR)/arch/$(ARCH)/include/generated/uapi
+endif
+
+CFGFLAGS += -DNO_FILEIO -DNO_CTRL_C -DNO_MEMTUNE
+
+CFGFLAGS += -D$(OSTYPE)
+
+# No user sal for the linux kernel
+# NO_SAL_APPL=1
+
+STD_CFLAGS = $(KFLAGS) $(CFGFLAGS)
+
+
+STD_CPPFLAGS = ${STD_CFLAGS}
+STD_CXXFLAGS = ${STD_CFLAGS}
+
+ifndef BCM_CFLAGS
+BCM_CFLAGS   = -Wall -Werror
+endif
+
+BCM_CPPFLAGS = ${BCM_CFLAGS}
+BCM_CXXFLAGS = ${BCM_CFLAGS}
+
+ifeq (${ORIGIN}, Broadcom)
+	CFLAGS   += ${STD_CFLAGS}   ${BCM_CFLAGS}   ${OPT_CFLAGS}
+	CPPFLAGS += ${STD_CPPFLAGS} ${BCM_CPPFLAGS} ${OPT_CPPFLAGS}
+	CXXFLAGS += ${STD_CXXFLAGS} ${BCM_CXXFLAGS} ${OPT_CXXFLAGS}
+else
+	CFLAGS   += ${STD_CFLAGS}   ${OPT_CFLAGS}
+	CPPFLAGS += ${STD_CPPFLAGS} ${OPT_CPPFLAGS}
+	CXXFLAGS += ${STD_CXXFLAGS} ${OPT_CXXFLAGS}
+endif
+
+#
+# Ignore pedantic flag for kernel modules
+#
+ifdef DEBUG_PEDANTIC
+DEBUG_PEDANTIC = FALSE
+endif
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4 b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4
index 24c0e2cf4d6e..10cfd9cd9e22 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4
@@ -1,5 +1,5 @@
 # $Id: Makefile.linux-kernel-2_6,v 1.40 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -24,6 +24,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 
 # Configuration Flags
 
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule b/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule
index 394ec9ebb85c..e14b6cd89b96 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule
@@ -1,5 +1,5 @@
 # $Id: Makefile.linux-kmodule-3_6,v 1.2 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -24,6 +24,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 
 # Due to the extensive use of driver libraries, the SDK usually builds
 # kernel modules from a precompiled object. To avoid various warnings
@@ -44,7 +45,9 @@ MODULE := $(MOD_NAME).o
 KMODULE := $(MOD_NAME).ko
 obj-m := $(MODULE)
 
-SAVE_CFLAGS := ${CFLAGS}
+# Get CFGFLAGS, but ignore CFLAGS
+include $(SDK)/make/Make.config
+CFLAGS :=
 
 ifeq (1,$(NO_PRECOMPILED_MODULE))
 # {
@@ -53,26 +56,26 @@ ifeq (1,$(NO_PRECOMPILED_MODULE))
 # of pointer-to-int and the other way round. So, we need to silence them.
 # Apart from that, we need a search path on the kernel's 'include' and the various
 # SDK 'include' directories. 
-# It is not clear why they need to be repeated in EXTRA_CFLAGS (probably because
-# of the compilation cycle which is done within the SDK environment).
 #
 ccflags-y   := \
   -Wno-pointer-to-int-cast \
   -Wno-int-to-pointer-cast \
-  -I$(KERNDIR)/include \
   -I$(SDK)/include \
   -I$(SDK)/systems/bde/linux/include \
   -I$(SDK)/systems/bde/shared/include \
   -I$(SDK)/systems/linux/kernel/modules/include
 
-include $(SDK)/make/Make.config
 #
-# For compilation of all module files on linux environment, make sure
-# all CFLAGS are passed to the module. This was not required when a
-# 'precompiled' object was used since it automatically got all these flags.
+# For compilation of all module files in Linux environment, make sure
+# all configuration flags (CFGFLAGS) are passed to the module. This
+# was not required when a 'precompiled' object was used since it
+# automatically got all these flags.
 #
-ccflags-y += $(KFLAGS)
-ccflags-y += $(CFLAGS)
+ccflags-y += $(CFGFLAGS) $(LKM_BUILD_INFO)
+
+# Required for older kernels
+export EXTRA_CFLAGS := $(ccflags-y)
+
 #
 # Reach here if this makefile is invoked
 #   from systems\bde\linux\kernel (module name: linux-kernel-bde.ko).
@@ -80,24 +83,11 @@ ccflags-y += $(CFLAGS)
 #   from systems/linux/kernel/modules/bcm-knet (module name: linux-bcm-knet)
 #   from systems/linux/kernel/modules/knet-cb (module name: linux-knet-cb)
 $(MOD_NAME)-y := $(MOD_OBJS)
-#
-# If, for any reason, the definition of CROSS_COMPILE was erased, then
-# set it, again.
-#
-ifeq ($(CROSS_COMPILE),)
-CROSS_COMPILE = /tools/bin/
-endif
-export CROSS_COMPILE
 # }
 else
 # {
 PRE_COMPILED_OBJ := obj_$(MOD_NAME).o
 $(MOD_NAME)-y := $(MODULE_SYM) $(PRE_COMPILED_OBJ)
-ifeq (,$(CROSS_COMPILE))
-export CROSS_COMPILE
-endif
-
-include $(SDK)/make/Make.config
 # }
 endif
 
@@ -113,13 +103,13 @@ A := ARCH=$(ARCH)
 export ARCH
 endif
 
+ifeq (,$(CROSS_COMPILE))
+export CROSS_COMPILE
+endif
+
 # Provide an option in case kernel was built in separate directory
 KERNBLDDIR ?= $(KERNDIR)
-#
-# Standard SDK include path for building source files that export
-# kernel symbols.
-#
-override EXTRA_CFLAGS = -I${SDK}/include -I${SDK}/systems/linux/kernel/modules/include -I${SDK}/systems/bde/linux/include
+
 #
 # If, for any reason, the definition of LD was erased, then
 # set it, again.
@@ -127,6 +117,7 @@ override EXTRA_CFLAGS = -I${SDK}/include -I${SDK}/systems/linux/kernel/modules/i
 ifeq ($(LD),)
 LD = $(CROSS_COMPILE)ld
 endif
+
 ifeq (1,$(NO_PRECOMPILED_MODULE))
 # {
 $(KMODULE):
@@ -137,7 +128,8 @@ $(KMODULE):
 	# This make creates the module's object. It, somehow, runs two cycls, one in SDK environment
 	# and one in the kernel's directory.
 	#
-	$(MAKE) -C $(KERNBLDDIR) CROSS_COMPILE=$(CROSS_COMPILE) LD=$(LD) M=$(PWD) modules
+	$(MAKE) -C $(KERNBLDDIR) CROSS_COMPILE=$(CROSS_COMPILE) LD=$(LD) M=$(PWD) \
+		quiet=$(quiet) KBUILD_VERBOSE=$(KBUILD_VERBOSE) modules
 	if [ ! -f Module.symvers ]; then echo "old kernel (pre-2.6.17)" > Module.symvers; fi
 	cp -f $(KMODULE) $(LIBDIR)
 # }
@@ -159,6 +151,3 @@ $(KMODULE):
 	rm -f $(PRE_COMPILED_OBJ)_shipped
 # }
 endif
-
-EXTRA_CFLAGS = $(CFLAGS)
-CFLAGS := ${SAVE_CFLAGS}
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-slk b/platform/broadcom/saibcm-modules/make/Makefile.linux-slk
index 8b063166975a..fe20b9d5892c 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-slk
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-slk
@@ -1,5 +1,5 @@
 # $Id: Makefile.linux-slk-3_14,v 1.2 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -24,6 +24,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 # Makefile for SLK(BCM957812)
 
 # User must select one platform from below.By default ARM_LINUX is selected. .
@@ -87,7 +88,13 @@ CFGFLAGS += -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS
 endif
 CFGFLAGS += -DPHYS_ADDRS_ARE_64BITS
 
+ifeq (1,$(USE_CLANG))
+CLANG_ADD_CFLAGS += --target=$(TARGET_ARCHITECTURE) --gcc-toolchain=$(TOOLCHAIN_BASE_DIR) --sysroot=$(TOOLCHAIN_BASE_DIR)/$(TARGET_ARCHITECTURE)/libc
+export KERNEL_LLVM = 0
+OPT_KERNEL_TOOLCHAIN = CC=$(CROSS_COMPILE)gcc LD=$(CROSS_COMPILE)ld AR=$(CROSS_COMPILE)ar
+else
 CFLAGS += -Wno-unused-value -Wno-unused-but-set-variable -Wno-sizeof-pointer-memaccess -fno-aggressive-loop-optimizations
+endif
 
 ifdef DPP_CHIPS
 CFLAGS += -DDUNE_BCM -D__DUNE_LINUX_BCM_CPU_PCP_DMA__
@@ -138,7 +145,7 @@ CROSS_GCC_VER ?= $(shell $(TOOLCHAIN_BIN_DIR)/$(CROSS_COMPILE)gcc -dumpversion)
 KFLAG_INCLD = $(TOOLCHAIN_BASE_DIR)/lib/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include
 
 ifeq (,$(KFLAGS))
-KFLAGS := -D__LINUX_ARM_ARCH__=8 -D__KERNEL__ -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/generated/autoconf.h -I$(KERNDIR)/arch/arm64/include -I$(KERNDIR)/arch/arm64/include/generated -I$(KERNDIR)/arch/arm64/include/generated/asm -I$(KERNDIR)/include/uapi -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/arch/arm64/include/uapi -Wall -Wstrict-prototypes -Wno-trigraphs -Os -fno-strict-aliasing -fno-common -fno-pic -pipe -ffreestanding -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign 
+KFLAGS := -D__LINUX_ARM_ARCH__=8 -D__KERNEL__ -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/generated/autoconf.h -I$(KERNDIR)/arch/arm64/include -I$(KERNDIR)/arch/arm64/include/generated -I$(KERNDIR)/arch/arm64/include/generated/asm -I$(KERNDIR)/include/uapi -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/arch/arm64/include/uapi -Wall -Wstrict-prototypes -Wno-trigraphs -Os -fno-strict-aliasing -fno-common -fno-pic -pipe -ffreestanding -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign -Wno-unused-but-set-variable
 endif
 
 ifdef LTSW_CHIPS
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-5_10 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-5_10
new file mode 100644
index 000000000000..4463b1c88b3b
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-5_10
@@ -0,0 +1,262 @@
+# $Id: Makefile.linux-gts,v 0.1 Broadcom SDK $
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
+# 
+
+#
+# x86_64 build for Fedora 28 - system make file.
+#
+#
+
+
+#############################################################################
+# this segment is custom and not sourced from any existing makefile         #
+# (base thanks to http:<slash><slash>confluence.broadcom.com/display/NTSWSW/X86+System) #
+#############################################################################
+
+# set up a basic feature list. tcl, etc. #
+#ifeq (,$(FEATURE_LIST))
+#FEATURE_LIST = TCL BFD PTP CINT L3 I2C MEM_SCAN EDITLINE BCM_SAL_PROFILE CUSTOMER TEST CHASSIS MSTP RCPU
+#endif
+
+# some basic path variables for tools and kernel source, etc #
+
+ifeq (1,$(NO_PRECOMPILED_MODULE))
+# {
+#
+# This is set due to some issue in binutils which has been fixed, apparently, in versions beyond 2.32.
+# If this is not used, an error 'File format not recognized' is ejected and the compilation fails.
+#
+export BINUTILSVER := 2.33.1
+# }
+else
+# {
+export BINUTILSVER := 2.38
+# }
+endif
+#
+# For ESW compilation, suppress 'stringop-overflow'
+#
+ifeq ($(BCM_ESW_SUPPORT),1)
+    CFGFLAGS += -Wno-error=stringop-overflow
+endif
+ifeq (1,$(GCC_12_1_0))
+    export BINUTILSVER := 2.38
+    export GCCVER := 12.1.0
+    TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel7/gcc/$(GCCVER)
+    CFGFLAGS += -Wno-error=address
+    CFGFLAGS += -Wno-error=format
+    CFGFLAGS += -Wno-error=long-long
+    CFGFLAGS += -Wno-error=pedantic
+    CFGFLAGS += -Wno-variadic-macros
+    CFGFLAGS += -Wno-error=overlength-strings
+else ifeq (1,$(GCC_13_1_0))
+    export BINUTILSVER := 2.38
+    export GCCVER := 13.1.0
+    TOOLCHAIN_DIR = /projects/ntsw-tools/linux/gcc/13.1.0
+    ifneq ($(DEBUG_OPTIMIZE),FALSE)
+    # {
+      # These flags are required for -O2 'optimized' compilation
+      #
+      CFGFLAGS += -Wno-error=stringop-truncation
+      CFGFLAGS += -Wno-error=array-bounds=
+    # }
+    endif
+    CFGFLAGS += -Wno-error=address
+    CFGFLAGS += -Wno-error=enum-int-mismatch
+    CFGFLAGS += -Wno-error=format
+    CFGFLAGS += -Wno-variadic-macros
+else
+    export BINUTILSVER := 2.38
+    export GCCVER := 11.2.0
+    TOOLCHAIN_DIR = /projects/ntsw-tools/linux/gcc/11.2.0-x86_64
+    ifneq ($(USE_CLANG),1)
+      CFGFLAGS += -Wno-error=sizeof-array-div
+      CFGFLAGS += -Wno-error=stringop-truncation
+      CFGFLAGS += -Wno-error=maybe-uninitialized
+      CFGFLAGS += -Wno-error=stringop-overread
+      CFGFLAGS += -Wno-error=format-overflow
+      CFGFLAGS += -Wno-error=array-bounds
+    endif
+endif
+
+BINUTILS_DIR = /tools/oss/packages/x86_64-rhel7/binutils/$(BINUTILSVER)/bin
+export TCL860 := 1
+
+# For GCC versions >= 4.7
+USE_GCC_TOOLS := 1
+#enables executables > 2GB
+#CFLAGS += -mcmodel=medium
+
+TARGET_MACHINE ?= x86_64
+KERNDIR       ?= /projects/ntsw-tools/linux/x86-kernel-5.10.67
+
+# set up cross compile prefix, tools dir variables. #
+#export CROSS_COMPILE := x86_64-fedora-linux-gnu-
+export TOOLS_DIR     := $(TOOLCHAIN_DIR)/bin
+
+# architecture. #
+ARCH                = x86_64
+#TARGET_ARCHITECTURE = x86_64-fedora-linux-gnu
+TARGET_ARCHITECTURE := x86_64-pc-linux-gnu
+TOOLCHAIN_BASE_DIR := $(TOOLCHAIN_DIR)
+
+ifeq (,$(BUILD_32BITS_EXEC))
+TOOLCHAIN_LIB_DIR:= $(TOOLCHAIN_DIR)/lib64
+else
+TOOLCHAIN_LIB_DIR:= $(TOOLCHAIN_DIR)/lib
+endif
+# set up paths. #
+#export LIBRARY_PATH := $(TOOLCHAIN_LIB_DIR):$(LIBRARY_PATH)
+export PATH         := $(TOOLS_DIR):$(BINUTILS_DIR):$(KERNDIR):$(PATH)
+
+# set up SYSINC path #
+export SYSINC := $(TOOLCHAIN_DIR)/lib/gcc/$(TARGET_ARCHITECTURE)/$(GCCVER)/include
+
+# CFLAGS/CFGFLAGS #
+ifdef SAND_CHIPS
+CFLAGS += -D__DUNE_GTS_BCM_CPU__
+endif
+CFLAGS += -DUSE_LINUX_BDE_MMAP=1
+#CFLAGS += -DBDE_LINUX_USE_MSI_INTERRUPT
+#
+#Flags to prevent gcc 8.1.0 new warnings to appear as errors.
+#(All these flags have been removed so as to activate the maximal types of
+#warning)
+#
+#CFLAGS += -Wno-error=unused-value
+#CFLAGS += -Wno-error=unused-but-set-variable
+#CFLAGS += -Wno-error=maybe-uninitialized
+#CFLAGS += -Wno-error=aggressive-loop-optimizations
+#CFLAGS += -Wno-error=array-bounds
+
+# set up KFLAGS appropriately. #
+# -fno-builtin needed for using kernel's version of memcpy instead of the gcc inline version
+ifeq (,$(KFLAGS))
+# {
+  KFLAGS := -I$(KERNDIR) -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/asm  -I$(KERNDIR)/arch/x86/include/generated  -I$(KERNDIR)/arch/x86/include/generated/uapi  -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wno-error=unused-value -Wno-error=cpp -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -O2 -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -funit-at-a-time -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -Wframe-larger-than=1024 -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-strict-overflow -fno-dwarf2-cfi-asm -fno-builtin
+  #
+  # Current version of CLANG seems to not recognize some of the options of kernel FLAGS.
+  #
+ifneq (1,$(USE_CLANG))
+# {
+  KFLAGS += -Wno-error=maybe-uninitialized -lc -fno-delete-null-pointer-checks -maccumulate-outgoing-args -fconserve-stack -mpreferred-stack-boundary=3
+# }
+else
+# {
+  KFLAGS +=  -Wno-error=address-of-packed-member
+# }
+endif
+ifeq (1,$(NO_PRECOMPILED_MODULE))
+# {
+  KFLAGS += -DNO_PRECOMPILED_MODULE=1
+  export KFLAGS
+# }
+else
+# {
+  KFLAGS += -DNO_PRECOMPILED_MODULE=0
+# }
+endif
+
+# }
+endif
+
+
+######################################################################
+# this segment comes from make/Makefile.linux-x86-smp_generic_64-2_6 #
+######################################################################
+CFGFLAGS += -DSAL_SPL_LOCK_ON_IRQ
+
+ifeq (,$(BUILD_32BITS_EXEC))
+CFLAGS += -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS
+else
+CFLAGS += -m32
+EXTRA_USER_LDFLAGS += -m32
+CFGFLAGS += -DSAL_BDE_32BIT_USER_64BIT_KERNEL
+endif
+CFLAGS += -DPHYS_ADDRS_ARE_64BITS
+
+
+###########################################################################################
+# This segment comes from make/Makefile.linux-x86-generic-common-2_6 (with modifications) #
+###########################################################################################
+
+# Default architecture
+ifeq (,$(ARCH))
+ARCH = x86_64
+endif
+
+# Noisy kernel build
+KBUILD_VERBOSE = 1
+
+export ARCH KBUILD_VERBOSE KERNDIR
+
+# Default Linux include directory
+ifeq (,$(LINUX_INCLUDE))
+LINUX_INCLUDE := $(KERNDIR)/include
+endif
+
+# autoconf.h was moved in later kernels
+AUTOCONF = $(KERNDIR)/include/generated/autoconf.h
+ifeq (,$(shell ls $(AUTOCONF) 2>/dev/null))
+AUTOCONF = $(KERNDIR)/include/linux/autoconf.h
+endif
+
+# gcc system include path
+#SYSINC = $(shell gcc -print-search-dirs | grep install | cut -c 10-)include
+
+
+##############################################################
+# This segment comes from make/Makefile.linux-x86-common-2_6 #
+##############################################################
+CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0
+ENDIAN = LE_HOST=1
+CFGFLAGS += -D$(ENDIAN)
+CFGFLAGS += -DBCM_PLATFORM_STRING=\"X86\"
+CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=32
+
+# Extra variables.
+EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags)
+
+comma = ,
+basetarget = $(basename $(notdir $@))
+modname = $(basetarget)
+
+name-fix = $(subst $(comma),_,$(subst -,_,$1))
+basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))"
+modname_flags  = $(if $(filter 1,$(words $(modname))),\
+-D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))")
+
+ifneq (, $(EDKHOST))
+# Default open source target build
+OPENSRC_BUILD ?= fed21-x86_64
+endif
+
+ifneq ($(targetplat),user)
+# By default we exclude -Werror from x86 kernel builds
+BCM_CFLAGS   = -Wall
+include ${SDK}/make/Makefile.linux-kernel-4_18
+endif
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-64-fc28 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-64-fc28
new file mode 100644
index 000000000000..5e86e1d579f2
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-64-fc28
@@ -0,0 +1,270 @@
+# $Id: Makefile.linux-gts,v 0.1 Broadcom SDK $
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
+# 
+
+#
+# x86_64 build for Fedora 28 - system make file.
+#
+#
+
+
+#############################################################################
+# this segment is custom and not sourced from any existing makefile         #
+# (base thanks to http:<slash><slash>confluence.broadcom.com/display/NTSWSW/X86+System) #
+#############################################################################
+
+# set up a basic feature list. tcl, etc. #
+#ifeq (,$(FEATURE_LIST))
+#FEATURE_LIST = TCL BFD PTP CINT L3 I2C MEM_SCAN EDITLINE BCM_SAL_PROFILE CUSTOMER TEST CHASSIS MSTP RCPU
+#endif
+
+# some basic path variables for tools and kernel source, etc #
+
+ifeq (1,$(NO_PRECOMPILED_MODULE))
+# {
+#
+# This is set due to some issue in binutils which has been fixed, apparently, in versions beyond 2.32.
+# If this is not used, an error 'File format not recognized' is ejected and the compilation fails.
+#
+export BINUTILSVER := 2.33.1
+# }
+else
+# {
+export BINUTILSVER := 2.38
+# }
+endif
+
+#
+# For ESW compilation, suppress 'stringop-overflow'
+#
+ifeq ($(BCM_ESW_SUPPORT),1)
+    CFGFLAGS += -Wno-error=stringop-overflow
+endif
+ifeq (1,$(GCC_11_2_0))
+  export BINUTILSVER := 2.38
+  export GCCVER := 11.2.0
+  TOOLCHAIN_DIR = /projects/ntsw-tools/linux/gcc/11.2.0-x86_64
+  CFGFLAGS += -Wno-error=stringop-truncation
+  CFGFLAGS += -Wno-error=maybe-uninitialized
+  CFGFLAGS += -Wno-error=stringop-overread
+  CFGFLAGS += -Wno-error=format-overflow
+  CFGFLAGS += -Wno-error=array-bounds
+else
+  ifeq (1,$(GCC_12_1_0))
+    export BINUTILSVER := 2.38
+    export GCCVER := 12.1.0
+    TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel7/gcc/$(GCCVER)
+    CFGFLAGS += -Wno-error=address
+    CFGFLAGS += -Wno-error=format
+    CFGFLAGS += -Wno-error=long-long
+    CFGFLAGS += -Wno-error=pedantic
+    CFGFLAGS += -Wno-variadic-macros
+    CFGFLAGS += -Wno-error=overlength-strings
+  else
+    ifeq (1,$(GCC_13_1_0))
+      export BINUTILSVER := 2.38
+      export GCCVER := 13.1.0
+      TOOLCHAIN_DIR = /projects/ntsw-tools/linux/gcc/13.1.0
+      ifneq ($(DEBUG_OPTIMIZE),FALSE)
+      # {
+        # These flags are required for -O2 'optimized' compilation
+        #
+        CFGFLAGS += -Wno-error=stringop-truncation
+        CFGFLAGS += -Wno-error=array-bounds=
+      # }
+      endif
+      CFGFLAGS += -Wno-error=address
+      CFGFLAGS += -Wno-error=enum-int-mismatch
+      CFGFLAGS += -Wno-error=format
+      CFGFLAGS += -Wno-variadic-macros
+    else
+      export GCCVER := 8.1.0
+      TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel7/gcc/$(GCCVER)
+    endif
+  endif
+endif
+BINUTILS_DIR = /tools/oss/packages/x86_64-rhel7/binutils/$(BINUTILSVER)/bin
+export TCL860 := 1
+
+# For GCC versions >= 4.7
+USE_GCC_TOOLS := 1
+#enables executables > 2GB
+#CFLAGS += -mcmodel=medium
+
+TARGET_MACHINE ?= x86_64
+ifeq (1,$(KERNEL_5_10))
+KERNDIR       ?= /projects/ntsw-tools/linux/x86-kernel-5.10.67
+else
+KERNDIR       ?= /projects/ntsw-tools/linux/x86-kernel-4.18.12
+endif
+
+# set up cross compile prefix, tools dir variables. #
+#export CROSS_COMPILE := x86_64-fedora-linux-gnu-
+export TOOLS_DIR     := $(TOOLCHAIN_DIR)/bin
+
+# architecture. #
+ARCH                = x86_64
+#TARGET_ARCHITECTURE = x86_64-fedora-linux-gnu
+TARGET_ARCHITECTURE := x86_64-pc-linux-gnu
+TOOLCHAIN_BASE_DIR := $(TOOLCHAIN_DIR)
+
+ifeq (,$(BUILD_32BITS_EXEC))
+TOOLCHAIN_LIB_DIR:= $(TOOLCHAIN_DIR)/lib64
+else
+TOOLCHAIN_LIB_DIR:= $(TOOLCHAIN_DIR)/lib
+endif
+# set up paths. #
+#export LIBRARY_PATH := $(TOOLCHAIN_LIB_DIR):$(LIBRARY_PATH)
+export PATH         := $(TOOLS_DIR):$(BINUTILS_DIR):$(KERNDIR):$(PATH)
+
+# set up SYSINC path #
+export SYSINC := $(TOOLCHAIN_DIR)/lib/gcc/$(TARGET_ARCHITECTURE)/$(GCCVER)/include
+
+# CFLAGS/CFGFLAGS #
+ifdef SAND_CHIPS
+CFGFLAGS += -D__DUNE_GTS_BCM_CPU__
+endif
+CFGFLAGS += -DUSE_LINUX_BDE_MMAP=1
+#CFGFLAGS += -DBDE_LINUX_USE_MSI_INTERRUPT
+#
+#Flags to prevent gcc 8.1.0 new warnings to appear as errors.
+#(All these flags have been removed so as to activate the maximal types of
+#warning)
+#
+#CFLAGS += -Wno-error=unused-value
+#CFLAGS += -Wno-error=unused-but-set-variable
+#CFLAGS += -Wno-error=maybe-uninitialized
+#CFLAGS += -Wno-error=aggressive-loop-optimizations
+#CFLAGS += -Wno-error=array-bounds
+
+# set up KFLAGS appropriately. #
+# -fno-builtin needed for using kernel's version of memcpy instead of the gcc inline version
+ifeq (,$(KFLAGS))
+# {
+  KFLAGS := -I$(KERNDIR) -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/asm  -I$(KERNDIR)/arch/x86/include/generated  -I$(KERNDIR)/arch/x86/include/generated/uapi  -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wno-error=unused-value -Wno-error=cpp -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -O2 -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -funit-at-a-time -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -Wframe-larger-than=1024 -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-strict-overflow -fno-dwarf2-cfi-asm -fno-builtin
+  #
+  # Current version of CLANG seems to not recognize some of the options of kernel FLAGS.
+  #
+ifneq (1,$(USE_CLANG))
+# {
+  KFLAGS += -Wno-error=maybe-uninitialized -lc -fno-delete-null-pointer-checks -maccumulate-outgoing-args -fconserve-stack -mpreferred-stack-boundary=3
+# }
+else
+# {
+  OPTFLAGS +=  -Wno-error=address-of-packed-member
+# }
+endif
+ifeq (1,$(NO_PRECOMPILED_MODULE))
+# {
+  KFLAGS += -DNO_PRECOMPILED_MODULE=1
+  export KFLAGS
+# }
+else
+# {
+  KFLAGS += -DNO_PRECOMPILED_MODULE=0
+# }
+endif
+
+# }
+endif
+
+
+######################################################################
+# this segment comes from make/Makefile.linux-x86-smp_generic_64-2_6 #
+######################################################################
+CFGFLAGS += -DSAL_SPL_LOCK_ON_IRQ
+
+ifeq (,$(BUILD_32BITS_EXEC))
+CFGFLAGS += -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS
+else
+CFLAGS += -m32
+EXTRA_USER_LDFLAGS += -m32
+CFGFLAGS += -DSAL_BDE_32BIT_USER_64BIT_KERNEL
+endif
+CFGFLAGS += -DPHYS_ADDRS_ARE_64BITS
+
+
+###########################################################################################
+# This segment comes from make/Makefile.linux-x86-generic-common-2_6 (with modifications) #
+###########################################################################################
+
+# Default architecture
+ifeq (,$(ARCH))
+ARCH = x86_64
+endif
+
+# Noisy kernel build
+KBUILD_VERBOSE = 1
+
+export ARCH KBUILD_VERBOSE KERNDIR
+
+# Default Linux include directory
+ifeq (,$(LINUX_INCLUDE))
+LINUX_INCLUDE := $(KERNDIR)/include
+endif
+
+# autoconf.h was moved in later kernels
+AUTOCONF = $(KERNDIR)/include/generated/autoconf.h
+ifeq (,$(shell ls $(AUTOCONF) 2>/dev/null))
+AUTOCONF = $(KERNDIR)/include/linux/autoconf.h
+endif
+
+# gcc system include path
+#SYSINC = $(shell gcc -print-search-dirs | grep install | cut -c 10-)include
+
+
+##############################################################
+# This segment comes from make/Makefile.linux-x86-common-2_6 #
+##############################################################
+CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0
+ENDIAN = LE_HOST=1
+CFGFLAGS += -D$(ENDIAN)
+CFGFLAGS += -DBCM_PLATFORM_STRING=\"X86\"
+CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=32
+
+# Extra variables.
+EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags)
+
+comma = ,
+basetarget = $(basename $(notdir $@))
+modname = $(basetarget)
+
+name-fix = $(subst $(comma),_,$(subst -,_,$1))
+basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))"
+modname_flags  = $(if $(filter 1,$(words $(modname))),\
+-D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))")
+
+ifneq (, $(EDKHOST))
+# Default open source target build
+OPENSRC_BUILD ?= fed21-x86_64
+endif
+
+ifneq ($(targetplat),user)
+# By default we exclude -Werror from x86 kernel builds
+BCM_CFLAGS   = -Wall
+include ${SDK}/make/Makefile.linux-kernel-4_18
+endif
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-common-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-common-2_6
index bffc823413bb..b888606ec2a6 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-common-2_6
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-common-2_6
@@ -1,5 +1,5 @@
 # $Id: Makefile.linux-x86-common-2_6,v 1.13 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -24,6 +24,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 
 CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0
 ENDIAN = LE_HOST=1
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6
index baa5253d5e14..726c2ea29e80 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6
@@ -1,5 +1,5 @@
 # $Id: Makefile.linux-x86-generic-common-2_6,v 1.2 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -24,6 +24,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 
 # Default kernel source directory
 ifeq (,$(KERNDIR))
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6
index 636b9b90acf2..e34cc42b3054 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6
@@ -1,5 +1,5 @@
 # $Id: Makefile.linux-x86-smp_generic_64-2_6,v 1.5 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -24,6 +24,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 
 CFGFLAGS += -DLONGS_ARE_64BITS
 CFGFLAGS += -DPTRS_ARE_64BITS
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr b/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr
index f206b4d9a87a..5ac089618a60 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr
@@ -1,5 +1,5 @@
 # $Id: Makefile.linux-xlr-4_19,v 0.1 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -24,6 +24,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 
 #
 # XLR system make file.
diff --git a/platform/broadcom/saibcm-modules/sdklt/Makefile b/platform/broadcom/saibcm-modules/sdklt/Makefile
index 5b25a349b18c..5600a33a3508 100644
--- a/platform/broadcom/saibcm-modules/sdklt/Makefile
+++ b/platform/broadcom/saibcm-modules/sdklt/Makefile
@@ -1,5 +1,5 @@
 #
-# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+# Copyright 2018-2024 Broadcom. All rights reserved.
 # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
 # 
 # This program is free software; you can redistribute it and/or
@@ -12,7 +12,7 @@
 # GNU General Public License for more details.
 # 
 # A copy of the GNU General Public License version 2 (GPLv2) can
-# be found in the LICENSES folder.$
+# be found in the LICENSES folder.
 #
 # Makefile for building Linux GPL kernel modules for SDKLT.
 #
@@ -60,7 +60,7 @@ GENL_PACKET_BLDDIR := $(OUTPUT_DIR)/genl-packet
 LKM_CFLAGS += -UNGKNET_NETIF_MAX -DNGKNET_NETIF_MAX=1056 -UNGKNET_FILTER_MAX -DNGKNET_FILTER_MAX=1025
 export LKM_CFLAGS
 
-kmod: bde knet knetcb genl-packet bcmgenl 
+kmod: bde knet knetcb genl-packet bcmgenl
 
 bde:
 	$(MAKE) -C $(SDK)/linux/bde SDK=$(SDK) \
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c
index 4f40652ae2a7..4f2f776c6535 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56690_a0/bcm56690_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56690_a0/bcm56690_a0_pdma_attach.c
index d5d70130278f..65d28a0113b6 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56690_a0/bcm56690_a0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56690_a0/bcm56690_a0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c
index dffcfd1e435a..cdff9ce0a3f9 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c
index acfb129b1f6f..8abad49b7006 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c
index 1cb85aba6e79..7b0668522807 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c
index 0910602e8ab2..3f2338263698 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c
index 257ccb91fd80..6f16042a5b9f 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c
index 710068c7adf2..e889d221a235 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c
index 2edfc9cb4e4b..fad6934e8696 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c
index 048dc4390f79..5a9745e211ee 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c
index 1d2a9f1b3cfd..75d0c2f36504 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78800_a0/bcm78800_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78800_a0/bcm78800_a0_pdma_attach.c
new file mode 100644
index 000000000000..ae9f2b921b92
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78800_a0/bcm78800_a0_pdma_attach.c
@@ -0,0 +1,38 @@
+/*! \file bcm78800_a0_pdma_attach.c
+ *
+ * Initialize PDMA driver resources.
+ *
+ */
+/*
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ */
+
+#include <bcmcnet/bcmcnet_core.h>
+#include <bcmcnet/bcmcnet_dev.h>
+#include <bcmcnet/bcmcnet_cmicr.h>
+
+int
+bcm78800_a0_cnet_pdma_attach(struct pdma_dev *dev)
+{
+    return bcmcnet_cmicr_pdma_driver_attach(dev);
+}
+
+int
+bcm78800_a0_cnet_pdma_detach(struct pdma_dev *dev)
+{
+    return bcmcnet_cmicr_pdma_driver_detach(dev);
+}
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c
index 19ebd22a7cad..a84aabba94b2 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78905_a0/bcm78905_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78905_a0/bcm78905_a0_pdma_attach.c
index 9d7712f46167..ded5f926a3ba 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78905_a0/bcm78905_a0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78905_a0/bcm78905_a0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c
index 6479583839f6..d64b67434a50 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
@@ -100,7 +100,16 @@ cmicd_pdma_hw_init(struct pdma_hw *hw)
         hw->dev->mode = DEV_MODE_UNET;
     }
 
-    
+
+
+
+
+
+
+
+
+
+
 
     /* Release credits to EP. Only do this once when HW is initialized. */
     hw->hdls.reg_rd32(hw, CMICD_EPINTF_RELEASE_CREDITS, &val);
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c
index 099dbbbbd9cd..6a322030492c 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c
@@ -38,7 +38,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -51,7 +51,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c
index 3c58900dd334..de9e2e3bdf09 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c
@@ -5,7 +5,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c
index 5fe7cfcb0d16..fdcc03ebba32 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
@@ -161,6 +161,7 @@ cmicr_pdma_hw_config(struct pdma_hw *hw)
     int grp, que;
     uint32_t qi;
     int ip_if_hdr_endian = 0;
+    int pipe;
     CMIC_CMC_PKTDMA_CTRLr_t pktdma_ctrl;
     CMIC_CMC_PKTDMA_INTR_ENABLEr_t pktdma_intr_enable;
     CMIC_CMC_PKTDMA_INTR_CLRr_t pktdma_intr_clr;
@@ -181,6 +182,7 @@ cmicr_pdma_hw_config(struct pdma_hw *hw)
         grp = rxq->group_id;
         que = rxq->chan_id % CMICR_PDMA_CMC_CHAN;
         que_ctrl = ctrl->grp[grp].que_ctrl[que];
+        pipe = ctrl->grp[grp].pipe[que];
 
         hw->hdls.reg_rd32(hw, CMICR_PDMA_RBUF_THRE(grp, que),
                           &CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_GET(pktdma_rxbuf_thresh));
@@ -204,6 +206,11 @@ cmicr_pdma_hw_config(struct pdma_hw *hw)
         }
         CMIC_CMC_PKTDMA_CTRLr_CONTIGUOUS_DESCRIPTORSf_SET(pktdma_ctrl, 1);
         CMIC_CMC_PKTDMA_CTRLr_DESC_DONE_INTR_MODEf_SET(pktdma_ctrl, 1);
+        if (pipe == 1) {
+            CMIC_CMC_PKTDMA_CTRLr_PIPE_MAPf_SET(pktdma_ctrl, 1);
+        } else if (pipe != 0) {
+            return SHR_E_CONFIG;
+        }
 
         hw->hdls.reg_wr32(hw, CMICR_PDMA_CTRL(grp, que),
                           CMIC_CMC_PKTDMA_CTRLr_GET(pktdma_ctrl));
@@ -216,6 +223,7 @@ cmicr_pdma_hw_config(struct pdma_hw *hw)
         grp = txq->group_id;
         que = txq->chan_id % CMICR_PDMA_CMC_CHAN;
         que_ctrl = ctrl->grp[grp].que_ctrl[que];
+        pipe = ctrl->grp[grp].pipe[que];
 
         hw->hdls.reg_wr32(hw, CMICR_PDMA_INTR_CLR(grp, que),
                           CMIC_CMC_PKTDMA_INTR_CLRr_GET(pktdma_intr_clr));
@@ -237,6 +245,11 @@ cmicr_pdma_hw_config(struct pdma_hw *hw)
         CMIC_CMC_PKTDMA_CTRLr_CONTIGUOUS_DESCRIPTORSf_SET(pktdma_ctrl, 1);
         CMIC_CMC_PKTDMA_CTRLr_DESC_DONE_INTR_MODEf_SET(pktdma_ctrl, 1);
         CMIC_CMC_PKTDMA_CTRLr_DIRECTIONf_SET(pktdma_ctrl, 1);
+        if (pipe == 1) {
+            CMIC_CMC_PKTDMA_CTRLr_PIPE_MAPf_SET(pktdma_ctrl, 1);
+        } else if (pipe != 0) {
+            return SHR_E_CONFIG;
+        }
 
         hw->hdls.reg_wr32(hw, CMICR_PDMA_CTRL(grp, que),
                           CMIC_CMC_PKTDMA_CTRLr_GET(pktdma_ctrl));
@@ -431,6 +444,26 @@ cmicr_pdma_chan_clear(struct pdma_hw *hw, int chan)
     return SHR_E_NONE;
 }
 
+/*!
+ * Check a channel
+ */
+static int
+cmicr_pdma_chan_check(struct pdma_hw *hw, int chan)
+{
+    CMIC_CMC_PKTDMA_STATr_t pktdma_stat;
+    int grp, que;
+
+    grp = chan / CMICR_PDMA_CMC_CHAN;
+    que = chan % CMICR_PDMA_CMC_CHAN;
+
+    MEMORY_BARRIER;
+
+    hw->hdls.reg_rd32(hw, CMICR_PDMA_STAT(grp, que),
+                      &CMIC_CMC_PKTDMA_STATr_GET(pktdma_stat));
+
+    return CMIC_CMC_PKTDMA_STATr_DESC_CONTROLLEDf_GET(pktdma_stat);
+}
+
 /*!
  * Get interrupt number for a channel
  */
@@ -661,6 +694,7 @@ bcmcnet_cmicr_pdma_hw_hdls_init(struct pdma_hw *hw)
     hw->hdls.chan_setup = cmicr_pdma_chan_setup;
     hw->hdls.chan_goto = cmicr_pdma_chan_goto;
     hw->hdls.chan_clear = cmicr_pdma_chan_clear;
+    hw->hdls.chan_check = cmicr_pdma_chan_check;
     hw->hdls.chan_intr_num_get = cmicr_pdma_chan_intr_num_get;
     hw->hdls.chan_intr_enable = cmicr_pdma_chan_intr_enable;
     hw->hdls.chan_intr_disable = cmicr_pdma_chan_intr_disable;
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c
index 024a258c78bb..8def97539560 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c
@@ -38,7 +38,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -51,7 +51,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c
index 90ab735a23e8..988e6373bb34 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c
index b7058b9f376a..690bf865f665 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c
@@ -38,7 +38,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -51,7 +51,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h
index 066ac59e3ce5..57310338525e 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMCNET_CMICD_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h
index df547b3f140a..73c52555c8ea 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMCNET_CMICR_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr2.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr2.h
index ddba32303371..d052d1abfb82 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr2.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr2.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMCNET_CMICR2_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h
index 768956b07c49..ebcaf595c043 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h
@@ -6,7 +6,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -19,7 +19,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMCNET_CMICR_ACC_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h
index 1fe344038def..538c8b2b2f80 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMCNET_CMICX_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h
index e255ec0d84eb..6ab4327a3ffc 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,14 +17,14 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMCNET_CORE_H
 #define BCMCNET_CORE_H
 
-#include <bcmcnet/bcmcnet_types.h>
-#include <bcmcnet/bcmcnet_internal.h>
+#include "bcmcnet_types.h"
+#include "bcmcnet_internal.h"
 
 /*!
  * \brief Packet header structure.
@@ -183,6 +183,9 @@ struct queue_group {
     /*! Header_byte_swap */
 #define PDMA_HDR_BYTE_SWAP  (1 << 2)
 
+    /*! Pipe interfaces */
+    int pipe[NUM_Q_PER_GRP];
+
     /*! Group ID */
     int id;
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h
index 0eeedb8c5a5d..67118f757096 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMCNET_DEV_H
@@ -172,6 +172,16 @@ typedef int (*chan_goto_f)(struct pdma_hw *hw, int chan, uint64_t addr);
  */
 typedef int (*chan_clear_f)(struct pdma_hw *hw, int chan);
 
+/*!
+ * \brief Check channel.
+ *
+ * \param [in] hw Pointer to hardware structure.
+ * \param [in] chan Channel number.
+ *
+ * \retval SHR_E_NONE No errors.
+ */
+typedef int (*chan_check_f)(struct pdma_hw *hw, int chan);
+
 /*!
  * \brief Get interrupt number.
  *
@@ -281,6 +291,9 @@ struct hw_handlers {
     /*! Channel clear */
     chan_clear_f chan_clear;
 
+    /*! Channel check */
+    chan_check_f chan_check;
+
     /*! Channel interrupt number get */
     chan_intr_num_get_f chan_intr_num_get;
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h
index 9b877502da18..e2e7f2c6cd41 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMCNET_INTERNAL_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h
index cb41361a3296..36dd2cf2ef11 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMCNET_RXTX_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h
index 54001f9c31d1..26c1992e0f53 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMCNET_TYPES_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c
index ed5d99b92add..6089df9ad9fd 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c
index 1501c487e4f3..1277187d6035 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_rxtx.c
index ed1df8faf37b..af745618b115 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_rxtx.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_rxtx.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
@@ -574,7 +574,8 @@ bcmcnet_pdma_group_poll(struct pdma_dev *dev, int group, int budget)
     struct pdma_rx_queue *rxq = NULL;
     struct pdma_tx_queue *txq = NULL;
     struct queue_group *grp = &ctrl->grp[group];
-    int done = 0, done_que, budget_que;
+    uint32_t intr_actives = 0;
+    int rx_done = 0, tx_done = 0, done_que, budget_que;
     int i;
 
     /* Acknowledge the interrupts */
@@ -584,6 +585,7 @@ bcmcnet_pdma_group_poll(struct pdma_dev *dev, int group, int budget)
             if (hw->hdls.chan_intr_query(hw, rxq->chan_id)) {
                 hw->hdls.chan_clear(hw, rxq->chan_id);
                 grp->poll_queues |= 1 << i;
+                intr_actives |= 1 << i;
             }
             if (rxq->state & PDMA_RX_QUEUE_BUSY) {
                 rxq->state &= ~PDMA_RX_QUEUE_BUSY;
@@ -596,6 +598,7 @@ bcmcnet_pdma_group_poll(struct pdma_dev *dev, int group, int budget)
             if (hw->hdls.chan_intr_query(hw, txq->chan_id)) {
                 hw->hdls.chan_clear(hw, txq->chan_id);
                 grp->poll_queues |= 1 << i;
+                intr_actives |= 1 << i;
             }
             if (txq->state & PDMA_TX_QUEUE_BUSY) {
                 txq->state &= ~PDMA_TX_QUEUE_BUSY;
@@ -625,10 +628,12 @@ bcmcnet_pdma_group_poll(struct pdma_dev *dev, int group, int budget)
         if (1 << i & grp->bm_rxq & grp->poll_queues) {
             rxq = grp->rx_queue[i];
             done_que = bcn_rx_poll(rxq, budget_que);
-            if (done_que < budget_que) {
-                grp->poll_queues &= ~(1 << i);
+            if (done_que >= budget_que ||
+                (done_que == 0 && (1 << i & intr_actives))) {
+                continue;
             }
-            done += done_que;
+            grp->poll_queues &= ~(1 << i);
+            rx_done += done_que;
         }
     }
 
@@ -636,13 +641,44 @@ bcmcnet_pdma_group_poll(struct pdma_dev *dev, int group, int budget)
     for (i = 0; i < dev->grp_queues; i++) {
         txq = grp->tx_queue[i];
         if (1 << i & grp->bm_txq & grp->poll_queues && !txq->free_thresh) {
-            if (bcn_tx_poll(txq, budget) < budget) {
-                grp->poll_queues &= ~(1 << i);
+            done_que = bcn_tx_poll(txq, budget);
+            if (done_que >= budget ||
+                (done_que == 0 && (1 << i & intr_actives))) {
+                continue;
             }
+            grp->poll_queues &= ~(1 << i);
+            tx_done += done_que;
         }
     }
 
-    return grp->poll_queues ? budget : done;
+    /* Reschedule the poll if not completed */
+    if (grp->poll_queues) {
+        return budget;
+    }
+
+    /* Check channel status before exits */
+    if (hw->hdls.chan_check) {
+        for (i = 0; i < dev->grp_queues; i++) {
+            rxq = grp->rx_queue[i];
+            if (rxq->state & PDMA_RX_QUEUE_ACTIVE) {
+                if (hw->hdls.chan_check(hw, rxq->chan_id)) {
+                    hw->hdls.chan_clear(hw, rxq->chan_id);
+                    grp->poll_queues |= 1 << i;
+                }
+                continue;
+            }
+            txq = grp->tx_queue[i];
+            if (txq->state & PDMA_TX_QUEUE_ACTIVE) {
+                if (hw->hdls.chan_check(hw, txq->chan_id)) {
+                    hw->hdls.chan_clear(hw, txq->chan_id);
+                    grp->poll_queues |= 1 << i;
+                }
+            }
+        }
+        return grp->poll_queues ? budget : rx_done;
+    } else {
+        return (rx_done + tx_done) ? budget : 0;
+    }
 }
 
 /*!
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h
index 35b3cf58e307..da607bc2a915 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h
@@ -4,7 +4,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/drd/instpkgs.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 /*
@@ -83,6 +83,12 @@
 #define BCM56692_DEVICE_ID                0xb692
 #define BCM56692_REV_A0                     0x01
 
+/* BCM56089 */
+#define BCM56089_VENDOR_ID                0x14e4
+#define BCM56089_DEVICE_ID                0xb089
+#define BCM56089_REV_A0                     0x01
+#define BCM56089_REV_A1                     0x02
+
 /* BCM56780 */
 #define BCM56780_VENDOR_ID                0x14e4
 #define BCM56780_DEVICE_ID                0xb780
@@ -220,6 +226,16 @@
 #define BCM56999_REV_A0                     0x01
 #define BCM56999_REV_B0                     0x11
 
+/* BCM78800 */
+#define BCM78800_VENDOR_ID                0x14e4
+#define BCM78800_DEVICE_ID                0xf800
+#define BCM78800_REV_A0                     0x01
+
+/* BCM78808 */
+#define BCM78808_VENDOR_ID                0x14e4
+#define BCM78808_DEVICE_ID                0xf808
+#define BCM78808_REV_A0                     0x01
+
 /* BCM78900 */
 #define BCM78900_VENDOR_ID                0x14e4
 #define BCM78900_DEVICE_ID                0xf900
@@ -409,6 +425,26 @@ BCMDRD_DEVLIST_ENTRY(BCM56692, BCM56692_VENDOR_ID, BCM56692_DEVICE_ID, BCM56692_
 #endif
 #endif
 
+#if BCMDRD_CONFIG_INCLUDE_BCM56089_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
+#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
+BCMDRD_DEVLIST_ENTRY(BCM56089, BCM56089_VENDOR_ID, BCM56089_DEVICE_ID, BCM56089_REV_A0, \
+                     0, 0, \
+                     bcm56780_a0, bcm56089_a0, bcm56089_a0, \
+                     "Trident4-X9", "BCM56780", \
+                     "6.4 Tb/s Firelight3 linecard switch.", 0, 0)
+#endif
+#endif
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56089_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
+#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
+BCMDRD_DEVLIST_ENTRY(BCM56089, BCM56089_VENDOR_ID, BCM56089_DEVICE_ID, BCM56089_REV_A1, \
+                     0, 0, \
+                     bcm56780_a0, bcm56089_a0, bcm56089_a1, \
+                     "Trident4-X9", "BCM56780", \
+                     "6.4 Tb/s Firelight3 linecard switch.", 0, 0)
+#endif
+#endif
+
 #if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
 BCMDRD_DEVLIST_ENTRY(BCM56780, BCM56780_VENDOR_ID, BCM56780_DEVICE_ID, BCM56780_REV_A0, \
                      0, 0, \
@@ -761,6 +797,24 @@ BCMDRD_DEVLIST_ENTRY(BCM56999, BCM56999_VENDOR_ID, BCM56999_DEVICE_ID, BCM56999_
 #endif
 #endif
 
+#if BCMDRD_CONFIG_INCLUDE_BCM78800_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
+BCMDRD_DEVLIST_ENTRY(BCM78800, BCM78800_VENDOR_ID, BCM78800_DEVICE_ID, BCM78800_REV_A0, \
+                     0, 0, \
+                     bcm78800_a0, bcm78800_a0, bcm78800_a0, \
+                     "Trident5", "BCM78800", \
+                     "16 Tbps Programmable Switch", 0, 0)
+#endif
+
+#if BCMDRD_CONFIG_INCLUDE_BCM78808_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
+#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
+BCMDRD_DEVLIST_ENTRY(BCM78808, BCM78808_VENDOR_ID, BCM78808_DEVICE_ID, BCM78808_REV_A0, \
+                     0, 0, \
+                     bcm78800_a0, bcm78808_a0, bcm78808_a0, \
+                     "Trident5", "BCM78800", \
+                     "8 Tbps Programmable Switch", 0, 0)
+#endif
+#endif
+
 #if BCMDRD_CONFIG_INCLUDE_BCM78900_B0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
 BCMDRD_DEVLIST_ENTRY(BCM78900, BCM78900_VENDOR_ID, BCM78900_DEVICE_ID, BCM78900_REV_B0, \
                      0, 0, \
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbol_types.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbol_types.h
index 0308cce576b3..1cca91ae081f 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbol_types.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbol_types.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMDRD_SYMBOL_TYPES_H
@@ -32,6 +32,9 @@
 
 /*! \{ */
 
+/*! Symbol applicable for SER test. */
+#define BCMDRD_SYMBOL_FLAG_SER_TEST                         (1U << 7)
+
 /*! Symbol data will be cleared on read. */
 #define BCMDRD_SYMBOL_FLAG_CLEAR_ON_READ                    (1U << 8)
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h
index 82c2946262a3..0a8faeb1362f 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMDRD_SYMBOLS_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h
index c341d7d2a351..2dfa87a635fe 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMDRD_TYPES_H
@@ -107,11 +107,8 @@
 
 #endif
 
-/*! Max size of register/memory in words */
-#define BCMDRD_MAX_PT_WSIZE       32
-
 /*! Words in port bit maps */
-#define BCMDRD_PBMP_WORD_MAX       (((BCMDRD_CONFIG_MAX_PORTS - 1) >> 5) + 1)
+#define BCMDRD_PBMP_WORD_MAX    (((BCMDRD_CONFIG_MAX_PORTS - 1) >> 5) + 1)
 
 /*!
  * Bitmap of ports of a particular type or properties.
@@ -324,6 +321,9 @@ bcmdrd_pbmp_parse(const char *str, bcmdrd_pbmp_t *pbmp);
 /*! Align a size to a specific number of bytes. */
 #define BCMDRD_ALIGN(_s, _a)    (((_s) + ((_a) - 1)) & ~((_a) - 1))
 
+/*! Maximum size of physical table entry (in words). */
+#define BCMDRD_MAX_PT_WSIZE \
+    BCMDRD_BYTES2WORDS(BCMDRD_CONFIG_MAX_PT_ENTRY_SIZE)
 
 /*! Create enumeration values from list of supported devices. */
 #define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config.h
index 3124811a4765..21380990a79e 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config.h
@@ -26,7 +26,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -39,7 +39,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMDRD_CONFIG_H
@@ -72,6 +72,16 @@
 #define BCMDRD_CONFIG_MAX_PIPES                    96
 #endif
 
+/*! Maximum size of physical table entries (in bytes). */
+#ifndef BCMDRD_CONFIG_MAX_PT_ENTRY_SIZE
+#define BCMDRD_CONFIG_MAX_PT_ENTRY_SIZE            128
+#endif
+
+/*! Maximum number of interrupt lines per chip supported. */
+#ifndef BCMDRD_CONFIG_MAX_IRQ_LINES
+#define BCMDRD_CONFIG_MAX_IRQ_LINES                16
+#endif
+
 /*! Direct access to memory-mapped registers. */
 #ifndef BCMDRD_CONFIG_MEMMAP_DIRECT
 #define BCMDRD_CONFIG_MEMMAP_DIRECT                0
@@ -154,6 +164,12 @@ CONFIG_OPTION(BCMDRD_CONFIG_MAX_PORTS)
 #ifdef BCMDRD_CONFIG_MAX_PIPES
 CONFIG_OPTION(BCMDRD_CONFIG_MAX_PIPES)
 #endif
+#ifdef BCMDRD_CONFIG_MAX_PT_ENTRY_SIZE
+CONFIG_OPTION(BCMDRD_CONFIG_MAX_PT_ENTRY_SIZE)
+#endif
+#ifdef BCMDRD_CONFIG_MAX_IRQ_LINES
+CONFIG_OPTION(BCMDRD_CONFIG_MAX_IRQ_LINES)
+#endif
 #ifdef BCMDRD_CONFIG_MEMMAP_DIRECT
 CONFIG_OPTION(BCMDRD_CONFIG_MEMMAP_DIRECT)
 #endif
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h
index 29ff05fc0864..f222215a68f0 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h
@@ -4,7 +4,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/drd/instpkgs.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 /*
@@ -26,17 +26,18 @@
  *
  *     (1) #define BCMDRD_CONFIG_INCLUDE_<CHIPNAME> [1|0]
  *             -- Include or exclude all revisions of the given device
- *             Example: #define BCMDRD_CONFIG_INCLUDE_BCM56080    1
+ *             Example: #define BCMDRD_CONFIG_INCLUDE_BCM56780    1
  *
  *     (2) #define BCMDRD_CONFIG_INCLUDE_<CHIPNAME>_<REV>X [1|0]
  *             -- Include or exclude all versions of the given revision
- *             Example: #define BCMDRD_CONFIG_INCLUDE_BCM56080_Ax 0
- *                      #define BCMDRD_CONFIG_INCLUde_BCM56080_Bx 1
+ *             Example: #define BCMDRD_CONFIG_INCLUDE_BCM56780_Ax 0
+ *                      #define BCMDRD_CONFIG_INCLUde_BCM56780_Bx 1
  *
  *     (3) #define BCMDRD_CONFIG_INCLUDE_<EXACT_CHIP> [1|0]
  *             -- Include or exclude an exact device
- *             Example: #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
- *                      #define BCMDRD_CONFIG_INCLUDE_BCM56080_A1 0
+ *             Example: #define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
+ *                      #define BCMDRD_CONFIG_INCLUDE_BCM56780_A1 0
+ *
  *
  * The value of BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT is used for any
  * chips which are left unspecified. Set this value to 1 or 0 to
@@ -322,6 +323,44 @@
 #endif
 
 
+/*
+ * BCM56089
+ */
+
+/* Sets the default include state if it was not given */
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56089
+#define BCMDRD_CONFIG_INCLUDE_BCM56089 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#endif
+/* Resolve revision dependencies */
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56089_Ax
+#define BCMDRD_CONFIG_INCLUDE_BCM56089_Ax BCMDRD_CONFIG_INCLUDE_BCM56089
+#endif
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56089_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM56089_A0 BCMDRD_CONFIG_INCLUDE_BCM56089_Ax
+#endif
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56089_A1
+#define BCMDRD_CONFIG_INCLUDE_BCM56089_A1 BCMDRD_CONFIG_INCLUDE_BCM56089_Ax
+#endif
+/* Resolve all interchip dependencies */
+#if BCMDRD_CONFIG_INCLUDE_BCM56089_A0 == 1
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#endif
+#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
+#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
+#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#endif
+#endif
+#if BCMDRD_CONFIG_INCLUDE_BCM56089_A1 == 1
+#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
+#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
+#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#endif
+#endif
+
+
 /*
  * BCM56780
  */
@@ -1086,6 +1125,51 @@
 #endif
 
 
+/*
+ * BCM78800
+ */
+
+/* Sets the default include state if it was not given */
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM78800
+#define BCMDRD_CONFIG_INCLUDE_BCM78800 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#endif
+/* Resolve revision dependencies */
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM78800_Ax
+#define BCMDRD_CONFIG_INCLUDE_BCM78800_Ax BCMDRD_CONFIG_INCLUDE_BCM78800
+#endif
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM78800_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM78800_A0 BCMDRD_CONFIG_INCLUDE_BCM78800_Ax
+#endif
+
+
+/*
+ * BCM78808
+ */
+
+/* Sets the default include state if it was not given */
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM78808
+#define BCMDRD_CONFIG_INCLUDE_BCM78808 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#endif
+/* Resolve revision dependencies */
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM78808_Ax
+#define BCMDRD_CONFIG_INCLUDE_BCM78808_Ax BCMDRD_CONFIG_INCLUDE_BCM78808
+#endif
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM78808_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM78808_A0 BCMDRD_CONFIG_INCLUDE_BCM78808_Ax
+#endif
+/* Resolve all interchip dependencies */
+#if BCMDRD_CONFIG_INCLUDE_BCM78808_A0 == 1
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM78800_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM78800_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#endif
+#if BCMDRD_CONFIG_INCLUDE_BCM78800_A0 != 1
+#undef BCMDRD_CONFIG_INCLUDE_BCM78800_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM78800_A0 1
+#define BCMDRD_CONFIG_INCLUDE_BCM78800_A0_IMPLIED 1
+#endif
+#endif
+
+
 /*
  * BCM78900
  */
@@ -1219,6 +1303,10 @@ CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56690_A0_IMPLIED)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56692)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56692_Ax)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56692_A0)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56089)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56089_Ax)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56089_A0)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56089_A1)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56780)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56780_Ax)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56780_A0)
@@ -1341,6 +1429,15 @@ CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56999_B0)
 #ifdef BCMDRD_CONFIG_INCLUDE_BCM56999_A0_IMPLIED
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56999_A0_IMPLIED)
 #endif
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78800)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78800_Ax)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78800_A0)
+#ifdef BCMDRD_CONFIG_INCLUDE_BCM78800_A0_IMPLIED
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78800_A0_IMPLIED)
+#endif
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78808)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78808_Ax)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78808_A0)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78900)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78900_Bx)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78900_B0)
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_conf.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_conf.h
new file mode 100644
index 000000000000..cbc9bd821543
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_conf.h
@@ -0,0 +1,165 @@
+/*! \file bcmlrd_conf.h
+ *
+ * \brief Public interface to access the configuration.
+ *
+ * This file should not depend on any other header files than the SAL
+ * types. It is used for building libraries that are only a small
+ * subset of the full SDK (e.g. the PMD library).
+ *
+ */
+/*
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ */
+
+#ifndef BCMLRD_CONF_H
+#define BCMLRD_CONF_H
+
+#include <sal/sal_types.h>
+
+/*! Create enumeration values from list of supported variants. */
+#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\
+    BCMLRD_VARIANT_T_##_bd##_##_ve,
+
+/*! Enumeration for all device variants. */
+typedef enum bcmlrd_variant_e {
+    BCMLRD_VARIANT_T_NONE = 0,
+/*! \cond */
+#include <bcmlrd/chip/bcmlrd_chip_variant.h>
+/*! \endcond */
+     BCMLRD_VARIANT_T_COUNT
+} bcmlrd_variant_t;
+
+/*!
+ * \brief Get device variant.
+ *
+ * Get device logical table variant,
+ * which is an enumeration of all supported logical table variants.
+ *
+ * \param [in] unit Unit number.
+ *
+ * \retval Variant type.
+ */
+extern bcmlrd_variant_t
+bcmlrd_variant_get(int unit);
+
+/*!
+ * \brief Set device variant.
+ *
+ * Set device logical table variant,
+ * which is an enumeration of all supported logical table variants.
+ *
+ * \param [in] unit     Unit number.
+ * \param [in] variant  BCMLRD variant enumeration.
+ *
+ * \retval 0  OK
+ * \retval <0 ERROR
+ */
+extern int
+bcmlrd_variant_set(int unit, bcmlrd_variant_t variant);
+
+/*!
+ * \brief Return bcmlrd_variant_t enum from LTL DEVICE_VARIANT_T.
+ *
+ * Return a bcmlrd_variant_t enum value from a LTL DEVICE_VARIANT_T
+ * symbolic value.
+ *
+ * The DEVICE_VARIANT_T LTL enum is based on all the devices and
+ * variants present in the source tree when SDKLT logical table code
+ * is generated and is numbered starting at one, assigning a unique
+ * integer for each base and variant logical table configuration. The
+ * bcmlrd_variant_t C enum values are determined at compile time based
+ * on which BCMDRD devices are configured for a particular compile and is
+ * also numbered starting at one. If a device is not enabled by
+ * BCMDRD, then all of the associated bcmlrd_variant_t enum symbols
+ * associated with that device are not present.
+ *
+ * \param [in] device_variant DEVICE_VARIANT_T symbolic value.
+ *
+ * \retval bcmlrd_variant_t value
+ */
+bcmlrd_variant_t
+bcmlrd_variant_from_device_variant_t(uint64_t device_variant);
+
+/*!
+ * \brief Return LTL DEVICE_VARIANT_T from the variant_t.
+ *
+ * Return a LTL DEVICE_VARIANT_T symbolic value from a
+ * bcmlrd_variant enum value.
+ *
+ * \param [in] variant bcmlrd_variant_t value.
+ *
+ * \retval DEVICE_VARIANT_T symbolic value.
+ *
+ */
+uint64_t
+bcmlrd_device_variant_t_from_variant(bcmlrd_variant_t variant);
+
+/*!
+ * \brief Return a bcmlrd_variant_t enum value from a given variant string.
+ *
+ * Return a bcmlrd_variant_t enum value from a given variant string.
+ *
+ * \param [in] unit Unit number.
+ * \param [in] variant_string variant name.
+ * \param [out] variant variant value.
+ *
+ * \retval 0  OK
+ * \retval <0 ERROR
+ */
+int
+bcmlrd_variant_from_variant_string(int unit,
+                                   const char* variant_string,
+                                   bcmlrd_variant_t* variant);
+
+/*!
+ * \brief Get base device variant.
+ *
+ * Get device logical table base variant, which is a set of initial
+ * mappings for a device.
+ *
+ * \param [in] unit Unit number.
+ *
+ * \retval Variant type.
+ */
+extern bcmlrd_variant_t
+bcmlrd_base_get(int unit);
+
+/*!
+ * \brief Get variant string.
+ *
+ * Get the variant string for the given bcmlrd_variant_t.
+ *
+ * \param [in] variant Variant enumeration value.
+ *
+ * \return Pointer to variant name.
+ */
+extern const char *
+bcmlrd_variant_string(bcmlrd_variant_t variant);
+
+/*!
+ * \brief Get variant name.
+ *
+ * Get the variant name for the given unit. If the unit does not
+ * exist, an empty string ("") is returned.
+ *
+ * \param [in] unit Unit number.
+ *
+ * \return Pointer to variant name.
+ */
+extern const char *
+bcmlrd_variant_name(int unit);
+
+#endif /* BCMLRD_CONF_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_id_types.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_id_types.h
new file mode 100644
index 000000000000..c10b86eb7b1c
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_id_types.h
@@ -0,0 +1,44 @@
+/*! \file bcmlrd_id_types.h
+ *
+ * \brief Logical Table ID Types
+ *
+ */
+/*
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ */
+
+#ifndef BCMLRD_ID_TYPES_H
+#define BCMLRD_ID_TYPES_H
+
+#include <bcmltd/bcmltd_id_types.h>
+
+/*!
+ * \brief Table identifier.
+ *
+ * Table identifier similar to those used by the DRD.
+ *
+ */
+typedef bcmltd_sid_t bcmlrd_sid_t;   /* Generic table ID local to symbol. */
+
+/*!
+ * \brief Field identifier.
+ *
+ * Field identifiers similar to those used by the DRD.
+ *
+ */
+typedef bcmltd_fid_t bcmlrd_fid_t;   /* DRD compatible field ID local to logical. */
+
+#endif /* BCMLRD_ID_TYPES_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_local_types.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_local_types.h
deleted file mode 100644
index 16bd47565773..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_local_types.h
+++ /dev/null
@@ -1,127 +0,0 @@
-/*! \file bcmlrd_local_types.h
- *
- * \brief Local Logical Table Types
- *
- * This file should not depend on any other header files than the SAL
- * types. It is used for building libraries that are only a small
- * subset of the full SDK (e.g. the PMD library).
- *
- */
-/*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- */
-
-#ifndef BCMLRD_LOCAL_TYPES_H
-#define BCMLRD_LOCAL_TYPES_H
-
-#include <sal/sal_types.h>
-
-/*! Create enumeration values from list of supported variants. */
-#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\
-    BCMLRD_VARIANT_T_##_bd##_##_ve,
-
-/*! Enumeration for all device variants. */
-typedef enum bcmlrd_variant_e {
-    BCMLRD_VARIANT_T_NONE = 0,
-/*! \cond */
-#include <bcmlrd/chip/bcmlrd_chip_variant.h>
-/*! \endcond */
-     BCMLRD_VARIANT_T_COUNT
-} bcmlrd_variant_t;
-
-/*!
- * \brief Information on match ID fields.
- *
- * This structure is used to store information for each
- * match id field.
- *
- */
-typedef struct bcmlrd_match_id_db_s {
-    /*! Match ID name. */
-    const char *name;
-
-    /*! Match. */
-    uint32_t match;
-
-    /*! Mask for match. */
-    uint32_t match_mask;
-
-    /*! Maxbit of the match id field in the physical container. */
-    uint8_t match_maxbit;
-
-    /*! Minbit of the match id field in the physical container. */
-    uint8_t match_minbit;
-
-    /*! Maxbit of the match id field. */
-    uint8_t maxbit;
-
-    /*! Minbit of the match id field. */
-    uint8_t minbit;
-
-    /*! Default value for the match id field. */
-    uint32_t value;
-
-    /*! Mask for the default value for the match id field. */
-    uint32_t mask;
-
-    /*! Maxbit of the field within match_id container. */
-    uint8_t pmaxbit;
-
-    /*! Minbit of the field within match_id container. */
-    uint8_t pminbit;
-
-    /*! ARC ID zone minbit. */
-    uint8_t zone_minbit;
-
-    /*! ARC ID mask. */
-    uint64_t arc_id_mask;
-
-    /*! Number of words used by zone bitmap. */
-    uint8_t num_zone_bmp_words;
-
-    /*! Zone bitmap. */
-    uint32_t *zone_bmp;
-} bcmlrd_match_id_db_t;
-
-/*!
- * \brief Get device variant.
- *
- * Get device logical table variant,
- * which is an enumeration of all supported logical table variants.
- *
- * \param [in] unit Unit number.
- *
- * \retval Variant type.
- */
-extern bcmlrd_variant_t
-bcmlrd_variant_get(int unit);
-
-/*!
- * \brief Set device variant.
- *
- * Set device logical table variant,
- * which is an enumeration of all supported logical table variants.
- *
- * \param [in] unit     Unit number.
- * \param [in] variant  BCMLRD variant enumeration.
- *
- * \retval 0  OK
- * \retval <0 ERROR
- */
-extern int
-bcmlrd_variant_set(int unit, bcmlrd_variant_t variant);
-
-#endif /* BCMLRD_LOCAL_TYPES_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_match_id_db.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_match_id_db.h
new file mode 100644
index 000000000000..79da85ad8a88
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_match_id_db.h
@@ -0,0 +1,367 @@
+/*! \file bcmlrd_match_id_db.h
+ *
+ * \brief Match ID DB data structures and APIs.
+ *
+ * This file constains the collection of
+ * Match ID DB related data structures and APIs.
+ *
+ */
+/*
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ */
+
+#ifndef BCMLRD_MATCH_ID_DB_H
+#define BCMLRD_MATCH_ID_DB_H
+
+#include <sal/sal_types.h>
+#include <bcmlrd/bcmlrd_id_types.h>
+
+/*!
+ * \brief Information on match ID fields.
+ *
+ * This structure is used to store information for each
+ * match id field.
+ *
+ */
+typedef struct bcmlrd_match_id_db_s {
+    /*! Match ID name. */
+    const char *name;
+
+    /*! Match. */
+    uint32_t match;
+
+    /*! Mask for match. */
+    uint32_t match_mask;
+
+    /*! Maxbit of the match id field in the physical container. */
+    uint8_t match_maxbit;
+
+    /*! Minbit of the match id field in the physical container. */
+    uint8_t match_minbit;
+
+    /*! Maxbit of the match id field. */
+    uint8_t maxbit;
+
+    /*! Minbit of the match id field. */
+    uint8_t minbit;
+
+    /*! Default value for the match id field. */
+    uint32_t value;
+
+    /*! Mask for the default value for the match id field. */
+    uint32_t mask;
+
+    /*! Maxbit of the field within match_id container. */
+    uint8_t pmaxbit;
+
+    /*! Minbit of the field within match_id container. */
+    uint8_t pminbit;
+
+    /*! ARC ID zone minbit. */
+    uint8_t zone_minbit;
+
+    /*! ARC ID mask. */
+    uint64_t arc_id_mask;
+
+    /*! Number of words used by zone bitmap. */
+    uint8_t num_zone_bmp_words;
+
+    /*! Zone bitmap. */
+    uint32_t *zone_bmp;
+} bcmlrd_match_id_db_t;
+
+/*!
+ * \brief Information on match ID fields.
+ *
+ * This structure is used to store information match id data.
+ *
+ */
+typedef struct bcmlrd_match_id_db_info_s {
+    /*! Number of entries in the match ID DB. */
+    uint32_t num_entries;
+
+    /*! Pointer to match ID DB. */
+    const bcmlrd_match_id_db_t *db;
+} bcmlrd_match_id_db_info_t;
+
+/*!
+ * \brief Function pointer to retrieve the match id information.
+ */
+typedef int (*bcmlrd_match_id_db_get_t)(int unit, const bcmlrd_sid_t sid,
+                                 const bcmlrd_fid_t fid,
+                                 const bcmlrd_match_id_db_t **info);
+
+/*!
+ * \brief Information on physical containers.
+ *
+ * This structure is used to store information for each
+ * physical container that a logical field is mapped to.
+ *
+ */
+typedef struct bcmlrd_cont_info_s {
+    /*! Section in which the container is available. */
+    uint8_t section_id;
+
+    /*! Offset of the container within the section. */
+    uint16_t cont_id;
+
+    /*! Width of the container in the section. */
+    uint8_t width;
+
+    /*! Bit offset of the container within the section. */
+    uint16_t bit_offset;
+} bcmlrd_cont_info_t;
+
+/*!
+ * \brief PDD information for physical containers.
+ *
+ * This structure is used to store PDD information for each
+ * physical container that a logical field is mapped to.
+ *
+ */
+typedef struct bcmlrd_pdd_info_s {
+    /*!
+     * Physical container id. This is the bit id of
+     * the physical container in the PDD bitmap.
+     */
+    uint16_t phy_cont_id;
+
+    /*!
+     * SBR Physical container id. This is the bit id of
+     * the physical container in the SBR bitmap.
+     */
+    uint16_t sbr_phy_cont_id;
+
+    /*! Physical container size. */
+    uint16_t phy_cont_size;
+
+    /*! Offset of action in the physical container. */
+    uint8_t offset;
+
+    /*! Width of action in the physical container from the offset */
+    uint8_t width;
+
+    /*! MFAP_INDEX to represend order of containers in contiguous */
+    uint8_t mfap_index;
+
+    /*! If set, then PDD is aligned from LSB. */
+    bool is_lsb;
+} bcmlrd_pdd_info_t;
+
+/*!
+ * \brief Container information per logical field.
+ *
+ * This structure is used to maintain the container information
+ * per logical field.
+ *
+ * Each logical field can be mapped to multiple containers.
+ * In which case, the information would be available as
+ * an array of this structure.
+ * Count specifies the array length.
+ *
+ */
+typedef struct bcmlrd_field_cont_info_s {
+    /*! Number of instances that physical container is mapped in the TILE. */
+    uint8_t instances;
+
+    /*! Number of containers that logical field is mapped to. */
+    uint8_t count;
+
+    /*! Physical container information. */
+    const bcmlrd_cont_info_t *info;
+} bcmlrd_field_cont_info_t;
+
+/*!
+ * \brief SBR type.
+ */
+typedef enum bcmlrd_field_sbr_type_e {
+    /*! Non SBR eligible action. */
+    BCMLRD_SBR_NONE,
+
+    /*! Non SBR eligible action, mapped to SBR container. */
+    BCMLRD_SBR_INTERNAL,
+
+    /*! SBR eligible action, mapped to SBR container. */
+    BCMLRD_SBR_EXTERNAL
+} bcmlrd_field_sbr_type_t;
+
+/*!
+ * \brief PDD information on containers per logical field.
+ *
+ * This structure is used to maintain the PDD information for containers
+ * per logical field.
+ *
+ * Each logical field can be mapped to multiple containers.
+ * In which case, the information would be available as
+ * an array of this structure.
+ * Count specifies the array length.
+ *
+ */
+typedef struct bcmlrd_field_pdd_info_s {
+    /*!  SBR type of the field. */
+    bcmlrd_field_sbr_type_t sbr_type;
+
+    /*! Number of containers that logical field is mapped to. */
+    uint8_t count;
+
+    /*! PDD information for each physical container. */
+    const bcmlrd_pdd_info_t *info;
+} bcmlrd_field_pdd_info_t;
+
+/*!
+ * \brief Container map information for logical field.
+ *
+ * This structure provides container and PDD information for
+ * each physical container that the logical field is mapped to.
+ *
+ */
+typedef struct bcmlrd_field_info_s {
+    /*! Name of the physical field. */
+    const char *name;
+
+   /*! Field ID. */
+   bcmltd_fid_t id;
+
+   /*! Container information for the logical field. */
+   const bcmlrd_field_cont_info_t *cont_info;
+
+   /*! PDD container information for the logical field. */
+   const bcmlrd_field_pdd_info_t *pdd_info;
+
+} bcmlrd_field_info_t;
+
+/*!
+ * \brief Table tile information for the special tables.
+ *
+ * This structure provides physical container information for each
+ * logical field in the tile mapped to the table.
+ *
+ */
+
+typedef struct bcmlrd_tile_pcm_info_s {
+    /*! Mux information for this logical table. */
+    uint32_t tile_id;
+
+    /*! Number of fields in the table. */
+    uint16_t field_count;
+
+    /*! Field information for each field. */
+    const bcmlrd_field_info_t *field_info;
+
+} bcmlrd_tile_pcm_info_t;
+
+/*!
+ * \brief Table information for the special tables.
+ *
+ * This structure provides physical container information for each
+ * logical field.
+ *
+ */
+typedef struct bcmlrd_table_pcm_info_s {
+    /*! Logical Table source ID. */
+    uint32_t src_id;
+
+    /*! Number of tiles in the table. */
+    uint8_t tile_count;
+
+    /*! Tile PCM information for each field. */
+    const bcmlrd_tile_pcm_info_t *tile_info;
+
+} bcmlrd_table_pcm_info_t;
+
+/*!
+ * \brief Table PCM configuration storage compact representation.
+ */
+typedef struct bcmlrd_pcm_conf_compact_rep_s {
+    /*! PCM configuration name. */
+    const char *name;
+
+    /*! Number of tables that support PCM in the device. */
+    uint32_t num_pcm;
+
+    /*! Pointer to the array of PCM configurations. */
+    const bcmlrd_table_pcm_info_t **pcm;
+
+} bcmlrd_pcm_conf_compact_rep_t;
+
+/*!
+ * \brief Table PCM configuration storage representation.
+ */
+typedef bcmlrd_pcm_conf_compact_rep_t bcmlrd_pcm_conf_rep_t;
+
+/*!
+ * \brief Return the PCM configuration for the given table.
+ *
+ * This routine returns the PCM configuration
+ * for the given unit, sid.
+ *
+ * \param [in]  unit            Unit number.
+ * \param [in]  sid             Logical Table symbol ID.
+ * \param [out] pcm_info        PCM configuration.
+ *
+ * \retval SHR_E_NONE           Success.
+ * \retval SHR_E_UNAVAIL        Unit/Table/PCM configuration not found.
+ *
+ */
+extern int
+bcmlrd_table_pcm_conf_get(int unit,
+                          bcmlrd_sid_t sid,
+                          const bcmlrd_table_pcm_info_t **pcm_info);
+
+/*!
+ * \brief Return the match id information.
+ *
+ * This routine returns the match id information
+ * for the given unit, table and field.
+ *
+ * \param [in]  unit            Unit number.
+ * \param [in]  sid             Logical Table symbol ID.
+ * \param [in]  fid             Logical field symbol ID.
+ * \param [out] info        Match ID data.
+ *
+ * \retval SHR_E_NONE           Success.
+ * \retval SHR_E_PARAM          Invalid unit, sid, fid or info.
+ * \retval SHR_E_UNAVAIL        Match ID data is not found.
+ *
+ */
+extern int
+bcmlrd_table_match_id_db_get(int unit,
+                             const bcmlrd_sid_t sid,
+                             const bcmlrd_fid_t fid,
+                             const bcmlrd_match_id_db_t **info);
+
+/*!
+ * \brief Return the match id information.
+ *
+ * This routine returns the match id information
+ * for the given match id in string format.
+ *
+ * \param [in]  unit            Unit number.
+ * \param [in]  spec            Match ID name.
+ * \param [out] info            Match ID data.
+ *
+ * \retval SHR_E_NONE           Success.
+ * \retval SHR_E_PARAM          Invalid unit, sid, fid or info.
+ * \retval SHR_E_NOT_FOUND      Match ID data is not found.
+ *
+ */
+extern int
+bcmlrd_table_match_id_data_get(int unit,
+                               const char *spec,
+                               const bcmlrd_match_id_db_t **info);
+
+
+#endif /* BCMLRD_MATCH_ID_DB_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h
index 057605be68da..d930d7b84969 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h
@@ -13,7 +13,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -26,7 +26,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMLRD_VARIANT_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h
index 89a7dc11cb71..db283eabc291 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMLRD_CHIP_VARIANT_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs.h
index 891c47c0c610..4cde687a4c31 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h
index 93529349fcce..20e2df1b9ee0 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 #ifndef BCMLRD_VARIANT_DEFS_INTERNAL_H
@@ -29,24 +29,24 @@
 /*+replace reverse */
 #include "../../defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h"
 #include "../../defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h"
+#include "../../defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_lrd_variant_def.h"
+#include "../../defs/generated/bcm78800_a0/bcm78800_a0_lrd_variant_def.h"
 #include "../../defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h"
 #include "../../defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h"
 #include "../../defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h"
 #include "../../defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h"
 #include "../../defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h"
 #include "../../defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h"
-#include "../../defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_lrd_variant_def.h"
-#include "../../defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_lrd_variant_def.h"
+#include "../../defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_lrd_variant_def.h"
 #include "../../defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h"
-#include "../../defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_lrd_variant_def.h"
-#include "../../defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_lrd_variant_def.h"
-#include "../../defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_lrd_variant_def.h"
-#include "../../defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_lrd_variant_def.h"
+#include "../../defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_lrd_variant_def.h"
+#include "../../defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_lrd_variant_def.h"
 #include "../../defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h"
-#include "../../defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_lrd_variant_def.h"
-#include "../../defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_lrd_variant_def.h"
-#include "../../defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_lrd_variant_def.h"
-#include "../../defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_lrd_variant_def.h"
+#include "../../defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_lrd_variant_def.h"
 #include "../../defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h"
 #include "../../defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h"
 #include "../../defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h"
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_limits.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_limits.h
index 2e84a01c79c7..10e6e258510d 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_limits.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_limits.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h
old mode 100644
new mode 100755
index fdd590bade2c..3ff1d4124353
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h
old mode 100644
new mode 100755
index 24ec0672a87c..ec14ef1471c5
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h
old mode 100644
new mode 100755
index 7ca42dd783f1..4bc81f8e4740
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h
old mode 100644
new mode 100755
index 75b35152571a..e4d567d33643
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_lrd_variant_def.h
old mode 100644
new mode 100755
similarity index 74%
rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_lrd_variant_def.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_lrd_variant_def.h
index e1b3b4a6f3c9..05347a2d6aa1
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_lrd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_lrd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,17 +20,17 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56880_A0_NFA_2_1_7_0_LRD_VARIANT_DEF_H
-#define GEN_BCM56880_A0_NFA_2_1_7_0_LRD_VARIANT_DEF_H
+#ifndef GEN_BCM56780_A0_CNA_6_5_30_2_0_LRD_VARIANT_DEF_H
+#define GEN_BCM56780_A0_CNA_6_5_30_2_0_LRD_VARIANT_DEF_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLRD_VARIANT_BCM56880_A0_NFA_2_1_7_0 BCMLTD_VARIANT_BCM56880_A0_NFA_2_1_7_0
+#define BCMLRD_VARIANT_BCM56780_A0_CNA_6_5_30_2_0 BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_30_2_0
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56880_A0_NFA_2_1_7_0_LRD_VARIANT_DEF_H */
+#endif /* GEN_BCM56780_A0_CNA_6_5_30_2_0_LRD_VARIANT_DEF_H */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_lrd_variant_def.h
old mode 100644
new mode 100755
similarity index 74%
rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_lrd_variant_def.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_lrd_variant_def.h
index 50ff08e32293..23f5c62f6f49
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_lrd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_lrd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,17 +20,17 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56780_A0_DNA_2_9_5_0_LRD_VARIANT_DEF_H
-#define GEN_BCM56780_A0_DNA_2_9_5_0_LRD_VARIANT_DEF_H
+#ifndef GEN_BCM56780_A0_DNA_6_5_30_2_0_LRD_VARIANT_DEF_H
+#define GEN_BCM56780_A0_DNA_6_5_30_2_0_LRD_VARIANT_DEF_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLRD_VARIANT_BCM56780_A0_DNA_2_9_5_0 BCMLTD_VARIANT_BCM56780_A0_DNA_2_9_5_0
+#define BCMLRD_VARIANT_BCM56780_A0_DNA_6_5_30_2_0 BCMLTD_VARIANT_BCM56780_A0_DNA_6_5_30_2_0
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56780_A0_DNA_2_9_5_0_LRD_VARIANT_DEF_H */
+#endif /* GEN_BCM56780_A0_DNA_6_5_30_2_0_LRD_VARIANT_DEF_H */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_lrd_variant_def.h
old mode 100644
new mode 100755
similarity index 74%
rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_lrd_variant_def.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_lrd_variant_def.h
index 2cff9e508c63..73fa0876d1b9
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_lrd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_lrd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,17 +20,17 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56780_A0_CNA_6_5_29_LRD_VARIANT_DEF_H
-#define GEN_BCM56780_A0_CNA_6_5_29_LRD_VARIANT_DEF_H
+#ifndef GEN_BCM56780_A0_HNA_6_5_30_6_0_LRD_VARIANT_DEF_H
+#define GEN_BCM56780_A0_HNA_6_5_30_6_0_LRD_VARIANT_DEF_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLRD_VARIANT_BCM56780_A0_CNA_6_5_29 BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_29
+#define BCMLRD_VARIANT_BCM56780_A0_HNA_6_5_30_6_0 BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_30_6_0
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56780_A0_CNA_6_5_29_LRD_VARIANT_DEF_H */
+#endif /* GEN_BCM56780_A0_HNA_6_5_30_6_0_LRD_VARIANT_DEF_H */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h
old mode 100644
new mode 100755
index ee2fe45de3d0..ee0ec5203cbc
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_lrd_variant_def.h
deleted file mode 100644
index 4949bfe0cc05..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_lrd_variant_def.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56880_A0_DNA_4_11_4_0_LRD_VARIANT_DEF_H
-#define GEN_BCM56880_A0_DNA_4_11_4_0_LRD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLRD_VARIANT_BCM56880_A0_DNA_4_11_4_0 BCMLTD_VARIANT_BCM56880_A0_DNA_4_11_4_0
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56880_A0_DNA_4_11_4_0_LRD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_lrd_variant_def.h
new file mode 100755
index 000000000000..e0984c1463c4
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_DNA_6_5_30_1_1_LRD_VARIANT_DEF_H
+#define GEN_BCM56880_A0_DNA_6_5_30_1_1_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56880_A0_DNA_6_5_30_1_1 BCMLTD_VARIANT_BCM56880_A0_DNA_6_5_30_1_1
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_DNA_6_5_30_1_1_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_lrd_variant_def.h
deleted file mode 100644
index e915df627b6d..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_lrd_variant_def.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56880_A0_HNA_6_5_29_2_2_LRD_VARIANT_DEF_H
-#define GEN_BCM56880_A0_HNA_6_5_29_2_2_LRD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLRD_VARIANT_BCM56880_A0_HNA_6_5_29_2_2 BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_29_2_2
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56880_A0_HNA_6_5_29_2_2_LRD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_lrd_variant_def.h
new file mode 100755
index 000000000000..1af4ea229bfa
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_HNA_6_5_30_3_0_LRD_VARIANT_DEF_H
+#define GEN_BCM56880_A0_HNA_6_5_30_3_0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56880_A0_HNA_6_5_30_3_0 BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_30_3_0
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_HNA_6_5_30_3_0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_lrd_variant_def.h
new file mode 100755
index 000000000000..af6ea4ed85bf
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_NFA_6_5_30_1_1_LRD_VARIANT_DEF_H
+#define GEN_BCM56880_A0_NFA_6_5_30_1_1_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56880_A0_NFA_6_5_30_1_1 BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_30_1_1
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_NFA_6_5_30_1_1_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h
old mode 100644
new mode 100755
index 632d17ad3d1a..f295d63c4191
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_lrd_variant_def.h
new file mode 100755
index 000000000000..dc5af3486b95
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_CNA_6_5_30_2_0_LRD_VARIANT_DEF_H
+#define GEN_BCM56890_A0_CNA_6_5_30_2_0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56890_A0_CNA_6_5_30_2_0 BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_30_2_0
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56890_A0_CNA_6_5_30_2_0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_lrd_variant_def.h
deleted file mode 100644
index 3aeffb76601f..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_lrd_variant_def.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56890_A0_DNA_6_5_29_1_2_LRD_VARIANT_DEF_H
-#define GEN_BCM56890_A0_DNA_6_5_29_1_2_LRD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLRD_VARIANT_BCM56890_A0_DNA_6_5_29_1_2 BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_29_1_2
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56890_A0_DNA_6_5_29_1_2_LRD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_lrd_variant_def.h
new file mode 100755
index 000000000000..32ca41777985
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_DNA_6_5_30_8_0_LRD_VARIANT_DEF_H
+#define GEN_BCM56890_A0_DNA_6_5_30_8_0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56890_A0_DNA_6_5_30_8_0 BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_30_8_0
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56890_A0_DNA_6_5_30_8_0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h
old mode 100644
new mode 100755
index d2da0a890e71..c5fed3024907
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h
old mode 100644
new mode 100755
index cbca48393a6b..09faa730dedd
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h
old mode 100644
new mode 100755
index 3e10c55d19a2..0f9d297a3a13
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h
old mode 100644
new mode 100755
index aae5253afd4e..e2f3c407f24d
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h
old mode 100644
new mode 100755
index 97faa4b4ff4b..11a7db0e1fb2
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h
old mode 100644
new mode 100755
index b47835d17bb0..a8ba50b696c1
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/bcm78800_a0_lrd_variant_def.h
old mode 100644
new mode 100755
similarity index 74%
rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_lrd_variant_def.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/bcm78800_a0_lrd_variant_def.h
index 09997a84fd37..24902afc37ab
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_lrd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/bcm78800_a0_lrd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,17 +20,17 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56880_A0_CNA_6_5_29_LRD_VARIANT_DEF_H
-#define GEN_BCM56880_A0_CNA_6_5_29_LRD_VARIANT_DEF_H
+#ifndef GEN_BCM78800_A0_LRD_VARIANT_DEF_H
+#define GEN_BCM78800_A0_LRD_VARIANT_DEF_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLRD_VARIANT_BCM56880_A0_CNA_6_5_29 BCMLTD_VARIANT_BCM56880_A0_CNA_6_5_29
+#define BCMLRD_VARIANT_BCM78800_A0_BASE BCMLTD_VARIANT_BCM78800_A0_BASE
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56880_A0_CNA_6_5_29_LRD_VARIANT_DEF_H */
+#endif /* GEN_BCM78800_A0_LRD_VARIANT_DEF_H */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_lrd_variant_def.h
new file mode 100755
index 000000000000..4708d71d8f59
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78800_A0_DNA_6_5_30_3_1_LRD_VARIANT_DEF_H
+#define GEN_BCM78800_A0_DNA_6_5_30_3_1_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM78800_A0_DNA_6_5_30_3_1 BCMLTD_VARIANT_BCM78800_A0_DNA_6_5_30_3_1
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM78800_A0_DNA_6_5_30_3_1_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h
old mode 100644
new mode 100755
index 97cd19d0cb81..2a1f1b5f1fc1
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h
old mode 100644
new mode 100755
index f89062126e7a..fb7e6a60ac42
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_id_types.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_id_types.h
new file mode 100644
index 000000000000..f692eefe3a49
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_id_types.h
@@ -0,0 +1,59 @@
+/*! \file bcmltd_id_types.h
+ *
+ * Logical Table Data ID Types header file
+ *
+ */
+/*
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ */
+
+#ifndef BCMLTD_ID_TYPES_H
+#define BCMLTD_ID_TYPES_H
+
+/*!
+ * \brief Logical table ID type.
+ */
+typedef uint32_t bcmltd_sid_t;
+
+/*!
+ * \brief Logical field ID type.
+ */
+typedef uint32_t bcmltd_fid_t;
+
+/*!
+ * \brief Global logical field ID type.
+ */
+typedef bcmltd_fid_t bcmltd_gfid_t;
+
+/*!
+ * \brief Invalid logical table ID.
+ */
+#define BCMLTD_SID_INVALID       ((bcmltd_sid_t)-1)
+
+/*!
+ * \brief Invalid logical table ID
+ *
+ * To store invalid LTID in HA for ISSU upgrade,
+ * this invalid LTID has to be used.
+ */
+#define BCMLTD_INVALID_LT       BCMLTD_SID_INVALID
+
+/*!
+ * \brief Invalid logical field ID.
+ */
+#define BCMLTD_FID_INVALID       ((bcmltd_fid_t)-1)
+
+#endif /* BCMLTD_ID_TYPES_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h
index 0cc8db4a5721..b677351a4473 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h
@@ -36,7 +36,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -49,7 +49,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMLTD_VARIANT_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h
index e485e8e48082..77c57e39584b 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMLTD_CHIP_VARIANT_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h
index 7e3bc1b1bdd8..506b8108dfd8 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMLTD_VARIANT_DEFS_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant.h
old mode 100644
new mode 100755
index f98c936175ff..1ccf6ca3bffb
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h
old mode 100644
new mode 100755
index 6dc83335f9c6..804903e09340
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 #ifndef GEN_BCMLTD_CONFIG_VARIANT_INTERNAL_H
@@ -29,24 +29,24 @@
 /*+replace reverse */
 #include "../../conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h"
 #include "../../conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h"
+#include "../../conf/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_config_variant.h"
+#include "../../conf/generated/bcm78800_a0/bcm78800_a0_ltd_config_variant.h"
 #include "../../conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h"
 #include "../../conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h"
 #include "../../conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h"
 #include "../../conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h"
 #include "../../conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h"
 #include "../../conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h"
-#include "../../conf/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_config_variant.h"
-#include "../../conf/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_config_variant.h"
+#include "../../conf/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_config_variant.h"
 #include "../../conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h"
-#include "../../conf/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_config_variant.h"
-#include "../../conf/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_config_variant.h"
-#include "../../conf/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_config_variant.h"
-#include "../../conf/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_config_variant.h"
+#include "../../conf/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_config_variant.h"
+#include "../../conf/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_config_variant.h"
 #include "../../conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h"
-#include "../../conf/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_config_variant.h"
-#include "../../conf/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_config_variant.h"
-#include "../../conf/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_config_variant.h"
-#include "../../conf/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_config_variant.h"
+#include "../../conf/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_config_variant.h"
 #include "../../conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h"
 #include "../../conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h"
 #include "../../conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h"
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h
old mode 100644
new mode 100755
index 0bda0b4d3d28..3c6d3899a48a
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h
old mode 100644
new mode 100755
index 10022839540f..079bbb5be10b
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 #ifndef GEN_BCMLTD_VARIANT_DEFS_INTERNAL_H
@@ -29,24 +29,24 @@
 /*+replace reverse */
 #include "../../defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h"
 #include "../../defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h"
+#include "../../defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_def.h"
+#include "../../defs/generated/bcm78800_a0/bcm78800_a0_ltd_variant_def.h"
 #include "../../defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h"
 #include "../../defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h"
 #include "../../defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h"
 #include "../../defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h"
 #include "../../defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h"
 #include "../../defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h"
-#include "../../defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_def.h"
-#include "../../defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_def.h"
+#include "../../defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_def.h"
 #include "../../defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h"
-#include "../../defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_def.h"
-#include "../../defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_def.h"
-#include "../../defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h"
-#include "../../defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_def.h"
+#include "../../defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_def.h"
+#include "../../defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_def.h"
 #include "../../defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h"
-#include "../../defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_def.h"
-#include "../../defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_def.h"
-#include "../../defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h"
-#include "../../defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_def.h"
+#include "../../defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_def.h"
 #include "../../defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h"
 #include "../../defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h"
 #include "../../defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h"
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h
old mode 100644
new mode 100755
index 74284a4580bd..7d68a5e02556
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 #ifndef GEN_BCMLTD_VARIANT_ENTRY_H
@@ -40,18 +40,18 @@
 #include "../../entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h"
 #include "../../entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h"
 #include "../../entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm78800_a0/bcm78800_a0_ltd_variant_entry.h"
 #include "../../entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h"
 #include "../../entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h"
 #include "../../entry/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h"
-#include "../../entry/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_entry.h"
-#include "../../entry/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_entry.h"
-#include "../../entry/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_entry.h"
-#include "../../entry/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_entry.h"
-#include "../../entry/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_entry.h"
-#include "../../entry/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_entry.h"
-#include "../../entry/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_entry.h"
-#include "../../entry/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_entry.h"
-#include "../../entry/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_entry.h"
-#include "../../entry/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_entry.h"
 /*-replace*/
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h
old mode 100644
new mode 100755
index 906edf8145bb..0be4c3277760
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h
old mode 100644
new mode 100755
index d629bff89b48..6cc7dd75e65d
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h
old mode 100644
new mode 100755
index 30106f76388f..594c7e6f451a
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h
old mode 100644
new mode 100755
index 7227784ceb35..8b436739ed3e
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h
old mode 100644
new mode 100755
index 90be2f0c90d4..f023bf66e6d1
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_config_variant.h
old mode 100644
new mode 100755
similarity index 69%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_config_variant.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_config_variant.h
index e8742350ab5a..0001e457e635
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,30 +20,30 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_CONFIG_VARIANT_H
-#define GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_CONFIG_VARIANT_H
+#ifndef GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
 #if BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_29_2_1
-#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_29_2_1 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_30_2_0
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_30_2_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
 #endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_29_2_1 == 1
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_30_2_0 == 1
 #ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE
 #define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1
 #endif
 #if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0
-#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_29_2_1=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0.
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_30_2_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0.
 #endif
 #endif
 #else
-#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_29_2_1 0
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_30_2_0 0
 #endif
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_CONFIG_VARIANT_H */
+#endif /* GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_config_variant.h
old mode 100644
new mode 100755
similarity index 68%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_config_variant.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_config_variant.h
index 6042fcf71fb2..2156d844ac42
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,30 +20,30 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56780_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H
-#define GEN_BCM56780_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H
+#ifndef GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
 #if BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_29
-#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_29 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_30_2_0
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_30_2_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
 #endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_29 == 1
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_30_2_0 == 1
 #ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE
 #define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1
 #endif
 #if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0
-#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_29=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0.
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_30_2_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0.
 #endif
 #endif
 #else
-#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_29 0
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_30_2_0 0
 #endif
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56780_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H */
+#endif /* GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_config_variant.h
old mode 100644
new mode 100755
similarity index 68%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_config_variant.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_config_variant.h
index 9180de74873d..d4642e4ca1bb
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,30 +20,30 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56780_A0_DNA_2_9_5_0_LTD_CONFIG_VARIANT_H
-#define GEN_BCM56780_A0_DNA_2_9_5_0_LTD_CONFIG_VARIANT_H
+#ifndef GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_CONFIG_VARIANT_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
 #if BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_2_9_5_0
-#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_2_9_5_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_30_6_0
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_30_6_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
 #endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_2_9_5_0 == 1
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_30_6_0 == 1
 #ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE
 #define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1
 #endif
 #if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0
-#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_2_9_5_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0.
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_30_6_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0.
 #endif
 #endif
 #else
-#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_2_9_5_0 0
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_30_6_0 0
 #endif
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56780_A0_DNA_2_9_5_0_LTD_CONFIG_VARIANT_H */
+#endif /* GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h
old mode 100644
new mode 100755
index 9e3c6596f63e..025abf2529c9
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_config_variant.h
old mode 100644
new mode 100755
similarity index 69%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_config_variant.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_config_variant.h
index 980b45b9a3a1..762391e56e02
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,30 +20,30 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_CONFIG_VARIANT_H
-#define GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_CONFIG_VARIANT_H
+#ifndef GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_CONFIG_VARIANT_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
 #if BCMDRD_CONFIG_INCLUDE_BCM56880_A0
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_29_2_2
-#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_29_2_2 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_30_1_1
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_30_1_1 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
 #endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_29_2_2 == 1
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_30_1_1 == 1
 #ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE
 #define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1
 #endif
 #if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0
-#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_29_2_2=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0.
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_30_1_1=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0.
 #endif
 #endif
 #else
-#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_29_2_2 0
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_30_1_1 0
 #endif
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_CONFIG_VARIANT_H */
+#endif /* GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_config_variant.h
old mode 100644
new mode 100755
similarity index 68%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_config_variant.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_config_variant.h
index 8f1c699c68c8..cf6f78a34401
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,30 +20,30 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56880_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H
-#define GEN_BCM56880_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H
+#ifndef GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_CONFIG_VARIANT_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
 #if BCMDRD_CONFIG_INCLUDE_BCM56880_A0
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_CNA_6_5_29
-#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_CNA_6_5_29 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_30_3_0
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_30_3_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
 #endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_CNA_6_5_29 == 1
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_30_3_0 == 1
 #ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE
 #define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1
 #endif
 #if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0
-#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_CNA_6_5_29=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0.
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_30_3_0=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0.
 #endif
 #endif
 #else
-#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_CNA_6_5_29 0
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_30_3_0 0
 #endif
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56880_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H */
+#endif /* GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_config_variant.h
deleted file mode 100644
index 29d6d5f893df..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_config_variant.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56880_A0_NFA_2_1_7_0_LTD_CONFIG_VARIANT_H
-#define GEN_BCM56880_A0_NFA_2_1_7_0_LTD_CONFIG_VARIANT_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_2_1_7_0
-#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_2_1_7_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
-#endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_2_1_7_0 == 1
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE
-#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1
-#endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0
-#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_2_1_7_0=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0.
-#endif
-#endif
-#else
-#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_2_1_7_0 0
-#endif
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56880_A0_NFA_2_1_7_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_config_variant.h
old mode 100644
new mode 100755
similarity index 68%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_config_variant.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_config_variant.h
index e8e0257edf42..d5fefbeb296f
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,30 +20,30 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56880_A0_DNA_4_11_4_0_LTD_CONFIG_VARIANT_H
-#define GEN_BCM56880_A0_DNA_4_11_4_0_LTD_CONFIG_VARIANT_H
+#ifndef GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_CONFIG_VARIANT_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
 #if BCMDRD_CONFIG_INCLUDE_BCM56880_A0
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_4_11_4_0
-#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_4_11_4_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_30_1_1
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_30_1_1 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
 #endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_4_11_4_0 == 1
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_30_1_1 == 1
 #ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE
 #define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1
 #endif
 #if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0
-#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_4_11_4_0=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0.
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_30_1_1=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0.
 #endif
 #endif
 #else
-#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_4_11_4_0 0
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_30_1_1 0
 #endif
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56880_A0_DNA_4_11_4_0_LTD_CONFIG_VARIANT_H */
+#endif /* GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h
old mode 100644
new mode 100755
index 66c3e309cd8a..10f01c3f2f37
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_config_variant.h
old mode 100644
new mode 100755
similarity index 69%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_config_variant.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_config_variant.h
index 9a01f8bb0e31..ec40fd40676d
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,30 +20,30 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_CONFIG_VARIANT_H
-#define GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_CONFIG_VARIANT_H
+#ifndef GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
 #if BCMDRD_CONFIG_INCLUDE_BCM56890_A0
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_29_1_2
-#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_29_1_2 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_30_2_0
+#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_30_2_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
 #endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_29_1_2 == 1
+#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_30_2_0 == 1
 #ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE
 #define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE 1
 #endif
 #if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE == 0
-#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_29_1_2=1, BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE=0.
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_30_2_0=1, BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE=0.
 #endif
 #endif
 #else
-#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_29_1_2 0
+#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_30_2_0 0
 #endif
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_CONFIG_VARIANT_H */
+#endif /* GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_config_variant.h
old mode 100644
new mode 100755
similarity index 68%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_config_variant.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_config_variant.h
index 1cef9cb84a3b..78af73f2edd5
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,30 +20,30 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56890_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H
-#define GEN_BCM56890_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H
+#ifndef GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_CONFIG_VARIANT_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
 #if BCMDRD_CONFIG_INCLUDE_BCM56890_A0
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_29
-#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_29 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_30_8_0
+#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_30_8_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
 #endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_29 == 1
+#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_30_8_0 == 1
 #ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE
 #define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE 1
 #endif
 #if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE == 0
-#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_29=1, BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE=0.
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_30_8_0=1, BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE=0.
 #endif
 #endif
 #else
-#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_29 0
+#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_30_8_0 0
 #endif
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56890_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H */
+#endif /* GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h
old mode 100644
new mode 100755
index 77423d685896..0fe4ceaffa9f
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h
old mode 100644
new mode 100755
index 02b632bdacda..90d141baf8dc
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h
old mode 100644
new mode 100755
index 9d93800a560f..5bba194fcab5
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h
old mode 100644
new mode 100755
index ada476f139d2..b5203e926f4c
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h
old mode 100644
new mode 100755
index ae5b86fc81f7..410ccaf5d52a
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h
old mode 100644
new mode 100755
index 34d7adec06b0..0383a1b35384
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/bcm78800_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/bcm78800_a0_ltd_config_variant.h
new file mode 100755
index 000000000000..ac5bb875d00e
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/bcm78800_a0_ltd_config_variant.h
@@ -0,0 +1,45 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78800_A0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM78800_A0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM78800_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE 0
+#endif
+
+#define BCMLTD_VARIANT_BCM78800_A0_BASE 12
+#define BCMLTD_VARIANT_LOCAL_BCM78800_A0_BASE 0
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM78800_A0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_config_variant.h
old mode 100644
new mode 100755
similarity index 55%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_config_variant.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_config_variant.h
index 2e32d65b22d2..96d06c9656de
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,30 +20,30 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56780_A0_INA_2_6_11_0_LTD_CONFIG_VARIANT_H
-#define GEN_BCM56780_A0_INA_2_6_11_0_LTD_CONFIG_VARIANT_H
+#ifndef GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_CONFIG_VARIANT_H
+#define GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_CONFIG_VARIANT_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_INA_2_6_11_0
-#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_INA_2_6_11_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#if BCMDRD_CONFIG_INCLUDE_BCM78800_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_30_3_1
+#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_30_3_1 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
 #endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_INA_2_6_11_0 == 1
-#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE
-#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1
+#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_30_3_1 == 1
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE 1
 #endif
-#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0
-#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_INA_2_6_11_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0.
+#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE == 0
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_30_3_1=1, BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE=0.
 #endif
 #endif
 #else
-#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_INA_2_6_11_0 0
+#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_30_3_1 0
 #endif
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56780_A0_INA_2_6_11_0_LTD_CONFIG_VARIANT_H */
+#endif /* GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h
old mode 100644
new mode 100755
index eb7d14aab0a3..10f1aebe6ebd
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
@@ -37,7 +37,7 @@
 #define BCMLTD_CONFIG_INCLUDE_BCM78900_B0_BASE 0
 #endif
 
-#define BCMLTD_VARIANT_BCM78900_B0_BASE 12
+#define BCMLTD_VARIANT_BCM78900_B0_BASE 13
 #define BCMLTD_VARIANT_LOCAL_BCM78900_B0_BASE 0
 
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h
old mode 100644
new mode 100755
index 980b50cfc729..0d3ff3b3a6ab
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
@@ -37,7 +37,7 @@
 #define BCMLTD_CONFIG_INCLUDE_BCM78905_A0_BASE 0
 #endif
 
-#define BCMLTD_VARIANT_BCM78905_A0_BASE 13
+#define BCMLTD_VARIANT_BCM78905_A0_BASE 14
 #define BCMLTD_VARIANT_LOCAL_BCM78905_A0_BASE 0
 
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h
old mode 100644
new mode 100755
index cd374ca3ff61..452962fed822
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h
old mode 100644
new mode 100755
index 6a0c404b24ad..e73cae8cbc0a
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h
old mode 100644
new mode 100755
index cef356943551..0a39b63ed1e2
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
@@ -29,7 +29,7 @@
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_29_0_1 14
+#define BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_29_0_1 15
 #define BCMLTD_VARIANT_LOCAL_BCM56690_A0_DNA_6_5_29_0_1 1
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h
old mode 100644
new mode 100755
index fed9f85ab7bc..3fdb9451f9a1
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_def.h
deleted file mode 100644
index 8020921322cd..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_def.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56780_A0_CNA_6_5_29_LTD_VARIANT_DEF_H
-#define GEN_BCM56780_A0_CNA_6_5_29_LTD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_29 15
-#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_6_5_29 1
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56780_A0_CNA_6_5_29_LTD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_def.h
old mode 100644
new mode 100755
similarity index 73%
rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_lrd_variant_def.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_def.h
index 08de29da3880..44c23d04e69b
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_lrd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,17 +20,18 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56780_A0_HNA_6_5_29_2_1_LRD_VARIANT_DEF_H
-#define GEN_BCM56780_A0_HNA_6_5_29_2_1_LRD_VARIANT_DEF_H
+#ifndef GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_VARIANT_DEF_H
+#define GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_VARIANT_DEF_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLRD_VARIANT_BCM56780_A0_HNA_6_5_29_2_1 BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_29_2_1
+#define BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_30_2_0 16
+#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_6_5_30_2_0 1
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56780_A0_HNA_6_5_29_2_1_LRD_VARIANT_DEF_H */
+#endif /* GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_VARIANT_DEF_H */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h
deleted file mode 100644
index 08fcbc515413..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56780_A0_DNA_2_9_5_0_LTD_VARIANT_DEF_H
-#define GEN_BCM56780_A0_DNA_2_9_5_0_LTD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLTD_VARIANT_BCM56780_A0_DNA_2_9_5_0 16
-#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_DNA_2_9_5_0 2
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56780_A0_DNA_2_9_5_0_LTD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_def.h
old mode 100644
new mode 100755
similarity index 73%
rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_lrd_variant_def.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_def.h
index 408b41986d42..99163f509a1b
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_lrd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,17 +20,18 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56780_A0_INA_2_6_11_0_LRD_VARIANT_DEF_H
-#define GEN_BCM56780_A0_INA_2_6_11_0_LRD_VARIANT_DEF_H
+#ifndef GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_VARIANT_DEF_H
+#define GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_VARIANT_DEF_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLRD_VARIANT_BCM56780_A0_INA_2_6_11_0 BCMLTD_VARIANT_BCM56780_A0_INA_2_6_11_0
+#define BCMLTD_VARIANT_BCM56780_A0_DNA_6_5_30_2_0 17
+#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_DNA_6_5_30_2_0 2
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56780_A0_INA_2_6_11_0_LRD_VARIANT_DEF_H */
+#endif /* GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_VARIANT_DEF_H */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_def.h
deleted file mode 100644
index 262e642c0f4e..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_def.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_VARIANT_DEF_H
-#define GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_29_2_1 17
-#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_6_5_29_2_1 3
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_def.h
new file mode 100755
index 000000000000..b8378adb1cc0
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_VARIANT_DEF_H
+#define GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_30_6_0 18
+#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_6_5_30_6_0 3
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_def.h
deleted file mode 100644
index d0f4b434887a..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_def.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56780_A0_INA_2_6_11_0_LTD_VARIANT_DEF_H
-#define GEN_BCM56780_A0_INA_2_6_11_0_LTD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLTD_VARIANT_BCM56780_A0_INA_2_6_11_0 18
-#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_INA_2_6_11_0 4
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56780_A0_INA_2_6_11_0_LTD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h
old mode 100644
new mode 100755
index 55eb2c8d2c14..bc2252b67852
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_def.h
deleted file mode 100644
index 3e770ef00e36..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_def.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56880_A0_CNA_6_5_29_LTD_VARIANT_DEF_H
-#define GEN_BCM56880_A0_CNA_6_5_29_LTD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLTD_VARIANT_BCM56880_A0_CNA_6_5_29 19
-#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_CNA_6_5_29 1
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56880_A0_CNA_6_5_29_LTD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h
deleted file mode 100644
index f5b982438eee..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56880_A0_DNA_4_11_4_0_LTD_VARIANT_DEF_H
-#define GEN_BCM56880_A0_DNA_4_11_4_0_LTD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLTD_VARIANT_BCM56880_A0_DNA_4_11_4_0 20
-#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_DNA_4_11_4_0 2
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56880_A0_DNA_4_11_4_0_LTD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_def.h
new file mode 100755
index 000000000000..40df3e6b0c99
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_VARIANT_DEF_H
+#define GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM56880_A0_DNA_6_5_30_1_1 19
+#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_DNA_6_5_30_1_1 1
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_def.h
deleted file mode 100644
index 23fd31997c9d..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_def.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_VARIANT_DEF_H
-#define GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_29_2_2 21
-#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_6_5_29_2_2 3
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_def.h
new file mode 100755
index 000000000000..8528d3a84522
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_VARIANT_DEF_H
+#define GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_30_3_0 20
+#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_6_5_30_3_0 2
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_def.h
deleted file mode 100644
index 7adb2f316477..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_def.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56880_A0_NFA_2_1_7_0_LTD_VARIANT_DEF_H
-#define GEN_BCM56880_A0_NFA_2_1_7_0_LTD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLTD_VARIANT_BCM56880_A0_NFA_2_1_7_0 22
-#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_NFA_2_1_7_0 4
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56880_A0_NFA_2_1_7_0_LTD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_def.h
new file mode 100755
index 000000000000..b99fdff03335
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_VARIANT_DEF_H
+#define GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_30_1_1 21
+#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_NFA_6_5_30_1_1 3
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h
old mode 100644
new mode 100755
index 8ddcc4ae266c..26ea9a04231d
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_def.h
deleted file mode 100644
index 69febdfe9054..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_def.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56890_A0_CNA_6_5_29_LTD_VARIANT_DEF_H
-#define GEN_BCM56890_A0_CNA_6_5_29_LTD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_29 23
-#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_CNA_6_5_29 1
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56890_A0_CNA_6_5_29_LTD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_def.h
new file mode 100755
index 000000000000..d4fd99e762ab
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_VARIANT_DEF_H
+#define GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_30_2_0 22
+#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_CNA_6_5_30_2_0 1
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_def.h
deleted file mode 100644
index 9d77a880569f..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_def.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_VARIANT_DEF_H
-#define GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_29_1_2 24
-#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_6_5_29_1_2 2
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_def.h
new file mode 100755
index 000000000000..6e094163dd9d
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_VARIANT_DEF_H
+#define GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_30_8_0 23
+#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_6_5_30_8_0 2
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h
old mode 100644
new mode 100755
index 736ba9ae6652..86a131856a56
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h
old mode 100644
new mode 100755
index e0433c68e538..f753a77001bd
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h
old mode 100644
new mode 100755
index a33c95324a5b..340ea5336680
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h
old mode 100644
new mode 100755
index 776f3a936bd6..c7d11581444a
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h
old mode 100644
new mode 100755
index 42c700c8a0ef..d193bf95ab9d
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h
old mode 100644
new mode 100755
index ea1328bf7c34..f89ecfad9f2b
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/bcm78800_a0_ltd_variant_def.h
old mode 100644
new mode 100755
similarity index 74%
rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_lrd_variant_def.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/bcm78800_a0_ltd_variant_def.h
index 3bc2b93baffa..ad0e9daf7db9
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_lrd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/bcm78800_a0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,17 +20,18 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56890_A0_CNA_6_5_29_LRD_VARIANT_DEF_H
-#define GEN_BCM56890_A0_CNA_6_5_29_LRD_VARIANT_DEF_H
+#ifndef GEN_BCM78800_A0_LTD_VARIANT_DEF_H
+#define GEN_BCM78800_A0_LTD_VARIANT_DEF_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLRD_VARIANT_BCM56890_A0_CNA_6_5_29 BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_29
+#define BCMLTD_VARIANT_BCM78800_A0_BASE 12
+#define BCMLTD_VARIANT_LOCAL_BCM78800_A0_BASE 0
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56890_A0_CNA_6_5_29_LRD_VARIANT_DEF_H */
+#endif /* GEN_BCM78800_A0_LTD_VARIANT_DEF_H */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_def.h
new file mode 100755
index 000000000000..752feaa57d4f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_VARIANT_DEF_H
+#define GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM78800_A0_DNA_6_5_30_3_1 24
+#define BCMLTD_VARIANT_LOCAL_BCM78800_A0_DNA_6_5_30_3_1 1
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h
old mode 100644
new mode 100755
index e645660d2dee..92d633da92c6
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
@@ -29,7 +29,7 @@
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM78900_B0_BASE 12
+#define BCMLTD_VARIANT_BCM78900_B0_BASE 13
 #define BCMLTD_VARIANT_LOCAL_BCM78900_B0_BASE 0
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h
old mode 100644
new mode 100755
index 8b43d0ab1256..b4a083cca9a8
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
@@ -29,7 +29,7 @@
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM78905_A0_BASE 13
+#define BCMLTD_VARIANT_BCM78905_A0_BASE 14
 #define BCMLTD_VARIANT_LOCAL_BCM78905_A0_BASE 0
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h
old mode 100644
new mode 100755
index 455f50de4a23..69f0454d203b
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h
old mode 100644
new mode 100755
index ceb53c56ddc7..e211e30cffa6
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h
old mode 100644
new mode 100755
index a738422242f0..63d52143e949
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h
old mode 100644
new mode 100755
index 98300f236c9f..3ef67ceabd3b
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_entry.h
deleted file mode 100644
index c36df37d192f..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_entry.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56780_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56780_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_def.h>
-#endif /* GEN_BCM56780_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H */
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_29 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,cna_6_5_29,CNA_6_5_29,_,BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_29,BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_6_5_29,NULL,0,0)
-#endif
-
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_entry.h
old mode 100644
new mode 100755
similarity index 62%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_entry.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_entry.h
index b15dc23906d8..82e276e6ab17
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,19 +20,19 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_def.h>
-#endif /* GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_VARIANT_ENTRY_H */
+#ifndef GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_ltd_variant_def.h>
+#endif /* GEN_BCM56780_A0_CNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H */
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_29_2_2 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,hna_6_5_29_2_2,HNA_6_5_29_2_2,_,BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_29_2_2,BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_6_5_29_2_2,NULL,0,0)
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_30_2_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,cna_6_5_30_2_0,CNA_6_5_30_2_0,_,BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_30_2_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_6_5_30_2_0,NULL,0,0)
 #endif
 
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_entry.h
deleted file mode 100644
index ac15ceee07b8..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_entry.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56780_A0_DNA_2_9_5_0_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56780_A0_DNA_2_9_5_0_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h>
-#endif /* GEN_BCM56780_A0_DNA_2_9_5_0_LTD_VARIANT_ENTRY_H */
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_2_9_5_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,dna_2_9_5_0,DNA_2_9_5_0,_,BCMLTD_VARIANT_BCM56780_A0_DNA_2_9_5_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_DNA_2_9_5_0,NULL,0,0)
-#endif
-
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_entry.h
old mode 100644
new mode 100755
similarity index 62%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_entry.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_entry.h
index 70b562ba5e28..6fe0337c0d6a
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,19 +20,19 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_def.h>
-#endif /* GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_VARIANT_ENTRY_H */
+#ifndef GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_ltd_variant_def.h>
+#endif /* GEN_BCM56780_A0_DNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H */
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_29_1_2 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,dna_6_5_29_1_2,DNA_6_5_29_1_2,_,BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_29_1_2,BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_6_5_29_1_2,NULL,0,0)
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_6_5_30_2_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,dna_6_5_30_2_0,DNA_6_5_30_2_0,_,BCMLTD_VARIANT_BCM56780_A0_DNA_6_5_30_2_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_DNA_6_5_30_2_0,NULL,0,0)
 #endif
 
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_entry.h
old mode 100644
new mode 100755
similarity index 62%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_entry.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_entry.h
index f0cd76d6234e..a462d25fc858
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,19 +20,19 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_def.h>
-#endif /* GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_VARIANT_ENTRY_H */
+#ifndef GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_ltd_variant_def.h>
+#endif /* GEN_BCM56780_A0_HNA_6_5_30_6_0_LTD_VARIANT_ENTRY_H */
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_29_2_1 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,hna_6_5_29_2_1,HNA_6_5_29_2_1,_,BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_29_2_1,BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_6_5_29_2_1,NULL,0,0)
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_30_6_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,hna_6_5_30_6_0,HNA_6_5_30_6_0,_,BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_30_6_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_6_5_30_6_0,NULL,0,0)
 #endif
 
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h
old mode 100644
new mode 100755
index 9e6173895885..9c925f030db3
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_entry.h
deleted file mode 100644
index 7826a6e08301..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_entry.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56880_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56880_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_def.h>
-#endif /* GEN_BCM56880_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H */
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_CNA_6_5_29 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,cna_6_5_29,CNA_6_5_29,_,BCMLTD_VARIANT_BCM56880_A0_CNA_6_5_29,BCMLTD_VARIANT_LOCAL_BCM56880_A0_CNA_6_5_29,NULL,0,0)
-#endif
-
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_entry.h
deleted file mode 100644
index 5e27f7e39a6f..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_entry.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56880_A0_DNA_4_11_4_0_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56880_A0_DNA_4_11_4_0_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h>
-#endif /* GEN_BCM56880_A0_DNA_4_11_4_0_LTD_VARIANT_ENTRY_H */
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_4_11_4_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,dna_4_11_4_0,DNA_4_11_4_0,_,BCMLTD_VARIANT_BCM56880_A0_DNA_4_11_4_0,BCMLTD_VARIANT_LOCAL_BCM56880_A0_DNA_4_11_4_0,NULL,0,0)
-#endif
-
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_entry.h
old mode 100644
new mode 100755
similarity index 61%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_entry.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_entry.h
index 32704dc7aa3e..f8b70cd7c2d4
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,19 +20,19 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56780_A0_INA_2_6_11_0_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56780_A0_INA_2_6_11_0_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_def.h>
-#endif /* GEN_BCM56780_A0_INA_2_6_11_0_LTD_VARIANT_ENTRY_H */
+#ifndef GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_ltd_variant_def.h>
+#endif /* GEN_BCM56880_A0_DNA_6_5_30_1_1_LTD_VARIANT_ENTRY_H */
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_INA_2_6_11_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,ina_2_6_11_0,INA_2_6_11_0,_,BCMLTD_VARIANT_BCM56780_A0_INA_2_6_11_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_INA_2_6_11_0,NULL,0,0)
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_6_5_30_1_1 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,dna_6_5_30_1_1,DNA_6_5_30_1_1,_,BCMLTD_VARIANT_BCM56880_A0_DNA_6_5_30_1_1,BCMLTD_VARIANT_LOCAL_BCM56880_A0_DNA_6_5_30_1_1,NULL,0,0)
 #endif
 
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_entry.h
new file mode 100755
index 000000000000..9eeb8ddbb210
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_ltd_variant_def.h>
+#endif /* GEN_BCM56880_A0_HNA_6_5_30_3_0_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_30_3_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,hna_6_5_30_3_0,HNA_6_5_30_3_0,_,BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_30_3_0,BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_6_5_30_3_0,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_entry.h
deleted file mode 100644
index fc3822c6a70e..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_entry.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56880_A0_NFA_2_1_7_0_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56880_A0_NFA_2_1_7_0_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_def.h>
-#endif /* GEN_BCM56880_A0_NFA_2_1_7_0_LTD_VARIANT_ENTRY_H */
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_2_1_7_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,nfa_2_1_7_0,NFA_2_1_7_0,_,BCMLTD_VARIANT_BCM56880_A0_NFA_2_1_7_0,BCMLTD_VARIANT_LOCAL_BCM56880_A0_NFA_2_1_7_0,NULL,0,0)
-#endif
-
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_entry.h
new file mode 100755
index 000000000000..99fed8f6ffdf
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_ltd_variant_def.h>
+#endif /* GEN_BCM56880_A0_NFA_6_5_30_1_1_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_30_1_1 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,nfa_6_5_30_1_1,NFA_6_5_30_1_1,_,BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_30_1_1,BCMLTD_VARIANT_LOCAL_BCM56880_A0_NFA_6_5_30_1_1,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h
old mode 100644
new mode 100755
index f1473c14dd4b..a53f9713a7fd
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_entry.h
deleted file mode 100644
index fd5d5150f011..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_entry.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56890_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56890_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_def.h>
-#endif /* GEN_BCM56890_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H */
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_29 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,cna_6_5_29,CNA_6_5_29,_,BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_29,BCMLTD_VARIANT_LOCAL_BCM56890_A0_CNA_6_5_29,NULL,0,0)
-#endif
-
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_entry.h
new file mode 100755
index 000000000000..4ac79fbe627e
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_ltd_variant_def.h>
+#endif /* GEN_BCM56890_A0_CNA_6_5_30_2_0_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_30_2_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,cna_6_5_30_2_0,CNA_6_5_30_2_0,_,BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_30_2_0,BCMLTD_VARIANT_LOCAL_BCM56890_A0_CNA_6_5_30_2_0,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_entry.h
new file mode 100755
index 000000000000..6200261b3df9
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_ltd_variant_def.h>
+#endif /* GEN_BCM56890_A0_DNA_6_5_30_8_0_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_30_8_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,dna_6_5_30_8_0,DNA_6_5_30_8_0,_,BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_30_8_0,BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_6_5_30_8_0,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h
old mode 100644
new mode 100755
index a1edac77d697..a77734200c7c
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h
old mode 100644
new mode 100755
index 9ee7769a312f..e52261cf99a9
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h
old mode 100644
new mode 100755
index be32f3d77469..cab8c914fd14
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h
old mode 100644
new mode 100755
index 48dd0a6e21aa..9a1d414f7ac2
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h
old mode 100644
new mode 100755
index 80d9a20bd8b6..1b5eeeaec89d
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h
old mode 100644
new mode 100755
index eef504417b4b..17d0d78c7ca0
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/bcm78800_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/bcm78800_a0_ltd_variant_entry.h
new file mode 100755
index 000000000000..1a28b94db35a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/bcm78800_a0_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78800_A0_LTD_VARIANT_ENTRY_H
+#define GEN_BCM78800_A0_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm78800_a0/bcm78800_a0_ltd_variant_def.h>
+#endif /* GEN_BCM78800_A0_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm78800_a0,BCM78800_A0,,BASE,,BCMLTD_VARIANT_BCM78800_A0_BASE,BCMLTD_VARIANT_LOCAL_BCM78800_A0_BASE,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_entry.h
new file mode 100755
index 000000000000..a69f9ba238c4
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_VARIANT_ENTRY_H
+#define GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_ltd_variant_def.h>
+#endif /* GEN_BCM78800_A0_DNA_6_5_30_3_1_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_DNA_6_5_30_3_1 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm78800_a0,BCM78800_A0,dna_6_5_30_3_1,DNA_6_5_30_3_1,_,BCMLTD_VARIANT_BCM78800_A0_DNA_6_5_30_3_1,BCMLTD_VARIANT_LOCAL_BCM78800_A0_DNA_6_5_30_3_1,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h
old mode 100644
new mode 100755
index fd74760b8e3a..d91efcb918c7
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h
old mode 100644
new mode 100755
index 84f75b9d488c..9ca67d38e32d
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  ******************************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c
index 8c52cfd59d33..fb0db69dc947 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides LBHDR access functions for BCM56080_A0.
  *
@@ -244,6 +244,12 @@ const bcmpkt_lbhdr_fget_t bcm56080_a0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -299,6 +305,12 @@ const bcmpkt_lbhdr_fset_t bcm56080_a0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -319,7 +331,7 @@ static int bcm56080_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
      -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2,
+     -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_rxpmd.c
index 0a42f3c42461..7a41a9f17c46 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_rxpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_rxpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides RXPMD access functions for BCM56080_A0.
  *
@@ -1011,6 +1011,12 @@ const bcmpkt_rxpmd_fget_t bcm56080_a0_rxpmd_fget = {
         NULL,
         bcmpkt_rxpmd_vrf_get,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -1110,6 +1116,12 @@ const bcmpkt_rxpmd_fset_t bcm56080_a0_rxpmd_fset = {
         NULL,
         bcmpkt_rxpmd_vrf_set,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -1135,7 +1147,8 @@ static int bcm56080_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
      -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1,
      -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -2, -2,
      -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2,
-     -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -1, -2, -2,
+     -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2,
+     -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c
index c40e958049dc..4c73216593c7 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides TXPMD access functions for BCM56080_A0.
  *
@@ -1190,6 +1190,13 @@ const bcmpkt_txpmd_fget_t bcm56080_a0_txpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -1279,6 +1286,13 @@ const bcmpkt_txpmd_fset_t bcm56080_a0_txpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -1304,7 +1318,7 @@ static int bcm56080_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
       1,  1,  1,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2,
       2,  2,  2,  2, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
      12, 12, 12, 12, 12, 12, 12, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c
index 167f845331ab..cf8d9663d92e 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides LBHDR access functions for BCM56690_A0.
  *
@@ -82,6 +82,12 @@ const bcmpkt_lbhdr_fget_t bcm56690_a0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -137,6 +143,12 @@ const bcmpkt_lbhdr_fset_t bcm56690_a0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -157,7 +169,7 @@ static int bcm56690_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2,
+     -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd.c
index d3cea9012a05..2fb78ae3f6ea 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides RXPMD access functions for BCM56690_A0.
  *
@@ -410,6 +410,12 @@ const bcmpkt_rxpmd_fget_t bcm56690_a0_rxpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -509,6 +515,12 @@ const bcmpkt_rxpmd_fset_t bcm56690_a0_rxpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -534,7 +546,8 @@ static int bcm56690_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -1, -2, -2, -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2,
-     -2, -2, -2, -2, -2, -1, -2, -1, -1, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd_field.c
index d22b891d30ce..dfe1fae79314 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd_field.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd_field.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <sal/sal_types.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c
index eb0ebd8f9660..d452bf6d8440 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides TXPMD access functions for BCM56690_A0.
  *
@@ -475,6 +475,13 @@ const bcmpkt_txpmd_fget_t bcm56690_a0_txpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -564,6 +571,13 @@ const bcmpkt_txpmd_fset_t bcm56690_a0_txpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -586,7 +600,7 @@ static int bcm56690_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c
index e21b6ec6b6d8..1337f4d115d2 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides LBHDR access functions for BCM56780_A0.
  *
@@ -82,6 +82,12 @@ const bcmpkt_lbhdr_fget_t bcm56780_a0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -137,6 +143,12 @@ const bcmpkt_lbhdr_fset_t bcm56780_a0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -157,7 +169,7 @@ static int bcm56780_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2,
+     -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd.c
index 2c1c165103e4..9449bce00cb4 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides RXPMD access functions for BCM56780_A0.
  *
@@ -422,6 +422,12 @@ const bcmpkt_rxpmd_fget_t bcm56780_a0_rxpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -521,6 +527,12 @@ const bcmpkt_rxpmd_fset_t bcm56780_a0_rxpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -546,7 +558,8 @@ static int bcm56780_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1,
-     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd_field.c
index 0b4c93276bee..e860a841cb73 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd_field.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd_field.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <sal/sal_types.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c
index 601a81cababb..2a78f6b96a53 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides TXPMD access functions for BCM56780_A0.
  *
@@ -390,6 +390,13 @@ const bcmpkt_txpmd_fget_t bcm56780_a0_txpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -479,6 +486,13 @@ const bcmpkt_txpmd_fset_t bcm56780_a0_txpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -501,7 +515,7 @@ static int bcm56780_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c
index 85fdbdcdbdc5..97c1234d65f2 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides LBHDR access functions for BCM56880_A0.
  *
@@ -82,6 +82,12 @@ const bcmpkt_lbhdr_fget_t bcm56880_a0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -137,6 +143,12 @@ const bcmpkt_lbhdr_fset_t bcm56880_a0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -157,7 +169,7 @@ static int bcm56880_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2,
+     -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd.c
index a4a821ee8db3..5d5538534e75 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides RXPMD access functions for BCM56880_A0.
  *
@@ -386,6 +386,12 @@ const bcmpkt_rxpmd_fget_t bcm56880_a0_rxpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -485,6 +491,12 @@ const bcmpkt_rxpmd_fset_t bcm56880_a0_rxpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -510,7 +522,8 @@ static int bcm56880_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2,
-     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd_field.c
index 89028bf98721..2baed2401029 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd_field.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd_field.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <sal/sal_types.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c
index 360d3e05e17b..73e94d4efc02 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides TXPMD access functions for BCM56880_A0.
  *
@@ -390,6 +390,13 @@ const bcmpkt_txpmd_fget_t bcm56880_a0_txpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -479,6 +486,13 @@ const bcmpkt_txpmd_fset_t bcm56880_a0_txpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -501,7 +515,7 @@ static int bcm56880_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c
index 6d724cc1f63b..435fedc94306 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides LBHDR access functions for BCM56890_A0.
  *
@@ -82,6 +82,12 @@ const bcmpkt_lbhdr_fget_t bcm56890_a0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -137,6 +143,12 @@ const bcmpkt_lbhdr_fset_t bcm56890_a0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -157,7 +169,7 @@ static int bcm56890_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2,
+     -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd.c
index 9c6485107173..6e1c8c1984bf 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides RXPMD access functions for BCM56890_A0.
  *
@@ -410,6 +410,12 @@ const bcmpkt_rxpmd_fget_t bcm56890_a0_rxpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -509,6 +515,12 @@ const bcmpkt_rxpmd_fset_t bcm56890_a0_rxpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -534,7 +546,8 @@ static int bcm56890_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -1, -2, -2, -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2,
-     -2, -2, -2, -2, -2, -1, -2, -1, -1, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd_field.c
index 7cd341fe6ced..131e8022a76d 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd_field.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd_field.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <sal/sal_types.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c
index 5b30d71828fd..f76028c09ef5 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides TXPMD access functions for BCM56890_A0.
  *
@@ -476,6 +476,13 @@ const bcmpkt_txpmd_fget_t bcm56890_a0_txpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -565,6 +572,13 @@ const bcmpkt_txpmd_fset_t bcm56890_a0_txpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -587,7 +601,7 @@ static int bcm56890_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c
index 1e38d02cfa9c..3fa7c9d881b2 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides LBHDR access functions for BCM56990_A0.
  *
@@ -502,6 +502,12 @@ const bcmpkt_lbhdr_fget_t bcm56990_a0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -557,6 +563,12 @@ const bcmpkt_lbhdr_fset_t bcm56990_a0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -580,7 +592,7 @@ static int bcm56990_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
      -1, -1, -1, -1, -1, -1, -1,  2,  2, -2,  1,  1,  3,  3,  3,  3,
       3,  3,  3,  3,  3,  3,  3,  3,  3,  3, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2,
+     -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_rxpmd.c
index 335c68ec71b9..0163fd4ddca9 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_rxpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_rxpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides RXPMD access functions for BCM56990_A0.
  *
@@ -950,6 +950,12 @@ const bcmpkt_rxpmd_fget_t bcm56990_a0_rxpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -1049,6 +1055,12 @@ const bcmpkt_rxpmd_fset_t bcm56990_a0_rxpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -1074,7 +1086,8 @@ static int bcm56990_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
      -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1,
      -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -2, -2,
      -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2,
-     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c
index 73cc2ec20b53..bc93655d3e8d 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides TXPMD access functions for BCM56990_A0.
  *
@@ -403,6 +403,13 @@ const bcmpkt_txpmd_fget_t bcm56990_a0_txpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -492,6 +499,13 @@ const bcmpkt_txpmd_fset_t bcm56990_a0_txpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -514,7 +528,7 @@ static int bcm56990_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c
index b8a4a5b0c848..49ac1724fbe7 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides LBHDR access functions for BCM56990_B0.
  *
@@ -502,6 +502,12 @@ const bcmpkt_lbhdr_fget_t bcm56990_b0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -557,6 +563,12 @@ const bcmpkt_lbhdr_fset_t bcm56990_b0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -580,7 +592,7 @@ static int bcm56990_b0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
      -1, -1, -1, -1, -1, -1, -1,  2,  2, -2,  1,  1,  3,  3,  3,  3,
       3,  3,  3,  3,  3,  3,  3,  3,  3,  3, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2,
+     -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_rxpmd.c
index 056516e254c2..53e9c9e23532 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_rxpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_rxpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides RXPMD access functions for BCM56990_B0.
  *
@@ -974,6 +974,12 @@ const bcmpkt_rxpmd_fget_t bcm56990_b0_rxpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -1073,6 +1079,12 @@ const bcmpkt_rxpmd_fset_t bcm56990_b0_rxpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -1098,7 +1110,8 @@ static int bcm56990_b0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
      -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1,
      -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2,
      -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2,
-     -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c
index 9546f63b3878..d8d86e8770ce 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides TXPMD access functions for BCM56990_B0.
  *
@@ -403,6 +403,13 @@ const bcmpkt_txpmd_fget_t bcm56990_b0_txpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -492,6 +499,13 @@ const bcmpkt_txpmd_fset_t bcm56990_b0_txpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -514,7 +528,7 @@ static int bcm56990_b0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c
index 45e0ec01d602..4b1249b92617 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides LBHDR access functions for BCM56996_A0.
  *
@@ -502,6 +502,12 @@ const bcmpkt_lbhdr_fget_t bcm56996_a0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -557,6 +563,12 @@ const bcmpkt_lbhdr_fset_t bcm56996_a0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -580,7 +592,7 @@ static int bcm56996_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
      -1, -1, -1, -1, -1, -1, -1,  2,  2, -2,  1,  1,  3,  3,  3,  3,
       3,  3,  3,  3,  3,  3,  3,  3,  3,  3, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2,
+     -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_rxpmd.c
index 6eac53c8cb3a..27201c56ee22 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_rxpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_rxpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides RXPMD access functions for BCM56996_A0.
  *
@@ -974,6 +974,12 @@ const bcmpkt_rxpmd_fget_t bcm56996_a0_rxpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -1073,6 +1079,12 @@ const bcmpkt_rxpmd_fset_t bcm56996_a0_rxpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -1098,7 +1110,8 @@ static int bcm56996_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
      -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1,
      -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2,
      -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2,
-     -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c
index 57a9aa16f86c..7ac67f73f999 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides TXPMD access functions for BCM56996_A0.
  *
@@ -403,6 +403,13 @@ const bcmpkt_txpmd_fget_t bcm56996_a0_txpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -492,6 +499,13 @@ const bcmpkt_txpmd_fset_t bcm56996_a0_txpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -514,7 +528,7 @@ static int bcm56996_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c
index 90586e9db31f..12dc7734cba7 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides LBHDR access functions for BCM56996_B0.
  *
@@ -502,6 +502,12 @@ const bcmpkt_lbhdr_fget_t bcm56996_b0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -557,6 +563,12 @@ const bcmpkt_lbhdr_fset_t bcm56996_b0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -580,7 +592,7 @@ static int bcm56996_b0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
      -1, -1, -1, -1, -1, -1, -1,  2,  2, -2,  1,  1,  3,  3,  3,  3,
       3,  3,  3,  3,  3,  3,  3,  3,  3,  3, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2,
+     -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_rxpmd.c
index 71042ff2a89a..3ec995e60a40 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_rxpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_rxpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides RXPMD access functions for BCM56996_B0.
  *
@@ -974,6 +974,12 @@ const bcmpkt_rxpmd_fget_t bcm56996_b0_rxpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -1073,6 +1079,12 @@ const bcmpkt_rxpmd_fset_t bcm56996_b0_rxpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -1098,7 +1110,8 @@ static int bcm56996_b0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
      -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1,
      -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2,
      -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2,
-     -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c
index 6c3894f0ce75..4cf357466584 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides TXPMD access functions for BCM56996_B0.
  *
@@ -403,6 +403,13 @@ const bcmpkt_txpmd_fget_t bcm56996_b0_txpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -492,6 +499,13 @@ const bcmpkt_txpmd_fset_t bcm56996_b0_txpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -514,7 +528,7 @@ static int bcm56996_b0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c
index abf7e1b75cd0..530e6f33934f 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides LBHDR access functions for BCM56998_A0.
  *
@@ -502,6 +502,12 @@ const bcmpkt_lbhdr_fget_t bcm56998_a0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -557,6 +563,12 @@ const bcmpkt_lbhdr_fset_t bcm56998_a0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -580,7 +592,7 @@ static int bcm56998_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
      -1, -1, -1, -1, -1, -1, -1,  2,  2, -2,  1,  1,  3,  3,  3,  3,
       3,  3,  3,  3,  3,  3,  3,  3,  3,  3, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2,
+     -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_rxpmd.c
index 9b92e402a588..8b1ccb26e6b2 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_rxpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_rxpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides RXPMD access functions for BCM56998_A0.
  *
@@ -1004,6 +1004,12 @@ const bcmpkt_rxpmd_fget_t bcm56998_a0_rxpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -1103,6 +1109,12 @@ const bcmpkt_rxpmd_fset_t bcm56998_a0_rxpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -1128,7 +1140,8 @@ static int bcm56998_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
      -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1,
      -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2,
      -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2,
-     -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c
index a358b5d761b0..779a1650c85c 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides TXPMD access functions for BCM56998_A0.
  *
@@ -403,6 +403,13 @@ const bcmpkt_txpmd_fget_t bcm56998_a0_txpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -492,6 +499,13 @@ const bcmpkt_txpmd_fset_t bcm56998_a0_txpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -514,7 +528,7 @@ static int bcm56998_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c
index fb32e5f4503a..a7bdc0769714 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides LBHDR access functions for BCM56999_A0.
  *
@@ -502,6 +502,12 @@ const bcmpkt_lbhdr_fget_t bcm56999_a0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -557,6 +563,12 @@ const bcmpkt_lbhdr_fset_t bcm56999_a0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -580,7 +592,7 @@ static int bcm56999_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
      -1, -1, -1, -1, -1, -1, -1,  2,  2, -2,  1,  1,  3,  3,  3,  3,
       3,  3,  3,  3,  3,  3,  3,  3,  3,  3, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2,
+     -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_rxpmd.c
index aa132a65ec12..fdd431831ff7 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_rxpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_rxpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides RXPMD access functions for BCM56999_A0.
  *
@@ -974,6 +974,12 @@ const bcmpkt_rxpmd_fget_t bcm56999_a0_rxpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -1073,6 +1079,12 @@ const bcmpkt_rxpmd_fset_t bcm56999_a0_rxpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -1098,7 +1110,8 @@ static int bcm56999_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
      -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1,
      -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2,
      -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2,
-     -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c
index 132ef8557328..525f34c0e67a 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides TXPMD access functions for BCM56999_A0.
  *
@@ -403,6 +403,13 @@ const bcmpkt_txpmd_fget_t bcm56999_a0_txpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -492,6 +499,13 @@ const bcmpkt_txpmd_fset_t bcm56999_a0_txpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -514,7 +528,7 @@ static int bcm56999_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_lbhdr.c
new file mode 100644
index 000000000000..e977ea83fcd5
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_lbhdr.c
@@ -0,0 +1,181 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides LBHDR access functions for BCM78800_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_lbhdr_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+const bcmpkt_lbhdr_fget_t bcm78800_a0_lbhdr_fget = {
+    {
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_fset_t bcm78800_a0_lbhdr_fset = {
+    {
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_figet_t bcm78800_a0_lbhdr_figet = {
+    {
+        NULL
+    }
+};
+
+static shr_enum_map_t bcm78800_a0_lbhdr_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm78800_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2,
+};
+
+
+void bcm78800_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm78800_a0_lbhdr_view_infos;
+    info->view_types = bcm78800_a0_lbhdr_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd.c
new file mode 100644
index 000000000000..d2a5cf0bdb75
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd.c
@@ -0,0 +1,559 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides RXPMD access functions for BCM78800_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  RXPMD
+ * BLOCKS:
+ * SIZE:     576
+ ******************************************************************************/
+static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 2, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 2, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 16, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 16, 16);
+    return val;
+}
+
+static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 23, 8, val);
+}
+
+static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 23, 8);
+    return val;
+}
+
+static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 14, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 14, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 21, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 21, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 15, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 15, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 13, 1, val == 0);
+}
+
+static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[0], 13, 1) == 0);
+    return val;
+}
+
+static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 16, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 16, 16);
+    return val;
+}
+
+static void bcmpkt_rxpmd_mpb_flex_data_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 1, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_mpb_flex_data_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 1, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_int_cn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 16, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_int_cn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 16, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_cng_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 18, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_cng_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 18, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_egr_zone_remap_ctrl_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 9, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_egr_zone_remap_ctrl_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 9, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dma_header_version_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 0, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dma_header_version_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 0, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_multicast_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 20, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_multicast_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 20, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_copy_to_cpu_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 22, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_copy_to_cpu_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 22, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_truncate_cpu_copy_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 8, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_truncate_cpu_copy_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 8, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dop_trigger_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 7, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dop_trigger_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 7, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 8, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 8, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_eparse_extract_offsets_6_4_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 12, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_6_4_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 12, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_arc_id_lo_set(uint32_t *data, uint32_t val)
+{
+    data[2] = val;
+}
+
+static uint32_t bcmpkt_rxpmd_arc_id_lo_get(uint32_t *data)
+{
+    uint32_t val;
+    val = data[2];
+    return val;
+}
+
+static void bcmpkt_rxpmd_arc_id_hi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 0, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_arc_id_hi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 0, 16);
+    return val;
+}
+
+static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 18;
+}
+
+static uint32_t bcmpkt_rxpmd_i_flex_data_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 4;
+    return 14;
+}
+
+void bcm78800_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+}
+
+void bcm78800_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+}
+
+void bcm78800_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+}
+
+void bcm78800_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+}
+
+const bcmpkt_rxpmd_fget_t bcm78800_a0_rxpmd_fget = {
+    {
+        NULL,
+        bcmpkt_rxpmd_queue_num_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_pkt_length_get,
+        bcmpkt_rxpmd_src_port_num_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_l3only_get,
+        bcmpkt_rxpmd_ip_routed_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_get,
+        bcmpkt_rxpmd_switch_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_mpb_flex_data_type_get,
+        bcmpkt_rxpmd_int_cn_get,
+        bcmpkt_rxpmd_cng_get,
+        bcmpkt_rxpmd_egr_zone_remap_ctrl_get,
+        bcmpkt_rxpmd_dma_header_version_get,
+        bcmpkt_rxpmd_multicast_get,
+        bcmpkt_rxpmd_copy_to_cpu_get,
+        bcmpkt_rxpmd_truncate_cpu_copy_get,
+        NULL,
+        bcmpkt_rxpmd_dop_trigger_get,
+        bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_eparse_extract_offsets_6_4_get,
+        NULL,
+        bcmpkt_rxpmd_arc_id_lo_get,
+        bcmpkt_rxpmd_arc_id_hi_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_fset_t bcm78800_a0_rxpmd_fset = {
+    {
+        NULL,
+        bcmpkt_rxpmd_queue_num_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_pkt_length_set,
+        bcmpkt_rxpmd_src_port_num_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_l3only_set,
+        bcmpkt_rxpmd_ip_routed_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_set,
+        bcmpkt_rxpmd_switch_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_mpb_flex_data_type_set,
+        bcmpkt_rxpmd_int_cn_set,
+        bcmpkt_rxpmd_cng_set,
+        bcmpkt_rxpmd_egr_zone_remap_ctrl_set,
+        bcmpkt_rxpmd_dma_header_version_set,
+        bcmpkt_rxpmd_multicast_set,
+        bcmpkt_rxpmd_copy_to_cpu_set,
+        bcmpkt_rxpmd_truncate_cpu_copy_set,
+        NULL,
+        bcmpkt_rxpmd_dop_trigger_set,
+        bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_eparse_extract_offsets_6_4_set,
+        NULL,
+        bcmpkt_rxpmd_arc_id_lo_set,
+        bcmpkt_rxpmd_arc_id_hi_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_figet_t bcm78800_a0_rxpmd_figet = {
+    {
+        bcmpkt_rxpmd_i_size_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_i_flex_data_get
+    }
+};
+
+static shr_enum_map_t bcm78800_a0_rxpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm78800_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
+     -2, -1, -2, -2, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -2, -2, -1, -1, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -1, -2, -2, -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2,
+     -2, -2, -2, -2, -2, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
+};
+
+
+void bcm78800_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm78800_a0_rxpmd_view_infos;
+    info->view_types = bcm78800_a0_rxpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd_field.c
new file mode 100644
index 000000000000..c9e685ec9687
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd_field.c
@@ -0,0 +1,108 @@
+/*! \file bcm78800_a0_pkt_rxpmd_field.c
+ *
+ * This file provides RXPMD access functions for BCM78800_A0.
+ *
+ */
+/*
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ */
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_internal.h>
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+#include <bcmpkt/chip/bcm78800_a0/bcmpkt_bcm78800_a0_rxpmd.h>
+
+#define BSL_LOG_MODULE BSL_LS_BCMPKT_FLEX_HDR
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+int bcm78800_a0_rxpmd_flex_fget(uint32_t *data,
+                                bcmpkt_flex_field_metadata_t *fld_info,
+                                int prof,
+                                uint32_t *val)
+{
+    uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */
+    uint32_t minbit = fld_info->profile[prof].minbit;
+    uint32_t maxbit = fld_info->profile[prof].maxbit;
+    uint32_t minword = minbit / 32;
+    uint32_t low_bit = minbit - (minword * 32);
+    uint32_t high_bit = maxbit - (minword * 32);
+    uint32_t diff = high_bit - low_bit;
+    uint32_t index = hdr_words - minword - 1;
+
+    /* Profile not valid for this field. */
+    if ((minbit == 0xFFFFFFFF) ||
+        (prof >= fld_info->profile_cnt)) {
+        return SHR_E_PARAM;
+    }
+
+    /* Skip fields with minbit >= 448.*/
+    if (minbit >= 448) {
+        *val = 0;
+        return SHR_E_NONE;
+    }
+
+    if (diff == 31) {
+        *val = data[index];
+    } else if (diff < 31) {
+        *val = WORD_FIELD_GET(data[index], low_bit, diff+1);
+    } else {
+        return SHR_E_PARAM;
+    }
+
+    return SHR_E_NONE;
+}
+
+int bcm78800_a0_rxpmd_flex_fset(uint32_t *data,
+                                bcmpkt_flex_field_metadata_t *fld_info,
+                                int prof,
+                                uint32_t val)
+{
+    uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */
+    uint32_t minbit = fld_info->profile[prof].minbit;
+    uint32_t maxbit = fld_info->profile[prof].maxbit;
+    uint32_t minword = minbit / 32;
+    uint32_t low_bit = minbit - (minword * 32);
+    uint32_t high_bit = maxbit - (minword * 32);
+    uint32_t diff = high_bit - low_bit;
+    uint32_t index = hdr_words - minword - 1;
+
+    /* Profile not valid for this field. */
+    if ((minbit == 0xFFFFFFFF) ||
+        (prof >= fld_info->profile_cnt)) {
+        return SHR_E_PARAM;
+    }
+
+    /* Skip fields with minbit >= 448.*/
+    if (minbit >= 448) {
+        return SHR_E_PARAM;
+    }
+
+    if (diff == 31) {
+        data[index] = val;
+    } else if (diff < 31) {
+        WORD_FIELD_SET(data[index], low_bit, diff+1, val);
+    } else {
+        return SHR_E_PARAM;
+    }
+
+    return SHR_E_NONE;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_txpmd.c
new file mode 100644
index 000000000000..76901a19f330
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_txpmd.c
@@ -0,0 +1,659 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ *
+ * This file provides TXPMD access functions for BCM78800_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_txpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  TXPMD
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 30, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 30, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 11, 14, val);
+}
+
+static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 11, 14);
+    return val;
+}
+
+static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 10, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 10, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 9, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 9, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 0, 9, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 0, 9);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 20, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 20, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 7, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 7, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 25, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 25, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 14, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 14, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 16, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 16, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 15, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 15, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 19, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 19, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 18, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 18, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 17, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 17, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 8, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 8, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 16, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 16, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 24, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 24, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 22, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 22, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 20, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 20, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_unicast_pkt_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 13, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_unicast_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 13, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ts_action_lsb_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 19, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ts_action_lsb_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 19, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ts_action_msb_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 21, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ts_action_msb_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 21, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ts_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 22, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ts_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 22, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_dst_subport_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 23, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_dst_subport_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 23, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_udp_checksum_update_enable_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 31, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_udp_checksum_update_enable_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 31, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_udp_checksum_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 0, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_udp_checksum_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 0, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_cng_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 5, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_cng_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 5, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_wred_mark_eligible_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 3, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_wred_mark_eligible_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 3, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_copy_to_debug_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 26, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_copy_to_debug_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 26, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_copy_to_cpu_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 25, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_copy_to_cpu_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 25, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_wred_responsive_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 4, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_wred_responsive_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 4, 1);
+    return val;
+}
+
+static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_txpmd_fget_t bcm78800_a0_txpmd_fget = {
+    {
+        bcmpkt_txpmd_start_get,
+        bcmpkt_txpmd_header_type_get,
+        bcmpkt_txpmd_pkt_length_get,
+        NULL,
+        bcmpkt_txpmd_sop_get,
+        bcmpkt_txpmd_eop_get,
+        bcmpkt_txpmd_cell_length_get,
+        bcmpkt_txpmd_cell_error_get,
+        bcmpkt_txpmd_local_dest_port_get,
+        NULL,
+        bcmpkt_txpmd_cos_get,
+        bcmpkt_txpmd_input_pri_get,
+        bcmpkt_txpmd_unicast_get,
+        bcmpkt_txpmd_rqe_q_num_get,
+        bcmpkt_txpmd_set_l2bm_get,
+        bcmpkt_txpmd_ieee1588_one_step_enable_get,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_get,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get,
+        bcmpkt_txpmd_tx_ts_get,
+        bcmpkt_txpmd_spid_override_get,
+        bcmpkt_txpmd_spid_get,
+        bcmpkt_txpmd_spap_get,
+        bcmpkt_txpmd_unicast_pkt_get,
+        bcmpkt_txpmd_ts_action_lsb_get,
+        bcmpkt_txpmd_ts_action_msb_get,
+        bcmpkt_txpmd_ts_type_get,
+        bcmpkt_txpmd_dst_subport_num_get,
+        bcmpkt_txpmd_udp_checksum_update_enable_get,
+        bcmpkt_txpmd_udp_checksum_offset_get,
+        bcmpkt_txpmd_cng_get,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_wred_mark_eligible_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_copy_to_debug_get,
+        bcmpkt_txpmd_copy_to_cpu_get,
+        bcmpkt_txpmd_wred_responsive_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_fset_t bcm78800_a0_txpmd_fset = {
+    {
+        bcmpkt_txpmd_start_set,
+        bcmpkt_txpmd_header_type_set,
+        bcmpkt_txpmd_pkt_length_set,
+        NULL,
+        bcmpkt_txpmd_sop_set,
+        bcmpkt_txpmd_eop_set,
+        bcmpkt_txpmd_cell_length_set,
+        bcmpkt_txpmd_cell_error_set,
+        bcmpkt_txpmd_local_dest_port_set,
+        NULL,
+        bcmpkt_txpmd_cos_set,
+        bcmpkt_txpmd_input_pri_set,
+        bcmpkt_txpmd_unicast_set,
+        bcmpkt_txpmd_rqe_q_num_set,
+        bcmpkt_txpmd_set_l2bm_set,
+        bcmpkt_txpmd_ieee1588_one_step_enable_set,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_set,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set,
+        bcmpkt_txpmd_tx_ts_set,
+        bcmpkt_txpmd_spid_override_set,
+        bcmpkt_txpmd_spid_set,
+        bcmpkt_txpmd_spap_set,
+        bcmpkt_txpmd_unicast_pkt_set,
+        bcmpkt_txpmd_ts_action_lsb_set,
+        bcmpkt_txpmd_ts_action_msb_set,
+        bcmpkt_txpmd_ts_type_set,
+        bcmpkt_txpmd_dst_subport_num_set,
+        bcmpkt_txpmd_udp_checksum_update_enable_set,
+        bcmpkt_txpmd_udp_checksum_offset_set,
+        bcmpkt_txpmd_cng_set,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_wred_mark_eligible_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_copy_to_debug_set,
+        bcmpkt_txpmd_copy_to_cpu_set,
+        bcmpkt_txpmd_wred_responsive_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_figet_t bcm78800_a0_txpmd_figet = {
+    {
+        bcmpkt_txpmd_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm78800_a0_txpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm78800_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
+     -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2,
+     -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+};
+
+
+void bcm78800_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm78800_a0_txpmd_view_infos;
+    info->view_types = bcm78800_a0_txpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c
index bddf990d22a0..3e601cc5659e 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides LBHDR access functions for BCM78900_B0.
  *
@@ -260,6 +260,12 @@ const bcmpkt_lbhdr_fget_t bcm78900_b0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -315,6 +321,12 @@ const bcmpkt_lbhdr_fset_t bcm78900_b0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -335,7 +347,7 @@ static int bcm78900_b0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
      -1, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1,
      -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2,
+     -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_rxpmd.c
index d14258476196..9ae1a6b5e464 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_rxpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_rxpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides RXPMD access functions for BCM78900_B0.
  *
@@ -988,6 +988,12 @@ const bcmpkt_rxpmd_fget_t bcm78900_b0_rxpmd_fget = {
         bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_get,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -1087,6 +1093,12 @@ const bcmpkt_rxpmd_fset_t bcm78900_b0_rxpmd_fset = {
         bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_set,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -1112,7 +1124,8 @@ static int bcm78900_b0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
      -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1,
      -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2,
      -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2,
-     -1, -1, -2, -2, -1, -2, -2, -2, -2, -1, -2, -2, -2,
+     -1, -1, -2, -2, -1, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c
index 8b3278d1eecc..1d368e0c674a 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides TXPMD access functions for BCM78900_B0.
  *
@@ -746,6 +746,13 @@ const bcmpkt_txpmd_fget_t bcm78900_b0_txpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -835,6 +842,13 @@ const bcmpkt_txpmd_fset_t bcm78900_b0_txpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -859,7 +873,7 @@ static int bcm78900_b0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
       1,  1,  1,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2, -2,
      -2,  2,  2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c
index fe93b2a63e3f..ddded01f2183 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides LBHDR access functions for BCM78905_A0.
  *
@@ -260,6 +260,12 @@ const bcmpkt_lbhdr_fget_t bcm78905_a0_lbhdr_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -315,6 +321,12 @@ const bcmpkt_lbhdr_fset_t bcm78905_a0_lbhdr_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -335,7 +347,7 @@ static int bcm78905_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
      -1, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1,
      -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2,
+     -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_rxpmd.c
index 142b28438c95..8e7feab9a6b2 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_rxpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_rxpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides RXPMD access functions for BCM78905_A0.
  *
@@ -988,6 +988,12 @@ const bcmpkt_rxpmd_fget_t bcm78905_a0_rxpmd_fget = {
         bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_get,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -1087,6 +1093,12 @@ const bcmpkt_rxpmd_fset_t bcm78905_a0_rxpmd_fset = {
         bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_set,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -1112,7 +1124,8 @@ static int bcm78905_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
      -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1,
      -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2,
      -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2,
-     -1, -1, -2, -2, -1, -2, -2, -2, -2, -1, -2, -2, -2,
+     -1, -1, -2, -2, -1, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c
index 464dcfde1975..2da682502179 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c
@@ -5,7 +5,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides TXPMD access functions for BCM78905_A0.
  *
@@ -746,6 +746,13 @@ const bcmpkt_txpmd_fget_t bcm78905_a0_txpmd_fget = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -835,6 +842,13 @@ const bcmpkt_txpmd_fset_t bcm78905_a0_txpmd_fset = {
         NULL,
         NULL,
         NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
         NULL
     }
 };
@@ -859,7 +873,7 @@ static int bcm78905_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
       1,  1,  1,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2, -2,
      -2,  2,  2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
      -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
-     -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
 };
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c
index 8275ed5433b7..46d43820e6a1 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <shr/shr_error.h>
@@ -68,6 +68,38 @@ int *bcmpkt_flexhdr_variant_support_map[] = {
     NULL
 };
 
+int
+bcmpkt_flexhdr_header_name_get(bcmlrd_variant_t variant,
+                               uint32_t hid, char **name)
+{
+    shr_enum_map_t *id_map = NULL;
+
+    if (name == NULL) {
+        return SHR_E_PARAM;
+    }
+
+    if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (flex_pmd_info_get[variant] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    id_map = flexhdr_map_get[variant]();
+    if (id_map == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    while (sal_strcasecmp(id_map->name, "flexhdr count") != 0) {
+        if (id_map->val == (int)hid) {
+            *name = id_map->name;
+            return SHR_E_NONE;
+        }
+        id_map++;
+    }
+
+    return SHR_E_UNAVAIL;
+}
 
 int
 bcmpkt_flexhdr_header_id_get(bcmlrd_variant_t variant,
@@ -91,17 +123,57 @@ bcmpkt_flexhdr_header_id_get(bcmlrd_variant_t variant,
     if (id_map == NULL) {
         return SHR_E_UNAVAIL;
     }
-    while (sal_strcasecmp(id_map->name, "flexhdr count") != 0 ) {
+
+    while (1) {
         if (sal_strcasecmp(id_map->name, name) == 0) {
             *hid = id_map->val;
             return SHR_E_NONE;
         }
+        if (sal_strcasecmp(id_map->name, "flexhdr count") == 0) {
+            break;
+        }
         id_map++;
     }
 
     return SHR_E_UNAVAIL;
 }
 
+/*
+ * SDKLT-43974: This is a simple workaround. Normal fix will be ready in the
+ * JIRA.
+ */
+int
+bcmpkt_flexhdr_len_get(bcmlrd_variant_t variant, uint32_t hid,
+                       uint32_t *len)
+{
+    int rv;
+    char *name = NULL;
+
+    if (len == NULL) {
+        return SHR_E_PARAM;
+    }
+    if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    rv = bcmpkt_flexhdr_header_name_get(variant, hid, &name);
+    if (SHR_FAILURE(rv)) {
+        return rv;
+    }
+
+    if (sal_strcasecmp(name, "generic_loopback_t") == 0) {
+        *len = 16;
+    } else if (sal_strcasecmp(name, "hg3_base_t") == 0 ||
+               sal_strcasecmp(name, "hg3_extension_0_t") == 0) {
+        *len = 8;
+    } else {
+        /* no support*/
+        *len = 0;
+    }
+
+    return SHR_E_NONE;
+}
+
 int
 bcmpkt_flexhdr_is_supported(bcmlrd_variant_t variant, uint32_t hid,
                             bool *is_supported)
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h
index 515f87566f28..c240b6e55f89 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_FLEXHDR_H
@@ -25,7 +25,7 @@
 
 #include <shr/shr_bitop.h>
 #include <sal/sal_types.h>
-#include <bcmlrd/bcmlrd_local_types.h>
+#include <bcmlrd/bcmlrd_conf.h>
 #include <bcmdrd/bcmdrd_types.h>
 #include <bcmpkt/bcmpkt_pmd.h>
 #include <bcmpkt/bcmpkt_pmd_internal.h>
@@ -74,6 +74,12 @@
 #define BCMPKT_RXPMD_FLEX_REASON_SET_ALL(_reasons, _count) \
         SHR_BITSET_RANGE(((_reasons).pbits), 0, _count)
 
+/*!
+ * Macro to clear all reasons.
+ */
+#define BCMPKT_RXPMD_FLEX_REASON_CLEAR_ALL(_reasons, _count) \
+        SHR_BITCLR_RANGE(((_reasons).pbits), 0, _count)
+
 /*!
  * Macro to check for no reason.
  */
@@ -166,6 +172,34 @@ typedef struct bcmpkt_rxpmd_func_s {
     extern const bcmpkt_rxpmd_func_t _bd##_rxpmd_func;
 #include <bcmdrd/bcmdrd_devlist.h>
 
+/*!
+ * \brief Get Header name for a given header ID.
+ *
+ * \param [in] variant Variant type.
+ * \param [in] hid flexhdr ID.
+ * \param [out] name flexhdr name string.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ */
+extern int
+bcmpkt_flexhdr_header_name_get(bcmlrd_variant_t variant,
+                               uint32_t hid, char **name);
+
+/*!
+ * \brief Get Header encapsulation length for a given header ID.
+ *
+ * \param [in] variant Variant type.
+ * \param [in] hid flexhdr ID.
+ * \param [out] len header length.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ */
+extern int
+bcmpkt_flexhdr_len_get(bcmlrd_variant_t variant, uint32_t hid,
+                       uint32_t *len);
+
 /*!
  * \brief Get Header ID for a given flexhdr name.
  *
@@ -181,7 +215,6 @@ extern int
 bcmpkt_flexhdr_header_id_get(bcmlrd_variant_t variant,
                              char* name, uint32_t *hid);
 
-
 /*!
  * \brief Check if flexhdr is supported.
  *
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_field.h
index ebb60c4d14d6..9a458358949f 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_field.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_field.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_FLEXHDR_FIELD_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_internal.h
index 9948ab507842..957132704689 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_internal.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_internal.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_FLEXHDR_INTERNAL_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_hg3.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_hg3.h
index fd30ea26570d..80474121b929 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_hg3.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_hg3.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_HG3_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_higig_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_higig_defs.h
index 4c6b90bb3eb4..928eeaff52a2 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_higig_defs.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_higig_defs.h
@@ -7,7 +7,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-chip.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides access macros for the HiGig module header.
  *
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h
index f08895649074..c61ec2411891 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_LBHDR_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h
index cd68ac50c13d..85ded0cb45bc 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h
@@ -7,7 +7,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides field macros for the Packet Loopback HeaDeR (LBHDR, called
  * LOOPBACK_MH in hardware.) access.
@@ -179,8 +179,20 @@
 #define BCMPKT_LBHDR_INPUT_PRIORITY_MD_ETH       47
 /*!  */
 #define BCMPKT_LBHDR_CNP                         48
+/*!  */
+#define BCMPKT_LBHDR_FLIP_SECOND_PASS_L2_DENSE_MODE_ADDRESS 49
+/*!  */
+#define BCMPKT_LBHDR_VFI_VALID_MD_ETH            50
+/*!  */
+#define BCMPKT_LBHDR_VFI_MD_ETH                  51
+/*!  */
+#define BCMPKT_LBHDR_TRUNCATE_MD_ETH             52
+/*!  */
+#define BCMPKT_LBHDR_TRUNCATE_OFFSET_MD_ETH      53
+/*!  */
+#define BCMPKT_LBHDR_SVP_MD_ETH                  54
 /*! LBHDR FIELD ID NUMBER */
-#define BCMPKT_LBHDR_FID_COUNT                   49
+#define BCMPKT_LBHDR_FID_COUNT                   55
 /*! \} */
 
 /*! LBHDR field name strings for debugging. */
@@ -234,6 +246,12 @@
     {"QOS_FIELD_ETH_MD_ETH", BCMPKT_LBHDR_QOS_FIELD_ETH_MD_ETH},\
     {"INPUT_PRIORITY_MD_ETH", BCMPKT_LBHDR_INPUT_PRIORITY_MD_ETH},\
     {"CNP", BCMPKT_LBHDR_CNP},\
+    {"FLIP_SECOND_PASS_L2_DENSE_MODE_ADDRESS", BCMPKT_LBHDR_FLIP_SECOND_PASS_L2_DENSE_MODE_ADDRESS},\
+    {"VFI_VALID_MD_ETH", BCMPKT_LBHDR_VFI_VALID_MD_ETH},\
+    {"VFI_MD_ETH", BCMPKT_LBHDR_VFI_MD_ETH},\
+    {"TRUNCATE_MD_ETH", BCMPKT_LBHDR_TRUNCATE_MD_ETH},\
+    {"TRUNCATE_OFFSET_MD_ETH", BCMPKT_LBHDR_TRUNCATE_OFFSET_MD_ETH},\
+    {"SVP_MD_ETH", BCMPKT_LBHDR_SVP_MD_ETH},\
     {"fid count", BCMPKT_LBHDR_FID_COUNT}
 
 /*!
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_field.h
index e001ec598e4d..56c10eee1f29 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_field.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_field.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_LBHDR_FIELD_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_internal.h
index 048c9ae0931b..830d9663d569 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_internal.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_internal.h
@@ -5,7 +5,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_LBHDR_INTERNAL_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h
index 3cb424d1f15c..dd9f99fff6ff 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_PMD_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd_internal.h
index 67051fadd8ba..ce8d21fd096b 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd_internal.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd_internal.h
@@ -7,7 +7,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_PMD_INTERNAL_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rcpu_hdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rcpu_hdr.h
index 188fb593364e..861ba0386cc2 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rcpu_hdr.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rcpu_hdr.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_RCPU_HDR_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h
index f423f39ceede..c97a44978946 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_RXPMD_H
@@ -27,7 +27,8 @@
 #include <shr/shr_bitop.h>
 #include <bcmpkt/bcmpkt_rxpmd_defs.h>
 #include <bcmdrd/bcmdrd_types.h>
-#include <bcmlrd/bcmlrd_local_types.h>
+#include <bcmlrd/bcmlrd_conf.h>
+#include <bcmlrd/bcmlrd_match_id_db.h>
 #include <bcmpkt/bcmpkt_rxpmd_field.h>
 #include <bcmpkt/bcmpkt_rxpmd_match_id.h>
 #include <bcmpkt/bcmpkt_rxpmd_fid.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h
index 9d908a3597b2..c3e4ad128083 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h
@@ -7,7 +7,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides field macros for RX Packet Metadata (RXPMD, called
  * EP_TO_CPU in hardware) access.
@@ -279,8 +279,20 @@
 #define BCMPKT_RXPMD_RX_CHIP_PORT                91
 /*! VPP copy. */
 #define BCMPKT_RXPMD_VPP_COPY_TYPE               92
+/*! SV tag present status. */
+#define BCMPKT_RXPMD_SVTAG_PRESENT               93
+/*! Ingress vpp port. */
+#define BCMPKT_RXPMD_RX_VPP_PORT                 94
+/*! Non switch copy. */
+#define BCMPKT_RXPMD_NONSW_COPY                  95
+/*!  */
+#define BCMPKT_RXPMD_MATCHED_RULE_EP             96
+/*!  */
+#define BCMPKT_RXPMD_IS_EGR_TS                   97
+/*! If set, then packet has been modified by the EP and CRC needs to be regenerated */
+#define BCMPKT_RXPMD_MODIFIED_PKT                98
 /*! RXPMD FIELD ID NUMBER */
-#define BCMPKT_RXPMD_FID_COUNT                   93
+#define BCMPKT_RXPMD_FID_COUNT                   99
 /*! \} */
 
 /*! RXPMD field name strings for debugging. */
@@ -378,6 +390,12 @@
     {"VRF", BCMPKT_RXPMD_VRF},\
     {"RX_CHIP_PORT", BCMPKT_RXPMD_RX_CHIP_PORT},\
     {"VPP_COPY_TYPE", BCMPKT_RXPMD_VPP_COPY_TYPE},\
+    {"SVTAG_PRESENT", BCMPKT_RXPMD_SVTAG_PRESENT},\
+    {"RX_VPP_PORT", BCMPKT_RXPMD_RX_VPP_PORT},\
+    {"NONSW_COPY", BCMPKT_RXPMD_NONSW_COPY},\
+    {"MATCHED_RULE_EP", BCMPKT_RXPMD_MATCHED_RULE_EP},\
+    {"IS_EGR_TS", BCMPKT_RXPMD_IS_EGR_TS},\
+    {"MODIFIED_PKT", BCMPKT_RXPMD_MODIFIED_PKT},\
     {"fid count", BCMPKT_RXPMD_FID_COUNT}
 
 /*!
@@ -776,8 +794,16 @@
 #define BCMPKT_RX_REASON_MACSEC                  139
 /*! APU Policy CTC. */
 #define BCMPKT_RX_REASON_APU_POLICY_CTC          140
+/*! Delayed CTC. */
+#define BCMPKT_RX_REASON_DELAYED_CTC             141
+/*! Indicates Copy to CPU is for PORT_DOWN event. */
+#define BCMPKT_RX_REASON_PORT_DOWN               142
+/*! SRV6 Control Packet */
+#define BCMPKT_RX_REASON_SRV6_CONTROL_PKT        143
+/*! OUI Compression miss */
+#define BCMPKT_RX_REASON_OUI_COMPRESSION_MISS    144
 /*! BCMPKT_RX_REASON TYPE NUMBER */
-#define BCMPKT_RX_REASON_COUNT                   141
+#define BCMPKT_RX_REASON_COUNT                   145
 /*! \} */
 
 /*! RXPMD reason name strings for debugging. */
@@ -923,6 +949,10 @@
     {"EP_CTC", BCMPKT_RX_REASON_EP_CTC},\
     {"MACSEC", BCMPKT_RX_REASON_MACSEC},\
     {"APU_POLICY_CTC", BCMPKT_RX_REASON_APU_POLICY_CTC},\
+    {"DELAYED_CTC", BCMPKT_RX_REASON_DELAYED_CTC},\
+    {"PORT_DOWN", BCMPKT_RX_REASON_PORT_DOWN},\
+    {"SRV6_CONTROL_PKT", BCMPKT_RX_REASON_SRV6_CONTROL_PKT},\
+    {"OUI_COMPRESSION_MISS", BCMPKT_RX_REASON_OUI_COMPRESSION_MISS},\
     {"reason count", BCMPKT_RX_REASON_COUNT}
 
 #endif /*! BCMPKT_RXPMD_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_fid.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_fid.h
index 7c12f3b58394..d707513f3c43 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_fid.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_fid.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_RXPMD_FID_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_field.h
index 5c80a3eabe14..d317e7fdd420 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_field.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_field.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_RXPMD_FIELD_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_internal.h
index 6c2fb52ddec4..67ab4e3d5a0d 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_internal.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_internal.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_RXPMD_INTERNAL_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id.h
index 1ffbca4ed511..d17808075b68 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_RXPMD_MATCH_ID_H
@@ -25,7 +25,7 @@
 
 #include <sal/sal_types.h>
 #include <shr/shr_types.h>
-#include <bcmlrd/bcmlrd_local_types.h>
+#include <bcmlrd/bcmlrd_conf.h>
 
 /*!
  * \brief Does the match id data contain the specified type
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id_defs.h
index 622a5bf4a09e..f879001eec18 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id_defs.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id_defs.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_RXPMD_MATCH_ID_DEFS_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h
index eb42ebc1b455..2e5f10be9562 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_TXPMD_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h
index 6805e23edc50..e7cfa9d7cf5f 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h
@@ -7,7 +7,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/regs/xgs/generate-pmd.pl
  *
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  *
  * This file provides field macros for the TX Packet MetaData (TXPMD, called
  * SOBMH in hardware.) access.
@@ -187,7 +187,7 @@
 #define BCMPKT_TXPMD_OAM_DOWNMEP_TX_UNICAST      70
 /*! Indicates a copy should be sent to the the CPU port mapped to R5. */
 #define BCMPKT_TXPMD_COPY_TO_DEBUG               71
-/*! FIXME */
+
 #define BCMPKT_TXPMD_COPY_TO_CPU                 72
 /*! Used to set PBI.WRED_RESPONSIVE */
 #define BCMPKT_TXPMD_WRED_RESPONSIVE             73
@@ -209,8 +209,22 @@
 #define BCMPKT_TXPMD_DST_CHIP_PORT_NUM           81
 /*! Source chip port number. */
 #define BCMPKT_TXPMD_SRC_CHIP_PORT_NUM           82
+/*! Unicast packet type. */
+#define BCMPKT_TXPMD_UNICAST_PKT_TYPE            83
+/*! Unicast packet. */
+#define BCMPKT_TXPMD_UNICAST_PKT_VALID           84
+/*! vpp_port to send a SOBMH packet out. */
+#define BCMPKT_TXPMD_TX_VPP_PORT                 85
+/*! Destination chip_port number. */
+#define BCMPKT_TXPMD_TX_CHIP_PORT                86
+/*! RX chip port. */
+#define BCMPKT_TXPMD_RX_CHIP_PORT                87
+/*! Ingress vpp port. */
+#define BCMPKT_TXPMD_RX_VPP_PORT                 88
+/*! SVP */
+#define BCMPKT_TXPMD_CPU_TX_SVP                  89
 /*! TXPMD FIELD ID NUMBER */
-#define BCMPKT_TXPMD_FID_COUNT                   83
+#define BCMPKT_TXPMD_FID_COUNT                   90
 /*! \} */
 
 /*! TXPMD field name strings for debugging. */
@@ -298,6 +312,13 @@
     {"IEEE1588_TX_TS", BCMPKT_TXPMD_IEEE1588_TX_TS},\
     {"DST_CHIP_PORT_NUM", BCMPKT_TXPMD_DST_CHIP_PORT_NUM},\
     {"SRC_CHIP_PORT_NUM", BCMPKT_TXPMD_SRC_CHIP_PORT_NUM},\
+    {"UNICAST_PKT_TYPE", BCMPKT_TXPMD_UNICAST_PKT_TYPE},\
+    {"UNICAST_PKT_VALID", BCMPKT_TXPMD_UNICAST_PKT_VALID},\
+    {"TX_VPP_PORT", BCMPKT_TXPMD_TX_VPP_PORT},\
+    {"TX_CHIP_PORT", BCMPKT_TXPMD_TX_CHIP_PORT},\
+    {"RX_CHIP_PORT", BCMPKT_TXPMD_RX_CHIP_PORT},\
+    {"RX_VPP_PORT", BCMPKT_TXPMD_RX_VPP_PORT},\
+    {"CPU_TX::SVP", BCMPKT_TXPMD_CPU_TX_SVP},\
     {"fid count", BCMPKT_TXPMD_FID_COUNT}
 
 /*!
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_field.h
index fd97efbed4bb..068875610ca9 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_field.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_field.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_TXPMD_FIELD_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_internal.h
index a4fc1eb0f564..13c5710671e7 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_internal.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_internal.h
@@ -5,7 +5,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_TXPMD_INTERNAL_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h
index 0398392e600f..136d4fd5471b 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,14 +17,15 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_UTIL_H
 #define BCMPKT_UTIL_H
 
 #include <bcmdrd/bcmdrd_types.h>
-#include <bcmlrd/bcmlrd_local_types.h>
+#include <bcmlrd/bcmlrd_conf.h>
+#include <bcmpkt/bcmpkt_rcpu_hdr.h>
 
 /*!
  * \brief Get device dispatch type based on device name.
@@ -51,4 +52,26 @@ bcmpkt_util_dev_type_get(const char *dev_name);
 extern bcmlrd_variant_t
 bcmpkt_util_variant_type_get(const char *dev_name, const char *var_name);
 
+/*!
+ * \brief Get device id based on device type.
+ *
+ * \param [in] dev_type Device type, e.g. "BCMDRD_DEV_T_BCM56000_A0".
+ *
+ * \return Device id or 0 if not found.
+ */
+extern uint32_t
+bcmpkt_util_dev_id_get(const bcmdrd_dev_type_t dev_type);
+
+/*!
+ * \brief Initialize RCPU header based on device type.
+ *
+ * \param [in] dev_type Device type e.g. "BCMDRD_DEV_T_BCM56000_A0".
+ * \param [out] rhdr RCPU header handle.
+ *
+ * \return none.
+ */
+extern void
+bcmpkt_util_rcpu_hdr_init(const bcmdrd_dev_type_t dev_type,
+                          bcmpkt_rcpu_hdr_t *rhdr);
+
 #endif /* BCMPKT_UTIL_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h
index 1d772c94dabe..ee023698311d 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_BCM56690_A0_RXPMD_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h
index 56f782c4ee1b..6793ea72cae9 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_BCM56780_A0_RXPMD_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h
index 81e440b12e27..84df9dff6a97 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_BCM56880_A0_RXPMD_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h
index 699c745d755e..c98ac2016922 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMPKT_BCM56890_A0_RXPMD_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78800_a0/bcmpkt_bcm78800_a0_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78800_a0/bcmpkt_bcm78800_a0_rxpmd.h
new file mode 100644
index 000000000000..39fcad92ea6c
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78800_a0/bcmpkt_bcm78800_a0_rxpmd.h
@@ -0,0 +1,60 @@
+/*! \file bcmpkt_bcm78800_a0_rxpmd.h
+ *
+ * RX Packet Meta Data (RXPMD, called EP_TO_CPU in hardware) access interfaces.
+ *
+ */
+/*
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ */
+
+#ifndef BCMPKT_BCM78800_A0_RXPMD_H
+#define BCMPKT_BCM78800_A0_RXPMD_H
+
+#include <bcmpkt/bcmpkt_flexhdr.h>
+
+/*!
+ * \brief Get flex field value from packet header data stream.
+ *
+ * \param [in] data Packet header data stream.
+ * \param [in] fld_info Information of field within data stream.
+ * \param [in] profile Profile
+ * \param [out] val Field value.
+ *
+ * \retval SHR_E_NONE success.
+ */
+extern int
+bcm78800_a0_rxpmd_flex_fget(uint32_t *data,
+                            bcmpkt_flex_field_metadata_t *fld_info,
+                            int profile,
+                            uint32_t *val);
+
+/*!
+ * \brief Set flex field value from packet header data stream.
+ *
+ * \param [in] data Packet header data stream.
+ * \param [in] fld_info Information of field within data stream.
+ * \param [in] profile Profile
+ * \param [in] val Field value.
+ *
+ * \retval SHR_E_NONE success.
+ */
+extern int
+bcm78800_a0_rxpmd_flex_fset(uint32_t *data,
+                            bcmpkt_flex_field_metadata_t *fld_info,
+                            int profile,
+                            uint32_t val);
+
+#endif /* BCMPKT_BCM78800_A0_RXPMD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr.h
index ed834322299c..65f14a67a9e4 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr.h
@@ -6,7 +6,7 @@
  * Edits to this file will be lost when it is regenerated.
  *
  * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -19,7 +19,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  * All Rights Reserved.$
  *
  * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr_data.h
index 10cb781f4af9..6c9aacbba374 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr_data.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr_data.h
@@ -6,7 +6,7 @@
  * Edits to this file will be lost when it is regenerated.
  *
  * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -19,7 +19,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  * All Rights Reserved.$
  *
  * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_flex_data.h
index 1162d03c967c..de8fe7cae024 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_flex_data.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_flex_data.h
@@ -6,7 +6,7 @@
  * Edits to this file will be lost when it is regenerated.
  *
  * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -19,7 +19,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  * All Rights Reserved.$
  *
  * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id_defs.h
index fd0a9d887550..6a4d0c14cd5b 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id_defs.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id_defs.h
@@ -7,7 +7,7 @@
  * Edits to this file will be lost when it is regenerated.
  *
  * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  * All Rights Reserved.$
  *
  * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr.h
deleted file mode 100644
index 4c4699647c3e..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H
-
-#include <bcmpkt/bcmpkt_flexhdr_internal.h>
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T                          0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T             1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T             2
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T                3
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T            4
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T             5
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T                    6
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T             7
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T                         8
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T                        9
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T                         10
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T                         11
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T                           12
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T             13
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T             14
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T       15
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T       16
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T       17
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T                         18
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T             19
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T             20
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T                          21
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T                   22
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T                   23
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T                   24
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T                         25
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T                        26
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_T                   27
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT    28
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_NAME_MAP_INIT \
-    {"arp_t", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T},\
-    {"cpu_composites_0_t", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T},\
-    {"cpu_composites_1_t", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T},\
-    {"ep_nih_header_t", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T},\
-    {"erspan3_fixed_hdr_t", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T},\
-    {"erspan3_subhdr_5_t", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T},\
-    {"ethertype_t", BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T},\
-    {"generic_loopback_t", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T},\
-    {"icmp_t", BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T},\
-    {"ipfix_t", BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T},\
-    {"ipv4_t", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T},\
-    {"ipv6_t", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T},\
-    {"l2_t", BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T},\
-    {"mirror_erspan_sn_t", BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T},\
-    {"mirror_transport_t", BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T},\
-    {"psamp_mirror_on_drop_0_t", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
-    {"psamp_mirror_on_drop_1_t", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\
-    {"psamp_mirror_on_drop_2_t", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\
-    {"rarp_t", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T},\
-    {"tcp_first_4bytes_t", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T},\
-    {"tcp_last_16bytes_t", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T},\
-    {"udp_t", BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T},\
-    {"unknown_l3_t", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T},\
-    {"unknown_l4_t", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T},\
-    {"unknown_l5_t", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T},\
-    {"vlan_t", BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T},\
-    {"vxlan_t", BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T},\
-    {"RXPMD_FLEX_T", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_T},\
-    {"flexhdr count", BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT}
-
-#endif /* BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr_data.h
deleted file mode 100644
index 451241422a7b..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr_data.h
+++ /dev/null
@@ -1,592 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H
-
-/*!
- * \name ARP_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_LEN  0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_TYPE 1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_OPERATION     2
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_PROT_ADDR_LEN 3
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_PROTOCOL_TYPE 4
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_HA     5
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_IP     6
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_HA     7
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_IP     8
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT          9
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_IP},\
-    {"arp_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_0_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT0", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
-    {"DMA_CONT1", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
-    {"DMA_CONT2", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
-    {"DMA_CONT3", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
-    {"DMA_CONT4", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
-    {"DMA_CONT5", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
-    {"DMA_CONT6", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
-    {"cpu_composites_0_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_1_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT10", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
-    {"DMA_CONT11", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
-    {"DMA_CONT12", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
-    {"DMA_CONT13", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
-    {"DMA_CONT14", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
-    {"DMA_CONT15", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
-    {"DMA_CONT16", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
-    {"DMA_CONT17", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
-    {"DMA_CONT7", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
-    {"DMA_CONT8", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
-    {"DMA_CONT9", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
-    {"cpu_composites_1_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
-
-/*!
- * \name EP_NIH_HEADER_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_START                10
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"HEADER_SUBTYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
-    {"HEADER_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
-    {"OPAQUE_CTRL_A", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
-    {"OPAQUE_CTRL_B", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
-    {"OPAQUE_CTRL_C", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
-    {"OPAQUE_OBJECT_A", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
-    {"OPAQUE_OBJECT_B", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
-    {"OPAQUE_OBJECT_C", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
-    {"RECIRC_PROFILE_INDEX", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
-    {"RESERVED_0", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
-    {"START", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_START},\
-    {"TIMESTAMP", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
-    {"ep_nih_header_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_FIXED_HDR_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
-    {"BSO", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
-    {"COS", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
-    {"GBP_SID", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
-    {"P_FT_HWID_D_GRA_O", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
-    {"SESSION_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
-    {"T", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
-    {"TIMESTAMP", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
-    {"VER", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
-    {"VLAN", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
-    {"erspan3_fixed_hdr_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_SUBHDR_5_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
-    {"PLATFORM_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
-    {"PORT_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
-    {"SWITCH_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
-    {"TIMESTAMP", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
-    {"erspan3_subhdr_5_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
-
-/*!
- * \name ETHERTYPE_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_TYPE 0
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT          1
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
-    {"TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_TYPE},\
-    {"ethertype_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT}
-
-/*!
- * \name GENERIC_LOOPBACK_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
-    {"DESTINATION_OBJ", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
-    {"DESTINATION_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
-    {"ENTROPY_OBJ", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
-    {"FLAGS", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
-    {"HEADER_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
-    {"INPUT_PRIORITY", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
-    {"INTERFACE_CTRL", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
-    {"INTERFACE_OBJ", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
-    {"PROCESSING_CTRL_0", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
-    {"PROCESSING_CTRL_1", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
-    {"QOS_OBJ", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
-    {"RESERVED_1", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
-    {"RESERVED_2", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
-    {"SOURCE_SYSTEM_PORT", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
-    {"START_BYTE", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
-    {"generic_loopback_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
-
-/*!
- * \name ICMP_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_CHECKSUM  0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_CODE      1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_ICMP_TYPE 2
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT          3
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_CHECKSUM},\
-    {"CODE", BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_CODE},\
-    {"ICMP_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_ICMP_TYPE},\
-    {"icmp_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT}
-
-/*!
- * \name IPFIX_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_EXPORT_TIME   0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_LENGTH        1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_VERSION       4
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT          5
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
-    {"EXPORT_TIME", BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_EXPORT_TIME},\
-    {"LENGTH", BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_LENGTH},\
-    {"OBS_DOMAIN_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
-    {"SEQUENCE_NUM", BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
-    {"VERSION", BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_VERSION},\
-    {"ipfix_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT}
-
-/*!
- * \name IPV4_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_DA                0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_HDR_CHECKSUM      2
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_ID                3
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_OPTION            4
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_PROTOCOL          5
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_SA                6
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOS               7
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOTAL_LENGTH      8
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_TTL               9
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT          11
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_DA},\
-    {"FLAGS_FRAG_OFFSET", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
-    {"HDR_CHECKSUM", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_HDR_CHECKSUM},\
-    {"ID", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_ID},\
-    {"OPTION", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_OPTION},\
-    {"PROTOCOL", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_PROTOCOL},\
-    {"SA", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_SA},\
-    {"TOS", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOS},\
-    {"TOTAL_LENGTH", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOTAL_LENGTH},\
-    {"TTL", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_TTL},\
-    {"VERSION_HDR_LEN", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
-    {"ipv4_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT}
-
-/*!
- * \name IPV6_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_DA             0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FLOW_LABEL     1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_HOP_LIMIT      2
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_NEXT_HEADER    3
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_SA             5
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_VERSION        7
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT          8
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_DA},\
-    {"FLOW_LABEL", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FLOW_LABEL},\
-    {"HOP_LIMIT", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_HOP_LIMIT},\
-    {"NEXT_HEADER", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_NEXT_HEADER},\
-    {"PAYLOAD_LENGTH", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
-    {"SA", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_SA},\
-    {"TRAFFIC_CLASS", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
-    {"VERSION", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_VERSION},\
-    {"ipv6_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT}
-
-/*!
- * \name L2_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_MACDA 0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_MACSA 1
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT          2
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
-    {"MACDA", BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_MACDA},\
-    {"MACSA", BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_MACSA},\
-    {"l2_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT}
-
-/*!
- * \name MIRROR_ERSPAN_SN_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
-    {"SEQ_NUM", BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
-    {"mirror_erspan_sn_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
-
-/*!
- * \name MIRROR_TRANSPORT_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
-    {"mirror_transport_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_MOD_PORT", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
-    {"INGRESS_PORT", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
-    {"LENGTH", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
-    {"OBS_TIME_NS", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
-    {"SWITCH_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
-    {"TEMPLATE_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
-    {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_1_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON    0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL      2
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH     3
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA     4
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR  5
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT          6
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \
-    {"ING_DROP_REASON", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\
-    {"MIRROR_ON_DROP_OBJ", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\
-    {"MMU_DROP_CTRL", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\
-    {"SAMPLED_LENGTH", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_1_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_2_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON       0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0            2
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH        3
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA        4
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR     5
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT          6
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \
-    {"EGR_DROP_REASON", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\
-    {"EP_COPY_SESSION_INDEX", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\
-    {"RESERVED_0", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\
-    {"SAMPLED_LENGTH", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_2_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT}
-
-/*!
- * \name RARP_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_LEN  0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_TYPE 1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_OPERATION     2
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_PROT_ADDR_LEN 3
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_PROTOCOL_TYPE 4
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_HA     5
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_IP     6
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_HA     7
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_IP     8
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT          9
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_IP},\
-    {"rarp_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT}
-
-/*!
- * \name TCP_FIRST_4BYTES_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
-    {"DST_PORT", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
-    {"SRC_PORT", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
-    {"tcp_first_4bytes_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
-
-/*!
- * \name TCP_LAST_16BYTES_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
-    {"ACK_NUM", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
-    {"CHECKSUM", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
-    {"HDR_LEN_AND_FLAGS", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
-    {"SEQ_NUM", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
-    {"URGENT_PTR", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
-    {"WIN_SIZE", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
-    {"tcp_last_16bytes_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
-
-/*!
- * \name UDP_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_CHECKSUM   0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_DST_PORT   1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_SRC_PORT   2
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_UDP_LENGTH 3
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT          4
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_CHECKSUM},\
-    {"DST_PORT", BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_DST_PORT},\
-    {"SRC_PORT", BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_SRC_PORT},\
-    {"UDP_LENGTH", BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_UDP_LENGTH},\
-    {"udp_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L3_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
-    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
-    {"unknown_l3_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L4_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
-    {"unknown_l4_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L5_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
-    {"L5_BYTES_0_1", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
-    {"L5_BYTES_2_3", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
-    {"L5_BYTES_4_7", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
-    {"unknown_l5_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
-
-/*!
- * \name VLAN_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_CFI  0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_PCP  1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_TPID 2
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_VID  3
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT          4
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
-    {"CFI", BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_CFI},\
-    {"PCP", BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_PCP},\
-    {"TPID", BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_TPID},\
-    {"VID", BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_VID},\
-    {"vlan_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT}
-
-/*!
- * \name VXLAN_T field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_RESERVED2        1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_VN_ID            2
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT          3
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS_RESERVED_1", BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
-    {"RESERVED2", BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_RESERVED2},\
-    {"VN_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_VN_ID},\
-    {"vxlan_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT}
-
-
-#endif /* BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h
deleted file mode 100644
index abae240cc105..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H
-
-/*!
- * \name RX flex metadata field IDs.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DVP_15_0                                       1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              2
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         3
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         4
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0                      5
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0                     6
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                      7
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                     8
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0                           9
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                        10
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                       11
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       12
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              13
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                             14
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                            15
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                            16
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 17
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    18
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    19
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    20
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    21
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0                             22
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    23
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  24
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0              25
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0                              26
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            27
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            28
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   29
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        30
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              31
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             32
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0                            33
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                34
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_VFI_15_0                                       35
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_FID_COUNT                       36
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT                    21
-
-/*!
- * \name Packet Flex Reason Types.
- */
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                  0
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP                        1
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                  2
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT                      3
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP              4
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS         5
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD             6
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE         7
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP              8
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS         9
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR               10
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR               11
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL           12
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST            13
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED    14
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU             15
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 16
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT               17
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 18
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                  19
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP                        20
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
-    {"CML_FLAGS", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
-    {"IFP", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP},\
-    {"IFP_METER", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
-    {"IVXLT", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
-    {"L2_DST_LOOKUP", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
-    {"L2_DST_LOOKUP_MISS", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
-    {"L2_SRC_DISCARD", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\
-    {"L2_SRC_STATIC_MOVE", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
-    {"L3_DST_LOOKUP", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
-    {"L3_DST_LOOKUP_MISS", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
-    {"L3_HDR_ERROR", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
-    {"L3_TTL_ERROR", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
-    {"LEARN_CACHE_FULL", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
-    {"MACSA_MULTICAST", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\
-    {"MEMBERSHIP_CHECK_FAILED", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
-    {"NO_COPY_TO_CPU", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
-    {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
-    {"PROTOCOL_PKT", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
-    {"SPANNING_TREE_CHECK_FAILED", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
-    {"TRACE_DOP", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
-    {"VFP", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP},\
-    {"flex reason count", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT}
-
-#endif /* BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h
deleted file mode 100644
index a090e79e769d..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h
+++ /dev/null
@@ -1,213 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56780_a0_cna_6_5_29_sf_match_id_info.yml
- * for device bcm56780_a0 and variant cna_6_5_29.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-
-/*!
- * \brief Get the Match ID DataBase information.
- *
- * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
-*/
-extern bcmpkt_rxpmd_match_id_db_info_t *
-    bcm56780_a0_cna_6_5_29_rxpmd_match_id_db_info_get(void);
-
-/*!
- * \brief Get the Match ID Mapping information.
- *
- * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
-*/
-extern bcmpkt_rxpmd_match_id_map_info_t *
-    bcm56780_a0_cna_6_5_29_rxpmd_match_id_map_info_get(void);
-
-/*!
-  \name RXPMD Match IDs
-*/
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  0
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  1
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  2
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  3
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  4
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  5
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  6
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  7
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  8
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  9
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  10
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  11
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  12
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  13
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  14
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  15
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  16
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  17
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  18
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  19
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  20
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  21
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  22
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  23
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  24
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  25
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  26
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  27
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  28
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  29
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  30
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  31
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  32
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  33
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  34
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  35
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  36
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  37
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  38
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  39
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  40
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  41
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  42
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  43
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  44
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  45
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  46
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  47
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  48
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  49
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  50
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  51
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  52
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  53
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  54
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  55
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  56
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  57
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  58
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  59
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  60
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  61
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  62
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  63
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  64
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  65
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  66
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  67
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  68
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  69
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  70
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  71
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  72
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  73
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  74
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  75
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  76
-#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT  77
-
-#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
-    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
-    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
-    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
-    {"rxpmd_match_id_count", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT}
-
-#endif /*! BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h
new file mode 100644
index 000000000000..b8df0d5c6ae4
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h
@@ -0,0 +1,96 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_H
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T                      0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T         1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T         2
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T            3
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T        4
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T         5
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T                6
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T         7
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T                     8
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T                    9
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T                     10
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T                     11
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T                       12
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T         13
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T         14
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   15
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T   16
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T   17
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T                     18
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T         19
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T         20
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T                      21
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T               22
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T               23
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T               24
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T                     25
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T                    26
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_T               27
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT    28
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T},\
+    {"cpu_composites_0_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"ep_nih_header_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T},\
+    {"erspan3_fixed_hdr_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"ethertype_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T},\
+    {"generic_loopback_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"icmp_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T},\
+    {"ipfix_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_1_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\
+    {"psamp_mirror_on_drop_2_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\
+    {"rarp_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T},\
+    {"tcp_first_4bytes_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T},\
+    {"vxlan_t", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T},\
+    {"RXPMD_FLEX_T", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h
new file mode 100644
index 000000000000..965147346b13
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h
@@ -0,0 +1,592 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_OPERATION     2
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name EP_NIH_HEADER_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_START                10
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"HEADER_SUBTYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
+    {"HEADER_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
+    {"OPAQUE_CTRL_A", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
+    {"OPAQUE_CTRL_B", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
+    {"OPAQUE_CTRL_C", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
+    {"OPAQUE_OBJECT_A", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
+    {"OPAQUE_OBJECT_B", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
+    {"OPAQUE_OBJECT_C", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
+    {"RECIRC_PROFILE_INDEX", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
+    {"RESERVED_0", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
+    {"START", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_START},\
+    {"TIMESTAMP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
+    {"ep_nih_header_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"RESERVED_2", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
+    {"SOURCE_SYSTEM_PORT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CODE      1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_DA                0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_ID                3
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_OPTION            4
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_SA                6
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOS               7
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TTL               9
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_DA             0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_SA             5
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACDA 0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACSA 1
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_1_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON    0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL      2
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH     3
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA     4
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR  5
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT          6
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \
+    {"ING_DROP_REASON", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\
+    {"MIRROR_ON_DROP_OBJ", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\
+    {"MMU_DROP_CTRL", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\
+    {"SAMPLED_LENGTH", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_1_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_2_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON       0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0            2
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH        3
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA        4
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR     5
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT          6
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \
+    {"EGR_DROP_REASON", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\
+    {"EP_COPY_SESSION_INDEX", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\
+    {"RESERVED_0", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_2_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_OPERATION     2
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"unknown_l5_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_CFI  0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_PCP  1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_TPID 2
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_VID  3
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT}
+
+
+#endif /* BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 000000000000..4754761fedf3
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,124 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                       1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              2
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         3
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         4
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0                      5
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0                     6
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                      7
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                     8
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0                           9
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                        10
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                       11
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       12
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              13
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                             14
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                            15
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                            16
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 17
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    18
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    19
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    20
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    21
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0                             22
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    23
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  24
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0              25
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0                              26
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            27
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            28
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   29
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        30
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              31
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             32
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0                            33
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                34
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                       35
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       36
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    21
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                  0
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP                        1
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                  2
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                      3
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP              4
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS         5
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD             6
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE         7
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP              8
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS         9
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR               10
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR               11
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL           12
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST            13
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED    14
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU             15
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 16
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT               17
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 18
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                  19
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP                        20
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CML_FLAGS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"IFP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IVXLT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_DISCARD", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\
+    {"L2_SRC_STATIC_MOVE", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_TTL_ERROR", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\
+    {"MEMBERSHIP_CHECK_FAILED", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
+    {"NO_COPY_TO_CPU", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"SPANNING_TREE_CHECK_FAILED", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
+    {"TRACE_DOP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"VFP", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 000000000000..7b58853c3853
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,213 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56780_a0_cna_6_5_30_2_0_sf_match_id_info.yml
+ * for device bcm56780_a0 and variant cna_6_5_30_2_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  0
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  1
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  2
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  3
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  4
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  5
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  6
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  7
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  8
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  9
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  10
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  11
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  12
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  13
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  14
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  15
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  16
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  17
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  18
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  19
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  20
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  21
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  22
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  23
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  24
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  25
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  26
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  27
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  28
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  29
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  30
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  31
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  32
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  33
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  34
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  35
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  36
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  37
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  38
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  39
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  40
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  41
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  42
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  43
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  44
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  45
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  46
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  47
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  48
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  49
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  50
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  51
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  52
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  53
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  54
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  55
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  56
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  57
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  58
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  59
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  60
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  61
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  62
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  63
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  64
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  65
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  66
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  67
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  68
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  69
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  70
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  71
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  72
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  73
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  74
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  75
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  76
+#define BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT  77
+
+#define BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr.h
deleted file mode 100644
index 0271370d2443..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr.h
+++ /dev/null
@@ -1,180 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_H
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_H
-
-#include <bcmpkt/bcmpkt_flexhdr_internal.h>
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T                         0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T                      1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T                         2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T                       3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T            4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T            5
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T                 6
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T               7
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T           8
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T            9
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T                         10
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T                        11
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T                   12
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T                        13
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T            14
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T                         15
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T                  16
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T                     17
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T                    18
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T                     19
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T                         20
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T                    21
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T             22
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T                  23
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T                        24
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T             25
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T             26
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T               27
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T               28
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T               29
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T                  30
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T                 31
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T                32
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T                        33
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T                       34
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T                        35
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T                        36
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T                          37
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T            38
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T            39
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T                    40
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T                     41
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T                     42
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T                        43
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T                      44
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T                45
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T                     46
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T                     47
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T      48
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T      49
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T      50
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T                        51
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T                     52
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T                       53
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T                54
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T                55
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T                56
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T                    57
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T                       58
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T            59
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T            60
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T                         61
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T                  62
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T                  63
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T                  64
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T                        65
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T                       66
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T                       67
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T                        68
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_T                  69
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_COUNT    70
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
-    {"arp_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T},\
-    {"authen_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T},\
-    {"bfd_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T},\
-    {"cntag_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T},\
-    {"cpu_composites_0_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T},\
-    {"cpu_composites_1_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T},\
-    {"dest_option_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T},\
-    {"ep_nih_header_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T},\
-    {"erspan3_fixed_hdr_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
-    {"erspan3_subhdr_5_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
-    {"esp_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T},\
-    {"etag_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T},\
-    {"ethertype_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T},\
-    {"frag_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T},\
-    {"generic_loopback_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T},\
-    {"gpe_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T},\
-    {"gre_chksum_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T},\
-    {"gre_key_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T},\
-    {"gre_rout_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T},\
-    {"gre_seq_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T},\
-    {"gre_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T},\
-    {"hg3_base_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T},\
-    {"hg3_extension_0_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T},\
-    {"hop_by_hop_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T},\
-    {"icmp_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T},\
-    {"ifa_flex_md_0_a_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T},\
-    {"ifa_flex_md_0_b_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T},\
-    {"ifa_flex_md_1_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T},\
-    {"ifa_flex_md_2_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T},\
-    {"ifa_flex_md_3_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T},\
-    {"ifa_header_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T},\
-    {"ifa_md_base_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T},\
-    {"ifa_metadata_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T},\
-    {"igmp_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T},\
-    {"ipfix_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T},\
-    {"ipv4_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T},\
-    {"ipv6_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T},\
-    {"l2_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T},\
-    {"mirror_erspan_sn_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
-    {"mirror_transport_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T},\
-    {"mpls_ach_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T},\
-    {"mpls_bv_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T},\
-    {"mpls_cw_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T},\
-    {"mpls_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T},\
-    {"p_1588_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T},\
-    {"prog_ext_hdr_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T},\
-    {"psamp_0_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T},\
-    {"psamp_1_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T},\
-    {"psamp_mirror_on_drop_0_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
-    {"psamp_mirror_on_drop_1_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\
-    {"psamp_mirror_on_drop_2_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\
-    {"rarp_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T},\
-    {"routing_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T},\
-    {"rspan_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T},\
-    {"sflow_shim_0_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T},\
-    {"sflow_shim_1_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T},\
-    {"sflow_shim_2_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T},\
-    {"snap_llc_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T},\
-    {"svtag_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T},\
-    {"tcp_first_4bytes_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T},\
-    {"tcp_last_16bytes_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T},\
-    {"udp_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T},\
-    {"unknown_l3_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T},\
-    {"unknown_l4_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T},\
-    {"unknown_l5_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T},\
-    {"vlan_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T},\
-    {"vntag_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T},\
-    {"vxlan_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T},\
-    {"wesp_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T},\
-    {"RXPMD_FLEX_T", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_T},\
-    {"flexhdr count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_COUNT}
-
-#endif /* BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr_data.h
deleted file mode 100644
index 11489d58c5a9..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr_data.h
+++ /dev/null
@@ -1,1343 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_DATA_H
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_DATA_H
-
-/*!
- * \name ARP_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_HARDWARE_LEN  0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_OPERATION     2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_SENDER_HA     5
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_SENDER_IP     6
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_TARGET_HA     7
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_TARGET_IP     8
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_FID_COUNT          9
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_TARGET_IP},\
-    {"arp_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_FID_COUNT}
-
-/*!
- * \name AUTHEN_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_DATA        0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_RESERVED    3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_SPI         5
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_FID_COUNT          6
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_DATA},\
-    {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
-    {"PAYLOAD_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
-    {"RESERVED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_RESERVED},\
-    {"SEQ_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
-    {"SPI", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_SPI},\
-    {"authen_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_FID_COUNT}
-
-/*!
- * \name BFD_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_AP            0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_BFD_LENGTH    1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_CPI           2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DEM           3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DESMINTXINTV  4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DETECTMULT    5
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DIAG          6
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FIN           7
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_MINECHORXINTV 8
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_MPT           9
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_MYDISCRIM     10
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_POLL          11
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_REQMINRXINTV  12
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_STA           13
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_URDISCRIM     14
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_VERSION       15
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FID_COUNT          16
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
-    {"AP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_AP},\
-    {"BFD_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_BFD_LENGTH},\
-    {"CPI", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_CPI},\
-    {"DEM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DEM},\
-    {"DESMINTXINTV", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DESMINTXINTV},\
-    {"DETECTMULT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DETECTMULT},\
-    {"DIAG", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DIAG},\
-    {"FIN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FIN},\
-    {"MINECHORXINTV", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_MINECHORXINTV},\
-    {"MPT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_MPT},\
-    {"MYDISCRIM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_MYDISCRIM},\
-    {"POLL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_POLL},\
-    {"REQMINRXINTV", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_REQMINRXINTV},\
-    {"STA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_STA},\
-    {"URDISCRIM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_URDISCRIM},\
-    {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_VERSION},\
-    {"bfd_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FID_COUNT}
-
-/*!
- * \name CNTAG_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_RPID 0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_TPID 1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_FID_COUNT          2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
-    {"RPID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_RPID},\
-    {"TPID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_TPID},\
-    {"cntag_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_0_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT0", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
-    {"DMA_CONT1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
-    {"DMA_CONT2", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
-    {"DMA_CONT3", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
-    {"DMA_CONT4", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
-    {"DMA_CONT5", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
-    {"DMA_CONT6", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
-    {"cpu_composites_0_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_1_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT10", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
-    {"DMA_CONT11", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
-    {"DMA_CONT12", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
-    {"DMA_CONT13", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
-    {"DMA_CONT14", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
-    {"DMA_CONT15", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
-    {"DMA_CONT16", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
-    {"DMA_CONT17", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
-    {"DMA_CONT7", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
-    {"DMA_CONT8", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
-    {"DMA_CONT9", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
-    {"cpu_composites_1_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
-
-/*!
- * \name DEST_OPTION_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_OPTION      2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
-    {"OPTION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_OPTION},\
-    {"dest_option_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
-
-/*!
- * \name EP_NIH_HEADER_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_START                10
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"HEADER_SUBTYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
-    {"HEADER_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
-    {"OPAQUE_CTRL_A", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
-    {"OPAQUE_CTRL_B", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
-    {"OPAQUE_CTRL_C", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
-    {"OPAQUE_OBJECT_A", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
-    {"OPAQUE_OBJECT_B", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
-    {"OPAQUE_OBJECT_C", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
-    {"RECIRC_PROFILE_INDEX", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
-    {"RESERVED_0", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
-    {"START", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_START},\
-    {"TIMESTAMP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
-    {"ep_nih_header_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_FIXED_HDR_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
-    {"BSO", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
-    {"COS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
-    {"GBP_SID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
-    {"P_FT_HWID_D_GRA_O", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
-    {"SESSION_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
-    {"T", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
-    {"TIMESTAMP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
-    {"VER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
-    {"VLAN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
-    {"erspan3_fixed_hdr_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_SUBHDR_5_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
-    {"PLATFORM_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
-    {"PORT_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
-    {"SWITCH_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
-    {"TIMESTAMP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
-    {"erspan3_subhdr_5_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
-
-/*!
- * \name ESP_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_NEXT_HEADER 0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_PAD         1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_PAD_LEN     2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_SEQ_NUM     3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_SPI         4
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_FID_COUNT          5
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
-    {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_NEXT_HEADER},\
-    {"PAD", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_PAD},\
-    {"PAD_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_PAD_LEN},\
-    {"SEQ_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_SEQ_NUM},\
-    {"SPI", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_SPI},\
-    {"esp_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_FID_COUNT}
-
-/*!
- * \name ETAG_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_TAG  0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_TPID 1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_FID_COUNT          2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_TAG},\
-    {"TPID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_TPID},\
-    {"etag_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_FID_COUNT}
-
-/*!
- * \name ETHERTYPE_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_TYPE 0
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
-    {"TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_TYPE},\
-    {"ethertype_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
-
-/*!
- * \name FRAG_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FRAG_INFO   0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_ID          1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_NEXT_HEADER 2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_RESERVED    3
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FID_COUNT          4
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
-    {"FRAG_INFO", BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FRAG_INFO},\
-    {"ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_ID},\
-    {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_NEXT_HEADER},\
-    {"RESERVED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_RESERVED},\
-    {"frag_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FID_COUNT}
-
-/*!
- * \name GENERIC_LOOPBACK_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
-    {"DESTINATION_OBJ", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
-    {"DESTINATION_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
-    {"ENTROPY_OBJ", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
-    {"FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
-    {"HEADER_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
-    {"INPUT_PRIORITY", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
-    {"INTERFACE_CTRL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
-    {"INTERFACE_OBJ", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
-    {"PROCESSING_CTRL_0", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
-    {"PROCESSING_CTRL_1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
-    {"QOS_OBJ", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
-    {"RESERVED_1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
-    {"RESERVED_2", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
-    {"SOURCE_SYSTEM_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
-    {"START_BYTE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
-    {"generic_loopback_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
-
-/*!
- * \name GPE_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FLAGS         0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_RESERVED0     2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_RESERVED1     3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_VNI           4
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FID_COUNT          5
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FLAGS},\
-    {"NEXT_PROTOCOL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
-    {"RESERVED0", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_RESERVED0},\
-    {"RESERVED1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_RESERVED1},\
-    {"VNI", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_VNI},\
-    {"gpe_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FID_COUNT}
-
-/*!
- * \name GRE_CHKSUM_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
-    {"OFFSET", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
-    {"gre_chksum_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
-
-/*!
- * \name GRE_KEY_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_KEY 0
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_FID_COUNT          1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
-    {"KEY", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_KEY},\
-    {"gre_key_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_FID_COUNT}
-
-/*!
- * \name GRE_ROUT_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_ROUTING 0
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
-    {"ROUTING", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_ROUTING},\
-    {"gre_rout_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
-
-/*!
- * \name GRE_SEQ_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
-    {"gre_seq_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
-
-/*!
- * \name GRE_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_C_R_K_S  0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_PROTOCOL 1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_RESERVED 2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_VERSION  3
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_FID_COUNT          4
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
-    {"C_R_K_S", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_C_R_K_S},\
-    {"PROTOCOL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_PROTOCOL},\
-    {"RESERVED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_RESERVED},\
-    {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_VERSION},\
-    {"gre_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_FID_COUNT}
-
-/*!
- * \name HG3_BASE_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_CN                      0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_CNG                     1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_ENTROPY                 2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT         3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_HG3_RESERVED            4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_L3_ROUTED               5
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_MIRROR_COPY             6
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE          7
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION      8
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE           10
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_TC                      11
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_VERSION                 12
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_FID_COUNT          13
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \
-    {"CN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_CN},\
-    {"CNG", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_CNG},\
-    {"ENTROPY", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_ENTROPY},\
-    {"EXT_HDR_PRESENT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\
-    {"HG3_RESERVED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\
-    {"L3_ROUTED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\
-    {"MIRROR_COPY", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\
-    {"RESERVED_ETYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\
-    {"SYSTEM_DESTINATION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\
-    {"SYSTEM_DESTINATION_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\
-    {"SYSTEM_SOURCE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\
-    {"TC", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_TC},\
-    {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_VERSION},\
-    {"hg3_base_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_FID_COUNT}
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP       0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF      1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED    2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP          3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP        4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP        5
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP  6
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP  7
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1  8
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10
-
-/*!
- * \name HG3_EXTENSION_0_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID          0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF     1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS             2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_SVP               4
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT          5
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \
-    {"CLASS_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID},\
-    {"DVP_OR_L3_IIF", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\
-    {"FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\
-    {"FORWARDING_DOMAIN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\
-    {"SVP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\
-    {"hg3_extension_0_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT}
-
-/*!
- * \name HOP_BY_HOP_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
-    {"OPTION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
-    {"hop_by_hop_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
-
-/*!
- * \name ICMP_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_CHECKSUM  0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_CODE      1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_ICMP_TYPE 2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_FID_COUNT          3
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_CHECKSUM},\
-    {"CODE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_CODE},\
-    {"ICMP_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_ICMP_TYPE},\
-    {"icmp_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_0_A_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL   0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT          2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \
-    {"FWD_HDR_TTL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\
-    {"LNS_DEVICE_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\
-    {"ifa_flex_md_0_a_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_0_B_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN               0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED       1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID         2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT          4
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \
-    {"CN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\
-    {"PORT_SPEED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\
-    {"QUEUE_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\
-    {"RX_TIMESTAMP_SEC", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\
-    {"ifa_flex_md_0_b_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_1_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID       0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID      1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT          3
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PORT_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\
-    {"INGRESS_PORT_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\
-    {"RX_TIMESTAMP_NANOSEC", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\
-    {"ifa_flex_md_1_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_2_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT    1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT          2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \
-    {"RESIDENCE_TIME_NANOSEC", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\
-    {"TX_QUEUE_BYTE_COUNT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\
-    {"ifa_flex_md_2_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_3_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT          2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \
-    {"MMU_STAT_0", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\
-    {"MMU_STAT_1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\
-    {"ifa_flex_md_3_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT}
-
-/*!
- * \name IFA_HEADER_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FLAGS      0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_GNS        1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_VER        4
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT          5
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FLAGS},\
-    {"GNS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_GNS},\
-    {"MAX_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
-    {"NEXT_HDR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
-    {"VER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_VER},\
-    {"ifa_header_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT}
-
-/*!
- * \name IFA_MD_BASE_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR            0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR           2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT          3
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \
-    {"ACTION_VECTOR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\
-    {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
-    {"REQUEST_VECTOR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\
-    {"ifa_md_base_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT}
-
-/*!
- * \name IFA_METADATA_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR            0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_METADATA                 2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR           3
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_FID_COUNT          4
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \
-    {"ACTION_VECTOR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\
-    {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\
-    {"METADATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_METADATA},\
-    {"REQUEST_VECTOR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\
-    {"ifa_metadata_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_FID_COUNT}
-
-/*!
- * \name IGMP_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_CHECKSUM      0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_IGMP_TYPE     2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_FID_COUNT          4
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_CHECKSUM},\
-    {"GROUP_ADDRESS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
-    {"IGMP_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_IGMP_TYPE},\
-    {"MAX_RESP_TIME", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
-    {"igmp_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_FID_COUNT}
-
-/*!
- * \name IPFIX_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_LENGTH        1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_VERSION       4
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_FID_COUNT          5
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
-    {"EXPORT_TIME", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
-    {"LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_LENGTH},\
-    {"OBS_DOMAIN_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
-    {"SEQUENCE_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
-    {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_VERSION},\
-    {"ipfix_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_FID_COUNT}
-
-/*!
- * \name IPV4_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_DA                0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_ID                3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_OPTION            4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_PROTOCOL          5
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_SA                6
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_TOS               7
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_TTL               9
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FID_COUNT          11
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_DA},\
-    {"FLAGS_FRAG_OFFSET", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
-    {"HDR_CHECKSUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
-    {"ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_ID},\
-    {"OPTION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_OPTION},\
-    {"PROTOCOL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_PROTOCOL},\
-    {"SA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_SA},\
-    {"TOS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_TOS},\
-    {"TOTAL_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
-    {"TTL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_TTL},\
-    {"VERSION_HDR_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
-    {"ipv4_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FID_COUNT}
-
-/*!
- * \name IPV6_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_DA             0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FLOW_LABEL     1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_HOP_LIMIT      2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_NEXT_HEADER    3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_SA             5
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_VERSION        7
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FID_COUNT          8
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_DA},\
-    {"FLOW_LABEL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FLOW_LABEL},\
-    {"HOP_LIMIT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_HOP_LIMIT},\
-    {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_NEXT_HEADER},\
-    {"PAYLOAD_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
-    {"SA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_SA},\
-    {"TRAFFIC_CLASS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
-    {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_VERSION},\
-    {"ipv6_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FID_COUNT}
-
-/*!
- * \name L2_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_MACDA 0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_MACSA 1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_FID_COUNT          2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
-    {"MACDA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_MACDA},\
-    {"MACSA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_MACSA},\
-    {"l2_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_FID_COUNT}
-
-/*!
- * \name MIRROR_ERSPAN_SN_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
-    {"SEQ_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
-    {"mirror_erspan_sn_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
-
-/*!
- * \name MIRROR_TRANSPORT_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
-    {"mirror_transport_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
-
-/*!
- * \name MPLS_ACH_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_RESERVED     2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_VERSION      3
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
-    {"CHANNEL_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
-    {"CW_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
-    {"RESERVED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_RESERVED},\
-    {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_VERSION},\
-    {"mpls_ach_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
-
-/*!
- * \name MPLS_BV_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_VALUE 0
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
-    {"VALUE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_VALUE},\
-    {"mpls_bv_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_FID_COUNT}
-
-/*!
- * \name MPLS_CW_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_RESERVED   1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
-    {"CW_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
-    {"RESERVED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_RESERVED},\
-    {"SEQ_NUMBER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
-    {"mpls_cw_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_FID_COUNT}
-
-/*!
- * \name MPLS_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_BOS   0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_EXP   1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_LABEL 2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_TTL   3
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_FID_COUNT          4
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
-    {"BOS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_BOS},\
-    {"EXP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_EXP},\
-    {"LABEL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_LABEL},\
-    {"TTL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_TTL},\
-    {"mpls_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_FID_COUNT}
-
-/*!
- * \name P_1588_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_CNTRL          0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_CORRECTION     1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_DOMAIN_NB      2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FLAGS          3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_MSG_LENGTH     5
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_MSG_TYPE       6
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_RESERVED1      7
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_RESERVED2      8
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_RESERVED3      9
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_SEQ_ID         10
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_SRCPORTID      11
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_VERSION        13
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FID_COUNT          14
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
-    {"CNTRL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_CNTRL},\
-    {"CORRECTION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_CORRECTION},\
-    {"DOMAIN_NB", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_DOMAIN_NB},\
-    {"FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FLAGS},\
-    {"LOGMSGINTERVAL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
-    {"MSG_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_MSG_LENGTH},\
-    {"MSG_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_MSG_TYPE},\
-    {"RESERVED1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_RESERVED1},\
-    {"RESERVED2", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_RESERVED2},\
-    {"RESERVED3", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_RESERVED3},\
-    {"SEQ_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_SEQ_ID},\
-    {"SRCPORTID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_SRCPORTID},\
-    {"TRANSPORTSPEC", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
-    {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_VERSION},\
-    {"p_1588_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FID_COUNT}
-
-/*!
- * \name PROG_EXT_HDR_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
-    {"OPTION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
-    {"prog_ext_hdr_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
-
-/*!
- * \name PSAMP_0_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FLOWSET        0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_LENGTH         1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
-    {"FLOWSET", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FLOWSET},\
-    {"LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_LENGTH},\
-    {"NEXT_HOP_INDEX", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
-    {"OBS_TIME_NS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
-    {"TEMPLATE_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
-    {"psamp_0_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_1_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_DLB_ID         0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_EPOCH          2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
-    {"DLB_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_DLB_ID},\
-    {"EGRESS_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
-    {"EPOCH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_EPOCH},\
-    {"INGRESS_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
-    {"SAMPLED_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
-    {"VARIABLE_FLAG", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
-    {"psamp_1_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_MOD_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
-    {"INGRESS_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
-    {"LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
-    {"OBS_TIME_NS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
-    {"SWITCH_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
-    {"TEMPLATE_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
-    {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_1_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON    0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL      2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH     3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA     4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR  5
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT          6
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \
-    {"ING_DROP_REASON", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\
-    {"MIRROR_ON_DROP_OBJ", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\
-    {"MMU_DROP_CTRL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\
-    {"SAMPLED_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_1_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_2_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON       0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0            2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH        3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA        4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR     5
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT          6
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \
-    {"EGR_DROP_REASON", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\
-    {"EP_COPY_SESSION_INDEX", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\
-    {"RESERVED_0", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\
-    {"SAMPLED_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_2_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT}
-
-/*!
- * \name RARP_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_HARDWARE_LEN  0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_OPERATION     2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_SENDER_HA     5
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_SENDER_IP     6
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_TARGET_HA     7
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_TARGET_IP     8
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_FID_COUNT          9
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_TARGET_IP},\
-    {"rarp_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_FID_COUNT}
-
-/*!
- * \name ROUTING_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_DATA          0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_FID_COUNT          5
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_DATA},\
-    {"HDR_EXT_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
-    {"ROUTING_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
-    {"SEGMENTS_LEFT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
-    {"routing_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_FID_COUNT}
-
-/*!
- * \name RSPAN_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_TAG  0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_TPID 1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_FID_COUNT          2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_TAG},\
-    {"TPID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_TPID},\
-    {"rspan_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_0_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
-    {"SYS_DESTINATION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
-    {"SYS_SOURCE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
-    {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
-    {"sflow_shim_0_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_1_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
-    {"FLAG_DEST_SAMPLE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
-    {"FLAG_DISCARDED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
-    {"FLAG_FLEX_SAMPLE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
-    {"FLAG_MCAST", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
-    {"FLAG_SRC_SAMPLE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
-    {"FLAG_TRUNCATED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
-    {"RESERVED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
-    {"SYS_OPCODE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
-    {"sflow_shim_1_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_2_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
-    {"USER_META_DATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
-    {"sflow_shim_2_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
-
-/*!
- * \name SNAP_LLC_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_LENGTH   0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
-    {"LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_LENGTH},\
-    {"SNAP_LLC", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
-    {"snap_llc_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
-
-/*!
- * \name SVTAG_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_DATA_LWR 0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_DATA_UPR 1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_FID_COUNT          2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \
-    {"DATA_LWR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_DATA_LWR},\
-    {"DATA_UPR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_DATA_UPR},\
-    {"svtag_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_FID_COUNT}
-
-/*!
- * \name TCP_FIRST_4BYTES_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
-    {"DST_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
-    {"SRC_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
-    {"tcp_first_4bytes_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
-
-/*!
- * \name TCP_LAST_16BYTES_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
-    {"ACK_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
-    {"CHECKSUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
-    {"HDR_LEN_AND_FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
-    {"SEQ_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
-    {"URGENT_PTR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
-    {"WIN_SIZE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
-    {"tcp_last_16bytes_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
-
-/*!
- * \name UDP_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_CHECKSUM   0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_DST_PORT   1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_SRC_PORT   2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_UDP_LENGTH 3
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_FID_COUNT          4
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_CHECKSUM},\
-    {"DST_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_DST_PORT},\
-    {"SRC_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_SRC_PORT},\
-    {"UDP_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_UDP_LENGTH},\
-    {"udp_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L3_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
-    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
-    {"unknown_l3_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L4_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
-    {"unknown_l4_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L5_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
-    {"L5_BYTES_0_1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
-    {"L5_BYTES_2_3", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
-    {"L5_BYTES_4_7", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
-    {"unknown_l5_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
-
-/*!
- * \name VLAN_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_CFI  0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_PCP  1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_TPID 2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_VID  3
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_FID_COUNT          4
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
-    {"CFI", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_CFI},\
-    {"PCP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_PCP},\
-    {"TPID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_TPID},\
-    {"VID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_VID},\
-    {"vlan_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_FID_COUNT}
-
-/*!
- * \name VNTAG_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_TAG  0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_TPID 1
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_FID_COUNT          2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_TAG},\
-    {"TPID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_TPID},\
-    {"vntag_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_FID_COUNT}
-
-/*!
- * \name VXLAN_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_RESERVED2        1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_VN_ID            2
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FID_COUNT          3
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS_RESERVED_1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
-    {"RESERVED2", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_RESERVED2},\
-    {"VN_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_VN_ID},\
-    {"vxlan_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FID_COUNT}
-
-/*!
- * \name WESP_T field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FLAGS       0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_HEADER_LEN  1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_NEXT_HEADER 2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_SEQ_NUM     3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_SPI         4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_TRAILER_LEN 5
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_WESP_IV     6
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FID_COUNT          7
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FLAGS},\
-    {"HEADER_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_HEADER_LEN},\
-    {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_NEXT_HEADER},\
-    {"SEQ_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_SEQ_NUM},\
-    {"SPI", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_SPI},\
-    {"TRAILER_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_TRAILER_LEN},\
-    {"WESP_IV", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_WESP_IV},\
-    {"wesp_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FID_COUNT}
-
-
-#endif /* BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_flex_data.h
deleted file mode 100644
index 7b484da3d47a..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_flex_data.h
+++ /dev/null
@@ -1,180 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DATA_H
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DATA_H
-
-/*!
- * \name RX flex metadata field IDs.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                                 0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                            1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                                  2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                                         3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0                                     4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 5
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0                   6
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                                    7
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                                    8
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                                 9
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                                10
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                                   11
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                                  12
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                                  13
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                                         14
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                                   15
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0              16
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                                 17
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                                        18
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                                       19
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                                       20
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0            21
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                               22
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                               23
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                               24
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                               25
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                               26
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                             27
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0                                28
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0                         29
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                                         30
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                                       31
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                                       32
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                                  33
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                              34
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                                   35
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                                         36
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                                        37
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                                        38
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                           39
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                                  40
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0              41
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       42
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    46
-
-/*!
- * \name Packet Flex Reason Types.
- */
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               0
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED                    2
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  3
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED                     4
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  5
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   6
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     7
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               8
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      9
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   10
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           11
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      12
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      13
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           14
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      15
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            16
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        17
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            18
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        19
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST                         20
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      21
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      22
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      23
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      24
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      25
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      26
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      27
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      28
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED                 29
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              30
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  31
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    32
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY                       33
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          34
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              35
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            36
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT                      37
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                38
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED              39
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     40
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               41
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU                42
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR                     43
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       44
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     45
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
-    {"CML_FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
-    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DLB_ECMP_PKT_SAMPLED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\
-    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DLB_LAG_PKT_SAMPLED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\
-    {"DST_FP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
-    {"EM_FT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
-    {"IFP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
-    {"IFP_METER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
-    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
-    {"IVXLT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
-    {"L2_DST_LOOKUP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
-    {"L2_DST_LOOKUP_MISS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
-    {"L2_SRC_STATIC_MOVE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
-    {"L3_DST_LOOKUP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
-    {"L3_DST_LOOKUP_MISS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
-    {"L3_HDR_ERROR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
-    {"L3_IIF_EQ_L3_OIF", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
-    {"L3_TTL_ERROR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
-    {"LEARN_CACHE_FULL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
-    {"MACSA_MULTICAST", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\
-    {"MATCHED_RULE_BIT_0", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
-    {"MATCHED_RULE_BIT_1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
-    {"MATCHED_RULE_BIT_2", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
-    {"MATCHED_RULE_BIT_3", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
-    {"MATCHED_RULE_BIT_4", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
-    {"MATCHED_RULE_BIT_5", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
-    {"MATCHED_RULE_BIT_6", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
-    {"MATCHED_RULE_BIT_7", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
-    {"MEMBERSHIP_CHECK_FAILED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
-    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
-    {"MIRROR_SAMPLER_SAMPLED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
-    {"MPLS_CTRL_PKT_TO_CPU", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
-    {"MTOP_IPV4_GATEWAY", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY},\
-    {"NO_COPY_TO_CPU", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
-    {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
-    {"PROTOCOL_PKT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
-    {"RESERVED_TRACE_BIT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\
-    {"SER_DROP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
-    {"SPANNING_TREE_CHECK_FAILED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
-    {"SVP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
-    {"TRACE_DOP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
-    {"TRACE_DO_NOT_COPY_TO_CPU", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\
-    {"TRACE_DO_NOT_MIRROR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\
-    {"URPF_CHECK_FAILED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
-    {"VFP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
-    {"flex reason count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
-
-#endif /* BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id_defs.h
deleted file mode 100644
index da90d56430f7..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id_defs.h
+++ /dev/null
@@ -1,415 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56780_a0_dna_2_9_5_0_sf_match_id_info.yml
- * for device bcm56780_a0 and variant dna_2_9_5_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-
-/*!
- * \brief Get the Match ID DataBase information.
- *
- * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
-*/
-extern bcmpkt_rxpmd_match_id_db_info_t *
-    bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db_info_get(void);
-
-/*!
- * \brief Get the Match ID Mapping information.
- *
- * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
-*/
-extern bcmpkt_rxpmd_match_id_map_info_t *
-    bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_map_info_get(void);
-
-/*!
-  \name RXPMD Match IDs
-*/
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE  1
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0  2
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  3
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  4
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  5
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  6
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  7
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG  8
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  9
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  10
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  11
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  12
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  13
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  14
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  15
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  16
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  17
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  18
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  19
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  20
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  21
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  22
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  23
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  24
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA  25
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  26
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  27
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  28
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  29
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  30
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  31
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  32
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  33
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  34
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  35
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  36
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  37
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  38
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  39
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  40
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  41
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  42
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  43
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  44
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  45
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  46
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  47
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  48
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  49
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  50
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  51
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE  52
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0  53
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  54
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  55
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  56
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  57
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  58
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG  59
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  60
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  61
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  62
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  63
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  64
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  65
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  66
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  67
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  68
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  69
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  70
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  71
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  72
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  73
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  74
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  75
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA  76
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  77
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  78
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  79
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  80
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  81
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  82
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  83
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  84
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  85
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  86
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  87
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  88
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  89
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  90
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  91
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  92
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  93
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  94
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  95
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  96
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  97
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  98
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  99
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  100
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  101
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  102
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  103
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  104
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  105
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  106
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  107
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  108
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  109
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  110
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  111
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  112
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  113
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  114
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  115
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  116
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  117
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  118
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  119
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  120
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  121
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  122
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  123
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  124
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  125
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  126
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  127
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE  128
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0  129
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  130
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  131
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  132
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  133
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  134
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG  135
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  136
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  137
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  138
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  139
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  140
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  141
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  142
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  143
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  144
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  145
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  146
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  147
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  148
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  149
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  150
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  151
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA  152
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  153
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  154
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  155
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  156
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  157
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  158
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  159
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  160
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  161
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  162
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  163
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  164
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  165
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  166
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  167
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  168
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  169
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  170
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  171
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  172
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  173
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  174
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  175
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  176
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  177
-#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_COUNT  178
-
-#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \
-    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
-    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
-    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
-    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
-    {"rxpmd_match_id_count", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_COUNT}
-
-#endif /*! BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr.h
new file mode 100644
index 000000000000..8dd7a520e072
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr.h
@@ -0,0 +1,180 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_H
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T                      0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T                   1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T                      2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T                    3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T         4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T         5
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T              6
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T            7
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T        8
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T         9
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T                      10
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T                     11
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T                12
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T                     13
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T         14
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T                      15
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T               16
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T                  17
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T                 18
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T                  19
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T                      20
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T                 21
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T          22
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T               23
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T                     24
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T          25
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T          26
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T            27
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T            28
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T            29
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T               30
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T              31
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T             32
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T                     33
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T                    34
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T                     35
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T                     36
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T                       37
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T         38
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T         39
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T                 40
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T                  41
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T                  42
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T                     43
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T                   44
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T                      45
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T             46
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T                  47
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T                  48
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   49
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   50
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T                     51
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T                  52
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T                    53
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T             54
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T             55
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T             56
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T                 57
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T                    58
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T         59
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T         60
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T                      61
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T               62
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T               63
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T               64
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T                     65
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T                    66
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T                    67
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T                     68
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_T               69
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT    70
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T},\
+    {"authen_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T},\
+    {"bfd_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T},\
+    {"cntag_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T},\
+    {"cpu_composites_0_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"dest_option_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T},\
+    {"ep_nih_header_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T},\
+    {"erspan3_fixed_hdr_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"esp_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T},\
+    {"etag_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T},\
+    {"ethertype_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T},\
+    {"frag_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T},\
+    {"generic_loopback_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"gpe_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T},\
+    {"gre_chksum_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T},\
+    {"gre_key_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T},\
+    {"gre_rout_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T},\
+    {"gre_seq_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T},\
+    {"gre_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T},\
+    {"hg3_base_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T},\
+    {"hg3_extension_0_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T},\
+    {"hop_by_hop_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T},\
+    {"icmp_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T},\
+    {"ifa_flex_md_0_a_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T},\
+    {"ifa_flex_md_0_b_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T},\
+    {"ifa_flex_md_1_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T},\
+    {"ifa_flex_md_2_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T},\
+    {"ifa_flex_md_3_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T},\
+    {"ifa_header_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T},\
+    {"ifa_md_base_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T},\
+    {"ifa_metadata_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T},\
+    {"igmp_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T},\
+    {"ipfix_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"mpls_ach_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T},\
+    {"mpls_bv_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T},\
+    {"mpls_cw_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T},\
+    {"mpls_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T},\
+    {"p_1588_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T},\
+    {"pim_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T},\
+    {"prog_ext_hdr_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T},\
+    {"psamp_0_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T},\
+    {"psamp_1_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_3_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
+    {"rarp_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T},\
+    {"routing_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T},\
+    {"rspan_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T},\
+    {"sflow_shim_0_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T},\
+    {"sflow_shim_1_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T},\
+    {"sflow_shim_2_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T},\
+    {"snap_llc_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T},\
+    {"svtag_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T},\
+    {"tcp_first_4bytes_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T},\
+    {"vntag_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T},\
+    {"vxlan_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T},\
+    {"wesp_t", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T},\
+    {"RXPMD_FLEX_T", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr_data.h
new file mode 100644
index 000000000000..905781ac6601
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr_data.h
@@ -0,0 +1,1343 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_OPERATION     2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name AUTHEN_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_DATA        0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_RESERVED    3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_SPI         5
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_FID_COUNT          6
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_DATA},\
+    {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
+    {"PAYLOAD_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
+    {"RESERVED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_RESERVED},\
+    {"SEQ_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
+    {"SPI", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_SPI},\
+    {"authen_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_FID_COUNT}
+
+/*!
+ * \name BFD_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_AP            0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_BFD_LENGTH    1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_CPI           2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DEM           3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DESMINTXINTV  4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DETECTMULT    5
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DIAG          6
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FIN           7
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_MINECHORXINTV 8
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_MPT           9
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_MYDISCRIM     10
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_POLL          11
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_REQMINRXINTV  12
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_STA           13
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_URDISCRIM     14
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_VERSION       15
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FID_COUNT          16
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
+    {"AP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_AP},\
+    {"BFD_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_BFD_LENGTH},\
+    {"CPI", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_CPI},\
+    {"DEM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DEM},\
+    {"DESMINTXINTV", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DESMINTXINTV},\
+    {"DETECTMULT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DETECTMULT},\
+    {"DIAG", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_DIAG},\
+    {"FIN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FIN},\
+    {"MINECHORXINTV", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_MINECHORXINTV},\
+    {"MPT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_MPT},\
+    {"MYDISCRIM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_MYDISCRIM},\
+    {"POLL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_POLL},\
+    {"REQMINRXINTV", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_REQMINRXINTV},\
+    {"STA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_STA},\
+    {"URDISCRIM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_URDISCRIM},\
+    {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_VERSION},\
+    {"bfd_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FID_COUNT}
+
+/*!
+ * \name CNTAG_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_RPID 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_TPID 1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
+    {"RPID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_RPID},\
+    {"TPID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_TPID},\
+    {"cntag_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name DEST_OPTION_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_OPTION      2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
+    {"OPTION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_OPTION},\
+    {"dest_option_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
+
+/*!
+ * \name EP_NIH_HEADER_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_START                10
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"HEADER_SUBTYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
+    {"HEADER_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
+    {"OPAQUE_CTRL_A", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
+    {"OPAQUE_CTRL_B", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
+    {"OPAQUE_CTRL_C", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
+    {"OPAQUE_OBJECT_A", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
+    {"OPAQUE_OBJECT_B", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
+    {"OPAQUE_OBJECT_C", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
+    {"RECIRC_PROFILE_INDEX", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
+    {"RESERVED_0", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
+    {"START", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_START},\
+    {"TIMESTAMP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
+    {"ep_nih_header_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ESP_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_NEXT_HEADER 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_PAD         1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_PAD_LEN     2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_SEQ_NUM     3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_SPI         4
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_FID_COUNT          5
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
+    {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_NEXT_HEADER},\
+    {"PAD", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_PAD},\
+    {"PAD_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_PAD_LEN},\
+    {"SEQ_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_SEQ_NUM},\
+    {"SPI", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_SPI},\
+    {"esp_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_FID_COUNT}
+
+/*!
+ * \name ETAG_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_TAG  0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_TPID 1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_TAG},\
+    {"TPID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_TPID},\
+    {"etag_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name FRAG_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FRAG_INFO   0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_ID          1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_NEXT_HEADER 2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_RESERVED    3
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FID_COUNT          4
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
+    {"FRAG_INFO", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FRAG_INFO},\
+    {"ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_ID},\
+    {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_NEXT_HEADER},\
+    {"RESERVED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_RESERVED},\
+    {"frag_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"RESERVED_2", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
+    {"SOURCE_SYSTEM_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
+
+/*!
+ * \name GPE_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FLAGS         0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_RESERVED0     2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_RESERVED1     3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_VNI           4
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FID_COUNT          5
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_RESERVED0},\
+    {"RESERVED1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_RESERVED1},\
+    {"VNI", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_VNI},\
+    {"gpe_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FID_COUNT}
+
+/*!
+ * \name GRE_CHKSUM_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
+    {"OFFSET", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
+    {"gre_chksum_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
+
+/*!
+ * \name GRE_KEY_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_KEY 0
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_FID_COUNT          1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
+    {"KEY", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_KEY},\
+    {"gre_key_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_FID_COUNT}
+
+/*!
+ * \name GRE_ROUT_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_ROUTING 0
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
+    {"ROUTING", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_ROUTING},\
+    {"gre_rout_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
+
+/*!
+ * \name GRE_SEQ_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
+    {"gre_seq_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
+
+/*!
+ * \name GRE_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_C_R_K_S  0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_PROTOCOL 1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_RESERVED 2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_VERSION  3
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_FID_COUNT          4
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
+    {"C_R_K_S", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_C_R_K_S},\
+    {"PROTOCOL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_PROTOCOL},\
+    {"RESERVED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_RESERVED},\
+    {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_VERSION},\
+    {"gre_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_FID_COUNT}
+
+/*!
+ * \name HG3_BASE_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_CN                      0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_CNG                     1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_ENTROPY                 2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT         3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_HG3_RESERVED            4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_L3_ROUTED               5
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_MIRROR_COPY             6
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE          7
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION      8
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE           10
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_TC                      11
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_VERSION                 12
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_FID_COUNT          13
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_CN},\
+    {"CNG", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_CNG},\
+    {"ENTROPY", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_ENTROPY},\
+    {"EXT_HDR_PRESENT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\
+    {"HG3_RESERVED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\
+    {"L3_ROUTED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\
+    {"MIRROR_COPY", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\
+    {"RESERVED_ETYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\
+    {"SYSTEM_DESTINATION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\
+    {"SYSTEM_DESTINATION_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\
+    {"SYSTEM_SOURCE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\
+    {"TC", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_TC},\
+    {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_VERSION},\
+    {"hg3_base_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_FID_COUNT}
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP          3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP        4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP        5
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+/*!
+ * \name HG3_EXTENSION_0_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB      0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB      1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF     2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS             3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_SVP               5
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT          6
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \
+    {"CLASS_ID_LSB", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\
+    {"CLASS_ID_MSB", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\
+    {"DVP_OR_L3_IIF", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\
+    {"FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\
+    {"FORWARDING_DOMAIN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\
+    {"SVP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\
+    {"hg3_extension_0_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT}
+
+/*!
+ * \name HOP_BY_HOP_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
+    {"OPTION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
+    {"hop_by_hop_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_CODE      1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_A_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL   0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \
+    {"FWD_HDR_TTL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\
+    {"LNS_DEVICE_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\
+    {"ifa_flex_md_0_a_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_B_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN               0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED       1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID         2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT          4
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\
+    {"PORT_SPEED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\
+    {"QUEUE_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\
+    {"RX_TIMESTAMP_SEC", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\
+    {"ifa_flex_md_0_b_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_1_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID       0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID      1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT          3
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PORT_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\
+    {"INGRESS_PORT_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\
+    {"RX_TIMESTAMP_NANOSEC", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\
+    {"ifa_flex_md_1_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_2_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT    1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \
+    {"RESIDENCE_TIME_NANOSEC", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\
+    {"TX_QUEUE_BYTE_COUNT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\
+    {"ifa_flex_md_2_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_3_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \
+    {"MMU_STAT_0", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\
+    {"MMU_STAT_1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\
+    {"ifa_flex_md_3_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT}
+
+/*!
+ * \name IFA_HEADER_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FLAGS      0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_GNS        1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_VER        4
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT          5
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FLAGS},\
+    {"GNS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_GNS},\
+    {"MAX_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
+    {"NEXT_HDR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
+    {"VER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_VER},\
+    {"ifa_header_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT}
+
+/*!
+ * \name IFA_MD_BASE_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR            0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR           2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT          3
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"REQUEST_VECTOR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\
+    {"ifa_md_base_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR            0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_METADATA                 2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR           3
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT          4
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"METADATA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_METADATA},\
+    {"REQUEST_VECTOR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\
+    {"ifa_metadata_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT}
+
+/*!
+ * \name IGMP_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_CHECKSUM      0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_IGMP_TYPE     2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_FID_COUNT          4
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_CHECKSUM},\
+    {"GROUP_ADDRESS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
+    {"IGMP_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_IGMP_TYPE},\
+    {"MAX_RESP_TIME", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
+    {"igmp_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_DA                0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_ID                3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_OPTION            4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_SA                6
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_TOS               7
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_TTL               9
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_DA             0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_SA             5
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_MACDA 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_MACSA 1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name MPLS_ACH_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_RESERVED     2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_VERSION      3
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
+    {"CHANNEL_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
+    {"CW_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
+    {"RESERVED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_RESERVED},\
+    {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_VERSION},\
+    {"mpls_ach_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
+
+/*!
+ * \name MPLS_BV_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_VALUE 0
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
+    {"VALUE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_VALUE},\
+    {"mpls_bv_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_FID_COUNT}
+
+/*!
+ * \name MPLS_CW_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_RESERVED   1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
+    {"CW_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
+    {"RESERVED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_RESERVED},\
+    {"SEQ_NUMBER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
+    {"mpls_cw_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_FID_COUNT}
+
+/*!
+ * \name MPLS_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_BOS   0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_EXP   1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_LABEL 2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_TTL   3
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_FID_COUNT          4
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
+    {"BOS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_BOS},\
+    {"EXP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_EXP},\
+    {"LABEL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_LABEL},\
+    {"TTL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_TTL},\
+    {"mpls_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_FID_COUNT}
+
+/*!
+ * \name P_1588_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_CNTRL          0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_CORRECTION     1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_DOMAIN_NB      2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FLAGS          3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_MSG_LENGTH     5
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_MSG_TYPE       6
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_RESERVED1      7
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_RESERVED2      8
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_RESERVED3      9
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_SEQ_ID         10
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_SRCPORTID      11
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_VERSION        13
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FID_COUNT          14
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
+    {"CNTRL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_CNTRL},\
+    {"CORRECTION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_CORRECTION},\
+    {"DOMAIN_NB", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_DOMAIN_NB},\
+    {"FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FLAGS},\
+    {"LOGMSGINTERVAL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
+    {"MSG_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_MSG_LENGTH},\
+    {"MSG_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_MSG_TYPE},\
+    {"RESERVED1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_RESERVED1},\
+    {"RESERVED2", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_RESERVED2},\
+    {"RESERVED3", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_RESERVED3},\
+    {"SEQ_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_SEQ_ID},\
+    {"SRCPORTID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_SRCPORTID},\
+    {"TRANSPORTSPEC", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
+    {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_VERSION},\
+    {"p_1588_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FID_COUNT}
+
+/*!
+ * \name PIM_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_0_1 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_2_3 1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_4_5 2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_6_7 3
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_FID_COUNT          4
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT \
+    {"HDR_BYTES_0_1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_0_1},\
+    {"HDR_BYTES_2_3", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_2_3},\
+    {"HDR_BYTES_4_5", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_4_5},\
+    {"HDR_BYTES_6_7", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_HDR_BYTES_6_7},\
+    {"pim_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_FID_COUNT}
+
+/*!
+ * \name PROG_EXT_HDR_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
+    {"OPTION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
+    {"prog_ext_hdr_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_0_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FLOWSET        0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_LENGTH         1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
+    {"FLOWSET", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FLOWSET},\
+    {"LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_LENGTH},\
+    {"NEXT_HOP_INDEX", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
+    {"OBS_TIME_NS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
+    {"TEMPLATE_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
+    {"psamp_0_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_1_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_DLB_ID         0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_EPOCH          2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
+    {"DLB_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_DLB_ID},\
+    {"EGRESS_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
+    {"EPOCH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_EPOCH},\
+    {"INGRESS_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
+    {"SAMPLED_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
+    {"VARIABLE_FLAG", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
+    {"psamp_1_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE              3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
+    {"DROP_REASON", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
+    {"RESERVED_0", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
+    {"SMOD_STATE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\
+    {"UC_COS__COLOR__PROB_IDX", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
+    {"USER_META_DATA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_3_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_OPERATION     2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name ROUTING_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_DATA          0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_FID_COUNT          5
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_DATA},\
+    {"HDR_EXT_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
+    {"routing_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name RSPAN_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_TAG  0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_TPID 1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_TAG},\
+    {"TPID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_TPID},\
+    {"rspan_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_0_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
+    {"SYS_DESTINATION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
+    {"SYS_SOURCE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
+    {"VERSION", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
+    {"sflow_shim_0_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_1_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
+    {"FLAG_DEST_SAMPLE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
+    {"FLAG_DISCARDED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
+    {"FLAG_FLEX_SAMPLE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
+    {"FLAG_MCAST", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
+    {"FLAG_SRC_SAMPLE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
+    {"FLAG_TRUNCATED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
+    {"RESERVED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
+    {"SYS_OPCODE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
+    {"sflow_shim_1_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_2_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
+    {"USER_META_DATA", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
+    {"sflow_shim_2_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
+
+/*!
+ * \name SNAP_LLC_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_LENGTH   0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
+    {"LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_LENGTH},\
+    {"SNAP_LLC", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
+    {"snap_llc_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
+
+/*!
+ * \name SVTAG_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_DATA_LWR 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_DATA_UPR 1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \
+    {"DATA_LWR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_DATA_LWR},\
+    {"DATA_UPR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_DATA_UPR},\
+    {"svtag_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"unknown_l5_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_CFI  0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_PCP  1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_TPID 2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_VID  3
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VNTAG_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_TAG  0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_TPID 1
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_TAG},\
+    {"TPID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_TPID},\
+    {"vntag_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT}
+
+/*!
+ * \name WESP_T field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FLAGS       0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_HEADER_LEN  1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_NEXT_HEADER 2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_SEQ_NUM     3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_SPI         4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_TRAILER_LEN 5
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_WESP_IV     6
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FID_COUNT          7
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FLAGS},\
+    {"HEADER_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_HEADER_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_NEXT_HEADER},\
+    {"SEQ_NUM", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_SEQ_NUM},\
+    {"SPI", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_SPI},\
+    {"TRAILER_LEN", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_TRAILER_LEN},\
+    {"WESP_IV", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_WESP_IV},\
+    {"wesp_t fid count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FID_COUNT}
+
+
+#endif /* BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 000000000000..62a3cf94f74f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,180 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                                 0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                            1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                                  2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                                         3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0                                     4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 5
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0                   6
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                                    7
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                                    8
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                                 9
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                                10
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                                   11
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                                  12
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                                  13
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                                         14
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                                   15
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0              16
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                                 17
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                                        18
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                                       19
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                                       20
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0            21
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                               22
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                               23
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                               24
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                               25
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                               26
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                             27
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0                                28
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0                         29
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                                         30
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                                       31
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                                       32
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                                  33
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                              34
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                                   35
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                                         36
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                                        37
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                                        38
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                           39
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                                  40
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0              41
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       42
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    46
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               0
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED                    2
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  3
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED                     4
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  5
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   6
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     7
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               8
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      9
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   10
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           11
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      12
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      13
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           14
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      15
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            16
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        17
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            18
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        19
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    20
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      21
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      22
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      23
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      24
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      25
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      26
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      27
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      28
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD            29
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              30
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  31
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    32
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY                       33
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          34
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              35
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            36
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT                      37
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                38
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         39
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     40
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               41
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU                42
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR                     43
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       44
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     45
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CML_FLAGS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_ECMP_PKT_SAMPLED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\
+    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_LAG_PKT_SAMPLED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\
+    {"DST_FP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
+    {"EM_FT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"IFP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
+    {"IVXLT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_STATIC_MOVE", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_IIF_EQ_L3_OIF", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
+    {"L3_TTL_ERROR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST_RSVD", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
+    {"MATCHED_RULE_BIT_0", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
+    {"MATCHED_RULE_BIT_1", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
+    {"MATCHED_RULE_BIT_2", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
+    {"MATCHED_RULE_BIT_3", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
+    {"MATCHED_RULE_BIT_4", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
+    {"MATCHED_RULE_BIT_5", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
+    {"MATCHED_RULE_BIT_6", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
+    {"MATCHED_RULE_BIT_7", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
+    {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\
+    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
+    {"MIRROR_SAMPLER_SAMPLED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
+    {"MPLS_CTRL_PKT_TO_CPU", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
+    {"MTOP_IPV4_GATEWAY", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY},\
+    {"NO_COPY_TO_CPU", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"RESERVED_TRACE_BIT", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\
+    {"SER_DROP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
+    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
+    {"SVP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
+    {"TRACE_DOP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"TRACE_DO_NOT_COPY_TO_CPU", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\
+    {"TRACE_DO_NOT_MIRROR", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\
+    {"URPF_CHECK_FAILED", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
+    {"VFP", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 000000000000..9e921fc797e1
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,417 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56780_a0_dna_6_5_30_2_0_sf_match_id_info.yml
+ * for device bcm56780_a0 and variant dna_6_5_30_2_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE  1
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0  2
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  3
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  4
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  5
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  6
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  7
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG  8
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  9
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  10
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  11
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  12
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  13
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  14
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  15
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  16
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  17
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  18
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  19
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  20
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  21
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  22
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  23
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  24
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA  25
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  26
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  27
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  28
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  29
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  30
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  31
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  32
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  33
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  34
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  35
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  36
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  37
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  38
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  39
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  40
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  41
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  42
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  43
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  44
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  45
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  46
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  47
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  48
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  49
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  50
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  51
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE  52
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0  53
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  54
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  55
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  56
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  57
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  58
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG  59
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  60
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  61
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  62
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  63
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  64
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  65
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  66
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  67
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  68
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  69
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  70
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  71
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  72
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  73
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  74
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  75
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA  76
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  77
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  78
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  79
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  80
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  81
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  82
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  83
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  84
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  85
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  86
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  87
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  88
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  89
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  90
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  91
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  92
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  93
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  94
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  95
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  96
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  97
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  98
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  99
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  100
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  101
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  102
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  103
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  104
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  105
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  106
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  107
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  108
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  109
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  110
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  111
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  112
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  113
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  114
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA  115
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  116
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  117
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  118
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  119
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  120
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  121
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  122
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  123
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  124
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  125
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  126
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  127
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  128
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE  129
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0  130
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  131
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  132
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  133
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  134
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  135
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG  136
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  137
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  138
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  139
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  140
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  141
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  142
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  143
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  144
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  145
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  146
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  147
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  148
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  149
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  150
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  151
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  152
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA  153
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  154
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  155
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  156
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  157
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  158
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  159
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  160
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  161
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  162
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  163
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  164
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  165
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  166
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  167
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  168
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  169
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  170
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  171
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  172
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  173
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  174
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  175
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  176
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  177
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  178
+#define BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT  179
+
+#define BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr.h
deleted file mode 100644
index cc9acc025dcb..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr.h
+++ /dev/null
@@ -1,174 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_H
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_H
-
-#include <bcmpkt/bcmpkt_flexhdr_internal.h>
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T                      0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T                   1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T                      2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T                    3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T         4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T         5
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T              6
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T            7
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T        8
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T         9
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T                      10
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T                     11
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T                12
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T                     13
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T         14
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T                      15
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T               16
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T                  17
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T                 18
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T                  19
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T                      20
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T               21
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T                     22
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T          23
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T          24
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T            25
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T            26
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T            27
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T               28
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T              29
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T             30
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T                     31
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T                    32
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T                     33
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T                     34
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T                       35
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T         36
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T         37
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T                 38
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T                  39
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T                  40
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T                     41
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T                   42
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T             43
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T                  44
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T                  45
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   46
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   47
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T                     48
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T                  49
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T                    50
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T             51
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T             52
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T             53
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T                 54
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T                    55
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T         56
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T         57
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T                      58
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T               59
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T               60
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T               61
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T                     62
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T                    63
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T                    64
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T                     65
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_T               66
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_COUNT    67
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_NAME_MAP_INIT \
-    {"arp_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T},\
-    {"authen_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T},\
-    {"bfd_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T},\
-    {"cntag_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T},\
-    {"cpu_composites_0_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T},\
-    {"cpu_composites_1_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T},\
-    {"dest_option_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T},\
-    {"ep_nih_header_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T},\
-    {"erspan3_fixed_hdr_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T},\
-    {"erspan3_subhdr_5_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T},\
-    {"esp_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T},\
-    {"etag_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T},\
-    {"ethertype_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T},\
-    {"frag_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T},\
-    {"generic_loopback_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T},\
-    {"gpe_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T},\
-    {"gre_chksum_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T},\
-    {"gre_key_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T},\
-    {"gre_rout_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T},\
-    {"gre_seq_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T},\
-    {"gre_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T},\
-    {"hop_by_hop_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T},\
-    {"icmp_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T},\
-    {"ifa_flex_md_0_a_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T},\
-    {"ifa_flex_md_0_b_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T},\
-    {"ifa_flex_md_1_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T},\
-    {"ifa_flex_md_2_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T},\
-    {"ifa_flex_md_3_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T},\
-    {"ifa_header_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T},\
-    {"ifa_md_base_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T},\
-    {"ifa_metadata_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T},\
-    {"igmp_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T},\
-    {"ipfix_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T},\
-    {"ipv4_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T},\
-    {"ipv6_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T},\
-    {"l2_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T},\
-    {"mirror_erspan_sn_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T},\
-    {"mirror_transport_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T},\
-    {"mpls_ach_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T},\
-    {"mpls_bv_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T},\
-    {"mpls_cw_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T},\
-    {"mpls_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T},\
-    {"p_1588_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T},\
-    {"prog_ext_hdr_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T},\
-    {"psamp_0_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T},\
-    {"psamp_1_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T},\
-    {"psamp_mirror_on_drop_0_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
-    {"psamp_mirror_on_drop_3_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
-    {"rarp_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T},\
-    {"routing_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T},\
-    {"rspan_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T},\
-    {"sflow_shim_0_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T},\
-    {"sflow_shim_1_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T},\
-    {"sflow_shim_2_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T},\
-    {"snap_llc_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T},\
-    {"svtag_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T},\
-    {"tcp_first_4bytes_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T},\
-    {"tcp_last_16bytes_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T},\
-    {"udp_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T},\
-    {"unknown_l3_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T},\
-    {"unknown_l4_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T},\
-    {"unknown_l5_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T},\
-    {"vlan_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T},\
-    {"vntag_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T},\
-    {"vxlan_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T},\
-    {"wesp_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T},\
-    {"RXPMD_FLEX_T", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_T},\
-    {"flexhdr count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_COUNT}
-
-#endif /* BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr_data.h
deleted file mode 100644
index 2d60738e3841..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr_data.h
+++ /dev/null
@@ -1,1258 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_DATA_H
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_DATA_H
-
-/*!
- * \name ARP_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_HARDWARE_LEN  0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_HARDWARE_TYPE 1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_OPERATION     2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_PROT_ADDR_LEN 3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_PROTOCOL_TYPE 4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_SENDER_HA     5
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_SENDER_IP     6
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_TARGET_HA     7
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_TARGET_IP     8
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_FID_COUNT          9
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_TARGET_IP},\
-    {"arp_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_FID_COUNT}
-
-/*!
- * \name AUTHEN_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_DATA        0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_NEXT_HEADER 1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_RESERVED    3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_SEQ_NUM     4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_SPI         5
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_FID_COUNT          6
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_DATA},\
-    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_NEXT_HEADER},\
-    {"PAYLOAD_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
-    {"RESERVED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_RESERVED},\
-    {"SEQ_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_SEQ_NUM},\
-    {"SPI", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_SPI},\
-    {"authen_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_FID_COUNT}
-
-/*!
- * \name BFD_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_AP            0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_BFD_LENGTH    1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_CPI           2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DEM           3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DESMINTXINTV  4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DETECTMULT    5
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DIAG          6
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FIN           7
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_MINECHORXINTV 8
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_MPT           9
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_MYDISCRIM     10
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_POLL          11
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_REQMINRXINTV  12
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_STA           13
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_URDISCRIM     14
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_VERSION       15
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FID_COUNT          16
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
-    {"AP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_AP},\
-    {"BFD_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_BFD_LENGTH},\
-    {"CPI", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_CPI},\
-    {"DEM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DEM},\
-    {"DESMINTXINTV", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DESMINTXINTV},\
-    {"DETECTMULT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DETECTMULT},\
-    {"DIAG", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DIAG},\
-    {"FIN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FIN},\
-    {"MINECHORXINTV", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_MINECHORXINTV},\
-    {"MPT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_MPT},\
-    {"MYDISCRIM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_MYDISCRIM},\
-    {"POLL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_POLL},\
-    {"REQMINRXINTV", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_REQMINRXINTV},\
-    {"STA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_STA},\
-    {"URDISCRIM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_URDISCRIM},\
-    {"VERSION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_VERSION},\
-    {"bfd_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FID_COUNT}
-
-/*!
- * \name CNTAG_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_RPID 0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_TPID 1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
-    {"RPID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_RPID},\
-    {"TPID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_TPID},\
-    {"cntag_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_0_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT0", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
-    {"DMA_CONT1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
-    {"DMA_CONT2", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
-    {"DMA_CONT3", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
-    {"DMA_CONT4", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
-    {"DMA_CONT5", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
-    {"DMA_CONT6", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
-    {"cpu_composites_0_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_1_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT10", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
-    {"DMA_CONT11", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
-    {"DMA_CONT12", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
-    {"DMA_CONT13", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
-    {"DMA_CONT14", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
-    {"DMA_CONT15", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
-    {"DMA_CONT16", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
-    {"DMA_CONT17", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
-    {"DMA_CONT7", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
-    {"DMA_CONT8", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
-    {"DMA_CONT9", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
-    {"cpu_composites_1_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
-
-/*!
- * \name DEST_OPTION_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_OPTION      2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_FID_COUNT          3
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
-    {"OPTION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_OPTION},\
-    {"dest_option_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_FID_COUNT}
-
-/*!
- * \name EP_NIH_HEADER_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_START                10
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"HEADER_SUBTYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
-    {"HEADER_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
-    {"OPAQUE_CTRL_A", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
-    {"OPAQUE_CTRL_B", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
-    {"OPAQUE_CTRL_C", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
-    {"OPAQUE_OBJECT_A", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
-    {"OPAQUE_OBJECT_B", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
-    {"OPAQUE_OBJECT_C", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
-    {"RECIRC_PROFILE_INDEX", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
-    {"RESERVED_0", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
-    {"START", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_START},\
-    {"TIMESTAMP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
-    {"ep_nih_header_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_FIXED_HDR_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
-    {"BSO", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
-    {"COS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
-    {"GBP_SID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
-    {"P_FT_HWID_D_GRA_O", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
-    {"SESSION_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
-    {"T", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
-    {"TIMESTAMP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
-    {"VER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
-    {"VLAN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
-    {"erspan3_fixed_hdr_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_SUBHDR_5_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
-    {"PLATFORM_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
-    {"PORT_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
-    {"SWITCH_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
-    {"TIMESTAMP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
-    {"erspan3_subhdr_5_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
-
-/*!
- * \name ESP_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_NEXT_HEADER 0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_PAD         1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_PAD_LEN     2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_SEQ_NUM     3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_SPI         4
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_FID_COUNT          5
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
-    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_NEXT_HEADER},\
-    {"PAD", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_PAD},\
-    {"PAD_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_PAD_LEN},\
-    {"SEQ_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_SEQ_NUM},\
-    {"SPI", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_SPI},\
-    {"esp_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_FID_COUNT}
-
-/*!
- * \name ETAG_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_TAG  0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_TPID 1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_TAG},\
-    {"TPID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_TPID},\
-    {"etag_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_FID_COUNT}
-
-/*!
- * \name ETHERTYPE_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_TYPE 0
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_FID_COUNT          1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
-    {"TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_TYPE},\
-    {"ethertype_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_FID_COUNT}
-
-/*!
- * \name FRAG_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FRAG_INFO   0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_ID          1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_NEXT_HEADER 2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_RESERVED    3
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FID_COUNT          4
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
-    {"FRAG_INFO", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FRAG_INFO},\
-    {"ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_ID},\
-    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_NEXT_HEADER},\
-    {"RESERVED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_RESERVED},\
-    {"frag_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FID_COUNT}
-
-/*!
- * \name GENERIC_LOOPBACK_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
-    {"DESTINATION_OBJ", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
-    {"DESTINATION_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
-    {"ENTROPY_OBJ", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
-    {"FLAGS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
-    {"HEADER_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
-    {"INPUT_PRIORITY", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
-    {"INTERFACE_CTRL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
-    {"INTERFACE_OBJ", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
-    {"PROCESSING_CTRL_0", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
-    {"PROCESSING_CTRL_1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
-    {"QOS_OBJ", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
-    {"RESERVED_1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
-    {"RESERVED_2", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
-    {"SOURCE_SYSTEM_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
-    {"START_BYTE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
-    {"generic_loopback_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
-
-/*!
- * \name GPE_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FLAGS         0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_NEXT_PROTOCOL 1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_RESERVED0     2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_RESERVED1     3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_VNI           4
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FID_COUNT          5
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FLAGS},\
-    {"NEXT_PROTOCOL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_NEXT_PROTOCOL},\
-    {"RESERVED0", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_RESERVED0},\
-    {"RESERVED1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_RESERVED1},\
-    {"VNI", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_VNI},\
-    {"gpe_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FID_COUNT}
-
-/*!
- * \name GRE_CHKSUM_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_OFFSET   1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
-    {"OFFSET", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_OFFSET},\
-    {"gre_chksum_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
-
-/*!
- * \name GRE_KEY_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_KEY 0
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_FID_COUNT          1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
-    {"KEY", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_KEY},\
-    {"gre_key_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_FID_COUNT}
-
-/*!
- * \name GRE_ROUT_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_ROUTING 0
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_FID_COUNT          1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
-    {"ROUTING", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_ROUTING},\
-    {"gre_rout_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_FID_COUNT}
-
-/*!
- * \name GRE_SEQ_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_SEQUENCE 0
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_FID_COUNT          1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_SEQUENCE},\
-    {"gre_seq_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_FID_COUNT}
-
-/*!
- * \name GRE_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_C_R_K_S  0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_PROTOCOL 1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_RESERVED 2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_VERSION  3
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_FID_COUNT          4
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
-    {"C_R_K_S", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_C_R_K_S},\
-    {"PROTOCOL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_PROTOCOL},\
-    {"RESERVED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_RESERVED},\
-    {"VERSION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_VERSION},\
-    {"gre_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_FID_COUNT}
-
-/*!
- * \name HOP_BY_HOP_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_OPTION      2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
-    {"OPTION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_OPTION},\
-    {"hop_by_hop_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
-
-/*!
- * \name ICMP_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_CHECKSUM  0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_CODE      1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_ICMP_TYPE 2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_FID_COUNT          3
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_CHECKSUM},\
-    {"CODE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_CODE},\
-    {"ICMP_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_ICMP_TYPE},\
-    {"icmp_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_0_A_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL   0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \
-    {"FWD_HDR_TTL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\
-    {"LNS_DEVICE_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\
-    {"ifa_flex_md_0_a_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_0_B_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_CN               0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED       1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID         2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT          4
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \
-    {"CN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\
-    {"PORT_SPEED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\
-    {"QUEUE_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\
-    {"RX_TIMESTAMP_SEC", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\
-    {"ifa_flex_md_0_b_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_1_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID       0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID      1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT          3
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PORT_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\
-    {"INGRESS_PORT_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\
-    {"RX_TIMESTAMP_NANOSEC", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\
-    {"ifa_flex_md_1_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_2_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT    1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \
-    {"RESIDENCE_TIME_NANOSEC", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\
-    {"TX_QUEUE_BYTE_COUNT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\
-    {"ifa_flex_md_2_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_3_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \
-    {"MMU_STAT_0", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\
-    {"MMU_STAT_1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\
-    {"ifa_flex_md_3_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT}
-
-/*!
- * \name IFA_HEADER_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FLAGS      0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_GNS        1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_VER        4
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FID_COUNT          5
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FLAGS},\
-    {"GNS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_GNS},\
-    {"MAX_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
-    {"NEXT_HDR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
-    {"VER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_VER},\
-    {"ifa_header_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FID_COUNT}
-
-/*!
- * \name IFA_MD_BASE_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR            0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR           2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT          3
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \
-    {"ACTION_VECTOR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\
-    {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
-    {"REQUEST_VECTOR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\
-    {"ifa_md_base_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT}
-
-/*!
- * \name IFA_METADATA_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_ACTION_VECTOR            0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_METADATA                 2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR           3
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_FID_COUNT          4
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \
-    {"ACTION_VECTOR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\
-    {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\
-    {"METADATA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_METADATA},\
-    {"REQUEST_VECTOR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\
-    {"ifa_metadata_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_FID_COUNT}
-
-/*!
- * \name IGMP_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_CHECKSUM      0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_GROUP_ADDRESS 1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_IGMP_TYPE     2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_MAX_RESP_TIME 3
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_FID_COUNT          4
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_CHECKSUM},\
-    {"GROUP_ADDRESS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_GROUP_ADDRESS},\
-    {"IGMP_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_IGMP_TYPE},\
-    {"MAX_RESP_TIME", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_MAX_RESP_TIME},\
-    {"igmp_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_FID_COUNT}
-
-/*!
- * \name IPFIX_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_EXPORT_TIME   0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_LENGTH        1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_VERSION       4
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_FID_COUNT          5
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
-    {"EXPORT_TIME", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_EXPORT_TIME},\
-    {"LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_LENGTH},\
-    {"OBS_DOMAIN_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
-    {"SEQUENCE_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
-    {"VERSION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_VERSION},\
-    {"ipfix_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_FID_COUNT}
-
-/*!
- * \name IPV4_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_DA                0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_HDR_CHECKSUM      2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_ID                3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_OPTION            4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_PROTOCOL          5
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_SA                6
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_TOS               7
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_TOTAL_LENGTH      8
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_TTL               9
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FID_COUNT          11
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_DA},\
-    {"FLAGS_FRAG_OFFSET", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
-    {"HDR_CHECKSUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_HDR_CHECKSUM},\
-    {"ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_ID},\
-    {"OPTION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_OPTION},\
-    {"PROTOCOL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_PROTOCOL},\
-    {"SA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_SA},\
-    {"TOS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_TOS},\
-    {"TOTAL_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_TOTAL_LENGTH},\
-    {"TTL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_TTL},\
-    {"VERSION_HDR_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
-    {"ipv4_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FID_COUNT}
-
-/*!
- * \name IPV6_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_DA             0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FLOW_LABEL     1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_HOP_LIMIT      2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_NEXT_HEADER    3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_SA             5
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_VERSION        7
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FID_COUNT          8
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_DA},\
-    {"FLOW_LABEL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FLOW_LABEL},\
-    {"HOP_LIMIT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_HOP_LIMIT},\
-    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_NEXT_HEADER},\
-    {"PAYLOAD_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
-    {"SA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_SA},\
-    {"TRAFFIC_CLASS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
-    {"VERSION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_VERSION},\
-    {"ipv6_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FID_COUNT}
-
-/*!
- * \name L2_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_MACDA 0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_MACSA 1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
-    {"MACDA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_MACDA},\
-    {"MACSA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_MACSA},\
-    {"l2_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_FID_COUNT}
-
-/*!
- * \name MIRROR_ERSPAN_SN_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
-    {"SEQ_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
-    {"mirror_erspan_sn_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
-
-/*!
- * \name MIRROR_TRANSPORT_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
-    {"mirror_transport_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
-
-/*!
- * \name MPLS_ACH_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_CW_TYPE      1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_RESERVED     2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_VERSION      3
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_FID_COUNT          4
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
-    {"CHANNEL_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
-    {"CW_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_CW_TYPE},\
-    {"RESERVED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_RESERVED},\
-    {"VERSION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_VERSION},\
-    {"mpls_ach_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_FID_COUNT}
-
-/*!
- * \name MPLS_BV_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_VALUE 0
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_FID_COUNT          1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
-    {"VALUE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_VALUE},\
-    {"mpls_bv_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_FID_COUNT}
-
-/*!
- * \name MPLS_CW_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_CW_TYPE    0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_RESERVED   1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_FID_COUNT          3
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
-    {"CW_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_CW_TYPE},\
-    {"RESERVED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_RESERVED},\
-    {"SEQ_NUMBER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
-    {"mpls_cw_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_FID_COUNT}
-
-/*!
- * \name MPLS_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_BOS   0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_EXP   1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_LABEL 2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_TTL   3
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_FID_COUNT          4
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
-    {"BOS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_BOS},\
-    {"EXP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_EXP},\
-    {"LABEL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_LABEL},\
-    {"TTL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_TTL},\
-    {"mpls_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_FID_COUNT}
-
-/*!
- * \name P_1588_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_CNTRL          0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_CORRECTION     1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_DOMAIN_NB      2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FLAGS          3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_MSG_LENGTH     5
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_MSG_TYPE       6
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_RESERVED1      7
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_RESERVED2      8
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_RESERVED3      9
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_SEQ_ID         10
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_SRCPORTID      11
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_TRANSPORTSPEC  12
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_VERSION        13
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FID_COUNT          14
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
-    {"CNTRL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_CNTRL},\
-    {"CORRECTION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_CORRECTION},\
-    {"DOMAIN_NB", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_DOMAIN_NB},\
-    {"FLAGS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FLAGS},\
-    {"LOGMSGINTERVAL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
-    {"MSG_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_MSG_LENGTH},\
-    {"MSG_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_MSG_TYPE},\
-    {"RESERVED1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_RESERVED1},\
-    {"RESERVED2", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_RESERVED2},\
-    {"RESERVED3", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_RESERVED3},\
-    {"SEQ_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_SEQ_ID},\
-    {"SRCPORTID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_SRCPORTID},\
-    {"TRANSPORTSPEC", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_TRANSPORTSPEC},\
-    {"VERSION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_VERSION},\
-    {"p_1588_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FID_COUNT}
-
-/*!
- * \name PROG_EXT_HDR_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_OPTION      2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
-    {"OPTION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_OPTION},\
-    {"prog_ext_hdr_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
-
-/*!
- * \name PSAMP_0_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FLOWSET        0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_LENGTH         1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FID_COUNT          6
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
-    {"FLOWSET", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FLOWSET},\
-    {"LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_LENGTH},\
-    {"NEXT_HOP_INDEX", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
-    {"OBS_TIME_NS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
-    {"TEMPLATE_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
-    {"psamp_0_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_1_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_DLB_ID         0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_EPOCH          2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_USER_META_DATA 5
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_FID_COUNT          7
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
-    {"DLB_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_DLB_ID},\
-    {"EGRESS_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
-    {"EPOCH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_EPOCH},\
-    {"INGRESS_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
-    {"SAMPLED_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_USER_META_DATA},\
-    {"VARIABLE_FLAG", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
-    {"psamp_1_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_MOD_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
-    {"INGRESS_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
-    {"LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
-    {"OBS_TIME_NS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
-    {"SWITCH_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
-    {"TEMPLATE_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
-    {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE              3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
-    {"DROP_REASON", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
-    {"RESERVED_0", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
-    {"SAMPLED_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
-    {"SMOD_STATE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\
-    {"UC_COS__COLOR__PROB_IDX", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
-    {"USER_META_DATA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_3_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
-
-/*!
- * \name RARP_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_HARDWARE_LEN  0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_HARDWARE_TYPE 1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_OPERATION     2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_PROT_ADDR_LEN 3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_PROTOCOL_TYPE 4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_SENDER_HA     5
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_SENDER_IP     6
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_TARGET_HA     7
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_TARGET_IP     8
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_FID_COUNT          9
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_TARGET_IP},\
-    {"rarp_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_FID_COUNT}
-
-/*!
- * \name ROUTING_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_DATA          0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_NEXT_HEADER   2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_ROUTING_TYPE  3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_FID_COUNT          5
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_DATA},\
-    {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_NEXT_HEADER},\
-    {"ROUTING_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_ROUTING_TYPE},\
-    {"SEGMENTS_LEFT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
-    {"routing_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_FID_COUNT}
-
-/*!
- * \name RSPAN_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_TAG  0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_TPID 1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_TAG},\
-    {"TPID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_TPID},\
-    {"rspan_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_0_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
-    {"SYS_DESTINATION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
-    {"SYS_SOURCE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
-    {"VERSION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
-    {"sflow_shim_0_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_1_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
-    {"FLAG_DEST_SAMPLE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
-    {"FLAG_DISCARDED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
-    {"FLAG_FLEX_SAMPLE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
-    {"FLAG_MCAST", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
-    {"FLAG_SRC_SAMPLE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
-    {"FLAG_TRUNCATED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
-    {"RESERVED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
-    {"SYS_OPCODE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
-    {"sflow_shim_1_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_2_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
-    {"USER_META_DATA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
-    {"sflow_shim_2_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
-
-/*!
- * \name SNAP_LLC_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_LENGTH   0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
-    {"LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_LENGTH},\
-    {"SNAP_LLC", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
-    {"snap_llc_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_FID_COUNT}
-
-/*!
- * \name SVTAG_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_DATA_LWR 0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_DATA_UPR 1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \
-    {"DATA_LWR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_DATA_LWR},\
-    {"DATA_UPR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_DATA_UPR},\
-    {"svtag_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_FID_COUNT}
-
-/*!
- * \name TCP_FIRST_4BYTES_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
-    {"DST_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
-    {"SRC_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
-    {"tcp_first_4bytes_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
-
-/*!
- * \name TCP_LAST_16BYTES_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
-    {"ACK_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
-    {"CHECKSUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
-    {"HDR_LEN_AND_FLAGS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
-    {"SEQ_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
-    {"URGENT_PTR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
-    {"WIN_SIZE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
-    {"tcp_last_16bytes_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
-
-/*!
- * \name UDP_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_CHECKSUM   0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_DST_PORT   1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_SRC_PORT   2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_UDP_LENGTH 3
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_FID_COUNT          4
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_CHECKSUM},\
-    {"DST_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_DST_PORT},\
-    {"SRC_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_SRC_PORT},\
-    {"UDP_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_UDP_LENGTH},\
-    {"udp_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L3_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
-    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
-    {"unknown_l3_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L4_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
-    {"unknown_l4_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L5_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
-    {"L5_BYTES_0_1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
-    {"L5_BYTES_2_3", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
-    {"L5_BYTES_4_7", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
-    {"unknown_l5_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
-
-/*!
- * \name VLAN_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_CFI  0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_PCP  1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_TPID 2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_VID  3
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_FID_COUNT          4
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
-    {"CFI", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_CFI},\
-    {"PCP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_PCP},\
-    {"TPID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_TPID},\
-    {"VID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_VID},\
-    {"vlan_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_FID_COUNT}
-
-/*!
- * \name VNTAG_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_TAG  0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_TPID 1
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_FID_COUNT          2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_TAG},\
-    {"TPID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_TPID},\
-    {"vntag_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_FID_COUNT}
-
-/*!
- * \name VXLAN_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_RESERVED2        1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_VN_ID            2
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FID_COUNT          3
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS_RESERVED_1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
-    {"RESERVED2", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_RESERVED2},\
-    {"VN_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_VN_ID},\
-    {"vxlan_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FID_COUNT}
-
-/*!
- * \name WESP_T field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FLAGS       0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_HEADER_LEN  1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_NEXT_HEADER 2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_SEQ_NUM     3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_SPI         4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_TRAILER_LEN 5
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_WESP_IV     6
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FID_COUNT          7
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FLAGS},\
-    {"HEADER_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_HEADER_LEN},\
-    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_NEXT_HEADER},\
-    {"SEQ_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_SEQ_NUM},\
-    {"SPI", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_SPI},\
-    {"TRAILER_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_TRAILER_LEN},\
-    {"WESP_IV", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_WESP_IV},\
-    {"wesp_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FID_COUNT}
-
-
-#endif /* BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_flex_data.h
deleted file mode 100644
index b68fdc1beea7..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_flex_data.h
+++ /dev/null
@@ -1,181 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DATA_H
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DATA_H
-
-/*!
- * \name RX flex metadata field IDs.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                                 0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                            1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DVP_15_0                                                  2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                                         3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0                                     4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 5
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0                   6
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                                    7
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                                    8
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                                 9
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                                10
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                                   11
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                                  12
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                                  13
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                                         14
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                                   15
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0              16
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                                 17
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                                        18
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                                       19
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                                       20
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0            21
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                               22
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                               23
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                               24
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                               25
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                               26
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                             27
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0                         28
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                                         29
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                                       30
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                                       31
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SVP_15_0                                                  32
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                              33
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                                   34
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                                         35
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                                        36
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                                        37
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                           38
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_VFI_15_0                                                  39
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0              40
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_FID_COUNT                       41
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_COUNT                    47
-
-/*!
- * \name Packet Flex Reason Types.
- */
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE                         0
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               1
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED                    3
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  4
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED                     5
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  6
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   7
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP                                     8
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               9
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      10
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   11
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           12
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      13
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      14
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           15
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      16
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            17
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        18
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            19
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        20
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    21
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      22
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      23
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      24
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      25
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      26
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      27
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      28
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      29
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD            30
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              31
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  32
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    33
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY                       34
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          35
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              36
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            37
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT                      38
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                39
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         40
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SVP                                     41
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               42
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU                43
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR                     44
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       45
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_VFP                                     46
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
-    {"CB_STATION_MOVE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\
-    {"CML_FLAGS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
-    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DLB_ECMP_PKT_SAMPLED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\
-    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DLB_LAG_PKT_SAMPLED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\
-    {"DST_FP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
-    {"EM_FT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
-    {"IFP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP},\
-    {"IFP_METER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
-    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
-    {"IVXLT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
-    {"L2_DST_LOOKUP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
-    {"L2_DST_LOOKUP_MISS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
-    {"L2_SRC_STATIC_MOVE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
-    {"L3_DST_LOOKUP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
-    {"L3_DST_LOOKUP_MISS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
-    {"L3_HDR_ERROR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
-    {"L3_IIF_EQ_L3_OIF", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
-    {"L3_TTL_ERROR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
-    {"LEARN_CACHE_FULL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
-    {"MACSA_MULTICAST_RSVD", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
-    {"MATCHED_RULE_BIT_0", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
-    {"MATCHED_RULE_BIT_1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
-    {"MATCHED_RULE_BIT_2", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
-    {"MATCHED_RULE_BIT_3", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
-    {"MATCHED_RULE_BIT_4", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
-    {"MATCHED_RULE_BIT_5", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
-    {"MATCHED_RULE_BIT_6", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
-    {"MATCHED_RULE_BIT_7", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
-    {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\
-    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
-    {"MIRROR_SAMPLER_SAMPLED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
-    {"MPLS_CTRL_PKT_TO_CPU", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
-    {"MTOP_IPV4_GATEWAY", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY},\
-    {"NO_COPY_TO_CPU", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
-    {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
-    {"PROTOCOL_PKT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
-    {"RESERVED_TRACE_BIT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\
-    {"SER_DROP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
-    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
-    {"SVP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SVP},\
-    {"TRACE_DOP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
-    {"TRACE_DO_NOT_COPY_TO_CPU", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\
-    {"TRACE_DO_NOT_MIRROR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\
-    {"URPF_CHECK_FAILED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
-    {"VFP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_VFP},\
-    {"flex reason count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_COUNT}
-
-#endif /* BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id_defs.h
deleted file mode 100644
index 80393cd917c7..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id_defs.h
+++ /dev/null
@@ -1,405 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56780_a0_hna_6_5_29_2_1_sf_match_id_info.yml
- * for device bcm56780_a0 and variant hna_6_5_29_2_1.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-
-/*!
- * \brief Get the Match ID DataBase information.
- *
- * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
-*/
-extern bcmpkt_rxpmd_match_id_db_info_t *
-    bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db_info_get(void);
-
-/*!
- * \brief Get the Match ID Mapping information.
- *
- * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
-*/
-extern bcmpkt_rxpmd_match_id_map_info_t *
-    bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_map_info_get(void);
-
-/*!
-  \name RXPMD Match IDs
-*/
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  1
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  2
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  3
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  4
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  5
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG  6
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  7
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  8
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  9
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  10
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  11
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  12
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  13
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  14
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  15
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  16
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  17
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  18
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  19
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  20
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  21
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  22
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA  23
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  24
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  25
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  26
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  27
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  28
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  29
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  30
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  31
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  32
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  33
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  34
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  35
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  36
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  37
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  38
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  39
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  40
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  41
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  42
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  43
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  44
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  45
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  46
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  47
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  48
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  49
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  50
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  51
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  52
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  53
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  54
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG  55
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  56
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  57
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  58
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  59
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  60
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  61
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  62
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  63
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  64
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  65
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  66
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  67
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  68
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  69
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  70
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  71
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA  72
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  73
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  74
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  75
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  76
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  77
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  78
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  79
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  80
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  81
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  82
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  83
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  84
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  85
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  86
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  87
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  88
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  89
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  90
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  91
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  92
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  93
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  94
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  95
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  96
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  97
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  98
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  99
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  100
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  101
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  102
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  103
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  104
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  105
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  106
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  107
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  108
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  109
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  110
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA  111
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  112
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  113
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  114
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  115
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  116
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  117
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  118
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  119
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  120
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  121
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  122
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  123
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  124
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  125
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  126
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  127
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  128
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  129
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG  130
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  131
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  132
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  133
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  134
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  135
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  136
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  137
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  138
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  139
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  140
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  141
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  142
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  143
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  144
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  145
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  146
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA  147
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  148
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  149
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  150
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  151
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  152
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  153
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  154
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  155
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  156
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  157
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  158
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  159
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  160
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  161
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  162
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  163
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  164
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  165
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  166
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  167
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  168
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  169
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  170
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  171
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  172
-#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_COUNT  173
-
-#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
-    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
-    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
-    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
-    {"rxpmd_match_id_count", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_COUNT}
-
-#endif /*! BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr.h
new file mode 100644
index 000000000000..093abf95c165
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr.h
@@ -0,0 +1,174 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_H
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T                      0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T                   1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T                      2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T                    3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T         4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T         5
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T              6
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T            7
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T        8
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T         9
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T                      10
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T                     11
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T                12
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T                     13
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T         14
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T                      15
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T               16
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T                  17
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T                 18
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T                  19
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T                      20
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T               21
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T                     22
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T          23
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T          24
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T            25
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T            26
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T            27
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T               28
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T              29
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T             30
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T                     31
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T                    32
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T                     33
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T                     34
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T                       35
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T         36
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T         37
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T                 38
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T                  39
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T                  40
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T                     41
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T                   42
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T             43
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T                  44
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T                  45
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   46
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   47
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T                     48
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T                  49
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T                    50
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T             51
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T             52
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T             53
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T                 54
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T                    55
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T         56
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T         57
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T                      58
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T               59
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T               60
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T               61
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T                     62
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T                    63
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T                    64
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T                     65
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_T               66
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_COUNT    67
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T},\
+    {"authen_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T},\
+    {"bfd_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T},\
+    {"cntag_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T},\
+    {"cpu_composites_0_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"dest_option_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T},\
+    {"ep_nih_header_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T},\
+    {"erspan3_fixed_hdr_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"esp_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T},\
+    {"etag_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T},\
+    {"ethertype_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T},\
+    {"frag_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T},\
+    {"generic_loopback_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"gpe_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T},\
+    {"gre_chksum_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T},\
+    {"gre_key_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T},\
+    {"gre_rout_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T},\
+    {"gre_seq_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T},\
+    {"gre_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T},\
+    {"hop_by_hop_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T},\
+    {"icmp_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T},\
+    {"ifa_flex_md_0_a_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T},\
+    {"ifa_flex_md_0_b_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T},\
+    {"ifa_flex_md_1_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T},\
+    {"ifa_flex_md_2_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T},\
+    {"ifa_flex_md_3_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T},\
+    {"ifa_header_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T},\
+    {"ifa_md_base_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T},\
+    {"ifa_metadata_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T},\
+    {"igmp_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T},\
+    {"ipfix_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"mpls_ach_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T},\
+    {"mpls_bv_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T},\
+    {"mpls_cw_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T},\
+    {"mpls_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T},\
+    {"p_1588_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T},\
+    {"prog_ext_hdr_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T},\
+    {"psamp_0_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T},\
+    {"psamp_1_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_3_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
+    {"rarp_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T},\
+    {"routing_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T},\
+    {"rspan_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T},\
+    {"sflow_shim_0_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T},\
+    {"sflow_shim_1_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T},\
+    {"sflow_shim_2_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T},\
+    {"snap_llc_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T},\
+    {"svtag_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T},\
+    {"tcp_first_4bytes_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T},\
+    {"vntag_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T},\
+    {"vxlan_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T},\
+    {"wesp_t", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T},\
+    {"RXPMD_FLEX_T", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr_data.h
new file mode 100644
index 000000000000..8afacd3d5352
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr_data.h
@@ -0,0 +1,1258 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_DATA_H
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_OPERATION     2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name AUTHEN_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_DATA        0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_RESERVED    3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_SPI         5
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_FID_COUNT          6
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_DATA},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
+    {"PAYLOAD_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
+    {"RESERVED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_RESERVED},\
+    {"SEQ_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
+    {"SPI", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_SPI},\
+    {"authen_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_FID_COUNT}
+
+/*!
+ * \name BFD_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_AP            0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_BFD_LENGTH    1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_CPI           2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DEM           3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DESMINTXINTV  4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DETECTMULT    5
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DIAG          6
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FIN           7
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_MINECHORXINTV 8
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_MPT           9
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_MYDISCRIM     10
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_POLL          11
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_REQMINRXINTV  12
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_STA           13
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_URDISCRIM     14
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_VERSION       15
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FID_COUNT          16
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
+    {"AP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_AP},\
+    {"BFD_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_BFD_LENGTH},\
+    {"CPI", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_CPI},\
+    {"DEM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DEM},\
+    {"DESMINTXINTV", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DESMINTXINTV},\
+    {"DETECTMULT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DETECTMULT},\
+    {"DIAG", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_DIAG},\
+    {"FIN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FIN},\
+    {"MINECHORXINTV", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_MINECHORXINTV},\
+    {"MPT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_MPT},\
+    {"MYDISCRIM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_MYDISCRIM},\
+    {"POLL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_POLL},\
+    {"REQMINRXINTV", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_REQMINRXINTV},\
+    {"STA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_STA},\
+    {"URDISCRIM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_URDISCRIM},\
+    {"VERSION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_VERSION},\
+    {"bfd_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FID_COUNT}
+
+/*!
+ * \name CNTAG_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_RPID 0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_TPID 1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
+    {"RPID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_RPID},\
+    {"TPID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_TPID},\
+    {"cntag_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name DEST_OPTION_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_OPTION      2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
+    {"OPTION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_OPTION},\
+    {"dest_option_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
+
+/*!
+ * \name EP_NIH_HEADER_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_START                10
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"HEADER_SUBTYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
+    {"HEADER_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
+    {"OPAQUE_CTRL_A", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
+    {"OPAQUE_CTRL_B", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
+    {"OPAQUE_CTRL_C", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
+    {"OPAQUE_OBJECT_A", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
+    {"OPAQUE_OBJECT_B", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
+    {"OPAQUE_OBJECT_C", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
+    {"RECIRC_PROFILE_INDEX", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
+    {"RESERVED_0", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
+    {"START", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_START},\
+    {"TIMESTAMP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
+    {"ep_nih_header_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ESP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_NEXT_HEADER 0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_PAD         1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_PAD_LEN     2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_SEQ_NUM     3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_SPI         4
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_FID_COUNT          5
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_NEXT_HEADER},\
+    {"PAD", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_PAD},\
+    {"PAD_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_PAD_LEN},\
+    {"SEQ_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_SEQ_NUM},\
+    {"SPI", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_SPI},\
+    {"esp_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_FID_COUNT}
+
+/*!
+ * \name ETAG_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_TAG  0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_TPID 1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_TAG},\
+    {"TPID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_TPID},\
+    {"etag_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name FRAG_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FRAG_INFO   0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_ID          1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_NEXT_HEADER 2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_RESERVED    3
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
+    {"FRAG_INFO", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FRAG_INFO},\
+    {"ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_ID},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_NEXT_HEADER},\
+    {"RESERVED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_RESERVED},\
+    {"frag_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         13
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_SVP                14
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"SOURCE_SYSTEM_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"SVP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_SVP},\
+    {"generic_loopback_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
+
+/*!
+ * \name GPE_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FLAGS         0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_RESERVED0     2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_RESERVED1     3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_VNI           4
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FID_COUNT          5
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_RESERVED0},\
+    {"RESERVED1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_RESERVED1},\
+    {"VNI", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_VNI},\
+    {"gpe_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FID_COUNT}
+
+/*!
+ * \name GRE_CHKSUM_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
+    {"OFFSET", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
+    {"gre_chksum_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
+
+/*!
+ * \name GRE_KEY_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_KEY 0
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
+    {"KEY", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_KEY},\
+    {"gre_key_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_FID_COUNT}
+
+/*!
+ * \name GRE_ROUT_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_ROUTING 0
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
+    {"ROUTING", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_ROUTING},\
+    {"gre_rout_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
+
+/*!
+ * \name GRE_SEQ_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
+    {"gre_seq_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
+
+/*!
+ * \name GRE_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_C_R_K_S  0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_PROTOCOL 1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_RESERVED 2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_VERSION  3
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
+    {"C_R_K_S", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_C_R_K_S},\
+    {"PROTOCOL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_PROTOCOL},\
+    {"RESERVED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_RESERVED},\
+    {"VERSION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_VERSION},\
+    {"gre_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_FID_COUNT}
+
+/*!
+ * \name HOP_BY_HOP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
+    {"OPTION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
+    {"hop_by_hop_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_CODE      1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_A_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL   0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \
+    {"FWD_HDR_TTL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\
+    {"LNS_DEVICE_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\
+    {"ifa_flex_md_0_a_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_B_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN               0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED       1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID         2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\
+    {"PORT_SPEED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\
+    {"QUEUE_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\
+    {"RX_TIMESTAMP_SEC", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\
+    {"ifa_flex_md_0_b_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_1_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID       0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID      1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PORT_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\
+    {"INGRESS_PORT_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\
+    {"RX_TIMESTAMP_NANOSEC", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\
+    {"ifa_flex_md_1_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_2_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT    1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \
+    {"RESIDENCE_TIME_NANOSEC", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\
+    {"TX_QUEUE_BYTE_COUNT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\
+    {"ifa_flex_md_2_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_3_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \
+    {"MMU_STAT_0", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\
+    {"MMU_STAT_1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\
+    {"ifa_flex_md_3_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT}
+
+/*!
+ * \name IFA_HEADER_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FLAGS      0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_GNS        1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_VER        4
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT          5
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FLAGS},\
+    {"GNS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_GNS},\
+    {"MAX_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
+    {"NEXT_HDR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
+    {"VER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_VER},\
+    {"ifa_header_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT}
+
+/*!
+ * \name IFA_MD_BASE_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR            0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR           2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"REQUEST_VECTOR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\
+    {"ifa_md_base_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR            0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_METADATA                 2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR           3
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"METADATA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_METADATA},\
+    {"REQUEST_VECTOR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\
+    {"ifa_metadata_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_FID_COUNT}
+
+/*!
+ * \name IGMP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_CHECKSUM      0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_IGMP_TYPE     2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_CHECKSUM},\
+    {"GROUP_ADDRESS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
+    {"IGMP_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_IGMP_TYPE},\
+    {"MAX_RESP_TIME", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
+    {"igmp_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_DA                0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_ID                3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_OPTION            4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_SA                6
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_TOS               7
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_TTL               9
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_DA             0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_SA             5
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_MACDA 0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_MACSA 1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name MPLS_ACH_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_RESERVED     2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_VERSION      3
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
+    {"CHANNEL_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
+    {"CW_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
+    {"RESERVED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_RESERVED},\
+    {"VERSION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_VERSION},\
+    {"mpls_ach_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
+
+/*!
+ * \name MPLS_BV_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_VALUE 0
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
+    {"VALUE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_VALUE},\
+    {"mpls_bv_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_FID_COUNT}
+
+/*!
+ * \name MPLS_CW_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_RESERVED   1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
+    {"CW_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
+    {"RESERVED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_RESERVED},\
+    {"SEQ_NUMBER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
+    {"mpls_cw_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_FID_COUNT}
+
+/*!
+ * \name MPLS_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_BOS   0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_EXP   1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_LABEL 2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_TTL   3
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
+    {"BOS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_BOS},\
+    {"EXP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_EXP},\
+    {"LABEL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_LABEL},\
+    {"TTL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_TTL},\
+    {"mpls_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_FID_COUNT}
+
+/*!
+ * \name P_1588_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_CNTRL          0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_CORRECTION     1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_DOMAIN_NB      2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FLAGS          3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_MSG_LENGTH     5
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_MSG_TYPE       6
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_RESERVED1      7
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_RESERVED2      8
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_RESERVED3      9
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_SEQ_ID         10
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_SRCPORTID      11
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_VERSION        13
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FID_COUNT          14
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
+    {"CNTRL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_CNTRL},\
+    {"CORRECTION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_CORRECTION},\
+    {"DOMAIN_NB", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_DOMAIN_NB},\
+    {"FLAGS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FLAGS},\
+    {"LOGMSGINTERVAL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
+    {"MSG_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_MSG_LENGTH},\
+    {"MSG_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_MSG_TYPE},\
+    {"RESERVED1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_RESERVED1},\
+    {"RESERVED2", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_RESERVED2},\
+    {"RESERVED3", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_RESERVED3},\
+    {"SEQ_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_SEQ_ID},\
+    {"SRCPORTID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_SRCPORTID},\
+    {"TRANSPORTSPEC", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
+    {"VERSION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_VERSION},\
+    {"p_1588_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FID_COUNT}
+
+/*!
+ * \name PROG_EXT_HDR_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
+    {"OPTION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
+    {"prog_ext_hdr_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_0_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FLOWSET        0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_LENGTH         1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
+    {"FLOWSET", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FLOWSET},\
+    {"LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_LENGTH},\
+    {"NEXT_HOP_INDEX", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
+    {"OBS_TIME_NS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
+    {"TEMPLATE_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
+    {"psamp_0_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_1_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_DLB_ID         0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_EPOCH          2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
+    {"DLB_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_DLB_ID},\
+    {"EGRESS_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
+    {"EPOCH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_EPOCH},\
+    {"INGRESS_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
+    {"SAMPLED_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
+    {"VARIABLE_FLAG", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
+    {"psamp_1_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE              3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
+    {"DROP_REASON", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
+    {"RESERVED_0", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
+    {"SMOD_STATE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\
+    {"UC_COS__COLOR__PROB_IDX", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
+    {"USER_META_DATA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_3_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_OPERATION     2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name ROUTING_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_DATA          0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_FID_COUNT          5
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_DATA},\
+    {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
+    {"routing_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name RSPAN_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_TAG  0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_TPID 1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_TAG},\
+    {"TPID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_TPID},\
+    {"rspan_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_0_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
+    {"SYS_DESTINATION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
+    {"SYS_SOURCE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
+    {"VERSION", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
+    {"sflow_shim_0_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_1_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
+    {"FLAG_DEST_SAMPLE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
+    {"FLAG_DISCARDED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
+    {"FLAG_FLEX_SAMPLE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
+    {"FLAG_MCAST", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
+    {"FLAG_SRC_SAMPLE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
+    {"FLAG_TRUNCATED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
+    {"RESERVED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
+    {"SYS_OPCODE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
+    {"sflow_shim_1_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_2_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
+    {"USER_META_DATA", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
+    {"sflow_shim_2_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
+
+/*!
+ * \name SNAP_LLC_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_LENGTH   0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
+    {"LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_LENGTH},\
+    {"SNAP_LLC", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
+    {"snap_llc_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
+
+/*!
+ * \name SVTAG_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_DATA_LWR 0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_DATA_UPR 1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \
+    {"DATA_LWR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_DATA_LWR},\
+    {"DATA_UPR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_DATA_UPR},\
+    {"svtag_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"unknown_l5_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_CFI  0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_PCP  1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_TPID 2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_VID  3
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VNTAG_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_TAG  0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_TPID 1
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_TAG},\
+    {"TPID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_TPID},\
+    {"vntag_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FID_COUNT}
+
+/*!
+ * \name WESP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FLAGS       0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_HEADER_LEN  1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_NEXT_HEADER 2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_SEQ_NUM     3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_SPI         4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_TRAILER_LEN 5
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_WESP_IV     6
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FID_COUNT          7
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FLAGS},\
+    {"HEADER_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_HEADER_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_NEXT_HEADER},\
+    {"SEQ_NUM", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_SEQ_NUM},\
+    {"SPI", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_SPI},\
+    {"TRAILER_LEN", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_TRAILER_LEN},\
+    {"WESP_IV", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_WESP_IV},\
+    {"wesp_t fid count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FID_COUNT}
+
+
+#endif /* BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 000000000000..dd9b0bafb4b6
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,181 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                                 0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                            1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                                  2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                                         3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0                                     4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 5
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0                   6
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                                    7
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                                    8
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                                 9
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                                10
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                                   11
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                                  12
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                                  13
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                                         14
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                                   15
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0              16
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                                 17
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                                        18
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                                       19
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                                       20
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0            21
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                               22
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                               23
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                               24
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                               25
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                               26
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                             27
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0                         28
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                                         29
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                                       30
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                                       31
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                                  32
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                              33
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                                   34
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                                         35
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                                        36
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                                        37
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                           38
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                                  39
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0              40
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       41
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    47
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE                         0
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               1
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED                    3
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  4
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED                     5
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  6
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   7
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     8
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               9
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      10
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   11
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           12
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      13
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      14
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           15
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      16
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            17
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        18
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            19
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        20
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    21
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      22
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      23
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      24
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      25
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      26
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      27
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      28
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      29
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD            30
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              31
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  32
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    33
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY                       34
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          35
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              36
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            37
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT                      38
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                39
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         40
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     41
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               42
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU                43
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR                     44
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       45
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     46
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CB_STATION_MOVE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\
+    {"CML_FLAGS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_ECMP_PKT_SAMPLED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\
+    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_LAG_PKT_SAMPLED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\
+    {"DST_FP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
+    {"EM_FT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"IFP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
+    {"IVXLT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_STATIC_MOVE", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_IIF_EQ_L3_OIF", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
+    {"L3_TTL_ERROR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST_RSVD", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
+    {"MATCHED_RULE_BIT_0", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
+    {"MATCHED_RULE_BIT_1", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
+    {"MATCHED_RULE_BIT_2", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
+    {"MATCHED_RULE_BIT_3", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
+    {"MATCHED_RULE_BIT_4", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
+    {"MATCHED_RULE_BIT_5", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
+    {"MATCHED_RULE_BIT_6", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
+    {"MATCHED_RULE_BIT_7", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
+    {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\
+    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
+    {"MIRROR_SAMPLER_SAMPLED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
+    {"MPLS_CTRL_PKT_TO_CPU", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
+    {"MTOP_IPV4_GATEWAY", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY},\
+    {"NO_COPY_TO_CPU", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"RESERVED_TRACE_BIT", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\
+    {"SER_DROP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
+    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
+    {"SVP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
+    {"TRACE_DOP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"TRACE_DO_NOT_COPY_TO_CPU", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\
+    {"TRACE_DO_NOT_MIRROR", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\
+    {"URPF_CHECK_FAILED", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
+    {"VFP", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 000000000000..ccb7e42c51e1
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,405 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56780_a0_hna_6_5_30_6_0_sf_match_id_info.yml
+ * for device bcm56780_a0 and variant hna_6_5_30_6_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  1
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  2
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  3
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  4
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  5
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG  6
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  7
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  8
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  9
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  10
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  11
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  12
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  13
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  14
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  15
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  16
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  17
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  18
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  19
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  20
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  21
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  22
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA  23
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  24
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  25
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  26
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  27
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  28
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  29
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  30
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  31
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  32
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  33
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  34
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  35
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  36
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  37
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  38
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  39
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  40
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  41
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  42
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  43
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  44
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  45
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  46
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  47
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  48
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  49
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  50
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  51
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  52
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  53
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  54
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG  55
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  56
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  57
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  58
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  59
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  60
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  61
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  62
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  63
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  64
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  65
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  66
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  67
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  68
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  69
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  70
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  71
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA  72
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  73
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  74
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  75
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  76
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  77
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  78
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  79
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  80
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  81
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  82
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  83
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  84
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  85
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  86
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  87
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  88
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  89
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  90
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  91
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  92
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  93
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  94
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  95
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  96
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  97
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  98
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  99
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  100
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  101
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  102
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  103
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  104
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  105
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  106
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  107
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  108
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  109
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  110
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA  111
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  112
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  113
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  114
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  115
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  116
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  117
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  118
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  119
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  120
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  121
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  122
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  123
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  124
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  125
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  126
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  127
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  128
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  129
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG  130
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  131
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  132
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  133
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  134
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  135
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  136
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  137
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  138
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  139
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  140
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  141
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  142
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  143
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  144
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  145
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  146
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA  147
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  148
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  149
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  150
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  151
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  152
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  153
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  154
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  155
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  156
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  157
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  158
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  159
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  160
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  161
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  162
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  163
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  164
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  165
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  166
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  167
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  168
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  169
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  170
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  171
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  172
+#define BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_COUNT  173
+
+#define BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr.h
deleted file mode 100644
index 531e025d0233..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr.h
+++ /dev/null
@@ -1,166 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_H
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_H
-
-#include <bcmpkt/bcmpkt_flexhdr_internal.h>
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T                        0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T                     1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T                        2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T                      3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T           4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T           5
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T                6
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T              7
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T          8
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T           9
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T                        10
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T                       11
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T                  12
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T                       13
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T           14
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T                        15
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T                 16
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T                    17
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T                   18
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T                    19
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T                        20
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T                   21
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T            22
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T                 23
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T                       24
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T              25
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T                 26
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T                       27
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T                      28
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T                       29
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T                       30
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T                         31
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T           32
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T           33
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T                   34
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T                    35
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T                    36
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T                       37
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T                     38
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T               39
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T                    40
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T                    41
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T     42
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T     43
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T     44
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T                       45
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T                    46
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T                      47
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T               48
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T               49
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T               50
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T                   51
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T           52
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T           53
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T                        54
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T                 55
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T                 56
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T                 57
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T                       58
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T                      59
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T                      60
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T                       61
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_T                 62
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_COUNT    63
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
-    {"arp_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T},\
-    {"authen_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T},\
-    {"bfd_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T},\
-    {"cntag_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T},\
-    {"cpu_composites_0_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T},\
-    {"cpu_composites_1_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T},\
-    {"dest_option_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T},\
-    {"ep_nih_header_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T},\
-    {"erspan3_fixed_hdr_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
-    {"erspan3_subhdr_5_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
-    {"esp_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T},\
-    {"etag_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T},\
-    {"ethertype_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T},\
-    {"frag_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T},\
-    {"generic_loopback_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T},\
-    {"gpe_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T},\
-    {"gre_chksum_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T},\
-    {"gre_key_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T},\
-    {"gre_rout_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T},\
-    {"gre_seq_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T},\
-    {"gre_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T},\
-    {"hg3_base_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T},\
-    {"hg3_extension_0_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T},\
-    {"hop_by_hop_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T},\
-    {"icmp_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T},\
-    {"ifa_1_raw_hdr_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T},\
-    {"ifa_header_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T},\
-    {"igmp_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T},\
-    {"ipfix_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T},\
-    {"ipv4_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T},\
-    {"ipv6_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T},\
-    {"l2_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T},\
-    {"mirror_erspan_sn_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
-    {"mirror_transport_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T},\
-    {"mpls_ach_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T},\
-    {"mpls_bv_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T},\
-    {"mpls_cw_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T},\
-    {"mpls_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T},\
-    {"p_1588_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T},\
-    {"prog_ext_hdr_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T},\
-    {"psamp_0_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T},\
-    {"psamp_1_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T},\
-    {"psamp_mirror_on_drop_0_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
-    {"psamp_mirror_on_drop_1_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\
-    {"psamp_mirror_on_drop_2_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\
-    {"rarp_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T},\
-    {"routing_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T},\
-    {"rspan_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T},\
-    {"sflow_shim_0_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T},\
-    {"sflow_shim_1_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T},\
-    {"sflow_shim_2_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T},\
-    {"snap_llc_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T},\
-    {"tcp_first_4bytes_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T},\
-    {"tcp_last_16bytes_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T},\
-    {"udp_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T},\
-    {"unknown_l3_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T},\
-    {"unknown_l4_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T},\
-    {"unknown_l5_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T},\
-    {"vlan_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T},\
-    {"vntag_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T},\
-    {"vxlan_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T},\
-    {"wesp_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T},\
-    {"RXPMD_FLEX_T", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_T},\
-    {"flexhdr count", BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_COUNT}
-
-#endif /* BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr_data.h
deleted file mode 100644
index f4adeae2ce51..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr_data.h
+++ /dev/null
@@ -1,1258 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_DATA_H
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_DATA_H
-
-/*!
- * \name ARP_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_HARDWARE_LEN  0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_OPERATION     2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_SENDER_HA     5
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_SENDER_IP     6
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_TARGET_HA     7
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_TARGET_IP     8
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_FID_COUNT          9
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_TARGET_IP},\
-    {"arp_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_FID_COUNT}
-
-/*!
- * \name AUTHEN_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_DATA        0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_RESERVED    3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_SPI         5
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_FID_COUNT          6
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_DATA},\
-    {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
-    {"PAYLOAD_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
-    {"RESERVED", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_RESERVED},\
-    {"SEQ_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
-    {"SPI", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_SPI},\
-    {"authen_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_FID_COUNT}
-
-/*!
- * \name BFD_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_AP            0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_BFD_LENGTH    1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_CPI           2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DEM           3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DESMINTXINTV  4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DETECTMULT    5
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DIAG          6
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FIN           7
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_MINECHORXINTV 8
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_MPT           9
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_MYDISCRIM     10
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_POLL          11
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_REQMINRXINTV  12
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_STA           13
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_URDISCRIM     14
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_VERSION       15
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FID_COUNT          16
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
-    {"AP", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_AP},\
-    {"BFD_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_BFD_LENGTH},\
-    {"CPI", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_CPI},\
-    {"DEM", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DEM},\
-    {"DESMINTXINTV", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DESMINTXINTV},\
-    {"DETECTMULT", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DETECTMULT},\
-    {"DIAG", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DIAG},\
-    {"FIN", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FIN},\
-    {"MINECHORXINTV", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_MINECHORXINTV},\
-    {"MPT", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_MPT},\
-    {"MYDISCRIM", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_MYDISCRIM},\
-    {"POLL", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_POLL},\
-    {"REQMINRXINTV", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_REQMINRXINTV},\
-    {"STA", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_STA},\
-    {"URDISCRIM", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_URDISCRIM},\
-    {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_VERSION},\
-    {"bfd_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FID_COUNT}
-
-/*!
- * \name CNTAG_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_RPID 0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_TPID 1
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_FID_COUNT          2
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
-    {"RPID", BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_RPID},\
-    {"TPID", BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_TPID},\
-    {"cntag_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_0_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT0", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
-    {"DMA_CONT1", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
-    {"DMA_CONT2", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
-    {"DMA_CONT3", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
-    {"DMA_CONT4", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
-    {"DMA_CONT5", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
-    {"DMA_CONT6", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
-    {"cpu_composites_0_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_1_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT10", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
-    {"DMA_CONT11", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
-    {"DMA_CONT12", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
-    {"DMA_CONT13", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
-    {"DMA_CONT14", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
-    {"DMA_CONT15", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
-    {"DMA_CONT16", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
-    {"DMA_CONT17", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
-    {"DMA_CONT7", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
-    {"DMA_CONT8", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
-    {"DMA_CONT9", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
-    {"cpu_composites_1_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
-
-/*!
- * \name DEST_OPTION_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_OPTION      2
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
-    {"OPTION", BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_OPTION},\
-    {"dest_option_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
-
-/*!
- * \name EP_NIH_HEADER_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_START                10
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"HEADER_SUBTYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
-    {"HEADER_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
-    {"OPAQUE_CTRL_A", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
-    {"OPAQUE_CTRL_B", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
-    {"OPAQUE_CTRL_C", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
-    {"OPAQUE_OBJECT_A", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
-    {"OPAQUE_OBJECT_B", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
-    {"OPAQUE_OBJECT_C", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
-    {"RECIRC_PROFILE_INDEX", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
-    {"RESERVED_0", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
-    {"START", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_START},\
-    {"TIMESTAMP", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
-    {"ep_nih_header_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_FIXED_HDR_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
-    {"BSO", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
-    {"COS", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
-    {"GBP_SID", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
-    {"P_FT_HWID_D_GRA_O", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
-    {"SESSION_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
-    {"T", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
-    {"TIMESTAMP", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
-    {"VER", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
-    {"VLAN", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
-    {"erspan3_fixed_hdr_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_SUBHDR_5_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
-    {"PLATFORM_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
-    {"PORT_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
-    {"SWITCH_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
-    {"TIMESTAMP", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
-    {"erspan3_subhdr_5_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
-
-/*!
- * \name ESP_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_NEXT_HEADER 0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_PAD         1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_PAD_LEN     2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_SEQ_NUM     3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_SPI         4
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_FID_COUNT          5
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
-    {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_NEXT_HEADER},\
-    {"PAD", BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_PAD},\
-    {"PAD_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_PAD_LEN},\
-    {"SEQ_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_SEQ_NUM},\
-    {"SPI", BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_SPI},\
-    {"esp_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_FID_COUNT}
-
-/*!
- * \name ETAG_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_TAG  0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_TPID 1
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_FID_COUNT          2
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_TAG},\
-    {"TPID", BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_TPID},\
-    {"etag_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_FID_COUNT}
-
-/*!
- * \name ETHERTYPE_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_TYPE 0
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
-    {"TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_TYPE},\
-    {"ethertype_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
-
-/*!
- * \name FRAG_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FRAG_INFO   0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_ID          1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_NEXT_HEADER 2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_RESERVED    3
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FID_COUNT          4
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
-    {"FRAG_INFO", BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FRAG_INFO},\
-    {"ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_ID},\
-    {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_NEXT_HEADER},\
-    {"RESERVED", BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_RESERVED},\
-    {"frag_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FID_COUNT}
-
-/*!
- * \name GENERIC_LOOPBACK_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
-    {"DESTINATION_OBJ", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
-    {"DESTINATION_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
-    {"ENTROPY_OBJ", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
-    {"FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
-    {"HEADER_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
-    {"INPUT_PRIORITY", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
-    {"INTERFACE_CTRL", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
-    {"INTERFACE_OBJ", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
-    {"PROCESSING_CTRL_0", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
-    {"PROCESSING_CTRL_1", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
-    {"QOS_OBJ", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
-    {"RESERVED_1", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
-    {"RESERVED_2", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
-    {"SOURCE_SYSTEM_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
-    {"START_BYTE", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
-    {"generic_loopback_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
-
-/*!
- * \name GPE_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FLAGS         0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_RESERVED0     2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_RESERVED1     3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_VNI           4
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FID_COUNT          5
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FLAGS},\
-    {"NEXT_PROTOCOL", BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
-    {"RESERVED0", BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_RESERVED0},\
-    {"RESERVED1", BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_RESERVED1},\
-    {"VNI", BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_VNI},\
-    {"gpe_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FID_COUNT}
-
-/*!
- * \name GRE_CHKSUM_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
-    {"OFFSET", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
-    {"gre_chksum_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
-
-/*!
- * \name GRE_KEY_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_KEY 0
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_FID_COUNT          1
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
-    {"KEY", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_KEY},\
-    {"gre_key_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_FID_COUNT}
-
-/*!
- * \name GRE_ROUT_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_ROUTING 0
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
-    {"ROUTING", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_ROUTING},\
-    {"gre_rout_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
-
-/*!
- * \name GRE_SEQ_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
-    {"gre_seq_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
-
-/*!
- * \name GRE_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_C_R_K_S  0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_PROTOCOL 1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_RESERVED 2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_VERSION  3
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_FID_COUNT          4
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
-    {"C_R_K_S", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_C_R_K_S},\
-    {"PROTOCOL", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_PROTOCOL},\
-    {"RESERVED", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_RESERVED},\
-    {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_VERSION},\
-    {"gre_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_FID_COUNT}
-
-/*!
- * \name HG3_BASE_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_CN                      0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_CNG                     1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_ENTROPY                 2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT         3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_HG3_RESERVED            4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_L3_ROUTED               5
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_MIRROR_COPY             6
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE          7
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION      8
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE           10
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_TC                      11
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_VERSION                 12
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_FID_COUNT          13
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \
-    {"CN", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_CN},\
-    {"CNG", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_CNG},\
-    {"ENTROPY", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_ENTROPY},\
-    {"EXT_HDR_PRESENT", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\
-    {"HG3_RESERVED", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\
-    {"L3_ROUTED", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\
-    {"MIRROR_COPY", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\
-    {"RESERVED_ETYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\
-    {"SYSTEM_DESTINATION", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\
-    {"SYSTEM_DESTINATION_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\
-    {"SYSTEM_SOURCE", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\
-    {"TC", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_TC},\
-    {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_VERSION},\
-    {"hg3_base_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_FID_COUNT}
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP       0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF      1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED    2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP          3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP        4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP        5
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP  6
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP  7
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1  8
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10
-
-/*!
- * \name HG3_EXTENSION_0_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID          0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF     1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS             2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_SVP               4
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT          5
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \
-    {"CLASS_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID},\
-    {"DVP_OR_L3_IIF", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\
-    {"FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\
-    {"FORWARDING_DOMAIN", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\
-    {"SVP", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\
-    {"hg3_extension_0_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT}
-
-/*!
- * \name HOP_BY_HOP_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
-    {"OPTION", BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
-    {"hop_by_hop_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
-
-/*!
- * \name ICMP_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_CHECKSUM  0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_CODE      1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_ICMP_TYPE 2
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_FID_COUNT          3
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_CHECKSUM},\
-    {"CODE", BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_CODE},\
-    {"ICMP_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_ICMP_TYPE},\
-    {"icmp_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_FID_COUNT}
-
-/*!
- * \name IFA_1_RAW_HDR_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_DATA 0
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_FID_COUNT          1
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_DATA},\
-    {"ifa_1_raw_hdr_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_FID_COUNT}
-
-/*!
- * \name IFA_HEADER_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_ACTION_VECTOR       0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_CUR_LENGTH          1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FLAGS               2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FLAGS_RSVD          3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_HOP_LIMIT_HOP_COUNT 4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH          5
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_METADATA            6
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_MSG_TYPE            7
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_PROBE_MARKER_0      8
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_PROBE_MARKER_1      9
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_REQUEST_VECTOR      10
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_RSVD_0              11
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_SENDER_HANDLE       12
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_SEQUENCE_NUMBER     13
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_VERSION             14
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FID_COUNT          15
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"ACTION_VECTOR", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_ACTION_VECTOR},\
-    {"CUR_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_CUR_LENGTH},\
-    {"FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FLAGS},\
-    {"FLAGS_RSVD", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FLAGS_RSVD},\
-    {"HOP_LIMIT_HOP_COUNT", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_HOP_LIMIT_HOP_COUNT},\
-    {"MAX_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
-    {"METADATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_METADATA},\
-    {"MSG_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_MSG_TYPE},\
-    {"PROBE_MARKER_0", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_PROBE_MARKER_0},\
-    {"PROBE_MARKER_1", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_PROBE_MARKER_1},\
-    {"REQUEST_VECTOR", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_REQUEST_VECTOR},\
-    {"RSVD_0", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_RSVD_0},\
-    {"SENDER_HANDLE", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_SENDER_HANDLE},\
-    {"SEQUENCE_NUMBER", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_SEQUENCE_NUMBER},\
-    {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_VERSION},\
-    {"ifa_header_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FID_COUNT}
-
-/*!
- * \name IGMP_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_CHECKSUM      0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_IGMP_TYPE     2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_FID_COUNT          4
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_CHECKSUM},\
-    {"GROUP_ADDRESS", BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
-    {"IGMP_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_IGMP_TYPE},\
-    {"MAX_RESP_TIME", BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
-    {"igmp_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_FID_COUNT}
-
-/*!
- * \name IPFIX_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_LENGTH        1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_VERSION       4
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_FID_COUNT          5
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
-    {"EXPORT_TIME", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
-    {"LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_LENGTH},\
-    {"OBS_DOMAIN_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
-    {"SEQUENCE_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
-    {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_VERSION},\
-    {"ipfix_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_FID_COUNT}
-
-/*!
- * \name IPV4_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_DA                0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_ID                3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_OPTION            4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_PROTOCOL          5
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_SA                6
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_TOS               7
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_TTL               9
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FID_COUNT          11
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_DA},\
-    {"FLAGS_FRAG_OFFSET", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
-    {"HDR_CHECKSUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
-    {"ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_ID},\
-    {"OPTION", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_OPTION},\
-    {"PROTOCOL", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_PROTOCOL},\
-    {"SA", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_SA},\
-    {"TOS", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_TOS},\
-    {"TOTAL_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
-    {"TTL", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_TTL},\
-    {"VERSION_HDR_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
-    {"ipv4_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FID_COUNT}
-
-/*!
- * \name IPV6_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_DA             0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FLOW_LABEL     1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_HOP_LIMIT      2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_NEXT_HEADER    3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_SA             5
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_VERSION        7
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FID_COUNT          8
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_DA},\
-    {"FLOW_LABEL", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FLOW_LABEL},\
-    {"HOP_LIMIT", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_HOP_LIMIT},\
-    {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_NEXT_HEADER},\
-    {"PAYLOAD_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
-    {"SA", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_SA},\
-    {"TRAFFIC_CLASS", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
-    {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_VERSION},\
-    {"ipv6_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FID_COUNT}
-
-/*!
- * \name L2_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_MACDA 0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_MACSA 1
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_FID_COUNT          2
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
-    {"MACDA", BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_MACDA},\
-    {"MACSA", BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_MACSA},\
-    {"l2_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_FID_COUNT}
-
-/*!
- * \name MIRROR_ERSPAN_SN_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
-    {"SEQ_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
-    {"mirror_erspan_sn_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
-
-/*!
- * \name MIRROR_TRANSPORT_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
-    {"mirror_transport_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
-
-/*!
- * \name MPLS_ACH_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_RESERVED     2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_VERSION      3
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
-    {"CHANNEL_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
-    {"CW_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
-    {"RESERVED", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_RESERVED},\
-    {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_VERSION},\
-    {"mpls_ach_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
-
-/*!
- * \name MPLS_BV_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_VALUE 0
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
-    {"VALUE", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_VALUE},\
-    {"mpls_bv_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_FID_COUNT}
-
-/*!
- * \name MPLS_CW_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_RESERVED   1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
-    {"CW_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
-    {"RESERVED", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_RESERVED},\
-    {"SEQ_NUMBER", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
-    {"mpls_cw_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_FID_COUNT}
-
-/*!
- * \name MPLS_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_BOS   0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_EXP   1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_LABEL 2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_TTL   3
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_FID_COUNT          4
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
-    {"BOS", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_BOS},\
-    {"EXP", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_EXP},\
-    {"LABEL", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_LABEL},\
-    {"TTL", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_TTL},\
-    {"mpls_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_FID_COUNT}
-
-/*!
- * \name P_1588_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_CNTRL          0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_CORRECTION     1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_DOMAIN_NB      2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FLAGS          3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_MSG_LENGTH     5
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_MSG_TYPE       6
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_RESERVED1      7
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_RESERVED2      8
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_RESERVED3      9
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_SEQ_ID         10
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_SRCPORTID      11
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_VERSION        13
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FID_COUNT          14
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
-    {"CNTRL", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_CNTRL},\
-    {"CORRECTION", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_CORRECTION},\
-    {"DOMAIN_NB", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_DOMAIN_NB},\
-    {"FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FLAGS},\
-    {"LOGMSGINTERVAL", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
-    {"MSG_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_MSG_LENGTH},\
-    {"MSG_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_MSG_TYPE},\
-    {"RESERVED1", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_RESERVED1},\
-    {"RESERVED2", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_RESERVED2},\
-    {"RESERVED3", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_RESERVED3},\
-    {"SEQ_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_SEQ_ID},\
-    {"SRCPORTID", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_SRCPORTID},\
-    {"TRANSPORTSPEC", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
-    {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_VERSION},\
-    {"p_1588_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FID_COUNT}
-
-/*!
- * \name PROG_EXT_HDR_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
-    {"OPTION", BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
-    {"prog_ext_hdr_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
-
-/*!
- * \name PSAMP_0_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FLOWSET        0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_LENGTH         1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
-    {"FLOWSET", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FLOWSET},\
-    {"LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_LENGTH},\
-    {"NEXT_HOP_INDEX", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
-    {"OBS_TIME_NS", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
-    {"TEMPLATE_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
-    {"psamp_0_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_1_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_DLB_ID         0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_EPOCH          2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
-    {"DLB_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_DLB_ID},\
-    {"EGRESS_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
-    {"EPOCH", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_EPOCH},\
-    {"INGRESS_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
-    {"SAMPLED_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
-    {"VARIABLE_FLAG", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
-    {"psamp_1_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_MOD_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
-    {"INGRESS_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
-    {"LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
-    {"OBS_TIME_NS", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
-    {"SWITCH_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
-    {"TEMPLATE_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
-    {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_1_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON    0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL      2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH     3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA     4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR  5
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT          6
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \
-    {"ING_DROP_REASON", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\
-    {"MIRROR_ON_DROP_OBJ", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\
-    {"MMU_DROP_CTRL", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\
-    {"SAMPLED_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_1_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_2_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON       0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0            2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH        3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA        4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR     5
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT          6
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \
-    {"EGR_DROP_REASON", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\
-    {"EP_COPY_SESSION_INDEX", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\
-    {"RESERVED_0", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\
-    {"SAMPLED_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_2_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT}
-
-/*!
- * \name RARP_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_HARDWARE_LEN  0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_OPERATION     2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_SENDER_HA     5
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_SENDER_IP     6
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_TARGET_HA     7
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_TARGET_IP     8
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_FID_COUNT          9
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_TARGET_IP},\
-    {"rarp_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_FID_COUNT}
-
-/*!
- * \name ROUTING_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_DATA          0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_FID_COUNT          5
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_DATA},\
-    {"HDR_EXT_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
-    {"ROUTING_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
-    {"SEGMENTS_LEFT", BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
-    {"routing_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_FID_COUNT}
-
-/*!
- * \name RSPAN_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_TAG  0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_TPID 1
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_FID_COUNT          2
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_TAG},\
-    {"TPID", BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_TPID},\
-    {"rspan_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_0_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
-    {"SYS_DESTINATION", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
-    {"SYS_SOURCE", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
-    {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
-    {"sflow_shim_0_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_1_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
-    {"FLAG_DEST_SAMPLE", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
-    {"FLAG_DISCARDED", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
-    {"FLAG_FLEX_SAMPLE", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
-    {"FLAG_MCAST", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
-    {"FLAG_SRC_SAMPLE", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
-    {"FLAG_TRUNCATED", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
-    {"RESERVED", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
-    {"SYS_OPCODE", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
-    {"sflow_shim_1_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_2_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
-    {"USER_META_DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
-    {"sflow_shim_2_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
-
-/*!
- * \name SNAP_LLC_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_LENGTH   0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
-    {"LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_LENGTH},\
-    {"SNAP_LLC", BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
-    {"snap_llc_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
-
-/*!
- * \name TCP_FIRST_4BYTES_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
-    {"DST_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
-    {"SRC_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
-    {"tcp_first_4bytes_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
-
-/*!
- * \name TCP_LAST_16BYTES_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
-    {"ACK_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
-    {"CHECKSUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
-    {"HDR_LEN_AND_FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
-    {"SEQ_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
-    {"URGENT_PTR", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
-    {"WIN_SIZE", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
-    {"tcp_last_16bytes_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
-
-/*!
- * \name UDP_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_CHECKSUM   0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_DST_PORT   1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_SRC_PORT   2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_UDP_LENGTH 3
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_FID_COUNT          4
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_CHECKSUM},\
-    {"DST_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_DST_PORT},\
-    {"SRC_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_SRC_PORT},\
-    {"UDP_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_UDP_LENGTH},\
-    {"udp_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L3_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
-    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
-    {"unknown_l3_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L4_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
-    {"unknown_l4_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L5_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
-    {"L5_BYTES_0_1", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
-    {"L5_BYTES_2_3", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
-    {"L5_BYTES_4_7", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
-    {"unknown_l5_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
-
-/*!
- * \name VLAN_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_CFI  0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_PCP  1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_TPID 2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_VID  3
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_FID_COUNT          4
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
-    {"CFI", BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_CFI},\
-    {"PCP", BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_PCP},\
-    {"TPID", BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_TPID},\
-    {"VID", BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_VID},\
-    {"vlan_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_FID_COUNT}
-
-/*!
- * \name VNTAG_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_TAG  0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_TPID 1
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_FID_COUNT          2
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_TAG},\
-    {"TPID", BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_TPID},\
-    {"vntag_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_FID_COUNT}
-
-/*!
- * \name VXLAN_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_RESERVED2        1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_VN_ID            2
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FID_COUNT          3
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS_RESERVED_1", BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
-    {"RESERVED2", BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_RESERVED2},\
-    {"VN_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_VN_ID},\
-    {"vxlan_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FID_COUNT}
-
-/*!
- * \name WESP_T field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FLAGS       0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_HEADER_LEN  1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_NEXT_HEADER 2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_SEQ_NUM     3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_SPI         4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_TRAILER_LEN 5
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_WESP_IV     6
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FID_COUNT          7
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FLAGS},\
-    {"HEADER_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_HEADER_LEN},\
-    {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_NEXT_HEADER},\
-    {"SEQ_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_SEQ_NUM},\
-    {"SPI", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_SPI},\
-    {"TRAILER_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_TRAILER_LEN},\
-    {"WESP_IV", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_WESP_IV},\
-    {"wesp_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FID_COUNT}
-
-
-#endif /* BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_flex_data.h
deleted file mode 100644
index dc271d029f8c..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_flex_data.h
+++ /dev/null
@@ -1,178 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DATA_H
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DATA_H
-
-/*!
- * \name RX flex metadata field IDs.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                                 0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                            1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                                  2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                                         3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0                                     4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 5
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0                   6
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                                    7
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                                    8
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                                 9
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                                10
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                                   11
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                                  12
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                                  13
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                                         14
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                                   15
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                                 16
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                                        17
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                                       18
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                                       19
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0            20
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                               21
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                               22
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                               23
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                               24
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                               25
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                             26
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0                         27
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                                         28
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                                       29
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                                       30
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                                  31
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                              32
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                                   33
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                                         34
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                                        35
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                                        36
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                           37
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                                  38
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0              39
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       40
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    46
-
-/*!
- * \name Packet Flex Reason Types.
- */
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               0
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED                    2
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  3
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED                     4
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  5
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   6
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     7
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               8
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      9
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   10
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           11
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      12
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD                          13
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      14
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           15
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      16
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            17
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        18
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            19
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        20
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST                         21
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      22
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      23
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      24
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      25
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      26
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      27
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      28
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      29
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED                 30
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              31
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  32
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    33
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY                       34
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          35
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              36
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            37
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                38
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED              39
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     40
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               41
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU                42
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR                     43
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       44
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     45
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
-    {"CML_FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
-    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DLB_ECMP_PKT_SAMPLED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\
-    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DLB_LAG_PKT_SAMPLED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\
-    {"DST_FP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
-    {"EM_FT", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
-    {"IFP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
-    {"IFP_METER", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
-    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
-    {"IVXLT", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
-    {"L2_DST_LOOKUP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
-    {"L2_DST_LOOKUP_MISS", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
-    {"L2_SRC_DISCARD", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\
-    {"L2_SRC_STATIC_MOVE", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
-    {"L3_DST_LOOKUP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
-    {"L3_DST_LOOKUP_MISS", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
-    {"L3_HDR_ERROR", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
-    {"L3_IIF_EQ_L3_OIF", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
-    {"L3_TTL_ERROR", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
-    {"LEARN_CACHE_FULL", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
-    {"MACSA_MULTICAST", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\
-    {"MATCHED_RULE_BIT_0", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
-    {"MATCHED_RULE_BIT_1", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
-    {"MATCHED_RULE_BIT_2", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
-    {"MATCHED_RULE_BIT_3", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
-    {"MATCHED_RULE_BIT_4", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
-    {"MATCHED_RULE_BIT_5", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
-    {"MATCHED_RULE_BIT_6", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
-    {"MATCHED_RULE_BIT_7", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
-    {"MEMBERSHIP_CHECK_FAILED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
-    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
-    {"MIRROR_SAMPLER_SAMPLED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
-    {"MPLS_CTRL_PKT_TO_CPU", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
-    {"MTOP_IPV4_GATEWAY", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY},\
-    {"NO_COPY_TO_CPU", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
-    {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
-    {"PROTOCOL_PKT", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
-    {"SER_DROP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
-    {"SPANNING_TREE_CHECK_FAILED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
-    {"SVP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
-    {"TRACE_DOP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
-    {"TRACE_DO_NOT_COPY_TO_CPU", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\
-    {"TRACE_DO_NOT_MIRROR", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\
-    {"URPF_CHECK_FAILED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
-    {"VFP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
-    {"flex reason count", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
-
-#endif /* BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id_defs.h
deleted file mode 100644
index 5a8aebe2bb65..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id_defs.h
+++ /dev/null
@@ -1,409 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56780_a0_ina_2_6_11_0_sf_match_id_info.yml
- * for device bcm56780_a0 and variant ina_2_6_11_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-
-/*!
- * \brief Get the Match ID DataBase information.
- *
- * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
-*/
-extern bcmpkt_rxpmd_match_id_db_info_t *
-    bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_db_info_get(void);
-
-/*!
- * \brief Get the Match ID Mapping information.
- *
- * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
-*/
-extern bcmpkt_rxpmd_match_id_map_info_t *
-    bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_map_info_get(void);
-
-/*!
-  \name RXPMD Match IDs
-*/
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE  1
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0  2
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  3
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  4
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  5
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  6
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  7
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  8
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  9
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  10
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  11
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  12
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  13
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  14
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  15
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  16
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  17
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  18
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  19
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  20
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  21
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  22
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  23
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER  24
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  25
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  26
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  27
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  28
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  29
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  30
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  31
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  32
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  33
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  34
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  35
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  36
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  37
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  38
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  39
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  40
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  41
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  42
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  43
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  44
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  45
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  46
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  47
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  48
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  49
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  50
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE  51
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0  52
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  53
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  54
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  55
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  56
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  57
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  58
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  59
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  60
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  61
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  62
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  63
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  64
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  65
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  66
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  67
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  68
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  69
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  70
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  71
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  72
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  73
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER  74
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  75
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  76
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  77
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  78
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  79
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  80
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  81
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  82
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  83
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  84
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  85
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  86
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  87
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  88
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  89
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  90
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  91
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  92
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  93
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  94
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  95
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  96
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  97
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  98
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  99
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  100
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  101
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  102
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  103
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  104
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  105
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  106
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  107
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  108
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  109
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  110
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  111
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  112
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  113
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  114
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  115
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  116
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  117
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  118
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  119
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  120
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  121
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  122
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  123
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  124
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  125
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE  126
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0  127
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  128
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  129
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  130
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  131
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  132
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  133
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  134
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  135
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  136
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  137
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  138
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  139
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  140
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  141
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  142
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  143
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  144
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  145
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  146
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  147
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  148
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER  149
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  150
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  151
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  152
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  153
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  154
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  155
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  156
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  157
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  158
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  159
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  160
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  161
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  162
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  163
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  164
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  165
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  166
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  167
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  168
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  169
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  170
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  171
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  172
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  173
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  174
-#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_COUNT  175
-
-#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \
-    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
-    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
-    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
-    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
-    {"rxpmd_match_id_count", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_COUNT}
-
-#endif /*! BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr.h
deleted file mode 100644
index 3be7b6731e9e..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H
-
-#include <bcmpkt/bcmpkt_flexhdr_internal.h>
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T                          0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T             1
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T             2
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T            3
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T             4
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T                    5
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T             6
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T                         7
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T                        8
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T                         9
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T                         10
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T                           11
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T             12
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T             13
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T       14
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T       15
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T                         16
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T             17
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T             18
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T                          19
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T                   20
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T                   21
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T                   22
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T                         23
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T                        24
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_T                   25
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT    26
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_NAME_MAP_INIT \
-    {"arp_t", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T},\
-    {"cpu_composites_0_t", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T},\
-    {"cpu_composites_1_t", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T},\
-    {"erspan3_fixed_hdr_t", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T},\
-    {"erspan3_subhdr_5_t", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T},\
-    {"ethertype_t", BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T},\
-    {"generic_loopback_t", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T},\
-    {"icmp_t", BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T},\
-    {"ipfix_t", BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T},\
-    {"ipv4_t", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T},\
-    {"ipv6_t", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T},\
-    {"l2_t", BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T},\
-    {"mirror_erspan_sn_t", BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T},\
-    {"mirror_transport_t", BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T},\
-    {"psamp_mirror_on_drop_0_t", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
-    {"psamp_mirror_on_drop_1_t", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\
-    {"rarp_t", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T},\
-    {"tcp_first_4bytes_t", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T},\
-    {"tcp_last_16bytes_t", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T},\
-    {"udp_t", BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T},\
-    {"unknown_l3_t", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T},\
-    {"unknown_l4_t", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T},\
-    {"unknown_l5_t", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T},\
-    {"vlan_t", BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T},\
-    {"vxlan_t", BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T},\
-    {"RXPMD_FLEX_T", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_T},\
-    {"flexhdr count", BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT}
-
-#endif /* BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr_data.h
deleted file mode 100644
index 34e44e61f17d..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr_data.h
+++ /dev/null
@@ -1,539 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H
-
-/*!
- * \name ARP_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_LEN  0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_TYPE 1
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_OPERATION     2
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_PROT_ADDR_LEN 3
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_PROTOCOL_TYPE 4
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_HA     5
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_IP     6
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_HA     7
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_IP     8
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT          9
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_IP},\
-    {"arp_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_0_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT0", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
-    {"DMA_CONT1", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
-    {"DMA_CONT2", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
-    {"DMA_CONT3", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
-    {"DMA_CONT4", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
-    {"DMA_CONT5", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
-    {"DMA_CONT6", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
-    {"cpu_composites_0_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_1_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT10", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
-    {"DMA_CONT11", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
-    {"DMA_CONT12", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
-    {"DMA_CONT13", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
-    {"DMA_CONT14", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
-    {"DMA_CONT15", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
-    {"DMA_CONT16", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
-    {"DMA_CONT17", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
-    {"DMA_CONT7", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
-    {"DMA_CONT8", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
-    {"DMA_CONT9", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
-    {"cpu_composites_1_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_FIXED_HDR_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
-    {"BSO", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
-    {"COS", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
-    {"GBP_SID", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
-    {"P_FT_HWID_D_GRA_O", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
-    {"SESSION_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
-    {"T", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
-    {"TIMESTAMP", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
-    {"VER", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
-    {"VLAN", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
-    {"erspan3_fixed_hdr_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_SUBHDR_5_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
-    {"PLATFORM_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
-    {"PORT_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
-    {"SWITCH_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
-    {"TIMESTAMP", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
-    {"erspan3_subhdr_5_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
-
-/*!
- * \name ETHERTYPE_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_TYPE 0
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT          1
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
-    {"TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_TYPE},\
-    {"ethertype_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT}
-
-/*!
- * \name GENERIC_LOOPBACK_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
-    {"DESTINATION_OBJ", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
-    {"DESTINATION_TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
-    {"ENTROPY_OBJ", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
-    {"FLAGS", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
-    {"HEADER_TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
-    {"INPUT_PRIORITY", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
-    {"INTERFACE_CTRL", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
-    {"INTERFACE_OBJ", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
-    {"PROCESSING_CTRL_0", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
-    {"PROCESSING_CTRL_1", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
-    {"QOS_OBJ", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
-    {"RESERVED_1", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
-    {"RESERVED_2", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
-    {"SOURCE_SYSTEM_PORT", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
-    {"START_BYTE", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
-    {"generic_loopback_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP_GROUP    8
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  9
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 10
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 11
-
-/*!
- * \name ICMP_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_CHECKSUM  0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_CODE      1
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_ICMP_TYPE 2
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT          3
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_CHECKSUM},\
-    {"CODE", BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_CODE},\
-    {"ICMP_TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_ICMP_TYPE},\
-    {"icmp_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT}
-
-/*!
- * \name IPFIX_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_EXPORT_TIME   0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_LENGTH        1
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_VERSION       4
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT          5
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
-    {"EXPORT_TIME", BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_EXPORT_TIME},\
-    {"LENGTH", BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_LENGTH},\
-    {"OBS_DOMAIN_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
-    {"SEQUENCE_NUM", BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
-    {"VERSION", BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_VERSION},\
-    {"ipfix_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT}
-
-/*!
- * \name IPV4_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_DA                0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_HDR_CHECKSUM      2
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_ID                3
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_OPTION            4
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_PROTOCOL          5
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_SA                6
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOS               7
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOTAL_LENGTH      8
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_TTL               9
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT          11
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_DA},\
-    {"FLAGS_FRAG_OFFSET", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
-    {"HDR_CHECKSUM", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_HDR_CHECKSUM},\
-    {"ID", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_ID},\
-    {"OPTION", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_OPTION},\
-    {"PROTOCOL", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_PROTOCOL},\
-    {"SA", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_SA},\
-    {"TOS", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOS},\
-    {"TOTAL_LENGTH", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOTAL_LENGTH},\
-    {"TTL", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_TTL},\
-    {"VERSION_HDR_LEN", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
-    {"ipv4_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT}
-
-/*!
- * \name IPV6_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_DA             0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FLOW_LABEL     1
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_HOP_LIMIT      2
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_NEXT_HEADER    3
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_SA             5
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_VERSION        7
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT          8
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_DA},\
-    {"FLOW_LABEL", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FLOW_LABEL},\
-    {"HOP_LIMIT", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_HOP_LIMIT},\
-    {"NEXT_HEADER", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_NEXT_HEADER},\
-    {"PAYLOAD_LENGTH", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
-    {"SA", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_SA},\
-    {"TRAFFIC_CLASS", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
-    {"VERSION", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_VERSION},\
-    {"ipv6_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT}
-
-/*!
- * \name L2_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_MACDA 0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_MACSA 1
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT          2
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
-    {"MACDA", BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_MACDA},\
-    {"MACSA", BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_MACSA},\
-    {"l2_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT}
-
-/*!
- * \name MIRROR_ERSPAN_SN_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
-    {"SEQ_NUM", BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
-    {"mirror_erspan_sn_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
-
-/*!
- * \name MIRROR_TRANSPORT_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
-    {"mirror_transport_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_MOD_PORT", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
-    {"INGRESS_PORT", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
-    {"LENGTH", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
-    {"OBS_TIME_NS", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
-    {"SWITCH_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
-    {"TEMPLATE_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
-    {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_1_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON    0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL      2
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH     3
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA     4
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR  5
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT          6
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \
-    {"ING_DROP_REASON", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\
-    {"MIRROR_ON_DROP_OBJ", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\
-    {"MMU_DROP_CTRL", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\
-    {"SAMPLED_LENGTH", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_1_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT}
-
-/*!
- * \name RARP_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_LEN  0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_TYPE 1
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_OPERATION     2
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_PROT_ADDR_LEN 3
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_PROTOCOL_TYPE 4
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_HA     5
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_IP     6
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_HA     7
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_IP     8
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT          9
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_IP},\
-    {"rarp_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT}
-
-/*!
- * \name TCP_FIRST_4BYTES_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
-    {"DST_PORT", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
-    {"SRC_PORT", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
-    {"tcp_first_4bytes_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
-
-/*!
- * \name TCP_LAST_16BYTES_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
-    {"ACK_NUM", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
-    {"CHECKSUM", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
-    {"HDR_LEN_AND_FLAGS", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
-    {"SEQ_NUM", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
-    {"URGENT_PTR", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
-    {"WIN_SIZE", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
-    {"tcp_last_16bytes_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
-
-/*!
- * \name UDP_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_CHECKSUM   0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_DST_PORT   1
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_SRC_PORT   2
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_UDP_LENGTH 3
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT          4
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_CHECKSUM},\
-    {"DST_PORT", BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_DST_PORT},\
-    {"SRC_PORT", BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_SRC_PORT},\
-    {"UDP_LENGTH", BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_UDP_LENGTH},\
-    {"udp_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L3_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
-    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
-    {"unknown_l3_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L4_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
-    {"unknown_l4_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L5_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
-    {"L5_BYTES_0_1", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
-    {"L5_BYTES_2_3", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
-    {"L5_BYTES_4_7", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
-    {"unknown_l5_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
-
-/*!
- * \name VLAN_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_CFI  0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_PCP  1
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_TPID 2
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_VID  3
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT          4
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
-    {"CFI", BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_CFI},\
-    {"PCP", BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_PCP},\
-    {"TPID", BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_TPID},\
-    {"VID", BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_VID},\
-    {"vlan_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT}
-
-/*!
- * \name VXLAN_T field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_RESERVED2        1
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_VN_ID            2
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT          3
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS_RESERVED_1", BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
-    {"RESERVED2", BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_RESERVED2},\
-    {"VN_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_VN_ID},\
-    {"vxlan_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT}
-
-
-#endif /* BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h
deleted file mode 100644
index 9881893f689e..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h
+++ /dev/null
@@ -1,117 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H
-
-/*!
- * \name RX flex metadata field IDs.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DVP_15_0                                       1
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              2
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         3
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         4
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0                           5
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0                        6
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       7
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              8
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                            9
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 10
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    11
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    12
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    13
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    14
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0                             15
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    16
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  17
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0              18
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0                              19
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            20
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            21
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   22
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        23
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              24
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             25
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0                            26
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                27
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_VFI_15_0                                       28
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_FID_COUNT                       29
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT                    21
-
-/*!
- * \name Packet Flex Reason Types.
- */
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                  0
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP                        1
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                  2
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT                      3
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP              4
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS         5
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD             6
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE         7
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP              8
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS         9
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR               10
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR               11
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL           12
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST            13
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED    14
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU             15
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 16
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT               17
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 18
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                  19
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP                        20
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
-    {"CML_FLAGS", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
-    {"IFP", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP},\
-    {"IFP_METER", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
-    {"IVXLT", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
-    {"L2_DST_LOOKUP", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
-    {"L2_DST_LOOKUP_MISS", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
-    {"L2_SRC_DISCARD", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\
-    {"L2_SRC_STATIC_MOVE", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
-    {"L3_DST_LOOKUP", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
-    {"L3_DST_LOOKUP_MISS", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
-    {"L3_HDR_ERROR", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
-    {"L3_TTL_ERROR", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
-    {"LEARN_CACHE_FULL", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
-    {"MACSA_MULTICAST", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\
-    {"MEMBERSHIP_CHECK_FAILED", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
-    {"NO_COPY_TO_CPU", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
-    {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
-    {"PROTOCOL_PKT", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
-    {"SPANNING_TREE_CHECK_FAILED", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
-    {"TRACE_DOP", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
-    {"VFP", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP},\
-    {"flex reason count", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT}
-
-#endif /* BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h
deleted file mode 100644
index 3f4452eb44a4..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h
+++ /dev/null
@@ -1,209 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56880_a0_cna_6_5_29_sf_match_id_info.yml
- * for device bcm56880_a0 and variant cna_6_5_29.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-
-/*!
- * \brief Get the Match ID DataBase information.
- *
- * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
-*/
-extern bcmpkt_rxpmd_match_id_db_info_t *
-    bcm56880_a0_cna_6_5_29_rxpmd_match_id_db_info_get(void);
-
-/*!
- * \brief Get the Match ID Mapping information.
- *
- * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
-*/
-extern bcmpkt_rxpmd_match_id_map_info_t *
-    bcm56880_a0_cna_6_5_29_rxpmd_match_id_map_info_get(void);
-
-/*!
-  \name RXPMD Match IDs
-*/
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  0
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  1
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  2
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  3
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  4
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  5
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  6
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  7
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  8
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  9
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  10
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  11
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  12
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  13
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  14
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  15
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  16
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  17
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  18
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  19
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  20
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  21
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  22
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  23
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  24
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  25
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  26
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  27
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  28
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  29
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  30
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  31
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  32
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  33
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  34
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  35
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  36
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  37
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  38
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  39
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  40
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  41
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  42
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  43
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  44
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  45
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  46
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  47
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  48
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  49
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  50
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  51
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  52
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  53
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  54
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  55
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  56
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  57
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  58
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  59
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  60
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  61
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  62
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  63
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  64
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  65
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  66
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  67
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  68
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  69
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  70
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  71
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  72
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  73
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  74
-#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT  75
-
-#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
-    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
-    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
-    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
-    {"rxpmd_match_id_count", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT}
-
-#endif /*! BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr.h
deleted file mode 100644
index bc96c1b3e1a8..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr.h
+++ /dev/null
@@ -1,174 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_H
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_H
-
-#include <bcmpkt/bcmpkt_flexhdr_internal.h>
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T                        0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T                     1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T                        2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T                      3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T           4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T           5
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T                6
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T          7
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T           8
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T                        9
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T                       10
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T                  11
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T                       12
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T           13
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T                        14
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T                 15
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T                    16
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T                   17
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T                    18
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T                        19
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T                   20
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T            21
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T                 22
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T                       23
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T            24
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T            25
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T              26
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T              27
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T              28
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T                 29
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T                30
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T               31
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T                       32
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T                      33
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T                       34
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T                       35
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T                         36
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T           37
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T           38
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T                   39
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T                    40
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T                    41
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T                       42
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T                     43
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T               44
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T                    45
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T                    46
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T     47
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T     48
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T                       49
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T                    50
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T                      51
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T               52
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T               53
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T               54
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T                   55
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T           56
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T           57
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T                        58
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T                 59
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T                 60
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T                 61
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T                       62
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T                      63
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T                      64
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T                       65
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_T                 66
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_COUNT    67
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
-    {"arp_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T},\
-    {"authen_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T},\
-    {"bfd_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T},\
-    {"cntag_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T},\
-    {"cpu_composites_0_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T},\
-    {"cpu_composites_1_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T},\
-    {"dest_option_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T},\
-    {"erspan3_fixed_hdr_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
-    {"erspan3_subhdr_5_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
-    {"esp_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T},\
-    {"etag_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T},\
-    {"ethertype_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T},\
-    {"frag_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T},\
-    {"generic_loopback_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T},\
-    {"gpe_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T},\
-    {"gre_chksum_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T},\
-    {"gre_key_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T},\
-    {"gre_rout_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T},\
-    {"gre_seq_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T},\
-    {"gre_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T},\
-    {"hg3_base_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T},\
-    {"hg3_extension_0_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T},\
-    {"hop_by_hop_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T},\
-    {"icmp_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T},\
-    {"ifa_flex_md_0_a_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T},\
-    {"ifa_flex_md_0_b_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T},\
-    {"ifa_flex_md_1_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T},\
-    {"ifa_flex_md_2_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T},\
-    {"ifa_flex_md_3_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T},\
-    {"ifa_header_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T},\
-    {"ifa_md_base_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T},\
-    {"ifa_metadata_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T},\
-    {"igmp_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T},\
-    {"ipfix_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T},\
-    {"ipv4_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T},\
-    {"ipv6_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T},\
-    {"l2_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T},\
-    {"mirror_erspan_sn_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
-    {"mirror_transport_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T},\
-    {"mpls_ach_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T},\
-    {"mpls_bv_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T},\
-    {"mpls_cw_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T},\
-    {"mpls_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T},\
-    {"p_1588_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T},\
-    {"prog_ext_hdr_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T},\
-    {"psamp_0_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T},\
-    {"psamp_1_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T},\
-    {"psamp_mirror_on_drop_0_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
-    {"psamp_mirror_on_drop_1_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\
-    {"rarp_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T},\
-    {"routing_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T},\
-    {"rspan_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T},\
-    {"sflow_shim_0_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T},\
-    {"sflow_shim_1_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T},\
-    {"sflow_shim_2_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T},\
-    {"snap_llc_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T},\
-    {"tcp_first_4bytes_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T},\
-    {"tcp_last_16bytes_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T},\
-    {"udp_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T},\
-    {"unknown_l3_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T},\
-    {"unknown_l4_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T},\
-    {"unknown_l5_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T},\
-    {"vlan_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T},\
-    {"vntag_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T},\
-    {"vxlan_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T},\
-    {"wesp_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T},\
-    {"RXPMD_FLEX_T", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_T},\
-    {"flexhdr count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_COUNT}
-
-#endif /* BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr_data.h
deleted file mode 100644
index aedf312bd7a9..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr_data.h
+++ /dev/null
@@ -1,1276 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_DATA_H
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_DATA_H
-
-/*!
- * \name ARP_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_HARDWARE_LEN  0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_OPERATION     2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_SENDER_HA     5
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_SENDER_IP     6
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_TARGET_HA     7
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_TARGET_IP     8
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_FID_COUNT          9
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_TARGET_IP},\
-    {"arp_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_FID_COUNT}
-
-/*!
- * \name AUTHEN_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_DATA        0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_RESERVED    3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_SPI         5
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_FID_COUNT          6
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_DATA},\
-    {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
-    {"PAYLOAD_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
-    {"RESERVED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_RESERVED},\
-    {"SEQ_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
-    {"SPI", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_SPI},\
-    {"authen_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_FID_COUNT}
-
-/*!
- * \name BFD_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_AP            0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_BFD_LENGTH    1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_CPI           2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DEM           3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DESMINTXINTV  4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DETECTMULT    5
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DIAG          6
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FIN           7
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_MINECHORXINTV 8
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_MPT           9
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_MYDISCRIM     10
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_POLL          11
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_REQMINRXINTV  12
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_STA           13
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_URDISCRIM     14
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_VERSION       15
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FID_COUNT          16
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
-    {"AP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_AP},\
-    {"BFD_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_BFD_LENGTH},\
-    {"CPI", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_CPI},\
-    {"DEM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DEM},\
-    {"DESMINTXINTV", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DESMINTXINTV},\
-    {"DETECTMULT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DETECTMULT},\
-    {"DIAG", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DIAG},\
-    {"FIN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FIN},\
-    {"MINECHORXINTV", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_MINECHORXINTV},\
-    {"MPT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_MPT},\
-    {"MYDISCRIM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_MYDISCRIM},\
-    {"POLL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_POLL},\
-    {"REQMINRXINTV", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_REQMINRXINTV},\
-    {"STA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_STA},\
-    {"URDISCRIM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_URDISCRIM},\
-    {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_VERSION},\
-    {"bfd_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FID_COUNT}
-
-/*!
- * \name CNTAG_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_RPID 0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_TPID 1
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_FID_COUNT          2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
-    {"RPID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_RPID},\
-    {"TPID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_TPID},\
-    {"cntag_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_0_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT0", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
-    {"DMA_CONT1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
-    {"DMA_CONT2", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
-    {"DMA_CONT3", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
-    {"DMA_CONT4", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
-    {"DMA_CONT5", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
-    {"DMA_CONT6", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
-    {"cpu_composites_0_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_1_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT10", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
-    {"DMA_CONT11", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
-    {"DMA_CONT12", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
-    {"DMA_CONT13", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
-    {"DMA_CONT14", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
-    {"DMA_CONT15", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
-    {"DMA_CONT16", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
-    {"DMA_CONT17", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
-    {"DMA_CONT7", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
-    {"DMA_CONT8", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
-    {"DMA_CONT9", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
-    {"cpu_composites_1_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
-
-/*!
- * \name DEST_OPTION_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_OPTION      2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
-    {"OPTION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_OPTION},\
-    {"dest_option_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_FIXED_HDR_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
-    {"BSO", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
-    {"COS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
-    {"GBP_SID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
-    {"P_FT_HWID_D_GRA_O", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
-    {"SESSION_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
-    {"T", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
-    {"TIMESTAMP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
-    {"VER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
-    {"VLAN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
-    {"erspan3_fixed_hdr_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_SUBHDR_5_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
-    {"PLATFORM_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
-    {"PORT_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
-    {"SWITCH_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
-    {"TIMESTAMP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
-    {"erspan3_subhdr_5_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
-
-/*!
- * \name ESP_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_NEXT_HEADER 0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_PAD         1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_PAD_LEN     2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_SEQ_NUM     3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_SPI         4
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_FID_COUNT          5
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
-    {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_NEXT_HEADER},\
-    {"PAD", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_PAD},\
-    {"PAD_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_PAD_LEN},\
-    {"SEQ_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_SEQ_NUM},\
-    {"SPI", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_SPI},\
-    {"esp_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_FID_COUNT}
-
-/*!
- * \name ETAG_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_TAG  0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_TPID 1
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_FID_COUNT          2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_TAG},\
-    {"TPID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_TPID},\
-    {"etag_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_FID_COUNT}
-
-/*!
- * \name ETHERTYPE_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_TYPE 0
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
-    {"TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_TYPE},\
-    {"ethertype_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
-
-/*!
- * \name FRAG_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FRAG_INFO   0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_ID          1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_NEXT_HEADER 2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_RESERVED    3
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FID_COUNT          4
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
-    {"FRAG_INFO", BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FRAG_INFO},\
-    {"ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_ID},\
-    {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_NEXT_HEADER},\
-    {"RESERVED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_RESERVED},\
-    {"frag_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FID_COUNT}
-
-/*!
- * \name GENERIC_LOOPBACK_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
-    {"DESTINATION_OBJ", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
-    {"DESTINATION_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
-    {"ENTROPY_OBJ", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
-    {"FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
-    {"HEADER_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
-    {"INPUT_PRIORITY", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
-    {"INTERFACE_CTRL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
-    {"INTERFACE_OBJ", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
-    {"PROCESSING_CTRL_0", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
-    {"PROCESSING_CTRL_1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
-    {"QOS_OBJ", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
-    {"RESERVED_1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
-    {"RESERVED_2", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
-    {"SOURCE_SYSTEM_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
-    {"START_BYTE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
-    {"generic_loopback_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
-
-/*!
- * \name GPE_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FLAGS         0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_RESERVED0     2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_RESERVED1     3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_VNI           4
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FID_COUNT          5
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FLAGS},\
-    {"NEXT_PROTOCOL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
-    {"RESERVED0", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_RESERVED0},\
-    {"RESERVED1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_RESERVED1},\
-    {"VNI", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_VNI},\
-    {"gpe_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FID_COUNT}
-
-/*!
- * \name GRE_CHKSUM_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
-    {"OFFSET", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
-    {"gre_chksum_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
-
-/*!
- * \name GRE_KEY_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_KEY 0
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_FID_COUNT          1
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
-    {"KEY", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_KEY},\
-    {"gre_key_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_FID_COUNT}
-
-/*!
- * \name GRE_ROUT_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_ROUTING 0
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
-    {"ROUTING", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_ROUTING},\
-    {"gre_rout_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
-
-/*!
- * \name GRE_SEQ_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
-    {"gre_seq_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
-
-/*!
- * \name GRE_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_C_R_K_S  0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_PROTOCOL 1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_RESERVED 2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_VERSION  3
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_FID_COUNT          4
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
-    {"C_R_K_S", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_C_R_K_S},\
-    {"PROTOCOL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_PROTOCOL},\
-    {"RESERVED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_RESERVED},\
-    {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_VERSION},\
-    {"gre_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_FID_COUNT}
-
-/*!
- * \name HG3_BASE_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_CN                      0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_CNG                     1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_ENTROPY                 2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT         3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_HG3_RESERVED            4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_L3_ROUTED               5
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_MIRROR_COPY             6
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE          7
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION      8
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE           10
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_TC                      11
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_VERSION                 12
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_FID_COUNT          13
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \
-    {"CN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_CN},\
-    {"CNG", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_CNG},\
-    {"ENTROPY", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_ENTROPY},\
-    {"EXT_HDR_PRESENT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\
-    {"HG3_RESERVED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\
-    {"L3_ROUTED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\
-    {"MIRROR_COPY", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\
-    {"RESERVED_ETYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\
-    {"SYSTEM_DESTINATION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\
-    {"SYSTEM_DESTINATION_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\
-    {"SYSTEM_SOURCE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\
-    {"TC", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_TC},\
-    {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_VERSION},\
-    {"hg3_base_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_FID_COUNT}
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP       0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF      1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED    2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP          3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP        4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP        5
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP  6
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP  7
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1  8
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10
-
-/*!
- * \name HG3_EXTENSION_0_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID          0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF     1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS             2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_SVP               4
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT          5
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \
-    {"CLASS_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID},\
-    {"DVP_OR_L3_IIF", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\
-    {"FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\
-    {"FORWARDING_DOMAIN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\
-    {"SVP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\
-    {"hg3_extension_0_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT}
-
-/*!
- * \name HOP_BY_HOP_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
-    {"OPTION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
-    {"hop_by_hop_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
-
-/*!
- * \name ICMP_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_CHECKSUM  0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_CODE      1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_ICMP_TYPE 2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_FID_COUNT          3
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_CHECKSUM},\
-    {"CODE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_CODE},\
-    {"ICMP_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_ICMP_TYPE},\
-    {"icmp_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_0_A_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL   0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT          2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \
-    {"FWD_HDR_TTL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\
-    {"LNS_DEVICE_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\
-    {"ifa_flex_md_0_a_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_0_B_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN               0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED       1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID         2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT          4
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \
-    {"CN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\
-    {"PORT_SPEED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\
-    {"QUEUE_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\
-    {"RX_TIMESTAMP_SEC", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\
-    {"ifa_flex_md_0_b_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_1_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID       0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID      1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT          3
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PORT_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\
-    {"INGRESS_PORT_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\
-    {"RX_TIMESTAMP_NANOSEC", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\
-    {"ifa_flex_md_1_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_2_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT    1
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT          2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \
-    {"RESIDENCE_TIME_NANOSEC", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\
-    {"TX_QUEUE_BYTE_COUNT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\
-    {"ifa_flex_md_2_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_3_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT          2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \
-    {"MMU_STAT_0", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\
-    {"MMU_STAT_1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\
-    {"ifa_flex_md_3_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT}
-
-/*!
- * \name IFA_HEADER_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FLAGS      0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_GNS        1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_VER        4
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT          5
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FLAGS},\
-    {"GNS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_GNS},\
-    {"MAX_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
-    {"NEXT_HDR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
-    {"VER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_VER},\
-    {"ifa_header_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT}
-
-/*!
- * \name IFA_MD_BASE_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR            0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR           2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT          3
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \
-    {"ACTION_VECTOR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\
-    {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
-    {"REQUEST_VECTOR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\
-    {"ifa_md_base_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT}
-
-/*!
- * \name IFA_METADATA_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR            0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_METADATA                 2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR           3
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_FID_COUNT          4
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \
-    {"ACTION_VECTOR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\
-    {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\
-    {"METADATA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_METADATA},\
-    {"REQUEST_VECTOR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\
-    {"ifa_metadata_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_FID_COUNT}
-
-/*!
- * \name IGMP_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_CHECKSUM      0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_IGMP_TYPE     2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_FID_COUNT          4
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_CHECKSUM},\
-    {"GROUP_ADDRESS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
-    {"IGMP_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_IGMP_TYPE},\
-    {"MAX_RESP_TIME", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
-    {"igmp_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_FID_COUNT}
-
-/*!
- * \name IPFIX_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_LENGTH        1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_VERSION       4
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_FID_COUNT          5
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
-    {"EXPORT_TIME", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
-    {"LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_LENGTH},\
-    {"OBS_DOMAIN_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
-    {"SEQUENCE_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
-    {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_VERSION},\
-    {"ipfix_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_FID_COUNT}
-
-/*!
- * \name IPV4_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_DA                0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_ID                3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_OPTION            4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_PROTOCOL          5
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_SA                6
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_TOS               7
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_TTL               9
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FID_COUNT          11
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_DA},\
-    {"FLAGS_FRAG_OFFSET", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
-    {"HDR_CHECKSUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
-    {"ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_ID},\
-    {"OPTION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_OPTION},\
-    {"PROTOCOL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_PROTOCOL},\
-    {"SA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_SA},\
-    {"TOS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_TOS},\
-    {"TOTAL_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
-    {"TTL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_TTL},\
-    {"VERSION_HDR_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
-    {"ipv4_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FID_COUNT}
-
-/*!
- * \name IPV6_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_DA             0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FLOW_LABEL     1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_HOP_LIMIT      2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_NEXT_HEADER    3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_SA             5
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_VERSION        7
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FID_COUNT          8
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_DA},\
-    {"FLOW_LABEL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FLOW_LABEL},\
-    {"HOP_LIMIT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_HOP_LIMIT},\
-    {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_NEXT_HEADER},\
-    {"PAYLOAD_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
-    {"SA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_SA},\
-    {"TRAFFIC_CLASS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
-    {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_VERSION},\
-    {"ipv6_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FID_COUNT}
-
-/*!
- * \name L2_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_MACDA 0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_MACSA 1
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_FID_COUNT          2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
-    {"MACDA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_MACDA},\
-    {"MACSA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_MACSA},\
-    {"l2_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_FID_COUNT}
-
-/*!
- * \name MIRROR_ERSPAN_SN_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
-    {"SEQ_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
-    {"mirror_erspan_sn_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
-
-/*!
- * \name MIRROR_TRANSPORT_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
-    {"mirror_transport_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
-
-/*!
- * \name MPLS_ACH_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_RESERVED     2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_VERSION      3
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
-    {"CHANNEL_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
-    {"CW_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
-    {"RESERVED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_RESERVED},\
-    {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_VERSION},\
-    {"mpls_ach_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
-
-/*!
- * \name MPLS_BV_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_VALUE 0
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
-    {"VALUE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_VALUE},\
-    {"mpls_bv_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_FID_COUNT}
-
-/*!
- * \name MPLS_CW_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_RESERVED   1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
-    {"CW_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
-    {"RESERVED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_RESERVED},\
-    {"SEQ_NUMBER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
-    {"mpls_cw_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_FID_COUNT}
-
-/*!
- * \name MPLS_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_BOS   0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_EXP   1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_LABEL 2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_TTL   3
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_FID_COUNT          4
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
-    {"BOS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_BOS},\
-    {"EXP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_EXP},\
-    {"LABEL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_LABEL},\
-    {"TTL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_TTL},\
-    {"mpls_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_FID_COUNT}
-
-/*!
- * \name P_1588_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_CNTRL          0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_CORRECTION     1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_DOMAIN_NB      2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FLAGS          3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_MSG_LENGTH     5
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_MSG_TYPE       6
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_RESERVED1      7
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_RESERVED2      8
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_RESERVED3      9
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_SEQ_ID         10
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_SRCPORTID      11
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_VERSION        13
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FID_COUNT          14
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
-    {"CNTRL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_CNTRL},\
-    {"CORRECTION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_CORRECTION},\
-    {"DOMAIN_NB", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_DOMAIN_NB},\
-    {"FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FLAGS},\
-    {"LOGMSGINTERVAL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
-    {"MSG_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_MSG_LENGTH},\
-    {"MSG_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_MSG_TYPE},\
-    {"RESERVED1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_RESERVED1},\
-    {"RESERVED2", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_RESERVED2},\
-    {"RESERVED3", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_RESERVED3},\
-    {"SEQ_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_SEQ_ID},\
-    {"SRCPORTID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_SRCPORTID},\
-    {"TRANSPORTSPEC", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
-    {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_VERSION},\
-    {"p_1588_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FID_COUNT}
-
-/*!
- * \name PROG_EXT_HDR_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
-    {"OPTION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
-    {"prog_ext_hdr_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
-
-/*!
- * \name PSAMP_0_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FLOWSET        0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_LENGTH         1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
-    {"FLOWSET", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FLOWSET},\
-    {"LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_LENGTH},\
-    {"NEXT_HOP_INDEX", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
-    {"OBS_TIME_NS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
-    {"TEMPLATE_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
-    {"psamp_0_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_1_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_DLB_ID         0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_EPOCH          2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
-    {"DLB_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_DLB_ID},\
-    {"EGRESS_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
-    {"EPOCH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_EPOCH},\
-    {"INGRESS_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
-    {"SAMPLED_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
-    {"VARIABLE_FLAG", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
-    {"psamp_1_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_MOD_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
-    {"INGRESS_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
-    {"LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
-    {"OBS_TIME_NS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
-    {"SWITCH_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
-    {"TEMPLATE_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
-    {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_1_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON    0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL      2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH     3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA     4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR  5
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT          6
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \
-    {"ING_DROP_REASON", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\
-    {"MIRROR_ON_DROP_OBJ", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\
-    {"MMU_DROP_CTRL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\
-    {"SAMPLED_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_1_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT}
-
-/*!
- * \name RARP_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_HARDWARE_LEN  0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_OPERATION     2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_SENDER_HA     5
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_SENDER_IP     6
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_TARGET_HA     7
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_TARGET_IP     8
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_FID_COUNT          9
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_TARGET_IP},\
-    {"rarp_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_FID_COUNT}
-
-/*!
- * \name ROUTING_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_DATA          0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_FID_COUNT          5
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_DATA},\
-    {"HDR_EXT_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
-    {"ROUTING_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
-    {"SEGMENTS_LEFT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
-    {"routing_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_FID_COUNT}
-
-/*!
- * \name RSPAN_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_TAG  0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_TPID 1
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_FID_COUNT          2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_TAG},\
-    {"TPID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_TPID},\
-    {"rspan_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_0_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
-    {"SYS_DESTINATION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
-    {"SYS_SOURCE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
-    {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
-    {"sflow_shim_0_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_1_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
-    {"FLAG_DEST_SAMPLE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
-    {"FLAG_DISCARDED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
-    {"FLAG_FLEX_SAMPLE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
-    {"FLAG_MCAST", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
-    {"FLAG_SRC_SAMPLE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
-    {"FLAG_TRUNCATED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
-    {"RESERVED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
-    {"SYS_OPCODE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
-    {"sflow_shim_1_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_2_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
-    {"USER_META_DATA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
-    {"sflow_shim_2_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
-
-/*!
- * \name SNAP_LLC_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_LENGTH   0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
-    {"LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_LENGTH},\
-    {"SNAP_LLC", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
-    {"snap_llc_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
-
-/*!
- * \name TCP_FIRST_4BYTES_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
-    {"DST_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
-    {"SRC_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
-    {"tcp_first_4bytes_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
-
-/*!
- * \name TCP_LAST_16BYTES_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
-    {"ACK_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
-    {"CHECKSUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
-    {"HDR_LEN_AND_FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
-    {"SEQ_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
-    {"URGENT_PTR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
-    {"WIN_SIZE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
-    {"tcp_last_16bytes_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
-
-/*!
- * \name UDP_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_CHECKSUM   0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_DST_PORT   1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_SRC_PORT   2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_UDP_LENGTH 3
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_FID_COUNT          4
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_CHECKSUM},\
-    {"DST_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_DST_PORT},\
-    {"SRC_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_SRC_PORT},\
-    {"UDP_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_UDP_LENGTH},\
-    {"udp_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L3_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
-    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
-    {"unknown_l3_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L4_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
-    {"unknown_l4_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L5_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
-    {"L5_BYTES_0_1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
-    {"L5_BYTES_2_3", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
-    {"L5_BYTES_4_7", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
-    {"unknown_l5_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
-
-/*!
- * \name VLAN_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_CFI  0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_PCP  1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_TPID 2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_VID  3
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_FID_COUNT          4
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
-    {"CFI", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_CFI},\
-    {"PCP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_PCP},\
-    {"TPID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_TPID},\
-    {"VID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_VID},\
-    {"vlan_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_FID_COUNT}
-
-/*!
- * \name VNTAG_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_TAG  0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_TPID 1
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_FID_COUNT          2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_TAG},\
-    {"TPID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_TPID},\
-    {"vntag_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_FID_COUNT}
-
-/*!
- * \name VXLAN_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_RESERVED2        1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_VN_ID            2
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FID_COUNT          3
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS_RESERVED_1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
-    {"RESERVED2", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_RESERVED2},\
-    {"VN_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_VN_ID},\
-    {"vxlan_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FID_COUNT}
-
-/*!
- * \name WESP_T field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FLAGS       0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_HEADER_LEN  1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_NEXT_HEADER 2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_SEQ_NUM     3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_SPI         4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_TRAILER_LEN 5
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_WESP_IV     6
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FID_COUNT          7
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FLAGS},\
-    {"HEADER_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_HEADER_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_NEXT_HEADER},\
-    {"SEQ_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_SEQ_NUM},\
-    {"SPI", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_SPI},\
-    {"TRAILER_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_TRAILER_LEN},\
-    {"WESP_IV", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_WESP_IV},\
-    {"wesp_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FID_COUNT}
-
-
-#endif /* BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_flex_data.h
deleted file mode 100644
index 249c95130a4f..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_flex_data.h
+++ /dev/null
@@ -1,163 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DATA_H
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DATA_H
-
-/*!
- * \name RX flex metadata field IDs.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                       2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0        4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         5
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         6
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0                        7
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       8
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              9
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                        10
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      11
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0                             12
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                            13
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 14
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    15
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    16
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    17
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    18
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    19
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  20
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0                     21
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              22
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              23
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            24
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            25
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                       26
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   27
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        28
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              29
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             30
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             31
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                32
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                       33
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0   34
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       35
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    41
-
-/*!
- * \name Packet Flex Reason Types.
- */
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               0
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  2
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  3
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   4
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     5
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               6
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      7
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   8
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           9
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      10
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      11
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           12
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      13
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            14
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        15
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            16
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        17
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST                         18
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      19
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      20
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      21
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      22
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      23
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      24
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      25
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      26
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED                 27
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              28
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  29
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    30
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          31
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              32
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            33
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT                      34
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                35
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED              36
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     37
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               38
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       39
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     40
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
-    {"CML_FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
-    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DST_FP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
-    {"EM_FT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
-    {"IFP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
-    {"IFP_METER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
-    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
-    {"IVXLT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
-    {"L2_DST_LOOKUP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
-    {"L2_DST_LOOKUP_MISS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
-    {"L2_SRC_STATIC_MOVE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
-    {"L3_DST_LOOKUP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
-    {"L3_DST_LOOKUP_MISS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
-    {"L3_HDR_ERROR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
-    {"L3_IIF_EQ_L3_OIF", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
-    {"L3_TTL_ERROR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
-    {"LEARN_CACHE_FULL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
-    {"MACSA_MULTICAST", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\
-    {"MATCHED_RULE_BIT_0", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
-    {"MATCHED_RULE_BIT_1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
-    {"MATCHED_RULE_BIT_2", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
-    {"MATCHED_RULE_BIT_3", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
-    {"MATCHED_RULE_BIT_4", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
-    {"MATCHED_RULE_BIT_5", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
-    {"MATCHED_RULE_BIT_6", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
-    {"MATCHED_RULE_BIT_7", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
-    {"MEMBERSHIP_CHECK_FAILED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
-    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
-    {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
-    {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
-    {"NO_COPY_TO_CPU", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
-    {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
-    {"PROTOCOL_PKT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
-    {"RESERVED_TRACE_BIT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\
-    {"SER_DROP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
-    {"SPANNING_TREE_CHECK_FAILED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
-    {"SVP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
-    {"TRACE_DOP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
-    {"URPF_CHECK_FAILED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
-    {"VFP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
-    {"flex reason count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
-
-#endif /* BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id_defs.h
deleted file mode 100644
index 8ac35a34969a..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id_defs.h
+++ /dev/null
@@ -1,405 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56880_a0_dna_4_11_4_0_sf_match_id_info.yml
- * for device bcm56880_a0 and variant dna_4_11_4_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-
-/*!
- * \brief Get the Match ID DataBase information.
- *
- * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
-*/
-extern bcmpkt_rxpmd_match_id_db_info_t *
-    bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db_info_get(void);
-
-/*!
- * \brief Get the Match ID Mapping information.
- *
- * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
-*/
-extern bcmpkt_rxpmd_match_id_map_info_t *
-    bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_map_info_get(void);
-
-/*!
-  \name RXPMD Match IDs
-*/
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE  1
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0  2
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  3
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  4
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  5
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  6
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  7
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  8
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  9
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  10
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  11
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  12
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  13
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  14
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  15
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  16
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  17
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  18
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  19
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  20
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  21
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  22
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  23
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA  24
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  25
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  26
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  27
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  28
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  29
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  30
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  31
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  32
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  33
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  34
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  35
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  36
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  37
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  38
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  39
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  40
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  41
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  42
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  43
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  44
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  45
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  46
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  47
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  48
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  49
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE  50
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0  51
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  52
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  53
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  54
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  55
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  56
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  57
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  58
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  59
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  60
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  61
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  62
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  63
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  64
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  65
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  66
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  67
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  68
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  69
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  70
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  71
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  72
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA  73
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  74
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  75
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  76
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  77
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  78
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  79
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  80
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  81
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  82
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  83
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  84
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  85
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  86
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  87
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  88
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  89
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  90
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  91
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  92
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  93
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  94
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  95
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  96
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  97
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  98
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  99
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  100
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  101
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  102
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  103
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  104
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  105
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  106
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  107
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  108
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  109
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  110
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  111
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  112
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  113
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  114
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  115
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  116
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  117
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  118
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  119
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  120
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  121
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  122
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  123
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  124
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE  125
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0  126
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  127
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  128
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  129
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  130
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  131
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  132
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  133
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  134
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  135
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  136
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  137
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  138
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  139
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  140
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  141
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  142
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  143
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  144
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  145
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  146
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  147
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA  148
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  149
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  150
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  151
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  152
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  153
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  154
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  155
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  156
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  157
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  158
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  159
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  160
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  161
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  162
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  163
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  164
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  165
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  166
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  167
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  168
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  169
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  170
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  171
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  172
-#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_COUNT  173
-
-#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \
-    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
-    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
-    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
-    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
-    {"rxpmd_match_id_count", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_COUNT}
-
-#endif /*! BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr.h
new file mode 100644
index 000000000000..30e952c73352
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr.h
@@ -0,0 +1,178 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_H
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T                      0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T                   1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T                      2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T                    3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T  4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T         5
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T         6
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T              7
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T        8
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T         9
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T                      10
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T                     11
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T                12
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T                     13
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T         14
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T                      15
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T               16
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T                  17
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T                 18
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T                  19
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T                      20
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T                 21
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T          22
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T               23
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T                     24
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T          25
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T          26
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T            27
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T            28
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T            29
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T               30
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T              31
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T             32
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T                     33
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T                    34
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T                     35
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T                     36
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T                       37
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T         38
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T         39
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T                 40
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T                  41
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T                  42
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T                     43
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T                   44
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T                      45
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T             46
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T                  47
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T                  48
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   49
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   50
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T                     51
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T                  52
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T                    53
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T             54
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T             55
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T             56
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T                 57
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T         58
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T         59
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T                      60
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T               61
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T               62
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T               63
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T                     64
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T                    65
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T                    66
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T                     67
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_T               68
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT    69
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T},\
+    {"authen_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T},\
+    {"bfd_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T},\
+    {"cntag_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T},\
+    {"cpu_composites_0_ifa_l2_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T},\
+    {"cpu_composites_0_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"dest_option_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T},\
+    {"erspan3_fixed_hdr_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"esp_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T},\
+    {"etag_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T},\
+    {"ethertype_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T},\
+    {"frag_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T},\
+    {"generic_loopback_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"gpe_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T},\
+    {"gre_chksum_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T},\
+    {"gre_key_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T},\
+    {"gre_rout_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T},\
+    {"gre_seq_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T},\
+    {"gre_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T},\
+    {"hg3_base_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T},\
+    {"hg3_extension_0_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T},\
+    {"hop_by_hop_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T},\
+    {"icmp_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T},\
+    {"ifa_flex_md_0_a_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T},\
+    {"ifa_flex_md_0_b_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T},\
+    {"ifa_flex_md_1_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T},\
+    {"ifa_flex_md_2_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T},\
+    {"ifa_flex_md_3_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T},\
+    {"ifa_header_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T},\
+    {"ifa_md_base_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T},\
+    {"ifa_metadata_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T},\
+    {"igmp_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T},\
+    {"ipfix_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"mpls_ach_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T},\
+    {"mpls_bv_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T},\
+    {"mpls_cw_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T},\
+    {"mpls_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T},\
+    {"p_1588_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T},\
+    {"pim_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T},\
+    {"prog_ext_hdr_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T},\
+    {"psamp_0_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T},\
+    {"psamp_1_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_3_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
+    {"rarp_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T},\
+    {"routing_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T},\
+    {"rspan_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T},\
+    {"sflow_shim_0_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T},\
+    {"sflow_shim_1_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T},\
+    {"sflow_shim_2_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T},\
+    {"snap_llc_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T},\
+    {"tcp_first_4bytes_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T},\
+    {"vntag_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T},\
+    {"vxlan_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T},\
+    {"wesp_t", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T},\
+    {"RXPMD_FLEX_T", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr_data.h
new file mode 100644
index 000000000000..2635fe090264
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr_data.h
@@ -0,0 +1,1324 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_DATA_H
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_OPERATION     2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name AUTHEN_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_DATA        0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_NEXT_HEADER 1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_RESERVED    3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_SEQ_NUM     4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_SPI         5
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT          6
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_DATA},\
+    {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_NEXT_HEADER},\
+    {"PAYLOAD_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
+    {"RESERVED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_RESERVED},\
+    {"SEQ_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_SPI},\
+    {"authen_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT}
+
+/*!
+ * \name BFD_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_AP            0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_BFD_LENGTH    1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_CPI           2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DEM           3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DESMINTXINTV  4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DETECTMULT    5
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DIAG          6
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FIN           7
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_MINECHORXINTV 8
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_MPT           9
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_MYDISCRIM     10
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_POLL          11
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_REQMINRXINTV  12
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_STA           13
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_URDISCRIM     14
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_VERSION       15
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT          16
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
+    {"AP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_AP},\
+    {"BFD_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_BFD_LENGTH},\
+    {"CPI", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_CPI},\
+    {"DEM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DEM},\
+    {"DESMINTXINTV", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DESMINTXINTV},\
+    {"DETECTMULT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DETECTMULT},\
+    {"DIAG", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_DIAG},\
+    {"FIN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FIN},\
+    {"MINECHORXINTV", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_MINECHORXINTV},\
+    {"MPT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_MPT},\
+    {"MYDISCRIM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_MYDISCRIM},\
+    {"POLL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_POLL},\
+    {"REQMINRXINTV", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_REQMINRXINTV},\
+    {"STA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_STA},\
+    {"URDISCRIM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_URDISCRIM},\
+    {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_VERSION},\
+    {"bfd_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT}
+
+/*!
+ * \name CNTAG_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_RPID 0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_TPID 1
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
+    {"RPID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_RPID},\
+    {"TPID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_TPID},\
+    {"cntag_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_IFA_L2_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT0 0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT1 1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT2 2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT3 3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT4 4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT5 5
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT6 6
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_MACDA     7
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_MACSA     8
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FID_COUNT          9
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_DMA_CONT6},\
+    {"MACDA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_MACDA},\
+    {"MACSA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_MACSA},\
+    {"cpu_composites_0_ifa_l2_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name DEST_OPTION_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_OPTION      2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT          3
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_OPTION},\
+    {"dest_option_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ESP_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_NEXT_HEADER 0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_PAD         1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_PAD_LEN     2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_SEQ_NUM     3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_SPI         4
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT          5
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
+    {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_NEXT_HEADER},\
+    {"PAD", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_PAD},\
+    {"PAD_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_PAD_LEN},\
+    {"SEQ_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_SPI},\
+    {"esp_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT}
+
+/*!
+ * \name ETAG_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_TAG  0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_TPID 1
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_TAG},\
+    {"TPID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_TPID},\
+    {"etag_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name FRAG_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FRAG_INFO   0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_ID          1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_NEXT_HEADER 2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_RESERVED    3
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT          4
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
+    {"FRAG_INFO", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FRAG_INFO},\
+    {"ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_ID},\
+    {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_NEXT_HEADER},\
+    {"RESERVED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_RESERVED},\
+    {"frag_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"RESERVED_2", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
+    {"SOURCE_SYSTEM_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
+
+/*!
+ * \name GPE_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FLAGS         0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_NEXT_PROTOCOL 1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED0     2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED1     3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_VNI           4
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT          5
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED0},\
+    {"RESERVED1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED1},\
+    {"VNI", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_VNI},\
+    {"gpe_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT}
+
+/*!
+ * \name GRE_CHKSUM_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_OFFSET   1
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
+    {"OFFSET", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_OFFSET},\
+    {"gre_chksum_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
+
+/*!
+ * \name GRE_KEY_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_KEY 0
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT          1
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
+    {"KEY", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_KEY},\
+    {"gre_key_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT}
+
+/*!
+ * \name GRE_ROUT_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_ROUTING 0
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT          1
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
+    {"ROUTING", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_ROUTING},\
+    {"gre_rout_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT}
+
+/*!
+ * \name GRE_SEQ_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_SEQUENCE 0
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT          1
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_SEQUENCE},\
+    {"gre_seq_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT}
+
+/*!
+ * \name GRE_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_C_R_K_S  0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_PROTOCOL 1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_RESERVED 2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_VERSION  3
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT          4
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
+    {"C_R_K_S", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_C_R_K_S},\
+    {"PROTOCOL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_PROTOCOL},\
+    {"RESERVED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_RESERVED},\
+    {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_VERSION},\
+    {"gre_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT}
+
+/*!
+ * \name HG3_BASE_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_CN                      0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_CNG                     1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_ENTROPY                 2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT         3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_HG3_RESERVED            4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_L3_ROUTED               5
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_MIRROR_COPY             6
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_RESERVED_ETYPE          7
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION      8
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE           10
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_TC                      11
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_VERSION                 12
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_FID_COUNT          13
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_CN},\
+    {"CNG", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_CNG},\
+    {"ENTROPY", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_ENTROPY},\
+    {"EXT_HDR_PRESENT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\
+    {"HG3_RESERVED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_HG3_RESERVED},\
+    {"L3_ROUTED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_L3_ROUTED},\
+    {"MIRROR_COPY", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_MIRROR_COPY},\
+    {"RESERVED_ETYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\
+    {"SYSTEM_DESTINATION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\
+    {"SYSTEM_DESTINATION_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\
+    {"SYSTEM_SOURCE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\
+    {"TC", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_TC},\
+    {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_VERSION},\
+    {"hg3_base_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_FID_COUNT}
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP          3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP        4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP        5
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+/*!
+ * \name HG3_EXTENSION_0_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB      0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB      1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF     2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FLAGS             3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_SVP               5
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT          6
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \
+    {"CLASS_ID_LSB", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\
+    {"CLASS_ID_MSB", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\
+    {"DVP_OR_L3_IIF", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\
+    {"FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\
+    {"FORWARDING_DOMAIN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\
+    {"SVP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_SVP},\
+    {"hg3_extension_0_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT}
+
+/*!
+ * \name HOP_BY_HOP_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_OPTION      2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_OPTION},\
+    {"hop_by_hop_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_CODE      1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_A_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL   0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \
+    {"FWD_HDR_TTL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\
+    {"LNS_DEVICE_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\
+    {"ifa_flex_md_0_a_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_B_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_CN               0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED       1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID         2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT          4
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\
+    {"PORT_SPEED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\
+    {"QUEUE_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\
+    {"RX_TIMESTAMP_SEC", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\
+    {"ifa_flex_md_0_b_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_1_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID       0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID      1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT          3
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PORT_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\
+    {"INGRESS_PORT_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\
+    {"RX_TIMESTAMP_NANOSEC", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\
+    {"ifa_flex_md_1_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_2_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT    1
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \
+    {"RESIDENCE_TIME_NANOSEC", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\
+    {"TX_QUEUE_BYTE_COUNT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\
+    {"ifa_flex_md_2_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_3_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \
+    {"MMU_STAT_0", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\
+    {"MMU_STAT_1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\
+    {"ifa_flex_md_3_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT}
+
+/*!
+ * \name IFA_HEADER_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FLAGS      0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_GNS        1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_VER        4
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FID_COUNT          5
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FLAGS},\
+    {"GNS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_GNS},\
+    {"MAX_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
+    {"NEXT_HDR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
+    {"VER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_VER},\
+    {"ifa_header_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FID_COUNT}
+
+/*!
+ * \name IFA_MD_BASE_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR            0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR           2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT          3
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"REQUEST_VECTOR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\
+    {"ifa_md_base_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_ACTION_VECTOR            0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_METADATA                 2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR           3
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_FID_COUNT          4
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"METADATA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_METADATA},\
+    {"REQUEST_VECTOR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\
+    {"ifa_metadata_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_FID_COUNT}
+
+/*!
+ * \name IGMP_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_CHECKSUM      0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_GROUP_ADDRESS 1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_IGMP_TYPE     2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_MAX_RESP_TIME 3
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT          4
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_CHECKSUM},\
+    {"GROUP_ADDRESS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_GROUP_ADDRESS},\
+    {"IGMP_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_IGMP_TYPE},\
+    {"MAX_RESP_TIME", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_MAX_RESP_TIME},\
+    {"igmp_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_DA                0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_ID                3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_OPTION            4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_SA                6
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_TOS               7
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_TTL               9
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_DA             0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_SA             5
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_MACDA 0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_MACSA 1
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name MPLS_ACH_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CW_TYPE      1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_RESERVED     2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_VERSION      3
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT          4
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
+    {"CHANNEL_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
+    {"CW_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CW_TYPE},\
+    {"RESERVED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_RESERVED},\
+    {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_VERSION},\
+    {"mpls_ach_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT}
+
+/*!
+ * \name MPLS_BV_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_VALUE 0
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT          1
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
+    {"VALUE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_VALUE},\
+    {"mpls_bv_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT}
+
+/*!
+ * \name MPLS_CW_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_CW_TYPE    0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_RESERVED   1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT          3
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
+    {"CW_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_CW_TYPE},\
+    {"RESERVED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_RESERVED},\
+    {"SEQ_NUMBER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
+    {"mpls_cw_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT}
+
+/*!
+ * \name MPLS_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_BOS   0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_EXP   1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_LABEL 2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_TTL   3
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT          4
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
+    {"BOS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_BOS},\
+    {"EXP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_EXP},\
+    {"LABEL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_LABEL},\
+    {"TTL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_TTL},\
+    {"mpls_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT}
+
+/*!
+ * \name P_1588_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_CNTRL          0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_CORRECTION     1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_DOMAIN_NB      2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FLAGS          3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_LENGTH     5
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_TYPE       6
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED1      7
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED2      8
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED3      9
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_SEQ_ID         10
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_SRCPORTID      11
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_TRANSPORTSPEC  12
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_VERSION        13
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT          14
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
+    {"CNTRL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_CNTRL},\
+    {"CORRECTION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_CORRECTION},\
+    {"DOMAIN_NB", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_DOMAIN_NB},\
+    {"FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FLAGS},\
+    {"LOGMSGINTERVAL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
+    {"MSG_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_LENGTH},\
+    {"MSG_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_TYPE},\
+    {"RESERVED1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED1},\
+    {"RESERVED2", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED2},\
+    {"RESERVED3", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED3},\
+    {"SEQ_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_SEQ_ID},\
+    {"SRCPORTID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_SRCPORTID},\
+    {"TRANSPORTSPEC", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_TRANSPORTSPEC},\
+    {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_VERSION},\
+    {"p_1588_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT}
+
+/*!
+ * \name PIM_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_0_1 0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_2_3 1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_4_5 2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_6_7 3
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_FID_COUNT          4
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT \
+    {"HDR_BYTES_0_1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_0_1},\
+    {"HDR_BYTES_2_3", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_2_3},\
+    {"HDR_BYTES_4_5", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_4_5},\
+    {"HDR_BYTES_6_7", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_HDR_BYTES_6_7},\
+    {"pim_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_FID_COUNT}
+
+/*!
+ * \name PROG_EXT_HDR_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_OPTION      2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_OPTION},\
+    {"prog_ext_hdr_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_0_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FLOWSET        0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_LENGTH         1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT          6
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
+    {"FLOWSET", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FLOWSET},\
+    {"LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_LENGTH},\
+    {"NEXT_HOP_INDEX", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
+    {"OBS_TIME_NS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
+    {"TEMPLATE_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
+    {"psamp_0_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_1_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_DLB_ID         0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EPOCH          2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_USER_META_DATA 5
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT          7
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
+    {"DLB_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_DLB_ID},\
+    {"EGRESS_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
+    {"EPOCH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EPOCH},\
+    {"INGRESS_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
+    {"SAMPLED_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_USER_META_DATA},\
+    {"VARIABLE_FLAG", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
+    {"psamp_1_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE               1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
+    {"DROP_REASON", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
+    {"MOD_STATE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE},\
+    {"RESERVED_0", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
+    {"UC_COS__COLOR__PROB_IDX", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
+    {"USER_META_DATA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_3_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_OPERATION     2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name ROUTING_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_DATA          0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_NEXT_HEADER   2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_ROUTING_TYPE  3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT          5
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_DATA},\
+    {"HDR_EXT_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
+    {"routing_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name RSPAN_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_TAG  0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_TPID 1
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_TAG},\
+    {"TPID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_TPID},\
+    {"rspan_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_0_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
+    {"SYS_DESTINATION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
+    {"SYS_SOURCE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
+    {"VERSION", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
+    {"sflow_shim_0_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_1_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
+    {"FLAG_DEST_SAMPLE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
+    {"FLAG_DISCARDED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
+    {"FLAG_FLEX_SAMPLE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
+    {"FLAG_MCAST", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
+    {"FLAG_SRC_SAMPLE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
+    {"FLAG_TRUNCATED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
+    {"RESERVED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
+    {"SYS_OPCODE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
+    {"sflow_shim_1_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_2_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
+    {"USER_META_DATA", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
+    {"sflow_shim_2_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
+
+/*!
+ * \name SNAP_LLC_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_LENGTH   0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
+    {"LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_LENGTH},\
+    {"SNAP_LLC", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
+    {"snap_llc_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"unknown_l5_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_CFI  0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_PCP  1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_TPID 2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_VID  3
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VNTAG_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_TAG  0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_TPID 1
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_TAG},\
+    {"TPID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_TPID},\
+    {"vntag_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT}
+
+/*!
+ * \name WESP_T field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FLAGS       0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_HEADER_LEN  1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_NEXT_HEADER 2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_SEQ_NUM     3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_SPI         4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_TRAILER_LEN 5
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_WESP_IV     6
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT          7
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FLAGS},\
+    {"HEADER_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_HEADER_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_NEXT_HEADER},\
+    {"SEQ_NUM", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_SPI},\
+    {"TRAILER_LEN", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_TRAILER_LEN},\
+    {"WESP_IV", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_WESP_IV},\
+    {"wesp_t fid count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT}
+
+
+#endif /* BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 000000000000..a869f77fbca5
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,163 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DVP_15_0                                       2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0        4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         5
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         6
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0                        7
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       8
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              9
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                        10
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      11
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0                             12
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                            13
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 14
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    15
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    16
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    17
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    18
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    19
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  20
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0                     21
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              22
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              23
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            24
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            25
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_15_0                                       26
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   27
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        28
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              29
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             30
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             31
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                32
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VFI_15_0                                       33
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0   34
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_FID_COUNT                       35
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_COUNT                    41
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               0
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  2
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  3
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   4
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP                                     5
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               6
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      7
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   8
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           9
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      10
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      11
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           12
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      13
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            14
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        15
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            16
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        17
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    18
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      19
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      20
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      21
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      22
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      23
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      24
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      25
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      26
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD            27
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              28
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  29
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    30
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          31
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              32
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            33
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT                      34
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                35
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         36
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP                                     37
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               38
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       39
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP                                     40
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CML_FLAGS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DST_FP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
+    {"EM_FT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"IFP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
+    {"IVXLT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_STATIC_MOVE", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_IIF_EQ_L3_OIF", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
+    {"L3_TTL_ERROR", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST_RSVD", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
+    {"MATCHED_RULE_BIT_0", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
+    {"MATCHED_RULE_BIT_1", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
+    {"MATCHED_RULE_BIT_2", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
+    {"MATCHED_RULE_BIT_3", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
+    {"MATCHED_RULE_BIT_4", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
+    {"MATCHED_RULE_BIT_5", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
+    {"MATCHED_RULE_BIT_6", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
+    {"MATCHED_RULE_BIT_7", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
+    {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\
+    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
+    {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
+    {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
+    {"NO_COPY_TO_CPU", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"RESERVED_TRACE_BIT", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\
+    {"SER_DROP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
+    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
+    {"SVP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP},\
+    {"TRACE_DOP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"URPF_CHECK_FAILED", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
+    {"VFP", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 000000000000..af0fc82d32a0
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,407 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56880_a0_dna_6_5_30_1_1_sf_match_id_info.yml
+ * for device bcm56880_a0 and variant dna_6_5_30_1_1.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE  1
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0  2
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  3
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  4
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  5
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  6
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  7
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  8
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  9
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  10
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  11
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  12
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  13
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  14
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  15
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  16
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  17
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  18
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  19
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  20
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  21
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  22
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  23
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA  24
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  25
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  26
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  27
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  28
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  29
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  30
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  31
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  32
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  33
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  34
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  35
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  36
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  37
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  38
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  39
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  40
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  41
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  42
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  43
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  44
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  45
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  46
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  47
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  48
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  49
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE  50
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0  51
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  52
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  53
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  54
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  55
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  56
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  57
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  58
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  59
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  60
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  61
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  62
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  63
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  64
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  65
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  66
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  67
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  68
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  69
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  70
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  71
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  72
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA  73
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  74
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  75
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  76
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  77
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  78
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  79
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  80
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  81
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  82
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  83
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  84
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  85
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  86
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  87
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  88
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  89
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  90
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  91
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  92
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  93
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  94
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  95
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  96
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  97
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  98
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  99
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  100
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  101
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  102
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  103
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  104
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  105
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  106
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  107
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  108
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  109
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  110
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  111
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA  112
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  113
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  114
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  115
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  116
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  117
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  118
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  119
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  120
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  121
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  122
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  123
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  124
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  125
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE  126
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0  127
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  128
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  129
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  130
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  131
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  132
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  133
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  134
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  135
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  136
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  137
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  138
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  139
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  140
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  141
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  142
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  143
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  144
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  145
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  146
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  147
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  148
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA  149
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  150
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  151
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  152
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  153
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  154
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  155
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  156
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  157
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  158
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  159
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  160
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  161
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  162
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  163
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  164
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  165
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  166
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  167
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  168
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  169
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  170
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  171
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  172
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  173
+#define BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_COUNT  174
+
+#define BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr.h
deleted file mode 100644
index 1dac0a9d3359..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr.h
+++ /dev/null
@@ -1,170 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_H
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_H
-
-#include <bcmpkt/bcmpkt_flexhdr_internal.h>
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T                      0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T                   1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T                      2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T                    3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T         4
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T         5
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T              6
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T        7
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T         8
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T                      9
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T                     10
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T                11
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T                     12
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T         13
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T                      14
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T               15
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T                  16
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T                 17
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T                  18
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T                      19
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T               20
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T                     21
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T          22
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T          23
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T            24
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T            25
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T            26
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T               27
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T              28
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T             29
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T                     30
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T                    31
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T                     32
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T                     33
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T                       34
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T         35
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T         36
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T                 37
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T                  38
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T                  39
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T                     40
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T                   41
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T             42
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T                  43
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T                  44
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   45
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   46
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T                     47
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T                  48
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T                    49
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T             50
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T             51
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T             52
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T                 53
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T         54
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T         55
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T                      56
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T               57
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T               58
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T               59
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T                     60
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T                    61
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T                    62
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T                     63
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_T               64
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_COUNT    65
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_NAME_MAP_INIT \
-    {"arp_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T},\
-    {"authen_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T},\
-    {"bfd_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T},\
-    {"cntag_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T},\
-    {"cpu_composites_0_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T},\
-    {"cpu_composites_1_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T},\
-    {"dest_option_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T},\
-    {"erspan3_fixed_hdr_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T},\
-    {"erspan3_subhdr_5_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T},\
-    {"esp_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T},\
-    {"etag_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T},\
-    {"ethertype_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T},\
-    {"frag_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T},\
-    {"generic_loopback_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T},\
-    {"gpe_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T},\
-    {"gre_chksum_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T},\
-    {"gre_key_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T},\
-    {"gre_rout_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T},\
-    {"gre_seq_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T},\
-    {"gre_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T},\
-    {"hop_by_hop_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T},\
-    {"icmp_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T},\
-    {"ifa_flex_md_0_a_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T},\
-    {"ifa_flex_md_0_b_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T},\
-    {"ifa_flex_md_1_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T},\
-    {"ifa_flex_md_2_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T},\
-    {"ifa_flex_md_3_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T},\
-    {"ifa_header_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T},\
-    {"ifa_md_base_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T},\
-    {"ifa_metadata_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T},\
-    {"igmp_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T},\
-    {"ipfix_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T},\
-    {"ipv4_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T},\
-    {"ipv6_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T},\
-    {"l2_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T},\
-    {"mirror_erspan_sn_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T},\
-    {"mirror_transport_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T},\
-    {"mpls_ach_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T},\
-    {"mpls_bv_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T},\
-    {"mpls_cw_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T},\
-    {"mpls_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T},\
-    {"p_1588_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T},\
-    {"prog_ext_hdr_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T},\
-    {"psamp_0_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T},\
-    {"psamp_1_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T},\
-    {"psamp_mirror_on_drop_0_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
-    {"psamp_mirror_on_drop_3_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
-    {"rarp_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T},\
-    {"routing_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T},\
-    {"rspan_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T},\
-    {"sflow_shim_0_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T},\
-    {"sflow_shim_1_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T},\
-    {"sflow_shim_2_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T},\
-    {"snap_llc_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T},\
-    {"tcp_first_4bytes_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T},\
-    {"tcp_last_16bytes_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T},\
-    {"udp_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T},\
-    {"unknown_l3_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T},\
-    {"unknown_l4_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T},\
-    {"unknown_l5_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T},\
-    {"vlan_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T},\
-    {"vntag_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T},\
-    {"vxlan_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T},\
-    {"wesp_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T},\
-    {"RXPMD_FLEX_T", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_T},\
-    {"flexhdr count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_COUNT}
-
-#endif /* BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr_data.h
deleted file mode 100644
index 3299293d7d47..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr_data.h
+++ /dev/null
@@ -1,1212 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_DATA_H
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_DATA_H
-
-/*!
- * \name ARP_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_HARDWARE_LEN  0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_HARDWARE_TYPE 1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_OPERATION     2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_PROT_ADDR_LEN 3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_PROTOCOL_TYPE 4
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_SENDER_HA     5
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_SENDER_IP     6
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_TARGET_HA     7
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_TARGET_IP     8
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_FID_COUNT          9
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_TARGET_IP},\
-    {"arp_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_FID_COUNT}
-
-/*!
- * \name AUTHEN_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_DATA        0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_NEXT_HEADER 1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_RESERVED    3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_SEQ_NUM     4
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_SPI         5
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_FID_COUNT          6
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_DATA},\
-    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_NEXT_HEADER},\
-    {"PAYLOAD_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
-    {"RESERVED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_RESERVED},\
-    {"SEQ_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_SEQ_NUM},\
-    {"SPI", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_SPI},\
-    {"authen_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_FID_COUNT}
-
-/*!
- * \name BFD_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_AP            0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_BFD_LENGTH    1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_CPI           2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DEM           3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DESMINTXINTV  4
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DETECTMULT    5
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DIAG          6
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FIN           7
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_MINECHORXINTV 8
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_MPT           9
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_MYDISCRIM     10
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_POLL          11
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_REQMINRXINTV  12
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_STA           13
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_URDISCRIM     14
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_VERSION       15
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FID_COUNT          16
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
-    {"AP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_AP},\
-    {"BFD_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_BFD_LENGTH},\
-    {"CPI", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_CPI},\
-    {"DEM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DEM},\
-    {"DESMINTXINTV", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DESMINTXINTV},\
-    {"DETECTMULT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DETECTMULT},\
-    {"DIAG", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DIAG},\
-    {"FIN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FIN},\
-    {"MINECHORXINTV", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_MINECHORXINTV},\
-    {"MPT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_MPT},\
-    {"MYDISCRIM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_MYDISCRIM},\
-    {"POLL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_POLL},\
-    {"REQMINRXINTV", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_REQMINRXINTV},\
-    {"STA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_STA},\
-    {"URDISCRIM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_URDISCRIM},\
-    {"VERSION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_VERSION},\
-    {"bfd_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FID_COUNT}
-
-/*!
- * \name CNTAG_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_RPID 0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_TPID 1
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
-    {"RPID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_RPID},\
-    {"TPID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_TPID},\
-    {"cntag_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_0_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT0", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
-    {"DMA_CONT1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
-    {"DMA_CONT2", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
-    {"DMA_CONT3", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
-    {"DMA_CONT4", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
-    {"DMA_CONT5", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
-    {"DMA_CONT6", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
-    {"cpu_composites_0_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_1_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT10", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
-    {"DMA_CONT11", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
-    {"DMA_CONT12", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
-    {"DMA_CONT13", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
-    {"DMA_CONT14", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
-    {"DMA_CONT15", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
-    {"DMA_CONT16", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
-    {"DMA_CONT17", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
-    {"DMA_CONT7", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
-    {"DMA_CONT8", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
-    {"DMA_CONT9", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
-    {"cpu_composites_1_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
-
-/*!
- * \name DEST_OPTION_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_OPTION      2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_FID_COUNT          3
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
-    {"OPTION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_OPTION},\
-    {"dest_option_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_FIXED_HDR_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
-    {"BSO", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
-    {"COS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
-    {"GBP_SID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
-    {"P_FT_HWID_D_GRA_O", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
-    {"SESSION_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
-    {"T", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
-    {"TIMESTAMP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
-    {"VER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
-    {"VLAN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
-    {"erspan3_fixed_hdr_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_SUBHDR_5_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
-    {"PLATFORM_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
-    {"PORT_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
-    {"SWITCH_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
-    {"TIMESTAMP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
-    {"erspan3_subhdr_5_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
-
-/*!
- * \name ESP_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_NEXT_HEADER 0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_PAD         1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_PAD_LEN     2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_SEQ_NUM     3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_SPI         4
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_FID_COUNT          5
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
-    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_NEXT_HEADER},\
-    {"PAD", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_PAD},\
-    {"PAD_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_PAD_LEN},\
-    {"SEQ_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_SEQ_NUM},\
-    {"SPI", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_SPI},\
-    {"esp_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_FID_COUNT}
-
-/*!
- * \name ETAG_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_TAG  0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_TPID 1
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_TAG},\
-    {"TPID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_TPID},\
-    {"etag_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_FID_COUNT}
-
-/*!
- * \name ETHERTYPE_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_TYPE 0
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_FID_COUNT          1
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
-    {"TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_TYPE},\
-    {"ethertype_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_FID_COUNT}
-
-/*!
- * \name FRAG_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FRAG_INFO   0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_ID          1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_NEXT_HEADER 2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_RESERVED    3
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FID_COUNT          4
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
-    {"FRAG_INFO", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FRAG_INFO},\
-    {"ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_ID},\
-    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_NEXT_HEADER},\
-    {"RESERVED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_RESERVED},\
-    {"frag_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FID_COUNT}
-
-/*!
- * \name GENERIC_LOOPBACK_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
-    {"DESTINATION_OBJ", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
-    {"DESTINATION_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
-    {"ENTROPY_OBJ", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
-    {"FLAGS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
-    {"HEADER_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
-    {"INPUT_PRIORITY", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
-    {"INTERFACE_CTRL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
-    {"INTERFACE_OBJ", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
-    {"PROCESSING_CTRL_0", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
-    {"PROCESSING_CTRL_1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
-    {"QOS_OBJ", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
-    {"RESERVED_1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
-    {"RESERVED_2", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
-    {"SOURCE_SYSTEM_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
-    {"START_BYTE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
-    {"generic_loopback_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
-
-/*!
- * \name GPE_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FLAGS         0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_NEXT_PROTOCOL 1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_RESERVED0     2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_RESERVED1     3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_VNI           4
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FID_COUNT          5
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FLAGS},\
-    {"NEXT_PROTOCOL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_NEXT_PROTOCOL},\
-    {"RESERVED0", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_RESERVED0},\
-    {"RESERVED1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_RESERVED1},\
-    {"VNI", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_VNI},\
-    {"gpe_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FID_COUNT}
-
-/*!
- * \name GRE_CHKSUM_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_OFFSET   1
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
-    {"OFFSET", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_OFFSET},\
-    {"gre_chksum_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
-
-/*!
- * \name GRE_KEY_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_KEY 0
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_FID_COUNT          1
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
-    {"KEY", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_KEY},\
-    {"gre_key_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_FID_COUNT}
-
-/*!
- * \name GRE_ROUT_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_ROUTING 0
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_FID_COUNT          1
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
-    {"ROUTING", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_ROUTING},\
-    {"gre_rout_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_FID_COUNT}
-
-/*!
- * \name GRE_SEQ_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_SEQUENCE 0
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_FID_COUNT          1
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_SEQUENCE},\
-    {"gre_seq_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_FID_COUNT}
-
-/*!
- * \name GRE_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_C_R_K_S  0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_PROTOCOL 1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_RESERVED 2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_VERSION  3
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_FID_COUNT          4
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
-    {"C_R_K_S", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_C_R_K_S},\
-    {"PROTOCOL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_PROTOCOL},\
-    {"RESERVED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_RESERVED},\
-    {"VERSION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_VERSION},\
-    {"gre_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_FID_COUNT}
-
-/*!
- * \name HOP_BY_HOP_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_OPTION      2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
-    {"OPTION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_OPTION},\
-    {"hop_by_hop_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
-
-/*!
- * \name ICMP_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_CHECKSUM  0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_CODE      1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_ICMP_TYPE 2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_FID_COUNT          3
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_CHECKSUM},\
-    {"CODE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_CODE},\
-    {"ICMP_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_ICMP_TYPE},\
-    {"icmp_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_0_A_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL   0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \
-    {"FWD_HDR_TTL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\
-    {"LNS_DEVICE_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\
-    {"ifa_flex_md_0_a_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_0_B_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_CN               0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED       1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID         2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT          4
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \
-    {"CN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\
-    {"PORT_SPEED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\
-    {"QUEUE_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\
-    {"RX_TIMESTAMP_SEC", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\
-    {"ifa_flex_md_0_b_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_1_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID       0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID      1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT          3
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PORT_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\
-    {"INGRESS_PORT_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\
-    {"RX_TIMESTAMP_NANOSEC", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\
-    {"ifa_flex_md_1_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_2_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT    1
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \
-    {"RESIDENCE_TIME_NANOSEC", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\
-    {"TX_QUEUE_BYTE_COUNT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\
-    {"ifa_flex_md_2_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_3_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \
-    {"MMU_STAT_0", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\
-    {"MMU_STAT_1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\
-    {"ifa_flex_md_3_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT}
-
-/*!
- * \name IFA_HEADER_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FLAGS      0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_GNS        1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_VER        4
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FID_COUNT          5
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FLAGS},\
-    {"GNS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_GNS},\
-    {"MAX_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
-    {"NEXT_HDR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
-    {"VER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_VER},\
-    {"ifa_header_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FID_COUNT}
-
-/*!
- * \name IFA_MD_BASE_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR            0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR           2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT          3
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \
-    {"ACTION_VECTOR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\
-    {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
-    {"REQUEST_VECTOR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\
-    {"ifa_md_base_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT}
-
-/*!
- * \name IFA_METADATA_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_ACTION_VECTOR            0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_METADATA                 2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR           3
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_FID_COUNT          4
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \
-    {"ACTION_VECTOR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\
-    {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\
-    {"METADATA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_METADATA},\
-    {"REQUEST_VECTOR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\
-    {"ifa_metadata_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_FID_COUNT}
-
-/*!
- * \name IGMP_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_CHECKSUM      0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_GROUP_ADDRESS 1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_IGMP_TYPE     2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_MAX_RESP_TIME 3
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_FID_COUNT          4
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_CHECKSUM},\
-    {"GROUP_ADDRESS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_GROUP_ADDRESS},\
-    {"IGMP_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_IGMP_TYPE},\
-    {"MAX_RESP_TIME", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_MAX_RESP_TIME},\
-    {"igmp_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_FID_COUNT}
-
-/*!
- * \name IPFIX_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_EXPORT_TIME   0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_LENGTH        1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_VERSION       4
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_FID_COUNT          5
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
-    {"EXPORT_TIME", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_EXPORT_TIME},\
-    {"LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_LENGTH},\
-    {"OBS_DOMAIN_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
-    {"SEQUENCE_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
-    {"VERSION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_VERSION},\
-    {"ipfix_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_FID_COUNT}
-
-/*!
- * \name IPV4_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_DA                0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_HDR_CHECKSUM      2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_ID                3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_OPTION            4
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_PROTOCOL          5
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_SA                6
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_TOS               7
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_TOTAL_LENGTH      8
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_TTL               9
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FID_COUNT          11
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_DA},\
-    {"FLAGS_FRAG_OFFSET", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
-    {"HDR_CHECKSUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_HDR_CHECKSUM},\
-    {"ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_ID},\
-    {"OPTION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_OPTION},\
-    {"PROTOCOL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_PROTOCOL},\
-    {"SA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_SA},\
-    {"TOS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_TOS},\
-    {"TOTAL_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_TOTAL_LENGTH},\
-    {"TTL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_TTL},\
-    {"VERSION_HDR_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
-    {"ipv4_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FID_COUNT}
-
-/*!
- * \name IPV6_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_DA             0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FLOW_LABEL     1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_HOP_LIMIT      2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_NEXT_HEADER    3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_SA             5
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_VERSION        7
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FID_COUNT          8
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_DA},\
-    {"FLOW_LABEL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FLOW_LABEL},\
-    {"HOP_LIMIT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_HOP_LIMIT},\
-    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_NEXT_HEADER},\
-    {"PAYLOAD_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
-    {"SA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_SA},\
-    {"TRAFFIC_CLASS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
-    {"VERSION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_VERSION},\
-    {"ipv6_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FID_COUNT}
-
-/*!
- * \name L2_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_MACDA 0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_MACSA 1
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
-    {"MACDA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_MACDA},\
-    {"MACSA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_MACSA},\
-    {"l2_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_FID_COUNT}
-
-/*!
- * \name MIRROR_ERSPAN_SN_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
-    {"SEQ_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
-    {"mirror_erspan_sn_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
-
-/*!
- * \name MIRROR_TRANSPORT_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
-    {"mirror_transport_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
-
-/*!
- * \name MPLS_ACH_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_CW_TYPE      1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_RESERVED     2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_VERSION      3
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_FID_COUNT          4
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
-    {"CHANNEL_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
-    {"CW_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_CW_TYPE},\
-    {"RESERVED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_RESERVED},\
-    {"VERSION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_VERSION},\
-    {"mpls_ach_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_FID_COUNT}
-
-/*!
- * \name MPLS_BV_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_VALUE 0
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_FID_COUNT          1
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
-    {"VALUE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_VALUE},\
-    {"mpls_bv_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_FID_COUNT}
-
-/*!
- * \name MPLS_CW_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_CW_TYPE    0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_RESERVED   1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_FID_COUNT          3
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
-    {"CW_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_CW_TYPE},\
-    {"RESERVED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_RESERVED},\
-    {"SEQ_NUMBER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
-    {"mpls_cw_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_FID_COUNT}
-
-/*!
- * \name MPLS_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_BOS   0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_EXP   1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_LABEL 2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_TTL   3
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_FID_COUNT          4
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
-    {"BOS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_BOS},\
-    {"EXP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_EXP},\
-    {"LABEL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_LABEL},\
-    {"TTL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_TTL},\
-    {"mpls_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_FID_COUNT}
-
-/*!
- * \name P_1588_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_CNTRL          0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_CORRECTION     1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_DOMAIN_NB      2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FLAGS          3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_MSG_LENGTH     5
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_MSG_TYPE       6
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_RESERVED1      7
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_RESERVED2      8
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_RESERVED3      9
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_SEQ_ID         10
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_SRCPORTID      11
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_TRANSPORTSPEC  12
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_VERSION        13
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FID_COUNT          14
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
-    {"CNTRL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_CNTRL},\
-    {"CORRECTION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_CORRECTION},\
-    {"DOMAIN_NB", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_DOMAIN_NB},\
-    {"FLAGS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FLAGS},\
-    {"LOGMSGINTERVAL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
-    {"MSG_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_MSG_LENGTH},\
-    {"MSG_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_MSG_TYPE},\
-    {"RESERVED1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_RESERVED1},\
-    {"RESERVED2", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_RESERVED2},\
-    {"RESERVED3", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_RESERVED3},\
-    {"SEQ_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_SEQ_ID},\
-    {"SRCPORTID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_SRCPORTID},\
-    {"TRANSPORTSPEC", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_TRANSPORTSPEC},\
-    {"VERSION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_VERSION},\
-    {"p_1588_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FID_COUNT}
-
-/*!
- * \name PROG_EXT_HDR_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_OPTION      2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
-    {"OPTION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_OPTION},\
-    {"prog_ext_hdr_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
-
-/*!
- * \name PSAMP_0_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FLOWSET        0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_LENGTH         1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FID_COUNT          6
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
-    {"FLOWSET", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FLOWSET},\
-    {"LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_LENGTH},\
-    {"NEXT_HOP_INDEX", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
-    {"OBS_TIME_NS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
-    {"TEMPLATE_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
-    {"psamp_0_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_1_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_DLB_ID         0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_EPOCH          2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_USER_META_DATA 5
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_FID_COUNT          7
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
-    {"DLB_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_DLB_ID},\
-    {"EGRESS_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
-    {"EPOCH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_EPOCH},\
-    {"INGRESS_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
-    {"SAMPLED_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_USER_META_DATA},\
-    {"VARIABLE_FLAG", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
-    {"psamp_1_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_MOD_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
-    {"INGRESS_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
-    {"LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
-    {"OBS_TIME_NS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
-    {"SWITCH_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
-    {"TEMPLATE_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
-    {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE               1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
-    {"DROP_REASON", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
-    {"MOD_STATE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE},\
-    {"RESERVED_0", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
-    {"SAMPLED_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
-    {"UC_COS__COLOR__PROB_IDX", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
-    {"USER_META_DATA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_3_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
-
-/*!
- * \name RARP_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_HARDWARE_LEN  0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_HARDWARE_TYPE 1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_OPERATION     2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_PROT_ADDR_LEN 3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_PROTOCOL_TYPE 4
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_SENDER_HA     5
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_SENDER_IP     6
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_TARGET_HA     7
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_TARGET_IP     8
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_FID_COUNT          9
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_TARGET_IP},\
-    {"rarp_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_FID_COUNT}
-
-/*!
- * \name ROUTING_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_DATA          0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_NEXT_HEADER   2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_ROUTING_TYPE  3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_FID_COUNT          5
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_DATA},\
-    {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_NEXT_HEADER},\
-    {"ROUTING_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_ROUTING_TYPE},\
-    {"SEGMENTS_LEFT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
-    {"routing_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_FID_COUNT}
-
-/*!
- * \name RSPAN_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_TAG  0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_TPID 1
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_TAG},\
-    {"TPID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_TPID},\
-    {"rspan_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_0_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
-    {"SYS_DESTINATION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
-    {"SYS_SOURCE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
-    {"VERSION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
-    {"sflow_shim_0_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_1_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
-    {"FLAG_DEST_SAMPLE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
-    {"FLAG_DISCARDED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
-    {"FLAG_FLEX_SAMPLE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
-    {"FLAG_MCAST", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
-    {"FLAG_SRC_SAMPLE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
-    {"FLAG_TRUNCATED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
-    {"RESERVED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
-    {"SYS_OPCODE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
-    {"sflow_shim_1_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_2_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
-    {"USER_META_DATA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
-    {"sflow_shim_2_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
-
-/*!
- * \name SNAP_LLC_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_LENGTH   0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
-    {"LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_LENGTH},\
-    {"SNAP_LLC", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
-    {"snap_llc_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_FID_COUNT}
-
-/*!
- * \name TCP_FIRST_4BYTES_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
-    {"DST_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
-    {"SRC_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
-    {"tcp_first_4bytes_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
-
-/*!
- * \name TCP_LAST_16BYTES_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
-    {"ACK_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
-    {"CHECKSUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
-    {"HDR_LEN_AND_FLAGS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
-    {"SEQ_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
-    {"URGENT_PTR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
-    {"WIN_SIZE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
-    {"tcp_last_16bytes_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
-
-/*!
- * \name UDP_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_CHECKSUM   0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_DST_PORT   1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_SRC_PORT   2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_UDP_LENGTH 3
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_FID_COUNT          4
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_CHECKSUM},\
-    {"DST_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_DST_PORT},\
-    {"SRC_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_SRC_PORT},\
-    {"UDP_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_UDP_LENGTH},\
-    {"udp_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L3_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
-    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
-    {"unknown_l3_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L4_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
-    {"unknown_l4_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L5_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
-    {"L5_BYTES_0_1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
-    {"L5_BYTES_2_3", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
-    {"L5_BYTES_4_7", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
-    {"unknown_l5_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
-
-/*!
- * \name VLAN_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_CFI  0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_PCP  1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_TPID 2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_VID  3
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_FID_COUNT          4
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
-    {"CFI", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_CFI},\
-    {"PCP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_PCP},\
-    {"TPID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_TPID},\
-    {"VID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_VID},\
-    {"vlan_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_FID_COUNT}
-
-/*!
- * \name VNTAG_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_TAG  0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_TPID 1
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_FID_COUNT          2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_TAG},\
-    {"TPID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_TPID},\
-    {"vntag_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_FID_COUNT}
-
-/*!
- * \name VXLAN_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_RESERVED2        1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_VN_ID            2
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FID_COUNT          3
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS_RESERVED_1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
-    {"RESERVED2", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_RESERVED2},\
-    {"VN_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_VN_ID},\
-    {"vxlan_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FID_COUNT}
-
-/*!
- * \name WESP_T field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FLAGS       0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_HEADER_LEN  1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_NEXT_HEADER 2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_SEQ_NUM     3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_SPI         4
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_TRAILER_LEN 5
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_WESP_IV     6
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FID_COUNT          7
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FLAGS},\
-    {"HEADER_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_HEADER_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_NEXT_HEADER},\
-    {"SEQ_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_SEQ_NUM},\
-    {"SPI", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_SPI},\
-    {"TRAILER_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_TRAILER_LEN},\
-    {"WESP_IV", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_WESP_IV},\
-    {"wesp_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FID_COUNT}
-
-
-#endif /* BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_flex_data.h
deleted file mode 100644
index 01bd4cf9a374..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_flex_data.h
+++ /dev/null
@@ -1,165 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DATA_H
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DATA_H
-
-/*!
- * \name RX flex metadata field IDs.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DVP_15_0                                       2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0        4
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         5
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         6
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0                        7
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       8
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              9
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                        10
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      11
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_3_0_3_0                      12
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_7_4_3_0                      13
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0                             14
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_ITAG_PRESERVE_15_0             15
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 16
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    17
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    18
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    19
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    20
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    21
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  22
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              23
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              24
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            25
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            26
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SVP_15_0                                       27
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   28
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        29
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              30
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             31
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             32
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                33
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_VFI_15_0                                       34
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_FID_COUNT                       35
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_COUNT                    42
-
-/*!
- * \name Packet Flex Reason Types.
- */
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE                         0
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               1
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  3
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  4
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   5
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP                                     6
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               7
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      8
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   9
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           10
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      11
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      12
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           13
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      14
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            15
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        16
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            17
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        18
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    19
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      20
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      21
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      22
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      23
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      24
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      25
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      26
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      27
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD            28
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              29
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  30
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    31
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          32
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              33
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            34
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT                      35
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                36
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         37
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SVP                                     38
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               39
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       40
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_VFP                                     41
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
-    {"CB_STATION_MOVE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\
-    {"CML_FLAGS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
-    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DST_FP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
-    {"EM_FT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
-    {"IFP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP},\
-    {"IFP_METER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
-    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
-    {"IVXLT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
-    {"L2_DST_LOOKUP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
-    {"L2_DST_LOOKUP_MISS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
-    {"L2_SRC_STATIC_MOVE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
-    {"L3_DST_LOOKUP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
-    {"L3_DST_LOOKUP_MISS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
-    {"L3_HDR_ERROR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
-    {"L3_IIF_EQ_L3_OIF", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
-    {"L3_TTL_ERROR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
-    {"LEARN_CACHE_FULL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
-    {"MACSA_MULTICAST_RSVD", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
-    {"MATCHED_RULE_BIT_0", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
-    {"MATCHED_RULE_BIT_1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
-    {"MATCHED_RULE_BIT_2", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
-    {"MATCHED_RULE_BIT_3", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
-    {"MATCHED_RULE_BIT_4", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
-    {"MATCHED_RULE_BIT_5", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
-    {"MATCHED_RULE_BIT_6", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
-    {"MATCHED_RULE_BIT_7", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
-    {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\
-    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
-    {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
-    {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
-    {"NO_COPY_TO_CPU", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
-    {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
-    {"PROTOCOL_PKT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
-    {"RESERVED_TRACE_BIT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\
-    {"SER_DROP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
-    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
-    {"SVP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SVP},\
-    {"TRACE_DOP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
-    {"URPF_CHECK_FAILED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
-    {"VFP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_VFP},\
-    {"flex reason count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_COUNT}
-
-#endif /* BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id_defs.h
deleted file mode 100644
index 3d9c0aa09afe..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id_defs.h
+++ /dev/null
@@ -1,395 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56880_a0_hna_6_5_29_2_2_sf_match_id_info.yml
- * for device bcm56880_a0 and variant hna_6_5_29_2_2.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-
-/*!
- * \brief Get the Match ID DataBase information.
- *
- * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
-*/
-extern bcmpkt_rxpmd_match_id_db_info_t *
-    bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db_info_get(void);
-
-/*!
- * \brief Get the Match ID Mapping information.
- *
- * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
-*/
-extern bcmpkt_rxpmd_match_id_map_info_t *
-    bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_map_info_get(void);
-
-/*!
-  \name RXPMD Match IDs
-*/
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  1
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  2
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  3
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  4
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  5
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  6
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  7
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  8
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  9
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  10
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  11
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  12
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  13
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  14
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  15
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  16
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  17
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  18
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  19
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  20
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  21
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA  22
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  23
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  24
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  25
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  26
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  27
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  28
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  29
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  30
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  31
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  32
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  33
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  34
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  35
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  36
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  37
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  38
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  39
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  40
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  41
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  42
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  43
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  44
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  45
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  46
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  47
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  48
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  49
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  50
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  51
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  52
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  53
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  54
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  55
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  56
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  57
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  58
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  59
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  60
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  61
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  62
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  63
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  64
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  65
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  66
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  67
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  68
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA  69
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  70
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  71
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  72
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  73
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  74
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  75
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  76
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  77
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  78
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  79
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  80
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  81
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  82
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  83
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  84
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  85
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  86
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  87
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  88
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  89
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  90
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  91
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  92
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  93
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  94
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  95
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  96
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  97
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  98
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  99
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  100
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  101
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  102
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  103
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  104
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  105
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  106
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  107
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA  108
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  109
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  110
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  111
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  112
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  113
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  114
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  115
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  116
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  117
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  118
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  119
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  120
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  121
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  122
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  123
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  124
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  125
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  126
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  127
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  128
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  129
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  130
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  131
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  132
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  133
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  134
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  135
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  136
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  137
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  138
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  139
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  140
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  141
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  142
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA  143
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  144
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  145
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  146
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  147
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  148
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  149
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  150
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  151
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  152
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  153
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  154
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  155
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  156
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  157
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  158
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  159
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  160
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  161
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  162
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  163
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  164
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  165
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  166
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  167
-#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_COUNT  168
-
-#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
-    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
-    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
-    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
-    {"rxpmd_match_id_count", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_COUNT}
-
-#endif /*! BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr.h
new file mode 100644
index 000000000000..1e4c749bfc14
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr.h
@@ -0,0 +1,170 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_H
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T                      0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T                   1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T                      2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T                    3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T         4
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T         5
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T              6
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T        7
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T         8
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T                      9
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T                     10
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T                11
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T                     12
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T         13
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T                      14
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T               15
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T                  16
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T                 17
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T                  18
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T                      19
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T               20
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T                     21
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T          22
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T          23
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T            24
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T            25
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T            26
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T               27
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T              28
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T             29
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T                     30
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T                    31
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T                     32
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T                     33
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T                       34
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T         35
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T         36
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T                 37
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T                  38
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T                  39
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T                     40
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T                   41
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T             42
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T                  43
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T                  44
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   45
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   46
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T                     47
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T                  48
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T                    49
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T             50
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T             51
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T             52
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T                 53
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T         54
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T         55
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T                      56
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T               57
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T               58
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T               59
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T                     60
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T                    61
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T                    62
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T                     63
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_T               64
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_COUNT    65
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T},\
+    {"authen_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T},\
+    {"bfd_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T},\
+    {"cntag_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T},\
+    {"cpu_composites_0_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"dest_option_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T},\
+    {"erspan3_fixed_hdr_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"esp_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T},\
+    {"etag_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T},\
+    {"ethertype_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T},\
+    {"frag_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T},\
+    {"generic_loopback_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"gpe_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T},\
+    {"gre_chksum_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T},\
+    {"gre_key_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T},\
+    {"gre_rout_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T},\
+    {"gre_seq_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T},\
+    {"gre_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T},\
+    {"hop_by_hop_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T},\
+    {"icmp_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T},\
+    {"ifa_flex_md_0_a_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T},\
+    {"ifa_flex_md_0_b_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T},\
+    {"ifa_flex_md_1_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T},\
+    {"ifa_flex_md_2_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T},\
+    {"ifa_flex_md_3_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T},\
+    {"ifa_header_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T},\
+    {"ifa_md_base_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T},\
+    {"ifa_metadata_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T},\
+    {"igmp_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T},\
+    {"ipfix_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"mpls_ach_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T},\
+    {"mpls_bv_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T},\
+    {"mpls_cw_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T},\
+    {"mpls_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T},\
+    {"p_1588_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T},\
+    {"prog_ext_hdr_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T},\
+    {"psamp_0_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T},\
+    {"psamp_1_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_3_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
+    {"rarp_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T},\
+    {"routing_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T},\
+    {"rspan_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T},\
+    {"sflow_shim_0_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T},\
+    {"sflow_shim_1_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T},\
+    {"sflow_shim_2_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T},\
+    {"snap_llc_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T},\
+    {"tcp_first_4bytes_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T},\
+    {"vntag_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T},\
+    {"vxlan_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T},\
+    {"wesp_t", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T},\
+    {"RXPMD_FLEX_T", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr_data.h
new file mode 100644
index 000000000000..6b5f4c667fcd
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr_data.h
@@ -0,0 +1,1212 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_DATA_H
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_OPERATION     2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name AUTHEN_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_DATA        0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_RESERVED    3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_SPI         5
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_FID_COUNT          6
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_DATA},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
+    {"PAYLOAD_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
+    {"RESERVED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_RESERVED},\
+    {"SEQ_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_SPI},\
+    {"authen_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_FID_COUNT}
+
+/*!
+ * \name BFD_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_AP            0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_BFD_LENGTH    1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_CPI           2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DEM           3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DESMINTXINTV  4
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DETECTMULT    5
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DIAG          6
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FIN           7
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_MINECHORXINTV 8
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_MPT           9
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_MYDISCRIM     10
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_POLL          11
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_REQMINRXINTV  12
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_STA           13
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_URDISCRIM     14
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_VERSION       15
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FID_COUNT          16
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
+    {"AP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_AP},\
+    {"BFD_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_BFD_LENGTH},\
+    {"CPI", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_CPI},\
+    {"DEM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DEM},\
+    {"DESMINTXINTV", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DESMINTXINTV},\
+    {"DETECTMULT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DETECTMULT},\
+    {"DIAG", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_DIAG},\
+    {"FIN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FIN},\
+    {"MINECHORXINTV", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_MINECHORXINTV},\
+    {"MPT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_MPT},\
+    {"MYDISCRIM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_MYDISCRIM},\
+    {"POLL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_POLL},\
+    {"REQMINRXINTV", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_REQMINRXINTV},\
+    {"STA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_STA},\
+    {"URDISCRIM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_URDISCRIM},\
+    {"VERSION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_VERSION},\
+    {"bfd_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FID_COUNT}
+
+/*!
+ * \name CNTAG_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_RPID 0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_TPID 1
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
+    {"RPID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_RPID},\
+    {"TPID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_TPID},\
+    {"cntag_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name DEST_OPTION_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_OPTION      2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_OPTION},\
+    {"dest_option_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ESP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_NEXT_HEADER 0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_PAD         1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_PAD_LEN     2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_SEQ_NUM     3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_SPI         4
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_FID_COUNT          5
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_NEXT_HEADER},\
+    {"PAD", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_PAD},\
+    {"PAD_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_PAD_LEN},\
+    {"SEQ_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_SPI},\
+    {"esp_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_FID_COUNT}
+
+/*!
+ * \name ETAG_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_TAG  0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_TPID 1
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_TAG},\
+    {"TPID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_TPID},\
+    {"etag_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name FRAG_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FRAG_INFO   0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_ID          1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_NEXT_HEADER 2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_RESERVED    3
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
+    {"FRAG_INFO", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FRAG_INFO},\
+    {"ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_ID},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_NEXT_HEADER},\
+    {"RESERVED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_RESERVED},\
+    {"frag_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         13
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_SVP                14
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"SOURCE_SYSTEM_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"SVP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_SVP},\
+    {"generic_loopback_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
+
+/*!
+ * \name GPE_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FLAGS         0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_RESERVED0     2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_RESERVED1     3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_VNI           4
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FID_COUNT          5
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_RESERVED0},\
+    {"RESERVED1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_RESERVED1},\
+    {"VNI", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_VNI},\
+    {"gpe_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FID_COUNT}
+
+/*!
+ * \name GRE_CHKSUM_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
+    {"OFFSET", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
+    {"gre_chksum_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
+
+/*!
+ * \name GRE_KEY_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_KEY 0
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
+    {"KEY", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_KEY},\
+    {"gre_key_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_FID_COUNT}
+
+/*!
+ * \name GRE_ROUT_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_ROUTING 0
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
+    {"ROUTING", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_ROUTING},\
+    {"gre_rout_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
+
+/*!
+ * \name GRE_SEQ_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
+    {"gre_seq_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
+
+/*!
+ * \name GRE_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_C_R_K_S  0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_PROTOCOL 1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_RESERVED 2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_VERSION  3
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
+    {"C_R_K_S", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_C_R_K_S},\
+    {"PROTOCOL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_PROTOCOL},\
+    {"RESERVED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_RESERVED},\
+    {"VERSION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_VERSION},\
+    {"gre_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_FID_COUNT}
+
+/*!
+ * \name HOP_BY_HOP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
+    {"hop_by_hop_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_CODE      1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_A_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL   0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \
+    {"FWD_HDR_TTL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\
+    {"LNS_DEVICE_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\
+    {"ifa_flex_md_0_a_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_B_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN               0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED       1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID         2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\
+    {"PORT_SPEED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\
+    {"QUEUE_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\
+    {"RX_TIMESTAMP_SEC", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\
+    {"ifa_flex_md_0_b_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_1_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID       0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID      1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PORT_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\
+    {"INGRESS_PORT_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\
+    {"RX_TIMESTAMP_NANOSEC", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\
+    {"ifa_flex_md_1_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_2_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT    1
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \
+    {"RESIDENCE_TIME_NANOSEC", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\
+    {"TX_QUEUE_BYTE_COUNT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\
+    {"ifa_flex_md_2_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_3_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \
+    {"MMU_STAT_0", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\
+    {"MMU_STAT_1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\
+    {"ifa_flex_md_3_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT}
+
+/*!
+ * \name IFA_HEADER_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FLAGS      0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_GNS        1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_VER        4
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT          5
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FLAGS},\
+    {"GNS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_GNS},\
+    {"MAX_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
+    {"NEXT_HDR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
+    {"VER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_VER},\
+    {"ifa_header_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT}
+
+/*!
+ * \name IFA_MD_BASE_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR            0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR           2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"REQUEST_VECTOR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\
+    {"ifa_md_base_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR            0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_METADATA                 2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR           3
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"METADATA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_METADATA},\
+    {"REQUEST_VECTOR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\
+    {"ifa_metadata_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT}
+
+/*!
+ * \name IGMP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_CHECKSUM      0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_IGMP_TYPE     2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_CHECKSUM},\
+    {"GROUP_ADDRESS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
+    {"IGMP_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_IGMP_TYPE},\
+    {"MAX_RESP_TIME", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
+    {"igmp_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_DA                0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_ID                3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_OPTION            4
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_SA                6
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_TOS               7
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_TTL               9
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_DA             0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_SA             5
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_MACDA 0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_MACSA 1
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name MPLS_ACH_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_RESERVED     2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_VERSION      3
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
+    {"CHANNEL_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
+    {"CW_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
+    {"RESERVED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_RESERVED},\
+    {"VERSION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_VERSION},\
+    {"mpls_ach_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
+
+/*!
+ * \name MPLS_BV_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_VALUE 0
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
+    {"VALUE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_VALUE},\
+    {"mpls_bv_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_FID_COUNT}
+
+/*!
+ * \name MPLS_CW_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_RESERVED   1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
+    {"CW_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
+    {"RESERVED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_RESERVED},\
+    {"SEQ_NUMBER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
+    {"mpls_cw_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_FID_COUNT}
+
+/*!
+ * \name MPLS_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_BOS   0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_EXP   1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_LABEL 2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_TTL   3
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
+    {"BOS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_BOS},\
+    {"EXP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_EXP},\
+    {"LABEL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_LABEL},\
+    {"TTL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_TTL},\
+    {"mpls_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_FID_COUNT}
+
+/*!
+ * \name P_1588_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_CNTRL          0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_CORRECTION     1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_DOMAIN_NB      2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FLAGS          3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_MSG_LENGTH     5
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_MSG_TYPE       6
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_RESERVED1      7
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_RESERVED2      8
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_RESERVED3      9
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_SEQ_ID         10
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_SRCPORTID      11
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_VERSION        13
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FID_COUNT          14
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
+    {"CNTRL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_CNTRL},\
+    {"CORRECTION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_CORRECTION},\
+    {"DOMAIN_NB", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_DOMAIN_NB},\
+    {"FLAGS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FLAGS},\
+    {"LOGMSGINTERVAL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
+    {"MSG_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_MSG_LENGTH},\
+    {"MSG_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_MSG_TYPE},\
+    {"RESERVED1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_RESERVED1},\
+    {"RESERVED2", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_RESERVED2},\
+    {"RESERVED3", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_RESERVED3},\
+    {"SEQ_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_SEQ_ID},\
+    {"SRCPORTID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_SRCPORTID},\
+    {"TRANSPORTSPEC", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
+    {"VERSION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_VERSION},\
+    {"p_1588_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FID_COUNT}
+
+/*!
+ * \name PROG_EXT_HDR_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
+    {"prog_ext_hdr_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_0_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FLOWSET        0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_LENGTH         1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
+    {"FLOWSET", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FLOWSET},\
+    {"LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_LENGTH},\
+    {"NEXT_HOP_INDEX", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
+    {"OBS_TIME_NS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
+    {"TEMPLATE_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
+    {"psamp_0_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_1_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_DLB_ID         0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_EPOCH          2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
+    {"DLB_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_DLB_ID},\
+    {"EGRESS_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
+    {"EPOCH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_EPOCH},\
+    {"INGRESS_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
+    {"SAMPLED_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
+    {"VARIABLE_FLAG", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
+    {"psamp_1_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE               1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
+    {"DROP_REASON", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
+    {"MOD_STATE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE},\
+    {"RESERVED_0", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
+    {"UC_COS__COLOR__PROB_IDX", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
+    {"USER_META_DATA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_3_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_OPERATION     2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name ROUTING_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_DATA          0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_FID_COUNT          5
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_DATA},\
+    {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
+    {"routing_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name RSPAN_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_TAG  0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_TPID 1
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_TAG},\
+    {"TPID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_TPID},\
+    {"rspan_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_0_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
+    {"SYS_DESTINATION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
+    {"SYS_SOURCE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
+    {"VERSION", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
+    {"sflow_shim_0_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_1_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
+    {"FLAG_DEST_SAMPLE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
+    {"FLAG_DISCARDED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
+    {"FLAG_FLEX_SAMPLE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
+    {"FLAG_MCAST", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
+    {"FLAG_SRC_SAMPLE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
+    {"FLAG_TRUNCATED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
+    {"RESERVED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
+    {"SYS_OPCODE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
+    {"sflow_shim_1_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_2_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
+    {"USER_META_DATA", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
+    {"sflow_shim_2_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
+
+/*!
+ * \name SNAP_LLC_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_LENGTH   0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
+    {"LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_LENGTH},\
+    {"SNAP_LLC", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
+    {"snap_llc_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"unknown_l5_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_CFI  0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_PCP  1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_TPID 2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_VID  3
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VNTAG_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_TAG  0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_TPID 1
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_TAG},\
+    {"TPID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_TPID},\
+    {"vntag_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FID_COUNT}
+
+/*!
+ * \name WESP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FLAGS       0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_HEADER_LEN  1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_NEXT_HEADER 2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_SEQ_NUM     3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_SPI         4
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_TRAILER_LEN 5
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_WESP_IV     6
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FID_COUNT          7
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FLAGS},\
+    {"HEADER_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_HEADER_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_NEXT_HEADER},\
+    {"SEQ_NUM", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_SPI},\
+    {"TRAILER_LEN", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_TRAILER_LEN},\
+    {"WESP_IV", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_WESP_IV},\
+    {"wesp_t fid count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FID_COUNT}
+
+
+#endif /* BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 000000000000..d986e9c3dc94
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,165 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                       2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0        4
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         5
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         6
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0                        7
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       8
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              9
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                        10
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      11
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_3_0_3_0                      12
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_7_4_3_0                      13
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0                             14
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_ITAG_PRESERVE_15_0             15
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 16
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    17
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    18
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    19
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    20
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    21
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  22
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              23
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              24
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            25
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            26
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                       27
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   28
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        29
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              30
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             31
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             32
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                33
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                       34
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       35
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    42
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE                         0
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               1
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  3
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  4
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   5
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     6
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               7
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      8
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   9
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           10
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      11
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      12
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           13
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      14
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            15
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        16
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            17
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        18
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    19
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      20
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      21
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      22
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      23
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      24
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      25
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      26
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      27
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD            28
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              29
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  30
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    31
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          32
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              33
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            34
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT                      35
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                36
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         37
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     38
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               39
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       40
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     41
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CB_STATION_MOVE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\
+    {"CML_FLAGS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DST_FP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
+    {"EM_FT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"IFP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
+    {"IVXLT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_STATIC_MOVE", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_IIF_EQ_L3_OIF", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
+    {"L3_TTL_ERROR", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST_RSVD", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
+    {"MATCHED_RULE_BIT_0", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
+    {"MATCHED_RULE_BIT_1", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
+    {"MATCHED_RULE_BIT_2", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
+    {"MATCHED_RULE_BIT_3", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
+    {"MATCHED_RULE_BIT_4", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
+    {"MATCHED_RULE_BIT_5", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
+    {"MATCHED_RULE_BIT_6", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
+    {"MATCHED_RULE_BIT_7", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
+    {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\
+    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
+    {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
+    {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
+    {"NO_COPY_TO_CPU", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"RESERVED_TRACE_BIT", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\
+    {"SER_DROP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
+    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
+    {"SVP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
+    {"TRACE_DOP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"URPF_CHECK_FAILED", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
+    {"VFP", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 000000000000..a0ee1dc92c9d
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,395 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56880_a0_hna_6_5_30_3_0_sf_match_id_info.yml
+ * for device bcm56880_a0 and variant hna_6_5_30_3_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  1
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  2
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  3
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  4
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  5
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  6
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  7
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  8
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  9
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  10
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  11
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  12
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  13
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  14
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  15
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  16
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  17
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  18
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  19
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  20
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  21
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA  22
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  23
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  24
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  25
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  26
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  27
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  28
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  29
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  30
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  31
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  32
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  33
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  34
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  35
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  36
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  37
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  38
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  39
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  40
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  41
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  42
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  43
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  44
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  45
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  46
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  47
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  48
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  49
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  50
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  51
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  52
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  53
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  54
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  55
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  56
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  57
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  58
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  59
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  60
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  61
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  62
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  63
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  64
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  65
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  66
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  67
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  68
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA  69
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  70
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  71
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  72
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  73
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  74
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  75
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  76
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  77
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  78
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  79
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  80
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  81
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  82
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  83
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  84
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  85
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  86
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  87
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  88
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  89
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  90
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  91
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  92
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  93
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  94
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  95
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  96
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  97
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  98
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  99
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  100
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  101
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  102
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  103
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  104
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  105
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  106
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  107
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA  108
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  109
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  110
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  111
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  112
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  113
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  114
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  115
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  116
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  117
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  118
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  119
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  120
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  121
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  122
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  123
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  124
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  125
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  126
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  127
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  128
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  129
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  130
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  131
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  132
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  133
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  134
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  135
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  136
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  137
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  138
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  139
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  140
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  141
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  142
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA  143
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  144
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  145
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  146
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  147
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  148
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  149
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  150
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  151
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  152
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  153
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  154
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  155
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  156
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  157
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  158
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  159
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  160
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  161
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  162
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  163
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  164
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  165
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  166
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  167
+#define BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_COUNT  168
+
+#define BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr.h
deleted file mode 100644
index c202e1e757e8..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr.h
+++ /dev/null
@@ -1,158 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_H
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_H
-
-#include <bcmpkt/bcmpkt_flexhdr_internal.h>
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T                         0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T                      1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T                         2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T            3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T            4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T                 5
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T           6
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T            7
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T                         8
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T                        9
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T                   10
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T                        11
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T            12
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T                         13
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T                  14
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T                     15
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T                    16
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T                     17
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T                         18
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T                  19
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T                   20
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T                  21
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T                        22
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T                        23
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T                       24
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T                        25
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T                        26
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T                          27
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T            28
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T            29
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T                    30
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T                     31
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T                     32
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T                        33
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T                   34
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T                      35
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T                36
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T                     37
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T                     38
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T      39
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T      40
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T                        41
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T                     42
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T                       43
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T                44
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T                45
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T                46
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T                    47
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T            48
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T            49
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T                         50
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T                  51
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T                  52
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T                  53
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T                        54
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T                       55
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T                       56
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T                        57
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_T                  58
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_COUNT    59
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
-    {"arp_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T},\
-    {"authen_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T},\
-    {"bfd_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T},\
-    {"cpu_composites_0_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T},\
-    {"cpu_composites_1_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T},\
-    {"dest_option_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T},\
-    {"erspan3_fixed_hdr_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
-    {"erspan3_subhdr_5_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
-    {"esp_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T},\
-    {"etag_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T},\
-    {"ethertype_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T},\
-    {"frag_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T},\
-    {"generic_loopback_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T},\
-    {"gpe_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T},\
-    {"gre_chksum_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T},\
-    {"gre_key_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T},\
-    {"gre_rout_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T},\
-    {"gre_seq_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T},\
-    {"gre_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T},\
-    {"gtp_12byte_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T},\
-    {"gtp_8byte_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T},\
-    {"hop_by_hop_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T},\
-    {"icmp_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T},\
-    {"igmp_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T},\
-    {"ipfix_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T},\
-    {"ipv4_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T},\
-    {"ipv6_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T},\
-    {"l2_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T},\
-    {"mirror_erspan_sn_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
-    {"mirror_transport_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T},\
-    {"mpls_ach_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T},\
-    {"mpls_bv_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T},\
-    {"mpls_cw_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T},\
-    {"mpls_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T},\
-    {"opaquetag_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T},\
-    {"p_1588_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T},\
-    {"prog_ext_hdr_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T},\
-    {"psamp_0_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T},\
-    {"psamp_1_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T},\
-    {"psamp_mirror_on_drop_0_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
-    {"psamp_mirror_on_drop_1_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\
-    {"rarp_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T},\
-    {"routing_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T},\
-    {"rspan_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T},\
-    {"sflow_shim_0_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T},\
-    {"sflow_shim_1_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T},\
-    {"sflow_shim_2_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T},\
-    {"snap_llc_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T},\
-    {"tcp_first_4bytes_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T},\
-    {"tcp_last_16bytes_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T},\
-    {"udp_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T},\
-    {"unknown_l3_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T},\
-    {"unknown_l4_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T},\
-    {"unknown_l5_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T},\
-    {"vlan_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T},\
-    {"vntag_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T},\
-    {"vxlan_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T},\
-    {"wesp_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T},\
-    {"RXPMD_FLEX_T", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_T},\
-    {"flexhdr count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_COUNT}
-
-#endif /* BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr_data.h
deleted file mode 100644
index f69e4f64c26d..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr_data.h
+++ /dev/null
@@ -1,1126 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_DATA_H
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_DATA_H
-
-/*!
- * \name ARP_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_HARDWARE_LEN  0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_OPERATION     2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_SENDER_HA     5
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_SENDER_IP     6
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_TARGET_HA     7
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_TARGET_IP     8
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_FID_COUNT          9
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_TARGET_IP},\
-    {"arp_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_FID_COUNT}
-
-/*!
- * \name AUTHEN_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_DATA        0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_RESERVED    3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_SPI         5
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_FID_COUNT          6
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_DATA},\
-    {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
-    {"PAYLOAD_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
-    {"RESERVED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_RESERVED},\
-    {"SEQ_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
-    {"SPI", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_SPI},\
-    {"authen_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_FID_COUNT}
-
-/*!
- * \name BFD_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_AP            0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_BFD_LENGTH    1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_CPI           2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DEM           3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DESMINTXINTV  4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DETECTMULT    5
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DIAG          6
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FIN           7
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_MINECHORXINTV 8
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_MPT           9
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_MYDISCRIM     10
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_POLL          11
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_REQMINRXINTV  12
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_STA           13
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_URDISCRIM     14
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_VERSION       15
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FID_COUNT          16
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
-    {"AP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_AP},\
-    {"BFD_LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_BFD_LENGTH},\
-    {"CPI", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_CPI},\
-    {"DEM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DEM},\
-    {"DESMINTXINTV", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DESMINTXINTV},\
-    {"DETECTMULT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DETECTMULT},\
-    {"DIAG", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DIAG},\
-    {"FIN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FIN},\
-    {"MINECHORXINTV", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_MINECHORXINTV},\
-    {"MPT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_MPT},\
-    {"MYDISCRIM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_MYDISCRIM},\
-    {"POLL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_POLL},\
-    {"REQMINRXINTV", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_REQMINRXINTV},\
-    {"STA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_STA},\
-    {"URDISCRIM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_URDISCRIM},\
-    {"VERSION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_VERSION},\
-    {"bfd_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_0_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT0", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
-    {"DMA_CONT1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
-    {"DMA_CONT2", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
-    {"DMA_CONT3", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
-    {"DMA_CONT4", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
-    {"DMA_CONT5", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
-    {"DMA_CONT6", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
-    {"cpu_composites_0_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_1_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT10", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
-    {"DMA_CONT11", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
-    {"DMA_CONT12", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
-    {"DMA_CONT13", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
-    {"DMA_CONT14", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
-    {"DMA_CONT15", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
-    {"DMA_CONT16", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
-    {"DMA_CONT17", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
-    {"DMA_CONT7", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
-    {"DMA_CONT8", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
-    {"DMA_CONT9", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
-    {"cpu_composites_1_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
-
-/*!
- * \name DEST_OPTION_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_OPTION      2
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
-    {"OPTION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_OPTION},\
-    {"dest_option_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_FIXED_HDR_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
-    {"BSO", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
-    {"COS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
-    {"GBP_SID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
-    {"P_FT_HWID_D_GRA_O", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
-    {"SESSION_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
-    {"T", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
-    {"TIMESTAMP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
-    {"VER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
-    {"VLAN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
-    {"erspan3_fixed_hdr_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_SUBHDR_5_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
-    {"PLATFORM_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
-    {"PORT_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
-    {"SWITCH_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
-    {"TIMESTAMP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
-    {"erspan3_subhdr_5_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
-
-/*!
- * \name ESP_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_NEXT_HEADER 0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_PAD         1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_PAD_LEN     2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_SEQ_NUM     3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_SPI         4
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_FID_COUNT          5
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
-    {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_NEXT_HEADER},\
-    {"PAD", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_PAD},\
-    {"PAD_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_PAD_LEN},\
-    {"SEQ_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_SEQ_NUM},\
-    {"SPI", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_SPI},\
-    {"esp_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_FID_COUNT}
-
-/*!
- * \name ETAG_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_PCP_DEI 0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_RSRVD0  1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_RSRVD1  2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_SVID    3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_TPID    4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_VID     5
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_FID_COUNT          6
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
-    {"PCP_DEI", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_PCP_DEI},\
-    {"RSRVD0", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_RSRVD0},\
-    {"RSRVD1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_RSRVD1},\
-    {"SVID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_SVID},\
-    {"TPID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_TPID},\
-    {"VID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_VID},\
-    {"etag_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_FID_COUNT}
-
-/*!
- * \name ETHERTYPE_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_TYPE 0
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
-    {"TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_TYPE},\
-    {"ethertype_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
-
-/*!
- * \name FRAG_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FRAG_INFO   0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_ID          1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_NEXT_HEADER 2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_RESERVED    3
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FID_COUNT          4
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
-    {"FRAG_INFO", BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FRAG_INFO},\
-    {"ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_ID},\
-    {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_NEXT_HEADER},\
-    {"RESERVED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_RESERVED},\
-    {"frag_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FID_COUNT}
-
-/*!
- * \name GENERIC_LOOPBACK_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
-    {"DESTINATION_OBJ", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
-    {"DESTINATION_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
-    {"ENTROPY_OBJ", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
-    {"FLAGS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
-    {"HEADER_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
-    {"INPUT_PRIORITY", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
-    {"INTERFACE_CTRL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
-    {"INTERFACE_OBJ", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
-    {"PROCESSING_CTRL_0", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
-    {"PROCESSING_CTRL_1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
-    {"QOS_OBJ", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
-    {"RESERVED_1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
-    {"RESERVED_2", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
-    {"SOURCE_SYSTEM_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
-    {"START_BYTE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
-    {"generic_loopback_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
-
-/*!
- * \name GPE_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FLAGS         0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_RESERVED0     2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_RESERVED1     3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_VNI           4
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FID_COUNT          5
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FLAGS},\
-    {"NEXT_PROTOCOL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
-    {"RESERVED0", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_RESERVED0},\
-    {"RESERVED1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_RESERVED1},\
-    {"VNI", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_VNI},\
-    {"gpe_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FID_COUNT}
-
-/*!
- * \name GRE_CHKSUM_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
-    {"OFFSET", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
-    {"gre_chksum_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
-
-/*!
- * \name GRE_KEY_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY 0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_VN_ID_UPPER         1
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_FID_COUNT          2
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
-    {"VN_ID_LOWER_ENTROPY", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY},\
-    {"VN_ID_UPPER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_VN_ID_UPPER},\
-    {"gre_key_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_FID_COUNT}
-
-/*!
- * \name GRE_ROUT_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_ROUTING 0
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
-    {"ROUTING", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_ROUTING},\
-    {"gre_rout_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
-
-/*!
- * \name GRE_SEQ_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
-    {"gre_seq_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
-
-/*!
- * \name GRE_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_C_R_K_S  0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_PROTOCOL 1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_RESERVED 2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_VERSION  3
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_FID_COUNT          4
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
-    {"C_R_K_S", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_C_R_K_S},\
-    {"PROTOCOL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_PROTOCOL},\
-    {"RESERVED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_RESERVED},\
-    {"VERSION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_VERSION},\
-    {"gre_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_FID_COUNT}
-
-/*!
- * \name GTP_12BYTE_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_BYTES_11_8 0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_BYTES_3_0  1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_BYTES_7_4  2
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_FID_COUNT          3
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_FIELD_NAME_MAP_INIT \
-    {"BYTES_11_8", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_BYTES_11_8},\
-    {"BYTES_3_0", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_BYTES_3_0},\
-    {"BYTES_7_4", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_BYTES_7_4},\
-    {"gtp_12byte_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_FID_COUNT}
-
-/*!
- * \name GTP_8BYTE_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_BYTES_3_0 0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_BYTES_7_4 1
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_FID_COUNT          2
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_FIELD_NAME_MAP_INIT \
-    {"BYTES_3_0", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_BYTES_3_0},\
-    {"BYTES_7_4", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_BYTES_7_4},\
-    {"gtp_8byte_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_FID_COUNT}
-
-/*!
- * \name HOP_BY_HOP_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
-    {"OPTION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
-    {"hop_by_hop_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
-
-/*!
- * \name ICMP_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_CHECKSUM  0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_CODE      1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_ICMP_TYPE 2
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_FID_COUNT          3
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_CHECKSUM},\
-    {"CODE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_CODE},\
-    {"ICMP_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_ICMP_TYPE},\
-    {"icmp_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_FID_COUNT}
-
-/*!
- * \name IGMP_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_CHECKSUM      0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_IGMP_TYPE     2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_FID_COUNT          4
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_CHECKSUM},\
-    {"GROUP_ADDRESS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
-    {"IGMP_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_IGMP_TYPE},\
-    {"MAX_RESP_TIME", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
-    {"igmp_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_FID_COUNT}
-
-/*!
- * \name IPFIX_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_LENGTH        1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_VERSION       4
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_FID_COUNT          5
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
-    {"EXPORT_TIME", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
-    {"LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_LENGTH},\
-    {"OBS_DOMAIN_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
-    {"SEQUENCE_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
-    {"VERSION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_VERSION},\
-    {"ipfix_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_FID_COUNT}
-
-/*!
- * \name IPV4_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_DA                0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_ID                3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_OPTION            4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_PROTOCOL          5
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_SA                6
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_TOS               7
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_TTL               9
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FID_COUNT          11
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_DA},\
-    {"FLAGS_FRAG_OFFSET", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
-    {"HDR_CHECKSUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
-    {"ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_ID},\
-    {"OPTION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_OPTION},\
-    {"PROTOCOL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_PROTOCOL},\
-    {"SA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_SA},\
-    {"TOS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_TOS},\
-    {"TOTAL_LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
-    {"TTL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_TTL},\
-    {"VERSION_HDR_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
-    {"ipv4_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FID_COUNT}
-
-/*!
- * \name IPV6_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_DA             0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FLOW_LABEL     1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_HOP_LIMIT      2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_NEXT_HEADER    3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_SA             5
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_VERSION        7
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FID_COUNT          8
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_DA},\
-    {"FLOW_LABEL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FLOW_LABEL},\
-    {"HOP_LIMIT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_HOP_LIMIT},\
-    {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_NEXT_HEADER},\
-    {"PAYLOAD_LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
-    {"SA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_SA},\
-    {"TRAFFIC_CLASS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
-    {"VERSION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_VERSION},\
-    {"ipv6_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FID_COUNT}
-
-/*!
- * \name L2_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_MACDA 0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_MACSA 1
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_FID_COUNT          2
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
-    {"MACDA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_MACDA},\
-    {"MACSA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_MACSA},\
-    {"l2_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_FID_COUNT}
-
-/*!
- * \name MIRROR_ERSPAN_SN_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
-    {"SEQ_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
-    {"mirror_erspan_sn_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
-
-/*!
- * \name MIRROR_TRANSPORT_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
-    {"mirror_transport_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
-
-/*!
- * \name MPLS_ACH_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_RESERVED     2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_VERSION      3
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
-    {"CHANNEL_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
-    {"CW_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
-    {"RESERVED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_RESERVED},\
-    {"VERSION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_VERSION},\
-    {"mpls_ach_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
-
-/*!
- * \name MPLS_BV_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_VALUE 0
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
-    {"VALUE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_VALUE},\
-    {"mpls_bv_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_FID_COUNT}
-
-/*!
- * \name MPLS_CW_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_RESERVED   1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
-    {"CW_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
-    {"RESERVED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_RESERVED},\
-    {"SEQ_NUMBER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
-    {"mpls_cw_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_FID_COUNT}
-
-/*!
- * \name MPLS_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_BOS   0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_EXP   1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_LABEL 2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_TTL   3
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_FID_COUNT          4
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
-    {"BOS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_BOS},\
-    {"EXP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_EXP},\
-    {"LABEL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_LABEL},\
-    {"TTL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_TTL},\
-    {"mpls_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_FID_COUNT}
-
-/*!
- * \name OPAQUETAG_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_TPID     0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_VLAN_TAG 1
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_FID_COUNT          2
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_FIELD_NAME_MAP_INIT \
-    {"TPID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_TPID},\
-    {"VLAN_TAG", BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_VLAN_TAG},\
-    {"opaquetag_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_FID_COUNT}
-
-/*!
- * \name P_1588_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_CNTRL          0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_CORRECTION     1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_DOMAIN_NB      2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FLAGS          3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_MSG_LENGTH     5
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_MSG_TYPE       6
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_RESERVED1      7
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_RESERVED2      8
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_RESERVED3      9
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_SEQ_ID         10
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_SRCPORTID      11
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_VERSION        13
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FID_COUNT          14
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
-    {"CNTRL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_CNTRL},\
-    {"CORRECTION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_CORRECTION},\
-    {"DOMAIN_NB", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_DOMAIN_NB},\
-    {"FLAGS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FLAGS},\
-    {"LOGMSGINTERVAL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
-    {"MSG_LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_MSG_LENGTH},\
-    {"MSG_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_MSG_TYPE},\
-    {"RESERVED1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_RESERVED1},\
-    {"RESERVED2", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_RESERVED2},\
-    {"RESERVED3", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_RESERVED3},\
-    {"SEQ_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_SEQ_ID},\
-    {"SRCPORTID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_SRCPORTID},\
-    {"TRANSPORTSPEC", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
-    {"VERSION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_VERSION},\
-    {"p_1588_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FID_COUNT}
-
-/*!
- * \name PROG_EXT_HDR_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
-    {"OPTION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
-    {"prog_ext_hdr_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
-
-/*!
- * \name PSAMP_0_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FLOWSET        0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_LENGTH         1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
-    {"FLOWSET", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FLOWSET},\
-    {"LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_LENGTH},\
-    {"NEXT_HOP_INDEX", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
-    {"OBS_TIME_NS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
-    {"TEMPLATE_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
-    {"psamp_0_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_1_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_DLB_ID         0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_EPOCH          2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
-    {"DLB_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_DLB_ID},\
-    {"EGRESS_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
-    {"EPOCH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_EPOCH},\
-    {"INGRESS_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
-    {"SAMPLED_LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
-    {"VARIABLE_FLAG", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
-    {"psamp_1_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_MOD_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
-    {"INGRESS_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
-    {"LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
-    {"OBS_TIME_NS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
-    {"SWITCH_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
-    {"TEMPLATE_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
-    {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_1_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON    0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL      2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH     3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA     4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR  5
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT          6
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \
-    {"ING_DROP_REASON", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\
-    {"MIRROR_ON_DROP_OBJ", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\
-    {"MMU_DROP_CTRL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\
-    {"SAMPLED_LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_1_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT}
-
-/*!
- * \name RARP_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_HARDWARE_LEN  0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_OPERATION     2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_SENDER_HA     5
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_SENDER_IP     6
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_TARGET_HA     7
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_TARGET_IP     8
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_FID_COUNT          9
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_TARGET_IP},\
-    {"rarp_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_FID_COUNT}
-
-/*!
- * \name ROUTING_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_DATA          0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_FID_COUNT          5
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_DATA},\
-    {"HDR_EXT_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
-    {"ROUTING_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
-    {"SEGMENTS_LEFT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
-    {"routing_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_FID_COUNT}
-
-/*!
- * \name RSPAN_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_TAG  0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_TPID 1
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_FID_COUNT          2
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_TAG},\
-    {"TPID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_TPID},\
-    {"rspan_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_0_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
-    {"SYS_DESTINATION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
-    {"SYS_SOURCE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
-    {"VERSION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
-    {"sflow_shim_0_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_1_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
-    {"FLAG_DEST_SAMPLE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
-    {"FLAG_DISCARDED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
-    {"FLAG_FLEX_SAMPLE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
-    {"FLAG_MCAST", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
-    {"FLAG_SRC_SAMPLE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
-    {"FLAG_TRUNCATED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
-    {"RESERVED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
-    {"SYS_OPCODE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
-    {"sflow_shim_1_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_2_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
-    {"USER_META_DATA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
-    {"sflow_shim_2_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
-
-/*!
- * \name SNAP_LLC_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_LENGTH   0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
-    {"LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_LENGTH},\
-    {"SNAP_LLC", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
-    {"snap_llc_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
-
-/*!
- * \name TCP_FIRST_4BYTES_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
-    {"DST_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
-    {"SRC_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
-    {"tcp_first_4bytes_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
-
-/*!
- * \name TCP_LAST_16BYTES_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
-    {"ACK_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
-    {"CHECKSUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
-    {"HDR_LEN_AND_FLAGS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
-    {"SEQ_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
-    {"URGENT_PTR", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
-    {"WIN_SIZE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
-    {"tcp_last_16bytes_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
-
-/*!
- * \name UDP_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_CHECKSUM   0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_DST_PORT   1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_SRC_PORT   2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_UDP_LENGTH 3
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_FID_COUNT          4
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_CHECKSUM},\
-    {"DST_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_DST_PORT},\
-    {"SRC_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_SRC_PORT},\
-    {"UDP_LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_UDP_LENGTH},\
-    {"udp_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L3_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
-    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
-    {"unknown_l3_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L4_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
-    {"unknown_l4_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L5_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
-    {"L5_BYTES_0_1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
-    {"L5_BYTES_2_3", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
-    {"L5_BYTES_4_7", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
-    {"unknown_l5_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
-
-/*!
- * \name VLAN_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_CFI  0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_PCP  1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_TPID 2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_VID  3
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_FID_COUNT          4
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
-    {"CFI", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_CFI},\
-    {"PCP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_PCP},\
-    {"TPID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_TPID},\
-    {"VID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_VID},\
-    {"vlan_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_FID_COUNT}
-
-/*!
- * \name VNTAG_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_TAG  0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_TPID 1
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_FID_COUNT          2
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_TAG},\
-    {"TPID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_TPID},\
-    {"vntag_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_FID_COUNT}
-
-/*!
- * \name VXLAN_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1      0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_VN_ID_LOWER_RESERVED2 1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_VN_ID_UPPER           2
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FID_COUNT          3
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS_RESERVED_1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
-    {"VN_ID_LOWER_RESERVED2", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_VN_ID_LOWER_RESERVED2},\
-    {"VN_ID_UPPER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_VN_ID_UPPER},\
-    {"vxlan_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FID_COUNT}
-
-/*!
- * \name WESP_T field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FLAGS       0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_HEADER_LEN  1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_NEXT_HEADER 2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_SEQ_NUM     3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_SPI         4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_TRAILER_LEN 5
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_WESP_IV     6
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FID_COUNT          7
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FLAGS},\
-    {"HEADER_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_HEADER_LEN},\
-    {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_NEXT_HEADER},\
-    {"SEQ_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_SEQ_NUM},\
-    {"SPI", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_SPI},\
-    {"TRAILER_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_TRAILER_LEN},\
-    {"WESP_IV", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_WESP_IV},\
-    {"wesp_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FID_COUNT}
-
-
-#endif /* BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_flex_data.h
deleted file mode 100644
index 078278c2eea9..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_flex_data.h
+++ /dev/null
@@ -1,173 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DATA_H
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DATA_H
-
-/*!
- * \name RX flex metadata field IDs.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                       2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0                        5
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       6
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              7
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      8
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_ETAG_ACTION_3_0                            9
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_ETAG_PCP_DEI_3_0                           10
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_ETAG_VID_16_15_0                           11
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0                             12
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                            13
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 14
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    15
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    16
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    17
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    18
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    19
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  20
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0                     21
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              22
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              23
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            24
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            25
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                       26
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   27
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        28
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              29
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_T_VLAN_TAG_VALUE_15_0                          30
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             31
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                32
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                       33
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0   34
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       35
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    46
-
-/*!
- * \name Packet Flex Reason Types.
- */
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               0
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  2
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  3
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   4
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     5
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               6
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      7
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   8
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           9
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      10
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD                          11
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      12
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           13
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      14
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            15
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        16
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            17
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        18
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST                         19
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      20
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      21
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      22
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      23
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      24
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      25
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      26
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      27
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED                 28
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              29
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  30
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    31
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          32
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF                                  33
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS                         34
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS                         35
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED                       36
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED                     37
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              38
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            39
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                40
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED              41
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     42
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               43
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       44
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     45
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
-    {"CML_FLAGS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
-    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DST_FP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
-    {"EM_FT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
-    {"IFP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
-    {"IFP_METER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
-    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
-    {"IVXLT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
-    {"L2_DST_LOOKUP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
-    {"L2_DST_LOOKUP_MISS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
-    {"L2_SRC_DISCARD", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\
-    {"L2_SRC_STATIC_MOVE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
-    {"L3_DST_LOOKUP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
-    {"L3_DST_LOOKUP_MISS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
-    {"L3_HDR_ERROR", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
-    {"L3_IIF_EQ_L3_OIF", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
-    {"L3_TTL_ERROR", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
-    {"LEARN_CACHE_FULL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
-    {"MACSA_MULTICAST", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\
-    {"MATCHED_RULE_BIT_0", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
-    {"MATCHED_RULE_BIT_1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
-    {"MATCHED_RULE_BIT_2", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
-    {"MATCHED_RULE_BIT_3", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
-    {"MATCHED_RULE_BIT_4", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
-    {"MATCHED_RULE_BIT_5", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
-    {"MATCHED_RULE_BIT_6", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
-    {"MATCHED_RULE_BIT_7", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
-    {"MEMBERSHIP_CHECK_FAILED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
-    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
-    {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
-    {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
-    {"NO_COPY_TO_CPU", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
-    {"PE_RPF", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF},\
-    {"PE_VID_FWD_MISS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS},\
-    {"PE_VID_RPF_MISS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS},\
-    {"PKT_ETAG_EXPECTED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED},\
-    {"PKT_ETAG_UNEXPECTED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED},\
-    {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
-    {"PROTOCOL_PKT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
-    {"SER_DROP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
-    {"SPANNING_TREE_CHECK_FAILED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
-    {"SVP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
-    {"TRACE_DOP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
-    {"URPF_CHECK_FAILED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
-    {"VFP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
-    {"flex reason count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
-
-#endif /* BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id_defs.h
deleted file mode 100644
index 577d595f4331..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id_defs.h
+++ /dev/null
@@ -1,415 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56880_a0_nfa_2_1_7_0_sf_match_id_info.yml
- * for device bcm56880_a0 and variant nfa_2_1_7_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-
-/*!
- * \brief Get the Match ID DataBase information.
- *
- * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
-*/
-extern bcmpkt_rxpmd_match_id_db_info_t *
-    bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db_info_get(void);
-
-/*!
- * \brief Get the Match ID Mapping information.
- *
- * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
-*/
-extern bcmpkt_rxpmd_match_id_map_info_t *
-    bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_map_info_get(void);
-
-/*!
-  \name RXPMD Match IDs
-*/
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  1
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  2
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  3
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG  4
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  5
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN  6
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  7
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  8
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  9
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  10
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  11
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  12
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  13
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  14
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  15
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  16
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  17
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  18
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  19
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  20
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  21
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  22
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE  23
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE  24
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  25
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  26
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  27
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  28
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  29
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  30
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  31
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  32
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  33
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  34
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  35
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  36
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  37
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  38
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  39
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  40
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  41
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  42
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  43
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  44
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  45
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  46
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  47
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  48
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  49
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  50
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  51
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  52
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  53
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG  54
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  55
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN  56
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  57
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  58
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  59
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  60
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  61
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  62
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  63
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  64
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  65
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  66
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  67
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  68
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  69
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  70
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  71
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  72
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE  73
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE  74
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  75
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  76
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  77
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  78
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  79
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  80
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  81
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  82
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  83
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  84
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  85
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  86
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  87
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  88
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  89
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  90
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  91
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  92
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  93
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  94
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  95
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  96
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  97
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  98
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  99
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  100
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  101
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG  102
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  103
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN  104
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  105
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  106
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  107
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  108
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  109
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  110
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  111
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  112
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  113
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  114
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  115
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  116
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  117
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  118
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  119
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  120
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  121
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  122
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  123
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  124
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  125
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  126
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  127
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  128
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  129
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  130
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  131
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG  132
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  133
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN  134
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  135
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  136
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  137
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  138
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  139
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  140
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  141
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  142
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  143
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  144
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  145
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  146
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  147
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  148
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  149
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  150
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE  151
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE  152
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  153
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  154
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  155
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  156
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  157
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  158
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  159
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  160
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  161
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  162
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  163
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  164
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  165
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  166
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  167
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  168
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  169
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  170
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  171
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  172
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  173
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  174
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  175
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  176
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  177
-#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_COUNT  178
-
-#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
-    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_RSPAN", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN}, \
-    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
-    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_RSPAN", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
-    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_RSPAN", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN}, \
-    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_RSPAN", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
-    {"rxpmd_match_id_count", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_COUNT}
-
-#endif /*! BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr.h
new file mode 100644
index 000000000000..4b40b1429389
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr.h
@@ -0,0 +1,162 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_H
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T                      0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T                   1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T                      2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T         3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T         4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T              5
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T        6
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T         7
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T                      8
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T                     9
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T                10
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T                     11
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T         12
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T                      13
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T               14
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T                  15
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T                 16
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T                  17
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T                      18
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T               19
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T                20
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T            21
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T             22
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T               23
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T                     24
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T                     25
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T                    26
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T                     27
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T                     28
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T                       29
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T         30
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T         31
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T                 32
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T                  33
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T                  34
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T                     35
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T                36
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T                   37
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T             38
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T                  39
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T                  40
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   41
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T   42
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T                     43
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T                  44
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T                    45
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T             46
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T             47
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T             48
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T                 49
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T         50
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T         51
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T                      52
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T               53
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T               54
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T               55
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T                     56
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T                    57
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T                    58
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T                     59
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_T               60
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT    61
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T},\
+    {"authen_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T},\
+    {"bfd_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T},\
+    {"cpu_composites_0_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"dest_option_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T},\
+    {"erspan3_fixed_hdr_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"esp_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T},\
+    {"etag_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T},\
+    {"ethertype_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T},\
+    {"frag_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T},\
+    {"generic_loopback_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"gpe_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T},\
+    {"gre_chksum_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T},\
+    {"gre_key_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T},\
+    {"gre_rout_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T},\
+    {"gre_seq_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T},\
+    {"gre_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T},\
+    {"gtp_12byte_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T},\
+    {"gtp_8byte_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T},\
+    {"gtp_ext_4byte_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T},\
+    {"gtp_with_ext_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T},\
+    {"hop_by_hop_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T},\
+    {"icmp_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T},\
+    {"igmp_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T},\
+    {"ipfix_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"mpls_ach_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T},\
+    {"mpls_bv_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T},\
+    {"mpls_cw_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T},\
+    {"mpls_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T},\
+    {"opaquetag_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T},\
+    {"p_1588_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T},\
+    {"prog_ext_hdr_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T},\
+    {"psamp_0_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T},\
+    {"psamp_1_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_1_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\
+    {"rarp_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T},\
+    {"routing_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T},\
+    {"rspan_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T},\
+    {"sflow_shim_0_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T},\
+    {"sflow_shim_1_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T},\
+    {"sflow_shim_2_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T},\
+    {"snap_llc_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T},\
+    {"tcp_first_4bytes_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T},\
+    {"vntag_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T},\
+    {"vxlan_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T},\
+    {"wesp_t", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T},\
+    {"RXPMD_FLEX_T", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr_data.h
new file mode 100644
index 000000000000..188725e0be5a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr_data.h
@@ -0,0 +1,1152 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_DATA_H
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_OPERATION     2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name AUTHEN_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_DATA        0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_NEXT_HEADER 1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_RESERVED    3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_SEQ_NUM     4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_SPI         5
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT          6
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_DATA},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_NEXT_HEADER},\
+    {"PAYLOAD_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
+    {"RESERVED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_RESERVED},\
+    {"SEQ_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_SPI},\
+    {"authen_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT}
+
+/*!
+ * \name BFD_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_AP            0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_BFD_LENGTH    1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_CPI           2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DEM           3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DESMINTXINTV  4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DETECTMULT    5
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DIAG          6
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FIN           7
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_MINECHORXINTV 8
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_MPT           9
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_MYDISCRIM     10
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_POLL          11
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_REQMINRXINTV  12
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_STA           13
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_URDISCRIM     14
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_VERSION       15
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT          16
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
+    {"AP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_AP},\
+    {"BFD_LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_BFD_LENGTH},\
+    {"CPI", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_CPI},\
+    {"DEM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DEM},\
+    {"DESMINTXINTV", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DESMINTXINTV},\
+    {"DETECTMULT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DETECTMULT},\
+    {"DIAG", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_DIAG},\
+    {"FIN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FIN},\
+    {"MINECHORXINTV", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_MINECHORXINTV},\
+    {"MPT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_MPT},\
+    {"MYDISCRIM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_MYDISCRIM},\
+    {"POLL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_POLL},\
+    {"REQMINRXINTV", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_REQMINRXINTV},\
+    {"STA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_STA},\
+    {"URDISCRIM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_URDISCRIM},\
+    {"VERSION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_VERSION},\
+    {"bfd_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name DEST_OPTION_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_OPTION      2
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_OPTION},\
+    {"dest_option_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ESP_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_NEXT_HEADER 0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_PAD         1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_PAD_LEN     2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_SEQ_NUM     3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_SPI         4
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT          5
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
+    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_NEXT_HEADER},\
+    {"PAD", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_PAD},\
+    {"PAD_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_PAD_LEN},\
+    {"SEQ_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_SPI},\
+    {"esp_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT}
+
+/*!
+ * \name ETAG_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_PCP_DEI 0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_RSRVD0  1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_RSRVD1  2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_SVID    3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_TPID    4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_VID     5
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT          6
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
+    {"PCP_DEI", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_PCP_DEI},\
+    {"RSRVD0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_RSRVD0},\
+    {"RSRVD1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_RSRVD1},\
+    {"SVID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_SVID},\
+    {"TPID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_TPID},\
+    {"VID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_VID},\
+    {"etag_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name FRAG_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FRAG_INFO   0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_ID          1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_NEXT_HEADER 2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_RESERVED    3
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
+    {"FRAG_INFO", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FRAG_INFO},\
+    {"ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_ID},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_NEXT_HEADER},\
+    {"RESERVED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_RESERVED},\
+    {"frag_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"RESERVED_2", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
+    {"SOURCE_SYSTEM_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
+
+/*!
+ * \name GPE_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FLAGS         0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_NEXT_PROTOCOL 1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED0     2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED1     3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_VNI           4
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT          5
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED0},\
+    {"RESERVED1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_RESERVED1},\
+    {"VNI", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_VNI},\
+    {"gpe_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT}
+
+/*!
+ * \name GRE_CHKSUM_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_OFFSET   1
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
+    {"OFFSET", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_OFFSET},\
+    {"gre_chksum_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
+
+/*!
+ * \name GRE_KEY_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY 0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_VN_ID_UPPER         1
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
+    {"VN_ID_LOWER_ENTROPY", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY},\
+    {"VN_ID_UPPER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_VN_ID_UPPER},\
+    {"gre_key_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT}
+
+/*!
+ * \name GRE_ROUT_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_ROUTING 0
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
+    {"ROUTING", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_ROUTING},\
+    {"gre_rout_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT}
+
+/*!
+ * \name GRE_SEQ_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_SEQUENCE 0
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_SEQUENCE},\
+    {"gre_seq_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT}
+
+/*!
+ * \name GRE_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_C_R_K_S  0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_PROTOCOL 1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_RESERVED 2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_VERSION  3
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
+    {"C_R_K_S", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_C_R_K_S},\
+    {"PROTOCOL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_PROTOCOL},\
+    {"RESERVED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_RESERVED},\
+    {"VERSION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_VERSION},\
+    {"gre_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT}
+
+/*!
+ * \name GTP_12BYTE_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_BYTES_11_8 0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_BYTES_3_0  1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_BYTES_7_4  2
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_FIELD_NAME_MAP_INIT \
+    {"BYTES_11_8", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_BYTES_11_8},\
+    {"BYTES_3_0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_BYTES_3_0},\
+    {"BYTES_7_4", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_BYTES_7_4},\
+    {"gtp_12byte_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_FID_COUNT}
+
+/*!
+ * \name GTP_8BYTE_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_BYTES_3_0 0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_BYTES_7_4 1
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_FIELD_NAME_MAP_INIT \
+    {"BYTES_3_0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_BYTES_3_0},\
+    {"BYTES_7_4", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_BYTES_7_4},\
+    {"gtp_8byte_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_FID_COUNT}
+
+/*!
+ * \name GTP_EXT_4BYTE_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_EXT_HDR 0
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_FIELD_NAME_MAP_INIT \
+    {"EXT_HDR", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_EXT_HDR},\
+    {"gtp_ext_4byte_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT}
+
+/*!
+ * \name GTP_WITH_EXT_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_BYTES_11_8 0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_BYTES_3_0  1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_BYTES_7_4  2
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_FIELD_NAME_MAP_INIT \
+    {"BYTES_11_8", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_BYTES_11_8},\
+    {"BYTES_3_0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_BYTES_3_0},\
+    {"BYTES_7_4", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_BYTES_7_4},\
+    {"gtp_with_ext_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT}
+
+/*!
+ * \name HOP_BY_HOP_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_OPTION      2
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_OPTION},\
+    {"hop_by_hop_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_CODE      1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IGMP_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_CHECKSUM      0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_GROUP_ADDRESS 1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_IGMP_TYPE     2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_MAX_RESP_TIME 3
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_CHECKSUM},\
+    {"GROUP_ADDRESS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_GROUP_ADDRESS},\
+    {"IGMP_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_IGMP_TYPE},\
+    {"MAX_RESP_TIME", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_MAX_RESP_TIME},\
+    {"igmp_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_DA                0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_ID                3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_OPTION            4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_SA                6
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_TOS               7
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_TTL               9
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_DA             0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_SA             5
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_MACDA 0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_MACSA 1
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name MPLS_ACH_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CW_TYPE      1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_RESERVED     2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_VERSION      3
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
+    {"CHANNEL_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
+    {"CW_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_CW_TYPE},\
+    {"RESERVED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_RESERVED},\
+    {"VERSION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_VERSION},\
+    {"mpls_ach_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT}
+
+/*!
+ * \name MPLS_BV_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_VALUE 0
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
+    {"VALUE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_VALUE},\
+    {"mpls_bv_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT}
+
+/*!
+ * \name MPLS_CW_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_CW_TYPE    0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_RESERVED   1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
+    {"CW_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_CW_TYPE},\
+    {"RESERVED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_RESERVED},\
+    {"SEQ_NUMBER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
+    {"mpls_cw_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT}
+
+/*!
+ * \name MPLS_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_BOS   0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_EXP   1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_LABEL 2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_TTL   3
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
+    {"BOS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_BOS},\
+    {"EXP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_EXP},\
+    {"LABEL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_LABEL},\
+    {"TTL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_TTL},\
+    {"mpls_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT}
+
+/*!
+ * \name OPAQUETAG_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_TPID     0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_VLAN_TAG 1
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_FIELD_NAME_MAP_INIT \
+    {"TPID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_TPID},\
+    {"VLAN_TAG", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_VLAN_TAG},\
+    {"opaquetag_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_FID_COUNT}
+
+/*!
+ * \name P_1588_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_CNTRL          0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_CORRECTION     1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_DOMAIN_NB      2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FLAGS          3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_LENGTH     5
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_TYPE       6
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED1      7
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED2      8
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED3      9
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_SEQ_ID         10
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_SRCPORTID      11
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_TRANSPORTSPEC  12
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_VERSION        13
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT          14
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
+    {"CNTRL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_CNTRL},\
+    {"CORRECTION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_CORRECTION},\
+    {"DOMAIN_NB", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_DOMAIN_NB},\
+    {"FLAGS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FLAGS},\
+    {"LOGMSGINTERVAL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
+    {"MSG_LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_LENGTH},\
+    {"MSG_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_MSG_TYPE},\
+    {"RESERVED1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED1},\
+    {"RESERVED2", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED2},\
+    {"RESERVED3", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_RESERVED3},\
+    {"SEQ_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_SEQ_ID},\
+    {"SRCPORTID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_SRCPORTID},\
+    {"TRANSPORTSPEC", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_TRANSPORTSPEC},\
+    {"VERSION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_VERSION},\
+    {"p_1588_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT}
+
+/*!
+ * \name PROG_EXT_HDR_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_OPTION      2
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_OPTION},\
+    {"prog_ext_hdr_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_0_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FLOWSET        0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_LENGTH         1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT          6
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
+    {"FLOWSET", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FLOWSET},\
+    {"LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_LENGTH},\
+    {"NEXT_HOP_INDEX", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
+    {"OBS_TIME_NS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
+    {"TEMPLATE_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
+    {"psamp_0_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_1_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_DLB_ID         0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EPOCH          2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_USER_META_DATA 5
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT          7
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
+    {"DLB_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_DLB_ID},\
+    {"EGRESS_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
+    {"EPOCH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_EPOCH},\
+    {"INGRESS_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
+    {"SAMPLED_LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_USER_META_DATA},\
+    {"VARIABLE_FLAG", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
+    {"psamp_1_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_1_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON    0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL      2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH     3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA     4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR  5
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT          6
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \
+    {"ING_DROP_REASON", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\
+    {"MIRROR_ON_DROP_OBJ", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\
+    {"MMU_DROP_CTRL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\
+    {"SAMPLED_LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_1_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_OPERATION     2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name ROUTING_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_DATA          0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_NEXT_HEADER   2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_ROUTING_TYPE  3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT          5
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_DATA},\
+    {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
+    {"routing_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name RSPAN_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_TAG  0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_TPID 1
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_TAG},\
+    {"TPID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_TPID},\
+    {"rspan_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_0_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
+    {"SYS_DESTINATION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
+    {"SYS_SOURCE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
+    {"VERSION", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
+    {"sflow_shim_0_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_1_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
+    {"FLAG_DEST_SAMPLE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
+    {"FLAG_DISCARDED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
+    {"FLAG_FLEX_SAMPLE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
+    {"FLAG_MCAST", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
+    {"FLAG_SRC_SAMPLE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
+    {"FLAG_TRUNCATED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
+    {"RESERVED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
+    {"SYS_OPCODE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
+    {"sflow_shim_1_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_2_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
+    {"USER_META_DATA", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
+    {"sflow_shim_2_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
+
+/*!
+ * \name SNAP_LLC_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_LENGTH   0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
+    {"LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_LENGTH},\
+    {"SNAP_LLC", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
+    {"snap_llc_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"unknown_l5_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_CFI  0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_PCP  1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_TPID 2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_VID  3
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VNTAG_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_TAG  0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_TPID 1
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_TAG},\
+    {"TPID", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_TPID},\
+    {"vntag_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1      0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_VN_ID_LOWER_RESERVED2 1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_VN_ID_UPPER           2
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"VN_ID_LOWER_RESERVED2", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_VN_ID_LOWER_RESERVED2},\
+    {"VN_ID_UPPER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_VN_ID_UPPER},\
+    {"vxlan_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT}
+
+/*!
+ * \name WESP_T field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FLAGS       0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_HEADER_LEN  1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_NEXT_HEADER 2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_SEQ_NUM     3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_SPI         4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_TRAILER_LEN 5
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_WESP_IV     6
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT          7
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FLAGS},\
+    {"HEADER_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_HEADER_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_NEXT_HEADER},\
+    {"SEQ_NUM", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_SPI},\
+    {"TRAILER_LEN", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_TRAILER_LEN},\
+    {"WESP_IV", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_WESP_IV},\
+    {"wesp_t fid count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT}
+
+
+#endif /* BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 000000000000..04a86764bd0d
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,173 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DVP_15_0                                       2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0                        5
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       6
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              7
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      8
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_ETAG_ACTION_3_0                            9
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_ETAG_PCP_DEI_3_0                           10
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_ETAG_VID_16_15_0                           11
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0                             12
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                            13
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 14
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    15
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    16
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    17
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    18
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    19
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  20
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0                     21
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              22
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              23
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            24
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            25
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_15_0                                       26
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   27
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        28
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              29
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_T_VLAN_TAG_VALUE_15_0                          30
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             31
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                32
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VFI_15_0                                       33
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0   34
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_FID_COUNT                       35
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_COUNT                    46
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               0
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  2
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  3
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   4
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP                                     5
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               6
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      7
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   8
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           9
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      10
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD                          11
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      12
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           13
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      14
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            15
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        16
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            17
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        18
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    19
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      20
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      21
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      22
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      23
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      24
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      25
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      26
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      27
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED                 28
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              29
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  30
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    31
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          32
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_RPF                                  33
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS                         34
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS                         35
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED                       36
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED                     37
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              38
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            39
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                40
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         41
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP                                     42
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               43
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       44
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP                                     45
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CML_FLAGS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DST_FP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
+    {"EM_FT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"IFP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
+    {"IVXLT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_DISCARD", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\
+    {"L2_SRC_STATIC_MOVE", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_IIF_EQ_L3_OIF", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
+    {"L3_TTL_ERROR", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST_RSVD", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
+    {"MATCHED_RULE_BIT_0", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
+    {"MATCHED_RULE_BIT_1", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
+    {"MATCHED_RULE_BIT_2", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
+    {"MATCHED_RULE_BIT_3", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
+    {"MATCHED_RULE_BIT_4", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
+    {"MATCHED_RULE_BIT_5", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
+    {"MATCHED_RULE_BIT_6", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
+    {"MATCHED_RULE_BIT_7", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
+    {"MEMBERSHIP_CHECK_FAILED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
+    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
+    {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
+    {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
+    {"NO_COPY_TO_CPU", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PE_RPF", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_RPF},\
+    {"PE_VID_FWD_MISS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS},\
+    {"PE_VID_RPF_MISS", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS},\
+    {"PKT_ETAG_EXPECTED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED},\
+    {"PKT_ETAG_UNEXPECTED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"SER_DROP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
+    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
+    {"SVP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP},\
+    {"TRACE_DOP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"URPF_CHECK_FAILED", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
+    {"VFP", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 000000000000..fc064a40e539
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,427 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56880_a0_nfa_6_5_30_1_1_sf_match_id_info.yml
+ * for device bcm56880_a0 and variant nfa_6_5_30_1_1.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  1
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  2
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  3
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG  4
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  5
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN  6
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  7
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  8
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  9
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  10
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  11
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  12
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  13
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  14
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  15
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  16
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  17
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  18
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  19
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  20
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  21
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  22
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE  23
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE  24
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE  25
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT  26
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  27
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  28
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  29
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  30
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  31
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  32
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  33
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  34
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  35
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  36
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  37
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  38
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  39
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  40
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  41
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  42
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  43
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  44
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  45
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  46
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  47
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  48
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  49
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  50
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  51
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  52
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  53
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  54
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  55
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG  56
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  57
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN  58
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  59
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  60
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  61
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  62
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  63
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  64
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  65
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  66
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  67
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  68
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  69
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  70
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  71
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  72
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  73
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  74
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE  75
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE  76
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE  77
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT  78
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  79
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  80
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  81
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  82
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  83
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  84
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  85
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  86
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  87
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  88
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  89
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  90
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  91
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  92
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  93
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  94
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  95
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  96
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  97
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  98
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  99
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  100
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  101
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  102
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  103
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  104
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  105
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG  106
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  107
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN  108
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  109
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  110
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  111
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  112
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  113
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  114
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  115
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  116
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  117
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  118
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  119
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  120
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  121
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  122
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  123
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  124
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  125
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  126
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  127
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  128
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  129
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  130
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  131
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  132
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  133
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  134
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  135
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG  136
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  137
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN  138
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  139
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  140
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  141
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  142
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  143
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  144
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  145
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  146
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  147
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  148
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  149
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  150
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  151
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  152
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  153
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  154
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE  155
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE  156
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE  157
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT  158
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  159
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  160
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  161
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  162
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  163
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  164
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  165
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  166
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  167
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  168
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  169
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  170
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  171
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  172
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  173
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  174
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  175
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  176
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  177
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  178
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  179
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  180
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  181
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  182
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  183
+#define BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_COUNT  184
+
+#define BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr.h
deleted file mode 100644
index 5a071cdc342c..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H
-
-#include <bcmpkt/bcmpkt_flexhdr_internal.h>
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T                          0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T             1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T             2
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T                3
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T            4
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T             5
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T                    6
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T             7
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T                         8
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T                        9
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T                         10
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T                         11
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T                           12
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T             13
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T             14
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T       15
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T       16
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T       17
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T                         18
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T             19
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T             20
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T                          21
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T                   22
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T                   23
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T                   24
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T                         25
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T                        26
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_T                   27
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT    28
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_NAME_MAP_INIT \
-    {"arp_t", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T},\
-    {"cpu_composites_0_t", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T},\
-    {"cpu_composites_1_t", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T},\
-    {"ep_nih_header_t", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T},\
-    {"erspan3_fixed_hdr_t", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T},\
-    {"erspan3_subhdr_5_t", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T},\
-    {"ethertype_t", BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T},\
-    {"generic_loopback_t", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T},\
-    {"icmp_t", BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T},\
-    {"ipfix_t", BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T},\
-    {"ipv4_t", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T},\
-    {"ipv6_t", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T},\
-    {"l2_t", BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T},\
-    {"mirror_erspan_sn_t", BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T},\
-    {"mirror_transport_t", BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T},\
-    {"psamp_mirror_on_drop_0_t", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
-    {"psamp_mirror_on_drop_1_t", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\
-    {"psamp_mirror_on_drop_2_t", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\
-    {"rarp_t", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T},\
-    {"tcp_first_4bytes_t", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T},\
-    {"tcp_last_16bytes_t", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T},\
-    {"udp_t", BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T},\
-    {"unknown_l3_t", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T},\
-    {"unknown_l4_t", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T},\
-    {"unknown_l5_t", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T},\
-    {"vlan_t", BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T},\
-    {"vxlan_t", BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T},\
-    {"RXPMD_FLEX_T", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_T},\
-    {"flexhdr count", BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT}
-
-#endif /* BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr_data.h
deleted file mode 100644
index c5c91aa5ac94..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr_data.h
+++ /dev/null
@@ -1,592 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H
-
-/*!
- * \name ARP_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_LEN  0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_TYPE 1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_OPERATION     2
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_PROT_ADDR_LEN 3
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_PROTOCOL_TYPE 4
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_HA     5
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_IP     6
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_HA     7
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_IP     8
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT          9
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_IP},\
-    {"arp_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_0_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT0", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
-    {"DMA_CONT1", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
-    {"DMA_CONT2", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
-    {"DMA_CONT3", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
-    {"DMA_CONT4", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
-    {"DMA_CONT5", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
-    {"DMA_CONT6", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
-    {"cpu_composites_0_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_1_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT10", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
-    {"DMA_CONT11", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
-    {"DMA_CONT12", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
-    {"DMA_CONT13", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
-    {"DMA_CONT14", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
-    {"DMA_CONT15", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
-    {"DMA_CONT16", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
-    {"DMA_CONT17", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
-    {"DMA_CONT7", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
-    {"DMA_CONT8", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
-    {"DMA_CONT9", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
-    {"cpu_composites_1_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
-
-/*!
- * \name EP_NIH_HEADER_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_START                10
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"HEADER_SUBTYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
-    {"HEADER_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
-    {"OPAQUE_CTRL_A", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
-    {"OPAQUE_CTRL_B", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
-    {"OPAQUE_CTRL_C", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
-    {"OPAQUE_OBJECT_A", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
-    {"OPAQUE_OBJECT_B", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
-    {"OPAQUE_OBJECT_C", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
-    {"RECIRC_PROFILE_INDEX", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
-    {"RESERVED_0", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
-    {"START", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_START},\
-    {"TIMESTAMP", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
-    {"ep_nih_header_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_FIXED_HDR_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
-    {"BSO", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
-    {"COS", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
-    {"GBP_SID", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
-    {"P_FT_HWID_D_GRA_O", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
-    {"SESSION_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
-    {"T", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
-    {"TIMESTAMP", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
-    {"VER", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
-    {"VLAN", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
-    {"erspan3_fixed_hdr_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_SUBHDR_5_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
-    {"PLATFORM_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
-    {"PORT_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
-    {"SWITCH_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
-    {"TIMESTAMP", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
-    {"erspan3_subhdr_5_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
-
-/*!
- * \name ETHERTYPE_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_TYPE 0
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT          1
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
-    {"TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_TYPE},\
-    {"ethertype_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT}
-
-/*!
- * \name GENERIC_LOOPBACK_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
-    {"DESTINATION_OBJ", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
-    {"DESTINATION_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
-    {"ENTROPY_OBJ", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
-    {"FLAGS", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
-    {"HEADER_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
-    {"INPUT_PRIORITY", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
-    {"INTERFACE_CTRL", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
-    {"INTERFACE_OBJ", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
-    {"PROCESSING_CTRL_0", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
-    {"PROCESSING_CTRL_1", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
-    {"QOS_OBJ", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
-    {"RESERVED_1", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
-    {"RESERVED_2", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
-    {"SOURCE_SYSTEM_PORT", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
-    {"START_BYTE", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
-    {"generic_loopback_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
-
-/*!
- * \name ICMP_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_CHECKSUM  0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_CODE      1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_ICMP_TYPE 2
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT          3
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_CHECKSUM},\
-    {"CODE", BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_CODE},\
-    {"ICMP_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_ICMP_TYPE},\
-    {"icmp_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT}
-
-/*!
- * \name IPFIX_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_EXPORT_TIME   0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_LENGTH        1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_VERSION       4
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT          5
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
-    {"EXPORT_TIME", BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_EXPORT_TIME},\
-    {"LENGTH", BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_LENGTH},\
-    {"OBS_DOMAIN_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
-    {"SEQUENCE_NUM", BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
-    {"VERSION", BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_VERSION},\
-    {"ipfix_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT}
-
-/*!
- * \name IPV4_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_DA                0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_HDR_CHECKSUM      2
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_ID                3
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_OPTION            4
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_PROTOCOL          5
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_SA                6
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOS               7
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOTAL_LENGTH      8
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_TTL               9
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT          11
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_DA},\
-    {"FLAGS_FRAG_OFFSET", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
-    {"HDR_CHECKSUM", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_HDR_CHECKSUM},\
-    {"ID", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_ID},\
-    {"OPTION", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_OPTION},\
-    {"PROTOCOL", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_PROTOCOL},\
-    {"SA", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_SA},\
-    {"TOS", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOS},\
-    {"TOTAL_LENGTH", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOTAL_LENGTH},\
-    {"TTL", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_TTL},\
-    {"VERSION_HDR_LEN", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
-    {"ipv4_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT}
-
-/*!
- * \name IPV6_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_DA             0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FLOW_LABEL     1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_HOP_LIMIT      2
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_NEXT_HEADER    3
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_SA             5
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_VERSION        7
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT          8
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_DA},\
-    {"FLOW_LABEL", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FLOW_LABEL},\
-    {"HOP_LIMIT", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_HOP_LIMIT},\
-    {"NEXT_HEADER", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_NEXT_HEADER},\
-    {"PAYLOAD_LENGTH", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
-    {"SA", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_SA},\
-    {"TRAFFIC_CLASS", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
-    {"VERSION", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_VERSION},\
-    {"ipv6_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT}
-
-/*!
- * \name L2_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_MACDA 0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_MACSA 1
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT          2
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
-    {"MACDA", BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_MACDA},\
-    {"MACSA", BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_MACSA},\
-    {"l2_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT}
-
-/*!
- * \name MIRROR_ERSPAN_SN_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
-    {"SEQ_NUM", BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
-    {"mirror_erspan_sn_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
-
-/*!
- * \name MIRROR_TRANSPORT_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
-    {"mirror_transport_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_MOD_PORT", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
-    {"INGRESS_PORT", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
-    {"LENGTH", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
-    {"OBS_TIME_NS", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
-    {"SWITCH_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
-    {"TEMPLATE_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
-    {"psamp_mirror_on_drop_0_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_1_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON    0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL      2
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH     3
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA     4
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR  5
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT          6
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \
-    {"ING_DROP_REASON", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\
-    {"MIRROR_ON_DROP_OBJ", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\
-    {"MMU_DROP_CTRL", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\
-    {"SAMPLED_LENGTH", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_1_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_2_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON       0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0            2
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH        3
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA        4
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR     5
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT          6
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \
-    {"EGR_DROP_REASON", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\
-    {"EP_COPY_SESSION_INDEX", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\
-    {"RESERVED_0", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\
-    {"SAMPLED_LENGTH", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_2_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT}
-
-/*!
- * \name RARP_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_LEN  0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_TYPE 1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_OPERATION     2
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_PROT_ADDR_LEN 3
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_PROTOCOL_TYPE 4
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_HA     5
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_IP     6
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_HA     7
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_IP     8
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT          9
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_IP},\
-    {"rarp_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT}
-
-/*!
- * \name TCP_FIRST_4BYTES_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
-    {"DST_PORT", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
-    {"SRC_PORT", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
-    {"tcp_first_4bytes_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
-
-/*!
- * \name TCP_LAST_16BYTES_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
-    {"ACK_NUM", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
-    {"CHECKSUM", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
-    {"HDR_LEN_AND_FLAGS", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
-    {"SEQ_NUM", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
-    {"URGENT_PTR", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
-    {"WIN_SIZE", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
-    {"tcp_last_16bytes_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
-
-/*!
- * \name UDP_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_CHECKSUM   0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_DST_PORT   1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_SRC_PORT   2
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_UDP_LENGTH 3
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT          4
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_CHECKSUM},\
-    {"DST_PORT", BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_DST_PORT},\
-    {"SRC_PORT", BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_SRC_PORT},\
-    {"UDP_LENGTH", BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_UDP_LENGTH},\
-    {"udp_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L3_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
-    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
-    {"unknown_l3_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L4_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
-    {"unknown_l4_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L5_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
-    {"L5_BYTES_0_1", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
-    {"L5_BYTES_2_3", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
-    {"L5_BYTES_4_7", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
-    {"unknown_l5_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
-
-/*!
- * \name VLAN_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_CFI  0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_PCP  1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_TPID 2
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_VID  3
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT          4
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
-    {"CFI", BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_CFI},\
-    {"PCP", BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_PCP},\
-    {"TPID", BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_TPID},\
-    {"VID", BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_VID},\
-    {"vlan_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT}
-
-/*!
- * \name VXLAN_T field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_RESERVED2        1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_VN_ID            2
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT          3
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS_RESERVED_1", BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
-    {"RESERVED2", BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_RESERVED2},\
-    {"VN_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_VN_ID},\
-    {"vxlan_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT}
-
-
-#endif /* BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h
deleted file mode 100644
index 0f8d5395a611..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H
-
-/*!
- * \name RX flex metadata field IDs.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DVP_15_0                                       1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              2
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         3
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         4
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0                      5
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0                     6
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                      7
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                     8
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0                           9
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                        10
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                       11
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       12
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              13
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                             14
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                            15
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_8_0                            16
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 17
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    18
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    19
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    20
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    21
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0                             22
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    23
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  24
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0              25
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0                              26
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            27
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            28
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   29
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        30
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              31
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             32
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0                            33
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                34
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_VFI_15_0                                       35
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_FID_COUNT                       36
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT                    21
-
-/*!
- * \name Packet Flex Reason Types.
- */
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                  0
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP                        1
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                  2
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT                      3
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP              4
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS         5
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD             6
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE         7
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP              8
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS         9
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR               10
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR               11
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL           12
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST            13
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED    14
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU             15
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 16
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT               17
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 18
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                  19
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP                        20
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
-    {"CML_FLAGS", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
-    {"IFP", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP},\
-    {"IFP_METER", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
-    {"IVXLT", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
-    {"L2_DST_LOOKUP", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
-    {"L2_DST_LOOKUP_MISS", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
-    {"L2_SRC_DISCARD", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\
-    {"L2_SRC_STATIC_MOVE", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
-    {"L3_DST_LOOKUP", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
-    {"L3_DST_LOOKUP_MISS", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
-    {"L3_HDR_ERROR", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
-    {"L3_TTL_ERROR", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
-    {"LEARN_CACHE_FULL", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
-    {"MACSA_MULTICAST", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\
-    {"MEMBERSHIP_CHECK_FAILED", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
-    {"NO_COPY_TO_CPU", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
-    {"PKT_INTEGRITY_CHECK_FAILED", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
-    {"PROTOCOL_PKT", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
-    {"SPANNING_TREE_CHECK_FAILED", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
-    {"TRACE_DOP", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
-    {"VFP", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP},\
-    {"flex reason count", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT}
-
-#endif /* BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h
deleted file mode 100644
index 09d3cb27aa41..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h
+++ /dev/null
@@ -1,213 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56890_a0_cna_6_5_29_sf_match_id_info.yml
- * for device bcm56890_a0 and variant cna_6_5_29.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-
-/*!
- * \brief Get the Match ID DataBase information.
- *
- * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
-*/
-extern bcmpkt_rxpmd_match_id_db_info_t *
-    bcm56890_a0_cna_6_5_29_rxpmd_match_id_db_info_get(void);
-
-/*!
- * \brief Get the Match ID Mapping information.
- *
- * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
-*/
-extern bcmpkt_rxpmd_match_id_map_info_t *
-    bcm56890_a0_cna_6_5_29_rxpmd_match_id_map_info_get(void);
-
-/*!
-  \name RXPMD Match IDs
-*/
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  0
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  1
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  2
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  3
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  4
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  5
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  6
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  7
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  8
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  9
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  10
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  11
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  12
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  13
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  14
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  15
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  16
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  17
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  18
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  19
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  20
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  21
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  22
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  23
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  24
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  25
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  26
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  27
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  28
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  29
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  30
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  31
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  32
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  33
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  34
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  35
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  36
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  37
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  38
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  39
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  40
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  41
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  42
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  43
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  44
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  45
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  46
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  47
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  48
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  49
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  50
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  51
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  52
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  53
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  54
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  55
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  56
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  57
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  58
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  59
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  60
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  61
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  62
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  63
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  64
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  65
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  66
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  67
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  68
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  69
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  70
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  71
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  72
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  73
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  74
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  75
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  76
-#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT  77
-
-#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
-    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
-    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"EGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
-    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"INGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
-    {"rxpmd_match_id_count", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT}
-
-#endif /*! BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h
new file mode 100644
index 000000000000..5a0497165ae7
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h
@@ -0,0 +1,96 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_H
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T                      0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T         1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T         2
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T            3
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T        4
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T         5
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T                6
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T         7
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T                     8
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T                    9
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T                     10
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T                     11
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T                       12
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T         13
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T         14
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   15
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T   16
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T   17
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T                     18
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T         19
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T         20
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T                      21
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T               22
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T               23
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T               24
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T                     25
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T                    26
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_T               27
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT    28
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T},\
+    {"cpu_composites_0_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"ep_nih_header_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T},\
+    {"erspan3_fixed_hdr_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"ethertype_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T},\
+    {"generic_loopback_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"icmp_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T},\
+    {"ipfix_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_1_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\
+    {"psamp_mirror_on_drop_2_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\
+    {"rarp_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T},\
+    {"tcp_first_4bytes_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T},\
+    {"vxlan_t", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T},\
+    {"RXPMD_FLEX_T", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h
new file mode 100644
index 000000000000..b7c0fb4f3492
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h
@@ -0,0 +1,592 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_OPERATION     2
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name EP_NIH_HEADER_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_START                10
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"HEADER_SUBTYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
+    {"HEADER_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
+    {"OPAQUE_CTRL_A", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
+    {"OPAQUE_CTRL_B", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
+    {"OPAQUE_CTRL_C", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
+    {"OPAQUE_OBJECT_A", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
+    {"OPAQUE_OBJECT_B", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
+    {"OPAQUE_OBJECT_C", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
+    {"RECIRC_PROFILE_INDEX", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
+    {"RESERVED_0", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
+    {"START", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_START},\
+    {"TIMESTAMP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
+    {"ep_nih_header_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"RESERVED_2", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
+    {"SOURCE_SYSTEM_PORT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CODE      1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_DA                0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_ID                3
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_OPTION            4
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_SA                6
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOS               7
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TTL               9
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_DA             0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_SA             5
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACDA 0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACSA 1
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_1_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON    0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL      2
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH     3
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA     4
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR  5
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT          6
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \
+    {"ING_DROP_REASON", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\
+    {"MIRROR_ON_DROP_OBJ", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\
+    {"MMU_DROP_CTRL", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\
+    {"SAMPLED_LENGTH", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_1_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_2_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON       0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0            2
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH        3
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA        4
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR     5
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT          6
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \
+    {"EGR_DROP_REASON", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\
+    {"EP_COPY_SESSION_INDEX", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\
+    {"RESERVED_0", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_2_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_OPERATION     2
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"unknown_l5_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_CFI  0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_PCP  1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_TPID 2
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_VID  3
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT}
+
+
+#endif /* BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 000000000000..e4fd6a6ccec8
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,124 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                       1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              2
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         3
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         4
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0                      5
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0                     6
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                      7
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                     8
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0                           9
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                        10
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                       11
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       12
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              13
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                             14
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                            15
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_8_0                            16
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 17
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    18
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    19
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    20
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    21
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0                             22
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    23
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  24
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0              25
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0                              26
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            27
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            28
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   29
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        30
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              31
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             32
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0                            33
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                34
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                       35
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       36
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    21
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                  0
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP                        1
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                  2
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                      3
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP              4
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS         5
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD             6
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE         7
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP              8
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS         9
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR               10
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR               11
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL           12
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST            13
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED    14
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU             15
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 16
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT               17
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 18
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                  19
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP                        20
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CML_FLAGS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"IFP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IVXLT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_DISCARD", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\
+    {"L2_SRC_STATIC_MOVE", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_TTL_ERROR", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\
+    {"MEMBERSHIP_CHECK_FAILED", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
+    {"NO_COPY_TO_CPU", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"SPANNING_TREE_CHECK_FAILED", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
+    {"TRACE_DOP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"VFP", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 000000000000..6d34bc8283a2
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,213 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56890_a0_cna_6_5_30_2_0_sf_match_id_info.yml
+ * for device bcm56890_a0 and variant cna_6_5_30_2_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  0
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  1
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  2
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  3
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  4
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  5
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  6
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  7
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  8
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  9
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  10
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  11
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  12
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  13
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  14
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  15
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  16
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  17
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  18
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  19
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  20
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  21
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  22
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  23
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  24
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  25
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  26
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  27
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  28
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  29
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  30
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  31
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  32
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  33
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  34
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  35
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  36
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  37
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  38
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  39
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  40
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  41
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  42
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  43
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  44
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  45
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  46
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  47
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  48
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  49
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  50
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  51
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  52
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  53
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  54
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  55
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  56
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  57
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  58
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  59
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  60
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  61
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  62
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  63
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  64
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  65
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  66
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  67
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  68
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  69
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  70
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  71
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  72
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  73
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  74
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  75
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  76
+#define BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT  77
+
+#define BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr.h
deleted file mode 100644
index 76e4d02bf43d..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr.h
+++ /dev/null
@@ -1,184 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_H
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_H
-
-#include <bcmpkt/bcmpkt_flexhdr_internal.h>
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T                      0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T                   1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T                      2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T                    3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T         4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T         5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T              6
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T            7
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T        8
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T         9
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T                      10
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T                11
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T                     12
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T        13
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T         14
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T                      15
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T               16
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T                  17
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T                 18
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T                  19
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T                      20
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T                 21
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T          22
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T               23
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T                     24
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T          25
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T          26
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T            27
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T            28
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T            29
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T               30
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T              31
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T             32
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T                     33
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T                 34
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T                    35
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T                     36
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T                     37
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T                       38
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T         39
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T         40
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T                 41
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T                  42
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T                  43
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T                     44
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T                   45
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T             46
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T                  47
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T                  48
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   49
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   50
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T                     51
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T                  52
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T                    53
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T      54
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T          55
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T             56
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T             57
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T             58
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T                 59
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T           60
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T                    61
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T         62
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T         63
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T                      64
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T               65
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T               66
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T               67
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T                     68
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T                    69
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T                     70
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_T               71
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_COUNT    72
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_NAME_MAP_INIT \
-    {"arp_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T},\
-    {"authen_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T},\
-    {"bfd_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T},\
-    {"cntag_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T},\
-    {"cpu_composites_0_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T},\
-    {"cpu_composites_1_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T},\
-    {"dest_option_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T},\
-    {"ep_nih_header_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T},\
-    {"erspan3_fixed_hdr_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T},\
-    {"erspan3_subhdr_5_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T},\
-    {"esp_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T},\
-    {"ethertype_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T},\
-    {"frag_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T},\
-    {"gbp_ethernet_shim_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T},\
-    {"generic_loopback_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T},\
-    {"gpe_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T},\
-    {"gre_chksum_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T},\
-    {"gre_key_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T},\
-    {"gre_rout_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T},\
-    {"gre_seq_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T},\
-    {"gre_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T},\
-    {"hg3_base_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T},\
-    {"hg3_extension_0_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T},\
-    {"hop_by_hop_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T},\
-    {"icmp_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T},\
-    {"ifa_flex_md_0_a_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T},\
-    {"ifa_flex_md_0_b_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T},\
-    {"ifa_flex_md_1_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T},\
-    {"ifa_flex_md_2_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T},\
-    {"ifa_flex_md_3_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T},\
-    {"ifa_header_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T},\
-    {"ifa_md_base_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T},\
-    {"ifa_metadata_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T},\
-    {"igmp_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T},\
-    {"ioam_e2e_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T},\
-    {"ipfix_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T},\
-    {"ipv4_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T},\
-    {"ipv6_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T},\
-    {"l2_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T},\
-    {"mirror_erspan_sn_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T},\
-    {"mirror_transport_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T},\
-    {"mpls_ach_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T},\
-    {"mpls_bv_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T},\
-    {"mpls_cw_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T},\
-    {"mpls_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T},\
-    {"p_1588_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T},\
-    {"prog_ext_hdr_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T},\
-    {"psamp_0_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T},\
-    {"psamp_1_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T},\
-    {"psamp_mirror_on_drop_0_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
-    {"psamp_mirror_on_drop_3_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
-    {"rarp_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T},\
-    {"routing_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T},\
-    {"rspan_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T},\
-    {"segment_routing_srh_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T},\
-    {"segment_routing_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T},\
-    {"sflow_shim_0_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T},\
-    {"sflow_shim_1_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T},\
-    {"sflow_shim_2_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T},\
-    {"snap_llc_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T},\
-    {"std_segment_id_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T},\
-    {"svtag_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T},\
-    {"tcp_first_4bytes_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T},\
-    {"tcp_last_16bytes_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T},\
-    {"udp_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T},\
-    {"unknown_l3_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T},\
-    {"unknown_l4_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T},\
-    {"unknown_l5_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T},\
-    {"vlan_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T},\
-    {"vxlan_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T},\
-    {"wesp_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T},\
-    {"RXPMD_FLEX_T", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_T},\
-    {"flexhdr count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_COUNT}
-
-#endif /* BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr_data.h
deleted file mode 100644
index d264e5895eac..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr_data.h
+++ /dev/null
@@ -1,1405 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) header.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_DATA_H
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_DATA_H
-
-/*!
- * \name ARP_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_HARDWARE_LEN  0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_HARDWARE_TYPE 1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_OPERATION     2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_PROT_ADDR_LEN 3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_PROTOCOL_TYPE 4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_SENDER_HA     5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_SENDER_IP     6
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_TARGET_HA     7
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_TARGET_IP     8
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_FID_COUNT          9
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_TARGET_IP},\
-    {"arp_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_FID_COUNT}
-
-/*!
- * \name AUTHEN_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_DATA        0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_NEXT_HEADER 1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_RESERVED    3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_SEQ_NUM     4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_SPI         5
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_FID_COUNT          6
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_DATA},\
-    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_NEXT_HEADER},\
-    {"PAYLOAD_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
-    {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_RESERVED},\
-    {"SEQ_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_SEQ_NUM},\
-    {"SPI", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_SPI},\
-    {"authen_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_FID_COUNT}
-
-/*!
- * \name BFD_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_AP            0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_BFD_LENGTH    1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_CPI           2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DEM           3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DESMINTXINTV  4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DETECTMULT    5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DIAG          6
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FIN           7
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_MINECHORXINTV 8
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_MPT           9
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_MYDISCRIM     10
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_POLL          11
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_REQMINRXINTV  12
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_STA           13
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_URDISCRIM     14
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_VERSION       15
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FID_COUNT          16
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
-    {"AP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_AP},\
-    {"BFD_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_BFD_LENGTH},\
-    {"CPI", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_CPI},\
-    {"DEM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DEM},\
-    {"DESMINTXINTV", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DESMINTXINTV},\
-    {"DETECTMULT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DETECTMULT},\
-    {"DIAG", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DIAG},\
-    {"FIN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FIN},\
-    {"MINECHORXINTV", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_MINECHORXINTV},\
-    {"MPT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_MPT},\
-    {"MYDISCRIM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_MYDISCRIM},\
-    {"POLL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_POLL},\
-    {"REQMINRXINTV", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_REQMINRXINTV},\
-    {"STA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_STA},\
-    {"URDISCRIM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_URDISCRIM},\
-    {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_VERSION},\
-    {"bfd_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FID_COUNT}
-
-/*!
- * \name CNTAG_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_RPID 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_TPID 1
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_FID_COUNT          2
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
-    {"RPID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_RPID},\
-    {"TPID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_TPID},\
-    {"cntag_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_0_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT0", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
-    {"DMA_CONT1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
-    {"DMA_CONT2", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
-    {"DMA_CONT3", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
-    {"DMA_CONT4", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
-    {"DMA_CONT5", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
-    {"DMA_CONT6", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
-    {"cpu_composites_0_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
-
-/*!
- * \name CPU_COMPOSITES_1_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
-    {"DMA_CONT10", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
-    {"DMA_CONT11", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
-    {"DMA_CONT12", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
-    {"DMA_CONT13", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
-    {"DMA_CONT14", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
-    {"DMA_CONT15", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
-    {"DMA_CONT16", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
-    {"DMA_CONT17", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
-    {"DMA_CONT7", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
-    {"DMA_CONT8", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
-    {"DMA_CONT9", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
-    {"cpu_composites_1_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
-
-/*!
- * \name DEST_OPTION_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_OPTION      2
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_FID_COUNT          3
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
-    {"OPTION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_OPTION},\
-    {"dest_option_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_FID_COUNT}
-
-/*!
- * \name EP_NIH_HEADER_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_START                10
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"HEADER_SUBTYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
-    {"HEADER_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
-    {"OPAQUE_CTRL_A", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
-    {"OPAQUE_CTRL_B", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
-    {"OPAQUE_CTRL_C", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
-    {"OPAQUE_OBJECT_A", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
-    {"OPAQUE_OBJECT_B", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
-    {"OPAQUE_OBJECT_C", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
-    {"RECIRC_PROFILE_INDEX", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
-    {"RESERVED_0", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
-    {"START", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_START},\
-    {"TIMESTAMP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
-    {"ep_nih_header_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_FIXED_HDR_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
-    {"BSO", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
-    {"COS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
-    {"GBP_SID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
-    {"P_FT_HWID_D_GRA_O", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
-    {"SESSION_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
-    {"T", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
-    {"TIMESTAMP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
-    {"VER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
-    {"VLAN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
-    {"erspan3_fixed_hdr_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
-
-/*!
- * \name ERSPAN3_SUBHDR_5_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
-    {"PLATFORM_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
-    {"PORT_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
-    {"SWITCH_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
-    {"TIMESTAMP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
-    {"erspan3_subhdr_5_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
-
-/*!
- * \name ESP_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_NEXT_HEADER 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_PAD         1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_PAD_LEN     2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_SEQ_NUM     3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_SPI         4
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_FID_COUNT          5
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
-    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_NEXT_HEADER},\
-    {"PAD", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_PAD},\
-    {"PAD_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_PAD_LEN},\
-    {"SEQ_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_SEQ_NUM},\
-    {"SPI", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_SPI},\
-    {"esp_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_FID_COUNT}
-
-/*!
- * \name ETHERTYPE_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_TYPE 0
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_FID_COUNT          1
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
-    {"TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_TYPE},\
-    {"ethertype_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_FID_COUNT}
-
-/*!
- * \name FRAG_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FRAG_INFO   0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_ID          1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_NEXT_HEADER 2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_RESERVED    3
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FID_COUNT          4
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
-    {"FRAG_INFO", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FRAG_INFO},\
-    {"ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_ID},\
-    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_NEXT_HEADER},\
-    {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_RESERVED},\
-    {"frag_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FID_COUNT}
-
-/*!
- * \name GBP_ETHERNET_SHIM_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS     1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED  2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_SID       3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE   4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_VER       5
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT          6
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \
-    {"ETHERTYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\
-    {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\
-    {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\
-    {"SID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\
-    {"SUBTYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\
-    {"VER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\
-    {"gbp_ethernet_shim_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT}
-
-/*!
- * \name GENERIC_LOOPBACK_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM    13
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
-    {"DESTINATION_OBJ", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
-    {"DESTINATION_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
-    {"ENTROPY_OBJ", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
-    {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
-    {"HEADER_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
-    {"INPUT_PRIORITY", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
-    {"INTERFACE_CTRL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
-    {"INTERFACE_OBJ", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
-    {"PROCESSING_CTRL_0", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
-    {"PROCESSING_CTRL_1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
-    {"QOS_OBJ", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
-    {"RESERVED_1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
-    {"SOURCE_SYSTEM_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
-    {"SRC_SUBPORT_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\
-    {"START_BYTE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
-    {"generic_loopback_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP         0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF        1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED      2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP            3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP          4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP          5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP    6
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP    7
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1    8
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER   9
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT   10
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
-
-/*!
- * \name GPE_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FLAGS         0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_NEXT_PROTOCOL 1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_RESERVED0     2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_RESERVED1     3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_VNI           4
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FID_COUNT          5
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FLAGS},\
-    {"NEXT_PROTOCOL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_NEXT_PROTOCOL},\
-    {"RESERVED0", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_RESERVED0},\
-    {"RESERVED1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_RESERVED1},\
-    {"VNI", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_VNI},\
-    {"gpe_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FID_COUNT}
-
-/*!
- * \name GRE_CHKSUM_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_OFFSET   1
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
-    {"OFFSET", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_OFFSET},\
-    {"gre_chksum_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
-
-/*!
- * \name GRE_KEY_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_KEY 0
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_FID_COUNT          1
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
-    {"KEY", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_KEY},\
-    {"gre_key_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_FID_COUNT}
-
-/*!
- * \name GRE_ROUT_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_ROUTING 0
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_FID_COUNT          1
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
-    {"ROUTING", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_ROUTING},\
-    {"gre_rout_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_FID_COUNT}
-
-/*!
- * \name GRE_SEQ_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_SEQUENCE 0
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_FID_COUNT          1
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_SEQUENCE},\
-    {"gre_seq_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_FID_COUNT}
-
-/*!
- * \name GRE_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_C_R_K_S  0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_PROTOCOL 1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_RESERVED 2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_VERSION  3
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_FID_COUNT          4
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
-    {"C_R_K_S", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_C_R_K_S},\
-    {"PROTOCOL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_PROTOCOL},\
-    {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_RESERVED},\
-    {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_VERSION},\
-    {"gre_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_FID_COUNT}
-
-/*!
- * \name HG3_BASE_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_CN                      0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_CNG                     1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_ENTROPY                 2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT         3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_HG3_RESERVED            4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_L3_ROUTED               5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_MIRROR_COPY             6
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_RESERVED_ETYPE          7
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION      8
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE           10
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_TC                      11
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_VERSION                 12
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_FID_COUNT          13
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \
-    {"CN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_CN},\
-    {"CNG", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_CNG},\
-    {"ENTROPY", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_ENTROPY},\
-    {"EXT_HDR_PRESENT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\
-    {"HG3_RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_HG3_RESERVED},\
-    {"L3_ROUTED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_L3_ROUTED},\
-    {"MIRROR_COPY", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_MIRROR_COPY},\
-    {"RESERVED_ETYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\
-    {"SYSTEM_DESTINATION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\
-    {"SYSTEM_DESTINATION_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\
-    {"SYSTEM_SOURCE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\
-    {"TC", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_TC},\
-    {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_VERSION},\
-    {"hg3_base_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_FID_COUNT}
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP         0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF        1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED      2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP            3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP          4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP          5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP    6
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP    7
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1    8
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER   9
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT   10
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11
-
-/*!
- * \name HG3_EXTENSION_0_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB      0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB      1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF     2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FLAGS             3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_SVP               5
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT          6
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \
-    {"CLASS_ID_LSB", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\
-    {"CLASS_ID_MSB", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\
-    {"DVP_OR_L3_IIF", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\
-    {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\
-    {"FORWARDING_DOMAIN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\
-    {"SVP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_SVP},\
-    {"hg3_extension_0_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT}
-
-/*!
- * \name HOP_BY_HOP_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_OPTION      2
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
-    {"OPTION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_OPTION},\
-    {"hop_by_hop_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
-
-/*!
- * \name ICMP_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_CHECKSUM  0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_CODE      1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_ICMP_TYPE 2
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_FID_COUNT          3
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_CHECKSUM},\
-    {"CODE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_CODE},\
-    {"ICMP_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_ICMP_TYPE},\
-    {"icmp_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_0_A_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL   0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT          2
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \
-    {"FWD_HDR_TTL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\
-    {"LNS_DEVICE_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\
-    {"ifa_flex_md_0_a_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_0_B_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_CN               0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED       1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID         2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT          4
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \
-    {"CN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\
-    {"PORT_SPEED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\
-    {"QUEUE_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\
-    {"RX_TIMESTAMP_SEC", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\
-    {"ifa_flex_md_0_b_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_1_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID       0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID      1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT          3
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PORT_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\
-    {"INGRESS_PORT_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\
-    {"RX_TIMESTAMP_NANOSEC", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\
-    {"ifa_flex_md_1_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_2_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT    1
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT          2
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \
-    {"RESIDENCE_TIME_NANOSEC", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\
-    {"TX_QUEUE_BYTE_COUNT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\
-    {"ifa_flex_md_2_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT}
-
-/*!
- * \name IFA_FLEX_MD_3_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT          2
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \
-    {"MMU_STAT_0", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\
-    {"MMU_STAT_1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\
-    {"ifa_flex_md_3_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT}
-
-/*!
- * \name IFA_HEADER_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FLAGS      0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_GNS        1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_VER        4
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FID_COUNT          5
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FLAGS},\
-    {"GNS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_GNS},\
-    {"MAX_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
-    {"NEXT_HDR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
-    {"VER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_VER},\
-    {"ifa_header_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FID_COUNT}
-
-/*!
- * \name IFA_MD_BASE_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR            0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR           2
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT          3
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \
-    {"ACTION_VECTOR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\
-    {"HOP_LIMIT_CURRENT_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
-    {"REQUEST_VECTOR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\
-    {"ifa_md_base_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT}
-
-/*!
- * \name IFA_METADATA_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_ACTION_VECTOR            0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_METADATA                 2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR           3
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_FID_COUNT          4
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \
-    {"ACTION_VECTOR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\
-    {"HOP_LIMIT_CURRENT_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\
-    {"METADATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_METADATA},\
-    {"REQUEST_VECTOR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\
-    {"ifa_metadata_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_FID_COUNT}
-
-/*!
- * \name IGMP_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_CHECKSUM      0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_GROUP_ADDRESS 1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_IGMP_TYPE     2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_MAX_RESP_TIME 3
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_FID_COUNT          4
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_CHECKSUM},\
-    {"GROUP_ADDRESS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_GROUP_ADDRESS},\
-    {"IGMP_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_IGMP_TYPE},\
-    {"MAX_RESP_TIME", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_MAX_RESP_TIME},\
-    {"igmp_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_FID_COUNT}
-
-/*!
- * \name IOAM_E2E_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN  2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_NAMESPACE_ID  3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_RESERVED      5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_TYPE          6
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_FID_COUNT          7
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \
-    {"IOAM_E2E_DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\
-    {"IOAM_E2E_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\
-    {"IOAM_HDR_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\
-    {"NAMESPACE_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\
-    {"NEXT_PROTOCOL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\
-    {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_RESERVED},\
-    {"TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_TYPE},\
-    {"ioam_e2e_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_FID_COUNT}
-
-/*!
- * \name IPFIX_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_EXPORT_TIME   0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_LENGTH        1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_VERSION       4
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_FID_COUNT          5
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
-    {"EXPORT_TIME", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_EXPORT_TIME},\
-    {"LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_LENGTH},\
-    {"OBS_DOMAIN_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
-    {"SEQUENCE_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
-    {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_VERSION},\
-    {"ipfix_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_FID_COUNT}
-
-/*!
- * \name IPV4_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_DA                0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_HDR_CHECKSUM      2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_ID                3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_OPTION            4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_PROTOCOL          5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_SA                6
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_TOS               7
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_TOTAL_LENGTH      8
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_TTL               9
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FID_COUNT          11
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_DA},\
-    {"FLAGS_FRAG_OFFSET", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
-    {"HDR_CHECKSUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_HDR_CHECKSUM},\
-    {"ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_ID},\
-    {"OPTION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_OPTION},\
-    {"PROTOCOL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_PROTOCOL},\
-    {"SA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_SA},\
-    {"TOS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_TOS},\
-    {"TOTAL_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_TOTAL_LENGTH},\
-    {"TTL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_TTL},\
-    {"VERSION_HDR_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
-    {"ipv4_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FID_COUNT}
-
-/*!
- * \name IPV6_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_DA             0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FLOW_LABEL     1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_HOP_LIMIT      2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_NEXT_HEADER    3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_SA             5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_VERSION        7
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FID_COUNT          8
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
-    {"DA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_DA},\
-    {"FLOW_LABEL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FLOW_LABEL},\
-    {"HOP_LIMIT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_HOP_LIMIT},\
-    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_NEXT_HEADER},\
-    {"PAYLOAD_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
-    {"SA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_SA},\
-    {"TRAFFIC_CLASS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
-    {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_VERSION},\
-    {"ipv6_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FID_COUNT}
-
-/*!
- * \name L2_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_MACDA 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_MACSA 1
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_FID_COUNT          2
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
-    {"MACDA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_MACDA},\
-    {"MACSA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_MACSA},\
-    {"l2_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_FID_COUNT}
-
-/*!
- * \name MIRROR_ERSPAN_SN_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
-    {"SEQ_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
-    {"mirror_erspan_sn_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
-
-/*!
- * \name MIRROR_TRANSPORT_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
-    {"mirror_transport_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
-
-/*!
- * \name MPLS_ACH_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_CW_TYPE      1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_RESERVED     2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_VERSION      3
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_FID_COUNT          4
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
-    {"CHANNEL_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
-    {"CW_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_CW_TYPE},\
-    {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_RESERVED},\
-    {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_VERSION},\
-    {"mpls_ach_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_FID_COUNT}
-
-/*!
- * \name MPLS_BV_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_VALUE 0
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_FID_COUNT          1
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
-    {"VALUE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_VALUE},\
-    {"mpls_bv_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_FID_COUNT}
-
-/*!
- * \name MPLS_CW_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_CW_TYPE    0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_RESERVED   1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_FID_COUNT          3
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
-    {"CW_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_CW_TYPE},\
-    {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_RESERVED},\
-    {"SEQ_NUMBER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
-    {"mpls_cw_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_FID_COUNT}
-
-/*!
- * \name MPLS_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_BOS   0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_EXP   1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_LABEL 2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_TTL   3
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_FID_COUNT          4
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
-    {"BOS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_BOS},\
-    {"EXP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_EXP},\
-    {"LABEL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_LABEL},\
-    {"TTL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_TTL},\
-    {"mpls_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_FID_COUNT}
-
-/*!
- * \name P_1588_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_CNTRL          0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_CORRECTION     1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_DOMAIN_NB      2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FLAGS          3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_MSG_LENGTH     5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_MSG_TYPE       6
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_RESERVED1      7
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_RESERVED2      8
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_RESERVED3      9
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_SEQ_ID         10
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_SRCPORTID      11
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_TRANSPORTSPEC  12
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_VERSION        13
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FID_COUNT          14
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
-    {"CNTRL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_CNTRL},\
-    {"CORRECTION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_CORRECTION},\
-    {"DOMAIN_NB", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_DOMAIN_NB},\
-    {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FLAGS},\
-    {"LOGMSGINTERVAL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
-    {"MSG_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_MSG_LENGTH},\
-    {"MSG_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_MSG_TYPE},\
-    {"RESERVED1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_RESERVED1},\
-    {"RESERVED2", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_RESERVED2},\
-    {"RESERVED3", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_RESERVED3},\
-    {"SEQ_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_SEQ_ID},\
-    {"SRCPORTID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_SRCPORTID},\
-    {"TRANSPORTSPEC", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_TRANSPORTSPEC},\
-    {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_VERSION},\
-    {"p_1588_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FID_COUNT}
-
-/*!
- * \name PROG_EXT_HDR_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_OPTION      2
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
-    {"OPTION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_OPTION},\
-    {"prog_ext_hdr_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
-
-/*!
- * \name PSAMP_0_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FLOWSET        0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_LENGTH         1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FID_COUNT          6
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
-    {"FLOWSET", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FLOWSET},\
-    {"LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_LENGTH},\
-    {"NEXT_HOP_INDEX", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
-    {"OBS_TIME_NS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
-    {"TEMPLATE_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
-    {"psamp_0_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_1_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_DLB_ID         0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_EPOCH          2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_USER_META_DATA 5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_FID_COUNT          7
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
-    {"DLB_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_DLB_ID},\
-    {"EGRESS_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
-    {"EPOCH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_EPOCH},\
-    {"INGRESS_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
-    {"SAMPLED_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
-    {"USER_META_DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_USER_META_DATA},\
-    {"VARIABLE_FLAG", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
-    {"psamp_1_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
-    {"EGRESS_MOD_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
-    {"INGRESS_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
-    {"LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
-    {"OBS_TIME_NS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
-    {"OBS_TIME_S", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
-    {"SWITCH_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
-    {"TEMPLATE_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
-    {"psamp_mirror_on_drop_0_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
-
-/*!
- * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE              3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
-    {"DROP_REASON", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
-    {"RESERVED_0", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
-    {"SAMPLED_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
-    {"SMOD_STATE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\
-    {"UC_COS__COLOR__PROB_IDX", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
-    {"USER_META_DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
-    {"VAR_LEN_INDICATOR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
-    {"psamp_mirror_on_drop_3_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
-
-/*!
- * \name RARP_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_HARDWARE_LEN  0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_HARDWARE_TYPE 1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_OPERATION     2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_PROT_ADDR_LEN 3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_PROTOCOL_TYPE 4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_SENDER_HA     5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_SENDER_IP     6
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_TARGET_HA     7
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_TARGET_IP     8
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_FID_COUNT          9
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
-    {"HARDWARE_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_HARDWARE_LEN},\
-    {"HARDWARE_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_HARDWARE_TYPE},\
-    {"OPERATION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_OPERATION},\
-    {"PROT_ADDR_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_PROT_ADDR_LEN},\
-    {"PROTOCOL_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_PROTOCOL_TYPE},\
-    {"SENDER_HA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_SENDER_HA},\
-    {"SENDER_IP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_SENDER_IP},\
-    {"TARGET_HA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_TARGET_HA},\
-    {"TARGET_IP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_TARGET_IP},\
-    {"rarp_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_FID_COUNT}
-
-/*!
- * \name ROUTING_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_DATA          0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_NEXT_HEADER   2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_ROUTING_TYPE  3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_FID_COUNT          5
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_DATA},\
-    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
-    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_NEXT_HEADER},\
-    {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_ROUTING_TYPE},\
-    {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
-    {"routing_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_FID_COUNT}
-
-/*!
- * \name RSPAN_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_TAG  0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_TPID 1
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_FID_COUNT          2
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
-    {"TAG", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_TAG},\
-    {"TPID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_TPID},\
-    {"rspan_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_FID_COUNT}
-
-/*!
- * \name SEGMENT_ROUTING_SRH_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS         0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN   1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY    2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER   3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE  4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT 5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG           6
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT          7
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS},\
-    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN},\
-    {"LAST_ENTRY", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY},\
-    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER},\
-    {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE},\
-    {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT},\
-    {"TAG", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG},\
-    {"segment_routing_srh_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT}
-
-/*!
- * \name SEGMENT_ROUTING_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN      0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS 1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER      2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE     3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST         4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT    5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_TAG              6
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT          7
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT \
-    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN},\
-    {"LAST_ENTRY_FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS},\
-    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER},\
-    {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE},\
-    {"SEG_LIST", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST},\
-    {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT},\
-    {"TAG", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_TAG},\
-    {"segment_routing_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_0_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
-    {"SYS_DESTINATION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
-    {"SYS_SOURCE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
-    {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
-    {"sflow_shim_0_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_1_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
-    {"FLAG_DEST_SAMPLE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
-    {"FLAG_DISCARDED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
-    {"FLAG_FLEX_SAMPLE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
-    {"FLAG_MCAST", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
-    {"FLAG_SRC_SAMPLE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
-    {"FLAG_TRUNCATED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
-    {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
-    {"SYS_OPCODE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
-    {"sflow_shim_1_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
-
-/*!
- * \name SFLOW_SHIM_2_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
-    {"SEQUENCE_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
-    {"USER_META_DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
-    {"sflow_shim_2_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
-
-/*!
- * \name SNAP_LLC_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_LENGTH   0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_FID_COUNT          2
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
-    {"LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_LENGTH},\
-    {"SNAP_LLC", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
-    {"snap_llc_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_FID_COUNT}
-
-/*!
- * \name STD_SEGMENT_ID_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_DATA 0
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT          1
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT \
-    {"DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_DATA},\
-    {"std_segment_id_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT}
-
-/*!
- * \name SVTAG_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_DATA_LWR 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_DATA_UPR 1
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_FID_COUNT          2
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \
-    {"DATA_LWR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_DATA_LWR},\
-    {"DATA_UPR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_DATA_UPR},\
-    {"svtag_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_FID_COUNT}
-
-/*!
- * \name TCP_FIRST_4BYTES_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
-    {"DST_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
-    {"SRC_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
-    {"tcp_first_4bytes_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
-
-/*!
- * \name TCP_LAST_16BYTES_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
-    {"ACK_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
-    {"CHECKSUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
-    {"HDR_LEN_AND_FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
-    {"SEQ_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
-    {"URGENT_PTR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
-    {"WIN_SIZE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
-    {"tcp_last_16bytes_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
-
-/*!
- * \name UDP_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_CHECKSUM   0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_DST_PORT   1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_SRC_PORT   2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_UDP_LENGTH 3
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_FID_COUNT          4
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
-    {"CHECKSUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_CHECKSUM},\
-    {"DST_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_DST_PORT},\
-    {"SRC_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_SRC_PORT},\
-    {"UDP_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_UDP_LENGTH},\
-    {"udp_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L3_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
-    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
-    {"unknown_l3_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L4_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
-    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
-    {"unknown_l4_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
-
-/*!
- * \name UNKNOWN_L5_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT          4
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
-    {"L5_BYTES_0_1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
-    {"L5_BYTES_2_3", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
-    {"L5_BYTES_4_7", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
-    {"L5_BYTES_8_9", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\
-    {"unknown_l5_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
-
-/*!
- * \name VLAN_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_CFI  0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_PCP  1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_TPID 2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_VID  3
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_FID_COUNT          4
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
-    {"CFI", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_CFI},\
-    {"PCP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_PCP},\
-    {"TPID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_TPID},\
-    {"VID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_VID},\
-    {"vlan_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_FID_COUNT}
-
-/*!
- * \name VXLAN_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_RESERVED2        1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_VN_ID            2
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FID_COUNT          3
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS_RESERVED_1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
-    {"RESERVED2", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_RESERVED2},\
-    {"VN_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_VN_ID},\
-    {"vxlan_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FID_COUNT}
-
-/*!
- * \name WESP_T field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FLAGS       0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_HEADER_LEN  1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_NEXT_HEADER 2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_SEQ_NUM     3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_SPI         4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_TRAILER_LEN 5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_WESP_IV     6
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FID_COUNT          7
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
-    {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FLAGS},\
-    {"HEADER_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_HEADER_LEN},\
-    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_NEXT_HEADER},\
-    {"SEQ_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_SEQ_NUM},\
-    {"SPI", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_SPI},\
-    {"TRAILER_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_TRAILER_LEN},\
-    {"WESP_IV", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_WESP_IV},\
-    {"wesp_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FID_COUNT}
-
-
-#endif /* BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_flex_data.h
deleted file mode 100644
index 3913e6c5a434..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_flex_data.h
+++ /dev/null
@@ -1,198 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DATA_H
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DATA_H
-
-/*!
- * \name RX flex metadata field IDs.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_DATA_15_0                        0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_FLAGS_3_0                        1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0                                  3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DVP_15_0                                       5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0               6
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0        7
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         8
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         9
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0        10
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0                     11
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                      12
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                     13
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                        14
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                       15
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       16
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_FLOW_ID_LSB_15_0                               17
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_FLOW_ID_MSB_3_0                                18
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              19
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                        20
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      21
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                             22
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                            23
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_8_0                        24
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 25
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    26
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    27
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L2_IIF_12_0                                    28
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L2_OIF_12_0                                    29
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0                             30
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    31
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  32
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0                             33
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0                               34
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0                     35
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              36
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              37
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            38
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            39
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SRV6_DIP_EDIT_CTRL_3_0                         40
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0               41
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0                           42
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SRV6_SID_AND_PREFIX_LEN_ENC_3_0                43
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SVP_15_0                                       44
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   45
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SVTAG_CTRL_PKT_INFO_3_0                        46
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_OR_IFP_OPAQUE_OBJ_15_0          47
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0               48
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        49
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              50
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             51
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             52
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                53
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_VFI_15_0                                       54
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0   55
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_FID_COUNT                       56
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_COUNT                    48
-
-/*!
- * \name Packet Flex Reason Types.
- */
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE                         0
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               1
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DEFAULT                                 2
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 3
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED                    4
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  5
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED                     6
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  7
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   8
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS                         9
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP                                     10
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               11
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      12
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   13
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           14
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      15
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      16
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           17
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      18
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            19
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        20
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            21
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        22
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    23
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      24
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      25
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      26
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      27
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      28
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      29
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      30
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      31
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD            32
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              33
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  34
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    35
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          36
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              37
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            38
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                39
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         40
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SRV6                                    41
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SVP                                     42
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               43
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU                44
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR                     45
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       46
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_VFP                                     47
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
-    {"CB_STATION_MOVE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\
-    {"CML_FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
-    {"DEFAULT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DEFAULT},\
-    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DLB_ECMP_PKT_SAMPLED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\
-    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
-    {"DLB_LAG_PKT_SAMPLED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\
-    {"DST_FP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
-    {"EM_FT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
-    {"EM_FT_HPAE_MISS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS},\
-    {"IFP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP},\
-    {"IFP_METER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
-    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
-    {"IVXLT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
-    {"L2_DST_LOOKUP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
-    {"L2_DST_LOOKUP_MISS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
-    {"L2_SRC_STATIC_MOVE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
-    {"L3_DST_LOOKUP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
-    {"L3_DST_LOOKUP_MISS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
-    {"L3_HDR_ERROR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
-    {"L3_IIF_EQ_L3_OIF", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
-    {"L3_TTL_ERROR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
-    {"LEARN_CACHE_FULL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
-    {"MACSA_MULTICAST_RSVD", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
-    {"MATCHED_RULE_BIT_0", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
-    {"MATCHED_RULE_BIT_1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
-    {"MATCHED_RULE_BIT_2", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
-    {"MATCHED_RULE_BIT_3", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
-    {"MATCHED_RULE_BIT_4", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
-    {"MATCHED_RULE_BIT_5", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
-    {"MATCHED_RULE_BIT_6", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
-    {"MATCHED_RULE_BIT_7", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
-    {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\
-    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
-    {"MIRROR_SAMPLER_SAMPLED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
-    {"MPLS_CTRL_PKT_TO_CPU", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
-    {"NO_COPY_TO_CPU", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
-    {"PKT_INTEGRITY_CHECK_FAILED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
-    {"PROTOCOL_PKT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
-    {"SER_DROP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
-    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
-    {"SRV6", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SRV6},\
-    {"SVP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SVP},\
-    {"TRACE_DOP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
-    {"TRACE_DO_NOT_COPY_TO_CPU", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\
-    {"TRACE_DO_NOT_MIRROR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\
-    {"URPF_CHECK_FAILED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
-    {"VFP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_VFP},\
-    {"flex reason count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_COUNT}
-
-#endif /* BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id_defs.h
deleted file mode 100644
index ad98e5d86424..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id_defs.h
+++ /dev/null
@@ -1,515 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56890_a0_dna_6_5_29_1_2_sf_match_id_info.yml
- * for device bcm56890_a0 and variant dna_6_5_29_1_2.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#ifndef BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_MATCH_ID_DEFS_H
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-
-/*!
- * \brief Get the Match ID DataBase information.
- *
- * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
-*/
-extern bcmpkt_rxpmd_match_id_db_info_t *
-    bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db_info_get(void);
-
-/*!
- * \brief Get the Match ID Mapping information.
- *
- * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
-*/
-extern bcmpkt_rxpmd_match_id_map_info_t *
-    bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_map_info_get(void);
-
-/*!
-  \name RXPMD Match IDs
-*/
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG  0
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM  1
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE  2
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0  3
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  4
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  5
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  6
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  7
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  8
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG  9
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  10
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  11
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  12
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  13
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1  14
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2  15
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  16
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  17
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  18
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  19
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  20
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  21
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  22
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  23
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  24
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  25
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1  26
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2  27
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  28
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER  29
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA  30
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  31
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E  32
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  33
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  34
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  35
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  36
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  37
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  38
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  39
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  40
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  41
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  42
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  43
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  44
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  45
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1  46
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2  47
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  48
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1  49
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2  50
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1  51
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  52
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  53
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  54
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  55
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  56
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  57
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  58
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1  59
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2  60
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  61
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  62
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  63
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG  64
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM  65
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE  66
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0  67
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  68
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  69
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  70
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  71
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  72
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG  73
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  74
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  75
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  76
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  77
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1  78
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2  79
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  80
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  81
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  82
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  83
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  84
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  85
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  86
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  87
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  88
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  89
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1  90
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2  91
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  92
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER  93
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA  94
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  95
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E  96
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  97
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  98
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  99
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  100
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  101
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  102
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  103
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  104
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  105
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  106
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  107
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  108
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  109
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1  110
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2  111
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  112
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1  113
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2  114
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1  115
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  116
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  117
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  118
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  119
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  120
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  121
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  122
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1  123
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2  124
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG  125
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  126
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  127
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  128
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  129
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  130
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  131
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  132
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  133
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  134
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1  135
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2  136
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  137
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  138
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  139
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  140
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1  141
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2  142
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  143
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER  144
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA  145
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  146
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  147
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  148
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  149
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  150
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1  151
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2  152
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  153
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1  154
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2  155
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  156
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  157
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  158
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  159
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  160
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  161
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1  162
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2  163
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG  164
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM  165
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE  166
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0  167
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  168
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  169
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  170
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  171
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  172
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG  173
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  174
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  175
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  176
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  177
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1  178
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2  179
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  180
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  181
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  182
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  183
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  184
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  185
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  186
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  187
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  188
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  189
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1  190
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2  191
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  192
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER  193
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA  194
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  195
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E  196
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  197
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  198
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  199
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  200
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  201
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  202
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  203
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  204
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  205
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  206
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  207
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  208
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  209
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1  210
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2  211
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  212
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1  213
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2  214
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1  215
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  216
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  217
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  218
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  219
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  220
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  221
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  222
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1  223
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2  224
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  225
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  226
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  227
-#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_COUNT  228
-
-#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
-    {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \
-    {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \
-    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
-    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \
-    {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \
-    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"EGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
-    {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \
-    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \
-    {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
-    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \
-    {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
-    {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \
-    {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \
-    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
-    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
-    {"INGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
-    {"rxpmd_match_id_count", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_COUNT}
-
-#endif /*! BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr.h
new file mode 100644
index 000000000000..52afc1e47caf
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr.h
@@ -0,0 +1,176 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_H
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T                      0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T                   1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T                      2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T                    3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T         4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T         5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T              6
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T            7
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T        8
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T         9
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T                      10
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T                11
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T                     12
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T        13
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T         14
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T                      15
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T               16
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T                  17
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T                 18
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T                  19
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T                      20
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T                 21
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T          22
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T               23
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T                     24
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T               25
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T           26
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T           27
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T        28
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T                     29
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T                 30
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T                    31
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T                     32
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T                     33
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T                       34
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T         35
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T         36
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T                 37
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T                  38
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T                  39
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T                     40
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T                   41
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T             42
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T                  43
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T                  44
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   45
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   46
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T                     47
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T                  48
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T                    49
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T      50
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T          51
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T             52
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T             53
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T             54
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T                 55
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T           56
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T                    57
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T         58
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T         59
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T                      60
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T               61
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T               62
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T               63
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T                     64
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T                    65
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T                     66
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_T               67
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_COUNT    68
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T},\
+    {"authen_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T},\
+    {"bfd_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T},\
+    {"cntag_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T},\
+    {"cpu_composites_0_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"dest_option_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T},\
+    {"ep_nih_header_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T},\
+    {"erspan3_fixed_hdr_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"esp_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T},\
+    {"ethertype_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T},\
+    {"frag_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T},\
+    {"gbp_ethernet_shim_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T},\
+    {"generic_loopback_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"gpe_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T},\
+    {"gre_chksum_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T},\
+    {"gre_key_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T},\
+    {"gre_rout_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T},\
+    {"gre_seq_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T},\
+    {"gre_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T},\
+    {"hg3_base_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T},\
+    {"hg3_extension_0_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T},\
+    {"hop_by_hop_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T},\
+    {"icmp_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T},\
+    {"ifa_header_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T},\
+    {"ifa_metadata_a_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T},\
+    {"ifa_metadata_b_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T},\
+    {"ifa_metadata_base_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T},\
+    {"igmp_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T},\
+    {"ioam_e2e_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T},\
+    {"ipfix_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"mpls_ach_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T},\
+    {"mpls_bv_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T},\
+    {"mpls_cw_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T},\
+    {"mpls_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T},\
+    {"p_1588_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T},\
+    {"prog_ext_hdr_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T},\
+    {"psamp_0_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T},\
+    {"psamp_1_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_3_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
+    {"rarp_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T},\
+    {"routing_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T},\
+    {"rspan_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T},\
+    {"segment_routing_srh_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T},\
+    {"segment_routing_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T},\
+    {"sflow_shim_0_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T},\
+    {"sflow_shim_1_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T},\
+    {"sflow_shim_2_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T},\
+    {"snap_llc_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T},\
+    {"std_segment_id_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T},\
+    {"svtag_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T},\
+    {"tcp_first_4bytes_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T},\
+    {"vxlan_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T},\
+    {"wesp_t", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T},\
+    {"RXPMD_FLEX_T", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr_data.h
new file mode 100644
index 000000000000..765cb7355c7b
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr_data.h
@@ -0,0 +1,1361 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_DATA_H
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_OPERATION     2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name AUTHEN_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_DATA        0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_RESERVED    3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_SPI         5
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_FID_COUNT          6
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_DATA},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
+    {"PAYLOAD_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_RESERVED},\
+    {"SEQ_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
+    {"SPI", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_SPI},\
+    {"authen_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_FID_COUNT}
+
+/*!
+ * \name BFD_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_AP            0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_BFD_LENGTH    1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_CPI           2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DEM           3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DESMINTXINTV  4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DETECTMULT    5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DIAG          6
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FIN           7
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_MINECHORXINTV 8
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_MPT           9
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_MYDISCRIM     10
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_POLL          11
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_REQMINRXINTV  12
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_STA           13
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_URDISCRIM     14
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_VERSION       15
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FID_COUNT          16
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
+    {"AP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_AP},\
+    {"BFD_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_BFD_LENGTH},\
+    {"CPI", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_CPI},\
+    {"DEM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DEM},\
+    {"DESMINTXINTV", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DESMINTXINTV},\
+    {"DETECTMULT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DETECTMULT},\
+    {"DIAG", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_DIAG},\
+    {"FIN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FIN},\
+    {"MINECHORXINTV", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_MINECHORXINTV},\
+    {"MPT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_MPT},\
+    {"MYDISCRIM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_MYDISCRIM},\
+    {"POLL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_POLL},\
+    {"REQMINRXINTV", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_REQMINRXINTV},\
+    {"STA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_STA},\
+    {"URDISCRIM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_URDISCRIM},\
+    {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_VERSION},\
+    {"bfd_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FID_COUNT}
+
+/*!
+ * \name CNTAG_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_RPID 0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_TPID 1
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
+    {"RPID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_RPID},\
+    {"TPID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_TPID},\
+    {"cntag_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name DEST_OPTION_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_OPTION      2
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
+    {"OPTION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_OPTION},\
+    {"dest_option_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
+
+/*!
+ * \name EP_NIH_HEADER_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_START                10
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"HEADER_SUBTYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
+    {"HEADER_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
+    {"OPAQUE_CTRL_A", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
+    {"OPAQUE_CTRL_B", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
+    {"OPAQUE_CTRL_C", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
+    {"OPAQUE_OBJECT_A", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
+    {"OPAQUE_OBJECT_B", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
+    {"OPAQUE_OBJECT_C", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
+    {"RECIRC_PROFILE_INDEX", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
+    {"RESERVED_0", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
+    {"START", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_START},\
+    {"TIMESTAMP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
+    {"ep_nih_header_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ESP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_NEXT_HEADER 0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_PAD         1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_PAD_LEN     2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_SEQ_NUM     3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_SPI         4
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_FID_COUNT          5
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_NEXT_HEADER},\
+    {"PAD", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_PAD},\
+    {"PAD_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_PAD_LEN},\
+    {"SEQ_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_SEQ_NUM},\
+    {"SPI", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_SPI},\
+    {"esp_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name FRAG_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FRAG_INFO   0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_ID          1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_NEXT_HEADER 2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_RESERVED    3
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
+    {"FRAG_INFO", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FRAG_INFO},\
+    {"ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_ID},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_NEXT_HEADER},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_RESERVED},\
+    {"frag_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FID_COUNT}
+
+/*!
+ * \name GBP_ETHERNET_SHIM_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS     1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED  2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID       3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE   4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER       5
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT          6
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \
+    {"ETHERTYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\
+    {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\
+    {"SID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\
+    {"SUBTYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\
+    {"VER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\
+    {"gbp_ethernet_shim_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM    13
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"SOURCE_SYSTEM_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"SRC_SUBPORT_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\
+    {"START_BYTE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP         0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF        1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED      2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP            3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP          4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP          5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP    6
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP    7
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1    8
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER   9
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT   10
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
+
+/*!
+ * \name GPE_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FLAGS         0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_RESERVED0     2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_RESERVED1     3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_VNI           4
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FID_COUNT          5
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_RESERVED0},\
+    {"RESERVED1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_RESERVED1},\
+    {"VNI", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_VNI},\
+    {"gpe_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FID_COUNT}
+
+/*!
+ * \name GRE_CHKSUM_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
+    {"OFFSET", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
+    {"gre_chksum_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
+
+/*!
+ * \name GRE_KEY_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_KEY 0
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
+    {"KEY", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_KEY},\
+    {"gre_key_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_FID_COUNT}
+
+/*!
+ * \name GRE_ROUT_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_ROUTING 0
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
+    {"ROUTING", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_ROUTING},\
+    {"gre_rout_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
+
+/*!
+ * \name GRE_SEQ_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
+    {"gre_seq_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
+
+/*!
+ * \name GRE_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_C_R_K_S  0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_PROTOCOL 1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_RESERVED 2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_VERSION  3
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
+    {"C_R_K_S", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_C_R_K_S},\
+    {"PROTOCOL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_PROTOCOL},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_RESERVED},\
+    {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_VERSION},\
+    {"gre_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_FID_COUNT}
+
+/*!
+ * \name HG3_BASE_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_CN                      0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_CNG                     1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_ENTROPY                 2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT         3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_HG3_RESERVED            4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_L3_ROUTED               5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_MIRROR_COPY             6
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE          7
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION      8
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE           10
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_TC                      11
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_VERSION                 12
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_FID_COUNT          13
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_CN},\
+    {"CNG", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_CNG},\
+    {"ENTROPY", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_ENTROPY},\
+    {"EXT_HDR_PRESENT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\
+    {"HG3_RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\
+    {"L3_ROUTED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\
+    {"MIRROR_COPY", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\
+    {"RESERVED_ETYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\
+    {"SYSTEM_DESTINATION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\
+    {"SYSTEM_DESTINATION_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\
+    {"SYSTEM_SOURCE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\
+    {"TC", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_TC},\
+    {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_VERSION},\
+    {"hg3_base_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_FID_COUNT}
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP         0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF        1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED      2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP            3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP          4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP          5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP    6
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP    7
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1    8
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER   9
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT   10
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11
+
+/*!
+ * \name HG3_EXTENSION_0_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB      0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB      1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF     2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS             3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_SVP               5
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT          6
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \
+    {"CLASS_ID_LSB", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\
+    {"CLASS_ID_MSB", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\
+    {"DVP_OR_L3_IIF", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\
+    {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\
+    {"FORWARDING_DOMAIN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\
+    {"SVP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\
+    {"hg3_extension_0_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT}
+
+/*!
+ * \name HOP_BY_HOP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
+    {"OPTION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
+    {"hop_by_hop_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_CODE      1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IFA_HEADER_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FLAGS      0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_GNS        1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_VER        4
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FID_COUNT          5
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FLAGS},\
+    {"GNS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_GNS},\
+    {"MAX_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
+    {"NEXT_HDR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
+    {"VER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_VER},\
+    {"ifa_header_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_A_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_CN               0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL      1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID    2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED       3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID         4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC 5
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT          6
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_CN},\
+    {"FWD_HDR_TTL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL},\
+    {"LNS_DEVICE_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID},\
+    {"PORT_SPEED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED},\
+    {"QUEUE_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID},\
+    {"RX_TIMESTAMP_SEC", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC},\
+    {"ifa_metadata_a_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_B_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID         0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID        1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0             2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1             3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC 4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC   5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT    6
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PORT_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID},\
+    {"INGRESS_PORT_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID},\
+    {"MMU_STAT_0", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0},\
+    {"MMU_STAT_1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1},\
+    {"RESIDENCE_TIME_NANOSEC", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC},\
+    {"RX_TIMESTAMP_NANOSEC", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC},\
+    {"TX_QUEUE_BYTE_COUNT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT},\
+    {"ifa_metadata_b_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_BASE_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR            0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR           2
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"REQUEST_VECTOR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR},\
+    {"ifa_metadata_base_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT}
+
+/*!
+ * \name IGMP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_CHECKSUM      0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_IGMP_TYPE     2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_CHECKSUM},\
+    {"GROUP_ADDRESS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
+    {"IGMP_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_IGMP_TYPE},\
+    {"MAX_RESP_TIME", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
+    {"igmp_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_FID_COUNT}
+
+/*!
+ * \name IOAM_E2E_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN  2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID  3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_RESERVED      5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_TYPE          6
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \
+    {"IOAM_E2E_DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\
+    {"IOAM_E2E_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\
+    {"IOAM_HDR_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\
+    {"NAMESPACE_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\
+    {"NEXT_PROTOCOL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_RESERVED},\
+    {"TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_TYPE},\
+    {"ioam_e2e_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_DA                0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_ID                3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_OPTION            4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_SA                6
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_TOS               7
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_TTL               9
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_DA             0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_SA             5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_MACDA 0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_MACSA 1
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name MPLS_ACH_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_RESERVED     2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_VERSION      3
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
+    {"CHANNEL_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
+    {"CW_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_RESERVED},\
+    {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_VERSION},\
+    {"mpls_ach_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
+
+/*!
+ * \name MPLS_BV_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_VALUE 0
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
+    {"VALUE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_VALUE},\
+    {"mpls_bv_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_FID_COUNT}
+
+/*!
+ * \name MPLS_CW_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_RESERVED   1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
+    {"CW_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_RESERVED},\
+    {"SEQ_NUMBER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
+    {"mpls_cw_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_FID_COUNT}
+
+/*!
+ * \name MPLS_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_BOS   0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_EXP   1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_LABEL 2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_TTL   3
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
+    {"BOS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_BOS},\
+    {"EXP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_EXP},\
+    {"LABEL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_LABEL},\
+    {"TTL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_TTL},\
+    {"mpls_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_FID_COUNT}
+
+/*!
+ * \name P_1588_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_CNTRL          0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_CORRECTION     1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_DOMAIN_NB      2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FLAGS          3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_MSG_LENGTH     5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_MSG_TYPE       6
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_RESERVED1      7
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_RESERVED2      8
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_RESERVED3      9
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_SEQ_ID         10
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_SRCPORTID      11
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_VERSION        13
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FID_COUNT          14
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
+    {"CNTRL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_CNTRL},\
+    {"CORRECTION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_CORRECTION},\
+    {"DOMAIN_NB", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_DOMAIN_NB},\
+    {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FLAGS},\
+    {"LOGMSGINTERVAL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
+    {"MSG_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_MSG_LENGTH},\
+    {"MSG_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_MSG_TYPE},\
+    {"RESERVED1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_RESERVED1},\
+    {"RESERVED2", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_RESERVED2},\
+    {"RESERVED3", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_RESERVED3},\
+    {"SEQ_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_SEQ_ID},\
+    {"SRCPORTID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_SRCPORTID},\
+    {"TRANSPORTSPEC", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
+    {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_VERSION},\
+    {"p_1588_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FID_COUNT}
+
+/*!
+ * \name PROG_EXT_HDR_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
+    {"OPTION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
+    {"prog_ext_hdr_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_0_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FLOWSET        0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_LENGTH         1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
+    {"FLOWSET", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FLOWSET},\
+    {"LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_LENGTH},\
+    {"NEXT_HOP_INDEX", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
+    {"OBS_TIME_NS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
+    {"TEMPLATE_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
+    {"psamp_0_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_1_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_DLB_ID         0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_EPOCH          2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
+    {"DLB_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_DLB_ID},\
+    {"EGRESS_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
+    {"EPOCH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_EPOCH},\
+    {"INGRESS_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
+    {"SAMPLED_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
+    {"VARIABLE_FLAG", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
+    {"psamp_1_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE              3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
+    {"DROP_REASON", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
+    {"RESERVED_0", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
+    {"SMOD_STATE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\
+    {"UC_COS__COLOR__PROB_IDX", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
+    {"USER_META_DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_3_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_OPERATION     2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name ROUTING_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_DATA          0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_FID_COUNT          5
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_DATA},\
+    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
+    {"routing_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name RSPAN_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_TAG  0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_TPID 1
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_TAG},\
+    {"TPID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_TPID},\
+    {"rspan_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_FID_COUNT}
+
+/*!
+ * \name SEGMENT_ROUTING_SRH_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS         0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN   1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY    2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER   3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE  4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT 5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG           6
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS},\
+    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN},\
+    {"LAST_ENTRY", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT},\
+    {"TAG", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG},\
+    {"segment_routing_srh_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT}
+
+/*!
+ * \name SEGMENT_ROUTING_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN      0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS 1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER      2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE     3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST         4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT    5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_TAG              6
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN},\
+    {"LAST_ENTRY_FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE},\
+    {"SEG_LIST", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST},\
+    {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT},\
+    {"TAG", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_TAG},\
+    {"segment_routing_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_0_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
+    {"SYS_DESTINATION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
+    {"SYS_SOURCE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
+    {"VERSION", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
+    {"sflow_shim_0_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_1_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
+    {"FLAG_DEST_SAMPLE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
+    {"FLAG_DISCARDED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
+    {"FLAG_FLEX_SAMPLE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
+    {"FLAG_MCAST", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
+    {"FLAG_SRC_SAMPLE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
+    {"FLAG_TRUNCATED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
+    {"SYS_OPCODE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
+    {"sflow_shim_1_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_2_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
+    {"USER_META_DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
+    {"sflow_shim_2_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
+
+/*!
+ * \name SNAP_LLC_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_LENGTH   0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
+    {"LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_LENGTH},\
+    {"SNAP_LLC", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
+    {"snap_llc_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
+
+/*!
+ * \name STD_SEGMENT_ID_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_DATA 0
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_DATA},\
+    {"std_segment_id_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT}
+
+/*!
+ * \name SVTAG_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_DATA_LWR 0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_DATA_UPR 1
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \
+    {"DATA_LWR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_DATA_LWR},\
+    {"DATA_UPR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_DATA_UPR},\
+    {"svtag_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"L5_BYTES_8_9", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\
+    {"unknown_l5_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_CFI  0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_PCP  1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_TPID 2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_VID  3
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FID_COUNT}
+
+/*!
+ * \name WESP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FLAGS       0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_HEADER_LEN  1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_NEXT_HEADER 2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_SEQ_NUM     3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_SPI         4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_TRAILER_LEN 5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_WESP_IV     6
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FLAGS},\
+    {"HEADER_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_HEADER_LEN},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_NEXT_HEADER},\
+    {"SEQ_NUM", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_SEQ_NUM},\
+    {"SPI", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_SPI},\
+    {"TRAILER_LEN", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_TRAILER_LEN},\
+    {"WESP_IV", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_WESP_IV},\
+    {"wesp_t fid count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FID_COUNT}
+
+
+#endif /* BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 000000000000..5e273d4c8081
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,198 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_DATA_15_0                        0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_FLAGS_3_0                        1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0                                  3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                       5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0               6
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0        7
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         8
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         9
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0        10
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0                     11
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                      12
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                     13
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                        14
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                       15
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       16
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_FLOW_ID_LSB_15_0                               17
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_FLOW_ID_MSB_3_0                                18
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              19
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                        20
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      21
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                             22
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                            23
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_8_0                        24
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 25
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    26
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    27
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L2_IIF_12_0                                    28
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L2_OIF_12_0                                    29
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0                             30
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    31
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  32
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0                             33
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0                               34
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0                     35
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              36
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              37
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            38
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            39
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SRV6_DIP_EDIT_CTRL_3_0                         40
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0               41
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0                           42
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SRV6_SID_AND_PREFIX_LEN_ENC_3_0                43
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                       44
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   45
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVTAG_CTRL_PKT_INFO_3_0                        46
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_OR_IFP_OPAQUE_OBJ_15_0          47
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0               48
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        49
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              50
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             51
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             52
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                53
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                       54
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0   55
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       56
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    48
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE                         0
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               1
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT                                 2
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 3
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED                    4
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  5
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED                     6
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  7
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   8
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS                         9
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     10
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               11
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      12
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   13
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           14
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      15
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      16
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           17
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      18
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            19
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        20
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            21
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        22
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    23
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      24
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      25
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      26
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      27
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      28
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      29
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      30
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      31
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD            32
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              33
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  34
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    35
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          36
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              37
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            38
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                39
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         40
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SRV6                                    41
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     42
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               43
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU                44
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR                     45
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       46
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     47
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CB_STATION_MOVE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\
+    {"CML_FLAGS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"DEFAULT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT},\
+    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_ECMP_PKT_SAMPLED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\
+    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_LAG_PKT_SAMPLED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\
+    {"DST_FP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
+    {"EM_FT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"EM_FT_HPAE_MISS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS},\
+    {"IFP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
+    {"IVXLT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_STATIC_MOVE", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_IIF_EQ_L3_OIF", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
+    {"L3_TTL_ERROR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST_RSVD", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
+    {"MATCHED_RULE_BIT_0", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
+    {"MATCHED_RULE_BIT_1", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
+    {"MATCHED_RULE_BIT_2", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
+    {"MATCHED_RULE_BIT_3", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
+    {"MATCHED_RULE_BIT_4", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
+    {"MATCHED_RULE_BIT_5", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
+    {"MATCHED_RULE_BIT_6", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
+    {"MATCHED_RULE_BIT_7", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
+    {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\
+    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
+    {"MIRROR_SAMPLER_SAMPLED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
+    {"MPLS_CTRL_PKT_TO_CPU", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
+    {"NO_COPY_TO_CPU", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"SER_DROP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
+    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
+    {"SRV6", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SRV6},\
+    {"SVP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
+    {"TRACE_DOP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"TRACE_DO_NOT_COPY_TO_CPU", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\
+    {"TRACE_DO_NOT_MIRROR", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\
+    {"URPF_CHECK_FAILED", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
+    {"VFP", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 000000000000..834579bbe3a3
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,515 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56890_a0_dna_6_5_30_8_0_sf_match_id_info.yml
+ * for device bcm56890_a0 and variant dna_6_5_30_8_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG  0
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM  1
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE  2
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0  3
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  4
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  5
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  6
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  7
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  8
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG  9
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  10
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  11
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  12
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  13
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1  14
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2  15
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  16
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  17
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  18
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  19
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  20
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  21
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  22
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  23
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  24
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  25
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1  26
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2  27
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  28
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER  29
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE  30
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  31
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E  32
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  33
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  34
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  35
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  36
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  37
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  38
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  39
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  40
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  41
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  42
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  43
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  44
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  45
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1  46
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2  47
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  48
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1  49
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2  50
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1  51
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  52
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  53
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  54
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  55
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  56
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  57
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  58
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1  59
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2  60
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  61
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  62
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  63
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG  64
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM  65
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE  66
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0  67
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  68
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  69
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  70
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  71
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  72
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG  73
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  74
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  75
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  76
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  77
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1  78
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2  79
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  80
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  81
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  82
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  83
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  84
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  85
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  86
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  87
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  88
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  89
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1  90
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2  91
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  92
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER  93
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE  94
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  95
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E  96
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  97
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  98
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  99
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  100
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  101
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  102
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  103
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  104
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  105
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  106
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  107
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  108
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  109
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1  110
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2  111
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  112
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1  113
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2  114
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1  115
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  116
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  117
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  118
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  119
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  120
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  121
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  122
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1  123
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2  124
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG  125
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  126
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  127
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  128
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  129
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  130
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  131
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  132
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  133
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  134
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1  135
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2  136
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  137
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  138
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  139
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  140
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1  141
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2  142
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  143
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER  144
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE  145
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  146
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  147
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  148
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  149
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  150
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1  151
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2  152
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  153
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1  154
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2  155
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  156
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  157
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  158
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  159
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  160
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  161
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1  162
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2  163
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG  164
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM  165
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE  166
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0  167
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  168
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  169
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  170
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  171
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  172
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG  173
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  174
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  175
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  176
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  177
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1  178
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2  179
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  180
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  181
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  182
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  183
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  184
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  185
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  186
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  187
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  188
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  189
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1  190
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2  191
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  192
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER  193
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE  194
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  195
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E  196
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  197
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  198
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  199
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  200
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  201
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  202
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  203
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  204
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  205
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  206
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  207
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  208
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  209
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1  210
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2  211
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  212
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1  213
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2  214
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1  215
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  216
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  217
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  218
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  219
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  220
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  221
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  222
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1  223
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2  224
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  225
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  226
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  227
+#define BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_COUNT  228
+
+#define BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \
+    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \
+    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr.h
new file mode 100644
index 000000000000..56e234a36042
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr.h
@@ -0,0 +1,180 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_H
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T                      0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T                   1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T                      2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T                    3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T         4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T         5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T                      6
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T              7
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T            8
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T        9
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T         10
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T                      11
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T                12
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T                     13
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T        14
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T         15
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T                      16
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T               17
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T                  18
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T                 19
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T                  20
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T                      21
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T                 22
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T          23
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T               24
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T                     25
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T               26
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T           27
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T           28
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T        29
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T                     30
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T                 31
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T                    32
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T                     33
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T                     34
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T                       35
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T         36
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T         37
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T                 38
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T                  39
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T                  40
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T                     41
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T                   42
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T             43
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T                  44
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T                  45
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   46
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   47
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T         48
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T         49
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T                     50
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T                  51
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T                    52
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T      53
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T          54
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T             55
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T             56
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T             57
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T                 58
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T           59
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T         60
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T         61
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T                      62
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T               63
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T               64
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T               65
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T                     66
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T                    67
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T                     68
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_T               69
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_COUNT    70
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T},\
+    {"authen_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T},\
+    {"bfd_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T},\
+    {"cntag_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T},\
+    {"cpu_composites_0_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"dcn_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T},\
+    {"dest_option_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T},\
+    {"ep_nih_header_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T},\
+    {"erspan3_fixed_hdr_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"esp_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T},\
+    {"ethertype_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T},\
+    {"frag_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T},\
+    {"gbp_ethernet_shim_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T},\
+    {"generic_loopback_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"gpe_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T},\
+    {"gre_chksum_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T},\
+    {"gre_key_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T},\
+    {"gre_rout_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T},\
+    {"gre_seq_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T},\
+    {"gre_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T},\
+    {"hg3_base_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T},\
+    {"hg3_extension_0_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T},\
+    {"hop_by_hop_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T},\
+    {"icmp_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T},\
+    {"ifa_header_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T},\
+    {"ifa_metadata_a_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T},\
+    {"ifa_metadata_b_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T},\
+    {"ifa_metadata_base_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T},\
+    {"igmp_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T},\
+    {"ioam_e2e_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T},\
+    {"ipfix_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T},\
+    {"l2_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"mpls_ach_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T},\
+    {"mpls_bv_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T},\
+    {"mpls_cw_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T},\
+    {"mpls_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T},\
+    {"p_1588_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T},\
+    {"prog_ext_hdr_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T},\
+    {"psamp_0_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T},\
+    {"psamp_1_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T},\
+    {"psamp_mirror_on_drop_0_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_3_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
+    {"psamp_postcard_0_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T},\
+    {"psamp_postcard_1_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T},\
+    {"rarp_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T},\
+    {"routing_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T},\
+    {"rspan_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T},\
+    {"segment_routing_srh_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T},\
+    {"segment_routing_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T},\
+    {"sflow_shim_0_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T},\
+    {"sflow_shim_1_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T},\
+    {"sflow_shim_2_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T},\
+    {"snap_llc_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T},\
+    {"std_segment_id_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T},\
+    {"tcp_first_4bytes_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T},\
+    {"vxlan_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T},\
+    {"wesp_t", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T},\
+    {"RXPMD_FLEX_T", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr_data.h
new file mode 100644
index 000000000000..fdefb32b0dcc
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr_data.h
@@ -0,0 +1,1419 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_DATA_H
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_OPERATION     2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name AUTHEN_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_DATA        0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_NEXT_HEADER 1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_RESERVED    3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_SEQ_NUM     4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_SPI         5
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_FID_COUNT          6
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_DATA},\
+    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_NEXT_HEADER},\
+    {"PAYLOAD_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
+    {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_RESERVED},\
+    {"SEQ_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_SEQ_NUM},\
+    {"SPI", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_SPI},\
+    {"authen_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_FID_COUNT}
+
+/*!
+ * \name BFD_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_AP            0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_BFD_LENGTH    1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_CPI           2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DEM           3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DESMINTXINTV  4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DETECTMULT    5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DIAG          6
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FIN           7
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_MINECHORXINTV 8
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_MPT           9
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_MYDISCRIM     10
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_POLL          11
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_REQMINRXINTV  12
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_STA           13
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_URDISCRIM     14
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_VERSION       15
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FID_COUNT          16
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
+    {"AP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_AP},\
+    {"BFD_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_BFD_LENGTH},\
+    {"CPI", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_CPI},\
+    {"DEM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DEM},\
+    {"DESMINTXINTV", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DESMINTXINTV},\
+    {"DETECTMULT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DETECTMULT},\
+    {"DIAG", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_DIAG},\
+    {"FIN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FIN},\
+    {"MINECHORXINTV", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_MINECHORXINTV},\
+    {"MPT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_MPT},\
+    {"MYDISCRIM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_MYDISCRIM},\
+    {"POLL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_POLL},\
+    {"REQMINRXINTV", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_REQMINRXINTV},\
+    {"STA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_STA},\
+    {"URDISCRIM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_URDISCRIM},\
+    {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_VERSION},\
+    {"bfd_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FID_COUNT}
+
+/*!
+ * \name CNTAG_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_RPID 0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_TPID 1
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_FID_COUNT          2
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
+    {"RPID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_RPID},\
+    {"TPID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_TPID},\
+    {"cntag_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name DCN_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FLAGS         0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_NEXT_PROTOCOL 1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED0     2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED1     3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED2     4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED3     5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED4     6
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FID_COUNT          7
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED0},\
+    {"RESERVED1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED1},\
+    {"RESERVED2", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED2},\
+    {"RESERVED3", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED3},\
+    {"RESERVED4", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_RESERVED4},\
+    {"dcn_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FID_COUNT}
+
+/*!
+ * \name DEST_OPTION_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_OPTION      2
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT          3
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
+    {"OPTION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_OPTION},\
+    {"dest_option_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT}
+
+/*!
+ * \name EP_NIH_HEADER_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_START                10
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"HEADER_SUBTYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
+    {"HEADER_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
+    {"OPAQUE_CTRL_A", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
+    {"OPAQUE_CTRL_B", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
+    {"OPAQUE_CTRL_C", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
+    {"OPAQUE_OBJECT_A", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
+    {"OPAQUE_OBJECT_B", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
+    {"OPAQUE_OBJECT_C", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
+    {"RECIRC_PROFILE_INDEX", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
+    {"RESERVED_0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
+    {"START", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_START},\
+    {"TIMESTAMP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
+    {"ep_nih_header_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ESP_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_NEXT_HEADER 0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_PAD         1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_PAD_LEN     2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_SEQ_NUM     3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_SPI         4
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_FID_COUNT          5
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
+    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_NEXT_HEADER},\
+    {"PAD", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_PAD},\
+    {"PAD_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_PAD_LEN},\
+    {"SEQ_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_SEQ_NUM},\
+    {"SPI", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_SPI},\
+    {"esp_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name FRAG_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FRAG_INFO   0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_ID          1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_NEXT_HEADER 2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_RESERVED    3
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FID_COUNT          4
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
+    {"FRAG_INFO", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FRAG_INFO},\
+    {"ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_ID},\
+    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_NEXT_HEADER},\
+    {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_RESERVED},\
+    {"frag_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FID_COUNT}
+
+/*!
+ * \name GBP_ETHERNET_SHIM_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS     1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED  2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_SID       3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE   4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_VER       5
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT          6
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \
+    {"ETHERTYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\
+    {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\
+    {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\
+    {"SID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\
+    {"SUBTYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\
+    {"VER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\
+    {"gbp_ethernet_shim_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM    13
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"SOURCE_SYSTEM_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"SRC_SUBPORT_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\
+    {"START_BYTE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP         0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF        1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED      2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP            3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP          4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP          5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP    6
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP    7
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1    8
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER   9
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT   10
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
+
+/*!
+ * \name GPE_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FLAGS         0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_NEXT_PROTOCOL 1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_RESERVED0     2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_RESERVED1     3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_VNI           4
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FID_COUNT          5
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_RESERVED0},\
+    {"RESERVED1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_RESERVED1},\
+    {"VNI", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_VNI},\
+    {"gpe_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FID_COUNT}
+
+/*!
+ * \name GRE_CHKSUM_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_OFFSET   1
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
+    {"OFFSET", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_OFFSET},\
+    {"gre_chksum_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
+
+/*!
+ * \name GRE_KEY_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_KEY 0
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_FID_COUNT          1
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
+    {"KEY", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_KEY},\
+    {"gre_key_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_FID_COUNT}
+
+/*!
+ * \name GRE_ROUT_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_ROUTING 0
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT          1
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
+    {"ROUTING", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_ROUTING},\
+    {"gre_rout_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT}
+
+/*!
+ * \name GRE_SEQ_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_SEQUENCE 0
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT          1
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_SEQUENCE},\
+    {"gre_seq_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT}
+
+/*!
+ * \name GRE_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_C_R_K_S  0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_PROTOCOL 1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_RESERVED 2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_VERSION  3
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_FID_COUNT          4
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
+    {"C_R_K_S", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_C_R_K_S},\
+    {"PROTOCOL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_PROTOCOL},\
+    {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_RESERVED},\
+    {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_VERSION},\
+    {"gre_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_FID_COUNT}
+
+/*!
+ * \name HG3_BASE_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_CN                      0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_CNG                     1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_ENTROPY                 2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT         3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_HG3_RESERVED            4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_L3_ROUTED               5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_MIRROR_COPY             6
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_RESERVED_ETYPE          7
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION      8
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE           10
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_TC                      11
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_VERSION                 12
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_FID_COUNT          13
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_CN},\
+    {"CNG", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_CNG},\
+    {"ENTROPY", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_ENTROPY},\
+    {"EXT_HDR_PRESENT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\
+    {"HG3_RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_HG3_RESERVED},\
+    {"L3_ROUTED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_L3_ROUTED},\
+    {"MIRROR_COPY", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_MIRROR_COPY},\
+    {"RESERVED_ETYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\
+    {"SYSTEM_DESTINATION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\
+    {"SYSTEM_DESTINATION_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\
+    {"SYSTEM_SOURCE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\
+    {"TC", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_TC},\
+    {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_VERSION},\
+    {"hg3_base_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_FID_COUNT}
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP         0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF        1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED      2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP            3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP          4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP          5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP    6
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP    7
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1    8
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER   9
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT   10
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11
+
+/*!
+ * \name HG3_EXTENSION_0_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB      0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB      1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF     2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FLAGS             3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_SVP               5
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT          6
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \
+    {"CLASS_ID_LSB", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\
+    {"CLASS_ID_MSB", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\
+    {"DVP_OR_L3_IIF", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\
+    {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\
+    {"FORWARDING_DOMAIN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\
+    {"SVP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_SVP},\
+    {"hg3_extension_0_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT}
+
+/*!
+ * \name HOP_BY_HOP_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_OPTION      2
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
+    {"OPTION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_OPTION},\
+    {"hop_by_hop_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_CODE      1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IFA_HEADER_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FLAGS      0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_GNS        1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_VER        4
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FID_COUNT          5
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FLAGS},\
+    {"GNS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_GNS},\
+    {"MAX_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
+    {"NEXT_HDR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
+    {"VER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_VER},\
+    {"ifa_header_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_A_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_CN               0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL      1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID    2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_PORT_SPEED       3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_QUEUE_ID         4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC 5
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FID_COUNT          6
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_CN},\
+    {"FWD_HDR_TTL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL},\
+    {"LNS_DEVICE_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID},\
+    {"PORT_SPEED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_PORT_SPEED},\
+    {"QUEUE_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_QUEUE_ID},\
+    {"RX_TIMESTAMP_SEC", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC},\
+    {"ifa_metadata_a_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_B_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID         0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID        1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0             2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1             3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC 4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC   5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT    6
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_FID_COUNT          7
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PORT_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID},\
+    {"INGRESS_PORT_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID},\
+    {"MMU_STAT_0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0},\
+    {"MMU_STAT_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1},\
+    {"RESIDENCE_TIME_NANOSEC", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC},\
+    {"RX_TIMESTAMP_NANOSEC", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC},\
+    {"TX_QUEUE_BYTE_COUNT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT},\
+    {"ifa_metadata_b_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_BASE_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR            0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR           2
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT          3
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"REQUEST_VECTOR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR},\
+    {"ifa_metadata_base_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT}
+
+/*!
+ * \name IGMP_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_CHECKSUM      0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_GROUP_ADDRESS 1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_IGMP_TYPE     2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_MAX_RESP_TIME 3
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_FID_COUNT          4
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_CHECKSUM},\
+    {"GROUP_ADDRESS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_GROUP_ADDRESS},\
+    {"IGMP_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_IGMP_TYPE},\
+    {"MAX_RESP_TIME", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_MAX_RESP_TIME},\
+    {"igmp_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_FID_COUNT}
+
+/*!
+ * \name IOAM_E2E_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN  2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_NAMESPACE_ID  3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_RESERVED      5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_TYPE          6
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_FID_COUNT          7
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \
+    {"IOAM_E2E_DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\
+    {"IOAM_E2E_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\
+    {"IOAM_HDR_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\
+    {"NAMESPACE_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\
+    {"NEXT_PROTOCOL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\
+    {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_RESERVED},\
+    {"TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_TYPE},\
+    {"ioam_e2e_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_DA                0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_ID                3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_OPTION            4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_SA                6
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_TOS               7
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_TTL               9
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_DA             0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_SA             5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_MACDA 0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_MACSA 1
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name MPLS_ACH_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_CW_TYPE      1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_RESERVED     2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_VERSION      3
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT          4
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
+    {"CHANNEL_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
+    {"CW_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_CW_TYPE},\
+    {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_RESERVED},\
+    {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_VERSION},\
+    {"mpls_ach_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT}
+
+/*!
+ * \name MPLS_BV_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_VALUE 0
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_FID_COUNT          1
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
+    {"VALUE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_VALUE},\
+    {"mpls_bv_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_FID_COUNT}
+
+/*!
+ * \name MPLS_CW_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_CW_TYPE    0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_RESERVED   1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_FID_COUNT          3
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
+    {"CW_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_CW_TYPE},\
+    {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_RESERVED},\
+    {"SEQ_NUMBER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
+    {"mpls_cw_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_FID_COUNT}
+
+/*!
+ * \name MPLS_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_BOS   0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_EXP   1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_LABEL 2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_TTL   3
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_FID_COUNT          4
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
+    {"BOS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_BOS},\
+    {"EXP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_EXP},\
+    {"LABEL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_LABEL},\
+    {"TTL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_TTL},\
+    {"mpls_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_FID_COUNT}
+
+/*!
+ * \name P_1588_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_CNTRL          0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_CORRECTION     1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_DOMAIN_NB      2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FLAGS          3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_MSG_LENGTH     5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_MSG_TYPE       6
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_RESERVED1      7
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_RESERVED2      8
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_RESERVED3      9
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_SEQ_ID         10
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_SRCPORTID      11
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_TRANSPORTSPEC  12
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_VERSION        13
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FID_COUNT          14
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
+    {"CNTRL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_CNTRL},\
+    {"CORRECTION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_CORRECTION},\
+    {"DOMAIN_NB", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_DOMAIN_NB},\
+    {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FLAGS},\
+    {"LOGMSGINTERVAL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
+    {"MSG_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_MSG_LENGTH},\
+    {"MSG_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_MSG_TYPE},\
+    {"RESERVED1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_RESERVED1},\
+    {"RESERVED2", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_RESERVED2},\
+    {"RESERVED3", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_RESERVED3},\
+    {"SEQ_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_SEQ_ID},\
+    {"SRCPORTID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_SRCPORTID},\
+    {"TRANSPORTSPEC", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_TRANSPORTSPEC},\
+    {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_VERSION},\
+    {"p_1588_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FID_COUNT}
+
+/*!
+ * \name PROG_EXT_HDR_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_OPTION      2
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
+    {"OPTION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_OPTION},\
+    {"prog_ext_hdr_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_0_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FLOWSET        0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_LENGTH         1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FID_COUNT          6
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
+    {"FLOWSET", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FLOWSET},\
+    {"LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_LENGTH},\
+    {"NEXT_HOP_INDEX", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
+    {"OBS_TIME_NS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
+    {"TEMPLATE_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
+    {"psamp_0_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_1_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_DLB_ID         0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_EPOCH          2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_USER_META_DATA 5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_FID_COUNT          7
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
+    {"DLB_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_DLB_ID},\
+    {"EGRESS_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
+    {"EPOCH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_EPOCH},\
+    {"INGRESS_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
+    {"SAMPLED_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_USER_META_DATA},\
+    {"VARIABLE_FLAG", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
+    {"psamp_1_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE              3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
+    {"DROP_REASON", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
+    {"RESERVED_0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
+    {"SMOD_STATE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\
+    {"UC_COS__COLOR__PROB_IDX", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
+    {"USER_META_DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_3_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_POSTCARD_0_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_EGRESS_MOD_PORT 0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_INGRESS_PORT    1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_NS     2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_S      3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_PSAMP_LENGTH    4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_TEMPLATE_ID     5
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT          6
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_INGRESS_PORT},\
+    {"OBS_TIME_NS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_S},\
+    {"PSAMP_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_PSAMP_LENGTH},\
+    {"TEMPLATE_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_TEMPLATE_ID},\
+    {"psamp_postcard_0_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_POSTCARD_1_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_COLOR_IDX_COS_DROPLOC 0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_DROP_REASON_CODE      1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_0            2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_1            3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_QUEUE_ID              4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_RESERVED_1            5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_RESIDENCE_TIME        6
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_SAMPLED_LENGTH        7
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_VAR_LEN_INDICATOR     8
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT          9
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_FIELD_NAME_MAP_INIT \
+    {"COLOR_IDX_COS_DROPLOC", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_COLOR_IDX_COS_DROPLOC},\
+    {"DROP_REASON_CODE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_DROP_REASON_CODE},\
+    {"MMU_STAT_0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_0},\
+    {"MMU_STAT_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_1},\
+    {"QUEUE_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_QUEUE_ID},\
+    {"RESERVED_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_RESERVED_1},\
+    {"RESIDENCE_TIME", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_RESIDENCE_TIME},\
+    {"SAMPLED_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_SAMPLED_LENGTH},\
+    {"VAR_LEN_INDICATOR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_VAR_LEN_INDICATOR},\
+    {"psamp_postcard_1_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_OPERATION     2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name ROUTING_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_DATA          0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_NEXT_HEADER   2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_ROUTING_TYPE  3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_FID_COUNT          5
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_DATA},\
+    {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
+    {"routing_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name RSPAN_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_TAG  0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_TPID 1
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_FID_COUNT          2
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_TAG},\
+    {"TPID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_TPID},\
+    {"rspan_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_FID_COUNT}
+
+/*!
+ * \name SEGMENT_ROUTING_SRH_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS         0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN   1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY    2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER   3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE  4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT 5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG           6
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT          7
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS},\
+    {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN},\
+    {"LAST_ENTRY", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY},\
+    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT},\
+    {"TAG", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG},\
+    {"segment_routing_srh_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT}
+
+/*!
+ * \name SEGMENT_ROUTING_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN      0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS 1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER      2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE     3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST         4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT    5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_TAG              6
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT          7
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN},\
+    {"LAST_ENTRY_FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS},\
+    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE},\
+    {"SEG_LIST", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST},\
+    {"SEGMENTS_LEFT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT},\
+    {"TAG", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_TAG},\
+    {"segment_routing_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_0_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
+    {"SYS_DESTINATION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
+    {"SYS_SOURCE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
+    {"VERSION", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
+    {"sflow_shim_0_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_1_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
+    {"FLAG_DEST_SAMPLE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
+    {"FLAG_DISCARDED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
+    {"FLAG_FLEX_SAMPLE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
+    {"FLAG_MCAST", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
+    {"FLAG_SRC_SAMPLE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
+    {"FLAG_TRUNCATED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
+    {"RESERVED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
+    {"SYS_OPCODE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
+    {"sflow_shim_1_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_2_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
+    {"USER_META_DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
+    {"sflow_shim_2_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
+
+/*!
+ * \name SNAP_LLC_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_LENGTH   0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT          2
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
+    {"LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_LENGTH},\
+    {"SNAP_LLC", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
+    {"snap_llc_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT}
+
+/*!
+ * \name STD_SEGMENT_ID_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_DATA 0
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT          1
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_DATA},\
+    {"std_segment_id_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_DST_PORT   1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT          4
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"L5_BYTES_8_9", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\
+    {"unknown_l5_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_CFI  0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_PCP  1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_TPID 2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_VID  3
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FID_COUNT}
+
+/*!
+ * \name WESP_T field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FLAGS       0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_HEADER_LEN  1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_NEXT_HEADER 2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_SEQ_NUM     3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_SPI         4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_TRAILER_LEN 5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_WESP_IV     6
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FID_COUNT          7
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FLAGS},\
+    {"HEADER_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_HEADER_LEN},\
+    {"NEXT_HEADER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_NEXT_HEADER},\
+    {"SEQ_NUM", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_SEQ_NUM},\
+    {"SPI", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_SPI},\
+    {"TRAILER_LEN", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_TRAILER_LEN},\
+    {"WESP_IV", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_WESP_IV},\
+    {"wesp_t fid count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FID_COUNT}
+
+
+#endif /* BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 000000000000..259def530346
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,192 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ALLOW_NAT_3_0                                  0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0                                  2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DVP_15_0                                       4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0               5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0        6
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         7
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         8
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0        9
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0                     10
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                      11
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                     12
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                        13
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                       14
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       15
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              16
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                        17
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      18
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                             19
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                            20
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                            21
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 22
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    23
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    24
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L2_IIF_11_0                                    25
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L2_OIF_11_0                                    26
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0                             27
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    28
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  29
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0                             30
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0                               31
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0                     32
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              33
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              34
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            35
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            36
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SRV6_DIP_EDIT_CTRL_3_0                         37
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0               38
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0                           39
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SRV6_SID_AND_PREFIX_LEN_ENC_3_0                40
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SVP_15_0                                       41
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   42
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        43
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              44
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             45
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             46
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                47
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_VFI_15_0                                       48
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0   49
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_FID_COUNT                       50
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_COUNT                    48
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE                         0
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               1
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED                    3
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  4
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED                     5
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  6
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   7
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU                      8
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP                                     9
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               10
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      11
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   12
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           13
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      14
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      15
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           16
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      17
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            18
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        19
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            20
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        21
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    22
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      23
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      24
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      25
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      26
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      27
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      28
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      29
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      30
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED                 31
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              32
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  33
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    34
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          35
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              36
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            37
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                38
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP_EPIPE                          39
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED              40
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SRV6                                    41
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SVP                                     42
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               43
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU                44
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR                     45
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       46
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_VFP                                     47
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CB_STATION_MOVE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\
+    {"CML_FLAGS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_ECMP_PKT_SAMPLED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\
+    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_LAG_PKT_SAMPLED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\
+    {"DST_FP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
+    {"EM_FT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"IDEV_CONFIG_TO_CPU", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU},\
+    {"IFP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
+    {"IVXLT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_STATIC_MOVE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_IIF_EQ_L3_OIF", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
+    {"L3_TTL_ERROR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST_RSVD", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
+    {"MATCHED_RULE_BIT_0", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
+    {"MATCHED_RULE_BIT_1", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
+    {"MATCHED_RULE_BIT_2", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
+    {"MATCHED_RULE_BIT_3", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
+    {"MATCHED_RULE_BIT_4", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
+    {"MATCHED_RULE_BIT_5", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
+    {"MATCHED_RULE_BIT_6", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
+    {"MATCHED_RULE_BIT_7", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
+    {"MEMBERSHIP_CHECK_FAILED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
+    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
+    {"MIRROR_SAMPLER_SAMPLED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
+    {"MPLS_CTRL_PKT_TO_CPU", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
+    {"NO_COPY_TO_CPU", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"SER_DROP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
+    {"SER_DROP_EPIPE", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP_EPIPE},\
+    {"SPANNING_TREE_CHECK_FAILED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
+    {"SRV6", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SRV6},\
+    {"SVP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SVP},\
+    {"TRACE_DOP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"TRACE_DO_NOT_COPY_TO_CPU", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\
+    {"TRACE_DO_NOT_MIRROR", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\
+    {"URPF_CHECK_FAILED", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
+    {"VFP", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 000000000000..edd826cbfda3
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,515 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm78800_a0_dna_6_5_30_3_1_sf_match_id_info.yml
+ * for device bcm78800_a0 and variant dna_6_5_30_3_1.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG  0
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM  1
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE  2
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0  3
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  4
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  5
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  6
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  7
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  8
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  9
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  10
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  11
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  12
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DCN  13
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1  14
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2  15
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  16
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  17
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  18
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  19
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  20
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  21
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  22
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  23
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  24
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  25
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1  26
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2  27
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  28
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER  29
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE  30
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  31
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E  32
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  33
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  34
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  35
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  36
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  37
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  38
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  39
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  40
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  41
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  42
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  43
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  44
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  45
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1  46
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2  47
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  48
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1  49
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2  50
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1  51
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  52
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  53
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  54
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  55
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  56
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  57
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  58
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1  59
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2  60
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  61
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  62
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  63
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG  64
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM  65
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE  66
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0  67
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  68
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  69
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  70
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  71
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  72
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  73
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  74
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  75
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  76
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN  77
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1  78
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2  79
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  80
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  81
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  82
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  83
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  84
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  85
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  86
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  87
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  88
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  89
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1  90
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2  91
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  92
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER  93
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE  94
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  95
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E  96
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  97
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  98
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  99
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  100
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  101
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  102
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  103
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  104
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  105
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  106
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  107
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  108
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  109
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1  110
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2  111
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  112
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1  113
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2  114
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1  115
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  116
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  117
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  118
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  119
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  120
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  121
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  122
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1  123
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2  124
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG  125
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  126
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  127
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  128
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  129
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  130
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  131
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  132
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  133
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  134
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1  135
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2  136
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  137
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  138
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  139
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  140
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1  141
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2  142
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  143
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER  144
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE  145
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  146
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  147
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  148
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  149
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  150
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1  151
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2  152
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  153
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1  154
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2  155
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  156
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  157
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  158
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  159
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  160
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  161
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1  162
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2  163
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG  164
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM  165
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE  166
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0  167
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  168
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  169
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  170
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  171
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  172
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  173
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  174
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  175
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  176
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DCN  177
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1  178
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2  179
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  180
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  181
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  182
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  183
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  184
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  185
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  186
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  187
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  188
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  189
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1  190
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2  191
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  192
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER  193
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE  194
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  195
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E  196
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  197
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  198
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  199
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  200
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  201
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  202
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  203
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  204
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  205
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  206
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  207
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  208
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  209
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1  210
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2  211
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  212
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1  213
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2  214
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1  215
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  216
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  217
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  218
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  219
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  220
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  221
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  222
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1  223
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2  224
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  225
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  226
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  227
+#define BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_COUNT  228
+
+#define BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_DCN", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DCN}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \
+    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_DCN", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DCN}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \
+    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/lbpmd/bcmpkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/lbpmd/bcmpkt_lbhdr.c
index d723dfb66b40..e1223a59fd50 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/lbpmd/bcmpkt_lbhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/lbpmd/bcmpkt_lbhdr.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <shr/shr_error.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd.c
index ded07cbdb02a..10209b8db5b3 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <shr/shr_error.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd_match_id.c
index 69bbb495c964..50e036f2886a 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd_match_id.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd_match_id.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,13 +17,13 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <shr/shr_error.h>
 #include <shr/shr_bitop.h>
 #include <sal/sal_libc.h>
-#include <bcmlrd/bcmlrd_local_types.h>
+#include <bcmlrd/bcmlrd_conf.h>
 #include <bcmpkt/bcmpkt_rxpmd_match_id.h>
 #include <bcmpkt/bcmpkt_rxpmd_match_id_defs.h>
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/txpmd/bcmpkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/txpmd/bcmpkt_txpmd.c
index b5556cccd0a7..ea4f41ed999b 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/txpmd/bcmpkt_txpmd.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/txpmd/bcmpkt_txpmd.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <shr/shr_error.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/util/bcmpkt_util.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/util/bcmpkt_util.c
index 162127bdfb59..0811bda80f29 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/util/bcmpkt_util.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/util/bcmpkt_util.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <sal/sal_libc.h>
@@ -28,14 +28,15 @@
 
 /*! This sequence should be same as bcmdrd_cm_dev_type_t */
 #define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
-    {#_bd, BCMDRD_DEV_T_##_bd},
+    {#_bd, _dv, BCMDRD_DEV_T_##_bd},
 static const struct {
     char *dev_name;
+    uint32_t id;
     bcmdrd_dev_type_t dev_type;
 } device_types[] = {
-    {"none", BCMDRD_DEV_T_NONE},
+    {"none", 0, BCMDRD_DEV_T_NONE},
 #include <bcmdrd/bcmdrd_devlist.h>
-    {"invalid", BCMDRD_DEV_T_COUNT}
+    {"invalid",0, BCMDRD_DEV_T_COUNT}
 };
 
 #define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\
@@ -76,3 +77,31 @@ bcmpkt_util_variant_type_get(const char *dev_name, const char *var_name)
     }
     return BCMLRD_VARIANT_T_NONE;
 }
+
+uint32_t
+bcmpkt_util_dev_id_get(const bcmdrd_dev_type_t dev_type)
+{
+    int idx;
+
+    for (idx = 0; idx < COUNTOF(device_types); idx++) {
+        if (dev_type == device_types[idx].dev_type) {
+            return device_types[idx].id;
+        }
+    }
+    return BCMDRD_DEV_T_NONE;
+}
+
+void
+bcmpkt_util_rcpu_hdr_init(const bcmdrd_dev_type_t dev_type,
+                          bcmpkt_rcpu_hdr_t *rhdr)
+
+{
+    if (rhdr) {
+        sal_memset(rhdr, 0, sizeof(*rhdr));
+        rhdr->tpid = BCMPKT_RCPU_TPID;
+        rhdr->vlan = BCMPKT_RCPU_VLAN;
+        rhdr->ethertype = BCMPKT_RCPU_ETYPE;
+        rhdr->flags = BCMPKT_RCPU_F_MODHDR;
+        rhdr->signature = bcmpkt_util_dev_id_get(dev_type);
+    }
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id.c
index 04d384f9e1f3..4c975bc2cbc6 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id.c
@@ -7,7 +7,7 @@
  * Edits to this file will be lost when it is regenerated.
  *
  * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  * All Rights Reserved.$
  *
  * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_pkt_flexhdr.c
index dc2fda7d027e..7ef51b03e9c3 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_pkt_flexhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_pkt_flexhdr.c
@@ -7,7 +7,7 @@
  * Edits to this file will be lost when it is regenerated.
  *
  * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  * All Rights Reserved.$
  *
  * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
@@ -10549,4 +10549,4 @@ int bcm56690_a0_dna_6_5_29_0_1_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
     21,
     22,
     70,
-};
\ No newline at end of file
+};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c
similarity index 76%
rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c
rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c
index aa6df21e30d9..4f381c8b4034 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c
@@ -2,12 +2,12 @@
  *
  * DO NOT EDIT THIS FILE!
  * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56780_a0_cna_6_5_29_sf_match_id_info.yml
- * for device bcm56780_a0 and variant cna_6_5_29.
+ * from the NPL output file(s) bcm56780_a0_cna_6_5_30_2_0_sf_match_id_info.yml
+ * for device bcm56780_a0 and variant cna_6_5_30_2_0.
  * Edits to this file will be lost when it is regenerated.
  *
  * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  * All Rights Reserved.$
  *
  * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
@@ -29,13 +29,13 @@
 
 
 #include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-#include <bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h>
+#include <bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h>
 
 
 static bcmpkt_rxpmd_match_id_db_t
-bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT] = {
+bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT] = {
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -49,7 +49,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
         .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -63,7 +63,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
         .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x7,
@@ -77,7 +77,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -91,7 +91,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
         .match        = 0x20,
         .match_mask   = 0x66,
@@ -105,7 +105,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -119,7 +119,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
         .match        = 0x40,
         .match_mask   = 0x66,
@@ -133,7 +133,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
         .match        = 0x8,
         .match_mask   = 0x18,
@@ -147,7 +147,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
         .match        = 0x10,
         .match_mask   = 0x18,
@@ -161,7 +161,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x7f,
@@ -175,7 +175,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
         .match        = 0x2,
         .match_mask   = 0x6,
@@ -189,7 +189,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x4,
         .match_mask   = 0x6,
@@ -203,7 +203,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x24,
         .match_mask   = 0x66,
@@ -217,7 +217,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
         .match        = 0x6,
         .match_mask   = 0x6,
@@ -231,7 +231,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x18,
         .match_mask   = 0x18,
@@ -245,7 +245,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -259,7 +259,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x46,
         .match_mask   = 0x66,
@@ -273,7 +273,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
         .match        = 0x26,
         .match_mask   = 0x66,
@@ -287,7 +287,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
         .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
         .match        = 0x2,
         .match_mask   = 0x3,
@@ -301,7 +301,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
         .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
         .match        = 0x1,
         .match_mask   = 0x3,
@@ -315,7 +315,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
         .name         = "EGRESS_PKT_SYS_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3,
@@ -329,7 +329,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -343,7 +343,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -357,7 +357,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x7,
@@ -371,7 +371,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -385,7 +385,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
         .match        = 0x20,
         .match_mask   = 0x66,
@@ -399,7 +399,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -413,7 +413,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
         .match        = 0x40,
         .match_mask   = 0x66,
@@ -427,7 +427,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
         .match        = 0x8,
         .match_mask   = 0x18,
@@ -441,7 +441,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
         .match        = 0x10,
         .match_mask   = 0x18,
@@ -455,7 +455,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x7f,
@@ -469,7 +469,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
         .match        = 0x2,
         .match_mask   = 0x6,
@@ -483,7 +483,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x4,
         .match_mask   = 0x6,
@@ -497,7 +497,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x24,
         .match_mask   = 0x66,
@@ -511,7 +511,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
         .match        = 0x6,
         .match_mask   = 0x6,
@@ -525,7 +525,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x18,
         .match_mask   = 0x18,
@@ -539,7 +539,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -553,7 +553,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x46,
         .match_mask   = 0x66,
@@ -567,7 +567,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
         .match        = 0x26,
         .match_mask   = 0x66,
@@ -581,7 +581,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -595,7 +595,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
         .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -609,7 +609,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
         .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x7,
@@ -623,7 +623,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -637,7 +637,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
         .match        = 0x20,
         .match_mask   = 0x66,
@@ -651,7 +651,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -665,7 +665,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
         .match        = 0x40,
         .match_mask   = 0x66,
@@ -679,7 +679,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
         .match        = 0x8,
         .match_mask   = 0x18,
@@ -693,7 +693,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
         .match        = 0x10,
         .match_mask   = 0x18,
@@ -707,7 +707,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x7f,
@@ -721,7 +721,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
         .match        = 0x2,
         .match_mask   = 0x6,
@@ -735,7 +735,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x4,
         .match_mask   = 0x6,
@@ -749,7 +749,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x24,
         .match_mask   = 0x66,
@@ -763,7 +763,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
         .match        = 0x6,
         .match_mask   = 0x6,
@@ -777,7 +777,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x18,
         .match_mask   = 0x18,
@@ -791,7 +791,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -805,7 +805,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x46,
         .match_mask   = 0x66,
@@ -819,7 +819,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -833,7 +833,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -847,7 +847,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x7,
@@ -861,7 +861,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -875,7 +875,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
         .match        = 0x20,
         .match_mask   = 0x66,
@@ -889,7 +889,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -903,7 +903,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
         .match        = 0x40,
         .match_mask   = 0x66,
@@ -917,7 +917,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
         .match        = 0x8,
         .match_mask   = 0x18,
@@ -931,7 +931,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
         .match        = 0x10,
         .match_mask   = 0x18,
@@ -945,7 +945,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x7f,
@@ -959,7 +959,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
         .match        = 0x2,
         .match_mask   = 0x6,
@@ -973,7 +973,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x4,
         .match_mask   = 0x6,
@@ -987,7 +987,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x24,
         .match_mask   = 0x66,
@@ -1001,7 +1001,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
         .match        = 0x6,
         .match_mask   = 0x6,
@@ -1015,7 +1015,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x18,
         .match_mask   = 0x18,
@@ -1029,7 +1029,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -1043,7 +1043,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x46,
         .match_mask   = 0x66,
@@ -1057,7 +1057,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
         .match        = 0x26,
         .match_mask   = 0x66,
@@ -1071,7 +1071,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
         .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
         .match        = 0x2,
         .match_mask   = 0x3,
@@ -1085,7 +1085,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
         .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
         .match        = 0x1,
         .match_mask   = 0x3,
@@ -1099,7 +1099,7 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        /* BCM56780_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
         .name         = "INGRESS_PKT_SYS_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3,
@@ -1114,23 +1114,23 @@ bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
     },
 };
 
-static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_cna_6_5_29_rxpmd_match_id_db_info = {
+static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info = {
     .num_entries = 77,
-    .db = bcm56780_a0_cna_6_5_29_rxpmd_match_id_db
+    .db = bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db
 };
-bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_cna_6_5_29_rxpmd_match_id_db_info_get(void) {
-    return &bcm56780_a0_cna_6_5_29_rxpmd_match_id_db_info;
+bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info_get(void) {
+    return &bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info;
 }
 
-static shr_enum_map_t bcm56780_a0_cna_6_5_29_rxpmd_match_id_map[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+static shr_enum_map_t bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_map[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_cna_6_5_29_rxpmd_match_id_map_info = {
+static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info = {
     .num_entries = 77,
-    .map = bcm56780_a0_cna_6_5_29_rxpmd_match_id_map
+    .map = bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_map
 };
 
-bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_cna_6_5_29_rxpmd_match_id_map_info_get(void) {
-    return &bcm56780_a0_cna_6_5_29_rxpmd_match_id_map_info;
+bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info_get(void) {
+    return &bcm56780_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info;
 }
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_pkt_flexhdr.c
similarity index 75%
rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_pkt_flexhdr.c
rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_pkt_flexhdr.c
index 55f9aad0306f..e0fd5d917d7c 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_pkt_flexhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_pkt_flexhdr.c
@@ -3,11 +3,11 @@
  * DO NOT EDIT THIS FILE!
  * This file is auto-generated by xfc_map_parser
  * from the NPL output file(s) map.yml
- * for device bcm56780_a0 and variant cna_6_5_29.
+ * for device bcm56780_a0 and variant cna_6_5_30_2_0.
  * Edits to this file will be lost when it is regenerated.
  *
  * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  * All Rights Reserved.$
  *
  * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
@@ -31,159 +31,159 @@
 #include <shr/shr_error.h>
 #include <bcmpkt/bcmpkt_flexhdr.h>
 #include <bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h>
-#include <bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr.h>
-#include <bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr_data.h>
-#include <bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h>
+#include <bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56780_a0/cna_6_5_30_2_0/bcm56780_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h>
 
 #define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
 #define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
 #define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
 #define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
 
-static void bcm56780_a0_cna_6_5_29_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+static void bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
 {
     uint32_t *reason = data + 0;
 
     if (reason[13] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
     }
     if (reason[13] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
     }
     if (reason[13] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
     }
     if (reason[13] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD);
     }
     if (reason[13] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST);
     }
     if (reason[13] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
     }
     if (reason[13] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
     }
     if (reason[13] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
     }
     if (reason[13] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
     }
     if (reason[13] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
     }
     if (reason[13] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
     }
     if (reason[13] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
     }
     if (reason[13] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
     }
     if (reason[13] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
     }
     if (reason[13] & (0x1 << 14)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
     }
     if (reason[13] & (0x1 << 16)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
     }
     if (reason[13] & (0x1 << 17)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
     }
     if (reason[13] & (0x1 << 18)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
     }
     if (reason[13] & (0x1 << 19)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
     }
     if (reason[13] & (0x1 << 23)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
     }
     if (reason[12] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
     }
 }
 
-static void bcm56780_a0_cna_6_5_29_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+static void bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
 {
     uint32_t *reason = data + 0;
 
     reason[13] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
         reason[13] |= (0x1 << 0);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
         reason[13] |= (0x1 << 1);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
         reason[13] |= (0x1 << 2);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) {
         reason[13] |= (0x1 << 3);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) {
         reason[13] |= (0x1 << 4);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
         reason[13] |= (0x1 << 5);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
         reason[13] |= (0x1 << 6);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
         reason[13] |= (0x1 << 7);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
         reason[13] |= (0x1 << 8);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
         reason[13] |= (0x1 << 9);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
         reason[13] |= (0x1 << 10);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
         reason[13] |= (0x1 << 11);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
         reason[13] |= (0x1 << 12);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
         reason[13] |= (0x1 << 13);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
         reason[13] |= (0x1 << 14);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
         reason[13] |= (0x1 << 16);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
         reason[13] |= (0x1 << 17);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
         reason[13] |= (0x1 << 18);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
         reason[13] |= (0x1 << 19);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
         reason[13] |= (0x1 << 23);
     }
     reason[12] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
         reason[12] |= (0x1 << 15);
     }
 }
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data[] = {
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_field_data[] = {
     {
         .name = "DROP_CODE_15_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -198,7 +198,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "DVP_15_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -213,7 +213,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "EFFECTIVE_TTL_7_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -228,7 +228,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "ENTROPY_LABEL_HIGH_3_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -243,7 +243,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "ENTROPY_LABEL_LOW_15_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -258,7 +258,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "EP_NIH_HDR_DROP_CODE_15_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -272,22 +272,22 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "EP_NIH_HDR_RECIRC_CODE_3_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 384, 387 }, /* Profile 2. */
-            { 384, 387 }, /* Profile 3. */
-            { 384, 387 }, /* Profile 4. */
-            { 352, 355 }, /* Profile 5. */
-            { 352, 355 }, /* Profile 6. */
-            { 352, 355 }, /* Profile 7. */
+            { 396, 399 }, /* Profile 2. */
+            { 396, 399 }, /* Profile 3. */
+            { 396, 399 }, /* Profile 4. */
+            { 364, 367 }, /* Profile 5. */
+            { 364, 367 }, /* Profile 6. */
+            { 364, 367 }, /* Profile 7. */
         },
         .profile_cnt = 8,
     },
     {
         .name = "EP_NIH_HDR_TIMESTAMP_15_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -301,7 +301,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "EP_NIH_HDR_TIMESTAMP_31_16",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -315,7 +315,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "ERSPAN3_GBP_SID_15_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -330,7 +330,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "EVENT_TRACE_VECTOR_15_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -345,7 +345,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "EVENT_TRACE_VECTOR_31_16",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -360,7 +360,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "EVENT_TRACE_VECTOR_47_32",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -375,7 +375,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "I2E_CLASS_ID_15_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -390,7 +390,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "ING_TIMESTAMP_15_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -405,7 +405,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "ING_TIMESTAMP_31_16",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -420,7 +420,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "INGRESS_PP_PORT_7_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -435,7 +435,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -450,7 +450,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "INGRESS_QOS_REMARK_CTRL_3_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -465,22 +465,22 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "INT_PRI_3_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 396, 399 }, /* Profile 2. */
-            { 396, 399 }, /* Profile 3. */
-            { 396, 399 }, /* Profile 4. */
-            { 364, 367 }, /* Profile 5. */
-            { 364, 367 }, /* Profile 6. */
-            { 364, 367 }, /* Profile 7. */
+            { 392, 395 }, /* Profile 2. */
+            { 392, 395 }, /* Profile 3. */
+            { 392, 395 }, /* Profile 4. */
+            { 360, 363 }, /* Profile 5. */
+            { 360, 363 }, /* Profile 6. */
+            { 360, 363 }, /* Profile 7. */
         },
         .profile_cnt = 8,
     },
     {
         .name = "L2_IIF_10_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -495,7 +495,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "L2_OIF_10_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -510,7 +510,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "L2_TUNNEL_SVP_15_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -525,7 +525,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "L3_IIF_13_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -540,7 +540,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "L3_OIF_1_13_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -552,7 +552,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -567,7 +567,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "NHOP_INDEX_1_14_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -579,7 +579,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "PARSER_VHLEN_0_15_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -594,7 +594,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "PKT_MISC_CTRL_0_3_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -609,22 +609,22 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 388, 391 }, /* Profile 2. */
-            { 388, 391 }, /* Profile 3. */
-            { 388, 391 }, /* Profile 4. */
-            { 356, 359 }, /* Profile 5. */
-            { 356, 359 }, /* Profile 6. */
-            { 356, 359 }, /* Profile 7. */
+            { 384, 387 }, /* Profile 2. */
+            { 384, 387 }, /* Profile 3. */
+            { 384, 387 }, /* Profile 4. */
+            { 352, 355 }, /* Profile 5. */
+            { 352, 355 }, /* Profile 6. */
+            { 352, 355 }, /* Profile 7. */
         },
         .profile_cnt = 8,
     },
     {
         .name = "SYSTEM_DESTINATION_15_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -639,7 +639,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "SYSTEM_OPCODE_3_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -654,7 +654,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "SYSTEM_SOURCE_15_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -669,7 +669,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "TAG_ACTION_CTRL_1_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -684,22 +684,22 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 392, 395 }, /* Profile 2. */
-            { 392, 395 }, /* Profile 3. */
-            { 392, 395 }, /* Profile 4. */
-            { 360, 363 }, /* Profile 5. */
-            { 360, 363 }, /* Profile 6. */
-            { 360, 363 }, /* Profile 7. */
+            { 388, 391 }, /* Profile 2. */
+            { 388, 391 }, /* Profile 3. */
+            { 388, 391 }, /* Profile 4. */
+            { 356, 359 }, /* Profile 5. */
+            { 356, 359 }, /* Profile 6. */
+            { 356, 359 }, /* Profile 7. */
         },
         .profile_cnt = 8,
     },
     {
         .name = "VFI_15_0",
-        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .fid = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -712,20 +712,20 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data
         },
         .profile_cnt = 8,
     },
-};static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data,
+};static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_field_data,
 };
 
-static shr_enum_map_t bcm56780_a0_cna_6_5_29_rxpmd_flex_reason_names[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+static shr_enum_map_t bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reason_names[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_reasons_info_t bcm56780_a0_cna_6_5_29_rxpmd_flex_reasons_info = {
-    .num_reasons = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT,
-    .reason_names = bcm56780_a0_cna_6_5_29_rxpmd_flex_reason_names,
-    .reason_encode = bcm56780_a0_cna_6_5_29_rxpmd_flex_reason_encode,
-    .reason_decode = bcm56780_a0_cna_6_5_29_rxpmd_flex_reason_decode,
+static bcmpkt_flex_reasons_info_t bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reason_names,
+    .reason_encode = bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reason_decode,
 };
 
 
@@ -868,7 +868,7 @@ static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_arp_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_arp_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT] = {
     bcmpkt_arp_t_hardware_len_get,
     bcmpkt_arp_t_hardware_type_get,
     bcmpkt_arp_t_operation_get,
@@ -880,7 +880,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_arp_t_fget[BCM56780_A0_CNA_6_5_29
     bcmpkt_arp_t_target_ip_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_arp_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_arp_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT] = {
     bcmpkt_arp_t_hardware_len_set,
     bcmpkt_arp_t_hardware_type_set,
     bcmpkt_arp_t_operation_set,
@@ -892,13 +892,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_arp_t_fset[BCM56780_A0_CNA_6_5_29
     bcmpkt_arp_t_target_ip_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_arp_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_arp_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_arp_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_arp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_arp_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_arp_t_field_data,
 };
 
 
@@ -1014,7 +1014,7 @@ static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_cpu_composites_0_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
     bcmpkt_cpu_composites_0_t_dma_cont0_get,
     bcmpkt_cpu_composites_0_t_dma_cont1_get,
     bcmpkt_cpu_composites_0_t_dma_cont2_get,
@@ -1024,7 +1024,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_cpu_composites_0_t_fget[BCM56780_
     bcmpkt_cpu_composites_0_t_dma_cont6_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_cpu_composites_0_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
     bcmpkt_cpu_composites_0_t_dma_cont0_set,
     bcmpkt_cpu_composites_0_t_dma_cont1_set,
     bcmpkt_cpu_composites_0_t_dma_cont2_set,
@@ -1034,13 +1034,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_cpu_composites_0_t_fset[BCM56780_
     bcmpkt_cpu_composites_0_t_dma_cont6_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_cpu_composites_0_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_cpu_composites_0_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_cpu_composites_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_data,
 };
 
 
@@ -1220,7 +1220,7 @@ static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_cpu_composites_1_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
     bcmpkt_cpu_composites_1_t_dma_cont10_get,
     bcmpkt_cpu_composites_1_t_dma_cont11_get,
     bcmpkt_cpu_composites_1_t_dma_cont12_get,
@@ -1234,7 +1234,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_cpu_composites_1_t_fget[BCM56780_
     bcmpkt_cpu_composites_1_t_dma_cont9_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_cpu_composites_1_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
     bcmpkt_cpu_composites_1_t_dma_cont10_set,
     bcmpkt_cpu_composites_1_t_dma_cont11_set,
     bcmpkt_cpu_composites_1_t_dma_cont12_set,
@@ -1248,13 +1248,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_cpu_composites_1_t_fset[BCM56780_
     bcmpkt_cpu_composites_1_t_dma_cont9_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_cpu_composites_1_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_cpu_composites_1_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_cpu_composites_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_data,
 };
 
 
@@ -1440,7 +1440,7 @@ static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_ep_nih_header_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
     bcmpkt_ep_nih_header_t_header_subtype_get,
     bcmpkt_ep_nih_header_t_header_type_get,
     bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
@@ -1455,7 +1455,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_ep_nih_header_t_fget[BCM56780_A0_
     bcmpkt_ep_nih_header_t_timestamp_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_ep_nih_header_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
     bcmpkt_ep_nih_header_t_header_subtype_set,
     bcmpkt_ep_nih_header_t_header_type_set,
     bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
@@ -1470,13 +1470,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_ep_nih_header_t_fset[BCM56780_A0_
     bcmpkt_ep_nih_header_t_timestamp_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_ep_nih_header_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_ep_nih_header_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_ep_nih_header_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_field_data,
 };
 
 
@@ -1616,7 +1616,7 @@ static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
     bcmpkt_erspan3_fixed_hdr_t_bso_get,
     bcmpkt_erspan3_fixed_hdr_t_cos_get,
     bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
@@ -1628,7 +1628,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_fget[BCM56780
     bcmpkt_erspan3_fixed_hdr_t_vlan_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
     bcmpkt_erspan3_fixed_hdr_t_bso_set,
     bcmpkt_erspan3_fixed_hdr_t_cos_set,
     bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
@@ -1640,13 +1640,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_fset[BCM56780
     bcmpkt_erspan3_fixed_hdr_t_vlan_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_data,
 };
 
 
@@ -1711,27 +1711,27 @@ static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
     bcmpkt_erspan3_subhdr_5_t_platform_id_get,
     bcmpkt_erspan3_subhdr_5_t_port_id_get,
     bcmpkt_erspan3_subhdr_5_t_switch_id_get,
     bcmpkt_erspan3_subhdr_5_t_timestamp_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
     bcmpkt_erspan3_subhdr_5_t_platform_id_set,
     bcmpkt_erspan3_subhdr_5_t_port_id_set,
     bcmpkt_erspan3_subhdr_5_t_switch_id_set,
     bcmpkt_erspan3_subhdr_5_t_timestamp_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_data,
 };
 
 
@@ -1750,21 +1750,21 @@ static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_ethertype_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_ethertype_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
     bcmpkt_ethertype_t_type_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_ethertype_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_ethertype_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
     bcmpkt_ethertype_t_type_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_ethertype_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_ethertype_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_ethertype_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_ethertype_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_ethertype_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_ethertype_t_field_data,
 };
 
 
@@ -1993,7 +1993,7 @@ static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int prof
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_generic_loopback_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
     bcmpkt_generic_loopback_t_destination_obj_get,
     bcmpkt_generic_loopback_t_destination_type_get,
     bcmpkt_generic_loopback_t_entropy_obj_get,
@@ -2011,7 +2011,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_generic_loopback_t_fget[BCM56780_
     bcmpkt_generic_loopback_t_start_byte_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_generic_loopback_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
     bcmpkt_generic_loopback_t_destination_obj_set,
     bcmpkt_generic_loopback_t_destination_type_set,
     bcmpkt_generic_loopback_t_entropy_obj_set,
@@ -2029,13 +2029,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_generic_loopback_t_fset[BCM56780_
     bcmpkt_generic_loopback_t_start_byte_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_generic_loopback_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_generic_loopback_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_generic_loopback_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_field_data,
 };
 
 
@@ -2084,25 +2084,25 @@ static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_icmp_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_icmp_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT] = {
     bcmpkt_icmp_t_checksum_get,
     bcmpkt_icmp_t_code_get,
     bcmpkt_icmp_t_icmp_type_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_icmp_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_icmp_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT] = {
     bcmpkt_icmp_t_checksum_set,
     bcmpkt_icmp_t_code_set,
     bcmpkt_icmp_t_icmp_type_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_icmp_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_icmp_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_icmp_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_icmp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_icmp_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_icmp_t_field_data,
 };
 
 
@@ -2184,7 +2184,7 @@ static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_ipfix_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_ipfix_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT] = {
     bcmpkt_ipfix_t_export_time_get,
     bcmpkt_ipfix_t_length_get,
     bcmpkt_ipfix_t_obs_domain_id_get,
@@ -2192,7 +2192,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_ipfix_t_fget[BCM56780_A0_CNA_6_5_
     bcmpkt_ipfix_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_ipfix_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_ipfix_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT] = {
     bcmpkt_ipfix_t_export_time_set,
     bcmpkt_ipfix_t_length_set,
     bcmpkt_ipfix_t_obs_domain_id_set,
@@ -2200,13 +2200,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_ipfix_t_fset[BCM56780_A0_CNA_6_5_
     bcmpkt_ipfix_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_ipfix_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_ipfix_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_ipfix_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_ipfix_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_ipfix_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_ipfix_t_field_data,
 };
 
 
@@ -2378,7 +2378,7 @@ static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, ui
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_ipv4_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_ipv4_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT] = {
     bcmpkt_ipv4_t_da_get,
     bcmpkt_ipv4_t_flags_frag_offset_get,
     bcmpkt_ipv4_t_hdr_checksum_get,
@@ -2392,7 +2392,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_ipv4_t_fget[BCM56780_A0_CNA_6_5_2
     bcmpkt_ipv4_t_version_hdr_len_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_ipv4_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_ipv4_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT] = {
     bcmpkt_ipv4_t_da_set,
     bcmpkt_ipv4_t_flags_frag_offset_set,
     bcmpkt_ipv4_t_hdr_checksum_set,
@@ -2406,13 +2406,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_ipv4_t_fset[BCM56780_A0_CNA_6_5_2
     bcmpkt_ipv4_t_version_hdr_len_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_ipv4_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_ipv4_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_ipv4_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_ipv4_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_ipv4_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_ipv4_t_field_data,
 };
 
 
@@ -2538,7 +2538,7 @@ static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t v
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_ipv6_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_ipv6_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT] = {
     bcmpkt_ipv6_t_da_get,
     bcmpkt_ipv6_t_flow_label_get,
     bcmpkt_ipv6_t_hop_limit_get,
@@ -2549,7 +2549,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_ipv6_t_fget[BCM56780_A0_CNA_6_5_2
     bcmpkt_ipv6_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_ipv6_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_ipv6_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT] = {
     bcmpkt_ipv6_t_da_set,
     bcmpkt_ipv6_t_flow_label_set,
     bcmpkt_ipv6_t_hop_limit_set,
@@ -2560,13 +2560,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_ipv6_t_fset[BCM56780_A0_CNA_6_5_2
     bcmpkt_ipv6_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_ipv6_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_ipv6_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_ipv6_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_ipv6_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_ipv6_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_ipv6_t_field_data,
 };
 
 
@@ -2602,23 +2602,23 @@ static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_l2_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_l2_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT] = {
     bcmpkt_l2_t_macda_get,
     bcmpkt_l2_t_macsa_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_l2_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_l2_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT] = {
     bcmpkt_l2_t_macda_set,
     bcmpkt_l2_t_macsa_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_l2_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_l2_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_l2_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_l2_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_l2_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_l2_t_field_data,
 };
 
 
@@ -2638,21 +2638,21 @@ static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
     bcmpkt_mirror_erspan_sn_t_seq_num_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
     bcmpkt_mirror_erspan_sn_t_seq_num_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_data,
 };
 
 
@@ -2672,21 +2672,21 @@ static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, u
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_mirror_transport_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
     bcmpkt_mirror_transport_t_data_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_mirror_transport_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
     bcmpkt_mirror_transport_t_data_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_mirror_transport_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_mirror_transport_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_mirror_transport_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_field_data,
 };
 
 
@@ -2798,7 +2798,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, i
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
     bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
     bcmpkt_psamp_mirror_on_drop_0_t_length_get,
@@ -2808,7 +2808,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fget[BCM
     bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
     bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
     bcmpkt_psamp_mirror_on_drop_0_t_length_set,
@@ -2818,13 +2818,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fset[BCM
     bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_data,
 };
 
 
@@ -2918,7 +2918,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *d
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get,
     bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get,
     bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get,
@@ -2927,7 +2927,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fget[BCM
     bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set,
     bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set,
     bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set,
@@ -2936,13 +2936,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fset[BCM
     bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_data,
 };
 
 
@@ -3036,7 +3036,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set(uint32_t *d
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get,
     bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get,
     bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get,
@@ -3045,7 +3045,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fget[BCM
     bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set,
     bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set,
     bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set,
@@ -3054,13 +3054,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fset[BCM
     bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_data,
 };
 
 
@@ -3203,7 +3203,7 @@ static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_rarp_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_rarp_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT] = {
     bcmpkt_rarp_t_hardware_len_get,
     bcmpkt_rarp_t_hardware_type_get,
     bcmpkt_rarp_t_operation_get,
@@ -3215,7 +3215,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_rarp_t_fget[BCM56780_A0_CNA_6_5_2
     bcmpkt_rarp_t_target_ip_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_rarp_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_rarp_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT] = {
     bcmpkt_rarp_t_hardware_len_set,
     bcmpkt_rarp_t_hardware_type_set,
     bcmpkt_rarp_t_operation_set,
@@ -3227,13 +3227,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_rarp_t_fset[BCM56780_A0_CNA_6_5_2
     bcmpkt_rarp_t_target_ip_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rarp_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_rarp_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_rarp_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_rarp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_rarp_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_rarp_t_field_data,
 };
 
 
@@ -3267,23 +3267,23 @@ static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profil
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_first_4bytes_t_dst_port_get,
     bcmpkt_tcp_first_4bytes_t_src_port_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_first_4bytes_t_dst_port_set,
     bcmpkt_tcp_first_4bytes_t_src_port_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_data,
 };
 
 
@@ -3379,7 +3379,7 @@ static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profil
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_last_16bytes_t_ack_num_get,
     bcmpkt_tcp_last_16bytes_t_checksum_get,
     bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
@@ -3388,7 +3388,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_fget[BCM56780_
     bcmpkt_tcp_last_16bytes_t_win_size_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_last_16bytes_t_ack_num_set,
     bcmpkt_tcp_last_16bytes_t_checksum_set,
     bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
@@ -3397,13 +3397,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_fset[BCM56780_
     bcmpkt_tcp_last_16bytes_t_win_size_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_data,
 };
 
 
@@ -3467,27 +3467,27 @@ static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_udp_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_udp_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT] = {
     bcmpkt_udp_t_checksum_get,
     bcmpkt_udp_t_dst_port_get,
     bcmpkt_udp_t_src_port_get,
     bcmpkt_udp_t_udp_length_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_udp_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_udp_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT] = {
     bcmpkt_udp_t_checksum_set,
     bcmpkt_udp_t_dst_port_set,
     bcmpkt_udp_t_src_port_set,
     bcmpkt_udp_t_udp_length_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_udp_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_udp_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_udp_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_udp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_udp_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_udp_t_field_data,
 };
 
 
@@ -3523,23 +3523,23 @@ static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_unknown_l3_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
     bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
     bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_unknown_l3_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
     bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
     bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_unknown_l3_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_unknown_l3_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_unknown_l3_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_field_data,
 };
 
 
@@ -3559,21 +3559,21 @@ static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_unknown_l4_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
     bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_unknown_l4_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
     bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_unknown_l4_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_unknown_l4_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_unknown_l4_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_field_data,
 };
 
 
@@ -3623,25 +3623,25 @@ static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_unknown_l5_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
     bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
     bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
     bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_unknown_l5_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
     bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
     bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
     bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_unknown_l5_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_unknown_l5_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_unknown_l5_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_field_data,
 };
 
 
@@ -3705,27 +3705,27 @@ static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_vlan_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_vlan_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT] = {
     bcmpkt_vlan_t_cfi_get,
     bcmpkt_vlan_t_pcp_get,
     bcmpkt_vlan_t_tpid_get,
     bcmpkt_vlan_t_vid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_vlan_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_vlan_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT] = {
     bcmpkt_vlan_t_cfi_set,
     bcmpkt_vlan_t_pcp_set,
     bcmpkt_vlan_t_tpid_set,
     bcmpkt_vlan_t_vid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_vlan_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_vlan_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_vlan_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_vlan_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_vlan_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_vlan_t_field_data,
 };
 
 
@@ -3775,247 +3775,247 @@ static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_vxlan_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_30_2_0_vxlan_t_fget[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT] = {
     bcmpkt_vxlan_t_flags_reserved_1_get,
     bcmpkt_vxlan_t_reserved2_get,
     bcmpkt_vxlan_t_vn_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_vxlan_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_30_2_0_vxlan_t_fset[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT] = {
     bcmpkt_vxlan_t_flags_reserved_1_set,
     bcmpkt_vxlan_t_reserved2_set,
     bcmpkt_vxlan_t_vn_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_vxlan_t_field_data[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_30_2_0_vxlan_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_vxlan_t_field_info = {
-    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT,
-    .info = bcm56780_a0_cna_6_5_29_vxlan_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_30_2_0_vxlan_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_30_2_0_vxlan_t_field_data,
 };
 
-static bcmpkt_flex_pmd_info_t bcm56780_a0_cna_6_5_29_flexhdr_info_list[BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT] = {
+static bcmpkt_flex_pmd_info_t bcm56780_a0_cna_6_5_30_2_0_flexhdr_info_list[BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT] = {
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_arp_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_arp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_arp_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_arp_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_arp_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_arp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_cpu_composites_0_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_cpu_composites_0_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_cpu_composites_0_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_cpu_composites_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_cpu_composites_1_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_cpu_composites_1_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_cpu_composites_1_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_cpu_composites_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_ep_nih_header_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_ep_nih_header_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_ep_nih_header_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_ep_nih_header_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_ethertype_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_ethertype_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_ethertype_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_ethertype_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_ethertype_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_ethertype_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_generic_loopback_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_generic_loopback_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_generic_loopback_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_generic_loopback_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_icmp_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_icmp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_icmp_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_icmp_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_icmp_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_icmp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_ipfix_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_ipfix_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_ipfix_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_ipfix_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_ipfix_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_ipfix_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_ipv4_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_ipv4_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_ipv4_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_ipv4_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_ipv4_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_ipv4_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_ipv6_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_ipv6_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_ipv6_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_ipv6_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_ipv6_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_ipv6_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_l2_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_l2_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_l2_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_l2_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_l2_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_l2_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_mirror_transport_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_mirror_transport_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_mirror_transport_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_mirror_transport_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_rarp_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_rarp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_rarp_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_rarp_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_rarp_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_rarp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_udp_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_udp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_udp_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_udp_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_udp_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_udp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_unknown_l3_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_unknown_l3_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_unknown_l3_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_unknown_l3_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_unknown_l4_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_unknown_l4_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_unknown_l4_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_unknown_l4_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_unknown_l5_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_unknown_l5_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_unknown_l5_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_unknown_l5_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_vlan_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_vlan_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_vlan_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_vlan_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_vlan_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_vlan_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_vxlan_t_field_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_vxlan_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_cna_6_5_29_vxlan_t_fget,
-        .flex_fset = bcm56780_a0_cna_6_5_29_vxlan_t_fset,
+        .flex_fget = bcm56780_a0_cna_6_5_30_2_0_vxlan_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_30_2_0_vxlan_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_cna_6_5_29_rxpmd_flex_field_info,
-        .reasons_info = &bcm56780_a0_cna_6_5_29_rxpmd_flex_reasons_info,
+        .field_info = &bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_field_info,
+        .reasons_info = &bcm56780_a0_cna_6_5_30_2_0_rxpmd_flex_reasons_info,
         .flex_common_fget = bcm56780_a0_rxpmd_flex_fget,
         .flex_common_fset = bcm56780_a0_rxpmd_flex_fset,
     },
 };
 
-static shr_enum_map_t bcm56780_a0_cna_6_5_29_flexhdr_id_map[] = {
-    BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_NAME_MAP_INIT
+static shr_enum_map_t bcm56780_a0_cna_6_5_30_2_0_flexhdr_id_map[] = {
+    BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
 };
 
-shr_enum_map_t * bcm56780_a0_cna_6_5_29_flexhdr_map_get(void)
+shr_enum_map_t * bcm56780_a0_cna_6_5_30_2_0_flexhdr_map_get(void)
 {
-    return bcm56780_a0_cna_6_5_29_flexhdr_id_map;
+    return bcm56780_a0_cna_6_5_30_2_0_flexhdr_id_map;
 }
 
-bcmpkt_flex_pmd_info_t * bcm56780_a0_cna_6_5_29_flex_pmd_info_get(uint32_t hid)
+bcmpkt_flex_pmd_info_t * bcm56780_a0_cna_6_5_30_2_0_flex_pmd_info_get(uint32_t hid)
 {
-    if (hid >= BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT) {
+    if (hid >= BCM56780_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT) {
         return NULL;
     }
 
-    return &bcm56780_a0_cna_6_5_29_flexhdr_info_list[hid];
+    return &bcm56780_a0_cna_6_5_30_2_0_flexhdr_info_list[hid];
 }
 
-int bcm56780_a0_cna_6_5_29_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+int bcm56780_a0_cna_6_5_30_2_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
     7,
     -1,
     -1,
     27,
-};
\ No newline at end of file
+};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c
similarity index 77%
rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id.c
rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c
index 57ca11ef713f..da2f4202ced8 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c
@@ -2,12 +2,12 @@
  *
  * DO NOT EDIT THIS FILE!
  * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56780_a0_dna_2_9_5_0_sf_match_id_info.yml
- * for device bcm56780_a0 and variant dna_2_9_5_0.
+ * from the NPL output file(s) bcm56780_a0_dna_6_5_30_2_0_sf_match_id_info.yml
+ * for device bcm56780_a0 and variant dna_6_5_30_2_0.
  * Edits to this file will be lost when it is regenerated.
  *
  * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  * All Rights Reserved.$
  *
  * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
@@ -29,13 +29,13 @@
 
 
 #include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-#include <bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id_defs.h>
+#include <bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h>
 
 
 static bcmpkt_rxpmd_match_id_db_t
-bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_COUNT] = {
+bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db[BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT] = {
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_ETAG",
         .match        = 0x80,
         .match_mask   = 0xc0,
@@ -49,7 +49,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */
         .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -63,7 +63,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */
         .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0",
         .match        = 0x22,
         .match_mask   = 0x22,
@@ -77,7 +77,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
         .match        = 0x10,
         .match_mask   = 0x10,
@@ -91,7 +91,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
         .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -105,7 +105,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
         .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0xff,
@@ -119,7 +119,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
         .match        = 0x8,
         .match_mask   = 0x8,
@@ -133,7 +133,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
         .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -147,7 +147,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_SVTAG",
         .match        = 0x20,
         .match_mask   = 0x22,
@@ -161,7 +161,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_VNTAG",
         .match        = 0x40,
         .match_mask   = 0xc0,
@@ -175,7 +175,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
         .match        = 0x1800,
         .match_mask   = 0x3830,
@@ -189,7 +189,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x80,
         .match_mask   = 0x1c2,
@@ -203,7 +203,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
         .match        = 0x408,
         .match_mask   = 0x64c,
@@ -217,21 +217,21 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
-        .match        = 0x3000,
+        .match        = 0x3800,
         .match_mask   = 0x3800,
         .match_maxbit = 45,
         .match_minbit = 32,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x6,
+        .value        = 0x7,
         .pmaxbit      = 62,
         .pminbit      = 49,
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
         .match        = 0x200,
         .match_mask   = 0x642,
@@ -245,7 +245,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -259,7 +259,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
         .match        = 0x100,
         .match_mask   = 0x1c0,
@@ -273,7 +273,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x600,
         .match_mask   = 0x640,
@@ -287,7 +287,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
         .match        = 0x1830,
         .match_mask   = 0x3870,
@@ -301,7 +301,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
         .match        = 0x2,
         .match_mask   = 0x42,
@@ -315,7 +315,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
         .match        = 0x202,
         .match_mask   = 0x642,
@@ -329,7 +329,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
         .match        = 0x1000,
         .match_mask   = 0x3800,
@@ -343,7 +343,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
         .match        = 0x82,
         .match_mask   = 0x1c2,
@@ -357,7 +357,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
         .match        = 0x12,
         .match_mask   = 0x72,
@@ -371,7 +371,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
         .match        = 0x2000,
         .match_mask   = 0x3830,
@@ -385,7 +385,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA",
         .match        = 0x180,
         .match_mask   = 0x1c0,
@@ -399,7 +399,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
         .match        = 0x404,
         .match_mask   = 0x64c,
@@ -413,7 +413,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
         .match        = 0x4,
         .match_mask   = 0x4c,
@@ -427,7 +427,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
         .match        = 0x8,
         .match_mask   = 0x4c,
@@ -441,7 +441,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
         .match        = 0x40,
         .match_mask   = 0x40,
@@ -455,7 +455,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
         .match        = 0x42,
         .match_mask   = 0x42,
@@ -469,7 +469,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
         .match        = 0x44,
         .match_mask   = 0x44,
@@ -483,7 +483,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
         .match        = 0x48,
         .match_mask   = 0x48,
@@ -497,7 +497,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
         .match        = 0x50,
         .match_mask   = 0x50,
@@ -511,7 +511,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -525,7 +525,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
         .match        = 0xc0,
         .match_mask   = 0xc0,
@@ -539,7 +539,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
         .match        = 0x140,
         .match_mask   = 0x140,
@@ -553,7 +553,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
         .match        = 0x240,
         .match_mask   = 0x240,
@@ -567,7 +567,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3fff,
@@ -581,21 +581,21 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
-        .match        = 0x3800,
+        .match        = 0x3000,
         .match_mask   = 0x3800,
         .match_maxbit = 45,
         .match_minbit = 32,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x7,
+        .value        = 0x6,
         .pmaxbit      = 62,
         .pminbit      = 49,
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
         .match        = 0x800,
         .match_mask   = 0x3830,
@@ -609,7 +609,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x20,
         .match_mask   = 0x70,
@@ -623,7 +623,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x820,
         .match_mask   = 0x3870,
@@ -637,7 +637,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
         .match        = 0x30,
         .match_mask   = 0x70,
@@ -651,7 +651,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x10,
         .match_mask   = 0x72,
@@ -665,7 +665,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x2800,
         .match_mask   = 0x3800,
@@ -679,7 +679,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x2030,
         .match_mask   = 0x3870,
@@ -693,7 +693,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
         .match        = 0x830,
         .match_mask   = 0x3870,
@@ -707,7 +707,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
         .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
         .match        = 0x2,
         .match_mask   = 0x3,
@@ -721,7 +721,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
         .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
         .match        = 0x1,
         .match_mask   = 0x3,
@@ -735,7 +735,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
         .name         = "EGRESS_PKT_SYS_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3,
@@ -749,7 +749,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG",
         .match        = 0x80,
         .match_mask   = 0xc0,
@@ -763,7 +763,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -777,7 +777,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0",
         .match        = 0x22,
         .match_mask   = 0x22,
@@ -791,7 +791,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
         .match        = 0x10,
         .match_mask   = 0x10,
@@ -805,7 +805,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -819,7 +819,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0xff,
@@ -833,7 +833,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
         .match        = 0x8,
         .match_mask   = 0x8,
@@ -847,7 +847,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -861,7 +861,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG",
         .match        = 0x20,
         .match_mask   = 0x22,
@@ -875,7 +875,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG",
         .match        = 0x40,
         .match_mask   = 0xc0,
@@ -889,7 +889,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
         .match        = 0x1800,
         .match_mask   = 0x3830,
@@ -903,7 +903,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x80,
         .match_mask   = 0x1c2,
@@ -917,7 +917,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
         .match        = 0x408,
         .match_mask   = 0x64c,
@@ -931,21 +931,21 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
-        .match        = 0x3000,
+        .match        = 0x3800,
         .match_mask   = 0x3800,
         .match_maxbit = 23,
         .match_minbit = 10,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x6,
+        .value        = 0x7,
         .pmaxbit      = 34,
         .pminbit      = 21,
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
         .match        = 0x200,
         .match_mask   = 0x642,
@@ -959,7 +959,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -973,7 +973,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
         .match        = 0x100,
         .match_mask   = 0x1c0,
@@ -987,7 +987,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x600,
         .match_mask   = 0x640,
@@ -1001,7 +1001,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
         .match        = 0x1830,
         .match_mask   = 0x3870,
@@ -1015,7 +1015,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
         .match        = 0x2,
         .match_mask   = 0x42,
@@ -1029,7 +1029,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
         .match        = 0x202,
         .match_mask   = 0x642,
@@ -1043,7 +1043,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
         .match        = 0x1000,
         .match_mask   = 0x3800,
@@ -1057,7 +1057,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
         .match        = 0x82,
         .match_mask   = 0x1c2,
@@ -1071,7 +1071,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
         .match        = 0x12,
         .match_mask   = 0x72,
@@ -1085,7 +1085,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
         .match        = 0x2000,
         .match_mask   = 0x3830,
@@ -1099,7 +1099,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA",
         .match        = 0x180,
         .match_mask   = 0x1c0,
@@ -1113,7 +1113,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
         .match        = 0x404,
         .match_mask   = 0x64c,
@@ -1127,7 +1127,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
         .match        = 0x4,
         .match_mask   = 0x4c,
@@ -1141,7 +1141,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
         .match        = 0x8,
         .match_mask   = 0x4c,
@@ -1155,7 +1155,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
         .match        = 0x40,
         .match_mask   = 0x40,
@@ -1169,7 +1169,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
         .match        = 0x42,
         .match_mask   = 0x42,
@@ -1183,7 +1183,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
         .match        = 0x44,
         .match_mask   = 0x44,
@@ -1197,7 +1197,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
         .match        = 0x48,
         .match_mask   = 0x48,
@@ -1211,7 +1211,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
         .match        = 0x50,
         .match_mask   = 0x50,
@@ -1225,7 +1225,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -1239,7 +1239,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
         .match        = 0xc0,
         .match_mask   = 0xc0,
@@ -1253,7 +1253,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
         .match        = 0x140,
         .match_mask   = 0x140,
@@ -1267,7 +1267,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
         .match        = 0x240,
         .match_mask   = 0x240,
@@ -1281,7 +1281,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3fff,
@@ -1295,21 +1295,21 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
-        .match        = 0x3800,
+        .match        = 0x3000,
         .match_mask   = 0x3800,
         .match_maxbit = 23,
         .match_minbit = 10,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x7,
+        .value        = 0x6,
         .pmaxbit      = 34,
         .pminbit      = 21,
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
         .match        = 0x800,
         .match_mask   = 0x3830,
@@ -1323,7 +1323,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x20,
         .match_mask   = 0x70,
@@ -1337,7 +1337,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x820,
         .match_mask   = 0x3870,
@@ -1351,7 +1351,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
         .match        = 0x30,
         .match_mask   = 0x70,
@@ -1365,7 +1365,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x10,
         .match_mask   = 0x72,
@@ -1379,7 +1379,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x2800,
         .match_mask   = 0x3800,
@@ -1393,7 +1393,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x2030,
         .match_mask   = 0x3870,
@@ -1407,7 +1407,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
         .match        = 0x830,
         .match_mask   = 0x3870,
@@ -1421,7 +1421,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_ETAG",
         .match        = 0x80,
         .match_mask   = 0xc0,
@@ -1435,7 +1435,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
         .match        = 0x10,
         .match_mask   = 0x10,
@@ -1449,7 +1449,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
         .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -1463,7 +1463,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
         .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0xff,
@@ -1477,7 +1477,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
         .match        = 0x8,
         .match_mask   = 0x8,
@@ -1491,7 +1491,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
         .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -1505,7 +1505,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_VNTAG",
         .match        = 0x40,
         .match_mask   = 0xc0,
@@ -1519,7 +1519,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
         .match        = 0x1800,
         .match_mask   = 0x3830,
@@ -1533,7 +1533,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x80,
         .match_mask   = 0x1c2,
@@ -1547,7 +1547,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
         .match        = 0x408,
         .match_mask   = 0x64c,
@@ -1561,21 +1561,21 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
-        .match        = 0x3000,
+        .match        = 0x3800,
         .match_mask   = 0x3800,
         .match_maxbit = 45,
         .match_minbit = 32,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x6,
+        .value        = 0x7,
         .pmaxbit      = 45,
         .pminbit      = 32,
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
         .match        = 0x200,
         .match_mask   = 0x642,
@@ -1589,7 +1589,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -1603,7 +1603,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
         .match        = 0x100,
         .match_mask   = 0x1c0,
@@ -1617,7 +1617,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x600,
         .match_mask   = 0x640,
@@ -1631,7 +1631,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
         .match        = 0x2000,
         .match_mask   = 0x3830,
@@ -1645,7 +1645,21 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
         .match        = 0x404,
         .match_mask   = 0x64c,
@@ -1659,7 +1673,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
         .match        = 0x4,
         .match_mask   = 0x4c,
@@ -1673,7 +1687,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
         .match        = 0x8,
         .match_mask   = 0x4c,
@@ -1687,7 +1701,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3fff,
@@ -1701,21 +1715,21 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
-        .match        = 0x3800,
+        .match        = 0x3000,
         .match_mask   = 0x3800,
         .match_maxbit = 45,
         .match_minbit = 32,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x7,
+        .value        = 0x6,
         .pmaxbit      = 45,
         .pminbit      = 32,
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
         .match        = 0x800,
         .match_mask   = 0x3830,
@@ -1729,7 +1743,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x20,
         .match_mask   = 0x70,
@@ -1743,7 +1757,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x820,
         .match_mask   = 0x3870,
@@ -1757,7 +1771,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
         .match        = 0x30,
         .match_mask   = 0x70,
@@ -1771,7 +1785,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x10,
         .match_mask   = 0x72,
@@ -1785,7 +1799,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x2800,
         .match_mask   = 0x3800,
@@ -1799,7 +1813,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x2030,
         .match_mask   = 0x3870,
@@ -1813,7 +1827,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_ETAG",
         .match        = 0x80,
         .match_mask   = 0xc0,
@@ -1827,7 +1841,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -1841,7 +1855,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0",
         .match        = 0x22,
         .match_mask   = 0x22,
@@ -1855,7 +1869,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
         .match        = 0x10,
         .match_mask   = 0x10,
@@ -1869,7 +1883,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -1883,7 +1897,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0xff,
@@ -1897,7 +1911,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
         .match        = 0x8,
         .match_mask   = 0x8,
@@ -1911,7 +1925,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -1925,7 +1939,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_SVTAG",
         .match        = 0x20,
         .match_mask   = 0x22,
@@ -1939,7 +1953,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_VNTAG",
         .match        = 0x40,
         .match_mask   = 0xc0,
@@ -1953,7 +1967,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
         .match        = 0x1800,
         .match_mask   = 0x3830,
@@ -1967,7 +1981,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x80,
         .match_mask   = 0x1c2,
@@ -1981,7 +1995,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
         .match        = 0x408,
         .match_mask   = 0x64c,
@@ -1995,21 +2009,21 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
-        .match        = 0x3000,
+        .match        = 0x3800,
         .match_mask   = 0x3800,
         .match_maxbit = 23,
         .match_minbit = 10,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x6,
+        .value        = 0x7,
         .pmaxbit      = 23,
         .pminbit      = 10,
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
         .match        = 0x200,
         .match_mask   = 0x642,
@@ -2023,7 +2037,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -2037,7 +2051,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
         .match        = 0x100,
         .match_mask   = 0x1c0,
@@ -2051,7 +2065,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x600,
         .match_mask   = 0x640,
@@ -2065,7 +2079,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
         .match        = 0x1830,
         .match_mask   = 0x3870,
@@ -2079,7 +2093,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
         .match        = 0x2,
         .match_mask   = 0x42,
@@ -2093,7 +2107,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
         .match        = 0x202,
         .match_mask   = 0x642,
@@ -2107,7 +2121,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
         .match        = 0x1000,
         .match_mask   = 0x3800,
@@ -2121,7 +2135,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
         .match        = 0x82,
         .match_mask   = 0x1c2,
@@ -2135,7 +2149,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
         .match        = 0x12,
         .match_mask   = 0x72,
@@ -2149,7 +2163,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
         .match        = 0x2000,
         .match_mask   = 0x3830,
@@ -2163,7 +2177,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA",
         .match        = 0x180,
         .match_mask   = 0x1c0,
@@ -2177,7 +2191,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
         .match        = 0x404,
         .match_mask   = 0x64c,
@@ -2191,7 +2205,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
         .match        = 0x4,
         .match_mask   = 0x4c,
@@ -2205,7 +2219,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
         .match        = 0x8,
         .match_mask   = 0x4c,
@@ -2219,7 +2233,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
         .match        = 0x40,
         .match_mask   = 0x40,
@@ -2233,7 +2247,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
         .match        = 0x42,
         .match_mask   = 0x42,
@@ -2247,7 +2261,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
         .match        = 0x44,
         .match_mask   = 0x44,
@@ -2261,7 +2275,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
         .match        = 0x48,
         .match_mask   = 0x48,
@@ -2275,7 +2289,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
         .match        = 0x50,
         .match_mask   = 0x50,
@@ -2289,7 +2303,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -2303,7 +2317,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
         .match        = 0xc0,
         .match_mask   = 0xc0,
@@ -2317,7 +2331,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
         .match        = 0x140,
         .match_mask   = 0x140,
@@ -2331,7 +2345,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
         .match        = 0x240,
         .match_mask   = 0x240,
@@ -2345,7 +2359,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3fff,
@@ -2359,21 +2373,21 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
-        .match        = 0x3800,
+        .match        = 0x3000,
         .match_mask   = 0x3800,
         .match_maxbit = 23,
         .match_minbit = 10,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x7,
+        .value        = 0x6,
         .pmaxbit      = 23,
         .pminbit      = 10,
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
         .match        = 0x800,
         .match_mask   = 0x3830,
@@ -2387,7 +2401,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x20,
         .match_mask   = 0x70,
@@ -2401,7 +2415,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x820,
         .match_mask   = 0x3870,
@@ -2415,7 +2429,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
         .match        = 0x30,
         .match_mask   = 0x70,
@@ -2429,7 +2443,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x10,
         .match_mask   = 0x72,
@@ -2443,7 +2457,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x2800,
         .match_mask   = 0x3800,
@@ -2457,7 +2471,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x2030,
         .match_mask   = 0x3870,
@@ -2471,7 +2485,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
         .match        = 0x830,
         .match_mask   = 0x3870,
@@ -2485,7 +2499,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
         .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
         .match        = 0x2,
         .match_mask   = 0x3,
@@ -2499,7 +2513,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
         .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
         .match        = 0x1,
         .match_mask   = 0x3,
@@ -2513,7 +2527,7 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        /* BCM56780_A0_DNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
         .name         = "INGRESS_PKT_SYS_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3,
@@ -2528,23 +2542,23 @@ bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID
     },
 };
 
-static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db_info = {
-    .num_entries = 178,
-    .db = bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db
+static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db_info = {
+    .num_entries = 179,
+    .db = bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db
 };
-bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db_info_get(void) {
-    return &bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db_info;
+bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db_info_get(void) {
+    return &bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_db_info;
 }
 
-static shr_enum_map_t bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_map[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+static shr_enum_map_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_map[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_map_info = {
-    .num_entries = 178,
-    .map = bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_map
+static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_map_info = {
+    .num_entries = 179,
+    .map = bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_map
 };
 
-bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_map_info_get(void) {
-    return &bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_map_info;
+bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_map_info_get(void) {
+    return &bcm56780_a0_dna_6_5_30_2_0_rxpmd_match_id_map_info;
 }
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_pkt_flexhdr.c
similarity index 69%
rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_pkt_flexhdr.c
rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_pkt_flexhdr.c
index 616d94ee4e0f..a66a52e569c3 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_pkt_flexhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_pkt_flexhdr.c
@@ -3,11 +3,11 @@
  * DO NOT EDIT THIS FILE!
  * This file is auto-generated by xfc_map_parser
  * from the NPL output file(s) map.yml
- * for device bcm56780_a0 and variant dna_2_9_5_0.
+ * for device bcm56780_a0 and variant dna_6_5_30_2_0.
  * Edits to this file will be lost when it is regenerated.
  *
  * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  * All Rights Reserved.$
  *
  * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
@@ -31,309 +31,309 @@
 #include <shr/shr_error.h>
 #include <bcmpkt/bcmpkt_flexhdr.h>
 #include <bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h>
-#include <bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr.h>
-#include <bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr_data.h>
-#include <bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_flex_data.h>
+#include <bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56780_a0/dna_6_5_30_2_0/bcm56780_a0_dna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h>
 
 #define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
 #define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
 #define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
 #define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
 
-static void bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+static void bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
 {
     uint32_t *reason = data + 0;
 
     if (reason[13] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
     }
     if (reason[13] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
     }
     if (reason[13] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
     }
     if (reason[13] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT);
     }
     if (reason[13] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
     }
     if (reason[13] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
     }
     if (reason[13] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
     }
     if (reason[13] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD);
     }
     if (reason[13] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
     }
     if (reason[13] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
     }
     if (reason[13] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
     }
     if (reason[13] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
     }
     if (reason[13] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
     }
     if (reason[13] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
     }
     if (reason[13] & (0x1 << 14)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
     }
     if (reason[13] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
     }
     if (reason[13] & (0x1 << 16)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
     }
     if (reason[13] & (0x1 << 17)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
     }
     if (reason[13] & (0x1 << 18)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
     }
     if (reason[13] & (0x1 << 19)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
     }
     if (reason[13] & (0x1 << 20)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
     }
     if (reason[13] & (0x1 << 21)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
     }
     if (reason[13] & (0x1 << 22)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
     }
     if (reason[13] & (0x1 << 23)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
     }
     if (reason[13] & (0x1 << 24)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
     }
     if (reason[13] & (0x1 << 25)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
     }
     if (reason[13] & (0x1 << 26)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
     }
     if (reason[13] & (0x1 << 27)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
     }
     if (reason[13] & (0x1 << 28)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
     }
     if (reason[13] & (0x1 << 29)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
     }
     if (reason[13] & (0x1 << 30)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
     }
     if (reason[13] & (0x1 << 31)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
     }
     if (reason[12] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
     }
     if (reason[12] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
     }
     if (reason[12] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
     }
     if (reason[12] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
     }
     if (reason[12] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
     }
     if (reason[12] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
     }
     if (reason[12] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
     }
     if (reason[12] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
     }
     if (reason[12] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY);
     }
     if (reason[12] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED);
     }
     if (reason[12] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED);
     }
     if (reason[12] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR);
     }
     if (reason[12] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU);
     }
     if (reason[12] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
     }
 }
 
-static void bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+static void bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
 {
     uint32_t *reason = data + 0;
 
     reason[13] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
         reason[13] |= (0x1 << 0);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
         reason[13] |= (0x1 << 1);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
         reason[13] |= (0x1 << 2);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) {
         reason[13] |= (0x1 << 3);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
         reason[13] |= (0x1 << 4);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
         reason[13] |= (0x1 << 5);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
         reason[13] |= (0x1 << 6);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) {
         reason[13] |= (0x1 << 7);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
         reason[13] |= (0x1 << 8);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
         reason[13] |= (0x1 << 9);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
         reason[13] |= (0x1 << 10);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
         reason[13] |= (0x1 << 11);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
         reason[13] |= (0x1 << 12);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
         reason[13] |= (0x1 << 13);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
         reason[13] |= (0x1 << 14);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
         reason[13] |= (0x1 << 15);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
         reason[13] |= (0x1 << 16);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
         reason[13] |= (0x1 << 17);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
         reason[13] |= (0x1 << 18);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
         reason[13] |= (0x1 << 19);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
         reason[13] |= (0x1 << 20);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
         reason[13] |= (0x1 << 21);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
         reason[13] |= (0x1 << 22);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
         reason[13] |= (0x1 << 23);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
         reason[13] |= (0x1 << 24);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
         reason[13] |= (0x1 << 25);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
         reason[13] |= (0x1 << 26);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
         reason[13] |= (0x1 << 27);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
         reason[13] |= (0x1 << 28);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
         reason[13] |= (0x1 << 29);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
         reason[13] |= (0x1 << 30);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
         reason[13] |= (0x1 << 31);
     }
     reason[12] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
         reason[12] |= (0x1 << 0);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
         reason[12] |= (0x1 << 1);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
         reason[12] |= (0x1 << 2);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
         reason[12] |= (0x1 << 3);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
         reason[12] |= (0x1 << 4);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
         reason[12] |= (0x1 << 5);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
         reason[12] |= (0x1 << 6);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
         reason[12] |= (0x1 << 7);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY)) {
         reason[12] |= (0x1 << 8);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) {
         reason[12] |= (0x1 << 9);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) {
         reason[12] |= (0x1 << 10);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) {
         reason[12] |= (0x1 << 12);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) {
         reason[12] |= (0x1 << 13);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
         reason[12] |= (0x1 << 15);
     }
 }
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_data[] = {
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_data[] = {
     {
         .name = "DLB_ECMP_DESTINATION_15_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -354,7 +354,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "DROP_CODE_15_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -375,7 +375,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "DVP_15_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -396,7 +396,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "EFFECTIVE_TTL_7_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -417,7 +417,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "EGR_MTOP_INDEX_HI_3_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -438,7 +438,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -457,7 +457,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -472,28 +472,28 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "ENTROPY_LABEL_HIGH_3_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 412, 415 }, /* Profile 2. */
-            { 412, 415 }, /* Profile 3. */
-            { 412, 415 }, /* Profile 4. */
-            { 412, 415 }, /* Profile 5. */
-            { 412, 415 }, /* Profile 6. */
-            { 412, 415 }, /* Profile 7. */
-            { 412, 415 }, /* Profile 8. */
-            { 412, 415 }, /* Profile 9. */
-            { 412, 415 }, /* Profile 10. */
-            { 412, 415 }, /* Profile 11. */
-            { 412, 415 }, /* Profile 12. */
-            { 412, 415 }, /* Profile 13. */
+            { 404, 407 }, /* Profile 2. */
+            { 404, 407 }, /* Profile 3. */
+            { 404, 407 }, /* Profile 4. */
+            { 404, 407 }, /* Profile 5. */
+            { 404, 407 }, /* Profile 6. */
+            { 404, 407 }, /* Profile 7. */
+            { 404, 407 }, /* Profile 8. */
+            { 404, 407 }, /* Profile 9. */
+            { 404, 407 }, /* Profile 10. */
+            { 404, 407 }, /* Profile 11. */
+            { 404, 407 }, /* Profile 12. */
+            { 404, 407 }, /* Profile 13. */
         },
         .profile_cnt = 14,
     },
     {
         .name = "ENTROPY_LABEL_LOW_15_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -514,7 +514,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "EP_NIH_HDR_TIMESTAMP_15_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -533,7 +533,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "EP_NIH_HDR_TIMESTAMP_31_16",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -552,7 +552,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "EVENT_TRACE_VECTOR_15_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -573,7 +573,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "EVENT_TRACE_VECTOR_31_16",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -594,7 +594,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "EVENT_TRACE_VECTOR_47_32",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -615,7 +615,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "I2E_CLASS_ID_15_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -636,28 +636,28 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "IFP_IOAM_GBP_ACTION_3_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 396, 399 }, /* Profile 2. */
-            { 396, 399 }, /* Profile 3. */
-            { 396, 399 }, /* Profile 4. */
-            { 396, 399 }, /* Profile 5. */
-            { 396, 399 }, /* Profile 6. */
-            { 396, 399 }, /* Profile 7. */
-            { 396, 399 }, /* Profile 8. */
-            { 396, 399 }, /* Profile 9. */
-            { 396, 399 }, /* Profile 10. */
-            { 396, 399 }, /* Profile 11. */
-            { 396, 399 }, /* Profile 12. */
-            { 396, 399 }, /* Profile 13. */
+            { 392, 395 }, /* Profile 2. */
+            { 392, 395 }, /* Profile 3. */
+            { 392, 395 }, /* Profile 4. */
+            { 392, 395 }, /* Profile 5. */
+            { 392, 395 }, /* Profile 6. */
+            { 392, 395 }, /* Profile 7. */
+            { 392, 395 }, /* Profile 8. */
+            { 392, 395 }, /* Profile 9. */
+            { 392, 395 }, /* Profile 10. */
+            { 392, 395 }, /* Profile 11. */
+            { 392, 395 }, /* Profile 12. */
+            { 392, 395 }, /* Profile 13. */
         },
         .profile_cnt = 14,
     },
     {
         .name = "IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -678,28 +678,28 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "IFP_TS_CONTROL_ACTION_3_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 388, 391 }, /* Profile 2. */
-            { 388, 391 }, /* Profile 3. */
-            { 388, 391 }, /* Profile 4. */
-            { 388, 391 }, /* Profile 5. */
-            { 388, 391 }, /* Profile 6. */
-            { 388, 391 }, /* Profile 7. */
-            { 388, 391 }, /* Profile 8. */
-            { 388, 391 }, /* Profile 9. */
-            { 388, 391 }, /* Profile 10. */
-            { 388, 391 }, /* Profile 11. */
-            { 388, 391 }, /* Profile 12. */
-            { 388, 391 }, /* Profile 13. */
+            { 400, 403 }, /* Profile 2. */
+            { 400, 403 }, /* Profile 3. */
+            { 400, 403 }, /* Profile 4. */
+            { 400, 403 }, /* Profile 5. */
+            { 400, 403 }, /* Profile 6. */
+            { 400, 403 }, /* Profile 7. */
+            { 400, 403 }, /* Profile 8. */
+            { 400, 403 }, /* Profile 9. */
+            { 400, 403 }, /* Profile 10. */
+            { 400, 403 }, /* Profile 11. */
+            { 400, 403 }, /* Profile 12. */
+            { 400, 403 }, /* Profile 13. */
         },
         .profile_cnt = 14,
     },
     {
         .name = "ING_TIMESTAMP_15_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -720,7 +720,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "ING_TIMESTAMP_31_16",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -741,7 +741,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "INGRESS_PP_PORT_7_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -762,7 +762,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -783,49 +783,49 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "INGRESS_QOS_REMARK_CTRL_3_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 416, 419 }, /* Profile 2. */
-            { 416, 419 }, /* Profile 3. */
-            { 416, 419 }, /* Profile 4. */
-            { 416, 419 }, /* Profile 5. */
-            { 416, 419 }, /* Profile 6. */
-            { 416, 419 }, /* Profile 7. */
-            { 416, 419 }, /* Profile 8. */
-            { 416, 419 }, /* Profile 9. */
-            { 416, 419 }, /* Profile 10. */
-            { 416, 419 }, /* Profile 11. */
-            { 416, 419 }, /* Profile 12. */
-            { 416, 419 }, /* Profile 13. */
+            { 424, 427 }, /* Profile 2. */
+            { 424, 427 }, /* Profile 3. */
+            { 424, 427 }, /* Profile 4. */
+            { 424, 427 }, /* Profile 5. */
+            { 424, 427 }, /* Profile 6. */
+            { 424, 427 }, /* Profile 7. */
+            { 424, 427 }, /* Profile 8. */
+            { 424, 427 }, /* Profile 9. */
+            { 424, 427 }, /* Profile 10. */
+            { 424, 427 }, /* Profile 11. */
+            { 424, 427 }, /* Profile 12. */
+            { 424, 427 }, /* Profile 13. */
         },
         .profile_cnt = 14,
     },
     {
         .name = "INT_PRI_3_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 392, 395 }, /* Profile 2. */
-            { 392, 395 }, /* Profile 3. */
-            { 392, 395 }, /* Profile 4. */
-            { 392, 395 }, /* Profile 5. */
-            { 392, 395 }, /* Profile 6. */
-            { 392, 395 }, /* Profile 7. */
-            { 392, 395 }, /* Profile 8. */
-            { 392, 395 }, /* Profile 9. */
-            { 392, 395 }, /* Profile 10. */
-            { 392, 395 }, /* Profile 11. */
-            { 392, 395 }, /* Profile 12. */
-            { 392, 395 }, /* Profile 13. */
+            { 388, 391 }, /* Profile 2. */
+            { 388, 391 }, /* Profile 3. */
+            { 388, 391 }, /* Profile 4. */
+            { 388, 391 }, /* Profile 5. */
+            { 388, 391 }, /* Profile 6. */
+            { 388, 391 }, /* Profile 7. */
+            { 388, 391 }, /* Profile 8. */
+            { 388, 391 }, /* Profile 9. */
+            { 388, 391 }, /* Profile 10. */
+            { 388, 391 }, /* Profile 11. */
+            { 388, 391 }, /* Profile 12. */
+            { 388, 391 }, /* Profile 13. */
         },
         .profile_cnt = 14,
     },
     {
         .name = "L2_IIF_10_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -845,7 +845,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "L2_OIF_10_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -866,7 +866,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "L3_IIF_13_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -887,7 +887,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "L3_OIF_1_13_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -908,7 +908,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "MPLS_LABEL_DECAP_COUNT_3_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -929,7 +929,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -950,7 +950,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "NHOP_INDEX_1_15_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -971,7 +971,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "PARSER_VHLEN_0_15_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -992,7 +992,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "PKT_MISC_CTRL_0_3_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1013,7 +1013,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "SVP_15_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SVP_15_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1034,28 +1034,28 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 408, 411 }, /* Profile 2. */
-            { 408, 411 }, /* Profile 3. */
-            { 408, 411 }, /* Profile 4. */
-            { 408, 411 }, /* Profile 5. */
-            { 408, 411 }, /* Profile 6. */
-            { 408, 411 }, /* Profile 7. */
-            { 408, 411 }, /* Profile 8. */
-            { 408, 411 }, /* Profile 9. */
-            { 408, 411 }, /* Profile 10. */
-            { 408, 411 }, /* Profile 11. */
-            { 408, 411 }, /* Profile 12. */
-            { 408, 411 }, /* Profile 13. */
+            { 416, 419 }, /* Profile 2. */
+            { 416, 419 }, /* Profile 3. */
+            { 416, 419 }, /* Profile 4. */
+            { 416, 419 }, /* Profile 5. */
+            { 416, 419 }, /* Profile 6. */
+            { 416, 419 }, /* Profile 7. */
+            { 416, 419 }, /* Profile 8. */
+            { 416, 419 }, /* Profile 9. */
+            { 416, 419 }, /* Profile 10. */
+            { 416, 419 }, /* Profile 11. */
+            { 416, 419 }, /* Profile 12. */
+            { 416, 419 }, /* Profile 13. */
         },
         .profile_cnt = 14,
     },
     {
         .name = "SYSTEM_DESTINATION_15_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1076,28 +1076,28 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "SYSTEM_OPCODE_3_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 424, 427 }, /* Profile 2. */
-            { 424, 427 }, /* Profile 3. */
-            { 424, 427 }, /* Profile 4. */
-            { 424, 427 }, /* Profile 5. */
-            { 424, 427 }, /* Profile 6. */
-            { 424, 427 }, /* Profile 7. */
-            { 424, 427 }, /* Profile 8. */
-            { 424, 427 }, /* Profile 9. */
-            { 424, 427 }, /* Profile 10. */
-            { 424, 427 }, /* Profile 11. */
-            { 424, 427 }, /* Profile 12. */
-            { 424, 427 }, /* Profile 13. */
+            { 420, 423 }, /* Profile 2. */
+            { 420, 423 }, /* Profile 3. */
+            { 420, 423 }, /* Profile 4. */
+            { 420, 423 }, /* Profile 5. */
+            { 420, 423 }, /* Profile 6. */
+            { 420, 423 }, /* Profile 7. */
+            { 420, 423 }, /* Profile 8. */
+            { 420, 423 }, /* Profile 9. */
+            { 420, 423 }, /* Profile 10. */
+            { 420, 423 }, /* Profile 11. */
+            { 420, 423 }, /* Profile 12. */
+            { 420, 423 }, /* Profile 13. */
         },
         .profile_cnt = 14,
     },
     {
         .name = "SYSTEM_SOURCE_15_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1118,49 +1118,49 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "TIMESTAMP_CTRL_3_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 420, 423 }, /* Profile 2. */
-            { 420, 423 }, /* Profile 3. */
-            { 420, 423 }, /* Profile 4. */
-            { 420, 423 }, /* Profile 5. */
-            { 420, 423 }, /* Profile 6. */
-            { 420, 423 }, /* Profile 7. */
-            { 420, 423 }, /* Profile 8. */
-            { 420, 423 }, /* Profile 9. */
-            { 420, 423 }, /* Profile 10. */
-            { 420, 423 }, /* Profile 11. */
-            { 420, 423 }, /* Profile 12. */
-            { 420, 423 }, /* Profile 13. */
+            { 408, 411 }, /* Profile 2. */
+            { 408, 411 }, /* Profile 3. */
+            { 408, 411 }, /* Profile 4. */
+            { 408, 411 }, /* Profile 5. */
+            { 408, 411 }, /* Profile 6. */
+            { 408, 411 }, /* Profile 7. */
+            { 408, 411 }, /* Profile 8. */
+            { 408, 411 }, /* Profile 9. */
+            { 408, 411 }, /* Profile 10. */
+            { 408, 411 }, /* Profile 11. */
+            { 408, 411 }, /* Profile 12. */
+            { 408, 411 }, /* Profile 13. */
         },
         .profile_cnt = 14,
     },
     {
         .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 400, 403 }, /* Profile 2. */
-            { 400, 403 }, /* Profile 3. */
-            { 400, 403 }, /* Profile 4. */
-            { 400, 403 }, /* Profile 5. */
-            { 400, 403 }, /* Profile 6. */
-            { 400, 403 }, /* Profile 7. */
-            { 400, 403 }, /* Profile 8. */
-            { 400, 403 }, /* Profile 9. */
-            { 400, 403 }, /* Profile 10. */
-            { 400, 403 }, /* Profile 11. */
-            { 400, 403 }, /* Profile 12. */
-            { 400, 403 }, /* Profile 13. */
+            { 412, 415 }, /* Profile 2. */
+            { 412, 415 }, /* Profile 3. */
+            { 412, 415 }, /* Profile 4. */
+            { 412, 415 }, /* Profile 5. */
+            { 412, 415 }, /* Profile 6. */
+            { 412, 415 }, /* Profile 7. */
+            { 412, 415 }, /* Profile 8. */
+            { 412, 415 }, /* Profile 9. */
+            { 412, 415 }, /* Profile 10. */
+            { 412, 415 }, /* Profile 11. */
+            { 412, 415 }, /* Profile 12. */
+            { 412, 415 }, /* Profile 13. */
         },
         .profile_cnt = 14,
     },
     {
         .name = "VFI_15_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1181,39 +1181,39 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_dat
     },
     {
         .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0",
-        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0,
+        .fid = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 404, 405 }, /* Profile 2. */
-            { 404, 405 }, /* Profile 3. */
-            { 404, 405 }, /* Profile 4. */
-            { 404, 405 }, /* Profile 5. */
-            { 404, 405 }, /* Profile 6. */
-            { 404, 405 }, /* Profile 7. */
-            { 404, 405 }, /* Profile 8. */
-            { 404, 405 }, /* Profile 9. */
-            { 404, 405 }, /* Profile 10. */
-            { 404, 405 }, /* Profile 11. */
-            { 404, 405 }, /* Profile 12. */
-            { 404, 405 }, /* Profile 13. */
+            { 396, 397 }, /* Profile 2. */
+            { 396, 397 }, /* Profile 3. */
+            { 396, 397 }, /* Profile 4. */
+            { 396, 397 }, /* Profile 5. */
+            { 396, 397 }, /* Profile 6. */
+            { 396, 397 }, /* Profile 7. */
+            { 396, 397 }, /* Profile 8. */
+            { 396, 397 }, /* Profile 9. */
+            { 396, 397 }, /* Profile 10. */
+            { 396, 397 }, /* Profile 11. */
+            { 396, 397 }, /* Profile 12. */
+            { 396, 397 }, /* Profile 13. */
         },
         .profile_cnt = 14,
     },
-};static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_data,
+};static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_data,
 };
 
-static shr_enum_map_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reason_names[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+static shr_enum_map_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reason_names[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_reasons_info_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reasons_info = {
-    .num_reasons = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
-    .reason_names = bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reason_names,
-    .reason_encode = bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reason_encode,
-    .reason_decode = bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reason_decode,
+static bcmpkt_flex_reasons_info_t bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reason_names,
+    .reason_encode = bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reason_decode,
 };
 
 
@@ -1356,7 +1356,7 @@ static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_arp_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_arp_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT] = {
     bcmpkt_arp_t_hardware_len_get,
     bcmpkt_arp_t_hardware_type_get,
     bcmpkt_arp_t_operation_get,
@@ -1368,7 +1368,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_arp_t_fget[BCM56780_A0_DNA_2_9_5
     bcmpkt_arp_t_target_ip_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_arp_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_arp_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT] = {
     bcmpkt_arp_t_hardware_len_set,
     bcmpkt_arp_t_hardware_type_set,
     bcmpkt_arp_t_operation_set,
@@ -1380,13 +1380,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_arp_t_fset[BCM56780_A0_DNA_2_9_5
     bcmpkt_arp_t_target_ip_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_arp_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_arp_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_arp_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_arp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_arp_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_arp_t_field_data,
 };
 
 
@@ -1483,7 +1483,7 @@ static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_authen_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_authen_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
     bcmpkt_authen_t_data_get,
     bcmpkt_authen_t_next_header_get,
     bcmpkt_authen_t_payload_len_get,
@@ -1492,7 +1492,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_authen_t_fget[BCM56780_A0_DNA_2_
     bcmpkt_authen_t_spi_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_authen_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_authen_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
     bcmpkt_authen_t_data_set,
     bcmpkt_authen_t_next_header_set,
     bcmpkt_authen_t_payload_len_set,
@@ -1501,13 +1501,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_authen_t_fset[BCM56780_A0_DNA_2_
     bcmpkt_authen_t_spi_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_authen_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_authen_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_authen_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_authen_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_authen_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_AUTHEN_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_authen_t_field_data,
 };
 
 
@@ -1756,7 +1756,7 @@ static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_bfd_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_bfd_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FID_COUNT] = {
     bcmpkt_bfd_t_ap_get,
     bcmpkt_bfd_t_bfd_length_get,
     bcmpkt_bfd_t_cpi_get,
@@ -1775,7 +1775,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_bfd_t_fget[BCM56780_A0_DNA_2_9_5
     bcmpkt_bfd_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_bfd_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_bfd_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FID_COUNT] = {
     bcmpkt_bfd_t_ap_set,
     bcmpkt_bfd_t_bfd_length_set,
     bcmpkt_bfd_t_cpi_set,
@@ -1794,13 +1794,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_bfd_t_fset[BCM56780_A0_DNA_2_9_5
     bcmpkt_bfd_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_bfd_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_bfd_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_bfd_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_bfd_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_bfd_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_BFD_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_bfd_t_field_data,
 };
 
 
@@ -1834,23 +1834,23 @@ static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_cntag_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_cntag_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_FID_COUNT] = {
     bcmpkt_cntag_t_rpid_get,
     bcmpkt_cntag_t_tpid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_cntag_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_cntag_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_FID_COUNT] = {
     bcmpkt_cntag_t_rpid_set,
     bcmpkt_cntag_t_tpid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_cntag_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_cntag_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_cntag_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_cntag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_cntag_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CNTAG_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_cntag_t_field_data,
 };
 
 
@@ -1966,7 +1966,7 @@ static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
     bcmpkt_cpu_composites_0_t_dma_cont0_get,
     bcmpkt_cpu_composites_0_t_dma_cont1_get,
     bcmpkt_cpu_composites_0_t_dma_cont2_get,
@@ -1976,7 +1976,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_fget[BCM56780
     bcmpkt_cpu_composites_0_t_dma_cont6_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
     bcmpkt_cpu_composites_0_t_dma_cont0_set,
     bcmpkt_cpu_composites_0_t_dma_cont1_set,
     bcmpkt_cpu_composites_0_t_dma_cont2_set,
@@ -1986,13 +1986,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_fset[BCM56780
     bcmpkt_cpu_composites_0_t_dma_cont6_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_field_data,
 };
 
 
@@ -2172,7 +2172,7 @@ static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
     bcmpkt_cpu_composites_1_t_dma_cont10_get,
     bcmpkt_cpu_composites_1_t_dma_cont11_get,
     bcmpkt_cpu_composites_1_t_dma_cont12_get,
@@ -2186,7 +2186,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_fget[BCM56780
     bcmpkt_cpu_composites_1_t_dma_cont9_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
     bcmpkt_cpu_composites_1_t_dma_cont10_set,
     bcmpkt_cpu_composites_1_t_dma_cont11_set,
     bcmpkt_cpu_composites_1_t_dma_cont12_set,
@@ -2200,13 +2200,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_fset[BCM56780
     bcmpkt_cpu_composites_1_t_dma_cont9_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_field_data,
 };
 
 
@@ -2256,25 +2256,25 @@ static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_dest_option_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_dest_option_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
     bcmpkt_dest_option_t_hdr_ext_len_get,
     bcmpkt_dest_option_t_next_header_get,
     bcmpkt_dest_option_t_option_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_dest_option_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_dest_option_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
     bcmpkt_dest_option_t_hdr_ext_len_set,
     bcmpkt_dest_option_t_next_header_set,
     bcmpkt_dest_option_t_option_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_dest_option_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_dest_option_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_dest_option_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_dest_option_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_dest_option_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_dest_option_t_field_data,
 };
 
 
@@ -2460,7 +2460,7 @@ static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
     bcmpkt_ep_nih_header_t_header_subtype_get,
     bcmpkt_ep_nih_header_t_header_type_get,
     bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
@@ -2475,7 +2475,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_fget[BCM56780_A0
     bcmpkt_ep_nih_header_t_timestamp_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
     bcmpkt_ep_nih_header_t_header_subtype_set,
     bcmpkt_ep_nih_header_t_header_type_set,
     bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
@@ -2490,13 +2490,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_fset[BCM56780_A0
     bcmpkt_ep_nih_header_t_timestamp_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_field_data,
 };
 
 
@@ -2636,7 +2636,7 @@ static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
     bcmpkt_erspan3_fixed_hdr_t_bso_get,
     bcmpkt_erspan3_fixed_hdr_t_cos_get,
     bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
@@ -2648,7 +2648,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_fget[BCM5678
     bcmpkt_erspan3_fixed_hdr_t_vlan_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
     bcmpkt_erspan3_fixed_hdr_t_bso_set,
     bcmpkt_erspan3_fixed_hdr_t_cos_set,
     bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
@@ -2660,13 +2660,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_fset[BCM5678
     bcmpkt_erspan3_fixed_hdr_t_vlan_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_field_data,
 };
 
 
@@ -2731,27 +2731,27 @@ static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
     bcmpkt_erspan3_subhdr_5_t_platform_id_get,
     bcmpkt_erspan3_subhdr_5_t_port_id_get,
     bcmpkt_erspan3_subhdr_5_t_switch_id_get,
     bcmpkt_erspan3_subhdr_5_t_timestamp_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
     bcmpkt_erspan3_subhdr_5_t_platform_id_set,
     bcmpkt_erspan3_subhdr_5_t_port_id_set,
     bcmpkt_erspan3_subhdr_5_t_switch_id_set,
     bcmpkt_erspan3_subhdr_5_t_timestamp_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_field_data,
 };
 
 
@@ -2832,7 +2832,7 @@ static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_esp_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_esp_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_FID_COUNT] = {
     bcmpkt_esp_t_next_header_get,
     bcmpkt_esp_t_pad_get,
     bcmpkt_esp_t_pad_len_get,
@@ -2840,7 +2840,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_esp_t_fget[BCM56780_A0_DNA_2_9_5
     bcmpkt_esp_t_spi_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_esp_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_esp_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_FID_COUNT] = {
     bcmpkt_esp_t_next_header_set,
     bcmpkt_esp_t_pad_set,
     bcmpkt_esp_t_pad_len_set,
@@ -2848,13 +2848,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_esp_t_fset[BCM56780_A0_DNA_2_9_5
     bcmpkt_esp_t_spi_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_esp_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_esp_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_esp_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_esp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_esp_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ESP_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_esp_t_field_data,
 };
 
 
@@ -2889,23 +2889,23 @@ static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_etag_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_etag_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_FID_COUNT] = {
     bcmpkt_etag_t_tag_get,
     bcmpkt_etag_t_tpid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_etag_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_etag_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_FID_COUNT] = {
     bcmpkt_etag_t_tag_set,
     bcmpkt_etag_t_tpid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_etag_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_etag_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_etag_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_etag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_etag_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETAG_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_etag_t_field_data,
 };
 
 
@@ -2924,21 +2924,21 @@ static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ethertype_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ethertype_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
     bcmpkt_ethertype_t_type_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ethertype_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ethertype_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
     bcmpkt_ethertype_t_type_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ethertype_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ethertype_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ethertype_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_ethertype_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ethertype_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_ethertype_t_field_data,
 };
 
 
@@ -3003,27 +3003,27 @@ static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_frag_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_frag_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FID_COUNT] = {
     bcmpkt_frag_t_frag_info_get,
     bcmpkt_frag_t_id_get,
     bcmpkt_frag_t_next_header_get,
     bcmpkt_frag_t_reserved_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_frag_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_frag_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FID_COUNT] = {
     bcmpkt_frag_t_frag_info_set,
     bcmpkt_frag_t_id_set,
     bcmpkt_frag_t_next_header_set,
     bcmpkt_frag_t_reserved_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_frag_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_frag_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_frag_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_frag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_frag_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FRAG_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_frag_t_field_data,
 };
 
 
@@ -3252,7 +3252,7 @@ static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int prof
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_generic_loopback_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
     bcmpkt_generic_loopback_t_destination_obj_get,
     bcmpkt_generic_loopback_t_destination_type_get,
     bcmpkt_generic_loopback_t_entropy_obj_get,
@@ -3270,7 +3270,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_generic_loopback_t_fget[BCM56780
     bcmpkt_generic_loopback_t_start_byte_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_generic_loopback_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
     bcmpkt_generic_loopback_t_destination_obj_set,
     bcmpkt_generic_loopback_t_destination_type_set,
     bcmpkt_generic_loopback_t_entropy_obj_set,
@@ -3288,13 +3288,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_generic_loopback_t_fset[BCM56780
     bcmpkt_generic_loopback_t_start_byte_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_generic_loopback_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_generic_loopback_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_generic_loopback_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_field_data,
 };
 
 
@@ -3373,7 +3373,7 @@ static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_gpe_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_gpe_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FID_COUNT] = {
     bcmpkt_gpe_t_flags_get,
     bcmpkt_gpe_t_next_protocol_get,
     bcmpkt_gpe_t_reserved0_get,
@@ -3381,7 +3381,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_gpe_t_fget[BCM56780_A0_DNA_2_9_5
     bcmpkt_gpe_t_vni_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_gpe_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_gpe_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FID_COUNT] = {
     bcmpkt_gpe_t_flags_set,
     bcmpkt_gpe_t_next_protocol_set,
     bcmpkt_gpe_t_reserved0_set,
@@ -3389,13 +3389,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_gpe_t_fset[BCM56780_A0_DNA_2_9_5
     bcmpkt_gpe_t_vni_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_gpe_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_gpe_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_gpe_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_gpe_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_gpe_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GPE_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_gpe_t_field_data,
 };
 
 
@@ -3429,23 +3429,23 @@ static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint3
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_gre_chksum_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
     bcmpkt_gre_chksum_t_checksum_get,
     bcmpkt_gre_chksum_t_offset_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_gre_chksum_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
     bcmpkt_gre_chksum_t_checksum_set,
     bcmpkt_gre_chksum_t_offset_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_gre_chksum_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_gre_chksum_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_gre_chksum_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_field_data,
 };
 
 
@@ -3465,21 +3465,21 @@ static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_gre_key_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_gre_key_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
     bcmpkt_gre_key_t_key_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_gre_key_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_gre_key_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
     bcmpkt_gre_key_t_key_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_gre_key_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_gre_key_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_gre_key_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_gre_key_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_gre_key_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_KEY_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_gre_key_t_field_data,
 };
 
 
@@ -3499,21 +3499,21 @@ static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_gre_rout_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
     bcmpkt_gre_rout_t_routing_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_gre_rout_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
     bcmpkt_gre_rout_t_routing_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_gre_rout_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_gre_rout_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_gre_rout_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_field_data,
 };
 
 
@@ -3533,21 +3533,21 @@ static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_gre_seq_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
     bcmpkt_gre_seq_t_sequence_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_gre_seq_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
     bcmpkt_gre_seq_t_sequence_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_gre_seq_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_gre_seq_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_gre_seq_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_field_data,
 };
 
 
@@ -3611,27 +3611,27 @@ static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_gre_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_gre_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_FID_COUNT] = {
     bcmpkt_gre_t_c_r_k_s_get,
     bcmpkt_gre_t_protocol_get,
     bcmpkt_gre_t_reserved_get,
     bcmpkt_gre_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_gre_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_gre_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_FID_COUNT] = {
     bcmpkt_gre_t_c_r_k_s_set,
     bcmpkt_gre_t_protocol_set,
     bcmpkt_gre_t_reserved_set,
     bcmpkt_gre_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_gre_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_gre_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_gre_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_gre_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_gre_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_GRE_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_gre_t_field_data,
 };
 
 
@@ -3830,7 +3830,7 @@ static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_hg3_base_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
     bcmpkt_hg3_base_t_cn_get,
     bcmpkt_hg3_base_t_cng_get,
     bcmpkt_hg3_base_t_entropy_get,
@@ -3846,7 +3846,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_hg3_base_t_fget[BCM56780_A0_DNA_
     bcmpkt_hg3_base_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_hg3_base_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
     bcmpkt_hg3_base_t_cn_set,
     bcmpkt_hg3_base_t_cng_set,
     bcmpkt_hg3_base_t_entropy_set,
@@ -3862,17 +3862,17 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_hg3_base_t_fset[BCM56780_A0_DNA_
     bcmpkt_hg3_base_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_hg3_base_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_hg3_base_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_hg3_base_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_BASE_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_field_data,
 };
 
 
-static int32_t bcmpkt_hg3_extension_0_t_class_id_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
     *val = WORD_FIELD_GET(data[0], 16, 8);
@@ -3880,17 +3880,32 @@ static int32_t bcmpkt_hg3_extension_0_t_class_id_get(uint32_t *data, int profile
     return ret;
 }
 
-static int32_t bcmpkt_hg3_extension_0_t_class_id_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
     WORD_FIELD_SET(data[0], 16, 8, val);
     return ret;
 }
 
+static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 2, val);
+    return ret;
+}
+
 static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[1], 16, 16);
+    *val = WORD_FIELD_GET(data[1], 0, 16);
 
     return ret;
 }
@@ -3898,14 +3913,14 @@ static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int pr
 static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[1], 16, 16, val);
+    WORD_FIELD_SET(data[1], 0, 16, val);
     return ret;
 }
 
 static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[0], 24, 8);
+    *val = WORD_FIELD_GET(data[0], 26, 6);
 
     return ret;
 }
@@ -3913,14 +3928,14 @@ static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, u
 static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[0], 24, 8, val);
+    WORD_FIELD_SET(data[0], 26, 6, val);
     return ret;
 }
 
 static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[1], 0, 16);
+    *val = WORD_FIELD_GET(data[0], 0, 16);
 
     return ret;
 }
@@ -3928,14 +3943,14 @@ static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, in
 static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[1], 0, 16, val);
+    WORD_FIELD_SET(data[0], 0, 16, val);
     return ret;
 }
 
 static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[0], 0, 16);
+    *val = WORD_FIELD_GET(data[1], 16, 16);
 
     return ret;
 }
@@ -3943,33 +3958,35 @@ static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uin
 static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[0], 0, 16, val);
+    WORD_FIELD_SET(data[1], 16, 16, val);
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
-    bcmpkt_hg3_extension_0_t_class_id_get,
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+    bcmpkt_hg3_extension_0_t_class_id_lsb_get,
+    bcmpkt_hg3_extension_0_t_class_id_msb_get,
     bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get,
     bcmpkt_hg3_extension_0_t_flags_get,
     bcmpkt_hg3_extension_0_t_forwarding_domain_get,
     bcmpkt_hg3_extension_0_t_svp_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
-    bcmpkt_hg3_extension_0_t_class_id_set,
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+    bcmpkt_hg3_extension_0_t_class_id_lsb_set,
+    bcmpkt_hg3_extension_0_t_class_id_msb_set,
     bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set,
     bcmpkt_hg3_extension_0_t_flags_set,
     bcmpkt_hg3_extension_0_t_forwarding_domain_set,
     bcmpkt_hg3_extension_0_t_svp_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_field_data,
 };
 
 
@@ -4019,25 +4036,25 @@ static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint3
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
     bcmpkt_hop_by_hop_t_hdr_ext_len_get,
     bcmpkt_hop_by_hop_t_next_header_get,
     bcmpkt_hop_by_hop_t_option_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
     bcmpkt_hop_by_hop_t_hdr_ext_len_set,
     bcmpkt_hop_by_hop_t_next_header_set,
     bcmpkt_hop_by_hop_t_option_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_field_data,
 };
 
 
@@ -4086,25 +4103,25 @@ static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_icmp_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_icmp_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT] = {
     bcmpkt_icmp_t_checksum_get,
     bcmpkt_icmp_t_code_get,
     bcmpkt_icmp_t_icmp_type_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_icmp_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_icmp_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT] = {
     bcmpkt_icmp_t_checksum_set,
     bcmpkt_icmp_t_code_set,
     bcmpkt_icmp_t_icmp_type_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_icmp_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_icmp_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_icmp_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_icmp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_icmp_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_icmp_t_field_data,
 };
 
 
@@ -4138,23 +4155,23 @@ static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int pr
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get,
     bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set,
     bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_field_data,
 };
 
 
@@ -4218,27 +4235,27 @@ static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_0_b_t_cn_get,
     bcmpkt_ifa_flex_md_0_b_t_port_speed_get,
     bcmpkt_ifa_flex_md_0_b_t_queue_id_get,
     bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_0_b_t_cn_set,
     bcmpkt_ifa_flex_md_0_b_t_port_speed_set,
     bcmpkt_ifa_flex_md_0_b_t_queue_id_set,
     bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_field_data,
 };
 
 
@@ -4288,25 +4305,25 @@ static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, i
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_1_t_egress_port_id_get,
     bcmpkt_ifa_flex_md_1_t_ingress_port_id_get,
     bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_1_t_egress_port_id_set,
     bcmpkt_ifa_flex_md_1_t_ingress_port_id_set,
     bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_field_data,
 };
 
 
@@ -4342,23 +4359,23 @@ static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, in
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get,
     bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set,
     bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_field_data,
 };
 
 
@@ -4394,23 +4411,23 @@ static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get,
     bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set,
     bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_field_data,
 };
 
 
@@ -4489,7 +4506,7 @@ static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_header_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
     bcmpkt_ifa_header_t_flags_get,
     bcmpkt_ifa_header_t_gns_get,
     bcmpkt_ifa_header_t_max_length_get,
@@ -4497,7 +4514,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_header_t_fget[BCM56780_A0_DN
     bcmpkt_ifa_header_t_ver_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_header_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
     bcmpkt_ifa_header_t_flags_set,
     bcmpkt_ifa_header_t_gns_set,
     bcmpkt_ifa_header_t_max_length_set,
@@ -4505,13 +4522,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_header_t_fset[BCM56780_A0_DN
     bcmpkt_ifa_header_t_ver_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_header_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_header_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_ifa_header_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_field_data,
 };
 
 
@@ -4560,25 +4577,25 @@ static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
     bcmpkt_ifa_md_base_t_action_vector_get,
     bcmpkt_ifa_md_base_t_hop_limit_current_length_get,
     bcmpkt_ifa_md_base_t_request_vector_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
     bcmpkt_ifa_md_base_t_action_vector_set,
     bcmpkt_ifa_md_base_t_hop_limit_current_length_set,
     bcmpkt_ifa_md_base_t_request_vector_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_field_data,
 };
 
 
@@ -4643,27 +4660,27 @@ static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int prof
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
     bcmpkt_ifa_metadata_t_action_vector_get,
     bcmpkt_ifa_metadata_t_hop_limit_current_length_get,
     bcmpkt_ifa_metadata_t_metadata_get,
     bcmpkt_ifa_metadata_t_request_vector_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
     bcmpkt_ifa_metadata_t_action_vector_set,
     bcmpkt_ifa_metadata_t_hop_limit_current_length_set,
     bcmpkt_ifa_metadata_t_metadata_set,
     bcmpkt_ifa_metadata_t_request_vector_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_field_data,
 };
 
 
@@ -4728,27 +4745,27 @@ static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_igmp_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_igmp_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_FID_COUNT] = {
     bcmpkt_igmp_t_checksum_get,
     bcmpkt_igmp_t_group_address_get,
     bcmpkt_igmp_t_igmp_type_get,
     bcmpkt_igmp_t_max_resp_time_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_igmp_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_igmp_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_FID_COUNT] = {
     bcmpkt_igmp_t_checksum_set,
     bcmpkt_igmp_t_group_address_set,
     bcmpkt_igmp_t_igmp_type_set,
     bcmpkt_igmp_t_max_resp_time_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_igmp_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_igmp_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_igmp_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_igmp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_igmp_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IGMP_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_igmp_t_field_data,
 };
 
 
@@ -4830,7 +4847,7 @@ static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ipfix_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ipfix_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT] = {
     bcmpkt_ipfix_t_export_time_get,
     bcmpkt_ipfix_t_length_get,
     bcmpkt_ipfix_t_obs_domain_id_get,
@@ -4838,7 +4855,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ipfix_t_fget[BCM56780_A0_DNA_2_9
     bcmpkt_ipfix_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ipfix_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ipfix_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT] = {
     bcmpkt_ipfix_t_export_time_set,
     bcmpkt_ipfix_t_length_set,
     bcmpkt_ipfix_t_obs_domain_id_set,
@@ -4846,13 +4863,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ipfix_t_fset[BCM56780_A0_DNA_2_9
     bcmpkt_ipfix_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ipfix_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ipfix_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ipfix_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_ipfix_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ipfix_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_ipfix_t_field_data,
 };
 
 
@@ -5024,7 +5041,7 @@ static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, ui
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ipv4_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ipv4_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT] = {
     bcmpkt_ipv4_t_da_get,
     bcmpkt_ipv4_t_flags_frag_offset_get,
     bcmpkt_ipv4_t_hdr_checksum_get,
@@ -5038,7 +5055,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ipv4_t_fget[BCM56780_A0_DNA_2_9_
     bcmpkt_ipv4_t_version_hdr_len_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ipv4_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ipv4_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT] = {
     bcmpkt_ipv4_t_da_set,
     bcmpkt_ipv4_t_flags_frag_offset_set,
     bcmpkt_ipv4_t_hdr_checksum_set,
@@ -5052,13 +5069,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ipv4_t_fset[BCM56780_A0_DNA_2_9_
     bcmpkt_ipv4_t_version_hdr_len_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ipv4_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ipv4_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ipv4_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_ipv4_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ipv4_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_ipv4_t_field_data,
 };
 
 
@@ -5184,7 +5201,7 @@ static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t v
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ipv6_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_ipv6_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT] = {
     bcmpkt_ipv6_t_da_get,
     bcmpkt_ipv6_t_flow_label_get,
     bcmpkt_ipv6_t_hop_limit_get,
@@ -5195,7 +5212,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ipv6_t_fget[BCM56780_A0_DNA_2_9_
     bcmpkt_ipv6_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ipv6_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_ipv6_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT] = {
     bcmpkt_ipv6_t_da_set,
     bcmpkt_ipv6_t_flow_label_set,
     bcmpkt_ipv6_t_hop_limit_set,
@@ -5206,13 +5223,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ipv6_t_fset[BCM56780_A0_DNA_2_9_
     bcmpkt_ipv6_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ipv6_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_ipv6_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ipv6_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_ipv6_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_ipv6_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_ipv6_t_field_data,
 };
 
 
@@ -5248,23 +5265,23 @@ static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_l2_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_l2_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT] = {
     bcmpkt_l2_t_macda_get,
     bcmpkt_l2_t_macsa_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_l2_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_l2_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT] = {
     bcmpkt_l2_t_macda_set,
     bcmpkt_l2_t_macsa_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_l2_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_l2_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_l2_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_l2_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_l2_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_l2_t_field_data,
 };
 
 
@@ -5284,21 +5301,21 @@ static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
     bcmpkt_mirror_erspan_sn_t_seq_num_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
     bcmpkt_mirror_erspan_sn_t_seq_num_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_field_data,
 };
 
 
@@ -5318,21 +5335,21 @@ static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, u
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_mirror_transport_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
     bcmpkt_mirror_transport_t_data_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_mirror_transport_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
     bcmpkt_mirror_transport_t_data_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_mirror_transport_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_mirror_transport_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_mirror_transport_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_field_data,
 };
 
 
@@ -5396,27 +5413,27 @@ static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_mpls_ach_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
     bcmpkt_mpls_ach_t_channel_type_get,
     bcmpkt_mpls_ach_t_cw_type_get,
     bcmpkt_mpls_ach_t_reserved_get,
     bcmpkt_mpls_ach_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_mpls_ach_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
     bcmpkt_mpls_ach_t_channel_type_set,
     bcmpkt_mpls_ach_t_cw_type_set,
     bcmpkt_mpls_ach_t_reserved_set,
     bcmpkt_mpls_ach_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_mpls_ach_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_mpls_ach_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_mpls_ach_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_field_data,
 };
 
 
@@ -5436,21 +5453,21 @@ static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_mpls_bv_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
     bcmpkt_mpls_bv_t_value_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_mpls_bv_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
     bcmpkt_mpls_bv_t_value_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_mpls_bv_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_mpls_bv_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_mpls_bv_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_BV_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_field_data,
 };
 
 
@@ -5499,25 +5516,25 @@ static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_mpls_cw_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
     bcmpkt_mpls_cw_t_cw_type_get,
     bcmpkt_mpls_cw_t_reserved_get,
     bcmpkt_mpls_cw_t_seq_number_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_mpls_cw_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
     bcmpkt_mpls_cw_t_cw_type_set,
     bcmpkt_mpls_cw_t_reserved_set,
     bcmpkt_mpls_cw_t_seq_number_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_mpls_cw_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_mpls_cw_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_mpls_cw_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_CW_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_field_data,
 };
 
 
@@ -5581,27 +5598,27 @@ static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_mpls_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_mpls_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_FID_COUNT] = {
     bcmpkt_mpls_t_bos_get,
     bcmpkt_mpls_t_exp_get,
     bcmpkt_mpls_t_label_get,
     bcmpkt_mpls_t_ttl_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_mpls_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_mpls_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_FID_COUNT] = {
     bcmpkt_mpls_t_bos_set,
     bcmpkt_mpls_t_exp_set,
     bcmpkt_mpls_t_label_set,
     bcmpkt_mpls_t_ttl_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_mpls_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_mpls_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_mpls_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_mpls_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_mpls_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_MPLS_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_mpls_t_field_data,
 };
 
 
@@ -5818,7 +5835,7 @@ static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_p_1588_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_p_1588_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FID_COUNT] = {
     bcmpkt_p_1588_t_cntrl_get,
     bcmpkt_p_1588_t_correction_get,
     bcmpkt_p_1588_t_domain_nb_get,
@@ -5835,7 +5852,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_p_1588_t_fget[BCM56780_A0_DNA_2_
     bcmpkt_p_1588_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_p_1588_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_p_1588_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FID_COUNT] = {
     bcmpkt_p_1588_t_cntrl_set,
     bcmpkt_p_1588_t_correction_set,
     bcmpkt_p_1588_t_domain_nb_set,
@@ -5852,13 +5869,97 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_p_1588_t_fset[BCM56780_A0_DNA_2_
     bcmpkt_p_1588_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_p_1588_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_p_1588_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_p_1588_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_P_1588_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_p_1588_t_field_data,
+};
+
+
+static int32_t bcmpkt_pim_t_hdr_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_4_5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_4_5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_6_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_6_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_pim_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_FID_COUNT] = {
+    bcmpkt_pim_t_hdr_bytes_0_1_get,
+    bcmpkt_pim_t_hdr_bytes_2_3_get,
+    bcmpkt_pim_t_hdr_bytes_4_5_get,
+    bcmpkt_pim_t_hdr_bytes_6_7_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_pim_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_FID_COUNT] = {
+    bcmpkt_pim_t_hdr_bytes_0_1_set,
+    bcmpkt_pim_t_hdr_bytes_2_3_set,
+    bcmpkt_pim_t_hdr_bytes_4_5_set,
+    bcmpkt_pim_t_hdr_bytes_6_7_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_pim_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_p_1588_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_p_1588_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_pim_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PIM_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_pim_t_field_data,
 };
 
 
@@ -5908,25 +6009,25 @@ static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uin
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
     bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
     bcmpkt_prog_ext_hdr_t_next_header_get,
     bcmpkt_prog_ext_hdr_t_option_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
     bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
     bcmpkt_prog_ext_hdr_t_next_header_set,
     bcmpkt_prog_ext_hdr_t_option_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_field_data,
 };
 
 
@@ -6022,7 +6123,7 @@ static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uin
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_psamp_0_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
     bcmpkt_psamp_0_t_flowset_get,
     bcmpkt_psamp_0_t_length_get,
     bcmpkt_psamp_0_t_next_hop_index_get,
@@ -6031,7 +6132,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_psamp_0_t_fget[BCM56780_A0_DNA_2
     bcmpkt_psamp_0_t_template_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_psamp_0_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
     bcmpkt_psamp_0_t_flowset_set,
     bcmpkt_psamp_0_t_length_set,
     bcmpkt_psamp_0_t_next_hop_index_set,
@@ -6040,13 +6141,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_psamp_0_t_fset[BCM56780_A0_DNA_2
     bcmpkt_psamp_0_t_template_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_psamp_0_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_psamp_0_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_psamp_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_0_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_field_data,
 };
 
 
@@ -6155,7 +6256,7 @@ static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, u
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_psamp_1_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
     bcmpkt_psamp_1_t_dlb_id_get,
     bcmpkt_psamp_1_t_egress_port_get,
     bcmpkt_psamp_1_t_epoch_get,
@@ -6165,7 +6266,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_psamp_1_t_fget[BCM56780_A0_DNA_2
     bcmpkt_psamp_1_t_variable_flag_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_psamp_1_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
     bcmpkt_psamp_1_t_dlb_id_set,
     bcmpkt_psamp_1_t_egress_port_set,
     bcmpkt_psamp_1_t_epoch_set,
@@ -6175,13 +6276,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_psamp_1_t_fset[BCM56780_A0_DNA_2
     bcmpkt_psamp_1_t_variable_flag_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_psamp_1_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_psamp_1_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_psamp_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_1_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_field_data,
 };
 
 
@@ -6293,7 +6394,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, i
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
     bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
     bcmpkt_psamp_mirror_on_drop_0_t_length_get,
@@ -6303,7 +6404,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_fget[BC
     bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
     bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
     bcmpkt_psamp_mirror_on_drop_0_t_length_set,
@@ -6313,17 +6414,17 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_fset[BC
     bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_data,
 };
 
 
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
     *val = WORD_FIELD_GET(data[0], 24, 8);
@@ -6331,44 +6432,29 @@ static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *dat
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
     WORD_FIELD_SET(data[0], 24, 8, val);
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[1], 24, 8);
+    *val = WORD_FIELD_GET(data[0], 16, 6);
 
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[1], 24, 8, val);
+    WORD_FIELD_SET(data[0], 16, 6, val);
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
     *val = WORD_FIELD_GET(data[1], 0, 16);
@@ -6376,132 +6462,44 @@ static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
     WORD_FIELD_SET(data[1], 0, 16, val);
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 28, 4);
+    *val = WORD_FIELD_GET(data[0], 22, 2);
 
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[1], 28, 4, val);
+    WORD_FIELD_SET(data[0], 22, 2, val);
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[1], 0, 16);
+    *val = WORD_FIELD_GET(data[1], 24, 8);
 
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[1], 0, 16, val);
+    WORD_FIELD_SET(data[1], 24, 8, val);
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
     *val = WORD_FIELD_GET(data[0], 0, 16);
@@ -6509,14 +6507,14 @@ static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get(uint32_t *data
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
     WORD_FIELD_SET(data[0], 0, 16, val);
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
     *val = WORD_FIELD_GET(data[1], 16, 8);
@@ -6524,38 +6522,40 @@ static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get(uint32_t *d
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
     WORD_FIELD_SET(data[1], 16, 8, val);
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get,
-    bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get,
-    bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get,
-    bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get,
-    bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get,
-    bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get,
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set,
-    bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set,
-    bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set,
-    bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set,
-    bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set,
-    bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set,
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_field_data,
 };
 
 
@@ -6698,7 +6698,7 @@ static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_rarp_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_rarp_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT] = {
     bcmpkt_rarp_t_hardware_len_get,
     bcmpkt_rarp_t_hardware_type_get,
     bcmpkt_rarp_t_operation_get,
@@ -6710,7 +6710,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_rarp_t_fget[BCM56780_A0_DNA_2_9_
     bcmpkt_rarp_t_target_ip_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_rarp_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_rarp_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT] = {
     bcmpkt_rarp_t_hardware_len_set,
     bcmpkt_rarp_t_hardware_type_set,
     bcmpkt_rarp_t_operation_set,
@@ -6722,13 +6722,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_rarp_t_fset[BCM56780_A0_DNA_2_9_
     bcmpkt_rarp_t_target_ip_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rarp_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rarp_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_rarp_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_rarp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_rarp_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_rarp_t_field_data,
 };
 
 
@@ -6808,7 +6808,7 @@ static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, u
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_routing_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_routing_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_FID_COUNT] = {
     bcmpkt_routing_t_data_get,
     bcmpkt_routing_t_hdr_ext_len_get,
     bcmpkt_routing_t_next_header_get,
@@ -6816,7 +6816,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_routing_t_fget[BCM56780_A0_DNA_2
     bcmpkt_routing_t_segments_left_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_routing_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_routing_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_FID_COUNT] = {
     bcmpkt_routing_t_data_set,
     bcmpkt_routing_t_hdr_ext_len_set,
     bcmpkt_routing_t_next_header_set,
@@ -6824,13 +6824,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_routing_t_fset[BCM56780_A0_DNA_2
     bcmpkt_routing_t_segments_left_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_routing_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_routing_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_routing_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_routing_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_routing_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_ROUTING_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_routing_t_field_data,
 };
 
 
@@ -6864,23 +6864,23 @@ static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_rspan_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_rspan_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_FID_COUNT] = {
     bcmpkt_rspan_t_tag_get,
     bcmpkt_rspan_t_tpid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_rspan_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_rspan_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_FID_COUNT] = {
     bcmpkt_rspan_t_tag_set,
     bcmpkt_rspan_t_tpid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rspan_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_rspan_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_rspan_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_rspan_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_rspan_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_RSPAN_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_rspan_t_field_data,
 };
 
 
@@ -6930,25 +6930,25 @@ static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, ui
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
     bcmpkt_sflow_shim_0_t_sys_destination_get,
     bcmpkt_sflow_shim_0_t_sys_source_get,
     bcmpkt_sflow_shim_0_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
     bcmpkt_sflow_shim_0_t_sys_destination_set,
     bcmpkt_sflow_shim_0_t_sys_source_set,
     bcmpkt_sflow_shim_0_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_field_data,
 };
 
 
@@ -7072,7 +7072,7 @@ static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
     bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
     bcmpkt_sflow_shim_1_t_flag_discarded_get,
     bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
@@ -7083,7 +7083,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_fget[BCM56780_A0_
     bcmpkt_sflow_shim_1_t_sys_opcode_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
     bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
     bcmpkt_sflow_shim_1_t_flag_discarded_set,
     bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
@@ -7094,13 +7094,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_fset[BCM56780_A0_
     bcmpkt_sflow_shim_1_t_sys_opcode_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_field_data,
 };
 
 
@@ -7135,23 +7135,23 @@ static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int prof
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
     bcmpkt_sflow_shim_2_t_sequence_num_get,
     bcmpkt_sflow_shim_2_t_user_meta_data_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
     bcmpkt_sflow_shim_2_t_sequence_num_set,
     bcmpkt_sflow_shim_2_t_user_meta_data_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_field_data,
 };
 
 
@@ -7186,23 +7186,23 @@ static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint3
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_snap_llc_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
     bcmpkt_snap_llc_t_length_get,
     bcmpkt_snap_llc_t_snap_llc_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_snap_llc_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
     bcmpkt_snap_llc_t_length_set,
     bcmpkt_snap_llc_t_snap_llc_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_snap_llc_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_snap_llc_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_snap_llc_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_field_data,
 };
 
 
@@ -7236,23 +7236,23 @@ static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_svtag_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_svtag_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_FID_COUNT] = {
     bcmpkt_svtag_t_data_lwr_get,
     bcmpkt_svtag_t_data_upr_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_svtag_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_svtag_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_FID_COUNT] = {
     bcmpkt_svtag_t_data_lwr_set,
     bcmpkt_svtag_t_data_upr_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_svtag_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_svtag_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_svtag_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_svtag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_svtag_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_SVTAG_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_svtag_t_field_data,
 };
 
 
@@ -7286,23 +7286,23 @@ static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profil
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_first_4bytes_t_dst_port_get,
     bcmpkt_tcp_first_4bytes_t_src_port_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_first_4bytes_t_dst_port_set,
     bcmpkt_tcp_first_4bytes_t_src_port_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_field_data,
 };
 
 
@@ -7398,7 +7398,7 @@ static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profil
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_last_16bytes_t_ack_num_get,
     bcmpkt_tcp_last_16bytes_t_checksum_get,
     bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
@@ -7407,7 +7407,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_fget[BCM56780
     bcmpkt_tcp_last_16bytes_t_win_size_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_last_16bytes_t_ack_num_set,
     bcmpkt_tcp_last_16bytes_t_checksum_set,
     bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
@@ -7416,13 +7416,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_fset[BCM56780
     bcmpkt_tcp_last_16bytes_t_win_size_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_field_data,
 };
 
 
@@ -7486,27 +7486,27 @@ static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_udp_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_udp_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT] = {
     bcmpkt_udp_t_checksum_get,
     bcmpkt_udp_t_dst_port_get,
     bcmpkt_udp_t_src_port_get,
     bcmpkt_udp_t_udp_length_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_udp_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_udp_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT] = {
     bcmpkt_udp_t_checksum_set,
     bcmpkt_udp_t_dst_port_set,
     bcmpkt_udp_t_src_port_set,
     bcmpkt_udp_t_udp_length_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_udp_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_udp_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_udp_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_udp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_udp_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_udp_t_field_data,
 };
 
 
@@ -7542,23 +7542,23 @@ static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_unknown_l3_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
     bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
     bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_unknown_l3_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
     bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
     bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_unknown_l3_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_unknown_l3_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_unknown_l3_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_field_data,
 };
 
 
@@ -7578,21 +7578,21 @@ static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_unknown_l4_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
     bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_unknown_l4_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
     bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_unknown_l4_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_unknown_l4_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_unknown_l4_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_field_data,
 };
 
 
@@ -7642,25 +7642,25 @@ static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_unknown_l5_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
     bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
     bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
     bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_unknown_l5_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
     bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
     bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
     bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_unknown_l5_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_unknown_l5_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_unknown_l5_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_field_data,
 };
 
 
@@ -7724,27 +7724,27 @@ static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_vlan_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_vlan_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT] = {
     bcmpkt_vlan_t_cfi_get,
     bcmpkt_vlan_t_pcp_get,
     bcmpkt_vlan_t_tpid_get,
     bcmpkt_vlan_t_vid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_vlan_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_vlan_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT] = {
     bcmpkt_vlan_t_cfi_set,
     bcmpkt_vlan_t_pcp_set,
     bcmpkt_vlan_t_tpid_set,
     bcmpkt_vlan_t_vid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_vlan_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_vlan_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_vlan_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_vlan_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_vlan_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_vlan_t_field_data,
 };
 
 
@@ -7779,23 +7779,23 @@ static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_vntag_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_vntag_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_FID_COUNT] = {
     bcmpkt_vntag_t_tag_get,
     bcmpkt_vntag_t_tpid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_vntag_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_vntag_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_FID_COUNT] = {
     bcmpkt_vntag_t_tag_set,
     bcmpkt_vntag_t_tpid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_vntag_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_vntag_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_vntag_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_vntag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_vntag_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VNTAG_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_vntag_t_field_data,
 };
 
 
@@ -7845,25 +7845,25 @@ static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_vxlan_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_vxlan_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT] = {
     bcmpkt_vxlan_t_flags_reserved_1_get,
     bcmpkt_vxlan_t_reserved2_get,
     bcmpkt_vxlan_t_vn_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_vxlan_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_vxlan_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT] = {
     bcmpkt_vxlan_t_flags_reserved_1_set,
     bcmpkt_vxlan_t_reserved2_set,
     bcmpkt_vxlan_t_vn_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_vxlan_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_vxlan_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_vxlan_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_vxlan_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_vxlan_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_vxlan_t_field_data,
 };
 
 
@@ -7975,7 +7975,7 @@ static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t v
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_wesp_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_dna_6_5_30_2_0_wesp_t_fget[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FID_COUNT] = {
     bcmpkt_wesp_t_flags_get,
     bcmpkt_wesp_t_header_len_get,
     bcmpkt_wesp_t_next_header_get,
@@ -7985,7 +7985,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_wesp_t_fget[BCM56780_A0_DNA_2_9_
     bcmpkt_wesp_t_wesp_iv_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_wesp_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_dna_6_5_30_2_0_wesp_t_fset[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FID_COUNT] = {
     bcmpkt_wesp_t_flags_set,
     bcmpkt_wesp_t_header_len_set,
     bcmpkt_wesp_t_next_header_set,
@@ -7995,529 +7995,529 @@ bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_wesp_t_fset[BCM56780_A0_DNA_2_9_
     bcmpkt_wesp_t_wesp_iv_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_wesp_t_field_data[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_6_5_30_2_0_wesp_t_field_data[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_wesp_t_field_info = {
-    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FID_COUNT,
-    .info = bcm56780_a0_dna_2_9_5_0_wesp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_6_5_30_2_0_wesp_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_WESP_T_FID_COUNT,
+    .info = bcm56780_a0_dna_6_5_30_2_0_wesp_t_field_data,
 };
 
-static bcmpkt_flex_pmd_info_t bcm56780_a0_dna_2_9_5_0_flexhdr_info_list[BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_COUNT] = {
+static bcmpkt_flex_pmd_info_t bcm56780_a0_dna_6_5_30_2_0_flexhdr_info_list[BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT] = {
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_arp_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_arp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_arp_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_arp_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_arp_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_arp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_authen_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_authen_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_authen_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_authen_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_authen_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_authen_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_bfd_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_bfd_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_bfd_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_bfd_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_bfd_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_bfd_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_cntag_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_cntag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_cntag_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_cntag_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_cntag_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_cntag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_cpu_composites_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_cpu_composites_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_dest_option_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_dest_option_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_dest_option_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_dest_option_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_dest_option_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_dest_option_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ep_nih_header_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_erspan3_fixed_hdr_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_erspan3_subhdr_5_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_esp_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_esp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_esp_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_esp_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_esp_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_esp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_etag_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_etag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_etag_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_etag_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_etag_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_etag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_ethertype_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_ethertype_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_ethertype_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_ethertype_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ethertype_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ethertype_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_frag_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_frag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_frag_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_frag_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_frag_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_frag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_generic_loopback_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_generic_loopback_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_generic_loopback_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_generic_loopback_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_gpe_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_gpe_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_gpe_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_gpe_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_gpe_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_gpe_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_gre_chksum_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_gre_chksum_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_gre_chksum_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_gre_chksum_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_gre_key_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_gre_key_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_gre_key_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_gre_key_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_gre_key_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_gre_key_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_gre_rout_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_gre_rout_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_gre_rout_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_gre_rout_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_gre_seq_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_gre_seq_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_gre_seq_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_gre_seq_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_gre_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_gre_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_gre_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_gre_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_gre_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_gre_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_hg3_base_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_hg3_base_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_hg3_base_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_hg3_base_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_hg3_extension_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_hop_by_hop_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_icmp_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_icmp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_icmp_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_icmp_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_icmp_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_icmp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_a_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_0_b_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_2_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_flex_md_3_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_header_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_header_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_header_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_header_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_md_base_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ifa_metadata_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_igmp_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_igmp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_igmp_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_igmp_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_igmp_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_igmp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_ipfix_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_ipfix_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_ipfix_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_ipfix_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ipfix_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ipfix_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_ipv4_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_ipv4_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_ipv4_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_ipv4_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ipv4_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ipv4_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_ipv6_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_ipv6_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_ipv6_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_ipv6_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_ipv6_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_ipv6_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_l2_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_l2_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_l2_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_l2_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_l2_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_l2_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_mirror_erspan_sn_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_mirror_transport_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_mirror_transport_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_mirror_transport_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_mirror_transport_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_mpls_ach_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_mpls_ach_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_mpls_ach_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_mpls_ach_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_mpls_bv_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_mpls_bv_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_mpls_bv_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_mpls_bv_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_mpls_cw_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_mpls_cw_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_mpls_cw_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_mpls_cw_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_mpls_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_mpls_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_mpls_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_mpls_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_mpls_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_mpls_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_p_1588_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_p_1588_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_p_1588_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_p_1588_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_p_1588_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_p_1588_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_pim_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_pim_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_pim_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_psamp_0_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_psamp_0_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_psamp_0_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_prog_ext_hdr_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_psamp_1_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_psamp_1_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_psamp_1_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_psamp_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_psamp_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_psamp_mirror_on_drop_3_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_rarp_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_rarp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_rarp_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_rarp_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_rarp_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_rarp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_routing_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_routing_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_routing_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_routing_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_routing_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_routing_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_rspan_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_rspan_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_rspan_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_rspan_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_rspan_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_rspan_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_sflow_shim_2_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_snap_llc_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_snap_llc_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_snap_llc_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_snap_llc_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_svtag_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_svtag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_svtag_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_svtag_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_svtag_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_svtag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_tcp_first_4bytes_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_tcp_last_16bytes_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_udp_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_udp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_udp_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_udp_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_udp_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_udp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_unknown_l3_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_unknown_l3_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_unknown_l3_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_unknown_l3_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_unknown_l4_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_unknown_l4_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_unknown_l4_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_unknown_l4_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_unknown_l5_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_unknown_l5_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_unknown_l5_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_unknown_l5_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_vlan_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_vlan_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_vlan_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_vlan_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_vlan_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_vlan_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_vntag_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_vntag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_vntag_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_vntag_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_vntag_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_vntag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_vxlan_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_vxlan_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_vxlan_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_vxlan_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_vxlan_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_vxlan_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_wesp_t_field_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_wesp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_dna_2_9_5_0_wesp_t_fget,
-        .flex_fset = bcm56780_a0_dna_2_9_5_0_wesp_t_fset,
+        .flex_fget = bcm56780_a0_dna_6_5_30_2_0_wesp_t_fget,
+        .flex_fset = bcm56780_a0_dna_6_5_30_2_0_wesp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_info,
-        .reasons_info = &bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reasons_info,
+        .field_info = &bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_field_info,
+        .reasons_info = &bcm56780_a0_dna_6_5_30_2_0_rxpmd_flex_reasons_info,
         .flex_common_fget = bcm56780_a0_rxpmd_flex_fget,
         .flex_common_fset = bcm56780_a0_rxpmd_flex_fset,
     },
 };
 
-static shr_enum_map_t bcm56780_a0_dna_2_9_5_0_flexhdr_id_map[] = {
-    BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
+static shr_enum_map_t bcm56780_a0_dna_6_5_30_2_0_flexhdr_id_map[] = {
+    BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
 };
 
-shr_enum_map_t * bcm56780_a0_dna_2_9_5_0_flexhdr_map_get(void)
+shr_enum_map_t * bcm56780_a0_dna_6_5_30_2_0_flexhdr_map_get(void)
 {
-    return bcm56780_a0_dna_2_9_5_0_flexhdr_id_map;
+    return bcm56780_a0_dna_6_5_30_2_0_flexhdr_id_map;
 }
 
-bcmpkt_flex_pmd_info_t * bcm56780_a0_dna_2_9_5_0_flex_pmd_info_get(uint32_t hid)
+bcmpkt_flex_pmd_info_t * bcm56780_a0_dna_6_5_30_2_0_flex_pmd_info_get(uint32_t hid)
 {
-    if (hid >= BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_COUNT) {
+    if (hid >= BCM56780_A0_DNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT) {
         return NULL;
     }
 
-    return &bcm56780_a0_dna_2_9_5_0_flexhdr_info_list[hid];
+    return &bcm56780_a0_dna_6_5_30_2_0_flexhdr_info_list[hid];
 }
 
-int bcm56780_a0_dna_2_9_5_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+int bcm56780_a0_dna_6_5_30_2_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
     14,
     21,
     22,
     69,
-};
\ No newline at end of file
+};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_match_id.c
similarity index 83%
rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id.c
rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_match_id.c
index 3998c1057341..41eeeee2e12b 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_match_id.c
@@ -2,12 +2,12 @@
  *
  * DO NOT EDIT THIS FILE!
  * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56780_a0_hna_6_5_29_2_1_sf_match_id_info.yml
- * for device bcm56780_a0 and variant hna_6_5_29_2_1.
+ * from the NPL output file(s) bcm56780_a0_hna_6_5_30_6_0_sf_match_id_info.yml
+ * for device bcm56780_a0 and variant hna_6_5_30_6_0.
  * Edits to this file will be lost when it is regenerated.
  *
  * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  * All Rights Reserved.$
  *
  * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
@@ -29,13 +29,13 @@
 
 
 #include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-#include <bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id_defs.h>
+#include <bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_match_id_defs.h>
 
 
 static bcmpkt_rxpmd_match_id_db_t
-bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_COUNT] = {
+bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_COUNT] = {
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_ETAG",
         .match        = 0x40,
         .match_mask   = 0x60,
@@ -49,7 +49,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
         .match        = 0x10,
         .match_mask   = 0x10,
@@ -63,7 +63,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
         .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -77,7 +77,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
         .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x7f,
@@ -91,7 +91,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
         .match        = 0x8,
         .match_mask   = 0x8,
@@ -105,7 +105,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
         .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -119,7 +119,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_SVTAG",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -133,7 +133,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_VNTAG",
         .match        = 0x20,
         .match_mask   = 0x60,
@@ -147,7 +147,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
         .match        = 0x1800,
         .match_mask   = 0x3830,
@@ -161,7 +161,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x80,
         .match_mask   = 0x1c2,
@@ -175,7 +175,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
         .match        = 0x408,
         .match_mask   = 0x64c,
@@ -189,7 +189,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
         .match        = 0x3800,
         .match_mask   = 0x3800,
@@ -203,7 +203,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
         .match        = 0x200,
         .match_mask   = 0x642,
@@ -217,7 +217,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -231,7 +231,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
         .match        = 0x100,
         .match_mask   = 0x1c0,
@@ -245,7 +245,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x600,
         .match_mask   = 0x640,
@@ -259,7 +259,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
         .match        = 0x1830,
         .match_mask   = 0x3870,
@@ -273,7 +273,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
         .match        = 0x2,
         .match_mask   = 0x42,
@@ -287,7 +287,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
         .match        = 0x202,
         .match_mask   = 0x642,
@@ -301,7 +301,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
         .match        = 0x1000,
         .match_mask   = 0x3800,
@@ -315,7 +315,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
         .match        = 0x82,
         .match_mask   = 0x1c2,
@@ -329,7 +329,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
         .match        = 0x12,
         .match_mask   = 0x72,
@@ -343,7 +343,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
         .match        = 0x2000,
         .match_mask   = 0x3830,
@@ -357,7 +357,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA",
         .match        = 0x180,
         .match_mask   = 0x1c0,
@@ -371,7 +371,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
         .match        = 0x404,
         .match_mask   = 0x64c,
@@ -385,7 +385,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
         .match        = 0x4,
         .match_mask   = 0x4c,
@@ -399,7 +399,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
         .match        = 0x8,
         .match_mask   = 0x4c,
@@ -413,7 +413,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
         .match        = 0x40,
         .match_mask   = 0x40,
@@ -427,7 +427,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
         .match        = 0x42,
         .match_mask   = 0x42,
@@ -441,7 +441,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
         .match        = 0x44,
         .match_mask   = 0x44,
@@ -455,7 +455,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
         .match        = 0x48,
         .match_mask   = 0x48,
@@ -469,7 +469,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
         .match        = 0x50,
         .match_mask   = 0x50,
@@ -483,7 +483,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -497,7 +497,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
         .match        = 0xc0,
         .match_mask   = 0xc0,
@@ -511,7 +511,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
         .match        = 0x140,
         .match_mask   = 0x140,
@@ -525,7 +525,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
         .match        = 0x240,
         .match_mask   = 0x240,
@@ -539,7 +539,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3fff,
@@ -553,7 +553,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
         .match        = 0x3000,
         .match_mask   = 0x3800,
@@ -567,7 +567,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
         .match        = 0x800,
         .match_mask   = 0x3830,
@@ -581,7 +581,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x20,
         .match_mask   = 0x70,
@@ -595,7 +595,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x820,
         .match_mask   = 0x3870,
@@ -609,7 +609,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
         .match        = 0x30,
         .match_mask   = 0x70,
@@ -623,7 +623,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x10,
         .match_mask   = 0x72,
@@ -637,7 +637,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x2800,
         .match_mask   = 0x3800,
@@ -651,7 +651,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x2030,
         .match_mask   = 0x3870,
@@ -665,7 +665,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
         .match        = 0x830,
         .match_mask   = 0x3870,
@@ -679,7 +679,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
         .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
         .match        = 0x2,
         .match_mask   = 0x3,
@@ -693,7 +693,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
         .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
         .match        = 0x1,
         .match_mask   = 0x3,
@@ -707,7 +707,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
         .name         = "EGRESS_PKT_SYS_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3,
@@ -721,7 +721,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG",
         .match        = 0x40,
         .match_mask   = 0x60,
@@ -735,7 +735,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
         .match        = 0x10,
         .match_mask   = 0x10,
@@ -749,7 +749,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -763,7 +763,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x7f,
@@ -777,7 +777,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
         .match        = 0x8,
         .match_mask   = 0x8,
@@ -791,7 +791,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -805,7 +805,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -819,7 +819,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG",
         .match        = 0x20,
         .match_mask   = 0x60,
@@ -833,7 +833,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
         .match        = 0x1800,
         .match_mask   = 0x3830,
@@ -847,7 +847,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x80,
         .match_mask   = 0x1c2,
@@ -861,7 +861,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
         .match        = 0x408,
         .match_mask   = 0x64c,
@@ -875,7 +875,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
         .match        = 0x3800,
         .match_mask   = 0x3800,
@@ -889,7 +889,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
         .match        = 0x200,
         .match_mask   = 0x642,
@@ -903,7 +903,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -917,7 +917,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
         .match        = 0x100,
         .match_mask   = 0x1c0,
@@ -931,7 +931,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x600,
         .match_mask   = 0x640,
@@ -945,7 +945,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
         .match        = 0x1830,
         .match_mask   = 0x3870,
@@ -959,7 +959,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
         .match        = 0x2,
         .match_mask   = 0x42,
@@ -973,7 +973,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
         .match        = 0x202,
         .match_mask   = 0x642,
@@ -987,7 +987,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
         .match        = 0x1000,
         .match_mask   = 0x3800,
@@ -1001,7 +1001,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
         .match        = 0x82,
         .match_mask   = 0x1c2,
@@ -1015,7 +1015,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
         .match        = 0x12,
         .match_mask   = 0x72,
@@ -1029,7 +1029,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
         .match        = 0x2000,
         .match_mask   = 0x3830,
@@ -1043,7 +1043,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA",
         .match        = 0x180,
         .match_mask   = 0x1c0,
@@ -1057,7 +1057,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
         .match        = 0x404,
         .match_mask   = 0x64c,
@@ -1071,7 +1071,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
         .match        = 0x4,
         .match_mask   = 0x4c,
@@ -1085,7 +1085,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
         .match        = 0x8,
         .match_mask   = 0x4c,
@@ -1099,7 +1099,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
         .match        = 0x40,
         .match_mask   = 0x40,
@@ -1113,7 +1113,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
         .match        = 0x42,
         .match_mask   = 0x42,
@@ -1127,7 +1127,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
         .match        = 0x44,
         .match_mask   = 0x44,
@@ -1141,7 +1141,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
         .match        = 0x48,
         .match_mask   = 0x48,
@@ -1155,7 +1155,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
         .match        = 0x50,
         .match_mask   = 0x50,
@@ -1169,7 +1169,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -1183,7 +1183,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
         .match        = 0xc0,
         .match_mask   = 0xc0,
@@ -1197,7 +1197,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
         .match        = 0x140,
         .match_mask   = 0x140,
@@ -1211,7 +1211,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
         .match        = 0x240,
         .match_mask   = 0x240,
@@ -1225,7 +1225,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3fff,
@@ -1239,7 +1239,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
         .match        = 0x3000,
         .match_mask   = 0x3800,
@@ -1253,7 +1253,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
         .match        = 0x800,
         .match_mask   = 0x3830,
@@ -1267,7 +1267,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x20,
         .match_mask   = 0x70,
@@ -1281,7 +1281,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x820,
         .match_mask   = 0x3870,
@@ -1295,7 +1295,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
         .match        = 0x30,
         .match_mask   = 0x70,
@@ -1309,7 +1309,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x10,
         .match_mask   = 0x72,
@@ -1323,7 +1323,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x2800,
         .match_mask   = 0x3800,
@@ -1337,7 +1337,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x2030,
         .match_mask   = 0x3870,
@@ -1351,7 +1351,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
         .match        = 0x830,
         .match_mask   = 0x3870,
@@ -1365,7 +1365,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_ETAG",
         .match        = 0x40,
         .match_mask   = 0x60,
@@ -1379,7 +1379,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
         .match        = 0x10,
         .match_mask   = 0x10,
@@ -1393,7 +1393,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
         .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -1407,7 +1407,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
         .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x7f,
@@ -1421,7 +1421,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
         .match        = 0x8,
         .match_mask   = 0x8,
@@ -1435,7 +1435,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
         .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -1449,7 +1449,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_VNTAG",
         .match        = 0x20,
         .match_mask   = 0x60,
@@ -1463,7 +1463,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
         .match        = 0x1800,
         .match_mask   = 0x3830,
@@ -1477,7 +1477,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x80,
         .match_mask   = 0x1c2,
@@ -1491,7 +1491,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
         .match        = 0x408,
         .match_mask   = 0x64c,
@@ -1505,7 +1505,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
         .match        = 0x3800,
         .match_mask   = 0x3800,
@@ -1519,7 +1519,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
         .match        = 0x200,
         .match_mask   = 0x642,
@@ -1533,7 +1533,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -1547,7 +1547,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
         .match        = 0x100,
         .match_mask   = 0x1c0,
@@ -1561,7 +1561,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x600,
         .match_mask   = 0x640,
@@ -1575,7 +1575,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
         .match        = 0x2000,
         .match_mask   = 0x3830,
@@ -1589,7 +1589,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA",
         .match        = 0x180,
         .match_mask   = 0x1c0,
@@ -1603,7 +1603,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
         .match        = 0x404,
         .match_mask   = 0x64c,
@@ -1617,7 +1617,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
         .match        = 0x4,
         .match_mask   = 0x4c,
@@ -1631,7 +1631,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
         .match        = 0x8,
         .match_mask   = 0x4c,
@@ -1645,7 +1645,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3fff,
@@ -1659,7 +1659,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
         .match        = 0x3000,
         .match_mask   = 0x3800,
@@ -1673,7 +1673,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
         .match        = 0x800,
         .match_mask   = 0x3830,
@@ -1687,7 +1687,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x20,
         .match_mask   = 0x70,
@@ -1701,7 +1701,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x820,
         .match_mask   = 0x3870,
@@ -1715,7 +1715,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
         .match        = 0x30,
         .match_mask   = 0x70,
@@ -1729,7 +1729,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x10,
         .match_mask   = 0x72,
@@ -1743,7 +1743,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x2800,
         .match_mask   = 0x3800,
@@ -1757,7 +1757,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x2030,
         .match_mask   = 0x3870,
@@ -1771,7 +1771,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_ETAG",
         .match        = 0x40,
         .match_mask   = 0x60,
@@ -1785,7 +1785,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
         .match        = 0x10,
         .match_mask   = 0x10,
@@ -1799,7 +1799,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -1813,7 +1813,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x7f,
@@ -1827,7 +1827,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
         .match        = 0x8,
         .match_mask   = 0x8,
@@ -1841,7 +1841,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -1855,7 +1855,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_SVTAG",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -1869,7 +1869,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_VNTAG",
         .match        = 0x20,
         .match_mask   = 0x60,
@@ -1883,7 +1883,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
         .match        = 0x1800,
         .match_mask   = 0x3830,
@@ -1897,7 +1897,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x80,
         .match_mask   = 0x1c2,
@@ -1911,7 +1911,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
         .match        = 0x408,
         .match_mask   = 0x64c,
@@ -1925,7 +1925,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
         .match        = 0x3800,
         .match_mask   = 0x3800,
@@ -1939,7 +1939,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
         .match        = 0x200,
         .match_mask   = 0x642,
@@ -1953,7 +1953,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -1967,7 +1967,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
         .match        = 0x100,
         .match_mask   = 0x1c0,
@@ -1981,7 +1981,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x600,
         .match_mask   = 0x640,
@@ -1995,7 +1995,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
         .match        = 0x1830,
         .match_mask   = 0x3870,
@@ -2009,7 +2009,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
         .match        = 0x2,
         .match_mask   = 0x42,
@@ -2023,7 +2023,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
         .match        = 0x202,
         .match_mask   = 0x642,
@@ -2037,7 +2037,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
         .match        = 0x1000,
         .match_mask   = 0x3800,
@@ -2051,7 +2051,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
         .match        = 0x82,
         .match_mask   = 0x1c2,
@@ -2065,7 +2065,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
         .match        = 0x12,
         .match_mask   = 0x72,
@@ -2079,7 +2079,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
         .match        = 0x2000,
         .match_mask   = 0x3830,
@@ -2093,7 +2093,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA",
         .match        = 0x180,
         .match_mask   = 0x1c0,
@@ -2107,7 +2107,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
         .match        = 0x404,
         .match_mask   = 0x64c,
@@ -2121,7 +2121,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
         .match        = 0x4,
         .match_mask   = 0x4c,
@@ -2135,7 +2135,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
         .match        = 0x8,
         .match_mask   = 0x4c,
@@ -2149,7 +2149,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
         .match        = 0x40,
         .match_mask   = 0x40,
@@ -2163,7 +2163,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
         .match        = 0x42,
         .match_mask   = 0x42,
@@ -2177,7 +2177,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
         .match        = 0x44,
         .match_mask   = 0x44,
@@ -2191,7 +2191,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
         .match        = 0x48,
         .match_mask   = 0x48,
@@ -2205,7 +2205,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
         .match        = 0x50,
         .match_mask   = 0x50,
@@ -2219,7 +2219,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -2233,7 +2233,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
         .match        = 0xc0,
         .match_mask   = 0xc0,
@@ -2247,7 +2247,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
         .match        = 0x140,
         .match_mask   = 0x140,
@@ -2261,7 +2261,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
         .match        = 0x240,
         .match_mask   = 0x240,
@@ -2275,7 +2275,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3fff,
@@ -2289,7 +2289,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
         .match        = 0x3000,
         .match_mask   = 0x3800,
@@ -2303,7 +2303,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
         .match        = 0x800,
         .match_mask   = 0x3830,
@@ -2317,7 +2317,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x20,
         .match_mask   = 0x70,
@@ -2331,7 +2331,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x820,
         .match_mask   = 0x3870,
@@ -2345,7 +2345,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
         .match        = 0x30,
         .match_mask   = 0x70,
@@ -2359,7 +2359,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x10,
         .match_mask   = 0x72,
@@ -2373,7 +2373,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x2800,
         .match_mask   = 0x3800,
@@ -2387,7 +2387,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x2030,
         .match_mask   = 0x3870,
@@ -2401,7 +2401,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
         .match        = 0x830,
         .match_mask   = 0x3870,
@@ -2415,7 +2415,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
         .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
         .match        = 0x2,
         .match_mask   = 0x3,
@@ -2429,7 +2429,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
         .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
         .match        = 0x1,
         .match_mask   = 0x3,
@@ -2443,7 +2443,7 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
 
     },
     {
-        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        /* BCM56780_A0_HNA_6_5_30_6_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
         .name         = "INGRESS_PKT_SYS_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3,
@@ -2458,23 +2458,23 @@ bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MA
     },
 };
 
-static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db_info = {
+static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db_info = {
     .num_entries = 173,
-    .db = bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db
+    .db = bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db
 };
-bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db_info_get(void) {
-    return &bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db_info;
+bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db_info_get(void) {
+    return &bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_db_info;
 }
 
-static shr_enum_map_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_map[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+static shr_enum_map_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_map[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_map_info = {
+static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_map_info = {
     .num_entries = 173,
-    .map = bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_map
+    .map = bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_map
 };
 
-bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_map_info_get(void) {
-    return &bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_map_info;
+bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_map_info_get(void) {
+    return &bcm56780_a0_hna_6_5_30_6_0_rxpmd_match_id_map_info;
 }
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_pkt_flexhdr.c
similarity index 77%
rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_pkt_flexhdr.c
rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_pkt_flexhdr.c
index a07337a4102d..75b50b998967 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_pkt_flexhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_pkt_flexhdr.c
@@ -3,11 +3,11 @@
  * DO NOT EDIT THIS FILE!
  * This file is auto-generated by xfc_map_parser
  * from the NPL output file(s) map.yml
- * for device bcm56780_a0 and variant hna_6_5_29_2_1.
+ * for device bcm56780_a0 and variant hna_6_5_30_6_0.
  * Edits to this file will be lost when it is regenerated.
  *
  * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  * All Rights Reserved.$
  *
  * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
@@ -31,315 +31,315 @@
 #include <shr/shr_error.h>
 #include <bcmpkt/bcmpkt_flexhdr.h>
 #include <bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h>
-#include <bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr.h>
-#include <bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr_data.h>
-#include <bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_flex_data.h>
+#include <bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56780_a0/hna_6_5_30_6_0/bcm56780_a0_hna_6_5_30_6_0_bcmpkt_rxpmd_flex_data.h>
 
 #define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
 #define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
 #define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
 #define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
 
-static void bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+static void bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
 {
     uint32_t *reason = data + 0;
 
     if (reason[13] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
     }
     if (reason[13] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
     }
     if (reason[13] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
     }
     if (reason[13] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT);
     }
     if (reason[13] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
     }
     if (reason[13] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
     }
     if (reason[13] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
     }
     if (reason[13] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD);
     }
     if (reason[13] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
     }
     if (reason[13] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
     }
     if (reason[13] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
     }
     if (reason[13] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
     }
     if (reason[13] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
     }
     if (reason[13] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
     }
     if (reason[13] & (0x1 << 14)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
     }
     if (reason[13] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
     }
     if (reason[13] & (0x1 << 16)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
     }
     if (reason[13] & (0x1 << 17)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_VFP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
     }
     if (reason[13] & (0x1 << 18)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
     }
     if (reason[13] & (0x1 << 19)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
     }
     if (reason[13] & (0x1 << 20)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
     }
     if (reason[13] & (0x1 << 21)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SVP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
     }
     if (reason[13] & (0x1 << 22)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
     }
     if (reason[13] & (0x1 << 23)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
     }
     if (reason[13] & (0x1 << 24)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
     }
     if (reason[13] & (0x1 << 25)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
     }
     if (reason[13] & (0x1 << 26)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
     }
     if (reason[13] & (0x1 << 27)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
     }
     if (reason[13] & (0x1 << 28)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
     }
     if (reason[13] & (0x1 << 29)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
     }
     if (reason[13] & (0x1 << 30)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
     }
     if (reason[13] & (0x1 << 31)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
     }
     if (reason[12] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
     }
     if (reason[12] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
     }
     if (reason[12] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
     }
     if (reason[12] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
     }
     if (reason[12] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
     }
     if (reason[12] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
     }
     if (reason[12] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
     }
     if (reason[12] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
     }
     if (reason[12] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY);
     }
     if (reason[12] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED);
     }
     if (reason[12] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED);
     }
     if (reason[12] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE);
     }
     if (reason[12] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR);
     }
     if (reason[12] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU);
     }
     if (reason[12] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
     }
 }
 
-static void bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+static void bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
 {
     uint32_t *reason = data + 0;
 
     reason[13] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
         reason[13] |= (0x1 << 0);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
         reason[13] |= (0x1 << 1);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
         reason[13] |= (0x1 << 2);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) {
         reason[13] |= (0x1 << 3);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
         reason[13] |= (0x1 << 4);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
         reason[13] |= (0x1 << 5);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
         reason[13] |= (0x1 << 6);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) {
         reason[13] |= (0x1 << 7);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
         reason[13] |= (0x1 << 8);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
         reason[13] |= (0x1 << 9);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
         reason[13] |= (0x1 << 10);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
         reason[13] |= (0x1 << 11);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
         reason[13] |= (0x1 << 12);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
         reason[13] |= (0x1 << 13);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
         reason[13] |= (0x1 << 14);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
         reason[13] |= (0x1 << 15);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
         reason[13] |= (0x1 << 16);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
         reason[13] |= (0x1 << 17);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
         reason[13] |= (0x1 << 18);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
         reason[13] |= (0x1 << 19);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
         reason[13] |= (0x1 << 20);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
         reason[13] |= (0x1 << 21);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
         reason[13] |= (0x1 << 22);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
         reason[13] |= (0x1 << 23);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
         reason[13] |= (0x1 << 24);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
         reason[13] |= (0x1 << 25);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
         reason[13] |= (0x1 << 26);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
         reason[13] |= (0x1 << 27);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
         reason[13] |= (0x1 << 28);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
         reason[13] |= (0x1 << 29);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
         reason[13] |= (0x1 << 30);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
         reason[13] |= (0x1 << 31);
     }
     reason[12] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
         reason[12] |= (0x1 << 0);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
         reason[12] |= (0x1 << 1);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
         reason[12] |= (0x1 << 2);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
         reason[12] |= (0x1 << 3);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
         reason[12] |= (0x1 << 4);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
         reason[12] |= (0x1 << 5);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
         reason[12] |= (0x1 << 6);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
         reason[12] |= (0x1 << 7);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY)) {
         reason[12] |= (0x1 << 8);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) {
         reason[12] |= (0x1 << 9);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) {
         reason[12] |= (0x1 << 10);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) {
         reason[12] |= (0x1 << 11);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) {
         reason[12] |= (0x1 << 12);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) {
         reason[12] |= (0x1 << 13);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
         reason[12] |= (0x1 << 15);
     }
 }
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_data[] = {
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_data[] = {
     {
         .name = "DLB_ECMP_DESTINATION_15_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -368,7 +368,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "DROP_CODE_15_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -397,7 +397,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "DVP_15_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -426,7 +426,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "EFFECTIVE_TTL_7_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -455,7 +455,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "EGR_MTOP_INDEX_HI_3_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -484,7 +484,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -511,7 +511,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -530,36 +530,36 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "ENTROPY_LABEL_HIGH_3_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 424, 427 }, /* Profile 2. */
-            { 424, 427 }, /* Profile 3. */
-            { 424, 427 }, /* Profile 4. */
-            { 424, 427 }, /* Profile 5. */
-            { 424, 427 }, /* Profile 6. */
-            { 424, 427 }, /* Profile 7. */
-            { 424, 427 }, /* Profile 8. */
-            { 424, 427 }, /* Profile 9. */
-            { 424, 427 }, /* Profile 10. */
-            { 424, 427 }, /* Profile 11. */
-            { 424, 427 }, /* Profile 12. */
-            { 424, 427 }, /* Profile 13. */
-            { 424, 427 }, /* Profile 14. */
-            { 424, 427 }, /* Profile 15. */
-            { 424, 427 }, /* Profile 16. */
-            { 424, 427 }, /* Profile 17. */
-            { 424, 427 }, /* Profile 18. */
-            { 424, 427 }, /* Profile 19. */
-            { 424, 427 }, /* Profile 20. */
-            { 424, 427 }, /* Profile 21. */
+            { 392, 395 }, /* Profile 2. */
+            { 392, 395 }, /* Profile 3. */
+            { 392, 395 }, /* Profile 4. */
+            { 392, 395 }, /* Profile 5. */
+            { 392, 395 }, /* Profile 6. */
+            { 392, 395 }, /* Profile 7. */
+            { 392, 395 }, /* Profile 8. */
+            { 392, 395 }, /* Profile 9. */
+            { 392, 395 }, /* Profile 10. */
+            { 392, 395 }, /* Profile 11. */
+            { 392, 395 }, /* Profile 12. */
+            { 392, 395 }, /* Profile 13. */
+            { 392, 395 }, /* Profile 14. */
+            { 392, 395 }, /* Profile 15. */
+            { 392, 395 }, /* Profile 16. */
+            { 392, 395 }, /* Profile 17. */
+            { 392, 395 }, /* Profile 18. */
+            { 392, 395 }, /* Profile 19. */
+            { 392, 395 }, /* Profile 20. */
+            { 392, 395 }, /* Profile 21. */
         },
         .profile_cnt = 22,
     },
     {
         .name = "ENTROPY_LABEL_LOW_15_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -588,7 +588,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "EP_NIH_HDR_TIMESTAMP_15_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -614,7 +614,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "EP_NIH_HDR_TIMESTAMP_31_16",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -640,7 +640,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "EVENT_TRACE_VECTOR_15_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -669,7 +669,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "EVENT_TRACE_VECTOR_31_16",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -698,7 +698,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "EVENT_TRACE_VECTOR_47_32",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -727,7 +727,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "I2E_CLASS_ID_15_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -756,36 +756,36 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "IFP_IOAM_GBP_ACTION_3_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 392, 395 }, /* Profile 2. */
-            { 392, 395 }, /* Profile 3. */
-            { 392, 395 }, /* Profile 4. */
-            { 392, 395 }, /* Profile 5. */
-            { 392, 395 }, /* Profile 6. */
-            { 392, 395 }, /* Profile 7. */
-            { 392, 395 }, /* Profile 8. */
-            { 392, 395 }, /* Profile 9. */
-            { 392, 395 }, /* Profile 10. */
-            { 392, 395 }, /* Profile 11. */
-            { 392, 395 }, /* Profile 12. */
-            { 392, 395 }, /* Profile 13. */
-            { 392, 395 }, /* Profile 14. */
-            { 392, 395 }, /* Profile 15. */
-            { 392, 395 }, /* Profile 16. */
-            { 392, 395 }, /* Profile 17. */
-            { 392, 395 }, /* Profile 18. */
-            { 392, 395 }, /* Profile 19. */
-            { 392, 395 }, /* Profile 20. */
-            { 392, 395 }, /* Profile 21. */
+            { 408, 411 }, /* Profile 2. */
+            { 408, 411 }, /* Profile 3. */
+            { 408, 411 }, /* Profile 4. */
+            { 408, 411 }, /* Profile 5. */
+            { 408, 411 }, /* Profile 6. */
+            { 408, 411 }, /* Profile 7. */
+            { 408, 411 }, /* Profile 8. */
+            { 408, 411 }, /* Profile 9. */
+            { 408, 411 }, /* Profile 10. */
+            { 408, 411 }, /* Profile 11. */
+            { 408, 411 }, /* Profile 12. */
+            { 408, 411 }, /* Profile 13. */
+            { 408, 411 }, /* Profile 14. */
+            { 408, 411 }, /* Profile 15. */
+            { 408, 411 }, /* Profile 16. */
+            { 408, 411 }, /* Profile 17. */
+            { 408, 411 }, /* Profile 18. */
+            { 408, 411 }, /* Profile 19. */
+            { 408, 411 }, /* Profile 20. */
+            { 408, 411 }, /* Profile 21. */
         },
         .profile_cnt = 22,
     },
     {
         .name = "IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -814,36 +814,36 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "IFP_TS_CONTROL_ACTION_3_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 400, 403 }, /* Profile 2. */
-            { 400, 403 }, /* Profile 3. */
-            { 400, 403 }, /* Profile 4. */
-            { 400, 403 }, /* Profile 5. */
-            { 400, 403 }, /* Profile 6. */
-            { 400, 403 }, /* Profile 7. */
-            { 400, 403 }, /* Profile 8. */
-            { 400, 403 }, /* Profile 9. */
-            { 400, 403 }, /* Profile 10. */
-            { 400, 403 }, /* Profile 11. */
-            { 400, 403 }, /* Profile 12. */
-            { 400, 403 }, /* Profile 13. */
-            { 400, 403 }, /* Profile 14. */
-            { 400, 403 }, /* Profile 15. */
-            { 400, 403 }, /* Profile 16. */
-            { 400, 403 }, /* Profile 17. */
-            { 400, 403 }, /* Profile 18. */
-            { 400, 403 }, /* Profile 19. */
-            { 400, 403 }, /* Profile 20. */
-            { 400, 403 }, /* Profile 21. */
+            { 420, 423 }, /* Profile 2. */
+            { 420, 423 }, /* Profile 3. */
+            { 420, 423 }, /* Profile 4. */
+            { 420, 423 }, /* Profile 5. */
+            { 420, 423 }, /* Profile 6. */
+            { 420, 423 }, /* Profile 7. */
+            { 420, 423 }, /* Profile 8. */
+            { 420, 423 }, /* Profile 9. */
+            { 420, 423 }, /* Profile 10. */
+            { 420, 423 }, /* Profile 11. */
+            { 420, 423 }, /* Profile 12. */
+            { 420, 423 }, /* Profile 13. */
+            { 420, 423 }, /* Profile 14. */
+            { 420, 423 }, /* Profile 15. */
+            { 420, 423 }, /* Profile 16. */
+            { 420, 423 }, /* Profile 17. */
+            { 420, 423 }, /* Profile 18. */
+            { 420, 423 }, /* Profile 19. */
+            { 420, 423 }, /* Profile 20. */
+            { 420, 423 }, /* Profile 21. */
         },
         .profile_cnt = 22,
     },
     {
         .name = "ING_TIMESTAMP_15_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -872,7 +872,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "ING_TIMESTAMP_31_16",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -901,7 +901,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "INGRESS_PP_PORT_7_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -930,7 +930,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -959,65 +959,65 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "INGRESS_QOS_REMARK_CTRL_3_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 428, 431 }, /* Profile 2. */
-            { 428, 431 }, /* Profile 3. */
-            { 428, 431 }, /* Profile 4. */
-            { 428, 431 }, /* Profile 5. */
-            { 428, 431 }, /* Profile 6. */
-            { 428, 431 }, /* Profile 7. */
-            { 428, 431 }, /* Profile 8. */
-            { 428, 431 }, /* Profile 9. */
-            { 428, 431 }, /* Profile 10. */
-            { 428, 431 }, /* Profile 11. */
-            { 428, 431 }, /* Profile 12. */
-            { 428, 431 }, /* Profile 13. */
-            { 428, 431 }, /* Profile 14. */
-            { 428, 431 }, /* Profile 15. */
-            { 428, 431 }, /* Profile 16. */
-            { 428, 431 }, /* Profile 17. */
-            { 428, 431 }, /* Profile 18. */
-            { 428, 431 }, /* Profile 19. */
-            { 428, 431 }, /* Profile 20. */
-            { 428, 431 }, /* Profile 21. */
+            { 388, 391 }, /* Profile 2. */
+            { 388, 391 }, /* Profile 3. */
+            { 388, 391 }, /* Profile 4. */
+            { 388, 391 }, /* Profile 5. */
+            { 388, 391 }, /* Profile 6. */
+            { 388, 391 }, /* Profile 7. */
+            { 388, 391 }, /* Profile 8. */
+            { 388, 391 }, /* Profile 9. */
+            { 388, 391 }, /* Profile 10. */
+            { 388, 391 }, /* Profile 11. */
+            { 388, 391 }, /* Profile 12. */
+            { 388, 391 }, /* Profile 13. */
+            { 388, 391 }, /* Profile 14. */
+            { 388, 391 }, /* Profile 15. */
+            { 388, 391 }, /* Profile 16. */
+            { 388, 391 }, /* Profile 17. */
+            { 388, 391 }, /* Profile 18. */
+            { 388, 391 }, /* Profile 19. */
+            { 388, 391 }, /* Profile 20. */
+            { 388, 391 }, /* Profile 21. */
         },
         .profile_cnt = 22,
     },
     {
         .name = "INT_PRI_3_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 416, 419 }, /* Profile 2. */
-            { 416, 419 }, /* Profile 3. */
-            { 416, 419 }, /* Profile 4. */
-            { 416, 419 }, /* Profile 5. */
-            { 416, 419 }, /* Profile 6. */
-            { 416, 419 }, /* Profile 7. */
-            { 416, 419 }, /* Profile 8. */
-            { 416, 419 }, /* Profile 9. */
-            { 416, 419 }, /* Profile 10. */
-            { 416, 419 }, /* Profile 11. */
-            { 416, 419 }, /* Profile 12. */
-            { 416, 419 }, /* Profile 13. */
-            { 416, 419 }, /* Profile 14. */
-            { 416, 419 }, /* Profile 15. */
-            { 416, 419 }, /* Profile 16. */
-            { 416, 419 }, /* Profile 17. */
-            { 416, 419 }, /* Profile 18. */
-            { 416, 419 }, /* Profile 19. */
-            { 416, 419 }, /* Profile 20. */
-            { 416, 419 }, /* Profile 21. */
+            { 424, 427 }, /* Profile 2. */
+            { 424, 427 }, /* Profile 3. */
+            { 424, 427 }, /* Profile 4. */
+            { 424, 427 }, /* Profile 5. */
+            { 424, 427 }, /* Profile 6. */
+            { 424, 427 }, /* Profile 7. */
+            { 424, 427 }, /* Profile 8. */
+            { 424, 427 }, /* Profile 9. */
+            { 424, 427 }, /* Profile 10. */
+            { 424, 427 }, /* Profile 11. */
+            { 424, 427 }, /* Profile 12. */
+            { 424, 427 }, /* Profile 13. */
+            { 424, 427 }, /* Profile 14. */
+            { 424, 427 }, /* Profile 15. */
+            { 424, 427 }, /* Profile 16. */
+            { 424, 427 }, /* Profile 17. */
+            { 424, 427 }, /* Profile 18. */
+            { 424, 427 }, /* Profile 19. */
+            { 424, 427 }, /* Profile 20. */
+            { 424, 427 }, /* Profile 21. */
         },
         .profile_cnt = 22,
     },
     {
         .name = "L2_IIF_10_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1045,7 +1045,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "L2_OIF_10_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1074,7 +1074,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "L3_IIF_13_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1103,7 +1103,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "L3_OIF_1_13_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1132,7 +1132,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1161,7 +1161,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "NHOP_INDEX_1_15_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1190,7 +1190,7 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "PARSER_VHLEN_0_15_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1219,36 +1219,36 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "PKT_MISC_CTRL_0_3_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 404, 407 }, /* Profile 2. */
-            { 404, 407 }, /* Profile 3. */
-            { 404, 407 }, /* Profile 4. */
-            { 404, 407 }, /* Profile 5. */
-            { 404, 407 }, /* Profile 6. */
-            { 404, 407 }, /* Profile 7. */
-            { 404, 407 }, /* Profile 8. */
-            { 404, 407 }, /* Profile 9. */
-            { 404, 407 }, /* Profile 10. */
-            { 404, 407 }, /* Profile 11. */
-            { 404, 407 }, /* Profile 12. */
-            { 404, 407 }, /* Profile 13. */
-            { 404, 407 }, /* Profile 14. */
-            { 404, 407 }, /* Profile 15. */
-            { 404, 407 }, /* Profile 16. */
-            { 404, 407 }, /* Profile 17. */
-            { 404, 407 }, /* Profile 18. */
-            { 404, 407 }, /* Profile 19. */
-            { 404, 407 }, /* Profile 20. */
-            { 404, 407 }, /* Profile 21. */
+            { 400, 403 }, /* Profile 2. */
+            { 400, 403 }, /* Profile 3. */
+            { 400, 403 }, /* Profile 4. */
+            { 400, 403 }, /* Profile 5. */
+            { 400, 403 }, /* Profile 6. */
+            { 400, 403 }, /* Profile 7. */
+            { 400, 403 }, /* Profile 8. */
+            { 400, 403 }, /* Profile 9. */
+            { 400, 403 }, /* Profile 10. */
+            { 400, 403 }, /* Profile 11. */
+            { 400, 403 }, /* Profile 12. */
+            { 400, 403 }, /* Profile 13. */
+            { 400, 403 }, /* Profile 14. */
+            { 400, 403 }, /* Profile 15. */
+            { 400, 403 }, /* Profile 16. */
+            { 400, 403 }, /* Profile 17. */
+            { 400, 403 }, /* Profile 18. */
+            { 400, 403 }, /* Profile 19. */
+            { 400, 403 }, /* Profile 20. */
+            { 400, 403 }, /* Profile 21. */
         },
         .profile_cnt = 22,
     },
     {
         .name = "SVP_15_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SVP_15_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SVP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1277,36 +1277,36 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 396, 399 }, /* Profile 2. */
-            { 396, 399 }, /* Profile 3. */
-            { 396, 399 }, /* Profile 4. */
-            { 396, 399 }, /* Profile 5. */
-            { 396, 399 }, /* Profile 6. */
-            { 396, 399 }, /* Profile 7. */
-            { 396, 399 }, /* Profile 8. */
-            { 396, 399 }, /* Profile 9. */
-            { 396, 399 }, /* Profile 10. */
-            { 396, 399 }, /* Profile 11. */
-            { 396, 399 }, /* Profile 12. */
-            { 396, 399 }, /* Profile 13. */
-            { 396, 399 }, /* Profile 14. */
-            { 396, 399 }, /* Profile 15. */
-            { 396, 399 }, /* Profile 16. */
-            { 396, 399 }, /* Profile 17. */
-            { 396, 399 }, /* Profile 18. */
-            { 396, 399 }, /* Profile 19. */
-            { 396, 399 }, /* Profile 20. */
-            { 396, 399 }, /* Profile 21. */
+            { 412, 415 }, /* Profile 2. */
+            { 412, 415 }, /* Profile 3. */
+            { 412, 415 }, /* Profile 4. */
+            { 412, 415 }, /* Profile 5. */
+            { 412, 415 }, /* Profile 6. */
+            { 412, 415 }, /* Profile 7. */
+            { 412, 415 }, /* Profile 8. */
+            { 412, 415 }, /* Profile 9. */
+            { 412, 415 }, /* Profile 10. */
+            { 412, 415 }, /* Profile 11. */
+            { 412, 415 }, /* Profile 12. */
+            { 412, 415 }, /* Profile 13. */
+            { 412, 415 }, /* Profile 14. */
+            { 412, 415 }, /* Profile 15. */
+            { 412, 415 }, /* Profile 16. */
+            { 412, 415 }, /* Profile 17. */
+            { 412, 415 }, /* Profile 18. */
+            { 412, 415 }, /* Profile 19. */
+            { 412, 415 }, /* Profile 20. */
+            { 412, 415 }, /* Profile 21. */
         },
         .profile_cnt = 22,
     },
     {
         .name = "SYSTEM_DESTINATION_15_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1335,36 +1335,36 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "SYSTEM_OPCODE_3_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 420, 423 }, /* Profile 2. */
-            { 420, 423 }, /* Profile 3. */
-            { 420, 423 }, /* Profile 4. */
-            { 420, 423 }, /* Profile 5. */
-            { 420, 423 }, /* Profile 6. */
-            { 420, 423 }, /* Profile 7. */
-            { 420, 423 }, /* Profile 8. */
-            { 420, 423 }, /* Profile 9. */
-            { 420, 423 }, /* Profile 10. */
-            { 420, 423 }, /* Profile 11. */
-            { 420, 423 }, /* Profile 12. */
-            { 420, 423 }, /* Profile 13. */
-            { 420, 423 }, /* Profile 14. */
-            { 420, 423 }, /* Profile 15. */
-            { 420, 423 }, /* Profile 16. */
-            { 420, 423 }, /* Profile 17. */
-            { 420, 423 }, /* Profile 18. */
-            { 420, 423 }, /* Profile 19. */
-            { 420, 423 }, /* Profile 20. */
-            { 420, 423 }, /* Profile 21. */
+            { 396, 399 }, /* Profile 2. */
+            { 396, 399 }, /* Profile 3. */
+            { 396, 399 }, /* Profile 4. */
+            { 396, 399 }, /* Profile 5. */
+            { 396, 399 }, /* Profile 6. */
+            { 396, 399 }, /* Profile 7. */
+            { 396, 399 }, /* Profile 8. */
+            { 396, 399 }, /* Profile 9. */
+            { 396, 399 }, /* Profile 10. */
+            { 396, 399 }, /* Profile 11. */
+            { 396, 399 }, /* Profile 12. */
+            { 396, 399 }, /* Profile 13. */
+            { 396, 399 }, /* Profile 14. */
+            { 396, 399 }, /* Profile 15. */
+            { 396, 399 }, /* Profile 16. */
+            { 396, 399 }, /* Profile 17. */
+            { 396, 399 }, /* Profile 18. */
+            { 396, 399 }, /* Profile 19. */
+            { 396, 399 }, /* Profile 20. */
+            { 396, 399 }, /* Profile 21. */
         },
         .profile_cnt = 22,
     },
     {
         .name = "SYSTEM_SOURCE_15_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1393,65 +1393,65 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "TIMESTAMP_CTRL_3_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 412, 415 }, /* Profile 2. */
-            { 412, 415 }, /* Profile 3. */
-            { 412, 415 }, /* Profile 4. */
-            { 412, 415 }, /* Profile 5. */
-            { 412, 415 }, /* Profile 6. */
-            { 412, 415 }, /* Profile 7. */
-            { 412, 415 }, /* Profile 8. */
-            { 412, 415 }, /* Profile 9. */
-            { 412, 415 }, /* Profile 10. */
-            { 412, 415 }, /* Profile 11. */
-            { 412, 415 }, /* Profile 12. */
-            { 412, 415 }, /* Profile 13. */
-            { 412, 415 }, /* Profile 14. */
-            { 412, 415 }, /* Profile 15. */
-            { 412, 415 }, /* Profile 16. */
-            { 412, 415 }, /* Profile 17. */
-            { 412, 415 }, /* Profile 18. */
-            { 412, 415 }, /* Profile 19. */
-            { 412, 415 }, /* Profile 20. */
-            { 412, 415 }, /* Profile 21. */
+            { 428, 431 }, /* Profile 2. */
+            { 428, 431 }, /* Profile 3. */
+            { 428, 431 }, /* Profile 4. */
+            { 428, 431 }, /* Profile 5. */
+            { 428, 431 }, /* Profile 6. */
+            { 428, 431 }, /* Profile 7. */
+            { 428, 431 }, /* Profile 8. */
+            { 428, 431 }, /* Profile 9. */
+            { 428, 431 }, /* Profile 10. */
+            { 428, 431 }, /* Profile 11. */
+            { 428, 431 }, /* Profile 12. */
+            { 428, 431 }, /* Profile 13. */
+            { 428, 431 }, /* Profile 14. */
+            { 428, 431 }, /* Profile 15. */
+            { 428, 431 }, /* Profile 16. */
+            { 428, 431 }, /* Profile 17. */
+            { 428, 431 }, /* Profile 18. */
+            { 428, 431 }, /* Profile 19. */
+            { 428, 431 }, /* Profile 20. */
+            { 428, 431 }, /* Profile 21. */
         },
         .profile_cnt = 22,
     },
     {
         .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 408, 411 }, /* Profile 2. */
-            { 408, 411 }, /* Profile 3. */
-            { 408, 411 }, /* Profile 4. */
-            { 408, 411 }, /* Profile 5. */
-            { 408, 411 }, /* Profile 6. */
-            { 408, 411 }, /* Profile 7. */
-            { 408, 411 }, /* Profile 8. */
-            { 408, 411 }, /* Profile 9. */
-            { 408, 411 }, /* Profile 10. */
-            { 408, 411 }, /* Profile 11. */
-            { 408, 411 }, /* Profile 12. */
-            { 408, 411 }, /* Profile 13. */
-            { 408, 411 }, /* Profile 14. */
-            { 408, 411 }, /* Profile 15. */
-            { 408, 411 }, /* Profile 16. */
-            { 408, 411 }, /* Profile 17. */
-            { 408, 411 }, /* Profile 18. */
-            { 408, 411 }, /* Profile 19. */
-            { 408, 411 }, /* Profile 20. */
-            { 408, 411 }, /* Profile 21. */
+            { 416, 419 }, /* Profile 2. */
+            { 416, 419 }, /* Profile 3. */
+            { 416, 419 }, /* Profile 4. */
+            { 416, 419 }, /* Profile 5. */
+            { 416, 419 }, /* Profile 6. */
+            { 416, 419 }, /* Profile 7. */
+            { 416, 419 }, /* Profile 8. */
+            { 416, 419 }, /* Profile 9. */
+            { 416, 419 }, /* Profile 10. */
+            { 416, 419 }, /* Profile 11. */
+            { 416, 419 }, /* Profile 12. */
+            { 416, 419 }, /* Profile 13. */
+            { 416, 419 }, /* Profile 14. */
+            { 416, 419 }, /* Profile 15. */
+            { 416, 419 }, /* Profile 16. */
+            { 416, 419 }, /* Profile 17. */
+            { 416, 419 }, /* Profile 18. */
+            { 416, 419 }, /* Profile 19. */
+            { 416, 419 }, /* Profile 20. */
+            { 416, 419 }, /* Profile 21. */
         },
         .profile_cnt = 22,
     },
     {
         .name = "VFI_15_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1480,47 +1480,47 @@ static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_
     },
     {
         .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0",
-        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0,
+        .fid = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 388, 391 }, /* Profile 2. */
-            { 388, 391 }, /* Profile 3. */
-            { 388, 391 }, /* Profile 4. */
-            { 388, 391 }, /* Profile 5. */
-            { 388, 391 }, /* Profile 6. */
-            { 388, 391 }, /* Profile 7. */
-            { 388, 391 }, /* Profile 8. */
-            { 388, 391 }, /* Profile 9. */
-            { 388, 391 }, /* Profile 10. */
-            { 388, 391 }, /* Profile 11. */
-            { 388, 391 }, /* Profile 12. */
-            { 388, 391 }, /* Profile 13. */
-            { 388, 391 }, /* Profile 14. */
-            { 388, 391 }, /* Profile 15. */
-            { 388, 391 }, /* Profile 16. */
-            { 388, 391 }, /* Profile 17. */
-            { 388, 391 }, /* Profile 18. */
-            { 388, 391 }, /* Profile 19. */
-            { 388, 391 }, /* Profile 20. */
-            { 388, 391 }, /* Profile 21. */
+            { 404, 407 }, /* Profile 2. */
+            { 404, 407 }, /* Profile 3. */
+            { 404, 407 }, /* Profile 4. */
+            { 404, 407 }, /* Profile 5. */
+            { 404, 407 }, /* Profile 6. */
+            { 404, 407 }, /* Profile 7. */
+            { 404, 407 }, /* Profile 8. */
+            { 404, 407 }, /* Profile 9. */
+            { 404, 407 }, /* Profile 10. */
+            { 404, 407 }, /* Profile 11. */
+            { 404, 407 }, /* Profile 12. */
+            { 404, 407 }, /* Profile 13. */
+            { 404, 407 }, /* Profile 14. */
+            { 404, 407 }, /* Profile 15. */
+            { 404, 407 }, /* Profile 16. */
+            { 404, 407 }, /* Profile 17. */
+            { 404, 407 }, /* Profile 18. */
+            { 404, 407 }, /* Profile 19. */
+            { 404, 407 }, /* Profile 20. */
+            { 404, 407 }, /* Profile 21. */
         },
         .profile_cnt = 22,
     },
-};static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_data,
+};static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_data,
 };
 
-static shr_enum_map_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reason_names[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+static shr_enum_map_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reason_names[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_reasons_info_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reasons_info = {
-    .num_reasons = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_COUNT,
-    .reason_names = bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reason_names,
-    .reason_encode = bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reason_encode,
-    .reason_decode = bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reason_decode,
+static bcmpkt_flex_reasons_info_t bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reason_names,
+    .reason_encode = bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reason_decode,
 };
 
 
@@ -1663,7 +1663,7 @@ static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_arp_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_arp_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_FID_COUNT] = {
     bcmpkt_arp_t_hardware_len_get,
     bcmpkt_arp_t_hardware_type_get,
     bcmpkt_arp_t_operation_get,
@@ -1675,7 +1675,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_arp_t_fget[BCM56780_A0_HNA_6_
     bcmpkt_arp_t_target_ip_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_arp_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_arp_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_FID_COUNT] = {
     bcmpkt_arp_t_hardware_len_set,
     bcmpkt_arp_t_hardware_type_set,
     bcmpkt_arp_t_operation_set,
@@ -1687,13 +1687,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_arp_t_fset[BCM56780_A0_HNA_6_
     bcmpkt_arp_t_target_ip_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_arp_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_arp_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_arp_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_arp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_arp_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_arp_t_field_data,
 };
 
 
@@ -1790,7 +1790,7 @@ static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_authen_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_authen_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
     bcmpkt_authen_t_data_get,
     bcmpkt_authen_t_next_header_get,
     bcmpkt_authen_t_payload_len_get,
@@ -1799,7 +1799,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_authen_t_fget[BCM56780_A0_HNA
     bcmpkt_authen_t_spi_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_authen_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_authen_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
     bcmpkt_authen_t_data_set,
     bcmpkt_authen_t_next_header_set,
     bcmpkt_authen_t_payload_len_set,
@@ -1808,13 +1808,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_authen_t_fset[BCM56780_A0_HNA
     bcmpkt_authen_t_spi_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_authen_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_authen_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_authen_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_authen_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_authen_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_AUTHEN_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_authen_t_field_data,
 };
 
 
@@ -2063,7 +2063,7 @@ static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_bfd_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_bfd_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FID_COUNT] = {
     bcmpkt_bfd_t_ap_get,
     bcmpkt_bfd_t_bfd_length_get,
     bcmpkt_bfd_t_cpi_get,
@@ -2082,7 +2082,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_bfd_t_fget[BCM56780_A0_HNA_6_
     bcmpkt_bfd_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_bfd_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_bfd_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FID_COUNT] = {
     bcmpkt_bfd_t_ap_set,
     bcmpkt_bfd_t_bfd_length_set,
     bcmpkt_bfd_t_cpi_set,
@@ -2101,13 +2101,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_bfd_t_fset[BCM56780_A0_HNA_6_
     bcmpkt_bfd_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_bfd_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_bfd_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_bfd_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_bfd_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_bfd_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_BFD_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_bfd_t_field_data,
 };
 
 
@@ -2141,23 +2141,23 @@ static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_cntag_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_cntag_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_FID_COUNT] = {
     bcmpkt_cntag_t_rpid_get,
     bcmpkt_cntag_t_tpid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_cntag_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_cntag_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_FID_COUNT] = {
     bcmpkt_cntag_t_rpid_set,
     bcmpkt_cntag_t_tpid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_cntag_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_cntag_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_cntag_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_cntag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_cntag_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CNTAG_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_cntag_t_field_data,
 };
 
 
@@ -2273,7 +2273,7 @@ static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
     bcmpkt_cpu_composites_0_t_dma_cont0_get,
     bcmpkt_cpu_composites_0_t_dma_cont1_get,
     bcmpkt_cpu_composites_0_t_dma_cont2_get,
@@ -2283,7 +2283,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_fget[BCM56
     bcmpkt_cpu_composites_0_t_dma_cont6_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
     bcmpkt_cpu_composites_0_t_dma_cont0_set,
     bcmpkt_cpu_composites_0_t_dma_cont1_set,
     bcmpkt_cpu_composites_0_t_dma_cont2_set,
@@ -2293,13 +2293,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_fset[BCM56
     bcmpkt_cpu_composites_0_t_dma_cont6_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_field_data,
 };
 
 
@@ -2479,7 +2479,7 @@ static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
     bcmpkt_cpu_composites_1_t_dma_cont10_get,
     bcmpkt_cpu_composites_1_t_dma_cont11_get,
     bcmpkt_cpu_composites_1_t_dma_cont12_get,
@@ -2493,7 +2493,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_fget[BCM56
     bcmpkt_cpu_composites_1_t_dma_cont9_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
     bcmpkt_cpu_composites_1_t_dma_cont10_set,
     bcmpkt_cpu_composites_1_t_dma_cont11_set,
     bcmpkt_cpu_composites_1_t_dma_cont12_set,
@@ -2507,13 +2507,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_fset[BCM56
     bcmpkt_cpu_composites_1_t_dma_cont9_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_field_data,
 };
 
 
@@ -2563,25 +2563,25 @@ static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_dest_option_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_dest_option_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
     bcmpkt_dest_option_t_hdr_ext_len_get,
     bcmpkt_dest_option_t_next_header_get,
     bcmpkt_dest_option_t_option_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_dest_option_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_dest_option_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
     bcmpkt_dest_option_t_hdr_ext_len_set,
     bcmpkt_dest_option_t_next_header_set,
     bcmpkt_dest_option_t_option_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_dest_option_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_dest_option_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_dest_option_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_dest_option_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_dest_option_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_dest_option_t_field_data,
 };
 
 
@@ -2767,7 +2767,7 @@ static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
     bcmpkt_ep_nih_header_t_header_subtype_get,
     bcmpkt_ep_nih_header_t_header_type_get,
     bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
@@ -2782,7 +2782,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_fget[BCM56780
     bcmpkt_ep_nih_header_t_timestamp_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
     bcmpkt_ep_nih_header_t_header_subtype_set,
     bcmpkt_ep_nih_header_t_header_type_set,
     bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
@@ -2797,13 +2797,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_fset[BCM56780
     bcmpkt_ep_nih_header_t_timestamp_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_field_data,
 };
 
 
@@ -2943,7 +2943,7 @@ static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
     bcmpkt_erspan3_fixed_hdr_t_bso_get,
     bcmpkt_erspan3_fixed_hdr_t_cos_get,
     bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
@@ -2955,7 +2955,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_fget[BCM5
     bcmpkt_erspan3_fixed_hdr_t_vlan_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
     bcmpkt_erspan3_fixed_hdr_t_bso_set,
     bcmpkt_erspan3_fixed_hdr_t_cos_set,
     bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
@@ -2967,13 +2967,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_fset[BCM5
     bcmpkt_erspan3_fixed_hdr_t_vlan_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_field_data,
 };
 
 
@@ -3038,27 +3038,27 @@ static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
     bcmpkt_erspan3_subhdr_5_t_platform_id_get,
     bcmpkt_erspan3_subhdr_5_t_port_id_get,
     bcmpkt_erspan3_subhdr_5_t_switch_id_get,
     bcmpkt_erspan3_subhdr_5_t_timestamp_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
     bcmpkt_erspan3_subhdr_5_t_platform_id_set,
     bcmpkt_erspan3_subhdr_5_t_port_id_set,
     bcmpkt_erspan3_subhdr_5_t_switch_id_set,
     bcmpkt_erspan3_subhdr_5_t_timestamp_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_field_data,
 };
 
 
@@ -3139,7 +3139,7 @@ static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_esp_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_esp_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_FID_COUNT] = {
     bcmpkt_esp_t_next_header_get,
     bcmpkt_esp_t_pad_get,
     bcmpkt_esp_t_pad_len_get,
@@ -3147,7 +3147,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_esp_t_fget[BCM56780_A0_HNA_6_
     bcmpkt_esp_t_spi_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_esp_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_esp_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_FID_COUNT] = {
     bcmpkt_esp_t_next_header_set,
     bcmpkt_esp_t_pad_set,
     bcmpkt_esp_t_pad_len_set,
@@ -3155,13 +3155,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_esp_t_fset[BCM56780_A0_HNA_6_
     bcmpkt_esp_t_spi_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_esp_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_esp_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_esp_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_esp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_esp_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ESP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_esp_t_field_data,
 };
 
 
@@ -3196,23 +3196,23 @@ static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_etag_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_etag_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_FID_COUNT] = {
     bcmpkt_etag_t_tag_get,
     bcmpkt_etag_t_tpid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_etag_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_etag_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_FID_COUNT] = {
     bcmpkt_etag_t_tag_set,
     bcmpkt_etag_t_tpid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_etag_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_etag_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_etag_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_etag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_etag_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETAG_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_etag_t_field_data,
 };
 
 
@@ -3231,21 +3231,21 @@ static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ethertype_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ethertype_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
     bcmpkt_ethertype_t_type_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ethertype_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ethertype_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
     bcmpkt_ethertype_t_type_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ethertype_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ethertype_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ethertype_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_ethertype_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ethertype_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_ethertype_t_field_data,
 };
 
 
@@ -3310,27 +3310,27 @@ static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_frag_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_frag_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FID_COUNT] = {
     bcmpkt_frag_t_frag_info_get,
     bcmpkt_frag_t_id_get,
     bcmpkt_frag_t_next_header_get,
     bcmpkt_frag_t_reserved_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_frag_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_frag_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FID_COUNT] = {
     bcmpkt_frag_t_frag_info_set,
     bcmpkt_frag_t_id_set,
     bcmpkt_frag_t_next_header_set,
     bcmpkt_frag_t_reserved_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_frag_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_frag_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_frag_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_frag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_frag_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FRAG_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_frag_t_field_data,
 };
 
 
@@ -3514,52 +3514,52 @@ static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int prof
     return ret;
 }
 
-static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[3], 0, 16);
+    *val = WORD_FIELD_GET(data[2], 16, 16);
 
     return ret;
 }
 
-static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[3], 0, 16, val);
+    WORD_FIELD_SET(data[2], 16, 16, val);
     return ret;
 }
 
-static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[2], 16, 16);
+    *val = WORD_FIELD_GET(data[0], 24, 8);
 
     return ret;
 }
 
-static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[2], 16, 16, val);
+    WORD_FIELD_SET(data[0], 24, 8, val);
     return ret;
 }
 
-static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_generic_loopback_t_svp_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[0], 24, 8);
+    *val = WORD_FIELD_GET(data[3], 0, 16);
 
     return ret;
 }
 
-static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_generic_loopback_t_svp_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[0], 24, 8, val);
+    WORD_FIELD_SET(data[3], 0, 16, val);
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
     bcmpkt_generic_loopback_t_destination_obj_get,
     bcmpkt_generic_loopback_t_destination_type_get,
     bcmpkt_generic_loopback_t_entropy_obj_get,
@@ -3572,12 +3572,12 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_fget[BCM56
     bcmpkt_generic_loopback_t_processing_ctrl_1_get,
     bcmpkt_generic_loopback_t_qos_obj_get,
     bcmpkt_generic_loopback_t_reserved_1_get,
-    bcmpkt_generic_loopback_t_reserved_2_get,
     bcmpkt_generic_loopback_t_source_system_port_get,
     bcmpkt_generic_loopback_t_start_byte_get,
+    bcmpkt_generic_loopback_t_svp_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
     bcmpkt_generic_loopback_t_destination_obj_set,
     bcmpkt_generic_loopback_t_destination_type_set,
     bcmpkt_generic_loopback_t_entropy_obj_set,
@@ -3590,18 +3590,18 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_fset[BCM56
     bcmpkt_generic_loopback_t_processing_ctrl_1_set,
     bcmpkt_generic_loopback_t_qos_obj_set,
     bcmpkt_generic_loopback_t_reserved_1_set,
-    bcmpkt_generic_loopback_t_reserved_2_set,
     bcmpkt_generic_loopback_t_source_system_port_set,
     bcmpkt_generic_loopback_t_start_byte_set,
+    bcmpkt_generic_loopback_t_svp_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_field_data,
 };
 
 
@@ -3680,7 +3680,7 @@ static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_gpe_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_gpe_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FID_COUNT] = {
     bcmpkt_gpe_t_flags_get,
     bcmpkt_gpe_t_next_protocol_get,
     bcmpkt_gpe_t_reserved0_get,
@@ -3688,7 +3688,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_gpe_t_fget[BCM56780_A0_HNA_6_
     bcmpkt_gpe_t_vni_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_gpe_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_gpe_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FID_COUNT] = {
     bcmpkt_gpe_t_flags_set,
     bcmpkt_gpe_t_next_protocol_set,
     bcmpkt_gpe_t_reserved0_set,
@@ -3696,13 +3696,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_gpe_t_fset[BCM56780_A0_HNA_6_
     bcmpkt_gpe_t_vni_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_gpe_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_gpe_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_gpe_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_gpe_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_gpe_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GPE_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_gpe_t_field_data,
 };
 
 
@@ -3736,23 +3736,23 @@ static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint3
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
     bcmpkt_gre_chksum_t_checksum_get,
     bcmpkt_gre_chksum_t_offset_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
     bcmpkt_gre_chksum_t_checksum_set,
     bcmpkt_gre_chksum_t_offset_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_field_data,
 };
 
 
@@ -3772,21 +3772,21 @@ static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_gre_key_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_gre_key_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
     bcmpkt_gre_key_t_key_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_gre_key_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_gre_key_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
     bcmpkt_gre_key_t_key_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_gre_key_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_gre_key_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_gre_key_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_gre_key_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_gre_key_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_KEY_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_gre_key_t_field_data,
 };
 
 
@@ -3806,21 +3806,21 @@ static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
     bcmpkt_gre_rout_t_routing_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
     bcmpkt_gre_rout_t_routing_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_field_data,
 };
 
 
@@ -3840,21 +3840,21 @@ static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
     bcmpkt_gre_seq_t_sequence_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
     bcmpkt_gre_seq_t_sequence_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_field_data,
 };
 
 
@@ -3918,27 +3918,27 @@ static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_gre_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_gre_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_FID_COUNT] = {
     bcmpkt_gre_t_c_r_k_s_get,
     bcmpkt_gre_t_protocol_get,
     bcmpkt_gre_t_reserved_get,
     bcmpkt_gre_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_gre_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_gre_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_FID_COUNT] = {
     bcmpkt_gre_t_c_r_k_s_set,
     bcmpkt_gre_t_protocol_set,
     bcmpkt_gre_t_reserved_set,
     bcmpkt_gre_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_gre_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_gre_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_gre_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_gre_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_gre_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_GRE_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_gre_t_field_data,
 };
 
 
@@ -3988,25 +3988,25 @@ static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint3
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
     bcmpkt_hop_by_hop_t_hdr_ext_len_get,
     bcmpkt_hop_by_hop_t_next_header_get,
     bcmpkt_hop_by_hop_t_option_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
     bcmpkt_hop_by_hop_t_hdr_ext_len_set,
     bcmpkt_hop_by_hop_t_next_header_set,
     bcmpkt_hop_by_hop_t_option_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_field_data,
 };
 
 
@@ -4055,25 +4055,25 @@ static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_icmp_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_icmp_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_FID_COUNT] = {
     bcmpkt_icmp_t_checksum_get,
     bcmpkt_icmp_t_code_get,
     bcmpkt_icmp_t_icmp_type_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_icmp_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_icmp_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_FID_COUNT] = {
     bcmpkt_icmp_t_checksum_set,
     bcmpkt_icmp_t_code_set,
     bcmpkt_icmp_t_icmp_type_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_icmp_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_icmp_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_icmp_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_icmp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_icmp_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_icmp_t_field_data,
 };
 
 
@@ -4107,23 +4107,23 @@ static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int pr
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get,
     bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set,
     bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_field_data,
 };
 
 
@@ -4187,27 +4187,27 @@ static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_0_b_t_cn_get,
     bcmpkt_ifa_flex_md_0_b_t_port_speed_get,
     bcmpkt_ifa_flex_md_0_b_t_queue_id_get,
     bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_0_b_t_cn_set,
     bcmpkt_ifa_flex_md_0_b_t_port_speed_set,
     bcmpkt_ifa_flex_md_0_b_t_queue_id_set,
     bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_field_data,
 };
 
 
@@ -4257,25 +4257,25 @@ static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, i
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_1_t_egress_port_id_get,
     bcmpkt_ifa_flex_md_1_t_ingress_port_id_get,
     bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_1_t_egress_port_id_set,
     bcmpkt_ifa_flex_md_1_t_ingress_port_id_set,
     bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_field_data,
 };
 
 
@@ -4311,23 +4311,23 @@ static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, in
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get,
     bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set,
     bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_field_data,
 };
 
 
@@ -4363,23 +4363,23 @@ static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get,
     bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set,
     bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_field_data,
 };
 
 
@@ -4458,7 +4458,7 @@ static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
     bcmpkt_ifa_header_t_flags_get,
     bcmpkt_ifa_header_t_gns_get,
     bcmpkt_ifa_header_t_max_length_get,
@@ -4466,7 +4466,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_fget[BCM56780_A0
     bcmpkt_ifa_header_t_ver_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
     bcmpkt_ifa_header_t_flags_set,
     bcmpkt_ifa_header_t_gns_set,
     bcmpkt_ifa_header_t_max_length_set,
@@ -4474,13 +4474,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_fset[BCM56780_A0
     bcmpkt_ifa_header_t_ver_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_HEADER_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_field_data,
 };
 
 
@@ -4529,25 +4529,25 @@ static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
     bcmpkt_ifa_md_base_t_action_vector_get,
     bcmpkt_ifa_md_base_t_hop_limit_current_length_get,
     bcmpkt_ifa_md_base_t_request_vector_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
     bcmpkt_ifa_md_base_t_action_vector_set,
     bcmpkt_ifa_md_base_t_hop_limit_current_length_set,
     bcmpkt_ifa_md_base_t_request_vector_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_field_data,
 };
 
 
@@ -4612,27 +4612,27 @@ static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int prof
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
     bcmpkt_ifa_metadata_t_action_vector_get,
     bcmpkt_ifa_metadata_t_hop_limit_current_length_get,
     bcmpkt_ifa_metadata_t_metadata_get,
     bcmpkt_ifa_metadata_t_request_vector_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
     bcmpkt_ifa_metadata_t_action_vector_set,
     bcmpkt_ifa_metadata_t_hop_limit_current_length_set,
     bcmpkt_ifa_metadata_t_metadata_set,
     bcmpkt_ifa_metadata_t_request_vector_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IFA_METADATA_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_field_data,
 };
 
 
@@ -4697,27 +4697,27 @@ static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_igmp_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_igmp_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_FID_COUNT] = {
     bcmpkt_igmp_t_checksum_get,
     bcmpkt_igmp_t_group_address_get,
     bcmpkt_igmp_t_igmp_type_get,
     bcmpkt_igmp_t_max_resp_time_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_igmp_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_igmp_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_FID_COUNT] = {
     bcmpkt_igmp_t_checksum_set,
     bcmpkt_igmp_t_group_address_set,
     bcmpkt_igmp_t_igmp_type_set,
     bcmpkt_igmp_t_max_resp_time_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_igmp_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_igmp_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_igmp_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_igmp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_igmp_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IGMP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_igmp_t_field_data,
 };
 
 
@@ -4799,7 +4799,7 @@ static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ipfix_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ipfix_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_FID_COUNT] = {
     bcmpkt_ipfix_t_export_time_get,
     bcmpkt_ipfix_t_length_get,
     bcmpkt_ipfix_t_obs_domain_id_get,
@@ -4807,7 +4807,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ipfix_t_fget[BCM56780_A0_HNA_
     bcmpkt_ipfix_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ipfix_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ipfix_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_FID_COUNT] = {
     bcmpkt_ipfix_t_export_time_set,
     bcmpkt_ipfix_t_length_set,
     bcmpkt_ipfix_t_obs_domain_id_set,
@@ -4815,13 +4815,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ipfix_t_fset[BCM56780_A0_HNA_
     bcmpkt_ipfix_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ipfix_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ipfix_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ipfix_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_ipfix_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ipfix_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_ipfix_t_field_data,
 };
 
 
@@ -4993,7 +4993,7 @@ static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, ui
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ipv4_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ipv4_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FID_COUNT] = {
     bcmpkt_ipv4_t_da_get,
     bcmpkt_ipv4_t_flags_frag_offset_get,
     bcmpkt_ipv4_t_hdr_checksum_get,
@@ -5007,7 +5007,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ipv4_t_fget[BCM56780_A0_HNA_6
     bcmpkt_ipv4_t_version_hdr_len_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ipv4_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ipv4_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FID_COUNT] = {
     bcmpkt_ipv4_t_da_set,
     bcmpkt_ipv4_t_flags_frag_offset_set,
     bcmpkt_ipv4_t_hdr_checksum_set,
@@ -5021,13 +5021,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ipv4_t_fset[BCM56780_A0_HNA_6
     bcmpkt_ipv4_t_version_hdr_len_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ipv4_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ipv4_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ipv4_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_ipv4_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ipv4_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_ipv4_t_field_data,
 };
 
 
@@ -5153,7 +5153,7 @@ static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t v
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ipv6_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_ipv6_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FID_COUNT] = {
     bcmpkt_ipv6_t_da_get,
     bcmpkt_ipv6_t_flow_label_get,
     bcmpkt_ipv6_t_hop_limit_get,
@@ -5164,7 +5164,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ipv6_t_fget[BCM56780_A0_HNA_6
     bcmpkt_ipv6_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ipv6_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_ipv6_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FID_COUNT] = {
     bcmpkt_ipv6_t_da_set,
     bcmpkt_ipv6_t_flow_label_set,
     bcmpkt_ipv6_t_hop_limit_set,
@@ -5175,13 +5175,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ipv6_t_fset[BCM56780_A0_HNA_6
     bcmpkt_ipv6_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ipv6_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_ipv6_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ipv6_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_ipv6_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_ipv6_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_ipv6_t_field_data,
 };
 
 
@@ -5217,23 +5217,23 @@ static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_l2_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_l2_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_FID_COUNT] = {
     bcmpkt_l2_t_macda_get,
     bcmpkt_l2_t_macsa_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_l2_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_l2_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_FID_COUNT] = {
     bcmpkt_l2_t_macda_set,
     bcmpkt_l2_t_macsa_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_l2_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_l2_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_l2_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_l2_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_l2_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_l2_t_field_data,
 };
 
 
@@ -5253,21 +5253,21 @@ static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
     bcmpkt_mirror_erspan_sn_t_seq_num_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
     bcmpkt_mirror_erspan_sn_t_seq_num_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_field_data,
 };
 
 
@@ -5287,21 +5287,21 @@ static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, u
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
     bcmpkt_mirror_transport_t_data_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
     bcmpkt_mirror_transport_t_data_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_field_data,
 };
 
 
@@ -5365,27 +5365,27 @@ static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
     bcmpkt_mpls_ach_t_channel_type_get,
     bcmpkt_mpls_ach_t_cw_type_get,
     bcmpkt_mpls_ach_t_reserved_get,
     bcmpkt_mpls_ach_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
     bcmpkt_mpls_ach_t_channel_type_set,
     bcmpkt_mpls_ach_t_cw_type_set,
     bcmpkt_mpls_ach_t_reserved_set,
     bcmpkt_mpls_ach_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_field_data,
 };
 
 
@@ -5405,21 +5405,21 @@ static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
     bcmpkt_mpls_bv_t_value_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
     bcmpkt_mpls_bv_t_value_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_BV_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_field_data,
 };
 
 
@@ -5468,25 +5468,25 @@ static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
     bcmpkt_mpls_cw_t_cw_type_get,
     bcmpkt_mpls_cw_t_reserved_get,
     bcmpkt_mpls_cw_t_seq_number_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
     bcmpkt_mpls_cw_t_cw_type_set,
     bcmpkt_mpls_cw_t_reserved_set,
     bcmpkt_mpls_cw_t_seq_number_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_CW_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_field_data,
 };
 
 
@@ -5550,27 +5550,27 @@ static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_mpls_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_mpls_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_FID_COUNT] = {
     bcmpkt_mpls_t_bos_get,
     bcmpkt_mpls_t_exp_get,
     bcmpkt_mpls_t_label_get,
     bcmpkt_mpls_t_ttl_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_mpls_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_mpls_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_FID_COUNT] = {
     bcmpkt_mpls_t_bos_set,
     bcmpkt_mpls_t_exp_set,
     bcmpkt_mpls_t_label_set,
     bcmpkt_mpls_t_ttl_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_mpls_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_mpls_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_mpls_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_mpls_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_mpls_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_MPLS_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_mpls_t_field_data,
 };
 
 
@@ -5787,7 +5787,7 @@ static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_p_1588_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_p_1588_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FID_COUNT] = {
     bcmpkt_p_1588_t_cntrl_get,
     bcmpkt_p_1588_t_correction_get,
     bcmpkt_p_1588_t_domain_nb_get,
@@ -5804,7 +5804,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_p_1588_t_fget[BCM56780_A0_HNA
     bcmpkt_p_1588_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_p_1588_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_p_1588_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FID_COUNT] = {
     bcmpkt_p_1588_t_cntrl_set,
     bcmpkt_p_1588_t_correction_set,
     bcmpkt_p_1588_t_domain_nb_set,
@@ -5821,13 +5821,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_p_1588_t_fset[BCM56780_A0_HNA
     bcmpkt_p_1588_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_p_1588_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_p_1588_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_p_1588_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_p_1588_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_p_1588_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_P_1588_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_p_1588_t_field_data,
 };
 
 
@@ -5877,25 +5877,25 @@ static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uin
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
     bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
     bcmpkt_prog_ext_hdr_t_next_header_get,
     bcmpkt_prog_ext_hdr_t_option_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
     bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
     bcmpkt_prog_ext_hdr_t_next_header_set,
     bcmpkt_prog_ext_hdr_t_option_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_field_data,
 };
 
 
@@ -5991,7 +5991,7 @@ static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uin
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
     bcmpkt_psamp_0_t_flowset_get,
     bcmpkt_psamp_0_t_length_get,
     bcmpkt_psamp_0_t_next_hop_index_get,
@@ -6000,7 +6000,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_fget[BCM56780_A0_HN
     bcmpkt_psamp_0_t_template_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
     bcmpkt_psamp_0_t_flowset_set,
     bcmpkt_psamp_0_t_length_set,
     bcmpkt_psamp_0_t_next_hop_index_set,
@@ -6009,13 +6009,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_fset[BCM56780_A0_HN
     bcmpkt_psamp_0_t_template_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_0_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_field_data,
 };
 
 
@@ -6124,7 +6124,7 @@ static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, u
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
     bcmpkt_psamp_1_t_dlb_id_get,
     bcmpkt_psamp_1_t_egress_port_get,
     bcmpkt_psamp_1_t_epoch_get,
@@ -6134,7 +6134,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_fget[BCM56780_A0_HN
     bcmpkt_psamp_1_t_variable_flag_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
     bcmpkt_psamp_1_t_dlb_id_set,
     bcmpkt_psamp_1_t_egress_port_set,
     bcmpkt_psamp_1_t_epoch_set,
@@ -6144,13 +6144,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_fset[BCM56780_A0_HN
     bcmpkt_psamp_1_t_variable_flag_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_1_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_field_data,
 };
 
 
@@ -6262,7 +6262,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, i
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
     bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
     bcmpkt_psamp_mirror_on_drop_0_t_length_get,
@@ -6272,7 +6272,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_fget
     bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
     bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
     bcmpkt_psamp_mirror_on_drop_0_t_length_set,
@@ -6282,13 +6282,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_fset
     bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_field_data,
 };
 
 
@@ -6397,7 +6397,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *d
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
     bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
     bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get,
@@ -6407,7 +6407,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_fget
     bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
     bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
     bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set,
@@ -6417,13 +6417,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_fset
     bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_field_data,
 };
 
 
@@ -6566,7 +6566,7 @@ static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_rarp_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_rarp_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_FID_COUNT] = {
     bcmpkt_rarp_t_hardware_len_get,
     bcmpkt_rarp_t_hardware_type_get,
     bcmpkt_rarp_t_operation_get,
@@ -6578,7 +6578,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_rarp_t_fget[BCM56780_A0_HNA_6
     bcmpkt_rarp_t_target_ip_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_rarp_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_rarp_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_FID_COUNT] = {
     bcmpkt_rarp_t_hardware_len_set,
     bcmpkt_rarp_t_hardware_type_set,
     bcmpkt_rarp_t_operation_set,
@@ -6590,13 +6590,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_rarp_t_fset[BCM56780_A0_HNA_6
     bcmpkt_rarp_t_target_ip_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rarp_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rarp_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_rarp_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_rarp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_rarp_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_rarp_t_field_data,
 };
 
 
@@ -6676,7 +6676,7 @@ static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, u
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_routing_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_routing_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_FID_COUNT] = {
     bcmpkt_routing_t_data_get,
     bcmpkt_routing_t_hdr_ext_len_get,
     bcmpkt_routing_t_next_header_get,
@@ -6684,7 +6684,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_routing_t_fget[BCM56780_A0_HN
     bcmpkt_routing_t_segments_left_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_routing_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_routing_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_FID_COUNT] = {
     bcmpkt_routing_t_data_set,
     bcmpkt_routing_t_hdr_ext_len_set,
     bcmpkt_routing_t_next_header_set,
@@ -6692,13 +6692,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_routing_t_fset[BCM56780_A0_HN
     bcmpkt_routing_t_segments_left_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_routing_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_routing_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_routing_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_routing_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_routing_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_ROUTING_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_routing_t_field_data,
 };
 
 
@@ -6732,23 +6732,23 @@ static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_rspan_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_rspan_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_FID_COUNT] = {
     bcmpkt_rspan_t_tag_get,
     bcmpkt_rspan_t_tpid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_rspan_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_rspan_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_FID_COUNT] = {
     bcmpkt_rspan_t_tag_set,
     bcmpkt_rspan_t_tpid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rspan_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_rspan_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_rspan_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_rspan_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_rspan_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_RSPAN_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_rspan_t_field_data,
 };
 
 
@@ -6798,25 +6798,25 @@ static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, ui
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
     bcmpkt_sflow_shim_0_t_sys_destination_get,
     bcmpkt_sflow_shim_0_t_sys_source_get,
     bcmpkt_sflow_shim_0_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
     bcmpkt_sflow_shim_0_t_sys_destination_set,
     bcmpkt_sflow_shim_0_t_sys_source_set,
     bcmpkt_sflow_shim_0_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_field_data,
 };
 
 
@@ -6940,7 +6940,7 @@ static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
     bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
     bcmpkt_sflow_shim_1_t_flag_discarded_get,
     bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
@@ -6951,7 +6951,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_fget[BCM56780_
     bcmpkt_sflow_shim_1_t_sys_opcode_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
     bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
     bcmpkt_sflow_shim_1_t_flag_discarded_set,
     bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
@@ -6962,13 +6962,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_fset[BCM56780_
     bcmpkt_sflow_shim_1_t_sys_opcode_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_field_data,
 };
 
 
@@ -7003,23 +7003,23 @@ static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int prof
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
     bcmpkt_sflow_shim_2_t_sequence_num_get,
     bcmpkt_sflow_shim_2_t_user_meta_data_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
     bcmpkt_sflow_shim_2_t_sequence_num_set,
     bcmpkt_sflow_shim_2_t_user_meta_data_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_field_data,
 };
 
 
@@ -7054,23 +7054,23 @@ static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint3
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
     bcmpkt_snap_llc_t_length_get,
     bcmpkt_snap_llc_t_snap_llc_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
     bcmpkt_snap_llc_t_length_set,
     bcmpkt_snap_llc_t_snap_llc_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_field_data,
 };
 
 
@@ -7104,23 +7104,23 @@ static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_svtag_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_svtag_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_FID_COUNT] = {
     bcmpkt_svtag_t_data_lwr_get,
     bcmpkt_svtag_t_data_upr_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_svtag_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_svtag_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_FID_COUNT] = {
     bcmpkt_svtag_t_data_lwr_set,
     bcmpkt_svtag_t_data_upr_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_svtag_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_svtag_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_svtag_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_svtag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_svtag_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_SVTAG_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_svtag_t_field_data,
 };
 
 
@@ -7154,23 +7154,23 @@ static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profil
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_first_4bytes_t_dst_port_get,
     bcmpkt_tcp_first_4bytes_t_src_port_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_first_4bytes_t_dst_port_set,
     bcmpkt_tcp_first_4bytes_t_src_port_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_field_data,
 };
 
 
@@ -7266,7 +7266,7 @@ static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profil
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_last_16bytes_t_ack_num_get,
     bcmpkt_tcp_last_16bytes_t_checksum_get,
     bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
@@ -7275,7 +7275,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_fget[BCM56
     bcmpkt_tcp_last_16bytes_t_win_size_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_last_16bytes_t_ack_num_set,
     bcmpkt_tcp_last_16bytes_t_checksum_set,
     bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
@@ -7284,13 +7284,13 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_fset[BCM56
     bcmpkt_tcp_last_16bytes_t_win_size_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_field_data,
 };
 
 
@@ -7354,27 +7354,27 @@ static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_udp_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_udp_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_FID_COUNT] = {
     bcmpkt_udp_t_checksum_get,
     bcmpkt_udp_t_dst_port_get,
     bcmpkt_udp_t_src_port_get,
     bcmpkt_udp_t_udp_length_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_udp_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_udp_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_FID_COUNT] = {
     bcmpkt_udp_t_checksum_set,
     bcmpkt_udp_t_dst_port_set,
     bcmpkt_udp_t_src_port_set,
     bcmpkt_udp_t_udp_length_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_udp_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_udp_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_udp_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_udp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_udp_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_udp_t_field_data,
 };
 
 
@@ -7410,23 +7410,23 @@ static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
     bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
     bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
     bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
     bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_field_data,
 };
 
 
@@ -7446,21 +7446,21 @@ static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
     bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
     bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_field_data,
 };
 
 
@@ -7510,25 +7510,25 @@ static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
     bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
     bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
     bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
     bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
     bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
     bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_field_data,
 };
 
 
@@ -7592,27 +7592,27 @@ static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_vlan_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_vlan_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_FID_COUNT] = {
     bcmpkt_vlan_t_cfi_get,
     bcmpkt_vlan_t_pcp_get,
     bcmpkt_vlan_t_tpid_get,
     bcmpkt_vlan_t_vid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_vlan_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_vlan_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_FID_COUNT] = {
     bcmpkt_vlan_t_cfi_set,
     bcmpkt_vlan_t_pcp_set,
     bcmpkt_vlan_t_tpid_set,
     bcmpkt_vlan_t_vid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_vlan_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_vlan_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_vlan_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_vlan_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_vlan_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_vlan_t_field_data,
 };
 
 
@@ -7647,23 +7647,23 @@ static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_vntag_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_vntag_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_FID_COUNT] = {
     bcmpkt_vntag_t_tag_get,
     bcmpkt_vntag_t_tpid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_vntag_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_vntag_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_FID_COUNT] = {
     bcmpkt_vntag_t_tag_set,
     bcmpkt_vntag_t_tpid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_vntag_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_vntag_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_vntag_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_vntag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_vntag_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VNTAG_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_vntag_t_field_data,
 };
 
 
@@ -7713,25 +7713,25 @@ static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_vxlan_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_vxlan_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FID_COUNT] = {
     bcmpkt_vxlan_t_flags_reserved_1_get,
     bcmpkt_vxlan_t_reserved2_get,
     bcmpkt_vxlan_t_vn_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_vxlan_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_vxlan_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FID_COUNT] = {
     bcmpkt_vxlan_t_flags_reserved_1_set,
     bcmpkt_vxlan_t_reserved2_set,
     bcmpkt_vxlan_t_vn_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_vxlan_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_vxlan_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_vxlan_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_vxlan_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_vxlan_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_vxlan_t_field_data,
 };
 
 
@@ -7843,7 +7843,7 @@ static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t v
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_wesp_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_30_6_0_wesp_t_fget[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FID_COUNT] = {
     bcmpkt_wesp_t_flags_get,
     bcmpkt_wesp_t_header_len_get,
     bcmpkt_wesp_t_next_header_get,
@@ -7853,7 +7853,7 @@ bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_wesp_t_fget[BCM56780_A0_HNA_6
     bcmpkt_wesp_t_wesp_iv_get,
 };
 
-bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_wesp_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_30_6_0_wesp_t_fset[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FID_COUNT] = {
     bcmpkt_wesp_t_flags_set,
     bcmpkt_wesp_t_header_len_set,
     bcmpkt_wesp_t_next_header_set,
@@ -7863,508 +7863,508 @@ bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_wesp_t_fset[BCM56780_A0_HNA_6
     bcmpkt_wesp_t_wesp_iv_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_wesp_t_field_data[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_30_6_0_wesp_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_wesp_t_field_info = {
-    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FID_COUNT,
-    .info = bcm56780_a0_hna_6_5_29_2_1_wesp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_30_6_0_wesp_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_WESP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_30_6_0_wesp_t_field_data,
 };
 
-static bcmpkt_flex_pmd_info_t bcm56780_a0_hna_6_5_29_2_1_flexhdr_info_list[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_COUNT] = {
+static bcmpkt_flex_pmd_info_t bcm56780_a0_hna_6_5_30_6_0_flexhdr_info_list[BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_COUNT] = {
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_arp_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_arp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_arp_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_arp_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_arp_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_arp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_authen_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_authen_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_authen_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_authen_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_authen_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_authen_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_bfd_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_bfd_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_bfd_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_bfd_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_bfd_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_bfd_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_cntag_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_cntag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_cntag_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_cntag_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_cntag_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_cntag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_cpu_composites_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_cpu_composites_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_dest_option_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_dest_option_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_dest_option_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_dest_option_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_dest_option_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_dest_option_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ep_nih_header_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_erspan3_fixed_hdr_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_erspan3_subhdr_5_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_esp_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_esp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_esp_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_esp_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_esp_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_esp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_etag_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_etag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_etag_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_etag_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_etag_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_etag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ethertype_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_ethertype_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ethertype_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ethertype_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ethertype_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ethertype_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_frag_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_frag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_frag_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_frag_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_frag_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_frag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_generic_loopback_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_gpe_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_gpe_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_gpe_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_gpe_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_gpe_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_gpe_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_gre_chksum_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_gre_key_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_gre_key_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_gre_key_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_gre_key_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_gre_key_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_gre_key_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_gre_rout_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_gre_seq_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_gre_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_gre_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_gre_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_gre_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_gre_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_gre_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_hop_by_hop_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_icmp_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_icmp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_icmp_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_icmp_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_icmp_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_icmp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_a_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_0_b_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_2_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_flex_md_3_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_header_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_md_base_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ifa_metadata_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_igmp_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_igmp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_igmp_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_igmp_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_igmp_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_igmp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ipfix_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_ipfix_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ipfix_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ipfix_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ipfix_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ipfix_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ipv4_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_ipv4_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ipv4_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ipv4_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ipv4_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ipv4_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ipv6_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_ipv6_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ipv6_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ipv6_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_ipv6_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_ipv6_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_l2_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_l2_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_l2_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_l2_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_l2_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_l2_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_mirror_erspan_sn_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_mirror_transport_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_mpls_ach_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_mpls_bv_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_mpls_cw_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_mpls_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_mpls_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_mpls_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_mpls_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_mpls_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_mpls_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_p_1588_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_p_1588_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_p_1588_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_p_1588_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_p_1588_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_p_1588_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_prog_ext_hdr_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_psamp_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_psamp_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_psamp_mirror_on_drop_3_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_rarp_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_rarp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_rarp_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_rarp_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_rarp_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_rarp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_routing_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_routing_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_routing_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_routing_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_routing_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_routing_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_rspan_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_rspan_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_rspan_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_rspan_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_rspan_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_rspan_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_sflow_shim_2_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_snap_llc_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_svtag_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_svtag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_svtag_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_svtag_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_svtag_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_svtag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_tcp_first_4bytes_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_tcp_last_16bytes_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_udp_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_udp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_udp_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_udp_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_udp_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_udp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_unknown_l3_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_unknown_l4_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_unknown_l5_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_vlan_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_vlan_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_vlan_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_vlan_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_vlan_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_vlan_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_vntag_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_vntag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_vntag_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_vntag_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_vntag_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_vntag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_vxlan_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_vxlan_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_vxlan_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_vxlan_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_vxlan_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_vxlan_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_wesp_t_field_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_wesp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_wesp_t_fget,
-        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_wesp_t_fset,
+        .flex_fget = bcm56780_a0_hna_6_5_30_6_0_wesp_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_30_6_0_wesp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_info,
-        .reasons_info = &bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reasons_info,
+        .field_info = &bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_field_info,
+        .reasons_info = &bcm56780_a0_hna_6_5_30_6_0_rxpmd_flex_reasons_info,
         .flex_common_fget = bcm56780_a0_rxpmd_flex_fget,
         .flex_common_fset = bcm56780_a0_rxpmd_flex_fset,
     },
 };
 
-static shr_enum_map_t bcm56780_a0_hna_6_5_29_2_1_flexhdr_id_map[] = {
-    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_NAME_MAP_INIT
+static shr_enum_map_t bcm56780_a0_hna_6_5_30_6_0_flexhdr_id_map[] = {
+    BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
 };
 
-shr_enum_map_t * bcm56780_a0_hna_6_5_29_2_1_flexhdr_map_get(void)
+shr_enum_map_t * bcm56780_a0_hna_6_5_30_6_0_flexhdr_map_get(void)
 {
-    return bcm56780_a0_hna_6_5_29_2_1_flexhdr_id_map;
+    return bcm56780_a0_hna_6_5_30_6_0_flexhdr_id_map;
 }
 
-bcmpkt_flex_pmd_info_t * bcm56780_a0_hna_6_5_29_2_1_flex_pmd_info_get(uint32_t hid)
+bcmpkt_flex_pmd_info_t * bcm56780_a0_hna_6_5_30_6_0_flex_pmd_info_get(uint32_t hid)
 {
-    if (hid >= BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_COUNT) {
+    if (hid >= BCM56780_A0_HNA_6_5_30_6_0_BCMPKT_FLEXHDR_COUNT) {
         return NULL;
     }
 
-    return &bcm56780_a0_hna_6_5_29_2_1_flexhdr_info_list[hid];
+    return &bcm56780_a0_hna_6_5_30_6_0_flexhdr_info_list[hid];
 }
 
-int bcm56780_a0_hna_6_5_29_2_1_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+int bcm56780_a0_hna_6_5_30_6_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
     14,
     -1,
     -1,
     66,
-};
\ No newline at end of file
+};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id.c
deleted file mode 100644
index 9830ad007bfb..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id.c
+++ /dev/null
@@ -1,2508 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56780_a0_ina_2_6_11_0_sf_match_id_info.yml
- * for device bcm56780_a0 and variant ina_2_6_11_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-#include <bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id_defs.h>
-
-
-static bcmpkt_rxpmd_match_id_db_t
-bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_db[BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_COUNT] = {
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_ETAG",
-        .match        = 0x80,
-        .match_mask   = 0xc0,
-        .match_maxbit = 31,
-        .match_minbit = 24,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 42,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 31,
-        .match_minbit = 24,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 42,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 31,
-        .match_minbit = 24,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 42,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 31,
-        .match_minbit = 24,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 42,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 31,
-        .match_minbit = 24,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 42,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0xff,
-        .match_maxbit = 31,
-        .match_minbit = 24,
-        .maxbit       = 7,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 42,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 31,
-        .match_minbit = 24,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 42,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 31,
-        .match_minbit = 24,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 42,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_VNTAG",
-        .match        = 0x40,
-        .match_mask   = 0xc0,
-        .match_maxbit = 31,
-        .match_minbit = 24,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 42,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
-        .match        = 0x1000,
-        .match_mask   = 0x3806,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x80,
-        .match_mask   = 0x1a0,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x418,
-        .match_mask   = 0x638,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
-        .match        = 0x200,
-        .match_mask   = 0x626,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x180,
-        .match_mask   = 0x1a0,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x3,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x600,
-        .match_mask   = 0x620,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x3,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
-        .match        = 0x1004,
-        .match_mask   = 0x3826,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
-        .match        = 0x6,
-        .match_mask   = 0x26,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x3,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x206,
-        .match_mask   = 0x626,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
-        .match        = 0x806,
-        .match_mask   = 0x3826,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
-        .match        = 0x100,
-        .match_mask   = 0x1a0,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
-        .match        = 0x46,
-        .match_mask   = 0x66,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
-        .match        = 0x1800,
-        .match_mask   = 0x3806,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
-        .match        = 0x410,
-        .match_mask   = 0x638,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
-        .match        = 0x10,
-        .match_mask   = 0x38,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
-        .match        = 0x18,
-        .match_mask   = 0x38,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
-        .match        = 0x22,
-        .match_mask   = 0x22,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
-        .match        = 0x24,
-        .match_mask   = 0x24,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
-        .match        = 0x28,
-        .match_mask   = 0x28,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
-        .match        = 0x30,
-        .match_mask   = 0x30,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
-        .match        = 0xa0,
-        .match_mask   = 0xa0,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 7,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
-        .match        = 0x120,
-        .match_mask   = 0x120,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 8,
-        .minbit       = 8,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
-        .match        = 0x220,
-        .match_mask   = 0x220,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 9,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3fff,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 13,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
-        .match        = 0x800,
-        .match_mask   = 0x3806,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x2,
-        .match_mask   = 0x26,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x42,
-        .match_mask   = 0x66,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
-        .match        = 0x4,
-        .match_mask   = 0x26,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x8,
-        .match_mask   = 0x38,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x1804,
-        .match_mask   = 0x3826,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
-        .match        = 0x804,
-        .match_mask   = 0x3826,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 62,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
-        .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
-        .match        = 0x2,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x2,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
-        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
-        .match        = 0x1,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
-        .name         = "EGRESS_PKT_SYS_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG",
-        .match        = 0x80,
-        .match_mask   = 0xc0,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 14,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0xff,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 7,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 14,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG",
-        .match        = 0x40,
-        .match_mask   = 0xc0,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 14,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
-        .match        = 0x1000,
-        .match_mask   = 0x3806,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x80,
-        .match_mask   = 0x1a0,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x418,
-        .match_mask   = 0x638,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
-        .match        = 0x200,
-        .match_mask   = 0x626,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x180,
-        .match_mask   = 0x1a0,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x3,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x600,
-        .match_mask   = 0x620,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x3,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
-        .match        = 0x1004,
-        .match_mask   = 0x3826,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
-        .match        = 0x6,
-        .match_mask   = 0x26,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x3,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x206,
-        .match_mask   = 0x626,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
-        .match        = 0x806,
-        .match_mask   = 0x3826,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
-        .match        = 0x100,
-        .match_mask   = 0x1a0,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
-        .match        = 0x46,
-        .match_mask   = 0x66,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
-        .match        = 0x1800,
-        .match_mask   = 0x3806,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
-        .match        = 0x410,
-        .match_mask   = 0x638,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
-        .match        = 0x10,
-        .match_mask   = 0x38,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
-        .match        = 0x18,
-        .match_mask   = 0x38,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
-        .match        = 0x22,
-        .match_mask   = 0x22,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
-        .match        = 0x24,
-        .match_mask   = 0x24,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
-        .match        = 0x28,
-        .match_mask   = 0x28,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
-        .match        = 0x30,
-        .match_mask   = 0x30,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
-        .match        = 0xa0,
-        .match_mask   = 0xa0,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 7,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
-        .match        = 0x120,
-        .match_mask   = 0x120,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 8,
-        .minbit       = 8,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
-        .match        = 0x220,
-        .match_mask   = 0x220,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3fff,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
-        .match        = 0x800,
-        .match_mask   = 0x3806,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x2,
-        .match_mask   = 0x26,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x42,
-        .match_mask   = 0x66,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
-        .match        = 0x4,
-        .match_mask   = 0x26,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x8,
-        .match_mask   = 0x38,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x1804,
-        .match_mask   = 0x3826,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
-        .match        = 0x804,
-        .match_mask   = 0x3826,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 34,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_ETAG",
-        .match        = 0x80,
-        .match_mask   = 0xc0,
-        .match_maxbit = 31,
-        .match_minbit = 24,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 31,
-        .pminbit      = 24,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 31,
-        .match_minbit = 24,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 31,
-        .pminbit      = 24,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 31,
-        .match_minbit = 24,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 31,
-        .pminbit      = 24,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0xff,
-        .match_maxbit = 31,
-        .match_minbit = 24,
-        .maxbit       = 7,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 31,
-        .pminbit      = 24,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 31,
-        .match_minbit = 24,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 31,
-        .pminbit      = 24,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 31,
-        .match_minbit = 24,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 31,
-        .pminbit      = 24,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_VNTAG",
-        .match        = 0x40,
-        .match_mask   = 0xc0,
-        .match_maxbit = 31,
-        .match_minbit = 24,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 31,
-        .pminbit      = 24,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
-        .match        = 0x1000,
-        .match_mask   = 0x3806,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 45,
-        .pminbit      = 32,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x80,
-        .match_mask   = 0x1a0,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 45,
-        .pminbit      = 32,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x418,
-        .match_mask   = 0x638,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 45,
-        .pminbit      = 32,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 45,
-        .pminbit      = 32,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
-        .match        = 0x200,
-        .match_mask   = 0x626,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 45,
-        .pminbit      = 32,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 45,
-        .pminbit      = 32,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x180,
-        .match_mask   = 0x1a0,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x3,
-        .pmaxbit      = 45,
-        .pminbit      = 32,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x600,
-        .match_mask   = 0x620,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x3,
-        .pmaxbit      = 45,
-        .pminbit      = 32,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
-        .match        = 0x1800,
-        .match_mask   = 0x3806,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 45,
-        .pminbit      = 32,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
-        .match        = 0x410,
-        .match_mask   = 0x638,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 45,
-        .pminbit      = 32,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
-        .match        = 0x10,
-        .match_mask   = 0x38,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 45,
-        .pminbit      = 32,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
-        .match        = 0x18,
-        .match_mask   = 0x38,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 45,
-        .pminbit      = 32,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3fff,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 13,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 45,
-        .pminbit      = 32,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 45,
-        .pminbit      = 32,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
-        .match        = 0x800,
-        .match_mask   = 0x3806,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 45,
-        .pminbit      = 32,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x2,
-        .match_mask   = 0x26,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 45,
-        .pminbit      = 32,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x42,
-        .match_mask   = 0x66,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 45,
-        .pminbit      = 32,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
-        .match        = 0x4,
-        .match_mask   = 0x26,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 45,
-        .pminbit      = 32,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x8,
-        .match_mask   = 0x38,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 45,
-        .pminbit      = 32,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 45,
-        .pminbit      = 32,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x1804,
-        .match_mask   = 0x3826,
-        .match_maxbit = 45,
-        .match_minbit = 32,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 45,
-        .pminbit      = 32,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_ETAG",
-        .match        = 0x80,
-        .match_mask   = 0xc0,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x2,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0",
-        .match        = 0x8,
-        .match_mask   = 0x8,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0xff,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 7,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
-        .match        = 0x10,
-        .match_mask   = 0x10,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_VNTAG",
-        .match        = 0x40,
-        .match_mask   = 0xc0,
-        .match_maxbit = 9,
-        .match_minbit = 2,
-        .maxbit       = 7,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 2,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
-        .match        = 0x1000,
-        .match_mask   = 0x3806,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
-        .match        = 0x80,
-        .match_mask   = 0x1a0,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x418,
-        .match_mask   = 0x638,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
-        .match        = 0x2800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x5,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
-        .match        = 0x200,
-        .match_mask   = 0x626,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0x180,
-        .match_mask   = 0x1a0,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x3,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
-        .match        = 0x600,
-        .match_mask   = 0x620,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x3,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
-        .match        = 0x1004,
-        .match_mask   = 0x3826,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x2,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
-        .match        = 0x6,
-        .match_mask   = 0x26,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x3,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x206,
-        .match_mask   = 0x626,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
-        .match        = 0x806,
-        .match_mask   = 0x3826,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
-        .match        = 0x100,
-        .match_mask   = 0x1a0,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 8,
-        .minbit       = 7,
-        .value        = 0x2,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
-        .match        = 0x46,
-        .match_mask   = 0x66,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
-        .match        = 0x1800,
-        .match_mask   = 0x3806,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER",
-        .match        = 0x3800,
-        .match_mask   = 0x3800,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x7,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
-        .match        = 0x410,
-        .match_mask   = 0x638,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 10,
-        .minbit       = 9,
-        .value        = 0x2,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
-        .match        = 0x10,
-        .match_mask   = 0x38,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
-        .match        = 0x18,
-        .match_mask   = 0x38,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
-        .match        = 0x20,
-        .match_mask   = 0x20,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 5,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
-        .match        = 0x22,
-        .match_mask   = 0x22,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
-        .match        = 0x24,
-        .match_mask   = 0x24,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
-        .match        = 0x28,
-        .match_mask   = 0x28,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
-        .match        = 0x30,
-        .match_mask   = 0x30,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 4,
-        .minbit       = 4,
-        .value        = 0x1,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
-        .match        = 0xa0,
-        .match_mask   = 0xa0,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 7,
-        .minbit       = 7,
-        .value        = 0x1,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
-        .match        = 0x120,
-        .match_mask   = 0x120,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 8,
-        .minbit       = 8,
-        .value        = 0x1,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
-        .match        = 0x220,
-        .match_mask   = 0x220,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 9,
-        .minbit       = 9,
-        .value        = 0x1,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3fff,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
-        .match        = 0x3000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x6,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
-        .match        = 0x800,
-        .match_mask   = 0x3806,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x2,
-        .match_mask   = 0x26,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x42,
-        .match_mask   = 0x66,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 6,
-        .minbit       = 6,
-        .value        = 0x1,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
-        .match        = 0x4,
-        .match_mask   = 0x26,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x8,
-        .match_mask   = 0x38,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x2000,
-        .match_mask   = 0x3800,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x4,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x1804,
-        .match_mask   = 0x3826,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x3,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
-        .match        = 0x804,
-        .match_mask   = 0x3826,
-        .match_maxbit = 23,
-        .match_minbit = 10,
-        .maxbit       = 13,
-        .minbit       = 11,
-        .value        = 0x1,
-        .pmaxbit      = 23,
-        .pminbit      = 10,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
-        .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
-        .match        = 0x2,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x2,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
-        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
-        .match        = 0x1,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
-        .name         = "INGRESS_PKT_SYS_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x3,
-        .match_maxbit = 1,
-        .match_minbit = 0,
-        .maxbit       = 1,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 1,
-        .pminbit      = 0,
-
-    },
-};
-
-static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_db_info = {
-    .num_entries = 175,
-    .db = bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_db
-};
-bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_db_info_get(void) {
-    return &bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_db_info;
-}
-
-static shr_enum_map_t bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_map[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_map_info = {
-    .num_entries = 175,
-    .map = bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_map
-};
-
-bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_map_info_get(void) {
-    return &bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_map_info;
-}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_pkt_flexhdr.c
deleted file mode 100644
index 7ec04020eda1..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_pkt_flexhdr.c
+++ /dev/null
@@ -1,8131 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml
- * for device bcm56780_a0 and variant ina_2_6_11_0.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#include <sal/sal_types.h>
-#include <shr/shr_error.h>
-#include <bcmpkt/bcmpkt_flexhdr.h>
-#include <bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h>
-#include <bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr.h>
-#include <bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr_data.h>
-#include <bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_flex_data.h>
-
-#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
-#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
-#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
-#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
-
-static void bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
-{
-    uint32_t *reason = data + 0;
-
-    if (reason[13] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
-    }
-    if (reason[13] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
-    }
-    if (reason[13] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
-    }
-    if (reason[13] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD);
-    }
-    if (reason[13] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST);
-    }
-    if (reason[13] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
-    }
-    if (reason[13] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
-    }
-    if (reason[13] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
-    }
-    if (reason[13] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
-    }
-    if (reason[13] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
-    }
-    if (reason[13] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
-    }
-    if (reason[13] & (0x1 << 14)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
-    }
-    if (reason[13] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 16)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
-    }
-    if (reason[13] & (0x1 << 17)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
-    }
-    if (reason[13] & (0x1 << 18)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
-    }
-    if (reason[13] & (0x1 << 19)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
-    }
-    if (reason[13] & (0x1 << 20)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
-    }
-    if (reason[13] & (0x1 << 21)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
-    }
-    if (reason[13] & (0x1 << 22)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
-    }
-    if (reason[13] & (0x1 << 23)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
-    }
-    if (reason[13] & (0x1 << 24)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
-    }
-    if (reason[13] & (0x1 << 25)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
-    }
-    if (reason[13] & (0x1 << 26)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
-    }
-    if (reason[13] & (0x1 << 27)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
-    }
-    if (reason[13] & (0x1 << 28)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
-    }
-    if (reason[13] & (0x1 << 29)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
-    }
-    if (reason[13] & (0x1 << 30)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
-    }
-    if (reason[13] & (0x1 << 31)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
-    }
-    if (reason[12] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
-    }
-    if (reason[12] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
-    }
-    if (reason[12] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
-    }
-    if (reason[12] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
-    }
-    if (reason[12] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
-    }
-    if (reason[12] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
-    }
-    if (reason[12] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
-    }
-    if (reason[12] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
-    }
-    if (reason[12] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY);
-    }
-    if (reason[12] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED);
-    }
-    if (reason[12] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED);
-    }
-    if (reason[12] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR);
-    }
-    if (reason[12] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU);
-    }
-    if (reason[12] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
-    }
-}
-
-static void bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
-{
-    uint32_t *reason = data + 0;
-
-    reason[13] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
-        reason[13] |= (0x1 << 0);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
-        reason[13] |= (0x1 << 1);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
-        reason[13] |= (0x1 << 2);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) {
-        reason[13] |= (0x1 << 3);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) {
-        reason[13] |= (0x1 << 4);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 5);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
-        reason[13] |= (0x1 << 6);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 7);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 8);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
-        reason[13] |= (0x1 << 9);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
-        reason[13] |= (0x1 << 10);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
-        reason[13] |= (0x1 << 11);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
-        reason[13] |= (0x1 << 12);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
-        reason[13] |= (0x1 << 13);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
-        reason[13] |= (0x1 << 14);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 15);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
-        reason[13] |= (0x1 << 16);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
-        reason[13] |= (0x1 << 17);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
-        reason[13] |= (0x1 << 18);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
-        reason[13] |= (0x1 << 19);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
-        reason[13] |= (0x1 << 20);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
-        reason[13] |= (0x1 << 21);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
-        reason[13] |= (0x1 << 22);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
-        reason[13] |= (0x1 << 23);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
-        reason[13] |= (0x1 << 24);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
-        reason[13] |= (0x1 << 25);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
-        reason[13] |= (0x1 << 26);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
-        reason[13] |= (0x1 << 27);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
-        reason[13] |= (0x1 << 28);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
-        reason[13] |= (0x1 << 29);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
-        reason[13] |= (0x1 << 30);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
-        reason[13] |= (0x1 << 31);
-    }
-    reason[12] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
-        reason[12] |= (0x1 << 0);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
-        reason[12] |= (0x1 << 1);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
-        reason[12] |= (0x1 << 2);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
-        reason[12] |= (0x1 << 3);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
-        reason[12] |= (0x1 << 4);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
-        reason[12] |= (0x1 << 5);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
-        reason[12] |= (0x1 << 6);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
-        reason[12] |= (0x1 << 7);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY)) {
-        reason[12] |= (0x1 << 8);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) {
-        reason[12] |= (0x1 << 9);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) {
-        reason[12] |= (0x1 << 10);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) {
-        reason[12] |= (0x1 << 12);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) {
-        reason[12] |= (0x1 << 13);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
-        reason[12] |= (0x1 << 15);
-    }
-}
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_rxpmd_flex_field_data[] = {
-    {
-        .name = "DLB_ECMP_DESTINATION_15_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { -1, -1 }, /* Profile 4. */
-            { -1, -1 }, /* Profile 5. */
-            { -1, -1 }, /* Profile 6. */
-            { -1, -1 }, /* Profile 7. */
-            { 80, 95 }, /* Profile 8. */
-            { 80, 95 }, /* Profile 9. */
-            { 80, 95 }, /* Profile 10. */
-            { 80, 95 }, /* Profile 11. */
-            { 80, 95 }, /* Profile 12. */
-            { 80, 95 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "DROP_CODE_15_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 48, 63 }, /* Profile 2. */
-            { 48, 63 }, /* Profile 3. */
-            { -1, -1 }, /* Profile 4. */
-            { -1, -1 }, /* Profile 5. */
-            { 48, 63 }, /* Profile 6. */
-            { 48, 63 }, /* Profile 7. */
-            { 48, 63 }, /* Profile 8. */
-            { 48, 63 }, /* Profile 9. */
-            { -1, -1 }, /* Profile 10. */
-            { -1, -1 }, /* Profile 11. */
-            { 48, 63 }, /* Profile 12. */
-            { 48, 63 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "DVP_15_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 176, 191 }, /* Profile 2. */
-            { 176, 191 }, /* Profile 3. */
-            { 176, 191 }, /* Profile 4. */
-            { 176, 191 }, /* Profile 5. */
-            { 176, 191 }, /* Profile 6. */
-            { 176, 191 }, /* Profile 7. */
-            { 176, 191 }, /* Profile 8. */
-            { 176, 191 }, /* Profile 9. */
-            { 176, 191 }, /* Profile 10. */
-            { 176, 191 }, /* Profile 11. */
-            { 176, 191 }, /* Profile 12. */
-            { 176, 191 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "EFFECTIVE_TTL_7_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 96, 103 }, /* Profile 2. */
-            { 96, 103 }, /* Profile 3. */
-            { 96, 103 }, /* Profile 4. */
-            { 96, 103 }, /* Profile 5. */
-            { 96, 103 }, /* Profile 6. */
-            { 96, 103 }, /* Profile 7. */
-            { 96, 103 }, /* Profile 8. */
-            { 96, 103 }, /* Profile 9. */
-            { 96, 103 }, /* Profile 10. */
-            { 96, 103 }, /* Profile 11. */
-            { 96, 103 }, /* Profile 12. */
-            { 96, 103 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "EGR_MTOP_INDEX_HI_3_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 368, 371 }, /* Profile 2. */
-            { 368, 371 }, /* Profile 3. */
-            { 368, 371 }, /* Profile 4. */
-            { 368, 371 }, /* Profile 5. */
-            { 368, 371 }, /* Profile 6. */
-            { 368, 371 }, /* Profile 7. */
-            { 368, 371 }, /* Profile 8. */
-            { 368, 371 }, /* Profile 9. */
-            { 368, 371 }, /* Profile 10. */
-            { 368, 371 }, /* Profile 11. */
-            { 368, 371 }, /* Profile 12. */
-            { 368, 371 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { 48, 63 }, /* Profile 4. */
-            { 48, 63 }, /* Profile 5. */
-            { -1, -1 }, /* Profile 6. */
-            { -1, -1 }, /* Profile 7. */
-            { -1, -1 }, /* Profile 8. */
-            { -1, -1 }, /* Profile 9. */
-            { 48, 63 }, /* Profile 10. */
-            { 48, 63 }, /* Profile 11. */
-        },
-        .profile_cnt = 12,
-    },
-    {
-        .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 80, 95 }, /* Profile 2. */
-            { 80, 95 }, /* Profile 3. */
-            { 80, 95 }, /* Profile 4. */
-            { 80, 95 }, /* Profile 5. */
-            { 80, 95 }, /* Profile 6. */
-            { 80, 95 }, /* Profile 7. */
-        },
-        .profile_cnt = 8,
-    },
-    {
-        .name = "ENTROPY_LABEL_HIGH_3_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 408, 411 }, /* Profile 2. */
-            { 408, 411 }, /* Profile 3. */
-            { 408, 411 }, /* Profile 4. */
-            { 408, 411 }, /* Profile 5. */
-            { 408, 411 }, /* Profile 6. */
-            { 408, 411 }, /* Profile 7. */
-            { 408, 411 }, /* Profile 8. */
-            { 408, 411 }, /* Profile 9. */
-            { 408, 411 }, /* Profile 10. */
-            { 408, 411 }, /* Profile 11. */
-            { 408, 411 }, /* Profile 12. */
-            { 408, 411 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "ENTROPY_LABEL_LOW_15_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 112, 127 }, /* Profile 2. */
-            { 112, 127 }, /* Profile 3. */
-            { 112, 127 }, /* Profile 4. */
-            { 112, 127 }, /* Profile 5. */
-            { 112, 127 }, /* Profile 6. */
-            { 112, 127 }, /* Profile 7. */
-            { 112, 127 }, /* Profile 8. */
-            { 112, 127 }, /* Profile 9. */
-            { 112, 127 }, /* Profile 10. */
-            { 112, 127 }, /* Profile 11. */
-            { 112, 127 }, /* Profile 12. */
-            { 112, 127 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "EP_NIH_HDR_TIMESTAMP_15_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 272, 287 }, /* Profile 2. */
-            { 256, 271 }, /* Profile 3. */
-            { 272, 287 }, /* Profile 4. */
-            { 256, 271 }, /* Profile 5. */
-            { -1, -1 }, /* Profile 6. */
-            { -1, -1 }, /* Profile 7. */
-            { 272, 287 }, /* Profile 8. */
-            { 256, 271 }, /* Profile 9. */
-            { 272, 287 }, /* Profile 10. */
-            { 256, 271 }, /* Profile 11. */
-        },
-        .profile_cnt = 12,
-    },
-    {
-        .name = "EP_NIH_HDR_TIMESTAMP_31_16",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 288, 303 }, /* Profile 2. */
-            { 272, 287 }, /* Profile 3. */
-            { 288, 303 }, /* Profile 4. */
-            { 272, 287 }, /* Profile 5. */
-            { -1, -1 }, /* Profile 6. */
-            { -1, -1 }, /* Profile 7. */
-            { 288, 303 }, /* Profile 8. */
-            { 272, 287 }, /* Profile 9. */
-            { 288, 303 }, /* Profile 10. */
-            { 272, 287 }, /* Profile 11. */
-        },
-        .profile_cnt = 12,
-    },
-    {
-        .name = "EVENT_TRACE_VECTOR_15_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 0, 15 }, /* Profile 2. */
-            { 0, 15 }, /* Profile 3. */
-            { 0, 15 }, /* Profile 4. */
-            { 0, 15 }, /* Profile 5. */
-            { 0, 15 }, /* Profile 6. */
-            { 0, 15 }, /* Profile 7. */
-            { 0, 15 }, /* Profile 8. */
-            { 0, 15 }, /* Profile 9. */
-            { 0, 15 }, /* Profile 10. */
-            { 0, 15 }, /* Profile 11. */
-            { 0, 15 }, /* Profile 12. */
-            { 0, 15 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "EVENT_TRACE_VECTOR_31_16",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 16, 31 }, /* Profile 2. */
-            { 16, 31 }, /* Profile 3. */
-            { 16, 31 }, /* Profile 4. */
-            { 16, 31 }, /* Profile 5. */
-            { 16, 31 }, /* Profile 6. */
-            { 16, 31 }, /* Profile 7. */
-            { 16, 31 }, /* Profile 8. */
-            { 16, 31 }, /* Profile 9. */
-            { 16, 31 }, /* Profile 10. */
-            { 16, 31 }, /* Profile 11. */
-            { 16, 31 }, /* Profile 12. */
-            { 16, 31 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "EVENT_TRACE_VECTOR_47_32",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 32, 47 }, /* Profile 2. */
-            { 32, 47 }, /* Profile 3. */
-            { 32, 47 }, /* Profile 4. */
-            { 32, 47 }, /* Profile 5. */
-            { 32, 47 }, /* Profile 6. */
-            { 32, 47 }, /* Profile 7. */
-            { 32, 47 }, /* Profile 8. */
-            { 32, 47 }, /* Profile 9. */
-            { 32, 47 }, /* Profile 10. */
-            { 32, 47 }, /* Profile 11. */
-            { 32, 47 }, /* Profile 12. */
-            { 32, 47 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "I2E_CLASS_ID_15_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 256, 271 }, /* Profile 2. */
-            { 240, 255 }, /* Profile 3. */
-            { 256, 271 }, /* Profile 4. */
-            { 240, 255 }, /* Profile 5. */
-            { 256, 271 }, /* Profile 6. */
-            { 240, 255 }, /* Profile 7. */
-            { 256, 271 }, /* Profile 8. */
-            { 240, 255 }, /* Profile 9. */
-            { 256, 271 }, /* Profile 10. */
-            { 240, 255 }, /* Profile 11. */
-            { 256, 271 }, /* Profile 12. */
-            { 240, 255 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "IFP_IOAM_GBP_ACTION_3_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 372, 375 }, /* Profile 2. */
-            { 372, 375 }, /* Profile 3. */
-            { 372, 375 }, /* Profile 4. */
-            { 372, 375 }, /* Profile 5. */
-            { 372, 375 }, /* Profile 6. */
-            { 372, 375 }, /* Profile 7. */
-            { 372, 375 }, /* Profile 8. */
-            { 372, 375 }, /* Profile 9. */
-            { 372, 375 }, /* Profile 10. */
-            { 372, 375 }, /* Profile 11. */
-            { 372, 375 }, /* Profile 12. */
-            { 372, 375 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "IFP_TS_CONTROL_ACTION_3_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 376, 379 }, /* Profile 2. */
-            { 376, 379 }, /* Profile 3. */
-            { 376, 379 }, /* Profile 4. */
-            { 376, 379 }, /* Profile 5. */
-            { 376, 379 }, /* Profile 6. */
-            { 376, 379 }, /* Profile 7. */
-            { 376, 379 }, /* Profile 8. */
-            { 376, 379 }, /* Profile 9. */
-            { 376, 379 }, /* Profile 10. */
-            { 376, 379 }, /* Profile 11. */
-            { 376, 379 }, /* Profile 12. */
-            { 376, 379 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "ING_TIMESTAMP_15_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { -1, -1 }, /* Profile 4. */
-            { -1, -1 }, /* Profile 5. */
-            { 272, 287 }, /* Profile 6. */
-            { 256, 271 }, /* Profile 7. */
-            { -1, -1 }, /* Profile 8. */
-            { -1, -1 }, /* Profile 9. */
-            { -1, -1 }, /* Profile 10. */
-            { -1, -1 }, /* Profile 11. */
-            { 272, 287 }, /* Profile 12. */
-            { 256, 271 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "ING_TIMESTAMP_31_16",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { -1, -1 }, /* Profile 4. */
-            { -1, -1 }, /* Profile 5. */
-            { 288, 303 }, /* Profile 6. */
-            { 272, 287 }, /* Profile 7. */
-            { -1, -1 }, /* Profile 8. */
-            { -1, -1 }, /* Profile 9. */
-            { -1, -1 }, /* Profile 10. */
-            { -1, -1 }, /* Profile 11. */
-            { 288, 303 }, /* Profile 12. */
-            { 272, 287 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "INGRESS_PP_PORT_7_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 240, 247 }, /* Profile 2. */
-            { 224, 231 }, /* Profile 3. */
-            { 240, 247 }, /* Profile 4. */
-            { 224, 231 }, /* Profile 5. */
-            { 240, 247 }, /* Profile 6. */
-            { 224, 231 }, /* Profile 7. */
-            { 240, 247 }, /* Profile 8. */
-            { 224, 231 }, /* Profile 9. */
-            { 240, 247 }, /* Profile 10. */
-            { 224, 231 }, /* Profile 11. */
-            { 240, 247 }, /* Profile 12. */
-            { 224, 231 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 304, 319 }, /* Profile 2. */
-            { 288, 303 }, /* Profile 3. */
-            { 304, 319 }, /* Profile 4. */
-            { 288, 303 }, /* Profile 5. */
-            { 304, 319 }, /* Profile 6. */
-            { 288, 303 }, /* Profile 7. */
-            { 304, 319 }, /* Profile 8. */
-            { 288, 303 }, /* Profile 9. */
-            { 304, 319 }, /* Profile 10. */
-            { 288, 303 }, /* Profile 11. */
-            { 304, 319 }, /* Profile 12. */
-            { 288, 303 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "INGRESS_QOS_REMARK_CTRL_3_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 384, 387 }, /* Profile 2. */
-            { 384, 387 }, /* Profile 3. */
-            { 384, 387 }, /* Profile 4. */
-            { 384, 387 }, /* Profile 5. */
-            { 384, 387 }, /* Profile 6. */
-            { 384, 387 }, /* Profile 7. */
-            { 384, 387 }, /* Profile 8. */
-            { 384, 387 }, /* Profile 9. */
-            { 384, 387 }, /* Profile 10. */
-            { 384, 387 }, /* Profile 11. */
-            { 384, 387 }, /* Profile 12. */
-            { 384, 387 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "INT_PRI_3_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 400, 403 }, /* Profile 2. */
-            { 400, 403 }, /* Profile 3. */
-            { 400, 403 }, /* Profile 4. */
-            { 400, 403 }, /* Profile 5. */
-            { 400, 403 }, /* Profile 6. */
-            { 400, 403 }, /* Profile 7. */
-            { 400, 403 }, /* Profile 8. */
-            { 400, 403 }, /* Profile 9. */
-            { 400, 403 }, /* Profile 10. */
-            { 400, 403 }, /* Profile 11. */
-            { 400, 403 }, /* Profile 12. */
-            { 400, 403 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "L2_IIF_10_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 208, 218 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { 208, 218 }, /* Profile 4. */
-            { -1, -1 }, /* Profile 5. */
-            { 208, 218 }, /* Profile 6. */
-            { -1, -1 }, /* Profile 7. */
-            { 208, 218 }, /* Profile 8. */
-            { -1, -1 }, /* Profile 9. */
-            { 208, 218 }, /* Profile 10. */
-            { -1, -1 }, /* Profile 11. */
-            { 208, 218 }, /* Profile 12. */
-        },
-        .profile_cnt = 13,
-    },
-    {
-        .name = "L2_OIF_10_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { 336, 346 }, /* Profile 3. */
-            { -1, -1 }, /* Profile 4. */
-            { 336, 346 }, /* Profile 5. */
-            { -1, -1 }, /* Profile 6. */
-            { 336, 346 }, /* Profile 7. */
-            { -1, -1 }, /* Profile 8. */
-            { 336, 346 }, /* Profile 9. */
-            { -1, -1 }, /* Profile 10. */
-            { 336, 346 }, /* Profile 11. */
-            { -1, -1 }, /* Profile 12. */
-            { 336, 346 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "L3_IIF_13_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 224, 237 }, /* Profile 2. */
-            { 208, 221 }, /* Profile 3. */
-            { 224, 237 }, /* Profile 4. */
-            { 208, 221 }, /* Profile 5. */
-            { 224, 237 }, /* Profile 6. */
-            { 208, 221 }, /* Profile 7. */
-            { 224, 237 }, /* Profile 8. */
-            { 208, 221 }, /* Profile 9. */
-            { 224, 237 }, /* Profile 10. */
-            { 208, 221 }, /* Profile 11. */
-            { 224, 237 }, /* Profile 12. */
-            { 208, 221 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "L3_OIF_1_13_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 352, 365 }, /* Profile 2. */
-            { 352, 365 }, /* Profile 3. */
-            { 352, 365 }, /* Profile 4. */
-            { 352, 365 }, /* Profile 5. */
-            { 352, 365 }, /* Profile 6. */
-            { 352, 365 }, /* Profile 7. */
-            { 352, 365 }, /* Profile 8. */
-            { 352, 365 }, /* Profile 9. */
-            { 352, 365 }, /* Profile 10. */
-            { 352, 365 }, /* Profile 11. */
-            { 352, 365 }, /* Profile 12. */
-            { 352, 365 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 192, 207 }, /* Profile 2. */
-            { 192, 207 }, /* Profile 3. */
-            { 192, 207 }, /* Profile 4. */
-            { 192, 207 }, /* Profile 5. */
-            { 192, 207 }, /* Profile 6. */
-            { 192, 207 }, /* Profile 7. */
-            { 192, 207 }, /* Profile 8. */
-            { 192, 207 }, /* Profile 9. */
-            { 192, 207 }, /* Profile 10. */
-            { 192, 207 }, /* Profile 11. */
-            { 192, 207 }, /* Profile 12. */
-            { 192, 207 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "NHOP_INDEX_1_15_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 128, 143 }, /* Profile 2. */
-            { 128, 143 }, /* Profile 3. */
-            { 128, 143 }, /* Profile 4. */
-            { 128, 143 }, /* Profile 5. */
-            { 128, 143 }, /* Profile 6. */
-            { 128, 143 }, /* Profile 7. */
-            { 128, 143 }, /* Profile 8. */
-            { 128, 143 }, /* Profile 9. */
-            { 128, 143 }, /* Profile 10. */
-            { 128, 143 }, /* Profile 11. */
-            { 128, 143 }, /* Profile 12. */
-            { 128, 143 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "PARSER_VHLEN_0_15_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 64, 79 }, /* Profile 2. */
-            { 64, 79 }, /* Profile 3. */
-            { 64, 79 }, /* Profile 4. */
-            { 64, 79 }, /* Profile 5. */
-            { 64, 79 }, /* Profile 6. */
-            { 64, 79 }, /* Profile 7. */
-            { 64, 79 }, /* Profile 8. */
-            { 64, 79 }, /* Profile 9. */
-            { 64, 79 }, /* Profile 10. */
-            { 64, 79 }, /* Profile 11. */
-            { 64, 79 }, /* Profile 12. */
-            { 64, 79 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "PKT_MISC_CTRL_0_3_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 412, 415 }, /* Profile 2. */
-            { 412, 415 }, /* Profile 3. */
-            { 412, 415 }, /* Profile 4. */
-            { 412, 415 }, /* Profile 5. */
-            { 412, 415 }, /* Profile 6. */
-            { 412, 415 }, /* Profile 7. */
-            { 412, 415 }, /* Profile 8. */
-            { 412, 415 }, /* Profile 9. */
-            { 412, 415 }, /* Profile 10. */
-            { 412, 415 }, /* Profile 11. */
-            { 412, 415 }, /* Profile 12. */
-            { 412, 415 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "SVP_15_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SVP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 320, 335 }, /* Profile 2. */
-            { 304, 319 }, /* Profile 3. */
-            { 320, 335 }, /* Profile 4. */
-            { 304, 319 }, /* Profile 5. */
-            { 320, 335 }, /* Profile 6. */
-            { 304, 319 }, /* Profile 7. */
-            { 320, 335 }, /* Profile 8. */
-            { 304, 319 }, /* Profile 9. */
-            { 320, 335 }, /* Profile 10. */
-            { 304, 319 }, /* Profile 11. */
-            { 320, 335 }, /* Profile 12. */
-            { 304, 319 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 380, 383 }, /* Profile 2. */
-            { 380, 383 }, /* Profile 3. */
-            { 380, 383 }, /* Profile 4. */
-            { 380, 383 }, /* Profile 5. */
-            { 380, 383 }, /* Profile 6. */
-            { 380, 383 }, /* Profile 7. */
-            { 380, 383 }, /* Profile 8. */
-            { 380, 383 }, /* Profile 9. */
-            { 380, 383 }, /* Profile 10. */
-            { 380, 383 }, /* Profile 11. */
-            { 380, 383 }, /* Profile 12. */
-            { 380, 383 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "SYSTEM_DESTINATION_15_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 160, 175 }, /* Profile 2. */
-            { 160, 175 }, /* Profile 3. */
-            { 160, 175 }, /* Profile 4. */
-            { 160, 175 }, /* Profile 5. */
-            { 160, 175 }, /* Profile 6. */
-            { 160, 175 }, /* Profile 7. */
-            { 160, 175 }, /* Profile 8. */
-            { 160, 175 }, /* Profile 9. */
-            { 160, 175 }, /* Profile 10. */
-            { 160, 175 }, /* Profile 11. */
-            { 160, 175 }, /* Profile 12. */
-            { 160, 175 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "SYSTEM_OPCODE_3_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 404, 407 }, /* Profile 2. */
-            { 404, 407 }, /* Profile 3. */
-            { 404, 407 }, /* Profile 4. */
-            { 404, 407 }, /* Profile 5. */
-            { 404, 407 }, /* Profile 6. */
-            { 404, 407 }, /* Profile 7. */
-            { 404, 407 }, /* Profile 8. */
-            { 404, 407 }, /* Profile 9. */
-            { 404, 407 }, /* Profile 10. */
-            { 404, 407 }, /* Profile 11. */
-            { 404, 407 }, /* Profile 12. */
-            { 404, 407 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "SYSTEM_SOURCE_15_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 144, 159 }, /* Profile 2. */
-            { 144, 159 }, /* Profile 3. */
-            { 144, 159 }, /* Profile 4. */
-            { 144, 159 }, /* Profile 5. */
-            { 144, 159 }, /* Profile 6. */
-            { 144, 159 }, /* Profile 7. */
-            { 144, 159 }, /* Profile 8. */
-            { 144, 159 }, /* Profile 9. */
-            { 144, 159 }, /* Profile 10. */
-            { 144, 159 }, /* Profile 11. */
-            { 144, 159 }, /* Profile 12. */
-            { 144, 159 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "TIMESTAMP_CTRL_3_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 388, 391 }, /* Profile 2. */
-            { 388, 391 }, /* Profile 3. */
-            { 388, 391 }, /* Profile 4. */
-            { 388, 391 }, /* Profile 5. */
-            { 388, 391 }, /* Profile 6. */
-            { 388, 391 }, /* Profile 7. */
-            { 388, 391 }, /* Profile 8. */
-            { 388, 391 }, /* Profile 9. */
-            { 388, 391 }, /* Profile 10. */
-            { 388, 391 }, /* Profile 11. */
-            { 388, 391 }, /* Profile 12. */
-            { 388, 391 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 392, 395 }, /* Profile 2. */
-            { 392, 395 }, /* Profile 3. */
-            { 392, 395 }, /* Profile 4. */
-            { 392, 395 }, /* Profile 5. */
-            { 392, 395 }, /* Profile 6. */
-            { 392, 395 }, /* Profile 7. */
-            { 392, 395 }, /* Profile 8. */
-            { 392, 395 }, /* Profile 9. */
-            { 392, 395 }, /* Profile 10. */
-            { 392, 395 }, /* Profile 11. */
-            { 392, 395 }, /* Profile 12. */
-            { 392, 395 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "VFI_15_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 336, 351 }, /* Profile 2. */
-            { 320, 335 }, /* Profile 3. */
-            { 336, 351 }, /* Profile 4. */
-            { 320, 335 }, /* Profile 5. */
-            { 336, 351 }, /* Profile 6. */
-            { 320, 335 }, /* Profile 7. */
-            { 336, 351 }, /* Profile 8. */
-            { 320, 335 }, /* Profile 9. */
-            { 336, 351 }, /* Profile 10. */
-            { 320, 335 }, /* Profile 11. */
-            { 336, 351 }, /* Profile 12. */
-            { 320, 335 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-    {
-        .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0",
-        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 396, 397 }, /* Profile 2. */
-            { 396, 397 }, /* Profile 3. */
-            { 396, 397 }, /* Profile 4. */
-            { 396, 397 }, /* Profile 5. */
-            { 396, 397 }, /* Profile 6. */
-            { 396, 397 }, /* Profile 7. */
-            { 396, 397 }, /* Profile 8. */
-            { 396, 397 }, /* Profile 9. */
-            { 396, 397 }, /* Profile 10. */
-            { 396, 397 }, /* Profile 11. */
-            { 396, 397 }, /* Profile 12. */
-            { 396, 397 }, /* Profile 13. */
-        },
-        .profile_cnt = 14,
-    },
-};static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_rxpmd_flex_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_rxpmd_flex_field_data,
-};
-
-static shr_enum_map_t bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reason_names[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_reasons_info_t bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reasons_info = {
-    .num_reasons = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
-    .reason_names = bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reason_names,
-    .reason_encode = bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reason_encode,
-    .reason_decode = bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reason_decode,
-};
-
-
-static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_arp_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_FID_COUNT] = {
-    bcmpkt_arp_t_hardware_len_get,
-    bcmpkt_arp_t_hardware_type_get,
-    bcmpkt_arp_t_operation_get,
-    bcmpkt_arp_t_prot_addr_len_get,
-    bcmpkt_arp_t_protocol_type_get,
-    bcmpkt_arp_t_sender_ha_get,
-    bcmpkt_arp_t_sender_ip_get,
-    bcmpkt_arp_t_target_ha_get,
-    bcmpkt_arp_t_target_ip_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_arp_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_FID_COUNT] = {
-    bcmpkt_arp_t_hardware_len_set,
-    bcmpkt_arp_t_hardware_type_set,
-    bcmpkt_arp_t_operation_set,
-    bcmpkt_arp_t_prot_addr_len_set,
-    bcmpkt_arp_t_protocol_type_set,
-    bcmpkt_arp_t_sender_ha_set,
-    bcmpkt_arp_t_sender_ip_set,
-    bcmpkt_arp_t_target_ha_set,
-    bcmpkt_arp_t_target_ip_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_arp_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_arp_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_arp_t_field_data,
-};
-
-
-static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_authen_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
-    bcmpkt_authen_t_data_get,
-    bcmpkt_authen_t_next_header_get,
-    bcmpkt_authen_t_payload_len_get,
-    bcmpkt_authen_t_reserved_get,
-    bcmpkt_authen_t_seq_num_get,
-    bcmpkt_authen_t_spi_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_authen_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
-    bcmpkt_authen_t_data_set,
-    bcmpkt_authen_t_next_header_set,
-    bcmpkt_authen_t_payload_len_set,
-    bcmpkt_authen_t_reserved_set,
-    bcmpkt_authen_t_seq_num_set,
-    bcmpkt_authen_t_spi_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_authen_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_authen_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_authen_t_field_data,
-};
-
-
-static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 18, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 18, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 19, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 19, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 17, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 17, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 5);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 5, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 21, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 21, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 22, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 22, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 29, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 29, 3, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_bfd_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FID_COUNT] = {
-    bcmpkt_bfd_t_ap_get,
-    bcmpkt_bfd_t_bfd_length_get,
-    bcmpkt_bfd_t_cpi_get,
-    bcmpkt_bfd_t_dem_get,
-    bcmpkt_bfd_t_desmintxintv_get,
-    bcmpkt_bfd_t_detectmult_get,
-    bcmpkt_bfd_t_diag_get,
-    bcmpkt_bfd_t_fin_get,
-    bcmpkt_bfd_t_minechorxintv_get,
-    bcmpkt_bfd_t_mpt_get,
-    bcmpkt_bfd_t_mydiscrim_get,
-    bcmpkt_bfd_t_poll_get,
-    bcmpkt_bfd_t_reqminrxintv_get,
-    bcmpkt_bfd_t_sta_get,
-    bcmpkt_bfd_t_urdiscrim_get,
-    bcmpkt_bfd_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_bfd_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FID_COUNT] = {
-    bcmpkt_bfd_t_ap_set,
-    bcmpkt_bfd_t_bfd_length_set,
-    bcmpkt_bfd_t_cpi_set,
-    bcmpkt_bfd_t_dem_set,
-    bcmpkt_bfd_t_desmintxintv_set,
-    bcmpkt_bfd_t_detectmult_set,
-    bcmpkt_bfd_t_diag_set,
-    bcmpkt_bfd_t_fin_set,
-    bcmpkt_bfd_t_minechorxintv_set,
-    bcmpkt_bfd_t_mpt_set,
-    bcmpkt_bfd_t_mydiscrim_set,
-    bcmpkt_bfd_t_poll_set,
-    bcmpkt_bfd_t_reqminrxintv_set,
-    bcmpkt_bfd_t_sta_set,
-    bcmpkt_bfd_t_urdiscrim_set,
-    bcmpkt_bfd_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_bfd_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_bfd_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_bfd_t_field_data,
-};
-
-
-static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_cntag_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_FID_COUNT] = {
-    bcmpkt_cntag_t_rpid_get,
-    bcmpkt_cntag_t_tpid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_cntag_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_FID_COUNT] = {
-    bcmpkt_cntag_t_rpid_set,
-    bcmpkt_cntag_t_tpid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_cntag_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_cntag_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_cntag_t_field_data,
-};
-
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_0_t_dma_cont0_get,
-    bcmpkt_cpu_composites_0_t_dma_cont1_get,
-    bcmpkt_cpu_composites_0_t_dma_cont2_get,
-    bcmpkt_cpu_composites_0_t_dma_cont3_get,
-    bcmpkt_cpu_composites_0_t_dma_cont4_get,
-    bcmpkt_cpu_composites_0_t_dma_cont5_get,
-    bcmpkt_cpu_composites_0_t_dma_cont6_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_0_t_dma_cont0_set,
-    bcmpkt_cpu_composites_0_t_dma_cont1_set,
-    bcmpkt_cpu_composites_0_t_dma_cont2_set,
-    bcmpkt_cpu_composites_0_t_dma_cont3_set,
-    bcmpkt_cpu_composites_0_t_dma_cont4_set,
-    bcmpkt_cpu_composites_0_t_dma_cont5_set,
-    bcmpkt_cpu_composites_0_t_dma_cont6_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_1_t_dma_cont10_get,
-    bcmpkt_cpu_composites_1_t_dma_cont11_get,
-    bcmpkt_cpu_composites_1_t_dma_cont12_get,
-    bcmpkt_cpu_composites_1_t_dma_cont13_get,
-    bcmpkt_cpu_composites_1_t_dma_cont14_get,
-    bcmpkt_cpu_composites_1_t_dma_cont15_get,
-    bcmpkt_cpu_composites_1_t_dma_cont16_get,
-    bcmpkt_cpu_composites_1_t_dma_cont17_get,
-    bcmpkt_cpu_composites_1_t_dma_cont7_get,
-    bcmpkt_cpu_composites_1_t_dma_cont8_get,
-    bcmpkt_cpu_composites_1_t_dma_cont9_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_1_t_dma_cont10_set,
-    bcmpkt_cpu_composites_1_t_dma_cont11_set,
-    bcmpkt_cpu_composites_1_t_dma_cont12_set,
-    bcmpkt_cpu_composites_1_t_dma_cont13_set,
-    bcmpkt_cpu_composites_1_t_dma_cont14_set,
-    bcmpkt_cpu_composites_1_t_dma_cont15_set,
-    bcmpkt_cpu_composites_1_t_dma_cont16_set,
-    bcmpkt_cpu_composites_1_t_dma_cont17_set,
-    bcmpkt_cpu_composites_1_t_dma_cont7_set,
-    bcmpkt_cpu_composites_1_t_dma_cont8_set,
-    bcmpkt_cpu_composites_1_t_dma_cont9_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_dest_option_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
-    bcmpkt_dest_option_t_hdr_ext_len_get,
-    bcmpkt_dest_option_t_next_header_get,
-    bcmpkt_dest_option_t_option_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_dest_option_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
-    bcmpkt_dest_option_t_hdr_ext_len_set,
-    bcmpkt_dest_option_t_next_header_set,
-    bcmpkt_dest_option_t_option_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_dest_option_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_dest_option_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_dest_option_t_field_data,
-};
-
-
-static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 30, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 30, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
-    bcmpkt_ep_nih_header_t_header_subtype_get,
-    bcmpkt_ep_nih_header_t_header_type_get,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_b_get,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_c_get,
-    bcmpkt_ep_nih_header_t_opaque_object_a_get,
-    bcmpkt_ep_nih_header_t_opaque_object_b_get,
-    bcmpkt_ep_nih_header_t_opaque_object_c_get,
-    bcmpkt_ep_nih_header_t_recirc_profile_index_get,
-    bcmpkt_ep_nih_header_t_reserved_0_get,
-    bcmpkt_ep_nih_header_t_start_get,
-    bcmpkt_ep_nih_header_t_timestamp_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
-    bcmpkt_ep_nih_header_t_header_subtype_set,
-    bcmpkt_ep_nih_header_t_header_type_set,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_b_set,
-    bcmpkt_ep_nih_header_t_opaque_ctrl_c_set,
-    bcmpkt_ep_nih_header_t_opaque_object_a_set,
-    bcmpkt_ep_nih_header_t_opaque_object_b_set,
-    bcmpkt_ep_nih_header_t_opaque_object_c_set,
-    bcmpkt_ep_nih_header_t_recirc_profile_index_set,
-    bcmpkt_ep_nih_header_t_reserved_0_set,
-    bcmpkt_ep_nih_header_t_start_set,
-    bcmpkt_ep_nih_header_t_timestamp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_field_data,
-};
-
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 11, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 11, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 13, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 13, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 10, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 10, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 12, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
-    bcmpkt_erspan3_fixed_hdr_t_bso_get,
-    bcmpkt_erspan3_fixed_hdr_t_cos_get,
-    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
-    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
-    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
-    bcmpkt_erspan3_fixed_hdr_t_t_get,
-    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
-    bcmpkt_erspan3_fixed_hdr_t_ver_get,
-    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
-    bcmpkt_erspan3_fixed_hdr_t_bso_set,
-    bcmpkt_erspan3_fixed_hdr_t_cos_set,
-    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
-    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
-    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
-    bcmpkt_erspan3_fixed_hdr_t_t_set,
-    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
-    bcmpkt_erspan3_fixed_hdr_t_ver_set,
-    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_field_data,
-};
-
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 26, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 26, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
-    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
-    bcmpkt_erspan3_subhdr_5_t_port_id_get,
-    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
-    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
-    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
-    bcmpkt_erspan3_subhdr_5_t_port_id_set,
-    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
-    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_field_data,
-};
-
-
-static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 8, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 8, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_esp_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_FID_COUNT] = {
-    bcmpkt_esp_t_next_header_get,
-    bcmpkt_esp_t_pad_get,
-    bcmpkt_esp_t_pad_len_get,
-    bcmpkt_esp_t_seq_num_get,
-    bcmpkt_esp_t_spi_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_esp_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_FID_COUNT] = {
-    bcmpkt_esp_t_next_header_set,
-    bcmpkt_esp_t_pad_set,
-    bcmpkt_esp_t_pad_len_set,
-    bcmpkt_esp_t_seq_num_set,
-    bcmpkt_esp_t_spi_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_esp_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_esp_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_esp_t_field_data,
-};
-
-
-static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_etag_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_FID_COUNT] = {
-    bcmpkt_etag_t_tag_get,
-    bcmpkt_etag_t_tpid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_etag_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_FID_COUNT] = {
-    bcmpkt_etag_t_tag_set,
-    bcmpkt_etag_t_tpid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_etag_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_etag_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_etag_t_field_data,
-};
-
-
-static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_ethertype_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
-    bcmpkt_ethertype_t_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_ethertype_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
-    bcmpkt_ethertype_t_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_ethertype_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_ethertype_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_ethertype_t_field_data,
-};
-
-
-static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_frag_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FID_COUNT] = {
-    bcmpkt_frag_t_frag_info_get,
-    bcmpkt_frag_t_id_get,
-    bcmpkt_frag_t_next_header_get,
-    bcmpkt_frag_t_reserved_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_frag_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FID_COUNT] = {
-    bcmpkt_frag_t_frag_info_set,
-    bcmpkt_frag_t_id_set,
-    bcmpkt_frag_t_next_header_set,
-    bcmpkt_frag_t_reserved_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_frag_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_frag_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_frag_t_field_data,
-};
-
-
-static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 4, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 4, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_generic_loopback_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
-    bcmpkt_generic_loopback_t_destination_obj_get,
-    bcmpkt_generic_loopback_t_destination_type_get,
-    bcmpkt_generic_loopback_t_entropy_obj_get,
-    bcmpkt_generic_loopback_t_flags_get,
-    bcmpkt_generic_loopback_t_header_type_get,
-    bcmpkt_generic_loopback_t_input_priority_get,
-    bcmpkt_generic_loopback_t_interface_ctrl_get,
-    bcmpkt_generic_loopback_t_interface_obj_get,
-    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
-    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
-    bcmpkt_generic_loopback_t_qos_obj_get,
-    bcmpkt_generic_loopback_t_reserved_1_get,
-    bcmpkt_generic_loopback_t_reserved_2_get,
-    bcmpkt_generic_loopback_t_source_system_port_get,
-    bcmpkt_generic_loopback_t_start_byte_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_generic_loopback_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
-    bcmpkt_generic_loopback_t_destination_obj_set,
-    bcmpkt_generic_loopback_t_destination_type_set,
-    bcmpkt_generic_loopback_t_entropy_obj_set,
-    bcmpkt_generic_loopback_t_flags_set,
-    bcmpkt_generic_loopback_t_header_type_set,
-    bcmpkt_generic_loopback_t_input_priority_set,
-    bcmpkt_generic_loopback_t_interface_ctrl_set,
-    bcmpkt_generic_loopback_t_interface_obj_set,
-    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
-    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
-    bcmpkt_generic_loopback_t_qos_obj_set,
-    bcmpkt_generic_loopback_t_reserved_1_set,
-    bcmpkt_generic_loopback_t_reserved_2_set,
-    bcmpkt_generic_loopback_t_source_system_port_set,
-    bcmpkt_generic_loopback_t_start_byte_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_generic_loopback_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_generic_loopback_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_generic_loopback_t_field_data,
-};
-
-
-static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 24);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 24, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_gpe_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FID_COUNT] = {
-    bcmpkt_gpe_t_flags_get,
-    bcmpkt_gpe_t_next_protocol_get,
-    bcmpkt_gpe_t_reserved0_get,
-    bcmpkt_gpe_t_reserved1_get,
-    bcmpkt_gpe_t_vni_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_gpe_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FID_COUNT] = {
-    bcmpkt_gpe_t_flags_set,
-    bcmpkt_gpe_t_next_protocol_set,
-    bcmpkt_gpe_t_reserved0_set,
-    bcmpkt_gpe_t_reserved1_set,
-    bcmpkt_gpe_t_vni_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_gpe_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_gpe_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_gpe_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_gre_chksum_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
-    bcmpkt_gre_chksum_t_checksum_get,
-    bcmpkt_gre_chksum_t_offset_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_gre_chksum_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
-    bcmpkt_gre_chksum_t_checksum_set,
-    bcmpkt_gre_chksum_t_offset_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_gre_chksum_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_gre_chksum_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_gre_chksum_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_gre_key_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
-    bcmpkt_gre_key_t_key_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_gre_key_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
-    bcmpkt_gre_key_t_key_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_gre_key_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_gre_key_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_gre_key_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_gre_rout_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
-    bcmpkt_gre_rout_t_routing_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_gre_rout_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
-    bcmpkt_gre_rout_t_routing_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_gre_rout_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_gre_rout_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_gre_rout_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_gre_seq_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
-    bcmpkt_gre_seq_t_sequence_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_gre_seq_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
-    bcmpkt_gre_seq_t_sequence_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_gre_seq_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_gre_seq_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_gre_seq_t_field_data,
-};
-
-
-static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 19, 9);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 19, 9, val);
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 3, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_gre_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_FID_COUNT] = {
-    bcmpkt_gre_t_c_r_k_s_get,
-    bcmpkt_gre_t_protocol_get,
-    bcmpkt_gre_t_reserved_get,
-    bcmpkt_gre_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_gre_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_FID_COUNT] = {
-    bcmpkt_gre_t_c_r_k_s_set,
-    bcmpkt_gre_t_protocol_set,
-    bcmpkt_gre_t_reserved_set,
-    bcmpkt_gre_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_gre_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_gre_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_gre_t_field_data,
-};
-
-
-static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 4, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 4, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 6, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 6, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 18, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 18, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 17, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 17, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 31, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 31, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 22, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 22, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 15);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 15, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 15, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 15, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 15);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 15, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 2, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_hg3_base_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
-    bcmpkt_hg3_base_t_cn_get,
-    bcmpkt_hg3_base_t_cng_get,
-    bcmpkt_hg3_base_t_entropy_get,
-    bcmpkt_hg3_base_t_ext_hdr_present_get,
-    bcmpkt_hg3_base_t_hg3_reserved_get,
-    bcmpkt_hg3_base_t_l3_routed_get,
-    bcmpkt_hg3_base_t_mirror_copy_get,
-    bcmpkt_hg3_base_t_reserved_etype_get,
-    bcmpkt_hg3_base_t_system_destination_get,
-    bcmpkt_hg3_base_t_system_destination_type_get,
-    bcmpkt_hg3_base_t_system_source_get,
-    bcmpkt_hg3_base_t_tc_get,
-    bcmpkt_hg3_base_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_hg3_base_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
-    bcmpkt_hg3_base_t_cn_set,
-    bcmpkt_hg3_base_t_cng_set,
-    bcmpkt_hg3_base_t_entropy_set,
-    bcmpkt_hg3_base_t_ext_hdr_present_set,
-    bcmpkt_hg3_base_t_hg3_reserved_set,
-    bcmpkt_hg3_base_t_l3_routed_set,
-    bcmpkt_hg3_base_t_mirror_copy_set,
-    bcmpkt_hg3_base_t_reserved_etype_set,
-    bcmpkt_hg3_base_t_system_destination_set,
-    bcmpkt_hg3_base_t_system_destination_type_set,
-    bcmpkt_hg3_base_t_system_source_set,
-    bcmpkt_hg3_base_t_tc_set,
-    bcmpkt_hg3_base_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_hg3_base_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_hg3_base_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_hg3_base_t_field_data,
-};
-
-
-static int32_t bcmpkt_hg3_extension_0_t_class_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_class_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
-    bcmpkt_hg3_extension_0_t_class_id_get,
-    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get,
-    bcmpkt_hg3_extension_0_t_flags_get,
-    bcmpkt_hg3_extension_0_t_forwarding_domain_get,
-    bcmpkt_hg3_extension_0_t_svp_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
-    bcmpkt_hg3_extension_0_t_class_id_set,
-    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set,
-    bcmpkt_hg3_extension_0_t_flags_set,
-    bcmpkt_hg3_extension_0_t_forwarding_domain_set,
-    bcmpkt_hg3_extension_0_t_svp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
-    bcmpkt_hop_by_hop_t_hdr_ext_len_get,
-    bcmpkt_hop_by_hop_t_next_header_get,
-    bcmpkt_hop_by_hop_t_option_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
-    bcmpkt_hop_by_hop_t_hdr_ext_len_set,
-    bcmpkt_hop_by_hop_t_next_header_set,
-    bcmpkt_hop_by_hop_t_option_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_field_data,
-};
-
-
-static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_icmp_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_FID_COUNT] = {
-    bcmpkt_icmp_t_checksum_get,
-    bcmpkt_icmp_t_code_get,
-    bcmpkt_icmp_t_icmp_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_icmp_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_FID_COUNT] = {
-    bcmpkt_icmp_t_checksum_set,
-    bcmpkt_icmp_t_code_set,
-    bcmpkt_icmp_t_icmp_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_icmp_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_icmp_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_icmp_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_1_raw_hdr_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_1_raw_hdr_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_FID_COUNT] = {
-    bcmpkt_ifa_1_raw_hdr_t_data_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_FID_COUNT] = {
-    bcmpkt_ifa_1_raw_hdr_t_data_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_header_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_cur_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[5], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_cur_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[5], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_flags_rsvd_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_flags_rsvd_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_hop_limit_hop_count_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_hop_limit_hop_count_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[5], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[5], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_metadata_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_metadata_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_probe_marker_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_probe_marker_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_probe_marker_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_probe_marker_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_rsvd_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_rsvd_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_sender_handle_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[6], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_sender_handle_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[6], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_sequence_number_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[6], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_sequence_number_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[6], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_ifa_header_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
-    bcmpkt_ifa_header_t_action_vector_get,
-    bcmpkt_ifa_header_t_cur_length_get,
-    bcmpkt_ifa_header_t_flags_get,
-    bcmpkt_ifa_header_t_flags_rsvd_get,
-    bcmpkt_ifa_header_t_hop_limit_hop_count_get,
-    bcmpkt_ifa_header_t_max_length_get,
-    bcmpkt_ifa_header_t_metadata_get,
-    bcmpkt_ifa_header_t_msg_type_get,
-    bcmpkt_ifa_header_t_probe_marker_0_get,
-    bcmpkt_ifa_header_t_probe_marker_1_get,
-    bcmpkt_ifa_header_t_request_vector_get,
-    bcmpkt_ifa_header_t_rsvd_0_get,
-    bcmpkt_ifa_header_t_sender_handle_get,
-    bcmpkt_ifa_header_t_sequence_number_get,
-    bcmpkt_ifa_header_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_ifa_header_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
-    bcmpkt_ifa_header_t_action_vector_set,
-    bcmpkt_ifa_header_t_cur_length_set,
-    bcmpkt_ifa_header_t_flags_set,
-    bcmpkt_ifa_header_t_flags_rsvd_set,
-    bcmpkt_ifa_header_t_hop_limit_hop_count_set,
-    bcmpkt_ifa_header_t_max_length_set,
-    bcmpkt_ifa_header_t_metadata_set,
-    bcmpkt_ifa_header_t_msg_type_set,
-    bcmpkt_ifa_header_t_probe_marker_0_set,
-    bcmpkt_ifa_header_t_probe_marker_1_set,
-    bcmpkt_ifa_header_t_request_vector_set,
-    bcmpkt_ifa_header_t_rsvd_0_set,
-    bcmpkt_ifa_header_t_sender_handle_set,
-    bcmpkt_ifa_header_t_sequence_number_set,
-    bcmpkt_ifa_header_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_ifa_header_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_ifa_header_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_ifa_header_t_field_data,
-};
-
-
-static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_igmp_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_FID_COUNT] = {
-    bcmpkt_igmp_t_checksum_get,
-    bcmpkt_igmp_t_group_address_get,
-    bcmpkt_igmp_t_igmp_type_get,
-    bcmpkt_igmp_t_max_resp_time_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_igmp_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_FID_COUNT] = {
-    bcmpkt_igmp_t_checksum_set,
-    bcmpkt_igmp_t_group_address_set,
-    bcmpkt_igmp_t_igmp_type_set,
-    bcmpkt_igmp_t_max_resp_time_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_igmp_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_igmp_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_igmp_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_ipfix_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_FID_COUNT] = {
-    bcmpkt_ipfix_t_export_time_get,
-    bcmpkt_ipfix_t_length_get,
-    bcmpkt_ipfix_t_obs_domain_id_get,
-    bcmpkt_ipfix_t_sequence_num_get,
-    bcmpkt_ipfix_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_ipfix_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_FID_COUNT] = {
-    bcmpkt_ipfix_t_export_time_set,
-    bcmpkt_ipfix_t_length_set,
-    bcmpkt_ipfix_t_obs_domain_id_set,
-    bcmpkt_ipfix_t_sequence_num_set,
-    bcmpkt_ipfix_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_ipfix_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_ipfix_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_ipfix_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_ipv4_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FID_COUNT] = {
-    bcmpkt_ipv4_t_da_get,
-    bcmpkt_ipv4_t_flags_frag_offset_get,
-    bcmpkt_ipv4_t_hdr_checksum_get,
-    bcmpkt_ipv4_t_id_get,
-    bcmpkt_ipv4_t_option_get,
-    bcmpkt_ipv4_t_protocol_get,
-    bcmpkt_ipv4_t_sa_get,
-    bcmpkt_ipv4_t_tos_get,
-    bcmpkt_ipv4_t_total_length_get,
-    bcmpkt_ipv4_t_ttl_get,
-    bcmpkt_ipv4_t_version_hdr_len_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_ipv4_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FID_COUNT] = {
-    bcmpkt_ipv4_t_da_set,
-    bcmpkt_ipv4_t_flags_frag_offset_set,
-    bcmpkt_ipv4_t_hdr_checksum_set,
-    bcmpkt_ipv4_t_id_set,
-    bcmpkt_ipv4_t_option_set,
-    bcmpkt_ipv4_t_protocol_set,
-    bcmpkt_ipv4_t_sa_set,
-    bcmpkt_ipv4_t_tos_set,
-    bcmpkt_ipv4_t_total_length_set,
-    bcmpkt_ipv4_t_ttl_set,
-    bcmpkt_ipv4_t_version_hdr_len_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_ipv4_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_ipv4_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_ipv4_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 20);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 20, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_ipv6_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FID_COUNT] = {
-    bcmpkt_ipv6_t_da_get,
-    bcmpkt_ipv6_t_flow_label_get,
-    bcmpkt_ipv6_t_hop_limit_get,
-    bcmpkt_ipv6_t_next_header_get,
-    bcmpkt_ipv6_t_payload_length_get,
-    bcmpkt_ipv6_t_sa_get,
-    bcmpkt_ipv6_t_traffic_class_get,
-    bcmpkt_ipv6_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_ipv6_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FID_COUNT] = {
-    bcmpkt_ipv6_t_da_set,
-    bcmpkt_ipv6_t_flow_label_set,
-    bcmpkt_ipv6_t_hop_limit_set,
-    bcmpkt_ipv6_t_next_header_set,
-    bcmpkt_ipv6_t_payload_length_set,
-    bcmpkt_ipv6_t_sa_set,
-    bcmpkt_ipv6_t_traffic_class_set,
-    bcmpkt_ipv6_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_ipv6_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_ipv6_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_ipv6_t_field_data,
-};
-
-
-static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_l2_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_FID_COUNT] = {
-    bcmpkt_l2_t_macda_get,
-    bcmpkt_l2_t_macsa_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_l2_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_FID_COUNT] = {
-    bcmpkt_l2_t_macda_set,
-    bcmpkt_l2_t_macsa_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_l2_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_l2_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_l2_t_field_data,
-};
-
-
-static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
-    bcmpkt_mirror_erspan_sn_t_seq_num_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
-    bcmpkt_mirror_erspan_sn_t_seq_num_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_field_data,
-};
-
-
-static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_mirror_transport_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
-    bcmpkt_mirror_transport_t_data_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_mirror_transport_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
-    bcmpkt_mirror_transport_t_data_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_mirror_transport_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_mirror_transport_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_mirror_transport_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_mpls_ach_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
-    bcmpkt_mpls_ach_t_channel_type_get,
-    bcmpkt_mpls_ach_t_cw_type_get,
-    bcmpkt_mpls_ach_t_reserved_get,
-    bcmpkt_mpls_ach_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_mpls_ach_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
-    bcmpkt_mpls_ach_t_channel_type_set,
-    bcmpkt_mpls_ach_t_cw_type_set,
-    bcmpkt_mpls_ach_t_reserved_set,
-    bcmpkt_mpls_ach_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_mpls_ach_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_mpls_ach_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_mpls_ach_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_mpls_bv_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
-    bcmpkt_mpls_bv_t_value_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_mpls_bv_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
-    bcmpkt_mpls_bv_t_value_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_mpls_bv_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_mpls_bv_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_mpls_bv_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 12, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_mpls_cw_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
-    bcmpkt_mpls_cw_t_cw_type_get,
-    bcmpkt_mpls_cw_t_reserved_get,
-    bcmpkt_mpls_cw_t_seq_number_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_mpls_cw_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
-    bcmpkt_mpls_cw_t_cw_type_set,
-    bcmpkt_mpls_cw_t_reserved_set,
-    bcmpkt_mpls_cw_t_seq_number_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_mpls_cw_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_mpls_cw_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_mpls_cw_t_field_data,
-};
-
-
-static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 9, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 9, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 20);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 20, val);
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_mpls_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_FID_COUNT] = {
-    bcmpkt_mpls_t_bos_get,
-    bcmpkt_mpls_t_exp_get,
-    bcmpkt_mpls_t_label_get,
-    bcmpkt_mpls_t_ttl_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_mpls_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_FID_COUNT] = {
-    bcmpkt_mpls_t_bos_set,
-    bcmpkt_mpls_t_exp_set,
-    bcmpkt_mpls_t_label_set,
-    bcmpkt_mpls_t_ttl_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_mpls_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_mpls_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_mpls_t_field_data,
-};
-
-
-static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[8], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[8], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[8], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[8], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[7], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[7], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_p_1588_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FID_COUNT] = {
-    bcmpkt_p_1588_t_cntrl_get,
-    bcmpkt_p_1588_t_correction_get,
-    bcmpkt_p_1588_t_domain_nb_get,
-    bcmpkt_p_1588_t_flags_get,
-    bcmpkt_p_1588_t_logmsginterval_get,
-    bcmpkt_p_1588_t_msg_length_get,
-    bcmpkt_p_1588_t_msg_type_get,
-    bcmpkt_p_1588_t_reserved1_get,
-    bcmpkt_p_1588_t_reserved2_get,
-    bcmpkt_p_1588_t_reserved3_get,
-    bcmpkt_p_1588_t_seq_id_get,
-    bcmpkt_p_1588_t_srcportid_get,
-    bcmpkt_p_1588_t_transportspec_get,
-    bcmpkt_p_1588_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_p_1588_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FID_COUNT] = {
-    bcmpkt_p_1588_t_cntrl_set,
-    bcmpkt_p_1588_t_correction_set,
-    bcmpkt_p_1588_t_domain_nb_set,
-    bcmpkt_p_1588_t_flags_set,
-    bcmpkt_p_1588_t_logmsginterval_set,
-    bcmpkt_p_1588_t_msg_length_set,
-    bcmpkt_p_1588_t_msg_type_set,
-    bcmpkt_p_1588_t_reserved1_set,
-    bcmpkt_p_1588_t_reserved2_set,
-    bcmpkt_p_1588_t_reserved3_set,
-    bcmpkt_p_1588_t_seq_id_set,
-    bcmpkt_p_1588_t_srcportid_set,
-    bcmpkt_p_1588_t_transportspec_set,
-    bcmpkt_p_1588_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_p_1588_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_p_1588_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_p_1588_t_field_data,
-};
-
-
-static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
-    bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
-    bcmpkt_prog_ext_hdr_t_next_header_get,
-    bcmpkt_prog_ext_hdr_t_option_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
-    bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
-    bcmpkt_prog_ext_hdr_t_next_header_set,
-    bcmpkt_prog_ext_hdr_t_option_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_psamp_0_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_0_t_flowset_get,
-    bcmpkt_psamp_0_t_length_get,
-    bcmpkt_psamp_0_t_next_hop_index_get,
-    bcmpkt_psamp_0_t_obs_time_ns_get,
-    bcmpkt_psamp_0_t_obs_time_s_get,
-    bcmpkt_psamp_0_t_template_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_psamp_0_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_0_t_flowset_set,
-    bcmpkt_psamp_0_t_length_set,
-    bcmpkt_psamp_0_t_next_hop_index_set,
-    bcmpkt_psamp_0_t_obs_time_ns_set,
-    bcmpkt_psamp_0_t_obs_time_s_set,
-    bcmpkt_psamp_0_t_template_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_psamp_0_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_psamp_0_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_psamp_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_psamp_1_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_1_t_dlb_id_get,
-    bcmpkt_psamp_1_t_egress_port_get,
-    bcmpkt_psamp_1_t_epoch_get,
-    bcmpkt_psamp_1_t_ingress_port_get,
-    bcmpkt_psamp_1_t_sampled_length_get,
-    bcmpkt_psamp_1_t_user_meta_data_get,
-    bcmpkt_psamp_1_t_variable_flag_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_psamp_1_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_1_t_dlb_id_set,
-    bcmpkt_psamp_1_t_egress_port_set,
-    bcmpkt_psamp_1_t_epoch_set,
-    bcmpkt_psamp_1_t_ingress_port_set,
-    bcmpkt_psamp_1_t_sampled_length_set,
-    bcmpkt_psamp_1_t_user_meta_data_set,
-    bcmpkt_psamp_1_t_variable_flag_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_psamp_1_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_psamp_1_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_psamp_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get,
-    bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get,
-    bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get,
-    bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get,
-    bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get,
-    bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set,
-    bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set,
-    bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set,
-    bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set,
-    bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set,
-    bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_field_data,
-};
-
-
-static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_rarp_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_FID_COUNT] = {
-    bcmpkt_rarp_t_hardware_len_get,
-    bcmpkt_rarp_t_hardware_type_get,
-    bcmpkt_rarp_t_operation_get,
-    bcmpkt_rarp_t_prot_addr_len_get,
-    bcmpkt_rarp_t_protocol_type_get,
-    bcmpkt_rarp_t_sender_ha_get,
-    bcmpkt_rarp_t_sender_ip_get,
-    bcmpkt_rarp_t_target_ha_get,
-    bcmpkt_rarp_t_target_ip_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_rarp_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_FID_COUNT] = {
-    bcmpkt_rarp_t_hardware_len_set,
-    bcmpkt_rarp_t_hardware_type_set,
-    bcmpkt_rarp_t_operation_set,
-    bcmpkt_rarp_t_prot_addr_len_set,
-    bcmpkt_rarp_t_protocol_type_set,
-    bcmpkt_rarp_t_sender_ha_set,
-    bcmpkt_rarp_t_sender_ip_set,
-    bcmpkt_rarp_t_target_ha_set,
-    bcmpkt_rarp_t_target_ip_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_rarp_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_rarp_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_rarp_t_field_data,
-};
-
-
-static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_routing_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_FID_COUNT] = {
-    bcmpkt_routing_t_data_get,
-    bcmpkt_routing_t_hdr_ext_len_get,
-    bcmpkt_routing_t_next_header_get,
-    bcmpkt_routing_t_routing_type_get,
-    bcmpkt_routing_t_segments_left_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_routing_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_FID_COUNT] = {
-    bcmpkt_routing_t_data_set,
-    bcmpkt_routing_t_hdr_ext_len_set,
-    bcmpkt_routing_t_next_header_set,
-    bcmpkt_routing_t_routing_type_set,
-    bcmpkt_routing_t_segments_left_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_routing_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_routing_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_routing_t_field_data,
-};
-
-
-static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_rspan_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_FID_COUNT] = {
-    bcmpkt_rspan_t_tag_get,
-    bcmpkt_rspan_t_tpid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_rspan_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_FID_COUNT] = {
-    bcmpkt_rspan_t_tag_set,
-    bcmpkt_rspan_t_tpid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_rspan_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_rspan_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_rspan_t_field_data,
-};
-
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_0_t_sys_destination_get,
-    bcmpkt_sflow_shim_0_t_sys_source_get,
-    bcmpkt_sflow_shim_0_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_0_t_sys_destination_set,
-    bcmpkt_sflow_shim_0_t_sys_source_set,
-    bcmpkt_sflow_shim_0_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 30, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 30, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 27, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 27, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 29, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 29, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 31, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 31, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 26, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 26, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 7);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 7, val);
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 23, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 23, 3, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
-    bcmpkt_sflow_shim_1_t_flag_discarded_get,
-    bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
-    bcmpkt_sflow_shim_1_t_flag_mcast_get,
-    bcmpkt_sflow_shim_1_t_flag_src_sample_get,
-    bcmpkt_sflow_shim_1_t_flag_truncated_get,
-    bcmpkt_sflow_shim_1_t_reserved_get,
-    bcmpkt_sflow_shim_1_t_sys_opcode_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
-    bcmpkt_sflow_shim_1_t_flag_discarded_set,
-    bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
-    bcmpkt_sflow_shim_1_t_flag_mcast_set,
-    bcmpkt_sflow_shim_1_t_flag_src_sample_set,
-    bcmpkt_sflow_shim_1_t_flag_truncated_set,
-    bcmpkt_sflow_shim_1_t_reserved_set,
-    bcmpkt_sflow_shim_1_t_sys_opcode_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_2_t_sequence_num_get,
-    bcmpkt_sflow_shim_2_t_user_meta_data_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
-    bcmpkt_sflow_shim_2_t_sequence_num_set,
-    bcmpkt_sflow_shim_2_t_user_meta_data_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_field_data,
-};
-
-
-static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_snap_llc_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
-    bcmpkt_snap_llc_t_length_get,
-    bcmpkt_snap_llc_t_snap_llc_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_snap_llc_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
-    bcmpkt_snap_llc_t_length_set,
-    bcmpkt_snap_llc_t_snap_llc_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_snap_llc_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_snap_llc_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_snap_llc_t_field_data,
-};
-
-
-static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_first_4bytes_t_dst_port_get,
-    bcmpkt_tcp_first_4bytes_t_src_port_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_first_4bytes_t_dst_port_set,
-    bcmpkt_tcp_first_4bytes_t_src_port_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_field_data,
-};
-
-
-static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_last_16bytes_t_ack_num_get,
-    bcmpkt_tcp_last_16bytes_t_checksum_get,
-    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
-    bcmpkt_tcp_last_16bytes_t_seq_num_get,
-    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
-    bcmpkt_tcp_last_16bytes_t_win_size_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_last_16bytes_t_ack_num_set,
-    bcmpkt_tcp_last_16bytes_t_checksum_set,
-    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
-    bcmpkt_tcp_last_16bytes_t_seq_num_set,
-    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
-    bcmpkt_tcp_last_16bytes_t_win_size_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_field_data,
-};
-
-
-static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_udp_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_FID_COUNT] = {
-    bcmpkt_udp_t_checksum_get,
-    bcmpkt_udp_t_dst_port_get,
-    bcmpkt_udp_t_src_port_get,
-    bcmpkt_udp_t_udp_length_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_udp_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_FID_COUNT] = {
-    bcmpkt_udp_t_checksum_set,
-    bcmpkt_udp_t_dst_port_set,
-    bcmpkt_udp_t_src_port_set,
-    bcmpkt_udp_t_udp_length_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_udp_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_udp_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_udp_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_unknown_l3_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
-    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
-    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_unknown_l3_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
-    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
-    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_unknown_l3_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_unknown_l3_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_unknown_l3_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_unknown_l4_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
-    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_unknown_l4_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
-    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_unknown_l4_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_unknown_l4_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_unknown_l4_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_unknown_l5_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
-    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
-    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
-    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_unknown_l5_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
-    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
-    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
-    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_unknown_l5_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_unknown_l5_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_unknown_l5_t_field_data,
-};
-
-
-static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 13, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 13, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 12, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_vlan_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_FID_COUNT] = {
-    bcmpkt_vlan_t_cfi_get,
-    bcmpkt_vlan_t_pcp_get,
-    bcmpkt_vlan_t_tpid_get,
-    bcmpkt_vlan_t_vid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_vlan_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_FID_COUNT] = {
-    bcmpkt_vlan_t_cfi_set,
-    bcmpkt_vlan_t_pcp_set,
-    bcmpkt_vlan_t_tpid_set,
-    bcmpkt_vlan_t_vid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_vlan_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_vlan_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_vlan_t_field_data,
-};
-
-
-static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_vntag_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_FID_COUNT] = {
-    bcmpkt_vntag_t_tag_get,
-    bcmpkt_vntag_t_tpid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_vntag_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_FID_COUNT] = {
-    bcmpkt_vntag_t_tag_set,
-    bcmpkt_vntag_t_tpid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_vntag_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_vntag_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_vntag_t_field_data,
-};
-
-
-static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 24);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 24, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_vxlan_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FID_COUNT] = {
-    bcmpkt_vxlan_t_flags_reserved_1_get,
-    bcmpkt_vxlan_t_reserved2_get,
-    bcmpkt_vxlan_t_vn_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_vxlan_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FID_COUNT] = {
-    bcmpkt_vxlan_t_flags_reserved_1_set,
-    bcmpkt_vxlan_t_reserved2_set,
-    bcmpkt_vxlan_t_vn_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_vxlan_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_vxlan_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_vxlan_t_field_data,
-};
-
-
-static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_wesp_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FID_COUNT] = {
-    bcmpkt_wesp_t_flags_get,
-    bcmpkt_wesp_t_header_len_get,
-    bcmpkt_wesp_t_next_header_get,
-    bcmpkt_wesp_t_seq_num_get,
-    bcmpkt_wesp_t_spi_get,
-    bcmpkt_wesp_t_trailer_len_get,
-    bcmpkt_wesp_t_wesp_iv_get,
-};
-
-bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_wesp_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FID_COUNT] = {
-    bcmpkt_wesp_t_flags_set,
-    bcmpkt_wesp_t_header_len_set,
-    bcmpkt_wesp_t_next_header_set,
-    bcmpkt_wesp_t_seq_num_set,
-    bcmpkt_wesp_t_spi_set,
-    bcmpkt_wesp_t_trailer_len_set,
-    bcmpkt_wesp_t_wesp_iv_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_wesp_t_field_data[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_wesp_t_field_info = {
-    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FID_COUNT,
-    .info = bcm56780_a0_ina_2_6_11_0_wesp_t_field_data,
-};
-
-static bcmpkt_flex_pmd_info_t bcm56780_a0_ina_2_6_11_0_flexhdr_info_list[BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_COUNT] = {
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_arp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_arp_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_arp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_authen_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_authen_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_authen_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_bfd_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_bfd_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_bfd_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_cntag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_cntag_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_cntag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_dest_option_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_dest_option_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_dest_option_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_esp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_esp_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_esp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_etag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_etag_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_etag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_ethertype_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_ethertype_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_ethertype_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_frag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_frag_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_frag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_generic_loopback_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_generic_loopback_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_generic_loopback_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_gpe_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_gpe_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_gpe_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_gre_chksum_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_gre_chksum_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_gre_chksum_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_gre_key_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_gre_key_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_gre_key_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_gre_rout_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_gre_rout_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_gre_rout_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_gre_seq_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_gre_seq_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_gre_seq_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_gre_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_gre_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_gre_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_hg3_base_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_hg3_base_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_hg3_base_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_icmp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_icmp_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_icmp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_ifa_header_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_ifa_header_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_ifa_header_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_igmp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_igmp_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_igmp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_ipfix_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_ipfix_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_ipfix_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_ipv4_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_ipv4_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_ipv4_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_ipv6_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_ipv6_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_ipv6_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_l2_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_l2_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_l2_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_mirror_transport_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_mirror_transport_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_mirror_transport_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_mpls_ach_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_mpls_ach_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_mpls_ach_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_mpls_bv_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_mpls_bv_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_mpls_bv_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_mpls_cw_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_mpls_cw_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_mpls_cw_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_mpls_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_mpls_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_mpls_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_p_1588_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_p_1588_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_p_1588_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_psamp_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_psamp_0_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_psamp_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_psamp_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_psamp_1_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_psamp_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_rarp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_rarp_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_rarp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_routing_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_routing_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_routing_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_rspan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_rspan_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_rspan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_snap_llc_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_snap_llc_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_snap_llc_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_udp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_udp_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_udp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_unknown_l3_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_unknown_l3_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_unknown_l3_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_unknown_l4_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_unknown_l4_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_unknown_l4_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_unknown_l5_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_unknown_l5_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_unknown_l5_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_vlan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_vlan_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_vlan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_vntag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_vntag_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_vntag_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_vxlan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_vxlan_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_vxlan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_wesp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56780_a0_ina_2_6_11_0_wesp_t_fget,
-        .flex_fset = bcm56780_a0_ina_2_6_11_0_wesp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56780_a0_ina_2_6_11_0_rxpmd_flex_field_info,
-        .reasons_info = &bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reasons_info,
-        .flex_common_fget = bcm56780_a0_rxpmd_flex_fget,
-        .flex_common_fset = bcm56780_a0_rxpmd_flex_fset,
-    },
-};
-
-static shr_enum_map_t bcm56780_a0_ina_2_6_11_0_flexhdr_id_map[] = {
-    BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
-};
-
-shr_enum_map_t * bcm56780_a0_ina_2_6_11_0_flexhdr_map_get(void)
-{
-    return bcm56780_a0_ina_2_6_11_0_flexhdr_id_map;
-}
-
-bcmpkt_flex_pmd_info_t * bcm56780_a0_ina_2_6_11_0_flex_pmd_info_get(uint32_t hid)
-{
-    if (hid >= BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_COUNT) {
-        return NULL;
-    }
-
-    return &bcm56780_a0_ina_2_6_11_0_flexhdr_info_list[hid];
-}
-
-int bcm56780_a0_ina_2_6_11_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
-    14,
-    21,
-    22,
-    62,
-};
\ No newline at end of file
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c
deleted file mode 100644
index 6b99aee829c9..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c
+++ /dev/null
@@ -1,1108 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56880_a0_cna_6_5_29_sf_match_id_info.yml
- * for device bcm56880_a0 and variant cna_6_5_29.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-
-#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-#include <bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h>
-
-
-static bcmpkt_rxpmd_match_id_db_t
-bcm56880_a0_cna_6_5_29_rxpmd_match_id_db[BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT] = {
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 13,
-        .match_minbit = 11,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 37,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 13,
-        .match_minbit = 11,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 37,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7,
-        .match_maxbit = 13,
-        .match_minbit = 11,
-        .maxbit       = 2,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 37,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
-        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 13,
-        .match_minbit = 11,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 37,
-        .pminbit      = 35,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
-        .match        = 0x20,
-        .match_mask   = 0x66,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
-        .match        = 0x40,
-        .match_mask   = 0x66,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
-        .match        = 0x8,
-        .match_mask   = 0x18,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
-        .match        = 0x10,
-        .match_mask   = 0x18,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7f,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 6,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
-        .match        = 0x2,
-        .match_mask   = 0x6,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x4,
-        .match_mask   = 0x6,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x24,
-        .match_mask   = 0x66,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
-        .match        = 0x6,
-        .match_mask   = 0x6,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x18,
-        .match_mask   = 0x18,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x3,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x46,
-        .match_mask   = 0x66,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
-        .match        = 0x26,
-        .match_mask   = 0x66,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 55,
-        .pminbit      = 49,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
-        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 0,
-        .match_minbit = 0,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 0,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
-        .name         = "EGRESS_PKT_SYS_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x1,
-        .match_maxbit = 0,
-        .match_minbit = 0,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 0,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 3,
-        .match_minbit = 1,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 3,
-        .match_minbit = 1,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7,
-        .match_maxbit = 3,
-        .match_minbit = 1,
-        .maxbit       = 2,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 9,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
-        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 3,
-        .match_minbit = 1,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 9,
-        .pminbit      = 7,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
-        .match        = 0x20,
-        .match_mask   = 0x66,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
-        .match        = 0x40,
-        .match_mask   = 0x66,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
-        .match        = 0x8,
-        .match_mask   = 0x18,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
-        .match        = 0x10,
-        .match_mask   = 0x18,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7f,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 6,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
-        .match        = 0x2,
-        .match_mask   = 0x6,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x4,
-        .match_mask   = 0x6,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x24,
-        .match_mask   = 0x66,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
-        .match        = 0x6,
-        .match_mask   = 0x6,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x3,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x18,
-        .match_mask   = 0x18,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x3,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x46,
-        .match_mask   = 0x66,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
-        .match        = 0x26,
-        .match_mask   = 0x66,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 27,
-        .pminbit      = 21,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 13,
-        .match_minbit = 11,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 13,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 13,
-        .match_minbit = 11,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 13,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7,
-        .match_maxbit = 13,
-        .match_minbit = 11,
-        .maxbit       = 2,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 13,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
-        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 13,
-        .match_minbit = 11,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 13,
-        .pminbit      = 11,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
-        .match        = 0x20,
-        .match_mask   = 0x66,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 14,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 14,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
-        .match        = 0x40,
-        .match_mask   = 0x66,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 20,
-        .pminbit      = 14,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
-        .match        = 0x8,
-        .match_mask   = 0x18,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 14,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
-        .match        = 0x10,
-        .match_mask   = 0x18,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 20,
-        .pminbit      = 14,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7f,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 6,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 20,
-        .pminbit      = 14,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
-        .match        = 0x2,
-        .match_mask   = 0x6,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 14,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x4,
-        .match_mask   = 0x6,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 20,
-        .pminbit      = 14,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x24,
-        .match_mask   = 0x66,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 20,
-        .pminbit      = 14,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
-        .match        = 0x6,
-        .match_mask   = 0x6,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x3,
-        .pmaxbit      = 20,
-        .pminbit      = 14,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x18,
-        .match_mask   = 0x18,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 20,
-        .pminbit      = 14,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x3,
-        .pmaxbit      = 20,
-        .pminbit      = 14,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x46,
-        .match_mask   = 0x66,
-        .match_maxbit = 20,
-        .match_minbit = 14,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 20,
-        .pminbit      = 14,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
-        .match        = 0x2,
-        .match_mask   = 0x2,
-        .match_maxbit = 3,
-        .match_minbit = 1,
-        .maxbit       = 1,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 3,
-        .pminbit      = 1,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 3,
-        .match_minbit = 1,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 3,
-        .pminbit      = 1,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7,
-        .match_maxbit = 3,
-        .match_minbit = 1,
-        .maxbit       = 2,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 3,
-        .pminbit      = 1,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
-        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
-        .match        = 0x4,
-        .match_mask   = 0x4,
-        .match_maxbit = 3,
-        .match_minbit = 1,
-        .maxbit       = 2,
-        .minbit       = 2,
-        .value        = 0x1,
-        .pmaxbit      = 3,
-        .pminbit      = 1,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
-        .match        = 0x20,
-        .match_mask   = 0x66,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 10,
-        .pminbit      = 4,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 10,
-        .pminbit      = 4,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
-        .match        = 0x40,
-        .match_mask   = 0x66,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 10,
-        .pminbit      = 4,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
-        .match        = 0x8,
-        .match_mask   = 0x18,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x1,
-        .pmaxbit      = 10,
-        .pminbit      = 4,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
-        .match        = 0x10,
-        .match_mask   = 0x18,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x2,
-        .pmaxbit      = 10,
-        .pminbit      = 4,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x7f,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 6,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 10,
-        .pminbit      = 4,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
-        .match        = 0x2,
-        .match_mask   = 0x6,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x1,
-        .pmaxbit      = 10,
-        .pminbit      = 4,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x4,
-        .match_mask   = 0x6,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
-        .pmaxbit      = 10,
-        .pminbit      = 4,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x24,
-        .match_mask   = 0x66,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 10,
-        .pminbit      = 4,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
-        .match        = 0x6,
-        .match_mask   = 0x6,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x3,
-        .pmaxbit      = 10,
-        .pminbit      = 4,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
-        .match        = 0x18,
-        .match_mask   = 0x18,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 4,
-        .minbit       = 3,
-        .value        = 0x3,
-        .pmaxbit      = 10,
-        .pminbit      = 4,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
-        .match        = 0x60,
-        .match_mask   = 0x60,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x3,
-        .pmaxbit      = 10,
-        .pminbit      = 4,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x46,
-        .match_mask   = 0x66,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x2,
-        .pmaxbit      = 10,
-        .pminbit      = 4,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
-        .match        = 0x26,
-        .match_mask   = 0x66,
-        .match_maxbit = 10,
-        .match_minbit = 4,
-        .maxbit       = 6,
-        .minbit       = 5,
-        .value        = 0x1,
-        .pmaxbit      = 10,
-        .pminbit      = 4,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
-        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
-        .match        = 0x1,
-        .match_mask   = 0x1,
-        .match_maxbit = 0,
-        .match_minbit = 0,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x1,
-        .pmaxbit      = 0,
-        .pminbit      = 0,
-
-    },
-    {
-        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
-        .name         = "INGRESS_PKT_SYS_HDR_NONE",
-        .match        = 0x0,
-        .match_mask   = 0x1,
-        .match_maxbit = 0,
-        .match_minbit = 0,
-        .maxbit       = 0,
-        .minbit       = 0,
-        .value        = 0x0,
-        .pmaxbit      = 0,
-        .pminbit      = 0,
-
-    },
-};
-
-static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_cna_6_5_29_rxpmd_match_id_db_info = {
-    .num_entries = 75,
-    .db = bcm56880_a0_cna_6_5_29_rxpmd_match_id_db
-};
-bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_cna_6_5_29_rxpmd_match_id_db_info_get(void) {
-    return &bcm56880_a0_cna_6_5_29_rxpmd_match_id_db_info;
-}
-
-static shr_enum_map_t bcm56880_a0_cna_6_5_29_rxpmd_match_id_map[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_cna_6_5_29_rxpmd_match_id_map_info = {
-    .num_entries = 75,
-    .map = bcm56880_a0_cna_6_5_29_rxpmd_match_id_map
-};
-
-bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_cna_6_5_29_rxpmd_match_id_map_info_get(void) {
-    return &bcm56880_a0_cna_6_5_29_rxpmd_match_id_map_info;
-}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_pkt_flexhdr.c
deleted file mode 100644
index a5b46c58a295..000000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_pkt_flexhdr.c
+++ /dev/null
@@ -1,3453 +0,0 @@
-/*****************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) map.yml
- * for device bcm56880_a0 and variant cna_6_5_29.
- * Edits to this file will be lost when it is regenerated.
- *
- * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- * All Rights Reserved.$
- *
- * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
- *
- ****************************************************************/
-
-#include <sal/sal_types.h>
-#include <shr/shr_error.h>
-#include <bcmpkt/bcmpkt_flexhdr.h>
-#include <bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h>
-#include <bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr.h>
-#include <bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr_data.h>
-#include <bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h>
-
-#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
-#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
-#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
-#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
-
-static void bcm56880_a0_cna_6_5_29_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
-{
-    uint32_t *reason = data + 0;
-
-    if (reason[12] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
-    }
-    if (reason[12] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
-    }
-    if (reason[12] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
-    }
-    if (reason[12] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD);
-    }
-    if (reason[12] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST);
-    }
-    if (reason[12] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
-    }
-    if (reason[12] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
-    }
-    if (reason[12] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
-    }
-    if (reason[12] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
-    }
-    if (reason[12] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
-    }
-    if (reason[12] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
-    }
-    if (reason[12] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
-    }
-    if (reason[12] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
-    }
-    if (reason[12] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
-    }
-    if (reason[12] & (0x1 << 14)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
-    }
-    if (reason[12] & (0x1 << 16)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
-    }
-    if (reason[12] & (0x1 << 17)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP);
-    }
-    if (reason[12] & (0x1 << 18)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP);
-    }
-    if (reason[12] & (0x1 << 19)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
-    }
-    if (reason[12] & (0x1 << 23)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
-    }
-    if (reason[11] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
-    }
-}
-
-static void bcm56880_a0_cna_6_5_29_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
-{
-    uint32_t *reason = data + 0;
-
-    reason[12] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
-        reason[12] |= (0x1 << 0);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
-        reason[12] |= (0x1 << 1);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
-        reason[12] |= (0x1 << 2);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) {
-        reason[12] |= (0x1 << 3);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) {
-        reason[12] |= (0x1 << 4);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
-        reason[12] |= (0x1 << 5);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
-        reason[12] |= (0x1 << 6);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
-        reason[12] |= (0x1 << 7);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
-        reason[12] |= (0x1 << 8);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
-        reason[12] |= (0x1 << 9);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
-        reason[12] |= (0x1 << 10);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
-        reason[12] |= (0x1 << 11);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
-        reason[12] |= (0x1 << 12);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
-        reason[12] |= (0x1 << 13);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
-        reason[12] |= (0x1 << 14);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
-        reason[12] |= (0x1 << 16);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
-        reason[12] |= (0x1 << 17);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
-        reason[12] |= (0x1 << 18);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
-        reason[12] |= (0x1 << 19);
-    }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
-        reason[12] |= (0x1 << 23);
-    }
-    reason[11] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
-        reason[11] |= (0x1 << 15);
-    }
-}
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_rxpmd_flex_field_data[] = {
-    {
-        .name = "DROP_CODE_15_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 48, 63 }, /* Profile 2. */
-            { 48, 63 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "DVP_15_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DVP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 192, 207 }, /* Profile 2. */
-            { 176, 191 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "EFFECTIVE_TTL_7_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 224, 231 }, /* Profile 2. */
-            { 208, 215 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "ENTROPY_LABEL_HIGH_3_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 376, 379 }, /* Profile 2. */
-            { 344, 347 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "ENTROPY_LABEL_LOW_15_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 112, 127 }, /* Profile 2. */
-            { 112, 127 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "ERSPAN3_GBP_SID_15_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 96, 111 }, /* Profile 2. */
-            { 96, 111 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "EVENT_TRACE_VECTOR_31_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 0, 31 }, /* Profile 2. */
-            { 0, 31 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "EVENT_TRACE_VECTOR_47_32",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 32, 47 }, /* Profile 2. */
-            { 32, 47 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "I2E_CLASS_ID_15_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 288, 303 }, /* Profile 2. */
-            { 272, 287 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "INGRESS_PP_PORT_7_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 208, 215 }, /* Profile 2. */
-            { 192, 199 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 128, 143 }, /* Profile 2. */
-            { 128, 143 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "INGRESS_QOS_REMARK_CTRL_3_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 368, 371 }, /* Profile 2. */
-            { 336, 339 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "INT_PRI_3_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 380, 383 }, /* Profile 2. */
-            { 348, 351 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "L2_IIF_10_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 272, 282 }, /* Profile 2. */
-            { 256, 266 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "L2_OIF_10_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 160, 170 }, /* Profile 2. */
-            { 160, 170 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "L2_TUNNEL_SVP_15_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 256, 271 }, /* Profile 2. */
-            { 240, 255 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "L3_IIF_13_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 304, 317 }, /* Profile 2. */
-            { 288, 301 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "L3_OIF_1_13_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 176, 189 }, /* Profile 2. */
-        },
-        .profile_cnt = 3,
-    },
-    {
-        .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 80, 94 }, /* Profile 2. */
-            { 80, 94 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "NHOP_INDEX_1_14_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 320, 334 }, /* Profile 2. */
-        },
-        .profile_cnt = 3,
-    },
-    {
-        .name = "PARSER_VHLEN_0_15_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 64, 79 }, /* Profile 2. */
-            { 64, 79 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "PKT_MISC_CTRL_0_3_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 364, 367 }, /* Profile 2. */
-            { 332, 335 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 356, 359 }, /* Profile 2. */
-            { 324, 327 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "SYSTEM_DESTINATION_15_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 336, 351 }, /* Profile 2. */
-            { 304, 319 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "SYSTEM_OPCODE_3_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 372, 375 }, /* Profile 2. */
-            { 340, 343 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "SYSTEM_SOURCE_15_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 240, 255 }, /* Profile 2. */
-            { 224, 239 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "TAG_ACTION_CTRL_1_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 352, 353 }, /* Profile 2. */
-            { 320, 321 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 360, 363 }, /* Profile 2. */
-            { 328, 331 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-    {
-        .name = "VFI_15_0",
-        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_VFI_15_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 144, 159 }, /* Profile 2. */
-            { 144, 159 }, /* Profile 3. */
-        },
-        .profile_cnt = 4,
-    },
-};static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_rxpmd_flex_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_rxpmd_flex_field_data,
-};
-
-static shr_enum_map_t bcm56880_a0_cna_6_5_29_rxpmd_flex_reason_names[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_reasons_info_t bcm56880_a0_cna_6_5_29_rxpmd_flex_reasons_info = {
-    .num_reasons = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT,
-    .reason_names = bcm56880_a0_cna_6_5_29_rxpmd_flex_reason_names,
-    .reason_encode = bcm56880_a0_cna_6_5_29_rxpmd_flex_reason_encode,
-    .reason_decode = bcm56880_a0_cna_6_5_29_rxpmd_flex_reason_decode,
-};
-
-
-static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_arp_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT] = {
-    bcmpkt_arp_t_hardware_len_get,
-    bcmpkt_arp_t_hardware_type_get,
-    bcmpkt_arp_t_operation_get,
-    bcmpkt_arp_t_prot_addr_len_get,
-    bcmpkt_arp_t_protocol_type_get,
-    bcmpkt_arp_t_sender_ha_get,
-    bcmpkt_arp_t_sender_ip_get,
-    bcmpkt_arp_t_target_ha_get,
-    bcmpkt_arp_t_target_ip_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_arp_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT] = {
-    bcmpkt_arp_t_hardware_len_set,
-    bcmpkt_arp_t_hardware_type_set,
-    bcmpkt_arp_t_operation_set,
-    bcmpkt_arp_t_prot_addr_len_set,
-    bcmpkt_arp_t_protocol_type_set,
-    bcmpkt_arp_t_sender_ha_set,
-    bcmpkt_arp_t_sender_ip_set,
-    bcmpkt_arp_t_target_ha_set,
-    bcmpkt_arp_t_target_ip_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_arp_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_arp_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_arp_t_field_data,
-};
-
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_cpu_composites_0_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_0_t_dma_cont0_get,
-    bcmpkt_cpu_composites_0_t_dma_cont1_get,
-    bcmpkt_cpu_composites_0_t_dma_cont2_get,
-    bcmpkt_cpu_composites_0_t_dma_cont3_get,
-    bcmpkt_cpu_composites_0_t_dma_cont4_get,
-    bcmpkt_cpu_composites_0_t_dma_cont5_get,
-    bcmpkt_cpu_composites_0_t_dma_cont6_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_cpu_composites_0_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_0_t_dma_cont0_set,
-    bcmpkt_cpu_composites_0_t_dma_cont1_set,
-    bcmpkt_cpu_composites_0_t_dma_cont2_set,
-    bcmpkt_cpu_composites_0_t_dma_cont3_set,
-    bcmpkt_cpu_composites_0_t_dma_cont4_set,
-    bcmpkt_cpu_composites_0_t_dma_cont5_set,
-    bcmpkt_cpu_composites_0_t_dma_cont6_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_cpu_composites_0_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_cpu_composites_0_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_cpu_composites_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_cpu_composites_1_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_1_t_dma_cont10_get,
-    bcmpkt_cpu_composites_1_t_dma_cont11_get,
-    bcmpkt_cpu_composites_1_t_dma_cont12_get,
-    bcmpkt_cpu_composites_1_t_dma_cont13_get,
-    bcmpkt_cpu_composites_1_t_dma_cont14_get,
-    bcmpkt_cpu_composites_1_t_dma_cont15_get,
-    bcmpkt_cpu_composites_1_t_dma_cont16_get,
-    bcmpkt_cpu_composites_1_t_dma_cont17_get,
-    bcmpkt_cpu_composites_1_t_dma_cont7_get,
-    bcmpkt_cpu_composites_1_t_dma_cont8_get,
-    bcmpkt_cpu_composites_1_t_dma_cont9_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_cpu_composites_1_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
-    bcmpkt_cpu_composites_1_t_dma_cont10_set,
-    bcmpkt_cpu_composites_1_t_dma_cont11_set,
-    bcmpkt_cpu_composites_1_t_dma_cont12_set,
-    bcmpkt_cpu_composites_1_t_dma_cont13_set,
-    bcmpkt_cpu_composites_1_t_dma_cont14_set,
-    bcmpkt_cpu_composites_1_t_dma_cont15_set,
-    bcmpkt_cpu_composites_1_t_dma_cont16_set,
-    bcmpkt_cpu_composites_1_t_dma_cont17_set,
-    bcmpkt_cpu_composites_1_t_dma_cont7_set,
-    bcmpkt_cpu_composites_1_t_dma_cont8_set,
-    bcmpkt_cpu_composites_1_t_dma_cont9_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_cpu_composites_1_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_cpu_composites_1_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_cpu_composites_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 11, 2);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 11, 2, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 13, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 13, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 10, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 10, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 12, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
-    bcmpkt_erspan3_fixed_hdr_t_bso_get,
-    bcmpkt_erspan3_fixed_hdr_t_cos_get,
-    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
-    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
-    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
-    bcmpkt_erspan3_fixed_hdr_t_t_get,
-    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
-    bcmpkt_erspan3_fixed_hdr_t_ver_get,
-    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
-    bcmpkt_erspan3_fixed_hdr_t_bso_set,
-    bcmpkt_erspan3_fixed_hdr_t_cos_set,
-    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
-    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
-    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
-    bcmpkt_erspan3_fixed_hdr_t_t_set,
-    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
-    bcmpkt_erspan3_fixed_hdr_t_ver_set,
-    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_data,
-};
-
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 26, 6);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 26, 6, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 10);
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 10, val);
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
-    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
-    bcmpkt_erspan3_subhdr_5_t_port_id_get,
-    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
-    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
-    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
-    bcmpkt_erspan3_subhdr_5_t_port_id_set,
-    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
-    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_field_data,
-};
-
-
-static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_ethertype_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
-    bcmpkt_ethertype_t_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_ethertype_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
-    bcmpkt_ethertype_t_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_ethertype_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_ethertype_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_ethertype_t_field_data,
-};
-
-
-static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 4, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 4, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 28, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 8, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 8, 4, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_generic_loopback_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
-    bcmpkt_generic_loopback_t_destination_obj_get,
-    bcmpkt_generic_loopback_t_destination_type_get,
-    bcmpkt_generic_loopback_t_entropy_obj_get,
-    bcmpkt_generic_loopback_t_flags_get,
-    bcmpkt_generic_loopback_t_header_type_get,
-    bcmpkt_generic_loopback_t_input_priority_get,
-    bcmpkt_generic_loopback_t_interface_ctrl_get,
-    bcmpkt_generic_loopback_t_interface_obj_get,
-    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
-    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
-    bcmpkt_generic_loopback_t_qos_obj_get,
-    bcmpkt_generic_loopback_t_reserved_1_get,
-    bcmpkt_generic_loopback_t_reserved_2_get,
-    bcmpkt_generic_loopback_t_source_system_port_get,
-    bcmpkt_generic_loopback_t_start_byte_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_generic_loopback_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
-    bcmpkt_generic_loopback_t_destination_obj_set,
-    bcmpkt_generic_loopback_t_destination_type_set,
-    bcmpkt_generic_loopback_t_entropy_obj_set,
-    bcmpkt_generic_loopback_t_flags_set,
-    bcmpkt_generic_loopback_t_header_type_set,
-    bcmpkt_generic_loopback_t_input_priority_set,
-    bcmpkt_generic_loopback_t_interface_ctrl_set,
-    bcmpkt_generic_loopback_t_interface_obj_set,
-    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
-    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
-    bcmpkt_generic_loopback_t_qos_obj_set,
-    bcmpkt_generic_loopback_t_reserved_1_set,
-    bcmpkt_generic_loopback_t_reserved_2_set,
-    bcmpkt_generic_loopback_t_source_system_port_set,
-    bcmpkt_generic_loopback_t_start_byte_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_generic_loopback_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_generic_loopback_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_generic_loopback_t_field_data,
-};
-
-
-static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_icmp_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT] = {
-    bcmpkt_icmp_t_checksum_get,
-    bcmpkt_icmp_t_code_get,
-    bcmpkt_icmp_t_icmp_type_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_icmp_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT] = {
-    bcmpkt_icmp_t_checksum_set,
-    bcmpkt_icmp_t_code_set,
-    bcmpkt_icmp_t_icmp_type_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_icmp_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_icmp_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_icmp_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_ipfix_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT] = {
-    bcmpkt_ipfix_t_export_time_get,
-    bcmpkt_ipfix_t_length_get,
-    bcmpkt_ipfix_t_obs_domain_id_get,
-    bcmpkt_ipfix_t_sequence_num_get,
-    bcmpkt_ipfix_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_ipfix_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT] = {
-    bcmpkt_ipfix_t_export_time_set,
-    bcmpkt_ipfix_t_length_set,
-    bcmpkt_ipfix_t_obs_domain_id_set,
-    bcmpkt_ipfix_t_sequence_num_set,
-    bcmpkt_ipfix_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_ipfix_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_ipfix_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_ipfix_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_ipv4_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT] = {
-    bcmpkt_ipv4_t_da_get,
-    bcmpkt_ipv4_t_flags_frag_offset_get,
-    bcmpkt_ipv4_t_hdr_checksum_get,
-    bcmpkt_ipv4_t_id_get,
-    bcmpkt_ipv4_t_option_get,
-    bcmpkt_ipv4_t_protocol_get,
-    bcmpkt_ipv4_t_sa_get,
-    bcmpkt_ipv4_t_tos_get,
-    bcmpkt_ipv4_t_total_length_get,
-    bcmpkt_ipv4_t_ttl_get,
-    bcmpkt_ipv4_t_version_hdr_len_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_ipv4_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT] = {
-    bcmpkt_ipv4_t_da_set,
-    bcmpkt_ipv4_t_flags_frag_offset_set,
-    bcmpkt_ipv4_t_hdr_checksum_set,
-    bcmpkt_ipv4_t_id_set,
-    bcmpkt_ipv4_t_option_set,
-    bcmpkt_ipv4_t_protocol_set,
-    bcmpkt_ipv4_t_sa_set,
-    bcmpkt_ipv4_t_tos_set,
-    bcmpkt_ipv4_t_total_length_set,
-    bcmpkt_ipv4_t_ttl_set,
-    bcmpkt_ipv4_t_version_hdr_len_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_ipv4_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_ipv4_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_ipv4_t_field_data,
-};
-
-
-static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 20);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 20, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 20, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 20, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 28, 4);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 28, 4, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_ipv6_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT] = {
-    bcmpkt_ipv6_t_da_get,
-    bcmpkt_ipv6_t_flow_label_get,
-    bcmpkt_ipv6_t_hop_limit_get,
-    bcmpkt_ipv6_t_next_header_get,
-    bcmpkt_ipv6_t_payload_length_get,
-    bcmpkt_ipv6_t_sa_get,
-    bcmpkt_ipv6_t_traffic_class_get,
-    bcmpkt_ipv6_t_version_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_ipv6_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT] = {
-    bcmpkt_ipv6_t_da_set,
-    bcmpkt_ipv6_t_flow_label_set,
-    bcmpkt_ipv6_t_hop_limit_set,
-    bcmpkt_ipv6_t_next_header_set,
-    bcmpkt_ipv6_t_payload_length_set,
-    bcmpkt_ipv6_t_sa_set,
-    bcmpkt_ipv6_t_traffic_class_set,
-    bcmpkt_ipv6_t_version_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_ipv6_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_ipv6_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_ipv6_t_field_data,
-};
-
-
-static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_l2_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT] = {
-    bcmpkt_l2_t_macda_get,
-    bcmpkt_l2_t_macsa_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_l2_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT] = {
-    bcmpkt_l2_t_macda_set,
-    bcmpkt_l2_t_macsa_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_l2_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_l2_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_l2_t_field_data,
-};
-
-
-static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
-    bcmpkt_mirror_erspan_sn_t_seq_num_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
-    bcmpkt_mirror_erspan_sn_t_seq_num_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_field_data,
-};
-
-
-static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_mirror_transport_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
-    bcmpkt_mirror_transport_t_data_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_mirror_transport_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
-    bcmpkt_mirror_transport_t_data_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_mirror_transport_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_mirror_transport_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_mirror_transport_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[4], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[4], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
-    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
-    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_data,
-};
-
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 24, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 24, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_rarp_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT] = {
-    bcmpkt_rarp_t_hardware_len_get,
-    bcmpkt_rarp_t_hardware_type_get,
-    bcmpkt_rarp_t_operation_get,
-    bcmpkt_rarp_t_prot_addr_len_get,
-    bcmpkt_rarp_t_protocol_type_get,
-    bcmpkt_rarp_t_sender_ha_get,
-    bcmpkt_rarp_t_sender_ip_get,
-    bcmpkt_rarp_t_target_ha_get,
-    bcmpkt_rarp_t_target_ip_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_rarp_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT] = {
-    bcmpkt_rarp_t_hardware_len_set,
-    bcmpkt_rarp_t_hardware_type_set,
-    bcmpkt_rarp_t_operation_set,
-    bcmpkt_rarp_t_prot_addr_len_set,
-    bcmpkt_rarp_t_protocol_type_set,
-    bcmpkt_rarp_t_sender_ha_set,
-    bcmpkt_rarp_t_sender_ip_set,
-    bcmpkt_rarp_t_target_ha_set,
-    bcmpkt_rarp_t_target_ip_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_rarp_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_rarp_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_rarp_t_field_data,
-};
-
-
-static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_first_4bytes_t_dst_port_get,
-    bcmpkt_tcp_first_4bytes_t_src_port_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_first_4bytes_t_dst_port_set,
-    bcmpkt_tcp_first_4bytes_t_src_port_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_field_data,
-};
-
-
-static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[3], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[3], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[2], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[2], 0, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_last_16bytes_t_ack_num_get,
-    bcmpkt_tcp_last_16bytes_t_checksum_get,
-    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
-    bcmpkt_tcp_last_16bytes_t_seq_num_get,
-    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
-    bcmpkt_tcp_last_16bytes_t_win_size_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
-    bcmpkt_tcp_last_16bytes_t_ack_num_set,
-    bcmpkt_tcp_last_16bytes_t_checksum_set,
-    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
-    bcmpkt_tcp_last_16bytes_t_seq_num_set,
-    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
-    bcmpkt_tcp_last_16bytes_t_win_size_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_field_data,
-};
-
-
-static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 16, 16, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_udp_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT] = {
-    bcmpkt_udp_t_checksum_get,
-    bcmpkt_udp_t_dst_port_get,
-    bcmpkt_udp_t_src_port_get,
-    bcmpkt_udp_t_udp_length_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_udp_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT] = {
-    bcmpkt_udp_t_checksum_set,
-    bcmpkt_udp_t_dst_port_set,
-    bcmpkt_udp_t_src_port_set,
-    bcmpkt_udp_t_udp_length_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_udp_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_udp_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_udp_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_unknown_l3_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
-    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
-    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_unknown_l3_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
-    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
-    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_unknown_l3_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_unknown_l3_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_unknown_l3_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_unknown_l4_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
-    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_unknown_l4_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
-    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_unknown_l4_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_unknown_l4_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_unknown_l4_t_field_data,
-};
-
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_unknown_l5_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
-    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
-    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
-    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_unknown_l5_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
-    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
-    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
-    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_unknown_l5_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_unknown_l5_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_unknown_l5_t_field_data,
-};
-
-
-static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 12, 1);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 12, 1, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 13, 3);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 13, 3, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 12);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 12, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_vlan_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT] = {
-    bcmpkt_vlan_t_cfi_get,
-    bcmpkt_vlan_t_pcp_get,
-    bcmpkt_vlan_t_tpid_get,
-    bcmpkt_vlan_t_vid_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_vlan_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT] = {
-    bcmpkt_vlan_t_cfi_set,
-    bcmpkt_vlan_t_pcp_set,
-    bcmpkt_vlan_t_tpid_set,
-    bcmpkt_vlan_t_vid_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_vlan_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_vlan_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_vlan_t_field_data,
-};
-
-
-static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[1], 8, 24);
-
-    return ret;
-}
-
-static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[1], 8, 24, val);
-    return ret;
-}
-
-bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_vxlan_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT] = {
-    bcmpkt_vxlan_t_flags_reserved_1_get,
-    bcmpkt_vxlan_t_reserved2_get,
-    bcmpkt_vxlan_t_vn_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_vxlan_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT] = {
-    bcmpkt_vxlan_t_flags_reserved_1_set,
-    bcmpkt_vxlan_t_reserved2_set,
-    bcmpkt_vxlan_t_vn_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_vxlan_t_field_data[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_vxlan_t_field_info = {
-    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT,
-    .info = bcm56880_a0_cna_6_5_29_vxlan_t_field_data,
-};
-
-static bcmpkt_flex_pmd_info_t bcm56880_a0_cna_6_5_29_flexhdr_info_list[BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT] = {
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_arp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_arp_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_arp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_cpu_composites_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_cpu_composites_0_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_cpu_composites_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_cpu_composites_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_cpu_composites_1_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_cpu_composites_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_ethertype_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_ethertype_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_ethertype_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_generic_loopback_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_generic_loopback_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_generic_loopback_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_icmp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_icmp_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_icmp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_ipfix_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_ipfix_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_ipfix_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_ipv4_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_ipv4_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_ipv4_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_ipv6_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_ipv6_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_ipv6_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_l2_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_l2_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_l2_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_mirror_transport_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_mirror_transport_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_mirror_transport_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_rarp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_rarp_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_rarp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_udp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_udp_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_udp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_unknown_l3_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_unknown_l3_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_unknown_l3_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_unknown_l4_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_unknown_l4_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_unknown_l4_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_unknown_l5_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_unknown_l5_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_unknown_l5_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_vlan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_vlan_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_vlan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_vxlan_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_cna_6_5_29_vxlan_t_fget,
-        .flex_fset = bcm56880_a0_cna_6_5_29_vxlan_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56880_a0_cna_6_5_29_rxpmd_flex_field_info,
-        .reasons_info = &bcm56880_a0_cna_6_5_29_rxpmd_flex_reasons_info,
-        .flex_common_fget = bcm56880_a0_rxpmd_flex_fget,
-        .flex_common_fset = bcm56880_a0_rxpmd_flex_fset,
-    },
-};
-
-static shr_enum_map_t bcm56880_a0_cna_6_5_29_flexhdr_id_map[] = {
-    BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_NAME_MAP_INIT
-};
-
-shr_enum_map_t * bcm56880_a0_cna_6_5_29_flexhdr_map_get(void)
-{
-    return bcm56880_a0_cna_6_5_29_flexhdr_id_map;
-}
-
-bcmpkt_flex_pmd_info_t * bcm56880_a0_cna_6_5_29_flex_pmd_info_get(uint32_t hid)
-{
-    if (hid >= BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT) {
-        return NULL;
-    }
-
-    return &bcm56880_a0_cna_6_5_29_flexhdr_info_list[hid];
-}
-
-int bcm56880_a0_cna_6_5_29_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
-    6,
-    -1,
-    -1,
-    25,
-};
\ No newline at end of file
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_match_id.c
similarity index 77%
rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id.c
rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_match_id.c
index fc3b6434400d..1be0c5ede9cb 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_match_id.c
@@ -2,12 +2,12 @@
  *
  * DO NOT EDIT THIS FILE!
  * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56880_a0_dna_4_11_4_0_sf_match_id_info.yml
- * for device bcm56880_a0 and variant dna_4_11_4_0.
+ * from the NPL output file(s) bcm56880_a0_dna_6_5_30_1_1_sf_match_id_info.yml
+ * for device bcm56880_a0 and variant dna_6_5_30_1_1.
  * Edits to this file will be lost when it is regenerated.
  *
  * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  * All Rights Reserved.$
  *
  * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
@@ -29,13 +29,13 @@
 
 
 #include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-#include <bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id_defs.h>
+#include <bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h>
 
 
 static bcmpkt_rxpmd_match_id_db_t
-bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_COUNT] = {
+bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_COUNT] = {
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_ETAG",
         .match        = 0x80,
         .match_mask   = 0xc0,
@@ -49,7 +49,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */
         .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -63,7 +63,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */
         .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0",
         .match        = 0x8,
         .match_mask   = 0x8,
@@ -77,7 +77,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
         .match        = 0x20,
         .match_mask   = 0x20,
@@ -91,7 +91,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
         .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -105,7 +105,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
         .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0xff,
@@ -119,7 +119,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
         .match        = 0x10,
         .match_mask   = 0x10,
@@ -133,7 +133,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
         .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -147,7 +147,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_VNTAG",
         .match        = 0x40,
         .match_mask   = 0xc0,
@@ -161,7 +161,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
         .match        = 0x1800,
         .match_mask   = 0x3830,
@@ -175,7 +175,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x80,
         .match_mask   = 0x1c2,
@@ -189,7 +189,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
         .match        = 0x408,
         .match_mask   = 0x64c,
@@ -203,21 +203,21 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
-        .match        = 0x3000,
+        .match        = 0x3800,
         .match_mask   = 0x3800,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x6,
+        .value        = 0x7,
         .pmaxbit      = 62,
         .pminbit      = 49,
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
         .match        = 0x200,
         .match_mask   = 0x642,
@@ -231,7 +231,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -245,7 +245,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
         .match        = 0x100,
         .match_mask   = 0x1c0,
@@ -259,7 +259,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x600,
         .match_mask   = 0x640,
@@ -273,7 +273,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
         .match        = 0x1830,
         .match_mask   = 0x3870,
@@ -287,7 +287,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
         .match        = 0x2,
         .match_mask   = 0x42,
@@ -301,7 +301,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
         .match        = 0x202,
         .match_mask   = 0x642,
@@ -315,7 +315,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
         .match        = 0x1000,
         .match_mask   = 0x3800,
@@ -329,7 +329,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
         .match        = 0x82,
         .match_mask   = 0x1c2,
@@ -343,7 +343,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
         .match        = 0x12,
         .match_mask   = 0x72,
@@ -357,7 +357,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
         .match        = 0x2000,
         .match_mask   = 0x3830,
@@ -371,7 +371,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA",
         .match        = 0x180,
         .match_mask   = 0x1c0,
@@ -385,7 +385,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
         .match        = 0x404,
         .match_mask   = 0x64c,
@@ -399,7 +399,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
         .match        = 0x4,
         .match_mask   = 0x4c,
@@ -413,7 +413,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
         .match        = 0x8,
         .match_mask   = 0x4c,
@@ -427,7 +427,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
         .match        = 0x40,
         .match_mask   = 0x40,
@@ -441,7 +441,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
         .match        = 0x42,
         .match_mask   = 0x42,
@@ -455,7 +455,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
         .match        = 0x44,
         .match_mask   = 0x44,
@@ -469,7 +469,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
         .match        = 0x48,
         .match_mask   = 0x48,
@@ -483,7 +483,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
         .match        = 0x50,
         .match_mask   = 0x50,
@@ -497,7 +497,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -511,7 +511,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
         .match        = 0xc0,
         .match_mask   = 0xc0,
@@ -525,7 +525,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
         .match        = 0x140,
         .match_mask   = 0x140,
@@ -539,7 +539,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
         .match        = 0x240,
         .match_mask   = 0x240,
@@ -553,7 +553,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3fff,
@@ -567,21 +567,21 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
-        .match        = 0x3800,
+        .match        = 0x3000,
         .match_mask   = 0x3800,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x7,
+        .value        = 0x6,
         .pmaxbit      = 62,
         .pminbit      = 49,
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
         .match        = 0x800,
         .match_mask   = 0x3830,
@@ -595,7 +595,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x20,
         .match_mask   = 0x70,
@@ -609,7 +609,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x820,
         .match_mask   = 0x3870,
@@ -623,7 +623,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
         .match        = 0x30,
         .match_mask   = 0x70,
@@ -637,7 +637,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x10,
         .match_mask   = 0x72,
@@ -651,7 +651,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x2800,
         .match_mask   = 0x3800,
@@ -665,7 +665,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x2030,
         .match_mask   = 0x3870,
@@ -679,7 +679,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
         .match        = 0x830,
         .match_mask   = 0x3870,
@@ -693,7 +693,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
         .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -707,7 +707,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
         .name         = "EGRESS_PKT_SYS_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x1,
@@ -721,7 +721,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG",
         .match        = 0x80,
         .match_mask   = 0xc0,
@@ -735,7 +735,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -749,7 +749,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0",
         .match        = 0x8,
         .match_mask   = 0x8,
@@ -763,7 +763,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
         .match        = 0x20,
         .match_mask   = 0x20,
@@ -777,7 +777,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -791,7 +791,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0xff,
@@ -805,7 +805,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
         .match        = 0x10,
         .match_mask   = 0x10,
@@ -819,7 +819,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -833,7 +833,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG",
         .match        = 0x40,
         .match_mask   = 0xc0,
@@ -847,7 +847,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
         .match        = 0x1800,
         .match_mask   = 0x3830,
@@ -861,7 +861,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x80,
         .match_mask   = 0x1c2,
@@ -875,7 +875,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
         .match        = 0x408,
         .match_mask   = 0x64c,
@@ -889,21 +889,21 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
-        .match        = 0x3000,
+        .match        = 0x3800,
         .match_mask   = 0x3800,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x6,
+        .value        = 0x7,
         .pmaxbit      = 34,
         .pminbit      = 21,
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
         .match        = 0x200,
         .match_mask   = 0x642,
@@ -917,7 +917,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -931,7 +931,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
         .match        = 0x100,
         .match_mask   = 0x1c0,
@@ -945,7 +945,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x600,
         .match_mask   = 0x640,
@@ -959,7 +959,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
         .match        = 0x1830,
         .match_mask   = 0x3870,
@@ -973,7 +973,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
         .match        = 0x2,
         .match_mask   = 0x42,
@@ -987,7 +987,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
         .match        = 0x202,
         .match_mask   = 0x642,
@@ -1001,7 +1001,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
         .match        = 0x1000,
         .match_mask   = 0x3800,
@@ -1015,7 +1015,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
         .match        = 0x82,
         .match_mask   = 0x1c2,
@@ -1029,7 +1029,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
         .match        = 0x12,
         .match_mask   = 0x72,
@@ -1043,7 +1043,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
         .match        = 0x2000,
         .match_mask   = 0x3830,
@@ -1057,7 +1057,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA",
         .match        = 0x180,
         .match_mask   = 0x1c0,
@@ -1071,7 +1071,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
         .match        = 0x404,
         .match_mask   = 0x64c,
@@ -1085,7 +1085,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
         .match        = 0x4,
         .match_mask   = 0x4c,
@@ -1099,7 +1099,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
         .match        = 0x8,
         .match_mask   = 0x4c,
@@ -1113,7 +1113,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
         .match        = 0x40,
         .match_mask   = 0x40,
@@ -1127,7 +1127,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
         .match        = 0x42,
         .match_mask   = 0x42,
@@ -1141,7 +1141,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
         .match        = 0x44,
         .match_mask   = 0x44,
@@ -1155,7 +1155,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
         .match        = 0x48,
         .match_mask   = 0x48,
@@ -1169,7 +1169,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
         .match        = 0x50,
         .match_mask   = 0x50,
@@ -1183,7 +1183,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -1197,7 +1197,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
         .match        = 0xc0,
         .match_mask   = 0xc0,
@@ -1211,7 +1211,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
         .match        = 0x140,
         .match_mask   = 0x140,
@@ -1225,7 +1225,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
         .match        = 0x240,
         .match_mask   = 0x240,
@@ -1239,7 +1239,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3fff,
@@ -1253,21 +1253,21 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
-        .match        = 0x3800,
+        .match        = 0x3000,
         .match_mask   = 0x3800,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x7,
+        .value        = 0x6,
         .pmaxbit      = 34,
         .pminbit      = 21,
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
         .match        = 0x800,
         .match_mask   = 0x3830,
@@ -1281,7 +1281,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x20,
         .match_mask   = 0x70,
@@ -1295,7 +1295,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x820,
         .match_mask   = 0x3870,
@@ -1309,7 +1309,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
         .match        = 0x30,
         .match_mask   = 0x70,
@@ -1323,7 +1323,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x10,
         .match_mask   = 0x72,
@@ -1337,7 +1337,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x2800,
         .match_mask   = 0x3800,
@@ -1351,7 +1351,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x2030,
         .match_mask   = 0x3870,
@@ -1365,7 +1365,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
         .match        = 0x830,
         .match_mask   = 0x3870,
@@ -1379,7 +1379,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_ETAG",
         .match        = 0x80,
         .match_mask   = 0xc0,
@@ -1393,7 +1393,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
         .match        = 0x20,
         .match_mask   = 0x20,
@@ -1407,7 +1407,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
         .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -1421,7 +1421,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
         .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0xff,
@@ -1435,7 +1435,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
         .match        = 0x10,
         .match_mask   = 0x10,
@@ -1449,7 +1449,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
         .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -1463,7 +1463,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_VNTAG",
         .match        = 0x40,
         .match_mask   = 0xc0,
@@ -1477,7 +1477,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
         .match        = 0x1800,
         .match_mask   = 0x3830,
@@ -1491,7 +1491,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x80,
         .match_mask   = 0x1c2,
@@ -1505,7 +1505,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
         .match        = 0x408,
         .match_mask   = 0x64c,
@@ -1519,21 +1519,21 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
-        .match        = 0x3000,
+        .match        = 0x3800,
         .match_mask   = 0x3800,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x6,
+        .value        = 0x7,
         .pmaxbit      = 44,
         .pminbit      = 31,
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
         .match        = 0x200,
         .match_mask   = 0x642,
@@ -1547,7 +1547,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -1561,7 +1561,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
         .match        = 0x100,
         .match_mask   = 0x1c0,
@@ -1575,7 +1575,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x600,
         .match_mask   = 0x640,
@@ -1589,7 +1589,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
         .match        = 0x2000,
         .match_mask   = 0x3830,
@@ -1603,7 +1603,21 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
         .match        = 0x404,
         .match_mask   = 0x64c,
@@ -1617,7 +1631,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
         .match        = 0x4,
         .match_mask   = 0x4c,
@@ -1631,7 +1645,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
         .match        = 0x8,
         .match_mask   = 0x4c,
@@ -1645,7 +1659,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3fff,
@@ -1659,21 +1673,21 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
-        .match        = 0x3800,
+        .match        = 0x3000,
         .match_mask   = 0x3800,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x7,
+        .value        = 0x6,
         .pmaxbit      = 44,
         .pminbit      = 31,
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
         .match        = 0x800,
         .match_mask   = 0x3830,
@@ -1687,7 +1701,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x20,
         .match_mask   = 0x70,
@@ -1701,7 +1715,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x820,
         .match_mask   = 0x3870,
@@ -1715,7 +1729,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
         .match        = 0x30,
         .match_mask   = 0x70,
@@ -1729,7 +1743,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x10,
         .match_mask   = 0x72,
@@ -1743,7 +1757,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x2800,
         .match_mask   = 0x3800,
@@ -1757,7 +1771,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x2030,
         .match_mask   = 0x3870,
@@ -1771,7 +1785,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_ETAG",
         .match        = 0x80,
         .match_mask   = 0xc0,
@@ -1785,7 +1799,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -1799,7 +1813,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0",
         .match        = 0x8,
         .match_mask   = 0x8,
@@ -1813,7 +1827,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
         .match        = 0x20,
         .match_mask   = 0x20,
@@ -1827,7 +1841,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -1841,7 +1855,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0xff,
@@ -1855,7 +1869,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
         .match        = 0x10,
         .match_mask   = 0x10,
@@ -1869,7 +1883,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -1883,7 +1897,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_VNTAG",
         .match        = 0x40,
         .match_mask   = 0xc0,
@@ -1897,7 +1911,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
         .match        = 0x1800,
         .match_mask   = 0x3830,
@@ -1911,7 +1925,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x80,
         .match_mask   = 0x1c2,
@@ -1925,7 +1939,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
         .match        = 0x408,
         .match_mask   = 0x64c,
@@ -1939,21 +1953,21 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
-        .match        = 0x3000,
+        .match        = 0x3800,
         .match_mask   = 0x3800,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x6,
+        .value        = 0x7,
         .pmaxbit      = 22,
         .pminbit      = 9,
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
         .match        = 0x200,
         .match_mask   = 0x642,
@@ -1967,7 +1981,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -1981,7 +1995,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
         .match        = 0x100,
         .match_mask   = 0x1c0,
@@ -1995,7 +2009,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x600,
         .match_mask   = 0x640,
@@ -2009,7 +2023,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
         .match        = 0x1830,
         .match_mask   = 0x3870,
@@ -2023,7 +2037,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
         .match        = 0x2,
         .match_mask   = 0x42,
@@ -2037,7 +2051,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
         .match        = 0x202,
         .match_mask   = 0x642,
@@ -2051,7 +2065,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
         .match        = 0x1000,
         .match_mask   = 0x3800,
@@ -2065,7 +2079,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
         .match        = 0x82,
         .match_mask   = 0x1c2,
@@ -2079,7 +2093,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
         .match        = 0x12,
         .match_mask   = 0x72,
@@ -2093,7 +2107,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
         .match        = 0x2000,
         .match_mask   = 0x3830,
@@ -2107,7 +2121,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA",
         .match        = 0x180,
         .match_mask   = 0x1c0,
@@ -2121,7 +2135,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
         .match        = 0x404,
         .match_mask   = 0x64c,
@@ -2135,7 +2149,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
         .match        = 0x4,
         .match_mask   = 0x4c,
@@ -2149,7 +2163,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
         .match        = 0x8,
         .match_mask   = 0x4c,
@@ -2163,7 +2177,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
         .match        = 0x40,
         .match_mask   = 0x40,
@@ -2177,7 +2191,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
         .match        = 0x42,
         .match_mask   = 0x42,
@@ -2191,7 +2205,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
         .match        = 0x44,
         .match_mask   = 0x44,
@@ -2205,7 +2219,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
         .match        = 0x48,
         .match_mask   = 0x48,
@@ -2219,7 +2233,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
         .match        = 0x50,
         .match_mask   = 0x50,
@@ -2233,7 +2247,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -2247,7 +2261,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
         .match        = 0xc0,
         .match_mask   = 0xc0,
@@ -2261,7 +2275,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
         .match        = 0x140,
         .match_mask   = 0x140,
@@ -2275,7 +2289,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
         .match        = 0x240,
         .match_mask   = 0x240,
@@ -2289,7 +2303,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3fff,
@@ -2303,21 +2317,21 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
-        .match        = 0x3800,
+        .match        = 0x3000,
         .match_mask   = 0x3800,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x7,
+        .value        = 0x6,
         .pmaxbit      = 22,
         .pminbit      = 9,
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
         .match        = 0x800,
         .match_mask   = 0x3830,
@@ -2331,7 +2345,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x20,
         .match_mask   = 0x70,
@@ -2345,7 +2359,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x820,
         .match_mask   = 0x3870,
@@ -2359,7 +2373,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
         .match        = 0x30,
         .match_mask   = 0x70,
@@ -2373,7 +2387,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x10,
         .match_mask   = 0x72,
@@ -2387,7 +2401,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x2800,
         .match_mask   = 0x3800,
@@ -2401,7 +2415,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x2030,
         .match_mask   = 0x3870,
@@ -2415,7 +2429,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
         .match        = 0x830,
         .match_mask   = 0x3870,
@@ -2429,7 +2443,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
         .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -2443,7 +2457,7 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
 
     },
     {
-        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        /* BCM56880_A0_DNA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
         .name         = "INGRESS_PKT_SYS_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x1,
@@ -2458,23 +2472,23 @@ bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_
     },
 };
 
-static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db_info = {
-    .num_entries = 173,
-    .db = bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db
+static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db_info = {
+    .num_entries = 174,
+    .db = bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db
 };
-bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db_info_get(void) {
-    return &bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db_info;
+bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db_info_get(void) {
+    return &bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_db_info;
 }
 
-static shr_enum_map_t bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_map[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+static shr_enum_map_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_map[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_map_info = {
-    .num_entries = 173,
-    .map = bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_map
+static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_map_info = {
+    .num_entries = 174,
+    .map = bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_map
 };
 
-bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_map_info_get(void) {
-    return &bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_map_info;
+bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_map_info_get(void) {
+    return &bcm56880_a0_dna_6_5_30_1_1_rxpmd_match_id_map_info;
 }
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_pkt_flexhdr.c
similarity index 65%
rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_pkt_flexhdr.c
rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_pkt_flexhdr.c
index 2ba90296858a..5ecea72ca06c 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_pkt_flexhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_pkt_flexhdr.c
@@ -3,11 +3,11 @@
  * DO NOT EDIT THIS FILE!
  * This file is auto-generated by xfc_map_parser
  * from the NPL output file(s) map.yml
- * for device bcm56880_a0 and variant dna_4_11_4_0.
+ * for device bcm56880_a0 and variant dna_6_5_30_1_1.
  * Edits to this file will be lost when it is regenerated.
  *
  * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  * All Rights Reserved.$
  *
  * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
@@ -31,292 +31,292 @@
 #include <shr/shr_error.h>
 #include <bcmpkt/bcmpkt_flexhdr.h>
 #include <bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h>
-#include <bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr.h>
-#include <bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr_data.h>
-#include <bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_flex_data.h>
+#include <bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56880_a0/dna_6_5_30_1_1/bcm56880_a0_dna_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h>
 
 #define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
 #define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
 #define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
 #define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
 
-static void bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+static void bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
 {
     uint32_t *reason = data + 0;
 
     if (reason[12] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
     }
     if (reason[12] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
     }
     if (reason[12] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
     }
     if (reason[12] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT);
     }
     if (reason[12] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
     }
     if (reason[12] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
     }
     if (reason[12] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
     }
     if (reason[12] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD);
     }
     if (reason[12] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
     }
     if (reason[12] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
     }
     if (reason[12] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
     }
     if (reason[12] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
     }
     if (reason[12] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
     }
     if (reason[12] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
     }
     if (reason[12] & (0x1 << 14)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
     }
     if (reason[12] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
     }
     if (reason[12] & (0x1 << 16)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
     }
     if (reason[12] & (0x1 << 17)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP);
     }
     if (reason[12] & (0x1 << 18)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP);
     }
     if (reason[12] & (0x1 << 19)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
     }
     if (reason[12] & (0x1 << 20)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
     }
     if (reason[12] & (0x1 << 21)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP);
     }
     if (reason[12] & (0x1 << 22)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
     }
     if (reason[12] & (0x1 << 23)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
     }
     if (reason[12] & (0x1 << 24)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
     }
     if (reason[12] & (0x1 << 25)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
     }
     if (reason[12] & (0x1 << 26)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
     }
     if (reason[12] & (0x1 << 27)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
     }
     if (reason[12] & (0x1 << 28)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
     }
     if (reason[12] & (0x1 << 29)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
     }
     if (reason[12] & (0x1 << 30)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
     }
     if (reason[12] & (0x1 << 31)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
     }
     if (reason[11] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
     }
     if (reason[11] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
     }
     if (reason[11] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
     }
     if (reason[11] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
     }
     if (reason[11] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
     }
     if (reason[11] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
     }
     if (reason[11] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
     }
     if (reason[11] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
     }
     if (reason[11] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
     }
 }
 
-static void bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+static void bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
 {
     uint32_t *reason = data + 0;
 
     reason[12] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
         reason[12] |= (0x1 << 0);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
         reason[12] |= (0x1 << 1);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
         reason[12] |= (0x1 << 2);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) {
         reason[12] |= (0x1 << 3);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
         reason[12] |= (0x1 << 4);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
         reason[12] |= (0x1 << 5);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
         reason[12] |= (0x1 << 6);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) {
         reason[12] |= (0x1 << 7);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
         reason[12] |= (0x1 << 8);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
         reason[12] |= (0x1 << 9);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
         reason[12] |= (0x1 << 10);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
         reason[12] |= (0x1 << 11);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
         reason[12] |= (0x1 << 12);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
         reason[12] |= (0x1 << 13);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
         reason[12] |= (0x1 << 14);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
         reason[12] |= (0x1 << 15);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
         reason[12] |= (0x1 << 16);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
         reason[12] |= (0x1 << 17);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
         reason[12] |= (0x1 << 18);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
         reason[12] |= (0x1 << 19);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
         reason[12] |= (0x1 << 20);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
         reason[12] |= (0x1 << 21);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
         reason[12] |= (0x1 << 22);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
         reason[12] |= (0x1 << 23);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
         reason[12] |= (0x1 << 24);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
         reason[12] |= (0x1 << 25);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
         reason[12] |= (0x1 << 26);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
         reason[12] |= (0x1 << 27);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
         reason[12] |= (0x1 << 28);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
         reason[12] |= (0x1 << 29);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
         reason[12] |= (0x1 << 30);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
         reason[12] |= (0x1 << 31);
     }
     reason[11] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
         reason[11] |= (0x1 << 0);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
         reason[11] |= (0x1 << 1);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
         reason[11] |= (0x1 << 2);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
         reason[11] |= (0x1 << 3);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
         reason[11] |= (0x1 << 4);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
         reason[11] |= (0x1 << 5);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
         reason[11] |= (0x1 << 6);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
         reason[11] |= (0x1 << 7);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
         reason[11] |= (0x1 << 15);
     }
 }
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_data[] = {
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_field_data[] = {
     {
         .name = "DLB_ECMP_DESTINATION_15_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
             { -1, -1 }, /* Profile 2. */
             { -1, -1 }, /* Profile 3. */
-            { 224, 239 }, /* Profile 4. */
-            { 240, 255 }, /* Profile 5. */
+            { 208, 223 }, /* Profile 4. */
+            { 208, 223 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "DROP_CODE_15_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -329,7 +329,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_da
     },
     {
         .name = "DVP_15_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DVP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -342,7 +342,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_da
     },
     {
         .name = "EFFECTIVE_TTL_7_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -355,44 +355,44 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_da
     },
     {
         .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 224, 239 }, /* Profile 2. */
-            { 240, 255 }, /* Profile 3. */
+            { 208, 223 }, /* Profile 2. */
+            { 208, 223 }, /* Profile 3. */
         },
         .profile_cnt = 4,
     },
     {
         .name = "ENTROPY_LABEL_HIGH_3_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 388, 391 }, /* Profile 2. */
-            { 388, 391 }, /* Profile 3. */
-            { 388, 391 }, /* Profile 4. */
-            { 388, 391 }, /* Profile 5. */
+            { 376, 379 }, /* Profile 2. */
+            { 376, 379 }, /* Profile 3. */
+            { 376, 379 }, /* Profile 4. */
+            { 376, 379 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "ENTROPY_LABEL_LOW_15_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 256, 271 }, /* Profile 2. */
+            { 272, 287 }, /* Profile 2. */
             { 272, 287 }, /* Profile 3. */
-            { 256, 271 }, /* Profile 4. */
+            { 272, 287 }, /* Profile 4. */
             { 272, 287 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "EVENT_TRACE_VECTOR_31_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -405,7 +405,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_da
     },
     {
         .name = "EVENT_TRACE_VECTOR_47_32",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -418,20 +418,20 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_da
     },
     {
         .name = "I2E_CLASS_ID_15_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 208, 223 }, /* Profile 2. */
-            { 224, 239 }, /* Profile 3. */
-            { 208, 223 }, /* Profile 4. */
-            { 224, 239 }, /* Profile 5. */
+            { 192, 207 }, /* Profile 2. */
+            { 192, 207 }, /* Profile 3. */
+            { 192, 207 }, /* Profile 4. */
+            { 192, 207 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "IFP_IOAM_GBP_ACTION_3_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -444,20 +444,20 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_da
     },
     {
         .name = "IFP_TS_CONTROL_ACTION_3_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 376, 379 }, /* Profile 2. */
-            { 376, 379 }, /* Profile 3. */
-            { 376, 379 }, /* Profile 4. */
-            { 376, 379 }, /* Profile 5. */
+            { 384, 387 }, /* Profile 2. */
+            { 384, 387 }, /* Profile 3. */
+            { 384, 387 }, /* Profile 4. */
+            { 384, 387 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "ING_TIMESTAMP_31_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -470,97 +470,97 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_da
     },
     {
         .name = "INGRESS_PP_PORT_7_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 240, 247 }, /* Profile 2. */
-            { 256, 263 }, /* Profile 3. */
-            { 240, 247 }, /* Profile 4. */
-            { 256, 263 }, /* Profile 5. */
+            { 224, 231 }, /* Profile 2. */
+            { 224, 231 }, /* Profile 3. */
+            { 224, 231 }, /* Profile 4. */
+            { 224, 231 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 160, 175 }, /* Profile 2. */
-            { 176, 191 }, /* Profile 3. */
-            { 160, 175 }, /* Profile 4. */
-            { 176, 191 }, /* Profile 5. */
+            { 144, 159 }, /* Profile 2. */
+            { 160, 175 }, /* Profile 3. */
+            { 144, 159 }, /* Profile 4. */
+            { 160, 175 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "INGRESS_QOS_REMARK_CTRL_3_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 400, 403 }, /* Profile 2. */
-            { 400, 403 }, /* Profile 3. */
-            { 400, 403 }, /* Profile 4. */
-            { 400, 403 }, /* Profile 5. */
+            { 408, 411 }, /* Profile 2. */
+            { 408, 411 }, /* Profile 3. */
+            { 408, 411 }, /* Profile 4. */
+            { 408, 411 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "INT_PRI_3_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 396, 399 }, /* Profile 2. */
-            { 396, 399 }, /* Profile 3. */
-            { 396, 399 }, /* Profile 4. */
-            { 396, 399 }, /* Profile 5. */
+            { 404, 407 }, /* Profile 2. */
+            { 404, 407 }, /* Profile 3. */
+            { 404, 407 }, /* Profile 4. */
+            { 404, 407 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "L2_IIF_10_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 288, 298 }, /* Profile 2. */
+            { 176, 186 }, /* Profile 2. */
             { -1, -1 }, /* Profile 3. */
-            { 288, 298 }, /* Profile 4. */
+            { 176, 186 }, /* Profile 4. */
         },
         .profile_cnt = 5,
     },
     {
         .name = "L2_OIF_10_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
             { -1, -1 }, /* Profile 2. */
-            { 160, 170 }, /* Profile 3. */
+            { 144, 154 }, /* Profile 3. */
             { -1, -1 }, /* Profile 4. */
-            { 160, 170 }, /* Profile 5. */
+            { 144, 154 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "L3_IIF_13_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 192, 205 }, /* Profile 2. */
-            { 208, 221 }, /* Profile 3. */
-            { 192, 205 }, /* Profile 4. */
-            { 208, 221 }, /* Profile 5. */
+            { 240, 253 }, /* Profile 2. */
+            { 240, 253 }, /* Profile 3. */
+            { 240, 253 }, /* Profile 4. */
+            { 240, 253 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "L3_OIF_1_13_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -573,33 +573,33 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_da
     },
     {
         .name = "MPLS_LABEL_DECAP_COUNT_3_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 412, 415 }, /* Profile 2. */
-            { 412, 415 }, /* Profile 3. */
-            { 412, 415 }, /* Profile 4. */
-            { 412, 415 }, /* Profile 5. */
+            { 380, 383 }, /* Profile 2. */
+            { 380, 383 }, /* Profile 3. */
+            { 380, 383 }, /* Profile 4. */
+            { 380, 383 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 176, 191 }, /* Profile 2. */
-            { 192, 207 }, /* Profile 3. */
-            { 176, 191 }, /* Profile 4. */
-            { 192, 207 }, /* Profile 5. */
+            { 160, 175 }, /* Profile 2. */
+            { 176, 191 }, /* Profile 3. */
+            { 160, 175 }, /* Profile 4. */
+            { 176, 191 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "NHOP_INDEX_1_15_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -612,7 +612,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_da
     },
     {
         .name = "PARSER_VHLEN_0_15_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -625,124 +625,124 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_da
     },
     {
         .name = "PKT_MISC_CTRL_0_3_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 408, 411 }, /* Profile 2. */
-            { 408, 411 }, /* Profile 3. */
-            { 408, 411 }, /* Profile 4. */
-            { 408, 411 }, /* Profile 5. */
+            { 412, 415 }, /* Profile 2. */
+            { 412, 415 }, /* Profile 3. */
+            { 412, 415 }, /* Profile 4. */
+            { 412, 415 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "SVP_15_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SVP_15_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 112, 127 }, /* Profile 2. */
-            { 112, 127 }, /* Profile 3. */
-            { 112, 127 }, /* Profile 4. */
-            { 112, 127 }, /* Profile 5. */
+            { 256, 271 }, /* Profile 2. */
+            { 256, 271 }, /* Profile 3. */
+            { 256, 271 }, /* Profile 4. */
+            { 256, 271 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 392, 395 }, /* Profile 2. */
-            { 392, 395 }, /* Profile 3. */
-            { 392, 395 }, /* Profile 4. */
-            { 392, 395 }, /* Profile 5. */
+            { 400, 403 }, /* Profile 2. */
+            { 400, 403 }, /* Profile 3. */
+            { 400, 403 }, /* Profile 4. */
+            { 400, 403 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "SYSTEM_DESTINATION_15_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 272, 287 }, /* Profile 2. */
+            { 288, 303 }, /* Profile 2. */
             { 288, 303 }, /* Profile 3. */
-            { 272, 287 }, /* Profile 4. */
+            { 288, 303 }, /* Profile 4. */
             { 288, 303 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "SYSTEM_OPCODE_3_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 404, 407 }, /* Profile 2. */
-            { 404, 407 }, /* Profile 3. */
-            { 404, 407 }, /* Profile 4. */
-            { 404, 407 }, /* Profile 5. */
+            { 396, 399 }, /* Profile 2. */
+            { 396, 399 }, /* Profile 3. */
+            { 396, 399 }, /* Profile 4. */
+            { 396, 399 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "SYSTEM_SOURCE_15_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 144, 159 }, /* Profile 2. */
-            { 144, 159 }, /* Profile 3. */
-            { 144, 159 }, /* Profile 4. */
-            { 144, 159 }, /* Profile 5. */
+            { 128, 143 }, /* Profile 2. */
+            { 128, 143 }, /* Profile 3. */
+            { 128, 143 }, /* Profile 4. */
+            { 128, 143 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "TIMESTAMP_CTRL_3_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 380, 383 }, /* Profile 2. */
-            { 380, 383 }, /* Profile 3. */
-            { 380, 383 }, /* Profile 4. */
-            { 380, 383 }, /* Profile 5. */
+            { 388, 391 }, /* Profile 2. */
+            { 388, 391 }, /* Profile 3. */
+            { 388, 391 }, /* Profile 4. */
+            { 388, 391 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 384, 387 }, /* Profile 2. */
-            { 384, 387 }, /* Profile 3. */
-            { 384, 387 }, /* Profile 4. */
-            { 384, 387 }, /* Profile 5. */
+            { 392, 395 }, /* Profile 2. */
+            { 392, 395 }, /* Profile 3. */
+            { 392, 395 }, /* Profile 4. */
+            { 392, 395 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "VFI_15_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VFI_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 128, 143 }, /* Profile 2. */
-            { 128, 143 }, /* Profile 3. */
-            { 128, 143 }, /* Profile 4. */
-            { 128, 143 }, /* Profile 5. */
+            { 112, 127 }, /* Profile 2. */
+            { 112, 127 }, /* Profile 3. */
+            { 112, 127 }, /* Profile 4. */
+            { 112, 127 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0",
-        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0,
+        .fid = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -753,20 +753,20 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_da
         },
         .profile_cnt = 6,
     },
-};static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_data,
+};static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_field_data,
 };
 
-static shr_enum_map_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reason_names[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+static shr_enum_map_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reason_names[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_reasons_info_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reasons_info = {
-    .num_reasons = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
-    .reason_names = bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reason_names,
-    .reason_encode = bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reason_encode,
-    .reason_decode = bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reason_decode,
+static bcmpkt_flex_reasons_info_t bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reason_names,
+    .reason_encode = bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reason_decode,
 };
 
 
@@ -909,7 +909,7 @@ static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_arp_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_arp_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT] = {
     bcmpkt_arp_t_hardware_len_get,
     bcmpkt_arp_t_hardware_type_get,
     bcmpkt_arp_t_operation_get,
@@ -921,7 +921,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_arp_t_fget[BCM56880_A0_DNA_4_11
     bcmpkt_arp_t_target_ip_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_arp_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_arp_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT] = {
     bcmpkt_arp_t_hardware_len_set,
     bcmpkt_arp_t_hardware_type_set,
     bcmpkt_arp_t_operation_set,
@@ -933,13 +933,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_arp_t_fset[BCM56880_A0_DNA_4_11
     bcmpkt_arp_t_target_ip_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_arp_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_arp_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_arp_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_arp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_arp_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_arp_t_field_data,
 };
 
 
@@ -1036,7 +1036,7 @@ static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_authen_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_authen_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT] = {
     bcmpkt_authen_t_data_get,
     bcmpkt_authen_t_next_header_get,
     bcmpkt_authen_t_payload_len_get,
@@ -1045,7 +1045,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_authen_t_fget[BCM56880_A0_DNA_4
     bcmpkt_authen_t_spi_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_authen_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_authen_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT] = {
     bcmpkt_authen_t_data_set,
     bcmpkt_authen_t_next_header_set,
     bcmpkt_authen_t_payload_len_set,
@@ -1054,13 +1054,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_authen_t_fset[BCM56880_A0_DNA_4
     bcmpkt_authen_t_spi_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_authen_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_authen_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_authen_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_authen_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_authen_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_authen_t_field_data,
 };
 
 
@@ -1309,7 +1309,7 @@ static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_bfd_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_bfd_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT] = {
     bcmpkt_bfd_t_ap_get,
     bcmpkt_bfd_t_bfd_length_get,
     bcmpkt_bfd_t_cpi_get,
@@ -1328,7 +1328,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_bfd_t_fget[BCM56880_A0_DNA_4_11
     bcmpkt_bfd_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_bfd_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_bfd_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT] = {
     bcmpkt_bfd_t_ap_set,
     bcmpkt_bfd_t_bfd_length_set,
     bcmpkt_bfd_t_cpi_set,
@@ -1347,13 +1347,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_bfd_t_fset[BCM56880_A0_DNA_4_11
     bcmpkt_bfd_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_bfd_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_bfd_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_bfd_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_bfd_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_bfd_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_bfd_t_field_data,
 };
 
 
@@ -1387,23 +1387,201 @@ static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_cntag_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_cntag_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_FID_COUNT] = {
     bcmpkt_cntag_t_rpid_get,
     bcmpkt_cntag_t_tpid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_cntag_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_cntag_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_FID_COUNT] = {
     bcmpkt_cntag_t_rpid_set,
     bcmpkt_cntag_t_tpid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_cntag_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_cntag_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_cntag_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_cntag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_cntag_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CNTAG_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_cntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_ifa_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont0_get,
+    bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont1_get,
+    bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont2_get,
+    bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont3_get,
+    bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont4_get,
+    bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont5_get,
+    bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont6_get,
+    bcmpkt_cpu_composites_0_ifa_l2_t_macda_get,
+    bcmpkt_cpu_composites_0_ifa_l2_t_macsa_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont0_set,
+    bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont1_set,
+    bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont2_set,
+    bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont3_set,
+    bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont4_set,
+    bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont5_set,
+    bcmpkt_cpu_composites_0_ifa_l2_t_dma_cont6_set,
+    bcmpkt_cpu_composites_0_ifa_l2_t_macda_set,
+    bcmpkt_cpu_composites_0_ifa_l2_t_macsa_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_IFA_L2_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_field_data,
 };
 
 
@@ -1519,7 +1697,7 @@ static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
     bcmpkt_cpu_composites_0_t_dma_cont0_get,
     bcmpkt_cpu_composites_0_t_dma_cont1_get,
     bcmpkt_cpu_composites_0_t_dma_cont2_get,
@@ -1529,7 +1707,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_fget[BCM5688
     bcmpkt_cpu_composites_0_t_dma_cont6_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
     bcmpkt_cpu_composites_0_t_dma_cont0_set,
     bcmpkt_cpu_composites_0_t_dma_cont1_set,
     bcmpkt_cpu_composites_0_t_dma_cont2_set,
@@ -1539,13 +1717,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_fset[BCM5688
     bcmpkt_cpu_composites_0_t_dma_cont6_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_field_data,
 };
 
 
@@ -1725,7 +1903,7 @@ static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
     bcmpkt_cpu_composites_1_t_dma_cont10_get,
     bcmpkt_cpu_composites_1_t_dma_cont11_get,
     bcmpkt_cpu_composites_1_t_dma_cont12_get,
@@ -1739,7 +1917,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_fget[BCM5688
     bcmpkt_cpu_composites_1_t_dma_cont9_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
     bcmpkt_cpu_composites_1_t_dma_cont10_set,
     bcmpkt_cpu_composites_1_t_dma_cont11_set,
     bcmpkt_cpu_composites_1_t_dma_cont12_set,
@@ -1753,13 +1931,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_fset[BCM5688
     bcmpkt_cpu_composites_1_t_dma_cont9_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_field_data,
 };
 
 
@@ -1809,25 +1987,25 @@ static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_dest_option_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_dest_option_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
     bcmpkt_dest_option_t_hdr_ext_len_get,
     bcmpkt_dest_option_t_next_header_get,
     bcmpkt_dest_option_t_option_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_dest_option_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_dest_option_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
     bcmpkt_dest_option_t_hdr_ext_len_set,
     bcmpkt_dest_option_t_next_header_set,
     bcmpkt_dest_option_t_option_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_dest_option_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_dest_option_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_dest_option_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_dest_option_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_dest_option_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_dest_option_t_field_data,
 };
 
 
@@ -1967,7 +2145,7 @@ static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
     bcmpkt_erspan3_fixed_hdr_t_bso_get,
     bcmpkt_erspan3_fixed_hdr_t_cos_get,
     bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
@@ -1979,7 +2157,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_fget[BCM568
     bcmpkt_erspan3_fixed_hdr_t_vlan_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
     bcmpkt_erspan3_fixed_hdr_t_bso_set,
     bcmpkt_erspan3_fixed_hdr_t_cos_set,
     bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
@@ -1991,13 +2169,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_fset[BCM568
     bcmpkt_erspan3_fixed_hdr_t_vlan_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_field_data,
 };
 
 
@@ -2062,27 +2240,27 @@ static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
     bcmpkt_erspan3_subhdr_5_t_platform_id_get,
     bcmpkt_erspan3_subhdr_5_t_port_id_get,
     bcmpkt_erspan3_subhdr_5_t_switch_id_get,
     bcmpkt_erspan3_subhdr_5_t_timestamp_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
     bcmpkt_erspan3_subhdr_5_t_platform_id_set,
     bcmpkt_erspan3_subhdr_5_t_port_id_set,
     bcmpkt_erspan3_subhdr_5_t_switch_id_set,
     bcmpkt_erspan3_subhdr_5_t_timestamp_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_field_data,
 };
 
 
@@ -2163,7 +2341,7 @@ static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_esp_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_esp_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT] = {
     bcmpkt_esp_t_next_header_get,
     bcmpkt_esp_t_pad_get,
     bcmpkt_esp_t_pad_len_get,
@@ -2171,7 +2349,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_esp_t_fget[BCM56880_A0_DNA_4_11
     bcmpkt_esp_t_spi_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_esp_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_esp_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT] = {
     bcmpkt_esp_t_next_header_set,
     bcmpkt_esp_t_pad_set,
     bcmpkt_esp_t_pad_len_set,
@@ -2179,13 +2357,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_esp_t_fset[BCM56880_A0_DNA_4_11
     bcmpkt_esp_t_spi_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_esp_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_esp_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_esp_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_esp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_esp_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_esp_t_field_data,
 };
 
 
@@ -2220,23 +2398,23 @@ static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_etag_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_etag_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT] = {
     bcmpkt_etag_t_tag_get,
     bcmpkt_etag_t_tpid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_etag_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_etag_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT] = {
     bcmpkt_etag_t_tag_set,
     bcmpkt_etag_t_tpid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_etag_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_etag_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_etag_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_etag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_etag_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_etag_t_field_data,
 };
 
 
@@ -2255,21 +2433,21 @@ static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ethertype_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ethertype_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
     bcmpkt_ethertype_t_type_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ethertype_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ethertype_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
     bcmpkt_ethertype_t_type_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ethertype_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ethertype_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ethertype_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_ethertype_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ethertype_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_ethertype_t_field_data,
 };
 
 
@@ -2334,27 +2512,27 @@ static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_frag_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_frag_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT] = {
     bcmpkt_frag_t_frag_info_get,
     bcmpkt_frag_t_id_get,
     bcmpkt_frag_t_next_header_get,
     bcmpkt_frag_t_reserved_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_frag_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_frag_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT] = {
     bcmpkt_frag_t_frag_info_set,
     bcmpkt_frag_t_id_set,
     bcmpkt_frag_t_next_header_set,
     bcmpkt_frag_t_reserved_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_frag_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_frag_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_frag_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_frag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_frag_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_frag_t_field_data,
 };
 
 
@@ -2583,7 +2761,7 @@ static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int prof
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_generic_loopback_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
     bcmpkt_generic_loopback_t_destination_obj_get,
     bcmpkt_generic_loopback_t_destination_type_get,
     bcmpkt_generic_loopback_t_entropy_obj_get,
@@ -2601,7 +2779,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_generic_loopback_t_fget[BCM5688
     bcmpkt_generic_loopback_t_start_byte_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_generic_loopback_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
     bcmpkt_generic_loopback_t_destination_obj_set,
     bcmpkt_generic_loopback_t_destination_type_set,
     bcmpkt_generic_loopback_t_entropy_obj_set,
@@ -2619,13 +2797,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_generic_loopback_t_fset[BCM5688
     bcmpkt_generic_loopback_t_start_byte_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_generic_loopback_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_generic_loopback_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_generic_loopback_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_field_data,
 };
 
 
@@ -2704,7 +2882,7 @@ static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_gpe_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_gpe_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT] = {
     bcmpkt_gpe_t_flags_get,
     bcmpkt_gpe_t_next_protocol_get,
     bcmpkt_gpe_t_reserved0_get,
@@ -2712,7 +2890,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_gpe_t_fget[BCM56880_A0_DNA_4_11
     bcmpkt_gpe_t_vni_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_gpe_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_gpe_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT] = {
     bcmpkt_gpe_t_flags_set,
     bcmpkt_gpe_t_next_protocol_set,
     bcmpkt_gpe_t_reserved0_set,
@@ -2720,13 +2898,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_gpe_t_fset[BCM56880_A0_DNA_4_11
     bcmpkt_gpe_t_vni_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_gpe_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_gpe_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_gpe_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_gpe_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_gpe_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_gpe_t_field_data,
 };
 
 
@@ -2760,23 +2938,23 @@ static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint3
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_gre_chksum_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
     bcmpkt_gre_chksum_t_checksum_get,
     bcmpkt_gre_chksum_t_offset_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_gre_chksum_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
     bcmpkt_gre_chksum_t_checksum_set,
     bcmpkt_gre_chksum_t_offset_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_gre_chksum_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_gre_chksum_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_gre_chksum_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_field_data,
 };
 
 
@@ -2796,21 +2974,21 @@ static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_gre_key_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_gre_key_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT] = {
     bcmpkt_gre_key_t_key_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_gre_key_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_gre_key_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT] = {
     bcmpkt_gre_key_t_key_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_gre_key_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_gre_key_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_gre_key_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_gre_key_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_gre_key_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_gre_key_t_field_data,
 };
 
 
@@ -2830,21 +3008,21 @@ static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_gre_rout_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
     bcmpkt_gre_rout_t_routing_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_gre_rout_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
     bcmpkt_gre_rout_t_routing_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_gre_rout_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_gre_rout_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_gre_rout_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_field_data,
 };
 
 
@@ -2864,21 +3042,21 @@ static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_gre_seq_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
     bcmpkt_gre_seq_t_sequence_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_gre_seq_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
     bcmpkt_gre_seq_t_sequence_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_gre_seq_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_gre_seq_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_gre_seq_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_field_data,
 };
 
 
@@ -2942,27 +3120,27 @@ static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_gre_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_gre_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT] = {
     bcmpkt_gre_t_c_r_k_s_get,
     bcmpkt_gre_t_protocol_get,
     bcmpkt_gre_t_reserved_get,
     bcmpkt_gre_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_gre_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_gre_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT] = {
     bcmpkt_gre_t_c_r_k_s_set,
     bcmpkt_gre_t_protocol_set,
     bcmpkt_gre_t_reserved_set,
     bcmpkt_gre_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_gre_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_gre_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_gre_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_gre_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_gre_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_gre_t_field_data,
 };
 
 
@@ -3161,7 +3339,7 @@ static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_hg3_base_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_FID_COUNT] = {
     bcmpkt_hg3_base_t_cn_get,
     bcmpkt_hg3_base_t_cng_get,
     bcmpkt_hg3_base_t_entropy_get,
@@ -3177,7 +3355,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_hg3_base_t_fget[BCM56880_A0_DNA
     bcmpkt_hg3_base_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_hg3_base_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_FID_COUNT] = {
     bcmpkt_hg3_base_t_cn_set,
     bcmpkt_hg3_base_t_cng_set,
     bcmpkt_hg3_base_t_entropy_set,
@@ -3193,17 +3371,17 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_hg3_base_t_fset[BCM56880_A0_DNA
     bcmpkt_hg3_base_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_hg3_base_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_hg3_base_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_hg3_base_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_BASE_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_field_data,
 };
 
 
-static int32_t bcmpkt_hg3_extension_0_t_class_id_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
     *val = WORD_FIELD_GET(data[0], 16, 8);
@@ -3211,17 +3389,32 @@ static int32_t bcmpkt_hg3_extension_0_t_class_id_get(uint32_t *data, int profile
     return ret;
 }
 
-static int32_t bcmpkt_hg3_extension_0_t_class_id_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
     WORD_FIELD_SET(data[0], 16, 8, val);
     return ret;
 }
 
+static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 2, val);
+    return ret;
+}
+
 static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[1], 16, 16);
+    *val = WORD_FIELD_GET(data[1], 0, 16);
 
     return ret;
 }
@@ -3229,14 +3422,14 @@ static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int pr
 static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[1], 16, 16, val);
+    WORD_FIELD_SET(data[1], 0, 16, val);
     return ret;
 }
 
 static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[0], 24, 8);
+    *val = WORD_FIELD_GET(data[0], 26, 6);
 
     return ret;
 }
@@ -3244,14 +3437,14 @@ static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, u
 static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[0], 24, 8, val);
+    WORD_FIELD_SET(data[0], 26, 6, val);
     return ret;
 }
 
 static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[1], 0, 16);
+    *val = WORD_FIELD_GET(data[0], 0, 16);
 
     return ret;
 }
@@ -3259,14 +3452,14 @@ static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, in
 static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[1], 0, 16, val);
+    WORD_FIELD_SET(data[0], 0, 16, val);
     return ret;
 }
 
 static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[0], 0, 16);
+    *val = WORD_FIELD_GET(data[1], 16, 16);
 
     return ret;
 }
@@ -3274,33 +3467,35 @@ static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uin
 static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[0], 0, 16, val);
+    WORD_FIELD_SET(data[1], 16, 16, val);
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
-    bcmpkt_hg3_extension_0_t_class_id_get,
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+    bcmpkt_hg3_extension_0_t_class_id_lsb_get,
+    bcmpkt_hg3_extension_0_t_class_id_msb_get,
     bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get,
     bcmpkt_hg3_extension_0_t_flags_get,
     bcmpkt_hg3_extension_0_t_forwarding_domain_get,
     bcmpkt_hg3_extension_0_t_svp_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
-    bcmpkt_hg3_extension_0_t_class_id_set,
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+    bcmpkt_hg3_extension_0_t_class_id_lsb_set,
+    bcmpkt_hg3_extension_0_t_class_id_msb_set,
     bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set,
     bcmpkt_hg3_extension_0_t_flags_set,
     bcmpkt_hg3_extension_0_t_forwarding_domain_set,
     bcmpkt_hg3_extension_0_t_svp_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_field_data,
 };
 
 
@@ -3350,25 +3545,25 @@ static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint3
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
     bcmpkt_hop_by_hop_t_hdr_ext_len_get,
     bcmpkt_hop_by_hop_t_next_header_get,
     bcmpkt_hop_by_hop_t_option_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
     bcmpkt_hop_by_hop_t_hdr_ext_len_set,
     bcmpkt_hop_by_hop_t_next_header_set,
     bcmpkt_hop_by_hop_t_option_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_field_data,
 };
 
 
@@ -3417,25 +3612,25 @@ static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_icmp_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_icmp_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT] = {
     bcmpkt_icmp_t_checksum_get,
     bcmpkt_icmp_t_code_get,
     bcmpkt_icmp_t_icmp_type_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_icmp_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_icmp_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT] = {
     bcmpkt_icmp_t_checksum_set,
     bcmpkt_icmp_t_code_set,
     bcmpkt_icmp_t_icmp_type_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_icmp_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_icmp_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_icmp_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_icmp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_icmp_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_icmp_t_field_data,
 };
 
 
@@ -3469,23 +3664,23 @@ static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int pr
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get,
     bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set,
     bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_field_data,
 };
 
 
@@ -3549,27 +3744,27 @@ static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_0_b_t_cn_get,
     bcmpkt_ifa_flex_md_0_b_t_port_speed_get,
     bcmpkt_ifa_flex_md_0_b_t_queue_id_get,
     bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_0_b_t_cn_set,
     bcmpkt_ifa_flex_md_0_b_t_port_speed_set,
     bcmpkt_ifa_flex_md_0_b_t_queue_id_set,
     bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_field_data,
 };
 
 
@@ -3619,25 +3814,25 @@ static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, i
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_1_t_egress_port_id_get,
     bcmpkt_ifa_flex_md_1_t_ingress_port_id_get,
     bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_1_t_egress_port_id_set,
     bcmpkt_ifa_flex_md_1_t_ingress_port_id_set,
     bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_field_data,
 };
 
 
@@ -3673,23 +3868,23 @@ static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, in
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get,
     bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set,
     bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_field_data,
 };
 
 
@@ -3725,23 +3920,23 @@ static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get,
     bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set,
     bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_field_data,
 };
 
 
@@ -3820,7 +4015,7 @@ static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_header_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
     bcmpkt_ifa_header_t_flags_get,
     bcmpkt_ifa_header_t_gns_get,
     bcmpkt_ifa_header_t_max_length_get,
@@ -3828,7 +4023,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_header_t_fget[BCM56880_A0_D
     bcmpkt_ifa_header_t_ver_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_header_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
     bcmpkt_ifa_header_t_flags_set,
     bcmpkt_ifa_header_t_gns_set,
     bcmpkt_ifa_header_t_max_length_set,
@@ -3836,13 +4031,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_header_t_fset[BCM56880_A0_D
     bcmpkt_ifa_header_t_ver_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_header_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_header_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_ifa_header_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_HEADER_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_field_data,
 };
 
 
@@ -3891,25 +4086,25 @@ static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
     bcmpkt_ifa_md_base_t_action_vector_get,
     bcmpkt_ifa_md_base_t_hop_limit_current_length_get,
     bcmpkt_ifa_md_base_t_request_vector_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
     bcmpkt_ifa_md_base_t_action_vector_set,
     bcmpkt_ifa_md_base_t_hop_limit_current_length_set,
     bcmpkt_ifa_md_base_t_request_vector_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_field_data,
 };
 
 
@@ -3974,27 +4169,27 @@ static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int prof
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
     bcmpkt_ifa_metadata_t_action_vector_get,
     bcmpkt_ifa_metadata_t_hop_limit_current_length_get,
     bcmpkt_ifa_metadata_t_metadata_get,
     bcmpkt_ifa_metadata_t_request_vector_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
     bcmpkt_ifa_metadata_t_action_vector_set,
     bcmpkt_ifa_metadata_t_hop_limit_current_length_set,
     bcmpkt_ifa_metadata_t_metadata_set,
     bcmpkt_ifa_metadata_t_request_vector_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IFA_METADATA_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_field_data,
 };
 
 
@@ -4059,27 +4254,27 @@ static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_igmp_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_igmp_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT] = {
     bcmpkt_igmp_t_checksum_get,
     bcmpkt_igmp_t_group_address_get,
     bcmpkt_igmp_t_igmp_type_get,
     bcmpkt_igmp_t_max_resp_time_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_igmp_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_igmp_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT] = {
     bcmpkt_igmp_t_checksum_set,
     bcmpkt_igmp_t_group_address_set,
     bcmpkt_igmp_t_igmp_type_set,
     bcmpkt_igmp_t_max_resp_time_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_igmp_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_igmp_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_igmp_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_igmp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_igmp_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_igmp_t_field_data,
 };
 
 
@@ -4161,7 +4356,7 @@ static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ipfix_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ipfix_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT] = {
     bcmpkt_ipfix_t_export_time_get,
     bcmpkt_ipfix_t_length_get,
     bcmpkt_ipfix_t_obs_domain_id_get,
@@ -4169,7 +4364,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ipfix_t_fget[BCM56880_A0_DNA_4_
     bcmpkt_ipfix_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ipfix_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ipfix_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT] = {
     bcmpkt_ipfix_t_export_time_set,
     bcmpkt_ipfix_t_length_set,
     bcmpkt_ipfix_t_obs_domain_id_set,
@@ -4177,13 +4372,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ipfix_t_fset[BCM56880_A0_DNA_4_
     bcmpkt_ipfix_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ipfix_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ipfix_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ipfix_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_ipfix_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ipfix_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_ipfix_t_field_data,
 };
 
 
@@ -4355,7 +4550,7 @@ static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, ui
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ipv4_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ipv4_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT] = {
     bcmpkt_ipv4_t_da_get,
     bcmpkt_ipv4_t_flags_frag_offset_get,
     bcmpkt_ipv4_t_hdr_checksum_get,
@@ -4369,7 +4564,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ipv4_t_fget[BCM56880_A0_DNA_4_1
     bcmpkt_ipv4_t_version_hdr_len_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ipv4_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ipv4_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT] = {
     bcmpkt_ipv4_t_da_set,
     bcmpkt_ipv4_t_flags_frag_offset_set,
     bcmpkt_ipv4_t_hdr_checksum_set,
@@ -4383,13 +4578,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ipv4_t_fset[BCM56880_A0_DNA_4_1
     bcmpkt_ipv4_t_version_hdr_len_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ipv4_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ipv4_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ipv4_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_ipv4_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ipv4_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_ipv4_t_field_data,
 };
 
 
@@ -4515,7 +4710,7 @@ static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t v
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ipv6_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_ipv6_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT] = {
     bcmpkt_ipv6_t_da_get,
     bcmpkt_ipv6_t_flow_label_get,
     bcmpkt_ipv6_t_hop_limit_get,
@@ -4526,7 +4721,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ipv6_t_fget[BCM56880_A0_DNA_4_1
     bcmpkt_ipv6_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ipv6_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_ipv6_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT] = {
     bcmpkt_ipv6_t_da_set,
     bcmpkt_ipv6_t_flow_label_set,
     bcmpkt_ipv6_t_hop_limit_set,
@@ -4537,13 +4732,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ipv6_t_fset[BCM56880_A0_DNA_4_1
     bcmpkt_ipv6_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ipv6_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_ipv6_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ipv6_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_ipv6_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_ipv6_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_ipv6_t_field_data,
 };
 
 
@@ -4579,23 +4774,23 @@ static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_l2_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_l2_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT] = {
     bcmpkt_l2_t_macda_get,
     bcmpkt_l2_t_macsa_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_l2_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_l2_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT] = {
     bcmpkt_l2_t_macda_set,
     bcmpkt_l2_t_macsa_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_l2_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_l2_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_l2_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_l2_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_l2_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_l2_t_field_data,
 };
 
 
@@ -4615,21 +4810,21 @@ static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
     bcmpkt_mirror_erspan_sn_t_seq_num_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
     bcmpkt_mirror_erspan_sn_t_seq_num_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_field_data,
 };
 
 
@@ -4649,21 +4844,21 @@ static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, u
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_mirror_transport_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
     bcmpkt_mirror_transport_t_data_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_mirror_transport_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
     bcmpkt_mirror_transport_t_data_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_mirror_transport_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_mirror_transport_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_mirror_transport_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_field_data,
 };
 
 
@@ -4727,27 +4922,27 @@ static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_mpls_ach_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
     bcmpkt_mpls_ach_t_channel_type_get,
     bcmpkt_mpls_ach_t_cw_type_get,
     bcmpkt_mpls_ach_t_reserved_get,
     bcmpkt_mpls_ach_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_mpls_ach_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
     bcmpkt_mpls_ach_t_channel_type_set,
     bcmpkt_mpls_ach_t_cw_type_set,
     bcmpkt_mpls_ach_t_reserved_set,
     bcmpkt_mpls_ach_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_mpls_ach_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_mpls_ach_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_mpls_ach_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_field_data,
 };
 
 
@@ -4767,21 +4962,21 @@ static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_mpls_bv_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT] = {
     bcmpkt_mpls_bv_t_value_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_mpls_bv_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT] = {
     bcmpkt_mpls_bv_t_value_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_mpls_bv_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_mpls_bv_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_mpls_bv_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_field_data,
 };
 
 
@@ -4830,25 +5025,25 @@ static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_mpls_cw_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT] = {
     bcmpkt_mpls_cw_t_cw_type_get,
     bcmpkt_mpls_cw_t_reserved_get,
     bcmpkt_mpls_cw_t_seq_number_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_mpls_cw_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT] = {
     bcmpkt_mpls_cw_t_cw_type_set,
     bcmpkt_mpls_cw_t_reserved_set,
     bcmpkt_mpls_cw_t_seq_number_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_mpls_cw_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_mpls_cw_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_mpls_cw_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_field_data,
 };
 
 
@@ -4912,27 +5107,27 @@ static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_mpls_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_mpls_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT] = {
     bcmpkt_mpls_t_bos_get,
     bcmpkt_mpls_t_exp_get,
     bcmpkt_mpls_t_label_get,
     bcmpkt_mpls_t_ttl_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_mpls_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_mpls_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT] = {
     bcmpkt_mpls_t_bos_set,
     bcmpkt_mpls_t_exp_set,
     bcmpkt_mpls_t_label_set,
     bcmpkt_mpls_t_ttl_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_mpls_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_mpls_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_mpls_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_mpls_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_mpls_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_mpls_t_field_data,
 };
 
 
@@ -5149,7 +5344,7 @@ static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_p_1588_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_p_1588_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT] = {
     bcmpkt_p_1588_t_cntrl_get,
     bcmpkt_p_1588_t_correction_get,
     bcmpkt_p_1588_t_domain_nb_get,
@@ -5166,7 +5361,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_p_1588_t_fget[BCM56880_A0_DNA_4
     bcmpkt_p_1588_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_p_1588_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_p_1588_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT] = {
     bcmpkt_p_1588_t_cntrl_set,
     bcmpkt_p_1588_t_correction_set,
     bcmpkt_p_1588_t_domain_nb_set,
@@ -5183,13 +5378,97 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_p_1588_t_fset[BCM56880_A0_DNA_4
     bcmpkt_p_1588_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_p_1588_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_p_1588_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_p_1588_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_p_1588_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_p_1588_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_p_1588_t_field_data,
+};
+
+
+static int32_t bcmpkt_pim_t_hdr_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_4_5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_4_5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_6_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_pim_t_hdr_bytes_6_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_pim_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_FID_COUNT] = {
+    bcmpkt_pim_t_hdr_bytes_0_1_get,
+    bcmpkt_pim_t_hdr_bytes_2_3_get,
+    bcmpkt_pim_t_hdr_bytes_4_5_get,
+    bcmpkt_pim_t_hdr_bytes_6_7_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_pim_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_FID_COUNT] = {
+    bcmpkt_pim_t_hdr_bytes_0_1_set,
+    bcmpkt_pim_t_hdr_bytes_2_3_set,
+    bcmpkt_pim_t_hdr_bytes_4_5_set,
+    bcmpkt_pim_t_hdr_bytes_6_7_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_pim_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_pim_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PIM_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_pim_t_field_data,
 };
 
 
@@ -5239,25 +5518,25 @@ static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uin
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
     bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
     bcmpkt_prog_ext_hdr_t_next_header_get,
     bcmpkt_prog_ext_hdr_t_option_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
     bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
     bcmpkt_prog_ext_hdr_t_next_header_set,
     bcmpkt_prog_ext_hdr_t_option_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_field_data,
 };
 
 
@@ -5353,7 +5632,7 @@ static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uin
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_psamp_0_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT] = {
     bcmpkt_psamp_0_t_flowset_get,
     bcmpkt_psamp_0_t_length_get,
     bcmpkt_psamp_0_t_next_hop_index_get,
@@ -5362,7 +5641,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_psamp_0_t_fget[BCM56880_A0_DNA_
     bcmpkt_psamp_0_t_template_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_psamp_0_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT] = {
     bcmpkt_psamp_0_t_flowset_set,
     bcmpkt_psamp_0_t_length_set,
     bcmpkt_psamp_0_t_next_hop_index_set,
@@ -5371,13 +5650,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_psamp_0_t_fset[BCM56880_A0_DNA_
     bcmpkt_psamp_0_t_template_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_psamp_0_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_psamp_0_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_psamp_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_field_data,
 };
 
 
@@ -5486,7 +5765,7 @@ static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, u
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_psamp_1_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT] = {
     bcmpkt_psamp_1_t_dlb_id_get,
     bcmpkt_psamp_1_t_egress_port_get,
     bcmpkt_psamp_1_t_epoch_get,
@@ -5496,7 +5775,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_psamp_1_t_fget[BCM56880_A0_DNA_
     bcmpkt_psamp_1_t_variable_flag_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_psamp_1_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT] = {
     bcmpkt_psamp_1_t_dlb_id_set,
     bcmpkt_psamp_1_t_egress_port_set,
     bcmpkt_psamp_1_t_epoch_set,
@@ -5506,13 +5785,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_psamp_1_t_fset[BCM56880_A0_DNA_
     bcmpkt_psamp_1_t_variable_flag_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_psamp_1_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_psamp_1_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_psamp_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_field_data,
 };
 
 
@@ -5624,7 +5903,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, i
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
     bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
     bcmpkt_psamp_mirror_on_drop_0_t_length_get,
@@ -5634,7 +5913,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_fget[B
     bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
     bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
     bcmpkt_psamp_mirror_on_drop_0_t_length_set,
@@ -5644,17 +5923,17 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_fset[B
     bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_data,
 };
 
 
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
     *val = WORD_FIELD_GET(data[0], 24, 8);
@@ -5662,44 +5941,44 @@ static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *dat
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
     WORD_FIELD_SET(data[0], 24, 8, val);
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_mod_state_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[1], 24, 8);
+    *val = WORD_FIELD_GET(data[0], 22, 2);
 
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_mod_state_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[1], 24, 8, val);
+    WORD_FIELD_SET(data[0], 22, 2, val);
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[0], 16, 8);
+    *val = WORD_FIELD_GET(data[0], 16, 6);
 
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[0], 16, 8, val);
+    WORD_FIELD_SET(data[0], 16, 6, val);
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
     *val = WORD_FIELD_GET(data[1], 0, 16);
@@ -5707,14 +5986,29 @@ static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
     WORD_FIELD_SET(data[1], 0, 16, val);
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
     *val = WORD_FIELD_GET(data[0], 0, 16);
@@ -5722,14 +6016,14 @@ static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
     WORD_FIELD_SET(data[0], 0, 16, val);
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
     *val = WORD_FIELD_GET(data[1], 16, 8);
@@ -5737,38 +6031,40 @@ static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *d
     return ret;
 }
 
-static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
     WORD_FIELD_SET(data[1], 16, 8, val);
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get,
-    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get,
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_mod_state_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
-    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set,
-    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set,
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_mod_state_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_field_data,
 };
 
 
@@ -5911,7 +6207,7 @@ static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_rarp_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_rarp_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT] = {
     bcmpkt_rarp_t_hardware_len_get,
     bcmpkt_rarp_t_hardware_type_get,
     bcmpkt_rarp_t_operation_get,
@@ -5923,7 +6219,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_rarp_t_fget[BCM56880_A0_DNA_4_1
     bcmpkt_rarp_t_target_ip_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_rarp_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_rarp_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT] = {
     bcmpkt_rarp_t_hardware_len_set,
     bcmpkt_rarp_t_hardware_type_set,
     bcmpkt_rarp_t_operation_set,
@@ -5935,13 +6231,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_rarp_t_fset[BCM56880_A0_DNA_4_1
     bcmpkt_rarp_t_target_ip_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_rarp_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_rarp_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_rarp_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_rarp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_rarp_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_rarp_t_field_data,
 };
 
 
@@ -6021,7 +6317,7 @@ static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, u
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_routing_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_routing_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT] = {
     bcmpkt_routing_t_data_get,
     bcmpkt_routing_t_hdr_ext_len_get,
     bcmpkt_routing_t_next_header_get,
@@ -6029,7 +6325,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_routing_t_fget[BCM56880_A0_DNA_
     bcmpkt_routing_t_segments_left_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_routing_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_routing_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT] = {
     bcmpkt_routing_t_data_set,
     bcmpkt_routing_t_hdr_ext_len_set,
     bcmpkt_routing_t_next_header_set,
@@ -6037,13 +6333,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_routing_t_fset[BCM56880_A0_DNA_
     bcmpkt_routing_t_segments_left_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_routing_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_routing_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_routing_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_routing_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_routing_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_routing_t_field_data,
 };
 
 
@@ -6077,23 +6373,23 @@ static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_rspan_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_rspan_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT] = {
     bcmpkt_rspan_t_tag_get,
     bcmpkt_rspan_t_tpid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_rspan_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_rspan_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT] = {
     bcmpkt_rspan_t_tag_set,
     bcmpkt_rspan_t_tpid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_rspan_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_rspan_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_rspan_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_rspan_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_rspan_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_rspan_t_field_data,
 };
 
 
@@ -6143,25 +6439,25 @@ static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, ui
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
     bcmpkt_sflow_shim_0_t_sys_destination_get,
     bcmpkt_sflow_shim_0_t_sys_source_get,
     bcmpkt_sflow_shim_0_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
     bcmpkt_sflow_shim_0_t_sys_destination_set,
     bcmpkt_sflow_shim_0_t_sys_source_set,
     bcmpkt_sflow_shim_0_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_field_data,
 };
 
 
@@ -6285,7 +6581,7 @@ static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
     bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
     bcmpkt_sflow_shim_1_t_flag_discarded_get,
     bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
@@ -6296,7 +6592,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_fget[BCM56880_A0
     bcmpkt_sflow_shim_1_t_sys_opcode_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
     bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
     bcmpkt_sflow_shim_1_t_flag_discarded_set,
     bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
@@ -6307,13 +6603,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_fset[BCM56880_A0
     bcmpkt_sflow_shim_1_t_sys_opcode_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_field_data,
 };
 
 
@@ -6348,23 +6644,23 @@ static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int prof
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
     bcmpkt_sflow_shim_2_t_sequence_num_get,
     bcmpkt_sflow_shim_2_t_user_meta_data_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
     bcmpkt_sflow_shim_2_t_sequence_num_set,
     bcmpkt_sflow_shim_2_t_user_meta_data_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_field_data,
 };
 
 
@@ -6399,23 +6695,23 @@ static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint3
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_snap_llc_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
     bcmpkt_snap_llc_t_length_get,
     bcmpkt_snap_llc_t_snap_llc_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_snap_llc_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
     bcmpkt_snap_llc_t_length_set,
     bcmpkt_snap_llc_t_snap_llc_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_snap_llc_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_snap_llc_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_snap_llc_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_field_data,
 };
 
 
@@ -6449,23 +6745,23 @@ static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profil
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_first_4bytes_t_dst_port_get,
     bcmpkt_tcp_first_4bytes_t_src_port_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_first_4bytes_t_dst_port_set,
     bcmpkt_tcp_first_4bytes_t_src_port_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_field_data,
 };
 
 
@@ -6561,7 +6857,7 @@ static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profil
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_last_16bytes_t_ack_num_get,
     bcmpkt_tcp_last_16bytes_t_checksum_get,
     bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
@@ -6570,7 +6866,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_fget[BCM5688
     bcmpkt_tcp_last_16bytes_t_win_size_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_last_16bytes_t_ack_num_set,
     bcmpkt_tcp_last_16bytes_t_checksum_set,
     bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
@@ -6579,13 +6875,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_fset[BCM5688
     bcmpkt_tcp_last_16bytes_t_win_size_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_field_data,
 };
 
 
@@ -6649,27 +6945,27 @@ static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_udp_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_udp_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT] = {
     bcmpkt_udp_t_checksum_get,
     bcmpkt_udp_t_dst_port_get,
     bcmpkt_udp_t_src_port_get,
     bcmpkt_udp_t_udp_length_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_udp_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_udp_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT] = {
     bcmpkt_udp_t_checksum_set,
     bcmpkt_udp_t_dst_port_set,
     bcmpkt_udp_t_src_port_set,
     bcmpkt_udp_t_udp_length_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_udp_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_udp_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_udp_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_udp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_udp_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_udp_t_field_data,
 };
 
 
@@ -6705,23 +7001,23 @@ static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_unknown_l3_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
     bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
     bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_unknown_l3_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
     bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
     bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_unknown_l3_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_unknown_l3_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_unknown_l3_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_field_data,
 };
 
 
@@ -6741,21 +7037,21 @@ static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_unknown_l4_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
     bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_unknown_l4_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
     bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_unknown_l4_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_unknown_l4_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_unknown_l4_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_field_data,
 };
 
 
@@ -6805,25 +7101,25 @@ static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_unknown_l5_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
     bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
     bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
     bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_unknown_l5_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
     bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
     bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
     bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_unknown_l5_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_unknown_l5_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_unknown_l5_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_field_data,
 };
 
 
@@ -6887,27 +7183,27 @@ static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_vlan_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_vlan_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT] = {
     bcmpkt_vlan_t_cfi_get,
     bcmpkt_vlan_t_pcp_get,
     bcmpkt_vlan_t_tpid_get,
     bcmpkt_vlan_t_vid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_vlan_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_vlan_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT] = {
     bcmpkt_vlan_t_cfi_set,
     bcmpkt_vlan_t_pcp_set,
     bcmpkt_vlan_t_tpid_set,
     bcmpkt_vlan_t_vid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_vlan_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_vlan_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_vlan_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_vlan_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_vlan_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_vlan_t_field_data,
 };
 
 
@@ -6942,23 +7238,23 @@ static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_vntag_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_vntag_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT] = {
     bcmpkt_vntag_t_tag_get,
     bcmpkt_vntag_t_tpid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_vntag_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_vntag_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT] = {
     bcmpkt_vntag_t_tag_set,
     bcmpkt_vntag_t_tpid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_vntag_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_vntag_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_vntag_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_vntag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_vntag_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_vntag_t_field_data,
 };
 
 
@@ -7008,25 +7304,25 @@ static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_vxlan_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_vxlan_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT] = {
     bcmpkt_vxlan_t_flags_reserved_1_get,
     bcmpkt_vxlan_t_reserved2_get,
     bcmpkt_vxlan_t_vn_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_vxlan_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_vxlan_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT] = {
     bcmpkt_vxlan_t_flags_reserved_1_set,
     bcmpkt_vxlan_t_reserved2_set,
     bcmpkt_vxlan_t_vn_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_vxlan_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_vxlan_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_vxlan_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_vxlan_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_vxlan_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_vxlan_t_field_data,
 };
 
 
@@ -7138,7 +7434,7 @@ static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t v
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_wesp_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_dna_6_5_30_1_1_wesp_t_fget[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT] = {
     bcmpkt_wesp_t_flags_get,
     bcmpkt_wesp_t_header_len_get,
     bcmpkt_wesp_t_next_header_get,
@@ -7148,7 +7444,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_wesp_t_fget[BCM56880_A0_DNA_4_1
     bcmpkt_wesp_t_wesp_iv_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_wesp_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_dna_6_5_30_1_1_wesp_t_fset[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT] = {
     bcmpkt_wesp_t_flags_set,
     bcmpkt_wesp_t_header_len_set,
     bcmpkt_wesp_t_next_header_set,
@@ -7158,508 +7454,522 @@ bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_wesp_t_fset[BCM56880_A0_DNA_4_1
     bcmpkt_wesp_t_wesp_iv_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_wesp_t_field_data[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_6_5_30_1_1_wesp_t_field_data[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_wesp_t_field_info = {
-    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FID_COUNT,
-    .info = bcm56880_a0_dna_4_11_4_0_wesp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_6_5_30_1_1_wesp_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT,
+    .info = bcm56880_a0_dna_6_5_30_1_1_wesp_t_field_data,
 };
 
-static bcmpkt_flex_pmd_info_t bcm56880_a0_dna_4_11_4_0_flexhdr_info_list[BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_COUNT] = {
+static bcmpkt_flex_pmd_info_t bcm56880_a0_dna_6_5_30_1_1_flexhdr_info_list[BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_arp_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_arp_t_fset,
+    },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_arp_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_authen_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_arp_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_arp_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_authen_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_authen_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_authen_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_bfd_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_authen_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_authen_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_bfd_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_bfd_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_bfd_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_cntag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_bfd_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_bfd_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_cntag_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_cntag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_cntag_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_cntag_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_cntag_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_ifa_l2_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_cpu_composites_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_dest_option_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_dest_option_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_dest_option_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_dest_option_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_dest_option_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_dest_option_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_erspan3_fixed_hdr_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_erspan3_subhdr_5_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_esp_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_esp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_esp_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_esp_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_esp_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_esp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_etag_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_etag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_etag_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_etag_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_etag_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_etag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_ethertype_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_ethertype_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_ethertype_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_ethertype_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ethertype_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ethertype_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_frag_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_frag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_frag_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_frag_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_frag_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_frag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_generic_loopback_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_generic_loopback_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_generic_loopback_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_generic_loopback_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_gpe_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_gpe_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_gpe_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_gpe_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_gpe_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_gpe_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_gre_chksum_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_gre_chksum_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_gre_chksum_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_gre_chksum_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_gre_key_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_gre_key_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_gre_key_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_gre_key_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_gre_key_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_gre_key_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_gre_rout_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_gre_rout_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_gre_rout_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_gre_rout_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_gre_seq_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_gre_seq_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_gre_seq_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_gre_seq_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_gre_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_gre_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_gre_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_gre_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_gre_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_gre_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_hg3_base_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_hg3_base_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_hg3_base_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_hg3_base_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_hg3_extension_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_hop_by_hop_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_icmp_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_icmp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_icmp_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_icmp_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_icmp_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_icmp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_a_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_0_b_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_2_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_flex_md_3_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_header_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_header_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_header_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_header_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_md_base_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ifa_metadata_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_igmp_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_igmp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_igmp_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_igmp_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_igmp_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_igmp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_ipfix_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_ipfix_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_ipfix_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_ipfix_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ipfix_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ipfix_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_ipv4_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_ipv4_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_ipv4_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_ipv4_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ipv4_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ipv4_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_ipv6_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_ipv6_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_ipv6_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_ipv6_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_ipv6_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_ipv6_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_l2_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_l2_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_l2_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_l2_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_l2_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_l2_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_mirror_erspan_sn_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_mirror_transport_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_mirror_transport_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_mirror_transport_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_mirror_transport_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_mpls_ach_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_mpls_ach_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_mpls_ach_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_mpls_ach_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_mpls_bv_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_mpls_bv_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_mpls_bv_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_mpls_bv_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_mpls_cw_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_mpls_cw_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_mpls_cw_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_mpls_cw_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_mpls_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_mpls_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_mpls_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_mpls_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_mpls_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_mpls_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_p_1588_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_p_1588_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_p_1588_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_p_1588_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_p_1588_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_p_1588_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_pim_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_pim_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_pim_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_psamp_0_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_psamp_0_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_psamp_0_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_prog_ext_hdr_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_psamp_1_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_psamp_1_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_psamp_1_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_psamp_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_psamp_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_rarp_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_rarp_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_rarp_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_psamp_mirror_on_drop_3_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_routing_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_rarp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_routing_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_routing_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_rarp_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_rarp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_rspan_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_routing_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_rspan_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_rspan_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_routing_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_routing_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_rspan_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_rspan_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_rspan_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_snap_llc_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_snap_llc_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_snap_llc_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_sflow_shim_2_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_snap_llc_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_tcp_first_4bytes_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_udp_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_udp_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_udp_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_tcp_last_16bytes_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_unknown_l3_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_udp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_unknown_l3_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_unknown_l3_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_udp_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_udp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_unknown_l4_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_unknown_l4_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_unknown_l4_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_unknown_l3_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_unknown_l5_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_unknown_l5_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_unknown_l5_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_unknown_l4_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_vlan_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_vlan_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_vlan_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_unknown_l5_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_vntag_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_vlan_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_vntag_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_vntag_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_vlan_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_vlan_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_vxlan_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_vntag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_vxlan_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_vxlan_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_vntag_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_vntag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_wesp_t_field_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_vxlan_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_dna_4_11_4_0_wesp_t_fget,
-        .flex_fset = bcm56880_a0_dna_4_11_4_0_wesp_t_fset,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_vxlan_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_vxlan_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_info,
-        .reasons_info = &bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reasons_info,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_wesp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_6_5_30_1_1_wesp_t_fget,
+        .flex_fset = bcm56880_a0_dna_6_5_30_1_1_wesp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_field_info,
+        .reasons_info = &bcm56880_a0_dna_6_5_30_1_1_rxpmd_flex_reasons_info,
         .flex_common_fget = bcm56880_a0_rxpmd_flex_fget,
         .flex_common_fset = bcm56880_a0_rxpmd_flex_fset,
     },
 };
 
-static shr_enum_map_t bcm56880_a0_dna_4_11_4_0_flexhdr_id_map[] = {
-    BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
+static shr_enum_map_t bcm56880_a0_dna_6_5_30_1_1_flexhdr_id_map[] = {
+    BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_NAME_MAP_INIT
 };
 
-shr_enum_map_t * bcm56880_a0_dna_4_11_4_0_flexhdr_map_get(void)
+shr_enum_map_t * bcm56880_a0_dna_6_5_30_1_1_flexhdr_map_get(void)
 {
-    return bcm56880_a0_dna_4_11_4_0_flexhdr_id_map;
+    return bcm56880_a0_dna_6_5_30_1_1_flexhdr_id_map;
 }
 
-bcmpkt_flex_pmd_info_t * bcm56880_a0_dna_4_11_4_0_flex_pmd_info_get(uint32_t hid)
+bcmpkt_flex_pmd_info_t * bcm56880_a0_dna_6_5_30_1_1_flex_pmd_info_get(uint32_t hid)
 {
-    if (hid >= BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_COUNT) {
+    if (hid >= BCM56880_A0_DNA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT) {
         return NULL;
     }
 
-    return &bcm56880_a0_dna_4_11_4_0_flexhdr_info_list[hid];
+    return &bcm56880_a0_dna_6_5_30_1_1_flexhdr_info_list[hid];
 }
 
-int bcm56880_a0_dna_4_11_4_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
-    13,
-    20,
+int bcm56880_a0_dna_6_5_30_1_1_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+    14,
     21,
-    66,
-};
\ No newline at end of file
+    22,
+    68,
+};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_match_id.c
similarity index 83%
rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id.c
rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_match_id.c
index 13843eb79157..35f0100826ab 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_match_id.c
@@ -2,12 +2,12 @@
  *
  * DO NOT EDIT THIS FILE!
  * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56880_a0_hna_6_5_29_2_2_sf_match_id_info.yml
- * for device bcm56880_a0 and variant hna_6_5_29_2_2.
+ * from the NPL output file(s) bcm56880_a0_hna_6_5_30_3_0_sf_match_id_info.yml
+ * for device bcm56880_a0 and variant hna_6_5_30_3_0.
  * Edits to this file will be lost when it is regenerated.
  *
  * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  * All Rights Reserved.$
  *
  * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
@@ -29,13 +29,13 @@
 
 
 #include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-#include <bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id_defs.h>
+#include <bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_match_id_defs.h>
 
 
 static bcmpkt_rxpmd_match_id_db_t
-bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_COUNT] = {
+bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_COUNT] = {
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_ETAG",
         .match        = 0x20,
         .match_mask   = 0x30,
@@ -49,7 +49,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
         .match        = 0x8,
         .match_mask   = 0x8,
@@ -63,7 +63,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
         .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -77,7 +77,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
         .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3f,
@@ -91,7 +91,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -105,7 +105,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
         .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -119,7 +119,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_VNTAG",
         .match        = 0x10,
         .match_mask   = 0x30,
@@ -133,7 +133,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
         .match        = 0x1800,
         .match_mask   = 0x3830,
@@ -147,7 +147,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x80,
         .match_mask   = 0x1c2,
@@ -161,7 +161,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
         .match        = 0x408,
         .match_mask   = 0x64c,
@@ -175,7 +175,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
         .match        = 0x3800,
         .match_mask   = 0x3800,
@@ -189,7 +189,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
         .match        = 0x200,
         .match_mask   = 0x642,
@@ -203,7 +203,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -217,7 +217,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
         .match        = 0x100,
         .match_mask   = 0x1c0,
@@ -231,7 +231,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x600,
         .match_mask   = 0x640,
@@ -245,7 +245,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
         .match        = 0x1830,
         .match_mask   = 0x3870,
@@ -259,7 +259,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
         .match        = 0x2,
         .match_mask   = 0x42,
@@ -273,7 +273,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
         .match        = 0x202,
         .match_mask   = 0x642,
@@ -287,7 +287,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
         .match        = 0x1000,
         .match_mask   = 0x3800,
@@ -301,7 +301,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
         .match        = 0x82,
         .match_mask   = 0x1c2,
@@ -315,7 +315,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
         .match        = 0x12,
         .match_mask   = 0x72,
@@ -329,7 +329,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
         .match        = 0x2000,
         .match_mask   = 0x3830,
@@ -343,7 +343,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA",
         .match        = 0x180,
         .match_mask   = 0x1c0,
@@ -357,7 +357,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
         .match        = 0x404,
         .match_mask   = 0x64c,
@@ -371,7 +371,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
         .match        = 0x4,
         .match_mask   = 0x4c,
@@ -385,7 +385,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
         .match        = 0x8,
         .match_mask   = 0x4c,
@@ -399,7 +399,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
         .match        = 0x40,
         .match_mask   = 0x40,
@@ -413,7 +413,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
         .match        = 0x42,
         .match_mask   = 0x42,
@@ -427,7 +427,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
         .match        = 0x44,
         .match_mask   = 0x44,
@@ -441,7 +441,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
         .match        = 0x48,
         .match_mask   = 0x48,
@@ -455,7 +455,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
         .match        = 0x50,
         .match_mask   = 0x50,
@@ -469,7 +469,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -483,7 +483,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
         .match        = 0xc0,
         .match_mask   = 0xc0,
@@ -497,7 +497,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
         .match        = 0x140,
         .match_mask   = 0x140,
@@ -511,7 +511,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
         .match        = 0x240,
         .match_mask   = 0x240,
@@ -525,7 +525,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3fff,
@@ -539,7 +539,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
         .match        = 0x3000,
         .match_mask   = 0x3800,
@@ -553,7 +553,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
         .match        = 0x800,
         .match_mask   = 0x3830,
@@ -567,7 +567,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x20,
         .match_mask   = 0x70,
@@ -581,7 +581,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x820,
         .match_mask   = 0x3870,
@@ -595,7 +595,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
         .match        = 0x30,
         .match_mask   = 0x70,
@@ -609,7 +609,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x10,
         .match_mask   = 0x72,
@@ -623,7 +623,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x2800,
         .match_mask   = 0x3800,
@@ -637,7 +637,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x2030,
         .match_mask   = 0x3870,
@@ -651,7 +651,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
         .match        = 0x830,
         .match_mask   = 0x3870,
@@ -665,7 +665,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
         .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -679,7 +679,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
         .name         = "EGRESS_PKT_SYS_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x1,
@@ -693,7 +693,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG",
         .match        = 0x20,
         .match_mask   = 0x30,
@@ -707,7 +707,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
         .match        = 0x8,
         .match_mask   = 0x8,
@@ -721,7 +721,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -735,7 +735,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3f,
@@ -749,7 +749,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -763,7 +763,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -777,7 +777,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG",
         .match        = 0x10,
         .match_mask   = 0x30,
@@ -791,7 +791,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
         .match        = 0x1800,
         .match_mask   = 0x3830,
@@ -805,7 +805,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x80,
         .match_mask   = 0x1c2,
@@ -819,7 +819,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
         .match        = 0x408,
         .match_mask   = 0x64c,
@@ -833,7 +833,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
         .match        = 0x3800,
         .match_mask   = 0x3800,
@@ -847,7 +847,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
         .match        = 0x200,
         .match_mask   = 0x642,
@@ -861,7 +861,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -875,7 +875,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
         .match        = 0x100,
         .match_mask   = 0x1c0,
@@ -889,7 +889,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x600,
         .match_mask   = 0x640,
@@ -903,7 +903,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
         .match        = 0x1830,
         .match_mask   = 0x3870,
@@ -917,7 +917,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
         .match        = 0x2,
         .match_mask   = 0x42,
@@ -931,7 +931,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
         .match        = 0x202,
         .match_mask   = 0x642,
@@ -945,7 +945,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
         .match        = 0x1000,
         .match_mask   = 0x3800,
@@ -959,7 +959,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
         .match        = 0x82,
         .match_mask   = 0x1c2,
@@ -973,7 +973,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
         .match        = 0x12,
         .match_mask   = 0x72,
@@ -987,7 +987,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
         .match        = 0x2000,
         .match_mask   = 0x3830,
@@ -1001,7 +1001,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA",
         .match        = 0x180,
         .match_mask   = 0x1c0,
@@ -1015,7 +1015,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
         .match        = 0x404,
         .match_mask   = 0x64c,
@@ -1029,7 +1029,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
         .match        = 0x4,
         .match_mask   = 0x4c,
@@ -1043,7 +1043,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
         .match        = 0x8,
         .match_mask   = 0x4c,
@@ -1057,7 +1057,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
         .match        = 0x40,
         .match_mask   = 0x40,
@@ -1071,7 +1071,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
         .match        = 0x42,
         .match_mask   = 0x42,
@@ -1085,7 +1085,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
         .match        = 0x44,
         .match_mask   = 0x44,
@@ -1099,7 +1099,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
         .match        = 0x48,
         .match_mask   = 0x48,
@@ -1113,7 +1113,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
         .match        = 0x50,
         .match_mask   = 0x50,
@@ -1127,7 +1127,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -1141,7 +1141,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
         .match        = 0xc0,
         .match_mask   = 0xc0,
@@ -1155,7 +1155,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
         .match        = 0x140,
         .match_mask   = 0x140,
@@ -1169,7 +1169,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
         .match        = 0x240,
         .match_mask   = 0x240,
@@ -1183,7 +1183,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3fff,
@@ -1197,7 +1197,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
         .match        = 0x3000,
         .match_mask   = 0x3800,
@@ -1211,7 +1211,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
         .match        = 0x800,
         .match_mask   = 0x3830,
@@ -1225,7 +1225,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x20,
         .match_mask   = 0x70,
@@ -1239,7 +1239,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x820,
         .match_mask   = 0x3870,
@@ -1253,7 +1253,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
         .match        = 0x30,
         .match_mask   = 0x70,
@@ -1267,7 +1267,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x10,
         .match_mask   = 0x72,
@@ -1281,7 +1281,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x2800,
         .match_mask   = 0x3800,
@@ -1295,7 +1295,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x2030,
         .match_mask   = 0x3870,
@@ -1309,7 +1309,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
         .match        = 0x830,
         .match_mask   = 0x3870,
@@ -1323,7 +1323,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_ETAG",
         .match        = 0x20,
         .match_mask   = 0x30,
@@ -1337,7 +1337,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
         .match        = 0x8,
         .match_mask   = 0x8,
@@ -1351,7 +1351,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
         .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -1365,7 +1365,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
         .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3f,
@@ -1379,7 +1379,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -1393,7 +1393,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
         .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -1407,7 +1407,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_VNTAG",
         .match        = 0x10,
         .match_mask   = 0x30,
@@ -1421,7 +1421,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
         .match        = 0x1800,
         .match_mask   = 0x3830,
@@ -1435,7 +1435,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x80,
         .match_mask   = 0x1c2,
@@ -1449,7 +1449,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
         .match        = 0x408,
         .match_mask   = 0x64c,
@@ -1463,7 +1463,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
         .match        = 0x3800,
         .match_mask   = 0x3800,
@@ -1477,7 +1477,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
         .match        = 0x200,
         .match_mask   = 0x642,
@@ -1491,7 +1491,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -1505,7 +1505,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
         .match        = 0x100,
         .match_mask   = 0x1c0,
@@ -1519,7 +1519,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x600,
         .match_mask   = 0x640,
@@ -1533,7 +1533,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
         .match        = 0x2000,
         .match_mask   = 0x3830,
@@ -1547,7 +1547,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA",
         .match        = 0x180,
         .match_mask   = 0x1c0,
@@ -1561,7 +1561,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
         .match        = 0x404,
         .match_mask   = 0x64c,
@@ -1575,7 +1575,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
         .match        = 0x4,
         .match_mask   = 0x4c,
@@ -1589,7 +1589,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
         .match        = 0x8,
         .match_mask   = 0x4c,
@@ -1603,7 +1603,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3fff,
@@ -1617,7 +1617,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
         .match        = 0x3000,
         .match_mask   = 0x3800,
@@ -1631,7 +1631,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
         .match        = 0x800,
         .match_mask   = 0x3830,
@@ -1645,7 +1645,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x20,
         .match_mask   = 0x70,
@@ -1659,7 +1659,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x820,
         .match_mask   = 0x3870,
@@ -1673,7 +1673,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
         .match        = 0x30,
         .match_mask   = 0x70,
@@ -1687,7 +1687,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x10,
         .match_mask   = 0x72,
@@ -1701,7 +1701,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x2800,
         .match_mask   = 0x3800,
@@ -1715,7 +1715,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x2030,
         .match_mask   = 0x3870,
@@ -1729,7 +1729,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_ETAG",
         .match        = 0x20,
         .match_mask   = 0x30,
@@ -1743,7 +1743,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
         .match        = 0x8,
         .match_mask   = 0x8,
@@ -1757,7 +1757,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -1771,7 +1771,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3f,
@@ -1785,7 +1785,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -1799,7 +1799,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -1813,7 +1813,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_VNTAG",
         .match        = 0x10,
         .match_mask   = 0x30,
@@ -1827,7 +1827,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
         .match        = 0x1800,
         .match_mask   = 0x3830,
@@ -1841,7 +1841,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x80,
         .match_mask   = 0x1c2,
@@ -1855,7 +1855,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
         .match        = 0x408,
         .match_mask   = 0x64c,
@@ -1869,7 +1869,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
         .match        = 0x3800,
         .match_mask   = 0x3800,
@@ -1883,7 +1883,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
         .match        = 0x200,
         .match_mask   = 0x642,
@@ -1897,7 +1897,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -1911,7 +1911,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
         .match        = 0x100,
         .match_mask   = 0x1c0,
@@ -1925,7 +1925,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x600,
         .match_mask   = 0x640,
@@ -1939,7 +1939,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
         .match        = 0x1830,
         .match_mask   = 0x3870,
@@ -1953,7 +1953,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
         .match        = 0x2,
         .match_mask   = 0x42,
@@ -1967,7 +1967,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
         .match        = 0x202,
         .match_mask   = 0x642,
@@ -1981,7 +1981,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
         .match        = 0x1000,
         .match_mask   = 0x3800,
@@ -1995,7 +1995,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
         .match        = 0x82,
         .match_mask   = 0x1c2,
@@ -2009,7 +2009,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
         .match        = 0x12,
         .match_mask   = 0x72,
@@ -2023,7 +2023,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
         .match        = 0x2000,
         .match_mask   = 0x3830,
@@ -2037,7 +2037,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA",
         .match        = 0x180,
         .match_mask   = 0x1c0,
@@ -2051,7 +2051,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
         .match        = 0x404,
         .match_mask   = 0x64c,
@@ -2065,7 +2065,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
         .match        = 0x4,
         .match_mask   = 0x4c,
@@ -2079,7 +2079,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
         .match        = 0x8,
         .match_mask   = 0x4c,
@@ -2093,7 +2093,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
         .match        = 0x40,
         .match_mask   = 0x40,
@@ -2107,7 +2107,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
         .match        = 0x42,
         .match_mask   = 0x42,
@@ -2121,7 +2121,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
         .match        = 0x44,
         .match_mask   = 0x44,
@@ -2135,7 +2135,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
         .match        = 0x48,
         .match_mask   = 0x48,
@@ -2149,7 +2149,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
         .match        = 0x50,
         .match_mask   = 0x50,
@@ -2163,7 +2163,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -2177,7 +2177,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
         .match        = 0xc0,
         .match_mask   = 0xc0,
@@ -2191,7 +2191,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
         .match        = 0x140,
         .match_mask   = 0x140,
@@ -2205,7 +2205,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
         .match        = 0x240,
         .match_mask   = 0x240,
@@ -2219,7 +2219,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3fff,
@@ -2233,7 +2233,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
         .match        = 0x3000,
         .match_mask   = 0x3800,
@@ -2247,7 +2247,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
         .match        = 0x800,
         .match_mask   = 0x3830,
@@ -2261,7 +2261,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x20,
         .match_mask   = 0x70,
@@ -2275,7 +2275,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x820,
         .match_mask   = 0x3870,
@@ -2289,7 +2289,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
         .match        = 0x30,
         .match_mask   = 0x70,
@@ -2303,7 +2303,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x10,
         .match_mask   = 0x72,
@@ -2317,7 +2317,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x2800,
         .match_mask   = 0x3800,
@@ -2331,7 +2331,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x2030,
         .match_mask   = 0x3870,
@@ -2345,7 +2345,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
         .match        = 0x830,
         .match_mask   = 0x3870,
@@ -2359,7 +2359,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
         .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -2373,7 +2373,7 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
 
     },
     {
-        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        /* BCM56880_A0_HNA_6_5_30_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
         .name         = "INGRESS_PKT_SYS_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x1,
@@ -2388,23 +2388,23 @@ bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MA
     },
 };
 
-static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db_info = {
+static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db_info = {
     .num_entries = 168,
-    .db = bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db
+    .db = bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db
 };
-bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db_info_get(void) {
-    return &bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db_info;
+bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db_info_get(void) {
+    return &bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_db_info;
 }
 
-static shr_enum_map_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_map[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+static shr_enum_map_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_map[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_map_info = {
+static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_map_info = {
     .num_entries = 168,
-    .map = bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_map
+    .map = bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_map
 };
 
-bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_map_info_get(void) {
-    return &bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_map_info;
+bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_map_info_get(void) {
+    return &bcm56880_a0_hna_6_5_30_3_0_rxpmd_match_id_map_info;
 }
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_pkt_flexhdr.c
similarity index 73%
rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_pkt_flexhdr.c
rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_pkt_flexhdr.c
index 9c92caacb6e1..808a69c2b681 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_pkt_flexhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_pkt_flexhdr.c
@@ -3,11 +3,11 @@
  * DO NOT EDIT THIS FILE!
  * This file is auto-generated by xfc_map_parser
  * from the NPL output file(s) map.yml
- * for device bcm56880_a0 and variant hna_6_5_29_2_2.
+ * for device bcm56880_a0 and variant hna_6_5_30_3_0.
  * Edits to this file will be lost when it is regenerated.
  *
  * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  * All Rights Reserved.$
  *
  * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
@@ -31,298 +31,298 @@
 #include <shr/shr_error.h>
 #include <bcmpkt/bcmpkt_flexhdr.h>
 #include <bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h>
-#include <bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr.h>
-#include <bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr_data.h>
-#include <bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_flex_data.h>
+#include <bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56880_a0/hna_6_5_30_3_0/bcm56880_a0_hna_6_5_30_3_0_bcmpkt_rxpmd_flex_data.h>
 
 #define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
 #define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
 #define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
 #define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
 
-static void bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+static void bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
 {
     uint32_t *reason = data + 0;
 
     if (reason[12] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
     }
     if (reason[12] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
     }
     if (reason[12] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
     }
     if (reason[12] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT);
     }
     if (reason[12] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
     }
     if (reason[12] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
     }
     if (reason[12] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
     }
     if (reason[12] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD);
     }
     if (reason[12] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
     }
     if (reason[12] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
     }
     if (reason[12] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
     }
     if (reason[12] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
     }
     if (reason[12] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
     }
     if (reason[12] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
     }
     if (reason[12] & (0x1 << 14)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
     }
     if (reason[12] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
     }
     if (reason[12] & (0x1 << 16)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
     }
     if (reason[12] & (0x1 << 17)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_VFP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
     }
     if (reason[12] & (0x1 << 18)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
     }
     if (reason[12] & (0x1 << 19)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
     }
     if (reason[12] & (0x1 << 20)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
     }
     if (reason[12] & (0x1 << 21)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SVP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
     }
     if (reason[12] & (0x1 << 22)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
     }
     if (reason[12] & (0x1 << 23)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
     }
     if (reason[12] & (0x1 << 24)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
     }
     if (reason[12] & (0x1 << 25)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
     }
     if (reason[12] & (0x1 << 26)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
     }
     if (reason[12] & (0x1 << 27)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
     }
     if (reason[12] & (0x1 << 28)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
     }
     if (reason[12] & (0x1 << 29)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
     }
     if (reason[12] & (0x1 << 30)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
     }
     if (reason[12] & (0x1 << 31)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
     }
     if (reason[11] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
     }
     if (reason[11] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
     }
     if (reason[11] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
     }
     if (reason[11] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
     }
     if (reason[11] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
     }
     if (reason[11] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
     }
     if (reason[11] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
     }
     if (reason[11] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
     }
     if (reason[11] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE);
     }
     if (reason[11] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
     }
 }
 
-static void bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+static void bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
 {
     uint32_t *reason = data + 0;
 
     reason[12] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
         reason[12] |= (0x1 << 0);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
         reason[12] |= (0x1 << 1);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
         reason[12] |= (0x1 << 2);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) {
         reason[12] |= (0x1 << 3);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
         reason[12] |= (0x1 << 4);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
         reason[12] |= (0x1 << 5);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
         reason[12] |= (0x1 << 6);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) {
         reason[12] |= (0x1 << 7);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
         reason[12] |= (0x1 << 8);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
         reason[12] |= (0x1 << 9);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
         reason[12] |= (0x1 << 10);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
         reason[12] |= (0x1 << 11);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
         reason[12] |= (0x1 << 12);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
         reason[12] |= (0x1 << 13);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
         reason[12] |= (0x1 << 14);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
         reason[12] |= (0x1 << 15);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
         reason[12] |= (0x1 << 16);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
         reason[12] |= (0x1 << 17);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
         reason[12] |= (0x1 << 18);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
         reason[12] |= (0x1 << 19);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
         reason[12] |= (0x1 << 20);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
         reason[12] |= (0x1 << 21);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
         reason[12] |= (0x1 << 22);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
         reason[12] |= (0x1 << 23);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
         reason[12] |= (0x1 << 24);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
         reason[12] |= (0x1 << 25);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
         reason[12] |= (0x1 << 26);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
         reason[12] |= (0x1 << 27);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
         reason[12] |= (0x1 << 28);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
         reason[12] |= (0x1 << 29);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
         reason[12] |= (0x1 << 30);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
         reason[12] |= (0x1 << 31);
     }
     reason[11] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
         reason[11] |= (0x1 << 0);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
         reason[11] |= (0x1 << 1);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
         reason[11] |= (0x1 << 2);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
         reason[11] |= (0x1 << 3);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
         reason[11] |= (0x1 << 4);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
         reason[11] |= (0x1 << 5);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
         reason[11] |= (0x1 << 6);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
         reason[11] |= (0x1 << 7);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) {
         reason[11] |= (0x1 << 8);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
         reason[11] |= (0x1 << 15);
     }
 }
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_field_data[] = {
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_data[] = {
     {
         .name = "DLB_ECMP_DESTINATION_15_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
             { -1, -1 }, /* Profile 2. */
             { -1, -1 }, /* Profile 3. */
-            { 256, 271 }, /* Profile 4. */
-            { 256, 271 }, /* Profile 5. */
+            { 240, 255 }, /* Profile 4. */
+            { 240, 255 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "DROP_CODE_15_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -335,7 +335,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_field_
     },
     {
         .name = "DVP_15_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -348,57 +348,57 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_field_
     },
     {
         .name = "EFFECTIVE_TTL_7_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 192, 199 }, /* Profile 2. */
-            { 192, 199 }, /* Profile 3. */
-            { 192, 199 }, /* Profile 4. */
-            { 192, 199 }, /* Profile 5. */
+            { 176, 183 }, /* Profile 2. */
+            { 176, 183 }, /* Profile 3. */
+            { 176, 183 }, /* Profile 4. */
+            { 176, 183 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 256, 271 }, /* Profile 2. */
-            { 256, 271 }, /* Profile 3. */
+            { 240, 255 }, /* Profile 2. */
+            { 240, 255 }, /* Profile 3. */
         },
         .profile_cnt = 4,
     },
     {
         .name = "ENTROPY_LABEL_HIGH_3_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 404, 407 }, /* Profile 2. */
-            { 404, 407 }, /* Profile 3. */
-            { 404, 407 }, /* Profile 4. */
-            { 404, 407 }, /* Profile 5. */
+            { 372, 375 }, /* Profile 2. */
+            { 372, 375 }, /* Profile 3. */
+            { 372, 375 }, /* Profile 4. */
+            { 372, 375 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "ENTROPY_LABEL_LOW_15_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 208, 223 }, /* Profile 2. */
-            { 208, 223 }, /* Profile 3. */
-            { 208, 223 }, /* Profile 4. */
-            { 208, 223 }, /* Profile 5. */
+            { 192, 207 }, /* Profile 2. */
+            { 192, 207 }, /* Profile 3. */
+            { 192, 207 }, /* Profile 4. */
+            { 192, 207 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "EVENT_TRACE_VECTOR_31_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -411,7 +411,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_field_
     },
     {
         .name = "EVENT_TRACE_VECTOR_47_32",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -424,72 +424,72 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_field_
     },
     {
         .name = "I2E_CLASS_ID_15_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 112, 127 }, /* Profile 2. */
-            { 112, 127 }, /* Profile 3. */
-            { 112, 127 }, /* Profile 4. */
-            { 112, 127 }, /* Profile 5. */
+            { 288, 303 }, /* Profile 2. */
+            { 288, 303 }, /* Profile 3. */
+            { 288, 303 }, /* Profile 4. */
+            { 288, 303 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "IFP_IOAM_GBP_ACTION_3_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 384, 387 }, /* Profile 2. */
-            { 384, 387 }, /* Profile 3. */
-            { 384, 387 }, /* Profile 4. */
-            { 384, 387 }, /* Profile 5. */
+            { 400, 403 }, /* Profile 2. */
+            { 400, 403 }, /* Profile 3. */
+            { 400, 403 }, /* Profile 4. */
+            { 400, 403 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "IFP_TS_CONTROL_ACTION_3_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 400, 403 }, /* Profile 2. */
-            { 400, 403 }, /* Profile 3. */
-            { 400, 403 }, /* Profile 4. */
-            { 400, 403 }, /* Profile 5. */
+            { 380, 383 }, /* Profile 2. */
+            { 380, 383 }, /* Profile 3. */
+            { 380, 383 }, /* Profile 4. */
+            { 380, 383 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "ING_PORT_GROUP_ID_3_0_3_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_3_0_3_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_3_0_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 372, 375 }, /* Profile 2. */
-            { 372, 375 }, /* Profile 3. */
-            { 372, 375 }, /* Profile 4. */
-            { 372, 375 }, /* Profile 5. */
+            { 408, 411 }, /* Profile 2. */
+            { 408, 411 }, /* Profile 3. */
+            { 408, 411 }, /* Profile 4. */
+            { 408, 411 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "ING_PORT_GROUP_ID_7_4_3_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_7_4_3_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_7_4_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 376, 379 }, /* Profile 2. */
-            { 376, 379 }, /* Profile 3. */
-            { 376, 379 }, /* Profile 4. */
-            { 376, 379 }, /* Profile 5. */
+            { 412, 415 }, /* Profile 2. */
+            { 412, 415 }, /* Profile 3. */
+            { 412, 415 }, /* Profile 4. */
+            { 412, 415 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "ING_TIMESTAMP_31_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -502,7 +502,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_field_
     },
     {
         .name = "INGRESS_PP_PORT_ITAG_PRESERVE_15_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_ITAG_PRESERVE_15_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_ITAG_PRESERVE_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -515,97 +515,97 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_field_
     },
     {
         .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 240, 255 }, /* Profile 2. */
-            { 240, 255 }, /* Profile 3. */
-            { 240, 255 }, /* Profile 4. */
-            { 240, 255 }, /* Profile 5. */
+            { 224, 239 }, /* Profile 2. */
+            { 224, 239 }, /* Profile 3. */
+            { 224, 239 }, /* Profile 4. */
+            { 224, 239 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "INGRESS_QOS_REMARK_CTRL_3_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 392, 395 }, /* Profile 2. */
-            { 392, 395 }, /* Profile 3. */
-            { 392, 395 }, /* Profile 4. */
-            { 392, 395 }, /* Profile 5. */
+            { 388, 391 }, /* Profile 2. */
+            { 388, 391 }, /* Profile 3. */
+            { 388, 391 }, /* Profile 4. */
+            { 388, 391 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "INT_PRI_3_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 412, 415 }, /* Profile 2. */
-            { 412, 415 }, /* Profile 3. */
-            { 412, 415 }, /* Profile 4. */
-            { 412, 415 }, /* Profile 5. */
+            { 392, 395 }, /* Profile 2. */
+            { 392, 395 }, /* Profile 3. */
+            { 392, 395 }, /* Profile 4. */
+            { 392, 395 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "L2_IIF_10_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 128, 138 }, /* Profile 2. */
+            { 112, 122 }, /* Profile 2. */
             { -1, -1 }, /* Profile 3. */
-            { 128, 138 }, /* Profile 4. */
+            { 112, 122 }, /* Profile 4. */
         },
         .profile_cnt = 5,
     },
     {
         .name = "L2_OIF_10_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
             { -1, -1 }, /* Profile 2. */
-            { 144, 154 }, /* Profile 3. */
+            { 128, 138 }, /* Profile 3. */
             { -1, -1 }, /* Profile 4. */
-            { 144, 154 }, /* Profile 5. */
+            { 128, 138 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "L3_IIF_13_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 176, 189 }, /* Profile 2. */
-            { 176, 189 }, /* Profile 3. */
-            { 176, 189 }, /* Profile 4. */
-            { 176, 189 }, /* Profile 5. */
+            { 160, 173 }, /* Profile 2. */
+            { 160, 173 }, /* Profile 3. */
+            { 160, 173 }, /* Profile 4. */
+            { 160, 173 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "L3_OIF_1_13_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 144, 157 }, /* Profile 2. */
-            { 128, 141 }, /* Profile 3. */
-            { 144, 157 }, /* Profile 4. */
-            { 128, 141 }, /* Profile 5. */
+            { 128, 141 }, /* Profile 2. */
+            { 112, 125 }, /* Profile 3. */
+            { 128, 141 }, /* Profile 4. */
+            { 112, 125 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -618,20 +618,20 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_field_
     },
     {
         .name = "NHOP_INDEX_1_15_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 224, 239 }, /* Profile 2. */
-            { 224, 239 }, /* Profile 3. */
-            { 224, 239 }, /* Profile 4. */
-            { 224, 239 }, /* Profile 5. */
+            { 208, 223 }, /* Profile 2. */
+            { 208, 223 }, /* Profile 3. */
+            { 208, 223 }, /* Profile 4. */
+            { 208, 223 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "PARSER_VHLEN_0_15_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -644,20 +644,20 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_field_
     },
     {
         .name = "PKT_MISC_CTRL_0_3_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 396, 399 }, /* Profile 2. */
-            { 396, 399 }, /* Profile 3. */
-            { 396, 399 }, /* Profile 4. */
-            { 396, 399 }, /* Profile 5. */
+            { 384, 387 }, /* Profile 2. */
+            { 384, 387 }, /* Profile 3. */
+            { 384, 387 }, /* Profile 4. */
+            { 384, 387 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "SVP_15_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SVP_15_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -670,59 +670,59 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_field_
     },
     {
         .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 388, 391 }, /* Profile 2. */
-            { 388, 391 }, /* Profile 3. */
-            { 388, 391 }, /* Profile 4. */
-            { 388, 391 }, /* Profile 5. */
+            { 404, 407 }, /* Profile 2. */
+            { 404, 407 }, /* Profile 3. */
+            { 404, 407 }, /* Profile 4. */
+            { 404, 407 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "SYSTEM_DESTINATION_15_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 288, 303 }, /* Profile 2. */
-            { 288, 303 }, /* Profile 3. */
-            { 288, 303 }, /* Profile 4. */
-            { 288, 303 }, /* Profile 5. */
+            { 272, 287 }, /* Profile 2. */
+            { 272, 287 }, /* Profile 3. */
+            { 272, 287 }, /* Profile 4. */
+            { 272, 287 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "SYSTEM_OPCODE_3_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 408, 411 }, /* Profile 2. */
-            { 408, 411 }, /* Profile 3. */
-            { 408, 411 }, /* Profile 4. */
-            { 408, 411 }, /* Profile 5. */
+            { 376, 379 }, /* Profile 2. */
+            { 376, 379 }, /* Profile 3. */
+            { 376, 379 }, /* Profile 4. */
+            { 376, 379 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "SYSTEM_SOURCE_15_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 272, 287 }, /* Profile 2. */
-            { 272, 287 }, /* Profile 3. */
-            { 272, 287 }, /* Profile 4. */
-            { 272, 287 }, /* Profile 5. */
+            { 256, 271 }, /* Profile 2. */
+            { 256, 271 }, /* Profile 3. */
+            { 256, 271 }, /* Profile 4. */
+            { 256, 271 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "TIMESTAMP_CTRL_3_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -735,44 +735,44 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_field_
     },
     {
         .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 380, 383 }, /* Profile 2. */
-            { 380, 383 }, /* Profile 3. */
-            { 380, 383 }, /* Profile 4. */
-            { 380, 383 }, /* Profile 5. */
+            { 396, 399 }, /* Profile 2. */
+            { 396, 399 }, /* Profile 3. */
+            { 396, 399 }, /* Profile 4. */
+            { 396, 399 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "VFI_15_0",
-        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .fid = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 160, 175 }, /* Profile 2. */
-            { 160, 175 }, /* Profile 3. */
-            { 160, 175 }, /* Profile 4. */
-            { 160, 175 }, /* Profile 5. */
+            { 144, 159 }, /* Profile 2. */
+            { 144, 159 }, /* Profile 3. */
+            { 144, 159 }, /* Profile 4. */
+            { 144, 159 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
-};static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_field_data,
+};static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_data,
 };
 
-static shr_enum_map_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reason_names[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+static shr_enum_map_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reason_names[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_reasons_info_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reasons_info = {
-    .num_reasons = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_COUNT,
-    .reason_names = bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reason_names,
-    .reason_encode = bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reason_encode,
-    .reason_decode = bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reason_decode,
+static bcmpkt_flex_reasons_info_t bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reason_names,
+    .reason_encode = bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reason_decode,
 };
 
 
@@ -915,7 +915,7 @@ static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_arp_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_arp_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_FID_COUNT] = {
     bcmpkt_arp_t_hardware_len_get,
     bcmpkt_arp_t_hardware_type_get,
     bcmpkt_arp_t_operation_get,
@@ -927,7 +927,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_arp_t_fget[BCM56880_A0_HNA_6_
     bcmpkt_arp_t_target_ip_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_arp_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_arp_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_FID_COUNT] = {
     bcmpkt_arp_t_hardware_len_set,
     bcmpkt_arp_t_hardware_type_set,
     bcmpkt_arp_t_operation_set,
@@ -939,13 +939,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_arp_t_fset[BCM56880_A0_HNA_6_
     bcmpkt_arp_t_target_ip_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_arp_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_arp_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_arp_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_arp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_arp_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_arp_t_field_data,
 };
 
 
@@ -1042,7 +1042,7 @@ static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_authen_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_authen_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
     bcmpkt_authen_t_data_get,
     bcmpkt_authen_t_next_header_get,
     bcmpkt_authen_t_payload_len_get,
@@ -1051,7 +1051,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_authen_t_fget[BCM56880_A0_HNA
     bcmpkt_authen_t_spi_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_authen_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_authen_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
     bcmpkt_authen_t_data_set,
     bcmpkt_authen_t_next_header_set,
     bcmpkt_authen_t_payload_len_set,
@@ -1060,13 +1060,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_authen_t_fset[BCM56880_A0_HNA
     bcmpkt_authen_t_spi_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_authen_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_authen_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_authen_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_authen_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_authen_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_AUTHEN_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_authen_t_field_data,
 };
 
 
@@ -1315,7 +1315,7 @@ static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_bfd_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_bfd_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FID_COUNT] = {
     bcmpkt_bfd_t_ap_get,
     bcmpkt_bfd_t_bfd_length_get,
     bcmpkt_bfd_t_cpi_get,
@@ -1334,7 +1334,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_bfd_t_fget[BCM56880_A0_HNA_6_
     bcmpkt_bfd_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_bfd_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_bfd_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FID_COUNT] = {
     bcmpkt_bfd_t_ap_set,
     bcmpkt_bfd_t_bfd_length_set,
     bcmpkt_bfd_t_cpi_set,
@@ -1353,13 +1353,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_bfd_t_fset[BCM56880_A0_HNA_6_
     bcmpkt_bfd_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_bfd_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_bfd_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_bfd_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_bfd_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_bfd_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_BFD_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_bfd_t_field_data,
 };
 
 
@@ -1393,23 +1393,23 @@ static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_cntag_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_cntag_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_FID_COUNT] = {
     bcmpkt_cntag_t_rpid_get,
     bcmpkt_cntag_t_tpid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_cntag_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_cntag_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_FID_COUNT] = {
     bcmpkt_cntag_t_rpid_set,
     bcmpkt_cntag_t_tpid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_cntag_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_cntag_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_cntag_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_cntag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_cntag_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CNTAG_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_cntag_t_field_data,
 };
 
 
@@ -1525,7 +1525,7 @@ static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
     bcmpkt_cpu_composites_0_t_dma_cont0_get,
     bcmpkt_cpu_composites_0_t_dma_cont1_get,
     bcmpkt_cpu_composites_0_t_dma_cont2_get,
@@ -1535,7 +1535,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_fget[BCM56
     bcmpkt_cpu_composites_0_t_dma_cont6_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
     bcmpkt_cpu_composites_0_t_dma_cont0_set,
     bcmpkt_cpu_composites_0_t_dma_cont1_set,
     bcmpkt_cpu_composites_0_t_dma_cont2_set,
@@ -1545,13 +1545,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_fset[BCM56
     bcmpkt_cpu_composites_0_t_dma_cont6_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_field_data,
 };
 
 
@@ -1731,7 +1731,7 @@ static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
     bcmpkt_cpu_composites_1_t_dma_cont10_get,
     bcmpkt_cpu_composites_1_t_dma_cont11_get,
     bcmpkt_cpu_composites_1_t_dma_cont12_get,
@@ -1745,7 +1745,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_fget[BCM56
     bcmpkt_cpu_composites_1_t_dma_cont9_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
     bcmpkt_cpu_composites_1_t_dma_cont10_set,
     bcmpkt_cpu_composites_1_t_dma_cont11_set,
     bcmpkt_cpu_composites_1_t_dma_cont12_set,
@@ -1759,13 +1759,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_fset[BCM56
     bcmpkt_cpu_composites_1_t_dma_cont9_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_field_data,
 };
 
 
@@ -1815,25 +1815,25 @@ static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_dest_option_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_dest_option_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
     bcmpkt_dest_option_t_hdr_ext_len_get,
     bcmpkt_dest_option_t_next_header_get,
     bcmpkt_dest_option_t_option_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_dest_option_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_dest_option_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
     bcmpkt_dest_option_t_hdr_ext_len_set,
     bcmpkt_dest_option_t_next_header_set,
     bcmpkt_dest_option_t_option_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_dest_option_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_dest_option_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_dest_option_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_dest_option_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_dest_option_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_dest_option_t_field_data,
 };
 
 
@@ -1973,7 +1973,7 @@ static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
     bcmpkt_erspan3_fixed_hdr_t_bso_get,
     bcmpkt_erspan3_fixed_hdr_t_cos_get,
     bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
@@ -1985,7 +1985,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_fget[BCM5
     bcmpkt_erspan3_fixed_hdr_t_vlan_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
     bcmpkt_erspan3_fixed_hdr_t_bso_set,
     bcmpkt_erspan3_fixed_hdr_t_cos_set,
     bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
@@ -1997,13 +1997,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_fset[BCM5
     bcmpkt_erspan3_fixed_hdr_t_vlan_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_field_data,
 };
 
 
@@ -2068,27 +2068,27 @@ static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
     bcmpkt_erspan3_subhdr_5_t_platform_id_get,
     bcmpkt_erspan3_subhdr_5_t_port_id_get,
     bcmpkt_erspan3_subhdr_5_t_switch_id_get,
     bcmpkt_erspan3_subhdr_5_t_timestamp_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
     bcmpkt_erspan3_subhdr_5_t_platform_id_set,
     bcmpkt_erspan3_subhdr_5_t_port_id_set,
     bcmpkt_erspan3_subhdr_5_t_switch_id_set,
     bcmpkt_erspan3_subhdr_5_t_timestamp_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_field_data,
 };
 
 
@@ -2169,7 +2169,7 @@ static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_esp_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_esp_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_FID_COUNT] = {
     bcmpkt_esp_t_next_header_get,
     bcmpkt_esp_t_pad_get,
     bcmpkt_esp_t_pad_len_get,
@@ -2177,7 +2177,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_esp_t_fget[BCM56880_A0_HNA_6_
     bcmpkt_esp_t_spi_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_esp_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_esp_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_FID_COUNT] = {
     bcmpkt_esp_t_next_header_set,
     bcmpkt_esp_t_pad_set,
     bcmpkt_esp_t_pad_len_set,
@@ -2185,13 +2185,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_esp_t_fset[BCM56880_A0_HNA_6_
     bcmpkt_esp_t_spi_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_esp_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_esp_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_esp_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_esp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_esp_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ESP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_esp_t_field_data,
 };
 
 
@@ -2226,23 +2226,23 @@ static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_etag_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_etag_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_FID_COUNT] = {
     bcmpkt_etag_t_tag_get,
     bcmpkt_etag_t_tpid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_etag_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_etag_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_FID_COUNT] = {
     bcmpkt_etag_t_tag_set,
     bcmpkt_etag_t_tpid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_etag_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_etag_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_etag_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_etag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_etag_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETAG_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_etag_t_field_data,
 };
 
 
@@ -2261,21 +2261,21 @@ static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ethertype_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ethertype_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
     bcmpkt_ethertype_t_type_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ethertype_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ethertype_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
     bcmpkt_ethertype_t_type_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ethertype_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ethertype_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ethertype_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_ethertype_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ethertype_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_ethertype_t_field_data,
 };
 
 
@@ -2340,27 +2340,27 @@ static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_frag_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_frag_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FID_COUNT] = {
     bcmpkt_frag_t_frag_info_get,
     bcmpkt_frag_t_id_get,
     bcmpkt_frag_t_next_header_get,
     bcmpkt_frag_t_reserved_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_frag_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_frag_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FID_COUNT] = {
     bcmpkt_frag_t_frag_info_set,
     bcmpkt_frag_t_id_set,
     bcmpkt_frag_t_next_header_set,
     bcmpkt_frag_t_reserved_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_frag_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_frag_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_frag_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_frag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_frag_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FRAG_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_frag_t_field_data,
 };
 
 
@@ -2544,52 +2544,52 @@ static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int prof
     return ret;
 }
 
-static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[3], 0, 16);
+    *val = WORD_FIELD_GET(data[2], 16, 16);
 
     return ret;
 }
 
-static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[3], 0, 16, val);
+    WORD_FIELD_SET(data[2], 16, 16, val);
     return ret;
 }
 
-static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[2], 16, 16);
+    *val = WORD_FIELD_GET(data[0], 24, 8);
 
     return ret;
 }
 
-static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[2], 16, 16, val);
+    WORD_FIELD_SET(data[0], 24, 8, val);
     return ret;
 }
 
-static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_generic_loopback_t_svp_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[0], 24, 8);
+    *val = WORD_FIELD_GET(data[3], 0, 16);
 
     return ret;
 }
 
-static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_generic_loopback_t_svp_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[0], 24, 8, val);
+    WORD_FIELD_SET(data[3], 0, 16, val);
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
     bcmpkt_generic_loopback_t_destination_obj_get,
     bcmpkt_generic_loopback_t_destination_type_get,
     bcmpkt_generic_loopback_t_entropy_obj_get,
@@ -2602,12 +2602,12 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_fget[BCM56
     bcmpkt_generic_loopback_t_processing_ctrl_1_get,
     bcmpkt_generic_loopback_t_qos_obj_get,
     bcmpkt_generic_loopback_t_reserved_1_get,
-    bcmpkt_generic_loopback_t_reserved_2_get,
     bcmpkt_generic_loopback_t_source_system_port_get,
     bcmpkt_generic_loopback_t_start_byte_get,
+    bcmpkt_generic_loopback_t_svp_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
     bcmpkt_generic_loopback_t_destination_obj_set,
     bcmpkt_generic_loopback_t_destination_type_set,
     bcmpkt_generic_loopback_t_entropy_obj_set,
@@ -2620,18 +2620,18 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_fset[BCM56
     bcmpkt_generic_loopback_t_processing_ctrl_1_set,
     bcmpkt_generic_loopback_t_qos_obj_set,
     bcmpkt_generic_loopback_t_reserved_1_set,
-    bcmpkt_generic_loopback_t_reserved_2_set,
     bcmpkt_generic_loopback_t_source_system_port_set,
     bcmpkt_generic_loopback_t_start_byte_set,
+    bcmpkt_generic_loopback_t_svp_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_field_data,
 };
 
 
@@ -2710,7 +2710,7 @@ static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_gpe_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_gpe_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FID_COUNT] = {
     bcmpkt_gpe_t_flags_get,
     bcmpkt_gpe_t_next_protocol_get,
     bcmpkt_gpe_t_reserved0_get,
@@ -2718,7 +2718,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_gpe_t_fget[BCM56880_A0_HNA_6_
     bcmpkt_gpe_t_vni_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_gpe_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_gpe_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FID_COUNT] = {
     bcmpkt_gpe_t_flags_set,
     bcmpkt_gpe_t_next_protocol_set,
     bcmpkt_gpe_t_reserved0_set,
@@ -2726,13 +2726,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_gpe_t_fset[BCM56880_A0_HNA_6_
     bcmpkt_gpe_t_vni_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_gpe_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_gpe_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_gpe_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_gpe_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_gpe_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GPE_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_gpe_t_field_data,
 };
 
 
@@ -2766,23 +2766,23 @@ static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint3
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
     bcmpkt_gre_chksum_t_checksum_get,
     bcmpkt_gre_chksum_t_offset_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
     bcmpkt_gre_chksum_t_checksum_set,
     bcmpkt_gre_chksum_t_offset_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_field_data,
 };
 
 
@@ -2802,21 +2802,21 @@ static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_gre_key_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_gre_key_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
     bcmpkt_gre_key_t_key_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_gre_key_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_gre_key_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
     bcmpkt_gre_key_t_key_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_gre_key_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_gre_key_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_gre_key_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_gre_key_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_gre_key_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_KEY_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_gre_key_t_field_data,
 };
 
 
@@ -2836,21 +2836,21 @@ static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
     bcmpkt_gre_rout_t_routing_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
     bcmpkt_gre_rout_t_routing_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_field_data,
 };
 
 
@@ -2870,21 +2870,21 @@ static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
     bcmpkt_gre_seq_t_sequence_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
     bcmpkt_gre_seq_t_sequence_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_field_data,
 };
 
 
@@ -2948,27 +2948,27 @@ static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_gre_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_gre_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_FID_COUNT] = {
     bcmpkt_gre_t_c_r_k_s_get,
     bcmpkt_gre_t_protocol_get,
     bcmpkt_gre_t_reserved_get,
     bcmpkt_gre_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_gre_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_gre_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_FID_COUNT] = {
     bcmpkt_gre_t_c_r_k_s_set,
     bcmpkt_gre_t_protocol_set,
     bcmpkt_gre_t_reserved_set,
     bcmpkt_gre_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_gre_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_gre_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_gre_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_gre_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_gre_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_GRE_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_gre_t_field_data,
 };
 
 
@@ -3018,25 +3018,25 @@ static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint3
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
     bcmpkt_hop_by_hop_t_hdr_ext_len_get,
     bcmpkt_hop_by_hop_t_next_header_get,
     bcmpkt_hop_by_hop_t_option_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
     bcmpkt_hop_by_hop_t_hdr_ext_len_set,
     bcmpkt_hop_by_hop_t_next_header_set,
     bcmpkt_hop_by_hop_t_option_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_field_data,
 };
 
 
@@ -3085,25 +3085,25 @@ static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_icmp_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_icmp_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_FID_COUNT] = {
     bcmpkt_icmp_t_checksum_get,
     bcmpkt_icmp_t_code_get,
     bcmpkt_icmp_t_icmp_type_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_icmp_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_icmp_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_FID_COUNT] = {
     bcmpkt_icmp_t_checksum_set,
     bcmpkt_icmp_t_code_set,
     bcmpkt_icmp_t_icmp_type_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_icmp_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_icmp_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_icmp_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_icmp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_icmp_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_icmp_t_field_data,
 };
 
 
@@ -3137,23 +3137,23 @@ static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int pr
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get,
     bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set,
     bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_field_data,
 };
 
 
@@ -3217,27 +3217,27 @@ static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_0_b_t_cn_get,
     bcmpkt_ifa_flex_md_0_b_t_port_speed_get,
     bcmpkt_ifa_flex_md_0_b_t_queue_id_get,
     bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_0_b_t_cn_set,
     bcmpkt_ifa_flex_md_0_b_t_port_speed_set,
     bcmpkt_ifa_flex_md_0_b_t_queue_id_set,
     bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_field_data,
 };
 
 
@@ -3287,25 +3287,25 @@ static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, i
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_1_t_egress_port_id_get,
     bcmpkt_ifa_flex_md_1_t_ingress_port_id_get,
     bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_1_t_egress_port_id_set,
     bcmpkt_ifa_flex_md_1_t_ingress_port_id_set,
     bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_field_data,
 };
 
 
@@ -3341,23 +3341,23 @@ static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, in
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get,
     bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set,
     bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_field_data,
 };
 
 
@@ -3393,23 +3393,23 @@ static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get,
     bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
     bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set,
     bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_field_data,
 };
 
 
@@ -3488,7 +3488,7 @@ static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
     bcmpkt_ifa_header_t_flags_get,
     bcmpkt_ifa_header_t_gns_get,
     bcmpkt_ifa_header_t_max_length_get,
@@ -3496,7 +3496,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_fget[BCM56880_A0
     bcmpkt_ifa_header_t_ver_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
     bcmpkt_ifa_header_t_flags_set,
     bcmpkt_ifa_header_t_gns_set,
     bcmpkt_ifa_header_t_max_length_set,
@@ -3504,13 +3504,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_fset[BCM56880_A0
     bcmpkt_ifa_header_t_ver_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_HEADER_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_field_data,
 };
 
 
@@ -3559,25 +3559,25 @@ static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
     bcmpkt_ifa_md_base_t_action_vector_get,
     bcmpkt_ifa_md_base_t_hop_limit_current_length_get,
     bcmpkt_ifa_md_base_t_request_vector_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
     bcmpkt_ifa_md_base_t_action_vector_set,
     bcmpkt_ifa_md_base_t_hop_limit_current_length_set,
     bcmpkt_ifa_md_base_t_request_vector_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_field_data,
 };
 
 
@@ -3642,27 +3642,27 @@ static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int prof
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
     bcmpkt_ifa_metadata_t_action_vector_get,
     bcmpkt_ifa_metadata_t_hop_limit_current_length_get,
     bcmpkt_ifa_metadata_t_metadata_get,
     bcmpkt_ifa_metadata_t_request_vector_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
     bcmpkt_ifa_metadata_t_action_vector_set,
     bcmpkt_ifa_metadata_t_hop_limit_current_length_set,
     bcmpkt_ifa_metadata_t_metadata_set,
     bcmpkt_ifa_metadata_t_request_vector_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IFA_METADATA_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_field_data,
 };
 
 
@@ -3727,27 +3727,27 @@ static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_igmp_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_igmp_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_FID_COUNT] = {
     bcmpkt_igmp_t_checksum_get,
     bcmpkt_igmp_t_group_address_get,
     bcmpkt_igmp_t_igmp_type_get,
     bcmpkt_igmp_t_max_resp_time_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_igmp_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_igmp_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_FID_COUNT] = {
     bcmpkt_igmp_t_checksum_set,
     bcmpkt_igmp_t_group_address_set,
     bcmpkt_igmp_t_igmp_type_set,
     bcmpkt_igmp_t_max_resp_time_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_igmp_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_igmp_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_igmp_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_igmp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_igmp_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IGMP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_igmp_t_field_data,
 };
 
 
@@ -3829,7 +3829,7 @@ static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ipfix_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ipfix_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_FID_COUNT] = {
     bcmpkt_ipfix_t_export_time_get,
     bcmpkt_ipfix_t_length_get,
     bcmpkt_ipfix_t_obs_domain_id_get,
@@ -3837,7 +3837,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ipfix_t_fget[BCM56880_A0_HNA_
     bcmpkt_ipfix_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ipfix_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ipfix_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_FID_COUNT] = {
     bcmpkt_ipfix_t_export_time_set,
     bcmpkt_ipfix_t_length_set,
     bcmpkt_ipfix_t_obs_domain_id_set,
@@ -3845,13 +3845,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ipfix_t_fset[BCM56880_A0_HNA_
     bcmpkt_ipfix_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ipfix_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ipfix_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ipfix_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_ipfix_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ipfix_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_ipfix_t_field_data,
 };
 
 
@@ -4023,7 +4023,7 @@ static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, ui
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ipv4_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ipv4_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FID_COUNT] = {
     bcmpkt_ipv4_t_da_get,
     bcmpkt_ipv4_t_flags_frag_offset_get,
     bcmpkt_ipv4_t_hdr_checksum_get,
@@ -4037,7 +4037,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ipv4_t_fget[BCM56880_A0_HNA_6
     bcmpkt_ipv4_t_version_hdr_len_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ipv4_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ipv4_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FID_COUNT] = {
     bcmpkt_ipv4_t_da_set,
     bcmpkt_ipv4_t_flags_frag_offset_set,
     bcmpkt_ipv4_t_hdr_checksum_set,
@@ -4051,13 +4051,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ipv4_t_fset[BCM56880_A0_HNA_6
     bcmpkt_ipv4_t_version_hdr_len_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ipv4_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ipv4_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ipv4_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_ipv4_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ipv4_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_ipv4_t_field_data,
 };
 
 
@@ -4183,7 +4183,7 @@ static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t v
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ipv6_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_ipv6_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FID_COUNT] = {
     bcmpkt_ipv6_t_da_get,
     bcmpkt_ipv6_t_flow_label_get,
     bcmpkt_ipv6_t_hop_limit_get,
@@ -4194,7 +4194,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ipv6_t_fget[BCM56880_A0_HNA_6
     bcmpkt_ipv6_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ipv6_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_ipv6_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FID_COUNT] = {
     bcmpkt_ipv6_t_da_set,
     bcmpkt_ipv6_t_flow_label_set,
     bcmpkt_ipv6_t_hop_limit_set,
@@ -4205,13 +4205,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ipv6_t_fset[BCM56880_A0_HNA_6
     bcmpkt_ipv6_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ipv6_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_ipv6_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ipv6_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_ipv6_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_ipv6_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_ipv6_t_field_data,
 };
 
 
@@ -4247,23 +4247,23 @@ static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_l2_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_l2_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_FID_COUNT] = {
     bcmpkt_l2_t_macda_get,
     bcmpkt_l2_t_macsa_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_l2_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_l2_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_FID_COUNT] = {
     bcmpkt_l2_t_macda_set,
     bcmpkt_l2_t_macsa_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_l2_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_l2_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_l2_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_l2_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_l2_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_l2_t_field_data,
 };
 
 
@@ -4283,21 +4283,21 @@ static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
     bcmpkt_mirror_erspan_sn_t_seq_num_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
     bcmpkt_mirror_erspan_sn_t_seq_num_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_field_data,
 };
 
 
@@ -4317,21 +4317,21 @@ static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, u
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
     bcmpkt_mirror_transport_t_data_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
     bcmpkt_mirror_transport_t_data_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_field_data,
 };
 
 
@@ -4395,27 +4395,27 @@ static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
     bcmpkt_mpls_ach_t_channel_type_get,
     bcmpkt_mpls_ach_t_cw_type_get,
     bcmpkt_mpls_ach_t_reserved_get,
     bcmpkt_mpls_ach_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
     bcmpkt_mpls_ach_t_channel_type_set,
     bcmpkt_mpls_ach_t_cw_type_set,
     bcmpkt_mpls_ach_t_reserved_set,
     bcmpkt_mpls_ach_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_field_data,
 };
 
 
@@ -4435,21 +4435,21 @@ static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
     bcmpkt_mpls_bv_t_value_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
     bcmpkt_mpls_bv_t_value_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_BV_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_field_data,
 };
 
 
@@ -4498,25 +4498,25 @@ static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
     bcmpkt_mpls_cw_t_cw_type_get,
     bcmpkt_mpls_cw_t_reserved_get,
     bcmpkt_mpls_cw_t_seq_number_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
     bcmpkt_mpls_cw_t_cw_type_set,
     bcmpkt_mpls_cw_t_reserved_set,
     bcmpkt_mpls_cw_t_seq_number_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_CW_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_field_data,
 };
 
 
@@ -4580,27 +4580,27 @@ static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_mpls_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_mpls_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_FID_COUNT] = {
     bcmpkt_mpls_t_bos_get,
     bcmpkt_mpls_t_exp_get,
     bcmpkt_mpls_t_label_get,
     bcmpkt_mpls_t_ttl_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_mpls_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_mpls_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_FID_COUNT] = {
     bcmpkt_mpls_t_bos_set,
     bcmpkt_mpls_t_exp_set,
     bcmpkt_mpls_t_label_set,
     bcmpkt_mpls_t_ttl_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_mpls_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_mpls_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_mpls_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_mpls_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_mpls_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_MPLS_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_mpls_t_field_data,
 };
 
 
@@ -4817,7 +4817,7 @@ static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_p_1588_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_p_1588_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FID_COUNT] = {
     bcmpkt_p_1588_t_cntrl_get,
     bcmpkt_p_1588_t_correction_get,
     bcmpkt_p_1588_t_domain_nb_get,
@@ -4834,7 +4834,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_p_1588_t_fget[BCM56880_A0_HNA
     bcmpkt_p_1588_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_p_1588_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_p_1588_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FID_COUNT] = {
     bcmpkt_p_1588_t_cntrl_set,
     bcmpkt_p_1588_t_correction_set,
     bcmpkt_p_1588_t_domain_nb_set,
@@ -4851,13 +4851,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_p_1588_t_fset[BCM56880_A0_HNA
     bcmpkt_p_1588_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_p_1588_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_p_1588_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_p_1588_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_p_1588_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_p_1588_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_P_1588_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_p_1588_t_field_data,
 };
 
 
@@ -4907,25 +4907,25 @@ static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uin
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
     bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
     bcmpkt_prog_ext_hdr_t_next_header_get,
     bcmpkt_prog_ext_hdr_t_option_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
     bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
     bcmpkt_prog_ext_hdr_t_next_header_set,
     bcmpkt_prog_ext_hdr_t_option_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_field_data,
 };
 
 
@@ -5021,7 +5021,7 @@ static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uin
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
     bcmpkt_psamp_0_t_flowset_get,
     bcmpkt_psamp_0_t_length_get,
     bcmpkt_psamp_0_t_next_hop_index_get,
@@ -5030,7 +5030,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_fget[BCM56880_A0_HN
     bcmpkt_psamp_0_t_template_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
     bcmpkt_psamp_0_t_flowset_set,
     bcmpkt_psamp_0_t_length_set,
     bcmpkt_psamp_0_t_next_hop_index_set,
@@ -5039,13 +5039,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_fset[BCM56880_A0_HN
     bcmpkt_psamp_0_t_template_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_0_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_field_data,
 };
 
 
@@ -5154,7 +5154,7 @@ static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, u
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
     bcmpkt_psamp_1_t_dlb_id_get,
     bcmpkt_psamp_1_t_egress_port_get,
     bcmpkt_psamp_1_t_epoch_get,
@@ -5164,7 +5164,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_fget[BCM56880_A0_HN
     bcmpkt_psamp_1_t_variable_flag_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
     bcmpkt_psamp_1_t_dlb_id_set,
     bcmpkt_psamp_1_t_egress_port_set,
     bcmpkt_psamp_1_t_epoch_set,
@@ -5174,13 +5174,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_fset[BCM56880_A0_HN
     bcmpkt_psamp_1_t_variable_flag_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_1_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_field_data,
 };
 
 
@@ -5292,7 +5292,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, i
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
     bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
     bcmpkt_psamp_mirror_on_drop_0_t_length_get,
@@ -5302,7 +5302,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_fget
     bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
     bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
     bcmpkt_psamp_mirror_on_drop_0_t_length_set,
@@ -5312,13 +5312,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_fset
     bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_field_data,
 };
 
 
@@ -5427,7 +5427,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *d
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
     bcmpkt_psamp_mirror_on_drop_3_t_mod_state_get,
     bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
@@ -5437,7 +5437,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_fget
     bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
     bcmpkt_psamp_mirror_on_drop_3_t_mod_state_set,
     bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
@@ -5447,13 +5447,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_fset
     bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_field_data,
 };
 
 
@@ -5596,7 +5596,7 @@ static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_rarp_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_rarp_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_FID_COUNT] = {
     bcmpkt_rarp_t_hardware_len_get,
     bcmpkt_rarp_t_hardware_type_get,
     bcmpkt_rarp_t_operation_get,
@@ -5608,7 +5608,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_rarp_t_fget[BCM56880_A0_HNA_6
     bcmpkt_rarp_t_target_ip_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_rarp_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_rarp_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_FID_COUNT] = {
     bcmpkt_rarp_t_hardware_len_set,
     bcmpkt_rarp_t_hardware_type_set,
     bcmpkt_rarp_t_operation_set,
@@ -5620,13 +5620,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_rarp_t_fset[BCM56880_A0_HNA_6
     bcmpkt_rarp_t_target_ip_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_rarp_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rarp_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_rarp_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_rarp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_rarp_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_rarp_t_field_data,
 };
 
 
@@ -5706,7 +5706,7 @@ static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, u
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_routing_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_routing_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_FID_COUNT] = {
     bcmpkt_routing_t_data_get,
     bcmpkt_routing_t_hdr_ext_len_get,
     bcmpkt_routing_t_next_header_get,
@@ -5714,7 +5714,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_routing_t_fget[BCM56880_A0_HN
     bcmpkt_routing_t_segments_left_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_routing_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_routing_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_FID_COUNT] = {
     bcmpkt_routing_t_data_set,
     bcmpkt_routing_t_hdr_ext_len_set,
     bcmpkt_routing_t_next_header_set,
@@ -5722,13 +5722,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_routing_t_fset[BCM56880_A0_HN
     bcmpkt_routing_t_segments_left_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_routing_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_routing_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_routing_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_routing_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_routing_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_ROUTING_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_routing_t_field_data,
 };
 
 
@@ -5762,23 +5762,23 @@ static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_rspan_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_rspan_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_FID_COUNT] = {
     bcmpkt_rspan_t_tag_get,
     bcmpkt_rspan_t_tpid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_rspan_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_rspan_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_FID_COUNT] = {
     bcmpkt_rspan_t_tag_set,
     bcmpkt_rspan_t_tpid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_rspan_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_rspan_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_rspan_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_rspan_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_rspan_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_RSPAN_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_rspan_t_field_data,
 };
 
 
@@ -5828,25 +5828,25 @@ static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, ui
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
     bcmpkt_sflow_shim_0_t_sys_destination_get,
     bcmpkt_sflow_shim_0_t_sys_source_get,
     bcmpkt_sflow_shim_0_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
     bcmpkt_sflow_shim_0_t_sys_destination_set,
     bcmpkt_sflow_shim_0_t_sys_source_set,
     bcmpkt_sflow_shim_0_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_field_data,
 };
 
 
@@ -5970,7 +5970,7 @@ static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
     bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
     bcmpkt_sflow_shim_1_t_flag_discarded_get,
     bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
@@ -5981,7 +5981,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_fget[BCM56880_
     bcmpkt_sflow_shim_1_t_sys_opcode_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
     bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
     bcmpkt_sflow_shim_1_t_flag_discarded_set,
     bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
@@ -5992,13 +5992,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_fset[BCM56880_
     bcmpkt_sflow_shim_1_t_sys_opcode_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_field_data,
 };
 
 
@@ -6033,23 +6033,23 @@ static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int prof
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
     bcmpkt_sflow_shim_2_t_sequence_num_get,
     bcmpkt_sflow_shim_2_t_user_meta_data_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
     bcmpkt_sflow_shim_2_t_sequence_num_set,
     bcmpkt_sflow_shim_2_t_user_meta_data_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_field_data,
 };
 
 
@@ -6084,23 +6084,23 @@ static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint3
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
     bcmpkt_snap_llc_t_length_get,
     bcmpkt_snap_llc_t_snap_llc_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
     bcmpkt_snap_llc_t_length_set,
     bcmpkt_snap_llc_t_snap_llc_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_field_data,
 };
 
 
@@ -6134,23 +6134,23 @@ static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profil
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_first_4bytes_t_dst_port_get,
     bcmpkt_tcp_first_4bytes_t_src_port_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_first_4bytes_t_dst_port_set,
     bcmpkt_tcp_first_4bytes_t_src_port_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_field_data,
 };
 
 
@@ -6246,7 +6246,7 @@ static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profil
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_last_16bytes_t_ack_num_get,
     bcmpkt_tcp_last_16bytes_t_checksum_get,
     bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
@@ -6255,7 +6255,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_fget[BCM56
     bcmpkt_tcp_last_16bytes_t_win_size_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_last_16bytes_t_ack_num_set,
     bcmpkt_tcp_last_16bytes_t_checksum_set,
     bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
@@ -6264,13 +6264,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_fset[BCM56
     bcmpkt_tcp_last_16bytes_t_win_size_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_field_data,
 };
 
 
@@ -6334,27 +6334,27 @@ static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_udp_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_udp_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_FID_COUNT] = {
     bcmpkt_udp_t_checksum_get,
     bcmpkt_udp_t_dst_port_get,
     bcmpkt_udp_t_src_port_get,
     bcmpkt_udp_t_udp_length_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_udp_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_udp_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_FID_COUNT] = {
     bcmpkt_udp_t_checksum_set,
     bcmpkt_udp_t_dst_port_set,
     bcmpkt_udp_t_src_port_set,
     bcmpkt_udp_t_udp_length_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_udp_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_udp_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_udp_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_udp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_udp_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_udp_t_field_data,
 };
 
 
@@ -6390,23 +6390,23 @@ static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
     bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
     bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
     bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
     bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_field_data,
 };
 
 
@@ -6426,21 +6426,21 @@ static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
     bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
     bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_field_data,
 };
 
 
@@ -6490,25 +6490,25 @@ static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
     bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
     bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
     bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
     bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
     bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
     bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_field_data,
 };
 
 
@@ -6572,27 +6572,27 @@ static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_vlan_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_vlan_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_FID_COUNT] = {
     bcmpkt_vlan_t_cfi_get,
     bcmpkt_vlan_t_pcp_get,
     bcmpkt_vlan_t_tpid_get,
     bcmpkt_vlan_t_vid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_vlan_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_vlan_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_FID_COUNT] = {
     bcmpkt_vlan_t_cfi_set,
     bcmpkt_vlan_t_pcp_set,
     bcmpkt_vlan_t_tpid_set,
     bcmpkt_vlan_t_vid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_vlan_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_vlan_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_vlan_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_vlan_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_vlan_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_vlan_t_field_data,
 };
 
 
@@ -6627,23 +6627,23 @@ static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_vntag_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_vntag_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_FID_COUNT] = {
     bcmpkt_vntag_t_tag_get,
     bcmpkt_vntag_t_tpid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_vntag_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_vntag_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_FID_COUNT] = {
     bcmpkt_vntag_t_tag_set,
     bcmpkt_vntag_t_tpid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_vntag_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_vntag_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_vntag_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_vntag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_vntag_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VNTAG_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_vntag_t_field_data,
 };
 
 
@@ -6693,25 +6693,25 @@ static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_vxlan_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_vxlan_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FID_COUNT] = {
     bcmpkt_vxlan_t_flags_reserved_1_get,
     bcmpkt_vxlan_t_reserved2_get,
     bcmpkt_vxlan_t_vn_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_vxlan_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_vxlan_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FID_COUNT] = {
     bcmpkt_vxlan_t_flags_reserved_1_set,
     bcmpkt_vxlan_t_reserved2_set,
     bcmpkt_vxlan_t_vn_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_vxlan_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_vxlan_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_vxlan_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_vxlan_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_vxlan_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_vxlan_t_field_data,
 };
 
 
@@ -6823,7 +6823,7 @@ static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t v
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_wesp_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_30_3_0_wesp_t_fget[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FID_COUNT] = {
     bcmpkt_wesp_t_flags_get,
     bcmpkt_wesp_t_header_len_get,
     bcmpkt_wesp_t_next_header_get,
@@ -6833,7 +6833,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_wesp_t_fget[BCM56880_A0_HNA_6
     bcmpkt_wesp_t_wesp_iv_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_wesp_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_30_3_0_wesp_t_fset[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FID_COUNT] = {
     bcmpkt_wesp_t_flags_set,
     bcmpkt_wesp_t_header_len_set,
     bcmpkt_wesp_t_next_header_set,
@@ -6843,494 +6843,494 @@ bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_wesp_t_fset[BCM56880_A0_HNA_6
     bcmpkt_wesp_t_wesp_iv_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_wesp_t_field_data[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_30_3_0_wesp_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_wesp_t_field_info = {
-    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FID_COUNT,
-    .info = bcm56880_a0_hna_6_5_29_2_2_wesp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_30_3_0_wesp_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_WESP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_30_3_0_wesp_t_field_data,
 };
 
-static bcmpkt_flex_pmd_info_t bcm56880_a0_hna_6_5_29_2_2_flexhdr_info_list[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_COUNT] = {
+static bcmpkt_flex_pmd_info_t bcm56880_a0_hna_6_5_30_3_0_flexhdr_info_list[BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_COUNT] = {
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_arp_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_arp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_arp_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_arp_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_arp_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_arp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_authen_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_authen_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_authen_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_authen_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_authen_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_authen_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_bfd_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_bfd_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_bfd_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_bfd_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_bfd_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_bfd_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_cntag_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_cntag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_cntag_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_cntag_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_cntag_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_cntag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_cpu_composites_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_cpu_composites_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_dest_option_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_dest_option_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_dest_option_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_dest_option_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_dest_option_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_dest_option_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_erspan3_fixed_hdr_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_erspan3_subhdr_5_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_esp_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_esp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_esp_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_esp_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_esp_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_esp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_etag_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_etag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_etag_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_etag_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_etag_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_etag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ethertype_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_ethertype_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ethertype_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ethertype_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ethertype_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ethertype_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_frag_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_frag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_frag_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_frag_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_frag_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_frag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_generic_loopback_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_gpe_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_gpe_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_gpe_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_gpe_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_gpe_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_gpe_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_gre_chksum_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_gre_key_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_gre_key_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_gre_key_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_gre_key_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_gre_key_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_gre_key_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_gre_rout_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_gre_seq_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_gre_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_gre_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_gre_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_gre_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_gre_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_gre_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_hop_by_hop_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_icmp_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_icmp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_icmp_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_icmp_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_icmp_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_icmp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_a_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_0_b_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_2_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_flex_md_3_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_header_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_md_base_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ifa_metadata_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_igmp_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_igmp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_igmp_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_igmp_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_igmp_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_igmp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ipfix_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_ipfix_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ipfix_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ipfix_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ipfix_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ipfix_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ipv4_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_ipv4_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ipv4_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ipv4_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ipv4_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ipv4_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ipv6_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_ipv6_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ipv6_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ipv6_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_ipv6_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_ipv6_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_l2_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_l2_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_l2_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_l2_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_l2_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_l2_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_mirror_erspan_sn_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_mirror_transport_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_mpls_ach_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_mpls_bv_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_mpls_cw_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_mpls_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_mpls_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_mpls_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_mpls_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_mpls_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_mpls_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_p_1588_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_p_1588_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_p_1588_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_p_1588_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_p_1588_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_p_1588_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_prog_ext_hdr_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_psamp_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_psamp_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_psamp_mirror_on_drop_3_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_rarp_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_rarp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_rarp_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_rarp_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_rarp_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_rarp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_routing_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_routing_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_routing_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_routing_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_routing_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_routing_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_rspan_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_rspan_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_rspan_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_rspan_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_rspan_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_rspan_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_sflow_shim_2_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_snap_llc_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_tcp_first_4bytes_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_tcp_last_16bytes_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_udp_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_udp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_udp_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_udp_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_udp_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_udp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_unknown_l3_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_unknown_l4_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_unknown_l5_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_vlan_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_vlan_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_vlan_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_vlan_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_vlan_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_vlan_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_vntag_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_vntag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_vntag_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_vntag_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_vntag_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_vntag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_vxlan_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_vxlan_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_vxlan_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_vxlan_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_vxlan_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_vxlan_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_wesp_t_field_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_wesp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_wesp_t_fget,
-        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_wesp_t_fset,
+        .flex_fget = bcm56880_a0_hna_6_5_30_3_0_wesp_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_30_3_0_wesp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_field_info,
-        .reasons_info = &bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reasons_info,
+        .field_info = &bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_field_info,
+        .reasons_info = &bcm56880_a0_hna_6_5_30_3_0_rxpmd_flex_reasons_info,
         .flex_common_fget = bcm56880_a0_rxpmd_flex_fget,
         .flex_common_fset = bcm56880_a0_rxpmd_flex_fset,
     },
 };
 
-static shr_enum_map_t bcm56880_a0_hna_6_5_29_2_2_flexhdr_id_map[] = {
-    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_NAME_MAP_INIT
+static shr_enum_map_t bcm56880_a0_hna_6_5_30_3_0_flexhdr_id_map[] = {
+    BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
 };
 
-shr_enum_map_t * bcm56880_a0_hna_6_5_29_2_2_flexhdr_map_get(void)
+shr_enum_map_t * bcm56880_a0_hna_6_5_30_3_0_flexhdr_map_get(void)
 {
-    return bcm56880_a0_hna_6_5_29_2_2_flexhdr_id_map;
+    return bcm56880_a0_hna_6_5_30_3_0_flexhdr_id_map;
 }
 
-bcmpkt_flex_pmd_info_t * bcm56880_a0_hna_6_5_29_2_2_flex_pmd_info_get(uint32_t hid)
+bcmpkt_flex_pmd_info_t * bcm56880_a0_hna_6_5_30_3_0_flex_pmd_info_get(uint32_t hid)
 {
-    if (hid >= BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_COUNT) {
+    if (hid >= BCM56880_A0_HNA_6_5_30_3_0_BCMPKT_FLEXHDR_COUNT) {
         return NULL;
     }
 
-    return &bcm56880_a0_hna_6_5_29_2_2_flexhdr_info_list[hid];
+    return &bcm56880_a0_hna_6_5_30_3_0_flexhdr_info_list[hid];
 }
 
-int bcm56880_a0_hna_6_5_29_2_2_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+int bcm56880_a0_hna_6_5_30_3_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
     13,
     -1,
     -1,
     64,
-};
\ No newline at end of file
+};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_match_id.c
similarity index 70%
rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id.c
rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_match_id.c
index b09767c287bd..204bc407c6fa 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_match_id.c
@@ -2,12 +2,12 @@
  *
  * DO NOT EDIT THIS FILE!
  * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56880_a0_nfa_2_1_7_0_sf_match_id_info.yml
- * for device bcm56880_a0 and variant nfa_2_1_7_0.
+ * from the NPL output file(s) bcm56880_a0_nfa_6_5_30_1_1_sf_match_id_info.yml
+ * for device bcm56880_a0 and variant nfa_6_5_30_1_1.
  * Edits to this file will be lost when it is regenerated.
  *
  * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  * All Rights Reserved.$
  *
  * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
@@ -29,13 +29,13 @@
 
 
 #include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-#include <bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id_defs.h>
+#include <bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_match_id_defs.h>
 
 
 static bcmpkt_rxpmd_match_id_db_t
-bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_COUNT] = {
+bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_COUNT] = {
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_ETAG",
         .match        = 0x80,
         .match_mask   = 0xc0,
@@ -49,7 +49,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
         .match        = 0x10,
         .match_mask   = 0x10,
@@ -63,7 +63,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
         .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -77,7 +77,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
         .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0xff,
@@ -91,7 +91,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_OPAQUETAG",
         .match        = 0x20,
         .match_mask   = 0x20,
@@ -105,7 +105,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
         .match        = 0x8,
         .match_mask   = 0x8,
@@ -119,7 +119,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN */
         .name         = "EGRESS_PKT_FWD_L2_HDR_RSPAN",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -133,7 +133,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
         .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -147,7 +147,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_VNTAG",
         .match        = 0x40,
         .match_mask   = 0xc0,
@@ -161,21 +161,21 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
-        .match        = 0x2,
-        .match_mask   = 0x4e,
+        .match        = 0x8,
+        .match_mask   = 0x58,
         .match_maxbit = 44,
         .match_minbit = 31,
-        .maxbit       = 2,
-        .minbit       = 1,
+        .maxbit       = 4,
+        .minbit       = 3,
         .value        = 0x1,
         .pmaxbit      = 62,
         .pminbit      = 49,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x180,
         .match_mask   = 0x1c0,
@@ -189,10 +189,10 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x430,
-        .match_mask   = 0x670,
+        .match        = 0x418,
+        .match_mask   = 0x658,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 10,
@@ -203,24 +203,24 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
-        .match        = 0x1800,
+        .match        = 0x3800,
         .match_mask   = 0x3800,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x3,
+        .value        = 0x7,
         .pmaxbit      = 62,
         .pminbit      = 49,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
         .match        = 0x200,
-        .match_mask   = 0x648,
+        .match_mask   = 0x646,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 10,
@@ -231,7 +231,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -245,10 +245,10 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0xb0,
-        .match_mask   = 0x1f0,
+        .match        = 0x98,
+        .match_mask   = 0x1d8,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 8,
@@ -259,7 +259,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x600,
         .match_mask   = 0x640,
@@ -273,7 +273,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
         .match        = 0x1006,
         .match_mask   = 0x3846,
@@ -287,24 +287,24 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
-        .match        = 0x8,
-        .match_mask   = 0x48,
+        .match        = 0x4,
+        .match_mask   = 0x46,
         .match_maxbit = 44,
         .match_minbit = 31,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
         .pmaxbit      = 62,
         .pminbit      = 49,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x208,
-        .match_mask   = 0x648,
+        .match        = 0x204,
+        .match_mask   = 0x646,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 10,
@@ -315,10 +315,10 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
-        .match        = 0x808,
-        .match_mask   = 0x3848,
+        .match        = 0x804,
+        .match_mask   = 0x3846,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 13,
@@ -329,7 +329,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
         .match        = 0x100,
         .match_mask   = 0x1c0,
@@ -343,52 +343,80 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
-        .match        = 0xa,
-        .match_mask   = 0x4e,
+        .match        = 0x24,
+        .match_mask   = 0x66,
         .match_maxbit = 44,
         .match_minbit = 31,
-        .maxbit       = 2,
-        .minbit       = 1,
+        .maxbit       = 5,
+        .minbit       = 5,
         .value        = 0x1,
         .pmaxbit      = 62,
         .pminbit      = 49,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE",
-        .match        = 0x3000,
+        .match        = 0x2800,
         .match_mask   = 0x3800,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x6,
+        .value        = 0x5,
         .pmaxbit      = 62,
         .pminbit      = 49,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE",
-        .match        = 0x2800,
+        .match        = 0x2000,
         .match_mask   = 0x3800,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x5,
+        .value        = 0x4,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE",
+        .match        = 0x826,
+        .match_mask   = 0x3866,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
         .pmaxbit      = 62,
         .pminbit      = 49,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
         .match        = 0x800,
-        .match_mask   = 0x380e,
+        .match_mask   = 0x3826,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 13,
@@ -399,10 +427,10 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
-        .match        = 0x420,
-        .match_mask   = 0x670,
+        .match        = 0x410,
+        .match_mask   = 0x658,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 10,
@@ -413,35 +441,35 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
-        .match        = 0x20,
-        .match_mask   = 0x70,
+        .match        = 0x10,
+        .match_mask   = 0x58,
         .match_maxbit = 44,
         .match_minbit = 31,
-        .maxbit       = 5,
-        .minbit       = 4,
+        .maxbit       = 4,
+        .minbit       = 3,
         .value        = 0x2,
         .pmaxbit      = 62,
         .pminbit      = 49,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
-        .match        = 0x30,
-        .match_mask   = 0x70,
+        .match        = 0x18,
+        .match_mask   = 0x58,
         .match_maxbit = 44,
         .match_minbit = 31,
-        .maxbit       = 5,
-        .minbit       = 4,
+        .maxbit       = 4,
+        .minbit       = 3,
         .value        = 0x3,
         .pmaxbit      = 62,
         .pminbit      = 49,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
         .match        = 0x40,
         .match_mask   = 0x40,
@@ -455,7 +483,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
         .match        = 0x42,
         .match_mask   = 0x42,
@@ -469,7 +497,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
         .match        = 0x44,
         .match_mask   = 0x44,
@@ -483,7 +511,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
         .match        = 0x48,
         .match_mask   = 0x48,
@@ -497,7 +525,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
         .match        = 0x50,
         .match_mask   = 0x50,
@@ -511,7 +539,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -525,7 +553,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
         .match        = 0xc0,
         .match_mask   = 0xc0,
@@ -539,7 +567,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
         .match        = 0x140,
         .match_mask   = 0x140,
@@ -553,7 +581,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
         .match        = 0x240,
         .match_mask   = 0x240,
@@ -567,7 +595,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3fff,
@@ -581,52 +609,52 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
-        .match        = 0x2000,
+        .match        = 0x1800,
         .match_mask   = 0x3800,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x4,
+        .value        = 0x3,
         .pmaxbit      = 62,
         .pminbit      = 49,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
-        .match        = 0x10,
-        .match_mask   = 0x70,
+        .match        = 0x2,
+        .match_mask   = 0x46,
         .match_maxbit = 44,
         .match_minbit = 31,
-        .maxbit       = 5,
-        .minbit       = 4,
+        .maxbit       = 2,
+        .minbit       = 1,
         .value        = 0x1,
         .pmaxbit      = 62,
         .pminbit      = 49,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x4,
-        .match_mask   = 0x46,
+        .match        = 0x20,
+        .match_mask   = 0x66,
         .match_maxbit = 44,
         .match_minbit = 31,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
         .pmaxbit      = 62,
         .pminbit      = 49,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x804,
-        .match_mask   = 0x3846,
+        .match        = 0x820,
+        .match_mask   = 0x3866,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 13,
@@ -637,7 +665,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
         .match        = 0x6,
         .match_mask   = 0x46,
@@ -651,10 +679,10 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x80,
-        .match_mask   = 0x1f0,
+        .match_mask   = 0x1d8,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 8,
@@ -665,7 +693,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x1000,
         .match_mask   = 0x3806,
@@ -679,24 +707,24 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x3800,
+        .match        = 0x3000,
         .match_mask   = 0x3800,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x7,
+        .value        = 0x6,
         .pmaxbit      = 62,
         .pminbit      = 49,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
         .match        = 0x806,
-        .match_mask   = 0x3846,
+        .match_mask   = 0x3866,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 13,
@@ -707,7 +735,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
         .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -721,7 +749,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
         .name         = "EGRESS_PKT_SYS_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x1,
@@ -735,7 +763,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG",
         .match        = 0x80,
         .match_mask   = 0xc0,
@@ -749,7 +777,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
         .match        = 0x10,
         .match_mask   = 0x10,
@@ -763,7 +791,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -777,7 +805,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0xff,
@@ -791,7 +819,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG",
         .match        = 0x20,
         .match_mask   = 0x20,
@@ -805,7 +833,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
         .match        = 0x8,
         .match_mask   = 0x8,
@@ -819,7 +847,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_RSPAN",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -833,7 +861,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -847,7 +875,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG",
         .match        = 0x40,
         .match_mask   = 0xc0,
@@ -861,21 +889,21 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
-        .match        = 0x2,
-        .match_mask   = 0x4e,
+        .match        = 0x8,
+        .match_mask   = 0x58,
         .match_maxbit = 22,
         .match_minbit = 9,
-        .maxbit       = 2,
-        .minbit       = 1,
+        .maxbit       = 4,
+        .minbit       = 3,
         .value        = 0x1,
         .pmaxbit      = 34,
         .pminbit      = 21,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x180,
         .match_mask   = 0x1c0,
@@ -889,10 +917,10 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x430,
-        .match_mask   = 0x670,
+        .match        = 0x418,
+        .match_mask   = 0x658,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 10,
@@ -903,24 +931,24 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
-        .match        = 0x1800,
+        .match        = 0x3800,
         .match_mask   = 0x3800,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x3,
+        .value        = 0x7,
         .pmaxbit      = 34,
         .pminbit      = 21,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
         .match        = 0x200,
-        .match_mask   = 0x648,
+        .match_mask   = 0x646,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 10,
@@ -931,7 +959,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -945,10 +973,10 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0xb0,
-        .match_mask   = 0x1f0,
+        .match        = 0x98,
+        .match_mask   = 0x1d8,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 8,
@@ -959,7 +987,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x600,
         .match_mask   = 0x640,
@@ -973,7 +1001,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
         .match        = 0x1006,
         .match_mask   = 0x3846,
@@ -987,24 +1015,24 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
-        .match        = 0x8,
-        .match_mask   = 0x48,
+        .match        = 0x4,
+        .match_mask   = 0x46,
         .match_maxbit = 22,
         .match_minbit = 9,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
         .pmaxbit      = 34,
         .pminbit      = 21,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x208,
-        .match_mask   = 0x648,
+        .match        = 0x204,
+        .match_mask   = 0x646,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 10,
@@ -1015,10 +1043,10 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
-        .match        = 0x808,
-        .match_mask   = 0x3848,
+        .match        = 0x804,
+        .match_mask   = 0x3846,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 13,
@@ -1029,7 +1057,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
         .match        = 0x100,
         .match_mask   = 0x1c0,
@@ -1043,52 +1071,80 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
-        .match        = 0xa,
-        .match_mask   = 0x4e,
+        .match        = 0x24,
+        .match_mask   = 0x66,
         .match_maxbit = 22,
         .match_minbit = 9,
-        .maxbit       = 2,
-        .minbit       = 1,
+        .maxbit       = 5,
+        .minbit       = 5,
         .value        = 0x1,
         .pmaxbit      = 34,
         .pminbit      = 21,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE",
-        .match        = 0x3000,
+        .match        = 0x2800,
         .match_mask   = 0x3800,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x6,
+        .value        = 0x5,
         .pmaxbit      = 34,
         .pminbit      = 21,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE",
-        .match        = 0x2800,
+        .match        = 0x2000,
         .match_mask   = 0x3800,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x5,
+        .value        = 0x4,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE",
+        .match        = 0x826,
+        .match_mask   = 0x3866,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
         .pmaxbit      = 34,
         .pminbit      = 21,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
         .match        = 0x800,
-        .match_mask   = 0x380e,
+        .match_mask   = 0x3826,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 13,
@@ -1099,10 +1155,10 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
-        .match        = 0x420,
-        .match_mask   = 0x670,
+        .match        = 0x410,
+        .match_mask   = 0x658,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 10,
@@ -1113,35 +1169,35 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
-        .match        = 0x20,
-        .match_mask   = 0x70,
+        .match        = 0x10,
+        .match_mask   = 0x58,
         .match_maxbit = 22,
         .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 4,
+        .maxbit       = 4,
+        .minbit       = 3,
         .value        = 0x2,
         .pmaxbit      = 34,
         .pminbit      = 21,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
-        .match        = 0x30,
-        .match_mask   = 0x70,
+        .match        = 0x18,
+        .match_mask   = 0x58,
         .match_maxbit = 22,
         .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 4,
+        .maxbit       = 4,
+        .minbit       = 3,
         .value        = 0x3,
         .pmaxbit      = 34,
         .pminbit      = 21,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
         .match        = 0x40,
         .match_mask   = 0x40,
@@ -1155,7 +1211,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
         .match        = 0x42,
         .match_mask   = 0x42,
@@ -1169,7 +1225,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
         .match        = 0x44,
         .match_mask   = 0x44,
@@ -1183,7 +1239,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
         .match        = 0x48,
         .match_mask   = 0x48,
@@ -1197,7 +1253,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
         .match        = 0x50,
         .match_mask   = 0x50,
@@ -1211,7 +1267,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -1225,7 +1281,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
         .match        = 0xc0,
         .match_mask   = 0xc0,
@@ -1239,7 +1295,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
         .match        = 0x140,
         .match_mask   = 0x140,
@@ -1253,7 +1309,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
         .match        = 0x240,
         .match_mask   = 0x240,
@@ -1267,7 +1323,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3fff,
@@ -1281,52 +1337,52 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
-        .match        = 0x2000,
+        .match        = 0x1800,
         .match_mask   = 0x3800,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x4,
+        .value        = 0x3,
         .pmaxbit      = 34,
         .pminbit      = 21,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
-        .match        = 0x10,
-        .match_mask   = 0x70,
+        .match        = 0x2,
+        .match_mask   = 0x46,
         .match_maxbit = 22,
         .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 4,
+        .maxbit       = 2,
+        .minbit       = 1,
         .value        = 0x1,
         .pmaxbit      = 34,
         .pminbit      = 21,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x4,
-        .match_mask   = 0x46,
+        .match        = 0x20,
+        .match_mask   = 0x66,
         .match_maxbit = 22,
         .match_minbit = 9,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
         .pmaxbit      = 34,
         .pminbit      = 21,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x804,
-        .match_mask   = 0x3846,
+        .match        = 0x820,
+        .match_mask   = 0x3866,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 13,
@@ -1337,7 +1393,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
         .match        = 0x6,
         .match_mask   = 0x46,
@@ -1351,10 +1407,10 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x80,
-        .match_mask   = 0x1f0,
+        .match_mask   = 0x1d8,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 8,
@@ -1365,7 +1421,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x1000,
         .match_mask   = 0x3806,
@@ -1379,24 +1435,24 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x3800,
+        .match        = 0x3000,
         .match_mask   = 0x3800,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x7,
+        .value        = 0x6,
         .pmaxbit      = 34,
         .pminbit      = 21,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
         .match        = 0x806,
-        .match_mask   = 0x3846,
+        .match_mask   = 0x3866,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 13,
@@ -1407,7 +1463,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_ETAG",
         .match        = 0x80,
         .match_mask   = 0xc0,
@@ -1421,7 +1477,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
         .match        = 0x10,
         .match_mask   = 0x10,
@@ -1435,7 +1491,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
         .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -1449,7 +1505,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
         .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0xff,
@@ -1463,7 +1519,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_OPAQUETAG",
         .match        = 0x20,
         .match_mask   = 0x20,
@@ -1477,7 +1533,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
         .match        = 0x8,
         .match_mask   = 0x8,
@@ -1491,7 +1547,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN */
         .name         = "INGRESS_PKT_INNER_L2_HDR_RSPAN",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -1505,7 +1561,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
         .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -1519,7 +1575,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_VNTAG",
         .match        = 0x40,
         .match_mask   = 0xc0,
@@ -1533,21 +1589,21 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
-        .match        = 0x2,
-        .match_mask   = 0x4e,
+        .match        = 0x8,
+        .match_mask   = 0x58,
         .match_maxbit = 44,
         .match_minbit = 31,
-        .maxbit       = 2,
-        .minbit       = 1,
+        .maxbit       = 4,
+        .minbit       = 3,
         .value        = 0x1,
         .pmaxbit      = 44,
         .pminbit      = 31,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x180,
         .match_mask   = 0x1c0,
@@ -1561,10 +1617,10 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x430,
-        .match_mask   = 0x670,
+        .match        = 0x418,
+        .match_mask   = 0x658,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 10,
@@ -1575,24 +1631,24 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
-        .match        = 0x1800,
+        .match        = 0x3800,
         .match_mask   = 0x3800,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x3,
+        .value        = 0x7,
         .pmaxbit      = 44,
         .pminbit      = 31,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
         .match        = 0x200,
-        .match_mask   = 0x648,
+        .match_mask   = 0x646,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 10,
@@ -1603,7 +1659,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -1617,10 +1673,10 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0xb0,
-        .match_mask   = 0x1f0,
+        .match        = 0x98,
+        .match_mask   = 0x1d8,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 8,
@@ -1631,7 +1687,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x600,
         .match_mask   = 0x640,
@@ -1645,10 +1701,10 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
         .match        = 0x800,
-        .match_mask   = 0x380e,
+        .match_mask   = 0x3826,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 13,
@@ -1659,10 +1715,10 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
-        .match        = 0x420,
-        .match_mask   = 0x670,
+        .match        = 0x410,
+        .match_mask   = 0x658,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 10,
@@ -1673,35 +1729,35 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
-        .match        = 0x20,
-        .match_mask   = 0x70,
+        .match        = 0x10,
+        .match_mask   = 0x58,
         .match_maxbit = 44,
         .match_minbit = 31,
-        .maxbit       = 5,
-        .minbit       = 4,
+        .maxbit       = 4,
+        .minbit       = 3,
         .value        = 0x2,
         .pmaxbit      = 44,
         .pminbit      = 31,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
-        .match        = 0x30,
-        .match_mask   = 0x70,
+        .match        = 0x18,
+        .match_mask   = 0x58,
         .match_maxbit = 44,
         .match_minbit = 31,
-        .maxbit       = 5,
-        .minbit       = 4,
+        .maxbit       = 4,
+        .minbit       = 3,
         .value        = 0x3,
         .pmaxbit      = 44,
         .pminbit      = 31,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3fff,
@@ -1715,52 +1771,52 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
-        .match        = 0x2000,
+        .match        = 0x1800,
         .match_mask   = 0x3800,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x4,
+        .value        = 0x3,
         .pmaxbit      = 44,
         .pminbit      = 31,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
-        .match        = 0x10,
-        .match_mask   = 0x70,
+        .match        = 0x2,
+        .match_mask   = 0x46,
         .match_maxbit = 44,
         .match_minbit = 31,
-        .maxbit       = 5,
-        .minbit       = 4,
+        .maxbit       = 2,
+        .minbit       = 1,
         .value        = 0x1,
         .pmaxbit      = 44,
         .pminbit      = 31,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x4,
-        .match_mask   = 0x46,
+        .match        = 0x20,
+        .match_mask   = 0x66,
         .match_maxbit = 44,
         .match_minbit = 31,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
         .pmaxbit      = 44,
         .pminbit      = 31,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x804,
-        .match_mask   = 0x3846,
+        .match        = 0x820,
+        .match_mask   = 0x3866,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 13,
@@ -1771,7 +1827,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
         .match        = 0x6,
         .match_mask   = 0x46,
@@ -1785,10 +1841,10 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x80,
-        .match_mask   = 0x1f0,
+        .match_mask   = 0x1d8,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 8,
@@ -1799,7 +1855,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x1000,
         .match_mask   = 0x3806,
@@ -1813,21 +1869,21 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x3800,
+        .match        = 0x3000,
         .match_mask   = 0x3800,
         .match_maxbit = 44,
         .match_minbit = 31,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x7,
+        .value        = 0x6,
         .pmaxbit      = 44,
         .pminbit      = 31,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_ETAG",
         .match        = 0x80,
         .match_mask   = 0xc0,
@@ -1841,7 +1897,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
         .match        = 0x10,
         .match_mask   = 0x10,
@@ -1855,7 +1911,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -1869,7 +1925,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0xff,
@@ -1883,7 +1939,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG",
         .match        = 0x20,
         .match_mask   = 0x20,
@@ -1897,7 +1953,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
         .match        = 0x8,
         .match_mask   = 0x8,
@@ -1911,7 +1967,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_RSPAN",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -1925,7 +1981,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -1939,7 +1995,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_VNTAG",
         .match        = 0x40,
         .match_mask   = 0xc0,
@@ -1953,21 +2009,21 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
-        .match        = 0x2,
-        .match_mask   = 0x4e,
+        .match        = 0x8,
+        .match_mask   = 0x58,
         .match_maxbit = 22,
         .match_minbit = 9,
-        .maxbit       = 2,
-        .minbit       = 1,
+        .maxbit       = 4,
+        .minbit       = 3,
         .value        = 0x1,
         .pmaxbit      = 22,
         .pminbit      = 9,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x180,
         .match_mask   = 0x1c0,
@@ -1981,10 +2037,10 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
-        .match        = 0x430,
-        .match_mask   = 0x670,
+        .match        = 0x418,
+        .match_mask   = 0x658,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 10,
@@ -1995,24 +2051,24 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
-        .match        = 0x1800,
+        .match        = 0x3800,
         .match_mask   = 0x3800,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x3,
+        .value        = 0x7,
         .pmaxbit      = 22,
         .pminbit      = 9,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
         .match        = 0x200,
-        .match_mask   = 0x648,
+        .match_mask   = 0x646,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 10,
@@ -2023,7 +2079,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -2037,10 +2093,10 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
-        .match        = 0xb0,
-        .match_mask   = 0x1f0,
+        .match        = 0x98,
+        .match_mask   = 0x1d8,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 8,
@@ -2051,7 +2107,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x600,
         .match_mask   = 0x640,
@@ -2065,7 +2121,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
         .match        = 0x1006,
         .match_mask   = 0x3846,
@@ -2079,24 +2135,24 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
-        .match        = 0x8,
-        .match_mask   = 0x48,
+        .match        = 0x4,
+        .match_mask   = 0x46,
         .match_maxbit = 22,
         .match_minbit = 9,
-        .maxbit       = 3,
-        .minbit       = 3,
-        .value        = 0x1,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
         .pmaxbit      = 22,
         .pminbit      = 9,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
-        .match        = 0x208,
-        .match_mask   = 0x648,
+        .match        = 0x204,
+        .match_mask   = 0x646,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 10,
@@ -2107,10 +2163,10 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
-        .match        = 0x808,
-        .match_mask   = 0x3848,
+        .match        = 0x804,
+        .match_mask   = 0x3846,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 13,
@@ -2121,7 +2177,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
         .match        = 0x100,
         .match_mask   = 0x1c0,
@@ -2135,52 +2191,80 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
-        .match        = 0xa,
-        .match_mask   = 0x4e,
+        .match        = 0x24,
+        .match_mask   = 0x66,
         .match_maxbit = 22,
         .match_minbit = 9,
-        .maxbit       = 2,
-        .minbit       = 1,
+        .maxbit       = 5,
+        .minbit       = 5,
         .value        = 0x1,
         .pmaxbit      = 22,
         .pminbit      = 9,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE",
-        .match        = 0x3000,
+        .match        = 0x2800,
         .match_mask   = 0x3800,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x6,
+        .value        = 0x5,
         .pmaxbit      = 22,
         .pminbit      = 9,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE",
-        .match        = 0x2800,
+        .match        = 0x2000,
         .match_mask   = 0x3800,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x5,
+        .value        = 0x4,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE",
+        .match        = 0x826,
+        .match_mask   = 0x3866,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
         .pmaxbit      = 22,
         .pminbit      = 9,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
         .match        = 0x800,
-        .match_mask   = 0x380e,
+        .match_mask   = 0x3826,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 13,
@@ -2191,10 +2275,10 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
-        .match        = 0x420,
-        .match_mask   = 0x670,
+        .match        = 0x410,
+        .match_mask   = 0x658,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 10,
@@ -2205,35 +2289,35 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
-        .match        = 0x20,
-        .match_mask   = 0x70,
+        .match        = 0x10,
+        .match_mask   = 0x58,
         .match_maxbit = 22,
         .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 4,
+        .maxbit       = 4,
+        .minbit       = 3,
         .value        = 0x2,
         .pmaxbit      = 22,
         .pminbit      = 9,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
-        .match        = 0x30,
-        .match_mask   = 0x70,
+        .match        = 0x18,
+        .match_mask   = 0x58,
         .match_maxbit = 22,
         .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 4,
+        .maxbit       = 4,
+        .minbit       = 3,
         .value        = 0x3,
         .pmaxbit      = 22,
         .pminbit      = 9,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
         .match        = 0x40,
         .match_mask   = 0x40,
@@ -2247,7 +2331,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
         .match        = 0x42,
         .match_mask   = 0x42,
@@ -2261,7 +2345,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
         .match        = 0x44,
         .match_mask   = 0x44,
@@ -2275,7 +2359,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
         .match        = 0x48,
         .match_mask   = 0x48,
@@ -2289,7 +2373,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
         .match        = 0x50,
         .match_mask   = 0x50,
@@ -2303,7 +2387,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -2317,7 +2401,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
         .match        = 0xc0,
         .match_mask   = 0xc0,
@@ -2331,7 +2415,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
         .match        = 0x140,
         .match_mask   = 0x140,
@@ -2345,7 +2429,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
         .match        = 0x240,
         .match_mask   = 0x240,
@@ -2359,7 +2443,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3fff,
@@ -2373,52 +2457,52 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
-        .match        = 0x2000,
+        .match        = 0x1800,
         .match_mask   = 0x3800,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x4,
+        .value        = 0x3,
         .pmaxbit      = 22,
         .pminbit      = 9,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
-        .match        = 0x10,
-        .match_mask   = 0x70,
+        .match        = 0x2,
+        .match_mask   = 0x46,
         .match_maxbit = 22,
         .match_minbit = 9,
-        .maxbit       = 5,
-        .minbit       = 4,
+        .maxbit       = 2,
+        .minbit       = 1,
         .value        = 0x1,
         .pmaxbit      = 22,
         .pminbit      = 9,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
-        .match        = 0x4,
-        .match_mask   = 0x46,
+        .match        = 0x20,
+        .match_mask   = 0x66,
         .match_maxbit = 22,
         .match_minbit = 9,
-        .maxbit       = 2,
-        .minbit       = 1,
-        .value        = 0x2,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
         .pmaxbit      = 22,
         .pminbit      = 9,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
-        .match        = 0x804,
-        .match_mask   = 0x3846,
+        .match        = 0x820,
+        .match_mask   = 0x3866,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 13,
@@ -2429,7 +2513,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
         .match        = 0x6,
         .match_mask   = 0x46,
@@ -2443,10 +2527,10 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x80,
-        .match_mask   = 0x1f0,
+        .match_mask   = 0x1d8,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 8,
@@ -2457,7 +2541,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x1000,
         .match_mask   = 0x3806,
@@ -2471,24 +2555,24 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
-        .match        = 0x3800,
+        .match        = 0x3000,
         .match_mask   = 0x3800,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 13,
         .minbit       = 11,
-        .value        = 0x7,
+        .value        = 0x6,
         .pmaxbit      = 22,
         .pminbit      = 9,
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
         .match        = 0x806,
-        .match_mask   = 0x3846,
+        .match_mask   = 0x3866,
         .match_maxbit = 22,
         .match_minbit = 9,
         .maxbit       = 13,
@@ -2499,7 +2583,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
         .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -2513,7 +2597,7 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
 
     },
     {
-        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        /* BCM56880_A0_NFA_6_5_30_1_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
         .name         = "INGRESS_PKT_SYS_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x1,
@@ -2528,23 +2612,23 @@ bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID
     },
 };
 
-static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db_info = {
-    .num_entries = 178,
-    .db = bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db
+static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db_info = {
+    .num_entries = 184,
+    .db = bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db
 };
-bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db_info_get(void) {
-    return &bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db_info;
+bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db_info_get(void) {
+    return &bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_db_info;
 }
 
-static shr_enum_map_t bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_map[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+static shr_enum_map_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_map[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_map_info = {
-    .num_entries = 178,
-    .map = bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_map
+static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_map_info = {
+    .num_entries = 184,
+    .map = bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_map
 };
 
-bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_map_info_get(void) {
-    return &bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_map_info;
+bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_map_info_get(void) {
+    return &bcm56880_a0_nfa_6_5_30_1_1_rxpmd_match_id_map_info;
 }
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_pkt_flexhdr.c
similarity index 67%
rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_pkt_flexhdr.c
rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_pkt_flexhdr.c
index e027162fd381..712374abd773 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_pkt_flexhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_pkt_flexhdr.c
@@ -3,11 +3,11 @@
  * DO NOT EDIT THIS FILE!
  * This file is auto-generated by xfc_map_parser
  * from the NPL output file(s) map.yml
- * for device bcm56880_a0 and variant nfa_2_1_7_0.
+ * for device bcm56880_a0 and variant nfa_6_5_30_1_1.
  * Edits to this file will be lost when it is regenerated.
  *
  * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  * All Rights Reserved.$
  *
  * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
@@ -31,320 +31,320 @@
 #include <shr/shr_error.h>
 #include <bcmpkt/bcmpkt_flexhdr.h>
 #include <bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h>
-#include <bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr.h>
-#include <bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr_data.h>
-#include <bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_flex_data.h>
+#include <bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56880_a0/nfa_6_5_30_1_1/bcm56880_a0_nfa_6_5_30_1_1_bcmpkt_rxpmd_flex_data.h>
 
 #define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
 #define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
 #define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
 #define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
 
-static void bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+static void bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
 {
     uint32_t *reason = data + 0;
 
     if (reason[12] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
     }
     if (reason[12] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
     }
     if (reason[12] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
     }
     if (reason[12] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD);
     }
     if (reason[12] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
     }
     if (reason[12] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
     }
     if (reason[12] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
     }
     if (reason[12] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
     }
     if (reason[12] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
     }
     if (reason[12] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
     }
     if (reason[12] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
     }
     if (reason[12] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
     }
     if (reason[12] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
     }
     if (reason[12] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
     }
     if (reason[12] & (0x1 << 14)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
     }
     if (reason[12] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
     }
     if (reason[12] & (0x1 << 16)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
     }
     if (reason[12] & (0x1 << 17)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP);
     }
     if (reason[12] & (0x1 << 18)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP);
     }
     if (reason[12] & (0x1 << 19)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
     }
     if (reason[12] & (0x1 << 20)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
     }
     if (reason[12] & (0x1 << 21)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP);
     }
     if (reason[12] & (0x1 << 22)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
     }
     if (reason[12] & (0x1 << 23)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
     }
     if (reason[12] & (0x1 << 24)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
     }
     if (reason[12] & (0x1 << 25)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
     }
     if (reason[12] & (0x1 << 26)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
     }
     if (reason[12] & (0x1 << 27)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
     }
     if (reason[12] & (0x1 << 28)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
     }
     if (reason[12] & (0x1 << 29)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
     }
     if (reason[12] & (0x1 << 30)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
     }
     if (reason[12] & (0x1 << 31)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
     }
     if (reason[11] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
     }
     if (reason[11] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
     }
     if (reason[11] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
     }
     if (reason[11] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
     }
     if (reason[11] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
     }
     if (reason[11] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
     }
     if (reason[11] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
     }
     if (reason[11] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
     }
     if (reason[11] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS);
     }
     if (reason[11] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS);
     }
     if (reason[11] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_RPF);
     }
     if (reason[11] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED);
     }
     if (reason[11] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED);
     }
     if (reason[11] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
     }
 }
 
-static void bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+static void bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
 {
     uint32_t *reason = data + 0;
 
     reason[12] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
         reason[12] |= (0x1 << 0);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
         reason[12] |= (0x1 << 1);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
         reason[12] |= (0x1 << 2);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) {
         reason[12] |= (0x1 << 3);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
         reason[12] |= (0x1 << 4);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
         reason[12] |= (0x1 << 5);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
         reason[12] |= (0x1 << 6);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
         reason[12] |= (0x1 << 7);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
         reason[12] |= (0x1 << 8);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
         reason[12] |= (0x1 << 9);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
         reason[12] |= (0x1 << 10);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
         reason[12] |= (0x1 << 11);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
         reason[12] |= (0x1 << 12);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
         reason[12] |= (0x1 << 13);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
         reason[12] |= (0x1 << 14);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
         reason[12] |= (0x1 << 15);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
         reason[12] |= (0x1 << 16);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
         reason[12] |= (0x1 << 17);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
         reason[12] |= (0x1 << 18);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
         reason[12] |= (0x1 << 19);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
         reason[12] |= (0x1 << 20);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
         reason[12] |= (0x1 << 21);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
         reason[12] |= (0x1 << 22);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
         reason[12] |= (0x1 << 23);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
         reason[12] |= (0x1 << 24);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
         reason[12] |= (0x1 << 25);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
         reason[12] |= (0x1 << 26);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
         reason[12] |= (0x1 << 27);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
         reason[12] |= (0x1 << 28);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
         reason[12] |= (0x1 << 29);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
         reason[12] |= (0x1 << 30);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
         reason[12] |= (0x1 << 31);
     }
     reason[11] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
         reason[11] |= (0x1 << 0);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
         reason[11] |= (0x1 << 1);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
         reason[11] |= (0x1 << 2);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
         reason[11] |= (0x1 << 3);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
         reason[11] |= (0x1 << 4);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
         reason[11] |= (0x1 << 5);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
         reason[11] |= (0x1 << 6);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
         reason[11] |= (0x1 << 7);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS)) {
         reason[11] |= (0x1 << 8);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS)) {
         reason[11] |= (0x1 << 9);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PE_RPF)) {
         reason[11] |= (0x1 << 10);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED)) {
         reason[11] |= (0x1 << 11);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED)) {
         reason[11] |= (0x1 << 12);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
         reason[11] |= (0x1 << 15);
     }
 }
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_data[] = {
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_data[] = {
     {
         .name = "DLB_ECMP_DESTINATION_15_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 160, 175 }, /* Profile 2. */
-            { 144, 159 }, /* Profile 3. */
+            { 144, 159 }, /* Profile 2. */
+            { 128, 143 }, /* Profile 3. */
         },
         .profile_cnt = 4,
     },
     {
         .name = "DROP_CODE_15_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -357,46 +357,46 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_dat
     },
     {
         .name = "DVP_15_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_DVP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 256, 271 }, /* Profile 2. */
-            { 256, 271 }, /* Profile 3. */
-            { 256, 271 }, /* Profile 4. */
-            { 256, 271 }, /* Profile 5. */
+            { 240, 255 }, /* Profile 2. */
+            { 240, 255 }, /* Profile 3. */
+            { 240, 255 }, /* Profile 4. */
+            { 240, 255 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "EFFECTIVE_TTL_7_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 176, 183 }, /* Profile 2. */
-            { 160, 167 }, /* Profile 3. */
-            { 176, 183 }, /* Profile 4. */
-            { 160, 167 }, /* Profile 5. */
+            { 160, 167 }, /* Profile 2. */
+            { 144, 151 }, /* Profile 3. */
+            { 160, 167 }, /* Profile 4. */
+            { 144, 151 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "ENTROPY_LABEL_LOW_15_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 320, 335 }, /* Profile 2. */
-            { 320, 335 }, /* Profile 3. */
-            { 320, 335 }, /* Profile 4. */
-            { 320, 335 }, /* Profile 5. */
+            { 304, 319 }, /* Profile 2. */
+            { 304, 319 }, /* Profile 3. */
+            { 304, 319 }, /* Profile 4. */
+            { 304, 319 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "EVENT_TRACE_VECTOR_31_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -409,7 +409,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_dat
     },
     {
         .name = "EVENT_TRACE_VECTOR_47_32",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -422,20 +422,20 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_dat
     },
     {
         .name = "I2E_CLASS_ID_15_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 304, 319 }, /* Profile 2. */
-            { 304, 319 }, /* Profile 3. */
-            { 304, 319 }, /* Profile 4. */
-            { 304, 319 }, /* Profile 5. */
+            { 288, 303 }, /* Profile 2. */
+            { 288, 303 }, /* Profile 3. */
+            { 288, 303 }, /* Profile 4. */
+            { 288, 303 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "IFP_TS_CONTROL_ACTION_3_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -448,20 +448,20 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_dat
     },
     {
         .name = "ING_ETAG_ACTION_3_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_ETAG_ACTION_3_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_ETAG_ACTION_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 380, 383 }, /* Profile 2. */
-            { 380, 383 }, /* Profile 3. */
-            { 380, 383 }, /* Profile 4. */
-            { 380, 383 }, /* Profile 5. */
+            { 372, 375 }, /* Profile 2. */
+            { 372, 375 }, /* Profile 3. */
+            { 372, 375 }, /* Profile 4. */
+            { 372, 375 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "ING_ETAG_PCP_DEI_3_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_ETAG_PCP_DEI_3_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_ETAG_PCP_DEI_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -474,20 +474,20 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_dat
     },
     {
         .name = "ING_ETAG_VID_16_15_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_ETAG_VID_16_15_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_ETAG_VID_16_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
             { -1, -1 }, /* Profile 2. */
             { -1, -1 }, /* Profile 3. */
-            { 160, 175 }, /* Profile 4. */
-            { 144, 159 }, /* Profile 5. */
+            { 144, 159 }, /* Profile 4. */
+            { 128, 143 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "ING_TIMESTAMP_31_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -500,84 +500,84 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_dat
     },
     {
         .name = "INGRESS_PP_PORT_7_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 272, 279 }, /* Profile 2. */
-            { 272, 279 }, /* Profile 3. */
-            { 272, 279 }, /* Profile 4. */
-            { 272, 279 }, /* Profile 5. */
+            { 256, 263 }, /* Profile 2. */
+            { 256, 263 }, /* Profile 3. */
+            { 256, 263 }, /* Profile 4. */
+            { 256, 263 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 112, 127 }, /* Profile 2. */
-            { 112, 127 }, /* Profile 3. */
-            { 112, 127 }, /* Profile 4. */
-            { 112, 127 }, /* Profile 5. */
+            { 320, 335 }, /* Profile 2. */
+            { 320, 335 }, /* Profile 3. */
+            { 320, 335 }, /* Profile 4. */
+            { 320, 335 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "INGRESS_QOS_REMARK_CTRL_3_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 396, 399 }, /* Profile 2. */
-            { 396, 399 }, /* Profile 3. */
-            { 396, 399 }, /* Profile 4. */
-            { 396, 399 }, /* Profile 5. */
+            { 404, 407 }, /* Profile 2. */
+            { 404, 407 }, /* Profile 3. */
+            { 404, 407 }, /* Profile 4. */
+            { 404, 407 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "INT_PRI_3_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 392, 395 }, /* Profile 2. */
-            { 392, 395 }, /* Profile 3. */
-            { 392, 395 }, /* Profile 4. */
-            { 392, 395 }, /* Profile 5. */
+            { 384, 387 }, /* Profile 2. */
+            { 384, 387 }, /* Profile 3. */
+            { 384, 387 }, /* Profile 4. */
+            { 384, 387 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "L2_IIF_10_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 144, 154 }, /* Profile 2. */
+            { 128, 138 }, /* Profile 2. */
             { -1, -1 }, /* Profile 3. */
-            { 144, 154 }, /* Profile 4. */
+            { 128, 138 }, /* Profile 4. */
         },
         .profile_cnt = 5,
     },
     {
         .name = "L2_OIF_10_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
             { -1, -1 }, /* Profile 2. */
-            { 224, 234 }, /* Profile 3. */
+            { 208, 218 }, /* Profile 3. */
             { -1, -1 }, /* Profile 4. */
-            { 224, 234 }, /* Profile 5. */
+            { 208, 218 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "L3_IIF_13_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -590,20 +590,20 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_dat
     },
     {
         .name = "L3_OIF_1_13_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 240, 253 }, /* Profile 2. */
-            { 240, 253 }, /* Profile 3. */
-            { 240, 253 }, /* Profile 4. */
-            { 240, 253 }, /* Profile 5. */
+            { 224, 237 }, /* Profile 2. */
+            { 224, 237 }, /* Profile 3. */
+            { 224, 237 }, /* Profile 4. */
+            { 224, 237 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "MPLS_LABEL_DECAP_COUNT_3_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -616,7 +616,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_dat
     },
     {
         .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -629,20 +629,20 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_dat
     },
     {
         .name = "NHOP_INDEX_1_15_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 192, 207 }, /* Profile 2. */
-            { 176, 191 }, /* Profile 3. */
-            { 192, 207 }, /* Profile 4. */
-            { 176, 191 }, /* Profile 5. */
+            { 176, 191 }, /* Profile 2. */
+            { 160, 175 }, /* Profile 3. */
+            { 176, 191 }, /* Profile 4. */
+            { 160, 175 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "PARSER_VHLEN_0_15_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -655,7 +655,7 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_dat
     },
     {
         .name = "PKT_MISC_CTRL_0_3_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -668,135 +668,135 @@ static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_dat
     },
     {
         .name = "SVP_15_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SVP_15_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 208, 223 }, /* Profile 2. */
-            { 192, 207 }, /* Profile 3. */
-            { 208, 223 }, /* Profile 4. */
-            { 192, 207 }, /* Profile 5. */
+            { 192, 207 }, /* Profile 2. */
+            { 176, 191 }, /* Profile 3. */
+            { 192, 207 }, /* Profile 4. */
+            { 176, 191 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 388, 391 }, /* Profile 2. */
-            { 388, 391 }, /* Profile 3. */
-            { 388, 391 }, /* Profile 4. */
-            { 388, 391 }, /* Profile 5. */
+            { 400, 403 }, /* Profile 2. */
+            { 400, 403 }, /* Profile 3. */
+            { 400, 403 }, /* Profile 4. */
+            { 400, 403 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "SYSTEM_DESTINATION_15_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 128, 143 }, /* Profile 2. */
-            { 128, 143 }, /* Profile 3. */
-            { 128, 143 }, /* Profile 4. */
-            { 128, 143 }, /* Profile 5. */
+            { 112, 127 }, /* Profile 2. */
+            { 112, 127 }, /* Profile 3. */
+            { 112, 127 }, /* Profile 4. */
+            { 112, 127 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "SYSTEM_OPCODE_3_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 404, 407 }, /* Profile 2. */
-            { 404, 407 }, /* Profile 3. */
-            { 404, 407 }, /* Profile 4. */
-            { 404, 407 }, /* Profile 5. */
+            { 396, 399 }, /* Profile 2. */
+            { 396, 399 }, /* Profile 3. */
+            { 396, 399 }, /* Profile 4. */
+            { 396, 399 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "T_VLAN_TAG_VALUE_15_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_T_VLAN_TAG_VALUE_15_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_T_VLAN_TAG_VALUE_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 288, 303 }, /* Profile 2. */
-            { 288, 303 }, /* Profile 3. */
-            { 288, 303 }, /* Profile 4. */
-            { 288, 303 }, /* Profile 5. */
+            { 272, 287 }, /* Profile 2. */
+            { 272, 287 }, /* Profile 3. */
+            { 272, 287 }, /* Profile 4. */
+            { 272, 287 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "TIMESTAMP_CTRL_3_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 372, 375 }, /* Profile 2. */
-            { 372, 375 }, /* Profile 3. */
-            { 372, 375 }, /* Profile 4. */
-            { 372, 375 }, /* Profile 5. */
+            { 380, 383 }, /* Profile 2. */
+            { 380, 383 }, /* Profile 3. */
+            { 380, 383 }, /* Profile 4. */
+            { 380, 383 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 400, 403 }, /* Profile 2. */
-            { 400, 403 }, /* Profile 3. */
-            { 400, 403 }, /* Profile 4. */
-            { 400, 403 }, /* Profile 5. */
+            { 392, 395 }, /* Profile 2. */
+            { 392, 395 }, /* Profile 3. */
+            { 392, 395 }, /* Profile 4. */
+            { 392, 395 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "VFI_15_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VFI_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 224, 239 }, /* Profile 2. */
-            { 208, 223 }, /* Profile 3. */
-            { 224, 239 }, /* Profile 4. */
-            { 208, 223 }, /* Profile 5. */
+            { 208, 223 }, /* Profile 2. */
+            { 192, 207 }, /* Profile 3. */
+            { 208, 223 }, /* Profile 4. */
+            { 192, 207 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
     {
         .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0",
-        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0,
+        .fid = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 384, 387 }, /* Profile 2. */
-            { 384, 387 }, /* Profile 3. */
-            { 384, 387 }, /* Profile 4. */
-            { 384, 387 }, /* Profile 5. */
+            { 388, 391 }, /* Profile 2. */
+            { 388, 391 }, /* Profile 3. */
+            { 388, 391 }, /* Profile 4. */
+            { 388, 391 }, /* Profile 5. */
         },
         .profile_cnt = 6,
     },
-};static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_data,
+};static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_data,
 };
 
-static shr_enum_map_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reason_names[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+static shr_enum_map_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reason_names[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_reasons_info_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reasons_info = {
-    .num_reasons = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
-    .reason_names = bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reason_names,
-    .reason_encode = bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reason_encode,
-    .reason_decode = bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reason_decode,
+static bcmpkt_flex_reasons_info_t bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reason_names,
+    .reason_encode = bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reason_decode,
 };
 
 
@@ -939,7 +939,7 @@ static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_arp_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_arp_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT] = {
     bcmpkt_arp_t_hardware_len_get,
     bcmpkt_arp_t_hardware_type_get,
     bcmpkt_arp_t_operation_get,
@@ -951,7 +951,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_arp_t_fget[BCM56880_A0_NFA_2_1_7
     bcmpkt_arp_t_target_ip_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_arp_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_arp_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT] = {
     bcmpkt_arp_t_hardware_len_set,
     bcmpkt_arp_t_hardware_type_set,
     bcmpkt_arp_t_operation_set,
@@ -963,13 +963,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_arp_t_fset[BCM56880_A0_NFA_2_1_7
     bcmpkt_arp_t_target_ip_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_arp_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_arp_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_arp_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_arp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_arp_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_arp_t_field_data,
 };
 
 
@@ -1066,7 +1066,7 @@ static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_authen_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_authen_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT] = {
     bcmpkt_authen_t_data_get,
     bcmpkt_authen_t_next_header_get,
     bcmpkt_authen_t_payload_len_get,
@@ -1075,7 +1075,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_authen_t_fget[BCM56880_A0_NFA_2_
     bcmpkt_authen_t_spi_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_authen_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_authen_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT] = {
     bcmpkt_authen_t_data_set,
     bcmpkt_authen_t_next_header_set,
     bcmpkt_authen_t_payload_len_set,
@@ -1084,13 +1084,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_authen_t_fset[BCM56880_A0_NFA_2_
     bcmpkt_authen_t_spi_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_authen_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_authen_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_authen_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_authen_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_authen_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_AUTHEN_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_authen_t_field_data,
 };
 
 
@@ -1339,7 +1339,7 @@ static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_bfd_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_bfd_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT] = {
     bcmpkt_bfd_t_ap_get,
     bcmpkt_bfd_t_bfd_length_get,
     bcmpkt_bfd_t_cpi_get,
@@ -1358,7 +1358,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_bfd_t_fget[BCM56880_A0_NFA_2_1_7
     bcmpkt_bfd_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_bfd_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_bfd_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT] = {
     bcmpkt_bfd_t_ap_set,
     bcmpkt_bfd_t_bfd_length_set,
     bcmpkt_bfd_t_cpi_set,
@@ -1377,13 +1377,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_bfd_t_fset[BCM56880_A0_NFA_2_1_7
     bcmpkt_bfd_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_bfd_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_bfd_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_bfd_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_bfd_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_bfd_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_BFD_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_bfd_t_field_data,
 };
 
 
@@ -1499,7 +1499,7 @@ static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
     bcmpkt_cpu_composites_0_t_dma_cont0_get,
     bcmpkt_cpu_composites_0_t_dma_cont1_get,
     bcmpkt_cpu_composites_0_t_dma_cont2_get,
@@ -1509,7 +1509,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_fget[BCM56880
     bcmpkt_cpu_composites_0_t_dma_cont6_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
     bcmpkt_cpu_composites_0_t_dma_cont0_set,
     bcmpkt_cpu_composites_0_t_dma_cont1_set,
     bcmpkt_cpu_composites_0_t_dma_cont2_set,
@@ -1519,13 +1519,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_fset[BCM56880
     bcmpkt_cpu_composites_0_t_dma_cont6_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_field_data,
 };
 
 
@@ -1705,7 +1705,7 @@ static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
     bcmpkt_cpu_composites_1_t_dma_cont10_get,
     bcmpkt_cpu_composites_1_t_dma_cont11_get,
     bcmpkt_cpu_composites_1_t_dma_cont12_get,
@@ -1719,7 +1719,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_fget[BCM56880
     bcmpkt_cpu_composites_1_t_dma_cont9_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
     bcmpkt_cpu_composites_1_t_dma_cont10_set,
     bcmpkt_cpu_composites_1_t_dma_cont11_set,
     bcmpkt_cpu_composites_1_t_dma_cont12_set,
@@ -1733,13 +1733,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_fset[BCM56880
     bcmpkt_cpu_composites_1_t_dma_cont9_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_field_data,
 };
 
 
@@ -1789,25 +1789,25 @@ static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_dest_option_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
     bcmpkt_dest_option_t_hdr_ext_len_get,
     bcmpkt_dest_option_t_next_header_get,
     bcmpkt_dest_option_t_option_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_dest_option_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
     bcmpkt_dest_option_t_hdr_ext_len_set,
     bcmpkt_dest_option_t_next_header_set,
     bcmpkt_dest_option_t_option_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_dest_option_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_dest_option_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_dest_option_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_DEST_OPTION_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_field_data,
 };
 
 
@@ -1947,7 +1947,7 @@ static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
     bcmpkt_erspan3_fixed_hdr_t_bso_get,
     bcmpkt_erspan3_fixed_hdr_t_cos_get,
     bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
@@ -1959,7 +1959,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_fget[BCM5688
     bcmpkt_erspan3_fixed_hdr_t_vlan_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
     bcmpkt_erspan3_fixed_hdr_t_bso_set,
     bcmpkt_erspan3_fixed_hdr_t_cos_set,
     bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
@@ -1971,13 +1971,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_fset[BCM5688
     bcmpkt_erspan3_fixed_hdr_t_vlan_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_field_data,
 };
 
 
@@ -2042,27 +2042,27 @@ static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
     bcmpkt_erspan3_subhdr_5_t_platform_id_get,
     bcmpkt_erspan3_subhdr_5_t_port_id_get,
     bcmpkt_erspan3_subhdr_5_t_switch_id_get,
     bcmpkt_erspan3_subhdr_5_t_timestamp_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
     bcmpkt_erspan3_subhdr_5_t_platform_id_set,
     bcmpkt_erspan3_subhdr_5_t_port_id_set,
     bcmpkt_erspan3_subhdr_5_t_switch_id_set,
     bcmpkt_erspan3_subhdr_5_t_timestamp_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_field_data,
 };
 
 
@@ -2143,7 +2143,7 @@ static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_esp_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_esp_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT] = {
     bcmpkt_esp_t_next_header_get,
     bcmpkt_esp_t_pad_get,
     bcmpkt_esp_t_pad_len_get,
@@ -2151,7 +2151,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_esp_t_fget[BCM56880_A0_NFA_2_1_7
     bcmpkt_esp_t_spi_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_esp_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_esp_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT] = {
     bcmpkt_esp_t_next_header_set,
     bcmpkt_esp_t_pad_set,
     bcmpkt_esp_t_pad_len_set,
@@ -2159,13 +2159,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_esp_t_fset[BCM56880_A0_NFA_2_1_7
     bcmpkt_esp_t_spi_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_esp_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_esp_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_esp_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_esp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_esp_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ESP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_esp_t_field_data,
 };
 
 
@@ -2259,7 +2259,7 @@ static int32_t bcmpkt_etag_t_vid_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_etag_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_etag_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT] = {
     bcmpkt_etag_t_pcp_dei_get,
     bcmpkt_etag_t_rsrvd0_get,
     bcmpkt_etag_t_rsrvd1_get,
@@ -2268,7 +2268,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_etag_t_fget[BCM56880_A0_NFA_2_1_
     bcmpkt_etag_t_vid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_etag_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_etag_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT] = {
     bcmpkt_etag_t_pcp_dei_set,
     bcmpkt_etag_t_rsrvd0_set,
     bcmpkt_etag_t_rsrvd1_set,
@@ -2277,13 +2277,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_etag_t_fset[BCM56880_A0_NFA_2_1_
     bcmpkt_etag_t_vid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_etag_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_etag_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_etag_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_etag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_etag_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETAG_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_etag_t_field_data,
 };
 
 
@@ -2302,21 +2302,21 @@ static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_ethertype_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
     bcmpkt_ethertype_t_type_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_ethertype_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
     bcmpkt_ethertype_t_type_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_ethertype_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_ethertype_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_ethertype_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_field_data,
 };
 
 
@@ -2381,27 +2381,27 @@ static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_frag_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_frag_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT] = {
     bcmpkt_frag_t_frag_info_get,
     bcmpkt_frag_t_id_get,
     bcmpkt_frag_t_next_header_get,
     bcmpkt_frag_t_reserved_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_frag_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_frag_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT] = {
     bcmpkt_frag_t_frag_info_set,
     bcmpkt_frag_t_id_set,
     bcmpkt_frag_t_next_header_set,
     bcmpkt_frag_t_reserved_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_frag_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_frag_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_frag_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_frag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_frag_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FRAG_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_frag_t_field_data,
 };
 
 
@@ -2630,7 +2630,7 @@ static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int prof
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
     bcmpkt_generic_loopback_t_destination_obj_get,
     bcmpkt_generic_loopback_t_destination_type_get,
     bcmpkt_generic_loopback_t_entropy_obj_get,
@@ -2648,7 +2648,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_fget[BCM56880
     bcmpkt_generic_loopback_t_start_byte_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
     bcmpkt_generic_loopback_t_destination_obj_set,
     bcmpkt_generic_loopback_t_destination_type_set,
     bcmpkt_generic_loopback_t_entropy_obj_set,
@@ -2666,13 +2666,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_fset[BCM56880
     bcmpkt_generic_loopback_t_start_byte_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_field_data,
 };
 
 
@@ -2751,7 +2751,7 @@ static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gpe_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gpe_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT] = {
     bcmpkt_gpe_t_flags_get,
     bcmpkt_gpe_t_next_protocol_get,
     bcmpkt_gpe_t_reserved0_get,
@@ -2759,7 +2759,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gpe_t_fget[BCM56880_A0_NFA_2_1_7
     bcmpkt_gpe_t_vni_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gpe_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gpe_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT] = {
     bcmpkt_gpe_t_flags_set,
     bcmpkt_gpe_t_next_protocol_set,
     bcmpkt_gpe_t_reserved0_set,
@@ -2767,13 +2767,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gpe_t_fset[BCM56880_A0_NFA_2_1_7
     bcmpkt_gpe_t_vni_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gpe_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gpe_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gpe_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_gpe_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gpe_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GPE_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_gpe_t_field_data,
 };
 
 
@@ -2807,23 +2807,23 @@ static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint3
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
     bcmpkt_gre_chksum_t_checksum_get,
     bcmpkt_gre_chksum_t_offset_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
     bcmpkt_gre_chksum_t_checksum_set,
     bcmpkt_gre_chksum_t_offset_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_field_data,
 };
 
 
@@ -2857,23 +2857,23 @@ static int32_t bcmpkt_gre_key_t_vn_id_upper_set(uint32_t *data, int profile, uin
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gre_key_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT] = {
     bcmpkt_gre_key_t_vn_id_lower_entropy_get,
     bcmpkt_gre_key_t_vn_id_upper_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gre_key_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT] = {
     bcmpkt_gre_key_t_vn_id_lower_entropy_set,
     bcmpkt_gre_key_t_vn_id_upper_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gre_key_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gre_key_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_gre_key_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_KEY_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_field_data,
 };
 
 
@@ -2893,21 +2893,21 @@ static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gre_rout_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
     bcmpkt_gre_rout_t_routing_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gre_rout_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
     bcmpkt_gre_rout_t_routing_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gre_rout_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gre_rout_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_gre_rout_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_ROUT_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_field_data,
 };
 
 
@@ -2927,21 +2927,21 @@ static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gre_seq_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
     bcmpkt_gre_seq_t_sequence_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gre_seq_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
     bcmpkt_gre_seq_t_sequence_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gre_seq_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gre_seq_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_gre_seq_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_SEQ_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_field_data,
 };
 
 
@@ -3005,27 +3005,27 @@ static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gre_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gre_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT] = {
     bcmpkt_gre_t_c_r_k_s_get,
     bcmpkt_gre_t_protocol_get,
     bcmpkt_gre_t_reserved_get,
     bcmpkt_gre_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gre_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gre_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT] = {
     bcmpkt_gre_t_c_r_k_s_set,
     bcmpkt_gre_t_protocol_set,
     bcmpkt_gre_t_reserved_set,
     bcmpkt_gre_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gre_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gre_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gre_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_gre_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gre_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GRE_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_gre_t_field_data,
 };
 
 
@@ -3077,25 +3077,25 @@ static int32_t bcmpkt_gtp_12byte_t_bytes_7_4_set(uint32_t *data, int profile, ui
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_FID_COUNT] = {
     bcmpkt_gtp_12byte_t_bytes_11_8_get,
     bcmpkt_gtp_12byte_t_bytes_3_0_get,
     bcmpkt_gtp_12byte_t_bytes_7_4_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_FID_COUNT] = {
     bcmpkt_gtp_12byte_t_bytes_11_8_set,
     bcmpkt_gtp_12byte_t_bytes_3_0_set,
     bcmpkt_gtp_12byte_t_bytes_7_4_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_12BYTE_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_field_data,
 };
 
 
@@ -3131,23 +3131,127 @@ static int32_t bcmpkt_gtp_8byte_t_bytes_7_4_set(uint32_t *data, int profile, uin
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_FID_COUNT] = {
     bcmpkt_gtp_8byte_t_bytes_3_0_get,
     bcmpkt_gtp_8byte_t_bytes_7_4_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_FID_COUNT] = {
     bcmpkt_gtp_8byte_t_bytes_3_0_set,
     bcmpkt_gtp_8byte_t_bytes_7_4_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_8BYTE_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_field_data,
+};
+
+
+static int32_t bcmpkt_gtp_ext_4byte_t_ext_hdr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_ext_4byte_t_ext_hdr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT] = {
+    bcmpkt_gtp_ext_4byte_t_ext_hdr_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT] = {
+    bcmpkt_gtp_ext_4byte_t_ext_hdr_set,
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_field_data,
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_field_data,
+};
+
+
+static int32_t bcmpkt_gtp_with_ext_t_bytes_11_8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_with_ext_t_bytes_11_8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_with_ext_t_bytes_3_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_with_ext_t_bytes_3_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_with_ext_t_bytes_7_4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_with_ext_t_bytes_7_4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT] = {
+    bcmpkt_gtp_with_ext_t_bytes_11_8_get,
+    bcmpkt_gtp_with_ext_t_bytes_3_0_get,
+    bcmpkt_gtp_with_ext_t_bytes_7_4_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT] = {
+    bcmpkt_gtp_with_ext_t_bytes_11_8_set,
+    bcmpkt_gtp_with_ext_t_bytes_3_0_set,
+    bcmpkt_gtp_with_ext_t_bytes_7_4_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_GTP_WITH_EXT_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_field_data,
 };
 
 
@@ -3197,25 +3301,25 @@ static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint3
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
     bcmpkt_hop_by_hop_t_hdr_ext_len_get,
     bcmpkt_hop_by_hop_t_next_header_get,
     bcmpkt_hop_by_hop_t_option_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
     bcmpkt_hop_by_hop_t_hdr_ext_len_set,
     bcmpkt_hop_by_hop_t_next_header_set,
     bcmpkt_hop_by_hop_t_option_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_field_data,
 };
 
 
@@ -3264,25 +3368,25 @@ static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_icmp_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_icmp_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT] = {
     bcmpkt_icmp_t_checksum_get,
     bcmpkt_icmp_t_code_get,
     bcmpkt_icmp_t_icmp_type_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_icmp_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_icmp_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT] = {
     bcmpkt_icmp_t_checksum_set,
     bcmpkt_icmp_t_code_set,
     bcmpkt_icmp_t_icmp_type_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_icmp_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_icmp_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_icmp_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_icmp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_icmp_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_icmp_t_field_data,
 };
 
 
@@ -3347,27 +3451,27 @@ static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_igmp_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_igmp_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT] = {
     bcmpkt_igmp_t_checksum_get,
     bcmpkt_igmp_t_group_address_get,
     bcmpkt_igmp_t_igmp_type_get,
     bcmpkt_igmp_t_max_resp_time_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_igmp_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_igmp_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT] = {
     bcmpkt_igmp_t_checksum_set,
     bcmpkt_igmp_t_group_address_set,
     bcmpkt_igmp_t_igmp_type_set,
     bcmpkt_igmp_t_max_resp_time_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_igmp_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_igmp_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_igmp_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_igmp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_igmp_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IGMP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_igmp_t_field_data,
 };
 
 
@@ -3449,7 +3553,7 @@ static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_ipfix_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT] = {
     bcmpkt_ipfix_t_export_time_get,
     bcmpkt_ipfix_t_length_get,
     bcmpkt_ipfix_t_obs_domain_id_get,
@@ -3457,7 +3561,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_ipfix_t_fget[BCM56880_A0_NFA_2_1
     bcmpkt_ipfix_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_ipfix_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT] = {
     bcmpkt_ipfix_t_export_time_set,
     bcmpkt_ipfix_t_length_set,
     bcmpkt_ipfix_t_obs_domain_id_set,
@@ -3465,13 +3569,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_ipfix_t_fset[BCM56880_A0_NFA_2_1
     bcmpkt_ipfix_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_ipfix_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_ipfix_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_ipfix_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_field_data,
 };
 
 
@@ -3643,7 +3747,7 @@ static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, ui
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_ipv4_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT] = {
     bcmpkt_ipv4_t_da_get,
     bcmpkt_ipv4_t_flags_frag_offset_get,
     bcmpkt_ipv4_t_hdr_checksum_get,
@@ -3657,7 +3761,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_ipv4_t_fget[BCM56880_A0_NFA_2_1_
     bcmpkt_ipv4_t_version_hdr_len_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_ipv4_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT] = {
     bcmpkt_ipv4_t_da_set,
     bcmpkt_ipv4_t_flags_frag_offset_set,
     bcmpkt_ipv4_t_hdr_checksum_set,
@@ -3671,13 +3775,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_ipv4_t_fset[BCM56880_A0_NFA_2_1_
     bcmpkt_ipv4_t_version_hdr_len_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_ipv4_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_ipv4_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_ipv4_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_field_data,
 };
 
 
@@ -3803,7 +3907,7 @@ static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t v
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_ipv6_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT] = {
     bcmpkt_ipv6_t_da_get,
     bcmpkt_ipv6_t_flow_label_get,
     bcmpkt_ipv6_t_hop_limit_get,
@@ -3814,7 +3918,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_ipv6_t_fget[BCM56880_A0_NFA_2_1_
     bcmpkt_ipv6_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_ipv6_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT] = {
     bcmpkt_ipv6_t_da_set,
     bcmpkt_ipv6_t_flow_label_set,
     bcmpkt_ipv6_t_hop_limit_set,
@@ -3825,13 +3929,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_ipv6_t_fset[BCM56880_A0_NFA_2_1_
     bcmpkt_ipv6_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_ipv6_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_ipv6_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_ipv6_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_field_data,
 };
 
 
@@ -3867,23 +3971,23 @@ static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_l2_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_l2_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT] = {
     bcmpkt_l2_t_macda_get,
     bcmpkt_l2_t_macsa_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_l2_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_l2_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT] = {
     bcmpkt_l2_t_macda_set,
     bcmpkt_l2_t_macsa_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_l2_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_l2_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_l2_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_l2_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_l2_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_l2_t_field_data,
 };
 
 
@@ -3903,21 +4007,21 @@ static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
     bcmpkt_mirror_erspan_sn_t_seq_num_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
     bcmpkt_mirror_erspan_sn_t_seq_num_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_field_data,
 };
 
 
@@ -3937,21 +4041,21 @@ static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, u
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
     bcmpkt_mirror_transport_t_data_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
     bcmpkt_mirror_transport_t_data_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_field_data,
 };
 
 
@@ -4015,27 +4119,27 @@ static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
     bcmpkt_mpls_ach_t_channel_type_get,
     bcmpkt_mpls_ach_t_cw_type_get,
     bcmpkt_mpls_ach_t_reserved_get,
     bcmpkt_mpls_ach_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
     bcmpkt_mpls_ach_t_channel_type_set,
     bcmpkt_mpls_ach_t_cw_type_set,
     bcmpkt_mpls_ach_t_reserved_set,
     bcmpkt_mpls_ach_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_ACH_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_field_data,
 };
 
 
@@ -4055,21 +4159,21 @@ static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT] = {
     bcmpkt_mpls_bv_t_value_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT] = {
     bcmpkt_mpls_bv_t_value_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_BV_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_field_data,
 };
 
 
@@ -4118,25 +4222,25 @@ static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT] = {
     bcmpkt_mpls_cw_t_cw_type_get,
     bcmpkt_mpls_cw_t_reserved_get,
     bcmpkt_mpls_cw_t_seq_number_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT] = {
     bcmpkt_mpls_cw_t_cw_type_set,
     bcmpkt_mpls_cw_t_reserved_set,
     bcmpkt_mpls_cw_t_seq_number_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_CW_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_field_data,
 };
 
 
@@ -4200,27 +4304,27 @@ static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_mpls_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_mpls_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT] = {
     bcmpkt_mpls_t_bos_get,
     bcmpkt_mpls_t_exp_get,
     bcmpkt_mpls_t_label_get,
     bcmpkt_mpls_t_ttl_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_mpls_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_mpls_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT] = {
     bcmpkt_mpls_t_bos_set,
     bcmpkt_mpls_t_exp_set,
     bcmpkt_mpls_t_label_set,
     bcmpkt_mpls_t_ttl_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_mpls_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_mpls_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_mpls_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_mpls_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_mpls_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_MPLS_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_mpls_t_field_data,
 };
 
 
@@ -4254,23 +4358,23 @@ static int32_t bcmpkt_opaquetag_t_vlan_tag_set(uint32_t *data, int profile, uint
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_opaquetag_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_FID_COUNT] = {
     bcmpkt_opaquetag_t_tpid_get,
     bcmpkt_opaquetag_t_vlan_tag_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_opaquetag_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_FID_COUNT] = {
     bcmpkt_opaquetag_t_tpid_set,
     bcmpkt_opaquetag_t_vlan_tag_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_opaquetag_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_opaquetag_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_opaquetag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_OPAQUETAG_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_field_data,
 };
 
 
@@ -4487,7 +4591,7 @@ static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_p_1588_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT] = {
     bcmpkt_p_1588_t_cntrl_get,
     bcmpkt_p_1588_t_correction_get,
     bcmpkt_p_1588_t_domain_nb_get,
@@ -4504,7 +4608,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_p_1588_t_fget[BCM56880_A0_NFA_2_
     bcmpkt_p_1588_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_p_1588_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT] = {
     bcmpkt_p_1588_t_cntrl_set,
     bcmpkt_p_1588_t_correction_set,
     bcmpkt_p_1588_t_domain_nb_set,
@@ -4521,13 +4625,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_p_1588_t_fset[BCM56880_A0_NFA_2_
     bcmpkt_p_1588_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_p_1588_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_p_1588_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_p_1588_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_P_1588_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_field_data,
 };
 
 
@@ -4577,25 +4681,25 @@ static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uin
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
     bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
     bcmpkt_prog_ext_hdr_t_next_header_get,
     bcmpkt_prog_ext_hdr_t_option_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
     bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
     bcmpkt_prog_ext_hdr_t_next_header_set,
     bcmpkt_prog_ext_hdr_t_option_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_field_data,
 };
 
 
@@ -4691,7 +4795,7 @@ static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uin
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_psamp_0_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT] = {
     bcmpkt_psamp_0_t_flowset_get,
     bcmpkt_psamp_0_t_length_get,
     bcmpkt_psamp_0_t_next_hop_index_get,
@@ -4700,7 +4804,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_psamp_0_t_fget[BCM56880_A0_NFA_2
     bcmpkt_psamp_0_t_template_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_psamp_0_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT] = {
     bcmpkt_psamp_0_t_flowset_set,
     bcmpkt_psamp_0_t_length_set,
     bcmpkt_psamp_0_t_next_hop_index_set,
@@ -4709,13 +4813,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_psamp_0_t_fset[BCM56880_A0_NFA_2
     bcmpkt_psamp_0_t_template_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_psamp_0_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_psamp_0_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_psamp_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_0_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_field_data,
 };
 
 
@@ -4824,7 +4928,7 @@ static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, u
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_psamp_1_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT] = {
     bcmpkt_psamp_1_t_dlb_id_get,
     bcmpkt_psamp_1_t_egress_port_get,
     bcmpkt_psamp_1_t_epoch_get,
@@ -4834,7 +4938,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_psamp_1_t_fget[BCM56880_A0_NFA_2
     bcmpkt_psamp_1_t_variable_flag_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_psamp_1_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT] = {
     bcmpkt_psamp_1_t_dlb_id_set,
     bcmpkt_psamp_1_t_egress_port_set,
     bcmpkt_psamp_1_t_epoch_set,
@@ -4844,13 +4948,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_psamp_1_t_fset[BCM56880_A0_NFA_2
     bcmpkt_psamp_1_t_variable_flag_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_psamp_1_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_psamp_1_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_psamp_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_1_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_field_data,
 };
 
 
@@ -4962,7 +5066,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, i
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
     bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
     bcmpkt_psamp_mirror_on_drop_0_t_length_get,
@@ -4972,7 +5076,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_fget[BC
     bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
     bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
     bcmpkt_psamp_mirror_on_drop_0_t_length_set,
@@ -4982,13 +5086,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_fset[BC
     bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_data,
 };
 
 
@@ -5082,7 +5186,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *d
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get,
     bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get,
     bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get,
@@ -5091,7 +5195,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_fget[BC
     bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set,
     bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set,
     bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set,
@@ -5100,13 +5204,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_fset[BC
     bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_field_data,
 };
 
 
@@ -5249,7 +5353,7 @@ static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_rarp_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_rarp_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT] = {
     bcmpkt_rarp_t_hardware_len_get,
     bcmpkt_rarp_t_hardware_type_get,
     bcmpkt_rarp_t_operation_get,
@@ -5261,7 +5365,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_rarp_t_fget[BCM56880_A0_NFA_2_1_
     bcmpkt_rarp_t_target_ip_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_rarp_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_rarp_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT] = {
     bcmpkt_rarp_t_hardware_len_set,
     bcmpkt_rarp_t_hardware_type_set,
     bcmpkt_rarp_t_operation_set,
@@ -5273,13 +5377,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_rarp_t_fset[BCM56880_A0_NFA_2_1_
     bcmpkt_rarp_t_target_ip_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_rarp_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rarp_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_rarp_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_rarp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_rarp_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_rarp_t_field_data,
 };
 
 
@@ -5359,7 +5463,7 @@ static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, u
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_routing_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_routing_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT] = {
     bcmpkt_routing_t_data_get,
     bcmpkt_routing_t_hdr_ext_len_get,
     bcmpkt_routing_t_next_header_get,
@@ -5367,7 +5471,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_routing_t_fget[BCM56880_A0_NFA_2
     bcmpkt_routing_t_segments_left_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_routing_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_routing_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT] = {
     bcmpkt_routing_t_data_set,
     bcmpkt_routing_t_hdr_ext_len_set,
     bcmpkt_routing_t_next_header_set,
@@ -5375,13 +5479,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_routing_t_fset[BCM56880_A0_NFA_2
     bcmpkt_routing_t_segments_left_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_routing_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_routing_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_routing_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_routing_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_routing_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_ROUTING_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_routing_t_field_data,
 };
 
 
@@ -5415,23 +5519,23 @@ static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_rspan_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_rspan_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT] = {
     bcmpkt_rspan_t_tag_get,
     bcmpkt_rspan_t_tpid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_rspan_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_rspan_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT] = {
     bcmpkt_rspan_t_tag_set,
     bcmpkt_rspan_t_tpid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_rspan_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_rspan_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_rspan_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_rspan_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_rspan_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_RSPAN_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_rspan_t_field_data,
 };
 
 
@@ -5481,25 +5585,25 @@ static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, ui
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
     bcmpkt_sflow_shim_0_t_sys_destination_get,
     bcmpkt_sflow_shim_0_t_sys_source_get,
     bcmpkt_sflow_shim_0_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
     bcmpkt_sflow_shim_0_t_sys_destination_set,
     bcmpkt_sflow_shim_0_t_sys_source_set,
     bcmpkt_sflow_shim_0_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_field_data,
 };
 
 
@@ -5623,7 +5727,7 @@ static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
     bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
     bcmpkt_sflow_shim_1_t_flag_discarded_get,
     bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
@@ -5634,7 +5738,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_fget[BCM56880_A0_
     bcmpkt_sflow_shim_1_t_sys_opcode_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
     bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
     bcmpkt_sflow_shim_1_t_flag_discarded_set,
     bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
@@ -5645,13 +5749,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_fset[BCM56880_A0_
     bcmpkt_sflow_shim_1_t_sys_opcode_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_field_data,
 };
 
 
@@ -5686,23 +5790,23 @@ static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int prof
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
     bcmpkt_sflow_shim_2_t_sequence_num_get,
     bcmpkt_sflow_shim_2_t_user_meta_data_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
     bcmpkt_sflow_shim_2_t_sequence_num_set,
     bcmpkt_sflow_shim_2_t_user_meta_data_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_field_data,
 };
 
 
@@ -5737,23 +5841,23 @@ static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint3
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_snap_llc_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
     bcmpkt_snap_llc_t_length_get,
     bcmpkt_snap_llc_t_snap_llc_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_snap_llc_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
     bcmpkt_snap_llc_t_length_set,
     bcmpkt_snap_llc_t_snap_llc_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_snap_llc_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_snap_llc_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_snap_llc_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_SNAP_LLC_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_field_data,
 };
 
 
@@ -5787,23 +5891,23 @@ static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profil
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_first_4bytes_t_dst_port_get,
     bcmpkt_tcp_first_4bytes_t_src_port_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_first_4bytes_t_dst_port_set,
     bcmpkt_tcp_first_4bytes_t_src_port_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_field_data,
 };
 
 
@@ -5899,7 +6003,7 @@ static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profil
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_last_16bytes_t_ack_num_get,
     bcmpkt_tcp_last_16bytes_t_checksum_get,
     bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
@@ -5908,7 +6012,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_fget[BCM56880
     bcmpkt_tcp_last_16bytes_t_win_size_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_last_16bytes_t_ack_num_set,
     bcmpkt_tcp_last_16bytes_t_checksum_set,
     bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
@@ -5917,13 +6021,13 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_fset[BCM56880
     bcmpkt_tcp_last_16bytes_t_win_size_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_field_data,
 };
 
 
@@ -5987,27 +6091,27 @@ static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_udp_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_udp_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT] = {
     bcmpkt_udp_t_checksum_get,
     bcmpkt_udp_t_dst_port_get,
     bcmpkt_udp_t_src_port_get,
     bcmpkt_udp_t_udp_length_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_udp_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_udp_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT] = {
     bcmpkt_udp_t_checksum_set,
     bcmpkt_udp_t_dst_port_set,
     bcmpkt_udp_t_src_port_set,
     bcmpkt_udp_t_udp_length_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_udp_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_udp_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_udp_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_udp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_udp_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_udp_t_field_data,
 };
 
 
@@ -6043,23 +6147,23 @@ static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
     bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
     bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
     bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
     bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_field_data,
 };
 
 
@@ -6079,21 +6183,21 @@ static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
     bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
     bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_field_data,
 };
 
 
@@ -6143,25 +6247,25 @@ static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
     bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
     bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
     bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
     bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
     bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
     bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_field_data,
 };
 
 
@@ -6225,27 +6329,27 @@ static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_vlan_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_vlan_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT] = {
     bcmpkt_vlan_t_cfi_get,
     bcmpkt_vlan_t_pcp_get,
     bcmpkt_vlan_t_tpid_get,
     bcmpkt_vlan_t_vid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_vlan_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_vlan_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT] = {
     bcmpkt_vlan_t_cfi_set,
     bcmpkt_vlan_t_pcp_set,
     bcmpkt_vlan_t_tpid_set,
     bcmpkt_vlan_t_vid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_vlan_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_vlan_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_vlan_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_vlan_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_vlan_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_vlan_t_field_data,
 };
 
 
@@ -6280,23 +6384,23 @@ static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_vntag_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_vntag_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT] = {
     bcmpkt_vntag_t_tag_get,
     bcmpkt_vntag_t_tpid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_vntag_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_vntag_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT] = {
     bcmpkt_vntag_t_tag_set,
     bcmpkt_vntag_t_tpid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_vntag_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_vntag_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_vntag_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_vntag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_vntag_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VNTAG_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_vntag_t_field_data,
 };
 
 
@@ -6346,25 +6450,25 @@ static int32_t bcmpkt_vxlan_t_vn_id_upper_set(uint32_t *data, int profile, uint3
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_vxlan_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT] = {
     bcmpkt_vxlan_t_flags_reserved_1_get,
     bcmpkt_vxlan_t_vn_id_lower_reserved2_get,
     bcmpkt_vxlan_t_vn_id_upper_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_vxlan_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT] = {
     bcmpkt_vxlan_t_flags_reserved_1_set,
     bcmpkt_vxlan_t_vn_id_lower_reserved2_set,
     bcmpkt_vxlan_t_vn_id_upper_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_vxlan_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_vxlan_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_vxlan_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_field_data,
 };
 
 
@@ -6476,7 +6580,7 @@ static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t v
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_wesp_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_30_1_1_wesp_t_fget[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT] = {
     bcmpkt_wesp_t_flags_get,
     bcmpkt_wesp_t_header_len_get,
     bcmpkt_wesp_t_next_header_get,
@@ -6486,7 +6590,7 @@ bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_wesp_t_fget[BCM56880_A0_NFA_2_1_
     bcmpkt_wesp_t_wesp_iv_get,
 };
 
-bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_wesp_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_30_1_1_wesp_t_fset[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT] = {
     bcmpkt_wesp_t_flags_set,
     bcmpkt_wesp_t_header_len_set,
     bcmpkt_wesp_t_next_header_set,
@@ -6496,452 +6600,466 @@ bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_wesp_t_fset[BCM56880_A0_NFA_2_1_
     bcmpkt_wesp_t_wesp_iv_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_wesp_t_field_data[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_30_1_1_wesp_t_field_data[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_wesp_t_field_info = {
-    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FID_COUNT,
-    .info = bcm56880_a0_nfa_2_1_7_0_wesp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_30_1_1_wesp_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_WESP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_6_5_30_1_1_wesp_t_field_data,
 };
 
-static bcmpkt_flex_pmd_info_t bcm56880_a0_nfa_2_1_7_0_flexhdr_info_list[BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_COUNT] = {
+static bcmpkt_flex_pmd_info_t bcm56880_a0_nfa_6_5_30_1_1_flexhdr_info_list[BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_arp_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_arp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_authen_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_authen_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_authen_t_fset,
+    },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_arp_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_bfd_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_arp_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_arp_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_bfd_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_bfd_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_authen_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_authen_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_authen_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_bfd_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_bfd_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_bfd_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_cpu_composites_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_dest_option_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_erspan3_fixed_hdr_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_dest_option_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_dest_option_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_dest_option_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_erspan3_subhdr_5_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_esp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_esp_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_esp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_etag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_etag_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_etag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_esp_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_esp_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_esp_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_ethertype_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_etag_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_frag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_etag_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_etag_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_frag_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_frag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_ethertype_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_ethertype_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_ethertype_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_generic_loopback_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_frag_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gpe_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_frag_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_frag_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gpe_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gpe_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gre_chksum_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_gpe_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_gpe_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_gpe_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gre_key_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gre_rout_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_gre_key_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_gre_key_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_gre_key_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gre_seq_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_gre_rout_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gre_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_gre_rout_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_gre_rout_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gre_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gre_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_gre_seq_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_gre_seq_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_gre_seq_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gtp_12byte_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_gre_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_gre_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_gre_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gtp_8byte_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gtp_ext_4byte_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_gtp_with_ext_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_hop_by_hop_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_icmp_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_icmp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_icmp_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_icmp_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_icmp_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_icmp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_igmp_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_igmp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_igmp_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_igmp_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_igmp_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_igmp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_ipfix_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_ipfix_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_ipfix_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_ipfix_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_ipv4_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_ipv4_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_ipv4_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_ipv4_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_ipv6_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_ipv6_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_ipv6_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_ipv6_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_l2_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_l2_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_l2_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_l2_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_l2_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_l2_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_mirror_erspan_sn_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_mirror_transport_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_mpls_ach_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_mpls_bv_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_mpls_cw_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_mpls_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_mpls_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_mpls_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_mpls_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_mpls_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_mpls_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_opaquetag_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_opaquetag_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_opaquetag_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_opaquetag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_p_1588_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_p_1588_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_p_1588_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_p_1588_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_prog_ext_hdr_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_psamp_0_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_psamp_0_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_psamp_0_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_psamp_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_psamp_1_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_psamp_1_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_psamp_1_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_psamp_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_psamp_mirror_on_drop_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_rarp_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_rarp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_rarp_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_rarp_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_rarp_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_rarp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_routing_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_routing_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_routing_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_routing_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_routing_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_routing_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_rspan_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_rspan_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_rspan_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_rspan_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_rspan_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_rspan_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_sflow_shim_2_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_snap_llc_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_snap_llc_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_snap_llc_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_snap_llc_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_tcp_first_4bytes_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_tcp_last_16bytes_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_udp_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_udp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_udp_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_udp_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_udp_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_udp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_unknown_l3_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_unknown_l4_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_unknown_l5_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_vlan_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_vlan_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_vlan_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_vlan_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_vlan_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_vlan_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_vntag_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_vntag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_vntag_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_vntag_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_vntag_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_vntag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_vxlan_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_vxlan_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_vxlan_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_vxlan_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_wesp_t_field_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_wesp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56880_a0_nfa_2_1_7_0_wesp_t_fget,
-        .flex_fset = bcm56880_a0_nfa_2_1_7_0_wesp_t_fset,
+        .flex_fget = bcm56880_a0_nfa_6_5_30_1_1_wesp_t_fget,
+        .flex_fset = bcm56880_a0_nfa_6_5_30_1_1_wesp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_info,
-        .reasons_info = &bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reasons_info,
+        .field_info = &bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_field_info,
+        .reasons_info = &bcm56880_a0_nfa_6_5_30_1_1_rxpmd_flex_reasons_info,
         .flex_common_fget = bcm56880_a0_rxpmd_flex_fget,
         .flex_common_fset = bcm56880_a0_rxpmd_flex_fset,
     },
 };
 
-static shr_enum_map_t bcm56880_a0_nfa_2_1_7_0_flexhdr_id_map[] = {
-    BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
+static shr_enum_map_t bcm56880_a0_nfa_6_5_30_1_1_flexhdr_id_map[] = {
+    BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_NAME_MAP_INIT
 };
 
-shr_enum_map_t * bcm56880_a0_nfa_2_1_7_0_flexhdr_map_get(void)
+shr_enum_map_t * bcm56880_a0_nfa_6_5_30_1_1_flexhdr_map_get(void)
 {
-    return bcm56880_a0_nfa_2_1_7_0_flexhdr_id_map;
+    return bcm56880_a0_nfa_6_5_30_1_1_flexhdr_id_map;
 }
 
-bcmpkt_flex_pmd_info_t * bcm56880_a0_nfa_2_1_7_0_flex_pmd_info_get(uint32_t hid)
+bcmpkt_flex_pmd_info_t * bcm56880_a0_nfa_6_5_30_1_1_flex_pmd_info_get(uint32_t hid)
 {
-    if (hid >= BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_COUNT) {
+    if (hid >= BCM56880_A0_NFA_6_5_30_1_1_BCMPKT_FLEXHDR_COUNT) {
         return NULL;
     }
 
-    return &bcm56880_a0_nfa_2_1_7_0_flexhdr_info_list[hid];
+    return &bcm56880_a0_nfa_6_5_30_1_1_flexhdr_info_list[hid];
 }
 
-int bcm56880_a0_nfa_2_1_7_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+int bcm56880_a0_nfa_6_5_30_1_1_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
     12,
     -1,
     -1,
-    58,
-};
\ No newline at end of file
+    60,
+};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c
similarity index 67%
rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c
rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c
index 8713e3347f26..e881973ef1e1 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id.c
@@ -2,12 +2,12 @@
  *
  * DO NOT EDIT THIS FILE!
  * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56890_a0_cna_6_5_29_sf_match_id_info.yml
- * for device bcm56890_a0 and variant cna_6_5_29.
+ * from the NPL output file(s) bcm56890_a0_cna_6_5_30_2_0_sf_match_id_info.yml
+ * for device bcm56890_a0 and variant cna_6_5_30_2_0.
  * Edits to this file will be lost when it is regenerated.
  *
  * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  * All Rights Reserved.$
  *
  * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
@@ -29,178 +29,178 @@
 
 
 #include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-#include <bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h>
+#include <bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_match_id_defs.h>
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] =
 {
     0x8,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] =
 {
     0xe,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] =
 {
     0xc,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] =
 {
     0x4,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[1] =
 {
     0x7fffe,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[1] =
 {
     0x810,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[1] =
 {
     0x3f8,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[1] =
 {
     0x1fc00,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[1] =
 {
     0x20000,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[1] =
 {
     0x3060,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[1] =
 {
     0x2040,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[1] =
 {
     0xc180,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[1] =
 {
     0x40000,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[1] =
 {
     0x10200,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[1] =
 {
     0x8100,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[1] =
 {
     0x28,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[1] =
 {
     0x3e,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[1] =
 {
     0x30,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] =
 {
     0x4,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[1] =
 {
     0x1ffffe,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[1] =
 {
     0x1010,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[1] =
 {
     0x7f8,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[1] =
 {
     0x7f800,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[1] =
 {
     0x80000,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[1] =
 {
     0x6060,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[1] =
 {
     0x4040,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[1] =
 {
     0x38380,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[1] =
 {
     0x100000,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[1] =
 {
     0x40400,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[1] =
 {
     0x10100,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[1] =
 {
     0x20200,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] =
 {
     0x4,
 };
 
-static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] =
+static uint32_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] =
 {
     0x8,
 };
 
 
 static bcmpkt_rxpmd_match_id_db_t
-bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT] = {
+bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_COUNT] = {
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -214,7 +214,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
         .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -228,7 +228,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
         .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x7,
@@ -242,7 +242,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -256,7 +256,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
         .match        = 0x20,
         .match_mask   = 0x66,
@@ -270,7 +270,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -284,7 +284,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
         .match        = 0x40,
         .match_mask   = 0x66,
@@ -298,7 +298,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
         .match        = 0x8,
         .match_mask   = 0x18,
@@ -312,7 +312,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
         .match        = 0x10,
         .match_mask   = 0x18,
@@ -326,7 +326,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x7f,
@@ -340,7 +340,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
         .match        = 0x2,
         .match_mask   = 0x6,
@@ -354,7 +354,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x4,
         .match_mask   = 0x6,
@@ -368,7 +368,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x24,
         .match_mask   = 0x66,
@@ -382,7 +382,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
         .match        = 0x6,
         .match_mask   = 0x6,
@@ -396,7 +396,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x18,
         .match_mask   = 0x18,
@@ -410,7 +410,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -424,7 +424,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x46,
         .match_mask   = 0x66,
@@ -438,7 +438,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
         .match        = 0x26,
         .match_mask   = 0x66,
@@ -452,7 +452,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
         .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
         .match        = 0x2,
         .match_mask   = 0x3,
@@ -466,7 +466,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
         .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
         .match        = 0x1,
         .match_mask   = 0x3,
@@ -480,7 +480,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
         .name         = "EGRESS_PKT_SYS_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3,
@@ -494,7 +494,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -508,7 +508,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -522,7 +522,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x7,
@@ -536,7 +536,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -550,7 +550,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
         .match        = 0x20,
         .match_mask   = 0x66,
@@ -564,7 +564,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -578,7 +578,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
         .match        = 0x40,
         .match_mask   = 0x66,
@@ -592,7 +592,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
         .match        = 0x8,
         .match_mask   = 0x18,
@@ -606,7 +606,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
         .match        = 0x10,
         .match_mask   = 0x18,
@@ -620,7 +620,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x7f,
@@ -634,7 +634,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
         .match        = 0x2,
         .match_mask   = 0x6,
@@ -648,7 +648,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x4,
         .match_mask   = 0x6,
@@ -662,7 +662,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x24,
         .match_mask   = 0x66,
@@ -676,7 +676,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
         .match        = 0x6,
         .match_mask   = 0x6,
@@ -690,7 +690,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x18,
         .match_mask   = 0x18,
@@ -704,7 +704,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -718,7 +718,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x46,
         .match_mask   = 0x66,
@@ -732,7 +732,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
         .match        = 0x26,
         .match_mask   = 0x66,
@@ -746,7 +746,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -760,11 +760,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 10,
         .arc_id_mask  = 0xc00,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
         .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -778,11 +778,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 10,
         .arc_id_mask  = 0xc00,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
         .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x7,
@@ -798,7 +798,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -812,11 +812,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 10,
         .arc_id_mask  = 0xc00,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
         .match        = 0x20,
         .match_mask   = 0x66,
@@ -830,11 +830,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 12,
         .arc_id_mask  = 0x1f000,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -848,11 +848,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 12,
         .arc_id_mask  = 0x1f000,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
         .match        = 0x40,
         .match_mask   = 0x66,
@@ -866,11 +866,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 12,
         .arc_id_mask  = 0x1f000,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
         .match        = 0x8,
         .match_mask   = 0x18,
@@ -884,11 +884,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 12,
         .arc_id_mask  = 0x1f000,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
         .match        = 0x10,
         .match_mask   = 0x18,
@@ -902,11 +902,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 12,
         .arc_id_mask  = 0x1f000,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x7f,
@@ -922,7 +922,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
         .match        = 0x2,
         .match_mask   = 0x6,
@@ -936,11 +936,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 12,
         .arc_id_mask  = 0x1f000,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x4,
         .match_mask   = 0x6,
@@ -954,11 +954,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 12,
         .arc_id_mask  = 0x1f000,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x24,
         .match_mask   = 0x66,
@@ -972,11 +972,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 12,
         .arc_id_mask  = 0x1f000,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
         .match        = 0x6,
         .match_mask   = 0x6,
@@ -990,11 +990,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 12,
         .arc_id_mask  = 0x1f000,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x18,
         .match_mask   = 0x18,
@@ -1008,11 +1008,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 12,
         .arc_id_mask  = 0x1f000,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -1026,11 +1026,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 12,
         .arc_id_mask  = 0x1f000,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x46,
         .match_mask   = 0x66,
@@ -1044,11 +1044,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 12,
         .arc_id_mask  = 0x1f000,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -1062,11 +1062,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 2,
         .arc_id_mask  = 0x1c,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -1080,11 +1080,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 2,
         .arc_id_mask  = 0x1c,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x7,
@@ -1100,7 +1100,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -1114,11 +1114,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 2,
         .arc_id_mask  = 0x1c,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
         .match        = 0x20,
         .match_mask   = 0x66,
@@ -1132,11 +1132,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 5,
         .arc_id_mask  = 0x3e0,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -1150,11 +1150,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 5,
         .arc_id_mask  = 0x3e0,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
         .match        = 0x40,
         .match_mask   = 0x66,
@@ -1168,11 +1168,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 5,
         .arc_id_mask  = 0x3e0,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
         .match        = 0x8,
         .match_mask   = 0x18,
@@ -1186,11 +1186,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 5,
         .arc_id_mask  = 0x3e0,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
         .match        = 0x10,
         .match_mask   = 0x18,
@@ -1204,11 +1204,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 5,
         .arc_id_mask  = 0x3e0,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x7f,
@@ -1224,7 +1224,7 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
         .match        = 0x2,
         .match_mask   = 0x6,
@@ -1238,11 +1238,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 5,
         .arc_id_mask  = 0x3e0,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x4,
         .match_mask   = 0x6,
@@ -1256,11 +1256,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 5,
         .arc_id_mask  = 0x3e0,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x24,
         .match_mask   = 0x66,
@@ -1274,11 +1274,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 5,
         .arc_id_mask  = 0x3e0,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
         .match        = 0x6,
         .match_mask   = 0x6,
@@ -1292,11 +1292,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 5,
         .arc_id_mask  = 0x3e0,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x18,
         .match_mask   = 0x18,
@@ -1310,11 +1310,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 5,
         .arc_id_mask  = 0x3e0,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x60,
         .match_mask   = 0x60,
@@ -1328,11 +1328,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 5,
         .arc_id_mask  = 0x3e0,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x46,
         .match_mask   = 0x66,
@@ -1346,11 +1346,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 5,
         .arc_id_mask  = 0x3e0,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
         .match        = 0x26,
         .match_mask   = 0x66,
@@ -1364,11 +1364,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 5,
         .arc_id_mask  = 0x3e0,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
         .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
         .match        = 0x2,
         .match_mask   = 0x3,
@@ -1382,11 +1382,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 0,
         .arc_id_mask  = 0x3,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
         .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
         .match        = 0x1,
         .match_mask   = 0x3,
@@ -1400,11 +1400,11 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
         .zone_minbit  = 0,
         .arc_id_mask  = 0x3,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_sys_hdr_loopback,
+        .zone_bmp = bcm56890_a0_cna_6_5_30_2_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback,
 
     },
     {
-        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        /* BCM56890_A0_CNA_6_5_30_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
         .name         = "INGRESS_PKT_SYS_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3,
@@ -1421,23 +1421,23 @@ bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_C
     },
 };
 
-static bcmpkt_rxpmd_match_id_db_info_t bcm56890_a0_cna_6_5_29_rxpmd_match_id_db_info = {
+static bcmpkt_rxpmd_match_id_db_info_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info = {
     .num_entries = 77,
-    .db = bcm56890_a0_cna_6_5_29_rxpmd_match_id_db
+    .db = bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db
 };
-bcmpkt_rxpmd_match_id_db_info_t * bcm56890_a0_cna_6_5_29_rxpmd_match_id_db_info_get(void) {
-    return &bcm56890_a0_cna_6_5_29_rxpmd_match_id_db_info;
+bcmpkt_rxpmd_match_id_db_info_t * bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info_get(void) {
+    return &bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_db_info;
 }
 
-static shr_enum_map_t bcm56890_a0_cna_6_5_29_rxpmd_match_id_map[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+static shr_enum_map_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_map[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_rxpmd_match_id_map_info_t bcm56890_a0_cna_6_5_29_rxpmd_match_id_map_info = {
+static bcmpkt_rxpmd_match_id_map_info_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info = {
     .num_entries = 77,
-    .map = bcm56890_a0_cna_6_5_29_rxpmd_match_id_map
+    .map = bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_map
 };
 
-bcmpkt_rxpmd_match_id_map_info_t * bcm56890_a0_cna_6_5_29_rxpmd_match_id_map_info_get(void) {
-    return &bcm56890_a0_cna_6_5_29_rxpmd_match_id_map_info;
+bcmpkt_rxpmd_match_id_map_info_t * bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info_get(void) {
+    return &bcm56890_a0_cna_6_5_30_2_0_rxpmd_match_id_map_info;
 }
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_pkt_flexhdr.c
similarity index 74%
rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_pkt_flexhdr.c
rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_pkt_flexhdr.c
index 0a040c82a32d..93a8aa7726a5 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_pkt_flexhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_pkt_flexhdr.c
@@ -3,11 +3,11 @@
  * DO NOT EDIT THIS FILE!
  * This file is auto-generated by xfc_map_parser
  * from the NPL output file(s) map.yml
- * for device bcm56890_a0 and variant cna_6_5_29.
+ * for device bcm56890_a0 and variant cna_6_5_30_2_0.
  * Edits to this file will be lost when it is regenerated.
  *
  * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  * All Rights Reserved.$
  *
  * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
@@ -31,159 +31,159 @@
 #include <shr/shr_error.h>
 #include <bcmpkt/bcmpkt_flexhdr.h>
 #include <bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h>
-#include <bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr.h>
-#include <bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr_data.h>
-#include <bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h>
+#include <bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56890_a0/cna_6_5_30_2_0/bcm56890_a0_cna_6_5_30_2_0_bcmpkt_rxpmd_flex_data.h>
 
 #define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
 #define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
 #define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
 #define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
 
-static void bcm56890_a0_cna_6_5_29_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+static void bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
 {
     uint32_t *reason = data + 0;
 
     if (reason[13] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
     }
     if (reason[13] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
     }
     if (reason[13] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
     }
     if (reason[13] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD);
     }
     if (reason[13] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST);
     }
     if (reason[13] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
     }
     if (reason[13] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
     }
     if (reason[13] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
     }
     if (reason[13] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
     }
     if (reason[13] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
     }
     if (reason[13] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
     }
     if (reason[13] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
     }
     if (reason[13] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
     }
     if (reason[13] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
     }
     if (reason[13] & (0x1 << 14)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
     }
     if (reason[13] & (0x1 << 16)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
     }
     if (reason[13] & (0x1 << 17)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
     }
     if (reason[13] & (0x1 << 18)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
     }
     if (reason[13] & (0x1 << 19)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
     }
     if (reason[13] & (0x1 << 23)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
     }
     if (reason[12] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
     }
 }
 
-static void bcm56890_a0_cna_6_5_29_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+static void bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
 {
     uint32_t *reason = data + 0;
 
     reason[13] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
         reason[13] |= (0x1 << 0);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
         reason[13] |= (0x1 << 1);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
         reason[13] |= (0x1 << 2);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) {
         reason[13] |= (0x1 << 3);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) {
         reason[13] |= (0x1 << 4);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
         reason[13] |= (0x1 << 5);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
         reason[13] |= (0x1 << 6);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
         reason[13] |= (0x1 << 7);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
         reason[13] |= (0x1 << 8);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
         reason[13] |= (0x1 << 9);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
         reason[13] |= (0x1 << 10);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
         reason[13] |= (0x1 << 11);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
         reason[13] |= (0x1 << 12);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
         reason[13] |= (0x1 << 13);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
         reason[13] |= (0x1 << 14);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
         reason[13] |= (0x1 << 16);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
         reason[13] |= (0x1 << 17);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
         reason[13] |= (0x1 << 18);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
         reason[13] |= (0x1 << 19);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
         reason[13] |= (0x1 << 23);
     }
     reason[12] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
         reason[12] |= (0x1 << 15);
     }
 }
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data[] = {
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_field_data[] = {
     {
         .name = "DROP_CODE_15_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -198,7 +198,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "DVP_15_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -213,7 +213,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "EFFECTIVE_TTL_7_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -228,22 +228,22 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "ENTROPY_LABEL_HIGH_3_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 404, 407 }, /* Profile 2. */
-            { 404, 407 }, /* Profile 3. */
-            { 404, 407 }, /* Profile 4. */
-            { 372, 375 }, /* Profile 5. */
-            { 372, 375 }, /* Profile 6. */
-            { 372, 375 }, /* Profile 7. */
+            { 400, 403 }, /* Profile 2. */
+            { 400, 403 }, /* Profile 3. */
+            { 400, 403 }, /* Profile 4. */
+            { 368, 371 }, /* Profile 5. */
+            { 368, 371 }, /* Profile 6. */
+            { 368, 371 }, /* Profile 7. */
         },
         .profile_cnt = 8,
     },
     {
         .name = "ENTROPY_LABEL_LOW_15_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -258,7 +258,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "EP_NIH_HDR_DROP_CODE_15_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -272,22 +272,22 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "EP_NIH_HDR_RECIRC_CODE_3_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 384, 387 }, /* Profile 2. */
-            { 384, 387 }, /* Profile 3. */
-            { 384, 387 }, /* Profile 4. */
-            { 352, 355 }, /* Profile 5. */
-            { 352, 355 }, /* Profile 6. */
-            { 352, 355 }, /* Profile 7. */
+            { 388, 391 }, /* Profile 2. */
+            { 388, 391 }, /* Profile 3. */
+            { 388, 391 }, /* Profile 4. */
+            { 356, 359 }, /* Profile 5. */
+            { 356, 359 }, /* Profile 6. */
+            { 356, 359 }, /* Profile 7. */
         },
         .profile_cnt = 8,
     },
     {
         .name = "EP_NIH_HDR_TIMESTAMP_15_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -301,7 +301,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "EP_NIH_HDR_TIMESTAMP_31_16",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -315,7 +315,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "ERSPAN3_GBP_SID_15_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -330,7 +330,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "EVENT_TRACE_VECTOR_15_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -345,7 +345,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "EVENT_TRACE_VECTOR_31_16",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -360,7 +360,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "EVENT_TRACE_VECTOR_47_32",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -375,7 +375,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "I2E_CLASS_ID_15_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -390,7 +390,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "ING_TIMESTAMP_15_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -405,7 +405,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "ING_TIMESTAMP_31_16",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -420,7 +420,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "INGRESS_PP_PORT_8_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_8_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_8_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -435,7 +435,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -450,37 +450,37 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "INGRESS_QOS_REMARK_CTRL_3_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 412, 415 }, /* Profile 2. */
-            { 412, 415 }, /* Profile 3. */
-            { 412, 415 }, /* Profile 4. */
-            { 380, 383 }, /* Profile 5. */
-            { 380, 383 }, /* Profile 6. */
-            { 380, 383 }, /* Profile 7. */
+            { 408, 411 }, /* Profile 2. */
+            { 408, 411 }, /* Profile 3. */
+            { 408, 411 }, /* Profile 4. */
+            { 376, 379 }, /* Profile 5. */
+            { 376, 379 }, /* Profile 6. */
+            { 376, 379 }, /* Profile 7. */
         },
         .profile_cnt = 8,
     },
     {
         .name = "INT_PRI_3_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 396, 399 }, /* Profile 2. */
-            { 396, 399 }, /* Profile 3. */
-            { 396, 399 }, /* Profile 4. */
-            { 364, 367 }, /* Profile 5. */
-            { 364, 367 }, /* Profile 6. */
-            { 364, 367 }, /* Profile 7. */
+            { 416, 419 }, /* Profile 2. */
+            { 416, 419 }, /* Profile 3. */
+            { 416, 419 }, /* Profile 4. */
+            { 384, 387 }, /* Profile 5. */
+            { 384, 387 }, /* Profile 6. */
+            { 384, 387 }, /* Profile 7. */
         },
         .profile_cnt = 8,
     },
     {
         .name = "L2_IIF_10_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -495,7 +495,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "L2_OIF_10_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -510,7 +510,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "L2_TUNNEL_SVP_15_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -525,7 +525,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "L3_IIF_13_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -540,7 +540,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "L3_OIF_1_13_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -552,7 +552,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -567,7 +567,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "NHOP_INDEX_1_14_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -579,7 +579,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "PARSER_VHLEN_0_15_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -594,37 +594,37 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "PKT_MISC_CTRL_0_3_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 408, 411 }, /* Profile 2. */
-            { 408, 411 }, /* Profile 3. */
-            { 408, 411 }, /* Profile 4. */
-            { 376, 379 }, /* Profile 5. */
-            { 376, 379 }, /* Profile 6. */
-            { 376, 379 }, /* Profile 7. */
+            { 404, 407 }, /* Profile 2. */
+            { 404, 407 }, /* Profile 3. */
+            { 404, 407 }, /* Profile 4. */
+            { 372, 375 }, /* Profile 5. */
+            { 372, 375 }, /* Profile 6. */
+            { 372, 375 }, /* Profile 7. */
         },
         .profile_cnt = 8,
     },
     {
         .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 416, 419 }, /* Profile 2. */
-            { 416, 419 }, /* Profile 3. */
-            { 416, 419 }, /* Profile 4. */
-            { 384, 387 }, /* Profile 5. */
-            { 384, 387 }, /* Profile 6. */
-            { 384, 387 }, /* Profile 7. */
+            { 392, 395 }, /* Profile 2. */
+            { 392, 395 }, /* Profile 3. */
+            { 392, 395 }, /* Profile 4. */
+            { 360, 363 }, /* Profile 5. */
+            { 360, 363 }, /* Profile 6. */
+            { 360, 363 }, /* Profile 7. */
         },
         .profile_cnt = 8,
     },
     {
         .name = "SYSTEM_DESTINATION_15_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -639,22 +639,22 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "SYSTEM_OPCODE_3_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 400, 403 }, /* Profile 2. */
-            { 400, 403 }, /* Profile 3. */
-            { 400, 403 }, /* Profile 4. */
-            { 368, 371 }, /* Profile 5. */
-            { 368, 371 }, /* Profile 6. */
-            { 368, 371 }, /* Profile 7. */
+            { 396, 399 }, /* Profile 2. */
+            { 396, 399 }, /* Profile 3. */
+            { 396, 399 }, /* Profile 4. */
+            { 364, 367 }, /* Profile 5. */
+            { 364, 367 }, /* Profile 6. */
+            { 364, 367 }, /* Profile 7. */
         },
         .profile_cnt = 8,
     },
     {
         .name = "SYSTEM_SOURCE_15_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -669,37 +669,37 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
     },
     {
         .name = "TAG_ACTION_CTRL_1_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 392, 393 }, /* Profile 2. */
-            { 392, 393 }, /* Profile 3. */
-            { 392, 393 }, /* Profile 4. */
-            { 360, 361 }, /* Profile 5. */
-            { 360, 361 }, /* Profile 6. */
-            { 360, 361 }, /* Profile 7. */
+            { 412, 413 }, /* Profile 2. */
+            { 412, 413 }, /* Profile 3. */
+            { 412, 413 }, /* Profile 4. */
+            { 380, 381 }, /* Profile 5. */
+            { 380, 381 }, /* Profile 6. */
+            { 380, 381 }, /* Profile 7. */
         },
         .profile_cnt = 8,
     },
     {
         .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 388, 391 }, /* Profile 2. */
-            { 388, 391 }, /* Profile 3. */
-            { 388, 391 }, /* Profile 4. */
-            { 356, 359 }, /* Profile 5. */
-            { 356, 359 }, /* Profile 6. */
-            { 356, 359 }, /* Profile 7. */
+            { 384, 387 }, /* Profile 2. */
+            { 384, 387 }, /* Profile 3. */
+            { 384, 387 }, /* Profile 4. */
+            { 352, 355 }, /* Profile 5. */
+            { 352, 355 }, /* Profile 6. */
+            { 352, 355 }, /* Profile 7. */
         },
         .profile_cnt = 8,
     },
     {
         .name = "VFI_15_0",
-        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .fid = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -712,20 +712,20 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data
         },
         .profile_cnt = 8,
     },
-};static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data,
+};static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_field_data,
 };
 
-static shr_enum_map_t bcm56890_a0_cna_6_5_29_rxpmd_flex_reason_names[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+static shr_enum_map_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reason_names[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_reasons_info_t bcm56890_a0_cna_6_5_29_rxpmd_flex_reasons_info = {
-    .num_reasons = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT,
-    .reason_names = bcm56890_a0_cna_6_5_29_rxpmd_flex_reason_names,
-    .reason_encode = bcm56890_a0_cna_6_5_29_rxpmd_flex_reason_encode,
-    .reason_decode = bcm56890_a0_cna_6_5_29_rxpmd_flex_reason_decode,
+static bcmpkt_flex_reasons_info_t bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reason_names,
+    .reason_encode = bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reason_decode,
 };
 
 
@@ -868,7 +868,7 @@ static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_arp_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_arp_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT] = {
     bcmpkt_arp_t_hardware_len_get,
     bcmpkt_arp_t_hardware_type_get,
     bcmpkt_arp_t_operation_get,
@@ -880,7 +880,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_arp_t_fget[BCM56890_A0_CNA_6_5_29
     bcmpkt_arp_t_target_ip_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_arp_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_arp_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT] = {
     bcmpkt_arp_t_hardware_len_set,
     bcmpkt_arp_t_hardware_type_set,
     bcmpkt_arp_t_operation_set,
@@ -892,13 +892,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_arp_t_fset[BCM56890_A0_CNA_6_5_29
     bcmpkt_arp_t_target_ip_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_arp_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_arp_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_arp_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_arp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_arp_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_arp_t_field_data,
 };
 
 
@@ -1014,7 +1014,7 @@ static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_cpu_composites_0_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
     bcmpkt_cpu_composites_0_t_dma_cont0_get,
     bcmpkt_cpu_composites_0_t_dma_cont1_get,
     bcmpkt_cpu_composites_0_t_dma_cont2_get,
@@ -1024,7 +1024,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_cpu_composites_0_t_fget[BCM56890_
     bcmpkt_cpu_composites_0_t_dma_cont6_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_cpu_composites_0_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
     bcmpkt_cpu_composites_0_t_dma_cont0_set,
     bcmpkt_cpu_composites_0_t_dma_cont1_set,
     bcmpkt_cpu_composites_0_t_dma_cont2_set,
@@ -1034,13 +1034,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_cpu_composites_0_t_fset[BCM56890_
     bcmpkt_cpu_composites_0_t_dma_cont6_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_cpu_composites_0_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_cpu_composites_0_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_cpu_composites_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_data,
 };
 
 
@@ -1220,7 +1220,7 @@ static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_cpu_composites_1_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
     bcmpkt_cpu_composites_1_t_dma_cont10_get,
     bcmpkt_cpu_composites_1_t_dma_cont11_get,
     bcmpkt_cpu_composites_1_t_dma_cont12_get,
@@ -1234,7 +1234,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_cpu_composites_1_t_fget[BCM56890_
     bcmpkt_cpu_composites_1_t_dma_cont9_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_cpu_composites_1_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
     bcmpkt_cpu_composites_1_t_dma_cont10_set,
     bcmpkt_cpu_composites_1_t_dma_cont11_set,
     bcmpkt_cpu_composites_1_t_dma_cont12_set,
@@ -1248,13 +1248,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_cpu_composites_1_t_fset[BCM56890_
     bcmpkt_cpu_composites_1_t_dma_cont9_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_cpu_composites_1_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_cpu_composites_1_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_cpu_composites_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_data,
 };
 
 
@@ -1440,7 +1440,7 @@ static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_ep_nih_header_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
     bcmpkt_ep_nih_header_t_header_subtype_get,
     bcmpkt_ep_nih_header_t_header_type_get,
     bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
@@ -1455,7 +1455,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_ep_nih_header_t_fget[BCM56890_A0_
     bcmpkt_ep_nih_header_t_timestamp_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_ep_nih_header_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
     bcmpkt_ep_nih_header_t_header_subtype_set,
     bcmpkt_ep_nih_header_t_header_type_set,
     bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
@@ -1470,13 +1470,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_ep_nih_header_t_fset[BCM56890_A0_
     bcmpkt_ep_nih_header_t_timestamp_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_ep_nih_header_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_ep_nih_header_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_ep_nih_header_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_field_data,
 };
 
 
@@ -1616,7 +1616,7 @@ static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
     bcmpkt_erspan3_fixed_hdr_t_bso_get,
     bcmpkt_erspan3_fixed_hdr_t_cos_get,
     bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
@@ -1628,7 +1628,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_fget[BCM56890
     bcmpkt_erspan3_fixed_hdr_t_vlan_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
     bcmpkt_erspan3_fixed_hdr_t_bso_set,
     bcmpkt_erspan3_fixed_hdr_t_cos_set,
     bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
@@ -1640,13 +1640,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_fset[BCM56890
     bcmpkt_erspan3_fixed_hdr_t_vlan_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_data,
 };
 
 
@@ -1711,27 +1711,27 @@ static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
     bcmpkt_erspan3_subhdr_5_t_platform_id_get,
     bcmpkt_erspan3_subhdr_5_t_port_id_get,
     bcmpkt_erspan3_subhdr_5_t_switch_id_get,
     bcmpkt_erspan3_subhdr_5_t_timestamp_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
     bcmpkt_erspan3_subhdr_5_t_platform_id_set,
     bcmpkt_erspan3_subhdr_5_t_port_id_set,
     bcmpkt_erspan3_subhdr_5_t_switch_id_set,
     bcmpkt_erspan3_subhdr_5_t_timestamp_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_data,
 };
 
 
@@ -1750,21 +1750,21 @@ static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_ethertype_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_ethertype_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
     bcmpkt_ethertype_t_type_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_ethertype_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_ethertype_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
     bcmpkt_ethertype_t_type_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_ethertype_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_ethertype_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_ethertype_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_ethertype_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_ethertype_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_ethertype_t_field_data,
 };
 
 
@@ -1993,7 +1993,7 @@ static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int prof
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_generic_loopback_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
     bcmpkt_generic_loopback_t_destination_obj_get,
     bcmpkt_generic_loopback_t_destination_type_get,
     bcmpkt_generic_loopback_t_entropy_obj_get,
@@ -2011,7 +2011,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_generic_loopback_t_fget[BCM56890_
     bcmpkt_generic_loopback_t_start_byte_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_generic_loopback_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
     bcmpkt_generic_loopback_t_destination_obj_set,
     bcmpkt_generic_loopback_t_destination_type_set,
     bcmpkt_generic_loopback_t_entropy_obj_set,
@@ -2029,13 +2029,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_generic_loopback_t_fset[BCM56890_
     bcmpkt_generic_loopback_t_start_byte_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_generic_loopback_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_generic_loopback_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_generic_loopback_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_field_data,
 };
 
 
@@ -2084,25 +2084,25 @@ static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_icmp_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_icmp_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT] = {
     bcmpkt_icmp_t_checksum_get,
     bcmpkt_icmp_t_code_get,
     bcmpkt_icmp_t_icmp_type_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_icmp_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_icmp_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT] = {
     bcmpkt_icmp_t_checksum_set,
     bcmpkt_icmp_t_code_set,
     bcmpkt_icmp_t_icmp_type_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_icmp_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_icmp_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_icmp_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_icmp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_icmp_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_icmp_t_field_data,
 };
 
 
@@ -2184,7 +2184,7 @@ static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_ipfix_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_ipfix_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT] = {
     bcmpkt_ipfix_t_export_time_get,
     bcmpkt_ipfix_t_length_get,
     bcmpkt_ipfix_t_obs_domain_id_get,
@@ -2192,7 +2192,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_ipfix_t_fget[BCM56890_A0_CNA_6_5_
     bcmpkt_ipfix_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_ipfix_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_ipfix_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT] = {
     bcmpkt_ipfix_t_export_time_set,
     bcmpkt_ipfix_t_length_set,
     bcmpkt_ipfix_t_obs_domain_id_set,
@@ -2200,13 +2200,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_ipfix_t_fset[BCM56890_A0_CNA_6_5_
     bcmpkt_ipfix_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_ipfix_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_ipfix_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_ipfix_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_ipfix_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_ipfix_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_ipfix_t_field_data,
 };
 
 
@@ -2378,7 +2378,7 @@ static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, ui
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_ipv4_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_ipv4_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT] = {
     bcmpkt_ipv4_t_da_get,
     bcmpkt_ipv4_t_flags_frag_offset_get,
     bcmpkt_ipv4_t_hdr_checksum_get,
@@ -2392,7 +2392,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_ipv4_t_fget[BCM56890_A0_CNA_6_5_2
     bcmpkt_ipv4_t_version_hdr_len_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_ipv4_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_ipv4_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT] = {
     bcmpkt_ipv4_t_da_set,
     bcmpkt_ipv4_t_flags_frag_offset_set,
     bcmpkt_ipv4_t_hdr_checksum_set,
@@ -2406,13 +2406,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_ipv4_t_fset[BCM56890_A0_CNA_6_5_2
     bcmpkt_ipv4_t_version_hdr_len_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_ipv4_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_ipv4_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_ipv4_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_ipv4_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_ipv4_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_ipv4_t_field_data,
 };
 
 
@@ -2538,7 +2538,7 @@ static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t v
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_ipv6_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_ipv6_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT] = {
     bcmpkt_ipv6_t_da_get,
     bcmpkt_ipv6_t_flow_label_get,
     bcmpkt_ipv6_t_hop_limit_get,
@@ -2549,7 +2549,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_ipv6_t_fget[BCM56890_A0_CNA_6_5_2
     bcmpkt_ipv6_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_ipv6_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_ipv6_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT] = {
     bcmpkt_ipv6_t_da_set,
     bcmpkt_ipv6_t_flow_label_set,
     bcmpkt_ipv6_t_hop_limit_set,
@@ -2560,13 +2560,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_ipv6_t_fset[BCM56890_A0_CNA_6_5_2
     bcmpkt_ipv6_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_ipv6_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_ipv6_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_ipv6_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_ipv6_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_ipv6_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_ipv6_t_field_data,
 };
 
 
@@ -2602,23 +2602,23 @@ static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_l2_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_l2_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT] = {
     bcmpkt_l2_t_macda_get,
     bcmpkt_l2_t_macsa_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_l2_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_l2_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT] = {
     bcmpkt_l2_t_macda_set,
     bcmpkt_l2_t_macsa_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_l2_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_l2_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_l2_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_l2_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_l2_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_l2_t_field_data,
 };
 
 
@@ -2638,21 +2638,21 @@ static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
     bcmpkt_mirror_erspan_sn_t_seq_num_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
     bcmpkt_mirror_erspan_sn_t_seq_num_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_data,
 };
 
 
@@ -2672,21 +2672,21 @@ static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, u
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_mirror_transport_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
     bcmpkt_mirror_transport_t_data_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_mirror_transport_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
     bcmpkt_mirror_transport_t_data_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_mirror_transport_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_mirror_transport_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_mirror_transport_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_field_data,
 };
 
 
@@ -2798,7 +2798,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, i
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
     bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
     bcmpkt_psamp_mirror_on_drop_0_t_length_get,
@@ -2808,7 +2808,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fget[BCM
     bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
     bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
     bcmpkt_psamp_mirror_on_drop_0_t_length_set,
@@ -2818,13 +2818,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fset[BCM
     bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_data,
 };
 
 
@@ -2918,7 +2918,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *d
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get,
     bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get,
     bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get,
@@ -2927,7 +2927,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fget[BCM
     bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set,
     bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set,
     bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set,
@@ -2936,13 +2936,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fset[BCM
     bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_data,
 };
 
 
@@ -3036,7 +3036,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set(uint32_t *d
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get,
     bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get,
     bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get,
@@ -3045,7 +3045,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fget[BCM
     bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set,
     bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set,
     bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set,
@@ -3054,13 +3054,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fset[BCM
     bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_data,
 };
 
 
@@ -3203,7 +3203,7 @@ static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_rarp_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_rarp_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT] = {
     bcmpkt_rarp_t_hardware_len_get,
     bcmpkt_rarp_t_hardware_type_get,
     bcmpkt_rarp_t_operation_get,
@@ -3215,7 +3215,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_rarp_t_fget[BCM56890_A0_CNA_6_5_2
     bcmpkt_rarp_t_target_ip_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_rarp_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_rarp_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT] = {
     bcmpkt_rarp_t_hardware_len_set,
     bcmpkt_rarp_t_hardware_type_set,
     bcmpkt_rarp_t_operation_set,
@@ -3227,13 +3227,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_rarp_t_fset[BCM56890_A0_CNA_6_5_2
     bcmpkt_rarp_t_target_ip_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rarp_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_rarp_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_rarp_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_rarp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_rarp_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_rarp_t_field_data,
 };
 
 
@@ -3267,23 +3267,23 @@ static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profil
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_first_4bytes_t_dst_port_get,
     bcmpkt_tcp_first_4bytes_t_src_port_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_first_4bytes_t_dst_port_set,
     bcmpkt_tcp_first_4bytes_t_src_port_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_data,
 };
 
 
@@ -3379,7 +3379,7 @@ static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profil
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_last_16bytes_t_ack_num_get,
     bcmpkt_tcp_last_16bytes_t_checksum_get,
     bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
@@ -3388,7 +3388,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_fget[BCM56890_
     bcmpkt_tcp_last_16bytes_t_win_size_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_last_16bytes_t_ack_num_set,
     bcmpkt_tcp_last_16bytes_t_checksum_set,
     bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
@@ -3397,13 +3397,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_fset[BCM56890_
     bcmpkt_tcp_last_16bytes_t_win_size_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_data,
 };
 
 
@@ -3467,27 +3467,27 @@ static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_udp_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_udp_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT] = {
     bcmpkt_udp_t_checksum_get,
     bcmpkt_udp_t_dst_port_get,
     bcmpkt_udp_t_src_port_get,
     bcmpkt_udp_t_udp_length_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_udp_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_udp_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT] = {
     bcmpkt_udp_t_checksum_set,
     bcmpkt_udp_t_dst_port_set,
     bcmpkt_udp_t_src_port_set,
     bcmpkt_udp_t_udp_length_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_udp_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_udp_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_udp_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_udp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_udp_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_udp_t_field_data,
 };
 
 
@@ -3523,23 +3523,23 @@ static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_unknown_l3_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
     bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
     bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_unknown_l3_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
     bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
     bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_unknown_l3_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_unknown_l3_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_unknown_l3_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_field_data,
 };
 
 
@@ -3559,21 +3559,21 @@ static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_unknown_l4_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
     bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_unknown_l4_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
     bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_unknown_l4_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_unknown_l4_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_unknown_l4_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_field_data,
 };
 
 
@@ -3623,25 +3623,25 @@ static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_unknown_l5_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
     bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
     bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
     bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_unknown_l5_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
     bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
     bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
     bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_unknown_l5_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_unknown_l5_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_unknown_l5_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_field_data,
 };
 
 
@@ -3705,27 +3705,27 @@ static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_vlan_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_vlan_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT] = {
     bcmpkt_vlan_t_cfi_get,
     bcmpkt_vlan_t_pcp_get,
     bcmpkt_vlan_t_tpid_get,
     bcmpkt_vlan_t_vid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_vlan_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_vlan_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT] = {
     bcmpkt_vlan_t_cfi_set,
     bcmpkt_vlan_t_pcp_set,
     bcmpkt_vlan_t_tpid_set,
     bcmpkt_vlan_t_vid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_vlan_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_vlan_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_vlan_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_vlan_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_vlan_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_vlan_t_field_data,
 };
 
 
@@ -3775,247 +3775,247 @@ static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_vxlan_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_30_2_0_vxlan_t_fget[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT] = {
     bcmpkt_vxlan_t_flags_reserved_1_get,
     bcmpkt_vxlan_t_reserved2_get,
     bcmpkt_vxlan_t_vn_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_vxlan_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_30_2_0_vxlan_t_fset[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT] = {
     bcmpkt_vxlan_t_flags_reserved_1_set,
     bcmpkt_vxlan_t_reserved2_set,
     bcmpkt_vxlan_t_vn_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_vxlan_t_field_data[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_30_2_0_vxlan_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_vxlan_t_field_info = {
-    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT,
-    .info = bcm56890_a0_cna_6_5_29_vxlan_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_30_2_0_vxlan_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_30_2_0_vxlan_t_field_data,
 };
 
-static bcmpkt_flex_pmd_info_t bcm56890_a0_cna_6_5_29_flexhdr_info_list[BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT] = {
+static bcmpkt_flex_pmd_info_t bcm56890_a0_cna_6_5_30_2_0_flexhdr_info_list[BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT] = {
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_arp_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_arp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_arp_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_arp_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_arp_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_arp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_cpu_composites_0_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_cpu_composites_0_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_cpu_composites_0_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_cpu_composites_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_cpu_composites_1_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_cpu_composites_1_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_cpu_composites_1_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_cpu_composites_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_ep_nih_header_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_ep_nih_header_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_ep_nih_header_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_ep_nih_header_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_erspan3_fixed_hdr_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_erspan3_subhdr_5_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_ethertype_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_ethertype_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_ethertype_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_ethertype_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_ethertype_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_ethertype_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_generic_loopback_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_generic_loopback_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_generic_loopback_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_generic_loopback_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_icmp_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_icmp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_icmp_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_icmp_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_icmp_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_icmp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_ipfix_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_ipfix_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_ipfix_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_ipfix_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_ipfix_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_ipfix_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_ipv4_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_ipv4_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_ipv4_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_ipv4_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_ipv4_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_ipv4_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_ipv6_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_ipv6_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_ipv6_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_ipv6_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_ipv6_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_ipv6_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_l2_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_l2_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_l2_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_l2_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_l2_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_l2_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_mirror_erspan_sn_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_mirror_transport_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_mirror_transport_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_mirror_transport_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_mirror_transport_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_psamp_mirror_on_drop_2_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_rarp_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_rarp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_rarp_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_rarp_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_rarp_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_rarp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_tcp_first_4bytes_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_tcp_last_16bytes_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_udp_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_udp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_udp_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_udp_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_udp_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_udp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_unknown_l3_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_unknown_l3_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_unknown_l3_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_unknown_l3_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_unknown_l4_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_unknown_l4_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_unknown_l4_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_unknown_l4_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_unknown_l5_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_unknown_l5_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_unknown_l5_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_unknown_l5_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_vlan_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_vlan_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_vlan_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_vlan_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_vlan_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_vlan_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_vxlan_t_field_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_vxlan_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_cna_6_5_29_vxlan_t_fget,
-        .flex_fset = bcm56890_a0_cna_6_5_29_vxlan_t_fset,
+        .flex_fget = bcm56890_a0_cna_6_5_30_2_0_vxlan_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_30_2_0_vxlan_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_cna_6_5_29_rxpmd_flex_field_info,
-        .reasons_info = &bcm56890_a0_cna_6_5_29_rxpmd_flex_reasons_info,
+        .field_info = &bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_field_info,
+        .reasons_info = &bcm56890_a0_cna_6_5_30_2_0_rxpmd_flex_reasons_info,
         .flex_common_fget = bcm56890_a0_rxpmd_flex_fget,
         .flex_common_fset = bcm56890_a0_rxpmd_flex_fset,
     },
 };
 
-static shr_enum_map_t bcm56890_a0_cna_6_5_29_flexhdr_id_map[] = {
-    BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_NAME_MAP_INIT
+static shr_enum_map_t bcm56890_a0_cna_6_5_30_2_0_flexhdr_id_map[] = {
+    BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
 };
 
-shr_enum_map_t * bcm56890_a0_cna_6_5_29_flexhdr_map_get(void)
+shr_enum_map_t * bcm56890_a0_cna_6_5_30_2_0_flexhdr_map_get(void)
 {
-    return bcm56890_a0_cna_6_5_29_flexhdr_id_map;
+    return bcm56890_a0_cna_6_5_30_2_0_flexhdr_id_map;
 }
 
-bcmpkt_flex_pmd_info_t * bcm56890_a0_cna_6_5_29_flex_pmd_info_get(uint32_t hid)
+bcmpkt_flex_pmd_info_t * bcm56890_a0_cna_6_5_30_2_0_flex_pmd_info_get(uint32_t hid)
 {
-    if (hid >= BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT) {
+    if (hid >= BCM56890_A0_CNA_6_5_30_2_0_BCMPKT_FLEXHDR_COUNT) {
         return NULL;
     }
 
-    return &bcm56890_a0_cna_6_5_29_flexhdr_info_list[hid];
+    return &bcm56890_a0_cna_6_5_30_2_0_flexhdr_info_list[hid];
 }
 
-int bcm56890_a0_cna_6_5_29_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+int bcm56890_a0_cna_6_5_30_2_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
     7,
     -1,
     -1,
     27,
-};
\ No newline at end of file
+};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_match_id.c
similarity index 78%
rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id.c
rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_match_id.c
index c4066744b1df..e15b2d476da5 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_match_id.c
@@ -2,12 +2,12 @@
  *
  * DO NOT EDIT THIS FILE!
  * This file is auto-generated by xfc_map_parser
- * from the NPL output file(s) bcm56890_a0_dna_6_5_29_1_2_sf_match_id_info.yml
- * for device bcm56890_a0 and variant dna_6_5_29_1_2.
+ * from the NPL output file(s) bcm56890_a0_dna_6_5_30_8_0_sf_match_id_info.yml
+ * for device bcm56890_a0 and variant dna_6_5_30_8_0.
  * Edits to this file will be lost when it is regenerated.
  *
  * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  * All Rights Reserved.$
  *
  * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
@@ -29,39 +29,39 @@
 
 
 #include <bcmpkt/bcmpkt_rxpmd_match_id.h>
-#include <bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id_defs.h>
+#include <bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_match_id_defs.h>
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] =
 {
     0x366c,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] =
 {
     0x78f0,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] =
 {
     0x1fffe,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] =
 {
     0xff00,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] =
 {
     0x1e4c8,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] =
 {
     0x4,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[39] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[39] =
 {
     0x10,
     0x400000,
@@ -104,7 +104,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x777f7,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[55] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[55] =
 {
     0x0,
     0x0,
@@ -163,7 +163,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0xeef0,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[57] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[57] =
 {
     0x0,
     0x0,
@@ -224,7 +224,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x80080200,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[42] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[42] =
 {
     0x0,
     0x0,
@@ -270,7 +270,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x1ddfdd,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[55] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[55] =
 {
     0x0,
     0x0,
@@ -329,7 +329,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0xeef0000,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[55] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[55] =
 {
     0x0,
     0x0,
@@ -388,7 +388,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x10000000,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[29] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[29] =
 {
     0x1e,
     0x400000,
@@ -421,7 +421,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x1bbbfb,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[45] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[45] =
 {
     0x0,
     0x0,
@@ -470,7 +470,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x777,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[56] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[56] =
 {
     0x0,
     0x0,
@@ -530,7 +530,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x1dd,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[48] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[48] =
 {
     0x0,
     0x0,
@@ -582,7 +582,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0xeef,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[56] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[56] =
 {
     0x0,
     0x0,
@@ -642,7 +642,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x1dde00,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[57] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[57] =
 {
     0x0,
     0x400000,
@@ -703,7 +703,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x2000008,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[48] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[48] =
 {
     0x0,
     0x0,
@@ -755,7 +755,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x15e000,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata[48] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base[48] =
 {
     0x0,
     0x0,
@@ -807,7 +807,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x110000,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[36] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[36] =
 {
     0x0,
     0x0,
@@ -847,7 +847,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x10000,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[36] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[36] =
 {
     0x18,
     0x400000,
@@ -887,7 +887,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x1000e,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[58] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[58] =
 {
     0x0,
     0x0,
@@ -949,7 +949,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0xe,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[58] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[58] =
 {
     0x0,
     0x0,
@@ -1011,7 +1011,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x2,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[51] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[51] =
 {
     0x0,
     0x0,
@@ -1066,7 +1066,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0xeefeef,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[57] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[57] =
 {
     0x0,
     0x0,
@@ -1127,7 +1127,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x3,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[29] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[29] =
 {
     0x0,
     0x0,
@@ -1160,7 +1160,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x80000,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[54] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[54] =
 {
     0x0,
     0x0,
@@ -1218,7 +1218,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x1ddfddf,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[57] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[57] =
 {
     0x0,
     0x0,
@@ -1279,7 +1279,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x3bbc,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[57] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[57] =
 {
     0x0,
     0x0,
@@ -1340,7 +1340,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x2c02c0b0,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[57] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[57] =
 {
     0x0,
     0x0,
@@ -1401,7 +1401,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x280280a0,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[58] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[58] =
 {
     0x0,
     0x0,
@@ -1463,7 +1463,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x6,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[29] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[29] =
 {
     0x0,
     0x0,
@@ -1496,7 +1496,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x100000,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[58] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[58] =
 {
     0x0,
     0x0,
@@ -1558,7 +1558,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x8,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[58] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[58] =
 {
     0x0,
     0x0,
@@ -1620,7 +1620,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0x4,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[58] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[58] =
 {
     0x0,
     0x0,
@@ -1682,7 +1682,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0xe,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[58] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[58] =
 {
     0x0,
     0x0,
@@ -1744,7 +1744,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr
     0xe,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[4] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[4] =
 {
     0x33033198,
     0xcc66066,
@@ -1752,7 +1752,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_cn
     0x6633033,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[4] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[4] =
 {
     0x44044220,
     0x11088088,
@@ -1760,7 +1760,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_gb
     0x8844044,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[4] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[4] =
 {
     0xffc00000,
     0xffffffff,
@@ -1768,7 +1768,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg
     0x7fffffff,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[4] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[4] =
 {
     0x0,
     0xfffff800,
@@ -1776,7 +1776,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg
     0x7ffffc00,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[4] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[4] =
 {
     0xf80f87c0,
     0x3e1f01f0,
@@ -1784,7 +1784,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_it
     0x1f0f80f8,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[4] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[4] =
 {
     0xfffffffe,
     0xffffffff,
@@ -1792,7 +1792,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2
     0x7fffffff,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[4] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[4] =
 {
     0x1ff800,
     0x7fe003ff,
@@ -1800,7 +1800,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_ot
     0x3ff001ff,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[4] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[4] =
 {
     0xa23a2510,
     0xe8944744,
@@ -1808,7 +1808,7 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_sn
     0x744a23a2,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_svtag[4] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_svtag[4] =
 {
     0x0,
     0x0,
@@ -1816,12 +1816,12 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_sv
     0x7fffffff,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] =
 {
     0x4,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[13] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[14] =
 {
     0x10,
     0x0,
@@ -1832,13 +1832,14 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0xf7fbef80,
-    0xfbfdf7fd,
-    0x7dfefbfe,
-    0xf7dfefbf,
+    0xf7c00000,
+    0xfbfefbfd,
+    0x7dff7dfe,
+    0xf7dfbeff,
+    0x7bef,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[34] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[35] =
 {
     0x0,
     0x0,
@@ -1849,77 +1850,79 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0x7bef00,
+    0xf7800000,
+    0x3d,
     0x0,
     0x0,
+    0xf7de0000,
     0x0,
-    0x1efbc,
     0x0,
     0x0,
-    0xf0000000,
-    0x7be,
+    0x3df7800,
     0x0,
     0x0,
-    0xfbc00000,
-    0x1e,
     0x0,
+    0xbef00000,
+    0x7,
     0x0,
-    0xc0000000,
-    0x1efb,
     0x0,
+    0xf0000000,
+    0x7be,
     0x0,
-    0xef000000,
-    0x7b,
+    0x0,
+    0xfbc00000,
+    0x1e,
     0x0,
     0x0,
     0x0,
-    0x7bef000,
+    0x1efbc00,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[39] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[40] =
 {
     0x0,
     0x0,
     0x0,
     0x40,
     0x0,
-    0x10,
+    0x80000,
     0x0,
     0x0,
-    0x4000,
-    0x40008000,
-    0x20004000,
-    0x10002000,
-    0x1000200,
-    0x1000200,
-    0x800100,
-    0x400080,
-    0x40008,
-    0x40008,
-    0x40004,
-    0x20004002,
     0x20000000,
+    0x40000000,
+    0x20002000,
+    0x10001000,
+    0x1000800,
+    0x1000080,
+    0x800080,
+    0x400040,
+    0x40020,
+    0x40002,
+    0x20002,
+    0x20010002,
+    0x1000,
+    0x8000000,
+    0x4000400,
+    0x2000200,
+    0x200100,
+    0x10,
+    0x40008,
+    0x20004,
+    0x20010002,
+    0x20001000,
     0x10001000,
     0x8000800,
     0x800400,
-    0x40,
-    0x100020,
-    0x80010,
-    0x80040008,
-    0x80004000,
-    0x40004000,
-    0x20002000,
-    0x2001000,
-    0x400100,
-    0x80008,
-    0x40004,
+    0x100040,
     0x20002,
-    0x10002001,
-    0x44444000,
-    0x44,
+    0x80010001,
+    0x40008000,
+    0x4000800,
+    0x11111000,
+    0x11,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[17] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[18] =
 {
     0x0,
     0x0,
@@ -1934,13 +1937,14 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0xf7dfefbe,
-    0xfbeff7df,
-    0xfdf7fbef,
-    0x3df7fbe,
+    0xf7df0000,
+    0xfbeffbef,
+    0xfdf7fdf7,
+    0xbfdf7efb,
+    0x1ef,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[35] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[36] =
 {
     0x0,
     0x0,
@@ -1951,35 +1955,36 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0xf7800000,
-    0x3d,
     0x0,
+    0x1efbc0,
     0x0,
-    0xf7de0000,
     0x0,
     0x0,
+    0x7bef,
     0x0,
-    0x3df7800,
     0x0,
+    0xbc000000,
+    0x1ef,
     0x0,
     0x0,
-    0xf7de0,
+    0x0,
+    0x3df78,
     0x0,
     0x0,
     0x0,
-    0xf7de000,
+    0x3df7800,
     0x0,
     0x0,
     0x0,
-    0x3df780,
+    0xf7de0,
     0x0,
     0x0,
     0x0,
-    0x78000000,
-    0x3df,
+    0xde000000,
+    0xf7,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[35] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[36] =
 {
     0x0,
     0x0,
@@ -1991,77 +1996,79 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0x40,
+    0x200000,
     0x0,
     0x0,
     0x0,
-    0x1,
+    0x8000,
     0x0,
-    0x4000000,
-    0x4000000,
     0x0,
+    0x200,
+    0x200,
     0x0,
     0x0,
-    0x100000,
     0x0,
+    0x40000,
     0x0,
     0x0,
-    0x10000000,
     0x0,
+    0x4000000,
     0x0,
     0x0,
-    0x400000,
     0x0,
+    0x100000,
     0x0,
     0x0,
     0x0,
-    0x400,
+    0x0,
+    0x100,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[39] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[40] =
 {
     0x1e,
     0x0,
     0x4,
     0xe0003df6,
-    0xe22fffff,
-    0x1f7d,
+    0xffffffff,
+    0xfbef117,
     0x0,
-    0x400,
-    0x3df600,
-    0xf7fbefe0,
-    0xfbfdf7fd,
-    0x7dfefbfe,
-    0xf7dfefbf,
-    0xf7dfefbe,
-    0xfbeff7df,
-    0xfdf7fbef,
-    0xffdf7fbe,
+    0x2000000,
+    0xfb000000,
+    0xf7f0001e,
+    0xfbfefbfd,
+    0x7dff7dfe,
+    0xf7dfbeff,
+    0xf7df7bef,
+    0xfbeffbef,
+    0xfdf7fdf7,
+    0xbfdf7efb,
+    0xbfdf7fef,
+    0xbfefbfef,
+    0xfbf7dfef,
+    0xffff7dfe,
+    0xbeffffff,
+    0xdf7fdf7f,
+    0xefbfefbf,
+    0xfefbf7df,
+    0xfc45ff7d,
     0x7fdf7fbe,
-    0xbfdf7fdf,
-    0xfbfdf7ef,
-    0xfbfffffe,
+    0xbfefbfdf,
+    0xfbf7dfef,
+    0xfbff7dfe,
     0x7dff7dfe,
     0xbeffbeff,
     0xfbefdf7f,
-    0xf117fdf7,
-    0xff7dfefb,
-    0xffbeff7d,
-    0xefdf7fbe,
-    0xeffdf7fb,
-    0xf7fdf7fb,
-    0xfbfefbfd,
-    0xefbf7dfe,
-    0xfdf7f7df,
-    0x7fbeffbe,
-    0xbfdf7fdf,
+    0xbf7dfdf7,
     0xdfefbfef,
-    0x7dfefbf7,
-    0xffffffef,
-    0x7ff,
+    0xeff7dff7,
+    0xf7fbeffb,
+    0xdf7fbefd,
+    0xfffffffb,
+    0x1ff,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[21] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[21] =
 {
     0x0,
     0x0,
@@ -2079,14 +2086,14 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0xf8000000,
-    0x7fdf7fbe,
-    0xbfdf7fdf,
-    0xfbfdf7ef,
-    0x1e,
+    0x0,
+    0xbfdf7c00,
+    0xbfefbfef,
+    0xfbf7dfef,
+    0xf7dfe,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[35] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[36] =
 {
     0x0,
     0x0,
@@ -2098,81 +2105,83 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0x3df780,
+    0xfbc00000,
+    0x1e,
     0x0,
     0x0,
+    0x7bef0000,
     0x0,
-    0xf7de,
     0x0,
     0x0,
     0x0,
     0x0,
     0x0,
     0x0,
-    0x7de00000,
-    0xf,
+    0xdf780000,
+    0x3,
     0x0,
     0x0,
-    0xe0000000,
-    0xf7d,
+    0x78000000,
+    0x3df,
     0x0,
     0x0,
-    0xf7800000,
-    0x3d,
+    0x7de00000,
+    0xf,
     0x0,
     0x0,
     0x0,
-    0x3df7800,
+    0xf7de00,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[37] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[38] =
 {
     0x0,
     0x0,
     0x0,
     0x180,
     0x0,
-    0x60,
+    0x300000,
     0x0,
     0x0,
-    0x18000,
-    0x80030000,
-    0xc0018001,
-    0x6000c000,
-    0x6000c00,
-    0x6000c00,
-    0x3000600,
-    0x1800300,
-    0x180030,
-    0x180030,
-    0x180018,
-    0xc001800c,
     0xc0000000,
+    0x80000000,
+    0xc000c001,
+    0x60006000,
+    0x6003000,
+    0x6000300,
+    0x3000300,
+    0x1800180,
+    0x1800c0,
+    0x18000c,
+    0xc000c,
+    0xc006000c,
+    0x6000,
+    0x30000000,
+    0x18001800,
+    0xc000c00,
+    0xc00600,
+    0x60,
+    0x180030,
+    0xc0018,
+    0xc006000c,
+    0xc0006000,
     0x60006000,
     0x30003000,
     0x3001800,
-    0x180,
-    0x6000c0,
-    0x300060,
-    0x180030,
-    0x18003,
-    0x80018003,
-    0xc000c001,
-    0xc006000,
-    0x1800600,
-    0x300030,
-    0x180018,
+    0x600180,
     0xc000c,
-    0x6000c006,
+    0x60006,
+    0x80030003,
+    0x18003001,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[21] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[22] =
 {
     0x0,
     0x0,
     0x0,
     0x80000000,
-    0x7fff,
+    0x3fffffff,
     0x0,
     0x0,
     0x0,
@@ -2188,16 +2197,17 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0x1fffe0,
+    0xfff00000,
+    0x7ffff,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[21] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[22] =
 {
     0x0,
     0x0,
     0x0,
     0x0,
-    0x1fe,
+    0x1fffe,
     0x0,
     0x0,
     0x0,
@@ -2213,16 +2223,17 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0x7f80,
+    0xffc00000,
+    0x3f,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[21] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[22] =
 {
     0x0,
     0x0,
     0x0,
     0x0,
-    0x1e3c,
+    0x1fe03fc,
     0x0,
     0x0,
     0x0,
@@ -2238,16 +2249,17 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0x78f00,
+    0x7f800000,
+    0x3fc0,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[21] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[22] =
 {
     0x0,
     0x0,
     0x0,
     0x0,
-    0x5568,
+    0x31999b30,
     0x0,
     0x0,
     0x0,
@@ -2263,16 +2275,17 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0x155a00,
+    0x66000000,
+    0x63333,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[21] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[22] =
 {
     0x0,
     0x0,
     0x0,
     0x0,
-    0x79b0,
+    0x3de1e3c0,
     0x0,
     0x0,
     0x0,
@@ -2288,10 +2301,11 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0x1e6c00,
+    0x78000000,
+    0x7bc3c,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[25] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[26] =
 {
     0x0,
     0x0,
@@ -2313,14 +2327,15 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0xfbe00000,
-    0x7dff7dfe,
-    0xbeffbeff,
-    0xfbefdf7f,
-    0x3df7,
+    0x0,
+    0xbef80000,
+    0xdf7fdf7f,
+    0xefbfefbf,
+    0xfefbf7df,
+    0xf7d,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[36] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[37] =
 {
     0x0,
     0x0,
@@ -2332,82 +2347,85 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0xfbc00000,
-    0x1e,
     0x0,
+    0xf7de0,
     0x0,
-    0x7bef0000,
     0x0,
+    0x80000000,
+    0x3df7,
     0x0,
-    0x78000000,
-    0x3df,
     0x0,
+    0x1efbc00,
     0x0,
     0x0,
-    0x7bef0,
     0x0,
     0x0,
+    0x1efbc,
     0x0,
-    0x7bef000,
     0x0,
     0x0,
+    0x1efbc00,
     0x0,
-    0x1efbc0,
     0x0,
     0x0,
+    0x7bef0,
     0x0,
-    0xbc000000,
-    0x1ef,
+    0x0,
+    0x0,
+    0xef000000,
+    0x7b,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[37] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[38] =
 {
     0x0,
     0x0,
     0x4,
     0x0,
-    0x8000,
+    0x40000000,
     0x0,
     0x0,
-    0x400,
+    0x2000000,
     0x0,
-    0x1000200,
-    0x800100,
-    0x4000a0,
-    0x40000,
-    0x40008,
-    0x80020004,
-    0x10002,
+    0x1000000,
+    0x800080,
+    0x500040,
+    0x20,
+    0x40002,
+    0x20002,
+    0x80014001,
+    0x8000000,
+    0x8001000,
+    0xa000800,
+    0x400,
+    0x40,
+    0x200000,
+    0x100010,
+    0xa0008,
+    0x40000004,
     0x20001000,
     0x10001000,
-    0x8001400,
-    0x800000,
-    0x800000,
+    0xa000800,
+    0x400,
+    0x800040,
     0x400040,
     0x280020,
     0x10,
-    0x80004001,
-    0x40004000,
-    0x28002000,
-    0x1000,
-    0x2000100,
-    0x1000100,
-    0xa00080,
-    0x40,
-    0x4,
-    0x10002000,
-    0x8001000,
-    0x4000a00,
-    0x400000,
+    0x1,
+    0x4000800,
+    0x2000400,
+    0x1000280,
+    0x100000,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[25] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[26] =
 {
     0x0,
     0x0,
     0x0,
     0x0,
-    0x22f0000,
+    0x80000000,
+    0x117,
     0x0,
     0x0,
     0x0,
@@ -2427,17 +2445,17 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0x1178000,
+    0x45e000,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata[25] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base[26] =
 {
     0x0,
     0x0,
     0x0,
     0x0,
-    0x2080000,
     0x0,
+    0x104,
     0x0,
     0x0,
     0x0,
@@ -2456,79 +2474,81 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0x1040000,
+    0x0,
+    0x410000,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[10] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[10] =
 {
     0x0,
     0x0,
     0x0,
     0x20000000,
-    0x20000000,
     0x0,
+    0x1000,
     0x0,
     0x0,
     0x0,
-    0x20,
+    0x100000,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[37] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[38] =
 {
     0x0,
     0x0,
     0x0,
     0x100,
     0x0,
-    0x40,
+    0x200000,
     0x0,
     0x0,
-    0x10000,
-    0x20000,
-    0x80010001,
-    0x40008000,
-    0x4000800,
-    0x4000800,
-    0x2000400,
-    0x1000200,
-    0x100020,
-    0x100020,
-    0x100010,
-    0x80010008,
     0x80000000,
+    0x0,
+    0x80008001,
+    0x40004000,
+    0x4002000,
+    0x4000200,
+    0x2000200,
+    0x1000100,
+    0x100080,
+    0x100008,
+    0x80008,
+    0x80040008,
+    0x4000,
+    0x20000000,
+    0x10001000,
+    0x8000800,
+    0x800400,
+    0x40,
+    0x100020,
+    0x80010,
+    0x80040008,
+    0x80004000,
     0x40004000,
     0x20002000,
     0x2001000,
-    0x100,
-    0x400080,
-    0x200040,
-    0x100020,
-    0x10002,
-    0x10002,
-    0x80008001,
-    0x8004000,
-    0x1000400,
-    0x200020,
-    0x100010,
+    0x400100,
     0x80008,
-    0x40008004,
+    0x40004,
+    0x20002,
+    0x10002001,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[10] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[10] =
 {
     0x18,
     0x0,
     0x4,
     0xe0003df6,
-    0xe22fffff,
-    0x1f7d,
+    0xffffffff,
+    0xfbef117,
     0x0,
-    0x400,
-    0x3df600,
-    0x20,
+    0x2000000,
+    0xfb000000,
+    0x10001e,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[38] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[39] =
 {
     0x0,
     0x0,
@@ -2539,38 +2559,39 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0xf7fbefc0,
-    0xfbfdf7fd,
-    0x7dfefbfe,
-    0xf7dfefbf,
-    0xf7dfefbe,
-    0xfbeff7df,
-    0xfdf7fbef,
-    0xffdf7fbe,
+    0xf7e00000,
+    0xfbfefbfd,
+    0x7dff7dfe,
+    0xf7dfbeff,
+    0xf7df7bef,
+    0xfbeffbef,
+    0xfdf7fdf7,
+    0xbfdf7efb,
+    0xbfdf7fef,
+    0xbfefbfef,
+    0xfbf7dfef,
+    0xffff7dfe,
+    0xbeffffff,
+    0xdf7fdf7f,
+    0xefbfefbf,
+    0xfefbf7df,
+    0xfc45ff7d,
     0x7fdf7fbe,
-    0xbfdf7fdf,
-    0xfbfdf7ef,
-    0xfbfffffe,
+    0xbfefbfdf,
+    0xfbf7dfef,
+    0xfbff7dfe,
     0x7dff7dfe,
     0xbeffbeff,
     0xfbefdf7f,
-    0xf117fdf7,
-    0xff7dfefb,
-    0xffbeff7d,
-    0xefdf7fbe,
-    0xeffdf7fb,
-    0xf7fdf7fb,
-    0xfbfefbfd,
-    0xefbf7dfe,
-    0xfdf7f7df,
-    0x7fbeffbe,
-    0xbfdf7fdf,
+    0xbf7dfdf7,
     0xdfefbfef,
-    0x7dfefbf7,
-    0xf,
+    0xeff7dff7,
+    0xf7fbeffb,
+    0xdf7fbefd,
+    0x3,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[39] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[40] =
 {
     0x0,
     0x0,
@@ -2609,11 +2630,12 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0xffffffe0,
-    0xff,
+    0x0,
+    0xfffffff8,
+    0x3f,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[39] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[40] =
 {
     0x0,
     0x0,
@@ -2652,11 +2674,12 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0xffffffc0,
-    0xf,
+    0x0,
+    0xfffffff0,
+    0x3,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[38] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[39] =
 {
     0x0,
     0x0,
@@ -2695,10 +2718,11 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0xffffff80,
+    0x0,
+    0x3fffffe0,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[38] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[39] =
 {
     0x0,
     0x0,
@@ -2737,10 +2761,11 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0xfffff00,
+    0x0,
+    0x3ffffc0,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[38] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[39] =
 {
     0x0,
     0x0,
@@ -2779,10 +2804,11 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0xfffe00,
+    0x0,
+    0x3fff80,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[38] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[39] =
 {
     0x0,
     0x0,
@@ -2821,10 +2847,11 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0xffc00,
+    0x0,
+    0x3ff00,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[38] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[39] =
 {
     0x0,
     0x0,
@@ -2863,10 +2890,11 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0xf800,
+    0x0,
+    0x3e00,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[39] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[40] =
 {
     0x0,
     0x0,
@@ -2905,11 +2933,12 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0x66666000,
-    0x66,
+    0x0,
+    0x99999800,
+    0x19,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[39] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[40] =
 {
     0x0,
     0x0,
@@ -2948,54 +2977,56 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0x88888000,
-    0x88,
+    0x0,
+    0x22222000,
+    0x22,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[39] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[40] =
 {
     0x0,
     0x0,
     0x0,
     0x400,
     0x0,
-    0x100,
+    0x800000,
+    0x0,
     0x0,
     0x0,
-    0x40000,
-    0x80000,
-    0x40004,
-    0x20002,
-    0x10002001,
-    0x10002000,
-    0x8001000,
-    0x4000800,
-    0x400080,
-    0x400080,
-    0x400040,
-    0x40020,
     0x2,
+    0x20004,
+    0x10002,
+    0x10008001,
+    0x10000800,
+    0x8000800,
+    0x4000400,
+    0x400200,
+    0x400020,
+    0x200020,
+    0x100020,
+    0x10002,
+    0x80000000,
+    0x40004000,
+    0x20002000,
+    0x2001000,
+    0x100,
+    0x400080,
+    0x200040,
+    0x100020,
+    0x10002,
     0x10002,
     0x80008001,
     0x8004000,
-    0x400,
-    0x1000200,
-    0x800100,
-    0x400080,
-    0x40008,
-    0x40008,
-    0x20004,
-    0x20010002,
-    0x4001000,
-    0x800080,
-    0x400040,
+    0x1000400,
     0x200020,
-    0x20010,
-    0x1,
-    0x100,
+    0x100010,
+    0x80008,
+    0x40008004,
+    0x0,
+    0x40,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[29] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[30] =
 {
     0x0,
     0x0,
@@ -3021,14 +3052,15 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0xe0000000,
-    0xff7dfefb,
-    0xffbeff7d,
-    0xefdf7fbe,
-    0x3df7fb,
+    0x0,
+    0xf8000000,
+    0x7fdf7fbe,
+    0xbfefbfdf,
+    0xfbf7dfef,
+    0xf7dfe,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[36] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[37] =
 {
     0x0,
     0x0,
@@ -3041,34 +3073,35 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0x1efbc0,
-    0x0,
+    0x7de00000,
+    0xf,
     0x0,
     0x0,
-    0x7bef,
+    0x3df78000,
     0x0,
     0x0,
-    0x3df7800,
+    0xbc000000,
+    0x1ef,
     0x0,
     0x0,
     0x0,
-    0xbef00000,
-    0x7,
+    0xefbc0000,
+    0x1,
     0x0,
     0x0,
-    0xf0000000,
-    0x7be,
+    0xbc000000,
+    0x1ef,
     0x0,
     0x0,
-    0xfbc00000,
-    0x1e,
+    0xbef00000,
+    0x7,
     0x0,
     0x0,
     0x0,
-    0x1efbc00,
+    0x7bef00,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[39] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[40] =
 {
     0x0,
     0x0,
@@ -3108,10 +3141,11 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0x200,
+    0x0,
+    0x80,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[33] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[34] =
 {
     0x0,
     0x0,
@@ -3141,14 +3175,15 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0xef800000,
-    0xf7fdf7fb,
-    0xfbfefbfd,
-    0xefbf7dfe,
-    0xf7df,
+    0x0,
+    0xfbe00000,
+    0x7dff7dfe,
+    0xbeffbeff,
+    0xfbefdf7f,
+    0x3df7,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[37] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[38] =
 {
     0x0,
     0x0,
@@ -3161,35 +3196,36 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0x7de00000,
-    0xf,
     0x0,
+    0x7bef0,
     0x0,
-    0x3df78000,
+    0x0,
+    0xc0000000,
+    0x1efb,
     0x0,
     0x0,
-    0xbc000000,
-    0x1ef,
+    0xf7de00,
     0x0,
     0x0,
     0x0,
-    0x3df78,
     0x0,
+    0xf7de,
     0x0,
     0x0,
-    0x3df7800,
     0x0,
+    0xf7de00,
     0x0,
     0x0,
-    0xf7de0,
+    0x0,
+    0x3df78,
     0x0,
     0x0,
     0x0,
-    0xde000000,
-    0xf7,
+    0xf7800000,
+    0x3d,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1[33] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1[34] =
 {
     0x0,
     0x0,
@@ -3223,134 +3259,138 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0x3df70000,
+    0x0,
+    0xf7dc000,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[37] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[38] =
 {
     0x0,
     0x0,
     0x0,
     0x16,
-    0x800e0000,
-    0x5,
+    0x0,
+    0x2c007,
     0x0,
     0x0,
-    0x1600,
-    0x16002c00,
-    0xb001600,
-    0x5800b00,
-    0x5800b0,
-    0x5800b0,
-    0x2c0058,
-    0xc016002c,
-    0xc0016002,
-    0x60016002,
-    0xb0016001,
-    0xb001600,
     0xb000000,
+    0x16000000,
+    0xb000b00,
+    0x5800580,
+    0x5802c0,
+    0x58002c,
+    0x2c002c,
+    0x160016,
+    0xb001600b,
+    0xb0016000,
+    0xb000b000,
+    0xb005800,
+    0x580,
+    0x2c00000,
+    0x1600160,
+    0xb000b0,
+    0x800b0058,
+    0xc001c005,
+    0x60016002,
+    0xb000b001,
+    0xb005800,
+    0xb000580,
     0x5800580,
     0x2c002c0,
     0x2c0160,
-    0x70016,
-    0x8005800b,
-    0xc002c005,
-    0x2c016002,
-    0x2c001600,
-    0x16001600,
-    0xb000b00,
-    0xb00580,
-    0xc0160058,
-    0x6002c002,
-    0xb0016001,
+    0xb0058016,
     0x5800b000,
-    0x5800b00,
+    0x2c005800,
+    0x16002c00,
+    0x16002c0,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[37] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[38] =
 {
     0x0,
     0x0,
     0x0,
     0x14,
-    0xc0000,
-    0x5,
+    0x0,
+    0x28006,
     0x0,
     0x0,
-    0x1400,
-    0x14002800,
-    0xa001400,
-    0x5000a00,
-    0x5000a0,
-    0x5000a0,
-    0x280050,
-    0x80140028,
-    0x80014002,
-    0x40014002,
-    0xa0014001,
-    0xa001400,
     0xa000000,
+    0x14000000,
+    0xa000a00,
+    0x5000500,
+    0x500280,
+    0x500028,
+    0x280028,
+    0x140014,
+    0xa001400a,
+    0xa0014000,
+    0xa000a000,
+    0xa005000,
+    0x500,
+    0x2800000,
+    0x1400140,
+    0xa000a0,
+    0xa0050,
+    0x80018005,
+    0x40014002,
+    0xa000a001,
+    0xa005000,
+    0xa000500,
     0x5000500,
     0x2800280,
     0x280140,
-    0x60014,
-    0x5000a,
-    0x80028005,
-    0x28014002,
-    0x28001400,
-    0x14001400,
-    0xa000a00,
-    0xa00500,
-    0x80140050,
-    0x40028002,
-    0xa0014001,
+    0xa0050014,
     0x5000a000,
-    0x5000a00,
+    0x28005000,
+    0x14002800,
+    0x1400280,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[38] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[39] =
 {
     0x0,
     0x0,
     0x0,
     0x1de0,
-    0x2200000,
-    0x778,
-    0x0,
-    0x0,
-    0x1de000,
-    0xe03bc000,
-    0xf01de01d,
-    0x780ef00e,
-    0x7780ef07,
-    0x7780ef00,
-    0x3bc07780,
-    0x1de03bc0,
-    0x1de03bc,
+    0x0,
+    0x3bc0110,
+    0x0,
+    0x0,
+    0xf0000000,
+    0xe000000e,
+    0xf00ef01d,
+    0x7807780e,
+    0x7783bc07,
+    0x77803bc0,
+    0x3bc03bc0,
+    0x1de01de0,
+    0x1de0ef0,
+    0x1de00ef,
+    0xef00ef,
+    0xf07780ef,
+    0x7780e,
+    0xbc000000,
+    0xde01de03,
+    0xef00ef01,
+    0xef07780,
+    0x440778,
     0x1de03bc,
-    0x1de01de,
-    0xf01de0ef,
-    0xf000000e,
+    0xef01de,
+    0xf07780ef,
+    0xf007780e,
     0x7807780e,
     0xbc03bc07,
     0x3bc1de03,
-    0x1101de0,
-    0x7780ef0,
-    0x3bc0778,
-    0xc1de03bc,
-    0xc01de03b,
-    0xe01de03b,
-    0xf00ef01d,
-    0xef07780e,
-    0x1de07780,
-    0x3bc03bc,
-    0x1de01de,
+    0x7781de0,
     0x80ef00ef,
-    0x780ef077,
-    0x7,
+    0xc0778077,
+    0xe03bc03b,
+    0xde03bc1d,
+    0x1,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[39] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[40] =
 {
     0x0,
     0x0,
@@ -3390,147 +3430,150 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0x400,
+    0x0,
+    0x100,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[38] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[39] =
 {
     0x0,
     0x0,
     0x0,
     0x2000,
     0x0,
-    0x800,
+    0x4000000,
+    0x0,
     0x0,
     0x0,
-    0x200000,
-    0x400000,
-    0x200020,
-    0x100010,
-    0x80010008,
-    0x80010000,
-    0x40008000,
-    0x20004000,
-    0x2000400,
-    0x2000400,
-    0x2000200,
-    0x200100,
     0x10,
+    0x100020,
     0x80010,
-    0x40008,
-    0x40020004,
-    0x2000,
-    0x8001000,
-    0x4000800,
+    0x80040008,
+    0x80004000,
+    0x40004000,
+    0x20002000,
+    0x2001000,
+    0x2000100,
+    0x1000100,
+    0x800100,
+    0x80010,
+    0x0,
+    0x20004,
+    0x10002,
+    0x10008001,
+    0x800,
     0x2000400,
-    0x200040,
-    0x200040,
-    0x100020,
+    0x1000200,
+    0x800100,
     0x80010,
-    0x20008001,
-    0x4000400,
-    0x2000200,
+    0x80010,
+    0x40008,
+    0x40020004,
+    0x8002000,
     0x1000100,
-    0x100080,
-    0x8,
+    0x800080,
+    0x400040,
+    0x40020,
+    0x2,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[38] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[38] =
 {
     0x0,
     0x0,
     0x0,
     0x810,
     0x0,
-    0x204,
+    0x1020000,
     0x0,
     0x0,
-    0x81000,
-    0x10102000,
-    0x8081008,
-    0x4040804,
-    0x20404082,
-    0x20404080,
-    0x10202040,
-    0x8101020,
-    0x810102,
+    0x8000000,
+    0x10000004,
+    0x8040808,
+    0x4020404,
+    0x20410202,
+    0x20401020,
+    0x10201020,
+    0x8100810,
+    0x80810408,
+    0x80810040,
+    0x80408040,
+    0x8204040,
+    0x20404,
+    0x2000000,
+    0x81008101,
+    0x40804080,
+    0x4082040,
+    0x204,
     0x810102,
-    0x80810081,
-    0x8081040,
-    0x8000004,
+    0x80408081,
+    0x8204040,
+    0x8020404,
     0x4020404,
     0x2010202,
     0x10208101,
-    0x810,
-    0x2040408,
-    0x1020204,
-    0x20810102,
-    0x20081010,
-    0x10081010,
-    0x8040808,
-    0x40820404,
-    0x8102040,
-    0x1020102,
-    0x80810081,
+    0x82040810,
     0x40408040,
-    0x4040820,
-    0x2,
+    0x20204020,
+    0x10102010,
+    0x81010208,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[38] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[39] =
 {
     0x0,
     0x0,
     0x0,
     0x1000,
     0x0,
-    0x400,
+    0x2000000,
+    0x0,
     0x0,
     0x0,
-    0x100000,
-    0x200000,
-    0x100010,
-    0x80008,
-    0x40008004,
-    0x40008000,
-    0x20004000,
-    0x10002000,
-    0x1000200,
-    0x1000200,
-    0x1000100,
-    0x100080,
     0x8,
+    0x80010,
+    0x40008,
+    0x40020004,
+    0x40002000,
+    0x20002000,
+    0x10001000,
+    0x1000800,
+    0x1000080,
+    0x800080,
+    0x400080,
+    0x40008,
+    0x0,
+    0x10002,
+    0x80008001,
+    0x8004000,
+    0x400,
+    0x1000200,
+    0x800100,
+    0x400080,
+    0x40008,
     0x40008,
     0x20004,
     0x20010002,
-    0x1000,
-    0x4000800,
-    0x2000400,
-    0x1000200,
-    0x100020,
-    0x100020,
-    0x80010,
-    0x80040008,
-    0x10004000,
-    0x2000200,
-    0x1000100,
+    0x4001000,
     0x800080,
-    0x80040,
-    0x4,
+    0x400040,
+    0x200020,
+    0x20010,
+    0x1,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[38] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[39] =
 {
     0x0,
     0x0,
     0x0,
     0x0,
     0x0,
-    0x1000,
+    0x8000000,
     0x0,
-    0x400,
-    0x3df600,
-    0x20,
+    0x2000000,
+    0xfb000000,
+    0x10001e,
     0x0,
     0x0,
     0x0,
@@ -3554,14 +3597,15 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0x7fbef800,
-    0xbfdf7fdf,
-    0xdfefbfef,
-    0x7dfefbf7,
-    0xf,
+    0x0,
+    0xdfefbe00,
+    0xeff7dff7,
+    0xf7fbeffb,
+    0xdf7fbefd,
+    0x3,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[38] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[39] =
 {
     0x0,
     0x0,
@@ -3575,49 +3619,50 @@ static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr
     0x0,
     0x0,
     0x0,
-    0xf7de0000,
     0x0,
+    0x7bef,
     0x0,
     0x0,
-    0x3df7800,
+    0xbc000000,
+    0x1ef,
     0x0,
     0x0,
-    0xfbc00000,
-    0x1e,
+    0xf7de0,
     0x0,
     0x0,
-    0x80000000,
-    0x3df7,
     0x0,
+    0xe0000000,
+    0xf7d,
     0x0,
     0x0,
-    0x3df780,
     0x0,
+    0xf7de0,
     0x0,
     0x0,
-    0xf7de,
+    0x80000000,
+    0x3df7,
     0x0,
     0x0,
     0x0,
-    0x7de00000,
-    0xf,
+    0xdf780000,
+    0x3,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] =
 {
     0x4,
 };
 
-static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] =
+static uint32_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] =
 {
     0x8,
 };
 
 
 static bcmpkt_rxpmd_match_id_db_t
-bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_COUNT] = {
+bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_COUNT] = {
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_CNTAG",
         .match        = 0x100,
         .match_mask   = 0x180,
@@ -3631,7 +3676,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */
         .name         = "EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM",
         .match        = 0x80,
         .match_mask   = 0x180,
@@ -3645,7 +3690,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */
         .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -3659,7 +3704,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */
         .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0",
         .match        = 0x10,
         .match_mask   = 0x10,
@@ -3673,7 +3718,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
         .match        = 0x40,
         .match_mask   = 0x40,
@@ -3687,7 +3732,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
         .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -3701,7 +3746,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
         .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x1ff,
@@ -3715,7 +3760,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
         .match        = 0x20,
         .match_mask   = 0x20,
@@ -3729,7 +3774,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
         .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -3743,7 +3788,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */
         .name         = "EGRESS_PKT_FWD_L2_HDR_SVTAG",
         .match        = 0x8,
         .match_mask   = 0x8,
@@ -3757,7 +3802,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
         .match        = 0x4000,
         .match_mask   = 0x3c000,
@@ -3771,7 +3816,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x24000,
         .match_mask   = 0x3c000,
@@ -3785,7 +3830,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
         .match        = 0x140,
         .match_mask   = 0x7c0,
@@ -3799,7 +3844,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
         .match        = 0x3000,
         .match_mask   = 0x3800,
@@ -3813,7 +3858,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1",
         .match        = 0x2c000,
         .match_mask   = 0x3c000,
@@ -3827,7 +3872,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2",
         .match        = 0x200,
         .match_mask   = 0x7c0,
@@ -3841,7 +3886,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
         .match        = 0x40,
         .match_mask   = 0x7c0,
@@ -3855,7 +3900,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -3869,7 +3914,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
         .match        = 0x30000,
         .match_mask   = 0x3c000,
@@ -3883,7 +3928,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x240,
         .match_mask   = 0x7c0,
@@ -3897,7 +3942,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
         .match        = 0x30,
         .match_mask   = 0x438,
@@ -3911,7 +3956,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
         .match        = 0x18,
         .match_mask   = 0x418,
@@ -3925,7 +3970,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
         .match        = 0x80,
         .match_mask   = 0x7c0,
@@ -3939,7 +3984,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
         .match        = 0x1800,
         .match_mask   = 0x3800,
@@ -3953,7 +3998,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
         .match        = 0x10000,
         .match_mask   = 0x3c000,
@@ -3967,7 +4012,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
         .match        = 0x38,
         .match_mask   = 0x438,
@@ -3981,7 +4026,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1",
         .match        = 0x8000,
         .match_mask   = 0x3c000,
@@ -3995,7 +4040,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2",
         .match        = 0xc0,
         .match_mask   = 0x7c0,
@@ -4009,7 +4054,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
         .match        = 0x800,
         .match_mask   = 0x3818,
@@ -4023,7 +4068,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER",
         .match        = 0x2c0,
         .match_mask   = 0x7c0,
@@ -4037,8 +4082,8 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */
-        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA",
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE",
         .match        = 0xc000,
         .match_mask   = 0x3c000,
         .match_maxbit = 55,
@@ -4051,7 +4096,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
         .match        = 0x100,
         .match_mask   = 0x7c0,
@@ -4065,7 +4110,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E",
         .match        = 0x1000,
         .match_mask   = 0x3800,
@@ -4079,7 +4124,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
         .match        = 0x2,
         .match_mask   = 0x406,
@@ -4093,7 +4138,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
         .match        = 0x4,
         .match_mask   = 0x406,
@@ -4107,7 +4152,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
         .match        = 0x400,
         .match_mask   = 0x400,
@@ -4121,7 +4166,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
         .match        = 0x402,
         .match_mask   = 0x402,
@@ -4135,7 +4180,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
         .match        = 0x404,
         .match_mask   = 0x404,
@@ -4149,7 +4194,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
         .match        = 0x408,
         .match_mask   = 0x408,
@@ -4163,7 +4208,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
         .match        = 0x410,
         .match_mask   = 0x410,
@@ -4177,7 +4222,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
         .match        = 0x420,
         .match_mask   = 0x420,
@@ -4191,7 +4236,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
         .match        = 0x440,
         .match_mask   = 0x440,
@@ -4205,7 +4250,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
         .match        = 0x480,
         .match_mask   = 0x480,
@@ -4219,7 +4264,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
         .match        = 0x500,
         .match_mask   = 0x500,
@@ -4233,7 +4278,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3ffff,
@@ -4247,7 +4292,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
         .match        = 0x2800,
         .match_mask   = 0x3800,
@@ -4261,7 +4306,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1",
         .match        = 0x34000,
         .match_mask   = 0x3c000,
@@ -4275,7 +4320,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2",
         .match        = 0x280,
         .match_mask   = 0x7c0,
@@ -4289,7 +4334,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
         .match        = 0x14000,
         .match_mask   = 0x3c000,
@@ -4303,7 +4348,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1",
         .match        = 0x20000,
         .match_mask   = 0x3c000,
@@ -4317,7 +4362,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2",
         .match        = 0x1c0,
         .match_mask   = 0x7c0,
@@ -4331,7 +4376,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1",
         .match        = 0x18000,
         .match_mask   = 0x3c000,
@@ -4345,7 +4390,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x8,
         .match_mask   = 0x418,
@@ -4359,7 +4404,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x28,
         .match_mask   = 0x438,
@@ -4373,7 +4418,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
         .match        = 0x10,
         .match_mask   = 0x418,
@@ -4387,7 +4432,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x1c000,
         .match_mask   = 0x3c000,
@@ -4401,7 +4446,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x2000,
         .match_mask   = 0x3800,
@@ -4415,7 +4460,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x3800,
         .match_mask   = 0x3800,
@@ -4429,7 +4474,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
         .match        = 0x810,
         .match_mask   = 0x3c18,
@@ -4443,7 +4488,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1",
         .match        = 0x28000,
         .match_mask   = 0x3c000,
@@ -4457,7 +4502,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */
         .name         = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2",
         .match        = 0x180,
         .match_mask   = 0x7c0,
@@ -4471,7 +4516,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
         .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
         .match        = 0x2,
         .match_mask   = 0x3,
@@ -4485,7 +4530,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
         .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
         .match        = 0x1,
         .match_mask   = 0x3,
@@ -4499,7 +4544,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
         .name         = "EGRESS_PKT_SYS_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3,
@@ -4513,7 +4558,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_CNTAG",
         .match        = 0x100,
         .match_mask   = 0x180,
@@ -4527,7 +4572,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM",
         .match        = 0x80,
         .match_mask   = 0x180,
@@ -4541,7 +4586,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -4555,7 +4600,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0",
         .match        = 0x10,
         .match_mask   = 0x10,
@@ -4569,7 +4614,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
         .match        = 0x40,
         .match_mask   = 0x40,
@@ -4583,7 +4628,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -4597,7 +4642,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x1ff,
@@ -4611,7 +4656,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
         .match        = 0x20,
         .match_mask   = 0x20,
@@ -4625,7 +4670,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -4639,7 +4684,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */
         .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG",
         .match        = 0x8,
         .match_mask   = 0x8,
@@ -4653,7 +4698,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
         .match        = 0x4000,
         .match_mask   = 0x3c000,
@@ -4667,7 +4712,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x24000,
         .match_mask   = 0x3c000,
@@ -4681,7 +4726,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
         .match        = 0x140,
         .match_mask   = 0x7c0,
@@ -4695,7 +4740,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
         .match        = 0x3000,
         .match_mask   = 0x3800,
@@ -4709,7 +4754,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1",
         .match        = 0x2c000,
         .match_mask   = 0x3c000,
@@ -4723,7 +4768,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2",
         .match        = 0x200,
         .match_mask   = 0x7c0,
@@ -4737,7 +4782,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
         .match        = 0x40,
         .match_mask   = 0x7c0,
@@ -4751,7 +4796,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -4765,7 +4810,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
         .match        = 0x30000,
         .match_mask   = 0x3c000,
@@ -4779,7 +4824,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x240,
         .match_mask   = 0x7c0,
@@ -4793,7 +4838,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
         .match        = 0x30,
         .match_mask   = 0x438,
@@ -4807,7 +4852,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
         .match        = 0x18,
         .match_mask   = 0x418,
@@ -4821,7 +4866,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
         .match        = 0x80,
         .match_mask   = 0x7c0,
@@ -4835,7 +4880,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
         .match        = 0x1800,
         .match_mask   = 0x3800,
@@ -4849,7 +4894,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
         .match        = 0x10000,
         .match_mask   = 0x3c000,
@@ -4863,7 +4908,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
         .match        = 0x38,
         .match_mask   = 0x438,
@@ -4877,7 +4922,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1",
         .match        = 0x8000,
         .match_mask   = 0x3c000,
@@ -4891,7 +4936,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2",
         .match        = 0xc0,
         .match_mask   = 0x7c0,
@@ -4905,7 +4950,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
         .match        = 0x800,
         .match_mask   = 0x3818,
@@ -4919,7 +4964,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER",
         .match        = 0x2c0,
         .match_mask   = 0x7c0,
@@ -4933,8 +4978,8 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */
-        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA",
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE",
         .match        = 0xc000,
         .match_mask   = 0x3c000,
         .match_maxbit = 28,
@@ -4947,7 +4992,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
         .match        = 0x100,
         .match_mask   = 0x7c0,
@@ -4961,7 +5006,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E",
         .match        = 0x1000,
         .match_mask   = 0x3800,
@@ -4975,7 +5020,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
         .match        = 0x2,
         .match_mask   = 0x406,
@@ -4989,7 +5034,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
         .match        = 0x4,
         .match_mask   = 0x406,
@@ -5003,7 +5048,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
         .match        = 0x400,
         .match_mask   = 0x400,
@@ -5017,7 +5062,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
         .match        = 0x402,
         .match_mask   = 0x402,
@@ -5031,7 +5076,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
         .match        = 0x404,
         .match_mask   = 0x404,
@@ -5045,7 +5090,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
         .match        = 0x408,
         .match_mask   = 0x408,
@@ -5059,7 +5104,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
         .match        = 0x410,
         .match_mask   = 0x410,
@@ -5073,7 +5118,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
         .match        = 0x420,
         .match_mask   = 0x420,
@@ -5087,7 +5132,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
         .match        = 0x440,
         .match_mask   = 0x440,
@@ -5101,7 +5146,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
         .match        = 0x480,
         .match_mask   = 0x480,
@@ -5115,7 +5160,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
         .match        = 0x500,
         .match_mask   = 0x500,
@@ -5129,7 +5174,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3ffff,
@@ -5143,7 +5188,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
         .match        = 0x2800,
         .match_mask   = 0x3800,
@@ -5157,7 +5202,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1",
         .match        = 0x34000,
         .match_mask   = 0x3c000,
@@ -5171,7 +5216,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2",
         .match        = 0x280,
         .match_mask   = 0x7c0,
@@ -5185,7 +5230,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
         .match        = 0x14000,
         .match_mask   = 0x3c000,
@@ -5199,7 +5244,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1",
         .match        = 0x20000,
         .match_mask   = 0x3c000,
@@ -5213,7 +5258,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2",
         .match        = 0x1c0,
         .match_mask   = 0x7c0,
@@ -5227,7 +5272,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1",
         .match        = 0x18000,
         .match_mask   = 0x3c000,
@@ -5241,7 +5286,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x8,
         .match_mask   = 0x418,
@@ -5255,7 +5300,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x28,
         .match_mask   = 0x438,
@@ -5269,7 +5314,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
         .match        = 0x10,
         .match_mask   = 0x418,
@@ -5283,7 +5328,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x1c000,
         .match_mask   = 0x3c000,
@@ -5297,7 +5342,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x2000,
         .match_mask   = 0x3800,
@@ -5311,7 +5356,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x3800,
         .match_mask   = 0x3800,
@@ -5325,7 +5370,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
         .match        = 0x810,
         .match_mask   = 0x3c18,
@@ -5339,7 +5384,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1",
         .match        = 0x28000,
         .match_mask   = 0x3c000,
@@ -5353,7 +5398,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */
         .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2",
         .match        = 0x180,
         .match_mask   = 0x7c0,
@@ -5367,7 +5412,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_CNTAG",
         .match        = 0x100,
         .match_mask   = 0x180,
@@ -5381,11 +5426,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 20,
         .arc_id_mask  = 0x1f00000,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
         .match        = 0x40,
         .match_mask   = 0x40,
@@ -5399,11 +5444,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 20,
         .arc_id_mask  = 0x1f00000,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
         .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -5417,11 +5462,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 20,
         .arc_id_mask  = 0x1f00000,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
         .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x1ff,
@@ -5437,7 +5482,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
         .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
         .match        = 0x20,
         .match_mask   = 0x20,
@@ -5451,11 +5496,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 20,
         .arc_id_mask  = 0x1f00000,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
         .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -5469,11 +5514,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 20,
         .arc_id_mask  = 0x1f00000,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
         .match        = 0x4000,
         .match_mask   = 0x3c000,
@@ -5487,11 +5532,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x24000,
         .match_mask   = 0x3c000,
@@ -5505,11 +5550,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
         .match        = 0x140,
         .match_mask   = 0x7c0,
@@ -5523,11 +5568,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 55,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
         .match        = 0x3000,
         .match_mask   = 0x3800,
@@ -5541,11 +5586,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 57,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1",
         .match        = 0x2c000,
         .match_mask   = 0x3c000,
@@ -5559,11 +5604,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 42,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2",
         .match        = 0x200,
         .match_mask   = 0x7c0,
@@ -5577,11 +5622,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 55,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
         .match        = 0x40,
         .match_mask   = 0x7c0,
@@ -5595,11 +5640,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 55,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -5613,11 +5658,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 29,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
         .match        = 0x30000,
         .match_mask   = 0x3c000,
@@ -5631,11 +5676,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 45,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x240,
         .match_mask   = 0x7c0,
@@ -5649,11 +5694,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 56,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1",
         .match        = 0x8000,
         .match_mask   = 0x3c000,
@@ -5667,11 +5712,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 48,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2",
         .match        = 0xc0,
         .match_mask   = 0x7c0,
@@ -5685,11 +5730,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 56,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
         .match        = 0x800,
         .match_mask   = 0x3818,
@@ -5703,11 +5748,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 57,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER",
         .match        = 0x2c0,
         .match_mask   = 0x7c0,
@@ -5721,12 +5766,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 48,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */
-        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA",
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE",
         .match        = 0xc000,
         .match_mask   = 0x3c000,
         .match_maxbit = 55,
@@ -5739,11 +5784,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 48,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
         .match        = 0x100,
         .match_mask   = 0x7c0,
@@ -5757,11 +5802,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 36,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
         .match        = 0x2,
         .match_mask   = 0x406,
@@ -5775,11 +5820,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 36,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
         .match        = 0x4,
         .match_mask   = 0x406,
@@ -5793,11 +5838,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 58,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3ffff,
@@ -5813,7 +5858,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
         .match        = 0x2800,
         .match_mask   = 0x3800,
@@ -5827,11 +5872,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 58,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1",
         .match        = 0x34000,
         .match_mask   = 0x3c000,
@@ -5845,11 +5890,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 51,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2",
         .match        = 0x280,
         .match_mask   = 0x7c0,
@@ -5863,11 +5908,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 57,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
         .match        = 0x14000,
         .match_mask   = 0x3c000,
@@ -5881,11 +5926,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 29,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1",
         .match        = 0x20000,
         .match_mask   = 0x3c000,
@@ -5899,11 +5944,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 54,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2",
         .match        = 0x1c0,
         .match_mask   = 0x7c0,
@@ -5917,11 +5962,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 57,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x8,
         .match_mask   = 0x418,
@@ -5935,11 +5980,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 57,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x28,
         .match_mask   = 0x438,
@@ -5953,11 +5998,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 57,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
         .match        = 0x10,
         .match_mask   = 0x418,
@@ -5971,11 +6016,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 58,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x1c000,
         .match_mask   = 0x3c000,
@@ -5989,11 +6034,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 29,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x2000,
         .match_mask   = 0x3800,
@@ -6007,11 +6052,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 58,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x3800,
         .match_mask   = 0x3800,
@@ -6025,11 +6070,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 58,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1",
         .match        = 0x28000,
         .match_mask   = 0x3c000,
@@ -6043,11 +6088,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 58,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */
         .name         = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2",
         .match        = 0x180,
         .match_mask   = 0x7c0,
@@ -6061,11 +6106,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 25,
         .arc_id_mask  = 0xffe000000,
         .num_zone_bmp_words = 58,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_CNTAG",
         .match        = 0x100,
         .match_mask   = 0x180,
@@ -6079,11 +6124,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 2,
         .arc_id_mask  = 0x1fc,
         .num_zone_bmp_words = 4,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM",
         .match        = 0x80,
         .match_mask   = 0x180,
@@ -6097,11 +6142,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 2,
         .arc_id_mask  = 0x1fc,
         .num_zone_bmp_words = 4,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -6115,11 +6160,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 2,
         .arc_id_mask  = 0x1fc,
         .num_zone_bmp_words = 4,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0",
         .match        = 0x10,
         .match_mask   = 0x10,
@@ -6133,11 +6178,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 2,
         .arc_id_mask  = 0x1fc,
         .num_zone_bmp_words = 4,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
         .match        = 0x40,
         .match_mask   = 0x40,
@@ -6151,11 +6196,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 2,
         .arc_id_mask  = 0x1fc,
         .num_zone_bmp_words = 4,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
         .match        = 0x2,
         .match_mask   = 0x2,
@@ -6169,11 +6214,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 2,
         .arc_id_mask  = 0x1fc,
         .num_zone_bmp_words = 4,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x1ff,
@@ -6189,7 +6234,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
         .match        = 0x20,
         .match_mask   = 0x20,
@@ -6203,11 +6248,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 2,
         .arc_id_mask  = 0x1fc,
         .num_zone_bmp_words = 4,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
         .match        = 0x4,
         .match_mask   = 0x4,
@@ -6221,11 +6266,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 2,
         .arc_id_mask  = 0x1fc,
         .num_zone_bmp_words = 4,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */
         .name         = "INGRESS_PKT_OUTER_L2_HDR_SVTAG",
         .match        = 0x8,
         .match_mask   = 0x8,
@@ -6239,11 +6284,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 2,
         .arc_id_mask  = 0x1fc,
         .num_zone_bmp_words = 4,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_svtag,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_svtag,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
         .match        = 0x4000,
         .match_mask   = 0x3c000,
@@ -6257,11 +6302,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
         .match        = 0x24000,
         .match_mask   = 0x3c000,
@@ -6274,12 +6319,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 13,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1,
+        .num_zone_bmp_words = 14,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
         .match        = 0x140,
         .match_mask   = 0x7c0,
@@ -6292,12 +6337,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 34,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2,
+        .num_zone_bmp_words = 35,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
         .match        = 0x3000,
         .match_mask   = 0x3800,
@@ -6310,12 +6355,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd,
+        .num_zone_bmp_words = 40,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1",
         .match        = 0x2c000,
         .match_mask   = 0x3c000,
@@ -6328,12 +6373,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 17,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1,
+        .num_zone_bmp_words = 18,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2",
         .match        = 0x200,
         .match_mask   = 0x7c0,
@@ -6346,12 +6391,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 35,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
         .match        = 0x40,
         .match_mask   = 0x7c0,
@@ -6364,12 +6409,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 35,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
         .match        = 0x1,
         .match_mask   = 0x1,
@@ -6382,12 +6427,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype,
+        .num_zone_bmp_words = 40,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
         .match        = 0x30000,
         .match_mask   = 0x3c000,
@@ -6401,11 +6446,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
         .num_zone_bmp_words = 21,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
         .match        = 0x240,
         .match_mask   = 0x7c0,
@@ -6418,12 +6463,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 35,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
         .match        = 0x30,
         .match_mask   = 0x438,
@@ -6436,12 +6481,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 37,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
         .match        = 0x18,
         .match_mask   = 0x418,
@@ -6454,12 +6499,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 21,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre,
+        .num_zone_bmp_words = 22,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
         .match        = 0x80,
         .match_mask   = 0x7c0,
@@ -6472,12 +6517,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 21,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum,
+        .num_zone_bmp_words = 22,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
         .match        = 0x1800,
         .match_mask   = 0x3800,
@@ -6490,12 +6535,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 21,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key,
+        .num_zone_bmp_words = 22,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
         .match        = 0x10000,
         .match_mask   = 0x3c000,
@@ -6508,12 +6553,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 21,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout,
+        .num_zone_bmp_words = 22,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
         .match        = 0x38,
         .match_mask   = 0x438,
@@ -6526,12 +6571,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 21,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq,
+        .num_zone_bmp_words = 22,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1",
         .match        = 0x8000,
         .match_mask   = 0x3c000,
@@ -6544,12 +6589,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 25,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1,
+        .num_zone_bmp_words = 26,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2",
         .match        = 0xc0,
         .match_mask   = 0x7c0,
@@ -6562,12 +6607,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 36,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
         .match        = 0x800,
         .match_mask   = 0x3818,
@@ -6580,12 +6625,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 37,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER",
         .match        = 0x2c0,
         .match_mask   = 0x7c0,
@@ -6598,13 +6643,13 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 25,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header,
+        .num_zone_bmp_words = 26,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */
-        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA",
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE",
         .match        = 0xc000,
         .match_mask   = 0x3c000,
         .match_maxbit = 28,
@@ -6616,12 +6661,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 25,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata,
+        .num_zone_bmp_words = 26,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
         .match        = 0x100,
         .match_mask   = 0x7c0,
@@ -6635,11 +6680,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
         .num_zone_bmp_words = 10,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E",
         .match        = 0x1000,
         .match_mask   = 0x3800,
@@ -6652,12 +6697,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 37,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
         .match        = 0x2,
         .match_mask   = 0x406,
@@ -6671,11 +6716,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
         .num_zone_bmp_words = 10,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
         .match        = 0x4,
         .match_mask   = 0x406,
@@ -6688,12 +6733,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
         .match        = 0x400,
         .match_mask   = 0x400,
@@ -6706,12 +6751,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0,
+        .num_zone_bmp_words = 40,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
         .match        = 0x402,
         .match_mask   = 0x402,
@@ -6724,12 +6769,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1,
+        .num_zone_bmp_words = 40,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
         .match        = 0x404,
         .match_mask   = 0x404,
@@ -6742,12 +6787,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
         .match        = 0x408,
         .match_mask   = 0x408,
@@ -6760,12 +6805,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
         .match        = 0x410,
         .match_mask   = 0x410,
@@ -6778,12 +6823,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
         .match        = 0x420,
         .match_mask   = 0x420,
@@ -6796,12 +6841,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
         .match        = 0x440,
         .match_mask   = 0x440,
@@ -6814,12 +6859,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
         .match        = 0x480,
         .match_mask   = 0x480,
@@ -6832,12 +6877,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach,
+        .num_zone_bmp_words = 40,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
         .match        = 0x500,
         .match_mask   = 0x500,
@@ -6850,12 +6895,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw,
+        .num_zone_bmp_words = 40,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3ffff,
@@ -6871,7 +6916,7 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
         .match        = 0x2800,
         .match_mask   = 0x3800,
@@ -6884,12 +6929,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588,
+        .num_zone_bmp_words = 40,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1",
         .match        = 0x34000,
         .match_mask   = 0x3c000,
@@ -6902,12 +6947,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 29,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1,
+        .num_zone_bmp_words = 30,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2",
         .match        = 0x280,
         .match_mask   = 0x7c0,
@@ -6920,12 +6965,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 36,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
         .match        = 0x14000,
         .match_mask   = 0x3c000,
@@ -6938,12 +6983,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp,
+        .num_zone_bmp_words = 40,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1",
         .match        = 0x20000,
         .match_mask   = 0x3c000,
@@ -6956,12 +7001,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 33,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1,
+        .num_zone_bmp_words = 34,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2",
         .match        = 0x1c0,
         .match_mask   = 0x7c0,
@@ -6974,12 +7019,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 37,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1",
         .match        = 0x18000,
         .match_mask   = 0x3c000,
@@ -6992,12 +7037,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 33,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1,
+        .num_zone_bmp_words = 34,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
         .match        = 0x8,
         .match_mask   = 0x418,
@@ -7010,12 +7055,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 37,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
         .match        = 0x28,
         .match_mask   = 0x438,
@@ -7028,12 +7073,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 37,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
         .match        = 0x10,
         .match_mask   = 0x418,
@@ -7046,12 +7091,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
         .match        = 0x1c000,
         .match_mask   = 0x3c000,
@@ -7064,12 +7109,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 39,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3,
+        .num_zone_bmp_words = 40,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
         .match        = 0x2000,
         .match_mask   = 0x3800,
@@ -7082,12 +7127,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
         .match        = 0x3800,
         .match_mask   = 0x3800,
@@ -7101,11 +7146,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
         .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
         .match        = 0x810,
         .match_mask   = 0x3c18,
@@ -7118,12 +7163,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1",
         .match        = 0x28000,
         .match_mask   = 0x3c000,
@@ -7136,12 +7181,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */
         .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2",
         .match        = 0x180,
         .match_mask   = 0x7c0,
@@ -7154,12 +7199,12 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .pminbit      = 11,
         .zone_minbit  = 9,
         .arc_id_mask  = 0xffe00,
-        .num_zone_bmp_words = 38,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
         .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
         .match        = 0x2,
         .match_mask   = 0x3,
@@ -7173,11 +7218,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 0,
         .arc_id_mask  = 0x3,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
         .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
         .match        = 0x1,
         .match_mask   = 0x3,
@@ -7191,11 +7236,11 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
         .zone_minbit  = 0,
         .arc_id_mask  = 0x3,
         .num_zone_bmp_words = 1,
-        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_sys_hdr_loopback,
+        .zone_bmp = bcm56890_a0_dna_6_5_30_8_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback,
 
     },
     {
-        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        /* BCM56890_A0_DNA_6_5_30_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
         .name         = "INGRESS_PKT_SYS_HDR_NONE",
         .match        = 0x0,
         .match_mask   = 0x3,
@@ -7212,23 +7257,23 @@ bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MA
     },
 };
 
-static bcmpkt_rxpmd_match_id_db_info_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db_info = {
+static bcmpkt_rxpmd_match_id_db_info_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db_info = {
     .num_entries = 228,
-    .db = bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db
+    .db = bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db
 };
-bcmpkt_rxpmd_match_id_db_info_t * bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db_info_get(void) {
-    return &bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db_info;
+bcmpkt_rxpmd_match_id_db_info_t * bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db_info_get(void) {
+    return &bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_db_info;
 }
 
-static shr_enum_map_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_map[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+static shr_enum_map_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_map[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_rxpmd_match_id_map_info_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_map_info = {
+static bcmpkt_rxpmd_match_id_map_info_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_map_info = {
     .num_entries = 228,
-    .map = bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_map
+    .map = bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_map
 };
 
-bcmpkt_rxpmd_match_id_map_info_t * bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_map_info_get(void) {
-    return &bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_map_info;
+bcmpkt_rxpmd_match_id_map_info_t * bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_map_info_get(void) {
+    return &bcm56890_a0_dna_6_5_30_8_0_rxpmd_match_id_map_info;
 }
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_pkt_flexhdr.c
similarity index 79%
rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_pkt_flexhdr.c
rename to platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_pkt_flexhdr.c
index 6a9ef87e6e4f..f969be32b491 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_pkt_flexhdr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_pkt_flexhdr.c
@@ -3,11 +3,11 @@
  * DO NOT EDIT THIS FILE!
  * This file is auto-generated by xfc_map_parser
  * from the NPL output file(s) map.yml
- * for device bcm56890_a0 and variant dna_6_5_29_1_2.
+ * for device bcm56890_a0 and variant dna_6_5_30_8_0.
  * Edits to this file will be lost when it is regenerated.
  *
  * $Id: $
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  * All Rights Reserved.$
  *
  * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
@@ -31,321 +31,321 @@
 #include <shr/shr_error.h>
 #include <bcmpkt/bcmpkt_flexhdr.h>
 #include <bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h>
-#include <bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr.h>
-#include <bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr_data.h>
-#include <bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_flex_data.h>
+#include <bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56890_a0/dna_6_5_30_8_0/bcm56890_a0_dna_6_5_30_8_0_bcmpkt_rxpmd_flex_data.h>
 
 #define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
 #define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
 #define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
 #define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
 
-static void bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+static void bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
 {
     uint32_t *reason = data + 0;
 
     if (reason[13] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
     }
     if (reason[13] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
     }
     if (reason[13] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
     }
     if (reason[13] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS);
     }
     if (reason[13] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
     }
     if (reason[13] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
     }
     if (reason[13] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
     }
     if (reason[13] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD);
     }
     if (reason[13] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
     }
     if (reason[13] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
     }
     if (reason[13] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
     }
     if (reason[13] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
     }
     if (reason[13] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
     }
     if (reason[13] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
     }
     if (reason[13] & (0x1 << 14)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
     }
     if (reason[13] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
     }
     if (reason[13] & (0x1 << 16)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
     }
     if (reason[13] & (0x1 << 17)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_VFP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
     }
     if (reason[13] & (0x1 << 18)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
     }
     if (reason[13] & (0x1 << 19)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
     }
     if (reason[13] & (0x1 << 20)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
     }
     if (reason[13] & (0x1 << 21)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SVP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
     }
     if (reason[13] & (0x1 << 22)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
     }
     if (reason[13] & (0x1 << 23)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
     }
     if (reason[13] & (0x1 << 24)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
     }
     if (reason[13] & (0x1 << 25)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
     }
     if (reason[13] & (0x1 << 26)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
     }
     if (reason[13] & (0x1 << 27)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
     }
     if (reason[13] & (0x1 << 28)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
     }
     if (reason[13] & (0x1 << 29)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
     }
     if (reason[13] & (0x1 << 30)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
     }
     if (reason[13] & (0x1 << 31)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
     }
     if (reason[12] & (0x1 << 0)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
     }
     if (reason[12] & (0x1 << 1)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
     }
     if (reason[12] & (0x1 << 2)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
     }
     if (reason[12] & (0x1 << 3)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
     }
     if (reason[12] & (0x1 << 4)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
     }
     if (reason[12] & (0x1 << 5)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
     }
     if (reason[12] & (0x1 << 6)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
     }
     if (reason[12] & (0x1 << 7)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
     }
     if (reason[12] & (0x1 << 8)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DEFAULT);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT);
     }
     if (reason[12] & (0x1 << 9)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED);
     }
     if (reason[12] & (0x1 << 10)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED);
     }
     if (reason[12] & (0x1 << 11)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SRV6);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SRV6);
     }
     if (reason[12] & (0x1 << 12)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR);
     }
     if (reason[12] & (0x1 << 13)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU);
     }
     if (reason[12] & (0x1 << 14)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE);
     }
     if (reason[12] & (0x1 << 15)) {
-        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
     }
 }
 
-static void bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+static void bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
 {
     uint32_t *reason = data + 0;
 
     reason[13] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
         reason[13] |= (0x1 << 0);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
         reason[13] |= (0x1 << 1);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
         reason[13] |= (0x1 << 2);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS)) {
         reason[13] |= (0x1 << 3);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
         reason[13] |= (0x1 << 4);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
         reason[13] |= (0x1 << 5);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
         reason[13] |= (0x1 << 6);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) {
         reason[13] |= (0x1 << 7);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
         reason[13] |= (0x1 << 8);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
         reason[13] |= (0x1 << 9);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
         reason[13] |= (0x1 << 10);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
         reason[13] |= (0x1 << 11);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
         reason[13] |= (0x1 << 12);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
         reason[13] |= (0x1 << 13);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
         reason[13] |= (0x1 << 14);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
         reason[13] |= (0x1 << 15);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
         reason[13] |= (0x1 << 16);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
         reason[13] |= (0x1 << 17);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
         reason[13] |= (0x1 << 18);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
         reason[13] |= (0x1 << 19);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
         reason[13] |= (0x1 << 20);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
         reason[13] |= (0x1 << 21);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
         reason[13] |= (0x1 << 22);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
         reason[13] |= (0x1 << 23);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
         reason[13] |= (0x1 << 24);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
         reason[13] |= (0x1 << 25);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
         reason[13] |= (0x1 << 26);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
         reason[13] |= (0x1 << 27);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
         reason[13] |= (0x1 << 28);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
         reason[13] |= (0x1 << 29);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
         reason[13] |= (0x1 << 30);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
         reason[13] |= (0x1 << 31);
     }
     reason[12] = 0;
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
         reason[12] |= (0x1 << 0);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
         reason[12] |= (0x1 << 1);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
         reason[12] |= (0x1 << 2);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
         reason[12] |= (0x1 << 3);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
         reason[12] |= (0x1 << 4);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
         reason[12] |= (0x1 << 5);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
         reason[12] |= (0x1 << 6);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
         reason[12] |= (0x1 << 7);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DEFAULT)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT)) {
         reason[12] |= (0x1 << 8);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) {
         reason[12] |= (0x1 << 9);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) {
         reason[12] |= (0x1 << 10);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SRV6)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_SRV6)) {
         reason[12] |= (0x1 << 11);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) {
         reason[12] |= (0x1 << 12);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) {
         reason[12] |= (0x1 << 13);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) {
         reason[12] |= (0x1 << 14);
     }
-    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
         reason[12] |= (0x1 << 15);
     }
 }
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_data[] = {
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_data[] = {
     {
         .name = "BSCAN_CONTROL_DATA_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_DATA_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_DATA_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -410,7 +410,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "BSCAN_CONTROL_FLAGS_3_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_FLAGS_3_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_FLAGS_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -475,7 +475,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "DLB_ECMP_DESTINATION_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -540,7 +540,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "DNAT_CTRL_3_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -604,7 +604,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "DROP_CODE_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -669,137 +669,137 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "DVP_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 128, 143 }, /* Profile 2. */
-            { 128, 143 }, /* Profile 3. */
-            { 128, 143 }, /* Profile 4. */
-            { 128, 143 }, /* Profile 5. */
-            { 128, 143 }, /* Profile 6. */
-            { 128, 143 }, /* Profile 7. */
-            { 128, 143 }, /* Profile 8. */
-            { 128, 143 }, /* Profile 9. */
-            { 128, 143 }, /* Profile 10. */
-            { 128, 143 }, /* Profile 11. */
-            { 128, 143 }, /* Profile 12. */
-            { 128, 143 }, /* Profile 13. */
-            { 128, 143 }, /* Profile 14. */
-            { 128, 143 }, /* Profile 15. */
-            { 128, 143 }, /* Profile 16. */
-            { 128, 143 }, /* Profile 17. */
-            { 128, 143 }, /* Profile 18. */
-            { 128, 143 }, /* Profile 19. */
-            { 128, 143 }, /* Profile 20. */
-            { 128, 143 }, /* Profile 21. */
-            { 128, 143 }, /* Profile 22. */
-            { 128, 143 }, /* Profile 23. */
-            { 128, 143 }, /* Profile 24. */
-            { 128, 143 }, /* Profile 25. */
-            { 128, 143 }, /* Profile 26. */
-            { 128, 143 }, /* Profile 27. */
-            { 128, 143 }, /* Profile 28. */
-            { 128, 143 }, /* Profile 29. */
-            { 128, 143 }, /* Profile 30. */
-            { 128, 143 }, /* Profile 31. */
-            { 128, 143 }, /* Profile 32. */
-            { 128, 143 }, /* Profile 33. */
-            { 128, 143 }, /* Profile 34. */
-            { 128, 143 }, /* Profile 35. */
-            { 128, 143 }, /* Profile 36. */
-            { 128, 143 }, /* Profile 37. */
-            { 128, 143 }, /* Profile 38. */
-            { 128, 143 }, /* Profile 39. */
-            { 128, 143 }, /* Profile 40. */
-            { 128, 143 }, /* Profile 41. */
-            { 128, 143 }, /* Profile 42. */
-            { 128, 143 }, /* Profile 43. */
-            { 128, 143 }, /* Profile 44. */
-            { 128, 143 }, /* Profile 45. */
-            { 128, 143 }, /* Profile 46. */
-            { 128, 143 }, /* Profile 47. */
-            { 128, 143 }, /* Profile 48. */
-            { 128, 143 }, /* Profile 49. */
-            { 128, 143 }, /* Profile 50. */
-            { 128, 143 }, /* Profile 51. */
-            { 128, 143 }, /* Profile 52. */
-            { 128, 143 }, /* Profile 53. */
-            { 128, 143 }, /* Profile 54. */
-            { 128, 143 }, /* Profile 55. */
-            { 128, 143 }, /* Profile 56. */
-            { 128, 143 }, /* Profile 57. */
+            { 160, 175 }, /* Profile 2. */
+            { 160, 175 }, /* Profile 3. */
+            { 160, 175 }, /* Profile 4. */
+            { 160, 175 }, /* Profile 5. */
+            { 160, 175 }, /* Profile 6. */
+            { 160, 175 }, /* Profile 7. */
+            { 160, 175 }, /* Profile 8. */
+            { 160, 175 }, /* Profile 9. */
+            { 160, 175 }, /* Profile 10. */
+            { 160, 175 }, /* Profile 11. */
+            { 160, 175 }, /* Profile 12. */
+            { 160, 175 }, /* Profile 13. */
+            { 160, 175 }, /* Profile 14. */
+            { 160, 175 }, /* Profile 15. */
+            { 160, 175 }, /* Profile 16. */
+            { 160, 175 }, /* Profile 17. */
+            { 160, 175 }, /* Profile 18. */
+            { 160, 175 }, /* Profile 19. */
+            { 160, 175 }, /* Profile 20. */
+            { 160, 175 }, /* Profile 21. */
+            { 160, 175 }, /* Profile 22. */
+            { 160, 175 }, /* Profile 23. */
+            { 160, 175 }, /* Profile 24. */
+            { 160, 175 }, /* Profile 25. */
+            { 160, 175 }, /* Profile 26. */
+            { 160, 175 }, /* Profile 27. */
+            { 160, 175 }, /* Profile 28. */
+            { 160, 175 }, /* Profile 29. */
+            { 160, 175 }, /* Profile 30. */
+            { 160, 175 }, /* Profile 31. */
+            { 160, 175 }, /* Profile 32. */
+            { 160, 175 }, /* Profile 33. */
+            { 160, 175 }, /* Profile 34. */
+            { 160, 175 }, /* Profile 35. */
+            { 160, 175 }, /* Profile 36. */
+            { 160, 175 }, /* Profile 37. */
+            { 160, 175 }, /* Profile 38. */
+            { 160, 175 }, /* Profile 39. */
+            { 160, 175 }, /* Profile 40. */
+            { 160, 175 }, /* Profile 41. */
+            { 160, 175 }, /* Profile 42. */
+            { 160, 175 }, /* Profile 43. */
+            { 160, 175 }, /* Profile 44. */
+            { 160, 175 }, /* Profile 45. */
+            { 160, 175 }, /* Profile 46. */
+            { 160, 175 }, /* Profile 47. */
+            { 160, 175 }, /* Profile 48. */
+            { 160, 175 }, /* Profile 49. */
+            { 160, 175 }, /* Profile 50. */
+            { 160, 175 }, /* Profile 51. */
+            { 160, 175 }, /* Profile 52. */
+            { 160, 175 }, /* Profile 53. */
+            { 160, 175 }, /* Profile 54. */
+            { 160, 175 }, /* Profile 55. */
+            { 160, 175 }, /* Profile 56. */
+            { 160, 175 }, /* Profile 57. */
         },
         .profile_cnt = 58,
     },
     {
         .name = "EFFECTIVE_TTL_AND_SNAT_CTRL_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 192, 207 }, /* Profile 2. */
-            { 192, 207 }, /* Profile 3. */
-            { 192, 207 }, /* Profile 4. */
-            { 192, 207 }, /* Profile 5. */
-            { 192, 207 }, /* Profile 6. */
-            { 192, 207 }, /* Profile 7. */
-            { 192, 207 }, /* Profile 8. */
-            { 192, 207 }, /* Profile 9. */
-            { 192, 207 }, /* Profile 10. */
-            { 192, 207 }, /* Profile 11. */
-            { 192, 207 }, /* Profile 12. */
-            { 192, 207 }, /* Profile 13. */
-            { 192, 207 }, /* Profile 14. */
-            { 192, 207 }, /* Profile 15. */
-            { 192, 207 }, /* Profile 16. */
-            { 192, 207 }, /* Profile 17. */
-            { 192, 207 }, /* Profile 18. */
-            { 192, 207 }, /* Profile 19. */
-            { 192, 207 }, /* Profile 20. */
-            { 192, 207 }, /* Profile 21. */
-            { 192, 207 }, /* Profile 22. */
-            { 192, 207 }, /* Profile 23. */
-            { 192, 207 }, /* Profile 24. */
-            { 192, 207 }, /* Profile 25. */
-            { 192, 207 }, /* Profile 26. */
-            { 192, 207 }, /* Profile 27. */
-            { 192, 207 }, /* Profile 28. */
-            { 192, 207 }, /* Profile 29. */
-            { 208, 223 }, /* Profile 30. */
-            { 208, 223 }, /* Profile 31. */
-            { 208, 223 }, /* Profile 32. */
-            { 208, 223 }, /* Profile 33. */
-            { 208, 223 }, /* Profile 34. */
-            { 208, 223 }, /* Profile 35. */
-            { 208, 223 }, /* Profile 36. */
-            { 208, 223 }, /* Profile 37. */
-            { 208, 223 }, /* Profile 38. */
-            { 208, 223 }, /* Profile 39. */
-            { 208, 223 }, /* Profile 40. */
-            { 208, 223 }, /* Profile 41. */
-            { 208, 223 }, /* Profile 42. */
-            { 208, 223 }, /* Profile 43. */
-            { 208, 223 }, /* Profile 44. */
-            { 208, 223 }, /* Profile 45. */
-            { 208, 223 }, /* Profile 46. */
-            { 208, 223 }, /* Profile 47. */
-            { 208, 223 }, /* Profile 48. */
-            { 208, 223 }, /* Profile 49. */
-            { 208, 223 }, /* Profile 50. */
-            { 208, 223 }, /* Profile 51. */
-            { 208, 223 }, /* Profile 52. */
-            { 208, 223 }, /* Profile 53. */
-            { 208, 223 }, /* Profile 54. */
-            { 208, 223 }, /* Profile 55. */
-            { 208, 223 }, /* Profile 56. */
-            { 208, 223 }, /* Profile 57. */
+            { 80, 95 }, /* Profile 2. */
+            { 80, 95 }, /* Profile 3. */
+            { 80, 95 }, /* Profile 4. */
+            { 80, 95 }, /* Profile 5. */
+            { 80, 95 }, /* Profile 6. */
+            { 80, 95 }, /* Profile 7. */
+            { 80, 95 }, /* Profile 8. */
+            { 80, 95 }, /* Profile 9. */
+            { 80, 95 }, /* Profile 10. */
+            { 80, 95 }, /* Profile 11. */
+            { 80, 95 }, /* Profile 12. */
+            { 80, 95 }, /* Profile 13. */
+            { 80, 95 }, /* Profile 14. */
+            { 80, 95 }, /* Profile 15. */
+            { 80, 95 }, /* Profile 16. */
+            { 80, 95 }, /* Profile 17. */
+            { 80, 95 }, /* Profile 18. */
+            { 80, 95 }, /* Profile 19. */
+            { 80, 95 }, /* Profile 20. */
+            { 80, 95 }, /* Profile 21. */
+            { 80, 95 }, /* Profile 22. */
+            { 80, 95 }, /* Profile 23. */
+            { 80, 95 }, /* Profile 24. */
+            { 80, 95 }, /* Profile 25. */
+            { 80, 95 }, /* Profile 26. */
+            { 80, 95 }, /* Profile 27. */
+            { 80, 95 }, /* Profile 28. */
+            { 80, 95 }, /* Profile 29. */
+            { 80, 95 }, /* Profile 30. */
+            { 80, 95 }, /* Profile 31. */
+            { 80, 95 }, /* Profile 32. */
+            { 80, 95 }, /* Profile 33. */
+            { 80, 95 }, /* Profile 34. */
+            { 80, 95 }, /* Profile 35. */
+            { 80, 95 }, /* Profile 36. */
+            { 80, 95 }, /* Profile 37. */
+            { 80, 95 }, /* Profile 38. */
+            { 80, 95 }, /* Profile 39. */
+            { 80, 95 }, /* Profile 40. */
+            { 80, 95 }, /* Profile 41. */
+            { 80, 95 }, /* Profile 42. */
+            { 80, 95 }, /* Profile 43. */
+            { 80, 95 }, /* Profile 44. */
+            { 80, 95 }, /* Profile 45. */
+            { 80, 95 }, /* Profile 46. */
+            { 80, 95 }, /* Profile 47. */
+            { 80, 95 }, /* Profile 48. */
+            { 80, 95 }, /* Profile 49. */
+            { 80, 95 }, /* Profile 50. */
+            { 80, 95 }, /* Profile 51. */
+            { 80, 95 }, /* Profile 52. */
+            { 80, 95 }, /* Profile 53. */
+            { 80, 95 }, /* Profile 54. */
+            { 80, 95 }, /* Profile 55. */
+            { 80, 95 }, /* Profile 56. */
+            { 80, 95 }, /* Profile 57. */
         },
         .profile_cnt = 58,
     },
     {
         .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -850,64 +850,64 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "ENTROPY_LABEL_HIGH_3_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
             { 444, 447 }, /* Profile 2. */
-            { 424, 427 }, /* Profile 3. */
+            { 420, 423 }, /* Profile 3. */
             { 448, 451 }, /* Profile 4. */
             { 444, 447 }, /* Profile 5. */
             { 444, 447 }, /* Profile 6. */
             { 444, 447 }, /* Profile 7. */
-            { 424, 427 }, /* Profile 8. */
+            { 420, 423 }, /* Profile 8. */
             { 448, 451 }, /* Profile 9. */
             { 444, 447 }, /* Profile 10. */
             { 444, 447 }, /* Profile 11. */
             { 444, 447 }, /* Profile 12. */
-            { 424, 427 }, /* Profile 13. */
+            { 420, 423 }, /* Profile 13. */
             { 448, 451 }, /* Profile 14. */
             { 444, 447 }, /* Profile 15. */
             { 444, 447 }, /* Profile 16. */
-            { 424, 427 }, /* Profile 17. */
+            { 420, 423 }, /* Profile 17. */
             { 448, 451 }, /* Profile 18. */
             { 444, 447 }, /* Profile 19. */
             { 444, 447 }, /* Profile 20. */
             { 444, 447 }, /* Profile 21. */
-            { 424, 427 }, /* Profile 22. */
+            { 420, 423 }, /* Profile 22. */
             { 448, 451 }, /* Profile 23. */
             { 444, 447 }, /* Profile 24. */
             { 444, 447 }, /* Profile 25. */
             { 444, 447 }, /* Profile 26. */
-            { 424, 427 }, /* Profile 27. */
+            { 420, 423 }, /* Profile 27. */
             { 448, 451 }, /* Profile 28. */
             { 444, 447 }, /* Profile 29. */
             { 444, 447 }, /* Profile 30. */
-            { 424, 427 }, /* Profile 31. */
+            { 420, 423 }, /* Profile 31. */
             { 448, 451 }, /* Profile 32. */
             { 444, 447 }, /* Profile 33. */
             { 444, 447 }, /* Profile 34. */
             { 444, 447 }, /* Profile 35. */
-            { 424, 427 }, /* Profile 36. */
+            { 420, 423 }, /* Profile 36. */
             { 448, 451 }, /* Profile 37. */
             { 444, 447 }, /* Profile 38. */
             { 444, 447 }, /* Profile 39. */
             { 444, 447 }, /* Profile 40. */
-            { 424, 427 }, /* Profile 41. */
+            { 420, 423 }, /* Profile 41. */
             { 448, 451 }, /* Profile 42. */
             { 444, 447 }, /* Profile 43. */
             { 444, 447 }, /* Profile 44. */
-            { 424, 427 }, /* Profile 45. */
+            { 420, 423 }, /* Profile 45. */
             { 448, 451 }, /* Profile 46. */
             { 444, 447 }, /* Profile 47. */
             { 444, 447 }, /* Profile 48. */
             { 444, 447 }, /* Profile 49. */
-            { 424, 427 }, /* Profile 50. */
+            { 420, 423 }, /* Profile 50. */
             { 448, 451 }, /* Profile 51. */
             { 444, 447 }, /* Profile 52. */
             { 444, 447 }, /* Profile 53. */
             { 444, 447 }, /* Profile 54. */
-            { 424, 427 }, /* Profile 55. */
+            { 420, 423 }, /* Profile 55. */
             { 448, 451 }, /* Profile 56. */
             { 444, 447 }, /* Profile 57. */
         },
@@ -915,72 +915,72 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "ENTROPY_LABEL_LOW_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 112, 127 }, /* Profile 2. */
-            { 112, 127 }, /* Profile 3. */
-            { 112, 127 }, /* Profile 4. */
-            { 112, 127 }, /* Profile 5. */
-            { 112, 127 }, /* Profile 6. */
-            { 112, 127 }, /* Profile 7. */
-            { 112, 127 }, /* Profile 8. */
-            { 112, 127 }, /* Profile 9. */
-            { 112, 127 }, /* Profile 10. */
-            { 112, 127 }, /* Profile 11. */
-            { 112, 127 }, /* Profile 12. */
-            { 112, 127 }, /* Profile 13. */
-            { 112, 127 }, /* Profile 14. */
-            { 112, 127 }, /* Profile 15. */
-            { 112, 127 }, /* Profile 16. */
-            { 112, 127 }, /* Profile 17. */
-            { 112, 127 }, /* Profile 18. */
-            { 112, 127 }, /* Profile 19. */
-            { 112, 127 }, /* Profile 20. */
-            { 112, 127 }, /* Profile 21. */
-            { 112, 127 }, /* Profile 22. */
-            { 112, 127 }, /* Profile 23. */
-            { 112, 127 }, /* Profile 24. */
-            { 112, 127 }, /* Profile 25. */
-            { 112, 127 }, /* Profile 26. */
-            { 112, 127 }, /* Profile 27. */
-            { 112, 127 }, /* Profile 28. */
-            { 112, 127 }, /* Profile 29. */
-            { 112, 127 }, /* Profile 30. */
-            { 112, 127 }, /* Profile 31. */
-            { 112, 127 }, /* Profile 32. */
-            { 112, 127 }, /* Profile 33. */
-            { 112, 127 }, /* Profile 34. */
-            { 112, 127 }, /* Profile 35. */
-            { 112, 127 }, /* Profile 36. */
-            { 112, 127 }, /* Profile 37. */
-            { 112, 127 }, /* Profile 38. */
-            { 112, 127 }, /* Profile 39. */
-            { 112, 127 }, /* Profile 40. */
-            { 112, 127 }, /* Profile 41. */
-            { 112, 127 }, /* Profile 42. */
-            { 112, 127 }, /* Profile 43. */
-            { 112, 127 }, /* Profile 44. */
-            { 112, 127 }, /* Profile 45. */
-            { 112, 127 }, /* Profile 46. */
-            { 112, 127 }, /* Profile 47. */
-            { 112, 127 }, /* Profile 48. */
-            { 112, 127 }, /* Profile 49. */
-            { 112, 127 }, /* Profile 50. */
-            { 112, 127 }, /* Profile 51. */
-            { 112, 127 }, /* Profile 52. */
-            { 112, 127 }, /* Profile 53. */
-            { 112, 127 }, /* Profile 54. */
-            { 112, 127 }, /* Profile 55. */
-            { 112, 127 }, /* Profile 56. */
-            { 112, 127 }, /* Profile 57. */
+            { 128, 143 }, /* Profile 2. */
+            { 128, 143 }, /* Profile 3. */
+            { 128, 143 }, /* Profile 4. */
+            { 128, 143 }, /* Profile 5. */
+            { 128, 143 }, /* Profile 6. */
+            { 128, 143 }, /* Profile 7. */
+            { 128, 143 }, /* Profile 8. */
+            { 128, 143 }, /* Profile 9. */
+            { 128, 143 }, /* Profile 10. */
+            { 128, 143 }, /* Profile 11. */
+            { 128, 143 }, /* Profile 12. */
+            { 128, 143 }, /* Profile 13. */
+            { 128, 143 }, /* Profile 14. */
+            { 128, 143 }, /* Profile 15. */
+            { 128, 143 }, /* Profile 16. */
+            { 128, 143 }, /* Profile 17. */
+            { 128, 143 }, /* Profile 18. */
+            { 128, 143 }, /* Profile 19. */
+            { 128, 143 }, /* Profile 20. */
+            { 128, 143 }, /* Profile 21. */
+            { 128, 143 }, /* Profile 22. */
+            { 128, 143 }, /* Profile 23. */
+            { 128, 143 }, /* Profile 24. */
+            { 128, 143 }, /* Profile 25. */
+            { 128, 143 }, /* Profile 26. */
+            { 128, 143 }, /* Profile 27. */
+            { 128, 143 }, /* Profile 28. */
+            { 128, 143 }, /* Profile 29. */
+            { 128, 143 }, /* Profile 30. */
+            { 128, 143 }, /* Profile 31. */
+            { 128, 143 }, /* Profile 32. */
+            { 128, 143 }, /* Profile 33. */
+            { 128, 143 }, /* Profile 34. */
+            { 128, 143 }, /* Profile 35. */
+            { 128, 143 }, /* Profile 36. */
+            { 128, 143 }, /* Profile 37. */
+            { 128, 143 }, /* Profile 38. */
+            { 128, 143 }, /* Profile 39. */
+            { 128, 143 }, /* Profile 40. */
+            { 128, 143 }, /* Profile 41. */
+            { 128, 143 }, /* Profile 42. */
+            { 128, 143 }, /* Profile 43. */
+            { 128, 143 }, /* Profile 44. */
+            { 128, 143 }, /* Profile 45. */
+            { 128, 143 }, /* Profile 46. */
+            { 128, 143 }, /* Profile 47. */
+            { 128, 143 }, /* Profile 48. */
+            { 128, 143 }, /* Profile 49. */
+            { 128, 143 }, /* Profile 50. */
+            { 128, 143 }, /* Profile 51. */
+            { 128, 143 }, /* Profile 52. */
+            { 128, 143 }, /* Profile 53. */
+            { 128, 143 }, /* Profile 54. */
+            { 128, 143 }, /* Profile 55. */
+            { 128, 143 }, /* Profile 56. */
+            { 128, 143 }, /* Profile 57. */
         },
         .profile_cnt = 58,
     },
     {
         .name = "EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1041,17 +1041,17 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "EP_NIH_HDR_RECIRC_CODE_3_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
             { 448, 451 }, /* Profile 2. */
-            { 432, 435 }, /* Profile 3. */
+            { 428, 431 }, /* Profile 3. */
             { 452, 455 }, /* Profile 4. */
             { 448, 451 }, /* Profile 5. */
             { 448, 451 }, /* Profile 6. */
             { 448, 451 }, /* Profile 7. */
-            { 432, 435 }, /* Profile 8. */
+            { 428, 431 }, /* Profile 8. */
             { 452, 455 }, /* Profile 9. */
             { 448, 451 }, /* Profile 10. */
             { 448, 451 }, /* Profile 11. */
@@ -1060,12 +1060,12 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
             { -1, -1 }, /* Profile 14. */
             { -1, -1 }, /* Profile 15. */
             { 448, 451 }, /* Profile 16. */
-            { 432, 435 }, /* Profile 17. */
+            { 428, 431 }, /* Profile 17. */
             { 452, 455 }, /* Profile 18. */
             { 448, 451 }, /* Profile 19. */
             { 448, 451 }, /* Profile 20. */
             { 448, 451 }, /* Profile 21. */
-            { 432, 435 }, /* Profile 22. */
+            { 428, 431 }, /* Profile 22. */
             { 452, 455 }, /* Profile 23. */
             { 448, 451 }, /* Profile 24. */
             { 448, 451 }, /* Profile 25. */
@@ -1074,12 +1074,12 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
             { -1, -1 }, /* Profile 28. */
             { -1, -1 }, /* Profile 29. */
             { 448, 451 }, /* Profile 30. */
-            { 432, 435 }, /* Profile 31. */
+            { 428, 431 }, /* Profile 31. */
             { 452, 455 }, /* Profile 32. */
             { 448, 451 }, /* Profile 33. */
             { 448, 451 }, /* Profile 34. */
             { 448, 451 }, /* Profile 35. */
-            { 432, 435 }, /* Profile 36. */
+            { 428, 431 }, /* Profile 36. */
             { 452, 455 }, /* Profile 37. */
             { 448, 451 }, /* Profile 38. */
             { 448, 451 }, /* Profile 39. */
@@ -1088,12 +1088,12 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
             { -1, -1 }, /* Profile 42. */
             { -1, -1 }, /* Profile 43. */
             { 448, 451 }, /* Profile 44. */
-            { 432, 435 }, /* Profile 45. */
+            { 428, 431 }, /* Profile 45. */
             { 452, 455 }, /* Profile 46. */
             { 448, 451 }, /* Profile 47. */
             { 448, 451 }, /* Profile 48. */
             { 448, 451 }, /* Profile 49. */
-            { 432, 435 }, /* Profile 50. */
+            { 428, 431 }, /* Profile 50. */
             { 452, 455 }, /* Profile 51. */
             { 448, 451 }, /* Profile 52. */
             { 448, 451 }, /* Profile 53. */
@@ -1102,19 +1102,19 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "EP_NIH_HDR_TIMESTAMP_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
             { -1, -1 }, /* Profile 2. */
             { -1, -1 }, /* Profile 3. */
             { -1, -1 }, /* Profile 4. */
-            { 224, 239 }, /* Profile 5. */
+            { 176, 191 }, /* Profile 5. */
             { -1, -1 }, /* Profile 6. */
             { -1, -1 }, /* Profile 7. */
             { -1, -1 }, /* Profile 8. */
             { -1, -1 }, /* Profile 9. */
-            { 224, 239 }, /* Profile 10. */
+            { 176, 191 }, /* Profile 10. */
             { -1, -1 }, /* Profile 11. */
             { -1, -1 }, /* Profile 12. */
             { -1, -1 }, /* Profile 13. */
@@ -1123,12 +1123,12 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
             { -1, -1 }, /* Profile 16. */
             { -1, -1 }, /* Profile 17. */
             { -1, -1 }, /* Profile 18. */
-            { 224, 239 }, /* Profile 19. */
+            { 176, 191 }, /* Profile 19. */
             { -1, -1 }, /* Profile 20. */
             { -1, -1 }, /* Profile 21. */
             { -1, -1 }, /* Profile 22. */
             { -1, -1 }, /* Profile 23. */
-            { 224, 239 }, /* Profile 24. */
+            { 176, 191 }, /* Profile 24. */
             { -1, -1 }, /* Profile 25. */
             { -1, -1 }, /* Profile 26. */
             { -1, -1 }, /* Profile 27. */
@@ -1137,12 +1137,12 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
             { -1, -1 }, /* Profile 30. */
             { -1, -1 }, /* Profile 31. */
             { -1, -1 }, /* Profile 32. */
-            { 240, 255 }, /* Profile 33. */
+            { 192, 207 }, /* Profile 33. */
             { -1, -1 }, /* Profile 34. */
             { -1, -1 }, /* Profile 35. */
             { -1, -1 }, /* Profile 36. */
             { -1, -1 }, /* Profile 37. */
-            { 240, 255 }, /* Profile 38. */
+            { 192, 207 }, /* Profile 38. */
             { -1, -1 }, /* Profile 39. */
             { -1, -1 }, /* Profile 40. */
             { -1, -1 }, /* Profile 41. */
@@ -1151,30 +1151,30 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
             { -1, -1 }, /* Profile 44. */
             { -1, -1 }, /* Profile 45. */
             { -1, -1 }, /* Profile 46. */
-            { 240, 255 }, /* Profile 47. */
+            { 192, 207 }, /* Profile 47. */
             { -1, -1 }, /* Profile 48. */
             { -1, -1 }, /* Profile 49. */
             { -1, -1 }, /* Profile 50. */
             { -1, -1 }, /* Profile 51. */
-            { 240, 255 }, /* Profile 52. */
+            { 192, 207 }, /* Profile 52. */
         },
         .profile_cnt = 53,
     },
     {
         .name = "EP_NIH_HDR_TIMESTAMP_31_16",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
             { -1, -1 }, /* Profile 2. */
             { -1, -1 }, /* Profile 3. */
             { -1, -1 }, /* Profile 4. */
-            { 240, 255 }, /* Profile 5. */
+            { 192, 207 }, /* Profile 5. */
             { -1, -1 }, /* Profile 6. */
             { -1, -1 }, /* Profile 7. */
             { -1, -1 }, /* Profile 8. */
             { -1, -1 }, /* Profile 9. */
-            { 240, 255 }, /* Profile 10. */
+            { 192, 207 }, /* Profile 10. */
             { -1, -1 }, /* Profile 11. */
             { -1, -1 }, /* Profile 12. */
             { -1, -1 }, /* Profile 13. */
@@ -1183,12 +1183,12 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
             { -1, -1 }, /* Profile 16. */
             { -1, -1 }, /* Profile 17. */
             { -1, -1 }, /* Profile 18. */
-            { 240, 255 }, /* Profile 19. */
+            { 192, 207 }, /* Profile 19. */
             { -1, -1 }, /* Profile 20. */
             { -1, -1 }, /* Profile 21. */
             { -1, -1 }, /* Profile 22. */
             { -1, -1 }, /* Profile 23. */
-            { 240, 255 }, /* Profile 24. */
+            { 192, 207 }, /* Profile 24. */
             { -1, -1 }, /* Profile 25. */
             { -1, -1 }, /* Profile 26. */
             { -1, -1 }, /* Profile 27. */
@@ -1197,12 +1197,12 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
             { -1, -1 }, /* Profile 30. */
             { -1, -1 }, /* Profile 31. */
             { -1, -1 }, /* Profile 32. */
-            { 256, 271 }, /* Profile 33. */
+            { 208, 223 }, /* Profile 33. */
             { -1, -1 }, /* Profile 34. */
             { -1, -1 }, /* Profile 35. */
             { -1, -1 }, /* Profile 36. */
             { -1, -1 }, /* Profile 37. */
-            { 256, 271 }, /* Profile 38. */
+            { 208, 223 }, /* Profile 38. */
             { -1, -1 }, /* Profile 39. */
             { -1, -1 }, /* Profile 40. */
             { -1, -1 }, /* Profile 41. */
@@ -1211,18 +1211,18 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
             { -1, -1 }, /* Profile 44. */
             { -1, -1 }, /* Profile 45. */
             { -1, -1 }, /* Profile 46. */
-            { 256, 271 }, /* Profile 47. */
+            { 208, 223 }, /* Profile 47. */
             { -1, -1 }, /* Profile 48. */
             { -1, -1 }, /* Profile 49. */
             { -1, -1 }, /* Profile 50. */
             { -1, -1 }, /* Profile 51. */
-            { 256, 271 }, /* Profile 52. */
+            { 208, 223 }, /* Profile 52. */
         },
         .profile_cnt = 53,
     },
     {
         .name = "EVENT_TRACE_VECTOR_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1287,7 +1287,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "EVENT_TRACE_VECTOR_31_16",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1352,7 +1352,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "EVENT_TRACE_VECTOR_47_32",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1417,7 +1417,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "FLOW_ID_LSB_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_FLOW_ID_LSB_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_FLOW_ID_LSB_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1482,7 +1482,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "FLOW_ID_MSB_3_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_FLOW_ID_MSB_3_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_FLOW_ID_MSB_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1547,137 +1547,137 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "I2E_CLASS_ID_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
             { 272, 287 }, /* Profile 2. */
-            { 272, 287 }, /* Profile 3. */
+            { 256, 271 }, /* Profile 3. */
             { 272, 287 }, /* Profile 4. */
-            { 304, 319 }, /* Profile 5. */
-            { 304, 319 }, /* Profile 6. */
+            { 288, 303 }, /* Profile 5. */
+            { 288, 303 }, /* Profile 6. */
             { 272, 287 }, /* Profile 7. */
-            { 272, 287 }, /* Profile 8. */
+            { 256, 271 }, /* Profile 8. */
             { 272, 287 }, /* Profile 9. */
-            { 304, 319 }, /* Profile 10. */
-            { 304, 319 }, /* Profile 11. */
+            { 288, 303 }, /* Profile 10. */
+            { 288, 303 }, /* Profile 11. */
             { 272, 287 }, /* Profile 12. */
-            { 272, 287 }, /* Profile 13. */
+            { 256, 271 }, /* Profile 13. */
             { 272, 287 }, /* Profile 14. */
-            { 304, 319 }, /* Profile 15. */
+            { 288, 303 }, /* Profile 15. */
             { 272, 287 }, /* Profile 16. */
-            { 272, 287 }, /* Profile 17. */
+            { 256, 271 }, /* Profile 17. */
             { 272, 287 }, /* Profile 18. */
-            { 304, 319 }, /* Profile 19. */
-            { 304, 319 }, /* Profile 20. */
+            { 288, 303 }, /* Profile 19. */
+            { 288, 303 }, /* Profile 20. */
             { 272, 287 }, /* Profile 21. */
-            { 272, 287 }, /* Profile 22. */
+            { 256, 271 }, /* Profile 22. */
             { 272, 287 }, /* Profile 23. */
-            { 304, 319 }, /* Profile 24. */
-            { 304, 319 }, /* Profile 25. */
+            { 288, 303 }, /* Profile 24. */
+            { 288, 303 }, /* Profile 25. */
             { 272, 287 }, /* Profile 26. */
-            { 272, 287 }, /* Profile 27. */
+            { 256, 271 }, /* Profile 27. */
             { 272, 287 }, /* Profile 28. */
-            { 304, 319 }, /* Profile 29. */
-            { 272, 287 }, /* Profile 30. */
+            { 288, 303 }, /* Profile 29. */
+            { 288, 303 }, /* Profile 30. */
             { 272, 287 }, /* Profile 31. */
-            { 272, 287 }, /* Profile 32. */
+            { 288, 303 }, /* Profile 32. */
             { 304, 319 }, /* Profile 33. */
             { 304, 319 }, /* Profile 34. */
-            { 272, 287 }, /* Profile 35. */
+            { 288, 303 }, /* Profile 35. */
             { 272, 287 }, /* Profile 36. */
-            { 272, 287 }, /* Profile 37. */
+            { 288, 303 }, /* Profile 37. */
             { 304, 319 }, /* Profile 38. */
             { 304, 319 }, /* Profile 39. */
-            { 272, 287 }, /* Profile 40. */
+            { 288, 303 }, /* Profile 40. */
             { 272, 287 }, /* Profile 41. */
-            { 272, 287 }, /* Profile 42. */
+            { 288, 303 }, /* Profile 42. */
             { 304, 319 }, /* Profile 43. */
-            { 272, 287 }, /* Profile 44. */
+            { 288, 303 }, /* Profile 44. */
             { 272, 287 }, /* Profile 45. */
-            { 272, 287 }, /* Profile 46. */
+            { 288, 303 }, /* Profile 46. */
             { 304, 319 }, /* Profile 47. */
             { 304, 319 }, /* Profile 48. */
-            { 272, 287 }, /* Profile 49. */
+            { 288, 303 }, /* Profile 49. */
             { 272, 287 }, /* Profile 50. */
-            { 272, 287 }, /* Profile 51. */
+            { 288, 303 }, /* Profile 51. */
             { 304, 319 }, /* Profile 52. */
             { 304, 319 }, /* Profile 53. */
-            { 272, 287 }, /* Profile 54. */
+            { 288, 303 }, /* Profile 54. */
             { 272, 287 }, /* Profile 55. */
-            { 272, 287 }, /* Profile 56. */
+            { 288, 303 }, /* Profile 56. */
             { 304, 319 }, /* Profile 57. */
         },
         .profile_cnt = 58,
     },
     {
         .name = "IFP_IOAM_GBP_ACTION_3_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 436, 439 }, /* Profile 2. */
+            { 440, 443 }, /* Profile 2. */
             { 408, 411 }, /* Profile 3. */
-            { 440, 443 }, /* Profile 4. */
-            { 436, 439 }, /* Profile 5. */
-            { 436, 439 }, /* Profile 6. */
-            { 436, 439 }, /* Profile 7. */
+            { 444, 447 }, /* Profile 4. */
+            { 440, 443 }, /* Profile 5. */
+            { 440, 443 }, /* Profile 6. */
+            { 440, 443 }, /* Profile 7. */
             { 408, 411 }, /* Profile 8. */
-            { 440, 443 }, /* Profile 9. */
-            { 436, 439 }, /* Profile 10. */
-            { 436, 439 }, /* Profile 11. */
-            { 436, 439 }, /* Profile 12. */
+            { 444, 447 }, /* Profile 9. */
+            { 440, 443 }, /* Profile 10. */
+            { 440, 443 }, /* Profile 11. */
+            { 440, 443 }, /* Profile 12. */
             { 408, 411 }, /* Profile 13. */
-            { 440, 443 }, /* Profile 14. */
-            { 436, 439 }, /* Profile 15. */
-            { 436, 439 }, /* Profile 16. */
+            { 444, 447 }, /* Profile 14. */
+            { 440, 443 }, /* Profile 15. */
+            { 440, 443 }, /* Profile 16. */
             { 408, 411 }, /* Profile 17. */
-            { 440, 443 }, /* Profile 18. */
-            { 436, 439 }, /* Profile 19. */
-            { 436, 439 }, /* Profile 20. */
-            { 436, 439 }, /* Profile 21. */
+            { 444, 447 }, /* Profile 18. */
+            { 440, 443 }, /* Profile 19. */
+            { 440, 443 }, /* Profile 20. */
+            { 440, 443 }, /* Profile 21. */
             { 408, 411 }, /* Profile 22. */
-            { 440, 443 }, /* Profile 23. */
-            { 436, 439 }, /* Profile 24. */
-            { 436, 439 }, /* Profile 25. */
-            { 436, 439 }, /* Profile 26. */
+            { 444, 447 }, /* Profile 23. */
+            { 440, 443 }, /* Profile 24. */
+            { 440, 443 }, /* Profile 25. */
+            { 440, 443 }, /* Profile 26. */
             { 408, 411 }, /* Profile 27. */
-            { 440, 443 }, /* Profile 28. */
-            { 436, 439 }, /* Profile 29. */
-            { 436, 439 }, /* Profile 30. */
+            { 444, 447 }, /* Profile 28. */
+            { 440, 443 }, /* Profile 29. */
+            { 440, 443 }, /* Profile 30. */
             { 408, 411 }, /* Profile 31. */
-            { 440, 443 }, /* Profile 32. */
-            { 436, 439 }, /* Profile 33. */
-            { 436, 439 }, /* Profile 34. */
-            { 436, 439 }, /* Profile 35. */
+            { 444, 447 }, /* Profile 32. */
+            { 440, 443 }, /* Profile 33. */
+            { 440, 443 }, /* Profile 34. */
+            { 440, 443 }, /* Profile 35. */
             { 408, 411 }, /* Profile 36. */
-            { 440, 443 }, /* Profile 37. */
-            { 436, 439 }, /* Profile 38. */
-            { 436, 439 }, /* Profile 39. */
-            { 436, 439 }, /* Profile 40. */
+            { 444, 447 }, /* Profile 37. */
+            { 440, 443 }, /* Profile 38. */
+            { 440, 443 }, /* Profile 39. */
+            { 440, 443 }, /* Profile 40. */
             { 408, 411 }, /* Profile 41. */
-            { 440, 443 }, /* Profile 42. */
-            { 436, 439 }, /* Profile 43. */
-            { 436, 439 }, /* Profile 44. */
+            { 444, 447 }, /* Profile 42. */
+            { 440, 443 }, /* Profile 43. */
+            { 440, 443 }, /* Profile 44. */
             { 408, 411 }, /* Profile 45. */
-            { 440, 443 }, /* Profile 46. */
-            { 436, 439 }, /* Profile 47. */
-            { 436, 439 }, /* Profile 48. */
-            { 436, 439 }, /* Profile 49. */
+            { 444, 447 }, /* Profile 46. */
+            { 440, 443 }, /* Profile 47. */
+            { 440, 443 }, /* Profile 48. */
+            { 440, 443 }, /* Profile 49. */
             { 408, 411 }, /* Profile 50. */
-            { 440, 443 }, /* Profile 51. */
-            { 436, 439 }, /* Profile 52. */
-            { 436, 439 }, /* Profile 53. */
-            { 436, 439 }, /* Profile 54. */
+            { 444, 447 }, /* Profile 51. */
+            { 440, 443 }, /* Profile 52. */
+            { 440, 443 }, /* Profile 53. */
+            { 440, 443 }, /* Profile 54. */
             { 408, 411 }, /* Profile 55. */
-            { 440, 443 }, /* Profile 56. */
-            { 436, 439 }, /* Profile 57. */
+            { 444, 447 }, /* Profile 56. */
+            { 440, 443 }, /* Profile 57. */
         },
         .profile_cnt = 58,
     },
     {
         .name = "IFP_TS_CONTROL_ACTION_3_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1742,7 +1742,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "ING_TIMESTAMP_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1750,64 +1750,64 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
             { -1, -1 }, /* Profile 3. */
             { -1, -1 }, /* Profile 4. */
             { -1, -1 }, /* Profile 5. */
-            { 224, 239 }, /* Profile 6. */
+            { 176, 191 }, /* Profile 6. */
             { -1, -1 }, /* Profile 7. */
             { -1, -1 }, /* Profile 8. */
             { -1, -1 }, /* Profile 9. */
             { -1, -1 }, /* Profile 10. */
-            { 224, 239 }, /* Profile 11. */
+            { 176, 191 }, /* Profile 11. */
             { -1, -1 }, /* Profile 12. */
             { -1, -1 }, /* Profile 13. */
             { -1, -1 }, /* Profile 14. */
-            { 224, 239 }, /* Profile 15. */
+            { 176, 191 }, /* Profile 15. */
             { -1, -1 }, /* Profile 16. */
             { -1, -1 }, /* Profile 17. */
             { -1, -1 }, /* Profile 18. */
             { -1, -1 }, /* Profile 19. */
-            { 224, 239 }, /* Profile 20. */
+            { 176, 191 }, /* Profile 20. */
             { -1, -1 }, /* Profile 21. */
             { -1, -1 }, /* Profile 22. */
             { -1, -1 }, /* Profile 23. */
             { -1, -1 }, /* Profile 24. */
-            { 224, 239 }, /* Profile 25. */
+            { 176, 191 }, /* Profile 25. */
             { -1, -1 }, /* Profile 26. */
             { -1, -1 }, /* Profile 27. */
             { -1, -1 }, /* Profile 28. */
-            { 224, 239 }, /* Profile 29. */
+            { 176, 191 }, /* Profile 29. */
             { -1, -1 }, /* Profile 30. */
             { -1, -1 }, /* Profile 31. */
             { -1, -1 }, /* Profile 32. */
             { -1, -1 }, /* Profile 33. */
-            { 240, 255 }, /* Profile 34. */
+            { 192, 207 }, /* Profile 34. */
             { -1, -1 }, /* Profile 35. */
             { -1, -1 }, /* Profile 36. */
             { -1, -1 }, /* Profile 37. */
             { -1, -1 }, /* Profile 38. */
-            { 240, 255 }, /* Profile 39. */
+            { 192, 207 }, /* Profile 39. */
             { -1, -1 }, /* Profile 40. */
             { -1, -1 }, /* Profile 41. */
             { -1, -1 }, /* Profile 42. */
-            { 240, 255 }, /* Profile 43. */
+            { 192, 207 }, /* Profile 43. */
             { -1, -1 }, /* Profile 44. */
             { -1, -1 }, /* Profile 45. */
             { -1, -1 }, /* Profile 46. */
             { -1, -1 }, /* Profile 47. */
-            { 240, 255 }, /* Profile 48. */
+            { 192, 207 }, /* Profile 48. */
             { -1, -1 }, /* Profile 49. */
             { -1, -1 }, /* Profile 50. */
             { -1, -1 }, /* Profile 51. */
             { -1, -1 }, /* Profile 52. */
-            { 240, 255 }, /* Profile 53. */
+            { 192, 207 }, /* Profile 53. */
             { -1, -1 }, /* Profile 54. */
             { -1, -1 }, /* Profile 55. */
             { -1, -1 }, /* Profile 56. */
-            { 240, 255 }, /* Profile 57. */
+            { 192, 207 }, /* Profile 57. */
         },
         .profile_cnt = 58,
     },
     {
         .name = "ING_TIMESTAMP_31_16",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1815,64 +1815,64 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
             { -1, -1 }, /* Profile 3. */
             { -1, -1 }, /* Profile 4. */
             { -1, -1 }, /* Profile 5. */
-            { 240, 255 }, /* Profile 6. */
+            { 192, 207 }, /* Profile 6. */
             { -1, -1 }, /* Profile 7. */
             { -1, -1 }, /* Profile 8. */
             { -1, -1 }, /* Profile 9. */
             { -1, -1 }, /* Profile 10. */
-            { 240, 255 }, /* Profile 11. */
+            { 192, 207 }, /* Profile 11. */
             { -1, -1 }, /* Profile 12. */
             { -1, -1 }, /* Profile 13. */
             { -1, -1 }, /* Profile 14. */
-            { 240, 255 }, /* Profile 15. */
+            { 192, 207 }, /* Profile 15. */
             { -1, -1 }, /* Profile 16. */
             { -1, -1 }, /* Profile 17. */
             { -1, -1 }, /* Profile 18. */
             { -1, -1 }, /* Profile 19. */
-            { 240, 255 }, /* Profile 20. */
+            { 192, 207 }, /* Profile 20. */
             { -1, -1 }, /* Profile 21. */
             { -1, -1 }, /* Profile 22. */
             { -1, -1 }, /* Profile 23. */
             { -1, -1 }, /* Profile 24. */
-            { 240, 255 }, /* Profile 25. */
+            { 192, 207 }, /* Profile 25. */
             { -1, -1 }, /* Profile 26. */
             { -1, -1 }, /* Profile 27. */
             { -1, -1 }, /* Profile 28. */
-            { 240, 255 }, /* Profile 29. */
+            { 192, 207 }, /* Profile 29. */
             { -1, -1 }, /* Profile 30. */
             { -1, -1 }, /* Profile 31. */
             { -1, -1 }, /* Profile 32. */
             { -1, -1 }, /* Profile 33. */
-            { 256, 271 }, /* Profile 34. */
+            { 208, 223 }, /* Profile 34. */
             { -1, -1 }, /* Profile 35. */
             { -1, -1 }, /* Profile 36. */
             { -1, -1 }, /* Profile 37. */
             { -1, -1 }, /* Profile 38. */
-            { 256, 271 }, /* Profile 39. */
+            { 208, 223 }, /* Profile 39. */
             { -1, -1 }, /* Profile 40. */
             { -1, -1 }, /* Profile 41. */
             { -1, -1 }, /* Profile 42. */
-            { 256, 271 }, /* Profile 43. */
+            { 208, 223 }, /* Profile 43. */
             { -1, -1 }, /* Profile 44. */
             { -1, -1 }, /* Profile 45. */
             { -1, -1 }, /* Profile 46. */
             { -1, -1 }, /* Profile 47. */
-            { 256, 271 }, /* Profile 48. */
+            { 208, 223 }, /* Profile 48. */
             { -1, -1 }, /* Profile 49. */
             { -1, -1 }, /* Profile 50. */
             { -1, -1 }, /* Profile 51. */
             { -1, -1 }, /* Profile 52. */
-            { 256, 271 }, /* Profile 53. */
+            { 208, 223 }, /* Profile 53. */
             { -1, -1 }, /* Profile 54. */
             { -1, -1 }, /* Profile 55. */
             { -1, -1 }, /* Profile 56. */
-            { 256, 271 }, /* Profile 57. */
+            { 208, 223 }, /* Profile 57. */
         },
         .profile_cnt = 58,
     },
     {
         .name = "INGRESS_DEVICE_PORT_8_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_8_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_8_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -1937,72 +1937,72 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 224, 239 }, /* Profile 2. */
-            { 224, 239 }, /* Profile 3. */
-            { 224, 239 }, /* Profile 4. */
-            { 256, 271 }, /* Profile 5. */
-            { 256, 271 }, /* Profile 6. */
-            { 224, 239 }, /* Profile 7. */
-            { 224, 239 }, /* Profile 8. */
-            { 224, 239 }, /* Profile 9. */
-            { 256, 271 }, /* Profile 10. */
-            { 256, 271 }, /* Profile 11. */
-            { 224, 239 }, /* Profile 12. */
-            { 224, 239 }, /* Profile 13. */
-            { 224, 239 }, /* Profile 14. */
-            { 256, 271 }, /* Profile 15. */
-            { 224, 239 }, /* Profile 16. */
-            { 224, 239 }, /* Profile 17. */
-            { 224, 239 }, /* Profile 18. */
-            { 256, 271 }, /* Profile 19. */
-            { 256, 271 }, /* Profile 20. */
-            { 224, 239 }, /* Profile 21. */
-            { 224, 239 }, /* Profile 22. */
-            { 224, 239 }, /* Profile 23. */
-            { 256, 271 }, /* Profile 24. */
-            { 256, 271 }, /* Profile 25. */
-            { 224, 239 }, /* Profile 26. */
-            { 224, 239 }, /* Profile 27. */
-            { 224, 239 }, /* Profile 28. */
-            { 256, 271 }, /* Profile 29. */
-            { 240, 255 }, /* Profile 30. */
-            { 240, 255 }, /* Profile 31. */
-            { 240, 255 }, /* Profile 32. */
-            { 272, 287 }, /* Profile 33. */
-            { 272, 287 }, /* Profile 34. */
-            { 240, 255 }, /* Profile 35. */
-            { 240, 255 }, /* Profile 36. */
-            { 240, 255 }, /* Profile 37. */
-            { 272, 287 }, /* Profile 38. */
-            { 272, 287 }, /* Profile 39. */
-            { 240, 255 }, /* Profile 40. */
-            { 240, 255 }, /* Profile 41. */
-            { 240, 255 }, /* Profile 42. */
-            { 272, 287 }, /* Profile 43. */
-            { 240, 255 }, /* Profile 44. */
-            { 240, 255 }, /* Profile 45. */
-            { 240, 255 }, /* Profile 46. */
-            { 272, 287 }, /* Profile 47. */
-            { 272, 287 }, /* Profile 48. */
-            { 240, 255 }, /* Profile 49. */
-            { 240, 255 }, /* Profile 50. */
-            { 240, 255 }, /* Profile 51. */
-            { 272, 287 }, /* Profile 52. */
-            { 272, 287 }, /* Profile 53. */
-            { 240, 255 }, /* Profile 54. */
-            { 240, 255 }, /* Profile 55. */
-            { 240, 255 }, /* Profile 56. */
-            { 272, 287 }, /* Profile 57. */
+            { 288, 303 }, /* Profile 2. */
+            { 272, 287 }, /* Profile 3. */
+            { 288, 303 }, /* Profile 4. */
+            { 304, 319 }, /* Profile 5. */
+            { 304, 319 }, /* Profile 6. */
+            { 288, 303 }, /* Profile 7. */
+            { 272, 287 }, /* Profile 8. */
+            { 288, 303 }, /* Profile 9. */
+            { 304, 319 }, /* Profile 10. */
+            { 304, 319 }, /* Profile 11. */
+            { 288, 303 }, /* Profile 12. */
+            { 272, 287 }, /* Profile 13. */
+            { 288, 303 }, /* Profile 14. */
+            { 304, 319 }, /* Profile 15. */
+            { 288, 303 }, /* Profile 16. */
+            { 272, 287 }, /* Profile 17. */
+            { 288, 303 }, /* Profile 18. */
+            { 304, 319 }, /* Profile 19. */
+            { 304, 319 }, /* Profile 20. */
+            { 288, 303 }, /* Profile 21. */
+            { 272, 287 }, /* Profile 22. */
+            { 288, 303 }, /* Profile 23. */
+            { 304, 319 }, /* Profile 24. */
+            { 304, 319 }, /* Profile 25. */
+            { 288, 303 }, /* Profile 26. */
+            { 272, 287 }, /* Profile 27. */
+            { 288, 303 }, /* Profile 28. */
+            { 304, 319 }, /* Profile 29. */
+            { 304, 319 }, /* Profile 30. */
+            { 288, 303 }, /* Profile 31. */
+            { 304, 319 }, /* Profile 32. */
+            { 320, 335 }, /* Profile 33. */
+            { 320, 335 }, /* Profile 34. */
+            { 304, 319 }, /* Profile 35. */
+            { 288, 303 }, /* Profile 36. */
+            { 304, 319 }, /* Profile 37. */
+            { 320, 335 }, /* Profile 38. */
+            { 320, 335 }, /* Profile 39. */
+            { 304, 319 }, /* Profile 40. */
+            { 288, 303 }, /* Profile 41. */
+            { 304, 319 }, /* Profile 42. */
+            { 320, 335 }, /* Profile 43. */
+            { 304, 319 }, /* Profile 44. */
+            { 288, 303 }, /* Profile 45. */
+            { 304, 319 }, /* Profile 46. */
+            { 320, 335 }, /* Profile 47. */
+            { 320, 335 }, /* Profile 48. */
+            { 304, 319 }, /* Profile 49. */
+            { 288, 303 }, /* Profile 50. */
+            { 304, 319 }, /* Profile 51. */
+            { 320, 335 }, /* Profile 52. */
+            { 320, 335 }, /* Profile 53. */
+            { 304, 319 }, /* Profile 54. */
+            { 288, 303 }, /* Profile 55. */
+            { 304, 319 }, /* Profile 56. */
+            { 320, 335 }, /* Profile 57. */
         },
         .profile_cnt = 58,
     },
     {
         .name = "INGRESS_QOS_REMARK_CTRL_3_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -2067,303 +2067,303 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "INT_PRI_3_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 424, 427 }, /* Profile 2. */
-            { 392, 395 }, /* Profile 3. */
-            { 428, 431 }, /* Profile 4. */
-            { 424, 427 }, /* Profile 5. */
-            { 424, 427 }, /* Profile 6. */
-            { 424, 427 }, /* Profile 7. */
-            { 392, 395 }, /* Profile 8. */
-            { 428, 431 }, /* Profile 9. */
-            { 424, 427 }, /* Profile 10. */
-            { 424, 427 }, /* Profile 11. */
-            { 424, 427 }, /* Profile 12. */
-            { 392, 395 }, /* Profile 13. */
-            { 428, 431 }, /* Profile 14. */
-            { 424, 427 }, /* Profile 15. */
-            { 424, 427 }, /* Profile 16. */
-            { 392, 395 }, /* Profile 17. */
-            { 428, 431 }, /* Profile 18. */
-            { 424, 427 }, /* Profile 19. */
-            { 424, 427 }, /* Profile 20. */
-            { 424, 427 }, /* Profile 21. */
-            { 392, 395 }, /* Profile 22. */
-            { 428, 431 }, /* Profile 23. */
-            { 424, 427 }, /* Profile 24. */
-            { 424, 427 }, /* Profile 25. */
-            { 424, 427 }, /* Profile 26. */
-            { 392, 395 }, /* Profile 27. */
-            { 428, 431 }, /* Profile 28. */
-            { 424, 427 }, /* Profile 29. */
-            { 424, 427 }, /* Profile 30. */
-            { 392, 395 }, /* Profile 31. */
-            { 428, 431 }, /* Profile 32. */
-            { 424, 427 }, /* Profile 33. */
-            { 424, 427 }, /* Profile 34. */
-            { 424, 427 }, /* Profile 35. */
-            { 392, 395 }, /* Profile 36. */
-            { 428, 431 }, /* Profile 37. */
-            { 424, 427 }, /* Profile 38. */
-            { 424, 427 }, /* Profile 39. */
-            { 424, 427 }, /* Profile 40. */
-            { 392, 395 }, /* Profile 41. */
-            { 428, 431 }, /* Profile 42. */
-            { 424, 427 }, /* Profile 43. */
-            { 424, 427 }, /* Profile 44. */
-            { 392, 395 }, /* Profile 45. */
-            { 428, 431 }, /* Profile 46. */
-            { 424, 427 }, /* Profile 47. */
-            { 424, 427 }, /* Profile 48. */
-            { 424, 427 }, /* Profile 49. */
-            { 392, 395 }, /* Profile 50. */
-            { 428, 431 }, /* Profile 51. */
-            { 424, 427 }, /* Profile 52. */
-            { 424, 427 }, /* Profile 53. */
-            { 424, 427 }, /* Profile 54. */
-            { 392, 395 }, /* Profile 55. */
-            { 428, 431 }, /* Profile 56. */
-            { 424, 427 }, /* Profile 57. */
-        },
-        .profile_cnt = 58,
-    },
-    {
-        .name = "L2_IIF_12_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L2_IIF_12_0,
-        .profile = {
-            { -1, -1 }, /* Profile 0. */
-            { -1, -1 }, /* Profile 1. */
-            { 240, 252 }, /* Profile 2. */
-            { 240, 252 }, /* Profile 3. */
-            { 240, 252 }, /* Profile 4. */
-            { 272, 284 }, /* Profile 5. */
-            { 272, 284 }, /* Profile 6. */
-            { 240, 252 }, /* Profile 7. */
-            { 240, 252 }, /* Profile 8. */
-            { 240, 252 }, /* Profile 9. */
-            { 272, 284 }, /* Profile 10. */
-            { 272, 284 }, /* Profile 11. */
-            { 240, 252 }, /* Profile 12. */
-            { 240, 252 }, /* Profile 13. */
-            { 240, 252 }, /* Profile 14. */
-            { 272, 284 }, /* Profile 15. */
-            { 240, 252 }, /* Profile 16. */
-            { 240, 252 }, /* Profile 17. */
-            { 240, 252 }, /* Profile 18. */
-            { 272, 284 }, /* Profile 19. */
-            { 272, 284 }, /* Profile 20. */
-            { 240, 252 }, /* Profile 21. */
-            { 240, 252 }, /* Profile 22. */
-            { 240, 252 }, /* Profile 23. */
-            { 272, 284 }, /* Profile 24. */
-            { 272, 284 }, /* Profile 25. */
-            { 240, 252 }, /* Profile 26. */
-            { 240, 252 }, /* Profile 27. */
-            { 240, 252 }, /* Profile 28. */
-            { 272, 284 }, /* Profile 29. */
-        },
-        .profile_cnt = 30,
-    },
-    {
-        .name = "L2_OIF_12_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L2_OIF_12_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { -1, -1 }, /* Profile 2. */
-            { -1, -1 }, /* Profile 3. */
-            { -1, -1 }, /* Profile 4. */
-            { -1, -1 }, /* Profile 5. */
-            { -1, -1 }, /* Profile 6. */
-            { -1, -1 }, /* Profile 7. */
-            { -1, -1 }, /* Profile 8. */
-            { -1, -1 }, /* Profile 9. */
-            { -1, -1 }, /* Profile 10. */
-            { -1, -1 }, /* Profile 11. */
-            { -1, -1 }, /* Profile 12. */
-            { -1, -1 }, /* Profile 13. */
-            { -1, -1 }, /* Profile 14. */
-            { -1, -1 }, /* Profile 15. */
-            { -1, -1 }, /* Profile 16. */
-            { -1, -1 }, /* Profile 17. */
-            { -1, -1 }, /* Profile 18. */
-            { -1, -1 }, /* Profile 19. */
-            { -1, -1 }, /* Profile 20. */
-            { -1, -1 }, /* Profile 21. */
-            { -1, -1 }, /* Profile 22. */
-            { -1, -1 }, /* Profile 23. */
-            { -1, -1 }, /* Profile 24. */
-            { -1, -1 }, /* Profile 25. */
-            { -1, -1 }, /* Profile 26. */
-            { -1, -1 }, /* Profile 27. */
-            { -1, -1 }, /* Profile 28. */
-            { -1, -1 }, /* Profile 29. */
-            { 160, 172 }, /* Profile 30. */
-            { 160, 172 }, /* Profile 31. */
-            { 160, 172 }, /* Profile 32. */
-            { 160, 172 }, /* Profile 33. */
-            { 160, 172 }, /* Profile 34. */
-            { 160, 172 }, /* Profile 35. */
-            { 160, 172 }, /* Profile 36. */
-            { 160, 172 }, /* Profile 37. */
-            { 160, 172 }, /* Profile 38. */
-            { 160, 172 }, /* Profile 39. */
-            { 160, 172 }, /* Profile 40. */
-            { 160, 172 }, /* Profile 41. */
-            { 160, 172 }, /* Profile 42. */
-            { 160, 172 }, /* Profile 43. */
-            { 160, 172 }, /* Profile 44. */
-            { 160, 172 }, /* Profile 45. */
-            { 160, 172 }, /* Profile 46. */
-            { 160, 172 }, /* Profile 47. */
-            { 160, 172 }, /* Profile 48. */
-            { 160, 172 }, /* Profile 49. */
-            { 160, 172 }, /* Profile 50. */
-            { 160, 172 }, /* Profile 51. */
-            { 160, 172 }, /* Profile 52. */
-            { 160, 172 }, /* Profile 53. */
-            { 160, 172 }, /* Profile 54. */
-            { 160, 172 }, /* Profile 55. */
-            { 160, 172 }, /* Profile 56. */
-            { 160, 172 }, /* Profile 57. */
-        },
-        .profile_cnt = 58,
-    },
-    {
+            { 432, 435 }, /* Profile 2. */
+            { 400, 403 }, /* Profile 3. */
+            { 436, 439 }, /* Profile 4. */
+            { 432, 435 }, /* Profile 5. */
+            { 432, 435 }, /* Profile 6. */
+            { 432, 435 }, /* Profile 7. */
+            { 400, 403 }, /* Profile 8. */
+            { 436, 439 }, /* Profile 9. */
+            { 432, 435 }, /* Profile 10. */
+            { 432, 435 }, /* Profile 11. */
+            { 432, 435 }, /* Profile 12. */
+            { 400, 403 }, /* Profile 13. */
+            { 436, 439 }, /* Profile 14. */
+            { 432, 435 }, /* Profile 15. */
+            { 432, 435 }, /* Profile 16. */
+            { 400, 403 }, /* Profile 17. */
+            { 436, 439 }, /* Profile 18. */
+            { 432, 435 }, /* Profile 19. */
+            { 432, 435 }, /* Profile 20. */
+            { 432, 435 }, /* Profile 21. */
+            { 400, 403 }, /* Profile 22. */
+            { 436, 439 }, /* Profile 23. */
+            { 432, 435 }, /* Profile 24. */
+            { 432, 435 }, /* Profile 25. */
+            { 432, 435 }, /* Profile 26. */
+            { 400, 403 }, /* Profile 27. */
+            { 436, 439 }, /* Profile 28. */
+            { 432, 435 }, /* Profile 29. */
+            { 432, 435 }, /* Profile 30. */
+            { 400, 403 }, /* Profile 31. */
+            { 436, 439 }, /* Profile 32. */
+            { 432, 435 }, /* Profile 33. */
+            { 432, 435 }, /* Profile 34. */
+            { 432, 435 }, /* Profile 35. */
+            { 400, 403 }, /* Profile 36. */
+            { 436, 439 }, /* Profile 37. */
+            { 432, 435 }, /* Profile 38. */
+            { 432, 435 }, /* Profile 39. */
+            { 432, 435 }, /* Profile 40. */
+            { 400, 403 }, /* Profile 41. */
+            { 436, 439 }, /* Profile 42. */
+            { 432, 435 }, /* Profile 43. */
+            { 432, 435 }, /* Profile 44. */
+            { 400, 403 }, /* Profile 45. */
+            { 436, 439 }, /* Profile 46. */
+            { 432, 435 }, /* Profile 47. */
+            { 432, 435 }, /* Profile 48. */
+            { 432, 435 }, /* Profile 49. */
+            { 400, 403 }, /* Profile 50. */
+            { 436, 439 }, /* Profile 51. */
+            { 432, 435 }, /* Profile 52. */
+            { 432, 435 }, /* Profile 53. */
+            { 432, 435 }, /* Profile 54. */
+            { 400, 403 }, /* Profile 55. */
+            { 436, 439 }, /* Profile 56. */
+            { 432, 435 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "L2_IIF_12_0",
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L2_IIF_12_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 304, 316 }, /* Profile 2. */
+            { 288, 300 }, /* Profile 3. */
+            { 304, 316 }, /* Profile 4. */
+            { 320, 332 }, /* Profile 5. */
+            { 320, 332 }, /* Profile 6. */
+            { 304, 316 }, /* Profile 7. */
+            { 288, 300 }, /* Profile 8. */
+            { 304, 316 }, /* Profile 9. */
+            { 320, 332 }, /* Profile 10. */
+            { 320, 332 }, /* Profile 11. */
+            { 304, 316 }, /* Profile 12. */
+            { 288, 300 }, /* Profile 13. */
+            { 304, 316 }, /* Profile 14. */
+            { 320, 332 }, /* Profile 15. */
+            { 304, 316 }, /* Profile 16. */
+            { 288, 300 }, /* Profile 17. */
+            { 304, 316 }, /* Profile 18. */
+            { 320, 332 }, /* Profile 19. */
+            { 320, 332 }, /* Profile 20. */
+            { 304, 316 }, /* Profile 21. */
+            { 288, 300 }, /* Profile 22. */
+            { 304, 316 }, /* Profile 23. */
+            { 320, 332 }, /* Profile 24. */
+            { 320, 332 }, /* Profile 25. */
+            { 304, 316 }, /* Profile 26. */
+            { 288, 300 }, /* Profile 27. */
+            { 304, 316 }, /* Profile 28. */
+            { 320, 332 }, /* Profile 29. */
+        },
+        .profile_cnt = 30,
+    },
+    {
+        .name = "L2_OIF_12_0",
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L2_OIF_12_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { 176, 188 }, /* Profile 30. */
+            { 176, 188 }, /* Profile 31. */
+            { 176, 188 }, /* Profile 32. */
+            { 176, 188 }, /* Profile 33. */
+            { 176, 188 }, /* Profile 34. */
+            { 176, 188 }, /* Profile 35. */
+            { 176, 188 }, /* Profile 36. */
+            { 176, 188 }, /* Profile 37. */
+            { 176, 188 }, /* Profile 38. */
+            { 176, 188 }, /* Profile 39. */
+            { 176, 188 }, /* Profile 40. */
+            { 176, 188 }, /* Profile 41. */
+            { 176, 188 }, /* Profile 42. */
+            { 176, 188 }, /* Profile 43. */
+            { 176, 188 }, /* Profile 44. */
+            { 176, 188 }, /* Profile 45. */
+            { 176, 188 }, /* Profile 46. */
+            { 176, 188 }, /* Profile 47. */
+            { 176, 188 }, /* Profile 48. */
+            { 176, 188 }, /* Profile 49. */
+            { 176, 188 }, /* Profile 50. */
+            { 176, 188 }, /* Profile 51. */
+            { 176, 188 }, /* Profile 52. */
+            { 176, 188 }, /* Profile 53. */
+            { 176, 188 }, /* Profile 54. */
+            { 176, 188 }, /* Profile 55. */
+            { 176, 188 }, /* Profile 56. */
+            { 176, 188 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
         .name = "L3_DNAT_INDEX_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 320, 335 }, /* Profile 2. */
+            { 208, 223 }, /* Profile 2. */
             { -1, -1 }, /* Profile 3. */
-            { 320, 335 }, /* Profile 4. */
+            { 208, 223 }, /* Profile 4. */
             { -1, -1 }, /* Profile 5. */
             { -1, -1 }, /* Profile 6. */
-            { 320, 335 }, /* Profile 7. */
+            { 208, 223 }, /* Profile 7. */
             { -1, -1 }, /* Profile 8. */
-            { 320, 335 }, /* Profile 9. */
+            { 208, 223 }, /* Profile 9. */
             { -1, -1 }, /* Profile 10. */
             { -1, -1 }, /* Profile 11. */
-            { 320, 335 }, /* Profile 12. */
+            { 208, 223 }, /* Profile 12. */
             { -1, -1 }, /* Profile 13. */
-            { 320, 335 }, /* Profile 14. */
+            { 208, 223 }, /* Profile 14. */
             { -1, -1 }, /* Profile 15. */
-            { 320, 335 }, /* Profile 16. */
+            { 208, 223 }, /* Profile 16. */
             { -1, -1 }, /* Profile 17. */
-            { 320, 335 }, /* Profile 18. */
+            { 208, 223 }, /* Profile 18. */
             { -1, -1 }, /* Profile 19. */
             { -1, -1 }, /* Profile 20. */
-            { 320, 335 }, /* Profile 21. */
+            { 208, 223 }, /* Profile 21. */
             { -1, -1 }, /* Profile 22. */
-            { 320, 335 }, /* Profile 23. */
+            { 208, 223 }, /* Profile 23. */
             { -1, -1 }, /* Profile 24. */
             { -1, -1 }, /* Profile 25. */
-            { 320, 335 }, /* Profile 26. */
+            { 208, 223 }, /* Profile 26. */
             { -1, -1 }, /* Profile 27. */
-            { 320, 335 }, /* Profile 28. */
+            { 208, 223 }, /* Profile 28. */
             { -1, -1 }, /* Profile 29. */
-            { 320, 335 }, /* Profile 30. */
+            { 224, 239 }, /* Profile 30. */
             { -1, -1 }, /* Profile 31. */
-            { 320, 335 }, /* Profile 32. */
+            { 224, 239 }, /* Profile 32. */
             { -1, -1 }, /* Profile 33. */
             { -1, -1 }, /* Profile 34. */
-            { 320, 335 }, /* Profile 35. */
+            { 224, 239 }, /* Profile 35. */
             { -1, -1 }, /* Profile 36. */
-            { 320, 335 }, /* Profile 37. */
+            { 224, 239 }, /* Profile 37. */
             { -1, -1 }, /* Profile 38. */
             { -1, -1 }, /* Profile 39. */
-            { 320, 335 }, /* Profile 40. */
+            { 224, 239 }, /* Profile 40. */
             { -1, -1 }, /* Profile 41. */
-            { 320, 335 }, /* Profile 42. */
+            { 224, 239 }, /* Profile 42. */
             { -1, -1 }, /* Profile 43. */
-            { 320, 335 }, /* Profile 44. */
+            { 224, 239 }, /* Profile 44. */
             { -1, -1 }, /* Profile 45. */
-            { 320, 335 }, /* Profile 46. */
+            { 224, 239 }, /* Profile 46. */
             { -1, -1 }, /* Profile 47. */
             { -1, -1 }, /* Profile 48. */
-            { 320, 335 }, /* Profile 49. */
+            { 224, 239 }, /* Profile 49. */
             { -1, -1 }, /* Profile 50. */
-            { 320, 335 }, /* Profile 51. */
+            { 224, 239 }, /* Profile 51. */
             { -1, -1 }, /* Profile 52. */
             { -1, -1 }, /* Profile 53. */
-            { 320, 335 }, /* Profile 54. */
+            { 224, 239 }, /* Profile 54. */
             { -1, -1 }, /* Profile 55. */
-            { 320, 335 }, /* Profile 56. */
+            { 224, 239 }, /* Profile 56. */
         },
         .profile_cnt = 57,
     },
     {
         .name = "L3_IIF_13_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 176, 189 }, /* Profile 2. */
-            { 176, 189 }, /* Profile 3. */
-            { 176, 189 }, /* Profile 4. */
-            { 176, 189 }, /* Profile 5. */
-            { 176, 189 }, /* Profile 6. */
-            { 176, 189 }, /* Profile 7. */
-            { 176, 189 }, /* Profile 8. */
-            { 176, 189 }, /* Profile 9. */
-            { 176, 189 }, /* Profile 10. */
-            { 176, 189 }, /* Profile 11. */
-            { 176, 189 }, /* Profile 12. */
-            { 176, 189 }, /* Profile 13. */
-            { 176, 189 }, /* Profile 14. */
-            { 176, 189 }, /* Profile 15. */
-            { 176, 189 }, /* Profile 16. */
-            { 176, 189 }, /* Profile 17. */
-            { 176, 189 }, /* Profile 18. */
-            { 176, 189 }, /* Profile 19. */
-            { 176, 189 }, /* Profile 20. */
-            { 176, 189 }, /* Profile 21. */
-            { 176, 189 }, /* Profile 22. */
-            { 176, 189 }, /* Profile 23. */
-            { 176, 189 }, /* Profile 24. */
-            { 176, 189 }, /* Profile 25. */
-            { 176, 189 }, /* Profile 26. */
-            { 176, 189 }, /* Profile 27. */
-            { 176, 189 }, /* Profile 28. */
-            { 176, 189 }, /* Profile 29. */
-            { 192, 205 }, /* Profile 30. */
-            { 192, 205 }, /* Profile 31. */
-            { 192, 205 }, /* Profile 32. */
-            { 192, 205 }, /* Profile 33. */
-            { 192, 205 }, /* Profile 34. */
-            { 192, 205 }, /* Profile 35. */
-            { 192, 205 }, /* Profile 36. */
-            { 192, 205 }, /* Profile 37. */
-            { 192, 205 }, /* Profile 38. */
-            { 192, 205 }, /* Profile 39. */
-            { 192, 205 }, /* Profile 40. */
-            { 192, 205 }, /* Profile 41. */
-            { 192, 205 }, /* Profile 42. */
-            { 192, 205 }, /* Profile 43. */
-            { 192, 205 }, /* Profile 44. */
-            { 192, 205 }, /* Profile 45. */
-            { 192, 205 }, /* Profile 46. */
-            { 192, 205 }, /* Profile 47. */
-            { 192, 205 }, /* Profile 48. */
-            { 192, 205 }, /* Profile 49. */
-            { 192, 205 }, /* Profile 50. */
-            { 192, 205 }, /* Profile 51. */
-            { 192, 205 }, /* Profile 52. */
-            { 192, 205 }, /* Profile 53. */
-            { 192, 205 }, /* Profile 54. */
-            { 192, 205 }, /* Profile 55. */
-            { 192, 205 }, /* Profile 56. */
-            { 192, 205 }, /* Profile 57. */
+            { 320, 333 }, /* Profile 2. */
+            { 304, 317 }, /* Profile 3. */
+            { 320, 333 }, /* Profile 4. */
+            { 336, 349 }, /* Profile 5. */
+            { 336, 349 }, /* Profile 6. */
+            { 320, 333 }, /* Profile 7. */
+            { 304, 317 }, /* Profile 8. */
+            { 320, 333 }, /* Profile 9. */
+            { 336, 349 }, /* Profile 10. */
+            { 336, 349 }, /* Profile 11. */
+            { 320, 333 }, /* Profile 12. */
+            { 304, 317 }, /* Profile 13. */
+            { 320, 333 }, /* Profile 14. */
+            { 336, 349 }, /* Profile 15. */
+            { 320, 333 }, /* Profile 16. */
+            { 304, 317 }, /* Profile 17. */
+            { 320, 333 }, /* Profile 18. */
+            { 336, 349 }, /* Profile 19. */
+            { 336, 349 }, /* Profile 20. */
+            { 320, 333 }, /* Profile 21. */
+            { 304, 317 }, /* Profile 22. */
+            { 320, 333 }, /* Profile 23. */
+            { 336, 349 }, /* Profile 24. */
+            { 336, 349 }, /* Profile 25. */
+            { 320, 333 }, /* Profile 26. */
+            { 304, 317 }, /* Profile 27. */
+            { 320, 333 }, /* Profile 28. */
+            { 336, 349 }, /* Profile 29. */
+            { 320, 333 }, /* Profile 30. */
+            { 304, 317 }, /* Profile 31. */
+            { 320, 333 }, /* Profile 32. */
+            { 336, 349 }, /* Profile 33. */
+            { 336, 349 }, /* Profile 34. */
+            { 320, 333 }, /* Profile 35. */
+            { 304, 317 }, /* Profile 36. */
+            { 320, 333 }, /* Profile 37. */
+            { 336, 349 }, /* Profile 38. */
+            { 336, 349 }, /* Profile 39. */
+            { 320, 333 }, /* Profile 40. */
+            { 304, 317 }, /* Profile 41. */
+            { 320, 333 }, /* Profile 42. */
+            { 336, 349 }, /* Profile 43. */
+            { 320, 333 }, /* Profile 44. */
+            { 304, 317 }, /* Profile 45. */
+            { 320, 333 }, /* Profile 46. */
+            { 336, 349 }, /* Profile 47. */
+            { 336, 349 }, /* Profile 48. */
+            { 320, 333 }, /* Profile 49. */
+            { 304, 317 }, /* Profile 50. */
+            { 320, 333 }, /* Profile 51. */
+            { 336, 349 }, /* Profile 52. */
+            { 336, 349 }, /* Profile 53. */
+            { 320, 333 }, /* Profile 54. */
+            { 304, 317 }, /* Profile 55. */
+            { 320, 333 }, /* Profile 56. */
+            { 336, 349 }, /* Profile 57. */
         },
         .profile_cnt = 58,
     },
     {
         .name = "L3_OIF_1_13_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -2428,7 +2428,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "L3_SNAT_INDEX_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -2492,7 +2492,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "MAC_DA_23_20_3_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -2554,7 +2554,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "MPLS_LABEL_DECAP_COUNT_3_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -2619,137 +2619,137 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
             { 256, 271 }, /* Profile 2. */
-            { 256, 271 }, /* Profile 3. */
+            { 240, 255 }, /* Profile 3. */
             { 256, 271 }, /* Profile 4. */
-            { 288, 303 }, /* Profile 5. */
-            { 288, 303 }, /* Profile 6. */
+            { 272, 287 }, /* Profile 5. */
+            { 272, 287 }, /* Profile 6. */
             { 256, 271 }, /* Profile 7. */
-            { 256, 271 }, /* Profile 8. */
+            { 240, 255 }, /* Profile 8. */
             { 256, 271 }, /* Profile 9. */
-            { 288, 303 }, /* Profile 10. */
-            { 288, 303 }, /* Profile 11. */
+            { 272, 287 }, /* Profile 10. */
+            { 272, 287 }, /* Profile 11. */
             { 256, 271 }, /* Profile 12. */
-            { 256, 271 }, /* Profile 13. */
+            { 240, 255 }, /* Profile 13. */
             { 256, 271 }, /* Profile 14. */
-            { 288, 303 }, /* Profile 15. */
+            { 272, 287 }, /* Profile 15. */
             { 256, 271 }, /* Profile 16. */
-            { 256, 271 }, /* Profile 17. */
+            { 240, 255 }, /* Profile 17. */
             { 256, 271 }, /* Profile 18. */
-            { 288, 303 }, /* Profile 19. */
-            { 288, 303 }, /* Profile 20. */
+            { 272, 287 }, /* Profile 19. */
+            { 272, 287 }, /* Profile 20. */
             { 256, 271 }, /* Profile 21. */
-            { 256, 271 }, /* Profile 22. */
+            { 240, 255 }, /* Profile 22. */
             { 256, 271 }, /* Profile 23. */
-            { 288, 303 }, /* Profile 24. */
-            { 288, 303 }, /* Profile 25. */
+            { 272, 287 }, /* Profile 24. */
+            { 272, 287 }, /* Profile 25. */
             { 256, 271 }, /* Profile 26. */
-            { 256, 271 }, /* Profile 27. */
+            { 240, 255 }, /* Profile 27. */
             { 256, 271 }, /* Profile 28. */
-            { 288, 303 }, /* Profile 29. */
-            { 256, 271 }, /* Profile 30. */
+            { 272, 287 }, /* Profile 29. */
+            { 272, 287 }, /* Profile 30. */
             { 256, 271 }, /* Profile 31. */
-            { 256, 271 }, /* Profile 32. */
+            { 272, 287 }, /* Profile 32. */
             { 288, 303 }, /* Profile 33. */
             { 288, 303 }, /* Profile 34. */
-            { 256, 271 }, /* Profile 35. */
+            { 272, 287 }, /* Profile 35. */
             { 256, 271 }, /* Profile 36. */
-            { 256, 271 }, /* Profile 37. */
+            { 272, 287 }, /* Profile 37. */
             { 288, 303 }, /* Profile 38. */
             { 288, 303 }, /* Profile 39. */
-            { 256, 271 }, /* Profile 40. */
+            { 272, 287 }, /* Profile 40. */
             { 256, 271 }, /* Profile 41. */
-            { 256, 271 }, /* Profile 42. */
+            { 272, 287 }, /* Profile 42. */
             { 288, 303 }, /* Profile 43. */
-            { 256, 271 }, /* Profile 44. */
+            { 272, 287 }, /* Profile 44. */
             { 256, 271 }, /* Profile 45. */
-            { 256, 271 }, /* Profile 46. */
+            { 272, 287 }, /* Profile 46. */
             { 288, 303 }, /* Profile 47. */
             { 288, 303 }, /* Profile 48. */
-            { 256, 271 }, /* Profile 49. */
+            { 272, 287 }, /* Profile 49. */
             { 256, 271 }, /* Profile 50. */
-            { 256, 271 }, /* Profile 51. */
+            { 272, 287 }, /* Profile 51. */
             { 288, 303 }, /* Profile 52. */
             { 288, 303 }, /* Profile 53. */
-            { 256, 271 }, /* Profile 54. */
+            { 272, 287 }, /* Profile 54. */
             { 256, 271 }, /* Profile 55. */
-            { 256, 271 }, /* Profile 56. */
+            { 272, 287 }, /* Profile 56. */
             { 288, 303 }, /* Profile 57. */
         },
         .profile_cnt = 58,
     },
     {
         .name = "NHOP_INDEX_1_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 304, 319 }, /* Profile 2. */
-            { 304, 319 }, /* Profile 3. */
-            { 304, 319 }, /* Profile 4. */
-            { 336, 351 }, /* Profile 5. */
-            { 336, 351 }, /* Profile 6. */
-            { 304, 319 }, /* Profile 7. */
-            { 304, 319 }, /* Profile 8. */
-            { 304, 319 }, /* Profile 9. */
-            { 336, 351 }, /* Profile 10. */
-            { 336, 351 }, /* Profile 11. */
-            { 304, 319 }, /* Profile 12. */
-            { 304, 319 }, /* Profile 13. */
-            { 304, 319 }, /* Profile 14. */
-            { 336, 351 }, /* Profile 15. */
-            { 304, 319 }, /* Profile 16. */
-            { 304, 319 }, /* Profile 17. */
-            { 304, 319 }, /* Profile 18. */
-            { 336, 351 }, /* Profile 19. */
-            { 336, 351 }, /* Profile 20. */
-            { 304, 319 }, /* Profile 21. */
-            { 304, 319 }, /* Profile 22. */
-            { 304, 319 }, /* Profile 23. */
-            { 336, 351 }, /* Profile 24. */
-            { 336, 351 }, /* Profile 25. */
-            { 304, 319 }, /* Profile 26. */
-            { 304, 319 }, /* Profile 27. */
-            { 304, 319 }, /* Profile 28. */
-            { 336, 351 }, /* Profile 29. */
-            { 304, 319 }, /* Profile 30. */
-            { 304, 319 }, /* Profile 31. */
-            { 304, 319 }, /* Profile 32. */
-            { 336, 351 }, /* Profile 33. */
-            { 336, 351 }, /* Profile 34. */
-            { 304, 319 }, /* Profile 35. */
-            { 304, 319 }, /* Profile 36. */
-            { 304, 319 }, /* Profile 37. */
-            { 336, 351 }, /* Profile 38. */
-            { 336, 351 }, /* Profile 39. */
-            { 304, 319 }, /* Profile 40. */
-            { 304, 319 }, /* Profile 41. */
-            { 304, 319 }, /* Profile 42. */
-            { 336, 351 }, /* Profile 43. */
-            { 304, 319 }, /* Profile 44. */
-            { 304, 319 }, /* Profile 45. */
-            { 304, 319 }, /* Profile 46. */
-            { 336, 351 }, /* Profile 47. */
-            { 336, 351 }, /* Profile 48. */
-            { 304, 319 }, /* Profile 49. */
-            { 304, 319 }, /* Profile 50. */
-            { 304, 319 }, /* Profile 51. */
-            { 336, 351 }, /* Profile 52. */
-            { 336, 351 }, /* Profile 53. */
-            { 304, 319 }, /* Profile 54. */
-            { 304, 319 }, /* Profile 55. */
-            { 304, 319 }, /* Profile 56. */
-            { 336, 351 }, /* Profile 57. */
+            { 224, 239 }, /* Profile 2. */
+            { 208, 223 }, /* Profile 3. */
+            { 224, 239 }, /* Profile 4. */
+            { 240, 255 }, /* Profile 5. */
+            { 240, 255 }, /* Profile 6. */
+            { 224, 239 }, /* Profile 7. */
+            { 208, 223 }, /* Profile 8. */
+            { 224, 239 }, /* Profile 9. */
+            { 240, 255 }, /* Profile 10. */
+            { 240, 255 }, /* Profile 11. */
+            { 224, 239 }, /* Profile 12. */
+            { 208, 223 }, /* Profile 13. */
+            { 224, 239 }, /* Profile 14. */
+            { 240, 255 }, /* Profile 15. */
+            { 224, 239 }, /* Profile 16. */
+            { 208, 223 }, /* Profile 17. */
+            { 224, 239 }, /* Profile 18. */
+            { 240, 255 }, /* Profile 19. */
+            { 240, 255 }, /* Profile 20. */
+            { 224, 239 }, /* Profile 21. */
+            { 208, 223 }, /* Profile 22. */
+            { 224, 239 }, /* Profile 23. */
+            { 240, 255 }, /* Profile 24. */
+            { 240, 255 }, /* Profile 25. */
+            { 224, 239 }, /* Profile 26. */
+            { 208, 223 }, /* Profile 27. */
+            { 224, 239 }, /* Profile 28. */
+            { 240, 255 }, /* Profile 29. */
+            { 240, 255 }, /* Profile 30. */
+            { 224, 239 }, /* Profile 31. */
+            { 240, 255 }, /* Profile 32. */
+            { 256, 271 }, /* Profile 33. */
+            { 256, 271 }, /* Profile 34. */
+            { 240, 255 }, /* Profile 35. */
+            { 224, 239 }, /* Profile 36. */
+            { 240, 255 }, /* Profile 37. */
+            { 256, 271 }, /* Profile 38. */
+            { 256, 271 }, /* Profile 39. */
+            { 240, 255 }, /* Profile 40. */
+            { 224, 239 }, /* Profile 41. */
+            { 240, 255 }, /* Profile 42. */
+            { 256, 271 }, /* Profile 43. */
+            { 240, 255 }, /* Profile 44. */
+            { 224, 239 }, /* Profile 45. */
+            { 240, 255 }, /* Profile 46. */
+            { 256, 271 }, /* Profile 47. */
+            { 256, 271 }, /* Profile 48. */
+            { 240, 255 }, /* Profile 49. */
+            { 224, 239 }, /* Profile 50. */
+            { 240, 255 }, /* Profile 51. */
+            { 256, 271 }, /* Profile 52. */
+            { 256, 271 }, /* Profile 53. */
+            { 240, 255 }, /* Profile 54. */
+            { 224, 239 }, /* Profile 55. */
+            { 240, 255 }, /* Profile 56. */
+            { 256, 271 }, /* Profile 57. */
         },
         .profile_cnt = 58,
     },
     {
         .name = "PARSER_VHLEN_0_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -2814,198 +2814,198 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "PKT_MISC_CTRL_0_3_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 464, 467 }, /* Profile 2. */
-            { 444, 447 }, /* Profile 3. */
-            { 464, 467 }, /* Profile 4. */
-            { 464, 467 }, /* Profile 5. */
-            { 464, 467 }, /* Profile 6. */
-            { 464, 467 }, /* Profile 7. */
-            { 444, 447 }, /* Profile 8. */
-            { 464, 467 }, /* Profile 9. */
-            { 464, 467 }, /* Profile 10. */
-            { 464, 467 }, /* Profile 11. */
-            { 460, 463 }, /* Profile 12. */
-            { 440, 443 }, /* Profile 13. */
-            { 460, 463 }, /* Profile 14. */
-            { 460, 463 }, /* Profile 15. */
-            { 464, 467 }, /* Profile 16. */
-            { 444, 447 }, /* Profile 17. */
-            { 464, 467 }, /* Profile 18. */
-            { 464, 467 }, /* Profile 19. */
-            { 464, 467 }, /* Profile 20. */
-            { 464, 467 }, /* Profile 21. */
-            { 444, 447 }, /* Profile 22. */
-            { 464, 467 }, /* Profile 23. */
-            { 464, 467 }, /* Profile 24. */
-            { 464, 467 }, /* Profile 25. */
-            { 460, 463 }, /* Profile 26. */
-            { 440, 443 }, /* Profile 27. */
-            { 460, 463 }, /* Profile 28. */
-            { 460, 463 }, /* Profile 29. */
-            { 464, 467 }, /* Profile 30. */
-            { 444, 447 }, /* Profile 31. */
-            { 464, 467 }, /* Profile 32. */
-            { 464, 467 }, /* Profile 33. */
-            { 464, 467 }, /* Profile 34. */
-            { 464, 467 }, /* Profile 35. */
-            { 444, 447 }, /* Profile 36. */
-            { 464, 467 }, /* Profile 37. */
-            { 464, 467 }, /* Profile 38. */
-            { 464, 467 }, /* Profile 39. */
-            { 460, 463 }, /* Profile 40. */
-            { 440, 443 }, /* Profile 41. */
-            { 460, 463 }, /* Profile 42. */
-            { 460, 463 }, /* Profile 43. */
-            { 464, 467 }, /* Profile 44. */
-            { 444, 447 }, /* Profile 45. */
-            { 464, 467 }, /* Profile 46. */
-            { 464, 467 }, /* Profile 47. */
-            { 464, 467 }, /* Profile 48. */
-            { 464, 467 }, /* Profile 49. */
-            { 444, 447 }, /* Profile 50. */
-            { 464, 467 }, /* Profile 51. */
-            { 464, 467 }, /* Profile 52. */
-            { 464, 467 }, /* Profile 53. */
-            { 460, 463 }, /* Profile 54. */
-            { 440, 443 }, /* Profile 55. */
-            { 460, 463 }, /* Profile 56. */
-            { 460, 463 }, /* Profile 57. */
+            { 428, 431 }, /* Profile 2. */
+            { 396, 399 }, /* Profile 3. */
+            { 432, 435 }, /* Profile 4. */
+            { 428, 431 }, /* Profile 5. */
+            { 428, 431 }, /* Profile 6. */
+            { 428, 431 }, /* Profile 7. */
+            { 396, 399 }, /* Profile 8. */
+            { 432, 435 }, /* Profile 9. */
+            { 428, 431 }, /* Profile 10. */
+            { 428, 431 }, /* Profile 11. */
+            { 428, 431 }, /* Profile 12. */
+            { 396, 399 }, /* Profile 13. */
+            { 432, 435 }, /* Profile 14. */
+            { 428, 431 }, /* Profile 15. */
+            { 428, 431 }, /* Profile 16. */
+            { 396, 399 }, /* Profile 17. */
+            { 432, 435 }, /* Profile 18. */
+            { 428, 431 }, /* Profile 19. */
+            { 428, 431 }, /* Profile 20. */
+            { 428, 431 }, /* Profile 21. */
+            { 396, 399 }, /* Profile 22. */
+            { 432, 435 }, /* Profile 23. */
+            { 428, 431 }, /* Profile 24. */
+            { 428, 431 }, /* Profile 25. */
+            { 428, 431 }, /* Profile 26. */
+            { 396, 399 }, /* Profile 27. */
+            { 432, 435 }, /* Profile 28. */
+            { 428, 431 }, /* Profile 29. */
+            { 428, 431 }, /* Profile 30. */
+            { 396, 399 }, /* Profile 31. */
+            { 432, 435 }, /* Profile 32. */
+            { 428, 431 }, /* Profile 33. */
+            { 428, 431 }, /* Profile 34. */
+            { 428, 431 }, /* Profile 35. */
+            { 396, 399 }, /* Profile 36. */
+            { 432, 435 }, /* Profile 37. */
+            { 428, 431 }, /* Profile 38. */
+            { 428, 431 }, /* Profile 39. */
+            { 428, 431 }, /* Profile 40. */
+            { 396, 399 }, /* Profile 41. */
+            { 432, 435 }, /* Profile 42. */
+            { 428, 431 }, /* Profile 43. */
+            { 428, 431 }, /* Profile 44. */
+            { 396, 399 }, /* Profile 45. */
+            { 432, 435 }, /* Profile 46. */
+            { 428, 431 }, /* Profile 47. */
+            { 428, 431 }, /* Profile 48. */
+            { 428, 431 }, /* Profile 49. */
+            { 396, 399 }, /* Profile 50. */
+            { 432, 435 }, /* Profile 51. */
+            { 428, 431 }, /* Profile 52. */
+            { 428, 431 }, /* Profile 53. */
+            { 428, 431 }, /* Profile 54. */
+            { 396, 399 }, /* Profile 55. */
+            { 432, 435 }, /* Profile 56. */
+            { 428, 431 }, /* Profile 57. */
         },
         .profile_cnt = 58,
     },
     {
         .name = "SRV6_DIP_EDIT_CTRL_3_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SRV6_DIP_EDIT_CTRL_3_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SRV6_DIP_EDIT_CTRL_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
             { -1, -1 }, /* Profile 2. */
-            { 428, 431 }, /* Profile 3. */
+            { 424, 427 }, /* Profile 3. */
             { -1, -1 }, /* Profile 4. */
             { -1, -1 }, /* Profile 5. */
             { -1, -1 }, /* Profile 6. */
             { -1, -1 }, /* Profile 7. */
-            { 428, 431 }, /* Profile 8. */
+            { 424, 427 }, /* Profile 8. */
             { -1, -1 }, /* Profile 9. */
             { -1, -1 }, /* Profile 10. */
             { -1, -1 }, /* Profile 11. */
             { -1, -1 }, /* Profile 12. */
-            { 428, 431 }, /* Profile 13. */
+            { 424, 427 }, /* Profile 13. */
             { -1, -1 }, /* Profile 14. */
             { -1, -1 }, /* Profile 15. */
             { -1, -1 }, /* Profile 16. */
-            { 428, 431 }, /* Profile 17. */
+            { 424, 427 }, /* Profile 17. */
             { -1, -1 }, /* Profile 18. */
             { -1, -1 }, /* Profile 19. */
             { -1, -1 }, /* Profile 20. */
             { -1, -1 }, /* Profile 21. */
-            { 428, 431 }, /* Profile 22. */
+            { 424, 427 }, /* Profile 22. */
             { -1, -1 }, /* Profile 23. */
             { -1, -1 }, /* Profile 24. */
             { -1, -1 }, /* Profile 25. */
             { -1, -1 }, /* Profile 26. */
-            { 428, 431 }, /* Profile 27. */
+            { 424, 427 }, /* Profile 27. */
             { -1, -1 }, /* Profile 28. */
             { -1, -1 }, /* Profile 29. */
             { -1, -1 }, /* Profile 30. */
-            { 428, 431 }, /* Profile 31. */
+            { 424, 427 }, /* Profile 31. */
             { -1, -1 }, /* Profile 32. */
             { -1, -1 }, /* Profile 33. */
             { -1, -1 }, /* Profile 34. */
             { -1, -1 }, /* Profile 35. */
-            { 428, 431 }, /* Profile 36. */
+            { 424, 427 }, /* Profile 36. */
             { -1, -1 }, /* Profile 37. */
             { -1, -1 }, /* Profile 38. */
             { -1, -1 }, /* Profile 39. */
             { -1, -1 }, /* Profile 40. */
-            { 428, 431 }, /* Profile 41. */
+            { 424, 427 }, /* Profile 41. */
             { -1, -1 }, /* Profile 42. */
             { -1, -1 }, /* Profile 43. */
             { -1, -1 }, /* Profile 44. */
-            { 428, 431 }, /* Profile 45. */
+            { 424, 427 }, /* Profile 45. */
             { -1, -1 }, /* Profile 46. */
             { -1, -1 }, /* Profile 47. */
             { -1, -1 }, /* Profile 48. */
             { -1, -1 }, /* Profile 49. */
-            { 428, 431 }, /* Profile 50. */
+            { 424, 427 }, /* Profile 50. */
             { -1, -1 }, /* Profile 51. */
             { -1, -1 }, /* Profile 52. */
             { -1, -1 }, /* Profile 53. */
             { -1, -1 }, /* Profile 54. */
-            { 428, 431 }, /* Profile 55. */
+            { 424, 427 }, /* Profile 55. */
         },
         .profile_cnt = 56,
     },
     {
         .name = "SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
             { -1, -1 }, /* Profile 2. */
-            { 396, 399 }, /* Profile 3. */
+            { 432, 435 }, /* Profile 3. */
             { -1, -1 }, /* Profile 4. */
             { -1, -1 }, /* Profile 5. */
             { -1, -1 }, /* Profile 6. */
             { -1, -1 }, /* Profile 7. */
-            { 396, 399 }, /* Profile 8. */
+            { 432, 435 }, /* Profile 8. */
             { -1, -1 }, /* Profile 9. */
             { -1, -1 }, /* Profile 10. */
             { -1, -1 }, /* Profile 11. */
             { -1, -1 }, /* Profile 12. */
-            { 396, 399 }, /* Profile 13. */
+            { 428, 431 }, /* Profile 13. */
             { -1, -1 }, /* Profile 14. */
             { -1, -1 }, /* Profile 15. */
             { -1, -1 }, /* Profile 16. */
-            { 396, 399 }, /* Profile 17. */
+            { 432, 435 }, /* Profile 17. */
             { -1, -1 }, /* Profile 18. */
             { -1, -1 }, /* Profile 19. */
             { -1, -1 }, /* Profile 20. */
             { -1, -1 }, /* Profile 21. */
-            { 396, 399 }, /* Profile 22. */
+            { 432, 435 }, /* Profile 22. */
             { -1, -1 }, /* Profile 23. */
             { -1, -1 }, /* Profile 24. */
             { -1, -1 }, /* Profile 25. */
             { -1, -1 }, /* Profile 26. */
-            { 396, 399 }, /* Profile 27. */
+            { 428, 431 }, /* Profile 27. */
             { -1, -1 }, /* Profile 28. */
             { -1, -1 }, /* Profile 29. */
             { -1, -1 }, /* Profile 30. */
-            { 396, 399 }, /* Profile 31. */
+            { 432, 435 }, /* Profile 31. */
             { -1, -1 }, /* Profile 32. */
             { -1, -1 }, /* Profile 33. */
             { -1, -1 }, /* Profile 34. */
             { -1, -1 }, /* Profile 35. */
-            { 396, 399 }, /* Profile 36. */
+            { 432, 435 }, /* Profile 36. */
             { -1, -1 }, /* Profile 37. */
             { -1, -1 }, /* Profile 38. */
             { -1, -1 }, /* Profile 39. */
             { -1, -1 }, /* Profile 40. */
-            { 396, 399 }, /* Profile 41. */
+            { 428, 431 }, /* Profile 41. */
             { -1, -1 }, /* Profile 42. */
             { -1, -1 }, /* Profile 43. */
             { -1, -1 }, /* Profile 44. */
-            { 396, 399 }, /* Profile 45. */
+            { 432, 435 }, /* Profile 45. */
             { -1, -1 }, /* Profile 46. */
             { -1, -1 }, /* Profile 47. */
             { -1, -1 }, /* Profile 48. */
             { -1, -1 }, /* Profile 49. */
-            { 396, 399 }, /* Profile 50. */
+            { 432, 435 }, /* Profile 50. */
             { -1, -1 }, /* Profile 51. */
             { -1, -1 }, /* Profile 52. */
             { -1, -1 }, /* Profile 53. */
             { -1, -1 }, /* Profile 54. */
-            { 396, 399 }, /* Profile 55. */
+            { 428, 431 }, /* Profile 55. */
         },
         .profile_cnt = 56,
     },
     {
         .name = "SRV6_NEW_GSID_SI_2_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -3068,7 +3068,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "SRV6_SID_AND_PREFIX_LEN_ENC_3_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SRV6_SID_AND_PREFIX_LEN_ENC_3_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SRV6_SID_AND_PREFIX_LEN_ENC_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -3131,137 +3131,137 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "SVP_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SVP_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVP_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 288, 303 }, /* Profile 2. */
-            { 288, 303 }, /* Profile 3. */
-            { 288, 303 }, /* Profile 4. */
-            { 320, 335 }, /* Profile 5. */
-            { 320, 335 }, /* Profile 6. */
-            { 288, 303 }, /* Profile 7. */
-            { 288, 303 }, /* Profile 8. */
-            { 288, 303 }, /* Profile 9. */
-            { 320, 335 }, /* Profile 10. */
-            { 320, 335 }, /* Profile 11. */
-            { 288, 303 }, /* Profile 12. */
-            { 288, 303 }, /* Profile 13. */
-            { 288, 303 }, /* Profile 14. */
-            { 320, 335 }, /* Profile 15. */
-            { 288, 303 }, /* Profile 16. */
-            { 288, 303 }, /* Profile 17. */
-            { 288, 303 }, /* Profile 18. */
-            { 320, 335 }, /* Profile 19. */
-            { 320, 335 }, /* Profile 20. */
-            { 288, 303 }, /* Profile 21. */
-            { 288, 303 }, /* Profile 22. */
-            { 288, 303 }, /* Profile 23. */
-            { 320, 335 }, /* Profile 24. */
-            { 320, 335 }, /* Profile 25. */
-            { 288, 303 }, /* Profile 26. */
-            { 288, 303 }, /* Profile 27. */
-            { 288, 303 }, /* Profile 28. */
-            { 320, 335 }, /* Profile 29. */
-            { 288, 303 }, /* Profile 30. */
-            { 288, 303 }, /* Profile 31. */
-            { 288, 303 }, /* Profile 32. */
-            { 320, 335 }, /* Profile 33. */
-            { 320, 335 }, /* Profile 34. */
-            { 288, 303 }, /* Profile 35. */
-            { 288, 303 }, /* Profile 36. */
-            { 288, 303 }, /* Profile 37. */
-            { 320, 335 }, /* Profile 38. */
-            { 320, 335 }, /* Profile 39. */
-            { 288, 303 }, /* Profile 40. */
-            { 288, 303 }, /* Profile 41. */
-            { 288, 303 }, /* Profile 42. */
-            { 320, 335 }, /* Profile 43. */
-            { 288, 303 }, /* Profile 44. */
-            { 288, 303 }, /* Profile 45. */
-            { 288, 303 }, /* Profile 46. */
-            { 320, 335 }, /* Profile 47. */
-            { 320, 335 }, /* Profile 48. */
-            { 288, 303 }, /* Profile 49. */
-            { 288, 303 }, /* Profile 50. */
-            { 288, 303 }, /* Profile 51. */
-            { 320, 335 }, /* Profile 52. */
-            { 320, 335 }, /* Profile 53. */
-            { 288, 303 }, /* Profile 54. */
-            { 288, 303 }, /* Profile 55. */
-            { 288, 303 }, /* Profile 56. */
-            { 320, 335 }, /* Profile 57. */
+            { 240, 255 }, /* Profile 2. */
+            { 224, 239 }, /* Profile 3. */
+            { 240, 255 }, /* Profile 4. */
+            { 256, 271 }, /* Profile 5. */
+            { 256, 271 }, /* Profile 6. */
+            { 240, 255 }, /* Profile 7. */
+            { 224, 239 }, /* Profile 8. */
+            { 240, 255 }, /* Profile 9. */
+            { 256, 271 }, /* Profile 10. */
+            { 256, 271 }, /* Profile 11. */
+            { 240, 255 }, /* Profile 12. */
+            { 224, 239 }, /* Profile 13. */
+            { 240, 255 }, /* Profile 14. */
+            { 256, 271 }, /* Profile 15. */
+            { 240, 255 }, /* Profile 16. */
+            { 224, 239 }, /* Profile 17. */
+            { 240, 255 }, /* Profile 18. */
+            { 256, 271 }, /* Profile 19. */
+            { 256, 271 }, /* Profile 20. */
+            { 240, 255 }, /* Profile 21. */
+            { 224, 239 }, /* Profile 22. */
+            { 240, 255 }, /* Profile 23. */
+            { 256, 271 }, /* Profile 24. */
+            { 256, 271 }, /* Profile 25. */
+            { 240, 255 }, /* Profile 26. */
+            { 224, 239 }, /* Profile 27. */
+            { 240, 255 }, /* Profile 28. */
+            { 256, 271 }, /* Profile 29. */
+            { 256, 271 }, /* Profile 30. */
+            { 240, 255 }, /* Profile 31. */
+            { 256, 271 }, /* Profile 32. */
+            { 272, 287 }, /* Profile 33. */
+            { 272, 287 }, /* Profile 34. */
+            { 256, 271 }, /* Profile 35. */
+            { 240, 255 }, /* Profile 36. */
+            { 256, 271 }, /* Profile 37. */
+            { 272, 287 }, /* Profile 38. */
+            { 272, 287 }, /* Profile 39. */
+            { 256, 271 }, /* Profile 40. */
+            { 240, 255 }, /* Profile 41. */
+            { 256, 271 }, /* Profile 42. */
+            { 272, 287 }, /* Profile 43. */
+            { 256, 271 }, /* Profile 44. */
+            { 240, 255 }, /* Profile 45. */
+            { 256, 271 }, /* Profile 46. */
+            { 272, 287 }, /* Profile 47. */
+            { 272, 287 }, /* Profile 48. */
+            { 256, 271 }, /* Profile 49. */
+            { 240, 255 }, /* Profile 50. */
+            { 256, 271 }, /* Profile 51. */
+            { 272, 287 }, /* Profile 52. */
+            { 272, 287 }, /* Profile 53. */
+            { 256, 271 }, /* Profile 54. */
+            { 240, 255 }, /* Profile 55. */
+            { 256, 271 }, /* Profile 56. */
+            { 272, 287 }, /* Profile 57. */
         },
         .profile_cnt = 58,
     },
     {
         .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 428, 431 }, /* Profile 2. */
-            { 400, 403 }, /* Profile 3. */
-            { 432, 435 }, /* Profile 4. */
-            { 428, 431 }, /* Profile 5. */
-            { 428, 431 }, /* Profile 6. */
-            { 428, 431 }, /* Profile 7. */
-            { 400, 403 }, /* Profile 8. */
-            { 432, 435 }, /* Profile 9. */
-            { 428, 431 }, /* Profile 10. */
-            { 428, 431 }, /* Profile 11. */
-            { 428, 431 }, /* Profile 12. */
-            { 400, 403 }, /* Profile 13. */
-            { 432, 435 }, /* Profile 14. */
-            { 428, 431 }, /* Profile 15. */
-            { 428, 431 }, /* Profile 16. */
-            { 400, 403 }, /* Profile 17. */
-            { 432, 435 }, /* Profile 18. */
-            { 428, 431 }, /* Profile 19. */
-            { 428, 431 }, /* Profile 20. */
-            { 428, 431 }, /* Profile 21. */
-            { 400, 403 }, /* Profile 22. */
-            { 432, 435 }, /* Profile 23. */
-            { 428, 431 }, /* Profile 24. */
-            { 428, 431 }, /* Profile 25. */
-            { 428, 431 }, /* Profile 26. */
-            { 400, 403 }, /* Profile 27. */
-            { 432, 435 }, /* Profile 28. */
-            { 428, 431 }, /* Profile 29. */
-            { 428, 431 }, /* Profile 30. */
-            { 400, 403 }, /* Profile 31. */
-            { 432, 435 }, /* Profile 32. */
-            { 428, 431 }, /* Profile 33. */
-            { 428, 431 }, /* Profile 34. */
-            { 428, 431 }, /* Profile 35. */
-            { 400, 403 }, /* Profile 36. */
-            { 432, 435 }, /* Profile 37. */
-            { 428, 431 }, /* Profile 38. */
-            { 428, 431 }, /* Profile 39. */
-            { 428, 431 }, /* Profile 40. */
-            { 400, 403 }, /* Profile 41. */
-            { 432, 435 }, /* Profile 42. */
-            { 428, 431 }, /* Profile 43. */
-            { 428, 431 }, /* Profile 44. */
-            { 400, 403 }, /* Profile 45. */
-            { 432, 435 }, /* Profile 46. */
-            { 428, 431 }, /* Profile 47. */
-            { 428, 431 }, /* Profile 48. */
-            { 428, 431 }, /* Profile 49. */
-            { 400, 403 }, /* Profile 50. */
-            { 432, 435 }, /* Profile 51. */
-            { 428, 431 }, /* Profile 52. */
-            { 428, 431 }, /* Profile 53. */
-            { 428, 431 }, /* Profile 54. */
-            { 400, 403 }, /* Profile 55. */
-            { 432, 435 }, /* Profile 56. */
-            { 428, 431 }, /* Profile 57. */
+            { 424, 427 }, /* Profile 2. */
+            { 392, 395 }, /* Profile 3. */
+            { 428, 431 }, /* Profile 4. */
+            { 424, 427 }, /* Profile 5. */
+            { 424, 427 }, /* Profile 6. */
+            { 424, 427 }, /* Profile 7. */
+            { 392, 395 }, /* Profile 8. */
+            { 428, 431 }, /* Profile 9. */
+            { 424, 427 }, /* Profile 10. */
+            { 424, 427 }, /* Profile 11. */
+            { 424, 427 }, /* Profile 12. */
+            { 392, 395 }, /* Profile 13. */
+            { 428, 431 }, /* Profile 14. */
+            { 424, 427 }, /* Profile 15. */
+            { 424, 427 }, /* Profile 16. */
+            { 392, 395 }, /* Profile 17. */
+            { 428, 431 }, /* Profile 18. */
+            { 424, 427 }, /* Profile 19. */
+            { 424, 427 }, /* Profile 20. */
+            { 424, 427 }, /* Profile 21. */
+            { 392, 395 }, /* Profile 22. */
+            { 428, 431 }, /* Profile 23. */
+            { 424, 427 }, /* Profile 24. */
+            { 424, 427 }, /* Profile 25. */
+            { 424, 427 }, /* Profile 26. */
+            { 392, 395 }, /* Profile 27. */
+            { 428, 431 }, /* Profile 28. */
+            { 424, 427 }, /* Profile 29. */
+            { 424, 427 }, /* Profile 30. */
+            { 392, 395 }, /* Profile 31. */
+            { 428, 431 }, /* Profile 32. */
+            { 424, 427 }, /* Profile 33. */
+            { 424, 427 }, /* Profile 34. */
+            { 424, 427 }, /* Profile 35. */
+            { 392, 395 }, /* Profile 36. */
+            { 428, 431 }, /* Profile 37. */
+            { 424, 427 }, /* Profile 38. */
+            { 424, 427 }, /* Profile 39. */
+            { 424, 427 }, /* Profile 40. */
+            { 392, 395 }, /* Profile 41. */
+            { 428, 431 }, /* Profile 42. */
+            { 424, 427 }, /* Profile 43. */
+            { 424, 427 }, /* Profile 44. */
+            { 392, 395 }, /* Profile 45. */
+            { 428, 431 }, /* Profile 46. */
+            { 424, 427 }, /* Profile 47. */
+            { 424, 427 }, /* Profile 48. */
+            { 424, 427 }, /* Profile 49. */
+            { 392, 395 }, /* Profile 50. */
+            { 428, 431 }, /* Profile 51. */
+            { 424, 427 }, /* Profile 52. */
+            { 424, 427 }, /* Profile 53. */
+            { 424, 427 }, /* Profile 54. */
+            { 392, 395 }, /* Profile 55. */
+            { 428, 431 }, /* Profile 56. */
+            { 424, 427 }, /* Profile 57. */
         },
         .profile_cnt = 58,
     },
     {
         .name = "SVTAG_CTRL_PKT_INFO_3_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SVTAG_CTRL_PKT_INFO_3_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVTAG_CTRL_PKT_INFO_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -3326,72 +3326,72 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "SVTAG_SC_INDEX_OR_IFP_OPAQUE_OBJ_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_OR_IFP_OPAQUE_OBJ_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_OR_IFP_OPAQUE_OBJ_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 208, 223 }, /* Profile 2. */
-            { 208, 223 }, /* Profile 3. */
-            { 208, 223 }, /* Profile 4. */
-            { 208, 223 }, /* Profile 5. */
-            { 208, 223 }, /* Profile 6. */
-            { 208, 223 }, /* Profile 7. */
-            { 208, 223 }, /* Profile 8. */
-            { 208, 223 }, /* Profile 9. */
-            { 208, 223 }, /* Profile 10. */
-            { 208, 223 }, /* Profile 11. */
-            { 208, 223 }, /* Profile 12. */
-            { 208, 223 }, /* Profile 13. */
-            { 208, 223 }, /* Profile 14. */
-            { 208, 223 }, /* Profile 15. */
-            { 208, 223 }, /* Profile 16. */
-            { 208, 223 }, /* Profile 17. */
-            { 208, 223 }, /* Profile 18. */
-            { 208, 223 }, /* Profile 19. */
-            { 208, 223 }, /* Profile 20. */
-            { 208, 223 }, /* Profile 21. */
-            { 208, 223 }, /* Profile 22. */
-            { 208, 223 }, /* Profile 23. */
-            { 208, 223 }, /* Profile 24. */
-            { 208, 223 }, /* Profile 25. */
-            { 208, 223 }, /* Profile 26. */
-            { 208, 223 }, /* Profile 27. */
-            { 208, 223 }, /* Profile 28. */
-            { 208, 223 }, /* Profile 29. */
-            { 224, 239 }, /* Profile 30. */
-            { 224, 239 }, /* Profile 31. */
-            { 224, 239 }, /* Profile 32. */
-            { 224, 239 }, /* Profile 33. */
-            { 224, 239 }, /* Profile 34. */
-            { 224, 239 }, /* Profile 35. */
-            { 224, 239 }, /* Profile 36. */
-            { 224, 239 }, /* Profile 37. */
-            { 224, 239 }, /* Profile 38. */
-            { 224, 239 }, /* Profile 39. */
-            { 224, 239 }, /* Profile 40. */
-            { 224, 239 }, /* Profile 41. */
-            { 224, 239 }, /* Profile 42. */
-            { 224, 239 }, /* Profile 43. */
-            { 224, 239 }, /* Profile 44. */
-            { 224, 239 }, /* Profile 45. */
-            { 224, 239 }, /* Profile 46. */
-            { 224, 239 }, /* Profile 47. */
-            { 224, 239 }, /* Profile 48. */
-            { 224, 239 }, /* Profile 49. */
-            { 224, 239 }, /* Profile 50. */
-            { 224, 239 }, /* Profile 51. */
-            { 224, 239 }, /* Profile 52. */
-            { 224, 239 }, /* Profile 53. */
-            { 224, 239 }, /* Profile 54. */
-            { 224, 239 }, /* Profile 55. */
-            { 224, 239 }, /* Profile 56. */
-            { 224, 239 }, /* Profile 57. */
+            { 192, 207 }, /* Profile 2. */
+            { 192, 207 }, /* Profile 3. */
+            { 192, 207 }, /* Profile 4. */
+            { 224, 239 }, /* Profile 5. */
+            { 224, 239 }, /* Profile 6. */
+            { 192, 207 }, /* Profile 7. */
+            { 192, 207 }, /* Profile 8. */
+            { 192, 207 }, /* Profile 9. */
+            { 224, 239 }, /* Profile 10. */
+            { 224, 239 }, /* Profile 11. */
+            { 192, 207 }, /* Profile 12. */
+            { 192, 207 }, /* Profile 13. */
+            { 192, 207 }, /* Profile 14. */
+            { 224, 239 }, /* Profile 15. */
+            { 192, 207 }, /* Profile 16. */
+            { 192, 207 }, /* Profile 17. */
+            { 192, 207 }, /* Profile 18. */
+            { 224, 239 }, /* Profile 19. */
+            { 224, 239 }, /* Profile 20. */
+            { 192, 207 }, /* Profile 21. */
+            { 192, 207 }, /* Profile 22. */
+            { 192, 207 }, /* Profile 23. */
+            { 224, 239 }, /* Profile 24. */
+            { 224, 239 }, /* Profile 25. */
+            { 192, 207 }, /* Profile 26. */
+            { 192, 207 }, /* Profile 27. */
+            { 192, 207 }, /* Profile 28. */
+            { 224, 239 }, /* Profile 29. */
+            { 208, 223 }, /* Profile 30. */
+            { 208, 223 }, /* Profile 31. */
+            { 208, 223 }, /* Profile 32. */
+            { 240, 255 }, /* Profile 33. */
+            { 240, 255 }, /* Profile 34. */
+            { 208, 223 }, /* Profile 35. */
+            { 208, 223 }, /* Profile 36. */
+            { 208, 223 }, /* Profile 37. */
+            { 240, 255 }, /* Profile 38. */
+            { 240, 255 }, /* Profile 39. */
+            { 208, 223 }, /* Profile 40. */
+            { 208, 223 }, /* Profile 41. */
+            { 208, 223 }, /* Profile 42. */
+            { 240, 255 }, /* Profile 43. */
+            { 208, 223 }, /* Profile 44. */
+            { 208, 223 }, /* Profile 45. */
+            { 208, 223 }, /* Profile 46. */
+            { 240, 255 }, /* Profile 47. */
+            { 240, 255 }, /* Profile 48. */
+            { 208, 223 }, /* Profile 49. */
+            { 208, 223 }, /* Profile 50. */
+            { 208, 223 }, /* Profile 51. */
+            { 240, 255 }, /* Profile 52. */
+            { 240, 255 }, /* Profile 53. */
+            { 208, 223 }, /* Profile 54. */
+            { 208, 223 }, /* Profile 55. */
+            { 208, 223 }, /* Profile 56. */
+            { 240, 255 }, /* Profile 57. */
         },
         .profile_cnt = 58,
     },
     {
         .name = "SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -3456,137 +3456,137 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "SYSTEM_DESTINATION_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 80, 95 }, /* Profile 2. */
-            { 80, 95 }, /* Profile 3. */
-            { 80, 95 }, /* Profile 4. */
-            { 80, 95 }, /* Profile 5. */
-            { 80, 95 }, /* Profile 6. */
-            { 80, 95 }, /* Profile 7. */
-            { 80, 95 }, /* Profile 8. */
-            { 80, 95 }, /* Profile 9. */
-            { 80, 95 }, /* Profile 10. */
-            { 80, 95 }, /* Profile 11. */
-            { 80, 95 }, /* Profile 12. */
-            { 80, 95 }, /* Profile 13. */
-            { 80, 95 }, /* Profile 14. */
-            { 80, 95 }, /* Profile 15. */
-            { 80, 95 }, /* Profile 16. */
-            { 80, 95 }, /* Profile 17. */
-            { 80, 95 }, /* Profile 18. */
-            { 80, 95 }, /* Profile 19. */
-            { 80, 95 }, /* Profile 20. */
-            { 80, 95 }, /* Profile 21. */
-            { 80, 95 }, /* Profile 22. */
-            { 80, 95 }, /* Profile 23. */
-            { 80, 95 }, /* Profile 24. */
-            { 80, 95 }, /* Profile 25. */
-            { 80, 95 }, /* Profile 26. */
-            { 80, 95 }, /* Profile 27. */
-            { 80, 95 }, /* Profile 28. */
-            { 80, 95 }, /* Profile 29. */
-            { 80, 95 }, /* Profile 30. */
-            { 80, 95 }, /* Profile 31. */
-            { 80, 95 }, /* Profile 32. */
-            { 80, 95 }, /* Profile 33. */
-            { 80, 95 }, /* Profile 34. */
-            { 80, 95 }, /* Profile 35. */
-            { 80, 95 }, /* Profile 36. */
-            { 80, 95 }, /* Profile 37. */
-            { 80, 95 }, /* Profile 38. */
-            { 80, 95 }, /* Profile 39. */
-            { 80, 95 }, /* Profile 40. */
-            { 80, 95 }, /* Profile 41. */
-            { 80, 95 }, /* Profile 42. */
-            { 80, 95 }, /* Profile 43. */
-            { 80, 95 }, /* Profile 44. */
-            { 80, 95 }, /* Profile 45. */
-            { 80, 95 }, /* Profile 46. */
-            { 80, 95 }, /* Profile 47. */
-            { 80, 95 }, /* Profile 48. */
-            { 80, 95 }, /* Profile 49. */
-            { 80, 95 }, /* Profile 50. */
-            { 80, 95 }, /* Profile 51. */
-            { 80, 95 }, /* Profile 52. */
-            { 80, 95 }, /* Profile 53. */
-            { 80, 95 }, /* Profile 54. */
-            { 80, 95 }, /* Profile 55. */
-            { 80, 95 }, /* Profile 56. */
-            { 80, 95 }, /* Profile 57. */
+            { 176, 191 }, /* Profile 2. */
+            { 176, 191 }, /* Profile 3. */
+            { 176, 191 }, /* Profile 4. */
+            { 208, 223 }, /* Profile 5. */
+            { 208, 223 }, /* Profile 6. */
+            { 176, 191 }, /* Profile 7. */
+            { 176, 191 }, /* Profile 8. */
+            { 176, 191 }, /* Profile 9. */
+            { 208, 223 }, /* Profile 10. */
+            { 208, 223 }, /* Profile 11. */
+            { 176, 191 }, /* Profile 12. */
+            { 176, 191 }, /* Profile 13. */
+            { 176, 191 }, /* Profile 14. */
+            { 208, 223 }, /* Profile 15. */
+            { 176, 191 }, /* Profile 16. */
+            { 176, 191 }, /* Profile 17. */
+            { 176, 191 }, /* Profile 18. */
+            { 208, 223 }, /* Profile 19. */
+            { 208, 223 }, /* Profile 20. */
+            { 176, 191 }, /* Profile 21. */
+            { 176, 191 }, /* Profile 22. */
+            { 176, 191 }, /* Profile 23. */
+            { 208, 223 }, /* Profile 24. */
+            { 208, 223 }, /* Profile 25. */
+            { 176, 191 }, /* Profile 26. */
+            { 176, 191 }, /* Profile 27. */
+            { 176, 191 }, /* Profile 28. */
+            { 208, 223 }, /* Profile 29. */
+            { 192, 207 }, /* Profile 30. */
+            { 192, 207 }, /* Profile 31. */
+            { 192, 207 }, /* Profile 32. */
+            { 224, 239 }, /* Profile 33. */
+            { 224, 239 }, /* Profile 34. */
+            { 192, 207 }, /* Profile 35. */
+            { 192, 207 }, /* Profile 36. */
+            { 192, 207 }, /* Profile 37. */
+            { 224, 239 }, /* Profile 38. */
+            { 224, 239 }, /* Profile 39. */
+            { 192, 207 }, /* Profile 40. */
+            { 192, 207 }, /* Profile 41. */
+            { 192, 207 }, /* Profile 42. */
+            { 224, 239 }, /* Profile 43. */
+            { 192, 207 }, /* Profile 44. */
+            { 192, 207 }, /* Profile 45. */
+            { 192, 207 }, /* Profile 46. */
+            { 224, 239 }, /* Profile 47. */
+            { 224, 239 }, /* Profile 48. */
+            { 192, 207 }, /* Profile 49. */
+            { 192, 207 }, /* Profile 50. */
+            { 192, 207 }, /* Profile 51. */
+            { 224, 239 }, /* Profile 52. */
+            { 224, 239 }, /* Profile 53. */
+            { 192, 207 }, /* Profile 54. */
+            { 192, 207 }, /* Profile 55. */
+            { 192, 207 }, /* Profile 56. */
+            { 224, 239 }, /* Profile 57. */
         },
         .profile_cnt = 58,
     },
     {
         .name = "SYSTEM_OPCODE_3_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 460, 463 }, /* Profile 2. */
-            { 440, 443 }, /* Profile 3. */
-            { 460, 463 }, /* Profile 4. */
-            { 460, 463 }, /* Profile 5. */
-            { 460, 463 }, /* Profile 6. */
-            { 460, 463 }, /* Profile 7. */
-            { 440, 443 }, /* Profile 8. */
-            { 460, 463 }, /* Profile 9. */
-            { 460, 463 }, /* Profile 10. */
-            { 460, 463 }, /* Profile 11. */
-            { 456, 459 }, /* Profile 12. */
-            { 436, 439 }, /* Profile 13. */
-            { 456, 459 }, /* Profile 14. */
-            { 456, 459 }, /* Profile 15. */
-            { 460, 463 }, /* Profile 16. */
-            { 440, 443 }, /* Profile 17. */
-            { 460, 463 }, /* Profile 18. */
-            { 460, 463 }, /* Profile 19. */
-            { 460, 463 }, /* Profile 20. */
-            { 460, 463 }, /* Profile 21. */
-            { 440, 443 }, /* Profile 22. */
-            { 460, 463 }, /* Profile 23. */
-            { 460, 463 }, /* Profile 24. */
-            { 460, 463 }, /* Profile 25. */
-            { 456, 459 }, /* Profile 26. */
-            { 436, 439 }, /* Profile 27. */
-            { 456, 459 }, /* Profile 28. */
-            { 456, 459 }, /* Profile 29. */
-            { 460, 463 }, /* Profile 30. */
-            { 440, 443 }, /* Profile 31. */
-            { 460, 463 }, /* Profile 32. */
-            { 460, 463 }, /* Profile 33. */
-            { 460, 463 }, /* Profile 34. */
-            { 460, 463 }, /* Profile 35. */
-            { 440, 443 }, /* Profile 36. */
-            { 460, 463 }, /* Profile 37. */
-            { 460, 463 }, /* Profile 38. */
-            { 460, 463 }, /* Profile 39. */
-            { 456, 459 }, /* Profile 40. */
-            { 436, 439 }, /* Profile 41. */
-            { 456, 459 }, /* Profile 42. */
-            { 456, 459 }, /* Profile 43. */
-            { 460, 463 }, /* Profile 44. */
-            { 440, 443 }, /* Profile 45. */
-            { 460, 463 }, /* Profile 46. */
-            { 460, 463 }, /* Profile 47. */
-            { 460, 463 }, /* Profile 48. */
-            { 460, 463 }, /* Profile 49. */
-            { 440, 443 }, /* Profile 50. */
-            { 460, 463 }, /* Profile 51. */
-            { 460, 463 }, /* Profile 52. */
-            { 460, 463 }, /* Profile 53. */
-            { 456, 459 }, /* Profile 54. */
-            { 436, 439 }, /* Profile 55. */
-            { 456, 459 }, /* Profile 56. */
-            { 456, 459 }, /* Profile 57. */
+            { 464, 467 }, /* Profile 2. */
+            { 444, 447 }, /* Profile 3. */
+            { 464, 467 }, /* Profile 4. */
+            { 464, 467 }, /* Profile 5. */
+            { 464, 467 }, /* Profile 6. */
+            { 464, 467 }, /* Profile 7. */
+            { 444, 447 }, /* Profile 8. */
+            { 464, 467 }, /* Profile 9. */
+            { 464, 467 }, /* Profile 10. */
+            { 464, 467 }, /* Profile 11. */
+            { 460, 463 }, /* Profile 12. */
+            { 440, 443 }, /* Profile 13. */
+            { 460, 463 }, /* Profile 14. */
+            { 460, 463 }, /* Profile 15. */
+            { 464, 467 }, /* Profile 16. */
+            { 444, 447 }, /* Profile 17. */
+            { 464, 467 }, /* Profile 18. */
+            { 464, 467 }, /* Profile 19. */
+            { 464, 467 }, /* Profile 20. */
+            { 464, 467 }, /* Profile 21. */
+            { 444, 447 }, /* Profile 22. */
+            { 464, 467 }, /* Profile 23. */
+            { 464, 467 }, /* Profile 24. */
+            { 464, 467 }, /* Profile 25. */
+            { 460, 463 }, /* Profile 26. */
+            { 440, 443 }, /* Profile 27. */
+            { 460, 463 }, /* Profile 28. */
+            { 460, 463 }, /* Profile 29. */
+            { 464, 467 }, /* Profile 30. */
+            { 444, 447 }, /* Profile 31. */
+            { 464, 467 }, /* Profile 32. */
+            { 464, 467 }, /* Profile 33. */
+            { 464, 467 }, /* Profile 34. */
+            { 464, 467 }, /* Profile 35. */
+            { 444, 447 }, /* Profile 36. */
+            { 464, 467 }, /* Profile 37. */
+            { 464, 467 }, /* Profile 38. */
+            { 464, 467 }, /* Profile 39. */
+            { 460, 463 }, /* Profile 40. */
+            { 440, 443 }, /* Profile 41. */
+            { 460, 463 }, /* Profile 42. */
+            { 460, 463 }, /* Profile 43. */
+            { 464, 467 }, /* Profile 44. */
+            { 444, 447 }, /* Profile 45. */
+            { 464, 467 }, /* Profile 46. */
+            { 464, 467 }, /* Profile 47. */
+            { 464, 467 }, /* Profile 48. */
+            { 464, 467 }, /* Profile 49. */
+            { 444, 447 }, /* Profile 50. */
+            { 464, 467 }, /* Profile 51. */
+            { 464, 467 }, /* Profile 52. */
+            { 464, 467 }, /* Profile 53. */
+            { 460, 463 }, /* Profile 54. */
+            { 440, 443 }, /* Profile 55. */
+            { 460, 463 }, /* Profile 56. */
+            { 460, 463 }, /* Profile 57. */
         },
         .profile_cnt = 58,
     },
     {
         .name = "SYSTEM_SOURCE_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -3651,7 +3651,7 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "TIMESTAMP_CTRL_3_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
@@ -3716,213 +3716,213 @@ static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_
     },
     {
         .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 440, 443 }, /* Profile 2. */
-            { 420, 423 }, /* Profile 3. */
-            { 444, 447 }, /* Profile 4. */
-            { 440, 443 }, /* Profile 5. */
-            { 440, 443 }, /* Profile 6. */
-            { 440, 443 }, /* Profile 7. */
-            { 420, 423 }, /* Profile 8. */
-            { 444, 447 }, /* Profile 9. */
-            { 440, 443 }, /* Profile 10. */
-            { 440, 443 }, /* Profile 11. */
-            { 440, 443 }, /* Profile 12. */
-            { 420, 423 }, /* Profile 13. */
-            { 444, 447 }, /* Profile 14. */
-            { 440, 443 }, /* Profile 15. */
-            { 440, 443 }, /* Profile 16. */
-            { 420, 423 }, /* Profile 17. */
-            { 444, 447 }, /* Profile 18. */
-            { 440, 443 }, /* Profile 19. */
-            { 440, 443 }, /* Profile 20. */
-            { 440, 443 }, /* Profile 21. */
-            { 420, 423 }, /* Profile 22. */
-            { 444, 447 }, /* Profile 23. */
-            { 440, 443 }, /* Profile 24. */
-            { 440, 443 }, /* Profile 25. */
-            { 440, 443 }, /* Profile 26. */
-            { 420, 423 }, /* Profile 27. */
-            { 444, 447 }, /* Profile 28. */
-            { 440, 443 }, /* Profile 29. */
-            { 440, 443 }, /* Profile 30. */
-            { 420, 423 }, /* Profile 31. */
-            { 444, 447 }, /* Profile 32. */
-            { 440, 443 }, /* Profile 33. */
-            { 440, 443 }, /* Profile 34. */
-            { 440, 443 }, /* Profile 35. */
-            { 420, 423 }, /* Profile 36. */
-            { 444, 447 }, /* Profile 37. */
-            { 440, 443 }, /* Profile 38. */
-            { 440, 443 }, /* Profile 39. */
-            { 440, 443 }, /* Profile 40. */
-            { 420, 423 }, /* Profile 41. */
-            { 444, 447 }, /* Profile 42. */
-            { 440, 443 }, /* Profile 43. */
-            { 440, 443 }, /* Profile 44. */
-            { 420, 423 }, /* Profile 45. */
-            { 444, 447 }, /* Profile 46. */
-            { 440, 443 }, /* Profile 47. */
-            { 440, 443 }, /* Profile 48. */
-            { 440, 443 }, /* Profile 49. */
-            { 420, 423 }, /* Profile 50. */
-            { 444, 447 }, /* Profile 51. */
-            { 440, 443 }, /* Profile 52. */
-            { 440, 443 }, /* Profile 53. */
-            { 440, 443 }, /* Profile 54. */
-            { 420, 423 }, /* Profile 55. */
-            { 444, 447 }, /* Profile 56. */
-            { 440, 443 }, /* Profile 57. */
+            { 460, 463 }, /* Profile 2. */
+            { 440, 443 }, /* Profile 3. */
+            { 460, 463 }, /* Profile 4. */
+            { 460, 463 }, /* Profile 5. */
+            { 460, 463 }, /* Profile 6. */
+            { 460, 463 }, /* Profile 7. */
+            { 440, 443 }, /* Profile 8. */
+            { 460, 463 }, /* Profile 9. */
+            { 460, 463 }, /* Profile 10. */
+            { 460, 463 }, /* Profile 11. */
+            { 456, 459 }, /* Profile 12. */
+            { 436, 439 }, /* Profile 13. */
+            { 456, 459 }, /* Profile 14. */
+            { 456, 459 }, /* Profile 15. */
+            { 460, 463 }, /* Profile 16. */
+            { 440, 443 }, /* Profile 17. */
+            { 460, 463 }, /* Profile 18. */
+            { 460, 463 }, /* Profile 19. */
+            { 460, 463 }, /* Profile 20. */
+            { 460, 463 }, /* Profile 21. */
+            { 440, 443 }, /* Profile 22. */
+            { 460, 463 }, /* Profile 23. */
+            { 460, 463 }, /* Profile 24. */
+            { 460, 463 }, /* Profile 25. */
+            { 456, 459 }, /* Profile 26. */
+            { 436, 439 }, /* Profile 27. */
+            { 456, 459 }, /* Profile 28. */
+            { 456, 459 }, /* Profile 29. */
+            { 460, 463 }, /* Profile 30. */
+            { 440, 443 }, /* Profile 31. */
+            { 460, 463 }, /* Profile 32. */
+            { 460, 463 }, /* Profile 33. */
+            { 460, 463 }, /* Profile 34. */
+            { 460, 463 }, /* Profile 35. */
+            { 440, 443 }, /* Profile 36. */
+            { 460, 463 }, /* Profile 37. */
+            { 460, 463 }, /* Profile 38. */
+            { 460, 463 }, /* Profile 39. */
+            { 456, 459 }, /* Profile 40. */
+            { 436, 439 }, /* Profile 41. */
+            { 456, 459 }, /* Profile 42. */
+            { 456, 459 }, /* Profile 43. */
+            { 460, 463 }, /* Profile 44. */
+            { 440, 443 }, /* Profile 45. */
+            { 460, 463 }, /* Profile 46. */
+            { 460, 463 }, /* Profile 47. */
+            { 460, 463 }, /* Profile 48. */
+            { 460, 463 }, /* Profile 49. */
+            { 440, 443 }, /* Profile 50. */
+            { 460, 463 }, /* Profile 51. */
+            { 460, 463 }, /* Profile 52. */
+            { 460, 463 }, /* Profile 53. */
+            { 456, 459 }, /* Profile 54. */
+            { 436, 439 }, /* Profile 55. */
+            { 456, 459 }, /* Profile 56. */
+            { 456, 459 }, /* Profile 57. */
         },
         .profile_cnt = 58,
     },
     {
         .name = "VFI_15_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 160, 175 }, /* Profile 2. */
-            { 160, 175 }, /* Profile 3. */
-            { 160, 175 }, /* Profile 4. */
-            { 160, 175 }, /* Profile 5. */
-            { 160, 175 }, /* Profile 6. */
-            { 160, 175 }, /* Profile 7. */
-            { 160, 175 }, /* Profile 8. */
-            { 160, 175 }, /* Profile 9. */
-            { 160, 175 }, /* Profile 10. */
-            { 160, 175 }, /* Profile 11. */
-            { 160, 175 }, /* Profile 12. */
-            { 160, 175 }, /* Profile 13. */
-            { 160, 175 }, /* Profile 14. */
-            { 160, 175 }, /* Profile 15. */
-            { 160, 175 }, /* Profile 16. */
-            { 160, 175 }, /* Profile 17. */
-            { 160, 175 }, /* Profile 18. */
-            { 160, 175 }, /* Profile 19. */
-            { 160, 175 }, /* Profile 20. */
-            { 160, 175 }, /* Profile 21. */
-            { 160, 175 }, /* Profile 22. */
-            { 160, 175 }, /* Profile 23. */
-            { 160, 175 }, /* Profile 24. */
-            { 160, 175 }, /* Profile 25. */
-            { 160, 175 }, /* Profile 26. */
-            { 160, 175 }, /* Profile 27. */
-            { 160, 175 }, /* Profile 28. */
-            { 160, 175 }, /* Profile 29. */
-            { 176, 191 }, /* Profile 30. */
-            { 176, 191 }, /* Profile 31. */
-            { 176, 191 }, /* Profile 32. */
-            { 176, 191 }, /* Profile 33. */
-            { 176, 191 }, /* Profile 34. */
-            { 176, 191 }, /* Profile 35. */
-            { 176, 191 }, /* Profile 36. */
-            { 176, 191 }, /* Profile 37. */
-            { 176, 191 }, /* Profile 38. */
-            { 176, 191 }, /* Profile 39. */
-            { 176, 191 }, /* Profile 40. */
-            { 176, 191 }, /* Profile 41. */
-            { 176, 191 }, /* Profile 42. */
-            { 176, 191 }, /* Profile 43. */
-            { 176, 191 }, /* Profile 44. */
-            { 176, 191 }, /* Profile 45. */
-            { 176, 191 }, /* Profile 46. */
-            { 176, 191 }, /* Profile 47. */
-            { 176, 191 }, /* Profile 48. */
-            { 176, 191 }, /* Profile 49. */
-            { 176, 191 }, /* Profile 50. */
-            { 176, 191 }, /* Profile 51. */
-            { 176, 191 }, /* Profile 52. */
-            { 176, 191 }, /* Profile 53. */
-            { 176, 191 }, /* Profile 54. */
-            { 176, 191 }, /* Profile 55. */
-            { 176, 191 }, /* Profile 56. */
-            { 176, 191 }, /* Profile 57. */
+            { 112, 127 }, /* Profile 2. */
+            { 112, 127 }, /* Profile 3. */
+            { 112, 127 }, /* Profile 4. */
+            { 112, 127 }, /* Profile 5. */
+            { 112, 127 }, /* Profile 6. */
+            { 112, 127 }, /* Profile 7. */
+            { 112, 127 }, /* Profile 8. */
+            { 112, 127 }, /* Profile 9. */
+            { 112, 127 }, /* Profile 10. */
+            { 112, 127 }, /* Profile 11. */
+            { 112, 127 }, /* Profile 12. */
+            { 112, 127 }, /* Profile 13. */
+            { 112, 127 }, /* Profile 14. */
+            { 112, 127 }, /* Profile 15. */
+            { 112, 127 }, /* Profile 16. */
+            { 112, 127 }, /* Profile 17. */
+            { 112, 127 }, /* Profile 18. */
+            { 112, 127 }, /* Profile 19. */
+            { 112, 127 }, /* Profile 20. */
+            { 112, 127 }, /* Profile 21. */
+            { 112, 127 }, /* Profile 22. */
+            { 112, 127 }, /* Profile 23. */
+            { 112, 127 }, /* Profile 24. */
+            { 112, 127 }, /* Profile 25. */
+            { 112, 127 }, /* Profile 26. */
+            { 112, 127 }, /* Profile 27. */
+            { 112, 127 }, /* Profile 28. */
+            { 112, 127 }, /* Profile 29. */
+            { 112, 127 }, /* Profile 30. */
+            { 112, 127 }, /* Profile 31. */
+            { 112, 127 }, /* Profile 32. */
+            { 112, 127 }, /* Profile 33. */
+            { 112, 127 }, /* Profile 34. */
+            { 112, 127 }, /* Profile 35. */
+            { 112, 127 }, /* Profile 36. */
+            { 112, 127 }, /* Profile 37. */
+            { 112, 127 }, /* Profile 38. */
+            { 112, 127 }, /* Profile 39. */
+            { 112, 127 }, /* Profile 40. */
+            { 112, 127 }, /* Profile 41. */
+            { 112, 127 }, /* Profile 42. */
+            { 112, 127 }, /* Profile 43. */
+            { 112, 127 }, /* Profile 44. */
+            { 112, 127 }, /* Profile 45. */
+            { 112, 127 }, /* Profile 46. */
+            { 112, 127 }, /* Profile 47. */
+            { 112, 127 }, /* Profile 48. */
+            { 112, 127 }, /* Profile 49. */
+            { 112, 127 }, /* Profile 50. */
+            { 112, 127 }, /* Profile 51. */
+            { 112, 127 }, /* Profile 52. */
+            { 112, 127 }, /* Profile 53. */
+            { 112, 127 }, /* Profile 54. */
+            { 112, 127 }, /* Profile 55. */
+            { 112, 127 }, /* Profile 56. */
+            { 112, 127 }, /* Profile 57. */
         },
         .profile_cnt = 58,
     },
     {
         .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0",
-        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0,
+        .fid = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0,
         .profile = {
             { -1, -1 }, /* Profile 0. */
             { -1, -1 }, /* Profile 1. */
-            { 432, 435 }, /* Profile 2. */
+            { 436, 439 }, /* Profile 2. */
             { 404, 407 }, /* Profile 3. */
-            { 436, 439 }, /* Profile 4. */
-            { 432, 435 }, /* Profile 5. */
-            { 432, 435 }, /* Profile 6. */
-            { 432, 435 }, /* Profile 7. */
+            { 440, 443 }, /* Profile 4. */
+            { 436, 439 }, /* Profile 5. */
+            { 436, 439 }, /* Profile 6. */
+            { 436, 439 }, /* Profile 7. */
             { 404, 407 }, /* Profile 8. */
-            { 436, 439 }, /* Profile 9. */
-            { 432, 435 }, /* Profile 10. */
-            { 432, 435 }, /* Profile 11. */
-            { 432, 435 }, /* Profile 12. */
+            { 440, 443 }, /* Profile 9. */
+            { 436, 439 }, /* Profile 10. */
+            { 436, 439 }, /* Profile 11. */
+            { 436, 439 }, /* Profile 12. */
             { 404, 407 }, /* Profile 13. */
-            { 436, 439 }, /* Profile 14. */
-            { 432, 435 }, /* Profile 15. */
-            { 432, 435 }, /* Profile 16. */
+            { 440, 443 }, /* Profile 14. */
+            { 436, 439 }, /* Profile 15. */
+            { 436, 439 }, /* Profile 16. */
             { 404, 407 }, /* Profile 17. */
-            { 436, 439 }, /* Profile 18. */
-            { 432, 435 }, /* Profile 19. */
-            { 432, 435 }, /* Profile 20. */
-            { 432, 435 }, /* Profile 21. */
+            { 440, 443 }, /* Profile 18. */
+            { 436, 439 }, /* Profile 19. */
+            { 436, 439 }, /* Profile 20. */
+            { 436, 439 }, /* Profile 21. */
             { 404, 407 }, /* Profile 22. */
-            { 436, 439 }, /* Profile 23. */
-            { 432, 435 }, /* Profile 24. */
-            { 432, 435 }, /* Profile 25. */
-            { 432, 435 }, /* Profile 26. */
+            { 440, 443 }, /* Profile 23. */
+            { 436, 439 }, /* Profile 24. */
+            { 436, 439 }, /* Profile 25. */
+            { 436, 439 }, /* Profile 26. */
             { 404, 407 }, /* Profile 27. */
-            { 436, 439 }, /* Profile 28. */
-            { 432, 435 }, /* Profile 29. */
-            { 432, 435 }, /* Profile 30. */
-            { 404, 407 }, /* Profile 31. */
-            { 436, 439 }, /* Profile 32. */
-            { 432, 435 }, /* Profile 33. */
-            { 432, 435 }, /* Profile 34. */
-            { 432, 435 }, /* Profile 35. */
+            { 440, 443 }, /* Profile 28. */
+            { 436, 439 }, /* Profile 29. */
+            { 436, 439 }, /* Profile 30. */
+            { 404, 407 }, /* Profile 31. */
+            { 440, 443 }, /* Profile 32. */
+            { 436, 439 }, /* Profile 33. */
+            { 436, 439 }, /* Profile 34. */
+            { 436, 439 }, /* Profile 35. */
             { 404, 407 }, /* Profile 36. */
-            { 436, 439 }, /* Profile 37. */
-            { 432, 435 }, /* Profile 38. */
-            { 432, 435 }, /* Profile 39. */
-            { 432, 435 }, /* Profile 40. */
+            { 440, 443 }, /* Profile 37. */
+            { 436, 439 }, /* Profile 38. */
+            { 436, 439 }, /* Profile 39. */
+            { 436, 439 }, /* Profile 40. */
             { 404, 407 }, /* Profile 41. */
-            { 436, 439 }, /* Profile 42. */
-            { 432, 435 }, /* Profile 43. */
-            { 432, 435 }, /* Profile 44. */
+            { 440, 443 }, /* Profile 42. */
+            { 436, 439 }, /* Profile 43. */
+            { 436, 439 }, /* Profile 44. */
             { 404, 407 }, /* Profile 45. */
-            { 436, 439 }, /* Profile 46. */
-            { 432, 435 }, /* Profile 47. */
-            { 432, 435 }, /* Profile 48. */
-            { 432, 435 }, /* Profile 49. */
+            { 440, 443 }, /* Profile 46. */
+            { 436, 439 }, /* Profile 47. */
+            { 436, 439 }, /* Profile 48. */
+            { 436, 439 }, /* Profile 49. */
             { 404, 407 }, /* Profile 50. */
-            { 436, 439 }, /* Profile 51. */
-            { 432, 435 }, /* Profile 52. */
-            { 432, 435 }, /* Profile 53. */
-            { 432, 435 }, /* Profile 54. */
+            { 440, 443 }, /* Profile 51. */
+            { 436, 439 }, /* Profile 52. */
+            { 436, 439 }, /* Profile 53. */
+            { 436, 439 }, /* Profile 54. */
             { 404, 407 }, /* Profile 55. */
-            { 436, 439 }, /* Profile 56. */
-            { 432, 435 }, /* Profile 57. */
+            { 440, 443 }, /* Profile 56. */
+            { 436, 439 }, /* Profile 57. */
         },
         .profile_cnt = 58,
     },
-};static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_data,
+};static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_data,
 };
 
-static shr_enum_map_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reason_names[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+static shr_enum_map_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reason_names[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_reasons_info_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reasons_info = {
-    .num_reasons = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_COUNT,
-    .reason_names = bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reason_names,
-    .reason_encode = bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reason_encode,
-    .reason_decode = bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reason_decode,
+static bcmpkt_flex_reasons_info_t bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reason_names,
+    .reason_encode = bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reason_decode,
 };
 
 
@@ -4065,7 +4065,7 @@ static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_arp_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_arp_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_FID_COUNT] = {
     bcmpkt_arp_t_hardware_len_get,
     bcmpkt_arp_t_hardware_type_get,
     bcmpkt_arp_t_operation_get,
@@ -4077,7 +4077,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_arp_t_fget[BCM56890_A0_DNA_6_
     bcmpkt_arp_t_target_ip_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_arp_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_arp_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_FID_COUNT] = {
     bcmpkt_arp_t_hardware_len_set,
     bcmpkt_arp_t_hardware_type_set,
     bcmpkt_arp_t_operation_set,
@@ -4089,13 +4089,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_arp_t_fset[BCM56890_A0_DNA_6_
     bcmpkt_arp_t_target_ip_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_arp_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_arp_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_arp_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_arp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_arp_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_arp_t_field_data,
 };
 
 
@@ -4192,7 +4192,7 @@ static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_authen_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_authen_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
     bcmpkt_authen_t_data_get,
     bcmpkt_authen_t_next_header_get,
     bcmpkt_authen_t_payload_len_get,
@@ -4201,7 +4201,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_authen_t_fget[BCM56890_A0_DNA
     bcmpkt_authen_t_spi_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_authen_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_authen_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
     bcmpkt_authen_t_data_set,
     bcmpkt_authen_t_next_header_set,
     bcmpkt_authen_t_payload_len_set,
@@ -4210,13 +4210,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_authen_t_fset[BCM56890_A0_DNA
     bcmpkt_authen_t_spi_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_authen_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_authen_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_authen_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_authen_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_authen_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_AUTHEN_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_authen_t_field_data,
 };
 
 
@@ -4465,7 +4465,7 @@ static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_bfd_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_bfd_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FID_COUNT] = {
     bcmpkt_bfd_t_ap_get,
     bcmpkt_bfd_t_bfd_length_get,
     bcmpkt_bfd_t_cpi_get,
@@ -4484,7 +4484,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_bfd_t_fget[BCM56890_A0_DNA_6_
     bcmpkt_bfd_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_bfd_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_bfd_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FID_COUNT] = {
     bcmpkt_bfd_t_ap_set,
     bcmpkt_bfd_t_bfd_length_set,
     bcmpkt_bfd_t_cpi_set,
@@ -4503,13 +4503,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_bfd_t_fset[BCM56890_A0_DNA_6_
     bcmpkt_bfd_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_bfd_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_bfd_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_bfd_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_bfd_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_bfd_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_BFD_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_bfd_t_field_data,
 };
 
 
@@ -4543,23 +4543,23 @@ static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_cntag_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_cntag_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_FID_COUNT] = {
     bcmpkt_cntag_t_rpid_get,
     bcmpkt_cntag_t_tpid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_cntag_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_cntag_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_FID_COUNT] = {
     bcmpkt_cntag_t_rpid_set,
     bcmpkt_cntag_t_tpid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_cntag_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_cntag_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_cntag_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_cntag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_cntag_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CNTAG_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_cntag_t_field_data,
 };
 
 
@@ -4675,7 +4675,7 @@ static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
     bcmpkt_cpu_composites_0_t_dma_cont0_get,
     bcmpkt_cpu_composites_0_t_dma_cont1_get,
     bcmpkt_cpu_composites_0_t_dma_cont2_get,
@@ -4685,7 +4685,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_fget[BCM56
     bcmpkt_cpu_composites_0_t_dma_cont6_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
     bcmpkt_cpu_composites_0_t_dma_cont0_set,
     bcmpkt_cpu_composites_0_t_dma_cont1_set,
     bcmpkt_cpu_composites_0_t_dma_cont2_set,
@@ -4695,13 +4695,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_fset[BCM56
     bcmpkt_cpu_composites_0_t_dma_cont6_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_field_data,
 };
 
 
@@ -4881,7 +4881,7 @@ static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
     bcmpkt_cpu_composites_1_t_dma_cont10_get,
     bcmpkt_cpu_composites_1_t_dma_cont11_get,
     bcmpkt_cpu_composites_1_t_dma_cont12_get,
@@ -4895,7 +4895,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_fget[BCM56
     bcmpkt_cpu_composites_1_t_dma_cont9_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
     bcmpkt_cpu_composites_1_t_dma_cont10_set,
     bcmpkt_cpu_composites_1_t_dma_cont11_set,
     bcmpkt_cpu_composites_1_t_dma_cont12_set,
@@ -4909,13 +4909,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_fset[BCM56
     bcmpkt_cpu_composites_1_t_dma_cont9_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_field_data,
 };
 
 
@@ -4965,25 +4965,25 @@ static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_dest_option_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_dest_option_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
     bcmpkt_dest_option_t_hdr_ext_len_get,
     bcmpkt_dest_option_t_next_header_get,
     bcmpkt_dest_option_t_option_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_dest_option_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_dest_option_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
     bcmpkt_dest_option_t_hdr_ext_len_set,
     bcmpkt_dest_option_t_next_header_set,
     bcmpkt_dest_option_t_option_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_dest_option_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_dest_option_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_dest_option_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_dest_option_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_dest_option_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_dest_option_t_field_data,
 };
 
 
@@ -5169,7 +5169,7 @@ static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
     bcmpkt_ep_nih_header_t_header_subtype_get,
     bcmpkt_ep_nih_header_t_header_type_get,
     bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
@@ -5184,7 +5184,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_fget[BCM56890
     bcmpkt_ep_nih_header_t_timestamp_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
     bcmpkt_ep_nih_header_t_header_subtype_set,
     bcmpkt_ep_nih_header_t_header_type_set,
     bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
@@ -5199,13 +5199,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_fset[BCM56890
     bcmpkt_ep_nih_header_t_timestamp_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_field_data,
 };
 
 
@@ -5345,7 +5345,7 @@ static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
     bcmpkt_erspan3_fixed_hdr_t_bso_get,
     bcmpkt_erspan3_fixed_hdr_t_cos_get,
     bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
@@ -5357,7 +5357,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_fget[BCM5
     bcmpkt_erspan3_fixed_hdr_t_vlan_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
     bcmpkt_erspan3_fixed_hdr_t_bso_set,
     bcmpkt_erspan3_fixed_hdr_t_cos_set,
     bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
@@ -5369,13 +5369,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_fset[BCM5
     bcmpkt_erspan3_fixed_hdr_t_vlan_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_field_data,
 };
 
 
@@ -5440,27 +5440,27 @@ static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profi
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
     bcmpkt_erspan3_subhdr_5_t_platform_id_get,
     bcmpkt_erspan3_subhdr_5_t_port_id_get,
     bcmpkt_erspan3_subhdr_5_t_switch_id_get,
     bcmpkt_erspan3_subhdr_5_t_timestamp_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
     bcmpkt_erspan3_subhdr_5_t_platform_id_set,
     bcmpkt_erspan3_subhdr_5_t_port_id_set,
     bcmpkt_erspan3_subhdr_5_t_switch_id_set,
     bcmpkt_erspan3_subhdr_5_t_timestamp_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_field_data,
 };
 
 
@@ -5541,7 +5541,7 @@ static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_esp_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_esp_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_FID_COUNT] = {
     bcmpkt_esp_t_next_header_get,
     bcmpkt_esp_t_pad_get,
     bcmpkt_esp_t_pad_len_get,
@@ -5549,7 +5549,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_esp_t_fget[BCM56890_A0_DNA_6_
     bcmpkt_esp_t_spi_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_esp_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_esp_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_FID_COUNT] = {
     bcmpkt_esp_t_next_header_set,
     bcmpkt_esp_t_pad_set,
     bcmpkt_esp_t_pad_len_set,
@@ -5557,13 +5557,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_esp_t_fset[BCM56890_A0_DNA_6_
     bcmpkt_esp_t_spi_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_esp_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_esp_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_esp_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_esp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_esp_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ESP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_esp_t_field_data,
 };
 
 
@@ -5582,21 +5582,21 @@ static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ethertype_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ethertype_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
     bcmpkt_ethertype_t_type_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ethertype_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ethertype_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
     bcmpkt_ethertype_t_type_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ethertype_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ethertype_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ethertype_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_ethertype_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ethertype_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_ethertype_t_field_data,
 };
 
 
@@ -5661,27 +5661,27 @@ static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_frag_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_frag_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FID_COUNT] = {
     bcmpkt_frag_t_frag_info_get,
     bcmpkt_frag_t_id_get,
     bcmpkt_frag_t_next_header_get,
     bcmpkt_frag_t_reserved_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_frag_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_frag_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FID_COUNT] = {
     bcmpkt_frag_t_frag_info_set,
     bcmpkt_frag_t_id_set,
     bcmpkt_frag_t_next_header_set,
     bcmpkt_frag_t_reserved_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_frag_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_frag_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_frag_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_frag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_frag_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FRAG_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_frag_t_field_data,
 };
 
 
@@ -5775,7 +5775,7 @@ static int32_t bcmpkt_gbp_ethernet_shim_t_ver_set(uint32_t *data, int profile, u
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = {
     bcmpkt_gbp_ethernet_shim_t_ethertype_get,
     bcmpkt_gbp_ethernet_shim_t_flags_get,
     bcmpkt_gbp_ethernet_shim_t_reserved_get,
@@ -5784,7 +5784,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_fget[BCM5
     bcmpkt_gbp_ethernet_shim_t_ver_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = {
     bcmpkt_gbp_ethernet_shim_t_ethertype_set,
     bcmpkt_gbp_ethernet_shim_t_flags_set,
     bcmpkt_gbp_ethernet_shim_t_reserved_set,
@@ -5793,13 +5793,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_fset[BCM5
     bcmpkt_gbp_ethernet_shim_t_ver_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_field_data,
 };
 
 
@@ -6028,7 +6028,7 @@ static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int prof
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
     bcmpkt_generic_loopback_t_destination_obj_get,
     bcmpkt_generic_loopback_t_destination_type_get,
     bcmpkt_generic_loopback_t_entropy_obj_get,
@@ -6046,7 +6046,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_fget[BCM56
     bcmpkt_generic_loopback_t_start_byte_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
     bcmpkt_generic_loopback_t_destination_obj_set,
     bcmpkt_generic_loopback_t_destination_type_set,
     bcmpkt_generic_loopback_t_entropy_obj_set,
@@ -6064,13 +6064,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_fset[BCM56
     bcmpkt_generic_loopback_t_start_byte_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_field_data,
 };
 
 
@@ -6149,7 +6149,7 @@ static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gpe_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gpe_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FID_COUNT] = {
     bcmpkt_gpe_t_flags_get,
     bcmpkt_gpe_t_next_protocol_get,
     bcmpkt_gpe_t_reserved0_get,
@@ -6157,7 +6157,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gpe_t_fget[BCM56890_A0_DNA_6_
     bcmpkt_gpe_t_vni_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gpe_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gpe_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FID_COUNT] = {
     bcmpkt_gpe_t_flags_set,
     bcmpkt_gpe_t_next_protocol_set,
     bcmpkt_gpe_t_reserved0_set,
@@ -6165,13 +6165,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gpe_t_fset[BCM56890_A0_DNA_6_
     bcmpkt_gpe_t_vni_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_gpe_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_gpe_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_gpe_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_gpe_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_gpe_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GPE_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_gpe_t_field_data,
 };
 
 
@@ -6205,23 +6205,23 @@ static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint3
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
     bcmpkt_gre_chksum_t_checksum_get,
     bcmpkt_gre_chksum_t_offset_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
     bcmpkt_gre_chksum_t_checksum_set,
     bcmpkt_gre_chksum_t_offset_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_field_data,
 };
 
 
@@ -6241,21 +6241,21 @@ static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gre_key_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gre_key_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
     bcmpkt_gre_key_t_key_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gre_key_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gre_key_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
     bcmpkt_gre_key_t_key_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_gre_key_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_gre_key_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_gre_key_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_gre_key_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_gre_key_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_KEY_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_gre_key_t_field_data,
 };
 
 
@@ -6275,21 +6275,21 @@ static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
     bcmpkt_gre_rout_t_routing_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
     bcmpkt_gre_rout_t_routing_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_field_data,
 };
 
 
@@ -6309,21 +6309,21 @@ static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
     bcmpkt_gre_seq_t_sequence_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
     bcmpkt_gre_seq_t_sequence_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_field_data,
 };
 
 
@@ -6387,27 +6387,27 @@ static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gre_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_gre_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_FID_COUNT] = {
     bcmpkt_gre_t_c_r_k_s_get,
     bcmpkt_gre_t_protocol_get,
     bcmpkt_gre_t_reserved_get,
     bcmpkt_gre_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gre_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_gre_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_FID_COUNT] = {
     bcmpkt_gre_t_c_r_k_s_set,
     bcmpkt_gre_t_protocol_set,
     bcmpkt_gre_t_reserved_set,
     bcmpkt_gre_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_gre_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_gre_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_gre_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_gre_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_gre_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_GRE_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_gre_t_field_data,
 };
 
 
@@ -6606,7 +6606,7 @@ static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
     bcmpkt_hg3_base_t_cn_get,
     bcmpkt_hg3_base_t_cng_get,
     bcmpkt_hg3_base_t_entropy_get,
@@ -6622,7 +6622,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_fget[BCM56890_A0_D
     bcmpkt_hg3_base_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
     bcmpkt_hg3_base_t_cn_set,
     bcmpkt_hg3_base_t_cng_set,
     bcmpkt_hg3_base_t_entropy_set,
@@ -6638,13 +6638,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_fset[BCM56890_A0_D
     bcmpkt_hg3_base_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_BASE_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_field_data,
 };
 
 
@@ -6738,7 +6738,7 @@ static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uin
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
     bcmpkt_hg3_extension_0_t_class_id_lsb_get,
     bcmpkt_hg3_extension_0_t_class_id_msb_get,
     bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get,
@@ -6747,7 +6747,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_fget[BCM568
     bcmpkt_hg3_extension_0_t_svp_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
     bcmpkt_hg3_extension_0_t_class_id_lsb_set,
     bcmpkt_hg3_extension_0_t_class_id_msb_set,
     bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set,
@@ -6756,13 +6756,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_fset[BCM568
     bcmpkt_hg3_extension_0_t_svp_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_field_data,
 };
 
 
@@ -6812,25 +6812,25 @@ static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint3
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
     bcmpkt_hop_by_hop_t_hdr_ext_len_get,
     bcmpkt_hop_by_hop_t_next_header_get,
     bcmpkt_hop_by_hop_t_option_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
     bcmpkt_hop_by_hop_t_hdr_ext_len_set,
     bcmpkt_hop_by_hop_t_next_header_set,
     bcmpkt_hop_by_hop_t_option_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_field_data,
 };
 
 
@@ -6879,503 +6879,388 @@ static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_icmp_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_icmp_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_FID_COUNT] = {
     bcmpkt_icmp_t_checksum_get,
     bcmpkt_icmp_t_code_get,
     bcmpkt_icmp_t_icmp_type_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_icmp_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_icmp_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_FID_COUNT] = {
     bcmpkt_icmp_t_checksum_set,
     bcmpkt_icmp_t_code_set,
     bcmpkt_icmp_t_icmp_type_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_icmp_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_icmp_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_icmp_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_icmp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_icmp_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_icmp_t_field_data,
 };
 
 
-static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 0, 8, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[0], 8, 24);
+    *val = WORD_FIELD_GET(data[0], 8, 8);
 
     return ret;
 }
 
-static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[0], 8, 24, val);
+    WORD_FIELD_SET(data[0], 8, 8, val);
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get,
-    bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set,
-    bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[0], 26, 2);
+    *val = WORD_FIELD_GET(data[0], 24, 4);
 
     return ret;
 }
 
-static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[0], 26, 2, val);
+    WORD_FIELD_SET(data[0], 24, 4, val);
     return ret;
 }
 
-static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[0], 28, 4);
+    *val = WORD_FIELD_GET(data[0], 0, 8);
 
     return ret;
 }
 
-static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[0], 28, 4, val);
+    WORD_FIELD_SET(data[0], 0, 8, val);
     return ret;
 }
 
-static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[0], 20, 6);
+    *val = WORD_FIELD_GET(data[0], 16, 8);
 
     return ret;
 }
 
-static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[0], 20, 6, val);
+    WORD_FIELD_SET(data[0], 16, 8, val);
     return ret;
 }
 
-static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[0], 0, 20);
+    *val = WORD_FIELD_GET(data[0], 28, 4);
 
     return ret;
 }
 
-static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[0], 0, 20, val);
+    WORD_FIELD_SET(data[0], 28, 4, val);
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_0_b_t_cn_get,
-    bcmpkt_ifa_flex_md_0_b_t_port_speed_get,
-    bcmpkt_ifa_flex_md_0_b_t_queue_id_get,
-    bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get,
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_get,
+    bcmpkt_ifa_header_t_gns_get,
+    bcmpkt_ifa_header_t_max_length_get,
+    bcmpkt_ifa_header_t_next_hdr_get,
+    bcmpkt_ifa_header_t_ver_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_0_b_t_cn_set,
-    bcmpkt_ifa_flex_md_0_b_t_port_speed_set,
-    bcmpkt_ifa_flex_md_0_b_t_queue_id_set,
-    bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set,
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_set,
+    bcmpkt_ifa_header_t_gns_set,
+    bcmpkt_ifa_header_t_max_length_set,
+    bcmpkt_ifa_header_t_next_hdr_set,
+    bcmpkt_ifa_header_t_ver_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_HEADER_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_field_data,
 };
 
 
-static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    *val = WORD_FIELD_GET(data[0], 16, 16);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    WORD_FIELD_SET(data[0], 16, 16, val);
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_ifa_metadata_a_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[0], 0, 16);
+    *val = WORD_FIELD_GET(data[1], 26, 2);
 
     return ret;
 }
 
-static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_ifa_metadata_a_t_cn_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[0], 0, 16, val);
+    WORD_FIELD_SET(data[1], 26, 2, val);
     return ret;
 }
 
-static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    ret = SHR_E_PARAM;
+    *val = WORD_FIELD_GET(data[0], 0, 8);
 
     return ret;
 }
 
-static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    ret = SHR_E_PARAM;
-
+    WORD_FIELD_SET(data[0], 0, 8, val);
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_1_t_egress_port_id_get,
-    bcmpkt_ifa_flex_md_1_t_ingress_port_id_get,
-    bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_1_t_egress_port_id_set,
-    bcmpkt_ifa_flex_md_1_t_ingress_port_id_set,
-    bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    ret = SHR_E_PARAM;
+    *val = WORD_FIELD_GET(data[0], 8, 24);
 
     return ret;
 }
 
-static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    ret = SHR_E_PARAM;
-
+    WORD_FIELD_SET(data[0], 8, 24, val);
     return ret;
 }
 
-static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_ifa_metadata_a_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    ret = SHR_E_PARAM;
+    *val = WORD_FIELD_GET(data[1], 28, 4);
 
     return ret;
 }
 
-static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_ifa_metadata_a_t_port_speed_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    ret = SHR_E_PARAM;
-
+    WORD_FIELD_SET(data[1], 28, 4, val);
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get,
-    bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set,
-    bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_ifa_metadata_a_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    ret = SHR_E_PARAM;
+    *val = WORD_FIELD_GET(data[1], 20, 6);
 
     return ret;
 }
 
-static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_ifa_metadata_a_t_queue_id_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    ret = SHR_E_PARAM;
-
+    WORD_FIELD_SET(data[1], 20, 6, val);
     return ret;
 }
 
-static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    ret = SHR_E_PARAM;
+    *val = WORD_FIELD_GET(data[1], 0, 20);
 
     return ret;
 }
 
-static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    ret = SHR_E_PARAM;
-
+    WORD_FIELD_SET(data[1], 0, 20, val);
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get,
-    bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get,
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_a_t_cn_get,
+    bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get,
+    bcmpkt_ifa_metadata_a_t_lns_device_id_get,
+    bcmpkt_ifa_metadata_a_t_port_speed_get,
+    bcmpkt_ifa_metadata_a_t_queue_id_get,
+    bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
-    bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set,
-    bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set,
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_a_t_cn_set,
+    bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set,
+    bcmpkt_ifa_metadata_a_t_lns_device_id_set,
+    bcmpkt_ifa_metadata_a_t_port_speed_set,
+    bcmpkt_ifa_metadata_a_t_queue_id_set,
+    bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_field_data,
 };
 
 
-static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[0], 8, 8);
+    *val = WORD_FIELD_GET(data[0], 16, 16);
 
     return ret;
 }
 
-static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[0], 8, 8, val);
+    WORD_FIELD_SET(data[0], 16, 16, val);
     return ret;
 }
 
-static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[0], 24, 4);
+    *val = WORD_FIELD_GET(data[0], 0, 16);
 
     return ret;
 }
 
-static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[0], 24, 4, val);
+    WORD_FIELD_SET(data[0], 0, 16, val);
     return ret;
 }
 
-static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[0], 0, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
+    ret = SHR_E_PARAM;
 
-    WORD_FIELD_SET(data[0], 0, 8, val);
     return ret;
 }
 
-static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[0], 16, 8);
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
+    ret = SHR_E_PARAM;
 
-    WORD_FIELD_SET(data[0], 16, 8, val);
     return ret;
 }
 
-static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[0], 28, 4);
+    ret = SHR_E_PARAM;
 
     return ret;
 }
 
-static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[0], 28, 4, val);
+    ret = SHR_E_PARAM;
+
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
-    bcmpkt_ifa_header_t_flags_get,
-    bcmpkt_ifa_header_t_gns_get,
-    bcmpkt_ifa_header_t_max_length_get,
-    bcmpkt_ifa_header_t_next_hdr_get,
-    bcmpkt_ifa_header_t_ver_get,
-};
-
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
-    bcmpkt_ifa_header_t_flags_set,
-    bcmpkt_ifa_header_t_gns_set,
-    bcmpkt_ifa_header_t_max_length_set,
-    bcmpkt_ifa_header_t_next_hdr_set,
-    bcmpkt_ifa_header_t_ver_set,
-};
-
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
-};
-
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_field_data,
-};
-
-
-static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[0], 16, 8);
+    ret = SHR_E_PARAM;
 
     return ret;
 }
 
-static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[0], 16, 8, val);
+    ret = SHR_E_PARAM;
+
     return ret;
 }
 
-static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[0], 0, 16);
+    ret = SHR_E_PARAM;
 
     return ret;
 }
 
-static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[0], 0, 16, val);
+    ret = SHR_E_PARAM;
+
     return ret;
 }
 
-static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
-    *val = WORD_FIELD_GET(data[0], 24, 8);
+    ret = SHR_E_PARAM;
 
     return ret;
 }
 
-static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
-    WORD_FIELD_SET(data[0], 24, 8, val);
+    ret = SHR_E_PARAM;
+
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
-    bcmpkt_ifa_md_base_t_action_vector_get,
-    bcmpkt_ifa_md_base_t_hop_limit_current_length_get,
-    bcmpkt_ifa_md_base_t_request_vector_get,
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_b_t_egress_port_id_get,
+    bcmpkt_ifa_metadata_b_t_ingress_port_id_get,
+    bcmpkt_ifa_metadata_b_t_mmu_stat_0_get,
+    bcmpkt_ifa_metadata_b_t_mmu_stat_1_get,
+    bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get,
+    bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get,
+    bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
-    bcmpkt_ifa_md_base_t_action_vector_set,
-    bcmpkt_ifa_md_base_t_hop_limit_current_length_set,
-    bcmpkt_ifa_md_base_t_request_vector_set,
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_b_t_egress_port_id_set,
+    bcmpkt_ifa_metadata_b_t_ingress_port_id_set,
+    bcmpkt_ifa_metadata_b_t_mmu_stat_0_set,
+    bcmpkt_ifa_metadata_b_t_mmu_stat_1_set,
+    bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set,
+    bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set,
+    bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_field_data,
 };
 
 
-static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_ifa_metadata_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
     *val = WORD_FIELD_GET(data[0], 16, 8);
@@ -7383,14 +7268,14 @@ static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profi
     return ret;
 }
 
-static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_ifa_metadata_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
     WORD_FIELD_SET(data[0], 16, 8, val);
     return ret;
 }
 
-static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
     *val = WORD_FIELD_GET(data[0], 0, 16);
@@ -7398,30 +7283,14 @@ static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data
     return ret;
 }
 
-static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
     WORD_FIELD_SET(data[0], 0, 16, val);
     return ret;
 }
 
-static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) {
-    int32_t ret = SHR_E_NONE;
-
-    ret = SHR_E_PARAM;
-
-    return ret;
-}
-
-static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+static int32_t bcmpkt_ifa_metadata_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
     int32_t ret = SHR_E_NONE;
 
     *val = WORD_FIELD_GET(data[0], 24, 8);
@@ -7429,34 +7298,32 @@ static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int prof
     return ret;
 }
 
-static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+static int32_t bcmpkt_ifa_metadata_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
     int32_t ret = SHR_E_NONE;
 
     WORD_FIELD_SET(data[0], 24, 8, val);
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_t_action_vector_get,
-    bcmpkt_ifa_metadata_t_hop_limit_current_length_get,
-    bcmpkt_ifa_metadata_t_metadata_get,
-    bcmpkt_ifa_metadata_t_request_vector_get,
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_base_t_action_vector_get,
+    bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get,
+    bcmpkt_ifa_metadata_base_t_request_vector_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
-    bcmpkt_ifa_metadata_t_action_vector_set,
-    bcmpkt_ifa_metadata_t_hop_limit_current_length_set,
-    bcmpkt_ifa_metadata_t_metadata_set,
-    bcmpkt_ifa_metadata_t_request_vector_set,
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_base_t_action_vector_set,
+    bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set,
+    bcmpkt_ifa_metadata_base_t_request_vector_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_field_data,
 };
 
 
@@ -7521,27 +7388,27 @@ static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_igmp_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_igmp_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_FID_COUNT] = {
     bcmpkt_igmp_t_checksum_get,
     bcmpkt_igmp_t_group_address_get,
     bcmpkt_igmp_t_igmp_type_get,
     bcmpkt_igmp_t_max_resp_time_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_igmp_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_igmp_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_FID_COUNT] = {
     bcmpkt_igmp_t_checksum_set,
     bcmpkt_igmp_t_group_address_set,
     bcmpkt_igmp_t_igmp_type_set,
     bcmpkt_igmp_t_max_resp_time_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_igmp_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_igmp_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_igmp_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_igmp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_igmp_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IGMP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_igmp_t_field_data,
 };
 
 
@@ -7651,7 +7518,7 @@ static int32_t bcmpkt_ioam_e2e_t_type_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = {
     bcmpkt_ioam_e2e_t_ioam_e2e_data_get,
     bcmpkt_ioam_e2e_t_ioam_e2e_type_get,
     bcmpkt_ioam_e2e_t_ioam_hdr_len_get,
@@ -7661,7 +7528,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_fget[BCM56890_A0_D
     bcmpkt_ioam_e2e_t_type_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = {
     bcmpkt_ioam_e2e_t_ioam_e2e_data_set,
     bcmpkt_ioam_e2e_t_ioam_e2e_type_set,
     bcmpkt_ioam_e2e_t_ioam_hdr_len_set,
@@ -7671,13 +7538,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_fset[BCM56890_A0_D
     bcmpkt_ioam_e2e_t_type_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IOAM_E2E_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_field_data,
 };
 
 
@@ -7759,7 +7626,7 @@ static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ipfix_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ipfix_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_FID_COUNT] = {
     bcmpkt_ipfix_t_export_time_get,
     bcmpkt_ipfix_t_length_get,
     bcmpkt_ipfix_t_obs_domain_id_get,
@@ -7767,7 +7634,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ipfix_t_fget[BCM56890_A0_DNA_
     bcmpkt_ipfix_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ipfix_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ipfix_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_FID_COUNT] = {
     bcmpkt_ipfix_t_export_time_set,
     bcmpkt_ipfix_t_length_set,
     bcmpkt_ipfix_t_obs_domain_id_set,
@@ -7775,13 +7642,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ipfix_t_fset[BCM56890_A0_DNA_
     bcmpkt_ipfix_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ipfix_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ipfix_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ipfix_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_ipfix_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ipfix_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_ipfix_t_field_data,
 };
 
 
@@ -7953,7 +7820,7 @@ static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, ui
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ipv4_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ipv4_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FID_COUNT] = {
     bcmpkt_ipv4_t_da_get,
     bcmpkt_ipv4_t_flags_frag_offset_get,
     bcmpkt_ipv4_t_hdr_checksum_get,
@@ -7967,7 +7834,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ipv4_t_fget[BCM56890_A0_DNA_6
     bcmpkt_ipv4_t_version_hdr_len_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ipv4_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ipv4_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FID_COUNT] = {
     bcmpkt_ipv4_t_da_set,
     bcmpkt_ipv4_t_flags_frag_offset_set,
     bcmpkt_ipv4_t_hdr_checksum_set,
@@ -7981,13 +7848,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ipv4_t_fset[BCM56890_A0_DNA_6
     bcmpkt_ipv4_t_version_hdr_len_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ipv4_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ipv4_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ipv4_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_ipv4_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ipv4_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_ipv4_t_field_data,
 };
 
 
@@ -8113,7 +7980,7 @@ static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t v
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ipv6_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_ipv6_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FID_COUNT] = {
     bcmpkt_ipv6_t_da_get,
     bcmpkt_ipv6_t_flow_label_get,
     bcmpkt_ipv6_t_hop_limit_get,
@@ -8124,7 +7991,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ipv6_t_fget[BCM56890_A0_DNA_6
     bcmpkt_ipv6_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ipv6_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_ipv6_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FID_COUNT] = {
     bcmpkt_ipv6_t_da_set,
     bcmpkt_ipv6_t_flow_label_set,
     bcmpkt_ipv6_t_hop_limit_set,
@@ -8135,13 +8002,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ipv6_t_fset[BCM56890_A0_DNA_6
     bcmpkt_ipv6_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ipv6_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_ipv6_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ipv6_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_ipv6_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_ipv6_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_ipv6_t_field_data,
 };
 
 
@@ -8177,23 +8044,23 @@ static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_l2_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_l2_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_FID_COUNT] = {
     bcmpkt_l2_t_macda_get,
     bcmpkt_l2_t_macsa_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_l2_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_l2_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_FID_COUNT] = {
     bcmpkt_l2_t_macda_set,
     bcmpkt_l2_t_macsa_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_l2_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_l2_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_l2_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_l2_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_l2_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_l2_t_field_data,
 };
 
 
@@ -8213,21 +8080,21 @@ static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
     bcmpkt_mirror_erspan_sn_t_seq_num_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
     bcmpkt_mirror_erspan_sn_t_seq_num_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_field_data,
 };
 
 
@@ -8247,21 +8114,21 @@ static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, u
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
     bcmpkt_mirror_transport_t_data_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
     bcmpkt_mirror_transport_t_data_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_field_data,
 };
 
 
@@ -8325,27 +8192,27 @@ static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
     bcmpkt_mpls_ach_t_channel_type_get,
     bcmpkt_mpls_ach_t_cw_type_get,
     bcmpkt_mpls_ach_t_reserved_get,
     bcmpkt_mpls_ach_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
     bcmpkt_mpls_ach_t_channel_type_set,
     bcmpkt_mpls_ach_t_cw_type_set,
     bcmpkt_mpls_ach_t_reserved_set,
     bcmpkt_mpls_ach_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_field_data,
 };
 
 
@@ -8365,21 +8232,21 @@ static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
     bcmpkt_mpls_bv_t_value_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
     bcmpkt_mpls_bv_t_value_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_BV_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_field_data,
 };
 
 
@@ -8428,25 +8295,25 @@ static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
     bcmpkt_mpls_cw_t_cw_type_get,
     bcmpkt_mpls_cw_t_reserved_get,
     bcmpkt_mpls_cw_t_seq_number_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
     bcmpkt_mpls_cw_t_cw_type_set,
     bcmpkt_mpls_cw_t_reserved_set,
     bcmpkt_mpls_cw_t_seq_number_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_CW_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_field_data,
 };
 
 
@@ -8510,27 +8377,27 @@ static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_mpls_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_mpls_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_FID_COUNT] = {
     bcmpkt_mpls_t_bos_get,
     bcmpkt_mpls_t_exp_get,
     bcmpkt_mpls_t_label_get,
     bcmpkt_mpls_t_ttl_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_mpls_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_mpls_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_FID_COUNT] = {
     bcmpkt_mpls_t_bos_set,
     bcmpkt_mpls_t_exp_set,
     bcmpkt_mpls_t_label_set,
     bcmpkt_mpls_t_ttl_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_mpls_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_mpls_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_mpls_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_mpls_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_mpls_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_MPLS_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_mpls_t_field_data,
 };
 
 
@@ -8747,7 +8614,7 @@ static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_p_1588_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_p_1588_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FID_COUNT] = {
     bcmpkt_p_1588_t_cntrl_get,
     bcmpkt_p_1588_t_correction_get,
     bcmpkt_p_1588_t_domain_nb_get,
@@ -8764,7 +8631,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_p_1588_t_fget[BCM56890_A0_DNA
     bcmpkt_p_1588_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_p_1588_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_p_1588_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FID_COUNT] = {
     bcmpkt_p_1588_t_cntrl_set,
     bcmpkt_p_1588_t_correction_set,
     bcmpkt_p_1588_t_domain_nb_set,
@@ -8781,13 +8648,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_p_1588_t_fset[BCM56890_A0_DNA
     bcmpkt_p_1588_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_p_1588_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_p_1588_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_p_1588_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_p_1588_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_p_1588_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_P_1588_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_p_1588_t_field_data,
 };
 
 
@@ -8837,25 +8704,25 @@ static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uin
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
     bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
     bcmpkt_prog_ext_hdr_t_next_header_get,
     bcmpkt_prog_ext_hdr_t_option_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
     bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
     bcmpkt_prog_ext_hdr_t_next_header_set,
     bcmpkt_prog_ext_hdr_t_option_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_field_data,
 };
 
 
@@ -8951,7 +8818,7 @@ static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uin
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
     bcmpkt_psamp_0_t_flowset_get,
     bcmpkt_psamp_0_t_length_get,
     bcmpkt_psamp_0_t_next_hop_index_get,
@@ -8960,7 +8827,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_fget[BCM56890_A0_DN
     bcmpkt_psamp_0_t_template_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
     bcmpkt_psamp_0_t_flowset_set,
     bcmpkt_psamp_0_t_length_set,
     bcmpkt_psamp_0_t_next_hop_index_set,
@@ -8969,13 +8836,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_fset[BCM56890_A0_DN
     bcmpkt_psamp_0_t_template_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_0_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_field_data,
 };
 
 
@@ -9084,7 +8951,7 @@ static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, u
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
     bcmpkt_psamp_1_t_dlb_id_get,
     bcmpkt_psamp_1_t_egress_port_get,
     bcmpkt_psamp_1_t_epoch_get,
@@ -9094,7 +8961,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_fget[BCM56890_A0_DN
     bcmpkt_psamp_1_t_variable_flag_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
     bcmpkt_psamp_1_t_dlb_id_set,
     bcmpkt_psamp_1_t_egress_port_set,
     bcmpkt_psamp_1_t_epoch_set,
@@ -9104,13 +8971,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_fset[BCM56890_A0_DN
     bcmpkt_psamp_1_t_variable_flag_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_1_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_field_data,
 };
 
 
@@ -9222,7 +9089,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, i
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
     bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
     bcmpkt_psamp_mirror_on_drop_0_t_length_get,
@@ -9232,7 +9099,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_fget
     bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
     bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
     bcmpkt_psamp_mirror_on_drop_0_t_length_set,
@@ -9242,13 +9109,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_fset
     bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_field_data,
 };
 
 
@@ -9357,7 +9224,7 @@ static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *d
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
     bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
     bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get,
@@ -9367,7 +9234,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_fget
     bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
     bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
     bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
     bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set,
@@ -9377,13 +9244,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_fset
     bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_field_data,
 };
 
 
@@ -9526,7 +9393,7 @@ static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_rarp_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_rarp_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_FID_COUNT] = {
     bcmpkt_rarp_t_hardware_len_get,
     bcmpkt_rarp_t_hardware_type_get,
     bcmpkt_rarp_t_operation_get,
@@ -9538,7 +9405,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_rarp_t_fget[BCM56890_A0_DNA_6
     bcmpkt_rarp_t_target_ip_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_rarp_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_rarp_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_FID_COUNT] = {
     bcmpkt_rarp_t_hardware_len_set,
     bcmpkt_rarp_t_hardware_type_set,
     bcmpkt_rarp_t_operation_set,
@@ -9550,13 +9417,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_rarp_t_fset[BCM56890_A0_DNA_6
     bcmpkt_rarp_t_target_ip_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rarp_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rarp_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_rarp_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_rarp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_rarp_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_rarp_t_field_data,
 };
 
 
@@ -9636,7 +9503,7 @@ static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, u
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_routing_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_routing_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_FID_COUNT] = {
     bcmpkt_routing_t_data_get,
     bcmpkt_routing_t_hdr_ext_len_get,
     bcmpkt_routing_t_next_header_get,
@@ -9644,7 +9511,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_routing_t_fget[BCM56890_A0_DN
     bcmpkt_routing_t_segments_left_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_routing_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_routing_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_FID_COUNT] = {
     bcmpkt_routing_t_data_set,
     bcmpkt_routing_t_hdr_ext_len_set,
     bcmpkt_routing_t_next_header_set,
@@ -9652,13 +9519,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_routing_t_fset[BCM56890_A0_DN
     bcmpkt_routing_t_segments_left_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_routing_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_routing_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_routing_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_routing_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_routing_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_ROUTING_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_routing_t_field_data,
 };
 
 
@@ -9692,23 +9559,23 @@ static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_rspan_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_rspan_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_FID_COUNT] = {
     bcmpkt_rspan_t_tag_get,
     bcmpkt_rspan_t_tpid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_rspan_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_rspan_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_FID_COUNT] = {
     bcmpkt_rspan_t_tag_set,
     bcmpkt_rspan_t_tpid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rspan_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_rspan_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_rspan_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_rspan_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_rspan_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_RSPAN_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_rspan_t_field_data,
 };
 
 
@@ -9817,7 +9684,7 @@ static int32_t bcmpkt_segment_routing_srh_t_tag_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = {
     bcmpkt_segment_routing_srh_t_flags_get,
     bcmpkt_segment_routing_srh_t_hdr_ext_len_get,
     bcmpkt_segment_routing_srh_t_last_entry_get,
@@ -9827,7 +9694,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_fget[BC
     bcmpkt_segment_routing_srh_t_tag_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = {
     bcmpkt_segment_routing_srh_t_flags_set,
     bcmpkt_segment_routing_srh_t_hdr_ext_len_set,
     bcmpkt_segment_routing_srh_t_last_entry_set,
@@ -9837,13 +9704,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_fset[BC
     bcmpkt_segment_routing_srh_t_tag_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_field_data,
 };
 
 
@@ -9953,7 +9820,7 @@ static int32_t bcmpkt_segment_routing_t_tag_set(uint32_t *data, int profile, uin
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = {
     bcmpkt_segment_routing_t_hdr_ext_len_get,
     bcmpkt_segment_routing_t_last_entry_flags_get,
     bcmpkt_segment_routing_t_next_header_get,
@@ -9963,7 +9830,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_fget[BCM568
     bcmpkt_segment_routing_t_tag_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = {
     bcmpkt_segment_routing_t_hdr_ext_len_set,
     bcmpkt_segment_routing_t_last_entry_flags_set,
     bcmpkt_segment_routing_t_next_header_set,
@@ -9973,13 +9840,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_fset[BCM568
     bcmpkt_segment_routing_t_tag_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_field_data,
 };
 
 
@@ -10029,25 +9896,25 @@ static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, ui
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
     bcmpkt_sflow_shim_0_t_sys_destination_get,
     bcmpkt_sflow_shim_0_t_sys_source_get,
     bcmpkt_sflow_shim_0_t_version_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
     bcmpkt_sflow_shim_0_t_sys_destination_set,
     bcmpkt_sflow_shim_0_t_sys_source_set,
     bcmpkt_sflow_shim_0_t_version_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_field_data,
 };
 
 
@@ -10171,7 +10038,7 @@ static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
     bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
     bcmpkt_sflow_shim_1_t_flag_discarded_get,
     bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
@@ -10182,7 +10049,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_fget[BCM56890_
     bcmpkt_sflow_shim_1_t_sys_opcode_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
     bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
     bcmpkt_sflow_shim_1_t_flag_discarded_set,
     bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
@@ -10193,13 +10060,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_fset[BCM56890_
     bcmpkt_sflow_shim_1_t_sys_opcode_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_field_data,
 };
 
 
@@ -10234,23 +10101,23 @@ static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int prof
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
     bcmpkt_sflow_shim_2_t_sequence_num_get,
     bcmpkt_sflow_shim_2_t_user_meta_data_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
     bcmpkt_sflow_shim_2_t_sequence_num_set,
     bcmpkt_sflow_shim_2_t_user_meta_data_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_field_data,
 };
 
 
@@ -10285,23 +10152,23 @@ static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint3
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
     bcmpkt_snap_llc_t_length_get,
     bcmpkt_snap_llc_t_snap_llc_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
     bcmpkt_snap_llc_t_length_set,
     bcmpkt_snap_llc_t_snap_llc_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_field_data,
 };
 
 
@@ -10321,21 +10188,21 @@ static int32_t bcmpkt_std_segment_id_t_data_set(uint32_t *data, int profile, uin
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = {
     bcmpkt_std_segment_id_t_data_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = {
     bcmpkt_std_segment_id_t_data_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_field_data,
 };
 
 
@@ -10369,23 +10236,23 @@ static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_svtag_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_svtag_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_FID_COUNT] = {
     bcmpkt_svtag_t_data_lwr_get,
     bcmpkt_svtag_t_data_upr_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_svtag_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_svtag_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_FID_COUNT] = {
     bcmpkt_svtag_t_data_lwr_set,
     bcmpkt_svtag_t_data_upr_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_svtag_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_svtag_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_svtag_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_svtag_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_svtag_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_SVTAG_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_svtag_t_field_data,
 };
 
 
@@ -10419,23 +10286,23 @@ static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profil
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_first_4bytes_t_dst_port_get,
     bcmpkt_tcp_first_4bytes_t_src_port_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_first_4bytes_t_dst_port_set,
     bcmpkt_tcp_first_4bytes_t_src_port_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_field_data,
 };
 
 
@@ -10531,7 +10398,7 @@ static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profil
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_last_16bytes_t_ack_num_get,
     bcmpkt_tcp_last_16bytes_t_checksum_get,
     bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
@@ -10540,7 +10407,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_fget[BCM56
     bcmpkt_tcp_last_16bytes_t_win_size_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
     bcmpkt_tcp_last_16bytes_t_ack_num_set,
     bcmpkt_tcp_last_16bytes_t_checksum_set,
     bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
@@ -10549,13 +10416,13 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_fset[BCM56
     bcmpkt_tcp_last_16bytes_t_win_size_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_field_data,
 };
 
 
@@ -10619,27 +10486,27 @@ static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_udp_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_udp_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_FID_COUNT] = {
     bcmpkt_udp_t_checksum_get,
     bcmpkt_udp_t_dst_port_get,
     bcmpkt_udp_t_src_port_get,
     bcmpkt_udp_t_udp_length_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_udp_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_udp_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_FID_COUNT] = {
     bcmpkt_udp_t_checksum_set,
     bcmpkt_udp_t_dst_port_set,
     bcmpkt_udp_t_src_port_set,
     bcmpkt_udp_t_udp_length_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_udp_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_udp_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_udp_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_udp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_udp_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_udp_t_field_data,
 };
 
 
@@ -10675,23 +10542,23 @@ static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
     bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
     bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
     bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
     bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_field_data,
 };
 
 
@@ -10711,21 +10578,21 @@ static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
     bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
     bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_field_data,
 };
 
 
@@ -10790,27 +10657,27 @@ static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_set(uint32_t *data, int profile,
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
     bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
     bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
     bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
     bcmpkt_unknown_l5_t_l5_bytes_8_9_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
     bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
     bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
     bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
     bcmpkt_unknown_l5_t_l5_bytes_8_9_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_field_data,
 };
 
 
@@ -10874,27 +10741,27 @@ static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val)
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_vlan_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_vlan_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_FID_COUNT] = {
     bcmpkt_vlan_t_cfi_get,
     bcmpkt_vlan_t_pcp_get,
     bcmpkt_vlan_t_tpid_get,
     bcmpkt_vlan_t_vid_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_vlan_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_vlan_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_FID_COUNT] = {
     bcmpkt_vlan_t_cfi_set,
     bcmpkt_vlan_t_pcp_set,
     bcmpkt_vlan_t_tpid_set,
     bcmpkt_vlan_t_vid_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_vlan_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_vlan_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_vlan_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_vlan_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_vlan_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_vlan_t_field_data,
 };
 
 
@@ -10944,25 +10811,25 @@ static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t va
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_vxlan_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_vxlan_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FID_COUNT] = {
     bcmpkt_vxlan_t_flags_reserved_1_get,
     bcmpkt_vxlan_t_reserved2_get,
     bcmpkt_vxlan_t_vn_id_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_vxlan_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_vxlan_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FID_COUNT] = {
     bcmpkt_vxlan_t_flags_reserved_1_set,
     bcmpkt_vxlan_t_reserved2_set,
     bcmpkt_vxlan_t_vn_id_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_vxlan_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_vxlan_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_vxlan_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_vxlan_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_vxlan_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_vxlan_t_field_data,
 };
 
 
@@ -11074,7 +10941,7 @@ static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t v
     return ret;
 }
 
-bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_wesp_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FID_COUNT] = {
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_30_8_0_wesp_t_fget[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FID_COUNT] = {
     bcmpkt_wesp_t_flags_get,
     bcmpkt_wesp_t_header_len_get,
     bcmpkt_wesp_t_next_header_get,
@@ -11084,7 +10951,7 @@ bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_wesp_t_fget[BCM56890_A0_DNA_6
     bcmpkt_wesp_t_wesp_iv_get,
 };
 
-bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_wesp_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FID_COUNT] = {
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_30_8_0_wesp_t_fset[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FID_COUNT] = {
     bcmpkt_wesp_t_flags_set,
     bcmpkt_wesp_t_header_len_set,
     bcmpkt_wesp_t_next_header_set,
@@ -11094,543 +10961,515 @@ bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_wesp_t_fset[BCM56890_A0_DNA_6
     bcmpkt_wesp_t_wesp_iv_set,
 };
 
-static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_wesp_t_field_data[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_30_8_0_wesp_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
 };
 
-static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_wesp_t_field_info = {
-    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FID_COUNT,
-    .info = bcm56890_a0_dna_6_5_29_1_2_wesp_t_field_data,
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_30_8_0_wesp_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_WESP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_30_8_0_wesp_t_field_data,
 };
 
-static bcmpkt_flex_pmd_info_t bcm56890_a0_dna_6_5_29_1_2_flexhdr_info_list[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_COUNT] = {
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_arp_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_arp_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_arp_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_authen_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_authen_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_authen_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_bfd_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_bfd_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_bfd_t_fset,
-    },
-    {
-        .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_cntag_t_field_info,
-        .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_cntag_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_cntag_t_fset,
-    },
+static bcmpkt_flex_pmd_info_t bcm56890_a0_dna_6_5_30_8_0_flexhdr_info_list[BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_COUNT] = {
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_arp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_arp_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_arp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_authen_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_authen_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_authen_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_dest_option_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_bfd_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_dest_option_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_dest_option_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_bfd_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_bfd_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_cntag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_cntag_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_cntag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_cpu_composites_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_cpu_composites_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_esp_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_dest_option_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_esp_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_esp_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_dest_option_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_dest_option_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ethertype_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ethertype_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ethertype_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ep_nih_header_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_frag_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_frag_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_frag_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_erspan3_fixed_hdr_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_erspan3_subhdr_5_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_esp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_esp_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_esp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_gpe_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_ethertype_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_gpe_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_gpe_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ethertype_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ethertype_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_frag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_frag_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_frag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_gre_key_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_gre_key_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_gre_key_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_gbp_ethernet_shim_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_generic_loopback_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_gpe_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_gpe_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_gpe_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_gre_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_gre_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_gre_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_gre_chksum_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_gre_key_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_gre_key_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_gre_key_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_gre_rout_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_gre_seq_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_icmp_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_gre_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_icmp_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_icmp_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_gre_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_gre_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_hg3_base_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_hg3_extension_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_hop_by_hop_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_icmp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_icmp_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_icmp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ifa_header_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_a_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_b_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ifa_metadata_base_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_igmp_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_igmp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_igmp_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_igmp_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_igmp_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_igmp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ioam_e2e_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ipfix_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_ipfix_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ipfix_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ipfix_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ipfix_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ipfix_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ipv4_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_ipv4_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ipv4_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ipv4_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ipv4_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ipv4_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ipv6_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_ipv6_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ipv6_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ipv6_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_ipv6_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_ipv6_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_l2_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_l2_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_l2_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_l2_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_l2_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_l2_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_mirror_erspan_sn_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_mirror_transport_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_mpls_ach_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_mpls_bv_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_mpls_cw_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_mpls_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_mpls_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_mpls_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_mpls_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_mpls_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_mpls_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_p_1588_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_p_1588_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_p_1588_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_p_1588_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_p_1588_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_p_1588_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_prog_ext_hdr_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_psamp_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_psamp_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_psamp_mirror_on_drop_3_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_rarp_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_rarp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_rarp_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_rarp_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_rarp_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_rarp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_routing_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_routing_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_routing_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_routing_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_routing_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_routing_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_rspan_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_rspan_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_rspan_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_rspan_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_rspan_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_rspan_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_segment_routing_srh_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_segment_routing_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_0_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_1_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_sflow_shim_2_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_snap_llc_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_std_segment_id_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_svtag_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_svtag_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_svtag_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_svtag_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_svtag_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_svtag_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_tcp_first_4bytes_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_tcp_last_16bytes_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_udp_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_udp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_udp_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_udp_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_udp_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_udp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_unknown_l3_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_unknown_l4_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_unknown_l5_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_vlan_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_vlan_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_vlan_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_vlan_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_vlan_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_vlan_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_vxlan_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_vxlan_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_vxlan_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_vxlan_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_vxlan_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_vxlan_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_wesp_t_field_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_wesp_t_field_info,
         .reasons_info = NULL,
-        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_wesp_t_fget,
-        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_wesp_t_fset,
+        .flex_fget = bcm56890_a0_dna_6_5_30_8_0_wesp_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_30_8_0_wesp_t_fset,
     },
     {
         .is_supported = TRUE,
-        .field_info = &bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_info,
-        .reasons_info = &bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reasons_info,
+        .field_info = &bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_field_info,
+        .reasons_info = &bcm56890_a0_dna_6_5_30_8_0_rxpmd_flex_reasons_info,
         .flex_common_fget = bcm56890_a0_rxpmd_flex_fget,
         .flex_common_fset = bcm56890_a0_rxpmd_flex_fset,
     },
 };
 
-static shr_enum_map_t bcm56890_a0_dna_6_5_29_1_2_flexhdr_id_map[] = {
-    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_NAME_MAP_INIT
+static shr_enum_map_t bcm56890_a0_dna_6_5_30_8_0_flexhdr_id_map[] = {
+    BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
 };
 
-shr_enum_map_t * bcm56890_a0_dna_6_5_29_1_2_flexhdr_map_get(void)
+shr_enum_map_t * bcm56890_a0_dna_6_5_30_8_0_flexhdr_map_get(void)
 {
-    return bcm56890_a0_dna_6_5_29_1_2_flexhdr_id_map;
+    return bcm56890_a0_dna_6_5_30_8_0_flexhdr_id_map;
 }
 
-bcmpkt_flex_pmd_info_t * bcm56890_a0_dna_6_5_29_1_2_flex_pmd_info_get(uint32_t hid)
+bcmpkt_flex_pmd_info_t * bcm56890_a0_dna_6_5_30_8_0_flex_pmd_info_get(uint32_t hid)
 {
-    if (hid >= BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_COUNT) {
+    if (hid >= BCM56890_A0_DNA_6_5_30_8_0_BCMPKT_FLEXHDR_COUNT) {
         return NULL;
     }
 
-    return &bcm56890_a0_dna_6_5_29_1_2_flexhdr_info_list[hid];
+    return &bcm56890_a0_dna_6_5_30_8_0_flexhdr_info_list[hid];
 }
 
-int bcm56890_a0_dna_6_5_29_1_2_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+int bcm56890_a0_dna_6_5_30_8_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
     14,
     21,
     22,
-    71,
-};
\ No newline at end of file
+    67,
+};
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_match_id.c
new file mode 100644
index 000000000000..2f34751f8ff6
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_match_id.c
@@ -0,0 +1,7400 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm78800_a0_dna_6_5_30_3_1_sf_match_id_info.yml
+ * for device bcm78800_a0 and variant dna_6_5_30_3_1.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_match_id_defs.h>
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] =
+{
+    0x366c,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] =
+{
+    0x78f0,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] =
+{
+    0x1fffe,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] =
+{
+    0xff00,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] =
+{
+    0x1e4c8,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[39] =
+{
+    0x10,
+    0x400000,
+    0x1dd8000,
+    0x20,
+    0x0,
+    0x0,
+    0x0,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xddfddf77,
+    0x1,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x400000,
+    0x0,
+    0x100,
+    0x800776,
+    0x0,
+    0x0,
+    0x0,
+    0xf77c0000,
+    0xefeeff77,
+    0x7ddfddfe,
+    0x777f7,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[55] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde,
+    0x0,
+    0x0,
+    0x7778,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0xbc000000,
+    0x3b,
+    0x0,
+    0x0,
+    0x3bbc0,
+    0x0,
+    0x0,
+    0x77780,
+    0x0,
+    0x0,
+    0x3bbc0000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0xdde00000,
+    0x1,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0xde000000,
+    0x1d,
+    0x0,
+    0x0,
+    0xeef0,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[57] =
+{
+    0x0,
+    0x0,
+    0x100000,
+    0x1000000,
+    0x0,
+    0x0,
+    0x2000,
+    0x100100,
+    0x4002002,
+    0x10010040,
+    0x400400,
+    0x10008008,
+    0x40040100,
+    0x1001000,
+    0x40040020,
+    0x100100,
+    0x4002002,
+    0x80080040,
+    0x200200,
+    0x2002000,
+    0x80040040,
+    0x200800,
+    0x4004002,
+    0x80080,
+    0x401001,
+    0x2001004,
+    0x40040020,
+    0x800800,
+    0x2002,
+    0x0,
+    0x0,
+    0x40,
+    0x400,
+    0x0,
+    0x80000000,
+    0x4000000,
+    0x80080040,
+    0x1001000,
+    0x10004004,
+    0x200100,
+    0x4004002,
+    0x40010010,
+    0x800400,
+    0x4010010,
+    0x80080040,
+    0x1001000,
+    0x8020020,
+    0x80000080,
+    0x1000800,
+    0x20020010,
+    0x80080,
+    0x2001001,
+    0x40040020,
+    0x40100100,
+    0x800800,
+    0x20010010,
+    0x80080200,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xff77f77c,
+    0xddfeefee,
+    0x77f77ddf,
+    0x7,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xddf00000,
+    0xbfbbfddf,
+    0xf77f77fb,
+    0x1ddfdd,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[55] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde000,
+    0x0,
+    0x0,
+    0x7778000,
+    0x0,
+    0x0,
+    0x1dde0000,
+    0x0,
+    0x0,
+    0x3bbc0,
+    0x0,
+    0x0,
+    0x3bbc0000,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0xc0000000,
+    0x3bb,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0x1dde,
+    0x0,
+    0x0,
+    0x7778,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0x0,
+    0xeef0,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0x0,
+    0xeef0000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[55] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x40,
+    0x0,
+    0x0,
+    0x0,
+    0x2000000,
+    0x0,
+    0x0,
+    0x8000000,
+    0x0,
+    0x0,
+    0x20000008,
+    0x0,
+    0x0,
+    0x40000,
+    0x0,
+    0x0,
+    0x40000000,
+    0x0,
+    0x0,
+    0x80000000,
+    0x0,
+    0x0,
+    0x0,
+    0x400,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1000000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x800,
+    0x0,
+    0x0,
+    0x2000,
+    0x0,
+    0x200000,
+    0x8000,
+    0x0,
+    0x0,
+    0x10,
+    0x0,
+    0x0,
+    0x10000,
+    0x0,
+    0x0,
+    0x20000,
+    0x0,
+    0x0,
+    0x10000000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[29] =
+{
+    0x1e,
+    0x400000,
+    0x1dd8000,
+    0x3ddcafe0,
+    0x0,
+    0x8000,
+    0xc003bb00,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xddfddf77,
+    0xff77f77d,
+    0xddfeefee,
+    0x77f77ddf,
+    0xfddfddff,
+    0x77f77fbb,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xefeeff77,
+    0x7fbbfbbe,
+    0xfbbfbbe5,
+    0xeff77f77,
+    0xbfbbeefe,
+    0xf77f77fb,
+    0xdfeefeef,
+    0x7f77ddfd,
+    0xfbbfddf7,
+    0x77f77fbb,
+    0xbeefeeff,
+    0x1bbbfb,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[45] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfddfddf0,
+    0x77f77fbb,
+    0x1ddfddf,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77c00000,
+    0xfeeff77f,
+    0xf77ddfdd,
+    0x777,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[56] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x3b,
+    0x0,
+    0xf0000000,
+    0xee,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0xeef,
+    0x0,
+    0x0,
+    0x777800,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0x3bbc000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0x0,
+    0x1dde0000,
+    0x0,
+    0x0,
+    0x3bbc0000,
+    0x0,
+    0x0,
+    0xe0000000,
+    0x1dd,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[48] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbe000000,
+    0xf77fbbfb,
+    0xefeeff77,
+    0x3bbfbbe,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xefeef800,
+    0xfddfddfe,
+    0xeefbbfbb,
+    0xeef,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[56] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3bbc0,
+    0x0,
+    0x0,
+    0xeef00,
+    0x0,
+    0xc0000000,
+    0x3bb,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0x777800,
+    0x0,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0xbc000000,
+    0x3b,
+    0x0,
+    0xeef0000,
+    0x0,
+    0x0,
+    0x1dde0000,
+    0x0,
+    0x0,
+    0xe0000000,
+    0x1dd,
+    0x0,
+    0xc0000000,
+    0x3bb,
+    0x0,
+    0x0,
+    0x1dde00,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[57] =
+{
+    0x0,
+    0x400000,
+    0x0,
+    0x80,
+    0x0,
+    0x8000,
+    0x0,
+    0x8004004,
+    0x140080,
+    0x400001,
+    0x20010010,
+    0x500200,
+    0x1000004,
+    0x80040040,
+    0x1001400,
+    0x8004000,
+    0x100080,
+    0x2002801,
+    0x4008000,
+    0x80080,
+    0x2801001,
+    0x8000020,
+    0x100100,
+    0x5002002,
+    0x10000040,
+    0x80080000,
+    0x1001000,
+    0x20028,
+    0x80,
+    0x0,
+    0x100,
+    0x2000000,
+    0x0,
+    0x0,
+    0x2,
+    0x100000,
+    0x2002001,
+    0x40050,
+    0x400100,
+    0x8008004,
+    0x100140,
+    0x1000400,
+    0x50020010,
+    0x400,
+    0x2002001,
+    0xa0040040,
+    0x800,
+    0x2001002,
+    0x40040020,
+    0x800a00,
+    0x4002000,
+    0x80080040,
+    0x1001400,
+    0x4000,
+    0x40020020,
+    0xa00400,
+    0x2000008,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[48] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0xaf00,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x78000000,
+    0x5,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x2,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x15e000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base[48] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x8800,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x40000000,
+    0x4,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x20000000,
+    0x2,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x110000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[36] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x40020,
+    0x0,
+    0x0,
+    0x40000000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x800000,
+    0x10,
+    0x0,
+    0x0,
+    0x10000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[36] =
+{
+    0x18,
+    0x400000,
+    0x1dd8000,
+    0x3ddcafe0,
+    0x0,
+    0x8000,
+    0x4003bb00,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x600000,
+    0x0,
+    0x100,
+    0xbf800776,
+    0xf772,
+    0x0,
+    0xec000002,
+    0x1000e,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[58] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xddfddf77,
+    0xff77f77d,
+    0xddfeefee,
+    0x77f77ddf,
+    0xfddfddff,
+    0x77f77fbb,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xefeeff77,
+    0x7fbbfbbe,
+    0xfbbfbbe5,
+    0xeff77f77,
+    0xbfbbeefe,
+    0xf77f77fb,
+    0xdfeefeef,
+    0x7f77ddfd,
+    0xfbbfddf7,
+    0x77f77fbb,
+    0xbeefeeff,
+    0x3bbfb,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf77e0000,
+    0xefeeff77,
+    0x7ddfddfe,
+    0xddf777f7,
+    0xbfbbfddf,
+    0xf77f77fb,
+    0x77fddfdd,
+    0xfeeff77f,
+    0xf77ddfdd,
+    0xefeeff77,
+    0xfddfddfe,
+    0xeefbbfbb,
+    0xef95feef,
+    0xfddfeefe,
+    0xbbfbbfdd,
+    0xdfeefeef,
+    0xfbbfddfd,
+    0x77f77fbb,
+    0x77ddfddf,
+    0xfeefeeff,
+    0xbbfddfdd,
+    0xefeefbbf,
+    0xe,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[58] =
+{
+    0x0,
+    0x0,
+    0x400000,
+    0x4000000,
+    0x0,
+    0x0,
+    0x8000,
+    0x400400,
+    0x10008008,
+    0x40040100,
+    0x1001000,
+    0x40020020,
+    0x100400,
+    0x4004001,
+    0x100080,
+    0x400401,
+    0x10008008,
+    0x200100,
+    0x800802,
+    0x8008000,
+    0x100100,
+    0x802002,
+    0x10010008,
+    0x200200,
+    0x1004004,
+    0x8004010,
+    0x100080,
+    0x2002001,
+    0x8008,
+    0x0,
+    0x0,
+    0x100,
+    0x1000,
+    0x0,
+    0x0,
+    0x10000002,
+    0x200100,
+    0x4004002,
+    0x40010010,
+    0x800400,
+    0x10010008,
+    0x40040,
+    0x2001001,
+    0x10040040,
+    0x200100,
+    0x4004002,
+    0x20080080,
+    0x200,
+    0x4002002,
+    0x80080040,
+    0x200200,
+    0x8004004,
+    0x100080,
+    0x400401,
+    0x2002001,
+    0x80040040,
+    0x200800,
+    0x2,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[51] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbbfbbe0,
+    0xeff77f77,
+    0xbfbbeefe,
+    0x3b,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xef800000,
+    0xfddfeefe,
+    0xbbfbbfdd,
+    0xeefeef,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[57] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0xdde00000,
+    0x1,
+    0x0,
+    0x777800,
+    0x0,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0xde000000,
+    0x1d,
+    0x0,
+    0x0,
+    0xeef0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0x0,
+    0x77780,
+    0x0,
+    0xe0000000,
+    0x1dd,
+    0x0,
+    0xc0000000,
+    0x3bb,
+    0x0,
+    0x0,
+    0x3bbc00,
+    0x0,
+    0x0,
+    0x777800,
+    0x0,
+    0x0,
+    0xbbc00000,
+    0x3,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[29] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[54] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf77f77c0,
+    0xdfeefeef,
+    0x7f77ddfd,
+    0x77,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xdf000000,
+    0xfbbfddfd,
+    0x77f77fbb,
+    0x1ddfddf,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[57] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0x1dde,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0x0,
+    0xeef0,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0x0,
+    0xeef0000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde0000,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0x1dde00,
+    0x0,
+    0x0,
+    0x3bbc00,
+    0x0,
+    0x0,
+    0xbbc00000,
+    0x3,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0x0,
+    0x3bbc,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[57] =
+{
+    0x0,
+    0x0,
+    0x58000,
+    0x580e00,
+    0x0,
+    0x0,
+    0xb00,
+    0xb0058058,
+    0x1600b00,
+    0x5805816,
+    0xc0160160,
+    0x5802c02,
+    0x16016058,
+    0x580580,
+    0x1601600b,
+    0xb0058058,
+    0x1600b00,
+    0x2c02c016,
+    0x700b00b0,
+    0xb00b00,
+    0x2c016016,
+    0xb00b02c0,
+    0x1601600,
+    0x5802c02c,
+    0x60160580,
+    0xb00581,
+    0x1601600b,
+    0xb02c02c0,
+    0xb00,
+    0x0,
+    0x0,
+    0x38000016,
+    0x160,
+    0x0,
+    0x2c000000,
+    0x1600000,
+    0x2c02c016,
+    0x60580580,
+    0x5801601,
+    0xb00b0058,
+    0x81601600,
+    0x16005805,
+    0x802c0160,
+    0x1605805,
+    0x2c02c016,
+    0x580580,
+    0x2c0b00b,
+    0x2c01c02c,
+    0x805802c0,
+    0xb00b005,
+    0x5802c02c,
+    0xb00580,
+    0x1601600b,
+    0x16058058,
+    0x802c02c0,
+    0xb005805,
+    0x2c02c0b0,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[57] =
+{
+    0x0,
+    0x0,
+    0x50000,
+    0x500c00,
+    0x0,
+    0x0,
+    0xa00,
+    0xa0050050,
+    0x1400a00,
+    0x5005014,
+    0x80140140,
+    0x5002802,
+    0x14014050,
+    0x500500,
+    0x1401400a,
+    0xa0050050,
+    0x1400a00,
+    0x28028014,
+    0x600a00a0,
+    0xa00a00,
+    0x28014014,
+    0xa00a0280,
+    0x1401400,
+    0x50028028,
+    0x40140500,
+    0xa00501,
+    0x1401400a,
+    0xa0280280,
+    0xa00,
+    0x0,
+    0x0,
+    0x30000014,
+    0x140,
+    0x0,
+    0x28000000,
+    0x1400000,
+    0x28028014,
+    0x40500500,
+    0x5001401,
+    0xa00a0050,
+    0x1401400,
+    0x14005005,
+    0x280140,
+    0x1405005,
+    0x28028014,
+    0x500500,
+    0x280a00a,
+    0x28018028,
+    0x500280,
+    0xa00a005,
+    0x50028028,
+    0xa00500,
+    0x1401400a,
+    0x14050050,
+    0x280280,
+    0xa005005,
+    0x280280a0,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[58] =
+{
+    0x0,
+    0x0,
+    0xd80000,
+    0xd80a000,
+    0x0,
+    0x0,
+    0x1b000,
+    0xd80d80,
+    0x3601b01b,
+    0xd80d8360,
+    0x3603600,
+    0xd806c06c,
+    0x60360d80,
+    0xd80d803,
+    0x603601b0,
+    0xd80d83,
+    0x3601b01b,
+    0xc06c0360,
+    0x1b01b06,
+    0x1b01b005,
+    0xc0360360,
+    0x1b06c06,
+    0x3603601b,
+    0x806c06c0,
+    0x360d80d,
+    0x1b00d836,
+    0x603601b0,
+    0x6c06c03,
+    0x1b01b,
+    0x0,
+    0x0,
+    0x80000360,
+    0x3602,
+    0x0,
+    0xc0000000,
+    0x36000006,
+    0xc06c0360,
+    0xd80d806,
+    0xd8036036,
+    0x1b00d80,
+    0x3603601b,
+    0x600d80d8,
+    0x6c03603,
+    0x360d80d8,
+    0xc06c0360,
+    0xd80d806,
+    0x6c1b01b0,
+    0xc01406c0,
+    0xd806c06,
+    0xb01b00d8,
+    0x806c06c1,
+    0x1b00d80d,
+    0x603601b0,
+    0x60d80d83,
+    0x6c06c03,
+    0xb00d80d8,
+    0xc06c1b01,
+    0x6,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[29] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x100000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[58] =
+{
+    0x0,
+    0x0,
+    0x1000000,
+    0x10000000,
+    0x0,
+    0x0,
+    0x20000,
+    0x1001000,
+    0x40020020,
+    0x100400,
+    0x4004001,
+    0x80080,
+    0x401001,
+    0x10010004,
+    0x400200,
+    0x1001004,
+    0x40020020,
+    0x800400,
+    0x2002008,
+    0x20020000,
+    0x400400,
+    0x2008008,
+    0x40040020,
+    0x800800,
+    0x4010010,
+    0x20010040,
+    0x400200,
+    0x8008004,
+    0x20020,
+    0x0,
+    0x0,
+    0x400,
+    0x4000,
+    0x0,
+    0x0,
+    0x40000008,
+    0x800400,
+    0x10010008,
+    0x40040,
+    0x2001001,
+    0x40040020,
+    0x100100,
+    0x8004004,
+    0x40100100,
+    0x800400,
+    0x10010008,
+    0x80200200,
+    0x800,
+    0x10008008,
+    0x200100,
+    0x800802,
+    0x20010010,
+    0x400200,
+    0x1001004,
+    0x8008004,
+    0x100100,
+    0x802002,
+    0x8,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[58] =
+{
+    0x0,
+    0x0,
+    0x840000,
+    0x8400000,
+    0x0,
+    0x0,
+    0x10800,
+    0x80840840,
+    0x21010810,
+    0x84084210,
+    0x2102100,
+    0x84042042,
+    0x10210840,
+    0x8408402,
+    0x10210108,
+    0x80840842,
+    0x21010810,
+    0x20420210,
+    0x1081084,
+    0x10810800,
+    0x20210210,
+    0x81084204,
+    0x21021010,
+    0x40420420,
+    0x2108408,
+    0x10808421,
+    0x10210108,
+    0x84204202,
+    0x10810,
+    0x0,
+    0x0,
+    0x210,
+    0x2100,
+    0x0,
+    0x20000000,
+    0x21000004,
+    0x20420210,
+    0x8408404,
+    0x84021021,
+    0x81080840,
+    0x21021010,
+    0x10084084,
+    0x4202102,
+    0x21084084,
+    0x20420210,
+    0x8408404,
+    0x42108108,
+    0x20000420,
+    0x8404204,
+    0x8108084,
+    0x40420421,
+    0x10808408,
+    0x10210108,
+    0x10840842,
+    0x4204202,
+    0x8084084,
+    0x20421081,
+    0x4,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[58] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x20000000,
+    0x0,
+    0x8000,
+    0x4003bb00,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbbe0000,
+    0x77f77fbb,
+    0xbeefeeff,
+    0x3bbfb,
+    0x0,
+    0x0,
+    0x0,
+    0x8000,
+    0x0,
+    0xec000002,
+    0x1000e,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfeefeef8,
+    0xbbfddfdd,
+    0xefeefbbf,
+    0xe,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[58] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xdde00000,
+    0x1,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0x1dde000,
+    0x0,
+    0x0,
+    0x3bbc000,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x3b,
+    0x0,
+    0x78000000,
+    0x77,
+    0x0,
+    0x0,
+    0x3bbc0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77780,
+    0x0,
+    0x0,
+    0x1dde00,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0xeef,
+    0x0,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0x1dde000,
+    0x0,
+    0x0,
+    0xef000000,
+    0xe,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[2] =
+{
+    0xcc066330,
+    0x66330198,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[2] =
+{
+    0x10088440,
+    0x88440221,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[3] =
+{
+    0xff800000,
+    0xffffffff,
+    0x7,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[3] =
+{
+    0x0,
+    0xffffe000,
+    0x7,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[3] =
+{
+    0xe01f0f80,
+    0xf0f807c3,
+    0x1,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[3] =
+{
+    0xfffffffe,
+    0xffffffff,
+    0x7,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[3] =
+{
+    0x3ff000,
+    0xff000ffc,
+    0x3,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[3] =
+{
+    0x88744a20,
+    0x44a21d12,
+    0x7,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[15] =
+{
+    0x10,
+    0x0,
+    0x40,
+    0x1efd80,
+    0x20,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xeff7ef80,
+    0xdfefdff7,
+    0xbfdfbfef,
+    0xeff7efdf,
+    0xf7,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7ef00,
+    0x0,
+    0x0,
+    0x0,
+    0x3dfbc00,
+    0x0,
+    0x0,
+    0x0,
+    0xf7ef000,
+    0x0,
+    0x0,
+    0x0,
+    0xf0000000,
+    0xf7e,
+    0x0,
+    0x0,
+    0x0,
+    0xf7ef000,
+    0x0,
+    0x0,
+    0x0,
+    0x3dfbc000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7ef000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x1000,
+    0x0,
+    0x8000000,
+    0x0,
+    0x0,
+    0x0,
+    0x1000,
+    0x80008000,
+    0x10000,
+    0x20001,
+    0x80008002,
+    0x20000,
+    0x40002,
+    0x80004,
+    0x20008,
+    0x80002,
+    0x100008,
+    0x200020,
+    0x80008,
+    0x0,
+    0x80008,
+    0x100010,
+    0x200020,
+    0x80008,
+    0x80000,
+    0x100008,
+    0x200010,
+    0x80020,
+    0x200008,
+    0x400020,
+    0x800040,
+    0x200080,
+    0x100020,
+    0x80004,
+    0x100008,
+    0x200010,
+    0x80020,
+    0x44400008,
+    0x4444,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dcn[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x2000,
+    0x0,
+    0x10000000,
+    0x0,
+    0x0,
+    0x0,
+    0x2000,
+    0x10000,
+    0x20001,
+    0x40002,
+    0x10004,
+    0x40001,
+    0x80004,
+    0x100008,
+    0x40010,
+    0x100004,
+    0x200010,
+    0x400040,
+    0x100010,
+    0x0,
+    0x100010,
+    0x200020,
+    0x400040,
+    0x100010,
+    0x100000,
+    0x200010,
+    0x400020,
+    0x100040,
+    0x400010,
+    0x800040,
+    0x1000080,
+    0x400100,
+    0x200040,
+    0x100008,
+    0x200010,
+    0x400020,
+    0x100040,
+    0x10,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[19] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbfdfbe00,
+    0x7fbf7fdf,
+    0xff7effbf,
+    0xbfdfbf7e,
+    0x3df,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xef000000,
+    0xf7,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x3df,
+    0x0,
+    0x0,
+    0xf0000000,
+    0xf7e,
+    0x0,
+    0x0,
+    0x0,
+    0xf7ef000,
+    0x0,
+    0x0,
+    0x0,
+    0xf0000000,
+    0xf7e,
+    0x0,
+    0x0,
+    0xc0000000,
+    0x3dfb,
+    0x0,
+    0x0,
+    0x0,
+    0xf0000000,
+    0xf7e,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x40,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x100,
+    0x0,
+    0x0,
+    0x0,
+    0x400,
+    0x0,
+    0x0,
+    0x400,
+    0x1000,
+    0x0,
+    0x0,
+    0x0,
+    0x10000000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1000,
+    0x0,
+    0x0,
+    0x0,
+    0x4000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[42] =
+{
+    0x1e,
+    0x0,
+    0x40,
+    0x1efd80,
+    0xffffffe0,
+    0x7ee217ff,
+    0x1f,
+    0x0,
+    0x40,
+    0x1efd80,
+    0xeff7efe0,
+    0xdfefdff7,
+    0xbfdfbfef,
+    0xeff7efdf,
+    0xbfdfbef7,
+    0x7fbf7fdf,
+    0xff7effbf,
+    0xbfdfbf7e,
+    0xff7effdf,
+    0xfefdff7e,
+    0xfdfbfdfb,
+    0xff7eff7e,
+    0xffffffff,
+    0xff7eff7e,
+    0xfefdfefd,
+    0xfdfbfdfb,
+    0xff7eff7e,
+    0xff7ef885,
+    0xfefdff7e,
+    0xfdfbfefd,
+    0xff7efdfb,
+    0xfdfbff7e,
+    0xfbf7fdfb,
+    0xf7effbf7,
+    0xfdfbf7ef,
+    0x7efdfdfb,
+    0xff7effbf,
+    0xfefdff7e,
+    0xfdfbfefd,
+    0xff7efdfb,
+    0xffffef7e,
+    0x7ffff,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[22] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xff7ef800,
+    0xfefdff7e,
+    0xfdfbfdfb,
+    0xf7eff7e,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1efde00,
+    0x0,
+    0x0,
+    0x0,
+    0x7bf7800,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xe0000000,
+    0x1efd,
+    0x0,
+    0x0,
+    0x0,
+    0x1efde000,
+    0x0,
+    0x0,
+    0x0,
+    0x7bf78000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1efde000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0xc000,
+    0x0,
+    0x60000000,
+    0x0,
+    0x0,
+    0x0,
+    0xc000,
+    0x60000,
+    0xc0006,
+    0x18000c,
+    0x60018,
+    0x180006,
+    0x300018,
+    0x600030,
+    0x180060,
+    0x600018,
+    0xc00060,
+    0x1800180,
+    0x600060,
+    0x0,
+    0x600060,
+    0xc000c0,
+    0x1800180,
+    0x600060,
+    0x600000,
+    0xc00060,
+    0x18000c0,
+    0x600180,
+    0x1800060,
+    0x3000180,
+    0x6000300,
+    0x1800600,
+    0xc00180,
+    0x600030,
+    0xc00060,
+    0x18000c0,
+    0x600180,
+    0x60,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[23] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffffff80,
+    0x3f,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf0000000,
+    0x7ffffff,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[23] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1fffe00,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xc0000000,
+    0x3fff,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[23] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfe03fc00,
+    0x1,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0x3fc07f,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[23] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x999b3000,
+    0x31,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x6333366,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[23] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xe1e3c000,
+    0x3d,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7bc3c78,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[27] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf8000000,
+    0xff7eff7e,
+    0xfefdfefd,
+    0xfdfbfdfb,
+    0xf7eff7e,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xde000000,
+    0x1ef,
+    0x0,
+    0x0,
+    0x78000000,
+    0x7bf,
+    0x0,
+    0x0,
+    0x1efde000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1efde000,
+    0x0,
+    0x0,
+    0x0,
+    0xe0000000,
+    0x1efd,
+    0x0,
+    0x0,
+    0x80000000,
+    0x7bf7,
+    0x0,
+    0x0,
+    0x0,
+    0xe0000000,
+    0x1efd,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[40] =
+{
+    0x0,
+    0x0,
+    0x40,
+    0x0,
+    0x0,
+    0x40,
+    0x0,
+    0x0,
+    0x40,
+    0x0,
+    0x2000200,
+    0x4000400,
+    0x8000a00,
+    0x2000000,
+    0x8000800,
+    0x10001000,
+    0x20002800,
+    0x8000000,
+    0x20002000,
+    0xa0004000,
+    0x8000,
+    0x2000,
+    0x20000000,
+    0x40002000,
+    0xa0004000,
+    0x8000,
+    0x10002000,
+    0x20002000,
+    0x40004000,
+    0x8000a000,
+    0x20000000,
+    0x80008000,
+    0x10000,
+    0x28001,
+    0x80000002,
+    0x0,
+    0x20002000,
+    0x40004000,
+    0x8000a000,
+    0x20000000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[28] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x21780,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xe0000000,
+    0x85,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base[28] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x20400,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x81,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[11] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x20,
+    0x200000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x20,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x8000,
+    0x0,
+    0x40000000,
+    0x0,
+    0x0,
+    0x0,
+    0x8000,
+    0x40000,
+    0x80004,
+    0x100008,
+    0x40010,
+    0x100004,
+    0x200010,
+    0x400020,
+    0x100040,
+    0x400010,
+    0x800040,
+    0x1000100,
+    0x400040,
+    0x0,
+    0x400040,
+    0x800080,
+    0x1000100,
+    0x400040,
+    0x400000,
+    0x800040,
+    0x1000080,
+    0x400100,
+    0x1000040,
+    0x2000100,
+    0x4000200,
+    0x1000400,
+    0x800100,
+    0x400020,
+    0x800040,
+    0x1000080,
+    0x400100,
+    0x40,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[11] =
+{
+    0x18,
+    0x0,
+    0x40,
+    0x1efd80,
+    0xffffffe0,
+    0x7ee217ff,
+    0x1f,
+    0x0,
+    0x40,
+    0x1efd80,
+    0x20,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xeff7efc0,
+    0xdfefdff7,
+    0xbfdfbfef,
+    0xeff7efdf,
+    0xbfdfbef7,
+    0x7fbf7fdf,
+    0xff7effbf,
+    0xbfdfbf7e,
+    0xff7effdf,
+    0xfefdff7e,
+    0xfdfbfdfb,
+    0xff7eff7e,
+    0xffffffff,
+    0xff7eff7e,
+    0xfefdfefd,
+    0xfdfbfdfb,
+    0xff7eff7e,
+    0xff7ef885,
+    0xfefdff7e,
+    0xfdfbfefd,
+    0xff7efdfb,
+    0xfdfbff7e,
+    0xfbf7fdfb,
+    0xf7effbf7,
+    0xfdfbf7ef,
+    0x7efdfdfb,
+    0xff7effbf,
+    0xfefdff7e,
+    0xfdfbfefd,
+    0xff7efdfb,
+    0xf7e,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffffe000,
+    0xffff,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffffc000,
+    0xfff,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffff8000,
+    0xff,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffff0000,
+    0xf,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfffe0000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffc0000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf80000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x66600000,
+    0x6666,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x88800000,
+    0x8888,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x20000,
+    0x0,
+    0x0,
+    0x1,
+    0x0,
+    0x0,
+    0x20000,
+    0x100000,
+    0x200010,
+    0x400020,
+    0x100040,
+    0x400010,
+    0x800040,
+    0x1000080,
+    0x400100,
+    0x1000040,
+    0x2000100,
+    0x4000400,
+    0x1000100,
+    0x0,
+    0x1000100,
+    0x2000200,
+    0x4000400,
+    0x1000100,
+    0x1000000,
+    0x2000100,
+    0x4000200,
+    0x1000400,
+    0x4000100,
+    0x8000400,
+    0x10000800,
+    0x4001000,
+    0x2000400,
+    0x1000080,
+    0x2000100,
+    0x4000200,
+    0x1000400,
+    0x100,
+    0x10000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[32] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xff7ef800,
+    0xfefdff7e,
+    0xfdfbfefd,
+    0xff7efdfb,
+    0xf7e,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3dfbc00,
+    0x0,
+    0x0,
+    0x0,
+    0xf7ef000,
+    0x0,
+    0x0,
+    0xc0000000,
+    0x3dfb,
+    0x0,
+    0x0,
+    0x0,
+    0xc0000000,
+    0x3dfb,
+    0x0,
+    0x0,
+    0x0,
+    0x3dfbc000,
+    0x0,
+    0x0,
+    0x0,
+    0xf7ef0000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3dfbc000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x20000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[36] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfdfbe000,
+    0xfbf7fdfb,
+    0xf7effbf7,
+    0xfdfbf7ef,
+    0x3dfb,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[40] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x3df,
+    0x0,
+    0x0,
+    0xf0000000,
+    0xf7e,
+    0x0,
+    0x0,
+    0x3dfbc000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3dfbc000,
+    0x0,
+    0x0,
+    0x0,
+    0xc0000000,
+    0x3dfb,
+    0x0,
+    0x0,
+    0x0,
+    0xf7ef,
+    0x0,
+    0x0,
+    0x0,
+    0xc0000000,
+    0x3dfb,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1[36] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1efdc000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x580,
+    0x0,
+    0x2c00700,
+    0x0,
+    0x0,
+    0x0,
+    0x580,
+    0x2c002c00,
+    0x58005800,
+    0xb000b000,
+    0x2c002c00,
+    0xb000b000,
+    0x60016000,
+    0xc002c001,
+    0xb000b002,
+    0xc002c000,
+    0x58002,
+    0xc00b000b,
+    0x2c002,
+    0xc0000000,
+    0x8002c002,
+    0x58005,
+    0xc00b000b,
+    0xc002c002,
+    0xc002c001,
+    0x80058002,
+    0xb0005,
+    0xc002c00b,
+    0xb0002,
+    0x16000b,
+    0x2c0016,
+    0xb002c,
+    0x6005800b,
+    0xc002c001,
+    0x80058002,
+    0xb0005,
+    0xc002c00b,
+    0x2,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x500,
+    0x0,
+    0x2800600,
+    0x0,
+    0x0,
+    0x0,
+    0x500,
+    0x28002800,
+    0x50005000,
+    0xa000a000,
+    0x28002800,
+    0xa000a000,
+    0x40014000,
+    0x80028001,
+    0xa000a002,
+    0x80028000,
+    0x50002,
+    0x800a000a,
+    0x28002,
+    0x80000000,
+    0x28002,
+    0x50005,
+    0x800a000a,
+    0x80028002,
+    0x80028001,
+    0x50002,
+    0xa0005,
+    0x8002800a,
+    0xa0002,
+    0x14000a,
+    0x280014,
+    0xa0028,
+    0x4005000a,
+    0x80028001,
+    0x50002,
+    0xa0005,
+    0x8002800a,
+    0x2,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0xef800,
+    0x0,
+    0x7c021000,
+    0x7,
+    0x0,
+    0x0,
+    0xef800,
+    0xc077c000,
+    0x80ef8077,
+    0x1df00ef,
+    0xc077c1df,
+    0x1df0077,
+    0x3be01df,
+    0x77c03be,
+    0x1df077c,
+    0x77c01df,
+    0xef8077c,
+    0x1df01df0,
+    0x77c077c,
+    0x0,
+    0x77c077c,
+    0xef80ef8,
+    0x1df01df0,
+    0x77c077c,
+    0x77c0084,
+    0xef8077c,
+    0x1df00ef8,
+    0x77c1df0,
+    0x1df0077c,
+    0x3be01df0,
+    0x77c03be0,
+    0x1df077c0,
+    0xef81df0,
+    0x77c03be,
+    0xef8077c,
+    0x1df00ef8,
+    0x77c1df0,
+    0x77c,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x40000,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x100000,
+    0x0,
+    0x0,
+    0x8,
+    0x0,
+    0x0,
+    0x100000,
+    0x800000,
+    0x1000080,
+    0x2000100,
+    0x800200,
+    0x2000080,
+    0x4000200,
+    0x8000400,
+    0x2000800,
+    0x8000200,
+    0x10000800,
+    0x20002000,
+    0x8000800,
+    0x0,
+    0x8000800,
+    0x10001000,
+    0x20002000,
+    0x8000800,
+    0x8000000,
+    0x10000800,
+    0x20001000,
+    0x8002000,
+    0x20000800,
+    0x40002000,
+    0x80004000,
+    0x20008000,
+    0x10002000,
+    0x8000400,
+    0x10000800,
+    0x20001000,
+    0x8002000,
+    0x800,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x40400,
+    0x0,
+    0x2000000,
+    0x2,
+    0x0,
+    0x0,
+    0x40400,
+    0x20202000,
+    0x40404020,
+    0x80808040,
+    0x20202080,
+    0x80808020,
+    0x1010080,
+    0x2020101,
+    0x80808202,
+    0x2020080,
+    0x4040202,
+    0x8080808,
+    0x2020202,
+    0x0,
+    0x2020202,
+    0x4040404,
+    0x8080808,
+    0x2020202,
+    0x2020000,
+    0x4040202,
+    0x8080404,
+    0x2020808,
+    0x8080202,
+    0x10100808,
+    0x20201010,
+    0x8082020,
+    0x4040808,
+    0x2020101,
+    0x4040202,
+    0x8080404,
+    0x2020808,
+    0x202,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x80000,
+    0x0,
+    0x0,
+    0x4,
+    0x0,
+    0x0,
+    0x80000,
+    0x400000,
+    0x800040,
+    0x1000080,
+    0x400100,
+    0x1000040,
+    0x2000100,
+    0x4000200,
+    0x1000400,
+    0x4000100,
+    0x8000400,
+    0x10001000,
+    0x4000400,
+    0x0,
+    0x4000400,
+    0x8000800,
+    0x10001000,
+    0x4000400,
+    0x4000000,
+    0x8000400,
+    0x10000800,
+    0x4001000,
+    0x10000400,
+    0x20001000,
+    0x40002000,
+    0x10004000,
+    0x8001000,
+    0x4000200,
+    0x8000400,
+    0x10000800,
+    0x4001000,
+    0x400,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x10,
+    0x0,
+    0x40,
+    0x1efd80,
+    0x20,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xff7ef800,
+    0xfefdff7e,
+    0xfdfbfefd,
+    0xff7efdfb,
+    0xf7e,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[41] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xef000000,
+    0xf7,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x3df,
+    0x0,
+    0x0,
+    0xf7ef000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7ef000,
+    0x0,
+    0x0,
+    0x0,
+    0xf0000000,
+    0xf7e,
+    0x0,
+    0x0,
+    0xc0000000,
+    0x3dfb,
+    0x0,
+    0x0,
+    0x0,
+    0xf0000000,
+    0xf7e,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] =
+{
+    0x8,
+};
+
+
+static bcmpkt_rxpmd_match_id_db_t
+bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db[BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_COUNT] = {
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_CNTAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x9,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DCN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DCN",
+        .match        = 0x818,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0x2c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xb,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x30000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xc,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
+        .match        = 0x38,
+        .match_mask   = 0x438,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x80,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x10000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x4,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x30,
+        .match_mask   = 0x438,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x8000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x2c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xb,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE",
+        .match        = 0xc000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
+        .match        = 0x400,
+        .match_mask   = 0x400,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 10,
+        .minbit       = 10,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
+        .match        = 0x402,
+        .match_mask   = 0x402,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
+        .match        = 0x404,
+        .match_mask   = 0x404,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
+        .match        = 0x408,
+        .match_mask   = 0x408,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
+        .match        = 0x410,
+        .match_mask   = 0x410,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
+        .match        = 0x420,
+        .match_mask   = 0x420,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
+        .match        = 0x440,
+        .match_mask   = 0x440,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x480,
+        .match_mask   = 0x480,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
+        .match        = 0x500,
+        .match_mask   = 0x500,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3ffff,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x34000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xd,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
+        .match        = 0x14000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x20000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x8,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1",
+        .match        = 0x18000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x6,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
+        .match        = 0x18,
+        .match_mask   = 0x418,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x1c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3818,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
+        .match        = 0x2018,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x28000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xa,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        .name         = "EGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_CNTAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x9,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN",
+        .match        = 0x818,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0x2c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xb,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x30000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xc,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
+        .match        = 0x38,
+        .match_mask   = 0x438,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x80,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x10000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x4,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x30,
+        .match_mask   = 0x438,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x8000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x2c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xb,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE",
+        .match        = 0xc000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
+        .match        = 0x400,
+        .match_mask   = 0x400,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 10,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
+        .match        = 0x402,
+        .match_mask   = 0x402,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
+        .match        = 0x404,
+        .match_mask   = 0x404,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
+        .match        = 0x408,
+        .match_mask   = 0x408,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
+        .match        = 0x410,
+        .match_mask   = 0x410,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
+        .match        = 0x420,
+        .match_mask   = 0x420,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
+        .match        = 0x440,
+        .match_mask   = 0x440,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x480,
+        .match_mask   = 0x480,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
+        .match        = 0x500,
+        .match_mask   = 0x500,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3ffff,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x34000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xd,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
+        .match        = 0x14000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x20000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x8,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1",
+        .match        = 0x18000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x6,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
+        .match        = 0x18,
+        .match_mask   = 0x418,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x1c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3818,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
+        .match        = 0x2018,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x28000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xa,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_CNTAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x9,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 55,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0x2c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xb,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 55,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 55,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x30000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xc,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 45,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 56,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x8000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 48,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 56,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x2c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xb,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 48,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE",
+        .match        = 0xc000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 48,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3ffff,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x34000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xd,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 51,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
+        .match        = 0x14000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x20000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x8,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 54,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
+        .match        = 0x18,
+        .match_mask   = 0x418,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x1c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3818,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x28000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xa,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_CNTAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 2,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 2,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 3,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 3,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 3,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 3,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 3,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 3,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x9,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 15,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DCN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DCN",
+        .match        = 0x818,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dcn,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0x2c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xb,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 19,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x30000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xc,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 22,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
+        .match        = 0x38,
+        .match_mask   = 0x438,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 23,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x80,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 23,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 23,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x10000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x4,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 23,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x30,
+        .match_mask   = 0x438,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 23,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x8000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 27,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 40,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x2c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xb,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 28,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE",
+        .match        = 0xc000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 28,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 11,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 11,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
+        .match        = 0x400,
+        .match_mask   = 0x400,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 10,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
+        .match        = 0x402,
+        .match_mask   = 0x402,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
+        .match        = 0x404,
+        .match_mask   = 0x404,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
+        .match        = 0x408,
+        .match_mask   = 0x408,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
+        .match        = 0x410,
+        .match_mask   = 0x410,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
+        .match        = 0x420,
+        .match_mask   = 0x420,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
+        .match        = 0x440,
+        .match_mask   = 0x440,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x480,
+        .match_mask   = 0x480,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
+        .match        = 0x500,
+        .match_mask   = 0x500,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3ffff,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x34000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xd,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 32,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
+        .match        = 0x14000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x20000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x8,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 40,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1",
+        .match        = 0x18000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x6,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
+        .match        = 0x18,
+        .match_mask   = 0x418,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x1c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3818,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
+        .match        = 0x2018,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x28000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xa,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 41,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm78800_a0_dna_6_5_30_3_1_rxpmd_arc_ingress_pkt_sys_hdr_loopback,
+
+    },
+    {
+        /* BCM78800_A0_DNA_6_5_30_3_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        .name         = "INGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+
+    },
+};
+
+static bcmpkt_rxpmd_match_id_db_info_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db_info = {
+    .num_entries = 228,
+    .db = bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db
+};
+bcmpkt_rxpmd_match_id_db_info_t * bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db_info_get(void) {
+    return &bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_db_info;
+}
+
+static shr_enum_map_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_map[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_rxpmd_match_id_map_info_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_map_info = {
+    .num_entries = 228,
+    .map = bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_map
+};
+
+bcmpkt_rxpmd_match_id_map_info_t * bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_map_info_get(void) {
+    return &bcm78800_a0_dna_6_5_30_3_1_rxpmd_match_id_map_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_pkt_flexhdr.c
new file mode 100644
index 000000000000..d77e56124704
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_pkt_flexhdr.c
@@ -0,0 +1,11476 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml
+ * for device bcm78800_a0 and variant dna_6_5_30_3_1.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * Copyright 2018-2024 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/chip/bcm78800_a0/bcmpkt_bcm78800_a0_rxpmd.h>
+#include <bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm78800_a0/dna_6_5_30_3_1/bcm78800_a0_dna_6_5_30_3_1_bcmpkt_rxpmd_flex_data.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+static void bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+{
+    uint32_t *reason = data + 0;
+
+    if (reason[13] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+    }
+    if (reason[13] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+    }
+    if (reason[13] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+    }
+    if (reason[13] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE);
+    }
+    if (reason[13] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
+    }
+    if (reason[13] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+    }
+    if (reason[13] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+    }
+    if (reason[13] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+    }
+    if (reason[13] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 16)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+    }
+    if (reason[13] & (0x1 << 17)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_VFP);
+    }
+    if (reason[13] & (0x1 << 18)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP);
+    }
+    if (reason[13] & (0x1 << 19)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+    }
+    if (reason[13] & (0x1 << 20)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
+    }
+    if (reason[13] & (0x1 << 21)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SVP);
+    }
+    if (reason[13] & (0x1 << 22)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+    }
+    if (reason[13] & (0x1 << 23)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+    }
+    if (reason[13] & (0x1 << 24)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
+    }
+    if (reason[13] & (0x1 << 25)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
+    }
+    if (reason[13] & (0x1 << 26)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
+    }
+    if (reason[13] & (0x1 << 27)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 28)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
+    }
+    if (reason[13] & (0x1 << 29)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[13] & (0x1 << 30)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[13] & (0x1 << 31)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
+    }
+    if (reason[12] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
+    }
+    if (reason[12] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
+    }
+    if (reason[12] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
+    }
+    if (reason[12] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
+    }
+    if (reason[12] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
+    }
+    if (reason[12] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
+    }
+    if (reason[12] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
+    }
+    if (reason[12] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SRV6);
+    }
+    if (reason[12] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR);
+    }
+    if (reason[12] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP_EPIPE);
+    }
+    if (reason[12] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+    }
+}
+
+static void bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+{
+    uint32_t *reason = data + 0;
+
+    reason[13] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+        reason[13] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+        reason[13] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+        reason[13] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) {
+        reason[13] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
+        reason[13] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+        reason[13] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+        reason[13] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+        reason[13] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 15);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+        reason[13] |= (0x1 << 16);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+        reason[13] |= (0x1 << 17);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+        reason[13] |= (0x1 << 18);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+        reason[13] |= (0x1 << 19);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
+        reason[13] |= (0x1 << 20);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
+        reason[13] |= (0x1 << 21);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+        reason[13] |= (0x1 << 22);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+        reason[13] |= (0x1 << 23);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
+        reason[13] |= (0x1 << 24);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
+        reason[13] |= (0x1 << 25);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
+        reason[13] |= (0x1 << 26);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 27);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
+        reason[13] |= (0x1 << 28);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[13] |= (0x1 << 29);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[13] |= (0x1 << 30);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
+        reason[13] |= (0x1 << 31);
+    }
+    reason[12] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
+        reason[12] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
+        reason[12] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
+        reason[12] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
+        reason[12] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
+        reason[12] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
+        reason[12] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
+        reason[12] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
+        reason[12] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU)) {
+        reason[12] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) {
+        reason[12] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) {
+        reason[12] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SRV6)) {
+        reason[12] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) {
+        reason[12] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) {
+        reason[12] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP_EPIPE)) {
+        reason[12] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+        reason[12] |= (0x1 << 15);
+    }
+}
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_field_data[] = {
+    {
+        .name = "ALLOW_NAT_3_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ALLOW_NAT_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 416, 419 }, /* Profile 2. */
+            { 408, 411 }, /* Profile 3. */
+            { 416, 419 }, /* Profile 4. */
+            { 416, 419 }, /* Profile 5. */
+            { 416, 419 }, /* Profile 6. */
+            { 416, 419 }, /* Profile 7. */
+            { 408, 411 }, /* Profile 8. */
+            { 416, 419 }, /* Profile 9. */
+            { 416, 419 }, /* Profile 10. */
+            { 416, 419 }, /* Profile 11. */
+            { 412, 415 }, /* Profile 12. */
+            { 404, 407 }, /* Profile 13. */
+            { 412, 415 }, /* Profile 14. */
+            { 412, 415 }, /* Profile 15. */
+            { 416, 419 }, /* Profile 16. */
+            { 408, 411 }, /* Profile 17. */
+            { 416, 419 }, /* Profile 18. */
+            { 416, 419 }, /* Profile 19. */
+            { 416, 419 }, /* Profile 20. */
+            { 416, 419 }, /* Profile 21. */
+            { 408, 411 }, /* Profile 22. */
+            { 416, 419 }, /* Profile 23. */
+            { 416, 419 }, /* Profile 24. */
+            { 416, 419 }, /* Profile 25. */
+            { 412, 415 }, /* Profile 26. */
+            { 404, 407 }, /* Profile 27. */
+            { 412, 415 }, /* Profile 28. */
+            { 412, 415 }, /* Profile 29. */
+            { 416, 419 }, /* Profile 30. */
+            { 408, 411 }, /* Profile 31. */
+            { 416, 419 }, /* Profile 32. */
+            { 416, 419 }, /* Profile 33. */
+            { 416, 419 }, /* Profile 34. */
+            { 416, 419 }, /* Profile 35. */
+            { 408, 411 }, /* Profile 36. */
+            { 416, 419 }, /* Profile 37. */
+            { 416, 419 }, /* Profile 38. */
+            { 416, 419 }, /* Profile 39. */
+            { 412, 415 }, /* Profile 40. */
+            { 404, 407 }, /* Profile 41. */
+            { 412, 415 }, /* Profile 42. */
+            { 412, 415 }, /* Profile 43. */
+            { 416, 419 }, /* Profile 44. */
+            { 408, 411 }, /* Profile 45. */
+            { 416, 419 }, /* Profile 46. */
+            { 416, 419 }, /* Profile 47. */
+            { 416, 419 }, /* Profile 48. */
+            { 416, 419 }, /* Profile 49. */
+            { 408, 411 }, /* Profile 50. */
+            { 416, 419 }, /* Profile 51. */
+            { 416, 419 }, /* Profile 52. */
+            { 416, 419 }, /* Profile 53. */
+            { 412, 415 }, /* Profile 54. */
+            { 404, 407 }, /* Profile 55. */
+            { 412, 415 }, /* Profile 56. */
+            { 412, 415 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "DLB_ECMP_DESTINATION_15_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { 208, 223 }, /* Profile 16. */
+            { 192, 207 }, /* Profile 17. */
+            { 208, 223 }, /* Profile 18. */
+            { 192, 207 }, /* Profile 19. */
+            { 192, 207 }, /* Profile 20. */
+            { 208, 223 }, /* Profile 21. */
+            { 192, 207 }, /* Profile 22. */
+            { 208, 223 }, /* Profile 23. */
+            { 192, 207 }, /* Profile 24. */
+            { 192, 207 }, /* Profile 25. */
+            { 208, 223 }, /* Profile 26. */
+            { 192, 207 }, /* Profile 27. */
+            { 208, 223 }, /* Profile 28. */
+            { 192, 207 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { -1, -1 }, /* Profile 33. */
+            { -1, -1 }, /* Profile 34. */
+            { -1, -1 }, /* Profile 35. */
+            { -1, -1 }, /* Profile 36. */
+            { -1, -1 }, /* Profile 37. */
+            { -1, -1 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { -1, -1 }, /* Profile 40. */
+            { -1, -1 }, /* Profile 41. */
+            { -1, -1 }, /* Profile 42. */
+            { -1, -1 }, /* Profile 43. */
+            { 224, 239 }, /* Profile 44. */
+            { 208, 223 }, /* Profile 45. */
+            { 224, 239 }, /* Profile 46. */
+            { 208, 223 }, /* Profile 47. */
+            { 208, 223 }, /* Profile 48. */
+            { 224, 239 }, /* Profile 49. */
+            { 208, 223 }, /* Profile 50. */
+            { 224, 239 }, /* Profile 51. */
+            { 208, 223 }, /* Profile 52. */
+            { 208, 223 }, /* Profile 53. */
+            { 224, 239 }, /* Profile 54. */
+            { 208, 223 }, /* Profile 55. */
+            { 224, 239 }, /* Profile 56. */
+            { 208, 223 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "DNAT_CTRL_3_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 372, 375 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { 372, 375 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { 368, 371 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { 372, 375 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { 372, 375 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { 368, 371 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { 372, 375 }, /* Profile 32. */
+            { -1, -1 }, /* Profile 33. */
+            { -1, -1 }, /* Profile 34. */
+            { -1, -1 }, /* Profile 35. */
+            { -1, -1 }, /* Profile 36. */
+            { 372, 375 }, /* Profile 37. */
+            { -1, -1 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { -1, -1 }, /* Profile 40. */
+            { -1, -1 }, /* Profile 41. */
+            { 368, 371 }, /* Profile 42. */
+            { -1, -1 }, /* Profile 43. */
+            { -1, -1 }, /* Profile 44. */
+            { -1, -1 }, /* Profile 45. */
+            { 372, 375 }, /* Profile 46. */
+            { -1, -1 }, /* Profile 47. */
+            { -1, -1 }, /* Profile 48. */
+            { -1, -1 }, /* Profile 49. */
+            { -1, -1 }, /* Profile 50. */
+            { 372, 375 }, /* Profile 51. */
+            { -1, -1 }, /* Profile 52. */
+            { -1, -1 }, /* Profile 53. */
+            { -1, -1 }, /* Profile 54. */
+            { -1, -1 }, /* Profile 55. */
+            { 368, 371 }, /* Profile 56. */
+        },
+        .profile_cnt = 57,
+    },
+    {
+        .name = "DROP_CODE_15_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 48, 63 }, /* Profile 2. */
+            { 48, 63 }, /* Profile 3. */
+            { 48, 63 }, /* Profile 4. */
+            { 48, 63 }, /* Profile 5. */
+            { 48, 63 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { 48, 63 }, /* Profile 12. */
+            { 48, 63 }, /* Profile 13. */
+            { 48, 63 }, /* Profile 14. */
+            { 48, 63 }, /* Profile 15. */
+            { 48, 63 }, /* Profile 16. */
+            { 48, 63 }, /* Profile 17. */
+            { 48, 63 }, /* Profile 18. */
+            { 48, 63 }, /* Profile 19. */
+            { 48, 63 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { 48, 63 }, /* Profile 26. */
+            { 48, 63 }, /* Profile 27. */
+            { 48, 63 }, /* Profile 28. */
+            { 48, 63 }, /* Profile 29. */
+            { 48, 63 }, /* Profile 30. */
+            { 48, 63 }, /* Profile 31. */
+            { 48, 63 }, /* Profile 32. */
+            { 48, 63 }, /* Profile 33. */
+            { 48, 63 }, /* Profile 34. */
+            { -1, -1 }, /* Profile 35. */
+            { -1, -1 }, /* Profile 36. */
+            { -1, -1 }, /* Profile 37. */
+            { -1, -1 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { 48, 63 }, /* Profile 40. */
+            { 48, 63 }, /* Profile 41. */
+            { 48, 63 }, /* Profile 42. */
+            { 48, 63 }, /* Profile 43. */
+            { 48, 63 }, /* Profile 44. */
+            { 48, 63 }, /* Profile 45. */
+            { 48, 63 }, /* Profile 46. */
+            { 48, 63 }, /* Profile 47. */
+            { 48, 63 }, /* Profile 48. */
+            { -1, -1 }, /* Profile 49. */
+            { -1, -1 }, /* Profile 50. */
+            { -1, -1 }, /* Profile 51. */
+            { -1, -1 }, /* Profile 52. */
+            { -1, -1 }, /* Profile 53. */
+            { 48, 63 }, /* Profile 54. */
+            { 48, 63 }, /* Profile 55. */
+            { 48, 63 }, /* Profile 56. */
+            { 48, 63 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "DVP_15_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 176, 191 }, /* Profile 2. */
+            { 176, 191 }, /* Profile 3. */
+            { 176, 191 }, /* Profile 4. */
+            { 176, 191 }, /* Profile 5. */
+            { 176, 191 }, /* Profile 6. */
+            { 176, 191 }, /* Profile 7. */
+            { 176, 191 }, /* Profile 8. */
+            { 176, 191 }, /* Profile 9. */
+            { 176, 191 }, /* Profile 10. */
+            { 176, 191 }, /* Profile 11. */
+            { 176, 191 }, /* Profile 12. */
+            { 176, 191 }, /* Profile 13. */
+            { 176, 191 }, /* Profile 14. */
+            { 176, 191 }, /* Profile 15. */
+            { 176, 191 }, /* Profile 16. */
+            { 176, 191 }, /* Profile 17. */
+            { 176, 191 }, /* Profile 18. */
+            { 176, 191 }, /* Profile 19. */
+            { 176, 191 }, /* Profile 20. */
+            { 176, 191 }, /* Profile 21. */
+            { 176, 191 }, /* Profile 22. */
+            { 176, 191 }, /* Profile 23. */
+            { 176, 191 }, /* Profile 24. */
+            { 176, 191 }, /* Profile 25. */
+            { 176, 191 }, /* Profile 26. */
+            { 176, 191 }, /* Profile 27. */
+            { 176, 191 }, /* Profile 28. */
+            { 176, 191 }, /* Profile 29. */
+            { 192, 207 }, /* Profile 30. */
+            { 192, 207 }, /* Profile 31. */
+            { 192, 207 }, /* Profile 32. */
+            { 192, 207 }, /* Profile 33. */
+            { 192, 207 }, /* Profile 34. */
+            { 192, 207 }, /* Profile 35. */
+            { 192, 207 }, /* Profile 36. */
+            { 192, 207 }, /* Profile 37. */
+            { 192, 207 }, /* Profile 38. */
+            { 192, 207 }, /* Profile 39. */
+            { 192, 207 }, /* Profile 40. */
+            { 192, 207 }, /* Profile 41. */
+            { 192, 207 }, /* Profile 42. */
+            { 192, 207 }, /* Profile 43. */
+            { 192, 207 }, /* Profile 44. */
+            { 192, 207 }, /* Profile 45. */
+            { 192, 207 }, /* Profile 46. */
+            { 192, 207 }, /* Profile 47. */
+            { 192, 207 }, /* Profile 48. */
+            { 192, 207 }, /* Profile 49. */
+            { 192, 207 }, /* Profile 50. */
+            { 192, 207 }, /* Profile 51. */
+            { 192, 207 }, /* Profile 52. */
+            { 192, 207 }, /* Profile 53. */
+            { 192, 207 }, /* Profile 54. */
+            { 192, 207 }, /* Profile 55. */
+            { 192, 207 }, /* Profile 56. */
+            { 192, 207 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "EFFECTIVE_TTL_AND_SNAT_CTRL_15_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 144, 159 }, /* Profile 2. */
+            { 144, 159 }, /* Profile 3. */
+            { 144, 159 }, /* Profile 4. */
+            { 144, 159 }, /* Profile 5. */
+            { 144, 159 }, /* Profile 6. */
+            { 144, 159 }, /* Profile 7. */
+            { 144, 159 }, /* Profile 8. */
+            { 144, 159 }, /* Profile 9. */
+            { 144, 159 }, /* Profile 10. */
+            { 144, 159 }, /* Profile 11. */
+            { 144, 159 }, /* Profile 12. */
+            { 144, 159 }, /* Profile 13. */
+            { 144, 159 }, /* Profile 14. */
+            { 144, 159 }, /* Profile 15. */
+            { 144, 159 }, /* Profile 16. */
+            { 144, 159 }, /* Profile 17. */
+            { 144, 159 }, /* Profile 18. */
+            { 144, 159 }, /* Profile 19. */
+            { 144, 159 }, /* Profile 20. */
+            { 144, 159 }, /* Profile 21. */
+            { 144, 159 }, /* Profile 22. */
+            { 144, 159 }, /* Profile 23. */
+            { 144, 159 }, /* Profile 24. */
+            { 144, 159 }, /* Profile 25. */
+            { 144, 159 }, /* Profile 26. */
+            { 144, 159 }, /* Profile 27. */
+            { 144, 159 }, /* Profile 28. */
+            { 144, 159 }, /* Profile 29. */
+            { 144, 159 }, /* Profile 30. */
+            { 144, 159 }, /* Profile 31. */
+            { 144, 159 }, /* Profile 32. */
+            { 144, 159 }, /* Profile 33. */
+            { 144, 159 }, /* Profile 34. */
+            { 144, 159 }, /* Profile 35. */
+            { 144, 159 }, /* Profile 36. */
+            { 144, 159 }, /* Profile 37. */
+            { 144, 159 }, /* Profile 38. */
+            { 144, 159 }, /* Profile 39. */
+            { 144, 159 }, /* Profile 40. */
+            { 144, 159 }, /* Profile 41. */
+            { 144, 159 }, /* Profile 42. */
+            { 144, 159 }, /* Profile 43. */
+            { 144, 159 }, /* Profile 44. */
+            { 144, 159 }, /* Profile 45. */
+            { 144, 159 }, /* Profile 46. */
+            { 144, 159 }, /* Profile 47. */
+            { 144, 159 }, /* Profile 48. */
+            { 144, 159 }, /* Profile 49. */
+            { 144, 159 }, /* Profile 50. */
+            { 144, 159 }, /* Profile 51. */
+            { 144, 159 }, /* Profile 52. */
+            { 144, 159 }, /* Profile 53. */
+            { 144, 159 }, /* Profile 54. */
+            { 144, 159 }, /* Profile 55. */
+            { 144, 159 }, /* Profile 56. */
+            { 144, 159 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 208, 223 }, /* Profile 2. */
+            { 192, 207 }, /* Profile 3. */
+            { 208, 223 }, /* Profile 4. */
+            { 192, 207 }, /* Profile 5. */
+            { 192, 207 }, /* Profile 6. */
+            { 208, 223 }, /* Profile 7. */
+            { 192, 207 }, /* Profile 8. */
+            { 208, 223 }, /* Profile 9. */
+            { 192, 207 }, /* Profile 10. */
+            { 192, 207 }, /* Profile 11. */
+            { 208, 223 }, /* Profile 12. */
+            { 192, 207 }, /* Profile 13. */
+            { 208, 223 }, /* Profile 14. */
+            { 192, 207 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { 224, 239 }, /* Profile 30. */
+            { 208, 223 }, /* Profile 31. */
+            { 224, 239 }, /* Profile 32. */
+            { 208, 223 }, /* Profile 33. */
+            { 208, 223 }, /* Profile 34. */
+            { 224, 239 }, /* Profile 35. */
+            { 208, 223 }, /* Profile 36. */
+            { 224, 239 }, /* Profile 37. */
+            { 208, 223 }, /* Profile 38. */
+            { 208, 223 }, /* Profile 39. */
+            { 224, 239 }, /* Profile 40. */
+            { 208, 223 }, /* Profile 41. */
+            { 224, 239 }, /* Profile 42. */
+            { 208, 223 }, /* Profile 43. */
+        },
+        .profile_cnt = 44,
+    },
+    {
+        .name = "ENTROPY_LABEL_HIGH_3_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 388, 391 }, /* Profile 2. */
+            { 380, 383 }, /* Profile 3. */
+            { 392, 395 }, /* Profile 4. */
+            { 388, 391 }, /* Profile 5. */
+            { 388, 391 }, /* Profile 6. */
+            { 388, 391 }, /* Profile 7. */
+            { 380, 383 }, /* Profile 8. */
+            { 392, 395 }, /* Profile 9. */
+            { 388, 391 }, /* Profile 10. */
+            { 388, 391 }, /* Profile 11. */
+            { 384, 387 }, /* Profile 12. */
+            { 376, 379 }, /* Profile 13. */
+            { 388, 391 }, /* Profile 14. */
+            { 384, 387 }, /* Profile 15. */
+            { 388, 391 }, /* Profile 16. */
+            { 380, 383 }, /* Profile 17. */
+            { 392, 395 }, /* Profile 18. */
+            { 388, 391 }, /* Profile 19. */
+            { 388, 391 }, /* Profile 20. */
+            { 388, 391 }, /* Profile 21. */
+            { 380, 383 }, /* Profile 22. */
+            { 392, 395 }, /* Profile 23. */
+            { 388, 391 }, /* Profile 24. */
+            { 388, 391 }, /* Profile 25. */
+            { 384, 387 }, /* Profile 26. */
+            { 376, 379 }, /* Profile 27. */
+            { 388, 391 }, /* Profile 28. */
+            { 384, 387 }, /* Profile 29. */
+            { 388, 391 }, /* Profile 30. */
+            { 380, 383 }, /* Profile 31. */
+            { 392, 395 }, /* Profile 32. */
+            { 388, 391 }, /* Profile 33. */
+            { 388, 391 }, /* Profile 34. */
+            { 388, 391 }, /* Profile 35. */
+            { 380, 383 }, /* Profile 36. */
+            { 392, 395 }, /* Profile 37. */
+            { 388, 391 }, /* Profile 38. */
+            { 388, 391 }, /* Profile 39. */
+            { 384, 387 }, /* Profile 40. */
+            { 376, 379 }, /* Profile 41. */
+            { 388, 391 }, /* Profile 42. */
+            { 384, 387 }, /* Profile 43. */
+            { 388, 391 }, /* Profile 44. */
+            { 380, 383 }, /* Profile 45. */
+            { 392, 395 }, /* Profile 46. */
+            { 388, 391 }, /* Profile 47. */
+            { 388, 391 }, /* Profile 48. */
+            { 388, 391 }, /* Profile 49. */
+            { 380, 383 }, /* Profile 50. */
+            { 392, 395 }, /* Profile 51. */
+            { 388, 391 }, /* Profile 52. */
+            { 388, 391 }, /* Profile 53. */
+            { 384, 387 }, /* Profile 54. */
+            { 376, 379 }, /* Profile 55. */
+            { 388, 391 }, /* Profile 56. */
+            { 384, 387 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "ENTROPY_LABEL_LOW_15_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 128, 143 }, /* Profile 2. */
+            { 128, 143 }, /* Profile 3. */
+            { 128, 143 }, /* Profile 4. */
+            { 128, 143 }, /* Profile 5. */
+            { 128, 143 }, /* Profile 6. */
+            { 128, 143 }, /* Profile 7. */
+            { 128, 143 }, /* Profile 8. */
+            { 128, 143 }, /* Profile 9. */
+            { 128, 143 }, /* Profile 10. */
+            { 128, 143 }, /* Profile 11. */
+            { 128, 143 }, /* Profile 12. */
+            { 128, 143 }, /* Profile 13. */
+            { 128, 143 }, /* Profile 14. */
+            { 128, 143 }, /* Profile 15. */
+            { 128, 143 }, /* Profile 16. */
+            { 128, 143 }, /* Profile 17. */
+            { 128, 143 }, /* Profile 18. */
+            { 128, 143 }, /* Profile 19. */
+            { 128, 143 }, /* Profile 20. */
+            { 128, 143 }, /* Profile 21. */
+            { 128, 143 }, /* Profile 22. */
+            { 128, 143 }, /* Profile 23. */
+            { 128, 143 }, /* Profile 24. */
+            { 128, 143 }, /* Profile 25. */
+            { 128, 143 }, /* Profile 26. */
+            { 128, 143 }, /* Profile 27. */
+            { 128, 143 }, /* Profile 28. */
+            { 128, 143 }, /* Profile 29. */
+            { 128, 143 }, /* Profile 30. */
+            { 128, 143 }, /* Profile 31. */
+            { 128, 143 }, /* Profile 32. */
+            { 128, 143 }, /* Profile 33. */
+            { 128, 143 }, /* Profile 34. */
+            { 128, 143 }, /* Profile 35. */
+            { 128, 143 }, /* Profile 36. */
+            { 128, 143 }, /* Profile 37. */
+            { 128, 143 }, /* Profile 38. */
+            { 128, 143 }, /* Profile 39. */
+            { 128, 143 }, /* Profile 40. */
+            { 128, 143 }, /* Profile 41. */
+            { 128, 143 }, /* Profile 42. */
+            { 128, 143 }, /* Profile 43. */
+            { 128, 143 }, /* Profile 44. */
+            { 128, 143 }, /* Profile 45. */
+            { 128, 143 }, /* Profile 46. */
+            { 128, 143 }, /* Profile 47. */
+            { 128, 143 }, /* Profile 48. */
+            { 128, 143 }, /* Profile 49. */
+            { 128, 143 }, /* Profile 50. */
+            { 128, 143 }, /* Profile 51. */
+            { 128, 143 }, /* Profile 52. */
+            { 128, 143 }, /* Profile 53. */
+            { 128, 143 }, /* Profile 54. */
+            { 128, 143 }, /* Profile 55. */
+            { 128, 143 }, /* Profile 56. */
+            { 128, 143 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { 48, 63 }, /* Profile 7. */
+            { 48, 63 }, /* Profile 8. */
+            { 48, 63 }, /* Profile 9. */
+            { 48, 63 }, /* Profile 10. */
+            { 48, 63 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { 48, 63 }, /* Profile 21. */
+            { 48, 63 }, /* Profile 22. */
+            { 48, 63 }, /* Profile 23. */
+            { 48, 63 }, /* Profile 24. */
+            { 48, 63 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { -1, -1 }, /* Profile 33. */
+            { -1, -1 }, /* Profile 34. */
+            { 48, 63 }, /* Profile 35. */
+            { 48, 63 }, /* Profile 36. */
+            { 48, 63 }, /* Profile 37. */
+            { 48, 63 }, /* Profile 38. */
+            { 48, 63 }, /* Profile 39. */
+            { -1, -1 }, /* Profile 40. */
+            { -1, -1 }, /* Profile 41. */
+            { -1, -1 }, /* Profile 42. */
+            { -1, -1 }, /* Profile 43. */
+            { -1, -1 }, /* Profile 44. */
+            { -1, -1 }, /* Profile 45. */
+            { -1, -1 }, /* Profile 46. */
+            { -1, -1 }, /* Profile 47. */
+            { -1, -1 }, /* Profile 48. */
+            { 48, 63 }, /* Profile 49. */
+            { 48, 63 }, /* Profile 50. */
+            { 48, 63 }, /* Profile 51. */
+            { 48, 63 }, /* Profile 52. */
+            { 48, 63 }, /* Profile 53. */
+        },
+        .profile_cnt = 54,
+    },
+    {
+        .name = "EP_NIH_HDR_RECIRC_CODE_3_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 368, 371 }, /* Profile 2. */
+            { 352, 355 }, /* Profile 3. */
+            { 368, 371 }, /* Profile 4. */
+            { 368, 371 }, /* Profile 5. */
+            { 368, 371 }, /* Profile 6. */
+            { 368, 371 }, /* Profile 7. */
+            { 352, 355 }, /* Profile 8. */
+            { 368, 371 }, /* Profile 9. */
+            { 368, 371 }, /* Profile 10. */
+            { 368, 371 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { 368, 371 }, /* Profile 16. */
+            { 352, 355 }, /* Profile 17. */
+            { 368, 371 }, /* Profile 18. */
+            { 368, 371 }, /* Profile 19. */
+            { 368, 371 }, /* Profile 20. */
+            { 368, 371 }, /* Profile 21. */
+            { 352, 355 }, /* Profile 22. */
+            { 368, 371 }, /* Profile 23. */
+            { 368, 371 }, /* Profile 24. */
+            { 368, 371 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { 368, 371 }, /* Profile 30. */
+            { 352, 355 }, /* Profile 31. */
+            { 368, 371 }, /* Profile 32. */
+            { 368, 371 }, /* Profile 33. */
+            { 368, 371 }, /* Profile 34. */
+            { 368, 371 }, /* Profile 35. */
+            { 352, 355 }, /* Profile 36. */
+            { 368, 371 }, /* Profile 37. */
+            { 368, 371 }, /* Profile 38. */
+            { 368, 371 }, /* Profile 39. */
+            { -1, -1 }, /* Profile 40. */
+            { -1, -1 }, /* Profile 41. */
+            { -1, -1 }, /* Profile 42. */
+            { -1, -1 }, /* Profile 43. */
+            { 368, 371 }, /* Profile 44. */
+            { 352, 355 }, /* Profile 45. */
+            { 368, 371 }, /* Profile 46. */
+            { 368, 371 }, /* Profile 47. */
+            { 368, 371 }, /* Profile 48. */
+            { 368, 371 }, /* Profile 49. */
+            { 352, 355 }, /* Profile 50. */
+            { 368, 371 }, /* Profile 51. */
+            { 368, 371 }, /* Profile 52. */
+            { 368, 371 }, /* Profile 53. */
+        },
+        .profile_cnt = 54,
+    },
+    {
+        .name = "EP_NIH_HDR_TIMESTAMP_15_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { 288, 303 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { 288, 303 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { 288, 303 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { 288, 303 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { 304, 319 }, /* Profile 33. */
+            { -1, -1 }, /* Profile 34. */
+            { -1, -1 }, /* Profile 35. */
+            { -1, -1 }, /* Profile 36. */
+            { -1, -1 }, /* Profile 37. */
+            { 304, 319 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { -1, -1 }, /* Profile 40. */
+            { -1, -1 }, /* Profile 41. */
+            { -1, -1 }, /* Profile 42. */
+            { -1, -1 }, /* Profile 43. */
+            { -1, -1 }, /* Profile 44. */
+            { -1, -1 }, /* Profile 45. */
+            { -1, -1 }, /* Profile 46. */
+            { 304, 319 }, /* Profile 47. */
+            { -1, -1 }, /* Profile 48. */
+            { -1, -1 }, /* Profile 49. */
+            { -1, -1 }, /* Profile 50. */
+            { -1, -1 }, /* Profile 51. */
+            { 304, 319 }, /* Profile 52. */
+        },
+        .profile_cnt = 53,
+    },
+    {
+        .name = "EP_NIH_HDR_TIMESTAMP_31_16",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { 304, 319 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { 304, 319 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { 304, 319 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { 304, 319 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { 320, 335 }, /* Profile 33. */
+            { -1, -1 }, /* Profile 34. */
+            { -1, -1 }, /* Profile 35. */
+            { -1, -1 }, /* Profile 36. */
+            { -1, -1 }, /* Profile 37. */
+            { 320, 335 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { -1, -1 }, /* Profile 40. */
+            { -1, -1 }, /* Profile 41. */
+            { -1, -1 }, /* Profile 42. */
+            { -1, -1 }, /* Profile 43. */
+            { -1, -1 }, /* Profile 44. */
+            { -1, -1 }, /* Profile 45. */
+            { -1, -1 }, /* Profile 46. */
+            { 320, 335 }, /* Profile 47. */
+            { -1, -1 }, /* Profile 48. */
+            { -1, -1 }, /* Profile 49. */
+            { -1, -1 }, /* Profile 50. */
+            { -1, -1 }, /* Profile 51. */
+            { 320, 335 }, /* Profile 52. */
+        },
+        .profile_cnt = 53,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_15_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 0, 15 }, /* Profile 2. */
+            { 0, 15 }, /* Profile 3. */
+            { 0, 15 }, /* Profile 4. */
+            { 0, 15 }, /* Profile 5. */
+            { 0, 15 }, /* Profile 6. */
+            { 0, 15 }, /* Profile 7. */
+            { 0, 15 }, /* Profile 8. */
+            { 0, 15 }, /* Profile 9. */
+            { 0, 15 }, /* Profile 10. */
+            { 0, 15 }, /* Profile 11. */
+            { 0, 15 }, /* Profile 12. */
+            { 0, 15 }, /* Profile 13. */
+            { 0, 15 }, /* Profile 14. */
+            { 0, 15 }, /* Profile 15. */
+            { 0, 15 }, /* Profile 16. */
+            { 0, 15 }, /* Profile 17. */
+            { 0, 15 }, /* Profile 18. */
+            { 0, 15 }, /* Profile 19. */
+            { 0, 15 }, /* Profile 20. */
+            { 0, 15 }, /* Profile 21. */
+            { 0, 15 }, /* Profile 22. */
+            { 0, 15 }, /* Profile 23. */
+            { 0, 15 }, /* Profile 24. */
+            { 0, 15 }, /* Profile 25. */
+            { 0, 15 }, /* Profile 26. */
+            { 0, 15 }, /* Profile 27. */
+            { 0, 15 }, /* Profile 28. */
+            { 0, 15 }, /* Profile 29. */
+            { 0, 15 }, /* Profile 30. */
+            { 0, 15 }, /* Profile 31. */
+            { 0, 15 }, /* Profile 32. */
+            { 0, 15 }, /* Profile 33. */
+            { 0, 15 }, /* Profile 34. */
+            { 0, 15 }, /* Profile 35. */
+            { 0, 15 }, /* Profile 36. */
+            { 0, 15 }, /* Profile 37. */
+            { 0, 15 }, /* Profile 38. */
+            { 0, 15 }, /* Profile 39. */
+            { 0, 15 }, /* Profile 40. */
+            { 0, 15 }, /* Profile 41. */
+            { 0, 15 }, /* Profile 42. */
+            { 0, 15 }, /* Profile 43. */
+            { 0, 15 }, /* Profile 44. */
+            { 0, 15 }, /* Profile 45. */
+            { 0, 15 }, /* Profile 46. */
+            { 0, 15 }, /* Profile 47. */
+            { 0, 15 }, /* Profile 48. */
+            { 0, 15 }, /* Profile 49. */
+            { 0, 15 }, /* Profile 50. */
+            { 0, 15 }, /* Profile 51. */
+            { 0, 15 }, /* Profile 52. */
+            { 0, 15 }, /* Profile 53. */
+            { 0, 15 }, /* Profile 54. */
+            { 0, 15 }, /* Profile 55. */
+            { 0, 15 }, /* Profile 56. */
+            { 0, 15 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_31_16",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 16, 31 }, /* Profile 2. */
+            { 16, 31 }, /* Profile 3. */
+            { 16, 31 }, /* Profile 4. */
+            { 16, 31 }, /* Profile 5. */
+            { 16, 31 }, /* Profile 6. */
+            { 16, 31 }, /* Profile 7. */
+            { 16, 31 }, /* Profile 8. */
+            { 16, 31 }, /* Profile 9. */
+            { 16, 31 }, /* Profile 10. */
+            { 16, 31 }, /* Profile 11. */
+            { 16, 31 }, /* Profile 12. */
+            { 16, 31 }, /* Profile 13. */
+            { 16, 31 }, /* Profile 14. */
+            { 16, 31 }, /* Profile 15. */
+            { 16, 31 }, /* Profile 16. */
+            { 16, 31 }, /* Profile 17. */
+            { 16, 31 }, /* Profile 18. */
+            { 16, 31 }, /* Profile 19. */
+            { 16, 31 }, /* Profile 20. */
+            { 16, 31 }, /* Profile 21. */
+            { 16, 31 }, /* Profile 22. */
+            { 16, 31 }, /* Profile 23. */
+            { 16, 31 }, /* Profile 24. */
+            { 16, 31 }, /* Profile 25. */
+            { 16, 31 }, /* Profile 26. */
+            { 16, 31 }, /* Profile 27. */
+            { 16, 31 }, /* Profile 28. */
+            { 16, 31 }, /* Profile 29. */
+            { 16, 31 }, /* Profile 30. */
+            { 16, 31 }, /* Profile 31. */
+            { 16, 31 }, /* Profile 32. */
+            { 16, 31 }, /* Profile 33. */
+            { 16, 31 }, /* Profile 34. */
+            { 16, 31 }, /* Profile 35. */
+            { 16, 31 }, /* Profile 36. */
+            { 16, 31 }, /* Profile 37. */
+            { 16, 31 }, /* Profile 38. */
+            { 16, 31 }, /* Profile 39. */
+            { 16, 31 }, /* Profile 40. */
+            { 16, 31 }, /* Profile 41. */
+            { 16, 31 }, /* Profile 42. */
+            { 16, 31 }, /* Profile 43. */
+            { 16, 31 }, /* Profile 44. */
+            { 16, 31 }, /* Profile 45. */
+            { 16, 31 }, /* Profile 46. */
+            { 16, 31 }, /* Profile 47. */
+            { 16, 31 }, /* Profile 48. */
+            { 16, 31 }, /* Profile 49. */
+            { 16, 31 }, /* Profile 50. */
+            { 16, 31 }, /* Profile 51. */
+            { 16, 31 }, /* Profile 52. */
+            { 16, 31 }, /* Profile 53. */
+            { 16, 31 }, /* Profile 54. */
+            { 16, 31 }, /* Profile 55. */
+            { 16, 31 }, /* Profile 56. */
+            { 16, 31 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_47_32",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 32, 47 }, /* Profile 2. */
+            { 32, 47 }, /* Profile 3. */
+            { 32, 47 }, /* Profile 4. */
+            { 32, 47 }, /* Profile 5. */
+            { 32, 47 }, /* Profile 6. */
+            { 32, 47 }, /* Profile 7. */
+            { 32, 47 }, /* Profile 8. */
+            { 32, 47 }, /* Profile 9. */
+            { 32, 47 }, /* Profile 10. */
+            { 32, 47 }, /* Profile 11. */
+            { 32, 47 }, /* Profile 12. */
+            { 32, 47 }, /* Profile 13. */
+            { 32, 47 }, /* Profile 14. */
+            { 32, 47 }, /* Profile 15. */
+            { 32, 47 }, /* Profile 16. */
+            { 32, 47 }, /* Profile 17. */
+            { 32, 47 }, /* Profile 18. */
+            { 32, 47 }, /* Profile 19. */
+            { 32, 47 }, /* Profile 20. */
+            { 32, 47 }, /* Profile 21. */
+            { 32, 47 }, /* Profile 22. */
+            { 32, 47 }, /* Profile 23. */
+            { 32, 47 }, /* Profile 24. */
+            { 32, 47 }, /* Profile 25. */
+            { 32, 47 }, /* Profile 26. */
+            { 32, 47 }, /* Profile 27. */
+            { 32, 47 }, /* Profile 28. */
+            { 32, 47 }, /* Profile 29. */
+            { 32, 47 }, /* Profile 30. */
+            { 32, 47 }, /* Profile 31. */
+            { 32, 47 }, /* Profile 32. */
+            { 32, 47 }, /* Profile 33. */
+            { 32, 47 }, /* Profile 34. */
+            { 32, 47 }, /* Profile 35. */
+            { 32, 47 }, /* Profile 36. */
+            { 32, 47 }, /* Profile 37. */
+            { 32, 47 }, /* Profile 38. */
+            { 32, 47 }, /* Profile 39. */
+            { 32, 47 }, /* Profile 40. */
+            { 32, 47 }, /* Profile 41. */
+            { 32, 47 }, /* Profile 42. */
+            { 32, 47 }, /* Profile 43. */
+            { 32, 47 }, /* Profile 44. */
+            { 32, 47 }, /* Profile 45. */
+            { 32, 47 }, /* Profile 46. */
+            { 32, 47 }, /* Profile 47. */
+            { 32, 47 }, /* Profile 48. */
+            { 32, 47 }, /* Profile 49. */
+            { 32, 47 }, /* Profile 50. */
+            { 32, 47 }, /* Profile 51. */
+            { 32, 47 }, /* Profile 52. */
+            { 32, 47 }, /* Profile 53. */
+            { 32, 47 }, /* Profile 54. */
+            { 32, 47 }, /* Profile 55. */
+            { 32, 47 }, /* Profile 56. */
+            { 32, 47 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "I2E_CLASS_ID_15_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 320, 335 }, /* Profile 2. */
+            { 288, 303 }, /* Profile 3. */
+            { 320, 335 }, /* Profile 4. */
+            { 320, 335 }, /* Profile 5. */
+            { 320, 335 }, /* Profile 6. */
+            { 320, 335 }, /* Profile 7. */
+            { 288, 303 }, /* Profile 8. */
+            { 320, 335 }, /* Profile 9. */
+            { 320, 335 }, /* Profile 10. */
+            { 320, 335 }, /* Profile 11. */
+            { 320, 335 }, /* Profile 12. */
+            { 288, 303 }, /* Profile 13. */
+            { 320, 335 }, /* Profile 14. */
+            { 320, 335 }, /* Profile 15. */
+            { 320, 335 }, /* Profile 16. */
+            { 288, 303 }, /* Profile 17. */
+            { 320, 335 }, /* Profile 18. */
+            { 320, 335 }, /* Profile 19. */
+            { 320, 335 }, /* Profile 20. */
+            { 320, 335 }, /* Profile 21. */
+            { 288, 303 }, /* Profile 22. */
+            { 320, 335 }, /* Profile 23. */
+            { 320, 335 }, /* Profile 24. */
+            { 320, 335 }, /* Profile 25. */
+            { 320, 335 }, /* Profile 26. */
+            { 288, 303 }, /* Profile 27. */
+            { 320, 335 }, /* Profile 28. */
+            { 320, 335 }, /* Profile 29. */
+            { 336, 351 }, /* Profile 30. */
+            { 304, 319 }, /* Profile 31. */
+            { 336, 351 }, /* Profile 32. */
+            { 336, 351 }, /* Profile 33. */
+            { 336, 351 }, /* Profile 34. */
+            { 336, 351 }, /* Profile 35. */
+            { 304, 319 }, /* Profile 36. */
+            { 336, 351 }, /* Profile 37. */
+            { 336, 351 }, /* Profile 38. */
+            { 336, 351 }, /* Profile 39. */
+            { 336, 351 }, /* Profile 40. */
+            { 304, 319 }, /* Profile 41. */
+            { 336, 351 }, /* Profile 42. */
+            { 336, 351 }, /* Profile 43. */
+            { 336, 351 }, /* Profile 44. */
+            { 304, 319 }, /* Profile 45. */
+            { 336, 351 }, /* Profile 46. */
+            { 336, 351 }, /* Profile 47. */
+            { 336, 351 }, /* Profile 48. */
+            { 336, 351 }, /* Profile 49. */
+            { 304, 319 }, /* Profile 50. */
+            { 336, 351 }, /* Profile 51. */
+            { 336, 351 }, /* Profile 52. */
+            { 336, 351 }, /* Profile 53. */
+            { 336, 351 }, /* Profile 54. */
+            { 304, 319 }, /* Profile 55. */
+            { 336, 351 }, /* Profile 56. */
+            { 336, 351 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "IFP_IOAM_GBP_ACTION_3_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 408, 411 }, /* Profile 2. */
+            { 400, 403 }, /* Profile 3. */
+            { 408, 411 }, /* Profile 4. */
+            { 404, 407 }, /* Profile 5. */
+            { 404, 407 }, /* Profile 6. */
+            { 408, 411 }, /* Profile 7. */
+            { 400, 403 }, /* Profile 8. */
+            { 408, 411 }, /* Profile 9. */
+            { 404, 407 }, /* Profile 10. */
+            { 404, 407 }, /* Profile 11. */
+            { 404, 407 }, /* Profile 12. */
+            { 396, 399 }, /* Profile 13. */
+            { 404, 407 }, /* Profile 14. */
+            { 400, 403 }, /* Profile 15. */
+            { 408, 411 }, /* Profile 16. */
+            { 400, 403 }, /* Profile 17. */
+            { 408, 411 }, /* Profile 18. */
+            { 404, 407 }, /* Profile 19. */
+            { 404, 407 }, /* Profile 20. */
+            { 408, 411 }, /* Profile 21. */
+            { 400, 403 }, /* Profile 22. */
+            { 408, 411 }, /* Profile 23. */
+            { 404, 407 }, /* Profile 24. */
+            { 404, 407 }, /* Profile 25. */
+            { 404, 407 }, /* Profile 26. */
+            { 396, 399 }, /* Profile 27. */
+            { 404, 407 }, /* Profile 28. */
+            { 400, 403 }, /* Profile 29. */
+            { 408, 411 }, /* Profile 30. */
+            { 400, 403 }, /* Profile 31. */
+            { 408, 411 }, /* Profile 32. */
+            { 404, 407 }, /* Profile 33. */
+            { 404, 407 }, /* Profile 34. */
+            { 408, 411 }, /* Profile 35. */
+            { 400, 403 }, /* Profile 36. */
+            { 408, 411 }, /* Profile 37. */
+            { 404, 407 }, /* Profile 38. */
+            { 404, 407 }, /* Profile 39. */
+            { 404, 407 }, /* Profile 40. */
+            { 396, 399 }, /* Profile 41. */
+            { 404, 407 }, /* Profile 42. */
+            { 400, 403 }, /* Profile 43. */
+            { 408, 411 }, /* Profile 44. */
+            { 400, 403 }, /* Profile 45. */
+            { 408, 411 }, /* Profile 46. */
+            { 404, 407 }, /* Profile 47. */
+            { 404, 407 }, /* Profile 48. */
+            { 408, 411 }, /* Profile 49. */
+            { 400, 403 }, /* Profile 50. */
+            { 408, 411 }, /* Profile 51. */
+            { 404, 407 }, /* Profile 52. */
+            { 404, 407 }, /* Profile 53. */
+            { 404, 407 }, /* Profile 54. */
+            { 396, 399 }, /* Profile 55. */
+            { 404, 407 }, /* Profile 56. */
+            { 400, 403 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "IFP_TS_CONTROL_ACTION_3_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 372, 375 }, /* Profile 2. */
+            { 356, 359 }, /* Profile 3. */
+            { 376, 379 }, /* Profile 4. */
+            { 372, 375 }, /* Profile 5. */
+            { 372, 375 }, /* Profile 6. */
+            { 372, 375 }, /* Profile 7. */
+            { 356, 359 }, /* Profile 8. */
+            { 376, 379 }, /* Profile 9. */
+            { 372, 375 }, /* Profile 10. */
+            { 372, 375 }, /* Profile 11. */
+            { 368, 371 }, /* Profile 12. */
+            { 352, 355 }, /* Profile 13. */
+            { 372, 375 }, /* Profile 14. */
+            { 368, 371 }, /* Profile 15. */
+            { 372, 375 }, /* Profile 16. */
+            { 356, 359 }, /* Profile 17. */
+            { 376, 379 }, /* Profile 18. */
+            { 372, 375 }, /* Profile 19. */
+            { 372, 375 }, /* Profile 20. */
+            { 372, 375 }, /* Profile 21. */
+            { 356, 359 }, /* Profile 22. */
+            { 376, 379 }, /* Profile 23. */
+            { 372, 375 }, /* Profile 24. */
+            { 372, 375 }, /* Profile 25. */
+            { 368, 371 }, /* Profile 26. */
+            { 352, 355 }, /* Profile 27. */
+            { 372, 375 }, /* Profile 28. */
+            { 368, 371 }, /* Profile 29. */
+            { 372, 375 }, /* Profile 30. */
+            { 356, 359 }, /* Profile 31. */
+            { 376, 379 }, /* Profile 32. */
+            { 372, 375 }, /* Profile 33. */
+            { 372, 375 }, /* Profile 34. */
+            { 372, 375 }, /* Profile 35. */
+            { 356, 359 }, /* Profile 36. */
+            { 376, 379 }, /* Profile 37. */
+            { 372, 375 }, /* Profile 38. */
+            { 372, 375 }, /* Profile 39. */
+            { 368, 371 }, /* Profile 40. */
+            { 352, 355 }, /* Profile 41. */
+            { 372, 375 }, /* Profile 42. */
+            { 368, 371 }, /* Profile 43. */
+            { 372, 375 }, /* Profile 44. */
+            { 356, 359 }, /* Profile 45. */
+            { 376, 379 }, /* Profile 46. */
+            { 372, 375 }, /* Profile 47. */
+            { 372, 375 }, /* Profile 48. */
+            { 372, 375 }, /* Profile 49. */
+            { 356, 359 }, /* Profile 50. */
+            { 376, 379 }, /* Profile 51. */
+            { 372, 375 }, /* Profile 52. */
+            { 372, 375 }, /* Profile 53. */
+            { 368, 371 }, /* Profile 54. */
+            { 352, 355 }, /* Profile 55. */
+            { 372, 375 }, /* Profile 56. */
+            { 368, 371 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "ING_TIMESTAMP_15_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { 288, 303 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { 288, 303 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { 288, 303 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { 288, 303 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { 288, 303 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { 288, 303 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { -1, -1 }, /* Profile 33. */
+            { 304, 319 }, /* Profile 34. */
+            { -1, -1 }, /* Profile 35. */
+            { -1, -1 }, /* Profile 36. */
+            { -1, -1 }, /* Profile 37. */
+            { -1, -1 }, /* Profile 38. */
+            { 304, 319 }, /* Profile 39. */
+            { -1, -1 }, /* Profile 40. */
+            { -1, -1 }, /* Profile 41. */
+            { -1, -1 }, /* Profile 42. */
+            { 304, 319 }, /* Profile 43. */
+            { -1, -1 }, /* Profile 44. */
+            { -1, -1 }, /* Profile 45. */
+            { -1, -1 }, /* Profile 46. */
+            { -1, -1 }, /* Profile 47. */
+            { 304, 319 }, /* Profile 48. */
+            { -1, -1 }, /* Profile 49. */
+            { -1, -1 }, /* Profile 50. */
+            { -1, -1 }, /* Profile 51. */
+            { -1, -1 }, /* Profile 52. */
+            { 304, 319 }, /* Profile 53. */
+            { -1, -1 }, /* Profile 54. */
+            { -1, -1 }, /* Profile 55. */
+            { -1, -1 }, /* Profile 56. */
+            { 304, 319 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "ING_TIMESTAMP_31_16",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { 304, 319 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { 304, 319 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { 304, 319 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { 304, 319 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { 304, 319 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { 304, 319 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { -1, -1 }, /* Profile 33. */
+            { 320, 335 }, /* Profile 34. */
+            { -1, -1 }, /* Profile 35. */
+            { -1, -1 }, /* Profile 36. */
+            { -1, -1 }, /* Profile 37. */
+            { -1, -1 }, /* Profile 38. */
+            { 320, 335 }, /* Profile 39. */
+            { -1, -1 }, /* Profile 40. */
+            { -1, -1 }, /* Profile 41. */
+            { -1, -1 }, /* Profile 42. */
+            { 320, 335 }, /* Profile 43. */
+            { -1, -1 }, /* Profile 44. */
+            { -1, -1 }, /* Profile 45. */
+            { -1, -1 }, /* Profile 46. */
+            { -1, -1 }, /* Profile 47. */
+            { 320, 335 }, /* Profile 48. */
+            { -1, -1 }, /* Profile 49. */
+            { -1, -1 }, /* Profile 50. */
+            { -1, -1 }, /* Profile 51. */
+            { -1, -1 }, /* Profile 52. */
+            { 320, 335 }, /* Profile 53. */
+            { -1, -1 }, /* Profile 54. */
+            { -1, -1 }, /* Profile 55. */
+            { -1, -1 }, /* Profile 56. */
+            { 320, 335 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "INGRESS_PP_PORT_7_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 272, 279 }, /* Profile 2. */
+            { 256, 263 }, /* Profile 3. */
+            { 272, 279 }, /* Profile 4. */
+            { 256, 263 }, /* Profile 5. */
+            { 256, 263 }, /* Profile 6. */
+            { 272, 279 }, /* Profile 7. */
+            { 256, 263 }, /* Profile 8. */
+            { 272, 279 }, /* Profile 9. */
+            { 256, 263 }, /* Profile 10. */
+            { 256, 263 }, /* Profile 11. */
+            { 272, 279 }, /* Profile 12. */
+            { 256, 263 }, /* Profile 13. */
+            { 272, 279 }, /* Profile 14. */
+            { 256, 263 }, /* Profile 15. */
+            { 272, 279 }, /* Profile 16. */
+            { 256, 263 }, /* Profile 17. */
+            { 272, 279 }, /* Profile 18. */
+            { 256, 263 }, /* Profile 19. */
+            { 256, 263 }, /* Profile 20. */
+            { 272, 279 }, /* Profile 21. */
+            { 256, 263 }, /* Profile 22. */
+            { 272, 279 }, /* Profile 23. */
+            { 256, 263 }, /* Profile 24. */
+            { 256, 263 }, /* Profile 25. */
+            { 272, 279 }, /* Profile 26. */
+            { 256, 263 }, /* Profile 27. */
+            { 272, 279 }, /* Profile 28. */
+            { 256, 263 }, /* Profile 29. */
+            { 288, 295 }, /* Profile 30. */
+            { 272, 279 }, /* Profile 31. */
+            { 288, 295 }, /* Profile 32. */
+            { 272, 279 }, /* Profile 33. */
+            { 272, 279 }, /* Profile 34. */
+            { 288, 295 }, /* Profile 35. */
+            { 272, 279 }, /* Profile 36. */
+            { 288, 295 }, /* Profile 37. */
+            { 272, 279 }, /* Profile 38. */
+            { 272, 279 }, /* Profile 39. */
+            { 288, 295 }, /* Profile 40. */
+            { 272, 279 }, /* Profile 41. */
+            { 288, 295 }, /* Profile 42. */
+            { 272, 279 }, /* Profile 43. */
+            { 288, 295 }, /* Profile 44. */
+            { 272, 279 }, /* Profile 45. */
+            { 288, 295 }, /* Profile 46. */
+            { 272, 279 }, /* Profile 47. */
+            { 272, 279 }, /* Profile 48. */
+            { 288, 295 }, /* Profile 49. */
+            { 272, 279 }, /* Profile 50. */
+            { 288, 295 }, /* Profile 51. */
+            { 272, 279 }, /* Profile 52. */
+            { 272, 279 }, /* Profile 53. */
+            { 288, 295 }, /* Profile 54. */
+            { 272, 279 }, /* Profile 55. */
+            { 288, 295 }, /* Profile 56. */
+            { 272, 279 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 224, 239 }, /* Profile 2. */
+            { 208, 223 }, /* Profile 3. */
+            { 224, 239 }, /* Profile 4. */
+            { 208, 223 }, /* Profile 5. */
+            { 208, 223 }, /* Profile 6. */
+            { 224, 239 }, /* Profile 7. */
+            { 208, 223 }, /* Profile 8. */
+            { 224, 239 }, /* Profile 9. */
+            { 208, 223 }, /* Profile 10. */
+            { 208, 223 }, /* Profile 11. */
+            { 224, 239 }, /* Profile 12. */
+            { 208, 223 }, /* Profile 13. */
+            { 224, 239 }, /* Profile 14. */
+            { 208, 223 }, /* Profile 15. */
+            { 224, 239 }, /* Profile 16. */
+            { 208, 223 }, /* Profile 17. */
+            { 224, 239 }, /* Profile 18. */
+            { 208, 223 }, /* Profile 19. */
+            { 208, 223 }, /* Profile 20. */
+            { 224, 239 }, /* Profile 21. */
+            { 208, 223 }, /* Profile 22. */
+            { 224, 239 }, /* Profile 23. */
+            { 208, 223 }, /* Profile 24. */
+            { 208, 223 }, /* Profile 25. */
+            { 224, 239 }, /* Profile 26. */
+            { 208, 223 }, /* Profile 27. */
+            { 224, 239 }, /* Profile 28. */
+            { 208, 223 }, /* Profile 29. */
+            { 240, 255 }, /* Profile 30. */
+            { 224, 239 }, /* Profile 31. */
+            { 240, 255 }, /* Profile 32. */
+            { 224, 239 }, /* Profile 33. */
+            { 224, 239 }, /* Profile 34. */
+            { 240, 255 }, /* Profile 35. */
+            { 224, 239 }, /* Profile 36. */
+            { 240, 255 }, /* Profile 37. */
+            { 224, 239 }, /* Profile 38. */
+            { 224, 239 }, /* Profile 39. */
+            { 240, 255 }, /* Profile 40. */
+            { 224, 239 }, /* Profile 41. */
+            { 240, 255 }, /* Profile 42. */
+            { 224, 239 }, /* Profile 43. */
+            { 240, 255 }, /* Profile 44. */
+            { 224, 239 }, /* Profile 45. */
+            { 240, 255 }, /* Profile 46. */
+            { 224, 239 }, /* Profile 47. */
+            { 224, 239 }, /* Profile 48. */
+            { 240, 255 }, /* Profile 49. */
+            { 224, 239 }, /* Profile 50. */
+            { 240, 255 }, /* Profile 51. */
+            { 224, 239 }, /* Profile 52. */
+            { 224, 239 }, /* Profile 53. */
+            { 240, 255 }, /* Profile 54. */
+            { 224, 239 }, /* Profile 55. */
+            { 240, 255 }, /* Profile 56. */
+            { 224, 239 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "INGRESS_QOS_REMARK_CTRL_3_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 404, 407 }, /* Profile 2. */
+            { 396, 399 }, /* Profile 3. */
+            { 404, 407 }, /* Profile 4. */
+            { 400, 403 }, /* Profile 5. */
+            { 400, 403 }, /* Profile 6. */
+            { 404, 407 }, /* Profile 7. */
+            { 396, 399 }, /* Profile 8. */
+            { 404, 407 }, /* Profile 9. */
+            { 400, 403 }, /* Profile 10. */
+            { 400, 403 }, /* Profile 11. */
+            { 400, 403 }, /* Profile 12. */
+            { 392, 395 }, /* Profile 13. */
+            { 400, 403 }, /* Profile 14. */
+            { 396, 399 }, /* Profile 15. */
+            { 404, 407 }, /* Profile 16. */
+            { 396, 399 }, /* Profile 17. */
+            { 404, 407 }, /* Profile 18. */
+            { 400, 403 }, /* Profile 19. */
+            { 400, 403 }, /* Profile 20. */
+            { 404, 407 }, /* Profile 21. */
+            { 396, 399 }, /* Profile 22. */
+            { 404, 407 }, /* Profile 23. */
+            { 400, 403 }, /* Profile 24. */
+            { 400, 403 }, /* Profile 25. */
+            { 400, 403 }, /* Profile 26. */
+            { 392, 395 }, /* Profile 27. */
+            { 400, 403 }, /* Profile 28. */
+            { 396, 399 }, /* Profile 29. */
+            { 404, 407 }, /* Profile 30. */
+            { 396, 399 }, /* Profile 31. */
+            { 404, 407 }, /* Profile 32. */
+            { 400, 403 }, /* Profile 33. */
+            { 400, 403 }, /* Profile 34. */
+            { 404, 407 }, /* Profile 35. */
+            { 396, 399 }, /* Profile 36. */
+            { 404, 407 }, /* Profile 37. */
+            { 400, 403 }, /* Profile 38. */
+            { 400, 403 }, /* Profile 39. */
+            { 400, 403 }, /* Profile 40. */
+            { 392, 395 }, /* Profile 41. */
+            { 400, 403 }, /* Profile 42. */
+            { 396, 399 }, /* Profile 43. */
+            { 404, 407 }, /* Profile 44. */
+            { 396, 399 }, /* Profile 45. */
+            { 404, 407 }, /* Profile 46. */
+            { 400, 403 }, /* Profile 47. */
+            { 400, 403 }, /* Profile 48. */
+            { 404, 407 }, /* Profile 49. */
+            { 396, 399 }, /* Profile 50. */
+            { 404, 407 }, /* Profile 51. */
+            { 400, 403 }, /* Profile 52. */
+            { 400, 403 }, /* Profile 53. */
+            { 400, 403 }, /* Profile 54. */
+            { 392, 395 }, /* Profile 55. */
+            { 400, 403 }, /* Profile 56. */
+            { 396, 399 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "INT_PRI_3_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 420, 423 }, /* Profile 2. */
+            { 412, 415 }, /* Profile 3. */
+            { 420, 423 }, /* Profile 4. */
+            { 420, 423 }, /* Profile 5. */
+            { 420, 423 }, /* Profile 6. */
+            { 420, 423 }, /* Profile 7. */
+            { 412, 415 }, /* Profile 8. */
+            { 420, 423 }, /* Profile 9. */
+            { 420, 423 }, /* Profile 10. */
+            { 420, 423 }, /* Profile 11. */
+            { 416, 419 }, /* Profile 12. */
+            { 408, 411 }, /* Profile 13. */
+            { 416, 419 }, /* Profile 14. */
+            { 416, 419 }, /* Profile 15. */
+            { 420, 423 }, /* Profile 16. */
+            { 412, 415 }, /* Profile 17. */
+            { 420, 423 }, /* Profile 18. */
+            { 420, 423 }, /* Profile 19. */
+            { 420, 423 }, /* Profile 20. */
+            { 420, 423 }, /* Profile 21. */
+            { 412, 415 }, /* Profile 22. */
+            { 420, 423 }, /* Profile 23. */
+            { 420, 423 }, /* Profile 24. */
+            { 420, 423 }, /* Profile 25. */
+            { 416, 419 }, /* Profile 26. */
+            { 408, 411 }, /* Profile 27. */
+            { 416, 419 }, /* Profile 28. */
+            { 416, 419 }, /* Profile 29. */
+            { 420, 423 }, /* Profile 30. */
+            { 412, 415 }, /* Profile 31. */
+            { 420, 423 }, /* Profile 32. */
+            { 420, 423 }, /* Profile 33. */
+            { 420, 423 }, /* Profile 34. */
+            { 420, 423 }, /* Profile 35. */
+            { 412, 415 }, /* Profile 36. */
+            { 420, 423 }, /* Profile 37. */
+            { 420, 423 }, /* Profile 38. */
+            { 420, 423 }, /* Profile 39. */
+            { 416, 419 }, /* Profile 40. */
+            { 408, 411 }, /* Profile 41. */
+            { 416, 419 }, /* Profile 42. */
+            { 416, 419 }, /* Profile 43. */
+            { 420, 423 }, /* Profile 44. */
+            { 412, 415 }, /* Profile 45. */
+            { 420, 423 }, /* Profile 46. */
+            { 420, 423 }, /* Profile 47. */
+            { 420, 423 }, /* Profile 48. */
+            { 420, 423 }, /* Profile 49. */
+            { 412, 415 }, /* Profile 50. */
+            { 420, 423 }, /* Profile 51. */
+            { 420, 423 }, /* Profile 52. */
+            { 420, 423 }, /* Profile 53. */
+            { 416, 419 }, /* Profile 54. */
+            { 408, 411 }, /* Profile 55. */
+            { 416, 419 }, /* Profile 56. */
+            { 416, 419 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "L2_IIF_11_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L2_IIF_11_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 336, 347 }, /* Profile 2. */
+            { 304, 315 }, /* Profile 3. */
+            { 336, 347 }, /* Profile 4. */
+            { 336, 347 }, /* Profile 5. */
+            { 336, 347 }, /* Profile 6. */
+            { 336, 347 }, /* Profile 7. */
+            { 304, 315 }, /* Profile 8. */
+            { 336, 347 }, /* Profile 9. */
+            { 336, 347 }, /* Profile 10. */
+            { 336, 347 }, /* Profile 11. */
+            { 336, 347 }, /* Profile 12. */
+            { 304, 315 }, /* Profile 13. */
+            { 336, 347 }, /* Profile 14. */
+            { 336, 347 }, /* Profile 15. */
+            { 336, 347 }, /* Profile 16. */
+            { 304, 315 }, /* Profile 17. */
+            { 336, 347 }, /* Profile 18. */
+            { 336, 347 }, /* Profile 19. */
+            { 336, 347 }, /* Profile 20. */
+            { 336, 347 }, /* Profile 21. */
+            { 304, 315 }, /* Profile 22. */
+            { 336, 347 }, /* Profile 23. */
+            { 336, 347 }, /* Profile 24. */
+            { 336, 347 }, /* Profile 25. */
+            { 336, 347 }, /* Profile 26. */
+            { 304, 315 }, /* Profile 27. */
+            { 336, 347 }, /* Profile 28. */
+            { 336, 347 }, /* Profile 29. */
+        },
+        .profile_cnt = 30,
+    },
+    {
+        .name = "L2_OIF_11_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L2_OIF_11_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { 160, 171 }, /* Profile 30. */
+            { 160, 171 }, /* Profile 31. */
+            { 160, 171 }, /* Profile 32. */
+            { 160, 171 }, /* Profile 33. */
+            { 160, 171 }, /* Profile 34. */
+            { 160, 171 }, /* Profile 35. */
+            { 160, 171 }, /* Profile 36. */
+            { 160, 171 }, /* Profile 37. */
+            { 160, 171 }, /* Profile 38. */
+            { 160, 171 }, /* Profile 39. */
+            { 160, 171 }, /* Profile 40. */
+            { 160, 171 }, /* Profile 41. */
+            { 160, 171 }, /* Profile 42. */
+            { 160, 171 }, /* Profile 43. */
+            { 160, 171 }, /* Profile 44. */
+            { 160, 171 }, /* Profile 45. */
+            { 160, 171 }, /* Profile 46. */
+            { 160, 171 }, /* Profile 47. */
+            { 160, 171 }, /* Profile 48. */
+            { 160, 171 }, /* Profile 49. */
+            { 160, 171 }, /* Profile 50. */
+            { 160, 171 }, /* Profile 51. */
+            { 160, 171 }, /* Profile 52. */
+            { 160, 171 }, /* Profile 53. */
+            { 160, 171 }, /* Profile 54. */
+            { 160, 171 }, /* Profile 55. */
+            { 160, 171 }, /* Profile 56. */
+            { 160, 171 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "L3_DNAT_INDEX_15_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 192, 207 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 192, 207 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { 192, 207 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { 192, 207 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { 192, 207 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { 192, 207 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { 192, 207 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { 192, 207 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { 192, 207 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { 192, 207 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { 192, 207 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { 192, 207 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { 208, 223 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { 208, 223 }, /* Profile 32. */
+            { -1, -1 }, /* Profile 33. */
+            { -1, -1 }, /* Profile 34. */
+            { 208, 223 }, /* Profile 35. */
+            { -1, -1 }, /* Profile 36. */
+            { 208, 223 }, /* Profile 37. */
+            { -1, -1 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { 208, 223 }, /* Profile 40. */
+            { -1, -1 }, /* Profile 41. */
+            { 208, 223 }, /* Profile 42. */
+            { -1, -1 }, /* Profile 43. */
+            { 208, 223 }, /* Profile 44. */
+            { -1, -1 }, /* Profile 45. */
+            { 208, 223 }, /* Profile 46. */
+            { -1, -1 }, /* Profile 47. */
+            { -1, -1 }, /* Profile 48. */
+            { 208, 223 }, /* Profile 49. */
+            { -1, -1 }, /* Profile 50. */
+            { 208, 223 }, /* Profile 51. */
+            { -1, -1 }, /* Profile 52. */
+            { -1, -1 }, /* Profile 53. */
+            { 208, 223 }, /* Profile 54. */
+            { -1, -1 }, /* Profile 55. */
+            { 208, 223 }, /* Profile 56. */
+        },
+        .profile_cnt = 57,
+    },
+    {
+        .name = "L3_IIF_13_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 352, 365 }, /* Profile 2. */
+            { 320, 333 }, /* Profile 3. */
+            { 352, 365 }, /* Profile 4. */
+            { 352, 365 }, /* Profile 5. */
+            { 352, 365 }, /* Profile 6. */
+            { 352, 365 }, /* Profile 7. */
+            { 320, 333 }, /* Profile 8. */
+            { 352, 365 }, /* Profile 9. */
+            { 352, 365 }, /* Profile 10. */
+            { 352, 365 }, /* Profile 11. */
+            { 352, 365 }, /* Profile 12. */
+            { 320, 333 }, /* Profile 13. */
+            { 352, 365 }, /* Profile 14. */
+            { 352, 365 }, /* Profile 15. */
+            { 352, 365 }, /* Profile 16. */
+            { 320, 333 }, /* Profile 17. */
+            { 352, 365 }, /* Profile 18. */
+            { 352, 365 }, /* Profile 19. */
+            { 352, 365 }, /* Profile 20. */
+            { 352, 365 }, /* Profile 21. */
+            { 320, 333 }, /* Profile 22. */
+            { 352, 365 }, /* Profile 23. */
+            { 352, 365 }, /* Profile 24. */
+            { 352, 365 }, /* Profile 25. */
+            { 352, 365 }, /* Profile 26. */
+            { 320, 333 }, /* Profile 27. */
+            { 352, 365 }, /* Profile 28. */
+            { 352, 365 }, /* Profile 29. */
+            { 352, 365 }, /* Profile 30. */
+            { 320, 333 }, /* Profile 31. */
+            { 352, 365 }, /* Profile 32. */
+            { 352, 365 }, /* Profile 33. */
+            { 352, 365 }, /* Profile 34. */
+            { 352, 365 }, /* Profile 35. */
+            { 320, 333 }, /* Profile 36. */
+            { 352, 365 }, /* Profile 37. */
+            { 352, 365 }, /* Profile 38. */
+            { 352, 365 }, /* Profile 39. */
+            { 352, 365 }, /* Profile 40. */
+            { 320, 333 }, /* Profile 41. */
+            { 352, 365 }, /* Profile 42. */
+            { 352, 365 }, /* Profile 43. */
+            { 352, 365 }, /* Profile 44. */
+            { 320, 333 }, /* Profile 45. */
+            { 352, 365 }, /* Profile 46. */
+            { 352, 365 }, /* Profile 47. */
+            { 352, 365 }, /* Profile 48. */
+            { 352, 365 }, /* Profile 49. */
+            { 320, 333 }, /* Profile 50. */
+            { 352, 365 }, /* Profile 51. */
+            { 352, 365 }, /* Profile 52. */
+            { 352, 365 }, /* Profile 53. */
+            { 352, 365 }, /* Profile 54. */
+            { 320, 333 }, /* Profile 55. */
+            { 352, 365 }, /* Profile 56. */
+            { 352, 365 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "L3_OIF_1_13_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 160, 173 }, /* Profile 2. */
+            { 160, 173 }, /* Profile 3. */
+            { 160, 173 }, /* Profile 4. */
+            { 160, 173 }, /* Profile 5. */
+            { 160, 173 }, /* Profile 6. */
+            { 160, 173 }, /* Profile 7. */
+            { 160, 173 }, /* Profile 8. */
+            { 160, 173 }, /* Profile 9. */
+            { 160, 173 }, /* Profile 10. */
+            { 160, 173 }, /* Profile 11. */
+            { 160, 173 }, /* Profile 12. */
+            { 160, 173 }, /* Profile 13. */
+            { 160, 173 }, /* Profile 14. */
+            { 160, 173 }, /* Profile 15. */
+            { 160, 173 }, /* Profile 16. */
+            { 160, 173 }, /* Profile 17. */
+            { 160, 173 }, /* Profile 18. */
+            { 160, 173 }, /* Profile 19. */
+            { 160, 173 }, /* Profile 20. */
+            { 160, 173 }, /* Profile 21. */
+            { 160, 173 }, /* Profile 22. */
+            { 160, 173 }, /* Profile 23. */
+            { 160, 173 }, /* Profile 24. */
+            { 160, 173 }, /* Profile 25. */
+            { 160, 173 }, /* Profile 26. */
+            { 160, 173 }, /* Profile 27. */
+            { 160, 173 }, /* Profile 28. */
+            { 160, 173 }, /* Profile 29. */
+            { 176, 189 }, /* Profile 30. */
+            { 176, 189 }, /* Profile 31. */
+            { 176, 189 }, /* Profile 32. */
+            { 176, 189 }, /* Profile 33. */
+            { 176, 189 }, /* Profile 34. */
+            { 176, 189 }, /* Profile 35. */
+            { 176, 189 }, /* Profile 36. */
+            { 176, 189 }, /* Profile 37. */
+            { 176, 189 }, /* Profile 38. */
+            { 176, 189 }, /* Profile 39. */
+            { 176, 189 }, /* Profile 40. */
+            { 176, 189 }, /* Profile 41. */
+            { 176, 189 }, /* Profile 42. */
+            { 176, 189 }, /* Profile 43. */
+            { 176, 189 }, /* Profile 44. */
+            { 176, 189 }, /* Profile 45. */
+            { 176, 189 }, /* Profile 46. */
+            { 176, 189 }, /* Profile 47. */
+            { 176, 189 }, /* Profile 48. */
+            { 176, 189 }, /* Profile 49. */
+            { 176, 189 }, /* Profile 50. */
+            { 176, 189 }, /* Profile 51. */
+            { 176, 189 }, /* Profile 52. */
+            { 176, 189 }, /* Profile 53. */
+            { 176, 189 }, /* Profile 54. */
+            { 176, 189 }, /* Profile 55. */
+            { 176, 189 }, /* Profile 56. */
+            { 176, 189 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "L3_SNAT_INDEX_15_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 304, 319 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 304, 319 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { 304, 319 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { 304, 319 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { 304, 319 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { 304, 319 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { 304, 319 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { 304, 319 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { 304, 319 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { 304, 319 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { 304, 319 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { 304, 319 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { 320, 335 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { 320, 335 }, /* Profile 32. */
+            { -1, -1 }, /* Profile 33. */
+            { -1, -1 }, /* Profile 34. */
+            { 320, 335 }, /* Profile 35. */
+            { -1, -1 }, /* Profile 36. */
+            { 320, 335 }, /* Profile 37. */
+            { -1, -1 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { 320, 335 }, /* Profile 40. */
+            { -1, -1 }, /* Profile 41. */
+            { 320, 335 }, /* Profile 42. */
+            { -1, -1 }, /* Profile 43. */
+            { 320, 335 }, /* Profile 44. */
+            { -1, -1 }, /* Profile 45. */
+            { 320, 335 }, /* Profile 46. */
+            { -1, -1 }, /* Profile 47. */
+            { -1, -1 }, /* Profile 48. */
+            { 320, 335 }, /* Profile 49. */
+            { -1, -1 }, /* Profile 50. */
+            { 320, 335 }, /* Profile 51. */
+            { -1, -1 }, /* Profile 52. */
+            { -1, -1 }, /* Profile 53. */
+            { 320, 335 }, /* Profile 54. */
+            { -1, -1 }, /* Profile 55. */
+            { 320, 335 }, /* Profile 56. */
+        },
+        .profile_cnt = 57,
+    },
+    {
+        .name = "MAC_DA_23_20_3_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 392, 395 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { 392, 395 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { 388, 391 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { 392, 395 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { 392, 395 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { 388, 391 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { 392, 395 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { -1, -1 }, /* Profile 33. */
+            { -1, -1 }, /* Profile 34. */
+            { 392, 395 }, /* Profile 35. */
+            { -1, -1 }, /* Profile 36. */
+            { -1, -1 }, /* Profile 37. */
+            { -1, -1 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { 388, 391 }, /* Profile 40. */
+            { -1, -1 }, /* Profile 41. */
+            { -1, -1 }, /* Profile 42. */
+            { -1, -1 }, /* Profile 43. */
+            { 392, 395 }, /* Profile 44. */
+            { -1, -1 }, /* Profile 45. */
+            { -1, -1 }, /* Profile 46. */
+            { -1, -1 }, /* Profile 47. */
+            { -1, -1 }, /* Profile 48. */
+            { 392, 395 }, /* Profile 49. */
+            { -1, -1 }, /* Profile 50. */
+            { -1, -1 }, /* Profile 51. */
+            { -1, -1 }, /* Profile 52. */
+            { -1, -1 }, /* Profile 53. */
+            { 388, 391 }, /* Profile 54. */
+        },
+        .profile_cnt = 55,
+    },
+    {
+        .name = "MPLS_LABEL_DECAP_COUNT_3_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 400, 403 }, /* Profile 2. */
+            { 392, 395 }, /* Profile 3. */
+            { 400, 403 }, /* Profile 4. */
+            { 396, 399 }, /* Profile 5. */
+            { 396, 399 }, /* Profile 6. */
+            { 400, 403 }, /* Profile 7. */
+            { 392, 395 }, /* Profile 8. */
+            { 400, 403 }, /* Profile 9. */
+            { 396, 399 }, /* Profile 10. */
+            { 396, 399 }, /* Profile 11. */
+            { 396, 399 }, /* Profile 12. */
+            { 388, 391 }, /* Profile 13. */
+            { 396, 399 }, /* Profile 14. */
+            { 392, 395 }, /* Profile 15. */
+            { 400, 403 }, /* Profile 16. */
+            { 392, 395 }, /* Profile 17. */
+            { 400, 403 }, /* Profile 18. */
+            { 396, 399 }, /* Profile 19. */
+            { 396, 399 }, /* Profile 20. */
+            { 400, 403 }, /* Profile 21. */
+            { 392, 395 }, /* Profile 22. */
+            { 400, 403 }, /* Profile 23. */
+            { 396, 399 }, /* Profile 24. */
+            { 396, 399 }, /* Profile 25. */
+            { 396, 399 }, /* Profile 26. */
+            { 388, 391 }, /* Profile 27. */
+            { 396, 399 }, /* Profile 28. */
+            { 392, 395 }, /* Profile 29. */
+            { 400, 403 }, /* Profile 30. */
+            { 392, 395 }, /* Profile 31. */
+            { 400, 403 }, /* Profile 32. */
+            { 396, 399 }, /* Profile 33. */
+            { 396, 399 }, /* Profile 34. */
+            { 400, 403 }, /* Profile 35. */
+            { 392, 395 }, /* Profile 36. */
+            { 400, 403 }, /* Profile 37. */
+            { 396, 399 }, /* Profile 38. */
+            { 396, 399 }, /* Profile 39. */
+            { 396, 399 }, /* Profile 40. */
+            { 388, 391 }, /* Profile 41. */
+            { 396, 399 }, /* Profile 42. */
+            { 392, 395 }, /* Profile 43. */
+            { 400, 403 }, /* Profile 44. */
+            { 392, 395 }, /* Profile 45. */
+            { 400, 403 }, /* Profile 46. */
+            { 396, 399 }, /* Profile 47. */
+            { 396, 399 }, /* Profile 48. */
+            { 400, 403 }, /* Profile 49. */
+            { 392, 395 }, /* Profile 50. */
+            { 400, 403 }, /* Profile 51. */
+            { 396, 399 }, /* Profile 52. */
+            { 396, 399 }, /* Profile 53. */
+            { 396, 399 }, /* Profile 54. */
+            { 388, 391 }, /* Profile 55. */
+            { 396, 399 }, /* Profile 56. */
+            { 392, 395 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 288, 303 }, /* Profile 2. */
+            { 272, 287 }, /* Profile 3. */
+            { 288, 303 }, /* Profile 4. */
+            { 272, 287 }, /* Profile 5. */
+            { 272, 287 }, /* Profile 6. */
+            { 288, 303 }, /* Profile 7. */
+            { 272, 287 }, /* Profile 8. */
+            { 288, 303 }, /* Profile 9. */
+            { 272, 287 }, /* Profile 10. */
+            { 272, 287 }, /* Profile 11. */
+            { 288, 303 }, /* Profile 12. */
+            { 272, 287 }, /* Profile 13. */
+            { 288, 303 }, /* Profile 14. */
+            { 272, 287 }, /* Profile 15. */
+            { 288, 303 }, /* Profile 16. */
+            { 272, 287 }, /* Profile 17. */
+            { 288, 303 }, /* Profile 18. */
+            { 272, 287 }, /* Profile 19. */
+            { 272, 287 }, /* Profile 20. */
+            { 288, 303 }, /* Profile 21. */
+            { 272, 287 }, /* Profile 22. */
+            { 288, 303 }, /* Profile 23. */
+            { 272, 287 }, /* Profile 24. */
+            { 272, 287 }, /* Profile 25. */
+            { 288, 303 }, /* Profile 26. */
+            { 272, 287 }, /* Profile 27. */
+            { 288, 303 }, /* Profile 28. */
+            { 272, 287 }, /* Profile 29. */
+            { 304, 319 }, /* Profile 30. */
+            { 288, 303 }, /* Profile 31. */
+            { 304, 319 }, /* Profile 32. */
+            { 288, 303 }, /* Profile 33. */
+            { 288, 303 }, /* Profile 34. */
+            { 304, 319 }, /* Profile 35. */
+            { 288, 303 }, /* Profile 36. */
+            { 304, 319 }, /* Profile 37. */
+            { 288, 303 }, /* Profile 38. */
+            { 288, 303 }, /* Profile 39. */
+            { 304, 319 }, /* Profile 40. */
+            { 288, 303 }, /* Profile 41. */
+            { 304, 319 }, /* Profile 42. */
+            { 288, 303 }, /* Profile 43. */
+            { 304, 319 }, /* Profile 44. */
+            { 288, 303 }, /* Profile 45. */
+            { 304, 319 }, /* Profile 46. */
+            { 288, 303 }, /* Profile 47. */
+            { 288, 303 }, /* Profile 48. */
+            { 304, 319 }, /* Profile 49. */
+            { 288, 303 }, /* Profile 50. */
+            { 304, 319 }, /* Profile 51. */
+            { 288, 303 }, /* Profile 52. */
+            { 288, 303 }, /* Profile 53. */
+            { 304, 319 }, /* Profile 54. */
+            { 288, 303 }, /* Profile 55. */
+            { 304, 319 }, /* Profile 56. */
+            { 288, 303 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "NHOP_INDEX_1_15_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 256, 271 }, /* Profile 2. */
+            { 240, 255 }, /* Profile 3. */
+            { 256, 271 }, /* Profile 4. */
+            { 240, 255 }, /* Profile 5. */
+            { 240, 255 }, /* Profile 6. */
+            { 256, 271 }, /* Profile 7. */
+            { 240, 255 }, /* Profile 8. */
+            { 256, 271 }, /* Profile 9. */
+            { 240, 255 }, /* Profile 10. */
+            { 240, 255 }, /* Profile 11. */
+            { 256, 271 }, /* Profile 12. */
+            { 240, 255 }, /* Profile 13. */
+            { 256, 271 }, /* Profile 14. */
+            { 240, 255 }, /* Profile 15. */
+            { 256, 271 }, /* Profile 16. */
+            { 240, 255 }, /* Profile 17. */
+            { 256, 271 }, /* Profile 18. */
+            { 240, 255 }, /* Profile 19. */
+            { 240, 255 }, /* Profile 20. */
+            { 256, 271 }, /* Profile 21. */
+            { 240, 255 }, /* Profile 22. */
+            { 256, 271 }, /* Profile 23. */
+            { 240, 255 }, /* Profile 24. */
+            { 240, 255 }, /* Profile 25. */
+            { 256, 271 }, /* Profile 26. */
+            { 240, 255 }, /* Profile 27. */
+            { 256, 271 }, /* Profile 28. */
+            { 240, 255 }, /* Profile 29. */
+            { 272, 287 }, /* Profile 30. */
+            { 256, 271 }, /* Profile 31. */
+            { 272, 287 }, /* Profile 32. */
+            { 256, 271 }, /* Profile 33. */
+            { 256, 271 }, /* Profile 34. */
+            { 272, 287 }, /* Profile 35. */
+            { 256, 271 }, /* Profile 36. */
+            { 272, 287 }, /* Profile 37. */
+            { 256, 271 }, /* Profile 38. */
+            { 256, 271 }, /* Profile 39. */
+            { 272, 287 }, /* Profile 40. */
+            { 256, 271 }, /* Profile 41. */
+            { 272, 287 }, /* Profile 42. */
+            { 256, 271 }, /* Profile 43. */
+            { 272, 287 }, /* Profile 44. */
+            { 256, 271 }, /* Profile 45. */
+            { 272, 287 }, /* Profile 46. */
+            { 256, 271 }, /* Profile 47. */
+            { 256, 271 }, /* Profile 48. */
+            { 272, 287 }, /* Profile 49. */
+            { 256, 271 }, /* Profile 50. */
+            { 272, 287 }, /* Profile 51. */
+            { 256, 271 }, /* Profile 52. */
+            { 256, 271 }, /* Profile 53. */
+            { 272, 287 }, /* Profile 54. */
+            { 256, 271 }, /* Profile 55. */
+            { 272, 287 }, /* Profile 56. */
+            { 256, 271 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "PARSER_VHLEN_0_15_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 64, 79 }, /* Profile 2. */
+            { 64, 79 }, /* Profile 3. */
+            { 64, 79 }, /* Profile 4. */
+            { 64, 79 }, /* Profile 5. */
+            { 64, 79 }, /* Profile 6. */
+            { 64, 79 }, /* Profile 7. */
+            { 64, 79 }, /* Profile 8. */
+            { 64, 79 }, /* Profile 9. */
+            { 64, 79 }, /* Profile 10. */
+            { 64, 79 }, /* Profile 11. */
+            { 64, 79 }, /* Profile 12. */
+            { 64, 79 }, /* Profile 13. */
+            { 64, 79 }, /* Profile 14. */
+            { 64, 79 }, /* Profile 15. */
+            { 64, 79 }, /* Profile 16. */
+            { 64, 79 }, /* Profile 17. */
+            { 64, 79 }, /* Profile 18. */
+            { 64, 79 }, /* Profile 19. */
+            { 64, 79 }, /* Profile 20. */
+            { 64, 79 }, /* Profile 21. */
+            { 64, 79 }, /* Profile 22. */
+            { 64, 79 }, /* Profile 23. */
+            { 64, 79 }, /* Profile 24. */
+            { 64, 79 }, /* Profile 25. */
+            { 64, 79 }, /* Profile 26. */
+            { 64, 79 }, /* Profile 27. */
+            { 64, 79 }, /* Profile 28. */
+            { 64, 79 }, /* Profile 29. */
+            { 64, 79 }, /* Profile 30. */
+            { 64, 79 }, /* Profile 31. */
+            { 64, 79 }, /* Profile 32. */
+            { 64, 79 }, /* Profile 33. */
+            { 64, 79 }, /* Profile 34. */
+            { 64, 79 }, /* Profile 35. */
+            { 64, 79 }, /* Profile 36. */
+            { 64, 79 }, /* Profile 37. */
+            { 64, 79 }, /* Profile 38. */
+            { 64, 79 }, /* Profile 39. */
+            { 64, 79 }, /* Profile 40. */
+            { 64, 79 }, /* Profile 41. */
+            { 64, 79 }, /* Profile 42. */
+            { 64, 79 }, /* Profile 43. */
+            { 64, 79 }, /* Profile 44. */
+            { 64, 79 }, /* Profile 45. */
+            { 64, 79 }, /* Profile 46. */
+            { 64, 79 }, /* Profile 47. */
+            { 64, 79 }, /* Profile 48. */
+            { 64, 79 }, /* Profile 49. */
+            { 64, 79 }, /* Profile 50. */
+            { 64, 79 }, /* Profile 51. */
+            { 64, 79 }, /* Profile 52. */
+            { 64, 79 }, /* Profile 53. */
+            { 64, 79 }, /* Profile 54. */
+            { 64, 79 }, /* Profile 55. */
+            { 64, 79 }, /* Profile 56. */
+            { 64, 79 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "PKT_MISC_CTRL_0_3_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 376, 379 }, /* Profile 2. */
+            { 360, 363 }, /* Profile 3. */
+            { 380, 383 }, /* Profile 4. */
+            { 376, 379 }, /* Profile 5. */
+            { 376, 379 }, /* Profile 6. */
+            { 376, 379 }, /* Profile 7. */
+            { 360, 363 }, /* Profile 8. */
+            { 380, 383 }, /* Profile 9. */
+            { 376, 379 }, /* Profile 10. */
+            { 376, 379 }, /* Profile 11. */
+            { 372, 375 }, /* Profile 12. */
+            { 356, 359 }, /* Profile 13. */
+            { 376, 379 }, /* Profile 14. */
+            { 372, 375 }, /* Profile 15. */
+            { 376, 379 }, /* Profile 16. */
+            { 360, 363 }, /* Profile 17. */
+            { 380, 383 }, /* Profile 18. */
+            { 376, 379 }, /* Profile 19. */
+            { 376, 379 }, /* Profile 20. */
+            { 376, 379 }, /* Profile 21. */
+            { 360, 363 }, /* Profile 22. */
+            { 380, 383 }, /* Profile 23. */
+            { 376, 379 }, /* Profile 24. */
+            { 376, 379 }, /* Profile 25. */
+            { 372, 375 }, /* Profile 26. */
+            { 356, 359 }, /* Profile 27. */
+            { 376, 379 }, /* Profile 28. */
+            { 372, 375 }, /* Profile 29. */
+            { 376, 379 }, /* Profile 30. */
+            { 360, 363 }, /* Profile 31. */
+            { 380, 383 }, /* Profile 32. */
+            { 376, 379 }, /* Profile 33. */
+            { 376, 379 }, /* Profile 34. */
+            { 376, 379 }, /* Profile 35. */
+            { 360, 363 }, /* Profile 36. */
+            { 380, 383 }, /* Profile 37. */
+            { 376, 379 }, /* Profile 38. */
+            { 376, 379 }, /* Profile 39. */
+            { 372, 375 }, /* Profile 40. */
+            { 356, 359 }, /* Profile 41. */
+            { 376, 379 }, /* Profile 42. */
+            { 372, 375 }, /* Profile 43. */
+            { 376, 379 }, /* Profile 44. */
+            { 360, 363 }, /* Profile 45. */
+            { 380, 383 }, /* Profile 46. */
+            { 376, 379 }, /* Profile 47. */
+            { 376, 379 }, /* Profile 48. */
+            { 376, 379 }, /* Profile 49. */
+            { 360, 363 }, /* Profile 50. */
+            { 380, 383 }, /* Profile 51. */
+            { 376, 379 }, /* Profile 52. */
+            { 376, 379 }, /* Profile 53. */
+            { 372, 375 }, /* Profile 54. */
+            { 356, 359 }, /* Profile 55. */
+            { 376, 379 }, /* Profile 56. */
+            { 372, 375 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "SRV6_DIP_EDIT_CTRL_3_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SRV6_DIP_EDIT_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { 384, 387 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { 384, 387 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { 380, 383 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { 384, 387 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { 384, 387 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { 380, 383 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { 384, 387 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { -1, -1 }, /* Profile 33. */
+            { -1, -1 }, /* Profile 34. */
+            { -1, -1 }, /* Profile 35. */
+            { 384, 387 }, /* Profile 36. */
+            { -1, -1 }, /* Profile 37. */
+            { -1, -1 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { -1, -1 }, /* Profile 40. */
+            { 380, 383 }, /* Profile 41. */
+            { -1, -1 }, /* Profile 42. */
+            { -1, -1 }, /* Profile 43. */
+            { -1, -1 }, /* Profile 44. */
+            { 384, 387 }, /* Profile 45. */
+            { -1, -1 }, /* Profile 46. */
+            { -1, -1 }, /* Profile 47. */
+            { -1, -1 }, /* Profile 48. */
+            { -1, -1 }, /* Profile 49. */
+            { 384, 387 }, /* Profile 50. */
+            { -1, -1 }, /* Profile 51. */
+            { -1, -1 }, /* Profile 52. */
+            { -1, -1 }, /* Profile 53. */
+            { -1, -1 }, /* Profile 54. */
+            { 380, 383 }, /* Profile 55. */
+        },
+        .profile_cnt = 56,
+    },
+    {
+        .name = "SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { 416, 419 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { 416, 419 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { 412, 415 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { 416, 419 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { 416, 419 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { 412, 415 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { 416, 419 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { -1, -1 }, /* Profile 33. */
+            { -1, -1 }, /* Profile 34. */
+            { -1, -1 }, /* Profile 35. */
+            { 416, 419 }, /* Profile 36. */
+            { -1, -1 }, /* Profile 37. */
+            { -1, -1 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { -1, -1 }, /* Profile 40. */
+            { 412, 415 }, /* Profile 41. */
+            { -1, -1 }, /* Profile 42. */
+            { -1, -1 }, /* Profile 43. */
+            { -1, -1 }, /* Profile 44. */
+            { 416, 419 }, /* Profile 45. */
+            { -1, -1 }, /* Profile 46. */
+            { -1, -1 }, /* Profile 47. */
+            { -1, -1 }, /* Profile 48. */
+            { -1, -1 }, /* Profile 49. */
+            { 416, 419 }, /* Profile 50. */
+            { -1, -1 }, /* Profile 51. */
+            { -1, -1 }, /* Profile 52. */
+            { -1, -1 }, /* Profile 53. */
+            { -1, -1 }, /* Profile 54. */
+            { 412, 415 }, /* Profile 55. */
+        },
+        .profile_cnt = 56,
+    },
+    {
+        .name = "SRV6_NEW_GSID_SI_2_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { 372, 374 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { 372, 374 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { 368, 370 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { 372, 374 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { 372, 374 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { 368, 370 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { 372, 374 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { -1, -1 }, /* Profile 33. */
+            { -1, -1 }, /* Profile 34. */
+            { -1, -1 }, /* Profile 35. */
+            { 372, 374 }, /* Profile 36. */
+            { -1, -1 }, /* Profile 37. */
+            { -1, -1 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { -1, -1 }, /* Profile 40. */
+            { 368, 370 }, /* Profile 41. */
+            { -1, -1 }, /* Profile 42. */
+            { -1, -1 }, /* Profile 43. */
+            { -1, -1 }, /* Profile 44. */
+            { 372, 374 }, /* Profile 45. */
+            { -1, -1 }, /* Profile 46. */
+            { -1, -1 }, /* Profile 47. */
+            { -1, -1 }, /* Profile 48. */
+            { -1, -1 }, /* Profile 49. */
+            { 372, 374 }, /* Profile 50. */
+            { -1, -1 }, /* Profile 51. */
+            { -1, -1 }, /* Profile 52. */
+            { -1, -1 }, /* Profile 53. */
+            { -1, -1 }, /* Profile 54. */
+            { 368, 370 }, /* Profile 55. */
+        },
+        .profile_cnt = 56,
+    },
+    {
+        .name = "SRV6_SID_AND_PREFIX_LEN_ENC_3_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SRV6_SID_AND_PREFIX_LEN_ENC_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { 368, 371 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { 368, 371 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { 364, 367 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { 368, 371 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { 368, 371 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { 364, 367 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { 368, 371 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { -1, -1 }, /* Profile 33. */
+            { -1, -1 }, /* Profile 34. */
+            { -1, -1 }, /* Profile 35. */
+            { 368, 371 }, /* Profile 36. */
+            { -1, -1 }, /* Profile 37. */
+            { -1, -1 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { -1, -1 }, /* Profile 40. */
+            { 364, 367 }, /* Profile 41. */
+            { -1, -1 }, /* Profile 42. */
+            { -1, -1 }, /* Profile 43. */
+            { -1, -1 }, /* Profile 44. */
+            { 368, 371 }, /* Profile 45. */
+            { -1, -1 }, /* Profile 46. */
+            { -1, -1 }, /* Profile 47. */
+            { -1, -1 }, /* Profile 48. */
+            { -1, -1 }, /* Profile 49. */
+            { 368, 371 }, /* Profile 50. */
+            { -1, -1 }, /* Profile 51. */
+            { -1, -1 }, /* Profile 52. */
+            { -1, -1 }, /* Profile 53. */
+            { -1, -1 }, /* Profile 54. */
+            { 364, 367 }, /* Profile 55. */
+        },
+        .profile_cnt = 56,
+    },
+    {
+        .name = "SVP_15_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 240, 255 }, /* Profile 2. */
+            { 224, 239 }, /* Profile 3. */
+            { 240, 255 }, /* Profile 4. */
+            { 224, 239 }, /* Profile 5. */
+            { 224, 239 }, /* Profile 6. */
+            { 240, 255 }, /* Profile 7. */
+            { 224, 239 }, /* Profile 8. */
+            { 240, 255 }, /* Profile 9. */
+            { 224, 239 }, /* Profile 10. */
+            { 224, 239 }, /* Profile 11. */
+            { 240, 255 }, /* Profile 12. */
+            { 224, 239 }, /* Profile 13. */
+            { 240, 255 }, /* Profile 14. */
+            { 224, 239 }, /* Profile 15. */
+            { 240, 255 }, /* Profile 16. */
+            { 224, 239 }, /* Profile 17. */
+            { 240, 255 }, /* Profile 18. */
+            { 224, 239 }, /* Profile 19. */
+            { 224, 239 }, /* Profile 20. */
+            { 240, 255 }, /* Profile 21. */
+            { 224, 239 }, /* Profile 22. */
+            { 240, 255 }, /* Profile 23. */
+            { 224, 239 }, /* Profile 24. */
+            { 224, 239 }, /* Profile 25. */
+            { 240, 255 }, /* Profile 26. */
+            { 224, 239 }, /* Profile 27. */
+            { 240, 255 }, /* Profile 28. */
+            { 224, 239 }, /* Profile 29. */
+            { 256, 271 }, /* Profile 30. */
+            { 240, 255 }, /* Profile 31. */
+            { 256, 271 }, /* Profile 32. */
+            { 240, 255 }, /* Profile 33. */
+            { 240, 255 }, /* Profile 34. */
+            { 256, 271 }, /* Profile 35. */
+            { 240, 255 }, /* Profile 36. */
+            { 256, 271 }, /* Profile 37. */
+            { 240, 255 }, /* Profile 38. */
+            { 240, 255 }, /* Profile 39. */
+            { 256, 271 }, /* Profile 40. */
+            { 240, 255 }, /* Profile 41. */
+            { 256, 271 }, /* Profile 42. */
+            { 240, 255 }, /* Profile 43. */
+            { 256, 271 }, /* Profile 44. */
+            { 240, 255 }, /* Profile 45. */
+            { 256, 271 }, /* Profile 46. */
+            { 240, 255 }, /* Profile 47. */
+            { 240, 255 }, /* Profile 48. */
+            { 256, 271 }, /* Profile 49. */
+            { 240, 255 }, /* Profile 50. */
+            { 256, 271 }, /* Profile 51. */
+            { 240, 255 }, /* Profile 52. */
+            { 240, 255 }, /* Profile 53. */
+            { 256, 271 }, /* Profile 54. */
+            { 240, 255 }, /* Profile 55. */
+            { 256, 271 }, /* Profile 56. */
+            { 240, 255 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 384, 387 }, /* Profile 2. */
+            { 376, 379 }, /* Profile 3. */
+            { 388, 391 }, /* Profile 4. */
+            { 384, 387 }, /* Profile 5. */
+            { 384, 387 }, /* Profile 6. */
+            { 384, 387 }, /* Profile 7. */
+            { 376, 379 }, /* Profile 8. */
+            { 388, 391 }, /* Profile 9. */
+            { 384, 387 }, /* Profile 10. */
+            { 384, 387 }, /* Profile 11. */
+            { 380, 383 }, /* Profile 12. */
+            { 372, 375 }, /* Profile 13. */
+            { 384, 387 }, /* Profile 14. */
+            { 380, 383 }, /* Profile 15. */
+            { 384, 387 }, /* Profile 16. */
+            { 376, 379 }, /* Profile 17. */
+            { 388, 391 }, /* Profile 18. */
+            { 384, 387 }, /* Profile 19. */
+            { 384, 387 }, /* Profile 20. */
+            { 384, 387 }, /* Profile 21. */
+            { 376, 379 }, /* Profile 22. */
+            { 388, 391 }, /* Profile 23. */
+            { 384, 387 }, /* Profile 24. */
+            { 384, 387 }, /* Profile 25. */
+            { 380, 383 }, /* Profile 26. */
+            { 372, 375 }, /* Profile 27. */
+            { 384, 387 }, /* Profile 28. */
+            { 380, 383 }, /* Profile 29. */
+            { 384, 387 }, /* Profile 30. */
+            { 376, 379 }, /* Profile 31. */
+            { 388, 391 }, /* Profile 32. */
+            { 384, 387 }, /* Profile 33. */
+            { 384, 387 }, /* Profile 34. */
+            { 384, 387 }, /* Profile 35. */
+            { 376, 379 }, /* Profile 36. */
+            { 388, 391 }, /* Profile 37. */
+            { 384, 387 }, /* Profile 38. */
+            { 384, 387 }, /* Profile 39. */
+            { 380, 383 }, /* Profile 40. */
+            { 372, 375 }, /* Profile 41. */
+            { 384, 387 }, /* Profile 42. */
+            { 380, 383 }, /* Profile 43. */
+            { 384, 387 }, /* Profile 44. */
+            { 376, 379 }, /* Profile 45. */
+            { 388, 391 }, /* Profile 46. */
+            { 384, 387 }, /* Profile 47. */
+            { 384, 387 }, /* Profile 48. */
+            { 384, 387 }, /* Profile 49. */
+            { 376, 379 }, /* Profile 50. */
+            { 388, 391 }, /* Profile 51. */
+            { 384, 387 }, /* Profile 52. */
+            { 384, 387 }, /* Profile 53. */
+            { 380, 383 }, /* Profile 54. */
+            { 372, 375 }, /* Profile 55. */
+            { 384, 387 }, /* Profile 56. */
+            { 380, 383 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "SYSTEM_DESTINATION_15_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 80, 95 }, /* Profile 2. */
+            { 80, 95 }, /* Profile 3. */
+            { 80, 95 }, /* Profile 4. */
+            { 80, 95 }, /* Profile 5. */
+            { 80, 95 }, /* Profile 6. */
+            { 80, 95 }, /* Profile 7. */
+            { 80, 95 }, /* Profile 8. */
+            { 80, 95 }, /* Profile 9. */
+            { 80, 95 }, /* Profile 10. */
+            { 80, 95 }, /* Profile 11. */
+            { 80, 95 }, /* Profile 12. */
+            { 80, 95 }, /* Profile 13. */
+            { 80, 95 }, /* Profile 14. */
+            { 80, 95 }, /* Profile 15. */
+            { 80, 95 }, /* Profile 16. */
+            { 80, 95 }, /* Profile 17. */
+            { 80, 95 }, /* Profile 18. */
+            { 80, 95 }, /* Profile 19. */
+            { 80, 95 }, /* Profile 20. */
+            { 80, 95 }, /* Profile 21. */
+            { 80, 95 }, /* Profile 22. */
+            { 80, 95 }, /* Profile 23. */
+            { 80, 95 }, /* Profile 24. */
+            { 80, 95 }, /* Profile 25. */
+            { 80, 95 }, /* Profile 26. */
+            { 80, 95 }, /* Profile 27. */
+            { 80, 95 }, /* Profile 28. */
+            { 80, 95 }, /* Profile 29. */
+            { 80, 95 }, /* Profile 30. */
+            { 80, 95 }, /* Profile 31. */
+            { 80, 95 }, /* Profile 32. */
+            { 80, 95 }, /* Profile 33. */
+            { 80, 95 }, /* Profile 34. */
+            { 80, 95 }, /* Profile 35. */
+            { 80, 95 }, /* Profile 36. */
+            { 80, 95 }, /* Profile 37. */
+            { 80, 95 }, /* Profile 38. */
+            { 80, 95 }, /* Profile 39. */
+            { 80, 95 }, /* Profile 40. */
+            { 80, 95 }, /* Profile 41. */
+            { 80, 95 }, /* Profile 42. */
+            { 80, 95 }, /* Profile 43. */
+            { 80, 95 }, /* Profile 44. */
+            { 80, 95 }, /* Profile 45. */
+            { 80, 95 }, /* Profile 46. */
+            { 80, 95 }, /* Profile 47. */
+            { 80, 95 }, /* Profile 48. */
+            { 80, 95 }, /* Profile 49. */
+            { 80, 95 }, /* Profile 50. */
+            { 80, 95 }, /* Profile 51. */
+            { 80, 95 }, /* Profile 52. */
+            { 80, 95 }, /* Profile 53. */
+            { 80, 95 }, /* Profile 54. */
+            { 80, 95 }, /* Profile 55. */
+            { 80, 95 }, /* Profile 56. */
+            { 80, 95 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "SYSTEM_OPCODE_3_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 396, 399 }, /* Profile 2. */
+            { 388, 391 }, /* Profile 3. */
+            { 396, 399 }, /* Profile 4. */
+            { 392, 395 }, /* Profile 5. */
+            { 392, 395 }, /* Profile 6. */
+            { 396, 399 }, /* Profile 7. */
+            { 388, 391 }, /* Profile 8. */
+            { 396, 399 }, /* Profile 9. */
+            { 392, 395 }, /* Profile 10. */
+            { 392, 395 }, /* Profile 11. */
+            { 392, 395 }, /* Profile 12. */
+            { 384, 387 }, /* Profile 13. */
+            { 392, 395 }, /* Profile 14. */
+            { 388, 391 }, /* Profile 15. */
+            { 396, 399 }, /* Profile 16. */
+            { 388, 391 }, /* Profile 17. */
+            { 396, 399 }, /* Profile 18. */
+            { 392, 395 }, /* Profile 19. */
+            { 392, 395 }, /* Profile 20. */
+            { 396, 399 }, /* Profile 21. */
+            { 388, 391 }, /* Profile 22. */
+            { 396, 399 }, /* Profile 23. */
+            { 392, 395 }, /* Profile 24. */
+            { 392, 395 }, /* Profile 25. */
+            { 392, 395 }, /* Profile 26. */
+            { 384, 387 }, /* Profile 27. */
+            { 392, 395 }, /* Profile 28. */
+            { 388, 391 }, /* Profile 29. */
+            { 396, 399 }, /* Profile 30. */
+            { 388, 391 }, /* Profile 31. */
+            { 396, 399 }, /* Profile 32. */
+            { 392, 395 }, /* Profile 33. */
+            { 392, 395 }, /* Profile 34. */
+            { 396, 399 }, /* Profile 35. */
+            { 388, 391 }, /* Profile 36. */
+            { 396, 399 }, /* Profile 37. */
+            { 392, 395 }, /* Profile 38. */
+            { 392, 395 }, /* Profile 39. */
+            { 392, 395 }, /* Profile 40. */
+            { 384, 387 }, /* Profile 41. */
+            { 392, 395 }, /* Profile 42. */
+            { 388, 391 }, /* Profile 43. */
+            { 396, 399 }, /* Profile 44. */
+            { 388, 391 }, /* Profile 45. */
+            { 396, 399 }, /* Profile 46. */
+            { 392, 395 }, /* Profile 47. */
+            { 392, 395 }, /* Profile 48. */
+            { 396, 399 }, /* Profile 49. */
+            { 388, 391 }, /* Profile 50. */
+            { 396, 399 }, /* Profile 51. */
+            { 392, 395 }, /* Profile 52. */
+            { 392, 395 }, /* Profile 53. */
+            { 392, 395 }, /* Profile 54. */
+            { 384, 387 }, /* Profile 55. */
+            { 392, 395 }, /* Profile 56. */
+            { 388, 391 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "SYSTEM_SOURCE_15_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 96, 111 }, /* Profile 2. */
+            { 96, 111 }, /* Profile 3. */
+            { 96, 111 }, /* Profile 4. */
+            { 96, 111 }, /* Profile 5. */
+            { 96, 111 }, /* Profile 6. */
+            { 96, 111 }, /* Profile 7. */
+            { 96, 111 }, /* Profile 8. */
+            { 96, 111 }, /* Profile 9. */
+            { 96, 111 }, /* Profile 10. */
+            { 96, 111 }, /* Profile 11. */
+            { 96, 111 }, /* Profile 12. */
+            { 96, 111 }, /* Profile 13. */
+            { 96, 111 }, /* Profile 14. */
+            { 96, 111 }, /* Profile 15. */
+            { 96, 111 }, /* Profile 16. */
+            { 96, 111 }, /* Profile 17. */
+            { 96, 111 }, /* Profile 18. */
+            { 96, 111 }, /* Profile 19. */
+            { 96, 111 }, /* Profile 20. */
+            { 96, 111 }, /* Profile 21. */
+            { 96, 111 }, /* Profile 22. */
+            { 96, 111 }, /* Profile 23. */
+            { 96, 111 }, /* Profile 24. */
+            { 96, 111 }, /* Profile 25. */
+            { 96, 111 }, /* Profile 26. */
+            { 96, 111 }, /* Profile 27. */
+            { 96, 111 }, /* Profile 28. */
+            { 96, 111 }, /* Profile 29. */
+            { 96, 111 }, /* Profile 30. */
+            { 96, 111 }, /* Profile 31. */
+            { 96, 111 }, /* Profile 32. */
+            { 96, 111 }, /* Profile 33. */
+            { 96, 111 }, /* Profile 34. */
+            { 96, 111 }, /* Profile 35. */
+            { 96, 111 }, /* Profile 36. */
+            { 96, 111 }, /* Profile 37. */
+            { 96, 111 }, /* Profile 38. */
+            { 96, 111 }, /* Profile 39. */
+            { 96, 111 }, /* Profile 40. */
+            { 96, 111 }, /* Profile 41. */
+            { 96, 111 }, /* Profile 42. */
+            { 96, 111 }, /* Profile 43. */
+            { 96, 111 }, /* Profile 44. */
+            { 96, 111 }, /* Profile 45. */
+            { 96, 111 }, /* Profile 46. */
+            { 96, 111 }, /* Profile 47. */
+            { 96, 111 }, /* Profile 48. */
+            { 96, 111 }, /* Profile 49. */
+            { 96, 111 }, /* Profile 50. */
+            { 96, 111 }, /* Profile 51. */
+            { 96, 111 }, /* Profile 52. */
+            { 96, 111 }, /* Profile 53. */
+            { 96, 111 }, /* Profile 54. */
+            { 96, 111 }, /* Profile 55. */
+            { 96, 111 }, /* Profile 56. */
+            { 96, 111 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "TIMESTAMP_CTRL_3_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { 412, 415 }, /* Profile 5. */
+            { 412, 415 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { 412, 415 }, /* Profile 10. */
+            { 412, 415 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { 408, 411 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { 412, 415 }, /* Profile 19. */
+            { 412, 415 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { 412, 415 }, /* Profile 24. */
+            { 412, 415 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { 408, 411 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { 412, 415 }, /* Profile 33. */
+            { 412, 415 }, /* Profile 34. */
+            { -1, -1 }, /* Profile 35. */
+            { -1, -1 }, /* Profile 36. */
+            { -1, -1 }, /* Profile 37. */
+            { 412, 415 }, /* Profile 38. */
+            { 412, 415 }, /* Profile 39. */
+            { -1, -1 }, /* Profile 40. */
+            { -1, -1 }, /* Profile 41. */
+            { -1, -1 }, /* Profile 42. */
+            { 408, 411 }, /* Profile 43. */
+            { -1, -1 }, /* Profile 44. */
+            { -1, -1 }, /* Profile 45. */
+            { -1, -1 }, /* Profile 46. */
+            { 412, 415 }, /* Profile 47. */
+            { 412, 415 }, /* Profile 48. */
+            { -1, -1 }, /* Profile 49. */
+            { -1, -1 }, /* Profile 50. */
+            { -1, -1 }, /* Profile 51. */
+            { 412, 415 }, /* Profile 52. */
+            { 412, 415 }, /* Profile 53. */
+            { -1, -1 }, /* Profile 54. */
+            { -1, -1 }, /* Profile 55. */
+            { -1, -1 }, /* Profile 56. */
+            { 408, 411 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 412, 415 }, /* Profile 2. */
+            { 404, 407 }, /* Profile 3. */
+            { 412, 415 }, /* Profile 4. */
+            { 408, 411 }, /* Profile 5. */
+            { 408, 411 }, /* Profile 6. */
+            { 412, 415 }, /* Profile 7. */
+            { 404, 407 }, /* Profile 8. */
+            { 412, 415 }, /* Profile 9. */
+            { 408, 411 }, /* Profile 10. */
+            { 408, 411 }, /* Profile 11. */
+            { 408, 411 }, /* Profile 12. */
+            { 400, 403 }, /* Profile 13. */
+            { 408, 411 }, /* Profile 14. */
+            { 404, 407 }, /* Profile 15. */
+            { 412, 415 }, /* Profile 16. */
+            { 404, 407 }, /* Profile 17. */
+            { 412, 415 }, /* Profile 18. */
+            { 408, 411 }, /* Profile 19. */
+            { 408, 411 }, /* Profile 20. */
+            { 412, 415 }, /* Profile 21. */
+            { 404, 407 }, /* Profile 22. */
+            { 412, 415 }, /* Profile 23. */
+            { 408, 411 }, /* Profile 24. */
+            { 408, 411 }, /* Profile 25. */
+            { 408, 411 }, /* Profile 26. */
+            { 400, 403 }, /* Profile 27. */
+            { 408, 411 }, /* Profile 28. */
+            { 404, 407 }, /* Profile 29. */
+            { 412, 415 }, /* Profile 30. */
+            { 404, 407 }, /* Profile 31. */
+            { 412, 415 }, /* Profile 32. */
+            { 408, 411 }, /* Profile 33. */
+            { 408, 411 }, /* Profile 34. */
+            { 412, 415 }, /* Profile 35. */
+            { 404, 407 }, /* Profile 36. */
+            { 412, 415 }, /* Profile 37. */
+            { 408, 411 }, /* Profile 38. */
+            { 408, 411 }, /* Profile 39. */
+            { 408, 411 }, /* Profile 40. */
+            { 400, 403 }, /* Profile 41. */
+            { 408, 411 }, /* Profile 42. */
+            { 404, 407 }, /* Profile 43. */
+            { 412, 415 }, /* Profile 44. */
+            { 404, 407 }, /* Profile 45. */
+            { 412, 415 }, /* Profile 46. */
+            { 408, 411 }, /* Profile 47. */
+            { 408, 411 }, /* Profile 48. */
+            { 412, 415 }, /* Profile 49. */
+            { 404, 407 }, /* Profile 50. */
+            { 412, 415 }, /* Profile 51. */
+            { 408, 411 }, /* Profile 52. */
+            { 408, 411 }, /* Profile 53. */
+            { 408, 411 }, /* Profile 54. */
+            { 400, 403 }, /* Profile 55. */
+            { 408, 411 }, /* Profile 56. */
+            { 404, 407 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "VFI_15_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 112, 127 }, /* Profile 2. */
+            { 112, 127 }, /* Profile 3. */
+            { 112, 127 }, /* Profile 4. */
+            { 112, 127 }, /* Profile 5. */
+            { 112, 127 }, /* Profile 6. */
+            { 112, 127 }, /* Profile 7. */
+            { 112, 127 }, /* Profile 8. */
+            { 112, 127 }, /* Profile 9. */
+            { 112, 127 }, /* Profile 10. */
+            { 112, 127 }, /* Profile 11. */
+            { 112, 127 }, /* Profile 12. */
+            { 112, 127 }, /* Profile 13. */
+            { 112, 127 }, /* Profile 14. */
+            { 112, 127 }, /* Profile 15. */
+            { 112, 127 }, /* Profile 16. */
+            { 112, 127 }, /* Profile 17. */
+            { 112, 127 }, /* Profile 18. */
+            { 112, 127 }, /* Profile 19. */
+            { 112, 127 }, /* Profile 20. */
+            { 112, 127 }, /* Profile 21. */
+            { 112, 127 }, /* Profile 22. */
+            { 112, 127 }, /* Profile 23. */
+            { 112, 127 }, /* Profile 24. */
+            { 112, 127 }, /* Profile 25. */
+            { 112, 127 }, /* Profile 26. */
+            { 112, 127 }, /* Profile 27. */
+            { 112, 127 }, /* Profile 28. */
+            { 112, 127 }, /* Profile 29. */
+            { 112, 127 }, /* Profile 30. */
+            { 112, 127 }, /* Profile 31. */
+            { 112, 127 }, /* Profile 32. */
+            { 112, 127 }, /* Profile 33. */
+            { 112, 127 }, /* Profile 34. */
+            { 112, 127 }, /* Profile 35. */
+            { 112, 127 }, /* Profile 36. */
+            { 112, 127 }, /* Profile 37. */
+            { 112, 127 }, /* Profile 38. */
+            { 112, 127 }, /* Profile 39. */
+            { 112, 127 }, /* Profile 40. */
+            { 112, 127 }, /* Profile 41. */
+            { 112, 127 }, /* Profile 42. */
+            { 112, 127 }, /* Profile 43. */
+            { 112, 127 }, /* Profile 44. */
+            { 112, 127 }, /* Profile 45. */
+            { 112, 127 }, /* Profile 46. */
+            { 112, 127 }, /* Profile 47. */
+            { 112, 127 }, /* Profile 48. */
+            { 112, 127 }, /* Profile 49. */
+            { 112, 127 }, /* Profile 50. */
+            { 112, 127 }, /* Profile 51. */
+            { 112, 127 }, /* Profile 52. */
+            { 112, 127 }, /* Profile 53. */
+            { 112, 127 }, /* Profile 54. */
+            { 112, 127 }, /* Profile 55. */
+            { 112, 127 }, /* Profile 56. */
+            { 112, 127 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0",
+        .fid = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 380, 383 }, /* Profile 2. */
+            { 364, 367 }, /* Profile 3. */
+            { 384, 387 }, /* Profile 4. */
+            { 380, 383 }, /* Profile 5. */
+            { 380, 383 }, /* Profile 6. */
+            { 380, 383 }, /* Profile 7. */
+            { 364, 367 }, /* Profile 8. */
+            { 384, 387 }, /* Profile 9. */
+            { 380, 383 }, /* Profile 10. */
+            { 380, 383 }, /* Profile 11. */
+            { 376, 379 }, /* Profile 12. */
+            { 360, 363 }, /* Profile 13. */
+            { 380, 383 }, /* Profile 14. */
+            { 376, 379 }, /* Profile 15. */
+            { 380, 383 }, /* Profile 16. */
+            { 364, 367 }, /* Profile 17. */
+            { 384, 387 }, /* Profile 18. */
+            { 380, 383 }, /* Profile 19. */
+            { 380, 383 }, /* Profile 20. */
+            { 380, 383 }, /* Profile 21. */
+            { 364, 367 }, /* Profile 22. */
+            { 384, 387 }, /* Profile 23. */
+            { 380, 383 }, /* Profile 24. */
+            { 380, 383 }, /* Profile 25. */
+            { 376, 379 }, /* Profile 26. */
+            { 360, 363 }, /* Profile 27. */
+            { 380, 383 }, /* Profile 28. */
+            { 376, 379 }, /* Profile 29. */
+            { 380, 383 }, /* Profile 30. */
+            { 364, 367 }, /* Profile 31. */
+            { 384, 387 }, /* Profile 32. */
+            { 380, 383 }, /* Profile 33. */
+            { 380, 383 }, /* Profile 34. */
+            { 380, 383 }, /* Profile 35. */
+            { 364, 367 }, /* Profile 36. */
+            { 384, 387 }, /* Profile 37. */
+            { 380, 383 }, /* Profile 38. */
+            { 380, 383 }, /* Profile 39. */
+            { 376, 379 }, /* Profile 40. */
+            { 360, 363 }, /* Profile 41. */
+            { 380, 383 }, /* Profile 42. */
+            { 376, 379 }, /* Profile 43. */
+            { 380, 383 }, /* Profile 44. */
+            { 364, 367 }, /* Profile 45. */
+            { 384, 387 }, /* Profile 46. */
+            { 380, 383 }, /* Profile 47. */
+            { 380, 383 }, /* Profile 48. */
+            { 380, 383 }, /* Profile 49. */
+            { 364, 367 }, /* Profile 50. */
+            { 384, 387 }, /* Profile 51. */
+            { 380, 383 }, /* Profile 52. */
+            { 380, 383 }, /* Profile 53. */
+            { 376, 379 }, /* Profile 54. */
+            { 360, 363 }, /* Profile 55. */
+            { 380, 383 }, /* Profile 56. */
+            { 376, 379 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+};static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_field_data,
+};
+
+static shr_enum_map_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reason_names[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_reasons_info_t bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reason_names,
+    .reason_encode = bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reason_encode,
+    .reason_decode = bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reason_decode,
+};
+
+
+static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_arp_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_get,
+    bcmpkt_arp_t_hardware_type_get,
+    bcmpkt_arp_t_operation_get,
+    bcmpkt_arp_t_prot_addr_len_get,
+    bcmpkt_arp_t_protocol_type_get,
+    bcmpkt_arp_t_sender_ha_get,
+    bcmpkt_arp_t_sender_ip_get,
+    bcmpkt_arp_t_target_ha_get,
+    bcmpkt_arp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_arp_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_set,
+    bcmpkt_arp_t_hardware_type_set,
+    bcmpkt_arp_t_operation_set,
+    bcmpkt_arp_t_prot_addr_len_set,
+    bcmpkt_arp_t_protocol_type_set,
+    bcmpkt_arp_t_sender_ha_set,
+    bcmpkt_arp_t_sender_ip_set,
+    bcmpkt_arp_t_target_ha_set,
+    bcmpkt_arp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_arp_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_arp_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_arp_t_field_data,
+};
+
+
+static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_authen_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_get,
+    bcmpkt_authen_t_next_header_get,
+    bcmpkt_authen_t_payload_len_get,
+    bcmpkt_authen_t_reserved_get,
+    bcmpkt_authen_t_seq_num_get,
+    bcmpkt_authen_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_authen_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_set,
+    bcmpkt_authen_t_next_header_set,
+    bcmpkt_authen_t_payload_len_set,
+    bcmpkt_authen_t_reserved_set,
+    bcmpkt_authen_t_seq_num_set,
+    bcmpkt_authen_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_authen_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_authen_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_AUTHEN_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_authen_t_field_data,
+};
+
+
+static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 5);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 5, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 21, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 21, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_bfd_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_get,
+    bcmpkt_bfd_t_bfd_length_get,
+    bcmpkt_bfd_t_cpi_get,
+    bcmpkt_bfd_t_dem_get,
+    bcmpkt_bfd_t_desmintxintv_get,
+    bcmpkt_bfd_t_detectmult_get,
+    bcmpkt_bfd_t_diag_get,
+    bcmpkt_bfd_t_fin_get,
+    bcmpkt_bfd_t_minechorxintv_get,
+    bcmpkt_bfd_t_mpt_get,
+    bcmpkt_bfd_t_mydiscrim_get,
+    bcmpkt_bfd_t_poll_get,
+    bcmpkt_bfd_t_reqminrxintv_get,
+    bcmpkt_bfd_t_sta_get,
+    bcmpkt_bfd_t_urdiscrim_get,
+    bcmpkt_bfd_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_bfd_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_set,
+    bcmpkt_bfd_t_bfd_length_set,
+    bcmpkt_bfd_t_cpi_set,
+    bcmpkt_bfd_t_dem_set,
+    bcmpkt_bfd_t_desmintxintv_set,
+    bcmpkt_bfd_t_detectmult_set,
+    bcmpkt_bfd_t_diag_set,
+    bcmpkt_bfd_t_fin_set,
+    bcmpkt_bfd_t_minechorxintv_set,
+    bcmpkt_bfd_t_mpt_set,
+    bcmpkt_bfd_t_mydiscrim_set,
+    bcmpkt_bfd_t_poll_set,
+    bcmpkt_bfd_t_reqminrxintv_set,
+    bcmpkt_bfd_t_sta_set,
+    bcmpkt_bfd_t_urdiscrim_set,
+    bcmpkt_bfd_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_bfd_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_bfd_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_BFD_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_bfd_t_field_data,
+};
+
+
+static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_cntag_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_get,
+    bcmpkt_cntag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_cntag_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_set,
+    bcmpkt_cntag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_cntag_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_cntag_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CNTAG_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_cntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_get,
+    bcmpkt_cpu_composites_0_t_dma_cont1_get,
+    bcmpkt_cpu_composites_0_t_dma_cont2_get,
+    bcmpkt_cpu_composites_0_t_dma_cont3_get,
+    bcmpkt_cpu_composites_0_t_dma_cont4_get,
+    bcmpkt_cpu_composites_0_t_dma_cont5_get,
+    bcmpkt_cpu_composites_0_t_dma_cont6_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_set,
+    bcmpkt_cpu_composites_0_t_dma_cont1_set,
+    bcmpkt_cpu_composites_0_t_dma_cont2_set,
+    bcmpkt_cpu_composites_0_t_dma_cont3_set,
+    bcmpkt_cpu_composites_0_t_dma_cont4_set,
+    bcmpkt_cpu_composites_0_t_dma_cont5_set,
+    bcmpkt_cpu_composites_0_t_dma_cont6_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_get,
+    bcmpkt_cpu_composites_1_t_dma_cont11_get,
+    bcmpkt_cpu_composites_1_t_dma_cont12_get,
+    bcmpkt_cpu_composites_1_t_dma_cont13_get,
+    bcmpkt_cpu_composites_1_t_dma_cont14_get,
+    bcmpkt_cpu_composites_1_t_dma_cont15_get,
+    bcmpkt_cpu_composites_1_t_dma_cont16_get,
+    bcmpkt_cpu_composites_1_t_dma_cont17_get,
+    bcmpkt_cpu_composites_1_t_dma_cont7_get,
+    bcmpkt_cpu_composites_1_t_dma_cont8_get,
+    bcmpkt_cpu_composites_1_t_dma_cont9_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_set,
+    bcmpkt_cpu_composites_1_t_dma_cont11_set,
+    bcmpkt_cpu_composites_1_t_dma_cont12_set,
+    bcmpkt_cpu_composites_1_t_dma_cont13_set,
+    bcmpkt_cpu_composites_1_t_dma_cont14_set,
+    bcmpkt_cpu_composites_1_t_dma_cont15_set,
+    bcmpkt_cpu_composites_1_t_dma_cont16_set,
+    bcmpkt_cpu_composites_1_t_dma_cont17_set,
+    bcmpkt_cpu_composites_1_t_dma_cont7_set,
+    bcmpkt_cpu_composites_1_t_dma_cont8_set,
+    bcmpkt_cpu_composites_1_t_dma_cont9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_dcn_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_reserved4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dcn_t_reserved4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_dcn_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FID_COUNT] = {
+    bcmpkt_dcn_t_flags_get,
+    bcmpkt_dcn_t_next_protocol_get,
+    bcmpkt_dcn_t_reserved0_get,
+    bcmpkt_dcn_t_reserved1_get,
+    bcmpkt_dcn_t_reserved2_get,
+    bcmpkt_dcn_t_reserved3_get,
+    bcmpkt_dcn_t_reserved4_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_dcn_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FID_COUNT] = {
+    bcmpkt_dcn_t_flags_set,
+    bcmpkt_dcn_t_next_protocol_set,
+    bcmpkt_dcn_t_reserved0_set,
+    bcmpkt_dcn_t_reserved1_set,
+    bcmpkt_dcn_t_reserved2_set,
+    bcmpkt_dcn_t_reserved3_set,
+    bcmpkt_dcn_t_reserved4_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_dcn_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_dcn_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DCN_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_dcn_t_field_data,
+};
+
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_dest_option_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_get,
+    bcmpkt_dest_option_t_next_header_get,
+    bcmpkt_dest_option_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_dest_option_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_set,
+    bcmpkt_dest_option_t_next_header_set,
+    bcmpkt_dest_option_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_dest_option_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_dest_option_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_DEST_OPTION_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_dest_option_t_field_data,
+};
+
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_get,
+    bcmpkt_ep_nih_header_t_header_type_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_get,
+    bcmpkt_ep_nih_header_t_opaque_object_a_get,
+    bcmpkt_ep_nih_header_t_opaque_object_b_get,
+    bcmpkt_ep_nih_header_t_opaque_object_c_get,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_get,
+    bcmpkt_ep_nih_header_t_reserved_0_get,
+    bcmpkt_ep_nih_header_t_start_get,
+    bcmpkt_ep_nih_header_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_set,
+    bcmpkt_ep_nih_header_t_header_type_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_set,
+    bcmpkt_ep_nih_header_t_opaque_object_a_set,
+    bcmpkt_ep_nih_header_t_opaque_object_b_set,
+    bcmpkt_ep_nih_header_t_opaque_object_c_set,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_set,
+    bcmpkt_ep_nih_header_t_reserved_0_set,
+    bcmpkt_ep_nih_header_t_start_set,
+    bcmpkt_ep_nih_header_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 11, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 11, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 10, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 10, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_get,
+    bcmpkt_erspan3_fixed_hdr_t_cos_get,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
+    bcmpkt_erspan3_fixed_hdr_t_t_get,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
+    bcmpkt_erspan3_fixed_hdr_t_ver_get,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_set,
+    bcmpkt_erspan3_fixed_hdr_t_cos_set,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
+    bcmpkt_erspan3_fixed_hdr_t_t_set,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
+    bcmpkt_erspan3_fixed_hdr_t_ver_set,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
+    bcmpkt_erspan3_subhdr_5_t_port_id_get,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
+    bcmpkt_erspan3_subhdr_5_t_port_id_set,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_field_data,
+};
+
+
+static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_esp_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_get,
+    bcmpkt_esp_t_pad_get,
+    bcmpkt_esp_t_pad_len_get,
+    bcmpkt_esp_t_seq_num_get,
+    bcmpkt_esp_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_esp_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_set,
+    bcmpkt_esp_t_pad_set,
+    bcmpkt_esp_t_pad_len_set,
+    bcmpkt_esp_t_seq_num_set,
+    bcmpkt_esp_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_esp_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_esp_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ESP_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_esp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ethertype_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ethertype_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ethertype_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ethertype_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_ethertype_t_field_data,
+};
+
+
+static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_frag_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_get,
+    bcmpkt_frag_t_id_get,
+    bcmpkt_frag_t_next_header_get,
+    bcmpkt_frag_t_reserved_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_frag_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_set,
+    bcmpkt_frag_t_id_set,
+    bcmpkt_frag_t_next_header_set,
+    bcmpkt_frag_t_reserved_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_frag_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_frag_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FRAG_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_frag_t_field_data,
+};
+
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = {
+    bcmpkt_gbp_ethernet_shim_t_ethertype_get,
+    bcmpkt_gbp_ethernet_shim_t_flags_get,
+    bcmpkt_gbp_ethernet_shim_t_reserved_get,
+    bcmpkt_gbp_ethernet_shim_t_sid_get,
+    bcmpkt_gbp_ethernet_shim_t_subtype_get,
+    bcmpkt_gbp_ethernet_shim_t_ver_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = {
+    bcmpkt_gbp_ethernet_shim_t_ethertype_set,
+    bcmpkt_gbp_ethernet_shim_t_flags_set,
+    bcmpkt_gbp_ethernet_shim_t_reserved_set,
+    bcmpkt_gbp_ethernet_shim_t_sid_set,
+    bcmpkt_gbp_ethernet_shim_t_subtype_set,
+    bcmpkt_gbp_ethernet_shim_t_ver_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_field_data,
+};
+
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 4, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 4, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_src_subport_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_src_subport_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_get,
+    bcmpkt_generic_loopback_t_destination_type_get,
+    bcmpkt_generic_loopback_t_entropy_obj_get,
+    bcmpkt_generic_loopback_t_flags_get,
+    bcmpkt_generic_loopback_t_header_type_get,
+    bcmpkt_generic_loopback_t_input_priority_get,
+    bcmpkt_generic_loopback_t_interface_ctrl_get,
+    bcmpkt_generic_loopback_t_interface_obj_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
+    bcmpkt_generic_loopback_t_qos_obj_get,
+    bcmpkt_generic_loopback_t_reserved_1_get,
+    bcmpkt_generic_loopback_t_source_system_port_get,
+    bcmpkt_generic_loopback_t_src_subport_num_get,
+    bcmpkt_generic_loopback_t_start_byte_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_set,
+    bcmpkt_generic_loopback_t_destination_type_set,
+    bcmpkt_generic_loopback_t_entropy_obj_set,
+    bcmpkt_generic_loopback_t_flags_set,
+    bcmpkt_generic_loopback_t_header_type_set,
+    bcmpkt_generic_loopback_t_input_priority_set,
+    bcmpkt_generic_loopback_t_interface_ctrl_set,
+    bcmpkt_generic_loopback_t_interface_obj_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
+    bcmpkt_generic_loopback_t_qos_obj_set,
+    bcmpkt_generic_loopback_t_reserved_1_set,
+    bcmpkt_generic_loopback_t_source_system_port_set,
+    bcmpkt_generic_loopback_t_src_subport_num_set,
+    bcmpkt_generic_loopback_t_start_byte_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_field_data,
+};
+
+
+static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gpe_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_get,
+    bcmpkt_gpe_t_next_protocol_get,
+    bcmpkt_gpe_t_reserved0_get,
+    bcmpkt_gpe_t_reserved1_get,
+    bcmpkt_gpe_t_vni_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gpe_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_set,
+    bcmpkt_gpe_t_next_protocol_set,
+    bcmpkt_gpe_t_reserved0_set,
+    bcmpkt_gpe_t_reserved1_set,
+    bcmpkt_gpe_t_vni_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_gpe_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_gpe_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GPE_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_gpe_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_get,
+    bcmpkt_gre_chksum_t_offset_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_set,
+    bcmpkt_gre_chksum_t_offset_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gre_key_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gre_key_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_gre_key_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_gre_key_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_KEY_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_gre_key_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_ROUT_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_SEQ_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 9);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 9, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_gre_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_get,
+    bcmpkt_gre_t_protocol_get,
+    bcmpkt_gre_t_reserved_get,
+    bcmpkt_gre_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_gre_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_set,
+    bcmpkt_gre_t_protocol_set,
+    bcmpkt_gre_t_reserved_set,
+    bcmpkt_gre_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_gre_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_gre_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_GRE_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_gre_t_field_data,
+};
+
+
+static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 4, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 4, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 6, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 6, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 15);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 15, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 15, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 15, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 15);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 15, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 2, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+    bcmpkt_hg3_base_t_cn_get,
+    bcmpkt_hg3_base_t_cng_get,
+    bcmpkt_hg3_base_t_entropy_get,
+    bcmpkt_hg3_base_t_ext_hdr_present_get,
+    bcmpkt_hg3_base_t_hg3_reserved_get,
+    bcmpkt_hg3_base_t_l3_routed_get,
+    bcmpkt_hg3_base_t_mirror_copy_get,
+    bcmpkt_hg3_base_t_reserved_etype_get,
+    bcmpkt_hg3_base_t_system_destination_get,
+    bcmpkt_hg3_base_t_system_destination_type_get,
+    bcmpkt_hg3_base_t_system_source_get,
+    bcmpkt_hg3_base_t_tc_get,
+    bcmpkt_hg3_base_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+    bcmpkt_hg3_base_t_cn_set,
+    bcmpkt_hg3_base_t_cng_set,
+    bcmpkt_hg3_base_t_entropy_set,
+    bcmpkt_hg3_base_t_ext_hdr_present_set,
+    bcmpkt_hg3_base_t_hg3_reserved_set,
+    bcmpkt_hg3_base_t_l3_routed_set,
+    bcmpkt_hg3_base_t_mirror_copy_set,
+    bcmpkt_hg3_base_t_reserved_etype_set,
+    bcmpkt_hg3_base_t_system_destination_set,
+    bcmpkt_hg3_base_t_system_destination_type_set,
+    bcmpkt_hg3_base_t_system_source_set,
+    bcmpkt_hg3_base_t_tc_set,
+    bcmpkt_hg3_base_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_BASE_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_field_data,
+};
+
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+    bcmpkt_hg3_extension_0_t_class_id_lsb_get,
+    bcmpkt_hg3_extension_0_t_class_id_msb_get,
+    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get,
+    bcmpkt_hg3_extension_0_t_flags_get,
+    bcmpkt_hg3_extension_0_t_forwarding_domain_get,
+    bcmpkt_hg3_extension_0_t_svp_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+    bcmpkt_hg3_extension_0_t_class_id_lsb_set,
+    bcmpkt_hg3_extension_0_t_class_id_msb_set,
+    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set,
+    bcmpkt_hg3_extension_0_t_flags_set,
+    bcmpkt_hg3_extension_0_t_forwarding_domain_set,
+    bcmpkt_hg3_extension_0_t_svp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_get,
+    bcmpkt_hop_by_hop_t_next_header_get,
+    bcmpkt_hop_by_hop_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_set,
+    bcmpkt_hop_by_hop_t_next_header_set,
+    bcmpkt_hop_by_hop_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_field_data,
+};
+
+
+static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_icmp_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_get,
+    bcmpkt_icmp_t_code_get,
+    bcmpkt_icmp_t_icmp_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_icmp_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_set,
+    bcmpkt_icmp_t_code_set,
+    bcmpkt_icmp_t_icmp_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_icmp_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_icmp_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_icmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_get,
+    bcmpkt_ifa_header_t_gns_get,
+    bcmpkt_ifa_header_t_max_length_get,
+    bcmpkt_ifa_header_t_next_hdr_get,
+    bcmpkt_ifa_header_t_ver_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_set,
+    bcmpkt_ifa_header_t_gns_set,
+    bcmpkt_ifa_header_t_max_length_set,
+    bcmpkt_ifa_header_t_next_hdr_set,
+    bcmpkt_ifa_header_t_ver_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_HEADER_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_metadata_a_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 26, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_cn_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 26, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 24, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_port_speed_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_queue_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 20, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_a_t_cn_get,
+    bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get,
+    bcmpkt_ifa_metadata_a_t_lns_device_id_get,
+    bcmpkt_ifa_metadata_a_t_port_speed_get,
+    bcmpkt_ifa_metadata_a_t_queue_id_get,
+    bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_a_t_cn_set,
+    bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set,
+    bcmpkt_ifa_metadata_a_t_lns_device_id_set,
+    bcmpkt_ifa_metadata_a_t_port_speed_set,
+    bcmpkt_ifa_metadata_a_t_queue_id_set,
+    bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_A_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_b_t_egress_port_id_get,
+    bcmpkt_ifa_metadata_b_t_ingress_port_id_get,
+    bcmpkt_ifa_metadata_b_t_mmu_stat_0_get,
+    bcmpkt_ifa_metadata_b_t_mmu_stat_1_get,
+    bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get,
+    bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get,
+    bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_b_t_egress_port_id_set,
+    bcmpkt_ifa_metadata_b_t_ingress_port_id_set,
+    bcmpkt_ifa_metadata_b_t_mmu_stat_0_set,
+    bcmpkt_ifa_metadata_b_t_mmu_stat_1_set,
+    bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set,
+    bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set,
+    bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_B_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_metadata_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_base_t_action_vector_get,
+    bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get,
+    bcmpkt_ifa_metadata_base_t_request_vector_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_base_t_action_vector_set,
+    bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set,
+    bcmpkt_ifa_metadata_base_t_request_vector_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_field_data,
+};
+
+
+static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_igmp_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_get,
+    bcmpkt_igmp_t_group_address_get,
+    bcmpkt_igmp_t_igmp_type_get,
+    bcmpkt_igmp_t_max_resp_time_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_igmp_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_set,
+    bcmpkt_igmp_t_group_address_set,
+    bcmpkt_igmp_t_igmp_type_set,
+    bcmpkt_igmp_t_max_resp_time_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_igmp_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_igmp_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IGMP_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_igmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_namespace_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_namespace_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_FID_COUNT] = {
+    bcmpkt_ioam_e2e_t_ioam_e2e_data_get,
+    bcmpkt_ioam_e2e_t_ioam_e2e_type_get,
+    bcmpkt_ioam_e2e_t_ioam_hdr_len_get,
+    bcmpkt_ioam_e2e_t_namespace_id_get,
+    bcmpkt_ioam_e2e_t_next_protocol_get,
+    bcmpkt_ioam_e2e_t_reserved_get,
+    bcmpkt_ioam_e2e_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_FID_COUNT] = {
+    bcmpkt_ioam_e2e_t_ioam_e2e_data_set,
+    bcmpkt_ioam_e2e_t_ioam_e2e_type_set,
+    bcmpkt_ioam_e2e_t_ioam_hdr_len_set,
+    bcmpkt_ioam_e2e_t_namespace_id_set,
+    bcmpkt_ioam_e2e_t_next_protocol_set,
+    bcmpkt_ioam_e2e_t_reserved_set,
+    bcmpkt_ioam_e2e_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IOAM_E2E_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ipfix_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_get,
+    bcmpkt_ipfix_t_length_get,
+    bcmpkt_ipfix_t_obs_domain_id_get,
+    bcmpkt_ipfix_t_sequence_num_get,
+    bcmpkt_ipfix_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ipfix_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_set,
+    bcmpkt_ipfix_t_length_set,
+    bcmpkt_ipfix_t_obs_domain_id_set,
+    bcmpkt_ipfix_t_sequence_num_set,
+    bcmpkt_ipfix_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ipfix_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ipfix_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_ipfix_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ipv4_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_get,
+    bcmpkt_ipv4_t_flags_frag_offset_get,
+    bcmpkt_ipv4_t_hdr_checksum_get,
+    bcmpkt_ipv4_t_id_get,
+    bcmpkt_ipv4_t_option_get,
+    bcmpkt_ipv4_t_protocol_get,
+    bcmpkt_ipv4_t_sa_get,
+    bcmpkt_ipv4_t_tos_get,
+    bcmpkt_ipv4_t_total_length_get,
+    bcmpkt_ipv4_t_ttl_get,
+    bcmpkt_ipv4_t_version_hdr_len_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ipv4_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_set,
+    bcmpkt_ipv4_t_flags_frag_offset_set,
+    bcmpkt_ipv4_t_hdr_checksum_set,
+    bcmpkt_ipv4_t_id_set,
+    bcmpkt_ipv4_t_option_set,
+    bcmpkt_ipv4_t_protocol_set,
+    bcmpkt_ipv4_t_sa_set,
+    bcmpkt_ipv4_t_tos_set,
+    bcmpkt_ipv4_t_total_length_set,
+    bcmpkt_ipv4_t_ttl_set,
+    bcmpkt_ipv4_t_version_hdr_len_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ipv4_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ipv4_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_ipv4_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_ipv6_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_get,
+    bcmpkt_ipv6_t_flow_label_get,
+    bcmpkt_ipv6_t_hop_limit_get,
+    bcmpkt_ipv6_t_next_header_get,
+    bcmpkt_ipv6_t_payload_length_get,
+    bcmpkt_ipv6_t_sa_get,
+    bcmpkt_ipv6_t_traffic_class_get,
+    bcmpkt_ipv6_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_ipv6_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_set,
+    bcmpkt_ipv6_t_flow_label_set,
+    bcmpkt_ipv6_t_hop_limit_set,
+    bcmpkt_ipv6_t_next_header_set,
+    bcmpkt_ipv6_t_payload_length_set,
+    bcmpkt_ipv6_t_sa_set,
+    bcmpkt_ipv6_t_traffic_class_set,
+    bcmpkt_ipv6_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_ipv6_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_ipv6_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_ipv6_t_field_data,
+};
+
+
+static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_l2_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_get,
+    bcmpkt_l2_t_macsa_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_l2_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_set,
+    bcmpkt_l2_t_macsa_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_l2_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_l2_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_l2_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_get,
+    bcmpkt_mpls_ach_t_cw_type_get,
+    bcmpkt_mpls_ach_t_reserved_get,
+    bcmpkt_mpls_ach_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_set,
+    bcmpkt_mpls_ach_t_cw_type_set,
+    bcmpkt_mpls_ach_t_reserved_set,
+    bcmpkt_mpls_ach_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_ACH_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_BV_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_get,
+    bcmpkt_mpls_cw_t_reserved_get,
+    bcmpkt_mpls_cw_t_seq_number_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_set,
+    bcmpkt_mpls_cw_t_reserved_set,
+    bcmpkt_mpls_cw_t_seq_number_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_CW_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 9, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 9, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_mpls_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_get,
+    bcmpkt_mpls_t_exp_get,
+    bcmpkt_mpls_t_label_get,
+    bcmpkt_mpls_t_ttl_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_mpls_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_set,
+    bcmpkt_mpls_t_exp_set,
+    bcmpkt_mpls_t_label_set,
+    bcmpkt_mpls_t_ttl_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_mpls_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_mpls_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_MPLS_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_mpls_t_field_data,
+};
+
+
+static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[7], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[7], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_p_1588_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_get,
+    bcmpkt_p_1588_t_correction_get,
+    bcmpkt_p_1588_t_domain_nb_get,
+    bcmpkt_p_1588_t_flags_get,
+    bcmpkt_p_1588_t_logmsginterval_get,
+    bcmpkt_p_1588_t_msg_length_get,
+    bcmpkt_p_1588_t_msg_type_get,
+    bcmpkt_p_1588_t_reserved1_get,
+    bcmpkt_p_1588_t_reserved2_get,
+    bcmpkt_p_1588_t_reserved3_get,
+    bcmpkt_p_1588_t_seq_id_get,
+    bcmpkt_p_1588_t_srcportid_get,
+    bcmpkt_p_1588_t_transportspec_get,
+    bcmpkt_p_1588_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_p_1588_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_set,
+    bcmpkt_p_1588_t_correction_set,
+    bcmpkt_p_1588_t_domain_nb_set,
+    bcmpkt_p_1588_t_flags_set,
+    bcmpkt_p_1588_t_logmsginterval_set,
+    bcmpkt_p_1588_t_msg_length_set,
+    bcmpkt_p_1588_t_msg_type_set,
+    bcmpkt_p_1588_t_reserved1_set,
+    bcmpkt_p_1588_t_reserved2_set,
+    bcmpkt_p_1588_t_reserved3_set,
+    bcmpkt_p_1588_t_seq_id_set,
+    bcmpkt_p_1588_t_srcportid_set,
+    bcmpkt_p_1588_t_transportspec_set,
+    bcmpkt_p_1588_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_p_1588_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_p_1588_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_P_1588_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_p_1588_t_field_data,
+};
+
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
+    bcmpkt_prog_ext_hdr_t_next_header_get,
+    bcmpkt_prog_ext_hdr_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
+    bcmpkt_prog_ext_hdr_t_next_header_set,
+    bcmpkt_prog_ext_hdr_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_get,
+    bcmpkt_psamp_0_t_length_get,
+    bcmpkt_psamp_0_t_next_hop_index_get,
+    bcmpkt_psamp_0_t_obs_time_ns_get,
+    bcmpkt_psamp_0_t_obs_time_s_get,
+    bcmpkt_psamp_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_set,
+    bcmpkt_psamp_0_t_length_set,
+    bcmpkt_psamp_0_t_next_hop_index_set,
+    bcmpkt_psamp_0_t_obs_time_ns_set,
+    bcmpkt_psamp_0_t_obs_time_s_set,
+    bcmpkt_psamp_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_0_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_get,
+    bcmpkt_psamp_1_t_egress_port_get,
+    bcmpkt_psamp_1_t_epoch_get,
+    bcmpkt_psamp_1_t_ingress_port_get,
+    bcmpkt_psamp_1_t_sampled_length_get,
+    bcmpkt_psamp_1_t_user_meta_data_get,
+    bcmpkt_psamp_1_t_variable_flag_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_set,
+    bcmpkt_psamp_1_t_egress_port_set,
+    bcmpkt_psamp_1_t_epoch_set,
+    bcmpkt_psamp_1_t_ingress_port_set,
+    bcmpkt_psamp_1_t_sampled_length_set,
+    bcmpkt_psamp_1_t_user_meta_data_set,
+    bcmpkt_psamp_1_t_variable_flag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_1_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_postcard_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_0_t_psamp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_0_t_psamp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT] = {
+    bcmpkt_psamp_postcard_0_t_egress_mod_port_get,
+    bcmpkt_psamp_postcard_0_t_ingress_port_get,
+    bcmpkt_psamp_postcard_0_t_obs_time_ns_get,
+    bcmpkt_psamp_postcard_0_t_obs_time_s_get,
+    bcmpkt_psamp_postcard_0_t_psamp_length_get,
+    bcmpkt_psamp_postcard_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT] = {
+    bcmpkt_psamp_postcard_0_t_egress_mod_port_set,
+    bcmpkt_psamp_postcard_0_t_ingress_port_set,
+    bcmpkt_psamp_postcard_0_t_obs_time_ns_set,
+    bcmpkt_psamp_postcard_0_t_obs_time_s_set,
+    bcmpkt_psamp_postcard_0_t_psamp_length_set,
+    bcmpkt_psamp_postcard_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_drop_reason_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_drop_reason_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_queue_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_residence_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_residence_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_postcard_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT] = {
+    bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_get,
+    bcmpkt_psamp_postcard_1_t_drop_reason_code_get,
+    bcmpkt_psamp_postcard_1_t_mmu_stat_0_get,
+    bcmpkt_psamp_postcard_1_t_mmu_stat_1_get,
+    bcmpkt_psamp_postcard_1_t_queue_id_get,
+    bcmpkt_psamp_postcard_1_t_reserved_1_get,
+    bcmpkt_psamp_postcard_1_t_residence_time_get,
+    bcmpkt_psamp_postcard_1_t_sampled_length_get,
+    bcmpkt_psamp_postcard_1_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT] = {
+    bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_set,
+    bcmpkt_psamp_postcard_1_t_drop_reason_code_set,
+    bcmpkt_psamp_postcard_1_t_mmu_stat_0_set,
+    bcmpkt_psamp_postcard_1_t_mmu_stat_1_set,
+    bcmpkt_psamp_postcard_1_t_queue_id_set,
+    bcmpkt_psamp_postcard_1_t_reserved_1_set,
+    bcmpkt_psamp_postcard_1_t_residence_time_set,
+    bcmpkt_psamp_postcard_1_t_sampled_length_set,
+    bcmpkt_psamp_postcard_1_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_rarp_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_get,
+    bcmpkt_rarp_t_hardware_type_get,
+    bcmpkt_rarp_t_operation_get,
+    bcmpkt_rarp_t_prot_addr_len_get,
+    bcmpkt_rarp_t_protocol_type_get,
+    bcmpkt_rarp_t_sender_ha_get,
+    bcmpkt_rarp_t_sender_ip_get,
+    bcmpkt_rarp_t_target_ha_get,
+    bcmpkt_rarp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_rarp_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_set,
+    bcmpkt_rarp_t_hardware_type_set,
+    bcmpkt_rarp_t_operation_set,
+    bcmpkt_rarp_t_prot_addr_len_set,
+    bcmpkt_rarp_t_protocol_type_set,
+    bcmpkt_rarp_t_sender_ha_set,
+    bcmpkt_rarp_t_sender_ip_set,
+    bcmpkt_rarp_t_target_ha_set,
+    bcmpkt_rarp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_rarp_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_rarp_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_rarp_t_field_data,
+};
+
+
+static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_routing_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_get,
+    bcmpkt_routing_t_hdr_ext_len_get,
+    bcmpkt_routing_t_next_header_get,
+    bcmpkt_routing_t_routing_type_get,
+    bcmpkt_routing_t_segments_left_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_routing_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_set,
+    bcmpkt_routing_t_hdr_ext_len_set,
+    bcmpkt_routing_t_next_header_set,
+    bcmpkt_routing_t_routing_type_set,
+    bcmpkt_routing_t_segments_left_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_routing_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_routing_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_ROUTING_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_routing_t_field_data,
+};
+
+
+static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_rspan_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_get,
+    bcmpkt_rspan_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_rspan_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_set,
+    bcmpkt_rspan_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_rspan_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_rspan_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_RSPAN_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_rspan_t_field_data,
+};
+
+
+static int32_t bcmpkt_segment_routing_srh_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_last_entry_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_last_entry_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = {
+    bcmpkt_segment_routing_srh_t_flags_get,
+    bcmpkt_segment_routing_srh_t_hdr_ext_len_get,
+    bcmpkt_segment_routing_srh_t_last_entry_get,
+    bcmpkt_segment_routing_srh_t_next_header_get,
+    bcmpkt_segment_routing_srh_t_routing_type_get,
+    bcmpkt_segment_routing_srh_t_segments_left_get,
+    bcmpkt_segment_routing_srh_t_tag_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = {
+    bcmpkt_segment_routing_srh_t_flags_set,
+    bcmpkt_segment_routing_srh_t_hdr_ext_len_set,
+    bcmpkt_segment_routing_srh_t_last_entry_set,
+    bcmpkt_segment_routing_srh_t_next_header_set,
+    bcmpkt_segment_routing_srh_t_routing_type_set,
+    bcmpkt_segment_routing_srh_t_segments_left_set,
+    bcmpkt_segment_routing_srh_t_tag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_field_data,
+};
+
+
+static int32_t bcmpkt_segment_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_last_entry_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_last_entry_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_seg_list_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_seg_list_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_segment_routing_t_hdr_ext_len_get,
+    bcmpkt_segment_routing_t_last_entry_flags_get,
+    bcmpkt_segment_routing_t_next_header_get,
+    bcmpkt_segment_routing_t_routing_type_get,
+    bcmpkt_segment_routing_t_seg_list_get,
+    bcmpkt_segment_routing_t_segments_left_get,
+    bcmpkt_segment_routing_t_tag_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_segment_routing_t_hdr_ext_len_set,
+    bcmpkt_segment_routing_t_last_entry_flags_set,
+    bcmpkt_segment_routing_t_next_header_set,
+    bcmpkt_segment_routing_t_routing_type_set,
+    bcmpkt_segment_routing_t_seg_list_set,
+    bcmpkt_segment_routing_t_segments_left_set,
+    bcmpkt_segment_routing_t_tag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_get,
+    bcmpkt_sflow_shim_0_t_sys_source_get,
+    bcmpkt_sflow_shim_0_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_set,
+    bcmpkt_sflow_shim_0_t_sys_source_set,
+    bcmpkt_sflow_shim_0_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 27, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 27, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 7);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 7, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 23, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 23, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_discarded_get,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_mcast_get,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_truncated_get,
+    bcmpkt_sflow_shim_1_t_reserved_get,
+    bcmpkt_sflow_shim_1_t_sys_opcode_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_discarded_set,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_mcast_set,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_truncated_set,
+    bcmpkt_sflow_shim_1_t_reserved_set,
+    bcmpkt_sflow_shim_1_t_sys_opcode_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_get,
+    bcmpkt_sflow_shim_2_t_user_meta_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_set,
+    bcmpkt_sflow_shim_2_t_user_meta_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_get,
+    bcmpkt_snap_llc_t_snap_llc_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_set,
+    bcmpkt_snap_llc_t_snap_llc_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_SNAP_LLC_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_field_data,
+};
+
+
+static int32_t bcmpkt_std_segment_id_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_std_segment_id_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = {
+    bcmpkt_std_segment_id_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = {
+    bcmpkt_std_segment_id_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_get,
+    bcmpkt_tcp_first_4bytes_t_src_port_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_set,
+    bcmpkt_tcp_first_4bytes_t_src_port_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_get,
+    bcmpkt_tcp_last_16bytes_t_checksum_get,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
+    bcmpkt_tcp_last_16bytes_t_seq_num_get,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
+    bcmpkt_tcp_last_16bytes_t_win_size_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_set,
+    bcmpkt_tcp_last_16bytes_t_checksum_set,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
+    bcmpkt_tcp_last_16bytes_t_seq_num_set,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
+    bcmpkt_tcp_last_16bytes_t_win_size_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_udp_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_get,
+    bcmpkt_udp_t_dst_port_get,
+    bcmpkt_udp_t_src_port_get,
+    bcmpkt_udp_t_udp_length_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_udp_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_set,
+    bcmpkt_udp_t_dst_port_set,
+    bcmpkt_udp_t_src_port_set,
+    bcmpkt_udp_t_udp_length_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_udp_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_udp_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_udp_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
+    bcmpkt_unknown_l5_t_l5_bytes_8_9_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
+    bcmpkt_unknown_l5_t_l5_bytes_8_9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_field_data,
+};
+
+
+static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_vlan_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_get,
+    bcmpkt_vlan_t_pcp_get,
+    bcmpkt_vlan_t_tpid_get,
+    bcmpkt_vlan_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_vlan_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_set,
+    bcmpkt_vlan_t_pcp_set,
+    bcmpkt_vlan_t_tpid_set,
+    bcmpkt_vlan_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_vlan_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_vlan_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_vlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_vxlan_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_get,
+    bcmpkt_vxlan_t_reserved2_get,
+    bcmpkt_vxlan_t_vn_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_vxlan_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_set,
+    bcmpkt_vxlan_t_reserved2_set,
+    bcmpkt_vxlan_t_vn_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_vxlan_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_vxlan_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_vxlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm78800_a0_dna_6_5_30_3_1_wesp_t_fget[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_get,
+    bcmpkt_wesp_t_header_len_get,
+    bcmpkt_wesp_t_next_header_get,
+    bcmpkt_wesp_t_seq_num_get,
+    bcmpkt_wesp_t_spi_get,
+    bcmpkt_wesp_t_trailer_len_get,
+    bcmpkt_wesp_t_wesp_iv_get,
+};
+
+bcmpkt_flex_field_set_f bcm78800_a0_dna_6_5_30_3_1_wesp_t_fset[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_set,
+    bcmpkt_wesp_t_header_len_set,
+    bcmpkt_wesp_t_next_header_set,
+    bcmpkt_wesp_t_seq_num_set,
+    bcmpkt_wesp_t_spi_set,
+    bcmpkt_wesp_t_trailer_len_set,
+    bcmpkt_wesp_t_wesp_iv_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm78800_a0_dna_6_5_30_3_1_wesp_t_field_data[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm78800_a0_dna_6_5_30_3_1_wesp_t_field_info = {
+    .num_fields = BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_WESP_T_FID_COUNT,
+    .info = bcm78800_a0_dna_6_5_30_3_1_wesp_t_field_data,
+};
+
+static bcmpkt_flex_pmd_info_t bcm78800_a0_dna_6_5_30_3_1_flexhdr_info_list[BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_arp_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_arp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_authen_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_authen_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_authen_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_bfd_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_bfd_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_bfd_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_cntag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_cntag_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_cntag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_cpu_composites_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_cpu_composites_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_dcn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_dcn_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_dcn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_dest_option_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_dest_option_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_dest_option_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ep_nih_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_erspan3_fixed_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_erspan3_subhdr_5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_esp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_esp_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_esp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_ethertype_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ethertype_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ethertype_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_frag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_frag_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_frag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_gbp_ethernet_shim_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_generic_loopback_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_gpe_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_gpe_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_gpe_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_gre_chksum_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_gre_key_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_gre_key_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_gre_key_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_gre_rout_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_gre_seq_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_gre_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_gre_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_gre_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_hg3_base_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_hg3_extension_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_hop_by_hop_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_icmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_icmp_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_icmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ifa_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_a_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_b_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ifa_metadata_base_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_igmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_igmp_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_igmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ioam_e2e_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_ipfix_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ipfix_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ipfix_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_ipv4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ipv4_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ipv4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_ipv6_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_ipv6_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_ipv6_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_l2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_l2_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_l2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_mirror_erspan_sn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_mirror_transport_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_mpls_ach_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_mpls_bv_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_mpls_cw_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_mpls_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_mpls_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_mpls_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_p_1588_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_p_1588_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_p_1588_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_prog_ext_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_psamp_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_psamp_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_psamp_mirror_on_drop_3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_psamp_postcard_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_rarp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_rarp_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_rarp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_routing_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_routing_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_routing_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_rspan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_rspan_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_rspan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_segment_routing_srh_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_segment_routing_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_sflow_shim_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_snap_llc_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_std_segment_id_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_tcp_first_4bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_tcp_last_16bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_udp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_udp_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_udp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_unknown_l3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_unknown_l4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_unknown_l5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_vlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_vlan_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_vlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_vxlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_vxlan_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_vxlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_wesp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm78800_a0_dna_6_5_30_3_1_wesp_t_fget,
+        .flex_fset = bcm78800_a0_dna_6_5_30_3_1_wesp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_field_info,
+        .reasons_info = &bcm78800_a0_dna_6_5_30_3_1_rxpmd_flex_reasons_info,
+        .flex_common_fget = bcm78800_a0_rxpmd_flex_fget,
+        .flex_common_fset = bcm78800_a0_rxpmd_flex_fset,
+    },
+};
+
+static shr_enum_map_t bcm78800_a0_dna_6_5_30_3_1_flexhdr_id_map[] = {
+    BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_NAME_MAP_INIT
+};
+
+shr_enum_map_t * bcm78800_a0_dna_6_5_30_3_1_flexhdr_map_get(void)
+{
+    return bcm78800_a0_dna_6_5_30_3_1_flexhdr_id_map;
+}
+
+bcmpkt_flex_pmd_info_t * bcm78800_a0_dna_6_5_30_3_1_flex_pmd_info_get(uint32_t hid)
+{
+    if (hid >= BCM78800_A0_DNA_6_5_30_3_1_BCMPKT_FLEXHDR_COUNT) {
+        return NULL;
+    }
+
+    return &bcm78800_a0_dna_6_5_30_3_1_flexhdr_info_list[hid];
+}
+
+int bcm78800_a0_dna_6_5_30_3_1_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+    15,
+    22,
+    23,
+    69,
+};
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Kbuild
index deee1a716832..684e67081621 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Kbuild
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Kbuild
@@ -2,7 +2,7 @@
 #
 # Linux Generic Netlink module.
 #
-# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+# Copyright 2018-2024 Broadcom. All rights reserved.
 # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
 # 
 # This program is free software; you can redistribute it and/or
@@ -15,32 +15,11 @@
 # GNU General Public License for more details.
 # 
 # A copy of the GNU General Public License version 2 (GPLv2) can
-# be found in the LICENSES folder.$
+# be found in the LICENSES folder.
 #
 # Enable Kernel PMD
 KNETCB_CPPFLAGS += -DKPMD
 
-# Build Netlink channel for general packetI/O
-BUILD_GENL_PACKET = 0
-
-# Build Netlink channel for packet sampling
-BUILD_GENL_PSAMPLE = 1
-
-## Build Netlink channel for packet sampling when kernel enables CONFIG_PSAMPLE
-#ifeq ($(CONFIG_PSAMPLE),)
-#BUILD_GENL_PSAMPLE = 1
-#endif
-
-ifeq ($(BUILD_GENL_PACKET),1)
-PACKET_CFLAGS = -DPACKET_SUPPORT
-PACKET_CB_OBJS = bcmgenl_packet.o
-endif
-
-ifeq ($(BUILD_GENL_PSAMPLE),1)
-PSAMPLE_CFLAGS = -DPSAMPLE_SUPPORT
-PSAMPLE_CB_OBJS = bcmgenl_psample.o
-endif
-
 obj-m := linux_bcmgenl.o
 
 ccflags-y := $(KNETCB_CPPFLAGS) $(LKM_CFLAGS) \
@@ -53,11 +32,9 @@ ccflags-y := $(KNETCB_CPPFLAGS) $(LKM_CFLAGS) \
 	     -I$(SDK)/linux/include/kernel \
 	     -I$(SDK)/linux/knet/include \
 	     -I$(SDK)/linux/knet \
-	     -I$(SDK)/linux/bcmgenl \
-	     $(PACKET_CFLAGS) \
-	     $(PSAMPLE_CFLAGS)
+	     -I$(SDK)/linux/bcmgenl
 
 linux_bcmgenl-y := $(SDK_PMD_KOBJS) \
-                   $(PACKET_CB_OBJS) \
-                   $(PSAMPLE_CB_OBJS) \
+                   bcmgenl_packet.o \
+                   bcmgenl_psample.o \
                    bcmgenl.o
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Makefile
index 3311fc4132e0..f5f4740fc390 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Makefile
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Makefile
@@ -1,5 +1,5 @@
 #
-# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+# Copyright 2018-2024 Broadcom. All rights reserved.
 # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
 # 
 # This program is free software; you can redistribute it and/or
@@ -12,7 +12,7 @@
 # GNU General Public License for more details.
 # 
 # A copy of the GNU General Public License version 2 (GPLv2) can
-# be found in the LICENSES folder.$
+# be found in the LICENSES folder.
 #
 # Linux KNET BCMGENL module.
 #
@@ -28,7 +28,6 @@ GENDIR = $(KMODDIR)/generated
 ifneq ($(OUTPUT_DIR),)
 GENDIR = $(OUTPUT_DIR)/knet/generated/bcmgenl
 endif
-
 bcmgenl: kpmd
 	$(MAKE) -C $(GENDIR) all
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.c b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.c
index 06bb99ff8198..3f0dca9ef716 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,14 +17,13 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <lkm/lkm.h>
 #include <lkm/ngknet_kapi.h>
 #include <ngknet_linux.h>
 #include <bcmgenl.h>
-
 #include <bcmgenl_packet.h>
 #include <bcmgenl_psample.h>
 
@@ -34,6 +33,7 @@
 #include <bcmpkt/bcmpkt_higig_defs.h>
 #include <bcmpkt/bcmpkt_lbhdr_field.h>
 #include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_defs.h>
 #include <bcmpkt/bcmpkt_rxpmd_fid.h>
 #include <bcmpkt/bcmpkt_rxpmd_field.h>
 #include <bcmpkt/bcmpkt_rxpmd_match_id.h>
@@ -51,24 +51,13 @@ MODULE_LICENSE("GPL");
 /*! driver proc entry root */
 static struct proc_dir_entry *bcmgenl_proc_root = NULL;
 
-/*! set BCMGENL_DEBUG for debug info */
-#define BCMGENL_DEBUG
-
-#ifdef BCMGENL_DEBUG
-#define DBG_LVL_VERB    0x1
-#define DBG_LVL_PDMP    0x2
-
+#ifdef GENL_DEBUG
 /*! \cond */
 static int debug = 0;
 MODULE_PARAM(debug, int, 0);
 MODULE_PARM_DESC(debug, "Debug level (default 0)");
 /*! \endcond */
-#endif /* BCMGENL_DEBUG */
-
-/*! These below need to match incoming enum values */
-#define FILTER_TAG_STRIP 0
-#define FILTER_TAG_KEEP  1
-#define FILTER_TAG_ORIGINAL 2
+#endif /* GENL_DEBUG */
 
 #ifndef KPMD
 #define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
@@ -127,35 +116,148 @@ static const struct {
     {"device_count", "variant_count", BCMLRD_VARIANT_T_COUNT}
 };
 
-void dump_skb(struct sk_buff *skb)
+#ifdef KPMD
+/*
+  Change this structure to reflect the match_ids of interest.
+  This is an example of how it can be used.
+*/
+typedef struct cb_match_id_s {
+    int egress_pkt_fwd_l2_hdr_etag;
+    int egress_pkt_fwd_l2_hdr_l2;
+    int ingress_pkt_inner_l2_hdr_l2;
+    int ingress_pkt_fwd_l2_hdr_etag;
+    int ingress_pkt_outer_l2_hdr_itag;
+    int ingress_pkt_outer_l2_hdr_otag;
+} cb_match_id_t;
+
+static cb_match_id_t match_id;
+
+struct name_value_pair_s {
+    char *name;
+    int value;
+};
+
+static struct name_value_pair_s rxpmd_info[] = {
+    BCMPKT_RXPMD_FIELD_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t reason_names[] =
+{
+    BCMPKT_REASON_NAME_MAP_INIT
+};
+
+static void
+print_all_rxpmd_fields(
+    bcmdrd_dev_type_t dev_type,
+    const uint8_t *rxpmd)
 {
-    int idx;
-    char str[128];
-    uint8_t *data = skb->data;
-
-    printk(KERN_INFO " SKB len: %4d\n", skb->len);
-    for (idx = 0; idx < skb->len; idx++) {
-        if ((idx & 0xf) == 0) {
-            printk(str, "%04x: ", idx);
+    int rv, fid;
+    bcmpkt_rxpmd_fid_support_t support;
+    uint32_t val;
+
+    printk("\n[RX metadata information]:\n");
+    bcmpkt_rxpmd_fid_support_get(dev_type, &support);
+
+    BCMPKT_RXPMD_FID_SUPPORT_ITER(support, fid) {
+        rv = bcmpkt_rxpmd_field_get
+            (dev_type, (uint32_t *)rxpmd, fid, &val);
+        if (rv == 0) {
+            printk("  %-26s = %10d [0x%X]\n", rxpmd_info[fid].name, val, val);
         }
-        if ((idx & 0xf) == 8) {
-            printk(&str[strlen(str)], "- ");
+    }
+}
+
+static void
+print_all_rxpmd_flex_fields(
+    bcmdrd_dev_type_t dev_type,
+    bcmlrd_variant_t var_type,
+    const uint8_t *rxpmd,
+    uint32_t *rxpmd_flex)
+{
+    int rv, fid;
+    int flex_profile = -1;
+    bcmpkt_flex_field_info_t rxpmd_flex_info;
+    uint32_t hid, val;
+
+    rv = bcmpkt_rxpmd_field_get(dev_type, (uint32_t *)rxpmd,
+                                BCMPKT_RXPMD_MPB_FLEX_DATA_TYPE, &val);
+    if (rv < 0) {
+        return;
+    }
+    flex_profile = (int)val;
+
+    rv = bcmpkt_flexhdr_header_id_get(var_type, "RXPMD_FLEX_T", &hid);
+    if (rv < 0) {
+        return;
+    }
+
+    rv = bcmpkt_flexhdr_field_info_get(var_type, hid, &rxpmd_flex_info);
+    if (rv < 0) {
+        return;
+    }
+
+    printk("\n[RX metadata flex information]:\n");
+    for (fid = BCMPKT_FID_INVALID + 1; fid < rxpmd_flex_info.num_fields; fid++) {
+        rv = bcmpkt_flexhdr_field_get(var_type, hid, rxpmd_flex, flex_profile, fid, &val);
+        if (rv == 0 && val != 0) {
+            printk("  %-34s = %10d [0x%X]\n", rxpmd_flex_info.info[fid].name, val, val);
         }
-        sprintf(&str[strlen(str)], "%02x ", data[idx]);
-        if ((idx & 0xf) == 0xf) {
-            sprintf(&str[strlen(str)], "\n");
-            printk("%s", str);
+    }
+}
+
+static void
+print_all_rx_reason(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd)
+{
+    int reason, rv;
+    bcmpkt_rx_reasons_t reasons;
+
+    if (rxpmd) {
+        BCMPKT_RX_REASON_CLEAR_ALL(reasons);
+        rv = bcmpkt_rxpmd_reasons_get(dev_type, rxpmd, &reasons);
+        if (rv == 0) {
+            BCMPKT_RX_REASON_ITER(reasons, reason) {
+                printk("  %s\n", reason_names[reason].name);
+            }
         }
     }
-    if ((idx & 0xf) != 0) {
-        sprintf(&str[strlen(str)], "\n");
-        printk("%s", str);
+}
+
+static void
+print_all_rx_flex_reason(bcmlrd_variant_t variant, uint32_t *rxpmd_flex)
+{
+    int reason, reason_num = 0, rv;
+    bcmpkt_bitmap_t reasons;
+    char *name;
+    uint32_t val;
+
+    if (rxpmd_flex == NULL) {
+        return;
+    }
+
+    rv = bcmpkt_rxpmd_flex_reason_max_get(variant, &val);
+    if (rv < 0) {
+        return;
+    }
+    reason_num = (int)val;
+
+    rv = bcmpkt_rxpmd_flex_reasons_get(variant, rxpmd_flex, &reasons);
+    if (rv == 0) {
+        for (reason = 0; reason < reason_num; reason++) {
+            if (BCMPKT_RXPMD_FLEX_REASON_GET(reasons, reason)) {
+                rv = bcmpkt_rxpmd_flex_reason_name_get(variant, reason, &name);
+                if (!rv) {
+                    printk("  %s\n", name);
+                }
+            }
+        }
     }
 }
 
-#ifdef BCMGENL_DEBUG
+#endif /* KPMD */
+
+#ifdef GENL_DEBUG
 static void
-dump_buffer(uint8_t * data, int size)
+dump_buffer(uint8_t *data, int size)
 {
     const char         *const to_hex = "0123456789ABCDEF";
     int i;
@@ -164,15 +266,17 @@ dump_buffer(uint8_t * data, int size)
     int                 addr = 0;
 
     buffer_ptr = buffer;
-    for (i = 0; i < size; i++) {
-        *buffer_ptr++ = ' ';
-        *buffer_ptr++ = to_hex[(data[i] >> 4) & 0xF];
-        *buffer_ptr++ = to_hex[data[i] & 0xF];
-        if (((i % 16) == 15) || (i == size - 1)) {
-            *buffer_ptr = '\0';
-            buffer_ptr = buffer;
-            printk(KERN_INFO "%04X  %s\n", addr, buffer);
-            addr = i + 1;
+    if (data && size != 0) {
+        for (i = 0; i < size; i++) {
+            *buffer_ptr++ = ' ';
+            *buffer_ptr++ = to_hex[(data[i] >> 4) & 0xF];
+            *buffer_ptr++ = to_hex[data[i] & 0xF];
+            if (((i % 16) == 15) || (i == size - 1)) {
+                *buffer_ptr = '\0';
+                buffer_ptr = buffer;
+                printk(KERN_INFO "%04X  %s\n", addr, buffer);
+                addr = i + 1;
+            }
         }
     }
 }
@@ -180,31 +284,36 @@ dump_buffer(uint8_t * data, int size)
 static void
 dump_pmd(uint8_t *pmd, int len)
 {
-    if (debug & DBG_LVL_PDMP) {
-        printk("PMD (%d bytes):\n", len);
+    if (debug & GENL_DBG_LVL_PDMP) {
+        printk(KERN_INFO "[PMD (%d bytes)]:\n", len);
         dump_buffer(pmd, len);
     }
 }
 
+void dump_skb(struct sk_buff *skb)
+{
+    if (skb && (skb->len != 0)) {
+        printk(KERN_INFO "[SKB (%d bytes)]:\n", skb->len);
+        dump_buffer(skb->data, skb->len);
+    }
+}
+
 void dump_bcmgenl_pkt(bcmgenl_pkt_t *bcmgenl_pkt)
 {
-    printk(KERN_INFO "Network namespace 0x%p\n",
-           bcmgenl_pkt->netns);
-    printk(KERN_INFO "ing_pp_port %d src_port %d, dst_port %d, dst_port_type %x\n",
-           bcmgenl_pkt->meta.ing_pp_port,
-           bcmgenl_pkt->meta.src_port,
-           bcmgenl_pkt->meta.dst_port,
-           bcmgenl_pkt->meta.dst_port_type);
-    printk(KERN_INFO "tag status %d",
-           bcmgenl_pkt->meta.tag_status);
-    printk(KERN_INFO "proto 0x%x, vlan 0x%x\n",
-           bcmgenl_pkt->meta.proto,
-           bcmgenl_pkt->meta.vlan);
-    printk(KERN_INFO "sample_rate %d, sample_size %d\n",
-           bcmgenl_pkt->psamp_meta.sample_rate,
-           bcmgenl_pkt->psamp_meta.sample_size);
+    printk(KERN_INFO"  %-20s = 0x%p\n", "Network namespace", bcmgenl_pkt->netns);
+    printk(KERN_INFO"  %-20s = %d\n", "ing_pp_port", bcmgenl_pkt->meta.ing_pp_port);
+    printk(KERN_INFO"  %-20s = %d\n", "src_port", bcmgenl_pkt->meta.src_port);
+    printk(KERN_INFO"  %-20s = %d\n", "dst_port", bcmgenl_pkt->meta.dst_port);
+    printk(KERN_INFO"  %-20s = %d\n", "dst_port_type", bcmgenl_pkt->meta.dst_port_type);
+    printk(KERN_INFO"  %-20s = %d\n", "tag_status", bcmgenl_pkt->meta.tag_status);
+    printk(KERN_INFO"  %-20s = 0x%x\n", "proto", bcmgenl_pkt->meta.proto);
+    printk(KERN_INFO"  %-20s = %d\n", "vlan", bcmgenl_pkt->meta.vlan);
+    printk(KERN_INFO"  %-20s = %s\n", "sample_type",
+          (bcmgenl_pkt->meta.sample_type == SAMPLE_TYPE_NONE ? "Not sampled" :
+           (bcmgenl_pkt->meta.sample_type == SAMPLE_TYPE_INGRESS ?
+           "Ingress sampled" : "Egress sampled")));
 }
-#endif /* BCMGENL_DEBUG */
+#endif /* GENL_DEBUG */
 
 /*
  * The function get_tag_status() returns the tag status.
@@ -215,137 +324,134 @@ void dump_bcmgenl_pkt(bcmgenl_pkt_t *bcmgenl_pkt)
  * -1 = Unsupported type
  */
 static int
-get_tag_status(uint32_t dev_type, uint32_t variant, void *meta)
+get_tag_status(uint32_t dev_type, uint32_t variant, void *rxpmd)
 {
-    uint32_t  *valptr;
-    uint32_t  fd_index;
-    uint32_t  outer_l2_hdr = 0;
+    int rv;
+    const char *tag_type[4] = {
+        "Untagged",
+        "Inner Tagged",
+        "Outer Tagged",
+        "Double Tagged"
+    };
     int tag_status = -1;
-    uint32_t  match_id_minbit = 1;
-    uint32_t  outer_tag_match = 0x10;
-
-    if ((dev_type == 0xb880) || (dev_type == 0xb780)) {
-        /* Field BCM_PKTIO_RXPMD_MATCH_ID_LO has tag status in RX PMD */
-        fd_index = 2;
-        valptr = (uint32_t *)meta;
-        match_id_minbit = (dev_type == 0xb780) ? 2 : 1;
-        outer_l2_hdr = (valptr[fd_index] >> match_id_minbit & 0xFF);
-        outer_tag_match = ((dev_type == 0xb780 && variant == 1) ? 0x8 : 0x10);
-        if (outer_l2_hdr & 0x1) {
-            tag_status = 0;
-            if (outer_l2_hdr & 0x4) {
-                tag_status = 0;
-            }
-            if (outer_l2_hdr & outer_tag_match) {
-                tag_status = 2;
-                if (outer_l2_hdr & 0x20) {
-                    tag_status = 3;
-                }
-            }
-            else if (outer_l2_hdr & 0x20) {
-                tag_status = 1;
-            }
-        }
-    }
-    else if ((dev_type == 0xb990)|| (dev_type == 0xb996)) {
-        fd_index = 9;
-        valptr = (uint32_t *)meta;
-        /* On TH4, outer_l2_header means INCOMING_TAG_STATUS.
-         * TH4 only supports single tagging, so if TAG_STATUS
-         * says there's a tag, then we don't want to strip.
-         * Otherwise, we do.
+    bcmpkt_rxpmd_fid_support_t support;
+    uint32_t val = 0;
+
+    bcmpkt_rxpmd_fid_support_get(dev_type, &support);
+
+    if (BCMPKT_RXPMD_FID_SUPPORT_GET(support, BCMPKT_RXPMD_ING_TAG_TYPE)) {
+        rv = bcmpkt_rxpmd_field_get(dev_type, (uint32_t *)rxpmd,
+                                    BCMPKT_RXPMD_ING_TAG_TYPE, &val);
+        /* Tomahawk4 family */
+
+        /*
+         * Indicates the incoming tag status (INCOMING_TAG_STATUS):
+         * For single tag device:
+         *   0: untagged, 1: tagged
+         * For double tag device:
+         *   0: untagged, 1: single inner-tag, 2: single outer-tag, 3: double tagged
          */
-        outer_l2_hdr = (valptr[fd_index] >> 13) & 3;
-
-        if (outer_l2_hdr) {
+        if (SHR_SUCCESS(rv)) {
+            tag_status = val;
+        }
+    } else if (BCMPKT_RXPMD_FID_SUPPORT_GET(support, BCMPKT_RXPMD_MATCH_ID_LO) &&
+               BCMPKT_RXPMD_FID_SUPPORT_GET(support, BCMPKT_RXPMD_MATCH_ID_HI)) {
+        /* Trident4 family. */
+
+        uint32_t match_id_data[2];
+        bool itag = false, otag = false;
+
+        bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_MATCH_ID_LO,
+                               &match_id_data[0]);
+        bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_MATCH_ID_HI,
+                               &match_id_data[1]);
+        rv = bcmpkt_rxpmd_match_id_present(variant, match_id_data, 2,
+                                           match_id.ingress_pkt_outer_l2_hdr_itag);
+        if (SHR_SUCCESS(rv)) {
+            itag = true;
+        }
+        rv = bcmpkt_rxpmd_match_id_present(variant, match_id_data, 2,
+                                           match_id.ingress_pkt_outer_l2_hdr_otag);
+        if (SHR_SUCCESS(rv)) {
+            otag = true;
+        }
+        if (itag && otag) {
+            tag_status = 3;
+        } else if (itag) {
+            tag_status = 1;
+        } else if (otag) {
             tag_status = 2;
         } else {
             tag_status = 0;
         }
     }
-#ifdef BCMGENL_DEBUG
-    if (debug & DBG_LVL_VERB) {
-        if (outer_l2_hdr) {
-            printk("  L2 Header Present\n");
+#ifdef GENL_DEBUG
+    if (debug & GENL_DBG_LVL_VERB) {
+        if (tag_status != -1) {
             if (tag_status == 0) {
                 printk("  Incoming frame untagged\n");
             } else {
-                printk("  Incoming frame tagged\n");
-            }
-            switch (tag_status) {
-            case 0:
-                printk("  SNAP/LLC\n");
-                break;
-            case 1:
-                printk("  Inner Tagged\n");
-                break;
-            case 2:
-                printk("  Outer Tagged\n");
-                break;
-            case 3:
-                printk("  Double Tagged\n");
-                break;
-            default:
-                break;
+                printk("  Incoming frame tagged: %s\n", tag_type[tag_status]);
             }
+        } else {
+            printk("  Unsupported tag type\n");
         }
-        printk("%s; Device Type: %d; tag status: %d\n", __func__, dev_type, tag_status);
     }
-#endif /* BCMGENL_DEBUG */
+#endif /* GENL_DEBUG */
     return tag_status;
 }
 
 static int
-dstport_get(void *pkt_meta)
+dstport_get(void *raw_hg_hdr)
 {
+    /*
+     * The bit positions of dest port field is fixed on TH4/TH5.
+     * directly use HIGIG2_DST_PORT_MGIDLf_GET to get dest port.
+     */
     int dstport = 0;
-    HIGIG_t *hg = (HIGIG_t *)pkt_meta;
-    HIGIG2_t *hg2 = (HIGIG2_t *)pkt_meta;
-
-    if (HIGIG2_STARTf_GET(*hg2) == BCMPKT_HIGIG2_SOF)
-    {
-        if (HIGIG2_MCSTf_GET(*hg2))
-        {
-            dstport = 0;
-        }
-        else
-        {
-            dstport = HIGIG2_DST_PORT_MGIDLf_GET(*hg2);
-        }
-    }
-    else if (HIGIG_STARTf_GET(*hg) == BCMPKT_HIGIG_SOF)
-    {
-        dstport = HIGIG_DST_PORTf_GET(*hg);
-    }
-#ifdef BCMGENL_DEBUG
-    else
-    {
-        /* SDKLT-43751: Failed to parse dstport on TD4/TH4 */
-        if (debug & DBG_LVL_VERB) {
-            printk("%s: Could not detect metadata sop type: 0x%02x\n",
-                   __func__, HIGIG_STARTf_GET(*hg));
-            return (-1);
-        }
+    const HIGIG2_t *const higig2 = (HIGIG2_t *)raw_hg_hdr;
+
+    if (HIGIG2_MCSTf_GET(*higig2)) {
+        dstport = 0;
+    } else {
+        dstport = HIGIG2_DST_PORT_MGIDLf_GET(*higig2);
     }
-#endif /* BCMGENL_DEBUG */
     return dstport;
 }
 
-static bool
-dstport_type_get(void *pkt_meta)
+static int
+dstport_type_get(void *raw_hg_hdr)
 {
-    HIGIG2_t *hg2 = (HIGIG2_t *)pkt_meta;
-
-    if (HIGIG2_STARTf_GET(*hg2) == BCMPKT_HIGIG2_SOF)
-    {
-        if (HIGIG2_MCSTf_GET(*hg2))
-        {
-            return DSTPORT_TYPE_MC;
-        }
+    /*
+     * The bit positions of multicast field is fixed on TH4/TH5.
+     * directly use HIGIG2_MCSTf_GET to get dest port.
+     */
+    const HIGIG2_t *const higig2 = (HIGIG2_t *)raw_hg_hdr;
+
+    if (HIGIG2_MCSTf_GET(*higig2)) {
+        return DSTPORT_TYPE_MC;
     }
     return DSTPORT_TYPE_NONE;
 }
 
+static bool
+is_cpu_port(uint32_t dev_id, uint32_t port)
+{
+    if (((dev_id == 0xb880) && (port == 160)) ||
+        ((dev_id == 0xb780) && (port == 80)) ||
+        ((dev_id == 0xb690) && (port == 80)) ||
+        ((dev_id == 0xb890) && (port == 272)) ||
+        ((dev_id == 0xf800) && (port == 176))) {
+        /*
+         * SYSTEM_DESTINATION_15_0 = 0 is reserved and not used for CPU port on
+         * Trident 4/5 families.
+         * e.g TD4X11 map system port of CPU to {modid : 160}
+         */
+        return true;
+    }
+    return false;
+}
+
 int
 bcmgenl_pkt_package(
     int dev,
@@ -356,13 +462,19 @@ bcmgenl_pkt_package(
     int unit, rv, rv2;
     struct ngknet_callback_desc *cbd;
     uint8_t *pkt;
-    uint32_t rxpmd[BCMPKT_RXPMD_SIZE_WORDS];
     uint32_t dev_type = 0;
     bcmlrd_variant_t var_type;
+    uint32_t *rxpmd = NULL;
     uint32_t *rxpmd_flex = NULL;
     uint32_t rxpmd_flex_len = 0;
     uint32_t hid, val = 0;
+    int flex_profile = -1;
     int fid;
+    uint32_t *mh = NULL;
+    int reason, reason_num = 0;
+    bcmpkt_bitmap_t reasons;
+    bcmpkt_rx_reasons_t rx_reasons;
+    char *name;
 
     if (!skb || !bcmgenl_info || !bcmgenl_pkt) {
         return SHR_E_PARAM;
@@ -370,6 +482,9 @@ bcmgenl_pkt_package(
     cbd = NGKNET_SKB_CB(skb);
     unit = cbd->dinfo->dev_no;
     pkt = cbd->pmd + cbd->pmd_len;
+    rxpmd = (uint32_t *)cbd->pmd;
+
+    memset(&bcmgenl_pkt->meta, 0, sizeof(bcmgenl_packet_meta_t));
 
     bcmgenl_pkt->meta.proto = (uint16_t) ((pkt[12] << 8) | pkt[13]);
     bcmgenl_pkt->meta.vlan = (uint16_t) ((pkt[14] << 8) | pkt[15]);
@@ -380,31 +495,80 @@ bcmgenl_pkt_package(
 #ifdef KPMD
         dev_type = cb_dev[unit].dev_type;
         var_type = cb_dev[unit].var_type;
+
         /* Get tag status */
-        bcmgenl_pkt->meta.tag_status = get_tag_status(dev_type, var_type,(void *)cbd->pmd);
+        bcmgenl_pkt->meta.tag_status = get_tag_status(dev_type, var_type, (void *)rxpmd);
 
-        /* Get dst port */
-        bcmgenl_pkt->meta.dst_port = dstport_get((void *)cbd->pmd);
-        bcmgenl_pkt->meta.dst_port_type = dstport_type_get((void *)cbd->pmd);
+        /* Get sampling reason */
+        BCMPKT_RX_REASON_CLEAR_ALL(reasons);
+        rv = bcmpkt_rxpmd_reasons_get(dev_type, rxpmd, &rx_reasons);
+        bcmgenl_pkt->meta.sample_type = SAMPLE_TYPE_NONE;
+        if (SHR_SUCCESS(rv)) {
+            if ((BCMPKT_RX_REASON_GET(rx_reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) ||
+                (BCMPKT_RX_REASON_GET(rx_reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC))){
+                bcmgenl_pkt->meta.sample_type = SAMPLE_TYPE_INGRESS;
+            } else if ((BCMPKT_RX_REASON_GET(rx_reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) ||
+                       (BCMPKT_RX_REASON_GET(rx_reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST))) {
+                bcmgenl_pkt->meta.sample_type = SAMPLE_TYPE_EGRESS;
+            }
+        }
+
+        /* Get Module header's pointer */
+        rv = bcmpkt_rxpmd_mh_get(dev_type, rxpmd, &mh);
+        if (SHR_SUCCESS(rv)) {
+            /* Get dst_port and dst_port_type */
+            bcmgenl_pkt->meta.dst_port = dstport_get((void *)mh);
+            bcmgenl_pkt->meta.dst_port_type = dstport_type_get((void *)mh);
+        }
 
         /* Get src port */
-        rv = bcmpkt_rxpmd_field_get(dev_type,
-            (uint32_t *)cbd->pmd, BCMPKT_RXPMD_SRC_PORT_NUM, &val);
+        rv = bcmpkt_rxpmd_field_get
+            (dev_type, rxpmd, BCMPKT_RXPMD_SRC_PORT_NUM, &val);
         if (SHR_SUCCESS(rv)) {
             bcmgenl_pkt->meta.src_port = val;
         }
         rv = bcmpkt_rxpmd_flexdata_get
             (dev_type, rxpmd, &rxpmd_flex, &rxpmd_flex_len);
         if (SHR_FAILURE(rv) && (rv != SHR_E_UNAVAIL)) {
-            printk("Failed to detect RXPMD_FLEX.\n");
+            GENL_DBG_VERB("Failed to detect RXPMD_FLEX.\n");
         } else {
             if (rxpmd_flex_len) {
+                /* Get sampling reason from flex reasons */
+                rv = bcmpkt_rxpmd_flex_reason_max_get(var_type, &val);
+                rv2 = bcmpkt_rxpmd_flex_reasons_get(var_type, rxpmd_flex, &reasons);
+                if (SHR_SUCCESS(rv) || SHR_SUCCESS(rv2)) {
+                    bcmgenl_pkt->meta.sample_type = SAMPLE_TYPE_NONE;
+                    reason_num = (int)val;
+                    for (reason = 0; reason < reason_num; reason++) {
+                        if (BCMPKT_RXPMD_FLEX_REASON_GET(reasons, reason)) {
+                            rv = bcmpkt_rxpmd_flex_reason_name_get(var_type, reason, &name);
+                            if (SHR_SUCCESS(rv)) {
+                                if (strcmp(name, "MIRROR_SAMPLER_SAMPLED") == 0) {
+                                    bcmgenl_pkt->meta.sample_type = SAMPLE_TYPE_INGRESS;
+                                    break;
+                                } else if (strcmp(name, "MIRROR_SAMPLER_EGR_SAMPLED") == 0) {
+                                    bcmgenl_pkt->meta.sample_type = SAMPLE_TYPE_EGRESS;
+                                    break;
+                                }
+                            }
+                        }
+                    }
+                }
+
                 /* Get hid of RXPMD_FLEX_T */
                 if (bcmpkt_flexhdr_header_id_get(var_type,
                                                  "RXPMD_FLEX_T", &hid)) {
                     rv = SHR_E_UNAVAIL;
                 }
 
+                if (SHR_FAILURE(rv) ||
+                    bcmpkt_rxpmd_field_get(dev_type, (uint32_t *)rxpmd,
+                                           BCMPKT_RXPMD_MPB_FLEX_DATA_TYPE, &val)) {
+                    rv = SHR_E_UNAVAIL;
+                }
+                flex_profile = (int)val;
+
+                rv2 = SHR_E_NONE;
                 /* Get fid of INGRESS_PP_PORT_7_0 */
                 if (SHR_FAILURE(rv) ||
                     bcmpkt_flexhdr_field_id_get(var_type, hid,
@@ -412,7 +576,7 @@ bcmgenl_pkt_package(
                                                 &fid) ||
                     bcmpkt_flexhdr_field_get(var_type, hid,
                                              rxpmd_flex,
-                                             BCMPKT_FLEXHDR_PROFILE_NONE,
+                                             flex_profile,
                                              fid, &val)) {
                     rv2 = SHR_E_UNAVAIL;
                 }
@@ -420,6 +584,37 @@ bcmgenl_pkt_package(
                     bcmgenl_pkt->meta.ing_pp_port = val;
                 }
 
+                /* Get dst_port and dst_port_type */
+                rv2 = bcmpkt_rxpmd_field_get
+                    (dev_type, rxpmd, BCMPKT_RXPMD_MULTICAST, &val);
+                if (SHR_SUCCESS(rv2)) {
+                    bcmgenl_pkt->meta.dst_port_type =
+                        (val == 1 ? DSTPORT_TYPE_MC : DSTPORT_TYPE_NONE);
+                }
+                if (bcmgenl_pkt->meta.dst_port_type == DSTPORT_TYPE_MC) {
+                    bcmgenl_pkt->meta.dst_port = 0;
+                } else {
+                    rv2 = SHR_E_NONE;
+                    /* Get fid of SYSTEM_DESTINATION_15_0 */
+                    if (SHR_FAILURE(rv) ||
+                        bcmpkt_flexhdr_field_id_get(var_type, hid,
+                                                    "SYSTEM_DESTINATION_15_0",
+                                                    &fid) ||
+                        bcmpkt_flexhdr_field_get(var_type, hid,
+                                                 rxpmd_flex,
+                                                 flex_profile,
+                                                 fid, &val)) {
+                        rv2 = SHR_E_UNAVAIL;
+                    }
+                    if (SHR_SUCCESS(rv) || SHR_SUCCESS(rv2)) {
+                        if (is_cpu_port(cbd->dinfo->dev_id, val)) {
+                            val = 0;
+                        }
+                        bcmgenl_pkt->meta.dst_port = val;
+                    }
+                }
+
+                rv2 = SHR_E_NONE;
                 /* Get fid of ING_TIMESTAMP_31_0 */
                 if (SHR_FAILURE(rv) ||
                     bcmpkt_flexhdr_field_id_get(var_type, hid,
@@ -427,7 +622,7 @@ bcmgenl_pkt_package(
                                                 &fid) ||
                     bcmpkt_flexhdr_field_get(var_type, hid,
                                              rxpmd_flex,
-                                             BCMPKT_FLEXHDR_PROFILE_NONE,
+                                             flex_profile,
                                              fid, &val)) {
                     rv2 = SHR_E_UNAVAIL;
                 }
@@ -438,41 +633,38 @@ bcmgenl_pkt_package(
         }
 #endif /* KPMD */
     }
-#ifdef BCMGENL_DEBUG
-    if (debug & DBG_LVL_PDMP) {
+#ifdef GENL_DEBUG
+    if (debug & GENL_DBG_LVL_PDMP) {
         if (cb_dev[unit].initialized) {
-            printk("bcmgenl_pkt_package for dev %d: %s variant %s\n",
-                   cbd->dinfo->dev_no, cbd->dinfo->type_str,
-                   variant_types[cb_dev[unit].var_type].var_name);
-            printk("dev_type: %d\n", cb_dev[unit].dev_type);
-            printk("variant: %d\n\n", cb_dev[unit].var_type);
+            printk("bcmgenl_pkt_package for dev %d:", cbd->dinfo->dev_no);
+            printk("type_str:%s dev_id: 0x%x variant: %s\n",
+                   cbd->dinfo->type_str, cbd->dinfo->dev_id, variant_types[var_type].var_name);
+            printk("dev_type: %d\n", dev_type);
+            printk("variant: %d\n", var_type);
+
+            print_all_rxpmd_fields(dev_type, (void *)rxpmd);
+            if (rxpmd_flex_len) {
+                print_all_rxpmd_flex_fields(dev_type, var_type, (void *)rxpmd, rxpmd_flex);
+                printk("\n[RX flex reasons]:\n");
+                print_all_rx_flex_reason(var_type, rxpmd_flex);
+            } else {
+                printk("\n[RX reasons]:\n");
+                print_all_rx_reason(dev_type, (void *)rxpmd);
+            }
 
             if (cbd->pmd_len != 0) {
                 dump_pmd(cbd->pmd, cbd->pmd_len);
             }
-            printk("Packet raw data (%d):", cbd->pkt_len);
+            printk("\n[Packet raw data (%d)]:\n", cbd->pkt_len);
             dump_buffer(pkt, cbd->pkt_len);
         }
         dump_bcmgenl_pkt(bcmgenl_pkt);
     }
-#endif /* BCMGENL_DEBUG */
+#endif /* GENL_DEBUG */
     return SHR_E_NONE;
 }
 
 #ifdef KPMD
-/*
-  Change this structure to reflect the match_ids of interest.
-  This is an example of how it can be used.
-*/
-typedef struct cb_match_id_s {
-    int egress_pkt_fwd_l2_hdr_etag;
-    int egress_pkt_fwd_l2_hdr_l2;
-    int ingress_pkt_inner_l2_hdr_l2;
-    int ingress_pkt_fwd_l2_hdr_etag;
-} cb_match_id_t;
-
-static cb_match_id_t match_id;
-
 /*
   Initialize the desired match_ids for use later in the code.
 */
@@ -485,25 +677,37 @@ init_match_ids(int unit)
     match_id.egress_pkt_fwd_l2_hdr_l2    = -1;
     match_id.ingress_pkt_inner_l2_hdr_l2 = -1;
     match_id.ingress_pkt_fwd_l2_hdr_etag = -1;
+    match_id.ingress_pkt_outer_l2_hdr_itag = -1;
+    match_id.ingress_pkt_outer_l2_hdr_otag = -1;
     if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type,
                                   "EGRESS_PKT_FWD_L2_HDR_ETAG", &val) == 0) {
         match_id.egress_pkt_fwd_l2_hdr_etag = val;
-        printk("EGRESS_PKT_FWD_L2_HDR_ETAG: %d\n", val);
+        GENL_DBG_VERB("EGRESS_PKT_FWD_L2_HDR_ETAG: %d\n", val);
     }
     if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type,
                                   "EGRESS_PKT_FWD_L2_HDR_L2", &val) == 0) {
         match_id.egress_pkt_fwd_l2_hdr_l2 = val;
-        printk("EGRESS_PKT_FWD_L2_HDR_L2: %d\n", val);
+        GENL_DBG_VERB("EGRESS_PKT_FWD_L2_HDR_L2: %d\n", val);
     }
     if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type,
                                   "INGRESS_PKT_INNER_L2_HDR_L2", &val) == 0) {
         match_id.ingress_pkt_inner_l2_hdr_l2 = val;
-        printk("INGRESS_PKT_INNER_L2_HDR_L2: %d\n", val);
+        GENL_DBG_VERB("INGRESS_PKT_INNER_L2_HDR_L2: %d\n", val);
     }
     if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type,
                                   "INGRESS_PKT_FWD_L2_HDR_ETAG", &val) == 0) {
         match_id.ingress_pkt_fwd_l2_hdr_etag = val;
-        printk("INGRESS_PKT_FWD_L2_HDR_ETAG: %d\n", val);
+        GENL_DBG_VERB("INGRESS_PKT_FWD_L2_HDR_ETAG: %d\n", val);
+    }
+    if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type,
+                                  "INGRESS_PKT_OUTER_L2_HDR_ITAG", &val) == 0) {
+        match_id.ingress_pkt_outer_l2_hdr_itag = val;
+        GENL_DBG_VERB("INGRESS_PKT_OUTER_L2_HDR_ITAG: %d\n", val);
+    }
+    if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type,
+                                  "INGRESS_PKT_OUTER_L2_HDR_OTAG", &val) == 0) {
+        match_id.ingress_pkt_outer_l2_hdr_otag = val;
+        GENL_DBG_VERB("INGRESS_PKT_OUTER_L2_HDR_OTAG: %d\n", val);
     }
 }
 #endif /* KPMD */
@@ -544,14 +748,15 @@ init_cb(ngknet_dev_info_t *dinfo)
             break;
         }
     }
-
-    printk("init_cb unit %d, dev %s variant %s\n",
-           dinfo->dev_no, dinfo->type_str, dinfo->var_str);
-    printk("dev_type: %d\n", cb_dev[unit].dev_type);
-    printk("variant: %d\n", cb_dev[unit].var_type);
-
+#ifdef GENL_DEBUG
+    if (debug & GENL_DBG_LVL_VERB) {
+        printk("init_cb unit %d, dev %s dev_id: 0x%x variant %s\n",
+               dinfo->dev_no, dinfo->type_str, dinfo->dev_id, dinfo->var_str);
+        printk("dev_type: %d\n", cb_dev[unit].dev_type);
+        printk("variant: %d\n", cb_dev[unit].var_type);
+    }
+#endif /* GENL_DEBUG */
     cb_dev[unit].initialized = true;
-
 #ifdef KPMD
     init_match_ids(unit);
 #endif /* KPMD */
@@ -580,12 +785,11 @@ bcmgenl_init_module(void)
     ngknet_dev_init_cb_register(init_cb);
 
     bcmgenl_proc_init();
-#ifdef PACKET_SUPPORT
+#if 0
     bcmgenl_packet_init();
 #endif
-#ifdef PSAMPLE_SUPPORT
     bcmgenl_psample_init();
-#endif
+
     return 0;
 }
 
@@ -593,16 +797,12 @@ static void __exit
 bcmgenl_exit_module(void)
 {
     ngknet_dev_init_cb_unregister(init_cb);
-
-#ifdef PACKET_SUPPORT
+#if 0
     bcmgenl_packet_cleanup();
 #endif
-#ifdef PSAMPLE_SUPPORT
     bcmgenl_psample_cleanup();
-#endif
     bcmgenl_proc_cleanup();
 }
 
 module_init(bcmgenl_init_module);
 module_exit(bcmgenl_exit_module);
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.h b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.h
index a3aa8c1ce5cc..aa4adc24d28d 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMGENL_H
@@ -32,12 +32,27 @@
 
 /*! Module information */
 #define BCMGENL_MODULE_NAME     "linux_bcmgenl"
-
 /*! Use similar path to SDK6 genl psample path */
 #define BCM_PROCFS_NAME        "bcm"
 #define BCMGENL_PROCFS_NAME    "genl"
 #define BCMGENL_PROCFS_PATH    (BCM_PROCFS_NAME "/" BCMGENL_PROCFS_NAME)
 
+/*! set GENL_DEBUG for debug info */
+#define GENL_DEBUG
+#define GENL_DBG_LVL_VERB       0x0001
+#define GENL_DBG_LVL_PDMP       0x0002
+#define GENL_DBG_LVL_WARN       0x0004
+
+#ifdef GENL_DEBUG
+#define GENL_DBG_VERB(...) if (debug & GENL_DBG_LVL_VERB) printk (__VA_ARGS__);
+#define GENL_DBG_PDMP(...) if (debug & GENL_DBG_LVL_PDMP) printk (__VA_ARGS__);
+#define GENL_DBG_WARN(...) if (debug & GENL_DBG_LVL_WARN) printk (__VA_ARGS__);
+#else
+#define GENL_DBG_VERB(...)
+#define GENL_DBG_PDMP(...)
+#define GENL_DBG_WARN(...)
+#endif /* GENL_DEBUG */
+
 typedef struct {
     uint8_t cmic_type;
     uint8_t dcb_type;
@@ -51,7 +66,7 @@ typedef struct {
     struct list_head list;
     struct net_device *dev;
     uint16_t id;
-    uint8_t  port;
+    uint32_t port;
     uint16_t vlan;
     uint16_t qnum;
     uint32_t sample_rate; /* sFlow sample rate */
@@ -67,16 +82,22 @@ typedef struct {
     spinlock_t lock;
 } bcmgenl_info_t;
 
+/*! Destination port type */
 #define DSTPORT_TYPE_NONE    0
 #define DSTPORT_TYPE_DISCARD 1
 #define DSTPORT_TYPE_MC      2
 
+/*! Sampling type */
+#define SAMPLE_TYPE_NONE     0
+#define SAMPLE_TYPE_INGRESS  1
+#define SAMPLE_TYPE_EGRESS   2
+
 /*! generic netlink packet metadata */
 typedef struct bcmgenl_packet_meta_s {
     int ing_pp_port;
     int src_port;
     int dst_port;
-    int dst_port_type;
+    int dst_port_type; /* Destination port type */
     uint32_t trunk_id;
     uint64_t timestamp;
     /*
@@ -89,19 +110,13 @@ typedef struct bcmgenl_packet_meta_s {
     int tag_status;
     uint16_t proto;
     uint16_t vlan;
+    int sample_type; /* Sampling type */
 } bcmgenl_packet_meta_t;
 
-/*! generic netlink packet sampling metadata */
-typedef struct bcmgenl_psample_meta_s {
-    int sample_rate; /* Sampling rate */
-    int sample_size; /* Truncated size of sampled packet */
-} bcmgenl_psample_meta_t;
-
 /*! generic netlink packet info */
 typedef struct bcmgenl_pkt_s {
     struct net *netns; /* net namespace */
     bcmgenl_packet_meta_t meta;
-    bcmgenl_psample_meta_t psamp_meta;
 } bcmgenl_pkt_t;
 
 /*!
@@ -160,6 +175,6 @@ bcmgenl_pkt_package(
     last = ts.tv_sec; \
   } \
 }
-
 #endif /* KERNEL_VERSION(3,17,0) */
+
 #endif /* BCMGENL_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c
index 5290d9f4e013..4d097e7d052a 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <lkm/lkm.h>
@@ -29,7 +29,7 @@
 #include <linux/netdevice.h>
 #include <linux/skbuff.h>
 #include <linux/sched.h>
-
+#if 0
 /*! \cond */
 MODULE_AUTHOR("Broadcom Corporation");
 MODULE_DESCRIPTION("BCMGENL Module");
@@ -42,20 +42,9 @@ MODULE_LICENSE("GPL");
 
 #define BCMGENL_PACKET_NAME GENL_PACKET_NAME
 
-/* set BCMGENL_PACKET_CB_DBG for debug info */
-#define BCMGENL_PACKET_CB_DBG
-#ifdef BCMGENL_PACKET_CB_DBG
+#ifdef GENL_DEBUG
 static int debug;
-
-#define DBG_LVL_VERB    0x1
-#define DBG_LVL_PDMP    0x2
-#define BCMGENL_PACKET_DBG_VERB(...) \
-    if (debug & DBG_LVL_VERB) {      \
-        printk(__VA_ARGS__);         \
-    }
-#else
-#define BCMGENL_PACKET_DBG_VERB(...)
-#endif
+#endif /* GENL_DEBUG */
 
 #define BCMGENL_PACKET_QLEN_DFLT 1024
 static int bcmgenl_packet_qlen = BCMGENL_PACKET_QLEN_DFLT;
@@ -71,6 +60,7 @@ typedef struct bcmgenl_packet_stats_s {
     unsigned long pkts_f_packet_cb;
     unsigned long pkts_f_packet_mod;
     unsigned long pkts_f_handled;
+    unsigned long pkts_f_pass_through;
     unsigned long pkts_f_tag_checked;
     unsigned long pkts_f_tag_stripped;
     unsigned long pkts_f_dst_mc;
@@ -163,7 +153,7 @@ bcmgenl_packet_generic_meta_get(bcmgenl_pkt_t *bcmgenl_pkt, genl_packet_meta_t *
     bcmgenl_netif_t *bcmgenl_netif = NULL;
 
     if (!bcmgenl_pkt || !genl_packet_meta) {
-        printk("%s: bcmgenl_pkt or genl_packet_meta is NULL\n", __func__);
+        GENL_DBG_WARN("%s: bcmgenl_pkt or genl_packet_meta is NULL\n", __func__);
         return (-1);
     }
 
@@ -171,9 +161,8 @@ bcmgenl_packet_generic_meta_get(bcmgenl_pkt_t *bcmgenl_pkt, genl_packet_meta_t *
     srcport = bcmgenl_pkt->meta.src_port;
     dstport = bcmgenl_pkt->meta.dst_port;
     dstport_type = bcmgenl_pkt->meta.dst_port_type;
-    /* SDKLT-43751: Skip check of dstport on TD4/TH4 */
-    if (srcport == -1) {
-        printk("%s: invalid srcport %d\n", __func__, srcport);
+    if ((srcport == -1) || (dstport == -1)) {
+        GENL_DBG_WARN("%s: invalid srcport %d or dstport %d\n", __func__, srcport, dstport);
         return (-1);
     }
 
@@ -184,7 +173,7 @@ bcmgenl_packet_generic_meta_get(bcmgenl_pkt_t *bcmgenl_pkt, genl_packet_meta_t *
         } else {
             src_ifindex = -1;
             g_bcmgenl_packet_stats.pkts_d_meta_srcport++;
-            BCMGENL_PACKET_DBG_VERB("%s: could not find srcport(%d)\n", __func__, srcport);
+            GENL_DBG_VERB("%s: could not find srcport(%d)\n", __func__, srcport);
         }
     } else {
         g_bcmgenl_packet_stats.pkts_f_src_cpu++;
@@ -200,13 +189,13 @@ bcmgenl_packet_generic_meta_get(bcmgenl_pkt_t *bcmgenl_pkt, genl_packet_meta_t *
         } else {
             dst_ifindex = -1;
             g_bcmgenl_packet_stats.pkts_d_meta_dstport++;
-            BCMGENL_PACKET_DBG_VERB("%s: could not find dstport(%d)\n", __func__, dstport);
+            GENL_DBG_VERB("%s: could not find dstport(%d)\n", __func__, dstport);
         }
     } else if (dstport == 0) {
         g_bcmgenl_packet_stats.pkts_f_dst_cpu++;
     }
 
-    BCMGENL_PACKET_DBG_VERB
+    GENL_DBG_VERB
         ("%s: srcport %d, dstport %d, src_ifindex %d, dst_ifindex %d\n",
          __func__, srcport, dstport, src_ifindex, dst_ifindex);
 
@@ -222,28 +211,25 @@ bcmgenl_packet_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
     int rv = 0, dev_no, pkt_len;
     const struct ngknet_callback_desc *cbd = NULL;
     ngknet_filter_t *match_filt = NULL;
-    uint8_t *pkt_ptr = NULL;
     unsigned long flags;
     bcmgenl_pkt_t bcmgenl_pkt;
     genl_pkt_t *generic_pkt;
     bool strip_tag = false;
     struct sk_buff *skb_generic_pkt;
     static uint32_t last_drop, last_alloc, last_skb;
+    uint8_t *pkt;
 
     if (!skb) {
-        printk("%s: skb is NULL\n", __func__);
+        GENL_DBG_WARN("%s: skb is NULL\n", __func__);
         g_bcmgenl_packet_stats.pkts_d_skb++;
         return (NULL);
     }
     cbd = NGKNET_SKB_CB(skb);
     match_filt = cbd->filt;
-    /* SDKLT-43751: Get ptr offset to pkt payload to send to genetlink */
-    pkt_ptr = cbd->pmd + cbd->pmd_len;
-    pkt_len = skb->len - cbd->pmd_len;
 
     if (!cbd || !match_filt) {
-        printk("%s: cbd(0x%p) or match_filt(0x%p) is NULL\n",
-            __func__, cbd, match_filt);
+        GENL_DBG_WARN("%s: cbd(0x%p) or match_filt(0x%p) is NULL\n",
+                      __func__, cbd, match_filt);
         g_bcmgenl_packet_stats.pkts_d_skb_cbd++;
         return (skb);
     }
@@ -255,13 +241,15 @@ bcmgenl_packet_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
         return (skb);
     }
     dev_no = cbd->dinfo->dev_no;
+    pkt = cbd->pmd + cbd->pmd_len;
+    pkt_len = cbd->pkt_len;
 
-    BCMGENL_PACKET_DBG_VERB
+    GENL_DBG_VERB
         ("pkt size %d, match_filt->dest_id %d\n",
-         cbd->pkt_len, match_filt->dest_id);
-    BCMGENL_PACKET_DBG_VERB
+         pkt_len, match_filt->dest_id);
+    GENL_DBG_VERB
         ("filter user data: 0x%08x\n", *(uint32_t *)match_filt->user_data);
-    BCMGENL_PACKET_DBG_VERB
+    GENL_DBG_VERB
         ("filter_cb for dev %d: %s\n", dev_no, cbd->dinfo->type_str);
     g_bcmgenl_packet_stats.pkts_f_packet_cb++;
 
@@ -296,12 +284,12 @@ bcmgenl_packet_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
                              &g_bcmgenl_packet_info,
                              &bcmgenl_pkt);
     if (rv < 0) {
-        printk("%s: Could not parse pkt metadata\n", __func__);
+        GENL_DBG_WARN("%s: Could not parse pkt metadata\n", __func__);
         g_bcmgenl_packet_stats.pkts_d_metadata++;
         goto FILTER_CB_PKT_HANDLED;
     }
 
-    BCMGENL_PACKET_DBG_VERB
+    GENL_DBG_VERB
         ("%s: netns 0x%p, src_port %d, dst_port %d, dst_port_type %x\n",
          __func__,
          bcmgenl_pkt.netns,
@@ -315,7 +303,7 @@ bcmgenl_packet_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
     /* get generic_pkt generic metadata */
     rv = bcmgenl_packet_generic_meta_get(&bcmgenl_pkt, &generic_pkt->meta);
     if (rv < 0) {
-        printk("%s: Could not parse pkt metadata\n", __func__);
+        GENL_DBG_WARN("%s: Could not parse pkt metadata\n", __func__);
         g_bcmgenl_packet_stats.pkts_d_metadata++;
         goto FILTER_CB_PKT_HANDLED;
     }
@@ -330,7 +318,7 @@ bcmgenl_packet_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
         if (strip_tag) {
             pkt_len -= 4;
         }
-         g_bcmgenl_packet_stats.pkts_f_tag_checked++;
+        g_bcmgenl_packet_stats.pkts_f_tag_checked++;
     }
 
     if ((skb_generic_pkt = dev_alloc_skb(pkt_len)) == NULL)
@@ -343,18 +331,20 @@ bcmgenl_packet_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
         goto FILTER_CB_PKT_HANDLED;
     }
 
-    /* SDKLT-43751: Use ptr offset to pkt payload to send to genetlink */
     /* setup skb by copying packet content */
     if (strip_tag) {
-        memcpy(skb_generic_pkt->data, pkt_ptr, 12);
-        memcpy(skb_generic_pkt->data + 12, pkt_ptr + 16, pkt_len - 12);
+        memcpy(skb_generic_pkt->data, pkt, 12);
+        memcpy(skb_generic_pkt->data + 12, pkt + 16, pkt_len - 12);
         g_bcmgenl_packet_stats.pkts_f_tag_stripped++;
     } else {
-        memcpy(skb_generic_pkt->data, pkt_ptr, pkt_len);
+        memcpy(skb_generic_pkt->data, pkt, pkt_len);
     }
     skb_put(skb_generic_pkt, pkt_len);
     skb_generic_pkt->len = pkt_len;
     generic_pkt->skb = skb_generic_pkt;
+    if (debug & GENL_DBG_LVL_PDMP) {
+        dump_skb(skb_generic_pkt);
+    }
     /* generic_pkt end */
 
     spin_lock_irqsave(&g_bcmgenl_packet_work.lock, flags);
@@ -382,7 +372,14 @@ bcmgenl_packet_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
     rv = 1;
 
 FILTER_CB_PKT_HANDLED:
-    g_bcmgenl_packet_stats.pkts_f_handled++;
+    if (rv == 1) {
+        g_bcmgenl_packet_stats.pkts_f_handled++;
+        /* Not sending to network protocol stack */
+        dev_kfree_skb_any(skb);
+        skb = NULL;
+    } else {
+        g_bcmgenl_packet_stats.pkts_f_pass_through++;
+    }
     return skb;
 }
 
@@ -405,7 +402,7 @@ bcmgenl_packet_task(struct work_struct *work)
 
         /* send generic_pkt to generic netlink */
         if (pkt) {
-            BCMGENL_PACKET_DBG_VERB
+            GENL_DBG_VERB
                 ("%s: netns 0x%p, in_ifindex %d, out_ifindex %d, context 0x%08x\n",
                  __func__,
                  pkt->netns,
@@ -436,32 +433,31 @@ bcmgenl_packet_netif_create_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif)
     unsigned long flags;
 
     if (!dinfo) {
-        printk("%s: dinfo is NULL\n", __func__);
+        GENL_DBG_WARN("%s: dinfo is NULL\n", __func__);
         return (-1);
     }
     if (netif->id == 0) {
-        printk("%s: netif->id == 0 is not a valid interface ID\n", __func__);
+        GENL_DBG_WARN("%s: netif->id == 0 is not a valid interface ID\n", __func__);
         return (-1);
     }
     if ((new_netif = kmalloc(sizeof(bcmgenl_netif_t), GFP_ATOMIC)) == NULL) {
-        printk("%s: failed to alloc psample mem for netif '%s'\n",
-               __func__, netif->name);
+        GENL_DBG_WARN("%s: failed to alloc psample mem for netif '%s'\n",
+                      __func__, netif->name);
         return (-1);
     }
 
     spin_lock_irqsave(&g_bcmgenl_packet_info.lock, flags);
-    
     new_netif->dev = dinfo->vdev[netif->id];
     new_netif->id = netif->id;
-    new_netif->vlan = netif->vlan;
     new_netif->port = netif->port;
+    new_netif->vlan = netif->vlan;
+
     /* insert netif sorted by ID similar to ngknet_netif_create() */
     found = false;
     list_for_each(list, &g_bcmgenl_packet_info.netif_list) {
         lbcmgenl_netif = (bcmgenl_netif_t *)list;
         if (netif->id < lbcmgenl_netif->id) {
             found = true;
-            g_bcmgenl_packet_info.netif_count++;
             break;
         }
     }
@@ -473,10 +469,11 @@ bcmgenl_packet_netif_create_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif)
         /* No holes - add to end of list */
         list_add_tail(&new_netif->list, &g_bcmgenl_packet_info.netif_list);
     }
-
+    g_bcmgenl_packet_info.netif_count++;
     spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags);
 
-    BCMGENL_PACKET_DBG_VERB("%s: added netlink packet netif '%s'\n", __func__, netif->name);
+    GENL_DBG_VERB
+        ("%s: added netlink packet netif '%s'\n", __func__, netif->name);
     return (0);
 }
 
@@ -489,10 +486,14 @@ bcmgenl_packet_netif_destroy_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif)
     unsigned long flags;
 
     if (!dinfo || !netif) {
-        printk("%s: dinfo or netif is NULL\n", __func__);
+        GENL_DBG_WARN("%s: dinfo or netif is NULL\n", __func__);
         return (-1);
     }
 
+    if (g_bcmgenl_packet_info.netif_count == 0) {
+        GENL_DBG_WARN("%s: no netif is created\n", __func__);
+        return (0);
+    }
     spin_lock_irqsave(&g_bcmgenl_packet_info.lock, flags);
 
     list_for_each(list, &g_bcmgenl_packet_info.netif_list) {
@@ -500,7 +501,8 @@ bcmgenl_packet_netif_destroy_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif)
         if (netif->id == lbcmgenl_netif->id) {
             found = true;
             list_del(&lbcmgenl_netif->list);
-            BCMGENL_PACKET_DBG_VERB("%s: removing psample netif '%s'\n", __func__, netif->name);
+            GENL_DBG_VERB
+                ("%s: removing generic netif '%s'\n", __func__, netif->name);
             kfree(lbcmgenl_netif);
             g_bcmgenl_packet_info.netif_count--;
             break;
@@ -510,7 +512,7 @@ bcmgenl_packet_netif_destroy_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif)
     spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags);
 
     if (!found) {
-        printk("%s: netif ID %d not found!\n", __func__, netif->id);
+        GENL_DBG_WARN("%s: netif ID %d not found!\n", __func__, netif->id);
         return (-1);
     }
     return (0);
@@ -565,6 +567,7 @@ bcmgenl_packet_proc_stats_show(struct seq_file *m, void *v)
     seq_printf(m, "  pkts filter generic cb         %10lu\n", g_bcmgenl_packet_stats.pkts_f_packet_cb);
     seq_printf(m, "  pkts sent to generic module    %10lu\n", g_bcmgenl_packet_stats.pkts_f_packet_mod);
     seq_printf(m, "  pkts handled by generic cb     %10lu\n", g_bcmgenl_packet_stats.pkts_f_handled);
+    seq_printf(m, "  pkts pass through              %10lu\n", g_bcmgenl_packet_stats.pkts_f_pass_through);
     seq_printf(m, "  pkts with vlan tag checked     %10lu\n", g_bcmgenl_packet_stats.pkts_f_tag_checked);
     seq_printf(m, "  pkts with vlan tag stripped    %10lu\n", g_bcmgenl_packet_stats.pkts_f_tag_stripped);
     seq_printf(m, "  pkts with mc destination       %10lu\n", g_bcmgenl_packet_stats.pkts_f_dst_mc);
@@ -678,7 +681,7 @@ bcmgenl_packet_proc_debug_write(
         ptr += 6;
         debug = simple_strtol(ptr, NULL, 0);
     } else {
-        printk("Warning: unknown configuration setting\n");
+        GENL_DBG_WARN("Warning: unknown configuration setting\n");
     }
 
     return count;
@@ -782,11 +785,11 @@ genl_cb_init(void)
     /* get net namespace */
     g_bcmgenl_packet_info.netns = get_net_ns_by_pid(current->pid);
     if (!g_bcmgenl_packet_info.netns) {
-        printk("%s: Could not get network namespace for pid %d\n",
-               __func__, current->pid);
+        GENL_DBG_WARN("%s: Could not get network namespace for pid %d\n",
+                      __func__, current->pid);
         return (-1);
     }
-    BCMGENL_PACKET_DBG_VERB
+    GENL_DBG_VERB
         ("%s: current->pid %d, netns 0x%p\n",
          __func__, current->pid, g_bcmgenl_packet_info.netns);
     return 0;
@@ -815,3 +818,4 @@ int bcmgenl_packet_init(void)
 
 EXPORT_SYMBOL(bcmgenl_packet_cleanup);
 EXPORT_SYMBOL(bcmgenl_packet_init);
+#endif
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.h b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.h
index 3ef3fe87d23a..b403ca40c545 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMGENL_PACKET_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c
index 27944af15484..90060e69d821 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <lkm/lkm.h>
@@ -38,35 +38,25 @@ MODULE_LICENSE("GPL");
 
 #include <bcmgenl.h>
 #include <bcmgenl_psample.h>
-
 #if BCMGENL_PSAMPLE_SUPPORT
+
 #include <net/psample.h>
 #define BCMGENL_PSAMPLE_NAME PSAMPLE_GENL_NAME
 
-/* set BCMGENL_PSAMPLE_CB_DBG for debug info */
-#define BCMGENL_PSAMPLE_CB_DBG
-#ifdef BCMGENL_PSAMPLE_CB_DBG
+#ifdef GENL_DEBUG
 static int debug;
-
-#define DBG_LVL_VERB    0x1
-#define DBG_LVL_PDMP    0x2
-#define BCMGENL_PSAMPLE_DBG_VERB(...) \
-    if (debug & DBG_LVL_VERB) {       \
-        printk(__VA_ARGS__);          \
-    }
-#else
-#define BCMGENL_PSAMPLE_DBG_VERB(...)
-#endif
-
-
+#endif /* GENL_DEBUG */
 
 #define FCS_SZ 4
 
-#define PSAMPLE_NLA_PADDING 4
 #define PSAMPLE_PKT_HANDLED (1)
-
+/* These below need to match incoming enum values */
+#define PSAMPLE_FILTER_TAG_STRIP 0
+#define PSAMPLE_FILTER_TAG_KEEP  1
+#define PSAMPLE_FILTER_TAG_ORIGINAL 2
 #define PSAMPLE_RATE_DFLT 1
 #define PSAMPLE_SIZE_DFLT 128
+
 static int psample_size = PSAMPLE_SIZE_DFLT;
 MODULE_PARAM(psample_size, int, 0);
 MODULE_PARM_DESC(psample_size,
@@ -77,6 +67,23 @@ static int bcmgenl_psample_qlen = BCMGENL_PSAMPLE_QLEN_DFLT;
 MODULE_PARAM(bcmgenl_psample_qlen, int, 0);
 MODULE_PARM_DESC(bcmgenl_psample_qlen, "psample queue length (default 1024 buffers)");
 
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0))
+static inline void
+bcmgenl_sample_packet(struct psample_group *group, struct sk_buff *skb,
+                      u32 trunc_size, int in_ifindex, int out_ifindex,
+                      u32 sample_rate)
+{
+    struct psample_metadata md = {};
+
+    md.trunc_size = trunc_size;
+    md.in_ifindex = in_ifindex;
+    md.out_ifindex = out_ifindex;
+    psample_sample_packet(group, skb, sample_rate, &md);
+}
+#else
+#define bcmgenl_sample_packet psample_sample_packet
+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) */
+
 static bcmgenl_info_t g_bcmgenl_psample_info = {{0}};
 
 /* Maintain sampled pkt statistics */
@@ -85,6 +92,8 @@ typedef struct psample_stats_s {
     unsigned long pkts_f_psample_mod;
     unsigned long pkts_f_handled;
     unsigned long pkts_f_pass_through;
+    unsigned long pkts_f_tag_checked;
+    unsigned long pkts_f_tag_stripped;
     unsigned long pkts_f_dst_mc;
     unsigned long pkts_f_dst_cpu;
     unsigned long pkts_c_qlen_cur;
@@ -100,6 +109,7 @@ typedef struct psample_stats_s {
     unsigned long pkts_d_meta_srcport;
     unsigned long pkts_d_meta_dstport;
     unsigned long pkts_d_invalid_size;
+    unsigned long pkts_d_psample_only;
 } bcmgenl_psample_stats_t;
 static bcmgenl_psample_stats_t g_bcmgenl_psample_stats = {0};
 
@@ -108,15 +118,14 @@ typedef struct psample_meta_s {
     int src_ifindex;
     int dst_ifindex;
     int sample_rate;
+    int sample_type;
 } psample_meta_t;
 
 typedef struct psample_pkt_s {
     struct list_head list;
     psample_meta_t meta;
     struct sk_buff *skb;
-#if IS_ENABLED(CONFIG_PSAMPLE)
     struct psample_group *group;
-#endif /* CONFIG_PSAMPLE */
 } psample_pkt_t;
 
 typedef struct bcmgenl_psample_work_s {
@@ -138,7 +147,7 @@ psample_netif_lookup_by_ifindex(int ifindex)
     bcmgenl_netif_t *bcmgenl_netif = NULL;
     unsigned long flags;
 
-    /* look for port from list of available net_devices */
+    /* look for ifindex from list of available net_devices */
     spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags);
     list_for_each(list, &g_bcmgenl_psample_info.netif_list) {
         bcmgenl_netif = (bcmgenl_netif_t*)list;
@@ -186,13 +195,13 @@ bcmgenl_psample_meta_get(struct sk_buff *skb, bcmgenl_pkt_t *bcmgenl_pkt, psampl
         return (-1);
     }
     cbd = NGKNET_SKB_CB(skb);
+
     /* get src and dst ports */
     srcport = bcmgenl_pkt->meta.src_port;
     dstport = bcmgenl_pkt->meta.dst_port;
     dstport_type = bcmgenl_pkt->meta.dst_port_type;
-    /* SDKLT-43751: Skip check of dstport on TD4/TH4 */
-    if (srcport == -1) {
-        printk("%s: invalid srcport %d\n", __func__, srcport);
+    if ((srcport == -1) || (dstport == -1)) {
+        GENL_DBG_WARN("%s: invalid srcport %d or dstport %d\n", __func__, srcport, dstport);
         return (-1);
     }
 
@@ -203,27 +212,40 @@ bcmgenl_psample_meta_get(struct sk_buff *skb, bcmgenl_pkt_t *bcmgenl_pkt, psampl
         sample_size = psample_netif->sample_size;
     } else {
         g_bcmgenl_psample_stats.pkts_d_meta_srcport++;
-        BCMGENL_PSAMPLE_DBG_VERB("%s: could not find psample netif for src dev %s (ifidx %d)\n",
-                                 __func__, cbd->net_dev->name, src_ifindex);
+        GENL_DBG_VERB("%s: could not find psample netif for src dev %s (ifidx %d)\n",
+                      __func__, cbd->net_dev->name, src_ifindex);
     }
 
+    /*
+     * Identify these packets uniquely.
+     * 1) Packet forwarded over front panel port   = dst_ifindex
+     * 2) Packet dropped in forwarding and sampled = 0xffff
+     * 3) else CPU destination                     = 0
+     */
+
     /* set generic dst type for MC pkts */
     if (dstport_type == DSTPORT_TYPE_MC) {
         g_bcmgenl_psample_stats.pkts_f_dst_mc++;
-    } else if (dstport != 0) {
+    } else if ((dstport != 0) &&
+               (psample_netif = psample_netif_lookup_by_port(dstport))) {
         /* find dst port netif for UC pkts (no need to lookup CPU port) */
-        if ((psample_netif = psample_netif_lookup_by_port(dstport))) {
-            dst_ifindex = psample_netif->dev->ifindex;
-        } else {
-            dst_ifindex = -1;
-            g_bcmgenl_psample_stats.pkts_d_meta_dstport++;
-            BCMGENL_PSAMPLE_DBG_VERB("%s: could not find dstport(%d)\n", __func__, dstport);
-        }
+        dst_ifindex = psample_netif->dev->ifindex;
+    } else if (bcmgenl_pkt->meta.sample_type != SAMPLE_TYPE_NONE) {
+        dst_ifindex = 0xffff;
+        g_bcmgenl_psample_stats.pkts_d_psample_only++;
     } else if (dstport == 0) {
+        dst_ifindex = 0;
         g_bcmgenl_psample_stats.pkts_f_dst_cpu++;
+    } else {
+        g_bcmgenl_psample_stats.pkts_d_meta_dstport++;
+        GENL_DBG_VERB("%s: could not find dstport(%d)\n", __func__, dstport);
     }
-
-    BCMGENL_PSAMPLE_DBG_VERB
+    GENL_DBG_VERB
+        ("Sample type %s",
+         (bcmgenl_pkt->meta.sample_type == SAMPLE_TYPE_NONE ? "Not sampled" :
+          bcmgenl_pkt->meta.sample_type == SAMPLE_TYPE_INGRESS ?
+          "Ingress sampled" : "Egress sampled"));
+    GENL_DBG_VERB
         ("%s: srcport %d, dstport %d, src_ifindex %d, dst_ifindex %d\n",
          __func__, srcport, dstport, src_ifindex, dst_ifindex);
 
@@ -232,6 +254,7 @@ bcmgenl_psample_meta_get(struct sk_buff *skb, bcmgenl_pkt_t *bcmgenl_pkt, psampl
     sflow_meta->dst_ifindex = dst_ifindex;
     sflow_meta->trunc_size  = sample_size;
     sflow_meta->sample_rate = sample_rate;
+    sflow_meta->sample_type = bcmgenl_pkt->meta.sample_type;
     return (0);
 }
 
@@ -242,27 +265,23 @@ bcmgenl_psample_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
     const struct ngknet_callback_desc *cbd = NULL;
     ngknet_filter_t *match_filt = NULL;
     psample_meta_t meta;
-    uint8_t *pkt_ptr = NULL;
     bcmgenl_pkt_t bcmgenl_pkt;
+    bool strip_tag = false;
     static uint32_t last_drop, last_alloc, last_skb;
-#if IS_ENABLED(CONFIG_PSAMPLE)
+    uint8_t *pkt;
     struct psample_group *group;
-#endif /* CONFIG_PSAMPLE */
 
     if (!skb) {
-        printk("%s: skb is NULL\n", __func__);
+        GENL_DBG_WARN("%s: skb is NULL\n", __func__);
         g_bcmgenl_psample_stats.pkts_d_skb++;
         return (NULL);
     }
     cbd = NGKNET_SKB_CB(skb);
     match_filt = cbd->filt;
-    /* SDKLT-43751: Get ptr offset to pkt payload to send to genetlink */
-    pkt_ptr = cbd->pmd + cbd->pmd_len;
-    pkt_len = skb->len - cbd->pmd_len;
 
     if (!cbd || !match_filt) {
-        printk("%s: cbd(0x%p) or match_filt(0x%p) is NULL\n",
-            __func__, cbd, match_filt);
+        GENL_DBG_WARN("%s: cbd(0x%p) or match_filt(0x%p) is NULL\n",
+                      __func__, cbd, match_filt);
         g_bcmgenl_psample_stats.pkts_d_skb_cbd++;
         return (skb);
     }
@@ -274,16 +293,26 @@ bcmgenl_psample_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
         return (skb);
     }
     dev_no = cbd->dinfo->dev_no;
+    pkt = cbd->pmd + cbd->pmd_len;
+    pkt_len = cbd->pkt_len;
 
-    BCMGENL_PSAMPLE_DBG_VERB
-        ("pkt size %d, match_filt->dest_id %d\n", cbd->pkt_len, match_filt->dest_id);
-    BCMGENL_PSAMPLE_DBG_VERB
+    GENL_DBG_VERB
+        ("pkt size %d, match_filt->dest_id %d\n",
+         pkt_len, match_filt->dest_id);
+    GENL_DBG_VERB
         ("filter user data: 0x%08x\n", *(uint32_t *)match_filt->user_data);
-    BCMGENL_PSAMPLE_DBG_VERB
+    GENL_DBG_VERB
         ("filter_cb for dev %d: %s\n", dev_no, cbd->dinfo->type_str);
     g_bcmgenl_psample_stats.pkts_f_psample_cb++;
 
-#if IS_ENABLED(CONFIG_PSAMPLE)
+    /* Adjust original pkt_len to remove 4B FCS */
+    if (pkt_len < FCS_SZ) {
+        g_bcmgenl_psample_stats.pkts_d_invalid_size++;
+        goto PSAMPLE_FILTER_CB_PKT_HANDLED;
+    } else {
+       pkt_len -= FCS_SZ;
+    }
+
     /* get psample group info. psample genetlink group ID passed in match_filt->dest_id */
     group = psample_group_get(g_bcmgenl_psample_info.netns, match_filt->dest_id);
     if (!group) {
@@ -291,18 +320,17 @@ bcmgenl_psample_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
         g_bcmgenl_psample_stats.pkts_d_no_group++;
         goto PSAMPLE_FILTER_CB_PKT_HANDLED;
     }
-#endif /* CONFIG_PSAMPLE */
     /* get packet metadata */
     rv = bcmgenl_pkt_package(dev_no, skb,
                              &g_bcmgenl_psample_info,
                              &bcmgenl_pkt);
     if (rv < 0) {
-        printk("%s: Could not parse pkt metadata\n", __func__);
+        GENL_DBG_WARN("%s: Could not parse pkt metadata\n", __func__);
         g_bcmgenl_psample_stats.pkts_d_metadata++;
         goto PSAMPLE_FILTER_CB_PKT_HANDLED;
     }
 
-    BCMGENL_PSAMPLE_DBG_VERB
+    GENL_DBG_VERB
         ("%s: netns 0x%p, src_port %d, dst_port %d, dst_port_type %x\n",
          __func__,
          bcmgenl_pkt.netns,
@@ -313,32 +341,46 @@ bcmgenl_psample_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
     /* get psample metadata */
     rv = bcmgenl_psample_meta_get(skb, &bcmgenl_pkt, &meta);
     if (rv < 0) {
-        printk("%s: Could not parse pkt metadata\n", __func__);
+        GENL_DBG_WARN("%s: Could not parse pkt metadata\n", __func__);
         g_bcmgenl_psample_stats.pkts_d_metadata++;
         goto PSAMPLE_FILTER_CB_PKT_HANDLED;
     }
 
-    /* Adjust original pkt pkt_len to remove 4B FCS */
-    if (pkt_len < FCS_SZ) {
-        g_bcmgenl_psample_stats.pkts_d_invalid_size++;
-        goto PSAMPLE_FILTER_CB_PKT_HANDLED;
-    } else {
-       pkt_len -= FCS_SZ;
+    if (pkt_len >= 16) {
+        uint16_t proto = bcmgenl_pkt.meta.proto;
+        uint16_t vlan = bcmgenl_pkt.meta.vlan;
+        strip_tag = (vlan == 0xFFF) &&
+                    ((proto == 0x8100) || (proto == 0x88a8) ||
+                     (proto == 0x9100));
+        if (SAMPLE_TYPE_NONE != bcmgenl_pkt.meta.sample_type &&
+           ((proto == 0x8100) || (proto == 0x88a8) || (proto == 0x9100))) {
+            if (PSAMPLE_FILTER_TAG_ORIGINAL == cbd->filt->user_data[0]) {
+                if (bcmgenl_pkt.meta.tag_status < 0) {
+                    g_bcmgenl_psample_stats.pkts_f_tag_checked++;
+                } else if (bcmgenl_pkt.meta.tag_status < 2){
+                    strip_tag = 1;
+                }
+            } else if (PSAMPLE_FILTER_TAG_STRIP == cbd->filt->user_data[0]) {
+                strip_tag = 1;
+            }
+        }
+        if (strip_tag) {
+            pkt_len -= 4;
+        }
+        g_bcmgenl_psample_stats.pkts_f_tag_checked++;
     }
 
     /* Account for padding in libnl used by psample */
     if (meta.trunc_size >= pkt_len) {
-        meta.trunc_size = pkt_len - PSAMPLE_NLA_PADDING;
+        meta.trunc_size = pkt_len;
     }
-    BCMGENL_PSAMPLE_DBG_VERB
+    GENL_DBG_VERB
         ("%s: trunc_size %d, sample_rate %d "
          "src_ifindex %d, dst_ifindex %d\n",
          __func__, meta.trunc_size, meta.sample_rate,
          meta.src_ifindex, meta.dst_ifindex);
-#if IS_ENABLED(CONFIG_PSAMPLE)
-    BCMGENL_PSAMPLE_DBG_VERB
+    GENL_DBG_VERB
         ("%s: group 0x%x\n", __func__, group->group_num);
-#endif /* CONFIG_PSAMPLE */
 
     /* drop if configured sample rate is 0 */
     if (meta.sample_rate > 0) {
@@ -364,10 +406,10 @@ bcmgenl_psample_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
                  __func__, g_bcmgenl_psample_stats.pkts_d_no_mem);
             goto PSAMPLE_FILTER_CB_PKT_HANDLED;
         }
+
+        /* psample_pkt start */
         memcpy(&psample_pkt->meta, &meta, sizeof(psample_meta_t));
-#if IS_ENABLED(CONFIG_PSAMPLE)
         psample_pkt->group = group;
-#endif /* CONFIG_PSAMPLE */
         if ((skb_psample = dev_alloc_skb(meta.trunc_size)) == NULL) {
             g_bcmgenl_psample_stats.pkts_d_no_mem++;
             last_skb = 0;
@@ -377,12 +419,21 @@ bcmgenl_psample_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
             goto PSAMPLE_FILTER_CB_PKT_HANDLED;
         }
 
-        /* SDKLT-43751: Use ptr offset to pkt payload to send to genetlink */
         /* setup skb to point to pkt */
-        memcpy(skb_psample->data, pkt_ptr, meta.trunc_size);
+        if (strip_tag) {
+            memcpy(skb_psample->data, pkt, 12);
+            memcpy(skb_psample->data + 12, pkt + 16, meta.trunc_size - 12);
+            g_bcmgenl_psample_stats.pkts_f_tag_stripped++;
+        } else {
+            memcpy(skb_psample->data, pkt, meta.trunc_size);
+        }
         skb_put(skb_psample, meta.trunc_size);
         skb_psample->len = pkt_len;
         psample_pkt->skb = skb_psample;
+        if (debug & GENL_DBG_LVL_PDMP) {
+            dump_skb(skb_psample);
+        }
+        /* psample_pkt end */
 
         spin_lock_irqsave(&g_bcmgenl_psample_work.lock, flags);
         list_add_tail(&psample_pkt->list, &g_bcmgenl_psample_work.pkt_list);
@@ -399,14 +450,22 @@ bcmgenl_psample_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
     }
 
 PSAMPLE_FILTER_CB_PKT_HANDLED:
-    g_bcmgenl_psample_stats.pkts_f_pass_through++;
+    if (bcmgenl_pkt.meta.sample_type != SAMPLE_TYPE_NONE) {
+        g_bcmgenl_psample_stats.pkts_f_handled++;
+        /* Not sending to network protocol stack */
+        dev_kfree_skb_any(skb);
+        skb = NULL;
+    } else {
+        g_bcmgenl_psample_stats.pkts_f_pass_through++;
+    }
     return skb;
 }
 
 static void
 bcmgenl_psample_task(struct work_struct *work)
 {
-    bcmgenl_psample_work_t *psample_work = container_of(work, bcmgenl_psample_work_t, wq);
+    bcmgenl_psample_work_t *psample_work =
+        container_of(work, bcmgenl_psample_work_t, wq);
     unsigned long flags;
     struct list_head *list_ptr, *list_next;
     psample_pkt_t *pkt;
@@ -421,32 +480,19 @@ bcmgenl_psample_task(struct work_struct *work)
 
         /* send generic_pkt to generic netlink */
         if (pkt) {
-#if ((IS_ENABLED(CONFIG_PSAMPLE) && LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) || \
-     (defined PSAMPLE_MD_EXTENDED_ATTR && PSAMPLE_MD_EXTENDED_ATTR))
-            struct psample_metadata md = {0};
-            md.trunc_size = pkt->meta.trunc_size;
-            md.in_ifindex = pkt->meta.src_ifindex;
-            md.out_ifindex = pkt->meta.dst_ifindex;
-#endif
-            BCMGENL_PSAMPLE_DBG_VERB
+            GENL_DBG_VERB
                 ("%s: trunc_size %d, sample_rate %d,"
-                 "src_ifindex %d, dst_ifindex %d group 0x%x\n",
+                 "src_ifindex %d, dst_ifindex %d\n",
                  __func__, pkt->meta.trunc_size, pkt->meta.sample_rate,
-                 pkt->meta.src_ifindex, pkt->meta.dst_ifindex, pkt->group->group_num);
-#if ((IS_ENABLED(CONFIG_PSAMPLE) && LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) || \
-     (defined PSAMPLE_MD_EXTENDED_ATTR && PSAMPLE_MD_EXTENDED_ATTR))
-            psample_sample_packet(pkt->group, 
-                                  pkt->skb,
-                                  pkt->meta.sample_rate,
-                                  &md);
-#else
-            psample_sample_packet(pkt->group,
+                 pkt->meta.src_ifindex, pkt->meta.dst_ifindex);
+            GENL_DBG_VERB
+                ("%s: group 0x%x\n", __func__, pkt->group->group_num);
+            bcmgenl_sample_packet(pkt->group,
                                   pkt->skb,
                                   pkt->meta.trunc_size,
                                   pkt->meta.src_ifindex,
                                   pkt->meta.dst_ifindex,
                                   pkt->meta.sample_rate);
-#endif /* CONFIG_PSAMPLE */
             g_bcmgenl_psample_stats.pkts_f_psample_mod++;
 
             dev_kfree_skb_any(pkt->skb);
@@ -466,16 +512,16 @@ bcmgenl_psample_netif_create_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif)
     unsigned long flags;
 
     if (!dinfo) {
-        printk("%s: dinfo is NULL\n", __func__);
+        GENL_DBG_WARN("%s: dinfo is NULL\n", __func__);
         return (-1);
     }
     if (netif->id == 0) {
-        printk("%s: netif->id == 0 is not a valid interface ID\n", __func__);
+        GENL_DBG_WARN("%s: netif->id == 0 is not a valid interface ID\n", __func__);
         return (-1);
     }
     if ((new_netif = kmalloc(sizeof(bcmgenl_netif_t), GFP_ATOMIC)) == NULL) {
-        printk("%s: failed to alloc psample mem for netif '%s'\n",
-               __func__, netif->name);
+        GENL_DBG_WARN("%s: failed to alloc psample mem for netif '%s'\n",
+                      __func__, netif->name);
         return (-1);
     }
 
@@ -493,7 +539,6 @@ bcmgenl_psample_netif_create_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif)
         lbcmgenl_netif = (bcmgenl_netif_t*)list;
         if (netif->id < lbcmgenl_netif->id) {
             found = true;
-            g_bcmgenl_psample_info.netif_count++;
             break;
         }
     }
@@ -505,10 +550,10 @@ bcmgenl_psample_netif_create_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif)
         /* No holes - add to end of list */
         list_add_tail(&new_netif->list, &g_bcmgenl_psample_info.netif_list);
     }
-
+    g_bcmgenl_psample_info.netif_count++;
     spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags);
 
-    BCMGENL_PSAMPLE_DBG_VERB
+    GENL_DBG_VERB
         ("%s: added netlink psample netif '%s'\n", __func__, netif->name);
     return (0);
 }
@@ -522,10 +567,13 @@ bcmgenl_psample_netif_destroy_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif
     unsigned long flags;
 
     if (!dinfo || !netif) {
-        printk("%s: dinfo or netif is NULL\n", __func__);
+        GENL_DBG_WARN("%s: dinfo or netif is NULL\n", __func__);
         return (-1);
     }
-
+    if (g_bcmgenl_psample_info.netif_count == 0) {
+        GENL_DBG_WARN("%s: no netif is created\n", __func__);
+        return (0);
+    }
     spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags);
 
     list_for_each(list, &g_bcmgenl_psample_info.netif_list) {
@@ -533,7 +581,7 @@ bcmgenl_psample_netif_destroy_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif
         if (netif->id == lbcmgenl_netif->id) {
             found = true;
             list_del(&lbcmgenl_netif->list);
-            BCMGENL_PSAMPLE_DBG_VERB
+            GENL_DBG_VERB
                 ("%s: removing psample netif '%s'\n", __func__, netif->name);
             kfree(lbcmgenl_netif);
             g_bcmgenl_psample_info.netif_count--;
@@ -544,7 +592,7 @@ bcmgenl_psample_netif_destroy_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif
     spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags);
 
     if (!found) {
-        printk("%s: netif ID %d not found!\n", __func__, netif->id);
+        GENL_DBG_WARN("%s: netif ID %d not found!\n", __func__, netif->id);
         return (-1);
     }
     return (0);
@@ -844,7 +892,7 @@ bcmgenl_psample_proc_debug_write(
         ptr += 6;
         debug = simple_strtol(ptr, NULL, 0);
     } else {
-        printk("Warning: unknown configuration setting\n");
+        GENL_DBG_WARN("Warning: unknown configuration setting\n");
     }
 
     return count;
@@ -867,6 +915,8 @@ bcmgenl_psample_proc_stats_show(struct seq_file *m, void *v)
     seq_printf(m, "  pkts sent to psample module    %10lu\n", g_bcmgenl_psample_stats.pkts_f_psample_mod);
     seq_printf(m, "  pkts handled by psample        %10lu\n", g_bcmgenl_psample_stats.pkts_f_handled);
     seq_printf(m, "  pkts pass through              %10lu\n", g_bcmgenl_psample_stats.pkts_f_pass_through);
+    seq_printf(m, "  pkts with vlan tag checked     %10lu\n", g_bcmgenl_psample_stats.pkts_f_tag_checked);
+    seq_printf(m, "  pkts with vlan tag stripped    %10lu\n", g_bcmgenl_psample_stats.pkts_f_tag_stripped);
     seq_printf(m, "  pkts with mc destination       %10lu\n", g_bcmgenl_psample_stats.pkts_f_dst_mc);
     seq_printf(m, "  pkts current queue length      %10lu\n", g_bcmgenl_psample_stats.pkts_c_qlen_cur);
     seq_printf(m, "  pkts high queue length         %10lu\n", g_bcmgenl_psample_stats.pkts_c_qlen_hi);
@@ -881,6 +931,7 @@ bcmgenl_psample_proc_stats_show(struct seq_file *m, void *v)
     seq_printf(m, "  pkts with invalid src port     %10lu\n", g_bcmgenl_psample_stats.pkts_d_meta_srcport);
     seq_printf(m, "  pkts with invalid dst port     %10lu\n", g_bcmgenl_psample_stats.pkts_d_meta_dstport);
     seq_printf(m, "  pkts with invalid orig pkt sz  %10lu\n", g_bcmgenl_psample_stats.pkts_d_invalid_size);
+    seq_printf(m, "  pkts with psample only reason  %10lu\n", g_bcmgenl_psample_stats.pkts_d_psample_only);
     return 0;
 }
 
@@ -1029,11 +1080,11 @@ psample_cb_init(void)
     /* get net namespace */
     g_bcmgenl_psample_info.netns = get_net_ns_by_pid(current->pid);
     if (!g_bcmgenl_psample_info.netns) {
-        printk("%s: Could not get network namespace for pid %d\n",
-               __func__, current->pid);
+        GENL_DBG_WARN("%s: Could not get network namespace for pid %d\n",
+                      __func__, current->pid);
         return (-1);
     }
-    BCMGENL_PSAMPLE_DBG_VERB
+    GENL_DBG_VERB
         ("%s: current->pid %d, netns 0x%p, sample_size %d\n",
          __func__, current->pid, g_bcmgenl_psample_info.netns, psample_size);
     return 0;
@@ -1056,11 +1107,9 @@ int bcmgenl_psample_init(void)
     ngknet_netif_destroy_cb_register(bcmgenl_psample_netif_destroy_cb);
     ngknet_filter_cb_register_by_name
         (bcmgenl_psample_filter_cb, BCMGENL_PSAMPLE_NAME);
-
     psample_cb_proc_init();
     return psample_cb_init();
 }
-
 #else
 int bcmgenl_psample_cleanup(void)
 {
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.h b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.h
index a934a03c1bf1..43f8ba9ae9a1 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef BCMGENL_PSAMPLE_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild
index 51bbcae56f47..a566a8837897 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild
@@ -6,7 +6,7 @@
 # builds of the NGBDE kernel module, for example, using a different
 # default DMA pool size or turning off MSI interrupts.
 #
-# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+# Copyright 2018-2024 Broadcom. All rights reserved.
 # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
 # 
 # This program is free software; you can redistribute it and/or
@@ -19,7 +19,7 @@
 # GNU General Public License for more details.
 # 
 # A copy of the GNU General Public License version 2 (GPLv2) can
-# be found in the LICENSES folder.$
+# be found in the LICENSES folder.
 #
 
 obj-m := linux_ngbde.o
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/bde/Makefile
index 1803ca728c81..8c60bc94caf9 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/Makefile
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/Makefile
@@ -1,5 +1,5 @@
 #
-# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+# Copyright 2018-2024 Broadcom. All rights reserved.
 # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
 # 
 # This program is free software; you can redistribute it and/or
@@ -12,7 +12,7 @@
 # GNU General Public License for more details.
 # 
 # A copy of the GNU General Public License version 2 (GPLv2) can
-# be found in the LICENSES folder.$
+# be found in the LICENSES folder.
 #
 # Linux kernel BDE module.
 #
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde.h b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde.h
index b930e435e623..b4f18f7c2e03 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef NGBDE_H
@@ -48,7 +48,7 @@
 #define NGBDE_NUM_IRQ_REGS_MAX  16
 
 /*! Maximum number of IRQ lines (MSI vectors) per device. */
-#define NGBDE_NUM_IRQS_MAX      1
+#define NGBDE_NUM_IRQS_MAX      16
 
 /*!
  * Maximum number of interrupt controller registers which may be
@@ -135,17 +135,26 @@ typedef struct ngbde_irq_reg_s {
     /*! Mask identifying the register bits owned by the kernel mode driver. */
     uint32_t kmask;
 
+    /*! Mask identifying the register bits owned by the user mode driver. */
+    uint32_t umask;
+
 } ngbde_irq_reg_t;
 
 /*!
- * \name Interrupt ACK register access flags.
- * \anchor NGBDE_INTR_ACK_F_xxx
+ * \name Interrupt ACK register domains.
+ * \anchor NGBDE_INTR_ACK_IO_xxx
  */
 
 /*! \{ */
 
-/*! ACK registers resides in PCI bridge I/O window. */
-#define NGBDE_INTR_ACK_F_PAXB        (1 << 0)
+/*! ACK registers reside in the default device I/O window. */
+#define NGBDE_INTR_ACK_IO_DEV           0
+
+/*! ACK registers reside in the interrupt controller I/O window. */
+#define NGBDE_INTR_ACK_IO_INTR          1
+
+/*! ACK registers reside in the PCI bridge I/O window. */
+#define NGBDE_INTR_ACK_IO_PAXB          2
 
 /*! \} */
 
@@ -161,15 +170,18 @@ typedef struct ngbde_irq_reg_s {
  */
 typedef struct ngbde_intr_ack_reg_s {
 
-    /*! Ack register offset. */
+    /*! ACK register information is valid. */
+    bool ack_valid;
+
+    /*! ACK register domain (\ref NGBDE_INTR_ACK_IO_xxx). */
+    uint32_t ack_domain;
+
+    /*! ACK register offset. */
     uint32_t ack_reg;
 
-    /*! Ack value. */
+    /*! ACK value. */
     uint32_t ack_val;
 
-    /*! Flags to indicate ack_reg resides in PCI bridge window. */
-    uint32_t flags;
-
 } ngbde_intr_ack_reg_t;
 
 /*!
@@ -220,17 +232,17 @@ typedef struct ngbde_intr_ctrl_s {
     /*! Flag to wake up user mode interrupt thread. */
     atomic_t run_user_thread;
 
-    /*! Primary interrupt handler. */
+    /*! Optional interrupt handler. */
     ngbde_isr_f isr_func;
 
-    /*! Context for primary interrupt handler. */
+    /*! Context for optional kernel interrupt handler. */
     void *isr_data;
 
-    /*! Secondary interrupt handler. */
-    ngbde_isr_f isr2_func;
+    /*! Run kernel mode interrupt handler for this interrupt line. */
+    bool run_kernel_isr;
 
-    /*! Context for secondary interrupt handler. */
-    void *isr2_data;
+    /*! Run user mode interrupt handler for this interrupt line. */
+    bool run_user_isr;
 
 } ngbde_intr_ctrl_t;
 
@@ -317,6 +329,24 @@ typedef struct ngbde_dmapool_s {
 
 } ngbde_dmapool_t;
 
+/*!
+ * \name MSI interrupt support.
+ * \anchor NGBDE_MSI_T_xxx
+ */
+
+/*! \{ */
+
+/*! Use legacy interrupts. */
+#define NGBDE_MSI_T_NONE        0
+
+/*! Use MSI interrupts. */
+#define NGBDE_MSI_T_MSI         1
+
+/*! Use MSI-X interrupts. */
+#define NGBDE_MSI_T_MSIX        2
+
+/*! \} */
+
 /*! Switch device descriptor. */
 struct ngbde_dev_s {
 
@@ -341,7 +371,13 @@ struct ngbde_dev_s {
     /*! Interrupt line associated with this device. */
     int irq_line;
 
-    /*! Use MSI interrupts with this device. */
+    /*! Number of available interrupt lines (typically MSI vectors). */
+    int irq_max;
+
+    /*! Number of active interrupt lines (typically MSI vectors). */
+    int active_irqs;
+
+    /*! Use MSI interrupts with this device (\ref NGBDE_MSI_T_xxx). */
     int use_msi;
 
     /*! Non-zero if device was removed. */
@@ -445,6 +481,39 @@ ngbde_dma_init(void);
 extern void
 ngbde_dma_cleanup(void);
 
+/*!
+ * \brief Allocate interrupt lines.
+ *
+ * This function will update irq_max member in the device descriptor
+ * with the number of interrupt lines actually allocated.
+ *
+ * No action is taken if a kernel ISR is already active (e.g. after a
+ * warm-boot).
+ *
+ * \param [in] kdev Device number.
+ * \param [in] num_irq Number of interrupt lines wanted.
+ *
+ * \return Number of allocated interrupt lines or -1 if error.
+ */
+extern int
+ngbde_intr_alloc(int kdev, unsigned int num_irq);
+
+/*!
+ * \brief Free interrupt lines.
+ *
+ * Free interrupt lines previously allocated via \ref
+ * ngbde_intr_alloc.
+ *
+ * No action is taken if a kernel ISR is still active.
+ *
+ * \param [in] kdev Device number.
+ *
+ * \retval 0 No errors
+ * \retval -1 Something went wrong.
+ */
+extern int
+ngbde_intr_free(int kdev);
+
 /*!
  * \brief Connect to hardware interrupt handler.
  *
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c
index 082c006214be..92a5911b5b05 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <ngbde.h>
@@ -244,7 +244,7 @@ ngbde_dmamem_free(ngbde_dmamem_t *dmamem)
                              dmamem->size, DMA_BIDIRECTIONAL);
         }
         ngbde_pgmem_free(dmamem->vaddr);
-        memset(dmamem, 0, sizeof(*dmamem)); // nosemgrep
+        memset(dmamem, 0, sizeof(*dmamem));
         break;
     case NGBDE_DMA_T_NONE:
         /* Nothing to free */
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c
index 3293493ae78d..46f25974edf9 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c
@@ -5,7 +5,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <ngbde.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c
index d92a63316ee5..460a7228f68e 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <ngbde.h>
@@ -29,6 +29,21 @@ MODULE_PARM_DESC(intr_debug,
 "Interrupt debug output enable (default 0).");
 /*! \endcond */
 
+/*!
+ * \brief Shared register write.
+ *
+ * This function is used for writing to registers where the calling
+ * context only owns a subset of bits within the register.
+ *
+ * \param [in] sd Software device information.
+ * \param [in] ic Interrupt control information.
+ * \param [in] reg_offs Shared register address offset.
+ * \param [in] reg_val Shared register value.
+ * \param [in] shr_mask Register bits owned by this context.
+ *
+ * \retval 0 No errors.
+ * \retval -1 Unknown shared register.
+ */
 static int
 ngbde_intr_shared_write32(struct ngbde_dev_s *sd, struct ngbde_intr_ctrl_s *ic,
                           uint32_t reg_offs, uint32_t reg_val, uint32_t shr_mask)
@@ -86,59 +101,65 @@ ngbde_user_isr(ngbde_intr_ctrl_t *ic)
     int idx;
     int active_interrupts = 0;
     uint32_t stat = 0, mask = 0;
-    uint32_t kmask;
 
-    /* Check if any enabled interrupts are active */
-    for (idx = 0; idx < ic->num_regs; idx++) {
-        ngbde_irq_reg_t *ir = &ic->regs[idx];
+    if (intr_debug >= 2) {
+        printk("INTR: Run user ISR (%d)\n", ic->irq_vect);
+    }
 
-        /* Get mask of all kernel interrupt sources for this register address */
-        kmask = ir->kmask;
+    /*
+     * If this interrupt vector is shared between user mode and kernel
+     * mode, then we want to avoid invoking the user mode handler if
+     * only kernel mode interrupts are active.
+     */
+    if (ic->run_kernel_isr) {
+        /* Check if any enabled user mode interrupts are active */
+        for (idx = 0; idx < ic->num_regs; idx++) {
+            ngbde_irq_reg_t *ir = &ic->regs[idx];
 
-        stat = NGBDE_IOREAD32(&ic->iomem[ir->status_reg]);
-        if (!ir->status_is_masked) {
-            /* Get enabled interrupts by applying mask register */
-            mask = NGBDE_IOREAD32(&ic->iomem[ir->mask_reg]);
-            stat &= mask;
-        }
-        if (stat & ~kmask) {
-            active_interrupts = 1;
-            break;
+            stat = NGBDE_IOREAD32(&ic->iomem[ir->status_reg]);
+            if (!ir->status_is_masked) {
+                /* Get enabled interrupts by applying mask register */
+                mask = NGBDE_IOREAD32(&ic->iomem[ir->mask_reg]);
+                stat &= mask;
+            }
+            if (stat & ir->umask) {
+                active_interrupts = 1;
+                break;
+            }
         }
-    }
 
-    /* No active interrupts to service */
-    if (!active_interrupts) {
-        return 0;
+        /* No active user mode interrupts to service */
+        if (!active_interrupts) {
+            return 0;
+        }
     }
 
-    /* Disable (mask off) all interrupts */
+    /* Disable (mask off) all user mode interrupts */
     for (idx = 0; idx < ic->num_regs; idx++) {
         ngbde_irq_reg_t *ir = &ic->regs[idx];
+        struct ngbde_dev_s *sd;
 
-        /* Get mask of all kernel interrupt sources for this register address */
-        kmask = ir->kmask;
-
-        if (kmask == 0xffffffff) {
+        if (ir->umask == 0) {
             /* Kernel driver owns all interrupts in this register */
             continue;
         }
         if (ir->mask_w1tc) {
-            /* Clear all interrupt bits which are not in kmask */
-            NGBDE_IOWRITE32(~kmask, &ic->iomem[ir->mask_reg]);
+            /* Clear all interrupt mask bits owned by this user mode ISR */
+            NGBDE_IOWRITE32(ir->umask, &ic->iomem[ir->mask_reg]);
             continue;
         }
-        if (kmask) {
-            /* Synchronized write */
-            struct ngbde_dev_s *sd = ngbde_swdev_get(ic->kdev);
-            if (ngbde_intr_shared_write32(sd, ic, ir->mask_reg, 0, ~kmask) < 0) {
-                printk(KERN_WARNING
-                       "%s: Failed to write shared register for device %d\n",
-                       MOD_NAME, ic->kdev);
-                /* Fall back to normal write to ensure interrupts are masked */
-                NGBDE_IOWRITE32(0, &ic->iomem[ir->mask_reg]);
-            }
-        } else {
+        if (ir->umask == 0xffffffff) {
+            /* Direct write when all bits are owned by this user mode ISR */
+            NGBDE_IOWRITE32(0, &ic->iomem[ir->mask_reg]);
+            continue;
+        }
+        /* Synchronized write when some bits are owned by another ISR */
+        sd = ngbde_swdev_get(ic->kdev);
+        if (ngbde_intr_shared_write32(sd, ic, ir->mask_reg, 0, ir->umask) < 0) {
+            printk(KERN_WARNING
+                   "%s: Failed to write shared register for device %d\n",
+                   MOD_NAME, ic->kdev);
+            /* Fall back to normal write to ensure interrupts are masked */
             NGBDE_IOWRITE32(0, &ic->iomem[ir->mask_reg]);
         }
     }
@@ -162,6 +183,10 @@ ngbde_user_isr(ngbde_intr_ctrl_t *ic)
 static int
 ngbde_kernel_isr(ngbde_intr_ctrl_t *ic)
 {
+    if (intr_debug >= 2) {
+        printk("INTR: Run kernel ISR (%d)\n", ic->irq_vect);
+    }
+
     if (ic->isr_func) {
         return ic->isr_func(ic->isr_data);
     }
@@ -169,28 +194,39 @@ ngbde_kernel_isr(ngbde_intr_ctrl_t *ic)
 }
 
 /*!
- * \brief Interrupt handler for kernel driver.
+ * \brief Update interrupt dispatcher.
  *
- * Typically used by the EDK driver.
+ * Check which interrupts handlers (kernel/user) should be invoked for
+ * this interrupt line.
  *
  * \param [in] ic Interrupt control information.
  *
- * \retval 1 One or more kernel mode interrupts occurred.
- * \retval 0 No kernel mode interrupts occurred.
+ * \retval 0
  */
 static int
-ngbde_kernel_isr2(ngbde_intr_ctrl_t *ic)
+ngbde_intr_dispatch_update(ngbde_intr_ctrl_t *ic)
 {
-    if (ic->isr2_func) {
-        return ic->isr2_func(ic->isr2_data);
+    struct ngbde_irq_reg_s *ir;
+    unsigned int idx;
+    uint32_t umask = 0;
+    uint32_t kmask = 0;
+
+    for (idx = 0; idx < ic->num_regs; idx++) {
+        ir = &ic->regs[idx];
+        umask |= ir->umask;
+        kmask |= ir->kmask;
     }
+
+    ic->run_user_isr = (umask != 0);
+    ic->run_kernel_isr = (kmask != 0);
+
     return 0;
 }
 
 /*!
- * \brief Acknowledge interrupt
+ * \brief Acknowledge interrupt.
  *
- * \param [in] data Interrupt control information
+ * \param [in] ic Interrupt control information.
  *
  * \retval 0
  */
@@ -200,8 +236,11 @@ ngbde_intr_ack(ngbde_intr_ctrl_t *ic)
     struct ngbde_dev_s *sd = ngbde_swdev_get(ic->kdev);
     struct ngbde_intr_ack_reg_s *ar = &ic->intr_ack;
 
-    if (sd->use_msi) {
-        if (ar->flags & NGBDE_INTR_ACK_F_PAXB) {
+    if (sd->use_msi && ar->ack_valid) {
+        if (intr_debug >= 2) {
+            printk("INTR: ACK interrupt vector %d\n", ic->irq_vect);
+        }
+        if (ar->ack_domain == NGBDE_INTR_ACK_IO_PAXB) {
             ngbde_paxb_write32(sd, ar->ack_reg, ar->ack_val);
         } else {
             ngbde_pio_write32(sd, ar->ack_reg, ar->ack_val);
@@ -229,18 +268,118 @@ ngbde_isr(int irq_num, void *data)
     struct ngbde_intr_ctrl_s *ic = (struct ngbde_intr_ctrl_s *)data;
     irqreturn_t rv = IRQ_NONE;
 
+    if (intr_debug >= 2) {
+        printk("INTR: Process interrupt vector %d\n", ic->irq_vect);
+    }
+
+    if (ic->run_user_isr) {
+        if (ngbde_user_isr(ic)) {
+            rv = IRQ_HANDLED;
+        }
+    }
+
+    if (ic->run_kernel_isr) {
+        if (ngbde_kernel_isr(ic)) {
+            rv = IRQ_HANDLED;
+        }
+    }
+
     ngbde_intr_ack(ic);
 
-    if (ngbde_kernel_isr2(ic)) {
-        rv = IRQ_HANDLED;
+    return rv;
+}
+
+int
+ngbde_intr_alloc(int kdev, unsigned int num_irq)
+{
+    struct ngbde_dev_s *sd;
+    unsigned long irq_types;
+    int irq, vect;
+
+    if (intr_debug) {
+        printk("INTR: Request %d interrupts\n", num_irq);
     }
-    if (ngbde_user_isr(ic)) {
-        rv = IRQ_HANDLED;
+
+    sd = ngbde_swdev_get(kdev);
+    if (!sd) {
+        return -1;
     }
-    if (ngbde_kernel_isr(ic)) {
-        rv = IRQ_HANDLED;
+
+    if (num_irq == 0) {
+        return -1;
     }
-    return rv;
+
+    if (sd->active_irqs) {
+        if (intr_debug) {
+            printk("INTR: Skip reallocating active interrupts\n");
+        }
+        return sd->irq_max;
+    }
+
+    if (sd->irq_max > 0) {
+        if (intr_debug) {
+            printk("INTR: Interrupts already allocated\n");
+        }
+        return sd->irq_max;
+    }
+
+    /* Use new API if available (Linux 4.8 and newer) */
+    irq_types = PCI_IRQ_LEGACY;
+    if (sd->use_msi) {
+        irq_types |= PCI_IRQ_MSI;
+        if (sd->use_msi == NGBDE_MSI_T_MSIX) {
+            irq_types |= PCI_IRQ_MSIX;
+        } else {
+            /* Only allow one IRQ line if not MSI-X */
+            num_irq = 1;
+        }
+    }
+    sd->irq_max = pci_alloc_irq_vectors(sd->pci_dev, 1, num_irq, irq_types);
+    if (sd->irq_max < 1) {
+        printk(KERN_WARNING "%s: Failed to allocate IRQs for device %d\n",
+               MOD_NAME, kdev);
+        return -1;
+    }
+    if (intr_debug) {
+        printk("INTR: Allocated %d interrupt vector(s)\n", sd->irq_max);
+    }
+    for (irq = 0; irq < sd->irq_max; irq++) {
+        vect = pci_irq_vector(sd->pci_dev, irq);
+        if (intr_debug) {
+            printk("INTR: Interrupt vector %d = %d\n", irq, vect);
+        }
+        sd->intr_ctrl[irq].irq_vect = vect;
+    }
+
+    return sd->irq_max;
+}
+
+int
+ngbde_intr_free(int kdev)
+{
+    struct ngbde_dev_s *sd;
+
+    if (intr_debug) {
+        printk("INTR: Free interrupts\n");
+    }
+
+    sd = ngbde_swdev_get(kdev);
+    if (!sd) {
+        return -1;
+    }
+
+    if (sd->active_irqs) {
+        if (intr_debug) {
+            printk("INTR: Skip freeing active interrupts\n");
+        }
+        return 0;
+    }
+
+    pci_free_irq_vectors(sd->pci_dev);
+
+    sd->irq_max = 0;
+
+    return 0;
 }
 
 int
@@ -250,6 +389,10 @@ ngbde_intr_connect(int kdev, unsigned int irq_num)
     struct ngbde_intr_ctrl_s *ic;
     unsigned long irq_flags;
 
+    if (intr_debug) {
+        printk("INTR: Interrupt connect (%d)\n", irq_num);
+    }
+
     sd = ngbde_swdev_get(kdev);
     if (!sd) {
         return -1;
@@ -262,56 +405,63 @@ ngbde_intr_connect(int kdev, unsigned int irq_num)
     ic = &sd->intr_ctrl[irq_num];
 
     if (ic->irq_active) {
+        if (intr_debug) {
+            printk("INTR: Interrupt already connected (%d)\n", irq_num);
+        }
         return 0;
     }
 
-    if (sd->irq_line >= 0) {
-        if (sd->pio_mem == NULL) {
-            printk(KERN_WARNING "%s: No memory-mapped I/O for device %d\n",
-                   MOD_NAME, kdev);
+    if (sd->irq_line < 0) {
+        printk(KERN_WARNING "%s: No IRQ line for device %d\n",
+               MOD_NAME, kdev);
+        return -1;
+    }
+
+    if (sd->pio_mem == NULL) {
+        printk(KERN_WARNING "%s: No memory-mapped I/O for device %d\n",
+               MOD_NAME, kdev);
+        return -1;
+    }
+
+    /*
+     * Check for old application that does not support interrupt line
+     * allocation.
+     */
+    if (sd->irq_max == 0) {
+        ngbde_intr_alloc(kdev, 1);
+        if (sd->irq_max == 0) {
             return -1;
         }
-        ic->kdev = kdev;
-        ic->iomem = sd->pio_mem;
-        if (sd->iio_mem) {
-            if (intr_debug) {
-                printk("INTR: Using dedicated interrupt controller\n");
-            }
-            ic->iomem = sd->iio_mem;
-        }
-        init_waitqueue_head(&ic->user_thread_wq);
-        atomic_set(&ic->run_user_thread, 0);
-        irq_flags = IRQF_SHARED;
-        ic->irq_vect = sd->irq_line;
+    }
 
-        /*
-         * The pci_enable_msi function must be called after enabling
-         * BAR0_PAXB_OARR_FUNC0_MSI_PAGE, otherwise, MSI interrupts
-         * cannot be triggered!
-         */
-        if (sd->use_msi) {
-            if (pci_enable_msi(sd->pci_dev) == 0) {
-                irq_flags = 0;
-                ic->irq_vect = sd->pci_dev->irq;
-                if (intr_debug) {
-                    printk("INTR: Enabled MSI interrupts\n");
-                }
-            } else {
-                printk(KERN_WARNING "%s: Failed to enable MSI for device %d\n",
-                       MOD_NAME, kdev);
-                sd->use_msi = 0;
-            }
-        }
+    if (sd->active_irqs >= sd->irq_max) {
+        printk(KERN_WARNING "%s: Too many IRQs for device %d\n",
+               MOD_NAME, kdev);
+        return -1;
+    }
+
+    ic->kdev = kdev;
+    ic->iomem = sd->pio_mem;
+    if (sd->iio_mem) {
         if (intr_debug) {
-            printk("INTR: Request IRQ %d\n", ic->irq_vect);
+            printk("INTR: Using dedicated interrupt controller\n");
         }
-        if (request_irq(ic->irq_vect, ngbde_isr, irq_flags, MOD_NAME, ic) < 0) {
-            printk(KERN_WARNING "%s: Could not get IRQ %d for device %d\n",
-                   MOD_NAME, ic->irq_vect, kdev);
-            return -1;
-        }
-        ic->irq_active = 1;
+        ic->iomem = sd->iio_mem;
     }
+    init_waitqueue_head(&ic->user_thread_wq);
+    atomic_set(&ic->run_user_thread, 0);
+    irq_flags = IRQF_SHARED;
+
+    if (intr_debug) {
+        printk("INTR: Request IRQ %d\n", ic->irq_vect);
+    }
+    if (request_irq(ic->irq_vect, ngbde_isr, irq_flags, MOD_NAME, ic) < 0) {
+        printk(KERN_WARNING "%s: Could not get IRQ %d for device %d\n",
+               MOD_NAME, ic->irq_vect, kdev);
+        return -1;
+    }
+    ic->irq_active = 1;
+    sd->active_irqs++;
 
     return 0;
 }
@@ -322,6 +472,10 @@ ngbde_intr_disconnect(int kdev, unsigned int irq_num)
     struct ngbde_dev_s *sd;
     struct ngbde_intr_ctrl_s *ic;
 
+    if (intr_debug) {
+        printk("INTR: Interrupt disconnect (%d)\n", irq_num);
+    }
+
     sd = ngbde_swdev_get(kdev);
     if (!sd) {
         return -1;
@@ -331,6 +485,10 @@ ngbde_intr_disconnect(int kdev, unsigned int irq_num)
         return -1;
     }
 
+    if (sd->active_irqs == 0) {
+        return -1;
+    }
+
     ic = &sd->intr_ctrl[irq_num];
 
     if (!ic->irq_active) {
@@ -345,10 +503,13 @@ ngbde_intr_disconnect(int kdev, unsigned int irq_num)
 
     if (ic->irq_vect >= 0) {
         free_irq(ic->irq_vect, ic);
-        if (sd->use_msi) {
-            pci_disable_msi(sd->pci_dev);
-        }
-        ic->irq_active = 0;
+    }
+
+    ic->irq_active = 0;
+    sd->active_irqs--;
+
+    if (sd->active_irqs == 0 && sd->irq_max == 1) {
+        ngbde_intr_free(kdev);
     }
 
     return 0;
@@ -366,6 +527,7 @@ ngbde_intr_cleanup(void)
         for (irq_num = 0; irq_num < NGBDE_NUM_IRQS_MAX; irq_num++) {
             ngbde_intr_disconnect(idx, irq_num);
         }
+        ngbde_intr_free(idx);
     }
 }
 
@@ -390,9 +552,15 @@ ngbde_intr_wait(int kdev, unsigned int irq_num)
         return 0;
     }
 
+    if (intr_debug >= 2) {
+        printk("INTR: User wait for interrupt (%d)\n", ic->irq_vect);
+    }
     wait_event_interruptible(ic->user_thread_wq,
                              atomic_read(&ic->run_user_thread) != 0);
     atomic_set(&ic->run_user_thread, 0);
+    if (intr_debug >= 2) {
+        printk("INTR: User process interrupt (%d)\n", ic->irq_vect);
+    }
 
     return 0;
 }
@@ -485,11 +653,14 @@ ngbde_intr_reg_add(int kdev, unsigned int irq_num,
                 ir->mask_reg == ireg->mask_reg) {
                 if (ir->kmask != ireg->kmask && ireg->kmask_valid) {
                     ir->kmask = ireg->kmask;
+                    ir->umask = ireg->umask;
                     if (intr_debug) {
-                        printk("INTR: Updating interrupt register "
-                               "0x%08x/0x%08x (0x%08x)\n",
-                               ir->status_reg, ir->mask_reg, ir->kmask);
+                        printk("INTR: Updated interrupt register "
+                               "0x%08x/0x%08x [u:0x%08x,k:0x%08x] (%d)\n",
+                               ir->status_reg, ir->mask_reg,
+                               ir->umask, ir->kmask, irq_num);
                     }
+                    ngbde_intr_dispatch_update(ic);
                 }
                 return 0;
             }
@@ -502,13 +673,14 @@ ngbde_intr_reg_add(int kdev, unsigned int irq_num,
     }
 
     ir = &ic->regs[ic->num_regs++];
-
     memcpy(ir, ireg, sizeof (*ir));
-
     if (intr_debug) {
-        printk("INTR: Adding interrupt register 0x%08x/0x%08x (0x%08x)\n",
-               ir->status_reg, ir->mask_reg, ir->kmask);
+        printk("INTR: Added interrupt register "
+               "0x%08x/0x%08x [u:0x%08x,k:0x%08x] (%d)\n",
+               ir->status_reg, ir->mask_reg,
+               ir->umask, ir->kmask, irq_num);
     }
+    ngbde_intr_dispatch_update(ic);
 
     return ic->num_regs;
 }
@@ -542,8 +714,8 @@ ngbde_intr_ack_reg_add(int kdev, unsigned int irq_num,
     memcpy(ar, ackreg, sizeof (*ar));
 
     if (intr_debug) {
-        printk("INTR: Adding interrupt ACK register 0x%08x/0x%08x (0x%08x)\n",
-               ar->ack_reg, ar->ack_val, ar->flags);
+        printk("INTR: Adding interrupt ACK register 0x%08x/0x%08x[%d] (%d)\n",
+               ar->ack_reg, ar->ack_val, ar->ack_domain, irq_num);
     }
 
     return 0;
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_ioctl.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_ioctl.c
index 4d20ca65424a..0c8482c9d772 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_ioctl.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_ioctl.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <lkm/ngbde_ioctl.h>
@@ -35,6 +35,7 @@ ngbde_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
     unsigned int num_swdev;
     unsigned int rsrc_type, rsrc_idx;
     unsigned int irq_num, intr_cmd;
+    int rv;
     uint32_t mreg, mval;
 
     if (copy_from_user(&ioc, (void *)arg, sizeof(ioc))) {
@@ -46,6 +47,7 @@ ngbde_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
     switch (cmd) {
     case NGBDE_IOC_MOD_INFO:
         ioc.op.mod_info.version = NGBDE_IOC_VERSION;
+        ioc.op.mod_info.compat = NGBDE_COMPAT_IRQ_INIT;
         break;
     case NGBDE_IOC_PROBE_INFO:
         ngbde_swdev_get_all(NULL, &num_swdev);
@@ -61,9 +63,6 @@ ngbde_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
         ioc.op.dev_info.device_id = swdev->device_id;
         ioc.op.dev_info.revision = swdev->revision;
         ioc.op.dev_info.model = swdev->model;
-        if (swdev->use_msi) {
-            ioc.op.dev_info.flags |= NGBDE_DEV_F_MSI;
-        }
         break;
     case NGBDE_IOC_PHYS_ADDR:
         swdev = ngbde_swdev_get(ioc.devid);
@@ -156,17 +155,29 @@ ngbde_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
         irq_num = ioc.op.irq_reg_add.irq_num;
         ireg.status_reg = ioc.op.irq_reg_add.status_reg;
         ireg.mask_reg = ioc.op.irq_reg_add.mask_reg;
+        ireg.umask = 0;
         ireg.kmask = 0;
         ireg.kmask_valid = false;
-        if (ioc.op.irq_reg_add.flags & NGBDE_DEV_IRQ_REG_F_KMASK) {
+        if (ioc.op.irq_reg_add.flags & NGBDE_IRQ_REG_F_KMASK) {
             ireg.kmask = ioc.op.irq_reg_add.kmask;
             ireg.kmask_valid = true;
         }
-        if (ioc.op.irq_reg_add.flags & NGBDE_DEV_IRQ_REG_F_MASKED) {
+        if (ioc.op.irq_reg_add.flags & NGBDE_IRQ_REG_F_UMASK) {
+            ireg.umask = ioc.op.irq_reg_add.umask;
+        } else {
+            /*
+             * Assign non-kernel bits to user mode driver. Note that
+             * this functionality is intended to provide backward
+             * compatibility.
+             */
+            ireg.umask = ~ioc.op.irq_reg_add.kmask;
+        }
+        ireg.status_is_masked = false;
+        if (ioc.op.irq_reg_add.flags & NGBDE_IRQ_REG_F_MASKED) {
             ireg.status_is_masked = true;
         }
         ireg.mask_w1tc = false;
-        if (ioc.op.irq_reg_add.flags & NGBDE_DEV_IRQ_REG_F_W1TC) {
+        if (ioc.op.irq_reg_add.flags & NGBDE_IRQ_REG_F_W1TC) {
             ireg.mask_w1tc = true;
         }
         if (ngbde_intr_reg_add(ioc.devid, irq_num, &ireg) < 0) {
@@ -176,11 +187,15 @@ ngbde_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
             ioc.rc = NGBDE_IOC_FAIL;
         }
         break;
-    case NGBDE_IOC_INTR_ACK_REG_ADD:
-        irq_num = ioc.op.intr_ack_reg_add.irq_num;
-        ackreg.ack_reg = ioc.op.intr_ack_reg_add.ack_reg;
-        ackreg.ack_val = ioc.op.intr_ack_reg_add.ack_val;
-        ackreg.flags = ioc.op.intr_ack_reg_add.flags;
+    case NGBDE_IOC_IACK_REG_ADD:
+        irq_num = ioc.op.iack_reg_add.irq_num;
+        ackreg.ack_valid = true;
+        ackreg.ack_domain = NGBDE_INTR_ACK_IO_DEV;
+        if (ioc.op.iack_reg_add.flags & NGBDE_IACK_REG_F_PAXB) {
+            ackreg.ack_domain = NGBDE_INTR_ACK_IO_PAXB;
+        }
+        ackreg.ack_reg = ioc.op.iack_reg_add.ack_reg;
+        ackreg.ack_val = ioc.op.iack_reg_add.ack_val;
         if (ngbde_intr_ack_reg_add(ioc.devid, irq_num, &ackreg) < 0) {
             printk(KERN_WARNING
                    "%s: Unable to add interrupt ack register\n",
@@ -199,6 +214,14 @@ ngbde_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
             ioc.rc = NGBDE_IOC_FAIL;
         }
         break;
+    case NGBDE_IOC_IRQ_INIT:
+        rv = ngbde_intr_alloc(ioc.devid, ioc.op.irq_init.irq_max);
+        if (rv < 0) {
+            ioc.rc = NGBDE_IOC_FAIL;
+        } else {
+            ioc.op.irq_init.irq_max = rv;
+        }
+        break;
     case NGBDE_IOC_PIO_WIN_MAP:
         swdev = ngbde_swdev_get(ioc.devid);
         if (!swdev) {
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iproc_probe.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iproc_probe.c
index e297ca35e618..bf3eb1b07233 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iproc_probe.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iproc_probe.c
@@ -8,7 +8,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -21,7 +21,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <ngbde.h>
@@ -50,7 +50,7 @@ iproc_cmicd_probe(struct platform_device *pldev)
     uint32_t size;
     void *base_address;
     uint32_t dev_rev_id;
-    struct ngbde_dev_s ngbde_dev, *nd = &ngbde_dev;
+    struct ngbde_dev_s *nd = NULL;
     struct resource *memres, *irqres;
 
     memres = platform_get_resource(pldev, IORESOURCE_MEM, 0);
@@ -71,6 +71,10 @@ iproc_cmicd_probe(struct platform_device *pldev)
         return -1;
     }
 
+    nd = kmalloc(sizeof(*nd), GFP_KERNEL);
+    if (nd == NULL) {
+        return -ENOMEM;
+    }
     memset(nd, 0, sizeof(*nd));
     nd->pci_dev = NULL; /* No PCI bus */
     nd->dma_dev = &pldev->dev;
@@ -99,6 +103,8 @@ iproc_cmicd_probe(struct platform_device *pldev)
     }
     rv = ngbde_swdev_add(nd);
 
+    kfree(nd);
+
     return rv;
 }
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_kapi.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_kapi.c
index b95beee3a97b..fed0d9b2a3db 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_kapi.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_kapi.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <ngbde.h>
@@ -315,57 +315,6 @@ ngbde_kapi_intr_disconnect(int kdev, unsigned int irq_num)
 EXPORT_SYMBOL(ngbde_kapi_intr_disconnect);
 /*! \endcond */
 
-int
-ngbde_kapi_intr2_connect(int kdev, unsigned int irq_num,
-                         int (*isr_func)(void *), void *isr_data)
-{
-    struct ngbde_dev_s *sd;
-    struct ngbde_intr_ctrl_s *ic;
-
-    sd = ngbde_swdev_get(kdev);
-    if (!sd) {
-        return -1;
-    }
-
-    if (irq_num >= NGBDE_NUM_IRQS_MAX) {
-        return -1;
-    }
-
-    ic = &sd->intr_ctrl[irq_num];
-    ic->isr2_func = isr_func;
-    ic->isr2_data = isr_data;
-
-    return 0;
-}
-/*! \cond */
-EXPORT_SYMBOL(ngbde_kapi_intr2_connect);
-/*! \endcond */
-
-int
-ngbde_kapi_intr2_disconnect(int kdev, unsigned int irq_num)
-{
-    struct ngbde_dev_s *sd;
-    struct ngbde_intr_ctrl_s *ic;
-
-    sd = ngbde_swdev_get(kdev);
-    if (!sd) {
-        return -1;
-    }
-
-    if (irq_num >= NGBDE_NUM_IRQS_MAX) {
-        return -1;
-    }
-
-    ic = &sd->intr_ctrl[irq_num];
-    ic->isr2_func = NULL;
-    ic->isr2_data = NULL;
-
-    return 0;
-}
-/*! \cond */
-EXPORT_SYMBOL(ngbde_kapi_intr2_disconnect);
-/*! \endcond */
-
 int
 ngbde_kapi_intr_mask_write(int kdev, unsigned int irq_num,
                            uint32_t status_reg, uint32_t mask_val)
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_main.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_main.c
index 13391c2d9da5..bc6895072cba 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_main.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_main.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <ngbde.h>
@@ -180,6 +180,12 @@ ngbde_pio_base_match(unsigned long paddr)
  * The function below provides a backdoor to mapping the DMA pool to
  * user space via the BDE device file.
  */
+static const struct vm_operations_struct ngbde_vma_ops = {
+#ifdef CONFIG_HAVE_IOREMAP_PROT
+    .access = generic_access_phys,
+#endif
+};
+
 static int
 ngbde_mmap(struct file *filp, struct vm_area_struct *vma)
 {
@@ -212,6 +218,9 @@ ngbde_mmap(struct file *filp, struct vm_area_struct *vma)
         return -EINVAL;
     }
 
+    /* Support debug access to the mapping (works for PGMEM DMA only) */
+    vma->vm_ops = &ngbde_vma_ops;
+
     if (map_noncached) {
         vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
     }
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c
index 44cd90867cd8..ed45c2c67ddb 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c
@@ -5,7 +5,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <ngbde.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pci_probe.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pci_probe.c
index 0d5d7417b406..5fdd71ba56ab 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pci_probe.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pci_probe.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,16 +17,16 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <ngbde.h>
 
 /*! \cond */
-static int use_msi = 1;
+static int use_msi = NGBDE_MSI_T_MSI;
 module_param(use_msi, int, S_IRUSR);
 MODULE_PARM_DESC(use_msi,
-"Use MSI interrupts if supported by the kernel (default 1).");
+"Use MSI (1) or MSI-X (2) interrupts if supported by the kernel (default 1).");
 /*! \endcond */
 
 /*! \cond */
@@ -61,7 +61,7 @@ pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *ent)
     int bdx;
     int cmic_bar = 0;
     uint8_t rev;
-    struct ngbde_dev_s ngbde_dev, *nd = &ngbde_dev;
+    struct ngbde_dev_s *nd = NULL;
     int bus_no = pci_dev->bus ? pci_dev->bus->number : 0;
     int slot_no = PCI_SLOT(pci_dev->devfn);
 
@@ -75,6 +75,10 @@ pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *ent)
                pci_dev->vendor, pci_dev->device);
     }
 
+    nd = kmalloc(sizeof(*nd), GFP_KERNEL);
+    if (nd == NULL) {
+        return -ENOMEM;
+    }
     memset(nd, 0, sizeof(*nd));
     nd->pci_dev = pci_dev;
     nd->dma_dev = &pci_dev->dev;
@@ -128,15 +132,8 @@ pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *ent)
 
     spin_lock_init(&nd->lock);
 
-    /* Determine MSI configuration by enabling MSI on the device */
+    /* Get MSI configuration preference from module parameter */
     nd->use_msi = use_msi;
-    if (nd->use_msi) {
-        if (pci_enable_msi(nd->pci_dev) == 0) {
-            pci_disable_msi(nd->pci_dev);
-        } else {
-            nd->use_msi = 0;
-        }
-    }
 
     rv = ngbde_swdev_add(nd);
 
@@ -151,6 +148,8 @@ pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *ent)
         }
     }
 
+    kfree(nd);
+
     return rv;
 }
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pgmem.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pgmem.c
index 7cdd2f099b0f..348909edb113 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pgmem.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pgmem.c
@@ -31,7 +31,7 @@
  * likely these requests are to succeed.
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -44,7 +44,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <ngbde.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c
index b124c0b029e0..a1e430da0e28 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c
@@ -5,7 +5,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -18,7 +18,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <ngbde.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_procfs.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_procfs.c
index 0394f86a55df..a7cc964eb9fc 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_procfs.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_procfs.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <ngbde.h>
@@ -26,7 +26,7 @@ static int
 proc_show(struct seq_file *m, void *v)
 {
     struct ngbde_dev_s *swdev;
-    unsigned int num_swdev, idx;
+    unsigned int num_swdev, idx, irq;
     struct ngbde_dmamem_s *dmamem;
     unsigned int pool;
     unsigned int dma_pools;
@@ -44,9 +44,14 @@ proc_show(struct seq_file *m, void *v)
             seq_printf(m, "%d:removed\n", idx);
             continue;
         }
-        seq_printf(m, "%d:%04x:%04x:%02x,%s(%d)\n", idx,
+        seq_printf(m, "%d:%04x:%04x:%02x,%s(%d", idx,
                    swdev->vendor_id, swdev->device_id, swdev->revision,
-                   swdev->use_msi ? "MSI" : "IRQ", swdev->irq_line);
+                   swdev->use_msi ? "MSI" : "IRQ",
+                   swdev->intr_ctrl[0].irq_vect);
+        for (irq = 1; irq < swdev->irq_max; irq++) {
+            seq_printf(m, ",%d", swdev->intr_ctrl[irq].irq_vect);
+        }
+        seq_printf(m, ")\n");
     }
 
     seq_printf(m, "DMA pools:\n");
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_swdev.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_swdev.c
index 1f56ed7fbf82..ee0532db3da2 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_swdev.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_swdev.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <ngbde.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Kbuild
index 0218b85de98f..c0b31433648c 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Kbuild
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Kbuild
@@ -2,7 +2,7 @@
 #
 # Linux Netlink channel for general packet I/O module.
 #
-# $Copyright: (c) 2023 Broadcom.
+# $Copyright: (c) 2024 Broadcom.
 # Broadcom Proprietary and Confidential. All rights reserved.$
 #
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Makefile
index 9bf7afe3f9a7..f4e3cfbb07f9 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Makefile
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Makefile
@@ -1,5 +1,5 @@
 #
-# $Copyright: (c) 2023 Broadcom.
+# $Copyright: (c) 2024 Broadcom.
 # Broadcom Proprietary and Confidential. All rights reserved.$
 #
 # Linux Netlink channel for general packet I/O module.
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h
index d58ea599118a..bf838dd5856d 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h
@@ -1,10 +1,10 @@
 /*! \file lkm.h
  *
- * <description>
+ * Linux compatibility macros.
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef LKM_H
@@ -138,4 +138,36 @@ static inline void page_ref_dec(struct page *page)
 }
 #endif
 
+#ifndef PCI_IRQ_LEGACY
+/* Emulate new IRQ API if not available */
+#define PCI_IRQ_LEGACY          (1 << 0)
+#define PCI_IRQ_MSI             (1 << 1)
+#define PCI_IRQ_MSIX            (1 << 2)
+static inline int
+pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,
+                      unsigned int max_vecs, unsigned int flags)
+{
+    /* We do not attempt to support MSI-X via old API */
+    if (flags & PCI_IRQ_MSI) {
+        if (pci_enable_msi(dev) == 0) {
+            return 1;
+        }
+    }
+    if (flags & PCI_IRQ_LEGACY) {
+        return 1;
+    }
+    return 0;
+}
+static inline void
+pci_free_irq_vectors(struct pci_dev *dev)
+{
+    pci_disable_msi(dev);
+}
+static inline int
+pci_irq_vector(struct pci_dev *dev, unsigned int nr)
+{
+    return dev->irq;
+}
+#endif
+
 #endif /* LKM_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_ioctl.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_ioctl.h
index e8155a620940..e6f65b3af8e4 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_ioctl.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_ioctl.h
@@ -9,7 +9,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -22,7 +22,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef NGBDE_IOCTL_H
@@ -80,7 +80,10 @@
 #define NGBDE_IOC_PAXB_WIN_MAP  _IOW(NGBDE_IOC_MAGIC, 9, __u64)
 
 /*! Add interrupt ACK register for kernel to control. */
-#define NGBDE_IOC_INTR_ACK_REG_ADD   _IOW(NGBDE_IOC_MAGIC, 10, __u64)
+#define NGBDE_IOC_IACK_REG_ADD  _IOW(NGBDE_IOC_MAGIC, 10, __u64)
+
+/*! Initialize kernel interrupt driver. */
+#define NGBDE_IOC_IRQ_INIT      _IOW(NGBDE_IOC_MAGIC, 11, __u64)
 
 /*! \} */
 
@@ -91,38 +94,18 @@
 #define NGBDE_IOC_FAIL          ((__u32)-1)
 
 /*!
- * \name Device flags.
- * \anchor NGBDE_DEV_F_xxx
+ * \name Compatibility features.
+ *
+ * This allows user mode applications to work with both current and
+ * older kernel modules.
+ *
+ * \anchor NGBDE_COMPAT_xxx
  */
 
 /*! \{ */
 
-/*! Message-signaled interrupts, PCI interrupts are operating in MSI mode. */
-#define NGBDE_DEV_F_MSI         (1 << 0)
-
-/*! \} */
-
-/*!
- * \name Interrupt control commands.
- * \anchor NGBDE_ICTL_xxx
- */
-
-/*! \{ */
-
-/*! Connect interrupt handler. */
-#define NGBDE_ICTL_INTR_CONN    0
-
-/*! Disconnect interrupt handler. */
-#define NGBDE_ICTL_INTR_DISC    1
-
-/*! Wait for interrupt. */
-#define NGBDE_ICTL_INTR_WAIT    2
-
-/*! Force waiting thread to return. */
-#define NGBDE_ICTL_INTR_STOP    3
-
-/*! Clear list of interrupt status/mask registers. */
-#define NGBDE_ICTL_REGS_CLR     4
+/*! Support for IRQ_INIT IOCTL command. */
+#define NGBDE_COMPAT_IRQ_INIT   (1 << 0)
 
 /*! \} */
 
@@ -131,6 +114,9 @@ struct ngbde_ioc_mod_info_s {
 
     /*! IOCTL version used by kernel module. */
     __u16 version;
+
+    /*! Compatibility options (\ref NGBDE_COMPAT_xxx). */
+    __u16 compat;
 };
 
 /*! Probing results. */
@@ -140,13 +126,31 @@ struct ngbde_ioc_probe_info_s {
     __u16 num_swdev;
 };
 
+/*!
+ * \name Bus types.
+ * \anchor NGBDE_DEV_BT_xxx
+ */
+
+/*! \{ */
+
+/*! PCI bus. */
+#define NGBDE_DEV_BT_PCI        0
+
+/*! ARM AXI bus. */
+#define NGBDE_DEV_BT_AXI        1
+
+/*! \} */
+
 /*! Device information. */
 struct ngbde_ioc_dev_info_s {
 
-    /*! Device type. */
-    __u16 type;
+    /*! Device type (currently unused). */
+    __u8 device_type;
+
+    /*! Bus type (\ref NGBDE_DEV_BT_xxx). */
+    __u8 bus_type;
 
-    /*! Device flags (\ref NGBDE_DEV_F_xxx). */
+    /*! Device flags (currently unused). */
     __u16 flags;
 
     /*! Vendor ID (typically the PCI vendor ID). */
@@ -215,42 +219,89 @@ struct ngbde_ioc_phys_addr_s {
     __u32 size;
 };
 
-/*! Interrupt control operation */
+/*!
+ * Initialize kernel interrupt driver.
+ *
+ * The user mode driver will provide the number of desired interrupt
+ * lines, and the kernel mode driver will respond with the actual
+ * number of interrupt lines available (which may be a smaller
+ * number).
+ */
+struct ngbde_ioc_irq_init_s {
+
+    /*! Maximum number of interrupt lines per device. */
+    __u32 irq_max;
+};
+
+/*!
+ * \name Interrupt control commands.
+ * \anchor NGBDE_ICTL_xxx
+ */
+
+/*! \{ */
+
+/*! Connect interrupt handler. */
+#define NGBDE_ICTL_INTR_CONN    0
+
+/*! Disconnect interrupt handler. */
+#define NGBDE_ICTL_INTR_DISC    1
+
+/*! Wait for interrupt. */
+#define NGBDE_ICTL_INTR_WAIT    2
+
+/*! Force waiting interrupt thread to return. */
+#define NGBDE_ICTL_INTR_STOP    3
+
+/*! Clear list of interrupt status/mask registers. */
+#define NGBDE_ICTL_REGS_CLR     4
+
+/*! \} */
+
+/*! Interrupt control operation. */
 struct ngbde_ioc_intr_ctrl_s {
 
     /*! Interrupt instance for this device. */
     __u32 irq_num;
 
-    /*! Interrupt control command. */
+    /*! Interrupt control command (see \ref NGBDE_ICTL_xxx). */
     __u32 cmd;
 };
 
 /*!
  * \name Interrupt register access flags.
- * \anchor NGBDE_DEV_IRQ_REG_F_xxx
+ * \anchor NGBDE_IRQ_REG_F_xxx
  */
 
 /*! \{ */
 
 /*! IRQ register is of type "write 1 to clear". */
-#define NGBDE_DEV_IRQ_REG_F_W1TC        (1 << 0)
+#define NGBDE_IRQ_REG_F_W1TC    (1 << 0)
 
 /*! IRQ status register is a bitwise AND of mask and raw status. */
-#define NGBDE_DEV_IRQ_REG_F_MASKED      (1 << 1)
+#define NGBDE_IRQ_REG_F_MASKED  (1 << 1)
 
 /*!
- * Indicates that the kmask value is valid. This is mainly to
- * distinguish a mask value of zero from the mask value being
- * uninitialized, as this matters during a warm boot.
+ * Indicates that the interrupts in the kmask field should be handled
+ * by the kernel (typically the KNET kernel network driver). The
+ * remaining interrupts in the interrupt register (if any) will be
+ * handled by the user mode interrupt driver, except if \ref
+ * NGBDE_IRQ_REG_F_UMASK is set, in which case the remaining
+ * interrupts in the kmask will be ignored.
  */
-#define NGBDE_DEV_IRQ_REG_F_KMASK       (1 << 2)
+#define NGBDE_IRQ_REG_F_KMASK   (1 << 2)
+
+/*!
+ * Indicates that the interrupts in the umask field should be handled
+ * by the user mode interrupt handler.
+ */
+#define NGBDE_IRQ_REG_F_UMASK   (1 << 3)
 
 /*! \} */
 
 /*! Add interrupt register information. */
 struct ngbde_ioc_irq_reg_add_s {
 
-    /*! Interrupt instance for this device. */
+    /*! Interrupt line associated with these registers. */
     __u32 irq_num;
 
     /*! Interrupt status register address offset. */
@@ -259,27 +310,40 @@ struct ngbde_ioc_irq_reg_add_s {
     /*! Interrupt mask register address offset. */
     __u32 mask_reg;
 
-    /*! Interrupt mask for interrupts handled by the kernel. */
+    /*!
+     * Indicates which kernel mode interrupts in the interrupt
+     * registers that are associated with this interrupt line (\c
+     * irq_num). Note that the \ref NGBDE_IRQ_REG_F_xxx flags may
+     * affect how this value is interpreted.
+     */
     __u32 kmask;
 
-    /*! Flags for special handling (\ref NGBDE_DEV_IRQ_REG_F_xxx). */
+    /*! Flags for special handling (\ref NGBDE_IRQ_REG_F_xxx). */
     __u32 flags;
+
+    /*!
+     * Indicates which user mode interrupts in the interrupt registers
+     * that are associated with this interrupt line (\c irq_num). Note
+     * that the \ref NGBDE_IRQ_REG_F_xxx flags may affect how this
+     * value is interpreted.
+     */
+    __u32 umask;
 };
 
 /*!
  * \name Interrupt ACK register access flags.
- * \anchor NGBDE_DEV_INTR_ACK_F_xxx
+ * \anchor NGBDE_IACK_REG_F_xxx
  */
 
 /*! \{ */
 
 /*! ACK registers resides in PCI bridge I/O window. */
-#define NGBDE_DEV_INTR_ACK_F_PAXB   (1 << 0)
+#define NGBDE_IACK_REG_F_PAXB   (1 << 0)
 
 /*! \} */
 
 /*! Add interrupt ACK register information. */
-struct ngbde_ioc_intr_ack_reg_add_s {
+struct ngbde_ioc_iack_reg_add_s {
 
     /*! Interrupt instance for this device. */
     __u32 irq_num;
@@ -287,10 +351,10 @@ struct ngbde_ioc_intr_ack_reg_add_s {
     /*! Interrupt ACK register address offset. */
     __u32 ack_reg;
 
-    /*! Interrupt ACK value. */
+    /*! Interrupt ACK register value to write. */
     __u32 ack_val;
 
-    /*! Flags to indicate ack_reg resides in PCI bridge window. */
+    /*! Interrupt ACK register access flags (\ref NGBDE_IACK_REG_F_xxx). */
     __u32 flags;
 };
 
@@ -335,14 +399,17 @@ union ngbde_ioc_op_s {
     /*! Get a physical memory address associated with a switch device. */
     struct ngbde_ioc_phys_addr_s phys_addr;
 
-    /*! Interrupt control command (see \ref NGBDE_ICTL_xxx). */
+    /*! Get information about interrupt capabilities. */
+    struct ngbde_ioc_irq_init_s irq_init;
+
+    /*! Interrupt control command. */
     struct ngbde_ioc_intr_ctrl_s intr_ctrl;
 
     /*! Add interrupt status/mask register for kernel to control. */
     struct ngbde_ioc_irq_reg_add_s irq_reg_add;
 
     /*! Add interrupt ACK register for kernel to control. */
-    struct ngbde_ioc_intr_ack_reg_add_s intr_ack_reg_add;
+    struct ngbde_ioc_iack_reg_add_s iack_reg_add;
 
     /*! Write to a shared interrupt mask register. */
     struct ngbde_ioc_irq_mask_wr_s irq_mask_wr;
@@ -362,6 +429,7 @@ typedef struct ngbde_ioc_cmd_s {
 
     /*! IOCTL operation. */
     union ngbde_ioc_op_s op;
+
 } ngbde_ioc_cmd_t;
 
 #endif /* NGBDE_IOCTL_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_kapi.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_kapi.h
index 84280ac36cd0..d6cc403ab9da 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_kapi.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_kapi.h
@@ -6,7 +6,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -19,7 +19,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef NGBDE_KAPI_H
@@ -262,34 +262,6 @@ ngbde_kapi_intr_connect(int kdev, unsigned int irq_num,
 extern int
 ngbde_kapi_intr_disconnect(int kdev, unsigned int irq_num);
 
-/*!
- * \brief Install secondary interrupt handler.
- *
- * Optionally allow a different process to handle one or more user
- * mode interrupts.
- *
- * \param [in] kdev Device number.
- * \param [in] irq_num Interrupt number (MSI vector).
- * \param [in] isr_func Interrupt handler function.
- * \param [in] isr_data Interrupt handler context.
- *
- * \retval 0 No errors
- */
-extern int
-ngbde_kapi_intr2_connect(int kdev, unsigned int irq_num,
-                         int (*isr_func)(void *), void *isr_data);
-
-/*!
- * \brief Uninstall secondary interrupt handler.
- *
- * \param [in] kdev Device number.
- * \param [in] irq_num Interrupt number (MSI vector).
- *
- * \retval 0 No errors
- */
-extern int
-ngbde_kapi_intr2_disconnect(int kdev, unsigned int irq_num);
-
 /*!
  * \brief Write shared interrupt mask register.
  *
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_ioctl.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_ioctl.h
index 384adc2aab6a..9f6573c1a9c0 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_ioctl.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_ioctl.h
@@ -9,7 +9,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -22,7 +22,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef NGEDK_IOCTL_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_kapi.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_kapi.h
index e9db5cb316c0..b850b7413ffb 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_kapi.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_kapi.h
@@ -6,7 +6,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -19,7 +19,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef NGEDK_KAPI_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h
index 02cb97df4eff..72415a6643ee 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h
@@ -9,7 +9,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -22,7 +22,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef NGKNET_DEV_H
@@ -303,11 +303,15 @@ typedef struct ngknet_dev_info_s {
     /*! Device number (from BDE) */
     int dev_no;
 
+    /*! Device ID */
+    uint32_t dev_id;
+
     /*! Device type string */
     char type_str[NGKNET_DEV_NAME_MAX];
 
     /*! Device variant string */
     char var_str[NGKNET_DEV_NAME_MAX];
+
     /*! Virtual network devices, pointer to ngknet_dev.vdev[] */
     struct net_device **vdev;
 } ngknet_dev_info_t;
@@ -380,6 +384,9 @@ typedef struct ngknet_chan_cfg_s {
 #define NGKNET_RX_CHAN          0
     /*! Tx channel */
 #define NGKNET_TX_CHAN          1
+
+    /*! Pipe specified for Rx/Tx */
+    int pipe;
 } ngknet_chan_cfg_t;
 
 /*!
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h
index ed683111a6c4..1cdba1c93123 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h
@@ -9,7 +9,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -22,7 +22,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef NGKNET_IOCTL_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_kapi.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_kapi.h
index 5230ba6635c3..fd6a7db90ae3 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_kapi.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_kapi.h
@@ -6,7 +6,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -19,7 +19,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef NGKNET_KAPI_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngptpclock_ioctl.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngptpclock_ioctl.h
index 0164b4b3174f..3ce5b6b15b3c 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngptpclock_ioctl.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngptpclock_ioctl.h
@@ -9,7 +9,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -22,7 +22,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef NGPTPCLOCK_IOCTL_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild
index 38ddb39ecd13..89610dd2b44d 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild
@@ -2,7 +2,7 @@
 #
 # Linux KNET module.
 #
-# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+# Copyright 2018-2024 Broadcom. All rights reserved.
 # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
 # 
 # This program is free software; you can redistribute it and/or
@@ -15,7 +15,7 @@
 # GNU General Public License for more details.
 # 
 # A copy of the GNU General Public License version 2 (GPLv2) can
-# be found in the LICENSES folder.$
+# be found in the LICENSES folder.
 #
 
 obj-m := linux_ngknet.o
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile
index 9a20f596d3dc..930479743f7b 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile
@@ -1,5 +1,5 @@
 #
-# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+# Copyright 2018-2024 Broadcom. All rights reserved.
 # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
 # 
 # This program is free software; you can redistribute it and/or
@@ -12,7 +12,7 @@
 # GNU General Public License for more details.
 # 
 # A copy of the GNU General Public License version 2 (GPLv2) can
-# be found in the LICENSES folder.$
+# be found in the LICENSES folder.
 #
 # Linux KNET module.
 #
@@ -26,7 +26,6 @@ GENDIR = $(OUTPUT_DIR)/knet/generated
 endif
 DSTIDIR = $(GENDIR)/include/bcmcnet
 
-
 # Change comma-separated list to space-separated list
 comma = ,
 empty =
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.c
index e4e27f6af442..5aac177bc9aa 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <bcmcnet/bcmcnet_core.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.h
index 81a0e7e0c8ed..6777b3cb5589 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef NGKNET_BUFF_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c
index 5a96e4f27d4b..2766758d2c69 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include "ngknet_main.h"
@@ -281,7 +281,7 @@ ngknet_filter_cb_register_by_name(ngknet_filter_cb_f filter_cb, const char *desc
         return -1;
     }
     fcb->cb = filter_cb;
-    strcpy(fcb->desc, desc); // nosemgrep
+    strcpy(fcb->desc, desc);
     list_add_tail(&fcb->list, &callback_ctrl.filter_cb_list);
 
     /* Check if any existing filter matches the registered name */
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h
index b0d16c891b56..04b06500c792 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef NGKNET_CALLBACK_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_dep.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_dep.h
index c52dbd7e4e7e..5d738cabc098 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_dep.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_dep.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef NGKNET_DEP_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c
index 92df52a372a3..78b619a28a34 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <linux/kconfig.h>
@@ -84,6 +84,11 @@ ngknet_filter_create(struct ngknet_dev *dev, ngknet_filter_t *filter)
         return SHR_E_UNAVAIL;
     }
 
+    fc = kzalloc(sizeof(*fc), GFP_KERNEL);
+    if (!fc) {
+        return SHR_E_MEMORY;
+    }
+
     spin_lock_irqsave(&dev->lock, flags);
 
     num = (long)dev->fc[0];
@@ -94,15 +99,10 @@ ngknet_filter_create(struct ngknet_dev *dev, ngknet_filter_t *filter)
     }
     if (id > NUM_FILTER_MAX) {
         spin_unlock_irqrestore(&dev->lock, flags);
+        kfree(fc);
         return SHR_E_RESOURCE;
     }
 
-    fc = kzalloc(sizeof(*fc), GFP_KERNEL);
-    if (!fc) {
-        spin_unlock_irqrestore(&dev->lock, flags);
-        return SHR_E_MEMORY;
-    }
-
     dev->fc[id] = fc;
     num += id == (num + 1) ? 1 : 0;
     dev->fc[0] = (void *)(long)num;
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h
index fdbc0c381f39..3cf955e47e79 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef NGKNET_EXTRA_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.c
index b3fcaec24317..cd2cbe3a31fe 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <linux/kconfig.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h
index cc14001411e9..bbda4df0a774 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef NGKNET_LINUX_H
@@ -34,6 +34,38 @@
 
 #define MODULE_PARAM(n, t, p)   module_param(n, t, p)
 
+/*
+ * The eth_hw_addr_set was added in Linux 5.15, but later backported
+ * to various longterm releases, so we need a more advanced check with
+ * the option to override the default.
+ */
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0))
+#define KERNEL_HAS_ETH_HW_ADDR_SET 1
+#endif
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,11,0) && \
+     LINUX_VERSION_CODE >= KERNEL_VERSION(5,10,188))
+#define KERNEL_HAS_ETH_HW_ADDR_SET 1
+#endif
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,5,0) && \
+     LINUX_VERSION_CODE >= KERNEL_VERSION(5,4,251))
+#define KERNEL_HAS_ETH_HW_ADDR_SET 1
+#endif
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,20,0) &&     \
+     LINUX_VERSION_CODE >= KERNEL_VERSION(4,19,291))
+#define KERNEL_HAS_ETH_HW_ADDR_SET 1
+#endif
+#ifndef KERNEL_HAS_ETH_HW_ADDR_SET
+#define KERNEL_HAS_ETH_HW_ADDR_SET 0
+#endif
+
+#if (KERNEL_HAS_ETH_HW_ADDR_SET == 0)
+static inline void
+eth_hw_addr_set(struct net_device *dev, const u8 *addr)
+{
+    memcpy(dev->dev_addr, addr, ETH_ALEN);
+}
+#endif
+
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0))
 #define NGKNET_ETHTOOL_LINK_SETTINGS 1
 #else
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c
index a19fbb258f85..d17e88d1c042 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 /*
@@ -366,6 +366,9 @@ ngknet_rx_frame_process(struct net_device *ndev, struct sk_buff **oskb)
     struct ngknet_rcpu_hdr *rch = (struct ngknet_rcpu_hdr *)skb->data;
     struct pkt_hdr *pkh = (struct pkt_hdr *)skb->data;
     uint8_t meta_len = pkh->meta_len;
+#if SAI_FIXUP && KNET_SVTAG_HOTFIX
+    int offset;
+#endif
 
     /* Remove FCS from packet length */
     skb_trim(skb, skb->len - ETH_FCS_LEN);
@@ -400,14 +403,24 @@ ngknet_rx_frame_process(struct net_device *ndev, struct sk_buff **oskb)
         ngknet_ptp_rx_hwts_set(ndev, skb);
     }
 
-      /* Check to ensure ngknet_callback_desc struct fits in sk_buff->cb */
+         /* Check to ensure ngknet_callback_desc struct fits in sk_buff->cb */
     BUILD_BUG_ON(sizeof(struct ngknet_callback_desc) > sizeof(skb->cb));
 #if SAI_FIXUP && KNET_SVTAG_HOTFIX /* SONIC-76482 */
     /* Strip SVTAG from the packets injected by the MACSEC block */
     if (priv->netif.flags & NGKNET_NETIF_F_DEL_SVTAG) {
         /* Strip SVTAG (4 bytes) */
-        memmove(skb->data + 4, skb->data, 12);
-        skb_pull(skb, 4);
+        if (priv->netif.flags & NGKNET_NETIF_F_RCPU_ENCAP) {
+            offset = PKT_HDR_SIZE + meta_len + 2*ETH_ALEN;
+            memmove(skb->data + offset, skb->data + offset + 4, skb->len - offset - 4);
+            skb_trim(skb, skb->len - 4);
+            pkh->data_len -= 4;
+            rch->data_len = htons(pkh->data_len);
+        } else {
+            offset = 2*ETH_ALEN;
+            memmove(skb->data + offset, skb->data + offset + 4, skb->len - offset - 4);
+            skb_trim(skb, skb->len - 4);
+            pkh->data_len -= 4;
+        }
     }
 #endif
 
@@ -816,7 +829,6 @@ ngknet_tx_frame_process(struct net_device *ndev, struct sk_buff **oskb)
         pkh->data_len += VLAN_HLEN;
         tag_len = VLAN_HLEN;
     }
-
 #if SAI_FIXUP && KNET_SVTAG_HOTFIX /* SONIC-76482 */
     /* XGS MACSEC: Add SVTAG (Secure Vlan TAG) */
     if (priv->netif.flags & NGKNET_NETIF_F_ADD_SVTAG) {
@@ -855,7 +867,6 @@ ngknet_tx_frame_process(struct net_device *ndev, struct sk_buff **oskb)
         printk(KERN_DEBUG "ether_type: %04x, pktype %d, subport %d\n", ether_type, (data[14] >> 2) & 0xf, data[15]);
     }
 #endif
-
     /* Optional callback handle */
     if (dev->cbc->tx_cb) {
         struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb);
@@ -1803,7 +1814,9 @@ ngknet_ndev_init(ngknet_netif_t *netif, struct net_device **nd)
     ndev->hw_features = NETIF_F_RXCSUM |
                         NETIF_F_HW_VLAN_CTAG_RX |
                         NETIF_F_HW_VLAN_CTAG_TX;
-    ndev->features = ndev->hw_features | NETIF_F_HIGHDMA;
+    ndev->features = NETIF_F_RXCSUM |
+                     NETIF_F_HIGHDMA |
+                     NETIF_F_HW_VLAN_CTAG_RX;
 
     /* Register the kernel network device */
     rv = register_netdev(ndev);
@@ -2474,6 +2487,8 @@ ngknet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
         return 0;
     }
 
+    memset(&iod, 0, sizeof(iod));
+
     switch (cmd) {
     case NGKNET_VERSION_GET:
         DBG_CMD(("NGKNET_VERSION_GET\n"));
@@ -2535,6 +2550,7 @@ ngknet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
             ioc.rc = SHR_E_PARAM;
             break;
         }
+        dev->dev_info.dev_id = pdev->dev_id;
         pdev->ctrl.bm_grp = dev_cfg->bm_grp;
         for (gi = 0; gi < NUM_GRP_MAX; gi++) {
             if (1 << gi & dev_cfg->bm_grp) {
@@ -2619,6 +2635,7 @@ ngknet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
         if (chan_cfg->chan_ctrl & NGKNET_HDR_BYTE_SWAP) {
             pdev->ctrl.grp[gi].que_ctrl[qi] |= PDMA_HDR_BYTE_SWAP;
         }
+        pdev->ctrl.grp[gi].pipe[qi] = chan_cfg->pipe;
         break;
     case NGKNET_QUEUE_QUERY:
         DBG_CMD(("NGKNET_QUEUE_QUERY\n"));
@@ -2643,6 +2660,7 @@ ngknet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
         } else {
             chan_cfg->rx_buf_size = 0;
         }
+        chan_cfg->pipe = pdev->ctrl.grp[gi].pipe[qi];
         if (kal_copy_to_user((void *)(unsigned long)ioc.op.data.buf, chan_cfg,
                              ioc.op.data.len, sizeof(*chan_cfg))) {
             return -EFAULT;
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h
index ac740a409fc4..ddff0430155f 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef NGKNET_MAIN_H
@@ -58,6 +58,7 @@
 #define DBG_RATE(_s)        do { if (debug & DBG_LVL_RATE) printk _s; } while (0)
 #define DBG_LINK(_s)        do { if (debug & DBG_LVL_LINK) printk _s; } while (0)
 
+
 /* FIXME: SAI_FIXUP */
 #define SAI_FIXUP           1
 #define KNET_SVTAG_HOTFIX   1
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c
index 19b83df7229f..37ce61fcc3a9 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <lkm/lkm.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.h
index 4664f0973e99..e1eb263909e5 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef NGKNET_PROCFS_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.c
index e648db8c49fe..37920eb9fac6 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include "ngknet_callback.h"
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.h
index bccbb3a99d69..77946aa2061b 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef NGKNET_PTP_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild
index b60be7fda92f..d8ed4c27468e 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild
@@ -2,7 +2,7 @@
 #
 # Linux KNET Callback module.
 #
-# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+# Copyright 2018-2024 Broadcom. All rights reserved.
 # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
 # 
 # This program is free software; you can redistribute it and/or
@@ -15,7 +15,7 @@
 # GNU General Public License for more details.
 # 
 # A copy of the GNU General Public License version 2 (GPLv2) can
-# be found in the LICENSES folder.$
+# be found in the LICENSES folder.
 #
 
 ifneq ($(OUTPUT_DIR),)
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Makefile
index 704ea29a0523..89829f06b537 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Makefile
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Makefile
@@ -1,5 +1,5 @@
 #
-# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+# Copyright 2018-2024 Broadcom. All rights reserved.
 # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
 # 
 # This program is free software; you can redistribute it and/or
@@ -12,7 +12,7 @@
 # GNU General Public License for more details.
 # 
 # A copy of the GNU General Public License version 2 (GPLv2) can
-# be found in the LICENSES folder.$
+# be found in the LICENSES folder.
 #
 # Linux KNET Callback module.
 #
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c
index 704a3072a312..f7501cf2962f 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c
@@ -3,7 +3,7 @@
  * NGKNET Callback module entry.
  */
 /*
- * $Copyright: (c) 2022 Broadcom.
+ * $Copyright: (c) 2024 Broadcom.
  * Broadcom Proprietary and Confidential. All rights reserved.$
  */
 
@@ -104,6 +104,10 @@ dev_id_get(char* dev_type)
     {
         dev_id = 0xf905;
     }
+    else if (0== strcmp(dev_type, "bcm78800_a0"))
+    {
+        dev_id = 0xf800;
+    }
     return dev_id;
 }
 
@@ -133,7 +137,7 @@ get_tag_status(char* dev_type, char* dev_var, void *meta)
     }
 #endif
 
-    if ((0xb880 == dev_id ) || (0xb780 == dev_id))
+    if ((0xb880 == dev_id ) || (0xb780 == dev_id) || (0xf800 == dev_id))
     {
         /* Field BCM_PKTIO_RXPMD_MATCH_ID_LO has tag status in RX PMD */
         fd_index = 2;
diff --git a/platform/broadcom/saibcm-modules/sdklt/make/kpmd.mk b/platform/broadcom/saibcm-modules/sdklt/make/kpmd.mk
index db21c5829d1f..cc89a930e037 100644
--- a/platform/broadcom/saibcm-modules/sdklt/make/kpmd.mk
+++ b/platform/broadcom/saibcm-modules/sdklt/make/kpmd.mk
@@ -1,5 +1,5 @@
 #
-# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+# Copyright 2018-2024 Broadcom. All rights reserved.
 # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
 # 
 # This program is free software; you can redistribute it and/or
@@ -12,7 +12,7 @@
 # GNU General Public License for more details.
 # 
 # A copy of the GNU General Public License version 2 (GPLv2) can
-# be found in the LICENSES folder.$
+# be found in the LICENSES folder.
 #
 # Helper makefile for building stand-alone PMD kernel module
 #
@@ -38,12 +38,7 @@ endif
 #
 R = 2>/dev/null
 
-# Check for valid FLTG configuration by default
-ifneq (0,$(KPMD_CONFIG_CHECK))
-KPMD_CONFIG := config
-endif
-
-mklinks: $(KPMD_CONFIG)
+mklinks: config
 	mkdir -p $(GENDIR)
 	-ln -s $(BCMPKTDIR)/chip/*/*lbhdr.c $(GENDIR) $(R)
 	-ln -s $(BCMPKTDIR)/chip/*/*rxpmd.c $(GENDIR) $(R)
@@ -64,24 +59,31 @@ mklinks: $(KPMD_CONFIG)
 	-ln -s $(KMODDIR)/Kbuild $(GENDIR) $(R)
 
 rmlinks:
-	-rm -f $(KMODDIR)/bcm*
-	-rm -f $(KMODDIR)/shr*
+	-rm -f $(GENDIR)/bcm*
+	-rm -f $(GENDIR)/shr*
 
 # FLTG tools directory (not present in GPL package)
 FLTG_DIR := $(SDK)/tools/fltg
 
+# GPL release does not contain FLTG tools
+ifneq (,$(wildcard $(FLTG_DIR)))
+HAS_FLTG := 1
+endif
+
 # File indicating that the FLTG build is complete
 FLTG_DONE := $(FLTG_DIR)/generated/ltt.sum
 
 # If not GPL, check that FLTG files have been generated
 config:
-	if [ -d $(FLTG_DIR) ]; then \
-	    if [ ! -e $(FLTG_DONE) ]; then \
-	        echo 'kpmd.mk: Please run "make -C $$SDK config"' \
-	             'before building the Linux PMD library'; \
-	        exit 1; \
-	    fi \
-	fi
+ifeq (1,$(HAS_FLTG))
+	@echo Updating SDK configuration for PMD library
+	$(MAKE) -C $(SDK) config
+endif
+
+# If not GPL, extract default variant name
+ifeq (1,$(HAS_FLTG))
+include $(SDK)/make/defvar.mk
+endif
 
 kpmd: mklinks
 
@@ -92,67 +94,44 @@ distclean:: rmlinks
 ALL_CHIPS := $(subst $(BCMPKTDIR)/chip/,,$(wildcard $(BCMPKTDIR)/chip/bcm*))
 VAR_CHIPS := $(subst $(BCMPKTDIR)/xfcr/,,$(wildcard $(BCMPKTDIR)/xfcr/bcm*))
 
-# If SDK_VARIANTS is defined but not SDK_CHIPS, find the chips for the
-# specified variants and set SDK_CHIPS so the partial build can work correctly
-ifdef SDK_VARIANTS
-SDK_VARIANTS_SPC := $(call spc_sep,$(SDK_VARIANTS))
-SDK_VARIANTS_LC := $(call var_lc,$(SDK_VARIANTS_SPC))
+# Set options for partial build support. Note that this will define
+# both SDK_CHIPS_UC and SDK_VARIANTS_UC, which are used below.
+include $(SDK)/make/partial.mk
+
+# Set PMD_CHIPS and VARIANT_DIRS
 ifdef SDK_CHIPS
+PMD_CHIPS := $(call var_lc,$(SDK_CHIPS_UC))
+ifdef SDK_VARIANTS
 # Both SDK_CHIPS and SDK_VARIANTS
-# Set PMD_CHIPS and VARIANT_DIRS
-SDK_CHIPS_SPC := $(call spc_sep,$(SDK_CHIPS))
-SDK_CHIPS_LC := $(call var_lc,$(SDK_CHIPS_SPC))
-PMD_CHIPS := $(SDK_CHIPS_LC)
+SDK_VARIANTS_LC := $(call var_lc,$(SDK_VARIANTS_UC))
 TMP_ALL_VAR_DIRS = $(foreach K, $(PMD_CHIPS),$(filter-out $(SDK_VARIANTS_LC),\
-	$(shell find $(BCMPKTDIR)/xfcr/$K/* -type d)))
-VARIANT_DIRS := $(foreach K, $(SDK_CHIPS_LC),$(foreach V, $(SDK_VARIANTS_LC),\
-	$(findstring $(BCMPKTDIR)/xfcr/$K/$V,$(TMP_ALL_VAR_DIRS))))
-else
-# SDK_VARIANTS only
-# Set SDK_CHIPS, PMD_CHIPS and VARIANT_DIRS
-TMP_ALL_VAR_DIRS = $(foreach K, $(ALL_CHIPS),$(filter-out $(SDK_VARIANTS_LC),\
-	$(shell find $(BCMPKTDIR)/xfcr/$K/* -type d)))
-VARIANT_DIRS := $(foreach K, $(ALL_CHIPS),$(foreach V, $(SDK_VARIANTS_LC),\
+	$(wildcard $(BCMPKTDIR)/xfcr/$(K)/*)))
+VARIANT_DIRS := $(foreach K, $(PMD_CHIPS),$(foreach V, $(SDK_VARIANTS_LC),\
 	$(findstring $(BCMPKTDIR)/xfcr/$K/$V,$(TMP_ALL_VAR_DIRS))))
-TMP_VARIANTS = $(foreach D, $(VARIANT_DIRS),$(lastword $(subst /, ,$D)))
-SDK_CHIPS_SPC := $(foreach D, $(VARIANT_DIRS),$(lastword $(filter-out \
-	$(lastword $(subst /, ,$D)),$(subst /, ,$D))))
-SDK_CHIPS_LC := $(call var_lc,$(SDK_CHIPS_SPC))
-SDK_CHIPS := $(SDK_CHIPS_LC)
-PMD_CHIPS := $(SDK_CHIPS)
-endif
 else
-# If SDK_VARIANTS is not defined but SDK_CHIPS is defined, we want all variants
-# for the chips so set SDK_VARIANTS for the partial build to work correctly
-ifdef SDK_CHIPS
 # SDK_CHIPS only
-# Set SDK_VARIANTS, PMD_CHIPS and VARIANT_DIRS
-SDK_CHIPS_SPC := $(call spc_sep,$(SDK_CHIPS))
-SDK_CHIPS_LC := $(call var_lc,$(SDK_CHIPS_SPC))
-VARIANT_DIRS := $(foreach K, $(SDK_CHIPS),\
-	$(shell find $(BCMPKTDIR)/xfcr/$K/* -type d))
+VARIANT_DIRS := $(foreach K, $(PMD_CHIPS),\
+	$(wildcard $(BCMPKTDIR)/xfcr/$(K)/* -type d))
+# If SDK_VARIANTS is not defined but SDK_CHIPS is defined, we want all
+# variants for the chips so set SDK_VARIANTS for the partial build to
+# work correctly.
 SDK_VARIANTS_SPC := $(foreach D, $(VARIANT_DIRS),$(lastword $(subst /, ,$D)))
 SDK_VARIANTS_LC := $(call var_lc,$(SDK_VARIANTS_SPC))
 SDK_VARIANTS := $(SDK_VARIANTS_LC)
-PMD_CHIPS := $(SDK_CHIPS_LC)
+endif # SDK_VARIANTS
 else
 # Neither SDK_VARIANTS or SDK_CHIPS
-# Set PMD_CHIPS and VARIANT_DIRS
 PMD_CHIPS := $(ALL_CHIPS)
 VARIANT_DIRS := $(foreach K, $(filter $(VAR_CHIPS),$(PMD_CHIPS)),\
-	$(shell find $(BCMPKTDIR)/xfcr/$K/* -type d))
-endif
-endif
-
-# Set options for partial build support
-include $(SDK)/make/partial.mk
+	$(wildcard $(BCMPKTDIR)/xfcr/$(K)/* -type d))
+endif # SDK_CHIPS
 
 ifdef SDK_CHIPS
-KNETCB_CPPFLAGS := $(SDK_CPPFLAGS)
+KNETCB_CPPFLAGS := -DKPMD $(SDK_CPPFLAGS)
 endif
 
 ifdef SDK_VARIANTS
-override KNETCB_CPPFLAGS := $(SDK_CPPFLAGS)
+override KNETCB_CPPFLAGS := -DKPMD $(SDK_CPPFLAGS)
 endif
 
 KNETCB_CPPFLAGS += -DKPMD
diff --git a/platform/broadcom/saibcm-modules/sdklt/make/lkm.mk b/platform/broadcom/saibcm-modules/sdklt/make/lkm.mk
index df45e70048d3..2e892414637c 100644
--- a/platform/broadcom/saibcm-modules/sdklt/make/lkm.mk
+++ b/platform/broadcom/saibcm-modules/sdklt/make/lkm.mk
@@ -1,5 +1,5 @@
 #
-# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+# Copyright 2018-2024 Broadcom. All rights reserved.
 # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
 # 
 # This program is free software; you can redistribute it and/or
@@ -12,7 +12,7 @@
 # GNU General Public License for more details.
 # 
 # A copy of the GNU General Public License version 2 (GPLv2) can
-# be found in the LICENSES folder.$
+# be found in the LICENSES folder.
 #
 # Shared makefile include for building Linux kernel modules.
 #
diff --git a/platform/broadcom/saibcm-modules/sdklt/make/makeutils.mk b/platform/broadcom/saibcm-modules/sdklt/make/makeutils.mk
index dd6477a7dc07..303b831080d7 100644
--- a/platform/broadcom/saibcm-modules/sdklt/make/makeutils.mk
+++ b/platform/broadcom/saibcm-modules/sdklt/make/makeutils.mk
@@ -1,5 +1,5 @@
 #
-# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+# Copyright 2018-2024 Broadcom. All rights reserved.
 # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
 # 
 # This program is free software; you can redistribute it and/or
@@ -12,7 +12,7 @@
 # GNU General Public License for more details.
 # 
 # A copy of the GNU General Public License version 2 (GPLv2) can
-# be found in the LICENSES folder.$
+# be found in the LICENSES folder.
 #
 # Various make utility functions.
 #
diff --git a/platform/broadcom/saibcm-modules/sdklt/make/partial.mk b/platform/broadcom/saibcm-modules/sdklt/make/partial.mk
index ffbe3323de1b..5291f705b56f 100644
--- a/platform/broadcom/saibcm-modules/sdklt/make/partial.mk
+++ b/platform/broadcom/saibcm-modules/sdklt/make/partial.mk
@@ -1,5 +1,5 @@
 #
-# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+# Copyright 2018-2024 Broadcom. All rights reserved.
 # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
 # 
 # This program is free software; you can redistribute it and/or
@@ -12,7 +12,7 @@
 # GNU General Public License for more details.
 # 
 # A copy of the GNU General Public License version 2 (GPLv2) can
-# be found in the LICENSES folder.$
+# be found in the LICENSES folder.
 #
 # SDK partial build support
 #
diff --git a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_libc.h b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_libc.h
index 10413f08bbe3..f892de4364d3 100644
--- a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_libc.h
+++ b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_libc.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef SAL_LIBC_H
@@ -26,7 +26,9 @@
 #include <sal/sal_types.h>
 
 /* System MUST supply stdarg.h */
-#include <linux/stdarg.h>
+#ifndef SAL_LINUX
+#include <stdarg.h>
+#endif
 
 /*!
  * \cond SAL_STDC
diff --git a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_linux.h b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_linux.h
index e24b073ff429..83c3c3df6a35 100644
--- a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_linux.h
+++ b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_linux.h
@@ -7,7 +7,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,7 +20,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef SAL_LINUX_H
@@ -36,10 +36,21 @@
 
 #else
 
+
 /*!
  * \cond SAL_LINUX
  */
 
+#include <linux/version.h>
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0))
+/* Use built-in version */
+#include <linux/stdarg.h>
+#else
+/* Borrow from compiler */
+#include <stdarg.h>
+#endif
+
 #include <linux/types.h>
 #define SAL_CONFIG_DEFINE_SIZE_T        0
 #define SAL_CONFIG_DEFINE_UINT8_T       0
diff --git a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_types.h b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_types.h
index 2ca0dcd40abb..40ef6a27b269 100644
--- a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_types.h
+++ b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_types.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef SAL_TYPES_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal_config.h b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal_config.h
index 6778b010dbda..fc7bd1bb87d6 100644
--- a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal_config.h
+++ b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal_config.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef SAL_CONFIG_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/shr/bitop/shr_bitop_range_clear.c b/platform/broadcom/saibcm-modules/sdklt/shr/bitop/shr_bitop_range_clear.c
index 307014215d99..8a6d345941c9 100644
--- a/platform/broadcom/saibcm-modules/sdklt/shr/bitop/shr_bitop_range_clear.c
+++ b/platform/broadcom/saibcm-modules/sdklt/shr/bitop/shr_bitop_range_clear.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #include <shr/shr_bitop.h>
diff --git a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_bitop.h b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_bitop.h
index c213fdcf2ab7..f62a6f3b8a77 100644
--- a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_bitop.h
+++ b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_bitop.h
@@ -11,7 +11,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -24,7 +24,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef SHR_BITOP_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_error.h b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_error.h
index cca344b3f2c7..70b015a5cd07 100644
--- a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_error.h
+++ b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_error.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef SHR_ERROR_H
diff --git a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_types.h b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_types.h
index f180585ca7d6..eef71e1a67b2 100644
--- a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_types.h
+++ b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_types.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * Copyright 2018-2024 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  * 
  * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
+ * be found in the LICENSES folder.
  */
 
 #ifndef SHR_TYPES_H
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h
index b287d3ede41d..e9d769869f96 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h
@@ -1,7 +1,7 @@
 /***********************************************************************
  *
  * $Id: linux-bde.h,v 1.24 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -26,6 +26,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * Linux Broadcom Device Enumerators
  *
@@ -171,6 +172,7 @@ extern int linux_bde_destroy(ibde_t* bde);
 extern int linux_bde_instance_attach(unsigned int dev_mask,unsigned int dma_size);
 extern int linux_bde_instance_config(linux_bde_device_bitmap_t dev_mask,unsigned int dma_size);
 #endif
+extern int linux_bde_get_pci_info(int d, uint32 *bus, uint32 *slot, uint32 *func);
 
 #ifdef __KERNEL__
 
@@ -270,6 +272,19 @@ extern int lkbde_cpu_pci_register(int d);
 extern int lkbde_intr_cb_register(int d,
                                   int (*intr_pending)(void*),
                                   void *intr_pending_data);
+
+/*
+ * Get the PCI bus number, bus slot and function for a PCI device.
+ */
+extern int lkbde_get_dev_pci_info(int d, uint32_t *bus,
+                                  uint32_t *slot, uint32_t *func);
+
+#ifdef INCLUDE_SRAM_DMA
+#ifdef SRAM_DMA_NEEDS_KERNEL_APIS
+extern void _update_apis_for_sram_dma();
+#endif
+extern void lkbde_get_sram_dma_info(unsigned d, uint32 *sram_start, uint32 *sram_size);
+#endif /* INCLUDE_SRAM_DMA */
 /*
  * This flag must be OR'ed onto the device number when calling
  * interrupt_connect/disconnect and irq_mask_set functions from
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux_dma.h b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux_dma.h
index f4b3aa74f734..d69ad43207cd 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux_dma.h
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux_dma.h
@@ -1,7 +1,7 @@
 /***********************************************************************
  *
  * $Id: linux_dma.h,v 1.24 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -26,6 +26,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  **********************************************************************/
 
@@ -72,6 +73,11 @@ extern void *_p2l(int d, sal_paddr_t paddr);
 extern int _dma_pool_allocated(void);
 extern int _dma_mmap(struct file *filp, struct vm_area_struct *vma);
 
+#ifdef INCLUDE_SRAM_DMA
+/* A mode to use SRAM for DMA for some systems where the CPU has no PCIe connection to the device */
+extern int use_sram_for_dma;
+#endif /* INCLUDE_SRAM_DMA */
+
 #endif /* __KERNEL__ */
 
 #endif /* __LINUX_DMA_H__ */
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/include/mpool.h b/platform/broadcom/saibcm-modules/systems/bde/linux/include/mpool.h
index ca96dc6c95b3..232bbfa83e70 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/include/mpool.h
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/include/mpool.h
@@ -1,6 +1,6 @@
 /*
  * $Id: mpool.h,v 1.2 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  */
 
 #ifndef __MPOOL_H__
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/Makefile b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/Makefile
index d771c315d73a..72f390e10a40 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/Makefile
@@ -1,6 +1,6 @@
 # -*- Makefile -*-
 # $Id: Makefile,v 1.18 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -25,6 +25,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 #
 # Makefile for Linux kernel BDE
 #
@@ -85,6 +86,7 @@ module: $(KMODULE)
 # is not created and all action is done in systems/bde/linux/kernel
 #
 $(KMODULE): $(SRCS_COMPOSING)
+	mkdir -p $(BLDDIR)
 	rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR)
 	rm -f $(BLDDIR)/*.c
 	rm -f $(BLDDIR)/*.o
@@ -124,14 +126,14 @@ $(KMODULE): $(MODULE)
 	mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR)
 	cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile
 	MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko
+
+include $(SDK)/make/Make.depend
 # }
 endif
 
 kernel_libs:
 	$(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared
 
-include $(SDK)/make/Make.depend
-
 # Make.depend is before clean:: so that Make.depend's clean:: runs first.
 
 clean::
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c
index 6b591f75f71f..1a7786b1f89b 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c
@@ -1,5 +1,5 @@
 /*
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -24,6 +24,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  */
 
 /*
@@ -65,6 +66,14 @@
                          | (((_x) & 0x00ff0000) >>  8) \
                          | (((_x) & 0x0000ff00) <<  8) \
                          | (((_x) & 0x000000ff) << 24))
+#define CMIC_SWAP64(_x)   ((((_x) & 0xff000000) >> 24) \
+                         | (((_x) & 0x00ff0000) >>  8) \
+                         | (((_x) & 0x0000ff00) <<  8) \
+                         | (((_x) & 0x000000ff) << 24) \
+                         | (((_x) & 0xff00000000000000UL) >> 24) \
+                         | (((_x) & 0x00ff000000000000UL) >>  8) \
+                         | (((_x) & 0x0000ff0000000000UL) <<  8) \
+                         | (((_x) & 0x000000ff00000000UL) << 24))
 #endif /* defined(CMIC_SOFT_BYTE_SWAP) */
 
 #define PCI_USE_INT_NONE    (-1)
@@ -194,6 +203,12 @@ LKM_MOD_PARAM(dma_lock, "i", int, (S_IRUGO | S_IWUSR));
 MODULE_PARM_DESC(dma_lock,
 "Simulation of stuck interrupts.");
 
+/* Additional configurations for PCI bridges */
+static int pci_bridge_setup = 1;
+LKM_MOD_PARAM(pci_bridge_setup, "i", int, (S_IRUGO | S_IWUSR));
+MODULE_PARM_DESC(pci_bridge_setup,
+"Additional PCI bridge configurations in initialization (default yes).");
+
 /* Compatibility */
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30))
 #define _ISR_RET irqreturn_t
@@ -371,6 +386,10 @@ typedef struct bde_ctrl_s {
     uint32 stuck_interrupts;      /* Number of stuck interrupts detected */
     uint32 no_intr_isr_ticks;     /* Number of ISR ticks without interrupt occurred */
     struct timer_list isr_tick;   /* Timer tick to prevent stuck interrupt */
+#ifdef INCLUDE_SRAM_DMA
+    uint32 dev_sram_dma_start;    /* start address of device SRAM used for DMA */
+    uint32 dev_sram_dma_size;     /* size in bytes of device SRAM used for DMA */
+#endif /* INCLUDE_SRAM_DMA */
 } bde_ctrl_t;
 
 static bde_ctrl_t _devices[LINUX_BDE_MAX_DEVICES];
@@ -588,7 +607,12 @@ _bde_add_device(void)
             _devices[i] = tmp_dev;
         }
 
-        _dma_per_device_init(_switch_ndevices-1);
+#ifdef INCLUDE_SRAM_DMA
+        if (!use_sram_for_dma || (_devices[_switch_ndevices-1].dev_type & BDE_USER_DEV_TYPE) == 0)
+#endif /* INCLUDE_SRAM_DMA */
+        {
+            _dma_per_device_init(_switch_ndevices-1);
+        }
     }
 
     /* Initialize device locks */
@@ -1644,6 +1668,22 @@ static const struct pci_device_id _id_table[] = {
     { BROADCOM_VENDOR_ID, BCM8884D_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM8884E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM8884F_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, BCM88810_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, BCM88811_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, BCM88812_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, BCM88813_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, BCM88814_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, BCM88815_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, BCM88816_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, BCM88817_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, BCM88818_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, BCM88819_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, BCM8881A_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, BCM8881B_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, BCM8881C_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, BCM8881D_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, BCM8881E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, BCM8881F_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM88830_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM88831_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM88832_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
@@ -2570,7 +2610,7 @@ _pci_probe(struct pci_dev *dev, const struct pci_device_id *ent)
                     dev->vendor, dev->device);
         }
 
-        /* FIXME: "workarounds" previously called "total h_acks" */
+
         /*
          * These are workarounds to get around some existing
          * kernel problems :(
@@ -2869,7 +2909,6 @@ _pci_probe(struct pci_dev *dev, const struct pci_device_id *ent)
         if (debug >= 1) gprintk("PCI resource len 8MB\n");
     }
 
-
 #ifdef LINUX_BDE_DMA_DEVICE_SUPPORT
     ctrl->dma_dev = &dev->dev;
 #endif
@@ -2880,7 +2919,39 @@ _pci_probe(struct pci_dev *dev, const struct pci_device_id *ent)
           (unsigned long)ctrl->bde_dev.base_address, (unsigned long)ctrl->bde_dev.base_address1);
     }
 
-    if (rescan) { /* map IOMMU for re-probed devices */
+#ifdef INCLUDE_SRAM_DMA
+        /* Check if the device should use SRAM for DMA, if so configure the SRAM to be used */
+        if (use_sram_for_dma) {
+#ifdef BCM_DNXF3_SUPPORT
+            switch (dev->device & DNXC_DEVID_FAMILY_MASK) {
+              case RAMON2_DEVICE_ID: /* Mark the device as user type if SRAM mode RM2/3 */
+              case RAMON3_DEVICE_ID:
+                /* Check if we can use RTS using ICFG_RTS_STRAPS, has to be done after PCIe is enabled. */
+                if ((shbde_iproc_pci_read(&ctrl->shbde, (void *)ctrl->bde_dev.base_address1, 0x2920034) & 2) != 0) {
+                    ctrl->dev_sram_dma_start = 0x38100000;
+                    ctrl->dev_sram_dma_size = 0x400000; /* 4MB */
+                } else { /* Use free M0SSQ SRAM */
+                    ctrl->dev_sram_dma_start = 0x2070000;
+                    ctrl->dev_sram_dma_size = 0x10000; /* 64KB */
+                }
+                ctrl->dev_type |= BDE_USER_DEV_TYPE; /* Mark as user defined access for BDE handling access to BARs */
+                if (debug >= 4) {
+                    gprintk("PCI device 0x%x:0x%x using SRAM DMA at 0x%x size 0x%x dev_type=0x%x dev=%u\n", dev->vendor, dev->device,
+                            ctrl->dev_sram_dma_start, ctrl->dev_sram_dma_size, ctrl->dev_type, (unsigned)(ctrl - _devices));
+                }
+                    break;
+                default:
+                    break;
+            }
+#endif /* BCM_DNXF3_SUPPORT */
+        }
+#endif /* INCLUDE_SRAM_DMA */
+
+    if (rescan /* map IOMMU for re-probed devices */
+#ifdef INCLUDE_SRAM_DMA
+        && (!use_sram_for_dma || (_devices[rescan_idx].dev_type & BDE_USER_DEV_TYPE) == 0)
+#endif /* INCLUDE_SRAM_DMA */
+       ) {
         _dma_per_device_init(rescan_idx);
     }
 
@@ -3212,8 +3283,10 @@ _init(void)
     }
 
 #ifdef CONFIG_PCI
-    /* Note: PCI-PCI bridge  uses results from pci_register_driver */
-    p2p_bridge();
+    /* Note: PCI-PCI bridge uses results from pci_register_driver */
+    if (pci_bridge_setup) {
+        p2p_bridge();
+    }
 #endif
 
 #ifdef BCM_METROCORE_LOCAL_BUS
@@ -3339,6 +3412,7 @@ _pprint(struct seq_file *m)
     pprintf(m, "\tmaxpayload=%d\n", maxpayload);
     pprintf(m, "\tusemsi=%d\n", usemsi);
     pprintf(m, "\tisrtickms=%d\n", isrtickms);
+    pprintf(m, "\tpci_bridge_setup=%d\n", pci_bridge_setup);
 
     _dma_pprint(m);
 
@@ -3424,6 +3498,7 @@ _pprint(struct seq_file *m)
     }
     return 0;
 }
+
 /*
  * Some kernels are configured to prevent mapping of kernel RAM memory
  * into user space via the /dev/mem device.
@@ -3431,6 +3506,16 @@ _pprint(struct seq_file *m)
  * The function below provides a backdoor to map IO and DMA memory to
  * user space via the BDE device file.
  */
+static
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32))
+const
+#endif
+struct vm_operations_struct bde_vma_ops = {
+#ifdef CONFIG_HAVE_IOREMAP_PROT
+	.access = generic_access_phys,
+#endif
+};
+
 static int
 _bde_mmap(struct file *filp, struct vm_area_struct *vma)
 {
@@ -3455,6 +3540,9 @@ _bde_mmap(struct file *filp, struct vm_area_struct *vma)
         }
     }
 
+    /* Support debug access to the mapping */
+    vma->vm_ops = &bde_vma_ops;
+
     if (pio_range_valid) {
         vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 
@@ -3695,6 +3783,45 @@ _write(int d, uint32_t addr, uint32_t data)
 
 }
 
+static uint64
+_read64(int d, uint32_t addr)
+{
+    uint64_t  data;
+    if (!VALID_DEVICE(d)) {
+        data =  (uint64_t)-1;
+        return *(uint64 *)&data;
+    }
+
+    if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) {
+        data =  (uint64_t)-1;
+        return *(uint64 *)&data;
+    }
+
+    data = ((VOL uint64_t *)_devices[d].bde_dev.base_address)[addr / 8];
+#if defined(CMIC_SOFT_BYTE_SWAP)
+    data = CMIC_SWAP64(data);
+#endif
+    return *(uint64 *)&data;
+}
+
+static void
+_write64(int d, uint32_t addr, uint64 data)
+{
+    if (!VALID_DEVICE(d) || !(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) {
+        return;
+    }
+
+#if defined(CMIC_SOFT_BYTE_SWAP)
+    data = CMIC_SWAP64(data);
+#endif
+
+    ((VOL uint64 *)_devices[d].bde_dev.base_address)[addr / 8] = data;
+#ifdef KEYSTONE
+    /* Enforce PCIe transaction ordering. Commit the write transaction */
+    __asm__ __volatile__("sync");
+#endif
+}
+
 static void
 _run_isrs(bde_ctrl_t *ctrl)
 {
@@ -4066,7 +4193,7 @@ _iproc_read(int d, uint32_t addr)
         return -1;
     }
 
-    if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) {
+    if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type)) && (_devices[d].dev_type & BDE_USER_DEV_TYPE) == 0) {
         return -1;
     }
 
@@ -4089,7 +4216,7 @@ _iproc_write(int d, uint32_t addr, uint32_t data)
         return -1;
     }
 
-    if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type))) {
+    if (!(BDE_DEV_MEM_MAPPED(_devices[d].dev_type)) && (_devices[d].dev_type & BDE_USER_DEV_TYPE) == 0) {
         return -1;
     }
 
@@ -4297,7 +4424,7 @@ lkbde_cpu_pci_register(int d)
     case BCM88562_DEVICE_ID:
     case BCM88661_DEVICE_ID:
     case BCM88664_DEVICE_ID:
-        /* Fix bar 0 address */ /* FIXME: write full phy address */
+        /* Fix bar 0 address */ 
         pci_write_config_byte(ctrl->pci_device, 0x12, 0x10);
         pci_write_config_byte(ctrl->pci_device, 0x13, 0x60);
 
@@ -4426,6 +4553,8 @@ static ibde_t _ibde = {
     .iproc_read = _iproc_read,
     .iproc_write = _iproc_write,
     .get_cmic_ver = _get_cmic_ver,
+    .read64 = _read64,
+    .write64 = _write64,
 };
 
 /*
@@ -4666,6 +4795,39 @@ lkbde_dev_instid_get(int d, uint32 *instid)
     return 0;
 }
 
+/*
+ * Function: lkbde_get_dev_pci_info
+ *
+ * Purpose:
+ *     Get the PCI bus number, bus slot, and function for a PCI device.
+ * Returns:
+ *    0 on success, -1 on error.
+ */
+int
+lkbde_get_dev_pci_info(int d, uint32_t *bus, uint32_t *slot, uint32_t *func)
+{
+    bde_ctrl_t *ctrl;
+
+    if (!VALID_DEVICE(d)) {
+        return -1;
+    }
+
+    ctrl = _devices + d;
+
+    if (ctrl->dev_type & BDE_PCI_DEV_TYPE) {
+        struct pci_dev *device = ctrl->pci_device;
+        if (bus)
+            *bus = device->bus->number;
+        if (slot)
+            *slot = PCI_SLOT(device->devfn);
+        if (func)
+            *func = PCI_FUNC(device->devfn);
+        return 0;
+    } else {
+        return -1;
+    }
+}
+
 /*
  * When a secondary interrupt handler is installed this function
  * is used for synchronizing hardware access to the IRQ mask
@@ -4835,6 +4997,72 @@ lkbde_intr_cb_register(int d,
     return 0;
 }
 
+#ifdef INCLUDE_SRAM_DMA
+
+#ifdef SRAM_DMA_NEEDS_KERNEL_APIS
+/* implementation of BDE APIs for DMA SRAM mode */
+
+static int
+_sinval_sram(int d, void *ptr, int length)
+{
+    return 0;
+}
+
+static int
+_sflush_sram(int d, void *ptr, int length)
+{
+    return 0;
+}
+
+/* In SRAM DMA there are no virtual addresses.
+ * We assume the CPU cannot access the SRAM directly, even if it is mapped to a BAR window.
+ * Therfore p2l and l2p should not be called.
+ * If they are called, we will return the input value,
+ * possibly except if it is not in the SRAM address range used for DMA.
+ */
+
+static void *
+_p2l_sram(int d, sal_paddr_t paddr)
+{
+    uint32 dev_sram_dma_start = _devices[d].dev_sram_dma_start;
+    uint32 dev_sram_dma_size  = _devices[d].dev_sram_dma_size;
+    if (paddr < dev_sram_dma_start || paddr >= dev_sram_dma_start + dev_sram_dma_size) {
+        gprintk("Error: SRAM address translation called for %p which is outside SRAM range %u-%u\n",
+                (void*)paddr, dev_sram_dma_start, dev_sram_dma_start +dev_sram_dma_size - 1);
+        return 0;
+    }
+    return (void *)paddr;
+}
+
+static sal_paddr_t
+_l2p_sram(int d, void *vaddr)
+{
+    return (sal_paddr_t)_p2l_sram(d, (sal_paddr_t)vaddr);
+}
+
+/* upate BDE API handles for SRAM DMA */
+void _update_apis_for_sram_dma()
+{
+    _ibde.sinval = _sinval_sram;
+    _ibde.sflush = _sflush_sram;
+    _ibde.l2p = _l2p_sram;
+    _ibde.p2l = _p2l_sram;
+};
+#endif /* SRAM_DMA_NEEDS_KERNEL_APIS */
+
+/* return the (currently single) DMA buffer pool size for SRAM DMA mode, must only be called in this mode */
+void
+lkbde_get_sram_dma_info(unsigned d, uint32 *sram_start, uint32 *sram_size)
+{
+    if (d < _ndevices) {
+        *sram_start = _devices[d].dev_sram_dma_start;
+        *sram_size  = _devices[d].dev_sram_dma_size;
+    } else {
+        *sram_start = *sram_size = 0;
+    }
+}
+#endif /* INCLUDE_SRAM_DMA */
+
 /*
  * Export functions
  */
@@ -4861,3 +5089,7 @@ LKM_EXPORT_SYM(lkbde_cpu_pci_register);
 LKM_EXPORT_SYM(lkbde_is_dev_managed_by_instance);
 LKM_EXPORT_SYM(lkbde_get_inst_devs);
 LKM_EXPORT_SYM(lkbde_intr_cb_register);
+LKM_EXPORT_SYM(lkbde_get_dev_pci_info);
+#ifdef INCLUDE_SRAM_DMA
+LKM_EXPORT_SYM(lkbde_get_sram_dma_info);
+#endif /* INCLUDE_SRAM_DMA */
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c
index 5c2c90a42939..9d1772adbdb2 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c
@@ -1,6 +1,6 @@
 /*
  * $Id: linux_dma.c,v 1.414 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * Linux Kernel BDE DMA memory allocation
  *
@@ -67,6 +68,8 @@
  * The module parameter dmasize=0M enables this allocation mode, however if
  * DMA memory is requested from a user mode application, a private memory
  * pool will be created and used irrespectively.
+ * dmasize=sram may be used with some device, with no direct PCIe connection
+ * between the CPU and device, for using iproc SRAM for DMA.
  */
 
 #include <gmodule.h>
@@ -90,11 +93,9 @@
 
 #if _SIMPLE_MEMORY_ALLOCATION_
 #include <linux/dma-mapping.h>
-#if defined(CONFIG_CMA) && defined(CONFIG_CMA_SIZE_MBYTES)
-#define DMA_MAX_ALLOC_SIZE (CONFIG_CMA_SIZE_MBYTES * 1024 * 1024)
-#else
+#ifndef CONFIG_CMA
 #define DMA_MAX_ALLOC_SIZE (1 << (MAX_ORDER - 1 + PAGE_SHIFT)) /* Maximum size the kernel can allocate in one allocation */
-#endif
+#endif /* !CONFIG_CMA */
 #endif /* _SIMPLE_MEMORY_ALLOCATION_ */
 
 #if _SIMPLE_MEMORY_ALLOCATION_ == 1
@@ -287,6 +288,13 @@ static phys_addr_t _cpu_pbase = 0;
  */
 static phys_addr_t _dma_pbase = 0;
 
+#ifdef INCLUDE_SRAM_DMA
+/* If the value is none-zero, device types that support it will use SRAM for DMA.
+ * This is for systems where the CPU has no PCIe connection to the device,
+ * and where customers implement some proxy the connects to the device */
+int use_sram_for_dma = 0;
+#endif /* INCLUDE_SRAM_DMA */
+
 /* states of the DMA pool: */
 
 /* not initialized */
@@ -784,7 +792,7 @@ _mpool_free(void)
     }
 
     /* unmap bus address for all devices */
-    /* TODO SDK-235729 skip removed devices */
+
     if (_use_dma_mapping) {
         int i, ndevices;
         ndevices = BDE_NUM_DEVICES(BDE_SWITCH_DEVICES);
@@ -880,12 +888,14 @@ _mpool_alloc(size_t size)
         switch (dmaalloc) {
 #if _SIMPLE_MEMORY_ALLOCATION_
           case ALLOC_TYPE_API: {
+#ifndef CONFIG_CMA
             /* The allocation will be performed together with the mapping to the first device */
             if (size > DMA_MAX_ALLOC_SIZE) {
                 gprintk("Will allocate 0x%lx bytes instead of 0x%lx bytes.\n",
                         (unsigned long)DMA_MAX_ALLOC_SIZE, (unsigned long)size);
                 _dma_mem_size = DMA_MAX_ALLOC_SIZE;
             }
+#endif /* !CONFIG_CMA */
             if (nodevices == 1) {
                  /* With no devices, allocate immediately mapping to the null device */
                 _dma_pool_alloc_state = DMA_POOL_INITIALIZED;
@@ -1069,15 +1079,34 @@ void _dma_init(void)
 
     /* dmasize, himem and himemaddr kernel module argument parsing */
     if (dmasize) {
-        if ((dmasize[strlen(dmasize)-1] & ~0x20) == 'M') {
-            _dma_mem_size = simple_strtoul(dmasize, NULL, 0);
-            _dma_mem_size *= ONE_MB;
-        } else {
-            gprintk("DMA memory size must be specified as e.g. dmasize=8M\n");
-        }
-        if (_dma_mem_size & (_dma_mem_size-1)) {
-            gprintk("dmasize must be a power of 2 (1M, 2M, 4M, 8M etc.)\n");
-            _dma_mem_size = 0;
+#ifdef INCLUDE_SRAM_DMA
+        if (!strncasecmp(dmasize, "sram", 4) && (dmasize[4] == '\0' || dmasize[4] == ',')) {
+            use_sram_for_dma = 1; /* set SRAM DMA mode */
+            if (dma_debug >= 1) {
+                gprintk("SRAM DMA mode\n");
+            }
+#ifdef SRAM_DMA_NEEDS_KERNEL_APIS
+            _update_apis_for_sram_dma();
+#endif
+            if (dmasize[4] == '\0') {
+                dmasize +=4;
+            } else {
+                dmasize +=5;
+            }
+
+        } 
+#endif /* INCLUDE_SRAM_DMA */
+        if (*dmasize != '\0') {
+            if ((dmasize[strlen(dmasize)-1] & ~0x20) == 'M') {
+                _dma_mem_size = simple_strtoul(dmasize, NULL, 0);
+                _dma_mem_size *= ONE_MB;
+            } else {
+                gprintk("DMA memory size must be specified as e.g. dmasize=8M\n");
+            }
+            if (_dma_mem_size & (_dma_mem_size-1)) {
+                gprintk("dmasize must be a power of 2 (1M, 2M, 4M, 8M etc.)\n");
+                _dma_mem_size = 0;
+            }
         }
     }
 
@@ -1187,7 +1216,7 @@ _l2p(int d, void *vaddr)
         }
         return 0;
     }
-    /* TODO will not work with IOMMU */
+
     return ((sal_paddr_t)virt_to_bus(vaddr));
 }
 
@@ -1203,7 +1232,7 @@ _p2l(int d, sal_paddr_t paddr)
         }
         return (void *)(vaddr + (sal_vaddr_t)(paddr - _dma_pbase));
     }
-    /* TODO will not work with IOMMU */
+
     return bus_to_virt(paddr);
 }
 
@@ -1261,7 +1290,7 @@ _sinval(int d, void *ptr, int length)
 #if defined(dma_cache_wback_inv)
      dma_cache_wback_inv((unsigned long)ptr, length);
 #else
-    /* FIXME: need proper function to replace dma_cache_sync */
+
     dma_sync_single_for_cpu(NULL, (unsigned long)ptr, length, DMA_BIDIRECTIONAL);
 #endif
     return 0;
@@ -1273,7 +1302,7 @@ _sflush(int d, void *ptr, int length)
 #if defined(dma_cache_wback_inv)
     dma_cache_wback_inv((unsigned long)ptr, length);
 #else
-    /* FIXME: need proper function to replace dma_cache_sync */
+
     dma_sync_single_for_cpu(NULL, (unsigned long)ptr, length, DMA_BIDIRECTIONAL);
 #endif
 
@@ -1301,7 +1330,7 @@ _dma_pprint(struct seq_file *m)
     pprintf(m, "\thimem=%s\n", himem);
     pprintf(m, "\thimemaddr=%s\n", himemaddr);
     pprintf(m, "DMA Memory (%s): %d bytes, %d used, %d free%s\n",
-            (_use_himem) ? "high" : "kernel",
+            (_use_himem) ? "high" : dmaalloc ? "kernel-api" : "kernel-chunk",
             (_dma_vbase) ? _dma_mem_size : 0,
             (_dma_vbase) ? mpool_usage(_dma_pool) : 0,
             (_dma_vbase) ? _dma_mem_size - mpool_usage(_dma_pool) : 0,
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.c b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.c
index f8bd381eee20..5d0f6a1a7529 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.c
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.c
@@ -1,6 +1,6 @@
 /*
  * $Id: $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  */
 
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.h b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.h
index a37cc20a9672..68b9669c9661 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.h
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.h
@@ -1,6 +1,6 @@
 /*
  * $Id: $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  */
 
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/shared/mpool.c b/platform/broadcom/saibcm-modules/systems/bde/linux/shared/mpool.c
index 4f2dbe019e69..0cdad662f992 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/shared/mpool.c
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/shared/mpool.c
@@ -1,6 +1,6 @@
 /*
  * $Id: mpool.c,v 1.18 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  */
 
 #include <mpool.h>
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile
index c5b31c9e4a2d..444d72c4ebd1 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile
@@ -1,6 +1,6 @@
 # -*- Makefile -*-
-# $Id: Makefile,v 1.1 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Id: Makefile,v 1.13 Broadcom SDK $
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -25,6 +25,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 #
 LOCALDIR = systems/bde/linux/user/kernel
 
@@ -37,42 +38,93 @@ include $(SDK)/make/Make.config
 
 LIBS = $(LIBDIR)/libkern.a
 
-ifneq ($(kernel_version),2_4)
 KERNEL_MODULE_DIR = kernel_module
-
 THIS_MOD_NAME := linux-user-bde
 MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o
 KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko
+build: module $(KMODULE)
 
-build: kernel_libs $(MODULE) $(KMODULE)
-else
-MODULE = $(LIBDIR)/linux-user-bde.o
-
-build: kernel_libs $(MODULE)
-endif
+ifeq (1,$(NO_PRECOMPILED_MODULE))
+# {
+#
+# For 'NO_PRECOMPILED_MODULE', the first kernel compilation is done
+# in systems/bde/linux/user/kernel (and not in systems/bde/linux/user/kernel/kernel_module,
+# which is not even created).
+# KBUILD_EXTRA_SYMBOLS exports the symbols created on the first module compilation to
+# all other module compilations.
+#
+KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../../kernel/Module.symvers
+export KBUILD_EXTRA_SYMBOLS
+#
+# These are the objects which need to be compiled, in the kernel, to
+# created the module object file.
+#
+SRCS_COMPOSING = $(THIS_MOD_NAME).c ../../../../linux/kernel/modules/shared/gmodule.c
+OBJECTS_COMPOSING = "$(THIS_MOD_NAME)-file.o gmodule.o"
+#
+# Note that for NO_PRECOMPILED_MODULE, the subdirectory 'systems/bde/linux/user/kernel/kernel_module'
+# is not created and all action is done in systems/bde/linux/user/kernel
+#
+module: $(KMODULE)
 
+#
+# Note that for NO_PRECOMPILED_MODULE, the subdirectory 'systems/bde/linux/kernel/kernel_module'
+# is not created and all action is done in systems/bde/linux/kernel
+#
+$(KMODULE): $(SRCS_COMPOSING)
+	mkdir -p $(BLDDIR)
+	rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR)
+	rm -f $(BLDDIR)/*.c
+	rm -f $(BLDDIR)/*.o
+	rm -f $(BLDDIR)/*.ko
+	cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/Makefile
+	cp ./*.c $(BLDDIR)/
+	cp ./*.h $(BLDDIR)/
+	cp ../../../../linux/kernel/modules/shared/*.c $(BLDDIR)/
+	cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/Module.symvers
+	#
+	# We change here the name of the 'base' file since, it seems, the module-creation
+	# mechanism does not add symbols when the name of one of the files is the same as
+	# the name of the module itself.
+	#
+	mv $(BLDDIR)/$(THIS_MOD_NAME).c $(BLDDIR)/$(THIS_MOD_NAME)-file.c
+	MOD_OBJS=$(OBJECTS_COMPOSING) MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR) $(THIS_MOD_NAME).ko LOC_BLDDIR=$(BLDDIR) LOC_SRCDIR=$(PWD)
+# }
+else
+# {
 KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../../kernel/kernel_module/Module.symvers
 export KBUILD_EXTRA_SYMBOLS
 
-$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS)
+module: $(MODULE)
+
+#
+# This is for the compilation of the 'precompiled' object. We keep it
+# here for compatibility.
+#
+$(MODULE): $(BLDDIR)/.tree $(BOBJS) kernel_libs
 	$(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@
-ifneq ($(kernel_version),2_4)
+
 $(KMODULE): $(MODULE)
 	rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR)
 	mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR)
 	cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile
-	MOD_NAME=$(THIS_MOD_NAME) KBUILD_EXTRA_SYMBOLS="${KBUILD_EXTRA_SYMBOLS}" $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko
+	cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers
+	MOD_NAME=$(THIS_MOD_NAME) KBUILD_EXTRA_SYMBOLS="${KBUILD_EXTRA_SYMBOLS}"  $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko	
+
+include $(SDK)/make/Make.depend
+# }
 endif
 
 kernel_libs:
 	$(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared
 
-include $(SDK)/make/Make.depend
-
 # Make.depend is before clean:: so that Make.depend's clean:: runs first.
 
 clean::
 	$(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared $@
 	$(RM) $(BOBJS) $(MODULE)
+	$(RM) $(BLDDIR)/$(KERNEL_MODULE_DIR)
+
+distclean::
 
 .PHONY: build kernel_libs
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c
index f0eee1e118b0..4d0929c86afd 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c
@@ -1,5 +1,5 @@
 /*
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -24,6 +24,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  */
 
 /*
@@ -33,8 +34,6 @@
 #include <mpool.h>
 #include <linux-bde.h>
 
-#include <sal/core/thread.h>
-#include <sal/core/sync.h>
 #include <soc/devids.h>
 #include <linux/jiffies.h>
 #include "linux-user-bde.h"
@@ -84,12 +83,12 @@ MODULE_LICENSE("GPL");
 #define INTC_INTR_REG_NUM               (8)
 #define PAXB_INTRCLR_DELAY_REG_NUM      (16)
 
-/*
-TODO:HX5
-The INTR base address values are changed for HX5,
-hence making new #defines so runtime decisions can
-be made.
-*/
+
+
+
+
+
+
 #define PAXB_0_PAXB_IC_INTRCLR_0       (0x180123a0)
 #define PAXB_0_PAXB_IC_INTRCLR_1       (0x180123a4)
 #define PAXB_0_PAXB_IC_INTRCLR_MODE_0  (0x180123a8)
@@ -711,11 +710,22 @@ _cmicx_gen2_interrupt(bde_ctrl_t *ctrl)
                     break;
                 }
             }
+            if (!active_interrupts) {
+                /** only KNET interrupt asserted */
+                return;
+            }
         } else if (intrs) {
             active_interrupts = 1;
         }
-    } else {
+    }
+
+    /** check left interrupts */
+    if (!active_interrupts) {
         for (ind = 0; ind < CMICX_GEN2_INTC_INTR_REG_NUM; ind++) {
+            /** skip packetDMA */
+            if (fmask && (ind == CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0)) {
+                continue;
+            }
             IPROC_READ(d, ctrl->intr_regs.intc_intr_status_base + 4 * ind, stat);
             if (stat == 0) {
                 continue;
@@ -1314,7 +1324,7 @@ _devices_init(int d)
             } else {
                 ctrl->isr = (isr_f)_cmic_interrupt;
                 if ((ctrl->dev_type & BDE_256K_REG_SPACE) &&
-#ifdef BCM_PETRA_SUPPORT /* FIXME remove code when hardware design is fixed */
+#ifdef BCM_PETRA_SUPPORT 
                     ctrl->devid != 0x1234 &&
 #endif
                     readl(ctrl->ba + CMICE_DEV_REV_ID) == 0) {
@@ -1604,7 +1614,7 @@ _instance_validate(unsigned int inst_id, unsigned int dmasize, linux_bde_device_
     }
 
     if (res->is_active == 0) {
-        /* FIXME SDK-250746 check that the devices are not used by another active instance */
+
         return LUBDE_SUCCESS;
     }
 
@@ -1715,7 +1725,7 @@ _instance_attach(unsigned int inst_id, unsigned int dma_size, linux_bde_device_b
                 if (previous_inst_id == BDE_DEV_INST_ID_INVALID) {
                     lkbde_dev_instid_set(i, inst_id);
                 }
-            } /* TODO handle the case where the device is marked belonging to a different instance */
+            } 
         }
     }
     spin_unlock(&bde_resource_lock);
@@ -1828,7 +1838,7 @@ _ioctl(unsigned int cmd, unsigned long arg)
         break;
     case LUBDE_GET_DMA_INFO:
         inst_id = io.dev;
-        if (_bde_multi_inst){
+        if (_bde_multi_inst) {
             if (_dma_resource_get(inst_id, &cpu_pbase, &dma_pbase, &size)) {
                 io.rc = LUBDE_FAIL;
             }
@@ -1856,6 +1866,19 @@ _ioctl(unsigned int cmd, unsigned long arg)
         io.d3 = 0;
 #endif
         break;
+
+#ifdef INCLUDE_SRAM_DMA
+    case LUBDE_GET_DEV_DMA_INFO:
+        if (!VALID_DEVICE(io.dev)) {
+            return -EINVAL;
+        }
+        lkbde_get_sram_dma_info(io.dev, &io.dx.dw[1], &io.dx.dw[0]);
+        if (io.dx.dw[0] == 0) {
+            io.rc = LUBDE_FAIL;
+        }
+        break;
+#endif /* INCLUDE_SRAM_DMA */
+
     case LUBDE_ENABLE_INTERRUPTS:
         if (!VALID_DEVICE(io.dev)) {
             return -EINVAL;
@@ -1889,7 +1912,7 @@ _ioctl(unsigned int cmd, unsigned long arg)
             }
         } else {
             /* Process ethernet device interrupt */
-            /* FIXME: for multiple chips */
+
             if (!_devices[io.dev].enabled) {
                 user_bde->interrupt_connect(io.dev,
                                             (void(*)(void *))_ether_interrupt,
@@ -1973,6 +1996,7 @@ _ioctl(unsigned int cmd, unsigned long arg)
                                       atomic_read(&res->intr) != 0);
             }
 #endif
+
             /*
              * Even if we get multiple interrupts, we
              * only run the interrupt handler once.
@@ -2122,9 +2146,6 @@ _ioctl(unsigned int cmd, unsigned long arg)
             iounmap(mapaddr);
         } else {
             io.d1 = user_bde->iproc_read(io.dev, io.d0);
-            if (io.d1 == -1) {
-                io.rc = LUBDE_FAIL;
-            }
         }
         break;
     case LUBDE_IPROC_WRITE_REG:
@@ -2148,6 +2169,38 @@ _ioctl(unsigned int cmd, unsigned long arg)
     case LUBDE_REPROBE:
         io.rc = _device_reprobe();
         break;
+    case LUBDE_GET_DEVICE_PCI_INFO:
+        if (_devices[io.dev].dev_type & BDE_PCI_DEV_TYPE) {
+            if (lkbde_get_dev_pci_info(io.dev, &io.d0, &io.d1, &io.d2) < 0)
+                io.rc = LUBDE_FAIL;
+        } else {
+            io.rc = LUBDE_FAIL;
+        }
+        break;
+    case LUBDE_BAR2_READ32:
+        io.d1 = user_bde->read(io.dev, io.d0);
+        break;
+    case LUBDE_BAR2_WRITE32:
+        if (user_bde->write(io.dev, io.d0, io.d1) == -1) {
+            io.rc = LUBDE_FAIL;
+        }
+        break;
+    case LUBDE_BAR2_READ64:
+        {
+            uint64_t data;
+            data = user_bde->read64(io.dev, io.d0);
+            io.d1 = (uint32_t)data;
+            io.d2 = (uint32_t)(data >> 32);
+        }
+        break;
+    case LUBDE_BAR2_WRITE64:
+        {
+            uint64_t val;
+            val = ((uint64_t)io.d2 << 32) |  (uint64_t)io.d1;
+            user_bde->write64(io.dev, io.d0, val);
+        }
+        break;
+
     default:
         gprintk("Error: Invalid ioctl (%08x)\n", cmd);
         io.rc = LUBDE_FAIL;
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.h b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.h
index 1716c31b2b54..ebc2e6b5e6c2 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.h
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.h
@@ -1,6 +1,6 @@
 /*
  * $Id: linux-user-bde.h,v 1.23 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  */
 
 #ifndef __LINUX_USER_BDE_H__
@@ -77,6 +78,9 @@ typedef struct  {
 #define LUBDE_GET_DEVICE_TYPE           _IO(LUBDE_MAGIC, 12)
 #define LUBDE_SPI_READ_REG              _IO(LUBDE_MAGIC, 13)
 #define LUBDE_SPI_WRITE_REG             _IO(LUBDE_MAGIC, 14)
+#ifdef INCLUDE_SRAM_DMA
+#define LUBDE_GET_DEV_DMA_INFO          _IO(LUBDE_MAGIC, 18)
+#endif
 #define LUBDE_READ_REG_16BIT_BUS        _IO(LUBDE_MAGIC, 19)
 #define LUBDE_WRITE_REG_16BIT_BUS       _IO(LUBDE_MAGIC, 20)
 #define LUBDE_GET_BUS_FEATURES          _IO(LUBDE_MAGIC, 21)
@@ -96,11 +100,16 @@ typedef struct  {
 #define LUBDE_WAIT_FOR_EDK_INTERRUPT    _IO(LUBDE_MAGIC, 35)
 #define LUBDE_ATTACH_EDK_INSTANCE       _IO(LUBDE_MAGIC, 36)
 #define LUBDE_GET_EDK_DMA_INFO          _IO(LUBDE_MAGIC, 37)
+#define LUBDE_GET_DEVICE_PCI_INFO       _IO(LUBDE_MAGIC, 38)
+#define LUBDE_BAR2_READ32               _IO(LUBDE_MAGIC, 39)
+#define LUBDE_BAR2_WRITE32              _IO(LUBDE_MAGIC, 40)
+#define LUBDE_BAR2_READ64               _IO(LUBDE_MAGIC, 41)
+#define LUBDE_BAR2_WRITE64              _IO(LUBDE_MAGIC, 42)
 
 
 #define LUBDE_SEM_OP_CREATE       1
 #define LUBDE_SEM_OP_DESTROY      2
-#define LUBDE_SEM_OP_TAKE         3
+ #define LUBDE_SEM_OP_TAKE         3
 #define LUBDE_SEM_OP_GIVE         4
 
 #define LUBDE_SUCCESS 0
diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h
index 82f141a1eef0..33e6a46a1109 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h
+++ b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h
@@ -1,6 +1,6 @@
 /*
  * $Id: $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  */
 
diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_iproc.h b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_iproc.h
index b5277d09c606..47520de407b4 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_iproc.h
+++ b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_iproc.h
@@ -1,6 +1,6 @@
 /*
  * $Id: $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  */
 
diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_mdio.h b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_mdio.h
index 9e1f7303285c..170d6ef42986 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_mdio.h
+++ b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_mdio.h
@@ -1,6 +1,6 @@
 /*
  * $Id: $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  */
 
diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_pci.h b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_pci.h
index b1f2614ff889..738de9b503fa 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_pci.h
+++ b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_pci.h
@@ -1,6 +1,6 @@
 /*
  * $Id: $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  */
 
diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c
index 0596775a045c..29334c997a9b 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c
+++ b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c
@@ -1,6 +1,6 @@
 /*
  * $Id: $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  */
 
diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_mdio.c b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_mdio.c
index e5e8c6dc7ab5..1684a1965b53 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_mdio.c
+++ b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_mdio.c
@@ -1,6 +1,6 @@
 /*
  * $Id: $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  */
 
diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_pci.c b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_pci.c
index 869d4b169c22..6fa9f43bfee2 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_pci.c
+++ b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_pci.c
@@ -1,6 +1,6 @@
 /*
  * $Id: $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  */
 
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/Makefile
index 74591ad787f1..769935066a84 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/Makefile
@@ -1,6 +1,6 @@
 # -*- Makefile -*-
 # $Id: Makefile,v 1.10 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -25,6 +25,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 #
 # Makefile for SOC SAL support
 #
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/Makefile
index c12c4e0b6011..b491fd1db5db 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/Makefile
@@ -1,6 +1,6 @@
 # -*- Makefile -*-
 # $Id: Makefile,v 1.3 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -25,12 +25,14 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 #
 LOCALDIR = systems/linux/kernel/modules/bcm-genl
 
 include ${SDK}/make/Make.config
 
 LIBS = $(LIBDIR)/libkern.a
+
 ifndef DCBDIR
 DCBDIR = $(SDK)/systems/linux/kernel/modules/dcb
 # $(error 'The $$DCBDIR variable is not set')
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c
index 7e0d85e3ed5d..6cd8aa0ec4c3 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c
@@ -1,5 +1,5 @@
 /*
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -24,6 +24,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  */
 
 /*
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h
index edff871d1df4..80494346ca3c 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h
@@ -1,5 +1,5 @@
 /*
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -24,6 +24,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  */
 
 #ifndef __BCM_GENL_DEV_H__
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.c
index b8eb60148ecd..18a967ee148b 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.c
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.c
@@ -1,5 +1,5 @@
 /*
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -24,6 +24,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  */
 
 /*
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.h
index 2a7c31cee277..75bdeada6377 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.h
@@ -1,5 +1,5 @@
 /*
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -24,6 +24,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  */
 
 #ifndef __BCM_GENL_NETIF_H__
@@ -35,7 +36,7 @@
 typedef struct {
     struct net_device *dev;
     unsigned short id;
-    unsigned char  port;
+    unsigned short  port;
     unsigned short vlan;
     unsigned short qnum;
     unsigned int sample_rate;
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c
index 095c001c5e86..2e8744440f45 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c
@@ -1,5 +1,5 @@
 /*
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -24,6 +24,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  */
 
 /*
@@ -395,11 +396,6 @@ genl_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta,
     }
 
     /* setup skb by copying packet content */
-    /*
-     * Strip reserved vlan tag
-     * FIXME: enhance GENL interface to support FILTER_TAG_STRIP,
-     * FILTER_TAG_KEEP and FILTER_TAG_ORIGINAL
-     */
     if(strip_tag) {
         memcpy(skb->data, pkt, 12);
         memcpy(skb->data + 12, pkt + 16, size - 12);
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.h
index aa39454899f4..624782845087 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.h
@@ -1,5 +1,5 @@
 /*
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -24,6 +24,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  */
 
 #ifndef __BCM_GENL_PACKET_H__
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c
index 1ea33c7fc52f..25da4decc789 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c
@@ -1,5 +1,5 @@
 /*
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -24,6 +24,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  */
 
 /*
@@ -326,12 +327,12 @@ psample_task(struct work_struct *work)
                     pkt->meta.dst_ifindex, pkt->meta.sample_rate);
 #if ((IS_ENABLED(CONFIG_PSAMPLE) && LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) || \
      (defined PSAMPLE_MD_EXTENDED_ATTR && PSAMPLE_MD_EXTENDED_ATTR))
-            psample_sample_packet(pkt->group, 
+            psample_sample_packet(pkt->group,
                                   pkt->skb,
                                   pkt->meta.sample_rate,
                                   &md);
 #else
-            psample_sample_packet(pkt->group, 
+            psample_sample_packet(pkt->group,
                                   pkt->skb, 
                                   pkt->meta.trunc_size,
                                   pkt->meta.src_ifindex,
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.h
index d3b6521d14c6..93fae98c479d 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.h
@@ -1,5 +1,5 @@
 /*
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -24,6 +24,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  */
 
 #ifndef __BCM_GENL_PSAMPLE_H__
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl.c
index e78d4e21792a..0c889958a220 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl.c
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl.c
@@ -1,5 +1,5 @@
 /*
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -24,6 +24,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  */
 
 /*
@@ -210,6 +211,7 @@ _cleanup(void)
 #ifdef BUILD_GENL_PACKET
     bcmgenl_packet_cleanup();
 #endif
+
     bcmgenl_netif_cleanup();
     bcmgenl_dev_cleanup();
 
@@ -227,10 +229,9 @@ _init(void)
     bcmgenl_netif_init();
 
     bcmgenl_psample_init(BCMGENL_PROCFS_PATH);
-#ifdef BUILD_GENL_PACKET
+#ifdef BUILD_GENL_PACKET   
     bcmgenl_packet_init(BCMGENL_PROCFS_PATH);
 #endif
-
     return 0;
 }
 
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/Makefile
index 42e6c7405bf5..95abb3e994ba 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/Makefile
@@ -1,6 +1,6 @@
 # -*- Makefile -*-
 # $Id: Makefile,v 1.3 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -25,6 +25,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 #
 LOCALDIR = systems/linux/kernel/modules/bcm-knet
 
@@ -65,6 +66,7 @@ OBJECTS_COMPOSING = "bcm-knet.o gmodule.o"
 build: $(KMODULE)
 
 $(KMODULE): $(SRCS_COMPOSING)
+	mkdir -p $(BLDDIR)
 	rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR)
 	rm -f $(BLDDIR)/*.c
 	rm -f $(BLDDIR)/*.o
@@ -93,13 +95,12 @@ $(KMODULE): $(MODULE)
 	mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR)
 	cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile
 	cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers
-	MOD_NAME=$(THIS_MOD_NAME) KBUILD_EXTRA_SYMBOLS="${KBUILD_EXTRA_SYMBOLS}" $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko
-# }
-endif
+	MOD_NAME=$(THIS_MOD_NAME) KBUILD_EXTRA_SYMBOLS="${KBUILD_EXTRA_SYMBOLS}" $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko  
 
 # Make.depend is before clean:: so that Make.depend's clean:: runs first.
-
 include ${SDK}/make/Make.depend
+# }
+endif
 
 clean::
 	$(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c
old mode 100644
new mode 100755
index ca569d785776..98d5592d5f73
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c
@@ -1,5 +1,5 @@
 /*
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -24,6 +24,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  */
 
 /*
@@ -324,14 +325,51 @@ static int napi_weight = 0;
 #define NETDEV_UPDATE_TRANS_START_TIME(dev) netif_trans_update(dev)
 #endif
 
+/*
+ * The eth_hw_addr_set was added in Linux 5.15, but later backported
+ * to various longterm releases, so we need a more advanced check with
+ * the option to override the default.
+ */
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0))
+#define KERNEL_HAS_ETH_HW_ADDR_SET 1
+#endif
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,11,0) && \
+     LINUX_VERSION_CODE >= KERNEL_VERSION(5,10,188))
+#define KERNEL_HAS_ETH_HW_ADDR_SET 1
+#endif
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,5,0) && \
+     LINUX_VERSION_CODE >= KERNEL_VERSION(5,4,251))
+#define KERNEL_HAS_ETH_HW_ADDR_SET 1
+#endif
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,20,0) &&     \
+     LINUX_VERSION_CODE >= KERNEL_VERSION(4,19,291))
+#define KERNEL_HAS_ETH_HW_ADDR_SET 1
+#endif
+#ifndef KERNEL_HAS_ETH_HW_ADDR_SET
+#define KERNEL_HAS_ETH_HW_ADDR_SET 0
+#endif
+
+#if (KERNEL_HAS_ETH_HW_ADDR_SET == 0)
+static inline void eth_hw_addr_set(struct net_device *dev, const u8 *addr)
+{
+    memcpy(dev->dev_addr, addr, ETH_ALEN);
+}
+#endif
+
 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
 #define skb_copy_to_linear_data(_skb, _pkt, _len) \
     eth_copy_and_sum(_skb, _pkt, _len, 0)
 struct napi_struct { int not_used; };
-#define netif_napi_add(_dev, _napi, _poll, _weight) do { \
+#define bkn_netif_napi_add(_dev, _napi, _poll, _weight) do { \
         (_dev)->poll = _poll; \
         (_dev)->weight = _weight; \
 } while(0)
+#elif (LINUX_VERSION_CODE < KERNEL_VERSION(5,19,0))
+#define bkn_netif_napi_add(_dev, _napi, _poll, _weight) \
+            netif_napi_add(_dev, _napi, _poll, _weight)
+#else
+#define bkn_netif_napi_add(_dev, _napi, _poll, _weight) \
+            netif_napi_add_weight(_dev, _napi, _poll, _weight)
 #endif
 
 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18))
@@ -521,6 +559,12 @@ static inline void bkn_skb_tx_timestamp(struct sk_buff *skb)
 #define BKN_NETDEV_TX_BUSY      1
 #endif
 
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0))
+#define NDO_IOCTL       ndo_eth_ioctl
+#else
+#define NDO_IOCTL       ndo_do_ioctl
+#endif
+
 /*
  * Get a 16-bit value from packet offset
  * _data Pointer to packet
@@ -548,6 +592,7 @@ static inline void bkn_skb_tx_timestamp(struct sk_buff *skb)
 #define PKT_TX_HDR_SIZE         16
 
 static volatile int module_initialized;
+static volatile int module_reload;
 
 static ibde_t *kernel_bde = NULL;
 
@@ -580,6 +625,8 @@ typedef struct bkn_dcb_chain_s {
 #define NUM_CMICX_RX_CHAN 7
 #define NUM_CMICM_RX_CHAN 3
 
+#define DEFAULT_RX_RATE 100000
+
 #define FCS_SZ 4
 #define TAG_SZ 4
 
@@ -755,7 +802,6 @@ typedef struct bkn_switch_info_s {
 #define BKN_DNX_FTMH_ASE_TYPE_MSB                      47
 #define BKN_DNX_FTMH_ASE_TYPE_NOF_BITS                 1
 #define BKN_DNX_FTMH_ASE_TYPE_OAM                      0
-
 /* TSH */
 #define BKN_DNX_TSH_SIZE                               4
 /* PPH */
@@ -786,6 +832,8 @@ typedef struct bkn_switch_info_s {
 #define BKN_DNX_INTERNAL_12_FHEI_SIZE_NOF_BITS              2
 #define BKN_DNX_INTERNAL_12_LIF_EXT_TYPE_MSB                80
 #define BKN_DNX_INTERNAL_12_LIF_EXT_TYPE_NOF_BITS           3
+#define BKN_DNX_INTERNAL_12_PARSING_START_OFFSET_MSB                83
+#define BKN_DNX_INTERNAL_12_PARSING_START_OFFSET_NOF_BITS           7
 /* PPH.FHEI_TYPE */
 #define BKN_DNX_INTERNAL_FHEI_TYPE_SZ0                      1
 #define BKN_DNX_INTERNAL_FHEI_TYPE_SZ1                      2
@@ -812,9 +860,13 @@ typedef struct bkn_switch_info_s {
 #define BKN_DNX_UDH_DATA_TYPE_3_MSB                    6
 #define BKN_DNX_UDH_DATA_TYPE_3_NOF_BITS               2
 #define BKN_DNX_UDH_BASE_SIZE                          1
-
 /* TOD SECOND header */
 #define BKN_DNX_TOD_SECOND_SIZE                        4
+/* OIBIH */
+#define BKN_DNX_OIBIH_SIZE          14
+#define BKN_DNX_OIBIH_OAM_PDU_OFFSET_MSB               104
+#define BKN_DNX_OIBIH_OAM_PDU_OFFSET_NOF_BITS          8
+
 
 #define BKN_DPP_HDR_MAX_SIZE 40
 /* PTCH_2 */
@@ -912,6 +964,7 @@ typedef struct bkn_dune_system_header_info_s {
         uint32_t source_sys_port_aggregate;   /* Source System port*/
     } ftmh;
     struct {
+        uint32_t parsing_start_offset;
         uint32_t forward_domain;
         uint32_t trap_qualifier;
         uint32_t trap_id;
@@ -2075,7 +2128,17 @@ xgsr_irq_mask_enable(bkn_switch_info_t *sinfo, int chan, int update_hw)
         enabler |= CMICR_DC_DESC_CONTROLLED_INTR_ENABLE;
         dev_write32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, enabler);
     } else {
-        DBG_WARN(("Chained mode is not supported.\n"));
+        if (chan == XGS_DMA_TX_CHAN) {
+            dev_read32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, &enabler);
+            enabler |= CMICR_DC_CHAIN_DONE_INTR_ENABLE;
+            dev_write32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, enabler);
+        } else {
+            dev_read32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, &enabler);
+            enabler |= CMICR_DC_DESC_DONE_INTR_ENABLE;
+            enabler |= CMICR_DC_CHAIN_DONE_INTR_ENABLE;
+            dev_write32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, enabler);
+
+        }
     }
 
     sinfo->irq_mask |= (((0x1 << bits) - 1) << (chan * bits + base));
@@ -2096,7 +2159,16 @@ xgsr_irq_mask_disable(bkn_switch_info_t *sinfo, int chan, int update_hw)
         enabler &= ~CMICR_DC_DESC_CONTROLLED_INTR_ENABLE;
         dev_write32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, enabler);
     } else {
-        DBG_WARN(("Chained mode is not supported.\n"));
+        if (chan == XGS_DMA_TX_CHAN) {
+            dev_read32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, &enabler);
+            enabler &= ~CMICR_DC_CHAIN_DONE_INTR_ENABLE;
+            dev_write32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, enabler);
+        } else {
+            dev_read32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, &enabler);
+            enabler &= ~CMICR_DC_DESC_DONE_INTR_ENABLE;
+            enabler &= ~CMICR_DC_CHAIN_DONE_INTR_ENABLE;
+            dev_write32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, enabler);
+        }
     }
 
     sinfo->irq_mask &= ~(((0x1 << bits) - 1) << (chan * bits + base));
@@ -2713,11 +2785,11 @@ bkn_rx_refill(bkn_switch_info_t *sinfo, int chan)
         skb = desc->skb;
         desc->dma_size = rx_buffer_size + meta_size;
 #ifdef KNET_NO_AXI_DMA_INVAL
-        /*
-         * FIXME: Need to retain this code until iProc customers have been
-         * migrated to updated u-boot. Old u-boot versions are unable to load
-         * the kernel into non-ACP memory.
-         */
+
+
+
+
+
         /*
          * Cache invalidate may corrupt DMA memory on some iProc-based devices
          * if the kernel is mapped to ACP memory.
@@ -2928,7 +3000,10 @@ device_is_dpp(bkn_switch_info_t *sinfo)
 {
     int is_dpp = 0;
 
-    is_dpp = (sinfo->dcb_type == 28) ? 1 : 0;
+    if (sinfo)
+    {
+        is_dpp = (sinfo->dcb_type == 28) ? 1 : 0;
+    }
     return is_dpp;
 }
 
@@ -2937,7 +3012,10 @@ device_is_dnx(bkn_switch_info_t *sinfo)
 {
     int is_dnx = 0;
 
-    is_dnx = (sinfo->dcb_type == 39) ? 1 : 0;
+    if (sinfo)
+    {
+        is_dnx = (sinfo->dcb_type == 39) ? 1 : 0;
+    }
     return is_dnx;
 }
 
@@ -2948,9 +3026,11 @@ device_is_sand(bkn_switch_info_t *sinfo)
     int is_dpp = 0;
     int is_dnx = 0;
 
-    is_dpp = (sinfo->dcb_type == 28) ? 1 : 0;
-    is_dnx = (sinfo->dcb_type == 39) ? 1 : 0;
-
+    if (sinfo)
+    {
+        is_dpp = (sinfo->dcb_type == 28) ? 1 : 0;
+        is_dnx = (sinfo->dcb_type == 39) ? 1 : 0;
+    }
     return (is_dpp | is_dnx);
 }
 
@@ -3117,7 +3197,7 @@ bkn_add_rcpu_encap(bkn_switch_info_t *sinfo, struct sk_buff *skb, void *meta, in
          */
         psize = RCPU_HDR_SIZE + len;
         skb_push(skb, psize);
-        memset(skb->data, 0, psize);
+        memset(skb->data, 0, RCPU_HDR_SIZE);
     } else if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
         psize = RCPU_HDR_SIZE + sinfo->pkt_hdr_size;
         skb_push(skb, psize);
@@ -3157,7 +3237,6 @@ bkn_add_rcpu_encap(bkn_switch_info_t *sinfo, struct sk_buff *skb, void *meta, in
 
     if (device_is_sand(sinfo)) {
         /* Copy at most 256 bytes system headers */
-        len = len > RCPU_RX_META_SIZE_MAX ? RCPU_RX_META_SIZE_MAX : len;
         memcpy(&skb->data[RCPU_HDR_SIZE], (uint8_t *)meta, len);
     } else {
         smeta = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? (uint32_t *)meta : (uint32_t *)meta + 2;
@@ -3535,17 +3614,35 @@ bkn_dpp_packet_header_parse(
 
     /* FTMH */
     bkn_dpp_packet_parse_ftmh(sinfo, buff, buff_len, packet_info, &is_tsh_en, &is_inter_hdr_en);
-    /* Check if packet is punted from OAMP */
-    if (sinfo->oamp_punt && (packet_info->ftmh.source_sys_port_aggregate == sinfo->oamp_punt)) {
-        is_oamp_punted = TRUE;
+
+    /* Check if packet was punted to CPU by OAMP */
+    if (device_is_dpp(sinfo))
+    {
+        if (sinfo->oamp_punt && (packet_info->ftmh.source_sys_port_aggregate == sinfo->oamp_punt)) {
+            is_oamp_punted = TRUE;
+        }
+    }
+    else if (device_is_dnx(sinfo))
+    {
+        uint8_t  idx = 0;
+        for (idx = 0; idx < sinfo->oamp_port_number; idx++)
+        {
+            if (packet_info->ftmh.source_sys_port_aggregate == sinfo->oamp_ports[idx])
+            {
+                is_oamp_punted = TRUE;
+                break;
+            }
+        }
     }
+
+
     /* OTSH */
     if (is_tsh_en == TRUE)
     {
         bkn_dpp_packet_parse_otsh(sinfo, buff, buff_len, packet_info, &is_oam_dm_tod_en, &is_skip_udh);
     }
     /* Internal header is forced to be present if packet was punted to CPU by OAMP */
-    if (sinfo->oamp_punt && (packet_info->ftmh.source_sys_port_aggregate == sinfo->oamp_punt))
+    if (is_oamp_punted)
     {
         is_inter_hdr_en = TRUE;
     }
@@ -3795,6 +3892,14 @@ bkn_dnx_packet_parse_internal(
             &fld_val);
     lif_ext_type = fld_val;
 
+    /* Internal: Parsing-Start-Offset */
+    bkn_bitstream_get_field(
+            &buf[pkt_offset],
+            BKN_DNX_INTERNAL_12_PARSING_START_OFFSET_MSB,
+            BKN_DNX_INTERNAL_12_PARSING_START_OFFSET_NOF_BITS,
+            &fld_val);
+    packet_info->internal.parsing_start_offset = fld_val;
+
     pkt_offset += BKN_DNX_INTERNAL_BASE_TYPE_12;
     DBG_DUNE(("Internal(12-%u): FWD_DOMAIN %d, LEARN_EXT %d, FHEI_SIZE %d, LIF_EXT %d \n",
                 pkt_offset, packet_info->internal.forward_domain,
@@ -3900,10 +4005,32 @@ bkn_dnx_packet_parse_internal(
                 &fld_val);
         data_type_3 = fld_val;
         pkt_offset += BKN_DNX_UDH_BASE_SIZE;
-        pkt_offset += sinfo->udh_length_type[data_type_0];
-        pkt_offset += sinfo->udh_length_type[data_type_1];
-        pkt_offset += sinfo->udh_length_type[data_type_2];
-        pkt_offset += sinfo->udh_length_type[data_type_3];
+        if (sinfo->cmic_type == 'r')
+        {
+            if (data_type_0)
+            {
+                pkt_offset += sinfo->udh_length_type[0];
+            }
+            if (data_type_1)
+            {
+                pkt_offset += sinfo->udh_length_type[1];
+            }
+            if (data_type_2)
+            {
+                pkt_offset += sinfo->udh_length_type[2];
+            }
+            if (data_type_3)
+            {
+                pkt_offset += sinfo->udh_length_type[3];
+            }
+        }
+        else
+        {
+            pkt_offset += sinfo->udh_length_type[data_type_0];
+            pkt_offset += sinfo->udh_length_type[data_type_1];
+            pkt_offset += sinfo->udh_length_type[data_type_2];
+            pkt_offset += sinfo->udh_length_type[data_type_3];
+        }
         DBG_DUNE(("UDH base(1-%u) is present\n", pkt_offset));
     }
 
@@ -3947,6 +4074,7 @@ bkn_dnx_packet_header_parse(
         if (packet_info->ftmh.source_sys_port_aggregate == sinfo->oamp_ports[idx])
         {
             is_oamp_punted = TRUE;
+            break;
         }
     }
 
@@ -3955,6 +4083,7 @@ bkn_dnx_packet_header_parse(
     {
         bkn_dnx_packet_parse_internal(sinfo, buff, buff_len, packet_info, is_oamp_punted, &is_trapped);
     }
+
     /* OAM DMM/DMR TOD second header */
     if (is_oam_dm_tod_second_en == TRUE)
     {
@@ -3964,12 +4093,24 @@ bkn_dnx_packet_header_parse(
 
     if (is_oamp_punted)
     {
+        uint32_t oibih_oam_pdu_offset = 0;
         is_oam_dm_tod_second_en = FALSE;
         is_inter_hdr_en = FALSE;
         is_tsh_en = FALSE;
         is_oamp_punted = FALSE;
         is_trapped = FALSE;
 
+        if (sinfo->cmic_type == 'r')
+        {
+            /* OIBIH: OAM_PDU_Offset */
+            bkn_bitstream_get_field(
+                    &buff[packet_info->system_header_size],
+                    BKN_DNX_OIBIH_OAM_PDU_OFFSET_MSB,
+                    BKN_DNX_OIBIH_OAM_PDU_OFFSET_NOF_BITS,
+                    &oibih_oam_pdu_offset);
+            packet_info->system_header_size += BKN_DNX_OIBIH_SIZE;
+            DBG_DUNE(("OIBIH Header(14-%u) is present\n", packet_info->system_header_size));
+        }
         /* FTMH */
         bkn_dnx_packet_parse_ftmh(sinfo, buff, buff_len, packet_info,
                                   &is_tsh_en, &is_inter_hdr_en, &is_oam_dm_tod_second_en);
@@ -3988,6 +4129,26 @@ bkn_dnx_packet_header_parse(
         {
             /* DO NOT have 4Bytes TOD second header. */
         }
+        if (oibih_oam_pdu_offset)
+        {
+            /*
+             * parsing_start_offset indicates the bytes before OAM PDU including PTCH, etc. For example, it's the length of PTCH + ETH1
+             * oibih_oam_pdu_offset indicates the bytes from the end of system headers to OAM PDU. For example, it's the length of ETH1
+             */
+            if (packet_info->internal.parsing_start_offset > oibih_oam_pdu_offset)
+            {
+                packet_info->system_header_size += (packet_info->internal.parsing_start_offset - oibih_oam_pdu_offset);
+                DBG_DUNE(("Offset after system headers %u\n", (packet_info->internal.parsing_start_offset - oibih_oam_pdu_offset)));
+            }
+        }
+    }
+    else
+    {
+        if (packet_info->internal.parsing_start_offset && (sinfo->cmic_type == 'r'))
+        {
+            packet_info->system_header_size += packet_info->internal.parsing_start_offset;
+            DBG_DUNE(("Offset after system headers %u\n", packet_info->internal.parsing_start_offset));
+        }
     }
 
     DBG_DUNE(("Total length of headers is %u\n", packet_info->system_header_size));
@@ -4222,19 +4383,27 @@ bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget)
 
                     /* Save for RCPU before stripping tag */
                     ethertype = PKT_U16_GET(pkt, 16);
+
+                    skb_copy_to_linear_data(skb, pkt, pktlen);
+                    if (device_is_sand(sinfo)) {
+                        /* CRC has been stripped */
+                        skb_put(skb, pktlen);
+                    } else {
+                        skb_put(skb, pktlen - 4); /* Strip CRC */
+                    }
+
                     if ((priv->flags & KCOM_NETIF_F_KEEP_RX_TAG) == 0) {
                         uint16_t vlan_proto = PKT_U16_GET(pkt, 12);
 
                         if (filter->kf.flags & KCOM_FILTER_F_STRIP_TAG) {
-                            /* Strip the VLAN tag */
+                            /* Strip VLAN tag */
                             if (vlan_proto == ETH_P_8021Q ||
                                 vlan_proto == ETH_P_8021AD) {
                                 DBG_FLTR(("Strip VLAN tag\n"));
-                                for (idx = 11; idx >= 0; idx--) {
-                                    pkt[idx+4] = pkt[idx];
-                                }
-                                pktlen -= 4;
-                                pkt += 4;
+                                ((u32*)skb->data)[3] = ((u32*)skb->data)[2];
+                                ((u32*)skb->data)[2] = ((u32*)skb->data)[1];
+                                ((u32*)skb->data)[1] = ((u32*)skb->data)[0];
+                                skb_pull(skb, 4);
                             }
                         } else {
                             /*
@@ -4257,13 +4426,6 @@ bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget)
                         }
                     }
 
-                    skb_copy_to_linear_data(skb, pkt, pktlen);
-                    if (device_is_sand(sinfo)) {
-                        /* CRC has been stripped */
-                        skb_put(skb, pktlen);
-                    } else {
-                        skb_put(skb, pktlen - 4); /* Strip CRC */
-                    }
                     priv->stats.rx_packets++;
                     priv->stats.rx_bytes += skb->len;
 
@@ -4451,7 +4613,6 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget)
     int dcbs_done = 0;
     bkn_dune_system_header_info_t packet_info = {0};
     uint32_t sand_scratch_data[BKN_SAND_SCRATCH_DATA_SIZE] = {0};
-    uint8_t sand_system_headers[RCPU_RX_META_SIZE_MAX] = {0};
     uint8_t *pkt = NULL;
     bkn_priv_t *mpriv;
     struct sk_buff *mskb = NULL;
@@ -4500,7 +4661,9 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget)
 
         if (device_is_sand(sinfo)) {
             err_woff = BKN_SAND_SCRATCH_DATA_SIZE - 1;
+            /* Last DCB word with error bit */
             sand_scratch_data[err_woff] = dcb[sinfo->dcb_wsize-1];
+            /* Data starts with DNX system headers and the length is specified by pkt_hdr_size */
             meta = (uint32_t *)skb->data;
             pkt = skb->data;
             memset(&packet_info, 0, sizeof(bkn_dune_system_header_info_t));
@@ -4568,10 +4731,6 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget)
                                         packet_info.internal.forward_domain);
                 bkn_bitstream_set_field(sand_scratch_data, 64, 2,
                                         packet_info.ftmh.action_type);
-                memcpy(sand_system_headers, pkt,
-                       ((pkt_hdr_size > RCPU_RX_META_SIZE_MAX) ?
-                        RCPU_RX_META_SIZE_MAX : pkt_hdr_size));
-                meta = (uint32_t *)sand_system_headers;
                 if (force_tagged) {
                     uint8_t *eth_hdr = pkt + pkt_hdr_size;
                     uint16_t tpid = 0;
@@ -4701,9 +4860,12 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget)
                                 ((u32*)skb->data)[1] = ((u32*)skb->data)[0];
                                 skb_pull(skb, 4);
                                 if (device_is_sand(sinfo)) {
-                                    for (idx = pkt_hdr_size; idx >= 4; idx--) {
-                                        pkt[idx] = pkt[idx - 4];
+                                    /* Headers shifted left 4 bytes*/
+                                    for (idx = pkt_hdr_size; idx >= 0; idx--) {
+                                        pkt[idx + 4] = pkt[idx];
                                     }
+                                    pkt += 4;
+                                    meta++;
                                 } else if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                                     for (idx = pkt_hdr_size / sizeof(uint32_t);
                                          idx; idx--) {
@@ -5764,7 +5926,8 @@ xgsr_do_dma(bkn_switch_info_t *sinfo, int budget)
         if (UNET_CH(sinfo, XGS_DMA_RX_CHAN + chan)) {
             continue;
         }
-        if (rx_dma_stat[chan] & CMICR_DS_DESC_CONTROLLED_INTR) {
+        if ((rx_dma_stat[chan] & CMICR_DS_DESC_CONTROLLED_INTR) ||
+            (rx_dma_stat[chan] & CMICR_DS_DESC_DONE_INTR)) {
             xgsr_dma_desc_clear(sinfo, XGS_DMA_RX_CHAN + chan);
             sinfo->poll_channels |= 1 << chan;
         }
@@ -5804,12 +5967,13 @@ xgsr_do_dma(bkn_switch_info_t *sinfo, int budget)
             if (UNET_CH(sinfo, XGS_DMA_RX_CHAN + chan)) {
                 continue;
             }
-            xgsx_dma_chain_clear(sinfo, XGS_DMA_RX_CHAN + chan);
+            xgsr_dma_chain_clear(sinfo, XGS_DMA_RX_CHAN + chan);
             bkn_rx_chain_done(sinfo, chan);
         }
     }
 
-    if (tx_dma_stat & CMICR_DS_DESC_CONTROLLED_INTR) {
+    if ((tx_dma_stat & CMICR_DS_DESC_CONTROLLED_INTR) ||
+        (tx_dma_stat & CMICR_DS_DESC_DONE_INTR)) {
         if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) {
             xgsr_dma_desc_clear(sinfo, XGS_DMA_TX_CHAN);
         } else {
@@ -6796,12 +6960,14 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev)
             case 28:
                 /*
                  * If KCOM_NETIF_T_PORT, add PTCH+ITMH header
-                 * If KCOM_NETIF_T_VLAN, add PTCH+header
+                 * If KCOM_NETIF_T_VLAN, add PTCH header
                  */
                 pktdata = skb->data;
-                memcpy(&pktdata[0], priv->system_headers, priv->system_headers_size);
+                if (priv->system_headers_size + BKN_DNX_MODULE_HEADER_SIZE <= KCOM_NETIF_SYSTEM_HEADERS_SIZE_MAX) {
+                    memcpy(&pktdata[0], priv->system_headers + BKN_DNX_MODULE_HEADER_SIZE, priv->system_headers_size);
+                }
                 /* Set CPU channel */
-                dcb[2] = ((priv->qnum & 0xff) << 24);
+                dcb[2] = ((priv->system_headers[0] & 0xff) << 24);
                 break;
             case 29:
                 dcb[2] = 0x81000000;
@@ -6858,7 +7024,9 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev)
                      * if KCOM_NETIF_T_VLAN, add MH+PTCH+header
                      */
                     pktdata = skb->data;
-                    memcpy(&pktdata[0], priv->system_headers, priv->system_headers_size);
+                    if (priv->system_headers_size <= KCOM_NETIF_SYSTEM_HEADERS_SIZE_MAX) {
+                        memcpy(&pktdata[0], priv->system_headers, priv->system_headers_size);
+                    }
                 }
                 break;
             case 41:
@@ -7187,9 +7355,22 @@ bkn_rx_rate_config(bkn_switch_info_t *sinfo)
     /* Calculate the minimum update frequency across all channels */
     rxticks_per_sec = 1;
     for (chan = 0; chan < NUM_RX_CHAN; chan++) {
+        if (sinfo->rx[chan].rate_max == 0) {
+            /*
+             * Giving default value if rx_rate parameter is 0 to avoid dividing
+             * 0 in the following calculation.
+             */
+            sinfo->rx[chan].rate_max = DEFAULT_RX_RATE;
+        }
         if (sinfo->rx[chan].burst_max == 0) {
             sinfo->rx[chan].burst_max = sinfo->rx[chan].rate_max / 10;
         }
+        if (sinfo->rx[chan].burst_max == 0) {
+            DBG_WARN(("Improper rx_rate %d and rx_burst %d parameter are "
+                      "specified for chan %d\n", sinfo->rx[chan].rate_max,
+                      sinfo->rx[chan].rate_max,chan));
+            sinfo->rx[chan].burst_max = 1;
+        }
         rps = sinfo->rx[chan].rate_max / sinfo->rx[chan].burst_max;
         if (rxticks_per_sec < rps) {
             rxticks_per_sec = rps;
@@ -7314,7 +7495,7 @@ static const struct net_device_ops bkn_netdev_ops = {
     .ndo_validate_addr   = eth_validate_addr,
     .ndo_set_rx_mode     = bkn_set_multicast_list,
     .ndo_set_mac_address = bkn_set_mac_address,
-    .ndo_do_ioctl        = bkn_ioctl,
+    .NDO_IOCTL           = bkn_ioctl,
     .ndo_tx_timeout      = NULL,
     .ndo_change_mtu      = bkn_change_mtu,
 #ifdef CONFIG_NET_POLL_CONTROLLER
@@ -7504,6 +7685,7 @@ bkn_init_ndev(u8 *mac, char *name)
     if (name && *name) {
         strncpy(dev->name, name, IFNAMSIZ-1);
     }
+    DBG_VERB(("Created Ethernet device %s.\n", dev->name));
 
     bkn_dev_net_set(dev, current->nsproxy->net_ns);
 
@@ -7513,7 +7695,7 @@ bkn_init_ndev(u8 *mac, char *name)
         free_netdev(dev);
         return NULL;
     }
-    DBG_VERB(("Created Ethernet device %s.\n", dev->name));
+
 
     return dev;
 }
@@ -8893,7 +9075,16 @@ bkn_knet_version(kcom_msg_version_t *kmsg, int len)
     kmsg->version = KCOM_VERSION;
     kmsg->netif_max = KCOM_NETIF_MAX;
     kmsg->filter_max = KCOM_FILTER_MAX;
+    kmsg->module_reload = module_reload;
 
+    /*
+     * The module_reoad idicator set while module inserted.
+     * Unset the indicatore when SDK has checked KNET version to idicate
+     * the KNET module has been initialized by SDK.
+     */
+    if (module_reload) {
+        module_reload = 0;
+    }
     return sizeof(kcom_msg_version_t);
 }
 
@@ -9033,28 +9224,6 @@ bkn_knet_hw_init(kcom_msg_hw_init_t *kmsg, int len)
         }
     }
 
-    if (device_is_sand(sinfo)) {
-        int idx = 0;
-        /* Information to parser Dune system headers */
-        sinfo->ftmh_lb_key_ext_size = kmsg->ftmh_lb_key_ext_size;
-        sinfo->ftmh_stacking_ext_size = kmsg->ftmh_stacking_ext_size;
-        sinfo->pph_base_size = kmsg->pph_base_size;
-        for (idx = 0; idx < 8; idx++)
-        {
-            sinfo->pph_lif_ext_size[idx] = kmsg->pph_lif_ext_size[idx];
-        }
-        for (idx = 0; idx < 4; idx++)
-        {
-            sinfo->udh_length_type[idx] = kmsg->udh_length_type[idx];
-        }
-        sinfo->udh_size = kmsg->udh_size;
-        sinfo->oamp_punt = kmsg->oamp_punted;
-        sinfo->no_skip_udh_check = kmsg->no_skip_udh_check;
-        sinfo->oam_dm_tod_exist = kmsg->oam_dm_tod_exist;
-        sinfo->system_headers_mode = kmsg->system_headers_mode;
-        sinfo->udh_enable = kmsg->udh_enable;
-    }
-
     /* Ensure that we restart properly */
     bkn_dma_abort(sinfo);
     bkn_clean_dcbs(sinfo);
@@ -9087,7 +9256,6 @@ bkn_knet_hw_info(kcom_msg_hw_info_t *kmsg, int len)
 {
     bkn_switch_info_t *sinfo;
     unsigned long flags;
-    int idx = 0;
 
     kmsg->hdr.type = KCOM_MSG_TYPE_RSP;
 
@@ -9107,6 +9275,27 @@ bkn_knet_hw_info(kcom_msg_hw_info_t *kmsg, int len)
     cfg_api_lock(sinfo, &flags);
 
     if (device_is_sand(sinfo)) {
+        int idx = 0;
+
+        /* Information to parser Dune system headers */
+        sinfo->ftmh_lb_key_ext_size = kmsg->ftmh_lb_key_ext_size;
+        sinfo->ftmh_stacking_ext_size = kmsg->ftmh_stacking_ext_size;
+        sinfo->pph_base_size = kmsg->pph_base_size;
+        for (idx = 0; idx < 8; idx++)
+        {
+            sinfo->pph_lif_ext_size[idx] = kmsg->pph_lif_ext_size[idx];
+        }
+        for (idx = 0; idx < 4; idx++)
+        {
+            sinfo->udh_length_type[idx] = kmsg->udh_length_type[idx];
+        }
+        sinfo->udh_size = kmsg->udh_size;
+        sinfo->oamp_punt = kmsg->oamp_punted;
+        sinfo->no_skip_udh_check = kmsg->no_skip_udh_check;
+        sinfo->oam_dm_tod_exist = kmsg->oam_dm_tod_exist;
+        sinfo->system_headers_mode = kmsg->system_headers_mode;
+        sinfo->udh_enable = kmsg->udh_enable;
+
         if (kmsg->oamp_info.oamp_port_number > KCOM_HW_INFO_OAMP_PORT_MAX)
         {
             cfg_api_unlock(sinfo, &flags);
@@ -9254,7 +9443,7 @@ bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len)
     if (device_is_sand(sinfo)) {
         int idx = 0;
         priv->system_headers_size = kmsg->netif.system_headers_size;
-        for (idx = 0; idx < priv->system_headers_size; idx++)
+        for (idx = 0; idx < KCOM_NETIF_SYSTEM_HEADERS_SIZE_MAX; idx++)
         {
             priv->system_headers[idx] = kmsg->netif.system_headers[idx];
         }
@@ -9370,6 +9559,7 @@ bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len)
         /* No holes - add to end of list */
         list_add_tail(&priv->list, &sinfo->ndev_list);
     }
+
     DBG_VERB(("Assigned ID %d to Ethernet device %s\n",
               priv->id, dev->name));
 
@@ -9384,7 +9574,6 @@ bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len)
                       dev->name));
         }
     }
-
     spin_unlock_irqrestore(&sinfo->lock, flags);
 
     if (device_is_sand(sinfo)) {
@@ -9459,6 +9648,7 @@ bkn_knet_netif_destroy(kcom_msg_netif_destroy_t *kmsg, int len)
 
     DBG_VERB(("Removing virtual Ethernet device %s (%d).\n",
               dev->name, priv->id));
+
     unregister_netdev(dev);
     free_netdev(dev);
 
@@ -10280,7 +10470,7 @@ bkn_knet_dev_init(int d)
     }
 
     if (use_napi) {
-        netif_napi_add(dev, &sinfo->napi, bkn_poll);
+        bkn_netif_napi_add(dev, &sinfo->napi, bkn_poll, napi_weight);
     }
     return 0;
 }
@@ -10351,6 +10541,8 @@ _init(void)
 
     module_initialized = 1;
 
+    module_reload = 1;
+
     return 0;
 }
 
@@ -10418,14 +10610,14 @@ _ioctl(unsigned int cmd, unsigned long arg)
 }
 
 static gmodule_t _gmodule = {
-    name: MODULE_NAME,
-    major: MODULE_MAJOR,
-    init: _init,
-    cleanup: _cleanup,
-    pprint: _pprint,
-    ioctl: _ioctl,
-    open: NULL,
-    close: NULL,
+    .name = MODULE_NAME,
+    .major = MODULE_MAJOR,
+    .init = _init,
+    .cleanup = _cleanup,
+    .pprint = _pprint,
+    .ioctl = _ioctl,
+    .open = NULL,
+    .close = NULL,
 };
 
 gmodule_t *
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/bcm-ptp-clock.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/bcm-ptp-clock.c
new file mode 100644
index 000000000000..2b31663df76d
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/bcm-ptp-clock.c
@@ -0,0 +1,3923 @@
+/*
+ * Copyright 2017 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ */
+
+/*
+ * This module implements a Linux PTP Clock driver for Broadcom
+ * XGS switch devices.
+ *
+ * For a list of supported module parameters, please see below.
+ *   debug: Debug level (default 0)
+ *   network_transport : Transport Type (default 0 - Raw)
+ *   base_dev_name: Base device name (default ptp0, ptp1, etc.)
+ *
+ * - All the data structures and functions work on the physical port.
+ *   For array indexing purposes, we use (phy_port - 1).
+ */
+
+#include <gmodule.h> /* Must be included first */
+/* Module Information */
+#define MODULE_MAJOR 125
+#define MODULE_NAME "linux-bcm-ptp-clock"
+
+MODULE_AUTHOR("Broadcom Corporation");
+MODULE_DESCRIPTION("PTP Clock Driver for Broadcom XGS/DNX Switch");
+MODULE_LICENSE("GPL");
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3,17,0)
+#include <linux-bde.h>
+#include <kcom.h>
+#include <bcm-knet.h>
+#include <linux/time64.h>
+#include <linux/delay.h>
+#include <linux/etherdevice.h>
+#include <linux/netdevice.h>
+#include <linux/sysfs.h>
+
+
+#include <linux/random.h>
+#include <linux/seq_file.h>
+#include <linux/if_vlan.h>
+#include <linux/ptp_clock_kernel.h>
+
+/* Configuration Parameters */
+static int debug;
+LKM_MOD_PARAM(debug, "i", int, 0);
+MODULE_PARM_DESC(debug,
+        "Debug level (default 0)");
+
+static int pci_cos;
+
+static int network_transport;
+LKM_MOD_PARAM(network_transport, "i", int, 0);
+MODULE_PARM_DESC(network_transport,
+        "Transport Type (default - Detect from packet)");
+
+static char *base_dev_name = "ptp0";
+LKM_MOD_PARAM(base_dev_name, "s", charp, 0);
+MODULE_PARM_DESC(base_dev_name,
+        "Base device name (default ptp0, ptp1, etc.)");
+
+static int fw_core;
+LKM_MOD_PARAM(fw_core, "i", int, 0);
+MODULE_PARM_DESC(fw_core,
+        "Firmware core (default 0)");
+
+static int vnptp_l2hdr_vlan_prio;
+LKM_MOD_PARAM(vnptp_l2hdr_vlan_prio, "i", int, 0);
+MODULE_PARM_DESC(vnptp_l2hdr_vlan_prio,
+        "L2 Hdr Vlan priority");
+
+static int phc_update_intv_msec = 1000;
+LKM_MOD_PARAM(phc_update_intv_msec, "i", int, 0);
+MODULE_PARM_DESC(phc_update_intv_msec,
+        "PHC update interval in msec (default 1000)");
+
+/* Debug levels */
+#define DBG_LVL_VERB    0x1
+#define DBG_LVL_WARN    0x2
+#define DBG_LVL_TXTS    0x4
+#define DBG_LVL_CMDS    0x8
+#define DBG_LVL_TX      0x10
+#define DBG_LVL_RX      0x20
+#define DBG_LVL_TX_DUMP 0x40
+#define DBG_LVL_RX_DUMP 0x80
+
+#define DBG_VERB(_s)    do { if (debug & DBG_LVL_VERB) gprintk _s; } while (0)
+#define DBG_WARN(_s)    do { if (debug & DBG_LVL_WARN) gprintk _s; } while (0)
+#define DBG_TXTS(_s)    do { if (debug & DBG_LVL_TXTS) gprintk _s; } while (0)
+#define DBG_CMDS(_s)    do { if (debug & DBG_LVL_CMDS) gprintk _s; } while (0)
+#define DBG_TX(_s)      do { if (debug & DBG_LVL_TX) gprintk _s; } while (0)
+#define DBG_RX(_s)      do { if (debug & DBG_LVL_RX) gprintk _s; } while (0)
+#define DBG_TX_DUMP(_s) do { if (debug & DBG_LVL_TX_DUMP) gprintk _s; } while (0)
+#define DBG_RX_DUMP(_s) do { if (debug & DBG_LVL_RX_DUMP) gprintk _s; } while (0)
+#define DBG_ERR(_s)     do { if (1) gprintk _s; } while (0)
+
+
+#ifdef LINUX_BDE_DMA_DEVICE_SUPPORT
+#define DMA_DEV         device
+#define DMA_ALLOC_COHERENT(d,s,h)       dma_alloc_coherent(d,s,h,GFP_ATOMIC|GFP_DMA32)
+#define DMA_FREE_COHERENT(d,s,a,h)      dma_free_coherent(d,s,a,h)
+#else
+#define DMA_DEV         pci_dev
+#define DMA_ALLOC_COHERENT(d,s,h)       pci_alloc_consistent(d,s,h)
+#define DMA_FREE_COHERENT(d,s,a,h)      pci_free_consistent(d,s,a,h)
+#endif
+
+/* Type length in bytes */
+#define BKSYNC_PACKLEN_U8     1
+#define BKSYNC_PACKLEN_U16    2
+#define BKSYNC_PACKLEN_U24    3
+#define BKSYNC_PACKLEN_U32    4
+
+#define BKSYNC_UNPACK_U8(_buf, _var)        \
+    _var = *_buf++
+
+#define BKSYNC_UNPACK_U16(_buf, _var)       \
+    do {                                    \
+        (_var) = (((_buf)[0] << 8) |        \
+                  (_buf)[1]);               \
+        (_buf) += BKSYNC_PACKLEN_U16;       \
+    } while (0)
+
+#define BKSYNC_UNPACK_U24(_buf, _var)       \
+    do {                                    \
+        (_var) = (((_buf)[0] << 16) |       \
+                  ((_buf)[1] << 8)  |       \
+                  (_buf)[2]);               \
+        (_buf) += BKSYNC_PACKLEN_U24;       \
+    } while (0)
+
+#define BKSYNC_UNPACK_U32(_buf, _var)       \
+    do {                                    \
+        (_var) = (((_buf)[0] << 24) |       \
+                  ((_buf)[1] << 16) |       \
+                  ((_buf)[2] << 8)  |       \
+                  (_buf)[3]);               \
+        (_buf) += BKSYNC_PACKLEN_U32;       \
+    } while (0)
+
+
+#define CMICX_DEV_TYPE   ((ptp_priv->dcb_type == 38) || \
+                          (ptp_priv->dcb_type == 36) || \
+                          (ptp_priv->dcb_type == 39))
+
+/* Arad Series of DNX Devices */
+#define DEVICE_IS_DPP       (ptp_priv->dcb_type == 28)
+
+/* JR2 Series of DNX Devices */
+#define DEVICE_IS_DNX       (ptp_priv->dcb_type == 39)
+
+/* CMIC MCS-0 SCHAN Messaging registers */
+/* Core0:CMC1 Core1:CMC2 */
+#define CMIC_CMC_BASE \
+            (CMICX_DEV_TYPE ? (fw_core ? 0x10400 : 0x10300) : \
+                              (fw_core ? 0x33000 : 0x32000))
+
+#define CMIC_CMC_SCHAN_MESSAGE_10r(BASE) (BASE + 0x00000034)
+#define CMIC_CMC_SCHAN_MESSAGE_11r(BASE) (BASE + 0x00000038)
+#define CMIC_CMC_SCHAN_MESSAGE_12r(BASE) (BASE + 0x0000003c)
+#define CMIC_CMC_SCHAN_MESSAGE_13r(BASE) (BASE + 0x00000040)
+#define CMIC_CMC_SCHAN_MESSAGE_14r(BASE) (BASE + 0x00000044)
+#define CMIC_CMC_SCHAN_MESSAGE_15r(BASE) (BASE + 0x00000048)
+#define CMIC_CMC_SCHAN_MESSAGE_16r(BASE) (BASE + 0x0000004c)
+#define CMIC_CMC_SCHAN_MESSAGE_17r(BASE) (BASE + 0x00000050)
+#define CMIC_CMC_SCHAN_MESSAGE_18r(BASE) (BASE + 0x00000054)
+#define CMIC_CMC_SCHAN_MESSAGE_19r(BASE) (BASE + 0x00000058)
+#define CMIC_CMC_SCHAN_MESSAGE_20r(BASE) (BASE + 0x0000005c)
+#define CMIC_CMC_SCHAN_MESSAGE_21r(BASE) (BASE + 0x00000060)
+
+u32 hostcmd_regs[5] = { 0 };
+
+#define BCMKSYNC_NUM_PORTS           128    /* NUM_PORTS where 2-step is supported. */
+#define BCMKSYNC_MAX_NUM_PORTS       256    /* Max ever NUM_PORTS in the system */
+#define BCMKSYNC_MAX_MTP_IDX        8    /* Max number of mtps in the system */
+
+#define BKN_DNX_PTCH_2_SIZE         2       /* PTCH_2 */
+#define BKN_DNX_ITMH_SIZE           5       /* ITMH */
+
+/* Service request commands to Firmware. */
+enum {
+    BKSYNC_DONE                     = (0x0),
+    BKSYNC_INIT                     = (0x1),
+    BKSYNC_DEINIT                   = (0x2),
+    BKSYNC_GETTIME                  = (0x3),
+    BKSYNC_SETTIME                  = (0x4),
+    BKSYNC_FREQCOR                  = (0x5),
+    BKSYNC_PBM_UPDATE               = (0x6),
+    BKSYNC_ADJTIME                  = (0x7),
+    BKSYNC_GET_TSTIME               = (0x8),
+    BKSYNC_MTP_TS_UPDATE_ENABLE     = (0x9),
+    BKSYNC_MTP_TS_UPDATE_DISABLE    = (0xa),
+    BKSYNC_ACK_TSTIME               = (0xb),
+    BKSYNC_SYSINFO                  = (0xc),
+    BKSYNC_BROADSYNC                = (0xd),
+    BKSYNC_GPIO                     = (0xe),
+    BKSYNC_EVLOG                    = (0xf),
+    BKSYNC_EXTTSLOG                 = (0x10),
+    BKSYNC_GPIO_PHASEOFFSET         = (0x11),
+};
+
+
+enum {
+    KSYNC_SYSINFO_UC_PORT_NUM       = (0x1),
+    KSYNC_SYSINFO_UC_PORT_SYSPORT   = (0x2),
+    KSYNC_SYSINFO_HOST_CPU_PORT     = (0x3),
+    KSYNC_SYSINFO_HOST_CPU_SYSPORT  = (0x4),
+    KSYNC_SYSINFO_UDH_LEN           = (0x5),
+};
+
+enum {
+    KSYNC_BROADSYNC_BS0_CONFIG      = (0x1),
+    KSYNC_BROADSYNC_BS1_CONFIG      = (0x2),
+    KSYNC_BROADSYNC_BS0_STATUS_GET  = (0x3),
+    KSYNC_BROADSYNC_BS1_STATUS_GET  = (0x4),
+};
+
+enum {
+    KSYNC_GPIO_0                    = (0x1),
+    KSYNC_GPIO_1                    = (0x2),
+    KSYNC_GPIO_2                    = (0x3),
+    KSYNC_GPIO_3                    = (0x4),
+    KSYNC_GPIO_4                    = (0x5),
+    KSYNC_GPIO_5                    = (0x6),
+};
+
+
+
+/* 1588 message types. */
+enum
+{
+    IEEE1588_MSGTYPE_SYNC           = (0x0),
+    IEEE1588_MSGTYPE_DELREQ         = (0x1),
+    IEEE1588_MSGTYPE_PDELREQ        = (0x2),
+    IEEE1588_MSGTYPE_PDELRESP       = (0x3),
+    /* reserved                       (0x4) */
+    /* reserved                       (0x5) */
+    /* reserved                       (0x6) */
+    /* reserved                       (0x7) */
+    IEEE1588_MSGTYPE_GENERALMASK    = (0x8),    /* all non-event messages have this bit set */
+    IEEE1588_MSGTYPE_FLWUP          = (0x8),
+    IEEE1588_MSGTYPE_DELRESP        = (0x9),
+    IEEE1588_MSGTYPE_PDELRES_FLWUP  = (0xA),
+    IEEE1588_MSGTYPE_ANNOUNCE       = (0xB),
+    IEEE1588_MSGTYPE_SGNLNG         = (0xC),
+    IEEE1588_MSGTYPE_MNGMNT         = (0xD)
+    /* reserved                       (0xE) */
+    /* reserved                       (0xF) */
+};
+
+/* Usage macros */
+#define ONE_BILLION (1000000000)
+
+#define SKB_U16_GET(_skb, _pkt_offset) \
+            ((_skb->data[_pkt_offset] << 8) | _skb->data[_pkt_offset + 1])
+
+#define BKSYNC_PTP_EVENT_MSG(_ptp_msg_type) \
+            ((_ptp_msg_type == IEEE1588_MSGTYPE_DELREQ) ||    \
+             (_ptp_msg_type == IEEE1588_MSGTYPE_SYNC))
+
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)
+#define HWTSTAMP_TX_ONESTEP_SYNC 2
+#else
+#include <linux/net_tstamp.h>
+#endif
+
+
+/*
+ *  Hardware specific information.
+ *  4 words of information used from this data set.
+ *       0 -  3: 2-step untagged.
+ *       4 -  7: 2-step tagged.
+ *       8 - 11: 1-step untagged.
+ *      12 - 15: 1-step tagged.
+ *      16 - 19: 1-step untagged with ITS-set.
+ *      20 - 23: 1-step tagged with ITS-set.
+ *
+ *      Refer to device specific reg file for SOBMH header information.
+ *      Below fields are considered:
+ *      SOBMH => {
+ *      IEEE1588_ONE_STEP_ENABLE        -   OneStep
+ *      IEEE1588_REGEN_UDP_CHECKSUM     -   Regen UDP Checksum
+ *      IEEE1588_INGRESS_TIMESTAMP_SIGN -   ITS sign
+ *      TX_TS                           -   TwoStep
+ *      IEEE1588_TIMESTAMP_HDR_OFFSET   -   1588 header offset
+ *      }
+ *
+ */
+uint32_t sobmhrawpkts_dcb26[24] = {0x00000000, 0x00020E00, 0x00000000, 0x00000000, 0x00000000, 0x00021200, 0x00000000, 0x00000000,
+                                   0x00000000, 0x00100E00, 0x00000000, 0x00000000, 0x00000000, 0x00101200, 0x00000000, 0x00000000,
+                                   0x00000000, 0x00140E00, 0x00000000, 0x00000000, 0x00000000, 0x00141200, 0x00000000, 0x00000000};
+
+uint32_t sobmhudpipv4_dcb26[24] = {0x00000000, 0x00022A00, 0x00000000, 0x00000000, 0x00000000, 0x00022E00, 0x00000000, 0x00000000,
+                                   0x00000000, 0x00182A00, 0x00000000, 0x00000000, 0x00000000, 0x00182E00, 0x00000000, 0x00000000,
+                                   0x00000000, 0x001C2A00, 0x00000000, 0x00000000, 0x00000000, 0x001C2E00, 0x00000000, 0x00000000};
+
+uint32_t sobmhudpipv6_dcb26[24] = {0x00000000, 0x00023E00, 0x00000000, 0x00000000, 0x00000000, 0x00024200, 0x00000000, 0x00000000,
+                                   0x00000000, 0x00183E00, 0x00000000, 0x00000000, 0x00000000, 0x00184200, 0x00000000, 0x00000000,
+                                   0x00000000, 0x001C3E00, 0x00000000, 0x00000000, 0x00000000, 0x001C4200, 0x00000000, 0x00000000};
+
+uint32_t sobmhrawpkts_dcb32[24] = {0x00000000, 0x00010E00, 0x00000000, 0x00000000, 0x00000000, 0x00011200, 0x00000000, 0x00000000,
+                                   0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000,
+                                   0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000};
+
+uint32_t sobmhudpipv4_dcb32[24] = {0x00000000, 0x00012A00, 0x00000000, 0x00000000, 0x00000000, 0x00012E00, 0x00000000, 0x00000000,
+                                   0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000,
+                                   0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000};
+
+uint32_t sobmhudpipv6_dcb32[24] = {0x00000000, 0x00013E00, 0x00000000, 0x00000000, 0x00000000, 0x00014200, 0x00000000, 0x00000000,
+                                   0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000,
+                                   0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000};
+
+uint32_t sobmhrawpkts_dcb35[24] = {0x00000000, 0x0020E000, 0x00000000, 0x00000000, 0x00000000, 0x00212000, 0x00000000, 0x00000000,
+                                   0x00000000, 0x0100E000, 0x00000000, 0x00000000, 0x00000000, 0x01012000, 0x00000000, 0x00000000,
+                                   0x00000000, 0x0140E000, 0x00000000, 0x00000000, 0x00000000, 0x01412000, 0x00000000, 0x00000000};
+
+uint32_t sobmhudpipv4_dcb35[24] = {0x00000000, 0x0022A000, 0x00000000, 0x00000000, 0x00000000, 0x0022E000, 0x00000000, 0x00000000,
+                                   0x00000000, 0x0182A000, 0x00000000, 0x00000000, 0x00000000, 0x0182E000, 0x00000000, 0x00000000,
+                                   0x00000000, 0x01C2A000, 0x00000000, 0x00000000, 0x00000000, 0x01C2E000, 0x00000000, 0x00000000};
+
+uint32_t sobmhudpipv6_dcb35[24] = {0x00000000, 0x0023E000, 0x00000000, 0x00000000, 0x00000000, 0x00242000, 0x00000000, 0x00000000,
+                                   0x00000000, 0x0183E000, 0x00000000, 0x00000000, 0x00000000, 0x01842000, 0x00000000, 0x00000000,
+                                   0x00000000, 0x01C3E000, 0x00000000, 0x00000000, 0x00000000, 0x01C42000, 0x00000000, 0x00000000};
+
+
+uint32_t sobmhrawpkts_dcb36[24] = {0x00000000, 0x00010E00, 0x00000000, 0x00000000, 0x00000000, 0x00011200, 0x00000000, 0x00000000,
+                                   0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000,
+                                   0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000};
+
+uint32_t sobmhudpipv4_dcb36[24] = {0x00000000, 0x00012A00, 0x00000000, 0x00000000, 0x00000000, 0x00012E00, 0x00000000, 0x00000000,
+                                   0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000,
+                                   0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000};
+
+uint32_t sobmhudpipv6_dcb36[24] = {0x00000000, 0x00013E00, 0x00000000, 0x00000000, 0x00000000, 0x00014200, 0x00000000, 0x00000000,
+                                   0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000,
+                                   0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000};
+/* th3: onestep only */
+uint32_t sobmhrawpkts_dcb38[24] = {0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000,
+                                   0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000,
+                                   0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000};
+
+uint32_t sobmhudpipv4_dcb38[24] = {0x00000000, 0x00082A00, 0x00000000, 0x00000000, 0x00000000, 0x00082E00, 0x00000000, 0x00000000,
+                                   0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000,
+                                   0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000};
+
+uint32_t sobmhudpipv6_dcb38[24] = {0x00000000, 0x00083E00, 0x00000000, 0x00000000, 0x00000000, 0x00084200, 0x00000000, 0x00000000,
+                                   0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000,
+                                   0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000};
+
+/* HR3-MG/GH2 metadata */
+uint32_t sobmhrawpkts_dcb37[24] = {0x00000000, 0x00020E00, 0x00000000, 0x00000000, 0x00000000, 0x00021200, 0x00000000, 0x00000000,
+                                   0x00000000, 0x00100E00, 0x00000000, 0x00000000, 0x00000000, 0x00101200, 0x00000000, 0x00000000,
+                                   0x00000000, 0x00140E00, 0x00000000, 0x00000000, 0x00000000, 0x00141200, 0x00000000, 0x00000000};
+
+uint32_t sobmhudpipv4_dcb37[24] = {0x00000000, 0x00022A00, 0x00000000, 0x00000000, 0x00000000, 0x00022E00, 0x00000000, 0x00000000,
+                                   0x00000000, 0x00182A00, 0x00000000, 0x00000000, 0x00000000, 0x00182E00, 0x00000000, 0x00000000,
+                                   0x00000000, 0x001C2A00, 0x00000000, 0x00000000, 0x00000000, 0x001C2E00, 0x00000000, 0x00000000};
+
+uint32_t sobmhudpipv6_dcb37[24] = {0x00000000, 0x00023E00, 0x00000000, 0x00000000, 0x00000000, 0x00024200, 0x00000000, 0x00000000,
+                                   0x00000000, 0x00183E00, 0x00000000, 0x00000000, 0x00000000, 0x00184200, 0x00000000, 0x00000000,
+                                   0x00000000, 0x001C3E00, 0x00000000, 0x00000000, 0x00000000, 0x001C4200, 0x00000000, 0x00000000};
+
+/* Driver Proc Entry root */
+static struct proc_dir_entry *bksync_proc_root = NULL;
+
+/* Shared data structures with R5 */
+typedef struct _bksync_tx_ts_data_s {
+    u32 ts_valid;   /* Timestamp valid indication */
+    u32 port_id;    /* Port number */
+    u32 ts_seq_id;  /* Sequency Id */
+    u32 ts_cnt;
+    u64 timestamp;  /* Timestamp */
+} bksync_tx_ts_data_t;
+
+typedef struct bksync_info_s {
+    u32 ksyncinit;
+    u32 dev_id;
+    s64 freqcorr;
+    u64 portmap[BCMKSYNC_MAX_NUM_PORTS/64];  /* Two-step enabled ports */
+    u64 ptptime;
+    u64 reftime;
+    u64 ptptime_alt;
+    u64 reftime_alt;
+    s64 phase_offset;
+    bksync_tx_ts_data_t port_ts_data[BCMKSYNC_MAX_NUM_PORTS];
+} bksync_info_t;
+
+
+enum {
+    TS_EVENT_CPU       = 0,
+    TS_EVENT_BSHB_0    = 1,
+    TS_EVENT_BSHB_1    = 2,
+    TS_EVENT_GPIO_1    = 3,
+    TS_EVENT_GPIO_2    = 4,
+    TS_EVENT_GPIO_3    = 5,
+    TS_EVENT_GPIO_4    = 6,
+    TS_EVENT_GPIO_5    = 7,
+    TS_EVENT_GPIO_6    = 8,
+};
+
+#define NUM_TS_EVENTS 14
+
+#define __ATTRIBUTE_PACKED__  __attribute__ ((packed))
+
+/* FW timestamps.
+ *     This declaration has to match with HFT_t_TmStmp
+ *     defined in the firmware. Otherwise, dma will fail. 
+ */
+typedef struct fw_tstamp_s {
+    u64 sec;
+    u32 nsec;
+} __ATTRIBUTE_PACKED__ fw_tstamp_t;
+
+typedef struct bksync_fw_debug_event_tstamps_s {
+    fw_tstamp_t prv_tstamp;
+    fw_tstamp_t cur_tstamp;
+} __ATTRIBUTE_PACKED__ bksync_fw_debug_event_tstamps_t;
+
+typedef struct bksync_evlog_s {
+    bksync_fw_debug_event_tstamps_t event_timestamps[NUM_TS_EVENTS];
+} __ATTRIBUTE_PACKED__ bksync_evlog_t;
+
+
+/* Timestamps for EXTTS from Firmware */
+#define NUM_EXT_TS          6       /* gpio0 = event0 ..... gpio5 = event5 */
+#define NUM_EVENT_TS        128     /* Directly mapped to PTP_MAX_TIMESTAMPS from ptp_private.h */
+typedef struct bksync_fw_extts_event_s {
+    u32         ts_event_id;
+    fw_tstamp_t tstamp;
+} __ATTRIBUTE_PACKED__ bksync_fw_extts_event_t;
+
+typedef struct bksync_extts_log_s {
+    u32                     head;   /* Read pointer - Updated by HOST */
+    u32                     tail;   /* Write pointer - Updated by FW */
+    bksync_fw_extts_event_t event_ts[NUM_EVENT_TS];
+    u32                     overflow;
+} __ATTRIBUTE_PACKED__ bksync_fw_extts_log_t;
+
+struct bksync_extts_event {
+    int enable[NUM_EXT_TS];
+    int head;
+};
+
+typedef struct bksync_port_stats_s {
+    u32 pkt_rxctr;             /* All ingress packets */
+    u32 pkt_txctr;             /* All egress packets  */
+    u32 pkt_txonestep;         /* 1-step Tx packet counter */
+    u32 tsts_match;            /* 2-Step tstamp req match */
+    u32 tsts_timeout;          /* 2-Step tstamp req timeouts */
+    u32 tsts_discard;          /* 2-Step tstamp req discards */
+    u32 osts_event_pkts;       /* 1-step event packet counter */
+    u32 osts_tstamp_reqs;      /* 1-step events with tstamp request */
+    u32 fifo_rxctr;            /* 2-Step tstamp req match */
+    u64 tsts_best_fetch_time;  /* 1-step events with tstamp request */
+    u64 tsts_worst_fetch_time; /* 1-step events with tstamp request */
+    u32 tsts_avg_fetch_time;   /* 1-step events with tstamp request */
+} bksync_port_stats_t;
+
+typedef struct bksync_init_info_s {
+    u32 pci_knetsync_cos;
+    u32 uc_port_num;
+    u32 uc_port_sysport;
+    u32 host_cpu_port;
+    u32 host_cpu_sysport;
+    u32 udh_len;
+} bksync_init_info_t;
+
+typedef struct bksync_bs_info_s {
+    u32 enable;
+    u32 mode;
+    u32 bc;
+    u32 hb;
+} bksync_bs_info_t;
+
+typedef struct bksync_gpio_info_s {
+    u32 enable;
+    u32 mode;
+    u32 period;
+    int64_t phaseoffset;
+} bksync_gpio_info_t;
+
+typedef struct bksync_evlog_info_s {
+    u32 enable;
+} bksync_evlog_info_t;
+
+/* Contains information about parsed fields of RX packet header information */
+typedef struct bksync_dnx_rx_pkt_parse_info_s {
+    uint16_t     src_sys_port;
+    uint64_t     rx_hw_timestamp;
+    uint64_t     pph_header_vlan;
+    uint8_t      dnx_header_offset;
+    int          rx_frame_len;
+} bksync_dnx_rx_pkt_parse_info_t;
+
+
+/* DNX UDH DATA TYPE MAX */
+#define BKSYNC_DNXJER2_UDH_DATA_TYPE_MAX     (4)
+
+/* PPH LIF Ext. 3 bit type */
+#define BKSYNC_DNXJER2_PPH_LIF_EXT_TYPE_MAX  (8)
+
+
+typedef struct  bksync_dnx_jr2_devices_system_info_s {
+    /* dnx JR2 system header info */
+    uint32_t     ftmh_lb_key_ext_size;
+    uint32_t     ftmh_stacking_ext_size;
+    uint32_t     pph_base_size;
+    uint32_t     pph_lif_ext_size[BKSYNC_DNXJER2_PPH_LIF_EXT_TYPE_MAX];
+    uint32_t     system_headers_mode;
+    uint32_t     udh_enable;
+    uint32_t     udh_data_lenght_per_type[BKSYNC_DNXJER2_UDH_DATA_TYPE_MAX];
+
+    /* CPU port information */
+    uint32_t     cosq_port_cpu_channel;
+    uint32_t     cosq_port_pp_port;
+} bksync_dnx_jr2_devices_system_info_t;
+
+typedef enum bksync_dnxjr2_system_headers_mode_e {
+    bksync_dnxjr2_sys_hdr_mode_jericho = 0,
+    bksync_dnxjr2_sys_hdr_mode_jericho2 = 1
+} bksync_dnxjr2_system_headers_mode_t;
+
+/* DNX JR2 FTMH Header information */
+#define BKSYNC_DNXJR2_FTMH_HDR_LEN              (10)
+#define BKSYNC_DNXJR2_FTMH_TM_DEST_EXT_LEN      (3)
+#define BKSYNC_DNXJR2_FTMH_FLOWID_EXT_LEN       (3)
+#define BKSYNC_DNXJR2_FTMH_BEIR_BFR_EXT_LEN     (3)
+#define BKSYNC_DNXJR2_FTMH_APP_SPECIFIC_EXT_LEN     (6)
+
+/* DNX FTMH PPH type */
+#define BKSYNC_DNXJR2_PPH_TYPE_NO_PPH            (0)
+#define BKSYNC_DNXJR2_PPH_TYPE_PPH_BASE          (1)
+#define BKSYNC_DNXJR2_PPH_TYPE_TSH_ONLY          (2)
+#define BKSYNC_DNXJR2_PPH_TYPE_PPH_BASE_TSH      (3)
+
+typedef enum bksync_dnxjr2_ftmh_tm_action_type_e {
+    bksync_dnxjr2_ftmh_tm_action_type_forward = 0,               /* TM action is forward */
+    bksync_dnxjr2_ftmh_tm_action_type_snoop = 1,                 /* TM action is snoop */
+    bksync_dnxjr2_ftmh_tm_action_type_inbound_mirror = 2,        /* TM action is inbound mirror.  */
+    bksync_dnxjr2_ftmh_tm_action_type_outbound_mirror = 3,       /* TM action is outbound mirror. */
+    bksync_dnxjr2_ftmh_tm_action_type_mirror = 4,                /* TM action is mirror. */
+    bksync_dnxjr2_ftmh_tm_action_type_statistical_sampling = 5   /* TM action is statistical sampling. */
+} bksync_dnxjr2_ftmh_tm_action_type_t;
+
+typedef enum bksync_dnxjr2_ftmh_app_spec_ext_type_e {
+    bksync_dnxjr2_ftmh_app_spec_ext_type_none             = 0,   /* FTMH ASE type is None or OAM */
+    bksync_dnxjr2_ftmh_app_spec_ext_type_1588v2           = 1,   /* FTMH ASE type is 1588v2 */
+    bksync_dnxjr2_ftmh_app_spec_ext_type_mirror           = 3,   /* FTMH ASE type is Mirror */
+    bksync_dnxjr2_ftmh_app_spec_ext_type_trajectory_trace = 4,   /* FTMH ASE type is trajectory trace */
+    bksync_dnxjr2_ftmh_app_spec_ext_type_inband_telemetry = 5,   /* FTMH ASE type is Inband telemetry */
+} bksync_dnxjr2_ftmh_app_spec_ext_type_t;
+
+
+typedef union bksync_dnxjr2_ftmh_base_header_s {
+    struct {
+            uint32_t words[2];
+            uint8_t bytes[2];
+    };
+    struct {
+        uint32_t
+            src_sys_port_aggr_1:8,
+            src_sys_port_aggr_0:7,
+            traffic_class_1:1,
+            traffic_class_0:2,
+            packet_size_1:6,
+            packet_size_0:8;
+        uint32_t
+            unused_0:31,
+            src_sys_port_aggr_2:1;
+        uint8_t
+            unused_1:8;
+        uint8_t
+            reserved:1,
+            bier_bfr_ext_size:1,
+            flow_id_ext_size:1,
+            app_specific_ext_size:1,
+            tm_dest_ext_repsent:1,
+            pph_type:2,
+            visibility:1;
+    };
+} bksync_dnxjr2_ftmh_base_header_t;
+
+typedef union bksync_dnxjr2_ftmh_app_spec_ext_1588v2_s {
+    struct {
+        uint32_t word;
+        uint8_t bytes[2];
+    };
+    struct {
+        uint32_t
+            use_ingress_time_stamp:1,
+            use_ingress_time_compensation:1,
+            ingress_time_compensation:28,
+            time_stamp_lsbs:2;
+        uint8_t
+            offset_0:4,
+            ts_command:3,
+            ts_encapsulation:1;
+        uint8_t
+            offset_1:4,
+            type:4;
+    };
+} bksync_dnxjr2_ftmh_app_spec_ext_1588v2_t;
+
+/* DNX TSH Header size */
+#define BKSYNC_DNXJR2_TSH_HDR_SIZE              (4)
+
+typedef union bksync_dnxjr2_timestamp_header_s {
+    struct {
+        uint32_t word;
+    };
+    struct {
+        uint32_t timestamp;
+    };
+}  bksync_dnxjr2_timestamp_header_t;
+
+/* DNX PPH FHEI_TYPE */
+#define BKSYNC_DNXJR2_PPH_FHEI_TYPE_NONE           (0) /*  NO FHE1 */
+#define BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ0            (1) /* 3 byte */
+#define BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ1            (2) /* 5 byte */
+#define BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ2            (3) /* 8 byte */
+
+#define BKSYNC_DNXJR2_PPH_FHEI_SZ0_SIZE            (3) /*  3 byte */
+#define BKSYNC_DNXJR2_PPH_FHEI_SZ1_SIZE            (5) /*  5 byte */
+#define BKSYNC_DNXJR2_PPH_FHEI_SZ2_SIZE            (8) /* 8 byte */
+
+/* PPH Learn Extension - PPH EXT3 */
+#define BKSYNC_DNXJR2_PPH_LEARN_EXT_SIZE         (19)
+
+/* PPH LIF Ext. 3 bit type */
+#define BKSYNC_DNXJR2_PPH_LIF_EXT_TYPE_MAX       (8)
+
+typedef enum bksync_dnxjr2_pph_fheiext_type_e {
+    bksync_dnxjr2_pph_fheiext_type_vlanedit = 0,
+    bksync_dnxjr2_pph_fheiext_type_pop = 1,
+    bksync_dnxjr2_pph_fheiext_type_swap =  3,
+    bksync_dnxjr2_pph_fheiext_type_trap_snoop_mirror =  5,
+} bksync_dnxjr2_pph_fheiext_type_t;
+
+typedef union bksync_dnxjr2_pph_base_12b_header_s {
+    struct {
+        uint32_t word[3];
+    };
+    struct {
+        uint32_t     unused_1;
+        uint32_t     unused_2;
+        uint32_t
+            forwarding_strenght:1,
+            parsing_start_type:5,
+            parsing_start_offset_1:2,
+            parsing_start_offset_0:5,
+            lif_ext_type:3,
+            fhei_size:2,
+            learn_ext_present:1,
+            ttl_1:5,
+            ttl_0:3,
+            netwrok_qos_0:5;
+    };
+} bksync_dnxjr2_pph_base_12b_header_t;
+
+typedef union bksync_dnxjr2_pph_fheiext_vlanedit_3b_header_s {
+    struct {
+        uint8_t byte[3];
+    };
+    struct {
+        uint8_t
+            edit_pcp1_0:1,
+            ingress_vlan_edit_cmd:7;
+        uint8_t
+            edit_vid1_0:5,
+            edit_dei1:1,
+            edit_pcp1_1:2;
+        uint8_t
+            type:1,
+            edit_vid1_1:7;
+    };
+} bksync_dnxjr2_pph_fheiext_vlanedit_3b_header_t;
+
+typedef union bksync_dnxjr2_pph_fheiext_vlanedit_5b_header_s {
+    struct {
+        uint8_t byte[5];
+    };
+    struct {
+        uint8_t
+            edit_vid2_0:4,
+            edit_dei2:1,
+            edit_pcp2:3;
+        uint8_t
+            edit_vid2_1;
+        uint8_t
+            edit_pcp1_0:1,
+            ingress_vlan_edit_cmd:7;
+        uint8_t
+            edit_vid1_0:5,
+            edit_dei1:1,
+            edit_pcp1_1:2;
+        uint8_t
+            type:1,
+            edit_vid1_1:7;
+    };
+} bksync_dnxjr2_pph_fheiext_vlanedit_5b_header_t;
+
+typedef union bksync_dnxjr2_pph_fheiext_trap_header_s {
+    struct {
+        uint8_t byte[5];
+    };
+    struct {
+        uint32_t
+            code_0:5,
+            qualifier:27;
+        uint8_t
+            type:4,
+            code_1:4;
+    };
+} bksync_dnxjr2_pph_fheiext_trap_header_t;
+
+#define BKSYNC_DNXJR2_UDH_BASE_HEADER_LEN       (1)
+#define BKSYNC_DNXJR2_UDH_DATA_TYPE_MAX          (4)
+
+typedef union bksync_dnxjr2_udh_base_header_s {
+    struct {
+        uint8_t byte;
+    };
+    struct {
+        uint8_t
+            udh_data_type_3:2,
+            udh_data_type_2:2,
+            udh_data_type_1:2,
+            udh_data_type_0:2;
+    };
+} bksync_dnxjr2_udh_base_header_t;
+
+#define DNX_PTCH_TYPE2_HEADER_LEN   2
+typedef union bksync_dnxjr2_ptch_type2_header_s {
+    struct {
+        uint8_t bytes[DNX_PTCH_TYPE2_HEADER_LEN];
+    };
+    struct {
+        uint8_t
+            in_pp_port_0:2,
+            reserved:2,
+            opaque_pt_attributes:3,
+            parser_program_control:1;
+        uint8_t
+            in_pp_port_1:8;
+    };
+} bksync_dnxjr2_ptch_type2_header_t;
+
+#define DNX_DNXJR2_MODULE_HEADER_LEN   16
+#define DNX_DNXJR2_ITMH_HEADER_LEN     5
+
+
+/* Clock Private Data */
+struct bksync_ptp_priv {
+    struct device           dev;
+    int                     dcb_type;
+    struct ptp_clock        *ptp_clock;
+    struct ptp_clock_info   ptp_caps;
+    struct mutex            ptp_lock;
+    int                     ptp_pair_lock;
+    volatile void           *base_addr;   /* address for PCI register access */
+    volatile bksync_info_t  *shared_addr; /* address for shared memory access */
+    volatile bksync_evlog_t *evlog;       /* dma-able address for fw updates */
+    dma_addr_t              dma_mem;
+    int                     dma_mem_size;
+    struct DMA_DEV          *dma_dev;     /* Required for DMA memory control */
+    int                     num_pports;
+    int                     timekeep_status;
+    u32                     mirror_encap_bmp;
+    struct delayed_work     time_keep;
+    bksync_port_stats_t     *port_stats;
+    bksync_init_info_t      bksync_init_info;
+    bksync_bs_info_t        bksync_bs_info[2];
+    bksync_gpio_info_t      bksync_gpio_info[6];
+    bksync_evlog_info_t     bksync_evlog_info[NUM_TS_EVENTS];
+    bksync_dnx_jr2_devices_system_info_t bksync_jr2devs_sys_info;
+    volatile bksync_fw_extts_log_t      *extts_log; /* dma-able address for fw updates */
+    int                                 extts_dma_mem_size;
+    dma_addr_t                          extts_dma_mem_addr;
+    struct bksync_extts_event           extts_event;
+    struct delayed_work                 extts_logging;
+
+    struct kobject          *kobj;
+};
+
+static struct bksync_ptp_priv *ptp_priv;
+volatile bksync_info_t *linuxPTPMemory = (bksync_info_t*)(0);
+static volatile int module_initialized;
+static int num_retries = 10;   /* Retry count */
+
+static void bksync_ptp_time_keep_init(void);
+static void bksync_ptp_time_keep_deinit(void);
+void bksync_dnxjr2_parse_rxpkt_system_header(uint8_t *raw_frame,  bksync_dnx_rx_pkt_parse_info_t *rx_pkt_parse_info, int isfirsthdr);
+static int bksync_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts);
+
+static void bksync_ptp_extts_logging_init(void);
+static void bksync_ptp_extts_logging_deinit(void);
+
+#if defined(CMIC_SOFT_BYTE_SWAP)
+
+#define CMIC_SWAP32(_x)   ((((_x) & 0xff000000) >> 24) \
+        | (((_x) & 0x00ff0000) >>  8) \
+        | (((_x) & 0x0000ff00) <<  8) \
+        | (((_x) & 0x000000ff) << 24))
+
+#define DEV_READ32(_d, _a, _p) \
+    do { \
+        uint32_t _data; \
+        _data = (((volatile uint32_t *)(_d)->base_addr)[(_a)/4]); \
+        *(_p) = CMIC_SWAP32(_data); \
+    } while(0)
+
+#define DEV_WRITE32(_d, _a, _v) \
+    do { \
+        uint32_t _data = CMIC_SWAP32(_v); \
+        ((volatile uint32_t *)(_d)->base_addr)[(_a)/4] = (_data); \
+    } while(0)
+
+#else
+
+#define DEV_READ32(_d, _a, _p) \
+    do { \
+        *(_p) = (((volatile uint32_t *)(_d)->base_addr)[(_a)/4]); \
+    } while(0)
+
+#define DEV_WRITE32(_d, _a, _v) \
+    do { \
+        ((volatile uint32_t *)(_d)->base_addr)[(_a)/4] = (_v); \
+    } while(0)
+#endif  /* defined(CMIC_SOFT_BYTE_SWAP) */
+
+static void
+ptp_usleep(int usec)
+{
+    if (DEVICE_IS_DNX) {
+        udelay(usec);
+    } else {
+        usleep_range(usec,usec+1);
+    }
+}
+
+static void
+ptp_sleep(int jiffies)
+{
+    wait_queue_head_t wq;
+    init_waitqueue_head(&wq);
+
+    wait_event_timeout(wq, 0, jiffies);
+
+}
+
+
+static void bksync_hostcmd_data_op(int setget, u64 *d1, u64 *d2)
+{
+    u32 w0, w1;
+    u64 data;
+
+    if (!d1) {
+        return;
+    }
+
+    if (setget) {
+        if (d1) {
+            data = *d1;
+            w0 = (data & 0xFFFFFFFF);
+            w1 = (data >> 32);
+            DEV_WRITE32(ptp_priv, hostcmd_regs[1], w0);
+            DEV_WRITE32(ptp_priv, hostcmd_regs[2], w1);
+        }
+
+        if (d2) {
+            data = *d2;
+
+            w0 = (data & 0xFFFFFFFF);
+            w1 = (data >> 32);
+            DEV_WRITE32(ptp_priv, hostcmd_regs[3], w0);
+            DEV_WRITE32(ptp_priv, hostcmd_regs[4], w1);
+        }
+    } else {
+        if (d1) {
+            DEV_READ32(ptp_priv, hostcmd_regs[1], &w0);
+            DEV_READ32(ptp_priv, hostcmd_regs[2], &w1);
+            data = (((u64)w1 << 32) | (w0));
+            *d1 = data;
+        }
+
+        if (d2) {
+            DEV_READ32(ptp_priv, hostcmd_regs[3], &w0);
+            DEV_READ32(ptp_priv, hostcmd_regs[4], &w1);
+            data = (((u64)w1 << 32) | (w0));
+            *d2 = data;
+        }
+    }
+}
+
+
+static int bksync_cmd_go(u32 cmd, void *data0, void *data1)
+{
+    int ret = -1;
+    int retry_cnt = (1000); /* 1ms default timeout for hostcmd response */
+    u32 cmd_status;
+    char cmd_str[30];
+    int port = 0;
+    uint32_t seq_id = 0;
+    ktime_t start, now;
+    u32 subcmd = 0;
+
+    if (ptp_priv == NULL || ptp_priv->shared_addr == NULL) {
+        return ret;
+    }
+
+    mutex_lock(&ptp_priv->ptp_lock);
+
+    if (cmd == BKSYNC_GET_TSTIME || cmd == BKSYNC_ACK_TSTIME) {
+        port = *((uint64_t *)data0) & 0xFFF;
+        seq_id = *((uint64_t*)data0) >> 16;
+    }
+    start = ktime_get();
+
+    ptp_priv->shared_addr->ksyncinit = cmd;
+
+    /* init data */
+    DEV_WRITE32(ptp_priv, hostcmd_regs[1], 0x0);
+    DEV_WRITE32(ptp_priv, hostcmd_regs[2], 0x0);
+    DEV_WRITE32(ptp_priv, hostcmd_regs[3], 0x0);
+    DEV_WRITE32(ptp_priv, hostcmd_regs[4], 0x0);
+
+    switch (cmd) {
+        case BKSYNC_INIT:
+            retry_cnt = (retry_cnt * 4);
+            snprintf(cmd_str, sizeof(cmd_str), "KSYNC_INIT");
+            ptp_priv->shared_addr->phase_offset  = 0;
+            bksync_hostcmd_data_op(1, (u64 *)&(ptp_priv->shared_addr->phase_offset), 0);
+            break;
+        case BKSYNC_FREQCOR:
+            snprintf(cmd_str, sizeof(cmd_str), "KSYNC_FREQCORR");
+            ptp_priv->shared_addr->freqcorr  = *((s32 *)data0);
+            bksync_hostcmd_data_op(1, (u64 *)&(ptp_priv->shared_addr->freqcorr), 0);
+            break;
+        case BKSYNC_ADJTIME:
+            snprintf(cmd_str, sizeof(cmd_str), "KSYNC_ADJTIME");
+            ptp_priv->shared_addr->phase_offset  = *((s64 *)data0);
+            bksync_hostcmd_data_op(1, (u64 *)&(ptp_priv->shared_addr->phase_offset), 0);
+            break;
+        case BKSYNC_GETTIME:
+            retry_cnt = (retry_cnt * 2);
+            snprintf(cmd_str, sizeof(cmd_str), "KSYNC_GETTIME");
+            break;
+        case BKSYNC_GET_TSTIME:
+            retry_cnt = (retry_cnt * 2);
+            snprintf(cmd_str, sizeof(cmd_str), "KSYNC_GET_TSTIME");
+            bksync_hostcmd_data_op(1, data0, data1);
+            break;
+         case BKSYNC_ACK_TSTIME:
+            retry_cnt = (retry_cnt * 2);
+            snprintf(cmd_str, sizeof(cmd_str), "KSYNC_ACK_TSTIME");
+            bksync_hostcmd_data_op(1, data0, data1);
+            break;
+        case BKSYNC_SETTIME:
+            snprintf(cmd_str, sizeof(cmd_str), "KSYNC_SETTIME");
+            ptp_priv->shared_addr->ptptime   = *((s64 *)data0);
+            ptp_priv->shared_addr->phase_offset = 0;
+            bksync_hostcmd_data_op(1, (u64 *)&(ptp_priv->shared_addr->ptptime), (u64 *)&(ptp_priv->shared_addr->phase_offset));
+            break;
+        case BKSYNC_MTP_TS_UPDATE_ENABLE:
+            retry_cnt = (retry_cnt * 6);
+            snprintf(cmd_str, sizeof(cmd_str), "KSYNC_MTP_TS_UPDATE_ENABLE");
+            bksync_hostcmd_data_op(1, (u64 *)data0, 0);
+            break;
+        case BKSYNC_MTP_TS_UPDATE_DISABLE:
+            retry_cnt = (retry_cnt * 6);
+            snprintf(cmd_str, sizeof(cmd_str), "KSYNC_MTP_TS_UPDATE_DISABLE");
+            bksync_hostcmd_data_op(1, (u64 *)data0, 0);
+            break;
+        case BKSYNC_DEINIT:
+            retry_cnt = (retry_cnt * 4);
+            snprintf(cmd_str, sizeof(cmd_str), "KSYNC_DEINIT");
+            break;
+        case BKSYNC_SYSINFO:
+            snprintf(cmd_str, sizeof(cmd_str), "KSYNC_SYSINFO");
+            bksync_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1);
+            break;
+        case BKSYNC_BROADSYNC:
+            subcmd = *((u32 *)data0);
+            snprintf(cmd_str, sizeof(cmd_str), "KSYNC_BROADSYNC");
+            bksync_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1);
+            break;
+        case BKSYNC_GPIO:
+            snprintf(cmd_str, sizeof(cmd_str), "KSYNC_GPIO");
+            bksync_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1);
+            break;
+        case BKSYNC_EVLOG:
+            snprintf(cmd_str, sizeof(cmd_str), "KSYNC_EVLOG");
+            bksync_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1);
+            break;
+        case BKSYNC_EXTTSLOG:
+            snprintf(cmd_str, sizeof(cmd_str), "KSYNC_EXTTSLOG");
+            bksync_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1);
+            break;
+        case BKSYNC_GPIO_PHASEOFFSET:
+            snprintf(cmd_str, sizeof(cmd_str), "BKSYNC_GPIO_PHASEOFFSET");
+            bksync_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1);
+            break;
+        default:
+            snprintf(cmd_str, sizeof(cmd_str), "KSYNC_XXX");
+            break;
+    }
+
+    DEV_WRITE32(ptp_priv, hostcmd_regs[0], ptp_priv->shared_addr->ksyncinit);
+
+    do {
+        DEV_READ32(ptp_priv, hostcmd_regs[0], &cmd_status);
+        ptp_priv->shared_addr->ksyncinit = cmd_status;
+
+        if (cmd_status == BKSYNC_DONE) {
+            ret = 0;
+            switch (cmd) {
+                case BKSYNC_GET_TSTIME:
+                case BKSYNC_GETTIME:
+                    bksync_hostcmd_data_op(0, (u64 *)data0, (u64 *)data1);
+                    break;
+                case BKSYNC_BROADSYNC:
+                    if ((subcmd == KSYNC_BROADSYNC_BS0_STATUS_GET) ||
+                        (subcmd == KSYNC_BROADSYNC_BS1_STATUS_GET)) {
+                        bksync_hostcmd_data_op(0, (u64 *)data0, (u64 *)data1);
+                    }
+                    break;
+                default:
+                    break;
+            }
+            break;
+        }
+        ptp_usleep(100);
+        retry_cnt--;
+    } while (retry_cnt);
+
+    now = ktime_get();
+    mutex_unlock(&ptp_priv->ptp_lock);
+
+    if (retry_cnt == 0) {
+        DBG_ERR(("Timeout on response from R5 to cmd %s time taken %lld us\n", cmd_str, ktime_us_delta(now, start)));
+        if (cmd == BKSYNC_GET_TSTIME) {
+            DBG_ERR(("2step timestamp get timeout for port:%d seq_id:%d\n", port, seq_id));
+        }
+    }
+
+    if (debug & DBG_LVL_CMDS) {
+        if (ktime_us_delta(now, start) > 5000)
+            DBG_CMDS(("R5 Command %s exceeded time expected (%lld us)\n", cmd_str, ktime_us_delta(now, start)));
+    }
+
+    DBG_CMDS(("bksync_cmd_go: cmd:%s rv:%d\n", cmd_str, ret));
+
+    return ret;
+}
+
+
+/**
+ * bksync_ptp_adjfreq
+ *
+ * @ptp: pointer to ptp_clock_info structure
+ * @ppb: frequency correction value
+ *
+ * Description: this function will set the frequency correction
+ */
+static int bksync_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
+{
+    int ret = -1;
+
+    ret = bksync_cmd_go(BKSYNC_FREQCOR, &ppb, NULL);
+    DBG_VERB(("ptp_adjfreq: applying freq correction: %x; rv:%d\n", ppb, ret));
+
+    return ret;
+}
+
+/**
+ * bksync_ptp_adjtime
+ *
+ * @ptp: pointer to ptp_clock_info structure
+ * @delta: desired change in nanoseconds
+ *
+ * Description: this function will shift/adjust the hardware clock time.
+ */
+static int bksync_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
+{
+    int ret = -1;
+
+    ret = bksync_cmd_go(BKSYNC_ADJTIME, (void *)&delta, NULL);
+    DBG_VERB(("ptp_adjtime: adjtime: 0x%llx; rv:%d\n", delta, ret));
+
+    return ret;
+}
+
+/**
+ * bksync_ptp_gettime
+ *
+ * @ptp: pointer to ptp_clock_info structure
+ * @ts: pointer to hold time/result
+ *
+ * Description: this function will read the current time from the
+ * hardware clock and store it in @ts.
+ */
+static int bksync_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
+{
+    int ret = -1;
+    s64 reftime = 0;
+    s64 refctr = 0;
+    static u64 prv_reftime = 0, prv_refctr = 0;
+    u64 diff_reftime = 0, diff_refctr = 0;
+
+    ret = bksync_cmd_go(BKSYNC_GETTIME, (void *)&reftime, (void *)&refctr);
+    if (ret == 0) {
+        DBG_VERB(("ptp_gettime: gettime: 0x%llx refctr:0x%llx\n", reftime, refctr));
+
+        ptp_priv->shared_addr->ptptime_alt = ptp_priv->shared_addr->ptptime;
+        ptp_priv->shared_addr->reftime_alt = ptp_priv->shared_addr->reftime;
+
+        ptp_priv->ptp_pair_lock = 1;
+        ptp_priv->shared_addr->ptptime = reftime;
+        ptp_priv->shared_addr->reftime = refctr;
+        ptp_priv->ptp_pair_lock = 0;
+
+        diff_reftime = reftime - prv_reftime;
+        diff_refctr = refctr - prv_refctr;
+
+        if (diff_reftime != diff_refctr) {
+            DBG_WARN(("PTP-GETTIME ptptime: 0x%llx reftime: 0x%llx prv_ptptime: 0x%llx prv_reftime: 0x%llx \n",
+                     ptp_priv->shared_addr->ptptime, ptp_priv->shared_addr->reftime, diff_reftime, diff_refctr));
+        }
+        prv_reftime = reftime;
+        prv_refctr = refctr;
+
+        *ts = ns_to_timespec64(reftime);
+    }
+    return ret;
+}
+
+
+/**
+ * bksync_ptp_settime
+ *
+ * @ptp: pointer to ptp_clock_info structure
+ * @ts: time value to set
+ *
+ * Description: this function will set the current time on the
+ * hardware clock.
+ */
+static int bksync_ptp_settime(struct ptp_clock_info *ptp,
+                              const struct timespec64 *ts)
+{
+    s64 reftime, phaseadj;
+    int ret = -1;
+
+    phaseadj = 0;
+    reftime = timespec64_to_ns(ts);
+
+    ret = bksync_cmd_go(BKSYNC_SETTIME, (void *)&reftime, (void *)&phaseadj);
+    DBG_VERB(("ptp_settime: settime: 0x%llx; rv:%d\n", reftime, ret));
+
+    return ret;
+}
+
+static int bksync_exttslog_cmd(int event, int enable)
+{
+    int ret;
+    u64 subcmd = 0, subcmd_data = 0;
+
+    /* upper 32b -> event
+     * lower 32b -> enable/disable */
+    subcmd = (u64)event << 32 | enable;
+    subcmd_data = ptp_priv->extts_dma_mem_addr;
+
+    ret = bksync_cmd_go(BKSYNC_EXTTSLOG, &subcmd, &subcmd_data);
+    DBG_VERB(("bksync_evlog_cmd: subcmd: 0x%llx subcmd_data: 0x%llx rv:%d\n", subcmd, subcmd_data, ret));
+
+    return ret;
+}
+
+static int bksync_ptp_enable(struct ptp_clock_info *ptp,
+                             struct ptp_clock_request *rq, int on)
+{
+    int mapped_event = -1;
+    int enable = on ? 1 : 0;
+
+    switch (rq->type) {
+        case PTP_CLK_REQ_EXTTS:
+            if (rq->extts.index < NUM_EXT_TS) {
+                switch (rq->extts.index) {
+                    /* Map EXTTS event_id to FW event_id */
+                    case 0:
+                        mapped_event = TS_EVENT_GPIO_1;
+                        break;
+                    case 1:
+                        mapped_event = TS_EVENT_GPIO_2;
+                        break;
+                    case 2:
+                        mapped_event = TS_EVENT_GPIO_3;
+                        break;
+                    case 3:
+                        mapped_event = TS_EVENT_GPIO_4;
+                        break;
+                    case 4:
+                        mapped_event = TS_EVENT_GPIO_5;
+                        break;
+                    case 5:
+                        mapped_event = TS_EVENT_GPIO_6;
+                        break;
+                    default:
+                        return -EINVAL;
+                }
+
+                /* Reject request for unsupported flags */
+                if (rq->extts.flags & ~(PTP_ENABLE_FEATURE | PTP_RISING_EDGE)) {
+                        return -EOPNOTSUPP;
+                }
+
+                ptp_priv->extts_event.enable[rq->extts.index] = enable;
+
+                bksync_exttslog_cmd(mapped_event, enable);
+
+                DBG_VERB(("Event state change req_index:%u state:%d\n",
+                            rq->extts.index, enable));
+            } else {
+                return -EINVAL;
+            }
+            break;
+        default:
+            return -EOPNOTSUPP;
+    }
+
+    return 0;
+}
+
+
+static int bksync_ptp_mirror_encap_update(struct ptp_clock_info *ptp,
+                                          int mtp_idx, int start)
+{
+    int ret = -1;
+    u64 mirror_encap_idx;
+    u32 cmd_status;
+
+    if (mtp_idx > BCMKSYNC_MAX_MTP_IDX) {
+        return ret;
+    }
+
+    mirror_encap_idx = mtp_idx;
+    if (start) {
+        cmd_status = BKSYNC_MTP_TS_UPDATE_ENABLE;
+        ptp_priv->mirror_encap_bmp |= (1 << mtp_idx);
+    } else {
+        if (!(ptp_priv->mirror_encap_bmp & mtp_idx)) {
+            /* Not running */
+            return ret;
+        }
+        cmd_status = BKSYNC_MTP_TS_UPDATE_DISABLE;
+        ptp_priv->mirror_encap_bmp &= ~mtp_idx;
+    }
+
+    ret = bksync_cmd_go(cmd_status, &mirror_encap_idx, NULL);
+    DBG_VERB(("mirror_encap_update: %d, mpt_index: %d, ret:%d\n", start, mtp_idx, ret));
+
+    return ret;
+
+}
+
+/* structure describing a PTP hardware clock */
+static struct ptp_clock_info bksync_ptp_caps = {
+    .owner = THIS_MODULE,
+    .name = "bksync_ptp_clock",
+    .max_adj = 200000,
+    .n_alarm = 0,
+    .n_ext_ts = NUM_EXT_TS,
+    .n_per_out = 0, /* will be overwritten in bksync_ptp_register */
+    .n_pins = 0,
+    .pps = 0,
+    .adjfreq = bksync_ptp_adjfreq,
+    .adjtime = bksync_ptp_adjtime,
+    .gettime64 = bksync_ptp_gettime,
+    .settime64 = bksync_ptp_settime,
+    .enable = bksync_ptp_enable,
+};
+
+/**
+ * bksync_ptp_hw_tstamp_enable
+ *
+ * @dev_no: device number
+ * @port: port number
+ *
+ * Description: this is a callback function to enable the timestamping on
+ * a given port
+ */
+int bksync_ptp_hw_tstamp_enable(int dev_no, int port, int tx_type)
+{
+    uint64_t portmap = 0;
+    int map = 0;
+    int ret = 0;
+
+    if (!module_initialized) {
+        ret = -1;
+        goto exit;
+    }
+
+    if (tx_type == HWTSTAMP_TX_ONESTEP_SYNC) {
+        DBG_VERB(("hw_tstamp_enable: Enabling 1-step(type:%d) TS on port:%d\n", tx_type, port));
+        bksync_ptp_time_keep_init();
+        goto exit;
+    }
+
+    DBG_VERB(("hw_tstamp_enable: Enabling 2-step(type:%d) TS on port:%d\n", tx_type, port));
+    if (port <= 0) {
+        DBG_ERR(("hw_tstamp_enable: Error enabling 2-step timestamp on port:%d\n", port));
+        ret = -1;
+        goto exit;
+    }
+
+    /* Update the shared structure member */
+    if (ptp_priv->shared_addr) {
+        if ((port > 0) && (port < BCMKSYNC_MAX_NUM_PORTS)) {
+            port -= 1;
+            map = (port / 64);
+            port = (port % 64);
+
+            portmap = ptp_priv->shared_addr->portmap[map];
+            portmap |= (uint64_t)0x1 << port;
+            ptp_priv->shared_addr->portmap[map] = portmap;
+
+            /* Command to R5 for the update */
+            ptp_priv->shared_addr->ksyncinit=BKSYNC_PBM_UPDATE;
+
+        }
+    }
+
+exit:
+    return ret;
+}
+
+/**
+ * bksync_ptp_hw_tstamp_disable
+ *
+ * @dev_no: device number
+ * @port: port number
+ *
+ * Description: this is a callback function to disable the timestamping on
+ * a given port
+ */
+int bksync_ptp_hw_tstamp_disable(int dev_no, int port, int tx_type)
+{
+    uint64_t portmap = 0;
+    int map = 0;
+    int ret = 0;
+
+    if (!module_initialized) {
+        ret = -1;
+        goto exit;
+    }
+
+    if (tx_type == HWTSTAMP_TX_ONESTEP_SYNC) {
+        DBG_VERB(("hw_tstamp_disable: Disable 1Step TS(type:%d) port = %d\n", tx_type, port));
+        goto exit;
+    }
+
+    DBG_VERB(("hw_tstamp_disable: Disable 2Step TS(type:%d) port = %d\n", tx_type, port));
+    if (port <= 0) {
+        DBG_ERR(("hw_tstamp_disable: Error disabling timestamp on port:%d\n", port));
+        ret = -1;
+        goto exit;
+    }
+
+    /* Update the shared structure member */
+    if (ptp_priv->shared_addr) {
+        if ((port > 0) && (port < BCMKSYNC_MAX_NUM_PORTS)) {
+            port -= 1;
+            map = (port / 64);
+            port = (port % 64);
+
+            portmap = ptp_priv->shared_addr->portmap[map];
+            portmap &= ~((uint64_t)0x1 << port);
+            ptp_priv->shared_addr->portmap[map]= portmap;
+    
+            /* Command to R5 for the update */
+            ptp_priv->shared_addr->ksyncinit = BKSYNC_PBM_UPDATE;
+        }
+    }
+
+exit:
+    return ret;
+}
+
+int bksync_ptp_transport_get(uint8_t *pkt)
+{
+    int         transport = 0;
+    uint16_t    ethertype;
+    uint16_t    tpid;
+    int         tpid_offset, ethype_offset;
+
+    /* Need to check VLAN tag if packet is tagged */
+    tpid_offset = 12;
+    tpid = pkt[tpid_offset] << 8 | pkt[tpid_offset + 1];
+    if (tpid == 0x8100) {
+        ethype_offset = tpid_offset + 4;
+    } else {
+        ethype_offset = tpid_offset;
+    }
+
+    ethertype = pkt[ethype_offset] << 8 | pkt[ethype_offset+1];
+
+    switch (ethertype) {
+        case 0x88f7:    /* ETHERTYPE_PTPV2 */
+            transport = 2;
+            break;
+
+        case 0x0800:    /* ETHERTYPE_IPV4 */
+            transport = 4;
+            break;
+
+        case 0x86DD:    /* ETHERTYPE_IPV6 */
+            transport = 6;
+            break;
+
+        default:
+            transport = 0;
+    }
+
+    return transport;
+}
+
+static int
+bksync_txpkt_tsts_tsamp_get(int port, uint32_t pkt_seq_id, uint32_t *ts_valid, uint32_t *seq_id, uint64_t *timestamp)
+{
+    int ret = 0;
+    uint64_t data;
+    u32 fifo_rxctr = 0;
+
+    *ts_valid = 0;
+    *timestamp = 0;
+    *seq_id = 0;
+
+    data = (port & 0xFFFF) | ((pkt_seq_id & 0xFFFF) << 16);
+
+    ret = bksync_cmd_go(BKSYNC_GET_TSTIME, &data, timestamp);
+    if (ret >= 0) {
+        fifo_rxctr = (data >> 32) & 0xFFFFFFFF;
+        *seq_id = (data >> 16) & 0xFFFF;
+        *ts_valid = data & 0x1;
+        if (*ts_valid) {
+            data = (port & 0xFFFF) | (pkt_seq_id << 16);
+            bksync_cmd_go(BKSYNC_ACK_TSTIME, &data, 0);
+            if (fifo_rxctr != 0) {
+                if (fifo_rxctr != (ptp_priv->port_stats[port].fifo_rxctr + 1)) {
+                    DBG_ERR(("FW reset or lost timestamp FIFO_RxCtr:"
+                                "(Prev %u : Current %u) on port:%d\n",
+                                ptp_priv->port_stats[port].fifo_rxctr,
+                                fifo_rxctr, port));
+                }
+                ptp_priv->port_stats[port].fifo_rxctr = fifo_rxctr;
+            }
+        }
+    } else {
+        DBG_ERR(("BKSYNC_GET_TSTIME failed on port:%d\n", port));
+    }
+    return ret;
+}
+
+/**
+ * bksync_ptp_hw_tstamp_tx_time_get
+ *
+ * @dev_no: device number
+ * @port: port number
+ * @pkt: packet address
+ * @ts: timestamp to be retrieved
+ *
+ * Description: this is a callback function to retrieve the timestamp on
+ * a given port
+ * NOTE:
+ * Two-step related - fetching the timestamp from portmacro, not needed for one-step
+ */
+int bksync_ptp_hw_tstamp_tx_time_get(int dev_no, int port, uint8_t *pkt, uint64_t *ts, int tx_type)
+{
+    /* Get Timestamp from R5 or CLMAC */
+    uint32_t ts_valid = 0;
+    uint32_t seq_id = 0;
+    uint32_t pktseq_id = 0;
+    uint64_t timestamp = 0;
+    uint16_t tpid = 0;
+    ktime_t start;
+    u64 delta;
+    int retry_cnt = num_retries;
+    int seq_id_offset, tpid_offset;
+    int transport = network_transport;
+
+    start = ktime_get();
+
+    if (!ptp_priv || !pkt || !ts || port < 1 || port > 255 || ptp_priv->shared_addr == NULL) {
+        return -1;
+    }
+
+    *ts = 0;
+
+    /* Linux 5.10.67 kernel complains about missing delay request timestamp for even if
+     * configuration is for one-step ptp, hence provided ptp time in skb timestamp
+     */
+    if (tx_type == HWTSTAMP_TX_ONESTEP_SYNC) {
+        if (ptp_priv->ptp_pair_lock == 1) {
+            /* use alternate pair when main dataset is being updated */
+            *ts = ptp_priv->shared_addr->ptptime_alt;
+        } else {
+            *ts = ptp_priv->shared_addr->ptptime;
+        }
+        ptp_priv->port_stats[port].pkt_txctr += 1;
+        goto exit;
+    }
+
+
+    tpid_offset = 12;
+
+    /* Parse for nw transport */
+    if (transport == 0) {
+        transport = bksync_ptp_transport_get(pkt);
+    }
+
+    switch(transport)
+    {
+        case 2:
+            seq_id_offset = 0x2c;
+            break;
+        case 4:
+            seq_id_offset = 0x48;
+            break;
+        case 6:
+            seq_id_offset = 0x5c;
+            break;
+        default:
+            seq_id_offset = 0x2c;
+            break;
+    }
+
+    /* Need to check VLAN tag if packet is tagged */
+    tpid = pkt[tpid_offset] << 8 | pkt[tpid_offset + 1];
+    if (tpid == 0x8100) {
+        seq_id_offset += 4;
+    }
+
+    pktseq_id = pkt[seq_id_offset] << 8 | pkt[seq_id_offset + 1];
+
+    port -= 1;
+
+    DBG_TXTS(("hw_tstamp_tx_time_get: port %d pktseq_id %u\n", port, pktseq_id));
+
+    /* Fetch the TX timestamp from shadow memory */
+    do {
+        bksync_txpkt_tsts_tsamp_get(port, pktseq_id, &ts_valid, &seq_id, &timestamp);
+        if (ts_valid) {
+
+            /* Clear the shadow memory to get next entry */
+            ptp_priv->shared_addr->port_ts_data[port].timestamp = 0;
+            ptp_priv->shared_addr->port_ts_data[port].port_id = 0;
+            ptp_priv->shared_addr->port_ts_data[port].ts_seq_id = 0;
+            ptp_priv->shared_addr->port_ts_data[port].ts_valid = 0;
+
+            if (seq_id == pktseq_id) {
+                *ts = timestamp;
+                ptp_priv->port_stats[port].tsts_match += 1;
+
+                delta = ktime_us_delta(ktime_get(), start);
+                DBG_TXTS(("Port: %d Skb_SeqID %d FW_SeqId %d and TS:%llx FetchTime %lld\n",
+                          port, pktseq_id, seq_id, timestamp, delta));
+
+                if (delta < ptp_priv->port_stats[port].tsts_best_fetch_time || ptp_priv->port_stats[port].tsts_best_fetch_time == 0) {
+                    ptp_priv->port_stats[port].tsts_best_fetch_time = delta;
+                }
+                if (delta > ptp_priv->port_stats[port].tsts_worst_fetch_time || ptp_priv->port_stats[port].tsts_worst_fetch_time == 0) {
+                    ptp_priv->port_stats[port].tsts_worst_fetch_time = delta;
+                }
+                /* Calculate Moving Average*/
+                ptp_priv->port_stats[port].tsts_avg_fetch_time = ((u32)delta + ((ptp_priv->port_stats[port].tsts_match - 1) * ptp_priv->port_stats[port].tsts_avg_fetch_time)) / ptp_priv->port_stats[port].tsts_match;
+                break;
+            } else {
+                DBG_TXTS(("Discard timestamp on port %d Skb_SeqID %d FW_SeqId %d RetryCnt %d TimeLapsed (%lld us)\n",
+                          port, pktseq_id, seq_id, (num_retries - retry_cnt), ktime_us_delta(ktime_get(),start)));
+
+                ptp_priv->port_stats[port].tsts_discard += 1;
+                continue;
+            }
+        }
+        ptp_sleep(1);
+        retry_cnt--;
+    } while(retry_cnt);
+
+
+    ptp_priv->port_stats[port].pkt_txctr += 1;
+
+    if (retry_cnt == 0) {
+        ptp_priv->port_stats[port].tsts_timeout += 1;
+        DBG_ERR(("FW Response timeout: Tx TS on phy port:%d Skb_SeqID: %d TimeLapsed (%lld us)\n", 
+                        port, pktseq_id, ktime_us_delta(ktime_get(), start)));
+    }
+
+exit:
+    return 0;
+}
+
+
+enum {
+    bxconCustomEncapVersionInvalid = 0,
+    bxconCustomEncapVersionOne  = 1,
+
+    bxconCustomEncapVersionCurrent = bxconCustomEncapVersionOne,
+    bxconCustomEncapVersionReserved = 255 /* last */
+} bxconCustomEncapVersion;
+
+enum {
+    bxconCustomEncapOpcodeInvalid = 0,
+    bxconCustomEncapOpcodePtpRx = 1,
+    bxconCustomEncapOpcodeReserved = 255 /* last */
+} bxconCustomEncapOpcode;
+
+enum {
+    bxconCustomEncapPtpRxTlvInvalid = 0,
+    bxconCustomEncapPtpRxTlvPtpRxTime = 1,
+    bxconCustomEncapPtpRxTlvReserved = 255 /* last */
+} bxconCustomEncapPtpRxTlvType;
+
+static void
+dbg_dump_pkt(uint8_t *data, int size)
+{
+    int idx;
+    char str[128];
+
+    for (idx = 0; idx < size; idx++) {
+        if ((idx & 0xf) == 0) {
+            sprintf(str, "%04x: ", idx);
+        }
+        sprintf(&str[strlen(str)], "%02x ", data[idx]);
+        if ((idx & 0xf) == 0xf) {
+            sprintf(&str[strlen(str)], "\n");
+            gprintk("%s", str);
+        }
+    }
+    if ((idx & 0xf) != 0) {
+        sprintf(&str[strlen(str)], "\n");
+        gprintk("%s", str);
+    }
+}
+
+/* onesync_dnx_jr2_parse_rxpkt_system_header : This function parses DNX system headers based
+ * on JR2 system headers format
+ */
+void bksync_dnxjr2_parse_rxpkt_system_header(uint8_t *raw_pkt_frame,  bksync_dnx_rx_pkt_parse_info_t *rx_pkt_parse_info, int isfirsthdr)
+{
+    bksync_dnxjr2_ftmh_base_header_t  *ftmh_base_hdr = NULL;
+    bksync_dnxjr2_timestamp_header_t  *timestamp_hdr = NULL;
+    bksync_dnxjr2_udh_base_header_t   *udh_base_header = NULL;
+    bksync_dnxjr2_ftmh_app_spec_ext_1588v2_t *ftmp_app_spec_ext_1588v2_hdr = NULL;
+    bksync_dnxjr2_pph_fheiext_vlanedit_3b_header_t *fheiext_vlanedit_3b_hdr = NULL;
+    bksync_dnxjr2_pph_fheiext_vlanedit_5b_header_t *fheiext_vlanedit_5b_hdr = NULL;
+    bksync_dnxjr2_pph_base_12b_header_t *pph_base_12b_hdr = NULL;
+    uint8_t     raw_frame[64];
+    int tmp = 0;
+
+
+    rx_pkt_parse_info->rx_frame_len = 0;
+    rx_pkt_parse_info->dnx_header_offset = 0;
+    rx_pkt_parse_info->pph_header_vlan = 0;
+    rx_pkt_parse_info->rx_hw_timestamp = 0;
+    rx_pkt_parse_info->src_sys_port = 0;
+
+    for (tmp = 0; tmp < 64; tmp++) {
+        raw_frame[tmp] = raw_pkt_frame[tmp];
+    }
+
+    /* FTMH */
+    ftmh_base_hdr = (bksync_dnxjr2_ftmh_base_header_t *)(&raw_frame[rx_pkt_parse_info->dnx_header_offset]);
+    ftmh_base_hdr->words[0] = ntohl(ftmh_base_hdr->words[0]);
+    ftmh_base_hdr->words[1] = ntohl(ftmh_base_hdr->words[1]);
+
+    rx_pkt_parse_info->src_sys_port = (uint16_t)(ftmh_base_hdr->src_sys_port_aggr_0 << 9 | ftmh_base_hdr->src_sys_port_aggr_1 << 1 | ftmh_base_hdr->src_sys_port_aggr_2);
+    rx_pkt_parse_info->rx_frame_len = (uint16_t)(ftmh_base_hdr->packet_size_0 << 6 | ftmh_base_hdr->packet_size_1);
+
+    rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_FTMH_HDR_LEN;
+
+    /* FTMH LB-Key Extension */
+    if ((ptp_priv->bksync_jr2devs_sys_info).ftmh_lb_key_ext_size > 0) {
+        rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).ftmh_lb_key_ext_size;
+    }
+
+    /* FTMH Stacking Extension */
+    if ((ptp_priv->bksync_jr2devs_sys_info).ftmh_stacking_ext_size > 0) {
+        rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).ftmh_stacking_ext_size;
+    }
+
+    /* FTMH BIER BFR Extension */
+    if (ftmh_base_hdr->bier_bfr_ext_size > 0) {
+        rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_FTMH_BEIR_BFR_EXT_LEN;
+
+    }
+
+    /* FTMH TM Destination Extension */
+    if (ftmh_base_hdr->tm_dest_ext_repsent > 0) {
+        rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_FTMH_TM_DEST_EXT_LEN;
+
+    }
+
+    /* FTMH Application Specific Extension */
+    if (ftmh_base_hdr->app_specific_ext_size > 0) {
+        ftmp_app_spec_ext_1588v2_hdr = (bksync_dnxjr2_ftmh_app_spec_ext_1588v2_t*)(&raw_frame[rx_pkt_parse_info->dnx_header_offset]);
+        ftmp_app_spec_ext_1588v2_hdr->word = ntohl(ftmp_app_spec_ext_1588v2_hdr->word);
+
+        if (ftmp_app_spec_ext_1588v2_hdr->type == bksync_dnxjr2_ftmh_app_spec_ext_type_1588v2) {
+        }
+
+        rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_FTMH_APP_SPECIFIC_EXT_LEN;
+
+    }
+
+    /* FTMH Latency-Flow-ID Extension */
+    if (ftmh_base_hdr->flow_id_ext_size > 0) {
+        rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_FTMH_FLOWID_EXT_LEN ;
+
+    }
+
+    /* Time-stamp Header */
+    if ((ftmh_base_hdr->pph_type == BKSYNC_DNXJR2_PPH_TYPE_TSH_ONLY) ||
+        (ftmh_base_hdr->pph_type == BKSYNC_DNXJR2_PPH_TYPE_PPH_BASE_TSH) ) {
+
+        timestamp_hdr = (bksync_dnxjr2_timestamp_header_t* )(&raw_frame[rx_pkt_parse_info->dnx_header_offset]);
+        timestamp_hdr->word = ntohl(timestamp_hdr->word);
+
+        rx_pkt_parse_info->rx_hw_timestamp = timestamp_hdr->timestamp;
+        rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_TSH_HDR_SIZE;
+
+    }
+
+    /* PPH - internal header */
+    if ((ftmh_base_hdr->pph_type == BKSYNC_DNXJR2_PPH_TYPE_PPH_BASE) ||
+        (ftmh_base_hdr->pph_type == BKSYNC_DNXJR2_PPH_TYPE_PPH_BASE_TSH)) {
+
+        pph_base_12b_hdr = (bksync_dnxjr2_pph_base_12b_header_t*)(&raw_frame[rx_pkt_parse_info->dnx_header_offset]);
+
+        pph_base_12b_hdr->word[0] = ntohl(pph_base_12b_hdr->word[0]);
+        pph_base_12b_hdr->word[1] = ntohl(pph_base_12b_hdr->word[1]);
+        pph_base_12b_hdr->word[2] = ntohl(pph_base_12b_hdr->word[2]);
+
+        rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).pph_base_size;
+
+
+        /* PPH fhei_size handling */
+        if (pph_base_12b_hdr->fhei_size > BKSYNC_DNXJR2_PPH_FHEI_TYPE_NONE) {
+
+            switch(pph_base_12b_hdr->fhei_size) {
+                case BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ0: /* 3byte */
+                    fheiext_vlanedit_3b_hdr = (bksync_dnxjr2_pph_fheiext_vlanedit_3b_header_t*)(&raw_frame[rx_pkt_parse_info->dnx_header_offset]);
+
+                    if(fheiext_vlanedit_3b_hdr->type == bksync_dnxjr2_pph_fheiext_type_vlanedit) {
+                        rx_pkt_parse_info->pph_header_vlan = fheiext_vlanedit_3b_hdr->edit_vid1_0 << 7 | fheiext_vlanedit_3b_hdr->edit_vid1_1;
+                    }
+                    rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_PPH_FHEI_SZ0_SIZE;
+                    break;
+                case BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ1: /* 5byte */
+                    fheiext_vlanedit_5b_hdr = (bksync_dnxjr2_pph_fheiext_vlanedit_5b_header_t*)(&raw_frame[rx_pkt_parse_info->dnx_header_offset]);
+
+                    if (fheiext_vlanedit_5b_hdr->type == bksync_dnxjr2_pph_fheiext_type_vlanedit) {
+                        rx_pkt_parse_info->pph_header_vlan = fheiext_vlanedit_5b_hdr->edit_vid1_0 << 7 | fheiext_vlanedit_5b_hdr->edit_vid1_1;
+                    } else if (fheiext_vlanedit_5b_hdr->type == bksync_dnxjr2_pph_fheiext_type_trap_snoop_mirror) {
+                    }
+                    rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_PPH_FHEI_SZ1_SIZE;
+                    break;
+                case BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ2: /* 8byte */
+                    rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_PPH_FHEI_SZ2_SIZE;
+                    break;
+                default:
+                    break;
+            }
+        }
+
+        /* PPH LIF Extension */
+        if ((pph_base_12b_hdr->lif_ext_type > 0) && (pph_base_12b_hdr->lif_ext_type < BKSYNC_DNXJER2_PPH_LIF_EXT_TYPE_MAX)) {
+            rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).pph_lif_ext_size[pph_base_12b_hdr->lif_ext_type];
+        }
+
+        /* PPH Learn Extension */
+        if (pph_base_12b_hdr->learn_ext_present) {
+            rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_PPH_LEARN_EXT_SIZE;
+        }
+    }
+
+    /* UDH header */
+    if (!isfirsthdr) {
+    if ((ptp_priv->bksync_jr2devs_sys_info).udh_enable) {
+        udh_base_header = (bksync_dnxjr2_udh_base_header_t* )(&raw_frame[rx_pkt_parse_info->dnx_header_offset]);
+
+        rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_UDH_BASE_HEADER_LEN;
+        /* Need to understand more */
+        rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).udh_data_lenght_per_type[udh_base_header->udh_data_type_0];
+        rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).udh_data_lenght_per_type[udh_base_header->udh_data_type_1];
+        rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).udh_data_lenght_per_type[udh_base_header->udh_data_type_2];
+        rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).udh_data_lenght_per_type[udh_base_header->udh_data_type_3];
+    }
+    }
+
+    DBG_RX(("DNX PKT PARSE: src_sys_port %u rx_hw_timestamp %llx pph_header_vlan %llx dnx_header_offset %u rx_frame_len %d\n",
+            rx_pkt_parse_info->src_sys_port, rx_pkt_parse_info->rx_hw_timestamp, rx_pkt_parse_info->pph_header_vlan, 
+            rx_pkt_parse_info->dnx_header_offset, rx_pkt_parse_info->rx_frame_len));
+
+}
+
+
+static inline int
+bksync_pkt_custom_encap_ptprx_get(uint8_t *pkt, uint64_t *ing_ptptime)
+{
+    uint8_t  *custom_hdr;
+    uint8_t   id[4];
+    uint8_t   ver, opc;
+    uint8_t   nh_type, nh_rsvd;
+    uint16_t  len, tot_len;
+    uint16_t  nh_len;
+    uint32_t  seq_id = 0;
+    uint32_t  ptp_rx_time[2];
+    uint64_t  u64_ptp_rx_time = 0;
+
+    custom_hdr = pkt;
+
+    BKSYNC_UNPACK_U8(custom_hdr, id[0]);
+    BKSYNC_UNPACK_U8(custom_hdr, id[1]);
+    BKSYNC_UNPACK_U8(custom_hdr, id[2]);
+    BKSYNC_UNPACK_U8(custom_hdr, id[3]);
+    if (!((id[0] == 'B') && (id[1] == 'C') && (id[2] == 'M') && (id[3] == 'C'))) {
+        /* invalid signature */
+        return -1;
+    }
+
+    BKSYNC_UNPACK_U8(custom_hdr, ver);
+    switch (ver) {
+        case bxconCustomEncapVersionCurrent:
+            break;
+        default:
+            DBG_ERR(("custom_encap_ptprx_get: Invalid ver\n"));
+            return -1;
+    }
+
+    BKSYNC_UNPACK_U8(custom_hdr, opc);
+    switch (opc) {
+        case bxconCustomEncapOpcodePtpRx:
+            break;
+        default:
+            DBG_ERR(("custom_encap_ptprx_get: Invalid opcode\n"));
+            return -1;
+    }
+
+
+    BKSYNC_UNPACK_U16(custom_hdr, len);
+    BKSYNC_UNPACK_U32(custom_hdr, seq_id);
+    tot_len = len;
+
+    /* remaining length of custom encap */
+    len = len - (custom_hdr - pkt);
+
+
+    /* process tlv */
+    while (len > 0) {
+        BKSYNC_UNPACK_U8(custom_hdr, nh_type);
+        BKSYNC_UNPACK_U8(custom_hdr, nh_rsvd);
+        BKSYNC_UNPACK_U16(custom_hdr, nh_len);
+        len = len - (nh_len);
+        if (nh_rsvd != 0x0) {
+            continue; /* invalid tlv */
+        }
+
+        switch (nh_type) {
+            case bxconCustomEncapPtpRxTlvPtpRxTime:
+                BKSYNC_UNPACK_U32(custom_hdr, ptp_rx_time[0]);
+                BKSYNC_UNPACK_U32(custom_hdr, ptp_rx_time[1]);
+                u64_ptp_rx_time = ((uint64_t)ptp_rx_time[1] << 32) | (uint64_t)ptp_rx_time[0];
+                *ing_ptptime = u64_ptp_rx_time;
+                break;
+            default:
+                custom_hdr += nh_len;
+                break;
+        }
+    }
+
+    DBG_RX_DUMP(("custom_encap_ptprx_get: Custom Encap header:\n"));
+    if (debug & DBG_LVL_RX_DUMP) dbg_dump_pkt(pkt, tot_len);
+
+    DBG_RX(("custom_encap_ptprx_get: ver=%d opcode=%d tot_len=%d seq_id=0x%x\n", ver, opc, tot_len, seq_id));
+
+    return (tot_len);
+}
+
+/**
+ * bksync_ptp_hw_tstamp_rx_pre_process
+ *
+ * @dev_no: device number
+ *
+ * Description:
+ */
+int bksync_ptp_hw_tstamp_rx_pre_process(int dev_no, uint8_t *pkt, uint32_t sspa, int *pkt_offset)
+{
+    int ret = -1;
+    uint64_t ts;
+    int custom_encap_len = 0;
+
+    bksync_dnx_rx_pkt_parse_info_t rx_pkt_parse_info_1 =  {0}, rx_pkt_parse_info_2 = {0};
+
+    if (sspa == (ptp_priv->bksync_init_info).uc_port_num  && pkt_offset == NULL) {
+        ret = 0;
+    }
+
+
+    if (DEVICE_IS_DNX && pkt_offset == NULL) {
+        bksync_dnxjr2_parse_rxpkt_system_header(pkt,  &rx_pkt_parse_info_1, 1);
+        bksync_dnxjr2_parse_rxpkt_system_header(pkt + rx_pkt_parse_info_1.dnx_header_offset,  &rx_pkt_parse_info_2, 0);
+    }
+
+
+    /* parse custom encap header in pkt for ptp rxtime */
+    if (DEVICE_IS_DNX) {
+        custom_encap_len = bksync_pkt_custom_encap_ptprx_get(pkt + rx_pkt_parse_info_1.dnx_header_offset
+                + rx_pkt_parse_info_2.dnx_header_offset, &ts);
+    } else {
+        custom_encap_len = bksync_pkt_custom_encap_ptprx_get(pkt, &ts);
+    }
+    DBG_RX(("hw_tstamp_rx_pre_process: sspa:0x%x cust_encap_len=0x%x\n", sspa, custom_encap_len));
+
+    if ((pkt_offset) && (custom_encap_len >= 0)) {
+        *pkt_offset = custom_encap_len;
+        ret = 0;
+    }
+
+    return ret;
+}
+
+
+
+/**
+ * bksync_ptp_hw_tstamp_rx_time_upscale
+ *
+ * @dev_no: device number
+ * @ts: timestamp to be retrieved
+ *
+ * Description: this is a callback function to retrieve 64b equivalent of
+ *   rx timestamp
+ */
+int bksync_ptp_hw_tstamp_rx_time_upscale(int dev_no, int port, struct sk_buff *skb, uint32_t *meta, uint64_t *ts)
+{
+    int ret = 0;
+    int custom_encap_len = 0;
+    uint16_t tpid = 0;
+    uint16_t msgtype_offset = 0;
+    int transport = network_transport;
+    int ptp_hdr_offset = 0, ptp_message_len = 0;
+
+    if (!module_initialized || !ptp_priv || (ptp_priv->shared_addr == NULL)) {
+        return -1;
+    }
+
+    DBG_RX_DUMP(("rxtime_upscale: Incoming packet: \n"));
+    if (debug & DBG_LVL_RX_DUMP) dbg_dump_pkt(skb->data, skb->len);
+
+    switch (KNET_SKB_CB(skb)->dcb_type) {
+        case 28: /* dpp */
+        case 39: /* DNX - Q2A, J2C */
+            break;
+        case 26:
+        case 32:
+        case 35:
+        case 37:
+            if (pci_cos != (meta[4] & 0x3F)) {
+                return -1;
+            }
+            break;
+        case 38:
+            if (pci_cos != ((meta[12] >> 22) & 0x2F)) {
+                return -1;
+            }
+            break;
+        case 36:
+            if (pci_cos != ((meta[6] >> 22) & 0x2F)) {
+                return -1;
+            }
+            break;
+        default:
+            DBG_ERR(("rxtime_upscale: Invalid dcb type\n"));
+            return -1;
+    }
+
+    /* parse custom encap header in pkt for ptp rxtime */
+    custom_encap_len = bksync_pkt_custom_encap_ptprx_get((skb->data), ts);
+
+    /* Remove the custom encap header from pkt */
+    if (custom_encap_len > 0) {
+
+        skb_pull(skb, custom_encap_len);
+
+        DBG_RX_DUMP(("rxtime_upscale: After removing custom encap: \n"));
+        if (debug & DBG_LVL_RX_DUMP) dbg_dump_pkt(skb->data, skb->len);
+
+        msgtype_offset = ptp_hdr_offset = 0;
+        tpid = SKB_U16_GET(skb, (12));
+        if (tpid == 0x8100) {
+            msgtype_offset += 4;
+            ptp_hdr_offset += 4;
+        }
+
+        /* Parse for nw transport */
+        transport = bksync_ptp_transport_get(skb->data);
+
+        switch(transport)
+        {
+            case 2: /* IEEE 802.3 */
+                ptp_hdr_offset += 14;
+                break;
+            case 4: /* UDP IPv4   */
+                ptp_hdr_offset += 42;
+                break;
+            case 6: /* UDP IPv6   */
+                ptp_hdr_offset += 62;
+                break;
+            default:
+                ptp_hdr_offset += 42;
+                break;
+        }
+
+        ptp_message_len = SKB_U16_GET(skb, (ptp_hdr_offset + 2));
+
+        DBG_RX(("rxtime_upscale: custom_encap_len %d tpid 0x%x transport %d skb->len %d ptp message type %d, ptp_message_len %d\n",
+                custom_encap_len, tpid, transport, skb->len, skb->data[msgtype_offset] & 0x0F, ptp_message_len));
+
+        /* Remove padding ,CRC from from L2 packet from returning to Linux Stack */
+        if (DEVICE_IS_DNX && (transport == 2) ) {
+            skb_trim(skb, ptp_hdr_offset + ptp_message_len);
+        }
+    }
+
+    if ((port > 0) && (port < BCMKSYNC_MAX_NUM_PORTS)) {
+        port -= 1;
+        ptp_priv->port_stats[port].pkt_rxctr += 1;
+    }
+
+    return ret;
+}
+
+
+void bksync_hton64(u8 *buf, const uint64_t *data)
+{
+#ifdef __LITTLE_ENDIAN
+  /* LITTLE ENDIAN */
+  buf[0] = (*(((uint8_t*)(data)) + 7u));
+  buf[1] = (*(((uint8_t*)(data)) + 6u));
+  buf[2] = (*(((uint8_t*)(data)) + 5u));
+  buf[3] = (*(((uint8_t*)(data)) + 4u));
+  buf[4] = (*(((uint8_t*)(data)) + 3u));
+  buf[5] = (*(((uint8_t*)(data)) + 2u));
+  buf[6] = (*(((uint8_t*)(data)) + 1u));
+  buf[7] = (*(((uint8_t*)(data)) + 0u));
+#else
+  memcpy(buf, data, 8);
+#endif
+}
+
+static void
+bksync_dpp_otsh_update(struct sk_buff *skb, int hwts, int encap_type, int ptp_hdr_offset)
+{
+
+    /*
+     * Type                 [47:46] type of OAM-TS extension.
+     *     0x0: OAM
+     *     0x1: 1588v2
+     *     0x2: Latency-measurement
+     *     0x3: Reserved
+     *
+     * TP-Command           [45:43] 1588v2 command
+     *     0x0: None
+     *     0x1: Stamp
+     *     0x2: Record (2 step, record Tx-TS in a FIFO)
+     *     0x3-0x7: Reserved
+     *
+     * TS-Encapsulation     [42]    1588v2 Encapsulation
+     *     0x0: UDP
+     *     0x1: Non UDP
+     *
+     * OAM-TS-Data          [33:32] OAM-TS-Data
+     *     0x1: In-PP-Port.External-BRCM-MAC
+     *
+     * OAM-TS-Data          [31:0]
+     *      Transparent or trapped 1588 events
+     *
+     * Rx-Time-Stamp
+     *      Injected 1588v2 event from ARM/CPU: 0x0
+     *
+     * Offset   [7:0]   ptp_hdr_offset
+     *      Offset from end of System Headers to the start of the 1588v2 frame
+     *
+     */
+
+    /* PPH_TYPE = OAM-TS */
+    skb->data[2] |= 0x80;
+
+    /* OTSH.type = 1588v2 */
+    skb->data[6] = 0x40;
+
+    /* OTSH.tp_command = 1-step */
+    switch (hwts) {
+        case HWTSTAMP_TX_ONESTEP_SYNC:
+            skb->data[6] |= ((0x1) << 3);
+            break;
+        default:
+            skb->data[6] |= ((0x2) << 3);
+            break;
+    }
+
+    /* OTSH.encap_type = udp vs non-udp */
+    skb->data[6] |= (((encap_type == 2) ? 1 : 0) << 2);
+
+    /* In-PP-Port.External-BRCM-MAC = 1 */
+    skb->data[6] |= (0x1 << 0);
+
+    /* Timestamp: 0x0 */
+    skb->data[7] = skb->data[8] = skb->data[9] = skb->data[10] = 0x0;
+
+    skb->data[11] = ptp_hdr_offset;
+
+    return;
+}
+/* IPv6 WAR to avoid H/W limitation of JR2x series devices */
+static void
+bksync_dnx_ase1588_tsh_hdr_update_ipv6(struct sk_buff *skb, int hwts, int encap_type, int ptp_hdr_offset)
+{
+    /* Module Hdr [16] + PTCH [2] + ITMH [5] + ASE1588 [6] + TSH [4] + Internal Hdr [12] + UDH base [1] */
+
+    ptp_hdr_offset = 0x1d;
+    switch(encap_type)
+    {
+        case 2: /* IEEE 802.3 */
+            ptp_hdr_offset += 18;
+            break;
+        case 4: /* UDP IPv4   */
+            ptp_hdr_offset += 46;
+            break;
+        case 6: /* UDP IPv6   */
+            ptp_hdr_offset += 0x42;
+            break;
+        default:
+            ptp_hdr_offset += 46;
+            break;
+    }
+
+
+    /* ITMH */
+    /* App Specific Ext Present  ASE 1588*/
+    skb->data [18] |= (0x1 << 3);
+
+    /* PPH_TYPE - TSH  +  Internal Hdr */
+    skb->data [18] |= (0x3 << 1);   /* TSH + PPH Only */
+
+    /* ASE 1588 ext */
+    skb->data [23] = skb->data [24] = skb->data [25] = skb->data [26] = 0x00;
+
+    skb->data[27] = skb->data[28] = 0;
+
+    /* OTSH.encap_type = udp vs non-udp  - 1bit (15:15) */
+    /* encap type - 2 L2, 4 & 6 UDP */
+    skb->data[27] |= (((encap_type == 2) ? 1 : 0) << 7);
+
+    /* ASE1588 1588v2 command -  one step or two step  3bit (14:12) */
+    /* ASE1588 1588v2 command should be zero for CF update */
+
+    /*  offset to start of 1588v2 frame  - 8 bit (11:4) */
+    skb->data [27] = skb->data [27] | ((ptp_hdr_offset) & 0xf0) >> 4;
+    skb->data [28] = ((ptp_hdr_offset) & 0xf) << 4;
+
+    /* ASE1588 type = 1588v2  - 4 bit (0:3) */
+    skb->data [28] = skb->data [28] | 0x01;
+
+    skb->data [29] = skb->data [30] = skb->data [31] = skb->data [32] = 0x00;
+
+    /* Internal Header */
+    skb->data [33] = skb->data [34] = skb->data [35] = skb->data [36] = 0x00;
+    skb->data [37] = skb->data [38] = skb->data [39] = skb->data [40] = 0x00;
+    skb->data [41] = skb->data [42] = skb->data [43] = skb->data [44] = 0x00;
+
+    skb->data [44] = 0x42;
+    skb->data [43] = 0x07;
+    skb->data [42] = 0x10;
+
+    /* UDH Base Hdr */
+    skb->data [45] = 0;
+
+    return;
+}
+
+static void
+bksync_dnx_ase1588_tsh_hdr_update(struct sk_buff *skb, int hwts, int encap_type, int ptp_hdr_offset)
+{
+    /* Module Hdr [16] + PTCH [2] + ITMH [5] + ASE1588 [6] + TSH [4] */
+
+    /* ITMH */
+    /* App Specific Ext Present */
+    skb->data [18] |= (1 << 3);
+
+    /* PPH_TYPE - TSH */
+    skb->data [18] |= (0x2 << 1);
+
+    /* ASE 1588 ext */
+    skb->data [23] = skb->data [24] = skb->data [25] = skb->data [26] = 0x00;
+
+    skb->data[27] = skb->data[28] = 0;
+
+    /* OTSH.encap_type = udp vs non-udp  - 1bit (15:15) */
+    /* encap type - 2 L2, 4 & 6 UDP */
+    skb->data[27] |= (((encap_type == 2) ? 1 : 0) << 7);
+
+    /* ASE1588 1588v2 command -  one step or two step  3bit (14:12) */
+    switch (hwts) {
+        case HWTSTAMP_TX_ONESTEP_SYNC:
+            skb->data[27] |= ((0x1) << 4);
+            break;
+        default:
+            skb->data[27] |= ((0x2) << 4);
+            break;
+    }
+
+    /*  offset to start of 1588v2 frame  - 8 bit (11:4) */
+    skb->data [27] = skb->data [27] | ((ptp_hdr_offset) & 0xf0) >> 4;
+    skb->data [28] = ((ptp_hdr_offset) & 0xf) << 4;
+
+    /* ASE1588 type = 1588v2  - 4 bit (0:3) */
+    skb->data [28] = skb->data [28] | 0x01;
+
+    /* TSH Timestamp: 0x0 */
+    skb->data [29] = skb->data [30] = skb->data [31] = skb->data [32] = 0x00;
+
+    return;
+}
+
+
+
+int bksync_ptp_hw_tstamp_tx_meta_get(int dev_no,
+                                     int hwts, int hdrlen,
+                                     struct sk_buff *skb,
+                                     uint64_t *tstamp,
+                                     u32 **md)
+{
+    uint16_t tpid = 0, ethertype;
+    int md_offset = 0;
+    int pkt_offset = 0;
+    int ptp_hdr_offset = 0;
+    int transport = network_transport;
+    s64 ptptime  = 0;
+    s64 ptpcounter = 0;
+    int64_t corrField;
+    int32_t negCurTS32;
+    int64_t negCurTS64;
+
+    if (!module_initialized || !ptp_priv || (ptp_priv->shared_addr == NULL)) {
+        return 0;
+    }
+
+
+    if (ptp_priv->ptp_pair_lock == 1) {
+        /* use alternate pair when main dataset is being updated */
+        ptptime = ptp_priv->shared_addr->ptptime_alt;
+        ptpcounter = ptp_priv->shared_addr->reftime_alt;
+    } else {
+        ptptime = ptp_priv->shared_addr->ptptime;
+        ptpcounter = ptp_priv->shared_addr->reftime;
+    }
+
+    negCurTS32 = - (int32_t) ptpcounter;
+    negCurTS64 = - (int64_t)(ptpcounter);
+
+    if (CMICX_DEV_TYPE || DEVICE_IS_DPP) {
+        pkt_offset = ptp_hdr_offset = hdrlen;
+    }
+
+    /* Need to check VLAN tag if packet is tagged */
+    tpid = SKB_U16_GET(skb, (pkt_offset + 12));
+    if (tpid == 0x8100) {
+        md_offset = 4;
+        ptp_hdr_offset += 4;
+
+        if (DEVICE_IS_DNX && vnptp_l2hdr_vlan_prio != 0) {
+            ethertype =  SKB_U16_GET(skb, hdrlen + 12 + 4);
+            if (ethertype == 0x88F7 || ethertype == 0x0800 || ethertype == 0x86DD) {
+                if (skb->data[hdrlen + 14] == 0x00) {
+                    skb->data[hdrlen + 14] |= (vnptp_l2hdr_vlan_prio << 5);
+                }
+            }
+        }
+    }
+
+    /* One Step Meta Data */
+    if (hwts == HWTSTAMP_TX_ONESTEP_SYNC) {
+        md_offset += 8;
+        switch (KNET_SKB_CB(skb)->dcb_type) {
+            case 26:
+                corrField = (((int64_t)negCurTS32) << 16);
+                if (negCurTS32 >= 0) {
+                    md_offset += 8;
+                }
+                break;
+            default:
+                corrField = (((int64_t)negCurTS64) << 16);
+                break;
+        }
+    }
+
+
+    /* Parse for nw transport */
+    if (transport == 0) {
+        transport = bksync_ptp_transport_get(skb->data + pkt_offset);
+    }
+
+    switch(transport)
+    {
+        case 2: /* IEEE 802.3 */
+            ptp_hdr_offset += 14;
+            if (KNET_SKB_CB(skb)->dcb_type == 32) {
+                if (md) *md = &sobmhrawpkts_dcb32[md_offset];
+            } else if(KNET_SKB_CB(skb)->dcb_type == 26) {
+                if (md) *md = &sobmhrawpkts_dcb26[md_offset];
+            } else if(KNET_SKB_CB(skb)->dcb_type == 35) {
+                if (md) *md = &sobmhrawpkts_dcb35[md_offset];
+            } else if(KNET_SKB_CB(skb)->dcb_type == 36) {
+                if (md) *md = &sobmhrawpkts_dcb36[md_offset];
+            } else if(KNET_SKB_CB(skb)->dcb_type == 38) {
+                if (md) *md = &sobmhrawpkts_dcb38[md_offset];
+            } else if(KNET_SKB_CB(skb)->dcb_type == 37) {
+                if (md) *md = &sobmhrawpkts_dcb37[md_offset];
+            }
+            break;
+        case 4: /* UDP IPv4   */
+            ptp_hdr_offset += 42;
+            if (KNET_SKB_CB(skb)->dcb_type == 32) {
+                if (md) *md = &sobmhudpipv4_dcb32[md_offset];
+            } else if(KNET_SKB_CB(skb)->dcb_type == 26) {
+                if (md) *md = &sobmhudpipv4_dcb26[md_offset];
+            } else if(KNET_SKB_CB(skb)->dcb_type == 35) {
+                if (md) *md = &sobmhudpipv4_dcb35[md_offset];
+            } else if(KNET_SKB_CB(skb)->dcb_type == 36) {
+                if (md) *md = &sobmhudpipv4_dcb36[md_offset];
+            } else if(KNET_SKB_CB(skb)->dcb_type == 38) {
+                if (md) *md = &sobmhudpipv4_dcb38[md_offset];
+            } else if(KNET_SKB_CB(skb)->dcb_type == 37) {
+                if (md) *md = &sobmhudpipv4_dcb37[md_offset];
+            }
+            break;
+        case 6: /* UDP IPv6   */
+            ptp_hdr_offset += 62;
+            if (KNET_SKB_CB(skb)->dcb_type == 32) {
+                if (md) *md = &sobmhudpipv6_dcb32[md_offset];
+            } else if(KNET_SKB_CB(skb)->dcb_type == 26) {
+                if (md) *md = &sobmhudpipv6_dcb26[md_offset];
+            } else if(KNET_SKB_CB(skb)->dcb_type == 35) {
+                if (md) *md = &sobmhudpipv6_dcb35[md_offset];
+            } else if(KNET_SKB_CB(skb)->dcb_type == 36) {
+                if (md) *md = &sobmhudpipv6_dcb36[md_offset];
+            } else if(KNET_SKB_CB(skb)->dcb_type == 38) {
+                if (md) *md = &sobmhudpipv6_dcb38[md_offset];
+            } else if(KNET_SKB_CB(skb)->dcb_type == 37) {
+                if (md) *md = &sobmhudpipv6_dcb37[md_offset];
+            }
+            break;
+        default:
+            ptp_hdr_offset += 42;
+            if (KNET_SKB_CB(skb)->dcb_type == 32) {
+                if (md) *md = &sobmhudpipv4_dcb32[md_offset];
+            } else if(KNET_SKB_CB(skb)->dcb_type == 26) {
+                if (md) *md = &sobmhudpipv4_dcb26[md_offset];
+            } else if(KNET_SKB_CB(skb)->dcb_type == 35) {
+                if (md) *md = &sobmhudpipv4_dcb35[md_offset];
+            } else if(KNET_SKB_CB(skb)->dcb_type == 36) {
+                if (md) *md = &sobmhudpipv4_dcb36[md_offset];
+            } else if(KNET_SKB_CB(skb)->dcb_type == 38) {
+                if (md) *md = &sobmhudpipv4_dcb38[md_offset];
+            } else if(KNET_SKB_CB(skb)->dcb_type == 37) {
+                if (md) *md = &sobmhudpipv4_dcb37[md_offset];
+            }
+            break;
+    }
+
+    if (DEVICE_IS_DPP && (hdrlen > (BKN_DNX_PTCH_2_SIZE))) {
+        DBG_TX_DUMP(("hw_tstamp_tx_meta_get: Before OTSH updates\n"));
+        if (debug & DBG_LVL_TX_DUMP) dbg_dump_pkt(skb->data, skb->len);
+
+        DBG_TX(("hw_tstamp_tx_meta_get: Before: ptch[0]: 0x%x ptch[1]: 0x%x itmh[0]: 0x%x "
+                  "oam-ts[0]: 0x%x pkt[0]:0x%x\n", skb->data[0], skb->data[1], skb->data[2],
+                  skb->data[6], skb->data[12]));
+
+        bksync_dpp_otsh_update(skb, hwts, transport, (ptp_hdr_offset - pkt_offset));
+
+        DBG_TX(("hw_tstamp_tx_meta_get: After : ptch[0]: 0x%x itmh[0]: 0x%x oam-ts[0]: 0x%x "
+                  "pkt[0]:0x%x\n", skb->data[0], skb->data[2], skb->data[6], skb->data[12]));
+
+        DBG_TX_DUMP(("hw_tstamp_tx_meta_get: After OTSH updates\n"));
+        if (debug & DBG_LVL_TX_DUMP) dbg_dump_pkt(skb->data, skb->len);
+    } else if (DEVICE_IS_DNX && (hdrlen > (BKN_DNX_PTCH_2_SIZE))) {
+
+        switch(transport)
+        {
+            case 6: /* UDP IPv6   */
+                bksync_dnx_ase1588_tsh_hdr_update_ipv6(skb, hwts, transport, (ptp_hdr_offset - pkt_offset));
+                break;
+            case 4: /* UDP IPv4   */
+            case 2: /* IEEE 802.3 */
+            default:
+                bksync_dnx_ase1588_tsh_hdr_update(skb, hwts, transport, (ptp_hdr_offset - pkt_offset));
+                break;
+        }
+    }
+
+    DBG_TX(("hw_tstamp_tx_meta_get: ptptime: 0x%llx ptpcounter: 0x%llx\n", ptptime, ptpcounter));
+
+    DBG_TX(("hw_tstamp_tx_meta_get: ptpmessage type: 0x%x hwts: %d\n", skb->data[ptp_hdr_offset] & 0x0f, hwts));
+
+
+    if ((hwts == HWTSTAMP_TX_ONESTEP_SYNC) &&
+        (BKSYNC_PTP_EVENT_MSG((skb->data[ptp_hdr_offset] & 0x0F)))) {
+        /* One Step Timestamp Field updation */
+        int port;
+        int corr_offset = ptp_hdr_offset + 8;
+        int origin_ts_offset = ptp_hdr_offset + 34;
+        u32 tmp;
+        struct timespec64 ts = {0};
+        int udp_csum_regen;
+        u32 udp_csum20;
+        u16 udp_csum;
+
+        udp_csum = SKB_U16_GET(skb, (ptp_hdr_offset - 2));
+
+        switch (transport) {
+            case 2:
+                udp_csum_regen = 0;
+                break;
+            case 6:
+                udp_csum_regen = 1;
+                break;
+            default:
+                udp_csum_regen = (udp_csum != 0x0);
+                break;
+        }
+
+        /* Fill the correction field */
+        bksync_hton64(&(skb->data[corr_offset]), (const u64 *)&corrField);
+
+        /* Fill the Origin Timestamp Field */
+        ts = ns_to_timespec64(ptptime);
+
+        tmp = (ts.tv_sec >> 32);
+        skb->data[origin_ts_offset + 0] = ((tmp >>  8) & 0xFF);
+        skb->data[origin_ts_offset + 1] = ((tmp      ) & 0xFF);
+
+        tmp = (ts.tv_sec & 0xFFFFFFFFLL);
+        skb->data[origin_ts_offset + 2] = ((tmp >> 24) & 0xFF);
+        skb->data[origin_ts_offset + 3] = ((tmp >> 16) & 0xFF);
+        skb->data[origin_ts_offset + 4] = ((tmp >>  8) & 0xFF);
+        skb->data[origin_ts_offset + 5] = ((tmp      ) & 0xFF);
+
+        tmp = (ts.tv_nsec & 0xFFFFFFFFLL);
+        skb->data[origin_ts_offset + 6] = ((tmp >> 24) & 0xFF);
+        skb->data[origin_ts_offset + 7] = ((tmp >> 16) & 0xFF);
+        skb->data[origin_ts_offset + 8] = ((tmp >>  8) & 0xFF);
+        skb->data[origin_ts_offset + 9] = ((tmp      ) & 0xFF);
+
+        if (udp_csum_regen) {
+            udp_csum20 = (~udp_csum) & 0xFFFF;
+
+            udp_csum20 += SKB_U16_GET(skb, (corr_offset + 0));
+            udp_csum20 += SKB_U16_GET(skb, (corr_offset + 2));
+            udp_csum20 += SKB_U16_GET(skb, (corr_offset + 4));
+            udp_csum20 += SKB_U16_GET(skb, (corr_offset + 6));
+
+            udp_csum20 += SKB_U16_GET(skb, (origin_ts_offset + 0));
+            udp_csum20 += SKB_U16_GET(skb, (origin_ts_offset + 2));
+            udp_csum20 += SKB_U16_GET(skb, (origin_ts_offset + 4));
+            udp_csum20 += SKB_U16_GET(skb, (origin_ts_offset + 6));
+            udp_csum20 += SKB_U16_GET(skb, (origin_ts_offset + 8));
+
+            /* Fold 20bit checksum into 16bit udp checksum */
+            udp_csum20 = ((udp_csum20 & 0xFFFF) + (udp_csum20 >> 16));
+            udp_csum = ((udp_csum20 & 0xFFFF) + (udp_csum20 >> 16));
+
+            /* invert again to get final checksum. */
+            udp_csum = ~udp_csum;
+            if (udp_csum == 0) {
+                udp_csum = 0xFFFF;
+            }
+
+            skb->data[ptp_hdr_offset - 2] = ((udp_csum >>  8) & 0xFF);
+            skb->data[ptp_hdr_offset - 1] = ((udp_csum      ) & 0xFF);
+        }
+
+        if ((skb->data[ptp_hdr_offset] & 0x0F) == IEEE1588_MSGTYPE_DELREQ) {
+            *tstamp = ptptime;
+        }
+
+        DBG_TX(("hw_tstamp_tx_meta_get: ptp msg type %d packet tstamp : 0x%llx corrField: 0x%llx\n",
+                 (skb->data[ptp_hdr_offset] & 0x0F), ptptime, corrField));
+
+        port = KNET_SKB_CB(skb)->port;
+        if ((port > 0) && (port < BCMKSYNC_MAX_NUM_PORTS)) {
+            port -= 1;
+            ptp_priv->port_stats[port].pkt_txonestep += 1;
+        }
+    }
+
+    DBG_TX_DUMP(("hw_tstamp_tx_meta_get: PTP Packet\n"));
+    if (debug & DBG_LVL_TX_DUMP) dbg_dump_pkt(skb->data, skb->len);
+
+    return 0;
+}
+
+
+int bksync_ptp_hw_tstamp_ptp_clock_index_get(int dev_no)
+{
+    int phc_index = -1;
+
+    if (!module_initialized || !ptp_priv) {
+        return phc_index;
+    }
+
+    if (ptp_priv && ptp_priv->ptp_clock)
+        phc_index =  ptp_clock_index(ptp_priv->ptp_clock);
+
+    return phc_index;
+}
+
+
+/**
+* bcm_ptp_time_keep - call timecounter_read every second to avoid timer overrun
+*                 because  a 32bit counter, will timeout in 4s
+*/
+static void bksync_ptp_time_keep(struct work_struct *work)
+{
+    struct delayed_work *dwork = to_delayed_work(work);
+    struct bksync_ptp_priv *priv =
+                        container_of(dwork, struct bksync_ptp_priv, time_keep);
+    struct timespec64 ts;
+
+    /* Call bcm_ptp_gettime function to keep the ref_time_64 and ref_counter_48 in sync */
+    bksync_ptp_gettime(&(priv->ptp_caps), &ts);
+    schedule_delayed_work(&priv->time_keep, __msecs_to_jiffies(phc_update_intv_msec));
+}
+
+static void bksync_ptp_time_keep_init(void)
+{
+    if (!ptp_priv->timekeep_status) {
+        INIT_DELAYED_WORK(&(ptp_priv->time_keep), bksync_ptp_time_keep);
+        schedule_delayed_work(&ptp_priv->time_keep, __msecs_to_jiffies(phc_update_intv_msec));
+
+        ptp_priv->timekeep_status = 1;
+    }
+
+    return;
+}
+
+static void bksync_ptp_time_keep_deinit(void)
+{
+    if (ptp_priv->timekeep_status) {
+        /* Cancel delayed work */
+        cancel_delayed_work_sync(&(ptp_priv->time_keep));
+
+        ptp_priv->timekeep_status = 0;
+    }
+
+    return;
+}
+
+/* PTP_EXTTS logging */
+static void bksync_ptp_extts_logging(struct work_struct *work)
+{
+    struct delayed_work *dwork = to_delayed_work(work);
+    struct bksync_ptp_priv *priv = container_of(dwork, struct bksync_ptp_priv, extts_logging);
+    struct ptp_clock_event event;
+    int event_id = -1;
+    int head = -1, tail = -1;
+
+    if (!module_initialized || ptp_priv->extts_log == NULL)
+        goto exit;
+
+    DBG_VERB(("Queue overflow state:%u\n", ptp_priv->extts_log->overflow));
+
+    tail = (int)ptp_priv->extts_log->tail;
+    head = ptp_priv->extts_event.head;
+
+    head = (head + 1) % NUM_EVENT_TS;
+    while (tail != head) {
+        switch (ptp_priv->extts_log->event_ts[head].ts_event_id) {
+            /* Map FW event_id to EXTTS event_id */
+            case TS_EVENT_GPIO_1:
+                event_id = 0;
+                break;
+            case TS_EVENT_GPIO_2:
+                event_id = 1;
+                break;
+            case TS_EVENT_GPIO_3:
+                event_id = 2;
+                break;
+            case TS_EVENT_GPIO_4:
+                event_id = 3;
+                break;
+            case TS_EVENT_GPIO_5:
+                event_id = 4;
+                break;
+            case TS_EVENT_GPIO_6:
+                event_id = 5;
+                break;
+        }
+
+        if (event_id < 0 || ptp_priv->extts_event.enable[event_id] != 1) {
+            memset((void *)&(ptp_priv->extts_log->event_ts[head]), 0, sizeof(ptp_priv->extts_log->event_ts[head]));
+
+            ptp_priv->extts_event.head = head;
+            ptp_priv->extts_log->head = head;
+
+            head = (head + 1) % NUM_EVENT_TS;
+            continue;
+        }
+
+        event.type = PTP_CLOCK_EXTTS;
+        event.index = event_id;
+        event.timestamp = ((s64)ptp_priv->extts_log->event_ts[head].tstamp.sec * 1000000000) + ptp_priv->extts_log->event_ts[head].tstamp.nsec;
+        ptp_clock_event(ptp_priv->ptp_clock, &event);
+
+        ptp_priv->extts_event.head = head;
+        ptp_priv->extts_log->head = head;
+
+        head = (head + 1) % NUM_EVENT_TS;
+    }
+exit:
+    schedule_delayed_work(&priv->extts_logging, __msecs_to_jiffies(100));
+}
+
+static void bksync_ptp_extts_logging_init(void)
+{
+    INIT_DELAYED_WORK(&(ptp_priv->extts_logging), bksync_ptp_extts_logging);
+    schedule_delayed_work(&ptp_priv->extts_logging, __msecs_to_jiffies(100));
+}
+
+static void bksync_ptp_extts_logging_deinit(void)
+{
+    cancel_delayed_work_sync(&(ptp_priv->extts_logging));
+}
+
+static int bksync_ptp_init(struct ptp_clock_info *ptp)
+{
+    int ret = -1;
+    u64 subcmd, subcmd_data;
+
+    ret = bksync_cmd_go(BKSYNC_INIT, NULL, NULL);
+    DBG_VERB(("bksync_ptp_init: BKSYNC_INIT; rv:%d\n", ret));
+    if (ret < 0) goto err_exit;
+    ptp_sleep(1);
+
+    if (!DEVICE_IS_DPP && !DEVICE_IS_DNX) {
+        return 0;
+    }
+
+    subcmd = KSYNC_SYSINFO_UC_PORT_NUM;
+    subcmd_data = (ptp_priv->bksync_init_info).uc_port_num;
+    ret = bksync_cmd_go(BKSYNC_SYSINFO, &subcmd, &subcmd_data);
+    DBG_VERB(("bksync_ptp_init: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret));
+    if (ret < 0) goto err_exit;
+
+    subcmd = KSYNC_SYSINFO_UC_PORT_SYSPORT;
+    subcmd_data = (ptp_priv->bksync_init_info).uc_port_sysport;
+    ret = bksync_cmd_go(BKSYNC_SYSINFO, &subcmd, &subcmd_data);
+    DBG_VERB(("bksync_ptp_init: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret));
+    if (ret < 0) goto err_exit;
+
+    subcmd = KSYNC_SYSINFO_HOST_CPU_PORT;
+    subcmd_data = (ptp_priv->bksync_init_info).host_cpu_port;
+    ret = bksync_cmd_go(BKSYNC_SYSINFO, &subcmd, &subcmd_data);
+    DBG_VERB(("bksync_ptp_init: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret));
+    if (ret < 0) goto err_exit;
+
+    subcmd = KSYNC_SYSINFO_HOST_CPU_SYSPORT;
+    subcmd_data = (ptp_priv->bksync_init_info).host_cpu_sysport;
+    ret = bksync_cmd_go(BKSYNC_SYSINFO, &subcmd, &subcmd_data);
+    DBG_VERB(("bksync_ptp_init: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret));
+    if (ret < 0) goto err_exit;
+
+    subcmd = KSYNC_SYSINFO_UDH_LEN;
+    subcmd_data = (ptp_priv->bksync_init_info).udh_len;
+    ret = bksync_cmd_go(BKSYNC_SYSINFO, &subcmd, &subcmd_data);
+    DBG_VERB(("bksync_ptp_init: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret));
+    if (ret < 0) goto err_exit;
+
+
+err_exit:
+    return ret;
+}
+
+static int bksync_ptp_deinit(struct ptp_clock_info *ptp)
+{
+    int ret = -1;
+
+    bksync_ptp_time_keep_deinit();
+
+    ret = bksync_cmd_go(BKSYNC_DEINIT, NULL, NULL);
+    DBG_VERB(("bksync_ptp_deinit: rv:%d\n", ret));
+
+    return ret;
+}
+
+static int bksync_broadsync_cmd(int bs_id)
+{
+    int ret = -1;
+    u64 subcmd, subcmd_data;
+
+    subcmd = (bs_id == 0) ? KSYNC_BROADSYNC_BS0_CONFIG : KSYNC_BROADSYNC_BS1_CONFIG;
+
+    subcmd_data =  ((ptp_priv->bksync_bs_info[bs_id]).enable & 0x1);
+    subcmd_data |= (((ptp_priv->bksync_bs_info[bs_id]).mode & 0x1) << 8);
+    subcmd_data |= ((ptp_priv->bksync_bs_info[bs_id]).hb << 16);
+    subcmd_data |= (((u64)(ptp_priv->bksync_bs_info[bs_id]).bc) << 32);
+
+    ret = bksync_cmd_go(BKSYNC_BROADSYNC, &subcmd, &subcmd_data);
+    DBG_VERB(("bksync_broadsync_cmd: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret));
+
+    return ret;
+}
+
+static int bksync_broadsync_status_cmd(int bs_id, u64 *status)
+{
+    int ret = -1;
+    u64 subcmd;
+
+    subcmd = (bs_id == 0) ? KSYNC_BROADSYNC_BS0_STATUS_GET : KSYNC_BROADSYNC_BS1_STATUS_GET;
+
+    ret = bksync_cmd_go(BKSYNC_BROADSYNC, &subcmd, status);
+    DBG_VERB(("bksync_broadsync_status_cmd: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, *status, ret));
+
+    return ret;
+}
+
+static int bksync_gpio_cmd(int gpio_num)
+{
+    int ret = -1;
+    u64 subcmd, subcmd_data;
+
+    switch (gpio_num) {
+        case 0:
+            subcmd = KSYNC_GPIO_0;
+            break;
+        case 1:
+            subcmd = KSYNC_GPIO_1;
+            break;
+        case 2:
+            subcmd = KSYNC_GPIO_2;
+            break;
+        case 3:
+            subcmd = KSYNC_GPIO_3;
+            break;
+        case 4:
+            subcmd = KSYNC_GPIO_4;
+            break;
+        case 5:
+            subcmd = KSYNC_GPIO_5;
+            break;
+        default:
+            return ret;
+    }
+
+    subcmd_data =  ((ptp_priv->bksync_gpio_info[gpio_num]).enable & 0x1);
+    subcmd_data |= (((ptp_priv->bksync_gpio_info[gpio_num]).mode & 0x1) << 8);
+    subcmd_data |= ((u64)((ptp_priv->bksync_gpio_info[gpio_num]).period) << 16);
+
+    ret = bksync_cmd_go(BKSYNC_GPIO, &subcmd, &subcmd_data);
+    DBG_VERB(("bksync_gpio_cmd: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret));
+
+    return ret;
+}
+
+static int bksync_gpio_phaseoffset_cmd(int gpio_num)
+{
+    int ret = -1;
+    u64 subcmd, subcmd_data;
+
+    switch (gpio_num) {
+        case 0:
+            subcmd = KSYNC_GPIO_0;
+            break;
+        case 1:
+            subcmd = KSYNC_GPIO_1;
+            break;
+        case 2:
+            subcmd = KSYNC_GPIO_2;
+            break;
+        case 3:
+            subcmd = KSYNC_GPIO_3;
+            break;
+        case 4:
+            subcmd = KSYNC_GPIO_4;
+            break;
+        case 5:
+            subcmd = KSYNC_GPIO_5;
+            break;
+        default:
+            return ret;
+    }
+
+    subcmd_data = (ptp_priv->bksync_gpio_info[gpio_num]).phaseoffset;
+    ret = bksync_cmd_go(BKSYNC_GPIO_PHASEOFFSET, &subcmd, &subcmd_data);
+    DBG_VERB(("bksync_gpio_phaseoffset_cmd: subcmd: 0x%llx "
+              "subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret));
+
+    return ret;
+}
+
+
+
+static int bksync_evlog_cmd(int event, int enable)
+{
+    int ret;
+    int addr_offset;
+    u64 subcmd = 0, subcmd_data = 0;
+    bksync_evlog_t tmp;
+
+    subcmd = event;
+    addr_offset = ((u8 *)&(tmp.event_timestamps[event]) - (u8 *)&(tmp.event_timestamps[0]));
+
+    if (enable) {
+        subcmd_data = (ptp_priv->dma_mem + addr_offset);
+    } else {
+        subcmd_data = 0;
+    }
+
+    ret = bksync_cmd_go(BKSYNC_EVLOG, &subcmd, &subcmd_data);
+    DBG_VERB(("bksync_evlog_cmd: subcmd: 0x%llx subcmd_data: 0x%llx rv:%d\n", subcmd, subcmd_data, ret));
+
+    return ret;
+}
+
+
+/*
+ * Device Debug Statistics Proc Entry
+ */
+/**
+* This function is called at the beginning of a sequence.
+* ie, when:
+*    - the /proc/bcm/ksync/stats file is read (first time)
+*   - after the function stop (end of sequence)
+*
+*/
+static void *bksync_proc_seq_start(struct seq_file *s, loff_t *pos)
+{
+   /* beginning a new sequence ? */
+   if ( (int)*pos == 0 && ptp_priv->shared_addr != NULL)
+   {
+        seq_printf(s, "TwoStep Port Bitmap : %08llx%08llx\n",
+                      (uint64_t)(ptp_priv->shared_addr->portmap[1]),
+                      (uint64_t)(ptp_priv->shared_addr->portmap[0]));
+        seq_printf(s,"%4s| %9s| %9s| %9s| %9s| %9s| %9s| %9s| %9s| %9s| %9s| %9s\n",
+                     "Port", "RxCounter", "TxCounter", "TxOneStep", "TSTimeout", "TSRead", "TSMatch", "TSDiscard",
+                        "TimeHi" , "TimeLo", "TimeAvg", "FIFORx");
+   }
+
+   if ((int)*pos < (ptp_priv->num_pports))
+        return (void *)(unsigned long)(*pos + 1);
+   /* End of the sequence, return NULL */
+   return NULL;
+ }
+
+/**
+* This function is called after the beginning of a sequence.
+* It's called untill the return is NULL (this ends the sequence).
+*
+*/
+static void *bksync_proc_seq_next(struct seq_file *s, void *v, loff_t *pos)
+{
+    (*pos)++;
+    return bksync_proc_seq_start(s, pos);
+}
+/**
+* This function is called at the end of a sequence
+*
+*/
+static void bksync_proc_seq_stop(struct seq_file *s, void *v)
+{
+    /* nothing to do, we use a static value in bksync_proc_seq_start() */
+}
+
+/**
+* This function is called for each "step" of a sequence
+*
+*/
+static int bksync_proc_seq_show(struct seq_file *s, void *v)
+{
+    unsigned long port = (unsigned long)v;
+
+    if ((port > 0) && (port < BCMKSYNC_MAX_NUM_PORTS)) {
+
+    port = port - 1;
+    if (ptp_priv->port_stats[port].pkt_rxctr || ptp_priv->port_stats[port].pkt_txctr ||
+        ptp_priv->port_stats[port].pkt_txonestep||
+        ptp_priv->port_stats[port].tsts_discard || ptp_priv->port_stats[port].tsts_timeout ||
+        ptp_priv->shared_addr->port_ts_data[port].ts_cnt || ptp_priv->port_stats[port].tsts_match) {
+          seq_printf(s, "%4lu | %9d| %9d| %9d| %9d| %9d| %9d| %9d| %9lld| %9lld | %9d|%9d | %s\n", (port + 1),
+                ptp_priv->port_stats[port].pkt_rxctr,
+                ptp_priv->port_stats[port].pkt_txctr,
+                ptp_priv->port_stats[port].pkt_txonestep,
+                ptp_priv->port_stats[port].tsts_timeout,
+                ptp_priv->shared_addr->port_ts_data[port].ts_cnt,
+                ptp_priv->port_stats[port].tsts_match,
+                ptp_priv->port_stats[port].tsts_discard,
+                ptp_priv->port_stats[port].tsts_worst_fetch_time,
+                ptp_priv->port_stats[port].tsts_best_fetch_time,
+                ptp_priv->port_stats[port].tsts_avg_fetch_time,
+                ptp_priv->port_stats[port].fifo_rxctr,
+                ptp_priv->port_stats[port].pkt_txctr != ptp_priv->port_stats[port].tsts_match ? "***":"");
+    }
+    }
+    return 0;
+}
+
+/**
+* seq_operations for bsync_proc_*** entries
+*
+*/
+static struct seq_operations bksync_proc_seq_ops = {
+    .start = bksync_proc_seq_start,
+    .next  = bksync_proc_seq_next,
+    .stop  = bksync_proc_seq_stop,
+    .show  = bksync_proc_seq_show
+};
+
+static int bksync_proc_txts_open(struct inode * inode, struct file * file)
+{
+    return seq_open(file, &bksync_proc_seq_ops);
+}
+
+static ssize_t
+bksync_proc_txts_write(struct file *file, const char *buf,
+                      size_t count, loff_t *loff)
+{
+    char debug_str[40];
+    char *ptr;
+    int port;
+
+    if (copy_from_user(debug_str, buf, count)) {
+        return -EFAULT;
+    }
+
+    if ((ptr = strstr(debug_str, "clear")) != NULL) {
+        for (port = 0; port < ptp_priv->num_pports; port++) {
+            ptp_priv->port_stats[port].pkt_rxctr = 0;
+            ptp_priv->port_stats[port].pkt_txctr = 0;
+            ptp_priv->port_stats[port].pkt_txonestep = 0;
+            ptp_priv->port_stats[port].tsts_timeout = 0;
+            ptp_priv->port_stats[port].tsts_match = 0;
+            ptp_priv->port_stats[port].tsts_discard = 0;
+            if (ptp_priv->shared_addr)
+                ptp_priv->shared_addr->port_ts_data[port].ts_cnt = 0;
+        }
+    } else {
+        DBG_ERR(("Warning: unknown input\n"));
+    }
+
+    return count;
+}
+
+struct proc_ops bksync_proc_txts_file_ops = {
+    PROC_OWNER(THIS_MODULE)
+    .proc_open =       bksync_proc_txts_open,
+    .proc_read =       seq_read,
+    .proc_lseek =      seq_lseek,
+    .proc_write =      bksync_proc_txts_write,
+    .proc_release =    seq_release,
+};
+
+/*
+ * Driver Debug Proc Entry
+ */
+static int
+bksync_proc_debug_show(struct seq_file *m, void *v)
+{
+    seq_printf(m, "Configuration:\n");
+    seq_printf(m, "  debug:          0x%x\n", debug);
+    return 0;
+}
+
+static ssize_t
+bksync_proc_debug_write(struct file *file, const char *buf,
+                      size_t count, loff_t *loff)
+{
+    char debug_str[40];
+    char *ptr;
+
+    if (copy_from_user(debug_str, buf, count)) {
+        return -EFAULT;
+    }
+
+    if ((ptr = strstr(debug_str, "debug=")) != NULL) {
+        ptr += 6;
+        debug = simple_strtol(ptr, NULL, 0);
+    } else {
+        DBG_ERR(("Warning: unknown configuration\n"));
+    }
+
+    return count;
+}
+
+static int bksync_proc_debug_open(struct inode * inode, struct file * file)
+{
+    return single_open(file, bksync_proc_debug_show, NULL);
+}
+
+struct proc_ops bksync_proc_debug_file_ops = {
+    PROC_OWNER(THIS_MODULE)
+    .proc_open =       bksync_proc_debug_open,
+    .proc_read =       seq_read,
+    .proc_lseek =      seq_lseek,
+    .proc_write =      bksync_proc_debug_write,
+    .proc_release =    single_release,
+};
+
+static int
+bksync_proc_init(void)
+{
+    struct proc_dir_entry *entry;
+
+    PROC_CREATE(entry, "stats", 0666, bksync_proc_root, &bksync_proc_txts_file_ops);
+    if (entry == NULL) {
+        return -1;
+    }
+    PROC_CREATE(entry, "debug", 0666, bksync_proc_root, &bksync_proc_debug_file_ops);
+    if (entry == NULL) {
+        return -1;
+    }
+    return 0;
+}
+
+static int
+bksync_proc_cleanup(void)
+{
+    remove_proc_entry("stats", bksync_proc_root);
+    remove_proc_entry("debug", bksync_proc_root);
+    return 0;
+}
+
+
+#define ATTRCMP(x) (0 == strcmp(attr->attr.name, #x))
+
+static int rd_iter=0, wr_iter=0;
+static ssize_t bs_attr_store(struct kobject *kobj,
+                             struct kobj_attribute *attr,
+                             const char *buf,
+                             size_t bytes)
+{
+    ssize_t ret;
+    u32 enable, mode;
+    u32 bc, hb;
+
+    if (ATTRCMP(bs0)) {
+        ret = sscanf(buf, "enable:%d mode:%d bc:%u hb:%u", &enable, &mode, &bc, &hb);
+        DBG_VERB(("rd:%d bs0: enable:%d mode:%d bc:%d hb:%d\n", rd_iter++, enable, mode, bc, hb));
+        ptp_priv->bksync_bs_info[0].enable = enable;
+        ptp_priv->bksync_bs_info[0].mode = mode;
+        ptp_priv->bksync_bs_info[0].bc   = bc;
+        ptp_priv->bksync_bs_info[0].hb   = hb;
+
+        (void)bksync_broadsync_cmd(0);
+    } else if (ATTRCMP(bs1)) {
+        ret = sscanf(buf, "enable:%d mode:%d bc:%u hb:%u", &enable, &mode, &bc, &hb);
+        DBG_VERB(("rd:%d bs1: enable:%d mode:%d bc:%d hb:%d\n", rd_iter++, enable, mode, bc, hb));
+        ptp_priv->bksync_bs_info[1].enable = enable;
+        ptp_priv->bksync_bs_info[1].mode = mode;
+        ptp_priv->bksync_bs_info[1].bc   = bc;
+        ptp_priv->bksync_bs_info[1].hb   = hb;
+
+        (void)bksync_broadsync_cmd(1);
+    } else {
+        ret = -ENOENT;
+    }
+
+    return (ret == -ENOENT) ? ret : bytes;
+}
+
+static ssize_t bs_attr_show(struct kobject *kobj,
+                            struct kobj_attribute *attr,
+                            char *buf)
+{
+    ssize_t bytes;
+    u64 status = 0;
+    u32 variance = 0;
+
+    if (ATTRCMP(bs0)) {
+
+        if(ptp_priv->bksync_bs_info[0].enable) {
+            (void)bksync_broadsync_status_cmd(0, &status);
+        }
+
+        variance = (status >> 32);
+        status = (status & 0xFFFFFFFF);
+        bytes = sprintf(buf, "enable:%d mode:%d bc:%u hb:%u status:%u(%u)\n",
+                        ptp_priv->bksync_bs_info[0].enable,
+                        ptp_priv->bksync_bs_info[0].mode,
+                        ptp_priv->bksync_bs_info[0].bc,
+                        ptp_priv->bksync_bs_info[0].hb,
+                        (u32)status,
+                        variance);
+        DBG_VERB(("wr:%d bs0: enable:%d mode:%d bc:%u hb:%u status:%u(%u)\n",
+                        wr_iter++,
+                        ptp_priv->bksync_bs_info[0].enable,
+                        ptp_priv->bksync_bs_info[0].mode,
+                        ptp_priv->bksync_bs_info[0].bc,
+                        ptp_priv->bksync_bs_info[0].hb,
+                        (u32)status,
+                        variance));
+    } else if (ATTRCMP(bs1)) {
+
+        if(ptp_priv->bksync_bs_info[1].enable) {
+            (void)bksync_broadsync_status_cmd(1, &status);
+        }
+
+        variance = (status >> 32);
+        status = (status & 0xFFFFFFFF);
+        bytes = sprintf(buf, "enable:%d mode:%d bc:%u hb:%u status:%u(%u)\n",
+                        ptp_priv->bksync_bs_info[1].enable,
+                        ptp_priv->bksync_bs_info[1].mode,
+                        ptp_priv->bksync_bs_info[1].bc,
+                        ptp_priv->bksync_bs_info[1].hb,
+                        (u32)status,
+                        variance);
+        DBG_VERB(("wr:%d bs1: enable:%d mode:%d bc:%u hb:%u status:%u(%u)\n",
+                        wr_iter++,
+                        ptp_priv->bksync_bs_info[1].enable,
+                        ptp_priv->bksync_bs_info[1].mode,
+                        ptp_priv->bksync_bs_info[1].bc,
+                        ptp_priv->bksync_bs_info[1].hb,
+                        (u32)status,
+                        variance));
+    } else {
+        bytes = -ENOENT;
+    }
+
+    return bytes;
+}
+
+#define BS_ATTR(x)                         \
+    static struct kobj_attribute x##_attribute =        \
+        __ATTR(x, 0664, bs_attr_show, bs_attr_store);
+
+BS_ATTR(bs0)
+BS_ATTR(bs1)
+
+#define BS_ATTR_LIST(x)    & x ## _attribute.attr
+static struct attribute *bs_attrs[] = {
+    BS_ATTR_LIST(bs0),
+    BS_ATTR_LIST(bs1),
+    NULL,       /* terminator */
+};
+
+static struct attribute_group bs_attr_group = {
+    .name   = "broadsync",
+    .attrs  = bs_attrs,
+};
+
+
+static int gpio_rd_iter=0, gpio_wr_iter=0;
+static ssize_t gpio_attr_store(struct kobject *kobj,
+                               struct kobj_attribute *attr,
+                               const char *buf,
+                               size_t bytes)
+{
+    ssize_t ret;
+    int gpio;
+    u32 enable, mode;
+    u32 period;
+    int64_t phaseoffset;
+
+    if (ATTRCMP(gpio0)) {
+        gpio = 0;
+    } else if (ATTRCMP(gpio1)) {
+        gpio = 1;
+    } else if (ATTRCMP(gpio2)) {
+        gpio = 2;
+    } else if (ATTRCMP(gpio3)) {
+        gpio = 3;
+    } else if (ATTRCMP(gpio4)) {
+        gpio = 4;
+    } else if (ATTRCMP(gpio5)) {
+        gpio = 5;
+    } else {
+        return -ENOENT;
+    }
+
+
+    ret = sscanf(buf, "enable:%d mode:%d period:%u phaseoffset:%lld", &enable, &mode, &period, &phaseoffset);
+    DBG_VERB(("rd:%d gpio%d: enable:%d mode:%d period:%d phaseoffset:%lld\n", gpio_rd_iter++, gpio, enable, mode, period, phaseoffset));
+    ptp_priv->bksync_gpio_info[gpio].enable = enable;
+    ptp_priv->bksync_gpio_info[gpio].mode = mode;
+    ptp_priv->bksync_gpio_info[gpio].period   = period;
+
+   (void)bksync_gpio_cmd(gpio);
+
+   if (ptp_priv->bksync_gpio_info[gpio].phaseoffset != phaseoffset) {
+       ptp_priv->bksync_gpio_info[gpio].phaseoffset = phaseoffset;
+       (void)bksync_gpio_phaseoffset_cmd(gpio);
+   }
+
+    return (ret == -ENOENT) ? ret : bytes;
+}
+
+static ssize_t gpio_attr_show(struct kobject *kobj,
+                              struct kobj_attribute *attr,
+                              char *buf)
+{
+    ssize_t bytes;
+    int gpio;
+
+    if (ATTRCMP(gpio0)) {
+        gpio = 0;
+    } else if (ATTRCMP(gpio1)) {
+        gpio = 1;
+    } else if (ATTRCMP(gpio2)) {
+        gpio = 2;
+    } else if (ATTRCMP(gpio3)) {
+        gpio = 3;
+    } else if (ATTRCMP(gpio4)) {
+        gpio = 4;
+    } else if (ATTRCMP(gpio5)) {
+        gpio = 5;
+    } else {
+        return -ENOENT;
+    }
+
+    bytes = sprintf(buf, "enable:%d mode:%d period:%u phaseoffset:%lld\n",
+                    ptp_priv->bksync_gpio_info[gpio].enable,
+                    ptp_priv->bksync_gpio_info[gpio].mode,
+                    ptp_priv->bksync_gpio_info[gpio].period,
+                    ptp_priv->bksync_gpio_info[gpio].phaseoffset);
+    DBG_VERB(("wr:%d gpio%d: enable:%d mode:%d period:%u phaseoffset:%lld\n",
+                    gpio_wr_iter++, gpio,
+                    ptp_priv->bksync_gpio_info[gpio].enable,
+                    ptp_priv->bksync_gpio_info[gpio].mode,
+                    ptp_priv->bksync_gpio_info[gpio].period,
+                    ptp_priv->bksync_gpio_info[gpio].phaseoffset));
+
+    return bytes;
+}
+
+#define GPIO_ATTR(x)                         \
+    static struct kobj_attribute x##_attribute =        \
+        __ATTR(x, 0664, gpio_attr_show, gpio_attr_store);
+
+GPIO_ATTR(gpio0)
+GPIO_ATTR(gpio1)
+GPIO_ATTR(gpio2)
+GPIO_ATTR(gpio3)
+GPIO_ATTR(gpio4)
+GPIO_ATTR(gpio5)
+
+#define GPIO_ATTR_LIST(x)    & x ## _attribute.attr
+static struct attribute *gpio_attrs[] = {
+    GPIO_ATTR_LIST(gpio0),
+    GPIO_ATTR_LIST(gpio1),
+    GPIO_ATTR_LIST(gpio2),
+    GPIO_ATTR_LIST(gpio3),
+    GPIO_ATTR_LIST(gpio4),
+    GPIO_ATTR_LIST(gpio5),
+    NULL,       /* terminator */
+};
+
+static struct attribute_group gpio_attr_group = {
+    .name   = "gpio",
+    .attrs  = gpio_attrs,
+};
+
+
+
+static ssize_t evlog_attr_store(struct kobject *kobj,
+                                struct kobj_attribute *attr,
+                                const char *buf,
+                                size_t bytes)
+{
+    ssize_t ret;
+    int event, enable;
+
+    if (ATTRCMP(cpu)) {
+        event = 0;
+    } else if (ATTRCMP(bs0)) {
+        event = 1;
+    } else if (ATTRCMP(bs1)) {
+        event = 2;
+    } else if (ATTRCMP(gpio0)) {
+        event = 3;
+    } else if (ATTRCMP(gpio1)) {
+        event = 4;
+    } else if (ATTRCMP(gpio2)) {
+        event = 5;
+    } else if (ATTRCMP(gpio3)) {
+        event = 6;
+    } else if (ATTRCMP(gpio4)) {
+        event = 7;
+    } else if (ATTRCMP(gpio5)) {
+        event = 8;
+    } else {
+        return -ENOENT;
+    }
+
+
+    ret = sscanf(buf, "enable:%d", &enable);
+    DBG_VERB(("event:%d: enable:%d\n", event, enable));
+
+    (void)bksync_evlog_cmd(event, enable);
+    ptp_priv->bksync_evlog_info[event].enable = enable;
+
+    return (ret == -ENOENT) ? ret : bytes;
+}
+
+static ssize_t evlog_attr_show(struct kobject *kobj,
+                               struct kobj_attribute *attr,
+                               char *buf)
+{
+    ssize_t bytes;
+    int event;
+
+
+    if (!module_initialized || !ptp_priv || (ptp_priv->evlog == NULL)) {
+        return -ENOENT;
+    }
+
+    if (ATTRCMP(cpu)) {
+        event = 0;
+    } else if (ATTRCMP(bs0)) {
+        event = 1;
+    } else if (ATTRCMP(bs1)) {
+        event = 2;
+    } else if (ATTRCMP(gpio0)) {
+        event = 3;
+    } else if (ATTRCMP(gpio1)) {
+        event = 4;
+    } else if (ATTRCMP(gpio2)) {
+        event = 5;
+    } else if (ATTRCMP(gpio3)) {
+        event = 6;
+    } else if (ATTRCMP(gpio4)) {
+        event = 7;
+    } else if (ATTRCMP(gpio5)) {
+        event = 8;
+    } else {
+        return -ENOENT;
+    }
+
+
+    bytes = sprintf(buf, "enable:%d Previous Time:%llu.%09u Latest Time:%llu.%09u\n",
+                    ptp_priv->bksync_evlog_info[event].enable,
+                    ptp_priv->evlog->event_timestamps[event].prv_tstamp.sec,
+                    ptp_priv->evlog->event_timestamps[event].prv_tstamp.nsec,
+                    ptp_priv->evlog->event_timestamps[event].cur_tstamp.sec,
+                    ptp_priv->evlog->event_timestamps[event].cur_tstamp.nsec);
+    DBG_VERB(("event%d: enable:%d Previous Time:%llu.%09u Latest Time:%llu.%09u\n",
+                    event,
+                    ptp_priv->bksync_evlog_info[event].enable,
+                    ptp_priv->evlog->event_timestamps[event].prv_tstamp.sec,
+                    ptp_priv->evlog->event_timestamps[event].prv_tstamp.nsec,
+                    ptp_priv->evlog->event_timestamps[event].cur_tstamp.sec,
+                    ptp_priv->evlog->event_timestamps[event].cur_tstamp.nsec));
+
+    memset((void *)&(ptp_priv->evlog->event_timestamps[event]), 0, sizeof(ptp_priv->evlog->event_timestamps[event]));
+
+    return bytes;
+}
+
+#define EVLOG_ATTR(x)                         \
+    static struct kobj_attribute evlog_ ## x ##_attribute =        \
+        __ATTR(x, 0664, evlog_attr_show, evlog_attr_store);
+
+EVLOG_ATTR(bs0)
+EVLOG_ATTR(bs1)
+EVLOG_ATTR(gpio0)
+EVLOG_ATTR(gpio1)
+EVLOG_ATTR(gpio2)
+EVLOG_ATTR(gpio3)
+EVLOG_ATTR(gpio4)
+EVLOG_ATTR(gpio5)
+
+#define EVLOG_ATTR_LIST(x)    & evlog_ ## x ## _attribute.attr
+static struct attribute *evlog_attrs[] = {
+    EVLOG_ATTR_LIST(bs0),
+    EVLOG_ATTR_LIST(bs1),
+    EVLOG_ATTR_LIST(gpio0),
+    EVLOG_ATTR_LIST(gpio1),
+    EVLOG_ATTR_LIST(gpio2),
+    EVLOG_ATTR_LIST(gpio3),
+    EVLOG_ATTR_LIST(gpio4),
+    EVLOG_ATTR_LIST(gpio5),
+    NULL,       /* terminator */
+};
+
+static struct attribute_group evlog_attr_group = {
+    .name   = "evlog",
+    .attrs  = evlog_attrs,
+};
+
+
+
+
+static int
+bksync_sysfs_init(void)
+{
+    int ret = 0;
+    struct kobject *parent;
+    struct kobject *root = &((((struct module *)(THIS_MODULE))->mkobj).kobj);
+
+    parent = root;
+    ptp_priv->kobj = kobject_create_and_add("io", parent);
+
+    ret = sysfs_create_group(ptp_priv->kobj, &bs_attr_group);
+
+    ret = sysfs_create_group(ptp_priv->kobj, &gpio_attr_group);
+
+    ret = sysfs_create_group(ptp_priv->kobj, &evlog_attr_group);
+
+    return ret;
+}
+
+static int
+bksync_sysfs_cleanup(void)
+{
+    int ret = 0;
+    struct kobject *parent;
+
+    parent = ptp_priv->kobj;
+
+    sysfs_remove_group(parent, &bs_attr_group);
+    sysfs_remove_group(parent, &gpio_attr_group);
+    sysfs_remove_group(parent, &evlog_attr_group);
+
+    kobject_put(ptp_priv->kobj);
+
+
+    return ret;
+}
+
+
+static void bksync_ptp_fw_data_alloc(void)
+{
+    dma_addr_t dma_mem = 0;
+
+    /* Initialize the Base address for CMIC and shared Memory access */
+    ptp_priv->base_addr = lkbde_get_dev_virt(0);
+    ptp_priv->dma_dev = lkbde_get_dma_dev(0);
+
+    ptp_priv->dma_mem_size = sizeof(bksync_evlog_t); /*sizeof(bksync_evlog_t);*/
+
+    if (ptp_priv->evlog == NULL) {
+        DBG_ERR(("Allocate memory for event log\n"));
+        ptp_priv->evlog = DMA_ALLOC_COHERENT(ptp_priv->dma_dev,
+                                                   ptp_priv->dma_mem_size,
+                                                   &dma_mem);
+        if (ptp_priv->evlog != NULL) {
+            ptp_priv->dma_mem = dma_mem;
+        }
+    }
+
+    if (ptp_priv->evlog != NULL) {
+        /* Reset memory */
+        memset((void *)ptp_priv->evlog, 0, ptp_priv->dma_mem_size);
+
+        DBG_ERR(("Shared memory allocation (%d bytes) for event log successful at 0x%016lx.\n",
+                ptp_priv->dma_mem_size, (long unsigned int)ptp_priv->dma_mem));
+    }
+
+    /* Allocate dma for timestmap logging for extts */
+    dma_mem = 0;
+    ptp_priv->extts_dma_mem_size = sizeof(bksync_fw_extts_log_t);
+    if (ptp_priv->extts_log == NULL) {
+        DBG_ERR(("Allocate memory for extts log\n"));
+        ptp_priv->extts_log = DMA_ALLOC_COHERENT(ptp_priv->dma_dev,
+                                                   ptp_priv->extts_dma_mem_size,
+                                                   &dma_mem);
+        if (ptp_priv->extts_log != NULL) {
+            ptp_priv->extts_dma_mem_addr = dma_mem;
+        }
+    }
+
+    if (ptp_priv->extts_log != NULL) {
+        /* Reset memory */
+        memset((void *)ptp_priv->extts_log, 0, ptp_priv->extts_dma_mem_size);
+        ptp_priv->extts_log->tail = 0;
+        ptp_priv->extts_event.head = -1;
+        ptp_priv->extts_log->head = -1;
+
+        DBG_ERR(("Shared memory allocation (%d bytes) for extts log successful at 0x%016lx.\n",
+                ptp_priv->extts_dma_mem_size, (long unsigned int)ptp_priv->extts_dma_mem_addr));
+    }
+    return;
+}
+
+static void bksync_ptp_fw_data_free(void)
+{
+    if (ptp_priv->evlog != NULL) {
+        DMA_FREE_COHERENT(ptp_priv->dma_dev, ptp_priv->dma_mem_size,
+                              (void *)ptp_priv->evlog, ptp_priv->dma_mem);
+        ptp_priv->evlog = NULL;
+    }
+
+    if (ptp_priv->extts_log != NULL) {
+        DBG_ERR(("Free shared memory : extts log of %d bytes\n", ptp_priv->extts_dma_mem_size));
+        DMA_FREE_COHERENT(ptp_priv->dma_dev, ptp_priv->extts_dma_mem_size,
+                              (void *)ptp_priv->extts_log, ptp_priv->extts_dma_mem_addr);
+        ptp_priv->extts_log = NULL;
+    }
+    return;
+}
+
+
+
+static void bksync_ptp_dma_init(int dcb_type)
+{
+    int endianess;
+    int num_pports = 256;
+    int mem_size = 16384; /*sizeof(bksync_info_t);*/
+
+
+    ptp_priv->num_pports = num_pports;
+    ptp_priv->dcb_type = dcb_type;
+
+    if (ptp_priv->shared_addr == NULL) {
+        ptp_priv->shared_addr = kzalloc(16384, GFP_KERNEL);
+        ptp_priv->port_stats = kzalloc((sizeof(bksync_port_stats_t) * num_pports), GFP_KERNEL);
+    }
+
+    if (ptp_priv->shared_addr != NULL) {
+        /* Reset memory. */
+        memset((void *)ptp_priv->shared_addr, 0, mem_size);
+
+#ifdef __LITTLE_ENDIAN
+        endianess = 0;
+#else
+        endianess = 1;
+#endif
+        DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_14r(CMIC_CMC_BASE), ((pci_cos << 16) | endianess));
+
+        DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_15r(CMIC_CMC_BASE), 1);
+        DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_16r(CMIC_CMC_BASE), 1);
+
+    }
+
+    bksync_ptp_fw_data_alloc();
+
+    DBG_VERB(("%s %p:%p, dcb_type: %d\n", __FUNCTION__, ptp_priv->base_addr,(void *)ptp_priv->shared_addr, dcb_type));
+
+    ptp_priv->mirror_encap_bmp = 0x0;
+
+    hostcmd_regs[0] = CMIC_CMC_SCHAN_MESSAGE_21r(CMIC_CMC_BASE);
+    hostcmd_regs[1] = CMIC_CMC_SCHAN_MESSAGE_20r(CMIC_CMC_BASE);
+    hostcmd_regs[2] = CMIC_CMC_SCHAN_MESSAGE_19r(CMIC_CMC_BASE);
+    hostcmd_regs[3] = CMIC_CMC_SCHAN_MESSAGE_18r(CMIC_CMC_BASE);
+    hostcmd_regs[4] = CMIC_CMC_SCHAN_MESSAGE_17r(CMIC_CMC_BASE);
+
+    return;
+}
+
+
+/**
+ * bksync_ioctl_cmd_handler
+ * @kmsg: kcom message - ptp clock ioctl command.
+ * Description: This function will handle ioctl commands
+ * from user mode.
+ */
+static int
+bksync_ioctl_cmd_handler(kcom_msg_clock_cmd_t *kmsg, int len, int dcb_type)
+{
+    u32 fw_status;
+    bksync_dnx_jr2_devices_system_info_t *tmp_jr2devs_sys_info = NULL;
+    int tmp = 0;
+
+    kmsg->hdr.type = KCOM_MSG_TYPE_RSP;
+
+    if (!module_initialized && kmsg->clock_info.cmd != KSYNC_M_HW_INIT) {
+        kmsg->hdr.status = KCOM_E_NOT_FOUND;
+        return sizeof(kcom_msg_hdr_t);
+    }
+
+    switch(kmsg->clock_info.cmd) {
+        case KSYNC_M_HW_INIT:
+            pci_cos = kmsg->clock_info.data[0];
+            DBG_VERB(("Configuring pci_cosq:%d\n", pci_cos));
+            if (kmsg->clock_info.data[1] == 0 || kmsg->clock_info.data[1] == 1) {
+                /* Return success if the app is already initialized. */
+                if (module_initialized) {
+                    kmsg->hdr.status = KCOM_E_NONE;
+                    return sizeof(kcom_msg_hdr_t);
+                }
+
+                fw_core = kmsg->clock_info.data[1];
+                bksync_ptp_dma_init(dcb_type);
+                DEV_READ32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_21r(CMIC_CMC_BASE), &fw_status);
+
+                /* Return error if the app is not ready yet. */
+                if (fw_status != 0xBADC0DE1) {
+                    kmsg->hdr.status = KCOM_E_RESOURCE;
+                    return sizeof(kcom_msg_hdr_t);
+                }
+
+                (ptp_priv->bksync_init_info).uc_port_num = kmsg->clock_info.data[2];
+                (ptp_priv->bksync_init_info).uc_port_sysport = kmsg->clock_info.data[3];
+                (ptp_priv->bksync_init_info).host_cpu_port = kmsg->clock_info.data[4];
+                (ptp_priv->bksync_init_info).host_cpu_sysport = kmsg->clock_info.data[5];
+                (ptp_priv->bksync_init_info).udh_len = kmsg->clock_info.data[6];
+
+                DBG_VERB(("fw_core:%d uc_port:%d uc_sysport:%d pci_port:%d pci_sysport:%d\n",
+                        kmsg->clock_info.data[1], kmsg->clock_info.data[2], kmsg->clock_info.data[3],
+                        kmsg->clock_info.data[4], kmsg->clock_info.data[5]));
+
+                DBG_VERB(("uc_port:%d uc_sysport:%d pci_port:%d pci_sysport:%d\n",
+                        (ptp_priv->bksync_init_info).uc_port_num,
+                        (ptp_priv->bksync_init_info).uc_port_sysport,
+                        (ptp_priv->bksync_init_info).host_cpu_port,
+                        (ptp_priv->bksync_init_info).host_cpu_sysport));
+
+                if (bksync_ptp_init(&(ptp_priv->ptp_caps)) >= 0) {
+                    module_initialized = 1;
+                }
+
+            }
+            break;
+        case KSYNC_M_HW_DEINIT:
+            DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_15r(CMIC_CMC_BASE), 0);
+            DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_16r(CMIC_CMC_BASE), 0);
+            bksync_ptp_deinit(&(ptp_priv->ptp_caps));
+            module_initialized = 0;
+            break;
+        case KSYNC_M_HW_TS_DISABLE:
+            bksync_ptp_hw_tstamp_disable(0, kmsg->clock_info.data[0], 0);
+            break;
+        case KSYNC_M_MTP_TS_UPDATE_ENABLE:
+            bksync_ptp_mirror_encap_update(0, kmsg->clock_info.data[0], TRUE);
+            break;
+        case KSYNC_M_MTP_TS_UPDATE_DISABLE:
+            bksync_ptp_mirror_encap_update(0, kmsg->clock_info.data[0], FALSE);
+            break;
+        case KSYNC_M_VERSION:
+            break;
+        case KSYNC_M_DNX_JR2DEVS_SYS_CONFIG:
+            DBG_VERB(("bksync_ioctl_cmd_handler: KSYNC_M_DNX_JR2DEVS_SYS_CONFIG Rcvd.\n"));
+
+            tmp_jr2devs_sys_info = (bksync_dnx_jr2_devices_system_info_t *)((char *)kmsg + sizeof(kcom_msg_clock_cmd_t));
+
+            (ptp_priv->bksync_jr2devs_sys_info).ftmh_lb_key_ext_size = tmp_jr2devs_sys_info->ftmh_lb_key_ext_size;
+            (ptp_priv->bksync_jr2devs_sys_info).ftmh_stacking_ext_size = tmp_jr2devs_sys_info->ftmh_stacking_ext_size;
+            (ptp_priv->bksync_jr2devs_sys_info).pph_base_size = tmp_jr2devs_sys_info->pph_base_size;
+
+            for (tmp = 0; tmp < BKSYNC_DNXJER2_PPH_LIF_EXT_TYPE_MAX; tmp++) {
+                (ptp_priv->bksync_jr2devs_sys_info).pph_lif_ext_size[tmp] = tmp_jr2devs_sys_info->pph_lif_ext_size[tmp];
+            }
+
+            (ptp_priv->bksync_jr2devs_sys_info).system_headers_mode = tmp_jr2devs_sys_info->system_headers_mode;
+            (ptp_priv->bksync_jr2devs_sys_info).udh_enable = tmp_jr2devs_sys_info->udh_enable;
+            for (tmp = 0; tmp < BKSYNC_DNXJER2_UDH_DATA_TYPE_MAX; tmp++) {
+                (ptp_priv->bksync_jr2devs_sys_info).udh_data_lenght_per_type[tmp] = tmp_jr2devs_sys_info->udh_data_lenght_per_type[tmp];
+            }
+
+            (ptp_priv->bksync_jr2devs_sys_info).cosq_port_cpu_channel = tmp_jr2devs_sys_info->cosq_port_cpu_channel;
+            (ptp_priv->bksync_jr2devs_sys_info).cosq_port_pp_port = tmp_jr2devs_sys_info->cosq_port_pp_port;
+
+            tmp_jr2devs_sys_info = &(ptp_priv->bksync_jr2devs_sys_info);
+
+#if 0
+            DBG_VERB(("ftmh_lb_key_ext_size %u ftmh_stacking_ext_size %u pph_base_size %u\n",
+                    tmp_jr2devs_sys_info->ftmh_lb_key_ext_size, tmp_jr2devs_sys_info->ftmh_stacking_ext_size,
+                    tmp_jr2devs_sys_info->pph_base_size));
+
+            for (tmp = 0; tmp < BKSYNC_DNXJER2_PPH_LIF_EXT_TYPE_MAX ; tmp++) {
+                DBG_VERB(("pph_lif_ext_size[%u] %u\n",
+                        tmp, tmp_jr2devs_sys_info->pph_lif_ext_size[tmp]));
+            }
+
+            DBG_VERB(("\nsystem_headers_mode %u udh_enable %u\n",
+                    tmp_jr2devs_sys_info->system_headers_mode, tmp_jr2devs_sys_info->udh_enable));
+
+            for (tmp = 0; tmp < BKSYNC_DNXJER2_UDH_DATA_TYPE_MAX; tmp++) {
+                DBG_VERB(("udh_data_lenght_per_type [%d] %u\n",
+                        tmp, tmp_jr2devs_sys_info->udh_data_lenght_per_type[tmp]));
+            }
+
+            DBG_VERB(("\ncosq_port_cpu_channel :%u cosq_port_pp_port:%u\n",
+                    tmp_jr2devs_sys_info->cosq_port_cpu_channel, tmp_jr2devs_sys_info->cosq_port_cpu_channel));
+#endif
+            break;
+        default:
+            kmsg->hdr.status = KCOM_E_NOT_FOUND;
+            return sizeof(kcom_msg_hdr_t);
+    }
+
+    return sizeof(*kmsg);
+}
+
+
+
+/**
+ * bksync_ptp_register
+ * @priv: driver private structure
+ * Description: this function will register the ptp clock driver
+ * to kernel. It also does some house keeping work.
+ */
+static int bksync_ptp_register(void)
+{
+    int err = -ENODEV;
+
+    /* Support on core-0 or core-1 */
+    if (fw_core < 0 || fw_core > 1) {
+        goto exit;
+    }
+
+    /* default transport is raw, ieee 802.3 */
+    switch (network_transport) {
+        case 2: /* IEEE 802.3 */
+        case 4: /* UDP IPv4   */
+        case 6: /* UDP IPv6   */
+            break;
+        default:
+            network_transport = 0;
+    }
+
+    ptp_priv = kzalloc(sizeof(*ptp_priv), GFP_KERNEL);
+    if (!ptp_priv) {
+        err = -ENOMEM;
+        goto exit;
+    }
+
+    /* Reset memory */
+    memset(ptp_priv, 0, sizeof(*ptp_priv));
+
+    err = -ENODEV;
+
+    ptp_priv->ptp_caps = bksync_ptp_caps;
+
+    mutex_init(&(ptp_priv->ptp_lock));
+
+    /* Register ptp clock driver with bksync_ptp_caps */
+    ptp_priv->ptp_clock = ptp_clock_register(&ptp_priv->ptp_caps, NULL);
+
+    /* Initialize the Base address for CMIC and shared Memory access */
+    ptp_priv->base_addr = lkbde_get_dev_virt(0);
+    ptp_priv->dma_dev = lkbde_get_dma_dev(0);
+
+    if (IS_ERR(ptp_priv->ptp_clock)) {
+        ptp_priv->ptp_clock = NULL;
+    } else if (ptp_priv->ptp_clock) {
+        err = 0;
+
+        /* Register BCM-KNET HW Timestamp Callback Functions */
+        bkn_hw_tstamp_enable_cb_register(bksync_ptp_hw_tstamp_enable);
+        bkn_hw_tstamp_disable_cb_register(bksync_ptp_hw_tstamp_disable);
+        bkn_hw_tstamp_tx_time_get_cb_register(bksync_ptp_hw_tstamp_tx_time_get);
+        bkn_hw_tstamp_tx_meta_get_cb_register(bksync_ptp_hw_tstamp_tx_meta_get);
+        bkn_hw_tstamp_rx_pre_process_cb_register(bksync_ptp_hw_tstamp_rx_pre_process);
+        bkn_hw_tstamp_rx_time_upscale_cb_register(bksync_ptp_hw_tstamp_rx_time_upscale);
+        bkn_hw_tstamp_ptp_clock_index_cb_register(bksync_ptp_hw_tstamp_ptp_clock_index_get);
+        bkn_hw_tstamp_ioctl_cmd_cb_register(bksync_ioctl_cmd_handler);
+        bkn_hw_tstamp_ptp_transport_get_cb_register(bksync_ptp_transport_get);
+
+    }
+
+     /* Initialize proc files */
+     bksync_proc_root = proc_mkdir("bcm/ksync", NULL);
+     bksync_proc_init();
+     bksync_sysfs_init();
+     ptp_priv->shared_addr = NULL;
+     ptp_priv->port_stats = NULL;
+
+     bksync_ptp_extts_logging_init();
+exit:
+    return err;
+}
+
+static int bksync_ptp_remove(void)
+{
+    if (!ptp_priv)
+        return 0;
+
+    module_initialized = 0;
+
+    bksync_ptp_extts_logging_deinit();
+
+    bksync_ptp_time_keep_deinit();
+
+    bksync_proc_cleanup();
+    bksync_sysfs_cleanup();
+    remove_proc_entry("bcm/ksync", NULL);
+
+    /* UnRegister BCM-KNET HW Timestamp Callback Functions */
+    bkn_hw_tstamp_enable_cb_unregister(bksync_ptp_hw_tstamp_enable);
+    bkn_hw_tstamp_disable_cb_unregister(bksync_ptp_hw_tstamp_disable);
+    bkn_hw_tstamp_tx_time_get_cb_unregister(bksync_ptp_hw_tstamp_tx_time_get);
+    bkn_hw_tstamp_tx_meta_get_cb_unregister(bksync_ptp_hw_tstamp_tx_meta_get);
+    bkn_hw_tstamp_rx_pre_process_cb_unregister(bksync_ptp_hw_tstamp_rx_pre_process);
+    bkn_hw_tstamp_rx_time_upscale_cb_unregister(bksync_ptp_hw_tstamp_rx_time_upscale);
+    bkn_hw_tstamp_ptp_clock_index_cb_unregister(bksync_ptp_hw_tstamp_ptp_clock_index_get);
+    bkn_hw_tstamp_ioctl_cmd_cb_unregister(bksync_ioctl_cmd_handler);
+    bkn_hw_tstamp_ptp_transport_get_cb_unregister(bksync_ptp_transport_get);
+ 
+    /* reset handshaking info */
+    DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_15r(CMIC_CMC_BASE), 0);
+    DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_16r(CMIC_CMC_BASE), 0);
+
+    /* Deinitialize the PTP */
+    bksync_ptp_deinit(&(ptp_priv->ptp_caps));
+
+    bksync_ptp_fw_data_free();
+
+    if (ptp_priv->port_stats != NULL) {
+        kfree((void *)ptp_priv->port_stats);
+        ptp_priv->port_stats = NULL;
+    }
+    if (ptp_priv->shared_addr != NULL) {
+        kfree((void *)ptp_priv->shared_addr);
+        ptp_priv->shared_addr = NULL;
+        DBG_ERR(("Free R5 memory\n"));
+    }
+
+    /* Unregister the bcm ptp clock driver */
+    ptp_clock_unregister(ptp_priv->ptp_clock);
+
+    /* Free Memory */
+    kfree(ptp_priv);
+
+    return 0;
+}
+#endif
+
+
+/*
+ * Generic module functions
+ */
+
+/*
+ * Function: _pprint
+ *
+ * Purpose:
+ *    Print proc filesystem information.
+ * Parameters:
+ *    None
+ * Returns:
+ *    Always 0
+ */
+    static int
+_pprint(struct seq_file *m)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3,17,0)
+    /* put some goodies here */
+    pprintf(m, "Broadcom BCM PTP Hardware Clock Module\n");
+#else
+    pprintf(m, "Broadcom BCM PTP Hardware Clock Module not supported\n");
+#endif
+    return 0;
+}
+
+/*
+ * Function: _init
+ *
+ * Purpose:
+ *    Module initialization.
+ *    Attached SOC all devices and optionally initializes these.
+ * Parameters:
+ *    None
+ * Returns:
+ *    0 on success, otherwise -1
+ */
+    static int
+_init(void)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3,17,0)
+    bksync_ptp_register();
+    return 0;
+#else
+    return -1;
+#endif
+}
+
+/*
+ * Function: _cleanup
+ *
+ * Purpose:
+ *    Module cleanup function
+ * Parameters:
+ *    None
+ * Returns:
+ *    Always 0
+ */
+    static int
+_cleanup(void)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3,17,0)
+    bksync_ptp_remove();
+    return 0;
+#else
+    return -1;
+#endif
+}
+
+static gmodule_t _gmodule = {
+    .name = MODULE_NAME,
+    .major = MODULE_MAJOR,
+    .init = _init,
+    .cleanup = _cleanup,
+    .pprint = _pprint,
+    .ioctl = NULL,
+    .open = NULL,
+    .close = NULL,
+};
+
+    gmodule_t*
+gmodule_get(void)
+{
+    EXPORT_NO_SYMBOLS;
+    return &_gmodule;
+}
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/README b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/README
index e5ddd7d92719..e2e3c1ac296b 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/README
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/README
@@ -1,5 +1,5 @@
 $Id:$
-$Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+$Copyright: 2007-2024 Broadcom Inc. All rights reserved.
 
 Permission is granted to use, copy, modify and/or distribute this
 software under either one of the licenses below.
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_handler.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_handler.h
index cda80ad5da2e..7a3498f756ee 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_handler.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_handler.h
@@ -1,6 +1,6 @@
 /* 
  * $Id:$
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        dcb.h
  * Purpose:     DCB Library interface
@@ -34,7 +35,7 @@
 #define   _DCB_DCB_H_
 
 #include <sal/types.h>
-#include <appl/dcb/dcb_int.h>
+#include <soc/dcb.h>
 
 
 /*
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_int.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_int.h
index af041f52505c..5349e77ee9b7 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_int.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_int.h
@@ -1,6 +1,6 @@
 /* 
  * $Id:$
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        dcb_int.h
  * Purpose:     DCB Library Internal
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sal/types.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sal/types.h
index 3f2ea4081fec..17d60c34ebde 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sal/types.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sal/types.h
@@ -1,6 +1,6 @@
 /* 
  * $Id: types.h,v 1.1 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        types.h
  * Purpose:     SAL Definitions 
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sdk_config.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sdk_config.h
index 31ae2947bfb3..849c7e7f80ec 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sdk_config.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sdk_config.h
@@ -1,6 +1,6 @@
 /*
  * $Id:$
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * Stub header file
  */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/bsl.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/bsl.h
index 319f88600cb5..996679fe5203 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/bsl.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/bsl.h
@@ -1,6 +1,6 @@
 /*
  * $Id: $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * Broadcom System Log (bSL)
  *
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/rx.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/rx.h
index 973e8cab6c1b..4ba3d99660af 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/rx.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/rx.h
@@ -1,6 +1,6 @@
 /*
  * $Id: rx.h,v 1.35 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        rx.h
  * Purpose:     Packet Receive Reason Types shared between BCM and SOC layers
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcb.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcb.h
index 2ec41adadb4a..a3f0c2888ed2 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcb.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcb.h
@@ -1,6 +1,6 @@
 /*
  * $Id: dcb.h,v 1.32 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        soc/dcb.h
  * Purpose:     Define dma control block (DCB) operations
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcbformats.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcbformats.h
index 80f6481c69d5..7a064bd82d7b 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcbformats.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcbformats.h
@@ -1,6 +1,6 @@
 /*
  * $Id$
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        soc/dcbformats.h
  * Purpose:     Define dma control block (DCB) formats for various chips.
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h
index c49fa06f4db0..c8671c59e933 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h
@@ -1,6 +1,6 @@
 /*
  * $Id: defs.h,v 1.271 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        defs.h
  * Purpose:     Basic defines for system and chips
@@ -862,7 +863,7 @@
 #define BCM_HURRICANE4_SUPPORT
 #define BCM_FIREBOLT6_SUPPORT
 #define BCM_TOMAHAWK_SUPPORT
-#define BCM_MPLS_SUPPORT  /* TODO: FB6 */
+#define BCM_MPLS_SUPPORT  
 #define BCM_EXTND_SBUS_SUPPORT
 #define BCM_SBUSDMA_SUPPORT
 #define BCM_TIMESYNC_SUPPORT
@@ -922,7 +923,7 @@
 #define BCM_HELIX5_SUPPORT
 #define BCM_HURRICANE4_SUPPORT
 #define BCM_TOMAHAWK_SUPPORT
-#define BCM_MPLS_SUPPORT  /* TODO: HR4 */
+#define BCM_MPLS_SUPPORT  
 #define BCM_EXTND_SBUS_SUPPORT
 #define BCM_SBUSDMA_SUPPORT
 #define BCM_TIMESYNC_SUPPORT
@@ -1754,7 +1755,8 @@
     defined(BCM_88480_A0) || defined(BCM_88480_B0) || \
     defined(BCM_88800_A0) || defined(BCM_88800_A1) || defined(BCM_88800_B0) || \
     defined(BCM_88850_A0) || defined(BCM_88850_A1) || defined(BCM_88850_A2) || defined(BCM_88830_A0) || \
-    defined(BCM_56370_A0) || defined(BCM_56370_A2) || defined(BCM_56375_A0) || defined(BCM_56375_A2)
+    defined(BCM_56370_A0) || defined(BCM_56370_A2) || defined(BCM_56375_A0) || defined(BCM_56375_A2) || \
+    defined(BCM_DNX3_SUPPORT) || defined(BCM_88920_A0)
 #define BCM_TIMESYNC_TIME_CAPTURE_SUPPORT
 #endif
 
@@ -2129,6 +2131,7 @@ typedef enum soc_chip_types_e {
     SOC_CHIP_BCM88800_A1,
     SOC_CHIP_BCM88850_A0,
     SOC_CHIP_BCM88830_A0,
+    SOC_CHIP_BCM8216_A0,
 #ifdef BCM_DNX3_SUPPORT
     SOC_CHIP_BCM88860_A0,
     SOC_CHIP_BCM88870_A0,
@@ -2279,6 +2282,7 @@ typedef enum soc_chip_types_e {
     /* SOC_CHIP_BCM88800_A1 */ SOC_CHIP_BCM8880X, \
     /* SOC_CHIP_BCM88850_A0 */ SOC_CHIP_BCM8885X, \
     /* SOC_CHIP_BCM88830_A0 */ SOC_CHIP_BCM8883X, \
+    /* SOC_CHIP_BCM8216_A0 */ SOC_CHIP_BCM8216, \
     SOC_CHIP_TYPE_MAP_INIT_ADDITIONAL \
     SOC_CHIP_DNX_TYPE_MAP_INIT_ADDITIONAL \
     /* SOC_CHIP_BCM88480_A0 */ SOC_CHIP_BCM8848X, \
@@ -2422,6 +2426,7 @@ typedef enum soc_chip_types_e {
     "BCM88800_A1", \
     "BCM88850_A0", \
     "BCM88830_A0", \
+    "BCM8216_A0", \
     SOC_CHIP_TYPE_NAMES_INIT_ADDITIONAL \
     SOC_CHIP_DNX_TYPE_NAMES_INIT_ADDITIONAL \
     "BCM88480_A0", \
@@ -2532,6 +2537,7 @@ typedef enum soc_chip_groups_e {
     SOC_CHIP_BCM8880X,
     SOC_CHIP_BCM8885X,
     SOC_CHIP_BCM8883X,
+    SOC_CHIP_BCM8216,
 #ifdef BCM_DNX3_SUPPORT
     SOC_CHIP_BCM8886X,
     SOC_CHIP_BCM8887X,
@@ -2639,6 +2645,7 @@ typedef enum soc_chip_groups_e {
     "BCM8880X", \
     "BCM8885X", \
     "BCM8883X", \
+    "BCM8216", \
     SOC_CHIP_GROUP_NAMES_INIT_ADDITIONAL \
     SOC_CHIP_DNX_GROUP_NAMES_INIT_ADDITIONAL \
     "BCM8848X", \
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h
index 4db0a7076ecf..f88e35e94b52 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h
@@ -1,6 +1,6 @@
 /*
  * $Id:$
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  */
 
 #ifndef _SOC_DEVIDS_H
@@ -1864,6 +1865,23 @@
 #define BCM8884E_DEVICE_ID      0x884E
 #define BCM8884F_DEVICE_ID      0x884F
 
+#define BCM88810_DEVICE_ID      0x8810
+#define BCM88811_DEVICE_ID      0x8811
+#define BCM88812_DEVICE_ID      0x8812
+#define BCM88813_DEVICE_ID      0x8813
+#define BCM88814_DEVICE_ID      0x8814
+#define BCM88815_DEVICE_ID      0x8815
+#define BCM88816_DEVICE_ID      0x8816
+#define BCM88817_DEVICE_ID      0x8817
+#define BCM88818_DEVICE_ID      0x8818
+#define BCM88819_DEVICE_ID      0x8819
+#define BCM8881A_DEVICE_ID      0x881A
+#define BCM8881B_DEVICE_ID      0x881B
+#define BCM8881C_DEVICE_ID      0x881C
+#define BCM8881D_DEVICE_ID      0x881D
+#define BCM8881E_DEVICE_ID      0x881E
+#define BCM8881F_DEVICE_ID      0x881F
+
 #define J2X_DEVICE_ID                 0x8830
 #define J2X_A0_REV_ID           DNXC_A0_REV_ID
 #define BCM88830_DEVICE_ID      J2X_DEVICE_ID
@@ -1884,6 +1902,11 @@
 #define BCM8883E_DEVICE_ID      0x883E
 #define BCM8883F_DEVICE_ID      0x883F
 
+#define J2Z_DEVICE_ID           0x216
+#define J2Z_A0_REV_ID           DNXC_A0_REV_ID
+#define BCM8216_DEVICE_ID       J2Z_DEVICE_ID
+#define BCM8216_A0_REV_ID       J2Z_A0_REV_ID
+
 #ifdef BCM_DNX3_SUPPORT
 #define JERICHO3_DEVICE_ID      0x8860
 #define Q3_DEVICE_ID_START      0x886a
@@ -2046,6 +2069,9 @@
 #define BCM56692_DEVICE_ID 0xb692
 #define BCM56692_A0_REV_ID 0x0001
 
+#define BCM78800_DEVICE_ID 0xf800
+#define BCM78800_A0_REV_ID 0x0001
+
 #define BCM56880_DEVICE_ID 0xb880
 #define BCM56880_A0_REV_ID 0x0001
 #define BCM56880_B0_REV_ID 0x0011
@@ -2076,6 +2102,9 @@
 #define BCM56788_A1_REV_ID 0x0002
 #define BCM56789_DEVICE_ID 0xb789
 #define BCM56789_A0_REV_ID 0x0001
+#define BCM56089_DEVICE_ID 0xb089
+#define BCM56089_A0_REV_ID 0x0001
+#define BCM56089_A1_REV_ID 0x0002
 
 #define BCM56990_DEVICE_ID 0xb990
 #define BCM56990_A0_REV_ID 0x0001
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/drv.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/drv.h
index e204a84b2ec2..4971666577e9 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/drv.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/drv.h
@@ -1,6 +1,6 @@
 /* 
  * $Id:$
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        drv.h
  * Purpose:     Driver definitions
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/enet.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/enet.h
index 31ae2947bfb3..849c7e7f80ec 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/enet.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/enet.h
@@ -1,6 +1,6 @@
 /*
  * $Id:$
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * Stub header file
  */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/higig.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/higig.h
index 6658c81efa84..d9c096c3bd13 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/higig.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/higig.h
@@ -1,6 +1,6 @@
 /*
  * $Id: higig.h,v 1.29 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        higig.h
  */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/maxdef.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/maxdef.h
index 31ae2947bfb3..849c7e7f80ec 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/maxdef.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/maxdef.h
@@ -1,6 +1,6 @@
 /*
  * $Id:$
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * Stub header file
  */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/rx.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/rx.h
index cc9269710fa9..fa11ab3c5ee7 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/rx.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/rx.h
@@ -1,6 +1,6 @@
 /*
  * $Id: rx.h,v 1.16 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  */
 
 #ifndef _SOC_RX_H
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type19.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type19.h
index 836eede1a56c..4836613fcccf 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type19.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type19.h
@@ -1,6 +1,6 @@
 /*
  * $Id: type19.h,v 1.4 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        soc/shared/dcbformats/type19.h
  * Purpose:     Define dma control block (DCB) format for a type19 DCB
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type23.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type23.h
index 4edcfbe62d68..d1ed8b4a9475 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type23.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type23.h
@@ -1,6 +1,6 @@
 /*
  * $Id: type23.h,v 1.6 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        soc/shared/dcbformats/type23.h
  * Purpose:     Define dma control block (DCB) format for a type23 DCB
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type24.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type24.h
index 52667f664e56..08e6be7f7781 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type24.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type24.h
@@ -1,6 +1,6 @@
 /*
  * $Id: type24.h,v 1.3 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        soc/shared/dcbformats/type24.h
  * Purpose:     Define dma control block (DCB) format for a type24 DCB
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type26.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type26.h
index 2d9d70156ae4..5f26aa7cb97c 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type26.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type26.h
@@ -1,6 +1,6 @@
 /*
  * $Id: type26.h,v 1.5 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        soc/shared/dcbformats/type26.h
  * Purpose:     Define dma control block (DCB) format for a type26 DCB
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type29.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type29.h
index 723d36613f0c..c06a7704e5ca 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type29.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type29.h
@@ -1,6 +1,6 @@
 /*
  * $Id: type29.h,v 1.2 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        soc/shared/dcbformats/type29.h
  * Purpose:     Define dma control block (DCB) format for a type29 DCB
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type31.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type31.h
index 6a57b710b421..faf428c8ff15 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type31.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type31.h
@@ -1,6 +1,6 @@
 /*
  * $Id: type31.h,v 1.1.6.2 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        soc/shared/dcbformats/type31.h
  * Purpose:     Define dma control block (DCB) format for a type31 DCB
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type32.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type32.h
index ec87c0e044f6..c2bc9d2db05a 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type32.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type32.h
@@ -1,6 +1,6 @@
 /*
  * $Id: $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        soc/shared/dcbformats/type32.h
  * Purpose:     Define dma control block (DCB) format for a type32 DCB
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type33.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type33.h
index dcf1dd930b76..68cb1faf58c9 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type33.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type33.h
@@ -1,6 +1,6 @@
 /*
  * $Id$
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        soc/shared/dcbformats/type33.h
  * Purpose:     Define dma control block (DCB) format for a type33 DCB
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type34.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type34.h
index 1a8ff84f04c9..893696fae9a8 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type34.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type34.h
@@ -1,6 +1,6 @@
 /*
  * $Id: $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        soc/shared/dcbformats/type34.h
  * Purpose:     Define dma control block (DCB) format for a type34 DCB
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h
index b201ed2cc134..9f377ec99117 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h
@@ -1,6 +1,6 @@
 /*
  * $Id$
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        soc/shared/dcbformats/type35.h
  * Purpose:     Define dma control block (DCB) format for a type35 DCB
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type36.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type36.h
index 5c9b3b499f52..daa98ea802f1 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type36.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type36.h
@@ -1,6 +1,6 @@
 /*
  * $Id: $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        soc/shared/dcbformats/type36.h
  * Purpose:     Define dma control block (DCB) format for a type36 DCB
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type37.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type37.h
index 846c5f678d27..294998d3d39a 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type37.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type37.h
@@ -1,6 +1,6 @@
 /*
  * $Id: $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        soc/shared/dcbformats/type37.h
  * Purpose:     Define dma control block (DCB) format for a type37 DCB
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type38.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type38.h
index 9399b9d28dc2..141b4c150a86 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type38.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type38.h
@@ -1,6 +1,6 @@
 /*
  * $Id: $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        soc/shared/dcbformats/type38.h
  * Purpose:     Define dma control block (DCB) format for a type38 DCB
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/types.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/types.h
index 4799553b81ab..0f204e52acd6 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/types.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/types.h
@@ -1,6 +1,6 @@
 /* 
  * $Id:$
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        types.h
  * Purpose:     System-on-a-Chip data types
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/make/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/make/Makefile
index 02d411edecbb..ecc3dc0b3913 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/make/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/make/Makefile
@@ -1,5 +1,5 @@
 # $Id: Makefile,v 1.2 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -24,6 +24,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 #
 # Makefile for DCB Library
 #
@@ -86,11 +87,9 @@ DFLAGS += -DBCM_56370_A0    # HELIX5
 DFLAGS += -DBCM_56960_A0    # TOMAHAWK
 DFLAGS += -DBCM_56970_A0    # TOMAHAWK2
 DFLAGS += -DBCM_56980_A0    # TOMAHAWK3
-# SONIC-79319 Start
 DFLAGS += -DBCM_56470_A0    # FIREBOLT6
 DFLAGS += -DBCM_56275_A0    # HURRICANE4
 DFLAGS += -DBCM_56175_A0    # TRIDENT3-X1
-# SONIC-79319 End
 
 #
 # Compiler Related Options
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/dcb/dcb_handler.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/dcb/dcb_handler.c
index 2fa8f7b9d653..0655203c34d8 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/dcb/dcb_handler.c
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/dcb/dcb_handler.c
@@ -1,6 +1,6 @@
 /* 
  * $Id:$
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        dcb.c
  * Purpose:     DCB Library
@@ -147,13 +148,11 @@ _dcb_op_get(uint16 dev_id, uint8 rev_id)
 #endif
 #if defined(BCM_TRIDENT3_SUPPORT)
     case DEVICE_FAMILY(BCM56870_DEVICE_ID):    /* Trident 3*/
-    /* SONIC-79319 Start */
     case DEVICE_FAMILY(BCM56770_DEVICE_ID):    /* Maverick 2*/
     case DEVICE_FAMILY(BCM56370_DEVICE_ID):    /* Helix 5*/
     case DEVICE_FAMILY(BCM56470_DEVICE_ID):    /* Firebolt 6*/
     case DEVICE_FAMILY(BCM56275_DEVICE_ID):    /* Hurricane 4*/
     case DEVICE_FAMILY(BCM56175_DEVICE_ID):    /* Trident3 X1*/
-    /* SONIC-79319 End */
         return &dcb36_op;
         break;
 #endif
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/test/dcb_test.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/test/dcb_test.c
index 20f64e4f3ee6..dd66020fa96f 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/test/dcb_test.c
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/test/dcb_test.c
@@ -1,6 +1,6 @@
 /* 
  * $Id:$
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,12 +25,14 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        test.c
  * Purpose:     DCB Library Example
  *
  */
 
+#include <appl/dcb/dcb_int.h>
 #include <appl/dcb/dcb_handler.h>
 
 int dcb_example()
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/soc/common/dcb.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/soc/common/dcb.c
index 4f767e415e8e..349980d2c492 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/soc/common/dcb.c
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/soc/common/dcb.c
@@ -1,6 +1,6 @@
 /*
  * $Id$
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  *
  * File:        dcb.c
  * Purpose:     DCB manipulation routines
@@ -1309,7 +1310,7 @@ dcb23_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg)
     uint32 hgh[4];
     soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0];
     COMPILER_REFERENCE(dt_mode);
-    
+
     hgh[0] = soc_htonl(d->mh0);
     hgh[1] = soc_htonl(d->mh1);
     hgh[2] = soc_htonl(d->mh2);
@@ -3453,7 +3454,7 @@ static uint32 ep_to_cpu_hdr36_rx_crc_get(void *hdr) {
 static uint32
 ep_to_cpu_hdr36_rx_untagged_get(void *hdr, int dt_mode, int ingport_is_hg)
 {
-/*FIXME: tag_status (itag_status) field is removed*/
+
     return 0;
 }
 
@@ -3561,7 +3562,7 @@ GETHDRFUNCNULL(36, rx_switch_drop)
 GETHDRFUNCNULL(36, olp_encap_oam_pkt)
 
 #if 0
-/* FIXME: Keep it for now, maybe useful later */
+
 static void
 ep_to_cpu_hdr_funcerr(int dt, char *name)
 {
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/Makefile
index 46e907c4ac57..3d153b4994a8 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/Makefile
@@ -1,6 +1,6 @@
 # -*- Makefile -*-
 # $Id: Makefile,v 1.3 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -25,6 +25,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 #
 LOCALDIR = systems/linux/kernel/modules/genl-packet
 
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/bcm-knet.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/bcm-knet.h
index 849470d8c5f7..10763a50c620 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/bcm-knet.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/bcm-knet.h
@@ -1,6 +1,6 @@
 /*
  * $Id: bcm-knet.h,v 1.4 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  */
 #ifndef __LINUX_BCM_KNET_H__
 #define __LINUX_BCM_KNET_H__
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/gmodule.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/gmodule.h
index 66fd0211edf3..07cc9c55e702 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/gmodule.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/gmodule.h
@@ -1,6 +1,6 @@
 /*
  * $Id: gmodule.h,v 1.9 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  */
 
 #ifndef __COMMON_LINUX_KRN_GMODULE_H__
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h
index cf117eb65872..7bb0c5b3b7f2 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h
@@ -1,6 +1,6 @@
 /*
  * $Id: lkm.h,v 1.22 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -25,6 +25,7 @@
  * This software is governed by the Broadcom Open Network Switch APIs license:
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
+ * 
  */
 
 #ifndef __COMMON_LINUX_KRN_LKM_H__
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/Makefile
index c8d629ac1d47..e7bee1890c69 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/Makefile
@@ -1,6 +1,6 @@
 # -*- Makefile -*-
 # $Id: Makefile,v 1.3 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -25,6 +25,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 #
 LOCALDIR = systems/linux/kernel/modules/knet-cb
 
@@ -69,6 +70,7 @@ build: $(KMODULE)
 # is not created and all action is done in systems/linux/kernel/modules/knet-cb
 #
 $(KMODULE): $(SRCS_COMPOSING)
+	mkdir -p $(BLDDIR)
 	rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR)
 	rm -f $(BLDDIR)/*.c
 	rm -f $(BLDDIR)/*.o
@@ -107,13 +109,12 @@ $(KMODULE): $(MODULE)
 	mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR)
 	cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile
 	cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers
-	MOD_NAME=$(THIS_MOD_NAME) KBUILD_EXTRA_SYMBOLS="${KBUILD_EXTRA_SYMBOLS}" $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko
-# }
-endif
+	MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko
 
 # Make.depend is before clean:: so that Make.depend's clean:: runs first.
-
 include ${SDK}/make/Make.depend
+# }
+endif
 
 clean::
 	$(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c
index 4aebc6a0df2e..42a6e92f5c0e 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2017-2019 Broadcom
+ * Copyright 2017-2024 Broadcom
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, version 2, as
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/Makefile
index b5106a586be9..67089f94b5e1 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/Makefile
@@ -1,6 +1,6 @@
 # -*- Makefile -*-
 # $Id: Makefile,v 1.2 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -25,6 +25,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 #
 LOCALDIR = systems/linux/kernel/modules/shared
 
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c
index db80d3d3afb7..16cfefb9ad51 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c
@@ -1,6 +1,6 @@
 /*
  * $Id: gmodule.c,v 1.20 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -26,6 +26,7 @@
  * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
  * 
  * 
+ * 
  * Generic Linux Module Framework
  *
  * Hooks up your driver to the kernel 
@@ -38,7 +39,7 @@
 static gmodule_t* _gmodule = NULL;
 
 
-/* FIXME: support dynamic debugging */
+
 
 static int _dbg_enable = 0;
 
@@ -318,17 +319,17 @@ void __exit
 cleanup_module(void)
 {
     if(!_gmodule) return;
-  
+
     /* Specific Cleanup */
     if(_gmodule->cleanup) {
 	_gmodule->cleanup();
     }
-  
+
     /* Remove any proc entries */
     if(_gmodule->pprint) {
 	_gmodule_remove_proc();
     }
-  
+
     /* Finally, remove ourselves from the universe */
     unregister_chrdev(_gmodule->major, _gmodule->name);
 }
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/ksal.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/ksal.c
deleted file mode 100644
index 683928cde1a1..000000000000
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/ksal.c
+++ /dev/null
@@ -1,270 +0,0 @@
-/*
- * $Id: ksal.c,v 1.1 Broadcom SDK $
- * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
- * 
- * Permission is granted to use, copy, modify and/or distribute this
- * software under either one of the licenses below.
- * 
- * License Option 1: GPL
- * 
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License, version 2, as
- * published by the Free Software Foundation (the "GPL").
- * 
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License version 2 (GPLv2) for more details.
- * 
- * You should have received a copy of the GNU General Public License
- * version 2 (GPLv2) along with this source code.
- * 
- * 
- * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
- * 
- * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
- * 
- */
-
-#include <sal/core/sync.h>
-#include <sal/core/thread.h>
-
-#include "lkm.h"
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
-#include <linux/semaphore.h>
-#else
-#include <asm/semaphore.h>
-#endif
-#include <linux/interrupt.h>
-#include <linux/sched.h>
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,9,0)
-#include <linux/sched/rt.h>
-#endif
-#include <linux/time.h>
-/* Check if system has ktime_get_ts64() */
-#ifndef LINUX_HAS_MONOTONIC_TIME
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,17,0)
-#include <linux/timekeeping.h>
-#define LINUX_HAS_MONOTONIC_TIME
-#endif
-#endif
-
-#if defined(MAX_USER_RT_PRIO) || defined(MAX_RT_PRIO)
-/* Assume 2.6 scheduler */
-#define SAL_YIELD(task) \
-    yield()
-#else
-/* Assume 2.4 scheduler */
-#define SAL_YIELD(task) \
-do { \
-    task->policy |= SCHED_YIELD; \
-    schedule(); \
-} while (0)
-#endif
-
-#define SECOND_USEC (1000000)
-#define USECS_PER_JIFFY (SECOND_USEC / HZ)
-#define USEC_TO_JIFFIES(usec) ((usec + (USECS_PER_JIFFY - 1)) / USECS_PER_JIFFY)
-
-#define sal_alloc(size, desc)   kmalloc(size, GFP_KERNEL)
-#define sal_free(ptr)           kfree(ptr)
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)
-#define WQ_SLEEP(a, b)          wait_event_interruptible_timeout(a, NULL, b)
-#else
-#define WQ_SLEEP(a, b)          interruptible_sleep_on_timeout(&(a), b)
-#endif
-/*
- * sem_ctrl_t
- *
- *   The semaphore control type uses the binary property to implement
- *   timed semaphores with improved performance using wait queues.
- */
-
-typedef struct sem_ctrl_s {
-    struct semaphore    sem;
-    int                 binary;
-    int                 cnt;
-    wait_queue_head_t   wq;
-} sem_ctrl_t;
-
-sal_sem_t
-sal_sem_create(char *desc, int binary, int initial_count)
-{
-    sem_ctrl_t *s;
-
-    if ((s = sal_alloc(sizeof(*s), desc)) != 0) {
-	sema_init(&s->sem, initial_count);
-        s->binary = binary;
-        if (s->binary) {
-            init_waitqueue_head(&s->wq);
-        }
-    }
-
-    return (sal_sem_t) s;
-}
-
-void
-sal_sem_destroy(sal_sem_t b)
-{
-    sem_ctrl_t *s = (sem_ctrl_t *) b;
-
-    if (s == NULL) {
-	return;
-    }
-
-    /*
-     * the linux kernel does not have a sema_destroy(s)
-     */
-    sal_free(s);
-}
-
-int
-sal_sem_take(sal_sem_t b, int usec)
-{
-    sem_ctrl_t *s = (sem_ctrl_t *) b;
-    int			err;
-
-    if (usec == sal_sem_FOREVER && !in_interrupt()) {
-	err = down_interruptible(&s->sem);
-    } else {
-	int		time_wait = 1;
-        int             cnt = s->cnt;
-
-	for (;;) {
-	    if (down_trylock(&s->sem) == 0) {
-		err = 0;
-		break;
-	    }
-
-            if (s->binary) {
-
-                /* Wait for event or timeout */
-
-                if (time_wait > 1) {
-                    err = 1;
-                    break;
-                }
-                err = wait_event_interruptible_timeout(s->wq, cnt != s->cnt, 
-                                                       USEC_TO_JIFFIES(usec));
-                if (err < 0) {
-                    break;
-                }
-                time_wait++;
-
-            } else {
-
-                /* Retry algorithm with exponential backoff */
-
-                if (time_wait > usec) {
-                    time_wait = usec;
-                }
-
-                sal_usleep(time_wait);
-                
-                usec -= time_wait;
-            
-                if (usec == 0) {
-                    err = ETIMEDOUT;
-                    break;
-                }
-
-                if ((time_wait *= 2) > 100000) {
-                    time_wait = 100000;
-                }
-	    }
-	}
-    }
-    return err ? -1 : 0;
-}
-
-int
-sal_sem_give(sal_sem_t b)
-{
-    sem_ctrl_t *s = (sem_ctrl_t *) b;
-
-    up(&s->sem);
-    if (s->binary) {
-        s->cnt++;
-        wake_up_interruptible(&s->wq);
-    }
-    return 0;
-}
-
-uint32
-sal_time_usecs(void)
-{
-#ifdef LINUX_HAS_MONOTONIC_TIME
-    struct timespec64 ts;
-    ktime_get_ts64(&ts);
-    return (ts.tv_sec * SECOND_USEC + ts.tv_nsec / 1000);
-#else
-    struct timeval ltv;
-    do_gettimeofday(&ltv);
-    return (ltv.tv_sec * SECOND_USEC + ltv.tv_usec);
-#endif
-}
-    
-void
-sal_usleep(uint32 usec)
-{
-    uint32 start_usec;
-    wait_queue_head_t queue;
-
-    if (usec <= SECOND_USEC / HZ) {
-        start_usec = sal_time_usecs();
-        do {
-            SAL_YIELD(current);
-        } while ((sal_time_usecs() - start_usec) < usec);
-    } else {
-        init_waitqueue_head(&queue);
-        WQ_SLEEP(queue, USEC_TO_JIFFIES(usec));
-    }
-}
-
-void
-sal_udelay(uint32 usec)
-{
-    static volatile int _sal_udelay_counter;
-    static int loops = 0;
-    int ix, iy;
-
-    if (loops == 0 || usec == 0) {      /* Need calibration? */
-        int max_loops;
-        int start = 0, stop = 0;
-        int mpt = USECS_PER_JIFFY;      /* usec/tick */
-
-        for (loops = 1; loops < 0x1000 && stop == start; loops <<= 1) {
-            /* Wait for clock turn over */
-            for (stop = start = jiffies; start == stop; start = jiffies) {
-                /* Empty */
-            }
-            sal_udelay(mpt);    /* Single recursion */
-            stop = jiffies;
-        }
-
-        max_loops = loops / 2;  /* Loop above overshoots */
-
-        start = stop = 0;
-
-        if (loops < 4) {
-            loops = 4;
-        }
-
-        for (loops /= 4; loops < max_loops && stop == start; loops++) {
-            /* Wait for clock turn over */
-            for (stop = start = jiffies; start == stop; start = jiffies) {
-                /* Empty */
-            }
-            sal_udelay(mpt);    /* Single recursion */
-            stop = jiffies;
-        }
-    }
-   
-    for (iy = 0; iy < usec; iy++) {
-        for (ix = 0; ix < loops; ix++) {
-            _sal_udelay_counter++;      /* Prevent optimizations */
-        }
-    }
-}
diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile
index 333ddc27ac0d..006acfad9893 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile
@@ -1,6 +1,6 @@
 # -*- Makefile -*-
 # $Id: Makefile,v 1.4 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -25,6 +25,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 #
 
 SDK :=$(shell if [ -n "$$SDK" ] ; then\
@@ -46,6 +47,7 @@ $(error Please run this in a tree)
 endif 				
 
 export SDK
+
 override-target=linux-$(platform)
 
 ifeq ($(LINUX_MAKE_SHARED_LIB),1)
@@ -99,10 +101,12 @@ USER_BDE := $(DEST_DIR)/$(USER_BDE_LOCAL)
 KNET_CB_LOCAL := linux-knet-cb.$(KOBJ)
 KNET_CB := $(DEST_DIR)/$(KNET_CB_LOCAL)
 
+export BUILD_BCM_GENL=1
+export BUILD_GENL_PACKET=0
 GENL_PACKET_LOCAL := genl-packet.$(KOBJ)
 GENL_PACKET := $(DEST_DIR)/$(GENL_PACKET_LOCAL)
 ifndef BUILD_GENL_PACKET
-export BUILD_GENL_PACKET = 0
+export BUILD_GENL_PACKET = 1
 endif
 
 BCM_GENL_LOCAL := linux-bcm-genl.$(KOBJ)
@@ -148,7 +152,6 @@ all_targets +=$(LOCAL_TARGETS)
 endif
 endif
 
-export BUILD_BCM_GENL=1
 ifeq ($(BUILD_BCM_GENL),1)
 ifeq ($(BUILD_GENL_PACKET),1)
 all_targets += $(GENL_PACKET)
@@ -168,10 +171,6 @@ all_targets +=$(LOCAL_TARGETS)
 endif
 endif
 
-ifdef BUILD_PSAMPLE
-ADD_TO_CFLAGS += -DPSAMPLE_SUPPORT
-endif
-
 ADD_TO_CFLAGS += -I$(SDK)/systems/linux/kernel/modules/include
 COND_KNET_LIBS = libuser.$(libext)
 endif
@@ -185,6 +184,12 @@ $(1) : $(DEST_DIR)/$(notdir $(1))
 endef
 endif
 
+ifeq (1,$(USE_CLANG))
+OPT_KERNEL_TOOLCHAIN = CC=clang LD=ld.lld AR=llvm-ar
+include $(SDK)/make/Make.clang
+ADD_TO_KCFLAGS += $(CLANG_ADD_CFLAGS)
+endif
+
 # User BDE libraries
 ADD_TO_CFLAGS += -I$(SDK)/systems/bde/linux/include
 
@@ -194,24 +199,26 @@ CFLAGS += $(ADD_TO_CFLAGS)
 CFLAGS:=$(filter-out -fPIC, $(CFLAGS))
 
 kernel_modules:
-	$(MAKE) -C $(SDK)/systems/bde/linux/kernel kernel_version=$(kernel_version)
-	$(MAKE) -C $(SDK)/systems/bde/linux/user/kernel kernel_version=$(kernel_version)
+	$(MAKE) -C $(SDK)/systems/bde/linux/kernel $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \
+		OPT_CFLAGS="$(ADD_TO_KCFLAGS)"
+	$(MAKE) -C $(SDK)/systems/bde/linux/user/kernel $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \
+		OPT_CFLAGS="$(ADD_TO_KCFLAGS)"
 ifeq ($(BUILD_KNET),1)
-	$(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared kernel_version=$(kernel_version) \
-		override-target=linux-$(platform)
-	$(MAKE) -C $(SDK)/systems/linux/kernel/modules/bcm-knet kernel_version=$(kernel_version) \
-		override-target=linux-$(platform)
+	$(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \
+		OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform)
+	$(MAKE) -C $(SDK)/systems/linux/kernel/modules/bcm-knet $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \
+		OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform)
 ifneq (,$(filter knet-cb,$(knet_subdirs)))
-	$(MAKE) -C $(SDK)/systems/linux/kernel/modules/knet-cb kernel_version=$(kernel_version) \
-		override-target=linux-$(platform)
+	$(MAKE) -C $(SDK)/systems/linux/kernel/modules/knet-cb $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \
+		OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform)
 endif
 ifneq (,$(filter bcm-genl,$(knet_subdirs)))
 ifneq (,$(filter genl-packet,$(knet_subdirs)))
-	$(MAKE) -C $(SDK)/systems/linux/kernel/modules/genl-packet kernel_version=$(kernel_version) \
-		override-target=linux-$(platform)
+	$(MAKE) -C $(SDK)/systems/linux/kernel/modules/genl-packet $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \
+		OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform)
 endif
-	$(MAKE) -C $(SDK)/systems/linux/kernel/modules/bcm-genl kernel_version=$(kernel_version) \
-		override-target=linux-$(platform)
+	$(MAKE) -C $(SDK)/systems/linux/kernel/modules/bcm-genl $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \
+		OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform)
 endif
 endif
 
diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile
index 8b75c6e43742..01dd4e4e6f8d 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile
@@ -1,6 +1,6 @@
 # -*- Makefile -*-
 # $Id: Makefile,v 0.1 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -25,6 +25,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 
 #
 # This make job requires the following environment variables to be set:
diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile
index 0f4a40a16aaa..5eeee4fe03d2 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile
@@ -1,6 +1,6 @@
 # -*- Makefile -*-
 # $Id: Makefile,v 1.7 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -25,6 +25,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 
 #
 # This make job requires the following environment variables to be set:
diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile
index 195345051c34..26c0ffbe0ea1 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile
@@ -1,6 +1,6 @@
 # -*- Makefile -*-
 # $Id: Makefile,v 1.7 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -25,6 +25,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 
 #
 # This make job requires the following environment variables to be set:
diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile
index cc5a6455603d..39353225bda8 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile
@@ -1,6 +1,6 @@
 # -*- Makefile -*-
 # $Id: Makefile,v 1.7 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -25,6 +25,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 
 #
 # This make job requires the following environment variables to be set:
diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile
index 163dd916c7c4..c33e0825afdf 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile
@@ -1,6 +1,6 @@
 # -*- Makefile -*-
 # $Id: Makefile,v 1.7 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -25,6 +25,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 
 #
 # This make job requires the following environment variables to be set:
diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile
index ac8c81722ba7..d354882a81df 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile
@@ -1,6 +1,6 @@
 # -*- Makefile -*-
 # $Id: Makefile,v 0.1 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -25,6 +25,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 
 #
 # This make job requires the following environment variables to be set:
diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/x86-5_10/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/x86-5_10/Makefile
new file mode 100644
index 000000000000..ce4f94c424a2
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/user/x86-5_10/Makefile
@@ -0,0 +1,82 @@
+# -*- Makefile -*-
+# $Id: Makefile,v 0.1 Broadcom SDK $
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
+# 
+
+#
+# This make job requires the following environment variables to be set:
+#
+# SDK                - path to StrataXGS SDK root directory
+#
+# Optionally the following environment variables can be set to
+# override the default build server configuration:
+#
+# TOOLS_DIR      - path to build tools (if not in PATH already)
+# CROSS_COMPILE  - cross compile tools prefix
+# LINUX_INCLUDE  - path to Linux kernel include directory
+#
+
+# SHARED_LIBRARY_SUPPORT will enable the shared library creation - update the BINUTILSVER version.
+ifneq ($(filter $(SHARED_LIBRARY_SUPPORT) $(COMPILE_OPENNSA_SUPPORT),1),)
+# Newer GNU BINUTILS are neeed in order to avoid a known internal bug
+# in GCC that results in a linker error when creating a .so library
+export BINUTILSVER = 2.27
+endif
+
+SDK :=$(shell if [ -n "$$SDK" ] ; then\
+    echo $$SDK;\
+    else\
+    cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \
+    dir=`cd ../;pwd`;            \
+    if [ "$$dir" = "/" ] ; then        \
+       echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2;        \
+       exit 1;                \
+    fi ;                    \
+    cd $$dir;                \
+    done ;                    \
+    pwd;                    \
+    fi)
+
+ifeq ($(SDK),)
+$(error Please run this in a tree)
+endif
+
+export SDK
+
+override kernel_version=5_10
+platform=x86-5_10
+
+LINUX_MAKE_USER=1
+export LINKER_RELAX = 1
+
+# SHARED_LIBRARY_SUPPORT will enable the shared library creation - add a PIC to the compilation flags.
+ifneq ($(filter $(SHARED_LIBRARY_SUPPORT) $(COMPILE_OPENNSA_SUPPORT),1),)
+ADD_TO_CFLAGS = -frecord-gcc-switches -DSAL_THREAD_STACK_MIN=8388608
+export ADD_TO_CFLAGS
+endif
+
+include ${SDK}/make/Make.linux
diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/x86-64-fc28/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/x86-64-fc28/Makefile
new file mode 100644
index 000000000000..1165fedce9a6
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/user/x86-64-fc28/Makefile
@@ -0,0 +1,86 @@
+# -*- Makefile -*-
+# $Id: Makefile,v 0.1 Broadcom SDK $
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
+# 
+
+#
+# This make job requires the following environment variables to be set:
+#
+# SDK                - path to StrataXGS SDK root directory
+#
+# Optionally the following environment variables can be set to
+# override the default build server configuration:
+#
+# TOOLS_DIR      - path to build tools (if not in PATH already)
+# CROSS_COMPILE  - cross compile tools prefix
+# LINUX_INCLUDE  - path to Linux kernel include directory
+#
+
+# SHARED_LIBRARY_SUPPORT will enable the shared library creation - update the BINUTILSVER version.
+ifneq ($(filter $(SHARED_LIBRARY_SUPPORT) $(COMPILE_OPENNSA_SUPPORT),1),)
+# Newer GNU BINUTILS are neeed in order to avoid a known internal bug
+# in GCC that results in a linker error when creating a .so library
+export BINUTILSVER = 2.27
+endif
+
+SDK :=$(shell if [ -n "$$SDK" ] ; then\
+    echo $$SDK;\
+    else\
+    cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \
+    dir=`cd ../;pwd`;            \
+    if [ "$$dir" = "/" ] ; then        \
+       echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2;        \
+       exit 1;                \
+    fi ;                    \
+    cd $$dir;                \
+    done ;                    \
+    pwd;                    \
+    fi)
+
+ifeq ($(SDK),)
+$(error Please run this in a tree)
+endif
+
+export SDK
+
+ifeq (1,$(KERNEL_5_10))
+override kernel_version=5_10
+else
+override kernel_version=4_18
+endif
+platform=x86-64-fc28
+
+LINUX_MAKE_USER=1
+export LINKER_RELAX = 1
+
+# SHARED_LIBRARY_SUPPORT will enable the shared library creation - add a PIC to the compilation flags.
+ifneq ($(filter $(SHARED_LIBRARY_SUPPORT) $(COMPILE_OPENNSA_SUPPORT),1),)
+ADD_TO_CFLAGS = -frecord-gcc-switches -DSAL_THREAD_STACK_MIN=8388608
+export ADD_TO_CFLAGS
+endif
+
+include ${SDK}/make/Make.linux
diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile
index e952ca23591e..8fdbb9042ca3 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile
@@ -1,6 +1,6 @@
 # -*- Makefile -*-
 # $Id: Makefile,v 1.2 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -25,6 +25,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 
 SDK :=$(shell if [ -n "$$SDK" ] ; then\
 	echo $$SDK;\
diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile
index c5b2b6205f28..bd572a15b4dc 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile
@@ -1,6 +1,6 @@
 # -*- Makefile -*-
 # $Id: Makefile,v 0.1 Broadcom SDK $
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -25,6 +25,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 
 #
 # This make job requires the following environment variables to be set:
diff --git a/platform/broadcom/saibcm-modules/tools/mktool.pl b/platform/broadcom/saibcm-modules/tools/mktool.pl
index 75e411e8c819..5173e0ced5f2 100644
--- a/platform/broadcom/saibcm-modules/tools/mktool.pl
+++ b/platform/broadcom/saibcm-modules/tools/mktool.pl
@@ -3,7 +3,7 @@
 #
 # $Id: mktool.pl,v 1.5 Broadcom SDK $
 # 
-# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# $Copyright: 2017-2024 Broadcom Inc. All rights reserved.
 # 
 # Permission is granted to use, copy, modify and/or distribute this
 # software under either one of the licenses below.
@@ -28,6 +28,7 @@
 # This software is governed by the Broadcom Open Network Switch APIs license:
 # https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
 # 
+# 
 
 use File::Path;
 use File::Find;

From 204602c98b99653981358780bb21f6c259b57841 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 9 Oct 2024 19:00:57 +0800
Subject: [PATCH 080/364] [submodule] Update submodule sonic-gnmi to the latest
 HEAD automatically (#20449)

#### Why I did it
src/sonic-gnmi
```
* 1b6d8c0 - (HEAD -> master, origin/master, origin/HEAD) Fix issue with getting DPU IP address from DHCP_SERVER_IPV4_PORT table (#291) (4 hours ago) [Oleksandr Ivantsiv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 0f5c591c225b..1b6d8c091bb1 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 0f5c591c225b54b4721c76dcafddc507e3472871
+Subproject commit 1b6d8c091bb162f2aeb1e524535645d5b12392c7

From 6741c8cfc4744335faf306ce4779672a1cecc93f Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 9 Oct 2024 19:01:02 +0800
Subject: [PATCH 081/364] [submodule] Update submodule sonic-swss to the latest
 HEAD automatically (#20439)

#### Why I did it
src/sonic-swss
```
* 09fc6b56 - (HEAD -> master, origin/master, origin/HEAD) Fix the issue where the test case randomly fails due to not waiting after updating the config DB. (#3305) (5 hours ago) [Hua Liu]
* c553d8d4 - [Dynamic Buffer][Mellanox] Enhance port shared headroom pool check (#3272) (28 hours ago) [Stephen Sun]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 8b99543fa274..09fc6b561901 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 8b99543fa274f083d81f6a07442b267741ceede9
+Subproject commit 09fc6b561901a06551cd9e32cd7bf58d1cf25662

From 07dd2b48418f21055f78b2321b6334dee6144742 Mon Sep 17 00:00:00 2001
From: Hua Liu <58683130+liuh-80@users.noreply.github.com>
Date: Thu, 10 Oct 2024 04:17:08 +0800
Subject: [PATCH 082/364] Bind ZMQ to midplane mgmt interface on SmartSwitch
 (#20352)

Bind ZMQ to midplane mgmt interface on SmartSwitch
---
 dockers/docker-orchagent/orchagent.sh | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/dockers/docker-orchagent/orchagent.sh b/dockers/docker-orchagent/orchagent.sh
index df29c6a258b5..ea61dadfc85b 100755
--- a/dockers/docker-orchagent/orchagent.sh
+++ b/dockers/docker-orchagent/orchagent.sh
@@ -77,13 +77,13 @@ fi
 # Enable ZMQ for SmartSwitch
 LOCALHOST_SUBTYPE=`sonic-db-cli CONFIG_DB hget "DEVICE_METADATA|localhost" "subtype"`
 if [[ x"${LOCALHOST_SUBTYPE}" == x"SmartSwitch" ]]; then
-    midplane_mgmt_ip=$( ip -json -4 addr show eth0-midplane | jq -r ".[0].addr_info[0].local" )
+    midplane_mgmt_state=$( ip -json -4 addr show eth0-midplane | jq -r ".[0].operstate" )
     mgmt_ip=$( ip -json -4 addr show eth0 | jq -r ".[0].addr_info[0].local" )
-    if [[ $midplane_ip != "" ]]; then
-        # Enable ZMQ with eth0-midplane address
-        ORCHAGENT_ARGS+=" -q tcp://${midplane_mgmt_ip}:8100"
+    if [[ $midplane_mgmt_state == "UP" ]]; then
+        # Enable ZMQ with eth0-midplane interface name
+        ORCHAGENT_ARGS+=" -q tcp://eth0-midplane:8100"
     elif [[ $mgmt_ip != "" ]] && [[ $mgmt_ip != "null" ]]; then
-        # If eth0-midplane interface does not exist, enable ZMQ with eth0 address
+        # If eth0-midplane interface does not up, enable ZMQ with eth0 address
         ORCHAGENT_ARGS+=" -q tcp://${mgmt_ip}:8100"
     else
         ORCHAGENT_ARGS+=" -q tcp://127.0.0.1:8100"

From 8bd7dc64668a6038e622b387ce05466f5e6e6c6d Mon Sep 17 00:00:00 2001
From: Chris <156943338+ccroy-arista@users.noreply.github.com>
Date: Wed, 9 Oct 2024 21:45:29 -0700
Subject: [PATCH 083/364] sonic-buildimage: Arista-7060X6-64DE-O128S2 (#20350)

Why I did it
Baseline implementation for 256x100g support in the Arista-7060X6-64PE (DCS-7060X6-64PE) has been requested by MSFT.

Work item tracking
Microsoft ADO (number only):
How I did it
Added the necessary files for baseline implementation of 128x400g implementation for Quicksilver QSFP-DD.

How to verify it
Apply change to DUT and confirm that the expected interfaces are up.
---
 .../Arista-7060X6-64DE-O128S2/BALANCED        |    1 +
 .../Arista-7060X6-64DE-O128S2/buffer_ports.j2 |    6 +
 .../Arista-7060X6-64DE-O128S2/buffers.json.j2 |    2 +
 .../buffers_defaults_t0.j2                    |    1 +
 .../buffers_defaults_t1.j2                    |    1 +
 .../Arista-7060X6-64DE-O128S2/hwsku.json      |  202 +++
 .../pg_profile_lookup.ini                     |    1 +
 .../Arista-7060X6-64DE-O128S2/port_config.ini |  131 ++
 .../Arista-7060X6-64DE-O128S2/qos.json.j2     |    1 +
 .../Arista-7060X6-64DE-O128S2/sai.profile     |    1 +
 .../th5-a7060x6-64de.config.bcm               | 1427 +++++++++++++++++
 11 files changed, 1774 insertions(+)
 create mode 120000 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/BALANCED
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffer_ports.j2
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffers.json.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffers_defaults_t0.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffers_defaults_t1.j2
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/hwsku.json
 create mode 120000 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/pg_profile_lookup.ini
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/port_config.ini
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/qos.json.j2
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/sai.profile
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/th5-a7060x6-64de.config.bcm

diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/BALANCED b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/BALANCED
new file mode 120000
index 000000000000..afd21766cc64
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/BALANCED
@@ -0,0 +1 @@
+../../../common/profiles/th5/gen/BALANCED
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffer_ports.j2
new file mode 100644
index 000000000000..725347049cf1
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffer_ports.j2
@@ -0,0 +1,6 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0, 512, 4) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffers.json.j2
new file mode 100644
index 000000000000..0b1cb2c541b6
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffers_defaults_t0.j2
new file mode 120000
index 000000000000..9524e6a476ac
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffers_defaults_t1.j2
new file mode 120000
index 000000000000..c25cc95d6d57
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/buffers_defaults_t1.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/hwsku.json b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/hwsku.json
new file mode 100644
index 000000000000..b40939ff01fd
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/hwsku.json
@@ -0,0 +1,202 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet512": {
+            "default_brkout_mode": "1x10G"
+        },
+        "Ethernet513": {
+            "default_brkout_mode": "1x10G"
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/pg_profile_lookup.ini
new file mode 120000
index 000000000000..297cddb2d223
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/pg_profile_lookup.ini
@@ -0,0 +1 @@
+BALANCED/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/port_config.ini b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/port_config.ini
new file mode 100644
index 000000000000..68f871ff6a17
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/port_config.ini
@@ -0,0 +1,131 @@
+# name       lanes                            alias         index  speed   fec
+Ethernet0    17,18,19,20                      Ethernet1/1   1      400000  rs
+Ethernet4    21,22,23,24                      Ethernet1/5   1      400000  rs
+Ethernet8    1,2,3,4                          Ethernet2/1   2      400000  rs
+Ethernet12   5,6,7,8                          Ethernet2/5   2      400000  rs
+Ethernet16   9,10,11,12                       Ethernet3/1   3      400000  rs
+Ethernet20   13,14,15,16                      Ethernet3/5   3      400000  rs
+Ethernet24   25,26,27,28                      Ethernet4/1   4      400000  rs
+Ethernet28   29,30,31,32                      Ethernet4/5   4      400000  rs
+Ethernet32   57,58,59,60                      Ethernet5/1   5      400000  rs
+Ethernet36   61,62,63,64                      Ethernet5/5   5      400000  rs
+Ethernet40   41,42,43,44                      Ethernet6/1   6      400000  rs
+Ethernet44   45,46,47,48                      Ethernet6/5   6      400000  rs
+Ethernet48   33,34,35,36                      Ethernet7/1   7      400000  rs
+Ethernet52   37,38,39,40                      Ethernet7/5   7      400000  rs
+Ethernet56   49,50,51,52                      Ethernet8/1   8      400000  rs
+Ethernet60   53,54,55,56                      Ethernet8/5   8      400000  rs
+Ethernet64   89,90,91,92                      Ethernet9/1   9      400000  rs
+Ethernet68   93,94,95,96                      Ethernet9/5   9      400000  rs
+Ethernet72   73,74,75,76                      Ethernet10/1  10     400000  rs
+Ethernet76   77,78,79,80                      Ethernet10/5  10     400000  rs
+Ethernet80   65,66,67,68                      Ethernet11/1  11     400000  rs
+Ethernet84   69,70,71,72                      Ethernet11/5  11     400000  rs
+Ethernet88   81,82,83,84                      Ethernet12/1  12     400000  rs
+Ethernet92   85,86,87,88                      Ethernet12/5  12     400000  rs
+Ethernet96   121,122,123,124                  Ethernet13/1  13     400000  rs
+Ethernet100  125,126,127,128                  Ethernet13/5  13     400000  rs
+Ethernet104  105,106,107,108                  Ethernet14/1  14     400000  rs
+Ethernet108  109,110,111,112                  Ethernet14/5  14     400000  rs
+Ethernet112  97,98,99,100                     Ethernet15/1  15     400000  rs
+Ethernet116  101,102,103,104                  Ethernet15/5  15     400000  rs
+Ethernet120  113,114,115,116                  Ethernet16/1  16     400000  rs
+Ethernet124  117,118,119,120                  Ethernet16/5  16     400000  rs
+Ethernet128  153,154,155,156                  Ethernet17/1  17     400000  rs
+Ethernet132  157,158,159,160                  Ethernet17/5  17     400000  rs
+Ethernet136  137,138,139,140                  Ethernet18/1  18     400000  rs
+Ethernet140  141,142,143,144                  Ethernet18/5  18     400000  rs
+Ethernet144  129,130,131,132                  Ethernet19/1  19     400000  rs
+Ethernet148  133,134,135,136                  Ethernet19/5  19     400000  rs
+Ethernet152  145,146,147,148                  Ethernet20/1  20     400000  rs
+Ethernet156  149,150,151,152                  Ethernet20/5  20     400000  rs
+Ethernet160  185,186,187,188                  Ethernet21/1  21     400000  rs
+Ethernet164  189,190,191,192                  Ethernet21/5  21     400000  rs
+Ethernet168  169,170,171,172                  Ethernet22/1  22     400000  rs
+Ethernet172  173,174,175,176                  Ethernet22/5  22     400000  rs
+Ethernet176  161,162,163,164                  Ethernet23/1  23     400000  rs
+Ethernet180  165,166,167,168                  Ethernet23/5  23     400000  rs
+Ethernet184  177,178,179,180                  Ethernet24/1  24     400000  rs
+Ethernet188  181,182,183,184                  Ethernet24/5  24     400000  rs
+Ethernet192  217,218,219,220                  Ethernet25/1  25     400000  rs
+Ethernet196  221,222,223,224                  Ethernet25/5  25     400000  rs
+Ethernet200  201,202,203,204                  Ethernet26/1  26     400000  rs
+Ethernet204  205,206,207,208                  Ethernet26/5  26     400000  rs
+Ethernet208  193,194,195,196                  Ethernet27/1  27     400000  rs
+Ethernet212  197,198,199,200                  Ethernet27/5  27     400000  rs
+Ethernet216  209,210,211,212                  Ethernet28/1  28     400000  rs
+Ethernet220  213,214,215,216                  Ethernet28/5  28     400000  rs
+Ethernet224  249,250,251,252                  Ethernet29/1  29     400000  rs
+Ethernet228  253,254,255,256                  Ethernet29/5  29     400000  rs
+Ethernet232  233,234,235,236                  Ethernet30/1  30     400000  rs
+Ethernet236  237,238,239,240                  Ethernet30/5  30     400000  rs
+Ethernet240  225,226,227,228                  Ethernet31/1  31     400000  rs
+Ethernet244  229,230,231,232                  Ethernet31/5  31     400000  rs
+Ethernet248  241,242,243,244                  Ethernet32/1  32     400000  rs
+Ethernet252  245,246,247,248                  Ethernet32/5  32     400000  rs
+Ethernet256  273,274,275,276                  Ethernet33/1  33     400000  rs
+Ethernet260  277,278,279,280                  Ethernet33/5  33     400000  rs
+Ethernet264  257,258,259,260                  Ethernet34/1  34     400000  rs
+Ethernet268  261,262,263,264                  Ethernet34/5  34     400000  rs
+Ethernet272  265,266,267,268                  Ethernet35/1  35     400000  rs
+Ethernet276  269,270,271,272                  Ethernet35/5  35     400000  rs
+Ethernet280  281,282,283,284                  Ethernet36/1  36     400000  rs
+Ethernet284  285,286,287,288                  Ethernet36/5  36     400000  rs
+Ethernet288  313,314,315,316                  Ethernet37/1  37     400000  rs
+Ethernet292  317,318,319,320                  Ethernet37/5  37     400000  rs
+Ethernet296  297,298,299,300                  Ethernet38/1  38     400000  rs
+Ethernet300  301,302,303,304                  Ethernet38/5  38     400000  rs
+Ethernet304  289,290,291,292                  Ethernet39/1  39     400000  rs
+Ethernet308  293,294,295,296                  Ethernet39/5  39     400000  rs
+Ethernet312  305,306,307,308                  Ethernet40/1  40     400000  rs
+Ethernet316  309,310,311,312                  Ethernet40/5  40     400000  rs
+Ethernet320  345,346,347,348                  Ethernet41/1  41     400000  rs
+Ethernet324  349,350,351,352                  Ethernet41/5  41     400000  rs
+Ethernet328  329,330,331,332                  Ethernet42/1  42     400000  rs
+Ethernet332  333,334,335,336                  Ethernet42/5  42     400000  rs
+Ethernet336  321,322,323,324                  Ethernet43/1  43     400000  rs
+Ethernet340  325,326,327,328                  Ethernet43/5  43     400000  rs
+Ethernet344  337,338,339,340                  Ethernet44/1  44     400000  rs
+Ethernet348  341,342,343,344                  Ethernet44/5  44     400000  rs
+Ethernet352  377,378,379,380                  Ethernet45/1  45     400000  rs
+Ethernet356  381,382,383,384                  Ethernet45/5  45     400000  rs
+Ethernet360  361,362,363,364                  Ethernet46/1  46     400000  rs
+Ethernet364  365,366,367,368                  Ethernet46/5  46     400000  rs
+Ethernet368  353,354,355,356                  Ethernet47/1  47     400000  rs
+Ethernet372  357,358,359,360                  Ethernet47/5  47     400000  rs
+Ethernet376  369,370,371,372                  Ethernet48/1  48     400000  rs
+Ethernet380  373,374,375,376                  Ethernet48/5  48     400000  rs
+Ethernet384  409,410,411,412                  Ethernet49/1  49     400000  rs
+Ethernet388  413,414,415,416                  Ethernet49/5  49     400000  rs
+Ethernet392  393,394,395,396                  Ethernet50/1  50     400000  rs
+Ethernet396  397,398,399,400                  Ethernet50/5  50     400000  rs
+Ethernet400  385,386,387,388                  Ethernet51/1  51     400000  rs
+Ethernet404  389,390,391,392                  Ethernet51/5  51     400000  rs
+Ethernet408  401,402,403,404                  Ethernet52/1  52     400000  rs
+Ethernet412  405,406,407,408                  Ethernet52/5  52     400000  rs
+Ethernet416  441,442,443,444                  Ethernet53/1  53     400000  rs
+Ethernet420  445,446,447,448                  Ethernet53/5  53     400000  rs
+Ethernet424  425,426,427,428                  Ethernet54/1  54     400000  rs
+Ethernet428  429,430,431,432                  Ethernet54/5  54     400000  rs
+Ethernet432  417,418,419,420                  Ethernet55/1  55     400000  rs
+Ethernet436  421,422,423,424                  Ethernet55/5  55     400000  rs
+Ethernet440  433,434,435,436                  Ethernet56/1  56     400000  rs
+Ethernet444  437,438,439,440                  Ethernet56/5  56     400000  rs
+Ethernet448  473,474,475,476                  Ethernet57/1  57     400000  rs
+Ethernet452  477,478,479,480                  Ethernet57/5  57     400000  rs
+Ethernet456  457,458,459,460                  Ethernet58/1  58     400000  rs
+Ethernet460  461,462,463,464                  Ethernet58/5  58     400000  rs
+Ethernet464  449,450,451,452                  Ethernet59/1  59     400000  rs
+Ethernet468  453,454,455,456                  Ethernet59/5  59     400000  rs
+Ethernet472  465,466,467,468                  Ethernet60/1  60     400000  rs
+Ethernet476  469,470,471,472                  Ethernet60/5  60     400000  rs
+Ethernet480  505,506,507,508                  Ethernet61/1  61     400000  rs
+Ethernet484  509,510,511,512                  Ethernet61/5  61     400000  rs
+Ethernet488  489,490,491,492                  Ethernet62/1  62     400000  rs
+Ethernet492  493,494,495,496                  Ethernet62/5  62     400000  rs
+Ethernet496  481,482,483,484                  Ethernet63/1  63     400000  rs
+Ethernet500  485,486,487,488                  Ethernet63/5  63     400000  rs
+Ethernet504  497,498,499,500                  Ethernet64/1  64     400000  rs
+Ethernet508  501,502,503,504                  Ethernet64/5  64     400000  rs
+Ethernet512  513                              Ethernet65    65     10000   none
+Ethernet513  515                              Ethernet66    66     10000   none
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/qos.json.j2 b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/qos.json.j2
new file mode 100644
index 000000000000..3e548325ea30
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/sai.profile b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/sai.profile
new file mode 100644
index 000000000000..89cfbc9f1b84
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64de.config.bcm
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/th5-a7060x6-64de.config.bcm b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/th5-a7060x6-64de.config.bcm
new file mode 100644
index 000000000000..4d9a3da5baca
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/th5-a7060x6-64de.config.bcm
@@ -0,0 +1,1427 @@
+#
+# $Copyright: (c) 2022 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+# BCM78900 64x800g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 2
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 12288
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x15047362
+                TX_LANE_MAP: 0x4152637
+                RX_POLARITY_FLIP: 0xc3
+                TX_POLARITY_FLIP: 0xcc
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17063524
+                TX_LANE_MAP: 0x60714253
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0xcc
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x6172435
+                TX_LANE_MAP: 0x71605342
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x69
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x40516273
+                TX_LANE_MAP: 0x51403726
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xc3
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71630524
+                TX_LANE_MAP: 0x4371625
+                RX_POLARITY_FLIP: 0x47
+                TX_POLARITY_FLIP: 0xc9
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70625143
+                TX_LANE_MAP: 0x60534172
+                RX_POLARITY_FLIP: 0x1e
+                TX_POLARITY_FLIP: 0x2c
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17063524
+                TX_LANE_MAP: 0x60715243
+                RX_POLARITY_FLIP: 0x38
+                TX_POLARITY_FLIP: 0x4e
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x36172405
+                TX_LANE_MAP: 0x73402516
+                RX_POLARITY_FLIP: 0xd2
+                TX_POLARITY_FLIP: 0xc9
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71630524
+                TX_LANE_MAP: 0x4371625
+                RX_POLARITY_FLIP: 0x47
+                TX_POLARITY_FLIP: 0xc9
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70625143
+                TX_LANE_MAP: 0x60534172
+                RX_POLARITY_FLIP: 0x1e
+                TX_POLARITY_FLIP: 0x6c
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x62704351
+                TX_LANE_MAP: 0x53607241
+                RX_POLARITY_FLIP: 0xb4
+                TX_POLARITY_FLIP: 0x6c
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x36172405
+                TX_LANE_MAP: 0x73402516
+                RX_POLARITY_FLIP: 0xd2
+                TX_POLARITY_FLIP: 0xc9
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71630524
+                TX_LANE_MAP: 0x4371625
+                RX_POLARITY_FLIP: 0x47
+                TX_POLARITY_FLIP: 0xc9
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70625143
+                TX_LANE_MAP: 0x60534172
+                RX_POLARITY_FLIP: 0x1e
+                TX_POLARITY_FLIP: 0x6c
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x62704351
+                TX_LANE_MAP: 0x53607241
+                RX_POLARITY_FLIP: 0xb4
+                TX_POLARITY_FLIP: 0x6c
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x36172405
+                TX_LANE_MAP: 0x73402516
+                RX_POLARITY_FLIP: 0xd2
+                TX_POLARITY_FLIP: 0xc9
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x15347062
+                TX_LANE_MAP: 0x60734152
+                RX_POLARITY_FLIP: 0x3f
+                TX_POLARITY_FLIP: 0x76
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17360524
+                TX_LANE_MAP: 0x16270435
+                RX_POLARITY_FLIP: 0x7b
+                TX_POLARITY_FLIP: 0x9b
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x36172405
+                TX_LANE_MAP: 0x27163504
+                RX_POLARITY_FLIP: 0x21
+                TX_POLARITY_FLIP: 0x91
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x43516270
+                TX_LANE_MAP: 0x37065241
+                RX_POLARITY_FLIP: 0x30
+                TX_POLARITY_FLIP: 0x16
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x15347062
+                TX_LANE_MAP: 0x60734152
+                RX_POLARITY_FLIP: 0x3f
+                TX_POLARITY_FLIP: 0x76
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17360524
+                TX_LANE_MAP: 0x16270435
+                RX_POLARITY_FLIP: 0x7b
+                TX_POLARITY_FLIP: 0x9b
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x36172405
+                TX_LANE_MAP: 0x27163504
+                RX_POLARITY_FLIP: 0x21
+                TX_POLARITY_FLIP: 0x91
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x43516270
+                TX_LANE_MAP: 0x37065241
+                RX_POLARITY_FLIP: 0x30
+                TX_POLARITY_FLIP: 0x16
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x43612705
+                TX_LANE_MAP: 0x63507241
+                RX_POLARITY_FLIP: 0xfc
+                TX_POLARITY_FLIP: 0x8e
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17360524
+                TX_LANE_MAP: 0x16270435
+                RX_POLARITY_FLIP: 0x7b
+                TX_POLARITY_FLIP: 0x9b
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x36172405
+                TX_LANE_MAP: 0x27163504
+                RX_POLARITY_FLIP: 0x21
+                TX_POLARITY_FLIP: 0x91
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x43516270
+                TX_LANE_MAP: 0x37065241
+                RX_POLARITY_FLIP: 0x30
+                TX_POLARITY_FLIP: 0x36
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x73621504
+                TX_LANE_MAP: 0x62734051
+                RX_POLARITY_FLIP: 0xf0
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71605342
+                TX_LANE_MAP: 0x6172435
+                RX_POLARITY_FLIP: 0xa5
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x60714253
+                TX_LANE_MAP: 0x17063524
+                RX_POLARITY_FLIP: 0x21
+                TX_POLARITY_FLIP: 0x69
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26370415
+                TX_LANE_MAP: 0x37265140
+                RX_POLARITY_FLIP: 0x30
+                TX_POLARITY_FLIP: 0xc3
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x15047362
+                TX_LANE_MAP: 0x4152637
+                RX_POLARITY_FLIP: 0xf0
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17063524
+                TX_LANE_MAP: 0x60714253
+                RX_POLARITY_FLIP: 0xa5
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x6172435
+                TX_LANE_MAP: 0x71605342
+                RX_POLARITY_FLIP: 0xed
+                TX_POLARITY_FLIP: 0x69
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x40516273
+                TX_LANE_MAP: 0x51403726
+                RX_POLARITY_FLIP: 0xfc
+                TX_POLARITY_FLIP: 0xc3
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70621534
+                TX_LANE_MAP: 0x14250637
+                RX_POLARITY_FLIP: 0x0c
+                TX_POLARITY_FLIP: 0x64
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71635042
+                TX_LANE_MAP: 0x61724053
+                RX_POLARITY_FLIP: 0x48
+                TX_POLARITY_FLIP: 0x9c
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x6241537
+                TX_LANE_MAP: 0x51624073
+                RX_POLARITY_FLIP: 0x7b
+                TX_POLARITY_FLIP: 0x3a
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26073415
+                TX_LANE_MAP: 0x52413706
+                RX_POLARITY_FLIP: 0xfc
+                TX_POLARITY_FLIP: 0x9e
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70621534
+                TX_LANE_MAP: 0x14250637
+                RX_POLARITY_FLIP: 0x0c
+                TX_POLARITY_FLIP: 0x64
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71635042
+                TX_LANE_MAP: 0x61724053
+                RX_POLARITY_FLIP: 0x48
+                TX_POLARITY_FLIP: 0x98
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x63714250
+                TX_LANE_MAP: 0x72615340
+                RX_POLARITY_FLIP: 0xed
+                TX_POLARITY_FLIP: 0x9d
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26073415
+                TX_LANE_MAP: 0x52413706
+                RX_POLARITY_FLIP: 0xfc
+                TX_POLARITY_FLIP: 0x9e
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70621534
+                TX_LANE_MAP: 0x14250637
+                RX_POLARITY_FLIP: 0x0c
+                TX_POLARITY_FLIP: 0x64
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71635042
+                TX_LANE_MAP: 0x61724053
+                RX_POLARITY_FLIP: 0x48
+                TX_POLARITY_FLIP: 0x98
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x63714250
+                TX_LANE_MAP: 0x72615340
+                RX_POLARITY_FLIP: 0xed
+                TX_POLARITY_FLIP: 0x9d
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26073415
+                TX_LANE_MAP: 0x52413706
+                RX_POLARITY_FLIP: 0xfc
+                TX_POLARITY_FLIP: 0x9e
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x5247163
+                TX_LANE_MAP: 0x61524073
+                RX_POLARITY_FLIP: 0x8b
+                TX_POLARITY_FLIP: 0x93
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x7261534
+                TX_LANE_MAP: 0x6351427
+                RX_POLARITY_FLIP: 0xd2
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26073415
+                TX_LANE_MAP: 0x35062714
+                RX_POLARITY_FLIP: 0x87
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x42506371
+                TX_LANE_MAP: 0x25167340
+                RX_POLARITY_FLIP: 0xe1
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x5247163
+                TX_LANE_MAP: 0x61524073
+                RX_POLARITY_FLIP: 0x8b
+                TX_POLARITY_FLIP: 0x93
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x7261534
+                TX_LANE_MAP: 0x6351427
+                RX_POLARITY_FLIP: 0xd2
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26073415
+                TX_LANE_MAP: 0x35062714
+                RX_POLARITY_FLIP: 0x87
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x42506371
+                TX_LANE_MAP: 0x25167340
+                RX_POLARITY_FLIP: 0xe1
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x62730415
+                TX_LANE_MAP: 0x73624150
+                RX_POLARITY_FLIP: 0x98
+                TX_POLARITY_FLIP: 0x1b
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x7261534
+                TX_LANE_MAP: 0x6351427
+                RX_POLARITY_FLIP: 0xd2
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26073415
+                TX_LANE_MAP: 0x35062714
+                RX_POLARITY_FLIP: 0x87
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x42506371
+                TX_LANE_MAP: 0x25167340
+                RX_POLARITY_FLIP: 0xe1
+                TX_POLARITY_FLIP: 0x62
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x73621504
+                TX_LANE_MAP: 0x62734051
+                RX_POLARITY_FLIP: 0xc2
+                TX_POLARITY_FLIP: 0x33
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71605342
+                TX_LANE_MAP: 0x6172435
+                RX_POLARITY_FLIP: 0x96
+                TX_POLARITY_FLIP: 0x33
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x60714253
+                TX_LANE_MAP: 0x17063524
+                RX_POLARITY_FLIP: 0xcc
+                TX_POLARITY_FLIP: 0x69
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26370415
+                TX_LANE_MAP: 0x37265140
+                RX_POLARITY_FLIP: 0xcc
+                TX_POLARITY_FLIP: 0xc3
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 5
+            ?
+                PORT_ID: 3
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 4
+            :
+                PC_PHYS_PORT_ID: 13
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 12
+            :
+                PC_PHYS_PORT_ID: 21
+            ?
+                PORT_ID: 13
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 14
+            :
+                PC_PHYS_PORT_ID: 29
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 23
+            :
+                PC_PHYS_PORT_ID: 37
+            ?
+                PORT_ID: 24
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 25
+            :
+                PC_PHYS_PORT_ID: 45
+            ?
+                PORT_ID: 33
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 53
+            ?
+                PORT_ID: 35
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 36
+            :
+                PC_PHYS_PORT_ID: 61
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 45
+            :
+                PC_PHYS_PORT_ID: 69
+            ?
+                PORT_ID: 46
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 47
+            :
+                PC_PHYS_PORT_ID: 77
+            ?
+                PORT_ID: 55
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 56
+            :
+                PC_PHYS_PORT_ID: 85
+            ?
+                PORT_ID: 57
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 58
+            :
+                PC_PHYS_PORT_ID: 93
+            ?
+                PORT_ID: 66
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 67
+            :
+                PC_PHYS_PORT_ID: 101
+            ?
+                PORT_ID: 68
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 69
+            :
+                PC_PHYS_PORT_ID: 109
+            ?
+                PORT_ID: 77
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 78
+            :
+                PC_PHYS_PORT_ID: 117
+            ?
+                PORT_ID: 79
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 80
+            :
+                PC_PHYS_PORT_ID: 125
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 89
+            :
+                PC_PHYS_PORT_ID: 133
+            ?
+                PORT_ID: 90
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 91
+            :
+                PC_PHYS_PORT_ID: 141
+            ?
+                PORT_ID: 99
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 100
+            :
+                PC_PHYS_PORT_ID: 149
+            ?
+                PORT_ID: 101
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 102
+            :
+                PC_PHYS_PORT_ID: 157
+            ?
+                PORT_ID: 110
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 111
+            :
+                PC_PHYS_PORT_ID: 165
+            ?
+                PORT_ID: 112
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 113
+            :
+                PC_PHYS_PORT_ID: 173
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 122
+            :
+                PC_PHYS_PORT_ID: 181
+            ?
+                PORT_ID: 123
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 124
+            :
+                PC_PHYS_PORT_ID: 189
+            ?
+                PORT_ID: 132
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 133
+            :
+                PC_PHYS_PORT_ID: 197
+            ?
+                PORT_ID: 134
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 135
+            :
+                PC_PHYS_PORT_ID: 205
+            ?
+                PORT_ID: 143
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 144
+            :
+                PC_PHYS_PORT_ID: 213
+            ?
+                PORT_ID: 145
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 146
+            :
+                PC_PHYS_PORT_ID: 221
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 155
+            :
+                PC_PHYS_PORT_ID: 229
+            ?
+                PORT_ID: 156
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 157
+            :
+                PC_PHYS_PORT_ID: 237
+            ?
+                PORT_ID: 165
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 166
+            :
+                PC_PHYS_PORT_ID: 245
+            ?
+                PORT_ID: 167
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 168
+            :
+                PC_PHYS_PORT_ID: 253
+            ?
+                PORT_ID: 176
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 177
+            :
+                PC_PHYS_PORT_ID: 261
+            ?
+                PORT_ID: 178
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 179
+            :
+                PC_PHYS_PORT_ID: 269
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 277
+            ?
+                PORT_ID: 189
+            :
+                PC_PHYS_PORT_ID: 281
+            ?
+                PORT_ID: 190
+            :
+                PC_PHYS_PORT_ID: 285
+            ?
+                PORT_ID: 198
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 199
+            :
+                PC_PHYS_PORT_ID: 293
+            ?
+                PORT_ID: 200
+            :
+                PC_PHYS_PORT_ID: 297
+            ?
+                PORT_ID: 201
+            :
+                PC_PHYS_PORT_ID: 301
+            ?
+                PORT_ID: 209
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 210
+            :
+                PC_PHYS_PORT_ID: 309
+            ?
+                PORT_ID: 211
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 212
+            :
+                PC_PHYS_PORT_ID: 317
+            ?
+                PORT_ID: 220
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 325
+            ?
+                PORT_ID: 222
+            :
+                PC_PHYS_PORT_ID: 329
+            ?
+                PORT_ID: 223
+            :
+                PC_PHYS_PORT_ID: 333
+            ?
+                PORT_ID: 231
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 232
+            :
+                PC_PHYS_PORT_ID: 341
+            ?
+                PORT_ID: 233
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 234
+            :
+                PC_PHYS_PORT_ID: 349
+            ?
+                PORT_ID: 242
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 243
+            :
+                PC_PHYS_PORT_ID: 357
+            ?
+                PORT_ID: 244
+            :
+                PC_PHYS_PORT_ID: 361
+            ?
+                PORT_ID: 245
+            :
+                PC_PHYS_PORT_ID: 365
+            ?
+                PORT_ID: 253
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 254
+            :
+                PC_PHYS_PORT_ID: 373
+            ?
+                PORT_ID: 255
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 256
+            :
+                PC_PHYS_PORT_ID: 381
+            ?
+                PORT_ID: 264
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 265
+            :
+                PC_PHYS_PORT_ID: 389
+            ?
+                PORT_ID: 266
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 267
+            :
+                PC_PHYS_PORT_ID: 397
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 276
+            :
+                PC_PHYS_PORT_ID: 405
+            ?
+                PORT_ID: 277
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 278
+            :
+                PC_PHYS_PORT_ID: 413
+            ?
+                PORT_ID: 286
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 287
+            :
+                PC_PHYS_PORT_ID: 421
+            ?
+                PORT_ID: 288
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 289
+            :
+                PC_PHYS_PORT_ID: 429
+            ?
+                PORT_ID: 297
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 298
+            :
+                PC_PHYS_PORT_ID: 437
+            ?
+                PORT_ID: 299
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 300
+            :
+                PC_PHYS_PORT_ID: 445
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 453
+            ?
+                PORT_ID: 310
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 311
+            :
+                PC_PHYS_PORT_ID: 461
+            ?
+                PORT_ID: 319
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 320
+            :
+                PC_PHYS_PORT_ID: 469
+            ?
+                PORT_ID: 321
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 322
+            :
+                PC_PHYS_PORT_ID: 477
+            ?
+                PORT_ID: 330
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 331
+            :
+                PC_PHYS_PORT_ID: 485
+            ?
+                PORT_ID: 332
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 333
+            :
+                PC_PHYS_PORT_ID: 493
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 501
+            ?
+                PORT_ID: 343
+            :
+                PC_PHYS_PORT_ID: 505
+            ?
+                PORT_ID: 344
+            :
+                PC_PHYS_PORT_ID: 509
+            ?
+                PORT_ID: 76
+            :
+                PC_PHYS_PORT_ID: 513
+            ?
+                PORT_ID: 274
+            :
+                PC_PHYS_PORT_ID: 515
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[1, 4],
+                          [11, 14],
+                          [22, 25],
+                          [33, 36],
+                          [44, 47],
+                          [55, 58],
+                          [66, 69],
+                          [77, 80],
+                          [88, 91],
+                          [99, 102],
+                          [110, 113],
+                          [121, 124],
+                          [132, 135],
+                          [143, 146],
+                          [154, 157],
+                          [165, 168],
+                          [176, 179],
+                          [187, 190],
+                          [198, 201],
+                          [209, 212],
+                          [220, 223],
+                          [231, 234],
+                          [242, 245],
+                          [253, 256],
+                          [264, 267],
+                          [275, 278],
+                          [286, 289],
+                          [297, 300],
+                          [308, 311],
+                          [319, 322],
+                          [330, 333],
+                          [341, 344]]
+            :
+                ENABLE: 0
+                SPEED: 400000
+                NUM_LANES: 4
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [[76, 76], [274, 274]]
+            :
+                ENABLE: 0
+                MAX_FRAME_SIZE: 9416
+                SPEED: 10000
+                NUM_LANES: 1
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+            sai_stats_support_mask: 0
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...

From 279a71fdec206502c76bfaba5b3577822bb41bed Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 10 Oct 2024 19:01:28 +0800
Subject: [PATCH 084/364] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#20438)

#### Why I did it
src/sonic-platform-daemons
```
* ca812b0 - (HEAD -> master, origin/master, origin/HEAD) Xcvrd crash and restart should not cause link flap on platforms needing custom NPU SI settings (#541) (2 days ago) [mihirpat1]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 604e454e6f54..ca812b0df105 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 604e454e6f54385961b0350cd0bb04a14daf4cc9
+Subproject commit ca812b0df105ecb98b90f2b9ef6b7aa24592222b

From cc3296580c009f7d5214fc18b24135e6859b8e64 Mon Sep 17 00:00:00 2001
From: Arvindsrinivasan Lakshmi Narasimhan
 <55814491+arlakshm@users.noreply.github.com>
Date: Thu, 10 Oct 2024 14:39:40 -0700
Subject: [PATCH 085/364] [chassis] add condition is yang model to make lanes
 not mandatory for chassis (#19968)

### Why I did it
In the sonic chassis the port table on the host does not lanes. Add conditions in the lab chassis to make lanes not mandatory for chassis devices

### How I did it
Add the check in `sonic-port.yang` to make lanes are mandatory in the host config_db only for non-chassis devices.

#### How to verify it
UT.
---
 .../tests/sample-chassis-packet-lc-graph.xml  |  31 ------
 src/sonic-config-engine/tests/test_cfggen.py  |  26 +++--
 .../tests/yang_model_tests/tests/port.json    |  26 ++++-
 .../yang_model_tests/tests_config/port.json   | 102 ++++++++++++++++++
 .../yang-models/sonic-port.yang               |  10 ++
 5 files changed, 150 insertions(+), 45 deletions(-)

diff --git a/src/sonic-config-engine/tests/sample-chassis-packet-lc-graph.xml b/src/sonic-config-engine/tests/sample-chassis-packet-lc-graph.xml
index c0a69c29e04e..b2dfa5d9db30 100644
--- a/src/sonic-config-engine/tests/sample-chassis-packet-lc-graph.xml
+++ b/src/sonic-config-engine/tests/sample-chassis-packet-lc-graph.xml
@@ -146,11 +146,6 @@
         </SubInterface>
       </SubInterfaces>
       <IPInterfaces>
-        <IPInterface>
-          <Name i:nil="true"/>
-          <AttachTo>Eth1/1/47</AttachTo>
-          <Prefix>27.1.1.1/24</Prefix>
-        </IPInterface>
       </IPInterfaces>
       <DownstreamSummaries/>
       <DownstreamSummarySet xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
@@ -206,11 +201,6 @@
       <PortChannelInterfaces>
       </PortChannelInterfaces>
       <IPInterfaces>
-        <IPInterface>
-          <Name i:nil="true"/>
-          <AttachTo>Eth1/1/47</AttachTo>
-          <Prefix>27.1.1.1/24</Prefix>
-        </IPInterface>
         </IPInterfaces>
        <VlanInterfaces>
        </VlanInterfaces>
@@ -261,13 +251,6 @@
   </LinkMetadataDeclaration>
   <PngDec>
     <DeviceInterfaceLinks>
-      <DeviceLinkBase>
-        <ElementType>DeviceInterfaceLink</ElementType>
-        <EndDevice>IXIA-EBGP</EndDevice>
-        <EndPort>Ethernet1</EndPort>
-        <StartDevice>str2-8808-lc2-1</StartDevice>
-        <StartPort>Eth1/1/47</StartPort>
-      </DeviceLinkBase>
       <DeviceLinkBase i:type="DeviceInterfaceLink">
         <ElementType>DeviceInterfaceLink</ElementType>
         <Bandwidth>100000</Bandwidth>
@@ -402,20 +385,6 @@
     <DeviceInfo>
       <AutoNegotiation>true</AutoNegotiation>
       <EthernetInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
-        <a:EthernetInterface>
-          <ElementType>DeviceInterface</ElementType>
-          <AlternateSpeeds i:nil="true"/>
-          <EnableAutoNegotiation>true</EnableAutoNegotiation>
-          <EnableFlowControl>true</EnableFlowControl>
-          <Index>1</Index>
-          <InterfaceName>Ethernet1/1/47</InterfaceName>
-          <InterfaceType i:nil="true"/>
-          <MultiPortsInterface>false</MultiPortsInterface>
-          <PortName>47</PortName>
-          <Priority>0</Priority>
-          <Speed>100000</Speed>
-          <SonicName>Ethernet47</SonicName>
-        </a:EthernetInterface>
       </EthernetInterfaces>
       <FlowControl>true</FlowControl>
       <Height>0</Height>
diff --git a/src/sonic-config-engine/tests/test_cfggen.py b/src/sonic-config-engine/tests/test_cfggen.py
index 19e0af5cd4dd..1ef66030244f 100644
--- a/src/sonic-config-engine/tests/test_cfggen.py
+++ b/src/sonic-config-engine/tests/test_cfggen.py
@@ -1020,15 +1020,26 @@ def test_minigraph_dhcp(self):
                 "'Vlan2000': {'dhcpv6_servers': ['fc02:2000::3', 'fc02:2000::4']}}"
             )
         )
-        
-    def test_minigraph_packet_chassis_acl(self):
-        argument = ['-m', self.packet_chassis_graph, '-p', self.packet_chassis_port_ini, '-v', "ACL_TABLE"]
+
+    def test_minigraph_packet_chassis_acl_local_host(self):
+        # CFGGEN_UNIT_TESTING is set to '2' in the set_up function
+        # this causes the port_table to have ports from the previous test
+        # causing yang validation to fail
+
+        os.environ["CFGGEN_UNIT_TESTING"] = ""
+        argument = ['-m', self.packet_chassis_graph, '-v', "ACL_TABLE"]
         output = self.run_script(argument)
+        print(output)
         self.assertEqual(
             utils.to_dict(output.strip()),
             utils.to_dict("{'SNMP_ACL': {'policy_desc': 'SNMP_ACL', 'type': 'CTRLPLANE', 'stage': 'ingress', 'services': ['SNMP']}, 'SSH_ONLY': {'policy_desc': 'SSH_ONLY', 'type': 'CTRLPLANE', 'stage': 'ingress', 'services': ['SSH']}}")
         )
 
+        # set it back to the original value
+        os.environ["CFGGEN_UNIT_TESTING"] = "2"
+
+    def test_minigraph_packet_chassis_acl_namespace(self):
+
         argument = ['-m', self.packet_chassis_graph, '-p', self.packet_chassis_port_ini, '-n', "asic1", '-v', "ACL_TABLE"]
         output = self.run_script(argument)
         self.assertEqual(
@@ -1045,20 +1056,13 @@ def test_minigraph_bgp_packet_chassis_peer(self):
         )
 
     def test_minigraph_bgp_packet_chassis_static_route(self):
-        argument = ['-m', self.packet_chassis_graph, '-p', self.packet_chassis_port_ini, '-v', "STATIC_ROUTE"]
-        output = self.run_script(argument)
-        self.assertEqual(
-            utils.to_dict(output.strip()),
-            utils.to_dict("{'8.0.0.1/32': {'nexthop': '192.168.1.2,192.168.2.2', 'ifname': 'PortChannel40,PortChannel50', 'advertise':'false', 'bfd':'true'}}")
-        )
-
         argument = ['-m', self.packet_chassis_graph, '-p', self.packet_chassis_port_ini, '-n', "asic1", '-v', "STATIC_ROUTE"]
         output = self.run_script(argument)
         self.assertEqual(
             utils.to_dict(output.strip()),
             utils.to_dict("{'8.0.0.1/32': {'nexthop': '192.168.1.2,192.168.2.2', 'ifname': 'PortChannel40,PortChannel50', 'advertise':'false', 'bfd':'true'}}")
         )
-
+        os.environ["CFGGEN_UNIT_TESTING_TOPOLOGY"] = ""
     def test_minigraph_bgp_packet_chassis_vlan_subintf(self):
         argument = ['-m', self.packet_chassis_graph, '-p', self.packet_chassis_port_ini, '-n', "asic1", '-v', "VLAN_SUB_INTERFACE"]
         output = self.run_script(argument)
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/port.json b/src/sonic-yang-models/tests/yang_model_tests/tests/port.json
index b35f9fd2231f..e00c88561955 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/port.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/port.json
@@ -151,7 +151,27 @@
         "eStrKey" : "InvalidValue",
         "eStr": ["dom_polling"]
     },
-     "PORT_AUTO_FEC_TEST": {
-         "desc": "PORT_AUTO_FEC_TEST validate auto mode in fec."
-     }
+    "PORT_AUTO_FEC_TEST": {
+        "desc": "PORT_AUTO_FEC_TEST validate auto mode in fec."
+    },
+    "PORT_NO_LANES_NEGATIVE_TEST": {
+        "desc": "PORT_NO_LANES_NEGATIVE_TEST no lanes.",
+        "eStrKey": "Mandatory",
+        "eStr": ["Missing"]
+    },
+    "PORT_VOQ_CHASSIS_WITH_NO_LANES": {
+        "desc": "PORT_VOQ_CHASSIS_WITH_NO_LANES no failure."
+    },
+    "PORT_PACKET_CHASSIS_WITH_NO_LANES": {
+        "desc": "PORT_PACKET_CHASSIS_WITH_NO_LANES no failure."
+    },
+    "PORT_FABRIC_WITH_NO_LANES": {
+        "desc": "PORT_FABRIC_WITH_NO_LANES no failure."
+    },
+    "PORT_VOQ_CHASSIS_WITH_LANES": {
+        "desc": "PORT_VOQ_CHASSIS_WITH_LANES no failure."
+    }
+
+
+
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
index 37c5606c1c33..3028c8e1dd55 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
@@ -804,5 +804,107 @@
                 ]
             }
         }
+    },
+    "PORT_NO_LANES_NEGATIVE_TEST": {
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "name": "Ethernet0",
+                        "alias": "etp1a",
+                        "speed": 100000,
+                        "role": "Ext"
+                    }
+                ]
+            }
+        }
+    },
+    "PORT_VOQ_CHASSIS_WITH_NO_LANES": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "switch_type": "voq"
+                }
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "name": "Ethernet0",
+                        "alias": "etp1a",
+                        "speed": 100000,
+                        "role": "Ext"
+                    }
+                ]
+            }
+        }
+    },
+    "PORT_VOQ_CHASSIS_WITH_LANES": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "switch_type": "voq",
+                    "asic_name": "asic0"
+                }
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "name": "Ethernet0",
+                        "alias": "etp1a",
+                        "speed": 100000,
+                        "role": "Ext",
+                        "lanes": "60, 61"
+                    }
+                ]
+            }
+        }
+    },
+    "PORT_PACKET_CHASSIS_WITH_NO_LANES": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "switch_type": "chassis-packet"
+                }
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "name": "Ethernet0",
+                        "alias": "etp1a",
+                        "speed": 100000,
+                        "role": "Ext"
+                        
+                    }
+                ]
+            }
+        }
+    },
+    "PORT_FABRIC_WITH_NO_LANES": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "switch_type": "fabric"
+                }
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "name": "Ethernet0",
+                        "alias": "etp1a",
+                        "speed": 100000,
+                        "role": "Int"
+                        
+                    }
+                ]
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/yang-models/sonic-port.yang b/src/sonic-yang-models/yang-models/sonic-port.yang
index 459b6520847d..5ba14e28ef97 100644
--- a/src/sonic-yang-models/yang-models/sonic-port.yang
+++ b/src/sonic-yang-models/yang-models/sonic-port.yang
@@ -13,6 +13,10 @@ module sonic-port{
 		prefix ext;
 	}
 
+	import sonic-device_metadata {
+		prefix sdm;
+	}
+
 	import sonic-macsec {
 		prefix macsec;
 	}
@@ -67,6 +71,12 @@ module sonic-port{
 				}
 
 				leaf lanes {
+					when "not(not(/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:asic_name) and
+					((/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:switch_type='voq') or 
+					(/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:switch_type='chassis-packet') or
+					(/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:switch_type='fabric')))";
+
+					description "Number of hardware lanes for the port. This is mandatory for all devices except for chassis devices";
 					mandatory true;
 					type string {
 						length 1..128;

From b62d0185049b1dae92d0aa0f8bd2e82b23f65aec Mon Sep 17 00:00:00 2001
From: Pavan Naregundi <92989231+pavannaregundi@users.noreply.github.com>
Date: Fri, 11 Oct 2024 05:52:44 +0530
Subject: [PATCH 086/364] [Marvell][Nokia-M0] Set custom create switch timeout
 (#19928)

* [Marvell] Pass create switch timeout variable to orchagent

Change enables orchagent.sh to pass create switch timeout value
to orchagent as a command line arument from hwsku.

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>
---
 .../armhf-nokia_ixs7215_52x-r0/Nokia-7215/sai.profile      | 1 +
 dockers/docker-orchagent/orchagent.sh                      | 7 +++++++
 2 files changed, 8 insertions(+)

diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/sai.profile b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/sai.profile
index a8c3f533b1cc..9cb29a8a47c0 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/sai.profile
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/sai.profile
@@ -2,3 +2,4 @@ mode=1
 hwId=et6448m
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/profile.ini
 switchProfile=/usr/share/sonic/hwsku/SAI-M0-48x1G-4x10G.xml
+createSwitchTimeout=90
diff --git a/dockers/docker-orchagent/orchagent.sh b/dockers/docker-orchagent/orchagent.sh
index ea61dadfc85b..705e1ea0db5d 100755
--- a/dockers/docker-orchagent/orchagent.sh
+++ b/dockers/docker-orchagent/orchagent.sh
@@ -1,5 +1,6 @@
 #!/usr/bin/env bash
 
+HWSKU_DIR=/usr/share/sonic/hwsku
 SWSS_VARS_FILE=/usr/share/sonic/templates/swss_vars.j2
 
 # Retrieve SWSS vars from sonic-cfggen
@@ -69,6 +70,12 @@ elif [ "$platform" == "nvidia-bluefield" ]; then
 elif [ "$platform" == "pensando" ]; then
     MAC_ADDRESS=$(ip link property add dev oob_mnic0 altname eth0; ip link show oob_mnic0 | grep ether | awk '{print $2}')
     ORCHAGENT_ARGS+="-m $MAC_ADDRESS"
+elif [ "$platform" == "marvell" ]; then
+    ORCHAGENT_ARGS+="-m $MAC_ADDRESS"
+    CREATE_SWITCH_TIMEOUT=`cat $HWSKU_DIR/sai.profile | grep "createSwitchTimeout" | cut -d'=' -f 2`
+    if [[ ! -z $CREATE_SWITCH_TIMEOUT ]]; then
+        ORCHAGENT_ARGS+=" -t $CREATE_SWITCH_TIMEOUT"
+    fi
 else
     # Should we use the fallback MAC in case it is not found in Device.Metadata
     ORCHAGENT_ARGS+="-m $MAC_ADDRESS"

From 3a3ae376bc2b80da61052ebe4e44262824a79a2b Mon Sep 17 00:00:00 2001
From: Prince George <45705344+prgeor@users.noreply.github.com>
Date: Thu, 10 Oct 2024 17:32:17 -0700
Subject: [PATCH 087/364] [S6000] Fix 'show interface status' CLI needs sudo
 permission (#20384)

Why I did it
CLI crashes without sudo permission on Dell 6000 platform

How I did it
Add check to read eeprom only if user has root permission

How to verify it
Verified the CLI "show interface status" does not crash if user is not root

Signed-off-by: Prince George <prgeor@microsoft.com>
---
 .../sonic-platform-modules-dell/s6000/sonic_platform/eeprom.py | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/eeprom.py
index 12b3cfae5606..734feb66bacc 100644
--- a/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/eeprom.py
+++ b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/eeprom.py
@@ -17,6 +17,7 @@
 
 
 try:
+    import os
     import binascii
     import redis
     import struct
@@ -304,7 +305,7 @@ def __init__(self, is_plugin=False):
         super(EepromS6000, self).__init__(self.eeprom_path, None, 0, '', True)
 
         if not is_plugin:
-            self.eeprom_data = self.read_eeprom()
+            self.eeprom_data = "N/A"  if os.geteuid() != 0 else self.read_eeprom()
 
     def _is_valid_block_checksum(self, e):
         crc = self.compute_dell_crc(e[:-2])

From cb54bf2794ce529435521e746bfd5f99b5afe5d6 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 11 Oct 2024 19:01:02 +0800
Subject: [PATCH 088/364] [submodule] Update submodule sonic-swss to the latest
 HEAD automatically (#20457)

#### Why I did it
src/sonic-swss
```
* 766e7553 - (HEAD -> master, origin/master, origin/HEAD) Fix port up/bfd sessions bringup notification delay issue. (#3269) (35 hours ago) [Hua Liu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 09fc6b561901..766e755310d0 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 09fc6b561901a06551cd9e32cd7bf58d1cf25662
+Subproject commit 766e755310d0c36a70dda9172f209c4d75c3b76d

From 64cd07c1ffcc5fa00d615be4c63ff3b8f2cf7487 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 11 Oct 2024 19:01:07 +0800
Subject: [PATCH 089/364] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#20456)

#### Why I did it
src/sonic-sairedis
```
* 29ec674b - (HEAD -> master, origin/master, origin/HEAD) To fix the issue: show_techsupport & saidump errors during testbed testing by replacing redis-rdb-tool with rdb-cli (#1391) (33 hours ago) [JunhongMao]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 24843d41955c..29ec674b3070 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 24843d41955c8724bb7f196e38e420e760bce07f
+Subproject commit 29ec674b30707bda41b06d88a533f2d72a05445c

From eccb8d84c7c886d0c14f5011371a04cfeb4b4464 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 12 Oct 2024 19:00:58 +0800
Subject: [PATCH 090/364] [submodule] Update submodule sonic-swss-common to the
 latest HEAD automatically (#20486)

#### Why I did it
src/sonic-swss-common
```
* 352234a - (HEAD -> master, origin/master, origin/HEAD) Schema.h Changes to support PAC functionality. (#871) (6 hours ago) [Vijaya Kumar Abbaraju]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 898aa5dbee22..352234ae773d 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 898aa5dbee22920847dafb0849907d55c8a84816
+Subproject commit 352234ae773dc6010ea2fd3b3446ced48f33ee0a

From 7d5151ff743cdb145d6f196617c4cc4c18922af7 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 12 Oct 2024 19:01:03 +0800
Subject: [PATCH 091/364] [submodule] Update submodule sonic-swss to the latest
 HEAD automatically (#20485)

#### Why I did it
src/sonic-swss
```
* 55fd3f18 - (HEAD -> master, origin/master, origin/HEAD) [dash]: Wait for routing type config when adding VNET mapping (#3312) (5 hours ago) [Lawrence Lee]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 766e755310d0..55fd3f18f82e 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 766e755310d0c36a70dda9172f209c4d75c3b76d
+Subproject commit 55fd3f18f82ebb7fbbc4a935d36d2a746176fffe

From 83205a78b3b2649b2e3f0e54d6a6f466d6405266 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 12 Oct 2024 19:01:08 +0800
Subject: [PATCH 092/364] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#20484)

#### Why I did it
src/sonic-sairedis
```
* d62ac0d5 - (HEAD -> master, origin/master, origin/HEAD) [Marvell] Add Flag to identify SONiC related Init Handling (#1420) (7 hours ago) [wadoodkhan]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 29ec674b3070..d62ac0d57efb 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 29ec674b30707bda41b06d88a533f2d72a05445c
+Subproject commit d62ac0d57efbe3b1970dae697151adc335f3f702

From d456a1c30cea61a8f7075f08dc1f19cd6e60d133 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 12 Oct 2024 19:01:18 +0800
Subject: [PATCH 093/364] [submodule] Update submodule sonic-platform-common to
 the latest HEAD automatically (#20482)

#### Why I did it
src/sonic-platform-common
```
* f07a6aa - (HEAD -> master, origin/master, origin/HEAD) Wait for specified duration during LPmode on/off (#503) (9 hours ago) [Anoop Kamath]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index daeed65100c9..f07a6aa8ef19 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit daeed65100c9250a704de223a771fdc7416a90f0
+Subproject commit f07a6aa8ef19f1ea2043e6443f476ff8fdfc0fed

From 5c16e6d29957905b0fd8bc75a8237ed288b8ce3b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 12 Oct 2024 19:01:27 +0800
Subject: [PATCH 094/364] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20458)

#### Why I did it
src/sonic-utilities
```
* 910252c9 - (HEAD -> master, origin/master, origin/HEAD) [Mellanox] Rename SKU to Mellanox-SN5600-C256X1 (#3546) (3 days ago) [DavidZagury]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 72d1faa7aedf..910252c996a5 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 72d1faa7aedf986f45d363838483b7398e2a4967
+Subproject commit 910252c996a59279101a7116f9bf89e1f936c596

From 0c9157224d2d72c9daa551900338239701474f1b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 12 Oct 2024 19:01:32 +0800
Subject: [PATCH 095/364] [submodule] Update submodule sonic-gnmi to the latest
 HEAD automatically (#20455)

#### Why I did it
src/sonic-gnmi
```
* 2b7f8a1 - (HEAD -> master, origin/master, origin/HEAD) Add mgmt VRF support. (#290) (58 minutes ago) [Hua Liu]
* 646b1f5 - Increase dbus timeout for gcu (#295) (3 days ago) [ganglv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 1b6d8c091bb1..2b7f8a1b712c 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 1b6d8c091bb162f2aeb1e524535645d5b12392c7
+Subproject commit 2b7f8a1b712cfc83b28d434eede9a3be30532c78

From 2618b66caf37dcb14c1b7ae08cdac6c475c8812f Mon Sep 17 00:00:00 2001
From: Jemston Fernando <sjemstonirudayam.fernando@celestica.com>
Date: Sat, 12 Oct 2024 20:02:55 +0530
Subject: [PATCH 096/364] Add new and harden Celestica platforms (#18191)

Why I did it
Harden existing Celestica platforms Belgite and Silverstone and add support for new platforms Seastone2, Questone2A, DS4000-v2, DS3000-v2, DS2000-v2
Rename Belgite platform to DS1000.

How I did it
Commit/push Celestica internal hardened changes and rename Belgite platform to DS1000.

How to verify it
Verifed the platform boots fine and all platform CLICK commands excute as expected using actual Celestica HW in all the above mentioned platforms.
---
 .../CELESTICA-BELGITE/port_config.ini         |    57 -
 .../CELESTICA-BELGITE/sai.profile             |     1 -
 .../x86_64-cel_belgite-r0/custom_led.bin      |   Bin 220 -> 0 bytes
 .../x86_64-cel_belgite-r0/default_sku         |     1 -
 .../pddf/pddf-device.json.original            |   686 -
 .../platform_components.json                  |    10 -
 .../DS1000/ds1000.config.bcm}                 |     3 +-
 .../DS1000}/hwsku.json                        |     0
 .../DS1000/port_config.ini                    |    57 +
 .../x86_64-cel_ds1000-r0/DS1000/sai.profile   |     1 +
 .../DS1000/sai_postinit_cmd.soc               |     6 +
 .../x86_64-cel_ds1000-r0/custom_led.bin       |   Bin 0 -> 272 bytes
 .../x86_64-cel_ds1000-r0/default_sku          |     1 +
 .../installer.conf                            |     4 +-
 .../led-source-code/cmicx/Makefile            |     1 -
 .../led-source-code/cmicx/custom_led.c        |    87 +-
 .../led-source-code/cmicx/custom_led.lds      |     0
 .../x86_64-cel_ds1000-r0/led_proc_init.soc    |     5 +
 .../media_settings.json                       |     1 -
 .../pcie.yaml                                 |   108 +-
 .../pddf/pd-plugin.json                       |     8 +-
 .../pddf/pddf-device.json                     |  1367 +-
 .../pddf_support                              |     0
 .../platform.json                             |   350 +-
 .../platform_asic                             |     0
 .../platform_components.json                  |    12 +
 .../x86_64-cel_ds1000-r0/platform_reboot      |     3 +
 .../plugins/eeprom.py                         |     0
 .../plugins/psuutil.py                        |     0
 .../plugins/sfputil.py                        |     0
 .../pmon_daemon_control.json                  |     0
 .../x86_64-cel_ds1000-r0/sensors.conf         |    45 +
 .../system_health_monitoring_config.json      |     4 +-
 .../DS2000/buffers.json.j2                    |     3 +
 .../DS2000/buffers_defaults_def.j2            |    46 +
 .../DS2000/buffers_defaults_t0.j2             |    45 +
 .../DS2000/buffers_defaults_t1.j2             |    46 +
 .../x86_64-cel_ds2000-r0/DS2000/hwsku.json    |   284 +
 .../x86_64-cel_ds2000-r0/DS2000/l2/config     |     7 +
 .../x86_64-cel_ds2000-r0/DS2000/l3/config     |     5 +
 .../DS2000/port_config.ini                    |    57 +
 .../x86_64-cel_ds2000-r0/DS2000/qos.json.j2   |     1 +
 .../DS2000/qos_config_t1.j2                   |   175 +
 .../x86_64-cel_ds2000-r0/DS2000/sai.profile   |     2 +
 .../DS2000/sai_postinit_cmd.soc               |     2 +
 .../DS2000/td3-as13-48f8h-2a.config.bcm       |   461 +
 .../x86_64-cel_ds2000-r0/custom_led.bin       |   Bin 0 -> 264 bytes
 .../x86_64-cel_ds2000-r0/default_sku          |     1 +
 .../x86_64-cel_ds2000-r0/installer.conf       |     4 +
 .../x86_64-cel_ds2000-r0/led_proc_init.soc    |     8 +
 .../x86_64-cel_ds2000-r0/media_settings.json  |   834 +
 .../x86_64-cel_ds2000-r0/pddf/pd-plugin.json  |   145 +
 .../pddf/pddf-device-bmc.json                 |  2891 +++
 .../pddf/pddf-device-nonbmc.json              |  2889 +++
 .../x86_64-cel_ds2000-r0/pddf_support         |     0
 .../x86_64-cel_ds2000-r0/platform.json        |   404 +
 .../x86_64-cel_ds2000-r0/platform_asic        |     1 +
 .../platform_components-bmc.json              |    18 +
 .../platform_components-nonbmc.json           |    15 +
 .../x86_64-cel_ds2000-r0/platform_reboot      |     3 +
 .../x86_64-cel_ds2000-r0/plugins/eeprom.py    |    23 +
 .../x86_64-cel_ds2000-r0/plugins/pcie.yaml    |    22 +
 .../x86_64-cel_ds2000-r0/plugins/sfputil.py   |   312 +
 .../pmon_daemon_control.json                  |     3 +
 .../system_health_monitoring_config.json      |    16 +
 .../DS3000/buffers.json.j2                    |     2 +
 .../DS3000/buffers_defaults_def.j2            |    46 +
 .../DS3000/buffers_defaults_t0.j2             |    45 +
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 .../x86_64-cel_ds3000-r0/DS3000/hwsku.json    |   169 +
 .../x86_64-cel_ds3000-r0/DS3000/l2/config     |     3 +
 .../x86_64-cel_ds3000-r0/DS3000/l3/config     |     3 +
 .../DS3000/pg_profile_lookup.ini              |    17 +
 .../DS3000/port_config.ini                    |    34 +
 .../x86_64-cel_ds3000-r0/DS3000/qos.json.j2   |     1 +
 .../x86_64-cel_ds3000-r0/DS3000/sai.profile   |     2 +
 .../DS3000/td3-ds3000-32x100G.config.bcm      |   545 +
 .../x86_64-cel_ds3000-r0/custom_led.bin       |   Bin 0 -> 130 bytes
 .../x86_64-cel_ds3000-r0/default_sku          |     1 +
 .../x86_64-cel_ds3000-r0/installer.conf       |     4 +
 .../led_proc_init.soc                         |     3 +-
 .../x86_64-cel_ds3000-r0/media_settings.json  |   408 +
 .../celestica/x86_64-cel_ds3000-r0/pcie.yaml  |   165 +
 .../x86_64-cel_ds3000-r0/pddf/pd-plugin.json  |   138 +
 .../pddf/pddf-device-bmc.json                 |  2123 ++
 .../pddf/pddf-device-nonbmc.json              |  2216 ++
 .../x86_64-cel_ds3000-r0/pddf_support         |     0
 .../x86_64-cel_ds3000-r0/platform.json        |   267 +
 .../x86_64-cel_ds3000-r0/platform_asic        |     1 +
 .../platform_components.json                  |    18 +
 .../x86_64-cel_ds3000-r0/platform_reboot      |     3 +
 .../pmon_daemon_control.json                  |     7 +
 .../x86_64-cel_ds3000-r0/sensors.conf         |    87 +
 .../system_health_monitoring_config.json      |    16 +
 .../x86_64-cel_ds3000-r0/thermal_policy.json  |   136 +
 .../Questone_2/custom_led.bin                 |   Bin 0 -> 248 bytes
 .../Questone_2/hwsku.json                     |   284 +
 .../Questone_2/platform.json                  |   396 +
 .../Questone_2/platform_components.json       |    17 +
 .../Questone_2/port_config.ini                |    57 +
 .../Questone_2/sai.profile                    |     1 +
 .../Questone_2/sai_postinit_cmd.soc           |     2 +
 .../Questone_2/td3-as13-48f8h.config.bcm      |   359 +
 .../Questone_2A/custom_led.bin                |   Bin 0 -> 308 bytes
 .../Questone_2A/hwsku.json                    |   284 +
 .../Questone_2A/platform.json                 |   396 +
 .../Questone_2A/platform_components.json      |    17 +
 .../Questone_2A/port_config.ini               |    57 +
 .../Questone_2A/sai.profile.j2                |    16 +
 .../Questone_2A/sai_postinit_cmd.soc          |     2 +
 .../td3-as13-48f8h-vxlan.config.bcm           |   423 +
 .../Questone_2A/td3-as13-48f8h.config.bcm     |   414 +
 .../x86_64-cel_questone_2-r0/installer.conf   |     4 +
 .../led_proc_init.soc                         |     8 +
 .../opennsl-postinit.cfg                      |     3 +
 .../x86_64-cel_questone_2-r0/pcie.yaml        |   153 +
 .../x86_64-cel_questone_2-r0/platform_asic    |     1 +
 .../x86_64-cel_questone_2-r0/platform_reboot  |     6 +
 .../plugins/eeprom.py                         |    23 +
 .../plugins/sfputil.py                        |   312 +
 .../pmon_daemon_control.json                  |     5 +
 .../system_health_monitoring_config.json      |    13 +
 .../warm-reboot_plugin                        |     4 +
 .../Seastone_2/buffers.json.j2                |     2 +
 .../Seastone_2/buffers_defaults_def.j2        |    46 +
 .../Seastone_2/buffers_defaults_t0.j2         |    45 +
 .../Seastone_2/buffers_defaults_t1.j2         |    46 +
 .../Seastone_2/hwsku.json                     |   169 +
 .../Seastone_2/l2/config                      |     3 +
 .../Seastone_2/l3/config                      |     3 +
 .../Seastone_2/pg_profile_lookup.ini          |    17 +
 .../Seastone_2/port_config.ini                |    68 +-
 .../Seastone_2/qos.json.j2                    |     1 +
 .../Seastone_2/sai.profile                    |     2 -
 .../Seastone_2/sai.profile.j2                 |    17 +
 .../td3-seastone_2-32x100G-vxlan.config.bcm   |   576 +
 .../td3-seastone_2-32x100G.config.bcm         |   131 +-
 .../{custom.bin => custom_led.bin}            |   Bin
 .../x86_64-cel_seastone_2-r0/installer.conf   |     3 +-
 .../led_proc_init.soc                         |     5 +-
 .../x86_64-cel_seastone_2-r0/pcie.yaml        |   153 +
 .../x86_64-cel_seastone_2-r0/platform.json    |   235 +
 .../platform_components.json                  |    17 +
 .../x86_64-cel_seastone_2-r0/platform_reboot  |     6 +
 .../pmon_daemon_control.json                  |     8 +-
 .../sonic_platform_config/chassis.json        |    45 -
 .../sonic_platform_config/component.json      |    62 -
 .../sonic_platform_config/event.py            |   117 -
 .../sonic_platform_config/fan.json            |   200 -
 .../sonic_platform_config/psu.json            |   135 -
 .../sonic_platform_config/sfp.json            |   143 -
 .../sonic_platform_config/thermal.json        |   105 -
 .../sonic_platform_config/watchdog.py         |   191 -
 .../system_health_monitoring_config.json      |    13 +
 .../warm-reboot_plugin                        |     4 +
 .../th3-128x100G.config.bcm                   |     2 -
 .../Silverstone/hwsku.json                    |   164 +
 .../Silverstone/port_config.ini               |    64 +-
 .../Silverstone/sai_postinit_cmd.soc          |     2 +
 .../Silverstone/th3-32x400G.config.bcm        |    70 +-
 .../x86_64-cel_silverstone-r0/pcie.yaml       |   434 +
 .../x86_64-cel_silverstone-r0/platform.json   |   484 +
 .../platform_components.json                  |    18 +
 .../x86_64-cel_silverstone-r0/platform_reboot |     6 +
 .../plugins/psuutil.py                        |    20 +-
 .../pmon_daemon_control.json                  |     4 +-
 .../sonic_platform/__init__.py                |     2 -
 .../sonic_platform/chassis.py                 |   131 -
 .../sonic_platform/component.py               |   118 -
 .../sonic_platform/eeprom.py                  |   117 -
 .../sonic_platform/helper.py                  |   111 -
 .../sonic_platform/psu.py                     |   236 -
 .../sonic_platform/sfp.py                     |  1467 --
 .../system_health_monitoring_config.json      |    13 +
 .../warm-reboot_plugin                        |     4 +
 .../Silverstone_v2/buffers.json.j2            |     3 +
 .../Silverstone_v2/buffers_defaults_def.j2    |    46 +
 .../Silverstone_v2/buffers_defaults_t0.j2     |    45 +
 .../Silverstone_v2/buffers_defaults_t1.j2     |    46 +
 .../Silverstone_v2/hwsku.json                 |   164 +
 .../Silverstone_v2/l2/config                  |     3 +
 .../Silverstone_v2/l3/config                  |     3 +
 .../Silverstone_v2/pg_profile_lookup.ini      |    17 +
 .../Silverstone_v2/platform-def.json          |    23 +
 .../Silverstone_v2/port_config.ini            |    33 +
 .../Silverstone_v2/qos.json.j2                |     1 +
 .../Silverstone_v2/sai.profile                |     2 +
 .../Silverstone_v2/sai_postinit_cmd.soc       |     2 +
 .../Silverstone_v2/th3-32x400G.config.bcm     |   231 +
 .../Silverstone_v2_128X100G/buffers.json.j2   |     3 +
 .../buffers_defaults_def.j2                   |    46 +
 .../buffers_defaults_t0.j2                    |    45 +
 .../buffers_defaults_t1.j2                    |    46 +
 .../Silverstone_v2_128X100G/hwsku.json        |   100 +
 .../Silverstone_v2_128X100G/l2/config         |     3 +
 .../Silverstone_v2_128X100G/l3/config         |     3 +
 .../pg_profile_lookup.ini                     |    17 +
 .../Silverstone_v2_128X100G/platform-def.json |    23 +
 .../Silverstone_v2_128X100G/port_config.ini   |   129 +
 .../Silverstone_v2_128X100G/qos.json.j2       |     1 +
 .../Silverstone_v2_128X100G/sai.profile       |     2 +
 .../th3-128x100G.config.bcm                   |   445 +
 .../custom_led.bin                            |   Bin 0 -> 1580 bytes
 .../x86_64-cel_silverstone_v2-r0/default_sku  |     1 +
 .../installer.conf                            |     3 +
 .../led_proc_init.soc                         |     3 +
 .../linkscan_led_fw.bin                       |   Bin 0 -> 14248 bytes
 .../media_settings.json                       | 18024 ++++++++++++++++
 .../x86_64-cel_silverstone_v2-r0/pcie.yaml    |    35 +
 .../pddf/pd-plugin.json                       |   188 +
 .../pddf/pddf-device.json-bmc                 |  2114 ++
 .../pddf/pddf-device.json-nonebmc             |  2058 ++
 .../x86_64-cel_silverstone_v2-r0/pddf_support |     0
 .../platform.json                             |   914 +
 .../platform_asic                             |     1 +
 .../platform_components.json-bmc              |    19 +
 .../platform_components.json-nonebmc          |    18 +
 .../platform_env.conf                         |     0
 .../platform_reboot                           |     3 +
 .../plugins/eeprom.py                         |    20 +
 .../plugins/psuutil.py                        |    85 +
 .../plugins/sfputil.py                        |   179 +
 .../plugins/ssd_util.py                       |   105 +
 .../pmon_daemon_control.json                  |     4 +
 .../system_health_monitoring_config.json      |    16 +
 platform/broadcom/one-image.mk                |     6 +-
 platform/broadcom/platform-modules-cel.mk     |    42 +-
 .../belgite/pddf/sonic_platform/fan.py        |    93 -
 .../belgite/pddf/sonic_platform/sfp.py        |    15 -
 .../belgite/pddf/sonic_platform/thermal.py    |   111 -
 .../scripts/pddf_post_device_create.sh        |    13 -
 .../belgite/utils/belgite_pddf_monitor.py     |   272 -
 .../debian/changelog                          |     9 +
 .../sonic-platform-modules-cel/debian/control |    22 +-
 .../debian/platform-modules-belgite.install   |     7 -
 .../debian/platform-modules-ds1000.install    |     8 +
 ...tinst => platform-modules-ds1000.postinst} |     4 +-
 .../debian/platform-modules-ds2000.install    |    12 +
 .../debian/platform-modules-ds2000.postinst   |     7 +
 .../debian/platform-modules-ds3000.install    |    11 +
 .../debian/platform-modules-ds3000.postinst   |     4 +
 .../debian/platform-modules-dx010.init        |     8 +-
 .../debian/platform-modules-haliburton.init   |     9 +
 .../debian/platform-modules-questone2.init    |    97 +
 .../debian/platform-modules-questone2.install |     9 +
 .../platform-modules-questone2.postinst       |     6 +
 .../debian/platform-modules-seastone2.init    |    25 +-
 .../debian/platform-modules-seastone2.install |     3 +
 .../platform-modules-seastone2.postinst       |     5 +-
 .../platform-modules-silverstone-v2.install   |    13 +
 .../platform-modules-silverstone-v2.postinst  |     6 +
 .../debian/platform-modules-silverstone.init  |    87 +-
 .../platform-modules-silverstone.install      |     1 +
 .../platform-modules-silverstone.postinst     |     5 +-
 .../sonic-platform-modules-cel/debian/rules   |    28 +-
 .../{belgite => ds1000}/modules/Makefile      |     0
 .../{belgite => ds1000}/modules/mc24lc64t.c   |     0
 .../modules/pddf_custom_psu.c                 |     0
 .../ds1000/modules/pddf_custom_wdt.c          |   734 +
 .../ds1000/pddf/setup.py                      |    27 +
 .../ds1000/pddf/sonic_platform/__init__.py    |     2 +
 .../pddf/sonic_platform/chassis.py            |   100 +-
 .../pddf/sonic_platform/component.py          |   296 +-
 .../pddf/sonic_platform/eeprom.py             |    15 +-
 .../ds1000/pddf/sonic_platform/fan.py         |   153 +
 .../pddf/sonic_platform/fan_drawer.py         |     9 +-
 .../ds1000/pddf/sonic_platform/pcie.py        |    15 +
 .../pddf/sonic_platform/platform.py           |     0
 .../pddf/sonic_platform/psu.py                |    39 +-
 .../ds1000/pddf/sonic_platform/sfp.py         |    36 +
 .../ds1000/pddf/sonic_platform/thermal.py     |   105 +
 .../pddf/sonic_platform/watchdog.py           |    15 +-
 .../scripts/ds1000_platform_shutdown.sh       |    26 +
 .../ds1000/scripts/pddf_post_device_create.sh |    22 +
 .../scripts/pddf_pre_driver_install.sh        |     2 +-
 .../ds1000/service/ds1000-fan-control.service |    17 +
 .../ds1000/systemd/pddf-platform-init.service |    15 +
 .../ds1000/utils/ds1000_fanctld.py            |   346 +
 .../ds2000/classes/__init__.py                |     0
 .../ds2000/modules/Makefile                   |     5 +
 .../ds2000/modules/lpc_basecpld.c             |   720 +
 .../ds2000/modules/mc24lc64t.c                |   171 +
 .../ds2000/modules/pddf_custom_fpga_algo.c    |   631 +
 .../ds2000/modules/pddf_custom_fpga_extend.c  |   372 +
 .../ds2000/modules/pmbus.h                    |   504 +
 .../ds2000/modules/psu_driver/pddf_psu_api.c  |   478 +
 .../ds2000/modules/psu_driver/pddf_psu_api.h  |    31 +
 .../ds2000/modules/psu_driver/pddf_psu_defs.h |    90 +
 .../modules/psu_driver/pddf_psu_driver.c      |   398 +
 .../modules/psu_driver/pddf_psu_driver.h      |    70 +
 .../{belgite => ds2000}/pddf/setup.py         |     1 +
 .../pddf/sonic_platform/__init__.py           |     4 +-
 .../ds2000/pddf/sonic_platform/chassis.py     |   242 +
 .../ds2000/pddf/sonic_platform/component.py   |   214 +
 .../pddf/sonic_platform/cpld_watchdog.py      |   228 +
 .../ds2000/pddf/sonic_platform/eeprom.py      |    78 +
 .../ds2000/pddf/sonic_platform/fan.py         |   192 +
 .../ds2000/pddf/sonic_platform/fan_drawer.py  |    17 +
 .../ds2000/pddf/sonic_platform/helper.py      |   143 +
 .../ds2000/pddf/sonic_platform/platform.py    |    23 +
 .../ds2000/pddf/sonic_platform/psu.py         |    33 +
 .../ds2000/pddf/sonic_platform/sfp.py         |   110 +
 .../ds2000/pddf/sonic_platform/thermal.py     |    13 +
 .../ds2000/pddf/sonic_platform/watchdog.py    |    15 +
 .../scripts/ds2000_platform_shutdown.sh       |    42 +
 .../ds2000/scripts/pddf_post_device_create.sh |    26 +
 .../ds2000/scripts/pddf_pre_driver_install.sh |    14 +
 .../ds2000/scripts/platform_sensors.py        |   178 +
 .../ds2000/scripts/pre_pddf_init.sh           |    31 +
 .../ds2000/scripts/sensors                    |    11 +
 .../ds2000-pddf-platform-monitor.service      |    17 +
 .../ds2000/systemd/pddf-platform-init.service |    15 +
 .../utils/FanControl/CPUPIDRegulation.py      |   152 +
 .../ds2000/utils/FanControl/FanControl.py     |   253 +
 .../utils/FanControl/FanLinearAdjustment.py   |   195 +
 .../FanControl/SwitchInternalPIDRegulation.py |   162 +
 .../ds2000/utils/FanControl/__init__.py       |     5 +
 .../utils/pddf_fan_control_sensor_refresh.py  |    20 +
 .../ds3000/modules/Makefile                   |     8 +
 .../ds3000/modules/baseboard_cpld.c           |   414 +
 .../modules/led_driver/pddf_custom_led_defs.h |   149 +
 .../led_driver/pddf_custom_led_module.c       |   873 +
 .../ds3000/modules/mc24lc64t.c                |   172 +
 .../ds3000/modules/pddf_custom_fpga_algo.c    |   626 +
 .../ds3000/modules/pddf_custom_fpga_extend.c  |   372 +
 .../ds3000/modules/psu_driver/pddf_psu_api.c  |   478 +
 .../ds3000/modules/psu_driver/pddf_psu_api.h  |    31 +
 .../ds3000/modules/psu_driver/pddf_psu_defs.h |    90 +
 .../modules/psu_driver/pddf_psu_driver.c      |   398 +
 .../modules/psu_driver/pddf_psu_driver.h      |    70 +
 .../modules/switchboard_fpga.c}               |   991 +-
 .../ds3000/pddf/setup.py                      |    28 +
 .../ds3000/pddf/sonic_platform/__init__.py    |     4 +
 .../ds3000/pddf/sonic_platform/chassis.py     |   295 +
 .../ds3000/pddf/sonic_platform/component.py   |   321 +
 .../pddf/sonic_platform/cpld_watchdog.py      |   228 +
 .../ds3000/pddf/sonic_platform/eeprom.py      |    84 +
 .../ds3000/pddf/sonic_platform/event.py       |    52 +
 .../ds3000/pddf/sonic_platform/fan.py         |   246 +
 .../ds3000/pddf/sonic_platform/fan_drawer.py  |    28 +
 .../ds3000/pddf/sonic_platform/helper.py      |   139 +
 .../ds3000/pddf/sonic_platform/pcie.py        |    10 +
 .../ds3000/pddf/sonic_platform/platform.py    |    23 +
 .../ds3000/pddf/sonic_platform/psu.py         |    49 +
 .../ds3000/pddf/sonic_platform/sfp.py         |   183 +
 .../ds3000/pddf/sonic_platform/thermal.py     |    56 +
 .../pddf/sonic_platform/thermal_actions.py    |   341 +
 .../pddf/sonic_platform/thermal_conditions.py |   121 +
 .../pddf/sonic_platform/thermal_infos.py      |   362 +
 .../pddf/sonic_platform/thermal_manager.py    |    21 +
 .../ds3000/pddf/sonic_platform/watchdog.py    |    14 +
 .../ds3000/pddf/sonic_platform_setup.py       |    28 +
 .../scripts/ds3000_platform_shutdown.sh       |    39 +
 .../ds3000/scripts/pddf_post_device_create.sh |    37 +
 .../ds3000/scripts/pddf_pre_driver_install.sh |    11 +
 .../ds3000/scripts/platform_sensors.py        |   179 +
 .../ds3000/scripts/pre_pddf_init.sh           |    30 +
 .../ds3000/scripts/sensors                    |    11 +
 .../ds3000/systemd/pddf-platform-init.service |    16 +
 .../ds3000/utils/afulnx_64                    |   Bin 0 -> 1134256 bytes
 .../ds3000/utils/fpga_prog                    |   Bin 0 -> 17536 bytes
 .../ds3000/utils/ispvm                        |   Bin 0 -> 101752 bytes
 .../ds3000/utils/pddf_switch_svc.py           |    83 +
 .../questone2/cfg/pid_config_questone2.ini    |    19 +
 .../questone2/cfg/questone2-modprobe.conf     |     1 +
 .../questone2/cfg/questone2-modules.conf      |    16 +
 .../questone2/modules/Makefile                |     1 +
 .../questone2/modules/mc24lc64t.c             |   171 +
 .../modules/questone2_baseboard_cpld.c        |   408 +
 .../questone2/modules/questone2_switchboard.c |  2211 ++
 .../questone2/scripts/platform_sensors.py     |   161 +
 .../scripts/questone2_platform_shutdown.sh    |    26 +
 .../questone2/scripts/sensors                 |    11 +
 .../questone2/setup.py                        |    10 +
 .../questone2/sonic_platform/__init__.py      |     2 +
 .../questone2/sonic_platform/chassis.py       |   464 +
 .../questone2/sonic_platform/component.py     |   156 +
 .../questone2/sonic_platform/eeprom.py        |   128 +
 .../questone2/sonic_platform/fan.py           |   345 +
 .../questone2/sonic_platform/fan_drawer.py    |    82 +
 .../questone2/sonic_platform/helper.py        |   191 +
 .../questone2/sonic_platform/pcie.py          |    15 +
 .../questone2/sonic_platform/platform.py      |    23 +
 .../questone2/sonic_platform/psu.py           |   265 +
 .../questone2/sonic_platform/sfp.py           |   197 +
 .../questone2}/sonic_platform/thermal.py      |   132 +-
 .../questone2/sonic_platform/watchdog.py      |   264 +
 .../platform-modules-questone2.service        |    13 +
 .../seastone2/modules/baseboard_cpld.c        |     2 +-
 .../seastone2/scripts/platform_sensors.py     |   161 +
 .../scripts/seastone2_platform_shutdown.sh    |    26 +
 .../seastone2/scripts/sensors                 |    11 +
 .../seastone2/setup.py                        |    31 +
 .../seastone2/sonic_platform/__init__.py      |     2 +
 .../seastone2/sonic_platform/chassis.py       |   457 +
 .../seastone2/sonic_platform/component.py     |   156 +
 .../seastone2/sonic_platform/eeprom.py        |   128 +
 .../seastone2/sonic_platform/fan.py           |   345 +
 .../seastone2/sonic_platform/fan_drawer.py    |    91 +
 .../seastone2/sonic_platform/helper.py        |   191 +
 .../seastone2/sonic_platform/pcie.py          |    15 +
 .../seastone2/sonic_platform/platform.py      |    23 +
 .../seastone2/sonic_platform/psu.py           |   273 +
 .../seastone2/sonic_platform/sfp.py           |   198 +
 .../seastone2/sonic_platform/thermal.py       |   204 +
 .../seastone2/sonic_platform/watchdog.py      |   274 +
 .../silverstone-v2/modules/Makefile           |    11 +
 .../modules/fan_driver/pddf_custom_fan_api.c  |   656 +
 .../modules/fan_driver/pddf_custom_fan_defs.h |    93 +
 .../fan_driver/pddf_custom_fan_driver.c       |   523 +
 .../fan_driver/pddf_custom_fan_driver.h       |   117 +
 .../modules/fan_driver/readme.txt             |     4 +
 .../modules/led_driver/pddf_custom_led_defs.h |   149 +
 .../led_driver/pddf_custom_led_module.c       |   873 +
 .../modules/pddf_custom_fpga_algo.c           |   634 +
 .../modules/pddf_custom_fpga_extend.c         |   340 +
 .../modules/pddf_custom_lpc_basecpld.c        |   441 +
 .../modules/pddf_custom_wdt.c                 |   150 +-
 .../silverstone-v2/modules/pmbus.h            |   504 +
 .../modules/psu_driver/pddf_psu_api.c         |   478 +
 .../modules/psu_driver/pddf_psu_api.h         |    31 +
 .../modules/psu_driver/pddf_psu_defs.h        |    90 +
 .../modules/psu_driver/pddf_psu_driver.c      |   398 +
 .../modules/psu_driver/pddf_psu_driver.h      |    70 +
 .../silverstone-v2/modules/tps536c7.c         |   133 +
 .../silverstone-v2/pddf/setup.py              |    27 +
 .../pddf/sonic_platform/__init__.py           |     4 +
 .../pddf/sonic_platform/chassis.py            |   234 +
 .../pddf/sonic_platform/component.py          |   230 +
 .../pddf/sonic_platform/eeprom.py             |    78 +
 .../silverstone-v2/pddf/sonic_platform/fan.py |    93 +
 .../pddf/sonic_platform/fan_drawer.py         |    21 +
 .../pddf/sonic_platform/helper.py             |   143 +
 .../pddf/sonic_platform/platform.py           |    23 +
 .../silverstone-v2/pddf/sonic_platform/psu.py |    46 +
 .../pddf/sonic_platform/sensor_list_config.py |    11 +
 .../silverstone-v2/pddf/sonic_platform/sfp.py |   103 +
 .../pddf/sonic_platform/thermal.py            |    68 +
 .../pddf/sonic_platform/watchdog.py           |   208 +
 .../scripts/pddf_post_device_create.sh        |    20 +
 .../scripts/pddf_pre_driver_install.sh        |    14 +
 .../scripts/platform_sensors.py               |   180 +
 .../silverstone-v2/scripts/pre_pddf_init.py   |   100 +
 .../silverstone-v2/scripts/sensors            |    11 +
 .../silverstone_v2_platform_shutdown.sh       |    39 +
 ...verstone-v2-pddf-platform-monitor.service} |     6 +-
 .../systemd/pddf-platform-init.service        |     1 +
 .../utils/FanControl/CPUPIDRegulation.py      |   129 +
 .../utils/FanControl/FanControl.py            |   207 +
 .../utils/FanControl/FanLinearAdjustment.py   |   156 +
 .../FanControl/SwitchInternalPIDRegulation.py |   145 +
 .../utils/FanControl/__init__.py              |     5 +
 .../utils/pddf_fan_control_sensor_refresh.py  |    26 +
 .../utils/pddf_sensor_list_refresh.py         |    39 +
 .../silverstone/cfg/silverstone-modules.conf  |     4 +-
 .../silverstone/modules/Makefile              |     2 +-
 .../silverstone/modules/baseboard-lpc.c       |     4 +-
 .../silverstone/modules/cls-i2c-mux-pca954x.c |   578 +
 .../silverstone/modules/cls-pca954x.h         |    44 +
 .../silverstone/modules/cls-switchboard.c     |   542 +
 .../silverstone/modules/switch_cpld.c         |   416 +
 .../silverstone/modules/xcvr-cls.c            |   520 +
 .../silverstone/modules/xcvr-cls.h            |    41 +
 .../silverstone/scripts/platform_sensors.py   |   114 +-
 .../silverstone/scripts/sensors               |     2 +-
 .../scripts/silverstone_platform_shutdown.sh  |    26 +
 .../silverstone/setup.py                      |     5 +-
 .../silverstone/sonic_platform/__init__.py    |     2 +
 .../silverstone/sonic_platform/chassis.py     |   452 +
 .../silverstone/sonic_platform/component.py   |   181 +
 .../silverstone/sonic_platform/eeprom.py      |   123 +
 .../silverstone}/sonic_platform/fan.py        |   238 +-
 .../silverstone/sonic_platform/fan_drawer.py  |   108 +
 .../silverstone/sonic_platform/helper.py      |   190 +
 .../silverstone/sonic_platform/pcie.py        |    15 +
 .../silverstone}/sonic_platform/platform.py   |     0
 .../silverstone/sonic_platform/psu.py         |   338 +
 .../silverstone/sonic_platform/sfp.py         |   232 +
 .../silverstone/sonic_platform/thermal.py     |   205 +
 .../silverstone/sonic_platform/watchdog.py    |   247 +
 480 files changed, 83159 insertions(+), 6570 deletions(-)
 delete mode 100644 device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/port_config.ini
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 rename device/celestica/{x86_64-cel_belgite-r0/CELESTICA-BELGITE/belgite.config.bcm => x86_64-cel_ds1000-r0/DS1000/ds1000.config.bcm} (98%)
 rename device/celestica/{x86_64-cel_belgite-r0/CELESTICA-BELGITE => x86_64-cel_ds1000-r0/DS1000}/hwsku.json (100%)
 create mode 100644 device/celestica/x86_64-cel_ds1000-r0/DS1000/port_config.ini
 create mode 100644 device/celestica/x86_64-cel_ds1000-r0/DS1000/sai.profile
 create mode 100644 device/celestica/x86_64-cel_ds1000-r0/DS1000/sai_postinit_cmd.soc
 create mode 100755 device/celestica/x86_64-cel_ds1000-r0/custom_led.bin
 create mode 100644 device/celestica/x86_64-cel_ds1000-r0/default_sku
 rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/installer.conf (83%)
 rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/led-source-code/cmicx/Makefile (99%)
 rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/led-source-code/cmicx/custom_led.c (79%)
 rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/led-source-code/cmicx/custom_led.lds (100%)
 create mode 100644 device/celestica/x86_64-cel_ds1000-r0/led_proc_init.soc
 rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/media_settings.json (99%)
 rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/pcie.yaml (56%)
 rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/pddf/pd-plugin.json (84%)
 rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/pddf/pddf-device.json (87%)
 rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/pddf_support (100%)
 rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/platform.json (62%)
 rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/platform_asic (100%)
 create mode 100644 device/celestica/x86_64-cel_ds1000-r0/platform_components.json
 create mode 100755 device/celestica/x86_64-cel_ds1000-r0/platform_reboot
 rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/plugins/eeprom.py (100%)
 rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/plugins/psuutil.py (100%)
 rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/plugins/sfputil.py (100%)
 rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/pmon_daemon_control.json (100%)
 create mode 100644 device/celestica/x86_64-cel_ds1000-r0/sensors.conf
 rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds1000-r0}/system_health_monitoring_config.json (86%)
 create mode 100644 device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers.json.j2
 create mode 100644 device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_def.j2
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 create mode 100644 device/celestica/x86_64-cel_ds2000-r0/DS2000/hwsku.json
 create mode 100644 device/celestica/x86_64-cel_ds2000-r0/DS2000/l2/config
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 create mode 100644 device/celestica/x86_64-cel_ds2000-r0/DS2000/port_config.ini
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 create mode 100644 device/celestica/x86_64-cel_ds2000-r0/DS2000/qos_config_t1.j2
 create mode 100644 device/celestica/x86_64-cel_ds2000-r0/DS2000/sai.profile
 create mode 100644 device/celestica/x86_64-cel_ds2000-r0/DS2000/sai_postinit_cmd.soc
 create mode 100644 device/celestica/x86_64-cel_ds2000-r0/DS2000/td3-as13-48f8h-2a.config.bcm
 create mode 100644 device/celestica/x86_64-cel_ds2000-r0/custom_led.bin
 create mode 100644 device/celestica/x86_64-cel_ds2000-r0/default_sku
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 create mode 100644 device/celestica/x86_64-cel_ds2000-r0/media_settings.json
 create mode 100644 device/celestica/x86_64-cel_ds2000-r0/pddf/pd-plugin.json
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 create mode 100644 device/celestica/x86_64-cel_ds2000-r0/pddf/pddf-device-nonbmc.json
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 create mode 100644 device/celestica/x86_64-cel_ds2000-r0/pmon_daemon_control.json
 create mode 100644 device/celestica/x86_64-cel_ds2000-r0/system_health_monitoring_config.json
 create mode 100644 device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers.json.j2
 create mode 100644 device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_def.j2
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 create mode 100644 device/celestica/x86_64-cel_ds3000-r0/DS3000/hwsku.json
 create mode 100644 device/celestica/x86_64-cel_ds3000-r0/DS3000/l2/config
 create mode 100644 device/celestica/x86_64-cel_ds3000-r0/DS3000/l3/config
 create mode 100644 device/celestica/x86_64-cel_ds3000-r0/DS3000/pg_profile_lookup.ini
 create mode 100644 device/celestica/x86_64-cel_ds3000-r0/DS3000/port_config.ini
 create mode 100644 device/celestica/x86_64-cel_ds3000-r0/DS3000/qos.json.j2
 create mode 100644 device/celestica/x86_64-cel_ds3000-r0/DS3000/sai.profile
 create mode 100644 device/celestica/x86_64-cel_ds3000-r0/DS3000/td3-ds3000-32x100G.config.bcm
 create mode 100644 device/celestica/x86_64-cel_ds3000-r0/custom_led.bin
 create mode 100644 device/celestica/x86_64-cel_ds3000-r0/default_sku
 create mode 100644 device/celestica/x86_64-cel_ds3000-r0/installer.conf
 rename device/celestica/{x86_64-cel_belgite-r0 => x86_64-cel_ds3000-r0}/led_proc_init.soc (71%)
 create mode 100644 device/celestica/x86_64-cel_ds3000-r0/media_settings.json
 create mode 100644 device/celestica/x86_64-cel_ds3000-r0/pcie.yaml
 create mode 100644 device/celestica/x86_64-cel_ds3000-r0/pddf/pd-plugin.json
 create mode 100644 device/celestica/x86_64-cel_ds3000-r0/pddf/pddf-device-bmc.json
 create mode 100644 device/celestica/x86_64-cel_ds3000-r0/pddf/pddf-device-nonbmc.json
 create mode 100644 device/celestica/x86_64-cel_ds3000-r0/pddf_support
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 create mode 100644 device/celestica/x86_64-cel_questone_2-r0/Questone_2/platform.json
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 create mode 100644 device/celestica/x86_64-cel_questone_2-r0/Questone_2/sai_postinit_cmd.soc
 create mode 100644 device/celestica/x86_64-cel_questone_2-r0/Questone_2/td3-as13-48f8h.config.bcm
 create mode 100755 device/celestica/x86_64-cel_questone_2-r0/Questone_2A/custom_led.bin
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 create mode 100644 device/celestica/x86_64-cel_questone_2-r0/Questone_2A/platform.json
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 create mode 100644 device/celestica/x86_64-cel_questone_2-r0/Questone_2A/sai_postinit_cmd.soc
 create mode 100755 device/celestica/x86_64-cel_questone_2-r0/Questone_2A/td3-as13-48f8h-vxlan.config.bcm
 create mode 100755 device/celestica/x86_64-cel_questone_2-r0/Questone_2A/td3-as13-48f8h.config.bcm
 create mode 100644 device/celestica/x86_64-cel_questone_2-r0/installer.conf
 create mode 100644 device/celestica/x86_64-cel_questone_2-r0/led_proc_init.soc
 create mode 100644 device/celestica/x86_64-cel_questone_2-r0/opennsl-postinit.cfg
 create mode 100644 device/celestica/x86_64-cel_questone_2-r0/pcie.yaml
 create mode 100644 device/celestica/x86_64-cel_questone_2-r0/platform_asic
 create mode 100755 device/celestica/x86_64-cel_questone_2-r0/platform_reboot
 create mode 100644 device/celestica/x86_64-cel_questone_2-r0/plugins/eeprom.py
 create mode 100755 device/celestica/x86_64-cel_questone_2-r0/plugins/sfputil.py
 create mode 100644 device/celestica/x86_64-cel_questone_2-r0/pmon_daemon_control.json
 create mode 100644 device/celestica/x86_64-cel_questone_2-r0/system_health_monitoring_config.json
 create mode 100755 device/celestica/x86_64-cel_questone_2-r0/warm-reboot_plugin
 create mode 100644 device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers.json.j2
 create mode 100644 device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_def.j2
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 create mode 100644 device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/hwsku.json
 create mode 100644 device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/l2/config
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 create mode 100644 device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/pg_profile_lookup.ini
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 delete mode 100644 device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/sai.profile
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 create mode 100644 device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/td3-seastone_2-32x100G-vxlan.config.bcm
 rename device/celestica/x86_64-cel_seastone_2-r0/{custom.bin => custom_led.bin} (100%)
 create mode 100644 device/celestica/x86_64-cel_seastone_2-r0/pcie.yaml
 create mode 100644 device/celestica/x86_64-cel_seastone_2-r0/platform.json
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 delete mode 100644 device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/psu.json
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 delete mode 100644 device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/thermal.json
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 create mode 100755 device/celestica/x86_64-cel_seastone_2-r0/warm-reboot_plugin
 create mode 100644 device/celestica/x86_64-cel_silverstone-r0/Silverstone/hwsku.json
 create mode 100644 device/celestica/x86_64-cel_silverstone-r0/Silverstone/sai_postinit_cmd.soc
 create mode 100644 device/celestica/x86_64-cel_silverstone-r0/pcie.yaml
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 create mode 100644 device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/th3-32x400G.config.bcm
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 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/fan_drawer.py
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/helper.py
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/platform.py
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/psu.py
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/sensor_list_config.py
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/sfp.py
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/thermal.py
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/watchdog.py
 create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pddf_post_device_create.sh
 create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pddf_pre_driver_install.sh
 create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/platform_sensors.py
 create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pre_pddf_init.py
 create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/sensors
 create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/silverstone_v2_platform_shutdown.sh
 rename platform/broadcom/sonic-platform-modules-cel/{belgite/service/belgite-pddf-platform-monitor.service => silverstone-v2/service/silverstone-v2-pddf-platform-monitor.service} (58%)
 rename platform/broadcom/sonic-platform-modules-cel/{belgite => silverstone-v2}/systemd/pddf-platform-init.service (89%)
 create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/CPUPIDRegulation.py
 create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/FanControl.py
 create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/FanLinearAdjustment.py
 create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/SwitchInternalPIDRegulation.py
 create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/__init__.py
 create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/pddf_fan_control_sensor_refresh.py
 create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/pddf_sensor_list_refresh.py
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-i2c-mux-pca954x.c
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-pca954x.h
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-switchboard.c
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switch_cpld.c
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/modules/xcvr-cls.c
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/modules/xcvr-cls.h
 create mode 100755 platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/silverstone_platform_shutdown.sh
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/__init__.py
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/chassis.py
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/component.py
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/eeprom.py
 rename {device/celestica/x86_64-cel_silverstone-r0 => platform/broadcom/sonic-platform-modules-cel/silverstone}/sonic_platform/fan.py (51%)
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/fan_drawer.py
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/helper.py
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/pcie.py
 rename {device/celestica/x86_64-cel_silverstone-r0 => platform/broadcom/sonic-platform-modules-cel/silverstone}/sonic_platform/platform.py (100%)
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/psu.py
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/sfp.py
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/thermal.py
 create mode 100644 platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/watchdog.py

diff --git a/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/port_config.ini b/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/port_config.ini
deleted file mode 100644
index 90ecfa4859ad..000000000000
--- a/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/port_config.ini
+++ /dev/null
@@ -1,57 +0,0 @@
-# name          lanes                 alias              index      speed     autoneg
-Ethernet0       26                    Ethernet1/0/1        1         1000      1
-Ethernet1       25                    Ethernet1/0/2        2         1000      1
-Ethernet2       28                    Ethernet1/0/3        3         1000      1
-Ethernet3       27                    Ethernet1/0/4        4         1000      1
-Ethernet4       30                    Ethernet1/0/5        5         1000      1
-Ethernet5       29                    Ethernet1/0/6        6         1000      1
-Ethernet6       32                    Ethernet1/0/7        7         1000      1
-Ethernet7       31                    Ethernet1/0/8        8         1000      1
-Ethernet8       34                    Ethernet1/0/9        9         1000      1
-Ethernet9       33                    Ethernet1/0/10       10        1000      1
-Ethernet10      36                    Ethernet1/0/11       11        1000      1
-Ethernet11      35                    Ethernet1/0/12       12        1000      1
-Ethernet12      38                    Ethernet1/0/13       13        1000      1
-Ethernet13      37                    Ethernet1/0/14       14        1000      1
-Ethernet14      40                    Ethernet1/0/15       15        1000      1
-Ethernet15      39                    Ethernet1/0/16       16        1000      1
-Ethernet16      42                    Ethernet1/0/17       17        1000      1
-Ethernet17      41                    Ethernet1/0/18       18        1000      1
-Ethernet18      44                    Ethernet1/0/19       19        1000      1
-Ethernet19      43                    Ethernet1/0/20       20        1000      1
-Ethernet20      50                    Ethernet1/0/21       21        1000      1
-Ethernet21      49                    Ethernet1/0/22       22        1000      1
-Ethernet22      52                    Ethernet1/0/23       23        1000      1
-Ethernet23      51                    Ethernet1/0/24       24        1000      1
-Ethernet24      2                     Ethernet1/0/25       25        1000      1
-Ethernet25      1                     Ethernet1/0/26       26        1000      1
-Ethernet26      4                     Ethernet1/0/27       27        1000      1
-Ethernet27      3                     Ethernet1/0/28       28        1000      1
-Ethernet28      6                     Ethernet1/0/29       29        1000      1
-Ethernet29      5                     Ethernet1/0/30       30        1000      1
-Ethernet30      8                     Ethernet1/0/31       31        1000      1
-Ethernet31      7                     Ethernet1/0/32       32        1000      1
-Ethernet32      10                    Ethernet1/0/33       33        1000      1
-Ethernet33       9                    Ethernet1/0/34       34        1000      1
-Ethernet34      12                    Ethernet1/0/35       35        1000      1
-Ethernet35      11                    Ethernet1/0/36       36        1000      1
-Ethernet36      14                    Ethernet1/0/37       37        1000      1
-Ethernet37      13                    Ethernet1/0/38       38        1000      1
-Ethernet38      16                    Ethernet1/0/39       39        1000      1
-Ethernet39      15                    Ethernet1/0/40       40        1000      1
-Ethernet40      18                    Ethernet1/0/41       41        1000      1
-Ethernet41      17                    Ethernet1/0/42       42        1000      1
-Ethernet42      20                    Ethernet1/0/43       43        1000      1
-Ethernet43      19                    Ethernet1/0/44       44        1000      1
-Ethernet44      22                    Ethernet1/0/45       45        1000      1
-Ethernet45      21                    Ethernet1/0/46       46        1000      1
-Ethernet46      24                    Ethernet1/0/47       47        1000      1
-Ethernet47      23                    Ethernet1/0/48       48        1000      1
-Ethernet48      60                    Ethernet1/0/49       49       10000      0
-Ethernet49      58                    Ethernet1/0/50       50       10000      0
-Ethernet50      59                    Ethernet1/0/51       51       10000      0
-Ethernet51      57                    Ethernet1/0/52       52       10000      0
-Ethernet52      62                    Ethernet1/0/53       53       10000      0
-Ethernet53      64                    Ethernet1/0/54       54       10000      0
-Ethernet54      61                    Ethernet1/0/55       55       10000      0
-Ethernet55      63                    Ethernet1/0/56       56       10000      0
diff --git a/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/sai.profile b/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/sai.profile
deleted file mode 100644
index 2e5979fd112c..000000000000
--- a/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/sai.profile
+++ /dev/null
@@ -1 +0,0 @@
-SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/belgite.config.bcm
diff --git a/device/celestica/x86_64-cel_belgite-r0/custom_led.bin b/device/celestica/x86_64-cel_belgite-r0/custom_led.bin
deleted file mode 100644
index c1b5e0e1b1d6df0a03d57ba312715b5ebb0b772e..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

literal 220
zcmV~$yH3JT0D$4YEecYRn<6MEP>_oz1jHLvEG0RED-*D2F_FQ6Cm@80M<CIsFd=b}
z=_Jnh25!1wcm%(1HTx9IqIVGn=VY|($e4<usavnY``r+_)wbIWwcPB-T582reY5pN
zc%qmuDE)3HVJ{a2o&=@8uiqcVkPjG|bCI^4v)b5^_tKF)`8fJ`7pwX6CB)ccpEwB)
zI3!7mGzJ;69FZeWfg;D8P^Q8uRTNY-T&%H<8xI?J(b*)*E)jOvCQOJR0sL&?<C+>K
KSJbh%;g)~zw=1~-

diff --git a/device/celestica/x86_64-cel_belgite-r0/default_sku b/device/celestica/x86_64-cel_belgite-r0/default_sku
deleted file mode 100644
index 3eeb370889f9..000000000000
--- a/device/celestica/x86_64-cel_belgite-r0/default_sku
+++ /dev/null
@@ -1 +0,0 @@
-CELESTICA-BELGITE t1
diff --git a/device/celestica/x86_64-cel_belgite-r0/pddf/pddf-device.json.original b/device/celestica/x86_64-cel_belgite-r0/pddf/pddf-device.json.original
deleted file mode 100644
index 8f43a3f6090d..000000000000
--- a/device/celestica/x86_64-cel_belgite-r0/pddf/pddf-device.json.original
+++ /dev/null
@@ -1,686 +0,0 @@
-{
-    "PLATFORM":
-    {
-        "num_psus":2,
-        "num_fantrays":3,
-        "num_fans_pertray":1,
-        "num_ports":56,
-        "num_temps":4,
-        "pddf_dev_types":
-        {
-            "description":"Belgite - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo <dev-address> <dev-type> > <path>/new_device' method",
-            "CPLD":
-            [
-               "i2c_cpld"
-            ],
-            "PSU":
-            [
-                "psu_eeprom",
-                "psu_pmbus"
-            ],
-            "FAN":
-            [
-                "fan_ctrl",
-                "fan_eeprom",
-                "fan_cpld"
-            ],
-            "PORT_MODULE":
-            [
-                "pddf_xcvr"
-            ]
-        },
-        "std_perm_kos":
-        [
-            "i2c-ismt",
-            "i2c-i801"
-        ],
-        "std_kos":
-        [
-            "i2c_dev",
-            "i2c_mux_pca954x",
-            "gpio_pca953x",
-	    "mc24lc64t",
-            "optoe"
-        ],
-        "pddf_kos":
-        [
-            "pddf_client_module",
-            "pddf_mux_module",
-            "pddf_psu_driver_module",
-            "pddf_psu_module",
-            "pddf_gpio_module",
-            "pddf_xcvr_module",
-            "pddf_xcvr_driver_module",
-            "pddf_led_module",
-            "pddf_fan_driver_module",
-            "pddf_fan_module",
-            "pddf_led_module"
-    	],
-	"custom_kos":
-        [
-            "pddf_custom_psu"
-        ]
-    },
-    "SYSTEM":
-    {
-        "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null},
-        "i2c":
-        {
-            "CONTROLLERS":
-            [
-                { "dev_name":"i2c-0", "dev":"SMBUS0" }
-            ]
-        }
-    },
-    "SMBUS0":
-    {
-        "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"},
-        "i2c":
-        {
-            "topo_info": {"dev_addr": "0x0"},
-            "DEVICES":
-            [
-                {"dev": "EEPROM1"},
-                {"dev": "MUX1"}
-            ]
-        }
-    },
-    "EEPROM1":
-    {
-        "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"},
-        "i2c":
-        {
-            "topo_info": {"parent_bus": "0x0", "dev_addr": "0x52", "dev_type": "24lc64t"},
-            "dev_attr": {"access_mode": "BLOCK"},
-            "attr_list": 
-            [
-                {"attr_name": "eeprom"}
-            ]
-        }
-    },
-    "MUX1":
-    {
-        "dev_info": {  "device_type":"MUX", "device_name":"MUX1", "device_parent":"SMBUS0"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x0", "dev_addr":"0x70", "dev_type":"pca9548"},
-            "dev_attr": { "virt_bus":"0x2"},
-            "channel":
-            [
-              {"chn":"0", "dev":"CPLD1" },
-              {"chn":"0", "dev":"FAN-CTRL1" },
-              {"chn":"2", "dev":"PSU1" }, 
-              {"chn":"2", "dev":"PSU2" },
-              {"chn":"3", "dev":"TEMP1"},
-              {"chn":"3", "dev":"TEMP2"},
-              {"chn":"4", "dev":"TEMP3"},
-	      {"chn":"4", "dev":"TEMP4"},
-              {"chn":"7", "dev":"MUX2"}  
-            ]
-        }
-    },
-    "MUX2":
-    {
-        "dev_info": {  "device_type":"MUX", "device_name":"MUX2", "device_parent":"MUX1"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x9", "dev_addr":"0x71", "dev_type":"pca9548"},
-            "dev_attr": { "virt_bus":"0x10"},
-            "channel":
-            [
-              {"chn":"0", "dev":"PORT49"},
-              {"chn":"1", "dev":"PORT50"}, 
-              {"chn":"2", "dev":"PORT51"},
-              {"chn":"3", "dev":"PORT52"},
-              {"chn":"4", "dev":"PORT53"},
-              {"chn":"5", "dev":"PORT54"},
-              {"chn":"6", "dev":"PORT55"},
-              {"chn":"7", "dev":"PORT56"}  
-            ]
-        }
-    },
-    "CPLD1":
-    {
-       "dev_info": {"device_type": "CPLD", "device_name": "CPLD1", "device_parent": "MUX1"},
-       "i2c":
-        {
-            "topo_info": {"parent_bus": "0x2", "dev_addr": "0x32", "dev_type": "i2c_cpld"},
-            "dev_attr": {}
-        }
-    },
-    "PSU1":
-    {
-        "dev_info": { "device_type":"PSU", "device_name":"PSU1", "device_parent":"MUX1"},
-        "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"},
-        "i2c":
-        {
-            "interface":
-            [
-                { "itf":"pmbus", "dev":"PSU1-PMBUS" }
-            ]
-        }
-    },
-    "PSU1-PMBUS":
-    {
-        "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU1-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU1"},
-        "i2c":
-        {
-            "topo_info":{ "parent_bus":"0x4", "dev_addr":"0x58", "dev_type":"psu_pmbus"},
-            "attr_list":
-            [   
-                { "attr_name":"psu_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x10", "attr_cmpval":"0x0", "attr_len":"1"},
-                { "attr_name":"psu_power_good", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
-                { "attr_name":"psu_model_name", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"16" },
-                { "attr_name":"psu_mfr_id", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"7" },
-                { "attr_name":"psu_serial_num", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"16" },
-                { "attr_name":"psu_v_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_i_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_p_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_v_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_i_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_p_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_fan_dir", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xc5", "attr_mask":"0x18", "attr_cmpval":"0x08", "attr_len":"1"},
-                { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_temp1_input", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
-             ]
-        }
-    },
-    "PSU2":
-    {
-        "dev_info": { "device_type":"PSU", "device_name":"PSU2", "device_parent":"MUX1" },
-        "dev_attr": { "dev_idx":"2", "num_psu_fans":"1"},
-        "i2c":
-        {
-            "interface":
-            [
-                { "itf":"pmbus", "dev":"PSU2-PMBUS"}
-            ]
-        }
-    },
-    "PSU2-PMBUS":
-    {
-        "dev_info": {"device_type":"PSU-PMBUS", "device_name":"PSU2-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU2"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x4", "dev_addr":"0x59", "dev_type":"psu_pmbus"},
-            "attr_list":
-            [ 
-                { "attr_name":"psu_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x20", "attr_cmpval":"0x0", "attr_len":"1"},
-                { "attr_name":"psu_power_good", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x8", "attr_cmpval":"0x0", "attr_len":"1"},
-                { "attr_name":"psu_model_name", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"16" },
-                { "attr_name":"psu_mfr_id", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"7" },
-                { "attr_name":"psu_serial_num", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"16" },
-                { "attr_name":"psu_v_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_i_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_p_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_v_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_i_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_p_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_fan_dir", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xc5", "attr_mask":"0x18", "attr_cmpval":"0x08", "attr_len":"1"},
-                { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_temp1_input", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
-            ]
-        }
-    },
-     "TEMP1":
-    {
-        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP1", "device_parent":"MUX1"},
-        "dev_attr": { "display_name":"LM75_U10"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x5", "dev_addr":"0x48", "dev_type":"lm75"},
-            "attr_list":
-            [
-                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
-                { "attr_name": "temp1_max_hyst"},
-                { "attr_name": "temp1_input"}
-            ]
-        }
-    },
-    "TEMP2":
-    {
-        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP2", "device_parent":"MUX1"},
-        "dev_attr": { "display_name":"LM75_U4"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x5", "dev_addr":"0x49", "dev_type":"lm75"},
-            "attr_list":
-            [
-                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
-                { "attr_name": "temp1_max_hyst"},
-                { "attr_name": "temp1_input"}
-            ]
-        }
-    },
-    "TEMP3":
-    {
-        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP3", "device_parent":"MUX1"},
-        "dev_attr": { "display_name":"LM75_U7"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x6", "dev_addr":"0x4a", "dev_type":"lm75"},
-            "attr_list":
-            [
-                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
-                { "attr_name": "temp1_max_hyst"},
-                { "attr_name": "temp1_input"}
-            ]
-        }
-    },  
-    "TEMP4":
-    {
-        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP4", "device_parent":"MUX1"},
-        "dev_attr": { "display_name":"LM75_U60"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x6", "dev_addr":"0x49", "dev_type":"lm75"},
-            "attr_list":
-            [
-                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
-                { "attr_name": "temp1_max_hyst"},
-                { "attr_name": "temp1_input"}
-            ]
-        }
-    },  
-    "PORT49":
-    {
-        "dev_info": { "device_type":"SFP28", "device_name":"PORT49", "device_parent":"MUX2"},
-        "dev_attr": { "dev_idx":"49"},
-        "i2c":
-        {
-            "interface":
-            [
-                { "itf":"eeprom", "dev":"PORT49-EEPROM" },
-                { "itf":"control", "dev":"PORT49-CTRL" }
-            ]
-        }
-    },
-    "PORT49-EEPROM":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT49-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT49"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe2"},
-            "attr_list":
-            [
-                { "attr_name":"eeprom"}
-            ]
-        }
-    },
-    "PORT49-CTRL":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT49-CTRL", "device_parent":"MUX2", "virt_parent":"PORT49"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x10", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
-            "attr_list":
-            [
-              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
-              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
-              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
-              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
-              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}
-            ]
-        }
-    },
-    "PORT50":
-    {
-        "dev_info": { "device_type":"SFP28", "device_name":"PORT50", "device_parent":"MUX2"},
-        "dev_attr": { "dev_idx":"50"},
-        "i2c":
-        {
-            "interface":
-            [
-                { "itf":"eeprom", "dev":"PORT50-EEPROM" },
-                { "itf":"control", "dev":"PORT50-CTRL" }
-            ]
-        }
-    },
-    "PORT50-EEPROM":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT50-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT50"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe2"},
-            "attr_list":
-            [
-                { "attr_name":"eeprom"}
-            ]
-        }
-    },
-    "PORT50-CTRL":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT50-CTRL", "device_parent":"MUX2", "virt_parent":"PORT50"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x11", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
-            "attr_list":
-            [
-              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
-              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
-              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
-              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
-              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}
- 
-            ]
-        }
-    },
-    "PORT51":
-    {
-        "dev_info": { "device_type":"SFP28", "device_name":"PORT51", "device_parent":"MUX2"},
-        "dev_attr": { "dev_idx":"51"},
-        "i2c":
-        {
-            "interface":
-            [
-                { "itf":"eeprom", "dev":"PORT51-EEPROM" },
-                { "itf":"control", "dev":"PORT51-CTRL" }
-            ]
-        }
-    },
-    "PORT51-EEPROM":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT51-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT51"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe2"},
-            "attr_list":
-            [
-                { "attr_name":"eeprom"}
-            ]
-        }
-    },
-    "PORT51-CTRL":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT51-CTRL", "device_parent":"MUX2", "virt_parent":"PORT51"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x12", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
-            "attr_list":
-            [
-              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
-              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
-              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
-              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
-              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}
-            ]
-        }
-    },
-    "PORT52":
-    {
-        "dev_info": { "device_type":"SFP28", "device_name":"PORT52", "device_parent":"MUX2"},
-        "dev_attr": { "dev_idx":"52"},
-        "i2c":
-        {
-            "interface":
-            [
-                { "itf":"eeprom", "dev":"PORT52-EEPROM" },
-                { "itf":"control", "dev":"PORT52-CTRL" }
-            ]
-        }
-    },
-    "PORT52-EEPROM":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT52-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT52"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe2"},
-            "attr_list":
-            [
-                { "attr_name":"eeprom"}
-            ]
-        }
-    },
-    "PORT52-CTRL":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT52-CTRL", "device_parent":"MUX2", "virt_parent":"PORT52"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x13", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
-            "attr_list":
-            [
-              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
-              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
-              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
-              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
-              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}
- 
-            ]
-        }
-    },
-    "PORT53":
-    {
-        "dev_info": { "device_type":"SFP28", "device_name":"PORT53", "device_parent":"MUX2"},
-        "dev_attr": { "dev_idx":"53"},
-        "i2c":
-        {
-            "interface":
-            [
-                { "itf":"eeprom", "dev":"PORT53-EEPROM" },
-                { "itf":"control", "dev":"PORT53-CTRL" }
-            ]
-        }
-    },
-    "PORT53-EEPROM":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT53-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT53"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe2"},
-            "attr_list":
-            [
-                { "attr_name":"eeprom"}
-            ]
-        }
-    },
-    "PORT53-CTRL":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT53-CTRL", "device_parent":"MUX2", "virt_parent":"PORT53"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x14", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
-            "attr_list":
-            [
-              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
-              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
-              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
-              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
-              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
- 
-            ]
-        }
-    },
-    "PORT54":
-    {
-        "dev_info": { "device_type":"SFP28", "device_name":"PORT54", "device_parent":"MUX2"},
-        "dev_attr": { "dev_idx":"54"},
-        "i2c":
-        {
-            "interface":
-            [
-                { "itf":"eeprom", "dev":"PORT54-EEPROM" },
-                { "itf":"control", "dev":"PORT54-CTRL" }
-            ]
-        }
-    },
-    "PORT54-EEPROM":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT54-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT54"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe2"},
-            "attr_list":
-            [
-                { "attr_name":"eeprom"}
-            ]
-        }
-    },
-    "PORT54-CTRL":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT54-CTRL", "device_parent":"MUX2", "virt_parent":"PORT54"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x15", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
-            "attr_list":
-            [
-              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
-              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
-              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
-              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
-              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}
-            ]
-        }
-    },
-    "PORT55":
-    {
-        "dev_info": { "device_type":"SFP28", "device_name":"PORT55", "device_parent":"MUX2"},
-        "dev_attr": { "dev_idx":"55"},
-        "i2c":
-        {
-            "interface":
-            [
-                { "itf":"eeprom", "dev":"PORT55-EEPROM" },
-                { "itf":"control", "dev":"PORT55-CTRL" }
-            ]
-        }
-    },
-    "PORT55-EEPROM":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT55-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT55"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe2"},
-            "attr_list":
-            [
-                { "attr_name":"eeprom"}
-            ]
-        }
-    },
-    "PORT55-CTRL":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT55-CTRL", "device_parent":"MUX2", "virt_parent":"PORT55"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x16", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
-            "attr_list":
-            [ 
-              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
-              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
-              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
-              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
-              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
-            ]
-        }
-    },
-    "PORT56":
-    {
-        "dev_info": { "device_type":"SFP28", "device_name":"PORT56", "device_parent":"MUX2"},
-        "dev_attr": { "dev_idx":"56"},
-        "i2c":
-        {
-            "interface":
-            [
-                { "itf":"eeprom", "dev":"PORT56-EEPROM" },
-                { "itf":"control", "dev":"PORT56-CTRL" }
-            ]
-        }
-    },
-    "PORT56-EEPROM":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT56-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT56"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe2"},
-            "attr_list":
-            [
-                { "attr_name":"eeprom"}
-            ]
-        }
-    },
-    "PORT56-CTRL":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT56-CTRL", "device_parent":"MUX2", "virt_parent":"PORT56"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x17", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
-            "attr_list":
-            [
-              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
-              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
-              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
-              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
-              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}
-            ]
-        }
-    },
-    "FAN-CTRL1":
-    {
-        "dev_info": { "device_type":"FAN", "device_name":"FAN-CTRL1", "device_parent":"MUX1"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x2", "dev_addr":"0x66", "dev_type":"fan_cpld"},
-            "dev_attr":  { "num_fantrays":"3"},
-            "attr_list":
-            [
-                { "attr_name":"fan1_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x32", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"},
-		{ "attr_name":"fan2_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x36", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"},
-		{ "attr_name":"fan3_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x3a", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"},
-		{ "attr_name":"fan1_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
-                { "attr_name":"fan2_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"},
-                { "attr_name":"fan3_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"},
-                { "attr_name":"fan1_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x31", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},
-                { "attr_name":"fan2_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x35", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150" , "attr_is_divisor":0},
-                { "attr_name":"fan3_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x39", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}
-            ]
-        }
-    },
-    "SYS_LED":
-    {
-        "dev_info": { "device_type":"LED", "device_name":"SYS_LED"},
-        "dev_attr": { "index":"0", "flag": "rw"},
-        "i2c" : {
-            "attr_list":
-            [
-                {"attr_name":"amber","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x1","swpld_addr_offset":"0x43"},
-                {"attr_name":"green","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x2","swpld_addr_offset":"0x43"},
-                {"attr_name":"off","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x0","swpld_addr_offset":"0x43"}
-            ]
-        }
-    },
-    "FANTRAY1_LED":
-    {
-        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
-        "dev_attr": { "index":"0", "flag": "rw"},
-        "i2c" : {
-            "attr_list":
-            [
-                {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x33"},
-                {"attr_name":"red","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x33"}
-            ]
-        }
-    },
-    "FANTRAY2_LED":
-    {
-        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
-        "dev_attr": { "index":"1", "flag": "rw"},
-        "i2c" : {
-            "attr_list":
-            [
-                {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x37"},
-                {"attr_name":"red","attr_devtype":"cpld","attr_devname":"CPLD1B","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x37"}
-            ]
-        }
-    },
-    "FANTRAY3_LED":
-    {
-        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
-        "dev_attr": { "index":"2", "flag": "rw"},
-        "i2c" : {
-            "attr_list":
-            [
-                {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x3b"},
-                {"attr_name":"red","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x3b"}
-            ]
-        }
-    }
-}
diff --git a/device/celestica/x86_64-cel_belgite-r0/platform_components.json b/device/celestica/x86_64-cel_belgite-r0/platform_components.json
deleted file mode 100644
index 23a4ce41cd67..000000000000
--- a/device/celestica/x86_64-cel_belgite-r0/platform_components.json
+++ /dev/null
@@ -1,10 +0,0 @@
-{
-    "chassis": {
-        "E1070": {
-            "component": {
-                "SWCPLD": {},
-                "BIOS": {}
-            }
-        }
-    }
-}
diff --git a/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/belgite.config.bcm b/device/celestica/x86_64-cel_ds1000-r0/DS1000/ds1000.config.bcm
similarity index 98%
rename from device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/belgite.config.bcm
rename to device/celestica/x86_64-cel_ds1000-r0/DS1000/ds1000.config.bcm
index a249804582c9..fd2ca27948be 100644
--- a/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/belgite.config.bcm
+++ b/device/celestica/x86_64-cel_ds1000-r0/DS1000/ds1000.config.bcm
@@ -166,4 +166,5 @@ portmap_56=63:10
 
 pbmp_xport_xe=0x01FFFFFFFFFFFFFE
 
-#
\ No newline at end of file
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
+#
diff --git a/device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/hwsku.json b/device/celestica/x86_64-cel_ds1000-r0/DS1000/hwsku.json
similarity index 100%
rename from device/celestica/x86_64-cel_belgite-r0/CELESTICA-BELGITE/hwsku.json
rename to device/celestica/x86_64-cel_ds1000-r0/DS1000/hwsku.json
diff --git a/device/celestica/x86_64-cel_ds1000-r0/DS1000/port_config.ini b/device/celestica/x86_64-cel_ds1000-r0/DS1000/port_config.ini
new file mode 100644
index 000000000000..123c4f10df22
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds1000-r0/DS1000/port_config.ini
@@ -0,0 +1,57 @@
+# name          lanes                 alias              index      speed     autoneg
+Ethernet0       26                    Eth1/1               1         1000      1
+Ethernet1       25                    Eth2/1               2         1000      1
+Ethernet2       28                    Eth3/1               3         1000      1
+Ethernet3       27                    Eth4/1               4         1000      1
+Ethernet4       30                    Eth5/1               5         1000      1
+Ethernet5       29                    Eth6/1               6         1000      1
+Ethernet6       32                    Eth7/1               7         1000      1
+Ethernet7       31                    Eth8/1               8         1000      1
+Ethernet8       34                    Eth9/1               9         1000      1
+Ethernet9       33                    Eth10/1              10        1000      1
+Ethernet10      36                    Eth11/1              11        1000      1
+Ethernet11      35                    Eth12/1              12        1000      1
+Ethernet12      38                    Eth13/1              13        1000      1
+Ethernet13      37                    Eth14/1              14        1000      1
+Ethernet14      40                    Eth15/1              15        1000      1
+Ethernet15      39                    Eth16/1              16        1000      1
+Ethernet16      42                    Eth17/1              17        1000      1
+Ethernet17      41                    Eth18/1              18        1000      1
+Ethernet18      44                    Eth19/1              19        1000      1
+Ethernet19      43                    Eth20/1              20        1000      1
+Ethernet20      50                    Eth21/1              21        1000      1
+Ethernet21      49                    Eth22/1              22        1000      1
+Ethernet22      52                    Eth23/1              23        1000      1
+Ethernet23      51                    Eth24/1              24        1000      1
+Ethernet24      2                     Eth25/1              25        1000      1
+Ethernet25      1                     Eth26/1              26        1000      1
+Ethernet26      4                     Eth27/1              27        1000      1
+Ethernet27      3                     Eth28/1              28        1000      1
+Ethernet28      6                     Eth29/1              29        1000      1
+Ethernet29      5                     Eth30/1              30        1000      1
+Ethernet30      8                     Eth31/1              31        1000      1
+Ethernet31      7                     Eth32/1              32        1000      1
+Ethernet32      10                    Eth33/1              33        1000      1
+Ethernet33      9                     Eth34/1              34        1000      1
+Ethernet34      12                    Eth35/1              35        1000      1
+Ethernet35      11                    Eth36/1              36        1000      1
+Ethernet36      14                    Eth37/1              37        1000      1
+Ethernet37      13                    Eth38/1              38        1000      1
+Ethernet38      16                    Eth39/1              39        1000      1
+Ethernet39      15                    Eth40/1              40        1000      1
+Ethernet40      18                    Eth41/1              41        1000      1
+Ethernet41      17                    Eth42/1              42        1000      1
+Ethernet42      20                    Eth43/1              43        1000      1
+Ethernet43      19                    Eth44/1              44        1000      1
+Ethernet44      22                    Eth45/1              45        1000      1
+Ethernet45      21                    Eth46/1              46        1000      1
+Ethernet46      24                    Eth47/1              47        1000      1
+Ethernet47      23                    Eth48/1              48        1000      1
+Ethernet48      60                    Eth49/1              49       10000      0
+Ethernet49      58                    Eth50/1              50       10000      0
+Ethernet50      59                    Eth51/1              51       10000      0
+Ethernet51      57                    Eth52/1              52       10000      0
+Ethernet52      62                    Eth53/1              53       10000      0
+Ethernet53      64                    Eth54/1              54       10000      0
+Ethernet54      61                    Eth55/1              55       10000      0
+Ethernet55      63                    Eth56/1              56       10000      0
diff --git a/device/celestica/x86_64-cel_ds1000-r0/DS1000/sai.profile b/device/celestica/x86_64-cel_ds1000-r0/DS1000/sai.profile
new file mode 100644
index 000000000000..d58abd359c7f
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds1000-r0/DS1000/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/ds1000.config.bcm
diff --git a/device/celestica/x86_64-cel_ds1000-r0/DS1000/sai_postinit_cmd.soc b/device/celestica/x86_64-cel_ds1000-r0/DS1000/sai_postinit_cmd.soc
new file mode 100644
index 000000000000..0de17febfeaf
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds1000-r0/DS1000/sai_postinit_cmd.soc
@@ -0,0 +1,6 @@
+modreg ING_MISC_CONFIG INPUT_PRI_TAGGED=1
+modreg ING_MISC_CONFIG  INPUT_PRI_UNTAGGED=1
+modreg  QTG_CHIP_CONFIG.qtgport0 PAUSE_PFC_SEL=1
+modreg  QTG_CHIP_CONFIG.qtgport1 PAUSE_PFC_SEL=1
+modreg  CHIP_CONFIG.pmqport0  PAUSE_PFC_SEL=1
+modreg  CHIP_CONFIG.pmqport1  PAUSE_PFC_SEL=1
diff --git a/device/celestica/x86_64-cel_ds1000-r0/custom_led.bin b/device/celestica/x86_64-cel_ds1000-r0/custom_led.bin
new file mode 100755
index 0000000000000000000000000000000000000000..1fe3d5abac5a44b16f6ae059e0811f236295265f
GIT binary patch
literal 272
zcmWN}J1;|V7{KA*zpdMG+^eW-PjBj2w3VVR)i$qz1zTgFBI)QO2nHi!kTUoPa*_^`
zN@}vn!6cS0Qjtg+qlxDOJoVC(tjIwruoh-NLC_ge#)UYIGjSMN>QwaVVc}(KSG=iJ
zDSFSXOd+@Fh`XlCY2EgpsN|JZL=`r2p7fU;Wm$-PKY!FP@ag_*InJtZBBUiRMO7cR
zRrJ-u{I!*-*>1Hbk#!Y&w_N7WTcvy_w^F}<+);VSXXGgVS*ys+3=H69kRgT{VU#g^
z|Fxe0K|+KXC&C0KlS~mMMjV9$CoURjq={x)&}c=cpFTYF;--ggy6B{XcG{R{jwG`z
Jl45}+{s5hIKs^8e

literal 0
HcmV?d00001

diff --git a/device/celestica/x86_64-cel_ds1000-r0/default_sku b/device/celestica/x86_64-cel_ds1000-r0/default_sku
new file mode 100644
index 000000000000..e83707dd8d95
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds1000-r0/default_sku
@@ -0,0 +1 @@
+DS1000 t1
diff --git a/device/celestica/x86_64-cel_belgite-r0/installer.conf b/device/celestica/x86_64-cel_ds1000-r0/installer.conf
similarity index 83%
rename from device/celestica/x86_64-cel_belgite-r0/installer.conf
rename to device/celestica/x86_64-cel_ds1000-r0/installer.conf
index 430473933330..fbc96da1773d 100644
--- a/device/celestica/x86_64-cel_belgite-r0/installer.conf
+++ b/device/celestica/x86_64-cel_ds1000-r0/installer.conf
@@ -1,4 +1,4 @@
-CONSOLE_PORT=0x3f8
+CONSOLE_PORT=0xe060
 CONSOLE_DEV=0
-CONSOLE_SPEED=9600
+CONSOLE_SPEED=115200
 ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_iommu=off modprobe.blacklist=gpio_ich,i2c-ismt,i2c_ismt,i2c-i801,i2c_i801 crashkernel=0M-2G:256M,2G-4G:320M,4G-8G:384M,8G-:448M acpi_no_watchdog"
diff --git a/device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/Makefile b/device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/Makefile
similarity index 99%
rename from device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/Makefile
rename to device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/Makefile
index ddc700bfb87e..21bd48d0ab3b 100755
--- a/device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/Makefile
+++ b/device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/Makefile
@@ -21,4 +21,3 @@ all:
 
 clean:
 	rm -rf *.elf *.o *.map *.bin
-
diff --git a/device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/custom_led.c b/device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/custom_led.c
similarity index 79%
rename from device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/custom_led.c
rename to device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/custom_led.c
index 712b5503e34b..fea5bc581f16 100755
--- a/device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/custom_led.c
+++ b/device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/custom_led.c
@@ -82,31 +82,42 @@ This array would have port speed for each port, as per bit mapping defined in
 "soc_led_speed_t" in $SDK/include/shared/cmicfw/cmicx_led_public.h file.
 
 Here is an exception, please keep in mind:
-1. For TH3, port status/speed of  xe1 (physical port 258) is located in the 
+1. For TH3, port status/speed of  xe1 (physical port 258) is located in the
    accumulation entry/speed array  of physical port 259.
 
 ******************************************************************************/
 #include <shared/cmicfw/cmicx_led_public.h>
 
 #define ACTIVITY_TICKS 2
-#define READ_LED_ACCU_DATA(base, port) (*((uint16 *)(base + ((port - 1) * sizeof(uint32)))))
-#define WRITE_LED_SEND_DATA(base, port, val)  (*((uint16 *)(base + ((port - 1) * sizeof(uint32)))) = val)
+
+/*! Macro to calculate LED RAM address. */
+#define LED_HW_RAM_ADDR(base, port) \
+    (base + (port * sizeof(uint32)))
+
+/*! Macro to read LED RAM. */
+#define LED_HW_RAM_READ16(base, port) \
+    *((uint16 *) LED_HW_RAM_ADDR(base, port))
+
+/*! Macro to write LED RAM. */
+#define LED_HW_RAM_WRITE16(base, port, val)  \
+    *((uint16 *) LED_HW_RAM_ADDR(base, port)) = (val)
 
 #define PORT_NUM_TOTAL 56
 
 #define LED_GREEN_BICOLOR 0x2 //bit : 10
 #define LED_AMBER_BICOLOR 0x1 //bit : 01
 #define LED_OFF_BICOLOR   0x3 //bit : 11
-                                          
+#define LED_SW_LINK_UP    0x1
+
 unsigned short portmap[] = {
      25,  26,  27,  28,  29,  30,  31,  32,
-     33,  34,  35,  36,  37,  38,  39,  40, 
+     33,  34,  35,  36,  37,  38,  39,  40,
      41,  42,  43,  44,  49,  50,  51,  52,
       1,   2,   3,   4,   5,   6,   7,   8,
       9,  10,  11,  12,  24,  23,  22,  21,
-     20,  19,  18,  17,  16,  15,  14,  13, 
+     20,  19,  18,  17,  16,  15,  14,  13,
      60,  58,  59,  57,  62,  64,  61,  63
-};                                          
+};
 
 
 /*
@@ -123,49 +134,59 @@ unsigned short portmap[] = {
 void custom_led_handler(soc_led_custom_handler_ctrl_t *ctrl,
                         uint32 activity_count)
 {
-    unsigned short accu_val = 0, send_val = 0;
-    unsigned short port, physical_port;
-    
+    uint8 idx = 0;
+    uint16 accu_val = 0, send_val = 0;
+    uint16 uc_port = 0, physical_port = 0;
+
     /* Physical port numbers to be used */
-    for(port = 1; port <= PORT_NUM_TOTAL; port++) {
+    for(uc_port = 0; uc_port < PORT_NUM_TOTAL; uc_port++) {
+
+	// change to zero-based
+	physical_port = portmap[uc_port] - 1;
 
-	physical_port = portmap[port-1];
-        
         /* Read value from led_ram bank0 */
-        accu_val = READ_LED_ACCU_DATA(ctrl->accu_ram_base, physical_port);
+        accu_val = LED_HW_RAM_READ16(ctrl->accu_ram_base, physical_port);
 
-        send_val = 0xff; 
-       
-        if (((accu_val & LED_OUTPUT_RX) || (accu_val & LED_OUTPUT_TX)) && (activity_count & ACTIVITY_TICKS))
+        send_val = LED_OFF_BICOLOR;
+
+        if (((accu_val & LED_HW_RX) || (accu_val & LED_HW_TX)) && (activity_count & ACTIVITY_TICKS))
         {
             send_val = LED_OFF_BICOLOR;
         }
-        else if ( accu_val & LED_OUTPUT_LINK_UP)
+        else if (ctrl->led_control_data[physical_port] & LED_SW_LINK_UP)
         {
             send_val = LED_GREEN_BICOLOR;
         }
         else
         {
             send_val = LED_OFF_BICOLOR;
-         }
-        
+        }
+
 	/* Write value to led_ram bank1 */
-        WRITE_LED_SEND_DATA(ctrl->pat_ram_base, port, send_val);
+        LED_HW_RAM_WRITE16(ctrl->pat_ram_base, uc_port, send_val);
     } /* for */
 
-    /* Send the pattern over LED interface 1 for ports 1 - 56*/
-    ctrl->intf_ctrl[1].valid = 1;
-    ctrl->intf_ctrl[1].start_row = 0;
-    ctrl->intf_ctrl[1].end_row = 55;
-    ctrl->intf_ctrl[1].pat_width = 2;
-
-    /* Invalidate rest of the interfaces */
-    ctrl->intf_ctrl[0].valid = 0;
-    ctrl->intf_ctrl[2].valid = 0;
-    ctrl->intf_ctrl[3].valid = 0;
-    ctrl->intf_ctrl[4].valid = 0;
+    /* Configure LED HW interfaces based on board configuration */
+    for (idx = 0; idx < LED_HW_INTF_MAX_NUM; idx++) {
+        soc_led_intf_ctrl_t *lic = &ctrl->intf_ctrl[idx];
+        switch (idx) {
+        case 0:
+	        lic->valid = 0;
+            break;
+        case 1:
+	        lic->valid = 1;
+            lic->start_row = 0;
+            lic->end_row = 55;
+            lic->pat_width = 2;
+            break;
+        default:
+
+            /* Invalidate rest of the interfaces */
+            lic->valid = 0;
+            break;
+        }
+    }
 
     return;
 
 }
-
diff --git a/device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/custom_led.lds b/device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/custom_led.lds
similarity index 100%
rename from device/celestica/x86_64-cel_belgite-r0/led-source-code/cmicx/custom_led.lds
rename to device/celestica/x86_64-cel_ds1000-r0/led-source-code/cmicx/custom_led.lds
diff --git a/device/celestica/x86_64-cel_ds1000-r0/led_proc_init.soc b/device/celestica/x86_64-cel_ds1000-r0/led_proc_init.soc
new file mode 100644
index 000000000000..7bd004f12b82
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds1000-r0/led_proc_init.soc
@@ -0,0 +1,5 @@
+linkscan off
+m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
+sleep 3
+led auto on; led start
+linkscan on
diff --git a/device/celestica/x86_64-cel_belgite-r0/media_settings.json b/device/celestica/x86_64-cel_ds1000-r0/media_settings.json
similarity index 99%
rename from device/celestica/x86_64-cel_belgite-r0/media_settings.json
rename to device/celestica/x86_64-cel_ds1000-r0/media_settings.json
index 50f7c545f09e..fc52c39c7a60 100644
--- a/device/celestica/x86_64-cel_belgite-r0/media_settings.json
+++ b/device/celestica/x86_64-cel_ds1000-r0/media_settings.json
@@ -46,4 +46,3 @@
         }
     }
 }
-
diff --git a/device/celestica/x86_64-cel_belgite-r0/pcie.yaml b/device/celestica/x86_64-cel_ds1000-r0/pcie.yaml
similarity index 56%
rename from device/celestica/x86_64-cel_belgite-r0/pcie.yaml
rename to device/celestica/x86_64-cel_ds1000-r0/pcie.yaml
index 46e202526716..47e5ecbead8f 100644
--- a/device/celestica/x86_64-cel_belgite-r0/pcie.yaml
+++ b/device/celestica/x86_64-cel_ds1000-r0/pcie.yaml
@@ -1,121 +1,143 @@
 - bus: '00'
   dev: '00'
   fn: '0'
-  id: 1980
-  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent'
+  id: '1980'
+  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev
+    11)'
 - bus: '00'
   dev: '04'
   fn: '0'
   id: 19a1
-  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers'
+  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers
+    (rev 11)'
 - bus: '00'
   dev: '05'
   fn: '0'
   id: 19a2
-  name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000 Series Root Complex Event Collector'
+  name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000
+    Series Root Complex Event Collector (rev 11)'
 - bus: '00'
   dev: '06'
   fn: '0'
-  id: 19e2
-  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT Root Port'
+  id: 19a3
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT
+    Root Port (rev 11)'
 - bus: '00'
-  dev: '09'
+  dev: 09
   fn: '0'
-  id: b277
-  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root Port'
+  id: 19a4
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #0 (rev 11)'
 - bus: '00'
-  dev: '0b'
+  dev: 0b
   fn: '0'
-  id: 1533
-  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root Port'
+  id: 19a6
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #2 (rev 11)'
 - bus: '00'
-  dev: '0e'
+  dev: 0e
   fn: '0'
   id: 19a8
-  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root Port'
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #4 (rev 11)'
 - bus: '00'
   dev: '12'
   fn: '0'
   id: 19ac
-  name: 'System peripheral: Intel Corporation DNV SMBus Contoller - Host'
+  name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller
+    - Host (rev 11)'
 - bus: '00'
   dev: '14'
   fn: '0'
   id: 19c2
-  name: 'SATA controller: Intel Corporation DNV SATA Controller 1'
+  name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller
+    1 (rev 11)'
 - bus: '00'
   dev: '15'
   fn: '0'
   id: 19d0
-  name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI Controller'
+  name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI
+    Controller (rev 11)'
 - bus: '00'
   dev: '16'
   fn: '0'
-  id: 15ce
-  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN Root Port'
+  id: 19d1
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
+    Root Port #0 (rev 11)'
 - bus: '00'
   dev: '18'
   fn: '0'
   id: 19d3
-  name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME HECI 1'
+  name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME
+    HECI 1 (rev 11)'
 - bus: '00'
-  dev: '1a'
+  dev: 1a
   fn: '0'
   id: 19d8
-  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller'
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+    (rev 11)'
 - bus: '00'
-  dev: '1a'
+  dev: 1a
   fn: '1'
   id: 19d8
-  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller'
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+    (rev 11)'
 - bus: '00'
-  dev: '1a'
+  dev: 1a
   fn: '2'
   id: 19d8
-  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller'
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+    (rev 11)'
 - bus: '00'
-  dev: '1f'
+  dev: 1f
   fn: '0'
   id: 19dc
-  name: 'ISA bridge: Intel Corporation DNV LPC or eSPI'
+  name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev
+    11)'
 - bus: '00'
-  dev: '1f'
+  dev: 1f
   fn: '2'
   id: 19de
-  name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management Controller'
+  name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management
+    Controller (rev 11)'
 - bus: '00'
-  dev: '1f'
+  dev: 1f
   fn: '4'
   id: 19df
-  name: 'SMBus: Intel Corporation DNV SMBus controller'
+  name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev
+    11)'
 - bus: '00'
-  dev: '1f'
+  dev: 1f
   fn: '5'
   id: 19e0
-  name: 'Serial bus controller [0c80]: Intel Corporation DNV SPI Controller'
+  name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series
+    SPI Controller (rev 11)'
 - bus: '01'
   dev: '00'
   fn: '0'
   id: 19e2
-  name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology'
+  name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology
+    (rev 11)'
 - bus: '02'
   dev: '00'
   fn: '0'
   id: b277
-  name: 'Ethernet controller: Broadcom Limited Device b277'
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b277 (rev 02)'
 - bus: '03'
   dev: '00'
   fn: '0'
-  id: 1533
-  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection'
+  id: '1533'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
+    03)'
 - bus: '05'
   dev: '00'
   fn: '0'
-  id: 15ce
-  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 10 GbE SFP+'
+  id: 15c2
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
+    (rev 11)'
 - bus: '05'
   dev: '00'
   fn: '1'
-  id: 15ce
-  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 10 GbE SFP+'
-
+  id: 15c2
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
+    (rev 11)'
diff --git a/device/celestica/x86_64-cel_belgite-r0/pddf/pd-plugin.json b/device/celestica/x86_64-cel_ds1000-r0/pddf/pd-plugin.json
similarity index 84%
rename from device/celestica/x86_64-cel_belgite-r0/pddf/pd-plugin.json
rename to device/celestica/x86_64-cel_ds1000-r0/pddf/pd-plugin.json
index 454afd239964..f0ce24dc6524 100644
--- a/device/celestica/x86_64-cel_belgite-r0/pddf/pd-plugin.json
+++ b/device/celestica/x86_64-cel_ds1000-r0/pddf/pd-plugin.json
@@ -11,14 +11,14 @@
     },
     "PSU":
     {
-        "psu_present": 
+        "psu_present":
         {
             "i2c":
             {
                 "valmap": { "1":true, "0":false }
             }
         },
-        "psu_power_good": 
+        "psu_power_good":
         {
             "i2c":
             {
@@ -29,7 +29,7 @@
         {
             "i2c":
             {
-                "valmap": { "0":"INTAKE", "1":"EXHAUST" }
+                "valmap": { "0":"intake", "1":"exhaust" }
             }
         },
         "PSU_FAN_MAX_SPEED":"18000"
@@ -40,7 +40,7 @@
         {
             "i2c":
             {
-                "valmap": {"1":"EXHAUST", "0":"INTAKE"}
+                "valmap": {"1":"exhaust", "0":"intake"}
             }
         },
         "present":
diff --git a/device/celestica/x86_64-cel_belgite-r0/pddf/pddf-device.json b/device/celestica/x86_64-cel_ds1000-r0/pddf/pddf-device.json
similarity index 87%
rename from device/celestica/x86_64-cel_belgite-r0/pddf/pddf-device.json
rename to device/celestica/x86_64-cel_ds1000-r0/pddf/pddf-device.json
index a97102c1f4cb..02293634e7f7 100644
--- a/device/celestica/x86_64-cel_belgite-r0/pddf/pddf-device.json
+++ b/device/celestica/x86_64-cel_ds1000-r0/pddf/pddf-device.json
@@ -1,685 +1,682 @@
-{
-    "PLATFORM":
-    {
-        "num_psus":2,
-        "num_fantrays":3,
-        "num_fans_pertray":1,
-        "num_ports":56,
-        "num_temps":4,
-        "pddf_dev_types":
-        {
-            "description":"Belgite - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo <dev-address> <dev-type> > <path>/new_device' method",
-            "CPLD":
-            [
-               "i2c_cpld"
-            ],
-            "PSU":
-            [
-                "psu_eeprom",
-                "psu_pmbus"
-            ],
-            "FAN":
-            [
-                "fan_ctrl",
-                "fan_eeprom",
-                "fan_cpld"
-            ],
-            "PORT_MODULE":
-            [
-                "pddf_xcvr"
-            ]
-        },
-        "std_perm_kos":
-        [
-            "i2c-ismt",
-            "i2c-i801"
-        ],
-        "std_kos":
-        [
-            "i2c_dev",
-            "i2c_mux_pca954x force_deselect_on_exit=1",
-            "gpio_pca953x",
-	    "mc24lc64t",
-            "optoe"
-        ],
-        "pddf_kos":
-        [
-            "pddf_client_module",
-            "pddf_mux_module",
-            "pddf_psu_driver_module",
-            "pddf_psu_module",
-            "pddf_gpio_module",
-            "pddf_xcvr_module",
-            "pddf_xcvr_driver_module",
-            "pddf_led_module",
-            "pddf_fan_driver_module",
-            "pddf_fan_module",
-            "pddf_led_module"
-    	],
-	"custom_kos":
-        [
-            "pddf_custom_psu",
-            "pddf_custom_wdt"
-        ]
-    },
-    "SYSTEM":
-    {
-        "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null},
-        "i2c":
-        {
-            "CONTROLLERS":
-            [
-                { "dev_name":"i2c-0", "dev":"SMBUS0" }
-            ]
-        }
-    },
-    "SMBUS0":
-    {
-        "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"},
-        "i2c":
-        {
-            "topo_info": {"dev_addr": "0x0"},
-            "DEVICES":
-            [
-                {"dev": "EEPROM1"},
-                {"dev": "MUX1"}
-            ]
-        }
-    },
-    "EEPROM1":
-    {
-        "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"},
-        "i2c":
-        {
-            "topo_info": {"parent_bus": "0x0", "dev_addr": "0x52", "dev_type": "24lc64t"},
-            "dev_attr": {"access_mode": "BLOCK"},
-            "attr_list": 
-            [
-                {"attr_name": "eeprom"}
-            ]
-        }
-    },
-    "MUX1":
-    {
-        "dev_info": {  "device_type":"MUX", "device_name":"MUX1", "device_parent":"SMBUS0"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x0", "dev_addr":"0x70", "dev_type":"pca9548"},
-            "dev_attr": { "virt_bus":"0x2"},
-            "channel":
-            [
-              {"chn":"0", "dev":"CPLD1" },
-              {"chn":"0", "dev":"FAN-CTRL" },
-              {"chn":"2", "dev":"PSU1" }, 
-              {"chn":"2", "dev":"PSU2" },
-              {"chn":"3", "dev":"TEMP1"},
-              {"chn":"3", "dev":"TEMP2"},
-              {"chn":"4", "dev":"TEMP3"},
-	      {"chn":"4", "dev":"TEMP4"},
-              {"chn":"7", "dev":"MUX2"}  
-            ]
-        }
-    },
-    "MUX2":
-    {
-        "dev_info": {  "device_type":"MUX", "device_name":"MUX2", "device_parent":"MUX1"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x9", "dev_addr":"0x71", "dev_type":"pca9548"},
-            "dev_attr": { "virt_bus":"0xA"},
-            "channel":
-            [
-              {"chn":"0", "dev":"PORT49"},
-              {"chn":"1", "dev":"PORT50"}, 
-              {"chn":"2", "dev":"PORT51"},
-              {"chn":"3", "dev":"PORT52"},
-              {"chn":"4", "dev":"PORT53"},
-              {"chn":"5", "dev":"PORT54"},
-              {"chn":"6", "dev":"PORT55"},
-              {"chn":"7", "dev":"PORT56"}  
-            ]
-        }
-    },
-    "CPLD1":
-    {
-       "dev_info": {"device_type": "CPLD", "device_name": "CPLD1", "device_parent": "MUX1"},
-       "i2c":
-        {
-            "topo_info": {"parent_bus": "0x2", "dev_addr": "0x32", "dev_type": "i2c_cpld"},
-            "dev_attr": {}
-        }
-    },
-    "PSU1":
-    {
-        "dev_info": { "device_type":"PSU", "device_name":"PSU1", "device_parent":"MUX1"},
-        "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"},
-        "i2c":
-        {
-            "interface":
-            [
-                { "itf":"pmbus", "dev":"PSU1-PMBUS" }
-            ]
-        }
-    },
-    "PSU1-PMBUS":
-    {
-        "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU1-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU1"},
-        "i2c":
-        {
-            "topo_info":{ "parent_bus":"0x4", "dev_addr":"0x58", "dev_type":"psu_pmbus"},
-            "attr_list":
-            [   
-                { "attr_name":"psu_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x10", "attr_cmpval":"0x0", "attr_len":"1"},
-                { "attr_name":"psu_power_good", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
-                { "attr_name":"psu_model_name", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"13" },
-                { "attr_name":"psu_mfr_id", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"11" },
-                { "attr_name":"psu_serial_num", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"14" },
-                { "attr_name":"psu_v_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_i_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_v_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_i_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_p_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_fan_dir", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x80", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"1"},
-                { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_temp1_input", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
-             ]
-        }
-    },
-    "PSU2":
-    {
-        "dev_info": { "device_type":"PSU", "device_name":"PSU2", "device_parent":"MUX1" },
-        "dev_attr": { "dev_idx":"2", "num_psu_fans":"1"},
-        "i2c":
-        {
-            "interface":
-            [
-                { "itf":"pmbus", "dev":"PSU2-PMBUS"}
-            ]
-        }
-    },
-    "PSU2-PMBUS":
-    {
-        "dev_info": {"device_type":"PSU-PMBUS", "device_name":"PSU2-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU2"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x4", "dev_addr":"0x59", "dev_type":"psu_pmbus"},
-            "attr_list":
-            [ 
-                { "attr_name":"psu_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x20", "attr_cmpval":"0x0", "attr_len":"1"},
-                { "attr_name":"psu_power_good", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x8", "attr_cmpval":"0x0", "attr_len":"1"},
-                { "attr_name":"psu_model_name", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"13" },
-                { "attr_name":"psu_mfr_id", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"11" },
-                { "attr_name":"psu_serial_num", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"14" },
-                { "attr_name":"psu_v_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_i_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_v_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_i_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_p_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_fan_dir", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x80", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"1"},
-                { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_temp1_input", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
-            ]
-        }
-    },
-     "TEMP1":
-    {
-        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP1", "device_parent":"MUX1"},
-        "dev_attr": { "display_name":"LM75_U10"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x5", "dev_addr":"0x48", "dev_type":"lm75"},
-            "attr_list":
-            [
-                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
-                { "attr_name": "temp1_max_hyst"},
-                { "attr_name": "temp1_input"}
-            ]
-        }
-    },
-    "TEMP2":
-    {
-        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP2", "device_parent":"MUX1"},
-        "dev_attr": { "display_name":"LM75_U4"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x5", "dev_addr":"0x49", "dev_type":"lm75"},
-            "attr_list":
-            [
-                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
-                { "attr_name": "temp1_max_hyst"},
-                { "attr_name": "temp1_input"}
-            ]
-        }
-    },
-    "TEMP3":
-    {
-        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP3", "device_parent":"MUX1"},
-        "dev_attr": { "display_name":"LM75_U7"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x6", "dev_addr":"0x4a", "dev_type":"lm75"},
-            "attr_list":
-            [
-                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
-                { "attr_name": "temp1_max_hyst"},
-                { "attr_name": "temp1_input"}
-            ]
-        }
-    },  
-    "TEMP4":
-    {
-        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP4", "device_parent":"MUX1"},
-        "dev_attr": { "display_name":"LM75_U60"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x6", "dev_addr":"0x49", "dev_type":"lm75"},
-            "attr_list":
-            [
-                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
-                { "attr_name": "temp1_max_hyst"},
-                { "attr_name": "temp1_input"}
-            ]
-        }
-    },  
-    "PORT49":
-    {
-        "dev_info": { "device_type":"SFP+", "device_name":"PORT49", "device_parent":"MUX2"},
-        "dev_attr": { "dev_idx":"49"},
-        "i2c":
-        {
-            "interface":
-            [
-                { "itf":"eeprom", "dev":"PORT49-EEPROM" },
-                { "itf":"control", "dev":"PORT49-CTRL" }
-            ]
-        }
-    },
-    "PORT49-EEPROM":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT49-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT49"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0xA", "dev_addr":"0x50", "dev_type":"optoe2"},
-            "attr_list":
-            [
-                { "attr_name":"eeprom"}
-            ]
-        }
-    },
-    "PORT49-CTRL":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT49-CTRL", "device_parent":"MUX2", "virt_parent":"PORT49"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0xA", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
-            "attr_list":
-            [
-              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
-              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
-              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
-              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
-              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}
-            ]
-        }
-    },
-    "PORT50":
-    {
-        "dev_info": { "device_type":"SFP+", "device_name":"PORT50", "device_parent":"MUX2"},
-        "dev_attr": { "dev_idx":"50"},
-        "i2c":
-        {
-            "interface":
-            [
-                { "itf":"eeprom", "dev":"PORT50-EEPROM" },
-                { "itf":"control", "dev":"PORT50-CTRL" }
-            ]
-        }
-    },
-    "PORT50-EEPROM":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT50-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT50"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0xB", "dev_addr":"0x50", "dev_type":"optoe2"},
-            "attr_list":
-            [
-                { "attr_name":"eeprom"}
-            ]
-        }
-    },
-    "PORT50-CTRL":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT50-CTRL", "device_parent":"MUX2", "virt_parent":"PORT50"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0xB", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
-            "attr_list":
-            [
-              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
-              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
-              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
-              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
-              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}
- 
-            ]
-        }
-    },
-    "PORT51":
-    {
-        "dev_info": { "device_type":"SFP+", "device_name":"PORT51", "device_parent":"MUX2"},
-        "dev_attr": { "dev_idx":"51"},
-        "i2c":
-        {
-            "interface":
-            [
-                { "itf":"eeprom", "dev":"PORT51-EEPROM" },
-                { "itf":"control", "dev":"PORT51-CTRL" }
-            ]
-        }
-    },
-    "PORT51-EEPROM":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT51-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT51"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0xC", "dev_addr":"0x50", "dev_type":"optoe2"},
-            "attr_list":
-            [
-                { "attr_name":"eeprom"}
-            ]
-        }
-    },
-    "PORT51-CTRL":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT51-CTRL", "device_parent":"MUX2", "virt_parent":"PORT51"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0xC", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
-            "attr_list":
-            [
-              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
-              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
-              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
-              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
-              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}
-            ]
-        }
-    },
-    "PORT52":
-    {
-        "dev_info": { "device_type":"SFP+", "device_name":"PORT52", "device_parent":"MUX2"},
-        "dev_attr": { "dev_idx":"52"},
-        "i2c":
-        {
-            "interface":
-            [
-                { "itf":"eeprom", "dev":"PORT52-EEPROM" },
-                { "itf":"control", "dev":"PORT52-CTRL" }
-            ]
-        }
-    },
-    "PORT52-EEPROM":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT52-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT52"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0xD", "dev_addr":"0x50", "dev_type":"optoe2"},
-            "attr_list":
-            [
-                { "attr_name":"eeprom"}
-            ]
-        }
-    },
-    "PORT52-CTRL":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT52-CTRL", "device_parent":"MUX2", "virt_parent":"PORT52"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0xD", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
-            "attr_list":
-            [
-              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
-              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
-              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
-              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
-              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}
- 
-            ]
-        }
-    },
-    "PORT53":
-    {
-        "dev_info": { "device_type":"SFP+", "device_name":"PORT53", "device_parent":"MUX2"},
-        "dev_attr": { "dev_idx":"53"},
-        "i2c":
-        {
-            "interface":
-            [
-                { "itf":"eeprom", "dev":"PORT53-EEPROM" },
-                { "itf":"control", "dev":"PORT53-CTRL" }
-            ]
-        }
-    },
-    "PORT53-EEPROM":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT53-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT53"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0xE", "dev_addr":"0x50", "dev_type":"optoe2"},
-            "attr_list":
-            [
-                { "attr_name":"eeprom"}
-            ]
-        }
-    },
-    "PORT53-CTRL":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT53-CTRL", "device_parent":"MUX2", "virt_parent":"PORT53"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0xE", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
-            "attr_list":
-            [
-              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
-              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
-              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
-              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
-              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
- 
-            ]
-        }
-    },
-    "PORT54":
-    {
-        "dev_info": { "device_type":"SFP+", "device_name":"PORT54", "device_parent":"MUX2"},
-        "dev_attr": { "dev_idx":"54"},
-        "i2c":
-        {
-            "interface":
-            [
-                { "itf":"eeprom", "dev":"PORT54-EEPROM" },
-                { "itf":"control", "dev":"PORT54-CTRL" }
-            ]
-        }
-    },
-    "PORT54-EEPROM":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT54-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT54"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0xF", "dev_addr":"0x50", "dev_type":"optoe2"},
-            "attr_list":
-            [
-                { "attr_name":"eeprom"}
-            ]
-        }
-    },
-    "PORT54-CTRL":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT54-CTRL", "device_parent":"MUX2", "virt_parent":"PORT54"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0xF", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
-            "attr_list":
-            [
-              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
-              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
-              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
-              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
-              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}
-            ]
-        }
-    },
-    "PORT55":
-    {
-        "dev_info": { "device_type":"SFP+", "device_name":"PORT55", "device_parent":"MUX2"},
-        "dev_attr": { "dev_idx":"55"},
-        "i2c":
-        {
-            "interface":
-            [
-                { "itf":"eeprom", "dev":"PORT55-EEPROM" },
-                { "itf":"control", "dev":"PORT55-CTRL" }
-            ]
-        }
-    },
-    "PORT55-EEPROM":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT55-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT55"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe2"},
-            "attr_list":
-            [
-                { "attr_name":"eeprom"}
-            ]
-        }
-    },
-    "PORT55-CTRL":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT55-CTRL", "device_parent":"MUX2", "virt_parent":"PORT55"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x10", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
-            "attr_list":
-            [ 
-              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
-              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
-              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
-              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
-              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
-            ]
-        }
-    },
-    "PORT56":
-    {
-        "dev_info": { "device_type":"SFP+", "device_name":"PORT56", "device_parent":"MUX2"},
-        "dev_attr": { "dev_idx":"56"},
-        "i2c":
-        {
-            "interface":
-            [
-                { "itf":"eeprom", "dev":"PORT56-EEPROM" },
-                { "itf":"control", "dev":"PORT56-CTRL" }
-            ]
-        }
-    },
-    "PORT56-EEPROM":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT56-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT56"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe2"},
-            "attr_list":
-            [
-                { "attr_name":"eeprom"}
-            ]
-        }
-    },
-    "PORT56-CTRL":
-    {
-        "dev_info": { "device_type":"", "device_name":"PORT56-CTRL", "device_parent":"MUX2", "virt_parent":"PORT56"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x11", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
-            "attr_list":
-            [
-              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
-              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
-              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
-              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
-              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}
-            ]
-        }
-    },
-    "FAN-CTRL":
-    {
-        "dev_info": { "device_type":"FAN", "device_name":"FAN-CTRL", "device_parent":"MUX1"},
-        "i2c":
-        {
-            "topo_info": { "parent_bus":"0x2", "dev_addr":"0x66", "dev_type":"fan_cpld"},
-            "dev_attr":  { "num_fantrays":"3"},
-            "attr_list":
-            [
-                { "attr_name":"fan1_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x32", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"},
-		{ "attr_name":"fan2_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x36", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"},
-		{ "attr_name":"fan3_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x3a", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"},
-		{ "attr_name":"fan1_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
-                { "attr_name":"fan2_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"},
-                { "attr_name":"fan3_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"},
-                { "attr_name":"fan1_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x31", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},
-                { "attr_name":"fan2_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x35", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150" , "attr_is_divisor":0},
-                { "attr_name":"fan3_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x39", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}
-            ]
-        }
-    },
-    "SYS_LED":
-    {
-        "dev_info": { "device_type":"LED", "device_name":"SYS_LED"},
-        "dev_attr": { "index":"0"},
-        "i2c" : {
-            "attr_list":
-            [
-                {"attr_name":"STATUS_LED_COLOR_AMBER","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x1","swpld_addr_offset":"0x43"},
-                {"attr_name":"STATUS_LED_COLOR_GREEN","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x2","swpld_addr_offset":"0x43"},
-                {"attr_name":"STATUS_LED_COLOR_OFF","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x3","swpld_addr_offset":"0x43"}
-            ]
-        }
-    },
-    "FANTRAY1_LED":
-    {
-        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
-        "dev_attr": { "index":"0"},
-        "i2c" : {
-            "attr_list":
-            [
-                {"attr_name":"STATUS_LED_COLOR_GREEN","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x33"},
-                {"attr_name":"STATUS_LED_COLOR_AMBER","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x33"}
-            ]
-        }
-    },
-    "FANTRAY2_LED":
-    {
-        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
-        "dev_attr": { "index":"1"},
-        "i2c" : {
-            "attr_list":
-            [
-                {"attr_name":"STATUS_LED_COLOR_GREEN","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x37"},
-                {"attr_name":"STATUS_LED_COLOR_AMBER","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x37"}
-            ]
-        }
-    },
-    "FANTRAY3_LED":
-    {
-        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
-        "dev_attr": { "index":"2"},
-        "i2c" : {
-            "attr_list":
-            [
-                {"attr_name":"STATUS_LED_COLOR_GREEN","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x3b"},
-                {"attr_name":"STATUS_LED_COLOR_AMBER","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x3b"}
-            ]
-        }
-    }
-}
+{
+    "PLATFORM":
+    {
+        "num_psus":2,
+        "num_fantrays":3,
+        "num_fans_pertray":1,
+        "num_ports":56,
+        "num_temps":4,
+        "pddf_dev_types":
+        {
+            "description":"DS1000 - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo <dev-address> <dev-type> > <path>/new_device' method",
+            "CPLD":
+            [
+               "i2c_cpld"
+            ],
+            "PSU":
+            [
+                "psu_eeprom",
+                "psu_pmbus"
+            ],
+            "FAN":
+            [
+                "fan_ctrl",
+                "fan_eeprom",
+                "fan_cpld"
+            ],
+            "PORT_MODULE":
+            [
+                "pddf_xcvr"
+            ]
+        },
+        "std_perm_kos":
+        [
+            "i2c-ismt",
+            "i2c-i801"
+        ],
+        "std_kos":
+        [
+            "i2c_dev",
+            "i2c_mux_pca954x force_deselect_on_exit=1",
+            "gpio_pca953x",
+            "mc24lc64t",
+            "optoe"
+        ],
+        "pddf_kos":
+        [
+            "pddf_client_module",
+            "pddf_mux_module",
+            "pddf_psu_driver_module",
+            "pddf_psu_module",
+            "pddf_gpio_module",
+            "pddf_xcvr_module",
+            "pddf_xcvr_driver_module",
+            "pddf_led_module",
+            "pddf_fan_driver_module",
+            "pddf_fan_module",
+            "pddf_led_module"
+        ],
+        "custom_kos":
+        [
+            "pddf_custom_psu",
+            "pddf_custom_wdt"
+        ]
+    },
+    "SYSTEM":
+    {
+        "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null},
+        "i2c":
+        {
+            "CONTROLLERS":
+            [
+                { "dev_name":"i2c-0", "dev":"SMBUS0" }
+            ]
+        }
+    },
+    "SMBUS0":
+    {
+        "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"},
+        "i2c":
+        {
+            "topo_info": {"dev_addr": "0x0"},
+            "DEVICES":
+            [
+                {"dev": "EEPROM1"},
+                {"dev": "MUX1"}
+            ]
+        }
+    },
+    "EEPROM1":
+    {
+        "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus": "0x0", "dev_addr": "0x52", "dev_type": "24lc64t"},
+            "dev_attr": {"access_mode": "BLOCK"},
+            "attr_list":
+            [
+                {"attr_name": "eeprom"}
+            ]
+        }
+    },
+    "MUX1":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX1", "device_parent":"SMBUS0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x0", "dev_addr":"0x70", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x2"},
+            "channel":
+            [
+              {"chn":"0", "dev":"CPLD1" },
+              {"chn":"0", "dev":"FAN-CTRL" },
+              {"chn":"2", "dev":"PSU1" },
+              {"chn":"2", "dev":"PSU2" },
+              {"chn":"3", "dev":"TEMP1"},
+              {"chn":"3", "dev":"TEMP2"},
+              {"chn":"4", "dev":"TEMP3"},
+              {"chn":"4", "dev":"TEMP4"},
+              {"chn":"7", "dev":"MUX2"}
+            ]
+        }
+    },
+    "MUX2":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX2", "device_parent":"MUX1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x9", "dev_addr":"0x71", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0xA"},
+            "channel":
+            [
+              {"chn":"0", "dev":"PORT49"},
+              {"chn":"1", "dev":"PORT50"},
+              {"chn":"2", "dev":"PORT51"},
+              {"chn":"3", "dev":"PORT52"},
+              {"chn":"4", "dev":"PORT53"},
+              {"chn":"5", "dev":"PORT54"},
+              {"chn":"6", "dev":"PORT55"},
+              {"chn":"7", "dev":"PORT56"}
+            ]
+        }
+    },
+    "CPLD1":
+    {
+       "dev_info": {"device_type": "CPLD", "device_name": "CPLD1", "device_parent": "MUX1"},
+       "i2c":
+        {
+            "topo_info": {"parent_bus": "0x2", "dev_addr": "0x32", "dev_type": "i2c_cpld"},
+            "dev_attr": {}
+        }
+    },
+    "PSU1":
+    {
+        "dev_info": { "device_type":"PSU", "device_name":"PSU 1", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"pmbus", "dev":"PSU1-PMBUS" }
+            ]
+        }
+    },
+    "PSU1-PMBUS":
+    {
+        "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU1-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU1"},
+        "i2c":
+        {
+            "topo_info":{ "parent_bus":"0x4", "dev_addr":"0x58", "dev_type":"psu_pmbus"},
+            "attr_list":
+            [
+                { "attr_name":"psu_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x10", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"psu_power_good", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"psu_model_name", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"13" },
+                { "attr_name":"psu_mfr_id", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"11" },
+                { "attr_name":"psu_serial_num", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"14" },
+                { "attr_name":"psu_v_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_i_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_v_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_i_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_p_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_fan_dir", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x80", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"1"},
+                { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_temp1_input", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
+             ]
+        }
+    },
+    "PSU2":
+    {
+        "dev_info": { "device_type":"PSU", "device_name":"PSU 2", "device_parent":"MUX1" },
+        "dev_attr": { "dev_idx":"2", "num_psu_fans":"1"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"pmbus", "dev":"PSU2-PMBUS"}
+            ]
+        }
+    },
+    "PSU2-PMBUS":
+    {
+        "dev_info": {"device_type":"PSU-PMBUS", "device_name":"PSU2-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU2"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x4", "dev_addr":"0x59", "dev_type":"psu_pmbus"},
+            "attr_list":
+            [
+                { "attr_name":"psu_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x20", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"psu_power_good", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x41", "attr_mask":"0x8", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"psu_model_name", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"13" },
+                { "attr_name":"psu_mfr_id", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"11" },
+                { "attr_name":"psu_serial_num", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"14" },
+                { "attr_name":"psu_v_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_i_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_v_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_i_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_p_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_fan_dir", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x80", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"1"},
+                { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_temp1_input", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
+            ]
+        }
+    },
+    "TEMP1":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP1", "device_parent":"MUX1"},
+        "dev_attr": { "display_name":"Front Left Temp"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x5", "dev_addr":"0x48", "dev_type":"lm75"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_max"},
+                { "attr_name": "temp1_max_hyst"},
+                { "attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "TEMP2":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP2", "device_parent":"MUX1"},
+        "dev_attr": { "display_name":"Front Right Temp"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x5", "dev_addr":"0x49", "dev_type":"lm75"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_max"},
+                { "attr_name": "temp1_max_hyst"},
+                { "attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "TEMP3":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP3", "device_parent":"MUX1"},
+        "dev_attr": { "display_name":"Rear Right Temp"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6", "dev_addr":"0x4a", "dev_type":"lm75"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_max"},
+                { "attr_name": "temp1_max_hyst"},
+                { "attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "TEMP4":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP4", "device_parent":"MUX1"},
+        "dev_attr": { "display_name":"ASIC External Temp"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6", "dev_addr":"0x49", "dev_type":"lm75"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_max"},
+                { "attr_name": "temp1_max_hyst"},
+                { "attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "PORT49":
+    {
+        "dev_info": { "device_type":"SFP+", "device_name":"PORT49", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"49"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT49-EEPROM" },
+                { "itf":"control", "dev":"PORT49-CTRL" }
+            ]
+        }
+    },
+    "PORT49-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT49-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT49"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xA", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT49-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT49-CTRL", "device_parent":"MUX2", "virt_parent":"PORT49"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xA", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
+              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
+              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
+              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
+              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}
+            ]
+        }
+    },
+    "PORT50":
+    {
+        "dev_info": { "device_type":"SFP+", "device_name":"PORT50", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"50"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT50-EEPROM" },
+                { "itf":"control", "dev":"PORT50-CTRL" }
+            ]
+        }
+    },
+    "PORT50-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT50-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT50"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xB", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT50-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT50-CTRL", "device_parent":"MUX2", "virt_parent":"PORT50"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xB", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
+              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
+              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
+              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
+              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}
+            ]
+        }
+    },
+    "PORT51":
+    {
+        "dev_info": { "device_type":"SFP+", "device_name":"PORT51", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"51"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT51-EEPROM" },
+                { "itf":"control", "dev":"PORT51-CTRL" }
+            ]
+        }
+    },
+    "PORT51-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT51-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT51"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xC", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT51-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT51-CTRL", "device_parent":"MUX2", "virt_parent":"PORT51"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xC", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
+              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
+              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
+              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
+              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}
+            ]
+        }
+    },
+    "PORT52":
+    {
+        "dev_info": { "device_type":"SFP+", "device_name":"PORT52", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"52"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT52-EEPROM" },
+                { "itf":"control", "dev":"PORT52-CTRL" }
+            ]
+        }
+    },
+    "PORT52-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT52-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT52"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xD", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT52-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT52-CTRL", "device_parent":"MUX2", "virt_parent":"PORT52"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xD", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
+              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
+              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
+              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
+              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}
+            ]
+        }
+    },
+    "PORT53":
+    {
+        "dev_info": { "device_type":"SFP+", "device_name":"PORT53", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"53"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT53-EEPROM" },
+                { "itf":"control", "dev":"PORT53-CTRL" }
+            ]
+        }
+    },
+    "PORT53-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT53-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT53"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xE", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT53-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT53-CTRL", "device_parent":"MUX2", "virt_parent":"PORT53"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xE", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
+              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
+              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
+              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
+              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+    "PORT54":
+    {
+        "dev_info": { "device_type":"SFP+", "device_name":"PORT54", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"54"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT54-EEPROM" },
+                { "itf":"control", "dev":"PORT54-CTRL" }
+            ]
+        }
+    },
+    "PORT54-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT54-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT54"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xF", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT54-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT54-CTRL", "device_parent":"MUX2", "virt_parent":"PORT54"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xF", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
+              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
+              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
+              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
+              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}
+            ]
+        }
+    },
+    "PORT55":
+    {
+        "dev_info": { "device_type":"SFP+", "device_name":"PORT55", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"55"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT55-EEPROM" },
+                { "itf":"control", "dev":"PORT55-CTRL" }
+            ]
+        }
+    },
+    "PORT55-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT55-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT55"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT55-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT55-CTRL", "device_parent":"MUX2", "virt_parent":"PORT55"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x10", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
+            ]
+        }
+    },
+    "PORT56":
+    {
+        "dev_info": { "device_type":"SFP+", "device_name":"PORT56", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"56"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT56-EEPROM" },
+                { "itf":"control", "dev":"PORT56-CTRL" }
+            ]
+        }
+    },
+    "PORT56-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT56-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT56"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT56-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT56-CTRL", "device_parent":"MUX2", "virt_parent":"PORT56"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x11", "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+              { "attr_name":"xcvr_txfault", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x47", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
+              { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
+              { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x4a", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
+              { "attr_name":"xcvr_present", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x49", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
+              { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x48", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}
+            ]
+        }
+    },
+    "FAN-CTRL":
+    {
+        "dev_info": { "device_type":"FAN", "device_name":"FAN-CTRL", "device_parent":"MUX1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2", "dev_addr":"0x66", "dev_type":"fan_cpld"},
+            "dev_attr":  { "num_fantrays":"3"},
+            "attr_list":
+            [
+                { "attr_name":"fan1_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x32", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan2_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x36", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan3_pwm", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x3a", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan1_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan2_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan3_direction", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x88", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan1_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x31", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},
+                { "attr_name":"fan2_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x35", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150" , "attr_is_divisor":0},
+                { "attr_name":"fan3_input", "attr_devaddr":"0x32", "attr_devtype":"cpld", "attr_devname":"CPLD1", "attr_offset":"0x39", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0}
+            ]
+        }
+    },
+    "SYS_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"SYS_LED"},
+        "dev_attr": { "index":"0"},
+        "i2c" : {
+            "attr_list":
+            [
+                {"attr_name":"amber","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x1","swpld_addr_offset":"0x43"},
+                {"attr_name":"green","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x2","swpld_addr_offset":"0x43"},
+                {"attr_name":"off","swpld_addr":"0x32","attr_devtype":"cpld","attr_devname":"CPLD1", "bits":"5:4","descr":"","value":"0x3","swpld_addr_offset":"0x43"}
+            ]
+        }
+    },
+    "FANTRAY1_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
+        "dev_attr": { "index":"0"},
+        "i2c" : {
+            "attr_list":
+            [
+                {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x33"},
+                {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x33"}
+            ]
+        }
+    },
+    "FANTRAY2_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
+        "dev_attr": { "index":"1"},
+        "i2c" : {
+            "attr_list":
+            [
+                {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x37"},
+                {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x37"}
+            ]
+        }
+    },
+    "FANTRAY3_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
+        "dev_attr": { "index":"2"},
+        "i2c" : {
+            "attr_list":
+            [
+                {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x1","swpld_addr":"0x32","swpld_addr_offset":"0x3b"},
+                {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD1","bits":"1:0","descr":"","value":"0x2","swpld_addr":"0x32","swpld_addr_offset":"0x3b"}
+            ]
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_belgite-r0/pddf_support b/device/celestica/x86_64-cel_ds1000-r0/pddf_support
similarity index 100%
rename from device/celestica/x86_64-cel_belgite-r0/pddf_support
rename to device/celestica/x86_64-cel_ds1000-r0/pddf_support
diff --git a/device/celestica/x86_64-cel_belgite-r0/platform.json b/device/celestica/x86_64-cel_ds1000-r0/platform.json
similarity index 62%
rename from device/celestica/x86_64-cel_belgite-r0/platform.json
rename to device/celestica/x86_64-cel_ds1000-r0/platform.json
index 0e40fe8a88fa..79ae7f0bad87 100644
--- a/device/celestica/x86_64-cel_belgite-r0/platform.json
+++ b/device/celestica/x86_64-cel_ds1000-r0/platform.json
@@ -1,94 +1,70 @@
 {
     "chassis": {
-        "name": "E1070",
+        "name": "DS1000",
         "status_led": {
             "controllable": true,
             "colors": ["green", "amber", "off"]
         },
-    "thermal_manager": false,
+        "thermal_manager": false,
         "components": [
-		{
-			"name": "SWCPLD"	
-		},
-		{
-			"name": "BIOS"
-		}
-        ],
-        "fans": [
             {
-                "name": "Fantray1_1",
-                "speed": {
-                    "controllable": true
-                },
-                "status_led": {
-                    "controllable": true,
-                    "colors": ["green", "amber","off"]
-                }
+                "name": "CPLD SW"
             },
             {
-                "name": "Fantray2_1",
-                "speed": {
-                    "controllable": true
-                },
-                "status_led": {
-                    "controllable": true,
-                    "colors": ["green", "amber","off"]
-                }
+                "name": "BIOS"
             },
             {
-                "name": "Fantray3_1",
-                "speed": {
-                    "controllable": true
-                },
-                "status_led": {
-                    "controllable": true,
-                    "colors": ["green", "amber","off"]
-                }
+                "name": "ONIE"
             },
             {
-                "name": "Fantray1_1",
+                "name": "SSD"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fan 1",
                 "speed": {
                     "controllable": true
                 },
                 "status_led": {
                     "controllable": true,
-                    "colors": ["green", "amber","off"]
+                    "colors": ["green", "amber", "off"]
                 }
             },
             {
-                "name": "Fantray2_1",
+                "name": "Fan 2",
                 "speed": {
                     "controllable": true
                 },
                 "status_led": {
                     "controllable": true,
-                    "colors": ["green", "amber","off"]
+                    "colors": ["green", "amber", "off"]
                 }
             },
             {
-                "name": "Fantray3_1",
+                "name": "Fan 3",
                 "speed": {
                     "controllable": true
                 },
                 "status_led": {
                     "controllable": true,
-                    "colors": ["green", "amber","off"]
+                    "colors": ["green", "amber", "off"]
                 }
             }
         ],
         "fan_drawers": [
             {
-                "name": "Fantray1",
+                "name": "Drawer 1",
                 "speed": {
                     "controllable": false
                 },
                 "status_led": {
                     "controllable": false
                 },
-		"max_consumed_power": false,
+                "max_consumed_power": false,
                 "fans": [
                     {
-                        "name": "Fantray1_1",
+                        "name": "Fan 1",
                         "speed": {
                             "controllable": false
                         },
@@ -99,17 +75,17 @@
                 ]
             },
             {
-                "name": "Fantray2",
+                "name": "Drawer 2",
                 "speed": {
                     "controllable": false
                 },
                 "status_led": {
                     "controllable": false
                 },
-		"max_consumed_power": false,
+                "max_consumed_power": false,
                 "fans": [
                     {
-                        "name": "Fantray2_1",
+                        "name": "Fan 2",
                         "speed": {
                             "controllable": false
                         },
@@ -120,17 +96,17 @@
                 ]
             },
             {
-                "name": "Fantray3",
+                "name": "Drawer 3",
                 "speed": {
                     "controllable": false
                 },
                 "status_led": {
                     "controllable": false
                 },
-		"max_consumed_power": false,
+                "max_consumed_power": false,
                 "fans": [
                     {
-                        "name": "Fantray3_1",
+                        "name": "Fan 3",
                         "speed": {
                             "controllable": false
                         },
@@ -143,10 +119,10 @@
         ],
         "psus": [
             {
-                "name": "PSU1",
+                "name": "PSU 1",
                 "fans": [
                     {
-                        "name": "PSU1_FAN1",
+                        "name": "PSU 1 Fan 1",
                         "speed": {
                             "controllable": false
                         },
@@ -155,7 +131,7 @@
                         }
                     }
                 ],
-		"current": true,
+                "current": true,
                 "power": true,
                 "max_power": false,
                 "voltage_high_threshold": false,
@@ -167,10 +143,10 @@
                 }
             },
             {
-                "name": "PSU2",
+                "name": "PSU 2",
                 "fans": [
                     {
-                        "name": "PSU2_FAN1",
+                        "name": "PSU 2 Fan 1",
                         "speed": {
                             "controllable": false
                         },
@@ -179,7 +155,7 @@
                         }
                     }
                 ],
-		"current": true,
+                "current": true,
                 "power": true,
                 "max_power": false,
                 "voltage_high_threshold": false,
@@ -193,175 +169,31 @@
         ],
         "thermals": [
             {
-                "name": "LM75_U10",
+                "name": "Front Left Temp",
                 "controllable": false,
                 "low-threshold": false,
                 "low-crit-threshold": true
             },
             {
-                "name": "LM75_U4",
+                "name": "Front Right Temp",
                 "controllable": false,
                 "low-threshold": false,
                 "low-crit-threshold": true
             },
             {
-                "name": "LM75_U7",
+                "name": "Rear Right Temp",
                 "controllable": false,
                 "low-threshold": false,
                 "low-crit-threshold": true
             },
             {
-                "name": "LM75_U60",
+                "name": "ASIC External Temp",
                 "controllable": false,
                 "low-threshold": false,
                 "low-crit-threshold": true
             }
         ],
         "sfps": [
-            {
-                "name": "PORT0"
-            },
-            {
-                "name": "PORT1"
-            },
-            {
-                "name": "PORT2"
-            },
-            {
-                "name": "PORT3"
-            },
-            {
-                "name": "PORT4"
-            },
-            {
-                "name": "PORT5"
-            },
-            {
-                "name": "PORT6"
-            },
-            {
-                "name": "PORT7"
-            },
-            {
-                "name": "PORT8"
-            },
-            {
-                "name": "PORT9"
-            },
-            {
-                "name": "PORT10"
-            },
-            {
-                "name": "PORT11"
-            },
-            {
-                "name": "PORT12"
-            },
-            {
-                "name": "PORT13"
-            },
-            {
-                "name": "PORT14"
-            },
-            {
-                "name": "PORT15"
-            },
-            {
-                "name": "PORT16"
-            },
-            {
-                "name": "PORT17"
-            },
-            {
-                "name": "PORT18"
-            },
-            {
-                "name": "PORT19"
-            },
-            {
-                "name": "PORT20"
-            },
-            {
-                "name": "PORT21"
-            },
-            {
-                "name": "PORT22"
-            },
-            {
-                "name": "PORT23"
-            },
-            {
-                "name": "PORT24"
-            },
-            {
-                "name": "PORT25"
-            },
-            {
-                "name": "PORT26"
-            },
-            {
-                "name": "PORT27"
-            },
-            {
-                "name": "PORT28"
-            },
-            {
-                "name": "PORT29"
-            },
-            {
-                "name": "PORT30"
-            },
-            {
-                "name": "PORT31"
-            },
-            {
-                "name": "PORT32"
-            },
-            {
-                "name": "PORT33"
-            },
-            {
-                "name": "PORT34"
-            },
-            {
-                "name": "PORT35"
-            },
-            {
-                "name": "PORT36"
-            },
-            {
-                "name": "PORT37"
-            },
-            {
-                "name": "PORT38"
-            },
-            {
-                "name": "PORT39"
-            },
-            {
-                "name": "PORT40"
-            },
-            {
-                "name": "PORT41"
-            },
-            {
-                "name": "PORT42"
-            },
-            {
-                "name": "PORT43"
-            },
-            {
-                "name": "PORT44"
-            },
-            {
-                "name": "PORT45"
-            },
-            {
-                "name": "PORT46"
-            },
-            {
-                "name": "PORT47"
-            },
             {
                 "name": "PORT48"
             },
@@ -393,392 +225,392 @@
             "index": "1",
             "lanes": "26",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/1"]
+                "1x1000[100,10]": ["Eth1/1"]
             }
         },
         "Ethernet1": {
             "index": "2",
             "lanes": "25",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/2"]
+                "1x1000[100,10]": ["Eth2/1"]
             }
         },
         "Ethernet2": {
             "index": "3",
             "lanes": "28",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/3"]
+                "1x1000[100,10]": ["Eth3/1"]
             }
         },
         "Ethernet3": {
             "index": "4",
             "lanes": "27",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/4"]
+                "1x1000[100,10]": ["Eth4/1"]
             }
         },
         "Ethernet4": {
             "index": "5",
             "lanes": "30",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/5"]
+                "1x1000[100,10]": ["Eth5/1"]
             }
         },
         "Ethernet5": {
             "index": "6",
             "lanes": "29",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/6"]
+                "1x1000[100,10]": ["Eth6/1"]
             }
         },
         "Ethernet6": {
             "index": "7",
             "lanes": "32",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/7"]
+                "1x1000[100,10]": ["Eth7/1"]
             }
         },
         "Ethernet7": {
             "index": "8",
             "lanes": "31",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/8"]
+                "1x1000[100,10]": ["Eth8/1"]
             }
         },
         "Ethernet8": {
             "index": "9",
             "lanes": "34",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/9"]
+                "1x1000[100,10]": ["Eth9/1"]
             }
         },
         "Ethernet9": {
             "index": "10",
             "lanes": "33",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/10"]
+                "1x1000[100,10]": ["Eth10/1"]
             }
         },
         "Ethernet10": {
             "index": "11",
             "lanes": "36",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/11"]
+                "1x1000[100,10]": ["Eth11/1"]
             }
         },
         "Ethernet11": {
             "index": "12",
             "lanes": "35",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/12"]
+                "1x1000[100,10]": ["Eth12/1"]
             }
         },
         "Ethernet12": {
             "index": "13",
             "lanes": "38",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/13"]
+                "1x1000[100,10]": ["Eth13/1"]
             }
         },
         "Ethernet13": {
             "index": "14",
             "lanes": "37",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/14"]
+                "1x1000[100,10]": ["Eth14/1"]
             }
         },
         "Ethernet14": {
             "index": "15",
             "lanes": "40",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/15"]
+                "1x1000[100,10]": ["Eth15/1"]
             }
         },
         "Ethernet15": {
             "index": "16",
             "lanes": "39",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/16"]
+                "1x1000[100,10]": ["Eth16/1"]
             }
         },
         "Ethernet16": {
             "index": "17",
             "lanes": "42",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/17"]
+                "1x1000[100,10]": ["Eth17/1"]
             }
         },
         "Ethernet17": {
             "index": "18",
             "lanes": "41",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/18"]
+                "1x1000[100,10]": ["Eth18/1"]
             }
         },
         "Ethernet18": {
             "index": "19",
             "lanes": "44",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/19"]
+                "1x1000[100,10]": ["Eth19/1"]
             }
         },
         "Ethernet19": {
             "index": "20",
             "lanes": "43",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/20"]
+                "1x1000[100,10]": ["Eth20/1"]
             }
         },
         "Ethernet20": {
             "index": "21",
             "lanes": "50",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/21"]
+                "1x1000[100,10]": ["Eth21/1"]
             }
         },
         "Ethernet21": {
             "index": "22",
             "lanes": "49",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/22"]
+                "1x1000[100,10]": ["Eth22/1"]
             }
         },
         "Ethernet22": {
             "index": "23",
             "lanes": "52",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/23"]
+                "1x1000[100,10]": ["Eth23/1"]
             }
         },
         "Ethernet23": {
             "index": "24",
             "lanes": "51",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/24"]
+                "1x1000[100,10]": ["Eth24/1"]
             }
         },
         "Ethernet24": {
             "index": "25",
             "lanes": "2",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/25"]
+                "1x1000[100,10]": ["Eth25/1"]
             }
         },
         "Ethernet25": {
             "index": "26",
             "lanes": "1",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/26"]
+                "1x1000[100,10]": ["Eth26/1"]
             }
         },
         "Ethernet26": {
             "index": "27",
             "lanes": "4",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/27"]
+                "1x1000[100,10]": ["Eth27/1"]
             }
         },
         "Ethernet27": {
             "index": "28",
             "lanes": "3",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/28"]
+                "1x1000[100,10]": ["Eth28/1"]
             }
         },
         "Ethernet28": {
             "index": "29",
             "lanes": "6",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/29"]
+                "1x1000[100,10]": ["Eth29/1"]
             }
         },
         "Ethernet29": {
             "index": "30",
             "lanes": "5",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/30"]
+                "1x1000[100,10]": ["Eth30/1"]
             }
         },
         "Ethernet30": {
             "index": "31",
             "lanes": "8",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/31"]
+                "1x1000[100,10]": ["Eth31/1"]
             }
         },
         "Ethernet31": {
             "index": "32",
             "lanes": "7",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/32"]
+                "1x1000[100,10]": ["Eth32/1"]
             }
         },
         "Ethernet32": {
             "index": "33",
             "lanes": "10",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/33"]
+                "1x1000[100,10]": ["Eth33/1"]
             }
         },
         "Ethernet33": {
             "index": "34",
             "lanes": "9",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/34"]
+                "1x1000[100,10]": ["Eth34/1"]
             }
         },
         "Ethernet34": {
             "index": "35",
             "lanes": "12",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/35"]
+                "1x1000[100,10]": ["Eth35/1"]
             }
         },
         "Ethernet35": {
             "index": "36",
             "lanes": "11",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/36"]
+                "1x1000[100,10]": ["Eth36/1"]
             }
         },
         "Ethernet36": {
             "index": "37",
             "lanes": "14",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/37"]
+                "1x1000[100,10]": ["Eth37/1"]
             }
         },
         "Ethernet37": {
             "index": "38",
             "lanes": "13",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/38"]
+                "1x1000[100,10]": ["Eth38/1"]
             }
         },
         "Ethernet38": {
             "index": "39",
             "lanes": "16",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/39"]
+                "1x1000[100,10]": ["Eth39/1"]
             }
         },
         "Ethernet39": {
             "index": "40",
             "lanes": "15",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/40"]
+                "1x1000[100,10]": ["Eth40/1"]
             }
         },
         "Ethernet40": {
             "index": "41",
             "lanes": "18",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/41"]
+                "1x1000[100,10]": ["Eth41/1"]
             }
         },
         "Ethernet41": {
             "index": "42",
             "lanes": "17",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/42"]
+                "1x1000[100,10]": ["Eth42/1"]
             }
         },
         "Ethernet42": {
             "index": "43",
             "lanes": "20",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/43"]
+                "1x1000[100,10]": ["Eth43/1"]
             }
         },
         "Ethernet43": {
             "index": "44",
             "lanes": "19",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/44"]
+                "1x1000[100,10]": ["Eth44/1"]
             }
         },
         "Ethernet44": {
             "index": "45",
             "lanes": "22",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/45"]
+                "1x1000[100,10]": ["Eth45/1"]
             }
         },
         "Ethernet45": {
             "index": "46",
             "lanes": "21",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/46"]
+                "1x1000[100,10]": ["Eth46/1"]
             }
         },
         "Ethernet46": {
             "index": "47",
             "lanes": "24",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/47"]
+                "1x1000[100,10]": ["Eth47/1"]
             }
         },
         "Ethernet47": {
             "index": "48",
             "lanes": "23",
             "breakout_modes": {
-                "1x1000[100,10]": ["Ethernet1/0/48"]
+                "1x1000[100,10]": ["Eth48/1"]
             }
         },
         "Ethernet48": {
             "index": "49",
             "lanes": "60",
             "breakout_modes": {
-                "1x10G[1G]": ["Ethernet1/0/49"]
+                "1x10G[1G]": ["Eth49/1"]
             }
         },
         "Ethernet49": {
             "index": "50",
             "lanes": "58",
             "breakout_modes": {
-                "1x10G[1G]": ["Ethernet1/0/50"]
+                "1x10G[1G]": ["Eth50/1"]
             }
         },
         "Ethernet50": {
             "index": "51",
             "lanes": "59",
             "breakout_modes": {
-                "1x10G[1G]": ["Ethernet1/0/51"]
+                "1x10G[1G]": ["Eth51/1"]
             }
         },
         "Ethernet51": {
             "index": "52",
             "lanes": "57",
             "breakout_modes": {
-                "1x10G[1G]": ["Ethernet1/0/52"]
+                "1x10G[1G]": ["Eth52/1"]
             }
         },
         "Ethernet52": {
             "index": "53",
             "lanes": "62",
             "breakout_modes": {
-                "1x10G[1G]": ["Ethernet1/0/53"]
+                "1x10G[1G]": ["Eth53/1"]
             }
         },
         "Ethernet53": {
             "index": "54",
             "lanes": "64",
             "breakout_modes": {
-                "1x10G[1G]": ["Ethernet1/0/54"]
+                "1x10G[1G]": ["Eth54/1"]
             }
         },
         "Ethernet54": {
             "index": "55",
             "lanes": "61",
             "breakout_modes": {
-                "1x10G[1G]": ["Ethernet1/0/55"]
+                "1x10G[1G]": ["Eth55/1"]
             }
         },
         "Ethernet55": {
             "index": "56",
             "lanes": "63",
             "breakout_modes": {
-                "1x10G[1G]": ["Ethernet1/0/56"]
+                "1x10G[1G]": ["Eth56/1"]
             }
         }
     }
diff --git a/device/celestica/x86_64-cel_belgite-r0/platform_asic b/device/celestica/x86_64-cel_ds1000-r0/platform_asic
similarity index 100%
rename from device/celestica/x86_64-cel_belgite-r0/platform_asic
rename to device/celestica/x86_64-cel_ds1000-r0/platform_asic
diff --git a/device/celestica/x86_64-cel_ds1000-r0/platform_components.json b/device/celestica/x86_64-cel_ds1000-r0/platform_components.json
new file mode 100644
index 000000000000..deeabc3dee41
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds1000-r0/platform_components.json
@@ -0,0 +1,12 @@
+{
+    "chassis": {
+        "DS1000": {
+            "component": {
+                "BIOS": {},
+                "ONIE": {},
+                "CPLD SW": {},
+                "SSD": {}
+            }
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_ds1000-r0/platform_reboot b/device/celestica/x86_64-cel_ds1000-r0/platform_reboot
new file mode 100755
index 000000000000..233af9d08514
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds1000-r0/platform_reboot
@@ -0,0 +1,3 @@
+#!/bin/bash
+
+/usr/local/bin/ds1000_platform_shutdown.sh system
diff --git a/device/celestica/x86_64-cel_belgite-r0/plugins/eeprom.py b/device/celestica/x86_64-cel_ds1000-r0/plugins/eeprom.py
similarity index 100%
rename from device/celestica/x86_64-cel_belgite-r0/plugins/eeprom.py
rename to device/celestica/x86_64-cel_ds1000-r0/plugins/eeprom.py
diff --git a/device/celestica/x86_64-cel_belgite-r0/plugins/psuutil.py b/device/celestica/x86_64-cel_ds1000-r0/plugins/psuutil.py
similarity index 100%
rename from device/celestica/x86_64-cel_belgite-r0/plugins/psuutil.py
rename to device/celestica/x86_64-cel_ds1000-r0/plugins/psuutil.py
diff --git a/device/celestica/x86_64-cel_belgite-r0/plugins/sfputil.py b/device/celestica/x86_64-cel_ds1000-r0/plugins/sfputil.py
similarity index 100%
rename from device/celestica/x86_64-cel_belgite-r0/plugins/sfputil.py
rename to device/celestica/x86_64-cel_ds1000-r0/plugins/sfputil.py
diff --git a/device/celestica/x86_64-cel_belgite-r0/pmon_daemon_control.json b/device/celestica/x86_64-cel_ds1000-r0/pmon_daemon_control.json
similarity index 100%
rename from device/celestica/x86_64-cel_belgite-r0/pmon_daemon_control.json
rename to device/celestica/x86_64-cel_ds1000-r0/pmon_daemon_control.json
diff --git a/device/celestica/x86_64-cel_ds1000-r0/sensors.conf b/device/celestica/x86_64-cel_ds1000-r0/sensors.conf
new file mode 100644
index 000000000000..aeb82af7eaf5
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds1000-r0/sensors.conf
@@ -0,0 +1,45 @@
+# libsensors configuration file for Celestica DS1000
+
+bus "i2c-6" "i2c-0-mux (chan_id 4)"
+bus "i2c-4" "i2c-0-mux (chan_id 2)"
+bus "i2c-2" "i2c-0-mux (chan_id 0)"
+bus "i2c-5" "i2c-0-mux (chan_id 3)"
+
+chip "fan_cpld-i2c-2-66"
+    label fan1 "Fantray1_1 speed"
+    label fan2 "Fantray2_1 speed"
+    label fan3 "Fantray3_1 speed"
+
+chip "psu_pmbus-i2c-4-58"
+    label fan1 "PSU1 fan speed"
+    label in3 "PSU1 output voltage"
+    label temp1 "PSU1 temperature"
+    label power2 "PSU1 output power"
+    label curr2 "PSU1 output current"
+
+chip "psu_pmbus-i2c-4-59"
+    label fan1 "PSU2 fan speed"
+    label in3 "PSU2 output voltage"
+    label temp1 "PSU2 temperature"
+    label power2 "PSU2 output power"
+    label curr2 "PSU2 output current"
+
+chip "lm75-i2c-5-48"
+    label temp1 "Front Left Temp"
+    set temp1_max 50
+    set temp1_max_hyst 45
+
+chip "lm75-i2c-5-49"
+    label temp1 "Front Right Temp"
+    set temp1_max 50
+    set temp1_max_hyst 45
+
+chip "lm75-i2c-6-4a"
+    label temp1 "Rear Right Temp"
+    set temp1_max 50
+    set temp1_max_hyst 45
+
+chip "lm75-i2c-6-49"
+    set temp1_max 110
+    set temp1_max_hyst 105
+    label temp1 "ASIC External Temp"
diff --git a/device/celestica/x86_64-cel_belgite-r0/system_health_monitoring_config.json b/device/celestica/x86_64-cel_ds1000-r0/system_health_monitoring_config.json
similarity index 86%
rename from device/celestica/x86_64-cel_belgite-r0/system_health_monitoring_config.json
rename to device/celestica/x86_64-cel_ds1000-r0/system_health_monitoring_config.json
index 28b3e30a6699..6f7d70895afd 100644
--- a/device/celestica/x86_64-cel_belgite-r0/system_health_monitoring_config.json
+++ b/device/celestica/x86_64-cel_ds1000-r0/system_health_monitoring_config.json
@@ -3,8 +3,8 @@
     "devices_to_ignore": [
         "asic",
         "psu.temperature",
-        "PSU1_FAN1",
-        "PSU2_FAN1"
+        "PSU 1 Fan 1",
+        "PSU 2 Fan 1"
     ],
     "user_defined_checkers": [],
     "polling_interval": 60,
diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers.json.j2 b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers.json.j2
new file mode 100644
index 000000000000..b67cf577ab75
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers.json.j2
@@ -0,0 +1,3 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
+
diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_def.j2 b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_def.j2
new file mode 100644
index 000000000000..740cfdf79e96
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_def.j2
@@ -0,0 +1,46 @@
+{%- set default_cable = '300m' %}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {% for port_idx in range(0,32) %}
+        {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
+    {% endfor %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "xoff": "4625920",
+            "size": "12766208",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_lossless_pool": {
+            "size": "12766208",
+            "type": "egress",
+            "mode": "static"
+        },
+        "egress_lossy_pool": {
+            "size": "7326924",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"[BUFFER_POOL|ingress_lossless_pool]",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"0",
+            "static_th":"12766208"
+        },
+        "egress_lossy_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"1518",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_t0.j2 b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_t0.j2
new file mode 100644
index 000000000000..44fcf21887a6
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_t0.j2
@@ -0,0 +1,45 @@
+{%- set default_cable = '300m' %}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {% for port_idx in range(0,32) %}
+        {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
+    {% endfor %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "12766208",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_lossless_pool": {
+            "size": "12766208",
+            "type": "egress",
+            "mode": "static"
+        },
+        "egress_lossy_pool": {
+            "size": "7326924",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"[BUFFER_POOL|ingress_lossless_pool]",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"0",
+            "static_th":"12766208"
+        },
+        "egress_lossy_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"1518",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_t1.j2 b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_t1.j2
new file mode 100644
index 000000000000..5fe9cabcfd34
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/buffers_defaults_t1.j2
@@ -0,0 +1,46 @@
+{%- set default_cable = '300m' %}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {% for port_idx in range(0,32) %}
+        {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
+    {% endfor %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "xoff": "196608",
+            "size": "12766208",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_lossless_pool": {
+            "size": "33004032",
+            "type": "egress",
+            "mode": "static"
+        },
+        "egress_lossy_pool": {
+            "size": "12766208",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"[BUFFER_POOL|ingress_lossless_pool]",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"0",
+            "static_th":"33004032"
+        },
+        "egress_lossy_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"1518",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/hwsku.json b/device/celestica/x86_64-cel_ds2000-r0/DS2000/hwsku.json
new file mode 100644
index 000000000000..059666102d99
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/hwsku.json
@@ -0,0 +1,284 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet1": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet2": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet3": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet4": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet5": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet6": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet7": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet9": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet10": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet11": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet12": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet13": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet14": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet15": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet17": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet18": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet19": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet20": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet21": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet22": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet23": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet25": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet26": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet27": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet28": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet29": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet30": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet31": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet33": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet34": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet35": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet36": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet37": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet38": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet39": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet41": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet42": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet43": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet44": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet45": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet46": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet47": {
+            "default_brkout_mode": "1x25G[10G]",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet52": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet60": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet68": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet76": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/l2/config b/device/celestica/x86_64-cel_ds2000-r0/DS2000/l2/config
new file mode 100644
index 000000000000..1cc35f24ade0
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/l2/config
@@ -0,0 +1,7 @@
+l2_mem_entries=229376
+l3_mem_entries=16384
+l3_alpm_enable=0
+fpem_mem_entries=32768
+sai_tunnel_support=1
+use_all_splithorizon_groups=1
+flow_init_mode=1
diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/l3/config b/device/celestica/x86_64-cel_ds2000-r0/DS2000/l3/config
new file mode 100644
index 000000000000..fff0cf54b08a
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/l3/config
@@ -0,0 +1,5 @@
+l2_mem_entries=40960
+l3_mem_entries=40960
+l3_alpm_enable=2
+use_all_splithorizon_groups=1
+sai_tunnel_support=1
diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/port_config.ini b/device/celestica/x86_64-cel_ds2000-r0/DS2000/port_config.ini
new file mode 100644
index 000000000000..9b9c028ebaac
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/port_config.ini
@@ -0,0 +1,57 @@
+# name      lanes            alias   index  speed   mtu   admin_status  fec
+Ethernet0   29               Eth1/1   1     25000   9216  up            rs
+Ethernet1   30               Eth2/1   2     25000   9216  up            rs
+Ethernet2   31               Eth3/1   3     25000   9216  up            rs
+Ethernet3   32               Eth4/1   4     25000   9216  up            rs
+Ethernet4   33               Eth5/1   5     25000   9216  up            rs
+Ethernet5   34               Eth6/1   6     25000   9216  up            rs
+Ethernet6   35               Eth7/1   7     25000   9216  up            rs
+Ethernet7   36               Eth8/1   8     25000   9216  up            rs
+Ethernet8   37               Eth9/1   9     25000   9216  up            rs
+Ethernet9   38               Eth10/1  10    25000   9216  up            rs
+Ethernet10  39               Eth11/1  11    25000   9216  up            rs
+Ethernet11  40               Eth12/1  12    25000   9216  up            rs
+Ethernet12  49               Eth13/1  13    25000   9216  up            rs
+Ethernet13  50               Eth14/1  14    25000   9216  up            rs
+Ethernet14  51               Eth15/1  15    25000   9216  up            rs
+Ethernet15  52               Eth16/1  16    25000   9216  up            rs
+Ethernet16  53               Eth17/1  17    25000   9216  up            rs
+Ethernet17  54               Eth18/1  18    25000   9216  up            rs
+Ethernet18  55               Eth19/1  19    25000   9216  up            rs
+Ethernet19  56               Eth20/1  20    25000   9216  up            rs
+Ethernet20  57               Eth21/1  21    25000   9216  up            rs
+Ethernet21  58               Eth22/1  22    25000   9216  up            rs
+Ethernet22  59               Eth23/1  23    25000   9216  up            rs
+Ethernet23  60               Eth24/1  24    25000   9216  up            rs
+Ethernet24  9                Eth25/1  25    25000   9216  up            rs
+Ethernet25  10               Eth26/1  26    25000   9216  up            rs
+Ethernet26  11               Eth27/1  27    25000   9216  up            rs
+Ethernet27  12               Eth28/1  28    25000   9216  up            rs
+Ethernet28  13               Eth29/1  29    25000   9216  up            rs
+Ethernet29  14               Eth30/1  30    25000   9216  up            rs
+Ethernet30  15               Eth31/1  31    25000   9216  up            rs
+Ethernet31  16               Eth32/1  32    25000   9216  up            rs
+Ethernet32  17               Eth33/1  33    25000   9216  up            rs
+Ethernet33  18               Eth34/1  34    25000   9216  up            rs
+Ethernet34  19               Eth35/1  35    25000   9216  up            rs
+Ethernet35  20               Eth36/1  36    25000   9216  up            rs
+Ethernet36  61               Eth37/1  37    25000   9216  up            rs
+Ethernet37  62               Eth38/1  38    25000   9216  up            rs
+Ethernet38  63               Eth39/1  39    25000   9216  up            rs
+Ethernet39  64               Eth40/1  40    25000   9216  up            rs
+Ethernet40  65               Eth41/1  41    25000   9216  up            rs
+Ethernet41  66               Eth42/1  42    25000   9216  up            rs
+Ethernet42  67               Eth43/1  43    25000   9216  up            rs
+Ethernet43  68               Eth44/1  44    25000   9216  up            rs
+Ethernet44  69               Eth45/1  45    25000   9216  up            rs
+Ethernet45  70               Eth46/1  46    25000   9216  up            rs
+Ethernet46  71               Eth47/1  47    25000   9216  up            rs
+Ethernet47  72               Eth48/1  48    25000   9216  up            rs
+Ethernet48  41,42,43,44      Eth49/1  49    100000  9216  up            rs
+Ethernet52  45,46,47,48      Eth50/1  50    100000  9216  up            rs
+Ethernet56  73,74,75,76      Eth51/1  51    100000  9216  up            rs
+Ethernet60  77,78,79,80      Eth52/1  52    100000  9216  up            rs
+Ethernet64  1,2,3,4          Eth53/1  53    100000  9216  up            rs
+Ethernet68  21,22,23,24      Eth54/1  54    100000  9216  up            rs
+Ethernet72  5,6,7,8          Eth55/1  55    100000  9216  up            rs
+Ethernet76  25,26,27,28      Eth56/1  56    100000  9216  up            rs
diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/qos.json.j2 b/device/celestica/x86_64-cel_ds2000-r0/DS2000/qos.json.j2
new file mode 100644
index 000000000000..ee67c6e26221
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config_t1.j2' %}
diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/qos_config_t1.j2 b/device/celestica/x86_64-cel_ds2000-r0/DS2000/qos_config_t1.j2
new file mode 100644
index 000000000000..5fe5324a85c1
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/qos_config_t1.j2
@@ -0,0 +1,175 @@
+{%- set PORT_ALL = [] %}
+{%- for port in PORT %}
+    {%- if PORT_ALL.append(port) %}{% endif %}
+{%- endfor %}
+{%- if PORT_ALL | sort_by_port_index %}{% endif %}
+
+{%- set port_names_list_all = [] %}
+{%- for port in PORT_ALL %}
+    {%- if port_names_list_all.append(port) %}{% endif %}
+{%- endfor %}
+{%- set port_names_all = port_names_list_all | join(',') -%}
+
+
+{%- set PORT_ACTIVE = [] %}
+{%- if DEVICE_NEIGHBOR is not defined %}
+    {%- set PORT_ACTIVE = PORT_ALL %}
+{%- else %}
+    {%- for port in DEVICE_NEIGHBOR.keys() %}
+        {%- if PORT_ACTIVE.append(port) %}{%- endif %}
+    {%- endfor %}
+{%- endif %}
+{%- if PORT_ACTIVE | sort_by_port_index %}{% endif %}
+
+{%- set port_names_list_active = [] %}
+{%- for port in PORT_ACTIVE %}
+    {%- if port_names_list_active.append(port) %}{%- endif %}
+{%- endfor %}
+{%- set port_names_active = port_names_list_active | join(',') -%}
+
+
+{%- set pfc_to_pg_map_supported_asics = ['mellanox', 'barefoot', 'marvell'] -%}
+
+
+{
+{% if generate_tc_to_pg_map is defined %}
+    {{- generate_tc_to_pg_map() }}
+{% else %}
+    "TC_TO_PRIORITY_GROUP_MAP": {
+        "AZURE": {
+            "0": "0",
+            "1": "0",
+            "2": "0",
+            "3": "3",
+            "4": "4",
+            "5": "0",
+            "6": "0",
+            "7": "7"
+        }
+    },
+{% endif %}
+    "MAP_PFC_PRIORITY_TO_QUEUE": {
+        "AZURE": {
+            "0": "0",
+            "1": "1",
+            "2": "2",
+            "3": "3",
+            "4": "4",
+            "5": "5",
+            "6": "6",
+            "7": "7"
+        }
+    },
+    "TC_TO_QUEUE_MAP": {
+        "AZURE": {
+            "0": "0",
+            "1": "1",
+            "2": "2",
+            "3": "3",
+            "4": "4",
+            "5": "5",
+            "6": "6",
+            "7": "7"
+        }
+    },
+    "DSCP_TO_TC_MAP": {
+        "AZURE": {
+            "0" : "1",
+            "1" : "1",
+            "2" : "1",
+            "3" : "3",
+            "4" : "4",
+            "5" : "2",
+            "6" : "1",
+            "7" : "1",
+            "8" : "0",
+            "9" : "1",
+            "10": "1",
+            "11": "1",
+            "12": "1",
+            "13": "1",
+            "14": "1",
+            "15": "1",
+            "16": "1",
+            "17": "1",
+            "18": "1",
+            "19": "1",
+            "20": "1",
+            "21": "1",
+            "22": "1",
+            "23": "1",
+            "24": "1",
+            "25": "1",
+            "26": "1",
+            "27": "1",
+            "28": "1",
+            "29": "1",
+            "30": "1",
+            "31": "1",
+            "32": "1",
+            "33": "1",
+            "34": "1",
+            "35": "1",
+            "36": "1",
+            "37": "1",
+            "38": "1",
+            "39": "1",
+            "40": "1",
+            "41": "1",
+            "42": "1",
+            "43": "1",
+            "44": "1",
+            "45": "1",
+            "46": "5",
+            "47": "1",
+            "48": "6",
+            "49": "1",
+            "50": "1",
+            "51": "1",
+            "52": "1",
+            "53": "1",
+            "54": "1",
+            "55": "1",
+            "56": "1",
+            "57": "1",
+            "58": "1",
+            "59": "1",
+            "60": "1",
+            "61": "1",
+            "62": "1",
+            "63": "1"
+        }
+    },
+    "SCHEDULER": {
+        "scheduler.0": {
+            "type"  : "DWRR",
+            "weight": "14"
+        },
+        "scheduler.1": {
+            "type"  : "DWRR",
+            "weight": "15"
+        }
+    },
+{% if asic_type in pfc_to_pg_map_supported_asics  %}
+    "PFC_PRIORITY_TO_PRIORITY_GROUP_MAP": {
+        "AZURE": {
+            "3": "3",
+            "4": "4"
+        }
+    },
+{% endif %}
+    "PORT_QOS_MAP": {
+{% for port in PORT_ACTIVE %}
+        "{{ port }}": {
+            "dscp_to_tc_map"  : "[DSCP_TO_TC_MAP|AZURE]",
+            "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]",
+            "tc_to_pg_map"    : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]",
+            "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]",
+{% if asic_type in pfc_to_pg_map_supported_asics %}
+            "pfc_to_pg_map"   : "[PFC_PRIORITY_TO_PRIORITY_GROUP_MAP|AZURE]",
+{% endif %}
+            "pfc_enable"      : "3,4"
+        }{% if not loop.last %},{% endif %}
+{% endfor %}
+    }
+}
diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/sai.profile b/device/celestica/x86_64-cel_ds2000-r0/DS2000/sai.profile
new file mode 100644
index 000000000000..6ca4984b91d3
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/sai.profile
@@ -0,0 +1,2 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h-2a.config.bcm
+SAI_LED_PORT_LOCATOR_FW_FILE=/usr/share/sonic/platform/port_locator.bin
diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/sai_postinit_cmd.soc b/device/celestica/x86_64-cel_ds2000-r0/DS2000/sai_postinit_cmd.soc
new file mode 100644
index 000000000000..731625308a5e
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/sai_postinit_cmd.soc
@@ -0,0 +1,2 @@
+modreg ING_MISC_CONFIG INPUT_PRI_TAGGED=1
+modreg ING_MISC_CONFIG  INPUT_PRI_UNTAGGED=1
diff --git a/device/celestica/x86_64-cel_ds2000-r0/DS2000/td3-as13-48f8h-2a.config.bcm b/device/celestica/x86_64-cel_ds2000-r0/DS2000/td3-as13-48f8h-2a.config.bcm
new file mode 100644
index 000000000000..5abc527f9419
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/DS2000/td3-as13-48f8h-2a.config.bcm
@@ -0,0 +1,461 @@
+#polarity/lanemap is using TH2 style.
+core_clock_frequency=1525
+dpp_clock_ratio=2:3
+
+ptp_ts_pll_fref=50000000
+ptp_bs_fref_0=50000000
+ptp_bs_fref_1=50000000
+
+
+oversubscribe_mode=1
+
+pbmp_xport_xe=0x1FFFFFFFFFFFFFFFE
+
+parity_enable=0
+mem_cache_enable=0
+
+l2_mem_entries=32768
+l3_mem_entries=16384
+fpem_mem_entries=16384
+l2xmsg_mode=1
+
+# Tunnel
+sai_tunnel_support=1
+bcm_tunnel_term_compatible_mode=1
+use_all_splithorizon_groups=1
+
+# RIOT Enable
+riot_enable=1
+riot_overlay_l3_intf_mem_size=8192
+riot_overlay_l3_egress_mem_size=32768
+l3_ecmp_levels=2
+riot_overlay_ecmp_resilient_hash_size=16384
+flow_init_mode=1
+
+# Platform specfic
+bcm_stat_interval=2000000
+cdma_timeout_usec=3000000
+help_cli_enable=1
+ifp_inports_support_enable=1
+ipv6_lpm_128b_enable=0x1
+l3_alpm_enable=2
+l3_max_ecmp_mode=1
+max_vp_lags=0
+memlist_enable=1
+reglist_enable=1
+miim_intr_enable=0
+module_64ports=1
+port_flex_enable=1 
+schan_intr_enable=0 
+stable_size=0x5500000 ;Specify the stable cache size in bytes used for Warm boot operations
+tdma_timeout_usec=3000000 
+skip_L2_USER_ENTRY=0
+l3_alpm_ipv6_128b_bkt_rsvd=1
+
+
+
+#FC0
+portmap_1=1:100
+
+#FC1
+portmap_2=5:100
+
+#FC2
+portmap_3=9:25
+portmap_4=10:25
+portmap_5=11:25
+portmap_6=12:25
+
+#FC3
+portmap_7=13:25
+portmap_8=14:25
+portmap_9=15:25
+portmap_10=16:25
+
+#FC4
+portmap_11=17:25
+portmap_12=18:25
+portmap_13=19:25
+portmap_14=20:25
+
+#FC5
+portmap_15=21:100
+
+#FC6
+portmap_16=25:100
+
+#FC7
+portmap_29=29:25
+portmap_30=30:25
+portmap_31=31:25
+portmap_20=32:25
+
+#FC8
+portmap_21=33:25
+portmap_22=34:25
+portmap_23=35:25
+portmap_24=36:25
+
+#FC9
+portmap_25=37:25
+portmap_26=38:25
+portmap_27=39:25
+portmap_28=40:25
+
+#FC10
+portmap_33=41:100
+
+#FC11
+portmap_61=45:100
+
+#FC12
+portmap_62=49:25
+portmap_63=50:25
+portmap_37=51:25
+portmap_38=52:25
+
+#FC13
+portmap_39=53:25
+portmap_40=54:25
+portmap_41=55:25
+portmap_42=56:25
+
+#FC14
+portmap_43=57:25
+portmap_44=58:25
+portmap_45=59:25
+portmap_46=60:25
+
+#FC15
+portmap_47=61:25
+portmap_48=62:25
+portmap_49=63:25
+portmap_50=64:25
+
+#FC16
+portmap_51=65:25
+portmap_52=66:25
+portmap_53=67:25
+portmap_54=68:25
+
+#FC17
+portmap_55=69:25
+portmap_56=70:25
+portmap_57=71:25
+portmap_58=72:25
+
+#FC18
+portmap_59=73:100
+
+#FC19
+portmap_60=77:100
+
+
+#portmap_64=81:10
+
+phy_chain_tx_lane_map_physical{1.0}=0x0123
+phy_chain_rx_lane_map_physical{1.0}=0x1302
+phy_chain_tx_lane_map_physical{5.0}=0x1032
+phy_chain_rx_lane_map_physical{5.0}=0x1302
+phy_chain_tx_lane_map_physical{9.0}=0x0123
+phy_chain_rx_lane_map_physical{9.0}=0x1032
+phy_chain_tx_lane_map_physical{13.0}=0x0123
+phy_chain_rx_lane_map_physical{13.0}=0x1032
+phy_chain_tx_lane_map_physical{17.0}=0x0123
+phy_chain_rx_lane_map_physical{17.0}=0x1032
+phy_chain_tx_lane_map_physical{21.0}=0x1302
+phy_chain_rx_lane_map_physical{21.0}=0x1032
+phy_chain_tx_lane_map_physical{25.0}=0x3120
+phy_chain_rx_lane_map_physical{25.0}=0x1032
+phy_chain_tx_lane_map_physical{29.0}=0x0123
+phy_chain_rx_lane_map_physical{29.0}=0x1032
+phy_chain_tx_lane_map_physical{33.0}=0x0123
+phy_chain_rx_lane_map_physical{33.0}=0x1032
+phy_chain_tx_lane_map_physical{37.0}=0x0123
+phy_chain_rx_lane_map_physical{37.0}=0x1032
+phy_chain_tx_lane_map_physical{41.0}=0x1302
+phy_chain_rx_lane_map_physical{41.0}=0x1023
+phy_chain_tx_lane_map_physical{45.0}=0x1032
+phy_chain_rx_lane_map_physical{45.0}=0x0213
+phy_chain_tx_lane_map_physical{49.0}=0x3210
+phy_chain_rx_lane_map_physical{49.0}=0x2301
+phy_chain_tx_lane_map_physical{53.0}=0x3210
+phy_chain_rx_lane_map_physical{53.0}=0x2301
+phy_chain_tx_lane_map_physical{57.0}=0x3210
+phy_chain_rx_lane_map_physical{57.0}=0x2301
+phy_chain_tx_lane_map_physical{61.0}=0x3210
+phy_chain_rx_lane_map_physical{61.0}=0x2301
+phy_chain_tx_lane_map_physical{65.0}=0x3210
+phy_chain_rx_lane_map_physical{65.0}=0x2301
+phy_chain_tx_lane_map_physical{69.0}=0x3210
+phy_chain_rx_lane_map_physical{69.0}=0x2301
+phy_chain_tx_lane_map_physical{73.0}=0x2301
+phy_chain_rx_lane_map_physical{73.0}=0x2031
+phy_chain_tx_lane_map_physical{77.0}=0x0132
+phy_chain_rx_lane_map_physical{77.0}=0x3012
+phy_chain_tx_lane_map_physical{81.0}=0x3210
+phy_chain_rx_lane_map_physical{81.0}=0x3201
+
+#FC0
+phy_chain_tx_polarity_flip_physical{1.0}=0x0
+phy_chain_rx_polarity_flip_physical{1.0}=0x0
+phy_chain_tx_polarity_flip_physical{2.0}=0x0
+phy_chain_rx_polarity_flip_physical{2.0}=0x1
+phy_chain_tx_polarity_flip_physical{3.0}=0x1
+phy_chain_rx_polarity_flip_physical{3.0}=0x1
+phy_chain_tx_polarity_flip_physical{4.0}=0x0
+phy_chain_rx_polarity_flip_physical{4.0}=0x1
+
+#FC1
+phy_chain_tx_polarity_flip_physical{5.0}=0x0
+phy_chain_rx_polarity_flip_physical{5.0}=0x1
+phy_chain_tx_polarity_flip_physical{6.0}=0x1
+phy_chain_rx_polarity_flip_physical{6.0}=0x0
+phy_chain_tx_polarity_flip_physical{7.0}=0x1
+phy_chain_rx_polarity_flip_physical{7.0}=0x0
+phy_chain_tx_polarity_flip_physical{8.0}=0x1
+phy_chain_rx_polarity_flip_physical{8.0}=0x0
+
+#FC2
+phy_chain_tx_polarity_flip_physical{9.0}=0x0
+phy_chain_rx_polarity_flip_physical{9.0}=0x1
+phy_chain_tx_polarity_flip_physical{10.0}=0x1
+phy_chain_rx_polarity_flip_physical{10.0}=0x0
+phy_chain_tx_polarity_flip_physical{11.0}=0x0
+phy_chain_rx_polarity_flip_physical{11.0}=0x1
+phy_chain_tx_polarity_flip_physical{12.0}=0x1
+phy_chain_rx_polarity_flip_physical{12.0}=0x0
+
+#FC3
+phy_chain_tx_polarity_flip_physical{13.0}=0x0
+phy_chain_rx_polarity_flip_physical{13.0}=0x1
+phy_chain_tx_polarity_flip_physical{14.0}=0x1
+phy_chain_rx_polarity_flip_physical{14.0}=0x0
+phy_chain_tx_polarity_flip_physical{15.0}=0x0
+phy_chain_rx_polarity_flip_physical{15.0}=0x1
+phy_chain_tx_polarity_flip_physical{16.0}=0x1
+phy_chain_rx_polarity_flip_physical{16.0}=0x0
+
+#FC4
+phy_chain_tx_polarity_flip_physical{17.0}=0x0
+phy_chain_rx_polarity_flip_physical{17.0}=0x1
+phy_chain_tx_polarity_flip_physical{18.0}=0x1
+phy_chain_rx_polarity_flip_physical{18.0}=0x1
+phy_chain_tx_polarity_flip_physical{19.0}=0x0
+phy_chain_rx_polarity_flip_physical{19.0}=0x1
+phy_chain_tx_polarity_flip_physical{20.0}=0x1
+phy_chain_rx_polarity_flip_physical{20.0}=0x0
+
+#FC5
+phy_chain_tx_polarity_flip_physical{21.0}=0x1
+phy_chain_rx_polarity_flip_physical{21.0}=0x0
+phy_chain_tx_polarity_flip_physical{22.0}=0x1
+phy_chain_rx_polarity_flip_physical{22.0}=0x1
+phy_chain_tx_polarity_flip_physical{23.0}=0x1
+phy_chain_rx_polarity_flip_physical{23.0}=0x0
+phy_chain_tx_polarity_flip_physical{24.0}=0x0
+phy_chain_rx_polarity_flip_physical{24.0}=0x0
+
+#FC6
+phy_chain_tx_polarity_flip_physical{25.0}=0x0
+phy_chain_rx_polarity_flip_physical{25.0}=0x0
+phy_chain_tx_polarity_flip_physical{26.0}=0x1
+phy_chain_rx_polarity_flip_physical{26.0}=0x1
+phy_chain_tx_polarity_flip_physical{27.0}=0x1
+phy_chain_rx_polarity_flip_physical{27.0}=0x0
+phy_chain_tx_polarity_flip_physical{28.0}=0x0
+phy_chain_rx_polarity_flip_physical{28.0}=0x0
+
+#FC7
+phy_chain_tx_polarity_flip_physical{29.0}=0x1
+phy_chain_rx_polarity_flip_physical{29.0}=0x0
+phy_chain_tx_polarity_flip_physical{30.0}=0x0
+phy_chain_rx_polarity_flip_physical{30.0}=0x1
+phy_chain_tx_polarity_flip_physical{31.0}=0x1
+phy_chain_rx_polarity_flip_physical{31.0}=0x0
+phy_chain_tx_polarity_flip_physical{32.0}=0x0
+phy_chain_rx_polarity_flip_physical{32.0}=0x1
+
+#FC8
+phy_chain_tx_polarity_flip_physical{33.0}=0x1
+phy_chain_rx_polarity_flip_physical{33.0}=0x0
+phy_chain_tx_polarity_flip_physical{34.0}=0x0
+phy_chain_rx_polarity_flip_physical{34.0}=0x1
+phy_chain_tx_polarity_flip_physical{35.0}=0x1
+phy_chain_rx_polarity_flip_physical{35.0}=0x0
+phy_chain_tx_polarity_flip_physical{36.0}=0x0
+phy_chain_rx_polarity_flip_physical{36.0}=0x1
+
+#FC9
+phy_chain_tx_polarity_flip_physical{37.0}=0x1
+phy_chain_rx_polarity_flip_physical{37.0}=0x1
+phy_chain_tx_polarity_flip_physical{38.0}=0x0
+phy_chain_rx_polarity_flip_physical{38.0}=0x0
+phy_chain_tx_polarity_flip_physical{39.0}=0x1
+phy_chain_rx_polarity_flip_physical{39.0}=0x1
+phy_chain_tx_polarity_flip_physical{40.0}=0x0
+phy_chain_rx_polarity_flip_physical{40.0}=0x0
+
+#FC10
+phy_chain_tx_polarity_flip_physical{41.0}=0x1
+phy_chain_rx_polarity_flip_physical{41.0}=0x0
+phy_chain_tx_polarity_flip_physical{42.0}=0x0
+phy_chain_rx_polarity_flip_physical{42.0}=0x0
+phy_chain_tx_polarity_flip_physical{43.0}=0x1
+phy_chain_rx_polarity_flip_physical{43.0}=0x0
+phy_chain_tx_polarity_flip_physical{44.0}=0x1
+phy_chain_rx_polarity_flip_physical{44.0}=0x0
+
+#FC11
+phy_chain_tx_polarity_flip_physical{45.0}=0x0
+phy_chain_rx_polarity_flip_physical{45.0}=0x1
+phy_chain_tx_polarity_flip_physical{46.0}=0x1
+phy_chain_rx_polarity_flip_physical{46.0}=0x0
+phy_chain_tx_polarity_flip_physical{47.0}=0x0
+phy_chain_rx_polarity_flip_physical{47.0}=0x0
+phy_chain_tx_polarity_flip_physical{48.0}=0x1
+phy_chain_rx_polarity_flip_physical{48.0}=0x1
+
+#FC12
+phy_chain_tx_polarity_flip_physical{49.0}=0x0
+phy_chain_rx_polarity_flip_physical{49.0}=0x1
+phy_chain_tx_polarity_flip_physical{50.0}=0x1
+phy_chain_rx_polarity_flip_physical{50.0}=0x0
+phy_chain_tx_polarity_flip_physical{51.0}=0x0
+phy_chain_rx_polarity_flip_physical{51.0}=0x1
+phy_chain_tx_polarity_flip_physical{52.0}=0x1
+phy_chain_rx_polarity_flip_physical{52.0}=0x0
+
+#FC13
+phy_chain_tx_polarity_flip_physical{53.0}=0x0
+phy_chain_rx_polarity_flip_physical{53.0}=0x1
+phy_chain_tx_polarity_flip_physical{54.0}=0x1
+phy_chain_rx_polarity_flip_physical{54.0}=0x0
+phy_chain_tx_polarity_flip_physical{55.0}=0x0
+phy_chain_rx_polarity_flip_physical{55.0}=0x1
+phy_chain_tx_polarity_flip_physical{56.0}=0x1
+phy_chain_rx_polarity_flip_physical{56.0}=0x0
+
+#FC14
+phy_chain_tx_polarity_flip_physical{57.0}=0x0
+phy_chain_rx_polarity_flip_physical{57.0}=0x1
+phy_chain_tx_polarity_flip_physical{58.0}=0x1
+phy_chain_rx_polarity_flip_physical{58.0}=0x0
+phy_chain_tx_polarity_flip_physical{59.0}=0x0
+phy_chain_rx_polarity_flip_physical{59.0}=0x1
+phy_chain_tx_polarity_flip_physical{60.0}=0x1
+phy_chain_rx_polarity_flip_physical{60.0}=0x0
+
+#FC15
+phy_chain_tx_polarity_flip_physical{61.0}=0x1
+phy_chain_rx_polarity_flip_physical{61.0}=0x1
+phy_chain_tx_polarity_flip_physical{62.0}=0x0
+phy_chain_rx_polarity_flip_physical{62.0}=0x0
+phy_chain_tx_polarity_flip_physical{63.0}=0x1
+phy_chain_rx_polarity_flip_physical{63.0}=0x1
+phy_chain_tx_polarity_flip_physical{64.0}=0x0
+phy_chain_rx_polarity_flip_physical{64.0}=0x0
+
+#FC16
+phy_chain_tx_polarity_flip_physical{65.0}=0x1
+phy_chain_rx_polarity_flip_physical{65.0}=0x0
+phy_chain_tx_polarity_flip_physical{66.0}=0x0
+phy_chain_rx_polarity_flip_physical{66.0}=0x1
+phy_chain_tx_polarity_flip_physical{67.0}=0x1
+phy_chain_rx_polarity_flip_physical{67.0}=0x0
+phy_chain_tx_polarity_flip_physical{68.0}=0x0
+phy_chain_rx_polarity_flip_physical{68.0}=0x1
+
+#FC17
+phy_chain_tx_polarity_flip_physical{69.0}=0x1
+phy_chain_rx_polarity_flip_physical{69.0}=0x0
+phy_chain_tx_polarity_flip_physical{70.0}=0x0
+phy_chain_rx_polarity_flip_physical{70.0}=0x1
+phy_chain_tx_polarity_flip_physical{71.0}=0x1
+phy_chain_rx_polarity_flip_physical{71.0}=0x0
+phy_chain_tx_polarity_flip_physical{72.0}=0x0
+phy_chain_rx_polarity_flip_physical{72.0}=0x1
+
+#FC18
+phy_chain_tx_polarity_flip_physical{73.0}=0x0
+phy_chain_rx_polarity_flip_physical{73.0}=0x1
+phy_chain_tx_polarity_flip_physical{74.0}=0x1
+phy_chain_rx_polarity_flip_physical{74.0}=0x0
+phy_chain_tx_polarity_flip_physical{75.0}=0x0
+phy_chain_rx_polarity_flip_physical{75.0}=0x0
+phy_chain_tx_polarity_flip_physical{76.0}=0x1
+phy_chain_rx_polarity_flip_physical{76.0}=0x0
+
+#FC19
+phy_chain_tx_polarity_flip_physical{77.0}=0x1
+phy_chain_rx_polarity_flip_physical{77.0}=0x0
+phy_chain_tx_polarity_flip_physical{78.0}=0x1
+phy_chain_rx_polarity_flip_physical{78.0}=0x1
+phy_chain_tx_polarity_flip_physical{79.0}=0x0
+phy_chain_rx_polarity_flip_physical{79.0}=0x0
+phy_chain_tx_polarity_flip_physical{80.0}=0x0
+phy_chain_rx_polarity_flip_physical{80.0}=0x0
+
+
+phy_chain_tx_polarity_flip_physical{81.0}=0x0
+phy_chain_rx_polarity_flip_physical{81.0}=0x1
+
+dport_map_port_29=1
+dport_map_port_30=2
+dport_map_port_31=3
+dport_map_port_20=4
+dport_map_port_21=5
+dport_map_port_22=6
+dport_map_port_23=7
+dport_map_port_24=8
+dport_map_port_25=9
+dport_map_port_26=10
+dport_map_port_27=11
+dport_map_port_28=12
+dport_map_port_62=13
+dport_map_port_63=14
+dport_map_port_37=15
+dport_map_port_38=16
+dport_map_port_39=17
+dport_map_port_40=18
+dport_map_port_41=19
+dport_map_port_42=20
+dport_map_port_43=21
+dport_map_port_44=22
+dport_map_port_45=23
+dport_map_port_46=24
+dport_map_port_3=25
+dport_map_port_4=26
+dport_map_port_5=27
+dport_map_port_6=28
+dport_map_port_7=29
+dport_map_port_8=30
+dport_map_port_9=31
+dport_map_port_10=32
+dport_map_port_11=33
+dport_map_port_12=34
+dport_map_port_13=35
+dport_map_port_14=36
+dport_map_port_47=37
+dport_map_port_48=38
+dport_map_port_49=39
+dport_map_port_50=40
+dport_map_port_51=41
+dport_map_port_52=42
+dport_map_port_53=43
+dport_map_port_54=44
+dport_map_port_55=45
+dport_map_port_56=46
+dport_map_port_57=47
+dport_map_port_58=48
+dport_map_port_33=49
+dport_map_port_61=50
+dport_map_port_59=51
+dport_map_port_60=52
+dport_map_port_1=53
+dport_map_port_15=54
+dport_map_port_2=55
+dport_map_port_16=56
+
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
+
diff --git a/device/celestica/x86_64-cel_ds2000-r0/custom_led.bin b/device/celestica/x86_64-cel_ds2000-r0/custom_led.bin
new file mode 100644
index 0000000000000000000000000000000000000000..7e6b6f96c1d420e32a26357685b97149cd1eabbb
GIT binary patch
literal 264
zcmV+j0r&p!wcbWoMovaWM&Pw6OavkWC4eKCMt(aBK%7RRCUyV{;6X+UKv_arK>{&D
zXqi$3G66KQLJrVFXq{3ccmX?`vYP+_Xj@txLh8^d0B1%3FYD3e=KvxBAw(mYMgk-_
zJD5g*L;xe4Mj11jMnf~3Mg`!(U;$xEMnhqQVF5DJvH&ag&;ctA&=mnjMrTHMQ2{gC
zvIHyf+3>u(MzTh!MxaLUy}@BqMgwA7MnhtRV&vzzH~;`09v>hfA|oUvCMPH{GBY$a
zHa9pqIy*cG3JVMk4i69!5)%|XK0iP~LPJDFMn^~i0s{mU78e)=1_uZk8XFubDl054
OE-x@iN=r;lPESzT@lU@1

literal 0
HcmV?d00001

diff --git a/device/celestica/x86_64-cel_ds2000-r0/default_sku b/device/celestica/x86_64-cel_ds2000-r0/default_sku
new file mode 100644
index 000000000000..ae9d33331e85
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/default_sku
@@ -0,0 +1 @@
+DS2000 t1
diff --git a/device/celestica/x86_64-cel_ds2000-r0/installer.conf b/device/celestica/x86_64-cel_ds2000-r0/installer.conf
new file mode 100644
index 000000000000..bb956b2aefb1
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/installer.conf
@@ -0,0 +1,4 @@
+CONSOLE_DEV=0
+CONSOLE_PORT=0xe060
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="processor.max_cstate=1 intel_idle.max_cstate=0 intel_iommu=off noirqdebug acpi_no_watchdog"
diff --git a/device/celestica/x86_64-cel_ds2000-r0/led_proc_init.soc b/device/celestica/x86_64-cel_ds2000-r0/led_proc_init.soc
new file mode 100644
index 000000000000..6f242fa07d89
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/led_proc_init.soc
@@ -0,0 +1,8 @@
+#Enable all ports
+#port all en=1
+#sleep 6
+#linkscan 250000; port xe,ce linkscan=on
+
+#Load LED
+m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
+led auto on; led start
diff --git a/device/celestica/x86_64-cel_ds2000-r0/media_settings.json b/device/celestica/x86_64-cel_ds2000-r0/media_settings.json
new file mode 100644
index 000000000000..299dfd211ecf
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/media_settings.json
@@ -0,0 +1,834 @@
+{
+    "GLOBAL_MEDIA_SETTINGS": {
+        "1-48": {
+            "25000-copper-1.0M": {
+                "preemphasis": {
+                    "lane0": "0x1a400a"
+                }
+            },
+            "25000-copper-3.0M": {
+                "preemphasis": {
+                    "lane0": "0x1a400a"
+                }
+            },
+            "25000-copper-5.0M": {
+                "preemphasis": {
+                    "lane0": "0x1a400a"
+                }
+            },
+            "10000-copper-1.0M": {
+                "preemphasis": {
+                    "lane0": "0x19410a"
+                }
+            },
+            "10000-copper-3.0M": {
+                "preemphasis": {
+                    "lane0": "0x19410a"
+                }
+            },
+            "10000-copper-5.0M": {
+                "preemphasis": {
+                    "lane0": "0x19410a"
+                }
+            },
+            "10000-copper-7.0M": {
+                "preemphasis": {
+                    "lane0": "0x19410a"
+                }
+            },
+            "Default": {
+                "preemphasis": {
+                    "lane0": "0x14410a"
+                }
+            }
+        },
+        "49-60": {
+            "25000-copper-1.0M": {
+                "preemphasis": {
+                    "lane0": "0x1a400a",
+                    "lane1": "0x1a400a",
+                    "lane2": "0x1a400a",
+                    "lane3": "0x1a400a"
+                }
+            },
+            "25000-copper-3.0M": {
+                "preemphasis": {
+                    "lane0": "0x1a400a",
+                    "lane1": "0x1a400a",
+                    "lane2": "0x1a400a",
+                    "lane3": "0x1a400a"
+                }
+            },
+            "25000-copper-5.0M": {
+                "preemphasis": {
+                    "lane0": "0x1a400a",
+                    "lane1": "0x1a400a",
+                    "lane2": "0x1a400a",
+                    "lane3": "0x1a400a"
+                }
+            },
+            "10000-copper-1.0M": {
+                "preemphasis": {
+                    "lane0": "0x19410a",
+                    "lane1": "0x19410a",
+                    "lane2": "0x19410a",
+                    "lane3": "0x19410a"
+                }
+            },
+            "10000-copper-3.0M": {
+                "preemphasis": {
+                    "lane0": "0x19410a",
+                    "lane1": "0x19410a",
+                    "lane2": "0x19410a",
+                    "lane3": "0x19410a"
+                }
+            },
+            "10000-copper-5.0M": {
+                "preemphasis": {
+                    "lane0": "0x19410a",
+                    "lane1": "0x19410a",
+                    "lane2": "0x19410a",
+                    "lane3": "0x19410a"
+                }
+            },
+            "10000-copper-7.0M": {
+                "preemphasis": {
+                    "lane0": "0x19410a",
+                    "lane1": "0x19410a",
+                    "lane2": "0x19410a",
+                    "lane3": "0x19410a"
+                }
+            },
+            "Default": {
+                "preemphasis": {
+                    "lane0": "0x14410a",
+                    "lane1": "0x14410a",
+                    "lane2": "0x14410a",
+                    "lane3": "0x14410a"
+                }
+            }
+        }
+    },
+    "PORT_MEDIA_SETTINGS": {
+        "1": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094b04"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x053602"
+                }
+            }
+        },
+        "2": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094b04"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x053602"
+                }
+            }
+        },
+        "3": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094b04"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x053602"
+                }
+            }
+        },
+        "4": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094a04"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x083902"
+                }
+            }
+        },
+        "5": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094b06"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x073802"
+                }
+            }
+        },
+        "6": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094b04"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x073802"
+                }
+            }
+        },
+        "7": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094b04"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x073702"
+                }
+            }
+        },
+        "8": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094b04"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x073702"
+                }
+            }
+        },
+        "9": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094b04"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x073702"
+                }
+            }
+        },
+        "10": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094b04"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x073702"
+                }
+            }
+        },
+        "11": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094b04"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x053602"
+                }
+            }
+        },
+        "12": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094b04"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x053602"
+                }
+            }
+        },
+        "13": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094b04"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x093a02"
+                }
+            }
+        },
+        "14": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094b04"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0a3b02"
+                }
+            }
+        },
+        "15": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x114c05"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0d4002"
+                }
+            }
+        },
+        "16": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x114c05"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0d4002"
+                }
+            }
+        },
+        "17": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x114c05"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0d4002"
+                }
+            }
+        },
+        "18": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x114c05"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0d4002"
+                }
+            }
+        },
+        "19": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x104c05"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0c3f02"
+                }
+            }
+        },
+        "20": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x114c05"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0c3f02"
+                }
+            }
+        },
+        "21": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x104c05"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0c3d02"
+                }
+            }
+        },
+        "22": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x104c05"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0c3f02"
+                }
+            }
+        },
+        "23": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x104c05"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0c3d02"
+                }
+            }
+        },
+        "24": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x104c05"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0c3f02"
+                }
+            }
+        },
+        "25": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x124305"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x124702"
+                }
+            }
+        },
+        "26": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x124305"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x114602"
+                }
+            }
+        },
+        "27": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x124305"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0f4402"
+                }
+            }
+        },
+        "28": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x124305"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0f4402"
+                }
+            }
+        },
+        "29": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x124305"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0e4202"
+                }
+            }
+        },
+        "30": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x124305"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0e4202"
+                }
+            }
+        },
+        "31": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x124305"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0d4002"
+                }
+            }
+        },
+        "32": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x124305"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0d4002"
+                }
+            }
+        },
+        "33": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x124b07"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0c3f02"
+                }
+            }
+        },
+        "34": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x124b07"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0c3d02"
+                }
+            }
+        },
+        "35": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x124b07"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0b3c02"
+                }
+            }
+        },
+        "36": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x124b07"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0b3c02"
+                }
+            }
+        },
+        "37": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x104c05"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0c3d02"
+                }
+            }
+        },
+        "38": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x104c05"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0c3d02"
+                }
+            }
+        },
+        "39": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094b04"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x073702"
+                }
+            }
+        },
+        "40": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094b04"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x073802"
+                }
+            }
+        },
+        "41": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094b04"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x073802"
+                }
+            }
+        },
+        "42": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094b04"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x073802"
+                }
+            }
+        },
+        "43": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094b04"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x073802"
+                }
+            }
+        },
+        "44": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094c04"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x083902"
+                }
+            }
+        },
+        "45": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094b04"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x083902"
+                }
+            }
+        },
+        "46": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094b04"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x093a02"
+                }
+            }
+        },
+        "47": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094b05"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x093a02"
+                }
+            }
+        },
+        "48": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x094b04"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x093a02"
+                }
+            }
+        },
+        "49": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x114b08",
+                    "lane1": "0x114b08",
+                    "lane2": "0x114b08",
+                    "lane3": "0x114b08"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0e4202",
+                    "lane1": "0x0e4202",
+                    "lane2": "0x0e4202",
+                    "lane3": "0x0e4202"
+                }
+            }
+        },
+        "50": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x124a08",
+                    "lane1": "0x124a08",
+                    "lane2": "0x124a08",
+                    "lane3": "0x124a08"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x124702",
+                    "lane1": "0x124702",
+                    "lane2": "0x124702",
+                    "lane3": "0x124702"
+                }
+            }
+        },
+        "51": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x114b08",
+                    "lane1": "0x114b08",
+                    "lane2": "0x114b08",
+                    "lane3": "0x114b08"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0f4402",
+                    "lane1": "0x0f4402",
+                    "lane2": "0x0f4402",
+                    "lane3": "0x0f4402"
+                }
+            }
+        },
+        "52": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x114b08",
+                    "lane1": "0x114b08",
+                    "lane2": "0x114b08",
+                    "lane3": "0x114b08"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0f4402",
+                    "lane1": "0x0f4402",
+                    "lane2": "0x0f4402",
+                    "lane3": "0x0f4402"
+                }
+            }
+        },
+        "53": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x154708",
+                    "lane1": "0x154708",
+                    "lane2": "0x154708",
+                    "lane3": "0x154708"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0a3b02",
+                    "lane1": "0x0a3b02",
+                    "lane2": "0x0a3b02",
+                    "lane3": "0x0a3b02"
+                }
+            }
+        },
+        "54": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x154609",
+                    "lane1": "0x154609",
+                    "lane2": "0x154609",
+                    "lane3": "0x154609"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0c3f02",
+                    "lane1": "0x0c3f02",
+                    "lane2": "0x0c3f02",
+                    "lane3": "0x0c3f02"
+                }
+            }
+        },
+        "55": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x164509",
+                    "lane1": "0x164509",
+                    "lane2": "0x164509",
+                    "lane3": "0x164509"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0a3b02",
+                    "lane1": "0x0a3b02",
+                    "lane2": "0x0a3b02",
+                    "lane3": "0x0a3b02"
+                }
+            }
+        },
+        "56": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x154708",
+                    "lane1": "0x154708",
+                    "lane2": "0x154708",
+                    "lane3": "0x154708"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0x0c3f02",
+                    "lane1": "0x0c3f02",
+                    "lane2": "0x0c3f02",
+                    "lane3": "0x0c3f02"
+                }
+            }
+        }
+    }
+}
\ No newline at end of file
diff --git a/device/celestica/x86_64-cel_ds2000-r0/pddf/pd-plugin.json b/device/celestica/x86_64-cel_ds2000-r0/pddf/pd-plugin.json
new file mode 100644
index 000000000000..839c9b5dfccd
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/pddf/pd-plugin.json
@@ -0,0 +1,145 @@
+{
+    "PSU":
+    {
+        "name":
+        {
+            "1": "PSU 1",
+            "2": "PSU 2"
+        },
+        "fan_name":
+        {
+            "1":
+            {
+               "1": "PSU 1 Fan 1"
+            },
+            "2":
+            {
+               "1": "PSU 2 Fan 1"
+            }
+        },
+        "thermal_name":
+        {
+            "1": "PSU 1 Temp1",
+            "2": "PSU 2 Temp1"
+        },
+        "psu_present": 
+        {
+            "bmc": 
+            {
+                "valmap": { "0": true, "4":false, "8":false }
+            },
+            "i2c":
+            {   
+                "valmap": {"1":true, "0": false}
+            }   
+        },
+
+        "psu_power_good": 
+        {
+            "bmc":
+            {
+                "valmap": { "1": true, "2": true, "0":false }
+            },
+            "i2c":
+            {
+                "valmap": {"1":true, "0": false}
+            }
+
+        },
+
+        "psu_fan_dir":
+        {
+            "bmc":
+            {
+                "valmap": { "B2F":"INTAKE", "F2B":"EXHAUST" }
+            },
+            "i2c":
+            {
+                "valmap": { "FSP550-29FM":"INTAKE", "FSP550-20FM":"EXHAUST"}
+            }
+
+        },
+
+        "psu_led_color":
+        {
+            "colmap": {"green":"green", "red":"amber"}
+        },
+
+        "PSU_FAN_MAX_SPEED":"18000"
+    },
+
+    "FAN":
+    {
+        "direction":
+        {
+            "bmc":
+            {
+                "valmap": { "1":"INTAKE", "0":"EXHAUST" }
+            },
+            "i2c":
+            {
+                "valmap": { "1":"INTAKE", "0":"EXHAUST" }
+            }
+        },
+        "drawer_name":
+        {
+            "1": "Fantray 1",
+            "2": "Fantray 2",
+            "3": "Fantray 3",
+            "4": "Fantray 4"
+        },
+        "name":
+        {
+            "1":
+            {
+               "1": "Fan 1 Front",
+               "2": "Fan 1 Rear"
+            },
+            "2":
+            {
+               "1": "Fan 2 Front",
+               "2": "Fan 2 Rear"
+            },
+            "3":
+            {
+              "1": "Fan 3 Front",
+              "2": "Fan 3 Rear"
+            },
+            "4":
+            {
+              "1": "Fan 4 Front",
+              "2": "Fan 4 Rear"
+            }
+        },
+        "present":
+        {
+            "bmc":
+            {
+                "valmap": {"0":true, "1":false}
+            },
+            "bmc":
+            {
+               "valmap": {"0":true, "1":false}
+            },
+            "i2c":
+            {
+               "valmap": {"1":true, "0":false}
+            }
+        },
+        
+        "fan_master_led_color":
+        {
+            "colmap": {"green":"green", "red":"amber"}
+        },
+
+        "duty_cycle_to_pwm": "lambda dc: ((dc*255.0)/100)",
+
+        "pwm_to_duty_cycle": "lambda pwm: ((pwm*100.0)/256)",
+
+        "FAN_MAX_RPM_SPEED":
+        {   
+            "Front": "23300", 
+            "Rear": "20300"
+        }  
+    }
+}
diff --git a/device/celestica/x86_64-cel_ds2000-r0/pddf/pddf-device-bmc.json b/device/celestica/x86_64-cel_ds2000-r0/pddf/pddf-device-bmc.json
new file mode 100644
index 000000000000..5f4ef1700b91
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/pddf/pddf-device-bmc.json
@@ -0,0 +1,2891 @@
+{
+"PLATFORM":
+{
+    "num_psus":2,
+    "num_fantrays":4,
+    "num_fans_pertray":2,
+    "num_ports":56,
+    "num_temps":9,
+    "bmc_present": "True",
+    "pddf_dev_types":
+    {
+            "description":" - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo <dev-address> <dev-type> > <path>/new_device' method",
+            "CPLD":
+            [
+                "i2c_cpld"
+            ],
+            "PSU":
+            [
+                "psu_eeprom",
+                "psu_pmbus"
+            ],
+            "FAN":
+            [
+                "fan_ctrl"
+            ],
+            "PORT_MODULE":
+            [
+                "pddf_xcvr"
+            ],
+            "FPGAPCIE":
+            [
+                "fpgapci"
+            ]
+
+        },
+        "std_perm_kos":
+        [
+            "i2c_ismt",
+            "i2c-i801"
+        ],
+
+        "std_kos":
+        [
+            "lpc_ich",
+            "i2c_dev",
+            "ipmi_devintf",
+            "ipmi_si",
+            "i2c_mux_pca954x",
+            "optoe",
+            "mc24lc64t"
+        ],
+
+        "pddf_kos":
+        [
+            "pddf_client_module",
+            "pddf_cpld_module",
+            "pddf_cpld_driver",
+            "pddf_mux_module",
+            "pddf_led_module",
+            "pddf_fpgai2c_module",
+            "pddf_fpgai2c_driver",
+            "pddf_xcvr_module",
+            "pddf_xcvr_driver_module",
+            "pddf_fpgapci_driver",
+            "pddf_fpgapci_module"
+        ],
+
+        "custom_kos":
+        [
+            "pddf_custom_fpga_algo"
+        ]
+    },
+
+    "SYSTEM":
+    {
+        "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null},
+        "i2c":
+        {
+            "CONTROLLERS":
+            [ 
+                { "dev_name":"i2c-0", "dev":"SMBUS0" },
+                { "dev_name":"pcie-0", "dev":"PCIE0" }
+            ]
+        }
+    },
+
+    "SMBUS0":
+    {
+        "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"},
+        "i2c":
+        {
+            "topo_info": {"dev_addr": "0x0"},
+            "DEVICES":
+            [
+                {"dev": "EEPROM1"}
+            ]
+        }
+    },
+
+    "EEPROM1":
+    {
+        "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus": "0x0", "dev_addr": "0x56", "dev_type": "24lc64t"},
+            "dev_attr": {"access_mode": "BLOCK"},
+            "attr_list": [
+                {"attr_name": "eeprom"}
+            ]
+        }
+    },
+
+
+    "PCIE0":
+    {
+        "dev_info": {"device_type": "PCIE", "device_name": "PCIE0", "device_parent": "SYSTEM"},
+        "i2c":
+        {
+            "DEVICES":
+            [
+                {"dev": "FPGAPCIE0"}
+            ]
+        }
+    },
+
+    "FPGAPCIE0":
+    {
+        "dev_info": {"device_type": "FPGAPCIE", "device_name": "FPGAPCIE0", "device_parent": "PCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x0"},
+            "dev_attr": { "vendor_id":"0x10EE", "device_id": "0x7021", "virt_bus": "0x64", "data_base_offset":"0x0", "data_size":"0x25000", "i2c_ch_base_offset":"0x00010000", "i2c_ch_size":"0x1000",  "virt_i2c_ch":"0xd"},
+            "channel":
+            [
+                { "chn":"1", "dev":"MUX1" },
+                { "chn":"1", "dev":"MUX2" },
+                { "chn":"1", "dev":"MUX3" },
+                { "chn":"1", "dev":"MUX4" },
+                { "chn":"1", "dev":"MUX5" },
+                { "chn":"1", "dev":"MUX6" },
+                { "chn":"2", "dev":"MUX7" },
+                { "chn":"3", "dev":"CPLD1" },
+                { "chn":"3", "dev":"CPLD2" },
+                { "chn":"4", "dev":"CPLD_B" }
+            ]
+        }
+    },
+
+    "MUX1":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX1", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x64", "dev_addr":"0x72", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x2", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT1" },
+                { "chn":"1", "dev":"PORT2" },
+                { "chn":"2", "dev":"PORT3" },
+                { "chn":"3", "dev":"PORT4" },
+                { "chn":"4", "dev":"PORT5" },
+                { "chn":"5", "dev":"PORT6" },
+                { "chn":"6", "dev":"PORT7" },
+                { "chn":"7", "dev":"PORT8" }
+            ]
+        }
+    },
+
+    "MUX2":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX2", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x64", "dev_addr":"0x73", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0xa", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT9" },
+                { "chn":"1", "dev":"PORT10" },
+                { "chn":"2", "dev":"PORT11" },
+                { "chn":"3", "dev":"PORT12" },
+                { "chn":"4", "dev":"PORT13" },
+                { "chn":"5", "dev":"PORT14" },
+                { "chn":"6", "dev":"PORT15" },
+                { "chn":"7", "dev":"PORT16" }
+            ]
+        }
+    },
+
+
+    "MUX3":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX3", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x64", "dev_addr":"0x74", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x12", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT17" },
+                { "chn":"1", "dev":"PORT18" },
+                { "chn":"2", "dev":"PORT19" },
+                { "chn":"3", "dev":"PORT20" },
+                { "chn":"4", "dev":"PORT21" },
+                { "chn":"5", "dev":"PORT22" },
+                { "chn":"6", "dev":"PORT23" },
+                { "chn":"7", "dev":"PORT24" }
+            ]
+        }
+    },
+
+    "MUX4":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX4", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x64", "dev_addr":"0x75", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x1a", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT25" },
+                { "chn":"1", "dev":"PORT26" },
+                { "chn":"2", "dev":"PORT27" },
+                { "chn":"3", "dev":"PORT28" },
+                { "chn":"4", "dev":"PORT29" },
+                { "chn":"5", "dev":"PORT30" },
+                { "chn":"6", "dev":"PORT31" },
+                { "chn":"7", "dev":"PORT32" }
+            ]
+        }
+    },
+
+    "MUX5":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX5", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x64", "dev_addr":"0x76", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x22", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT33" },
+                { "chn":"1", "dev":"PORT34" },
+                { "chn":"2", "dev":"PORT35" },
+                { "chn":"3", "dev":"PORT36" },
+                { "chn":"4", "dev":"PORT37" },
+                { "chn":"5", "dev":"PORT38" },
+                { "chn":"6", "dev":"PORT39" },
+                { "chn":"7", "dev":"PORT40" }
+            ]
+        }
+    },
+
+    "MUX6":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX6", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x64", "dev_addr":"0x77", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x2a", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT41" },
+                { "chn":"1", "dev":"PORT42" },
+                { "chn":"2", "dev":"PORT43" },
+                { "chn":"3", "dev":"PORT44" },
+                { "chn":"4", "dev":"PORT45" },
+                { "chn":"5", "dev":"PORT46" },
+                { "chn":"6", "dev":"PORT47" },
+                { "chn":"7", "dev":"PORT48" }
+            ]
+        }
+    },
+    "MUX7":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX7", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x65", "dev_addr":"0x74", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x32", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT53" },
+                { "chn":"1", "dev":"PORT54" },
+                { "chn":"2", "dev":"PORT55" },
+                { "chn":"3", "dev":"PORT56" },
+                { "chn":"4", "dev":"PORT49" },
+                { "chn":"5", "dev":"PORT50" },
+                { "chn":"6", "dev":"PORT51" },
+                { "chn":"7", "dev":"PORT52" }
+            ]
+        }
+    },
+
+    "CPLD1":
+    {
+        "dev_info": { "device_type":"CPLD", "device_name":"CPLD1", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x66", "dev_addr":"0x30", "dev_type":"i2c_cpld"},
+            "dev_attr":{}
+        }
+    },
+
+    "CPLD2":
+    {
+        "dev_info": { "device_type":"CPLD", "device_name":"CPLD2", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x66", "dev_addr":"0x31", "dev_type":"i2c_cpld"},
+            "dev_attr":{}
+        }
+    },
+
+    "CPLD_B":
+    {
+        "dev_info": { "device_type":"CPLD", "device_name":"CPLD_B", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x67", "dev_addr":"0x0d", "dev_type":"i2c_cpld"},
+            "dev_attr":{}
+        }
+    },
+
+    "PORT1":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT1", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"1"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT1-EEPROM" },
+                { "itf":"control", "dev":"PORT1-CTRL" }
+
+            ]
+        }
+    },
+    "PORT1-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT1-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT1-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT1-CTRL", "device_parent":"MUX1", "virt_parent":"PORT1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT2":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT2", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"2"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT2-EEPROM" },
+                { "itf":"control", "dev":"PORT2-CTRL" }
+            ]
+        }
+    },
+
+    "PORT2-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT2-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT2"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT2-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT2-CTRL", "device_parent":"MUX1", "virt_parent":"PORT2"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT3":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT3", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"3"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT3-EEPROM" },
+                { "itf":"control", "dev":"PORT3-CTRL" }
+            ]
+        }
+    },
+    "PORT3-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT3-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT3"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x4", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT3-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT3-CTRL", "device_parent":"MUX1", "virt_parent":"PORT3"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x4", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT4":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT4", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"4"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT4-EEPROM" },
+                { "itf":"control", "dev":"PORT4-CTRL" }
+            ]
+        }
+    },
+    "PORT4-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT4-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT4"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x5", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT4-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT4-CTRL", "device_parent":"MUX1", "virt_parent":"PORT4"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x5", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT5":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT5", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"5"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT5-EEPROM" },
+                { "itf":"control", "dev":"PORT5-CTRL" }
+            ]
+        }
+    },
+
+    "PORT5-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT5-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT5"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT5-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT5-CTRL", "device_parent":"MUX1", "virt_parent":"PORT5"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT6":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT6", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"6"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT6-EEPROM" },
+                { "itf":"control", "dev":"PORT6-CTRL" }
+            ]
+        }
+    },
+    "PORT6-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT6-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT6"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x7", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT6-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT6-CTRL", "device_parent":"MUX1", "virt_parent":"PORT6"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x7", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT7":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT7", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"7"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT7-EEPROM" },
+                { "itf":"control", "dev":"PORT7-CTRL" }
+            ]
+        }
+    },
+    "PORT7-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT7-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT7"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x8", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT7-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT7-CTRL", "device_parent":"MUX1", "virt_parent":"PORT7"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x8", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT8":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT8", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"8"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT8-EEPROM" },
+                { "itf":"control", "dev":"PORT8-CTRL" }
+            ]
+        }
+    },
+    "PORT8-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT8-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT8"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x9", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT8-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT8-CTRL", "device_parent":"MUX1", "virt_parent":"PORT8"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x9", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT9":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT9", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"9"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT9-EEPROM" },
+                { "itf":"control", "dev":"PORT9-CTRL" }
+            ]
+        }
+    },
+    "PORT9-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT9-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT9"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xa", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT9-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT9-CTRL", "device_parent":"MUX2", "virt_parent":"PORT9"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xa", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT10":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT10", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"10"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT10-EEPROM" },
+                { "itf":"control", "dev":"PORT10-CTRL" }
+            ]
+        }
+    },
+    "PORT10-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT10-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT10"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xb", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT10-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT10-CTRL", "device_parent":"MUX2", "virt_parent":"PORT10"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xb", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT11":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT11", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"11"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT11-EEPROM" },
+                { "itf":"control", "dev":"PORT11-CTRL" }
+            ]
+        }
+    },
+    "PORT11-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT11-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT11"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xc", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT11-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT11-CTRL", "device_parent":"MUX2", "virt_parent":"PORT11"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xc", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT12":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT12", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"12"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT12-EEPROM" },
+                { "itf":"control", "dev":"PORT12-CTRL" }
+            ]
+        }
+    },
+    "PORT12-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT12-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT12"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xd", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT12-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT12-CTRL", "device_parent":"MUX2", "virt_parent":"PORT12"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xd", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT13":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT13", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"13"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT13-EEPROM" },
+                { "itf":"control", "dev":"PORT13-CTRL" }
+            ]
+        }
+    },
+    "PORT13-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT13-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT13"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xe", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT13-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT13-CTRL", "device_parent":"MUX2", "virt_parent":"PORT13"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xe", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT14":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT14", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"14"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT14-EEPROM" },
+                { "itf":"control", "dev":"PORT14-CTRL" }
+            ]
+        }
+    },
+    "PORT14-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT14-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT14"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xF", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT14-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT14-CTRL", "device_parent":"MUX2", "virt_parent":"PORT14"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xf", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT15":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT15", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"15"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT15-EEPROM" },
+                { "itf":"control", "dev":"PORT15-CTRL" }
+            ]
+        }
+    },
+    "PORT15-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT15-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT15"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT15-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT15-CTRL", "device_parent":"MUX2", "virt_parent":"PORT15"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x10", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT16":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT16", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"16"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT16-EEPROM" },
+                { "itf":"control", "dev":"PORT16-CTRL" }
+            ]
+        }
+    },
+    "PORT16-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT16-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT16"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT16-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT16-CTRL", "device_parent":"MUX2", "virt_parent":"PORT16"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x11", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT17":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT17", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"17"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT17-EEPROM" },
+                { "itf":"control", "dev":"PORT17-CTRL" }
+            ]
+        }
+    },
+    "PORT17-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT17-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT17"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT17-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT17-CTRL", "device_parent":"MUX3", "virt_parent":"PORT17"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x12", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT18":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT18", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"18"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT18-EEPROM" },
+                { "itf":"control", "dev":"PORT18-CTRL" }
+            ]
+        }
+    },
+    "PORT18-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT18-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT18"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT18-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT18-CTRL", "device_parent":"MUX3", "virt_parent":"PORT18"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x13", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT19":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT19", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"19"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT19-EEPROM" },
+                { "itf":"control", "dev":"PORT19-CTRL" }
+            ]
+        }
+    },
+    "PORT19-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT19-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT19"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT19-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT19-CTRL", "device_parent":"MUX3", "virt_parent":"PORT19"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x14", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT20":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT20", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"20"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT20-EEPROM" },
+                { "itf":"control", "dev":"PORT20-CTRL" }
+            ]
+        }
+    },
+    "PORT20-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT20-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT20"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT20-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT20-CTRL", "device_parent":"MUX3", "virt_parent":"PORT20"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x15", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT21":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT21", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"21"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT21-EEPROM" },
+                { "itf":"control", "dev":"PORT21-CTRL" }
+            ]
+        }
+    },
+    "PORT21-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT21-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT21"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT21-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT21-CTRL", "device_parent":"MUX3", "virt_parent":"PORT21"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x16", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT22":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT22", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"22"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT22-EEPROM" },
+                { "itf":"control", "dev":"PORT22-CTRL" }
+            ]
+        }
+    },
+    "PORT22-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT22-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT22"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT22-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT22-CTRL", "device_parent":"MUX3", "virt_parent":"PORT22"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x17", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT23":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT23", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"23"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT23-EEPROM" },
+                { "itf":"control", "dev":"PORT23-CTRL" }
+            ]
+        }
+    },
+    "PORT23-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT23-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT23"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x18", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT23-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT23-CTRL", "device_parent":"MUX3", "virt_parent":"PORT23"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x18", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT24":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT24", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"24"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT24-EEPROM" },
+                { "itf":"control", "dev":"PORT24-CTRL" }
+            ]
+        }
+    },
+    "PORT24-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT24-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT24"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x19", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT24-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT24-CTRL", "device_parent":"MUX3", "virt_parent":"PORT24"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x19", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT25":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT25", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"25"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT25-EEPROM" },
+                { "itf":"control", "dev":"PORT25-CTRL" }
+            ]
+        }
+    },
+    "PORT25-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT25-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT25"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT25-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT25-CTRL", "device_parent":"MUX4", "virt_parent":"PORT25"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT26":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT26", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"26"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT26-EEPROM" },
+                { "itf":"control", "dev":"PORT26-CTRL" }
+            ]
+        }
+    },
+    "PORT26-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT26-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT26"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT26-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT26-CTRL", "device_parent":"MUX4", "virt_parent":"PORT26"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT27":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT27", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"27"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT27-EEPROM" },
+                { "itf":"control", "dev":"PORT27-CTRL" }
+            ]
+        }
+    },
+    "PORT27-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT27-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT27"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT27-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT27-CTRL", "device_parent":"MUX4", "virt_parent":"PORT27"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT28":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT28", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"28"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT28-EEPROM" },
+                { "itf":"control", "dev":"PORT28-CTRL" }
+            ]
+        }
+    },
+    "PORT28-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT28-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT28"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT28-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT28-CTRL", "device_parent":"MUX4", "virt_parent":"PORT28"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT29":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT29", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"29"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT29-EEPROM" },
+                { "itf":"control", "dev":"PORT29-CTRL" }
+            ]
+        }
+    },
+    "PORT29-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT29-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT29"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT29-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT29-CTRL", "device_parent":"MUX4", "virt_parent":"PORT29"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT30":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT30", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"30"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT30-EEPROM" },
+                { "itf":"control", "dev":"PORT30-CTRL" }
+            ]
+        }
+    },
+    "PORT30-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT30-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT30"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT30-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT30-CTRL", "device_parent":"MUX4", "virt_parent":"PORT30"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT31":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT31", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"31"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT31-EEPROM" },
+                { "itf":"control", "dev":"PORT31-CTRL" }
+            ]
+        }
+    },
+    "PORT31-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT31-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT31"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x20", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT31-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT31-CTRL", "device_parent":"MUX4", "virt_parent":"PORT31"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x20", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT32":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT32", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"32"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT32-EEPROM" },
+                { "itf":"control", "dev":"PORT32-CTRL" }
+            ]
+        }
+    },
+    "PORT32-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT32-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT32"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x21", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT32-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT32-CTRL", "device_parent":"MUX4", "virt_parent":"PORT32"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x21", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT33":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT33", "device_parent":"MUX5"},
+        "dev_attr": { "dev_idx":"33"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT33-EEPROM" },
+                { "itf":"control", "dev":"PORT33-CTRL" }
+            ]
+        }
+    },
+    "PORT33-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT33-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT33"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x22", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT33-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT33-CTRL", "device_parent":"MUX5", "virt_parent":"PORT33"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x22", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x210", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT34":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT34", "device_parent":"MUX5"},
+        "dev_attr": { "dev_idx":"34"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT34-EEPROM" },
+                { "itf":"control", "dev":"PORT34-CTRL" }
+            ]
+        }
+    },
+    "PORT34-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT34-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT34"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x23", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT34-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT34-CTRL", "device_parent":"MUX5", "virt_parent":"PORT34"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x23", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x220", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT35":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT35", "device_parent":"MUX5"},
+        "dev_attr": { "dev_idx":"35"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT35-EEPROM" },
+                { "itf":"control", "dev":"PORT35-CTRL" }
+            ]
+        }
+    },
+    "PORT35-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT35-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT35"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x24", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT35-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT35-CTRL", "device_parent":"MUX5", "virt_parent":"PORT35"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x24", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x230", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT36":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT36", "device_parent":"MUX5"},
+        "dev_attr": { "dev_idx":"36"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT36-EEPROM" },
+                { "itf":"control", "dev":"PORT36-CTRL" }
+            ]
+        }
+    },
+    "PORT36-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT36-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT36"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x25", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT36-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT36-CTRL", "device_parent":"MUX5", "virt_parent":"PORT36"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x25", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x240", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT37":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT37", "device_parent":"MUX5"},
+        "dev_attr": { "dev_idx":"37"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT37-EEPROM" },
+                { "itf":"control", "dev":"PORT37-CTRL" }
+            ]
+        }
+    },
+    "PORT37-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT37-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT37"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x26", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT37-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT37-CTRL", "device_parent":"MUX5", "virt_parent":"PORT37"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x26", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x250", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT38":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT38", "device_parent":"MUX5"},
+        "dev_attr": { "dev_idx":"38"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT38-EEPROM" },
+                { "itf":"control", "dev":"PORT38-CTRL" }
+            ]
+        }
+    },
+    "PORT38-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT38-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT38"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x27", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT38-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT38-CTRL", "device_parent":"MUX5", "virt_parent":"PORT38"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x27", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x260", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT39":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT39", "device_parent":"MUX5"},
+        "dev_attr": { "dev_idx":"39"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT39-EEPROM" },
+                { "itf":"control", "dev":"PORT39-CTRL" }
+            ]
+        }
+    },
+    "PORT39-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT39-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT39"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x28", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT39-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT39-CTRL", "device_parent":"MUX5", "virt_parent":"PORT39"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x28", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x270", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT40":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT40", "device_parent":"MUX5"},
+        "dev_attr": { "dev_idx":"40"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT40-EEPROM" },
+                { "itf":"control", "dev":"PORT40-CTRL" }
+            ]
+        }
+    },
+    "PORT40-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT40-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT40"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x29", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT40-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT40-CTRL", "device_parent":"MUX5", "virt_parent":"PORT40"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x29", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x280", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT41":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT41", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"41"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT41-EEPROM" },
+                { "itf":"control", "dev":"PORT41-CTRL" }
+            ]
+        }
+    },
+    "PORT41-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT41-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT41"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2a", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT41-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT41-CTRL", "device_parent":"MUX6", "virt_parent":"PORT41"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2a", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x290", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT42":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT42", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"42"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT42-EEPROM" },
+                { "itf":"control", "dev":"PORT42-CTRL" }
+            ]
+        }
+    },
+    "PORT42-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT42-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT42"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2b", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT42-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT42-CTRL", "device_parent":"MUX6", "virt_parent":"PORT42"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2b", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2a0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT43":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT43", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"43"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT43-EEPROM" },
+                { "itf":"control", "dev":"PORT43-CTRL" }
+            ]
+        }
+    },
+    "PORT43-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT43-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT43"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2c", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT43-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT43-CTRL", "device_parent":"MUX6", "virt_parent":"PORT43"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2c", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2b0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT44":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT44", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"44"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT44-EEPROM" },
+                { "itf":"control", "dev":"PORT44-CTRL" }
+            ]
+        }
+    },
+    "PORT44-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT44-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT44"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2d", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT44-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT44-CTRL", "device_parent":"MUX6", "virt_parent":"PORT44"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2d", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2c0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT45":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT45", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"45"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT45-EEPROM" },
+                { "itf":"control", "dev":"PORT45-CTRL" }
+            ]
+        }
+    },
+    "PORT45-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT45-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT45"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2e", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT45-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT45-CTRL", "device_parent":"MUX6", "virt_parent":"PORT45"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2e", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2d0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT46":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT46", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"46"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT46-EEPROM" },
+                { "itf":"control", "dev":"PORT46-CTRL" }
+            ]
+        }
+    },
+    "PORT46-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT46-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT46"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2f", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT46-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT46-CTRL", "device_parent":"MUX6", "virt_parent":"PORT46"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2f", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2e0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT47":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT47", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"47"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT47-EEPROM" },
+                { "itf":"control", "dev":"PORT47-CTRL" }
+            ]
+        }
+    },
+    "PORT47-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT47-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT47"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x30", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT47-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT47-CTRL", "device_parent":"MUX6", "virt_parent":"PORT47"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x30", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2f0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT48":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT48", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"48"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT48-EEPROM" },
+                { "itf":"control", "dev":"PORT48-CTRL" }
+            ]
+        }
+    },
+    "PORT48-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT48-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT48"},
+        "i2c":
+        {
+           "topo_info": { "parent_bus":"0x31", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT48-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT48-CTRL", "device_parent":"MUX6", "virt_parent":"PORT48"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x31", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x300", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT49":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT49", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"49"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT49-EEPROM" },
+                { "itf":"control", "dev":"PORT49-CTRL" }
+            ]
+        }
+    },
+    "PORT49-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT49-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT49"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x36", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT49-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT49-CTRL", "device_parent":"MUX7", "virt_parent":"PORT49"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x36", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x310", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x310", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x310", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
+
+            ]
+        }
+    },
+	
+    "PORT50":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT50", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"50"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT50-EEPROM" },
+                { "itf":"control", "dev":"PORT50-CTRL" }
+            ]
+        }
+    },
+    "PORT50-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT50-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT50"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x37", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT50-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT50-CTRL", "device_parent":"MUX7", "virt_parent":"PORT50"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x37", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x320", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x320", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x320", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT51":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT51", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"51"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT51-EEPROM" },
+                { "itf":"control", "dev":"PORT51-CTRL" }
+            ]
+        }
+    },
+    "PORT51-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT51-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT51"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x38", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT51-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT51-CTRL", "device_parent":"MUX7", "virt_parent":"PORT51"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x38", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x330", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x330", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x330", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT52":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT52", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"52"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT52-EEPROM" },
+                { "itf":"control", "dev":"PORT52-CTRL" }
+            ]
+        }
+    },
+    "PORT52-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT52-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT52"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x39", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT52-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT52-CTRL", "device_parent":"MUX7", "virt_parent":"PORT52"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x39", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x340", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x340", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x340", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT53":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT53", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"53"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT53-EEPROM" },
+                { "itf":"control", "dev":"PORT53-CTRL" }
+            ]
+        }
+    },
+    "PORT53-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT53-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT53"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x32", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT53-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT53-CTRL", "device_parent":"MUX7", "virt_parent":"PORT53"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x32", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x350", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x350", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x350", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT54":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT54", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"54"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT54-EEPROM" },
+                { "itf":"control", "dev":"PORT54-CTRL" }
+            ]
+        }
+    },
+    "PORT54-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT54-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT54"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x33", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT54-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT54-CTRL", "device_parent":"MUX7", "virt_parent":"PORT54"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x33", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x360", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x360", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x360", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT55":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT55", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"55"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT55-EEPROM" },
+                { "itf":"control", "dev":"PORT55-CTRL" }
+            ]
+        }
+    },
+    "PORT55-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT55-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT55"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x34", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT55-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT55-CTRL", "device_parent":"MUX7", "virt_parent":"PORT55"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x34", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x370", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x370", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x370", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT56":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT56", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"56"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT56-EEPROM" },
+                { "itf":"control", "dev":"PORT56-CTRL" }
+            ]
+        }
+    },
+    "PORT56-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT56-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT56"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x35", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT56-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT56-CTRL", "device_parent":"MUX7", "virt_parent":"PORT56"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x35", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x380", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x380", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x380", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PSU1":
+    {
+        "dev_info": { "device_type":"PSU"},
+        "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"psu_power_good", "bmc_cmd":"ipmitool raw 0x3A 0x64 0x0 0x1 0x60", "raw": "1", "type":"mask", "mask":"0x2"},
+                    { "attr_name":"psu_present", "bmc_cmd":"ipmitool raw 0x3A 0x64 0x0 0x1 0x60", "raw": "1", "type":"mask", "mask":"0x8"},
+                    { "attr_name":"psu_model_name", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Name", "separator":": ","field_pos":"2"},
+                    { "attr_name":"psu_serial_num", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Serial", "separator":": ","field_pos":"2"},
+                    { "attr_name":"psu_mfr_id", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Manufacturer", "separator":":", "field_pos":"2"},
+                    { "attr_name":"psu_fan_dir", "bmc_cmd":"ipmitool fru print 0 | grep -e B2F -e F2B", "raw": "0", "field_name":"Product Extra", "separator":":", "field_pos":"2"},
+                    { "attr_name":"psu_p_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x21", "type": "raw", "raw": "1", "offset": "0", "multiplier": "6000000"},
+                    { "attr_name":"psu_v_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1F", "type": "raw", "raw": "1", "offset" : "0", "multiplier": "100"},
+                    { "attr_name":"psu_i_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x20", "type": "raw", "raw": "1", "offset" : "0", "multiplier": "500"},
+                    { "attr_name":"psu_p_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1B", "type": "raw", "raw": "1", "offset": "0", "multiplier": "6000000"},
+                    { "attr_name":"psu_v_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x19", "type": "raw", "raw": "1", "offset": "0", "multiplier": "100"},
+                    { "attr_name":"psu_i_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1A", "type": "raw", "raw": "1", "offset": "0", "multiplier": "500"},
+                    { "attr_name":"psu_fan1_speed_rpm", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1C", "type": "raw", "raw": "1", "offset": "0", "multiplier": "200"},
+                    { "attr_name":"psu_temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1D", "type": "raw", "raw":"1", "offset": "0", "multiplier": "1000"},
+                    { "attr_name":"psu_temp2_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1E", "type": "raw", "raw":"1", "offset": "0", "multiplier": "1000"}
+                ]
+            }
+        }
+    },
+
+    "PSU2":
+    {
+        "dev_info": { "device_type":"PSU"},
+        "dev_attr": { "dev_idx":"2", "num_psu_fans": "1"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"psu_power_good", "bmc_cmd":"ipmitool raw 0x3A 0x64 0x0 0x1 0x60", "raw": "1", "type":"mask", "mask":"0x1"},
+                    { "attr_name":"psu_present", "bmc_cmd":"ipmitool raw 0x3A 0x64 0x0 0x1 0x60", "raw": "1", "type":"mask", "mask":"0x4"},
+                    { "attr_name":"psu_model_name", "bmc_cmd":"ipmitool fru print 4", "raw": "0", "field_name":"Product Name", "separator":": ","field_pos":"2"},
+                    { "attr_name":"psu_serial_num", "bmc_cmd":"ipmitool fru print 4", "raw": "0", "field_name":"Product Serial", "separator":": ","field_pos":"2"},
+                    { "attr_name":"psu_mfr_id", "bmc_cmd":"ipmitool fru print 4", "raw": "0", "field_name":"Product Manufacturer", "separator":":", "field_pos":"2"},
+                    { "attr_name":"psu_fan_dir", "bmc_cmd":"ipmitool fru print 0 | grep -e B2F -e F2B", "raw": "0", "field_name":"Product Extra", "separator":":", "field_pos":"2"},
+                    { "attr_name":"psu_p_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2A", "type": "raw", "raw": "1", "offset": "0", "multiplier": "6000000"},
+                    { "attr_name":"psu_v_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x28", "type": "raw", "raw": "1", "offset" : "0", "multiplier": "100"},
+                    { "attr_name":"psu_i_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x29", "type": "raw", "raw": "1", "offset" : "0", "multiplier": "500"},
+                    { "attr_name":"psu_p_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x24", "type": "raw", "raw": "1", "offset": "0", "multiplier": "6000000"},
+                    { "attr_name":"psu_v_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x22", "type": "raw", "raw": "1", "offset": "0", "multiplier": "100"},
+                    { "attr_name":"psu_i_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x23", "type": "raw", "raw": "1", "offset": "0", "multiplier": "500"},
+                    { "attr_name":"psu_fan1_speed_rpm", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x25", "type": "raw", "raw": "1", "offset": "0", "multiplier": "200"},
+                    { "attr_name":"psu_temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x26", "type": "raw", "raw":"1", "offset": "0", "multiplier": "1000"},
+                    { "attr_name":"psu_temp2_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x27", "type": "raw", "raw":"1", "offset": "0", "multiplier": "1000"}
+                ]
+            }
+        }
+    },
+
+    "FAN-CTRL":
+    {
+        "dev_info": { "device_type":"FAN"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"fan1_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x00", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan2_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x00", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan3_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x01", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan4_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x01", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan5_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x02", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan6_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x02", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan7_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x03", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan8_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x03", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan1_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x00", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan2_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x00", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan3_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x01", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan4_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x01", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan5_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x02", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan6_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x02", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan7_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x03", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan8_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x03", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan1_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x00", "raw": "1", "type": "raw", "offset": "0", "multiplier": "120"},
+                    { "attr_name":"fan2_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x00", "raw": "1", "type": "raw", "offset": "1", "multiplier": "120"},
+                    { "attr_name":"fan3_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x01", "raw": "1", "type": "raw", "offset": "0", "multiplier": "120"},
+                    { "attr_name":"fan4_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x01", "raw": "1", "type": "raw", "offset": "1", "multiplier": "120"},
+                    { "attr_name":"fan5_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x02", "raw": "1", "type": "raw", "offset": "0", "multiplier": "120"},
+                    { "attr_name":"fan6_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x02", "raw": "1", "type": "raw", "offset": "1", "multiplier": "120"},
+                    { "attr_name":"fan7_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x03", "raw": "1", "type": "raw", "offset": "0", "multiplier": "120"},
+                    { "attr_name":"fan8_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 0x03", "raw": "1", "type": "raw", "offset": "1", "multiplier": "120"},
+                    { "attr_name":"fan1_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x00", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan2_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x00", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan3_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x01", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan4_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x01", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan5_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x02", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan6_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x02", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan7_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x03", "type": "raw", "raw": "1"},
+                    { "attr_name":"fan8_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x16 0x03", "type": "raw", "raw": "1"}
+                ]
+            }
+        }
+    },
+
+    "TEMP1":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR"},
+        "dev_attr": { "display_name":"CPU Internal Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x7", "type": "raw", "raw":"1", "offset": "5"},
+                    { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x7", "type": "raw", "raw": "1", "offset": "0"}
+
+                ]
+            }
+        }
+    },
+
+    "TEMP2":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR"},
+        "dev_attr": { "display_name":"Baseboard Left Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x01", "type": "raw", "raw": "1", "offset":"0"}
+
+                ]
+            }
+        }
+    },
+
+    "TEMP3":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR"},
+        "dev_attr": { "display_name":"Baseboard Right Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x02", "type": "raw", "raw": "1", "offset": "0"}
+
+                ]
+            }
+        }
+    },
+
+
+    "TEMP4":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR"},
+        "dev_attr": { "display_name":"ASIC External Front Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x03", "type": "raw", "raw": "1", "offset":"5"},
+                    { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x03", "type": "raw", "raw": "1", "offset" : "0"}
+
+                ]
+            }
+        }
+    },
+
+    "TEMP5":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR"},
+        "dev_attr": { "display_name":"ASIC External Rear Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x04", "type": "raw", "raw": "1", "offset" : "0"}
+
+                ]
+            }
+        }
+    },
+
+    "TEMP6":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR"},
+        "dev_attr": { "display_name":"Switchboard Left Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x06", "type": "raw", "raw": "1", "offset":"5", "decrementor": "5"},
+                    { "attr_name":"temp1_high_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x06", "type": "raw", "raw": "1", "offset":"4", "decrementor": "5"},
+                    { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x06", "type": "raw", "raw": "1", "offset" : "0"}
+
+                ]
+            }
+        }
+    },
+
+
+    "TEMP7":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR"},
+        "dev_attr": { "display_name":"Switchboard Right Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x05", "type": "raw", "raw": "1", "offset":"5", "decrementor": "5"},
+                    { "attr_name":"temp1_high_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x05", "type": "raw", "raw": "1", "offset":"4", "decrementor": "5"},
+                    { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x05", "type": "raw", "raw": "1", "offset" : "0"}
+
+                ]
+            }
+        }
+    },
+
+    "TEMP8":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR"},
+        "dev_attr": { "display_name":"VDD CORE Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x49", "type": "raw", "raw": "1", "offset":"5"},
+                    { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x49", "type": "raw", "raw": "1", "offset" : "0"}
+
+                ]
+            }
+        }
+    },
+
+    "TEMP9":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR"},
+        "dev_attr": { "display_name":"VDD ANLG Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x50", "type": "raw", "raw": "1", "offset":"5"},
+                    { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x50", "type": "raw", "raw": "1", "offset" : "0"}
+
+                ]
+            }
+        }
+    },
+    "SYS_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"SYS_LED"},
+        "dev_attr": { "index":"0", "flag": "ro"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"},
+                    { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"},
+                    { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"},
+                    { "attr_name":"amber_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"},
+                    { "attr_name":"amber_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x04"},
+                    { "attr_name":"green_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x05"},
+                    { "attr_name":"green_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x06"},
+                    { "attr_name":"both_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x07"},
+                    { "attr_name":"both_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x0", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x08"}
+                ]
+            }
+        }
+    },
+    "ALARM_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"ALARM_LED"},
+        "dev_attr": { "index":"0", "flag": "ro"},
+        "bmc": {
+             "ipmitool" : {
+             "attr_list":
+             [
+                    { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"},
+                    { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"},
+                    { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"},
+                    { "attr_name":"amber_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"},
+                    { "attr_name":"amber_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x04"},
+                    { "attr_name":"green_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x05"},
+                    { "attr_name":"green_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x06"},
+                    { "attr_name":"both_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x07"},
+                    { "attr_name":"both_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x1", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x08"}
+            ]
+         }
+       }
+    },
+    "FANTRAY1_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY1_LED"},
+        "dev_attr": { "index":"0", "flag": "ro"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x4", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"},
+                    { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x4", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"},
+                    { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x4", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"}
+                ]
+            }
+        }
+    },
+    "FANTRAY2_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY2_LED"},
+        "dev_attr": { "index":"1", "flag": "ro"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x5", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"},
+                    { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x5", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"},
+                    { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x5", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"}
+                ]
+            }
+        }
+    },
+    "FANTRAY3_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY3_LED"},
+        "dev_attr": { "index":"2", "flag": "ro"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x6", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"},
+                    { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x6", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"},
+                    { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x6", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"}
+                ]
+            }
+        }
+    },
+    "FANTRAY4_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY4_LED"},
+        "dev_attr": { "index":"3", "flag": "ro"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x7", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"},
+                    { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x7", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"},
+                    { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x1 0x7", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"}
+                ]
+            }
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_ds2000-r0/pddf/pddf-device-nonbmc.json b/device/celestica/x86_64-cel_ds2000-r0/pddf/pddf-device-nonbmc.json
new file mode 100644
index 000000000000..0335e9cf8c03
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/pddf/pddf-device-nonbmc.json
@@ -0,0 +1,2889 @@
+{
+"PLATFORM":
+{
+    "num_psus":2,
+    "num_fantrays":4,
+    "num_fans_pertray":2,
+    "num_ports":56,
+    "num_temps":8,
+    "bmc_present": "False",
+    "pddf_dev_types":
+    {
+            "description":" - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo <dev-address> <dev-type> > <path>/new_device' method",
+            "CPLD":
+            [
+                "i2c_cpld"
+            ],
+            "PSU":
+            [
+                "psu_pmbus"
+            ],
+            "FAN":
+            [
+                "fan_ctrl",
+                "fan_cpld"
+            ],
+            "PORT_MODULE":
+            [
+                "pddf_xcvr"
+            ],
+            "FPGAPCIE":
+            [
+                "fpgapci"
+            ]
+
+        },
+        "std_perm_kos":
+        [
+            "i2c_ismt",
+            "i2c-i801"
+        ],
+
+        "std_kos":
+        [
+            "lpc_ich",
+            "i2c_dev",
+            "i2c_mux_pca954x",
+            "optoe",
+            "mc24lc64t"
+        ],
+
+        "pddf_kos":
+        [
+            "pddf_client_module",
+            "pddf_psu_module",
+            "pddf_fan_module",
+            "pddf_cpld_module",
+            "pddf_cpld_driver",
+            "pddf_mux_module",
+            "pddf_led_module",
+            "pddf_fpgai2c_module",
+            "pddf_fpgai2c_driver",
+            "pddf_xcvr_module",
+            "pddf_xcvr_driver_module",
+            "pddf_fpgapci_driver",
+            "pddf_fpgapci_module"
+        ],
+
+        "custom_kos":
+        [
+            "pddf_custom_fpga_algo",
+	        "pddf_custom_psu_driver_module"
+        ]
+    },
+
+    "SYSTEM":
+    {
+        "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null},
+        "i2c":
+        {
+            "CONTROLLERS":
+            [ 
+                { "dev_name":"i2c-0", "dev":"SMBUS0" },
+                { "dev_name":"pcie-0", "dev":"PCIE0" }
+            ]
+        }
+    },
+
+    "SMBUS0":
+    {
+        "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"},
+        "i2c":
+        {
+            "topo_info": {"dev_addr": "0x0"},
+            "DEVICES":
+            [
+                {"dev": "EEPROM1"}
+            ]
+        }
+    },
+
+    "EEPROM1":
+    {
+        "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus": "0x0", "dev_addr": "0x56", "dev_type": "24lc64t"},
+            "dev_attr": {"access_mode": "BLOCK"},
+            "attr_list": [
+                {"attr_name": "eeprom"}
+            ]
+        }
+    },
+
+
+    "PCIE0":
+    {
+        "dev_info": {"device_type": "PCIE", "device_name": "PCIE0", "device_parent": "SYSTEM"},
+        "i2c":
+        {
+            "DEVICES":
+            [
+                {"dev": "FPGAPCIE0"}
+            ]
+        }
+    },
+
+    "FPGAPCIE0":
+    {
+        "dev_info": {"device_type": "FPGAPCIE", "device_name": "FPGAPCIE0", "device_parent": "PCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x0"},
+            "dev_attr": { "vendor_id":"0x10EE", "device_id": "0x7021", "virt_bus": "0x64", "data_base_offset":"0x0", "data_size":"0x25000", "i2c_ch_base_offset":"0x00010000", "i2c_ch_size":"0x1000",  "virt_i2c_ch":"0xd"},
+            "channel":
+            [
+                { "chn":"1", "dev":"MUX1" },
+                { "chn":"1", "dev":"MUX2" },
+                { "chn":"1", "dev":"MUX3" },
+                { "chn":"1", "dev":"MUX4" },
+                { "chn":"1", "dev":"MUX5" },
+                { "chn":"1", "dev":"MUX6" },
+                { "chn":"2", "dev":"MUX7" },
+                { "chn":"3", "dev":"CPLD1" },
+                { "chn":"3", "dev":"CPLD2" },
+                { "chn":"6", "dev":"CPLD_B" },
+                { "chn":"6", "dev":"FAN-CTRL" },
+                { "chn":"7", "dev":"MUX8" },
+                { "chn":"9", "dev":"TEMP7" },
+                { "chn":"9", "dev":"TEMP8" },
+                { "chn":"10", "dev":"TEMP1" },
+                { "chn":"10", "dev":"TEMP2" },
+                { "chn":"10", "dev":"TEMP3" },
+                { "chn":"10", "dev":"TEMP4" },
+                { "chn":"10", "dev":"TEMP5" },
+                { "chn":"10", "dev":"TEMP6" }
+            ]
+        }
+    },
+
+    "MUX1":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX1", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x64", "dev_addr":"0x72", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x2", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT1" },
+                { "chn":"1", "dev":"PORT2" },
+                { "chn":"2", "dev":"PORT3" },
+                { "chn":"3", "dev":"PORT4" },
+                { "chn":"4", "dev":"PORT5" },
+                { "chn":"5", "dev":"PORT6" },
+                { "chn":"6", "dev":"PORT7" },
+                { "chn":"7", "dev":"PORT8" }
+            ]
+        }
+    },
+
+    "MUX2":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX2", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x64", "dev_addr":"0x73", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0xa", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT9" },
+                { "chn":"1", "dev":"PORT10" },
+                { "chn":"2", "dev":"PORT11" },
+                { "chn":"3", "dev":"PORT12" },
+                { "chn":"4", "dev":"PORT13" },
+                { "chn":"5", "dev":"PORT14" },
+                { "chn":"6", "dev":"PORT15" },
+                { "chn":"7", "dev":"PORT16" }
+            ]
+        }
+    },
+
+
+    "MUX3":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX3", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x64", "dev_addr":"0x74", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x12", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT17" },
+                { "chn":"1", "dev":"PORT18" },
+                { "chn":"2", "dev":"PORT19" },
+                { "chn":"3", "dev":"PORT20" },
+                { "chn":"4", "dev":"PORT21" },
+                { "chn":"5", "dev":"PORT22" },
+                { "chn":"6", "dev":"PORT23" },
+                { "chn":"7", "dev":"PORT24" }
+            ]
+        }
+    },
+
+    "MUX4":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX4", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x64", "dev_addr":"0x75", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x1a", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT25" },
+                { "chn":"1", "dev":"PORT26" },
+                { "chn":"2", "dev":"PORT27" },
+                { "chn":"3", "dev":"PORT28" },
+                { "chn":"4", "dev":"PORT29" },
+                { "chn":"5", "dev":"PORT30" },
+                { "chn":"6", "dev":"PORT31" },
+                { "chn":"7", "dev":"PORT32" }
+            ]
+        }
+    },
+
+    "MUX5":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX5", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x64", "dev_addr":"0x76", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x22", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT33" },
+                { "chn":"1", "dev":"PORT34" },
+                { "chn":"2", "dev":"PORT35" },
+                { "chn":"3", "dev":"PORT36" },
+                { "chn":"4", "dev":"PORT37" },
+                { "chn":"5", "dev":"PORT38" },
+                { "chn":"6", "dev":"PORT39" },
+                { "chn":"7", "dev":"PORT40" }
+            ]
+        }
+    },
+
+    "MUX6":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX6", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x64", "dev_addr":"0x77", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x2a", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT41" },
+                { "chn":"1", "dev":"PORT42" },
+                { "chn":"2", "dev":"PORT43" },
+                { "chn":"3", "dev":"PORT44" },
+                { "chn":"4", "dev":"PORT45" },
+                { "chn":"5", "dev":"PORT46" },
+                { "chn":"6", "dev":"PORT47" },
+                { "chn":"7", "dev":"PORT48" }
+            ]
+        }
+    },
+    "MUX7":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX7", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x65", "dev_addr":"0x74", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x32", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT53" },
+                { "chn":"1", "dev":"PORT54" },
+                { "chn":"2", "dev":"PORT55" },
+                { "chn":"3", "dev":"PORT56" },
+                { "chn":"4", "dev":"PORT49" },
+                { "chn":"5", "dev":"PORT50" },
+                { "chn":"6", "dev":"PORT51" },
+                { "chn":"7", "dev":"PORT52" }
+            ]
+        }
+    },
+
+    "CPLD1":
+    {
+        "dev_info": { "device_type":"CPLD", "device_name":"CPLD1", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x66", "dev_addr":"0x30", "dev_type":"i2c_cpld"},
+            "dev_attr":{}
+        }
+    },
+
+    "CPLD2":
+    {
+        "dev_info": { "device_type":"CPLD", "device_name":"CPLD2", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x66", "dev_addr":"0x31", "dev_type":"i2c_cpld"},
+            "dev_attr":{}
+        }
+    },
+
+    "CPLD_B":
+    {
+        "dev_info": { "device_type":"CPLD", "device_name":"CPLD_B", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x69", "dev_addr":"0x0d", "dev_type":"i2c_cpld"},
+            "dev_attr":{}
+        }
+    },
+
+    "MUX8":                                                                                                                                                                                                                          
+    { 
+        "dev_info": {"device_type":"MUX", "device_name":"MUX8", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6a", "dev_addr":"0x70", "dev_type":"pca9548"},
+            "dev_attr": {"virt_bus":"0x3a", "idle_state": "-2"},
+            "channel":
+            [
+                {"chn":"0", "dev":"PSU1"},
+                {"chn":"1", "dev":"PSU2"}
+            ]
+        }
+    },
+
+    "PORT1":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT1", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"1"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT1-EEPROM" },
+                { "itf":"control", "dev":"PORT1-CTRL" }
+
+            ]
+        }
+    },
+    "PORT1-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT1-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT1-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT1-CTRL", "device_parent":"MUX1", "virt_parent":"PORT1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT2":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT2", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"2"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT2-EEPROM" },
+                { "itf":"control", "dev":"PORT2-CTRL" }
+            ]
+        }
+    },
+
+    "PORT2-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT2-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT2"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT2-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT2-CTRL", "device_parent":"MUX1", "virt_parent":"PORT2"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT3":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT3", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"3"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT3-EEPROM" },
+                { "itf":"control", "dev":"PORT3-CTRL" }
+            ]
+        }
+    },
+    "PORT3-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT3-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT3"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x4", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT3-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT3-CTRL", "device_parent":"MUX1", "virt_parent":"PORT3"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x4", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT4":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT4", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"4"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT4-EEPROM" },
+                { "itf":"control", "dev":"PORT4-CTRL" }
+            ]
+        }
+    },
+    "PORT4-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT4-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT4"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x5", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT4-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT4-CTRL", "device_parent":"MUX1", "virt_parent":"PORT4"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x5", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT5":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT5", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"5"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT5-EEPROM" },
+                { "itf":"control", "dev":"PORT5-CTRL" }
+            ]
+        }
+    },
+
+    "PORT5-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT5-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT5"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT5-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT5-CTRL", "device_parent":"MUX1", "virt_parent":"PORT5"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT6":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT6", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"6"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT6-EEPROM" },
+                { "itf":"control", "dev":"PORT6-CTRL" }
+            ]
+        }
+    },
+    "PORT6-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT6-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT6"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x7", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT6-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT6-CTRL", "device_parent":"MUX1", "virt_parent":"PORT6"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x7", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT7":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT7", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"7"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT7-EEPROM" },
+                { "itf":"control", "dev":"PORT7-CTRL" }
+            ]
+        }
+    },
+    "PORT7-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT7-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT7"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x8", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT7-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT7-CTRL", "device_parent":"MUX1", "virt_parent":"PORT7"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x8", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT8":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT8", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"8"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT8-EEPROM" },
+                { "itf":"control", "dev":"PORT8-CTRL" }
+            ]
+        }
+    },
+    "PORT8-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT8-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT8"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x9", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT8-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT8-CTRL", "device_parent":"MUX1", "virt_parent":"PORT8"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x9", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT9":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT9", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"9"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT9-EEPROM" },
+                { "itf":"control", "dev":"PORT9-CTRL" }
+            ]
+        }
+    },
+    "PORT9-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT9-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT9"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xa", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT9-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT9-CTRL", "device_parent":"MUX2", "virt_parent":"PORT9"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xa", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT10":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT10", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"10"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT10-EEPROM" },
+                { "itf":"control", "dev":"PORT10-CTRL" }
+            ]
+        }
+    },
+    "PORT10-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT10-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT10"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xb", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT10-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT10-CTRL", "device_parent":"MUX2", "virt_parent":"PORT10"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xb", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT11":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT11", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"11"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT11-EEPROM" },
+                { "itf":"control", "dev":"PORT11-CTRL" }
+            ]
+        }
+    },
+    "PORT11-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT11-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT11"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xc", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT11-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT11-CTRL", "device_parent":"MUX2", "virt_parent":"PORT11"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xc", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT12":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT12", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"12"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT12-EEPROM" },
+                { "itf":"control", "dev":"PORT12-CTRL" }
+            ]
+        }
+    },
+    "PORT12-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT12-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT12"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xd", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT12-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT12-CTRL", "device_parent":"MUX2", "virt_parent":"PORT12"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xd", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT13":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT13", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"13"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT13-EEPROM" },
+                { "itf":"control", "dev":"PORT13-CTRL" }
+            ]
+        }
+    },
+    "PORT13-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT13-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT13"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xe", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT13-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT13-CTRL", "device_parent":"MUX2", "virt_parent":"PORT13"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xe", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT14":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT14", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"14"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT14-EEPROM" },
+                { "itf":"control", "dev":"PORT14-CTRL" }
+            ]
+        }
+    },
+    "PORT14-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT14-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT14"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xF", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT14-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT14-CTRL", "device_parent":"MUX2", "virt_parent":"PORT14"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xf", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT15":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT15", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"15"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT15-EEPROM" },
+                { "itf":"control", "dev":"PORT15-CTRL" }
+            ]
+        }
+    },
+    "PORT15-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT15-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT15"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT15-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT15-CTRL", "device_parent":"MUX2", "virt_parent":"PORT15"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x10", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT16":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT16", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"16"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT16-EEPROM" },
+                { "itf":"control", "dev":"PORT16-CTRL" }
+            ]
+        }
+    },
+    "PORT16-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT16-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT16"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT16-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT16-CTRL", "device_parent":"MUX2", "virt_parent":"PORT16"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x11", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT17":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT17", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"17"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT17-EEPROM" },
+                { "itf":"control", "dev":"PORT17-CTRL" }
+            ]
+        }
+    },
+    "PORT17-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT17-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT17"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT17-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT17-CTRL", "device_parent":"MUX3", "virt_parent":"PORT17"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x12", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT18":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT18", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"18"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT18-EEPROM" },
+                { "itf":"control", "dev":"PORT18-CTRL" }
+            ]
+        }
+    },
+    "PORT18-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT18-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT18"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT18-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT18-CTRL", "device_parent":"MUX3", "virt_parent":"PORT18"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x13", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT19":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT19", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"19"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT19-EEPROM" },
+                { "itf":"control", "dev":"PORT19-CTRL" }
+            ]
+        }
+    },
+    "PORT19-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT19-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT19"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT19-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT19-CTRL", "device_parent":"MUX3", "virt_parent":"PORT19"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x14", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT20":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT20", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"20"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT20-EEPROM" },
+                { "itf":"control", "dev":"PORT20-CTRL" }
+            ]
+        }
+    },
+    "PORT20-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT20-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT20"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT20-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT20-CTRL", "device_parent":"MUX3", "virt_parent":"PORT20"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x15", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT21":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT21", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"21"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT21-EEPROM" },
+                { "itf":"control", "dev":"PORT21-CTRL" }
+            ]
+        }
+    },
+    "PORT21-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT21-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT21"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT21-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT21-CTRL", "device_parent":"MUX3", "virt_parent":"PORT21"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x16", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT22":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT22", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"22"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT22-EEPROM" },
+                { "itf":"control", "dev":"PORT22-CTRL" }
+            ]
+        }
+    },
+    "PORT22-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT22-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT22"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT22-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT22-CTRL", "device_parent":"MUX3", "virt_parent":"PORT22"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x17", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT23":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT23", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"23"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT23-EEPROM" },
+                { "itf":"control", "dev":"PORT23-CTRL" }
+            ]
+        }
+    },
+    "PORT23-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT23-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT23"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x18", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT23-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT23-CTRL", "device_parent":"MUX3", "virt_parent":"PORT23"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x18", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT24":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT24", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"24"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT24-EEPROM" },
+                { "itf":"control", "dev":"PORT24-CTRL" }
+            ]
+        }
+    },
+    "PORT24-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT24-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT24"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x19", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT24-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT24-CTRL", "device_parent":"MUX3", "virt_parent":"PORT24"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x19", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT25":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT25", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"25"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT25-EEPROM" },
+                { "itf":"control", "dev":"PORT25-CTRL" }
+            ]
+        }
+    },
+    "PORT25-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT25-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT25"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT25-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT25-CTRL", "device_parent":"MUX4", "virt_parent":"PORT25"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT26":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT26", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"26"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT26-EEPROM" },
+                { "itf":"control", "dev":"PORT26-CTRL" }
+            ]
+        }
+    },
+    "PORT26-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT26-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT26"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT26-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT26-CTRL", "device_parent":"MUX4", "virt_parent":"PORT26"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT27":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT27", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"27"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT27-EEPROM" },
+                { "itf":"control", "dev":"PORT27-CTRL" }
+            ]
+        }
+    },
+    "PORT27-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT27-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT27"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT27-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT27-CTRL", "device_parent":"MUX4", "virt_parent":"PORT27"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT28":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT28", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"28"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT28-EEPROM" },
+                { "itf":"control", "dev":"PORT28-CTRL" }
+            ]
+        }
+    },
+    "PORT28-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT28-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT28"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT28-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT28-CTRL", "device_parent":"MUX4", "virt_parent":"PORT28"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT29":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT29", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"29"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT29-EEPROM" },
+                { "itf":"control", "dev":"PORT29-CTRL" }
+            ]
+        }
+    },
+    "PORT29-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT29-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT29"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT29-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT29-CTRL", "device_parent":"MUX4", "virt_parent":"PORT29"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT30":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT30", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"30"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT30-EEPROM" },
+                { "itf":"control", "dev":"PORT30-CTRL" }
+            ]
+        }
+    },
+    "PORT30-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT30-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT30"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT30-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT30-CTRL", "device_parent":"MUX4", "virt_parent":"PORT30"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT31":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT31", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"31"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT31-EEPROM" },
+                { "itf":"control", "dev":"PORT31-CTRL" }
+            ]
+        }
+    },
+    "PORT31-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT31-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT31"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x20", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT31-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT31-CTRL", "device_parent":"MUX4", "virt_parent":"PORT31"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x20", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT32":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT32", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"32"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT32-EEPROM" },
+                { "itf":"control", "dev":"PORT32-CTRL" }
+            ]
+        }
+    },
+    "PORT32-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT32-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT32"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x21", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT32-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT32-CTRL", "device_parent":"MUX4", "virt_parent":"PORT32"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x21", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT33":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT33", "device_parent":"MUX5"},
+        "dev_attr": { "dev_idx":"33"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT33-EEPROM" },
+                { "itf":"control", "dev":"PORT33-CTRL" }
+            ]
+        }
+    },
+    "PORT33-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT33-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT33"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x22", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT33-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT33-CTRL", "device_parent":"MUX5", "virt_parent":"PORT33"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x22", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x210", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT34":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT34", "device_parent":"MUX5"},
+        "dev_attr": { "dev_idx":"34"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT34-EEPROM" },
+                { "itf":"control", "dev":"PORT34-CTRL" }
+            ]
+        }
+    },
+    "PORT34-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT34-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT34"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x23", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT34-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT34-CTRL", "device_parent":"MUX5", "virt_parent":"PORT34"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x23", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x220", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT35":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT35", "device_parent":"MUX5"},
+        "dev_attr": { "dev_idx":"35"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT35-EEPROM" },
+                { "itf":"control", "dev":"PORT35-CTRL" }
+            ]
+        }
+    },
+    "PORT35-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT35-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT35"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x24", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT35-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT35-CTRL", "device_parent":"MUX5", "virt_parent":"PORT35"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x24", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x230", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT36":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT36", "device_parent":"MUX5"},
+        "dev_attr": { "dev_idx":"36"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT36-EEPROM" },
+                { "itf":"control", "dev":"PORT36-CTRL" }
+            ]
+        }
+    },
+    "PORT36-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT36-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT36"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x25", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT36-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT36-CTRL", "device_parent":"MUX5", "virt_parent":"PORT36"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x25", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x240", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT37":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT37", "device_parent":"MUX5"},
+        "dev_attr": { "dev_idx":"37"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT37-EEPROM" },
+                { "itf":"control", "dev":"PORT37-CTRL" }
+            ]
+        }
+    },
+    "PORT37-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT37-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT37"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x26", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT37-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT37-CTRL", "device_parent":"MUX5", "virt_parent":"PORT37"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x26", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x250", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT38":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT38", "device_parent":"MUX5"},
+        "dev_attr": { "dev_idx":"38"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT38-EEPROM" },
+                { "itf":"control", "dev":"PORT38-CTRL" }
+            ]
+        }
+    },
+    "PORT38-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT38-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT38"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x27", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT38-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT38-CTRL", "device_parent":"MUX5", "virt_parent":"PORT38"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x27", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x260", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT39":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT39", "device_parent":"MUX5"},
+        "dev_attr": { "dev_idx":"39"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT39-EEPROM" },
+                { "itf":"control", "dev":"PORT39-CTRL" }
+            ]
+        }
+    },
+    "PORT39-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT39-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT39"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x28", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT39-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT39-CTRL", "device_parent":"MUX5", "virt_parent":"PORT39"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x28", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x270", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT40":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT40", "device_parent":"MUX5"},
+        "dev_attr": { "dev_idx":"40"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT40-EEPROM" },
+                { "itf":"control", "dev":"PORT40-CTRL" }
+            ]
+        }
+    },
+    "PORT40-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT40-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT40"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x29", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT40-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT40-CTRL", "device_parent":"MUX5", "virt_parent":"PORT40"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x29", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x280", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT41":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT41", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"41"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT41-EEPROM" },
+                { "itf":"control", "dev":"PORT41-CTRL" }
+            ]
+        }
+    },
+    "PORT41-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT41-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT41"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2a", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT41-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT41-CTRL", "device_parent":"MUX6", "virt_parent":"PORT41"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2a", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x290", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT42":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT42", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"42"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT42-EEPROM" },
+                { "itf":"control", "dev":"PORT42-CTRL" }
+            ]
+        }
+    },
+    "PORT42-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT42-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT42"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2b", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT42-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT42-CTRL", "device_parent":"MUX6", "virt_parent":"PORT42"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2b", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2a0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT43":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT43", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"43"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT43-EEPROM" },
+                { "itf":"control", "dev":"PORT43-CTRL" }
+            ]
+        }
+    },
+    "PORT43-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT43-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT43"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2c", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT43-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT43-CTRL", "device_parent":"MUX6", "virt_parent":"PORT43"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2c", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2b0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT44":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT44", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"44"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT44-EEPROM" },
+                { "itf":"control", "dev":"PORT44-CTRL" }
+            ]
+        }
+    },
+    "PORT44-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT44-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT44"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2d", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT44-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT44-CTRL", "device_parent":"MUX6", "virt_parent":"PORT44"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2d", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2c0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT45":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT45", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"45"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT45-EEPROM" },
+                { "itf":"control", "dev":"PORT45-CTRL" }
+            ]
+        }
+    },
+    "PORT45-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT45-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT45"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2e", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT45-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT45-CTRL", "device_parent":"MUX6", "virt_parent":"PORT45"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2e", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2d0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT46":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT46", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"46"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT46-EEPROM" },
+                { "itf":"control", "dev":"PORT46-CTRL" }
+            ]
+        }
+    },
+    "PORT46-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT46-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT46"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2f", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT46-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT46-CTRL", "device_parent":"MUX6", "virt_parent":"PORT46"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2f", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2e0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT47":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT47", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"47"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT47-EEPROM" },
+                { "itf":"control", "dev":"PORT47-CTRL" }
+            ]
+        }
+    },
+    "PORT47-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT47-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT47"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x30", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT47-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT47-CTRL", "device_parent":"MUX6", "virt_parent":"PORT47"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x30", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x2f0", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT48":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT48", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"48"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT48-EEPROM" },
+                { "itf":"control", "dev":"PORT48-CTRL" }
+            ]
+        }
+    },
+    "PORT48-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT48-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT48"},
+        "i2c":
+        {
+           "topo_info": { "parent_bus":"0x31", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT48-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT48-CTRL", "device_parent":"MUX6", "virt_parent":"PORT48"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x31", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x300", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT49":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT49", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"49"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT49-EEPROM" },
+                { "itf":"control", "dev":"PORT49-CTRL" }
+            ]
+        }
+    },
+    "PORT49-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT49-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT49"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x36", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT49-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT49-CTRL", "device_parent":"MUX7", "virt_parent":"PORT49"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x36", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x310", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x310", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x310", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
+
+            ]
+        }
+    },
+	
+    "PORT50":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT50", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"50"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT50-EEPROM" },
+                { "itf":"control", "dev":"PORT50-CTRL" }
+            ]
+        }
+    },
+    "PORT50-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT50-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT50"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x37", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT50-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT50-CTRL", "device_parent":"MUX7", "virt_parent":"PORT50"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x37", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x320", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x320", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x320", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT51":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT51", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"51"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT51-EEPROM" },
+                { "itf":"control", "dev":"PORT51-CTRL" }
+            ]
+        }
+    },
+    "PORT51-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT51-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT51"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x38", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT51-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT51-CTRL", "device_parent":"MUX7", "virt_parent":"PORT51"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x38", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x330", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x330", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x330", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT52":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT52", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"52"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT52-EEPROM" },
+                { "itf":"control", "dev":"PORT52-CTRL" }
+            ]
+        }
+    },
+    "PORT52-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT52-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT52"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x39", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT52-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT52-CTRL", "device_parent":"MUX7", "virt_parent":"PORT52"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x39", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x340", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x340", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x340", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT53":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT53", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"53"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT53-EEPROM" },
+                { "itf":"control", "dev":"PORT53-CTRL" }
+            ]
+        }
+    },
+    "PORT53-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT53-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT53"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x32", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT53-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT53-CTRL", "device_parent":"MUX7", "virt_parent":"PORT53"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x32", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x350", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x350", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x350", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT54":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT54", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"54"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT54-EEPROM" },
+                { "itf":"control", "dev":"PORT54-CTRL" }
+            ]
+        }
+    },
+    "PORT54-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT54-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT54"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x33", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT54-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT54-CTRL", "device_parent":"MUX7", "virt_parent":"PORT54"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x33", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x360", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x360", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x360", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT55":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT55", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"55"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT55-EEPROM" },
+                { "itf":"control", "dev":"PORT55-CTRL" }
+            ]
+        }
+    },
+    "PORT55-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT55-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT55"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x34", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT55-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT55-CTRL", "device_parent":"MUX7", "virt_parent":"PORT55"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x34", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x370", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x370", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x370", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PORT56":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT56", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"56"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT56-EEPROM" },
+                { "itf":"control", "dev":"PORT56-CTRL" }
+            ]
+        }
+    },
+    "PORT56-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT56-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT56"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x35", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT56-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT56-CTRL", "device_parent":"MUX7", "virt_parent":"PORT56"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x35", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1004", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x380", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x380", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x380", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
+            ]
+        }
+    },
+	
+    "PSU1":
+    { 
+        "dev_info": { "device_type":"PSU", "device_name":"PSU1", "device_parent":"MUX8"},
+        "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"pmbus", "dev":"PSU1-PMBUS"}
+      
+            ]
+        }
+    },
+      
+    "PSU1-PMBUS":
+    { 
+        "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU1-PMBUS", "device_parent":"MUX8", "virt_parent":"PSU1"},
+        "i2c":
+        {
+            "topo_info":{ "parent_bus":"0x3a", "dev_addr":"0x5a", "dev_type":"psu_pmbus"},
+            "attr_list":
+            [
+                {"attr_name":"psu_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x08", "attr_cmpval":"0x00", "attr_len":"1"},
+                {"attr_name":"psu_power_good", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x02", "attr_cmpval":"0x02", "attr_len":"1"},
+                {"attr_name":"psu_model_name", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"},
+                {"attr_name":"psu_serial_num", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"14"},
+                {"attr_name":"psu_mfr_id", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"7"},
+                {"attr_name":"psu_fan_dir", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"},
+                {"attr_name":"psu_p_out", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_out", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_i_out", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_p_in", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x97", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_in", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_i_in", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_temp1_input", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x8e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_out_max", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_out_min", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_p_out_max", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
+            ]
+        }
+    },
+
+    "PSU2":
+    {
+        "dev_info": { "device_type":"PSU", "device_name":"PSU2", "device_parent":"MUX8"},
+        "dev_attr": { "dev_idx":"2", "num_psu_fans": "1"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"pmbus", "dev":"PSU2-PMBUS"}
+     
+            ]
+        }
+    },
+     
+    "PSU2-PMBUS":
+    {
+        "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU2-PMBUS", "device_parent":"MUX8", "virt_parent":"PSU2"},
+        "i2c":
+        {
+            "topo_info":{ "parent_bus":"0x3b", "dev_addr":"0x5b", "dev_type":"psu_pmbus"},
+            "attr_list":
+            [
+                {"attr_name":"psu_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x04", "attr_cmpval":"0x00", "attr_len":"1"},
+                {"attr_name":"psu_power_good", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x01", "attr_cmpval":"0x01", "attr_len":"1"},
+                {"attr_name":"psu_model_name", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"},
+                {"attr_name":"psu_serial_num", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"14"},
+                {"attr_name":"psu_mfr_id", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"7"},
+                {"attr_name":"psu_fan_dir", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"},
+                {"attr_name":"psu_p_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_i_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_p_in", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x97", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_in", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_i_in", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_temp1_input", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_out_max", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_out_min", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_p_out_max", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
+             ]
+        }
+    },
+
+    "FAN-CTRL":
+    {
+        "dev_info": { "device_type":"FAN", "device_name":"FAN-CTRL", "device_parent":"FPGAPCIE0"},
+        "i2c": {
+            "topo_info": { "parent_bus":"0x69", "dev_addr":"0x16", "dev_type":"fan_cpld"},
+            "dev_attr":  { "num_fantrays":"4"},
+            "attr_list":
+            [
+                { "attr_name":"fan1_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb4", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan2_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb4", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan3_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xba", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan4_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xba", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan5_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc6", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan6_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc6", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan7_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xcc", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan8_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xcc", "attr_mask":"0x01", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan1_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb4", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"fan2_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb4", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"fan3_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xba", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"fan4_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xba", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"fan5_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc6", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"fan6_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc6", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"fan7_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xcc", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"fan8_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xcc", "attr_mask":"0x02", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"fan1_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb0", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0},
+                { "attr_name":"fan2_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb1", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0},
+                { "attr_name":"fan3_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb6", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0},
+                { "attr_name":"fan4_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb7", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0},
+                { "attr_name":"fan5_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc2", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0},
+                { "attr_name":"fan6_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc3", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0},
+                { "attr_name":"fan7_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc8", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0},
+                { "attr_name":"fan8_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc9", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0},
+                { "attr_name":"fan1_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb2", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan2_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb2", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan3_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb8", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan4_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xb8", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan5_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc4", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan6_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xc4", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan7_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xca", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan8_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0xca", "attr_mask":"0xff", "attr_cmpval":"0x0", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "TEMP1":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP1", "device_parent":"FPGAPCIE0"},
+        "dev_attr": {"display_name":"Base_Temp_U5"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4d", "dev_type":"lm75"},
+            "attr_list":
+            [
+                {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                {"attr_name": "temp1_max_hyst"},
+                {"attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "TEMP2":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP2", "device_parent":"FPGAPCIE0"},
+        "dev_attr": {"display_name":"Base_Temp_U56"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4e", "dev_type":"lm75"},
+            "attr_list":
+            [
+                {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                {"attr_name": "temp1_max_hyst"},
+                {"attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "TEMP3":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP3", "device_parent":"FPGAPCIE0"},
+        "dev_attr": {"display_name":"Switch_Temp_U31"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4c", "dev_type":"lm75"},
+            "attr_list":
+            [
+                {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                {"attr_name": "temp1_max_hyst"},
+                {"attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "TEMP4":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP4", "device_parent":"FPGAPCIE0"},
+        "dev_attr": {"display_name":"Switch_Temp_U30"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x49", "dev_type":"lm75"},
+            "attr_list":
+            [
+                {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                {"attr_name": "temp1_max_hyst"},
+                {"attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "TEMP5":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP5", "device_parent":"FPGAPCIE0"},
+        "dev_attr": {"display_name":"Switch_Temp_U28"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4b", "dev_type":"lm75"},
+            "attr_list":
+            [
+                {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                {"attr_name": "temp1_max_hyst"},
+                {"attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "TEMP6":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP6", "device_parent":"FPGAPCIE0"},
+        "dev_attr": {"display_name":"Switch_Temp_U29"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4a", "dev_type":"lm75"},
+            "attr_list":
+            [
+                {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                {"attr_name": "temp1_max_hyst"},
+                {"attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "TEMP7":
+    {    
+        "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP7", "device_parent":"FPGAPCIE0"},
+        "dev_attr": {"display_name":"VDD_CORE_Temp"},
+        "i2c":
+        {    
+            "topo_info": { "parent_bus":"0x6c", "dev_addr":"0x7a", "dev_type":"mp2975"},
+            "attr_list":
+            [
+                {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                {"attr_name": "temp1_max_hyst"},
+                {"attr_name": "temp1_input"}
+            ]
+        }    
+    },   
+    "TEMP8":
+    {    
+        "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP8", "device_parent":"FPGAPCIE0"},
+        "dev_attr": {"display_name":"VDD_ANLG_Temp"},
+        "i2c":
+        {    
+            "topo_info": { "parent_bus":"0x6c", "dev_addr":"0x70", "dev_type":"mp2975"},
+            "attr_list":
+            [
+                {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                {"attr_name": "temp1_max_hyst"},
+                {"attr_name": "temp1_input"}
+            ]
+	}
+    },    
+    "SYS_LED":
+    {                                                                                                                                                                                                                                
+        "dev_info": {"device_type":"LED", "device_name":"SYS_LED"},
+        "dev_attr": {"index":"0"},
+        "i2c": {
+            "attr_list":
+            [    
+                {"attr_name":"green", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"green", "value":"0x10", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"},
+                {"attr_name":"amber", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"amber", "value":"0x20", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"},
+                {"attr_name":"green_blink", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"green_blink", "value":"0x02", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"},
+                {"attr_name":"off", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"off", "value":"0x33", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"}
+            ]    
+        }
+    },   
+    "FANTRAY1_LED":
+    {            
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
+        "dev_attr": { "index":"0"},
+        "i2c" : {
+            "attr_list":
+            [
+                {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xb3"},
+                {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xb3"},
+                {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xb3"}
+            ]
+        }    
+    },           
+    "FANTRAY2_LED":
+    {            
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
+        "dev_attr": { "index":"1"},
+        "i2c" : {
+            "attr_list":
+            [
+                {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xb9"},
+                {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xb9"},
+                {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xb9"}
+            ]
+        }    
+    },           
+    "FANTRAY3_LED":
+    {            
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
+        "dev_attr": { "index":"2"},
+        "i2c" : {
+            "attr_list":
+            [
+                {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xc5"},
+                {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xc5"},
+                {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xc5"}
+            ]
+        }    
+    },           
+    "FANTRAY4_LED":
+    {            
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
+        "dev_attr": { "index":"3"},
+        "i2c" : {
+            "attr_list":
+            [
+                {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xcb"},
+                {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xcb"},
+                {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_B","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xcb"}
+            ]
+        }    
+    }    
+}
diff --git a/device/celestica/x86_64-cel_ds2000-r0/pddf_support b/device/celestica/x86_64-cel_ds2000-r0/pddf_support
new file mode 100644
index 000000000000..e69de29bb2d1
diff --git a/device/celestica/x86_64-cel_ds2000-r0/platform.json b/device/celestica/x86_64-cel_ds2000-r0/platform.json
new file mode 100644
index 000000000000..876067eaaba3
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/platform.json
@@ -0,0 +1,404 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1",
+            "lanes": "29",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth1/1"]
+            }
+        },
+        "Ethernet1": {
+            "index": "2",
+            "lanes": "30",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth2/1"]
+            }
+        },
+        "Ethernet2": {
+            "index": "3",
+            "lanes": "31",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth3/1"]
+            }
+        },
+        "Ethernet3": {
+            "index": "4",
+            "lanes": "32",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth4/1"]
+            }
+        },
+        "Ethernet4": {
+            "index": "5",
+            "lanes": "33",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth5/1"]
+            }
+        },
+        "Ethernet5": {
+            "index": "6",
+            "lanes": "34",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth6/1"]
+            }
+        },
+        "Ethernet6": {
+            "index": "7",
+            "lanes": "35",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth7/1"]
+            }
+        },
+        "Ethernet7": {
+            "index": "8",
+            "lanes": "36",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth8/1"]
+            }
+        },
+        "Ethernet8": {
+            "index": "9",
+            "lanes": "37",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth9/1"]
+            }
+        },
+        "Ethernet9": {
+            "index": "10",
+            "lanes": "38",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth10/1"]
+            }
+        },
+        "Ethernet10": {
+            "index": "11",
+            "lanes": "39",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth11/1"]
+            }
+        },
+        "Ethernet11": {
+            "index": "12",
+            "lanes": "40",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth12/1"]
+            }
+        },
+        "Ethernet12": {
+            "index": "13",
+            "lanes": "49",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth13/1"]
+            }
+        },
+        "Ethernet13": {
+            "index": "14",
+            "lanes": "50",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth14/1"]
+            }
+        },
+        "Ethernet14": {
+            "index": "15",
+            "lanes": "51",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth15/1"]
+            }
+        },
+        "Ethernet15": {
+            "index": "16",
+            "lanes": "52",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth16/1"]
+            }
+        },
+        "Ethernet16": {
+            "index": "17",
+            "lanes": "53",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth17/1"]
+            }
+        },
+        "Ethernet17": {
+            "index": "18",
+            "lanes": "54",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth18/1"]
+            }
+        },
+        "Ethernet18": {
+            "index": "19",
+            "lanes": "55",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth19/1"]
+            }
+        },
+        "Ethernet19": {
+            "index": "20",
+            "lanes": "56",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth20/1"]
+            }
+        },
+        "Ethernet20": {
+            "index": "21",
+            "lanes": "57",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth21/1"]
+            }
+        },
+        "Ethernet21": {
+            "index": "22",
+            "lanes": "58",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth22/1"]
+            }
+        },
+        "Ethernet22": {
+            "index": "23",
+            "lanes": "59",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth23/1"]
+            }
+        },
+        "Ethernet23": {
+            "index": "24",
+            "lanes": "60",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth24/1"]
+            }
+        },
+        "Ethernet24": {
+            "index": "25",
+            "lanes": "9",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth25/1"]
+            }
+        },
+        "Ethernet25": {
+            "index": "26",
+            "lanes": "10",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth26/1"]
+            }
+        },
+        "Ethernet26": {
+            "index": "27",
+            "lanes": "11",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth27/1"]
+            }
+        },
+        "Ethernet27": {
+            "index": "28",
+            "lanes": "12",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth28/1"]
+            }
+        },
+        "Ethernet28": {
+            "index": "29",
+            "lanes": "13",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth29/1"]
+            }
+        },
+        "Ethernet29": {
+            "index": "30",
+            "lanes": "14",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth30/1"]
+            }
+        },
+        "Ethernet30": {
+            "index": "31",
+            "lanes": "15",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth31/1"]
+            }
+        },
+        "Ethernet31": {
+            "index": "32",
+            "lanes": "16",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth32/1"]
+            }
+        },
+        "Ethernet32": {
+            "index": "33",
+            "lanes": "17",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth33/1"]
+            }
+        },
+        "Ethernet33": {
+            "index": "34",
+            "lanes": "18",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth34/1"]
+            }
+        },
+        "Ethernet34": {
+            "index": "35",
+            "lanes": "19",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth35/1"]
+            }
+        },
+        "Ethernet35": {
+            "index": "36",
+            "lanes": "20",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth36/1"]
+            }
+        },
+        "Ethernet36": {
+            "index": "37",
+            "lanes": "61",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth37/1"]
+            }
+        },
+        "Ethernet37": {
+            "index": "38",
+            "lanes": "62",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth38/1"]
+            }
+        },
+        "Ethernet38": {
+            "index": "39",
+            "lanes": "63",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth39/1"]
+            }
+        },
+        "Ethernet39": {
+            "index": "40",
+            "lanes": "64",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth40/1"]
+            }
+        },
+        "Ethernet40": {
+            "index": "41",
+            "lanes": "65",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth41/1"]
+            }
+        },
+        "Ethernet41": {
+            "index": "42",
+            "lanes": "66",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth42/1"]
+            }
+        },
+        "Ethernet42": {
+            "index": "43",
+            "lanes": "67",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth43/1"]
+            }
+        },
+        "Ethernet43": {
+            "index": "44",
+            "lanes": "68",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth44/1"]
+            }
+        },
+        "Ethernet44": {
+            "index": "45",
+            "lanes": "69",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth45/1"]
+            }
+        },
+        "Ethernet45": {
+            "index": "46",
+            "lanes": "70",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth46/1"]
+            }
+        },
+        "Ethernet46": {
+            "index": "47",
+            "lanes": "71",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth47/1"]
+            }
+        },
+        "Ethernet47": {
+            "index": "48",
+            "lanes": "72",
+            "breakout_modes": {
+                "1x25G[10G]": ["Eth48/1"]
+            }
+        },
+        "Ethernet48": {
+            "index": "49,49,49,49",
+            "lanes": "41,42,43,44",
+            "breakout_modes": {
+                "1x100G" : ["Eth49/1"],
+                "1x40G": ["Eth49/1"]
+            }
+        },
+        "Ethernet52": {
+            "index": "50,50,50,50",
+            "lanes": "45,46,47,48",
+            "breakout_modes": {
+                "1x100G" : ["Eth50/1"],
+                "1x40G": ["Eth50/1"]
+            }
+        },
+        "Ethernet56": {
+            "index": "51,51,51,51",
+            "lanes": "73,74,75,76",
+            "breakout_modes": {
+                "1x100G" : ["Eth51/1"],
+                "1x40G": ["Eth51/1"]
+            }
+        },
+        "Ethernet60": {
+            "index": "52,52,52,52",
+            "lanes": "77,78,79,80",
+            "breakout_modes": {
+                "1x100G" : ["Eth52/1"],
+                "1x40G": ["Eth52/1"]
+            }
+        },
+        "Ethernet64": {
+            "index": "53,53,53,53",
+            "lanes": "1,2,3,4",
+            "breakout_modes": {
+                "1x100G" : ["Eth53/1"],
+                "1x40G": ["Eth53/1"]
+            }
+        },
+        "Ethernet68": {
+            "index": "54,54,54,54",
+            "lanes": "21,22,23,24",
+            "breakout_modes": {
+                "1x100G" : ["Eth54/1"],
+                "1x40G": ["Eth54/1"]
+            }
+        },
+        "Ethernet72": {
+            "index": "55,55,55,55",
+            "lanes": "5,6,7,8",
+            "breakout_modes": {
+                "1x100G" : ["Eth55/1"],
+                "1x40G": ["Eth55/1"]
+            }
+        },
+        "Ethernet76": {
+            "index": "56,56,56,56",
+            "lanes": "25,26,27,28",
+            "breakout_modes": {
+                "1x100G" : ["Eth56/1"],
+                "1x40G": ["Eth56/1"]
+            }
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_ds2000-r0/platform_asic b/device/celestica/x86_64-cel_ds2000-r0/platform_asic
new file mode 100644
index 000000000000..960467652765
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/celestica/x86_64-cel_ds2000-r0/platform_components-bmc.json b/device/celestica/x86_64-cel_ds2000-r0/platform_components-bmc.json
new file mode 100644
index 000000000000..f2afe7f6b7d5
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/platform_components-bmc.json
@@ -0,0 +1,18 @@
+{
+    "chassis": {
+        "DS2000": {
+            "component": {
+                "BIOS": {},
+                "ONIE": {},
+                "BMC": {},
+                "FPGA": {},
+                "CPLD COMe": {},
+                "CPLD BASE": {},
+                "CPLD SW1": {},
+                "CPLD SW2": {},
+                "ASIC PCIe": {},
+                "SSD": {}
+            }
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_ds2000-r0/platform_components-nonbmc.json b/device/celestica/x86_64-cel_ds2000-r0/platform_components-nonbmc.json
new file mode 100644
index 000000000000..6acc9a21ba5c
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/platform_components-nonbmc.json
@@ -0,0 +1,15 @@
+{
+    "chassis": {
+        "Questone2a_v2": {
+            "component": {
+                "ONIE": {},
+                "ASIC_PCIe": {},
+                "SSD": {},
+                "BIOS": {},
+                "CPLD BASE": {},
+                "CPLD SW1": {},
+                "CPLD SW2": {}
+            }
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_ds2000-r0/platform_reboot b/device/celestica/x86_64-cel_ds2000-r0/platform_reboot
new file mode 100644
index 000000000000..d3d10c5b4324
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/platform_reboot
@@ -0,0 +1,3 @@
+#!/bin/bash
+
+/usr/local/bin/ds2000_platform_shutdown.sh system
diff --git a/device/celestica/x86_64-cel_ds2000-r0/plugins/eeprom.py b/device/celestica/x86_64-cel_ds2000-r0/plugins/eeprom.py
new file mode 100644
index 000000000000..22895539823f
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/plugins/eeprom.py
@@ -0,0 +1,23 @@
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica DX010
+#
+# Platform and model specific eeprom subclass, inherits from the base class,
+# and provides the followings:
+# - the eeprom format definition
+# - specific encoder/decoder if there is special need
+#############################################################################
+
+try:
+    from sonic_eeprom import eeprom_tlvinfo
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+
+class board(eeprom_tlvinfo.TlvInfoDecoder):
+
+    def __init__(self, name, path, cpld_root, ro):
+        self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0056/eeprom"
+        super(board, self).__init__(self.eeprom_path, 0, '', True)
+
diff --git a/device/celestica/x86_64-cel_ds2000-r0/plugins/pcie.yaml b/device/celestica/x86_64-cel_ds2000-r0/plugins/pcie.yaml
new file mode 100644
index 000000000000..2074bf094d56
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/plugins/pcie.yaml
@@ -0,0 +1,22 @@
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 19c2
+  name: 'SATA controller: Intel Corporation DNV SATA Controller 1 (rev 11)'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: b870
+  name: 'Ethernet controller: Broadcom Limited Device b870 (rev 01)'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: '7021'
+  name: 'Memory controller: Xilinx Corporation Device 7021'
+- bus: '04'
+  dev: '00'
+  fn: '0'
+  id: '1533'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
+    03)'
+
diff --git a/device/celestica/x86_64-cel_ds2000-r0/plugins/sfputil.py b/device/celestica/x86_64-cel_ds2000-r0/plugins/sfputil.py
new file mode 100755
index 000000000000..03882c65ac00
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/plugins/sfputil.py
@@ -0,0 +1,312 @@
+#!/usr/bin/env python
+#
+# Platform-specific SFP transceiver interface for SONiC
+#
+
+try:
+    import time
+    from sonic_sfp.sfputilbase import SfpUtilBase
+    import struct
+except ImportError as e:
+    raise ImportError("%s - required module not found" % str(e))
+
+
+class SfpUtil(SfpUtilBase):
+    """Platform-specific SfpUtil class"""
+
+    PORT_START = 0
+    PORT_END = 55
+    QSFP_PORT_START = 48
+    QSFP_PORT_END = 55
+    __xcvr_presence = {}
+
+    EEPROM_OFFSET = 9
+    PORT_INFO_PATH = '/sys/class/questone2_fpga'
+
+    _port_name = ""
+    _port_to_eeprom_mapping = {}
+    _port_to_i2cbus_mapping = {}
+
+    @property
+    def port_start(self):
+        return self.PORT_START
+
+    @property
+    def port_end(self):
+        return self.PORT_END
+
+    @property
+    def qsfp_ports(self):
+        return range(self.QSFP_PORT_START, self.QSFP_PORT_END + 1)
+
+    @property
+    def port_to_eeprom_mapping(self):
+        return self._port_to_eeprom_mapping
+
+    @property
+    def port_to_i2cbus_mapping(self):
+        return self._port_to_i2cbus_mapping
+
+    def get_port_name(self, port_num):
+        if port_num in self.qsfp_ports:
+            self._port_name = "QSFP" + str(port_num - self.QSFP_PORT_START + 1)
+        else:
+            self._port_name = "SFP" + str(port_num + 1)
+        return self._port_name
+
+    def get_eeprom_dom_raw(self, port_num):
+        if port_num in self.qsfp_ports:
+            # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw
+            return None
+        else:
+            # Read dom eeprom at addr 0x51
+            return self._read_eeprom_devid(port_num, self.DOM_EEPROM_ADDR, 256)
+
+    def __init__(self):
+        # Override port_to_eeprom_mapping for class initialization
+        eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'
+
+        for x in range(self.PORT_START, self.PORT_END+1):
+            # port_index = 0 , it's path = /sys/bus/i2c/devices/i2c-10/10-0050/eeprom
+            # port_index = 55, it's path = /sys/bus/i2c/devices/i2c-65/65-0050/eeprom
+            # so the real offset is 10
+            self.port_to_i2cbus_mapping[x] = (x + 1 + self.EEPROM_OFFSET)
+            self.port_to_eeprom_mapping[x] = eeprom_path.format(
+                x + 1 + self.EEPROM_OFFSET)
+        SfpUtilBase.__init__(self)
+        for x in range(self.PORT_START, self.PORT_END+1):
+            self.__xcvr_presence[x] = self.get_presence(x)
+
+    def _do_write_file(self, file_handle, offset, value):
+        file_handle.seek(offset)
+        file_handle.write(hex(value))
+        file_handle.close()
+
+    def get_presence(self, port_num):
+
+        # Check for invalid port_num
+        if port_num not in range(self.port_start, self.port_end + 1):
+            return False
+
+        # Get path for access port presence status
+        port_name = self.get_port_name(port_num)
+        sysfs_filename = "qsfp_modprs" if port_num in self.qsfp_ports else "sfp_modabs"
+        reg_path = "/".join([self.PORT_INFO_PATH, port_name, sysfs_filename])
+
+        # Read status
+        try:
+            reg_file = open(reg_path)
+            content = reg_file.readline().rstrip()
+            reg_value = int(content)
+        except IOError as e:
+            print "Error: unable to open file: %s" % str(e)
+            return False
+
+        # Module present is active low
+        if reg_value == 0:
+            return True
+
+        return False
+
+    def get_low_power_mode(self, port_num):
+        if not self.get_presence(port_num):
+            return None
+
+        eeprom_raw = []
+        eeprom_raw.append("0x00")
+
+        lpmode = False
+        eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'.format(port_num + 1 + self.EEPROM_OFFSET)
+        if port_num >= 49:
+            try:
+                with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+                    eeprom.seek(93)
+                    raw = eeprom.read(1)
+                    eeprom.close()
+            except Exception as err:
+                return None
+
+            if len(raw) == 0:
+                return None
+            eeprom_raw[0] = hex(ord(raw[0]))[2:].zfill(2)
+
+            power_data = int(eeprom_raw[0], 16)
+            # if lpmod, power-override bit and power-set bit are both setted
+            #               bit0                bit1
+            lpmode = power_data & 0x03 != 0
+        else:
+            return None
+        
+        return lpmode
+ 
+    def set_low_power_mode(self, port_num, lpmode):
+        # Check for invalid QSFP port_num
+        if port_num not in self.qsfp_ports:
+            return False
+	
+	if not self.get_presence(port_num):
+            return False
+        eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'.format(port_num + 1 + self.EEPROM_OFFSET)
+        try:
+            reg_file = open(eeprom_path, mode="wb+")
+        except IOError as e:
+            print "Error: unable to open file: %s" % str(e)
+            return False
+
+	reg_file.seek(93)
+        power_raw = reg_file.read(1)
+        if power_raw is None:
+            return False
+        power_data = int(hex(ord(power_raw))[2:].zfill(2), 16)
+	
+        if lpmode:
+            power_data |= 0x03
+        else:
+            power_data &= ~(0x03)
+        
+        reg_file.seek(93)
+        reg_file.write(struct.pack('B', int(power_data)))
+        reg_file.close()
+
+        return True
+
+    def reset(self, port_num):
+        # Check for invalid QSFP port_num
+        if port_num not in self.qsfp_ports:
+            return False
+
+        try:
+            port_name = self.get_port_name(port_num)
+            reg_file = open(
+                "/".join([self.PORT_INFO_PATH, port_name, "qsfp_reset"]), "w")
+        except IOError as e:
+            print "Error: unable to open file: %s" % str(e)
+            return False
+
+        # Convert our register value back to a hex string and write back
+        reg_file.seek(0)
+        reg_file.write(hex(0))
+        reg_file.close()
+
+        # Sleep 1 second to allow it to settle
+        time.sleep(1)
+
+        # Flip the bit back high and write back to the register to take port out of reset
+        try:
+            reg_file = open(
+                "/".join([self.PORT_INFO_PATH, port_name, "qsfp_reset"]), "w")
+        except IOError as e:
+            print "Error: unable to open file: %s" % str(e)
+            return False
+
+        reg_file.seek(0)
+        reg_file.write(hex(1))
+        reg_file.close()
+
+        return True
+
+    def get_transceiver_change_event(self, timeout=0):
+        """
+        To detect if any transceiver change event happens.
+        """
+        start_ms = time.time() * 1000
+        xcvr_change_event_dict = {}
+        event = False
+
+        while True:
+            time.sleep(0.5)
+            for port in range(self.port_start, self.port_end+1):
+                curr_presence = self.get_presence(port)
+                if curr_presence != self.__xcvr_presence[port]:
+                    if curr_presence is True:
+                        xcvr_change_event_dict[str(port)] = '1'
+                        self.__xcvr_presence[port] = True
+                    elif curr_presence is False:
+                        xcvr_change_event_dict[str(port)] = '0'
+                        self.__xcvr_presence[port] = False
+                    event = True
+
+            if event is True:
+                return True, xcvr_change_event_dict
+
+            if timeout:
+                now_ms = time.time() * 1000
+                if (now_ms - start_ms >= timeout):
+                    return True, xcvr_change_event_dict
+
+    def tx_disable(self, port_num, disable):
+        """
+        @param port_num index of physical port
+        @param disable, True  -- disable port tx signal
+                        False -- enable port tx signal
+        @return True when operation success, False on failure.
+        """
+        TX_DISABLE_BYTE_OFFSET = 86
+        if port_num not in range(self.port_start, self.port_end + 1) or type(disable) != bool:
+            return False
+
+        # QSFP, set eeprom to disable tx
+        if port_num in self.qsfp_ports:
+            presence = self.get_presence(port_num)
+            if not presence:
+                return True
+
+            disable = b'\x0f' if disable else b'\x00'
+            # open eeprom
+            try:
+                with open(self.port_to_eeprom_mapping[port_num], mode="wb", buffering=0) as sysfsfile:
+                    sysfsfile.seek(TX_DISABLE_BYTE_OFFSET)
+                    sysfsfile.write(bytearray(disable))
+            except IOError:
+                return False
+
+        # SFP, set tx_disable pin
+        else:
+            try:
+                disable = hex(1) if disable else hex(0)
+                port_name = self.get_port_name(port_num)
+                reg_file = open(
+                    "/".join([self.PORT_INFO_PATH, port_name, "sfp_txdisable"]), "w")
+                reg_file.write(disable)
+                reg_file.close()
+            except IOError as e:
+                print "Error: unable to open file: %s" % str(e)
+                return False
+
+        return True
+
+    def reset_all(self):
+        result = True
+        port_sysfs_path = []
+        for port in range(self.port_start, self.port_end+1):
+            if port not in self.qsfp_ports:
+                continue
+
+            presence = self.get_presence(port)
+            if not presence:
+                continue
+
+            try:
+                port_name = self.get_port_name(port)
+                sysfs_path = "/".join([self.PORT_INFO_PATH,
+                                       port_name, "qsfp_reset"])
+                reg_file = open(sysfs_path, "w")
+                port_sysfs_path.append(sysfs_path)
+            except IOError as e:
+                result = False
+                continue
+
+            self._do_write_file(reg_file, 0, 0)
+
+        time.sleep(1)
+
+        for sysfs_path in port_sysfs_path:
+            try:
+                reg_file = open(sysfs_path, "w")
+            except IOError as e:
+                result = False
+                continue
+
+            self._do_write_file(reg_file, 0, 1)
+
+        return result
diff --git a/device/celestica/x86_64-cel_ds2000-r0/pmon_daemon_control.json b/device/celestica/x86_64-cel_ds2000-r0/pmon_daemon_control.json
new file mode 100644
index 000000000000..94592fa8cebc
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/pmon_daemon_control.json
@@ -0,0 +1,3 @@
+{
+    "skip_ledd": true
+}
diff --git a/device/celestica/x86_64-cel_ds2000-r0/system_health_monitoring_config.json b/device/celestica/x86_64-cel_ds2000-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000000..5661a0d21396
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds2000-r0/system_health_monitoring_config.json
@@ -0,0 +1,16 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu.temperature",
+        "PSU 1 Fan 1",
+        "PSU 2 Fan 1"
+    ],
+    "user_defined_checkers": [],
+    "polling_interval": 60,
+    "led_color": {
+        "fault": "amber",
+        "normal": "green",
+        "booting": "alternate_blink_4hz"
+    }
+}
diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers.json.j2 b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers.json.j2
new file mode 100644
index 000000000000..0b1cb2c541b6
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_def.j2 b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_def.j2
new file mode 100644
index 000000000000..740cfdf79e96
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_def.j2
@@ -0,0 +1,46 @@
+{%- set default_cable = '300m' %}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {% for port_idx in range(0,32) %}
+        {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
+    {% endfor %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "xoff": "4625920",
+            "size": "12766208",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_lossless_pool": {
+            "size": "12766208",
+            "type": "egress",
+            "mode": "static"
+        },
+        "egress_lossy_pool": {
+            "size": "7326924",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"[BUFFER_POOL|ingress_lossless_pool]",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"0",
+            "static_th":"12766208"
+        },
+        "egress_lossy_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"1518",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_t0.j2 b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_t0.j2
new file mode 100644
index 000000000000..44fcf21887a6
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_t0.j2
@@ -0,0 +1,45 @@
+{%- set default_cable = '300m' %}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {% for port_idx in range(0,32) %}
+        {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
+    {% endfor %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "12766208",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_lossless_pool": {
+            "size": "12766208",
+            "type": "egress",
+            "mode": "static"
+        },
+        "egress_lossy_pool": {
+            "size": "7326924",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"[BUFFER_POOL|ingress_lossless_pool]",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"0",
+            "static_th":"12766208"
+        },
+        "egress_lossy_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"1518",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_t1.j2 b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_t1.j2
new file mode 100644
index 000000000000..740cfdf79e96
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/buffers_defaults_t1.j2
@@ -0,0 +1,46 @@
+{%- set default_cable = '300m' %}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {% for port_idx in range(0,32) %}
+        {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
+    {% endfor %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "xoff": "4625920",
+            "size": "12766208",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_lossless_pool": {
+            "size": "12766208",
+            "type": "egress",
+            "mode": "static"
+        },
+        "egress_lossy_pool": {
+            "size": "7326924",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"[BUFFER_POOL|ingress_lossless_pool]",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"0",
+            "static_th":"12766208"
+        },
+        "egress_lossy_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"1518",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/hwsku.json b/device/celestica/x86_64-cel_ds3000-r0/DS3000/hwsku.json
new file mode 100644
index 000000000000..28e50b8c0385
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/hwsku.json
@@ -0,0 +1,169 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet4": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet12": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet20": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet28": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet36": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet44": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet52": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet60": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet68": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet76": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet84": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet92": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet100": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet108": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet116": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet124": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x10G",
+            "autoneg": "off",
+            "fec": "none"
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/l2/config b/device/celestica/x86_64-cel_ds3000-r0/DS3000/l2/config
new file mode 100644
index 000000000000..45a7b84d5032
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/l2/config
@@ -0,0 +1,3 @@
+l2_mem_entries=139264
+l3_mem_entries=8192
+l3_alpm_enable=0
diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/l3/config b/device/celestica/x86_64-cel_ds3000-r0/DS3000/l3/config
new file mode 100644
index 000000000000..3467c1b39716
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/l3/config
@@ -0,0 +1,3 @@
+l2_mem_entries=40000
+l3_mem_entries=40000
+l3_alpm_enable=2
diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/pg_profile_lookup.ini b/device/celestica/x86_64-cel_ds3000-r0/DS3000/pg_profile_lookup.ini
new file mode 100644
index 000000000000..9f2eacb6fc42
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/pg_profile_lookup.ini
@@ -0,0 +1,17 @@
+# PG lossless profiles.
+# speed cable size      xon     xoff   threshold xon_offset
+  10000  5m   56368     18432   55120  -3        2496
+  25000  5m   56368     18432   55120  -3        2496
+  40000  5m   56368     18432   55120  -3        2496
+  50000  5m   56368     18432   55120  -3        2496
+ 100000  5m   56368     18432   55120  -3        2496
+  10000  40m  56368     18432   55120  -3        2496
+  25000  40m  56368     18432   55120  -3        2496
+  40000  40m  56368     18432   55120  -3        2496
+  50000  40m  56368     18432   55120  -3        2496
+ 100000  40m  56368     18432   55120  -3        2496
+  10000  300m 56368     18432   55120  -3        2496
+  25000  300m 56368     18432   55120  -3        2496
+  40000  300m 56368     18432   55120  -3        2496
+  50000  300m 56368     18432   55120  -3        2496
+ 100000  300m 56368     18432   55120  -3        2496
diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/port_config.ini b/device/celestica/x86_64-cel_ds3000-r0/DS3000/port_config.ini
new file mode 100644
index 000000000000..8cd1c833a929
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/port_config.ini
@@ -0,0 +1,34 @@
+# name       lanes               alias    index   speed     valid_speeds
+Ethernet0    1,2,3,4             Eth1/1    1       100000    100000,40000
+Ethernet4    5,6,7,8             Eth2/1    2       100000    100000,40000
+Ethernet8    9,10,11,12          Eth3/1    3       100000    100000,40000
+Ethernet12   13,14,15,16         Eth4/1    4       100000    100000,40000
+Ethernet16   17,18,19,20         Eth5/1    5       100000    100000,40000
+Ethernet20   21,22,23,24         Eth6/1    6       100000    100000,40000
+Ethernet24   25,26,27,28         Eth7/1    7       100000    100000,40000
+Ethernet28   29,30,31,32         Eth8/1    8       100000    100000,40000
+Ethernet32   33,34,35,36         Eth9/1    9       100000    100000,40000
+Ethernet36   37,38,39,40         Eth10/1   10      100000    100000,40000
+Ethernet40   41,42,43,44         Eth11/1   11      100000    100000,40000
+Ethernet44   45,46,47,48         Eth12/1   12      100000    100000,40000
+Ethernet48   49,50,51,52         Eth13/1   13      100000    100000,40000
+Ethernet52   53,54,55,56         Eth14/1   14      100000    100000,40000
+Ethernet56   57,58,59,60         Eth15/1   15      100000    100000,40000
+Ethernet60   61,62,63,64         Eth16/1   16      100000    100000,40000
+Ethernet64   65,66,67,68         Eth17/1   17      100000    100000,40000
+Ethernet68   69,70,71,72         Eth18/1   18      100000    100000,40000
+Ethernet72   73,74,75,76         Eth19/1   19      100000    100000,40000
+Ethernet76   77,78,79,80         Eth20/1   20      100000    100000,40000
+Ethernet80   81,82,83,84         Eth21/1   21      100000    100000,40000
+Ethernet84   85,86,87,88         Eth22/1   22      100000    100000,40000
+Ethernet88   89,90,91,92         Eth23/1   23      100000    100000,40000
+Ethernet92   93,94,95,96         Eth24/1   24      100000    100000,40000
+Ethernet96   97,98,99,100        Eth25/1   25      100000    100000,40000
+Ethernet100  101,102,103,104     Eth26/1   26      100000    100000,40000
+Ethernet104  105,106,107,108     Eth27/1   27      100000    100000,40000
+Ethernet108  109,110,111,112     Eth28/1   28      100000    100000,40000
+Ethernet112  113,114,115,116     Eth29/1   29      100000    100000,40000
+Ethernet116  117,118,119,120     Eth30/1   30      100000    100000,40000
+Ethernet120  121,122,123,124     Eth31/1   31      100000    100000,40000
+Ethernet124  125,126,127,128     Eth32/1   32      100000    100000,40000
+Ethernet128  129                 Eth33/1   33      10000     10000,1000
diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/qos.json.j2 b/device/celestica/x86_64-cel_ds3000-r0/DS3000/qos.json.j2
new file mode 100644
index 000000000000..3e548325ea30
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/sai.profile b/device/celestica/x86_64-cel_ds3000-r0/DS3000/sai.profile
new file mode 100644
index 000000000000..992e6ba1f49a
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/sai.profile
@@ -0,0 +1,2 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-ds3000-32x100G.config.bcm
+SAI_NUM_ECMP_MEMBERS=64
diff --git a/device/celestica/x86_64-cel_ds3000-r0/DS3000/td3-ds3000-32x100G.config.bcm b/device/celestica/x86_64-cel_ds3000-r0/DS3000/td3-ds3000-32x100G.config.bcm
new file mode 100644
index 000000000000..8987f360b2b0
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/DS3000/td3-ds3000-32x100G.config.bcm
@@ -0,0 +1,545 @@
+help_cli_enable=1
+ifp_inports_support_enable=1
+ipv6_lpm_128b_enable=0x1
+l2_mem_entries=32768
+l2xmsg_mode=1
+l3_max_ecmp_mode=1
+l3_mem_entries=32768
+l3_alpm_ipv6_128b_bkt_rsvd=1
+l3_alpm_enable=2
+#lpm_scaling_enable=1
+max_vp_lags=0
+#mem_cache_enable=0
+memlist_enable=1
+reglist_enable=1
+#scache_filename=/tmp/scache
+schan_intr_enable=0
+stable_size=0x5500000
+tdma_timeout_usec=3000000
+miim_intr_enable=0
+module_64ports=1
+oversubscribe_mode=1
+parity_enable=0
+serdes_lane_config_dfe=on
+#serdes_fec_enable=1
+serdes_if_type_ce=14
+pbmp_gport_stack.0=0x0000000000000000000000000000000000000000000000000000000000000000
+pbmp_xport_xe=0x3ffffffffffffffffffffffffffffffffe
+port_flex_enable=1
+fpem_mem_entries=32768
+
+#Tunnels
+bcm_tunnel_term_compatible_mode=1
+sai_tunnel_support=1
+use_all_splithorizon_groups=1
+
+#RIOT Enable
+riot_enable=1
+riot_overlay_l3_intf_mem_size=8192
+riot_overlay_l3_egress_mem_size=32768
+l3_ecmp_levels=2
+riot_overlay_ecmp_resilient_hash_size=16384
+flow_init_mode=1
+
+ptp_ts_pll_fref=50000000
+ptp_bs_fref_0=50000000
+ptp_bs_fref_1=50000000
+phy_an_c73=1
+
+portmap_1=1:100
+portmap_5=5:100
+portmap_9=9:100
+portmap_13=13:100
+portmap_17=17:100
+portmap_21=21:100
+portmap_25=25:100
+portmap_29=29:100
+portmap_33=33:100
+portmap_37=37:100
+portmap_41=41:100
+portmap_45=45:100
+portmap_49=49:100
+portmap_53=53:100
+portmap_57=57:100
+portmap_61=61:100
+portmap_67=65:100
+portmap_71=69:100
+portmap_75=73:100
+portmap_79=77:100
+portmap_83=81:100
+portmap_87=85:100
+portmap_91=89:100
+portmap_95=93:100
+portmap_99=97:100
+portmap_103=101:100
+portmap_107=105:100
+portmap_111=109:100
+portmap_115=113:100
+portmap_119=117:100
+portmap_123=121:100
+portmap_127=125:100
+portmap_66=129:10:m
+#portmap_130=128:10:m
+
+#wc0 lane swap
+phy_chain_tx_lane_map_physical{1.0}=0x0132
+phy_chain_rx_lane_map_physical{1.0}=0x3210
+
+#wc1 lane swap
+phy_chain_tx_lane_map_physical{5.0}=0x2301
+phy_chain_rx_lane_map_physical{5.0}=0x2031
+
+#wc2 lane swap
+phy_chain_tx_lane_map_physical{9.0}=0x0132
+phy_chain_rx_lane_map_physical{9.0}=0x3210
+
+#wc3 lane swap
+phy_chain_tx_lane_map_physical{13.0}=0x3201
+phy_chain_rx_lane_map_physical{13.0}=0x2031
+
+#wc4 lane swap
+phy_chain_tx_lane_map_physical{17.0}=0x0123
+phy_chain_rx_lane_map_physical{17.0}=0x3210
+
+#wc5 lane swap
+phy_chain_tx_lane_map_physical{21.0}=0x2301
+phy_chain_rx_lane_map_physical{21.0}=0x2031
+
+#wc6 lane swap
+phy_chain_tx_lane_map_physical{25.0}=0x0123
+phy_chain_rx_lane_map_physical{25.0}=0x3210
+
+#wc7 lane swap
+phy_chain_tx_lane_map_physical{29.0}=0x3201
+phy_chain_rx_lane_map_physical{29.0}=0x2031
+
+#wc8 lane swap
+phy_chain_tx_lane_map_physical{33.0}=0x0213
+phy_chain_rx_lane_map_physical{33.0}=0x1302
+
+#wc9 lane swap
+phy_chain_tx_lane_map_physical{37.0}=0x1302
+phy_chain_rx_lane_map_physical{37.0}=0x2031
+
+#wc10 lane swap
+phy_chain_tx_lane_map_physical{41.0}=0x0231
+phy_chain_rx_lane_map_physical{41.0}=0x3120
+
+#wc11 lane swap
+phy_chain_tx_lane_map_physical{45.0}=0x1302
+phy_chain_rx_lane_map_physical{45.0}=0x2031
+
+#wc12 lane swap
+phy_chain_tx_lane_map_physical{49.0}=0x2103
+phy_chain_rx_lane_map_physical{49.0}=0x3120
+
+#wc13 lane swap
+phy_chain_tx_lane_map_physical{53.0}=0x2301
+phy_chain_rx_lane_map_physical{53.0}=0x2031
+
+#wc14 lane swap
+phy_chain_tx_lane_map_physical{57.0}=0x0123
+phy_chain_rx_lane_map_physical{57.0}=0x2301
+
+#wc15 lane swap
+phy_chain_tx_lane_map_physical{61.0}=0x3210
+phy_chain_rx_lane_map_physical{61.0}=0x1032
+
+#wc16 lane swap
+phy_chain_tx_lane_map_physical{65.0}=0x3210
+phy_chain_rx_lane_map_physical{65.0}=0x1023
+
+#wc17 lane swap
+phy_chain_tx_lane_map_physical{69.0}=0x0123
+phy_chain_rx_lane_map_physical{69.0}=0x1302
+
+#wc18 lane swap
+phy_chain_tx_lane_map_physical{73.0}=0x2301
+phy_chain_rx_lane_map_physical{73.0}=0x1032
+
+#wc19 lane swap
+phy_chain_tx_lane_map_physical{77.0}=0x2013
+phy_chain_rx_lane_map_physical{77.0}=0x3120
+
+#wc20 lane swap
+phy_chain_tx_lane_map_physical{81.0}=0x1302
+phy_chain_rx_lane_map_physical{81.0}=0x2031
+
+#wc21 lane swap
+phy_chain_tx_lane_map_physical{85.0}=0x0123
+phy_chain_rx_lane_map_physical{85.0}=0x2130
+
+#wc22 lane swap
+phy_chain_tx_lane_map_physical{89.0}=0x2301
+phy_chain_rx_lane_map_physical{89.0}=0x2031
+
+#wc23 lane swap
+phy_chain_tx_lane_map_physical{93.0}=0x0312
+phy_chain_rx_lane_map_physical{93.0}=0x2310
+
+#wc24 lane swap
+phy_chain_tx_lane_map_physical{97.0}=0x2301
+phy_chain_rx_lane_map_physical{97.0}=0x1032
+
+#wc25 lane swap
+phy_chain_tx_lane_map_physical{101.0}=0x0123
+phy_chain_rx_lane_map_physical{101.0}=0x3210
+
+#wc26 lane swap
+phy_chain_tx_lane_map_physical{105.0}=0x2301
+phy_chain_rx_lane_map_physical{105.0}=0x1032
+
+#wc27 lane swap
+phy_chain_tx_lane_map_physical{109.0}=0x0123
+phy_chain_rx_lane_map_physical{109.0}=0x3210
+
+#wc28 lane swap
+phy_chain_tx_lane_map_physical{113.0}=0x2301
+phy_chain_rx_lane_map_physical{113.0}=0x2031
+
+#wc29 lane swap
+phy_chain_tx_lane_map_physical{117.0}=0x0123
+phy_chain_rx_lane_map_physical{117.0}=0x3210
+
+#wc30 lane swap
+phy_chain_tx_lane_map_physical{121.0}=0x2301
+phy_chain_rx_lane_map_physical{121.0}=0x1032
+
+#wc31 lane swap
+phy_chain_tx_lane_map_physical{125.0}=0x0123
+phy_chain_rx_lane_map_physical{125.0}=0x3210
+
+#MC lane swap
+phy_chain_tx_lane_map_physical{129.0}=0x3210
+phy_chain_rx_lane_map_physical{129.0}=0x3210
+
+
+#wc0 P/N flip
+phy_chain_tx_polarity_flip_physical{1.0}=0x0
+phy_chain_rx_polarity_flip_physical{1.0}=0x0
+phy_chain_tx_polarity_flip_physical{2.0}=0x0
+phy_chain_rx_polarity_flip_physical{2.0}=0x1
+phy_chain_tx_polarity_flip_physical{3.0}=0x0
+phy_chain_rx_polarity_flip_physical{3.0}=0x0
+phy_chain_tx_polarity_flip_physical{4.0}=0x1
+phy_chain_rx_polarity_flip_physical{4.0}=0x1
+
+#wc1 P/N flip
+phy_chain_tx_polarity_flip_physical{5.0}=0x0
+phy_chain_rx_polarity_flip_physical{5.0}=0x0
+phy_chain_tx_polarity_flip_physical{6.0}=0x1
+phy_chain_rx_polarity_flip_physical{6.0}=0x1
+phy_chain_tx_polarity_flip_physical{7.0}=0x0
+phy_chain_rx_polarity_flip_physical{7.0}=0x1
+phy_chain_tx_polarity_flip_physical{8.0}=0x1
+phy_chain_rx_polarity_flip_physical{8.0}=0x1
+
+#wc2 P/N flip
+phy_chain_tx_polarity_flip_physical{9.0}=0x0
+phy_chain_rx_polarity_flip_physical{9.0}=0x0
+phy_chain_tx_polarity_flip_physical{10.0}=0x0
+phy_chain_rx_polarity_flip_physical{10.0}=0x1
+phy_chain_tx_polarity_flip_physical{11.0}=0x0
+phy_chain_rx_polarity_flip_physical{11.0}=0x0
+phy_chain_tx_polarity_flip_physical{12.0}=0x1
+phy_chain_rx_polarity_flip_physical{12.0}=0x1
+
+#wc3 P/N flip
+phy_chain_tx_polarity_flip_physical{13.0}=0x0
+phy_chain_rx_polarity_flip_physical{13.0}=0x0
+phy_chain_tx_polarity_flip_physical{14.0}=0x1
+phy_chain_rx_polarity_flip_physical{14.0}=0x1
+phy_chain_tx_polarity_flip_physical{15.0}=0x0
+phy_chain_rx_polarity_flip_physical{15.0}=0x1
+phy_chain_tx_polarity_flip_physical{16.0}=0x0
+phy_chain_rx_polarity_flip_physical{16.0}=0x1
+
+#wc4 P/N flip
+phy_chain_tx_polarity_flip_physical{17.0}=0x0
+phy_chain_rx_polarity_flip_physical{17.0}=0x0
+phy_chain_tx_polarity_flip_physical{18.0}=0x1
+phy_chain_rx_polarity_flip_physical{18.0}=0x1
+phy_chain_tx_polarity_flip_physical{19.0}=0x0
+phy_chain_rx_polarity_flip_physical{19.0}=0x0
+phy_chain_tx_polarity_flip_physical{20.0}=0x1
+phy_chain_rx_polarity_flip_physical{20.0}=0x1
+
+#wc5 P/N flip
+phy_chain_tx_polarity_flip_physical{21.0}=0x0
+phy_chain_rx_polarity_flip_physical{21.0}=0x0
+phy_chain_tx_polarity_flip_physical{22.0}=0x1
+phy_chain_rx_polarity_flip_physical{22.0}=0x1
+phy_chain_tx_polarity_flip_physical{23.0}=0x0
+phy_chain_rx_polarity_flip_physical{23.0}=0x1
+phy_chain_tx_polarity_flip_physical{24.0}=0x1
+phy_chain_rx_polarity_flip_physical{24.0}=0x1
+
+#wc6 P/N flip
+phy_chain_tx_polarity_flip_physical{25.0}=0x0
+phy_chain_rx_polarity_flip_physical{25.0}=0x1
+phy_chain_tx_polarity_flip_physical{26.0}=0x1
+phy_chain_rx_polarity_flip_physical{26.0}=0x0
+phy_chain_tx_polarity_flip_physical{27.0}=0x0
+phy_chain_rx_polarity_flip_physical{27.0}=0x1
+phy_chain_tx_polarity_flip_physical{28.0}=0x1
+phy_chain_rx_polarity_flip_physical{28.0}=0x0
+
+#wc7 P/N flip
+phy_chain_tx_polarity_flip_physical{29.0}=0x1
+phy_chain_rx_polarity_flip_physical{29.0}=0x1
+phy_chain_tx_polarity_flip_physical{30.0}=0x1
+phy_chain_rx_polarity_flip_physical{30.0}=0x0
+phy_chain_tx_polarity_flip_physical{31.0}=0x0
+phy_chain_rx_polarity_flip_physical{31.0}=0x0
+phy_chain_tx_polarity_flip_physical{32.0}=0x0
+phy_chain_rx_polarity_flip_physical{32.0}=0x0
+
+#wc8 P/N flip
+phy_chain_tx_polarity_flip_physical{33.0}=0x1
+phy_chain_rx_polarity_flip_physical{33.0}=0x1
+phy_chain_tx_polarity_flip_physical{34.0}=0x0
+phy_chain_rx_polarity_flip_physical{34.0}=0x0
+phy_chain_tx_polarity_flip_physical{35.0}=0x0
+phy_chain_rx_polarity_flip_physical{35.0}=0x0
+phy_chain_tx_polarity_flip_physical{36.0}=0x1
+phy_chain_rx_polarity_flip_physical{36.0}=0x0
+
+#wc9 P/N flip
+phy_chain_tx_polarity_flip_physical{37.0}=0x1
+phy_chain_rx_polarity_flip_physical{37.0}=0x1
+phy_chain_tx_polarity_flip_physical{38.0}=0x1
+phy_chain_rx_polarity_flip_physical{38.0}=0x0
+phy_chain_tx_polarity_flip_physical{39.0}=0x1
+phy_chain_rx_polarity_flip_physical{39.0}=0x0
+phy_chain_tx_polarity_flip_physical{40.0}=0x0
+phy_chain_rx_polarity_flip_physical{40.0}=0x1
+
+#wc10 P/N flip
+phy_chain_tx_polarity_flip_physical{41.0}=0x1
+phy_chain_rx_polarity_flip_physical{41.0}=0x1
+phy_chain_tx_polarity_flip_physical{42.0}=0x0
+phy_chain_rx_polarity_flip_physical{42.0}=0x1
+phy_chain_tx_polarity_flip_physical{43.0}=0x1
+phy_chain_rx_polarity_flip_physical{43.0}=0x0
+phy_chain_tx_polarity_flip_physical{44.0}=0x1
+phy_chain_rx_polarity_flip_physical{44.0}=0x1
+
+#wc11 P/N flip
+phy_chain_tx_polarity_flip_physical{45.0}=0x1
+phy_chain_rx_polarity_flip_physical{45.0}=0x0
+phy_chain_tx_polarity_flip_physical{46.0}=0x1
+phy_chain_rx_polarity_flip_physical{46.0}=0x0
+phy_chain_tx_polarity_flip_physical{47.0}=0x1
+phy_chain_rx_polarity_flip_physical{47.0}=0x1
+phy_chain_tx_polarity_flip_physical{48.0}=0x0
+phy_chain_rx_polarity_flip_physical{48.0}=0x1
+
+#wc12 P/N flip
+phy_chain_tx_polarity_flip_physical{49.0}=0x1
+phy_chain_rx_polarity_flip_physical{49.0}=0x0
+phy_chain_tx_polarity_flip_physical{50.0}=0x1
+phy_chain_rx_polarity_flip_physical{50.0}=0x0
+phy_chain_tx_polarity_flip_physical{51.0}=0x0
+phy_chain_rx_polarity_flip_physical{51.0}=0x1
+phy_chain_tx_polarity_flip_physical{52.0}=0x1
+phy_chain_rx_polarity_flip_physical{52.0}=0x1
+
+#wc13 P/N flip
+phy_chain_tx_polarity_flip_physical{53.0}=0x0
+phy_chain_rx_polarity_flip_physical{53.0}=0x0
+phy_chain_tx_polarity_flip_physical{54.0}=0x1
+phy_chain_rx_polarity_flip_physical{54.0}=0x1
+phy_chain_tx_polarity_flip_physical{55.0}=0x0
+phy_chain_rx_polarity_flip_physical{55.0}=0x1
+phy_chain_tx_polarity_flip_physical{56.0}=0x1
+phy_chain_rx_polarity_flip_physical{56.0}=0x1
+
+#wc14 P/N flip
+phy_chain_tx_polarity_flip_physical{57.0}=0x1
+phy_chain_rx_polarity_flip_physical{57.0}=0x0
+phy_chain_tx_polarity_flip_physical{58.0}=0x1
+phy_chain_rx_polarity_flip_physical{58.0}=0x1
+phy_chain_tx_polarity_flip_physical{59.0}=0x0
+phy_chain_rx_polarity_flip_physical{59.0}=0x0
+phy_chain_tx_polarity_flip_physical{60.0}=0x1
+phy_chain_rx_polarity_flip_physical{60.0}=0x1
+
+#wc15 P/N flip
+phy_chain_tx_polarity_flip_physical{61.0}=0x0
+phy_chain_rx_polarity_flip_physical{61.0}=0x1
+phy_chain_tx_polarity_flip_physical{62.0}=0x1
+phy_chain_rx_polarity_flip_physical{62.0}=0x0
+phy_chain_tx_polarity_flip_physical{63.0}=0x0
+phy_chain_rx_polarity_flip_physical{63.0}=0x1
+phy_chain_tx_polarity_flip_physical{64.0}=0x0
+phy_chain_rx_polarity_flip_physical{64.0}=0x0
+
+#wc16 P/N flip
+phy_chain_tx_polarity_flip_physical{65.0}=0x1
+phy_chain_rx_polarity_flip_physical{65.0}=0x0
+phy_chain_tx_polarity_flip_physical{66.0}=0x0
+phy_chain_rx_polarity_flip_physical{66.0}=0x0
+phy_chain_tx_polarity_flip_physical{67.0}=0x1
+phy_chain_rx_polarity_flip_physical{67.0}=0x1
+phy_chain_tx_polarity_flip_physical{68.0}=0x0
+phy_chain_rx_polarity_flip_physical{68.0}=0x0
+
+#wc17 P/N flip
+phy_chain_tx_polarity_flip_physical{69.0}=0x1
+phy_chain_rx_polarity_flip_physical{69.0}=0x1
+phy_chain_tx_polarity_flip_physical{70.0}=0x0
+phy_chain_rx_polarity_flip_physical{70.0}=0x0
+phy_chain_tx_polarity_flip_physical{71.0}=0x1
+phy_chain_rx_polarity_flip_physical{71.0}=0x0
+phy_chain_tx_polarity_flip_physical{72.0}=0x0
+phy_chain_rx_polarity_flip_physical{72.0}=0x0
+
+#wc18 P/N flip
+phy_chain_tx_polarity_flip_physical{73.0}=0x0
+phy_chain_rx_polarity_flip_physical{73.0}=0x1
+phy_chain_tx_polarity_flip_physical{74.0}=0x1
+phy_chain_rx_polarity_flip_physical{74.0}=0x0
+phy_chain_tx_polarity_flip_physical{75.0}=0x0
+phy_chain_rx_polarity_flip_physical{75.0}=0x1
+phy_chain_tx_polarity_flip_physical{76.0}=0x1
+phy_chain_rx_polarity_flip_physical{76.0}=0x0
+
+#wc19 P/N flip
+phy_chain_tx_polarity_flip_physical{77.0}=0x0
+phy_chain_rx_polarity_flip_physical{77.0}=0x0
+phy_chain_tx_polarity_flip_physical{78.0}=0x0
+phy_chain_rx_polarity_flip_physical{78.0}=0x0
+phy_chain_tx_polarity_flip_physical{79.0}=0x1
+phy_chain_rx_polarity_flip_physical{79.0}=0x1
+phy_chain_tx_polarity_flip_physical{80.0}=0x1
+phy_chain_rx_polarity_flip_physical{80.0}=0x1
+
+#wc20 P/N flip
+phy_chain_tx_polarity_flip_physical{81.0}=0x0
+phy_chain_rx_polarity_flip_physical{81.0}=0x0
+phy_chain_tx_polarity_flip_physical{82.0}=0x0
+phy_chain_rx_polarity_flip_physical{82.0}=0x0
+phy_chain_tx_polarity_flip_physical{83.0}=0x1
+phy_chain_rx_polarity_flip_physical{83.0}=0x1
+phy_chain_tx_polarity_flip_physical{84.0}=0x1
+phy_chain_rx_polarity_flip_physical{84.0}=0x0
+
+#wc21 P/N flip
+phy_chain_tx_polarity_flip_physical{85.0}=0x1
+phy_chain_rx_polarity_flip_physical{85.0}=0x1
+phy_chain_tx_polarity_flip_physical{86.0}=0x0
+phy_chain_rx_polarity_flip_physical{86.0}=0x1
+phy_chain_tx_polarity_flip_physical{87.0}=0x1
+phy_chain_rx_polarity_flip_physical{87.0}=0x0
+phy_chain_tx_polarity_flip_physical{88.0}=0x0
+phy_chain_rx_polarity_flip_physical{88.0}=0x0
+
+#wc22 P/N flip
+phy_chain_tx_polarity_flip_physical{89.0}=0x1
+phy_chain_rx_polarity_flip_physical{89.0}=0x0
+phy_chain_tx_polarity_flip_physical{90.0}=0x0
+phy_chain_rx_polarity_flip_physical{90.0}=0x0
+phy_chain_tx_polarity_flip_physical{91.0}=0x1
+phy_chain_rx_polarity_flip_physical{91.0}=0x1
+phy_chain_tx_polarity_flip_physical{92.0}=0x0
+phy_chain_rx_polarity_flip_physical{92.0}=0x1
+
+#wc23 P/N flip
+phy_chain_tx_polarity_flip_physical{93.0}=0x1
+phy_chain_rx_polarity_flip_physical{93.0}=0x1
+phy_chain_tx_polarity_flip_physical{94.0}=0x1
+phy_chain_rx_polarity_flip_physical{94.0}=0x1
+phy_chain_tx_polarity_flip_physical{95.0}=0x0
+phy_chain_rx_polarity_flip_physical{95.0}=0x0
+phy_chain_tx_polarity_flip_physical{96.0}=0x0
+phy_chain_rx_polarity_flip_physical{96.0}=0x1
+
+#wc24 P/N flip
+phy_chain_tx_polarity_flip_physical{97.0}=0x1
+phy_chain_rx_polarity_flip_physical{97.0}=0x1
+phy_chain_tx_polarity_flip_physical{98.0}=0x0
+phy_chain_rx_polarity_flip_physical{98.0}=0x0
+phy_chain_tx_polarity_flip_physical{99.0}=0x1
+phy_chain_rx_polarity_flip_physical{99.0}=0x1
+phy_chain_tx_polarity_flip_physical{100.0}=0x0
+phy_chain_rx_polarity_flip_physical{100.0}=0x0
+
+#wc25 P/N flip
+phy_chain_tx_polarity_flip_physical{101.0}=0x1
+phy_chain_rx_polarity_flip_physical{101.0}=0x0
+phy_chain_tx_polarity_flip_physical{102.0}=0x0
+phy_chain_rx_polarity_flip_physical{102.0}=0x1
+phy_chain_tx_polarity_flip_physical{103.0}=0x1
+phy_chain_rx_polarity_flip_physical{103.0}=0x0
+phy_chain_tx_polarity_flip_physical{104.0}=0x0
+phy_chain_rx_polarity_flip_physical{104.0}=0x0
+
+#wc26 P/N flip
+phy_chain_tx_polarity_flip_physical{105.0}=0x1
+phy_chain_rx_polarity_flip_physical{105.0}=0x0
+phy_chain_tx_polarity_flip_physical{106.0}=0x0
+phy_chain_rx_polarity_flip_physical{106.0}=0x1
+phy_chain_tx_polarity_flip_physical{107.0}=0x1
+phy_chain_rx_polarity_flip_physical{107.0}=0x0
+phy_chain_tx_polarity_flip_physical{108.0}=0x0
+phy_chain_rx_polarity_flip_physical{108.0}=0x1
+
+#wc27 P/N flip
+phy_chain_tx_polarity_flip_physical{109.0}=0x1
+phy_chain_rx_polarity_flip_physical{109.0}=0x1
+phy_chain_tx_polarity_flip_physical{110.0}=0x0
+phy_chain_rx_polarity_flip_physical{110.0}=0x0
+phy_chain_tx_polarity_flip_physical{111.0}=0x1
+phy_chain_rx_polarity_flip_physical{111.0}=0x1
+phy_chain_tx_polarity_flip_physical{112.0}=0x0
+phy_chain_rx_polarity_flip_physical{112.0}=0x0
+
+#wc28 P/N flip
+phy_chain_tx_polarity_flip_physical{113.0}=0x1
+phy_chain_rx_polarity_flip_physical{113.0}=0x1
+phy_chain_tx_polarity_flip_physical{114.0}=0x0
+phy_chain_rx_polarity_flip_physical{114.0}=0x0
+phy_chain_tx_polarity_flip_physical{115.0}=0x1
+phy_chain_rx_polarity_flip_physical{115.0}=0x0
+phy_chain_tx_polarity_flip_physical{116.0}=0x0
+phy_chain_rx_polarity_flip_physical{116.0}=0x0
+
+#wc29 P/N flip
+phy_chain_tx_polarity_flip_physical{117.0}=0x1
+phy_chain_rx_polarity_flip_physical{117.0}=0x1
+phy_chain_tx_polarity_flip_physical{118.0}=0x0
+phy_chain_rx_polarity_flip_physical{118.0}=0x0
+phy_chain_tx_polarity_flip_physical{119.0}=0x1
+phy_chain_rx_polarity_flip_physical{119.0}=0x1
+phy_chain_tx_polarity_flip_physical{120.0}=0x0
+phy_chain_rx_polarity_flip_physical{120.0}=0x0
+
+#wc30 P/N flip
+phy_chain_tx_polarity_flip_physical{121.0}=0x1
+phy_chain_rx_polarity_flip_physical{121.0}=0x0
+phy_chain_tx_polarity_flip_physical{122.0}=0x0
+phy_chain_rx_polarity_flip_physical{122.0}=0x1
+phy_chain_tx_polarity_flip_physical{123.0}=0x1
+phy_chain_rx_polarity_flip_physical{123.0}=0x0
+phy_chain_tx_polarity_flip_physical{124.0}=0x0
+phy_chain_rx_polarity_flip_physical{124.0}=0x1
+
+#wc31 P/N flip
+phy_chain_tx_polarity_flip_physical{125.0}=0x1
+phy_chain_rx_polarity_flip_physical{125.0}=0x1
+phy_chain_tx_polarity_flip_physical{126.0}=0x0
+phy_chain_rx_polarity_flip_physical{126.0}=0x0
+phy_chain_tx_polarity_flip_physical{127.0}=0x1
+phy_chain_rx_polarity_flip_physical{127.0}=0x1
+phy_chain_tx_polarity_flip_physical{128.0}=0x0
+phy_chain_rx_polarity_flip_physical{128.0}=0x0
+
+#MC P/N flip
+phy_chain_tx_polarity_flip_physical{129.0}=0x0
+phy_chain_rx_polarity_flip_physical{129.0}=0x0
+phy_chain_tx_polarity_flip_physical{130.0}=0x0
+phy_chain_rx_polarity_flip_physical{130.0}=0x0
+phy_chain_tx_polarity_flip_physical{131.0}=0x0
+phy_chain_rx_polarity_flip_physical{131.0}=0x0
+phy_chain_tx_polarity_flip_physical{132.0}=0x0
+phy_chain_rx_polarity_flip_physical{132.0}=0x0
diff --git a/device/celestica/x86_64-cel_ds3000-r0/custom_led.bin b/device/celestica/x86_64-cel_ds3000-r0/custom_led.bin
new file mode 100644
index 0000000000000000000000000000000000000000..3fb048fce6b5e36050a06ecf8b7198dce531197d
GIT binary patch
literal 130
zcmeycl~I{djaijhg-MCaVTv330|(>To8sm6GdN~c1u;U|O&OOY7_EdVj2u=;P1?km
zaWb06iTOgJ8-pgp1to?CZI&Aj+K+BJSkK<{@VR5gsbG-47VU>O85IvEFeo!8Ix9IP
dI$AX)9!#`1WK424bWCbWI-GPk`EbgIy#OM^FH8Uc

literal 0
HcmV?d00001

diff --git a/device/celestica/x86_64-cel_ds3000-r0/default_sku b/device/celestica/x86_64-cel_ds3000-r0/default_sku
new file mode 100644
index 000000000000..dbfb3ae8e6b9
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/default_sku
@@ -0,0 +1 @@
+DS3000 t1
diff --git a/device/celestica/x86_64-cel_ds3000-r0/installer.conf b/device/celestica/x86_64-cel_ds3000-r0/installer.conf
new file mode 100644
index 000000000000..6e8098123edb
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/installer.conf
@@ -0,0 +1,4 @@
+CONSOLE_DEV=0
+CONSOLE_PORT=0xe060
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_iommu=off noirqdebug earlycon=uart8250,mmio,0xdf37b000"
diff --git a/device/celestica/x86_64-cel_belgite-r0/led_proc_init.soc b/device/celestica/x86_64-cel_ds3000-r0/led_proc_init.soc
similarity index 71%
rename from device/celestica/x86_64-cel_belgite-r0/led_proc_init.soc
rename to device/celestica/x86_64-cel_ds3000-r0/led_proc_init.soc
index 57ee7fedaf2b..90aa9ba607ac 100644
--- a/device/celestica/x86_64-cel_belgite-r0/led_proc_init.soc
+++ b/device/celestica/x86_64-cel_ds3000-r0/led_proc_init.soc
@@ -1,3 +1,2 @@
 m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
-led auto on
-led start
+led auto on; led start
diff --git a/device/celestica/x86_64-cel_ds3000-r0/media_settings.json b/device/celestica/x86_64-cel_ds3000-r0/media_settings.json
new file mode 100644
index 000000000000..ded54074ab7e
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/media_settings.json
@@ -0,0 +1,408 @@
+{
+    "GLOBAL_MEDIA_SETTINGS": {
+        "1-32": {
+            "25000-copper-1.0M": {
+                "preemphasis": {
+                    "lane0": "0x16440a",
+                    "lane1": "0x16440a",
+                    "lane2": "0x16440a",
+                    "lane3": "0x16440a"
+                }
+            },
+            "25000-copper-2.0M": {
+                "preemphasis": {
+                    "lane0": "0x18420a",
+                    "lane1": "0x18420a",
+                    "lane2": "0x18420a",
+                    "lane3": "0x18420a"
+                }
+            },
+            "25000-copper-3.0M": {
+                "preemphasis": {
+                    "lane0": "0x1a400a",
+                    "lane1": "0x1a400a",
+                    "lane2": "0x1a400a",
+                    "lane3": "0x1a400a"
+                }
+            },
+            "25000-copper-5.0M": {
+                "preemphasis": {
+                    "lane0": "0x1a400a",
+                    "lane1": "0x1a400a",
+                    "lane2": "0x1a400a",
+                    "lane3": "0x1a400a"
+                }
+            },
+            "10000-copper-1.0M": {
+                "preemphasis": {
+                    "lane0": "0xc2808",
+                    "lane1": "0xc2808",
+                    "lane2": "0xc2808",
+                    "lane3": "0xc2808"
+                }
+            },
+            "10000-copper-3.0M": {
+                "preemphasis": {
+                    "lane0": "0xc2808",
+                    "lane1": "0xc2808",
+                    "lane2": "0xc2808",
+                    "lane3": "0xc2808"
+                }
+            },
+            "10000-copper-5.0M": {
+                "preemphasis": {
+                    "lane0": "0xc2808",
+                    "lane1": "0xc2808",
+                    "lane2": "0xc2808",
+                    "lane3": "0xc2808"
+                }
+            },
+            "10000-copper-7.0M": {
+                "preemphasis": {
+                    "lane0": "0xd2708",
+                    "lane1": "0xd2708",
+                    "lane2": "0xd2708",
+                    "lane3": "0xd2708"
+                }
+            },
+            "10000-optical": {
+                "preemphasis": {
+                    "lane0": "0xa4200",
+                    "lane1": "0xa4200",
+                    "lane2": "0xa4200",
+                    "lane3": "0xa4200"
+                }
+            },
+            "Default": {
+                "preemphasis": {
+                    "lane0": "0x14410a",
+                    "lane1": "0x14410a",
+                    "lane2": "0x14410a",
+                    "lane3": "0x14410a"
+                }
+            }
+        }
+    },
+    "PORT_MEDIA_SETTINGS": {
+        "1": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x164608",
+                    "lane1": "0x164608",
+                    "lane2": "0x164608",
+                    "lane3": "0x164608"
+                }
+            }
+        },
+        "2": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x164608",
+                    "lane1": "0x164608",
+                    "lane2": "0x164608",
+                    "lane3": "0x164608"
+                }
+            }
+        },
+        "3": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x164608",
+                    "lane1": "0x164608",
+                    "lane2": "0x164608",
+                    "lane3": "0x164608"
+                }
+            }
+        },
+        "4": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x134908",
+                    "lane1": "0x134908",
+                    "lane2": "0x134908",
+                    "lane3": "0x134908"
+                }
+            }
+        },
+        "5": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x134908",
+                    "lane1": "0x134908",
+                    "lane2": "0x134908",
+                    "lane3": "0x134908"
+                }
+            }
+        },
+        "6": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x134908",
+                    "lane1": "0x134908",
+                    "lane2": "0x134908",
+                    "lane3": "0x134908"
+                }
+            }
+        },
+        "7": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x124a08",
+                    "lane1": "0x124a08",
+                    "lane2": "0x124a08",
+                    "lane3": "0x124a08"
+                }
+            }
+        },
+        "8": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x124a08",
+                    "lane1": "0x124a08",
+                    "lane2": "0x124a08",
+                    "lane3": "0x124a08"
+                }
+            }
+        },
+        "9": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x114b08",
+                    "lane1": "0x114b08",
+                    "lane2": "0x114b08",
+                    "lane3": "0x114b08"
+                }
+            }
+        },
+        "10": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x114b08",
+                    "lane1": "0x114b08",
+                    "lane2": "0x114b08",
+                    "lane3": "0x114b08"
+                }
+            }
+        },
+        "11": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0xf4d08",
+                    "lane1": "0xf4d08",
+                    "lane2": "0xf4d08",
+                    "lane3": "0xf4d08"
+                }
+            }
+        },
+        "12": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0xf4d08",
+                    "lane1": "0xf4d08",
+                    "lane2": "0xf4d08",
+                    "lane3": "0xf4d08"
+                }
+            }
+        },
+        "13": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0xd4f08",
+                    "lane1": "0xd4f08",
+                    "lane2": "0xd4f08",
+                    "lane3": "0xd4f08"
+                }
+            }
+        },
+        "14": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0xd4f08",
+                    "lane1": "0xd4f08",
+                    "lane2": "0xd4f08",
+                    "lane3": "0xd4f08"
+                }
+            }
+        },
+        "15": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0xd4f08",
+                    "lane1": "0xd4f08",
+                    "lane2": "0xd4f08",
+                    "lane3": "0xd4f08"
+                }
+            }
+        },
+        "16": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0xd4f08",
+                    "lane1": "0xd4f08",
+                    "lane2": "0xd4f08",
+                    "lane3": "0xd4f08"
+                }
+            }
+        },
+        "17": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0xd4f08",
+                    "lane1": "0xd4f08",
+                    "lane2": "0xd4f08",
+                    "lane3": "0xd4f08"
+                }
+            }
+        },
+        "18": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0xd4f08",
+                    "lane1": "0xd4f08",
+                    "lane2": "0xd4f08",
+                    "lane3": "0xd4f08"
+                }
+            }
+        },
+        "19": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0xd4f08",
+                    "lane1": "0xd4f08",
+                    "lane2": "0xd4f08",
+                    "lane3": "0xd4f08"
+                }
+            }
+        },
+        "20": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0xd4f08",
+                    "lane1": "0xd4f08",
+                    "lane2": "0xd4f08",
+                    "lane3": "0xd4f08"
+                }
+            }
+        },
+        "21": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0xd4f08",
+                    "lane1": "0xd4f08",
+                    "lane2": "0xd4f08",
+                    "lane3": "0xd4f08"
+                }
+            }
+        },
+        "22": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0xf4d08",
+                    "lane1": "0xf4d08",
+                    "lane2": "0xf4d08",
+                    "lane3": "0xf4d08"
+                }
+            }
+        },
+        "23": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0xf4d08",
+                    "lane1": "0xf4d08",
+                    "lane2": "0xf4d08",
+                    "lane3": "0xf4d08"
+                }
+            }
+        },
+        "24": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0xf4d08",
+                    "lane1": "0xf4d08",
+                    "lane2": "0xf4d08",
+                    "lane3": "0xf4d08"
+                }
+            }
+        },
+        "25": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x114b08",
+                    "lane1": "0x114b08",
+                    "lane2": "0x114b08",
+                    "lane3": "0x114b08"
+                }
+            }
+        },
+        "26": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x114b08",
+                    "lane1": "0x114b08",
+                    "lane2": "0x114b08",
+                    "lane3": "0x114b08"
+                }
+            }
+        },
+        "27": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x114b08",
+                    "lane1": "0x114b08",
+                    "lane2": "0x114b08",
+                    "lane3": "0x114b08"
+                }
+            }
+        },
+        "28": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x124a08",
+                    "lane1": "0x124a08",
+                    "lane2": "0x124a08",
+                    "lane3": "0x124a08"
+                }
+            }
+        },
+        "29": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x134908",
+                    "lane1": "0x134908",
+                    "lane2": "0x134908",
+                    "lane3": "0x134908"
+                }
+            }
+        },
+        "30": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x134908",
+                    "lane1": "0x134908",
+                    "lane2": "0x134908",
+                    "lane3": "0x134908"
+                }
+            }
+        },
+        "31": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x134908",
+                    "lane1": "0x134908",
+                    "lane2": "0x134908",
+                    "lane3": "0x134908"
+                }
+            }
+        },
+        "32": {
+            "25000-optical": {
+                "preemphasis": {
+                    "lane0": "0x164608",
+                    "lane1": "0x164608",
+                    "lane2": "0x164608",
+                    "lane3": "0x164608"
+                }
+            }
+        }
+    }
+}
\ No newline at end of file
diff --git a/device/celestica/x86_64-cel_ds3000-r0/pcie.yaml b/device/celestica/x86_64-cel_ds3000-r0/pcie.yaml
new file mode 100644
index 000000000000..2b9612671602
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/pcie.yaml
@@ -0,0 +1,165 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: '1980'
+  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev
+    11)'
+- bus: '00'
+  dev: '04'
+  fn: '0'
+  id: 19a1
+  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers
+    (rev 11)'
+- bus: '00'
+  dev: '05'
+  fn: '0'
+  id: 19a2
+  name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000
+    Series Root Complex Event Collector (rev 11)'
+- bus: '00'
+  dev: '06'
+  fn: '0'
+  id: 19a3
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT
+    Root Port (rev 11)'
+- bus: '00'
+  dev: 09
+  fn: '0'
+  id: 19a4
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #0 (rev 11)'
+- bus: '00'
+  dev: 0b
+  fn: '0'
+  id: 19a6
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #2 (rev 11)'
+- bus: '00'
+  dev: 0c
+  fn: '0'
+  id: 19a7
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #3 (rev 11)'
+- bus: '00'
+  dev: 0e
+  fn: '0'
+  id: 19a8
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #4 (rev 11)'
+- bus: '00'
+  dev: '10'
+  fn: '0'
+  id: 19aa
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #6 (rev 11)'
+- bus: '00'
+  dev: '12'
+  fn: '0'
+  id: 19ac
+  name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller
+    - Host (rev 11)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 19c2
+  name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller
+    1 (rev 11)'
+- bus: '00'
+  dev: '15'
+  fn: '0'
+  id: 19d0
+  name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI
+    Controller (rev 11)'
+- bus: '00'
+  dev: '16'
+  fn: '0'
+  id: 19d1
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
+    Root Port #0 (rev 11)'
+- bus: '00'
+  dev: '18'
+  fn: '0'
+  id: 19d3
+  name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME
+    HECI 1 (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '0'
+  id: 19d8
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+    (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '1'
+  id: 19d8
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+    (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '2'
+  id: 19d8
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+    (rev 11)'
+- bus: '00'
+  dev: 1c
+  fn: '0'
+  id: 19db
+  name: 'SD Host controller: Intel Corporation Device 19db (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: 19dc
+  name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev
+    11)'
+- bus: '00'
+  dev: 1f
+  fn: '2'
+  id: 19de
+  name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management
+    Controller (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '4'
+  id: 19df
+  name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev
+    11)'
+- bus: '00'
+  dev: 1f
+  fn: '5'
+  id: 19e0
+  name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series
+    SPI Controller (rev 11)'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: 19e2
+  name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology
+    (rev 11)'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: b870
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b870 (rev 01)'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: '1533'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
+    03)'
+- bus: '06'
+  dev: '00'
+  fn: '0'
+  id: '7021'
+  name: 'Memory controller: Xilinx Corporation Device 7021'
+- bus: '07'
+  dev: '00'
+  fn: '0'
+  id: 15c2
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
+    (rev 11)'
+- bus: '07'
+  dev: '00'
+  fn: '1'
+  id: 15c2
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
+    (rev 11)'
diff --git a/device/celestica/x86_64-cel_ds3000-r0/pddf/pd-plugin.json b/device/celestica/x86_64-cel_ds3000-r0/pddf/pd-plugin.json
new file mode 100644
index 000000000000..a3660c24c82e
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/pddf/pd-plugin.json
@@ -0,0 +1,138 @@
+{
+    "PSU":
+    {
+        "name":
+        {
+            "1": "PSU 1",
+            "2": "PSU 2"
+        },
+        "fan_name":
+        {
+            "1":
+            {
+               "1": "PSU 1 Fan 1"
+            },
+            "2":
+            {
+               "1": "PSU 2 Fan 1"
+            }
+        },
+        "thermal_name":
+        {
+            "1": "PSU 1 Temp1",
+            "2": "PSU 2 Temp1"
+        },	       
+        "psu_present":
+        {
+            "bmc":
+            {
+                "valmap": { "1":true, "0":false }
+            },
+            "i2c":
+            {
+                "valmap": { "1":true, "0":false }
+            }
+        },
+
+        "psu_power_good":
+        {
+            "bmc":
+            {
+                "valmap": { "0": true, "8":false }
+            },
+            "i2c":
+            {
+                "valmap": { "1": true, "0": false }
+            }
+        },
+
+        "psu_fan_dir":
+        {
+            "bmc":
+            {
+                "valmap": { "1":"INTAKE", "0":"EXHAUST" }
+            },
+            "i2c":
+            {
+                "valmap": { "0": "INTAKE", "1":"EXHAUST" }
+            }
+        },
+
+        "psu_led_color":
+        {
+            "colmap": {"green":"green", "red":"amber"}
+        },
+
+        "PSU_FAN_MAX_SPEED":"18000"
+    },
+
+    "FAN":
+    {
+	"drawer_name":
+	{
+            "1": "Fantray 1",
+            "2": "Fantray 2",
+            "3": "Fantray 3",
+            "4": "Fantray 4"
+        },
+	"name":
+	{
+            "1":
+            {
+               "1": "Fan 1 Front",
+               "2": "Fan 1 Rear"
+            },
+            "2":
+            {
+               "1": "Fan 2 Front",
+               "2": "Fan 2 Rear"
+            },
+            "3":
+            {
+              "1": "Fan 3 Front",
+              "2": "Fan 3 Rear"
+            },
+            "4":
+            {
+              "1": "Fan 4 Front",
+              "2": "Fan 4 Rear"
+            }
+	},
+        "direction":
+        {
+            "bmc":
+            {
+                "valmap": { "1":"INTAKE", "0":"EXHAUST" }
+            },
+            "i2c":
+            {
+                "valmap": { "1":"INTAKE", "0":"EXHAUST" }
+            }
+        },
+
+        "present":
+        {
+            "bmc":
+            {
+                "valmap": {"0":true, "1":false}
+            },
+            "i2c":
+            {
+                "valmap": {"0":true, "1":false}
+            }
+        },
+
+        "fan_master_led_color":
+        {
+            "colmap": {"green":"green", "red":"amber"}
+        },
+
+        "duty_cycle_to_pwm": "lambda dc: ((dc*255.0)/100)",
+
+        "pwm_to_duty_cycle": "lambda pwm: ((pwm*100.0)/256)",
+
+        "FRONT_FAN_MAX_RPM_SPEED":"24000",
+        "REAR_FAN_MAX_RPM_SPEED":"21000"
+    }
+
+}
diff --git a/device/celestica/x86_64-cel_ds3000-r0/pddf/pddf-device-bmc.json b/device/celestica/x86_64-cel_ds3000-r0/pddf/pddf-device-bmc.json
new file mode 100644
index 000000000000..961169bde17a
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/pddf/pddf-device-bmc.json
@@ -0,0 +1,2123 @@
+{
+"PLATFORM":
+{
+    "num_psus":2,
+    "num_fantrays":4,
+    "num_fans_pertray":2,
+    "num_ports":33,
+    "num_temps":11,
+    "num_components":10,
+    "pddf_dev_types":
+    {
+            "description":" - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo <dev-address> <dev-type> > <path>/new_device' method",
+            "CPLD":
+            [
+                "i2c_cpld"
+            ],
+            "PSU":
+            [
+                "psu_eeprom",
+                "psu_pmbus"
+            ],
+            "FAN":
+            [
+                "fan_ctrl"
+            ],
+            "PORT_MODULE":
+            [
+                "pddf_xcvr"
+            ],
+            "FPGAPCIE":
+            [
+                "fpgapci"
+            ]
+
+        },
+        "std_perm_kos":
+        [
+            "i2c_ismt",
+            "i2c-i801"
+        ],
+
+        "std_kos":
+        [
+            "lpc_ich",
+            "i2c_dev",
+            "ipmi_devintf",
+            "ipmi_si",
+            "i2c_mux_pca954x",
+            "optoe",
+            "mc24lc64t",
+            "baseboard_cpld"
+        ],
+
+        "pddf_kos":
+        [
+            "pddf_client_module",
+            "pddf_cpld_module",
+            "pddf_cpld_driver",
+            "pddf_mux_module",
+            "pddf_led_module",
+            "pddf_fpgai2c_module",
+            "pddf_fpgai2c_driver",
+            "pddf_xcvr_module",
+            "pddf_xcvr_driver_module",
+            "pddf_fpgapci_driver",
+            "pddf_fpgapci_module"
+        ],
+
+        "custom_kos":
+        [
+            "pddf_custom_fpga_algo"
+        ]
+    },
+
+   "COMPONENT1":
+    {
+        "comp_attr":{ "name": "BIOS", "type": "bios", "description": "Basic Input/Output System"},
+        "attr_list":
+        [
+            { "attr_name":"version", "get_cmd": "echo `dmidecode -s bios-version`-`dmidecode -s bios-release-date`" },
+            { "attr_name":"update", "cmd": "afulnx_64 {} /p /b /n /me /x /k" }
+        ]
+    },
+    "COMPONENT2":
+    {
+        "comp_attr":{ "name": "BMC", "type": "bmc", "description":"Baseboard Management Controller "},
+        "attr_list":
+        [
+            { "attr_name":"version", "get_cmd": "r=(`ipmitool raw 0x6 0x1 | cut -d ' ' -f 4,5,16,15,14`) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}" }
+        ]
+    },
+    "COMPONENT3":
+    {
+        "comp_attr":{ "name": "CPLD BASE", "type": "cpld", "description": "Base Board CPLD"},
+        "attr_list":
+        [
+            { "attr_name":"version", "get_cmd": "r=$(cat /sys/devices/platform/baseboard/version) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" },
+            { "attr_name":"update", "cmd": "ispvm {}" }
+        ]
+    },
+    "COMPONENT4":
+    {
+        "comp_attr":{ "name": "CPLD SW1", "type": "cpld", "description":"Switch Board CPLD"},
+        "attr_list":
+        [
+            { "attr_name":"version", "get_cmd": "r=$(i2cget -y -f 102 0x30 0) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" }
+        ]
+    },
+    "COMPONENT5":
+    {
+        "comp_attr":{ "name": "CPLD SW2", "type": "cpld", "description":"Switch Board CPLD"},
+        "attr_list":
+        [
+            { "attr_name":"version", "get_cmd": "r=$(i2cget -y -f 102 0x31 0) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" }
+        ]
+    },
+    "COMPONENT6":
+    {
+        "comp_attr":{ "name": "CPLD COMe", "type": "cpld", "description": "COMe Board CPLD"},
+        "attr_list":
+        [
+            { "attr_name":"version", "get_cmd": "r=$(cat /sys/devices/platform/baseboard/come_cpld_version) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" }
+        ]
+    },
+    "COMPONENT7":
+    {
+        "comp_attr":{ "name": "FPGA", "type": "fpga", "description": "Baseboard FPGA"},
+        "attr_list":
+        [
+            { "attr_name":"version", "get_cmd": "r=$(cat /sys/devices/platform/fpga_sysfs/version) && printf '%d.%d' $(($r>>16)) $(($r&0xffff))" },
+            { "attr_name":"update", "cmd": "fpga_prog /sys/bus/pci/devices/0000:06:00.0/resource0 {}" }
+        ]
+    },
+    "COMPONENT8":
+    {
+        "comp_attr":{ "name": "PCIe", "type": "pcie", "description":"ASIC PCIe Firmware"},
+        "attr_list":
+        [
+            { "attr_name":"version", "get_cmd": "bcmcmd 'pciephy fw version' | grep 'PCIe FW version' | cut -d ' ' -f 4" }
+        ]
+    },
+    "COMPONENT9":
+    {
+        "comp_attr":{ "name": "SSD", "type": "ssd", "description":"SSD firmware version"},
+        "attr_list":
+        [
+            { "attr_name":"version", "get_cmd": "ssdutil -v | grep 'Firmware' | awk '{ print $3 }'" }
+        ]
+    },
+
+    "SYSTEM":
+    {
+        "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null},
+        "i2c":
+        {
+            "CONTROLLERS":
+            [
+                { "dev_name":"i2c-0", "dev":"SMBUS0" },
+                { "dev_name":"i2c-1", "dev":"SMBUS1" },
+                { "dev_name":"pcie-0", "dev":"PCIE0" }
+            ]
+        }
+    },
+
+    "SMBUS0":
+    {
+        "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"},
+        "i2c":
+        {
+            "topo_info": {"dev_addr": "0x0"},
+            "DEVICES":
+            [
+                {"dev": "EEPROM1"}
+            ]
+        }
+    },
+
+    "EEPROM1":
+    {
+        "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus": "0x0", "dev_addr": "0x56", "dev_type": "24lc64t"},
+            "dev_attr": {"access_mode": "BLOCK"},
+            "attr_list": [
+                {"attr_name": "eeprom"}
+            ]
+        }
+    },
+
+    "SMBUS1":
+    {
+        "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS1", "device_parent": "SYSTEM"},
+        "i2c":
+        {
+            "topo_info": {"dev_addr": "0x1"},
+            "DEVICES":
+            [
+                {"dev": "COME_CPLD"}
+            ]
+        }
+    },
+
+    "COME_CPLD":
+    {
+        "dev_info": {"device_type": "CPLD", "device_name": "CPLD COMe", "device_parent": "SMBUS1"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus": "0x1", "dev_addr": "0x0d", "dev_type": "i2c_cpld"},
+            "dev_attr": {}
+        }
+    },
+
+    "PCIE0":
+    {
+        "dev_info": {"device_type": "PCIE", "device_name": "PCIE0", "device_parent": "SYSTEM"},
+        "i2c":
+        {
+            "DEVICES":
+            [
+                {"dev": "FPGAPCIE0"}
+            ]
+        }
+    },
+
+    "FPGAPCIE0":
+    {
+        "dev_info": {"device_type": "FPGAPCIE", "device_name": "FPGAPCIE0", "device_parent": "PCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x0"},
+            "dev_attr": { "vendor_id":"0x10EE", "device_id": "0x7021", "virt_bus": "0x64", "data_base_offset":"0x0", "data_size":"0x25000", "i2c_ch_base_offset":"0x10000", "i2c_ch_size":"0x1000",  "virt_i2c_ch":"0xc"},
+            "channel":
+            [
+                { "chn":"3", "dev":"CPLD_S1" },
+                { "chn":"3", "dev":"CPLD_S2" },
+                { "chn":"2", "dev":"MUX1" },
+                { "chn":"2", "dev":"MUX2" },
+                { "chn":"2", "dev":"MUX3" },
+                { "chn":"2", "dev":"MUX4" },
+                { "chn":"1", "dev":"MUX5" }
+            ]
+        }
+    },
+
+    "CPLD_S1":
+    {
+        "dev_info": { "device_type":"CPLD", "device_name":"CPLD SW1", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x66", "dev_addr":"0x30", "dev_type":"i2c_cpld"},
+            "dev_attr":{}
+        }
+    },
+
+    "CPLD_S2":
+    {
+        "dev_info": { "device_type":"CPLD", "device_name":"CPLD SW2", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x66", "dev_addr":"0x31", "dev_type":"i2c_cpld"},
+            "dev_attr":{}
+        }
+    },
+
+    "MUX1":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX1", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x65", "dev_addr":"0x72", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x2", "idle_state":"-2" },
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT1" },
+                { "chn":"1", "dev":"PORT2" },
+                { "chn":"2", "dev":"PORT3" },
+                { "chn":"3", "dev":"PORT4" },
+                { "chn":"4", "dev":"PORT5" },
+                { "chn":"5", "dev":"PORT6" },
+                { "chn":"6", "dev":"PORT7" },
+                { "chn":"7", "dev":"PORT8" }
+            ]
+        }
+    },
+
+    "MUX2":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX2", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x65", "dev_addr":"0x73", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0xa", "idle_state":"-2" },
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT9" },
+                { "chn":"1", "dev":"PORT10" },
+                { "chn":"2", "dev":"PORT11" },
+                { "chn":"3", "dev":"PORT12" },
+                { "chn":"4", "dev":"PORT13" },
+                { "chn":"5", "dev":"PORT14" },
+                { "chn":"6", "dev":"PORT15" },
+                { "chn":"7", "dev":"PORT16" }
+            ]
+        }
+    },
+
+    "MUX3":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX3", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x65", "dev_addr":"0x74", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x12", "idle_state":"-2" },
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT17" },
+                { "chn":"1", "dev":"PORT18" },
+                { "chn":"2", "dev":"PORT19" },
+                { "chn":"3", "dev":"PORT20" },
+                { "chn":"4", "dev":"PORT21" },
+                { "chn":"5", "dev":"PORT22" },
+                { "chn":"6", "dev":"PORT23" },
+                { "chn":"7", "dev":"PORT24" }
+            ]
+        }
+    },
+
+    "MUX4":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX4", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x65", "dev_addr":"0x75", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x1a", "idle_state":"-2" },
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT25" },
+                { "chn":"1", "dev":"PORT26" },
+                { "chn":"2", "dev":"PORT27" },
+                { "chn":"3", "dev":"PORT28" },
+                { "chn":"4", "dev":"PORT29" },
+                { "chn":"5", "dev":"PORT30" },
+                { "chn":"6", "dev":"PORT31" },
+                { "chn":"7", "dev":"PORT32" }
+            ]
+        }
+    },
+    "MUX5":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX5", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x64", "dev_addr":"0x72", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x22"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT33" }
+            ]
+        }
+    },
+
+    "PORT1":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT1", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"1"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT1-EEPROM" },
+                { "itf":"control", "dev":"PORT1-CTRL" }
+
+            ]
+        }
+    },
+    "PORT1-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT1-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT1-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT1-CTRL", "device_parent":"MUX1", "virt_parent":"PORT1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+    "PORT2":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT2", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"2"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT2-EEPROM" },
+                { "itf":"control", "dev":"PORT2-CTRL" }
+            ]
+        }
+    },
+
+    "PORT2-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT2-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT2"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT2-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT2-CTRL", "device_parent":"MUX1", "virt_parent":"PORT2"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT3":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT3", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"3"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT3-EEPROM" },
+                { "itf":"control", "dev":"PORT3-CTRL" }
+            ]
+        }
+    },
+    "PORT3-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT3-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT3"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x4", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT3-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT3-CTRL", "device_parent":"MUX1", "virt_parent":"PORT3"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x4", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT4":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT4", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"4"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT4-EEPROM" },
+                { "itf":"control", "dev":"PORT4-CTRL" }
+            ]
+        }
+    },
+    "PORT4-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT4-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT4"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x5", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT4-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT4-CTRL", "device_parent":"MUX1", "virt_parent":"PORT4"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x5", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT5":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT5", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"5"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT5-EEPROM" },
+                { "itf":"control", "dev":"PORT5-CTRL" }
+            ]
+        }
+    },
+
+    "PORT5-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT5-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT5"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT5-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT5-CTRL", "device_parent":"MUX1", "virt_parent":"PORT5"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT6":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT6", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"6"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT6-EEPROM" },
+                { "itf":"control", "dev":"PORT6-CTRL" }
+            ]
+        }
+    },
+    "PORT6-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT6-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT6"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x7", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT6-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT6-CTRL", "device_parent":"MUX1", "virt_parent":"PORT6"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x7", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT7":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT7", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"7"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT7-EEPROM" },
+                { "itf":"control", "dev":"PORT7-CTRL" }
+            ]
+        }
+    },
+    "PORT7-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT7-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT7"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x8", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT7-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT7-CTRL", "device_parent":"MUX1", "virt_parent":"PORT7"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x8", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT8":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT8", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"8"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT8-EEPROM" },
+                { "itf":"control", "dev":"PORT8-CTRL" }
+            ]
+        }
+    },
+    "PORT8-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT8-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT8"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x9", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT8-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT8-CTRL", "device_parent":"MUX1", "virt_parent":"PORT8"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x9", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT9":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT9", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"9"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT9-EEPROM" },
+                { "itf":"control", "dev":"PORT9-CTRL" }
+            ]
+        }
+    },
+    "PORT9-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT9-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT9"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xa", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT9-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT9-CTRL", "device_parent":"MUX2", "virt_parent":"PORT9"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xa", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT10":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT10", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"10"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT10-EEPROM" },
+                { "itf":"control", "dev":"PORT10-CTRL" }
+            ]
+        }
+    },
+    "PORT10-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT10-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT10"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xb", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT10-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT10-CTRL", "device_parent":"MUX2", "virt_parent":"PORT10"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xb", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT11":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT11", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"11"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT11-EEPROM" },
+                { "itf":"control", "dev":"PORT11-CTRL" }
+            ]
+        }
+    },
+    "PORT11-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT11-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT11"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xc", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT11-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT11-CTRL", "device_parent":"MUX2", "virt_parent":"PORT11"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xc", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT12":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT12", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"12"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT12-EEPROM" },
+                { "itf":"control", "dev":"PORT12-CTRL" }
+            ]
+        }
+    },
+    "PORT12-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT12-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT12"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xd", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT12-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT12-CTRL", "device_parent":"MUX2", "virt_parent":"PORT12"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xd", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT13":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT13", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"13"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT13-EEPROM" },
+                { "itf":"control", "dev":"PORT13-CTRL" }
+            ]
+        }
+    },
+    "PORT13-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT13-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT13"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xe", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT13-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT13-CTRL", "device_parent":"MUX2", "virt_parent":"PORT13"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xe", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT14":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT14", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"14"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT14-EEPROM" },
+                { "itf":"control", "dev":"PORT14-CTRL" }
+            ]
+        }
+    },
+    "PORT14-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT14-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT14"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xF", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT14-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT14-CTRL", "device_parent":"MUX2", "virt_parent":"PORT14"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xf", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT15":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT15", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"15"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT15-EEPROM" },
+                { "itf":"control", "dev":"PORT15-CTRL" }
+            ]
+        }
+    },
+    "PORT15-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT15-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT15"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT15-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT15-CTRL", "device_parent":"MUX2", "virt_parent":"PORT15"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x10", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT16":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT16", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"16"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT16-EEPROM" },
+                { "itf":"control", "dev":"PORT16-CTRL" }
+            ]
+        }
+    },
+    "PORT16-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT16-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT16"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT16-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT16-CTRL", "device_parent":"MUX2", "virt_parent":"PORT16"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x11", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT17":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT17", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"17"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT17-EEPROM" },
+                { "itf":"control", "dev":"PORT17-CTRL" }
+            ]
+        }
+    },
+    "PORT17-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT17-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT17"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT17-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT17-CTRL", "device_parent":"MUX3", "virt_parent":"PORT17"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x12", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT18":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT18", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"18"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT18-EEPROM" },
+                { "itf":"control", "dev":"PORT18-CTRL" }
+            ]
+        }
+    },
+    "PORT18-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT18-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT18"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT18-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT18-CTRL", "device_parent":"MUX3", "virt_parent":"PORT18"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x13", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT19":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT19", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"19"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT19-EEPROM" },
+                { "itf":"control", "dev":"PORT19-CTRL" }
+            ]
+        }
+    },
+    "PORT19-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT19-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT19"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT19-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT19-CTRL", "device_parent":"MUX3", "virt_parent":"PORT19"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x14", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT20":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT20", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"20"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT20-EEPROM" },
+                { "itf":"control", "dev":"PORT20-CTRL" }
+            ]
+        }
+    },
+    "PORT20-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT20-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT20"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT20-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT20-CTRL", "device_parent":"MUX3", "virt_parent":"PORT20"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x15", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT21":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT21", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"21"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT21-EEPROM" },
+                { "itf":"control", "dev":"PORT21-CTRL" }
+            ]
+        }
+    },
+    "PORT21-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT21-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT21"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT21-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT21-CTRL", "device_parent":"MUX3", "virt_parent":"PORT21"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x16", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT22":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT22", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"22"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT22-EEPROM" },
+                { "itf":"control", "dev":"PORT22-CTRL" }
+            ]
+        }
+    },
+    "PORT22-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT22-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT22"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT22-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT22-CTRL", "device_parent":"MUX3", "virt_parent":"PORT22"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x17", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT23":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT23", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"23"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT23-EEPROM" },
+                { "itf":"control", "dev":"PORT23-CTRL" }
+            ]
+        }
+    },
+    "PORT23-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT23-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT23"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x18", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT23-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT23-CTRL", "device_parent":"MUX3", "virt_parent":"PORT23"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x18", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT24":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT24", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"24"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT24-EEPROM" },
+                { "itf":"control", "dev":"PORT24-CTRL" }
+            ]
+        }
+    },
+    "PORT24-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT24-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT24"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x19", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT24-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT24-CTRL", "device_parent":"MUX3", "virt_parent":"PORT24"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x19", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT25":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT25", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"25"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT25-EEPROM" },
+                { "itf":"control", "dev":"PORT25-CTRL" }
+            ]
+        }
+    },
+    "PORT25-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT25-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT25"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT25-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT25-CTRL", "device_parent":"MUX4", "virt_parent":"PORT25"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT26":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT26", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"26"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT26-EEPROM" },
+                { "itf":"control", "dev":"PORT26-CTRL" }
+            ]
+        }
+    },
+    "PORT26-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT26-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT26"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT26-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT26-CTRL", "device_parent":"MUX4", "virt_parent":"PORT26"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT27":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT27", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"27"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT27-EEPROM" },
+                { "itf":"control", "dev":"PORT27-CTRL" }
+            ]
+        }
+    },
+    "PORT27-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT27-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT27"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT27-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT27-CTRL", "device_parent":"MUX4", "virt_parent":"PORT27"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT28":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT28", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"28"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT28-EEPROM" },
+                { "itf":"control", "dev":"PORT28-CTRL" }
+            ]
+        }
+    },
+    "PORT28-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT28-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT28"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT28-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT28-CTRL", "device_parent":"MUX4", "virt_parent":"PORT28"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT29":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT29", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"29"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT29-EEPROM" },
+                { "itf":"control", "dev":"PORT29-CTRL" }
+            ]
+        }
+    },
+    "PORT29-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT29-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT29"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT29-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT29-CTRL", "device_parent":"MUX4", "virt_parent":"PORT29"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT30":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT30", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"30"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT30-EEPROM" },
+                { "itf":"control", "dev":"PORT30-CTRL" }
+            ]
+        }
+    },
+    "PORT30-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT30-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT30"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT30-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT30-CTRL", "device_parent":"MUX4", "virt_parent":"PORT30"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT31":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT31", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"31"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT31-EEPROM" },
+                { "itf":"control", "dev":"PORT31-CTRL" }
+            ]
+        }
+    },
+    "PORT31-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT31-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT31"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x20", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT31-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT31-CTRL", "device_parent":"MUX4", "virt_parent":"PORT31"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x20", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT32":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT32", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"32"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT32-EEPROM" },
+                { "itf":"control", "dev":"PORT32-CTRL" }
+            ]
+        }
+    },
+    "PORT32-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT32-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT32"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x21", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT32-CTRL":
+    {
+        "dev_info": { "device_type":"pci", "device_name":"PORT32-CTRL", "device_parent":"MUX4", "virt_parent":"PORT32"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x21", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT33":
+    {
+        "dev_info": { "device_type":"SFP+", "device_name":"PORT33", "device_parent":"MUX5"},
+        "dev_attr": { "dev_idx":"33"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT33-EEPROM" },
+                { "itf":"control", "dev":"PORT33-CTRL" }
+            ]
+        }
+    },
+    "PORT33-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT33-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT33"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x22", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT33-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT33-CTRL", "device_parent":"MUX5", "virt_parent":"PORT33"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x22", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PSU1":
+    {
+        "dev_info": { "device_type":"PSU", "device_name":"PSU 1"},
+        "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"psu_power_good", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x0f", "raw": "1", "type":"raw", "offset":"2", "mask":"0x8"},
+                    { "attr_name":"psu_present", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x0f", "raw": "1", "type":"raw", "offset":"2", "mask":"0x1"},
+                    { "attr_name":"psu_model_name", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Name", "separator":": ","field_pos":"2"},
+                    { "attr_name":"psu_serial_num", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Serial", "separator":": ","field_pos":"2"},
+                    { "attr_name":"psu_mfr_id", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Manufacturer", "separator":":", "field_pos":"2"},
+                    { "attr_name":"psu_p_out", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x21", "raw": "1", "type":"raw", "offset":"0", "multiplier":"6000000"},
+                    { "attr_name":"psu_v_out", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x1f", "raw":"1", "type":"raw", "offset":"0", "multiplier":"100"},
+                    { "attr_name":"psu_i_out", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x20", "raw":"1", "type":"raw", "offset":"0", "multiplier":"500"},
+                    { "attr_name":"psu_p_in", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x1b", "raw": "1", "type":"raw", "offset":"0", "multiplier":"6000000"},
+                    { "attr_name":"psu_v_in", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x19", "raw":"1", "type":"raw", "offset":"0", "multiplier":"100"},
+                    { "attr_name":"psu_i_in", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x1a", "raw":"1", "type":"raw", "offset":"0", "multiplier":"500"},
+                    { "attr_name":"psu_fan1_speed_rpm", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x1c", "raw":"1", "type":"raw", "offset":"0", "multiplier":"200"},
+                    { "attr_name":"psu_temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x1d", "raw":"1", "type":"raw", "offset":"0", "multiplier":"1000"},
+                    { "attr_name":"psu_temp1_high_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x1d", "raw":"1", "type":"raw", "offset":"5", "multiplier":"1000"}
+                ]
+            }
+        }
+    },
+
+    "PSU2":
+    {
+        "dev_info": { "device_type":"PSU", "device_name":"PSU 2"},
+        "dev_attr": { "dev_idx":"2", "num_psu_fans": "1"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"psu_power_good", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x10", "raw": "1", "type":"raw", "offset":"2", "mask":"0x8"},
+                    { "attr_name":"psu_present", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x10", "raw": "1", "type":"raw", "offset":"2", "mask":"0x1"},
+                    { "attr_name":"psu_model_name", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Name", "separator":": ","field_pos":"2"},
+                    { "attr_name":"psu_serial_num", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Serial", "separator":": ","field_pos":"2"},
+                    { "attr_name":"psu_mfr_id", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Product Manufacturer", "separator":":", "field_pos":"2"},
+                    { "attr_name":"psu_p_out", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x2a", "raw": "1", "type":"raw", "offset":"0", "multiplier":"6000000"},
+                    { "attr_name":"psu_v_out", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x28", "raw":"1", "type":"raw", "offset":"0", "multiplier":"100"},
+                    { "attr_name":"psu_i_out", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x29", "raw":"1", "type":"raw", "offset":"0", "multiplier":"500"},
+                    { "attr_name":"psu_p_in", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x24", "raw": "1", "type":"raw", "offset":"0", "multiplier":"6000000"},
+                    { "attr_name":"psu_v_in", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x22", "raw":"1", "type":"raw", "offset":"0", "multiplier":"100"},
+                    { "attr_name":"psu_i_in", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x23", "raw":"1", "type":"raw", "offset":"0", "multiplier":"500"},
+                    { "attr_name":"psu_fan1_speed_rpm", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x25", "raw":"1", "type":"raw", "offset":"0", "multiplier":"200"},
+                    { "attr_name":"psu_temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2d 0x26", "raw":"1", "type":"raw", "offset":"0", "multiplier":"1000"},
+                    { "attr_name":"psu_temp1_high_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x26", "raw":"1", "type":"raw", "offset":"5", "multiplier":"1000"} 
+                ]
+            }
+        }
+    },
+
+    "FAN-CTRL":
+    {
+        "dev_info": { "device_type":"FAN"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"fan1_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x00", "type":"raw", "raw":"1"},
+                    {"attr_name":"fan2_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x00", "type":"raw", "raw":"1"},
+                    {"attr_name":"fan3_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x01", "type":"raw", "raw":"1"},
+                    {"attr_name":"fan4_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x01", "type":"raw", "raw":"1"},
+                    {"attr_name":"fan5_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x02", "type":"raw", "raw":"1"},
+                    {"attr_name":"fan6_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x02", "type":"raw", "raw":"1"},
+                    {"attr_name":"fan7_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x03", "type":"raw", "raw":"1"},
+                    {"attr_name":"fan8_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x03", "type":"raw", "raw":"1"},
+                    {"attr_name":"fan1_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x00", "type":"raw", "raw": "1"},
+                    {"attr_name":"fan2_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x00", "type":"raw", "raw": "1"},
+                    {"attr_name":"fan3_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x01", "type":"raw", "raw": "1"},
+                    {"attr_name":"fan4_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x01", "type":"raw", "raw": "1"},
+                    {"attr_name":"fan5_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x02", "type":"raw", "raw": "1"},
+                    {"attr_name":"fan6_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x02", "type":"raw", "raw": "1"},
+                    {"attr_name":"fan7_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x03", "type":"raw", "raw": "1"},
+                    {"attr_name":"fan8_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x03", "type":"raw", "raw": "1"},
+                    {"attr_name":"fan1_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 00", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"},
+                    {"attr_name":"fan2_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 00", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"},
+                    {"attr_name":"fan3_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 01", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"},
+                    {"attr_name":"fan4_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 01", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"},
+                    {"attr_name":"fan5_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 02", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"},
+                    {"attr_name":"fan6_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 02", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"},
+                    {"attr_name":"fan7_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 03", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"},
+                    {"attr_name":"fan8_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 03", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"},
+                    { "attr_name":"fan1_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan1_Front", "field_pos":"3", "multiplier":"1"},
+                    { "attr_name":"fan2_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan1_Rear", "field_pos":"3", "multiplier":"1"},
+                    { "attr_name":"fan3_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan2_Front", "field_pos":"3", "multiplier":"1"},
+                    { "attr_name":"fan4_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan2_Rear", "field_pos":"3", "multiplier":"1"},
+                    { "attr_name":"fan5_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan3_Front", "field_pos":"3", "multiplier":"1"},
+                    { "attr_name":"fan6_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan3_Rear", "field_pos":"3", "multiplier":"1"},
+                    { "attr_name":"fan7_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan4_Front", "field_pos":"3", "multiplier":"1"},
+                    { "attr_name":"fan8_pwm", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "Fan4_Rear", "field_pos":"3", "multiplier":"1"}
+                ]
+            }
+        }
+    },
+
+    "TEMP1":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR"},
+        "dev_attr": { "display_name":"CPU Internal Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x7", "raw":"1", "type": "raw", "offset":"5"},
+                    { "attr_name":"temp1_high_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x7", "raw":"1", "type": "raw", "offset":"6"},
+                    { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x7", "raw":"1", "type": "raw", "offset":"0"}
+                ]
+            }
+        }
+    },
+    "TEMP2":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR"},
+        "dev_attr": { "display_name":"Baseboard Left Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                  { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x1", "raw":"1", "type": "raw", "offset":"5"},
+                  { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1", "raw":"1", "type": "raw", "offset":"0"}
+
+                ]
+            }
+        }
+    },
+    "TEMP3":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR"},
+        "dev_attr": { "display_name":"Baseboard Right Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x1", "raw":"1", "type": "raw", "offset":"5"},
+                    { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1", "raw":"1", "type": "raw", "offset":"0"}
+                ]
+            }
+        }
+    },
+    "TEMP4":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR"},
+        "dev_attr": { "display_name":"ASIC External Front Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x3", "raw":"1", "type": "raw", "offset":"0"}
+                ]
+            }
+        }
+    },
+    "TEMP5":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR"},
+        "dev_attr": { "display_name":"ASIC External Rear Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x4", "raw":"1", "type": "raw", "offset":"0"}
+                ]
+            }
+        }
+    },
+    "TEMP6":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR"},
+        "dev_attr": { "display_name":"Switchboard Left Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                     { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x6", "raw":"1", "type": "raw", "offset":"0"}
+                ]
+            }
+        }
+    },
+    "TEMP7":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR"},
+        "dev_attr": { "display_name":"Switchboard Right Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x5", "raw":"1", "type": "raw", "offset":"0"}
+                ]
+            }
+        }
+    },
+    "TEMP8":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR"},
+        "dev_attr": { "display_name":"MP2975 VDD CORE Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x49", "raw":"1", "type": "raw", "offset":"5"},
+                    { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x49", "raw":"1", "type": "raw", "offset":"0"}
+                ]
+            }
+        }
+    },
+    "TEMP9":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR"},
+        "dev_attr": { "display_name":"MP2975 VDD ANLG Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                     { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x50", "raw":"1", "type": "raw", "offset":"5"},
+                     { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x50", "raw":"1", "type": "raw", "offset":"0"}
+                ]
+            }
+        }
+    },
+    "TEMP10":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR"},
+        "dev_attr": { "display_name":"PSU 1 Temp2"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                     { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x1E", "raw":"1", "type": "raw", "offset":"5"},
+                     { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x1E", "raw":"1", "type": "raw", "offset":"0"}
+                ]
+            }
+        }
+    },
+    "TEMP11":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR"},
+        "dev_attr": { "display_name":"PSU 2 Temp2"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                     { "attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x27", "raw":"1", "type": "raw", "offset":"5"},
+                     { "attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x27", "raw":"1", "type": "raw", "offset":"0"}
+                ]
+            }
+        }
+    },
+    "SYS_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"SYS_LED"},
+        "dev_attr": { "index":"0", "flag": "ro"},
+        "bmc": {
+                   "ipmitool" : {
+                           "attr_list":
+                            [
+                                     { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"},
+                                     { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"},
+                                     { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"},
+                                     { "attr_name":"amber_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"},
+                                     { "attr_name":"amber_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x04"},
+                                     { "attr_name":"green_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x05"},
+                                     { "attr_name":"green_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x06"},
+                                     { "attr_name":"both_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x07"},
+                                     { "attr_name":"both_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x08"},
+                                     { "attr_name":"unknown", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x09"}
+                           ]
+                   }
+              }
+    },
+    "ALARM_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"ALARM_LED"},
+        "dev_attr": { "index":"0", "flag": "ro"},
+        "bmc": {
+                   "ipmitool" : {
+                           "attr_list":
+                           [
+                                    { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"},
+                                    { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"},
+                                    { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"},
+                                    { "attr_name":"amber_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"},
+                                    { "attr_name":"amber_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x04"},
+                                    { "attr_name":"green_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x05"},
+                                    { "attr_name":"green_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x06"},
+                                    { "attr_name":"unknown", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x09"}
+                           ]
+                   }
+        }
+    },
+    "FANTRAY1_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY1_LED"},
+        "dev_attr": { "index":"0", "flag": "ro"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x04", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"},
+                    { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x04", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"},
+                    { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x04", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"},
+                    { "attr_name":"unknown", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x04", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"}
+                ]
+            }
+        }
+    },
+    "FANTRAY2_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY2_LED"},
+        "dev_attr": { "index":"1", "flag": "ro"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x05", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"},
+                    { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x05", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"},
+                    { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x05", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"},
+                    { "attr_name":"unknown", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x05", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"}
+                ]
+            }
+        }
+    },
+    "FANTRAY3_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY3_LED"},
+        "dev_attr": { "index":"2", "flag": "ro"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x06", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"},
+                    { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x06", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"},
+                    { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x06", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"},
+                    { "attr_name":"unknown", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x06", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"}
+                ]
+            }
+        }
+    },
+    "FANTRAY4_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY4_LED"},
+        "dev_attr": { "index":"3", "flag": "ro"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    { "attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x07", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x00"},
+                    { "attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x07", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x01"},
+                    { "attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x07", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x02"},
+                    { "attr_name":"unknown", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x07", "raw": "1", "type":"mask", "mask" : "0xff", "descr" :"OFF", "value" : "0x03"}
+                ]
+            }
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_ds3000-r0/pddf/pddf-device-nonbmc.json b/device/celestica/x86_64-cel_ds3000-r0/pddf/pddf-device-nonbmc.json
new file mode 100644
index 000000000000..f50535020007
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/pddf/pddf-device-nonbmc.json
@@ -0,0 +1,2216 @@
+{
+"PLATFORM":
+{
+    "num_psus":2,
+    "num_fantrays":4,
+    "num_fans_pertray":2,
+    "num_ports":33,
+    "num_temps":6,
+    "num_components":8,
+    "pddf_dev_types":
+    {
+            "description":" - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo <dev-address> <dev-type> > <path>/new_device' method",
+            "CPLD":
+            [
+                "i2c_cpld"
+            ],
+            "PSU":
+            [
+                "psu_pmbus"
+            ],
+            "FAN":
+            [
+                "fan_ctrl",
+                "fan_eeprom",
+                "fan_cpld"
+            ],
+            "PORT_MODULE":
+            [
+                "pddf_xcvr"
+            ],
+            "FPGAPCIE":
+            [
+                "fpgapci"
+            ]
+
+        },
+        "std_perm_kos":
+        [
+            "i2c_ismt",
+            "i2c-i801"
+        ],
+
+        "std_kos":
+        [
+            "lpc_ich",
+            "i2c_dev",
+            "i2c_mux_pca954x",
+            "optoe",
+            "mc24lc64t",
+            "ucd9000",
+            "mp2975",
+            "lm75",
+            "at24"
+        ],
+
+        "pddf_kos":
+        [
+            "pddf_client_module",
+            "pddf_cpld_module",
+            "pddf_cpld_driver",
+            "pddf_mux_module",
+            "pddf_fan_module",
+            "pddf_psu_module",
+            "pddf_led_module",
+            "pddf_fpgai2c_module",
+            "pddf_fpgai2c_driver",
+            "pddf_xcvr_module",
+            "pddf_xcvr_driver_module",
+            "pddf_fpgapci_driver",
+            "pddf_fpgapci_module"
+        ],
+
+        "custom_kos":
+        [
+            "pddf_custom_psu_driver_module",
+            "pddf_custom_fpga_algo"
+        ]
+    },
+
+   "COMPONENT1":
+    {
+        "comp_attr":{ "name": "BIOS", "type": "bios", "description": "Basic Input/Output System"},
+        "attr_list":
+        [
+            { "attr_name":"version", "get_cmd": "echo `dmidecode -s bios-version`-`dmidecode -s bios-release-date`" },
+            { "attr_name":"update", "cmd": "afulnx_64 {} /p /b /n /me /x /k" }
+        ]
+    },
+    "COMPONENT2":
+    {
+        "comp_attr":{ "name": "CPLD BASE", "type": "cpld", "description": "Base Board CPLD"},
+        "attr_list":
+        [
+            { "attr_name":"version", "get_cmd": "r=$(cat /sys/devices/platform/baseboard/version) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" },
+            { "attr_name":"update", "cmd": "ispvm {}" }
+        ]
+    },
+    "COMPONENT3":
+    {
+        "comp_attr":{ "name": "CPLD SW1", "type": "cpld", "description":"Switch Board CPLD"},
+        "attr_list":
+        [
+            { "attr_name":"version", "get_cmd": "r=$(i2cget -y -f 102 0x30 0) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" }
+        ]
+    },
+    "COMPONENT4":
+    {
+        "comp_attr":{ "name": "CPLD SW2", "type": "cpld", "description":"Switch Board CPLD"},
+        "attr_list":
+        [
+            { "attr_name":"version", "get_cmd": "r=$(i2cget -y -f 102 0x31 0) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" }
+        ]
+    },
+    "COMPONENT5":
+    {
+        "comp_attr":{ "name": "CPLD COMe", "type": "cpld", "description": "COMe Board CPLD"},
+        "attr_list":
+        [
+            { "attr_name":"version", "get_cmd": "r=$(cat /sys/devices/platform/baseboard/come_cpld_version) && printf '%d.%d' $(($r>>4)) $(($r&0xf))" }
+        ]
+    },
+    "COMPONENT6":
+    {
+        "comp_attr":{ "name": "FPGA", "type": "fpga", "description": "Baseboard FPGA"},
+        "attr_list":
+        [
+            { "attr_name":"version", "get_cmd": "r=$(cat /sys/devices/platform/fpga_sysfs/version) && printf '%d.%d' $(($r>>16)) $(($r&0xffff))" },
+            { "attr_name":"update", "cmd": "fpga_prog /sys/bus/pci/devices/0000:06:00.0/resource0 {}" }
+        ]
+    },
+    "COMPONENT7":
+    {
+        "comp_attr":{ "name": "PCIe", "type": "pcie", "description":"ASIC PCIe Firmware"},
+        "attr_list":
+        [
+            { "attr_name":"version", "get_cmd": "bcmcmd 'pciephy fw version' | grep 'PCIe FW version' | cut -d ' ' -f 4" }
+        ]
+    },
+    "COMPONENT8":
+    {
+        "comp_attr":{ "name": "SSD", "type": "ssd", "description":"SSD firmware version"},
+        "attr_list":
+        [
+            { "attr_name":"version", "get_cmd": "ssdutil -v | grep 'Firmware' | awk '{ print $3 }'" }
+        ]
+    },
+
+    "SYSTEM":
+    {
+        "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null},
+        "i2c":
+        {
+            "CONTROLLERS":
+            [
+                { "dev_name":"i2c-0", "dev":"SMBUS0" },
+                { "dev_name":"i2c-1", "dev":"SMBUS1" },
+                { "dev_name":"pcie-0", "dev":"PCIE0" }
+            ]
+        }
+    },
+
+    "SMBUS0":
+    {
+        "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"},
+        "i2c":
+        {
+            "topo_info": {"dev_addr": "0x0"},
+            "DEVICES":
+            [
+                {"dev": "EEPROM1"}
+            ]
+        }
+    },
+
+    "EEPROM1":
+    {
+        "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus": "0x0", "dev_addr": "0x56", "dev_type": "24lc64t"},
+            "dev_attr": {"access_mode": "BLOCK"},
+            "attr_list": [
+                {"attr_name": "eeprom"}
+            ]
+        }
+    },
+
+    "SMBUS1":
+    {
+        "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS1", "device_parent": "SYSTEM"},
+        "i2c":
+        {
+            "topo_info": {"dev_addr": "0x1"},
+            "DEVICES":
+            [
+                {"dev": "COME_CPLD"}
+            ]
+        }
+    },
+
+    "COME_CPLD":
+    {
+        "dev_info": {"device_type": "CPLD", "device_name": "CPLD COMe", "device_parent": "SMBUS1"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus": "0x1", "dev_addr": "0x0d", "dev_type": "i2c_cpld"},
+            "dev_attr": {}
+        }
+    },
+
+    "PCIE0":
+    {
+        "dev_info": {"device_type": "PCIE", "device_name": "PCIE0", "device_parent": "SYSTEM"},
+        "i2c":
+        {
+            "DEVICES":
+            [
+                {"dev": "FPGAPCIE0"}
+            ]
+        }
+    },
+
+    "FPGAPCIE0":
+    {
+        "dev_info": {"device_type": "FPGAPCIE", "device_name": "FPGAPCIE0", "device_parent": "PCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x0"},
+            "dev_attr": { "vendor_id":"0x10EE", "device_id": "0x7021", "virt_bus": "0x64", "data_base_offset":"0x0", "data_size":"0x25000", "i2c_ch_base_offset":"0x10000", "i2c_ch_size":"0x1000",  "virt_i2c_ch":"0xc"},
+            "channel":
+            [
+                { "chn":"2", "dev":"MUX1" },
+                { "chn":"2", "dev":"MUX2" },
+                { "chn":"2", "dev":"MUX3" },
+                { "chn":"2", "dev":"MUX4" },
+                { "chn":"1", "dev":"MUX5" },
+                { "chn":"3", "dev":"CPLD_S1" },
+                { "chn":"3", "dev":"CPLD_S2" },
+                { "chn":"4", "dev":"EEPROM_COME" },
+                { "chn":"4", "dev":"CPLD_COME" },
+                { "chn":"5", "dev":"EEPROM_BASEBOARD" },
+                { "chn":"6", "dev":"FAN-CTRL" },
+                { "chn":"6", "dev":"CPLD_BASEBOARD" },
+                { "chn":"7", "dev":"MUX6" },
+                { "chn":"10", "dev":"TEMP1" },
+                { "chn":"10", "dev":"TEMP2" },
+                { "chn":"10", "dev":"TEMP3" },
+                { "chn":"10", "dev":"TEMP4" },
+                { "chn":"10", "dev":"TEMP5" },
+                { "chn":"10", "dev":"TEMP6" },
+                { "chn":"11", "dev":"MUX7" }
+            ]
+        }
+    },
+
+    "TEMP1":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP1", "device_parent":"FPGAPCIE0"},
+        "dev_attr": { "display_name":"Base_Temp_U5"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4d", "dev_type":"lm75"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                { "attr_name": "temp1_max_hyst"},
+                { "attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "TEMP2":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP2", "device_parent":"FPGAPCIE0"},
+        "dev_attr": { "display_name":"Base_Temp_U56"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4e", "dev_type":"lm75"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                { "attr_name": "temp1_max_hyst"},
+                { "attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "TEMP3":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP3", "device_parent":"FPGAPCIE0"},
+        "dev_attr": { "display_name":"Switch_Temp_U17"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4c", "dev_type":"lm75"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                { "attr_name": "temp1_max_hyst"},
+                { "attr_name": "temp1_input"}
+            ]
+        }
+    },
+     "TEMP4":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP4", "device_parent":"FPGAPCIE0"},
+        "dev_attr": { "display_name":"Switch_Temp_U18"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x49", "dev_type":"lm75"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                { "attr_name": "temp1_max_hyst"},
+                { "attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "TEMP5":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP5", "device_parent":"FPGAPCIE0"},
+        "dev_attr": { "display_name":"Switch_Temp_U28"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4a", "dev_type":"lm75"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                { "attr_name": "temp1_max_hyst"},
+                { "attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "TEMP6":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP6", "device_parent":"FPGAPCIE0"},
+        "dev_attr": { "display_name":"Switch_Temp_U29"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6d", "dev_addr":"0x4b", "dev_type":"lm75"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                { "attr_name": "temp1_max_hyst"},
+                { "attr_name": "temp1_input"}
+            ]
+        }
+    },
+
+    "CPLD_BASEBOARD":
+    {
+        "dev_info": { "device_type":"CPLD", "device_name":"CPLD BASE", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x69", "dev_addr":"0x0d", "dev_type":"i2c_cpld"},
+            "dev_attr":{}
+        }
+    },
+
+    "EEPROM_BASEBOARD":
+    {
+        "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM_BASEBOARD", "device_parent": "FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus": "0x68", "dev_addr": "0x57", "dev_type": "24lc64t"},
+            "dev_attr": {"access_mode": "BLOCK"},
+            "attr_list": [
+                {"attr_name": "eeprom"}
+            ]
+        }
+    },
+
+    "EEPROM_COME":
+    {
+        "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM_COME", "device_parent": "FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus": "0x67", "dev_addr": "0x50", "dev_type": "24lc64t"},
+            "dev_attr": {"access_mode": "BLOCK"},
+            "attr_list": [
+                {"attr_name": "eeprom"}
+            ]
+        }
+    },
+
+    "CPLD_COME":
+    {
+        "dev_info": { "device_type":"CPLD", "device_name":"CPLD_COME", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x67", "dev_addr":"0x0d", "dev_type":"i2c_cpld"},
+            "dev_attr":{}
+        }
+    },
+
+    "CPLD_S1":
+    {
+        "dev_info": { "device_type":"CPLD", "device_name":"CPLD SW1", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x66", "dev_addr":"0x30", "dev_type":"i2c_cpld"},
+            "dev_attr":{}
+        }
+    },
+
+    "CPLD_S2":
+    {
+        "dev_info": { "device_type":"CPLD", "device_name":"CPLD SW2", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x66", "dev_addr":"0x31", "dev_type":"i2c_cpld"},
+            "dev_attr":{}
+        }
+    },
+
+    "MUX1":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX1", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x65", "dev_addr":"0x72", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x2", "idle_state":"-2" },
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT1" },
+                { "chn":"1", "dev":"PORT2" },
+                { "chn":"2", "dev":"PORT3" },
+                { "chn":"3", "dev":"PORT4" },
+                { "chn":"4", "dev":"PORT5" },
+                { "chn":"5", "dev":"PORT6" },
+                { "chn":"6", "dev":"PORT7" },
+                { "chn":"7", "dev":"PORT8" }
+            ]
+        }
+    },
+
+    "MUX2":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX2", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x65", "dev_addr":"0x73", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0xa", "idle_state":"-2" },
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT9" },
+                { "chn":"1", "dev":"PORT10" },
+                { "chn":"2", "dev":"PORT11" },
+                { "chn":"3", "dev":"PORT12" },
+                { "chn":"4", "dev":"PORT13" },
+                { "chn":"5", "dev":"PORT14" },
+                { "chn":"6", "dev":"PORT15" },
+                { "chn":"7", "dev":"PORT16" }
+            ]
+        }
+    },
+
+    "MUX3":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX3", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x65", "dev_addr":"0x74", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x12", "idle_state":"-2" },
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT17" },
+                { "chn":"1", "dev":"PORT18" },
+                { "chn":"2", "dev":"PORT19" },
+                { "chn":"3", "dev":"PORT20" },
+                { "chn":"4", "dev":"PORT21" },
+                { "chn":"5", "dev":"PORT22" },
+                { "chn":"6", "dev":"PORT23" },
+                { "chn":"7", "dev":"PORT24" }
+            ]
+        }
+    },
+
+    "MUX4":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX4", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x65", "dev_addr":"0x75", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x1a", "idle_state":"-2" },
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT25" },
+                { "chn":"1", "dev":"PORT26" },
+                { "chn":"2", "dev":"PORT27" },
+                { "chn":"3", "dev":"PORT28" },
+                { "chn":"4", "dev":"PORT29" },
+                { "chn":"5", "dev":"PORT30" },
+                { "chn":"6", "dev":"PORT31" },
+                { "chn":"7", "dev":"PORT32" }
+            ]
+        }
+    },
+    "MUX5":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX5", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x64", "dev_addr":"0x72", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x22"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT33" }
+            ]
+        }
+    },
+
+    "MUX6":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX6", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6a", "dev_addr":"0x70", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x2a", "idle_state":"-2" },
+            "channel":
+            [
+                { "chn":"0", "dev":"PSU1" },
+                { "chn":"0", "dev":"PSU1-EEPROM" },
+                { "chn":"1", "dev":"PSU2" },
+                { "chn":"1", "dev":"PSU2-EEPROM" }
+            ]
+        }
+    },
+
+    "MUX7":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX7", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6e", "dev_addr":"0x77", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x32", "idle_state":"-2" },
+            "channel":
+            [
+                { "chn":"0", "dev":"FANTRAY1_EEPROM" },
+                { "chn":"1", "dev":"FANTRAY2_EEPROM" },
+                { "chn":"3", "dev":"FANTRAY3_EEPROM" },
+                { "chn":"4", "dev":"FANTRAY4_EEPROM" }
+            ]
+        }
+    },
+
+    "PORT1":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT1", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"1"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT1-EEPROM" },
+                { "itf":"control", "dev":"PORT1-CTRL" }
+
+            ]
+        }
+    },
+    "PORT1-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT1-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT1-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT1-CTRL", "device_parent":"MUX1", "virt_parent":"PORT1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+    "PORT2":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT2", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"2"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT2-EEPROM" },
+                { "itf":"control", "dev":"PORT2-CTRL" }
+            ]
+        }
+    },
+
+    "PORT2-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT2-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT2"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT2-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT2-CTRL", "device_parent":"MUX1", "virt_parent":"PORT2"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x10", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT3":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT3", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"3"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT3-EEPROM" },
+                { "itf":"control", "dev":"PORT3-CTRL" }
+            ]
+        }
+    },
+    "PORT3-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT3-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT3"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x4", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT3-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT3-CTRL", "device_parent":"MUX1", "virt_parent":"PORT3"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x4", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x20", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT4":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT4", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"4"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT4-EEPROM" },
+                { "itf":"control", "dev":"PORT4-CTRL" }
+            ]
+        }
+    },
+    "PORT4-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT4-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT4"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x5", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT4-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT4-CTRL", "device_parent":"MUX1", "virt_parent":"PORT4"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x5", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x30", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT5":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT5", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"5"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT5-EEPROM" },
+                { "itf":"control", "dev":"PORT5-CTRL" }
+            ]
+        }
+    },
+
+    "PORT5-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT5-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT5"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT5-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT5-CTRL", "device_parent":"MUX1", "virt_parent":"PORT5"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x40", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT6":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT6", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"6"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT6-EEPROM" },
+                { "itf":"control", "dev":"PORT6-CTRL" }
+            ]
+        }
+    },
+    "PORT6-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT6-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT6"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x7", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT6-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT6-CTRL", "device_parent":"MUX1", "virt_parent":"PORT6"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x7", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x50", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT7":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT7", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"7"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT7-EEPROM" },
+                { "itf":"control", "dev":"PORT7-CTRL" }
+            ]
+        }
+    },
+    "PORT7-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT7-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT7"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x8", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT7-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT7-CTRL", "device_parent":"MUX1", "virt_parent":"PORT7"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x8", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x60", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT8":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT8", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"8"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT8-EEPROM" },
+                { "itf":"control", "dev":"PORT8-CTRL" }
+            ]
+        }
+    },
+    "PORT8-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT8-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT8"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x9", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT8-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT8-CTRL", "device_parent":"MUX1", "virt_parent":"PORT8"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x9", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x70", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT9":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT9", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"9"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT9-EEPROM" },
+                { "itf":"control", "dev":"PORT9-CTRL" }
+            ]
+        }
+    },
+    "PORT9-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT9-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT9"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xa", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT9-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT9-CTRL", "device_parent":"MUX2", "virt_parent":"PORT9"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xa", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x80", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT10":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT10", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"10"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT10-EEPROM" },
+                { "itf":"control", "dev":"PORT10-CTRL" }
+            ]
+        }
+    },
+    "PORT10-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT10-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT10"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xb", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT10-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT10-CTRL", "device_parent":"MUX2", "virt_parent":"PORT10"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xb", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x90", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT11":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT11", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"11"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT11-EEPROM" },
+                { "itf":"control", "dev":"PORT11-CTRL" }
+            ]
+        }
+    },
+    "PORT11-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT11-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT11"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xc", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT11-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT11-CTRL", "device_parent":"MUX2", "virt_parent":"PORT11"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xc", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xa0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT12":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT12", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"12"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT12-EEPROM" },
+                { "itf":"control", "dev":"PORT12-CTRL" }
+            ]
+        }
+    },
+    "PORT12-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT12-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT12"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xd", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT12-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT12-CTRL", "device_parent":"MUX2", "virt_parent":"PORT12"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xd", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xb0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT13":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT13", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"13"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT13-EEPROM" },
+                { "itf":"control", "dev":"PORT13-CTRL" }
+            ]
+        }
+    },
+    "PORT13-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT13-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT13"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xe", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT13-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT13-CTRL", "device_parent":"MUX2", "virt_parent":"PORT13"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xe", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xc0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT14":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT14", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"14"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT14-EEPROM" },
+                { "itf":"control", "dev":"PORT14-CTRL" }
+            ]
+        }
+    },
+    "PORT14-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT14-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT14"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xF", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT14-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT14-CTRL", "device_parent":"MUX2", "virt_parent":"PORT14"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xf", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xd0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT15":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT15", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"15"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT15-EEPROM" },
+                { "itf":"control", "dev":"PORT15-CTRL" }
+            ]
+        }
+    },
+    "PORT15-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT15-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT15"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT15-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT15-CTRL", "device_parent":"MUX2", "virt_parent":"PORT15"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x10", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xe0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT16":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT16", "device_parent":"MUX2"},
+        "dev_attr": { "dev_idx":"16"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT16-EEPROM" },
+                { "itf":"control", "dev":"PORT16-CTRL" }
+            ]
+        }
+    },
+    "PORT16-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT16-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT16"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT16-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT16-CTRL", "device_parent":"MUX2", "virt_parent":"PORT16"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x11", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0xf0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT17":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT17", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"17"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT17-EEPROM" },
+                { "itf":"control", "dev":"PORT17-CTRL" }
+            ]
+        }
+    },
+    "PORT17-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT17-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT17"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT17-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT17-CTRL", "device_parent":"MUX3", "virt_parent":"PORT17"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x12", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x100", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT18":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT18", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"18"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT18-EEPROM" },
+                { "itf":"control", "dev":"PORT18-CTRL" }
+            ]
+        }
+    },
+    "PORT18-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT18-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT18"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT18-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT18-CTRL", "device_parent":"MUX3", "virt_parent":"PORT18"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x13", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x110", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT19":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT19", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"19"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT19-EEPROM" },
+                { "itf":"control", "dev":"PORT19-CTRL" }
+            ]
+        }
+    },
+    "PORT19-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT19-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT19"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT19-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT19-CTRL", "device_parent":"MUX3", "virt_parent":"PORT19"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x14", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x120", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT20":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT20", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"20"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT20-EEPROM" },
+                { "itf":"control", "dev":"PORT20-CTRL" }
+            ]
+        }
+    },
+    "PORT20-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT20-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT20"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT20-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT20-CTRL", "device_parent":"MUX3", "virt_parent":"PORT20"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x15", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x130", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT21":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT21", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"21"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT21-EEPROM" },
+                { "itf":"control", "dev":"PORT21-CTRL" }
+            ]
+        }
+    },
+    "PORT21-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT21-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT21"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT21-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT21-CTRL", "device_parent":"MUX3", "virt_parent":"PORT21"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x16", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x140", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT22":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT22", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"22"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT22-EEPROM" },
+                { "itf":"control", "dev":"PORT22-CTRL" }
+            ]
+        }
+    },
+    "PORT22-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT22-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT22"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT22-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT22-CTRL", "device_parent":"MUX3", "virt_parent":"PORT22"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x17", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x150", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT23":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT23", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"23"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT23-EEPROM" },
+                { "itf":"control", "dev":"PORT23-CTRL" }
+            ]
+        }
+    },
+    "PORT23-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT23-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT23"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x18", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT23-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT23-CTRL", "device_parent":"MUX3", "virt_parent":"PORT23"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x18", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x160", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT24":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT24", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"24"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT24-EEPROM" },
+                { "itf":"control", "dev":"PORT24-CTRL" }
+            ]
+        }
+    },
+    "PORT24-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT24-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT24"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x19", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT24-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT24-CTRL", "device_parent":"MUX3", "virt_parent":"PORT24"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x19", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x170", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT25":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT25", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"25"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT25-EEPROM" },
+                { "itf":"control", "dev":"PORT25-CTRL" }
+            ]
+        }
+    },
+    "PORT25-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT25-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT25"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT25-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT25-CTRL", "device_parent":"MUX4", "virt_parent":"PORT25"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x180", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT26":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT26", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"26"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT26-EEPROM" },
+                { "itf":"control", "dev":"PORT26-CTRL" }
+            ]
+        }
+    },
+    "PORT26-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT26-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT26"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+
+    "PORT26-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT26-CTRL", "device_parent":"MUX4", "virt_parent":"PORT26"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x190", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT27":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT27", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"27"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT27-EEPROM" },
+                { "itf":"control", "dev":"PORT27-CTRL" }
+            ]
+        }
+    },
+    "PORT27-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT27-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT27"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT27-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT27-CTRL", "device_parent":"MUX4", "virt_parent":"PORT27"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1a0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT28":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT28", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"28"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT28-EEPROM" },
+                { "itf":"control", "dev":"PORT28-CTRL" }
+            ]
+        }
+    },
+    "PORT28-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT28-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT28"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT28-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT28-CTRL", "device_parent":"MUX4", "virt_parent":"PORT28"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1b0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT29":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT29", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"29"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT29-EEPROM" },
+                { "itf":"control", "dev":"PORT29-CTRL" }
+            ]
+        }
+    },
+    "PORT29-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT29-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT29"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT29-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT29-CTRL", "device_parent":"MUX4", "virt_parent":"PORT29"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1c0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT30":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT30", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"30"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT30-EEPROM" },
+                { "itf":"control", "dev":"PORT30-CTRL" }
+            ]
+        }
+    },
+    "PORT30-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT30-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT30"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT30-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT30-CTRL", "device_parent":"MUX4", "virt_parent":"PORT30"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1d0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT31":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT31", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"31"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT31-EEPROM" },
+                { "itf":"control", "dev":"PORT31-CTRL" }
+            ]
+        }
+    },
+    "PORT31-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT31-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT31"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x20", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT31-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT31-CTRL", "device_parent":"MUX4", "virt_parent":"PORT31"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x20", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1e0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT32":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT32", "device_parent":"MUX4"},
+        "dev_attr": { "dev_idx":"32"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT32-EEPROM" },
+                { "itf":"control", "dev":"PORT32-CTRL" }
+            ]
+        }
+    },
+    "PORT32-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT32-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT32"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x21", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT32-CTRL":
+    {
+        "dev_info": { "device_type":"pci", "device_name":"PORT32-CTRL", "device_parent":"MUX4", "virt_parent":"PORT32"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x21", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x1f0", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT33":
+    {
+        "dev_info": { "device_type":"SFP+", "device_name":"PORT33", "device_parent":"MUX5"},
+        "dev_attr": { "dev_idx":"33"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT33-EEPROM" },
+                { "itf":"control", "dev":"PORT33-CTRL" }
+            ]
+        }
+    },
+    "PORT33-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT33-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT33"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x22", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT33-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT33-CTRL", "device_parent":"MUX5", "virt_parent":"PORT33"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x22", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x1010", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x1014", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x1018", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x200", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PSU1":
+    {
+        "dev_info": { "device_type":"PSU", "device_name":"PSU 1", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"pmbus", "dev":"PSU1-PMBUS" }
+            ]
+        }
+    },
+    "PSU1-PMBUS":
+    {
+        "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU1-PMBUS", "device_parent":"MUX6", "virt_parent":"PSU1" },
+        "i2c":
+        {
+            "topo_info":{ "parent_bus":"0x2a", "dev_addr":"0x5a", "dev_type":"psu_pmbus"},
+            "attr_list":
+            [
+                {"attr_name":"psu_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0x60", "attr_mask":"0x08", "attr_cmpval":"0x00", "attr_len":"1"},
+                {"attr_name":"psu_power_good", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0x60", "attr_mask":"0x02", "attr_cmpval":"0x02", "attr_len":"1"},
+                {"attr_name":"psu_model_name", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"},
+                {"attr_name":"psu_serial_num", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"13"},
+                {"attr_name":"psu_mfr_id", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"7"},
+                {"attr_name":"psu_fan_dir", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"1"},
+                {"attr_name":"psu_p_out", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_out", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_i_out", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_p_in", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x97", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_in", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_i_in", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_temp1_input", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0x8e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_out_max", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_out_min", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_p_out_max", "attr_devaddr":"0x5a", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
+            ]
+        }
+    },
+    "PSU1-EEPROM":
+    {
+        "dev_info": {"device_type": "EEPROM", "device_name": "PSU1-EEPROM", "device_parent": "MUX6"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus": "0x2a", "dev_addr": "0x52", "dev_type": "24lc64t"},
+            "dev_attr": {"access_mode": "BLOCK"},
+            "attr_list": [
+                {"attr_name": "eeprom"}
+            ]
+        }
+    },
+
+    "PSU2":
+    {
+        "dev_info": { "device_type":"PSU", "device_name":"PSU 2", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"2", "num_psu_fans": "1"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"pmbus", "dev":"PSU2-PMBUS" }
+            ]
+        }
+    },
+    "PSU2-PMBUS":
+    {
+        "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU2-PMBUS", "device_parent":"MUX6", "virt_parent":"PSU2" },
+        "i2c":
+        {
+            "topo_info":{ "parent_bus":"0x2b", "dev_addr":"0x5b", "dev_type":"psu_pmbus"},
+            "attr_list":
+            [
+                {"attr_name":"psu_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0x60", "attr_mask":"0x04", "attr_cmpval":"0x00", "attr_len":"1"},
+                {"attr_name":"psu_power_good", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0x60", "attr_mask":"0x01", "attr_cmpval":"0x01", "attr_len":"1"},
+                {"attr_name":"psu_model_name", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"},
+                {"attr_name":"psu_serial_num", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"13"},
+                {"attr_name":"psu_mfr_id", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"7"},
+                {"attr_name":"psu_fan_dir", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"1"},
+                {"attr_name":"psu_p_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_i_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_p_in", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x97", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_in", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_i_in", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_temp1_input", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_out_max", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_out_min", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_p_out_max", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
+            ]
+        }
+    },
+    "PSU2-EEPROM":
+    {
+        "dev_info": {"device_type": "EEPROM", "device_name": "PSU2-EEPROM", "device_parent": "MUX6"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus": "0x2b", "dev_addr": "0x53", "dev_type": "24lc64t"},
+            "dev_attr": {"access_mode": "BLOCK"},
+            "attr_list": [
+                {"attr_name": "eeprom"}
+            ]
+        }
+    },
+
+    "FANTRAY1_EEPROM":
+    {
+        "dev_info": {"device_type": "EEPROM", "device_name": "FANTRAY1_EEPROM", "device_parent": "MUX7"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus": "0x32", "dev_addr": "0x50", "dev_type": "24c64"},
+            "dev_attr": {"access_mode": "BLOCK"},
+            "attr_list": [
+                {"attr_name": "eeprom"}
+            ]
+        }
+    },
+    "FANTRAY2_EEPROM":
+    {
+        "dev_info": {"device_type": "EEPROM", "device_name": "FANTRAY2_EEPROM", "device_parent": "MUX7"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus": "0x33", "dev_addr": "0x50", "dev_type": "24c64"},
+            "dev_attr": {"access_mode": "BLOCK"},
+            "attr_list": [
+                {"attr_name": "eeprom"}
+            ]
+        }
+    },
+    "FANTRAY3_EEPROM":
+    {
+        "dev_info": {"device_type": "EEPROM", "device_name": "FANTRAY3_EEPROM", "device_parent": "MUX7"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus": "0x35", "dev_addr": "0x50", "dev_type": "24c64"},
+            "dev_attr": {"access_mode": "BLOCK"},
+            "attr_list": [
+                {"attr_name": "eeprom"}
+            ]
+        }
+    },
+    "FANTRAY4_EEPROM":
+    {
+        "dev_info": {"device_type": "EEPROM", "device_name": "FANTRAY4_EEPROM", "device_parent": "MUX7"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus": "0x36", "dev_addr": "0x50", "dev_type": "24c64"},
+            "dev_attr": {"access_mode": "BLOCK"},
+            "attr_list": [
+                {"attr_name": "eeprom"}
+            ]
+        }
+    },
+
+    "FAN-CTRL":
+    {
+        "dev_info": { "device_type":"FAN", "device_name":"FAN-CTRL", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x69", "dev_addr":"0x16", "dev_type":"fan_cpld"},
+            "dev_attr":  { "num_fantrays":"4"},
+            "attr_list":
+            [
+                {"attr_name":"fan1_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb4", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"},
+                {"attr_name":"fan2_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb4", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"},
+                {"attr_name":"fan3_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xba", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"},
+                {"attr_name":"fan4_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xba", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"},
+                {"attr_name":"fan5_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc6", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"},
+                {"attr_name":"fan6_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc6", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"},
+                {"attr_name":"fan7_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xcc", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"},
+                {"attr_name":"fan8_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xcc", "attr_mask":"0x01", "attr_cmpval": "0x1", "attr_len":"1"},
+                {"attr_name":"fan1_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb4", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"},
+                {"attr_name":"fan2_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb4", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"},
+                {"attr_name":"fan3_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xba", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"},
+                {"attr_name":"fan4_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xba", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"},
+                {"attr_name":"fan5_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc6", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"},
+                {"attr_name":"fan6_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc6", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"},
+                {"attr_name":"fan7_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xcc", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"},
+                {"attr_name":"fan8_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xcc", "attr_mask":"0x02", "attr_cmpval": "0x2", "attr_len":"1"},
+                {"attr_name":"fan1_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb0", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0},
+                {"attr_name":"fan2_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb1", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0},
+                {"attr_name":"fan3_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb6", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0},
+                {"attr_name":"fan4_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb7", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0},
+                {"attr_name":"fan5_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc2", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0},
+                {"attr_name":"fan6_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc3", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0},
+                {"attr_name":"fan7_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc8", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0},
+                {"attr_name":"fan8_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc9", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"120", "attr_is_divisor":0},
+                {"attr_name":"fan1_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb2", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"},
+                {"attr_name":"fan2_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb2", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"},
+                {"attr_name":"fan3_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb8", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"},
+                {"attr_name":"fan4_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xb8", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"},
+                {"attr_name":"fan5_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc4", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"},
+                {"attr_name":"fan6_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xc4", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"},
+                {"attr_name":"fan7_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xca", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"},
+                {"attr_name":"fan8_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "attr_offset":"0xca", "attr_mask":"0xff", "attr_cmpval": "0x0","attr_len":"1"}
+            ]
+        }
+    },
+
+    "FANTRAY1_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
+        "dev_attr": { "index":"0"},
+        "i2c" : {
+            "attr_list":
+            [
+                {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xb3"},
+                {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xb3"},
+                {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xb3"}
+            ]
+        }
+    },
+    "FANTRAY2_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
+        "dev_attr": { "index":"1"},
+        "i2c" : {
+            "attr_list":
+            [
+                {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xb9"},
+                {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xb9"},
+                {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xb9"}
+            ]
+        }
+    },
+    "FANTRAY3_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
+        "dev_attr": { "index":"2"},
+        "i2c" : {
+            "attr_list":
+            [
+                {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xbf"},
+                {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xbf"},
+                {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xbf"}
+            ]
+        }
+    },
+    "FANTRAY4_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
+        "dev_attr": { "index":"3"},
+        "i2c" : {
+            "attr_list":
+            [
+                {"attr_name":"off","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Off","value":"0x03","swpld_addr":"0x0d","swpld_addr_offset":"0xc5"},
+                {"attr_name":"green","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Green","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0xc5"},
+                {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"CPLD_BASEBOARD","bits":"1:0","descr":"Amber","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0xc5"}
+            ]
+        }
+    },
+
+    "PSU_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"PSU_LED"},
+        "dev_attr": { "index":"0", "flag": "rw"},
+        "i2c" : {
+            "attr_list":
+            [
+                {"attr_name":"green", "descr": "Green", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "bits" : "7:6", "value" : "0x1", "swpld_addr" : "0x0d", "swpld_addr_offset" : "0x61"},
+                {"attr_name":"amber", "descr": "Amber", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "bits" : "7:6", "value" : "0x2", "swpld_addr" : "0x0d", "swpld_addr_offset" : "0x61"},
+                {"attr_name":"off", "descr": "Off", "attr_devtype":"cpld", "attr_devname":"CPLD_BASEBOARD", "bits" : "7:6", "value" : "0x3", "swpld_addr" : "0x0d", "swpld_addr_offset" : "0x61"}
+            ]
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_ds3000-r0/pddf_support b/device/celestica/x86_64-cel_ds3000-r0/pddf_support
new file mode 100644
index 000000000000..e69de29bb2d1
diff --git a/device/celestica/x86_64-cel_ds3000-r0/platform.json b/device/celestica/x86_64-cel_ds3000-r0/platform.json
new file mode 100644
index 000000000000..c180d6d186d5
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/platform.json
@@ -0,0 +1,267 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1",
+            "lanes": "1,2,3,4",
+            "breakout_modes": {
+                "1x100G":["Eth1/1"],
+                "1x40G": ["Eth1/1"]
+            }
+        },
+        "Ethernet4": {
+            "index": "2,2,2,2",
+            "lanes": "5,6,7,8",
+            "breakout_modes": {
+                "1x100G": ["Eth2/1"],
+                "1x40G": ["Eth2/1"]
+            }
+        },
+        "Ethernet8": {
+            "index": "3,3,3,3",
+            "lanes": "9,10,11,12",
+            "breakout_modes": {
+                "1x100G": ["Eth3/1"],
+                "1x40G": ["Eth3/1"]
+            }
+        },
+        "Ethernet12": {
+            "index": "4,4,4,4",
+            "lanes": "13,14,15,16",
+            "breakout_modes": {
+                "1x100G": ["Eth4/1"],
+                "1x40G": ["Eth4/1"]
+            }
+        },
+        "Ethernet16": {
+            "index": "5,5,5,5",
+            "lanes": "17,18,19,20",
+            "breakout_modes": {
+                "1x100G": ["Eth5/1"],
+                "1x40G": ["Eth5/1"]
+            }
+        },
+        "Ethernet20": {
+            "index": "6,6,6,6",
+            "lanes": "21,22,23,24",
+            "breakout_modes": {
+                "1x100G": ["Eth6/1"],
+                "1x40G": ["Eth6/1"]
+            }
+        },
+        "Ethernet24": {
+            "index": "7,7,7,7",
+            "lanes": "25,26,27,28",
+            "breakout_modes": {
+                "1x100G": ["Eth7/1"],
+                "1x40G": ["Eth7/1"]
+            }
+        },
+        "Ethernet28": {
+            "index": "8,8,8,8",
+            "lanes": "29,30,31,32",
+            "breakout_modes": {
+                "1x100G": ["Eth8/1"],
+                "1x40G": ["Eth8/1"]
+            }
+        },
+        "Ethernet32": {
+            "index": "9,9,9,9",
+            "lanes": "33,34,35,36",
+            "breakout_modes": {
+                "1x100G": ["Eth9/1"],
+                "1x40G": ["Eth9/1"]
+            }
+        },
+        "Ethernet36": {
+            "index": "10,10,10,10",
+            "lanes": "37,38,39,40",
+            "breakout_modes": {
+                "1x100G": ["Eth10/1"],
+                "1x40G": ["Eth10/1"]
+            }
+        },
+        "Ethernet40": {
+            "index": "11,11,11,11",
+            "lanes": "41,42,43,44",
+            "breakout_modes": {
+                "1x100G": ["Eth11/1"],
+                "1x40G": ["Eth11/1"]
+            }
+        },
+        "Ethernet44": {
+            "index": "12,12,12,12",
+            "lanes": "45,46,47,48",
+            "breakout_modes": {
+                "1x100G": ["Eth12/1"],
+                "1x40G": ["Eth12/1"]
+            }
+        },
+        "Ethernet48": {
+            "index": "13,13,13,13",
+            "lanes": "49,50,51,52",
+            "breakout_modes": {
+                "1x100G": ["Eth13/1"],
+                "1x40G": ["Eth13/1"]
+            }
+        },
+        "Ethernet52": {
+            "index": "14,14,14,14",
+            "lanes": "53,54,55,56",
+            "breakout_modes": {
+                "1x100G": ["Eth14/1"],
+                "1x40G": ["Eth14/1"]
+            }
+        },
+        "Ethernet56": {
+            "index": "15,15,15,15",
+            "lanes": "57,58,59,60",
+            "breakout_modes": {
+                "1x100G": ["Eth15/1"],
+                "1x40G": ["Eth15/1"]
+            }
+        },
+        "Ethernet60": {
+            "index": "16,16,16,16",
+            "lanes": "61,62,63,64",
+            "breakout_modes": {
+                "1x100G": ["Eth16/1"],
+                "1x40G": ["Eth16/1"]
+            }
+        },
+        "Ethernet64": {
+            "index": "17,17,17,17",
+            "lanes": "65,66,67,68",
+            "breakout_modes": {
+                "1x100G": ["Eth17/1"],
+                "1x40G": ["Eth17/1"]
+            }
+        },
+        "Ethernet68": {
+            "index": "18,18,18,18",
+            "lanes": "69,70,71,72",
+            "breakout_modes": {
+                "1x100G": ["Eth18/1"],
+                "1x40G": ["Eth18/1"]
+            }
+        },
+        "Ethernet72": {
+            "index": "19,19,19,19",
+            "lanes": "73,74,75,76",
+            "breakout_modes": {
+                "1x100G": ["Eth19/1"],
+                "1x40G": ["Eth19/1"]
+            }
+        },
+        "Ethernet76": {
+            "index": "20,20,20,20",
+            "lanes": "77,78,79,80",
+            "breakout_modes": {
+                "1x100G": ["Eth20/1"],
+                "1x40G": ["Eth20/1"]
+            }
+        },
+        "Ethernet80": {
+            "index": "21,21,21,21",
+            "lanes": "81,82,83,84",
+            "breakout_modes": {
+                "1x100G": ["Eth21/1"],
+                "1x40G": ["Eth21/1"]
+            }
+        },
+        "Ethernet84": {
+            "index": "22,22,22,22",
+            "lanes": "85,86,87,88",
+            "breakout_modes": {
+                "1x100G": ["Eth22/1"],
+                "1x40G": ["Eth22/1"]
+            }
+        },
+        "Ethernet88": {
+            "index": "23,23,23,23",
+            "lanes": "89,90,91,92",
+            "breakout_modes": {
+                "1x100G": ["Eth23/1"],
+                "1x40G": ["Eth23/1"]
+            }
+        },
+        "Ethernet92": {
+            "index": "24,24,24,24",
+            "lanes": "93,94,95,96",
+            "breakout_modes": {
+                "1x100G": ["Eth24/1"],
+                "1x40G": ["Eth24/1"]
+            }
+        },
+        "Ethernet96": {
+            "index": "25,25,25,25",
+            "lanes": "97,98,99,100",
+            "breakout_modes": {
+                "1x100G": ["Eth25/1"],
+                "1x40G": ["Eth25/1"]
+            }
+        },
+        "Ethernet100": {
+            "index": "26,26,26,26",
+            "lanes": "101,102,103,104",
+            "breakout_modes": {
+                "1x100G": ["Eth26/1"],
+                "1x40G": ["Eth26/1"]
+            }
+        },
+        "Ethernet104": {
+            "index": "27,27,27,27",
+            "lanes": "105,106,107,108",
+            "breakout_modes": {
+                "1x100G": ["Eth27/1"],
+                "1x40G": ["Eth27/1"]
+            }
+        },
+        "Ethernet108": {
+            "index": "28,28,28,28",
+            "lanes": "109,110,111,112",
+            "breakout_modes": {
+                "1x100G": ["Eth28/1"],
+                "1x40G": ["Eth28/1"]
+            }
+        },
+        "Ethernet112": {
+            "index": "29,29,29,29",
+            "lanes": "113,114,115,116",
+            "breakout_modes": {
+                "1x100G": ["Eth29/1"],
+                "1x40G": ["Eth29/1"]
+            }
+        },
+        "Ethernet116": {
+            "index": "30,30,30,30",
+            "lanes": "117,118,119,120",
+            "breakout_modes": {
+                "1x100G": ["Eth30/1"],
+                "1x40G": ["Eth30/1"]
+            }
+        },
+        "Ethernet120": {
+            "index": "31,31,31,31",
+            "lanes": "121,122,123,124",
+            "breakout_modes": {
+                "1x100G": ["Eth31/1"],
+                "1x40G": ["Eth31/1"]
+            }
+        },
+        "Ethernet124": {
+            "index": "32,32,32,32",
+            "lanes": "125,126,127,128",
+            "breakout_modes": {
+                "1x100G": ["Eth32/1"],
+                "1x40G": ["Eth32/1"]
+            }
+        },
+        "Ethernet128": {
+            "index": "33",
+            "lanes": "129",
+            "breakout_modes": {
+                "1x10G": ["Eth33/1"]
+            }
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_ds3000-r0/platform_asic b/device/celestica/x86_64-cel_ds3000-r0/platform_asic
new file mode 100644
index 000000000000..960467652765
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/celestica/x86_64-cel_ds3000-r0/platform_components.json b/device/celestica/x86_64-cel_ds3000-r0/platform_components.json
new file mode 100644
index 000000000000..fa985b8f01e9
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/platform_components.json
@@ -0,0 +1,18 @@
+{
+    "chassis": {
+        "DS3000": {
+            "component": {
+                "BIOS": {},
+                "ONIE": {},
+                "BMC": {},
+                "FPGA": {},
+                "CPLD COMe": {},
+                "CPLD BASE": {},
+                "CPLD SW1": {},
+                "CPLD SW2": {},
+                "ASIC PCIe": {},
+                "SSD": {}
+            }
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_ds3000-r0/platform_reboot b/device/celestica/x86_64-cel_ds3000-r0/platform_reboot
new file mode 100755
index 000000000000..b5212804e636
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/platform_reboot
@@ -0,0 +1,3 @@
+#!/bin/bash
+
+/usr/local/bin/ds3000_platform_shutdown.sh system
diff --git a/device/celestica/x86_64-cel_ds3000-r0/pmon_daemon_control.json b/device/celestica/x86_64-cel_ds3000-r0/pmon_daemon_control.json
new file mode 100644
index 000000000000..5e59513ef696
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/pmon_daemon_control.json
@@ -0,0 +1,7 @@
+{
+    "skip_ledd": true,
+    "skip_xcvrd": false,
+    "skip_psud": false,
+    "skip_syseepromd": false,
+    "skip_fancontrol": true
+}
\ No newline at end of file
diff --git a/device/celestica/x86_64-cel_ds3000-r0/sensors.conf b/device/celestica/x86_64-cel_ds3000-r0/sensors.conf
new file mode 100644
index 000000000000..8d441077a677
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/sensors.conf
@@ -0,0 +1,87 @@
+# LM75B temperature sensors
+bus "i2c-109" "i2c-pci-9"
+    chip "lm75-i2c-109-4a"
+        label temp1 "Switchboard U28 Sensor Temp"
+         set temp1_max 60
+         set temp1_max_hyst 57
+    chip "lm75-i2c-109-4b"
+        label temp1 "Switchboard U29 Sensor Temp"
+        set temp1_max 60
+        set temp1_max_hyst 57
+    chip "lm75-i2c-109-4c"
+        label temp1 "Switchboard U17 Sensor Temp"
+    chip "lm75-i2c-109-49"
+        label temp1 "Switchboard U18 Sensor Temp"
+    chip "lm75-i2c-109-4d"
+        label temp1 "Baseboard U5 Sensor Temp"
+        set temp1_max 55
+        set temp1_max_hyst 52
+    chip "lm75-i2c-109-4e"
+        label temp1 "Baseboard U56 Sensor Temp"
+        set temp1_max 55
+        set temp1_max_hyst 52
+
+# PSU
+bus "i2c-43" "i2c-106-mux (chan_id 1)"
+    chip "psu_pmbus-i2c-43-5b"
+        label in3 "PSU2 input voltage"
+        label fan1 "PSU2 FAN speed"
+        label temp1 "PSU2 temperature"
+        label power2 "PSU2 AC Power Voltage"
+        label curr2 "PSU2 AC current"
+
+bus "i2c-42" "i2c-106-mux (chan_id 0)"
+    chip "psu_pmbus-i2c-42-5a"
+        label in3 "PSU1 input voltage"
+        label fan1 "PSU1 FAN speed"
+        label temp1 "PSU1 temperature"
+        label power2 "PSU1 AC Power Voltage"
+        label curr2 "PSU1 AC current"
+
+# MP2975 power chip
+bus "i2c-108" "i2c-pci-8"
+    chip "mp2975-i2c-108-70"
+        label in1 "VDD ANLG input voltage"
+        label in2 "VDD ANLG output voltage"
+        label in3 "VDD ANLG output voltage"
+        label temp1 "VDD ANLG temperature"
+        label power1 "VDD ANLG input power"
+        label power2 "VDD ANLG output power"
+        label power3 "VDD ANLG output power"
+        label curr1 "VDD ANLG input current"
+        label curr2 "VDD ANLG output current"
+        label curr3 "VDD ANLG output current"
+        label curr4 "VDD ANLG output current"
+        label curr5 "VDD ANLG output current"
+
+bus "i2c-108" "i2c-pci-8"
+    chip "mp2975-i2c-108-7a"
+        label in1 "VDD CORE input voltage"
+        label in2 "VDD CORE output voltage"
+        label in3 "VDD CORE output voltage"
+        label temp1 "VDD CORE temperature"
+        label power1 "VDD CORE input power"
+        label power2 "VDD CORE output power"
+        label power3 "VDD CORE output power"
+        label curr1 "VDD CORE input current"
+        label curr2 "VDD CORE output current"
+        label curr3 "VDD CORE output current"
+        label curr4 "VDD CORE output current"
+        label curr5 "VDD CORE output current"
+        label curr6 "VDD CORE output current"
+        label curr7 "VDD CORE output current"
+        label curr8 "VDD CORE output current"
+        label curr9 "VDD CORE output current"
+        label curr10 "VDD CORE output current"
+
+# CPLD FAN
+bus "i2c-105" "i2c-pci-5"
+    chip "fan_cpld-i2c-105-16"
+        label fan1 "FAN1 Front Fan"
+        label fan2 "FAN1 Rear Fan"
+        label fan3 "FAN2 Front Fan"
+        label fan4 "FAN2 Rear Fan"
+        label fan5 "FAN3 Front Fan"
+        label fan6 "FAN3 Rear Fan"
+        label fan7 "FAN4 Front Fan"
+        label fan8 "FAN4 Rear Fan"
diff --git a/device/celestica/x86_64-cel_ds3000-r0/system_health_monitoring_config.json b/device/celestica/x86_64-cel_ds3000-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000000..5661a0d21396
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/system_health_monitoring_config.json
@@ -0,0 +1,16 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu.temperature",
+        "PSU 1 Fan 1",
+        "PSU 2 Fan 1"
+    ],
+    "user_defined_checkers": [],
+    "polling_interval": 60,
+    "led_color": {
+        "fault": "amber",
+        "normal": "green",
+        "booting": "alternate_blink_4hz"
+    }
+}
diff --git a/device/celestica/x86_64-cel_ds3000-r0/thermal_policy.json b/device/celestica/x86_64-cel_ds3000-r0/thermal_policy.json
new file mode 100644
index 000000000000..515348ec6ab0
--- /dev/null
+++ b/device/celestica/x86_64-cel_ds3000-r0/thermal_policy.json
@@ -0,0 +1,136 @@
+{
+    "interval": 4,
+    "thermal_control_algorithm": {
+        "run_at_boot_up": "True",
+        "fan_speed_when_suspend": "50"
+    },
+    "info_types": [
+        {
+            "type": "fan_info"
+        },
+        {
+            "type": "psu_info"
+        },
+        {
+            "type": "thermal_info"
+        },
+        {
+            "type": "chassis_info"
+        }
+    ],
+    "policies": [
+        {
+            "name": "temp over high critical threshold",
+            "conditions": [
+                {
+                    "type": "thermal.over.high_critical_threshold"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "switch.shutdown"
+                }
+            ]
+        },
+        {
+            "name": "any fantray absence",
+            "conditions": [
+                {
+                    "type": "fantray.any.absence"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "fan.all.set_speed",
+                    "speed": "100"
+                }
+            ]
+        },
+        {
+            "name": "more than one fan rotor failed",
+            "conditions": [
+                {
+                    "type": "fan.rotor.more_than_one.failed"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "fan.all.set_speed",
+                    "speed": "100"
+                }
+            ]
+        },
+        {
+            "name": "any psu absence",
+            "conditions": [
+                {
+                    "type": "psu.any.absence"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "fan.all.set_speed",
+                    "speed": "100"
+                }
+            ]
+        },
+        {
+            "name": "any thermal over high threshold",
+            "conditions": [
+                {
+                    "type": "thermal.any.over.high_threshold"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "fan.all.set_speed",
+                    "speed": "100"
+                }
+            ]
+        },
+        {
+            "name": "any thermal below high threshold",
+            "conditions": [
+                {
+                    "type": "thermal.any.below.low_threshold"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "fan.all.set_speed",
+                    "speed": "10"
+                }
+            ]
+        },
+        {
+            "name": "thermal control algorithm",
+            "conditions": [
+                {
+                    "type": "fantray.all.presence"
+                },
+                {
+                    "type": "fan.rotor.less_than_two.failed"
+                },
+                {
+                    "type": "psu.all.presence"
+                },
+                {
+                    "type": "thermal.all.below.high_threshold"
+                },
+                {
+                    "type": "thermal.all.over.low_threshold"
+                }
+            ],
+            "actions": [
+                {
+                    "thermal_log_level": 5,
+                    "type": "thermal.temp_check_and_fsc_algo_control",
+                    "cpu_pid_params": [78, 3, 0.5, 0.2],
+                    "bcm_pid_params": [88, 4, 0.3, 0.4],
+                    "f2b_linear_params": [34, 54, 3, 35, 100],
+                    "b2f_linear_params": [27, 48, 3, 35, 100]
+                }
+            ]
+        }
+    ]
+}
diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/custom_led.bin b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/custom_led.bin
new file mode 100644
index 0000000000000000000000000000000000000000..b2ed8cb8d09014028181c580ddaaafa943990585
GIT binary patch
literal 248
zcmeycHQp`E&DYJv?ZXx>232oK1`ESZHwKjk#SS-SH6_n3Hzq|vhaNZiiYmED46GTU
z(MAl8ZkkR47n(9INitdqRj^uJ+{B{EdZUXW(5)+Cx*L-c(*q+0h6jvFdQQw265SXy
z87>$xxMpYtGa9p)c)Q-b$f$TQfkBx$QCi6<QPQd@@nE8~A!CxXp<_~0(&41T$%j*H
z_Dpb_>9)viwcCfi2i(?JFfcp;VnZWi6J9=k0Z}n=30XOL1w|!g6-_N|9Y!W*7FITP
mj?l31h}gLJgv6xel+3K`9825E!dgdP*C?RgARq?OFg5^j6GYhn

literal 0
HcmV?d00001

diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/hwsku.json b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/hwsku.json
new file mode 100644
index 000000000000..a559890f3a18
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/hwsku.json
@@ -0,0 +1,284 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet1": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet2": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet3": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet4": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet5": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet6": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet7": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet9": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet10": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet11": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet12": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet13": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet14": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet15": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet17": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet18": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet19": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet20": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet21": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet22": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet23": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet25": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet26": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet27": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet28": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet29": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet30": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet31": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet33": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet34": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet35": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet36": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet37": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet38": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet39": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet41": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet42": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet43": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet44": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet45": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet46": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet47": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet52": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet60": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet68": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet76": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        }
+    }
+}
\ No newline at end of file
diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/platform.json b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/platform.json
new file mode 100644
index 000000000000..0805efbc7ba4
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/platform.json
@@ -0,0 +1,396 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1",
+            "lanes": "49",
+            "breakout_modes": {
+                "1x25G": ["Eth1/1"]
+            }
+        },
+        "Ethernet1": {
+            "index": "2",
+            "lanes": "50",
+            "breakout_modes": {
+                "1x25G": ["Eth2/1"]
+            }
+        },
+        "Ethernet2": {
+            "index": "3",
+            "lanes": "51",
+            "breakout_modes": {
+                "1x25G": ["Eth3/1"]
+            }
+        },
+        "Ethernet3": {
+            "index": "4",
+            "lanes": "52",
+            "breakout_modes": {
+                "1x25G": ["Eth4/1"]
+            }
+        },
+        "Ethernet4": {
+            "index": "5",
+            "lanes": "57",
+            "breakout_modes": {
+                "1x25G": ["Eth5/1"]
+            }
+        },
+        "Ethernet5": {
+            "index": "6",
+            "lanes": "58",
+            "breakout_modes": {
+                "1x25G": ["Eth6/1"]
+            }
+        },
+        "Ethernet6": {
+            "index": "7",
+            "lanes": "59",
+            "breakout_modes": {
+                "1x25G": ["Eth7/1"]
+            }
+        },
+        "Ethernet7": {
+            "index": "8",
+            "lanes": "60",
+            "breakout_modes": {
+                "1x25G": ["Eth8/1"]
+            }
+        },
+        "Ethernet8": {
+            "index": "9",
+            "lanes": "61",
+            "breakout_modes": {
+                "1x25G": ["Eth9/1"]
+            }
+        },
+        "Ethernet9": {
+            "index": "10",
+            "lanes": "62",
+            "breakout_modes": {
+                "1x25G": ["Eth10/1"]
+            }
+        },
+        "Ethernet10": {
+            "index": "11",
+            "lanes": "63",
+            "breakout_modes": {
+                "1x25G": ["Eth11/1"]
+            }
+        },
+        "Ethernet11": {
+            "index": "12",
+            "lanes": "64",
+            "breakout_modes": {
+                "1x25G": ["Eth12/1"]
+            }
+        },
+        "Ethernet12": {
+            "index": "13",
+            "lanes": "77",
+            "breakout_modes": {
+                "1x25G": ["Eth13/1"]
+            }
+        },
+        "Ethernet13": {
+            "index": "14",
+            "lanes": "78",
+            "breakout_modes": {
+                "1x25G": ["Eth14/1"]
+            }
+        },
+        "Ethernet14": {
+            "index": "15",
+            "lanes": "79",
+            "breakout_modes": {
+                "1x25G": ["Eth15/1"]
+            }
+        },
+        "Ethernet15": {
+            "index": "16",
+            "lanes": "80",
+            "breakout_modes": {
+                "1x25G": ["Eth16/1"]
+            }
+        },
+        "Ethernet16": {
+            "index": "17",
+            "lanes": "85",
+            "breakout_modes": {
+                "1x25G": ["Eth17/1"]
+            }
+        },
+        "Ethernet17": {
+            "index": "18",
+            "lanes": "86",
+            "breakout_modes": {
+                "1x25G": ["Eth18/1"]
+            }
+        },
+        "Ethernet18": {
+            "index": "19",
+            "lanes": "87",
+            "breakout_modes": {
+                "1x25G": ["Eth19/1"]
+            }
+        },
+        "Ethernet19": {
+            "index": "20",
+            "lanes": "88",
+            "breakout_modes": {
+                "1x25G": ["Eth20/1"]
+            }
+        },
+        "Ethernet20": {
+            "index": "21",
+            "lanes": "93",
+            "breakout_modes": {
+                "1x25G": ["Eth21/1"]
+            }
+        },
+        "Ethernet21": {
+            "index": "22",
+            "lanes": "94",
+            "breakout_modes": {
+                "1x25G": ["Eth22/1"]
+            }
+        },
+        "Ethernet22": {
+            "index": "23",
+            "lanes": "95",
+            "breakout_modes": {
+                "1x25G": ["Eth23/1"]
+            }
+        },
+        "Ethernet23": {
+            "index": "24",
+            "lanes": "96",
+            "breakout_modes": {
+                "1x25G": ["Eth24/1"]
+            }
+        },
+        "Ethernet24": {
+            "index": "25",
+            "lanes": "13",
+            "breakout_modes": {
+                "1x25G": ["Eth25/1"]
+            }
+        },
+        "Ethernet25": {
+            "index": "26",
+            "lanes": "14",
+            "breakout_modes": {
+                "1x25G": ["Eth26/1"]
+            }
+        },
+        "Ethernet26": {
+            "index": "27",
+            "lanes": "15",
+            "breakout_modes": {
+                "1x25G": ["Eth27/1"]
+            }
+        },
+        "Ethernet27": {
+            "index": "28",
+            "lanes": "16",
+            "breakout_modes": {
+                "1x25G": ["Eth28/1"]
+            }
+        },
+        "Ethernet28": {
+            "index": "29",
+            "lanes": "21",
+            "breakout_modes": {
+                "1x25G": ["Eth29/1"]
+            }
+        },
+        "Ethernet29": {
+            "index": "30",
+            "lanes": "22",
+            "breakout_modes": {
+                "1x25G": ["Eth30/1"]
+            }
+        },
+        "Ethernet30": {
+            "index": "31",
+            "lanes": "23",
+            "breakout_modes": {
+                "1x25G": ["Eth31/1"]
+            }
+        },
+        "Ethernet31": {
+            "index": "32",
+            "lanes": "24",
+            "breakout_modes": {
+                "1x25G": ["Eth32/1"]
+            }
+        },
+        "Ethernet32": {
+            "index": "33",
+            "lanes": "29",
+            "breakout_modes": {
+                "1x25G": ["Eth33/1"]
+            }
+        },
+        "Ethernet33": {
+            "index": "34",
+            "lanes": "30",
+            "breakout_modes": {
+                "1x25G": ["Eth34/1"]
+            }
+        },
+        "Ethernet34": {
+            "index": "35",
+            "lanes": "31",
+            "breakout_modes": {
+                "1x25G": ["Eth35/1"]
+            }
+        },
+        "Ethernet35": {
+            "index": "36",
+            "lanes": "32",
+            "breakout_modes": {
+                "1x25G": ["Eth36/1"]
+            }
+        },
+        "Ethernet36": {
+            "index": "37",
+            "lanes": "97",
+            "breakout_modes": {
+                "1x25G": ["Eth37/1"]
+            }
+        },
+        "Ethernet37": {
+            "index": "38",
+            "lanes": "98",
+            "breakout_modes": {
+                "1x25G": ["Eth38/1"]
+            }
+        },
+        "Ethernet38": {
+            "index": "39",
+            "lanes": "99",
+            "breakout_modes": {
+                "1x25G": ["Eth39/1"]
+            }
+        },
+        "Ethernet39": {
+            "index": "40",
+            "lanes": "100",
+            "breakout_modes": {
+                "1x25G": ["Eth40/1"]
+            }
+        },
+        "Ethernet40": {
+            "index": "41",
+            "lanes": "105",
+            "breakout_modes": {
+                "1x25G": ["Eth41/1"]
+            }
+        },
+        "Ethernet41": {
+            "index": "42",
+            "lanes": "106",
+            "breakout_modes": {
+                "1x25G": ["Eth42/1"]
+            }
+        },
+        "Ethernet42": {
+            "index": "43",
+            "lanes": "107",
+            "breakout_modes": {
+                "1x25G": ["Eth43/1"]
+            }
+        },
+        "Ethernet43": {
+            "index": "44",
+            "lanes": "108",
+            "breakout_modes": {
+                "1x25G": ["Eth44/1"]
+            }
+        },
+        "Ethernet44": {
+            "index": "45",
+            "lanes": "113",
+            "breakout_modes": {
+                "1x25G": ["Eth45/1"]
+            }
+        },
+        "Ethernet45": {
+            "index": "46",
+            "lanes": "114",
+            "breakout_modes": {
+                "1x25G": ["Eth46/1"]
+            }
+        },
+        "Ethernet46": {
+            "index": "47",
+            "lanes": "115",
+            "breakout_modes": {
+                "1x25G": ["Eth47/1"]
+            }
+        },
+        "Ethernet47": {
+            "index": "48",
+            "lanes": "116",
+            "breakout_modes": {
+                "1x25G": ["Eth48/1"]
+            }
+        },
+        "Ethernet48": {
+            "index": "49,49,49,49",
+            "lanes": "65,66,67,68",
+            "breakout_modes": {
+                "1x100G": ["Eth49/1"]
+            }
+        },
+        "Ethernet52": {
+            "index": "50,50,50,50",
+            "lanes": "69,70,71,72",
+            "breakout_modes": {
+                "1x100G": ["Eth50/1"]
+            }
+        },
+        "Ethernet56": {
+            "index": "51,51,51,51",
+            "lanes": "121,122,123,124",
+            "breakout_modes": {
+                "1x100G": ["Eth51/1"]
+            }
+        },
+        "Ethernet60": {
+            "index": "52,52,52,52",
+            "lanes": "125,126,127,128",
+            "breakout_modes": {
+                "1x100G": ["Eth52/1"]
+            }
+        },
+        "Ethernet64": {
+            "index": "53,53,53,53",
+            "lanes": "1,2,3,4",
+            "breakout_modes": {
+                "1x100G": ["Eth53/1"]
+            }
+        },
+        "Ethernet68": {
+            "index": "54,54,54,54",
+            "lanes": "33,34,35,36",
+            "breakout_modes": {
+                "1x100G": ["Eth54/1"]
+            }
+        },
+        "Ethernet72": {
+            "index": "55,55,55,55",
+            "lanes": "5,6,7,8",
+            "breakout_modes": {
+                "1x100G": ["Eth55/1"]
+            }
+        },
+        "Ethernet76": {
+            "index": "56,56,56,56",
+            "lanes": "41,42,43,44",
+            "breakout_modes": {
+                "1x100G": ["Eth56/1"]
+            }
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/platform_components.json b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/platform_components.json
new file mode 100644
index 000000000000..b86899e311ab
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/platform_components.json
@@ -0,0 +1,17 @@
+{
+    "chassis": {
+        "Questone_2": {
+            "component": {
+                "BIOS": {},
+                "ONIE": {},
+                "BMC": {},
+                "FPGA": {},
+                "CPLD COMe": {},
+                "CPLD BASE": {},
+                "CPLD SW1": {},
+                "CPLD SW2": {},
+                "SSD": {}
+            }
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/port_config.ini b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/port_config.ini
new file mode 100644
index 000000000000..37c4f0cfd042
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/port_config.ini
@@ -0,0 +1,57 @@
+# name      lanes            alias   index  speed   mtu   admin_status  fec
+Ethernet0   49               Eth1/1   1      25000   9216  up            rs
+Ethernet1   50               Eth2/1   2      25000   9216  up            rs
+Ethernet2   51               Eth3/1   3      25000   9216  up            rs
+Ethernet3   52               Eth4/1   4      25000   9216  up            rs
+Ethernet4   57               Eth5/1   5      25000   9216  up            rs
+Ethernet5   58               Eth6/1   6      25000   9216  up            rs
+Ethernet6   59               Eth7/1   7      25000   9216  up            rs
+Ethernet7   60               Eth8/1   8      25000   9216  up            rs
+Ethernet8   61               Eth9/1   9      25000   9216  up            rs
+Ethernet9   62               Eth10/1  10     25000   9216  up            rs
+Ethernet10  63               Eth11/1  11     25000   9216  up            rs
+Ethernet11  64               Eth12/1  12     25000   9216  up            rs
+Ethernet12  77               Eth13/1  13     25000   9216  up            rs
+Ethernet13  78               Eth14/1  14     25000   9216  up            rs
+Ethernet14  79               Eth15/1  15     25000   9216  up            rs
+Ethernet15  80               Eth16/1  16     25000   9216  up            rs
+Ethernet16  85               Eth17/1  17     25000   9216  up            rs
+Ethernet17  86               Eth18/1  18     25000   9216  up            rs
+Ethernet18  87               Eth19/1  19     25000   9216  up            rs
+Ethernet19  88               Eth20/1  20     25000   9216  up            rs
+Ethernet20  93               Eth21/1  21     25000   9216  up            rs
+Ethernet21  94               Eth22/1  22     25000   9216  up            rs
+Ethernet22  95               Eth23/1  23     25000   9216  up            rs
+Ethernet23  96               Eth24/1  24     25000   9216  up            rs
+Ethernet24  13               Eth25/1  25     25000   9216  up            rs
+Ethernet25  14               Eth26/1  26     25000   9216  up            rs
+Ethernet26  15               Eth27/1  27     25000   9216  up            rs
+Ethernet27  16               Eth28/1  28     25000   9216  up            rs
+Ethernet28  21               Eth29/1  29     25000   9216  up            rs
+Ethernet29  22               Eth30/1  30     25000   9216  up            rs
+Ethernet30  23               Eth31/1  31     25000   9216  up            rs
+Ethernet31  24               Eth32/1  32     25000   9216  up            rs
+Ethernet32  29               Eth33/1  33     25000   9216  up            rs
+Ethernet33  30               Eth34/1  34     25000   9216  up            rs
+Ethernet34  31               Eth35/1  35     25000   9216  up            rs
+Ethernet35  32               Eth36/1  36     25000   9216  up            rs
+Ethernet36  97               Eth37/1  37     25000   9216  up            rs
+Ethernet37  98               Eth38/1  38     25000   9216  up            rs
+Ethernet38  99               Eth39/1  39     25000   9216  up            rs
+Ethernet39  100              Eth40/1  40     25000   9216  up            rs
+Ethernet40  105              Eth41/1  41     25000   9216  up            rs
+Ethernet41  106              Eth42/1  42     25000   9216  up            rs
+Ethernet42  107              Eth43/1  43     25000   9216  up            rs
+Ethernet43  108              Eth44/1  44     25000   9216  up            rs
+Ethernet44  113              Eth45/1  45     25000   9216  up            rs
+Ethernet45  114              Eth46/1  46     25000   9216  up            rs
+Ethernet46  115              Eth47/1  47     25000   9216  up            rs
+Ethernet47  116              Eth48/1  48     25000   9216  up            rs
+Ethernet48  65,66,67,68      Eth49/1  49     100000  9216  up            rs
+Ethernet52  69,70,71,72      Eth50/1  50     100000  9216  up            rs
+Ethernet56  121,122,123,124  Eth51/1  51     100000  9216  up            rs
+Ethernet60  125,126,127,128  Eth52/1  52     100000  9216  up            rs
+Ethernet64  1,2,3,4          Eth53/1  53     100000  9216  up            rs
+Ethernet68  33,34,35,36      Eth54/1  54     100000  9216  up            rs
+Ethernet72  5,6,7,8          Eth55/1  55     100000  9216  up            rs
+Ethernet76  41,42,43,44      Eth56/1  56     100000  9216  up            rs
diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/sai.profile b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/sai.profile
new file mode 100644
index 000000000000..636d9d72fc17
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h.config.bcm
diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/sai_postinit_cmd.soc b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/sai_postinit_cmd.soc
new file mode 100644
index 000000000000..731625308a5e
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/sai_postinit_cmd.soc
@@ -0,0 +1,2 @@
+modreg ING_MISC_CONFIG INPUT_PRI_TAGGED=1
+modreg ING_MISC_CONFIG  INPUT_PRI_UNTAGGED=1
diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2/td3-as13-48f8h.config.bcm b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/td3-as13-48f8h.config.bcm
new file mode 100644
index 000000000000..f9f3308d30cb
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2/td3-as13-48f8h.config.bcm
@@ -0,0 +1,359 @@
+help_cli_enable=1
+ifp_inports_support_enable=1
+ipv6_lpm_128b_enable=0x1
+l2_mem_entries=32768
+l2xmsg_mode=1
+l3_max_ecmp_mode=1
+l3_mem_entries=49152
+l3_alpm_enable=2
+bcm_stat_interval=1000000
+host_as_route_disable=1
+lpm_scaling_enable=1
+max_vp_lags=0
+mem_cache_enable=0
+memlist_enable=1
+miim_intr_enable=0
+module_64ports=1
+oversubscribe_mode=1
+parity_enable=1
+serdes_lane_config_dfe=on
+#serdes_fec_enable=1
+serdes_if_type_xe=13
+serdes_if_type_ce=14
+pbmp_gport_stack.0=0x0000000000000000000000000000000000000000000000000000000000000000
+#pbmp_xport_xe=0x48878787f8787808dfe1e0203e1e1e022
+pbmp_xport_xe=0x8808787f87808088221e1e1fe1e1e1fe
+
+
+portmap_1.0=1:100
+portmap_5.0=5:100
+portmap_13.0=13:25
+portmap_14.0=14:25
+portmap_15.0=15:25
+portmap_16.0=16:25
+portmap_21.0=21:25
+portmap_22.0=22:25
+portmap_23.0=23:25
+portmap_24.0=24:25
+portmap_29.0=29:25
+portmap_30.0=30:25
+portmap_31.0=31:25
+portmap_32.0=32:25
+portmap_33.0=33:100
+portmap_41.0=41:100
+portmap_49.0=49:25
+portmap_50.0=50:25
+portmap_51.0=51:25
+portmap_52.0=52:25
+portmap_57.0=57:25
+portmap_58.0=58:25
+portmap_59.0=59:25
+portmap_60.0=60:25
+portmap_61.0=61:25
+portmap_62.0=62:25
+portmap_63.0=63:25
+portmap_64.0=64:25
+portmap_67.0=65:100
+portmap_71.0=69:100
+portmap_79.0=77:25
+portmap_80.0=78:25
+portmap_81.0=79:25
+portmap_82.0=80:25
+portmap_87.0=85:25
+portmap_88.0=86:25
+portmap_89.0=87:25
+portmap_90.0=88:25
+portmap_95.0=93:25
+portmap_96.0=94:25
+portmap_97.0=95:25
+portmap_98.0=96:25
+portmap_99.0=97:25
+portmap_100.0=98:25
+portmap_101.0=99:25
+portmap_102.0=100:25
+portmap_107.0=105:25
+portmap_108.0=106:25
+portmap_109.0=107:25
+portmap_110.0=108:25
+portmap_115.0=113:25
+portmap_116.0=114:25
+portmap_117.0=115:25
+portmap_118.0=116:25
+portmap_123.0=121:100
+portmap_127.0=125:100
+
+phy_chain_tx_lane_map_physical{1.0}=0x0123
+phy_chain_rx_lane_map_physical{1.0}=0x1302
+phy_chain_tx_lane_map_physical{5.0}=0x1032
+phy_chain_rx_lane_map_physical{5.0}=0x1302
+phy_chain_tx_lane_map_physical{13.0}=0x0123
+phy_chain_rx_lane_map_physical{13.0}=0x1032
+phy_chain_tx_lane_map_physical{21.0}=0x0123
+phy_chain_rx_lane_map_physical{21.0}=0x1032
+phy_chain_tx_lane_map_physical{29.0}=0x0123
+phy_chain_rx_lane_map_physical{29.0}=0x1032
+phy_chain_tx_lane_map_physical{33.0}=0x1302
+phy_chain_rx_lane_map_physical{33.0}=0x1032
+phy_chain_tx_lane_map_physical{41.0}=0x3120
+phy_chain_rx_lane_map_physical{41.0}=0x1032
+phy_chain_tx_lane_map_physical{49.0}=0x0123
+phy_chain_rx_lane_map_physical{49.0}=0x1032
+phy_chain_tx_lane_map_physical{57.0}=0x0123
+phy_chain_rx_lane_map_physical{57.0}=0x1032
+phy_chain_tx_lane_map_physical{61.0}=0x0123
+phy_chain_rx_lane_map_physical{61.0}=0x1032
+phy_chain_tx_lane_map_physical{65.0}=0x1302
+phy_chain_rx_lane_map_physical{65.0}=0x1023
+phy_chain_tx_lane_map_physical{69.0}=0x1032
+phy_chain_rx_lane_map_physical{69.0}=0x0213
+phy_chain_tx_lane_map_physical{77.0}=0x3210
+phy_chain_rx_lane_map_physical{77.0}=0x2301
+phy_chain_tx_lane_map_physical{85.0}=0x3210
+phy_chain_rx_lane_map_physical{85.0}=0x2301
+phy_chain_tx_lane_map_physical{93.0}=0x3210
+phy_chain_rx_lane_map_physical{93.0}=0x2301
+phy_chain_tx_lane_map_physical{97.0}=0x3210
+phy_chain_rx_lane_map_physical{97.0}=0x2301
+phy_chain_tx_lane_map_physical{105.0}=0x3210
+phy_chain_rx_lane_map_physical{105.0}=0x2301
+phy_chain_tx_lane_map_physical{113.0}=0x3210
+phy_chain_rx_lane_map_physical{113.0}=0x2301
+phy_chain_tx_lane_map_physical{121.0}=0x2301
+phy_chain_rx_lane_map_physical{121.0}=0x2031
+phy_chain_tx_lane_map_physical{125.0}=0x0132
+phy_chain_rx_lane_map_physical{125.0}=0x3012
+phy_chain_tx_polarity_flip_physical{1.0}=0x0
+phy_chain_rx_polarity_flip_physical{1.0}=0x0
+phy_chain_tx_polarity_flip_physical{2.0}=0x0
+phy_chain_rx_polarity_flip_physical{2.0}=0x1
+phy_chain_tx_polarity_flip_physical{3.0}=0x1
+phy_chain_rx_polarity_flip_physical{3.0}=0x1
+phy_chain_tx_polarity_flip_physical{4.0}=0x0
+phy_chain_rx_polarity_flip_physical{4.0}=0x1
+phy_chain_tx_polarity_flip_physical{5.0}=0x0
+phy_chain_rx_polarity_flip_physical{5.0}=0x1
+phy_chain_tx_polarity_flip_physical{6.0}=0x1
+phy_chain_rx_polarity_flip_physical{6.0}=0x0
+phy_chain_tx_polarity_flip_physical{7.0}=0x1
+phy_chain_rx_polarity_flip_physical{7.0}=0x0
+phy_chain_tx_polarity_flip_physical{8.0}=0x1
+phy_chain_rx_polarity_flip_physical{8.0}=0x0
+phy_chain_tx_polarity_flip_physical{13.0}=0x0
+phy_chain_rx_polarity_flip_physical{13.0}=0x1
+phy_chain_tx_polarity_flip_physical{14.0}=0x1
+phy_chain_rx_polarity_flip_physical{14.0}=0x0
+phy_chain_tx_polarity_flip_physical{15.0}=0x0
+phy_chain_rx_polarity_flip_physical{15.0}=0x1
+phy_chain_tx_polarity_flip_physical{16.0}=0x1
+phy_chain_rx_polarity_flip_physical{16.0}=0x0
+phy_chain_tx_polarity_flip_physical{21.0}=0x0
+phy_chain_rx_polarity_flip_physical{21.0}=0x1
+phy_chain_tx_polarity_flip_physical{22.0}=0x1
+phy_chain_rx_polarity_flip_physical{22.0}=0x0
+phy_chain_tx_polarity_flip_physical{23.0}=0x0
+phy_chain_rx_polarity_flip_physical{23.0}=0x1
+phy_chain_tx_polarity_flip_physical{24.0}=0x1
+phy_chain_rx_polarity_flip_physical{24.0}=0x0
+phy_chain_tx_polarity_flip_physical{29.0}=0x0
+phy_chain_rx_polarity_flip_physical{29.0}=0x1
+phy_chain_tx_polarity_flip_physical{30.0}=0x1
+phy_chain_rx_polarity_flip_physical{30.0}=0x1
+phy_chain_tx_polarity_flip_physical{31.0}=0x0
+phy_chain_rx_polarity_flip_physical{31.0}=0x1
+phy_chain_tx_polarity_flip_physical{32.0}=0x1
+phy_chain_rx_polarity_flip_physical{32.0}=0x0
+phy_chain_tx_polarity_flip_physical{33.0}=0x1
+phy_chain_rx_polarity_flip_physical{33.0}=0x0
+phy_chain_tx_polarity_flip_physical{34.0}=0x1
+phy_chain_rx_polarity_flip_physical{34.0}=0x1
+phy_chain_tx_polarity_flip_physical{35.0}=0x1
+phy_chain_rx_polarity_flip_physical{35.0}=0x0
+phy_chain_tx_polarity_flip_physical{36.0}=0x0
+phy_chain_rx_polarity_flip_physical{36.0}=0x0
+phy_chain_tx_polarity_flip_physical{41.0}=0x0
+phy_chain_rx_polarity_flip_physical{41.0}=0x0
+phy_chain_tx_polarity_flip_physical{42.0}=0x1
+phy_chain_rx_polarity_flip_physical{42.0}=0x1
+phy_chain_tx_polarity_flip_physical{43.0}=0x1
+phy_chain_rx_polarity_flip_physical{43.0}=0x0
+phy_chain_tx_polarity_flip_physical{44.0}=0x0
+phy_chain_rx_polarity_flip_physical{44.0}=0x0
+phy_chain_tx_polarity_flip_physical{49.0}=0x1
+phy_chain_rx_polarity_flip_physical{49.0}=0x0
+phy_chain_tx_polarity_flip_physical{50.0}=0x0
+phy_chain_rx_polarity_flip_physical{50.0}=0x1
+phy_chain_tx_polarity_flip_physical{51.0}=0x1
+phy_chain_rx_polarity_flip_physical{51.0}=0x0
+phy_chain_tx_polarity_flip_physical{52.0}=0x0
+phy_chain_rx_polarity_flip_physical{52.0}=0x1
+phy_chain_tx_polarity_flip_physical{57.0}=0x1
+phy_chain_rx_polarity_flip_physical{57.0}=0x0
+phy_chain_tx_polarity_flip_physical{58.0}=0x0
+phy_chain_rx_polarity_flip_physical{58.0}=0x1
+phy_chain_tx_polarity_flip_physical{59.0}=0x1
+phy_chain_rx_polarity_flip_physical{59.0}=0x0
+phy_chain_tx_polarity_flip_physical{60.0}=0x0
+phy_chain_rx_polarity_flip_physical{60.0}=0x1
+phy_chain_tx_polarity_flip_physical{61.0}=0x1
+phy_chain_rx_polarity_flip_physical{61.0}=0x1
+phy_chain_tx_polarity_flip_physical{62.0}=0x0
+phy_chain_rx_polarity_flip_physical{62.0}=0x0
+phy_chain_tx_polarity_flip_physical{63.0}=0x1
+phy_chain_rx_polarity_flip_physical{63.0}=0x1
+phy_chain_tx_polarity_flip_physical{64.0}=0x0
+phy_chain_rx_polarity_flip_physical{64.0}=0x0
+phy_chain_tx_polarity_flip_physical{65.0}=0x1
+phy_chain_rx_polarity_flip_physical{65.0}=0x0
+phy_chain_tx_polarity_flip_physical{66.0}=0x0
+phy_chain_rx_polarity_flip_physical{66.0}=0x0
+phy_chain_tx_polarity_flip_physical{67.0}=0x1
+phy_chain_rx_polarity_flip_physical{67.0}=0x0
+phy_chain_tx_polarity_flip_physical{68.0}=0x1
+phy_chain_rx_polarity_flip_physical{68.0}=0x0
+phy_chain_tx_polarity_flip_physical{69.0}=0x0
+phy_chain_rx_polarity_flip_physical{69.0}=0x1
+phy_chain_tx_polarity_flip_physical{70.0}=0x1
+phy_chain_rx_polarity_flip_physical{70.0}=0x0
+phy_chain_tx_polarity_flip_physical{71.0}=0x0
+phy_chain_rx_polarity_flip_physical{71.0}=0x0
+phy_chain_tx_polarity_flip_physical{72.0}=0x1
+phy_chain_rx_polarity_flip_physical{72.0}=0x1
+phy_chain_tx_polarity_flip_physical{77.0}=0x0
+phy_chain_rx_polarity_flip_physical{77.0}=0x1
+phy_chain_tx_polarity_flip_physical{78.0}=0x1
+phy_chain_rx_polarity_flip_physical{78.0}=0x0
+phy_chain_tx_polarity_flip_physical{79.0}=0x0
+phy_chain_rx_polarity_flip_physical{79.0}=0x1
+phy_chain_tx_polarity_flip_physical{80.0}=0x1
+phy_chain_rx_polarity_flip_physical{80.0}=0x0
+phy_chain_tx_polarity_flip_physical{85.0}=0x0
+phy_chain_rx_polarity_flip_physical{85.0}=0x1
+phy_chain_tx_polarity_flip_physical{86.0}=0x1
+phy_chain_rx_polarity_flip_physical{86.0}=0x0
+phy_chain_tx_polarity_flip_physical{87.0}=0x0
+phy_chain_rx_polarity_flip_physical{87.0}=0x1
+phy_chain_tx_polarity_flip_physical{88.0}=0x1
+phy_chain_rx_polarity_flip_physical{88.0}=0x0
+phy_chain_tx_polarity_flip_physical{93.0}=0x0
+phy_chain_rx_polarity_flip_physical{93.0}=0x1
+phy_chain_tx_polarity_flip_physical{94.0}=0x1
+phy_chain_rx_polarity_flip_physical{94.0}=0x0
+phy_chain_tx_polarity_flip_physical{95.0}=0x0
+phy_chain_rx_polarity_flip_physical{95.0}=0x1
+phy_chain_tx_polarity_flip_physical{96.0}=0x1
+phy_chain_rx_polarity_flip_physical{96.0}=0x0
+phy_chain_tx_polarity_flip_physical{97.0}=0x1
+phy_chain_rx_polarity_flip_physical{97.0}=0x1
+phy_chain_tx_polarity_flip_physical{98.0}=0x0
+phy_chain_rx_polarity_flip_physical{98.0}=0x0
+phy_chain_tx_polarity_flip_physical{99.0}=0x1
+phy_chain_rx_polarity_flip_physical{99.0}=0x1
+phy_chain_tx_polarity_flip_physical{100.0}=0x0
+phy_chain_rx_polarity_flip_physical{100.0}=0x0
+phy_chain_tx_polarity_flip_physical{105.0}=0x1
+phy_chain_rx_polarity_flip_physical{105.0}=0x0
+phy_chain_tx_polarity_flip_physical{106.0}=0x0
+phy_chain_rx_polarity_flip_physical{106.0}=0x1
+phy_chain_tx_polarity_flip_physical{107.0}=0x1
+phy_chain_rx_polarity_flip_physical{107.0}=0x0
+phy_chain_tx_polarity_flip_physical{108.0}=0x0
+phy_chain_rx_polarity_flip_physical{108.0}=0x1
+phy_chain_tx_polarity_flip_physical{113.0}=0x1
+phy_chain_rx_polarity_flip_physical{113.0}=0x0
+phy_chain_tx_polarity_flip_physical{114.0}=0x0
+phy_chain_rx_polarity_flip_physical{114.0}=0x1
+phy_chain_tx_polarity_flip_physical{115.0}=0x1
+phy_chain_rx_polarity_flip_physical{115.0}=0x0
+phy_chain_tx_polarity_flip_physical{116.0}=0x0
+phy_chain_rx_polarity_flip_physical{116.0}=0x1
+phy_chain_tx_polarity_flip_physical{121.0}=0x0
+phy_chain_rx_polarity_flip_physical{121.0}=0x1
+phy_chain_tx_polarity_flip_physical{122.0}=0x1
+phy_chain_rx_polarity_flip_physical{122.0}=0x0
+phy_chain_tx_polarity_flip_physical{123.0}=0x0
+phy_chain_rx_polarity_flip_physical{123.0}=0x0
+phy_chain_tx_polarity_flip_physical{124.0}=0x1
+phy_chain_rx_polarity_flip_physical{124.0}=0x0
+phy_chain_tx_polarity_flip_physical{125.0}=0x1
+phy_chain_rx_polarity_flip_physical{125.0}=0x0
+phy_chain_tx_polarity_flip_physical{126.0}=0x1
+phy_chain_rx_polarity_flip_physical{126.0}=0x1
+phy_chain_tx_polarity_flip_physical{127.0}=0x0
+phy_chain_rx_polarity_flip_physical{127.0}=0x0
+phy_chain_tx_polarity_flip_physical{128.0}=0x0
+phy_chain_rx_polarity_flip_physical{128.0}=0x0
+
+#MC P/N flip
+phy_chain_tx_polarity_flip_physical{129.0}=0x0
+phy_chain_rx_polarity_flip_physical{129.0}=0x1
+phy_chain_tx_polarity_flip_physical{130.0}=0x0
+phy_chain_rx_polarity_flip_physical{130.0}=0x0
+phy_chain_tx_polarity_flip_physical{131.0}=0x1
+phy_chain_rx_polarity_flip_physical{131.0}=0x0
+phy_chain_tx_polarity_flip_physical{132.0}=0x0
+phy_chain_rx_polarity_flip_physical{132.0}=0x1
+
+dport_map_port_49=1
+dport_map_port_50=2
+dport_map_port_51=3
+dport_map_port_52=4
+dport_map_port_57=5
+dport_map_port_58=6
+dport_map_port_59=7
+dport_map_port_60=8
+dport_map_port_61=9
+dport_map_port_62=10
+dport_map_port_63=11
+dport_map_port_64=12
+dport_map_port_79=13
+dport_map_port_80=14
+dport_map_port_81=15
+dport_map_port_82=16
+dport_map_port_87=17
+dport_map_port_88=18
+dport_map_port_89=19
+dport_map_port_90=20
+dport_map_port_95=21
+dport_map_port_96=22
+dport_map_port_97=23
+dport_map_port_98=24
+dport_map_port_13=25
+dport_map_port_14=26
+dport_map_port_15=27
+dport_map_port_16=28
+dport_map_port_21=29
+dport_map_port_22=30
+dport_map_port_23=31
+dport_map_port_24=32
+dport_map_port_29=33
+dport_map_port_30=34
+dport_map_port_31=35
+dport_map_port_32=36
+dport_map_port_99=37
+dport_map_port_100=38
+dport_map_port_101=39
+dport_map_port_102=40
+dport_map_port_107=41
+dport_map_port_108=42
+dport_map_port_109=43
+dport_map_port_110=44
+dport_map_port_115=45
+dport_map_port_116=46
+dport_map_port_117=47
+dport_map_port_118=48
+dport_map_port_67=49
+dport_map_port_71=50
+dport_map_port_123=51
+dport_map_port_127=52
+dport_map_port_1=53
+dport_map_port_33=54
+dport_map_port_5=55
+dport_map_port_41=56
+
+reglist_enable=1
+scache_filename=/tmp/scache
+schan_intr_enable=0
+stable_size=0x5500000
+tdma_timeout_usec=3000000
+
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/custom_led.bin b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/custom_led.bin
new file mode 100755
index 0000000000000000000000000000000000000000..fb33257fbbe9d075892a096e3c581c6710df296c
GIT binary patch
literal 308
zcmV-40n7gIwO>Y7MomUUM)0%^95hS>BLgB2A&5o-Cb32VC%Q&494SDIMnz~^Qzdu-
zJ*~2?00(IHTZd?WUAsmyLIcnh9AQQPDHYKb9DpY`LJ`nKMp;G;Kn5)b&;r;6Ee6pC
z;0G-Q&<QO8(M?7I;1wJI;8jLOXq{68GXXTBCUyX`LeS9xA^{~tC%HxfCIBIbMj0cV
zMqDQW-~lqyvQr-0vKavgF+ms%9RMo=&;ct9(FNd5U}a!QMxkKlVC?5jU}HvOV5eZ_
zVCLsTMoVA>D&pBZypTqjMxsWmM)1AlH~;`09v>hfA|oUvCMPH{GBY$aHa9pqIy*cG
z3JVMk4i69!5)%|XK0iP~LPJDFMn^~i0s{mU78e)=1_uZk8XFubDl054E-x@iN=r;l
GPESx?i&_={

literal 0
HcmV?d00001

diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/hwsku.json b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/hwsku.json
new file mode 100644
index 000000000000..a559890f3a18
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/hwsku.json
@@ -0,0 +1,284 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet1": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet2": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet3": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet4": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet5": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet6": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet7": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet9": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet10": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet11": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet12": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet13": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet14": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet15": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet17": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet18": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet19": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet20": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet21": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet22": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet23": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet25": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet26": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet27": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet28": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet29": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet30": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet31": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet33": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet34": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet35": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet36": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet37": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet38": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet39": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet41": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet42": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet43": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet44": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet45": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet46": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet47": {
+            "default_brkout_mode": "1x25G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet52": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet60": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet68": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet76": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        }
+    }
+}
\ No newline at end of file
diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/platform.json b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/platform.json
new file mode 100644
index 000000000000..b303755d5910
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/platform.json
@@ -0,0 +1,396 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1",
+            "lanes": "29",
+            "breakout_modes": {
+                "1x25G": ["Eth1/1"]
+            }
+        },
+        "Ethernet1": {
+            "index": "2",
+            "lanes": "30",
+            "breakout_modes": {
+                "1x25G": ["Eth2/1"]
+            }
+        },
+        "Ethernet2": {
+            "index": "3",
+            "lanes": "31",
+            "breakout_modes": {
+                "1x25G": ["Eth3/1"]
+            }
+        },
+        "Ethernet3": {
+            "index": "4",
+            "lanes": "32",
+            "breakout_modes": {
+                "1x25G": ["Eth4/1"]
+            }
+        },
+        "Ethernet4": {
+            "index": "5",
+            "lanes": "33",
+            "breakout_modes": {
+                "1x25G": ["Eth5/1"]
+            }
+        },
+        "Ethernet5": {
+            "index": "6",
+            "lanes": "34",
+            "breakout_modes": {
+                "1x25G": ["Eth6/1"]
+            }
+        },
+        "Ethernet6": {
+            "index": "7",
+            "lanes": "35",
+            "breakout_modes": {
+                "1x25G": ["Eth7/1"]
+            }
+        },
+        "Ethernet7": {
+            "index": "8",
+            "lanes": "36",
+            "breakout_modes": {
+                "1x25G": ["Eth8/1"]
+            }
+        },
+        "Ethernet8": {
+            "index": "9",
+            "lanes": "37",
+            "breakout_modes": {
+                "1x25G": ["Eth9/1"]
+            }
+        },
+        "Ethernet9": {
+            "index": "10",
+            "lanes": "38",
+            "breakout_modes": {
+                "1x25G": ["Eth10/1"]
+            }
+        },
+        "Ethernet10": {
+            "index": "11",
+            "lanes": "39",
+            "breakout_modes": {
+                "1x25G": ["Eth11/1"]
+            }
+        },
+        "Ethernet11": {
+            "index": "12",
+            "lanes": "40",
+            "breakout_modes": {
+                "1x25G": ["Eth12/1"]
+            }
+        },
+        "Ethernet12": {
+            "index": "13",
+            "lanes": "49",
+            "breakout_modes": {
+                "1x25G": ["Eth13/1"]
+            }
+        },
+        "Ethernet13": {
+            "index": "14",
+            "lanes": "50",
+            "breakout_modes": {
+                "1x25G": ["Eth14/1"]
+            }
+        },
+        "Ethernet14": {
+            "index": "15",
+            "lanes": "51",
+            "breakout_modes": {
+                "1x25G": ["Eth15/1"]
+            }
+        },
+        "Ethernet15": {
+            "index": "16",
+            "lanes": "52",
+            "breakout_modes": {
+                "1x25G": ["Eth16/1"]
+            }
+        },
+        "Ethernet16": {
+            "index": "17",
+            "lanes": "53",
+            "breakout_modes": {
+                "1x25G": ["Eth17/1"]
+            }
+        },
+        "Ethernet17": {
+            "index": "18",
+            "lanes": "54",
+            "breakout_modes": {
+                "1x25G": ["Eth18/1"]
+            }
+        },
+        "Ethernet18": {
+            "index": "19",
+            "lanes": "55",
+            "breakout_modes": {
+                "1x25G": ["Eth19/1"]
+            }
+        },
+        "Ethernet19": {
+            "index": "20",
+            "lanes": "56",
+            "breakout_modes": {
+                "1x25G": ["Eth20/1"]
+            }
+        },
+        "Ethernet20": {
+            "index": "21",
+            "lanes": "57",
+            "breakout_modes": {
+                "1x25G": ["Eth21/1"]
+            }
+        },
+        "Ethernet21": {
+            "index": "22",
+            "lanes": "58",
+            "breakout_modes": {
+                "1x25G": ["Eth22/1"]
+            }
+        },
+        "Ethernet22": {
+            "index": "23",
+            "lanes": "59",
+            "breakout_modes": {
+                "1x25G": ["Eth23/1"]
+            }
+        },
+        "Ethernet23": {
+            "index": "24",
+            "lanes": "60",
+            "breakout_modes": {
+                "1x25G": ["Eth24/1"]
+            }
+        },
+        "Ethernet24": {
+            "index": "25",
+            "lanes": "9",
+            "breakout_modes": {
+                "1x25G": ["Eth25/1"]
+            }
+        },
+        "Ethernet25": {
+            "index": "26",
+            "lanes": "10",
+            "breakout_modes": {
+                "1x25G": ["Eth26/1"]
+            }
+        },
+        "Ethernet26": {
+            "index": "27",
+            "lanes": "11",
+            "breakout_modes": {
+                "1x25G": ["Eth27/1"]
+            }
+        },
+        "Ethernet27": {
+            "index": "28",
+            "lanes": "12",
+            "breakout_modes": {
+                "1x25G": ["Eth28/1"]
+            }
+        },
+        "Ethernet28": {
+            "index": "29",
+            "lanes": "13",
+            "breakout_modes": {
+                "1x25G": ["Eth29/1"]
+            }
+        },
+        "Ethernet29": {
+            "index": "30",
+            "lanes": "14",
+            "breakout_modes": {
+                "1x25G": ["Eth30/1"]
+            }
+        },
+        "Ethernet30": {
+            "index": "31",
+            "lanes": "15",
+            "breakout_modes": {
+                "1x25G": ["Eth31/1"]
+            }
+        },
+        "Ethernet31": {
+            "index": "32",
+            "lanes": "16",
+            "breakout_modes": {
+                "1x25G": ["Eth32/1"]
+            }
+        },
+        "Ethernet32": {
+            "index": "33",
+            "lanes": "17",
+            "breakout_modes": {
+                "1x25G": ["Eth33/1"]
+            }
+        },
+        "Ethernet33": {
+            "index": "34",
+            "lanes": "18",
+            "breakout_modes": {
+                "1x25G": ["Eth34/1"]
+            }
+        },
+        "Ethernet34": {
+            "index": "35",
+            "lanes": "19",
+            "breakout_modes": {
+                "1x25G": ["Eth35/1"]
+            }
+        },
+        "Ethernet35": {
+            "index": "36",
+            "lanes": "20",
+            "breakout_modes": {
+                "1x25G": ["Eth36/1"]
+            }
+        },
+        "Ethernet36": {
+            "index": "37",
+            "lanes": "61",
+            "breakout_modes": {
+                "1x25G": ["Eth37/1"]
+            }
+        },
+        "Ethernet37": {
+            "index": "38",
+            "lanes": "62",
+            "breakout_modes": {
+                "1x25G": ["Eth38/1"]
+            }
+        },
+        "Ethernet38": {
+            "index": "39",
+            "lanes": "63",
+            "breakout_modes": {
+                "1x25G": ["Eth39/1"]
+            }
+        },
+        "Ethernet39": {
+            "index": "40",
+            "lanes": "64",
+            "breakout_modes": {
+                "1x25G": ["Eth40/1"]
+            }
+        },
+        "Ethernet40": {
+            "index": "41",
+            "lanes": "65",
+            "breakout_modes": {
+                "1x25G": ["Eth41/1"]
+            }
+        },
+        "Ethernet41": {
+            "index": "42",
+            "lanes": "66",
+            "breakout_modes": {
+                "1x25G": ["Eth42/1"]
+            }
+        },
+        "Ethernet42": {
+            "index": "43",
+            "lanes": "67",
+            "breakout_modes": {
+                "1x25G": ["Eth43/1"]
+            }
+        },
+        "Ethernet43": {
+            "index": "44",
+            "lanes": "68",
+            "breakout_modes": {
+                "1x25G": ["Eth44/1"]
+            }
+        },
+        "Ethernet44": {
+            "index": "45",
+            "lanes": "69",
+            "breakout_modes": {
+                "1x25G": ["Eth45/1"]
+            }
+        },
+        "Ethernet45": {
+            "index": "46",
+            "lanes": "70",
+            "breakout_modes": {
+                "1x25G": ["Eth46/1"]
+            }
+        },
+        "Ethernet46": {
+            "index": "47",
+            "lanes": "71",
+            "breakout_modes": {
+                "1x25G": ["Eth47/1"]
+            }
+        },
+        "Ethernet47": {
+            "index": "48",
+            "lanes": "72",
+            "breakout_modes": {
+                "1x25G": ["Eth48/1"]
+            }
+        },
+        "Ethernet48": {
+            "index": "49,49,49,49",
+            "lanes": "41,42,43,44",
+            "breakout_modes": {
+                "1x100G": ["Eth49/1"]
+            }
+        },
+        "Ethernet52": {
+            "index": "50,50,50,50",
+            "lanes": "45,46,47,48",
+            "breakout_modes": {
+                "1x100G": ["Eth50/1"]
+            }
+        },
+        "Ethernet56": {
+            "index": "51,51,51,51",
+            "lanes": "73,74,75,76",
+            "breakout_modes": {
+                "1x100G": ["Eth51/1"]
+            }
+        },
+        "Ethernet60": {
+            "index": "52,52,52,52",
+            "lanes": "77,78,79,80",
+            "breakout_modes": {
+                "1x100G": ["Eth52/1"]
+            }
+        },
+        "Ethernet64": {
+            "index": "53,53,53,53",
+            "lanes": "1,2,3,4",
+            "breakout_modes": {
+                "1x100G": ["Eth53/1"]
+            }
+        },
+        "Ethernet68": {
+            "index": "54,54,54,54",
+            "lanes": "21,22,23,24",
+            "breakout_modes": {
+                "1x100G": ["Eth54/1"]
+            }
+        },
+        "Ethernet72": {
+            "index": "55,55,55,55",
+            "lanes": "5,6,7,8",
+            "breakout_modes": {
+                "1x100G": ["Eth55/1"]
+            }
+        },
+        "Ethernet76": {
+            "index": "56,56,56,56",
+            "lanes": "25,26,27,28",
+            "breakout_modes": {
+                "1x100G": ["Eth56/1"]
+            }
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/platform_components.json b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/platform_components.json
new file mode 100644
index 000000000000..165eacad2dd3
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/platform_components.json
@@ -0,0 +1,17 @@
+{
+    "chassis": {
+        "Questone_2A": {
+            "component": {
+                "BIOS": {},
+                "ONIE": {},
+                "BMC": {},
+                "FPGA": {},
+                "CPLD COMe": {},
+                "CPLD BASE": {},
+                "CPLD SW1": {},
+                "CPLD SW2": {},
+                "SSD": {}
+            }
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/port_config.ini b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/port_config.ini
new file mode 100644
index 000000000000..37d2d92652ed
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/port_config.ini
@@ -0,0 +1,57 @@
+# name      lanes            alias   index  speed   mtu   admin_status  fec
+Ethernet0   29               Eth1/1   1      25000   9216  up            rs
+Ethernet1   30               Eth2/1   2      25000   9216  up            rs
+Ethernet2   31               Eth3/1   3      25000   9216  up            rs
+Ethernet3   32               Eth4/1   4      25000   9216  up            rs
+Ethernet4   33               Eth5/1   5      25000   9216  up            rs
+Ethernet5   34               Eth6/1   6      25000   9216  up            rs
+Ethernet6   35               Eth7/1   7      25000   9216  up            rs
+Ethernet7   36               Eth8/1   8      25000   9216  up            rs
+Ethernet8   37               Eth9/1   9      25000   9216  up            rs
+Ethernet9   38               Eth10/1  10     25000   9216  up            rs
+Ethernet10  39               Eth11/1  11     25000   9216  up            rs
+Ethernet11  40               Eth12/1  12     25000   9216  up            rs
+Ethernet12  49               Eth13/1  13     25000   9216  up            rs
+Ethernet13  50               Eth14/1  14     25000   9216  up            rs
+Ethernet14  51               Eth15/1  15     25000   9216  up            rs
+Ethernet15  52               Eth16/1  16     25000   9216  up            rs
+Ethernet16  53               Eth17/1  17     25000   9216  up            rs
+Ethernet17  54               Eth18/1  18     25000   9216  up            rs
+Ethernet18  55               Eth19/1  19     25000   9216  up            rs
+Ethernet19  56               Eth20/1  20     25000   9216  up            rs
+Ethernet20  57               Eth21/1  21     25000   9216  up            rs
+Ethernet21  58               Eth22/1  22     25000   9216  up            rs
+Ethernet22  59               Eth23/1  23     25000   9216  up            rs
+Ethernet23  60               Eth24/1  24     25000   9216  up            rs
+Ethernet24  9                Eth25/1  25     25000   9216  up            rs
+Ethernet25  10               Eth26/1  26     25000   9216  up            rs
+Ethernet26  11               Eth27/1  27     25000   9216  up            rs
+Ethernet27  12               Eth28/1  28     25000   9216  up            rs
+Ethernet28  13               Eth29/1  29     25000   9216  up            rs
+Ethernet29  14               Eth30/1  30     25000   9216  up            rs
+Ethernet30  15               Eth31/1  31     25000   9216  up            rs
+Ethernet31  16               Eth32/1  32     25000   9216  up            rs
+Ethernet32  17               Eth33/1  33     25000   9216  up            rs
+Ethernet33  18               Eth34/1  34     25000   9216  up            rs
+Ethernet34  19               Eth35/1  35     25000   9216  up            rs
+Ethernet35  20               Eth36/1  36     25000   9216  up            rs
+Ethernet36  61               Eth37/1  37     25000   9216  up            rs
+Ethernet37  62               Eth38/1  38     25000   9216  up            rs
+Ethernet38  63               Eth39/1  39     25000   9216  up            rs
+Ethernet39  64               Eth40/1  40     25000   9216  up            rs
+Ethernet40  65               Eth41/1  41     25000   9216  up            rs
+Ethernet41  66               Eth42/1  42     25000   9216  up            rs
+Ethernet42  67               Eth43/1  43     25000   9216  up            rs
+Ethernet43  68               Eth44/1  44     25000   9216  up            rs
+Ethernet44  69               Eth45/1  45     25000   9216  up            rs
+Ethernet45  70               Eth46/1  46     25000   9216  up            rs
+Ethernet46  71               Eth47/1  47     25000   9216  up            rs
+Ethernet47  72               Eth48/1  48     25000   9216  up            rs
+Ethernet48  41,42,43,44      Eth49/1  49     100000  9216  up            rs
+Ethernet52  45,46,47,48      Eth50/1  50     100000  9216  up            rs
+Ethernet56  73,74,75,76      Eth51/1  51     100000  9216  up            rs
+Ethernet60  77,78,79,80      Eth52/1  52     100000  9216  up            rs
+Ethernet64  1,2,3,4          Eth53/1  53     100000  9216  up            rs
+Ethernet68  21,22,23,24      Eth54/1  54     100000  9216  up            rs
+Ethernet72  5,6,7,8          Eth55/1  55     100000  9216  up            rs
+Ethernet76  25,26,27,28      Eth56/1  56     100000  9216  up            rs
diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/sai.profile.j2 b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/sai.profile.j2
new file mode 100644
index 000000000000..62a1db9e0960
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/sai.profile.j2
@@ -0,0 +1,16 @@
+{# Get sai.profile based on vxlan_profile. Vxlan's config.bcm file is the default one #}
+{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h-vxlan.config.bcm' -%}
+{%- if DEVICE_METADATA is defined and DEVICE_METADATA['localhost'] is defined -%}
+{%-     if DEVICE_METADATA['localhost']['vxlan_profile'] is defined -%}
+{%-         set vxlan_profile = DEVICE_METADATA['localhost']['vxlan_profile'] -%}
+{%-         if 'enable' in vxlan_profile.lower() %}
+{%              set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h-vxlan.config.bcm' -%}
+{%-         else %}
+{%-             set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h.config.bcm' -%}
+{%-         endif %}
+{%-     else %}
+{%-         set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-as13-48f8h-vxlan.config.bcm' -%}
+{%-     endif %}
+{%- endif %}
+{# Write the contents of sai_profile_filename to sai.profile file #}
+{{ sai_profile_contents }}
diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/sai_postinit_cmd.soc b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/sai_postinit_cmd.soc
new file mode 100644
index 000000000000..731625308a5e
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/sai_postinit_cmd.soc
@@ -0,0 +1,2 @@
+modreg ING_MISC_CONFIG INPUT_PRI_TAGGED=1
+modreg ING_MISC_CONFIG  INPUT_PRI_UNTAGGED=1
diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/td3-as13-48f8h-vxlan.config.bcm b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/td3-as13-48f8h-vxlan.config.bcm
new file mode 100755
index 000000000000..7d444dfb53f6
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/td3-as13-48f8h-vxlan.config.bcm
@@ -0,0 +1,423 @@
+ptp_ts_pll_fref=50000000
+ptp_bs_fref_0=50000000
+ptp_bs_fref_1=50000000
+oversubscribe_mode=1
+pbmp_xport_xe=0x11ffffffe1ffffffe
+stable_size=0x5500000
+ifp_inports_support_enable=1
+
+#FC0
+portmap_1.0=1:100
+
+#FC1
+portmap_2.0=5:100
+
+#FC2
+portmap_3.0=9:25
+portmap_4.0=10:25
+portmap_5.0=11:25
+portmap_6.0=12:25
+
+#FC3
+portmap_7.0=13:25
+portmap_8.0=14:25
+portmap_9.0=15:25
+portmap_10.0=16:25
+
+#FC4
+portmap_11.0=17:25
+portmap_12.0=18:25
+portmap_13.0=19:25
+portmap_14.0=20:25
+
+#FC5
+portmap_15.0=21:100
+
+#FC6
+portmap_16.0=25:100
+
+#FC7
+portmap_17.0=29:25
+portmap_18.0=30:25
+portmap_19.0=31:25
+portmap_20.0=32:25
+
+#FC8
+portmap_21.0=33:25
+portmap_22.0=34:25
+portmap_23.0=35:25
+portmap_24.0=36:25
+
+#FC9
+portmap_25.0=37:25
+portmap_26.0=38:25
+portmap_27.0=39:25
+portmap_28.0=40:25
+
+#FC10
+portmap_33.0=41:100
+
+#FC11
+portmap_34.0=45:100
+
+#FC12
+portmap_35.0=49:25
+portmap_36.0=50:25
+portmap_37.0=51:25
+portmap_38.0=52:25
+
+#FC13
+portmap_39.0=53:25
+portmap_40.0=54:25
+portmap_41.0=55:25
+portmap_42.0=56:25
+
+#FC14
+portmap_43.0=57:25
+portmap_44.0=58:25
+portmap_45.0=59:25
+portmap_46.0=60:25
+
+#FC15
+portmap_47.0=61:25
+portmap_48.0=62:25
+portmap_49.0=63:25
+portmap_50.0=64:25
+
+#FC16
+portmap_51.0=65:25
+portmap_52.0=66:25
+portmap_53.0=67:25
+portmap_54.0=68:25
+
+#FC17
+portmap_55.0=69:25
+portmap_56.0=70:25
+portmap_57.0=71:25
+portmap_58.0=72:25
+
+#FC18
+portmap_59.0=73:100
+
+#FC19
+portmap_60.0=77:100
+
+
+#portmap_64.0=81:10
+
+phy_chain_tx_lane_map_physical{1.0}=0x0123
+phy_chain_rx_lane_map_physical{1.0}=0x1302
+phy_chain_tx_lane_map_physical{5.0}=0x1032
+phy_chain_rx_lane_map_physical{5.0}=0x1302
+phy_chain_tx_lane_map_physical{9.0}=0x0123
+phy_chain_rx_lane_map_physical{9.0}=0x1032
+phy_chain_tx_lane_map_physical{13.0}=0x0123
+phy_chain_rx_lane_map_physical{13.0}=0x1032
+phy_chain_tx_lane_map_physical{17.0}=0x0123
+phy_chain_rx_lane_map_physical{17.0}=0x1032
+phy_chain_tx_lane_map_physical{21.0}=0x1302
+phy_chain_rx_lane_map_physical{21.0}=0x1032
+phy_chain_tx_lane_map_physical{25.0}=0x3120
+phy_chain_rx_lane_map_physical{25.0}=0x1032
+phy_chain_tx_lane_map_physical{29.0}=0x0123
+phy_chain_rx_lane_map_physical{29.0}=0x1032
+phy_chain_tx_lane_map_physical{33.0}=0x0123
+phy_chain_rx_lane_map_physical{33.0}=0x1032
+phy_chain_tx_lane_map_physical{37.0}=0x0123
+phy_chain_rx_lane_map_physical{37.0}=0x1032
+phy_chain_tx_lane_map_physical{41.0}=0x1302
+phy_chain_rx_lane_map_physical{41.0}=0x1023
+phy_chain_tx_lane_map_physical{45.0}=0x1032
+phy_chain_rx_lane_map_physical{45.0}=0x0213
+phy_chain_tx_lane_map_physical{49.0}=0x3210
+phy_chain_rx_lane_map_physical{49.0}=0x2301
+phy_chain_tx_lane_map_physical{53.0}=0x3210
+phy_chain_rx_lane_map_physical{53.0}=0x2301
+phy_chain_tx_lane_map_physical{57.0}=0x3210
+phy_chain_rx_lane_map_physical{57.0}=0x2301
+phy_chain_tx_lane_map_physical{61.0}=0x3210
+phy_chain_rx_lane_map_physical{61.0}=0x2301
+phy_chain_tx_lane_map_physical{65.0}=0x3210
+phy_chain_rx_lane_map_physical{65.0}=0x2301
+phy_chain_tx_lane_map_physical{69.0}=0x3210
+phy_chain_rx_lane_map_physical{69.0}=0x2301
+phy_chain_tx_lane_map_physical{73.0}=0x2301
+phy_chain_rx_lane_map_physical{73.0}=0x2031
+phy_chain_tx_lane_map_physical{77.0}=0x0132
+phy_chain_rx_lane_map_physical{77.0}=0x3012
+phy_chain_tx_lane_map_physical{81.0}=0x3210
+phy_chain_rx_lane_map_physical{81.0}=0x3201
+
+#FC0
+phy_chain_tx_polarity_flip_physical{1.0}=0x0
+phy_chain_rx_polarity_flip_physical{1.0}=0x0
+phy_chain_tx_polarity_flip_physical{2.0}=0x0
+phy_chain_rx_polarity_flip_physical{2.0}=0x1
+phy_chain_tx_polarity_flip_physical{3.0}=0x1
+phy_chain_rx_polarity_flip_physical{3.0}=0x1
+phy_chain_tx_polarity_flip_physical{4.0}=0x0
+phy_chain_rx_polarity_flip_physical{4.0}=0x1
+
+#FC1
+phy_chain_tx_polarity_flip_physical{5.0}=0x0
+phy_chain_rx_polarity_flip_physical{5.0}=0x1
+phy_chain_tx_polarity_flip_physical{6.0}=0x1
+phy_chain_rx_polarity_flip_physical{6.0}=0x0
+phy_chain_tx_polarity_flip_physical{7.0}=0x1
+phy_chain_rx_polarity_flip_physical{7.0}=0x0
+phy_chain_tx_polarity_flip_physical{8.0}=0x1
+phy_chain_rx_polarity_flip_physical{8.0}=0x0
+
+#FC2
+phy_chain_tx_polarity_flip_physical{9.0}=0x0
+phy_chain_rx_polarity_flip_physical{9.0}=0x1
+phy_chain_tx_polarity_flip_physical{10.0}=0x1
+phy_chain_rx_polarity_flip_physical{10.0}=0x0
+phy_chain_tx_polarity_flip_physical{11.0}=0x0
+phy_chain_rx_polarity_flip_physical{11.0}=0x1
+phy_chain_tx_polarity_flip_physical{12.0}=0x1
+phy_chain_rx_polarity_flip_physical{12.0}=0x0
+
+#FC3
+phy_chain_tx_polarity_flip_physical{13.0}=0x0
+phy_chain_rx_polarity_flip_physical{13.0}=0x1
+phy_chain_tx_polarity_flip_physical{14.0}=0x1
+phy_chain_rx_polarity_flip_physical{14.0}=0x0
+phy_chain_tx_polarity_flip_physical{15.0}=0x0
+phy_chain_rx_polarity_flip_physical{15.0}=0x1
+phy_chain_tx_polarity_flip_physical{16.0}=0x1
+phy_chain_rx_polarity_flip_physical{16.0}=0x0
+
+#FC4
+phy_chain_tx_polarity_flip_physical{17.0}=0x0
+phy_chain_rx_polarity_flip_physical{17.0}=0x1
+phy_chain_tx_polarity_flip_physical{18.0}=0x1
+phy_chain_rx_polarity_flip_physical{18.0}=0x1
+phy_chain_tx_polarity_flip_physical{19.0}=0x0
+phy_chain_rx_polarity_flip_physical{19.0}=0x1
+phy_chain_tx_polarity_flip_physical{20.0}=0x1
+phy_chain_rx_polarity_flip_physical{20.0}=0x0
+
+#FC5
+phy_chain_tx_polarity_flip_physical{21.0}=0x1
+phy_chain_rx_polarity_flip_physical{21.0}=0x0
+phy_chain_tx_polarity_flip_physical{22.0}=0x1
+phy_chain_rx_polarity_flip_physical{22.0}=0x1
+phy_chain_tx_polarity_flip_physical{23.0}=0x1
+phy_chain_rx_polarity_flip_physical{23.0}=0x0
+phy_chain_tx_polarity_flip_physical{24.0}=0x0
+phy_chain_rx_polarity_flip_physical{24.0}=0x0
+
+#FC6
+phy_chain_tx_polarity_flip_physical{25.0}=0x0
+phy_chain_rx_polarity_flip_physical{25.0}=0x0
+phy_chain_tx_polarity_flip_physical{26.0}=0x1
+phy_chain_rx_polarity_flip_physical{26.0}=0x1
+phy_chain_tx_polarity_flip_physical{27.0}=0x1
+phy_chain_rx_polarity_flip_physical{27.0}=0x0
+phy_chain_tx_polarity_flip_physical{28.0}=0x0
+phy_chain_rx_polarity_flip_physical{28.0}=0x0
+
+#FC7
+phy_chain_tx_polarity_flip_physical{29.0}=0x1
+phy_chain_rx_polarity_flip_physical{29.0}=0x0
+phy_chain_tx_polarity_flip_physical{30.0}=0x0
+phy_chain_rx_polarity_flip_physical{30.0}=0x1
+phy_chain_tx_polarity_flip_physical{31.0}=0x1
+phy_chain_rx_polarity_flip_physical{31.0}=0x0
+phy_chain_tx_polarity_flip_physical{32.0}=0x0
+phy_chain_rx_polarity_flip_physical{32.0}=0x1
+
+#FC8
+phy_chain_tx_polarity_flip_physical{33.0}=0x1
+phy_chain_rx_polarity_flip_physical{33.0}=0x0
+phy_chain_tx_polarity_flip_physical{34.0}=0x0
+phy_chain_rx_polarity_flip_physical{34.0}=0x1
+phy_chain_tx_polarity_flip_physical{35.0}=0x1
+phy_chain_rx_polarity_flip_physical{35.0}=0x0
+phy_chain_tx_polarity_flip_physical{36.0}=0x0
+phy_chain_rx_polarity_flip_physical{36.0}=0x1
+
+#FC9
+phy_chain_tx_polarity_flip_physical{37.0}=0x1
+phy_chain_rx_polarity_flip_physical{37.0}=0x1
+phy_chain_tx_polarity_flip_physical{38.0}=0x0
+phy_chain_rx_polarity_flip_physical{38.0}=0x0
+phy_chain_tx_polarity_flip_physical{39.0}=0x1
+phy_chain_rx_polarity_flip_physical{39.0}=0x1
+phy_chain_tx_polarity_flip_physical{40.0}=0x0
+phy_chain_rx_polarity_flip_physical{40.0}=0x0
+
+#FC10
+phy_chain_tx_polarity_flip_physical{41.0}=0x1
+phy_chain_rx_polarity_flip_physical{41.0}=0x0
+phy_chain_tx_polarity_flip_physical{42.0}=0x0
+phy_chain_rx_polarity_flip_physical{42.0}=0x0
+phy_chain_tx_polarity_flip_physical{43.0}=0x1
+phy_chain_rx_polarity_flip_physical{43.0}=0x0
+phy_chain_tx_polarity_flip_physical{44.0}=0x1
+phy_chain_rx_polarity_flip_physical{44.0}=0x0
+
+#FC11
+phy_chain_tx_polarity_flip_physical{45.0}=0x0
+phy_chain_rx_polarity_flip_physical{45.0}=0x1
+phy_chain_tx_polarity_flip_physical{46.0}=0x1
+phy_chain_rx_polarity_flip_physical{46.0}=0x0
+phy_chain_tx_polarity_flip_physical{47.0}=0x0
+phy_chain_rx_polarity_flip_physical{47.0}=0x0
+phy_chain_tx_polarity_flip_physical{48.0}=0x1
+phy_chain_rx_polarity_flip_physical{48.0}=0x1
+
+#FC12
+phy_chain_tx_polarity_flip_physical{49.0}=0x0
+phy_chain_rx_polarity_flip_physical{49.0}=0x1
+phy_chain_tx_polarity_flip_physical{50.0}=0x1
+phy_chain_rx_polarity_flip_physical{50.0}=0x0
+phy_chain_tx_polarity_flip_physical{51.0}=0x0
+phy_chain_rx_polarity_flip_physical{51.0}=0x1
+phy_chain_tx_polarity_flip_physical{52.0}=0x1
+phy_chain_rx_polarity_flip_physical{52.0}=0x0
+
+#FC13
+phy_chain_tx_polarity_flip_physical{53.0}=0x0
+phy_chain_rx_polarity_flip_physical{53.0}=0x1
+phy_chain_tx_polarity_flip_physical{54.0}=0x1
+phy_chain_rx_polarity_flip_physical{54.0}=0x0
+phy_chain_tx_polarity_flip_physical{55.0}=0x0
+phy_chain_rx_polarity_flip_physical{55.0}=0x1
+phy_chain_tx_polarity_flip_physical{56.0}=0x1
+phy_chain_rx_polarity_flip_physical{56.0}=0x0
+
+#FC14
+phy_chain_tx_polarity_flip_physical{57.0}=0x0
+phy_chain_rx_polarity_flip_physical{57.0}=0x1
+phy_chain_tx_polarity_flip_physical{58.0}=0x1
+phy_chain_rx_polarity_flip_physical{58.0}=0x0
+phy_chain_tx_polarity_flip_physical{59.0}=0x0
+phy_chain_rx_polarity_flip_physical{59.0}=0x1
+phy_chain_tx_polarity_flip_physical{60.0}=0x1
+phy_chain_rx_polarity_flip_physical{60.0}=0x0
+
+#FC15
+phy_chain_tx_polarity_flip_physical{61.0}=0x1
+phy_chain_rx_polarity_flip_physical{61.0}=0x1
+phy_chain_tx_polarity_flip_physical{62.0}=0x0
+phy_chain_rx_polarity_flip_physical{62.0}=0x0
+phy_chain_tx_polarity_flip_physical{63.0}=0x1
+phy_chain_rx_polarity_flip_physical{63.0}=0x1
+phy_chain_tx_polarity_flip_physical{64.0}=0x0
+phy_chain_rx_polarity_flip_physical{64.0}=0x0
+
+#FC16
+phy_chain_tx_polarity_flip_physical{65.0}=0x1
+phy_chain_rx_polarity_flip_physical{65.0}=0x0
+phy_chain_tx_polarity_flip_physical{66.0}=0x0
+phy_chain_rx_polarity_flip_physical{66.0}=0x1
+phy_chain_tx_polarity_flip_physical{67.0}=0x1
+phy_chain_rx_polarity_flip_physical{67.0}=0x0
+phy_chain_tx_polarity_flip_physical{68.0}=0x0
+phy_chain_rx_polarity_flip_physical{68.0}=0x1
+
+#FC17
+phy_chain_tx_polarity_flip_physical{69.0}=0x1
+phy_chain_rx_polarity_flip_physical{69.0}=0x0
+phy_chain_tx_polarity_flip_physical{70.0}=0x0
+phy_chain_rx_polarity_flip_physical{70.0}=0x1
+phy_chain_tx_polarity_flip_physical{71.0}=0x1
+phy_chain_rx_polarity_flip_physical{71.0}=0x0
+phy_chain_tx_polarity_flip_physical{72.0}=0x0
+phy_chain_rx_polarity_flip_physical{72.0}=0x1
+
+#FC18
+phy_chain_tx_polarity_flip_physical{73.0}=0x0
+phy_chain_rx_polarity_flip_physical{73.0}=0x1
+phy_chain_tx_polarity_flip_physical{74.0}=0x1
+phy_chain_rx_polarity_flip_physical{74.0}=0x0
+phy_chain_tx_polarity_flip_physical{75.0}=0x0
+phy_chain_rx_polarity_flip_physical{75.0}=0x0
+phy_chain_tx_polarity_flip_physical{76.0}=0x1
+phy_chain_rx_polarity_flip_physical{76.0}=0x0
+
+#FC19
+phy_chain_tx_polarity_flip_physical{77.0}=0x1
+phy_chain_rx_polarity_flip_physical{77.0}=0x0
+phy_chain_tx_polarity_flip_physical{78.0}=0x1
+phy_chain_rx_polarity_flip_physical{78.0}=0x1
+phy_chain_tx_polarity_flip_physical{79.0}=0x0
+phy_chain_rx_polarity_flip_physical{79.0}=0x0
+phy_chain_tx_polarity_flip_physical{80.0}=0x0
+phy_chain_rx_polarity_flip_physical{80.0}=0x0
+
+
+phy_chain_tx_polarity_flip_physical{81.0}=0x0
+phy_chain_rx_polarity_flip_physical{81.0}=0x1
+
+
+dport_map_port_17=1
+dport_map_port_18=2
+dport_map_port_19=3
+dport_map_port_20=4
+dport_map_port_21=5
+dport_map_port_22=6
+dport_map_port_23=7
+dport_map_port_24=8
+dport_map_port_25=9
+dport_map_port_26=10
+dport_map_port_27=11
+dport_map_port_28=12
+dport_map_port_35=13
+dport_map_port_36=14
+dport_map_port_37=15
+dport_map_port_38=16
+dport_map_port_39=17
+dport_map_port_40=18
+dport_map_port_41=19
+dport_map_port_42=20
+dport_map_port_43=21
+dport_map_port_44=22
+dport_map_port_45=23
+dport_map_port_46=24
+dport_map_port_3=25
+dport_map_port_4=26
+dport_map_port_5=27
+dport_map_port_6=28
+dport_map_port_7=29
+dport_map_port_8=30
+dport_map_port_9=31
+dport_map_port_10=32
+dport_map_port_11=33
+dport_map_port_12=34
+dport_map_port_13=35
+dport_map_port_14=36
+dport_map_port_47=37
+dport_map_port_48=38
+dport_map_port_49=39
+dport_map_port_50=40
+dport_map_port_51=41
+dport_map_port_52=42
+dport_map_port_53=43
+dport_map_port_54=44
+dport_map_port_55=45
+dport_map_port_56=46
+dport_map_port_57=47
+dport_map_port_58=48
+dport_map_port_33=49
+dport_map_port_34=50
+dport_map_port_59=51
+dport_map_port_60=52
+dport_map_port_1=53
+dport_map_port_15=54
+dport_map_port_2=55
+dport_map_port_16=56
+#dport_map_port_64=57
+
+#VxLAN
+sai_tunnel_support=1
+use_all_splithorizon_groups=1
+bcm_tunnel_term_compatible_mode=1
+flow_init_mode=1
+l3_ecmp_levels=2
+riot_enable=1
+riot_overlay_l3_intf_mem_size=8192
+riot_overlay_l3_egress_mem_size=32768
+riot_overlay_ecmp_resilient_hash_size=16384
diff --git a/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/td3-as13-48f8h.config.bcm b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/td3-as13-48f8h.config.bcm
new file mode 100755
index 000000000000..e76aa8eb34e9
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/Questone_2A/td3-as13-48f8h.config.bcm
@@ -0,0 +1,414 @@
+ptp_ts_pll_fref=50000000
+ptp_bs_fref_0=50000000
+ptp_bs_fref_1=50000000
+oversubscribe_mode=1
+pbmp_xport_xe=0x11ffffffe1ffffffe
+stable_size=0x5500000
+ifp_inports_support_enable=1
+
+#FC0
+portmap_1.0=1:100
+
+#FC1
+portmap_2.0=5:100
+
+#FC2
+portmap_3.0=9:25
+portmap_4.0=10:25
+portmap_5.0=11:25
+portmap_6.0=12:25
+
+#FC3
+portmap_7.0=13:25
+portmap_8.0=14:25
+portmap_9.0=15:25
+portmap_10.0=16:25
+
+#FC4
+portmap_11.0=17:25
+portmap_12.0=18:25
+portmap_13.0=19:25
+portmap_14.0=20:25
+
+#FC5
+portmap_15.0=21:100
+
+#FC6
+portmap_16.0=25:100
+
+#FC7
+portmap_17.0=29:25
+portmap_18.0=30:25
+portmap_19.0=31:25
+portmap_20.0=32:25
+
+#FC8
+portmap_21.0=33:25
+portmap_22.0=34:25
+portmap_23.0=35:25
+portmap_24.0=36:25
+
+#FC9
+portmap_25.0=37:25
+portmap_26.0=38:25
+portmap_27.0=39:25
+portmap_28.0=40:25
+
+#FC10
+portmap_33.0=41:100
+
+#FC11
+portmap_34.0=45:100
+
+#FC12
+portmap_35.0=49:25
+portmap_36.0=50:25
+portmap_37.0=51:25
+portmap_38.0=52:25
+
+#FC13
+portmap_39.0=53:25
+portmap_40.0=54:25
+portmap_41.0=55:25
+portmap_42.0=56:25
+
+#FC14
+portmap_43.0=57:25
+portmap_44.0=58:25
+portmap_45.0=59:25
+portmap_46.0=60:25
+
+#FC15
+portmap_47.0=61:25
+portmap_48.0=62:25
+portmap_49.0=63:25
+portmap_50.0=64:25
+
+#FC16
+portmap_51.0=65:25
+portmap_52.0=66:25
+portmap_53.0=67:25
+portmap_54.0=68:25
+
+#FC17
+portmap_55.0=69:25
+portmap_56.0=70:25
+portmap_57.0=71:25
+portmap_58.0=72:25
+
+#FC18
+portmap_59.0=73:100
+
+#FC19
+portmap_60.0=77:100
+
+
+#portmap_64.0=81:10
+
+phy_chain_tx_lane_map_physical{1.0}=0x0123
+phy_chain_rx_lane_map_physical{1.0}=0x1302
+phy_chain_tx_lane_map_physical{5.0}=0x1032
+phy_chain_rx_lane_map_physical{5.0}=0x1302
+phy_chain_tx_lane_map_physical{9.0}=0x0123
+phy_chain_rx_lane_map_physical{9.0}=0x1032
+phy_chain_tx_lane_map_physical{13.0}=0x0123
+phy_chain_rx_lane_map_physical{13.0}=0x1032
+phy_chain_tx_lane_map_physical{17.0}=0x0123
+phy_chain_rx_lane_map_physical{17.0}=0x1032
+phy_chain_tx_lane_map_physical{21.0}=0x1302
+phy_chain_rx_lane_map_physical{21.0}=0x1032
+phy_chain_tx_lane_map_physical{25.0}=0x3120
+phy_chain_rx_lane_map_physical{25.0}=0x1032
+phy_chain_tx_lane_map_physical{29.0}=0x0123
+phy_chain_rx_lane_map_physical{29.0}=0x1032
+phy_chain_tx_lane_map_physical{33.0}=0x0123
+phy_chain_rx_lane_map_physical{33.0}=0x1032
+phy_chain_tx_lane_map_physical{37.0}=0x0123
+phy_chain_rx_lane_map_physical{37.0}=0x1032
+phy_chain_tx_lane_map_physical{41.0}=0x1302
+phy_chain_rx_lane_map_physical{41.0}=0x1023
+phy_chain_tx_lane_map_physical{45.0}=0x1032
+phy_chain_rx_lane_map_physical{45.0}=0x0213
+phy_chain_tx_lane_map_physical{49.0}=0x3210
+phy_chain_rx_lane_map_physical{49.0}=0x2301
+phy_chain_tx_lane_map_physical{53.0}=0x3210
+phy_chain_rx_lane_map_physical{53.0}=0x2301
+phy_chain_tx_lane_map_physical{57.0}=0x3210
+phy_chain_rx_lane_map_physical{57.0}=0x2301
+phy_chain_tx_lane_map_physical{61.0}=0x3210
+phy_chain_rx_lane_map_physical{61.0}=0x2301
+phy_chain_tx_lane_map_physical{65.0}=0x3210
+phy_chain_rx_lane_map_physical{65.0}=0x2301
+phy_chain_tx_lane_map_physical{69.0}=0x3210
+phy_chain_rx_lane_map_physical{69.0}=0x2301
+phy_chain_tx_lane_map_physical{73.0}=0x2301
+phy_chain_rx_lane_map_physical{73.0}=0x2031
+phy_chain_tx_lane_map_physical{77.0}=0x0132
+phy_chain_rx_lane_map_physical{77.0}=0x3012
+phy_chain_tx_lane_map_physical{81.0}=0x3210
+phy_chain_rx_lane_map_physical{81.0}=0x3201
+
+#FC0
+phy_chain_tx_polarity_flip_physical{1.0}=0x0
+phy_chain_rx_polarity_flip_physical{1.0}=0x0
+phy_chain_tx_polarity_flip_physical{2.0}=0x0
+phy_chain_rx_polarity_flip_physical{2.0}=0x1
+phy_chain_tx_polarity_flip_physical{3.0}=0x1
+phy_chain_rx_polarity_flip_physical{3.0}=0x1
+phy_chain_tx_polarity_flip_physical{4.0}=0x0
+phy_chain_rx_polarity_flip_physical{4.0}=0x1
+
+#FC1
+phy_chain_tx_polarity_flip_physical{5.0}=0x0
+phy_chain_rx_polarity_flip_physical{5.0}=0x1
+phy_chain_tx_polarity_flip_physical{6.0}=0x1
+phy_chain_rx_polarity_flip_physical{6.0}=0x0
+phy_chain_tx_polarity_flip_physical{7.0}=0x1
+phy_chain_rx_polarity_flip_physical{7.0}=0x0
+phy_chain_tx_polarity_flip_physical{8.0}=0x1
+phy_chain_rx_polarity_flip_physical{8.0}=0x0
+
+#FC2
+phy_chain_tx_polarity_flip_physical{9.0}=0x0
+phy_chain_rx_polarity_flip_physical{9.0}=0x1
+phy_chain_tx_polarity_flip_physical{10.0}=0x1
+phy_chain_rx_polarity_flip_physical{10.0}=0x0
+phy_chain_tx_polarity_flip_physical{11.0}=0x0
+phy_chain_rx_polarity_flip_physical{11.0}=0x1
+phy_chain_tx_polarity_flip_physical{12.0}=0x1
+phy_chain_rx_polarity_flip_physical{12.0}=0x0
+
+#FC3
+phy_chain_tx_polarity_flip_physical{13.0}=0x0
+phy_chain_rx_polarity_flip_physical{13.0}=0x1
+phy_chain_tx_polarity_flip_physical{14.0}=0x1
+phy_chain_rx_polarity_flip_physical{14.0}=0x0
+phy_chain_tx_polarity_flip_physical{15.0}=0x0
+phy_chain_rx_polarity_flip_physical{15.0}=0x1
+phy_chain_tx_polarity_flip_physical{16.0}=0x1
+phy_chain_rx_polarity_flip_physical{16.0}=0x0
+
+#FC4
+phy_chain_tx_polarity_flip_physical{17.0}=0x0
+phy_chain_rx_polarity_flip_physical{17.0}=0x1
+phy_chain_tx_polarity_flip_physical{18.0}=0x1
+phy_chain_rx_polarity_flip_physical{18.0}=0x1
+phy_chain_tx_polarity_flip_physical{19.0}=0x0
+phy_chain_rx_polarity_flip_physical{19.0}=0x1
+phy_chain_tx_polarity_flip_physical{20.0}=0x1
+phy_chain_rx_polarity_flip_physical{20.0}=0x0
+
+#FC5
+phy_chain_tx_polarity_flip_physical{21.0}=0x1
+phy_chain_rx_polarity_flip_physical{21.0}=0x0
+phy_chain_tx_polarity_flip_physical{22.0}=0x1
+phy_chain_rx_polarity_flip_physical{22.0}=0x1
+phy_chain_tx_polarity_flip_physical{23.0}=0x1
+phy_chain_rx_polarity_flip_physical{23.0}=0x0
+phy_chain_tx_polarity_flip_physical{24.0}=0x0
+phy_chain_rx_polarity_flip_physical{24.0}=0x0
+
+#FC6
+phy_chain_tx_polarity_flip_physical{25.0}=0x0
+phy_chain_rx_polarity_flip_physical{25.0}=0x0
+phy_chain_tx_polarity_flip_physical{26.0}=0x1
+phy_chain_rx_polarity_flip_physical{26.0}=0x1
+phy_chain_tx_polarity_flip_physical{27.0}=0x1
+phy_chain_rx_polarity_flip_physical{27.0}=0x0
+phy_chain_tx_polarity_flip_physical{28.0}=0x0
+phy_chain_rx_polarity_flip_physical{28.0}=0x0
+
+#FC7
+phy_chain_tx_polarity_flip_physical{29.0}=0x1
+phy_chain_rx_polarity_flip_physical{29.0}=0x0
+phy_chain_tx_polarity_flip_physical{30.0}=0x0
+phy_chain_rx_polarity_flip_physical{30.0}=0x1
+phy_chain_tx_polarity_flip_physical{31.0}=0x1
+phy_chain_rx_polarity_flip_physical{31.0}=0x0
+phy_chain_tx_polarity_flip_physical{32.0}=0x0
+phy_chain_rx_polarity_flip_physical{32.0}=0x1
+
+#FC8
+phy_chain_tx_polarity_flip_physical{33.0}=0x1
+phy_chain_rx_polarity_flip_physical{33.0}=0x0
+phy_chain_tx_polarity_flip_physical{34.0}=0x0
+phy_chain_rx_polarity_flip_physical{34.0}=0x1
+phy_chain_tx_polarity_flip_physical{35.0}=0x1
+phy_chain_rx_polarity_flip_physical{35.0}=0x0
+phy_chain_tx_polarity_flip_physical{36.0}=0x0
+phy_chain_rx_polarity_flip_physical{36.0}=0x1
+
+#FC9
+phy_chain_tx_polarity_flip_physical{37.0}=0x1
+phy_chain_rx_polarity_flip_physical{37.0}=0x1
+phy_chain_tx_polarity_flip_physical{38.0}=0x0
+phy_chain_rx_polarity_flip_physical{38.0}=0x0
+phy_chain_tx_polarity_flip_physical{39.0}=0x1
+phy_chain_rx_polarity_flip_physical{39.0}=0x1
+phy_chain_tx_polarity_flip_physical{40.0}=0x0
+phy_chain_rx_polarity_flip_physical{40.0}=0x0
+
+#FC10
+phy_chain_tx_polarity_flip_physical{41.0}=0x1
+phy_chain_rx_polarity_flip_physical{41.0}=0x0
+phy_chain_tx_polarity_flip_physical{42.0}=0x0
+phy_chain_rx_polarity_flip_physical{42.0}=0x0
+phy_chain_tx_polarity_flip_physical{43.0}=0x1
+phy_chain_rx_polarity_flip_physical{43.0}=0x0
+phy_chain_tx_polarity_flip_physical{44.0}=0x1
+phy_chain_rx_polarity_flip_physical{44.0}=0x0
+
+#FC11
+phy_chain_tx_polarity_flip_physical{45.0}=0x0
+phy_chain_rx_polarity_flip_physical{45.0}=0x1
+phy_chain_tx_polarity_flip_physical{46.0}=0x1
+phy_chain_rx_polarity_flip_physical{46.0}=0x0
+phy_chain_tx_polarity_flip_physical{47.0}=0x0
+phy_chain_rx_polarity_flip_physical{47.0}=0x0
+phy_chain_tx_polarity_flip_physical{48.0}=0x1
+phy_chain_rx_polarity_flip_physical{48.0}=0x1
+
+#FC12
+phy_chain_tx_polarity_flip_physical{49.0}=0x0
+phy_chain_rx_polarity_flip_physical{49.0}=0x1
+phy_chain_tx_polarity_flip_physical{50.0}=0x1
+phy_chain_rx_polarity_flip_physical{50.0}=0x0
+phy_chain_tx_polarity_flip_physical{51.0}=0x0
+phy_chain_rx_polarity_flip_physical{51.0}=0x1
+phy_chain_tx_polarity_flip_physical{52.0}=0x1
+phy_chain_rx_polarity_flip_physical{52.0}=0x0
+
+#FC13
+phy_chain_tx_polarity_flip_physical{53.0}=0x0
+phy_chain_rx_polarity_flip_physical{53.0}=0x1
+phy_chain_tx_polarity_flip_physical{54.0}=0x1
+phy_chain_rx_polarity_flip_physical{54.0}=0x0
+phy_chain_tx_polarity_flip_physical{55.0}=0x0
+phy_chain_rx_polarity_flip_physical{55.0}=0x1
+phy_chain_tx_polarity_flip_physical{56.0}=0x1
+phy_chain_rx_polarity_flip_physical{56.0}=0x0
+
+#FC14
+phy_chain_tx_polarity_flip_physical{57.0}=0x0
+phy_chain_rx_polarity_flip_physical{57.0}=0x1
+phy_chain_tx_polarity_flip_physical{58.0}=0x1
+phy_chain_rx_polarity_flip_physical{58.0}=0x0
+phy_chain_tx_polarity_flip_physical{59.0}=0x0
+phy_chain_rx_polarity_flip_physical{59.0}=0x1
+phy_chain_tx_polarity_flip_physical{60.0}=0x1
+phy_chain_rx_polarity_flip_physical{60.0}=0x0
+
+#FC15
+phy_chain_tx_polarity_flip_physical{61.0}=0x1
+phy_chain_rx_polarity_flip_physical{61.0}=0x1
+phy_chain_tx_polarity_flip_physical{62.0}=0x0
+phy_chain_rx_polarity_flip_physical{62.0}=0x0
+phy_chain_tx_polarity_flip_physical{63.0}=0x1
+phy_chain_rx_polarity_flip_physical{63.0}=0x1
+phy_chain_tx_polarity_flip_physical{64.0}=0x0
+phy_chain_rx_polarity_flip_physical{64.0}=0x0
+
+#FC16
+phy_chain_tx_polarity_flip_physical{65.0}=0x1
+phy_chain_rx_polarity_flip_physical{65.0}=0x0
+phy_chain_tx_polarity_flip_physical{66.0}=0x0
+phy_chain_rx_polarity_flip_physical{66.0}=0x1
+phy_chain_tx_polarity_flip_physical{67.0}=0x1
+phy_chain_rx_polarity_flip_physical{67.0}=0x0
+phy_chain_tx_polarity_flip_physical{68.0}=0x0
+phy_chain_rx_polarity_flip_physical{68.0}=0x1
+
+#FC17
+phy_chain_tx_polarity_flip_physical{69.0}=0x1
+phy_chain_rx_polarity_flip_physical{69.0}=0x0
+phy_chain_tx_polarity_flip_physical{70.0}=0x0
+phy_chain_rx_polarity_flip_physical{70.0}=0x1
+phy_chain_tx_polarity_flip_physical{71.0}=0x1
+phy_chain_rx_polarity_flip_physical{71.0}=0x0
+phy_chain_tx_polarity_flip_physical{72.0}=0x0
+phy_chain_rx_polarity_flip_physical{72.0}=0x1
+
+#FC18
+phy_chain_tx_polarity_flip_physical{73.0}=0x0
+phy_chain_rx_polarity_flip_physical{73.0}=0x1
+phy_chain_tx_polarity_flip_physical{74.0}=0x1
+phy_chain_rx_polarity_flip_physical{74.0}=0x0
+phy_chain_tx_polarity_flip_physical{75.0}=0x0
+phy_chain_rx_polarity_flip_physical{75.0}=0x0
+phy_chain_tx_polarity_flip_physical{76.0}=0x1
+phy_chain_rx_polarity_flip_physical{76.0}=0x0
+
+#FC19
+phy_chain_tx_polarity_flip_physical{77.0}=0x1
+phy_chain_rx_polarity_flip_physical{77.0}=0x0
+phy_chain_tx_polarity_flip_physical{78.0}=0x1
+phy_chain_rx_polarity_flip_physical{78.0}=0x1
+phy_chain_tx_polarity_flip_physical{79.0}=0x0
+phy_chain_rx_polarity_flip_physical{79.0}=0x0
+phy_chain_tx_polarity_flip_physical{80.0}=0x0
+phy_chain_rx_polarity_flip_physical{80.0}=0x0
+
+
+phy_chain_tx_polarity_flip_physical{81.0}=0x0
+phy_chain_rx_polarity_flip_physical{81.0}=0x1
+
+
+dport_map_port_17=1
+dport_map_port_18=2
+dport_map_port_19=3
+dport_map_port_20=4
+dport_map_port_21=5
+dport_map_port_22=6
+dport_map_port_23=7
+dport_map_port_24=8
+dport_map_port_25=9
+dport_map_port_26=10
+dport_map_port_27=11
+dport_map_port_28=12
+dport_map_port_35=13
+dport_map_port_36=14
+dport_map_port_37=15
+dport_map_port_38=16
+dport_map_port_39=17
+dport_map_port_40=18
+dport_map_port_41=19
+dport_map_port_42=20
+dport_map_port_43=21
+dport_map_port_44=22
+dport_map_port_45=23
+dport_map_port_46=24
+dport_map_port_3=25
+dport_map_port_4=26
+dport_map_port_5=27
+dport_map_port_6=28
+dport_map_port_7=29
+dport_map_port_8=30
+dport_map_port_9=31
+dport_map_port_10=32
+dport_map_port_11=33
+dport_map_port_12=34
+dport_map_port_13=35
+dport_map_port_14=36
+dport_map_port_47=37
+dport_map_port_48=38
+dport_map_port_49=39
+dport_map_port_50=40
+dport_map_port_51=41
+dport_map_port_52=42
+dport_map_port_53=43
+dport_map_port_54=44
+dport_map_port_55=45
+dport_map_port_56=46
+dport_map_port_57=47
+dport_map_port_58=48
+dport_map_port_33=49
+dport_map_port_34=50
+dport_map_port_59=51
+dport_map_port_60=52
+dport_map_port_1=53
+dport_map_port_15=54
+dport_map_port_2=55
+dport_map_port_16=56
+#dport_map_port_64=57
+
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
diff --git a/device/celestica/x86_64-cel_questone_2-r0/installer.conf b/device/celestica/x86_64-cel_questone_2-r0/installer.conf
new file mode 100644
index 000000000000..48126f43549a
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/installer.conf
@@ -0,0 +1,4 @@
+CONSOLE_PORT=0xe060
+CONSOLE_DEV=0
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="processor.max_cstate=1 intel_idle.max_cstate=0 intel_iommu=off thermal.off=1 noirqdebug"
diff --git a/device/celestica/x86_64-cel_questone_2-r0/led_proc_init.soc b/device/celestica/x86_64-cel_questone_2-r0/led_proc_init.soc
new file mode 100644
index 000000000000..6f242fa07d89
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/led_proc_init.soc
@@ -0,0 +1,8 @@
+#Enable all ports
+#port all en=1
+#sleep 6
+#linkscan 250000; port xe,ce linkscan=on
+
+#Load LED
+m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
+led auto on; led start
diff --git a/device/celestica/x86_64-cel_questone_2-r0/opennsl-postinit.cfg b/device/celestica/x86_64-cel_questone_2-r0/opennsl-postinit.cfg
new file mode 100644
index 000000000000..7008c14c0ffc
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/opennsl-postinit.cfg
@@ -0,0 +1,3 @@
+linkscan 250000; port xe,ce linkscan=on
+sleep 1
+led auto on; led start
diff --git a/device/celestica/x86_64-cel_questone_2-r0/pcie.yaml b/device/celestica/x86_64-cel_questone_2-r0/pcie.yaml
new file mode 100644
index 000000000000..bafe4a0d6d2a
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/pcie.yaml
@@ -0,0 +1,153 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: '1980'
+  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev
+    11)'
+- bus: '00'
+  dev: '04'
+  fn: '0'
+  id: 19a1
+  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers
+    (rev 11)'
+- bus: '00'
+  dev: '05'
+  fn: '0'
+  id: 19a2
+  name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000
+    Series Root Complex Event Collector (rev 11)'
+- bus: '00'
+  dev: '06'
+  fn: '0'
+  id: 19a3
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT
+    Root Port (rev 11)'
+- bus: '00'
+  dev: 09
+  fn: '0'
+  id: 19a4
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #0 (rev 11)'
+- bus: '00'
+  dev: '10'
+  fn: '0'
+  id: 19aa
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #6 (rev 11)'
+- bus: '00'
+  dev: '11'
+  fn: '0'
+  id: 19ab
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #7 (rev 11)'
+- bus: '00'
+  dev: '12'
+  fn: '0'
+  id: 19ac
+  name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller
+    - Host (rev 11)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 19c2
+  name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller
+    1 (rev 11)'
+- bus: '00'
+  dev: '15'
+  fn: '0'
+  id: 19d0
+  name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI
+    Controller (rev 11)'
+- bus: '00'
+  dev: '16'
+  fn: '0'
+  id: 19d1
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
+    Root Port #0 (rev 11)'
+- bus: '00'
+  dev: '18'
+  fn: '0'
+  id: 19d3
+  name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME
+    HECI 1 (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '0'
+  id: 19d8
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+    (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '1'
+  id: 19d8
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+    (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '2'
+  id: 19d8
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+    (rev 11)'
+- bus: '00'
+  dev: 1c
+  fn: '0'
+  id: 19db
+  name: 'SD Host controller: Intel Corporation Device 19db (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: 19dc
+  name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev
+    11)'
+- bus: '00'
+  dev: 1f
+  fn: '2'
+  id: 19de
+  name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management
+    Controller (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '4'
+  id: 19df
+  name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev
+    11)'
+- bus: '00'
+  dev: 1f
+  fn: '5'
+  id: 19e0
+  name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series
+    SPI Controller (rev 11)'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: 19e2
+  name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology
+    (rev 11)'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: b770
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b770 (rev 01)'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: '7021'
+  name: 'Memory controller: Xilinx Corporation Device 7021'
+- bus: '04'
+  dev: '00'
+  fn: '0'
+  id: '1533'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
+    03)'
+- bus: '05'
+  dev: '00'
+  fn: '0'
+  id: 15c2
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
+    (rev 11)'
+- bus: '05'
+  dev: '00'
+  fn: '1'
+  id: 15c2
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
+    (rev 11)'
diff --git a/device/celestica/x86_64-cel_questone_2-r0/platform_asic b/device/celestica/x86_64-cel_questone_2-r0/platform_asic
new file mode 100644
index 000000000000..960467652765
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/celestica/x86_64-cel_questone_2-r0/platform_reboot b/device/celestica/x86_64-cel_questone_2-r0/platform_reboot
new file mode 100755
index 000000000000..12a18efe1d0b
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/platform_reboot
@@ -0,0 +1,6 @@
+#!/bin/bash
+
+# Set all LEDs to BMC's control
+ipmitool raw 0x3a 0x0f 0x02 0x01 &> /dev/null
+
+/usr/local/bin/questone2_platform_shutdown.sh system
diff --git a/device/celestica/x86_64-cel_questone_2-r0/plugins/eeprom.py b/device/celestica/x86_64-cel_questone_2-r0/plugins/eeprom.py
new file mode 100644
index 000000000000..22895539823f
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/plugins/eeprom.py
@@ -0,0 +1,23 @@
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica DX010
+#
+# Platform and model specific eeprom subclass, inherits from the base class,
+# and provides the followings:
+# - the eeprom format definition
+# - specific encoder/decoder if there is special need
+#############################################################################
+
+try:
+    from sonic_eeprom import eeprom_tlvinfo
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+
+class board(eeprom_tlvinfo.TlvInfoDecoder):
+
+    def __init__(self, name, path, cpld_root, ro):
+        self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0056/eeprom"
+        super(board, self).__init__(self.eeprom_path, 0, '', True)
+
diff --git a/device/celestica/x86_64-cel_questone_2-r0/plugins/sfputil.py b/device/celestica/x86_64-cel_questone_2-r0/plugins/sfputil.py
new file mode 100755
index 000000000000..03882c65ac00
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/plugins/sfputil.py
@@ -0,0 +1,312 @@
+#!/usr/bin/env python
+#
+# Platform-specific SFP transceiver interface for SONiC
+#
+
+try:
+    import time
+    from sonic_sfp.sfputilbase import SfpUtilBase
+    import struct
+except ImportError as e:
+    raise ImportError("%s - required module not found" % str(e))
+
+
+class SfpUtil(SfpUtilBase):
+    """Platform-specific SfpUtil class"""
+
+    PORT_START = 0
+    PORT_END = 55
+    QSFP_PORT_START = 48
+    QSFP_PORT_END = 55
+    __xcvr_presence = {}
+
+    EEPROM_OFFSET = 9
+    PORT_INFO_PATH = '/sys/class/questone2_fpga'
+
+    _port_name = ""
+    _port_to_eeprom_mapping = {}
+    _port_to_i2cbus_mapping = {}
+
+    @property
+    def port_start(self):
+        return self.PORT_START
+
+    @property
+    def port_end(self):
+        return self.PORT_END
+
+    @property
+    def qsfp_ports(self):
+        return range(self.QSFP_PORT_START, self.QSFP_PORT_END + 1)
+
+    @property
+    def port_to_eeprom_mapping(self):
+        return self._port_to_eeprom_mapping
+
+    @property
+    def port_to_i2cbus_mapping(self):
+        return self._port_to_i2cbus_mapping
+
+    def get_port_name(self, port_num):
+        if port_num in self.qsfp_ports:
+            self._port_name = "QSFP" + str(port_num - self.QSFP_PORT_START + 1)
+        else:
+            self._port_name = "SFP" + str(port_num + 1)
+        return self._port_name
+
+    def get_eeprom_dom_raw(self, port_num):
+        if port_num in self.qsfp_ports:
+            # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw
+            return None
+        else:
+            # Read dom eeprom at addr 0x51
+            return self._read_eeprom_devid(port_num, self.DOM_EEPROM_ADDR, 256)
+
+    def __init__(self):
+        # Override port_to_eeprom_mapping for class initialization
+        eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'
+
+        for x in range(self.PORT_START, self.PORT_END+1):
+            # port_index = 0 , it's path = /sys/bus/i2c/devices/i2c-10/10-0050/eeprom
+            # port_index = 55, it's path = /sys/bus/i2c/devices/i2c-65/65-0050/eeprom
+            # so the real offset is 10
+            self.port_to_i2cbus_mapping[x] = (x + 1 + self.EEPROM_OFFSET)
+            self.port_to_eeprom_mapping[x] = eeprom_path.format(
+                x + 1 + self.EEPROM_OFFSET)
+        SfpUtilBase.__init__(self)
+        for x in range(self.PORT_START, self.PORT_END+1):
+            self.__xcvr_presence[x] = self.get_presence(x)
+
+    def _do_write_file(self, file_handle, offset, value):
+        file_handle.seek(offset)
+        file_handle.write(hex(value))
+        file_handle.close()
+
+    def get_presence(self, port_num):
+
+        # Check for invalid port_num
+        if port_num not in range(self.port_start, self.port_end + 1):
+            return False
+
+        # Get path for access port presence status
+        port_name = self.get_port_name(port_num)
+        sysfs_filename = "qsfp_modprs" if port_num in self.qsfp_ports else "sfp_modabs"
+        reg_path = "/".join([self.PORT_INFO_PATH, port_name, sysfs_filename])
+
+        # Read status
+        try:
+            reg_file = open(reg_path)
+            content = reg_file.readline().rstrip()
+            reg_value = int(content)
+        except IOError as e:
+            print "Error: unable to open file: %s" % str(e)
+            return False
+
+        # Module present is active low
+        if reg_value == 0:
+            return True
+
+        return False
+
+    def get_low_power_mode(self, port_num):
+        if not self.get_presence(port_num):
+            return None
+
+        eeprom_raw = []
+        eeprom_raw.append("0x00")
+
+        lpmode = False
+        eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'.format(port_num + 1 + self.EEPROM_OFFSET)
+        if port_num >= 49:
+            try:
+                with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+                    eeprom.seek(93)
+                    raw = eeprom.read(1)
+                    eeprom.close()
+            except Exception as err:
+                return None
+
+            if len(raw) == 0:
+                return None
+            eeprom_raw[0] = hex(ord(raw[0]))[2:].zfill(2)
+
+            power_data = int(eeprom_raw[0], 16)
+            # if lpmod, power-override bit and power-set bit are both setted
+            #               bit0                bit1
+            lpmode = power_data & 0x03 != 0
+        else:
+            return None
+        
+        return lpmode
+ 
+    def set_low_power_mode(self, port_num, lpmode):
+        # Check for invalid QSFP port_num
+        if port_num not in self.qsfp_ports:
+            return False
+	
+	if not self.get_presence(port_num):
+            return False
+        eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'.format(port_num + 1 + self.EEPROM_OFFSET)
+        try:
+            reg_file = open(eeprom_path, mode="wb+")
+        except IOError as e:
+            print "Error: unable to open file: %s" % str(e)
+            return False
+
+	reg_file.seek(93)
+        power_raw = reg_file.read(1)
+        if power_raw is None:
+            return False
+        power_data = int(hex(ord(power_raw))[2:].zfill(2), 16)
+	
+        if lpmode:
+            power_data |= 0x03
+        else:
+            power_data &= ~(0x03)
+        
+        reg_file.seek(93)
+        reg_file.write(struct.pack('B', int(power_data)))
+        reg_file.close()
+
+        return True
+
+    def reset(self, port_num):
+        # Check for invalid QSFP port_num
+        if port_num not in self.qsfp_ports:
+            return False
+
+        try:
+            port_name = self.get_port_name(port_num)
+            reg_file = open(
+                "/".join([self.PORT_INFO_PATH, port_name, "qsfp_reset"]), "w")
+        except IOError as e:
+            print "Error: unable to open file: %s" % str(e)
+            return False
+
+        # Convert our register value back to a hex string and write back
+        reg_file.seek(0)
+        reg_file.write(hex(0))
+        reg_file.close()
+
+        # Sleep 1 second to allow it to settle
+        time.sleep(1)
+
+        # Flip the bit back high and write back to the register to take port out of reset
+        try:
+            reg_file = open(
+                "/".join([self.PORT_INFO_PATH, port_name, "qsfp_reset"]), "w")
+        except IOError as e:
+            print "Error: unable to open file: %s" % str(e)
+            return False
+
+        reg_file.seek(0)
+        reg_file.write(hex(1))
+        reg_file.close()
+
+        return True
+
+    def get_transceiver_change_event(self, timeout=0):
+        """
+        To detect if any transceiver change event happens.
+        """
+        start_ms = time.time() * 1000
+        xcvr_change_event_dict = {}
+        event = False
+
+        while True:
+            time.sleep(0.5)
+            for port in range(self.port_start, self.port_end+1):
+                curr_presence = self.get_presence(port)
+                if curr_presence != self.__xcvr_presence[port]:
+                    if curr_presence is True:
+                        xcvr_change_event_dict[str(port)] = '1'
+                        self.__xcvr_presence[port] = True
+                    elif curr_presence is False:
+                        xcvr_change_event_dict[str(port)] = '0'
+                        self.__xcvr_presence[port] = False
+                    event = True
+
+            if event is True:
+                return True, xcvr_change_event_dict
+
+            if timeout:
+                now_ms = time.time() * 1000
+                if (now_ms - start_ms >= timeout):
+                    return True, xcvr_change_event_dict
+
+    def tx_disable(self, port_num, disable):
+        """
+        @param port_num index of physical port
+        @param disable, True  -- disable port tx signal
+                        False -- enable port tx signal
+        @return True when operation success, False on failure.
+        """
+        TX_DISABLE_BYTE_OFFSET = 86
+        if port_num not in range(self.port_start, self.port_end + 1) or type(disable) != bool:
+            return False
+
+        # QSFP, set eeprom to disable tx
+        if port_num in self.qsfp_ports:
+            presence = self.get_presence(port_num)
+            if not presence:
+                return True
+
+            disable = b'\x0f' if disable else b'\x00'
+            # open eeprom
+            try:
+                with open(self.port_to_eeprom_mapping[port_num], mode="wb", buffering=0) as sysfsfile:
+                    sysfsfile.seek(TX_DISABLE_BYTE_OFFSET)
+                    sysfsfile.write(bytearray(disable))
+            except IOError:
+                return False
+
+        # SFP, set tx_disable pin
+        else:
+            try:
+                disable = hex(1) if disable else hex(0)
+                port_name = self.get_port_name(port_num)
+                reg_file = open(
+                    "/".join([self.PORT_INFO_PATH, port_name, "sfp_txdisable"]), "w")
+                reg_file.write(disable)
+                reg_file.close()
+            except IOError as e:
+                print "Error: unable to open file: %s" % str(e)
+                return False
+
+        return True
+
+    def reset_all(self):
+        result = True
+        port_sysfs_path = []
+        for port in range(self.port_start, self.port_end+1):
+            if port not in self.qsfp_ports:
+                continue
+
+            presence = self.get_presence(port)
+            if not presence:
+                continue
+
+            try:
+                port_name = self.get_port_name(port)
+                sysfs_path = "/".join([self.PORT_INFO_PATH,
+                                       port_name, "qsfp_reset"])
+                reg_file = open(sysfs_path, "w")
+                port_sysfs_path.append(sysfs_path)
+            except IOError as e:
+                result = False
+                continue
+
+            self._do_write_file(reg_file, 0, 0)
+
+        time.sleep(1)
+
+        for sysfs_path in port_sysfs_path:
+            try:
+                reg_file = open(sysfs_path, "w")
+            except IOError as e:
+                result = False
+                continue
+
+            self._do_write_file(reg_file, 0, 1)
+
+        return result
diff --git a/device/celestica/x86_64-cel_questone_2-r0/pmon_daemon_control.json b/device/celestica/x86_64-cel_questone_2-r0/pmon_daemon_control.json
new file mode 100644
index 000000000000..f5b2736b13e0
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/pmon_daemon_control.json
@@ -0,0 +1,5 @@
+{
+    "skip_ledd": true,
+    "skip_fancontrol": true,
+    "skip_xcvrd_cmis_mgr": true
+}
diff --git a/device/celestica/x86_64-cel_questone_2-r0/system_health_monitoring_config.json b/device/celestica/x86_64-cel_questone_2-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000000..56fda7de4f5d
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/system_health_monitoring_config.json
@@ -0,0 +1,13 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "psu.temperature"
+    ],
+    "user_defined_checkers": [],
+    "polling_interval": 60,
+    "led_color": {
+        "fault": "amber",
+        "normal": "green",
+        "booting": "green_blink_1hz"
+    }
+}
diff --git a/device/celestica/x86_64-cel_questone_2-r0/warm-reboot_plugin b/device/celestica/x86_64-cel_questone_2-r0/warm-reboot_plugin
new file mode 100755
index 000000000000..d0fb8b29e191
--- /dev/null
+++ b/device/celestica/x86_64-cel_questone_2-r0/warm-reboot_plugin
@@ -0,0 +1,4 @@
+#!/bin/bash
+
+# Set all LEDs to BMC's control
+ipmitool raw 0x3a 0x0f 0x02 0x01 &> /dev/null
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers.json.j2 b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers.json.j2
new file mode 100644
index 000000000000..0b1cb2c541b6
--- /dev/null
+++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_def.j2 b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_def.j2
new file mode 100644
index 000000000000..740cfdf79e96
--- /dev/null
+++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_def.j2
@@ -0,0 +1,46 @@
+{%- set default_cable = '300m' %}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {% for port_idx in range(0,32) %}
+        {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
+    {% endfor %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "xoff": "4625920",
+            "size": "12766208",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_lossless_pool": {
+            "size": "12766208",
+            "type": "egress",
+            "mode": "static"
+        },
+        "egress_lossy_pool": {
+            "size": "7326924",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"[BUFFER_POOL|ingress_lossless_pool]",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"0",
+            "static_th":"12766208"
+        },
+        "egress_lossy_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"1518",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_t0.j2 b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_t0.j2
new file mode 100644
index 000000000000..44fcf21887a6
--- /dev/null
+++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_t0.j2
@@ -0,0 +1,45 @@
+{%- set default_cable = '300m' %}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {% for port_idx in range(0,32) %}
+        {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
+    {% endfor %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "12766208",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_lossless_pool": {
+            "size": "12766208",
+            "type": "egress",
+            "mode": "static"
+        },
+        "egress_lossy_pool": {
+            "size": "7326924",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"[BUFFER_POOL|ingress_lossless_pool]",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"0",
+            "static_th":"12766208"
+        },
+        "egress_lossy_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"1518",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_t1.j2 b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_t1.j2
new file mode 100644
index 000000000000..740cfdf79e96
--- /dev/null
+++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/buffers_defaults_t1.j2
@@ -0,0 +1,46 @@
+{%- set default_cable = '300m' %}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {% for port_idx in range(0,32) %}
+        {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
+    {% endfor %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "xoff": "4625920",
+            "size": "12766208",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_lossless_pool": {
+            "size": "12766208",
+            "type": "egress",
+            "mode": "static"
+        },
+        "egress_lossy_pool": {
+            "size": "7326924",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"[BUFFER_POOL|ingress_lossless_pool]",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"0",
+            "static_th":"12766208"
+        },
+        "egress_lossy_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"1518",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/hwsku.json b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/hwsku.json
new file mode 100644
index 000000000000..28e50b8c0385
--- /dev/null
+++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/hwsku.json
@@ -0,0 +1,169 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet4": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet12": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet20": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet28": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet36": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet44": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet52": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet60": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet68": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet76": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet84": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet92": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet100": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet108": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet116": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet124": {
+            "default_brkout_mode": "1x100G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x10G",
+            "autoneg": "off",
+            "fec": "none"
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/l2/config b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/l2/config
new file mode 100644
index 000000000000..45a7b84d5032
--- /dev/null
+++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/l2/config
@@ -0,0 +1,3 @@
+l2_mem_entries=139264
+l3_mem_entries=8192
+l3_alpm_enable=0
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/l3/config b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/l3/config
new file mode 100644
index 000000000000..3467c1b39716
--- /dev/null
+++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/l3/config
@@ -0,0 +1,3 @@
+l2_mem_entries=40000
+l3_mem_entries=40000
+l3_alpm_enable=2
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/pg_profile_lookup.ini b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/pg_profile_lookup.ini
new file mode 100644
index 000000000000..9f2eacb6fc42
--- /dev/null
+++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/pg_profile_lookup.ini
@@ -0,0 +1,17 @@
+# PG lossless profiles.
+# speed cable size      xon     xoff   threshold xon_offset
+  10000  5m   56368     18432   55120  -3        2496
+  25000  5m   56368     18432   55120  -3        2496
+  40000  5m   56368     18432   55120  -3        2496
+  50000  5m   56368     18432   55120  -3        2496
+ 100000  5m   56368     18432   55120  -3        2496
+  10000  40m  56368     18432   55120  -3        2496
+  25000  40m  56368     18432   55120  -3        2496
+  40000  40m  56368     18432   55120  -3        2496
+  50000  40m  56368     18432   55120  -3        2496
+ 100000  40m  56368     18432   55120  -3        2496
+  10000  300m 56368     18432   55120  -3        2496
+  25000  300m 56368     18432   55120  -3        2496
+  40000  300m 56368     18432   55120  -3        2496
+  50000  300m 56368     18432   55120  -3        2496
+ 100000  300m 56368     18432   55120  -3        2496
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/port_config.ini b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/port_config.ini
index 1596faa8af96..8cd1c833a929 100644
--- a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/port_config.ini
+++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/port_config.ini
@@ -1,34 +1,34 @@
-# name       lanes               alias    fec    index   speed
-Ethernet0    1,2,3,4             QSFP1    rs     1       100000
-Ethernet4    5,6,7,8             QSFP2    rs     2       100000
-Ethernet8    9,10,11,12          QSFP3    rs     3       100000
-Ethernet12   13,14,15,16         QSFP4    rs     4       100000
-Ethernet16   17,18,19,20         QSFP5    rs     5       100000
-Ethernet20   21,22,23,24         QSFP6    rs     6       100000
-Ethernet24   25,26,27,28         QSFP7    rs     7       100000
-Ethernet28   29,30,31,32         QSFP8    rs     8       100000
-Ethernet32   33,34,35,36         QSFP9    rs     9       100000
-Ethernet36   37,38,39,40         QSFP10   rs     10      100000
-Ethernet40   41,42,43,44         QSFP11   rs     11      100000
-Ethernet44   45,46,47,48         QSFP12   rs     12      100000
-Ethernet48   49,50,51,52         QSFP13   rs     13      100000
-Ethernet52   53,54,55,56         QSFP14   rs     14      100000
-Ethernet56   57,58,59,60         QSFP15   rs     15      100000
-Ethernet60   61,62,63,64         QSFP16   rs     16      100000
-Ethernet64   65,66,67,68         QSFP17   rs     17      100000
-Ethernet68   69,70,71,72         QSFP18   rs     18      100000
-Ethernet72   73,74,75,76         QSFP19   rs     19      100000
-Ethernet76   77,78,79,80         QSFP20   rs     20      100000
-Ethernet80   81,82,83,84         QSFP21   rs     21      100000
-Ethernet84   85,86,87,88         QSFP22   rs     22      100000
-Ethernet88   89,90,91,92         QSFP23   rs     23      100000
-Ethernet92   93,94,95,96         QSFP24   rs     24      100000
-Ethernet96   97,98,99,100        QSFP25   rs     25      100000
-Ethernet100  101,102,103,104     QSFP26   rs     26      100000
-Ethernet104  105,106,107,108     QSFP27   rs     27      100000
-Ethernet108  109,110,111,112     QSFP28   rs     28      100000
-Ethernet112  113,114,115,116     QSFP29   rs     29      100000
-Ethernet116  117,118,119,120     QSFP30   rs     30      100000
-Ethernet120  121,122,123,124     QSFP31   rs     31      100000
-Ethernet124  125,126,127,128     QSFP32   rs     32      100000
-Ethernet128  129                 SFP1     none   33      10000
+# name       lanes               alias    index   speed     valid_speeds
+Ethernet0    1,2,3,4             Eth1/1    1       100000    100000,40000
+Ethernet4    5,6,7,8             Eth2/1    2       100000    100000,40000
+Ethernet8    9,10,11,12          Eth3/1    3       100000    100000,40000
+Ethernet12   13,14,15,16         Eth4/1    4       100000    100000,40000
+Ethernet16   17,18,19,20         Eth5/1    5       100000    100000,40000
+Ethernet20   21,22,23,24         Eth6/1    6       100000    100000,40000
+Ethernet24   25,26,27,28         Eth7/1    7       100000    100000,40000
+Ethernet28   29,30,31,32         Eth8/1    8       100000    100000,40000
+Ethernet32   33,34,35,36         Eth9/1    9       100000    100000,40000
+Ethernet36   37,38,39,40         Eth10/1   10      100000    100000,40000
+Ethernet40   41,42,43,44         Eth11/1   11      100000    100000,40000
+Ethernet44   45,46,47,48         Eth12/1   12      100000    100000,40000
+Ethernet48   49,50,51,52         Eth13/1   13      100000    100000,40000
+Ethernet52   53,54,55,56         Eth14/1   14      100000    100000,40000
+Ethernet56   57,58,59,60         Eth15/1   15      100000    100000,40000
+Ethernet60   61,62,63,64         Eth16/1   16      100000    100000,40000
+Ethernet64   65,66,67,68         Eth17/1   17      100000    100000,40000
+Ethernet68   69,70,71,72         Eth18/1   18      100000    100000,40000
+Ethernet72   73,74,75,76         Eth19/1   19      100000    100000,40000
+Ethernet76   77,78,79,80         Eth20/1   20      100000    100000,40000
+Ethernet80   81,82,83,84         Eth21/1   21      100000    100000,40000
+Ethernet84   85,86,87,88         Eth22/1   22      100000    100000,40000
+Ethernet88   89,90,91,92         Eth23/1   23      100000    100000,40000
+Ethernet92   93,94,95,96         Eth24/1   24      100000    100000,40000
+Ethernet96   97,98,99,100        Eth25/1   25      100000    100000,40000
+Ethernet100  101,102,103,104     Eth26/1   26      100000    100000,40000
+Ethernet104  105,106,107,108     Eth27/1   27      100000    100000,40000
+Ethernet108  109,110,111,112     Eth28/1   28      100000    100000,40000
+Ethernet112  113,114,115,116     Eth29/1   29      100000    100000,40000
+Ethernet116  117,118,119,120     Eth30/1   30      100000    100000,40000
+Ethernet120  121,122,123,124     Eth31/1   31      100000    100000,40000
+Ethernet124  125,126,127,128     Eth32/1   32      100000    100000,40000
+Ethernet128  129                 Eth33/1   33      10000     10000,1000
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/qos.json.j2 b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/qos.json.j2
new file mode 100644
index 000000000000..3e548325ea30
--- /dev/null
+++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/sai.profile b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/sai.profile
deleted file mode 100644
index b57101d114f0..000000000000
--- a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/sai.profile
+++ /dev/null
@@ -1,2 +0,0 @@
-SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-seastone_2-32x100G.config.bcm
-SAI_NUM_ECMP_MEMBERS=64
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/sai.profile.j2 b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/sai.profile.j2
new file mode 100644
index 000000000000..0c9245de7cd2
--- /dev/null
+++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/sai.profile.j2
@@ -0,0 +1,17 @@
+{# Get sai.profile based on vxlan_profile. Vxlan's config.bcm file is the default one #}
+{%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-seastone_2-32x100G-vxlan.config.bcm' -%}
+{%- if DEVICE_METADATA is defined and DEVICE_METADATA['localhost'] is defined -%}
+{%-     if DEVICE_METADATA['localhost']['vxlan_profile'] is defined -%}
+{%-         set vxlan_profile = DEVICE_METADATA['localhost']['vxlan_profile'] -%}
+{%-         if 'enable' in vxlan_profile.lower() %}
+{%              set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-seastone_2-32x100G-vxlan.config.bcm' -%}
+{%-         else %}
+{%-             set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-seastone_2-32x100G.config.bcm' -%}
+{%-         endif %}
+{%-     else %}
+{%-         set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-seastone_2-32x100G-vxlan.config.bcm' -%}
+{%-     endif %}
+{%- endif %}
+{# Write the contents of sai_profile_filename to sai.profile file #}
+{{ sai_profile_contents }}
+SAI_NUM_ECMP_MEMBERS=64
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/td3-seastone_2-32x100G-vxlan.config.bcm b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/td3-seastone_2-32x100G-vxlan.config.bcm
new file mode 100644
index 000000000000..83c535a24b35
--- /dev/null
+++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/td3-seastone_2-32x100G-vxlan.config.bcm
@@ -0,0 +1,576 @@
+help_cli_enable=1
+ifp_inports_support_enable=1
+ipv6_lpm_128b_enable=0x1
+l2_mem_entries=32768
+l2xmsg_mode=1
+l3_max_ecmp_mode=1
+l3_mem_entries=16384
+lpm_scaling_enable=1
+max_vp_lags=0
+#mem_cache_enable=0
+memlist_enable=1
+reglist_enable=1
+#scache_filename=/tmp/scache
+schan_intr_enable=0
+stable_size=0x5500000
+tdma_timeout_usec=3000000
+miim_intr_enable=0
+module_64ports=1
+oversubscribe_mode=1
+parity_enable=0
+serdes_lane_config_dfe=on
+#serdes_fec_enable=1
+serdes_if_type_ce=14
+pbmp_gport_stack.0=0x0000000000000000000000000000000000000000000000000000000000000000
+pbmp_xport_xe=0x3ffffffffffffffffffffffffffffffffe
+port_flex_enable=1
+
+ptp_ts_pll_fref=50000000
+ptp_bs_fref_0=50000000
+ptp_bs_fref_1=50000000
+bcm_tunnel_term_compatible_mode=1
+phy_an_c73=1
+
+portmap_1=1:100
+portmap_5=5:100
+portmap_9=9:100
+portmap_13=13:100
+portmap_17=17:100
+portmap_21=21:100
+portmap_25=25:100
+portmap_29=29:100
+portmap_33=33:100
+portmap_37=37:100
+portmap_41=41:100
+portmap_45=45:100
+portmap_49=49:100
+portmap_53=53:100
+portmap_57=57:100
+portmap_61=61:100
+portmap_67=65:100
+portmap_71=69:100
+portmap_75=73:100
+portmap_79=77:100
+portmap_83=81:100
+portmap_87=85:100
+portmap_91=89:100
+portmap_95=93:100
+portmap_99=97:100
+portmap_103=101:100
+portmap_107=105:100
+portmap_111=109:100
+portmap_115=113:100
+portmap_119=117:100
+portmap_123=121:100
+portmap_127=125:100
+portmap_66=129:10:m
+#portmap_130=128:10:m
+
+#wc0 lane swap
+phy_chain_tx_lane_map_physical{1.0}=0x0132
+phy_chain_rx_lane_map_physical{1.0}=0x3210
+
+#wc1 lane swap
+phy_chain_tx_lane_map_physical{5.0}=0x2301
+phy_chain_rx_lane_map_physical{5.0}=0x2031
+
+#wc2 lane swap
+phy_chain_tx_lane_map_physical{9.0}=0x0132
+phy_chain_rx_lane_map_physical{9.0}=0x3210
+
+#wc3 lane swap
+phy_chain_tx_lane_map_physical{13.0}=0x3201
+phy_chain_rx_lane_map_physical{13.0}=0x2031
+
+#wc4 lane swap
+phy_chain_tx_lane_map_physical{17.0}=0x0123
+phy_chain_rx_lane_map_physical{17.0}=0x3210
+
+#wc5 lane swap
+phy_chain_tx_lane_map_physical{21.0}=0x2301
+phy_chain_rx_lane_map_physical{21.0}=0x2031
+
+#wc6 lane swap
+phy_chain_tx_lane_map_physical{25.0}=0x0123
+phy_chain_rx_lane_map_physical{25.0}=0x3210
+
+#wc7 lane swap
+phy_chain_tx_lane_map_physical{29.0}=0x3201
+phy_chain_rx_lane_map_physical{29.0}=0x2031
+
+#wc8 lane swap
+phy_chain_tx_lane_map_physical{33.0}=0x0213
+phy_chain_rx_lane_map_physical{33.0}=0x1302
+
+#wc9 lane swap
+phy_chain_tx_lane_map_physical{37.0}=0x1302
+phy_chain_rx_lane_map_physical{37.0}=0x2031
+
+#wc10 lane swap
+phy_chain_tx_lane_map_physical{41.0}=0x0231
+phy_chain_rx_lane_map_physical{41.0}=0x3120
+
+#wc11 lane swap
+phy_chain_tx_lane_map_physical{45.0}=0x1302
+phy_chain_rx_lane_map_physical{45.0}=0x2031
+
+#wc12 lane swap
+phy_chain_tx_lane_map_physical{49.0}=0x2103
+phy_chain_rx_lane_map_physical{49.0}=0x3120
+
+#wc13 lane swap
+phy_chain_tx_lane_map_physical{53.0}=0x2301
+phy_chain_rx_lane_map_physical{53.0}=0x2031
+
+#wc14 lane swap
+phy_chain_tx_lane_map_physical{57.0}=0x0123
+phy_chain_rx_lane_map_physical{57.0}=0x2301
+
+#wc15 lane swap
+phy_chain_tx_lane_map_physical{61.0}=0x3210
+phy_chain_rx_lane_map_physical{61.0}=0x1032
+
+#wc16 lane swap
+phy_chain_tx_lane_map_physical{65.0}=0x3210
+phy_chain_rx_lane_map_physical{65.0}=0x1023
+
+#wc17 lane swap
+phy_chain_tx_lane_map_physical{69.0}=0x0123
+phy_chain_rx_lane_map_physical{69.0}=0x1302
+
+#wc18 lane swap
+phy_chain_tx_lane_map_physical{73.0}=0x2301
+phy_chain_rx_lane_map_physical{73.0}=0x1032
+
+#wc19 lane swap
+phy_chain_tx_lane_map_physical{77.0}=0x2013
+phy_chain_rx_lane_map_physical{77.0}=0x3120
+
+#wc20 lane swap
+phy_chain_tx_lane_map_physical{81.0}=0x1302
+phy_chain_rx_lane_map_physical{81.0}=0x2031
+
+#wc21 lane swap
+phy_chain_tx_lane_map_physical{85.0}=0x0123
+phy_chain_rx_lane_map_physical{85.0}=0x2130
+
+#wc22 lane swap
+phy_chain_tx_lane_map_physical{89.0}=0x2301
+phy_chain_rx_lane_map_physical{89.0}=0x2031
+
+#wc23 lane swap
+phy_chain_tx_lane_map_physical{93.0}=0x0312
+phy_chain_rx_lane_map_physical{93.0}=0x2310
+
+#wc24 lane swap
+phy_chain_tx_lane_map_physical{97.0}=0x2301
+phy_chain_rx_lane_map_physical{97.0}=0x1032
+
+#wc25 lane swap
+phy_chain_tx_lane_map_physical{101.0}=0x0123
+phy_chain_rx_lane_map_physical{101.0}=0x3210
+
+#wc26 lane swap
+phy_chain_tx_lane_map_physical{105.0}=0x2301
+phy_chain_rx_lane_map_physical{105.0}=0x1032
+
+#wc27 lane swap
+phy_chain_tx_lane_map_physical{109.0}=0x0123
+phy_chain_rx_lane_map_physical{109.0}=0x3210
+
+#wc28 lane swap
+phy_chain_tx_lane_map_physical{113.0}=0x2301
+phy_chain_rx_lane_map_physical{113.0}=0x2031
+
+#wc29 lane swap
+phy_chain_tx_lane_map_physical{117.0}=0x0123
+phy_chain_rx_lane_map_physical{117.0}=0x3210
+
+#wc30 lane swap
+phy_chain_tx_lane_map_physical{121.0}=0x2301
+phy_chain_rx_lane_map_physical{121.0}=0x1032
+
+#wc31 lane swap
+phy_chain_tx_lane_map_physical{125.0}=0x0123
+phy_chain_rx_lane_map_physical{125.0}=0x3210
+
+#MC lane swap
+phy_chain_tx_lane_map_physical{129.0}=0x3210
+phy_chain_rx_lane_map_physical{129.0}=0x0231
+
+
+#wc0 P/N flip
+phy_chain_tx_polarity_flip_physical{1.0}=0x0
+phy_chain_rx_polarity_flip_physical{1.0}=0x0
+phy_chain_tx_polarity_flip_physical{2.0}=0x0
+phy_chain_rx_polarity_flip_physical{2.0}=0x1
+phy_chain_tx_polarity_flip_physical{3.0}=0x0
+phy_chain_rx_polarity_flip_physical{3.0}=0x0
+phy_chain_tx_polarity_flip_physical{4.0}=0x1
+phy_chain_rx_polarity_flip_physical{4.0}=0x1
+
+#wc1 P/N flip
+phy_chain_tx_polarity_flip_physical{5.0}=0x0
+phy_chain_rx_polarity_flip_physical{5.0}=0x0
+phy_chain_tx_polarity_flip_physical{6.0}=0x1
+phy_chain_rx_polarity_flip_physical{6.0}=0x1
+phy_chain_tx_polarity_flip_physical{7.0}=0x0
+phy_chain_rx_polarity_flip_physical{7.0}=0x1
+phy_chain_tx_polarity_flip_physical{8.0}=0x1
+phy_chain_rx_polarity_flip_physical{8.0}=0x1
+
+#wc2 P/N flip
+phy_chain_tx_polarity_flip_physical{9.0}=0x0
+phy_chain_rx_polarity_flip_physical{9.0}=0x0
+phy_chain_tx_polarity_flip_physical{10.0}=0x0
+phy_chain_rx_polarity_flip_physical{10.0}=0x1
+phy_chain_tx_polarity_flip_physical{11.0}=0x0
+phy_chain_rx_polarity_flip_physical{11.0}=0x0
+phy_chain_tx_polarity_flip_physical{12.0}=0x1
+phy_chain_rx_polarity_flip_physical{12.0}=0x1
+
+#wc3 P/N flip
+phy_chain_tx_polarity_flip_physical{13.0}=0x0
+phy_chain_rx_polarity_flip_physical{13.0}=0x0
+phy_chain_tx_polarity_flip_physical{14.0}=0x1
+phy_chain_rx_polarity_flip_physical{14.0}=0x1
+phy_chain_tx_polarity_flip_physical{15.0}=0x0
+phy_chain_rx_polarity_flip_physical{15.0}=0x1
+phy_chain_tx_polarity_flip_physical{16.0}=0x0
+phy_chain_rx_polarity_flip_physical{16.0}=0x1
+
+#wc4 P/N flip
+phy_chain_tx_polarity_flip_physical{17.0}=0x0
+phy_chain_rx_polarity_flip_physical{17.0}=0x0
+phy_chain_tx_polarity_flip_physical{18.0}=0x1
+phy_chain_rx_polarity_flip_physical{18.0}=0x1
+phy_chain_tx_polarity_flip_physical{19.0}=0x0
+phy_chain_rx_polarity_flip_physical{19.0}=0x0
+phy_chain_tx_polarity_flip_physical{20.0}=0x1
+phy_chain_rx_polarity_flip_physical{20.0}=0x1
+
+#wc5 P/N flip
+phy_chain_tx_polarity_flip_physical{21.0}=0x0
+phy_chain_rx_polarity_flip_physical{21.0}=0x0
+phy_chain_tx_polarity_flip_physical{22.0}=0x1
+phy_chain_rx_polarity_flip_physical{22.0}=0x1
+phy_chain_tx_polarity_flip_physical{23.0}=0x0
+phy_chain_rx_polarity_flip_physical{23.0}=0x1
+phy_chain_tx_polarity_flip_physical{24.0}=0x1
+phy_chain_rx_polarity_flip_physical{24.0}=0x1
+
+#wc6 P/N flip
+phy_chain_tx_polarity_flip_physical{25.0}=0x0
+phy_chain_rx_polarity_flip_physical{25.0}=0x1
+phy_chain_tx_polarity_flip_physical{26.0}=0x1
+phy_chain_rx_polarity_flip_physical{26.0}=0x0
+phy_chain_tx_polarity_flip_physical{27.0}=0x0
+phy_chain_rx_polarity_flip_physical{27.0}=0x1
+phy_chain_tx_polarity_flip_physical{28.0}=0x1
+phy_chain_rx_polarity_flip_physical{28.0}=0x0
+
+#wc7 P/N flip
+phy_chain_tx_polarity_flip_physical{29.0}=0x1
+phy_chain_rx_polarity_flip_physical{29.0}=0x1
+phy_chain_tx_polarity_flip_physical{30.0}=0x1
+phy_chain_rx_polarity_flip_physical{30.0}=0x0
+phy_chain_tx_polarity_flip_physical{31.0}=0x0
+phy_chain_rx_polarity_flip_physical{31.0}=0x0
+phy_chain_tx_polarity_flip_physical{32.0}=0x0
+phy_chain_rx_polarity_flip_physical{32.0}=0x0
+
+#wc8 P/N flip
+phy_chain_tx_polarity_flip_physical{33.0}=0x1
+phy_chain_rx_polarity_flip_physical{33.0}=0x1
+phy_chain_tx_polarity_flip_physical{34.0}=0x0
+phy_chain_rx_polarity_flip_physical{34.0}=0x0
+phy_chain_tx_polarity_flip_physical{35.0}=0x0
+phy_chain_rx_polarity_flip_physical{35.0}=0x0
+phy_chain_tx_polarity_flip_physical{36.0}=0x1
+phy_chain_rx_polarity_flip_physical{36.0}=0x0
+
+#wc9 P/N flip
+phy_chain_tx_polarity_flip_physical{37.0}=0x1
+phy_chain_rx_polarity_flip_physical{37.0}=0x1
+phy_chain_tx_polarity_flip_physical{38.0}=0x1
+phy_chain_rx_polarity_flip_physical{38.0}=0x0
+phy_chain_tx_polarity_flip_physical{39.0}=0x1
+phy_chain_rx_polarity_flip_physical{39.0}=0x0
+phy_chain_tx_polarity_flip_physical{40.0}=0x0
+phy_chain_rx_polarity_flip_physical{40.0}=0x1
+
+#wc10 P/N flip
+phy_chain_tx_polarity_flip_physical{41.0}=0x1
+phy_chain_rx_polarity_flip_physical{41.0}=0x1
+phy_chain_tx_polarity_flip_physical{42.0}=0x0
+phy_chain_rx_polarity_flip_physical{42.0}=0x1
+phy_chain_tx_polarity_flip_physical{43.0}=0x1
+phy_chain_rx_polarity_flip_physical{43.0}=0x0
+phy_chain_tx_polarity_flip_physical{44.0}=0x1
+phy_chain_rx_polarity_flip_physical{44.0}=0x1
+
+#wc11 P/N flip
+phy_chain_tx_polarity_flip_physical{45.0}=0x1
+phy_chain_rx_polarity_flip_physical{45.0}=0x0
+phy_chain_tx_polarity_flip_physical{46.0}=0x1
+phy_chain_rx_polarity_flip_physical{46.0}=0x0
+phy_chain_tx_polarity_flip_physical{47.0}=0x1
+phy_chain_rx_polarity_flip_physical{47.0}=0x1
+phy_chain_tx_polarity_flip_physical{48.0}=0x0
+phy_chain_rx_polarity_flip_physical{48.0}=0x1
+
+#wc12 P/N flip
+phy_chain_tx_polarity_flip_physical{49.0}=0x1
+phy_chain_rx_polarity_flip_physical{49.0}=0x0
+phy_chain_tx_polarity_flip_physical{50.0}=0x1
+phy_chain_rx_polarity_flip_physical{50.0}=0x0
+phy_chain_tx_polarity_flip_physical{51.0}=0x0
+phy_chain_rx_polarity_flip_physical{51.0}=0x1
+phy_chain_tx_polarity_flip_physical{52.0}=0x1
+phy_chain_rx_polarity_flip_physical{52.0}=0x1
+
+#wc13 P/N flip
+phy_chain_tx_polarity_flip_physical{53.0}=0x0
+phy_chain_rx_polarity_flip_physical{53.0}=0x0
+phy_chain_tx_polarity_flip_physical{54.0}=0x1
+phy_chain_rx_polarity_flip_physical{54.0}=0x1
+phy_chain_tx_polarity_flip_physical{55.0}=0x0
+phy_chain_rx_polarity_flip_physical{55.0}=0x1
+phy_chain_tx_polarity_flip_physical{56.0}=0x1
+phy_chain_rx_polarity_flip_physical{56.0}=0x1
+
+#wc14 P/N flip
+phy_chain_tx_polarity_flip_physical{57.0}=0x1
+phy_chain_rx_polarity_flip_physical{57.0}=0x0
+phy_chain_tx_polarity_flip_physical{58.0}=0x1
+phy_chain_rx_polarity_flip_physical{58.0}=0x1
+phy_chain_tx_polarity_flip_physical{59.0}=0x0
+phy_chain_rx_polarity_flip_physical{59.0}=0x0
+phy_chain_tx_polarity_flip_physical{60.0}=0x1
+phy_chain_rx_polarity_flip_physical{60.0}=0x1
+
+#wc15 P/N flip
+phy_chain_tx_polarity_flip_physical{61.0}=0x0
+phy_chain_rx_polarity_flip_physical{61.0}=0x1
+phy_chain_tx_polarity_flip_physical{62.0}=0x1
+phy_chain_rx_polarity_flip_physical{62.0}=0x0
+phy_chain_tx_polarity_flip_physical{63.0}=0x0
+phy_chain_rx_polarity_flip_physical{63.0}=0x1
+phy_chain_tx_polarity_flip_physical{64.0}=0x0
+phy_chain_rx_polarity_flip_physical{64.0}=0x0
+
+#wc16 P/N flip
+phy_chain_tx_polarity_flip_physical{65.0}=0x1
+phy_chain_rx_polarity_flip_physical{65.0}=0x0
+phy_chain_tx_polarity_flip_physical{66.0}=0x0
+phy_chain_rx_polarity_flip_physical{66.0}=0x0
+phy_chain_tx_polarity_flip_physical{67.0}=0x1
+phy_chain_rx_polarity_flip_physical{67.0}=0x1
+phy_chain_tx_polarity_flip_physical{68.0}=0x0
+phy_chain_rx_polarity_flip_physical{68.0}=0x0
+
+#wc17 P/N flip
+phy_chain_tx_polarity_flip_physical{69.0}=0x1
+phy_chain_rx_polarity_flip_physical{69.0}=0x1
+phy_chain_tx_polarity_flip_physical{70.0}=0x0
+phy_chain_rx_polarity_flip_physical{70.0}=0x0
+phy_chain_tx_polarity_flip_physical{71.0}=0x1
+phy_chain_rx_polarity_flip_physical{71.0}=0x0
+phy_chain_tx_polarity_flip_physical{72.0}=0x0
+phy_chain_rx_polarity_flip_physical{72.0}=0x0
+
+#wc18 P/N flip
+phy_chain_tx_polarity_flip_physical{73.0}=0x0
+phy_chain_rx_polarity_flip_physical{73.0}=0x1
+phy_chain_tx_polarity_flip_physical{74.0}=0x1
+phy_chain_rx_polarity_flip_physical{74.0}=0x0
+phy_chain_tx_polarity_flip_physical{75.0}=0x0
+phy_chain_rx_polarity_flip_physical{75.0}=0x1
+phy_chain_tx_polarity_flip_physical{76.0}=0x1
+phy_chain_rx_polarity_flip_physical{76.0}=0x0
+
+#wc19 P/N flip
+phy_chain_tx_polarity_flip_physical{77.0}=0x0
+phy_chain_rx_polarity_flip_physical{77.0}=0x0
+phy_chain_tx_polarity_flip_physical{78.0}=0x0
+phy_chain_rx_polarity_flip_physical{78.0}=0x0
+phy_chain_tx_polarity_flip_physical{79.0}=0x1
+phy_chain_rx_polarity_flip_physical{79.0}=0x1
+phy_chain_tx_polarity_flip_physical{80.0}=0x1
+phy_chain_rx_polarity_flip_physical{80.0}=0x1
+
+#wc20 P/N flip
+phy_chain_tx_polarity_flip_physical{81.0}=0x0
+phy_chain_rx_polarity_flip_physical{81.0}=0x0
+phy_chain_tx_polarity_flip_physical{82.0}=0x0
+phy_chain_rx_polarity_flip_physical{82.0}=0x0
+phy_chain_tx_polarity_flip_physical{83.0}=0x1
+phy_chain_rx_polarity_flip_physical{83.0}=0x1
+phy_chain_tx_polarity_flip_physical{84.0}=0x1
+phy_chain_rx_polarity_flip_physical{84.0}=0x0
+
+#wc21 P/N flip
+phy_chain_tx_polarity_flip_physical{85.0}=0x1
+phy_chain_rx_polarity_flip_physical{85.0}=0x1
+phy_chain_tx_polarity_flip_physical{86.0}=0x0
+phy_chain_rx_polarity_flip_physical{86.0}=0x1
+phy_chain_tx_polarity_flip_physical{87.0}=0x1
+phy_chain_rx_polarity_flip_physical{87.0}=0x0
+phy_chain_tx_polarity_flip_physical{88.0}=0x0
+phy_chain_rx_polarity_flip_physical{88.0}=0x0
+
+#wc22 P/N flip
+phy_chain_tx_polarity_flip_physical{89.0}=0x1
+phy_chain_rx_polarity_flip_physical{89.0}=0x0
+phy_chain_tx_polarity_flip_physical{90.0}=0x0
+phy_chain_rx_polarity_flip_physical{90.0}=0x0
+phy_chain_tx_polarity_flip_physical{91.0}=0x1
+phy_chain_rx_polarity_flip_physical{91.0}=0x1
+phy_chain_tx_polarity_flip_physical{92.0}=0x0
+phy_chain_rx_polarity_flip_physical{92.0}=0x1
+
+#wc23 P/N flip
+phy_chain_tx_polarity_flip_physical{93.0}=0x1
+phy_chain_rx_polarity_flip_physical{93.0}=0x1
+phy_chain_tx_polarity_flip_physical{94.0}=0x1
+phy_chain_rx_polarity_flip_physical{94.0}=0x1
+phy_chain_tx_polarity_flip_physical{95.0}=0x0
+phy_chain_rx_polarity_flip_physical{95.0}=0x0
+phy_chain_tx_polarity_flip_physical{96.0}=0x0
+phy_chain_rx_polarity_flip_physical{96.0}=0x1
+
+#wc24 P/N flip
+phy_chain_tx_polarity_flip_physical{97.0}=0x1
+phy_chain_rx_polarity_flip_physical{97.0}=0x1
+phy_chain_tx_polarity_flip_physical{98.0}=0x0
+phy_chain_rx_polarity_flip_physical{98.0}=0x0
+phy_chain_tx_polarity_flip_physical{99.0}=0x1
+phy_chain_rx_polarity_flip_physical{99.0}=0x1
+phy_chain_tx_polarity_flip_physical{100.0}=0x0
+phy_chain_rx_polarity_flip_physical{100.0}=0x0
+
+#wc25 P/N flip
+phy_chain_tx_polarity_flip_physical{101.0}=0x1
+phy_chain_rx_polarity_flip_physical{101.0}=0x0
+phy_chain_tx_polarity_flip_physical{102.0}=0x0
+phy_chain_rx_polarity_flip_physical{102.0}=0x1
+phy_chain_tx_polarity_flip_physical{103.0}=0x1
+phy_chain_rx_polarity_flip_physical{103.0}=0x0
+phy_chain_tx_polarity_flip_physical{104.0}=0x0
+phy_chain_rx_polarity_flip_physical{104.0}=0x0
+
+#wc26 P/N flip
+phy_chain_tx_polarity_flip_physical{105.0}=0x1
+phy_chain_rx_polarity_flip_physical{105.0}=0x0
+phy_chain_tx_polarity_flip_physical{106.0}=0x0
+phy_chain_rx_polarity_flip_physical{106.0}=0x1
+phy_chain_tx_polarity_flip_physical{107.0}=0x1
+phy_chain_rx_polarity_flip_physical{107.0}=0x0
+phy_chain_tx_polarity_flip_physical{108.0}=0x0
+phy_chain_rx_polarity_flip_physical{108.0}=0x1
+
+#wc27 P/N flip
+phy_chain_tx_polarity_flip_physical{109.0}=0x1
+phy_chain_rx_polarity_flip_physical{109.0}=0x1
+phy_chain_tx_polarity_flip_physical{110.0}=0x0
+phy_chain_rx_polarity_flip_physical{110.0}=0x0
+phy_chain_tx_polarity_flip_physical{111.0}=0x1
+phy_chain_rx_polarity_flip_physical{111.0}=0x1
+phy_chain_tx_polarity_flip_physical{112.0}=0x0
+phy_chain_rx_polarity_flip_physical{112.0}=0x0
+
+#wc28 P/N flip
+phy_chain_tx_polarity_flip_physical{113.0}=0x1
+phy_chain_rx_polarity_flip_physical{113.0}=0x1
+phy_chain_tx_polarity_flip_physical{114.0}=0x0
+phy_chain_rx_polarity_flip_physical{114.0}=0x0
+phy_chain_tx_polarity_flip_physical{115.0}=0x1
+phy_chain_rx_polarity_flip_physical{115.0}=0x0
+phy_chain_tx_polarity_flip_physical{116.0}=0x0
+phy_chain_rx_polarity_flip_physical{116.0}=0x0
+
+#wc29 P/N flip
+phy_chain_tx_polarity_flip_physical{117.0}=0x1
+phy_chain_rx_polarity_flip_physical{117.0}=0x1
+phy_chain_tx_polarity_flip_physical{118.0}=0x0
+phy_chain_rx_polarity_flip_physical{118.0}=0x0
+phy_chain_tx_polarity_flip_physical{119.0}=0x1
+phy_chain_rx_polarity_flip_physical{119.0}=0x1
+phy_chain_tx_polarity_flip_physical{120.0}=0x0
+phy_chain_rx_polarity_flip_physical{120.0}=0x0
+
+#wc30 P/N flip
+phy_chain_tx_polarity_flip_physical{121.0}=0x1
+phy_chain_rx_polarity_flip_physical{121.0}=0x0
+phy_chain_tx_polarity_flip_physical{122.0}=0x0
+phy_chain_rx_polarity_flip_physical{122.0}=0x1
+phy_chain_tx_polarity_flip_physical{123.0}=0x1
+phy_chain_rx_polarity_flip_physical{123.0}=0x0
+phy_chain_tx_polarity_flip_physical{124.0}=0x0
+phy_chain_rx_polarity_flip_physical{124.0}=0x1
+
+#wc31 P/N flip
+phy_chain_tx_polarity_flip_physical{125.0}=0x1
+phy_chain_rx_polarity_flip_physical{125.0}=0x1
+phy_chain_tx_polarity_flip_physical{126.0}=0x0
+phy_chain_rx_polarity_flip_physical{126.0}=0x0
+phy_chain_tx_polarity_flip_physical{127.0}=0x1
+phy_chain_rx_polarity_flip_physical{127.0}=0x1
+phy_chain_tx_polarity_flip_physical{128.0}=0x0
+phy_chain_rx_polarity_flip_physical{128.0}=0x0
+
+#MC P/N flip
+phy_chain_tx_polarity_flip_physical{129.0}=0x1
+phy_chain_rx_polarity_flip_physical{129.0}=0x0
+phy_chain_tx_polarity_flip_physical{130.0}=0x0
+phy_chain_rx_polarity_flip_physical{130.0}=0x0
+phy_chain_tx_polarity_flip_physical{131.0}=0x1
+phy_chain_rx_polarity_flip_physical{131.0}=0x1
+phy_chain_tx_polarity_flip_physical{132.0}=0x0
+phy_chain_rx_polarity_flip_physical{132.0}=0x1
+
+
+# configuration for 100G optical module
+serdes_preemphasis_1=0x164608
+serdes_preemphasis_5=0x164608
+serdes_preemphasis_9=0x164608
+serdes_preemphasis_13=0x134908
+serdes_preemphasis_17=0x134908
+serdes_preemphasis_21=0x134908
+serdes_preemphasis_25=0x124a08
+serdes_preemphasis_29=0x124a08
+serdes_preemphasis_33=0x114b08
+serdes_preemphasis_37=0x114b08
+serdes_preemphasis_41=0x0f4d08
+serdes_preemphasis_45=0x0f4d08
+serdes_preemphasis_49=0x0d4f08
+serdes_preemphasis_53=0x0d4f08
+serdes_preemphasis_57=0x0d4f08
+serdes_preemphasis_61=0x0d4f08
+serdes_preemphasis_67=0x0d4f08
+serdes_preemphasis_71=0x0d4f08
+serdes_preemphasis_75=0x0d4f08
+serdes_preemphasis_79=0x0d4f08
+serdes_preemphasis_83=0x0d4f08
+serdes_preemphasis_87=0x0f4d08
+serdes_preemphasis_91=0x0f4d08
+serdes_preemphasis_95=0x0f4d08
+serdes_preemphasis_99=0x114b08
+serdes_preemphasis_103=0x114b08
+serdes_preemphasis_107=0x114b08
+serdes_preemphasis_111=0x124a08
+serdes_preemphasis_115=0x134908
+serdes_preemphasis_119=0x134908
+serdes_preemphasis_123=0x134908
+serdes_preemphasis_127=0x164608
+
+#VxLAN
+sai_tunnel_support=1
+use_all_splithorizon_groups=1
+bcm_tunnel_term_compatible_mode=1
+flow_init_mode=1
+l3_ecmp_levels=2
+riot_enable=1
+riot_overlay_l3_intf_mem_size=8192
+riot_overlay_l3_egress_mem_size=32768
+riot_overlay_ecmp_resilient_hash_size=16384
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/td3-seastone_2-32x100G.config.bcm b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/td3-seastone_2-32x100G.config.bcm
index d9d2f47750d9..7803fa422f1a 100644
--- a/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/td3-seastone_2-32x100G.config.bcm
+++ b/device/celestica/x86_64-cel_seastone_2-r0/Seastone_2/td3-seastone_2-32x100G.config.bcm
@@ -1,4 +1,3 @@
-sai_load_hw_config=/etc/bcm/flex/bcm56870_a0_premium_issu/b870.6.4.1/
 help_cli_enable=1
 ifp_inports_support_enable=1
 ipv6_lpm_128b_enable=0x1
@@ -8,8 +7,13 @@ l3_max_ecmp_mode=1
 l3_mem_entries=16384
 lpm_scaling_enable=1
 max_vp_lags=0
-mem_cache_enable=0
+#mem_cache_enable=0
 memlist_enable=1
+reglist_enable=1
+#scache_filename=/tmp/scache
+schan_intr_enable=0
+stable_size=0x5500000
+tdma_timeout_usec=3000000
 miim_intr_enable=0
 module_64ports=1
 oversubscribe_mode=1
@@ -18,47 +22,49 @@ serdes_lane_config_dfe=on
 #serdes_fec_enable=1
 serdes_if_type_ce=14
 pbmp_gport_stack.0=0x0000000000000000000000000000000000000000000000000000000000000000
-pbmp_xport_xe=0x888888888888888c2222222222222222
+pbmp_xport_xe=0x3ffffffffffffffffffffffffffffffffe
+port_flex_enable=1
 
 ptp_ts_pll_fref=50000000
 ptp_bs_fref_0=50000000
 ptp_bs_fref_1=50000000
-
-portmap_1.0=1:100
-portmap_5.0=5:100
-portmap_9.0=9:100
-portmap_13.0=13:100
-portmap_17.0=17:100
-portmap_21.0=21:100
-portmap_25.0=25:100
-portmap_29.0=29:100
-portmap_33.0=33:100
-portmap_37.0=37:100
-portmap_41.0=41:100
-portmap_45.0=45:100
-portmap_49.0=49:100
-portmap_53.0=53:100
-portmap_57.0=57:100
-portmap_61.0=61:100
-
-portmap_67.0=65:100
-portmap_71.0=69:100
-portmap_75.0=73:100
-portmap_79.0=77:100
-portmap_83.0=81:100
-portmap_87.0=85:100
-portmap_91.0=89:100
-portmap_95.0=93:100
-portmap_99.0=97:100
-portmap_103.0=101:100
-portmap_107.0=105:100
-portmap_111.0=109:100
-portmap_115.0=113:100
-portmap_119.0=117:100
-portmap_123.0=121:100
-portmap_127.0=125:100
-portmap_66.0=129:10:m
-#portmap_130.0=128:10:m
+bcm_tunnel_term_compatible_mode=1
+phy_an_c73=1
+
+portmap_1=1:100
+portmap_5=5:100
+portmap_9=9:100
+portmap_13=13:100
+portmap_17=17:100
+portmap_21=21:100
+portmap_25=25:100
+portmap_29=29:100
+portmap_33=33:100
+portmap_37=37:100
+portmap_41=41:100
+portmap_45=45:100
+portmap_49=49:100
+portmap_53=53:100
+portmap_57=57:100
+portmap_61=61:100
+portmap_67=65:100
+portmap_71=69:100
+portmap_75=73:100
+portmap_79=77:100
+portmap_83=81:100
+portmap_87=85:100
+portmap_91=89:100
+portmap_95=93:100
+portmap_99=97:100
+portmap_103=101:100
+portmap_107=105:100
+portmap_111=109:100
+portmap_115=113:100
+portmap_119=117:100
+portmap_123=121:100
+portmap_127=125:100
+portmap_66=129:10:m
+#portmap_130=128:10:m
 
 #wc0 lane swap
 phy_chain_tx_lane_map_physical{1.0}=0x0132
@@ -518,45 +524,11 @@ phy_chain_tx_polarity_flip_physical{129.0}=0x1
 phy_chain_rx_polarity_flip_physical{129.0}=0x0
 phy_chain_tx_polarity_flip_physical{130.0}=0x0
 phy_chain_rx_polarity_flip_physical{130.0}=0x0
-phy_chain_tx_polarity_flip_physical{131.0}=0x0
-phy_chain_rx_polarity_flip_physical{131.0}=0x0
+phy_chain_tx_polarity_flip_physical{131.0}=0x1
+phy_chain_rx_polarity_flip_physical{131.0}=0x1
 phy_chain_tx_polarity_flip_physical{132.0}=0x0
-phy_chain_rx_polarity_flip_physical{132.0}=0x0
-
-dport_map_port_1=1
-dport_map_port_5=2
-dport_map_port_9=3
-dport_map_port_13=4
-dport_map_port_17=5
-dport_map_port_21=6
-dport_map_port_25=7
-dport_map_port_29=8
-dport_map_port_33=9
-dport_map_port_37=10
-dport_map_port_41=11
-dport_map_port_45=12
-dport_map_port_49=13
-dport_map_port_53=14
-dport_map_port_57=15
-dport_map_port_61=16
-dport_map_port_67=17
-dport_map_port_71=18
-dport_map_port_75=19
-dport_map_port_79=20
-dport_map_port_83=21
-dport_map_port_87=22
-dport_map_port_91=23
-dport_map_port_95=24
-dport_map_port_99=25
-dport_map_port_103=26
-dport_map_port_107=27
-dport_map_port_111=28
-dport_map_port_115=29
-dport_map_port_119=30
-dport_map_port_123=31
-dport_map_port_127=32
-dport_map_port_66=33
-#dport_map_port_130=34
+phy_chain_rx_polarity_flip_physical{132.0}=0x1
+
 
 # configuration for 100G optical module
 serdes_preemphasis_1=0x164608
@@ -592,8 +564,3 @@ serdes_preemphasis_119=0x134908
 serdes_preemphasis_123=0x134908
 serdes_preemphasis_127=0x164608
 
-reglist_enable=1
-scache_filename=/tmp/scache
-schan_intr_enable=0
-stable_size=0x5500000
-tdma_timeout_usec=3000000
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/custom.bin b/device/celestica/x86_64-cel_seastone_2-r0/custom_led.bin
similarity index 100%
rename from device/celestica/x86_64-cel_seastone_2-r0/custom.bin
rename to device/celestica/x86_64-cel_seastone_2-r0/custom_led.bin
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/installer.conf b/device/celestica/x86_64-cel_seastone_2-r0/installer.conf
index 3222a45fe1d4..1d21376ff555 100644
--- a/device/celestica/x86_64-cel_seastone_2-r0/installer.conf
+++ b/device/celestica/x86_64-cel_seastone_2-r0/installer.conf
@@ -1,3 +1,4 @@
+CONSOLE_PORT=0xe060
 CONSOLE_DEV=0
 CONSOLE_SPEED=115200
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="earlycon=uart8250,mmio,0xdf37b000"
\ No newline at end of file
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_iommu=off thermal.off=1 noirqdebug acpi_no_watchdog earlycon=uart8250,mmio,0xdf37b000"
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/led_proc_init.soc b/device/celestica/x86_64-cel_seastone_2-r0/led_proc_init.soc
index b6b474bd53d6..90aa9ba607ac 100644
--- a/device/celestica/x86_64-cel_seastone_2-r0/led_proc_init.soc
+++ b/device/celestica/x86_64-cel_seastone_2-r0/led_proc_init.soc
@@ -1,5 +1,2 @@
-linkscan off
-m0 load 0 0x3800 /usr/share/sonic/platform/custom.bin
-sleep 10
+m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
 led auto on; led start
-linkscan on
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/pcie.yaml b/device/celestica/x86_64-cel_seastone_2-r0/pcie.yaml
new file mode 100644
index 000000000000..95e9b6954714
--- /dev/null
+++ b/device/celestica/x86_64-cel_seastone_2-r0/pcie.yaml
@@ -0,0 +1,153 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: '1980'
+  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev
+    11)'
+- bus: '00'
+  dev: '04'
+  fn: '0'
+  id: 19a1
+  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers
+    (rev 11)'
+- bus: '00'
+  dev: '05'
+  fn: '0'
+  id: 19a2
+  name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000
+    Series Root Complex Event Collector (rev 11)'
+- bus: '00'
+  dev: '06'
+  fn: '0'
+  id: 19a3
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT
+    Root Port (rev 11)'
+- bus: '00'
+  dev: 09
+  fn: '0'
+  id: 19a4
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #0 (rev 11)'
+- bus: '00'
+  dev: '10'
+  fn: '0'
+  id: 19aa
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #6 (rev 11)'
+- bus: '00'
+  dev: '11'
+  fn: '0'
+  id: 19ab
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #7 (rev 11)'
+- bus: '00'
+  dev: '12'
+  fn: '0'
+  id: 19ac
+  name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller
+    - Host (rev 11)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 19c2
+  name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller
+    1 (rev 11)'
+- bus: '00'
+  dev: '15'
+  fn: '0'
+  id: 19d0
+  name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI
+    Controller (rev 11)'
+- bus: '00'
+  dev: '16'
+  fn: '0'
+  id: 19d1
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
+    Root Port #0 (rev 11)'
+- bus: '00'
+  dev: '18'
+  fn: '0'
+  id: 19d3
+  name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME
+    HECI 1 (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '0'
+  id: 19d8
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+    (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '1'
+  id: 19d8
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+    (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '2'
+  id: 19d8
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+    (rev 11)'
+- bus: '00'
+  dev: 1c
+  fn: '0'
+  id: 19db
+  name: 'SD Host controller: Intel Corporation Device 19db (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: 19dc
+  name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev
+    11)'
+- bus: '00'
+  dev: 1f
+  fn: '2'
+  id: 19de
+  name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management
+    Controller (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '4'
+  id: 19df
+  name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev
+    11)'
+- bus: '00'
+  dev: 1f
+  fn: '5'
+  id: 19e0
+  name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series
+    SPI Controller (rev 11)'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: 19e2
+  name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology
+    (rev 11)'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: b870
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b870 (rev 01)'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: '7021'
+  name: 'Memory controller: Xilinx Corporation Device 7021'
+- bus: '04'
+  dev: '00'
+  fn: '0'
+  id: '1533'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
+    03)'
+- bus: '05'
+  dev: '00'
+  fn: '0'
+  id: 15c2
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
+    (rev 11)'
+- bus: '05'
+  dev: '00'
+  fn: '1'
+  id: 15c2
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
+    (rev 11)'
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/platform.json b/device/celestica/x86_64-cel_seastone_2-r0/platform.json
new file mode 100644
index 000000000000..9d2b5841f179
--- /dev/null
+++ b/device/celestica/x86_64-cel_seastone_2-r0/platform.json
@@ -0,0 +1,235 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1",
+            "lanes": "1,2,3,4",
+            "breakout_modes": {
+                "1x100G": ["Eth1/1"]
+            }
+        },
+        "Ethernet4": {
+            "index": "2,2,2,2",
+            "lanes": "5,6,7,8",
+            "breakout_modes": {
+                "1x100G": ["Eth2/1"]
+            }
+        },
+        "Ethernet8": {
+            "index": "3,3,3,3",
+            "lanes": "9,10,11,12",
+            "breakout_modes": {
+                "1x100G": ["Eth3/1"]
+            }
+        },
+        "Ethernet12": {
+            "index": "4,4,4,4",
+            "lanes": "13,14,15,16",
+            "breakout_modes": {
+                "1x100G": ["Eth4/1"]
+            }
+        },
+        "Ethernet16": {
+            "index": "5,5,5,5",
+            "lanes": "17,18,19,20",
+            "breakout_modes": {
+                "1x100G": ["Eth5/1"]
+            }
+        },
+        "Ethernet20": {
+            "index": "6,6,6,6",
+            "lanes": "21,22,23,24",
+            "breakout_modes": {
+                "1x100G": ["Eth6/1"]
+            }
+        },
+        "Ethernet24": {
+            "index": "7,7,7,7",
+            "lanes": "25,26,27,28",
+            "breakout_modes": {
+                "1x100G": ["Eth7/1"]
+            }
+        },
+        "Ethernet28": {
+            "index": "8,8,8,8",
+            "lanes": "29,30,31,32",
+            "breakout_modes": {
+                "1x100G": ["Eth8/1"]
+            }
+        },
+        "Ethernet32": {
+            "index": "9,9,9,9",
+            "lanes": "33,34,35,36",
+            "breakout_modes": {
+                "1x100G": ["Eth9/1"]
+            }
+        },
+        "Ethernet36": {
+            "index": "10,10,10,10",
+            "lanes": "37,38,39,40",
+            "breakout_modes": {
+                "1x100G": ["Eth10/1"]
+            }
+        },
+        "Ethernet40": {
+            "index": "11,11,11,11",
+            "lanes": "41,42,43,44",
+            "breakout_modes": {
+                "1x100G": ["Eth11/1"]
+            }
+        },
+        "Ethernet44": {
+            "index": "12,12,12,12",
+            "lanes": "45,46,47,48",
+            "breakout_modes": {
+                "1x100G": ["Eth12/1"]
+            }
+        },
+        "Ethernet48": {
+            "index": "13,13,13,13",
+            "lanes": "49,50,51,52",
+            "breakout_modes": {
+                "1x100G": ["Eth13/1"]
+            }
+        },
+        "Ethernet52": {
+            "index": "14,14,14,14",
+            "lanes": "53,54,55,56",
+            "breakout_modes": {
+                "1x100G": ["Eth14/1"]
+            }
+        },
+        "Ethernet56": {
+            "index": "15,15,15,15",
+            "lanes": "57,58,59,60",
+            "breakout_modes": {
+                "1x100G": ["Eth15/1"]
+            }
+        },
+        "Ethernet60": {
+            "index": "16,16,16,16",
+            "lanes": "61,62,63,64",
+            "breakout_modes": {
+                "1x100G": ["Eth16/1"]
+            }
+        },
+        "Ethernet64": {
+            "index": "17,17,17,17",
+            "lanes": "65,66,67,68",
+            "breakout_modes": {
+                "1x100G": ["Eth17/1"]
+            }
+        },
+        "Ethernet68": {
+            "index": "18,18,18,18",
+            "lanes": "69,70,71,72",
+            "breakout_modes": {
+                "1x100G": ["Eth18/1"]
+            }
+        },
+        "Ethernet72": {
+            "index": "19,19,19,19",
+            "lanes": "73,74,75,76",
+            "breakout_modes": {
+                "1x100G": ["Eth19/1"]
+            }
+        },
+        "Ethernet76": {
+            "index": "20,20,20,20",
+            "lanes": "77,78,79,80",
+            "breakout_modes": {
+                "1x100G": ["Eth20/1"]
+            }
+        },
+        "Ethernet80": {
+            "index": "21,21,21,21",
+            "lanes": "81,82,83,84",
+            "breakout_modes": {
+                "1x100G": ["Eth21/1"]
+            }
+        },
+        "Ethernet84": {
+            "index": "22,22,22,22",
+            "lanes": "85,86,87,88",
+            "breakout_modes": {
+                "1x100G": ["Eth22/1"]
+            }
+        },
+        "Ethernet88": {
+            "index": "23,23,23,23",
+            "lanes": "89,90,91,92",
+            "breakout_modes": {
+                "1x100G": ["Eth23/1"]
+            }
+        },
+        "Ethernet92": {
+            "index": "24,24,24,24",
+            "lanes": "93,94,95,96",
+            "breakout_modes": {
+                "1x100G": ["Eth24/1"]
+            }
+        },
+        "Ethernet96": {
+            "index": "25,25,25,25",
+            "lanes": "97,98,99,100",
+            "breakout_modes": {
+                "1x100G": ["Eth25/1"]
+            }
+        },
+        "Ethernet100": {
+            "index": "26,26,26,26",
+            "lanes": "101,102,103,104",
+            "breakout_modes": {
+                "1x100G": ["Eth26/1"]
+            }
+        },
+        "Ethernet104": {
+            "index": "27,27,27,27",
+            "lanes": "105,106,107,108",
+            "breakout_modes": {
+                "1x100G": ["Eth27/1"]
+            }
+        },
+        "Ethernet108": {
+            "index": "28,28,28,28",
+            "lanes": "109,110,111,112",
+            "breakout_modes": {
+                "1x100G": ["Eth28/1"]
+            }
+        },
+        "Ethernet112": {
+            "index": "29,29,29,29",
+            "lanes": "113,114,115,116",
+            "breakout_modes": {
+                "1x100G": ["Eth29/1"]
+            }
+        },
+        "Ethernet116": {
+            "index": "30,30,30,30",
+            "lanes": "117,118,119,120",
+            "breakout_modes": {
+                "1x100G": ["Eth30/1"]
+            }
+        },
+        "Ethernet120": {
+            "index": "31,31,31,31",
+            "lanes": "121,122,123,124",
+            "breakout_modes": {
+                "1x100G": ["Eth31/1"]
+            }
+        },
+        "Ethernet124": {
+            "index": "32,32,32,32",
+            "lanes": "125,126,127,128",
+            "breakout_modes": {
+                "1x100G": ["Eth32/1"]
+            }
+        },
+        "Ethernet128": {
+            "index": "33",
+            "lanes": "129",
+            "breakout_modes": {
+                "1x10G": ["Eth33/1"]
+            }
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/platform_components.json b/device/celestica/x86_64-cel_seastone_2-r0/platform_components.json
new file mode 100644
index 000000000000..7daf37202c76
--- /dev/null
+++ b/device/celestica/x86_64-cel_seastone_2-r0/platform_components.json
@@ -0,0 +1,17 @@
+{
+    "chassis": {
+        "Seastone_2": {
+            "component": {
+                "BIOS": {},
+                "ONIE": {},
+                "BMC": {},
+                "FPGA": {},
+                "CPLD COMe": {},
+                "CPLD BASE": {},
+                "CPLD SW1": {},
+                "CPLD SW2": {},
+                "SSD": {}
+            }
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/platform_reboot b/device/celestica/x86_64-cel_seastone_2-r0/platform_reboot
new file mode 100755
index 000000000000..be80ddbdd1a2
--- /dev/null
+++ b/device/celestica/x86_64-cel_seastone_2-r0/platform_reboot
@@ -0,0 +1,6 @@
+#!/bin/bash
+
+# Set all LEDs to BMC's control
+ipmitool raw 0x3a 0x0f 0x02 0x01 &> /dev/null
+
+/usr/local/bin/seastone2_platform_shutdown.sh system
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/pmon_daemon_control.json b/device/celestica/x86_64-cel_seastone_2-r0/pmon_daemon_control.json
index 5e59513ef696..f5b2736b13e0 100644
--- a/device/celestica/x86_64-cel_seastone_2-r0/pmon_daemon_control.json
+++ b/device/celestica/x86_64-cel_seastone_2-r0/pmon_daemon_control.json
@@ -1,7 +1,5 @@
 {
     "skip_ledd": true,
-    "skip_xcvrd": false,
-    "skip_psud": false,
-    "skip_syseepromd": false,
-    "skip_fancontrol": true
-}
\ No newline at end of file
+    "skip_fancontrol": true,
+    "skip_xcvrd_cmis_mgr": true
+}
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/chassis.json b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/chassis.json
deleted file mode 100644
index dfa1a1bddff8..000000000000
--- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/chassis.json
+++ /dev/null
@@ -1,45 +0,0 @@
-{
-    "eeprom": "/sys/class/i2c-adapter/i2c-0/0-0056/eeprom",
-    "get_reboot_cause": {
-        "output_source": "ipmitool",
-        "command": "ipmitool raw 0x3a 0x0c 0x0 0x2 0x06",
-        "output_translator": {
-            "00": "Hardware - Other",
-            "11": "Hardware - Other",
-            "22": "Non-Hardware",
-            "33": "Hardware - Other",
-            "44": "Non-Hardware",
-            "55": "Non-Hardware",
-            "77": "Watchdog",
-            "88": "Thermal Overload: CPU",
-            "99": "Thermal Overload: ASIC"
-        }
-    },
-    "get_reboot_description": {
-        "output_source": "ipmitool",
-        "command": "ipmitool raw 0x3a 0x0c 0x0 0x2 0x06",
-        "output_translator": {
-            "00": "The last reset is power cycle reset (set register 0xA164)",
-            "11": "The last reset is Power on reset",
-            "22": "The last reset is soft-set CPU warm reset",
-            "33": "The last reset is soft-set CPU cold reset",
-            "44": "The last reset is CPU warm reset",
-            "55": "The last reset is CPU cold reset",
-            "77": "The last reset is watchdog reset",
-            "88": "The last reset is CPU thermal overload",
-            "99": "The last reset is ASIC thermal overload"
-        }
-    },
-    "get_watchdog": {
-        "output_source": "class",
-        "host_path": "/usr/share/sonic/device/x86_64-cel_seastone_2-r0/sonic_platform_config/watchdog.py",
-        "pmon_path": "/usr/share/sonic/platform/sonic_platform_config/watchdog.py",
-        "class": "Watchdog"
-    },
-    "get_change_event": {
-        "output_source": "class",
-        "host_path": "/usr/share/sonic/device/x86_64-cel_seastone_2-r0/sonic_platform_config/event.py",
-        "pmon_path": "/usr/share/sonic/platform/sonic_platform_config/event.py",
-        "class": "SfpEvent"
-    }
-}
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/component.json b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/component.json
deleted file mode 100644
index 96f646206f97..000000000000
--- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/component.json
+++ /dev/null
@@ -1,62 +0,0 @@
-{
-    "component_num": 5,
-    "get_name": {
-        "output_source": "value_list",
-        "value_list": [
-            "BIOS",
-            "CPLD_BASEBOARD",
-            "CPLD_SWITCHBOARD",
-            "FPGA",
-            "BMC"
-        ]
-    },
-    "get_description": {
-        "output_source": "value_list",
-        "value_list": [
-            "Used to perform hardware initialization during the booting process",
-            "Used to control the system power & reset, Control FAN, UART Mux etc",
-            "Used for managing QSFP ports",
-            "Used for managing I2C, SPI, PCIe etc",
-            "Used for monitoring and managing whole system"
-        ]
-    },
-    "get_firmware_version": {
-        "output_source": "function",
-        "function": [
-            "_get_bios_ver",
-            "_get_base_cpld_ver",
-            "_get_sw_cpld_ver",
-            "_get_fpga_ver",
-            "_get_bmc_ver"
-        ]
-    },
-    "_get_bmc_ver": {
-        "output_source": "ipmitool",
-        "command": "ipmitool mc info | grep 'Firmware Revision'",
-        "output_translator": "'{}'.split(':')[-1].strip()"
-    },
-    "_get_bios_ver": {
-        "output_source": "txt_file",
-        "path": "/sys/class/dmi/id/bios_version"
-    },
-    "_get_base_cpld_ver": {
-        "output_source": "hex_version_file",
-        "num_of_points": 1,
-        "num_of_bits": 8,
-        "path": "/sys/devices/platform/baseboard/version"
-    },
-    "_get_sw_cpld_ver": {
-        "output_source": "hex_version_getreg",
-        "num_of_points": 1,
-        "num_of_bits": 8,
-        "reg_addr": "0x00",
-        "path": "/sys/devices/platform/switchboard/CPLD1/getreg"
-    },
-    "_get_fpga_ver": {
-        "output_source": "hex_version_getreg",
-        "num_of_points": 1,
-        "num_of_bits": 32,
-        "reg_addr": "0x00",
-        "path": "/sys/devices/platform/switchboard/FPGA/getreg"
-    }
-}
\ No newline at end of file
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/event.py b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/event.py
deleted file mode 100644
index 32073479a1e6..000000000000
--- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/event.py
+++ /dev/null
@@ -1,117 +0,0 @@
-#############################################################################
-# Celestica Seastone2
-#
-# SfpEvent contains an implementation of SONiC Platform Base API
-#
-#############################################################################
-try:
-    import time
-    import os
-    from sonic_platform.common import Common
-except ImportError as e:
-    raise ImportError(str(e) + "- required module not found")
-
-
-PLATFORM_PATH = "/sys/devices/platform/"
-SWITCH_BRD_PLATFORM = "switchboard"
-POLL_INTERVAL = 1
-
-
-class SfpEvent:
-    ''' Listen to insert/remove sfp events '''
-
-    PORT_INFO_DIR = 'SFF'
-    PATH_INT_SYSFS = "{0}/{port_name}/{type_prefix}_isr_flags"
-    PATH_INTMASK_SYSFS = "{0}/{port_name}/{type_prefix}_isr_mask"
-    PATH_PRS_SYSFS = "{0}/{port_name}/{prs_file_name}"
-    PRESENT_EN = 0x01
-
-    def __init__(self, sfp_list):
-        self.num_sfp = len(sfp_list)
-        self._api_common = Common()
-        self._initialize_interrupts()
-
-    def _initialize_interrupts(self):
-        sfp_info_obj = {}
-        port_info_path = os.path.join(
-            PLATFORM_PATH, SWITCH_BRD_PLATFORM, self.PORT_INFO_DIR)
-
-        for index in range(self.num_sfp):
-            port_num = index + 1
-            if port_num <= 32:
-                port_name = "QSFP{}".format(port_num)
-                port_type = "qsfp"
-                sysfs_prs_file = "{}_modprs".format(port_type)
-            else:
-                port_name = "SFP{}".format(port_num - 32)
-                port_type = "sfp"
-                sysfs_prs_file = "{}_modabs".format(port_type)
-
-            sfp_info_obj[index] = {}
-            sfp_info_obj[index]['intmask_sysfs'] = self.PATH_INTMASK_SYSFS.format(
-                port_info_path,
-                port_name=port_name,
-                type_prefix=port_type)
-
-            sfp_info_obj[index]['int_sysfs'] = self.PATH_INT_SYSFS.format(
-                port_info_path,
-                port_name=port_name,
-                type_prefix=port_type)
-
-            sfp_info_obj[index]['prs_sysfs'] = self.PATH_PRS_SYSFS.format(
-                port_info_path,
-                port_name=port_name,
-                prs_file_name=sysfs_prs_file)
-
-            self._api_common.write_txt_file(
-                sfp_info_obj[index]["intmask_sysfs"], hex(self.PRESENT_EN))
-
-        self.sfp_info_obj = sfp_info_obj
-
-    def _is_port_device_present(self, port_idx):
-        prs_path = self.sfp_info_obj[port_idx]["prs_sysfs"]
-        is_present = 1 - int(self._api_common.read_txt_file(prs_path))
-        return is_present
-
-    def _update_port_event_object(self, interrup_devices, port_dict):
-        for port_idx in interrup_devices:
-            device_id = str(port_idx + 1)
-            port_dict[device_id] = str(self._is_port_device_present(port_idx))
-        return port_dict
-
-    def _clear_event_flag(self, path):
-        self._api_common.write_txt_file(path, hex(0xff))
-        time.sleep(0.1)
-        self._api_common.write_txt_file(path, hex(0x0))
-
-    def _check_all_port_interrupt_event(self):
-        interrupt_devices = {}
-        for i in range(self.num_sfp):
-            int_sysfs = self.sfp_info_obj[i]["int_sysfs"]
-            interrupt_flags = self._api_common.read_txt_file(int_sysfs)
-            if interrupt_flags != '0x00':
-                interrupt_devices[i] = 1
-                self._clear_event_flag(int_sysfs)
-        return interrupt_devices
-
-    def get_event(self, timeout):
-        sleep_time = min(
-            timeout, POLL_INTERVAL) if timeout != 0 else POLL_INTERVAL
-        start_milli_time = int(round(time.time() * 1000))
-        int_sfp = {}
-
-        while True:
-            chk_sfp = self._check_all_port_interrupt_event()
-            int_sfp = self._update_port_event_object(
-                chk_sfp, int_sfp) if chk_sfp else int_sfp
-            current_milli_time = int(round(time.time() * 1000))
-            if (int_sfp) or \
-                    (timeout != 0 and current_milli_time - start_milli_time > timeout):
-                break
-
-            time.sleep(sleep_time)
-
-        change_dict = dict()
-        change_dict['sfp'] = int_sfp
-
-        return True, change_dict
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/fan.json b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/fan.json
deleted file mode 100644
index 724f6edf53c1..000000000000
--- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/fan.json
+++ /dev/null
@@ -1,200 +0,0 @@
-{
-    "fan_num_per_drawer": 2,
-    "drawer_num": 4,
-    "get_name": {
-        "output_source": "value_list",
-        "value_list": [
-            "Fan1-F",
-            "Fan1-R",
-            "Fan2-F",
-            "Fan2-R",
-            "Fan3-F",
-            "Fan3-R",
-            "Fan4-F",
-            "Fan4-R"
-        ]
-    },
-    "get_presence": {
-        "output_source": "ipmitool",
-        "command": "ipmitool raw 0x3a 0x03 0x03 {}",
-        "argument": [
-            "0x00",
-            "0x00",
-            "0x01",
-            "0x01",
-            "0x02",
-            "0x02",
-            "0x03",
-            "0x03"
-        ],
-        "output_translator": "True if '00' in '{}' else False"
-    },
-    "get_model": {
-        "output_source": "ipmitool",
-        "command": "ipmitool fru list {} | grep 'Board Part Number'",
-        "argument": [
-            "5",
-            "5",
-            "6",
-            "6",
-            "7",
-            "7",
-            "8",
-            "8"
-        ],
-        "output_translator": "'{}'.split()[-1]"
-    },
-    "get_serial": {
-        "output_source": "ipmitool",
-        "command": "ipmitool fru list {} | grep 'Board Serial'",
-        "argument": [
-            "5",
-            "5",
-            "6",
-            "6",
-            "7",
-            "7",
-            "8",
-            "8"
-        ],
-        "output_translator": "'{}'.split()[-1]"
-    },
-    "get_direction": {
-        "output_source": "ipmitool",
-        "command": "ipmitool fru list {} | grep 'F2B\\|B2F'",
-        "argument": [
-            "5",
-            "5",
-            "6",
-            "6",
-            "7",
-            "7",
-            "8",
-            "8"
-        ],
-        "output_translator": "'intake' if 'B2F' in '{}' else 'exhaust'"
-    },
-    "get_speed": {
-        "output_source": "ipmitool",
-        "command": "ipmitool raw 0x04 0x2d {}",
-        "argument": [
-            "0x81",
-            "0x80",
-            "0x83",
-            "0x82",
-            "0x85",
-            "0x84",
-            "0x87",
-            "0x86"
-        ],
-        "output_translator": "int('{}'.split()[0],16)*150",
-        "max_front": 23000,
-        "max_rear": 20500
-    },
-    "get_target_speed": {
-        "output_source": "value",
-        "value": "N/A"
-    },
-    "get_speed_tolerance": {
-        "output_source": "value",
-        "value": 10
-    },
-    "set_speed": {
-        "set_method": "ipmitool",
-        "input_translator": "hex(int({} * 255 / 100.0))",
-        "command": "ipmitool raw 0x3a 0x0c 0x00 0x03 {}",
-        "argument": [
-            "0x40 {}",
-            "0x40 {}",
-            "0x44 {}",
-            "0x44 {}",
-            "0x4c {}",
-            "0x4c {}",
-            "0x50 {}",
-            "0x50 {}"
-        ]
-    },
-    "set_status_led": {
-        "set_method": "ipmitool",
-        "avaliable_input": [
-            "off",
-            "amber",
-            "green"
-        ],
-        "input_translator": {
-            "off": "0x0",
-            "amber": "0x1",
-            "green": "0x2"
-        },
-        "command": "ipmitool raw 0x3a 0x0a {}",
-        "argument": [
-            "0x4 {}",
-            "0x4 {}",
-            "0x5 {}",
-            "0x5 {}",
-            "0x6 {}",
-            "0x6 {}",
-            "0x7 {}",
-            "0x7 {}"
-        ]
-    },
-    "get_status_led": {
-        "output_source": "ipmitool",
-        "command": "ipmitool raw 0x3a 0x0b {}",
-        "argument": [
-            "0x4",
-            "0x4",
-            "0x5",
-            "0x5",
-            "0x6",
-            "0x6",
-            "0x7",
-            "0x7"
-        ],
-        "output_translator": {
-            "00": "off",
-            "01": "amber",
-            "02": "green"
-        }
-    },
-    "psu_fan": [
-        {
-            "num_of_fan": 1,
-            "get_name": {
-                "output_source": "value_list",
-                "value_list": [
-                    "PSU-R-Fan"
-                ]
-            },
-            "get_speed": {
-                "output_source": "ipmitool",
-                "command": "ipmitool raw 0x04 0x2d {}",
-                "argument": [
-                    "0x8b"
-                ],
-                "output_translator": "int('{}'.split()[0],16)*100",
-                "max_front": 22600,
-                "max_rear": 22600
-            }
-        },
-        {
-            "num_of_fan": 1,
-            "get_name": {
-                "output_source": "value_list",
-                "value_list": [
-                    "PSU-L-Fan"
-                ]
-            },
-            "get_speed": {
-                "output_source": "ipmitool",
-                "command": "ipmitool raw 0x04 0x2d {}",
-                "argument": [
-                    "0x8a"
-                ],
-                "output_translator": "int('{}'.split()[0],16)*100",
-                "max_front": 22600,
-                "max_rear": 22600
-            }
-        }
-    ]
-}
\ No newline at end of file
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/psu.json b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/psu.json
deleted file mode 100644
index c3e953c082a7..000000000000
--- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/psu.json
+++ /dev/null
@@ -1,135 +0,0 @@
-{
-    "psu_num": 2,
-    "fan_per_psu_num": 1,
-    "get_name": {
-        "output_source": "value_list",
-        "value_list": [
-            "PSU-R",
-            "PSU-L"
-        ]
-    },
-    "get_power": {
-        "output_source": "ipmitool",
-        "command": "ipmitool sdr | grep {}",
-        "argument": [
-            "PSUR_POut",
-            "PSUL_POut"
-        ],
-        "output_translator": "float('{}'.split()[2])"
-    },
-    "get_current": {
-        "output_source": "ipmitool",
-        "command": "ipmitool sdr | grep {}",
-        "argument": [
-            "PSUR_COut",
-            "PSUL_COut"
-        ],
-        "output_translator": "float('{}'.split()[2])"
-    },
-    "get_voltage": {
-        "output_source": "ipmitool",
-        "command": "ipmitool sdr | grep {}",
-        "argument": [
-            "PSUR_VOut",
-            "PSUL_VOut"
-        ],
-        "output_translator": "float('{}'.split()[2])"
-    },
-    "get_voltage_high_threshold": {
-        "output_source": "ipmitool",
-        "command": "ipmitool sensor list | grep {}",
-        "argument": [
-            "PSUR_Temp2",
-            "PSUL_Temp2"
-        ],
-        "output_translator": "float(0 if '{0}'.split()[-3]=='na' else '{0}'.split()[-3])"
-    },
-    "get_voltage_low_threshold": {
-        "output_source": "ipmitool",
-        "command": "ipmitool sensor list | grep {}",
-        "argument": [
-            "PSUR_Temp2",
-            "PSUL_Temp2"
-        ],
-        "output_translator": "float(0 if '{0}'.split()[-9]=='na' else '{0}'.split()[-9])"
-    },
-    "get_presence": {
-        "output_source": "ipmitool",
-        "command": "ipmitool raw 0x3a 0x0c 0x00 0x2 0x60",
-        "output_translator": [
-            "True if (int('{}', 16) >> 4 & 1) == 0 else False",
-            "True if (int('{}', 16) >> 5 & 1) == 0 else False"
-        ]
-    },
-    "get_model": {
-        "output_source": "ipmitool",
-        "command": "ipmitool fru list {} | grep 'Product Part Number'",
-        "argument": [
-            "4",
-            "3"
-        ],
-        "output_translator": "'{}'.split()[-1]"
-    },
-    "get_serial": {
-        "output_source": "ipmitool",
-        "command": "ipmitool fru list {} | grep 'Product Serial'",
-        "argument": [
-            "4",
-            "3"
-        ],
-        "output_translator": "'{}'.split()[-1]"
-    },
-    "get_powergood_status": {
-        "output_source": "ipmitool",
-        "command": "ipmitool raw 0x3a 0x0c 0x0 0x2 0x60",
-        "output_translator": [
-            "True if (int('{}', 16) >> 2 & 1) == 1 else False",
-            "True if (int('{}', 16) >> 3 & 1) == 1 else False"
-        ]
-    },
-    "set_status_led": {
-        "set_method": "ipmitool",
-        "avaliable_input": [
-            "amber"
-        ],
-        "input_translator": {
-            "amber": "0x1"
-        },
-        "command": "ipmitool raw 0x3a 0x0a {}",
-        "argument": [
-            "0x3 {}",
-            "0x2 {}"
-        ]
-    },
-    "get_status_led": {
-        "output_source": "ipmitool",
-        "command": "ipmitool raw 0x3a 0x0b {}",
-        "argument": [
-            "0x3",
-            "0x2"
-        ],
-        "output_translator": {
-            "00": "green",
-            "01": "amber"
-        },
-        "default_output": "off"
-    },
-    "get_temperature": {
-        "output_source": "ipmitool",
-        "command": "ipmitool sdr | grep {}",
-        "argument": [
-            "PSUR_Temp2",
-            "PSUL_Temp2"
-        ],
-        "output_translator": "float('{}'.split()[2])"
-    },
-    "get_temperature_high_threshold": {
-        "output_source": "ipmitool",
-        "command": "ipmitool sensor list | grep {}",
-        "argument": [
-            "PSUR_Temp2",
-            "PSUL_Temp2"
-        ],
-        "output_translator": "float(0 if '{0}'.split()[-3]=='na' else '{0}'.split()[-3])"
-    }
-}
\ No newline at end of file
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/sfp.json b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/sfp.json
deleted file mode 100644
index d12f0c3ffc1b..000000000000
--- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/sfp.json
+++ /dev/null
@@ -1,143 +0,0 @@
-{
-    "port_num": 33,
-    "eeprom_path": "/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom",
-    "port_i2c_mapping": [
-        2,
-        3,
-        4,
-        5,
-        6,
-        7,
-        8,
-        9,
-        10,
-        11,
-        12,
-        13,
-        14,
-        15,
-        16,
-        17,
-        18,
-        19,
-        20,
-        21,
-        22,
-        23,
-        24,
-        25,
-        26,
-        27,
-        28,
-        29,
-        30,
-        31,
-        32,
-        33,
-        34
-    ],
-    "get_presence": {
-        "output_source": "sysfs_value",
-        "sysfs_path": "/sys/devices/platform/switchboard/SFF/{}",
-        "argument": "$ref:_presence_file",
-        "output_translator": "False if '{}' == '1' else True"
-    },
-    "get_lpmode": {
-        "output_source": "sysfs_value",
-        "sysfs_path": "/sys/devices/platform/switchboard/SFF/{}/qsfp_lpmode",
-        "argument": "$ref:_port_name",
-        "output_translator": "True if '{}' == '1' else False"
-    },
-    "get_reset_status": {
-        "output_source": "sysfs_value",
-        "sysfs_path": "/sys/devices/platform/switchboard/SFF/{}/qsfp_reset",
-        "argument": "$ref:_port_name",
-        "output_translator": "False if '{}' == '1' else True"
-    },
-    "reset": {
-        "set_method": "sysfs_value",
-        "write_offset": 0,
-        "sysfs_path": "/sys/devices/platform/switchboard/SFF/{}/qsfp_reset",
-        "argument": "$ref:_port_name"
-    },
-    "set_lpmode": {
-        "set_method": "sysfs_value",
-        "input_translator": {
-            "True": "0x1",
-            "False": "0x0"
-        },
-        "write_offset": 0,
-        "sysfs_path": "/sys/devices/platform/switchboard/SFF/{}/qsfp_lpmode",
-        "argument": "$ref:_port_name"
-    },
-    "_port_name": [
-        "QSFP1",
-        "QSFP2",
-        "QSFP3",
-        "QSFP4",
-        "QSFP5",
-        "QSFP6",
-        "QSFP7",
-        "QSFP8",
-        "QSFP9",
-        "QSFP10",
-        "QSFP11",
-        "QSFP12",
-        "QSFP13",
-        "QSFP14",
-        "QSFP15",
-        "QSFP16",
-        "QSFP17",
-        "QSFP18",
-        "QSFP19",
-        "QSFP20",
-        "QSFP21",
-        "QSFP22",
-        "QSFP23",
-        "QSFP24",
-        "QSFP25",
-        "QSFP26",
-        "QSFP27",
-        "QSFP28",
-        "QSFP29",
-        "QSFP30",
-        "QSFP31",
-        "QSFP32",
-        "SFP1"
-    ],
-    "_presence_file": [
-      "QSFP1/qsfp_modprs",
-      "QSFP2/qsfp_modprs",
-      "QSFP3/qsfp_modprs",
-      "QSFP4/qsfp_modprs",
-      "QSFP5/qsfp_modprs",
-      "QSFP6/qsfp_modprs",
-      "QSFP7/qsfp_modprs",
-      "QSFP8/qsfp_modprs",
-      "QSFP9/qsfp_modprs",
-      "QSFP10/qsfp_modprs",
-      "QSFP11/qsfp_modprs",
-      "QSFP12/qsfp_modprs",
-      "QSFP13/qsfp_modprs",
-      "QSFP14/qsfp_modprs",
-      "QSFP15/qsfp_modprs",
-      "QSFP16/qsfp_modprs",
-      "QSFP17/qsfp_modprs",
-      "QSFP18/qsfp_modprs",
-      "QSFP19/qsfp_modprs",
-      "QSFP20/qsfp_modprs",
-      "QSFP21/qsfp_modprs",
-      "QSFP22/qsfp_modprs",
-      "QSFP23/qsfp_modprs",
-      "QSFP24/qsfp_modprs",
-      "QSFP25/qsfp_modprs",
-      "QSFP26/qsfp_modprs",
-      "QSFP27/qsfp_modprs",
-      "QSFP28/qsfp_modprs",
-      "QSFP29/qsfp_modprs",
-      "QSFP30/qsfp_modprs",
-      "QSFP31/qsfp_modprs",
-      "QSFP32/qsfp_modprs",
-      "SFP1/sfp_modabs"
-    ]
-}
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/thermal.json b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/thermal.json
deleted file mode 100644
index e3dcb7fb9271..000000000000
--- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/thermal.json
+++ /dev/null
@@ -1,105 +0,0 @@
-{
-    "thermal_num": 9,
-    "get_name": {
-        "output_source": "value_list",
-        "value_list": [
-            "Base_Temp_U5",
-            "Base_Temp_U7",
-            "CPU_Temp",
-            "Switch_Temp_U1",
-            "Switch_Temp_U18",
-            "Switch_Temp_U28",
-            "Switch_Temp_U29",
-            "Switch_U21_Temp",
-            "Switch_U33_Temp"
-        ]
-    },
-    "get_temperature": {
-        "output_source": "ipmitool",
-        "command": "ipmitool raw 0x04 0x2D {}",
-        "argument": [
-            "0x1",
-            "0x2",
-            "0x7",
-            "0x3",
-            "0x4",
-            "0x5",
-            "0x6",
-            "0x56",
-            "0x4C"
-        ],
-        "output_translator": "int('{}'.split()[0],16)"
-    },
-    "get_high_threshold": {
-        "output_source": "ipmitool",
-        "command": "ipmitool raw 0x04 0x27 {}",
-        "argument": [
-            "0x1",
-            "0x2",
-            "0x7",
-            "0x3",
-            "0x4",
-            "0x5",
-            "0x6",
-            "0x56",
-            "0x4c"
-        ],
-        "output_translator": "int('{}'.split()[4], 16)"
-    },
-    "get_low_threshold": {
-        "output_source": "value",
-        "value": "N/A"
-    },
-    "set_high_threshold": {
-        "set_method": "ipmitool",
-        "command": "ipmitool sensor thresh {}",
-        "input_translator": "{}",
-        "argument": [
-            "Base_Temp_U5 unc {}",
-            "Base_Temp_U7 unc {}",
-            "CPU_Temp unc {}",
-            "Switch_Temp_U1 unc {}",
-            "Switch_Temp_U18 unc {}",
-            "Switch_Temp_U28 unc {}",
-            "Switch_Temp_U29 unc {}",
-            "Switch_U21_Temp unc {}",
-            "Switch_U33_Temp unc {}"
-        ]
-    },
-    "set_low_threshold": {
-        "output_source": "ipmitool",
-        "command": "ipmitool sensor thresh {}",
-        "input_translator": "{}",
-        "argument": [
-            "Base_Temp_U5 lnc {}",
-            "Base_Temp_U7 lnc {}",
-            "CPU_Temp lnc {}",
-            "Switch_Temp_U1 lnc {}",
-            "Switch_Temp_U18 lnc {}",
-            "Switch_Temp_U28 lnc {}",
-            "Switch_Temp_U29 lnc {}",
-            "Switch_U21_Temp lnc {}",
-            "Switch_U33_Temp lnc {}"
-        ]
-    },
-    "get_high_critical_threshold": {
-        "output_source": "ipmitool",
-        "command": "ipmitool raw 0x04 0x27 {}",
-        "argument": [
-            "0x1",
-            "0x2",
-            "0x7",
-            "0x3",
-            "0x4",
-            "0x5",
-            "0x6",
-            "0x56",
-            "0x4c"
-        ],
-        "output_translator": "int('{}'.split()[5], 16)"
-    },
-    "get_low_critical_threshold": {
-        "output_source": "value",
-        "value": "N/A"
-    }
-}
\ No newline at end of file
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/watchdog.py b/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/watchdog.py
deleted file mode 100644
index fac5c40e134f..000000000000
--- a/device/celestica/x86_64-cel_seastone_2-r0/sonic_platform_config/watchdog.py
+++ /dev/null
@@ -1,191 +0,0 @@
-#############################################################################
-# Celestica Seastone2
-#
-# Watchdog contains an implementation of SONiC Platform Base API
-#
-#############################################################################
-import os
-import time
-
-try:
-    from sonic_platform_base.watchdog_base import WatchdogBase
-    from sonic_platform.common import Common
-except ImportError as e:
-    raise ImportError(str(e) + "- required module not found")
-
-PLATFORM_CPLD_PATH = '/sys/devices/platform/baseboard/'
-GETREG_FILE = 'getreg'
-SETREG_FILE = 'setreg'
-WDT_ENABLE_REG = '0xA181'
-WDT_TIMER_L_BIT_REG = '0xA182'
-WDT_TIMER_M_BIT_REG = '0xA183'
-WDT_TIMER_H_BIT_REG = '0xA184'
-WDT_KEEP_ALVIVE_REG = '0xA185'
-ENABLE_CMD = '0x1'
-DISABLE_CMD = '0x0'
-WDT_COMMON_ERROR = -1
-
-
-class Watchdog(WatchdogBase):
-
-    def __init__(self):
-        WatchdogBase.__init__(self)
-
-        self._api_common = Common()
-
-        # Init cpld reg path
-        self.setreg_path = os.path.join(PLATFORM_CPLD_PATH, SETREG_FILE)
-        self.getreg_path = os.path.join(PLATFORM_CPLD_PATH, GETREG_FILE)
-
-        # Set default value
-        self._disable()
-        self.armed = False
-        self.timeout = self._gettimeout()
-
-    def _enable(self):
-        """
-        Turn on the watchdog timer
-        """
-        # echo 0xA181 0x1 > /sys/devices/platform/baseboard/setreg
-        enable_val = '{} {}'.format(WDT_ENABLE_REG, ENABLE_CMD)
-        return self._api_common.write_txt_file(self.setreg_path, enable_val)
-
-    def _disable(self):
-        """
-        Turn off the watchdog timer
-        """
-        # echo 0xA181 0x0 > /sys/devices/platform/baseboard/setreg
-        disable_val = '{} {}'.format(WDT_ENABLE_REG, DISABLE_CMD)
-        return self._api_common.write_txt_file(self.setreg_path, disable_val)
-
-    def _keepalive(self):
-        """
-        Keep alive watchdog timer
-        """
-        # echo 0xA185 0x1 > /sys/devices/platform/baseboard/setreg
-        enable_val = '{} {}'.format(WDT_KEEP_ALVIVE_REG, ENABLE_CMD)
-        return self._api_common.write_txt_file(self.setreg_path, enable_val)
-
-    def _get_level_hex(self, sub_hex):
-        sub_hex_str = sub_hex.replace("x", "0")
-        return hex(int(sub_hex_str, 16))
-
-    def _seconds_to_lmh_hex(self, seconds):
-        ms = seconds*1000  # calculate timeout in ms format
-        hex_str = hex(ms)
-        l = self._get_level_hex(hex_str[-2:])
-        m = self._get_level_hex(hex_str[-4:-2])
-        h = self._get_level_hex(hex_str[-6:-4])
-        return (l, m, h)
-
-    def _settimeout(self, seconds):
-        """
-        Set watchdog timer timeout
-        @param seconds - timeout in seconds
-        @return is the actual set timeout
-        """
-        # max = 0xffffff = 16777.215 seconds
-
-        (l, m, h) = self._seconds_to_lmh_hex(seconds)
-        set_h_val = '{} {}'.format(WDT_TIMER_H_BIT_REG, h)
-        set_m_val = '{} {}'.format(WDT_TIMER_M_BIT_REG, m)
-        set_l_val = '{} {}'.format(WDT_TIMER_L_BIT_REG, l)
-
-        self._api_common.write_txt_file(
-            self.setreg_path, set_h_val)  # set high bit
-        self._api_common.write_txt_file(
-            self.setreg_path, set_m_val)  # set med bit
-        self._api_common.write_txt_file(
-            self.setreg_path, set_l_val)  # set low bit
-
-        return seconds
-
-    def _gettimeout(self):
-        """
-        Get watchdog timeout
-        @return watchdog timeout
-        """
-
-        h_bit = self._api_common.get_reg(
-            self.getreg_path, WDT_TIMER_H_BIT_REG)
-        m_bit = self._api_common.get_reg(
-            self.getreg_path, WDT_TIMER_M_BIT_REG)
-        l_bit = self._api_common.get_reg(
-            self.getreg_path, WDT_TIMER_L_BIT_REG)
-
-        hex_time = '0x{}{}{}'.format(h_bit[2:], m_bit[2:], l_bit[2:])
-        ms = int(hex_time, 16)
-        return int(float(ms)/1000)
-
-    #################################################################
-
-    def arm(self, seconds):
-        """
-        Arm the hardware watchdog with a timeout of <seconds> seconds.
-        If the watchdog is currently armed, calling this function will
-        simply reset the timer to the provided value. If the underlying
-        hardware does not support the value provided in <seconds>, this
-        method should arm the watchdog with the *next greater* available
-        value.
-        Returns:
-            An integer specifying the *actual* number of seconds the watchdog
-            was armed with. On failure returns -1.
-        """
-
-        ret = WDT_COMMON_ERROR
-        if seconds < 0:
-            return ret
-
-        try:
-            if self.timeout != seconds:
-                self.timeout = self._settimeout(seconds)
-
-            if self.armed:
-                self._keepalive()
-            else:
-                self._enable()
-                self.armed = True
-
-            ret = self.timeout
-            self.arm_timestamp = time.time()
-        except IOError as e:
-            pass
-
-        return ret
-
-    def disarm(self):
-        """
-        Disarm the hardware watchdog
-        Returns:
-            A boolean, True if watchdog is disarmed successfully, False if not
-        """
-        disarmed = False
-        if self.is_armed():
-            try:
-                self._disable()
-                self.armed = False
-                disarmed = True
-            except IOError:
-                pass
-
-        return disarmed
-
-    def is_armed(self):
-        """
-        Retrieves the armed state of the hardware watchdog.
-        Returns:
-            A boolean, True if watchdog is armed, False if not
-        """
-
-        return self.armed
-
-    def get_remaining_time(self):
-        """
-        If the watchdog is armed, retrieve the number of seconds remaining on
-        the watchdog timer
-        Returns:
-            An integer specifying the number of seconds remaining on thei
-            watchdog timer. If the watchdog is not armed, returns -1.
-        """
-
-        return int(self.timeout - (time.time() - self.arm_timestamp)) if self.armed else WDT_COMMON_ERROR
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/system_health_monitoring_config.json b/device/celestica/x86_64-cel_seastone_2-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000000..56fda7de4f5d
--- /dev/null
+++ b/device/celestica/x86_64-cel_seastone_2-r0/system_health_monitoring_config.json
@@ -0,0 +1,13 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "psu.temperature"
+    ],
+    "user_defined_checkers": [],
+    "polling_interval": 60,
+    "led_color": {
+        "fault": "amber",
+        "normal": "green",
+        "booting": "green_blink_1hz"
+    }
+}
diff --git a/device/celestica/x86_64-cel_seastone_2-r0/warm-reboot_plugin b/device/celestica/x86_64-cel_seastone_2-r0/warm-reboot_plugin
new file mode 100755
index 000000000000..d0fb8b29e191
--- /dev/null
+++ b/device/celestica/x86_64-cel_seastone_2-r0/warm-reboot_plugin
@@ -0,0 +1,4 @@
+#!/bin/bash
+
+# Set all LEDs to BMC's control
+ipmitool raw 0x3a 0x0f 0x02 0x01 &> /dev/null
diff --git a/device/celestica/x86_64-cel_silverstone-r0/Silverstone-128x100/th3-128x100G.config.bcm b/device/celestica/x86_64-cel_silverstone-r0/Silverstone-128x100/th3-128x100G.config.bcm
index 447de2e85b5a..baddedd9c61b 100644
--- a/device/celestica/x86_64-cel_silverstone-r0/Silverstone-128x100/th3-128x100G.config.bcm
+++ b/device/celestica/x86_64-cel_silverstone-r0/Silverstone-128x100/th3-128x100G.config.bcm
@@ -9,8 +9,6 @@ phy_enable=0
 phy_null=1
 pll_bypass=1
 
-init_all_modules=0
-
 sai_tunnel_global_sip_mask_enable=1
 
 portmap_20=33:100:2
diff --git a/device/celestica/x86_64-cel_silverstone-r0/Silverstone/hwsku.json b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/hwsku.json
new file mode 100644
index 000000000000..b97d516509ec
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/hwsku.json
@@ -0,0 +1,164 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_silverstone-r0/Silverstone/port_config.ini b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/port_config.ini
index 9cd85ee34798..1d2b56d9fed9 100644
--- a/device/celestica/x86_64-cel_silverstone-r0/Silverstone/port_config.ini
+++ b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/port_config.ini
@@ -1,33 +1,33 @@
 # name          lanes                                    alias         index    speed
-Ethernet0       33,34,35,36,37,38,39,40                  QSFPDD1       1        400000
-Ethernet4       41,42,43,44,45,46,47,48                  QSFPDD2       2        400000
-Ethernet8       49,50,51,52,53,54,55,56                  QSFPDD3       3        400000
-Ethernet12      57,58,59,60,61,62,63,64                  QSFPDD4       4        400000
-Ethernet16      65,66,67,68,69,70,71,72                  QSFPDD5       5        400000
-Ethernet20      73,74,75,76,77,78,79,80                  QSFPDD6       6        400000
-Ethernet24      81,82,83,84,85,86,87,88                  QSFPDD7       7        400000
-Ethernet28      89,90,91,92,93,94,95,96                  QSFPDD8       8        400000
-Ethernet32      1,2,3,4,5,6,7,8                          QSFPDD9       9        400000
-Ethernet36      9,10,11,12,13,14,15,16                   QSFPDD10      10       400000
-Ethernet40      17,18,19,20,21,22,23,24                  QSFPDD11      11       400000
-Ethernet44      25,26,27,28,29,30,31,32                  QSFPDD12      12       400000
-Ethernet48      97,98,99,100,101,102,103,104             QSFPDD13      13       400000
-Ethernet52      105,106,107,108,109,110,111,112          QSFPDD14      14       400000
-Ethernet56      113,114,115,116,117,118,119,120          QSFPDD15      15       400000
-Ethernet60      121,122,123,124,125,126,127,128          QSFPDD16      16       400000
-Ethernet64      129,130,131,132,133,134,135,136          QSFPDD17      17       400000
-Ethernet68      137,138,139,140,141,142,143,144          QSFPDD18      18       400000
-Ethernet72      145,146,147,148,149,150,151,152          QSFPDD19      19       400000
-Ethernet76      153,154,155,156,157,158,159,160          QSFPDD20      20       400000
-Ethernet80      225,226,227,228,229,230,231,232          QSFPDD21      21       400000
-Ethernet84      233,234,235,236,237,238,239,240          QSFPDD22      22       400000
-Ethernet88      241,242,243,244,245,246,247,248          QSFPDD23      23       400000
-Ethernet92      249,250,251,252,253,254,255,256          QSFPDD24      24       400000
-Ethernet96      161,162,163,164,165,166,167,168          QSFPDD25      25       400000
-Ethernet100     169,170,171,172,173,174,175,176          QSFPDD26      26       400000
-Ethernet104     177,178,179,180,181,182,183,184          QSFPDD27      27       400000
-Ethernet108     185,186,187,188,189,190,191,192          QSFPDD28      28       400000
-Ethernet112     193,194,195,196,197,198,199,200          QSFPDD29      29       400000
-Ethernet116     201,202,203,204,205,206,207,208          QSFPDD30      30       400000
-Ethernet120     209,210,211,212,213,214,215,216          QSFPDD31      31       400000
-Ethernet124     217,218,219,220,221,222,223,224          QSFPDD32      32       400000
\ No newline at end of file
+Ethernet0       33,34,35,36,37,38,39,40                  Eth1/1       1        400000
+Ethernet8       41,42,43,44,45,46,47,48                  Eth2/1       2        400000
+Ethernet16      49,50,51,52,53,54,55,56                  Eth3/1       3        400000
+Ethernet24      57,58,59,60,61,62,63,64                  Eth4/1       4        400000
+Ethernet32      65,66,67,68,69,70,71,72                  Eth5/1       5        400000
+Ethernet40      73,74,75,76,77,78,79,80                  Eth6/1       6        400000
+Ethernet48      81,82,83,84,85,86,87,88                  Eth7/1       7        400000
+Ethernet56      89,90,91,92,93,94,95,96                  Eth8/1       8        400000
+Ethernet64      1,2,3,4,5,6,7,8                          Eth9/1       9        400000
+Ethernet72      9,10,11,12,13,14,15,16                   Eth10/1      10       400000
+Ethernet80      17,18,19,20,21,22,23,24                  Eth11/1      11       400000
+Ethernet88      25,26,27,28,29,30,31,32                  Eth12/1      12       400000
+Ethernet96      97,98,99,100,101,102,103,104             Eth13/1      13       400000
+Ethernet104     105,106,107,108,109,110,111,112          Eth14/1      14       400000
+Ethernet112     113,114,115,116,117,118,119,120          Eth15/1      15       400000
+Ethernet120     121,122,123,124,125,126,127,128          Eth16/1      16       400000
+Ethernet128     129,130,131,132,133,134,135,136          Eth17/1      17       400000
+Ethernet136     137,138,139,140,141,142,143,144          Eth18/1      18       400000
+Ethernet144     145,146,147,148,149,150,151,152          Eth19/1      19       400000
+Ethernet152     153,154,155,156,157,158,159,160          Eth20/1      20       400000
+Ethernet160     225,226,227,228,229,230,231,232          Eth21/1      21       400000
+Ethernet168     233,234,235,236,237,238,239,240          Eth22/1      22       400000
+Ethernet176     241,242,243,244,245,246,247,248          Eth23/1      23       400000
+Ethernet184     249,250,251,252,253,254,255,256          Eth24/1      24       400000
+Ethernet192     161,162,163,164,165,166,167,168          Eth25/1      25       400000
+Ethernet200     169,170,171,172,173,174,175,176          Eth26/1      26       400000
+Ethernet208     177,178,179,180,181,182,183,184          Eth27/1      27       400000
+Ethernet216     185,186,187,188,189,190,191,192          Eth28/1      28       400000
+Ethernet224     193,194,195,196,197,198,199,200          Eth29/1      29       400000
+Ethernet232     201,202,203,204,205,206,207,208          Eth30/1      30       400000
+Ethernet240     209,210,211,212,213,214,215,216          Eth31/1      31       400000
+Ethernet248     217,218,219,220,221,222,223,224          Eth32/1      32       400000
diff --git a/device/celestica/x86_64-cel_silverstone-r0/Silverstone/sai_postinit_cmd.soc b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/sai_postinit_cmd.soc
new file mode 100644
index 000000000000..731625308a5e
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/sai_postinit_cmd.soc
@@ -0,0 +1,2 @@
+modreg ING_MISC_CONFIG INPUT_PRI_TAGGED=1
+modreg ING_MISC_CONFIG  INPUT_PRI_UNTAGGED=1
diff --git a/device/celestica/x86_64-cel_silverstone-r0/Silverstone/th3-32x400G.config.bcm b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/th3-32x400G.config.bcm
index 400fbdcf7573..3d4cebc5269f 100644
--- a/device/celestica/x86_64-cel_silverstone-r0/Silverstone/th3-32x400G.config.bcm
+++ b/device/celestica/x86_64-cel_silverstone-r0/Silverstone/th3-32x400G.config.bcm
@@ -1,5 +1,5 @@
 
-pbmp_xport_xe.0=0x8111181111c1111811118111181111c111182222
+pbmp_xport_xe.0=0x8ffff8ffffcffff8ffff8ffff8ffffcffff8ffff
 ccm_dma_enable=0
 ccmdma_intr_enable=0
 ctr_evict_enable=0
@@ -10,8 +10,6 @@ phy_enable=0
 phy_null=1
 pll_bypass=1
 
-init_all_modules=0
-
 sai_tunnel_global_sip_mask_enable=1
 
 
@@ -183,38 +181,38 @@ serdes_core_tx_polarity_flip_physical{209}=0xe9
 serdes_core_rx_polarity_flip_physical{217}=0xec
 serdes_core_tx_polarity_flip_physical{217}=0x68
 
-dport_map_port_20=1
-dport_map_port_24=2
-dport_map_port_28=3
-dport_map_port_32=4
-dport_map_port_40=5
-dport_map_port_44=6
-dport_map_port_48=7
-dport_map_port_52=8
-dport_map_port_1=9
-dport_map_port_5=10
-dport_map_port_9=11
-dport_map_port_13=12
-dport_map_port_60=13
-dport_map_port_64=14
-dport_map_port_68=15
-dport_map_port_72=16
-dport_map_port_80=17
-dport_map_port_84=18
-dport_map_port_88=19
-dport_map_port_92=20
-dport_map_port_140=21
-dport_map_port_144=22
-dport_map_port_148=23
-dport_map_port_152=24
-dport_map_port_100=25
-dport_map_port_104=26
-dport_map_port_108=27
-dport_map_port_112=28
-dport_map_port_120=29
-dport_map_port_124=30
-dport_map_port_128=31
-dport_map_port_132=32
+#dport_map_port_20=1
+#dport_map_port_24=2
+#dport_map_port_28=3
+#dport_map_port_32=4
+#dport_map_port_40=5
+#dport_map_port_44=6
+#dport_map_port_48=7
+#dport_map_port_52=8
+#dport_map_port_1=9
+#dport_map_port_5=10
+#dport_map_port_9=11
+#dport_map_port_13=12
+#dport_map_port_60=13
+#dport_map_port_64=14
+#dport_map_port_68=15
+#dport_map_port_72=16
+#dport_map_port_80=17
+#dport_map_port_84=18
+#dport_map_port_88=19
+#dport_map_port_92=20
+#dport_map_port_140=21
+#dport_map_port_144=22
+#dport_map_port_148=23
+#dport_map_port_152=24
+#dport_map_port_100=25
+#dport_map_port_104=26
+#dport_map_port_108=27
+#dport_map_port_112=28
+#dport_map_port_120=29
+#dport_map_port_124=30
+#dport_map_port_128=31
+#dport_map_port_132=32
 
 #dport_map_port_38=33
 #dport_map_port_118=34
@@ -229,4 +227,4 @@ port_flex_enable=1
 #firmware load method, use fast load
 load_firmware=0x2
 
-
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
diff --git a/device/celestica/x86_64-cel_silverstone-r0/pcie.yaml b/device/celestica/x86_64-cel_silverstone-r0/pcie.yaml
new file mode 100644
index 000000000000..2249ead1a849
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone-r0/pcie.yaml
@@ -0,0 +1,434 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: 6f00
+  name: 'Host bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D DMI2
+    (rev 03)'
+- bus: '00'
+  dev: '01'
+  fn: '0'
+  id: 6f02
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 1 (rev 03)'
+- bus: '00'
+  dev: '02'
+  fn: '0'
+  id: 6f04
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 03)'
+- bus: '00'
+  dev: '02'
+  fn: '2'
+  id: 6f06
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 03)'
+- bus: '00'
+  dev: '03'
+  fn: '0'
+  id: 6f08
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 03)'
+- bus: '00'
+  dev: '03'
+  fn: '1'
+  id: 6f09
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 03)'
+- bus: '00'
+  dev: '03'
+  fn: '2'
+  id: 6f0a
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 03)'
+- bus: '00'
+  dev: '03'
+  fn: '3'
+  id: 6f0b
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '0'
+  id: 6f28
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Map/VTd_Misc/System Management (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '1'
+  id: 6f29
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Hot Plug (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '2'
+  id: 6f2a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO RAS/Control Status/Global Errors (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '4'
+  id: 6f2c
+  name: 'PIC: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D I/O APIC (rev
+    03)'
+- bus: '00'
+  dev: 1c
+  fn: '0'
+  id: 8c10
+  name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express
+    Root Port #1 (rev d5)'
+- bus: '00'
+  dev: 1c
+  fn: '1'
+  id: 8c12
+  name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express
+    Root Port #2 (rev d5)'
+- bus: '00'
+  dev: 1c
+  fn: '2'
+  id: 8c14
+  name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express
+    Root Port #3 (rev d5)'
+- bus: '00'
+  dev: 1d
+  fn: '0'
+  id: 8c26
+  name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
+    EHCI #1 (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: 8c54
+  name: 'ISA bridge: Intel Corporation C224 Series Chipset Family Server Standard
+    SKU LPC Controller (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '2'
+  id: 8c02
+  name: 'SATA controller: Intel Corporation 8 Series/C220 Series Chipset Family 6-port
+    SATA Controller 1 [AHCI mode] (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '3'
+  id: 8c22
+  name: 'SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller
+    (rev 05)'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: 6f50
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 0'
+- bus: '02'
+  dev: '00'
+  fn: '1'
+  id: 6f51
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 1'
+- bus: '02'
+  dev: '00'
+  fn: '2'
+  id: 6f52
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 2'
+- bus: '02'
+  dev: '00'
+  fn: '3'
+  id: 6f53
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 3'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '03'
+  dev: '00'
+  fn: '1'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '05'
+  dev: '00'
+  fn: '0'
+  id: b980
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b980 (rev 11)'
+- bus: 09
+  dev: '00'
+  fn: '0'
+  id: '7021'
+  name: 'Memory controller: Xilinx Corporation Device 7021'
+- bus: 0a
+  dev: '00'
+  fn: '0'
+  id: '1533'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
+    03)'
+- bus: 0b
+  dev: '00'
+  fn: '0'
+  id: '1533'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
+    03)'
+- bus: ff
+  dev: 0b
+  fn: '0'
+  id: 6f81
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '1'
+  id: 6f36
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '2'
+  id: 6f37
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '3'
+  id: 6f76
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link Debug (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '0'
+  id: 6fe0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '1'
+  id: 6fe1
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '0'
+  id: 6ff8
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '4'
+  id: 6ffc
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '5'
+  id: 6ffd
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '6'
+  id: 6ffe
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '0'
+  id: 6f1d
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R2PCIe Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '1'
+  id: 6f34
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R2PCIe Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '5'
+  id: 6f1e
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '6'
+  id: 6f7d
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '7'
+  id: 6f1f
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '12'
+  fn: '0'
+  id: 6fa0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Home Agent 0 (rev 03)'
+- bus: ff
+  dev: '12'
+  fn: '1'
+  id: 6f30
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Home Agent 0 (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '0'
+  id: 6fa8
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '1'
+  id: 6f71
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '2'
+  id: 6faa
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '3'
+  id: 6fab
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '4'
+  id: 6fac
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '5'
+  id: 6fad
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '6'
+  id: 6fae
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Broadcast (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '7'
+  id: 6faf
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Global Broadcast (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '0'
+  id: 6fb0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 0 Thermal Control (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '1'
+  id: 6fb1
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 1 Thermal Control (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '2'
+  id: 6fb2
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 0 Error (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '3'
+  id: 6fb3
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 1 Error (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '4'
+  id: 6fbc
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '5'
+  id: 6fbd
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '6'
+  id: 6fbe
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '7'
+  id: 6fbf
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '0'
+  id: 6fb4
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 2 Thermal Control (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '1'
+  id: 6fb5
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 3 Thermal Control (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '2'
+  id: 6fb6
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 2 Error (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '3'
+  id: 6fb7
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 3 Error (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '0'
+  id: 6f98
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '1'
+  id: 6f99
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '2'
+  id: 6f9a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '3'
+  id: 6fc0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '4'
+  id: 6f9c
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1f
+  fn: '0'
+  id: 6f88
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1f
+  fn: '2'
+  id: 6f8a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
diff --git a/device/celestica/x86_64-cel_silverstone-r0/platform.json b/device/celestica/x86_64-cel_silverstone-r0/platform.json
new file mode 100644
index 000000000000..6dc768bd4622
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone-r0/platform.json
@@ -0,0 +1,484 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1,1,1,1,1",
+            "lanes": "33,34,35,36,37,38,39,40",
+            "breakout_modes": {
+                    "1x400G": ["Eth1/1"],
+                    "2x100G": ["Eth1/1", "Eth1/5"],
+                    "2x40G": ["Eth1/1", "Eth1/5"],
+                    "4x100G": ["Eth1/1", "Eth1/3", "Eth1/5", "Eth1/7"],
+                    "1x100G(2)": ["Eth1/1"],
+                    "1x100G(4)": ["Eth1/1"],
+                    "1x40G(4)": ["Eth1/1"],
+                    "4x25G(4)": ["Eth1/1", "Eth1/2", "Eth1/3", "Eth1/4"],
+                    "4x10G(4)": ["Eth1/1", "Eth1/2", "Eth1/3", "Eth1/4"]
+            }
+        },
+        "Ethernet8": {
+            "index": "2,2,2,2,2,2,2,2",
+            "lanes": "41,42,43,44,45,46,47,48",
+            "breakout_modes": {
+                    "1x400G": ["Eth2/1"],
+                    "2x100G": ["Eth2/1", "Eth2/5"],
+                    "2x40G": ["Eth2/1", "Eth2/5"],
+                    "4x100G": ["Eth2/1", "Eth2/3", "Eth2/5", "Eth2/7"],
+                    "1x100G(2)": ["Eth2/1"],
+                    "1x100G(4)": ["Eth2/1"],
+                    "1x40G(4)": ["Eth2/1"],
+                    "4x25G(4)": ["Eth2/1", "Eth2/2", "Eth2/3", "Eth2/4"],
+                    "4x10G(4)": ["Eth2/1", "Eth2/2", "Eth2/3", "Eth2/4"]
+            }
+        },
+        "Ethernet16": {
+            "index": "3,3,3,3,3,3,3,3",
+            "lanes": "49,50,51,52,53,54,55,56",
+            "breakout_modes": {
+                    "1x400G": ["Eth3/1"],
+                    "2x100G": ["Eth3/1", "Eth3/5"],
+                    "2x40G": ["Eth3/1", "Eth3/5"],
+                    "4x100G": ["Eth3/1", "Eth3/3", "Eth3/5", "Eth3/7"],
+                    "1x100G(2)": ["Eth3/1"],
+                    "1x100G(4)": ["Eth3/1"],
+                    "1x40G(4)": ["Eth3/1"],
+                    "4x25G(4)": ["Eth3/1", "Eth3/2", "Eth3/3", "Eth3/4"],
+                    "4x10G(4)": ["Eth3/1", "Eth3/2", "Eth3/3", "Eth3/4"]
+            }
+        },
+        "Ethernet24": {
+            "index": "4,4,4,4,4,4,4,4",
+            "lanes": "57,58,59,60,61,62,63,64",
+            "breakout_modes": {
+                    "1x400G": ["Eth4/1"],
+                    "2x100G": ["Eth4/1", "Eth4/5"],
+                    "2x40G": ["Eth4/1", "Eth4/5"],
+                    "4x100G": ["Eth4/1", "Eth4/3", "Eth4/5", "Eth4/7"],
+                    "1x100G(2)": ["Eth4/1"],
+                    "1x100G(4)": ["Eth4/1"],
+                    "1x40G(4)": ["Eth4/1"],
+                    "4x25G(4)": ["Eth4/1", "Eth4/2", "Eth4/3", "Eth4/4"],
+                    "4x10G(4)": ["Eth4/1", "Eth4/2", "Eth4/3", "Eth4/4"]
+            }
+        },
+        "Ethernet32": {
+            "index": "5,5,5,5,5,5,5,5",
+            "lanes": "65,66,67,68,69,70,71,72",
+            "breakout_modes": {
+                    "1x400G": ["Eth5/1"],
+                    "2x100G": ["Eth5/1", "Eth5/5"],
+                    "2x40G": ["Eth5/1", "Eth5/5"],
+                    "4x100G": ["Eth5/1", "Eth5/3", "Eth5/5", "Eth5/7"],
+                    "1x100G(2)": ["Eth5/1"],
+                    "1x100G(4)": ["Eth5/1"],
+                    "1x40G(4)": ["Eth5/1"],
+                    "4x25G(4)": ["Eth5/1", "Eth5/2", "Eth5/3", "Eth5/4"],
+                    "4x10G(4)": ["Eth5/1", "Eth5/2", "Eth5/3", "Eth5/4"]
+            }
+        },
+        "Ethernet40": {
+            "index": "6,6,6,6,6,6,6,6",
+            "lanes": "73,74,75,76,77,78,79,80",
+            "breakout_modes": {
+                    "1x400G": ["Eth6/1"],
+                    "2x100G": ["Eth6/1", "Eth6/5"],
+                    "2x40G": ["Eth6/1", "Eth6/5"],
+                    "4x100G": ["Eth6/1", "Eth6/3", "Eth6/5", "Eth6/7"],
+                    "1x100G(2)": ["Eth6/1"],
+                    "1x100G(4)": ["Eth6/1"],
+                    "1x40G(4)": ["Eth6/1"],
+                    "4x25G(4)": ["Eth6/1", "Eth6/2", "Eth6/3", "Eth6/4"],
+                    "4x10G(4)": ["Eth6/1", "Eth6/2", "Eth6/3", "Eth6/4"]
+            }
+        },
+        "Ethernet48": {
+            "index": "7,7,7,7,7,7,7,7",
+            "lanes": "81,82,83,84,85,86,87,88",
+            "breakout_modes": {
+                    "1x400G": ["Eth7/1"],
+                    "2x100G": ["Eth7/1", "Eth7/5"],
+                    "2x40G": ["Eth7/1", "Eth7/5"],
+                    "4x100G": ["Eth7/1", "Eth7/3", "Eth7/5", "Eth7/7"],
+                    "1x100G(2)": ["Eth7/1"],
+                    "1x100G(4)": ["Eth7/1"],
+                    "1x40G(4)": ["Eth7/1"],
+                    "4x25G(4)": ["Eth7/1", "Eth7/2", "Eth7/3", "Eth7/4"],
+                    "4x10G(4)": ["Eth7/1", "Eth7/2", "Eth7/3", "Eth7/4"]
+            }
+        },
+        "Ethernet56": {
+            "index": "8,8,8,8,8,8,8,8",
+            "lanes": "89,90,91,92,93,94,95,96",
+            "breakout_modes": {
+                    "1x400G": ["Eth8/1"],
+                    "2x100G": ["Eth8/1", "Eth8/5"],
+                    "2x40G": ["Eth8/1", "Eth8/5"],
+                    "4x100G": ["Eth8/1", "Eth8/3", "Eth8/5", "Eth8/7"],
+                    "1x100G(2)": ["Eth8/1"],
+                    "1x100G(4)": ["Eth8/1"],
+                    "1x40G(4)": ["Eth8/1"],
+                    "4x25G(4)": ["Eth8/1", "Eth8/2", "Eth8/3", "Eth8/4"],
+                    "4x10G(4)": ["Eth8/1", "Eth8/2", "Eth8/3", "Eth8/4"]
+            }
+        },
+        "Ethernet64": {
+            "index": "9,9,9,9,9,9,9,9",
+            "lanes": "1,2,3,4,5,6,7,8",
+            "breakout_modes": {
+                    "1x400G": ["Eth9/1"],
+                    "2x100G": ["Eth9/1", "Eth9/5"],
+                    "2x40G": ["Eth9/1", "Eth9/5"],
+                    "4x100G": ["Eth9/1", "Eth9/3", "Eth9/5", "Eth9/7"],
+                    "1x100G(2)": ["Eth9/1"],
+                    "1x100G(4)": ["Eth9/1"],
+                    "1x40G(4)": ["Eth9/1"],
+                    "4x25G(4)": ["Eth9/1", "Eth9/2", "Eth9/3", "Eth9/4"],
+                    "4x10G(4)": ["Eth9/1", "Eth9/2", "Eth9/3", "Eth9/4"]
+            }
+        },
+        "Ethernet72": {
+            "index": "10,10,10,10,10,10,10,10",
+            "lanes": "9,10,11,12,13,14,15,16",
+            "breakout_modes": {
+                    "1x400G": ["Eth10/1"],
+                    "2x100G": ["Eth10/1", "Eth10/5"],
+                    "2x40G": ["Eth10/1", "Eth10/5"],
+                    "4x100G": ["Eth10/1", "Eth10/3", "Eth10/5", "Eth10/7"],
+                    "1x100G(2)": ["Eth10/1"],
+                    "1x100G(4)": ["Eth10/1"],
+                    "1x40G(4)": ["Eth10/1"],
+                    "4x25G(4)": ["Eth10/1", "Eth10/2", "Eth10/3", "Eth10/4"],
+                    "4x10G(4)": ["Eth10/1", "Eth10/2", "Eth10/3", "Eth10/4"]
+            }
+        },
+        "Ethernet80": {
+            "index": "11,11,11,11,11,11,11,11",
+            "lanes": "17,18,19,20,21,22,23,24",
+            "breakout_modes": {
+                    "1x400G": ["Eth11/1"],
+                    "2x100G": ["Eth11/1", "Eth11/5"],
+                    "2x40G": ["Eth11/1", "Eth11/5"],
+                    "4x100G": ["Eth11/1", "Eth11/3", "Eth11/5", "Eth11/7"],
+                    "1x100G(2)": ["Eth11/1"],
+                    "1x100G(4)": ["Eth11/1"],
+                    "1x40G(4)": ["Eth11/1"],
+                    "4x25G(4)": ["Eth11/1", "Eth11/2", "Eth11/3", "Eth11/4"],
+                    "4x10G(4)": ["Eth11/1", "Eth11/2", "Eth11/3", "Eth11/4"]
+            }
+        },
+        "Ethernet88": {
+            "index": "12,12,12,12,12,12,12,12",
+            "lanes": "25,26,27,28,29,30,31,32",
+            "breakout_modes": {
+                    "1x400G": ["Eth12/1"],
+                    "2x100G": ["Eth12/1", "Eth12/5"],
+                    "2x40G": ["Eth12/1", "Eth12/5"],
+                    "4x100G": ["Eth12/1", "Eth12/3", "Eth12/5", "Eth12/7"],
+                    "1x100G(2)": ["Eth12/1"],
+                    "1x100G(4)": ["Eth12/1"],
+                    "1x40G(4)": ["Eth12/1"],
+                    "4x25G(4)": ["Eth12/1", "Eth12/2", "Eth12/3", "Eth12/4"],
+                    "4x10G(4)": ["Eth12/1", "Eth12/2", "Eth12/3", "Eth12/4"]
+            }
+        },
+        "Ethernet96": {
+            "index": "13,13,13,13,13,13,13,13",
+            "lanes": "97,98,99,100,101,102,103,104",
+            "breakout_modes": {
+                    "1x400G": ["Eth13/1"],
+                    "2x100G": ["Eth13/1", "Eth13/5"],
+                    "2x40G": ["Eth13/1", "Eth13/5"],
+                    "4x100G": ["Eth13/1", "Eth13/3", "Eth13/5", "Eth13/7"],
+                    "1x100G(2)": ["Eth13/1"],
+                    "1x100G(4)": ["Eth13/1"],
+                    "1x40G(4)": ["Eth13/1"],
+                    "4x25G(4)": ["Eth13/1", "Eth13/2", "Eth13/3", "Eth13/4"],
+                    "4x10G(4)": ["Eth13/1", "Eth13/2", "Eth13/3", "Eth13/4"]
+            }
+        },
+        "Ethernet104": {
+            "index": "14,14,14,14,14,14,14,14",
+            "lanes": "105,106,107,108,109,110,111,112",
+            "breakout_modes": {
+                    "1x400G": ["Eth14/1"],
+                    "2x100G": ["Eth14/1", "Eth14/5"],
+                    "2x40G": ["Eth14/1", "Eth14/5"],
+                    "4x100G": ["Eth14/1", "Eth14/3", "Eth14/5", "Eth14/7"],
+                    "1x100G(2)": ["Eth14/1"],
+                    "1x100G(4)": ["Eth14/1"],
+                    "1x40G(4)": ["Eth14/1"],
+                    "4x25G(4)": ["Eth14/1", "Eth14/2", "Eth14/3", "Eth14/4"],
+                    "4x10G(4)": ["Eth14/1", "Eth14/2", "Eth14/3", "Eth14/4"]
+            }
+        },
+        "Ethernet112": {
+            "index": "15,15,15,15,15,15,15,15",
+            "lanes": "113,114,115,116,117,118,119,120",
+            "breakout_modes": {
+                    "1x400G": ["Eth15/1"],
+                    "2x100G": ["Eth15/1", "Eth15/5"],
+                    "2x40G": ["Eth15/1", "Eth15/5"],
+                    "4x100G": ["Eth15/1", "Eth15/3", "Eth15/5", "Eth15/7"],
+                    "1x100G(2)": ["Eth15/1"],
+                    "1x100G(4)": ["Eth15/1"],
+                    "1x40G(4)": ["Eth15/1"],
+                    "4x25G(4)": ["Eth15/1", "Eth15/2", "Eth15/3", "Eth15/4"],
+                    "4x10G(4)": ["Eth15/1", "Eth15/2", "Eth15/3", "Eth15/4"]
+            }
+        },
+        "Ethernet120": {
+            "index": "16,16,16,16,16,16,16,16",
+            "lanes": "121,122,123,124,125,126,127,128",
+            "breakout_modes": {
+                    "1x400G": ["Eth16/1"],
+                    "2x100G": ["Eth16/1", "Eth16/5"],
+                    "2x40G": ["Eth16/1", "Eth16/5"],
+                    "4x100G": ["Eth16/1", "Eth16/3", "Eth16/5", "Eth16/7"],
+                    "1x100G(2)": ["Eth16/1"],
+                    "1x100G(4)": ["Eth16/1"],
+                    "1x40G(4)": ["Eth16/1"],
+                    "4x25G(4)": ["Eth16/1", "Eth16/2", "Eth16/3", "Eth16/4"],
+                    "4x10G(4)": ["Eth16/1", "Eth16/2", "Eth16/3", "Eth16/4"]
+            }
+        },
+        "Ethernet128": {
+            "index": "17,17,17,17,17,17,17,17",
+            "lanes": "129,130,131,132,133,134,135,136",
+            "breakout_modes": {
+                    "1x400G": ["Eth17/1"],
+                    "2x100G": ["Eth17/1", "Eth17/5"],
+                    "2x40G": ["Eth17/1", "Eth17/5"],
+                    "4x100G": ["Eth17/1", "Eth17/3", "Eth17/5", "Eth17/7"],
+                    "1x100G(2)": ["Eth17/1"],
+                    "1x100G(4)": ["Eth17/1"],
+                    "1x40G(4)": ["Eth17/1"],
+                    "4x25G(4)": ["Eth17/1", "Eth17/2", "Eth17/3", "Eth17/4"],
+                    "4x10G(4)": ["Eth17/1", "Eth17/2", "Eth17/3", "Eth17/4"]
+            }
+        },
+        "Ethernet136": {
+            "index": "18,18,18,18,18,18,18,18",
+            "lanes": "137,138,139,140,141,142,143,144",
+            "breakout_modes": {
+                    "1x400G": ["Eth18/1"],
+                    "2x100G": ["Eth18/1", "Eth18/5"],
+                    "2x40G": ["Eth18/1", "Eth18/5"],
+                    "4x100G": ["Eth18/1", "Eth18/3", "Eth18/5", "Eth18/7"],
+                    "1x100G(2)": ["Eth18/1"],
+                    "1x100G(4)": ["Eth18/1"],
+                    "1x40G(4)": ["Eth18/1"],
+                    "4x25G(4)": ["Eth18/1", "Eth18/2", "Eth18/3", "Eth18/4"],
+                    "4x10G(4)": ["Eth18/1", "Eth18/2", "Eth18/3", "Eth18/4"]
+            }
+        },
+        "Ethernet144": {
+            "index": "19,19,19,19,19,19,19,19",
+            "lanes": "145,146,147,148,149,150,151,152",
+            "breakout_modes": {
+                    "1x400G": ["Eth19/1"],
+                    "2x100G": ["Eth19/1", "Eth19/5"],
+                    "2x40G": ["Eth19/1", "Eth19/5"],
+                    "4x100G": ["Eth19/1", "Eth19/3", "Eth19/5", "Eth19/7"],
+                    "1x100G(2)": ["Eth19/1"],
+                    "1x100G(4)": ["Eth19/1"],
+                    "1x40G(4)": ["Eth19/1"],
+                    "4x25G(4)": ["Eth19/1", "Eth19/2", "Eth19/3", "Eth19/4"],
+                    "4x10G(4)": ["Eth19/1", "Eth19/2", "Eth19/3", "Eth19/4"]
+            }
+        },
+        "Ethernet152": {
+            "index": "20,20,20,20,20,20,20,20",
+            "lanes": "153,154,155,156,157,158,159,160",
+            "breakout_modes": {
+                    "1x400G": ["Eth20/1"],
+                    "2x100G": ["Eth20/1", "Eth20/5"],
+                    "2x40G": ["Eth20/1", "Eth20/5"],
+                    "4x100G": ["Eth20/1", "Eth20/3", "Eth20/5", "Eth20/7"],
+                    "1x100G(2)": ["Eth20/1"],
+                    "1x100G(4)": ["Eth20/1"],
+                    "1x40G(4)": ["Eth20/1"],
+                    "4x25G(4)": ["Eth20/1", "Eth20/2", "Eth20/3", "Eth20/4"],
+                    "4x10G(4)": ["Eth20/1", "Eth20/2", "Eth20/3", "Eth20/4"]
+            }
+        },
+        "Ethernet160": {
+            "index": "21,21,21,21,21,21,21,21",
+            "lanes": "225,226,227,228,229,230,231,232",
+            "breakout_modes": {
+                    "1x400G": ["Eth21/1"],
+                    "2x100G": ["Eth21/1", "Eth21/5"],
+                    "2x40G": ["Eth21/1", "Eth21/5"],
+                    "4x100G": ["Eth21/1", "Eth21/3", "Eth21/5", "Eth21/7"],
+                    "1x100G(2)": ["Eth21/1"],
+                    "1x100G(4)": ["Eth21/1"],
+                    "1x40G(4)": ["Eth21/1"],
+                    "4x25G(4)": ["Eth21/1", "Eth21/2", "Eth21/3", "Eth21/4"],
+                    "4x10G(4)": ["Eth21/1", "Eth21/2", "Eth21/3", "Eth21/4"]
+            }
+        },
+        "Ethernet168": {
+            "index": "22,22,22,22,22,22,22,22",
+            "lanes": "233,234,235,236,237,238,239,240",
+            "breakout_modes": {
+                    "1x400G": ["Eth22/1"],
+                    "2x100G": ["Eth22/1", "Eth22/5"],
+                    "2x40G": ["Eth22/1", "Eth22/5"],
+                    "4x100G": ["Eth22/1", "Eth22/3", "Eth22/5", "Eth22/7"],
+                    "1x100G(2)": ["Eth22/1"],
+                    "1x100G(4)": ["Eth22/1"],
+                    "1x40G(4)": ["Eth22/1"],
+                    "4x25G(4)": ["Eth22/1", "Eth22/2", "Eth22/3", "Eth22/4"],
+                    "4x10G(4)": ["Eth22/1", "Eth22/2", "Eth22/3", "Eth22/4"]
+            }
+        },
+        "Ethernet176": {
+            "index": "23,23,23,23,23,23,23,23",
+            "lanes": "241,242,243,244,245,246,247,248",
+            "breakout_modes": {
+                    "1x400G": ["Eth23/1"],
+                    "2x100G": ["Eth23/1", "Eth23/5"],
+                    "2x40G": ["Eth23/1", "Eth23/5"],
+                    "4x100G": ["Eth23/1", "Eth23/3", "Eth23/5", "Eth23/7"],
+                    "1x100G(2)": ["Eth23/1"],
+                    "1x100G(4)": ["Eth23/1"],
+                    "1x40G(4)": ["Eth23/1"],
+                    "4x25G(4)": ["Eth23/1", "Eth23/2", "Eth23/3", "Eth23/4"],
+                    "4x10G(4)": ["Eth23/1", "Eth23/2", "Eth23/3", "Eth23/4"]
+            }
+        },
+        "Ethernet184": {
+            "index": "24,24,24,24,24,24,24,24",
+            "lanes": "249,250,251,252,253,254,255,256",
+            "breakout_modes": {
+                    "1x400G": ["Eth24/1"],
+                    "2x100G": ["Eth24/1", "Eth24/5"],
+                    "2x40G": ["Eth24/1", "Eth24/5"],
+                    "4x100G": ["Eth24/1", "Eth24/3", "Eth24/5", "Eth24/7"],
+                    "1x100G(2)": ["Eth24/1"],
+                    "1x100G(4)": ["Eth24/1"],
+                    "1x40G(4)": ["Eth24/1"],
+                    "4x25G(4)": ["Eth24/1", "Eth24/2", "Eth24/3", "Eth24/4"],
+                    "4x10G(4)": ["Eth24/1", "Eth24/2", "Eth24/3", "Eth24/4"]
+            }
+        },
+        "Ethernet192": {
+            "index": "25,25,25,25,25,25,25,25",
+            "lanes": "161,162,163,164,165,166,167,168",
+            "breakout_modes": {
+                    "1x400G": ["Eth25/1"],
+                    "2x100G": ["Eth25/1", "Eth25/5"],
+                    "2x40G": ["Eth25/1", "Eth25/5"],
+                    "4x100G": ["Eth25/1", "Eth25/3", "Eth25/5", "Eth25/7"],
+                    "1x100G(2)": ["Eth25/1"],
+                    "1x100G(4)": ["Eth25/1"],
+                    "1x40G(4)": ["Eth25/1"],
+                    "4x25G(4)": ["Eth25/1", "Eth25/2", "Eth25/3", "Eth25/4"],
+                    "4x10G(4)": ["Eth25/1", "Eth25/2", "Eth25/3", "Eth25/4"]
+            }
+        },
+        "Ethernet200": {
+            "index": "26,26,26,26,26,26,26,26",
+            "lanes": "169,170,171,172,173,174,175,176",
+            "breakout_modes": {
+                    "1x400G": ["Eth26/1"],
+                    "2x100G": ["Eth26/1", "Eth26/5"],
+                    "2x40G": ["Eth26/1", "Eth26/5"],
+                    "4x100G": ["Eth26/1", "Eth26/3", "Eth26/5", "Eth26/7"],
+                    "1x100G(2)": ["Eth26/1"],
+                    "1x100G(4)": ["Eth26/1"],
+                    "1x40G(4)": ["Eth26/1"],
+                    "4x25G(4)": ["Eth26/1", "Eth26/2", "Eth26/3", "Eth26/4"],
+                    "4x10G(4)": ["Eth26/1", "Eth26/2", "Eth26/3", "Eth26/4"]
+            }
+        },
+        "Ethernet208": {
+            "index": "27,27,27,27,27,27,27,27",
+            "lanes": "177,178,179,180,181,182,183,184",
+            "breakout_modes": {
+                    "1x400G": ["Eth27/1"],
+                    "2x100G": ["Eth27/1", "Eth27/5"],
+                    "2x40G": ["Eth27/1", "Eth27/5"],
+                    "4x100G": ["Eth27/1", "Eth27/3", "Eth27/5", "Eth27/7"],
+                    "1x100G(2)": ["Eth27/1"],
+                    "1x100G(4)": ["Eth27/1"],
+                    "1x40G(4)": ["Eth27/1"],
+                    "4x25G(4)": ["Eth27/1", "Eth27/2", "Eth27/3", "Eth27/4"],
+                    "4x10G(4)": ["Eth27/1", "Eth27/2", "Eth27/3", "Eth27/4"]
+            }
+        },
+        "Ethernet216": {
+            "index": "28,28,28,28,28,28,28,28",
+            "lanes": "185,186,187,188,189,190,191,192",
+            "breakout_modes": {
+                    "1x400G": ["Eth28/1"],
+                    "2x100G": ["Eth28/1", "Eth28/5"],
+                    "2x40G": ["Eth28/1", "Eth28/5"],
+                    "4x100G": ["Eth28/1", "Eth28/3", "Eth28/5", "Eth28/7"],
+                    "1x100G(2)": ["Eth28/1"],
+                    "1x100G(4)": ["Eth28/1"],
+                    "1x40G(4)": ["Eth28/1"],
+                    "4x25G(4)": ["Eth28/1", "Eth28/2", "Eth28/3", "Eth28/4"],
+                    "4x10G(4)": ["Eth28/1", "Eth28/2", "Eth28/3", "Eth28/4"]
+            }
+        },
+        "Ethernet224": {
+            "index": "29,29,29,29,29,29,29,29",
+            "lanes": "193,194,195,196,197,198,199,200",
+            "breakout_modes": {
+                    "1x400G": ["Eth29/1"],
+                    "2x100G": ["Eth29/1", "Eth29/5"],
+                    "2x40G": ["Eth29/1", "Eth29/5"],
+                    "4x100G": ["Eth29/1", "Eth29/3", "Eth29/5", "Eth29/7"],
+                    "1x100G(2)": ["Eth29/1"],
+                    "1x100G(4)": ["Eth29/1"],
+                    "1x40G(4)": ["Eth29/1"],
+                    "4x25G(4)": ["Eth29/1", "Eth29/2", "Eth29/3", "Eth29/4"],
+                    "4x10G(4)": ["Eth29/1", "Eth29/2", "Eth29/3", "Eth29/4"]
+            }
+        },
+        "Ethernet232": {
+            "index": "30,30,30,30,30,30,30,30",
+            "lanes": "201,202,203,204,205,206,207,208",
+            "breakout_modes": {
+                    "1x400G": ["Eth30/1"],
+                    "2x100G": ["Eth30/1", "Eth30/5"],
+                    "2x40G": ["Eth30/1", "Eth30/5"],
+                    "4x100G": ["Eth30/1", "Eth30/3", "Eth30/5", "Eth30/7"],
+                    "1x100G(2)": ["Eth30/1"],
+                    "1x100G(4)": ["Eth30/1"],
+                    "1x40G(4)": ["Eth30/1"],
+                    "4x25G(4)": ["Eth30/1", "Eth30/2", "Eth30/3", "Eth30/4"],
+                    "4x10G(4)": ["Eth30/1", "Eth30/2", "Eth30/3", "Eth30/4"]
+            }
+        },
+        "Ethernet240": {
+            "index": "31,31,31,31,31,31,31,31",
+            "lanes": "209,210,211,212,213,214,215,216",
+            "breakout_modes": {
+                    "1x400G": ["Eth31/1"],
+                    "2x100G": ["Eth31/1", "Eth31/5"],
+                    "2x40G": ["Eth31/1", "Eth31/5"],
+                    "4x100G": ["Eth31/1", "Eth31/3", "Eth31/5", "Eth31/7"],
+                    "1x100G(2)": ["Eth31/1"],
+                    "1x100G(4)": ["Eth31/1"],
+                    "1x40G(4)": ["Eth31/1"],
+                    "4x25G(4)": ["Eth31/1", "Eth31/2", "Eth31/3", "Eth31/4"],
+                    "4x10G(4)": ["Eth31/1", "Eth31/2", "Eth31/3", "Eth31/4"]
+            }
+        },
+        "Ethernet248": {
+            "index": "32,32,32,32,32,32,32,32",
+            "lanes": "217,218,219,220,221,222,223,224",
+            "breakout_modes": {
+                    "1x400G": ["Eth32/1"],
+                    "2x100G": ["Eth32/1", "Eth32/5"],
+                    "2x40G": ["Eth32/1", "Eth32/5"],
+                    "4x100G": ["Eth32/1", "Eth32/3", "Eth32/5", "Eth32/7"],
+                    "1x100G(2)": ["Eth32/1"],
+                    "1x100G(4)": ["Eth32/1"],
+                    "1x40G(4)": ["Eth32/1"],
+                    "4x25G(4)": ["Eth32/1", "Eth32/2", "Eth32/3", "Eth32/4"],
+                    "4x10G(4)": ["Eth32/1", "Eth32/2", "Eth32/3", "Eth32/4"]
+            }
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_silverstone-r0/platform_components.json b/device/celestica/x86_64-cel_silverstone-r0/platform_components.json
new file mode 100644
index 000000000000..9713fd620c27
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone-r0/platform_components.json
@@ -0,0 +1,18 @@
+{
+    "chassis": {
+        "Silverstone": {
+            "component": {
+                "BIOS": {},
+                "ONIE": {},
+                "BMC": {},
+                "FPGA": {},
+                "CPLD COMe": {},
+                "CPLD BASE": {},
+                "CPLD SW1": {},
+                "CPLD SW2": {},
+                "CPLD FAN": {},
+                "SSD": {}
+            }
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_silverstone-r0/platform_reboot b/device/celestica/x86_64-cel_silverstone-r0/platform_reboot
new file mode 100755
index 000000000000..0c84c4d7f536
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone-r0/platform_reboot
@@ -0,0 +1,6 @@
+#!/bin/bash
+
+# Set all LEDs to BMC's control
+ipmitool raw 0x3a 0x09 0x02 0x01 &> /dev/null
+
+/usr/local/bin/silverstone_platform_shutdown.sh system
diff --git a/device/celestica/x86_64-cel_silverstone-r0/plugins/psuutil.py b/device/celestica/x86_64-cel_silverstone-r0/plugins/psuutil.py
index 46684aae0f22..ea2f8cfca969 100644
--- a/device/celestica/x86_64-cel_silverstone-r0/plugins/psuutil.py
+++ b/device/celestica/x86_64-cel_silverstone-r0/plugins/psuutil.py
@@ -1,6 +1,7 @@
 import subprocess
 import sys
 import re
+import os
 
 try:
     from sonic_psu.psu_base import PsuBase
@@ -11,8 +12,19 @@
 class PsuUtil(PsuBase):
     """Platform-specific PSUutil class"""
 
+    __IPMI_BASE_COMMAND = ["ipmitool", "raw", "0x04", "0x2d"]
+    __IPMI_CONTAINER_PREFIX = ["docker", "exec", "-ti", "pmon"]
+
+    def __container_prefix(self, cmdlist):
+        # If running inside container, nothing to prefix. Else, prefix container
+        # invocation.
+        if os.environ.get("CONTAINER_NAME") != None:
+            return cmdlist
+
+        return self.__IPMI_CONTAINER_PREFIX + cmdlist
+
     def __init__(self):
-        self.ipmi_raw = ["docker", "exec", "-ti", "pmon", "ipmitool", "raw", "0x4", "0x2d", ""]
+        self.ipmi_raw = self.__container_prefix(self.__IPMI_BASE_COMMAND)
         self.psu1_id = "0x2f"
         self.psu2_id = "0x39"
         PsuBase.__init__(self)
@@ -51,8 +63,7 @@ def get_psu_status(self, index):
             return False
 
         psu_id = self.psu1_id if index == 1 else self.psu2_id
-        self.ipmi_raw[8] = psu_id
-        res_string = self.run_command(self.ipmi_raw)
+        res_string = self.run_command(self.ipmi_raw + [psu_id])
         status_byte = self.find_value(res_string)
 
         if status_byte is None:
@@ -76,8 +87,7 @@ def get_psu_presence(self, index):
             return False
 
         psu_id = self.psu1_id if index == 1 else self.psu2_id
-        self.ipmi_raw[8] = psu_id
-        res_string = self.run_command(self.ipmi_raw)
+        res_string = self.run_command(self.ipmi_raw + [psu_id])
         status_byte = self.find_value(res_string)
 
         if status_byte is None:
diff --git a/device/celestica/x86_64-cel_silverstone-r0/pmon_daemon_control.json b/device/celestica/x86_64-cel_silverstone-r0/pmon_daemon_control.json
index 94592fa8cebc..f5b2736b13e0 100644
--- a/device/celestica/x86_64-cel_silverstone-r0/pmon_daemon_control.json
+++ b/device/celestica/x86_64-cel_silverstone-r0/pmon_daemon_control.json
@@ -1,3 +1,5 @@
 {
-    "skip_ledd": true
+    "skip_ledd": true,
+    "skip_fancontrol": true,
+    "skip_xcvrd_cmis_mgr": true
 }
diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/__init__.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/__init__.py
deleted file mode 100644
index d82f3749319c..000000000000
--- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/__init__.py
+++ /dev/null
@@ -1,2 +0,0 @@
-__all__ = ["platform", "chassis"]
-from sonic_platform import *
diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/chassis.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/chassis.py
deleted file mode 100644
index b6f77cbd3dc9..000000000000
--- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/chassis.py
+++ /dev/null
@@ -1,131 +0,0 @@
-#############################################################################
-# Celestica
-#
-# Module contains an implementation of SONiC Platform Base API and
-# provides the Chassis information which are available in the platform
-#
-#############################################################################
-
-import sys
-import re
-import os
-import subprocess
-import json
-
-try:
-    from sonic_platform_base.chassis_base import ChassisBase
-    from sonic_platform.component import Component
-    from sonic_platform.eeprom import Tlv
-    from sonic_platform.fan import Fan
-    from sonic_platform.sfp import Sfp
-    from sonic_platform.psu import Psu
-    from sonic_platform.thermal import Thermal
-    from .helper import APIHelper
-except ImportError as e:
-    raise ImportError(str(e) + "- required module not found")
-
-NUM_FAN_TRAY = 7
-NUM_FAN = 2
-NUM_PSU = 2
-NUM_THERMAL = 10
-NUM_SFP = 32
-NUM_COMPONENT = 5
-
-IPMI_OEM_NETFN = "0x3A"
-IPMI_GET_REBOOT_CAUSE = "0x03 0x00 0x01 0x06"
-
-
-class Chassis(ChassisBase):
-    """Platform-specific Chassis class"""
-
-    def __init__(self):
-        self.config_data = {}
-        ChassisBase.__init__(self)
-        self._eeprom = Tlv()
-        self._api_helper = APIHelper()
-
-        for fant_index in range(0, NUM_FAN_TRAY):
-            for fan_index in range(0, NUM_FAN):
-                fan = Fan(fant_index, fan_index)
-                self._fan_list.append(fan)
-
-        for index in range(0, NUM_SFP):
-            sfp = Sfp(index)
-            self._sfp_list.append(sfp)
-
-        for index in range(0, NUM_PSU):
-            psu = Psu(index)
-            self._psu_list.append(psu)
-        for index in range(0, NUM_COMPONENT):
-            component = Component(index)
-            self._component_list.append(component)
-        for index in range(0, NUM_THERMAL):
-            thermal = Thermal(index)
-            self._thermal_list.append(thermal)
-
-    def get_base_mac(self):
-        """
-        Retrieves the base MAC address for the chassis
-        Returns:
-            A string containing the MAC address in the format
-            'XX:XX:XX:XX:XX:XX'
-        """
-        return self._eeprom.get_mac()
-
-    def get_serial(self):
-        """
-        Retrieves the hardware serial number for the chassis
-        Returns:
-            A string containing the hardware serial number for this chassis.
-        """
-        return self._eeprom.get_serial()
-
-    def get_system_eeprom_info(self):
-        """
-        Retrieves the full content of system EEPROM information for the chassis
-        Returns:
-            A dictionary where keys are the type code defined in
-            OCP ONIE TlvInfo EEPROM format and values are their corresponding
-            values.
-        """
-        return self._eeprom.get_eeprom()
-
-    def get_reboot_cause(self):
-        """
-        Retrieves the cause of the previous reboot
-
-        Returns:
-            A tuple (string, string) where the first element is a string
-            containing the cause of the previous reboot. This string must be
-            one of the predefined strings in this class. If the first string
-            is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
-            to pass a description of the reboot cause.
-        """
-
-        status, raw_cause = self._api_helper.ipmi_raw(
-            IPMI_OEM_NETFN, IPMI_GET_REBOOT_CAUSE)
-        hx_cause = raw_cause.split()[0] if status and len(
-            raw_cause.split()) > 0 else 00
-        reboot_cause = {
-            "00": self.REBOOT_CAUSE_HARDWARE_OTHER,
-            "11": self.REBOOT_CAUSE_POWER_LOSS,
-            "22": self.REBOOT_CAUSE_NON_HARDWARE,
-            "33": self.REBOOT_CAUSE_HARDWARE_OTHER,
-            "44": self.REBOOT_CAUSE_NON_HARDWARE,
-            "55": self.REBOOT_CAUSE_NON_HARDWARE,
-            "66": self.REBOOT_CAUSE_WATCHDOG,
-            "77": self.REBOOT_CAUSE_NON_HARDWARE
-        }.get(hx_cause, self.REBOOT_CAUSE_HARDWARE_OTHER)
-
-        description = {
-            "00": "Unknown reason",
-            "11": "The last reset is Power on reset",
-            "22": "The last reset is soft-set CPU warm reset",
-            "33": "The last reset is soft-set CPU cold reset",
-            "44": "The last reset is CPU warm reset",
-            "55": "The last reset is CPU cold reset",
-            "66": "The last reset is watchdog reset",
-            "77": "The last reset is power cycle reset"
-        }.get(hx_cause, "Unknown reason")
-
-        return (reboot_cause, description)
diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/component.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/component.py
deleted file mode 100644
index ba7742c66b60..000000000000
--- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/component.py
+++ /dev/null
@@ -1,118 +0,0 @@
-#############################################################################
-# Celestica
-#
-# Component contains an implementation of SONiC Platform Base API and
-# provides the components firmware management function
-#
-#############################################################################
-
-import os.path
-
-try:
-    from sonic_platform_base.component_base import ComponentBase
-    from .helper import APIHelper
-except ImportError as e:
-    raise ImportError(str(e) + "- required module not found")
-
-COMPONENT_LIST = [
-    ("BIOS",        "Basic Input/Output System"),
-    ("BMC",         "Baseboard Management Controller"),
-    ("SWITCH_CPLD", "Switch board CPLD"),
-    ("BASE_CPLD",   "Base board CPLD"),
-    ("FPGA",        "Field-programmable gate array")
-]
-SW_CPLD_VER_PATH = "/sys/module/switch_cpld/version"
-BASE_CPLD_VER_PATH = "/sys/module/baseboard_lpc/version"
-BIOS_VER_PATH = "/sys/class/dmi/id/bios_version"
-BMC_VER_CMD1 = ["ipmitool", "mc", "info"]
-BMC_VER_CMD2 = ["grep", "Firmware Revision"]
-CFUFLASH_FW_UPGRADE_CMD = ["CFUFLASH", "-cd", "-d", "", "-mse", "3", ""]
-MEM_PCI_RESOURCE = "/sys/bus/pci/devices/0000:09:00.0/resource0"
-FPGA_VER_MEM_OFFSET = 0
-UPGRADE_OPT = {
-    'BMC': '1',
-    'BIOS': '2',
-    'SWITCH_CPLD': '4',
-    'BASE_CPLD': '4'
-}
-
-
-class Component(ComponentBase):
-    """Platform-specific Component class"""
-
-    DEVICE_TYPE = "component"
-
-    def __init__(self, component_index):
-        ComponentBase.__init__(self)
-        self.index = component_index
-        self.name = self.get_name()
-        self._api_helper = APIHelper()
-
-    def __get_bmc_ver(self):
-        bmc_ver = "Unknown"
-        status, raw_bmc_data = self._api_helper.run_command(BMC_VER_CMD1, BMC_VER_CMD2)
-        if status:
-            bmc_ver_data = raw_bmc_data.split(":")
-            bmc_ver = bmc_ver_data[-1].strip() if len(
-                bmc_ver_data) > 1 else bmc_ver
-        return bmc_ver
-
-    def __get_fpga_ver(self):
-        fpga_ver = "Unknown"
-        status, reg_val = self._api_helper.pci_get_value(
-            MEM_PCI_RESOURCE, FPGA_VER_MEM_OFFSET)
-        if status:
-            major = reg_val[0] >> 16
-            minor = int(bin(reg_val[0])[16:32], 2)
-            fpga_ver = '{}.{}'.format(major, minor)
-        return fpga_ver
-
-    def get_name(self):
-        """
-        Retrieves the name of the component
-         Returns:
-            A string containing the name of the component
-        """
-        return COMPONENT_LIST[self.index][0]
-
-    def get_description(self):
-        """
-        Retrieves the description of the component
-            Returns:
-            A string containing the description of the component
-        """
-        return COMPONENT_LIST[self.index][1]
-
-    def get_firmware_version(self):
-        """
-        Retrieves the firmware version of module
-        Returns:
-            string: The firmware versions of the module
-        """
-        fw_version = {
-            "BIOS": self._api_helper.read_txt_file(BIOS_VER_PATH),
-            "BMC": self.__get_bmc_ver(),
-            "FPGA": self.__get_fpga_ver(),
-            "SWITCH_CPLD": self._api_helper.read_txt_file(SW_CPLD_VER_PATH),
-            "BASE_CPLD": self._api_helper.read_txt_file(BASE_CPLD_VER_PATH),
-        }.get(self.name, "Unknown")
-
-        return fw_version
-
-    def install_firmware(self, image_path):
-        """
-        Install firmware to module
-        Args:
-            image_path: A string, path to firmware image
-        Returns:
-            A boolean, True if install successfully, False if not
-        """
-        CFUFLASH_FW_UPGRADE_CMD[3] = UPGRADE_OPT.get(self.name)
-        CFUFLASH_FW_UPGRADE_CMD[6] = image_path
-
-        if not os.path.isfile(image_path):
-            return False
-
-        # print(install_command)
-        status = self._api_helper.run_interactive_command(CFUFLASH_FW_UPGRADE_CMD)
-        return status
diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/eeprom.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/eeprom.py
deleted file mode 100644
index cf3f1a98de20..000000000000
--- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/eeprom.py
+++ /dev/null
@@ -1,117 +0,0 @@
-#############################################################################
-# Celestica Silverstone
-#
-# Platform and model specific eeprom subclass, inherits from the base class,
-# and provides the followings:
-# - the eeprom format definition
-# - specific encoder/decoder if there is special need
-#############################################################################
-
-try:
-    import glob
-    import os
-    import sys
-    import re
-    from array import array
-
-    if sys.version_info.major == 3:
-        from io import StringIO
-    else:
-        from cStringIO import StringIO
-
-    from sonic_platform_base.sonic_eeprom import eeprom_dts
-    from sonic_platform_base.sonic_eeprom import eeprom_tlvinfo
-except ImportError as e:
-    raise ImportError(str(e) + "- required module not found")
-
-CACHE_ROOT = '/var/cache/sonic/decode-syseeprom'
-CACHE_FILE = 'syseeprom_cache'
-TLV_EEPROM_I2C_BUS = 0
-TLV_EEPROM_I2C_ADDR = 56
-
-
-class Tlv(eeprom_tlvinfo.TlvInfoDecoder):
-
-    EEPROM_DECODE_HEADLINES = 6
-
-    def __init__(self):
-        self._eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-00{1}/eeprom".format(
-            TLV_EEPROM_I2C_BUS, TLV_EEPROM_I2C_ADDR)
-        super(Tlv, self).__init__(self._eeprom_path, 0, '', True)
-        self._eeprom = self._load_eeprom()
-
-    def __parse_output(self, decode_output):
-        decode_output.replace('\0', '')
-        lines = decode_output.split('\n')
-        lines = lines[self.EEPROM_DECODE_HEADLINES:]
-        _eeprom_info_dict = dict()
-
-        for line in lines:
-            try:
-                match = re.search(
-                    '(0x[0-9a-fA-F]{2})([\s]+[\S]+[\s]+)([\S]+)', line)
-                if match is not None:
-                    idx = match.group(1)
-                    value = match.group(3).rstrip('\0')
-
-                _eeprom_info_dict[idx] = value
-            except:
-                pass
-        return _eeprom_info_dict
-
-    def _load_eeprom(self):
-        original_stdout = sys.stdout
-        sys.stdout = StringIO()
-        try:
-            self.read_eeprom_db()
-        except:
-            decode_output = sys.stdout.getvalue()
-            sys.stdout = original_stdout
-            return self.__parse_output(decode_output)
-
-        status = self.check_status()
-        if 'ok' not in status:
-            return False
-
-        if not os.path.exists(CACHE_ROOT):
-            try:
-                os.makedirs(CACHE_ROOT)
-            except:
-                pass
-
-        #
-        # only the eeprom classes that inherit from eeprom_base
-        # support caching. Others will work normally
-        #
-        try:
-            self.set_cache_name(os.path.join(CACHE_ROOT, CACHE_FILE))
-        except:
-            pass
-
-        e = self.read_eeprom()
-        if e is None:
-            return 0
-
-        try:
-            self.update_cache(e)
-        except:
-            pass
-
-        self.decode_eeprom(e)
-        decode_output = sys.stdout.getvalue()
-        sys.stdout = original_stdout
-
-        (is_valid, valid_crc) = self.is_checksum_valid(e)
-        if not is_valid:
-            return False
-
-        return self.__parse_output(decode_output)
-
-    def get_eeprom(self):
-        return self._eeprom
-
-    def get_serial(self):
-        return self._eeprom.get('0x23', "Undefined.")
-
-    def get_mac(self):
-        return self._eeprom.get('0x24', "Undefined.")
diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/helper.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/helper.py
deleted file mode 100644
index d53de841eeee..000000000000
--- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/helper.py
+++ /dev/null
@@ -1,111 +0,0 @@
-import os
-import struct
-import subprocess
-from mmap import *
-from sonic_py_common.general import check_output_pipe
-
-HOST_CHK_CMD = ["docker"]
-EMPTY_STRING = ""
-
-
-class APIHelper():
-
-    def __init__(self):
-        pass
-
-    def is_host(self):
-        try:
-            subprocess.call(HOST_CHK_CMD, stdout=subprocess.DEVNULL, stderr=subprocess.DEVNULL)
-        except FileNotFoundError:
-            return False
-        return True
-
-    def pci_get_value(self, resource, offset):
-        status = True
-        result = ""
-        try:
-            fd = os.open(resource, os.O_RDWR)
-            mm = mmap(fd, 0)
-            mm.seek(int(offset))
-            read_data_stream = mm.read(4)
-            result = struct.unpack('I', read_data_stream)
-        except:
-            status = False
-        return status, result
-
-    def run_command(self, cmd1_args, cmd2_args):
-        status = True
-        result = ""
-        try:
-            result = check_output_pipe(cmd1_args, cmd2_args)
-        except subprocess.CalledProcessError:
-            status = False
-        return status, result
-
-    def run_interactive_command(self, cmd):
-        try:
-            subprocess.call(cmd)
-        except:
-            return False
-        return True
-
-    def read_txt_file(self, file_path):
-        try:
-            with open(file_path, 'r') as fd:
-                data = fd.read()
-                return data.strip()
-        except IOError:
-            pass
-        return None
-
-    def ipmi_raw(self, netfn, cmd):
-        status = True
-        result = ""
-        try:
-            cmd = ["ipmitool", "raw", str(netfn), str(cmd)]
-            p = subprocess.Popen(
-                cmd, universal_newlines=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
-            raw_data, err = p.communicate()
-            if err == '':
-                result = raw_data.strip()
-            else:
-                status = False
-        except:
-            status = False
-        return status, result
-
-    def ipmi_fru_id(self, id, key=None):
-        status = True
-        result = ""
-        cmd1_args = ["ipmitool", "fru", "print", str(id)]
-        if not key:
-            try:
-                p = subprocess.Popen(
-                    cmd1_args, universal_newlines=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
-                raw_data, err = p.communicate()
-                if err == '':
-                    result = raw_data.strip()
-                else:
-                    status = False
-            except:
-                status = False
-        else:
-            cmd2_args = ["grep", str(key)]
-            status, result = self.run_command(cmd1_args, cmd2_args)
-        return status, result
-
-    def ipmi_set_ss_thres(self, id, threshold_key, value):
-        status = True
-        result = ""
-        try:
-            cmd = ["ipmitool", "sensor", "thresh", str(id), str(threshold_key), str(value)]
-            p = subprocess.Popen(
-                cmd, universal_newlines=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
-            raw_data, err = p.communicate()
-            if err == '':
-                result = raw_data.strip()
-            else:
-                status = False
-        except:
-            status = False
-        return status, result
diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/psu.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/psu.py
deleted file mode 100644
index a6c805d3ca4f..000000000000
--- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/psu.py
+++ /dev/null
@@ -1,236 +0,0 @@
-#############################################################################
-# Celestica
-#
-# Module contains an implementation of SONiC Platform Base API and
-# provides the PSUs status which are available in the platform
-#
-#############################################################################
-
-import os
-import re
-import math
-import sonic_platform
-
-try:
-    from sonic_platform_base.psu_base import PsuBase
-    from .helper import APIHelper
-    from sonic_platform.fan import Fan
-except ImportError as e:
-    raise ImportError(str(e) + "- required module not found")
-
-PSU_NAME_LIST = ["PSU-1", "PSU-2"]
-PSU_NUM_FAN = [1, 1]
-
-IPMI_SENSOR_NETFN = "0x04"
-IPMI_OEM_NETFN = "0x3A"
-IPMI_SS_READ_CMD = "0x2D {}"
-IPMI_SET_PSU_LED_CMD = "0x07 0x02 {}"
-IPMI_GET_PSU_LED_CMD = "0x08 0x02"
-IPMI_FRU_MODEL_KEY = "Board Part Number"
-IPMI_FRU_SERIAL_KEY = "Board Serial"
-
-PSU_LED_OFF_CMD = "0x00"
-PSU_LED_GREEN_CMD = "0x01"
-PSU_LED_AMBER_CMD = "0x02"
-
-PSU1_FRU_ID = 3
-
-SS_READ_OFFSET = 0
-
-PSU_VOUT_SS_ID = ["0x36", "0x40"]
-PSU_COUT_SS_ID = ["0x37", "0x41"]
-PSU_POUT_SS_ID = ["0x38", "0x42"]
-PSU_STATUS_REG = ["0x39", "0x2f"]
-
-
-class Psu(PsuBase):
-    """Platform-specific Psu class"""
-
-    def __init__(self, psu_index):
-        PsuBase.__init__(self)
-        self.index = psu_index
-        for fan_index in range(0, PSU_NUM_FAN[self.index]):
-            fan = Fan(fan_index, 0, is_psu_fan=True, psu_index=self.index)
-            self._fan_list.append(fan)
-        self._api_helper = APIHelper()
-
-    def find_value(self, in_string):
-        result = re.search("^.+ ([0-9a-f]{2}) .+$", in_string)
-        return result.group(1) if result else result
-
-    def get_voltage(self):
-        """
-        Retrieves current PSU voltage output
-        Returns:
-            A float number, the output voltage in volts,
-            e.g. 12.1
-        """
-        psu_voltage = 0.0
-        psu_vout_key = PSU_VOUT_SS_ID[self.index]
-        status, raw_ss_read = self._api_helper.ipmi_raw(
-            IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(psu_vout_key))
-        ss_read = raw_ss_read.split()[SS_READ_OFFSET]
-        # Formula: Rx1x10^-1
-        psu_voltage = int(ss_read, 16) * math.pow(10, -1)
-
-        return psu_voltage
-
-    def get_current(self):
-        """
-        Retrieves present electric current supplied by PSU
-        Returns:
-            A float number, the electric current in amperes, e.g 15.4
-        """
-        psu_current = 0.0
-        psu_cout_key = PSU_COUT_SS_ID[self.index]
-        status, raw_ss_read = self._api_helper.ipmi_raw(
-            IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(psu_cout_key))
-        ss_read = raw_ss_read.split()[SS_READ_OFFSET]
-        # Formula: Rx5x10^-1
-        psu_current = int(ss_read, 16) * 5 * math.pow(10, -1)
-
-        return psu_current
-
-    def get_power(self):
-        """
-        Retrieves current energy supplied by PSU
-        Returns:
-            A float number, the power in watts, e.g. 302.6
-        """
-        psu_power = 0.0
-        psu_pout_key = PSU_POUT_SS_ID[self.index]
-        status, raw_ss_read = self._api_helper.ipmi_raw(
-            IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(psu_pout_key))
-        ss_read = raw_ss_read.split()[SS_READ_OFFSET]
-        # Formula: Rx6x10^0
-        psu_power = int(ss_read, 16) * 6
-        return psu_power
-
-    def get_powergood_status(self):
-        """
-        Retrieves the powergood status of PSU
-        Returns:
-            A boolean, True if PSU has stablized its output voltages and passed all
-            its internal self-tests, False if not.
-        """
-        return self.get_status()
-
-    def set_status_led(self, color):
-        """
-        Sets the state of the PSU status LED
-        Args:
-            color: A string representing the color with which to set the PSU status LED
-                   Note: Only support green and off
-        Returns:
-            bool: True if status LED state is set successfully, False if not
-        Note
-            Set manual
-            ipmitool raw 0x3a 0x09 0x2 0x0
-        """
-        led_cmd = {
-            self.STATUS_LED_COLOR_GREEN: PSU_LED_GREEN_CMD,
-            self.STATUS_LED_COLOR_AMBER: PSU_LED_AMBER_CMD,
-            self.STATUS_LED_COLOR_OFF: PSU_LED_OFF_CMD
-        }.get(color)
-
-        status, set_led = self._api_helper.ipmi_raw(
-            IPMI_OEM_NETFN, IPMI_SET_PSU_LED_CMD.format(led_cmd))
-        set_status_led = False if not status else True
-
-        return set_status_led
-
-    def get_status_led(self):
-        """
-        Gets the state of the PSU status LED
-        Returns:
-            A string, one of the predefined STATUS_LED_COLOR_* strings above
-        """
-        status, hx_color = self._api_helper.ipmi_raw(
-            IPMI_OEM_NETFN, IPMI_GET_PSU_LED_CMD)
-
-        status_led = {
-            "00": self.STATUS_LED_COLOR_OFF,
-            "01": self.STATUS_LED_COLOR_GREEN,
-            "02": self.STATUS_LED_COLOR_AMBER,
-        }.get(hx_color, self.STATUS_LED_COLOR_OFF)
-
-        return status_led
-
-    def get_name(self):
-        """
-        Retrieves the name of the device
-            Returns:
-            string: The name of the device
-        """
-        return PSU_NAME_LIST[self.index]
-
-    def get_presence(self):
-        """
-        Retrieves the presence of the PSU
-        Returns:
-            bool: True if PSU is present, False if not
-        """
-        psu_presence = False
-        psu_pstatus_key = PSU_STATUS_REG[self.index]
-        status, raw_status_read = self._api_helper.ipmi_raw(
-            IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(psu_pstatus_key))
-        status_byte = self.find_value(raw_status_read)
-
-        if status:
-            presence_int = (int(status_byte, 16) >> 0) & 1
-            psu_presence = True if presence_int else False
-
-        return psu_presence
-
-    def get_model(self):
-        """
-        Retrieves the model number (or part number) of the device
-        Returns:
-            string: Model/part number of device
-        """
-        model = "Unknown"
-        ipmi_fru_idx = self.index + PSU1_FRU_ID
-        status, raw_model = self._api_helper.ipmi_fru_id(
-            ipmi_fru_idx, IPMI_FRU_MODEL_KEY)
-
-        fru_pn_list = raw_model.split()
-        if len(fru_pn_list) > 4:
-            model = fru_pn_list[4]
-
-        return model
-
-    def get_serial(self):
-        """
-        Retrieves the serial number of the device
-        Returns:
-            string: Serial number of device
-        """
-        serial = "Unknown"
-        ipmi_fru_idx = self.index + PSU1_FRU_ID
-        status, raw_model = self._api_helper.ipmi_fru_id(
-            ipmi_fru_idx, IPMI_FRU_SERIAL_KEY)
-
-        fru_sr_list = raw_model.split()
-        if len(fru_sr_list) > 3:
-            serial = fru_sr_list[3]
-
-        return serial
-
-    def get_status(self):
-        """
-        Retrieves the operational status of the device
-        Returns:
-            A boolean value, True if device is operating properly, False if not
-        """
-        psu_status = False
-        psu_pstatus_key = PSU_STATUS_REG[self.index]
-        status, raw_status_read = self._api_helper.ipmi_raw(
-            IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(psu_pstatus_key))
-        status_byte = self.find_value(raw_status_read)
-
-        if status:
-            failure_detected = (int(status_byte, 16) >> 1) & 1
-            input_lost = (int(status_byte, 16) >> 3) & 1
-            psu_status = False if (input_lost or failure_detected) else True
-
-        return psu_status
diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/sfp.py b/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/sfp.py
deleted file mode 100644
index 4ad97b42fff3..000000000000
--- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/sfp.py
+++ /dev/null
@@ -1,1467 +0,0 @@
-#############################################################################
-# Celestica
-#
-# Sfp contains an implementation of SONiC Platform Base API and
-# provides the sfp device status which are available in the platform
-#
-#############################################################################
-
-import time
-import subprocess
-from ctypes import create_string_buffer
-
-try:
-    from sonic_platform_base.sfp_base import SfpBase
-    from sonic_platform_base.sonic_eeprom import eeprom_dts
-    from sonic_platform_base.sonic_sfp.sff8472 import sff8472InterfaceId
-    from sonic_platform_base.sonic_sfp.sff8472 import sff8472Dom
-    from sonic_platform_base.sonic_sfp.sff8436 import sff8436InterfaceId
-    from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom
-    from sonic_platform_base.sonic_sfp.inf8628 import inf8628InterfaceId
-    from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper
-except ImportError as e:
-    raise ImportError(str(e) + "- required module not found")
-
-INFO_OFFSET = 128
-DOM_OFFSET = 0
-
-# definitions of the offset and width for values in XCVR info eeprom
-XCVR_INTFACE_BULK_OFFSET = 0
-XCVR_INTFACE_BULK_WIDTH_QSFP = 20
-XCVR_INTFACE_BULK_WIDTH_SFP = 21
-XCVR_TYPE_OFFSET = 0
-XCVR_TYPE_WIDTH = 1
-XCVR_EXT_TYPE_OFFSET = 1
-XCVR_EXT_TYPE_WIDTH = 1
-XCVR_CONNECTOR_OFFSET = 2
-XCVR_CONNECTOR_WIDTH = 1
-XCVR_COMPLIANCE_CODE_OFFSET = 3
-XCVR_COMPLIANCE_CODE_WIDTH = 8
-XCVR_ENCODING_OFFSET = 11
-XCVR_ENCODING_WIDTH = 1
-XCVR_NBR_OFFSET = 12
-XCVR_NBR_WIDTH = 1
-XCVR_EXT_RATE_SEL_OFFSET = 13
-XCVR_EXT_RATE_SEL_WIDTH = 1
-XCVR_CABLE_LENGTH_OFFSET = 14
-XCVR_CABLE_LENGTH_WIDTH_QSFP = 5
-XCVR_CABLE_LENGTH_WIDTH_SFP = 6
-XCVR_VENDOR_NAME_OFFSET = 20
-XCVR_VENDOR_NAME_WIDTH = 16
-XCVR_VENDOR_OUI_OFFSET = 37
-XCVR_VENDOR_OUI_WIDTH = 3
-XCVR_VENDOR_PN_OFFSET = 40
-XCVR_VENDOR_PN_WIDTH = 16
-XCVR_HW_REV_OFFSET = 56
-XCVR_HW_REV_WIDTH_OSFP = 2
-XCVR_HW_REV_WIDTH_QSFP = 2
-XCVR_HW_REV_WIDTH_SFP = 4
-XCVR_VENDOR_SN_OFFSET = 68
-XCVR_VENDOR_SN_WIDTH = 16
-XCVR_VENDOR_DATE_OFFSET = 84
-XCVR_VENDOR_DATE_WIDTH = 8
-XCVR_DOM_CAPABILITY_OFFSET = 92
-XCVR_DOM_CAPABILITY_WIDTH = 2
-
-XCVR_INTERFACE_DATA_START = 0
-XCVR_INTERFACE_DATA_SIZE = 92
-
-QSFP_DOM_BULK_DATA_START = 22
-QSFP_DOM_BULK_DATA_SIZE = 36
-SFP_DOM_BULK_DATA_START = 96
-SFP_DOM_BULK_DATA_SIZE = 10
-
-# definitions of the offset for values in OSFP info eeprom
-OSFP_TYPE_OFFSET = 0
-OSFP_VENDOR_NAME_OFFSET = 129
-OSFP_VENDOR_PN_OFFSET = 148
-OSFP_HW_REV_OFFSET = 164
-OSFP_VENDOR_SN_OFFSET = 166
-
-# Offset for values in QSFP eeprom
-QSFP_DOM_REV_OFFSET = 1
-QSFP_DOM_REV_WIDTH = 1
-QSFP_TEMPE_OFFSET = 22
-QSFP_TEMPE_WIDTH = 2
-QSFP_VOLT_OFFSET = 26
-QSFP_VOLT_WIDTH = 2
-QSFP_VERSION_COMPLIANCE_OFFSET = 1
-QSFP_VERSION_COMPLIANCE_WIDTH = 2
-QSFP_CHANNL_MON_OFFSET = 34
-QSFP_CHANNL_MON_WIDTH = 16
-QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH = 24
-QSFP_CHANNL_DISABLE_STATUS_OFFSET = 86
-QSFP_CHANNL_DISABLE_STATUS_WIDTH = 1
-QSFP_CHANNL_RX_LOS_STATUS_OFFSET = 3
-QSFP_CHANNL_RX_LOS_STATUS_WIDTH = 1
-QSFP_CHANNL_TX_FAULT_STATUS_OFFSET = 4
-QSFP_CHANNL_TX_FAULT_STATUS_WIDTH = 1
-QSFP_CONTROL_OFFSET = 86
-QSFP_CONTROL_WIDTH = 8
-QSFP_MODULE_MONITOR_OFFSET = 0
-QSFP_MODULE_MONITOR_WIDTH = 9
-QSFP_POWEROVERRIDE_OFFSET = 93
-QSFP_POWEROVERRIDE_WIDTH = 1
-QSFP_POWEROVERRIDE_BIT = 0
-QSFP_POWERSET_BIT = 1
-QSFP_OPTION_VALUE_OFFSET = 192
-QSFP_OPTION_VALUE_WIDTH = 4
-QSFP_MODULE_UPPER_PAGE3_START = 384
-QSFP_MODULE_THRESHOLD_OFFSET = 128
-QSFP_MODULE_THRESHOLD_WIDTH = 24
-QSFP_CHANNL_THRESHOLD_OFFSET = 176
-QSFP_CHANNL_THRESHOLD_WIDTH = 24
-
-SFP_MODULE_ADDRA2_OFFSET = 256
-SFP_MODULE_THRESHOLD_OFFSET = 0
-SFP_MODULE_THRESHOLD_WIDTH = 56
-SFP_CHANNL_THRESHOLD_OFFSET = 112
-SFP_CHANNL_THRESHOLD_WIDTH = 2
-
-SFP_TEMPE_OFFSET = 96
-SFP_TEMPE_WIDTH = 2
-SFP_VOLT_OFFSET = 98
-SFP_VOLT_WIDTH = 2
-SFP_CHANNL_MON_OFFSET = 100
-SFP_CHANNL_MON_WIDTH = 6
-SFP_CHANNL_STATUS_OFFSET = 110
-SFP_CHANNL_STATUS_WIDTH = 1
-
-
-qsfp_cable_length_tup = ('Length(km)', 'Length OM3(2m)',
-                         'Length OM2(m)', 'Length OM1(m)',
-                         'Length Cable Assembly(m)')
-
-sfp_cable_length_tup = ('LengthSMFkm-UnitsOfKm', 'LengthSMF(UnitsOf100m)',
-                        'Length50um(UnitsOf10m)', 'Length62.5um(UnitsOfm)',
-                        'LengthCable(UnitsOfm)', 'LengthOM3(UnitsOf10m)')
-
-sfp_compliance_code_tup = ('10GEthernetComplianceCode', 'InfinibandComplianceCode',
-                           'ESCONComplianceCodes', 'SONETComplianceCodes',
-                           'EthernetComplianceCodes', 'FibreChannelLinkLength',
-                           'FibreChannelTechnology', 'SFP+CableTechnology',
-                           'FibreChannelTransmissionMedia', 'FibreChannelSpeed')
-
-qsfp_compliance_code_tup = ('10/40G Ethernet Compliance Code', 'SONET Compliance codes',
-                            'SAS/SATA compliance codes', 'Gigabit Ethernet Compliant codes',
-                            'Fibre Channel link length/Transmitter Technology',
-                            'Fibre Channel transmission media', 'Fibre Channel Speed')
-
-SFP_TYPE = "SFP"
-QSFP_TYPE = "QSFP"
-OSFP_TYPE = "OSFP"
-
-PORT_START = 1
-PORT_END = 34
-OSFP_PORT_START = 1
-OSFP_PORT_END = 32
-SFP_PORT_START = 33
-SFP_PORT_END = 34
-
-PORT_INFO_PATH = '/sys/devices/platform/cls-xcvr'
-
-
-class Sfp(SfpBase):
-    """Platform-specific Sfp class"""
-
-    # Path to QSFP sysfs
-    PLATFORM_ROOT_PATH = "/usr/share/sonic/device"
-    PMON_HWSKU_PATH = "/usr/share/sonic/hwsku"
-    HOST_CHK_CMD = ["docker"]
-
-    PLATFORM = "x86_64-cel_silverstone-r0"
-    HWSKU = "Silverstone"
-
-    def __init__(self, sfp_index):
-        SfpBase.__init__(self)
-        # Init index
-        self.index = sfp_index
-        self.port_num = self.index + 1
-        self.dom_supported = False
-        self.sfp_type, self.port_name = self.__get_sfp_info()
-
-        # Init eeprom path
-        eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'
-        self.port_to_eeprom_mapping = {}
-        self.port_to_i2c_mapping = {
-            1: 10,
-            2: 11,
-            3: 12,
-            4: 13,
-            5: 14,
-            6: 15,
-            7: 16,
-            8: 17,
-            9: 18,
-            10: 19,
-            11: 20,
-            12: 21,
-            13: 22,
-            14: 23,
-            15: 24,
-            16: 25,
-            17: 26,
-            18: 27,
-            19: 28,
-            20: 29,
-            21: 30,
-            22: 31,
-            23: 32,
-            24: 33,
-            25: 34,
-            26: 35,
-            27: 36,
-            28: 37,
-            29: 38,
-            30: 39,
-            31: 40,
-            32: 41,
-            33: 1,
-            34: 2
-        }
-
-        for x in range(PORT_START, PORT_END + 1):
-            port_eeprom_path = eeprom_path.format(self.port_to_i2c_mapping[x])
-            self.port_to_eeprom_mapping[x] = port_eeprom_path
-
-        self.info_dict_keys = ['type', 'vendor_rev', 'serial', 'manufacturer', 'model', 'connector', 'encoding', 'ext_identifier',
-                               'ext_rateselect_compliance', 'cable_type', 'cable_length', 'nominal_bit_rate', 'specification_compliance', 'vendor_date', 'vendor_oui']
-
-        self.dom_dict_keys = ['rx_los', 'tx_fault', 'reset_status', 'power_lpmode', 'tx_disable', 'tx_disable_channel', 'temperature', 'voltage',
-                              'rx1power', 'rx2power', 'rx3power', 'rx4power', 'tx1bias', 'tx2bias', 'tx3bias', 'tx4bias', 'tx1power', 'tx2power', 'tx3power', 'tx4power']
-
-        self.threshold_dict_keys = ['temphighalarm', 'temphighwarning', 'templowalarm', 'templowwarning', 'vcchighalarm', 'vcchighwarning', 'vcclowalarm', 'vcclowwarning', 'rxpowerhighalarm', 'rxpowerhighwarning',
-                                    'rxpowerlowalarm', 'rxpowerlowwarning', 'txpowerhighalarm', 'txpowerhighwarning', 'txpowerlowalarm', 'txpowerlowwarning', 'txbiashighalarm', 'txbiashighwarning', 'txbiaslowalarm', 'txbiaslowwarning']
-
-        self._dom_capability_detect()
-
-    def __get_sfp_info(self):
-        port_num = self.index + PORT_START
-        sfp_type = OSFP_PORT_START
-        port_name = "Unknown"
-
-        if port_num >= OSFP_PORT_START and port_num <= OSFP_PORT_END:
-            sfp_type = OSFP_TYPE
-            port_name = "QSFP" + str(port_num - OSFP_PORT_START + 1)
-        elif port_num >= SFP_PORT_START and port_num <= SFP_PORT_END:
-            sfp_type = SFP_TYPE
-            port_name = "SFP" + str(port_num - SFP_PORT_START + 1)
-        return sfp_type, port_name
-
-    def __convert_string_to_num(self, value_str):
-        if "-inf" in value_str:
-            return 'N/A'
-        elif "Unknown" in value_str:
-            return 'N/A'
-        elif 'dBm' in value_str:
-            t_str = value_str.rstrip('dBm')
-            return float(t_str)
-        elif 'mA' in value_str:
-            t_str = value_str.rstrip('mA')
-            return float(t_str)
-        elif 'C' in value_str:
-            t_str = value_str.rstrip('C')
-            return float(t_str)
-        elif 'Volts' in value_str:
-            t_str = value_str.rstrip('Volts')
-            return float(t_str)
-        else:
-            return 'N/A'
-
-    def __is_host(self):
-        try:
-            subprocess.call(self.HOST_CHK_CMD, stdout=subprocess.DEVNULL, stderr=subprocess.DEVNULL)
-        except FileNotFoundError:
-            return False
-        return True
-
-    def __get_path_to_port_config_file(self):
-        platform_path = "/".join([self.PLATFORM_ROOT_PATH, self.PLATFORM])
-        hwsku_path = "/".join([platform_path, self.HWSKU]
-                              ) if self.__is_host() else self.PMON_HWSKU_PATH
-        return "/".join([hwsku_path, "port_config.ini"])
-
-    def __read_eeprom_specific_bytes(self, offset, num_bytes):
-        sysfsfile_eeprom = None
-        eeprom_raw = []
-        for i in range(0, num_bytes):
-            eeprom_raw.append("0x00")
-
-        sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[self.port_num]
-        try:
-            sysfsfile_eeprom = open(
-                sysfs_sfp_i2c_client_eeprom_path, mode="rb", buffering=0)
-            sysfsfile_eeprom.seek(offset)
-            raw = sysfsfile_eeprom.read(num_bytes)
-            for n in range(0, num_bytes):
-                eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2)
-        except:
-            pass
-        finally:
-            if sysfsfile_eeprom:
-                sysfsfile_eeprom.close()
-
-        return eeprom_raw
-
-    def _dom_capability_detect(self):
-        if not self.get_presence():
-            self.dom_supported = False
-            self.dom_temp_supported = False
-            self.dom_volt_supported = False
-            self.dom_rx_power_supported = False
-            self.dom_tx_power_supported = False
-            self.calibration = 0
-            return
-
-        if self.sfp_type == "QSFP":
-            self.calibration = 1
-            sfpi_obj = sff8436InterfaceId()
-            if sfpi_obj is None:
-                self.dom_supported = False
-            offset = 128
-
-            # QSFP capability byte parse, through this byte can know whether it support tx_power or not.
-            # TODO: in the future when decided to migrate to support SFF-8636 instead of SFF-8436,
-            # need to add more code for determining the capability and version compliance
-            # in SFF-8636 dom capability definitions evolving with the versions.
-            qsfp_dom_capability_raw = self.__read_eeprom_specific_bytes(
-                (offset + XCVR_DOM_CAPABILITY_OFFSET), XCVR_DOM_CAPABILITY_WIDTH)
-            if qsfp_dom_capability_raw is not None:
-                qsfp_version_compliance_raw = self.__read_eeprom_specific_bytes(
-                    QSFP_VERSION_COMPLIANCE_OFFSET, QSFP_VERSION_COMPLIANCE_WIDTH)
-                qsfp_version_compliance = int(
-                    qsfp_version_compliance_raw[0], 16)
-                dom_capability = sfpi_obj.parse_dom_capability(
-                    qsfp_dom_capability_raw, 0)
-                if qsfp_version_compliance >= 0x08:
-                    self.dom_temp_supported = dom_capability['data']['Temp_support']['value'] == 'On'
-                    self.dom_volt_supported = dom_capability['data']['Voltage_support']['value'] == 'On'
-                    self.dom_rx_power_supported = dom_capability['data']['Rx_power_support']['value'] == 'On'
-                    self.dom_tx_power_supported = dom_capability['data']['Tx_power_support']['value'] == 'On'
-                else:
-                    self.dom_temp_supported = True
-                    self.dom_volt_supported = True
-                    self.dom_rx_power_supported = dom_capability['data']['Rx_power_support']['value'] == 'On'
-                    self.dom_tx_power_supported = True
-
-                self.dom_supported = True
-                self.calibration = 1
-                sfpd_obj = sff8436Dom()
-                if sfpd_obj is None:
-                    return None
-                qsfp_option_value_raw = self.__read_eeprom_specific_bytes(
-                    QSFP_OPTION_VALUE_OFFSET, QSFP_OPTION_VALUE_WIDTH)
-                if qsfp_option_value_raw is not None:
-                    optional_capability = sfpd_obj.parse_option_params(
-                        qsfp_option_value_raw, 0)
-                    self.dom_tx_disable_supported = optional_capability[
-                        'data']['TxDisable']['value'] == 'On'
-                dom_status_indicator = sfpd_obj.parse_dom_status_indicator(
-                    qsfp_version_compliance_raw, 1)
-                self.qsfp_page3_available = dom_status_indicator['data']['FlatMem']['value'] == 'Off'
-            else:
-                self.dom_supported = False
-                self.dom_temp_supported = False
-                self.dom_volt_supported = False
-                self.dom_rx_power_supported = False
-                self.dom_tx_power_supported = False
-                self.calibration = 0
-                self.qsfp_page3_available = False
-
-        elif self.sfp_type == "SFP":
-            sfpi_obj = sff8472InterfaceId()
-            if sfpi_obj is None:
-                return None
-            sfp_dom_capability_raw = self.__read_eeprom_specific_bytes(
-                XCVR_DOM_CAPABILITY_OFFSET, XCVR_DOM_CAPABILITY_WIDTH)
-            if sfp_dom_capability_raw is not None:
-                sfp_dom_capability = int(sfp_dom_capability_raw[0], 16)
-                self.dom_supported = (sfp_dom_capability & 0x40 != 0)
-                if self.dom_supported:
-                    self.dom_temp_supported = True
-                    self.dom_volt_supported = True
-                    self.dom_rx_power_supported = True
-                    self.dom_tx_power_supported = True
-                    if sfp_dom_capability & 0x20 != 0:
-                        self.calibration = 1
-                    elif sfp_dom_capability & 0x10 != 0:
-                        self.calibration = 2
-                    else:
-                        self.calibration = 0
-                else:
-                    self.dom_temp_supported = False
-                    self.dom_volt_supported = False
-                    self.dom_rx_power_supported = False
-                    self.dom_tx_power_supported = False
-                    self.calibration = 0
-                self.dom_tx_disable_supported = (
-                    int(sfp_dom_capability_raw[1], 16) & 0x40 != 0)
-        else:
-            self.dom_supported = False
-            self.dom_temp_supported = False
-            self.dom_volt_supported = False
-            self.dom_rx_power_supported = False
-            self.dom_tx_power_supported = False
-
-    def get_transceiver_info(self):
-        """
-        Retrieves transceiver info of this SFP
-        Returns:
-            A dict which contains following keys/values :
-        ========================================================================
-        keys                       |Value Format   |Information
-        ---------------------------|---------------|----------------------------
-        type                       |1*255VCHAR     |type of SFP
-        vendor_rev                 |1*255VCHAR     |vendor revision of SFP
-        serial                     |1*255VCHAR     |serial number of the SFP
-        manufacturer               |1*255VCHAR     |SFP vendor name
-        model                      |1*255VCHAR     |SFP model name
-        connector                  |1*255VCHAR     |connector information
-        encoding                   |1*255VCHAR     |encoding information
-        ext_identifier             |1*255VCHAR     |extend identifier
-        ext_rateselect_compliance  |1*255VCHAR     |extended rateSelect compliance
-        cable_length               |INT            |cable length in m
-        nominal_bit_rate           |INT            |nominal bit rate by 100Mbs
-        specification_compliance   |1*255VCHAR     |specification compliance
-        vendor_date                |1*255VCHAR     |vendor date
-        vendor_oui                 |1*255VCHAR     |vendor OUI
-        ========================================================================
-         """
-        compliance_code_dict = {}
-        transceiver_info_dict = dict.fromkeys(self.info_dict_keys, 'N/A')
-        if not self.get_presence():
-            return transceiver_info_dict
-
-        # ToDo: OSFP tranceiver info parsing not fully supported.
-        # in inf8628.py lack of some memory map definition
-        # will be implemented when the inf8628 memory map ready
-        if self.sfp_type == OSFP_TYPE:
-            offset = 0
-            vendor_rev_width = XCVR_HW_REV_WIDTH_OSFP
-
-            sfpi_obj = inf8628InterfaceId()
-            if sfpi_obj is None:
-                return None
-
-            sfp_type_raw = self.__read_eeprom_specific_bytes(
-                (offset + OSFP_TYPE_OFFSET), XCVR_TYPE_WIDTH)
-            if sfp_type_raw is not None:
-                sfp_type_data = sfpi_obj.parse_sfp_type(sfp_type_raw, 0)
-            else:
-                return None
-
-            sfp_vendor_name_raw = self.__read_eeprom_specific_bytes(
-                (offset + OSFP_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH)
-            if sfp_vendor_name_raw is not None:
-                sfp_vendor_name_data = sfpi_obj.parse_vendor_name(
-                    sfp_vendor_name_raw, 0)
-            else:
-                return None
-
-            sfp_vendor_pn_raw = self.__read_eeprom_specific_bytes(
-                (offset + OSFP_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH)
-            if sfp_vendor_pn_raw is not None:
-                sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(
-                    sfp_vendor_pn_raw, 0)
-            else:
-                return None
-
-            sfp_vendor_rev_raw = self.__read_eeprom_specific_bytes(
-                (offset + OSFP_HW_REV_OFFSET), vendor_rev_width)
-            if sfp_vendor_rev_raw is not None:
-                sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(
-                    sfp_vendor_rev_raw, 0)
-            else:
-                return None
-
-            sfp_vendor_sn_raw = self.__read_eeprom_specific_bytes(
-                (offset + OSFP_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH)
-            if sfp_vendor_sn_raw is not None:
-                sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(
-                    sfp_vendor_sn_raw, 0)
-            else:
-                return None
-
-            transceiver_info_dict['type'] = sfp_type_data['data']['type']['value']
-            transceiver_info_dict['manufacturer'] = sfp_vendor_name_data['data']['Vendor Name']['value']
-            transceiver_info_dict['model'] = sfp_vendor_pn_data['data']['Vendor PN']['value']
-            transceiver_info_dict['vendor_rev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value']
-            transceiver_info_dict['serial'] = sfp_vendor_sn_data['data']['Vendor SN']['value']
-            transceiver_info_dict['vendor_oui'] = 'N/A'
-            transceiver_info_dict['vendor_date'] = 'N/A'
-            transceiver_info_dict['connector'] = 'N/A'
-            transceiver_info_dict['encoding'] = 'N/A'
-            transceiver_info_dict['ext_identifier'] = 'N/A'
-            transceiver_info_dict['ext_rateselect_compliance'] = 'N/A'
-            transceiver_info_dict['cable_type'] = 'N/A'
-            transceiver_info_dict['cable_length'] = 'N/A'
-            transceiver_info_dict['specification_compliance'] = 'N/A'
-            transceiver_info_dict['nominal_bit_rate'] = 'N/A'
-
-        else:
-            if self.sfp_type == QSFP_TYPE:
-                offset = 128
-                vendor_rev_width = XCVR_HW_REV_WIDTH_QSFP
-                cable_length_width = XCVR_CABLE_LENGTH_WIDTH_QSFP
-                interface_info_bulk_width = XCVR_INTFACE_BULK_WIDTH_QSFP
-                sfp_type = 'QSFP'
-
-                sfpi_obj = sff8436InterfaceId()
-                if sfpi_obj is None:
-                    print("Error: sfp_object open failed")
-                    return None
-
-            else:
-                offset = 0
-                vendor_rev_width = XCVR_HW_REV_WIDTH_SFP
-                cable_length_width = XCVR_CABLE_LENGTH_WIDTH_SFP
-                interface_info_bulk_width = XCVR_INTFACE_BULK_WIDTH_SFP
-                sfp_type = 'SFP'
-
-                sfpi_obj = sff8472InterfaceId()
-                if sfpi_obj is None:
-                    print("Error: sfp_object open failed")
-                    return None
-            sfp_interface_bulk_raw = self.__read_eeprom_specific_bytes(
-                offset + XCVR_INTERFACE_DATA_START, XCVR_INTERFACE_DATA_SIZE)
-            if sfp_interface_bulk_raw is None:
-                return None
-
-            start = XCVR_INTFACE_BULK_OFFSET - XCVR_INTERFACE_DATA_START
-            end = start + interface_info_bulk_width
-            sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk(
-                sfp_interface_bulk_raw[start: end], 0)
-
-            start = XCVR_VENDOR_NAME_OFFSET - XCVR_INTERFACE_DATA_START
-            end = start + XCVR_VENDOR_NAME_WIDTH
-            sfp_vendor_name_data = sfpi_obj.parse_vendor_name(
-                sfp_interface_bulk_raw[start: end], 0)
-
-            start = XCVR_VENDOR_PN_OFFSET - XCVR_INTERFACE_DATA_START
-            end = start + XCVR_VENDOR_PN_WIDTH
-            sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(
-                sfp_interface_bulk_raw[start: end], 0)
-
-            start = XCVR_HW_REV_OFFSET - XCVR_INTERFACE_DATA_START
-            end = start + vendor_rev_width
-            sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(
-                sfp_interface_bulk_raw[start: end], 0)
-
-            start = XCVR_VENDOR_SN_OFFSET - XCVR_INTERFACE_DATA_START
-            end = start + XCVR_VENDOR_SN_WIDTH
-            sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(
-                sfp_interface_bulk_raw[start: end], 0)
-
-            start = XCVR_VENDOR_OUI_OFFSET - XCVR_INTERFACE_DATA_START
-            end = start + XCVR_VENDOR_OUI_WIDTH
-            sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui(
-                sfp_interface_bulk_raw[start: end], 0)
-
-            start = XCVR_VENDOR_DATE_OFFSET - XCVR_INTERFACE_DATA_START
-            end = start + XCVR_VENDOR_DATE_WIDTH
-            sfp_vendor_date_data = sfpi_obj.parse_vendor_date(
-                sfp_interface_bulk_raw[start: end], 0)
-            transceiver_info_dict['type'] = sfp_interface_bulk_data['data']['type']['value']
-            transceiver_info_dict['manufacturer'] = sfp_vendor_name_data['data']['Vendor Name']['value']
-            transceiver_info_dict['model'] = sfp_vendor_pn_data['data']['Vendor PN']['value']
-            transceiver_info_dict['vendor_rev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value']
-            transceiver_info_dict['serial'] = sfp_vendor_sn_data['data']['Vendor SN']['value']
-            transceiver_info_dict['vendor_oui'] = sfp_vendor_oui_data['data']['Vendor OUI']['value']
-            transceiver_info_dict['vendor_date'] = sfp_vendor_date_data[
-                'data']['VendorDataCode(YYYY-MM-DD Lot)']['value']
-            transceiver_info_dict['connector'] = sfp_interface_bulk_data['data']['Connector']['value']
-            transceiver_info_dict['encoding'] = sfp_interface_bulk_data['data']['EncodingCodes']['value']
-            transceiver_info_dict['ext_identifier'] = sfp_interface_bulk_data['data']['Extended Identifier']['value']
-            transceiver_info_dict['ext_rateselect_compliance'] = sfp_interface_bulk_data['data']['RateIdentifier']['value']
-            if self.sfp_type == QSFP_TYPE:
-                for key in qsfp_cable_length_tup:
-                    if key in sfp_interface_bulk_data['data']:
-                        transceiver_info_dict['cable_type'] = key
-                        transceiver_info_dict['cable_length'] = str(
-                            sfp_interface_bulk_data['data'][key]['value'])
-
-                for key in qsfp_compliance_code_tup:
-                    if key in sfp_interface_bulk_data['data']['Specification compliance']['value']:
-                        compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value']
-                transceiver_info_dict['specification_compliance'] = str(
-                    compliance_code_dict)
-
-                transceiver_info_dict['nominal_bit_rate'] = str(
-                    sfp_interface_bulk_data['data']['Nominal Bit Rate(100Mbs)']['value'])
-            else:
-                for key in sfp_cable_length_tup:
-                    if key in sfp_interface_bulk_data['data']:
-                        transceiver_info_dict['cable_type'] = key
-                        transceiver_info_dict['cable_length'] = str(
-                            sfp_interface_bulk_data['data'][key]['value'])
-
-                for key in sfp_compliance_code_tup:
-                    if key in sfp_interface_bulk_data['data']['Specification compliance']['value']:
-                        compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value']
-                transceiver_info_dict['specification_compliance'] = str(
-                    compliance_code_dict)
-
-                transceiver_info_dict['nominal_bit_rate'] = str(
-                    sfp_interface_bulk_data['data']['NominalSignallingRate(UnitsOf100Mbd)']['value'])
-
-        return transceiver_info_dict
-
-    def get_transceiver_bulk_status(self):
-        """
-        Retrieves transceiver bulk status of this SFP
-        Returns:
-            A dict which contains following keys/values :
-        ========================================================================
-        keys                       |Value Format   |Information
-        ---------------------------|---------------|----------------------------
-        rx_los                     |BOOLEAN        |RX loss-of-signal status, True if has RX los, False if not.
-        tx_fault                   |BOOLEAN        |TX fault status, True if has TX fault, False if not.
-        reset_status               |BOOLEAN        |reset status, True if SFP in reset, False if not.
-        lp_mode                    |BOOLEAN        |low power mode status, True in lp mode, False if not.
-        tx_disable                 |BOOLEAN        |TX disable status, True TX disabled, False if not.
-        tx_disabled_channel        |HEX            |disabled TX channels in hex, bits 0 to 3 represent channel 0
-                                   |               |to channel 3.
-        temperature                |INT            |module temperature in Celsius
-        voltage                    |INT            |supply voltage in mV
-        tx<n>bias                  |INT            |TX Bias Current in mA, n is the channel number,
-                                   |               |for example, tx2bias stands for tx bias of channel 2.
-        rx<n>power                 |INT            |received optical power in mW, n is the channel number,
-                                   |               |for example, rx2power stands for rx power of channel 2.
-        tx<n>power                 |INT            |TX output power in mW, n is the channel number,
-                                   |               |for example, tx2power stands for tx power of channel 2.
-        ========================================================================
-        """
-        transceiver_dom_info_dict = dict.fromkeys(self.dom_dict_keys, 'N/A')
-
-        if self.sfp_type == OSFP_TYPE:
-            pass
-
-        elif self.sfp_type == QSFP_TYPE:
-            if not self.dom_supported:
-                return transceiver_dom_info_dict
-
-            offset = 0
-            sfpd_obj = sff8436Dom()
-            if sfpd_obj is None:
-                return transceiver_dom_info_dict
-
-            dom_data_raw = self.__read_eeprom_specific_bytes(
-                (offset + QSFP_DOM_BULK_DATA_START), QSFP_DOM_BULK_DATA_SIZE)
-            if dom_data_raw is None:
-                return transceiver_dom_info_dict
-
-            if self.dom_temp_supported:
-                start = QSFP_TEMPE_OFFSET - QSFP_DOM_BULK_DATA_START
-                end = start + QSFP_TEMPE_WIDTH
-                dom_temperature_data = sfpd_obj.parse_temperature(
-                    dom_data_raw[start: end], 0)
-                temp = self.__convert_string_to_num(
-                    dom_temperature_data['data']['Temperature']['value'])
-                if temp is not None:
-                    transceiver_dom_info_dict['temperature'] = temp
-
-            if self.dom_volt_supported:
-                start = QSFP_VOLT_OFFSET - QSFP_DOM_BULK_DATA_START
-                end = start + QSFP_VOLT_WIDTH
-                dom_voltage_data = sfpd_obj.parse_voltage(
-                    dom_data_raw[start: end], 0)
-                volt = self.__convert_string_to_num(
-                    dom_voltage_data['data']['Vcc']['value'])
-                if volt is not None:
-                    transceiver_dom_info_dict['voltage'] = volt
-
-            start = QSFP_CHANNL_MON_OFFSET - QSFP_DOM_BULK_DATA_START
-            end = start + QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH
-            dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(
-                dom_data_raw[start: end], 0)
-
-            if self.dom_tx_power_supported:
-                transceiver_dom_info_dict['tx1power'] = self.__convert_string_to_num(
-                    dom_channel_monitor_data['data']['TX1Power']['value'])
-                transceiver_dom_info_dict['tx2power'] = self.__convert_string_to_num(
-                    dom_channel_monitor_data['data']['TX2Power']['value'])
-                transceiver_dom_info_dict['tx3power'] = self.__convert_string_to_num(
-                    dom_channel_monitor_data['data']['TX3Power']['value'])
-                transceiver_dom_info_dict['tx4power'] = self.__convert_string_to_num(
-                    dom_channel_monitor_data['data']['TX4Power']['value'])
-
-            if self.dom_rx_power_supported:
-                transceiver_dom_info_dict['rx1power'] = self.__convert_string_to_num(
-                    dom_channel_monitor_data['data']['RX1Power']['value'])
-                transceiver_dom_info_dict['rx2power'] = self.__convert_string_to_num(
-                    dom_channel_monitor_data['data']['RX2Power']['value'])
-                transceiver_dom_info_dict['rx3power'] = self.__convert_string_to_num(
-                    dom_channel_monitor_data['data']['RX3Power']['value'])
-                transceiver_dom_info_dict['rx4power'] = self.__convert_string_to_num(
-                    dom_channel_monitor_data['data']['RX4Power']['value'])
-
-            transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TX1Bias']['value']
-            transceiver_dom_info_dict['tx2bias'] = dom_channel_monitor_data['data']['TX2Bias']['value']
-            transceiver_dom_info_dict['tx3bias'] = dom_channel_monitor_data['data']['TX3Bias']['value']
-            transceiver_dom_info_dict['tx4bias'] = dom_channel_monitor_data['data']['TX4Bias']['value']
-
-        else:
-            if not self.dom_supported:
-                return transceiver_dom_info_dict
-
-            offset = 256
-            sfpd_obj = sff8472Dom()
-            if sfpd_obj is None:
-                return transceiver_dom_info_dict
-            sfpd_obj._calibration_type = self.calibration
-
-            dom_data_raw = self.__read_eeprom_specific_bytes(
-                (offset + SFP_DOM_BULK_DATA_START), SFP_DOM_BULK_DATA_SIZE)
-
-            start = SFP_TEMPE_OFFSET - SFP_DOM_BULK_DATA_START
-            end = start + SFP_TEMPE_WIDTH
-            dom_temperature_data = sfpd_obj.parse_temperature(
-                dom_data_raw[start: end], 0)
-
-            start = SFP_VOLT_OFFSET - SFP_DOM_BULK_DATA_START
-            end = start + SFP_VOLT_WIDTH
-            dom_voltage_data = sfpd_obj.parse_voltage(
-                dom_data_raw[start: end], 0)
-
-            start = SFP_CHANNL_MON_OFFSET - SFP_DOM_BULK_DATA_START
-            end = start + SFP_CHANNL_MON_WIDTH
-            dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(
-                dom_data_raw[start: end], 0)
-
-            transceiver_dom_info_dict['temperature'] = self.__convert_string_to_num(
-                dom_temperature_data['data']['Temperature']['value'])
-            transceiver_dom_info_dict['voltage'] = self.__convert_string_to_num(
-                dom_voltage_data['data']['Vcc']['value'])
-            transceiver_dom_info_dict['rx1power'] = self.__convert_string_to_num(
-                dom_channel_monitor_data['data']['RXPower']['value'])
-            transceiver_dom_info_dict['tx1bias'] = self.__convert_string_to_num(
-                dom_channel_monitor_data['data']['TXBias']['value'])
-            transceiver_dom_info_dict['tx1power'] = self.__convert_string_to_num(
-                dom_channel_monitor_data['data']['TXPower']['value'])
-
-        transceiver_dom_info_dict['rx_los'] = self.get_rx_los()
-        transceiver_dom_info_dict['tx_fault'] = self.get_tx_fault()
-        transceiver_dom_info_dict['reset_status'] = self.get_reset_status()
-        transceiver_dom_info_dict['lp_mode'] = self.get_lpmode()
-
-        return transceiver_dom_info_dict
-
-    def get_transceiver_threshold_info(self):
-        """
-        Retrieves transceiver threshold info of this SFP
-        Returns:
-            A dict which contains following keys/values :
-        ========================================================================
-        keys                       |Value Format   |Information
-        ---------------------------|---------------|----------------------------
-        temphighalarm              |FLOAT          |High Alarm Threshold value of temperature in Celsius.
-        templowalarm               |FLOAT          |Low Alarm Threshold value of temperature in Celsius.
-        temphighwarning            |FLOAT          |High Warning Threshold value of temperature in Celsius.
-        templowwarning             |FLOAT          |Low Warning Threshold value of temperature in Celsius.
-        vcchighalarm               |FLOAT          |High Alarm Threshold value of supply voltage in mV.
-        vcclowalarm                |FLOAT          |Low Alarm Threshold value of supply voltage in mV.
-        vcchighwarning             |FLOAT          |High Warning Threshold value of supply voltage in mV.
-        vcclowwarning              |FLOAT          |Low Warning Threshold value of supply voltage in mV.
-        rxpowerhighalarm           |FLOAT          |High Alarm Threshold value of received power in dBm.
-        rxpowerlowalarm            |FLOAT          |Low Alarm Threshold value of received power in dBm.
-        rxpowerhighwarning         |FLOAT          |High Warning Threshold value of received power in dBm.
-        rxpowerlowwarning          |FLOAT          |Low Warning Threshold value of received power in dBm.
-        txpowerhighalarm           |FLOAT          |High Alarm Threshold value of transmit power in dBm.
-        txpowerlowalarm            |FLOAT          |Low Alarm Threshold value of transmit power in dBm.
-        txpowerhighwarning         |FLOAT          |High Warning Threshold value of transmit power in dBm.
-        txpowerlowwarning          |FLOAT          |Low Warning Threshold value of transmit power in dBm.
-        txbiashighalarm            |FLOAT          |High Alarm Threshold value of tx Bias Current in mA.
-        txbiaslowalarm             |FLOAT          |Low Alarm Threshold value of tx Bias Current in mA.
-        txbiashighwarning          |FLOAT          |High Warning Threshold value of tx Bias Current in mA.
-        txbiaslowwarning           |FLOAT          |Low Warning Threshold value of tx Bias Current in mA.
-        ========================================================================
-        """
-        transceiver_dom_threshold_info_dict = dict.fromkeys(
-            self.threshold_dict_keys, 'N/A')
-
-        if self.sfp_type == OSFP_TYPE:
-            pass
-
-        elif self.sfp_type == QSFP_TYPE:
-            if not self.dom_supported or not self.qsfp_page3_available:
-                return transceiver_dom_threshold_info_dict
-
-            # Dom Threshold data starts from offset 384
-            # Revert offset back to 0 once data is retrieved
-            offset = QSFP_MODULE_UPPER_PAGE3_START
-            sfpd_obj = sff8436Dom()
-            if sfpd_obj is None:
-                return transceiver_dom_threshold_info_dict
-
-            dom_module_threshold_raw = self.__read_eeprom_specific_bytes(
-                (offset + QSFP_MODULE_THRESHOLD_OFFSET), QSFP_MODULE_THRESHOLD_WIDTH)
-            if dom_module_threshold_raw is None:
-                return transceiver_dom_threshold_info_dict
-
-            dom_module_threshold_data = sfpd_obj.parse_module_threshold_values(
-                dom_module_threshold_raw, 0)
-
-            dom_channel_threshold_raw = self.__read_eeprom_specific_bytes((offset + QSFP_CHANNL_THRESHOLD_OFFSET),
-                                                                          QSFP_CHANNL_THRESHOLD_WIDTH)
-            if dom_channel_threshold_raw is None:
-                return transceiver_dom_threshold_info_dict
-            dom_channel_threshold_data = sfpd_obj.parse_channel_threshold_values(
-                dom_channel_threshold_raw, 0)
-
-            # Threshold Data
-            transceiver_dom_threshold_info_dict['temphighalarm'] = dom_module_threshold_data['data']['TempHighAlarm']['value']
-            transceiver_dom_threshold_info_dict['temphighwarning'] = dom_module_threshold_data['data']['TempHighWarning']['value']
-            transceiver_dom_threshold_info_dict['templowalarm'] = dom_module_threshold_data['data']['TempLowAlarm']['value']
-            transceiver_dom_threshold_info_dict['templowwarning'] = dom_module_threshold_data['data']['TempLowWarning']['value']
-            transceiver_dom_threshold_info_dict['vcchighalarm'] = dom_module_threshold_data['data']['VccHighAlarm']['value']
-            transceiver_dom_threshold_info_dict['vcchighwarning'] = dom_module_threshold_data['data']['VccHighWarning']['value']
-            transceiver_dom_threshold_info_dict['vcclowalarm'] = dom_module_threshold_data['data']['VccLowAlarm']['value']
-            transceiver_dom_threshold_info_dict['vcclowwarning'] = dom_module_threshold_data['data']['VccLowWarning']['value']
-            transceiver_dom_threshold_info_dict['rxpowerhighalarm'] = dom_channel_threshold_data['data']['RxPowerHighAlarm']['value']
-            transceiver_dom_threshold_info_dict['rxpowerhighwarning'] = dom_channel_threshold_data['data']['RxPowerHighWarning']['value']
-            transceiver_dom_threshold_info_dict['rxpowerlowalarm'] = dom_channel_threshold_data['data']['RxPowerLowAlarm']['value']
-            transceiver_dom_threshold_info_dict['rxpowerlowwarning'] = dom_channel_threshold_data['data']['RxPowerLowWarning']['value']
-            transceiver_dom_threshold_info_dict['txbiashighalarm'] = dom_channel_threshold_data['data']['TxBiasHighAlarm']['value']
-            transceiver_dom_threshold_info_dict['txbiashighwarning'] = dom_channel_threshold_data['data']['TxBiasHighWarning']['value']
-            transceiver_dom_threshold_info_dict['txbiaslowalarm'] = dom_channel_threshold_data['data']['TxBiasLowAlarm']['value']
-            transceiver_dom_threshold_info_dict['txbiaslowwarning'] = dom_channel_threshold_data['data']['TxBiasLowWarning']['value']
-            transceiver_dom_threshold_info_dict['txpowerhighalarm'] = dom_channel_threshold_data['data']['TxPowerHighAlarm']['value']
-            transceiver_dom_threshold_info_dict['txpowerhighwarning'] = dom_channel_threshold_data['data']['TxPowerHighWarning']['value']
-            transceiver_dom_threshold_info_dict['txpowerlowalarm'] = dom_channel_threshold_data['data']['TxPowerLowAlarm']['value']
-            transceiver_dom_threshold_info_dict['txpowerlowwarning'] = dom_channel_threshold_data['data']['TxPowerLowWarning']['value']
-
-        else:
-            offset = SFP_MODULE_ADDRA2_OFFSET
-
-            if not self.dom_supported:
-                return transceiver_dom_threshold_info_dict
-
-            sfpd_obj = sff8472Dom(None, self.calibration)
-            if sfpd_obj is None:
-                return transceiver_dom_threshold_info_dict
-
-            dom_module_threshold_raw = self.__read_eeprom_specific_bytes((offset + SFP_MODULE_THRESHOLD_OFFSET),
-                                                                         SFP_MODULE_THRESHOLD_WIDTH)
-            if dom_module_threshold_raw is not None:
-                dom_module_threshold_data = sfpd_obj.parse_alarm_warning_threshold(
-                    dom_module_threshold_raw, 0)
-            else:
-                return transceiver_dom_threshold_info_dict
-
-            # Threshold Data
-            transceiver_dom_threshold_info_dict['temphighalarm'] = dom_module_threshold_data['data']['TempHighAlarm']['value']
-            transceiver_dom_threshold_info_dict['templowalarm'] = dom_module_threshold_data['data']['TempLowAlarm']['value']
-            transceiver_dom_threshold_info_dict['temphighwarning'] = dom_module_threshold_data['data']['TempHighWarning']['value']
-            transceiver_dom_threshold_info_dict['templowwarning'] = dom_module_threshold_data['data']['TempLowWarning']['value']
-            transceiver_dom_threshold_info_dict['vcchighalarm'] = dom_module_threshold_data['data']['VoltageHighAlarm']['value']
-            transceiver_dom_threshold_info_dict['vcclowalarm'] = dom_module_threshold_data['data']['VoltageLowAlarm']['value']
-            transceiver_dom_threshold_info_dict['vcchighwarning'] = dom_module_threshold_data[
-                'data']['VoltageHighWarning']['value']
-            transceiver_dom_threshold_info_dict['vcclowwarning'] = dom_module_threshold_data['data']['VoltageLowWarning']['value']
-            transceiver_dom_threshold_info_dict['txbiashighalarm'] = dom_module_threshold_data['data']['BiasHighAlarm']['value']
-            transceiver_dom_threshold_info_dict['txbiaslowalarm'] = dom_module_threshold_data['data']['BiasLowAlarm']['value']
-            transceiver_dom_threshold_info_dict['txbiashighwarning'] = dom_module_threshold_data['data']['BiasHighWarning']['value']
-            transceiver_dom_threshold_info_dict['txbiaslowwarning'] = dom_module_threshold_data['data']['BiasLowWarning']['value']
-            transceiver_dom_threshold_info_dict['txpowerhighalarm'] = dom_module_threshold_data['data']['TXPowerHighAlarm']['value']
-            transceiver_dom_threshold_info_dict['txpowerlowalarm'] = dom_module_threshold_data['data']['TXPowerLowAlarm']['value']
-            transceiver_dom_threshold_info_dict['txpowerhighwarning'] = dom_module_threshold_data['data']['TXPowerHighWarning']['value']
-            transceiver_dom_threshold_info_dict['txpowerlowwarning'] = dom_module_threshold_data['data']['TXPowerLowWarning']['value']
-            transceiver_dom_threshold_info_dict['rxpowerhighalarm'] = dom_module_threshold_data['data']['RXPowerHighAlarm']['value']
-            transceiver_dom_threshold_info_dict['rxpowerlowalarm'] = dom_module_threshold_data['data']['RXPowerLowAlarm']['value']
-            transceiver_dom_threshold_info_dict['rxpowerhighwarning'] = dom_module_threshold_data['data']['RXPowerHighWarning']['value']
-            transceiver_dom_threshold_info_dict['rxpowerlowwarning'] = dom_module_threshold_data['data']['RXPowerLowWarning']['value']
-
-        return transceiver_dom_threshold_info_dict
-
-    def get_reset_status(self):
-        """
-        Retrieves the reset status of SFP
-        Returns:
-            A Boolean, True if reset enabled, False if disabled
-        """
-        if not self.dom_supported:
-            return False
-
-        if self.sfp_type == OSFP_TYPE:
-            return False
-        elif self.sfp_type == QSFP_TYPE:
-            offset = 0
-            sfpd_obj = sff8436Dom()
-            dom_module_monitor_raw = self.__read_eeprom_specific_bytes(
-                (offset + QSFP_MODULE_MONITOR_OFFSET), QSFP_MODULE_MONITOR_WIDTH)
-
-            if dom_module_monitor_raw is not None:
-                return True
-            else:
-                return False
-        elif self.sfp_type == SFP_TYPE:
-            offset = 0
-            sfpd_obj = sff8472Dom()
-            dom_channel_monitor_raw = self.__read_eeprom_specific_bytes(
-                (offset + SFP_CHANNL_STATUS_OFFSET), SFP_CHANNL_STATUS_WIDTH)
-
-            if dom_channel_monitor_raw is not None:
-                return True
-            else:
-                return False
-
-    def get_rx_los(self):
-        """
-        Retrieves the RX LOS (lost-of-signal) status of SFP
-        Returns:
-            A Boolean, True if SFP has RX LOS, False if not.
-            Note : RX LOS status is latched until a call to get_rx_los or a reset.
-        """
-        if not self.dom_supported:
-            return None
-
-        rx_los_list = []
-        if self.sfp_type == OSFP_TYPE:
-            return None
-        elif self.sfp_type == QSFP_TYPE:
-            offset = 0
-            dom_channel_monitor_raw = self.__read_eeprom_specific_bytes(
-                (offset + QSFP_CHANNL_RX_LOS_STATUS_OFFSET), QSFP_CHANNL_RX_LOS_STATUS_WIDTH)
-            if dom_channel_monitor_raw is not None:
-                rx_los_data = int(dom_channel_monitor_raw[0], 16)
-                rx_los_list.append(rx_los_data & 0x01 != 0)
-                rx_los_list.append(rx_los_data & 0x02 != 0)
-                rx_los_list.append(rx_los_data & 0x04 != 0)
-                rx_los_list.append(rx_los_data & 0x08 != 0)
-        else:
-            offset = 256
-            dom_channel_monitor_raw = self.__read_eeprom_specific_bytes(
-                (offset + SFP_CHANNL_STATUS_OFFSET), SFP_CHANNL_STATUS_WIDTH)
-            if dom_channel_monitor_raw is not None:
-                rx_los_data = int(dom_channel_monitor_raw[0], 16)
-                rx_los_list.append(rx_los_data & 0x02 != 0)
-            else:
-                return None
-        return rx_los_list
-
-    def get_tx_fault(self):
-        """
-        Retrieves the TX fault status of SFP
-        Returns:
-            A Boolean, True if SFP has TX fault, False if not
-            Note : TX fault status is lached until a call to get_tx_fault or a reset.
-        """
-        if not self.dom_supported:
-            return None
-
-        tx_fault_list = []
-        if self.sfp_type == OSFP_TYPE:
-            return None
-        elif self.sfp_type == QSFP_TYPE:
-            offset = 0
-            dom_channel_monitor_raw = self.__read_eeprom_specific_bytes(
-                (offset + QSFP_CHANNL_TX_FAULT_STATUS_OFFSET), QSFP_CHANNL_TX_FAULT_STATUS_WIDTH)
-            if dom_channel_monitor_raw is not None:
-                tx_fault_data = int(dom_channel_monitor_raw[0], 16)
-                tx_fault_list.append(tx_fault_data & 0x01 != 0)
-                tx_fault_list.append(tx_fault_data & 0x02 != 0)
-                tx_fault_list.append(tx_fault_data & 0x04 != 0)
-                tx_fault_list.append(tx_fault_data & 0x08 != 0)
-        else:
-            offset = 256
-            dom_channel_monitor_raw = self.__read_eeprom_specific_bytes(
-                (offset + SFP_CHANNL_STATUS_OFFSET), SFP_CHANNL_STATUS_WIDTH)
-            if dom_channel_monitor_raw is not None:
-                tx_fault_data = int(dom_channel_monitor_raw[0], 16)
-                tx_fault_list.append(tx_fault_data & 0x04 != 0)
-            else:
-                return None
-        return tx_fault_list
-
-    def get_tx_disable(self):
-        """
-        Retrieves the tx_disable status of this SFP
-        Returns:
-            A Boolean, True if tx_disable is enabled, False if disabled
-        """
-        if not self.dom_supported:
-            return None
-
-        tx_disable_list = []
-        if self.sfp_type == OSFP_TYPE:
-            return None
-        elif self.sfp_type == QSFP_TYPE:
-            offset = 0
-            dom_channel_monitor_raw = self.__read_eeprom_specific_bytes(
-                (offset + QSFP_CHANNL_DISABLE_STATUS_OFFSET), QSFP_CHANNL_DISABLE_STATUS_WIDTH)
-            if dom_channel_monitor_raw is not None:
-                tx_disable_data = int(dom_channel_monitor_raw[0], 16)
-                tx_disable_list.append(tx_disable_data & 0x01 != 0)
-                tx_disable_list.append(tx_disable_data & 0x02 != 0)
-                tx_disable_list.append(tx_disable_data & 0x04 != 0)
-                tx_disable_list.append(tx_disable_data & 0x08 != 0)
-        else:
-            offset = 256
-            dom_channel_monitor_raw = self.__read_eeprom_specific_bytes(
-                (offset + SFP_CHANNL_STATUS_OFFSET), SFP_CHANNL_STATUS_WIDTH)
-            if dom_channel_monitor_raw is not None:
-                tx_disable_data = int(dom_channel_monitor_raw[0], 16)
-                tx_disable_list.append(tx_disable_data & 0xC0 != 0)
-            else:
-                return None
-        return tx_disable_list
-
-    def get_tx_disable_channel(self):
-        """
-        Retrieves the TX disabled channels in this SFP
-        Returns:
-            A hex of 4 bits (bit 0 to bit 3 as channel 0 to channel 3) to represent
-            TX channels which have been disabled in this SFP.
-            As an example, a returned value of 0x5 indicates that channel 0
-            and channel 2 have been disabled.
-        """
-        tx_disable_list = self.get_tx_disable()
-        if tx_disable_list is None:
-            return 0
-        tx_disabled = 0
-        for i in range(len(tx_disable_list)):
-            if tx_disable_list[i]:
-                tx_disabled |= 1 << i
-        return tx_disabled
-
-    def get_lpmode(self):
-        """
-        Retrieves the lpmode (low power mode) status of this SFP
-        Returns:
-            A Boolean, True if lpmode is enabled, False if disabled
-        """
-        if self.sfp_type != OSFP_TYPE:
-            return False
-
-        try:
-            reg_file = open(
-                "/".join([PORT_INFO_PATH, self.port_name, "qsfp_lpmode"]))
-        except IOError as e:
-            print("Error: unable to open file: %s" % str(e))
-            return False
-
-        # Read status
-        content = reg_file.readline().rstrip()
-        reg_value = int(content)
-        # low power mode is active high
-        if reg_value == 0:
-            return False
-
-        return True
-
-    def get_power_override(self):
-        """
-        Retrieves the power-override status of this SFP
-        Returns:
-            A Boolean, True if power-override is enabled, False if disabled
-        """
-        if self.sfp_type == QSFP_TYPE:
-            offset = 0
-            sfpd_obj = sff8436Dom()
-            if sfpd_obj is None:
-                return False
-
-            dom_control_raw = self.__read_eeprom_specific_bytes(
-                QSFP_CONTROL_OFFSET, QSFP_CONTROL_WIDTH) if self.get_presence() else None
-            if dom_control_raw is not None:
-                dom_control_data = sfpd_obj.parse_control_bytes(
-                    dom_control_raw, 0)
-                power_override = (
-                    'On' == dom_control_data['data']['PowerOverride']['value'])
-        else:
-            return False
-
-    def get_temperature(self):
-        """
-        Retrieves the temperature of this SFP
-        Returns:
-            An integer number of current temperature in Celsius
-        """
-        transceiver_bulk_status = self.get_transceiver_bulk_status()
-        return transceiver_bulk_status.get("temperature", "N/A")
-
-    def get_voltage(self):
-        """
-        Retrieves the supply voltage of this SFP
-        Returns:
-            An integer number of supply voltage in mV
-        """
-        transceiver_bulk_status = self.get_transceiver_bulk_status()
-        return transceiver_bulk_status.get("voltage", "N/A")
-
-    def get_tx_bias(self):
-        """
-        Retrieves the TX bias current of this SFP
-        Returns:
-            A list of four integer numbers, representing TX bias in mA
-            for channel 0 to channel 4.
-            Ex. ['110.09', '111.12', '108.21', '112.09']
-        """
-        transceiver_bulk_status = self.get_transceiver_bulk_status()
-        tx1_bs = transceiver_bulk_status.get("tx1bias", "N/A")
-        tx2_bs = transceiver_bulk_status.get("tx2bias", "N/A")
-        tx3_bs = transceiver_bulk_status.get("tx3bias", "N/A")
-        tx4_bs = transceiver_bulk_status.get("tx4bias", "N/A")
-        tx_bias_list = [tx1_bs, tx2_bs, tx3_bs, tx4_bs]
-        return tx_bias_list
-
-    def get_rx_power(self):
-        """
-        Retrieves the received optical power for this SFP
-        Returns:
-            A list of four integer numbers, representing received optical
-            power in mW for channel 0 to channel 4.
-            Ex. ['1.77', '1.71', '1.68', '1.70']
-        """
-        rx_power_list = []
-        if self.sfp_type == OSFP_TYPE:
-            # OSFP not supported on our platform yet.
-            return None
-
-        elif self.sfp_type == QSFP_TYPE:
-            offset = 0
-            offset_xcvr = 128
-
-            sfpd_obj = sff8436Dom()
-            if sfpd_obj is None:
-                return None
-
-            if self.dom_rx_power_supported:
-                dom_channel_monitor_raw = self.__read_eeprom_specific_bytes(
-                    (offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH)
-                if dom_channel_monitor_raw is not None:
-                    dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(
-                        dom_channel_monitor_raw, 0)
-                    rx_power_list.append(self.__convert_string_to_num(
-                        dom_channel_monitor_data['data']['RX1Power']['value']))
-                    rx_power_list.append(self.__convert_string_to_num(
-                        dom_channel_monitor_data['data']['RX2Power']['value']))
-                    rx_power_list.append(self.__convert_string_to_num(
-                        dom_channel_monitor_data['data']['RX3Power']['value']))
-                    rx_power_list.append(self.__convert_string_to_num(
-                        dom_channel_monitor_data['data']['RX4Power']['value']))
-                else:
-                    return None
-            else:
-                return None
-        else:
-            offset = 256
-
-            sfpd_obj = sff8472Dom()
-            if sfpd_obj is None:
-                return None
-
-            if self.dom_supported:
-                sfpd_obj._calibration_type = self.calibration
-
-                dom_channel_monitor_raw = self.__read_eeprom_specific_bytes(
-                    (offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH)
-                if dom_channel_monitor_raw is not None:
-                    dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(
-                        dom_channel_monitor_raw, 0)
-                    rx_power_list.append(self.__convert_string_to_num(
-                        dom_channel_monitor_data['data']['RXPower']['value']))
-                else:
-                    return None
-            else:
-                return None
-
-        return rx_power_list
-
-    def get_tx_power(self):
-        """
-        Retrieves the TX power of this SFP
-        Returns:
-            A list of four integer numbers, representing TX power in mW
-            for channel 0 to channel 4.
-            Ex. ['1.86', '1.86', '1.86', '1.86']
-        """
-        tx_power_list = []
-        if self.sfp_type == OSFP_TYPE:
-            # OSFP not supported on our platform yet.
-            return None
-
-        elif self.sfp_type == QSFP_TYPE:
-            offset = 0
-            offset_xcvr = 128
-
-            sfpd_obj = sff8436Dom()
-            if sfpd_obj is None:
-                return None
-
-            if self.dom_tx_power_supported:
-                dom_channel_monitor_raw = self.__read_eeprom_specific_bytes(
-                    (offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH)
-                if dom_channel_monitor_raw is not None:
-                    dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(
-                        dom_channel_monitor_raw, 0)
-                    tx_power_list.append(self.__convert_string_to_num(
-                        dom_channel_monitor_data['data']['TX1Power']['value']))
-                    tx_power_list.append(self.__convert_string_to_num(
-                        dom_channel_monitor_data['data']['TX2Power']['value']))
-                    tx_power_list.append(self.__convert_string_to_num(
-                        dom_channel_monitor_data['data']['TX3Power']['value']))
-                    tx_power_list.append(self.__convert_string_to_num(
-                        dom_channel_monitor_data['data']['TX4Power']['value']))
-                else:
-                    return None
-            else:
-                return None
-        else:
-            offset = 256
-            sfpd_obj = sff8472Dom()
-            if sfpd_obj is None:
-                return None
-
-            if self.dom_supported:
-                sfpd_obj._calibration_type = self.calibration
-
-                dom_channel_monitor_raw = self.__read_eeprom_specific_bytes(
-                    (offset + SFP_CHANNL_MON_OFFSET), SFP_CHANNL_MON_WIDTH)
-                if dom_channel_monitor_raw is not None:
-                    dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params(
-                        dom_channel_monitor_raw, 0)
-                    tx_power_list.append(self.__convert_string_to_num(
-                        dom_channel_monitor_data['data']['TXPower']['value']))
-                else:
-                    return None
-            else:
-                return None
-        return tx_power_list
-
-    def reset(self):
-        """
-        Reset SFP and return all user module settings to their default srate.
-        Returns:
-            A boolean, True if successful, False if not
-        """
-        if self.sfp_type != OSFP_TYPE:
-            return False
-
-        try:
-            reg_file = open(
-                "/".join([PORT_INFO_PATH, self.port_name, "qsfp_resetL"]), "w")
-        except IOError as e:
-            print("Error: unable to open file: %s" % str(e))
-            return False
-
-        # Convert our register value back to a hex string and write back
-        reg_file.seek(0)
-        reg_file.write(hex(0))
-        reg_file.close()
-
-        # Sleep 1 second to allow it to settle
-        time.sleep(1)
-
-        # Flip the bit back high and write back to the register to take port out of reset
-        try:
-            reg_file = open(
-                "/".join([PORT_INFO_PATH, self.port_name, "qsfp_resetL"]), "w")
-        except IOError as e:
-            print("Error: unable to open file: %s" % str(e))
-            return False
-
-        reg_file.seek(0)
-        reg_file.write(hex(1))
-        reg_file.close()
-
-        return True
-
-    def tx_disable(self, tx_disable):
-        """
-        Disable SFP TX for all channels
-        Args:
-            tx_disable : A Boolean, True to enable tx_disable mode, False to disable
-                         tx_disable mode.
-        Returns:
-            A boolean, True if tx_disable is set successfully, False if not
-        """
-        if self.sfp_type == QSFP_TYPE:
-            sysfsfile_eeprom = None
-            try:
-                tx_disable_ctl = 0xf if tx_disable else 0x0
-                buffer = create_string_buffer(1)
-                buffer[0] = chr(tx_disable_ctl)
-                # Write to eeprom
-                sysfsfile_eeprom = open(
-                    self.port_to_eeprom_mapping[self.port_num], "r+b")
-                sysfsfile_eeprom.seek(QSFP_CONTROL_OFFSET)
-                sysfsfile_eeprom.write(buffer[0])
-            except IOError as e:
-                print("Error: unable to open file: %s" % str(e))
-                return False
-            finally:
-                if sysfsfile_eeprom is not None:
-                    sysfsfile_eeprom.close()
-                    time.sleep(0.01)
-            return True
-        return False
-
-    def tx_disable_channel(self, channel, disable):
-        """
-        Sets the tx_disable for specified SFP channels
-        Args:
-            channel : A hex of 4 bits (bit 0 to bit 3) which represent channel 0 to 3,
-                      e.g. 0x5 for channel 0 and channel 2.
-            disable : A boolean, True to disable TX channels specified in channel,
-                      False to enable
-        Returns:
-            A boolean, True if successful, False if not
-        """
-        if self.sfp_type == QSFP_TYPE:
-            sysfsfile_eeprom = None
-            try:
-                channel_state = self.get_tx_disable_channel()
-                tx_enable_mask = [0xe, 0xd, 0xb, 0x7]
-                tx_disable_mask = [0x1, 0x3, 0x7, 0xf]
-                tx_disable_ctl = channel_state | tx_disable_mask[
-                    channel] if disable else channel_state & tx_enable_mask[channel]
-                buffer = create_string_buffer(1)
-                buffer[0] = chr(tx_disable_ctl)
-                # Write to eeprom
-                sysfsfile_eeprom = open(
-                    self.port_to_eeprom_mapping[self.port_num], "r+b")
-                sysfsfile_eeprom.seek(QSFP_CONTROL_OFFSET)
-                sysfsfile_eeprom.write(buffer[0])
-            except IOError as e:
-                print("Error: unable to open file: %s" % str(e))
-                return False
-            finally:
-                if sysfsfile_eeprom is not None:
-                    sysfsfile_eeprom.close()
-                    time.sleep(0.01)
-            return True
-        return False
-
-    def set_lpmode(self, lpmode):
-        """
-        Sets the lpmode (low power mode) of SFP
-        Args:
-            lpmode: A Boolean, True to enable lpmode, False to disable it
-            Note  : lpmode can be overridden by set_power_override
-        Returns:
-            A boolean, True if lpmode is set successfully, False if not
-        """
-        if self.sfp_type != OSFP_TYPE:
-            return False
-
-        try:
-            reg_file = open(
-                "/".join([PORT_INFO_PATH, self.port_name, "qsfp_lpmode"]), "r+")
-        except IOError as e:
-            print("Error: unable to open file: %s" % str(e))
-            return False
-
-        content = hex(lpmode)
-
-        reg_file.seek(0)
-        reg_file.write(content)
-        reg_file.close()
-
-        return True
-
-    def set_power_override(self, power_override, power_set):
-        """
-        Sets SFP power level using power_override and power_set
-        Args:
-            power_override :
-                    A Boolean, True to override set_lpmode and use power_set
-                    to control SFP power, False to disable SFP power control
-                    through power_override/power_set and use set_lpmode
-                    to control SFP power.
-            power_set :
-                    Only valid when power_override is True.
-                    A Boolean, True to set SFP to low power mode, False to set
-                    SFP to high power mode.
-        Returns:
-            A boolean, True if power-override and power_set are set successfully,
-            False if not
-        """
-        if self.sfp_type == QSFP_TYPE:
-            try:
-                power_override_bit = 0
-                if power_override:
-                    power_override_bit |= 1 << 0
-
-                power_set_bit = 0
-                if power_set:
-                    power_set_bit |= 1 << 1
-
-                buffer = create_string_buffer(1)
-                buffer[0] = chr(power_override_bit | power_set_bit)
-                # Write to eeprom
-                sysfsfile_eeprom = open(
-                    self.port_to_eeprom_mapping[self.port_num], "r+b")
-                sysfsfile_eeprom.seek(QSFP_POWEROVERRIDE_OFFSET)
-                sysfsfile_eeprom.write(buffer[0])
-            except IOError as e:
-                print("Error: unable to open file: %s" % str(e))
-                return False
-            finally:
-                if sysfsfile_eeprom is not None:
-                    sysfsfile_eeprom.close()
-                    time.sleep(0.01)
-            return True
-        return False
-
-    def get_name(self):
-        """
-        Retrieves the name of the device
-            Returns:
-            string: The name of the device
-        """
-        sfputil_helper = SfpUtilHelper()
-        sfputil_helper.read_porttab_mappings(
-            self.__get_path_to_port_config_file())
-        name = sfputil_helper.logical[self.index] or "Unknown"
-        return name
-
-    def get_presence(self):
-        """
-        Retrieves the presence of the PSU
-        Returns:
-            bool: True if PSU is present, False if not
-        """
-        sysfs_filename = "sfp_modabs" if self.sfp_type == SFP_TYPE else "qsfp_modprsL"
-        reg_path = "/".join([PORT_INFO_PATH, self.port_name, sysfs_filename])
-
-        # Read status
-        try:
-            reg_file = open(reg_path)
-            content = reg_file.readline().rstrip()
-            reg_value = int(content)
-        except IOError as e:
-            print("Error: unable to open file: %s" % str(e))
-            return False
-
-        # Module present is active low
-        if reg_value == 0:
-            return True
-
-        return False
-
-    def get_model(self):
-        """
-        Retrieves the model number (or part number) of the device
-        Returns:
-            string: Model/part number of device
-        """
-        transceiver_dom_info_dict = self.get_transceiver_info()
-        return transceiver_dom_info_dict.get("model", "N/A")
-
-    def get_serial(self):
-        """
-        Retrieves the serial number of the device
-        Returns:
-            string: Serial number of device
-        """
-        transceiver_dom_info_dict = self.get_transceiver_info()
-        return transceiver_dom_info_dict.get("serial", "N/A")
-
-    def get_status(self):
-        """
-        Retrieves the operational status of the device
-        Returns:
-            A boolean value, True if device is operating properly, False if not
-        """
-        return self.get_presence()
diff --git a/device/celestica/x86_64-cel_silverstone-r0/system_health_monitoring_config.json b/device/celestica/x86_64-cel_silverstone-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000000..56fda7de4f5d
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone-r0/system_health_monitoring_config.json
@@ -0,0 +1,13 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "psu.temperature"
+    ],
+    "user_defined_checkers": [],
+    "polling_interval": 60,
+    "led_color": {
+        "fault": "amber",
+        "normal": "green",
+        "booting": "green_blink_1hz"
+    }
+}
diff --git a/device/celestica/x86_64-cel_silverstone-r0/warm-reboot_plugin b/device/celestica/x86_64-cel_silverstone-r0/warm-reboot_plugin
new file mode 100755
index 000000000000..22212b5afe13
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone-r0/warm-reboot_plugin
@@ -0,0 +1,4 @@
+#!/bin/bash
+
+# Set all LEDs to BMC's control
+ipmitool raw 0x3a 0x09 0x02 0x01 &> /dev/null
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers.json.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers.json.j2
new file mode 100644
index 000000000000..b67cf577ab75
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers.json.j2
@@ -0,0 +1,3 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
+
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_def.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_def.j2
new file mode 100644
index 000000000000..740cfdf79e96
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_def.j2
@@ -0,0 +1,46 @@
+{%- set default_cable = '300m' %}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {% for port_idx in range(0,32) %}
+        {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
+    {% endfor %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "xoff": "4625920",
+            "size": "12766208",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_lossless_pool": {
+            "size": "12766208",
+            "type": "egress",
+            "mode": "static"
+        },
+        "egress_lossy_pool": {
+            "size": "7326924",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"[BUFFER_POOL|ingress_lossless_pool]",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"0",
+            "static_th":"12766208"
+        },
+        "egress_lossy_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"1518",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_t0.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_t0.j2
new file mode 100644
index 000000000000..44fcf21887a6
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_t0.j2
@@ -0,0 +1,45 @@
+{%- set default_cable = '300m' %}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {% for port_idx in range(0,32) %}
+        {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
+    {% endfor %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "12766208",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_lossless_pool": {
+            "size": "12766208",
+            "type": "egress",
+            "mode": "static"
+        },
+        "egress_lossy_pool": {
+            "size": "7326924",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"[BUFFER_POOL|ingress_lossless_pool]",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"0",
+            "static_th":"12766208"
+        },
+        "egress_lossy_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"1518",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_t1.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_t1.j2
new file mode 100644
index 000000000000..740cfdf79e96
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/buffers_defaults_t1.j2
@@ -0,0 +1,46 @@
+{%- set default_cable = '300m' %}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {% for port_idx in range(0,32) %}
+        {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
+    {% endfor %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "xoff": "4625920",
+            "size": "12766208",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_lossless_pool": {
+            "size": "12766208",
+            "type": "egress",
+            "mode": "static"
+        },
+        "egress_lossy_pool": {
+            "size": "7326924",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"[BUFFER_POOL|ingress_lossless_pool]",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"0",
+            "static_th":"12766208"
+        },
+        "egress_lossy_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"1518",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/hwsku.json b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/hwsku.json
new file mode 100644
index 000000000000..b97d516509ec
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/hwsku.json
@@ -0,0 +1,164 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "off",
+            "fec": "rs"
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/l2/config b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/l2/config
new file mode 100644
index 000000000000..45a7b84d5032
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/l2/config
@@ -0,0 +1,3 @@
+l2_mem_entries=139264
+l3_mem_entries=8192
+l3_alpm_enable=0
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/l3/config b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/l3/config
new file mode 100644
index 000000000000..3467c1b39716
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/l3/config
@@ -0,0 +1,3 @@
+l2_mem_entries=40000
+l3_mem_entries=40000
+l3_alpm_enable=2
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/pg_profile_lookup.ini b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/pg_profile_lookup.ini
new file mode 100644
index 000000000000..9f2eacb6fc42
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/pg_profile_lookup.ini
@@ -0,0 +1,17 @@
+# PG lossless profiles.
+# speed cable size      xon     xoff   threshold xon_offset
+  10000  5m   56368     18432   55120  -3        2496
+  25000  5m   56368     18432   55120  -3        2496
+  40000  5m   56368     18432   55120  -3        2496
+  50000  5m   56368     18432   55120  -3        2496
+ 100000  5m   56368     18432   55120  -3        2496
+  10000  40m  56368     18432   55120  -3        2496
+  25000  40m  56368     18432   55120  -3        2496
+  40000  40m  56368     18432   55120  -3        2496
+  50000  40m  56368     18432   55120  -3        2496
+ 100000  40m  56368     18432   55120  -3        2496
+  10000  300m 56368     18432   55120  -3        2496
+  25000  300m 56368     18432   55120  -3        2496
+  40000  300m 56368     18432   55120  -3        2496
+  50000  300m 56368     18432   55120  -3        2496
+ 100000  300m 56368     18432   55120  -3        2496
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/platform-def.json b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/platform-def.json
new file mode 100644
index 000000000000..4644f6e4549d
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/platform-def.json
@@ -0,0 +1,23 @@
+{
+    "fec-mode": {
+        "Ethernet0-127": {
+            "1": {
+                 "10000":  [ "none", "fc" ],
+                 "25000":  [ "none", "fc" ]
+            },
+            "2": {
+                 "20000":  [ "none", "fc" ],
+                 "50000":  [ "none", "rs" ]
+            },
+            "4": {
+                 "40000":  [ "none", "fc" ],
+                 "100000": [ "none", "rs" ]
+            }
+        }
+    },
+    "native-port-supported-speeds": {
+        "Ethernet0-127": {
+            "4": ["100000","40000"]
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/port_config.ini b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/port_config.ini
new file mode 100644
index 000000000000..f7929e6f5c17
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/port_config.ini
@@ -0,0 +1,33 @@
+# name          lanes                                    alias         index    speed
+Ethernet0       33,34,35,36,37,38,39,40                  Eth1/1        1        400000
+Ethernet8       41,42,43,44,45,46,47,48                  Eth1/2        2        400000
+Ethernet16      49,50,51,52,53,54,55,56                  Eth1/3        3        400000
+Ethernet24      57,58,59,60,61,62,63,64                  Eth1/4        4        400000
+Ethernet32      65,66,67,68,69,70,71,72                  Eth1/5        5        400000
+Ethernet40      73,74,75,76,77,78,79,80                  Eth1/6        6        400000
+Ethernet48      81,82,83,84,85,86,87,88                  Eth1/7        7        400000
+Ethernet56      89,90,91,92,93,94,95,96                  Eth1/8        8        400000
+Ethernet64      1,2,3,4,5,6,7,8                          Eth1/9        9        400000
+Ethernet72      9,10,11,12,13,14,15,16                   Eth1/10       10       400000
+Ethernet80      17,18,19,20,21,22,23,24                  Eth1/11       11       400000
+Ethernet88      25,26,27,28,29,30,31,32                  Eth1/12       12       400000
+Ethernet96      97,98,99,100,101,102,103,104             Eth1/13       13       400000
+Ethernet104     105,106,107,108,109,110,111,112          Eth1/14       14       400000
+Ethernet112     113,114,115,116,117,118,119,120          Eth1/15       15       400000
+Ethernet120     121,122,123,124,125,126,127,128          Eth1/16       16       400000
+Ethernet128     129,130,131,132,133,134,135,136          Eth1/17       17       400000
+Ethernet136     137,138,139,140,141,142,143,144          Eth1/18       18       400000
+Ethernet144     145,146,147,148,149,150,151,152          Eth1/19       19       400000
+Ethernet152     153,154,155,156,157,158,159,160          Eth1/20       20       400000
+Ethernet160     225,226,227,228,229,230,231,232          Eth1/21       21       400000
+Ethernet168     233,234,235,236,237,238,239,240          Eth1/22       22       400000
+Ethernet176     241,242,243,244,245,246,247,248          Eth1/23       23       400000
+Ethernet184     249,250,251,252,253,254,255,256          Eth1/24       24       400000
+Ethernet192     161,162,163,164,165,166,167,168          Eth1/25       25       400000
+Ethernet200     169,170,171,172,173,174,175,176          Eth1/26       26       400000
+Ethernet208     177,178,179,180,181,182,183,184          Eth1/27       27       400000
+Ethernet216     185,186,187,188,189,190,191,192          Eth1/28       28       400000
+Ethernet224     193,194,195,196,197,198,199,200          Eth1/29       29       400000
+Ethernet232     201,202,203,204,205,206,207,208          Eth1/30       30       400000
+Ethernet240     209,210,211,212,213,214,215,216          Eth1/31       31       400000
+Ethernet248     217,218,219,220,221,222,223,224          Eth1/32       32       400000
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/qos.json.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/qos.json.j2
new file mode 100644
index 000000000000..3e548325ea30
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/sai.profile b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/sai.profile
new file mode 100644
index 000000000000..550bfe181df4
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/sai.profile
@@ -0,0 +1,2 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th3-32x400G.config.bcm
+SAI_NUM_ECMP_MEMBERS=64
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/sai_postinit_cmd.soc b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/sai_postinit_cmd.soc
new file mode 100644
index 000000000000..731625308a5e
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/sai_postinit_cmd.soc
@@ -0,0 +1,2 @@
+modreg ING_MISC_CONFIG INPUT_PRI_TAGGED=1
+modreg ING_MISC_CONFIG  INPUT_PRI_UNTAGGED=1
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/th3-32x400G.config.bcm b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/th3-32x400G.config.bcm
new file mode 100644
index 000000000000..f478e2ea85eb
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2/th3-32x400G.config.bcm
@@ -0,0 +1,231 @@
+pbmp_xport_xe.0=0x8ffff8ffffcffff8ffff8ffff8ffffcffff9fffe
+#pbmp_xport_xe.0=0x8111181111c1111811118111181111c111182222
+ccm_dma_enable=0
+ccmdma_intr_enable=0
+ctr_evict_enable=0
+mem_cache_enable=0
+parity_correction=0
+parity_enable=0
+phy_enable=0
+phy_null=1
+pll_bypass=1
+
+sai_tunnel_global_sip_mask_enable=1
+
+port_fec=9
+
+#portmap_38=257:10
+#portmap_118=258:10
+
+
+portmap_20=33:400
+portmap_24=41:400
+portmap_28=49:400
+portmap_32=57:400
+portmap_40=65:400
+portmap_44=73:400
+portmap_48=81:400
+portmap_52=89:400
+portmap_1=1:400
+portmap_5=9:400
+portmap_9=17:400
+portmap_13=25:400
+portmap_60=97:400
+portmap_64=105:400
+portmap_68=113:400
+portmap_72=121:400
+portmap_80=129:400
+portmap_84=137:400
+portmap_88=145:400
+portmap_92=153:400
+portmap_140=225:400
+portmap_144=233:400
+portmap_148=241:400
+portmap_152=249:400
+portmap_100=161:400
+portmap_104=169:400
+portmap_108=177:400
+portmap_112=185:400
+portmap_120=193:400
+portmap_124=201:400
+portmap_128=209:400
+portmap_132=217:400
+
+phy_chain_rx_lane_map_physical{33.0}=0x65732041
+phy_chain_tx_lane_map_physical{33.0}=0x47206531
+phy_chain_rx_lane_map_physical{41.0}=0x07561243
+phy_chain_tx_lane_map_physical{41.0}=0x36207514
+phy_chain_rx_lane_map_physical{49.0}=0x54632071
+phy_chain_tx_lane_map_physical{49.0}=0x06241735
+phy_chain_rx_lane_map_physical{57.0}=0x07561243
+phy_chain_tx_lane_map_physical{57.0}=0x35207614
+phy_chain_rx_lane_map_physical{65.0}=0x45623170
+phy_chain_tx_lane_map_physical{65.0}=0x51260734
+phy_chain_rx_lane_map_physical{73.0}=0x07561243
+phy_chain_tx_lane_map_physical{73.0}=0x37245610
+phy_chain_rx_lane_map_physical{81.0}=0x45632071
+phy_chain_tx_lane_map_physical{81.0}=0x51260734
+phy_chain_rx_lane_map_physical{89.0}=0x07561243
+phy_chain_tx_lane_map_physical{89.0}=0x26437510
+phy_chain_rx_lane_map_physical{1.0}=0x30176524
+phy_chain_tx_lane_map_physical{1.0}=0x20615374
+phy_chain_rx_lane_map_physical{9.0}=0x37562041
+phy_chain_tx_lane_map_physical{9.0}=0x05176432
+phy_chain_rx_lane_map_physical{17.0}=0x43607251
+phy_chain_tx_lane_map_physical{17.0}=0x70261435
+phy_chain_rx_lane_map_physical{25.0}=0x60347125
+phy_chain_tx_lane_map_physical{25.0}=0x46357120
+phy_chain_rx_lane_map_physical{97.0}=0x47601352
+phy_chain_tx_lane_map_physical{97.0}=0x04265137
+phy_chain_rx_lane_map_physical{105.0}=0x73206415
+phy_chain_tx_lane_map_physical{105.0}=0x26374150
+phy_chain_rx_lane_map_physical{113.0}=0x47632051
+phy_chain_tx_lane_map_physical{113.0}=0x03254617
+phy_chain_rx_lane_map_physical{121.0}=0x63027415
+phy_chain_tx_lane_map_physical{121.0}=0x63721045
+phy_chain_rx_lane_map_physical{129.0}=0x30154627
+phy_chain_tx_lane_map_physical{129.0}=0x04735261
+phy_chain_rx_lane_map_physical{137.0}=0x24753061
+phy_chain_tx_lane_map_physical{137.0}=0x37614520
+phy_chain_rx_lane_map_physical{145.0}=0x47601352
+phy_chain_tx_lane_map_physical{145.0}=0x63274510
+phy_chain_rx_lane_map_physical{153.0}=0x07361524
+phy_chain_tx_lane_map_physical{153.0}=0x36527104
+phy_chain_rx_lane_map_physical{225.0}=0x56410273
+phy_chain_tx_lane_map_physical{225.0}=0x10274635
+phy_chain_rx_lane_map_physical{233.0}=0x15740263
+phy_chain_tx_lane_map_physical{233.0}=0x24351607
+phy_chain_rx_lane_map_physical{241.0}=0x74015263
+phy_chain_tx_lane_map_physical{241.0}=0x04152637
+phy_chain_rx_lane_map_physical{249.0}=0x62037514
+phy_chain_tx_lane_map_physical{249.0}=0x72453160
+phy_chain_rx_lane_map_physical{161.0}=0x46510273
+phy_chain_tx_lane_map_physical{161.0}=0x01653724
+phy_chain_rx_lane_map_physical{169.0}=0x25743160
+phy_chain_tx_lane_map_physical{169.0}=0x07216435
+phy_chain_rx_lane_map_physical{177.0}=0x46510273
+phy_chain_tx_lane_map_physical{177.0}=0x01652734
+phy_chain_rx_lane_map_physical{185.0}=0x25743160
+phy_chain_tx_lane_map_physical{185.0}=0x37016425
+phy_chain_rx_lane_map_physical{193.0}=0x46510372
+phy_chain_tx_lane_map_physical{193.0}=0x06153724
+phy_chain_rx_lane_map_physical{201.0}=0x25743160
+phy_chain_tx_lane_map_physical{201.0}=0x36017524
+phy_chain_rx_lane_map_physical{209.0}=0x47601352
+phy_chain_tx_lane_map_physical{209.0}=0x04152736
+phy_chain_rx_lane_map_physical{217.0}=0x26453170
+phy_chain_tx_lane_map_physical{217.0}=0x36027415
+
+serdes_core_rx_polarity_flip_physical{33}=0x29
+serdes_core_tx_polarity_flip_physical{33}=0xfe
+serdes_core_rx_polarity_flip_physical{41}=0xb1
+serdes_core_tx_polarity_flip_physical{41}=0xe8
+serdes_core_rx_polarity_flip_physical{49}=0xca
+serdes_core_tx_polarity_flip_physical{49}=0xb6
+serdes_core_rx_polarity_flip_physical{57}=0x9b
+serdes_core_tx_polarity_flip_physical{57}=0xdc
+serdes_core_rx_polarity_flip_physical{65}=0x17
+serdes_core_tx_polarity_flip_physical{65}=0x86
+serdes_core_rx_polarity_flip_physical{73}=0x9b
+serdes_core_tx_polarity_flip_physical{73}=0x55
+serdes_core_rx_polarity_flip_physical{81}=0xa
+serdes_core_tx_polarity_flip_physical{81}=0x6
+serdes_core_rx_polarity_flip_physical{89}=0x9b
+serdes_core_tx_polarity_flip_physical{89}=0x48
+serdes_core_rx_polarity_flip_physical{1}=0xec
+serdes_core_tx_polarity_flip_physical{1}=0x56
+serdes_core_rx_polarity_flip_physical{9}=0x13
+serdes_core_tx_polarity_flip_physical{9}=0xa6
+serdes_core_rx_polarity_flip_physical{17}=0x5a
+serdes_core_tx_polarity_flip_physical{17}=0xc6
+serdes_core_rx_polarity_flip_physical{25}=0xf
+serdes_core_tx_polarity_flip_physical{25}=0x4e
+serdes_core_rx_polarity_flip_physical{97}=0x17
+serdes_core_tx_polarity_flip_physical{97}=0x2e
+serdes_core_rx_polarity_flip_physical{105}=0xce
+serdes_core_tx_polarity_flip_physical{105}=0x7c
+serdes_core_rx_polarity_flip_physical{113}=0xa
+serdes_core_tx_polarity_flip_physical{113}=0x35
+
+serdes_core_rx_polarity_flip_physical{121}=0xb9
+serdes_core_tx_polarity_flip_physical{121}=0xef
+serdes_core_rx_polarity_flip_physical{129}=0xe8
+serdes_core_tx_polarity_flip_physical{129}=0xac
+serdes_core_rx_polarity_flip_physical{137}=0xcb
+serdes_core_tx_polarity_flip_physical{137}=0x9c
+serdes_core_rx_polarity_flip_physical{145}=0x17
+serdes_core_tx_polarity_flip_physical{145}=0x32
+serdes_core_rx_polarity_flip_physical{153}=0xb9
+serdes_core_tx_polarity_flip_physical{153}=0xaf
+serdes_core_rx_polarity_flip_physical{225}=0xaa
+serdes_core_tx_polarity_flip_physical{225}=0x7
+serdes_core_rx_polarity_flip_physical{233}=0x31
+serdes_core_tx_polarity_flip_physical{233}=0x47
+serdes_core_rx_polarity_flip_physical{241}=0xe8
+serdes_core_tx_polarity_flip_physical{241}=0x9e
+serdes_core_rx_polarity_flip_physical{249}=0xec
+serdes_core_tx_polarity_flip_physical{249}=0x1f
+serdes_core_rx_polarity_flip_physical{161}=0x6a
+serdes_core_tx_polarity_flip_physical{161}=0xd4
+serdes_core_rx_polarity_flip_physical{169}=0x9e
+serdes_core_tx_polarity_flip_physical{169}=0x7b
+serdes_core_rx_polarity_flip_physical{177}=0x6a
+serdes_core_tx_polarity_flip_physical{177}=0xcc
+serdes_core_rx_polarity_flip_physical{185}=0x9e
+serdes_core_tx_polarity_flip_physical{185}=0x58
+serdes_core_rx_polarity_flip_physical{193}=0x6f
+serdes_core_tx_polarity_flip_physical{193}=0x24
+serdes_core_rx_polarity_flip_physical{201}=0x9e
+serdes_core_tx_polarity_flip_physical{201}=0xdf
+serdes_core_rx_polarity_flip_physical{209}=0x17
+serdes_core_tx_polarity_flip_physical{209}=0xe9
+serdes_core_rx_polarity_flip_physical{217}=0xec
+serdes_core_tx_polarity_flip_physical{217}=0x68
+
+#dport_map_port_20=1
+#dport_map_port_24=2
+#dport_map_port_28=3
+#dport_map_port_32=4
+#dport_map_port_40=5
+#dport_map_port_44=6
+#dport_map_port_48=7
+#dport_map_port_52=8
+#dport_map_port_1=9
+#dport_map_port_5=10
+#dport_map_port_9=11
+#dport_map_port_13=12
+#dport_map_port_60=13
+#dport_map_port_64=14
+#dport_map_port_68=15
+#dport_map_port_72=16
+#dport_map_port_80=17
+#dport_map_port_84=18
+#dport_map_port_88=19
+#dport_map_port_92=20
+#dport_map_port_140=21
+#dport_map_port_144=22
+#dport_map_port_148=23
+#dport_map_port_152=24
+#dport_map_port_100=25
+#dport_map_port_104=26
+#dport_map_port_108=27
+#dport_map_port_112=28
+#dport_map_port_120=29
+#dport_map_port_124=30
+#dport_map_port_128=31
+#dport_map_port_132=32
+#
+#dport_map_port_38=33
+#dport_map_port_118=34
+
+
+
+core_clock_frequency=1325
+dpr_clock_frequency=1000
+device_clock_frequency=1325
+port_flex_enable=1
+
+#firmware load method, use fast load
+load_firmware=0x2
+
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers.json.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers.json.j2
new file mode 100644
index 000000000000..b67cf577ab75
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers.json.j2
@@ -0,0 +1,3 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
+
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_def.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_def.j2
new file mode 100644
index 000000000000..740cfdf79e96
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_def.j2
@@ -0,0 +1,46 @@
+{%- set default_cable = '300m' %}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {% for port_idx in range(0,32) %}
+        {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
+    {% endfor %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "xoff": "4625920",
+            "size": "12766208",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_lossless_pool": {
+            "size": "12766208",
+            "type": "egress",
+            "mode": "static"
+        },
+        "egress_lossy_pool": {
+            "size": "7326924",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"[BUFFER_POOL|ingress_lossless_pool]",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"0",
+            "static_th":"12766208"
+        },
+        "egress_lossy_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"1518",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_t0.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_t0.j2
new file mode 100644
index 000000000000..44fcf21887a6
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_t0.j2
@@ -0,0 +1,45 @@
+{%- set default_cable = '300m' %}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {% for port_idx in range(0,32) %}
+        {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
+    {% endfor %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "12766208",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_lossless_pool": {
+            "size": "12766208",
+            "type": "egress",
+            "mode": "static"
+        },
+        "egress_lossy_pool": {
+            "size": "7326924",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"[BUFFER_POOL|ingress_lossless_pool]",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"0",
+            "static_th":"12766208"
+        },
+        "egress_lossy_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"1518",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_t1.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_t1.j2
new file mode 100644
index 000000000000..740cfdf79e96
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/buffers_defaults_t1.j2
@@ -0,0 +1,46 @@
+{%- set default_cable = '300m' %}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {% for port_idx in range(0,32) %}
+        {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %}
+    {% endfor %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "xoff": "4625920",
+            "size": "12766208",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_lossless_pool": {
+            "size": "12766208",
+            "type": "egress",
+            "mode": "static"
+        },
+        "egress_lossy_pool": {
+            "size": "7326924",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"[BUFFER_POOL|ingress_lossless_pool]",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"0",
+            "static_th":"12766208"
+        },
+        "egress_lossy_profile": {
+            "pool":"[BUFFER_POOL|egress_lossless_pool]",
+            "size":"1518",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/hwsku.json b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/hwsku.json
new file mode 100644
index 000000000000..1a6031b4b543
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/hwsku.json
@@ -0,0 +1,100 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "4x100G"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "4x100G"
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/l2/config b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/l2/config
new file mode 100644
index 000000000000..45a7b84d5032
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/l2/config
@@ -0,0 +1,3 @@
+l2_mem_entries=139264
+l3_mem_entries=8192
+l3_alpm_enable=0
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/l3/config b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/l3/config
new file mode 100644
index 000000000000..3467c1b39716
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/l3/config
@@ -0,0 +1,3 @@
+l2_mem_entries=40000
+l3_mem_entries=40000
+l3_alpm_enable=2
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/pg_profile_lookup.ini b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/pg_profile_lookup.ini
new file mode 100644
index 000000000000..9f2eacb6fc42
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/pg_profile_lookup.ini
@@ -0,0 +1,17 @@
+# PG lossless profiles.
+# speed cable size      xon     xoff   threshold xon_offset
+  10000  5m   56368     18432   55120  -3        2496
+  25000  5m   56368     18432   55120  -3        2496
+  40000  5m   56368     18432   55120  -3        2496
+  50000  5m   56368     18432   55120  -3        2496
+ 100000  5m   56368     18432   55120  -3        2496
+  10000  40m  56368     18432   55120  -3        2496
+  25000  40m  56368     18432   55120  -3        2496
+  40000  40m  56368     18432   55120  -3        2496
+  50000  40m  56368     18432   55120  -3        2496
+ 100000  40m  56368     18432   55120  -3        2496
+  10000  300m 56368     18432   55120  -3        2496
+  25000  300m 56368     18432   55120  -3        2496
+  40000  300m 56368     18432   55120  -3        2496
+  50000  300m 56368     18432   55120  -3        2496
+ 100000  300m 56368     18432   55120  -3        2496
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/platform-def.json b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/platform-def.json
new file mode 100644
index 000000000000..4644f6e4549d
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/platform-def.json
@@ -0,0 +1,23 @@
+{
+    "fec-mode": {
+        "Ethernet0-127": {
+            "1": {
+                 "10000":  [ "none", "fc" ],
+                 "25000":  [ "none", "fc" ]
+            },
+            "2": {
+                 "20000":  [ "none", "fc" ],
+                 "50000":  [ "none", "rs" ]
+            },
+            "4": {
+                 "40000":  [ "none", "fc" ],
+                 "100000": [ "none", "rs" ]
+            }
+        }
+    },
+    "native-port-supported-speeds": {
+        "Ethernet0-127": {
+            "4": ["100000","40000"]
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/port_config.ini b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/port_config.ini
new file mode 100644
index 000000000000..77deb1931856
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/port_config.ini
@@ -0,0 +1,129 @@
+# name          lanes       alias           index       speed
+Ethernet0       33,34       QSFP1/1         1           100000
+Ethernet2       35,36       QSFP1/2         1           100000
+Ethernet4       37,38       QSFP1/3         1           100000
+Ethernet6       39,40       QSFP1/4         1           100000
+Ethernet8       41,42       QSFP2/1         2           100000
+Ethernet10      43,44       QSFP2/2         2           100000
+Ethernet12      45,46       QSFP2/3         2           100000
+Ethernet14      47,48       QSFP2/4         2           100000
+Ethernet16      49,50       QSFP3/1         3           100000
+Ethernet18      51,52       QSFP3/2         3           100000
+Ethernet20      53,54       QSFP3/3         3           100000
+Ethernet22      55,56       QSFP3/4         3           100000
+Ethernet24      57,58       QSFP4/1         4           100000
+Ethernet26      59,60       QSFP4/2         4           100000
+Ethernet28      61,62       QSFP4/3         4           100000
+Ethernet30      63,64       QSFP4/4         4           100000
+Ethernet32      65,66       QSFP5/1         5           100000
+Ethernet34      67,68       QSFP5/2         5           100000
+Ethernet36      69,70       QSFP5/3         5           100000
+Ethernet38      71,72       QSFP5/4         5           100000
+Ethernet40      73,74       QSFP6/1         6           100000
+Ethernet42      75,76       QSFP6/2         6           100000
+Ethernet44      77,78       QSFP6/3         6           100000
+Ethernet46      79,80       QSFP6/4         6           100000
+Ethernet48      81,82       QSFP7/1         7           100000
+Ethernet50      83,84       QSFP7/2         7           100000
+Ethernet52      85,86       QSFP7/3         7           100000
+Ethernet54      87,88       QSFP7/4         7           100000
+Ethernet56      89,90       QSFP8/1         8           100000
+Ethernet58      91,92       QSFP8/2         8           100000
+Ethernet60      93,94       QSFP8/3         8           100000
+Ethernet62      95,96       QSFP8/4         8           100000
+Ethernet64      1,2         QSFP9/1         9           100000
+Ethernet66      3,4         QSFP9/2         9           100000
+Ethernet68      5,6         QSFP9/3         9           100000
+Ethernet70      7,8         QSFP9/4         9           100000
+Ethernet72      9,10        QSFP10/1        10          100000
+Ethernet74      11,12       QSFP10/2        10          100000
+Ethernet76      13,14       QSFP10/3        10          100000
+Ethernet78      15,16       QSFP10/4        10          100000
+Ethernet80      17,18       QSFP11/1        11          100000
+Ethernet82      19,20       QSFP11/2        11          100000
+Ethernet84      21,22       QSFP11/3        11          100000
+Ethernet86      23,24       QSFP11/4        11          100000
+Ethernet88      25,26       QSFP12/1        12          100000
+Ethernet90      27,28       QSFP12/2        12          100000
+Ethernet92      29,30       QSFP12/3        12          100000
+Ethernet94      31,32       QSFP12/4        12          100000
+Ethernet96      97,98       QSFP13/1        13          100000
+Ethernet98      99,100      QSFP13/2        13          100000
+Ethernet100     101,102     QSFP13/3        13          100000
+Ethernet102     103,104     QSFP13/4        13          100000
+Ethernet104     105,106     QSFP14/1        14          100000
+Ethernet106     107,108     QSFP14/2        14          100000
+Ethernet108     109,110     QSFP14/3        14          100000
+Ethernet110     111,112     QSFP14/4        14          100000
+Ethernet112     113,114     QSFP15/1        15          100000
+Ethernet114     115,116     QSFP15/2        15          100000
+Ethernet116     117,118     QSFP15/3        15          100000
+Ethernet118     119,120     QSFP15/4        15          100000
+Ethernet120     121,122     QSFP16/1        16          100000
+Ethernet122     123,124     QSFP16/2        16          100000
+Ethernet124     125,126     QSFP16/3        16          100000
+Ethernet126     127,128     QSFP16/4        16          100000
+Ethernet128     129,130     QSFP17/1        17          100000
+Ethernet130     131,132     QSFP17/2        17          100000
+Ethernet132     133,134     QSFP17/3        17          100000
+Ethernet134     135,136     QSFP17/4        17          100000
+Ethernet136     137,138     QSFP18/1        18          100000
+Ethernet138     139,140     QSFP18/2        18          100000
+Ethernet140     141,142     QSFP18/3        18          100000
+Ethernet142     143,144     QSFP18/4        18          100000
+Ethernet144     145,146     QSFP19/1        19          100000
+Ethernet146     147,148     QSFP19/2        19          100000
+Ethernet148     149,150     QSFP19/3        19          100000
+Ethernet150     151,152     QSFP19/4        19          100000
+Ethernet152     153,154     QSFP20/1        20          100000
+Ethernet154     155,156     QSFP20/2        20          100000
+Ethernet156     157,158     QSFP20/3        20          100000
+Ethernet158     159,160     QSFP20/4        20          100000
+Ethernet160     225,226     QSFP21/1        21          100000
+Ethernet162     227,228     QSFP21/2        21          100000
+Ethernet164     229,230     QSFP21/3        21          100000
+Ethernet166     231,232     QSFP21/4        21          100000
+Ethernet168     233,234     QSFP22/1        22          100000
+Ethernet170     235,236     QSFP22/2        22          100000
+Ethernet172     237,238     QSFP22/3        22          100000
+Ethernet174     239,240     QSFP22/4        22          100000
+Ethernet176     241,242     QSFP23/1        23          100000
+Ethernet178     243,244     QSFP23/2        23          100000
+Ethernet180     245,246     QSFP23/3        23          100000
+Ethernet182     247,248     QSFP23/4        23          100000
+Ethernet184     249,250     QSFP24/1        24          100000
+Ethernet186     251,252     QSFP24/2        24          100000
+Ethernet188     253,254     QSFP24/3        24          100000
+Ethernet190     255,256     QSFP24/4        24          100000
+Ethernet192     161,162     QSFP25/1        25          100000
+Ethernet194     163,164     QSFP25/2        25          100000
+Ethernet196     165,166     QSFP25/3        25          100000
+Ethernet198     167,168     QSFP25/4        25          100000
+Ethernet200     169,170     QSFP26/1        26          100000
+Ethernet202     171,172     QSFP26/2        26          100000
+Ethernet204     173,174     QSFP26/3        26          100000
+Ethernet206     175,176     QSFP26/4        26          100000
+Ethernet208     177,178     QSFP27/1        27          100000
+Ethernet210     179,180     QSFP27/2        27          100000
+Ethernet212     181,182     QSFP27/3        27          100000
+Ethernet214     183,184     QSFP27/4        27          100000
+Ethernet216     185,186     QSFP28/1        28          100000
+Ethernet218     187,188     QSFP28/2        28          100000
+Ethernet220     189,190     QSFP28/3        28          100000
+Ethernet222     191,192     QSFP28/4        28          100000
+Ethernet224     193,194     QSFP29/1        29          100000
+Ethernet226     195,196     QSFP29/2        29          100000
+Ethernet228     197,198     QSFP29/3        29          100000
+Ethernet230     199,200     QSFP29/4        29          100000
+Ethernet232     201,202     QSFP30/1        30          100000
+Ethernet234     203,204     QSFP30/2        30          100000
+Ethernet236     205,206     QSFP30/3        30          100000
+Ethernet238     207,208     QSFP30/4        30          100000
+Ethernet240     209,210     QSFP31/1        31          100000
+Ethernet242     211,212     QSFP31/2        31          100000
+Ethernet244     213,214     QSFP31/3        31          100000
+Ethernet246     215,216     QSFP31/4        31          100000
+Ethernet248     217,218     QSFP32/1        32          100000
+Ethernet250     219,220     QSFP32/2        32          100000
+Ethernet252     221,222     QSFP32/3        32          100000
+Ethernet254     223,224     QSFP32/4        32          100000
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/qos.json.j2 b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/qos.json.j2
new file mode 100644
index 000000000000..3e548325ea30
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/sai.profile b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/sai.profile
new file mode 100644
index 000000000000..483e85c0c1fa
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/sai.profile
@@ -0,0 +1,2 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th3-128x100G.config.bcm
+SAI_NUM_ECMP_MEMBERS=64
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/th3-128x100G.config.bcm b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/th3-128x100G.config.bcm
new file mode 100644
index 000000000000..2aa1955c10bc
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/Silverstone_v2_128X100G/th3-128x100G.config.bcm
@@ -0,0 +1,445 @@
+pbmp_xport_xe.0=0x8ffff8ffffcffff8ffff8ffff8ffffcffff9fffe
+ccm_dma_enable=0
+ccmdma_intr_enable=0
+ctr_evict_enable=0
+mem_cache_enable=0
+parity_correction=0
+parity_enable=0
+phy_enable=0
+phy_null=1
+pll_bypass=1
+
+port_fec=3
+
+init_all_modules=0
+
+sai_tunnel_global_sip_mask_enable=1
+
+portmap_20=33:100:2
+portmap_21=35:100:2
+portmap_22=37:100:2
+portmap_23=39:100:2
+
+portmap_24=41:100:2
+portmap_25=43:100:2
+portmap_26=45:100:2
+portmap_27=47:100:2
+
+portmap_28=49:100:2
+portmap_29=51:100:2
+portmap_30=53:100:2
+portmap_31=55:100:2
+
+portmap_32=57:100:2
+portmap_33=59:100:2
+portmap_34=61:100:2
+portmap_35=63:100:2
+
+portmap_40=65:100:2
+portmap_41=67:100:2
+portmap_42=69:100:2
+portmap_43=71:100:2
+
+portmap_44=73:100:2
+portmap_45=75:100:2
+portmap_46=77:100:2
+portmap_47=79:100:2
+
+portmap_48=81:100:2
+portmap_49=83:100:2
+portmap_50=85:100:2
+portmap_51=87:100:2
+
+portmap_52=89:100:2
+portmap_53=91:100:2
+portmap_54=93:100:2
+portmap_55=95:100:2
+
+portmap_1=1:100:2
+portmap_2=3:100:2
+portmap_3=5:100:2
+portmap_4=7:100:2
+
+portmap_5=9:100:2
+portmap_6=11:100:2
+portmap_7=13:100:2
+portmap_8=15:100:2
+
+portmap_9=17:100:2
+portmap_10=19:100:2
+portmap_11=21:100:2
+portmap_12=23:100:2
+
+portmap_13=25:100:2
+portmap_14=27:100:2
+portmap_15=29:100:2
+portmap_16=31:100:2
+
+portmap_60=97:100:2
+portmap_61=99:100:2
+portmap_62=101:100:2
+portmap_63=103:100:2
+
+portmap_64=105:100:2
+portmap_65=107:100:2
+portmap_66=109:100:2
+portmap_67=111:100:2
+
+portmap_68=113:100:2
+portmap_69=115:100:2
+portmap_70=117:100:2
+portmap_71=119:100:2
+
+portmap_72=121:100:2
+portmap_73=123:100:2
+portmap_74=125:100:2
+portmap_75=127:100:2
+
+portmap_80=129:100:2
+portmap_81=131:100:2
+portmap_82=133:100:2
+portmap_83=135:100:2
+
+portmap_84=137:100:2
+portmap_85=139:100:2
+portmap_86=141:100:2
+portmap_87=143:100:2
+
+portmap_88=145:100:2
+portmap_89=147:100:2
+portmap_90=149:100:2
+portmap_91=151:100:2
+
+portmap_92=153:100:2
+portmap_93=155:100:2
+portmap_94=157:100:2
+portmap_95=159:100:2
+
+portmap_140=225:100:2
+portmap_141=227:100:2
+portmap_142=229:100:2
+portmap_143=231:100:2
+
+portmap_144=233:100:2
+portmap_145=235:100:2
+portmap_146=237:100:2
+portmap_147=239:100:2
+
+portmap_148=241:100:2
+portmap_149=243:100:2
+portmap_150=245:100:2
+portmap_151=247:100:2
+
+portmap_152=249:100:2
+portmap_153=251:100:2
+portmap_154=253:100:2
+portmap_155=255:100:2
+
+portmap_100=161:100:2
+portmap_101=163:100:2
+portmap_102=165:100:2
+portmap_103=167:100:2
+
+portmap_104=169:100:2
+portmap_105=171:100:2
+portmap_106=173:100:2
+portmap_107=175:100:2
+
+portmap_108=177:100:2
+portmap_109=179:100:2
+portmap_110=181:100:2
+portmap_111=183:100:2
+
+portmap_112=185:100:2
+portmap_113=187:100:2
+portmap_114=189:100:2
+portmap_115=191:100:2
+
+portmap_120=193:100:2
+portmap_121=195:100:2
+portmap_122=197:100:2
+portmap_123=199:100:2
+
+portmap_124=201:100:2
+portmap_125=203:100:2
+portmap_126=205:100:2
+portmap_127=207:100:2
+
+portmap_128=209:100:2
+portmap_129=211:100:2
+portmap_130=213:100:2
+portmap_131=215:100:2
+
+portmap_132=217:100:2
+portmap_133=219:100:2
+portmap_134=221:100:2
+portmap_135=223:100:2
+
+phy_chain_rx_lane_map_physical{33.0}=0x65732041
+phy_chain_tx_lane_map_physical{33.0}=0x47206531
+phy_chain_rx_lane_map_physical{41.0}=0x07561243
+phy_chain_tx_lane_map_physical{41.0}=0x36207514
+phy_chain_rx_lane_map_physical{49.0}=0x54632071
+phy_chain_tx_lane_map_physical{49.0}=0x06241735
+phy_chain_rx_lane_map_physical{57.0}=0x07561243
+phy_chain_tx_lane_map_physical{57.0}=0x35207614
+phy_chain_rx_lane_map_physical{65.0}=0x45623170
+phy_chain_tx_lane_map_physical{65.0}=0x51260734
+phy_chain_rx_lane_map_physical{73.0}=0x07561243
+phy_chain_tx_lane_map_physical{73.0}=0x37245610
+phy_chain_rx_lane_map_physical{81.0}=0x45632071
+phy_chain_tx_lane_map_physical{81.0}=0x51260734
+phy_chain_rx_lane_map_physical{89.0}=0x07561243
+phy_chain_tx_lane_map_physical{89.0}=0x26437510
+phy_chain_rx_lane_map_physical{1.0}=0x30176524
+phy_chain_tx_lane_map_physical{1.0}=0x20615374
+phy_chain_rx_lane_map_physical{9.0}=0x37562041
+phy_chain_tx_lane_map_physical{9.0}=0x05176432
+phy_chain_rx_lane_map_physical{17.0}=0x43607251
+phy_chain_tx_lane_map_physical{17.0}=0x70261435
+phy_chain_rx_lane_map_physical{25.0}=0x60347125
+phy_chain_tx_lane_map_physical{25.0}=0x46357120
+phy_chain_rx_lane_map_physical{97.0}=0x47601352
+phy_chain_tx_lane_map_physical{97.0}=0x04265137
+phy_chain_rx_lane_map_physical{105.0}=0x73206415
+phy_chain_tx_lane_map_physical{105.0}=0x26374150
+phy_chain_rx_lane_map_physical{113.0}=0x47632051
+phy_chain_tx_lane_map_physical{113.0}=0x03254617
+phy_chain_rx_lane_map_physical{121.0}=0x63027415
+phy_chain_tx_lane_map_physical{121.0}=0x63721045
+phy_chain_rx_lane_map_physical{129.0}=0x30154627
+phy_chain_tx_lane_map_physical{129.0}=0x04735261
+phy_chain_rx_lane_map_physical{137.0}=0x24753061
+phy_chain_tx_lane_map_physical{137.0}=0x37614520
+phy_chain_rx_lane_map_physical{145.0}=0x47601352
+phy_chain_tx_lane_map_physical{145.0}=0x63274510
+phy_chain_rx_lane_map_physical{153.0}=0x07361524
+phy_chain_tx_lane_map_physical{153.0}=0x36527104
+phy_chain_rx_lane_map_physical{225.0}=0x56410273
+phy_chain_tx_lane_map_physical{225.0}=0x10274635
+phy_chain_rx_lane_map_physical{233.0}=0x15740263
+phy_chain_tx_lane_map_physical{233.0}=0x24351607
+phy_chain_rx_lane_map_physical{241.0}=0x74015263
+phy_chain_tx_lane_map_physical{241.0}=0x04152637
+phy_chain_rx_lane_map_physical{249.0}=0x62037514
+phy_chain_tx_lane_map_physical{249.0}=0x72453160
+phy_chain_rx_lane_map_physical{161.0}=0x46510273
+phy_chain_tx_lane_map_physical{161.0}=0x01653724
+phy_chain_rx_lane_map_physical{169.0}=0x25743160
+phy_chain_tx_lane_map_physical{169.0}=0x07216435
+phy_chain_rx_lane_map_physical{177.0}=0x46510273
+phy_chain_tx_lane_map_physical{177.0}=0x01652734
+phy_chain_rx_lane_map_physical{185.0}=0x25743160
+phy_chain_tx_lane_map_physical{185.0}=0x37016425
+phy_chain_rx_lane_map_physical{193.0}=0x46510372
+phy_chain_tx_lane_map_physical{193.0}=0x06153724
+phy_chain_rx_lane_map_physical{201.0}=0x25743160
+phy_chain_tx_lane_map_physical{201.0}=0x36017524
+phy_chain_rx_lane_map_physical{209.0}=0x47601352
+phy_chain_tx_lane_map_physical{209.0}=0x04152736
+phy_chain_rx_lane_map_physical{217.0}=0x26453170
+phy_chain_tx_lane_map_physical{217.0}=0x36027415
+
+serdes_core_rx_polarity_flip_physical{33}=0x29
+serdes_core_tx_polarity_flip_physical{33}=0xfe
+serdes_core_rx_polarity_flip_physical{41}=0xb1
+serdes_core_tx_polarity_flip_physical{41}=0xe8
+serdes_core_rx_polarity_flip_physical{49}=0xca
+serdes_core_tx_polarity_flip_physical{49}=0xb6
+serdes_core_rx_polarity_flip_physical{57}=0x9b
+serdes_core_tx_polarity_flip_physical{57}=0xdc
+serdes_core_rx_polarity_flip_physical{65}=0x17
+serdes_core_tx_polarity_flip_physical{65}=0x86
+serdes_core_rx_polarity_flip_physical{73}=0x9b
+serdes_core_tx_polarity_flip_physical{73}=0x55
+serdes_core_rx_polarity_flip_physical{81}=0xa
+serdes_core_tx_polarity_flip_physical{81}=0x6
+serdes_core_rx_polarity_flip_physical{89}=0x9b
+serdes_core_tx_polarity_flip_physical{89}=0x48
+serdes_core_rx_polarity_flip_physical{1}=0xec
+serdes_core_tx_polarity_flip_physical{1}=0x56
+serdes_core_rx_polarity_flip_physical{9}=0x13
+serdes_core_tx_polarity_flip_physical{9}=0xa6
+serdes_core_rx_polarity_flip_physical{17}=0x5a
+serdes_core_tx_polarity_flip_physical{17}=0xc6
+serdes_core_rx_polarity_flip_physical{25}=0xf
+serdes_core_tx_polarity_flip_physical{25}=0x4e
+serdes_core_rx_polarity_flip_physical{97}=0x17
+serdes_core_tx_polarity_flip_physical{97}=0x2e
+serdes_core_rx_polarity_flip_physical{105}=0xce
+serdes_core_tx_polarity_flip_physical{105}=0x7c
+serdes_core_rx_polarity_flip_physical{113}=0xa
+serdes_core_tx_polarity_flip_physical{113}=0x35
+
+serdes_core_rx_polarity_flip_physical{121}=0xb9
+serdes_core_tx_polarity_flip_physical{121}=0xef
+serdes_core_rx_polarity_flip_physical{129}=0xe8
+serdes_core_tx_polarity_flip_physical{129}=0xac
+serdes_core_rx_polarity_flip_physical{137}=0xcb
+serdes_core_tx_polarity_flip_physical{137}=0x9c
+serdes_core_rx_polarity_flip_physical{145}=0x17
+serdes_core_tx_polarity_flip_physical{145}=0x32
+serdes_core_rx_polarity_flip_physical{153}=0xb9
+serdes_core_tx_polarity_flip_physical{153}=0xaf
+serdes_core_rx_polarity_flip_physical{225}=0xaa
+serdes_core_tx_polarity_flip_physical{225}=0x7
+serdes_core_rx_polarity_flip_physical{233}=0x31
+serdes_core_tx_polarity_flip_physical{233}=0x47
+serdes_core_rx_polarity_flip_physical{241}=0xe8
+serdes_core_tx_polarity_flip_physical{241}=0x9e
+serdes_core_rx_polarity_flip_physical{249}=0xec
+serdes_core_tx_polarity_flip_physical{249}=0x1f
+serdes_core_rx_polarity_flip_physical{161}=0x6a
+serdes_core_tx_polarity_flip_physical{161}=0xd4
+serdes_core_rx_polarity_flip_physical{169}=0x9e
+serdes_core_tx_polarity_flip_physical{169}=0x7b
+serdes_core_rx_polarity_flip_physical{177}=0x6a
+serdes_core_tx_polarity_flip_physical{177}=0xcc
+serdes_core_rx_polarity_flip_physical{185}=0x9e
+serdes_core_tx_polarity_flip_physical{185}=0x58
+serdes_core_rx_polarity_flip_physical{193}=0x6f
+serdes_core_tx_polarity_flip_physical{193}=0x24
+serdes_core_rx_polarity_flip_physical{201}=0x9e
+serdes_core_tx_polarity_flip_physical{201}=0xdf
+serdes_core_rx_polarity_flip_physical{209}=0x17
+serdes_core_tx_polarity_flip_physical{209}=0xe9
+serdes_core_rx_polarity_flip_physical{217}=0xec
+serdes_core_tx_polarity_flip_physical{217}=0x68
+
+
+#dport_map_port_20=1
+#dport_map_port_21=2
+#dport_map_port_22=3
+#dport_map_port_23=4
+#dport_map_port_24=5
+#dport_map_port_25=6
+#dport_map_port_26=7
+#dport_map_port_27=8
+#dport_map_port_28=9
+#dport_map_port_29=10
+#dport_map_port_30=11
+#dport_map_port_31=12
+#dport_map_port_32=13
+#dport_map_port_33=14
+#dport_map_port_34=15
+#dport_map_port_35=16
+#dport_map_port_40=17
+#dport_map_port_41=18
+#dport_map_port_42=19
+#dport_map_port_43=20
+#dport_map_port_44=21
+#dport_map_port_45=22
+#dport_map_port_46=23
+#dport_map_port_47=24
+#dport_map_port_48=25
+#dport_map_port_49=26
+#dport_map_port_50=27
+#dport_map_port_51=28
+#dport_map_port_52=29
+#dport_map_port_53=30
+#dport_map_port_54=31
+#dport_map_port_55=32
+#dport_map_port_1=33
+#dport_map_port_2=34
+#dport_map_port_3=35
+#dport_map_port_4=36
+#dport_map_port_5=37
+#dport_map_port_6=38
+#dport_map_port_7=39
+#dport_map_port_8=40
+#dport_map_port_9=41
+#dport_map_port_10=42
+#dport_map_port_11=43
+#dport_map_port_12=44
+#dport_map_port_13=45
+#dport_map_port_14=46
+#dport_map_port_15=47
+#dport_map_port_16=48
+#dport_map_port_60=49
+#dport_map_port_61=50
+#dport_map_port_62=51
+#dport_map_port_63=52
+#dport_map_port_64=53
+#dport_map_port_65=54
+#dport_map_port_66=55
+#dport_map_port_67=56
+#dport_map_port_68=57
+#dport_map_port_69=58
+#dport_map_port_70=59
+#dport_map_port_71=60
+#dport_map_port_72=61
+#dport_map_port_73=62
+#dport_map_port_74=63
+#dport_map_port_75=64
+#dport_map_port_80=65
+#dport_map_port_81=66
+#dport_map_port_82=67
+#dport_map_port_83=68
+#dport_map_port_84=69
+#dport_map_port_85=70
+#dport_map_port_86=71
+#dport_map_port_87=72
+#dport_map_port_88=73
+#dport_map_port_89=74
+#dport_map_port_90=75
+#dport_map_port_91=76
+#dport_map_port_92=77
+#dport_map_port_93=78
+#dport_map_port_94=79
+#dport_map_port_95=80
+#dport_map_port_140=81
+#dport_map_port_141=82
+#dport_map_port_142=83
+#dport_map_port_143=84
+#dport_map_port_144=85
+#dport_map_port_145=86
+#dport_map_port_146=87
+#dport_map_port_147=88
+#dport_map_port_148=89
+#dport_map_port_149=90
+#dport_map_port_150=91
+#dport_map_port_151=92
+#dport_map_port_152=93
+#dport_map_port_153=94
+#dport_map_port_154=95
+#dport_map_port_155=96
+#dport_map_port_100=97
+#dport_map_port_101=98
+#dport_map_port_102=99
+#dport_map_port_103=100
+#dport_map_port_104=101
+#dport_map_port_105=102
+#dport_map_port_106=103
+#dport_map_port_107=104
+#dport_map_port_108=105
+#dport_map_port_109=106
+#dport_map_port_110=107
+#dport_map_port_111=108
+#dport_map_port_112=109
+#dport_map_port_113=110
+#dport_map_port_114=111
+#dport_map_port_115=112
+#dport_map_port_120=113
+#dport_map_port_121=114
+#dport_map_port_122=115
+#dport_map_port_123=116
+#dport_map_port_124=117
+#dport_map_port_125=118
+#dport_map_port_126=119
+#dport_map_port_127=120
+#dport_map_port_128=121
+#dport_map_port_129=122
+#dport_map_port_130=123
+#dport_map_port_131=124
+#dport_map_port_132=125
+#dport_map_port_133=126
+#dport_map_port_134=127
+#dport_map_port_135=128
+
+core_clock_frequency=1325
+dpr_clock_frequency=1000
+device_clock_frequency=1325
+port_flex_enable=1
+
+#firmware load method, use fast load
+load_firmware=0x2
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/custom_led.bin b/device/celestica/x86_64-cel_silverstone_v2-r0/custom_led.bin
new file mode 100644
index 0000000000000000000000000000000000000000..2424dd07f10358a45fce02612386c336fb9e07e5
GIT binary patch
literal 1580
zcmb7@d013c7>D0`?<{C3<Pzi3C^I6-Hib)y+suH++-p)$aAP!`veHt^Xb~(+k_raF
z1Oy{c(lR17b4iUhwdG=&nl0BBTP@nl)^imf|MHLS^L)>DpYQv<=ls5N&u!T{Lu80?
zB3-m>DQK`4D>0U0Tw1tD*n8CoHP&9$-)k*haYCy;?Fcun5=u(AQArKZG%AoaCBjmf
z<0xpfg(f;{sm;!djrA&}^PRhWYU%ROMu(Cby(H3=>LnZzx75E=l%&rPx&B;ViJ-h#
zSX}{sary+Ic(h|#f_R#D7)o3Ze@wH|x1!NjUhUY^s0?4qE>S-rD2`<3I>VG@D`k1E
z6mN#J(N`=^by0?T<POnZEjH0R$GOF)R3&>CJ2(5f8*{~3cFq50N$jMP+(EaN6F<6{
zN^7FhZ1s%PS!+vDnr)sD`gB3^bUnh8re_=d(i~@$-e$Fu#NqllLDCSNDr>SyrRtR1
z;!SFxK2?yICaD3s*HG7z)IlFF*NK!0t5jG$NjjA_xtGn8pih&lBuQ-_J>D2C)T)%U
ziT<E3;LjA%-tD5Np$n&>x{5?ML+iCpI1FoSz342f9SwRnh$usi+b-G}npCtktWse&
zRH?8Sn(QiuRd$s@{!jtwqA;-1sIy1u)+&<Q>Hbh5nPNj=Y<GXCmJNZz)~t(#hEk0u
zN4mAA+T!OO4U;~$X7XyG3ss(zqN{Qjlb$5%TB*8#`5iN*D^-$;Zn`lm<IRdZD_N1A
zOeRCDZ)Mg8G^rSBD$cBGdN-MVW<{QvqFdzz=Ukq1XEJV6A!m>ZIo&xYXXiNY$S#%b
zjSF>kfn4SM$(TFa6F8c8QmcrN?^=na!XmS!BtN08u2q<QTM6z3C-(}5K-4f$LwWAw
z9Lma<Ih*}cHFsxQo5PXrE?&iL?PJjoI;Z%@__UaVUCZp6Zm-^B=dkAXh4NfsRtD5i
zek<)5W3rttz?Pb9)wWhP{|u|d?3;;O%Ng$S=V-2FIs0<FF-kB$#ur=`Yzj8bYMR}q
zVaTo`u}0L0O`>J@UZE%ug9|skh^04iTuvYPBPNhY63KYDf-6a(Fa7Ax0Ip&ngGgnt
z9Cj$f7>*Yoe$q&11cH%V%_v4QhOvxeJQKKvYYA{26PZK?nM`I1S!6SnX-sDZGf_~{
zuwcc8oe0{{mW#NUcC;swC@!G`9qB}8E+rZVUFb?Tx^o#$deD;`g3Mwz*E5H?gt&nl
zna54s%q`4k0k?7+3t7ZsZs!h`a3{Ik#ogS)y(}e<e3o$^_p_V_c#sto@DM90<Y6A+
zQHm%gObM$frHs`)#v010ppvyzQO!C|@Cl#t8J}~KFZhzL_?mC{mQ#Gk_q6Z>Kk^el
z^9#T78^7}hr}>k=_?v(D7nH}T;R$M~V?7(F=SeoQiKlp)%{)T`&(g?qY+)<gc%JRN
zzz%k@i`~4)9`>@2muTW;Ug1?<<8}6PfP=ijo4m!_=rnVPcX*e>yvGraa*X#m&If$R
fM|_NdqNwr~oPWHj@*WR{pv;S8l*y=<aX`j@0EF1q

literal 0
HcmV?d00001

diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/default_sku b/device/celestica/x86_64-cel_silverstone_v2-r0/default_sku
new file mode 100644
index 000000000000..c7ac2af486d5
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/default_sku
@@ -0,0 +1 @@
+Silverstone_v2 t1
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/installer.conf b/device/celestica/x86_64-cel_silverstone_v2-r0/installer.conf
new file mode 100644
index 000000000000..2205961520ea
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/installer.conf
@@ -0,0 +1,3 @@
+CONSOLE_DEV=0
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="acpi_no_watchdog earlycon=uart8250,mmio,0xdf37b000"
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/led_proc_init.soc b/device/celestica/x86_64-cel_silverstone_v2-r0/led_proc_init.soc
new file mode 100644
index 000000000000..cd637098744c
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/led_proc_init.soc
@@ -0,0 +1,3 @@
+##led auto on; led start
+m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
+led auto on; led start
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/linkscan_led_fw.bin b/device/celestica/x86_64-cel_silverstone_v2-r0/linkscan_led_fw.bin
new file mode 100644
index 0000000000000000000000000000000000000000..10acc6ad4b64406b52faa262517ebd24770e8d99
GIT binary patch
literal 14248
zcmb7q3w%_?_5ZndAKBe3$tF<UgiW}c7aIt$L4@G*vI{r6A%TFk1|Rh<1ic#rY<Xzx
zum8G<2tiQ;+PZ+YQTtOwt0@wzt@#;z6|A+pLH|X;c73!#>thjRH?O__@7xU({k=Z_
zz}b7|ac0iUoH^&rnV}HT3q&-7Bf1dqKmA>LPWd9>r94pszW)=fLHU*cOP&9T{=X~J
z`R<T(iLxQ`QLWzqt}%}D{3Mv<Q0*i?r+vRXWebOD*)O@cC<&ojj)6qIRv#(kGDNA8
zkE+QpRFk~^IqEa|%?ec_*QJZHaxS{^xlrwT0NNLcbON8aGBq-&$9EaNEZs2v^^boS
z;cM$PphQe@LcgxRC2Zi{p~TBWw!TdMoHO}Gmj4{`Q@u~uQ~A?N%LDVJU;9=EDA6=b
zE@y1M^rVjx%YjdhJ+|ZtU(VcWi4t{4PmKM$uUZNhQNoLqHTDQnCO0K6LCOHShd?(M
zI2V1;mm9B^9z=Skmfr2lir?qo?Xy->qFl>~_~LTJ_kpq?a7Q4^$p!B6+1&;?)psA8
z%|NI&)T<_!t9LZG6w%?5(c=i4pUpz0LWu*zE`=&6hg^lxnX)Trj2~1iIcDB$S!O>d
z_Xo*!IyNC5S1OfGkM(Fg=n8BJlmy8s2fJzotY34gDo9md#BTMG&@ZXU5;fFU)2jfh
zQaAWE2N^a;y}{S7(Bzu&k|}EIc*#^%_Wx0_Pqs?-IkH@$ba<@q`h!%S6@Nq7?ct9M
z6uu!-{7>@XAXR=76XY7qw3<AwE^nAA+2`iR-O2|_yC-iT9#qb9#d`cA&3HR6#qe*^
zt>EyJSPHaR(n6niiQTPNEY5_&CpM`sC_Znwoz;6gEeN_qMM^KR)O%^FnjC#z>6UAP
zLZB@u2ig=W`MdmKK$d$HK^7f7atO0yjgs>f<spw{ARb_n_hx{ER3GNTo9f#bNDXol
zo5RmzZw5XLoE&5vgwZ#js8O9us+C1r&kvwyKJkf~>G>h_eExTO{<|#8A+6Vt><&^X
zxy;dn;OA~nA^M#YD2!)%d^GS;AUSvtvt^3Dq5RBaKKeo6U~qfj)j)T^6#od{M*{jd
zFPWr+%H5t%2N<t<?2Cj-6n-A?TcR!~lkm?Y6zU=Bd3`m74j}K<4x%{451{Vtrdf4+
zXpfyMvGwlcciSf_;jI1~wQRHasCS|~QE3;m@wN4Jn93LLqyalux`!XI=WDh21(r~#
z_GRNh4(Hq<ie^V$n8J3|&AB=3`hVr0H=f_F<xlc)L48S{mxC;;$@|lJ^?5!g_R(W0
zwpW}|F7`$@a4u>RC~g+8dMYKNLrlue{;)ua1w${LT6(YhCHG6igKQl1ImOwSL(c+w
ziN5@gU;kB2I?^S+@F{aACH8~X7!|ttgeP65wIB?U5I!}j^UG6{!o1VuW%x^{*4<lN
zU##&WkMrUHFIO`ha$y1|ifR({adI-QR;uhbta6E$$N0qDAvGCEQ{pG+Ybe?YF26}F
zaIo*Esgr}yS2q)RHU(Roh33G<)fWk~-Lu^@-1BEtyDjv)<9~YcT>fi%sialXNqN%U
zreD)_E6hdv?6%6(krMgkx&^@<p6u8`#a?NO*@LvJ)1!~|`I&wtp+=Kb_RF+{ReB!!
zQxKh^QTmN%QuH~WnjBEcWqI$}h68?kiA&-W#<UB&;}6I+9(x)(SP*+WTnt*7wE_M3
zWc`zv4>frdHLO^hC&t?_Lf<*1ks3AmN0e~UU-@i(3_`uXX!xbC5)?0~T-nDu^cJg>
z_JHcQsHcxbP{ycwR6%0x-&cR1*8bk{_IIG>BfyQZyT{w#qqTnz+HMfSde+01`YjsG
zJ>xW+LDQ+xgvV*xHJT1zsLv_2qx4p!CxQFhfNubv6Wi4Ae|$L?GCpt8D1QvT!bNJb
zS);r~qr3&Ruhr6<kY+$7d5y3=PE%86ehr|1NL{#$jYJRp0hLxTtHSVrhO<>*wXW7`
zU7^`CK6-_Jo5IIe){%2t6Nh!nv}Tk{B|m(aPsn3j`R87y6LcllJ?zFRT{T9o{HO(5
zDAZ?#MEy1;$mDWFMQ1yx)#O4|tx;?E8mE#QXXTG;<<_XvxsA)zxIi^H{k&M{RD7(z
zJ{M;HcI7S)e^hI=R#ZegDK?Fl@8<JbuDjPDQCU`;N}Ljtna?mY`eS89dzEg_*GEZk
zV`V1S%dkl~vF+gLW_6aoQ<Ej^PhoonmCLf4G^%$jla&zavRP5nI;UT^(5@ywKx_HY
zQeRn}({56_Jl2>mNCk#aU2wUhE^r8zM0bP}81KFS<DKX#$=y)Kblp6netb{d2K*cy
zKwX@Tx~k#n=xz7kSZX_0AKpKUvp04UDYcxv>-;j^=;cJM!L>JSSQS`{ol32%n`zgs
zT~C~tLR7o7UaG;0GApugM8Il{j%HFlNHH6jNj<2Qy*kS3Jvvg;XE}VAM>i0$cY2Hi
zS#b)kDBNZb7q@#ji~};Ht+_!O@`aUl_&Ch#IXcS4p$|t5&aZuDp2`}$Gwh9m>~+}>
z-oz}xf>z_<9UgtOy_G7tXn$*GZL`Bx_4zTjo+o?%(a_NY+mF3SLb}i3H1i+%_{1!Y
zpI6cpIU$!}Rh~@Kt~!c};jD13BHLWtyEZ|Q50RSuMOrUWq@M`8Ad(I$+zvkRr;%C{
z3C{QnrtOlUoZt1<;u(C<`$v1DlS&qNue0Y#u8JRdTO0pT5VS9m`8{{ZhvZdKc7RIn
z3S_T*GqBvTc;y_4pZ4i7(ZNAey>~<a4^8Ut>$!?<Nbr<sF_YkONq)h<DDc8k4*u5j
z*mVy>-kI0LG}a#A#%Q-TOM1-GqEUUkTe(B-R@7vAq(a^b@9y!s<;o8D7kcavTc4pM
zpKtU&TGxTu^LZ!Qn_#i|s6i{E60Xc8G<xm!<&K2`ep>37Nn$(pfp51^R>sTT`|7EL
z3L47--ieZEcR81N7l3N9MnwXnqRQN3o%PMi!=CH`gGRHZK0_heUuo`WX0<XrQKjwJ
zPqjX*1BTMce3SRz7E?*Ty|HwKSG0FDzuat-Lba@Js5Zm@hPtr5v1A!a&*ZE-o8xka
zYSX<rnr69WjJjw>ZqyBbGfVm`$S0PLc#1N6v@fk$F0`7~_(=EFKz=Vr`2nd^g4d^5
z;`h*v(toVjN`GB8GblRzjx8RF@xl(zS4U)}G8l&Z@<;f@q2W%4EK{U$iC(FemSJ7~
zJj#_bpSW6DiqxS|<`estHu!Sp&BqStM|xt+@0+h_)fbSm#w4UnZZ)|dDFf&hfbJ>a
zSy67Un*7li7pam&$7b=o_&j*e%t}0j(rnbc05u;Nr>X|N12`Ym33@NZtGpD^LocNJ
zPW5i>F_0<xMR1N1QZ{>xuw(sRb5BAW`|zM)YEUA<c>g1`zv*^*qj4I>+w6FRjkoN1
z&#5DPButaQpDAtHMJ|(Uj!r5GV!k#Gn<D&fPB937DX_+QwE6bnf7gZ^bJkywnX{Rg
zGq-Gv^bJ;tL`MPtG=E!1ovV{ly_2LYGDqotlQaSIl*UT73@<1m!5U|Bk?OnX9DX}!
zU(=)XRbwakrbwj{rs_uK{Uv*6)_3&eN(Qn;YtYIULF(cY(y*tfTGQGGwB5wKOT*cD
zp$MP2a9Av&u8{JgG#hfkby?zfK`us`w$hPh(>1xcU6Tviv&(bx$d8mm_R3&pl)oS9
zbcAFsqTdrHUA+2Qf0pj;=3=TEios8+;^8-Ok<6^UHrRog-%f?g*v$JK9hnw)Gg%|y
zIrvDO6Nys2ddiBX8`7E=@gUANrWgkclIp9JhOzedX{Q|l{^Hl8slIQ<{fW*IPHHZe
z&6|lTE8%gRM9rU~W@+rpr8A{UsRlB6Gt!e|gAJdJTmH33PmG-yxBNFEWsUtEDJG*b
zQcOk}-POQ#Q9)AO54rg``))!FD|$cKySt|_Laqy<M;oYYtz>;h=0pec2_B}Fre+5(
z4*1+|vB~D;#Zcpq8?9Ae9HVlDql%}<-er%lx?9!xD_W%d71`26kr(gt@KK-G?w!Bv
zX2<NApC2oXtZ{J5tTR4_mY<9j(_!U?2i?6E<?Y<%#LHaCee|cM<&HH}?tQKCk4?vO
zt<%0a;_ge}WO8?p58C$OQ3E-ml|}3XTt8GP+3@w@YpS*a^TH42q_t89iH_eiT3y4(
ze(8VAms71K|Aw<@R@4%I6khY=DW*Lqpnpo_LxLtnsjQn86x1|Ls^$~Up=O7*>h!UP
zF?Xb3e~;-kSzA9UNFNW**DU8_YKFqCQJBUl{tn%}Z7~TBiI?1S+Ue>>(XkR-3>~}I
ze{Z*%+&BW0K5E0xzPJ9_o-D{kO%b2?TZ)5k#7TE`=f%|$=j?kQ{yBKOGG&c3iRTl4
zPPLP}()6yrjFUe0{tRWcDM7jr+$;Wd+Sq=CvFT!zVA{tK4KAUwf2R`#lR*2MRI?+r
zjE#m84~?#@ch4c$B3RU%eeJZWNpxJHako|Tw|@$$G)VjtZ0_#X=8no9qlDJZ-6{Tw
zW=AJl`UWdk_*6UUtk&wdOZX=$_VNjTs_;n?DxPkqy9?Gg&A4^B>GP~<UeR%NW47z-
zBiPSP-a5aj0K59!o}V4ObP1CnCOIu>PTEVeo7OliVo9TQ#;LQi#dUF-Y^^|zYF~Ao
z+f6I-SLh&N7D$*rT2;3|bkFYe+B7LUam?k*d79N(<8VXPjvp)bmuvI%KF%`Pv79IP
zy=wBcGzmOr;R?*c25lB9>RX^I1g!Xb!xSN>$F!ViCrkfzn96c~-AxAzT-tiuFsp1%
znf0L*@9gwiapszjlrD84tiqh#Om2QURs|h!t`B#vemuGeXFHr>7i_q7?J8lz#=yo+
z8-xw3*ES1**4A~agc|}uxNR2t3G{3m;9P%hR8>{~+M5Hd!DgXh^@a_B8&?bdW}zI_
zY39sX_`hNOs#$?hXv3^CWEwJa714L;$~S0a|0(~9;Ez{lS|k$De;B~x1G<Vy^G<sw
zNbs&)`lwLEC2muBcxi4a)yJYsT%sLkAuh2|Ju@#(q;63k_f3;<D#pBg1x=Ic{nZk*
zL75hQsOrXB=w8Csz>Qk=VcN|Jyq9)n(vD%)s{dQ9)~h?uw)zLH)qBrr^#WBt-s+ua
zTm5|KUn|RcIXT2yE&f)kPW2~eTYV6%CVF@DkZ@~*UYgLAyU*lwf$s27?yj2`o3bd^
zY}r(|3+Dp8i{8}<HrXgpVnf=xPw$*1v6=^la`ur%^UP3Aq(AGjm=(VlM_G+ar5e<D
zbjZ4!$4IR^^;*5hhbZv}>}W-TwMpb@Ui9p-30>q8V%IFW+J8H_=O1qRrm005Xqq7A
ziFbRrC|C9sbdA;Z<*_S#oaTSSPRXz{RmLa}j;5uVAAc=cS=dnTE4q}O6n~Jat7lfB
zQu6!M<WfWhU=@^fax@LAfbVa$QCy<&xJ=`*L*tR{h%1LCMDn14(!K7b7c>-I&UbN7
z@DVln?<0D$z0F085<xQ7r#V+nly_Yc)wwQ@>Rq0wyPHd#7%Q*mQ1=bYeHt?3Lhm*$
zJ~3aK3fux5UO!?ckQ~%g#`M%8O^9Y@$2vs2M}-b=ei4n&SMJbX1~X;p)ESw{r1_y|
z2c41|V|^rTif6Ew)4Fl&L|RXeMqj`loj{x>-)vv8z4oX7c!omwnxu^EvpCFVq**NH
z%>G$(X5THeP@;D~wAi6Cx9l$B<Y$(;B-1>7d<&f{`1y()#Nr~J)UhX^W3BTM)re0}
z_!(TZxp)}yEtAY}s$!>{M4t&(DFJ!=1vL1fa<@FUs9N6R<DAwSPUho!g-5+Lj1FsS
zlJxO*y0_qR<tnT^>w%Rb%zjQwsa|q!U&2kTmbW+10~G0?<ptr3L`UpK>T<hIze{CX
zeO#&2-Xd+myuYGSWI^$)O5H%1#DZ|mt2Z_~eC#}yh$5mqPi8v->pE30?dTEh-@|Um
zg7-j)qgXGBa#JTnnjPJqZ;sQfpMr<miQsLDjyIrNQ^zclzI3gBEqdv~$@rpUbEI1|
z+TVfpN6`u{<jCn-i5cn^w<)%{CeMsm&M%ANn6a+5;)Ca#b1n8fvzc2^cs=+v+iiIs
z!*xE}4x8P&FSkogUarEc?BYtT`)s>%Au;pR+Z@03{Ox^xX^Yh8Uxr?<M6bH{SZshv
zZO*O><B}GkH${ELvs{Lw3+p-&=?mBNuVcPhKcW?-@7ERo<$N{gCHrmW+ql0>=1P7i
zPFH>|-RFJz{DGVYrF{Ez`HH+>(oNEceYtr#*HJiG;e;+x=i%bkcvf5&m8JEP&Fhl=
zj^B9x@P4ynLZsWX`8WxEgNTR0;)}&I>P53L%EA8#6BQs5+r?sCl$eEC(MLJ9Z`odm
z#hKUZgk}_salwag5v$8NdH6#YV%2K;Cf3<{xl+^YLVqDf`&XQkvX2$`Ce(#nh!b<8
za^8>qS^iv~xI=D4>@&-6QD_=^F6j_`3eWV%_!*was>`!26p3mif^ovi^0q3X=flLC
z9K`cPeA}Gx4#Xn15Knv!jshjNRPQjG&6~&-jHVhm=n>x49HX+P_-S8@qEo){1%q7T
zvyrc{`#%|>vg8s&yc-_DX{0|GX?7?<(G1Bs%F5qm<x5%l{H8CEj-6Bf71D=MZi+Js
zDqvp4-;wtctD{VDvsO+X{RlbFeXG{|rsK$a>RYvNYhdJKtZw(nUWL2v17Lf!8k=z<
zcps_zM_$DZg;_DJO7*>>NeiT0i*r!9nmi4OIxpH+PtH|Jw~`h2Tuak*(b?0uf#nX*
z_x+Ato^Ot1VFlNWsL6Gz5KJc<M_HsN)qB`~*q2T|Fs7@ZvR^l7=S9IK%YqUJA$IYK
zZ$Z4@{|ahs8S9_QN_n9*(EeJVFXVOwOqX5|f5D$82=n{-baIn+`Uwj&WhLMS?Q_1;
z_;38rfmT6@A@;QY0PvMsEj{{Zl||vHfD*`yKk0ki-|tQ*zmKx1h$XmWRdBga$X&uZ
zwDl`^`FjJ3l1_e_-Yb){Md9KLF{T}!5kx%F$-kvt0nM96v_p~~^e+r>fpjuHvb(!d
z;S#Cg6g=GfdL~84<%@3gPmI(lwn72+Q4qqW{H}?Su!$-zlx#oG>vG4RB1I~(=S6A@
zT6_l;NL^y<kRs8FL<wi*ytx9rx?SC($!qIc>3e~~L9uCqGt7m}+l-=Jb?R};G&p41
zTLQdBVkreFx(++oNV(mj(YwZxAGyQx$0N2~h$x7YcA3OR#3^?wT*U>_UD&Ob=)?zC
z+rNJuRbln2vIZhvL;MF<jtoxRLuJ?4-^Qqg%1@4b4_f0CVtnmA%zx!~i;m?@Esc6t
z3a4y+8Qr;MzsLVL9a?d#eOo74&3eu|*SC@rgSJ8&&Q@(Ir?2)Jt<8>4mRYJkIr8+%
znM>T*F9)X#%`c8MLDqf<50j5PObeQ-k-BQQ*^ym!`p6G}FGEQ;RW?lrzF5mo9=Q<s
zqTy-<_G1-`6rAk6rzZ!qoddngNw-rD_={;iEz>4dXrXFpenVlLowjl@lIieK+3H`Z
z#U0SAkB^JKhsjlAvQy%(soc7UX?YVbDw3y>?as{3`sgTC+!@~v-SB+?vyVTSOSHr<
zT_mu-HGvH`0VDh|-?rRc)5a1Ot&sgNA2(Bh*;R`aSh+s93K{<*g!>A**%}@5o4d9U
zx#r-zm8j`L_@ForhdYRl6cTM%x9a-lwQbj*ad58>t_^Oi612SL)i+<i@z&7lOEa!5
zSyrtHuFBK|55h$nU&<|7&NzEo-h(@;xoJKqXS=n_<)boJ%`E#=zYBY)A7^GRYK;)i
zWQ04}7HQdvW(OxOTQ(aO@@9vyv`w3(9?xHoPWDd*#p9sRM}txh?9qp5+<=v>ku33B
zgEHqgn+xutN&ams5Uo$|UDoVq8`oW5BJSLd)w^l@WR^OH6BW*sro~~}6SOyFmomxU
zW9-K&Ri$iwj9)fSEcVORgv~oCxPg{KwYJ_R^&D1z#!!P_Uush76yn47-MX+{Cz}*M
zQldR<=M=x~a26k95suVx=2x)WVzJ?VX{NGHnaiIput-#T=~7O*sQz?;U8<HVm9>hQ
z-&SyW(cuCMQY}bv72E7{^>-F<&OGFpc|*KKxzoP0V4}iLH^b9e={OzZr?Y710a$9p
zYEZt-4tgaZooQp6{mudcJv$o+-|4>y{TF_x|I3QDo$Y^{eRk2E_JG8C|Ihqbz)w(F
zX5Utj4Suq~PjY~tt^+q~G;T69|LUJeSdx)%D{(mUKv((acBhj+8=;a5ps%^;G;qm0
z%ycp~qDblFzm4Ej;W8mM<VI=={8jxs28=V+$2q^j9V^TI$(SND4>X+&kLjenGHwR6
z)WR_X8Q#g@rDHCfqSClQX7M5PobaTuzmsjFYV!B0p2}lP`wF9Z;NpZ_6rJR!3bWEK
zPxMRBz&dCC(gpH-DIe0O;QYWM&NkpHS#%(J0^H^f>Eb7pEpj?}7!ib2-*?ZIfBPQM
zC6J?6CegRft+w8Da>uZ_zRN8-WtmH~!XFeMDf+rRoHY=^r$)ttsEr4=Nu8ii_1^6Z
zw}|>H-nnP-U3J@iTm?DTNr%b{<-#JHysh4PNrkMBQ{uCfQ{fT&UsIeKxV;WO+(kCI
zy}qnSAMc=v1(TKE!?W#So^2)GOU&R9;W(b+oD?zZJH6C(%i>#no0f9rRI*k&<h09E
z<@HN#@VqzEM+I|MIN*2h1?`%}@FFj^!|yIs_-S0!ule0}nV*LBsx+d_{V84i2A_!e
zxeT+N!d;G9VUV12*;=*WJd+<~uOhxu1)&Nv7Z|z5PcEO#Zcy9h6@F&<N<bIt<FMlF
zCI}~E?7L@DWeO*;cn<TCf2Uf7((=l}4%$YKHr;^z{a9oF{#A|nh>bAXOrP_$KHcck
zp!NAY<e*AE(=sB7TFV`18MjR(oHSo+d%H>{B%H_Xpj`U}_Lpc6U0x8LCp!Mw)W84Y
zX1(jwk>!qo{kmzNp{I7LD+tdv7lf-tM}BMne#?zEjRQ7ngH++43VEp;D#5vsi<bLL
z@e+R-A}8sjh{%a4D)>xpLFT|6r?{lfTHISf4jBLEX*YqGUB#r`1;HCV`!*$=+z4G2
z>dkIARK^R|OI=ud_9n)qu(&}p)}G*hpe+)^1pl(8ia6q}`aB!(IbD#aZ=4x<+_ay_
z2b;s<CQPO|XxK}Ap<1&*I@~G<B7U<qoS?)F*x{e4+w^9ucs2FSfd`iwJd+>S@;%F`
zZ>E-S>YV|<+T<ii!7;=L!njW|;V!H_%k<8{EMs)4ALkBbvJUS)yl=>_W|cI2oXhGn
z9q<b3o17h{om7Ho1<QGTsHU&b-=Aex-cXh!iqxOWgDO<}J?2IJTYpx6Zm2fj-)}T4
zcLv$np+ATB-ig-(6MW6!fbL;6nBVU&9*Ko&O<HdFJGm<KehPN98}sukK%%$5Zc6#<
z%1ev;>wj&CDKxVn`hzxZ>Sf*^gtpw7b?52HH#-hUZv|g66pOb_xXgQ_beo|<e93Z|
z_pLzIPoMUx#@oyce?6F?<TI4pv$kg_b6Wm0WzNd1yU$SOtbDyCL#fv&x87sC=cUQF
zIbM{OwmfH;BHlb<p7#dnX2VqRIm<ln(v`-0pYfhH-fU+0>o;X6O&VowtFbjhdGCKg
zdGE?Ct!F6jUHN(|%{(9Dv}u&aHGgjLteGP2ocyfenhDDtQ@qR3-%iW<-aoGluX)DX
zZxqd0z**dagpCb|T67_{8)DJp4c+PFuh?lT`jnjRV{5w?EBQ|9%-YgUmVP(Y0`HMw
zZ)4A^$rsZ%F0GL{V82bb$$J&tJG-BkS(N=M#1}d4aKW3hHBcWA9oqv2*Xd(w@|iSO
zaYCM}tCsL$C-H}|-`JkV_mwfWH$TN~^EUgNs|1{wLA@)T92&}kby(UBpJR+!lyn~_
zEk{Zkn-5)(PF_8%lU#u->oTe0VLh4NxdP>LQO-xw$zd(VazZ(%RC^DCPgjWfi?A%^
zS1eJJo6{Fyr?*JcqgH1(#`Hss)~ZSJatG~XIe}E2f3a^YDdM!F$NdxTE7I)NbsA2Y
zhP2BUP<m=v%%(prx2egWp=@v3K)JEY!Nb?1+3`%fv(L7hX?1Rj-K*o#P;e~ynr8EG
z_lVKx@#bVU>|B9n=blPsGff*X<KDkro&`-y&IJM9xj-IE?i(vZOm{5#HBP#ScqD$0
z+iF{11p9zXA&8UJud+Mug^TK&*dD20v`}bRxvp(Iw7O{h`gQA>uepFlTJd^CSi=et
zOf7E~ZdkWoVD+V|Ec5_Qz8dX@8*w^Y+uXW(y|8}ujlm5Y*9SHR*R4Gpq(xg?4QV!$
zy-`Bn*K48NOc2-UL}x#n3caPho}k1(M$g1Xal?@KWHjX~!JQ7%J<Y@Ht|6Vg1ooL(
z1@_v45^s%K5M$OO#?0!+Mn5}Szka-anO6T4;<NwoT_)+3NpstK+|ng;DA6-27B4Wr
zX52>Bg3oi@c+vOxC?|0ORl@d0_llgCi|@q^jZ=n|6DaY>D5BcC)Z`N?lM_AqpEM^&
zVm9n9w6t}<fIA6F+%ej}pWTZt9&@6_&QbQ>>5kFNo!oYn`7Vqy2efw7UOUR@DA9rz
z+V@|C-qqwqW1vBQE#p)_0u{5JliU*|M41xbM-OW9vat+TSB+MJ2Q~Rayx%+3dwY*A
zGRdu%xGqYFqXtO;50{L-x}Oum{2d<4F?P=3cCkGDE*<>uYgBeSc;ftUu2`_u^b*aN
ze&G|Vb0kDkl(FPT=@XM#6vm9GMG+#E)|e27KW8CcfTyZ5e}nJzI{AV)b#>t;mk`|_
z!+SioLn&by?;}rrb5N@b-^8icu@-o;IE^OnM}wz&+k3cQOoDZ%#EB8kxsBILogOpz
ztd?+6MIOJ4MLM%E=W%dJ8kd`JN)xLyJnl%xH69Vog&o%67Q=)dIE~NO_QRKokQHyo
zB8D8c284)6rp4FO>>e5O^-C(BG>@HK_KqwpX7jY!v+%u4Ut3Ji5%=>IK5=e~gwbJa
zSEp+*qxX$mS=V0J<+(VTcl`T)PhqELc2s}d;+h_9c2&ft#T$J#`}F8i{~^zmm_e8r
zU*fYAwtHOBtmE}Qlf5KbkCObDNifFiP_sB%hqNV@jads67DTzq$x*&?R#aD67MmR>
zybu!NoRApgg)i{#^|L{}@adpYI5C(d{A188d^~6oJ{+W7W{a7J_fSH+^7$QJ;yEwv
znC`QT^KD5Znv5}uBbjxtP4k0VT|MgRPcVAC93|sNc<D$^+7ZM~t530rwXT95I_;$y
zmZ%FOKW{{b&0I5*m1R9Y-{HK>OYC+d^9G?oiyylniy^!)nS)p|!?&hWh%__oq4cS7
z%&UGejy;zCWN@#TvD3_6?+xI654tEDR@DO^s%ol?Bjq(!O&nEK`PQ`B|JA6PY3;-G
zn}c)E?pX2yyctcwM@sb;N#{u~;I+k}GP`U?y!pAM@Nh4$fmcPi5xq$Bax-344Pw!k
z!<%lWKf;^d0B@Rk#LNrMM4ZuH;*ud2b!M?$vw(XJU3M3<YuzKz5Tz5kx_!HJCi_G6
zzifaHUozpDLry_1D=L?5Qlw!snJ!#iaLI})c-lRl)5q@jab?yTJv?pxU!HcE9-cP(
zs}!TxIP}y1?=h}?mbAV8kr@|9XG&9qlg57IL612WLX`J#j>#_OZSjYRz1^~Qg^F3E
zHD8Oah6^u}th+kIJj5#hPkne!_Y5~8sm3k^bbdsKW2VC-6}I_uc2?V?wtoFBb+#^?
zZcB|?e0Vji7tikR6R)N2jz3!Q@}Myyn)<WwN=e|{dT*<5O<lF!7U4_7c7C6lY(V{6
zV~#lV6Fh_)5p%9ajQj@JIc5i2WArWRfR9JHe%}vK?ne2wv3YSm(r@k0(#7xw179vG
z;%x`pb=Ba>ypP4GC!=O<%p7q!!+4*n_bSEMaYMOXIT3@i-$seMhiIlXX5wLg>lWB^
zBV1`1XLl30OT*?(i<u&(xe2j9%MrW8TNu}C{pe!)h<LWY%ls#FBKouJyTq?T%aJQL
zW{HrwKZ`(P2S@WTvPyf_zPaH12+DQZn>-dF&x-WxIYb`y-X|y<clIX4#$Ubhkr{Mc
z7_5R9JC^(eH|?JwHX#UO$-j(Fg{3yh7R^$Z!%~}_X5ATE{WfZ{*G2z25sW2o8fGVg
ztpDXiU^O^(#2=bVCYmjTiCDaYtel?sa21`0uRdILJsI&NPOiE>8{f&$x%{D-^ztn;
z>3rbia8t({#XZ<_Ps|`vd++F(B3WQxS|uvCNm<a}ucUHzFT2(mYIdw~@bq<zW?7=o
zcueoNO?EqRQxp=5Sqa|2#uRBY?wXs6oo&^jn;oe^m&D%UBzrr0&Xekw@(<3AmtzKn
zkRPvbs^Sd}DmBI37r$ax+HenDV|H<Po9Okr+7O$^ZNGcIx$?_*`}eoPuVOV?T@+j6
zaJ6kfRM~jE$+a-L%GCf(tB+O1H@Rw}ZLW*acC#bsFrkIRF(Jf93_U_&qK|tEQTkX_
zHzB5BWgMe_u8k^(VkZV!>KcrIrhgb^d8gr73875RaO~(H{}xs1-kX6uzo*$@DWL~)
z<LnKozTgd%SxR8FA2<!H38$%vzC5?Bgt`Rj^Ff<$Xwcop_?cVOJD7XG-FvWy$`<WY
zq=oPuHmPeQUEJayOKw0!-E|%F(bTHb?=I+Zzi4_<-(#;uJP+qM*V;|3t(8Ovus-hI
zY>9(MAmBxtIX*#pM|{X*I8r42O!QAK$FErMJ!yF{%{Y174auRha@;?2?{Q_K2d@X;
z<I4RWHTk~!ln0LiJyb<ezbDkEld`>gvhd0}ZaSPl#ni8#Hawt<XSeAvD}KlF;-P_1
z?ZAF6&a-s!2vSsX8Ztc*GNP9Xpv@Dw%eM7tZ$$;2MDc4J_jwEhpIv+CTA>i}h^o^u
zcc0ElMPjk8EuSy+`iqC&VK3iwlCH!QA`9zf_#HcPjP+c(5%(S+DOqn$_gXKB)Y|48
z@Fb6nCf`a!!s!ISePAPA{gk&gJD&8=K#{cSx@+hoyZc2pU+|D!rO|xoeVS6B=;G}j
z-BF8#I3CuSrXh;0Y%Y8dZ>LGI+ilR#e7sSnIN~0axIs{|3-9yjV%f@ootOQ}0>o~f
z$DAj6v)u=wIVUZpib-|3aUEXJW*@oBV|e%4La%+1;(o<+F~z;gM49i$yZj;>-eZ0i
zgBOF>CN<-4GZTHrI-?Kw-gWtf1Ev95*v|<y@?QpDMEk4{eIvo~#j!qaI)pViNYjRK
zre!Zixj1()e+o@wXI#|b6#%Ok1|XoxM*!Ub9QOI=0fzulKpb!akOB}Q1vY>k-~zY-
zBESb|0?2?6pbgLo=mK;D_5x(kpXsv=co@L??E;+XdoS=a{r3Yu1YkTI1;ha-013bu
zUQB5B3_k*J7l83p0}uf|KqKG`Zwl}bfbkawbOO2n5kNO!FQ5nTJfI(N2oMDv1=xr>
z804Y<d;lJsbud8ijz=JmKMy#A^MTs|agI6|d;r=H0UrTp@G<be1O5S=!65JxfKPxk
z_!Rg*0iOY9@Hy}=0AB)UkN|!XkOIzN2>38y1UQ3H;A4O^a0V)H_K)MKg8>g*2ham&
zU;u6eWC3Sj0&eD?Eg?Dym|9A-7~rm+eZiay=gzB{zrf>NxJWuDBd~H+^XeOjNV^QU
zLAz(T9=8wcH(nnKt;27y88-vtcLn3cTK?KiYcd6`8?N853MannGdb+6$o40RME&@f
za3`^M9&n`ZHxk*A=8%8xU-v&d&P|@haXLlh=G%Y8-%kFQsfzD(pwnszna_Vo@&A|k
F{{YMu0DAxc

literal 0
HcmV?d00001

diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/media_settings.json b/device/celestica/x86_64-cel_silverstone_v2-r0/media_settings.json
new file mode 100644
index 000000000000..b14bbc45819d
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/media_settings.json
@@ -0,0 +1,18024 @@
+{
+    "GLOBAL_MEDIA_SETTINGS": {
+        "1-32": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000084",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                }
+            }
+        }
+    },
+    "PORT_MEDIA_SETTINGS": {
+        "1": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x0000008c",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000070",
+                    "lane1": "0x0000008c",
+                    "lane2": "0x00000080",
+                    "lane3": "0x00000070",
+                    "lane4": "0x00000070",
+                    "lane5": "0x00000070",
+                    "lane6": "0x00000070",
+                    "lane7": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000090",
+                    "lane2": "0x0000008c",
+                    "lane3": "0x0000008c",
+                    "lane4": "0x00000084",
+                    "lane5": "0x0000008c",
+                    "lane6": "0x00000084",
+                    "lane7": "0x0000008c"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0x00000000",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff6",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff6"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane1": "0x00000048",
+                    "lane2": "0x00000044",
+                    "lane3": "0x00000044",
+                    "lane4": "0x00000046",
+                    "lane5": "0x00000048",
+                    "lane6": "0x00000044",
+                    "lane7": "0x00000044"
+                },
+                "post1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x0000004a",
+                    "lane4": "0x0000004a",
+                    "lane1": "0x0000004a",
+                    "lane5": "0x0000004a",
+                    "lane2": "0x0000004a",
+                    "lane6": "0x0000004a",
+                    "lane3": "0x0000004a",
+                    "lane7": "0x0000004a"
+                },
+                "post1": {
+                    "lane0": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                }
+            }
+        },
+        "2": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000006",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000080",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000070",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000080",
+                    "lane5": "0x00000080",
+                    "lane6": "0x00000070",
+                    "lane7": "0x00000070"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000070",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000080",
+                    "lane4": "0x0000008c",
+                    "lane5": "0x0000006c",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0x00000000",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0x00000000",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffffa",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane1": "0x00000044",
+                    "lane2": "0x00000046",
+                    "lane3": "0x00000044",
+                    "lane4": "0x0000003c",
+                    "lane5": "0x00000044",
+                    "lane6": "0x00000046",
+                    "lane7": "0x00000044"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff0"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x0000004a",
+                    "lane4": "0x0000004a",
+                    "lane1": "0x0000004a",
+                    "lane5": "0x0000004a",
+                    "lane2": "0x0000004a",
+                    "lane6": "0x0000004a",
+                    "lane3": "0x0000004a",
+                    "lane7": "0x0000004a"
+                },
+                "post1": {
+                    "lane0": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                }
+            }
+        },
+        "3": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x0000008c",
+                    "lane1": "0x00000090",
+                    "lane2": "0x0000008c",
+                    "lane3": "0x0000008c",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x0000008c",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000070",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000084",
+                    "lane6": "0x0000008c",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000068",
+                    "lane5": "0x00000084",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0x00000000",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0x00000000",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0x00000004",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane1": "0x00000048",
+                    "lane2": "0x00000044",
+                    "lane3": "0x00000044",
+                    "lane4": "0x0000003c",
+                    "lane5": "0x00000048",
+                    "lane6": "0x00000044",
+                    "lane7": "0x00000044"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff6",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff6",
+                    "lane7": "0xfffffff4"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane4": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane5": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane6": "0x00000046",
+                    "lane3": "0x00000046",
+                    "lane7": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                }
+            }
+        },
+        "4": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000090",
+                    "lane2": "0x0000008c",
+                    "lane3": "0x0000008c",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000084",
+                    "lane4": "0x0000008c",
+                    "lane5": "0x00000080",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff0"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084",
+                    "lane4": "0x0000007c",
+                    "lane5": "0x00000080",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000000",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000004"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffffa"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000036",
+                    "lane1": "0x00000044",
+                    "lane2": "0x00000044",
+                    "lane3": "0x00000040",
+                    "lane4": "0x00000036",
+                    "lane5": "0x00000044",
+                    "lane6": "0x00000044",
+                    "lane7": "0x00000040"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff4"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane4": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane5": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane6": "0x00000046",
+                    "lane3": "0x00000046",
+                    "lane7": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                }
+            }
+        },
+        "5": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x0000008c",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x0000008c",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000070",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000070",
+                    "lane3": "0x00000070",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000070"
+                },
+                "post1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0x00000000",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0x00000000",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xffffffe8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x0000008c",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000080",
+                    "lane5": "0x0000007c",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000000",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0x00000000",
+                    "lane7": "0xfffffffc"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffffa"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane1": "0x00000040",
+                    "lane2": "0x0000003c",
+                    "lane3": "0x00000040",
+                    "lane4": "0x0000003c",
+                    "lane5": "0x00000040",
+                    "lane6": "0x0000003c",
+                    "lane7": "0x00000040"
+                },
+                "post1": {
+                    "lane0": "0xfffffff6",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff6",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff6",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff6",
+                    "lane7": "0xfffffff8"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane4": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane5": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane6": "0x00000046",
+                    "lane3": "0x00000046",
+                    "lane7": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                }
+            }
+        },
+        "6": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x0000008c",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000070",
+                    "lane3": "0x00000090",
+                    "lane4": "0x0000008c",
+                    "lane5": "0x00000080",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0x00000000",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000080",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000080",
+                    "lane6": "0x0000007c",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0x00000000",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000036",
+                    "lane1": "0x00000044",
+                    "lane2": "0x0000003c",
+                    "lane3": "0x00000040",
+                    "lane4": "0x00000036",
+                    "lane5": "0x00000044",
+                    "lane6": "0x0000003c",
+                    "lane7": "0x00000040"
+                },
+                "post1": {
+                    "lane0": "0xfffffff6",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff6",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff6",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff6",
+                    "lane7": "0xfffffff8"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane4": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane5": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane6": "0x00000046",
+                    "lane3": "0x00000046",
+                    "lane7": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                }
+            }
+        },
+        "7": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x0000008c",
+                    "lane6": "0x00000090",
+                    "lane7": "0x0000008c"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x0000008c",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000070",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000070",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0x00000000",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0x00000000",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000080",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000004",
+                    "lane7": "0xfffffffc"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane3": "0x00000038",
+                    "lane4": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane7": "0x00000038"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff6",
+                    "lane2": "0xfffffff6",
+                    "lane3": "0xfffffff6",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff6",
+                    "lane6": "0xfffffff6",
+                    "lane7": "0xfffffff6"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane4": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane5": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane6": "0x00000046",
+                    "lane3": "0x00000046",
+                    "lane7": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                }
+            }
+        },
+        "8": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x0000008c",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x0000008c",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x0000008c",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000084",
+                    "lane6": "0x0000008c",
+                    "lane7": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0x00000000",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x0000008c",
+                    "lane2": "0x00000080",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000080",
+                    "lane5": "0x00000084",
+                    "lane6": "0x0000007c",
+                    "lane7": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0x00000000",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0x00000000",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000036",
+                    "lane1": "0x00000042",
+                    "lane2": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane4": "0x00000036",
+                    "lane5": "0x00000042",
+                    "lane6": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff6",
+                    "lane3": "0xfffffff6",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff6",
+                    "lane7": "0xfffffff6"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane4": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane5": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane6": "0x00000046",
+                    "lane3": "0x00000046",
+                    "lane7": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                }
+            }
+        },
+        "9": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x0000008c",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x0000008c"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000070",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000070",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000070",
+                    "lane5": "0x00000070",
+                    "lane6": "0x00000084",
+                    "lane7": "0x0000008c"
+                },
+                "post1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000078",
+                    "lane3": "0x00000088",
+                    "lane4": "0x0000008c",
+                    "lane5": "0x0000008c",
+                    "lane6": "0x00000070",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0x00000000",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0x00000000",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0x00000000",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000004",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000040",
+                    "lane1": "0x00000048",
+                    "lane2": "0x00000040",
+                    "lane3": "0x00000044",
+                    "lane4": "0x00000040",
+                    "lane5": "0x00000048",
+                    "lane6": "0x00000040",
+                    "lane7": "0x00000044"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x0000004a",
+                    "lane4": "0x0000004a",
+                    "lane1": "0x0000004a",
+                    "lane5": "0x0000004a",
+                    "lane2": "0x0000004a",
+                    "lane6": "0x0000004a",
+                    "lane3": "0x0000004a",
+                    "lane7": "0x0000004a"
+                },
+                "post1": {
+                    "lane0": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                }
+            }
+        },
+        "10": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000088",
+                    "lane3": "0x0000008c",
+                    "lane4": "0x00000088",
+                    "lane5": "0x0000008c",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000070",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000070",
+                    "lane5": "0x00000070",
+                    "lane6": "0x00000070",
+                    "lane7": "0x00000070"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000078",
+                    "lane2": "0x00000070",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000064",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000070",
+                    "lane7": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0x00000000",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0x00000000",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0x00000000",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0xfffffffc"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000040",
+                    "lane1": "0x00000044",
+                    "lane2": "0x00000044",
+                    "lane3": "0x00000046",
+                    "lane4": "0x00000040",
+                    "lane5": "0x00000044",
+                    "lane6": "0x00000044",
+                    "lane7": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff0"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x0000004a",
+                    "lane4": "0x0000004a",
+                    "lane1": "0x0000004a",
+                    "lane5": "0x0000004a",
+                    "lane2": "0x0000004a",
+                    "lane6": "0x0000004a",
+                    "lane3": "0x0000004a",
+                    "lane7": "0x0000004a"
+                },
+                "post1": {
+                    "lane0": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                }
+            }
+        },
+        "11": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x0000008c",
+                    "lane2": "0x00000088",
+                    "lane3": "0x0000008c",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000070",
+                    "lane1": "0x00000078",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000070",
+                    "lane4": "0x00000070",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000070",
+                    "lane7": "0x0000008c"
+                },
+                "post1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0x00000000",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x0000008c",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000080",
+                    "lane6": "0x0000008c",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0x00000000",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffffa",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000044",
+                    "lane1": "0x00000044",
+                    "lane2": "0x00000046",
+                    "lane3": "0x00000040",
+                    "lane4": "0x00000044",
+                    "lane5": "0x00000044",
+                    "lane6": "0x00000046",
+                    "lane7": "0x00000040"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff4"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane4": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane5": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane6": "0x00000046",
+                    "lane3": "0x00000046",
+                    "lane7": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                }
+            }
+        },
+        "12": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe0",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x0000008c",
+                    "lane2": "0x0000008c",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x0000008c",
+                    "lane6": "0x0000008c",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000070",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000070",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000070"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0x00000000",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0x00000000",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xffffffe8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000080",
+                    "lane3": "0x00000080",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000084",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000004"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xffffffec"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000040",
+                    "lane1": "0x00000044",
+                    "lane2": "0x0000003a",
+                    "lane3": "0x0000003c",
+                    "lane4": "0x00000040",
+                    "lane5": "0x00000044",
+                    "lane6": "0x0000003a",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff6",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff6",
+                    "lane7": "0xfffffff4"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane4": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane5": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane6": "0x00000046",
+                    "lane3": "0x00000046",
+                    "lane7": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                }
+            }
+        },
+        "13": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000094"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000090",
+                    "lane6": "0x0000008c",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0x00000000",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000008",
+                    "lane6": "0x00000008",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe0",
+                    "lane6": "0xffffffe0",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000064",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000074",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000078",
+                    "lane6": "0x00000074",
+                    "lane7": "0x00000070"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane1": "0x0000003a",
+                    "lane2": "0x00000036",
+                    "lane3": "0x0000003a",
+                    "lane4": "0x0000003c",
+                    "lane5": "0x0000003a",
+                    "lane6": "0x00000036",
+                    "lane7": "0x0000003a"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff6",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff6",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff6",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff6"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x00000044",
+                    "lane4": "0x00000044",
+                    "lane1": "0x00000044",
+                    "lane5": "0x00000044",
+                    "lane2": "0x00000044",
+                    "lane6": "0x00000044",
+                    "lane3": "0x00000044",
+                    "lane7": "0x00000044"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                }
+            }
+        },
+        "14": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x0000008c",
+                    "lane4": "0x0000008c",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x0000008c",
+                    "lane1": "0x0000008c",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000084",
+                    "lane6": "0x0000008c",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000008",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000008",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000008",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe0",
+                    "lane5": "0xffffffe0",
+                    "lane6": "0xffffffe0",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000078",
+                    "lane2": "0x00000064",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000070",
+                    "lane5": "0x00000084",
+                    "lane6": "0x00000080",
+                    "lane7": "0x00000064"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0x00000000",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000032",
+                    "lane1": "0x00000040",
+                    "lane2": "0x00000034",
+                    "lane3": "0x00000032",
+                    "lane4": "0x00000032",
+                    "lane5": "0x00000040",
+                    "lane6": "0x00000034",
+                    "lane7": "0x00000032"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffffc"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x00000044",
+                    "lane4": "0x00000044",
+                    "lane1": "0x00000044",
+                    "lane5": "0x00000044",
+                    "lane2": "0x00000044",
+                    "lane6": "0x00000044",
+                    "lane3": "0x00000044",
+                    "lane7": "0x00000044"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                }
+            }
+        },
+        "15": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000094",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000094",
+                    "lane3": "0x00000094",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000094",
+                    "lane6": "0x00000094",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x0000008c",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000084",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0x00000000",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000008"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe0",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000068",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000080",
+                    "lane3": "0x00000078",
+                    "lane4": "0x00000060",
+                    "lane5": "0x00000080",
+                    "lane6": "0x00000078",
+                    "lane7": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0x00000000",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000004",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000032",
+                    "lane1": "0x00000034",
+                    "lane2": "0x00000030",
+                    "lane3": "0x00000032",
+                    "lane4": "0x00000032",
+                    "lane5": "0x00000034",
+                    "lane6": "0x00000030",
+                    "lane7": "0x00000032"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x00000044",
+                    "lane4": "0x00000044",
+                    "lane1": "0x00000044",
+                    "lane5": "0x00000044",
+                    "lane2": "0x00000044",
+                    "lane6": "0x00000044",
+                    "lane3": "0x00000044",
+                    "lane7": "0x00000044"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                }
+            }
+        },
+        "16": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000080",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000094",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x0000008c",
+                    "lane1": "0x0000008c",
+                    "lane2": "0x00000090",
+                    "lane3": "0x0000008c",
+                    "lane4": "0x00000090",
+                    "lane5": "0x0000008c",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0x00000000",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0x00000000",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000008",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000008",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000008"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe0",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000064",
+                    "lane2": "0x00000074",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000088",
+                    "lane5": "0x0000007c",
+                    "lane6": "0x00000068",
+                    "lane7": "0x00000074"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000030",
+                    "lane1": "0x00000032",
+                    "lane2": "0x0000002c",
+                    "lane3": "0x0000002c",
+                    "lane4": "0x00000030",
+                    "lane5": "0x00000032",
+                    "lane6": "0x0000002c",
+                    "lane7": "0x0000002c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x00000044",
+                    "lane4": "0x00000044",
+                    "lane1": "0x00000044",
+                    "lane5": "0x00000044",
+                    "lane2": "0x00000044",
+                    "lane6": "0x00000044",
+                    "lane3": "0x00000044",
+                    "lane7": "0x00000044"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                }
+            }
+        },
+        "17": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000094",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000094",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000094"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x0000008c",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x0000008c",
+                    "lane4": "0x00000090",
+                    "lane5": "0x0000008c",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0x00000000",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000008",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000008",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe0",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000074",
+                    "lane3": "0x00000080",
+                    "lane4": "0x0000007c",
+                    "lane5": "0x00000080",
+                    "lane6": "0x00000074",
+                    "lane7": "0x00000064"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0x00000000",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000004",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0x00000004"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000036",
+                    "lane1": "0x00000032",
+                    "lane2": "0x00000030",
+                    "lane3": "0x00000030",
+                    "lane4": "0x00000036",
+                    "lane5": "0x00000032",
+                    "lane6": "0x00000030",
+                    "lane7": "0x00000030"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x00000044",
+                    "lane4": "0x00000044",
+                    "lane1": "0x00000044",
+                    "lane5": "0x00000044",
+                    "lane2": "0x00000044",
+                    "lane6": "0x00000044",
+                    "lane3": "0x00000044",
+                    "lane7": "0x00000044"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                }
+            }
+        },
+        "18": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000094",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000094"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000090",
+                    "lane2": "0x0000008c",
+                    "lane3": "0x00000090",
+                    "lane4": "0x0000008c",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0x00000000",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0x00000000",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0x00000000",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000008",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000008",
+                    "lane3": "0x00000008",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000008"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000078",
+                    "lane1": "0x00000078",
+                    "lane2": "0x00000074",
+                    "lane3": "0x00000078",
+                    "lane4": "0x00000080",
+                    "lane5": "0x00000070",
+                    "lane6": "0x00000080",
+                    "lane7": "0x00000078"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0x00000000",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000030",
+                    "lane1": "0x00000036",
+                    "lane2": "0x00000032",
+                    "lane3": "0x00000032",
+                    "lane4": "0x00000030",
+                    "lane5": "0x00000036",
+                    "lane6": "0x00000032",
+                    "lane7": "0x00000032"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x00000044",
+                    "lane4": "0x00000044",
+                    "lane1": "0x00000044",
+                    "lane5": "0x00000044",
+                    "lane2": "0x00000044",
+                    "lane6": "0x00000044",
+                    "lane3": "0x00000044",
+                    "lane7": "0x00000044"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                }
+            }
+        },
+        "19": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x0000008c",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x0000008c",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0x00000000",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x0000008c",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000088",
+                    "lane4": "0x0000008c",
+                    "lane5": "0x0000008c",
+                    "lane6": "0x00000088",
+                    "lane7": "0x0000008c"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000036",
+                    "lane1": "0x00000038",
+                    "lane2": "0x00000032",
+                    "lane3": "0x00000032",
+                    "lane4": "0x00000036",
+                    "lane5": "0x00000038",
+                    "lane6": "0x00000032",
+                    "lane7": "0x00000032"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x00000044",
+                    "lane4": "0x00000044",
+                    "lane1": "0x00000044",
+                    "lane5": "0x00000044",
+                    "lane2": "0x00000044",
+                    "lane6": "0x00000044",
+                    "lane3": "0x00000044",
+                    "lane7": "0x00000044"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                }
+            }
+        },
+        "20": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000070",
+                    "lane3": "0x00000084",
+                    "lane4": "0x0000008c",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000080",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0x00000000",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0x00000000",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0x00000004",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000004",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x0000003a",
+                    "lane1": "0x0000003a",
+                    "lane2": "0x00000034",
+                    "lane3": "0x00000036",
+                    "lane4": "0x0000003a",
+                    "lane5": "0x0000003a",
+                    "lane6": "0x00000034",
+                    "lane7": "0x00000036"
+                },
+                "post1": {
+                    "lane0": "0xfffffff6",
+                    "lane1": "0xfffffff6",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffff6",
+                    "lane5": "0xfffffff6",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffffc"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x00000044",
+                    "lane4": "0x00000044",
+                    "lane1": "0x00000044",
+                    "lane5": "0x00000044",
+                    "lane2": "0x00000044",
+                    "lane6": "0x00000044",
+                    "lane3": "0x00000044",
+                    "lane7": "0x00000044"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                }
+            }
+        },
+        "21": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000006",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe0",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x0000008c",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000080",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000070",
+                    "lane5": "0x00000084",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff0"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x0000008c",
+                    "lane1": "0x00000088",
+                    "lane2": "0x0000008c",
+                    "lane3": "0x00000080",
+                    "lane4": "0x0000008c",
+                    "lane5": "0x0000008c",
+                    "lane6": "0x00000084",
+                    "lane7": "0x0000008c"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000048",
+                    "lane1": "0x00000044",
+                    "lane2": "0x00000044",
+                    "lane3": "0x00000040",
+                    "lane4": "0x00000048",
+                    "lane5": "0x00000044",
+                    "lane6": "0x00000044",
+                    "lane7": "0x00000040"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff6",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff6"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane4": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane5": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane6": "0x00000046",
+                    "lane3": "0x00000046",
+                    "lane7": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                }
+            }
+        },
+        "22": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x0000008c",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x0000008c",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000070",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000070",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000084",
+                    "lane7": "0x0000008c"
+                },
+                "post1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000084",
+                    "lane2": "0x0000008c",
+                    "lane3": "0x0000008c",
+                    "lane4": "0x0000007c",
+                    "lane5": "0x00000080",
+                    "lane6": "0x0000007c",
+                    "lane7": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0x00000000",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000000",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xffffffec"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000044",
+                    "lane1": "0x00000044",
+                    "lane2": "0x00000042",
+                    "lane3": "0x00000044",
+                    "lane4": "0x00000044",
+                    "lane5": "0x00000044",
+                    "lane6": "0x00000042",
+                    "lane7": "0x00000044"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane4": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane5": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane6": "0x00000046",
+                    "lane3": "0x00000046",
+                    "lane7": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                }
+            }
+        },
+        "23": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x0000008c",
+                    "lane1": "0x0000008c",
+                    "lane2": "0x00000088",
+                    "lane3": "0x0000008c",
+                    "lane4": "0x00000088",
+                    "lane5": "0x0000008c",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000070",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000070",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000070"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xffffffe8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000080",
+                    "lane2": "0x0000007c",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000080",
+                    "lane5": "0x0000007c",
+                    "lane6": "0x00000080",
+                    "lane7": "0x0000008c"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000048",
+                    "lane1": "0x00000042",
+                    "lane2": "0x00000044",
+                    "lane3": "0x00000044",
+                    "lane4": "0x00000048",
+                    "lane5": "0x00000042",
+                    "lane6": "0x00000044",
+                    "lane7": "0x00000044"
+                },
+                "post1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xfffffff6",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff6",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xfffffff6",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff6"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x0000004a",
+                    "lane4": "0x0000004a",
+                    "lane1": "0x0000004a",
+                    "lane5": "0x0000004a",
+                    "lane2": "0x0000004a",
+                    "lane6": "0x0000004a",
+                    "lane3": "0x0000004a",
+                    "lane7": "0x0000004a"
+                },
+                "post1": {
+                    "lane0": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                }
+            }
+        },
+        "24": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x0000008c",
+                    "lane1": "0x0000008c",
+                    "lane2": "0x0000008c",
+                    "lane3": "0x0000008c",
+                    "lane4": "0x0000008c",
+                    "lane5": "0x00000088",
+                    "lane6": "0x0000008c",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000070",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000070",
+                    "lane3": "0x00000070",
+                    "lane4": "0x00000070",
+                    "lane5": "0x00000084",
+                    "lane6": "0x00000070",
+                    "lane7": "0x00000070"
+                },
+                "post1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0x00000000",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000074",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000084",
+                    "lane5": "0x0000008c",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0x00000000",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0xfffffffc"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xffffffec"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000040",
+                    "lane1": "0x00000048",
+                    "lane2": "0x00000040",
+                    "lane3": "0x00000044",
+                    "lane4": "0x00000040",
+                    "lane5": "0x00000048",
+                    "lane6": "0x00000040",
+                    "lane7": "0x00000044"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff6",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff6",
+                    "lane7": "0xfffffff4"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x0000004a",
+                    "lane4": "0x0000004a",
+                    "lane1": "0x0000004a",
+                    "lane5": "0x0000004a",
+                    "lane2": "0x0000004a",
+                    "lane6": "0x0000004a",
+                    "lane3": "0x0000004a",
+                    "lane7": "0x0000004a"
+                },
+                "post1": {
+                    "lane0": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                }
+            }
+        },
+        "25": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x0000008c",
+                    "lane2": "0x0000008c",
+                    "lane3": "0x0000008c",
+                    "lane4": "0x0000008c",
+                    "lane5": "0x00000090",
+                    "lane6": "0x0000008c",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000090",
+                    "lane2": "0x0000008c",
+                    "lane3": "0x00000070",
+                    "lane4": "0x0000008c",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000084",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0x00000000",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000000",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffffa"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000042",
+                    "lane1": "0x0000003c",
+                    "lane2": "0x00000042",
+                    "lane3": "0x0000003a",
+                    "lane4": "0x00000042",
+                    "lane5": "0x0000003c",
+                    "lane6": "0x00000042",
+                    "lane7": "0x0000003a"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff6",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff6"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane4": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane5": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane6": "0x00000046",
+                    "lane3": "0x00000046",
+                    "lane7": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                }
+            }
+        },
+        "26": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x0000008c",
+                    "lane2": "0x0000008c",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x0000008c",
+                    "lane7": "0x0000008c"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000070",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000084",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0x00000000",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000084",
+                    "lane3": "0x0000008c",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000084",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000044",
+                    "lane1": "0x00000042",
+                    "lane2": "0x00000038",
+                    "lane3": "0x0000003c",
+                    "lane4": "0x00000044",
+                    "lane5": "0x00000042",
+                    "lane6": "0x00000038",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff6",
+                    "lane2": "0xfffffff6",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff6",
+                    "lane6": "0xfffffff6",
+                    "lane7": "0xfffffff8"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane4": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane5": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane6": "0x00000046",
+                    "lane3": "0x00000046",
+                    "lane7": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                }
+            }
+        },
+        "27": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000090",
+                    "lane2": "0x0000008c",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000088",
+                    "lane5": "0x0000008c",
+                    "lane6": "0x0000008c",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x0000008c",
+                    "lane2": "0x00000070",
+                    "lane3": "0x00000070",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000074",
+                    "lane3": "0x00000088",
+                    "lane4": "0x0000008c",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000080",
+                    "lane7": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0x00000004",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0x00000000",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000040",
+                    "lane1": "0x00000044",
+                    "lane2": "0x00000040",
+                    "lane3": "0x00000040",
+                    "lane4": "0x00000040",
+                    "lane5": "0x00000044",
+                    "lane6": "0x00000040",
+                    "lane7": "0x00000040"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane4": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane5": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane6": "0x00000046",
+                    "lane3": "0x00000046",
+                    "lane7": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                }
+            }
+        },
+        "28": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x0000008c",
+                    "lane4": "0x0000008c",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x0000008c"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000070",
+                    "lane1": "0x00000070",
+                    "lane2": "0x00000070",
+                    "lane3": "0x00000070",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000070",
+                    "lane6": "0x00000088",
+                    "lane7": "0x0000008c"
+                },
+                "post1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000080",
+                    "lane3": "0x00000080",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000084",
+                    "lane6": "0x00000080",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000000",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x0000003e",
+                    "lane1": "0x00000044",
+                    "lane2": "0x00000040",
+                    "lane3": "0x0000003c",
+                    "lane4": "0x0000003e",
+                    "lane5": "0x00000044",
+                    "lane6": "0x00000040",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffff6",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff6",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane4": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane5": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane6": "0x00000046",
+                    "lane3": "0x00000046",
+                    "lane7": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                }
+            }
+        },
+        "29": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000006",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000080",
+                    "lane3": "0x0000008c",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000080",
+                    "lane2": "0x0000008c",
+                    "lane3": "0x00000088",
+                    "lane4": "0x0000008c",
+                    "lane5": "0x00000080",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000070"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xffffffe8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000080",
+                    "lane3": "0x0000007c",
+                    "lane4": "0x00000070",
+                    "lane5": "0x0000008c",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0x00000000",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000000",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000044",
+                    "lane1": "0x00000040",
+                    "lane2": "0x0000003c",
+                    "lane3": "0x00000040",
+                    "lane4": "0x00000044",
+                    "lane5": "0x00000040",
+                    "lane6": "0x0000003c",
+                    "lane7": "0x00000040"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff8"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane4": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane5": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane6": "0x00000046",
+                    "lane3": "0x00000046",
+                    "lane7": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                }
+            }
+        },
+        "30": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe0",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x0000008c",
+                    "lane1": "0x00000088",
+                    "lane2": "0x0000008c",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000070",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000070",
+                    "lane3": "0x0000008c",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000084",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0x00000000",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000080",
+                    "lane5": "0x00000088",
+                    "lane6": "0x0000008c",
+                    "lane7": "0x0000008c"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0x00000000",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0x00000000",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xfffffff0"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000040",
+                    "lane1": "0x00000044",
+                    "lane2": "0x00000040",
+                    "lane3": "0x00000044",
+                    "lane4": "0x00000040",
+                    "lane5": "0x00000044",
+                    "lane6": "0x00000040",
+                    "lane7": "0x00000044"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane4": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane5": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane6": "0x00000046",
+                    "lane3": "0x00000046",
+                    "lane7": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                }
+            }
+        },
+        "31": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x0000008c",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x0000008c"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000070",
+                    "lane2": "0x00000070",
+                    "lane3": "0x00000070",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000070",
+                    "lane6": "0x00000080",
+                    "lane7": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000078",
+                    "lane2": "0x00000080",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000080",
+                    "lane5": "0x00000078",
+                    "lane6": "0x0000007c",
+                    "lane7": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000048",
+                    "lane1": "0x00000046",
+                    "lane2": "0x00000040",
+                    "lane3": "0x00000044",
+                    "lane4": "0x00000048",
+                    "lane5": "0x00000046",
+                    "lane6": "0x00000040",
+                    "lane7": "0x00000044"
+                },
+                "post1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff6",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff6"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x0000004a",
+                    "lane4": "0x0000004a",
+                    "lane1": "0x0000004a",
+                    "lane5": "0x0000004a",
+                    "lane2": "0x0000004a",
+                    "lane6": "0x0000004a",
+                    "lane3": "0x0000004a",
+                    "lane7": "0x0000004a"
+                },
+                "post1": {
+                    "lane0": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                }
+            }
+        },
+        "32": {
+            "50000-copper-1.0M": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000002",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-2.0M": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000070",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000070",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000070",
+                    "lane5": "0x00000070",
+                    "lane6": "0x00000080",
+                    "lane7": "0x0000008c"
+                },
+                "post1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0x00000000",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-copper-3.0M": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffe8"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000080",
+                    "lane5": "0x00000084",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0x00000000",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000004",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "50000-optical": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "main": {
+                    "lane0": "0x00000069",
+                    "lane4": "0x00000069",
+                    "lane1": "0x00000069",
+                    "lane5": "0x00000069",
+                    "lane2": "0x00000069",
+                    "lane6": "0x00000069",
+                    "lane3": "0x00000069",
+                    "lane7": "0x00000069"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "25000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000040",
+                    "lane1": "0x0000004e",
+                    "lane2": "0x00000044",
+                    "lane3": "0x00000046",
+                    "lane4": "0x00000040",
+                    "lane5": "0x0000004e",
+                    "lane6": "0x00000044",
+                    "lane7": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff0"
+                }
+            },
+            "10000-copper-1.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-2.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000001e",
+                    "lane4": "0x0000001e",
+                    "lane1": "0x0000001e",
+                    "lane5": "0x0000001e",
+                    "lane2": "0x0000001e",
+                    "lane6": "0x0000001e",
+                    "lane3": "0x0000001e",
+                    "lane7": "0x0000001e"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            },
+            "10000-copper-3.0M": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003c",
+                    "lane4": "0x0000003c",
+                    "lane1": "0x0000003c",
+                    "lane5": "0x0000003c",
+                    "lane2": "0x0000003c",
+                    "lane6": "0x0000003c",
+                    "lane3": "0x0000003c",
+                    "lane7": "0x0000003c"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-5.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-copper-7.0M": {
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane1": "0xfffffffa",
+                    "lane5": "0xfffffffa",
+                    "lane2": "0xfffffffa",
+                    "lane6": "0xfffffffa",
+                    "lane3": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "main": {
+                    "lane0": "0x00000057",
+                    "lane4": "0x00000057",
+                    "lane1": "0x00000057",
+                    "lane5": "0x00000057",
+                    "lane2": "0x00000057",
+                    "lane6": "0x00000057",
+                    "lane3": "0x00000057",
+                    "lane7": "0x00000057"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                }
+            },
+            "10000-optical": {
+                "pre1": {
+                    "lane0": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "main": {
+                    "lane0": "0x0000004a",
+                    "lane4": "0x0000004a",
+                    "lane1": "0x0000004a",
+                    "lane5": "0x0000004a",
+                    "lane2": "0x0000004a",
+                    "lane6": "0x0000004a",
+                    "lane3": "0x0000004a",
+                    "lane7": "0x0000004a"
+                },
+                "post1": {
+                    "lane0": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                }
+            }
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/pcie.yaml b/device/celestica/x86_64-cel_silverstone_v2-r0/pcie.yaml
new file mode 100644
index 000000000000..0a4fcfbb29da
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/pcie.yaml
@@ -0,0 +1,35 @@
+- bus: '00'
+  dev: '1f'
+  fn: '3'
+  id: 8c22
+  name: 'SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller (rev 05)'
+
+- bus: '04'
+  dev: '00'
+  fn: '0'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+
+- bus: '04'
+  dev: '00'
+  fn: '1'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+
+- bus: '06'
+  dev: '00'
+  fn: '0'
+  id: b980
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b980 (rev 11)'
+
+- bus: '0f'
+  dev: '00'
+  fn: '0'
+  id: 1533
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev 03)'
+
+- bus: '10'
+  dev: '00'
+  fn: '0'
+  id: 7021
+  name: 'Memory controller: Xilinx Corporation Device 7021'
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pd-plugin.json b/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pd-plugin.json
new file mode 100644
index 000000000000..e17bdf2aee33
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pd-plugin.json
@@ -0,0 +1,188 @@
+{
+    "XCVR":
+    {
+        "xcvr_present": {
+            "i2c":
+            {
+                "valmap-QSFP-DD": {"0": true,"1": false},
+                "valmap-SFP+": { "0": true, "1": false}
+            }
+        }
+    },
+
+    "PSU":
+    {
+        "name":
+        {
+            "1": "PSU 1",
+            "2": "PSU 2"
+        },
+        "fan_name":
+        {
+            "1":
+            {
+                "1": "PSU 1 Fan 1"
+            },
+            "2":
+            {
+                "1": "PSU 2 Fan 1"
+            }
+
+        },
+        "thermal_name":
+        {
+            "1": "PSU 1 Temp1",
+            "2": "PSU 2 Temp1"
+        },
+        "psu_present":
+        {
+            "bmc":
+            {
+                "valmap": {"1":true, "0":false}
+            },
+            "i2c":
+            {
+                "valmap": {"1":true, "0": false}
+            }
+        },
+        "psu_fan_dir":
+        {
+            "bmc":
+            {
+                "valmap": {"1":"INTAKE", "0":"EXHAUST"}
+            },
+            "i2c":
+            {
+                "valmap":
+                {
+                    "TDPS-1500AB-A 6":"EXHAUST",
+                    "SAC1500D12AA":"EXHAUST",
+                    "TDPS-1500AB-6 B":"EXHAUST",
+                    "TDPS-1500AB-6 D":"EXHAUST",
+                    "TDPS-1500AB-6 E":"EXHAUST",
+                    "SAC1500D12RA":"INTAKE",
+                    "TDPS-1500AB-6 C":"INTAKE",
+                    "TDPS-1500AB-7 C":"INTAKE"
+                }
+            }
+        },
+        "psu_led_color":
+        {
+            "colmap": {"green":"green", "red":"red"}
+        },
+        "psu_power_good":
+        {
+            "bmc":
+            {
+                "valmap": {"1":true}
+            },
+            "i2c":
+            {
+                "valmap": {"1":true, "0": false}
+            }
+        },
+        "PSU_FAN_MAX_SPEED":"29000"
+    },
+
+    "FAN":
+    {
+        "drawer_name":
+        {
+            "1": "Drawer 1",
+            "2": "Drawer 2",
+            "3": "Drawer 3",
+            "4": "Drawer 4",
+            "5": "Drawer 5",
+            "6": "Drawer 6",
+            "7": "Drawer 7"
+        },
+        "name":
+        {
+            "1":
+            {
+                "1": "Fan 1 Front",
+                "2": "Fan 1 Rear"
+            },
+            "2":
+            {
+                "1": "Fan 2 Front",
+                "2": "Fan 2 Rear"
+            },
+            "3":
+            {
+                "1": "Fan 3 Front",
+                "2": "Fan 3 Rear"
+            },
+            "4":
+            {
+                "1": "Fan 4 Front",
+                "2": "Fan 4 Rear"
+            },
+            "5":
+            {
+                "1": "Fan 5 Front",
+                "2": "Fan 5 Rear"
+            },
+            "6":
+            {
+                "1": "Fan 6 Front",
+                "2": "Fan 6 Rear"
+            },
+            "7":
+            {
+                "1": "Fan 7 Front",
+                "2": "Fan 7 Rear"
+            }
+        },
+        "direction":
+        {
+            "bmc":
+            {
+                "valmap": {"1":"INTAKE", "0":"EXHAUST"}
+            },
+            "i2c":
+            {
+                "valmap": {"0":"INTAKE", "1":"EXHAUST"}
+            }
+
+        },
+
+        "present":
+        {
+            "i2c":
+            {
+                "valmap": {"0":true, "1":false}
+            },
+            "bmc":
+            {
+                "valmap": {"0":true, "1":false}
+            }
+        },
+
+        "FAN_MAX_RPM_SPEED":
+        {
+            "INTAKE": {"0": "32000", "1": "28000"},
+            "EXHAUST": {"0": "32000", "1": "30200"}
+        },
+        "pwm_to_duty_cycle": "lambda pwm: ((pwm*100)/255)",
+	    "duty_cycle_to_pwm": "lambda dc: ((dc*255)/100)"
+    },
+
+    "THERMAL":
+    {
+        "NONE_BMC":
+        {
+            "temp1_high_threshold":
+            {
+                "PSU1_TEMP1": {"B2F": "116", "F2B": "116"},
+                "PSU2_TEMP1": {"B2F": "116", "F2B": "116"},
+                "TEMP_FB_U17": {"B2F": "56", "F2B": "N/A"},
+                "TEMP_SW_U16": {"B2F": "N/A", "F2B": "59"},
+                "XP0R8V_Temp": {"B2F": "125", "F2B": "125"},
+                "VDD_CORE_Temp": {"B2F": "125", "F2B": "125"},
+                "XP3R3V_L_Temp": {"B2F": "125", "F2B": "125"},
+                "XP3R3V_R_Temp": {"B2F": "125", "F2B": "125"}
+            }
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pddf-device.json-bmc b/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pddf-device.json-bmc
new file mode 100644
index 000000000000..87647bff54f9
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pddf-device.json-bmc
@@ -0,0 +1,2114 @@
+{
+"PLATFORM":
+{
+    "num_psus": 2,
+    "num_fantrays": 7,
+    "num_fans_pertray": 2,
+    "num_ports": 34,
+    "num_temps": 14,
+    "num_component": 11,
+    "bmc_present": "True",
+    "pddf_dev_types":
+    {
+        "description":" - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo <dev-address> <dev-type> > <path>/new_device' method",
+        "CPLD":
+        [
+            "i2c_cpld"
+        ],
+        "PSU":
+        [
+            "psu_eeprom",
+            "psu_pmbus"
+        ],
+        "FAN":
+        [
+            "fan_ctrl",
+            "fan_eeprom"
+        ],
+        "PORT_MODULE":
+        [
+            "pddf_xcvr"
+        ],
+        "FPGAPCIE":
+        [
+            "fpgapci"
+        ]
+    },
+        "std_kos":
+        [
+            "lpc_ich",
+            "i2c-dev",
+            "ipmi_devintf",
+            "ipmi_si",
+            "i2c_mux_pca954x",
+            "optoe",
+	        "at24",
+	        "i2c-i801"
+        ],
+        "pddf_kos":
+        [
+            "pddf_client_module",
+            "pddf_cpld_module",
+            "pddf_cpld_driver",
+            "pddf_mux_module",
+            "pddf_led_module",
+            "pddf_fpgai2c_module",
+            "pddf_fpgai2c_driver",
+            "pddf_fpgapci_driver",
+            "pddf_fpgapci_module",
+            "pddf_xcvr_module",
+            "pddf_xcvr_driver_module"
+        ],
+        "custom_kos":
+        [
+            "pddf_custom_fpga_algo",
+            "pddf_custom_wdt"
+        ]
+    },
+
+    "SYSTEM":
+    {
+        "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null},
+        "i2c":
+        {
+            "CONTROLLERS":
+            [
+                {"dev_name":"i2c-0", "dev":"SMBUS0"},
+                {"dev_name":"pcie-0", "dev":"PCIE0"}
+            ]
+        }
+    },
+
+    "SMBUS0":
+    {
+        "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"},
+        "i2c":
+        {
+            "topo_info": {"dev_addr": "0x0"},
+            "DEVICES":
+            [
+                {"dev": "EEPROM1"}
+            ]
+        }
+    },
+
+    "EEPROM1":
+    {
+        "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus": "0x0", "dev_addr": "0x56",  "dev_type": "24c64"},
+            "dev_attr": {"access_mode": "BLOCK"},
+            "attr_list": [
+                {"attr_name": "eeprom"}
+            ]
+        }
+    },
+
+    "PCIE0":
+    {
+        "dev_info": {"device_type": "PCIE", "device_name": "PCIE0", "device_parent": "SYSTEM"},
+        "i2c":
+        {
+            "DEVICES":
+            [
+                {"dev": "FPGAPCIE0"}
+            ]
+        }
+    },
+
+    "FPGAPCIE0":
+    {
+        "dev_info": {"device_type": "FPGAPCIE", "device_name": "FPGAPCIE0", "device_parent": "PCIE0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x0"},
+            "dev_attr": {"vendor_id":"0x10EE", "device_id": "0x7021", "virt_bus": "0x64", "data_base_offset":"0x0",
+                "data_size":"0x25000", "i2c_ch_base_offset":"0x00010000", "i2c_ch_size":"0x1000",  "virt_i2c_ch":"0xf"},
+            "channel":
+            [
+                {"chn":"9", "dev":"CPLD_S1"},
+                {"chn":"9", "dev":"CPLD_S2"},
+                {"chn":"10", "dev":"MUX1"},
+                {"chn":"10", "dev":"MUX2"},
+                {"chn":"10", "dev":"MUX3"},
+                {"chn":"10", "dev":"MUX4"},
+                {"chn":"11", "dev":"PORT33"},
+                {"chn":"12", "dev":"PORT34"}
+            ]
+        }
+    },
+
+    "CPLD_S1":
+    {
+        "dev_info": {"device_type":"CPLD", "device_name":"CPLD_S1", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6C", "dev_addr":"0x30", "dev_type":"i2c_cpld"},
+            "dev_attr":{}
+        }
+    },
+
+    "CPLD_S2":
+    {
+        "dev_info": {"device_type":"CPLD", "device_name":"CPLD_S2", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6C", "dev_addr":"0x31", "dev_type":"i2c_cpld"},
+            "dev_attr":{}
+        }
+    },
+
+    "MUX1":
+    {
+        "dev_info": {"device_type":"MUX", "device_name":"MUX1", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x73", "dev_type":"pca9548"},
+            "dev_attr": {"virt_bus":"0x2", "idle_state": "-2"},
+            "channel":
+            [
+                {"chn":"0", "dev":"PORT16"},
+                {"chn":"1", "dev":"PORT13"},
+                {"chn":"2", "dev":"PORT12"},
+                {"chn":"3", "dev":"PORT10"},
+                {"chn":"4", "dev":"PORT9"},
+                {"chn":"5", "dev":"PORT14"},
+                {"chn":"6", "dev":"PORT11"},
+                {"chn":"7", "dev":"PORT7"}
+            ]
+        }
+    },
+
+    "MUX2":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX2", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x72", "dev_type":"pca9548"},
+            "dev_attr": {"virt_bus":"0xa", "idle_state": "-2"},
+            "channel":
+            [
+                {"chn":"0", "dev":"PORT20"},
+                {"chn":"1", "dev":"PORT17"},
+                {"chn":"2", "dev":"PORT22"},
+                {"chn":"3", "dev":"PORT25"},
+                {"chn":"4", "dev":"PORT19"},
+                {"chn":"5", "dev":"PORT21"},
+                {"chn":"6", "dev":"PORT24"},
+                {"chn":"7", "dev":"PORT18"}
+            ]
+        }
+    },
+
+    "MUX3":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX3", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x71", "dev_type":"pca9548"},
+            "dev_attr": {"virt_bus":"0x12", "idle_state": "-2"},
+            "channel":
+            [
+                {"chn":"0", "dev":"PORT3"},
+                {"chn":"1", "dev":"PORT4"},
+                {"chn":"2", "dev":"PORT1"},
+                {"chn":"3", "dev":"PORT2"},
+                {"chn":"4", "dev":"PORT8"},
+                {"chn":"5", "dev":"PORT6"},
+                {"chn":"6", "dev":"PORT5"},
+                {"chn":"7", "dev":"PORT15"}
+            ]
+        }
+    },
+
+    "MUX4":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX4", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x70", "dev_type":"pca9548"},
+            "dev_attr": {"virt_bus":"0x1a", "idle_state": "-2"},
+            "channel":
+            [
+                {"chn":"0", "dev":"PORT27"},
+                {"chn":"1", "dev":"PORT32"},
+                {"chn":"2", "dev":"PORT29"},
+                {"chn":"3", "dev":"PORT31"},
+                {"chn":"4", "dev":"PORT30"},
+                {"chn":"5", "dev":"PORT23"},
+                {"chn":"6", "dev":"PORT26"},
+                {"chn":"7", "dev":"PORT28"}
+            ]
+        }
+    },
+
+    "PORT1":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT1", "device_parent":"MUX3"},
+        "dev_attr": {"dev_idx":"1"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT1-EEPROM" },
+                {"itf":"control", "dev":"PORT1-CTRL" }
+            ]
+        }
+    },
+    "PORT1-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT1-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT1"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT1-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT1-CTRL", "device_parent":"MUX3", "virt_parent":"PORT1"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x13",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT2":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT2", "device_parent":"MUX3"},
+        "dev_attr": {"dev_idx":"2"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT2-EEPROM" },
+                {"itf":"control", "dev":"PORT2-CTRL" }
+            ]
+        }
+    },
+    "PORT2-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT2-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT2"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT2-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT2-CTRL", "device_parent":"MUX3", "virt_parent":"PORT2"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x14",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+
+    "PORT3":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT3", "device_parent":"MUX3"},
+        "dev_attr": {"dev_idx":"3"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT3-EEPROM" },
+                {"itf":"control", "dev":"PORT3-CTRL" }
+            ]
+        }
+    },
+    "PORT3-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT3-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT3"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT3-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT3-CTRL", "device_parent":"MUX3", "virt_parent":"PORT3"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x11",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT4":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT4", "device_parent":"MUX3"},
+        "dev_attr": {"dev_idx":"4"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT4-EEPROM" },
+                {"itf":"control", "dev":"PORT4-CTRL" }
+            ]
+        }
+    },
+    "PORT4-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT4-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT4"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT4-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT4-CTRL", "device_parent":"MUX3", "virt_parent":"PORT4"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x12",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT5":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT5", "device_parent":"MUX3"},
+        "dev_attr": {"dev_idx":"5"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT5-EEPROM" },
+                {"itf":"control", "dev":"PORT5-CTRL" }
+            ]
+        }
+    },
+    "PORT5-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT5-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT5"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT5-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT5-CTRL", "device_parent":"MUX3", "virt_parent":"PORT5"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x17",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT6":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT6", "device_parent":"MUX3"},
+        "dev_attr": {"dev_idx":"6"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT6-EEPROM" },
+                {"itf":"control", "dev":"PORT6-CTRL" }
+            ]
+        }
+    },
+    "PORT6-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT6-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT6"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT6-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT6-CTRL", "device_parent":"MUX3", "virt_parent":"PORT6"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x16",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT7":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT7", "device_parent":"MUX1"},
+        "dev_attr": {"dev_idx":"7"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT7-EEPROM" },
+                {"itf":"control", "dev":"PORT7-CTRL" }
+            ]
+        }
+    },
+    "PORT7-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT7-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT7"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x8", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT7-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT7-CTRL", "device_parent":"MUX1", "virt_parent":"PORT7"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x8",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT8":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT8", "device_parent":"MUX3"},
+        "dev_attr": {"dev_idx":"8"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT8-EEPROM" },
+                {"itf":"control", "dev":"PORT8-CTRL" }
+            ]
+        }
+    },
+    "PORT8-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT8-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT8"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT8-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT8-CTRL", "device_parent":"MUX3", "virt_parent":"PORT8"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x15",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT9":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT9", "device_parent":"MUX1"},
+        "dev_attr": {"dev_idx":"9"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT9-EEPROM" },
+                {"itf":"control", "dev":"PORT9-CTRL" }
+            ]
+        }
+    },
+    "PORT9-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT9-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT9"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x5", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT9-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT9-CTRL", "device_parent":"MUX1", "virt_parent":"PORT9"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x5",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT10":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT10", "device_parent":"MUX1"},
+        "dev_attr": {"dev_idx":"10"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT10-EEPROM" },
+                {"itf":"control", "dev":"PORT10-CTRL" }
+            ]
+        }
+    },
+    "PORT10-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT10-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT10"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x4", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT10-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT10-CTRL", "device_parent":"MUX1", "virt_parent":"PORT10"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x4",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT11":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT11", "device_parent":"MUX1"},
+        "dev_attr": {"dev_idx":"11"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT11-EEPROM" },
+                {"itf":"control", "dev":"PORT11-CTRL" }
+            ]
+        }
+    },
+    "PORT11-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT11-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT11"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x7", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT11-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT11-CTRL", "device_parent":"MUX1", "virt_parent":"PORT11"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x7",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT12":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT12", "device_parent":"MUX1"},
+        "dev_attr": {"dev_idx":"12"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT12-EEPROM" },
+                {"itf":"control", "dev":"PORT12-CTRL" }
+            ]
+        }
+    },
+    "PORT12-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT12-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT12"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x3", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT12-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT12-CTRL", "device_parent":"MUX1", "virt_parent":"PORT12"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x3",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT13":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT13", "device_parent":"MUX1"},
+        "dev_attr": {"dev_idx":"13"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT13-EEPROM" },
+                {"itf":"control", "dev":"PORT13-CTRL" }
+            ]
+        }
+    },
+    "PORT13-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT13-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT13"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x2", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT13-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT13-CTRL", "device_parent":"MUX1", "virt_parent":"PORT13"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x2",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT14":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT14", "device_parent":"MUX1"},
+        "dev_attr": {"dev_idx":"14"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT14-EEPROM" },
+                {"itf":"control", "dev":"PORT14-CTRL" }
+            ]
+        }
+    },
+    "PORT14-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT14-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT14"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT14-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT14-CTRL", "device_parent":"MUX1", "virt_parent":"PORT14"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT15":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT15", "device_parent":"MUX3"},
+        "dev_attr": {"dev_idx":"15"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT15-EEPROM" },
+                {"itf":"control", "dev":"PORT15-CTRL" }
+            ]
+        }
+    },
+    "PORT15-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT15-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT15"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x18", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT15-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT15-CTRL", "device_parent":"MUX3", "virt_parent":"PORT15"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x18",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT16":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT16", "device_parent":"MUX1"},
+        "dev_attr": {"dev_idx":"16"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT16-EEPROM" },
+                {"itf":"control", "dev":"PORT16-CTRL" }
+            ]
+        }
+    },
+    "PORT16-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT16-EEPROM", "device_parent":"MUX1", "virt_parent":"PORT16"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT16-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT16-CTRL", "device_parent":"MUX1", "virt_parent":"PORT16"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT17":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT17", "device_parent":"MUX2"},
+        "dev_attr": {"dev_idx":"17"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT17-EEPROM" },
+                {"itf":"control", "dev":"PORT17-CTRL" }
+            ]
+        }
+    },
+    "PORT17-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT17-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT17"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0xa", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT17-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT17-CTRL", "device_parent":"MUX2", "virt_parent":"PORT17"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0xa",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT18":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT18", "device_parent":"MUX2"},
+        "dev_attr": {"dev_idx":"18"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT18-EEPROM" },
+                {"itf":"control", "dev":"PORT18-CTRL" }
+            ]
+        }
+    },
+    "PORT18-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT18-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT18"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT18-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT18-CTRL", "device_parent":"MUX2", "virt_parent":"PORT18"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x10",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT19":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT19", "device_parent":"MUX2"},
+        "dev_attr": {"dev_idx":"19"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT19-EEPROM" },
+                {"itf":"control", "dev":"PORT19-CTRL" }
+            ]
+        }
+    },
+    "PORT19-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT19-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT19"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0xd", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT19-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT19-CTRL", "device_parent":"MUX2", "virt_parent":"PORT19"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0xd",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT20":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT20", "device_parent":"MUX2"},
+        "dev_attr": {"dev_idx":"20"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT20-EEPROM" },
+                {"itf":"control", "dev":"PORT20-CTRL" }
+            ]
+        }
+    },
+    "PORT20-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT20-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT20"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x9", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT20-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT20-CTRL", "device_parent":"MUX2", "virt_parent":"PORT20"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x9",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT21":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT21", "device_parent":"MUX2"},
+        "dev_attr": {"dev_idx":"21"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT21-EEPROM" },
+                {"itf":"control", "dev":"PORT21-CTRL" }
+            ]
+        }
+    },
+    "PORT21-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT21-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT21"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0xe", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT21-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT21-CTRL", "device_parent":"MUX2", "virt_parent":"PORT21"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0xe",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT22":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT22", "device_parent":"MUX2"},
+        "dev_attr": {"dev_idx":"22"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT22-EEPROM" },
+                {"itf":"control", "dev":"PORT22-CTRL" }
+            ]
+        }
+    },
+    "PORT22-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT22-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT22"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0xb", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT22-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT22-CTRL", "device_parent":"MUX2", "virt_parent":"PORT22"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0xb",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT23":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT23", "device_parent":"MUX4"},
+        "dev_attr": {"dev_idx":"23"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT23-EEPROM" },
+                {"itf":"control", "dev":"PORT23-CTRL" }
+            ]
+        }
+    },
+    "PORT23-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT23-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT23"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1e", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT23-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT23-CTRL", "device_parent":"MUX4", "virt_parent":"PORT23"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1e",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT24":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT24", "device_parent":"MUX2"},
+        "dev_attr": {"dev_idx":"24"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT24-EEPROM" },
+                {"itf":"control", "dev":"PORT24-CTRL" }
+            ]
+        }
+    },
+    "PORT24-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT24-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT24"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0xf", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT24-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT24-CTRL", "device_parent":"MUX2", "virt_parent":"PORT24"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0xf",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT25":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT25", "device_parent":"MUX2"},
+        "dev_attr": {"dev_idx":"25"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT25-EEPROM" },
+                {"itf":"control", "dev":"PORT25-CTRL" }
+            ]
+        }
+    },
+    "PORT25-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT25-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT25"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0xc", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT25-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT25-CTRL", "device_parent":"MUX2", "virt_parent":"PORT25"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0xc",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT26":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT26", "device_parent":"MUX4"},
+        "dev_attr": {"dev_idx":"26"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT26-EEPROM" },
+                {"itf":"control", "dev":"PORT26-CTRL" }
+            ]
+        }
+    },
+    "PORT26-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT26-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT26"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1f", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT26-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT26-CTRL", "device_parent":"MUX4", "virt_parent":"PORT26"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1f",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT27":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT27", "device_parent":"MUX4"},
+        "dev_attr": {"dev_idx":"27"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT27-EEPROM" },
+                {"itf":"control", "dev":"PORT27-CTRL" }
+            ]
+        }
+    },
+    "PORT27-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT27-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT27"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x19", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT27-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT27-CTRL", "device_parent":"MUX4", "virt_parent":"PORT27"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x19",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT28":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT28", "device_parent":"MUX4"},
+        "dev_attr": {"dev_idx":"28"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT28-EEPROM" },
+                {"itf":"control", "dev":"PORT28-CTRL" }
+            ]
+        }
+    },
+    "PORT28-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT28-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT28"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x20", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT28-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT28-CTRL", "device_parent":"MUX4", "virt_parent":"PORT28"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x20",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT29":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT29", "device_parent":"MUX4"},
+        "dev_attr": {"dev_idx":"29"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT29-EEPROM" },
+                {"itf":"control", "dev":"PORT29-CTRL" }
+            ]
+        }
+    },
+    "PORT29-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT29-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT29"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1b", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT29-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT29-CTRL", "device_parent":"MUX4", "virt_parent":"PORT29"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1b",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT30":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT30", "device_parent":"MUX4"},
+        "dev_attr": {"dev_idx":"30"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT30-EEPROM" },
+                {"itf":"control", "dev":"PORT30-CTRL" }
+            ]
+        }
+    },
+    "PORT30-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT30-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT30"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1d", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT30-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT30-CTRL", "device_parent":"MUX4", "virt_parent":"PORT30"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1d",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT31":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT31", "device_parent":"MUX4"},
+        "dev_attr": {"dev_idx":"31"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT31-EEPROM" },
+                {"itf":"control", "dev":"PORT31-CTRL" }
+            ]
+        }
+    },
+    "PORT31-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT31-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT31"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1c", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT31-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT31-CTRL", "device_parent":"MUX4", "virt_parent":"PORT31"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1c",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT32":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT32", "device_parent":"MUX4"},
+        "dev_attr": {"dev_idx":"32"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT32-EEPROM" },
+                {"itf":"control", "dev":"PORT32-CTRL" }
+            ]
+        }
+    },
+    "PORT32-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT32-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT32"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1a", "dev_addr":"0x50", "dev_type":"optoe3"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT32-CTRL":
+    {
+        "dev_info": {"device_type":"pci", "device_name":"PORT32-CTRL", "device_parent":"MUX4", "virt_parent":"PORT32"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1a",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+        "PORT33":
+    {
+        "dev_info": {"device_type":"SFP+", "device_name":"PORT33", "device_parent":"FPGAPCIE0"},
+        "dev_attr": {"dev_idx":"33"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT33-EEPROM"},
+                {"itf":"control", "dev":"PORT33-CTRL"}
+            ]
+        }
+    },
+    "PORT33-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT33-EEPROM", "device_parent":"FPGAPCIE0", "virt_parent":"PORT33"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6E", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT33-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT33-CTRL", "device_parent":"FPGAPCIE0", "virt_parent":"PORT33"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6E",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x00", "attr_cmpval":"0x00", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT34":
+    {
+        "dev_info": {"device_type":"SFP+", "device_name":"PORT34", "device_parent":"FPGAPCIE0"},
+        "dev_attr": {"dev_idx":"34"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT34-EEPROM" },
+                {"itf":"control", "dev":"PORT34-CTRL" }
+            ]
+        }
+    },
+    "PORT34-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT34-EEPROM", "device_parent":"FPGAPCIE0", "virt_parent":"PORT34"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6F", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT34-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT34-CTRL", "device_parent":"FPGAPCIE0", "virt_parent":"PORT34"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6F",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x00", "attr_cmpval":"0x00", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PSU1":
+    {
+        "dev_info": {"device_type":"PSU"},
+        "dev_attr": {"dev_idx":"0", "num_psu_fans": "1"},
+        "bmc": {
+            "ipmitool": {
+                "attr_list":
+                [
+                    {"attr_name":"psu_present", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x3A", "raw": "1", "type":"raw", "offset":"2", "mask":"0x01"},
+                    {"attr_name":"psu_power_good", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x3A", "type":"raw", "raw": "1", "offset":"2", "mask":"0x0F"},
+                    {"attr_name":"psu_model_name", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Board Part Number", "separator":": ","field_pos":"2"},
+                    {"attr_name":"psu_serial_num", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Board Serial", "separator":": ","field_pos":"2"},
+                    {"attr_name":"psu_mfr_id", "bmc_cmd":"ipmitool fru print 3", "raw": "0", "field_name":"Board Mfg", "separator":": ", "field_pos":"2"},
+                    {"attr_name":"psu_fan_dir", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x07", "type": "raw","raw": "1"},
+                    {"attr_name":"psu_p_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x30", "type": "raw", "raw": "1", "offset":"0", "multiplier":"6000000"},
+                    {"attr_name":"psu_v_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2E", "type": "raw", "raw":"1", "offset":"0", "multiplier":"100"},
+                    {"attr_name":"psu_i_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2F", "type": "raw", "raw":"1", "offset":"0", "multiplier":"500"},
+                    {"attr_name":"psu_p_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2A", "type": "raw", "raw": "1", "offset":"0", "multiplier":"6000000"},
+                    {"attr_name":"psu_v_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x28", "type": "raw", "raw":"1", "offset":"0", "multiplier":"100"},
+                    {"attr_name":"psu_i_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x29", "type": "raw", "raw":"1", "offset":"0", "multiplier":"500"},
+                    {"attr_name":"psu_fan1_speed_rpm", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2B", "type": "raw", "raw":"1", "offset":"0", "multiplier": "200"},
+                    {"attr_name":"psu_temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2C", "type": "raw", "raw":"1", "offset":"0", "multiplier":"1000"},
+                    {"attr_name":"psu_temp1_high_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x2C", "type": "raw", "raw":"1", "offset":"5", "multiplier":"1"},
+                    {"attr_name":"psu_v_out_max", "bmc_cmd":"ipmitool raw 0x04 0x27 0x2E", "type": "raw", "raw":"1", "offset":"5", "multiplier":"100"},
+                    {"attr_name":"psu_v_out_min", "bmc_cmd":"ipmitool raw 0x04 0x27 0x2E", "type": "raw", "raw":"1", "offset":"2", "multiplier":"100"},
+                    {"attr_name":"psu_p_out_max", "bmc_cmd":"ipmitool raw 0x04 0x27 0x30", "type": "raw", "raw":"1", "offset":"1", "multiplier":"6000"}
+                ]
+            }
+        }
+    },
+
+    "PSU2":
+    {
+        "dev_info": {"device_type":"PSU"},
+        "dev_attr": {"dev_idx":"1", "num_psu_fans": "1"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"psu_present", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x3B", "raw": "1", "type":"raw", "offset":"2", "mask":"0x01"},
+                    {"attr_name":"psu_power_good", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x3B", "type":"raw", "raw": "1", "offset":"2", "mask":"0x0F"},
+                    {"attr_name":"psu_model_name", "bmc_cmd":"ipmitool fru print 4", "raw": "0", "field_name":"Board Part Number", "separator":": ","field_pos":"2"},
+                    {"attr_name":"psu_serial_num", "bmc_cmd":"ipmitool fru print 4", "raw": "0", "field_name":"Board Serial", "separator":": ","field_pos":"2"},
+                    {"attr_name":"psu_mfr_id", "bmc_cmd":"ipmitool fru print 4", "raw": "0", "field_name":"Board Mfg", "separator":": ", "field_pos":"2"},
+                    {"attr_name":"psu_fan_dir", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x07", "type": "raw", "raw": "1"},
+                    {"attr_name":"psu_p_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x39", "type": "raw", "raw": "1", "offset":"0", "multiplier":"6000000"},
+                    {"attr_name":"psu_v_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x37", "type": "raw", "raw":"1", "offset":"0", "multiplier":"100"},
+                    {"attr_name":"psu_i_out", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x38", "type": "raw", "raw":"1", "offset":"0", "multiplier":"500"},
+                    {"attr_name":"psu_p_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x33", "type": "raw", "raw": "1", "offset":"0", "multiplier":"6000000"},
+                    {"attr_name":"psu_v_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x31", "type": "raw", "raw":"1", "offset":"0", "multiplier":"100"},
+                    {"attr_name":"psu_i_in", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x32", "type": "raw", "raw":"1", "offset":"0", "multiplier":"500"},
+                    {"attr_name":"psu_fan1_speed_rpm", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x34", "type": "raw", "raw":"1", "offset":"0", "multiplier": "200"},
+                    {"attr_name":"psu_temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x35", "type": "raw", "raw":"1", "offset":"0", "multiplier":"1000"},
+                    {"attr_name":"psu_temp1_high_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x35", "type": "raw", "raw":"1", "offset":"5", "multiplier":"1"},
+                    {"attr_name":"psu_v_out_max", "bmc_cmd":"ipmitool raw 0x04 0x27 0x37", "type": "raw", "raw":"1", "offset":"5", "multiplier":"100"},
+                    {"attr_name":"psu_v_out_min", "bmc_cmd":"ipmitool raw 0x04 0x27 0x37", "type": "raw", "raw":"1", "offset":"2", "multiplier":"100"},
+                    {"attr_name":"psu_p_out_max", "bmc_cmd":"ipmitool raw 0x04 0x27 0x39", "type": "raw", "raw":"1", "offset":"1", "multiplier":"6000"}
+                ]
+            }
+        }
+    },
+
+    "FAN-CTRL":
+    {
+        "dev_info": {"device_type":"FAN"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"fan1_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x00", "type":"raw", "raw":"1"},
+                    {"attr_name":"fan2_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x00", "type":"raw", "raw":"1"},
+                    {"attr_name":"fan3_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x01", "type":"raw", "raw":"1"},
+                    {"attr_name":"fan4_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x01", "type":"raw", "raw":"1"},
+                    {"attr_name":"fan5_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x02", "type":"raw", "raw":"1"},
+                    {"attr_name":"fan6_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x02", "type":"raw", "raw":"1"},
+                    {"attr_name":"fan7_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x03", "type":"raw", "raw":"1"},
+                    {"attr_name":"fan8_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x03", "type":"raw", "raw":"1"},
+                    {"attr_name":"fan9_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x04", "type":"raw", "raw":"1"},
+                    {"attr_name":"fan10_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x04", "type":"raw", "raw":"1"},
+                    {"attr_name":"fan11_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x05", "type":"raw", "raw":"1"},
+                    {"attr_name":"fan12_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x05", "type":"raw", "raw":"1"},
+                    {"attr_name":"fan13_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x06", "type":"raw", "raw":"1"},
+                    {"attr_name":"fan14_present", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x03 0x06", "type":"raw", "raw":"1"},
+                    {"attr_name":"fan1_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x00", "type":"raw", "raw": "1"},
+                    {"attr_name":"fan2_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x00", "type":"raw", "raw": "1"},
+                    {"attr_name":"fan3_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x01", "type":"raw", "raw": "1"},
+                    {"attr_name":"fan4_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x01", "type":"raw", "raw": "1"},
+                    {"attr_name":"fan5_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x02", "type":"raw", "raw": "1"},
+                    {"attr_name":"fan6_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x02", "type":"raw", "raw": "1"},
+                    {"attr_name":"fan7_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x03", "type":"raw", "raw": "1"},
+                    {"attr_name":"fan8_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x03", "type":"raw", "raw": "1"},
+                    {"attr_name":"fan9_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x04", "type":"raw", "raw": "1"},
+                    {"attr_name":"fan10_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x04", "type":"raw", "raw": "1"},
+                    {"attr_name":"fan11_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x05", "type":"raw", "raw": "1"},
+                    {"attr_name":"fan12_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x05", "type":"raw", "raw": "1"},
+                    {"attr_name":"fan13_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x06", "type":"raw", "raw": "1"},
+                    {"attr_name":"fan14_direction", "bmc_cmd":"ipmitool raw 0x3a 0x62 0x06", "type":"raw", "raw": "1"},
+                    {"attr_name":"fan1_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 00", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"},
+                    {"attr_name":"fan2_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 00", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"},
+                    {"attr_name":"fan3_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 01", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"},
+                    {"attr_name":"fan4_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 01", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"},
+                    {"attr_name":"fan5_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 02", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"},
+                    {"attr_name":"fan6_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 02", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"},
+                    {"attr_name":"fan7_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 03", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"},
+                    {"attr_name":"fan8_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 03", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"},
+                    {"attr_name":"fan9_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 04", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"},
+                    {"attr_name":"fan10_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 04", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"},
+                    {"attr_name":"fan11_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 05", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"},
+                    {"attr_name":"fan12_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 05", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"},
+                    {"attr_name":"fan13_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 06", "raw":"1", "type": "raw", "offset":"0", "multiplier": "150"},
+                    {"attr_name":"fan14_input", "bmc_cmd":"ipmitool raw 0x3a 0x26 0x04 06", "raw":"1", "type": "raw", "offset":"1", "multiplier": "150"},
+                    {"attr_name":"fan1_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x22", "raw":"1", "type":"mask", "mask":"0xff"},
+                    {"attr_name":"fan2_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x22", "raw":"1", "type":"mask", "mask":"0xff"},
+                    {"attr_name":"fan3_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x32", "raw":"1", "type":"mask", "mask":"0xff"},
+                    {"attr_name":"fan4_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x32", "raw":"1", "type":"mask", "mask":"0xff"},
+                    {"attr_name":"fan5_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x42", "raw":"1", "type":"mask", "mask":"0xff"},
+                    {"attr_name":"fan6_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x42", "raw":"1", "type":"mask", "mask":"0xff"},
+                    {"attr_name":"fan7_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x52", "raw":"1", "type":"mask", "mask":"0xff"},
+                    {"attr_name":"fan8_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x52", "raw":"1", "type":"mask", "mask":"0xff"},
+                    {"attr_name":"fan9_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x62", "raw":"1", "type":"mask", "mask":"0xff"},
+                    {"attr_name":"fan10_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x62", "raw":"1", "type":"mask", "mask":"0xff"},
+                    {"attr_name":"fan11_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x72", "raw":"1", "type":"mask", "mask":"0xff"},
+                    {"attr_name":"fan12_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x72", "raw":"1", "type":"mask", "mask":"0xff"},
+                    {"attr_name":"fan13_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x82", "raw":"1", "type":"mask", "mask":"0xff"},
+                    {"attr_name":"fan14_pwm", "bmc_cmd":"ipmitool raw 0x3a 0x64 0x02 0x01 0x82", "raw":"1", "type":"mask", "mask":"0xff"}
+                ]
+            }
+        }
+    },
+
+    "TEMP1":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR"},
+        "dev_attr": {"display_name":"PSU 1 Temp2"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2D", "type": "raw", "raw":"1", "offset":"0"},
+                    {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x2D", "type": "raw", "raw":"1", "offset":"5"}
+                ]
+            }
+        }
+    },
+    "TEMP2":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR"},
+        "dev_attr": {"display_name":"PSU 1 Temp3"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x6A", "type": "raw", "raw":"1", "offset":"0"},
+                    {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x6A", "type": "raw", "raw":"1", "offset":"5"}
+                ]
+            }
+        }
+    },
+    "TEMP3":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR"},
+        "dev_attr": {"display_name":"PSU 2 Temp2"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x36", "type": "raw", "raw":"1", "offset":"0"},
+                    {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x36", "type": "raw", "raw":"1", "offset":"5"}
+                ]
+            }
+        }
+    },
+    "TEMP4":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR"},
+        "dev_attr": {"display_name":"PSU 2 Temp3"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x6B", "type": "raw", "raw":"1", "offset":"0"},
+                    {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x6B", "type": "raw", "raw":"1", "offset":"5"}
+                ]
+            }
+        }
+    },
+    "TEMP5":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR"},
+        "dev_attr": {"display_name":"CPU Internal Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x5", "type": "raw", "raw":"1", "offset":"0"},
+                    {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x5", "type": "raw", "raw":"1", "offset":"5"}
+                ]
+            }
+        }
+    },
+    "TEMP6":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR"},
+        "dev_attr": {"display_name":"ASIC Internal Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x6", "type": "raw", "raw":"1", "offset":"0"},
+                    {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x6", "type": "raw", "raw":"1", "offset":"5"}
+                ]
+            }
+        }
+    },
+    "TEMP7":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR"},
+        "dev_attr": {"display_name":"Fanboard Right Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x2", "type": "raw", "raw":"1", "offset":"0"}
+                ]
+            }
+        }
+    },
+    "TEMP8":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR"},
+        "dev_attr": {"display_name":"Switchboard Right Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x4", "type": "raw", "raw":"1", "offset":"0"},
+                    {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x4", "type": "raw", "raw":"1", "offset":"5"}
+                ]
+            }
+        }
+    },
+    "TEMP9":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR"},
+        "dev_attr": {"display_name":"MP2975 3.3v Chip Right Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x68", "type": "raw", "raw":"1", "offset":"0"},
+                    {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x68", "type": "raw", "raw":"1", "offset":"5"}
+                ]
+            }
+        }
+    },
+    "TEMP10":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR"},
+        "dev_attr": {"display_name":"MP2975 3.3v Chip Left Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x69", "type": "raw", "raw":"1", "offset":"0"},
+                    {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x69", "type": "raw", "raw":"1", "offset":"5"}
+                ]
+            }
+        }
+    },
+    "TEMP11":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR"},
+        "dev_attr": {"display_name":"TPS536C7 Chip Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x66", "type": "raw", "raw":"1", "offset":"0"},
+                    {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x66", "type": "raw", "raw":"1", "offset":"5"}
+                ]
+            }
+        }
+    },
+    "TEMP12":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR"},
+        "dev_attr": {"display_name":"MP2975 0.8v Chip Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x67", "type": "raw", "raw":"1", "offset":"0"},
+                    {"attr_name":"temp1_high_crit_threshold", "bmc_cmd":"ipmitool raw 0x04 0x27 0x67", "type": "raw", "raw":"1", "offset":"5"}
+                ]
+            }
+        }
+    },
+    "TEMP13":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR"},
+        "dev_attr": {"display_name":"Fanboard Center Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x67", "type": "raw", "raw":"1", "offset":"0"}
+                ]
+            }
+        }
+    },
+    "TEMP14":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR"},
+        "dev_attr": {"display_name":"Switchboard Left Temp"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"temp1_input", "bmc_cmd":"ipmitool raw 0x04 0x2D 0x3", "type": "raw", "raw":"1", "offset":"0"}
+                ]
+            }
+        }
+    },
+    
+    "SYS_LED":
+    {
+        "dev_info": {"device_type":"LED", "device_name":"SYS_LED"},
+        "dev_attr": {"index":"0", "flag": "ro"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"raw", "value": "0"},
+                    {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"raw", "value": "1"},
+                    {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"raw", "value": "2"},
+                    {"attr_name":"amber_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"raw", "value": "3"},
+                    {"attr_name":"green_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"raw", "value": "4"},
+                    {"attr_name":"green_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"raw", "value": "5"},
+                    {"attr_name":"amber_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"raw", "value": "6"},
+                    {"attr_name":"alternate_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"raw", "value": "7"},
+                    {"attr_name":"alternate_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x00", "raw": "1", "type":"raw", "value": "8"}
+                    ]
+               }
+        }
+    },
+    "ALARM_LED":
+    {
+        "dev_info": {"device_type":"LED", "device_name":"ALARM_LED"},
+        "dev_attr": {"index":"0", "flag": "ro"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"raw", "value": "0"},
+                    {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"raw", "value": "1"},
+                    {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"raw", "value": "2"},
+                    {"attr_name":"amber_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"raw", "value": "3"},
+                    {"attr_name":"green_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"raw", "value": "4"},
+                    {"attr_name":"green_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"raw", "value": "5"},
+                    {"attr_name":"amber_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"raw", "value": "6"},
+                    {"attr_name":"alternate_blink_1hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"raw", "value": "7"},
+                    {"attr_name":"alternate_blink_4hz", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x01", "raw": "1", "type":"raw", "value": "8"}
+                ]
+           }
+        }
+    },
+    "FANTRAY1_LED":
+    {
+        "dev_info": {"device_type":"LED", "device_name":"FANTRAY1_LED"},
+        "dev_attr": {"index":"0", "flag": "ro"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x04", "raw": "1", "type":"raw", "value": "0"},
+                    {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x04", "raw": "1", "type":"raw", "value": "1"},
+                    {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x04", "raw": "1", "type":"raw", "value": "2"}
+                ]
+            }
+        }
+    },
+    "FANTRAY2_LED":
+    {
+        "dev_info": {"device_type":"LED", "device_name":"FANTRAY2_LED"},
+        "dev_attr": {"index":"1", "flag": "ro"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x05", "raw": "1", "type":"raw", "value": "0"},
+                    {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x05", "raw": "1", "type":"raw", "value": "1"},
+                    {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x05", "raw": "1", "type":"raw", "value": "2"}
+                ]
+            }
+        }
+    },
+    "FANTRAY3_LED":
+    {
+        "dev_info": {"device_type":"LED", "device_name":"FANTRAY3_LED"},
+        "dev_attr": {"index":"2", "flag": "ro"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x06", "raw": "1", "type":"raw", "value": "0"},
+                    {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x06", "raw": "1", "type":"raw", "value": "1"},
+                    {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x06", "raw": "1", "type":"raw", "value": "2"}
+                ]
+            }
+        }
+    },
+    "FANTRAY4_LED":
+    {
+        "dev_info": {"device_type":"LED", "device_name":"FANTRAY4_LED"},
+        "dev_attr": {"index":"3", "flag": "ro"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x07", "raw": "1", "type":"raw", "value": "0"},
+                    {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x07", "raw": "1", "type":"raw", "value": "1"},
+                    {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x07", "raw": "1", "type":"raw", "value": "2"}
+                ]
+            }
+        }
+    },
+    "FANTRAY5_LED":
+    {
+        "dev_info": {"device_type":"LED", "device_name":"FANTRAY5_LED"},
+        "dev_attr": {"index":"4", "flag": "ro"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x08", "raw": "1", "type":"raw", "value": "0"},
+                    {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x08", "raw": "1", "type":"raw", "value": "1"},
+                    {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x08", "raw": "1", "type":"raw", "value": "2"}
+                ]
+            }
+        }
+    },
+    "FANTRAY6_LED":
+    {
+        "dev_info": {"device_type":"LED", "device_name":"FANTRAY6_LED"},
+        "dev_attr": {"index":"5", "flag": "ro"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x09", "raw": "1", "type":"raw", "value": "0"},
+                    {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x09", "raw": "1", "type":"raw", "value": "1"},
+                    {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x09", "raw": "1", "type":"raw", "value": "2"}
+                ]
+            }
+        }
+    },
+    "FANTRAY7_LED":
+    {
+        "dev_info": {"device_type":"LED", "device_name":"FANTRAY7_LED"},
+        "dev_attr": {"index":"6", "flag": "ro"},
+        "bmc": {
+            "ipmitool" : {
+                "attr_list":
+                [
+                    {"attr_name":"off", "bmc_cmd":"ipmitool raw 0x3a 0x39 0x01 0x0a", "raw": "1", "type":"raw", "value": "0"},
+                    {"attr_name":"green", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x0a", "raw": "1", "type":"raw", "value": "1"},
+                    {"attr_name":"amber", "bmc_cmd":"ipmitool raw 0x3A 0x39 0x01 0x0a", "raw": "1", "type":"raw", "value": "2"}
+                ]
+            }
+        }
+    }
+}
+
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pddf-device.json-nonebmc b/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pddf-device.json-nonebmc
new file mode 100644
index 000000000000..f58c32095338
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/pddf/pddf-device.json-nonebmc
@@ -0,0 +1,2058 @@
+{
+"PLATFORM":
+{
+    "num_psus": 2,
+    "num_fantrays": 7,
+    "num_fans_pertray": 2,
+    "num_ports": 34,
+    "num_temps": 6,
+    "num_component": 8,
+    "bmc_present": "False",
+    "pddf_dev_types":
+    {
+        "description":" - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo <dev-address> <dev-type> > <path>/new_device' method",
+        "CPLD":
+        [
+            "i2c_cpld",
+            "cpld_eeprom"
+        ],
+        "PSU":
+        [
+            "psu_pmbus"
+        ],
+        "FAN":
+        [
+            "fan_ctrl",
+            "fan_eeprom",
+            "fan_cpld"
+        ],
+        "PORT_MODULE":
+        [
+            "pddf_xcvr"
+        ],
+        "FPGAPCIE":
+        [
+            "fpgapci"
+        ]
+    },
+        "std_kos":
+        [
+            "lpc_ich",
+            "i2c-dev",
+            "ipmi_devintf",
+            "i2c_mux_pca954x",
+            "optoe",
+	        "at24",
+	        "i2c-i801"
+        ],
+        "pddf_kos":
+        [
+            "pddf_client_module",
+            "pddf_psu_module",
+            "pddf_cpld_module",
+            "pddf_cpld_driver",
+            "pddf_mux_module",
+            "pddf_fpgai2c_module",
+            "pddf_fpgai2c_driver",
+            "pddf_fpgapci_driver",
+            "pddf_fpgapci_module",
+            "pddf_xcvr_module",
+            "pddf_xcvr_driver_module",
+            "pddf_fan_module"
+        ],
+        "custom_kos":
+        [
+            "pddf_custom_led_module",
+            "pddf_custom_wdt",
+            "pddf_custom_fpga_algo",
+            "pddf_custom_fan_driver_module",
+            "pddf_custom_psu_driver_module",
+            "tps536c7"
+        ]
+    },
+
+    "SYSTEM":
+    {
+        "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null},
+        "i2c":
+        {
+            "CONTROLLERS":
+            [
+                {"dev_name":"i2c-0", "dev":"SMBUS0"},
+                {"dev_name":"pcie-0", "dev":"PCIE0"}
+            ]
+        }
+    },
+
+    "SMBUS0":
+    {
+        "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"},
+        "i2c":
+        {
+            "topo_info": {"dev_addr": "0x0"},
+            "DEVICES":
+            [
+                {"dev": "EEPROM1"}
+            ]
+        }
+    },
+
+    "EEPROM1":
+    {
+        "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus": "0x0", "dev_addr": "0x56",  "dev_type": "24c64"},
+            "dev_attr": {"access_mode": "BLOCK"},
+            "attr_list": [
+                {"attr_name": "eeprom"}
+            ]
+        }
+    },
+
+    "PCIE0":
+    {
+        "dev_info": {"device_type": "PCIE", "device_name": "PCIE0", "device_parent": "SYSTEM"},
+        "i2c":
+        {
+            "DEVICES":
+            [
+                {"dev": "FPGAPCIE0"}
+            ]
+        }
+    },
+
+    "FPGAPCIE0":
+    {
+        "dev_info": {"device_type": "FPGAPCIE", "device_name": "FPGAPCIE0", "device_parent": "PCIE0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x0"},
+            "dev_attr": {"vendor_id":"0x10EE", "device_id": "0x7021", "virt_bus": "0x64", "data_base_offset":"0x0",
+                "data_size":"0x25000", "i2c_ch_base_offset":"0x00010000", "i2c_ch_size":"0x1000",  "virt_i2c_ch":"0xf"},
+            "channel":
+            [
+                {"chn":"1", "dev":"CPLD_B"},
+                {"chn":"3", "dev":"TEMP1"},
+                {"chn":"4", "dev":"TEMP2"},
+                {"chn":"4", "dev":"TEMP3"},
+                {"chn":"4", "dev":"TEMP4"},
+                {"chn":"5", "dev":"CPLD_COME"},
+                {"chn":"6", "dev":"MUX1"},
+                {"chn":"7", "dev":"TEMP5"},
+                {"chn":"8", "dev":"MUX2"},
+                {"chn":"8", "dev":"FAN_CPLD"},
+                {"chn":"8", "dev":"FAN-CTRL"},
+                {"chn":"9", "dev":"CPLD_S1"},
+                {"chn":"9", "dev":"CPLD_S2"},
+                {"chn":"10", "dev":"MUX3"},
+                {"chn":"10", "dev":"MUX4"},
+                {"chn":"10", "dev":"MUX5"},
+                {"chn":"10", "dev":"MUX6"},
+                {"chn":"11", "dev":"PORT33"},
+                {"chn":"12", "dev":"PORT34"}
+            ]
+        }
+    },
+
+    "CPLD_B":
+    {
+        "dev_info": { "device_type":"CPLD", "device_name":"CPLD_B", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x64", "dev_addr":"0x0d", "dev_type":"i2c_cpld"},
+            "dev_attr":{}
+        }
+    },
+
+    "CPLD_COME":
+    {
+        "dev_info": { "device_type":"CPLD", "device_name":"CPLD_COME", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x68", "dev_addr":"0x0d", "dev_type":"i2c_cpld"},
+            "dev_attr":{}
+        }
+    },
+
+    "FAN_CPLD":
+    {
+        "dev_info": { "device_type":"CPLD", "device_name":"FAN_CPLD", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6B", "dev_addr":"0x0d", "dev_type":"i2c_cpld"},
+            "dev_attr":{}
+        }
+    },
+
+    "CPLD_S1":
+    {
+        "dev_info": {"device_type":"CPLD", "device_name":"CPLD_S1", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6C", "dev_addr":"0x30", "dev_type":"i2c_cpld"},
+            "dev_attr":{}
+        }
+    },
+
+    "CPLD_S2":
+    {
+        "dev_info": {"device_type":"CPLD", "device_name":"CPLD_S2", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6C", "dev_addr":"0x31", "dev_type":"i2c_cpld"},
+            "dev_attr":{}
+        }
+    },
+
+    "MUX1":
+    {
+        "dev_info": {"device_type":"MUX", "device_name":"MUX1", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x69", "dev_addr":"0x70", "dev_type":"pca9548"},
+            "dev_attr": {"virt_bus":"0x01", "idle_state": "-2"},
+            "channel":
+            [
+                {"chn":"0", "dev":"PSU1"},
+                {"chn":"1", "dev":"PSU2"}
+            ]
+        }
+    },
+    "MUX2":
+    {
+        "dev_info": {"device_type":"MUX", "device_name":"MUX2", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6B", "dev_addr":"0x77", "dev_type":"pca9548"},
+            "dev_attr": {"virt_bus":"0x09", "idle_state": "-2"},
+            "channel":
+            [
+                {"chn":"7", "dev":"TEMP6"}
+            ]
+        }
+    },
+    "MUX3":
+    {
+        "dev_info": {"device_type":"MUX", "device_name":"MUX3", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x73", "dev_type":"pca9548"},
+            "dev_attr": {"virt_bus":"0x11", "idle_state": "-2"},
+            "channel":
+            [
+                {"chn":"0", "dev":"PORT16"},
+                {"chn":"1", "dev":"PORT13"},
+                {"chn":"2", "dev":"PORT12"},
+                {"chn":"3", "dev":"PORT10"},
+                {"chn":"4", "dev":"PORT9"},
+                {"chn":"5", "dev":"PORT14"},
+                {"chn":"6", "dev":"PORT11"},
+                {"chn":"7", "dev":"PORT7"}
+            ]
+        }
+    },
+    "MUX4":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX4", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x72", "dev_type":"pca9548"},
+            "dev_attr": {"virt_bus":"0x19", "idle_state": "-2"},
+            "channel":
+            [
+                {"chn":"0", "dev":"PORT20"},
+                {"chn":"1", "dev":"PORT17"},
+                {"chn":"2", "dev":"PORT22"},
+                {"chn":"3", "dev":"PORT25"},
+                {"chn":"4", "dev":"PORT19"},
+                {"chn":"5", "dev":"PORT21"},
+                {"chn":"6", "dev":"PORT24"},
+                {"chn":"7", "dev":"PORT18"}
+            ]
+        }
+    },
+    "MUX5":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX5", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x71", "dev_type":"pca9548"},
+            "dev_attr": {"virt_bus":"0x21", "idle_state": "-2"},
+            "channel":
+            [
+                {"chn":"0", "dev":"PORT3"},
+                {"chn":"1", "dev":"PORT4"},
+                {"chn":"2", "dev":"PORT1"},
+                {"chn":"3", "dev":"PORT2"},
+                {"chn":"4", "dev":"PORT8"},
+                {"chn":"5", "dev":"PORT6"},
+                {"chn":"6", "dev":"PORT5"},
+                {"chn":"7", "dev":"PORT15"}
+            ]
+        }
+    },
+    "MUX6":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX6", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6D", "dev_addr":"0x70", "dev_type":"pca9548"},
+            "dev_attr": {"virt_bus":"0x29", "idle_state": "-2"},
+            "channel":
+            [
+                {"chn":"0", "dev":"PORT27"},
+                {"chn":"1", "dev":"PORT32"},
+                {"chn":"2", "dev":"PORT29"},
+                {"chn":"3", "dev":"PORT31"},
+                {"chn":"4", "dev":"PORT30"},
+                {"chn":"5", "dev":"PORT23"},
+                {"chn":"6", "dev":"PORT26"},
+                {"chn":"7", "dev":"PORT28"}
+            ]
+        }
+    },
+
+    "PORT1":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT1", "device_parent":"MUX5"},
+        "dev_attr": {"dev_idx":"1"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT1-EEPROM" },
+                {"itf":"control", "dev":"PORT1-CTRL" }
+            ]
+        }
+    },
+    "PORT1-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT1-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT1"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x23", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT1-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT1-CTRL", "device_parent":"MUX5", "virt_parent":"PORT1"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x23",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x10", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT2":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT2", "device_parent":"MUX5"},
+        "dev_attr": {"dev_idx":"2"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT2-EEPROM" },
+                {"itf":"control", "dev":"PORT2-CTRL" }
+            ]
+        }
+    },
+    "PORT2-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT2-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT2"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x24", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT2-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT2-CTRL", "device_parent":"MUX5", "virt_parent":"PORT2"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x24",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x11", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT3":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT3", "device_parent":"MUX5"},
+        "dev_attr": {"dev_idx":"3"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT3-EEPROM" },
+                {"itf":"control", "dev":"PORT3-CTRL" }
+            ]
+        }
+    },
+    "PORT3-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT3-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT3"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x21", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT3-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT3-CTRL", "device_parent":"MUX5", "virt_parent":"PORT3"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x21",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x12", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT4":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT4", "device_parent":"MUX5"},
+        "dev_attr": {"dev_idx":"4"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT4-EEPROM" },
+                {"itf":"control", "dev":"PORT4-CTRL" }
+            ]
+        }
+    },
+    "PORT4-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT4-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT4"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x22", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT4-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT4-CTRL", "device_parent":"MUX5", "virt_parent":"PORT4"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x22",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x13", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT5":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT5", "device_parent":"MUX5"},
+        "dev_attr": {"dev_idx":"5"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT5-EEPROM" },
+                {"itf":"control", "dev":"PORT5-CTRL" }
+            ]
+        }
+    },
+    "PORT5-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT5-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT5"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x27", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT5-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT5-CTRL", "device_parent":"MUX5", "virt_parent":"PORT5"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x27",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x14", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT6":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT6", "device_parent":"MUX5"},
+        "dev_attr": {"dev_idx":"6"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT6-EEPROM" },
+                {"itf":"control", "dev":"PORT6-CTRL" }
+            ]
+        }
+    },
+    "PORT6-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT6-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT6"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x26", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT6-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT6-CTRL", "device_parent":"MUX5", "virt_parent":"PORT6"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x26",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x15", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT7":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT7", "device_parent":"MUX3"},
+        "dev_attr": {"dev_idx":"7"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT7-EEPROM" },
+                {"itf":"control", "dev":"PORT7-CTRL" }
+            ]
+        }
+    },
+    "PORT7-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT7-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT7"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x18", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT7-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT7-CTRL", "device_parent":"MUX3", "virt_parent":"PORT7"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x18",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x16", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT8":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT8", "device_parent":"MUX5"},
+        "dev_attr": {"dev_idx":"8"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT8-EEPROM" },
+                {"itf":"control", "dev":"PORT8-CTRL" }
+            ]
+        }
+    },
+    "PORT8-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT8-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT8"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x25", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT8-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT8-CTRL", "device_parent":"MUX5", "virt_parent":"PORT8"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x25",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x17", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT9":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT9", "device_parent":"MUX3"},
+        "dev_attr": {"dev_idx":"9"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT9-EEPROM" },
+                {"itf":"control", "dev":"PORT9-CTRL" }
+            ]
+        }
+    },
+    "PORT9-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT9-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT9"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT9-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT9-CTRL", "device_parent":"MUX3", "virt_parent":"PORT9"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x15",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x18", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT10":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT10", "device_parent":"MUX3"},
+        "dev_attr": {"dev_idx":"10"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT10-EEPROM" },
+                {"itf":"control", "dev":"PORT10-CTRL" }
+            ]
+        }
+    },
+    "PORT10-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT10-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT10"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT10-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT10-CTRL", "device_parent":"MUX3", "virt_parent":"PORT10"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x14",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x19", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT11":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT11", "device_parent":"MUX3"},
+        "dev_attr": {"dev_idx":"11"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT11-EEPROM" },
+                {"itf":"control", "dev":"PORT11-CTRL" }
+            ]
+        }
+    },
+    "PORT11-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT11-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT11"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT11-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT11-CTRL", "device_parent":"MUX3", "virt_parent":"PORT11"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x17",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1a", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT12":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT12", "device_parent":"MUX3"},
+        "dev_attr": {"dev_idx":"12"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT12-EEPROM" },
+                {"itf":"control", "dev":"PORT12-CTRL" }
+            ]
+        }
+    },
+    "PORT12-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT12-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT12"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT12-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT12-CTRL", "device_parent":"MUX3", "virt_parent":"PORT12"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x13",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1b", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT13":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT13", "device_parent":"MUX3"},
+        "dev_attr": {"dev_idx":"13"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT13-EEPROM" },
+                {"itf":"control", "dev":"PORT13-CTRL" }
+            ]
+        }
+    },
+    "PORT13-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT13-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT13"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT13-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT13-CTRL", "device_parent":"MUX3", "virt_parent":"PORT13"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x12",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1c", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT14":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT14", "device_parent":"MUX3"},
+        "dev_attr": {"dev_idx":"14"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT14-EEPROM" },
+                {"itf":"control", "dev":"PORT14-CTRL" }
+            ]
+        }
+    },
+    "PORT14-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT14-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT14"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT14-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT14-CTRL", "device_parent":"MUX3", "virt_parent":"PORT14"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x16",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1d", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT15":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT15", "device_parent":"MUX5"},
+        "dev_attr": {"dev_idx":"15"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT15-EEPROM" },
+                {"itf":"control", "dev":"PORT15-CTRL" }
+            ]
+        }
+    },
+    "PORT15-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT15-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT15"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x28", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT15-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT15-CTRL", "device_parent":"MUX5", "virt_parent":"PORT15"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x28",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1e", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT16":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT16", "device_parent":"MUX3"},
+        "dev_attr": {"dev_idx":"16"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT16-EEPROM" },
+                {"itf":"control", "dev":"PORT16-CTRL" }
+            ]
+        }
+    },
+    "PORT16-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT16-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT16"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x11", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT16-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT16-CTRL", "device_parent":"MUX3", "virt_parent":"PORT16"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x11",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x30", "attr_devtype":"cpld", "attr_devname":"CPLD_S1", "attr_offset":"0x1f", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT17":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT17", "device_parent":"MUX4"},
+        "dev_attr": {"dev_idx":"17"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT17-EEPROM" },
+                {"itf":"control", "dev":"PORT17-CTRL" }
+            ]
+        }
+    },
+    "PORT17-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT17-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT17"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1a", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT17-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT17-CTRL", "device_parent":"MUX4", "virt_parent":"PORT17"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1a",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x10", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT18":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT18", "device_parent":"MUX4"},
+        "dev_attr": {"dev_idx":"18"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT18-EEPROM" },
+                {"itf":"control", "dev":"PORT18-CTRL" }
+            ]
+        }
+    },
+    "PORT18-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT18-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT18"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x20", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT18-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT18-CTRL", "device_parent":"MUX4", "virt_parent":"PORT18"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x20",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x11", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT19":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT19", "device_parent":"MUX4"},
+        "dev_attr": {"dev_idx":"19"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT19-EEPROM" },
+                {"itf":"control", "dev":"PORT19-CTRL" }
+            ]
+        }
+    },
+    "PORT19-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT19-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT19"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1d", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT19-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT19-CTRL", "device_parent":"MUX4", "virt_parent":"PORT19"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1d",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x12", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT20":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT20", "device_parent":"MUX4"},
+        "dev_attr": {"dev_idx":"20"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT20-EEPROM" },
+                {"itf":"control", "dev":"PORT20-CTRL" }
+            ]
+        }
+    },
+    "PORT20-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT20-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT20"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x19", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT20-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT20-CTRL", "device_parent":"MUX4", "virt_parent":"PORT20"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x19",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x13", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT21":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT21", "device_parent":"MUX4"},
+        "dev_attr": {"dev_idx":"21"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT21-EEPROM" },
+                {"itf":"control", "dev":"PORT21-CTRL" }
+            ]
+        }
+    },
+    "PORT21-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT21-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT21"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1e", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT21-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT21-CTRL", "device_parent":"MUX4", "virt_parent":"PORT21"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1e",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x14", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT22":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT22", "device_parent":"MUX4"},
+        "dev_attr": {"dev_idx":"22"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT22-EEPROM" },
+                {"itf":"control", "dev":"PORT22-CTRL" }
+            ]
+        }
+    },
+    "PORT22-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT22-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT22"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1b", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT22-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT22-CTRL", "device_parent":"MUX4", "virt_parent":"PORT22"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1b",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x15", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT23":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT23", "device_parent":"MUX6"},
+        "dev_attr": {"dev_idx":"23"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT23-EEPROM" },
+                {"itf":"control", "dev":"PORT23-CTRL" }
+            ]
+        }
+    },
+    "PORT23-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT23-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT23"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x2e", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT23-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT23-CTRL", "device_parent":"MUX6", "virt_parent":"PORT23"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x2e",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x16", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT24":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT24", "device_parent":"MUX4"},
+        "dev_attr": {"dev_idx":"24"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT24-EEPROM" },
+                {"itf":"control", "dev":"PORT24-CTRL" }
+            ]
+        }
+    },
+    "PORT24-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT24-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT24"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1f", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT24-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT24-CTRL", "device_parent":"MUX4", "virt_parent":"PORT24"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1f",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x17", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT25":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT25", "device_parent":"MUX4"},
+        "dev_attr": {"dev_idx":"25"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT25-EEPROM" },
+                {"itf":"control", "dev":"PORT25-CTRL" }
+            ]
+        }
+    },
+    "PORT25-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT25-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT25"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1c", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT25-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT25-CTRL", "device_parent":"MUX4", "virt_parent":"PORT25"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x1c",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x18", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT26":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT26", "device_parent":"MUX6"},
+        "dev_attr": {"dev_idx":"26"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT26-EEPROM" },
+                {"itf":"control", "dev":"PORT26-CTRL" }
+            ]
+        }
+    },
+    "PORT26-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT26-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT26"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x2f", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT26-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT26-CTRL", "device_parent":"MUX6", "virt_parent":"PORT26"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x2f",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x19", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT27":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT27", "device_parent":"MUX6"},
+        "dev_attr": {"dev_idx":"27"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT27-EEPROM" },
+                {"itf":"control", "dev":"PORT27-CTRL" }
+            ]
+        }
+    },
+    "PORT27-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT27-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT27"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x29", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT27-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT27-CTRL", "device_parent":"MUX6", "virt_parent":"PORT27"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x29",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1a", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT28":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT28", "device_parent":"MUX6"},
+        "dev_attr": {"dev_idx":"28"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT28-EEPROM" },
+                {"itf":"control", "dev":"PORT28-CTRL" }
+            ]
+        }
+    },
+    "PORT28-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT28-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT28"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x30", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT28-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT28-CTRL", "device_parent":"MUX6", "virt_parent":"PORT28"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x30",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1b", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT29":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT29", "device_parent":"MUX6"},
+        "dev_attr": {"dev_idx":"29"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT29-EEPROM" },
+                {"itf":"control", "dev":"PORT29-CTRL" }
+            ]
+        }
+    },
+    "PORT29-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT29-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT29"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x2b", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT29-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT29-CTRL", "device_parent":"MUX6", "virt_parent":"PORT29"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x2b",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1c", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT30":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT30", "device_parent":"MUX6"},
+        "dev_attr": {"dev_idx":"30"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT30-EEPROM" },
+                {"itf":"control", "dev":"PORT30-CTRL" }
+            ]
+        }
+    },
+    "PORT30-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT30-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT30"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x2d", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+
+    "PORT30-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT30-CTRL", "device_parent":"MUX6", "virt_parent":"PORT30"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x2d",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1d", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT31":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT31", "device_parent":"MUX6"},
+        "dev_attr": {"dev_idx":"31"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT31-EEPROM" },
+                {"itf":"control", "dev":"PORT31-CTRL" }
+            ]
+        }
+    },
+    "PORT31-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT31-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT31"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x2c", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT31-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT31-CTRL", "device_parent":"MUX6", "virt_parent":"PORT31"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x2c",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1e", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT32":
+    {
+        "dev_info": {"device_type":"QSFP-DD", "device_name":"PORT32", "device_parent":"MUX6"},
+        "dev_attr": {"dev_idx":"32"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT32-EEPROM" },
+                {"itf":"control", "dev":"PORT32-CTRL" }
+            ]
+        }
+    },
+    "PORT32-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT32-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT32"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x2a", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT32-CTRL":
+    {
+        "dev_info": {"device_type":"pci", "device_name":"PORT32-CTRL", "device_parent":"MUX6", "virt_parent":"PORT32"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x2a",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x06", "attr_cmpval":"0x40", "attr_len":"1"},
+                {"attr_name":"xcvr_reset", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x31", "attr_devtype":"cpld", "attr_devname":"CPLD_S2", "attr_offset":"0x1f", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PORT33":
+    {
+        "dev_info": {"device_type":"SFP+", "device_name":"PORT33", "device_parent":"FPGAPCIE0"},
+        "dev_attr": {"dev_idx":"33"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT33-EEPROM"},
+                {"itf":"control", "dev":"PORT33-CTRL"}
+            ]
+        }
+    },
+    "PORT33-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT33-EEPROM", "device_parent":"FPGAPCIE0", "virt_parent":"PORT33"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6E", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT33-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT33-CTRL", "device_parent":"FPGAPCIE0", "virt_parent":"PORT33"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6E",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"},
+                {"attr_name":"xcvr_txfault", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_txdisable", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_rxlos", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x04", "attr_mask":"0x00", "attr_cmpval":"0x00", "attr_len":"1"}
+            ]
+        }
+    },
+    "PORT34":
+    {
+        "dev_info": {"device_type":"SFP+", "device_name":"PORT34", "device_parent":"FPGAPCIE0"},
+        "dev_attr": {"dev_idx":"34"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"eeprom", "dev":"PORT34-EEPROM" },
+                {"itf":"control", "dev":"PORT34-CTRL" }
+            ]
+        }
+    },
+    "PORT34-EEPROM":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT34-EEPROM", "device_parent":"FPGAPCIE0", "virt_parent":"PORT34"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6F", "dev_addr":"0x50", "dev_type":"optoe2"},
+            "attr_list":
+            [
+                {"attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT34-CTRL":
+    {
+        "dev_info": {"device_type":"", "device_name":"PORT34-CTRL", "device_parent":"FPGAPCIE0", "virt_parent":"PORT34"},
+        "i2c":
+        {
+            "topo_info": {"parent_bus":"0x6F",   "dev_addr":"0x66", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                {"attr_name":"xcvr_present", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x01", "attr_cmpval":"0x02", "attr_len":"1"},
+                {"attr_name":"xcvr_txfault", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x02", "attr_cmpval":"0x04", "attr_len":"1"},
+                {"attr_name":"xcvr_txdisable", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x03", "attr_cmpval":"0x08", "attr_len":"1"},
+                {"attr_name":"xcvr_rxlos", "attr_devaddr":"0x1000", "attr_devtype":"fpgapci", "attr_devname":"FPGAPCIE0", "attr_offset":"0x08", "attr_mask":"0x00", "attr_cmpval":"0x00", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "PSU1":
+    {
+        "dev_info": { "device_type":"PSU", "device_name":"PSU1", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"pmbus", "dev":"PSU1-PMBUS"}
+
+            ]
+        }
+    },
+
+    "PSU1-PMBUS":
+    {
+        "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU1-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU1"},
+        "i2c":
+        {
+            "topo_info":{ "parent_bus":"0x1", "dev_addr":"0x58", "dev_type":"psu_pmbus"},
+            "attr_list":
+            [
+                {"attr_name":"psu_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x08", "attr_cmpval":"0x00", "attr_len":"1"},
+                {"attr_name":"psu_power_good", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x02", "attr_cmpval":"0x02", "attr_len":"1"},
+                {"attr_name":"psu_model_name", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"},
+                {"attr_name":"psu_serial_num", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"13"},
+                {"attr_name":"psu_mfr_id", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0x00", "attr_len":"7"},
+                {"attr_name":"psu_fan_dir", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"},
+                {"attr_name":"psu_p_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_i_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_p_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x97", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_i_in", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_temp1_input", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_out_max", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_out_min", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_p_out_max", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
+            ]
+        }
+    },
+
+    "PSU2":
+    {
+        "dev_info": { "device_type":"PSU", "device_name":"PSU2", "device_parent":"MUX1"},
+        "dev_attr": { "dev_idx":"2", "num_psu_fans": "1"},
+        "i2c":
+        {
+            "interface":
+            [
+                {"itf":"pmbus", "dev":"PSU2-PMBUS"}
+
+            ]
+        }
+    },
+
+    "PSU2-PMBUS":
+    {
+        "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU2-PMBUS", "device_parent":"MUX1", "virt_parent":"PSU2"},
+        "i2c":
+        {
+            "topo_info":{ "parent_bus":"0x2", "dev_addr":"0x59", "dev_type":"psu_pmbus"},
+            "attr_list":
+            [
+                {"attr_name":"psu_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x04", "attr_cmpval":"0x00", "attr_len":"1"},
+                {"attr_name":"psu_power_good", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "attr_offset":"0x60", "attr_mask":"0x01", "attr_cmpval":"0x01", "attr_len":"1"},
+                {"attr_name":"psu_model_name", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"},
+                {"attr_name":"psu_serial_num", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"13"},
+                {"attr_name":"psu_mfr_id", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"7"},
+                {"attr_name":"psu_fan_dir", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17"},
+                {"attr_name":"psu_p_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_i_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_p_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x97", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x88", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_i_in", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x89", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_temp1_input", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xc0", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_out_max", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_v_out_min", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                {"attr_name":"psu_p_out_max", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
+             ]
+        }
+    },
+
+    "FAN-CTRL":
+    {
+        "dev_info": { "device_type":"FAN", "device_name":"FAN-CTRL", "device_parent":"FPGAPCIE0"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6B", "dev_addr":"0x66", "dev_type":"fan_cpld"},
+            "dev_attr":  { "num_fantrays":"7"},
+            "attr_list":
+            [
+                {"attr_name":"fan1_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x20", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},
+                {"attr_name":"fan2_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x21", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},
+                {"attr_name":"fan3_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x30", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},
+                {"attr_name":"fan4_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x31", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},
+                {"attr_name":"fan5_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x40", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},
+                {"attr_name":"fan6_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x41", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},
+                {"attr_name":"fan7_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x50", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},
+                {"attr_name":"fan8_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x51", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},
+                {"attr_name":"fan9_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x60", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},
+                {"attr_name":"fan10_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x61", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},
+                {"attr_name":"fan11_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x70", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},
+                {"attr_name":"fan12_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x71", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},
+                {"attr_name":"fan13_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x80", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},
+                {"attr_name":"fan14_input", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x81", "attr_mask":"0xff", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},
+                {"attr_name":"fan1_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x22", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"},
+                {"attr_name":"fan2_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x22", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"},
+                {"attr_name":"fan3_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x32", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"},
+                {"attr_name":"fan4_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x32", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"},
+                {"attr_name":"fan5_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x42", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"},
+                {"attr_name":"fan6_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x42", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"},
+                {"attr_name":"fan7_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x52", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"},
+                {"attr_name":"fan8_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x52", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"},
+                {"attr_name":"fan9_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x62", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"},
+                {"attr_name":"fan10_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x62", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"},
+                {"attr_name":"fan11_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x72", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"},
+                {"attr_name":"fan12_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x72", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"},
+                {"attr_name":"fan13_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x82", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"},
+                {"attr_name":"fan14_pwm", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x82", "attr_mask":"0xff", "attr_cmpval": "0x00","attr_len":"1"},
+                {"attr_name":"fan1_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x26", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"},
+                {"attr_name":"fan2_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x26", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"},
+                {"attr_name":"fan3_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x36", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"},
+                {"attr_name":"fan4_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x36", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"},
+                {"attr_name":"fan5_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x46", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"},
+                {"attr_name":"fan6_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x46", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"},
+                {"attr_name":"fan7_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x56", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"},
+                {"attr_name":"fan8_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x56", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"},
+                {"attr_name":"fan9_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x66", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"},
+                {"attr_name":"fan10_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x66", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"},
+                {"attr_name":"fan11_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x76", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"},
+                {"attr_name":"fan12_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x76", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"},
+                {"attr_name":"fan13_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x86", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"},
+                {"attr_name":"fan14_direction", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x86", "attr_mask":"0xff", "attr_cmpval": "0xfe", "attr_len":"1"},
+                {"attr_name":"fan1_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x26", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"},
+                {"attr_name":"fan2_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x26", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"},
+                {"attr_name":"fan3_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x36", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"},
+                {"attr_name":"fan4_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x36", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"},
+                {"attr_name":"fan5_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x46", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"},
+                {"attr_name":"fan6_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x46", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"},
+                {"attr_name":"fan7_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x56", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"},
+                {"attr_name":"fan8_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x56", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"},
+                {"attr_name":"fan9_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x66", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"},
+                {"attr_name":"fan10_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x66", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"},
+                {"attr_name":"fan11_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x76", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"},
+                {"attr_name":"fan12_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x76", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"},
+                {"attr_name":"fan13_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x86", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"},
+                {"attr_name":"fan14_present", "attr_devaddr":"0x0d", "attr_devtype":"cpld", "attr_devname":"FAN_CPLD", "attr_offset":"0x86", "attr_mask":"0x00", "attr_cmpval": "0x01", "attr_len":"1"}
+            ]
+        }
+    },
+
+    "TEMP1":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP1", "device_parent":"FPGAPCIE0"},
+        "dev_attr": {"display_name":"VDD_CORE_Temp"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x66", "dev_addr":"0x6c", "dev_type":"tps536c7"},
+            "attr_list":
+            [
+                {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                {"attr_name": "temp1_max_hyst"},
+                {"attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "TEMP2":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP2", "device_parent":"FPGAPCIE0"},
+        "dev_attr": {"display_name":"XP3R3V_L_Temp"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x67", "dev_addr":"0x76", "dev_type":"mp2975"},
+            "attr_list":
+            [
+                {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                {"attr_name": "temp1_max_hyst"},
+                {"attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "TEMP3":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP3", "device_parent":"FPGAPCIE0"},
+        "dev_attr": {"display_name":"XP3R3V_R_Temp"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x67", "dev_addr":"0x7b", "dev_type":"mp2975"},
+            "attr_list":
+            [
+                {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                {"attr_name": "temp1_max_hyst"},
+                {"attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "TEMP4":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP4", "device_parent":"FPGAPCIE0"},
+        "dev_attr": {"display_name":"XP0R8V_Temp"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x67", "dev_addr":"0x70", "dev_type":"mp2975"},
+            "attr_list":
+            [
+                {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                {"attr_name": "temp1_max_hyst"},
+                {"attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "TEMP5":
+    {
+        "dev_info": {"device_type":"TEMP_SENSOR","device_name":"TEMP5", "device_parent":"FPGAPCIE0"},
+        "dev_attr": {"display_name":"TEMP_SW_U16"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x6A", "dev_addr":"0x49", "dev_type":"lm75"},
+            "attr_list":
+            [
+                {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                {"attr_name": "temp1_max_hyst"},
+                {"attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "TEMP6":
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP6", "device_parent":"MUX2"},
+        "dev_attr": { "display_name":"TEMP_FB_U17"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x10", "dev_addr":"0x49", "dev_type":"lm75"},
+            "attr_list":
+            [
+                {"attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                {"attr_name": "temp1_max_hyst"},
+                {"attr_name": "temp1_input"}
+            ]
+        }
+    },
+
+
+    "SYS_LED":
+    {
+        "dev_info": {"device_type":"LED", "device_name":"SYS_LED"},
+        "dev_attr": {"index":"0"},
+        "i2c": {
+            "attr_list":
+            [
+                {"attr_name":"green", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"green", "value":"0x10", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"},
+                {"attr_name":"amber", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"amber", "value":"0x20", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"},
+                {"attr_name":"green_blink", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"green_blink", "value":"0x02", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"},
+                {"attr_name":"off", "attr_devtype":"cpld", "attr_devname":"CPLD_B", "bits":"5:0","descr":"off", "value":"0x33", "swpld_addr":"0x0d", "swpld_addr_offset":"0x62"}
+            ]
+        }
+    },
+    "FANTRAY1_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
+        "dev_attr": { "index":"0"},
+        "i2c" : {
+            "attr_list":
+            [
+                {"attr_name":"green","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Green","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0x24"},
+                {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Amber","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0x24"}
+            ]
+        }
+    },
+    "FANTRAY2_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
+        "dev_attr": { "index":"1"},
+        "i2c" : {
+            "attr_list":
+            [
+                {"attr_name":"green","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Green","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0x34"},
+                {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Amber","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0x34"}
+            ]
+        }
+    },
+    "FANTRAY3_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
+        "dev_attr": { "index":"2"},
+        "i2c" : {
+            "attr_list":
+            [
+                {"attr_name":"green","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Green","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0x44"},
+                {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Amber","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0x44"}
+            ]
+        }
+    },
+    "FANTRAY4_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
+        "dev_attr": { "index":"3"},
+        "i2c" : {
+            "attr_list":
+            [
+                {"attr_name":"green","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Green","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0x54"},
+                {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Amber","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0x54"}
+            ]
+        }
+    },
+    "FANTRAY5_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
+        "dev_attr": { "index":"4"},
+        "i2c" : {
+            "attr_list":
+            [
+                {"attr_name":"green","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Green","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0x64"},
+                {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Amber","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0x64"}
+            ]
+        }
+    },
+    "FANTRAY6_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
+        "dev_attr": { "index":"5"},
+        "i2c" : {
+            "attr_list":
+            [
+                {"attr_name":"green","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Green","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0x74"},
+                {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Amber","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0x74"}
+            ]
+        }
+    },
+    "FANTRAY7_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"FANTRAY_LED"},
+        "dev_attr": { "index":"6"},
+        "i2c" : {
+            "attr_list":
+            [
+                {"attr_name":"green","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Green","value":"0x01","swpld_addr":"0x0d","swpld_addr_offset":"0x84"},
+                {"attr_name":"amber","attr_devtype":"cpld","attr_devname":"FAN_CPLD","bits":"1:0","descr":"Amber","value":"0x02","swpld_addr":"0x0d","swpld_addr_offset":"0x84"}
+            ]
+        }
+    }
+}
+
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/pddf_support b/device/celestica/x86_64-cel_silverstone_v2-r0/pddf_support
new file mode 100644
index 000000000000..e69de29bb2d1
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/platform.json b/device/celestica/x86_64-cel_silverstone_v2-r0/platform.json
new file mode 100644
index 000000000000..da5f089819ab
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/platform.json
@@ -0,0 +1,914 @@
+{
+    "chassis": {
+        "name": "Silverstone_v2",
+        "status_led": {
+            "controllable": true,
+            "colors": [
+                "green",
+                "amber",
+                "off"
+            ]
+        },
+        "components": [
+            {
+                "name": "BIOS"
+            },
+            {
+                "name": "ONIE"
+            },
+            {
+                "name": "BMC"
+            },
+            {
+                "name": "FPGA"
+            },
+            {
+                "name": "CPLD COMe"
+            },
+            {
+                "name": "CPLD BASE"
+            },
+            {
+                "name": "CPLD SW1"
+            },
+            {
+                "name": "CPLD SW2"
+            },
+            {
+                "name": "CPLD FAN"
+            },
+            {
+                "name": "ASIC PCIe"
+            },
+            {
+                "name": "SSD"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fantray1_1",
+                "status_led": {
+                    "controllable": false
+                },
+                "speed": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fantray1_2",
+                "status_led": {
+                    "controllable": false
+                },
+                "speed": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fantray2_1",
+                "status_led": {
+                    "controllable": false
+                },
+                "speed": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fantray2_2",
+                "status_led": {
+                    "controllable": false
+                },
+                "speed": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fantray3_1",
+                "status_led": {
+                    "controllable": false
+                },
+                "speed": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fantray3_2",
+                "status_led": {
+                    "controllable": false
+                },
+                "speed": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fantray4_1",
+                "status_led": {
+                    "controllable": false
+                },
+                "speed": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fantray4_2",
+                "status_led": {
+                    "controllable": false
+                },
+                "speed": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fantray5_1",
+                "status_led": {
+                    "controllable": false
+                },
+                "speed": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fantray5_2",
+                "status_led": {
+                    "controllable": false
+                },
+                "speed": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fantray6_1",
+                "status_led": {
+                    "controllable": false
+                },
+                "speed": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fantray6_2",
+                "status_led": {
+                    "controllable": false
+                },
+                "speed": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fantray7_1",
+                "status_led": {
+                    "controllable": false
+                },
+                "speed": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fantray7_2",
+                "status_led": {
+                    "controllable": false
+                },
+                "speed": {
+                    "controllable": false
+                }
+            }
+        ],
+        "fan_drawers": [
+            {
+                "name": "Fantray1",
+                "status_led": {
+                    "controllable": true,
+                    "colors": [
+                        "green",
+                        "amber",
+                        "off"
+                    ]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray1_1",
+                        "status_led": {
+                            "controllable": false
+                        },
+                        "speed": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fantray1_2",
+                        "status_led": {
+                            "controllable": false
+                        },
+                        "speed": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray2",
+                "status_led": {
+                    "controllable": true,
+                    "colors": [
+                        "green",
+                        "amber",
+                        "off"
+                    ]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray2_1",
+                        "status_led": {
+                            "controllable": false
+                        },
+                        "speed": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fantray2_2",
+                        "status_led": {
+                            "controllable": false
+                        },
+                        "speed": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray3",
+                "status_led": {
+                    "controllable": true,
+                    "colors": [
+                        "green",
+                        "amber",
+                        "off"
+                    ]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray3_1",
+                        "status_led": {
+                            "controllable": false
+                        },
+                        "speed": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fantray3_2",
+                        "status_led": {
+                            "controllable": false
+                        },
+                        "speed": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray4",
+                "status_led": {
+                    "controllable": true,
+                    "colors": [
+                        "green",
+                        "amber",
+                        "off"
+                    ]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray4_1",
+                        "status_led": {
+                            "controllable": false
+                        },
+                        "speed": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fantray4_2",
+                        "status_led": {
+                            "controllable": false
+                        },
+                        "speed": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray5",
+                "status_led": {
+                    "controllable": true,
+                    "colors": [
+                        "green",
+                        "amber",
+                        "off"
+                    ]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray5_1",
+                        "status_led": {
+                            "controllable": false
+                        },
+                        "speed": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fantray5_2",
+                        "status_led": {
+                            "controllable": false
+                        },
+                        "speed": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray6",
+                "status_led": {
+                    "controllable": true,
+                    "colors": [
+                        "green",
+                        "amber",
+                        "off"
+                    ]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray6_1",
+                        "status_led": {
+                            "controllable": false
+                        },
+                        "speed": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fantray6_2",
+                        "status_led": {
+                            "controllable": false
+                        },
+                        "speed": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray7",
+                "status_led": {
+                    "controllable": true,
+                    "colors": [
+                        "green",
+                        "amber",
+                        "off"
+                    ]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray7_1",
+                        "status_led": {
+                            "controllable": false
+                        },
+                        "speed": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fantray7_2",
+                        "status_led": {
+                            "controllable": false
+                        },
+                        "speed": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "PSU 1",
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "PSU1_FAN1",
+                        "speed": {
+                            "controllable": false
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "PSU 2",
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "PSU2_FAN1",
+                        "speed": {
+                            "controllable": false
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1,1,1,1,1",
+            "lanes": "33,34,35,36,37,38,39,40",
+            "breakout_modes": {
+                    "1x400G": ["Eth1/1"],
+                    "2x100G": ["Eth1/1", "Eth1/5"],
+                    "2x40G": ["Eth1/1", "Eth1/5"],
+                    "4x100G": ["Eth1/1", "Eth1/3", "Eth1/5", "Eth1/7"],
+                    "1x100G(2)": ["Eth1/1"],
+                    "1x100G(4)": ["Eth1/1"],
+                    "1x40G(4)": ["Eth1/1"],
+                    "4x25G(4)": ["Eth1/1", "Eth1/2", "Eth1/3", "Eth1/4"],
+                    "4x10G(4)": ["Eth1/1", "Eth1/2", "Eth1/3", "Eth1/4"]
+            }
+        },
+        "Ethernet8": {
+            "index": "2,2,2,2,2,2,2,2",
+            "lanes": "41,42,43,44,45,46,47,48",
+            "breakout_modes": {
+                    "1x400G": ["Eth2/1"],
+                    "2x100G": ["Eth2/1", "Eth2/5"],
+                    "2x40G": ["Eth2/1", "Eth2/5"],
+                    "4x100G": ["Eth2/1", "Eth2/3", "Eth2/5", "Eth2/7"],
+                    "1x100G(2)": ["Eth2/1"],
+                    "1x100G(4)": ["Eth2/1"],
+                    "1x40G(4)": ["Eth2/1"],
+                    "4x25G(4)": ["Eth2/1", "Eth2/2", "Eth2/3", "Eth2/4"],
+                    "4x10G(4)": ["Eth2/1", "Eth2/2", "Eth2/3", "Eth2/4"]
+            }
+        },
+        "Ethernet16": {
+            "index": "3,3,3,3,3,3,3,3",
+            "lanes": "49,50,51,52,53,54,55,56",
+            "breakout_modes": {
+                    "1x400G": ["Eth3/1"],
+                    "2x100G": ["Eth3/1", "Eth3/5"],
+                    "2x40G": ["Eth3/1", "Eth3/5"],
+                    "4x100G": ["Eth3/1", "Eth3/3", "Eth3/5", "Eth3/7"],
+                    "1x100G(2)": ["Eth3/1"],
+                    "1x100G(4)": ["Eth3/1"],
+                    "1x40G(4)": ["Eth3/1"],
+                    "4x25G(4)": ["Eth3/1", "Eth3/2", "Eth3/3", "Eth3/4"],
+                    "4x10G(4)": ["Eth3/1", "Eth3/2", "Eth3/3", "Eth3/4"]
+            }
+        },
+        "Ethernet24": {
+            "index": "4,4,4,4,4,4,4,4",
+            "lanes": "57,58,59,60,61,62,63,64",
+            "breakout_modes": {
+                    "1x400G": ["Eth4/1"],
+                    "2x100G": ["Eth4/1", "Eth4/5"],
+                    "2x40G": ["Eth4/1", "Eth4/5"],
+                    "4x100G": ["Eth4/1", "Eth4/3", "Eth4/5", "Eth4/7"],
+                    "1x100G(2)": ["Eth4/1"],
+                    "1x100G(4)": ["Eth4/1"],
+                    "1x40G(4)": ["Eth4/1"],
+                    "4x25G(4)": ["Eth4/1", "Eth4/2", "Eth4/3", "Eth4/4"],
+                    "4x10G(4)": ["Eth4/1", "Eth4/2", "Eth4/3", "Eth4/4"]
+            }
+        },
+        "Ethernet32": {
+            "index": "5,5,5,5,5,5,5,5",
+            "lanes": "65,66,67,68,69,70,71,72",
+            "breakout_modes": {
+                    "1x400G": ["Eth5/1"],
+                    "2x100G": ["Eth5/1", "Eth5/5"],
+                    "2x40G": ["Eth5/1", "Eth5/5"],
+                    "4x100G": ["Eth5/1", "Eth5/3", "Eth5/5", "Eth5/7"],
+                    "1x100G(2)": ["Eth5/1"],
+                    "1x100G(4)": ["Eth5/1"],
+                    "1x40G(4)": ["Eth5/1"],
+                    "4x25G(4)": ["Eth5/1", "Eth5/2", "Eth5/3", "Eth5/4"],
+                    "4x10G(4)": ["Eth5/1", "Eth5/2", "Eth5/3", "Eth5/4"]
+            }
+        },
+        "Ethernet40": {
+            "index": "6,6,6,6,6,6,6,6",
+            "lanes": "73,74,75,76,77,78,79,80",
+            "breakout_modes": {
+                    "1x400G": ["Eth6/1"],
+                    "2x100G": ["Eth6/1", "Eth6/5"],
+                    "2x40G": ["Eth6/1", "Eth6/5"],
+                    "4x100G": ["Eth6/1", "Eth6/3", "Eth6/5", "Eth6/7"],
+                    "1x100G(2)": ["Eth6/1"],
+                    "1x100G(4)": ["Eth6/1"],
+                    "1x40G(4)": ["Eth6/1"],
+                    "4x25G(4)": ["Eth6/1", "Eth6/2", "Eth6/3", "Eth6/4"],
+                    "4x10G(4)": ["Eth6/1", "Eth6/2", "Eth6/3", "Eth6/4"]
+            }
+        },
+        "Ethernet48": {
+            "index": "7,7,7,7,7,7,7,7",
+            "lanes": "81,82,83,84,85,86,87,88",
+            "breakout_modes": {
+                    "1x400G": ["Eth7/1"],
+                    "2x100G": ["Eth7/1", "Eth7/5"],
+                    "2x40G": ["Eth7/1", "Eth7/5"],
+                    "4x100G": ["Eth7/1", "Eth7/3", "Eth7/5", "Eth7/7"],
+                    "1x100G(2)": ["Eth7/1"],
+                    "1x100G(4)": ["Eth7/1"],
+                    "1x40G(4)": ["Eth7/1"],
+                    "4x25G(4)": ["Eth7/1", "Eth7/2", "Eth7/3", "Eth7/4"],
+                    "4x10G(4)": ["Eth7/1", "Eth7/2", "Eth7/3", "Eth7/4"]
+            }
+        },
+        "Ethernet56": {
+            "index": "8,8,8,8,8,8,8,8",
+            "lanes": "89,90,91,92,93,94,95,96",
+            "breakout_modes": {
+                    "1x400G": ["Eth8/1"],
+                    "2x100G": ["Eth8/1", "Eth8/5"],
+                    "2x40G": ["Eth8/1", "Eth8/5"],
+                    "4x100G": ["Eth8/1", "Eth8/3", "Eth8/5", "Eth8/7"],
+                    "1x100G(2)": ["Eth8/1"],
+                    "1x100G(4)": ["Eth8/1"],
+                    "1x40G(4)": ["Eth8/1"],
+                    "4x25G(4)": ["Eth8/1", "Eth8/2", "Eth8/3", "Eth8/4"],
+                    "4x10G(4)": ["Eth8/1", "Eth8/2", "Eth8/3", "Eth8/4"]
+            }
+        },
+        "Ethernet64": {
+            "index": "9,9,9,9,9,9,9,9",
+            "lanes": "1,2,3,4,5,6,7,8",
+            "breakout_modes": {
+                    "1x400G": ["Eth9/1"],
+                    "2x100G": ["Eth9/1", "Eth9/5"],
+                    "2x40G": ["Eth9/1", "Eth9/5"],
+                    "4x100G": ["Eth9/1", "Eth9/3", "Eth9/5", "Eth9/7"],
+                    "1x100G(2)": ["Eth9/1"],
+                    "1x100G(4)": ["Eth9/1"],
+                    "1x40G(4)": ["Eth9/1"],
+                    "4x25G(4)": ["Eth9/1", "Eth9/2", "Eth9/3", "Eth9/4"],
+                    "4x10G(4)": ["Eth9/1", "Eth9/2", "Eth9/3", "Eth9/4"]
+            }
+        },
+        "Ethernet72": {
+            "index": "10,10,10,10,10,10,10,10",
+            "lanes": "9,10,11,12,13,14,15,16",
+            "breakout_modes": {
+                    "1x400G": ["Eth10/1"],
+                    "2x100G": ["Eth10/1", "Eth10/5"],
+                    "2x40G": ["Eth10/1", "Eth10/5"],
+                    "4x100G": ["Eth10/1", "Eth10/3", "Eth10/5", "Eth10/7"],
+                    "1x100G(2)": ["Eth10/1"],
+                    "1x100G(4)": ["Eth10/1"],
+                    "1x40G(4)": ["Eth10/1"],
+                    "4x25G(4)": ["Eth10/1", "Eth10/2", "Eth10/3", "Eth10/4"],
+                    "4x10G(4)": ["Eth10/1", "Eth10/2", "Eth10/3", "Eth10/4"]
+            }
+        },
+        "Ethernet80": {
+            "index": "11,11,11,11,11,11,11,11",
+            "lanes": "17,18,19,20,21,22,23,24",
+            "breakout_modes": {
+                    "1x400G": ["Eth11/1"],
+                    "2x100G": ["Eth11/1", "Eth11/5"],
+                    "2x40G": ["Eth11/1", "Eth11/5"],
+                    "4x100G": ["Eth11/1", "Eth11/3", "Eth11/5", "Eth11/7"],
+                    "1x100G(2)": ["Eth11/1"],
+                    "1x100G(4)": ["Eth11/1"],
+                    "1x40G(4)": ["Eth11/1"],
+                    "4x25G(4)": ["Eth11/1", "Eth11/2", "Eth11/3", "Eth11/4"],
+                    "4x10G(4)": ["Eth11/1", "Eth11/2", "Eth11/3", "Eth11/4"]
+            }
+        },
+        "Ethernet88": {
+            "index": "12,12,12,12,12,12,12,12",
+            "lanes": "25,26,27,28,29,30,31,32",
+            "breakout_modes": {
+                    "1x400G": ["Eth12/1"],
+                    "2x100G": ["Eth12/1", "Eth12/5"],
+                    "2x40G": ["Eth12/1", "Eth12/5"],
+                    "4x100G": ["Eth12/1", "Eth12/3", "Eth12/5", "Eth12/7"],
+                    "1x100G(2)": ["Eth12/1"],
+                    "1x100G(4)": ["Eth12/1"],
+                    "1x40G(4)": ["Eth12/1"],
+                    "4x25G(4)": ["Eth12/1", "Eth12/2", "Eth12/3", "Eth12/4"],
+                    "4x10G(4)": ["Eth12/1", "Eth12/2", "Eth12/3", "Eth12/4"]
+            }
+        },
+        "Ethernet96": {
+            "index": "13,13,13,13,13,13,13,13",
+            "lanes": "97,98,99,100,101,102,103,104",
+            "breakout_modes": {
+                    "1x400G": ["Eth13/1"],
+                    "2x100G": ["Eth13/1", "Eth13/5"],
+                    "2x40G": ["Eth13/1", "Eth13/5"],
+                    "4x100G": ["Eth13/1", "Eth13/3", "Eth13/5", "Eth13/7"],
+                    "1x100G(2)": ["Eth13/1"],
+                    "1x100G(4)": ["Eth13/1"],
+                    "1x40G(4)": ["Eth13/1"],
+                    "4x25G(4)": ["Eth13/1", "Eth13/2", "Eth13/3", "Eth13/4"],
+                    "4x10G(4)": ["Eth13/1", "Eth13/2", "Eth13/3", "Eth13/4"]
+            }
+        },
+        "Ethernet104": {
+            "index": "14,14,14,14,14,14,14,14",
+            "lanes": "105,106,107,108,109,110,111,112",
+            "breakout_modes": {
+                    "1x400G": ["Eth14/1"],
+                    "2x100G": ["Eth14/1", "Eth14/5"],
+                    "2x40G": ["Eth14/1", "Eth14/5"],
+                    "4x100G": ["Eth14/1", "Eth14/3", "Eth14/5", "Eth14/7"],
+                    "1x100G(2)": ["Eth14/1"],
+                    "1x100G(4)": ["Eth14/1"],
+                    "1x40G(4)": ["Eth14/1"],
+                    "4x25G(4)": ["Eth14/1", "Eth14/2", "Eth14/3", "Eth14/4"],
+                    "4x10G(4)": ["Eth14/1", "Eth14/2", "Eth14/3", "Eth14/4"]
+            }
+        },
+        "Ethernet112": {
+            "index": "15,15,15,15,15,15,15,15",
+            "lanes": "113,114,115,116,117,118,119,120",
+            "breakout_modes": {
+                    "1x400G": ["Eth15/1"],
+                    "2x100G": ["Eth15/1", "Eth15/5"],
+                    "2x40G": ["Eth15/1", "Eth15/5"],
+                    "4x100G": ["Eth15/1", "Eth15/3", "Eth15/5", "Eth15/7"],
+                    "1x100G(2)": ["Eth15/1"],
+                    "1x100G(4)": ["Eth15/1"],
+                    "1x40G(4)": ["Eth15/1"],
+                    "4x25G(4)": ["Eth15/1", "Eth15/2", "Eth15/3", "Eth15/4"],
+                    "4x10G(4)": ["Eth15/1", "Eth15/2", "Eth15/3", "Eth15/4"]
+            }
+        },
+        "Ethernet120": {
+            "index": "16,16,16,16,16,16,16,16",
+            "lanes": "121,122,123,124,125,126,127,128",
+            "breakout_modes": {
+                    "1x400G": ["Eth16/1"],
+                    "2x100G": ["Eth16/1", "Eth16/5"],
+                    "2x40G": ["Eth16/1", "Eth16/5"],
+                    "4x100G": ["Eth16/1", "Eth16/3", "Eth16/5", "Eth16/7"],
+                    "1x100G(2)": ["Eth16/1"],
+                    "1x100G(4)": ["Eth16/1"],
+                    "1x40G(4)": ["Eth16/1"],
+                    "4x25G(4)": ["Eth16/1", "Eth16/2", "Eth16/3", "Eth16/4"],
+                    "4x10G(4)": ["Eth16/1", "Eth16/2", "Eth16/3", "Eth16/4"]
+            }
+        },
+        "Ethernet128": {
+            "index": "17,17,17,17,17,17,17,17",
+            "lanes": "129,130,131,132,133,134,135,136",
+            "breakout_modes": {
+                    "1x400G": ["Eth17/1"],
+                    "2x100G": ["Eth17/1", "Eth17/5"],
+                    "2x40G": ["Eth17/1", "Eth17/5"],
+                    "4x100G": ["Eth17/1", "Eth17/3", "Eth17/5", "Eth17/7"],
+                    "1x100G(2)": ["Eth17/1"],
+                    "1x100G(4)": ["Eth17/1"],
+                    "1x40G(4)": ["Eth17/1"],
+                    "4x25G(4)": ["Eth17/1", "Eth17/2", "Eth17/3", "Eth17/4"],
+                    "4x10G(4)": ["Eth17/1", "Eth17/2", "Eth17/3", "Eth17/4"]
+            }
+        },
+        "Ethernet136": {
+            "index": "18,18,18,18,18,18,18,18",
+            "lanes": "137,138,139,140,141,142,143,144",
+            "breakout_modes": {
+                    "1x400G": ["Eth18/1"],
+                    "2x100G": ["Eth18/1", "Eth18/5"],
+                    "2x40G": ["Eth18/1", "Eth18/5"],
+                    "4x100G": ["Eth18/1", "Eth18/3", "Eth18/5", "Eth18/7"],
+                    "1x100G(2)": ["Eth18/1"],
+                    "1x100G(4)": ["Eth18/1"],
+                    "1x40G(4)": ["Eth18/1"],
+                    "4x25G(4)": ["Eth18/1", "Eth18/2", "Eth18/3", "Eth18/4"],
+                    "4x10G(4)": ["Eth18/1", "Eth18/2", "Eth18/3", "Eth18/4"]
+            }
+        },
+        "Ethernet144": {
+            "index": "19,19,19,19,19,19,19,19",
+            "lanes": "145,146,147,148,149,150,151,152",
+            "breakout_modes": {
+                    "1x400G": ["Eth19/1"],
+                    "2x100G": ["Eth19/1", "Eth19/5"],
+                    "2x40G": ["Eth19/1", "Eth19/5"],
+                    "4x100G": ["Eth19/1", "Eth19/3", "Eth19/5", "Eth19/7"],
+                    "1x100G(2)": ["Eth19/1"],
+                    "1x100G(4)": ["Eth19/1"],
+                    "1x40G(4)": ["Eth19/1"],
+                    "4x25G(4)": ["Eth19/1", "Eth19/2", "Eth19/3", "Eth19/4"],
+                    "4x10G(4)": ["Eth19/1", "Eth19/2", "Eth19/3", "Eth19/4"]
+            }
+        },
+        "Ethernet152": {
+            "index": "20,20,20,20,20,20,20,20",
+            "lanes": "153,154,155,156,157,158,159,160",
+            "breakout_modes": {
+                    "1x400G": ["Eth20/1"],
+                    "2x100G": ["Eth20/1", "Eth20/5"],
+                    "2x40G": ["Eth20/1", "Eth20/5"],
+                    "4x100G": ["Eth20/1", "Eth20/3", "Eth20/5", "Eth20/7"],
+                    "1x100G(2)": ["Eth20/1"],
+                    "1x100G(4)": ["Eth20/1"],
+                    "1x40G(4)": ["Eth20/1"],
+                    "4x25G(4)": ["Eth20/1", "Eth20/2", "Eth20/3", "Eth20/4"],
+                    "4x10G(4)": ["Eth20/1", "Eth20/2", "Eth20/3", "Eth20/4"]
+            }
+        },
+        "Ethernet160": {
+            "index": "21,21,21,21,21,21,21,21",
+            "lanes": "225,226,227,228,229,230,231,232",
+            "breakout_modes": {
+                    "1x400G": ["Eth21/1"],
+                    "2x100G": ["Eth21/1", "Eth21/5"],
+                    "2x40G": ["Eth21/1", "Eth21/5"],
+                    "4x100G": ["Eth21/1", "Eth21/3", "Eth21/5", "Eth21/7"],
+                    "1x100G(2)": ["Eth21/1"],
+                    "1x100G(4)": ["Eth21/1"],
+                    "1x40G(4)": ["Eth21/1"],
+                    "4x25G(4)": ["Eth21/1", "Eth21/2", "Eth21/3", "Eth21/4"],
+                    "4x10G(4)": ["Eth21/1", "Eth21/2", "Eth21/3", "Eth21/4"]
+            }
+        },
+        "Ethernet168": {
+            "index": "22,22,22,22,22,22,22,22",
+            "lanes": "233,234,235,236,237,238,239,240",
+            "breakout_modes": {
+                    "1x400G": ["Eth22/1"],
+                    "2x100G": ["Eth22/1", "Eth22/5"],
+                    "2x40G": ["Eth22/1", "Eth22/5"],
+                    "4x100G": ["Eth22/1", "Eth22/3", "Eth22/5", "Eth22/7"],
+                    "1x100G(2)": ["Eth22/1"],
+                    "1x100G(4)": ["Eth22/1"],
+                    "1x40G(4)": ["Eth22/1"],
+                    "4x25G(4)": ["Eth22/1", "Eth22/2", "Eth22/3", "Eth22/4"],
+                    "4x10G(4)": ["Eth22/1", "Eth22/2", "Eth22/3", "Eth22/4"]
+            }
+        },
+        "Ethernet176": {
+            "index": "23,23,23,23,23,23,23,23",
+            "lanes": "241,242,243,244,245,246,247,248",
+            "breakout_modes": {
+                    "1x400G": ["Eth23/1"],
+                    "2x100G": ["Eth23/1", "Eth23/5"],
+                    "2x40G": ["Eth23/1", "Eth23/5"],
+                    "4x100G": ["Eth23/1", "Eth23/3", "Eth23/5", "Eth23/7"],
+                    "1x100G(2)": ["Eth23/1"],
+                    "1x100G(4)": ["Eth23/1"],
+                    "1x40G(4)": ["Eth23/1"],
+                    "4x25G(4)": ["Eth23/1", "Eth23/2", "Eth23/3", "Eth23/4"],
+                    "4x10G(4)": ["Eth23/1", "Eth23/2", "Eth23/3", "Eth23/4"]
+            }
+        },
+        "Ethernet184": {
+            "index": "24,24,24,24,24,24,24,24",
+            "lanes": "249,250,251,252,253,254,255,256",
+            "breakout_modes": {
+                    "1x400G": ["Eth24/1"],
+                    "2x100G": ["Eth24/1", "Eth24/5"],
+                    "2x40G": ["Eth24/1", "Eth24/5"],
+                    "4x100G": ["Eth24/1", "Eth24/3", "Eth24/5", "Eth24/7"],
+                    "1x100G(2)": ["Eth24/1"],
+                    "1x100G(4)": ["Eth24/1"],
+                    "1x40G(4)": ["Eth24/1"],
+                    "4x25G(4)": ["Eth24/1", "Eth24/2", "Eth24/3", "Eth24/4"],
+                    "4x10G(4)": ["Eth24/1", "Eth24/2", "Eth24/3", "Eth24/4"]
+            }
+        },
+        "Ethernet192": {
+            "index": "25,25,25,25,25,25,25,25",
+            "lanes": "161,162,163,164,165,166,167,168",
+            "breakout_modes": {
+                    "1x400G": ["Eth25/1"],
+                    "2x100G": ["Eth25/1", "Eth25/5"],
+                    "2x40G": ["Eth25/1", "Eth25/5"],
+                    "4x100G": ["Eth25/1", "Eth25/3", "Eth25/5", "Eth25/7"],
+                    "1x100G(2)": ["Eth25/1"],
+                    "1x100G(4)": ["Eth25/1"],
+                    "1x40G(4)": ["Eth25/1"],
+                    "4x25G(4)": ["Eth25/1", "Eth25/2", "Eth25/3", "Eth25/4"],
+                    "4x10G(4)": ["Eth25/1", "Eth25/2", "Eth25/3", "Eth25/4"]
+            }
+        },
+        "Ethernet200": {
+            "index": "26,26,26,26,26,26,26,26",
+            "lanes": "169,170,171,172,173,174,175,176",
+            "breakout_modes": {
+                    "1x400G": ["Eth26/1"],
+                    "2x100G": ["Eth26/1", "Eth26/5"],
+                    "2x40G": ["Eth26/1", "Eth26/5"],
+                    "4x100G": ["Eth26/1", "Eth26/3", "Eth26/5", "Eth26/7"],
+                    "1x100G(2)": ["Eth26/1"],
+                    "1x100G(4)": ["Eth26/1"],
+                    "1x40G(4)": ["Eth26/1"],
+                    "4x25G(4)": ["Eth26/1", "Eth26/2", "Eth26/3", "Eth26/4"],
+                    "4x10G(4)": ["Eth26/1", "Eth26/2", "Eth26/3", "Eth26/4"]
+            }
+        },
+        "Ethernet208": {
+            "index": "27,27,27,27,27,27,27,27",
+            "lanes": "177,178,179,180,181,182,183,184",
+            "breakout_modes": {
+                    "1x400G": ["Eth27/1"],
+                    "2x100G": ["Eth27/1", "Eth27/5"],
+                    "2x40G": ["Eth27/1", "Eth27/5"],
+                    "4x100G": ["Eth27/1", "Eth27/3", "Eth27/5", "Eth27/7"],
+                    "1x100G(2)": ["Eth27/1"],
+                    "1x100G(4)": ["Eth27/1"],
+                    "1x40G(4)": ["Eth27/1"],
+                    "4x25G(4)": ["Eth27/1", "Eth27/2", "Eth27/3", "Eth27/4"],
+                    "4x10G(4)": ["Eth27/1", "Eth27/2", "Eth27/3", "Eth27/4"]
+            }
+        },
+        "Ethernet216": {
+            "index": "28,28,28,28,28,28,28,28",
+            "lanes": "185,186,187,188,189,190,191,192",
+            "breakout_modes": {
+                    "1x400G": ["Eth28/1"],
+                    "2x100G": ["Eth28/1", "Eth28/5"],
+                    "2x40G": ["Eth28/1", "Eth28/5"],
+                    "4x100G": ["Eth28/1", "Eth28/3", "Eth28/5", "Eth28/7"],
+                    "1x100G(2)": ["Eth28/1"],
+                    "1x100G(4)": ["Eth28/1"],
+                    "1x40G(4)": ["Eth28/1"],
+                    "4x25G(4)": ["Eth28/1", "Eth28/2", "Eth28/3", "Eth28/4"],
+                    "4x10G(4)": ["Eth28/1", "Eth28/2", "Eth28/3", "Eth28/4"]
+            }
+        },
+        "Ethernet224": {
+            "index": "29,29,29,29,29,29,29,29",
+            "lanes": "193,194,195,196,197,198,199,200",
+            "breakout_modes": {
+                    "1x400G": ["Eth29/1"],
+                    "2x100G": ["Eth29/1", "Eth29/5"],
+                    "2x40G": ["Eth29/1", "Eth29/5"],
+                    "4x100G": ["Eth29/1", "Eth29/3", "Eth29/5", "Eth29/7"],
+                    "1x100G(2)": ["Eth29/1"],
+                    "1x100G(4)": ["Eth29/1"],
+                    "1x40G(4)": ["Eth29/1"],
+                    "4x25G(4)": ["Eth29/1", "Eth29/2", "Eth29/3", "Eth29/4"],
+                    "4x10G(4)": ["Eth29/1", "Eth29/2", "Eth29/3", "Eth29/4"]
+            }
+        },
+        "Ethernet232": {
+            "index": "30,30,30,30,30,30,30,30",
+            "lanes": "201,202,203,204,205,206,207,208",
+            "breakout_modes": {
+                    "1x400G": ["Eth30/1"],
+                    "2x100G": ["Eth30/1", "Eth30/5"],
+                    "2x40G": ["Eth30/1", "Eth30/5"],
+                    "4x100G": ["Eth30/1", "Eth30/3", "Eth30/5", "Eth30/7"],
+                    "1x100G(2)": ["Eth30/1"],
+                    "1x100G(4)": ["Eth30/1"],
+                    "1x40G(4)": ["Eth30/1"],
+                    "4x25G(4)": ["Eth30/1", "Eth30/2", "Eth30/3", "Eth30/4"],
+                    "4x10G(4)": ["Eth30/1", "Eth30/2", "Eth30/3", "Eth30/4"]
+            }
+        },
+        "Ethernet240": {
+            "index": "31,31,31,31,31,31,31,31",
+            "lanes": "209,210,211,212,213,214,215,216",
+            "breakout_modes": {
+                    "1x400G": ["Eth31/1"],
+                    "2x100G": ["Eth31/1", "Eth31/5"],
+                    "2x40G": ["Eth31/1", "Eth31/5"],
+                    "4x100G": ["Eth31/1", "Eth31/3", "Eth31/5", "Eth31/7"],
+                    "1x100G(2)": ["Eth31/1"],
+                    "1x100G(4)": ["Eth31/1"],
+                    "1x40G(4)": ["Eth31/1"],
+                    "4x25G(4)": ["Eth31/1", "Eth31/2", "Eth31/3", "Eth31/4"],
+                    "4x10G(4)": ["Eth31/1", "Eth31/2", "Eth31/3", "Eth31/4"]
+            }
+        },
+        "Ethernet248": {
+            "index": "32,32,32,32,32,32,32,32",
+            "lanes": "217,218,219,220,221,222,223,224",
+            "breakout_modes": {
+                    "1x400G": ["Eth32/1"],
+                    "2x100G": ["Eth32/1", "Eth32/5"],
+                    "2x40G": ["Eth32/1", "Eth32/5"],
+                    "4x100G": ["Eth32/1", "Eth32/3", "Eth32/5", "Eth32/7"],
+                    "1x100G(2)": ["Eth32/1"],
+                    "1x100G(4)": ["Eth32/1"],
+                    "1x40G(4)": ["Eth32/1"],
+                    "4x25G(4)": ["Eth32/1", "Eth32/2", "Eth32/3", "Eth32/4"],
+                    "4x10G(4)": ["Eth32/1", "Eth32/2", "Eth32/3", "Eth32/4"]
+            }
+        }
+    }
+
+}
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/platform_asic b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_asic
new file mode 100644
index 000000000000..960467652765
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/platform_components.json-bmc b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_components.json-bmc
new file mode 100644
index 000000000000..8a187b11ffe0
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_components.json-bmc
@@ -0,0 +1,19 @@
+{
+    "chassis": {
+        "DS4000-R 02": {
+            "component": {
+                "BIOS": {},
+                "ONIE": {},
+                "BMC": {},
+                "FPGA": {},
+                "CPLD COMe": {},
+                "CPLD BASE": {},
+                "CPLD SW1": {},
+                "CPLD SW2": {},
+                "CPLD FAN": {},
+                "ASIC PCIe": {},
+                "SSD": {}
+            }
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/platform_components.json-nonebmc b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_components.json-nonebmc
new file mode 100644
index 000000000000..528b0c4dcbfb
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_components.json-nonebmc
@@ -0,0 +1,18 @@
+{
+    "chassis": {
+        "DS4000": {
+            "component": {
+                "BIOS": {},
+                "ONIE": {},
+                "BMC": {},
+                "FPGA": {},
+                "CPLD COMe": {},
+                "CPLD BASE": {},
+                "CPLD SW1": {},
+                "CPLD SW2": {},
+                "CPLD FAN": {},
+                "SSD": {}
+            }
+        }
+    }
+}
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/platform_env.conf b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_env.conf
new file mode 100644
index 000000000000..e69de29bb2d1
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/platform_reboot b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_reboot
new file mode 100755
index 000000000000..a3eef1d10ee2
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/platform_reboot
@@ -0,0 +1,3 @@
+#!/bin/bash
+
+/usr/local/bin/silverstone_v2_platform_shutdown.sh system
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/eeprom.py b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/eeprom.py
new file mode 100644
index 000000000000..03bdb5262f2c
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/eeprom.py
@@ -0,0 +1,20 @@
+#############################################################################
+# Celestica Silverstone-v2
+#
+# Platform and model specific eeprom subclass, inherits from the base class,
+# and provides the followings:
+# - the eeprom format definition
+# - specific encoder/decoder if there is special need
+#############################################################################
+
+try:
+    from sonic_eeprom import eeprom_tlvinfo
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class board(eeprom_tlvinfo.TlvInfoDecoder):
+
+    def __init__(self, name, path, cpld_root, ro):
+        self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0056/eeprom"
+        super(board, self).__init__(self.eeprom_path, 0, '', True)
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/psuutil.py b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/psuutil.py
new file mode 100644
index 000000000000..1b91409e82d7
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/psuutil.py
@@ -0,0 +1,85 @@
+import os.path
+import subprocess
+import sys
+import re
+
+try:
+    from sonic_psu.psu_base import PsuBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class PsuUtil(PsuBase):
+    """Platform-specific PSUutil class"""
+
+    def __init__(self):
+        self.ipmi_sensor = "ipmitool sensor"
+        PsuBase.__init__(self)
+
+    def run_command(self, command):
+        ret, data = subprocess.getstatusoutput(command)
+        if ret != 0:
+            sys.exit(ret)
+        else:
+            return data
+
+    def find_value(self, grep_string):
+        result = re.search(".+\| (0x\d{2})\d{2}\|.+", grep_string)
+        if result:
+            return result.group(1)
+        else:
+            return result
+
+    def get_num_psus(self):
+        """
+        Retrieves the number of PSUs available on the device
+        :return: An integer, the number of PSUs available on the device
+        """
+        return 2
+
+    def get_psu_status(self, index):
+        """
+        Retrieves the oprational status of power supply unit (PSU) defined
+                by 1-based index <index>
+        :param index: An integer, 1-based index of the PSU of which to query status
+        :return: Boolean, True if PSU is operating properly, False if PSU is faulty
+        """
+        if index is None:
+            return False
+
+        grep_key = "PSUL_Status" if index == 1 else "PSUR_Status"
+        grep_string = self.run_command(self.ipmi_sensor + ' | grep ' + grep_key)
+        status_byte = self.find_value(grep_string)
+
+        if status_byte is None:
+            return False
+
+        failure_detected = (int(status_byte, 16) >> 1) & 1
+        input_lost = (int(status_byte, 16) >> 3) & 1
+        if failure_detected or input_lost:
+            return False
+        else:
+            return True
+
+    def get_psu_presence(self, index):
+        """
+        Retrieves the presence status of power supply unit (PSU) defined
+                by 1-based index <index>
+        :param index: An integer, 1-based index of the PSU of which to query status
+        :return: Boolean, True if PSU is plugged, False if not
+        """
+        if index is None:
+            return False
+
+        grep_key = "PSUL_Status" if index == 1 else "PSUR_Status"
+        grep_string = self.run_command(self.ipmi_sensor + ' | grep ' + grep_key)
+        status_byte = self.find_value(grep_string)
+
+        if status_byte is None:
+            return False
+
+        presence = (int(status_byte, 16) >> 0) & 1
+        if presence:
+            return True
+        else:
+            return False
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/sfputil.py b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/sfputil.py
new file mode 100755
index 000000000000..7dd0ab18ae28
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/sfputil.py
@@ -0,0 +1,179 @@
+# Platform-specific SFP transceiver interface for SONiC
+#
+
+try:
+    import time
+    from sonic_sfp.sfputilbase import SfpUtilBase
+except ImportError as e:
+    raise ImportError("%s - required module not found" % str(e))
+
+
+class SfpUtil(SfpUtilBase):
+    """Platform-specific SfpUtil class"""
+
+    PORT_START = 1
+    PORT_END = 33
+    QSFP_PORT_START = 1
+    QSFP_PORT_END = 32
+
+    EEPROM_OFFSET = 1
+    PORT_INFO_PATH = '/sys/class/silverstonev2_fpga'
+
+    _port_name = ""
+    _port_to_eeprom_mapping = {}
+    _port_to_i2cbus_mapping = {}
+
+    @property
+    def port_start(self):
+        return self.PORT_START
+
+    @property
+    def port_end(self):
+        return self.PORT_END
+
+    @property
+    def qsfp_ports(self):
+        return list(range(self.QSFP_PORT_START, self.QSFP_PORT_END + 1))
+
+    @property
+    def port_to_eeprom_mapping(self):
+        return self._port_to_eeprom_mapping
+
+    @property
+    def port_to_i2cbus_mapping(self):
+        return self._port_to_i2cbus_mapping
+
+    def get_port_name(self, port_num):
+        if port_num in self.qsfp_ports:
+            self._port_name = "QSFP" + str(port_num - self.QSFP_PORT_START + 1)
+        else:
+            self._port_name = "SFP" + str(port_num)
+        return self._port_name
+
+    # def get_eeprom_dom_raw(self, port_num):
+    #     if port_num in self.qsfp_ports:
+    #         # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw
+    #         return None
+    #     else:
+    #         # Read dom eeprom at addr 0x51
+    #         return self._read_eeprom_devid(port_num, self.DOM_EEPROM_ADDR, 256)
+
+    def __init__(self):
+        # Override port_to_eeprom_mapping for class initialization
+        eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'
+
+        for x in range(self.PORT_START, self.PORT_END+1):
+            self.port_to_i2cbus_mapping[x] = (x + self.EEPROM_OFFSET)
+            self.port_to_eeprom_mapping[x] = eeprom_path.format(
+                x + self.EEPROM_OFFSET)
+        SfpUtilBase.__init__(self)
+
+    def get_presence(self, port_num):
+
+        # Check for invalid port_num
+        if port_num not in list(range(self.port_start, self.port_end + 1)):
+            return False
+
+        # Get path for access port presence status
+        port_name = self.get_port_name(port_num)
+        sysfs_filename = "qsfp_modprs" if port_num in self.qsfp_ports else "sfp_modabs"
+        reg_path = "/".join([self.PORT_INFO_PATH, port_name, sysfs_filename])
+
+        # Read status
+        try:
+            reg_file = open(reg_path)
+            content = reg_file.readline().rstrip()
+            reg_value = int(content)
+        except IOError as e:
+            print("Error: unable to open file: %s" % str(e))
+            return False
+
+        # Module present is active low
+        if reg_value == 0:
+            return True
+
+        return False
+
+    def get_low_power_mode(self, port_num):
+        # Check for invalid QSFP port_num
+        if port_num not in self.qsfp_ports:
+            return False
+
+        try:
+            port_name = self.get_port_name(port_num)
+            reg_file = open(
+                "/".join([self.PORT_INFO_PATH, port_name, "qsfp_lpmode"]), "r+")
+        except IOError as e:
+            print("Error: unable to open file: %s" % str(e))
+            return False
+
+        # Read status
+        content = reg_file.readline().rstrip()
+        reg_value = int(content, 16)
+        # ModPrsL is active low
+        if reg_value == 0:
+            return False
+
+        return True
+
+    def set_low_power_mode(self, port_num, lpmode):
+        # Check for invalid QSFP port_num
+        if port_num not in self.qsfp_ports:
+            return False
+
+        try:
+            port_name = self.get_port_name(port_num)
+            reg_file = open(
+                "/".join([self.PORT_INFO_PATH, port_name, "qsfp_lpmode"]), "r+")
+        except IOError as e:
+            print("Error: unable to open file: %s" % str(e))
+            return False
+
+        content = hex(lpmode)
+
+        reg_file.seek(0)
+        reg_file.write(content)
+        reg_file.close()
+
+        return True
+
+    def reset(self, port_num):
+        # Check for invalid QSFP port_num
+        if port_num not in self.qsfp_ports:
+            return False
+
+        try:
+            port_name = self.get_port_name(port_num)
+            reg_file = open(
+                "/".join([self.PORT_INFO_PATH, port_name, "qsfp_reset"]), "w")
+        except IOError as e:
+            print("Error: unable to open file: %s" % str(e))
+            return False
+
+        # Convert our register value back to a hex string and write back
+        reg_file.seek(0)
+        reg_file.write(hex(0))
+        reg_file.close()
+
+        # Sleep 1 second to allow it to settle
+        time.sleep(1)
+
+        # Flip the bit back high and write back to the register to take port out of reset
+        try:
+            reg_file = open(
+                "/".join([self.PORT_INFO_PATH, port_name, "qsfp_reset"]), "w")
+        except IOError as e:
+            print("Error: unable to open file: %s" % str(e))
+            return False
+
+        reg_file.seek(0)
+        reg_file.write(hex(1))
+        reg_file.close()
+
+        return True
+
+    def get_transceiver_change_event(self, timeout=0):
+        """
+        TBD: When the feature request.
+        """
+        raise NotImplementedError
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/ssd_util.py b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/ssd_util.py
new file mode 100644
index 000000000000..374f13a684cd
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/plugins/ssd_util.py
@@ -0,0 +1,105 @@
+# -*- coding: utf-8 -*-#
+
+# @Time   : 2023/3/17 16:42
+# @Mail   : J_Talong@163.com yajiang@celestica.com
+# @Author : jiang tao
+
+from sonic_platform_base.sonic_ssd.ssd_base import SsdBase
+from subprocess import Popen, PIPE
+from re import findall
+from os.path import exists
+
+NOT_AVAILABLE = "N/A"
+
+
+class SsdUtil(SsdBase):
+
+    def __init__(self, disk_dev):
+        """
+        Constructor
+        Args:
+            disk_dev: Linux device name to get parameters for
+        """
+
+        super().__init__(disk_dev)
+        if not isinstance(disk_dev, str):
+            raise TypeError("disk dev type wrong {}".format(type(disk_dev)))
+
+        if not exists(disk_dev):
+            raise RuntimeError("disk dev {} not found".format(disk_dev))
+
+        self.model = NOT_AVAILABLE
+        self.serial = NOT_AVAILABLE
+        self.firmware = NOT_AVAILABLE
+        self.temperature = NOT_AVAILABLE
+        self.health = NOT_AVAILABLE
+
+        inno_disk = ["iSmart", "-d", disk_dev]
+        self.ssd_info = self._execute_shell(inno_disk)
+
+        self.model = self._parse_re(r'Model Name:\s*(.+?)\n', self.ssd_info)
+        self.serial = self._parse_re(r'Serial Number:\s*(.+?)\n', self.ssd_info)
+        self.firmware = self._parse_re(r'FW Version:\s*(.+?)\n', self.ssd_info)
+        self.temperature = self._parse_re(r'Temperature\s*\[\s*(.+?)\]', self.ssd_info)
+        self.health = self._parse_re(r'Health:\s*(.+?)', self.ssd_info)
+
+    @staticmethod
+    def _execute_shell(cmd):
+        process = Popen(cmd, universal_newlines=True, stdout=PIPE)
+        output, _ = process.communicate()
+        return output
+
+    @staticmethod
+    def _parse_re(pattern, buffer):
+        res_list = findall(pattern, buffer)
+        return res_list[0] if res_list else NOT_AVAILABLE
+
+    def get_health(self):
+        """
+        Retrieves current disk health in percentages
+        Returns:
+            A float number of current ssd health
+            e.g. 83.5
+        """
+        return self.health
+
+    def get_temperature(self):
+        """
+        Retrieves current disk temperature in Celsius
+        Returns:
+            A float number of current temperature in Celsius
+            e.g. 40.1
+        """
+        return self.temperature
+
+    def get_model(self):
+        """
+        Retrieves model for the given disk device
+        Returns:
+            A string holding disk model as provided by the manufacturer
+        """
+        return self.model
+
+    def get_firmware(self):
+        """
+        Retrieves firmware version for the given disk device
+        Returns:
+            A string holding disk firmware version as provided by the manufacturer
+        """
+        return self.firmware
+
+    def get_serial(self):
+        """
+        Retrieves serial number for the given disk device
+        Returns:
+            A string holding disk serial number as provided by the manufacturer
+        """
+        return self.serial
+
+    def get_vendor_output(self):
+        """
+        Retrieves vendor specific data for the given disk device
+        Returns:
+            A string holding some vendor specific disk information
+        """
+        return self.ssd_info
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/pmon_daemon_control.json b/device/celestica/x86_64-cel_silverstone_v2-r0/pmon_daemon_control.json
new file mode 100644
index 000000000000..9a1f92753051
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/pmon_daemon_control.json
@@ -0,0 +1,4 @@
+{
+    "skip_ledd": true,
+    "skip_fancontrol": true
+}
diff --git a/device/celestica/x86_64-cel_silverstone_v2-r0/system_health_monitoring_config.json b/device/celestica/x86_64-cel_silverstone_v2-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000000..5661a0d21396
--- /dev/null
+++ b/device/celestica/x86_64-cel_silverstone_v2-r0/system_health_monitoring_config.json
@@ -0,0 +1,16 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu.temperature",
+        "PSU 1 Fan 1",
+        "PSU 2 Fan 1"
+    ],
+    "user_defined_checkers": [],
+    "polling_interval": 60,
+    "led_color": {
+        "fault": "amber",
+        "normal": "green",
+        "booting": "alternate_blink_4hz"
+    }
+}
diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk
index 0b93b3b2b165..d1b6d52b4d35 100755
--- a/platform/broadcom/one-image.mk
+++ b/platform/broadcom/one-image.mk
@@ -54,7 +54,11 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \
                                $(CEL_DX010_PLATFORM_MODULE) \
                                $(CEL_HALIBURTON_PLATFORM_MODULE) \
                                $(CEL_SEASTONE2_PLATFORM_MODULE) \
-                               $(CEL_BELGITE_PLATFORM_MODULE) \
+                               $(CEL_DS3000_PLATFORM_MODULE) \
+                               $(CEL_DS1000_PLATFORM_MODULE) \
+                               $(CEL_QUESTONE2_PLATFORM_MODULE) \
+                               $(CEL_SILVERSTONE_V2_PLATFORM_MODULE) \
+                               $(CEL_DS2000_PLATFORM_MODULE) \
                                $(DELTA_AG9032V1_PLATFORM_MODULE) \
                                $(DELTA_AG9064_PLATFORM_MODULE) \
                                $(DELTA_AG5648_PLATFORM_MODULE) \
diff --git a/platform/broadcom/platform-modules-cel.mk b/platform/broadcom/platform-modules-cel.mk
index b25aeb7c0900..2db8560b8bf3 100644
--- a/platform/broadcom/platform-modules-cel.mk
+++ b/platform/broadcom/platform-modules-cel.mk
@@ -1,16 +1,24 @@
 # Celestica DX010 and Haliburton Platform modules
 
-CEL_DX010_PLATFORM_MODULE_VERSION = 0.9
-CEL_HALIBURTON_PLATFORM_MODULE_VERSION = 0.9
-CEL_SEASTONE2_PLATFORM_MODULE_VERSION = 0.9
-CEL_SILVERSTONE_PLATFORM_MODULE_VERSION = 0.9
-CEL_BELGITE_PLATFORM_MODULE_VERSION = 0.9
+CEL_DX010_PLATFORM_MODULE_VERSION = 1.0
+CEL_HALIBURTON_PLATFORM_MODULE_VERSION = 1.0
+CEL_SEASTONE2_PLATFORM_MODULE_VERSION = 1.0
+CEL_SILVERSTONE_PLATFORM_MODULE_VERSION = 1.0
+CEL_DS1000_PLATFORM_MODULE_VERSION = 1.0
+CEL_QUESTONE2_PLATFORM_MODULE_VERSION = 1.0
+CEL_DS3000_PLATFORM_MODULE_VERSION = 1.0
+CEL_SILVERSTONE_V2_PLATFORM_MODULE_VERSION = 1.0
+CEL_DS2000_PLATFORM_MODULE_VERSION = 1.0
 
 export CEL_DX010_PLATFORM_MODULE_VERSION
 export CEL_HALIBURTON_PLATFORM_MODULE_VERSION
 export CEL_SEASTONE2_PLATFORM_MODULE_VERSION
 export CEL_SILVERSTONE_PLATFORM_MODULE_VERSION
-export CEL_BELGITE_PLATFORM_MODULE_VERSION
+export CEL_DS1000_PLATFORM_MODULE_VERSION
+export CEL_QUESTONE2_PLATFORM_MODULE_VERSION
+export CEL_DS3000_PLATFORM_MODULE_VERSION
+export CEL_SILVERSTONE_V2_PLATFORM_MODULE_VERSION
+export CEL_DS2000_PLATFORM_MODULE_VERSION
 
 CEL_DX010_PLATFORM_MODULE = platform-modules-dx010_$(CEL_DX010_PLATFORM_MODULE_VERSION)_amd64.deb
 $(CEL_DX010_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-cel
@@ -30,6 +38,22 @@ CEL_SILVERSTONE_PLATFORM_MODULE = platform-modules-silverstone_$(CEL_SILVERSTONE
 $(CEL_SILVERSTONE_PLATFORM_MODULE)_PLATFORM = x86_64-cel_silverstone-r0
 $(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_SILVERSTONE_PLATFORM_MODULE)))
 
-CEL_BELGITE_PLATFORM_MODULE = platform-modules-belgite_$(CEL_BELGITE_PLATFORM_MODULE_VERSION)_amd64.deb
-$(CEL_BELGITE_PLATFORM_MODULE)_PLATFORM = x86_64-cel_belgite-r0
-$(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_BELGITE_PLATFORM_MODULE)))
+CEL_DS1000_PLATFORM_MODULE = platform-modules-ds1000_$(CEL_DS1000_PLATFORM_MODULE_VERSION)_amd64.deb
+$(CEL_DS1000_PLATFORM_MODULE)_PLATFORM = x86_64-cel_ds1000-r0
+$(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_DS1000_PLATFORM_MODULE)))
+
+CEL_QUESTONE2_PLATFORM_MODULE = platform-modules-questone2_$(CEL_QUESTONE2_PLATFORM_MODULE_VERSION)_amd64.deb
+$(CEL_QUESTONE2_PLATFORM_MODULE)_PLATFORM = x86_64-cel_questone_2-r0
+$(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_QUESTONE2_PLATFORM_MODULE)))
+
+CEL_DS3000_PLATFORM_MODULE = platform-modules-ds3000_$(CEL_DS3000_PLATFORM_MODULE_VERSION)_amd64.deb
+$(CEL_DS3000_PLATFORM_MODULE)_PLATFORM = x86_64-cel_ds3000-r0
+$(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_DS3000_PLATFORM_MODULE)))
+
+CEL_SILVERSTONE_V2_PLATFORM_MODULE = platform-modules-silverstone-v2_$(CEL_SILVERSTONE_V2_PLATFORM_MODULE_VERSION)_amd64.deb
+$(CEL_SILVERSTONE_V2_PLATFORM_MODULE)_PLATFORM = x86_64-cel_silverstone_v2-r0
+$(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_SILVERSTONE_V2_PLATFORM_MODULE)))
+
+CEL_DS2000_PLATFORM_MODULE = platform-modules-ds2000_$(CEL_DS2000_PLATFORM_MODULE_VERSION)_amd64.deb
+$(CEL_DS2000_PLATFORM_MODULE)_PLATFORM = x86_64-cel_ds2000-r0
+$(eval $(call add_extra_package,$(CEL_DX010_PLATFORM_MODULE),$(CEL_DS2000_PLATFORM_MODULE)))
diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/fan.py
deleted file mode 100644
index 5ece7e980980..000000000000
--- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/fan.py
+++ /dev/null
@@ -1,93 +0,0 @@
-try:
-    from sonic_platform_pddf_base.pddf_fan import PddfFan
-    import subprocess
-except ImportError as e:
-    raise ImportError(str(e) + "- required module not found")
-# ------------------------------------------------------------------
-# HISTORY:
-#    5/1/2022 (A.D.)
-#    add function:set_status_led,
-#    Solve the problem that when a fan is pulled out, the Fan LED on the front panel is still green Issue-#11525
-# ------------------------------------------------------------------
-
-
-class Fan(PddfFan):
-    """PDDF Platform-Specific Fan class"""
-
-    def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0):
-        # idx is 0-based
-        PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index)
-
-
-    def get_speed_tolerance(self):
-        """
-        Retrieves the speed tolerance of the fan
-
-        Returns:
-            An integer, the percentage of variance from target speed which is
-                 considered tolerable
-        """
-        # Fix the speed vairance to 10 percent. If it changes based on platforms, overwrite
-        # this value in derived pddf fan class
-        return 20
-
-    def get_presence(self):
-        if self.is_psu_fan:
-            #For PSU, FAN must be present when PSU is present
-            try:
-                cmd = ['i2cget', '-y', '-f', '0x2', '0x32', '0x41']
-                p = subprocess.Popen(cmd, stdout=subprocess.PIPE, universal_newlines=True)
-                data = p.communicate()
-                status = int(data[0].strip(), 16)
-                if (self.fans_psu_index == 1 and (status & 0x10) == 0) or \
-                    (self.fans_psu_index == 2 and (status & 0x20) == 0):
-                    return True
-            except (IOError, ValueError):
-                pass
-
-            return False
-        else:
-            #Overwirte the PDDF Common since the FANs on Belgite are all Fixed and present
-            return True
-
-    def get_direction(self):
-        """
-        Retrieves the direction of fan
-
-        Returns:
-            A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
-            depending on fan direction
-        """
-        if self.is_psu_fan:
-            # Belgite PSU module only has EXHAUST fan
-            return "EXHAUST"
-        else:
-            return super().get_direction()
-
-    def get_status_led(self):
-        """
-        Gets the state of the fan status LED
-
-        Returns:
-            A string, one of the predefined STATUS_LED_COLOR_* strings above
-        """
-        if self.is_psu_fan:
-            return "N/A"
-        else:
-            return super().get_status_led()
-
-    def set_status_led(self, color):
-        """
-        Sets the state of the fan module status LED
-
-        Args:
-            color: A string representing the color with which to set the
-                   fan module status LED
-
-        Returns:
-            bool: True if status LED state is set successfully, False if not
-        """
-        if self.is_psu_fan:
-            return False
-        else:
-            return super().set_status_led(color)
diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/sfp.py
deleted file mode 100644
index a216a37afcf8..000000000000
--- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/sfp.py
+++ /dev/null
@@ -1,15 +0,0 @@
-try:
-    from sonic_platform_pddf_base.pddf_sfp import PddfSfp
-except ImportError as e:
-    raise ImportError (str(e) + "- required module not found")
-
-
-class Sfp(PddfSfp):
-    """
-    PDDF Platform-Specific Sfp class
-    """
-
-    def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
-        PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data)
-
-    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/thermal.py
deleted file mode 100644
index 7dd294fb8475..000000000000
--- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/thermal.py
+++ /dev/null
@@ -1,111 +0,0 @@
-try:
-    from sonic_platform_pddf_base.pddf_thermal import PddfThermal
-except ImportError as e:
-    raise ImportError(str(e) + "- required module not found")
-
-
-
-class Thermal(PddfThermal):
-    """PDDF Platform-Specific Thermal class"""
-
-    def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0):
-        PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index)
-        self.minimum_thermal = self.get_temperature()
-        self.maximum_thermal = self.get_temperature()
-    # Provide the functions/variables below for which implementation is to be overwritten
-
-    def get_low_critical_threshold(self):
-        """
-        Retrieves the low critical threshold temperature of thermal
-        Returns:
-            A float number, the low critical threshold temperature of thermal in Celsius
-            up to nearest thousandth of one degree Celsius, e.g. 30.125
-        """
-        return 0.001 
-
-    def get_high_critical_threshold(self):
-        """
-        Retrieves the high critical threshold temperature of thermal
-        Returns:
-            A float number, the high critical threshold temperature of thermal in Celsius
-            up to nearest thousandth of one degree Celsius, e.g. 30.125
-        """
-        
-        return 100.000 
-				
-    def get_minimum_recorded(self):
-        """
-        Retrieves the minimum recorded temperature of thermal
-        Returns:
-            A float number, the minimum recorded temperature of thermal in Celsius
-            up to nearest thousandth of one degree Celsius, e.g. 30.125
-        """
-        tmp = self.get_temperature()
-        if tmp < self.minimum_thermal:
-            self.minimum_thermal = tmp
-
-        return self.minimum_thermal
-
-    def get_maximum_recorded(self):
-        """
-        Retrieves the maximum recorded temperature of thermal
-        Returns:
-            A float number, the maximum recorded temperature of thermal in Celsius
-            up to nearest thousandth of one degree Celsius, e.g. 30.125
-        """
-        tmp = self.get_temperature()
-        if tmp > self.maximum_thermal:
-            self.maximum_thermal = tmp
-
-        return self.maximum_thermal
-
-    def get_presence(self):
-        """
-        Retrieves the presence of the PSU
-        Returns:
-            bool: True if Thermal is present, False if not
-        """
-        return True
-
-    def get_model(self):
-        """
-        Retrieves the model number (or part number) of the device
-        Returns:
-            string: Model/part number of device
-        """
-        return "N/A"
-
-    def get_serial(self):
-        """
-        Retrieves the serial number of the device
-        Returns:
-            string: Serial number of device
-        """
-        return "N/A" 
-
-    def get_status(self):
-        """
-        Retrieves the operational status of the device
-        Returns:
-            A boolean value, True if device is operating properly, False if not
-        """
-        if not self.get_presence():
-            return False
-
-        return True
-
-    def is_replaceable(self):
-        """
-        Retrieves whether thermal module is replaceable
-        Returns:
-            A boolean value, True if replaceable, False if not
-        """
-        return False
-
-    def get_position_in_parent(self):
-        """
-        Retrieves the thermal position information
-        Returns:
-            A int value, 0 represent ASIC thermal, 1 represent CPU thermal info
-        """
-        return 0
diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/scripts/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-cel/belgite/scripts/pddf_post_device_create.sh
deleted file mode 100755
index 436cf61d6dbe..000000000000
--- a/platform/broadcom/sonic-platform-modules-cel/belgite/scripts/pddf_post_device_create.sh
+++ /dev/null
@@ -1,13 +0,0 @@
-#!/bin/bash
-# Set U60 shutdown threhold 80 
-sudo i2cset -y -f 6 0x49 0x3 0x4e 0x00 i
-sleep 0.1
-sudo i2cset -y -f 6 0x49 0x1 0x2
-sleep 0.1
-#Set LM75 shutdown enable
-sudo i2cset -y -f 2 0x32 0x45 0x1
-
-# set sys led green status
-sudo i2cset -y -f 2 0x32 0x43 0xec
-
-echo -2 | tee /sys/bus/i2c/drivers/pca954x/*-00*/idle_state
diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/utils/belgite_pddf_monitor.py b/platform/broadcom/sonic-platform-modules-cel/belgite/utils/belgite_pddf_monitor.py
deleted file mode 100755
index 5ce0469a0ddf..000000000000
--- a/platform/broadcom/sonic-platform-modules-cel/belgite/utils/belgite_pddf_monitor.py
+++ /dev/null
@@ -1,272 +0,0 @@
-#!/usr/bin/env python3
-#
-# Copyright (C) Celestica Technology Corporation
-#
-# This program is free software: you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program.  If not, see <http://www.gnu.org/licenses/>.
-
-# ------------------------------------------------------------------
-# HISTORY:
-#    9/16/2021 (A.D.)
-# ------------------------------------------------------------------
-
-try:
-    import sys
-    import getopt
-    import logging
-    import logging.config
-    import time  # this is only being used as part of the example
-    import signal
-    import math
-    from sonic_platform import platform
-    from sonic_py_common.general import getstatusoutput_noshell
-except ImportError as e:
-    raise ImportError('%s - required module not found' % str(e))
-
-# Deafults
-FUNCTION_NAME = 'cel_belgite_monitor'
-DUTY_MAX = 100
-FAN_NUMBER = 3
-SENSOR_NUMBER = 4
-CPU_CORE_TEMP = r"/sys/devices/platform/coretemp.0/hwmon/hwmon1/temp1_input"
-
-
-class cel_belgite_monitor(object):
-    """
-    Make a class we can use to capture stdout and sterr in the log
-    """
-    # static temp var
-    _ori_temp = 0
-    _new_perc = DUTY_MAX / 2
-    syslog = logging.getLogger("[" + FUNCTION_NAME + "]")
-    init_fan_temperature = [0, 0, 0, 0]
-
-    def __init__(self, log_file, log_level):
-        """Needs a logger and a logger level."""
-        formatter = logging.Formatter('%(name)s %(message)s')
-        sys_handler = logging.handlers.SysLogHandler(address='/dev/log')
-        sys_handler.setFormatter(formatter)
-        sys_handler.ident = 'common'
-        self.syslog.setLevel(logging.WARNING)
-        self.syslog.addHandler(sys_handler)
-        self.platform_chassis_obj = platform.Platform().get_chassis()
-        # set up logging to file
-        logging.basicConfig(
-            filename=log_file,
-            filemode='w',
-            level=log_level,
-            format='[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s',
-            datefmt='%H:%M:%S'
-        )
-
-        # set up logging to console
-        if log_level == logging.DEBUG:
-            console = logging.StreamHandler()
-            console.setLevel(log_level)
-            formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s')
-            console.setFormatter(formatter)
-            logging.getLogger('').addHandler(console)
-        logging.debug('SET. logfile:%s / loglevel:%d' % (log_file, log_level))
-
-    def get_all_temperature(self):
-        """
-        return: all temperature
-        """
-        all_temperature_list = list()
-        for sensor_index in range(SENSOR_NUMBER):
-            temp = self.platform_chassis_obj.get_thermal(sensor_index).get_temperature()
-            if temp is None or str(temp).strip() == "":
-                return False
-            temp = temp*1000
-            all_temperature_list.append(temp)
-        u4_temperature = all_temperature_list[0]
-        u7_temperature = all_temperature_list[1]
-        # default CPU temperature 70
-        cpu_temperature = 70000
-        try:
-            with open(CPU_CORE_TEMP, "r") as f:
-                cpu_temperature = float(f.read().strip())
-        except Exception as E:
-            logging.debug('Error: %s' % E)
-        u60_temperature = all_temperature_list[3]   
-        return [u4_temperature, u7_temperature, cpu_temperature, u60_temperature]
-
-    def get_fan_speed_by_temperature(self, temp_list):
-        fan1_direction = self.platform_chassis_obj.get_fan(0).get_direction()
-        logging.debug('INFO: fan direction: %s' % str(fan1_direction))
-        all_temp = self.get_all_temperature()
-        logging.debug('INFO: all_temp: %s' % str(all_temp))
-        # B2F=intake: U7 temperature， F2B-EXHAUST: U4 temperature
-        a = 1 if fan1_direction.lower() == "intake" else 0
-        sensor_temp = all_temp[a]
-        cup_temp = all_temp[2]
-        u60_temp = all_temp[3]
-        logging.debug('sensor_temp:%d cup_temp:%d u60_temp:%d' % (sensor_temp, cup_temp, u60_temp))
-        update_temp_sensor, update_temp_cpu, update_temp_u60 = True, True, True
-        if all_temp[a] - temp_list[a] < 0:
-            update_temp_sensor = False
-        if cup_temp - temp_list[2] < 0:
-            update_temp_cpu = False
-        if u60_temp - temp_list[3] < 0:
-            update_temp_u60 = False
-
-        # U4 U7
-        if not update_temp_sensor:  # temperature down
-            b = math.trunc(1400/13)
-            if sensor_temp <= 32000:
-                sensor_temp_speed = 40
-            elif sensor_temp >= 45000:
-                sensor_temp_speed = 100
-            else:
-                sensor_temp_speed = int(math.trunc(60 / 13) * math.trunc(sensor_temp / 1000) - b)
-        else:   # temperature up
-            b = math.trunc(1580 / 13)
-            if sensor_temp <= 35000:
-                sensor_temp_speed = 40
-            elif sensor_temp >= 48000:
-                sensor_temp_speed = 100
-            else:
-                sensor_temp_speed = int(math.trunc(60/13) * math.trunc(sensor_temp/1000) - b)
-
-        # CPU
-        if not update_temp_cpu:  # temperature down
-            b = 228
-            if cup_temp <= 67000:
-                cpu_temp_speed = 40
-            elif cup_temp >= 82000:
-                cpu_temp_speed = 100
-            else:
-                cpu_temp_speed = int(4 * (cup_temp / 1000) - b)
-        else:   # temperature up
-            b = 240
-            if cup_temp <= 70000:
-                cpu_temp_speed = 40
-            elif cup_temp >= 85000:
-                cpu_temp_speed = 100
-            else:
-                cpu_temp_speed = int(4 * (cup_temp / 1000) - b)
-
-        # U60
-        if not update_temp_u60:  # temperature down
-            b = 168
-            if u60_temp <= 52000:
-                u60_temp_speed = 40
-            elif u60_temp >= 67000:
-                u60_temp_speed = 100
-            else:
-                u60_temp_speed = int(4 * (u60_temp / 1000) - b)
-        else:   # temperature up
-            b = 180
-            if u60_temp <= 55000:
-                u60_temp_speed = 40
-            elif u60_temp >= 70000:
-                u60_temp_speed = 100
-            else:
-                u60_temp_speed = int(4 * (u60_temp / 1000) - b)
-        return max([sensor_temp_speed, cpu_temp_speed, u60_temp_speed])
-
-    def manage_fans(self):
-        fan_presence_list = [True, True, True]  # whether fan is absent or not 
-        for fan_index in range(FAN_NUMBER):
-            if not self.platform_chassis_obj.get_fan(fan_index).get_presence() or not \
-                    self.platform_chassis_obj.get_fan(fan_index).get_status():
-                fan_presence_list[fan_index] = False
-                logging.debug('self.platform_chassis_obj.get_fan(fan_index).get_presence():%s'
-                              % str(self.platform_chassis_obj.get_fan(fan_index).get_presence()))
-                logging.debug('self.platform_chassis_obj.get_fan(fan_index).get_status():%s'
-                              % str(self.platform_chassis_obj.get_fan(fan_index).get_status()))
-            else:
-                fan_presence_list[fan_index] = True
-
-        fans_inserted_num = FAN_NUMBER - fan_presence_list.count(False)
-        if fans_inserted_num == 0:  # all fans broken, power off 
-            self.syslog.critical("No fans inserted. Severe overheating hazard. "
-                                 "Please insert Fans immediately or power off the device\n")
-
-            # power off 
-        elif fans_inserted_num in [1, 2]:   # 1 or 2 present, full speed 
-            self._new_perc = DUTY_MAX
-        else:   # 3 fans normal, manage the fans follow thermal policy 
-            self._new_perc = self.get_fan_speed_by_temperature(self.init_fan_temperature)
-            logging.debug('INFO: 3 fans inserted: self._new_perc: %s' % str(self._new_perc))
-            self.init_fan_temperature = self.get_all_temperature()
-
-        for i in range(FAN_NUMBER):
-            aa = self.platform_chassis_obj.get_fan(i).get_speed()
-            logging.debug("INFO: Get before setting fan speed: %s" % aa)
-            if self._new_perc < 40:
-                self._new_perc = 40
-            if self._new_perc > 100:
-                self._new_perc = 100
-            set_stat = self.platform_chassis_obj.get_fan(i).set_speed(self._new_perc)
-            if set_stat is True:
-                logging.debug('INFO: PASS. set_fan%d_duty_cycle (%d)' % (i, self._new_perc))
-            else:
-                logging.debug('INFO: FAIL. set_fan%d_duty_cycle (%d)' % (i, self._new_perc))
-
-
-def handler(signum, frame):
-    platform_chassis = platform.Platform().get_chassis()
-    for _ in range(FAN_NUMBER):
-        set_stat = platform_chassis.get_fan(_).set_speed(DUTY_MAX)
-        if set_stat is True:
-            logging.debug('INFO:Cause signal %d, set fan speed max.' % signum)
-        else:
-            logging.debug('INFO: FAIL. set_fan_duty_cycle (%d)' % DUTY_MAX)
-        # Enable the CPLD Heartbeat back
-        status, output = getstatusoutput_noshell(["i2cset", "-f", "-y", "75", "0x40", "0x22", "0x00"])
-        if status == 0:
-            logging.debug('INFO: CPLD Heartbeat check is enabled back')
-    sys.exit(0)
-
-
-def main(argv):
-    global test_temp
-
-    log_file = '/home/admin/%s.log' % FUNCTION_NAME
-    log_level = logging.INFO
-    if len(sys.argv) != 1:
-        try:
-            opts, args = getopt.getopt(argv, 'hdlt:', ['lfile='])
-        except getopt.GetoptError:
-            print('Usage: %s [-d] [-l <log_file>]' % sys.argv[0])
-            return 0
-        for opt, arg in opts:
-            if opt == '-h':
-                print('Usage: %s [-d] [-l <log_file>]' % sys.argv[0])
-                return 0
-            elif opt in ('-d', '--debug'):
-                log_level = logging.DEBUG
-            elif opt in ('-l', '--lfile'):
-                log_file = arg
-
-        if sys.argv[1] == '-t':
-            if len(sys.argv) != 6:
-                print("temp test, need input 4 temp")
-                return 0
-
-    signal.signal(signal.SIGINT, handler)
-    signal.signal(signal.SIGTERM, handler)
-    # Disaable the CPLD Heartbeat check to control Fan speed from CPU via ADT7470
-    getstatusoutput_noshell(['i2cset', '-f', '-y', '2', '0x32', '0x30', '0x01'])
-
-    monitor = cel_belgite_monitor(log_file, log_level)
-
-    # Loop forever, doing something useful hopefully:
-    while True:
-        monitor.manage_fans()
-        time.sleep(10)
-
-
-if __name__ == '__main__':
-    main(sys.argv[1:])
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/changelog b/platform/broadcom/sonic-platform-modules-cel/debian/changelog
index aa89b4df6329..42f4d07630e7 100644
--- a/platform/broadcom/sonic-platform-modules-cel/debian/changelog
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/changelog
@@ -1,3 +1,12 @@
+sonic-cel-platform-modules (1.0) unstable; urgency=low
+
+  * Add questone2 platform module.
+  * V2 platforms DS4000, DS3000, DS2000
+  * Rename Belgite to DS1000
+  * Hardened platform bug fixes
+
+ -- Jemston Fernando <sjemstonirudayam.fernando@celestica.com>  Wed, 12 Jun 2024 15:00:00 +0530
+
 sonic-cel-platform-modules (0.9) unstable; urgency=low
 
   * Add haliburton platform module.
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/control b/platform/broadcom/sonic-platform-modules-cel/debian/control
index f2b3b4ee32cc..41e8eefd8cf2 100644
--- a/platform/broadcom/sonic-platform-modules-cel/debian/control
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/control
@@ -26,7 +26,27 @@ Architecture: amd64
 Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as led, sfp.
 
-Package: platform-modules-belgite
+Package: platform-modules-ds1000
+Architecture: amd64
+Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Description: kernel modules for platform devices such as led, sfp
+
+Package: platform-modules-questone2
+Architecture: amd64
+Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Description: kernel modules for platform devices such as led, sfp
+
+Package: platform-modules-ds3000
+Architecture: amd64
+Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Description: kernel modules for platform devices such as led, sfp
+
+Package: platform-modules-silverstone-v2
+Architecture: amd64
+Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Description: kernel modules for platform devices such as led, sfp
+
+Package: platform-modules-ds2000
 Architecture: amd64
 Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as led, sfp
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-belgite.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-belgite.install
deleted file mode 100644
index 6f9f8f267ed9..000000000000
--- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-belgite.install
+++ /dev/null
@@ -1,7 +0,0 @@
-belgite/systemd/pddf-platform-init.service etc/systemd/system
-belgite/service/belgite-pddf-platform-monitor.service lib/systemd/system
-belgite/scripts/pddf_pre_driver_install.sh usr/local/bin
-belgite/scripts/pddf_post_device_create.sh usr/local/bin
-belgite/utils/belgite_pddf_monitor.py usr/local/bin
-belgite/pddf/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_belgite-r0/pddf
-services/platform_api/platform_api_mgnt.sh usr/local/bin
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds1000.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds1000.install
new file mode 100644
index 000000000000..24a75dfe8240
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds1000.install
@@ -0,0 +1,8 @@
+ds1000/systemd/pddf-platform-init.service etc/systemd/system
+ds1000/service/ds1000-fan-control.service lib/systemd/system
+ds1000/scripts/pddf_pre_driver_install.sh usr/local/bin
+ds1000/scripts/pddf_post_device_create.sh usr/local/bin
+ds1000/scripts/ds1000_platform_shutdown.sh usr/local/bin
+ds1000/utils/ds1000_fanctld.py usr/local/bin
+ds1000/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_ds1000-r0/pddf
+services/platform_api/platform_api_mgnt.sh usr/local/bin
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-belgite.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds1000.postinst
similarity index 56%
rename from platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-belgite.postinst
rename to platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds1000.postinst
index 4abd671baec9..1b038ebcc32a 100644
--- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-belgite.postinst
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds1000.postinst
@@ -1,6 +1,6 @@
 depmod -a
 /usr/local/bin/platform_api_mgnt.sh install
 systemctl enable pddf-platform-init.service
+systemctl enable ds1000-fan-control.service
 systemctl start pddf-platform-init.service
-systemctl enable belgite-pddf-platform-monitor.service
-systemctl start belgite-pddf-platform-monitor.service
+systemctl start ds1000-fan-control.service
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds2000.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds2000.install
new file mode 100644
index 000000000000..e7a40d21a66f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds2000.install
@@ -0,0 +1,12 @@
+ds2000/scripts/ds2000_platform_shutdown.sh usr/local/bin
+ds2000/scripts/pddf_pre_driver_install.sh usr/local/bin
+ds2000/scripts/pddf_post_device_create.sh usr/local/bin
+ds2000/scripts/pre_pddf_init.sh usr/local/bin
+ds2000/scripts/sensors usr/bin
+ds2000/scripts/platform_sensors.py usr/local/bin
+ds2000/systemd/pddf-platform-init.service etc/systemd/system
+ds2000/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_ds2000-r0/pddf
+ds2000/scripts/pddf_pre_driver_install.sh usr/local/bin
+ds2000/systemd/ds2000-pddf-platform-monitor.service lib/systemd/system
+ds2000/utils/pddf_fan_control_sensor_refresh.py usr/local/bin
+ds2000/utils/FanControl usr/local/bin
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds2000.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds2000.postinst
new file mode 100644
index 000000000000..b517026a66a6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds2000.postinst
@@ -0,0 +1,7 @@
+depmod -a
+
+systemctl enable pddf-platform-init.service
+systemctl start pddf-platform-init.service
+
+systemctl enable ds2000-pddf-platform-monitor.service
+systemctl start ds2000-pddf-platform-monitor.service
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds3000.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds3000.install
new file mode 100644
index 000000000000..1ea62240a8b0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds3000.install
@@ -0,0 +1,11 @@
+ds3000/systemd/pddf-platform-init.service etc/systemd/system
+ds3000/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_ds3000-r0/pddf
+ds3000/scripts/pre_pddf_init.sh usr/local/bin
+ds3000/scripts/sensors usr/bin
+ds3000/scripts/platform_sensors.py usr/local/bin
+ds3000/scripts/ds3000_platform_shutdown.sh usr/local/bin
+ds3000/scripts/pddf_pre_driver_install.sh usr/local/bin
+ds3000/scripts/pddf_post_device_create.sh usr/local/bin
+ds3000/utils/afulnx_64 usr/local/bin
+ds3000/utils/fpga_prog usr/local/bin
+ds3000/utils/ispvm usr/local/bin
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds3000.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds3000.postinst
new file mode 100644
index 000000000000..f8b021b6248a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-ds3000.postinst
@@ -0,0 +1,4 @@
+depmod -a
+
+systemctl enable pddf-platform-init.service
+systemctl start pddf-platform-init.service
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init
index fab61467da72..6e643e524d51 100644
--- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-dx010.init
@@ -40,8 +40,14 @@ fi
 case "$1" in
 start)
         echo -n "Setting up board... "
-
+        modprobe i2c-i801
+        modprobe i2c-isch
+        modprobe i2c-ismt
         modprobe i2c-dev
+        modprobe i2c-mux
+        modprobe i2c-smbus
+        modprobe i2c-mux-gpio
+
         modprobe i2c-mux-pca954x force-deselect-on-exit=1
         modprobe dx010_wdt
         modprobe leds-dx010
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.init b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.init
index aff8503d7543..9a5bcdac4776 100644
--- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.init
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-haliburton.init
@@ -35,6 +35,15 @@ case "$1" in
 start)
         echo -n "Setting up board... "
 
+        modprobe i2c-i801
+        modprobe i2c-isch
+        modprobe i2c-ismt
+        modprobe i2c-dev
+        modprobe i2c-mux
+        modprobe i2c-smbus
+        modprobe i2c-mux-gpio
+        modprobe i2c-mux-pca954x
+
         modprobe smc
         modprobe hlx_gpio_ich
         modprobe dps200
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.init b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.init
new file mode 100644
index 000000000000..a32be9dd97d8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.init
@@ -0,0 +1,97 @@
+#!/bin/bash
+
+### BEGIN INIT INFO
+# Provides:          setup-board
+# Required-Start:    $portmap
+# Required-Stop:
+# Should-Start:
+# Should-Stop:
+# Default-Start:     S
+# Default-Stop:      0 6
+# Short-Description: Setup questone2 board.
+### END INIT INFO
+
+
+case "$1" in
+start)
+    echo -n "Setting up board... "
+
+    # Loads kernel modules
+    modprobe i2c-ismt
+    modprobe i2c-i801
+    modprobe i2c-isch
+    modprobe i2c-dev
+    modprobe i2c-mux
+    modprobe i2c-smbus
+    modprobe i2c-mux-gpio
+    modprobe i2c-mux-pca954x
+    modprobe 8021q
+
+    modprobe questone2_baseboard_cpld
+    modprobe questone2_switchboard
+    modprobe mc24lc64t
+    modprobe optoe
+    modprobe sff_8436_eeprom
+
+    # Add driver to support TLV - EEPROM
+    for devnum in 0 1; do
+        devname=`cat /sys/bus/i2c/devices/i2c-${devnum}/name`
+        if [[ $devname == 'SMBus iSMT adapter at '* ]]; then
+            echo 24lc64t 0x56 > /sys/bus/i2c/devices/i2c-${devnum}/new_device
+            echo -n "/sys/bus/i2c/devices/i2c-${devnum}" > /tmp/eeprom_path.txt
+            break
+        fi
+    done
+
+    # One platform support two hwskus, auto select the correct hwsku
+    # If label is not either Questone-II or Questone-IIA, then Questone-IIA is used by default 
+    hwsku_file="/usr/share/sonic/device/x86_64-cel_questone_2-r0/default_sku"
+    if [ ! -f $hwsku_file ]; then
+        platform_path="/usr/share/sonic/device/x86_64-cel_questone_2-r0"
+
+        sleep 1 # Wait for EEPROM driver initialization
+        hwsku=$(decode-syseeprom | grep "Label" | awk '{print $5}')
+
+        cd ${platform_path}
+        if [ x$hwsku = x"Questone-II" ];then
+            echo "Questone_2 t1" > $hwsku_file
+            ln -sf ./Questone_2/platform.json platform.json
+            ln -sf ./Questone_2/platform_components.json platform_components.json
+            ln -sf ./Questone_2/custom_led.bin custom_led.bin
+        else
+            echo "Questone_2A t1" > $hwsku_file
+            ln -sf ./Questone_2A/platform.json platform.json
+            ln -sf ./Questone_2A/platform_components.json platform_components.json
+            ln -sf ./Questone_2A/custom_led.bin custom_led.bin
+        fi
+    fi
+
+    # SONiC LED control policy
+    ipmitool raw 0x3a 0x0f 0x02 0x00
+    # Set status led to green blinking 1Hz to indicate NOS take control
+    ipmitool raw 0x3a 0x0a 0x00 0x06
+    # Set Alarm LED off
+    ipmitool raw 0x3a 0x0c 0x00 0x03 0x63 0x00
+    # PSU and FAN LED are in default controlled by CPLD
+
+    echo "done."
+    ;;
+
+stop)
+    if [ -f /tmp/eeprom_path.txt ]; then
+        echo 0x56 > `cat /tmp/eeprom_path.txt`/delete_device
+    fi
+    echo "done."
+    ;;
+
+force-reload|restart)
+    echo "Not supported"
+    ;;
+
+*)
+    echo "Usage: /etc/init.d/platform-modules-questone2 {start|stop}"
+    exit 1
+    ;;
+esac
+
+exit 0
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.install
new file mode 100644
index 000000000000..b08bfe00d4c6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.install
@@ -0,0 +1,9 @@
+questone2/cfg/questone2-modules.conf etc/modules-load.d
+questone2/cfg/questone2-modprobe.conf etc/modprobe.d
+questone2/systemd/platform-modules-questone2.service lib/systemd/system
+questone2/cfg/pid_config_questone2.ini usr/local/etc
+questone2/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_questone_2-r0
+questone2/scripts/questone2_platform_shutdown.sh usr/local/bin
+questone2/scripts/sensors usr/bin
+questone2/scripts/platform_sensors.py usr/local/bin
+services/platform_api/platform_api_mgnt.sh usr/local/bin
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.postinst
new file mode 100644
index 000000000000..7a7371851fd0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-questone2.postinst
@@ -0,0 +1,6 @@
+depmod -a
+
+/usr/local/bin/platform_api_mgnt.sh install
+
+systemctl enable platform-modules-questone2.service
+systemctl start platform-modules-questone2.service
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.init b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.init
index 977cdac06000..75edea4c0066 100644
--- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.init
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.init
@@ -16,6 +16,16 @@ start)
     echo -n "Setting up board... "
 
     # Add driver to support HW
+    modprobe i2c-ismt
+    modprobe i2c-i801
+    modprobe i2c-isch
+    modprobe i2c-mux
+    modprobe i2c-smbus
+    modprobe i2c-mux-gpio
+    modprobe i2c-mux-pca954x
+    modprobe ipmi_devintf
+    modprobe ipmi_si
+
     modprobe i2c-dev
     modprobe ipmi_devintf
     modprobe ipmi_si
@@ -28,14 +38,27 @@ start)
         devname=`cat /sys/bus/i2c/devices/i2c-${devnum}/name`
         if [[ $devname == 'SMBus iSMT adapter at '* ]]; then
             echo 24lc64t 0x56 > /sys/bus/i2c/devices/i2c-${devnum}/new_device
-        break
+            echo -n "/sys/bus/i2c/devices/i2c-${devnum}" > /tmp/eeprom_path.txt
+            break
         fi
     done
+
     sleep 1
+    # SONiC LED control policy
+    ipmitool raw 0x3a 0x0f 0x02 0x00
+    # Set status led to green blinking 1Hz to indicate NOS take control
+    ipmitool raw 0x3a 0x0a 0x00 0x06
+    # Set Alarm LED off
+    ipmitool raw 0x3a 0x0c 0x00 0x03 0x63 0x00
+    # PSU is in default controlled by CPLD
+
     echo "done."
     ;;
 
 stop)
+    if [ -f /tmp/eeprom_path.txt ]; then
+        echo 0x56 > `cat /tmp/eeprom_path.txt`/delete_device
+    fi
     echo "done."
     ;;
 
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.install
index 31fc4fd3bd6d..08923fedaf6a 100644
--- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.install
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.install
@@ -1,4 +1,7 @@
 seastone2/cfg/seastone2-modules.conf etc/modules-load.d
 seastone2/systemd/platform-modules-seastone2.service lib/systemd/system
 seastone2/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_seastone_2-r0
+seastone2/scripts/seastone2_platform_shutdown.sh usr/local/bin
+seastone2/scripts/sensors usr/bin
+seastone2/scripts/platform_sensors.py usr/local/bin
 services/platform_api/platform_api_mgnt.sh usr/local/bin
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.postinst
index f232a2cac59d..fc5257b98494 100644
--- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.postinst
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-seastone2.postinst
@@ -1,5 +1,6 @@
 depmod -a
-systemctl enable platform-modules-seastone2.service
-systemctl start platform-modules-seastone2.service
 
 /usr/local/bin/platform_api_mgnt.sh install
+
+systemctl enable platform-modules-seastone2.service
+systemctl start platform-modules-seastone2.service
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone-v2.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone-v2.install
new file mode 100644
index 000000000000..15e497039647
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone-v2.install
@@ -0,0 +1,13 @@
+silverstone-v2/systemd/pddf-platform-init.service etc/systemd/system
+silverstone-v2/service/silverstone-v2-pddf-platform-monitor.service lib/systemd/system
+silverstone-v2/scripts/silverstone_v2_platform_shutdown.sh usr/local/bin
+silverstone-v2/scripts/pddf_pre_driver_install.sh usr/local/bin
+silverstone-v2/scripts/pddf_post_device_create.sh usr/local/bin
+silverstone-v2/scripts/pre_pddf_init.py usr/local/bin
+silverstone-v2/scripts/sensors usr/bin
+silverstone-v2/scripts/platform_sensors.py usr/local/bin
+silverstone-v2/utils/pddf_fan_control_sensor_refresh.py usr/local/bin
+silverstone-v2/utils/pddf_sensor_list_refresh.py usr/local/bin
+silverstone-v2/utils/FanControl usr/local/bin
+silverstone-v2/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_silverstone_v2-r0/pddf
+services/platform_api/platform_api_mgnt.sh usr/local/bin
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone-v2.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone-v2.postinst
new file mode 100644
index 000000000000..aa8cac74fd80
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone-v2.postinst
@@ -0,0 +1,6 @@
+depmod -a
+/usr/local/bin/platform_api_mgnt.sh install
+systemctl enable silverstone-v2-pddf-platform-monitor.service
+systemctl start silverstone-v2-pddf-platform-monitor.service
+systemctl enable pddf-platform-init.service
+systemctl start pddf-platform-init.service
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.init b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.init
index eb003599ec61..38895aff2b3b 100644
--- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.init
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.init
@@ -11,30 +11,105 @@
 # Short-Description: Setup SilverStone board.
 ### END INIT INFO
 
-
 case "$1" in
 start)
         echo -n "Setting up board... "
 
+        modprobe i2c-i801
+        modprobe i2c-isch
+        modprobe i2c-ismt
+        modprobe i2c-mux
+        modprobe i2c-smbus
+        modprobe coretemp
+        modprobe ipmi_devintf
+        modprobe ipmi_si
+
         modprobe i2c-dev
-        modprobe baseboard-lpc
-        modprobe switchboard
-        modprobe mc24lc64t
         modprobe ipmi_devintf
+        modprobe baseboard-lpc
+        modprobe cls-i2c-mux-pca954x
+        modprobe cls-switchboard
+        modprobe xcvr-cls
+        modprobe switch_cpld
 
-        # Instantiate TLV EEPROM device on I801 bus 
+        sleep 1
+
+	for i in {0..3}
+        do
+                echo -2 > /sys/devices/pci0000:00/0000:00:1c.0/0000:09:00.0/ocores-i2c.3/i2c-3/3-007$i/idle_state
+        done
+
+        # Instantiate TLV EEPROM device on I801 bus
         devname=`cat /sys/bus/i2c/devices/i2c-0/name`
         if [[ $devname == 'SMBus I801 adapter at '* ]]; then
                 echo 24lc64t 0x56 > /sys/bus/i2c/devices/i2c-0/new_device
         fi
+
+        # Clear system cache
         decode-syseeprom --init 2> /dev/null &
 
+        sleep 1
+
+        # Attach switchboard CPLD i2c device
+        echo switch_cpld 0x30 > /sys/bus/i2c/devices/i2c-4/new_device
+
+        # Attach optical Module EEPROM
+        # use optoe2 for SFP+.
+        for i in {1..2}
+        do
+                echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-$i/new_device
+        done
+
+        # use optoe3 for QSFP-DD.
+        for i in {10..41}
+        do
+                echo optoe3 0x50 > /sys/bus/i2c/devices/i2c-$i/new_device
+        done
+
+        # SONiC LED control policy
+        ## Disable BMC LED control
+        ipmitool raw 0x3a 0x09 0x02 0x00
+        ## Set status led to green blinking 1Hz to indicate NOS take control
+        ipmitool raw 0x3a 0x03 0x00 0x02 0x62 0xdd
+        ## Set Alarm LED off
+        ipmitool raw 0x3a 0x03 0x00 0x02 0x63 0xff
+        ## Set PSU HW control
+        ipmitool raw 0x3a 0x03 0x00 0x02 0x61 0x10
+        ## Set FAN HW control
+        ipmitool raw 0x3a 0x03 0x00 0x02 0x65 0x10
+
         /bin/sh /usr/local/bin/platform_api_mgnt.sh init
 
         echo "done."
         ;;
 
 stop)
+        #TLV eeprom
+        if [ -d /sys/bus/i2c/devices/i2c-0/0-0056 ]; then
+                echo 0x56 > /sys/bus/i2c/devices/i2c-0/delete_device
+        fi
+
+        #switchcpld i2c
+        if [ -d /sys/bus/i2c/devices/i2c-4/4-0030 ]; then
+                echo 0x30 > /sys/bus/i2c/devices/i2c-4/delete_device
+        fi
+
+        #sfp+ module
+        for i in {1..2}
+        do
+                if [ -d /sys/bus/i2c/devices/i2c-$i/$i-0050 ]; then
+                      echo 0x50 > /sys/bus/i2c/devices/i2c-$i/delete_device
+                fi
+        done
+
+        #qsfp-DD
+        for i in {10..41}
+        do
+                if [ -d /sys/bus/i2c/devices/i2c-$i/$i-0050 ]; then
+                        echo 0x50 > /sys/bus/i2c/devices/i2c-$i/delete_device
+                fi
+        done
+
         echo "done."
         ;;
 
@@ -48,4 +123,4 @@ force-reload|restart)
         ;;
 esac
 
-exit 0
\ No newline at end of file
+exit 0
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.install b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.install
index 73fa4b90a4fc..0a973ed8d678 100644
--- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.install
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.install
@@ -1,5 +1,6 @@
 silverstone/scripts/sensors usr/bin
 silverstone/scripts/platform_sensors.py usr/local/bin
+silverstone/scripts/silverstone_platform_shutdown.sh usr/local/bin
 silverstone/cfg/silverstone-modules.conf etc/modules-load.d
 silverstone/systemd/platform-modules-silverstone.service lib/systemd/system
 silverstone/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-cel_silverstone-r0
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.postinst b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.postinst
index feb9cf45c219..f5dfe16c0bbb 100644
--- a/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.postinst
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/platform-modules-silverstone.postinst
@@ -1,5 +1,6 @@
 depmod -a
-systemctl enable platform-modules-silverstone.service
-systemctl start platform-modules-silverstone.service
 
 /usr/local/bin/platform_api_mgnt.sh install
+
+systemctl enable platform-modules-silverstone.service
+systemctl start platform-modules-silverstone.service
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/rules b/platform/broadcom/sonic-platform-modules-cel/debian/rules
index 7c81e2496f1d..bcbcdcfd3e7c 100755
--- a/platform/broadcom/sonic-platform-modules-cel/debian/rules
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/rules
@@ -6,7 +6,8 @@ export KBUILD_EXTRA_SYMBOLS := /sonic/platform/pddf/i2c/Module.symvers.PDDF
 KVERSION   ?= $(shell uname -r)
 KERNEL_SRC :=  /lib/modules/$(KVERSION)
 MOD_SRC_DIR:= $(shell pwd)
-MODULE_DIRS:= dx010 haliburton silverstone seastone2 belgite
+
+MODULE_DIRS:= dx010 haliburton silverstone seastone2 ds1000 questone2 silverstone-v2 ds2000 ds3000
 
 %:
 	dh $@
@@ -14,22 +15,13 @@ MODULE_DIRS:= dx010 haliburton silverstone seastone2 belgite
 override_dh_auto_build:
 	(for mod in $(MODULE_DIRS); do \
 		make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \
-		if [ $$mod = "seastone2" ]; then \
-			cd $(MOD_SRC_DIR)/services/platform_api; \
-			python3 -m build --wheel --no-isolation --outdir $(MOD_SRC_DIR)/$${mod}/modules; \
-			continue; \
+		if [ -d $(MOD_SRC_DIR)/$${mod}/pddf ]; then \
+			cd $(MOD_SRC_DIR)/$${mod}/pddf; \
+		else \
+			cd $(MOD_SRC_DIR)/$${mod}; \
 		fi; \
-                if [ $$mod = "belgite" ]; then \
-                       cd $(MOD_SRC_DIR); \
-                       if [ -d $(MOD_SRC_DIR)/$${mod}/pddf ]; then \
-                           cd $(MOD_SRC_DIR)/$${mod}/pddf; \
-                           python3 -m build --wheel --no-isolation --outdir $(MOD_SRC_DIR)/$${mod}/pddf; \
-                           echo "Finished making pddf whl package for $$mod"; \
-                       fi; \
-                       continue; \
-                fi; \
-		cd $(MOD_SRC_DIR)/$${mod}; \
-		python3 -m build --wheel --no-isolation --outdir $(MOD_SRC_DIR)/$${mod}/modules; \
+		python3 setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}/modules; \
+		echo "Finished making sonic_platform whl package for $$mod"; \
 	done)
 
 override_dh_auto_install:
@@ -46,7 +38,5 @@ override_dh_clean:
 	dh_clean
 	(for mod in $(MODULE_DIRS); do \
 		make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \
-		if [ -f $(MOD_SRC_DIR)/$${mod}/pddf/*.whl ]; then \
-                    rm -f $(MOD_SRC_DIR)/$${mod}/pddf/*.whl; \
-		fi; \
+		rm -f $(MOD_SRC_DIR)/$${mod}/modules/*.whl; \
 	done)
diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/modules/Makefile b/platform/broadcom/sonic-platform-modules-cel/ds1000/modules/Makefile
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-cel/belgite/modules/Makefile
rename to platform/broadcom/sonic-platform-modules-cel/ds1000/modules/Makefile
diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/modules/mc24lc64t.c b/platform/broadcom/sonic-platform-modules-cel/ds1000/modules/mc24lc64t.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-cel/belgite/modules/mc24lc64t.c
rename to platform/broadcom/sonic-platform-modules-cel/ds1000/modules/mc24lc64t.c
diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/modules/pddf_custom_psu.c b/platform/broadcom/sonic-platform-modules-cel/ds1000/modules/pddf_custom_psu.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-cel/belgite/modules/pddf_custom_psu.c
rename to platform/broadcom/sonic-platform-modules-cel/ds1000/modules/pddf_custom_psu.c
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/modules/pddf_custom_wdt.c b/platform/broadcom/sonic-platform-modules-cel/ds1000/modules/pddf_custom_wdt.c
new file mode 100644
index 000000000000..77e8ff7d44a5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/modules/pddf_custom_wdt.c
@@ -0,0 +1,734 @@
+/***************************************************************************
+ *   Copyright (C) 2021 Celestica  Corp                                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ ***************************************************************************/
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#include <linux/err.h>
+#include <linux/fs.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/miscdevice.h>
+#include <linux/platform_device.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/notifier.h>
+#include <linux/reboot.h>
+#include <linux/uaccess.h>
+#include <linux/watchdog.h>
+#include <linux/sysfs.h>
+#include <linux/hwmon-sysfs.h>
+
+#define WDT_CONTROL_BASE             0xA100
+#define TEST_SCRATCH_REG             0xA101
+#define REBOOT_CAUSE_REG             0xA105
+#define WDT_SET_TIMER_H_BIT_REG      0xA161
+#define WDT_SET_TIMER_M_BIT_REG      0xA162
+#define WDT_SET_TIMER_L_BIT_REG      0xA163
+#define WDT_TIMER_H_BIT_REG          0xA164
+#define WDT_TIMER_M_BIT_REG          0xA165
+#define WDT_TIMER_L_BIT_REG          0xA166
+#define WDT_ENABLE_REG               0xA167
+#define WDT_FEED_REG                 0xA168
+#define WDT_PUNCH_REG                0xA169
+#define WDT_START_FEED               0x01
+#define WDT_STOP_FEED                0x00
+
+#define POWER_CYCLE_RESET	    0x00
+#define POWER_ON_RESET		    0x11
+#define SOFT_SET_WARM_RESET	    0x22
+#define SOFT_SET_COLD_RESET	    0x33
+#define CPU_WARM_RESET		    0x44
+#define CPU_COLD_RESET		    0x55
+#define CPU_GPIO_WARM_RESET	    0x66
+#define WDT_RESET		        0x77
+#define CPU_OVERLOAD_RESET	    0x88
+#define INSUFFICIENT_FAN_SPEED_RESET 0xAA
+
+
+#define MAX_TIMER_VALUE     0xffffff
+#define DEFUALT_TIMER_VALUE 180000    /* 180s */
+#define WDT_ENABLE          0x01
+#define WDT_DISABLE         0x00
+#define WDT_RESTART         0x00
+#define DRV_NAME 	        "cpld_wdt"
+#define DRV_VERSION	        "1.0.0"
+#define DEV_NAME	        "cpld_wdt"
+
+struct wdt_data {
+    unsigned long           opened;
+    struct mutex            lock;
+    char                    expect_close;
+    struct watchdog_info    ident;
+    int        	            timeout;
+    int                     timer_val;
+    char                    caused_reboot;  /* last reboot was by the watchdog */
+    struct resource         *res;
+};
+
+struct cpld_wdt_private {
+    struct platform_device *pdev;
+    struct watchdog_device wddev;
+    struct cdev cdev;
+    struct miscdevice mdev;
+    bool suspended;
+    struct wdt_data wdat;
+};
+
+//struct class *cpld_wdt;
+static const int max_timeout = MAX_TIMER_VALUE;
+
+static int timeout = DEFUALT_TIMER_VALUE;	/* default 180s */
+module_param(timeout, int, 0);
+MODULE_PARM_DESC(timeout, "Start watchdog timer on module load with"
+                 " given initial timeout(unit: ms)."
+                 " Zero (default) disables this feature.");
+
+static bool nowayout = WATCHDOG_NOWAYOUT;
+module_param(nowayout, bool, 0644);
+MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
+
+static unsigned int watchdog_get_timeleft(struct cpld_wdt_private *wdt)
+{
+    int time = 0;
+
+    mutex_lock(&wdt->wdat.lock);
+
+    time = inb(WDT_TIMER_H_BIT_REG);
+    time = time << 8 | inb(WDT_TIMER_M_BIT_REG);
+    time = time << 8 | inb(WDT_TIMER_L_BIT_REG);
+    time = time/1000;
+    mutex_unlock(&wdt->wdat.lock);
+
+    return time;
+}
+static int watchdog_get_timeout(struct cpld_wdt_private *wdt)
+{
+    int timeout = 0;
+    if(!wdt)
+        return -EINVAL;
+
+    mutex_lock(&wdt->wdat.lock);
+    timeout = inb(WDT_SET_TIMER_H_BIT_REG);
+    timeout = timeout << 8 | inb(WDT_SET_TIMER_M_BIT_REG);
+    timeout = timeout << 8 | inb(WDT_SET_TIMER_L_BIT_REG);
+    timeout=timeout/1000;
+    mutex_unlock(&wdt->wdat.lock);
+
+    return timeout;
+}
+static int watchdog_set_timeout(struct cpld_wdt_private *wdt, unsigned int timeout)
+{
+    unsigned char val = 0;
+    if(!wdt)
+        return -EINVAL;
+
+    if (timeout <= 0
+        || timeout >  max_timeout) {
+        pr_err("watchdog timeout out of range\n");
+        return -EINVAL;
+    }
+
+    mutex_lock(&wdt->wdat.lock);
+
+    wdt->wdat.timeout = timeout;
+    if (timeout > MAX_TIMER_VALUE) {
+        wdt->wdat.timer_val = MAX_TIMER_VALUE;
+    } else {
+        wdt->wdat.timer_val = timeout;
+    }
+    /* Set timer value */
+    //pr_crit("Watchdog Timeout:0x%06x\n", wdt->wdat.timer_val);
+
+    outb((wdt->wdat.timer_val >> 16) & 0xff, WDT_SET_TIMER_H_BIT_REG);
+    outb((wdt->wdat.timer_val >> 8) & 0xff, WDT_SET_TIMER_M_BIT_REG);
+    outb(wdt->wdat.timer_val & 0xff, WDT_SET_TIMER_L_BIT_REG);
+
+    mutex_unlock(&wdt->wdat.lock);
+
+    return 0;
+}
+
+static int watchdog_ping(struct cpld_wdt_private *wdt)
+{
+    if(!wdt)
+        return -EINVAL;
+
+    mutex_lock(&wdt->wdat.lock);
+
+    /* start feed watchdog */
+    outb(WDT_START_FEED, WDT_FEED_REG);
+    /* stop feed watchdog */
+    outb(WDT_STOP_FEED, WDT_FEED_REG);
+
+    mutex_unlock(&wdt->wdat.lock);
+
+    return 0;
+}
+
+static void watchdog_keepalive(struct cpld_wdt_private *wdt)
+{
+    unsigned char val = 0;
+    if(!wdt)
+        return;
+
+    mutex_lock(&wdt->wdat.lock);
+
+    val = inb(WDT_FEED_REG);
+
+    val &= 0x1;
+
+    val = ~val;
+
+    val &= 0x1;
+    /* start feed watchdog */
+    outb(val, WDT_FEED_REG);
+
+    mutex_unlock(&wdt->wdat.lock);
+    return;
+}
+
+static int watchdog_start(struct cpld_wdt_private *wdt)
+{
+    if(!wdt)
+        return -EINVAL;
+
+    /* Make sure we don't die as soon as the watchdog is enabled below */
+    //watchdog_keepalive();
+    mutex_lock(&wdt->wdat.lock);
+    outb(WDT_ENABLE, WDT_ENABLE_REG);
+    outb(WDT_RESTART, WDT_PUNCH_REG);
+    mutex_unlock(&wdt->wdat.lock);
+
+    return 0;
+}
+
+static int watchdog_stop(struct cpld_wdt_private *wdt)
+{
+    if(!wdt)
+        return -EINVAL;
+
+    mutex_lock(&wdt->wdat.lock);
+    outb(WDT_DISABLE, WDT_ENABLE_REG);
+    mutex_unlock(&wdt->wdat.lock);
+
+    return 0;
+}
+
+static char watchdog_get_reason(struct cpld_wdt_private *p)
+{
+    char status = 0;
+
+    if (!p)
+        return -1;
+    mutex_lock(&p->wdat.lock);
+    status = inb(REBOOT_CAUSE_REG);
+    mutex_unlock(&p->wdat.lock);
+
+    return status;
+}
+
+static bool watchdog_is_running(struct cpld_wdt_private *wdt)
+{
+    /*
+     * if we fail to determine the watchdog's status assume it to be
+     * running to be on the safe side
+     */
+
+    bool is_running = true;
+
+    mutex_lock(&wdt->wdat.lock);
+    is_running = inb(WDT_ENABLE_REG);
+    mutex_unlock(&wdt->wdat.lock);
+
+    return is_running;
+}
+
+static const struct watchdog_info ident = {
+    .options =              WDIOF_SETTIMEOUT |
+        WDIOF_KEEPALIVEPING |
+        WDIOF_MAGICCLOSE,
+    .firmware_version =     0,
+    .identity =             DRV_NAME,
+};
+
+static ssize_t identity_show(struct device *dev, struct device_attribute *attr,
+                             char *buf)
+{
+    struct cpld_wdt_private *wdt = dev_get_drvdata(dev);
+    if(!wdt)
+        return -EINVAL;
+    return sprintf(buf, "%s\n", wdt->wdat.ident.identity);
+}
+
+static DEVICE_ATTR_RO(identity);
+
+
+static ssize_t state_show(struct device *dev, struct device_attribute *attr,
+                          char *buf)
+{
+    struct cpld_wdt_private *wdt = dev_get_drvdata(dev);
+    bool state = watchdog_is_running(wdt);
+    if(true == state)
+        return sprintf(buf, "active\n");
+    else
+        return sprintf(buf, "inactive\n");
+}
+
+static DEVICE_ATTR_RO(state);
+
+static ssize_t status_show(struct device *dev, struct device_attribute *attr,
+                           char *buf)
+{
+    unsigned int status;
+    struct cpld_wdt_private *wdt = dev_get_drvdata(dev);
+    if(!wdt)
+        return -EINVAL;
+
+    return sprintf(buf, "0x%x\n", status);
+}
+
+static DEVICE_ATTR_RO(status);
+
+static ssize_t reason_show(struct device *dev,
+                           struct device_attribute *attr, char *buf)
+{
+    char bootstatus;
+    struct cpld_wdt_private *wdt = dev_get_drvdata(dev);
+    if(!wdt)
+        return -EINVAL;
+
+    bootstatus = watchdog_get_reason(wdt);
+
+    return sprintf(buf, "0x%02x\n", bootstatus);
+}
+
+static DEVICE_ATTR_RO(reason);
+
+static ssize_t timeleft_show(struct device *dev, struct device_attribute *attr,
+                             char *buf)
+{
+    unsigned int timeleft;
+    struct cpld_wdt_private *wdt = dev_get_drvdata(dev);
+    if(!wdt)
+        return -EINVAL;
+
+    timeleft = watchdog_get_timeleft(wdt);
+
+    return sprintf(buf, "%u\n", timeleft);
+
+}
+
+static DEVICE_ATTR_RO(timeleft);
+
+
+static ssize_t timeout_show(struct device *dev, struct device_attribute *attr,
+                            char *buf)
+{
+    unsigned int timeout;
+    struct cpld_wdt_private *wdt = dev_get_drvdata(dev);
+    if(!wdt)
+        return -EINVAL;
+
+    timeout = watchdog_get_timeout(wdt);
+
+    return sprintf(buf, "%u\n", timeout);
+}
+static DEVICE_ATTR_RO(timeout);
+
+
+static struct attribute *wdt_attrs[] = {
+    &dev_attr_state.attr,
+    &dev_attr_identity.attr,
+    &dev_attr_status.attr,
+    &dev_attr_reason.attr,
+    &dev_attr_timeleft.attr,
+    &dev_attr_timeout.attr,
+    NULL,
+};
+
+static const struct attribute_group wdt_group = {
+    .attrs = wdt_attrs,
+};
+
+static int watchdog_open(struct inode *inode, struct file *file)
+{
+    struct cpld_wdt_private *wdt;
+
+    wdt = container_of(file->private_data, struct cpld_wdt_private, mdev);
+
+    /* If the watchdog is alive we don't need to start it again */
+
+    if (test_and_set_bit(0, &wdt->wdat.opened))
+        return -EBUSY;
+
+    //watchdog_start(wdt);
+
+    if (nowayout)
+        __module_get(THIS_MODULE);
+
+    wdt->wdat.expect_close = 0;
+
+
+    return nonseekable_open(inode, file);
+}
+
+static int watchdog_release(struct inode *inode, struct file *file)
+{
+    struct cpld_wdt_private *p;
+    p = container_of(file->private_data, struct cpld_wdt_private, mdev);
+
+    if(!p)
+        return -EINVAL;
+
+    clear_bit(0, &p->wdat.opened);
+
+    if (!p->wdat.expect_close) {
+        //watchdog_keepalive(p);
+        //pr_crit("Unexpected close, Not stopping watchdog!\n");
+    } else if (!nowayout) {
+        //pr_crit("Cpld Watchdog Stopped!\n");
+        watchdog_stop(p);
+    }
+    return 0;
+}
+
+/*
+ *      watchdog_write:
+ *      @file: file handle to the watchdog
+ *      @buf: buffer to write
+ *      @count: count of bytes
+ *      @ppos: pointer to the position to write. No seeks allowed
+ *
+ *      A write to a watchdog device is defined as a keepalive signal. Any
+ *      write of data will do, as we we don't define content meaning.
+ */
+
+static ssize_t watchdog_write(struct file *file, const char __user *buf,
+                              size_t count, loff_t *ppos)
+{
+    struct cpld_wdt_private *p;
+    p = container_of(file->private_data, struct cpld_wdt_private, mdev);
+
+    if(!p)
+        return -EINVAL;
+
+
+    if (count) {
+        if (!nowayout) {
+            size_t i;
+
+            /* In case it was set long ago */
+            bool expect_close = false;
+
+            for (i = 0; i != count; i++) {
+                char c;
+                if (get_user(c, buf + i))
+                    return -EFAULT;
+                expect_close = (c == 'V');
+            }
+
+            /* Properly order writes across fork()ed processes */
+            mutex_lock(&p->wdat.lock);
+            p->wdat.expect_close = expect_close;
+            mutex_unlock(&p->wdat.lock);
+        }
+
+        /* someone wrote to us, we should restart timer */
+        watchdog_keepalive(p);
+    }
+    return count;
+}
+
+/*
+ *      watchdog_ioctl:
+ *      @inode: inode of the device
+ *      @file: file handle to the device
+ *      @cmd: watchdog command
+ *      @arg: argument pointer
+ *
+ *      The watchdog API defines a common set of functions for all watchdogs
+ *      according to their available features.
+ */
+static long watchdog_ioctl(struct file *file, unsigned int cmd,
+                           unsigned long arg)
+{
+    int status;
+    int new_options;
+    int new_timeout;
+    unsigned int val;
+    union {
+        struct watchdog_info __user *ident;
+        int __user *i;
+    } uarg;
+
+    uarg.i = (int __user *)arg;
+
+    struct cpld_wdt_private *p;
+    p = container_of(file->private_data, struct cpld_wdt_private, mdev);
+    if(!p)
+        return -EINVAL;
+
+    switch (cmd) {
+        case WDIOC_GETSUPPORT:
+            return copy_to_user(uarg.ident, &p->wdat.ident,
+                                sizeof(p->wdat.ident)) ? -EFAULT : 0;
+
+        case WDIOC_GETSTATUS:
+            status = watchdog_is_running(p);
+            return put_user(status, uarg.i);
+
+        case WDIOC_GETBOOTSTATUS:
+            //status = watchdog_get_bootstatus(p);
+            return put_user(status, uarg.i);
+
+        case WDIOC_SETOPTIONS:
+            if (get_user(new_options, uarg.i)){
+                return -EFAULT;
+            }
+
+            if (new_options & WDIOS_DISABLECARD){
+                return watchdog_stop(p);
+            }
+
+            if (new_options & WDIOS_ENABLECARD){
+                return watchdog_start(p);
+            }
+
+            return 0;
+
+        case WDIOC_KEEPALIVE:
+            watchdog_keepalive(p);
+            return 0;
+
+        case WDIOC_SETTIMEOUT:
+            if (get_user(new_timeout, uarg.i))
+                return -EFAULT;
+            new_timeout = new_timeout*1000;
+            if (watchdog_set_timeout(p, new_timeout))
+                return -EINVAL;
+
+            val = watchdog_get_timeout(p);
+            return put_user(val, uarg.i);
+        case WDIOC_GETTIMEOUT:
+            val = watchdog_get_timeout(p);
+            return put_user(val, uarg.i);
+
+        case WDIOC_GETTIMELEFT:
+            val = watchdog_get_timeleft(p);
+            return put_user(val, uarg.i);
+        default:
+            return -ENOTTY;
+
+    }
+}
+
+static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
+                               void *unused)
+{
+    if (code == SYS_DOWN || code == SYS_HALT)
+        //watchdog_stop(p);
+
+        pr_err("CPLD Watchdog did not Stop!\n");
+    return NOTIFY_DONE;
+}
+
+static const struct file_operations watchdog_fops = {
+    .owner		= THIS_MODULE,
+    .llseek		= no_llseek,
+    .open		= watchdog_open,
+    .release	= watchdog_release,
+    .write		= watchdog_write,
+    .unlocked_ioctl	= watchdog_ioctl,
+};
+
+static struct miscdevice watchdog_miscdev = {
+    //.minor		= WATCHDOG_MINOR,
+    .name		= DEV_NAME,
+    .fops		= &watchdog_fops,
+};
+
+static struct notifier_block watchdog_notifier = {
+    .notifier_call = watchdog_notify_sys,
+};
+
+static int cpld_wdt_probe(struct platform_device *pdev)
+{
+    int wdt_reboot_cause, err = 0;
+    unsigned char ver = 0;
+    struct device *dev = &pdev->dev;
+
+    struct cpld_wdt_private *p;
+
+    p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL);
+    if (!p)
+        return -ENOMEM;
+
+
+    mutex_init(&(p->wdat.lock));
+
+    p->wdat.ident.options = WDIOC_SETTIMEOUT
+        | WDIOF_MAGICCLOSE
+        | WDIOF_KEEPALIVEPING
+        | WDIOC_GETTIMELEFT;
+
+    snprintf(p->wdat.ident.identity,
+             sizeof(p->wdat.ident.identity), "%s", DRV_NAME);
+
+    wdt_reboot_cause = inb(REBOOT_CAUSE_REG);  // REBOOT_CAUSE
+    p->wdat.caused_reboot = wdt_reboot_cause;
+    ver = inb(WDT_CONTROL_BASE);
+    pr_info("Watchdog CPLD Version:0x%02x\n",
+            ver);
+
+    if (timeout) {
+        if (timeout <= 0
+            || timeout >  max_timeout) {
+            pr_err("starting timeout out of range\n");
+            err = -EINVAL;
+            return err;
+        }
+
+        //watchdog_start(p);
+
+
+        if (timeout > MAX_TIMER_VALUE) {
+            watchdog_set_timeout(p, MAX_TIMER_VALUE);
+        } else {
+            watchdog_set_timeout(p, timeout);
+        }
+
+        if (nowayout)
+            __module_get(THIS_MODULE);
+
+        pr_info("watchdog started with initial timeout of %u Second(s)\n",
+                timeout/1000);
+    }
+
+    err = watchdog_set_timeout(p, timeout);
+    if (err)
+        return err;
+
+    err = register_reboot_notifier(&watchdog_notifier);
+    if (err)
+        return err;
+    p->mdev = watchdog_miscdev;
+    err = misc_register(&p->mdev);
+    if (err) {
+        pr_err("cannot register miscdev on minor=%d\n",
+               watchdog_miscdev.minor);
+        return err;;
+    }
+
+    /*p->wdat.res = platform_get_resource(pdev, IORESOURCE_IO, WDT_CONTROL_BASE);
+      if (!p->wdat.res)
+      return -ENODEV;
+
+      if (!devm_request_region(dev, p->wdat.res->start,
+      resource_size(p->wdat.res),
+      pdev->name)) {
+      return -EBUSY;
+      }
+      */
+    err = sysfs_create_group(&pdev->dev.kobj, &wdt_group);
+    if (err) {
+        printk(KERN_ERR "Cannot create sysfs for cpld_wdt.\n");
+        return err;
+    }
+
+    platform_set_drvdata(pdev, p);
+    dev_set_drvdata(dev, p);
+
+    pr_info("initialized.  sec (nowayout=%d)\n",
+            nowayout);
+
+    return 0;
+}
+
+static int cpld_wdt_remove(struct platform_device *pdev)
+{
+    struct cpld_wdt_private *p = platform_get_drvdata(pdev);
+
+    if (p) {
+        sysfs_remove_group(&pdev->dev.kobj, &wdt_group);
+        misc_deregister(&p->mdev);
+        unregister_reboot_notifier(&watchdog_notifier);
+    }
+    return 0;
+}
+
+static struct platform_driver cpld_wdt_driver = {
+    .probe          = cpld_wdt_probe,
+    .remove         = cpld_wdt_remove,
+    .driver         = {
+        .name   = DRV_NAME,
+    },
+};
+
+static struct resource cpld_wdt_resources[] = {
+    {
+        .start  = 0xA100,
+        .end    = 0xA1F2,
+        .flags  = IORESOURCE_IO,
+    },
+};
+
+static void wdt_dev_release( struct device * dev)
+{
+    return;
+}
+
+static struct platform_device cpld_wdt_dev = {
+    .name           = DRV_NAME,
+    .id             = -1,
+    .num_resources  = ARRAY_SIZE(cpld_wdt_resources),
+    .resource       = cpld_wdt_resources,
+    .dev = {
+        .release = wdt_dev_release,
+    }
+};
+
+static int __init cpld_wdt_init_module(void)
+{
+    int err = 0;
+
+    err = platform_device_register(&cpld_wdt_dev);
+    err += platform_driver_register(&cpld_wdt_driver);
+    if(err < 0)
+        pr_info("Platform Device/Driver Register Failed. err:%d\n", err);
+
+    pr_info("CPLD WatchDog Timer Driver v%s\n", DRV_VERSION);
+    return err;
+}
+
+static void __exit cpld_wdt_cleanup_module(void)
+{
+    platform_driver_unregister(&cpld_wdt_driver);
+    platform_device_unregister(&cpld_wdt_dev);
+    pr_info("Watchdog Module Unloaded\n");
+}
+
+module_init(cpld_wdt_init_module);
+module_exit(cpld_wdt_cleanup_module);
+
+
+MODULE_DESCRIPTION("Cpld Watchdog Driver");
+MODULE_VERSION(DRV_VERSION);
+MODULE_AUTHOR("Nicholas <nicwu@celestica.com>");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/setup.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/setup.py
new file mode 100644
index 000000000000..db095d23534a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/setup.py
@@ -0,0 +1,27 @@
+import os
+from setuptools import setup
+os.listdir
+
+setup(
+    name='sonic-platform',
+    version='1.0',
+    description='SONiC platform API implementation on Celestica Platforms based on PDDF',
+    license='Apache 2.0',
+    author='SONiC Team',
+    author_email='linuxnetdev@microsoft.com',
+    url='https://github.com/Azure/sonic-buildimage',
+    packages=['sonic_platform'],
+    classifiers=[
+        'Development Status :: 3 - Alpha',
+        'Environment :: Plugins',
+        'Intended Audience :: Developers',
+        'Intended Audience :: Information Technology',
+        'Intended Audience :: System Administrators',
+        'License :: OSI Approved :: Apache Software License',
+        'Natural Language :: English',
+        'Operating System :: POSIX :: Linux',
+        'Programming Language :: Python :: 3.9',
+        'Topic :: Utilities',
+    ],
+    keywords='sonic SONiC platform PLATFORM',
+)
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/__init__.py
new file mode 100644
index 000000000000..d3c24cb008dd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/__init__.py
@@ -0,0 +1,2 @@
+__all__ = ["platform", "chassis"]
+from sonic_platform import platform
diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/chassis.py
similarity index 71%
rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/chassis.py
rename to platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/chassis.py
index ed2e339461ac..e325c0af5569 100644
--- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/chassis.py
+++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/chassis.py
@@ -5,21 +5,24 @@
 #############################################################################
 import os
 import time
+import sys
+import subprocess
+import re
 
 try:
     from sonic_platform_pddf_base.pddf_chassis import PddfChassis
     from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom
     from sonic_platform_base.chassis_base import ChassisBase
-    from sonic_platform.fan_drawer import FanDrawer
+    from sonic_platform.thermal import Thermal
     from sonic_platform.watchdog import Watchdog
-    import sys
-    import subprocess
     from sonic_py_common import device_info
     from sonic_platform_base.sfp_base import SfpBase
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
-NUM_COMPONENT = 2
+NUM_COMPONENTS = 4
+NUM_SENSORS = 4
+HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt"
 
 class Chassis(PddfChassis):
     """
@@ -31,17 +34,23 @@ def __init__(self, pddf_data=None, pddf_plugin_data=None):
 
         PddfChassis.__init__(self, pddf_data, pddf_plugin_data)
         (self.platform, self.hwsku) = device_info.get_platform_and_hwsku()
+        self._watchdog = None
+        self._airflow_direction = None
 
         self.__initialize_components()
-        self.sfp_port_list = list(range(49, 56+1))
 
-        for port_idx in self.sfp_port_list:
-            present = self.get_sfp(port_idx).get_presence()
-            self.sfp_status_dict[port_idx] = '1' if present else '0'
+        for sfp in self._sfp_list:
+            present = sfp.get_presence()
+            self.sfp_status_dict[sfp.index] = '1' if present else '0'
+
+        # PDDF doesn't support CPU internal temperature sensor
+        # Hence it is created from chassis init override and
+        # handled appropriately in thermal APIs
+        self._thermal_list.append(Thermal(NUM_SENSORS))
 
     def __initialize_components(self):
         from sonic_platform.component import Component
-        for index in range(0, NUM_COMPONENT):
+        for index in range(0, NUM_COMPONENTS):
             component = Component(index)
             self._component_list.append(component)
 
@@ -99,12 +108,18 @@ def get_reboot_cause(self):
         with open("/sys/devices/platform/cpld_wdt/reason", "r") as f:
             hw_reboot_cause = f.read().strip()
 
-        if hw_reboot_cause == "0x77":
+        if hw_reboot_cause == "0x99":
+            reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER
+            description = 'NPU overload reset'
+        elif hw_reboot_cause == "0x88":
+            reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER
+            description = 'CPU overload reset'
+        elif hw_reboot_cause == "0x77":
             reboot_cause = self.REBOOT_CAUSE_WATCHDOG
             description = 'Hardware Watchdog Reset'
         elif hw_reboot_cause == "0x66":
             reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER
-            description = 'GPIO Request Warm Reset'
+            description = 'GPIO Warm Reset'
         elif hw_reboot_cause == "0x55":
             reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER
             description = 'CPU Cold Reset'
@@ -112,19 +127,34 @@ def get_reboot_cause(self):
             reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE
             description = 'CPU Warm Reset'
         elif hw_reboot_cause == "0x33":
-            reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE
+            reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER
             description = 'Soft-Set Cold Reset'
         elif hw_reboot_cause == "0x22":
-            reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE
+            reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER
             description = 'Soft-Set Warm Reset'
         elif hw_reboot_cause == "0x11":
             reboot_cause = self.REBOOT_CAUSE_POWER_LOSS
-            description = 'Power Loss'			
+            description = 'Power Loss'
+        elif hw_reboot_cause == "0x00":
+            reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER
+            description = 'Cold Powercycle'
+            if os.path.isfile(HW_REBOOT_CAUSE_FILE):
+                with open(HW_REBOOT_CAUSE_FILE) as hw_cause_file:
+                    reboot_info = hw_cause_file.readline().rstrip('\n')
+                    match = re.search(r'Reason:(.*),Time:(.*)', reboot_info)
+                    if match is not None:
+                        if  match.group(1) == 'temp_fatal':
+                            description = 'Fatal temperature trip [Time:{}]'.format(match.group(2))
+                        elif match.group(1) == 'temp_critical':
+                            description = 'Critical temperature reboot [Time:{}]'.format(match.group(2))
+                        elif match.group(1) == 'system':
+                            reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE
+                            description = 'System cold reboot'
         else:
             reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE
             description = 'Unkown Reason'
 
-        return (reboot_cause, description)	
+        return (reboot_cause, description)
 
     def get_revision(self):
         version_str = self._eeprom.revision_str()
@@ -133,23 +163,20 @@ def get_revision(self):
             return str(bytearray(version_str, 'ascii')[0])
 
         return version_str
-		
+
     @staticmethod
     def get_position_in_parent():
         return -1
-		
+
     @staticmethod
     def is_replaceable():
         return False
 
     def set_status_led(self, color):
-        color_dict = {
-            'green': "STATUS_LED_COLOR_GREEN",
-            'red': "STATUS_LED_COLOR_AMBER",
-            'amber': "STATUS_LED_COLOR_AMBER",
-            'off': "STATUS_LED_COLOR_OFF"
-        }
-        return self.set_system_led("SYS_LED", color_dict.get(color, "STATUS_LED_COLOR_OFF"))
+        if color == self.get_system_led("SYS_LED"):
+            return True
+
+        return self.set_system_led("SYS_LED", color)
 
     def get_status_led(self):
         return self.get_system_led("SYS_LED")
@@ -224,13 +251,14 @@ def get_change_event(self, timeout=0):
         time_period = timeout/float(1000) #Convert msecs to secs
 
         while time.time() < (start_time + time_period) or timeout == 0:
-            for port_idx in self.sfp_port_list:
+            for sfp in self._sfp_list:
+                port_idx = sfp.index
                 if self.sfp_status_dict[port_idx] == SFP_REMOVED and \
-                    self.get_sfp(port_idx).get_presence() == SFP_PRESENT:
+                    sfp.get_presence() == SFP_PRESENT:
                     sfp_dict[port_idx] = SFP_INSERTED
                     self.sfp_status_dict[port_idx] = SFP_INSERTED
                 elif self.sfp_status_dict[port_idx] == SFP_INSERTED and \
-                    self.get_sfp(port_idx).get_presence() == SFP_ABSENT:
+                    sfp.get_presence() == SFP_ABSENT:
                     sfp_dict[port_idx] = SFP_REMOVED
                     self.sfp_status_dict[port_idx] = SFP_REMOVED
 
@@ -240,3 +268,21 @@ def get_change_event(self, timeout=0):
             time.sleep(0.5)
 
         return True, {'sfp':{}} # Timeout
+
+    def get_airflow_direction(self):
+        if self._airflow_direction == None:
+            try:
+                vendor_extn = self._eeprom.get_vendor_extn()
+                airflow_type = vendor_extn.split()[2][2:4] # Either 0xFB or 0xBF
+                if airflow_type == 'FB':
+                    direction = 'exhaust'
+                elif airflow_type == 'BF':
+                    direction = 'intake'
+                else:
+                    direction = 'N/A'
+            except (AttributeError, IndexError):
+                direction = 'N/A'
+
+            self._airflow_direction = direction
+
+        return self._airflow_direction
diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/component.py
similarity index 52%
rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/component.py
rename to platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/component.py
index 3b68c5759b5a..23efdbda441a 100644
--- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/component.py
+++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/component.py
@@ -1,128 +1,168 @@
-#!/usr/bin/env python
-
-#############################################################################
-# Celestica
-#
-# Component contains an implementation of SONiC Platform Base API and
-# provides the components firmware management function
-#
-#############################################################################
-
-import subprocess
-import time
-
-try:
-    from sonic_platform_base.component_base import ComponentBase
-    #from helper import APIHelper
-except ImportError as e:
-    raise ImportError(str(e) + "- required module not found")
-
-SWCPLD_VERSION_PATH = ['i2cget', '-y', '-f', '2', '0x32', '0']
-BIOS_VERSION_PATH = ['dmidecode', '-s', 'bios-version']
-COMPONENT_NAME_LIST = ["SWCPLD", "BIOS"]
-COMPONENT_DES_LIST = ["Used for managing the chassis and SFP+ ports (49-56)",
-                      "Basic Input/Output System"]
-
-
-class Component(ComponentBase):
-    """Platform-specific Component class"""
-
-    DEVICE_TYPE = "component"
-
-    def __init__(self, component_index):
-        ComponentBase.__init__(self)
-        self.index = component_index
-        self.name = self.get_name()
-
-    def __get_bios_version(self):
-        # Retrieves the BIOS firmware version
-        version = "N/A"
-
-        try:
-            p = subprocess.Popen(BIOS_VERSION_PATH, stdout=subprocess.PIPE, universal_newlines=True)
-            data = p.communicate()
-            version = data[0].strip()
-        except IOError:
-            pass
-
-        return version
-
-    def __get_cpld_version(self):
-        version = "N/A"
-        try:
-            p = subprocess.Popen(SWCPLD_VERSION_PATH, stdout=subprocess.PIPE, universal_newlines=True)
-            data = p.communicate()
-            ver = int(data[0].strip(), 16)
-            version = "{0}.{1}".format(ver >> 4, ver & 0x0F)
-        except (IOError, ValueError):
-            pass
-
-        return version
-                
-    def get_name(self):
-        """
-        Retrieves the name of the component
-         Returns:
-            A string containing the name of the component
-        """
-        return COMPONENT_NAME_LIST[self.index]
-
-    def get_description(self):
-        """
-        Retrieves the description of the component
-            Returns:
-            A string containing the description of the component
-        """
-        return COMPONENT_DES_LIST[self.index]
-
-    def get_firmware_version(self):
-        """
-        Retrieves the firmware version of module
-        Returns:
-            string: The firmware versions of the module
-        """
-        fw_version = None
-        
-        if self.name == "BIOS":
-            fw_version = self.__get_bios_version()
-        elif "CPLD" in self.name:
-            fw_version = self.__get_cpld_version()
-            
-        return fw_version
-
-    def install_firmware(self, image_path):
-        """
-        Install firmware to module
-        Args:
-            image_path: A string, path to firmware image
-        Returns:
-            A boolean, True if install successfully, False if not
-        """
-        return False
-
-    def update_firmware(self, image_path):
-        return False
-
-    def get_available_firmware_version(self, image_path):
-        return 'N/A'
-
-    def get_firmware_update_notification(self, image_path):
-        return "None"
-
-    def get_model(self):
-        return 'N/A'
-
-    def get_position_in_parent(self):
-        return -1
-
-    def get_presence(self):
-        return True
- 
-    def get_serial(self):
-        return 'N/A'
-
-    def get_status(self):
-        return True
-
-    def is_replaceable(self):
-        return False
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica
+#
+# Component contains an implementation of SONiC Platform Base API and
+# provides the components firmware management function
+#
+#############################################################################
+
+import subprocess
+import re
+
+try:
+    from sonic_platform_base.component_base import ComponentBase
+    #from helper import APIHelper
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+COMPONENT_NAME = 0
+COMPONENT_DESC = 1
+COMPONENT_VER_CMD = 2
+COMPONENT_VER_FN = 3
+BIOS_VERSION_CMD = ['dmidecode', '-s', 'bios-version']
+ONIE_VERSION_CMD = ['cat', '/host/machine.conf']
+SWCPLD_VERSION_CMD = ['i2cget', '-y', '-f', '2', '0x32', '0']
+SSD_VERSION_CMD = ['smartctl', '-i', '/dev/sda']
+
+
+class Component(ComponentBase):
+    """Platform-specific Component class"""
+
+    DEVICE_TYPE = "component"
+
+    def __init__(self, component_index):
+        self.component_list = [["BIOS", "Basic Input/Output System", BIOS_VERSION_CMD, self.__get_cmd_output],\
+                               ["ONIE", "Open Network Install Environment", ONIE_VERSION_CMD, self.__get_onie_version],\
+                               ["CPLD SW", "CPLD for board functions, watchdog and port control SFP(49-56)", SWCPLD_VERSION_CMD, self.__get_cpld_version],\
+                               ["SSD", "Solid State Drive - {}", SSD_VERSION_CMD, self.__get_ssd_version]]
+
+        ComponentBase.__init__(self)
+        self.index = component_index
+        self.name = self.get_name()
+
+    def __get_cmd_output(self):
+        cmd = self.component_list[self.index][COMPONENT_VER_CMD]
+        version = "N/A"
+
+        try:
+            p = subprocess.Popen(cmd, stdout=subprocess.PIPE, universal_newlines=True)
+            data = p.communicate()
+            version = data[0].strip()
+        except IOError:
+            pass
+
+        return version
+
+    def __get_onie_version(self):
+        version = "N/A"
+
+        ret = re.search(r"(?<=onie_version=).+[^\n]", self.__get_cmd_output())
+        if ret != None:
+            version = ret.group(0)
+
+        return version
+
+    def __get_ssd_version(self):
+        version = "N/A"
+
+        ret = re.search(r"Firmware Version: +(.*)[^\\]", self.__get_cmd_output())
+        if ret != None:
+            try:
+               version = ret.group(1)
+            except (IndexError):
+                pass
+
+        return version
+
+    def __get_cpld_version(self):
+        version = "N/A"
+
+        try:
+            ver = int(self.__get_cmd_output(), 16)
+            version = "{0}.{1}".format(ver >> 4, ver & 0x0F)
+        except (ValueError):
+            pass
+
+        return version
+
+    def get_name(self):
+        """
+        Retrieves the name of the component
+         Returns:
+            A string containing the name of the component
+        """
+        return self.component_list[self.index][COMPONENT_NAME]
+
+    def __get_ssd_desc(self, desc_format):
+        description = "N/A"
+
+        ret = re.search(r"Device Model: +(.*)[^\\]", self.__get_cmd_output())
+        if ret != None:
+            try:
+               description = desc_format.format(ret.group(1))
+            except (IndexError):
+                pass
+
+        return description
+
+    def get_description(self):
+        """
+        Retrieves the description of the component
+            Returns:
+            A string containing the description of the component
+        """
+        # For SSD get the model name from device
+        if self.get_name() == "SSD":
+            return self.__get_ssd_desc(self.component_list[self.index][COMPONENT_DESC])
+
+        return self.component_list[self.index][COMPONENT_DESC]
+
+    def get_firmware_version(self):
+        """
+        Retrieves the firmware version of module
+        Returns:
+            string: The firmware versions of the module
+        """
+        fw_version = None
+        fw_version = self.component_list[self.index][COMPONENT_VER_FN]()
+
+        return fw_version
+
+    def install_firmware(self, image_path):
+        """
+        Install firmware to module
+        Args:
+            image_path: A string, path to firmware image
+        Returns:
+            A boolean, True if install successfully, False if not
+        """
+        return False
+
+    def update_firmware(self, image_path):
+        return False
+
+    def get_available_firmware_version(self, image_path):
+        return 'N/A'
+
+    def get_firmware_update_notification(self, image_path):
+        return "None"
+
+    def get_model(self):
+        return 'N/A'
+
+    def get_position_in_parent(self):
+        return -1
+
+    def get_presence(self):
+        return True
+
+    def get_serial(self):
+        return 'N/A'
+
+    def get_status(self):
+        return True
+
+    def is_replaceable(self):
+        return False
diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/eeprom.py
similarity index 81%
rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/eeprom.py
rename to platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/eeprom.py
index bc1ef6420b68..5379db32a5a0 100644
--- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/eeprom.py
+++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/eeprom.py
@@ -6,7 +6,7 @@
 
 class Eeprom(PddfEeprom):
 
-    _TLV_DISPLAY_VENDOR_EXT = True  
+    _TLV_DISPLAY_VENDOR_EXT = True
     _TLV_INFO_MAX_LEN = 256
     pddf_obj = {}
     plugin_data = {}
@@ -58,18 +58,11 @@ def __init__(self, pddf_data=None, pddf_plugin_data=None):
                 else:
                     name, value = self.decoder(None, tlv)
 
-                self.eeprom_tlv_dict[code] = value
+                self.eeprom_tlv_dict[code] = value.strip()
                 if (eeprom[tlv_index]) == self._TLV_CODE_CRC_32:
                     break
 
                 tlv_index += (eeprom[tlv_index+1]) + 2
 
-    def vendor_ext_str(self):
-        """
-        :return: the direction of fan(FB or BF, string)
-        """
-        (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_VENDOR_EXT)
-        if not is_valid:
-            return "N/A"
-        return str(hex(int(results[2][2]))).replace("0x", "").upper()
-    # Provide the functions/variables below for which implementation is to be overwritten
+    def get_vendor_extn(self):
+        return self.eeprom_tlv_dict.get('0xFD', 'N/A')
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/fan.py
new file mode 100644
index 000000000000..3a71e9723900
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/fan.py
@@ -0,0 +1,153 @@
+try:
+    from sonic_platform_pddf_base.pddf_fan import PddfFan
+    import subprocess
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+# ------------------------------------------------------------------
+# HISTORY:
+#    5/1/2022 (A.D.)
+#    add function:set_status_led,
+#    Solve the problem that when a fan is pulled out, the Fan LED on the front panel is still green Issue-#11525
+# ------------------------------------------------------------------
+
+MIN_SPEED = 40 # Percentage
+
+class Fan(PddfFan):
+    """PDDF Platform-Specific Fan class"""
+
+    def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0):
+        # idx is 0-based
+        PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index)
+
+        self.max_speed_rpm = 28600 #Max RPM from FAN spec
+
+        # Remap LED color READ and OFF to AMBER as they are unsupported
+        self.STATUS_LED_COLOR_RED = "amber"
+        self.STATUS_LED_COLOR_OFF = "amber"
+
+    def get_presence(self):
+        if not self.is_psu_fan:
+            # FANs on Ds1000 are all Fixed and present
+            return True
+
+        #For PSU, FAN must be present when PSU is present
+        try:
+            cmd = ['i2cget', '-y', '-f', '0x2', '0x32', '0x41']
+            p = subprocess.Popen(cmd, stdout=subprocess.PIPE, universal_newlines=True)
+            data = p.communicate()
+            status = int(data[0].strip(), 16)
+            if (self.fans_psu_index == 1 and (status & 0x10) == 0) or \
+                (self.fans_psu_index == 2 and (status & 0x20) == 0):
+                return True
+        except (IOError, ValueError):
+            pass
+
+    def get_status(self):
+        if not self.is_psu_fan:
+            if not self.get_presence():
+                return False
+
+            # FANs must not be operated below MIN_SPEED
+            target_speed = self.get_target_speed()
+            if target_speed < MIN_SPEED:
+                return False
+
+            # FANs target speed and actual speed must
+            # be within specified tolerance limits
+            current_speed = self.get_speed()
+            speed_tolerance = self.get_speed_tolerance()
+            if abs(target_speed - current_speed) > speed_tolerance:
+                return False
+
+            return True
+
+        return super().get_status()
+
+    # Override get_speed as PDDF retrieves the speed from the
+    # set PWM value which is actually the target fan speed
+    def get_speed(self):
+        """
+        Retrieves the speed of fan as a percentage of full speed
+
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        if self.is_psu_fan:
+            return super().get_speed()
+
+        # Percentage of current FAN speed against the max FAN speed
+        return round(super().get_speed_rpm() * 100 / self.max_speed_rpm)
+
+    def get_direction(self):
+        """
+        Retrieves the direction of fan
+
+        Returns:
+            A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
+            depending on fan direction
+        """
+        if self.is_psu_fan:
+            # Ds1000 PSU module only has EXHAUST fan
+            return "exhaust"
+
+        return super().get_direction()
+
+    def get_status_led(self):
+        """
+        Gets the state of the fan status LED
+
+        Returns:
+            A string, one of the predefined STATUS_LED_COLOR_* strings above
+        """
+        if self.is_psu_fan:
+            return "N/A"
+
+        return super().get_status_led()
+
+    def set_status_led(self, color):
+        """
+        Sets the state of the fan module status LED
+
+        Args:
+            color: A string representing the color with which to set the
+                   fan module status LED
+
+        Returns:
+            bool: True if status LED state is set successfully, False if not
+        """
+        if self.is_psu_fan:
+            return False
+
+        if self.get_status_led() == color:
+            return True
+
+        return super().set_status_led(color)
+
+    def get_name(self):
+        if self.is_psu_fan:
+            return "PSU {} Fan {}".format(self.fans_psu_index, self.fan_index)
+        else:
+            return "Fan {}".format(self.fantray_index)
+    
+    def is_under_speed(self):
+        speed = float(self.get_speed())
+        target_speed = float(self.get_target_speed())
+        speed_tolerance = self.get_speed_tolerance()
+
+        speed_min_th = target_speed * (1 - float(speed_tolerance) / 100)
+        if speed < speed_min_th:
+            return True
+        else:
+            return False
+
+    def is_over_speed(self):
+        speed = float(self.get_speed())
+        target_speed = float(self.get_target_speed())
+        speed_tolerance = self.get_speed_tolerance()
+
+        speed_max_th = target_speed * (1 + float(speed_tolerance) / 100)
+        if speed > speed_max_th:
+            return True
+        else:
+            return False
diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/fan_drawer.py
similarity index 91%
rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/fan_drawer.py
rename to platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/fan_drawer.py
index ac80aad4b1eb..beec44630406 100644
--- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/fan_drawer.py
+++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/fan_drawer.py
@@ -6,7 +6,7 @@
 #############################################################################
 
 try:
-    from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer 
+    from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
@@ -16,8 +16,8 @@ class FanDrawer(PddfFanDrawer):
     def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None):
         # idx is 0-based
         PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data)
-        
-        
+
+
     def set_status_led(self, color):
         return self._fan_list[0].set_status_led(color)
 
@@ -31,3 +31,6 @@ def get_serial(self):
     def get_model(self):
         model = "Unknown"
         return model
+
+    def get_name(self):
+        return "Drawer {0}".format(self.fantray_index)
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/pcie.py
new file mode 100644
index 000000000000..0f8bc0830384
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/pcie.py
@@ -0,0 +1,15 @@
+#
+# pcie_base.py
+#
+# Abstract base class for implementing platform-specific
+#  PCIE functionality for SONiC
+#
+
+try:
+    from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil
+except ImportError as e:
+    raise ImportError (str(e) + " - required module not found")
+
+class Pcie(PcieUtil):
+    def __init__(self, platform_path):
+        PcieUtil.__init__(self, platform_path)
diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/platform.py
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/platform.py
rename to platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/platform.py
diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/psu.py
similarity index 61%
rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/psu.py
rename to platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/psu.py
index f1047bed740a..a3a7f6da8f34 100644
--- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/psu.py
+++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/psu.py
@@ -6,12 +6,12 @@
 
 class Psu(PddfPsu):
     """PDDF Platform-Specific PSU class"""
-    
+
     PLATFORM_PSU_CAPACITY = 550
 
     def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
         PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data)
-        
+
     # Provide the functions/variables below for which implementation is to be overwritten
     def get_capacity(self):
         """
@@ -71,3 +71,38 @@ def get_voltage_low_threshold(self):
             e.g. 12.1
         """
         return 11.4
+
+    def get_voltage(self):
+        """
+        Retrieves current PSU voltage output
+
+        Returns:
+            A float number, the output voltage in volts,
+            e.g. 12.1
+        """
+        # When AC power is not plugged into one of the PSU, the FAN of
+        # that PSU is driven using the power from the alternate PSU and
+        # because of this the PSU VOUT might read a small voltage value
+        # and it is misleading. Therefore the PSU VOUT is fetched from
+        # HW only when PSU status is OK
+        if self.get_status():
+            return super().get_voltage()
+
+        return 0.0
+
+    def get_status_led(self):
+        """
+        Gets the state of the PSU status LED
+
+        Returns:
+            A string, one of the predefined STATUS_LED_COLOR_* strings above
+        """
+        # In Ds1000 PSU LED is controlled by the PSU firmware, so soft
+        # simulating the LED in a generic way based on the PSU status
+        if self.get_presence():
+            if self.get_powergood_status():
+                return self.STATUS_LED_COLOR_GREEN
+            else:
+                return self.STATUS_LED_COLOR_AMBER
+
+        return "N/A"
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/sfp.py
new file mode 100644
index 000000000000..9187edb1fdf3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/sfp.py
@@ -0,0 +1,36 @@
+try:
+    from sonic_platform_pddf_base.pddf_sfp import PddfSfp
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+
+class Sfp(PddfSfp):
+    """
+    PDDF Platform-Specific Sfp class
+    """
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
+        self.index = index+1
+        PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+
+    def get_error_description(self):
+        """
+        Retrives the error descriptions of the SFP module
+        Returns:
+            String that represents the current error descriptions of vendor specific errors
+            In case there are multiple errors, they should be joined by '|',
+            like: "Bad EEPROM|Unsupported cable"
+        """
+        if not self.get_presence():
+            return self.SFP_STATUS_UNPLUGGED
+        return self.SFP_STATUS_OK
+
+    def reset(self):
+        """
+        Reset SFP and return all user module settings to their default srate.
+
+        SFP+ don't support reset, so raise the error of NotImplemented
+        """
+        raise NotImplementedError
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/thermal.py
new file mode 100644
index 000000000000..b17dfa4457df
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/thermal.py
@@ -0,0 +1,105 @@
+try:
+    from sonic_platform_pddf_base.pddf_thermal import PddfThermal
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+import subprocess
+
+HIGH_THRESHOLD = 0
+LOW_THRESHOLD = 1
+HIGH_CRIT_THRESHOLD = 2
+LOW_CRIT_THRESHOLD = 3
+
+NUM_SENSORS = 4
+CPU_SENSOR_STR = "CPU Internal Temp"
+thermal_limits = {
+    # <sensor-name>: <high_thresh>, <low_thresh>, <high_crit_thresh>, <low_crit_thresh>
+    'Front Right Temp': [50.0, None, None, None],
+    'Front Left Temp': [50.0, None, None, None],
+    'Rear Right Temp': [50.0, None, None, None],
+    'ASIC External Temp': [100.0, None, 105.0, None],
+    CPU_SENSOR_STR: [88.0, None, 91.0, None]
+}
+
+class Thermal(PddfThermal):
+    """PDDF Platform-Specific Thermal class"""
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0):
+        # PDDF doesn't support CPU internal temperature sensor
+        # Hence it is created from chassis init override and
+        # handled appropriately in thermal APIs
+        self.thermal_index = index + 1
+        self.is_psu_thermal = is_psu_thermal
+        if self.thermal_index <= NUM_SENSORS:
+            PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index)
+    # Provide the functions/variables below for which implementation is to be overwritten
+
+    def get_name(self):
+        if self.thermal_index <= NUM_SENSORS:
+            return super().get_name()
+
+        return CPU_SENSOR_STR
+
+    def get_temperature(self):
+        if self.thermal_index <= NUM_SENSORS:
+            return super().get_temperature()
+
+        temperature = 0.0
+        cmd = ['cat', '/sys/devices/platform/coretemp.0/hwmon/hwmon1/temp1_input']
+        try:
+            p = subprocess.Popen(cmd, stdout=subprocess.PIPE, universal_newlines=True)
+            data = p.communicate()
+            temperature = int(data[0].strip())/1000.0
+        except (IOError, ValueError):
+            pass
+
+        return temperature
+
+    def get_low_threshold(self):
+        thermal_limit = thermal_limits.get(self.get_name(), None)
+        if thermal_limit != None:
+            return thermal_limit[LOW_THRESHOLD]
+
+        return None
+
+    def __get_psu_high_threshold(self):
+        thermal_limit = None
+        try:
+            cmd = ['i2cget', '-y', '-f', '4', str(0x58 + (self.thermals_psu_index - 1)), '0x51', 'w']
+            p = subprocess.Popen(cmd, stdout=subprocess.PIPE, universal_newlines=True)
+            data = p.communicate()
+            thermal_limit = int(data[0].strip(), 16)
+        except (IOError, ValueError):
+            pass
+
+        return thermal_limit
+
+    def get_high_threshold(self):
+        if self.is_psu_thermal:
+            return self.__get_psu_high_threshold()
+
+        thermal_limit = thermal_limits.get(self.get_name(), None)
+        if thermal_limit != None:
+            return thermal_limit[HIGH_THRESHOLD]
+
+        return None
+
+    def get_low_critical_threshold(self):
+        thermal_limit = thermal_limits.get(self.get_name(), None)
+        if thermal_limit != None:
+            return thermal_limit[LOW_CRIT_THRESHOLD]
+
+        return None
+
+    def get_high_critical_threshold(self):
+        thermal_limit = thermal_limits.get(self.get_name(), None)
+        if thermal_limit != None:
+            return thermal_limit[HIGH_CRIT_THRESHOLD]
+
+        return None
+
+    def set_high_threshold(self, temperature):
+        raise NotImplementedError
+
+    def set_low_threshold(self, temperature):
+        raise NotImplementedError
diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/watchdog.py
similarity index 98%
rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/watchdog.py
rename to platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/watchdog.py
index 7973e8a3cfad..d43e1d74f5e3 100644
--- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/watchdog.py
+++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/pddf/sonic_platform/watchdog.py
@@ -1,7 +1,7 @@
 #!/usr/bin/env python
 
 #############################################################################
-# 
+#
 # Watchdog contains an implementation of SONiC Platform Base Watchdog API
 #
 #############################################################################
@@ -55,14 +55,14 @@ class CpldWatchdog(WatchdogBase):
     watchdog = None
     def __init__(self):
         global watchdog
-        self.status_path = "/sys/devices/platform/cpld_wdt/status" 
-        self.state_path = "/sys/devices/platform/cpld_wdt/state" 
-        self.timeout_path = "/sys/devices/platform/cpld_wdt/timeout" 
+        self.status_path = "/sys/devices/platform/cpld_wdt/status"
+        self.state_path = "/sys/devices/platform/cpld_wdt/state"
+        self.timeout_path = "/sys/devices/platform/cpld_wdt/timeout"
         # Set default value
         with open("/sys/devices/platform/cpld_wdt/state", "r") as fd:
             txt = fd.read()
-        state = txt.strip() 
-        self.armed = True if state == "active" else False 
+        state = txt.strip()
+        self.armed = True if state == "active" else False
         self.timeout = DEFAULT_TIMEOUT
         if not watchdog:
             watchdog = os.open("/dev/cpld_wdt", os.O_RDWR)
@@ -160,7 +160,7 @@ def arm(self, seconds):
             else:
                 self._enable()
                 self.armed = True
-           
+
             ret = self.timeout
         except IOError as e:
             pass
@@ -226,4 +226,3 @@ def __init__(self):
         CpldWatchdog.__init__(self)
 
     # Provide the functions/variables below for which implementation is to be overwritten
-
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/ds1000_platform_shutdown.sh b/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/ds1000_platform_shutdown.sh
new file mode 100755
index 000000000000..a1ea8ccbe4ae
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/ds1000_platform_shutdown.sh
@@ -0,0 +1,26 @@
+#!/bin/bash
+REBOOT_CAUSE_DIR="/host/reboot-cause"
+HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt"
+REBOOT_TIME=$(date)
+
+if [ $# -ne 1 ]; then
+    echo "Require reboot type"
+    exit 1
+fi
+
+if [ ! -d "$REBOOT_CAUSE_DIR" ]; then
+    mkdir $REBOOT_CAUSE_DIR
+fi
+
+echo "Reason:$1,Time:${REBOOT_TIME}" > ${HW_REBOOT_CAUSE_FILE}
+
+# Best effort to write buffered data onto the disk
+sync ; sync ; sync ; sleep 3
+
+# CPLD CPU cold power-cycle
+i2cset -f -y 2 0x32 0x18 0x0
+
+# System should reboot by now and avoid the script returning to caller
+sleep 10
+
+exit 0
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/pddf_post_device_create.sh
new file mode 100755
index 000000000000..9fd8364e23b6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/pddf_post_device_create.sh
@@ -0,0 +1,22 @@
+#!/bin/bash
+
+# Enable FAN WDT
+sudo i2cset -y -f 2 0x32 0x30 0x01
+
+# Set all FAN speed to 100%
+sudo i2cset -y -f 2 0x32 0x32 0xff
+sudo i2cset -y -f 2 0x32 0x36 0xff
+sudo i2cset -y -f 2 0x32 0x3a 0xff
+
+# Set FAN LED status to GREEN
+sudo i2cset -y -f 2 0x32 0x33 0x2
+sudo i2cset -y -f 2 0x32 0x37 0x2
+sudo i2cset -y -f 2 0x32 0x3b 0x2
+
+# Set Alarm LED status to OFF, since it is unused in SONiC
+sudo i2cset -y -f 2 0x32 0x44 0x00
+
+# Set SYS LED status to GREEN
+sudo i2cset -y -f 2 0x32 0x43 0xec
+
+echo -2 | tee /sys/bus/i2c/drivers/pca954x/*-00*/idle_state
diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/scripts/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/pddf_pre_driver_install.sh
similarity index 70%
rename from platform/broadcom/sonic-platform-modules-cel/belgite/scripts/pddf_pre_driver_install.sh
rename to platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/pddf_pre_driver_install.sh
index 2b37a5d5f6ff..39b055c1e55a 100755
--- a/platform/broadcom/sonic-platform-modules-cel/belgite/scripts/pddf_pre_driver_install.sh
+++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/scripts/pddf_pre_driver_install.sh
@@ -1,5 +1,5 @@
 #!/bin/bash
-modprobe -r i2c_ismt 
+modprobe -r i2c_ismt
 sleep 0.1
 modprobe -r i2c-i801
 sleep 0.1
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/service/ds1000-fan-control.service b/platform/broadcom/sonic-platform-modules-cel/ds1000/service/ds1000-fan-control.service
new file mode 100644
index 000000000000..7269080b53bc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/service/ds1000-fan-control.service
@@ -0,0 +1,17 @@
+[Unit]
+Description=Ds1000 Fan Control service
+After=pddf-platform-init.service
+Requires=pddf-platform-init.service
+BindsTo=pddf-platform-init.service
+
+[Service]
+Type=simple
+ExecStart=/usr/local/bin/ds1000_fanctld.py
+KillSignal=SIGTERM
+SuccessExitStatus=0
+
+# Resource Limitations
+LimitCORE=infinity
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/systemd/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-cel/ds1000/systemd/pddf-platform-init.service
new file mode 100644
index 000000000000..becd98ea602e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/systemd/pddf-platform-init.service
@@ -0,0 +1,15 @@
+[Unit]
+Description=PDDF module and device initialization service
+Before=pmon.service watchdog-control.service ds1000-fan-control.service
+Before=opennsl-modules.service
+DefaultDependencies=no
+
+[Service]
+Type=oneshot
+ExecStart=/usr/local/bin/pddf_util.py install
+ExecStop=/usr/local/bin/pddf_util.py clean
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
+WantedBy=opennsl-modules.service
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds1000/utils/ds1000_fanctld.py b/platform/broadcom/sonic-platform-modules-cel/ds1000/utils/ds1000_fanctld.py
new file mode 100755
index 000000000000..9955568ac237
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds1000/utils/ds1000_fanctld.py
@@ -0,0 +1,346 @@
+#!/usr/bin/python3
+#
+# Copyright (C) Celestica Technology Corporation
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# ------------------------------------------------------------------
+# HISTORY:
+#    9/16/2021 (A.D.)
+# ------------------------------------------------------------------
+
+try:
+    import os
+    import sys
+    import getopt
+    import subprocess
+    import re
+    import time
+    import signal
+    from sonic_platform import platform
+    from sonic_py_common import daemon_base
+except ImportError as e:
+    raise ImportError('%s - required module not found' % repr(e))
+
+# Constants
+NOMINAL_TEMP = 30 # degree C
+MODULE_NAME = 'ds1000fanctld'
+SP_LOW_TEMP = 0
+SP_HIGH_TEMP = 1
+SP_CRITICAL_TEMP = 2
+SP_FATAL_TEMP = 3
+SP_REF_TEMP = 4
+SP_FAN_SPEED = 5
+SP_VALIDATE = 6
+
+# Daemon control platform specific constants
+PDDF_INIT_WAIT = 30 #secs
+POLL_INTERVAL = 10 #secs
+CRITICAL_DURATION = 120 #secs
+CRITICAL_LOG_INTERVAL = 20 #every 'n' secs
+FAN_DUTY_MIN = 40 # percentage
+FAN_DUTY_MAX = 100 #percentage
+TEMP_HYST = 3 # degree C
+NUM_FANS = 3
+
+# Validation functions
+def valid_if_exhaust(fan_dir):
+    if fan_dir == "EXHAUST":
+        return True
+
+    return False
+
+def valid_if_intake(fan_dir):
+    if fan_dir == "INTAKE":
+        return True
+
+    return False
+
+def valid_always(fan_dir):
+    return True
+
+def valid_never(fan_dir):
+    return False
+
+# Core data for Thermal FAN speed evaluation
+# {<thermal-name>: [low_temp, high_temp, critical_temp, fatal_temp, current_temp, fanspeed, validate_function]}
+SENSOR_PARAM = {
+    'Front Right Temp': [34, 47, None, None, NOMINAL_TEMP, FAN_DUTY_MIN, valid_if_exhaust],
+    'Front Left Temp': [None, None, None, None, NOMINAL_TEMP, FAN_DUTY_MIN, valid_never],
+    'Rear Right Temp': [34, 47, None, None, NOMINAL_TEMP, FAN_DUTY_MIN, valid_if_intake],
+    'ASIC External Temp': [54, 69, 105, 110, NOMINAL_TEMP, FAN_DUTY_MIN, valid_always],
+    'CPU Internal Temp': [69, 84, 91, 94, NOMINAL_TEMP, FAN_DUTY_MIN, valid_always]
+}
+
+class Ds1000FanControl(daemon_base.DaemonBase):
+    global MODULE_NAME
+    global SENSOR_PARAM
+
+    def __init__(self, log_level):
+
+        str_to_log_level = {
+            'ERROR' : self.LOG_PRIORITY_ERROR, \
+            'WARNING' : self.LOG_PRIORITY_WARNING, \
+            'NOTICE': self.LOG_PRIORITY_NOTICE, \
+            'INFO': self.LOG_PRIORITY_INFO, \
+            'DEBUG': self.LOG_PRIORITY_DEBUG
+        }
+        self.fan_list = []
+        self.thermal_list = []
+
+        super(Ds1000FanControl, self).__init__(MODULE_NAME)
+        if log_level is not None:
+            self.set_min_log_priority(str_to_log_level.get(log_level))
+            self.log_info("Forcing to loglevel {}".format(log_level))
+        self.log_info("Starting up...")
+
+        self.log_debug("Waiting {} secs for PDDF driver initialization".format(PDDF_INIT_WAIT))
+        time.sleep(PDDF_INIT_WAIT)
+
+        try:
+            self.critical_period = 0
+            self.platform_chassis = platform.Platform().get_chassis()
+
+            # Fetch FAN info
+            self.fan_list = self.platform_chassis.get_all_fans()
+            if len(self.fan_list) != NUM_FANS:
+                self.log_error("Fans detected({}) is not same as expected({}), so exiting..."\
+                               .format(len(self.fan_list), NUM_FANS))
+                sys.exit(1)
+
+            self.fan_dir = self.fan_list[0].get_direction()
+            self.log_debug("Fans direction is {}".format(self.fan_dir))
+
+            # Fetch THERMAL info
+            self.thermal_list = self.platform_chassis.get_all_thermals()
+            if len(self.thermal_list) != len(SENSOR_PARAM):
+                self.log_error("Thermals detected({}) is not same as expected({}), so exiting..."\
+                               .format(len(self.thermal_list), len(SENSOR_PARAM)))
+                sys.exit(1)
+
+            # Initialize the thermal temperature dict
+            # {<thermal-name>: [thermal_temp, fanspeed]}
+            for thermal in self.thermal_list:
+                thermal_name = thermal.get_name()
+                SENSOR_PARAM[thermal_name][SP_REF_TEMP] = thermal.get_temperature()
+
+        except Exception as e:
+            self.log_error("Failed to init Ds1000FanControl due to {}, so exiting...".format(repr(e)))
+            sys.exit(1)
+
+    # Signal handler
+    def signal_handler(self, sig, frame):
+        if sig == signal.SIGHUP:
+            self.log_notice("Caught SIGHUP - ignoring...")
+        elif sig == signal.SIGINT:
+            self.log_warning("Caught SIGINT - Setting all FAN speed to max({}%) and exiting... ".format(FAN_DUTY_MAX))
+            self.set_all_fan_speed(FAN_DUTY_MAX)
+            sys.exit(0)
+        elif sig == signal.SIGTERM:
+            self.log_warning("Caught SIGTERM - Setting all FAN speed to max({}%) and exiting... ".format(FAN_DUTY_MAX))
+            self.set_all_fan_speed(FAN_DUTY_MAX)
+            sys.exit(0)
+        else:
+            self.log_notice("Caught unhandled signal '" + sig + "'")
+
+
+    @staticmethod
+    def is_fan_operational(fan):
+        if fan.get_presence() and fan.get_status():
+            return True
+
+        return False
+
+    @staticmethod
+    def get_speed_from_min_max(cur_temp, min_temp, max_temp, min_speed, max_speed):
+        if cur_temp <= min_temp:
+            speed = min_speed
+        elif cur_temp >= max_temp:
+            speed = max_speed
+        else:
+            multiplier = (max_speed - min_speed) / (max_temp - min_temp)
+            speed = int(((cur_temp - min_temp) * multiplier) + min_speed)
+
+        return speed
+
+    def thermal_shutdown(self, reason):
+        cmd = ['/usr/local/bin/ds1000_platform_shutdown.sh', reason]
+
+        proc = subprocess.Popen(cmd, stdout=subprocess.PIPE, universal_newlines=True)
+        proc.communicate()
+        if proc.returncode == 0:
+            return True
+        else:
+            self.log_error("Thermal {} shutdown failed with errorno {}"\
+                           .format(reason, proc.returncode))
+            return False
+
+    def get_fan_speed_from_thermals(self):
+        prominent_speed = FAN_DUTY_MIN
+        is_critical = False
+
+        for thermal in self.thermal_list:
+            speed = prominent_speed
+            thermal_name = thermal.get_name()
+            thermal_temp = thermal.get_temperature()
+            thermal_info = SENSOR_PARAM[thermal_name]
+            thermal_ref = thermal_info[SP_REF_TEMP]
+            thermal_low = thermal_info[SP_LOW_TEMP]
+            thermal_high = thermal_info[SP_HIGH_TEMP]
+            thermal_critical = thermal_info[SP_CRITICAL_TEMP]
+            thermal_fatal = thermal_info[SP_FATAL_TEMP]
+
+            if thermal_info[SP_VALIDATE](self.fan_dir):
+                self.log_debug("{} temperature is {}C".format(thermal_name, thermal_temp))
+                if thermal_temp <= thermal_low:
+                    SENSOR_PARAM[thermal_name][SP_REF_TEMP] = thermal_low
+                    speed = FAN_DUTY_MIN
+                elif thermal_temp >= thermal_high:
+                    SENSOR_PARAM[thermal_name][SP_REF_TEMP] = thermal_high
+                    speed = FAN_DUTY_MAX
+                    if thermal_fatal and thermal_temp >= thermal_fatal:
+                        # Double check since immediate cold power-cycle
+                        # is an expensive operation in field
+                        if thermal.get_temperature() >= thermal_fatal:
+                            self.log_warning("'{}' temperature ({}C) hit fatal limit ({}C)."\
+                                             " Triggering immediate cold power-cycle"\
+                                             .format(thermal_name, thermal_temp, thermal_fatal))
+                            self.thermal_shutdown('temp_fatal')
+                            sys.exit(0)
+                        else:
+                            self.log_warning("'{}' temperature ({}C) hit fatal limit ({}C) intermittently"\
+                                             .format(thermal_name, thermal_temp, thermal_fatal))
+                    elif thermal_critical and thermal_temp >= thermal_critical:
+                        if self.critical_period < CRITICAL_DURATION:
+                            if self.critical_period % CRITICAL_LOG_INTERVAL == 0:
+                                self.log_warning("'{}' temperature ({}C) hit critical limit ({}C)."\
+                                                 " Triggering cold power-cycle in {} seconds"\
+                                                 .format(thermal_name, thermal_temp, thermal_critical,\
+                                                         (CRITICAL_DURATION - self.critical_period)))
+                            is_critical = True
+                        else:
+                            self.log_warning("'{}' temperature ({}C) is in critical limit ({}C) for more"\
+                                             " than {} seconds. Triggering cold power-cycle now"\
+                                             .format(thermal_name, thermal_temp, thermal_critical,\
+                                                     CRITICAL_DURATION))
+                            self.thermal_shutdown('temp_critical')
+                            sys.exit(0)
+
+                else:
+                    if thermal_temp > thermal_ref:
+                        SENSOR_PARAM[thermal_name][SP_REF_TEMP] = thermal_temp
+                        speed = self.get_speed_from_min_max(thermal_temp, thermal_low, thermal_high,\
+                                                            FAN_DUTY_MIN, FAN_DUTY_MAX)
+                    elif thermal_ref - thermal_temp >= TEMP_HYST:
+                        SENSOR_PARAM[thermal_name][SP_REF_TEMP] = thermal_temp + 1
+                        speed = self.get_speed_from_min_max(thermal_temp + 1, thermal_low, thermal_high,\
+                                                            FAN_DUTY_MIN, FAN_DUTY_MAX)
+                    else:
+                        speed = SENSOR_PARAM[thermal_name][SP_FAN_SPEED]
+
+                self.log_debug("{} thermal speed is {}%".format(thermal_name, speed))
+                SENSOR_PARAM[thermal_name][SP_FAN_SPEED] = speed
+                prominent_speed = max(prominent_speed, speed)
+
+        if is_critical:
+            self.critical_period = self.critical_period + POLL_INTERVAL
+        elif self.critical_period > 0:
+            self.critical_period = 0
+            self.log_notice("All thermals are now below critical limit."\
+                            " System cold power-cycle is now cancelled")
+
+        self.log_debug("Prominent thermal speed is {}%".format(prominent_speed))
+
+        return prominent_speed
+
+    def set_all_fan_speed(self, speed):
+        for fan in self.fan_list:
+            fan_name = fan.get_name()
+            try:
+                if fan.set_speed(speed):
+                    self.log_debug("Set {} speed to {}%".format(fan_name, speed))
+                else:
+                    self.log_error("Set '{}' to speed {}% failed".format(fan_name, speed))
+            except Exception as e:
+                self.log_error("Set '{}' to speed {}% failed due to {}".format(fan_name, speed, repr(e)))
+
+        return False
+
+    def run(self):
+        while True:
+            num_good_fans = 0
+            dir_mismatch = False
+            for fan in self.fan_list:
+                if self.is_fan_operational(fan):
+                    num_good_fans = num_good_fans + 1
+                else:
+                    self.log_notice("FAN '{}' is broken or not inserted".format(fan.get_name()))
+
+                if self.fan_dir is None:
+                    self.fan_dir = fan.get_direction()
+                elif self.fan_dir != fan.get_direction():
+                    dir_mismatch = True
+            self.log_debug("{} FANs are operational, there is{}direction mismatch"\
+                           .format('All' if num_good_fans == len(self.fan_list) else num_good_fans,
+                                   ' ' if dir_mismatch else ' no '))
+
+            # Always evaluate the thermals irrespective of the FAN state
+            speed = self.get_fan_speed_from_thermals()
+
+            if dir_mismatch:
+                self.log_warning("Some FANs have incompatible direction. Please replace FANs immediately")
+            else:
+                if num_good_fans == len(self.fan_list): # Good FANs is equal to number of FANs
+                    self.set_all_fan_speed(speed)
+                else:
+                    if not num_good_fans: # None of the FANs are operational
+                        self.log_warning("Overheating hazard!! All FANs are broken or not inserted")
+                    else:
+                        self.log_warning("Some FANs are broken or not inserted")
+                        self.set_all_fan_speed(FAN_DUTY_MAX)
+
+            time.sleep(POLL_INTERVAL)
+
+def main(argv):
+    log_level = None
+    valid_log_levels = ['ERROR', 'WARNING', 'NOTICE', 'INFO', 'DEBUG']
+
+    if len(sys.argv) != 1:
+        try:
+            opts, args = getopt.getopt(argv, 'hdl', ['log-level='])
+        except getopt.GetoptError:
+            print('Usage: %s [-d] [-l <log_file>]' % sys.argv[0])
+            sys.exit(1)
+        for opt, arg in opts:
+            if opt == '-h':
+                print('Usage: %s [-d] [-l <log_level>]\nlog_level - ERROR, WARNING, NOTICE, INFO, DEBUG' % sys.argv[0])
+                sys.exit(1)
+            elif opt in ('-l', '--log-level'):
+                if log_level not in valid_log_levels:
+                    print('Invalid log level %s' % arg)
+                    sys.exit(1)
+            elif opt == '-d':
+                log_level = 'DEBUG'
+
+    fanctl = Ds1000FanControl(log_level)
+
+    fanctl.log_debug("Start daemon main loop")
+    # Loop forever, doing something useful hopefully:
+    fanctl.run()
+    fanctl.log_debug("Stop daemon main loop")
+
+    sys.exit(0)
+
+if __name__ == '__main__':
+    main(sys.argv[1:])
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/classes/__init__.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/classes/__init__.py
new file mode 100755
index 000000000000..e69de29bb2d1
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/Makefile b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/Makefile
new file mode 100644
index 000000000000..51583c9fbbce
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/Makefile
@@ -0,0 +1,5 @@
+TARGET:= pddf_custom_psu_driver_module
+$(TARGET)-objs := ./psu_driver/pddf_psu_api.o ./psu_driver/pddf_psu_driver.o
+
+obj-m := $(TARGET).o
+obj-m += mc24lc64t.o pddf_custom_fpga_algo.o pddf_custom_fpga_extend.o lpc_basecpld.o
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/lpc_basecpld.c b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/lpc_basecpld.c
new file mode 100644
index 000000000000..f925b5d84564
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/lpc_basecpld.c
@@ -0,0 +1,720 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * lpc_basecpld.c - The CPLD driver for the Base Board of ds2000
+ * The driver implement sysfs to access CPLD register on the baseboard of ds2000 via LPC bus.
+ *
+ * Author: Nicholas Wu <nicwu@celestica.com>/Oscar Xu <ohsu@celestica.com>
+ * Copyright (C) 2022-2024 Celestica Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/stddef.h>
+#include <linux/delay.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/acpi.h>
+#include <linux/io.h>
+#include <linux/dmi.h>
+#include <linux/slab.h>
+#include <linux/wait.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+#include <linux/types.h>
+#include <uapi/linux/stat.h>
+#include <linux/string.h>
+
+#define DRIVER_NAME "sys_cpld"
+/**
+ * CPLD register address for read and write.
+ */
+#define VERSION_ADDR 0xA100
+#define SCRATCH_ADDR 0xA101
+#define PSU_LED_ADDR 0xA161
+#define SYS_LED_ADDR 0xA162
+#define ALARM_LED_ADDR 0xA163
+#define FAN_LED_ADDR 0xA165
+#define COME_CPLD_VER_ADDR 0xA1E0
+
+#define CPLD_REGISTER_SIZE 0xFF
+
+/* LED CTRL */
+
+enum FAN_LED {
+    fan_led_amb = 1,
+    fan_led_grn,
+    fan_led_off,
+    fan_led_auto = 0x10
+} fan_led;
+
+enum SYS_LED {
+    sys_led_both = 0,
+    sys_led_grn,
+    sys_led_amb,
+    sys_led_off
+} sys_led;
+
+enum PWR_LED {
+    pwr_led_amb = 1,
+	pwr_led_grn,
+    pwr_led_off,
+    pwr_led_auto = 0x10
+} pwr_led;
+
+enum ALARM_LED {
+    alarm_led_both = 0,
+    alarm_led_grn,
+    alarm_led_amb,
+    alarm_led_off
+} alarm_led;
+
+enum LED_CTRL {
+    led_on = 0,
+    led_blk_1hz,
+    led_blk_4hz,
+    led_off
+} led_ctrl;
+
+#define LED_OFF        "off"
+#define LED_GREEN      "green"
+#define LED_AMBER      "amber"
+#define LED_HZ_GBNK    "grn_bnk_1hz"
+#define LED_HZ_ABNK    "amb_bnk_1hz"
+#define LED_QHZ_GBNK   "grn_bnk_4hz"
+#define LED_QHZ_ABNK   "amb_bnk_4hz"
+#define LED_HZ_GABNK   "grn_amb_1hz"
+#define LED_QHZ_GABNK  "grn_amb_4hz"
+
+struct cpld_b_data {
+	struct mutex	   cpld_lock;
+	uint16_t		   read_addr;
+};
+
+struct cpld_b_data *cpld_data;
+
+/**
+ * Read the value from scratch register as hex string.
+ * @param  dev	 kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf	 buffer for get value
+ * @return		 Hex string read from scratch register.
+ */
+static ssize_t scratch_show(struct device *dev,
+							struct device_attribute *devattr,
+							char *buf)
+{
+	unsigned char data = 0;
+
+	mutex_lock(&cpld_data->cpld_lock);
+	data = inb(SCRATCH_ADDR);
+	mutex_unlock(&cpld_data->cpld_lock);
+
+	return sprintf(buf, "0x%2.2x\n", data);
+}
+
+/**
+ * Set scratch register with specific hex string.
+ * @param  dev	 kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf	 buffer of set value
+ * @param  count   number of bytes in buffer
+ * @return		 number of bytes written, or error code < 0.
+ */
+static ssize_t scratch_store(struct device *dev,
+								struct device_attribute *devattr,
+								const char *buf, size_t count)
+{
+	int ret = 0;
+	unsigned long data;
+
+	mutex_lock(&cpld_data->cpld_lock);
+	ret = kstrtoul(buf, 0, &data);
+	if (ret != 0) {
+		mutex_unlock(&cpld_data->cpld_lock);
+		return ret;
+	}
+	outb(data, SCRATCH_ADDR);
+	mutex_unlock(&cpld_data->cpld_lock);
+
+	return count;
+}
+
+/* CPLD version attributes */
+static ssize_t version_show(struct device *dev,
+							struct device_attribute *attr,
+							char *buf)
+{
+	int len = 0;
+	unsigned char value = 0;
+
+	// CPLD register is one byte
+	mutex_lock(&cpld_data->cpld_lock);
+	value = inb(VERSION_ADDR);
+	len = sprintf(buf, "%d.%d\n", value >> 4, value & 0x0F);
+	mutex_unlock(&cpld_data->cpld_lock);
+
+	return len;
+}
+
+
+static ssize_t getreg_store(struct device *dev,
+							struct device_attribute *devattr,
+							const char *buf,
+							size_t count)
+{
+	int ret = 0;
+	unsigned long addr;
+
+	ret = kstrtoul(buf, 0, &addr);
+	if (ret != 0) {
+		return ret;
+	}
+	cpld_data->read_addr = addr;
+
+	return count;
+}
+
+static ssize_t getreg_show(struct device *dev,
+							struct device_attribute *attr,
+							char *buf)
+{
+	int len = 0;
+
+	// CPLD register is one byte
+	mutex_lock(&cpld_data->cpld_lock);
+	len = sprintf(buf, "0x%2.2x\n", inb(cpld_data->read_addr));
+	mutex_unlock(&cpld_data->cpld_lock);
+
+	return len;
+}
+
+static ssize_t setreg_store(struct device *dev, struct device_attribute *devattr,
+				const char *buf, size_t count)
+{
+	int ret = 0;
+	unsigned long addr;
+	unsigned long value;
+	char *tok;
+	char clone[20];
+	char *pclone = clone;
+
+	strscpy(clone, buf,sizeof(clone));
+
+	mutex_lock(&cpld_data->cpld_lock);
+	tok = strsep((char **)&pclone, " ");
+	if (tok == NULL) {
+		mutex_unlock(&cpld_data->cpld_lock);
+		return -EINVAL;
+	}
+	ret = kstrtoul(tok, 0, &addr);
+	if (ret != 0) {
+		mutex_unlock(&cpld_data->cpld_lock);
+		return ret;
+	}
+
+	tok = strsep((char **)&pclone, " ");
+	if (tok == NULL) {
+		mutex_unlock(&cpld_data->cpld_lock);
+		return -EINVAL;
+	}
+	ret = kstrtoul(tok, 0, &value);
+	if (ret != 0) {
+		mutex_unlock(&cpld_data->cpld_lock);
+		return ret;
+	}
+	outb(value, addr);
+	mutex_unlock(&cpld_data->cpld_lock);
+
+	return count;
+}
+
+/**
+ * Read all CPLD register in binary mode.
+ * @return number of byte read.
+ */
+static ssize_t dump_read(struct file *filp, struct kobject *kobj,
+				struct bin_attribute *attr, char *buf,
+				loff_t off, size_t count)
+{
+	unsigned long i = 0;
+	ssize_t status;
+
+	mutex_lock(&cpld_data->cpld_lock);
+begin:
+	if (i < count) {
+		buf[i++] = inb(VERSION_ADDR + off);
+		off++;
+		msleep(1);
+		goto begin;
+	}
+	status = count;
+	mutex_unlock(&cpld_data->cpld_lock);
+
+	return status;
+}
+
+/**
+ * @brief          Show status led
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer for get value
+ * @return         led state - off/on/blink
+ */
+static ssize_t sys_led_show(struct device *dev, struct device_attribute *devattr,
+                               char *buf)
+{
+    unsigned char data = 0;
+    unsigned char color = 0;
+    unsigned char control = 0;
+
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(SYS_LED_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    color = (data & 0x30) >> 4;
+    control = (data & 0x3);
+
+    switch(color){
+        case sys_led_both:
+            if ( control == led_blk_1hz){
+                return sprintf(buf, "%s\n", LED_HZ_GABNK);
+            }else if(control == led_blk_4hz){
+                return sprintf(buf, "%s\n", LED_QHZ_GABNK);
+            }else{
+                break;
+            }
+        case sys_led_amb:
+            if ( control == led_blk_1hz){
+                return sprintf(buf, "%s\n", LED_HZ_ABNK);
+            }else if(control == led_blk_4hz){
+                return sprintf(buf, "%s\n", LED_QHZ_ABNK);
+            }else if(control == led_on){
+                return sprintf(buf, "%s\n", LED_AMBER);
+            }else{
+                break;
+            }
+        case sys_led_grn:
+            if ( control == led_blk_1hz){
+                return sprintf(buf, "%s\n", LED_HZ_GBNK);
+            }else if(control == led_blk_4hz){
+                return sprintf(buf, "%s\n", LED_QHZ_GBNK);
+            }else if(control == led_on){
+                return sprintf(buf, "%s\n", LED_GREEN);
+            }else{
+                break;
+            }
+        default:
+            break;
+    }
+
+    return sprintf(buf, "%s\n", LED_OFF);
+}
+
+/**
+ * @brief          Set the status led
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer of set value - off/on/blink
+ * @param  count   number of bytes in buffer
+ * @return         number of bytes written, or error code < 0.
+ */
+static ssize_t sys_led_store(struct device *dev, struct device_attribute *devattr,
+                                const char *buf, size_t count)
+{
+    unsigned char data;
+
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(SYS_LED_ADDR);
+    if(sysfs_streq(buf, LED_OFF)){
+        data &= 0xCC;
+        data |= sys_led_off << 4;
+        data |= led_off;
+    }else if(sysfs_streq(buf, LED_GREEN)){
+        data &= 0xCC;
+        data |= sys_led_grn << 4;
+        data |= led_on;
+    }else if(sysfs_streq(buf, LED_AMBER)){
+        data &= 0xCC;
+        data |= sys_led_amb << 4;
+        data |= led_on;
+    }else if(sysfs_streq(buf, LED_HZ_GBNK)){
+        data &= 0xCC;
+        data |= sys_led_grn << 4;
+        data |= led_blk_1hz;
+    }else if(sysfs_streq(buf, LED_HZ_ABNK)){
+        data &= 0xCC;
+        data |= sys_led_amb << 4;
+        data |= led_blk_1hz;
+    }else if(sysfs_streq(buf, LED_QHZ_GBNK)){
+        data &= 0xCC;
+        data |= sys_led_grn << 4;
+        data |= led_blk_4hz;
+    }else if(sysfs_streq(buf, LED_QHZ_ABNK)){
+        data &= 0xCC;
+        data |= sys_led_amb << 4;
+        data |= led_blk_4hz;
+    }else if(sysfs_streq(buf, LED_HZ_GABNK)){
+        data &= 0xCC;
+        data |= sys_led_both << 4;
+        data |= led_blk_1hz;
+    }else if(sysfs_streq(buf, LED_QHZ_GABNK)){
+        data &= 0xCC;
+        data |= sys_led_both << 4;
+        data |= led_blk_4hz;
+    }else{
+        count = -EINVAL;
+    }
+
+    outb(data, SYS_LED_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    return count;
+}
+
+/**
+ * @brief          Show alarm led
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer for get value
+ * @return         led state - off/on/blink
+ */
+static ssize_t alarm_led_show(struct device *dev, struct device_attribute *devattr,
+                               char *buf)
+{
+    unsigned char data = 0;
+    unsigned char color = 0;
+    unsigned char control = 0;
+
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(ALARM_LED_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    color = (data & 0x30) >> 4;
+    control = (data & 0x3);
+
+    switch(color){
+        case alarm_led_both:
+            if ( control == led_blk_1hz){
+                return sprintf(buf, "%s\n", LED_HZ_GABNK);
+            }else if(control == led_blk_4hz){
+                return sprintf(buf, "%s\n", LED_QHZ_GABNK);
+            }else{
+                break;
+            }
+        case alarm_led_amb:
+            if ( control == led_blk_1hz){
+                return sprintf(buf, "%s\n", LED_HZ_ABNK);
+            }else if(control == led_blk_4hz){
+                return sprintf(buf, "%s\n", LED_QHZ_ABNK);
+            }else if(control == led_on){
+                return sprintf(buf, "%s\n", LED_AMBER);
+            }else{
+                break;
+            }
+        case alarm_led_grn:
+            if ( control == led_blk_1hz){
+                return sprintf(buf, "%s\n", LED_HZ_GBNK);
+            }else if(control == led_blk_4hz){
+                return sprintf(buf, "%s\n", LED_QHZ_GBNK);
+            }else if(control == led_on){
+                return sprintf(buf, "%s\n", LED_GREEN);
+            }else{
+                break;
+            }
+        default:
+            break;
+    }
+
+    return sprintf(buf, "%s\n", LED_OFF);
+}
+
+/**
+ * @brief          Set the alarm led
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer of set value - off/on/blink
+ * @param  count   number of bytes in buffer
+ * @return         number of bytes written, or error code < 0.
+ */
+static ssize_t alarm_led_store(struct device *dev, struct device_attribute *devattr,
+                                const char *buf, size_t count)
+{
+    unsigned char data;
+
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(ALARM_LED_ADDR);
+    if(sysfs_streq(buf, LED_OFF)){
+        data &= 0xCC;
+        data |= alarm_led_off << 4;
+        data |= led_off;
+    }else if(sysfs_streq(buf, LED_GREEN)){
+        data &= 0xCC;
+        data |= alarm_led_grn << 4;
+        data |= led_on;
+    }else if(sysfs_streq(buf, LED_AMBER)){
+        data &= 0xCC;
+        data |= alarm_led_amb << 4;
+        data |= led_on;
+    }else if(sysfs_streq(buf, LED_HZ_GBNK)){
+        data &= 0xCC;
+        data |= alarm_led_grn << 4;
+        data |= led_blk_1hz;
+    }else if(sysfs_streq(buf, LED_HZ_ABNK)){
+        data &= 0xCC;
+        data |= alarm_led_amb << 4;
+        data |= led_blk_1hz;
+    }else if(sysfs_streq(buf, LED_QHZ_GBNK)){
+        data &= 0xCC;
+        data |= alarm_led_grn << 4;
+        data |= led_blk_4hz;
+    }else if(sysfs_streq(buf, LED_QHZ_ABNK)){
+        data &= 0xCC;
+        data |= alarm_led_amb << 4;
+        data |= led_blk_4hz;
+    }else if(sysfs_streq(buf, LED_HZ_GABNK)){
+        data &= 0xCC;
+        data |= alarm_led_both << 4;
+        data |= led_blk_1hz;
+    }else if(sysfs_streq(buf, LED_QHZ_GABNK)){
+        data &= 0xCC;
+        data |= alarm_led_both << 4;
+        data |= led_blk_4hz;
+
+    }else{
+        count = -EINVAL;
+    }
+
+    outb(data, ALARM_LED_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    return count;
+}
+
+static ssize_t pwr_led_show(struct device *dev, struct device_attribute *devattr,
+                               char *buf)
+{
+    unsigned char data = 0;
+
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(PSU_LED_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    if ((data & 0x10) != 0)
+    {
+        return sprintf(buf, "%s\n", "auto");
+    }
+    data = data & 0x3;
+    return sprintf(buf, "%s\n",
+                   data == pwr_led_grn ? "green" : data == pwr_led_amb ? "amber" : "off");
+}
+
+
+static ssize_t pwr_led_store(struct device *dev, struct device_attribute *devattr,
+                                const char *buf, size_t count)
+{
+    unsigned char led_status, data;
+
+    if (sysfs_streq(buf, "off")) {
+        led_status = pwr_led_off;
+    } else if (sysfs_streq(buf, "green")) {
+        led_status = pwr_led_grn;
+    } else if (sysfs_streq(buf, "amber")) {
+        led_status = pwr_led_amb;
+    } else if (sysfs_streq(buf, "auto")) {
+        led_status = pwr_led_auto;
+    } else {
+        count = -EINVAL;
+        return count;
+    }
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(PSU_LED_ADDR);
+    /* Set bit 4 as 0 to control pwrled by software */
+    data = data & ~(0x13);
+    data = data | led_status;
+    outb(data, PSU_LED_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    return count;
+}
+
+static ssize_t fan_led_show(struct device *dev, struct device_attribute *devattr,
+                               char *buf)
+{
+    unsigned char data = 0;
+
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(FAN_LED_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    if ((data & 0x10) != 0)
+    {
+        return sprintf(buf, "%s\n", "auto");
+    }
+    data = data & 0x3;
+    return sprintf(buf, "%s\n",
+                   data == fan_led_grn ? "green" : data == fan_led_amb ? "amber" : "off");
+}
+
+
+static ssize_t fan_led_store(struct device *dev, struct device_attribute *devattr,
+                                const char *buf, size_t count)
+{
+    unsigned char led_status, data;
+
+    if (sysfs_streq(buf, "off")) {
+        led_status = fan_led_off;
+    } else if (sysfs_streq(buf, "green")) {
+        led_status = fan_led_grn;
+    } else if (sysfs_streq(buf, "amber")) {
+        led_status = fan_led_amb;
+    } else if (sysfs_streq(buf, "auto")) {
+        led_status = fan_led_auto;
+    } else {
+        count = -EINVAL;
+        return count;
+    }
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(FAN_LED_ADDR);
+    /* Set bit 4 as 0 to control fanled by software */
+    data = data & ~(0x13);
+    data = data | led_status;
+    outb(data, FAN_LED_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    return count;
+}
+
+/* COME CPLD version attributes */
+static ssize_t come_cpld_version_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    int len = -EIO;
+    // COME CPLD register is one byte
+    mutex_lock(&cpld_data->cpld_lock);
+    len = sprintf(buf, "0x%2.2x\n",inb(COME_CPLD_VER_ADDR));
+    mutex_unlock(&cpld_data->cpld_lock);
+    return len;
+}
+
+static BIN_ATTR_RO(dump, CPLD_REGISTER_SIZE);
+static DEVICE_ATTR_RO(version);
+static DEVICE_ATTR_RW(scratch);
+static DEVICE_ATTR_RW(getreg);
+static DEVICE_ATTR_WO(setreg);
+static DEVICE_ATTR_RW(sys_led);
+static DEVICE_ATTR_RW(alarm_led);
+static DEVICE_ATTR_RW(pwr_led);
+static DEVICE_ATTR_RW(fan_led);
+static DEVICE_ATTR_RO(come_cpld_version);
+
+static struct attribute *cpld_b_attrs[] = {
+	&dev_attr_version.attr,
+	&dev_attr_scratch.attr,
+	&dev_attr_getreg.attr,
+	&dev_attr_setreg.attr,
+    &dev_attr_sys_led.attr,
+    &dev_attr_alarm_led.attr,
+    &dev_attr_pwr_led.attr,
+	&dev_attr_fan_led.attr,
+    &dev_attr_come_cpld_version.attr,
+	NULL,
+};
+
+static struct bin_attribute *cpld_b_bin_attrs[] = {
+	&bin_attr_dump,
+	NULL,
+};
+
+static struct attribute_group cpld_b_attrs_grp = {
+	.attrs = cpld_b_attrs,
+	.bin_attrs = cpld_b_bin_attrs,
+};
+
+static struct resource cpld_b_resources[] = {
+	{
+		.start  = 0xA100,
+		.end	= 0xA1FF,
+		.flags  = IORESOURCE_IO,
+	},
+};
+
+static void cpld_b_dev_release(struct device *dev)
+{
+	return;
+}
+
+static struct platform_device cpld_b_dev = {
+	.name			= DRIVER_NAME,
+	.id				= -1,
+	.num_resources	= ARRAY_SIZE(cpld_b_resources),
+	.resource		= cpld_b_resources,
+	.dev = {
+		.release = cpld_b_dev_release,
+	}
+};
+
+static int cpld_b_drv_probe(struct platform_device *pdev)
+{
+	struct resource *res;
+	int err = 0;
+
+	cpld_data = devm_kzalloc(&pdev->dev, sizeof(struct cpld_b_data),
+		GFP_KERNEL);
+	if (!cpld_data)
+		return -ENOMEM;
+
+	mutex_init(&cpld_data->cpld_lock);
+
+	cpld_data->read_addr = VERSION_ADDR;
+
+	res = platform_get_resource(pdev, IORESOURCE_IO, 0);
+	if (unlikely(!res)) {
+		dev_err(&pdev->dev, "Specified Resource Not Available...\n");
+		return -ENODEV;
+	}
+
+	err = sysfs_create_group(&pdev->dev.kobj, &cpld_b_attrs_grp);
+	if (err) {
+		dev_err(&pdev->dev, "Cannot create sysfs for baseboard CPLD\n");
+		return err;
+	}
+	return 0;
+}
+
+static int cpld_b_drv_remove(struct platform_device *pdev)
+{
+	sysfs_remove_group(&pdev->dev.kobj, &cpld_b_attrs_grp);
+	return 0;
+}
+
+static struct platform_driver cpld_b_drv = {
+	.probe  = cpld_b_drv_probe,
+	.remove = __exit_p(cpld_b_drv_remove),
+	.driver = {
+		.name   = DRIVER_NAME,
+	},
+};
+
+int cpld_b_init(void)
+{
+	// Register platform device and platform driver
+	platform_device_register(&cpld_b_dev);
+	platform_driver_register(&cpld_b_drv);
+	return 0;
+}
+
+void cpld_b_exit(void)
+{
+	// Unregister platform device and platform driver
+	platform_driver_unregister(&cpld_b_drv);
+	platform_device_unregister(&cpld_b_dev);
+}
+
+module_init(cpld_b_init);
+module_exit(cpld_b_exit);
+
+
+MODULE_AUTHOR("Celestica Inc.");
+MODULE_DESCRIPTION("LPC CPLD baseboard driver");
+MODULE_VERSION("0.0.2");
+MODULE_LICENSE("GPL");
+
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/mc24lc64t.c b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/mc24lc64t.c
new file mode 100644
index 000000000000..4603b3d41065
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/mc24lc64t.c
@@ -0,0 +1,171 @@
+/*
+ * mc24lc64t.c - driver for Microchip 24LC64T
+ *
+ * Copyright (C) 2017 Celestica Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/mutex.h>
+#include <linux/types.h>
+#include <linux/delay.h>
+#include <linux/jiffies.h>
+
+#define EEPROM_SIZE 8192  //mc24lt64t eeprom size in bytes.
+
+struct mc24lc64t_data {
+        struct mutex            update_lock;
+};
+
+static ssize_t mc24lc64t_read(struct file *filp, struct kobject *kobj,
+                            struct bin_attribute *bin_attr,
+                            char *buf, loff_t off, size_t count)
+{
+        struct i2c_client *client = kobj_to_i2c_client(kobj);
+        struct mc24lc64t_data *drvdata = i2c_get_clientdata(client);
+        unsigned long timeout, read_time, i = 0;
+        int status;
+
+        mutex_lock(&drvdata->update_lock);
+
+        if (i2c_smbus_write_byte_data(client, off>>8, off))
+        {
+                status = -EIO;
+                goto exit;
+        }
+
+        msleep(1);
+
+begin:
+
+        if (i < count)
+        {
+                timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/
+                do {
+                        read_time = jiffies;
+
+                        status = i2c_smbus_read_byte(client);
+                        if (status >= 0)
+                        {
+                                buf[i++] = status;
+                                goto begin;
+                        }
+                } while (time_before(read_time, timeout));
+
+                status = -ETIMEDOUT;
+                goto exit;
+        }
+
+        status = count;
+
+exit:
+        mutex_unlock(&drvdata->update_lock);
+
+        return status;
+}
+
+static ssize_t mc24lc64t_write (struct file *filp, struct kobject *kobj,
+                            struct bin_attribute *bin_attr,
+                            char *buf, loff_t off, size_t count){
+
+    struct i2c_client *client = kobj_to_i2c_client(kobj);
+    struct mc24lc64t_data *drvdata = i2c_get_clientdata(client);
+    unsigned long timeout, write_time, i = 0;
+    int status;
+    u16 value;
+
+    mutex_lock(&drvdata->update_lock);
+
+begin:
+    if (i < count){
+        timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/
+        value = (buf[i] << 8)| off;
+        do {
+                write_time = jiffies;
+                status = i2c_smbus_write_word_data(client, off>>8, value);
+                if (status >= 0)
+                {
+                    // increase offset
+                    off++;
+                    // increase buffer index
+                    i++;
+                    goto begin;
+                }
+        } while (time_before(write_time, timeout));
+        status = -ETIMEDOUT;
+        goto exit;
+    }
+    status = count;
+
+exit:
+    mutex_unlock(&drvdata->update_lock);
+    return status;
+}
+
+static struct bin_attribute mc24lc64t_bit_attr = {
+        .attr = {
+                .name = "eeprom",
+                .mode = S_IRUGO | S_IWUGO,
+        },
+        .size = EEPROM_SIZE,
+        .read = mc24lc64t_read,
+        .write = mc24lc64t_write,
+};
+
+static int mc24lc64t_probe(struct i2c_client *client,
+                         const struct i2c_device_id *id)
+{
+        struct i2c_adapter *adapter = client->adapter;
+        struct mc24lc64t_data *drvdata;
+        int err;
+
+        if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA
+                                     | I2C_FUNC_SMBUS_READ_BYTE))
+                return -EPFNOSUPPORT;
+
+        if (!(drvdata = devm_kzalloc(&client->dev,
+                        sizeof(struct mc24lc64t_data), GFP_KERNEL)))
+                return -ENOMEM;
+
+        i2c_set_clientdata(client, drvdata);
+        mutex_init(&drvdata->update_lock);
+
+        err = sysfs_create_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr);
+
+        return err;
+}
+
+static void mc24lc64t_remove(struct i2c_client *client)
+{
+        struct mc24lc64t_data *drvdata = i2c_get_clientdata(client);
+        sysfs_remove_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr);
+}
+
+static const struct i2c_device_id mc24lc64t_id[] = {
+        { "24lc64t", 0 },
+        { }
+};
+MODULE_DEVICE_TABLE(i2c, mc24lc64t_id);
+
+static struct i2c_driver mc24lc64t_driver = {
+        .driver = {
+                .name   = "mc24lc64t",
+                .owner = THIS_MODULE,
+        },
+        .probe          = mc24lc64t_probe,
+        .remove         = mc24lc64t_remove,
+        .id_table       = mc24lc64t_id,
+};
+
+module_i2c_driver(mc24lc64t_driver);
+
+MODULE_AUTHOR("Abhisit Sangjan <asang@celestica.com>");
+MODULE_DESCRIPTION("Microchip 24LC64T Driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pddf_custom_fpga_algo.c b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pddf_custom_fpga_algo.c
new file mode 100644
index 000000000000..32ed875df587
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pddf_custom_fpga_algo.c
@@ -0,0 +1,631 @@
+/*
+*
+* Licensed under the GNU General Public License Version 2
+*
+* This program is free software; you can redistribute it and/or modify
+* it under the terms of the GNU General Public License as published by
+* the Free Software Foundation; either version 2 of the License, or
+* (at your option) any later version.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+* GNU General Public License for more details.
+*
+*/
+
+/*
+* pddf_xilinx_device_7021_algo.c
+* Description:
+*   A sample i2c driver algorithms for Xilinx Corporation Device 7021 FPGA adapters
+*
+*********************************************************************************/
+#define __STDC_WANT_LIB_EXT1__ 1
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/delay.h>
+#include <linux/jiffies.h>
+#include <linux/errno.h>
+#include <linux/i2c.h>
+#include "../../../../pddf/i2c/modules/include/pddf_i2c_algo.h"
+
+#define DEBUG 0
+
+enum {
+    STATE_DONE = 0,
+    STATE_INIT,
+    STATE_ADDR,
+    STATE_ADDR10,
+    STATE_START,
+    STATE_WRITE,
+    STATE_READ,
+    STATE_STOP,
+    STATE_ERROR,
+};
+
+#define XIIC_MSB_OFFSET 0
+#define XIIC_REG_OFFSET (0x100 + XIIC_MSB_OFFSET)
+
+/*
+ * Register offsets in bytes from RegisterBase. Three is added to the
+ * base offset to access LSB (IBM style) of the word
+ */
+#define XIIC_CR_REG_OFFSET   (0x00 + XIIC_REG_OFFSET)	/* Control Register   */
+#define XIIC_SR_REG_OFFSET   (0x04 + XIIC_REG_OFFSET)	/* Status Register    */
+#define XIIC_DTR_REG_OFFSET  (0x08 + XIIC_REG_OFFSET)	/* Data Tx Register   */
+#define XIIC_DRR_REG_OFFSET  (0x0C + XIIC_REG_OFFSET)	/* Data Rx Register   */
+#define XIIC_ADR_REG_OFFSET  (0x10 + XIIC_REG_OFFSET)	/* Address Register   */
+#define XIIC_TFO_REG_OFFSET  (0x14 + XIIC_REG_OFFSET)	/* Tx FIFO Occupancy  */
+#define XIIC_RFO_REG_OFFSET  (0x18 + XIIC_REG_OFFSET)	/* Rx FIFO Occupancy  */
+#define XIIC_TBA_REG_OFFSET  (0x1C + XIIC_REG_OFFSET)	/* 10 Bit Address reg */
+#define XIIC_RFD_REG_OFFSET  (0x20 + XIIC_REG_OFFSET)	/* Rx FIFO Depth reg  */
+#define XIIC_GPO_REG_OFFSET  (0x24 + XIIC_REG_OFFSET)	/* Output Register    */
+
+/* Control Register masks */
+#define XIIC_CR_ENABLE_DEVICE_MASK        0x01	/* Device enable = 1      */
+#define XIIC_CR_TX_FIFO_RESET_MASK        0x02	/* Transmit FIFO reset=1  */
+#define XIIC_CR_MSMS_MASK                 0x04	/* Master starts Txing=1  */
+#define XIIC_CR_DIR_IS_TX_MASK            0x08	/* Dir of tx. Txing=1     */
+#define XIIC_CR_NO_ACK_MASK               0x10	/* Tx Ack. NO ack = 1     */
+#define XIIC_CR_REPEATED_START_MASK       0x20	/* Repeated start = 1     */
+#define XIIC_CR_GENERAL_CALL_MASK         0x40	/* Gen Call enabled = 1   */
+
+/* Status Register masks */
+#define XIIC_SR_GEN_CALL_MASK             0x01	/* 1=a mstr issued a GC   */
+#define XIIC_SR_ADDR_AS_SLAVE_MASK        0x02	/* 1=when addr as slave   */
+#define XIIC_SR_BUS_BUSY_MASK             0x04	/* 1 = bus is busy        */
+#define XIIC_SR_MSTR_RDING_SLAVE_MASK     0x08	/* 1=Dir: mstr <-- slave  */
+#define XIIC_SR_TX_FIFO_FULL_MASK         0x10	/* 1 = Tx FIFO full       */
+#define XIIC_SR_RX_FIFO_FULL_MASK         0x20	/* 1 = Rx FIFO full       */
+#define XIIC_SR_RX_FIFO_EMPTY_MASK        0x40	/* 1 = Rx FIFO empty      */
+#define XIIC_SR_TX_FIFO_EMPTY_MASK        0x80	/* 1 = Tx FIFO empty      */
+
+/* Interrupt Status Register masks    Interrupt occurs when...       */
+#define XIIC_INTR_ARB_LOST_MASK           0x01	/* 1 = arbitration lost   */
+#define XIIC_INTR_TX_ERROR_MASK           0x02	/* 1=Tx error/msg complete */
+#define XIIC_INTR_TX_EMPTY_MASK           0x04	/* 1 = Tx FIFO/reg empty  */
+#define XIIC_INTR_RX_FULL_MASK            0x08	/* 1=Rx FIFO/reg=OCY level */
+#define XIIC_INTR_BNB_MASK                0x10	/* 1 = Bus not busy       */
+#define XIIC_INTR_AAS_MASK                0x20	/* 1 = when addr as slave */
+#define XIIC_INTR_NAAS_MASK               0x40	/* 1 = not addr as slave  */
+#define XIIC_INTR_TX_HALF_MASK            0x80	/* 1 = TX FIFO half empty */
+
+/* The following constants specify the depth of the FIFOs */
+#define IIC_RX_FIFO_DEPTH         16	/* Rx fifo capacity               */
+#define IIC_TX_FIFO_DEPTH         16	/* Tx fifo capacity               */
+
+/*
+ * Tx Fifo upper bit masks.
+ */
+#define XIIC_TX_DYN_START_MASK            0x0100 /* 1 = Set dynamic start */
+#define XIIC_TX_DYN_STOP_MASK             0x0200 /* 1 = Set dynamic stop */
+
+/*
+ * The following constants define the register offsets for the Interrupt
+ * registers. There are some holes in the memory map for reserved addresses
+ * to allow other registers to be added and still match the memory map of the
+ * interrupt controller registers
+ */
+#define XIIC_IISR_OFFSET     0x20 /* Interrupt Status Register */
+#define XIIC_RESETR_OFFSET   0x40 /* Reset Register */
+
+#define XIIC_RESET_MASK             0xAUL
+
+#define XIIC_PM_TIMEOUT		1000	/* ms */
+/* timeout waiting for the controller to respond */
+#define XIIC_I2C_TIMEOUT	(msecs_to_jiffies(1000))
+
+struct fpgalogic_i2c {
+    void __iomem *base;
+    u32 reg_shift;
+    u32 reg_io_width;
+    wait_queue_head_t wait;
+    struct i2c_msg *msg;
+    int pos;
+    int nmsgs;
+    int state; /* see STATE_ */
+    int ip_clock_khz;
+    int bus_clock_khz;
+    void (*reg_set)(struct fpgalogic_i2c *i2c, int reg, u8 value);
+    u8 (*reg_get)(struct fpgalogic_i2c *i2c, int reg);
+    u32 timeout;
+    struct mutex lock;
+};
+static struct fpgalogic_i2c fpgalogic_i2c[I2C_PCI_MAX_BUS];
+extern void __iomem * fpga_ctl_addr;
+extern int (*ptr_fpgapci_read)(uint32_t);
+extern int (*ptr_fpgapci_write)(uint32_t, uint32_t);
+extern int (*pddf_i2c_pci_add_numbered_bus)(struct i2c_adapter *, int);
+static int xiic_reinit(struct fpgalogic_i2c *i2c);
+
+void i2c_get_mutex(struct fpgalogic_i2c *i2c)
+{
+    mutex_lock(&i2c->lock);
+}
+
+/**
+ * i2c_release_mutex - release mutex
+ */
+void i2c_release_mutex(struct fpgalogic_i2c *i2c)
+{
+    mutex_unlock(&i2c->lock);
+}
+
+static inline void xiic_setreg32(struct fpgalogic_i2c *i2c, int reg, int value)
+{
+	(void)iowrite32(value, i2c->base + reg);
+}
+
+static inline int xiic_getreg32(struct fpgalogic_i2c *i2c, int reg)
+{
+	u32 ret;
+
+	ret = ioread32(i2c->base + reg);
+	
+	return ret;
+}
+
+static inline void xiic_irq_clr(struct fpgalogic_i2c *i2c, u32 mask)
+{
+	u32 isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET);
+
+	xiic_setreg32(i2c, XIIC_IISR_OFFSET, isr & mask);
+}
+
+static int xiic_clear_rx_fifo(struct fpgalogic_i2c *i2c)
+{
+	u8 sr;
+	unsigned long timeout;
+
+	timeout = jiffies + XIIC_I2C_TIMEOUT;
+	for (sr = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET);
+		!(sr & XIIC_SR_RX_FIFO_EMPTY_MASK);
+		sr = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET)) {
+		xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET);
+		if (time_after(jiffies, timeout)) {
+			printk("Failed to clear rx fifo\n");
+			return -ETIMEDOUT;
+		}
+	}
+
+	return 0;
+}
+
+/**
+ * Wait until something change in a given register
+ * @i2c: ocores I2C device instance
+ * @reg: register to query
+ * @mask: bitmask to apply on register value
+ * @val: expected result
+ * @timeout: timeout in jiffies
+ *
+ * Timeout is necessary to avoid to stay here forever when the chip
+ * does not answer correctly.
+ *
+ * Return: 0 on success, -ETIMEDOUT on timeout
+ */
+static int poll_wait(struct fpgalogic_i2c *i2c,
+		       int reg, u8 mask, u8 val,
+		       const unsigned long timeout)
+{
+	unsigned long j;
+	u8 status = 0;
+
+	j = jiffies + timeout;
+	while (1) {
+		mutex_lock(&i2c->lock);
+		status = xiic_getreg32(i2c, reg);
+		mutex_unlock(&i2c->lock);
+		if ((status & mask) == val)
+			break;
+		if (time_after(jiffies, j))
+			return -ETIMEDOUT;
+                cpu_relax();
+                cond_resched();		
+	}
+	return 0;
+}
+
+/**
+ * Wait until is possible to process some data
+ * @i2c: ocores I2C device instance
+ *
+ * Used when the device is in polling mode (interrupts disabled).
+ *
+ * Return: 0 on success, -ETIMEDOUT on timeout
+ */
+static int ocores_poll_wait(struct fpgalogic_i2c *i2c)
+{
+	u8 mask = 0, status = 0;
+	int err = 0;
+	int val = 0;
+	int tmp = 0;
+	mutex_lock(&i2c->lock);
+	if (i2c->state == STATE_DONE) {
+		/* transfer is over */
+		mask = XIIC_SR_BUS_BUSY_MASK;
+	} else if (i2c->state == STATE_WRITE || i2c->state == STATE_START){
+		/* on going transfer */
+		if (0 == i2c->msg->len){
+			mask = XIIC_INTR_TX_ERROR_MASK;
+		} else {
+			mask = XIIC_SR_TX_FIFO_FULL_MASK;
+		}
+	}
+	else if (i2c->state == STATE_READ){
+		/* on going receive */
+		mask = XIIC_SR_TX_FIFO_EMPTY_MASK | XIIC_SR_RX_FIFO_EMPTY_MASK;
+	}
+	mutex_unlock(&i2c->lock);
+	// printk("Wait for: 0x%x\n", mask);
+
+	/*
+	 * once we are here we expect to get the expected result immediately
+	 * so if after 50ms we timeout then something is broken.
+	 */
+	
+	if (1 == i2c->nmsgs && 0 == i2c->msg->len && i2c->state == STATE_START && !(i2c->msg->flags & I2C_M_RD)) { 	/* for i2cdetect I2C_SMBUS_QUICK mode*/
+		err = poll_wait(i2c, XIIC_IISR_OFFSET, mask, mask, msecs_to_jiffies(50));
+		mutex_lock(&i2c->lock);
+		status = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET);
+		mutex_unlock(&i2c->lock);
+		if (0 != err) { /* AXI IIC as an transceiver , if ever an XIIC_INTR_TX_ERROR_MASK interrupt happens, means no such i2c device */
+			err = 0;
+		} else {
+			err = -ETIMEDOUT;
+		}
+	}
+	else {
+		if (mask & XIIC_SR_TX_FIFO_EMPTY_MASK){
+			err = poll_wait(i2c, XIIC_SR_REG_OFFSET, mask, XIIC_SR_TX_FIFO_EMPTY_MASK, msecs_to_jiffies(50));
+			mask &= ~XIIC_SR_TX_FIFO_EMPTY_MASK;
+		}
+		if (0 == err){
+			err = poll_wait(i2c, XIIC_SR_REG_OFFSET, mask, 0, msecs_to_jiffies(50));
+		}
+		mutex_lock(&i2c->lock);
+		status = xiic_getreg32(i2c, XIIC_IISR_OFFSET);	
+		
+		if ((status & XIIC_INTR_ARB_LOST_MASK) ||
+			((status & XIIC_INTR_TX_ERROR_MASK) &&
+			!(status & XIIC_INTR_RX_FULL_MASK) &&
+			!(i2c->msg->flags & I2C_M_RD))) {  /* AXI IIC as an transceiver , if ever an XIIC_INTR_TX_ERROR_MASK interrupt happens, return */
+			err = -ETIMEDOUT;
+			
+			if (status & XIIC_INTR_ARB_LOST_MASK) {
+				val = xiic_getreg32(i2c, XIIC_CR_REG_OFFSET);
+				tmp = XIIC_CR_MSMS_MASK;
+				val &=(~tmp);
+				xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, val);
+				xiic_setreg32(i2c, XIIC_IISR_OFFSET, XIIC_INTR_ARB_LOST_MASK);
+				printk("%s: TRANSFER STATUS ERROR, ISR: bit 0x%x happens\n",
+					 __func__, XIIC_INTR_ARB_LOST_MASK);
+			} 
+			if (status & XIIC_INTR_TX_ERROR_MASK) {
+				int sta = 0;
+				int cr = 0;
+				sta = xiic_getreg32(i2c,XIIC_SR_REG_OFFSET);
+				cr = xiic_getreg32(i2c,XIIC_CR_REG_OFFSET);
+				xiic_setreg32(i2c, XIIC_IISR_OFFSET, XIIC_INTR_TX_ERROR_MASK);
+				printk("%s: TRANSFER STATUS ERROR, ISR: bit 0x%x happens; SR: bit 0x%x; CR: bit 0x%x\n",
+					 __func__, status, sta, cr);
+			}
+			/* Soft reset IIC controller. */
+			xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK);
+			(void)xiic_reinit(i2c);
+			mutex_unlock(&i2c->lock);
+			return err;
+		}
+		mutex_unlock(&i2c->lock);
+	}
+	
+	return err;
+}
+
+static void ocores_process(struct fpgalogic_i2c *i2c)
+{
+	struct i2c_msg *msg = i2c->msg;
+	//unsigned long flags;
+	u16 val;
+
+	/*
+	 * If we spin here because we are in timeout, so we are going
+	 * to be in STATE_ERROR. See ocores_process_timeout()
+	 */
+	mutex_lock(&i2c->lock);
+	// printk("STATE: %d\n", i2c->state);
+
+	if (i2c->state == STATE_START) {
+		i2c->state =(msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE;
+		/* if it's the time sequence is 'start bit + address + read bit + stop bit' */
+		if (i2c->state == STATE_READ){
+			/* it's the last message so we include dynamic stop bit with length */
+			val = msg->len | XIIC_TX_DYN_STOP_MASK;
+			xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, val);
+			goto out;
+		}
+	}
+	if (i2c->state == STATE_READ){
+                /* suit for I2C_FUNC_SMBUS_BLOCK_DATA */
+                if (msg->flags & I2C_M_RECV_LEN) {
+                        msg->len = xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET);
+                        msg->flags &= ~I2C_M_RECV_LEN;
+                        msg->buf[i2c->pos++] = msg->len;
+                }
+                else {
+                        msg->buf[i2c->pos++] = xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET);
+                }
+	} else if (i2c->state == STATE_WRITE){
+		/* if it reaches the last byte data to be sent */
+		if ((i2c->pos == msg->len - 1) && (i2c->nmsgs == 1)){
+			val = msg->buf[i2c->pos++] | XIIC_TX_DYN_STOP_MASK;
+			xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, val);
+			i2c->state = STATE_DONE;
+			goto out;
+		/* if it is not the last byte data to be sent */
+		} else if (i2c->pos < msg->len) {
+			xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, msg->buf[i2c->pos++]);
+			goto out;
+		}
+	}
+
+	/* end of msg? */
+	if (i2c->pos == msg->len) {
+		i2c->nmsgs--;
+		i2c->pos = 0;
+		if (i2c->nmsgs) {
+			i2c->msg++;
+			msg = i2c->msg;	
+			if (!(msg->flags & I2C_M_NOSTART)) /* send start? */{
+				i2c->state = STATE_START;			
+				xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msg) | XIIC_TX_DYN_START_MASK);
+				goto out;
+			}
+		} else {	/* end? */
+			i2c->state = STATE_DONE;
+			goto out;
+		}
+	}
+
+out:
+	mutex_unlock(&i2c->lock);
+	return ;
+}
+
+
+static int fpgai2c_poll(struct fpgalogic_i2c *i2c,
+			                  struct i2c_msg *msgs, int num)
+{
+	int ret = 0;
+	// u8 ctrl;
+	
+	mutex_lock(&i2c->lock);
+	/* Soft reset IIC controller. */
+	xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK);
+	/* Set receive Fifo depth to maximum (zero based). */
+	xiic_setreg32(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1);
+		
+	/* Reset Tx Fifo. */
+	xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK);
+	
+	/* Enable IIC Device, remove Tx Fifo reset & disable general call. */
+	xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_ENABLE_DEVICE_MASK);
+	
+	/* set i2c clock as 100Hz. */
+	//xiic_setreg32(i2c, 0x13c, 0x7C);
+	
+	/* make sure RX fifo is empty */
+	ret = xiic_clear_rx_fifo(i2c);
+	if (ret){
+		mutex_unlock(&i2c->lock);
+		return ret;
+	}
+	
+	i2c->msg = msgs;
+	i2c->pos = 0;
+	i2c->nmsgs = num;
+	i2c->state = STATE_START;
+
+	// printk("STATE: %d\n", i2c->state);
+	
+	if (msgs->len == 0 && num == 1){ /* suit for i2cdetect time sequence */
+		u8 status = xiic_getreg32(i2c, XIIC_IISR_OFFSET);
+		xiic_irq_clr(i2c, status);
+		/* send out the 1st byte data and stop bit */
+		xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msgs) | XIIC_TX_DYN_START_MASK | XIIC_TX_DYN_STOP_MASK);
+	} else {
+		/* send out the 1st byte data */
+		xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msgs) | XIIC_TX_DYN_START_MASK);
+	}
+	mutex_unlock(&i2c->lock);
+	while (1) {
+		int err;
+		
+		err = ocores_poll_wait(i2c);
+		if (err) {
+			i2c->state = STATE_ERROR;
+			break;
+		}else if (i2c->state == STATE_DONE){
+			break;
+		}
+		ocores_process(i2c);
+	}
+
+	return (i2c->state == STATE_DONE) ? num : -EIO;
+}
+
+static int fpgai2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
+{
+    struct fpgalogic_i2c *i2c = i2c_get_adapdata(adap);
+    int err = -EIO;
+	u8 retry = 0, max_retry = 0;
+
+	if( ( (1 == msgs->len && (msgs->flags & I2C_M_RD)) || (0 == msgs->len && !(msgs->flags & I2C_M_RD)) ) && num == 1 ) /* I2C_SMBUS_QUICK or I2C_SMBUS_BYTE */
+		max_retry = 1;
+	else
+		max_retry = 5;  // retry 5 times if receive a NACK or other errors
+	while( (-EIO == err) && (retry < max_retry))
+	{
+		err = fpgai2c_poll(i2c, msgs, num);
+		retry++;
+	}
+
+     return err;
+
+}
+
+static u32 fpgai2c_func(struct i2c_adapter *adap)
+{
+/* a typical full-I2C adapter would use the following  */
+    return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
+}
+
+static const struct i2c_algorithm fpgai2c_algorithm= {
+    .master_xfer = fpgai2c_xfer, /*write I2C messages */
+    .functionality = fpgai2c_func, /* what the adapter supports */
+};
+
+static int xiic_reinit(struct fpgalogic_i2c *i2c)
+{
+	int ret;
+	int val = 0;
+	
+	/* Soft reset IIC controller. */
+	xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK);
+	
+	/* Set receive Fifo depth to maximum (zero based). */
+	xiic_setreg32(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1);
+
+	/* Reset Tx Fifo. */
+	xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK);
+
+	/* Enable IIC Device, remove Tx Fifo reset & disable general call. */
+	val |= XIIC_CR_ENABLE_DEVICE_MASK;
+	//val |= XIIC_CR_TX_FIFO_RESET_MASK;
+	//val |= XIIC_CR_MSMS_MASK;
+	val |= XIIC_CR_DIR_IS_TX_MASK;
+	xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, val);
+
+	/* make sure RX fifo is empty */
+	ret = xiic_clear_rx_fifo(i2c);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static int fpgai2c_init(struct fpgalogic_i2c *i2c)
+{
+    // int prescale;
+    // int diff;
+    // u8 ctrl;
+	int ret;
+
+	
+    //i2c->reg_set = xiic_setreg32;
+    //i2c->reg_get = xiic_getreg32;
+	
+	ret = xiic_reinit(i2c);
+	if (ret < 0) {
+		printk("Cannot xiic_reinit\n");
+		return ret;
+	}
+
+    /* Initialize interrupt handlers if not already done */
+    init_waitqueue_head(&i2c->wait);
+    return 0;
+}
+
+static int adap_data_init(struct i2c_adapter *adap, int i2c_ch_index)
+{
+    struct fpgapci_devdata *pci_privdata = 0;
+    pci_privdata = (struct fpgapci_devdata*) dev_get_drvdata(adap->dev.parent);
+
+    if (pci_privdata == 0) {
+        printk("[%s]: ERROR pci_privdata is 0\n", __FUNCTION__);
+        return -1;
+    }
+#if DEBUG
+    pddf_dbg(FPGA, KERN_INFO "[%s] index: [%d] fpga_data__base_addr:0x%0x8lx"
+        " fpgapci_bar_len:0x%08lx fpga_i2c_ch_base_addr:0x%08lx ch_size=0x%x supported_i2c_ch=%d",
+             __FUNCTION__, i2c_ch_index, pci_privdata->fpga_data_base_addr,
+            pci_privdata->bar_length, pci_privdata->fpga_i2c_ch_base_addr,
+            pci_privdata->fpga_i2c_ch_size, pci_privdata->max_fpga_i2c_ch);
+#endif
+    if (i2c_ch_index >= pci_privdata->max_fpga_i2c_ch || pci_privdata->max_fpga_i2c_ch > I2C_PCI_MAX_BUS) {
+        printk("[%s]: ERROR i2c_ch_index=%d max_ch_index=%d out of range: %d\n",
+             __FUNCTION__, i2c_ch_index, pci_privdata->max_fpga_i2c_ch, I2C_PCI_MAX_BUS);
+        return -1;
+    }
+#ifdef __STDC_LIB_EXT1__
+    memset_s(&fpgalogic_i2c[i2c_ch_index], sizeof(fpgalogic_i2c[0]), 0, sizeof(fpgalogic_i2c[0]));
+#else
+    memset(&fpgalogic_i2c[i2c_ch_index], 0, sizeof(fpgalogic_i2c[0]));
+#endif
+   
+    fpgalogic_i2c[i2c_ch_index].base = pci_privdata->fpga_i2c_ch_base_addr +
+                          i2c_ch_index* pci_privdata->fpga_i2c_ch_size;
+    mutex_init(&fpgalogic_i2c[i2c_ch_index].lock);
+    fpgai2c_init(&fpgalogic_i2c[i2c_ch_index]);
+
+
+    adap->algo_data = &fpgalogic_i2c[i2c_ch_index];
+    i2c_set_adapdata(adap, &fpgalogic_i2c[i2c_ch_index]);
+    return 0;
+}
+
+static int pddf_i2c_pci_add_numbered_bus_default (struct i2c_adapter *adap, int i2c_ch_index)
+{
+    int ret = 0;
+
+    adap_data_init(adap, i2c_ch_index);
+    adap->algo = &fpgai2c_algorithm;
+
+    ret = i2c_add_numbered_adapter(adap);
+    return ret;
+}
+
+/*
+ * FPGAPCI APIs
+ */
+int board_i2c_fpgapci_read(uint32_t offset)
+{
+	int data;
+	data=ioread32(fpga_ctl_addr+offset);
+	return data;
+}
+
+
+int board_i2c_fpgapci_write(uint32_t offset, uint32_t value)
+{
+	iowrite32(value, fpga_ctl_addr+offset);
+	return (0);
+}
+
+
+static int __init pddf_xilinx_device_7021_algo_init(void)
+{
+    pddf_dbg(FPGA, KERN_INFO "[%s]\n", __FUNCTION__);
+    pddf_i2c_pci_add_numbered_bus = pddf_i2c_pci_add_numbered_bus_default;
+    ptr_fpgapci_read = board_i2c_fpgapci_read;
+    ptr_fpgapci_write = board_i2c_fpgapci_write;
+    return 0;
+}
+
+static void __exit pddf_xilinx_device_7021_algo_exit(void)
+{
+    pddf_dbg(FPGA, KERN_INFO "[%s]\n", __FUNCTION__);
+
+    pddf_i2c_pci_add_numbered_bus = NULL;
+    ptr_fpgapci_read = NULL;
+    ptr_fpgapci_write = NULL;
+    return;
+}
+
+
+module_init (pddf_xilinx_device_7021_algo_init);
+module_exit (pddf_xilinx_device_7021_algo_exit);
+MODULE_DESCRIPTION("Xilinx Corporation Device 7021 FPGAPCIe I2C-Bus algorithm");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pddf_custom_fpga_extend.c b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pddf_custom_fpga_extend.c
new file mode 100644
index 000000000000..4ea09f09404f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pddf_custom_fpga_extend.c
@@ -0,0 +1,372 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * fpga-cls.c - front panel port control.
+ *
+ * Copyright (C) 2019 Celestica Corp.
+ */
+
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/spinlock.h>
+#include <linux/acpi.h>
+#include "../../../../pddf/i2c/modules/include/pddf_i2c_algo.h"
+
+#define FPGA_VERSION_ADDR            0x0000
+#define FPGA_SCRATCH_ADDR            0x0004
+#define FPGA_BCM_TEMP_ADDR           0x001c
+#define FPGA_BCM_TEMP_LOW_ADDR       0x0078
+#define FPGA_BCM_TEMP_HIGH_ADDR      0x0080
+#define FPGA_REG_SPACE_SIZE          0x2000
+
+
+/*
+ * fpga_priv - port fpga private data
+ * @dev: device for reference
+ * @base: virtual base address
+ * @num_ports: number of front panel ports
+ * @fp_devs: list of front panel port devices
+ */
+struct fpga_priv {
+	void __iomem *base;
+	struct mutex fpga_lock;         // For FPGA internal lock
+	void __iomem * fpga_read_addr;
+};
+
+extern void __iomem * fpga_ctl_addr;
+
+/**
+ * Show the value of the register set by 'set_fpga_reg_address'
+ * If the address is not set by 'set_fpga_reg_address' first,
+ * The version register is selected by default.
+ * @param  buf     register value in hextring
+ * @return         number of bytes read, or an error code
+ */
+static ssize_t get_fpga_reg_value(struct device *dev, struct device_attribute *devattr,
+                                  char *buf)
+{
+    // read data from the address
+    uint32_t data;
+    struct fpga_priv *fpga = dev_get_drvdata(dev);
+
+    data = ioread32(fpga->fpga_read_addr);
+    return sprintf(buf, "0x%8.8x\n", data);
+}
+/**
+ * Store the register address
+ * @param  buf     address wanted to be read value of
+ * @return         number of bytes stored, or an error code
+ */
+static ssize_t set_fpga_reg_address(struct device *dev, struct device_attribute *devattr,
+                                    const char *buf, size_t count)
+{
+    uint32_t addr;
+    char *last;
+	struct fpga_priv *fpga = dev_get_drvdata(dev);
+
+    addr = (uint32_t)strtoul(buf, &last, 16);
+    if (addr == 0 && buf == last) {
+        return -EINVAL;
+    }
+    fpga->fpga_read_addr = fpga->base + addr;
+    return count;
+}
+/**
+ * Show value of fpga scratch register
+ * @param  buf     register value in hexstring
+ * @return         number of bytes read, or an error code
+ */
+static ssize_t get_fpga_scratch(struct device *dev, struct device_attribute *devattr,
+                                char *buf)
+{
+	struct fpga_priv *fpga = dev_get_drvdata(dev);
+
+    return sprintf(buf, "0x%8.8x\n", ioread32(fpga->base + FPGA_SCRATCH_ADDR) & 0xffffffff);
+}
+/**
+ * Store value of fpga scratch register
+ * @param  buf     scratch register value passing from user space
+ * @return         number of bytes stored, or an error code
+ */
+static ssize_t set_fpga_scratch(struct device *dev, struct device_attribute *devattr,
+                                const char *buf, size_t count)
+{
+    uint32_t data;
+    char *last;
+	struct fpga_priv *fpga = dev_get_drvdata(dev);
+
+    data = (uint32_t)strtoul(buf, &last, 16);
+    if (data == 0 && buf == last) {
+        return -EINVAL;
+    }
+    iowrite32(data, fpga->base + FPGA_SCRATCH_ADDR);
+    return count;
+}
+
+/**
+ * Show value of fpga version register
+ * @param  buf     register value in hexstring
+ * @return         number of bytes read, or an error code
+ */
+static ssize_t get_fpga_version(struct device *dev, struct device_attribute *devattr,
+                                char *buf)
+{
+	struct fpga_priv *fpga = dev_get_drvdata(dev);
+
+    return sprintf(buf, "0x%8.8x\n", ioread32(fpga->base + FPGA_VERSION_ADDR) & 0xffffffff);
+}
+
+
+/**
+ * Store a value in a specific register address
+ * @param  buf     the value and address in format '0xhhhh 0xhhhhhhhh'
+ * @return         number of bytes sent by user space, or an error code
+ */
+static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *devattr,
+                                  const char *buf, size_t count)
+{
+    // register are 4 bytes
+    uint32_t addr;
+    uint32_t value;
+    uint32_t mode = 8;
+    char *tok;
+    char clone[count];
+    char *pclone = clone;
+    char *last;
+	struct fpga_priv *fpga = dev_get_drvdata(dev);
+
+    strscpy(clone, buf, count);
+    mutex_lock(&fpga->fpga_lock);
+    tok = strsep((char**)&pclone, " ");
+    if (tok == NULL) {
+        mutex_unlock(&fpga->fpga_lock);
+        return -EINVAL;
+    }
+    addr = (uint32_t)strtoul(tok, &last, 16);
+    if (addr == 0 && tok == last) {
+        mutex_unlock(&fpga->fpga_lock);
+        return -EINVAL;
+    }
+    tok = strsep((char**)&pclone, " ");
+    if (tok == NULL) {
+        mutex_unlock(&fpga->fpga_lock);
+        return -EINVAL;
+    }
+    value = (uint32_t)strtoul(tok, &last, 16);
+    if (value == 0 && tok == last) {
+        mutex_unlock(&fpga->fpga_lock);
+        return -EINVAL;
+    }
+    tok = strsep((char**)&pclone, " ");
+    if (tok == NULL) {
+        mode = 32;
+    } else {
+        mode = (uint32_t)strtoul(tok, &last, 10);
+        if (mode == 0 && tok == last) {
+            mutex_unlock(&fpga->fpga_lock);
+            return -EINVAL;
+        }
+    }
+    if (mode == 32) {
+        iowrite32(value, fpga->base + addr);
+    } else if (mode == 8) {
+        iowrite8(value, fpga->base + addr);
+    } else {
+        mutex_unlock(&fpga->fpga_lock);
+        return -EINVAL;
+    }
+    mutex_unlock(&fpga->fpga_lock);
+    return count;
+}
+
+/**
+ * Read all FPGA  register in binary mode.
+ * @param  buf   Raw transceivers port startus and control register values
+ * @return       number of bytes read, or an error code
+ */
+static ssize_t dump_read(struct file *filp, struct kobject *kobj,
+                         struct bin_attribute *attr, char *buf,
+                         loff_t off, size_t count)
+{
+    unsigned long i = 0;
+    ssize_t status;
+    u8 read_reg;
+	struct device *dev = kobj_to_dev(kobj);
+	struct fpga_priv *fpga = dev_get_drvdata(dev);
+
+    if ( off + count > FPGA_REG_SPACE_SIZE ) {
+        return -EINVAL;
+    }
+    mutex_lock(&fpga->fpga_lock);
+    while (i < count) {
+        read_reg = ioread8(fpga->base + off + i);
+        buf[i++] = read_reg;
+    }
+    status = count;
+    mutex_unlock(&fpga->fpga_lock);
+    return status;
+}
+
+/**
+ * Show value of fpga bcm switch internal temp sensor register calculated by FPGA
+ * @param  buf     register value in hexstring
+ * @return         number of bytes read, or an error code
+ */
+static ssize_t get_fpga_bcm_temp_fpga(struct device *dev, struct device_attribute *devattr,
+                                char *buf)
+{
+    struct fpga_priv *fpga = dev_get_drvdata(dev);
+    uint32_t reg_val = ioread32(fpga->base + FPGA_BCM_TEMP_ADDR) & 0x3ffff;
+
+    return sprintf(buf, "0x%08x\n", reg_val);
+}
+
+/**
+ * Show value of fpga bcm switch internal temp sensor register
+ * @param  buf     register value in hexstring
+ * @return         number of bytes read, or an error code
+ */
+static ssize_t get_fpga_bcm_temp(struct device *dev, struct device_attribute *devattr,
+                                char *buf)
+{
+    struct fpga_priv *fpga = dev_get_drvdata(dev);
+    u8 low_byte = ioread32(fpga->base + FPGA_BCM_TEMP_LOW_ADDR) & 0xff;
+    u8 high_byte = ioread32(fpga->base + FPGA_BCM_TEMP_HIGH_ADDR) & 0xff;
+
+    return sprintf(buf, "0x%02x%02x\n", high_byte, low_byte);
+}
+
+/* FPGA attributes */
+static DEVICE_ATTR( getreg, 0600, get_fpga_reg_value, set_fpga_reg_address);
+static DEVICE_ATTR( setreg, 0200, NULL , set_fpga_reg_value);
+static DEVICE_ATTR( scratch, 0600, get_fpga_scratch, set_fpga_scratch);
+static DEVICE_ATTR( version, 0400, get_fpga_version, NULL);
+static DEVICE_ATTR( bcm_temp_fpga, 0400, get_fpga_bcm_temp_fpga, NULL);
+static DEVICE_ATTR( bcm_temp, 0400, get_fpga_bcm_temp, NULL);
+static BIN_ATTR_RO( dump, FPGA_REG_SPACE_SIZE);
+
+static struct bin_attribute *fpga_bin_attrs[] = {
+    &bin_attr_dump,
+    NULL,
+};
+
+static struct attribute *fpga_attrs[] = {
+    &dev_attr_getreg.attr,
+    &dev_attr_scratch.attr,
+    &dev_attr_version.attr,
+    &dev_attr_bcm_temp_fpga.attr,
+    &dev_attr_bcm_temp.attr,
+    &dev_attr_setreg.attr,
+    NULL,
+};
+
+static struct attribute_group fpga_attr_grp = {
+    .attrs = fpga_attrs,
+    .bin_attrs = fpga_bin_attrs,
+};
+
+
+static int cls_fpga_probe(struct platform_device *pdev)
+{
+	struct fpga_priv *fpga;
+	int ret = -ENOMEM;
+
+	if (!fpga_ctl_addr){
+	    printk(KERN_WARNING, "fpga_ctl_addr is null");
+	    return ret;
+	}
+
+	fpga = devm_kzalloc(&pdev->dev, sizeof(struct fpga_priv), GFP_KERNEL);
+	if (!fpga){
+		ret = -ENOMEM;
+		goto err_exit;
+	}
+
+	mutex_init(&fpga->fpga_lock);
+	dev_set_drvdata(&pdev->dev, fpga);
+	fpga->base = fpga_ctl_addr;
+
+	printk("FPGA version: 0x%x\n", ioread32(fpga->base + FPGA_VERSION_ADDR));
+
+    ret = sysfs_create_group(&pdev->dev.kobj, &fpga_attr_grp);
+    if (ret != 0) {
+        printk(KERN_ERR "Cannot create FPGA system sysfs attributes\n");
+        goto err_remove_fpga;
+    }
+
+    return 0;
+
+err_remove_fpga:
+	sysfs_remove_group(&pdev->dev.kobj, &fpga_attr_grp);
+mem_unmap:
+	iounmap(fpga->base);
+err_exit:
+	return ret;
+}
+
+static int cls_fpga_remove(struct platform_device *pdev)
+{
+	struct fpga_priv *fpga = dev_get_drvdata(&pdev->dev);
+
+	sysfs_remove_group(&pdev->dev.kobj, &fpga_attr_grp);
+	iounmap(fpga->base);
+	return 0;
+}
+
+static void fpga_dev_release( struct device * dev)
+{
+    return;
+}
+static struct resource cls_fpga_resources[] = {
+    {
+	.start = NULL,
+        .end = NULL,
+	.flags = IORESOURCE_IO,
+    },
+};
+
+static struct platform_device cls_fpga_dev = {
+    .name           = "fpga_sysfs",
+    .id             = -1,
+    .num_resources  = ARRAY_SIZE(cls_fpga_resources),
+    .resource       = cls_fpga_resources,
+    .dev = {
+        .release = fpga_dev_release,
+    }
+};
+
+static struct platform_driver cls_fpga_driver = {
+	.probe = cls_fpga_probe,
+	.remove = cls_fpga_remove,
+	.driver = {
+		.name = "fpga_sysfs",
+	},
+};
+
+static int __init drv_init(void)
+{
+	int rc = 0;
+
+	rc = platform_device_register(&cls_fpga_dev);
+	rc += platform_driver_register(&cls_fpga_driver);
+	printk("fpga drv_init:%d\n", rc);
+	return rc;
+}
+
+static void __exit drv_exit(void)
+{
+    platform_driver_unregister(&cls_fpga_driver);
+    platform_device_unregister(&cls_fpga_dev);
+    printk("fpga drv_exit.\n");
+}
+
+module_init(drv_init);
+module_exit(drv_exit);
+
+MODULE_AUTHOR("Nicholas Wu<nicwu@celestica.com>");
+MODULE_DESCRIPTION("Celestica fpga access/control driver");
+MODULE_VERSION("2.0.0");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:cls-fpga");
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pmbus.h b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pmbus.h
new file mode 100644
index 000000000000..cb6dbe29c0bf
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/pmbus.h
@@ -0,0 +1,504 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * pmbus.h - Common defines and structures for PMBus devices
+ *
+ * Copyright (c) 2010, 2011 Ericsson AB.
+ * Copyright (c) 2012 Guenter Roeck
+ */
+
+#ifndef PMBUS_H
+#define PMBUS_H
+
+#include <linux/bitops.h>
+#include <linux/regulator/driver.h>
+
+/*
+ * Registers
+ */
+enum pmbus_regs {
+	PMBUS_PAGE			= 0x00,
+	PMBUS_OPERATION			= 0x01,
+	PMBUS_ON_OFF_CONFIG		= 0x02,
+	PMBUS_CLEAR_FAULTS		= 0x03,
+	PMBUS_PHASE			= 0x04,
+
+	PMBUS_WRITE_PROTECT		= 0x10,
+
+	PMBUS_CAPABILITY		= 0x19,
+	PMBUS_QUERY			= 0x1A,
+
+	PMBUS_VOUT_MODE			= 0x20,
+	PMBUS_VOUT_COMMAND		= 0x21,
+	PMBUS_VOUT_TRIM			= 0x22,
+	PMBUS_VOUT_CAL_OFFSET		= 0x23,
+	PMBUS_VOUT_MAX			= 0x24,
+	PMBUS_VOUT_MARGIN_HIGH		= 0x25,
+	PMBUS_VOUT_MARGIN_LOW		= 0x26,
+	PMBUS_VOUT_TRANSITION_RATE	= 0x27,
+	PMBUS_VOUT_DROOP		= 0x28,
+	PMBUS_VOUT_SCALE_LOOP		= 0x29,
+	PMBUS_VOUT_SCALE_MONITOR	= 0x2A,
+
+	PMBUS_COEFFICIENTS		= 0x30,
+	PMBUS_POUT_MAX			= 0x31,
+
+	PMBUS_FAN_CONFIG_12		= 0x3A,
+	PMBUS_FAN_COMMAND_1		= 0x3B,
+	PMBUS_FAN_COMMAND_2		= 0x3C,
+	PMBUS_FAN_CONFIG_34		= 0x3D,
+	PMBUS_FAN_COMMAND_3		= 0x3E,
+	PMBUS_FAN_COMMAND_4		= 0x3F,
+
+	PMBUS_VOUT_OV_FAULT_LIMIT	= 0x40,
+	PMBUS_VOUT_OV_FAULT_RESPONSE	= 0x41,
+	PMBUS_VOUT_OV_WARN_LIMIT	= 0x42,
+	PMBUS_VOUT_UV_WARN_LIMIT	= 0x43,
+	PMBUS_VOUT_UV_FAULT_LIMIT	= 0x44,
+	PMBUS_VOUT_UV_FAULT_RESPONSE	= 0x45,
+	PMBUS_IOUT_OC_FAULT_LIMIT	= 0x46,
+	PMBUS_IOUT_OC_FAULT_RESPONSE	= 0x47,
+	PMBUS_IOUT_OC_LV_FAULT_LIMIT	= 0x48,
+	PMBUS_IOUT_OC_LV_FAULT_RESPONSE	= 0x49,
+	PMBUS_IOUT_OC_WARN_LIMIT	= 0x4A,
+	PMBUS_IOUT_UC_FAULT_LIMIT	= 0x4B,
+	PMBUS_IOUT_UC_FAULT_RESPONSE	= 0x4C,
+
+	PMBUS_OT_FAULT_LIMIT		= 0x4F,
+	PMBUS_OT_FAULT_RESPONSE		= 0x50,
+	PMBUS_OT_WARN_LIMIT		= 0x51,
+	PMBUS_UT_WARN_LIMIT		= 0x52,
+	PMBUS_UT_FAULT_LIMIT		= 0x53,
+	PMBUS_UT_FAULT_RESPONSE		= 0x54,
+	PMBUS_VIN_OV_FAULT_LIMIT	= 0x55,
+	PMBUS_VIN_OV_FAULT_RESPONSE	= 0x56,
+	PMBUS_VIN_OV_WARN_LIMIT		= 0x57,
+	PMBUS_VIN_UV_WARN_LIMIT		= 0x58,
+	PMBUS_VIN_UV_FAULT_LIMIT	= 0x59,
+
+	PMBUS_IIN_OC_FAULT_LIMIT	= 0x5B,
+	PMBUS_IIN_OC_WARN_LIMIT		= 0x5D,
+
+	PMBUS_POUT_OP_FAULT_LIMIT	= 0x68,
+	PMBUS_POUT_OP_WARN_LIMIT	= 0x6A,
+	PMBUS_PIN_OP_WARN_LIMIT		= 0x6B,
+
+	PMBUS_STATUS_BYTE		= 0x78,
+	PMBUS_STATUS_WORD		= 0x79,
+	PMBUS_STATUS_VOUT		= 0x7A,
+	PMBUS_STATUS_IOUT		= 0x7B,
+	PMBUS_STATUS_INPUT		= 0x7C,
+	PMBUS_STATUS_TEMPERATURE	= 0x7D,
+	PMBUS_STATUS_CML		= 0x7E,
+	PMBUS_STATUS_OTHER		= 0x7F,
+	PMBUS_STATUS_MFR_SPECIFIC	= 0x80,
+	PMBUS_STATUS_FAN_12		= 0x81,
+	PMBUS_STATUS_FAN_34		= 0x82,
+
+	PMBUS_READ_VIN			= 0x88,
+	PMBUS_READ_IIN			= 0x89,
+	PMBUS_READ_VCAP			= 0x8A,
+	PMBUS_READ_VOUT			= 0x8B,
+	PMBUS_READ_IOUT			= 0x8C,
+	PMBUS_READ_TEMPERATURE_1	= 0x8D,
+	PMBUS_READ_TEMPERATURE_2	= 0x8E,
+	PMBUS_READ_TEMPERATURE_3	= 0x8F,
+	PMBUS_READ_FAN_SPEED_1		= 0x90,
+	PMBUS_READ_FAN_SPEED_2		= 0x91,
+	PMBUS_READ_FAN_SPEED_3		= 0x92,
+	PMBUS_READ_FAN_SPEED_4		= 0x93,
+	PMBUS_READ_DUTY_CYCLE		= 0x94,
+	PMBUS_READ_FREQUENCY		= 0x95,
+	PMBUS_READ_POUT			= 0x96,
+	PMBUS_READ_PIN			= 0x97,
+
+	PMBUS_REVISION			= 0x98,
+	PMBUS_MFR_ID			= 0x99,
+	PMBUS_MFR_MODEL			= 0x9A,
+	PMBUS_MFR_REVISION		= 0x9B,
+	PMBUS_MFR_LOCATION		= 0x9C,
+	PMBUS_MFR_DATE			= 0x9D,
+	PMBUS_MFR_SERIAL		= 0x9E,
+
+	PMBUS_MFR_VIN_MIN		= 0xA0,
+	PMBUS_MFR_VIN_MAX		= 0xA1,
+	PMBUS_MFR_IIN_MAX		= 0xA2,
+	PMBUS_MFR_PIN_MAX		= 0xA3,
+	PMBUS_MFR_VOUT_MIN		= 0xA4,
+	PMBUS_MFR_VOUT_MAX		= 0xA5,
+	PMBUS_MFR_IOUT_MAX		= 0xA6,
+	PMBUS_MFR_POUT_MAX		= 0xA7,
+
+	PMBUS_IC_DEVICE_ID		= 0xAD,
+	PMBUS_IC_DEVICE_REV		= 0xAE,
+
+	PMBUS_MFR_MAX_TEMP_1		= 0xC0,
+	PMBUS_MFR_MAX_TEMP_2		= 0xC1,
+	PMBUS_MFR_MAX_TEMP_3		= 0xC2,
+
+/*
+ * Virtual registers.
+ * Useful to support attributes which are not supported by standard PMBus
+ * registers but exist as manufacturer specific registers on individual chips.
+ * Must be mapped to real registers in device specific code.
+ *
+ * Semantics:
+ * Virtual registers are all word size.
+ * READ registers are read-only; writes are either ignored or return an error.
+ * RESET registers are read/write. Reading reset registers returns zero
+ * (used for detection), writing any value causes the associated history to be
+ * reset.
+ * Virtual registers have to be handled in device specific driver code. Chip
+ * driver code returns non-negative register values if a virtual register is
+ * supported, or a negative error code if not. The chip driver may return
+ * -ENODATA or any other error code in this case, though an error code other
+ * than -ENODATA is handled more efficiently and thus preferred. Either case,
+ * the calling PMBus core code will abort if the chip driver returns an error
+ * code when reading or writing virtual registers.
+ */
+	PMBUS_VIRT_BASE			= 0x100,
+	PMBUS_VIRT_READ_TEMP_AVG,
+	PMBUS_VIRT_READ_TEMP_MIN,
+	PMBUS_VIRT_READ_TEMP_MAX,
+	PMBUS_VIRT_RESET_TEMP_HISTORY,
+	PMBUS_VIRT_READ_VIN_AVG,
+	PMBUS_VIRT_READ_VIN_MIN,
+	PMBUS_VIRT_READ_VIN_MAX,
+	PMBUS_VIRT_RESET_VIN_HISTORY,
+	PMBUS_VIRT_READ_IIN_AVG,
+	PMBUS_VIRT_READ_IIN_MIN,
+	PMBUS_VIRT_READ_IIN_MAX,
+	PMBUS_VIRT_RESET_IIN_HISTORY,
+	PMBUS_VIRT_READ_PIN_AVG,
+	PMBUS_VIRT_READ_PIN_MIN,
+	PMBUS_VIRT_READ_PIN_MAX,
+	PMBUS_VIRT_RESET_PIN_HISTORY,
+	PMBUS_VIRT_READ_POUT_AVG,
+	PMBUS_VIRT_READ_POUT_MIN,
+	PMBUS_VIRT_READ_POUT_MAX,
+	PMBUS_VIRT_RESET_POUT_HISTORY,
+	PMBUS_VIRT_READ_VOUT_AVG,
+	PMBUS_VIRT_READ_VOUT_MIN,
+	PMBUS_VIRT_READ_VOUT_MAX,
+	PMBUS_VIRT_RESET_VOUT_HISTORY,
+	PMBUS_VIRT_READ_IOUT_AVG,
+	PMBUS_VIRT_READ_IOUT_MIN,
+	PMBUS_VIRT_READ_IOUT_MAX,
+	PMBUS_VIRT_RESET_IOUT_HISTORY,
+	PMBUS_VIRT_READ_TEMP2_AVG,
+	PMBUS_VIRT_READ_TEMP2_MIN,
+	PMBUS_VIRT_READ_TEMP2_MAX,
+	PMBUS_VIRT_RESET_TEMP2_HISTORY,
+
+	PMBUS_VIRT_READ_VMON,
+	PMBUS_VIRT_VMON_UV_WARN_LIMIT,
+	PMBUS_VIRT_VMON_OV_WARN_LIMIT,
+	PMBUS_VIRT_VMON_UV_FAULT_LIMIT,
+	PMBUS_VIRT_VMON_OV_FAULT_LIMIT,
+	PMBUS_VIRT_STATUS_VMON,
+
+	/*
+	 * RPM and PWM Fan control
+	 *
+	 * Drivers wanting to expose PWM control must define the behaviour of
+	 * PMBUS_VIRT_PWM_[1-4] and PMBUS_VIRT_PWM_ENABLE_[1-4] in the
+	 * {read,write}_word_data callback.
+	 *
+	 * pmbus core provides a default implementation for
+	 * PMBUS_VIRT_FAN_TARGET_[1-4].
+	 *
+	 * TARGET, PWM and PWM_ENABLE members must be defined sequentially;
+	 * pmbus core uses the difference between the provided register and
+	 * it's _1 counterpart to calculate the FAN/PWM ID.
+	 */
+	PMBUS_VIRT_FAN_TARGET_1,
+	PMBUS_VIRT_FAN_TARGET_2,
+	PMBUS_VIRT_FAN_TARGET_3,
+	PMBUS_VIRT_FAN_TARGET_4,
+	PMBUS_VIRT_PWM_1,
+	PMBUS_VIRT_PWM_2,
+	PMBUS_VIRT_PWM_3,
+	PMBUS_VIRT_PWM_4,
+	PMBUS_VIRT_PWM_ENABLE_1,
+	PMBUS_VIRT_PWM_ENABLE_2,
+	PMBUS_VIRT_PWM_ENABLE_3,
+	PMBUS_VIRT_PWM_ENABLE_4,
+
+	/* Samples for average
+	 *
+	 * Drivers wanting to expose functionality for changing the number of
+	 * samples used for average values should implement support in
+	 * {read,write}_word_data callback for either PMBUS_VIRT_SAMPLES if it
+	 * applies to all types of measurements, or any number of specific
+	 * PMBUS_VIRT_*_SAMPLES registers to allow for individual control.
+	 */
+	PMBUS_VIRT_SAMPLES,
+	PMBUS_VIRT_IN_SAMPLES,
+	PMBUS_VIRT_CURR_SAMPLES,
+	PMBUS_VIRT_POWER_SAMPLES,
+	PMBUS_VIRT_TEMP_SAMPLES,
+};
+
+/*
+ * OPERATION
+ */
+#define PB_OPERATION_CONTROL_ON		BIT(7)
+
+/*
+ * WRITE_PROTECT
+ */
+#define PB_WP_ALL	BIT(7)	/* all but WRITE_PROTECT */
+#define PB_WP_OP	BIT(6)	/* all but WP, OPERATION, PAGE */
+#define PB_WP_VOUT	BIT(5)	/* all but WP, OPERATION, PAGE, VOUT, ON_OFF */
+
+#define PB_WP_ANY	(PB_WP_ALL | PB_WP_OP | PB_WP_VOUT)
+
+/*
+ * CAPABILITY
+ */
+#define PB_CAPABILITY_SMBALERT		BIT(4)
+#define PB_CAPABILITY_ERROR_CHECK	BIT(7)
+
+/*
+ * VOUT_MODE
+ */
+#define PB_VOUT_MODE_MODE_MASK		0xe0
+#define PB_VOUT_MODE_PARAM_MASK		0x1f
+
+#define PB_VOUT_MODE_LINEAR		0x00
+#define PB_VOUT_MODE_VID		0x20
+#define PB_VOUT_MODE_DIRECT		0x40
+
+/*
+ * Fan configuration
+ */
+#define PB_FAN_2_PULSE_MASK		(BIT(0) | BIT(1))
+#define PB_FAN_2_RPM			BIT(2)
+#define PB_FAN_2_INSTALLED		BIT(3)
+#define PB_FAN_1_PULSE_MASK		(BIT(4) | BIT(5))
+#define PB_FAN_1_RPM			BIT(6)
+#define PB_FAN_1_INSTALLED		BIT(7)
+
+enum pmbus_fan_mode { percent = 0, rpm };
+
+/*
+ * STATUS_BYTE, STATUS_WORD (lower)
+ */
+#define PB_STATUS_NONE_ABOVE		BIT(0)
+#define PB_STATUS_CML			BIT(1)
+#define PB_STATUS_TEMPERATURE		BIT(2)
+#define PB_STATUS_VIN_UV		BIT(3)
+#define PB_STATUS_IOUT_OC		BIT(4)
+#define PB_STATUS_VOUT_OV		BIT(5)
+#define PB_STATUS_OFF			BIT(6)
+#define PB_STATUS_BUSY			BIT(7)
+
+/*
+ * STATUS_WORD (upper)
+ */
+#define PB_STATUS_UNKNOWN		BIT(8)
+#define PB_STATUS_OTHER			BIT(9)
+#define PB_STATUS_FANS			BIT(10)
+#define PB_STATUS_POWER_GOOD_N		BIT(11)
+#define PB_STATUS_WORD_MFR		BIT(12)
+#define PB_STATUS_INPUT			BIT(13)
+#define PB_STATUS_IOUT_POUT		BIT(14)
+#define PB_STATUS_VOUT			BIT(15)
+
+/*
+ * STATUS_IOUT
+ */
+#define PB_POUT_OP_WARNING		BIT(0)
+#define PB_POUT_OP_FAULT		BIT(1)
+#define PB_POWER_LIMITING		BIT(2)
+#define PB_CURRENT_SHARE_FAULT		BIT(3)
+#define PB_IOUT_UC_FAULT		BIT(4)
+#define PB_IOUT_OC_WARNING		BIT(5)
+#define PB_IOUT_OC_LV_FAULT		BIT(6)
+#define PB_IOUT_OC_FAULT		BIT(7)
+
+/*
+ * STATUS_VOUT, STATUS_INPUT
+ */
+#define PB_VOLTAGE_VIN_OFF		BIT(3)
+#define PB_VOLTAGE_UV_FAULT		BIT(4)
+#define PB_VOLTAGE_UV_WARNING		BIT(5)
+#define PB_VOLTAGE_OV_WARNING		BIT(6)
+#define PB_VOLTAGE_OV_FAULT		BIT(7)
+
+/*
+ * STATUS_INPUT
+ */
+#define PB_PIN_OP_WARNING		BIT(0)
+#define PB_IIN_OC_WARNING		BIT(1)
+#define PB_IIN_OC_FAULT			BIT(2)
+
+/*
+ * STATUS_TEMPERATURE
+ */
+#define PB_TEMP_UT_FAULT		BIT(4)
+#define PB_TEMP_UT_WARNING		BIT(5)
+#define PB_TEMP_OT_WARNING		BIT(6)
+#define PB_TEMP_OT_FAULT		BIT(7)
+
+/*
+ * STATUS_FAN
+ */
+#define PB_FAN_AIRFLOW_WARNING		BIT(0)
+#define PB_FAN_AIRFLOW_FAULT		BIT(1)
+#define PB_FAN_FAN2_SPEED_OVERRIDE	BIT(2)
+#define PB_FAN_FAN1_SPEED_OVERRIDE	BIT(3)
+#define PB_FAN_FAN2_WARNING		BIT(4)
+#define PB_FAN_FAN1_WARNING		BIT(5)
+#define PB_FAN_FAN2_FAULT		BIT(6)
+#define PB_FAN_FAN1_FAULT		BIT(7)
+
+/*
+ * CML_FAULT_STATUS
+ */
+#define PB_CML_FAULT_OTHER_MEM_LOGIC	BIT(0)
+#define PB_CML_FAULT_OTHER_COMM		BIT(1)
+#define PB_CML_FAULT_PROCESSOR		BIT(3)
+#define PB_CML_FAULT_MEMORY		BIT(4)
+#define PB_CML_FAULT_PACKET_ERROR	BIT(5)
+#define PB_CML_FAULT_INVALID_DATA	BIT(6)
+#define PB_CML_FAULT_INVALID_COMMAND	BIT(7)
+
+enum pmbus_sensor_classes {
+	PSC_VOLTAGE_IN = 0,
+	PSC_VOLTAGE_OUT,
+	PSC_CURRENT_IN,
+	PSC_CURRENT_OUT,
+	PSC_POWER,
+	PSC_TEMPERATURE,
+	PSC_FAN,
+	PSC_PWM,
+	PSC_NUM_CLASSES		/* Number of power sensor classes */
+};
+
+#define PMBUS_PAGES	32	/* Per PMBus specification */
+#define PMBUS_PHASES	10	/* Maximum number of phases per page */
+
+/* Functionality bit mask */
+#define PMBUS_HAVE_VIN		BIT(0)
+#define PMBUS_HAVE_VCAP		BIT(1)
+#define PMBUS_HAVE_VOUT		BIT(2)
+#define PMBUS_HAVE_IIN		BIT(3)
+#define PMBUS_HAVE_IOUT		BIT(4)
+#define PMBUS_HAVE_PIN		BIT(5)
+#define PMBUS_HAVE_POUT		BIT(6)
+#define PMBUS_HAVE_FAN12	BIT(7)
+#define PMBUS_HAVE_FAN34	BIT(8)
+#define PMBUS_HAVE_TEMP		BIT(9)
+#define PMBUS_HAVE_TEMP2	BIT(10)
+#define PMBUS_HAVE_TEMP3	BIT(11)
+#define PMBUS_HAVE_STATUS_VOUT	BIT(12)
+#define PMBUS_HAVE_STATUS_IOUT	BIT(13)
+#define PMBUS_HAVE_STATUS_INPUT	BIT(14)
+#define PMBUS_HAVE_STATUS_TEMP	BIT(15)
+#define PMBUS_HAVE_STATUS_FAN12	BIT(16)
+#define PMBUS_HAVE_STATUS_FAN34	BIT(17)
+#define PMBUS_HAVE_VMON		BIT(18)
+#define PMBUS_HAVE_STATUS_VMON	BIT(19)
+#define PMBUS_HAVE_PWM12	BIT(20)
+#define PMBUS_HAVE_PWM34	BIT(21)
+#define PMBUS_HAVE_SAMPLES	BIT(22)
+
+#define PMBUS_PHASE_VIRTUAL	BIT(30)	/* Phases on this page are virtual */
+#define PMBUS_PAGE_VIRTUAL	BIT(31)	/* Page is virtual */
+
+enum pmbus_data_format { linear = 0, direct, vid };
+enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv };
+
+struct pmbus_driver_info {
+	int pages;		/* Total number of pages */
+	u8 phases[PMBUS_PAGES];	/* Number of phases per page */
+	enum pmbus_data_format format[PSC_NUM_CLASSES];
+	enum vrm_version vrm_version[PMBUS_PAGES]; /* vrm version per page */
+	/*
+	 * Support one set of coefficients for each sensor type
+	 * Used for chips providing data in direct mode.
+	 */
+	int m[PSC_NUM_CLASSES];	/* mantissa for direct data format */
+	int b[PSC_NUM_CLASSES];	/* offset */
+	int R[PSC_NUM_CLASSES];	/* exponent */
+
+	u32 func[PMBUS_PAGES];	/* Functionality, per page */
+	u32 pfunc[PMBUS_PHASES];/* Functionality, per phase */
+	/*
+	 * The following functions map manufacturing specific register values
+	 * to PMBus standard register values. Specify only if mapping is
+	 * necessary.
+	 * Functions return the register value (read) or zero (write) if
+	 * successful. A return value of -ENODATA indicates that there is no
+	 * manufacturer specific register, but that a standard PMBus register
+	 * may exist. Any other negative return value indicates that the
+	 * register does not exist, and that no attempt should be made to read
+	 * the standard register.
+	 */
+	int (*read_byte_data)(struct i2c_client *client, int page, int reg);
+	int (*read_word_data)(struct i2c_client *client, int page, int phase,
+			      int reg);
+	int (*write_word_data)(struct i2c_client *client, int page, int reg,
+			       u16 word);
+	int (*write_byte)(struct i2c_client *client, int page, u8 value);
+	/*
+	 * The identify function determines supported PMBus functionality.
+	 * This function is only necessary if a chip driver supports multiple
+	 * chips, and the chip functionality is not pre-determined.
+	 */
+	int (*identify)(struct i2c_client *client,
+			struct pmbus_driver_info *info);
+
+	/* Regulator functionality, if supported by this chip driver. */
+	int num_regulators;
+	const struct regulator_desc *reg_desc;
+
+	/* custom attributes */
+	const struct attribute_group **groups;
+};
+
+/* Regulator ops */
+
+extern const struct regulator_ops pmbus_regulator_ops;
+
+/* Macro for filling in array of struct regulator_desc */
+#define PMBUS_REGULATOR(_name, _id)				\
+	[_id] = {						\
+		.name = (_name # _id),				\
+		.id = (_id),					\
+		.of_match = of_match_ptr(_name # _id),		\
+		.regulators_node = of_match_ptr("regulators"),	\
+		.ops = &pmbus_regulator_ops,			\
+		.type = REGULATOR_VOLTAGE,			\
+		.owner = THIS_MODULE,				\
+	}
+
+/* Function declarations */
+
+void pmbus_clear_cache(struct i2c_client *client);
+int pmbus_set_page(struct i2c_client *client, int page, int phase);
+int pmbus_read_word_data(struct i2c_client *client, int page, int phase,
+			 u8 reg);
+int pmbus_write_word_data(struct i2c_client *client, int page, u8 reg,
+			  u16 word);
+int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg);
+int pmbus_write_byte(struct i2c_client *client, int page, u8 value);
+int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg,
+			  u8 value);
+int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
+			   u8 mask, u8 value);
+void pmbus_clear_faults(struct i2c_client *client);
+bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg);
+bool pmbus_check_word_register(struct i2c_client *client, int page, int reg);
+int pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info);
+const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client
+						      *client);
+int pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id,
+			      enum pmbus_fan_mode mode);
+int pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id,
+			      enum pmbus_fan_mode mode);
+int pmbus_update_fan(struct i2c_client *client, int page, int id,
+		     u8 config, u8 mask, u16 command);
+struct dentry *pmbus_get_debugfs_dir(struct i2c_client *client);
+
+#endif /* PMBUS_H */
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_api.c b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_api.c
new file mode 100644
index 000000000000..338417125569
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_api.c
@@ -0,0 +1,478 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ *  Description of various APIs related to PSU component
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/dmi.h>
+#include <linux/kobject.h>
+#include "../../../../../pddf/i2c/modules/include/pddf_psu_defs.h"
+#include "pddf_psu_driver.h"
+
+
+#define PSU_REG_VOUT_MODE 0x20
+#define PSU_REG_READ_VOUT 0x8b
+
+/*#define PSU_DEBUG*/
+#ifdef PSU_DEBUG
+#define psu_dbg(...) printk(__VA_ARGS__)
+#else
+#define psu_dbg(...)
+#endif
+
+
+void get_psu_duplicate_sysfs(int idx, char *str)
+{
+    switch (idx)
+    {
+        case PSU_V_OUT:
+            strscpy(str, "in3_input", ATTR_NAME_LEN);
+            break;
+        case PSU_I_OUT:
+            strscpy(str, "curr2_input", ATTR_NAME_LEN);
+            break;
+        case PSU_P_OUT:
+            strscpy(str, "power2_input", ATTR_NAME_LEN);
+            break;
+        case PSU_FAN1_SPEED:
+            strscpy(str, "fan1_input", ATTR_NAME_LEN);
+            break;
+        case PSU_TEMP1_INPUT:
+            strscpy(str, "temp1_input", ATTR_NAME_LEN);
+            break;
+        default:
+            break;
+    }
+
+    return;
+}
+
+static int two_complement_to_int(u16 data, u8 valid_bit, int mask)
+{
+    u16  valid_data  = data & mask;
+    bool is_negative = valid_data >> (valid_bit - 1);
+
+    return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data;
+}
+
+static u8 psu_get_vout_mode(struct i2c_client *client)
+{
+    u8 status = 0, retry = 10;
+    uint8_t offset = PSU_REG_VOUT_MODE;
+
+    while (retry)
+    {
+        status = i2c_smbus_read_byte_data((struct i2c_client *)client, offset);
+        if (unlikely(status < 0)) 
+        {
+            msleep(60);
+            retry--;
+            continue;
+        }
+        break;
+    }
+
+    if (status < 0)
+    {
+        printk(KERN_ERR "%s: Get PSU Vout mode failed\n", __func__);
+        return 0;
+    }
+    else
+    {
+        /*printk(KERN_ERR "%s: vout_mode reg value 0x%x\n", __func__, status);*/
+        return status;
+    }
+}
+
+static u16 psu_get_v_out(struct i2c_client *client)
+{
+    u16 status = 0, retry = 10;
+    uint8_t offset = PSU_REG_READ_VOUT;
+
+    while (retry) {
+        status = i2c_smbus_read_word_data((struct i2c_client *)client, offset);
+        if (unlikely(status < 0)) {
+            msleep(60);
+            retry--;
+            continue;
+        }
+        break;
+    }
+
+    if (status < 0)
+    {
+        printk(KERN_ERR "%s: Get PSU Vout failed\n", __func__);
+        return 0;
+    }
+    else
+    {
+        /*printk(KERN_ERR "%s: vout reg value 0x%x\n", __func__, status);*/
+        return status;
+    }
+}
+
+int psu_update_hw(struct device *dev, struct psu_attr_info *info, PSU_DATA_ATTR *udata)
+{
+    int status = 0;
+    struct i2c_client *client = to_i2c_client(dev);
+    PSU_SYSFS_ATTR_DATA *sysfs_attr_data = NULL;
+
+
+    mutex_lock(&info->update_lock);
+
+    sysfs_attr_data = udata->access_data;
+    if (sysfs_attr_data->pre_set != NULL)
+    {
+        status = (sysfs_attr_data->pre_set)(client, udata, info);
+        if (status!=0)
+            dev_warn(&client->dev, "%s: pre_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+    }
+    if (sysfs_attr_data->do_set != NULL)
+    {
+        status = (sysfs_attr_data->do_set)(client, udata, info);
+        if (status!=0)
+            dev_warn(&client->dev, "%s: do_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+
+    }
+    if (sysfs_attr_data->post_set != NULL)
+    {
+        status = (sysfs_attr_data->post_set)(client, udata, info);
+        if (status!=0)
+            dev_warn(&client->dev, "%s: post_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+    }
+
+    mutex_unlock(&info->update_lock);
+
+    return 0;
+}
+
+
+int psu_update_attr(struct device *dev, struct psu_attr_info *data, PSU_DATA_ATTR *udata)
+{
+    int status = 0;
+    struct i2c_client *client = to_i2c_client(dev);
+    PSU_SYSFS_ATTR_DATA *sysfs_attr_data=NULL;
+
+    mutex_lock(&data->update_lock);
+
+    if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || !data->valid)
+    {
+        dev_dbg(&client->dev, "Starting update for %s\n", data->name);
+
+        sysfs_attr_data = udata->access_data;
+        if (sysfs_attr_data->pre_get != NULL)
+        {
+            status = (sysfs_attr_data->pre_get)(client, udata, data);
+            if (status!=0)
+                dev_warn(&client->dev, "%s: pre_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+        }
+        if (sysfs_attr_data->do_get != NULL)
+        {
+            status = (sysfs_attr_data->do_get)(client, udata, data);
+            if (status!=0)
+                dev_warn(&client->dev, "%s: do_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+
+        }
+        if (sysfs_attr_data->post_get != NULL)
+        {
+            status = (sysfs_attr_data->post_get)(client, udata, data);
+            if (status!=0)
+                dev_warn(&client->dev, "%s: post_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+        }
+
+        data->last_updated = jiffies;
+        data->valid = 1;
+    }
+
+    mutex_unlock(&data->update_lock);
+    return 0;
+}
+
+ssize_t psu_show_default(struct device *dev, struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    struct i2c_client *client = to_i2c_client(dev);
+    struct psu_data *data = i2c_get_clientdata(client);
+    PSU_PDATA *pdata = (PSU_PDATA *)(client->dev.platform_data);
+    PSU_DATA_ATTR *usr_data = NULL;
+    struct psu_attr_info *sysfs_attr_info = NULL;
+    int i, status=0;
+    u16 value = 0;
+    u8 vout_mode = 0;
+    int exponent, mantissa;
+    int multiplier = 1000;
+    char new_str[ATTR_NAME_LEN] = "";
+    PSU_SYSFS_ATTR_DATA *ptr = NULL;
+
+    for (i=0;i<data->num_attr;i++)
+    {
+        ptr = (PSU_SYSFS_ATTR_DATA *)pdata->psu_attrs[i].access_data;
+        get_psu_duplicate_sysfs(ptr->index , new_str);
+        if ( strcmp(attr->dev_attr.attr.name, pdata->psu_attrs[i].aname) == 0 || strcmp(attr->dev_attr.attr.name, new_str) == 0 )
+        {
+            sysfs_attr_info = &data->attr_info[i];
+            usr_data = &pdata->psu_attrs[i];
+            strscpy(new_str, "", ATTR_NAME_LEN);
+        }
+    }
+
+    if (sysfs_attr_info==NULL || usr_data==NULL)
+    {
+        printk(KERN_ERR "%s is not supported attribute for this client\n", attr->dev_attr.attr.name);
+        goto exit;
+    }
+
+    psu_update_attr(dev, sysfs_attr_info, usr_data);
+
+    switch(attr->index)
+    {
+        case PSU_PRESENT:
+        case PSU_POWER_GOOD:
+            status = sysfs_attr_info->val.intval;
+            return sprintf(buf, "%d\n", status);
+            break;
+        case PSU_MODEL_NAME:
+        case PSU_MFR_ID:
+        case PSU_SERIAL_NUM:
+        case PSU_FAN_DIR:
+            return sprintf(buf, "%s\n", sysfs_attr_info->val.strval);
+            break;
+        case PSU_V_OUT:
+            value = psu_get_v_out(client);
+            vout_mode = psu_get_vout_mode(client);
+            if ((vout_mode >> 5) == 0)
+                exponent = two_complement_to_int(vout_mode & 0x1f, 5, 0x1f);
+            else
+                exponent = 0;
+    
+            mantissa = value;
+            if (exponent >= 0)
+                return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier);
+			
+            else
+                return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent));
+            break;
+
+        case PSU_V_OUT_MIN:
+        case PSU_V_OUT_MAX:
+            multiplier = 1000;
+            value = sysfs_attr_info->val.shortval;
+            vout_mode = psu_get_vout_mode(client);
+            if ((vout_mode >> 5) == 0)
+                exponent = two_complement_to_int(vout_mode & 0x1f, 5, 0x1f);
+            else
+                exponent = 0;
+            mantissa = two_complement_to_int(value & 0xffff, 16, 0xffff);
+			
+            if (exponent >= 0)
+                return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier);
+            else
+                return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent));
+            break;       
+        case PSU_I_OUT:
+        case PSU_V_IN:
+        case PSU_I_IN:
+        case PSU_P_OUT_MAX:
+            multiplier = 1000;
+            value = sysfs_attr_info->val.shortval;
+            exponent = two_complement_to_int(value >> 11, 5, 0x1f);
+            mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff);
+            if (exponent >= 0)
+                return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier);
+            else
+                return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent));
+            break;
+        case PSU_P_IN:
+        case PSU_P_OUT:
+            multiplier = 1000000;
+            value = sysfs_attr_info->val.shortval;
+            exponent = two_complement_to_int(value >> 11, 5, 0x1f);
+            mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff);
+            if (exponent >= 0)
+                return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier);
+            else
+                return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent));
+
+            break;
+        case PSU_FAN1_SPEED:
+            value = sysfs_attr_info->val.shortval;
+            exponent = two_complement_to_int(value >> 11, 5, 0x1f);
+            mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff);
+            if (exponent >= 0)
+                return sprintf(buf, "%d\n", (mantissa << exponent));
+            else
+                return sprintf(buf, "%d\n", (mantissa) / (1 << -exponent));
+
+            break;
+        case PSU_TEMP1_INPUT:
+        case PSU_TEMP1_HIGH_THRESHOLD:
+            multiplier = 1000;
+            value = sysfs_attr_info->val.shortval;
+            exponent = two_complement_to_int(value >> 11, 5, 0x1f);
+            mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff);
+            if (exponent >= 0)
+                return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier);
+            else
+                return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent));
+
+            break;
+        default:
+            printk(KERN_ERR "%s: Unable to find attribute index for %s\n", __FUNCTION__, usr_data->aname);
+            goto exit;
+    }
+
+exit:
+    return sprintf(buf, "%d\n", status);
+}
+
+
+ssize_t psu_store_default(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    struct i2c_client *client = to_i2c_client(dev);
+    struct psu_data *data = i2c_get_clientdata(client);
+    PSU_PDATA *pdata = (PSU_PDATA *)(client->dev.platform_data);
+    PSU_DATA_ATTR *usr_data = NULL;
+    struct psu_attr_info *sysfs_attr_info = NULL;
+    int i;
+
+    for (i=0;i<data->num_attr;i++)
+    {
+        if (strcmp(data->attr_info[i].name, attr->dev_attr.attr.name) == 0 && strcmp(pdata->psu_attrs[i].aname, attr->dev_attr.attr.name) == 0)
+        {
+            sysfs_attr_info = &data->attr_info[i];
+            usr_data = &pdata->psu_attrs[i];
+        }
+    }
+
+    if (sysfs_attr_info==NULL || usr_data==NULL) {
+        printk(KERN_ERR "%s is not supported attribute for this client\n", attr->dev_attr.attr.name);
+        goto exit;
+    }
+
+    switch(attr->index)
+    {
+        /*No write attributes for now in PSU*/
+        default:
+            goto exit;
+    }
+
+    psu_update_hw(dev, sysfs_attr_info, usr_data);
+
+exit:
+    return count;
+}
+
+extern int board_i2c_cpld_read_new(unsigned short cpld_addr, char *name, u8 reg);
+int sonic_i2c_get_psu_byte_default(void *client, PSU_DATA_ATTR *adata, void *data)
+{
+    int status = 0;
+    int val = 0;
+    struct psu_attr_info *padata = (struct psu_attr_info *)data;
+
+
+    if (strncmp(adata->devtype, "cpld", strlen("cpld")) == 0)
+    {
+        val = board_i2c_cpld_read_new(adata->devaddr, adata->devname, adata->offset);
+        if (val < 0){
+            return val;
+		}
+        padata->val.intval =  ((val & adata->mask) == adata->cmpval);
+        psu_dbg(KERN_ERR "%s: byte_value = 0x%x\n", __FUNCTION__, padata->val.intval);
+    }
+
+    return status;
+}
+
+int sonic_i2c_get_psu_block_default(void *client, PSU_DATA_ATTR *adata, void *data)
+{
+    int status = 0, retry = 10;
+    struct psu_attr_info *padata = (struct psu_attr_info *)data;
+    char buf[32]="";  //temporary placeholder for block data
+    uint8_t offset = (uint8_t)adata->offset;
+    int data_len = adata->len;
+
+    while (retry)
+    {
+        status = i2c_smbus_read_i2c_block_data((struct i2c_client *)client, offset, data_len-1, buf);
+        if (unlikely(status<0))
+        {
+            msleep(60);
+            retry--;
+            continue;
+        }
+        break;
+    }
+
+    if (status < 0)
+    {
+        buf[0] = '\0';
+        dev_dbg(&((struct i2c_client *)client)->dev, "unable to read block of data from (0x%x)\n", ((struct i2c_client *)client)->addr);
+    }
+    else
+    {
+        buf[data_len-1] = '\0';
+    }
+
+    if (strncmp(adata->devtype, "pmbus", strlen("pmbus")) == 0)
+        strscpy(padata->val.strval, buf+1, data_len-1);
+    else
+        strscpy(padata->val.strval, buf, data_len);
+
+    psu_dbg(KERN_ERR "%s: status = %d, buf block: %s\n", __FUNCTION__, status, padata->val.strval);
+    return 0;
+}
+
+int sonic_i2c_get_psu_word_default(void *client, PSU_DATA_ATTR *adata, void *data)
+{
+
+    int status = 0, retry = 10;
+    struct psu_attr_info *padata = (struct psu_attr_info *)data;
+    uint8_t offset = (uint8_t)adata->offset;
+
+    while (retry) {
+        status = i2c_smbus_read_word_data((struct i2c_client *)client, offset);
+        if (unlikely(status < 0)) {
+            msleep(60);
+            retry--;
+            continue;
+        }
+        break;
+    }
+
+    if (status < 0)
+    {
+        padata->val.shortval = 0;
+        dev_dbg(&((struct i2c_client *)client)->dev, "unable to read a word from (0x%x)\n", ((struct i2c_client *)client)->addr);
+    }
+    else
+    {
+        padata->val.shortval = status;
+    }
+
+    psu_dbg(KERN_ERR "%s: word value : %d\n", __FUNCTION__, padata->val.shortval);
+    return 0;
+}
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_api.h b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_api.h
new file mode 100644
index 000000000000..24e4ea02e7ec
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_api.h
@@ -0,0 +1,31 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * Description
+ *  PSU driver related api declarations
+ */
+
+#ifndef __PDDF_PSU_API_H__
+#define __PDDF_PSU_API_H__
+
+extern void get_psu_duplicate_sysfs(int idx, char *str);
+extern ssize_t psu_show_default(struct device *dev, struct device_attribute *da, char *buf);
+extern ssize_t psu_store_default(struct device *dev, struct device_attribute *da, const char *buf, size_t count);
+
+extern int sonic_i2c_get_psu_byte_default(void *client, PSU_DATA_ATTR *adata, void *data);
+extern int sonic_i2c_get_psu_block_default(void *client, PSU_DATA_ATTR *adata, void *data);
+extern int sonic_i2c_get_psu_word_default(void *client, PSU_DATA_ATTR *adata, void *data);
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_defs.h b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_defs.h
new file mode 100644
index 000000000000..60e81a9f5878
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_defs.h
@@ -0,0 +1,90 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * Description:
+ *  Platform PSU defines/structures header file
+ */
+
+#ifndef __PDDF_PSU_DEFS_H__
+#define __PDDF_PSU_DEFS_H__
+
+
+#define MAX_NUM_PSU 5
+#define MAX_PSU_ATTRS 32
+#define ATTR_NAME_LEN 32
+#define STR_ATTR_SIZE 32
+#define DEV_TYPE_LEN 32
+
+/* Each client has this additional data 
+ */
+
+typedef struct PSU_DATA_ATTR
+{
+    char aname[ATTR_NAME_LEN];                    // attr name, taken from enum psu_sysfs_attributes
+    char devtype[DEV_TYPE_LEN];       // either a 'eeprom' or 'cpld', or 'pmbus' attribute
+    char devname[DEV_TYPE_LEN];       // Name of the device from where this sysfs attr is read
+    uint32_t devaddr;
+    uint32_t offset;
+    uint32_t mask;
+    uint32_t cmpval;
+    uint32_t len;
+    void *access_data;
+
+}PSU_DATA_ATTR;
+
+typedef struct PSU_SYSFS_ATTR_DATA
+{
+    int index;
+    unsigned short mode;
+    ssize_t (*show)(struct device *dev, struct device_attribute *da, char *buf);
+    int (*pre_get)(void *client, PSU_DATA_ATTR *adata, void *data);
+    int (*do_get)(void *client, PSU_DATA_ATTR *adata, void *data);
+    int (*post_get)(void *client, PSU_DATA_ATTR *adata, void *data);
+    ssize_t (*store)(struct device *dev, struct device_attribute *da, const char *buf, size_t count);
+    int (*pre_set)(void *client, PSU_DATA_ATTR *adata, void *data);
+    int (*do_set)(void *client, PSU_DATA_ATTR *adata, void *data);
+    int (*post_set)(void *client, PSU_DATA_ATTR *adata, void *data);
+    void *data;
+} PSU_SYSFS_ATTR_DATA;
+
+typedef struct PSU_SYSFS_ATTR_DATA_ENTRY
+{
+    char name[ATTR_NAME_LEN];
+    PSU_SYSFS_ATTR_DATA *a_ptr;
+} PSU_SYSFS_ATTR_DATA_ENTRY;
+
+
+/* PSU CLIENT DATA - PLATFORM DATA FOR PSU CLIENT */
+typedef struct PSU_DATA
+{
+    int idx;    // psu index
+    int num_psu_fans;
+    PSU_DATA_ATTR psu_attr;
+    int len;             // no of valid attributes for this psu client
+    PSU_DATA_ATTR psu_attrs[MAX_PSU_ATTRS]; 
+}PSU_DATA;
+
+typedef struct PSU_PDATA
+{
+    int idx;                    // psu index
+    int num_psu_fans;      // num of fans supported by the PSU
+    int len;             // no of valid attributes for this psu client
+    PSU_DATA_ATTR *psu_attrs; 
+}PSU_PDATA;
+
+extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
+extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_driver.c b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_driver.c
new file mode 100644
index 000000000000..fa5d31a0866a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_driver.c
@@ -0,0 +1,398 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * A pddf kernel module driver for PSU
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/dmi.h>
+#include <linux/kobject.h>
+#include "../../../../../pddf/i2c/modules/include/pddf_client_defs.h"
+#include "../../../../../pddf/i2c/modules/include/pddf_psu_defs.h"
+#include "../../../../../pddf/i2c/modules/include/pddf_psu_driver.h"
+#include "../../../../../pddf/i2c/modules/include/pddf_psu_api.h"
+
+
+static unsigned short normal_i2c[] = { I2C_CLIENT_END };
+
+struct pddf_ops_t pddf_psu_ops = {
+	.pre_init = NULL,
+	.post_init = NULL,
+
+	.pre_probe = NULL,
+	.post_probe = NULL,
+
+	.pre_remove = NULL,
+	.post_remove = NULL,
+
+	.pre_exit = NULL,
+	.post_exit = NULL,
+};
+EXPORT_SYMBOL(pddf_psu_ops);
+
+
+PSU_SYSFS_ATTR_DATA access_psu_present = {PSU_PRESENT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_byte_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_present);
+
+PSU_SYSFS_ATTR_DATA access_psu_model_name = {PSU_MODEL_NAME, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_model_name);
+
+PSU_SYSFS_ATTR_DATA access_psu_power_good = {PSU_POWER_GOOD, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_byte_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_power_good);
+
+PSU_SYSFS_ATTR_DATA access_psu_mfr_id = {PSU_MFR_ID, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_mfr_id);
+
+PSU_SYSFS_ATTR_DATA access_psu_serial_num = {PSU_SERIAL_NUM, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_serial_num);
+
+PSU_SYSFS_ATTR_DATA access_psu_fan_dir = {PSU_FAN_DIR, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_fan_dir);
+
+PSU_SYSFS_ATTR_DATA access_psu_v_out = {PSU_V_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_v_out);
+
+PSU_SYSFS_ATTR_DATA access_psu_v_out_min = {PSU_V_OUT_MIN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_v_out_min);
+
+PSU_SYSFS_ATTR_DATA access_psu_v_out_max = {PSU_V_OUT_MAX, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_v_out_max);
+
+PSU_SYSFS_ATTR_DATA access_psu_i_out = {PSU_I_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_i_out);
+
+PSU_SYSFS_ATTR_DATA access_psu_p_out = {PSU_P_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_p_out);
+
+PSU_SYSFS_ATTR_DATA access_psu_p_out_max = {PSU_P_OUT_MAX, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_p_out_max);
+
+PSU_SYSFS_ATTR_DATA access_psu_fan1_speed_rpm = {PSU_FAN1_SPEED, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_fan1_speed_rpm);
+
+PSU_SYSFS_ATTR_DATA access_psu_temp1_input = {PSU_TEMP1_INPUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_temp1_input);
+
+PSU_SYSFS_ATTR_DATA access_psu_temp1_high_threshold = {PSU_TEMP1_HIGH_THRESHOLD, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_temp1_high_threshold);
+
+PSU_SYSFS_ATTR_DATA access_psu_v_in = {PSU_V_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_v_in);
+
+PSU_SYSFS_ATTR_DATA access_psu_i_in = {PSU_I_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_i_in);
+
+PSU_SYSFS_ATTR_DATA access_psu_p_in = {PSU_P_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_p_in);
+
+PSU_SYSFS_ATTR_DATA_ENTRY psu_sysfs_attr_data_tbl[]=
+{
+	{ "psu_present", &access_psu_present},
+	{ "psu_model_name", &access_psu_model_name},
+	{ "psu_power_good" , &access_psu_power_good},
+	{ "psu_mfr_id" , &access_psu_mfr_id},
+	{ "psu_serial_num" , &access_psu_serial_num},
+	{ "psu_fan_dir" , &access_psu_fan_dir},
+	{ "psu_v_out" , &access_psu_v_out},
+	{ "psu_v_out_min" , &access_psu_v_out_min},
+	{ "psu_v_out_max" , &access_psu_v_out_max},
+	{ "psu_i_out" , &access_psu_i_out},
+	{ "psu_p_out" , &access_psu_p_out},
+	{ "psu_p_out_max" , &access_psu_p_out_max},
+	{ "psu_fan1_speed_rpm" , &access_psu_fan1_speed_rpm},
+	{ "psu_temp1_input" , &access_psu_temp1_input},
+	{ "psu_temp1_high_threshold" , &access_psu_temp1_high_threshold},
+	{ "psu_v_in" , &access_psu_v_in},
+	{ "psu_i_in" , &access_psu_i_in},
+	{ "psu_p_in" , &access_psu_p_in}
+};
+
+void *get_psu_access_data(char *name)
+{
+	int i=0;
+	for(i=0; i<(sizeof(psu_sysfs_attr_data_tbl)/sizeof(psu_sysfs_attr_data_tbl[0])); i++)
+	{
+		if(strcmp(name, psu_sysfs_attr_data_tbl[i].name) ==0)
+		{
+			return &psu_sysfs_attr_data_tbl[i];
+		}
+	}
+	return NULL;
+}
+EXPORT_SYMBOL(get_psu_access_data);
+
+
+static int psu_probe(struct i2c_client *client,
+            const struct i2c_device_id *dev_id)
+{
+    struct psu_data *data;
+    int status =0;
+    int i,num, j=0;
+    PSU_PDATA *psu_platform_data;
+    PSU_DATA_ATTR *data_attr;
+    PSU_SYSFS_ATTR_DATA_ENTRY *sysfs_data_entry;
+    char new_str[ATTR_NAME_LEN] = "";
+
+
+	if (client == NULL) {
+		printk("NULL Client.. \n");
+		goto exit;
+	}
+
+	if (pddf_psu_ops.pre_probe)
+    {
+        status = (pddf_psu_ops.pre_probe)(client, dev_id);
+        if (status != 0)
+            goto exit;
+    }
+
+    if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
+        status = -EIO;
+        goto exit;
+    }
+
+    data = kzalloc(sizeof(struct psu_data), GFP_KERNEL);
+    if (!data) {
+        status = -ENOMEM;
+        goto exit;
+    }
+
+    i2c_set_clientdata(client, data);
+    dev_info(&client->dev, "chip found\n");
+
+	/* Take control of the platform data */
+	psu_platform_data = (PSU_PDATA *)(client->dev.platform_data);
+	num = psu_platform_data->len;
+	data->index = psu_platform_data->idx - 1;
+	data->num_psu_fans = psu_platform_data->num_psu_fans;
+	data->num_attr = num;
+
+
+
+	/* Create and Add supported attr in the 'attributes' list */
+	for (i=0; i<num; i++)
+	{
+		/*struct attribute *aptr = NULL;*/
+		struct sensor_device_attribute *dy_ptr = NULL;
+		data_attr = psu_platform_data->psu_attrs + i;
+		sysfs_data_entry = get_psu_access_data(data_attr->aname);
+		if (sysfs_data_entry == NULL)
+		{
+			printk(KERN_ERR "%s: Wrong attribute name provided by user '%s'\n", __FUNCTION__, data_attr->aname);
+			continue;
+		}
+		
+		dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL);
+		dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1];
+		strscpy((char *)dy_ptr->dev_attr.attr.name, data_attr->aname, ATTR_NAME_LEN);
+		dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode;
+		dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show;
+		dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store;
+		dy_ptr->index = sysfs_data_entry->a_ptr->index;
+		
+		data->psu_attribute_list[i] = &dy_ptr->dev_attr.attr;
+		strscpy(data->attr_info[i].name, data_attr->aname, ATTR_NAME_LEN);
+		data->attr_info[i].valid = 0;
+		mutex_init(&data->attr_info[i].update_lock);
+
+		/*Create a duplicate entry*/
+		get_psu_duplicate_sysfs(dy_ptr->index, new_str);
+		if (strcmp(new_str,""))
+		{
+			dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL);
+			dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1];
+			strscpy((char *)dy_ptr->dev_attr.attr.name, new_str, ATTR_NAME_LEN);
+			dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode;
+			dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show;
+			dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store;
+			dy_ptr->index = sysfs_data_entry->a_ptr->index;
+
+			data->psu_attribute_list[num+j] = &dy_ptr->dev_attr.attr;
+			j++;
+			strscpy(new_str,"", ATTR_NAME_LEN);
+		}
+	}
+	data->psu_attribute_list[i+j] = NULL;
+	data->psu_attribute_group.attrs = data->psu_attribute_list;
+
+    /* Register sysfs hooks */
+    status = sysfs_create_group(&client->dev.kobj, &data->psu_attribute_group);
+    if (status) {
+        goto exit_free;
+    }
+
+	data->hwmon_dev = hwmon_device_register_with_info(&client->dev, client->name, NULL, NULL, NULL);
+	if (IS_ERR(data->hwmon_dev)) {
+		status = PTR_ERR(data->hwmon_dev);
+		goto exit_remove;
+	}
+
+    dev_info(&client->dev, "%s: psu '%s'\n",
+         dev_name(data->hwmon_dev), client->name);
+
+	/* Add a support for post probe function */
+    if (pddf_psu_ops.post_probe)
+    {
+        status = (pddf_psu_ops.post_probe)(client, dev_id);
+        if (status != 0)
+            goto exit_remove;
+    }
+
+    return 0;
+
+
+exit_remove:
+    sysfs_remove_group(&client->dev.kobj, &data->psu_attribute_group);
+exit_free:
+	/* Free all the allocated attributes */
+	for (i=0;data->psu_attribute_list[i]!=NULL;i++)
+	{
+		struct sensor_device_attribute *ptr = (struct sensor_device_attribute *)data->psu_attribute_list[i];
+		kfree(ptr);
+		data->psu_attribute_list[i] = NULL;
+		pddf_dbg(PSU, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__);
+	}
+    kfree(data);
+exit:
+    return status;
+}
+
+static void psu_remove(struct i2c_client *client)
+{
+	int i=0, ret = 0;
+    struct psu_data *data = i2c_get_clientdata(client);
+	PSU_PDATA *platdata = (PSU_PDATA *)client->dev.platform_data; // use dev_get_platdata()
+	PSU_DATA_ATTR *platdata_sub = platdata->psu_attrs;
+	struct sensor_device_attribute *ptr = NULL;
+
+	if (pddf_psu_ops.pre_remove)
+    {
+        ret = (pddf_psu_ops.pre_remove)(client);
+        if (ret!=0)
+            printk(KERN_ERR "FAN pre_remove function failed\n");
+    }
+
+	hwmon_device_unregister(data->hwmon_dev);
+	sysfs_remove_group(&client->dev.kobj, &data->psu_attribute_group);
+	for (i=0; data->psu_attribute_list[i]!=NULL; i++)
+    {
+        ptr = (struct sensor_device_attribute *)data->psu_attribute_list[i];
+		kfree(ptr);
+		data->psu_attribute_list[i] = NULL;
+	}
+    pddf_dbg(PSU, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__);
+    kfree(data);
+	if (platdata_sub) {
+		printk(KERN_DEBUG "%s: Freeing platform subdata\n", __FUNCTION__);
+		kfree(platdata_sub);
+	}
+	if (platdata) {
+		printk(KERN_DEBUG "%s: Freeing platform data\n", __FUNCTION__);
+		kfree(platdata);
+	}
+
+	if (pddf_psu_ops.post_remove)
+    {
+        ret = (pddf_psu_ops.post_remove)(client);
+        if (ret!=0)
+            printk(KERN_ERR "FAN post_remove function failed\n");
+    }
+}
+
+enum psu_intf
+{
+	eeprom_intf,
+	smbus_intf
+};
+
+static const struct i2c_device_id psu_id[] = {
+	{"psu_eeprom", eeprom_intf},
+	{"psu_pmbus", smbus_intf},
+	{}
+};
+
+MODULE_DEVICE_TABLE(i2c, psu_id);
+
+static struct i2c_driver psu_driver = {
+    .class        = I2C_CLASS_HWMON,
+    .driver = {
+        .name     = "psu",
+    },
+    .probe        = psu_probe,
+    .remove       = psu_remove,
+    .id_table     = psu_id,
+    .address_list = normal_i2c,
+};
+
+int example_fun(void)
+{
+	pddf_dbg(PSU, KERN_ERR "CALLING FUN...\n");
+	return 0;
+}
+EXPORT_SYMBOL(example_fun);
+
+
+int psu_init(void)
+{
+    int status = 0;
+
+    if (pddf_psu_ops.pre_init)
+    {
+        status = (pddf_psu_ops.pre_init)();
+        if (status!=0)
+            return status;
+    }
+
+	pddf_dbg(PSU, KERN_ERR "GENERIC_PSU_DRIVER.. init Invoked..\n");
+    status = i2c_add_driver(&psu_driver);
+    if (status!=0)
+        return status;
+	
+    if (pddf_psu_ops.post_init)
+    {
+        status = (pddf_psu_ops.post_init)();
+        if (status!=0)
+            return status;
+    }
+
+	return status;
+}
+EXPORT_SYMBOL(psu_init);
+
+void psu_exit(void)
+{
+	pddf_dbg(PSU, "GENERIC_PSU_DRIVER.. exit\n");
+	if (pddf_psu_ops.pre_exit) (pddf_psu_ops.pre_exit)();
+    i2c_del_driver(&psu_driver);
+	if (pddf_psu_ops.post_exit) (pddf_psu_ops.post_exit)();
+}
+EXPORT_SYMBOL(psu_exit);
+
+module_init(psu_init);
+module_exit(psu_exit);
+
+MODULE_AUTHOR("Broadcom");
+MODULE_DESCRIPTION("psu driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_driver.h b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_driver.h
new file mode 100644
index 000000000000..a94cf7441dbc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/modules/psu_driver/pddf_psu_driver.h
@@ -0,0 +1,70 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * Description
+ *  PSU driver data structures
+ */
+#ifndef __PDDF_PSU_DRIVER_H__
+#define __PDDF_PSU_DRIVER_H__
+
+enum psu_sysfs_attributes {
+    PSU_PRESENT,
+    PSU_MODEL_NAME,
+    PSU_POWER_GOOD,
+	PSU_MFR_ID,
+	PSU_SERIAL_NUM,
+	PSU_FAN_DIR,
+    PSU_V_OUT,
+    PSU_V_OUT_MIN,
+    PSU_V_OUT_MAX,
+    PSU_I_OUT,
+    PSU_P_OUT, /* This is in micro watts to comply with lm-sensors */
+    PSU_P_OUT_MAX,
+    PSU_FAN1_SPEED,
+    PSU_TEMP1_INPUT,
+    PSU_TEMP1_HIGH_THRESHOLD,
+    PSU_V_IN,
+    PSU_I_IN,
+	PSU_P_IN,
+	PSU_ATTR_MAX
+};
+
+
+/* Every client has psu_data which is divided into per attribute data */
+struct psu_attr_info {
+	char				name[ATTR_NAME_LEN];
+	struct mutex        update_lock;
+    char                valid;           /* !=0 if registers are valid */
+    unsigned long       last_updated;    /* In jiffies */
+	u8					status;
+	union {
+		char strval[STR_ATTR_SIZE];
+		int	 intval;
+		u16	 shortval;
+		u8   charval;
+	}val;
+};
+struct psu_data {
+	struct device			*hwmon_dev;
+	u8						index;
+	int						num_psu_fans;
+	int						num_attr;
+	struct attribute		*psu_attribute_list[MAX_PSU_ATTRS];
+	struct attribute_group	psu_attribute_group;
+	struct psu_attr_info	attr_info[MAX_PSU_ATTRS];
+};
+
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/setup.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/setup.py
similarity index 98%
rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/setup.py
rename to platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/setup.py
index 159e26656138..a1535165bb66 100644
--- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/setup.py
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/setup.py
@@ -1,4 +1,5 @@
 import os
+import sys
 from setuptools import setup
 os.listdir
 
diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/__init__.py
similarity index 63%
rename from platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/__init__.py
rename to platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/__init__.py
index 0533d11584e1..21d9cd445e31 100644
--- a/platform/broadcom/sonic-platform-modules-cel/belgite/pddf/sonic_platform/__init__.py
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/__init__.py
@@ -1,4 +1,4 @@
 # All the derived classes for PDDF
 __all__ = ["platform", "chassis", "sfp", "psu", "thermal"]
-from sonic_platform import * #[py/polluting-import]
-
+from . import platform
+from . import chassis
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/chassis.py
new file mode 100644
index 000000000000..74a4a0ff899c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/chassis.py
@@ -0,0 +1,242 @@
+#############################################################################
+# PDDF
+# Module contains an implementation of SONiC Chassis API
+#
+#############################################################################
+
+try:
+    from sonic_platform_pddf_base.pddf_chassis import PddfChassis
+    import sys
+    import subprocess
+    import time
+    import os
+    import re
+    import shutil
+    from . import helper
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+NUM_SFP = 56
+GETREG_PATH="/sys/devices/platform/sys_cpld/getreg"
+SETREG_PATH="/sys/devices/platform/sys_cpld/setreg"
+SET_SYS_STATUS_LED="echo {} {} > {}"
+SET_SYS_STATUS_LED_IPMI="0x3A 0x39 0x02 0x00 {}"
+GET_REBOOT_CAUSE="echo '0xA107' > {} && cat {}".format(GETREG_PATH, GETREG_PATH)
+
+ORG_HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt"
+TMP_HW_REBOOT_CAUSE_FILE="/tmp/hw-reboot-cause.txt"
+
+BMC_EXIST = helper.APIHelper().is_bmc_present()
+
+class Chassis(PddfChassis):
+    """
+    PDDF Platform-specific Chassis class
+    """
+    sfp_status_dict={}
+
+    def __init__(self, pddf_data=None, pddf_plugin_data=None):
+        PddfChassis.__init__(self, pddf_data, pddf_plugin_data)
+
+        for port_idx in range(1, NUM_SFP+1):
+            present = self.get_sfp(port_idx).get_presence()
+            self.sfp_status_dict[port_idx] = '1' if present else '0'
+        
+        # Component firmware version initialization
+        from sonic_platform.component import Component
+        if BMC_EXIST:
+            NUM_COMPONENT = 10
+        else:
+            NUM_COMPONENT = 7
+        for i in range(0, NUM_COMPONENT):
+            component = Component(i)
+            self._component_list.append(component)
+    
+    def _getstatusoutput(self, cmd):
+        status = 0
+        ret, data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            status = ret
+        else:
+            return data
+
+        return status, data
+
+    def initizalize_system_led(self):
+        return True
+
+    def get_status_led(self):
+        return self.get_system_led("SYS_LED")
+
+    def set_status_led(self, color):     
+        if color == self.get_status_led():
+            return False
+
+        if BMC_EXIST:
+            sys_led_color_map = {
+                'off': '00',
+                'green': '01',
+                'amber': '02',
+                'amber_blink_1hz': '03',
+                'amber_blink_4hz': '04',
+                'green_blink_1hz': '05',
+                'green_blink_4hz': '06',
+                'alternate_blink_1hz': '07',
+                'alternate_blink_4hz': '08'
+            }
+            color_val = sys_led_color_map.get(color.lower(), None)
+            if color_val is None:
+                print("SYS LED color %s not support!" % color)
+                return False
+
+            status, _ = helper.APIHelper().ipmi_raw(SET_SYS_STATUS_LED_IPMI.format(color_val))
+            return status
+        else:
+            color_val="0xd0"
+            if color == "green":
+                color_val="0xd0"
+            elif color == "amber":
+                color_val="0xe0"
+
+            cmd=SET_SYS_STATUS_LED.format("0xA162", color_val, SETREG_PATH)
+            status, res = self._getstatusoutput(cmd)
+
+            if status != 0:
+                return False
+            else:
+                return True
+
+    def get_sfp(self, index):
+        """    
+        Retrieves sfp represented by (1-based) index <index>
+        For Quanta the index in sfputil.py starts from 1, so override
+        Args:
+            index: An integer, the index (1-based) of the sfp to retrieve.
+            The index should be the sequence of a physical port in a chassis,
+            starting from 1.
+        Returns:
+            An object dervied from SfpBase representing the specified sfp
+       """
+        sfp = None
+
+        try:
+            if (index == 0):
+                raise IndexError
+            sfp = self._sfp_list[index-1]
+        except IndexError:
+            sys.stderr.write("override: SFP index {} out of range (1-{})\n".format(
+                index, len(self._sfp_list)))
+
+        return sfp
+    
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+
+    def get_reboot_cause(self):
+        """
+        Retrieves the cause of the previous reboot
+        Returns:
+            A tuple (string, string) where the first element is a string
+            containing the cause of the previous reboot. This string must be
+            one of the predefined strings in this class. If the first string
+            is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
+            to pass a description of the reboot cause.
+        """
+        # Newer baseboard CPLD to get reboot cause from CPLD register
+        hw_reboot_cause = ""
+        status, hw_reboot_cause = self._getstatusoutput(GET_REBOOT_CAUSE)
+        if status != 0:
+            pass
+
+        # This tmp copy is to retain the reboot-cause only for the current boot
+        if os.path.isfile(ORG_HW_REBOOT_CAUSE_FILE):
+            shutil.move(ORG_HW_REBOOT_CAUSE_FILE, TMP_HW_REBOOT_CAUSE_FILE)
+
+        if hw_reboot_cause == "0x33" and os.path.isfile(TMP_HW_REBOOT_CAUSE_FILE):
+            with open(TMP_HW_REBOOT_CAUSE_FILE) as hw_cause_file:
+                reboot_info = hw_cause_file.readline().rstrip('\n')
+                match = re.search(r'Reason:(.*),Time:(.*)', reboot_info)
+                if match is not None:
+                    if match.group(1) == 'system':
+                        reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE
+                        description = 'System cold reboot'
+                        return (reboot_cause, description)
+
+        if hw_reboot_cause == "0x77":
+            reboot_cause = self.REBOOT_CAUSE_POWER_LOSS
+            description = 'Power Cycle Reset'
+        elif hw_reboot_cause == "0x66":
+            reboot_cause = self.REBOOT_CAUSE_WATCHDOG
+            description = 'Hardware Watchdog Reset'
+        elif hw_reboot_cause == "0x44":
+            reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE
+            description = 'CPU Warm Reset'
+        elif hw_reboot_cause == "0x33":
+            reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE
+            description = 'Soft-Set Cold Reset'
+        elif hw_reboot_cause == "0x22":
+            reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE
+            description = 'Soft-Set Warm Reset'
+        elif hw_reboot_cause == "0x11":
+            reboot_cause = self.REBOOT_CAUSE_POWER_LOSS
+            description = 'Power On Reset'
+        else:
+            reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER
+            description = 'Hardware reason'
+
+        return (reboot_cause, description)
+
+    def get_change_event(self, timeout=0):
+        sfp_dict = {} 
+                      
+        SFP_REMOVED = '0'
+        SFP_INSERTED = '1'
+                      
+        SFP_PRESENT = True
+        SFP_ABSENT = False
+                      
+        start_time = time.time()
+        time_period = timeout/float(1000) #Convert msecs to secs
+                      
+        while time.time() < (start_time + time_period) or timeout == 0:
+            for port_idx in range(1, NUM_SFP+1):
+                if self.sfp_status_dict[port_idx] == SFP_REMOVED and \
+                    self.get_sfp(port_idx).get_presence() == SFP_PRESENT:                                                                                                                                                            
+                    sfp_dict[port_idx] = SFP_INSERTED       
+                    self.sfp_status_dict[port_idx] = SFP_INSERTED
+                elif self.sfp_status_dict[port_idx] == SFP_INSERTED and \
+                    self.get_sfp(port_idx).get_presence() == SFP_ABSENT:
+                    sfp_dict[port_idx] = SFP_REMOVED        
+                    self.sfp_status_dict[port_idx] = SFP_REMOVED
+                      
+            if sfp_dict:
+                return True, {'sfp':sfp_dict}
+                      
+            time.sleep(0.5)
+                      
+        return True, {'sfp':{}} # Timeout 
+	
+    def get_watchdog(self):
+        """ 
+        Retreives hardware watchdog device on this chassis
+            
+        Returns:
+            An object derived from WatchdogBase representing the hardware
+            watchdog device
+        """
+        try:
+            if self._watchdog is None:
+                from sonic_platform.cpld_watchdog import Watchdog
+                # Create the watchdog Instance
+                self._watchdog = Watchdog()
+            
+        except Exception as e:                                                                                                                                                                                                       
+            print("Fail to load watchdog due to {}".format(e))
+        return self._watchdog
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision for the chassis
+        Returns:
+            A string containing the hardware revision for this chassis.
+        """
+        return self._eeprom.revision_str().encode('utf-8').hex()
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/component.py
new file mode 100644
index 000000000000..bfa9e49ab0f7
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/component.py
@@ -0,0 +1,214 @@
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica
+#
+# Component contains an implementation of SONiC Platform Base API and
+# provides the components firmware management function
+#
+#############################################################################
+
+import subprocess
+import re
+
+try:
+    from sonic_platform_base.component_base import ComponentBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+COMPONENT_LIST = [
+    ("BIOS",       "Basic input/output System"),
+    ("ONIE",       "Open Network Install Environment"),
+    ("BMC",        "Baseboard Management Controller"),
+    ("FPGA",       "FPGA for transceiver EEPROM access and other component I2C access"),
+    ("CPLD COMe",  "COMe board CPLD"),
+    ("CPLD BASE",  "CPLD for board functions, fan control and watchdog"),
+    ("CPLD SW1",   "CPLD for port control SFP(1-24)"),
+    ("CPLD SW2",   "CPLD for port control SFP(25-48), QSFP(49-56)"),
+    ("ASIC PCIe",  "ASIC PCIe Firmware"),
+    ("SSD",        "Solid State Drive - {}")
+]
+NAME_INDEX = 0
+DESCRIPTION_INDEX = 1
+
+BIOS_VERSION_CMD = "dmidecode -s bios-version"
+ONIE_VERSION_CMD = "cat /host/machine.conf"
+FPGA_VERSION_PATH = "/sys/bus/platform/devices/fpga_sysfs/version"
+COME_CPLD_VERSION_CMD = "cat /sys/devices/platform/sys_cpld/come_cpld_version"
+SWCPLD1_VERSION_CMD = "i2cget -y -f 102 0x30 0x0"
+SWCPLD2_VERSION_CMD = "i2cget -y -f 102 0x31 0x0"
+GETREG_PATH="/sys/devices/platform/sys_cpld/getreg"
+BASECPLD_VERSION_CMD="echo '0xA100' > {} && cat {}".format(GETREG_PATH, GETREG_PATH)
+BMC_PRESENCE="echo '0xA108' > {} && cat {}".format(GETREG_PATH, GETREG_PATH)
+SSD_VERSION_CMD = "smartctl -i /dev/sda"
+ASIC_PCIE_VERSION_CMD = "bcmcmd 'pciephy fw version' | grep 'PCIe FW version' | cut -d ' ' -f 4"
+
+UNKNOWN_VER = "Unknown"
+
+class Component():
+    """Platform-specific Component class"""
+
+    DEVICE_TYPE = "component"
+
+    def __init__(self, component_index):
+        ComponentBase.__init__(self)
+        self.index = component_index
+        self.name = self.get_name()
+
+    def __get_cpld_ver(self):
+        cpld_version_dict = dict()
+        cpld_ver_info = {
+            'CPLD BASE': self.__get_basecpld_ver(),
+            'CPLD SW1': self.__get_swcpld1_ver(),
+            'CPLD SW2': self.__get_swcpld2_ver(),
+            'CPLD COMe': self.__get_comecpld_ver()
+        }
+        for cpld_name, cpld_ver in cpld_ver_info.items():
+            cpld_ver_str = "{}.{}".format(int(cpld_ver[2], 16), int(
+                cpld_ver[3], 16)) if cpld_ver else UNKNOWN_VER
+            cpld_version_dict[cpld_name] = cpld_ver_str
+
+        return cpld_version_dict
+
+    def __get_asic_pcie_ver(self):
+        status, raw_ver=self.run_command(ASIC_PCIE_VERSION_CMD)
+        if status:
+            return raw_ver
+        else:
+            return UNKNOWN_VER
+
+    def __get_bios_ver(self):
+        status, raw_ver=self.run_command(BIOS_VERSION_CMD)
+        if status:
+            return raw_ver
+        else:
+            return UNKNOWN_VER
+
+    def __get_comecpld_ver(self):
+        status, raw_ver=self.run_command(COME_CPLD_VERSION_CMD)
+        if status:
+           return raw_ver
+        else:
+           return UNKNOWN_VER
+
+    def __get_basecpld_ver(self):
+        status, raw_ver=self.run_command(BASECPLD_VERSION_CMD)
+        if status:
+            return raw_ver
+        else:
+            return UNKNOWN_VER
+
+    def __get_swcpld1_ver(self):
+        status, raw_ver=self.run_command(SWCPLD1_VERSION_CMD)
+        if status:
+            return raw_ver
+        else:
+            return UNKNOWN_VER
+
+    def __get_swcpld2_ver(self):
+        status, raw_ver=self.run_command(SWCPLD2_VERSION_CMD)
+        if status:
+            return raw_ver
+        else:
+            return UNKNOWN_VER
+
+    def __get_bmc_presence(self):
+        status, raw_ver=self.run_command(BMC_PRESENCE)
+        if status and raw_ver == "0x00":
+            return True
+        else:
+            return False
+
+    def __get_bmc_ver(self):
+        cmd="ipmitool mc info | grep 'Firmware Revision'"
+        status, raw_ver=self.run_command(cmd)
+        if status:
+            bmc_ver=raw_ver.split(':')[-1].strip()
+            return {"BMC":bmc_ver}
+        else:
+            return {"BMC":"N/A"}
+
+    def __get_fpga_version(self):
+        status, fpga_version = self.run_command("cat %s" % FPGA_VERSION_PATH)
+        if not status:
+            return UNKNOWN_VER
+        return fpga_version.replace("0x", "")
+
+    def __get_onie_ver(self):
+        onie_ver = "N/A"
+        status, raw_onie_data = self.run_command(ONIE_VERSION_CMD)
+        if status:
+            ret = re.search(r"(?<=onie_version=).+[^\n]", raw_onie_data)
+            if ret != None:
+                onie_ver = ret.group(0)
+        return onie_ver
+
+    def __get_ssd_ver(self):
+        ssd_ver = "N/A"
+        status, raw_ssd_data = self.run_command(SSD_VERSION_CMD)
+        if status:
+            ret = re.search(r"Firmware Version: +(.*)[^\\]", raw_ssd_data)
+            if ret != None:
+                ssd_ver = ret.group(1)
+        return ssd_ver
+
+    def __get_ssd_desc(self, desc_format):
+        description = "N/A"
+        status, raw_ssd_data = self.run_command(SSD_VERSION_CMD)
+        if status:
+            ret = re.search(r"Device Model: +(.*)[^\\]", raw_ssd_data)
+            if ret != None:
+                try:
+                    description = desc_format.format(ret.group(1))
+                except (IndexError):
+                    pass
+        return description
+
+    def get_name(self):
+        """
+        Retrieves the name of the component
+         Returns:
+            A string containing the name of the component
+        """
+        return COMPONENT_LIST[self.index][NAME_INDEX]
+
+    def get_description(self):
+        """
+        Retrieves the description of the component
+            Returns:
+            A string containing the description of the component
+        """
+        # For SSD get the model name from device
+        if self.get_name() == "SSD":
+            return self.__get_ssd_desc(COMPONENT_LIST[self.index][1])
+
+        return COMPONENT_LIST[self.index][DESCRIPTION_INDEX]
+
+    def get_firmware_version(self):
+        """
+        Retrieves the firmware version of module
+        Returns:
+            string: The firmware versions of the module
+        """
+        fw_version_info = {
+            "ONIE": self.__get_onie_ver(),
+            "SSD": self.__get_ssd_ver(),
+            "BIOS": self.__get_bios_ver(),
+            "FPGA": self.__get_fpga_version(),
+            "ASIC PCIe": self.__get_asic_pcie_ver(),
+        }
+        fw_version_info.update(self.__get_cpld_ver())
+        if self.__get_bmc_presence():
+            fw_version_info.update(self.__get_bmc_ver())
+        return fw_version_info.get(self.name, UNKNOWN_VER)
+   
+    def run_command(self, cmd):
+        status = True
+        result = ""
+        ret, data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            status = False
+        else:
+            result = data
+
+        return status, result
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/cpld_watchdog.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/cpld_watchdog.py
new file mode 100644
index 000000000000..b828dbf65887
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/cpld_watchdog.py
@@ -0,0 +1,228 @@
+#!/usr/bin/env python
+
+#############################################################################
+#
+# Watchdog contains an implementation of SONiC Platform Base Watchdog API
+#
+#############################################################################
+try:
+    import ctypes
+    import fcntl
+    import os
+    import subprocess
+    import time
+    import array
+    import syslog
+    from .helper import APIHelper
+    from sonic_platform_base.watchdog_base import WatchdogBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+LPC_CPLD_GETREG_PATH = "/sys/bus/platform/devices/sys_cpld/getreg"
+LPC_CPLD_SETREG_PATH = "/sys/bus/platform/devices/sys_cpld/setreg"
+LPC_WDT_SET_TIMER_L_REG = '0xa183'
+LPC_WDT_SET_TIMER_M_REG = '0xa182'
+LPC_WDT_SET_TIMER_H_REG = '0xa181'
+LPC_WDT_TIMER_L_REG = '0xa186'
+LPC_WDT_TIMER_M_REG = '0xa185'
+LPC_WDT_TIMER_H_REG = '0xa184'
+LPC_WDT_CTRL_REG = '0xa187'
+LPC_WDT_ARM_REG = '0xa188'
+
+WDT_ENABLE = 0x1
+WDT_DISABLE = 0x0
+WDT_COMMON_ERROR = -1
+DEFAULT_TIMEOUT = 180
+
+class CpldWatchdog(WatchdogBase):
+
+    def __init__(self):
+        WatchdogBase.__init__(self)
+        # Set default value
+        self._api_helper = APIHelper()
+        self._ka_count = int(1)
+        self.armed = True if self._active() else False
+        self.timeout = self._gettimeout() if self.armed else DEFAULT_TIMEOUT
+        #self._disable()
+
+    def _lpc_get(self, reg):
+        return self._api_helper.lpc_getreg(LPC_CPLD_GETREG_PATH, reg)
+
+    def _lpc_set(self, reg, val):
+        if type(val) is int:
+            val = hex(val)
+        return self._api_helper.lpc_setreg(LPC_CPLD_SETREG_PATH, reg, val)
+
+    def _active(self):
+        """
+        WDT is active or not
+        """
+        data = self._lpc_get(LPC_WDT_CTRL_REG)
+        return True if data == "0x01" else False
+
+    def _enable(self):
+        """
+        Turn on the watchdog timer
+        """
+        status = self._lpc_set(LPC_WDT_CTRL_REG, WDT_ENABLE)
+        if not status:
+            pass
+
+    def _disable(self):
+        """
+        Turn off the watchdog timer
+        """
+        status = self._lpc_set(LPC_WDT_CTRL_REG, WDT_DISABLE)
+        if not status:
+            pass
+
+    def _keepalive(self):
+        """
+        Keep alive watchdog timer
+        """
+        if bool(self._ka_count % 2):
+            status = self._lpc_set(LPC_WDT_ARM_REG, WDT_ENABLE)
+        else:
+            status = self._lpc_set(LPC_WDT_ARM_REG, WDT_DISABLE)
+
+        if not status:
+            syslog.syslog(syslog.LOG_ERR, "Feed Watchdog failed")
+
+        self._ka_count = self._ka_count + 1
+        if (self._ka_count >= 11):
+            self._ka_count = 1
+
+    def _settimeout(self, seconds):
+        """
+        Set watchdog timer timeout
+        @param seconds - timeout in seconds
+        @return is the actual set timeout
+        """
+        ms = seconds * 1000
+        ms_low_byte = ms & 0xff
+        ms_media_byte = (ms >> 8) & 0xff
+        ms_high_byte = (ms >> 16) & 0xff
+        self._lpc_set(LPC_WDT_SET_TIMER_L_REG, ms_low_byte)
+        self._lpc_set(LPC_WDT_SET_TIMER_M_REG, ms_media_byte)
+        self._lpc_set(LPC_WDT_SET_TIMER_H_REG, ms_high_byte)
+        return self._gettimeout()
+
+    def _gettimeout(self):
+        """
+        Get watchdog timeout
+        @return watchdog timeout
+        """
+        data = [0, 0, 0]
+        data[0] = self._lpc_get(LPC_WDT_SET_TIMER_L_REG)
+        data[1] = self._lpc_get(LPC_WDT_SET_TIMER_M_REG)
+        data[2] = self._lpc_get(LPC_WDT_SET_TIMER_H_REG)
+        seconds = int((int(data[2], 16) << 16
+                | int(data[1], 16) << 8
+                | int(data[0], 16)) / 1000)
+        return seconds
+
+    def _gettimeleft(self):
+        """
+        Get time left before watchdog timer expires
+        @return time left in seconds
+        """
+        data = [0, 0, 0]
+        data[0] = self._lpc_get(LPC_WDT_TIMER_L_REG)
+        data[1] = self._lpc_get(LPC_WDT_TIMER_M_REG)
+        data[2] = self._lpc_get(LPC_WDT_TIMER_H_REG)
+        seconds = int((int(data[2], 16) << 16
+                | int(data[1], 16) << 8
+                | int(data[0], 16)) / 1000)
+
+        return seconds
+
+    #################################################################
+
+    def arm(self, seconds):
+        """
+        Arm the hardware watchdog with a timeout of <seconds> seconds.
+        If the watchdog is currently armed, calling this function will
+        simply reset the timer to the provided value. If the underlying
+        hardware does not support the value provided in <seconds>, this
+        method should arm the watchdog with the *next greater* available
+        value.
+        Returns:
+            An integer specifying the *actual* number of seconds the watchdog
+            was armed with. On failure returns -1.
+        """
+
+        ret = WDT_COMMON_ERROR
+        if seconds < 0:
+            return ret
+
+        try:
+            if self.armed:
+                self._keepalive()
+                if self.timeout != seconds:
+                    self._disable()
+                    time.sleep(1)
+                    self.timeout = self._settimeout(seconds)
+                    self._enable()
+            else:
+                self.timeout = self._settimeout(seconds)
+                self._keepalive()
+                self._enable()
+                self.armed = True
+
+            ret = self.timeout
+        except IOError as e:
+            pass
+        return ret
+
+    def disarm(self):
+        """
+        Disarm the hardware watchdog
+        Returns:
+            A boolean, True if watchdog is disarmed successfully, False if not
+        """
+        disarmed = False
+        if self.is_armed():
+            try:
+                self._disable()
+                self.armed = False
+                disarmed = True
+            except IOError:
+                pass
+
+        return disarmed
+
+    def is_armed(self):
+        """
+        Retrieves the armed state of the hardware watchdog.
+        Returns:
+            A boolean, True if watchdog is armed, False if not
+        """
+
+        return self.armed
+
+    def get_remaining_time(self):
+        """
+        If the watchdog is armed, retrieve the number of seconds remaining on
+        the watchdog timer
+        Returns:
+            An integer specifying the number of seconds remaining on thei
+            watchdog timer. If the watchdog is not armed, returns -1.
+        """
+
+        timeleft = WDT_COMMON_ERROR
+
+        if self.armed:
+            try:
+                timeleft = self._gettimeleft()
+            except IOError:
+                pass
+
+        return timeleft
+
+class Watchdog(CpldWatchdog):
+    """PDDF Platform-Specific Watchdog Class"""
+
+    def __init__(self):
+        CpldWatchdog.__init__(self)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/eeprom.py
new file mode 100644
index 000000000000..7550fed99950
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/eeprom.py
@@ -0,0 +1,78 @@
+try:
+    from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom
+    import os
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+EEPROM_TMP_FILE = '/tmp/eeprom_dump.bin'
+
+class Eeprom(PddfEeprom):
+
+    _TLV_DISPLAY_VENDOR_EXT = True
+    _TLV_INFO_MAX_LEN = 256
+    pddf_obj = {}
+    plugin_data = {}
+
+    def __init__(self, pddf_data=None, pddf_plugin_data=None):
+        if not pddf_data or not pddf_plugin_data:
+            raise ValueError('PDDF JSON data error')
+
+        self.pddf_obj = pddf_data
+        self.plugin_data = pddf_plugin_data
+
+        # system EEPROM always has device name EEPROM1
+        self.eeprom_path = self.pddf_obj.get_path("EEPROM1", "eeprom")
+        if self.eeprom_path is None:
+            return
+
+        super(PddfEeprom, self).__init__(self.eeprom_path, 0, '', True)
+        self.eeprom_tlv_dict = dict()
+
+        try:
+            if os.path.exists(EEPROM_TMP_FILE):
+                with open(EEPROM_TMP_FILE, 'rb') as b_fd:
+                    self.eeprom_data = bytearray(b_fd.read())
+            else:
+                self.eeprom_data = self.read_eeprom()
+                with open(EEPROM_TMP_FILE, 'wb') as b_fd:
+                    b_fd.write(self.eeprom_data)
+                os.chmod(EEPROM_TMP_FILE, 0o444)
+        except Exception as e:
+            self.eeprom_data = "N/A"
+            raise RuntimeError("PddfEeprom is not Programmed - Error: {}".format(str(e)))
+        else:
+            eeprom = self.eeprom_data
+
+            if not self.is_valid_tlvinfo_header(eeprom):
+                return
+
+            total_length = ((eeprom[9]) << 8) | (eeprom[10])
+            tlv_index = self._TLV_INFO_HDR_LEN
+            tlv_end = self._TLV_INFO_HDR_LEN + total_length
+
+            while (tlv_index + 2) < self._TLV_INFO_MAX_LEN and tlv_index < tlv_end:
+                if not self.is_valid_tlv(eeprom[tlv_index:]):
+                    break
+
+                tlv = eeprom[tlv_index:tlv_index + 2
+                             + (eeprom[tlv_index + 1])]
+                code = "0x%02X" % ((tlv[0]))
+
+                if (tlv[0]) == self._TLV_CODE_VENDOR_EXT:
+                    name = "Vendor Extension"
+                    value = ""
+                    if self._TLV_DISPLAY_VENDOR_EXT:
+                       for c in tlv[2:2 + tlv[1]]:
+                           value += "0x%02X " % c
+                else:
+                    name, value = self.decoder(None, tlv)
+
+                self.eeprom_tlv_dict[code] = value
+                if (eeprom[tlv_index]) == self._TLV_CODE_CRC_32:
+                    break
+
+                tlv_index += (eeprom[tlv_index+1]) + 2
+
+
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/fan.py
new file mode 100644
index 000000000000..1edef7f9f458
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/fan.py
@@ -0,0 +1,192 @@
+import os
+
+try:
+    from sonic_platform_pddf_base.pddf_fan import PddfFan
+    from .helper import APIHelper
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+SET_FAN_STATUS_LED_CMD = "0x3A 0x39 0x02 {} {}"
+BMC_EXIST = APIHelper().is_bmc_present()
+
+class Fan(PddfFan):
+    """PDDF Platform-Specific Fan class"""
+
+    def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0):
+        # idx is 0-based 
+        PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index)
+        self.helper = APIHelper()
+
+    def get_presence(self):
+        """
+          Retrieves the presence of fan
+        """
+        if self.is_psu_fan:
+            from sonic_platform.platform import Platform
+            return Platform().get_chassis().get_psu(self.fans_psu_index-1).get_presence()
+
+        return super().get_presence()
+   
+    def get_direction(self):
+        """
+          Retrieves the direction of fan
+ 
+          Returns:
+               A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
+               depending on fan direction
+               Or N/A if fan removed or abnormal
+        """
+        if not self.get_status():
+           return 'N/A'
+ 
+        return super().get_direction()
+
+
+    def get_target_speed(self):
+        """
+        Retrieves the target (expected) speed of the fan
+
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        target_speed = 0
+        if self.is_psu_fan:
+            # Target speed not usually supported for PSU fans
+            raise NotImplementedError
+        else:
+            fan_name = self.get_name()
+            f_r_fan = "Front" if fan_name.endswith("1") else "Rear"
+            speed_rpm = self.get_speed_rpm()
+            if(self.plugin_data['FAN']['FAN_MAX_RPM_SPEED'][f_r_fan].isnumeric()):
+                max_fan_rpm = int(self.plugin_data['FAN']['FAN_MAX_RPM_SPEED'][f_r_fan])
+            else:
+                return target_speed
+            speed_percentage = round(int((speed_rpm * 100) / max_fan_rpm))
+            target_speed = speed_percentage
+
+        return target_speed
+
+    def get_speed(self):
+        """
+        Retrieves the speed of fan as a percentage of full speed
+
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        fan_name = self.get_name()
+        if self.is_psu_fan:
+            attr = "psu_fan{}_speed_rpm".format(self.fan_index)
+            device = "PSU{}".format(self.fans_psu_index)
+            output = self.pddf_obj.get_attr_name_output(device, attr)
+            if not output:
+                return 0
+
+            output['status'] = output['status'].rstrip()
+            if output['status'].isalpha():
+                return 0
+            else:
+                speed = int(float(output['status']))
+
+            max_speed = int(self.plugin_data['PSU']['PSU_FAN_MAX_SPEED'])
+            speed_percentage = round((speed*100)/max_speed)
+            if speed_percentage >= 100:
+                speed_percentage = 100
+            return speed_percentage
+        else:
+            idx = (self.fantray_index-1)*self.platform['num_fans_pertray'] + self.fan_index
+            attr = "fan" + str(idx) + "_input"
+            output = self.pddf_obj.get_attr_name_output("FAN-CTRL", attr)
+
+            if not output:
+                return 0
+
+            output['status'] = output['status'].rstrip()
+            if output['status'].isalpha():
+                return 0
+            else:
+                speed = int(float(output['status']))
+
+            f_r_fan = "Front" if fan_name.endswith("1") else "Rear"
+            if(self.plugin_data['FAN']['FAN_MAX_RPM_SPEED'][f_r_fan].isnumeric()):
+                max_speed = int(self.plugin_data['FAN']['FAN_MAX_RPM_SPEED'][f_r_fan])
+            else:
+                return 0;
+            speed_percentage = round((speed*100)/max_speed)
+            if speed_percentage >= 100:
+                speed_percentage = 100
+
+            return speed_percentage
+
+    def get_status_led(self):
+        if not self.get_presence():
+            return self.STATUS_LED_COLOR_OFF
+        if self.is_psu_fan:
+            # Usually no led for psu_fan hence raise a NotImplementedError
+            raise NotImplementedError
+        else:
+            fan_led_device = "FANTRAY{}".format(self.fantray_index) + "_LED"
+            if (not fan_led_device in self.pddf_obj.data.keys()):
+                # Implement a generic status_led color scheme
+                if self.get_status():
+                    return self.STATUS_LED_COLOR_GREEN
+                else:
+                    return self.STATUS_LED_COLOR_OFF
+
+            result, color = self.pddf_obj.get_system_led_color(fan_led_device)
+            return (color)
+
+    def is_under_speed(self):
+        speed = float(self.get_speed())
+        target_speed = float(self.get_target_speed())
+        speed_tolerance = self.get_speed_tolerance()
+
+        speed_min_th = target_speed * (1 - float(speed_tolerance) / 100)
+        if speed < speed_min_th:
+            return True
+        else:
+            return False
+
+    def is_over_speed(self):
+        speed = float(self.get_speed())
+        target_speed = float(self.get_target_speed())
+        speed_tolerance = self.get_speed_tolerance()
+
+        speed_max_th = target_speed * (1 + float(speed_tolerance) / 100)
+        if speed > speed_max_th:
+            return True
+        else:
+            return False
+
+    def set_status_led(self,color):
+        if self.is_psu_fan:
+            return super().set_status_led(color)
+
+        if color == self.get_status_led():
+            return False
+
+        if BMC_EXIST:
+            fan_led_color_map = {
+                'off': '00',
+                'green': '01',
+                'amber': '02',
+                'red': '02'
+            }
+
+            fan_index_val = hex(self.fantray_index + 3)
+
+            color_val = fan_led_color_map.get(color.lower(), None)
+
+            if fan_index_val is None:
+                return False
+
+            if color_val is None:
+                return False
+
+            status, _ = self.helper.ipmi_raw(SET_FAN_STATUS_LED_CMD.format(fan_index_val,color_val))
+
+            return status
+        else:
+            return self.set_system_led("SYS_LED", color)
+
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/fan_drawer.py
new file mode 100644
index 000000000000..3b9bb607f632
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/fan_drawer.py
@@ -0,0 +1,17 @@
+#!/usr/bin/env python
+
+
+try:
+    from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class FanDrawer(PddfFanDrawer):
+    """PDDF Platform-Specific Fan-Drawer class"""
+
+    def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None):
+        # idx is 0-based 
+        PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/helper.py
new file mode 100644
index 000000000000..58451d4011bf
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/helper.py
@@ -0,0 +1,143 @@
+import fcntl
+import os
+import struct
+import subprocess
+from mmap import *
+
+GETREG_PATH="/sys/devices/platform/sys_cpld/getreg"
+BMC_PRESENCE="echo '0xA108' > {} && cat {}".format(GETREG_PATH, GETREG_PATH)
+
+class APIHelper():
+    def pci_get_value(self, resource, offset):
+        status = True
+        result = ""
+        try:
+            fd = os.open(resource, os.O_RDWR)
+            mm = mmap(fd, 0)
+            mm.seek(int(offset))
+            read_data_stream = mm.read(4)
+            result = struct.unpack('I', read_data_stream)
+        except:
+            status = False
+        return status, result
+
+    def get_cmd_output(self, cmd):
+        status = 0
+        ret, data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            status = ret
+
+        return status, data
+
+    def read_txt_file(self, file_path):
+        try:
+            with open(file_path, 'r') as fd:
+                data = fd.read()
+                return data.strip()
+        except IOError:
+            pass
+        return None
+
+    def read_one_line_file(self, file_path):
+        try:
+            with open(file_path, 'r') as fd:
+                data = fd.readline()
+                return data.strip()
+        except IOError:
+            pass
+        return None
+
+    def write_txt_file(self, file_path, value):
+        try:
+            with open(file_path, 'w') as fd:
+                fd.write(str(value))
+        except Exception:
+            return False
+        return True
+
+    def lpc_getreg(self, getreg_path, reg):
+        """
+        Get the cpld reg through lpc interface
+
+        Args:
+            getreg_path: getreg sysfs path
+            reg: 16 bits reg addr in hex str format
+
+        Returns:
+            A str, register value in hex str format
+        """
+        file = open(getreg_path, 'w+')
+        # Acquire an exclusive lock on the file
+        fcntl.flock(file, fcntl.LOCK_EX)
+
+        try:
+            file.write(reg)
+            file.flush()
+
+            # Seek to the beginning of the file
+            file.seek(0)
+
+            # Read the content of the file
+            result = file.readline().strip()
+        finally:
+            # Release the lock and close the file
+            fcntl.flock(file, fcntl.LOCK_UN)
+            file.close()
+
+        return result
+
+    def lpc_setreg(self, setreg_path, reg, val):
+        """
+        Set the cpld reg through lpc interface
+
+        Args:
+            setreg_path: setreg sysfs path
+            reg: 16 bits reg addr in hex str format
+            val: 8 bits register value in hex str format
+
+        Returns:
+            A boolean, True if speed is set successfully, False if not
+        """
+        status = True
+        file = open(setreg_path, 'w')
+        # Acquire an exclusive lock on the file
+        fcntl.flock(file, fcntl.LOCK_EX)
+
+        try:
+            data = "{} {}".format(reg, val)
+            file.write(data)
+            file.flush()
+        except:
+            status = False
+        finally:
+            # Release the lock and close the file
+            fcntl.flock(file, fcntl.LOCK_UN)
+            file.close()
+
+        return status
+
+    @staticmethod
+    def ipmi_raw(cmd):
+        status = True
+        result = ""
+        cmd = "ipmitool raw {}".format(str(cmd))
+        ret, raw_data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            status = False
+        else:
+            result = raw_data
+
+        return status, result
+
+    def is_bmc_present(self):
+        """
+        Get the BMC card present status
+
+        Returns:
+            A boolean, True if present, False if absent
+        """
+        status, presence = self.get_cmd_output(BMC_PRESENCE)
+        if status == 0 and presence == "0x00":
+            return True
+        else:
+            return False
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/platform.py
new file mode 100644
index 000000000000..8595e80692df
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/platform.py
@@ -0,0 +1,23 @@
+#############################################################################
+# PDDF
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
+#
+#############################################################################
+
+
+try:
+    from sonic_platform_pddf_base.pddf_platform import PddfPlatform
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Platform(PddfPlatform):
+    """
+    PDDF Platform-Specific Platform Class
+    """
+
+    def __init__(self):
+        PddfPlatform.__init__(self)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/psu.py
new file mode 100644
index 000000000000..2bfee698b244
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/psu.py
@@ -0,0 +1,33 @@
+try:
+    from sonic_platform_pddf_base.pddf_psu import PddfPsu
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+
+class Psu(PddfPsu):
+    """PDDF Platform-Specific PSU class"""
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
+        PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data)
+        
+    # Provide the functions/variables below for which implementation is to be overwritten
+    def get_capacity(self):
+        return 550
+
+    def get_type(self):
+        return 'AC'
+
+    def get_voltage_low_threshold(self):
+        return 4
+
+    def get_voltage_high_threshold(self):
+        return 13
+
+    def get_status_led(self):
+        if self.get_presence():
+            if self.get_powergood_status():
+                return self.STATUS_LED_COLOR_GREEN
+            else:
+                return self.STATUS_LED_COLOR_AMBER
+        else:
+            return self.STATUS_LED_COLOR_OFF
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/sfp.py
new file mode 100644
index 000000000000..418222cea7cc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/sfp.py
@@ -0,0 +1,110 @@
+#!/usr/bin/env python
+
+try:
+    import ast
+    from sonic_platform_pddf_base.pddf_sfp import PddfSfp
+    from sonic_platform_base.sonic_xcvr.api.public.c_cmis import CmisApi
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+
+class Sfp(PddfSfp):
+    """
+    PDDF Platform-Specific Sfp class
+    """
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
+        PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+    
+    def reset(self):
+        if self.port_index > 0 and self.port_index < 49:
+            return False
+        return super().reset()
+
+    def get_presence(self):
+        presence = PddfSfp.get_presence(self)
+        if not presence and self._xcvr_api != None:
+            self._xcvr_api = None
+
+        return presence
+
+    def get_xcvr_api(self):
+        if self._xcvr_api is None and self.get_presence():
+            self.refresh_xcvr_api()
+
+            # Find and update the right optoe driver
+            api_to_driver_map = {\
+                'Sff8636Api': 'optoe1',\
+                'Sff8472Api': 'optoe2',\
+                'CmisApi': 'optoe3',\
+                'CCmisApi': 'optoe3',\
+                'Sff8436Api': 'sff8436'\
+            }
+            create_dev = False
+            path_list = self.eeprom_path.split('/')
+            name_path = '/'.join(path_list[:-1]) + '/name'
+            del_dev_path = '/'.join(path_list[:-2]) + '/delete_device'
+            new_dev_path = '/'.join(path_list[:-2]) + '/new_device'
+            api_name = type(self._xcvr_api).__name__
+            new_driver = api_to_driver_map.get(api_name, 'optoe1')
+
+            try:
+                with open(name_path, 'r') as fd:
+                    cur_driver = fd.readline().strip()
+            except FileNotFoundError:
+                create_dev = True
+            else:
+                if cur_driver != new_driver:
+                    with open(del_dev_path, 'w') as fd:
+                        fd.write("0x50")
+                    create_dev = True
+
+            if create_dev:
+                with open(new_dev_path, 'w') as fd:
+                    fd.write("{} 0x50".format(new_driver))
+
+            if api_name == 'Sff8636Api' or \
+                api_name == 'Sff8436Api':
+                self.write_eeprom(93,1,bytes([0x04]))
+
+        return self._xcvr_api
+
+    def get_platform_media_key(self, transceiver_dict, port_speed, lane_count):
+        api = self.get_xcvr_api()
+        api_name = type(api).__name__
+        if api_name in ['CmisApi', 'CCmisApi']:
+            is_cmis = True
+        else:
+            is_cmis = False
+
+        # Per lane speed
+        media_key = str(int(port_speed / lane_count))
+        if is_cmis:
+            media_compliance_code = transceiver_dict['specification_compliance']
+            if 'copper' in media_compliance_code:
+                media_len = transceiver_dict['cable_length']
+                media_key += '-copper-' + str(media_len) + 'M'
+            else:
+                media_key += '-optical'
+        else:
+            media_compliance_dict = ast.literal_eval(transceiver_dict['specification_compliance'])
+            eth_compliance_str = '10/40G Ethernet Compliance Code'
+            ext_compliance_str = 'Extended Specification Compliance'
+            media_compliance_code = ''
+            if eth_compliance_str in media_compliance_dict:
+                media_compliance_code = media_compliance_dict[eth_compliance_str]
+            if ext_compliance_str in media_compliance_dict:
+                media_compliance_code = media_compliance_code + ' ' + media_compliance_dict[ext_compliance_str]
+            if 'CR' in media_compliance_code or "copper" in transceiver_dict['specification_compliance'].lower():
+                media_len = transceiver_dict['cable_length']
+                media_key += '-copper-' + str(media_len) + 'M'
+            else:
+                media_key += '-optical'
+
+        return {\
+            'vendor_key': '',\
+            'media_key': media_key,\
+            'lane_speed_key': ''\
+        }
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/thermal.py
new file mode 100644
index 000000000000..0ead57d0bb30
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/thermal.py
@@ -0,0 +1,13 @@
+try:
+    from sonic_platform_pddf_base.pddf_thermal import PddfThermal
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+
+class Thermal(PddfThermal):
+    """PDDF Platform-Specific Thermal class"""
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0):
+        PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) 
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/watchdog.py
new file mode 100644
index 000000000000..1bfd5faaea75
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/pddf/sonic_platform/watchdog.py
@@ -0,0 +1,15 @@
+try:
+    from sonic_platform_pddf_base.pddf_watchdog import PddfWatchdog
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+
+class Watchdog(PddfWatchdog):
+    """PDDF Platform-Specific Watchdog Class"""
+
+    def __init__(self):
+        PddfWatchdog.__init__(self)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/ds2000_platform_shutdown.sh b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/ds2000_platform_shutdown.sh
new file mode 100644
index 000000000000..f0f6e3523c11
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/ds2000_platform_shutdown.sh
@@ -0,0 +1,42 @@
+#!/bin/bash
+REBOOT_CAUSE_DIR="/host/reboot-cause"
+HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt"
+REBOOT_TIME=$(date)
+
+if [ $# -ne 1 ]; then
+    echo "Require reboot type"
+    exit 1
+fi
+
+if [ ! -d "$REBOOT_CAUSE_DIR" ]; then
+    mkdir $REBOOT_CAUSE_DIR
+fi
+
+echo "Reason:$1,Time:${REBOOT_TIME}" > ${HW_REBOOT_CAUSE_FILE}
+
+# Best effort to write buffered data onto the disk
+sync ; sync ; sync ; sleep 3
+
+# Get BMC mode
+GETREG_PATH="/sys/devices/platform/sys_cpld/getreg"
+BMC_PRESENCE=`echo '0xA108' > $GETREG_PATH && cat $GETREG_PATH`
+echo "BMC card ${BMC_PRESENCE}"
+
+if [ ${BMC_PRESENCE} == "0x00" ]; then
+    # Set all LEDs to BMC's control
+    ipmitool raw 0x3a 0x42 0x02 0x01 &> /dev/null
+
+    # BMC cold power-cyle
+    ipmitool chassis power cycle &> /dev/null
+else
+    # Set System LED to booting pattern
+    i2cset -f -y 100 0x0d 0x62 0x02 &> /dev/null
+
+    # CPLD cold power-cyle
+    i2cset -f -y 100 0x0d 0x64 0x00 &> /dev/null
+fi
+
+# System should reboot by now and avoid the script returning to caller
+sleep 10
+
+exit 0
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pddf_post_device_create.sh
new file mode 100755
index 000000000000..fa09e6e686a4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pddf_post_device_create.sh
@@ -0,0 +1,26 @@
+#!/bin/bash
+# Set SYS_LED to Green, assuming everything came up fine.
+#ipmitool raw 0x3A 0x0C 0x00 0x03 0x62 0xdc
+
+# Enable thermal shutdown by default
+#i2cset -y -f 103 0x0d 0x75 0x1
+
+# Load fpga extend driver after fpga device created
+modprobe pddf_custom_fpga_extend
+
+SETREG_PATH="/sys/devices/platform/sys_cpld/setreg"
+GETREG_PATH="/sys/devices/platform/sys_cpld/getreg"
+BMC_PRESENCE=`echo '0xA108' > $GETREG_PATH && cat $GETREG_PATH`
+#Set off Alarm LED
+if [ ${BMC_PRESENCE} == "0x00" ]; then
+    # Set all LEDs to Manual control
+    ipmitool raw 0x3a 0x42 0x02 0x00 &> /dev/null
+
+    # Set Alarm LED to OFF
+    ipmitool raw 0x3a 0x39 0x02 0x01 0x00 &> /dev/null
+else
+    i2cset -f -y 100 0x0d 0x63 0x33 &> /dev/null
+fi
+
+# enable FPGA control port status
+echo '0xA130 0x01' > ${SETREG_PATH}
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pddf_pre_driver_install.sh
new file mode 100755
index 000000000000..9a8cb8a46e39
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pddf_pre_driver_install.sh
@@ -0,0 +1,14 @@
+#!/bin/bash
+# Has customized those drivers,so rename them to lose effect
+psu_driver=pddf_psu_driver_module.ko
+fan_driver=pddf_fan_driver_module.ko
+ker_name=$(uname -r)
+driver_path=/usr/lib/modules/${ker_name}/extra/
+if [ -e ${driver_path}${psu_driver} ]; then
+    mv ${driver_path}${psu_driver} ${driver_path}${psu_driver}-bk
+fi
+
+#if [ -e ${driver_path}${fan_driver} ]; then
+#    mv ${driver_path}${fan_driver} ${driver_path}${fan_driver}-bk
+#fi
+echo 'pddf psu,fan driver module has rename now'
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/platform_sensors.py
new file mode 100644
index 000000000000..1a2c682234c5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/platform_sensors.py
@@ -0,0 +1,178 @@
+#!/usr/bin/python
+#
+# Silverstone-v2 platform sensors. This script get the sensor data from BMC 
+# using ipmitool and display them in lm-sensor alike format.
+#
+# The following data is support:
+#  1. Temperature sensors
+#  2. PSUs
+#  3. Fan Drawers
+
+import sys
+import logging
+import subprocess
+
+IPMI_SDR_CMD = ['/usr/bin/ipmitool', 'sdr', 'elist']
+MAX_NUM_FANS = 4
+MAX_NUM_PSUS = 2
+
+SENSOR_NAME = 0
+SENSOR_VAL = 4
+
+sensor_dict = {}
+
+def ipmi_sensor_dump(cmd):
+    ''' Execute ipmitool command return dump output
+        exit if any error occur.
+    '''
+    global sensor_dict
+    sensor_dump = ''
+
+    try:
+        sensor_dump = subprocess.check_output(IPMI_SDR_CMD, universal_newlines=True)
+    except subprocess.CalledProcessError as e:
+        logging.error('Error! Failed to execute: {}'.format(cmd))
+        sys.exit(1)
+
+    for line in sensor_dump.splitlines():
+        sensor_info = line.split('|')
+        sensor_dict[sensor_info[SENSOR_NAME].strip()] = sensor_info[SENSOR_VAL].strip()
+
+    return True
+
+def get_reading_by_name(sensor_name, sdr_elist_dump):
+    '''
+        Search for the match sensor name, return sensor
+        reading value and unit, return object epmtry string 
+        if search not match.
+
+        The output of sensor dump:
+        TEMP_FB_U52      | 00h | ok  |  7.1 | 31 degrees C
+        TEMP_FB_U17      | 01h | ok  |  7.1 | 27 degrees C
+        TEMP_SW_U52      | 02h | ok  |  7.1 | 30 degrees C
+        Fan2_Status      | 07h | ok  | 29.2 | Present
+        Fan2_Front       | 0Eh | ok  | 29.2 | 12000 RPM
+        Fan2_Rear        | 46h | ok  | 29.2 | 14700 RPM
+        PSU2_Status      | 39h | ok  | 10.2 | Presence detected
+        PSU2_Fan         | 3Dh | ok  | 10.2 | 16000 RPM
+        PSU2_VIn         | 3Ah | ok  | 10.2 | 234.30 Volts
+        PSU2_CIn         | 3Bh | ok  | 10.2 | 0.80 Amps
+    '''
+    found = ''
+
+    for line in sdr_elist_dump.splitlines():
+        line = line.decode()
+        if sensor_name in line:
+            found = line.strip()
+            break
+
+    if not found:
+        logging.error('Cannot find sensor name:' + sensor_name)
+
+    else:
+        try:
+            found = found.split('|')[4]
+        except IndexError:
+            logging.error('Cannot get sensor data of:' + sensor_name)
+
+    logging.basicConfig(level=logging.DEBUG)
+    return found
+
+
+def read_temperature_sensors():
+    sensor_list = [\
+        ('Base_Temp_U5',     'Baseboard Left Temp'),\
+        ('Base_Temp_U56',    'Baseboard Right Temp'),\
+        ('Switch_Temp_U28',  'Switchboard Left Temp'),\
+        ('Switch_Temp_U29',  'Switchboard Right Temp'),\
+        ('CPU_Temp',         'CPU Internal Temp'),\
+        ('Switch_Temp_U30',  'ASIC External Rear Temp'),\
+        ('Switch_Temp_U31',  'ASIC External Front Temp'),\
+        ('VDD_ANLG_Temp',    'VDD ANLG Temp'),\
+        ('VDD_CORE_Temp',    'VDD CORE Temp')\
+    ]
+
+    output = ''
+    sensor_format = '{0:{width}}{1}\n'
+    # Find max length of sensor calling name
+    max_name_width = max(len(sensor[1]) for sensor in sensor_list)
+
+    output += "Temperature Sensors\n"
+    output += "Adapter: IPMI adapter\n"
+    for sensor in sensor_list:
+        output += sensor_format.format('{}:'.format(sensor[1]),\
+                                       sensor_dict[sensor[0]],\
+                                       width=str(max_name_width+1))
+    output += '\n'
+    return output
+
+def read_fan_sensors(num_fans):
+
+    sensor_list = [\
+        ('Fan{}_Status', 'Fan Drawer {} Status'),\
+        ('Fan{}_Front',  'Fan {} front'),\
+        ('Fan{}_Rear',   'Fan {} rear'),\
+    ]
+
+    output = ''
+    sensor_format = '{0:{width}}{1}\n'
+    # Find max length of sensor calling name
+    max_name_width = max(len(sensor[1]) for sensor in sensor_list)
+
+    output += "Fan Drawers\n"
+    output += "Adapter: IPMI adapter\n"
+    for fan_num in range(1, num_fans+1):
+        for sensor in sensor_list:
+            ipmi_sensor_name = sensor[0].format(fan_num)
+            display_sensor_name = sensor[1].format(fan_num)
+            output += sensor_format.format('{}:'.format(display_sensor_name),\
+                                           sensor_dict[ipmi_sensor_name],\
+                                           width=str(max_name_width+1))
+    output += '\n'
+    return output
+
+def read_psu_sensors(num_psus):
+
+    sensor_list = [\
+        ('PSU{}_Status', 'PSU {} Status'),\
+        ('PSU{}_Fan',    'PSU {} Fan 1'),\
+        ('PSU{}_VIn',    'PSU {} Input Voltage'),\
+        ('PSU{}_CIn',    'PSU {} Input Current'),\
+        ('PSU{}_PIn',    'PSU {} Input Power'),\
+        ('PSU{}_Temp1',  'PSU {} Temp1'),\
+        ('PSU{}_Temp2',  'PSU {} Temp2'),\
+        ('PSU{}_VOut',   'PSU {} Output Voltage'),\
+        ('PSU{}_COut',   'PSU {} Output Current'),\
+        ('PSU{}_POut',   'PSU {} Output Power'),\
+    ]
+
+    output = ''
+    sensor_format = '{0:{width}}{1}\n'
+    # Find max length of sensor calling name
+    max_name_width = max(len(sensor[1]) for sensor in sensor_list)
+
+    output += "PSU\n"
+    output += "Adapter: IPMI adapter\n"
+    for psu_num in range(1, num_psus+1):
+        for sensor in sensor_list:
+            ipmi_sensor_name = sensor[0].format(psu_num)
+            display_sensor_name = sensor[1].format(psu_num)
+            output += sensor_format.format('{}:'.format(display_sensor_name),\
+                                           sensor_dict[ipmi_sensor_name],\
+                                           width=str(max_name_width+1))
+    output += '\n'
+    return output
+
+def main():
+    output_string = ''
+
+    if ipmi_sensor_dump(IPMI_SDR_CMD):
+        output_string += read_temperature_sensors()
+        output_string += read_psu_sensors(MAX_NUM_PSUS)
+        output_string += read_fan_sensors(MAX_NUM_FANS)
+
+        print(output_string)
+
+
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pre_pddf_init.sh b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pre_pddf_init.sh
new file mode 100755
index 000000000000..e32b0c9cbfc1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/pre_pddf_init.sh
@@ -0,0 +1,31 @@
+#!/bin/bash
+
+# Probe Baseboard CPLD driver
+modprobe lpc_basecpld
+sleep 1
+
+# Get BMC mode
+PLATFORM=`sed -n 's/onie_platform=\(.*\)/\1/p' /host/machine.conf`
+GETREG_PATH="/sys/devices/platform/sys_cpld/getreg"
+BMC_PRESENCE=`echo '0xA108' > $GETREG_PATH && cat $GETREG_PATH`
+echo "Platform ${PLATFORM} BMC card ${BMC_PRESENCE}"
+
+# Copy pddf-device.json according to bmc mode
+PDDF_JSON="pddf-device.json"
+PDDF_JSON_BMC="pddf-device-bmc.json"
+PDDF_JSON_NONBMC="pddf-device-nonbmc.json"
+PDDF_JSON_PATH="/usr/share/sonic/device/${PLATFORM}/pddf"
+
+COMPONENTS_JSON="platform_components.json"
+COMPONENTS_JSON_BMC="platform_components-bmc.json"
+COMPONENTS_JSON_NONBMC="platform_components-nonbmc.json"
+COMPONENTS_JSON_PATH="/usr/share/sonic/device/${PLATFORM}/"
+
+if [ ${BMC_PRESENCE} == "0x00" ]; then
+    cp ${PDDF_JSON_PATH}/${PDDF_JSON_BMC} ${PDDF_JSON_PATH}/${PDDF_JSON}
+    cp ${COMPONENTS_JSON_PATH}/${COMPONENTS_JSON_BMC} ${COMPONENTS_JSON_PATH}/${COMPONENTS_JSON}
+else
+    # BMC Card absent
+    cp ${PDDF_JSON_PATH}/${PDDF_JSON_NONBMC} ${PDDF_JSON_PATH}/${PDDF_JSON}
+    cp ${COMPONENTS_JSON_PATH}/${COMPONENTS_JSON_NONBMC} ${COMPONENTS_JSON_PATH}/${COMPONENTS_JSON}
+fi
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/sensors b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/sensors
new file mode 100644
index 000000000000..5d740a9eb7d7
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/scripts/sensors
@@ -0,0 +1,11 @@
+#!/bin/bash
+
+DOCKER_EXEC_FLAGS="i"
+
+# Determine whether stdout is on a terminal
+if [ -t 1 ] ; then
+    DOCKER_EXEC_FLAGS+="t"
+fi
+
+docker exec -$DOCKER_EXEC_FLAGS pmon sensors "$@"
+docker exec -$DOCKER_EXEC_FLAGS pmon python3 /usr/bin/platform_sensors.py "$@"
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/systemd/ds2000-pddf-platform-monitor.service b/platform/broadcom/sonic-platform-modules-cel/ds2000/systemd/ds2000-pddf-platform-monitor.service
new file mode 100644
index 000000000000..5043d3d02755
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/systemd/ds2000-pddf-platform-monitor.service
@@ -0,0 +1,17 @@
+[Unit]
+Description=DS2000 Platform background monitor service
+After=pmon.service
+DefaultDependencies=no
+
+[Service]
+ExecStart=/usr/local/bin/pddf_fan_control_sensor_refresh.py
+Restart=always
+RestartSec=30s
+KillSignal=SIGKILL
+SuccessExitStatus=SIGKILL
+
+# Resource Limitations
+LimitCORE=infinity
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/systemd/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-cel/ds2000/systemd/pddf-platform-init.service
new file mode 100644
index 000000000000..c62769508895
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/systemd/pddf-platform-init.service
@@ -0,0 +1,15 @@
+[Unit]
+Description=PDDF module and device initialization service
+Before=pmon.service watchdog-control.service ztp.service
+After=platform-init.service
+DefaultDependencies=no
+
+[Service]
+Type=oneshot
+ExecStartPre=-/usr/local/bin/pre_pddf_init.sh
+ExecStart=/usr/local/bin/pddf_util.py install
+ExecStop=/usr/local/bin/pddf_util.py clean
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/CPUPIDRegulation.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/CPUPIDRegulation.py
new file mode 100755
index 000000000000..f38bb7c9fe80
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/CPUPIDRegulation.py
@@ -0,0 +1,152 @@
+#!/usr/bin/env python
+# -*- coding: UTF-8 -*-
+# @Time    : 2023/6/19 17:01
+# @Mail    : yajiang@celestica.com
+# @Author  : jiang tao
+# @Function: Perform fan PWM PID control according to the CPU temperature provided by the Thermal team
+
+try:
+    import os
+    import sys
+    import getopt
+    import subprocess
+    import statistics
+    import logging
+    import logging.config
+    import time  # this is only being used as part of the example
+    import signal
+    from sonic_platform import platform
+except ImportError as e:
+    raise ImportError('%s - required module not found' % str(e))
+
+# Defaults
+FUNCTION_NAME = 'FanControl'
+DUTY_MAX = 100
+CPU_TEMP_MAX = 90
+TEMP_DIFF = 15  # abs(Tk - Tk-1) limit
+CPU_TEMPERATURE = "cat /sys/class/thermal/thermal_zone1/temp"
+
+# PID Defaults Value
+PWM_LIST = [35]  # [PWMk-1]
+T_LIST = []  # [Tk-2, Tk-1, Tk]
+Kp = 3
+Ki = 0.5
+Kd = 0.2
+SET_POINT = 78
+PWM_MIN = 35
+PWM_MAX = 100
+
+
+class CPUPIDRegulation(object):
+    """
+    Make a class we can use to capture stdout and sterr in the log
+    """
+    # static temp var
+    _ori_temp = 0
+    _new_perc = DUTY_MAX / 2
+    syslog = logging.getLogger("[" + FUNCTION_NAME + "]")
+    init_fan_temperature = [0, 0]
+
+    def __init__(self, log_file, log_level):
+        """Needs a logger and a logger level."""
+        formatter = logging.Formatter('%(name)s %(message)s')
+        sys_handler = logging.handlers.SysLogHandler(address='/dev/log')
+        sys_handler.setFormatter(formatter)
+        sys_handler.ident = 'common'
+        self.syslog.setLevel(logging.WARNING)
+        self.syslog.addHandler(sys_handler)
+        self.platform_chassis_obj = platform.Platform().get_chassis()
+        # set up logging to file
+        logging.basicConfig(
+            filename=log_file,
+            filemode='a',
+            level=log_level,
+            format='[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s',
+            datefmt='%H:%M:%S'
+        )
+
+        # set up logging to console
+        if log_level == logging.DEBUG:
+            console = logging.StreamHandler()
+            console.setLevel(log_level)
+            formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s')
+            console.setFormatter(formatter)
+            logging.getLogger('').addHandler(console)
+        logging.debug('SET. logfile:%s / loglevel:%d' % (log_file, log_level))
+
+    def get_cpu_temperature(self):
+        """
+        Get CPU temperature
+        """
+        try:
+            temp = int(os.popen(CPU_TEMPERATURE).read().strip()) / 1000
+            return temp
+        except Exception as E:
+            self.syslog.warning("Can't Get CPU temperature! Cause:%s" % str(E))
+            logging.warning("Can't Get CPU temperature! Cause:%s" % str(E))
+            return False
+
+    def exception_data_handling(self):
+        """
+        Get the temperature of CPU, and confirm whether the obtained value meets the conditions:
+        1. The temperature range is 0~130;
+        2. The temperature difference from the last time is within 15
+        Otherwise, loop 5 times to get the temperature value again:
+        1. if can't get the int value of temperature, return False;
+        2. all temperatures are int, return the temperatures average value
+        """
+        re_try = False
+        cpu_temp = self.get_cpu_temperature()
+        if cpu_temp >= CPU_TEMP_MAX:
+            logging.critical("The current temperature(%d) of CPU is higher than the high crirical 90 degrees" % cpu_temp) 
+
+        if cpu_temp is False:
+            re_try = True
+        elif cpu_temp not in range(CPU_TEMP_MAX+1):
+            re_try = True
+        elif T_LIST and abs(cpu_temp - T_LIST[-1]) > TEMP_DIFF:
+            re_try = True
+
+        if re_try:
+            error_temp_list = list()
+            for _ in range(5):
+                cpu_temp = self.get_cpu_temperature()
+                if (type(cpu_temp) is int) and \
+                        (cpu_temp in range(CPU_TEMP_MAX+1)) and \
+                        (abs(cpu_temp - T_LIST[-1]) <= TEMP_DIFF):
+                    return cpu_temp
+                else:
+                    error_temp_list.append(cpu_temp)
+            if False in error_temp_list:
+                return False
+            return statistics.mean(error_temp_list)
+        return cpu_temp
+
+    def pid_control(self):
+        """
+        PID adjustment according to CPU Internal Temperature
+        :return: fans pwm
+        """
+        cpu_temp = self.exception_data_handling()
+        if not cpu_temp:
+            return DUTY_MAX
+        if len(T_LIST) < 2:
+            T_LIST.append(float(cpu_temp))
+            logging.info("Init CPU PID Control T_LIST:%s" % T_LIST)
+            return PWM_LIST[0]
+        else:
+            T_LIST.append(float(cpu_temp))
+            pwm_k = PWM_LIST[0] + Kp * (T_LIST[2] - T_LIST[1]) + \
+                Ki * (T_LIST[2] - SET_POINT) + \
+                Kd * (T_LIST[2] - 2 * T_LIST[1] + T_LIST[0])
+            if pwm_k < PWM_MIN:
+                #logging.info("CPU PID PWM calculation value:%d < %d, %d will be used"% (pwm_k, PWM_MIN, PWM_MIN))
+                pwm_k = PWM_MIN
+            elif pwm_k > PWM_MAX:
+                logging.info("CPU PID PWM calculation value > %d, %d will be used"
+                             % (PWM_MAX, PWM_MAX))
+                pwm_k = PWM_MAX
+            PWM_LIST[0] = pwm_k
+            #logging.info("CPU PID: PWM=%d Temp list=%s" % (pwm_k, T_LIST))
+            T_LIST.pop(0)
+            return pwm_k
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/FanControl.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/FanControl.py
new file mode 100755
index 000000000000..c89daae72114
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/FanControl.py
@@ -0,0 +1,253 @@
+#!/usr/bin/env python
+# -*- coding: UTF-8 -*-
+# @Time    : 2023/6/19 17:44
+# @Mail    : yajiang@celestica.com
+# @Author  : jiang tao
+# @Function: Fan control strategy main program
+
+try:
+    import re
+    import os
+    import sys
+    import getopt
+    import subprocess
+    import logging
+    import logging.config
+    import time  # this is only being used as part of the example
+    import signal
+    from sonic_platform import platform
+    from . import CPUPIDRegulation
+    from . import FanLinearAdjustment
+    from . import SwitchInternalPIDRegulation
+except ImportError as e:
+    raise ImportError('%s - required module not found' % str(e))
+
+FUNCTION_NAME = "FanControl"
+ERROR_COLOR = "amber"
+NORMAL_COLOR = "green"
+DUTY_MAX = 100
+FAN_NUMBER = 4
+PSU_NUMBER = 2
+SENSOR_NUMBER = 6
+Fan_Front_MAX = 29125
+Fan_Front_MIN = 1370
+Fan_Rear_MAX = 25375
+Fan_Rear_MIN = 1370
+FAN_STATUS_LIST = [True, True, True, True]
+
+
+class FanControl(object):
+    """
+        Make a class we can use to capture stdout and sterr in the log
+        """
+    # static temp var
+    _ori_temp = 0
+    _new_perc = DUTY_MAX / 2
+    syslog = logging.getLogger("[" + FUNCTION_NAME + "]")
+    init_fan_temperature = [0, 0]
+
+    def __init__(self, log_file, log_level):
+        self.FanLinearAdjustment = FanLinearAdjustment.FanLinearAdjustment(log_file, log_level, DUTY_MAX, FAN_NUMBER,
+                                                                           PSU_NUMBER, SENSOR_NUMBER)
+        self.SwitchInternalPIDRegulation = SwitchInternalPIDRegulation.SwitchInternalPIDRegulation(log_file, log_level)
+        self.CPUPIDRegulation = CPUPIDRegulation.CPUPIDRegulation(log_file, log_level)
+        # Needs a logger and a logger level
+        formatter = logging.Formatter('%(name)s %(message)s')
+        sys_handler = logging.handlers.SysLogHandler(address='/dev/log')
+        sys_handler.setFormatter(formatter)
+        sys_handler.ident = 'common'
+        self.syslog.setLevel(logging.WARNING)
+        self.syslog.addHandler(sys_handler)
+        self.platform_chassis_obj = platform.Platform().get_chassis()
+        # set up logging to file
+        logging.basicConfig(
+            filename=log_file,
+            filemode='a',
+            level=log_level,
+            format='[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s',
+            datefmt='%H:%M:%S'
+        )
+
+        # set up logging to console
+        if log_level == logging.DEBUG:
+            console = logging.StreamHandler()
+            console.setLevel(log_level)
+            formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s')
+            console.setFormatter(formatter)
+            logging.getLogger('').addHandler(console)
+        logging.debug('SET. logfile:%s / loglevel:%d' % (log_file, log_level))
+
+    def get_psu_status(self, fan_duty_list):
+        """
+        Get PSU Status.If one PSU not OK, all of the fans pwm will increase to 100
+        :param fan_duty_list: A list.TO app the fans target pwm
+        """
+        psu_status_list = [True, True]
+        for psu_index in range(PSU_NUMBER):
+            psu_presence = self.platform_chassis_obj.get_psu(psu_index).get_presence()
+            psu_status = self.platform_chassis_obj.get_psu(psu_index).get_status()
+            if not psu_presence:
+                psu_status_list[psu_index] = False
+                logging.critical(
+                    "psu%s was error,presence:%s, status:%s" % (psu_index + 1, str(psu_presence), str(psu_status)))
+
+        if False in psu_status_list:
+            fan_duty_list.append(DUTY_MAX)
+
+    def get_fan_presence(self):
+        """
+        Get all of fans status(fan drawer)
+        :return: A list indicating the status of all groups fans
+        """
+        fan_presence_list = [True, True, True, True]  # Default state: fans are OK
+        for fan_drawer_index in range(FAN_NUMBER):
+            fan_drawer = self.platform_chassis_obj.get_fan_drawer(fan_drawer_index)
+            fan0_presence = fan_drawer.get_fan(0).get_presence()
+            if not fan0_presence:
+                logging.warning("%s not presence"% (fan_drawer.get_fan(0).get_name()))
+            fan1_presence = fan_drawer.get_fan(1).get_presence()
+            if not fan1_presence:
+                logging.warning("%s not presence"% (fan_drawer.get_fan(1).get_name()))
+            if not fan0_presence and not fan1_presence:
+                fan_presence_list[fan_drawer_index] = False
+                logging.critical("Fan Drawer-%s not presence"% (str(fan_drawer_index + 1)))
+        return fan_presence_list
+
+    def check_fans_presence(self, fan_duty_list):
+        """
+        check all fans presence or not
+        """
+        fans_presence_list = self.get_fan_presence()
+        fans_not_presence_num = fans_presence_list.count(False)
+        if fans_not_presence_num != 0:  # all fans broken, power off
+            logging.critical("Some fan not presence, change others fan speed to max!")
+            fan_duty_list.append(DUTY_MAX)
+
+    def set_fans_pwm_by_rpm(self, fan_duty_list):
+        """
+        Set fans pwm by fans rpm. If all fans normal or 1 fan broken,
+        manage the fans follow thermal policy.
+        More than 1 fans broken, Will increase the fan speed to 100%
+        :param fan_duty_list: A list.TO app the fans target pwm
+        """
+        fan_rpm_error_list = list()
+        for fan in self.platform_chassis_obj.get_all_fans():
+            fan_name = fan.get_name()
+            fan_speed_rpm = fan.get_speed_rpm()
+            if fan_name.endswith("1") and (fan_speed_rpm not in range(Fan_Front_MIN, Fan_Front_MAX + 1)):
+                fan_rpm_error_list.append(fan_name)
+            if fan_name.endswith("2") and (fan_speed_rpm not in range(Fan_Rear_MIN, Fan_Rear_MAX + 1)):
+                fan_rpm_error_list.append(fan_name)
+        if not fan_rpm_error_list:
+            for fan_drawer_index in range(FAN_NUMBER):
+                if FAN_STATUS_LIST[fan_drawer_index] == False:
+                    FAN_STATUS_LIST[fan_drawer_index] = True
+                    self.platform_chassis_obj.get_fan_drawer(fan_drawer_index).set_status_led(NORMAL_COLOR)
+            return None
+        if len(fan_rpm_error_list) >= 2:
+            logging.critical("%s rpm less than the set minimum speed. "
+                            "Will increase the fan speed to 100%%" % fan_rpm_error_list)
+            fan_duty_list.append(DUTY_MAX)
+        else:
+            logging.warning("%s rpm less than the set minimum speed. Fans pwm isn't changed" % fan_rpm_error_list)
+
+        fan_modules_index_list = list(set(int(re.findall(r"Fantray(\d)_\d", x)[0]) for x in fan_rpm_error_list))
+        for error_fan_drawer in fan_modules_index_list:
+            if FAN_STATUS_LIST[error_fan_drawer-1] == True:
+                FAN_STATUS_LIST[error_fan_drawer-1] = False
+                logging.warning("Fantray%d will be set to %s " % (error_fan_drawer, ERROR_COLOR))
+                self.platform_chassis_obj.get_fan_drawer(error_fan_drawer-1).set_status_led(ERROR_COLOR)
+
+        logging.warning("The STA front panel light will be set to %s " % ERROR_COLOR)
+        self.platform_chassis_obj.set_status_led(ERROR_COLOR)
+
+    def get_linear_pid_pwm(self, fan_duty_list):
+        """
+        Get the pwm value of liner regulation, cpu pid adjustment, switch internal pid adjustment
+        :param fan_duty_list: A list.TO app the fans target pwm
+        """
+        linear_regulation = self.FanLinearAdjustment.linear_control()
+        cpu_pid_adjustment = self.CPUPIDRegulation.pid_control()
+        sw_pid_adjustment = self.SwitchInternalPIDRegulation.pid_control()
+        #logging.info("linear regulation PWM:%d, cpu pid PWM:%d, sw pid PWM:%d" % (linear_regulation, cpu_pid_adjustment, sw_pid_adjustment))
+        fan_duty_list.append(linear_regulation)
+        fan_duty_list.append(cpu_pid_adjustment)
+        fan_duty_list.append(sw_pid_adjustment)
+
+    def manage_fans(self):
+        """
+        Set the fan speed according to the Fan Control Strategy
+        """
+        fan_duty_speed_list = list()
+
+        # Fan speed setting judgment-PSU
+        self.get_psu_status(fan_duty_speed_list)
+
+        # Fan speed setting judgment-FAN presence
+        self.check_fans_presence(fan_duty_speed_list)
+
+        # Fan speed setting judgment-FAN SPEED
+        self.set_fans_pwm_by_rpm(fan_duty_speed_list)
+
+        # Fan speed setting judgment-linear and cpu pid and sw pid
+        self.get_linear_pid_pwm(fan_duty_speed_list)
+
+        self._new_perc = max(fan_duty_speed_list)
+        if self._new_perc < 35:
+            self._new_perc = 35
+        if self._new_perc > 100:
+            self._new_perc = 100
+        fan_index = 0
+        for fan in self.platform_chassis_obj.get_all_fans():
+            fan_index += 1
+            fan_rpm = fan.get_speed()
+            #logging.info("Get before setting fan speed: %s" % fan_rpm)
+            set_stat = fan.set_speed(self._new_perc)
+            if set_stat is False:
+            #logging.info('PASS. Set Fan%d duty_cycle (%d)' % (fan_index, self._new_perc))
+            #else:
+                logging.error('FAIL. Set Fan%d duty_cycle (%d)' % (fan_index, self._new_perc))
+
+
+def handler(signum, frame):
+    logging.warning('Cause signal %d, will set all fan speed to max.' % signum)
+    platform_chassis = platform.Platform().get_chassis()
+    set_error = list()
+    fan_index = 1
+    for fan in platform_chassis.get_all_fans():
+        set_stat = fan.set_speed(DUTY_MAX)
+        fan_drawer = fan_index//2
+        if not set_stat:
+            set_error.append(fan_drawer)
+        fan_index += 1
+    if set_error:
+        logging.error('Fail. Set Fantray %s to (%d) failed' % (list(set(set_error)), DUTY_MAX))
+    sys.exit(0)
+
+
+def main(argv):
+    log_file = '/var/log/%s.log' % FUNCTION_NAME
+    log_level = logging.INFO
+    if len(sys.argv) != 1:
+        try:
+            opts, args = getopt.getopt(argv, 'hdlt:', ['lfile='])
+        except getopt.GetoptError:
+            print('Usage: %s [-d] [-l <log_file>]' % sys.argv[0])
+            return 0
+        for opt, arg in opts:
+            if opt == '-h':
+                print('Usage: %s [-d] [-l <log_file>]' % sys.argv[0])
+                return 0
+            elif opt in ('-d', '--debug'):
+                log_level = logging.DEBUG
+            elif opt in ('-l', '--lfile'):
+                log_file = arg
+
+    signal.signal(signal.SIGINT, handler)
+    signal.signal(signal.SIGTERM, handler)
+    monitor = FanControl(log_file, log_level)
+    # Loop forever, doing something useful hopefully:
+    time.sleep(30)
+    while True:
+        monitor.manage_fans()
+        time.sleep(4)
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/FanLinearAdjustment.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/FanLinearAdjustment.py
new file mode 100755
index 000000000000..1e3d7d761886
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/FanLinearAdjustment.py
@@ -0,0 +1,195 @@
+#!/usr/bin/env python
+# -*- coding: UTF-8 -*-
+# @Time    : 2023/6/16 17:00
+# @Mail    : yajiang@celestica.com
+# @Author  : jiang tao
+# @Function: Fan PWM confirmation according to Thermal team's fan linear control strategy
+
+try:
+    import sys
+    import getopt
+    import subprocess
+    import logging
+    import logging.config
+    import time  # this is only being used as part of the example
+    import signal
+    from sonic_platform import platform
+except ImportError as e:
+    raise ImportError('%s - required module not found' % str(e))
+
+# Defaults
+FUNCTION_NAME = "FanControl"
+
+
+class FanLinearAdjustment(object):
+    """
+    Make a class we can use to capture stdout and sterr in the log
+    """
+    syslog = logging.getLogger("[" + FUNCTION_NAME + "]")
+    # u5 u56  u28 u29
+    init_fan_temperature = [0, 0]
+
+    def __init__(self, log_file, log_level, duty_max, fan_num, psu_num, sensor_num):
+        self.duty_max = duty_max
+        self.fan_num = fan_num
+        self.psu_num = psu_num
+        self.sensor_num = sensor_num
+        self.last_pwm = 0
+        #  Needs a logger and a logger level
+        formatter = logging.Formatter('%(name)s %(message)s')
+        sys_handler = logging.handlers.SysLogHandler(address='/dev/log')
+        sys_handler.setFormatter(formatter)
+        sys_handler.ident = 'common'
+        self.syslog.setLevel(logging.WARNING)
+        self.syslog.addHandler(sys_handler)
+        self.platform_chassis_obj = platform.Platform().get_chassis()
+        # set up logging to file
+        logging.basicConfig(
+            filename=log_file,
+            filemode='a',
+            level=log_level,
+            format='[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s',
+            datefmt='%H:%M:%S'
+        )
+
+        # set up logging to console
+        if log_level == logging.info:
+            console = logging.StreamHandler()
+            console.setLevel(log_level)
+            formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s')
+            console.setFormatter(formatter)
+            logging.getLogger('').addHandler(console)
+        logging.info('SET. logfile:%s / loglevel:%d' % (log_file, log_level))
+
+    def get_all_temperature(self):
+        """
+        Get u5 u56 u28 u29 temperature
+        return: [u5, u56, u28, u29 ]
+        """
+        all_temperature_list = list()
+        for sensor_index in range(self.sensor_num):
+            temp = self.platform_chassis_obj.get_thermal(sensor_index).get_temperature()
+            if temp is None or str(temp).strip() == "":
+                return False
+            all_temperature_list.append(temp)
+        u5 = all_temperature_list[0]
+        u56 = all_temperature_list[1]
+        b2f = max(u5,u56)
+        if u5 <= -5:
+            logging.critical("The current temperature(%f) of u5 is lower than the low crirical -5 degrees." % u5)
+        elif u5 >= 58:
+            logging.critical("The current temperature(%f) of u5 is higher than the high critical 58 degrees." % u5)
+        elif u5 >= 55:
+            logging.critical("The current temperature(%f) of u5 is higher than the high warning 55 degrees." % u5)
+        if u56 <= -5:
+            logging.critical("The current temperature(%f) of u56 is lower than the low crirical -5 degrees." % u56)
+        elif u56 >= 58:
+            logging.critical("The current temperature(%f) of u56 is higher than the high critical 58 degrees." % u56)
+        elif u56 >= 55:
+            logging.critical("The current temperature(%f) of u56 is higher than the high warning 55 degrees." % u56)
+        u28 = all_temperature_list[4]
+        u29 = all_temperature_list[5]
+        f2b = max(u28, u29)
+        if u28 <= -5:
+            logging.critical("The current temperature(%f) of u28 is lower than the low crirical -5 degrees." % u28)
+        elif u28 >= 63:
+            logging.critical("The current temperature(%f) of u28 is higher than the high critical 63 degrees." % u28)
+        elif u28 >= 58:
+            logging.critical("The current temperature(%f) of u28 is higher than the high warning 58 degrees." % u28)
+        if u29 <= -5:
+            logging.critical("The current temperature(%f) of u29 is lower than the low crirical -5 degrees." % u29)
+        elif u29 >= 63:
+            logging.critical("The current temperature(%f) of u29 is higher than the high critical 63 degrees." % u29)
+        elif u29 >= 58:
+            logging.critical("The current temperature(%f) of u29 is higher than the high warning 58 degrees." % u29)
+        #logging.info("[u5:%s, u56:%s, u28:%s, u29:%s]" % (u5, u56, u28, u29))
+        return [b2f, f2b]
+
+    def get_fan_pwm_by_temperature(self, temp_list):
+        """
+        According to the sensor temperature, the temperature rise and fall are judged,
+        and the fan speed with the highest speed is selected
+        :param temp_list: Sensor temperature list
+        :return: According to the sensor temperature, select the maximum expected fan value at each point(int)
+        """
+        fan_direction = "NA"
+        for fan in self.platform_chassis_obj.get_all_fans():
+            fan_status = fan.get_status()
+            if fan_status:
+                fan_direction = fan.get_direction()
+                #logging.info("fan direction: %s. INTAKE=B2F, EXHAUST=F2B" % str(fan_direction))
+                break
+        all_temp = self.get_all_temperature()
+        if all_temp is False:
+            # According to Thermal suggestion, when the temperature can't be
+            # obtained, set the fan to full speed
+            logging.error("Can't get  u5/u56/u28/u29 temperature, Will increase the fan speed to 100%%")
+            return self.duty_max
+
+        # B2F=intake: U17 temperature， F2B-EXHAUST: U16 temperature
+        #logging.info("[B2F:%s, F2B:%s]" % (all_temp[0], all_temp[1]))
+        sensor_index = 0 if fan_direction == "INTAKE" else 1
+        sensor_temp = float(all_temp[sensor_index])
+        #logging.info("Use to adjustment sensor=%s, index=%s, last tem=%s" % (sensor_temp, sensor_index, temp_list[sensor_index] ))
+        temp_ascend = True
+        diff_temp = temp_list[sensor_index] - sensor_temp
+        if diff_temp > 0:
+            temp_ascend = False
+
+        if sensor_index == 0:
+            if not temp_ascend:  # B2F: U5,U56 temperature down
+                if sensor_temp <= 25:
+                    sensor_temp_pwm = 35
+                elif sensor_temp >= 45:
+                    sensor_temp_pwm = self.duty_max
+                else:
+                    sensor_temp_pwm = int((65 / 20) * (sensor_temp - 25) + 35)
+            else:  # U5,U56 temperature up
+                if sensor_temp <= 28:
+                    sensor_temp_pwm = 35
+                elif sensor_temp >= 48:
+                    sensor_temp_pwm = self.duty_max
+                else:
+                    sensor_temp_pwm = int((65 / 20) * (sensor_temp - 28) + 35)
+
+            return self.choose_pwm(temp_ascend, self.last_pwm, sensor_temp_pwm)
+        else:
+            if not temp_ascend:  # F2B: U28,U29 temperature down
+                if sensor_temp <= 41:
+                    sensor_temp_pwm = 35
+                elif sensor_temp >= 51:
+                    sensor_temp_pwm = 90
+                else:
+                    sensor_temp_pwm = int((55 / 10) * (sensor_temp - 41) + 35)
+            else:  # U17 temperature up
+                if sensor_temp <= 44:
+                    sensor_temp_pwm = 35
+                elif sensor_temp >= 54:
+                    sensor_temp_pwm = 90
+                else:
+                    sensor_temp_pwm = int((55 / 10) * (sensor_temp - 44) + 35)
+            return self.choose_pwm(temp_ascend, self.last_pwm, sensor_temp_pwm)
+
+    @staticmethod
+    def choose_pwm(status, last_pwm, now_pwm):
+        """
+        choose the pwm with Thermal rules
+        :param status: Temperature rises (True) or falls(False)
+        :param last_pwm:last pwm value
+        :param now_pwm:Calculated pwm from current temperature
+        :return:int.The pwm value
+        """
+        if status:
+            return last_pwm if last_pwm >= now_pwm else now_pwm
+        else:
+            return now_pwm if last_pwm >= now_pwm else last_pwm
+
+    def linear_control(self):
+        """
+        According to linear adjustment return the fans pwm
+        :return: fans pwm
+        """
+        new_perc = self.get_fan_pwm_by_temperature(self.init_fan_temperature)
+        self.init_fan_temperature = self.get_all_temperature()
+        self.last_pwm = new_perc
+        return new_perc
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/SwitchInternalPIDRegulation.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/SwitchInternalPIDRegulation.py
new file mode 100755
index 000000000000..17992e830e86
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/SwitchInternalPIDRegulation.py
@@ -0,0 +1,162 @@
+#!/usr/bin/env python
+# -*- coding: UTF-8 -*-
+# @Time    : 2023/6/19 16:26
+# @Mail    : yajiang@celestica.com
+# @Author  : jiang tao
+# @Function: Perform fan PWM PID control according to the Switch Internal temperature provided by the Thermal team
+
+try:
+    import os
+    import sys
+    import getopt
+    import subprocess
+    import statistics
+    import logging
+    import logging.config
+    import time  # this is only being used as part of the example
+    import signal
+    from sonic_platform import platform
+except ImportError as e:
+    raise ImportError('%s - required module not found' % str(e))
+
+# Defaults
+FUNCTION_NAME = 'FanControl'
+DUTY_MAX = 100
+SW_TEMP_MAX = 125
+SW_MAJOR_ALARM = 105
+SW_SHUTDOWN = 120
+SW_CRITICAL = 110
+TEMP_DIFF = 15  # abs(Tk - Tk-1) limit
+SWITCH_INTERNAL_PEAK_TEMP = "bcmcmd 'show temp' | grep maximum | cut -d ' ' -f 5"
+
+# PID Defaults Value
+PWM_LIST = [35]  # [PWMk-1]
+T_LIST = []  # [Tk-2, Tk-1, Tk]
+Kp = 2.5
+Ki = 0.5
+Kd = 0.3
+SET_POINT = 86
+PWM_MIN = 35
+PWM_MAX = 100
+
+
+class SwitchInternalPIDRegulation(object):
+    """
+    Make a class we can use to capture stdout and sterr in the log
+    """
+    _new_perc = DUTY_MAX / 2
+    syslog = logging.getLogger("[" + FUNCTION_NAME + "]")
+
+    def __init__(self, log_file, log_level):
+        # Needs a logger and a logger level
+        formatter = logging.Formatter('%(name)s %(message)s')
+        sys_handler = logging.handlers.SysLogHandler(address='/dev/log')
+        sys_handler.setFormatter(formatter)
+        sys_handler.ident = 'common'
+        self.syslog.setLevel(logging.WARNING)
+        self.syslog.addHandler(sys_handler)
+        self.platform_chassis_obj = platform.Platform().get_chassis()
+        # set up logging to file
+        logging.basicConfig(
+            filename=log_file,
+            filemode='a',
+            level=log_level,
+            format='[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s',
+            datefmt='%H:%M:%S'
+        )
+
+        # set up logging to console
+        if log_level == logging.DEBUG:
+            console = logging.StreamHandler()
+            console.setLevel(log_level)
+            formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s')
+            console.setFormatter(formatter)
+            logging.getLogger('').addHandler(console)
+        logging.debug('SET. logfile:%s / loglevel:%d' % (log_file, log_level))
+
+    def get_switch_internal_temperature(self):
+        """
+        Get Switch internal temperature
+        """
+        try:
+            value = subprocess.check_output(SWITCH_INTERNAL_PEAK_TEMP, shell=True,universal_newlines=True, stderr=subprocess.STDOUT)[:-1]
+            return int(float(value))
+        except Exception as E:
+            self.syslog.warning("Can't Get switch internal temperature! Cause:%s" % str(E))
+            logging.warning("Can't Get switch internal temperature! Cause:%s" % str(E))
+            return False
+
+    def exception_data_handling(self):
+        """
+        Get the temperature of Switch Internal, and confirm whether the obtained value meets the conditions:
+        1. The temperature range is 0~150;
+        2. The temperature difference from the last time is within 15
+        Otherwise, loop 5 times to get the temperature value again:
+        1. if can't get the int value of temperature, return False;
+        2. all temperatures are int, return the temperatures average value
+        """
+        re_try = False
+        sw_temp = self.get_switch_internal_temperature()
+        if sw_temp is False:
+            re_try = True
+        elif sw_temp not in range(SW_TEMP_MAX+1):
+            re_try = True
+        elif T_LIST and abs(sw_temp - T_LIST[-1]) > TEMP_DIFF:
+            re_try = True
+
+        if re_try:
+            error_temp_list = list()
+            while len(error_temp_list) < 5:
+                sw_temp = self.get_switch_internal_temperature()
+                if (type(sw_temp) is int) and \
+                        (sw_temp in range(SW_TEMP_MAX+1)) and \
+                        (abs(sw_temp - T_LIST[-1]) <= TEMP_DIFF):
+                    return sw_temp
+                else:
+                    error_temp_list.append(sw_temp)
+            if False in error_temp_list:
+                return False
+            return statistics.mean(error_temp_list)
+        return sw_temp
+
+    def pid_control(self):
+        """
+        PID adjustment according to Switch Internal Temperature
+        :return: fans pwm
+        """
+        sw_temp = self.exception_data_handling()
+        if not sw_temp:
+            return 50
+
+        if sw_temp >= SW_SHUTDOWN:
+            logging.critical("The Switch Internal temperature exceeds %sC, DUT will reboot after 30 seconds" % SW_SHUTDOWN)
+            time.sleep(30)
+            os.popen("reboot")
+        elif sw_temp >= SW_CRITICAL:
+            logging.critical("High temperature critical warning: switch internal temperature %sC, High critical  %sC"
+                                % (sw_temp, SW_CRITICAL))
+        elif sw_temp >= SW_MAJOR_ALARM:
+            logging.critical("High temperature warning: switch internal temperature %sC, High warning  %sC"
+                                % (sw_temp, SW_MAJOR_ALARM))
+
+        if len(T_LIST) < 2:
+            T_LIST.append(float(sw_temp))
+            self.syslog.debug("Init Switch Internal PID Control T_LIST:%s" % T_LIST)
+            logging.info("Init Switch Internal PID Control T_LIST:%s" % T_LIST)
+            return PWM_LIST[0]
+        else:
+            T_LIST.append(float(sw_temp))
+            pwm_k = PWM_LIST[0] + Kp * (T_LIST[2] - T_LIST[1]) + \
+                Ki * (T_LIST[2] - SET_POINT) + \
+                Kd * (T_LIST[2] - 2 * T_LIST[1] + T_LIST[0])
+            if pwm_k < PWM_MIN:
+                #logging.info("Switch Internal PID PWM calculation value < %d, %d will be used"% (PWM_MIN, PWM_MIN))
+                pwm_k = PWM_MIN
+            elif pwm_k > PWM_MAX:
+                logging.critical("Switch Internal PID PWM calculation value > %d, %d will be used"
+                             % (PWM_MAX, PWM_MAX))
+                pwm_k = PWM_MAX
+            PWM_LIST[0] = pwm_k
+            #logging.info("Switch Internal PID: PWM=%d Temp list=%s" % (pwm_k, T_LIST))
+            T_LIST.pop(0)
+            return pwm_k
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/__init__.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/__init__.py
new file mode 100755
index 000000000000..fd2df8085779
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/FanControl/__init__.py
@@ -0,0 +1,5 @@
+# -*- coding: utf-8 -*-#
+
+# @Time   : 2023/6/20 16:01
+# @Mail   : yajiang@celestica.com
+# @Author : jiang tao
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/pddf_fan_control_sensor_refresh.py b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/pddf_fan_control_sensor_refresh.py
new file mode 100755
index 000000000000..f47aadb53c1f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds2000/utils/pddf_fan_control_sensor_refresh.py
@@ -0,0 +1,20 @@
+#!/usr/bin/python
+# -*- coding: utf-8 -*-#
+
+# @Time   : 2023/7/31 13:15
+# @Mail   : yajiang@celestica.com
+# @Author : jiang tao
+
+import sys
+import os
+import json
+sys.path.append(r"/usr/local/bin")
+from FanControl import FanControl
+
+
+pddf_device_path = '/usr/share/sonic/platform/pddf/pddf-device.json'
+with open(pddf_device_path) as f:
+    json_data = json.load(f)
+bmc_present = json_data["PLATFORM"]["bmc_present"]
+if bmc_present == "False":
+    FanControl.main(sys.argv[1:])
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/Makefile b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/Makefile
new file mode 100644
index 000000000000..183bf0a20059
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/Makefile
@@ -0,0 +1,8 @@
+LED_TARGET:= pddf_custom_led_module
+$(LED_TARGET)-objs := ./led_driver/pddf_custom_led_module.o
+
+PSU_TARGET:= pddf_custom_psu_driver_module
+$(PSU_TARGET)-objs := ./psu_driver/pddf_psu_api.o ./psu_driver/pddf_psu_driver.o
+
+obj-m := mc24lc64t.o baseboard_cpld.o pddf_custom_fpga_algo.o pddf_custom_fpga_extend.o
+obj-m += $(LED_TARGET).o $(PSU_TARGET).o
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/baseboard_cpld.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/baseboard_cpld.c
new file mode 100644
index 000000000000..54d4c1514815
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/baseboard_cpld.c
@@ -0,0 +1,414 @@
+/*
+ * baseboard_cpld.c - driver for DS3000 Base Board CPLD
+ * This driver implement sysfs for CPLD register access using LPC bus.
+ * Copyright (C) 2019 Celestica Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/stddef.h>
+#include <linux/delay.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/acpi.h>
+#include <linux/io.h>
+#include <linux/dmi.h>
+#include <linux/slab.h>
+#include <linux/wait.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+#include <linux/types.h>
+#include <uapi/linux/stat.h>
+#include <linux/string.h>
+
+#define DRIVER_NAME "baseboard"
+/**
+ * CPLD register address for read and write.
+ */
+#define VERSION_ADDR 0xA100
+#define SCRATCH_ADDR 0xA101
+#define SYS_LED_ADDR 0xA162
+#define CARD_PRES_ADDR 0xA108
+#define COME_CPLD_VER_ADDR 0xA1E0
+
+#define CPLD_REGISTER_SIZE 0x77
+
+struct baseboard_cpld_data {
+    struct mutex       cpld_lock;
+    uint16_t           read_addr;
+};
+
+struct baseboard_cpld_data *cpld_data;
+
+/**
+ * Read the value from scratch register as hex string.
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer for get value
+ * @return         Hex string read from scratch register.
+ */
+static ssize_t scratch_show(struct device *dev, struct device_attribute *devattr,
+                char *buf)
+{
+    unsigned char data = 0;
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(SCRATCH_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    return sprintf(buf,"0x%2.2x\n", data);
+}
+
+/**
+ * Set scratch register with specific hex string.
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer of set value
+ * @param  count   number of bytes in buffer
+ * @return         number of bytes written, or error code < 0.
+ */
+static ssize_t scratch_store(struct device *dev, struct device_attribute *devattr,
+                const char *buf, size_t count)
+{
+    unsigned long data;
+    char *last;
+
+    mutex_lock(&cpld_data->cpld_lock);
+    data = (uint16_t)strtoul(buf,&last,16);
+    if(data == 0 && buf == last){
+        mutex_unlock(&cpld_data->cpld_lock);
+        return -EINVAL;
+    }
+    outb(data, SCRATCH_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    return count;
+}
+static DEVICE_ATTR_RW(scratch);
+
+
+/* CPLD version attributes */
+static ssize_t version_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    int len = -EIO;
+    // CPLD register is one byte
+    mutex_lock(&cpld_data->cpld_lock);
+    len = sprintf(buf, "0x%2.2x\n",inb(VERSION_ADDR));
+    mutex_unlock(&cpld_data->cpld_lock);
+    return len;
+}
+static DEVICE_ATTR_RO(version);
+
+
+static ssize_t getreg_store(struct device *dev, struct device_attribute *devattr,
+                const char *buf, size_t count)
+{
+    // CPLD register is one byte
+    uint16_t addr;
+    char *last;
+
+    addr = (uint16_t)strtoul(buf,&last,16);
+    if(addr == 0 && buf == last){
+        return -EINVAL;
+    }
+    cpld_data->read_addr = addr;
+    return count;
+}
+
+static ssize_t getreg_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    int len = -EIO;
+    // CPLD register is one byte
+    mutex_lock(&cpld_data->cpld_lock);
+    len = sprintf(buf, "0x%2.2x\n",inb(cpld_data->read_addr));
+    mutex_unlock(&cpld_data->cpld_lock);
+    return len;
+}
+static DEVICE_ATTR_RW(getreg);
+
+static ssize_t setreg_store(struct device *dev, struct device_attribute *devattr,
+                const char *buf, size_t count)
+{
+    // CPLD register is one byte
+    uint16_t addr;
+    uint8_t value;
+    char *tok;
+    char clone[count];
+    char *pclone = clone;
+    char *last;
+
+    strscpy(clone, buf, count);
+
+    mutex_lock(&cpld_data->cpld_lock);
+    tok = strsep((char**)&pclone, " ");
+    if(tok == NULL){
+        mutex_unlock(&cpld_data->cpld_lock);
+        return -EINVAL;
+    }
+    addr = (uint16_t)strtoul(tok,&last,16);
+    if(addr == 0 && tok == last){
+        mutex_unlock(&cpld_data->cpld_lock);
+        return -EINVAL;
+    }
+
+    tok = strsep((char**)&pclone, " ");
+    if(tok == NULL){
+        mutex_unlock(&cpld_data->cpld_lock);
+        return -EINVAL;
+    }
+    value = (uint8_t)strtoul(tok,&last,16);
+    if(value == 0 && tok == last){
+        mutex_unlock(&cpld_data->cpld_lock);
+        return -EINVAL;
+    }
+
+    outb(value,addr);
+    mutex_unlock(&cpld_data->cpld_lock);
+    return count;
+}
+static DEVICE_ATTR_WO(setreg);
+
+/**
+ * Show system led status - on/off/1hz/4hz
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer for get value
+ * @return         Hex string read from scratch register.
+ */
+static ssize_t sys_led_show(struct device *dev, struct device_attribute *devattr,
+                char *buf)
+{
+    unsigned char data = 0;
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(SYS_LED_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    data = data & 0x3;
+    return sprintf(buf, "%s\n",
+            data == 0x03 ? "off" : data == 0x02 ? "4hz" : data ==0x01 ? "1hz": "on");
+}
+
+/**
+ * Set the status of system led - on/off/1hz/4hz
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer of set value
+ * @param  count   number of bytes in buffer
+ * @return         number of bytes written, or error code < 0.
+ */
+static ssize_t sys_led_store(struct device *dev, struct device_attribute *devattr,
+                const char *buf, size_t count)
+{
+    unsigned char led_status,data;
+    if(sysfs_streq(buf, "off")){
+        led_status = 0x03;
+    }else if(sysfs_streq(buf, "4hz")){
+        led_status = 0x02;
+    }else if(sysfs_streq(buf, "1hz")){
+        led_status = 0x01;
+    }else if(sysfs_streq(buf, "on")){
+        led_status = 0x00;
+    }else{
+        count = -EINVAL;
+        return count;
+    }
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(SYS_LED_ADDR);
+    data = data & ~(0x3);
+    data = data | led_status;
+    outb(data, SYS_LED_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    return count;
+}
+static DEVICE_ATTR_RW(sys_led);
+
+/**
+ * Show system led color - both/green/yellow/none
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer for get value
+ * @return         Hex string read from scratch register.
+ */
+static ssize_t sys_led_color_show(struct device *dev, struct device_attribute *devattr,
+                char *buf)
+{
+    unsigned char data = 0;
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(SYS_LED_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    data = (data >> 4) & 0x3;
+    return sprintf(buf, "%s\n",
+            data == 0x03 ? "off" : data == 0x02 ? "yellow" : data ==0x01 ? "green": "both");
+}
+
+/**
+ * Set the color of system led - both/green/yellow/none
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer of set value
+ * @param  count   number of bytes in buffer
+ * @return         number of bytes written, or error code < 0.
+ */
+static ssize_t sys_led_color_store(struct device *dev, struct device_attribute *devattr,
+                const char *buf, size_t count)
+{
+    unsigned char led_status,data;
+    if(sysfs_streq(buf, "off")){
+        led_status = 0x03;
+    }else if(sysfs_streq(buf, "yellow")){
+        led_status = 0x02;
+    }else if(sysfs_streq(buf, "green")){
+        led_status = 0x01;
+    }else if(sysfs_streq(buf, "both")){
+        led_status = 0x00;
+    }else{
+        count = -EINVAL;
+        return count;
+    }
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(SYS_LED_ADDR);
+    data = data & ~( 0x3 << 4);
+    data = data | (led_status << 4);
+    outb(data, SYS_LED_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    return count;
+}
+static DEVICE_ATTR_RW(sys_led_color);
+
+/**
+ * Show BMC card presence
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer for get value
+ * @return         string absent or present of BMC card.
+ */
+static ssize_t bmc_presence_show(struct device *dev, struct device_attribute *devattr,
+                char *buf)
+{
+    unsigned char data = 0;
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(CARD_PRES_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    data = data & 0x1;
+    return sprintf(buf, "%s\n",
+            data == 0x01 ? "absent" : "present");
+}
+static DEVICE_ATTR_RO(bmc_presence);
+
+/* COME CPLD version attributes */
+static ssize_t come_cpld_version_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    int len = -EIO;
+    // COME CPLD register is one byte
+    mutex_lock(&cpld_data->cpld_lock);
+    len = sprintf(buf, "0x%2.2x\n",inb(COME_CPLD_VER_ADDR));
+    mutex_unlock(&cpld_data->cpld_lock);
+    return len;
+}
+static DEVICE_ATTR_RO(come_cpld_version);
+
+static struct attribute *baseboard_cpld_attrs[] = {
+    &dev_attr_version.attr,
+    &dev_attr_scratch.attr,
+    &dev_attr_getreg.attr,
+    &dev_attr_setreg.attr,
+    &dev_attr_sys_led.attr,
+    &dev_attr_sys_led_color.attr,
+    &dev_attr_bmc_presence.attr,
+    &dev_attr_come_cpld_version.attr,
+    NULL,
+};
+
+static struct attribute_group baseboard_cpld_attrs_grp = {
+    .attrs = baseboard_cpld_attrs,
+};
+
+static struct resource baseboard_cpld_resources[] = {
+    {
+        .start  = 0xA100,
+        .end    = 0xA1FF,
+        .flags  = IORESOURCE_IO,
+    },
+};
+
+static void baseboard_cpld_dev_release( struct device * dev)
+{
+    return;
+}
+
+static struct platform_device baseboard_cpld_dev = {
+    .name           = DRIVER_NAME,
+    .id             = -1,
+    .num_resources  = ARRAY_SIZE(baseboard_cpld_resources),
+    .resource       = baseboard_cpld_resources,
+    .dev = {
+        .release = baseboard_cpld_dev_release,
+    }
+};
+
+static int baseboard_cpld_drv_probe(struct platform_device *pdev)
+{
+    struct resource *res;
+    int ret =0;
+
+    cpld_data = devm_kzalloc(&pdev->dev, sizeof(struct baseboard_cpld_data),
+        GFP_KERNEL);
+    if (!cpld_data)
+        return -ENOMEM;
+
+    mutex_init(&cpld_data->cpld_lock);
+
+    cpld_data->read_addr = VERSION_ADDR;
+
+    res = platform_get_resource(pdev, IORESOURCE_IO, 0);
+    if (unlikely(!res)) {
+        printk(KERN_ERR "Specified Resource Not Available...\n");
+        return -1;
+    }
+
+    ret = sysfs_create_group(&pdev->dev.kobj, &baseboard_cpld_attrs_grp);
+    if (ret) {
+        printk(KERN_ERR "Cannot create sysfs for baseboard CPLD\n");
+    }
+    return 0;
+}
+
+static int baseboard_cpld_drv_remove(struct platform_device *pdev)
+{
+    sysfs_remove_group(&pdev->dev.kobj, &baseboard_cpld_attrs_grp);
+    return 0;
+}
+
+static struct platform_driver baseboard_cpld_drv = {
+    .probe  = baseboard_cpld_drv_probe,
+    .remove = __exit_p(baseboard_cpld_drv_remove),
+    .driver = {
+        .name   = DRIVER_NAME,
+    },
+};
+
+int baseboard_cpld_init(void)
+{
+    // Register platform device and platform driver
+    platform_device_register(&baseboard_cpld_dev);
+    platform_driver_register(&baseboard_cpld_drv);
+    return 0;
+}
+
+void baseboard_cpld_exit(void)
+{
+    // Unregister platform device and platform driver
+    platform_driver_unregister(&baseboard_cpld_drv);
+    platform_device_unregister(&baseboard_cpld_dev);
+}
+
+module_init(baseboard_cpld_init);
+module_exit(baseboard_cpld_exit);
+
+MODULE_AUTHOR("Pradchaya Phucharoen  <pphuchar@celestica.com>");
+MODULE_DESCRIPTION("Celestica DS3000 Baseboard CPLD Driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/led_driver/pddf_custom_led_defs.h b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/led_driver/pddf_custom_led_defs.h
new file mode 100644
index 000000000000..e786e567d433
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/led_driver/pddf_custom_led_defs.h
@@ -0,0 +1,149 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * Description
+ *  Platform LED related defines and structures
+ */
+
+
+/*****************************************
+ *  kobj list 
+ *****************************************/
+
+struct kobject *platform_kobj=NULL;
+struct kobject *led_kobj=NULL;
+
+struct kobject *state_attr_kobj=NULL;
+struct kobject *cur_state_kobj=NULL;
+
+/*****************************************
+ * Static Data provided from user 
+ * space JSON data file
+ *****************************************/
+#define NAME_SIZE 32
+#define VALUE_SIZE 5
+typedef enum {
+    STATUS_LED_COLOR_OFF=0,
+    STATUS_LED_COLOR_GREEN=1,
+    STATUS_LED_COLOR_YELLOW=2,
+    STATUS_LED_COLOR_RED=3,
+    STATUS_LED_COLOR_BLUE=4,
+    STATUS_LED_COLOR_GREEN_BLINK=5,
+    STATUS_LED_COLOR_YELLOW_BLINK=6,
+    STATUS_LED_COLOR_RED_BLINK=7,
+    STATUS_LED_COLOR_BLUE_BLINK=8,
+    STATUS_LED_COLOR_AMBER,
+    STATUS_LED_COLOR_AMBER_BLINK,
+    MAX_LED_STATUS
+}LED_STATUS;
+
+char*  LED_STATUS_STR[] = {
+    "off",
+    "green",
+    "yellow",
+    "red",
+    "blue",
+    "green_blink",
+    "yellow_blink",
+    "red_blink",
+    "blue_blink",
+    "amber",
+    "amber_blink"
+};
+
+
+typedef struct 
+{
+    char bits[NAME_SIZE]; 
+    int pos; 
+    int mask_bits;
+}MASK_BITS;
+
+typedef struct
+{
+    int	swpld_addr;
+    int swpld_addr_offset;
+    MASK_BITS bits;
+    u8	 reg_values[VALUE_SIZE];
+    char value[NAME_SIZE];
+    char attr_devtype[NAME_SIZE];
+    char attr_devname[NAME_SIZE];
+} LED_DATA;
+
+typedef struct
+{
+    int state;
+    char color[NAME_SIZE]; 
+/* S3IP System LED RW sysfs */
+    int sys_led;
+    int bmc_led;
+    int fan_led;
+    int psu_led;
+    int loc_led;
+/* S3IP Power LED  RO sysfs */
+    int psu1_led;
+    int psu2_led;
+/* S3IP Fantray LED RO sysfs */
+    int fantray1_led;
+    int fantray2_led;
+    int fantray3_led;
+    int fantray4_led;
+    int fantray5_led;
+    int fantray6_led;
+    int fantray7_led;
+} CUR_STATE_DATA;
+
+typedef struct
+{
+    CUR_STATE_DATA cur_state;
+    char device_name[NAME_SIZE];
+    int index;
+    LED_DATA data[MAX_LED_STATUS];
+    int	swpld_addr;
+    int swpld_addr_offset;
+    char attr_devtype[NAME_SIZE];
+    char attr_devname[NAME_SIZE];
+} LED_OPS_DATA; 
+
+typedef enum{
+	LED_SYS,
+	LED_PSU,
+	LED_FAN,
+	LED_FANTRAY,
+	LED_DIAG,
+	LED_LOC,
+    LED_BMC,
+	LED_TYPE_MAX
+} LED_TYPE;
+char* LED_TYPE_STR[LED_TYPE_MAX] = 
+{
+	"LED_SYS",
+	"LED_PSU",
+	"LED_FAN",
+	"LED_FANTRAY",
+	"LED_DIAG",
+	"LED_LOC",
+    "LED_BMC"
+};
+
+/*****************************************
+ * Data exported from kernel for  
+ * user space plugin to get/set
+ *****************************************/
+#define PDDF_LED_DATA_ATTR( _prefix, _name, _mode, _show, _store, _type, _len, _addr)    \
+        struct pddf_data_attribute pddf_dev_##_prefix##_attr_##_name = { .dev_attr = __ATTR(_name, _mode, _show, _store),  \
+          .type = _type , \
+          .len = _len ,   \
+          .addr = _addr }
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/led_driver/pddf_custom_led_module.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/led_driver/pddf_custom_led_module.c
new file mode 100644
index 000000000000..8f0da48b4d98
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/led_driver/pddf_custom_led_module.c
@@ -0,0 +1,873 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * A pddf kernel module to manage various LEDs of a switch
+ */
+
+#define __STDC_WANT_LIB_EXT1__ 1
+#include <linux/kobject.h>
+#include <linux/string.h>
+#include <linux/sysfs.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/hwmon-sysfs.h>
+#include "pddf_custom_led_defs.h"
+#include "../../../../../pddf/i2c/modules/include/pddf_client_defs.h"
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/slab.h>
+
+#define DEBUG 0
+#define MAX_PSU_NUM 2
+#define MAX_FANTRAY_NUM 7
+LED_OPS_DATA sys_led_ops_data[1]={0};
+LED_OPS_DATA psu_led_ops_data[MAX_PSU_NUM]={0};
+LED_OPS_DATA diag_led_ops_data[1]= {0};
+LED_OPS_DATA fan_led_ops_data[1]= {0};
+LED_OPS_DATA loc_led_ops_data[1]= {0};
+LED_OPS_DATA bmc_led_ops_data[1]= {0};
+LED_OPS_DATA fantray_led_ops_data[MAX_FANTRAY_NUM]={0};
+LED_OPS_DATA temp_data={0};
+LED_OPS_DATA* dev_list[LED_TYPE_MAX] = {
+    sys_led_ops_data,
+    psu_led_ops_data,
+    fan_led_ops_data,
+    fantray_led_ops_data,
+    diag_led_ops_data,
+    loc_led_ops_data,
+    bmc_led_ops_data,
+    NULL
+};
+int num_psus = 0;
+int num_fantrays = 0;
+
+extern int board_i2c_cpld_read_new(unsigned short cpld_addr, char *name, u8 reg);
+extern int board_i2c_cpld_write_new(unsigned short cpld_addr, char *name, u8 reg, u8 value);
+extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
+extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
+extern int board_i2c_fpga_read(unsigned short cpld_addr, u8 reg);
+extern int board_i2c_fpga_write(unsigned short cpld_addr, u8 reg, u8 value);
+
+extern ssize_t show_pddf_data(struct device *dev, struct device_attribute *da, char *buf);
+extern ssize_t store_pddf_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count);
+extern ssize_t show_pddf_s3ip_data(struct device *dev, struct device_attribute *da, char *buf);
+extern ssize_t store_pddf_s3ip_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count);
+
+static LED_STATUS find_state_index(const char* state_str) {
+    int index;
+    char *ptr = (char *)state_str;
+    while (*ptr && *ptr!= '\n' && *ptr !='\0') ptr++;
+    *ptr='\0';
+    for ( index = 0; index < MAX_LED_STATUS; index++) {
+        if (strcmp(state_str, LED_STATUS_STR[index]) == 0 ) {
+            return index;
+        }
+    }
+    return MAX_LED_STATUS;
+}
+
+static LED_TYPE get_dev_type(char* name)
+{
+    LED_TYPE ret = LED_TYPE_MAX;
+    if(strcasecmp(name, "SYS_LED") == 0) {
+        ret = LED_SYS;
+    } else if(strcasecmp(name, "FAN_LED") == 0) {
+        ret = LED_FAN;
+    } else if(strstr(name, "PSU_LED")) {
+        ret = LED_PSU;
+    } else if(strcasecmp(name, "DIAG_LED") == 0) {
+        ret = LED_DIAG;
+    } else if(strcasecmp(name, "LOC_LED") == 0) {
+        ret = LED_LOC;
+    } else if(strstr(name, "FANTRAY_LED")) {
+        ret = LED_FANTRAY;
+    }
+#if DEBUG > 1
+    pddf_dbg(LED, KERN_INFO "LED get_dev_type: %s; %d\n", name, ret);
+#endif
+    return (ret);
+}
+static int dev_index_check(LED_TYPE type, int index)
+{
+#if DEBUG
+    pddf_dbg(LED, "dev_index_check: type:%s[%d] index:%d num_psus:%d num_fantrays:%d\n",
+        LED_TYPE_STR[type], type, index, num_psus, num_fantrays);
+#endif
+    switch(type)
+    {
+        case LED_PSU:
+            if(index >= MAX_PSU_NUM) return (-1);
+            break;
+        case LED_FANTRAY:
+            if(index >= MAX_FANTRAY_NUM) return (-1);
+            break;
+        default:
+            if(index >= 1) return (-1);
+            break;
+    }
+    return (0);
+}
+
+static LED_OPS_DATA* find_led_ops_data(struct device_attribute *da)
+{
+    struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da;
+    LED_OPS_DATA* ptr = (LED_OPS_DATA*)_ptr->addr;
+    LED_TYPE led_type;
+    if(!ptr || strlen(ptr->device_name) == 0 ) return (NULL);
+
+    if((led_type=get_dev_type(ptr->device_name)) == LED_TYPE_MAX) {
+        printk(KERN_ERR "PDDF_LED ERROR *%s Unsupported Led Type\n", __func__);
+        return (NULL);
+    }
+    if(dev_index_check(led_type, ptr->index) == -1) {
+        printk(KERN_ERR "PDDF_LED ERROR %s invalid index: %d for type:%s;%d\n", __func__, ptr->index, ptr->device_name, led_type);
+        return (NULL);
+    }
+#if DEBUG > 1
+    pddf_dbg(LED, "find_led_ops_data: name:%s; index=%d tempAddr:%p actualAddr:%p\n",
+        ptr->device_name, ptr->index, ptr, dev_list[led_type]+ptr->index);
+#endif
+    return (dev_list[led_type]+ptr->index);
+}
+
+static void print_led_data(LED_OPS_DATA *ptr, LED_STATUS state)
+{
+    int i = 0;
+    if(!ptr) return ;
+    pddf_dbg(LED, KERN_INFO "Print %s index:%d num_psus:%d num_fantrays:%d ADDR=%p\n",
+        ptr->device_name, ptr->index, num_psus, num_fantrays, ptr);
+    pddf_dbg(LED, KERN_INFO "\tindex: %d\n", ptr->index);
+    pddf_dbg(LED, KERN_INFO "\tdevtype/devname: %s:%s\n", ptr->attr_devtype, ptr->attr_devname);
+    pddf_dbg(LED, KERN_INFO  "\tcur_state: %d; %s \n", ptr->cur_state.state, ptr->cur_state.color);
+    for (i = 0; i< MAX_LED_STATUS; i++) {
+        if(ptr->data[i].swpld_addr && (i == state || state == -1)) {
+            pddf_dbg(LED, KERN_INFO "\t\t[%s]: addr/offset:0x%x;0x%x color:%s; value:[%s][0x%x][0x%x] mask_bits: 0x%x;"
+                    "pos:%d attr_devtype:%s attr_devname:%s\n",LED_STATUS_STR[i], ptr->data[i].swpld_addr,
+                    ptr->data[i].swpld_addr_offset, LED_STATUS_STR[i], ptr->data[i].value,
+                    ptr->data[i].reg_values[0], ptr->data[i].reg_values[1], ptr->data[i].bits.mask_bits,
+                    ptr->data[i].bits.pos, ptr->data[i].attr_devtype, ptr->data[i].attr_devname);
+        }
+    }
+}
+
+ssize_t get_status_led(struct device_attribute *da)
+{
+    int ret=0;
+    struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da;
+    LED_OPS_DATA* temp_data_ptr=(LED_OPS_DATA*)_ptr->addr;
+    LED_OPS_DATA* ops_ptr=find_led_ops_data(da);
+    uint32_t color_val=0, sys_val=0;
+    int state=0;
+    int cpld_type=0;
+    int j;
+
+    if (!ops_ptr) {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: Cannot find LED Ptr", __func__);
+        return (-1);
+    }
+
+    if (ops_ptr->swpld_addr == 0x0) {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: device: %s %d not configured\n", __func__,
+            temp_data_ptr->device_name, temp_data_ptr->index);
+        return (-1);
+    }
+
+    if (strcmp(ops_ptr->attr_devtype, "cpld") == 0) {
+        cpld_type = 1;
+        sys_val = board_i2c_cpld_read_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset);
+    } else if (strcmp(ops_ptr->attr_devtype, "fpgai2c") == 0) {
+        sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+    } else {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x not configured\n",__func__,
+            ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+        return (-1);
+    }
+
+    if (sys_val < 0) {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x read failed\n",__func__,
+            ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+        return sys_val;
+    }
+
+    strscpy(temp_data.cur_state.color, "None", NAME_SIZE);
+    for (state=0; state<MAX_LED_STATUS; state++) {
+        color_val = (sys_val & ~ops_ptr->data[state].bits.mask_bits);
+        for (j = 0; j < VALUE_SIZE && ops_ptr->data[state].reg_values[j] != 0xff; j++) {
+           if ((color_val ^ (ops_ptr->data[state].reg_values[j] << ops_ptr->data[state].bits.pos)) == 0) {
+                strscpy(temp_data.cur_state.color, LED_STATUS_STR[state], NAME_SIZE);
+                break;
+           }
+        }
+    }
+#if DEBUG
+    pddf_dbg(LED, KERN_ERR "Get : %s:%d addr/offset:0x%x; 0x%x devtype:%s;%s value=0x%x [%s]\n",
+        ops_ptr->device_name, ops_ptr->index, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset,
+        ops_ptr->attr_devtype, cpld_type? "cpld": "fpgai2c", sys_val, temp_data.cur_state.color);
+#endif
+    return(ret);
+}
+
+ssize_t set_status_led(struct device_attribute *da)
+{
+    int ret=0;
+    uint32_t sys_val=0, new_val=0, read_val=0;
+    LED_STATUS cur_state = MAX_LED_STATUS;
+    struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da;
+    LED_OPS_DATA* temp_data_ptr=(LED_OPS_DATA*)_ptr->addr;
+    LED_OPS_DATA* ops_ptr=find_led_ops_data(da);
+    char* _buf=temp_data_ptr->cur_state.color;
+    int cpld_type = 0;
+
+    if (!ops_ptr) {
+        pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s: Cannot find LED Ptr", __func__);
+        return (-1);
+    }
+
+    if (ops_ptr->swpld_addr == 0x0) {
+        pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s: device: %s %d not configured\n",
+            __func__, ops_ptr->device_name, ops_ptr->index);
+        return (-1);
+    }
+
+    pddf_dbg(LED, KERN_ERR "%s: Set [%s;%d] color[%s]\n", __func__,
+        temp_data_ptr->device_name, temp_data_ptr->index,
+        temp_data_ptr->cur_state.color);
+    cur_state = find_state_index(_buf);
+
+    if (cur_state == MAX_LED_STATUS) {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: not supported: %s\n", _buf, __func__);
+        return (-1);
+    }
+
+    if (ops_ptr->data[cur_state].swpld_addr != 0x0) {
+        if (strcmp(ops_ptr->data[cur_state].attr_devtype, "cpld") == 0) {
+            cpld_type = 1;
+            sys_val = board_i2c_cpld_read_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset);
+        } else if (strcmp(ops_ptr->data[cur_state].attr_devtype, "fpgai2c") == 0) {
+            sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+        } else {
+            pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s not configured\n",__func__,
+                ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype);
+            return (-1);
+        }
+
+        if (sys_val < 0){
+            return sys_val;
+        }
+
+        
+        new_val = (sys_val & ops_ptr->data[cur_state].bits.mask_bits) |
+                    (ops_ptr->data[cur_state].reg_values[0] << ops_ptr->data[cur_state].bits.pos);
+    } else {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s state %d; %s not configured\n",__func__,
+            ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, cur_state, _buf);
+        return (-1);
+    }
+
+    if (strcmp(ops_ptr->data[cur_state].attr_devtype, "cpld") == 0) {
+        ret = board_i2c_cpld_write_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset, new_val);
+        read_val = board_i2c_cpld_read_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset);
+    } else if (strcmp(ops_ptr->data[cur_state].attr_devtype, "fpgai2c") == 0) {
+        ret = board_i2c_fpga_write(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, (uint8_t)new_val);
+        read_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+    } else {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s not configured\n",__func__,
+            ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype);
+        return (-1);
+    }
+
+#if DEBUG
+    pddf_dbg(LED, KERN_ERR "Set color:%s; 0x%x:0x%x sys_val:0x%x new_val:0x%x devtype:%s w_ret:0x%x read:0x%x devtype:%s\n",
+        LED_STATUS_STR[cur_state], ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, sys_val, new_val,
+        cpld_type? "cpld":"fpgai2c", ret, read_val, ops_ptr->data[cur_state].attr_devtype);
+#endif
+
+    return(ret);
+}
+
+
+ssize_t show_pddf_data(struct device *dev, struct device_attribute *da,
+             char *buf)
+{
+    int ret = 0;
+    struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da;
+    switch (ptr->type)
+    {
+        case PDDF_CHAR:
+            ret = sprintf(buf, "%s\n", ptr->addr);
+            break;
+        case PDDF_INT_DEC:
+            ret = sprintf(buf, "%d\n", *(int*)(ptr->addr));
+            break;
+        case PDDF_INT_HEX:
+            ret = sprintf(buf, "0x%x\n", *(int*)(ptr->addr));
+            break;
+        case PDDF_USHORT:
+            ret = sprintf(buf, "0x%x\n", *(unsigned short *)(ptr->addr));
+            break;
+        case PDDF_UINT32:
+            ret = sprintf(buf, "0x%x\n", *(uint32_t *)(ptr->addr));
+            break;
+        default:
+            break;
+    }
+#if DEBUG > 1
+    pddf_dbg(LED, "[ READ ] DATA ATTR PTR [%s] TYPE:%d, Value:[%s]\n",
+        ptr->dev_attr.attr.name, ptr->type, buf);
+#endif
+    return ret;
+}
+
+ssize_t store_pddf_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    int ret = 0, num = 0;
+    struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da;
+    switch (ptr->type)
+    {
+        case PDDF_CHAR:
+            memcpy(ptr->addr, buf, strlen(buf)-1); // to discard newline char form buf
+            ptr->addr[strlen(buf)-1] = '\0';
+#if DEBUG
+            pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_CHAR  VALUE:%s\n",
+                ptr->dev_attr.attr.name, ptr->addr);
+#endif
+            break;
+        case PDDF_INT_DEC:
+            ret = kstrtoint(buf,10,&num);
+            if (ret==0)
+                *(int *)(ptr->addr) = num;
+#if DEBUG
+            pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_DEC  VALUE:%d\n",
+                ptr->dev_attr.attr.name, *(int *)(ptr->addr));
+#endif
+            break;
+        case PDDF_INT_HEX:
+            ret = kstrtoint(buf,16,&num);
+            if (ret==0)
+                *(int *)(ptr->addr) = num;
+#if DEBUG
+            pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_HEX  VALUE:0x%x\n",
+                ptr->dev_attr.attr.name, *(int *)(ptr->addr));
+#endif
+            break;
+        case PDDF_USHORT:
+            ret = kstrtoint(buf,16,&num);
+            if (ret==0)
+                *(unsigned short *)(ptr->addr) = (unsigned short)num;
+#if DEBUG
+            pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_USHORT  VALUE:%x\n",
+                ptr->dev_attr.attr.name, *(unsigned short *)(ptr->addr));
+#endif
+            break;
+        case PDDF_UINT32:
+            ret = kstrtoint(buf,16,&num);
+            if (ret==0)
+                *(uint32_t *)(ptr->addr) = (uint32_t)num;
+#if DEBUG
+            pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_UINT32 VALUE:%d\n",
+                ptr->dev_attr.attr.name, *(uint32_t *)(ptr->addr));
+#endif
+            break;
+        default:
+            break;
+    }
+    return count;
+}
+
+ssize_t show_pddf_s3ip_data(struct device *dev, struct device_attribute *da,
+             char *buf)
+{
+    int ret = 0;
+    pddf_dbg(LED, KERN_ERR " %s", __FUNCTION__);
+    struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da;
+    if (_ptr == NULL) {
+       pddf_dbg(LED, KERN_ERR "%s return", __FUNCTION__);
+       return -1;
+    }
+    LED_OPS_DATA* ops_ptr=(LED_OPS_DATA*)_ptr->addr;
+    uint32_t color_val=0, sys_val=0;
+    int state=0, j;
+    int cpld_type=0;
+    if (!ops_ptr) {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: Cannot find LED Ptr", __func__);
+        return (-1);
+    }
+    if (ops_ptr->swpld_addr == 0x0) {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: device: %s %d not configured\n", __func__,
+            ops_ptr->device_name, ops_ptr->index);
+        return (-1);
+    }
+    if ( strcmp(ops_ptr->attr_devtype, "cpld") == 0) {
+        cpld_type=1;
+        sys_val = board_i2c_cpld_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+    } else if ( strcmp(ops_ptr->attr_devtype, "fpgai2c") == 0) {
+        sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+    } else {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x not configured\n",__func__,
+            ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+        return (-1);
+    }
+
+    if (sys_val < 0) {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x read failed\n",__func__,
+            ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+        return sys_val;
+    }
+    for (state=0; state<MAX_LED_STATUS; state++) {
+        color_val = (sys_val & ~ops_ptr->data[state].bits.mask_bits);
+        for (j = 0; j < VALUE_SIZE && ops_ptr->data[state].reg_values[j] != 0xff; j++) {
+           if ((color_val ^ (ops_ptr->data[state].reg_values[j] << ops_ptr->data[state].bits.pos))==0) {
+                ret = sprintf(buf, "%d\n", state);
+                break;
+           }
+        }
+    }
+#if DEBUG
+    pddf_dbg(LED, KERN_ERR "Get : %s:%d addr/offset:0x%x; 0x%x devtype:%s;%s value=0x%x [%d]\n",
+        ops_ptr->device_name, ops_ptr->index, ops_ptr->swpld_addr,
+        ops_ptr->swpld_addr_offset, ops_ptr->attr_devtype, cpld_type? "cpld": "fpgai2c", sys_val, state);
+#endif
+    return ret;
+}
+
+ssize_t store_pddf_s3ip_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    int ret = 0;
+    int cur_state = 0;
+    uint32_t sys_val=0, new_val=0, read_val=0;
+    int cpld_type=0;
+
+    pddf_dbg(LED, KERN_ERR "%s: %s;%d", __FUNCTION__, buf, cur_state);
+    struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da;
+    ret = kstrtoint(buf,10,&cur_state);
+    if (_ptr == NULL || cur_state >= MAX_LED_STATUS || ret !=0) {
+       pddf_dbg(LED, KERN_ERR "%s return", __FUNCTION__);
+       return -1;
+    }
+    LED_OPS_DATA* ops_ptr=(LED_OPS_DATA*)_ptr->addr;
+
+    if ( strcmp(ops_ptr->attr_devtype, "cpld") == 0) {
+        cpld_type=1;
+        sys_val = board_i2c_cpld_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+    } else if ( strcmp(ops_ptr->attr_devtype, "fpgai2c") == 0) {
+        sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+    } else {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x not configured\n",__func__,
+            ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+        return (-1);
+    }
+
+    new_val = (sys_val & ops_ptr->data[cur_state].bits.mask_bits) |
+            (ops_ptr->data[cur_state].reg_values[0] << ops_ptr->data[cur_state].bits.pos);
+
+    if ( strcmp(ops_ptr->data[cur_state].attr_devtype, "cpld") == 0) {
+        ret = board_i2c_cpld_write(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, new_val);
+        read_val = board_i2c_cpld_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+    } else if ( strcmp(ops_ptr->data[cur_state].attr_devtype, "fpgai2c") == 0) {
+        ret = board_i2c_fpga_write(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, (uint8_t)new_val);
+        read_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+    } else {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s not configured\n",__func__,
+            ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype);
+        return (-1);
+    }
+
+#if DEBUG
+    pddf_dbg(LED, KERN_INFO "Set color:%s; 0x%x:0x%x sys_val:0x%x new_val:0x%x devtype:%s w_ret:0x%x read:0x%x devtype:%s\n",
+        LED_STATUS_STR[cur_state], ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset,
+        sys_val, new_val, cpld_type? "cpld":"fpgai2c", ret, read_val, ops_ptr->data[cur_state].attr_devtype);
+#endif
+    return count;
+}
+
+
+static int load_led_ops_data(struct device_attribute *da, LED_STATUS state)
+{
+    struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da;
+    LED_OPS_DATA* ptr = (LED_OPS_DATA*)_ptr->addr;
+    LED_TYPE led_type;
+    LED_OPS_DATA* ops_ptr = NULL;
+    int i = 0;
+    char *token = NULL, *value_ptr = NULL;
+
+    if(!ptr || strlen(ptr->device_name)==0 ) {
+        pddf_dbg(LED, KERN_INFO "SYSTEM_LED: load_led_ops_data return -1 device_name:%s\n", ptr? ptr->device_name:"NULL");
+        return(-1);
+    }
+
+    if(ptr->device_name)
+    {
+        pddf_dbg(LED, KERN_INFO "[%s]: load_led_ops_data: index=%d addr=0x%x;0x%x devtype:%s devname=%s valu=%s\n",
+                ptr->device_name, ptr->index, ptr->swpld_addr, ptr->swpld_addr_offset, ptr->attr_devtype, ptr->attr_devname, ptr->data[0].value);
+    }
+    if((led_type=get_dev_type(ptr->device_name))==LED_TYPE_MAX) {
+        pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR *%s Unsupported Led Type\n", __func__);
+        return(-1);
+    }
+    if(dev_index_check(led_type, ptr->index)==-1) {
+        pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s invalid index: %d for type:%d\n", __func__, ptr->index, led_type);
+        return(-1);
+    }
+    ops_ptr = dev_list[led_type]+ptr->index;
+
+    memcpy(ops_ptr->device_name, ptr->device_name, sizeof(ops_ptr->device_name));
+    ops_ptr->index = ptr->index;
+    memcpy(&ops_ptr->data[state], &ptr->data[0], sizeof(LED_DATA));
+    ops_ptr->data[state].swpld_addr = ptr->swpld_addr;
+    ops_ptr->data[state].swpld_addr_offset = ptr->swpld_addr_offset;
+    ops_ptr->swpld_addr = ptr->swpld_addr;
+    ops_ptr->swpld_addr_offset = ptr->swpld_addr_offset;
+    memcpy(ops_ptr->data[state].attr_devtype, ptr->attr_devtype, sizeof(ops_ptr->data[state].attr_devtype));
+    memcpy(ops_ptr->data[state].attr_devname, ptr->attr_devname, sizeof(ops_ptr->data[state].attr_devname));
+    memcpy(ops_ptr->attr_devtype, ptr->attr_devtype, sizeof(ops_ptr->attr_devtype));
+    memcpy(ops_ptr->attr_devname, ptr->attr_devname, sizeof(ops_ptr->attr_devname));
+#ifdef __STDC_LIB_EXT1__
+    memset_s(ops_ptr->data[state].reg_values, sizeof(ops_ptr->data[state].reg_values), 0xff, sizeof(ops_ptr->data[state].reg_values));
+#else
+    memset(ops_ptr->data[state].reg_values, 0xff, sizeof(ops_ptr->data[state].reg_values));
+#endif
+    value_ptr = kzalloc(sizeof(ops_ptr->data[state].value), GFP_KERNEL);
+    if (value_ptr) {
+       memcpy(value_ptr, ops_ptr->data[state].value, sizeof(ops_ptr->data[state].value));
+       while((token = strsep((char**)&value_ptr,";")) != NULL  && i < VALUE_SIZE) {
+          if (kstrtou8(token, 16, &ops_ptr->data[state].reg_values[i])) {
+                pddf_dbg(LED, KERN_ERR "load_led_ops_data: [%s] conversion error\n", token);
+           }
+           i++;
+       }
+       kfree(value_ptr);
+    }
+
+    print_led_data(dev_list[led_type]+ptr->index, state);
+
+    memset(ptr, 0, sizeof(LED_OPS_DATA));
+    return (0);
+}
+
+static int show_led_ops_data(struct device_attribute *da)
+{
+    LED_OPS_DATA* ops_ptr = find_led_ops_data(da);
+    print_led_data(ops_ptr, -1);
+    return(0);
+}
+
+static int verify_led_ops_data(struct device_attribute *da)
+{
+    struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da;
+    LED_OPS_DATA* ptr=(LED_OPS_DATA*)_ptr->addr;
+    LED_OPS_DATA* ops_ptr=find_led_ops_data(da);
+
+    if(ops_ptr)
+        memcpy(ptr, ops_ptr, sizeof(LED_OPS_DATA));
+    else
+    {
+        pddf_dbg(LED, "SYSTEM_LED: verify_led_ops_data: Failed to find ops_ptr name:%s; index=%d\n", ptr->device_name, ptr->index);
+    }
+    return (0);
+}
+
+
+ssize_t dev_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+#if DEBUG
+    pddf_dbg(LED, KERN_INFO "dev_operation [%s]\n", buf);
+#endif
+    if(strncmp(buf, "show", strlen("show")) == 0) {
+        show_led_ops_data(da);
+    }
+    else if(strncmp(buf, "verify", strlen("verify")) == 0) {
+        verify_led_ops_data(da);
+    }
+    else if(strncmp(buf, "get_status", strlen("get_status")) == 0) {
+        get_status_led(da);
+    }
+    else if(strncmp(buf, "set_status", strlen("set_status")) == 0) {
+        set_status_led(da);
+    }
+    else {
+        LED_STATUS index = find_state_index(buf);
+        if (index < MAX_LED_STATUS) {
+            load_led_ops_data(da, index);
+        } else {
+            printk(KERN_ERR "PDDF_ERROR: %s: Invalid value for dev_ops %s\n", __FUNCTION__, buf);
+        }
+    }
+    return (count);
+}
+
+ssize_t store_config_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    int ret, num;
+    struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da;
+    if(strncmp(ptr->dev_attr.attr.name, "num_psus", strlen("num_psus")) == 0) {
+        ret = kstrtoint(buf,10,&num);
+        if (ret==0)
+            *(int *)(ptr->addr) = num;
+#if DEBUG
+        pddf_dbg(LED, "[ WRITE ] ATTR CONFIG [%s] VALUE:%d; %d\n",
+                ptr->dev_attr.attr.name, num, num_psus);
+#endif
+        return(count);
+    }
+    if (strncmp(ptr->dev_attr.attr.name, "num_fantrays", strlen("num_fantrays")) ==0) {
+       ret = kstrtoint(buf, 10, &num);
+       if (ret == 0)
+          *(int *)(ptr->addr) = num;
+#if DEBUG
+        pddf_dbg(LED, "[ WRITE ] ATTR CONFIG [%s] VALUE:%d; %d\n",
+            ptr->dev_attr.attr.name, num, num_fantrays);
+#endif
+        return (count);
+    }
+    return (count);
+}
+
+ssize_t store_bits_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    int len = 0, num1 = 0, num2 = 0, i=0, rc1=0, rc2=0;
+    char mask=0xFF;
+    char *pptr=NULL;
+    char bits[NAME_SIZE];
+    struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da;
+    MASK_BITS* bits_ptr=(MASK_BITS*)(ptr->addr);
+    memcpy(bits_ptr->bits, buf, strlen(buf)-1); // to discard newline char form buf
+    bits_ptr->bits[strlen(buf)-1] = '\0';
+    if((pptr=strstr(buf,":")) != NULL) {
+        len = pptr-buf;
+        sprintf(bits, buf);
+        bits[len] = '\0';
+        rc1 = kstrtoint(bits, 16, &num1);
+        if (rc1 == 0)
+        {
+            sprintf(bits, ++pptr);
+            rc2 = kstrtoint(bits, 16, &num2);
+            if (rc2 == 0)
+            {
+                for (i=num2; i<=num1; i++) {
+                   mask &= ~(1 << i);
+                }
+                bits_ptr->mask_bits = mask;
+                bits_ptr->pos = num2;
+            }
+        }
+    } else {
+        rc1 = kstrtoint(buf, 16, &num1);
+        if (rc1 == 0)
+        {
+            bits_ptr->mask_bits = mask & ~(1 << num1);
+            bits_ptr->pos = num1;
+        }
+    }
+#if DEBUG
+        pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR Bits [%s] VALUE:%s mask:0x%x; pos:0x%x\n",
+            ptr->dev_attr.attr.name, bits_ptr->bits, bits_ptr->mask_bits, bits_ptr->pos);
+#endif
+    return (count);
+}
+
+/**************************************************************************
+ * platform/ attributes
+ **************************************************************************/
+PDDF_LED_DATA_ATTR(platform, num_psus, S_IWUSR|S_IRUGO, show_pddf_data,
+        store_config_data, PDDF_INT_DEC, sizeof(int), (void*)&num_psus);
+PDDF_LED_DATA_ATTR(platform, num_fantrays, S_IWUSR|S_IRUGO, show_pddf_data,
+        store_config_data, PDDF_INT_DEC, sizeof(int), (void*)&num_fantrays);
+
+struct attribute* attrs_platform[]={
+    &pddf_dev_platform_attr_num_psus.dev_attr.attr,
+    &pddf_dev_platform_attr_num_fantrays.dev_attr.attr,
+    NULL,
+};
+struct attribute_group attr_group_platform={
+    .attrs = attrs_platform,
+};
+
+/**************************************************************************
+ * led/ attributes
+ **************************************************************************/
+PDDF_LED_DATA_ATTR(dev, device_name, S_IWUSR|S_IRUGO, show_pddf_data,
+            store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.device_name);
+PDDF_LED_DATA_ATTR(dev, attr_devtype, S_IWUSR|S_IRUGO, show_pddf_data,
+            store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.attr_devtype);
+PDDF_LED_DATA_ATTR(dev, attr_devname, S_IWUSR|S_IRUGO, show_pddf_data,
+            store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.attr_devname);
+PDDF_LED_DATA_ATTR(dev, index, S_IWUSR|S_IRUGO, show_pddf_data,
+            store_pddf_data, PDDF_INT_DEC, sizeof(int), (void*)&temp_data.index);
+PDDF_LED_DATA_ATTR(dev, swpld_addr, S_IWUSR|S_IRUGO, show_pddf_data,
+            store_pddf_data, PDDF_INT_HEX, sizeof(int), (void*)&temp_data.swpld_addr);
+PDDF_LED_DATA_ATTR(dev, swpld_addr_offset, S_IWUSR|S_IRUGO, show_pddf_data,
+            store_pddf_data, PDDF_INT_HEX, sizeof(int), (void*)&temp_data.swpld_addr_offset);
+PDDF_LED_DATA_ATTR(dev, dev_ops , S_IWUSR, NULL,
+            dev_operation, PDDF_CHAR, NAME_SIZE, (void*)&temp_data);
+
+struct attribute* attrs_dev[] = {
+    &pddf_dev_dev_attr_device_name.dev_attr.attr,
+    &pddf_dev_dev_attr_attr_devtype.dev_attr.attr,
+    &pddf_dev_dev_attr_attr_devname.dev_attr.attr,
+    &pddf_dev_dev_attr_index.dev_attr.attr,
+    &pddf_dev_dev_attr_swpld_addr.dev_attr.attr,
+    &pddf_dev_dev_attr_swpld_addr_offset.dev_attr.attr,
+    &pddf_dev_dev_attr_dev_ops.dev_attr.attr,
+    NULL,
+};
+
+struct attribute_group attr_group_dev = {
+    .attrs = attrs_dev,
+};
+
+/**************************************************************************
+ * state_attr/ attributes
+ **************************************************************************/
+#define LED_DEV_STATE_ATTR_GROUP(name, func) \
+    PDDF_LED_DATA_ATTR(name, bits, S_IWUSR|S_IRUGO, show_pddf_data, \
+        store_bits_data, PDDF_CHAR, NAME_SIZE, func.bits.bits); \
+    PDDF_LED_DATA_ATTR(name, value, S_IWUSR|S_IRUGO, show_pddf_data, \
+        store_pddf_data, PDDF_CHAR, NAME_SIZE, func.value); \
+    struct attribute* attrs_##name[]={ \
+        &pddf_dev_##name##_attr_bits.dev_attr.attr, \
+            &pddf_dev_##name##_attr_value.dev_attr.attr, \
+            NULL, \
+    }; \
+    struct attribute_group attr_group_##name={ \
+            .attrs = attrs_##name, \
+    }; \
+
+
+LED_DEV_STATE_ATTR_GROUP(state_attr, (void*)&temp_data.data[0])
+
+/**************************************************************************
+ * cur_state/ attributes
+ **************************************************************************/
+PDDF_LED_DATA_ATTR(cur_state, color, S_IWUSR|S_IRUGO, show_pddf_data,
+        store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.cur_state.color);
+PDDF_LED_DATA_ATTR(cur_state, sys_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void*)&sys_led_ops_data);
+PDDF_LED_DATA_ATTR(cur_state, loc_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, NAME_SIZE, (void*)&loc_led_ops_data);
+PDDF_LED_DATA_ATTR(cur_state, bmc_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void*)&bmc_led_ops_data);
+PDDF_LED_DATA_ATTR(cur_state, fan_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void*)&fan_led_ops_data);
+PDDF_LED_DATA_ATTR(cur_state, psu_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), NULL);
+PDDF_LED_DATA_ATTR(cur_state, psu1_led, S_IRUGO, show_pddf_s3ip_data,
+            NULL, PDDF_INT_DEC, sizeof(int), (void *)&psu_led_ops_data[0]);
+PDDF_LED_DATA_ATTR(cur_state, psu2_led, S_IRUGO, show_pddf_s3ip_data,
+            NULL, PDDF_INT_DEC, sizeof(int), (void *)&psu_led_ops_data[1]);
+PDDF_LED_DATA_ATTR(cur_state, fantray1_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[0]);
+PDDF_LED_DATA_ATTR(cur_state, fantray2_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[1]);
+PDDF_LED_DATA_ATTR(cur_state, fantray3_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[2]);
+PDDF_LED_DATA_ATTR(cur_state, fantray4_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[3]);
+PDDF_LED_DATA_ATTR(cur_state, fantray5_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[4]);
+PDDF_LED_DATA_ATTR(cur_state, fantray6_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[5]);
+PDDF_LED_DATA_ATTR(cur_state, fantray7_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[6]);
+
+
+struct attribute* attrs_cur_state[] = {
+    &pddf_dev_cur_state_attr_color.dev_attr.attr,
+    &pddf_dev_cur_state_attr_sys_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_loc_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_bmc_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_fan_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_psu_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_psu1_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_psu2_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_fantray1_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_fantray2_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_fantray3_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_fantray4_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_fantray5_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_fantray6_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_fantray7_led.dev_attr.attr,
+    NULL,
+};
+
+struct attribute_group attr_group_cur_state={
+    .attrs = attrs_cur_state,
+};
+
+/*************************************************************************/
+#define KOBJ_FREE(obj) \
+    if(obj) kobject_put(obj); \
+
+void free_kobjs(void)
+{
+    KOBJ_FREE(cur_state_kobj)
+    KOBJ_FREE(state_attr_kobj)
+    KOBJ_FREE(led_kobj)
+    KOBJ_FREE(platform_kobj)
+}
+
+int KBOJ_CREATE(char* name, struct kobject* parent, struct kobject** child)
+{
+    if (parent) {
+        *child = kobject_create_and_add(name, parent);
+    } else {
+        printk(KERN_ERR "PDDF_LED ERROR to create %s kobj; null parent\n", name);
+        free_kobjs();
+        return (-ENOMEM);
+    }
+    return (0);
+}
+
+int LED_DEV_ATTR_CREATE(struct kobject *kobj, const struct attribute_group *attr, const char* name)
+{
+    int status = sysfs_create_group(kobj, attr);
+    if(status) {
+        pddf_dbg(LED, KERN_ERR "Driver ERROR: sysfs_create %s failed rc=%d\n", name, status);
+    }
+    return (status);
+}
+
+
+static int __init led_init(void) {
+    struct kobject *device_kobj;
+    pddf_dbg(LED, KERN_INFO "PDDF GENERIC LED MODULE init..\n");
+
+    device_kobj = get_device_i2c_kobj();
+    if(!device_kobj)
+        return -ENOMEM;
+
+    KBOJ_CREATE("platform", device_kobj, &platform_kobj);
+    KBOJ_CREATE("led", device_kobj, &led_kobj);
+    KBOJ_CREATE("state_attr", led_kobj, &state_attr_kobj);
+    KBOJ_CREATE("cur_state", led_kobj, &cur_state_kobj);
+
+    LED_DEV_ATTR_CREATE(platform_kobj, &attr_group_platform, "attr_group_platform");
+    LED_DEV_ATTR_CREATE(led_kobj, &attr_group_dev, "attr_group_dev");
+    LED_DEV_ATTR_CREATE(state_attr_kobj, &attr_group_state_attr, "attr_group_state_attr");
+    LED_DEV_ATTR_CREATE(cur_state_kobj, &attr_group_cur_state, "attr_group_cur_state");
+    return (0);
+}
+
+
+static void __exit led_exit(void) {
+    pddf_dbg(LED, "PDDF GENERIC LED MODULE exit..\n");
+    free_kobjs();
+}
+
+module_init(led_init);
+module_exit(led_exit);
+
+MODULE_AUTHOR("Broadcom");
+MODULE_DESCRIPTION("led driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/mc24lc64t.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/mc24lc64t.c
new file mode 100644
index 000000000000..638d59d653ec
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/mc24lc64t.c
@@ -0,0 +1,172 @@
+/*
+ * mc24lc64t.c - driver for Microchip 24LC64T
+ *
+ * Copyright (C) 2017 Celestica Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/mutex.h>
+#include <linux/types.h>
+#include <linux/delay.h>
+#include <linux/jiffies.h>
+
+#define EEPROM_SIZE 8192  //mc24lt64t eeprom size in bytes.
+
+struct mc24lc64t_data {
+        struct mutex            update_lock;
+};
+
+static ssize_t mc24lc64t_read(struct file *filp, struct kobject *kobj,
+                            struct bin_attribute *bin_attr,
+                            char *buf, loff_t off, size_t count)
+{
+        struct i2c_client *client = kobj_to_i2c_client(kobj);
+        struct mc24lc64t_data *drvdata = i2c_get_clientdata(client);
+        unsigned long timeout, read_time, i = 0;
+        int status;
+
+        mutex_lock(&drvdata->update_lock);
+
+        if (i2c_smbus_write_byte_data(client, off>>8, off))
+        {
+                status = -EIO;
+                goto exit;
+        }
+
+        msleep(1);
+
+begin:
+
+        if (i < count)
+        {
+                timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/
+                do {
+                        read_time = jiffies;
+
+                        status = i2c_smbus_read_byte(client);
+                        if (status >= 0)
+                        {
+                                buf[i++] = status;
+                                goto begin;
+                        }
+                } while (time_before(read_time, timeout));
+
+                status = -ETIMEDOUT;
+                goto exit;
+        }
+
+        status = count;
+
+exit:
+        mutex_unlock(&drvdata->update_lock);
+
+        return status;
+}
+
+
+static ssize_t mc24lc64t_write (struct file *filp, struct kobject *kobj,
+                            struct bin_attribute *bin_attr,
+                            char *buf, loff_t off, size_t count){
+
+    struct i2c_client *client = kobj_to_i2c_client(kobj);
+    struct mc24lc64t_data *drvdata = i2c_get_clientdata(client);
+    unsigned long timeout, write_time, i = 0;
+    int status;
+    u16 value;
+
+    mutex_lock(&drvdata->update_lock);
+
+begin:
+    if (i < count){
+        timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/
+        value = (buf[i] << 8 | ( off &0xff));
+        do {
+                write_time = jiffies;
+                status = i2c_smbus_write_word_data(client, off>>8, value);
+                if (status >= 0)
+                {
+                    // increase offset
+                    off++;
+                    // increase buffer index
+                    i++;
+                    goto begin;
+                }
+        } while (time_before(write_time, timeout));
+        status = -ETIMEDOUT;
+        goto exit;
+    }
+    status = count;
+
+exit:
+    mutex_unlock(&drvdata->update_lock);
+    return status;
+}
+
+
+static struct bin_attribute mc24lc64t_bit_attr = {
+        .attr = {
+                .name = "eeprom",
+                .mode = S_IRUGO | S_IWUGO,
+        },
+        .size = EEPROM_SIZE,
+        .read = mc24lc64t_read,
+        .write = mc24lc64t_write,
+};
+
+static int mc24lc64t_probe(struct i2c_client *client,
+                         const struct i2c_device_id *id)
+{
+        struct i2c_adapter *adapter = client->adapter;
+        struct mc24lc64t_data *drvdata;
+        int err;
+
+        if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA
+                                     | I2C_FUNC_SMBUS_READ_BYTE))
+                return -EPFNOSUPPORT;
+
+        if (!(drvdata = devm_kzalloc(&client->dev,
+                        sizeof(struct mc24lc64t_data), GFP_KERNEL)))
+                return -ENOMEM;
+
+        i2c_set_clientdata(client, drvdata);
+        mutex_init(&drvdata->update_lock);
+
+        err = sysfs_create_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr);
+        return err;
+}
+
+static void mc24lc64t_remove(struct i2c_client *client)
+{
+        struct mc24lc64t_data *drvdata = i2c_get_clientdata(client);
+        sysfs_remove_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr);
+}
+
+static const struct i2c_device_id mc24lc64t_id[] = {
+        { "24lc64t", 0 },
+        { }
+};
+MODULE_DEVICE_TABLE(i2c, mc24lc64t_id);
+
+static struct i2c_driver mc24lc64t_driver = {
+        .driver = {
+                .name   = "mc24lc64t",
+                .owner = THIS_MODULE,
+        },
+        .probe          = mc24lc64t_probe,
+        .remove         = mc24lc64t_remove,
+        .id_table       = mc24lc64t_id,
+};
+
+module_i2c_driver(mc24lc64t_driver);
+
+MODULE_AUTHOR("Abhisit Sangjan <asang@celestica.com>");
+MODULE_DESCRIPTION("Microchip 24LC64T Driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/pddf_custom_fpga_algo.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/pddf_custom_fpga_algo.c
new file mode 100644
index 000000000000..45fdcb4c9665
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/pddf_custom_fpga_algo.c
@@ -0,0 +1,626 @@
+/*
+ * pddf_custom_fpga_algo.c - driver algorithm for FPGAPCIE AXI IIC.
+ *
+ * Copyright (C) 2023 Celestica Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#define __STDC_WANT_LIB_EXT1__ 1
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/delay.h>
+#include <linux/jiffies.h>
+#include <linux/errno.h>
+#include <linux/i2c.h>
+#include "../../../../pddf/i2c/modules/include/pddf_i2c_algo.h"
+
+#define DEBUG_KERN 0
+
+enum {
+    STATE_DONE = 0,
+    STATE_INIT,
+    STATE_ADDR,
+    STATE_ADDR10,
+    STATE_START,
+    STATE_WRITE,
+    STATE_READ,
+    STATE_STOP,
+    STATE_ERROR,
+};
+
+#define XIIC_MSB_OFFSET 0
+#define XIIC_REG_OFFSET (0x100 + XIIC_MSB_OFFSET)
+
+/*
+ * Register offsets in bytes from RegisterBase. Three is added to the
+ * base offset to access LSB (IBM style) of the word
+ */
+#define XIIC_CR_REG_OFFSET   (0x00 + XIIC_REG_OFFSET)	/* Control Register   */
+#define XIIC_SR_REG_OFFSET   (0x04 + XIIC_REG_OFFSET)	/* Status Register    */
+#define XIIC_DTR_REG_OFFSET  (0x08 + XIIC_REG_OFFSET)	/* Data Tx Register   */
+#define XIIC_DRR_REG_OFFSET  (0x0C + XIIC_REG_OFFSET)	/* Data Rx Register   */
+#define XIIC_ADR_REG_OFFSET  (0x10 + XIIC_REG_OFFSET)	/* Address Register   */
+#define XIIC_TFO_REG_OFFSET  (0x14 + XIIC_REG_OFFSET)	/* Tx FIFO Occupancy  */
+#define XIIC_RFO_REG_OFFSET  (0x18 + XIIC_REG_OFFSET)	/* Rx FIFO Occupancy  */
+#define XIIC_TBA_REG_OFFSET  (0x1C + XIIC_REG_OFFSET)	/* 10 Bit Address reg */
+#define XIIC_RFD_REG_OFFSET  (0x20 + XIIC_REG_OFFSET)	/* Rx FIFO Depth reg  */
+#define XIIC_GPO_REG_OFFSET  (0x24 + XIIC_REG_OFFSET)	/* Output Register    */
+
+/* Control Register masks */
+#define XIIC_CR_ENABLE_DEVICE_MASK        0x01	/* Device enable = 1      */
+#define XIIC_CR_TX_FIFO_RESET_MASK        0x02	/* Transmit FIFO reset=1  */
+#define XIIC_CR_MSMS_MASK                 0x04	/* Master starts Txing=1  */
+#define XIIC_CR_DIR_IS_TX_MASK            0x08	/* Dir of tx. Txing=1     */
+#define XIIC_CR_NO_ACK_MASK               0x10	/* Tx Ack. NO ack = 1     */
+#define XIIC_CR_REPEATED_START_MASK       0x20	/* Repeated start = 1     */
+#define XIIC_CR_GENERAL_CALL_MASK         0x40	/* Gen Call enabled = 1   */
+
+/* Status Register masks */
+#define XIIC_SR_GEN_CALL_MASK             0x01	/* 1=a mstr issued a GC   */
+#define XIIC_SR_ADDR_AS_SLAVE_MASK        0x02	/* 1=when addr as slave   */
+#define XIIC_SR_BUS_BUSY_MASK             0x04	/* 1 = bus is busy        */
+#define XIIC_SR_MSTR_RDING_SLAVE_MASK     0x08	/* 1=Dir: mstr <-- slave  */
+#define XIIC_SR_TX_FIFO_FULL_MASK         0x10	/* 1 = Tx FIFO full       */
+#define XIIC_SR_RX_FIFO_FULL_MASK         0x20	/* 1 = Rx FIFO full       */
+#define XIIC_SR_RX_FIFO_EMPTY_MASK        0x40	/* 1 = Rx FIFO empty      */
+#define XIIC_SR_TX_FIFO_EMPTY_MASK        0x80	/* 1 = Tx FIFO empty      */
+
+/* Interrupt Status Register masks    Interrupt occurs when...       */
+#define XIIC_INTR_ARB_LOST_MASK           0x01	/* 1 = arbitration lost   */
+#define XIIC_INTR_TX_ERROR_MASK           0x02	/* 1=Tx error/msg complete */
+#define XIIC_INTR_TX_EMPTY_MASK           0x04	/* 1 = Tx FIFO/reg empty  */
+#define XIIC_INTR_RX_FULL_MASK            0x08	/* 1=Rx FIFO/reg=OCY level */
+#define XIIC_INTR_BNB_MASK                0x10	/* 1 = Bus not busy       */
+#define XIIC_INTR_AAS_MASK                0x20	/* 1 = when addr as slave */
+#define XIIC_INTR_NAAS_MASK               0x40	/* 1 = not addr as slave  */
+#define XIIC_INTR_TX_HALF_MASK            0x80	/* 1 = TX FIFO half empty */
+
+/* The following constants specify the depth of the FIFOs */
+#define IIC_RX_FIFO_DEPTH                 16	/* Rx fifo capacity       */
+#define IIC_TX_FIFO_DEPTH                 16	/* Tx fifo capacity       */
+
+/*
+ * Tx Fifo upper bit masks.
+ */
+#define XIIC_TX_DYN_START_MASK            0x0100 /* 1 = Set dynamic start */
+#define XIIC_TX_DYN_STOP_MASK             0x0200 /* 1 = Set dynamic stop */
+
+/*
+ * The following constants define the register offsets for the Interrupt
+ * registers. There are some holes in the memory map for reserved addresses
+ * to allow other registers to be added and still match the memory map of the
+ * interrupt controller registers
+ */
+#define XIIC_IISR_OFFSET     0x20 /* Interrupt Status Register */
+#define XIIC_RESETR_OFFSET   0x40 /* Reset Register */
+
+#define XIIC_RESET_MASK             0xAUL
+
+#define XIIC_PM_TIMEOUT		1000	/* ms */
+/* timeout waiting for the controller to respond */
+#define XIIC_I2C_TIMEOUT	(msecs_to_jiffies(1000))
+
+struct fpgalogic_i2c {
+    void __iomem *base;
+    u32 reg_shift;
+    u32 reg_io_width;
+    wait_queue_head_t wait;
+    struct i2c_msg *msg;
+    int pos;
+    int nmsgs;
+    int state; /* see STATE_ */
+    int ip_clock_khz;
+    int bus_clock_khz;
+    void (*reg_set)(struct fpgalogic_i2c *i2c, int reg, u8 value);
+    u8 (*reg_get)(struct fpgalogic_i2c *i2c, int reg);
+    u32 timeout;
+    struct mutex lock;
+};
+
+static struct fpgalogic_i2c fpgalogic_i2c[I2C_PCI_MAX_BUS];
+extern void __iomem * fpga_ctl_addr;
+extern int (*ptr_fpgapci_read)(uint32_t);
+extern int (*ptr_fpgapci_write)(uint32_t, uint32_t);
+extern int (*pddf_i2c_pci_add_numbered_bus)(struct i2c_adapter *, int);
+static int xiic_reinit(struct fpgalogic_i2c *i2c);
+
+
+void i2c_get_mutex(struct fpgalogic_i2c *i2c)
+{
+    mutex_lock(&i2c->lock);
+}
+
+/**
+ * i2c_release_mutex - release mutex
+ */
+void i2c_release_mutex(struct fpgalogic_i2c *i2c)
+{
+    mutex_unlock(&i2c->lock);
+}
+
+static inline void xiic_setreg32(struct fpgalogic_i2c *i2c, int reg, int value)
+{
+	(void)iowrite32(value, i2c->base + reg);
+}
+
+static inline int xiic_getreg32(struct fpgalogic_i2c *i2c, int reg)
+{
+	u32 ret;
+
+	ret = ioread32(i2c->base + reg);
+	
+	return ret;
+}
+
+static inline void xiic_irq_clr(struct fpgalogic_i2c *i2c, u32 mask)
+{
+	u32 isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET);
+
+	xiic_setreg32(i2c, XIIC_IISR_OFFSET, isr & mask);
+}
+
+static int xiic_clear_rx_fifo(struct fpgalogic_i2c *i2c)
+{
+	u8 sr;
+	unsigned long timeout;
+
+	timeout = jiffies + XIIC_I2C_TIMEOUT;
+	for (sr = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET);
+		!(sr & XIIC_SR_RX_FIFO_EMPTY_MASK);
+		sr = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET)) {
+		xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET);
+		if (time_after(jiffies, timeout)) {
+			printk("Failed to clear rx fifo\n");
+			return -ETIMEDOUT;
+		}
+	}
+
+	return 0;
+}
+
+/**
+ * Wait until something change in a given register
+ * @i2c: AXI IIC device instance
+ * @reg: register to query
+ * @mask: bitmask to apply on register value
+ * @val: expected result
+ * @timeout: timeout in jiffies
+ *
+ * Timeout is necessary to avoid to stay here forever when the chip
+ * does not answer correctly.
+ *
+ * Return: 0 on success, -ETIMEDOUT on timeout
+ */
+static int poll_wait(struct fpgalogic_i2c *i2c,
+		       int reg, u8 mask, u8 val,
+		       const unsigned long timeout)
+{
+	unsigned long j;
+	u8 status = 0;
+
+	j = jiffies + timeout;
+	while (1) {
+		mutex_lock(&i2c->lock);
+		status = xiic_getreg32(i2c, reg);
+		mutex_unlock(&i2c->lock);
+		if ((status & mask) == val)
+			break;
+		if (time_after(jiffies, j))
+			return -ETIMEDOUT;
+                cpu_relax();
+                cond_resched();		
+	}
+	return 0;
+}
+
+/**
+ * Wait until is possible to process some data
+ * @i2c: AXI IIC device instance
+ *
+ * Used when the device is in polling mode (interrupts disabled).
+ *
+ * Return: 0 on success, -ETIMEDOUT on timeout
+ */
+static int xiic_poll_wait(struct fpgalogic_i2c *i2c)
+{
+	u8 mask = 0, status = 0;
+	int err = 0;
+	int val = 0;
+	int tmp = 0;
+	mutex_lock(&i2c->lock);
+	if (i2c->state == STATE_DONE) {
+		/* transfer is over */
+		mask = XIIC_SR_BUS_BUSY_MASK;
+	} else if (i2c->state == STATE_WRITE || i2c->state == STATE_START){
+		/* on going transfer */
+		if (0 == i2c->msg->len){
+			mask = XIIC_INTR_TX_ERROR_MASK;
+		} else {
+			mask = XIIC_SR_TX_FIFO_FULL_MASK;
+		}
+	}
+	else if (i2c->state == STATE_READ){
+		/* on going receive */
+		mask = XIIC_SR_TX_FIFO_EMPTY_MASK | XIIC_SR_RX_FIFO_EMPTY_MASK;
+	}
+	mutex_unlock(&i2c->lock);
+	// printk("Wait for: 0x%x\n", mask);
+
+	/*
+	 * once we are here we expect to get the expected result immediately
+	 * so if after 50ms we timeout then something is broken.
+	 */
+	
+	if (1 == i2c->nmsgs && 0 == i2c->msg->len && i2c->state == STATE_START && !(i2c->msg->flags & I2C_M_RD)) { 	/* for i2cdetect I2C_SMBUS_QUICK mode*/
+		err = poll_wait(i2c, XIIC_IISR_OFFSET, mask, mask, msecs_to_jiffies(50));
+		mutex_lock(&i2c->lock);
+		status = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET);
+		mutex_unlock(&i2c->lock);
+		if (0 != err) { /* AXI IIC as an transceiver , if ever an XIIC_INTR_TX_ERROR_MASK interrupt happens, means no such i2c device */
+			err = 0;
+		} else {
+			err = -ETIMEDOUT;
+		}
+	} else {
+		if (mask & XIIC_SR_TX_FIFO_EMPTY_MASK){
+			err = poll_wait(i2c, XIIC_SR_REG_OFFSET, mask, XIIC_SR_TX_FIFO_EMPTY_MASK, msecs_to_jiffies(50));
+			mask &= ~XIIC_SR_TX_FIFO_EMPTY_MASK;
+		}
+		if (0 == err){
+			err = poll_wait(i2c, XIIC_SR_REG_OFFSET, mask, 0, msecs_to_jiffies(50));
+		}
+		mutex_lock(&i2c->lock);
+		status = xiic_getreg32(i2c, XIIC_IISR_OFFSET);	
+		
+		if ((status & XIIC_INTR_ARB_LOST_MASK) ||
+			((status & XIIC_INTR_TX_ERROR_MASK) &&
+			!(status & XIIC_INTR_RX_FULL_MASK) &&
+			!(i2c->msg->flags & I2C_M_RD))) {  /* AXI IIC as an transceiver , if ever an XIIC_INTR_TX_ERROR_MASK interrupt happens, return */
+			err = -ETIMEDOUT;
+			
+			if (status & XIIC_INTR_ARB_LOST_MASK) {
+				val = xiic_getreg32(i2c, XIIC_CR_REG_OFFSET);
+				tmp = XIIC_CR_MSMS_MASK;
+				val &=(~tmp);
+				xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, val);
+				xiic_setreg32(i2c, XIIC_IISR_OFFSET, XIIC_INTR_ARB_LOST_MASK);
+				printk("%s: TRANSFER STATUS ERROR, ISR: bit 0x%x happens\n",
+					 __func__, XIIC_INTR_ARB_LOST_MASK);
+			} 
+			if (status & XIIC_INTR_TX_ERROR_MASK) {
+				int sta = 0;
+				int cr = 0;
+				sta = xiic_getreg32(i2c,XIIC_SR_REG_OFFSET);
+				cr = xiic_getreg32(i2c,XIIC_CR_REG_OFFSET);
+				xiic_setreg32(i2c, XIIC_IISR_OFFSET, XIIC_INTR_TX_ERROR_MASK);
+				printk("%s: TRANSFER STATUS ERROR, ISR: bit 0x%x happens; SR: bit 0x%x; CR: bit 0x%x\n",
+					 __func__, status, sta, cr);
+			}
+			/* Soft reset IIC controller. */
+			xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK);
+			(void)xiic_reinit(i2c);
+			mutex_unlock(&i2c->lock);
+			return err;
+		}
+		mutex_unlock(&i2c->lock);
+	}
+	
+	if (err)
+		printk("%s: STATUS timeout, bit 0x%x did not clear in 50ms\n",
+			 __func__, status);
+	return err;
+}
+
+static void xiic_process(struct fpgalogic_i2c *i2c)
+{
+	struct i2c_msg *msg = i2c->msg;
+	//unsigned long flags;
+	u16 val;
+
+	/*
+	 * If we spin here because we are in timeout, so we are going
+	 * to be in STATE_ERROR.
+	 */
+	mutex_lock(&i2c->lock);
+	// printk("STATE: %d\n", i2c->state);
+
+	if (i2c->state == STATE_START) {
+		i2c->state =(msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE;
+		/* if it's the time sequence is 'start bit + address + read bit + stop bit' */
+		if (i2c->state == STATE_READ){
+			/* it's the last message so we include dynamic stop bit with length */
+			val = msg->len | XIIC_TX_DYN_STOP_MASK;
+			xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, val);
+			goto out;
+		}
+	}
+	if (i2c->state == STATE_READ){
+                /* suit for I2C_FUNC_SMBUS_BLOCK_DATA */
+                if (msg->flags & I2C_M_RECV_LEN) {
+                        msg->len = xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET);
+                        msg->flags &= ~I2C_M_RECV_LEN;
+                        msg->buf[i2c->pos++] = msg->len;
+                }
+                else {
+                        msg->buf[i2c->pos++] = xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET);
+                }
+	} else if (i2c->state == STATE_WRITE){
+		/* if it reaches the last byte data to be sent */
+		if ((i2c->pos == msg->len - 1) && (i2c->nmsgs == 1)){
+			val = msg->buf[i2c->pos++] | XIIC_TX_DYN_STOP_MASK;
+			xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, val);
+			i2c->state = STATE_DONE;
+			goto out;
+		/* if it is not the last byte data to be sent */
+		} else if (i2c->pos < msg->len) {
+			xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, msg->buf[i2c->pos++]);
+			goto out;
+		}
+	}
+
+	/* end of msg? */
+	if (i2c->pos == msg->len) {
+		i2c->nmsgs--;
+		i2c->pos = 0;
+		if (i2c->nmsgs) {
+			i2c->msg++;
+			msg = i2c->msg;	
+			if (!(msg->flags & I2C_M_NOSTART)) /* send start? */{
+				i2c->state = STATE_START;			
+				xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msg) | XIIC_TX_DYN_START_MASK);
+				goto out;
+			}
+		} else {	/* end? */
+			i2c->state = STATE_DONE;
+			goto out;
+		}
+	}
+
+out:
+	mutex_unlock(&i2c->lock);
+	return ;
+}
+
+static int fpga_axi_iic_poll(struct fpgalogic_i2c *i2c,
+			                  struct i2c_msg *msgs, int num)
+{
+	int ret = 0;
+	// u8 ctrl;
+	
+	mutex_lock(&i2c->lock);
+	/* Soft reset IIC controller. */
+	xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK);
+	/* Set receive Fifo depth to maximum (zero based). */
+	xiic_setreg32(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1);
+		
+	/* Reset Tx Fifo. */
+	xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK);
+	
+	/* Enable IIC Device, remove Tx Fifo reset & disable general call. */
+	xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_ENABLE_DEVICE_MASK);
+	
+	/* set i2c clock as 100Hz. */
+	//xiic_setreg32(i2c, 0x13c, 0x7C);
+	
+	/* make sure RX fifo is empty */
+	ret = xiic_clear_rx_fifo(i2c);
+	if (ret){
+		mutex_unlock(&i2c->lock);
+		return ret;
+	}
+	
+	i2c->msg = msgs;
+	i2c->pos = 0;
+	i2c->nmsgs = num;
+	i2c->state = STATE_START;
+
+	// printk("STATE: %d\n", i2c->state);
+	
+	if (msgs->len == 0 && num == 1){ /* suit for i2cdetect time sequence */
+		u8 status = xiic_getreg32(i2c, XIIC_IISR_OFFSET);
+		xiic_irq_clr(i2c, status);
+		/* send out the 1st byte data and stop bit */
+		xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msgs) | XIIC_TX_DYN_START_MASK | XIIC_TX_DYN_STOP_MASK);
+	} else {
+		/* send out the 1st byte data */
+		xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msgs) | XIIC_TX_DYN_START_MASK);
+	}
+	mutex_unlock(&i2c->lock);
+	while (1) {
+		int err;
+		
+		err = xiic_poll_wait(i2c);
+		if (err) {
+			i2c->state = STATE_ERROR;
+			break;
+		}else if (i2c->state == STATE_DONE){
+			break;
+		}
+		xiic_process(i2c);
+	}
+
+	return (i2c->state == STATE_DONE) ? num : -EIO;
+}
+
+static int fpga_axi_iic_access(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
+{
+    struct fpgalogic_i2c *i2c = i2c_get_adapdata(adap);
+    int err = -EIO;
+	u8 retry = 0, max_retry = 0;
+
+	if(((1 == msgs->len && (msgs->flags & I2C_M_RD))
+		|| (0 == msgs->len && !(msgs->flags & I2C_M_RD)) ) && num == 1 ) /* I2C_SMBUS_QUICK or I2C_SMBUS_BYTE */
+		max_retry = 1;
+	else
+		max_retry = 5;  // retry 5 times if receive a NACK or other errors
+
+	while((-EIO == err) && (retry < max_retry))
+	{
+		err = fpga_axi_iic_poll(i2c, msgs, num);
+		retry++;
+	}
+
+     return err;
+}
+
+/**
+ * A callback function show available smbus functions.
+ */
+static u32 fpga_axi_iic_func(struct i2c_adapter *adap)
+{
+    /* a typical full-I2C adapter would use the following  */
+    return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
+}
+
+static const struct i2c_algorithm axi_iic_algorithm = {
+    .master_xfer = fpga_axi_iic_access,
+    .functionality  = fpga_axi_iic_func,
+};
+
+static int xiic_reinit(struct fpgalogic_i2c *i2c)
+{
+	int ret;
+	int val = 0;
+	
+	/* Soft reset IIC controller. */
+	xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK);
+	
+	/* Set receive Fifo depth to maximum (zero based). */
+	xiic_setreg32(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1);
+
+	/* Reset Tx Fifo. */
+	xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK);
+
+	/* Enable IIC Device, remove Tx Fifo reset & disable general call. */
+	val |= XIIC_CR_ENABLE_DEVICE_MASK;
+	//val |= XIIC_CR_TX_FIFO_RESET_MASK;
+	//val |= XIIC_CR_MSMS_MASK;
+	val |= XIIC_CR_DIR_IS_TX_MASK;
+	xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, val);
+
+	/* make sure RX fifo is empty */
+	ret = xiic_clear_rx_fifo(i2c);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static int fpgai2c_init(struct fpgalogic_i2c *i2c)
+{
+    // int prescale;
+    // int diff;
+    // u8 ctrl;
+	int ret;
+
+	
+    //i2c->reg_set = xiic_setreg32;
+    //i2c->reg_get = xiic_getreg32;
+	
+	ret = xiic_reinit(i2c);
+	if (ret < 0) {
+		printk("Cannot xiic_reinit\n");
+		return ret;
+	}
+
+    /* Initialize interrupt handlers if not already done */
+    init_waitqueue_head(&i2c->wait);
+    return 0;
+};
+
+static int adap_data_init(struct i2c_adapter *adap, int i2c_ch_index)
+{
+    struct fpgapci_devdata *pci_privdata = 0;
+    pci_privdata = (struct fpgapci_devdata*) dev_get_drvdata(adap->dev.parent);
+
+    if (pci_privdata == 0) {
+        printk("[%s]: ERROR pci_privdata is 0\n", __FUNCTION__);
+        return -1;
+    }
+#ifdef DEBUG_KERN
+    pddf_dbg(FPGA, KERN_INFO "[%s] index: [%d] fpga_data__base_addr:0x%0x8lx"
+        " fpgapci_bar_len:0x%08lx fpga_i2c_ch_base_addr:0x%08lx ch_size=0x%x supported_i2c_ch=%d",
+             __FUNCTION__, i2c_ch_index, pci_privdata->fpga_data_base_addr,
+            pci_privdata->bar_length, pci_privdata->fpga_i2c_ch_base_addr,
+            pci_privdata->fpga_i2c_ch_size, pci_privdata->max_fpga_i2c_ch);
+#endif
+    if (i2c_ch_index >= pci_privdata->max_fpga_i2c_ch
+            || pci_privdata->max_fpga_i2c_ch > I2C_PCI_MAX_BUS){
+        printk("[%s]: ERROR i2c_ch_index=%d max_ch_index=%d out of range: %d\n",
+             __FUNCTION__, i2c_ch_index, pci_privdata->max_fpga_i2c_ch, I2C_PCI_MAX_BUS);
+        return -1;
+    }
+
+#ifdef __STDC_LIB_EXT1__
+    memset_s(&fpgalogic_i2c[i2c_ch_index], sizeof(fpgalogic_i2c[0]), 0, sizeof(fpgalogic_i2c[0]));
+#else
+    memset(&fpgalogic_i2c[i2c_ch_index], 0, sizeof(fpgalogic_i2c[0]));
+#endif
+    fpgalogic_i2c[i2c_ch_index].base = pci_privdata->fpga_i2c_ch_base_addr +
+                          i2c_ch_index* pci_privdata->fpga_i2c_ch_size;
+    mutex_init(&fpgalogic_i2c[i2c_ch_index].lock);
+    fpgai2c_init(&fpgalogic_i2c[i2c_ch_index]);
+
+    adap->algo_data = &fpgalogic_i2c[i2c_ch_index];
+    i2c_set_adapdata(adap, &fpgalogic_i2c[i2c_ch_index]);
+    return 0;
+}
+
+static int pddf_i2c_pci_add_numbered_bus_default (struct i2c_adapter *adap, int i2c_ch_index)
+{
+    int ret = 0;
+
+    adap_data_init(adap, i2c_ch_index);
+    adap->algo  = &axi_iic_algorithm;
+    ret = i2c_add_numbered_adapter(adap);
+    return ret;
+}
+
+/*
+ * FPGAPCI APIs
+ */
+static int board_i2c_fpgapci_read(uint32_t offset)
+{
+        int data;
+        data=ioread32(fpga_ctl_addr+offset);
+        return data;
+}
+
+
+static int board_i2c_fpgapci_write(uint32_t offset, uint32_t value)
+{
+        iowrite32(value, fpga_ctl_addr+offset);
+        return (0);
+}
+
+
+static int __init pddf_custom_fpga_algo_init(void)
+{
+    pddf_dbg(FPGA, KERN_INFO "[%s]\n", __FUNCTION__);
+    pddf_i2c_pci_add_numbered_bus = &pddf_i2c_pci_add_numbered_bus_default;
+    ptr_fpgapci_read = board_i2c_fpgapci_read;
+    ptr_fpgapci_write = board_i2c_fpgapci_write;
+    return 0;
+}
+static void __exit pddf_custom_fpga_algo_exit(void)
+{
+    pddf_dbg(FPGA, KERN_INFO "[%s]\n", __FUNCTION__);
+    pddf_i2c_pci_add_numbered_bus = NULL;
+    ptr_fpgapci_read = NULL;
+    ptr_fpgapci_write = NULL;
+    return;
+}
+
+module_init(pddf_custom_fpga_algo_init);
+module_exit(pddf_custom_fpga_algo_exit);
+
+MODULE_DESCRIPTION("Module driver algorithm for 7021 FPGAPCIe AXI IIC");
+MODULE_VERSION("1.0.0");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/pddf_custom_fpga_extend.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/pddf_custom_fpga_extend.c
new file mode 100644
index 000000000000..4ea09f09404f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/pddf_custom_fpga_extend.c
@@ -0,0 +1,372 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * fpga-cls.c - front panel port control.
+ *
+ * Copyright (C) 2019 Celestica Corp.
+ */
+
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/spinlock.h>
+#include <linux/acpi.h>
+#include "../../../../pddf/i2c/modules/include/pddf_i2c_algo.h"
+
+#define FPGA_VERSION_ADDR            0x0000
+#define FPGA_SCRATCH_ADDR            0x0004
+#define FPGA_BCM_TEMP_ADDR           0x001c
+#define FPGA_BCM_TEMP_LOW_ADDR       0x0078
+#define FPGA_BCM_TEMP_HIGH_ADDR      0x0080
+#define FPGA_REG_SPACE_SIZE          0x2000
+
+
+/*
+ * fpga_priv - port fpga private data
+ * @dev: device for reference
+ * @base: virtual base address
+ * @num_ports: number of front panel ports
+ * @fp_devs: list of front panel port devices
+ */
+struct fpga_priv {
+	void __iomem *base;
+	struct mutex fpga_lock;         // For FPGA internal lock
+	void __iomem * fpga_read_addr;
+};
+
+extern void __iomem * fpga_ctl_addr;
+
+/**
+ * Show the value of the register set by 'set_fpga_reg_address'
+ * If the address is not set by 'set_fpga_reg_address' first,
+ * The version register is selected by default.
+ * @param  buf     register value in hextring
+ * @return         number of bytes read, or an error code
+ */
+static ssize_t get_fpga_reg_value(struct device *dev, struct device_attribute *devattr,
+                                  char *buf)
+{
+    // read data from the address
+    uint32_t data;
+    struct fpga_priv *fpga = dev_get_drvdata(dev);
+
+    data = ioread32(fpga->fpga_read_addr);
+    return sprintf(buf, "0x%8.8x\n", data);
+}
+/**
+ * Store the register address
+ * @param  buf     address wanted to be read value of
+ * @return         number of bytes stored, or an error code
+ */
+static ssize_t set_fpga_reg_address(struct device *dev, struct device_attribute *devattr,
+                                    const char *buf, size_t count)
+{
+    uint32_t addr;
+    char *last;
+	struct fpga_priv *fpga = dev_get_drvdata(dev);
+
+    addr = (uint32_t)strtoul(buf, &last, 16);
+    if (addr == 0 && buf == last) {
+        return -EINVAL;
+    }
+    fpga->fpga_read_addr = fpga->base + addr;
+    return count;
+}
+/**
+ * Show value of fpga scratch register
+ * @param  buf     register value in hexstring
+ * @return         number of bytes read, or an error code
+ */
+static ssize_t get_fpga_scratch(struct device *dev, struct device_attribute *devattr,
+                                char *buf)
+{
+	struct fpga_priv *fpga = dev_get_drvdata(dev);
+
+    return sprintf(buf, "0x%8.8x\n", ioread32(fpga->base + FPGA_SCRATCH_ADDR) & 0xffffffff);
+}
+/**
+ * Store value of fpga scratch register
+ * @param  buf     scratch register value passing from user space
+ * @return         number of bytes stored, or an error code
+ */
+static ssize_t set_fpga_scratch(struct device *dev, struct device_attribute *devattr,
+                                const char *buf, size_t count)
+{
+    uint32_t data;
+    char *last;
+	struct fpga_priv *fpga = dev_get_drvdata(dev);
+
+    data = (uint32_t)strtoul(buf, &last, 16);
+    if (data == 0 && buf == last) {
+        return -EINVAL;
+    }
+    iowrite32(data, fpga->base + FPGA_SCRATCH_ADDR);
+    return count;
+}
+
+/**
+ * Show value of fpga version register
+ * @param  buf     register value in hexstring
+ * @return         number of bytes read, or an error code
+ */
+static ssize_t get_fpga_version(struct device *dev, struct device_attribute *devattr,
+                                char *buf)
+{
+	struct fpga_priv *fpga = dev_get_drvdata(dev);
+
+    return sprintf(buf, "0x%8.8x\n", ioread32(fpga->base + FPGA_VERSION_ADDR) & 0xffffffff);
+}
+
+
+/**
+ * Store a value in a specific register address
+ * @param  buf     the value and address in format '0xhhhh 0xhhhhhhhh'
+ * @return         number of bytes sent by user space, or an error code
+ */
+static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *devattr,
+                                  const char *buf, size_t count)
+{
+    // register are 4 bytes
+    uint32_t addr;
+    uint32_t value;
+    uint32_t mode = 8;
+    char *tok;
+    char clone[count];
+    char *pclone = clone;
+    char *last;
+	struct fpga_priv *fpga = dev_get_drvdata(dev);
+
+    strscpy(clone, buf, count);
+    mutex_lock(&fpga->fpga_lock);
+    tok = strsep((char**)&pclone, " ");
+    if (tok == NULL) {
+        mutex_unlock(&fpga->fpga_lock);
+        return -EINVAL;
+    }
+    addr = (uint32_t)strtoul(tok, &last, 16);
+    if (addr == 0 && tok == last) {
+        mutex_unlock(&fpga->fpga_lock);
+        return -EINVAL;
+    }
+    tok = strsep((char**)&pclone, " ");
+    if (tok == NULL) {
+        mutex_unlock(&fpga->fpga_lock);
+        return -EINVAL;
+    }
+    value = (uint32_t)strtoul(tok, &last, 16);
+    if (value == 0 && tok == last) {
+        mutex_unlock(&fpga->fpga_lock);
+        return -EINVAL;
+    }
+    tok = strsep((char**)&pclone, " ");
+    if (tok == NULL) {
+        mode = 32;
+    } else {
+        mode = (uint32_t)strtoul(tok, &last, 10);
+        if (mode == 0 && tok == last) {
+            mutex_unlock(&fpga->fpga_lock);
+            return -EINVAL;
+        }
+    }
+    if (mode == 32) {
+        iowrite32(value, fpga->base + addr);
+    } else if (mode == 8) {
+        iowrite8(value, fpga->base + addr);
+    } else {
+        mutex_unlock(&fpga->fpga_lock);
+        return -EINVAL;
+    }
+    mutex_unlock(&fpga->fpga_lock);
+    return count;
+}
+
+/**
+ * Read all FPGA  register in binary mode.
+ * @param  buf   Raw transceivers port startus and control register values
+ * @return       number of bytes read, or an error code
+ */
+static ssize_t dump_read(struct file *filp, struct kobject *kobj,
+                         struct bin_attribute *attr, char *buf,
+                         loff_t off, size_t count)
+{
+    unsigned long i = 0;
+    ssize_t status;
+    u8 read_reg;
+	struct device *dev = kobj_to_dev(kobj);
+	struct fpga_priv *fpga = dev_get_drvdata(dev);
+
+    if ( off + count > FPGA_REG_SPACE_SIZE ) {
+        return -EINVAL;
+    }
+    mutex_lock(&fpga->fpga_lock);
+    while (i < count) {
+        read_reg = ioread8(fpga->base + off + i);
+        buf[i++] = read_reg;
+    }
+    status = count;
+    mutex_unlock(&fpga->fpga_lock);
+    return status;
+}
+
+/**
+ * Show value of fpga bcm switch internal temp sensor register calculated by FPGA
+ * @param  buf     register value in hexstring
+ * @return         number of bytes read, or an error code
+ */
+static ssize_t get_fpga_bcm_temp_fpga(struct device *dev, struct device_attribute *devattr,
+                                char *buf)
+{
+    struct fpga_priv *fpga = dev_get_drvdata(dev);
+    uint32_t reg_val = ioread32(fpga->base + FPGA_BCM_TEMP_ADDR) & 0x3ffff;
+
+    return sprintf(buf, "0x%08x\n", reg_val);
+}
+
+/**
+ * Show value of fpga bcm switch internal temp sensor register
+ * @param  buf     register value in hexstring
+ * @return         number of bytes read, or an error code
+ */
+static ssize_t get_fpga_bcm_temp(struct device *dev, struct device_attribute *devattr,
+                                char *buf)
+{
+    struct fpga_priv *fpga = dev_get_drvdata(dev);
+    u8 low_byte = ioread32(fpga->base + FPGA_BCM_TEMP_LOW_ADDR) & 0xff;
+    u8 high_byte = ioread32(fpga->base + FPGA_BCM_TEMP_HIGH_ADDR) & 0xff;
+
+    return sprintf(buf, "0x%02x%02x\n", high_byte, low_byte);
+}
+
+/* FPGA attributes */
+static DEVICE_ATTR( getreg, 0600, get_fpga_reg_value, set_fpga_reg_address);
+static DEVICE_ATTR( setreg, 0200, NULL , set_fpga_reg_value);
+static DEVICE_ATTR( scratch, 0600, get_fpga_scratch, set_fpga_scratch);
+static DEVICE_ATTR( version, 0400, get_fpga_version, NULL);
+static DEVICE_ATTR( bcm_temp_fpga, 0400, get_fpga_bcm_temp_fpga, NULL);
+static DEVICE_ATTR( bcm_temp, 0400, get_fpga_bcm_temp, NULL);
+static BIN_ATTR_RO( dump, FPGA_REG_SPACE_SIZE);
+
+static struct bin_attribute *fpga_bin_attrs[] = {
+    &bin_attr_dump,
+    NULL,
+};
+
+static struct attribute *fpga_attrs[] = {
+    &dev_attr_getreg.attr,
+    &dev_attr_scratch.attr,
+    &dev_attr_version.attr,
+    &dev_attr_bcm_temp_fpga.attr,
+    &dev_attr_bcm_temp.attr,
+    &dev_attr_setreg.attr,
+    NULL,
+};
+
+static struct attribute_group fpga_attr_grp = {
+    .attrs = fpga_attrs,
+    .bin_attrs = fpga_bin_attrs,
+};
+
+
+static int cls_fpga_probe(struct platform_device *pdev)
+{
+	struct fpga_priv *fpga;
+	int ret = -ENOMEM;
+
+	if (!fpga_ctl_addr){
+	    printk(KERN_WARNING, "fpga_ctl_addr is null");
+	    return ret;
+	}
+
+	fpga = devm_kzalloc(&pdev->dev, sizeof(struct fpga_priv), GFP_KERNEL);
+	if (!fpga){
+		ret = -ENOMEM;
+		goto err_exit;
+	}
+
+	mutex_init(&fpga->fpga_lock);
+	dev_set_drvdata(&pdev->dev, fpga);
+	fpga->base = fpga_ctl_addr;
+
+	printk("FPGA version: 0x%x\n", ioread32(fpga->base + FPGA_VERSION_ADDR));
+
+    ret = sysfs_create_group(&pdev->dev.kobj, &fpga_attr_grp);
+    if (ret != 0) {
+        printk(KERN_ERR "Cannot create FPGA system sysfs attributes\n");
+        goto err_remove_fpga;
+    }
+
+    return 0;
+
+err_remove_fpga:
+	sysfs_remove_group(&pdev->dev.kobj, &fpga_attr_grp);
+mem_unmap:
+	iounmap(fpga->base);
+err_exit:
+	return ret;
+}
+
+static int cls_fpga_remove(struct platform_device *pdev)
+{
+	struct fpga_priv *fpga = dev_get_drvdata(&pdev->dev);
+
+	sysfs_remove_group(&pdev->dev.kobj, &fpga_attr_grp);
+	iounmap(fpga->base);
+	return 0;
+}
+
+static void fpga_dev_release( struct device * dev)
+{
+    return;
+}
+static struct resource cls_fpga_resources[] = {
+    {
+	.start = NULL,
+        .end = NULL,
+	.flags = IORESOURCE_IO,
+    },
+};
+
+static struct platform_device cls_fpga_dev = {
+    .name           = "fpga_sysfs",
+    .id             = -1,
+    .num_resources  = ARRAY_SIZE(cls_fpga_resources),
+    .resource       = cls_fpga_resources,
+    .dev = {
+        .release = fpga_dev_release,
+    }
+};
+
+static struct platform_driver cls_fpga_driver = {
+	.probe = cls_fpga_probe,
+	.remove = cls_fpga_remove,
+	.driver = {
+		.name = "fpga_sysfs",
+	},
+};
+
+static int __init drv_init(void)
+{
+	int rc = 0;
+
+	rc = platform_device_register(&cls_fpga_dev);
+	rc += platform_driver_register(&cls_fpga_driver);
+	printk("fpga drv_init:%d\n", rc);
+	return rc;
+}
+
+static void __exit drv_exit(void)
+{
+    platform_driver_unregister(&cls_fpga_driver);
+    platform_device_unregister(&cls_fpga_dev);
+    printk("fpga drv_exit.\n");
+}
+
+module_init(drv_init);
+module_exit(drv_exit);
+
+MODULE_AUTHOR("Nicholas Wu<nicwu@celestica.com>");
+MODULE_DESCRIPTION("Celestica fpga access/control driver");
+MODULE_VERSION("2.0.0");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:cls-fpga");
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_api.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_api.c
new file mode 100644
index 000000000000..338417125569
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_api.c
@@ -0,0 +1,478 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ *  Description of various APIs related to PSU component
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/dmi.h>
+#include <linux/kobject.h>
+#include "../../../../../pddf/i2c/modules/include/pddf_psu_defs.h"
+#include "pddf_psu_driver.h"
+
+
+#define PSU_REG_VOUT_MODE 0x20
+#define PSU_REG_READ_VOUT 0x8b
+
+/*#define PSU_DEBUG*/
+#ifdef PSU_DEBUG
+#define psu_dbg(...) printk(__VA_ARGS__)
+#else
+#define psu_dbg(...)
+#endif
+
+
+void get_psu_duplicate_sysfs(int idx, char *str)
+{
+    switch (idx)
+    {
+        case PSU_V_OUT:
+            strscpy(str, "in3_input", ATTR_NAME_LEN);
+            break;
+        case PSU_I_OUT:
+            strscpy(str, "curr2_input", ATTR_NAME_LEN);
+            break;
+        case PSU_P_OUT:
+            strscpy(str, "power2_input", ATTR_NAME_LEN);
+            break;
+        case PSU_FAN1_SPEED:
+            strscpy(str, "fan1_input", ATTR_NAME_LEN);
+            break;
+        case PSU_TEMP1_INPUT:
+            strscpy(str, "temp1_input", ATTR_NAME_LEN);
+            break;
+        default:
+            break;
+    }
+
+    return;
+}
+
+static int two_complement_to_int(u16 data, u8 valid_bit, int mask)
+{
+    u16  valid_data  = data & mask;
+    bool is_negative = valid_data >> (valid_bit - 1);
+
+    return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data;
+}
+
+static u8 psu_get_vout_mode(struct i2c_client *client)
+{
+    u8 status = 0, retry = 10;
+    uint8_t offset = PSU_REG_VOUT_MODE;
+
+    while (retry)
+    {
+        status = i2c_smbus_read_byte_data((struct i2c_client *)client, offset);
+        if (unlikely(status < 0)) 
+        {
+            msleep(60);
+            retry--;
+            continue;
+        }
+        break;
+    }
+
+    if (status < 0)
+    {
+        printk(KERN_ERR "%s: Get PSU Vout mode failed\n", __func__);
+        return 0;
+    }
+    else
+    {
+        /*printk(KERN_ERR "%s: vout_mode reg value 0x%x\n", __func__, status);*/
+        return status;
+    }
+}
+
+static u16 psu_get_v_out(struct i2c_client *client)
+{
+    u16 status = 0, retry = 10;
+    uint8_t offset = PSU_REG_READ_VOUT;
+
+    while (retry) {
+        status = i2c_smbus_read_word_data((struct i2c_client *)client, offset);
+        if (unlikely(status < 0)) {
+            msleep(60);
+            retry--;
+            continue;
+        }
+        break;
+    }
+
+    if (status < 0)
+    {
+        printk(KERN_ERR "%s: Get PSU Vout failed\n", __func__);
+        return 0;
+    }
+    else
+    {
+        /*printk(KERN_ERR "%s: vout reg value 0x%x\n", __func__, status);*/
+        return status;
+    }
+}
+
+int psu_update_hw(struct device *dev, struct psu_attr_info *info, PSU_DATA_ATTR *udata)
+{
+    int status = 0;
+    struct i2c_client *client = to_i2c_client(dev);
+    PSU_SYSFS_ATTR_DATA *sysfs_attr_data = NULL;
+
+
+    mutex_lock(&info->update_lock);
+
+    sysfs_attr_data = udata->access_data;
+    if (sysfs_attr_data->pre_set != NULL)
+    {
+        status = (sysfs_attr_data->pre_set)(client, udata, info);
+        if (status!=0)
+            dev_warn(&client->dev, "%s: pre_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+    }
+    if (sysfs_attr_data->do_set != NULL)
+    {
+        status = (sysfs_attr_data->do_set)(client, udata, info);
+        if (status!=0)
+            dev_warn(&client->dev, "%s: do_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+
+    }
+    if (sysfs_attr_data->post_set != NULL)
+    {
+        status = (sysfs_attr_data->post_set)(client, udata, info);
+        if (status!=0)
+            dev_warn(&client->dev, "%s: post_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+    }
+
+    mutex_unlock(&info->update_lock);
+
+    return 0;
+}
+
+
+int psu_update_attr(struct device *dev, struct psu_attr_info *data, PSU_DATA_ATTR *udata)
+{
+    int status = 0;
+    struct i2c_client *client = to_i2c_client(dev);
+    PSU_SYSFS_ATTR_DATA *sysfs_attr_data=NULL;
+
+    mutex_lock(&data->update_lock);
+
+    if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || !data->valid)
+    {
+        dev_dbg(&client->dev, "Starting update for %s\n", data->name);
+
+        sysfs_attr_data = udata->access_data;
+        if (sysfs_attr_data->pre_get != NULL)
+        {
+            status = (sysfs_attr_data->pre_get)(client, udata, data);
+            if (status!=0)
+                dev_warn(&client->dev, "%s: pre_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+        }
+        if (sysfs_attr_data->do_get != NULL)
+        {
+            status = (sysfs_attr_data->do_get)(client, udata, data);
+            if (status!=0)
+                dev_warn(&client->dev, "%s: do_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+
+        }
+        if (sysfs_attr_data->post_get != NULL)
+        {
+            status = (sysfs_attr_data->post_get)(client, udata, data);
+            if (status!=0)
+                dev_warn(&client->dev, "%s: post_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+        }
+
+        data->last_updated = jiffies;
+        data->valid = 1;
+    }
+
+    mutex_unlock(&data->update_lock);
+    return 0;
+}
+
+ssize_t psu_show_default(struct device *dev, struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    struct i2c_client *client = to_i2c_client(dev);
+    struct psu_data *data = i2c_get_clientdata(client);
+    PSU_PDATA *pdata = (PSU_PDATA *)(client->dev.platform_data);
+    PSU_DATA_ATTR *usr_data = NULL;
+    struct psu_attr_info *sysfs_attr_info = NULL;
+    int i, status=0;
+    u16 value = 0;
+    u8 vout_mode = 0;
+    int exponent, mantissa;
+    int multiplier = 1000;
+    char new_str[ATTR_NAME_LEN] = "";
+    PSU_SYSFS_ATTR_DATA *ptr = NULL;
+
+    for (i=0;i<data->num_attr;i++)
+    {
+        ptr = (PSU_SYSFS_ATTR_DATA *)pdata->psu_attrs[i].access_data;
+        get_psu_duplicate_sysfs(ptr->index , new_str);
+        if ( strcmp(attr->dev_attr.attr.name, pdata->psu_attrs[i].aname) == 0 || strcmp(attr->dev_attr.attr.name, new_str) == 0 )
+        {
+            sysfs_attr_info = &data->attr_info[i];
+            usr_data = &pdata->psu_attrs[i];
+            strscpy(new_str, "", ATTR_NAME_LEN);
+        }
+    }
+
+    if (sysfs_attr_info==NULL || usr_data==NULL)
+    {
+        printk(KERN_ERR "%s is not supported attribute for this client\n", attr->dev_attr.attr.name);
+        goto exit;
+    }
+
+    psu_update_attr(dev, sysfs_attr_info, usr_data);
+
+    switch(attr->index)
+    {
+        case PSU_PRESENT:
+        case PSU_POWER_GOOD:
+            status = sysfs_attr_info->val.intval;
+            return sprintf(buf, "%d\n", status);
+            break;
+        case PSU_MODEL_NAME:
+        case PSU_MFR_ID:
+        case PSU_SERIAL_NUM:
+        case PSU_FAN_DIR:
+            return sprintf(buf, "%s\n", sysfs_attr_info->val.strval);
+            break;
+        case PSU_V_OUT:
+            value = psu_get_v_out(client);
+            vout_mode = psu_get_vout_mode(client);
+            if ((vout_mode >> 5) == 0)
+                exponent = two_complement_to_int(vout_mode & 0x1f, 5, 0x1f);
+            else
+                exponent = 0;
+    
+            mantissa = value;
+            if (exponent >= 0)
+                return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier);
+			
+            else
+                return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent));
+            break;
+
+        case PSU_V_OUT_MIN:
+        case PSU_V_OUT_MAX:
+            multiplier = 1000;
+            value = sysfs_attr_info->val.shortval;
+            vout_mode = psu_get_vout_mode(client);
+            if ((vout_mode >> 5) == 0)
+                exponent = two_complement_to_int(vout_mode & 0x1f, 5, 0x1f);
+            else
+                exponent = 0;
+            mantissa = two_complement_to_int(value & 0xffff, 16, 0xffff);
+			
+            if (exponent >= 0)
+                return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier);
+            else
+                return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent));
+            break;       
+        case PSU_I_OUT:
+        case PSU_V_IN:
+        case PSU_I_IN:
+        case PSU_P_OUT_MAX:
+            multiplier = 1000;
+            value = sysfs_attr_info->val.shortval;
+            exponent = two_complement_to_int(value >> 11, 5, 0x1f);
+            mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff);
+            if (exponent >= 0)
+                return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier);
+            else
+                return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent));
+            break;
+        case PSU_P_IN:
+        case PSU_P_OUT:
+            multiplier = 1000000;
+            value = sysfs_attr_info->val.shortval;
+            exponent = two_complement_to_int(value >> 11, 5, 0x1f);
+            mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff);
+            if (exponent >= 0)
+                return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier);
+            else
+                return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent));
+
+            break;
+        case PSU_FAN1_SPEED:
+            value = sysfs_attr_info->val.shortval;
+            exponent = two_complement_to_int(value >> 11, 5, 0x1f);
+            mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff);
+            if (exponent >= 0)
+                return sprintf(buf, "%d\n", (mantissa << exponent));
+            else
+                return sprintf(buf, "%d\n", (mantissa) / (1 << -exponent));
+
+            break;
+        case PSU_TEMP1_INPUT:
+        case PSU_TEMP1_HIGH_THRESHOLD:
+            multiplier = 1000;
+            value = sysfs_attr_info->val.shortval;
+            exponent = two_complement_to_int(value >> 11, 5, 0x1f);
+            mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff);
+            if (exponent >= 0)
+                return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier);
+            else
+                return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent));
+
+            break;
+        default:
+            printk(KERN_ERR "%s: Unable to find attribute index for %s\n", __FUNCTION__, usr_data->aname);
+            goto exit;
+    }
+
+exit:
+    return sprintf(buf, "%d\n", status);
+}
+
+
+ssize_t psu_store_default(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    struct i2c_client *client = to_i2c_client(dev);
+    struct psu_data *data = i2c_get_clientdata(client);
+    PSU_PDATA *pdata = (PSU_PDATA *)(client->dev.platform_data);
+    PSU_DATA_ATTR *usr_data = NULL;
+    struct psu_attr_info *sysfs_attr_info = NULL;
+    int i;
+
+    for (i=0;i<data->num_attr;i++)
+    {
+        if (strcmp(data->attr_info[i].name, attr->dev_attr.attr.name) == 0 && strcmp(pdata->psu_attrs[i].aname, attr->dev_attr.attr.name) == 0)
+        {
+            sysfs_attr_info = &data->attr_info[i];
+            usr_data = &pdata->psu_attrs[i];
+        }
+    }
+
+    if (sysfs_attr_info==NULL || usr_data==NULL) {
+        printk(KERN_ERR "%s is not supported attribute for this client\n", attr->dev_attr.attr.name);
+        goto exit;
+    }
+
+    switch(attr->index)
+    {
+        /*No write attributes for now in PSU*/
+        default:
+            goto exit;
+    }
+
+    psu_update_hw(dev, sysfs_attr_info, usr_data);
+
+exit:
+    return count;
+}
+
+extern int board_i2c_cpld_read_new(unsigned short cpld_addr, char *name, u8 reg);
+int sonic_i2c_get_psu_byte_default(void *client, PSU_DATA_ATTR *adata, void *data)
+{
+    int status = 0;
+    int val = 0;
+    struct psu_attr_info *padata = (struct psu_attr_info *)data;
+
+
+    if (strncmp(adata->devtype, "cpld", strlen("cpld")) == 0)
+    {
+        val = board_i2c_cpld_read_new(adata->devaddr, adata->devname, adata->offset);
+        if (val < 0){
+            return val;
+		}
+        padata->val.intval =  ((val & adata->mask) == adata->cmpval);
+        psu_dbg(KERN_ERR "%s: byte_value = 0x%x\n", __FUNCTION__, padata->val.intval);
+    }
+
+    return status;
+}
+
+int sonic_i2c_get_psu_block_default(void *client, PSU_DATA_ATTR *adata, void *data)
+{
+    int status = 0, retry = 10;
+    struct psu_attr_info *padata = (struct psu_attr_info *)data;
+    char buf[32]="";  //temporary placeholder for block data
+    uint8_t offset = (uint8_t)adata->offset;
+    int data_len = adata->len;
+
+    while (retry)
+    {
+        status = i2c_smbus_read_i2c_block_data((struct i2c_client *)client, offset, data_len-1, buf);
+        if (unlikely(status<0))
+        {
+            msleep(60);
+            retry--;
+            continue;
+        }
+        break;
+    }
+
+    if (status < 0)
+    {
+        buf[0] = '\0';
+        dev_dbg(&((struct i2c_client *)client)->dev, "unable to read block of data from (0x%x)\n", ((struct i2c_client *)client)->addr);
+    }
+    else
+    {
+        buf[data_len-1] = '\0';
+    }
+
+    if (strncmp(adata->devtype, "pmbus", strlen("pmbus")) == 0)
+        strscpy(padata->val.strval, buf+1, data_len-1);
+    else
+        strscpy(padata->val.strval, buf, data_len);
+
+    psu_dbg(KERN_ERR "%s: status = %d, buf block: %s\n", __FUNCTION__, status, padata->val.strval);
+    return 0;
+}
+
+int sonic_i2c_get_psu_word_default(void *client, PSU_DATA_ATTR *adata, void *data)
+{
+
+    int status = 0, retry = 10;
+    struct psu_attr_info *padata = (struct psu_attr_info *)data;
+    uint8_t offset = (uint8_t)adata->offset;
+
+    while (retry) {
+        status = i2c_smbus_read_word_data((struct i2c_client *)client, offset);
+        if (unlikely(status < 0)) {
+            msleep(60);
+            retry--;
+            continue;
+        }
+        break;
+    }
+
+    if (status < 0)
+    {
+        padata->val.shortval = 0;
+        dev_dbg(&((struct i2c_client *)client)->dev, "unable to read a word from (0x%x)\n", ((struct i2c_client *)client)->addr);
+    }
+    else
+    {
+        padata->val.shortval = status;
+    }
+
+    psu_dbg(KERN_ERR "%s: word value : %d\n", __FUNCTION__, padata->val.shortval);
+    return 0;
+}
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_api.h b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_api.h
new file mode 100644
index 000000000000..24e4ea02e7ec
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_api.h
@@ -0,0 +1,31 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * Description
+ *  PSU driver related api declarations
+ */
+
+#ifndef __PDDF_PSU_API_H__
+#define __PDDF_PSU_API_H__
+
+extern void get_psu_duplicate_sysfs(int idx, char *str);
+extern ssize_t psu_show_default(struct device *dev, struct device_attribute *da, char *buf);
+extern ssize_t psu_store_default(struct device *dev, struct device_attribute *da, const char *buf, size_t count);
+
+extern int sonic_i2c_get_psu_byte_default(void *client, PSU_DATA_ATTR *adata, void *data);
+extern int sonic_i2c_get_psu_block_default(void *client, PSU_DATA_ATTR *adata, void *data);
+extern int sonic_i2c_get_psu_word_default(void *client, PSU_DATA_ATTR *adata, void *data);
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_defs.h b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_defs.h
new file mode 100644
index 000000000000..60e81a9f5878
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_defs.h
@@ -0,0 +1,90 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * Description:
+ *  Platform PSU defines/structures header file
+ */
+
+#ifndef __PDDF_PSU_DEFS_H__
+#define __PDDF_PSU_DEFS_H__
+
+
+#define MAX_NUM_PSU 5
+#define MAX_PSU_ATTRS 32
+#define ATTR_NAME_LEN 32
+#define STR_ATTR_SIZE 32
+#define DEV_TYPE_LEN 32
+
+/* Each client has this additional data 
+ */
+
+typedef struct PSU_DATA_ATTR
+{
+    char aname[ATTR_NAME_LEN];                    // attr name, taken from enum psu_sysfs_attributes
+    char devtype[DEV_TYPE_LEN];       // either a 'eeprom' or 'cpld', or 'pmbus' attribute
+    char devname[DEV_TYPE_LEN];       // Name of the device from where this sysfs attr is read
+    uint32_t devaddr;
+    uint32_t offset;
+    uint32_t mask;
+    uint32_t cmpval;
+    uint32_t len;
+    void *access_data;
+
+}PSU_DATA_ATTR;
+
+typedef struct PSU_SYSFS_ATTR_DATA
+{
+    int index;
+    unsigned short mode;
+    ssize_t (*show)(struct device *dev, struct device_attribute *da, char *buf);
+    int (*pre_get)(void *client, PSU_DATA_ATTR *adata, void *data);
+    int (*do_get)(void *client, PSU_DATA_ATTR *adata, void *data);
+    int (*post_get)(void *client, PSU_DATA_ATTR *adata, void *data);
+    ssize_t (*store)(struct device *dev, struct device_attribute *da, const char *buf, size_t count);
+    int (*pre_set)(void *client, PSU_DATA_ATTR *adata, void *data);
+    int (*do_set)(void *client, PSU_DATA_ATTR *adata, void *data);
+    int (*post_set)(void *client, PSU_DATA_ATTR *adata, void *data);
+    void *data;
+} PSU_SYSFS_ATTR_DATA;
+
+typedef struct PSU_SYSFS_ATTR_DATA_ENTRY
+{
+    char name[ATTR_NAME_LEN];
+    PSU_SYSFS_ATTR_DATA *a_ptr;
+} PSU_SYSFS_ATTR_DATA_ENTRY;
+
+
+/* PSU CLIENT DATA - PLATFORM DATA FOR PSU CLIENT */
+typedef struct PSU_DATA
+{
+    int idx;    // psu index
+    int num_psu_fans;
+    PSU_DATA_ATTR psu_attr;
+    int len;             // no of valid attributes for this psu client
+    PSU_DATA_ATTR psu_attrs[MAX_PSU_ATTRS]; 
+}PSU_DATA;
+
+typedef struct PSU_PDATA
+{
+    int idx;                    // psu index
+    int num_psu_fans;      // num of fans supported by the PSU
+    int len;             // no of valid attributes for this psu client
+    PSU_DATA_ATTR *psu_attrs; 
+}PSU_PDATA;
+
+extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
+extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_driver.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_driver.c
new file mode 100644
index 000000000000..fa5d31a0866a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_driver.c
@@ -0,0 +1,398 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * A pddf kernel module driver for PSU
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/dmi.h>
+#include <linux/kobject.h>
+#include "../../../../../pddf/i2c/modules/include/pddf_client_defs.h"
+#include "../../../../../pddf/i2c/modules/include/pddf_psu_defs.h"
+#include "../../../../../pddf/i2c/modules/include/pddf_psu_driver.h"
+#include "../../../../../pddf/i2c/modules/include/pddf_psu_api.h"
+
+
+static unsigned short normal_i2c[] = { I2C_CLIENT_END };
+
+struct pddf_ops_t pddf_psu_ops = {
+	.pre_init = NULL,
+	.post_init = NULL,
+
+	.pre_probe = NULL,
+	.post_probe = NULL,
+
+	.pre_remove = NULL,
+	.post_remove = NULL,
+
+	.pre_exit = NULL,
+	.post_exit = NULL,
+};
+EXPORT_SYMBOL(pddf_psu_ops);
+
+
+PSU_SYSFS_ATTR_DATA access_psu_present = {PSU_PRESENT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_byte_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_present);
+
+PSU_SYSFS_ATTR_DATA access_psu_model_name = {PSU_MODEL_NAME, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_model_name);
+
+PSU_SYSFS_ATTR_DATA access_psu_power_good = {PSU_POWER_GOOD, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_byte_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_power_good);
+
+PSU_SYSFS_ATTR_DATA access_psu_mfr_id = {PSU_MFR_ID, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_mfr_id);
+
+PSU_SYSFS_ATTR_DATA access_psu_serial_num = {PSU_SERIAL_NUM, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_serial_num);
+
+PSU_SYSFS_ATTR_DATA access_psu_fan_dir = {PSU_FAN_DIR, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_fan_dir);
+
+PSU_SYSFS_ATTR_DATA access_psu_v_out = {PSU_V_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_v_out);
+
+PSU_SYSFS_ATTR_DATA access_psu_v_out_min = {PSU_V_OUT_MIN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_v_out_min);
+
+PSU_SYSFS_ATTR_DATA access_psu_v_out_max = {PSU_V_OUT_MAX, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_v_out_max);
+
+PSU_SYSFS_ATTR_DATA access_psu_i_out = {PSU_I_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_i_out);
+
+PSU_SYSFS_ATTR_DATA access_psu_p_out = {PSU_P_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_p_out);
+
+PSU_SYSFS_ATTR_DATA access_psu_p_out_max = {PSU_P_OUT_MAX, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_p_out_max);
+
+PSU_SYSFS_ATTR_DATA access_psu_fan1_speed_rpm = {PSU_FAN1_SPEED, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_fan1_speed_rpm);
+
+PSU_SYSFS_ATTR_DATA access_psu_temp1_input = {PSU_TEMP1_INPUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_temp1_input);
+
+PSU_SYSFS_ATTR_DATA access_psu_temp1_high_threshold = {PSU_TEMP1_HIGH_THRESHOLD, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_temp1_high_threshold);
+
+PSU_SYSFS_ATTR_DATA access_psu_v_in = {PSU_V_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_v_in);
+
+PSU_SYSFS_ATTR_DATA access_psu_i_in = {PSU_I_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_i_in);
+
+PSU_SYSFS_ATTR_DATA access_psu_p_in = {PSU_P_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_p_in);
+
+PSU_SYSFS_ATTR_DATA_ENTRY psu_sysfs_attr_data_tbl[]=
+{
+	{ "psu_present", &access_psu_present},
+	{ "psu_model_name", &access_psu_model_name},
+	{ "psu_power_good" , &access_psu_power_good},
+	{ "psu_mfr_id" , &access_psu_mfr_id},
+	{ "psu_serial_num" , &access_psu_serial_num},
+	{ "psu_fan_dir" , &access_psu_fan_dir},
+	{ "psu_v_out" , &access_psu_v_out},
+	{ "psu_v_out_min" , &access_psu_v_out_min},
+	{ "psu_v_out_max" , &access_psu_v_out_max},
+	{ "psu_i_out" , &access_psu_i_out},
+	{ "psu_p_out" , &access_psu_p_out},
+	{ "psu_p_out_max" , &access_psu_p_out_max},
+	{ "psu_fan1_speed_rpm" , &access_psu_fan1_speed_rpm},
+	{ "psu_temp1_input" , &access_psu_temp1_input},
+	{ "psu_temp1_high_threshold" , &access_psu_temp1_high_threshold},
+	{ "psu_v_in" , &access_psu_v_in},
+	{ "psu_i_in" , &access_psu_i_in},
+	{ "psu_p_in" , &access_psu_p_in}
+};
+
+void *get_psu_access_data(char *name)
+{
+	int i=0;
+	for(i=0; i<(sizeof(psu_sysfs_attr_data_tbl)/sizeof(psu_sysfs_attr_data_tbl[0])); i++)
+	{
+		if(strcmp(name, psu_sysfs_attr_data_tbl[i].name) ==0)
+		{
+			return &psu_sysfs_attr_data_tbl[i];
+		}
+	}
+	return NULL;
+}
+EXPORT_SYMBOL(get_psu_access_data);
+
+
+static int psu_probe(struct i2c_client *client,
+            const struct i2c_device_id *dev_id)
+{
+    struct psu_data *data;
+    int status =0;
+    int i,num, j=0;
+    PSU_PDATA *psu_platform_data;
+    PSU_DATA_ATTR *data_attr;
+    PSU_SYSFS_ATTR_DATA_ENTRY *sysfs_data_entry;
+    char new_str[ATTR_NAME_LEN] = "";
+
+
+	if (client == NULL) {
+		printk("NULL Client.. \n");
+		goto exit;
+	}
+
+	if (pddf_psu_ops.pre_probe)
+    {
+        status = (pddf_psu_ops.pre_probe)(client, dev_id);
+        if (status != 0)
+            goto exit;
+    }
+
+    if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
+        status = -EIO;
+        goto exit;
+    }
+
+    data = kzalloc(sizeof(struct psu_data), GFP_KERNEL);
+    if (!data) {
+        status = -ENOMEM;
+        goto exit;
+    }
+
+    i2c_set_clientdata(client, data);
+    dev_info(&client->dev, "chip found\n");
+
+	/* Take control of the platform data */
+	psu_platform_data = (PSU_PDATA *)(client->dev.platform_data);
+	num = psu_platform_data->len;
+	data->index = psu_platform_data->idx - 1;
+	data->num_psu_fans = psu_platform_data->num_psu_fans;
+	data->num_attr = num;
+
+
+
+	/* Create and Add supported attr in the 'attributes' list */
+	for (i=0; i<num; i++)
+	{
+		/*struct attribute *aptr = NULL;*/
+		struct sensor_device_attribute *dy_ptr = NULL;
+		data_attr = psu_platform_data->psu_attrs + i;
+		sysfs_data_entry = get_psu_access_data(data_attr->aname);
+		if (sysfs_data_entry == NULL)
+		{
+			printk(KERN_ERR "%s: Wrong attribute name provided by user '%s'\n", __FUNCTION__, data_attr->aname);
+			continue;
+		}
+		
+		dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL);
+		dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1];
+		strscpy((char *)dy_ptr->dev_attr.attr.name, data_attr->aname, ATTR_NAME_LEN);
+		dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode;
+		dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show;
+		dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store;
+		dy_ptr->index = sysfs_data_entry->a_ptr->index;
+		
+		data->psu_attribute_list[i] = &dy_ptr->dev_attr.attr;
+		strscpy(data->attr_info[i].name, data_attr->aname, ATTR_NAME_LEN);
+		data->attr_info[i].valid = 0;
+		mutex_init(&data->attr_info[i].update_lock);
+
+		/*Create a duplicate entry*/
+		get_psu_duplicate_sysfs(dy_ptr->index, new_str);
+		if (strcmp(new_str,""))
+		{
+			dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL);
+			dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1];
+			strscpy((char *)dy_ptr->dev_attr.attr.name, new_str, ATTR_NAME_LEN);
+			dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode;
+			dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show;
+			dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store;
+			dy_ptr->index = sysfs_data_entry->a_ptr->index;
+
+			data->psu_attribute_list[num+j] = &dy_ptr->dev_attr.attr;
+			j++;
+			strscpy(new_str,"", ATTR_NAME_LEN);
+		}
+	}
+	data->psu_attribute_list[i+j] = NULL;
+	data->psu_attribute_group.attrs = data->psu_attribute_list;
+
+    /* Register sysfs hooks */
+    status = sysfs_create_group(&client->dev.kobj, &data->psu_attribute_group);
+    if (status) {
+        goto exit_free;
+    }
+
+	data->hwmon_dev = hwmon_device_register_with_info(&client->dev, client->name, NULL, NULL, NULL);
+	if (IS_ERR(data->hwmon_dev)) {
+		status = PTR_ERR(data->hwmon_dev);
+		goto exit_remove;
+	}
+
+    dev_info(&client->dev, "%s: psu '%s'\n",
+         dev_name(data->hwmon_dev), client->name);
+
+	/* Add a support for post probe function */
+    if (pddf_psu_ops.post_probe)
+    {
+        status = (pddf_psu_ops.post_probe)(client, dev_id);
+        if (status != 0)
+            goto exit_remove;
+    }
+
+    return 0;
+
+
+exit_remove:
+    sysfs_remove_group(&client->dev.kobj, &data->psu_attribute_group);
+exit_free:
+	/* Free all the allocated attributes */
+	for (i=0;data->psu_attribute_list[i]!=NULL;i++)
+	{
+		struct sensor_device_attribute *ptr = (struct sensor_device_attribute *)data->psu_attribute_list[i];
+		kfree(ptr);
+		data->psu_attribute_list[i] = NULL;
+		pddf_dbg(PSU, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__);
+	}
+    kfree(data);
+exit:
+    return status;
+}
+
+static void psu_remove(struct i2c_client *client)
+{
+	int i=0, ret = 0;
+    struct psu_data *data = i2c_get_clientdata(client);
+	PSU_PDATA *platdata = (PSU_PDATA *)client->dev.platform_data; // use dev_get_platdata()
+	PSU_DATA_ATTR *platdata_sub = platdata->psu_attrs;
+	struct sensor_device_attribute *ptr = NULL;
+
+	if (pddf_psu_ops.pre_remove)
+    {
+        ret = (pddf_psu_ops.pre_remove)(client);
+        if (ret!=0)
+            printk(KERN_ERR "FAN pre_remove function failed\n");
+    }
+
+	hwmon_device_unregister(data->hwmon_dev);
+	sysfs_remove_group(&client->dev.kobj, &data->psu_attribute_group);
+	for (i=0; data->psu_attribute_list[i]!=NULL; i++)
+    {
+        ptr = (struct sensor_device_attribute *)data->psu_attribute_list[i];
+		kfree(ptr);
+		data->psu_attribute_list[i] = NULL;
+	}
+    pddf_dbg(PSU, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__);
+    kfree(data);
+	if (platdata_sub) {
+		printk(KERN_DEBUG "%s: Freeing platform subdata\n", __FUNCTION__);
+		kfree(platdata_sub);
+	}
+	if (platdata) {
+		printk(KERN_DEBUG "%s: Freeing platform data\n", __FUNCTION__);
+		kfree(platdata);
+	}
+
+	if (pddf_psu_ops.post_remove)
+    {
+        ret = (pddf_psu_ops.post_remove)(client);
+        if (ret!=0)
+            printk(KERN_ERR "FAN post_remove function failed\n");
+    }
+}
+
+enum psu_intf
+{
+	eeprom_intf,
+	smbus_intf
+};
+
+static const struct i2c_device_id psu_id[] = {
+	{"psu_eeprom", eeprom_intf},
+	{"psu_pmbus", smbus_intf},
+	{}
+};
+
+MODULE_DEVICE_TABLE(i2c, psu_id);
+
+static struct i2c_driver psu_driver = {
+    .class        = I2C_CLASS_HWMON,
+    .driver = {
+        .name     = "psu",
+    },
+    .probe        = psu_probe,
+    .remove       = psu_remove,
+    .id_table     = psu_id,
+    .address_list = normal_i2c,
+};
+
+int example_fun(void)
+{
+	pddf_dbg(PSU, KERN_ERR "CALLING FUN...\n");
+	return 0;
+}
+EXPORT_SYMBOL(example_fun);
+
+
+int psu_init(void)
+{
+    int status = 0;
+
+    if (pddf_psu_ops.pre_init)
+    {
+        status = (pddf_psu_ops.pre_init)();
+        if (status!=0)
+            return status;
+    }
+
+	pddf_dbg(PSU, KERN_ERR "GENERIC_PSU_DRIVER.. init Invoked..\n");
+    status = i2c_add_driver(&psu_driver);
+    if (status!=0)
+        return status;
+	
+    if (pddf_psu_ops.post_init)
+    {
+        status = (pddf_psu_ops.post_init)();
+        if (status!=0)
+            return status;
+    }
+
+	return status;
+}
+EXPORT_SYMBOL(psu_init);
+
+void psu_exit(void)
+{
+	pddf_dbg(PSU, "GENERIC_PSU_DRIVER.. exit\n");
+	if (pddf_psu_ops.pre_exit) (pddf_psu_ops.pre_exit)();
+    i2c_del_driver(&psu_driver);
+	if (pddf_psu_ops.post_exit) (pddf_psu_ops.post_exit)();
+}
+EXPORT_SYMBOL(psu_exit);
+
+module_init(psu_init);
+module_exit(psu_exit);
+
+MODULE_AUTHOR("Broadcom");
+MODULE_DESCRIPTION("psu driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_driver.h b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_driver.h
new file mode 100644
index 000000000000..a94cf7441dbc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/psu_driver/pddf_psu_driver.h
@@ -0,0 +1,70 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * Description
+ *  PSU driver data structures
+ */
+#ifndef __PDDF_PSU_DRIVER_H__
+#define __PDDF_PSU_DRIVER_H__
+
+enum psu_sysfs_attributes {
+    PSU_PRESENT,
+    PSU_MODEL_NAME,
+    PSU_POWER_GOOD,
+	PSU_MFR_ID,
+	PSU_SERIAL_NUM,
+	PSU_FAN_DIR,
+    PSU_V_OUT,
+    PSU_V_OUT_MIN,
+    PSU_V_OUT_MAX,
+    PSU_I_OUT,
+    PSU_P_OUT, /* This is in micro watts to comply with lm-sensors */
+    PSU_P_OUT_MAX,
+    PSU_FAN1_SPEED,
+    PSU_TEMP1_INPUT,
+    PSU_TEMP1_HIGH_THRESHOLD,
+    PSU_V_IN,
+    PSU_I_IN,
+	PSU_P_IN,
+	PSU_ATTR_MAX
+};
+
+
+/* Every client has psu_data which is divided into per attribute data */
+struct psu_attr_info {
+	char				name[ATTR_NAME_LEN];
+	struct mutex        update_lock;
+    char                valid;           /* !=0 if registers are valid */
+    unsigned long       last_updated;    /* In jiffies */
+	u8					status;
+	union {
+		char strval[STR_ATTR_SIZE];
+		int	 intval;
+		u16	 shortval;
+		u8   charval;
+	}val;
+};
+struct psu_data {
+	struct device			*hwmon_dev;
+	u8						index;
+	int						num_psu_fans;
+	int						num_attr;
+	struct attribute		*psu_attribute_list[MAX_PSU_ATTRS];
+	struct attribute_group	psu_attribute_group;
+	struct psu_attr_info	attr_info[MAX_PSU_ATTRS];
+};
+
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switchboard.c b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/switchboard_fpga.c
similarity index 67%
rename from platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switchboard.c
rename to platform/broadcom/sonic-platform-modules-cel/ds3000/modules/switchboard_fpga.c
index e41b64badefc..305253403625 100644
--- a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switchboard.c
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/modules/switchboard_fpga.c
@@ -1,9 +1,9 @@
 /*
- * switchboard.c - driver for Silverstone Switch board FPGA/CPLD.
+ * switchboard_fpga.c - driver for ds3000 Switch board FPGA/CPLD.
  *
  * Author: Pradchaya Phucharoen
  *
- * Copyright (C) 2018 Celestica Corp.
+ * Copyright (C) 2019 Celestica Corp.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -14,18 +14,18 @@
  *   \--sys
  *       \--devices
  *            \--platform
- *                \--silverstone
+ *                \--switchboard
  *                    |--FPGA
  *                    |--CPLD1
  *                    |--CPLD2
  *                    \--SFF
  *                        |--QSFP[1..32]
- *                        \--SFP[1..2]
+ *                        \--SFP1
  *
  */
 
 #ifndef TEST_MODE
-#define MOD_VERSION "1.2.0"
+#define MOD_VERSION "2.2.0"
 #else
 #define MOD_VERSION "TEST"
 #endif
@@ -35,7 +35,6 @@
 #include <linux/pci.h>
 #include <linux/kernel.h>
 #include <linux/stddef.h>
-#include <linux/delay.h>
 #include <linux/ioport.h>
 #include <linux/init.h>
 #include <linux/i2c.h>
@@ -43,7 +42,6 @@
 #include <linux/io.h>
 #include <linux/dmi.h>
 #include <linux/slab.h>
-#include <linux/wait.h>
 #include <linux/err.h>
 #include <linux/kobject.h>
 #include <linux/platform_device.h>
@@ -55,9 +53,9 @@
 
 static int  majorNumber;
 
-#define CLASS_NAME "silverstone_fpga"
+#define CLASS_NAME "ds3000_fpga"
 #define DRIVER_NAME "switchboard"
-#define FPGA_PCI_NAME "Silverstone_fpga_pci"
+#define FPGA_PCI_NAME "ds3000_fpga_pci"
 #define DEVICE_NAME "fwupgrade"
 
 
@@ -72,7 +70,6 @@ static int fpga_i2c_access(struct i2c_adapter *adapter, u16 addr,
 static int fpgafw_init(void);
 static void fpgafw_exit(void);
 
-
 /*
 ========================================
 FPGA PCIe BAR 0 Registers
@@ -88,11 +85,7 @@ I2C_CH7         0x00000700 - 0x00000710.
 I2C_CH8         0x00000800 - 0x00000810.
 I2C_CH9         0x00000900 - 0x00000910.
 I2C_CH10        0x00000A00 - 0x00000A10.
-I2C_CH11        0x00000B00 - 0x00000B10.
-I2C_CH12        0x00000C00 - 0x00000C10.
-I2C_CH13        0x00000D00 - 0x00000D10.
 SPI Master      0x00001200 - 0x00001300.
-DPLL SPI Master 0x00001320 - 0x0000132F.
 PORT XCVR       0x00004000 - 0x00004FFF.
 */
 
@@ -115,6 +108,7 @@ PORT XCVR       0x00004000 - 0x00004FFF.
 #define FPGA_MISC_CTRL          0x0050
 #define FPGA_MISC_STATUS        0x0054
 #define FPGA_AVS_VID_STATUS     0x0068
+#define FPGA_FEATURE_CARD_GPIO  0x0070
 #define FPGA_PORT_XCVR_READY    0x000c
 
 /* I2C_MASTER BASE ADDR */
@@ -133,11 +127,7 @@ PORT XCVR       0x00004000 - 0x00004FFF.
 #define I2C_MASTER_CH_8             8
 #define I2C_MASTER_CH_9             9
 #define I2C_MASTER_CH_10            10
-#define I2C_MASTER_CH_11            11
-#define I2C_MASTER_CH_12            12
-#define I2C_MASTER_CH_13            13
-
-#define I2C_MASTER_CH_TOTAL I2C_MASTER_CH_5
+#define I2C_MASTER_CH_TOTAL I2C_MASTER_CH_10
 
 /* SPI_MASTER */
 #define SPI_MASTER_WR_EN            0x1200 /* one bit */
@@ -193,7 +183,6 @@ PORT XCVR       0x00004000 - 0x00004FFF.
 */
 #define INTR_INT_N      5
 #define INTR_PRESENT    4
-#define INTR_TXFAULT    2
 #define INTR_RXLOS      1
 #define INTR_MODABS     0
 
@@ -208,7 +197,6 @@ PORT XCVR       0x00004000 - 0x00004FFF.
 */
 #define MASK_INT_N      5
 #define MASK_PRESENT    4
-#define MASK_TXFAULT    2
 #define MASK_RXLOS      1
 #define MASK_MODABS     0
 
@@ -249,17 +237,19 @@ enum {
  *
  */
 
+
 #define VIRTUAL_I2C_QSFP_PORT           32
-#define VIRTUAL_I2C_SFP_PORT            2
+#define VIRTUAL_I2C_SFP_PORT            1
 
 #define SFF_PORT_TOTAL    VIRTUAL_I2C_QSFP_PORT + VIRTUAL_I2C_SFP_PORT
 
-#define VIRTUAL_I2C_BUS_OFFSET  10
+#define VIRTUAL_I2C_BUS_OFFSET  2
 #define CPLD1_SLAVE_ADDR        0x30
 #define CPLD2_SLAVE_ADDR        0x31
 
-static struct class*  fpgafwclass  = NULL; // < The device-driver class struct pointer
-static struct device* fpgafwdev = NULL;    // < The device-driver device struct pointer
+static struct class*  fpgafwclass  = NULL; ///< The device-driver class struct pointer
+static struct device* fpgafwdev = NULL; ///< The device-driver device struct pointer
+static struct platform_device *ds3000_dev;
 
 #define PCI_VENDOR_ID_TEST 0x1af4
 
@@ -308,38 +298,31 @@ struct i2c_dev_data {
 
 /* PREDEFINED I2C SWITCH DEVICE TOPOLOGY */
 static struct i2c_switch fpga_i2c_bus_dev[] = {
-    /* BUS3 QSFP Exported as virtual bus */
-    {I2C_MASTER_CH_3, 0x71, 2, QSFP, "QSFP1"}, {I2C_MASTER_CH_3, 0x71, 3, QSFP, "QSFP2"},
-    {I2C_MASTER_CH_3, 0x71, 0, QSFP, "QSFP3"}, {I2C_MASTER_CH_3, 0x71, 1, QSFP, "QSFP4"},
-    {I2C_MASTER_CH_3, 0x71, 6, QSFP, "QSFP5"}, {I2C_MASTER_CH_3, 0x71, 5, QSFP, "QSFP6"},
-    {I2C_MASTER_CH_3, 0x73, 7, QSFP, "QSFP7"}, {I2C_MASTER_CH_3, 0x71, 4, QSFP, "QSFP8"},
-
-    {I2C_MASTER_CH_3, 0x73, 4, QSFP, "QSFP9"},  {I2C_MASTER_CH_3, 0x73, 3, QSFP, "QSFP10"},
-    {I2C_MASTER_CH_3, 0x73, 6, QSFP, "QSFP11"}, {I2C_MASTER_CH_3, 0x73, 2, QSFP, "QSFP12"},
-    {I2C_MASTER_CH_3, 0x73, 1, QSFP, "QSFP13"}, {I2C_MASTER_CH_3, 0x73, 5, QSFP, "QSFP14"},
-    {I2C_MASTER_CH_3, 0x71, 7, QSFP, "QSFP15"}, {I2C_MASTER_CH_3, 0x73, 0, QSFP, "QSFP16"},
-
-    {I2C_MASTER_CH_3, 0x72, 1, QSFP, "QSFP17"}, {I2C_MASTER_CH_3, 0x72, 7, QSFP, "QSFP18"},
-    {I2C_MASTER_CH_3, 0x72, 4, QSFP, "QSFP19"}, {I2C_MASTER_CH_3, 0x72, 0, QSFP, "QSFP20"},
-    {I2C_MASTER_CH_3, 0x72, 5, QSFP, "QSFP21"}, {I2C_MASTER_CH_3, 0x72, 2, QSFP, "QSFP22"},
-    {I2C_MASTER_CH_3, 0x70, 5, QSFP, "QSFP23"}, {I2C_MASTER_CH_3, 0x72, 6, QSFP, "QSFP24"},
-
-    {I2C_MASTER_CH_3, 0x72, 3, QSFP, "QSFP25"}, {I2C_MASTER_CH_3, 0x70, 6, QSFP, "QSFP26"},
-    {I2C_MASTER_CH_3, 0x70, 0, QSFP, "QSFP27"}, {I2C_MASTER_CH_3, 0x70, 7, QSFP, "QSFP28"},
-    {I2C_MASTER_CH_3, 0x70, 2, QSFP, "QSFP29"}, {I2C_MASTER_CH_3, 0x70, 4, QSFP, "QSFP30"},
-    {I2C_MASTER_CH_3, 0x70, 3, QSFP, "QSFP31"}, {I2C_MASTER_CH_3, 0x70, 1, QSFP, "QSFP32"},
+    /* BUS2 QSFP Exported as virtual bus */
+    {I2C_MASTER_CH_2, 0x72, 0, QSFP, "QSFP1"}, {I2C_MASTER_CH_2, 0x72, 1, QSFP, "QSFP2"},
+    {I2C_MASTER_CH_2, 0x72, 2, QSFP, "QSFP3"}, {I2C_MASTER_CH_2, 0x72, 3, QSFP, "QSFP4"},
+    {I2C_MASTER_CH_2, 0x72, 4, QSFP, "QSFP5"}, {I2C_MASTER_CH_2, 0x72, 5, QSFP, "QSFP6"},
+    {I2C_MASTER_CH_2, 0x72, 6, QSFP, "QSFP7"}, {I2C_MASTER_CH_2, 0x72, 7, QSFP, "QSFP8"},
+    {I2C_MASTER_CH_2, 0x73, 0, QSFP, "QSFP9"}, {I2C_MASTER_CH_2, 0x73, 1, QSFP, "QSFP10"},
+    {I2C_MASTER_CH_2, 0x73, 2, QSFP, "QSFP11"}, {I2C_MASTER_CH_2, 0x73, 3, QSFP, "QSFP12"},
+    {I2C_MASTER_CH_2, 0x73, 4, QSFP, "QSFP13"}, {I2C_MASTER_CH_2, 0x73, 5, QSFP, "QSFP14"},
+    {I2C_MASTER_CH_2, 0x73, 6, QSFP, "QSFP15"}, {I2C_MASTER_CH_2, 0x73, 7, QSFP, "QSFP16"},
+    {I2C_MASTER_CH_2, 0x74, 0, QSFP, "QSFP17"}, {I2C_MASTER_CH_2, 0x74, 1, QSFP, "QSFP18"},
+    {I2C_MASTER_CH_2, 0x74, 2, QSFP, "QSFP19"}, {I2C_MASTER_CH_2, 0x74, 3, QSFP, "QSFP20"},
+    {I2C_MASTER_CH_2, 0x74, 4, QSFP, "QSFP21"}, {I2C_MASTER_CH_2, 0x74, 5, QSFP, "QSFP22"},
+    {I2C_MASTER_CH_2, 0x74, 6, QSFP, "QSFP23"}, {I2C_MASTER_CH_2, 0x74, 7, QSFP, "QSFP24"},
+    {I2C_MASTER_CH_2, 0x75, 0, QSFP, "QSFP25"}, {I2C_MASTER_CH_2, 0x75, 1, QSFP, "QSFP26"},
+    {I2C_MASTER_CH_2, 0x75, 2, QSFP, "QSFP27"}, {I2C_MASTER_CH_2, 0x75, 3, QSFP, "QSFP28"},
+    {I2C_MASTER_CH_2, 0x75, 4, QSFP, "QSFP29"}, {I2C_MASTER_CH_2, 0x75, 5, QSFP, "QSFP30"},
+    {I2C_MASTER_CH_2, 0x75, 6, QSFP, "QSFP31"}, {I2C_MASTER_CH_2, 0x75, 7, QSFP, "QSFP32"},
     /* BUS1 SFP+ Exported as virtual bus */
-    {I2C_MASTER_CH_1, 0xFF, 0, SFP, "SFP1"},
-    /* BUS2 SFP+ Exported as virtual bus */
-    {I2C_MASTER_CH_2, 0xFF, 0, SFP, "SFP2"},
-    /* BUS4 CPLD Access via I2C */
-    {I2C_MASTER_CH_4, 0xFF, 0, NONE, "CPLD_S"},
-    /* BUS5 CPLD_B */
-    {I2C_MASTER_CH_5, 0xFF, 0, NONE, "CPLD_B"},
+    {I2C_MASTER_CH_1, 0x72, 0, SFP, "SFP1"},
+    /* BUS3 Switchboard CPLD */
+    {I2C_MASTER_CH_3, 0xFF, 0, NONE, "I2C_3"},
 };
 
 #define VIRTUAL_I2C_PORT_LENGTH ARRAY_SIZE(fpga_i2c_bus_dev)
-#define SW_I2C_CPLD_INDEX SFF_PORT_TOTAL
+#define VIRTUAL_I2C_CPLD_INDEX  SFF_PORT_TOTAL
 
 struct fpga_device {
     /* data mmio region */
@@ -354,7 +337,7 @@ static struct fpga_device fpga_dev = {
     .data_mmio_len = 0,
 };
 
-struct silverstone_fpga_data {
+struct ds3000_fpga_data {
     struct device *sff_devices[SFF_PORT_TOTAL];
     struct i2c_client *sff_i2c_clients[SFF_PORT_TOTAL];
     struct i2c_adapter *i2c_adapter[VIRTUAL_I2C_PORT_LENGTH];
@@ -369,7 +352,7 @@ struct sff_device_data {
     enum PORT_TYPE port_type;
 };
 
-struct silverstone_fpga_data *fpga_data;
+struct ds3000_fpga_data *fpga_data;
 
 /*
  * Kernel object for other module drivers.
@@ -385,18 +368,6 @@ static struct kobject *cpld2 = NULL;
  */
 static struct device *sff_dev = NULL;
 
-
-static ssize_t version_show(struct device *dev, struct device_attribute *devattr,
-                                  char *buf)
-{
-    u32 version;
-
-    mutex_lock(&fpga_data->fpga_lock);
-    version = ioread32(fpga_dev.data_base_addr + FPGA_VERSION);
-    mutex_unlock(&fpga_data->fpga_lock);
-    return sprintf(buf, "%d.%d\n", version >> 16, version & 0xFFFF);
-}
-
 /**
  * Show the value of the register set by 'set_fpga_reg_address'
  * If the address is not set by 'set_fpga_reg_address' first,
@@ -404,75 +375,86 @@ static ssize_t version_show(struct device *dev, struct device_attribute *devattr
  * @param  buf     register value in hextring
  * @return         number of bytes read, or an error code
  */
-static ssize_t get_fpga_reg_value(struct device *dev, struct device_attribute *devattr,
-                                  char *buf)
+static ssize_t get_fpga_reg_value(struct device *dev,
+                                  struct device_attribute *attr, char *buf)
 {
     // read data from the address
     uint32_t data;
     data = ioread32(fpga_data->fpga_read_addr);
     return sprintf(buf, "0x%8.8x\n", data);
 }
+
 /**
  * Store the register address
  * @param  buf     address wanted to be read value of
  * @return         number of bytes stored, or an error code
  */
-static ssize_t set_fpga_reg_address(struct device *dev, struct device_attribute *devattr,
+static ssize_t set_fpga_reg_address(struct device *dev,
+                                    struct device_attribute *attr,
                                     const char *buf, size_t count)
 {
+    ssize_t status;
     uint32_t addr;
-    char *last;
 
-    addr = (uint32_t)strtoul(buf, &last, 16);
-    if (addr == 0 && buf == last) {
-        return -EINVAL;
+    status = kstrtou32(buf, 0, &addr);
+    if (status == 0) {
+        fpga_data->fpga_read_addr = fpga_dev.data_base_addr + addr;
+        status = count;
     }
-    fpga_data->fpga_read_addr = fpga_dev.data_base_addr + addr;
-    return count;
+    return status;
 }
+
 /**
  * Show value of fpga scratch register
  * @param  buf     register value in hexstring
  * @return         number of bytes read, or an error code
  */
-static ssize_t get_fpga_scratch(struct device *dev, struct device_attribute *devattr,
-                                char *buf)
+static ssize_t get_fpga_scratch(struct device *dev,
+                                struct device_attribute *attr, char *buf)
 {
-    return sprintf(buf, "0x%8.8x\n", ioread32(fpga_dev.data_base_addr + FPGA_SCRATCH) & 0xffffffff);
+    uint32_t data;
+    data = ioread32(fpga_dev.data_base_addr + FPGA_SCRATCH);
+    data &= 0xffffffff;
+    return sprintf(buf, "0x%8.8x\n", data);
 }
+
 /**
  * Store value of fpga scratch register
  * @param  buf     scratch register value passing from user space
  * @return         number of bytes stored, or an error code
  */
-static ssize_t set_fpga_scratch(struct device *dev, struct device_attribute *devattr,
+static ssize_t set_fpga_scratch(struct device *dev,
+                                struct device_attribute *attr,
                                 const char *buf, size_t count)
 {
+    ssize_t status;
     uint32_t data;
-    char *last;
-    data = (uint32_t)strtoul(buf, &last, 16);
-    if (data == 0 && buf == last) {
-        return -EINVAL;
+
+    status = kstrtou32(buf, 0, &data);
+    if (status == 0) {
+        iowrite32(data, fpga_dev.data_base_addr + FPGA_SCRATCH);
+        status = count;
     }
-    iowrite32(data, fpga_dev.data_base_addr + FPGA_SCRATCH);
-    return count;
+    return status;
 }
+
 /**
  * Store a value in a specific register address
  * @param  buf     the value and address in format '0xhhhh 0xhhhhhhhh'
  * @return         number of bytes sent by user space, or an error code
  */
-static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *devattr,
+static ssize_t set_fpga_reg_value(struct device *dev,
+                                  struct device_attribute *attr,
                                   const char *buf, size_t count)
 {
-    // register are 4 bytes
+    //register is 4 bytes
     uint32_t addr;
     uint32_t value;
     uint32_t mode = 8;
     char *tok;
     char clone[count];
     char *pclone = clone;
-    char *last;
+    ssize_t status;
 
     strcpy(clone, buf);
 
@@ -482,8 +464,8 @@ static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *d
         mutex_unlock(&fpga_data->fpga_lock);
         return -EINVAL;
     }
-    addr = (uint32_t)strtoul(tok, &last, 16);
-    if (addr == 0 && tok == last) {
+    status = kstrtou32(tok, 0, &addr);
+    if (status != 0) {
         mutex_unlock(&fpga_data->fpga_lock);
         return -EINVAL;
     }
@@ -492,8 +474,8 @@ static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *d
         mutex_unlock(&fpga_data->fpga_lock);
         return -EINVAL;
     }
-    value = (uint32_t)strtoul(tok, &last, 16);
-    if (value == 0 && tok == last) {
+    status = kstrtou32(tok, 0, &value);
+    if (status != 0) {
         mutex_unlock(&fpga_data->fpga_lock);
         return -EINVAL;
     }
@@ -501,8 +483,8 @@ static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *d
     if (tok == NULL) {
         mode = 32;
     } else {
-        mode = (uint32_t)strtoul(tok, &last, 10);
-        if (mode == 0 && tok == last) {
+        status = kstrtou32(tok, 0, &mode);
+        if (status != 0) {
             mutex_unlock(&fpga_data->fpga_lock);
             return -EINVAL;
         }
@@ -521,8 +503,6 @@ static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *d
 
 /**
  * Show FPGA port XCVR ready status
- * @param  buf  1 if the functin is ready, 0 if not.
- * @return      number of bytes read, or an error code
  */
 static ssize_t ready_show(struct device *dev, struct device_attribute *attr, char *buf)
 {
@@ -540,14 +520,12 @@ static DEVICE_ATTR( getreg, 0600, get_fpga_reg_value, set_fpga_reg_address);
 static DEVICE_ATTR( scratch, 0600, get_fpga_scratch, set_fpga_scratch);
 static DEVICE_ATTR( setreg, 0200, NULL , set_fpga_reg_value);
 static DEVICE_ATTR_RO(ready);
-static DEVICE_ATTR_RO(version);
 
 static struct attribute *fpga_attrs[] = {
     &dev_attr_getreg.attr,
     &dev_attr_scratch.attr,
     &dev_attr_setreg.attr,
     &dev_attr_ready.attr,
-    &dev_attr_version.attr,
     NULL,
 };
 
@@ -555,78 +533,90 @@ static struct attribute_group fpga_attr_grp = {
     .attrs = fpga_attrs,
 };
 
-static ssize_t cpld1_version_show(struct device *dev, 
-                                  struct device_attribute *attr, char *buf)
+/* SW CPLDs attributes */
+static ssize_t cpld1_getreg_show(struct device *dev,
+                                 struct device_attribute *attr, char *buf)
 {
-    u8 version;
+    // CPLD register is one byte
+    uint8_t data;
     int err;
-    err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], 
-                          CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x00, 
-                          I2C_SMBUS_BYTE_DATA, 
-                          (union i2c_smbus_data *)&version);
+
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],
+                          CPLD1_SLAVE_ADDR, 0x00,
+                          I2C_SMBUS_READ, fpga_data->cpld1_read_addr,
+                          I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data);
+
     if (err < 0)
         return err;
-    return sprintf(buf, "%d.%d\n", version >> 4, version & 0x0F);
-}
-struct device_attribute dev_attr_cpld1_version = __ATTR(version, 0444, cpld1_version_show , NULL);
 
-/* SW CPLDs attributes */
-static ssize_t cpld1_getreg_show(struct device *dev, struct device_attribute *attr, char *buf)
-{
-    // CPLD register is one byte
-    uint8_t data;
-    fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, fpga_data->cpld1_read_addr, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data);
     return sprintf(buf, "0x%2.2x\n", data);
 }
-static ssize_t cpld1_getreg_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
+
+static ssize_t cpld1_getreg_store(struct device *dev,
+                                  struct device_attribute *attr,
+                                  const char *buf, size_t count)
 {
+    ssize_t status;
     uint8_t addr;
-    char *last;
-    addr = (uint8_t)strtoul(buf, &last, 16);
-    if (addr == 0 && buf == last) {
-        return -EINVAL;
+
+    status = kstrtou8(buf, 0, &addr);
+    if (status == 0) {
+        fpga_data->cpld1_read_addr = addr;
+        status = count;
     }
-    fpga_data->cpld1_read_addr = addr;
-    return size;
+    return status;
 }
-struct device_attribute dev_attr_cpld1_getreg = __ATTR(getreg, 0600, cpld1_getreg_show, cpld1_getreg_store);
 
-static ssize_t cpld1_scratch_show(struct device *dev, struct device_attribute *attr, char *buf)
+static ssize_t cpld1_scratch_show(struct device *dev,
+                                  struct device_attribute *attr, char *buf)
 {
     // CPLD register is one byte
-    __u8 data;
+    uint8_t data;
     int err;
-    err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x01, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data);
+
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],
+                          CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x01,
+                          I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data);
     if (err < 0)
         return err;
+
     return sprintf(buf, "0x%2.2x\n", data);
 }
-static ssize_t cpld1_scratch_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
+
+static ssize_t cpld1_scratch_store(struct device *dev,
+                                   struct device_attribute *attr,
+                                   const char *buf, size_t count)
 {
     // CPLD register is one byte
-    __u8 data;
-    char *last;
+    uint8_t data;
+    ssize_t status;
     int err;
-    data = (uint8_t)strtoul(buf, &last, 16);
-    if (data == 0 && buf == last) {
-        return -EINVAL;
+
+    status = kstrtou8(buf, 0, &data);
+    if (status != 0) {
+        return status;
     }
-    err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, 0x01, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data);
+
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],
+                          CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, 0x01,
+                          I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data);
     if (err < 0)
         return err;
-    return size;
+
+    return count;
 }
-struct device_attribute dev_attr_cpld1_scratch = __ATTR(scratch, 0600, cpld1_scratch_show, cpld1_scratch_store);
 
-static ssize_t cpld1_setreg_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
+static ssize_t cpld1_setreg_store(struct device *dev,
+                                  struct device_attribute *attr,
+                                  const char *buf, size_t count)
 {
 
     uint8_t addr, value;
     char *tok;
-    char clone[size];
+    char clone[count];
     char *pclone = clone;
+    ssize_t status;
     int err;
-    char *last;
 
     strcpy(clone, buf);
 
@@ -634,29 +624,33 @@ static ssize_t cpld1_setreg_store(struct device *dev, struct device_attribute *a
     if (tok == NULL) {
         return -EINVAL;
     }
-    addr = (uint8_t)strtoul(tok, &last, 16);
-    if (addr == 0 && tok == last) {
+    status = kstrtou8(tok, 0, &addr);
+    if (status != 0) {
         return -EINVAL;
     }
     tok = strsep((char**)&pclone, " ");
     if (tok == NULL) {
         return -EINVAL;
     }
-    value = (uint8_t)strtoul(tok, &last, 16);
-    if (value == 0 && tok == last) {
+    status = kstrtou8(tok, 0, &value);
+    if (status != 0) {
         return -EINVAL;
     }
 
-    err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, addr, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&value);
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],
+                          CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, addr,
+                          I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&value);
     if (err < 0)
         return err;
 
-    return size;
+    return count;
 }
+
+struct device_attribute dev_attr_cpld1_getreg = __ATTR(getreg, 0600, cpld1_getreg_show, cpld1_getreg_store);
+struct device_attribute dev_attr_cpld1_scratch = __ATTR(scratch, 0600, cpld1_scratch_show, cpld1_scratch_store);
 struct device_attribute dev_attr_cpld1_setreg = __ATTR(setreg, 0200, NULL, cpld1_setreg_store);
 
 static struct attribute *cpld1_attrs[] = {
-    &dev_attr_cpld1_version.attr,
     &dev_attr_cpld1_getreg.attr,
     &dev_attr_cpld1_scratch.attr,
     &dev_attr_cpld1_setreg.attr,
@@ -667,80 +661,86 @@ static struct attribute_group cpld1_attr_grp = {
     .attrs = cpld1_attrs,
 };
 
-static ssize_t cpld2_version_show(struct device *dev, 
-                                  struct device_attribute *attr, char *buf)
+static ssize_t cpld2_getreg_show(struct device *dev,
+                                 struct device_attribute *attr, char *buf)
 {
-    u8 version;
+    // CPLD register is one byte
+    uint8_t data;
     int err;
-    err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], 
-                          CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x00, 
-                          I2C_SMBUS_BYTE_DATA, 
-                          (union i2c_smbus_data *)&version);
+
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],
+                          CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, fpga_data->cpld2_read_addr,
+                          I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data);
     if (err < 0)
         return err;
-    return sprintf(buf, "%d.%d\n", version >> 4, version & 0x0F);
-}
-struct device_attribute dev_attr_cpld2_version = __ATTR(version, 0444, cpld2_version_show , NULL);
 
-static ssize_t cpld2_getreg_show(struct device *dev, struct device_attribute *attr, char *buf)
-{
-    // CPLD register is one byte
-    uint8_t data;
-    fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, fpga_data->cpld2_read_addr, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data);
     return sprintf(buf, "0x%2.2x\n", data);
 }
 
-static ssize_t cpld2_getreg_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
+static ssize_t cpld2_getreg_store(struct device *dev,
+                                  struct device_attribute *attr,
+                                  const char *buf, size_t count)
 {
     // CPLD register is one byte
-    uint32_t addr;
-    char *last;
-    addr = (uint8_t)strtoul(buf, &last, 16);
-    if (addr == 0 && buf == last) {
-        return -EINVAL;
+    uint8_t addr;
+    ssize_t status;
+
+    status = kstrtou8(buf, 0, &addr);
+    if (status == 0) {
+        fpga_data->cpld2_read_addr = addr;
+        status = count;
     }
-    fpga_data->cpld2_read_addr = addr;
-    return size;
+    return status;
 }
-struct device_attribute dev_attr_cpld2_getreg = __ATTR(getreg, 0600, cpld2_getreg_show, cpld2_getreg_store);
 
-static ssize_t cpld2_scratch_show(struct device *dev, struct device_attribute *attr, char *buf)
+static ssize_t cpld2_scratch_show(struct device *dev,
+                                  struct device_attribute *attr, char *buf)
 {
     // CPLD register is one byte
-    __u8 data;
+    uint8_t data;
     int err;
-    err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x01, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data);
+
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],
+                          CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x01,
+                          I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data);
     if (err < 0)
         return err;
+
     return sprintf(buf, "0x%2.2x\n", data);
 }
 
-static ssize_t cpld2_scratch_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
+static ssize_t cpld2_scratch_store(struct device *dev,
+                                   struct device_attribute *attr,
+                                   const char *buf, size_t count)
 {
     // CPLD register is one byte
-    __u8 data;
-    char *last;
+    uint8_t data;
     int err;
+    ssize_t status;
 
-    data = (uint8_t)strtoul(buf, &last, 16);
-    if (data == 0 && buf == last) {
+    status = kstrtou8(buf, 0, &data);
+    if (status != 0) {
         return -EINVAL;
     }
-    err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, 0x01, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data);
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],
+                          CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, 0x01,
+                          I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data);
     if (err < 0)
         return err;
-    return size;
+
+    return count;
 }
-struct device_attribute dev_attr_cpld2_scratch = __ATTR(scratch, 0600, cpld2_scratch_show, cpld2_scratch_store);
 
-static ssize_t cpld2_setreg_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
+static ssize_t cpld2_setreg_store(struct device *dev,
+                                  struct device_attribute *attr,
+                                  const char *buf, size_t count)
 {
     uint8_t addr, value;
     char *tok;
-    char clone[size];
+    char clone[count];
     char *pclone = clone;
+    ssize_t status;
     int err;
-    char *last;
 
     strcpy(clone, buf);
 
@@ -748,29 +748,33 @@ static ssize_t cpld2_setreg_store(struct device *dev, struct device_attribute *a
     if (tok == NULL) {
         return -EINVAL;
     }
-    addr = (uint8_t)strtoul(tok, &last, 16);
-    if (addr == 0 && tok == last) {
+    status = kstrtou8(tok, 0, &addr);
+    if (status != 0) {
         return -EINVAL;
     }
     tok = strsep((char**)&pclone, " ");
     if (tok == NULL) {
         return -EINVAL;
     }
-    value = (uint8_t)strtoul(tok, &last, 16);
-    if (value == 0 && tok == last) {
+    status = kstrtou8(tok, 0, &value);
+    if (status != 0) {
         return -EINVAL;
     }
 
-    err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, addr, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&value);
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],
+                          CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, addr,
+                          I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&value);
     if (err < 0)
         return err;
 
-    return size;
+    return count;
 }
+
+struct device_attribute dev_attr_cpld2_getreg = __ATTR(getreg, 0600, cpld2_getreg_show, cpld2_getreg_store);
+struct device_attribute dev_attr_cpld2_scratch = __ATTR(scratch, 0600, cpld2_scratch_show, cpld2_scratch_store);
 struct device_attribute dev_attr_cpld2_setreg = __ATTR(setreg, 0200, NULL, cpld2_setreg_store);
 
 static struct attribute *cpld2_attrs[] = {
-    &dev_attr_cpld2_version.attr,
     &dev_attr_cpld2_getreg.attr,
     &dev_attr_cpld2_scratch.attr,
     &dev_attr_cpld2_setreg.attr,
@@ -782,7 +786,8 @@ static struct attribute_group cpld2_attr_grp = {
 };
 
 /* QSFP/SFP+ attributes */
-static ssize_t qsfp_modirq_show(struct device *dev, struct device_attribute *attr, char *buf)
+static ssize_t qsfp_modirq_show(struct device *dev,
+                                struct device_attribute *attr, char *buf)
 {
     u32 data;
     struct sff_device_data *dev_data = dev_get_drvdata(dev);
@@ -796,7 +801,8 @@ static ssize_t qsfp_modirq_show(struct device *dev, struct device_attribute *att
 }
 DEVICE_ATTR_RO(qsfp_modirq);
 
-static ssize_t qsfp_modprs_show(struct device *dev, struct device_attribute *attr, char *buf)
+static ssize_t qsfp_modprs_show(struct device *dev,
+                                struct device_attribute *attr, char *buf)
 {
     u32 data;
     struct sff_device_data *dev_data = dev_get_drvdata(dev);
@@ -810,7 +816,8 @@ static ssize_t qsfp_modprs_show(struct device *dev, struct device_attribute *att
 }
 DEVICE_ATTR_RO(qsfp_modprs);
 
-static ssize_t sfp_txfault_show(struct device *dev, struct device_attribute *attr, char *buf)
+static ssize_t sfp_txfault_show(struct device *dev,
+                                struct device_attribute *attr, char *buf)
 {
     u32 data;
     struct sff_device_data *dev_data = dev_get_drvdata(dev);
@@ -824,7 +831,8 @@ static ssize_t sfp_txfault_show(struct device *dev, struct device_attribute *att
 }
 DEVICE_ATTR_RO(sfp_txfault);
 
-static ssize_t sfp_rxlos_show(struct device *dev, struct device_attribute *attr, char *buf)
+static ssize_t sfp_rxlos_show(struct device *dev,
+                              struct device_attribute *attr, char *buf)
 {
     u32 data;
     struct sff_device_data *dev_data = dev_get_drvdata(dev);
@@ -838,7 +846,8 @@ static ssize_t sfp_rxlos_show(struct device *dev, struct device_attribute *attr,
 }
 DEVICE_ATTR_RO(sfp_rxlos);
 
-static ssize_t sfp_modabs_show(struct device *dev, struct device_attribute *attr, char *buf)
+static ssize_t sfp_modabs_show(struct device *dev,
+                               struct device_attribute *attr, char *buf)
 {
     u32 data;
     struct sff_device_data *dev_data = dev_get_drvdata(dev);
@@ -852,7 +861,8 @@ static ssize_t sfp_modabs_show(struct device *dev, struct device_attribute *attr
 }
 DEVICE_ATTR_RO(sfp_modabs);
 
-static ssize_t qsfp_lpmode_show(struct device *dev, struct device_attribute *attr, char *buf)
+static ssize_t qsfp_lpmode_show(struct device *dev,
+                                struct device_attribute *attr, char *buf)
 {
     u32 data;
     struct sff_device_data *dev_data = dev_get_drvdata(dev);
@@ -864,33 +874,36 @@ static ssize_t qsfp_lpmode_show(struct device *dev, struct device_attribute *att
     mutex_unlock(&fpga_data->fpga_lock);
     return sprintf(buf, "%d\n", (data >> CTRL_LPMOD) & 1U);
 }
-static ssize_t qsfp_lpmode_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
+static ssize_t qsfp_lpmode_store(struct device *dev,
+                                 struct device_attribute *attr,
+                                 const char *buf, size_t count)
 {
     ssize_t status;
-    long value;
+    uint32_t value;
     u32 data;
     struct sff_device_data *dev_data = dev_get_drvdata(dev);
     unsigned int portid = dev_data->portid;
     unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid - 1) * 0x10;
 
     mutex_lock(&fpga_data->fpga_lock);
-    status = kstrtol(buf, 0, &value);
+    status = kstrtou32(buf, 0, &value);
     if (status == 0) {
-        // if value is 0, disable the lpmode
+        // check if value is 0 clear
         data = ioread32(fpga_dev.data_base_addr + REGISTER);
         if (!value)
             data = data & ~( (u32)0x1 << CTRL_LPMOD);
         else
             data = data | ((u32)0x1 << CTRL_LPMOD);
         iowrite32(data, fpga_dev.data_base_addr + REGISTER);
-        status = size;
+        status = count;
     }
     mutex_unlock(&fpga_data->fpga_lock);
     return status;
 }
 DEVICE_ATTR_RW(qsfp_lpmode);
 
-static ssize_t qsfp_reset_show(struct device *dev, struct device_attribute *attr, char *buf)
+static ssize_t qsfp_reset_show(struct device *dev,
+                               struct device_attribute *attr, char *buf)
 {
     u32 data;
     struct sff_device_data *dev_data = dev_get_drvdata(dev);
@@ -903,33 +916,136 @@ static ssize_t qsfp_reset_show(struct device *dev, struct device_attribute *attr
     return sprintf(buf, "%d\n", (data >> CTRL_RST) & 1U);
 }
 
-static ssize_t qsfp_reset_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
+static ssize_t qsfp_reset_store(struct device *dev,
+                                struct device_attribute *attr,
+                                const char *buf, size_t count)
 {
     ssize_t status;
-    long value;
+    uint32_t value;
     u32 data;
     struct sff_device_data *dev_data = dev_get_drvdata(dev);
     unsigned int portid = dev_data->portid;
     unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid - 1) * 0x10;
 
     mutex_lock(&fpga_data->fpga_lock);
-    status = kstrtol(buf, 0, &value);
+    status = kstrtou32(buf, 0, &value);
     if (status == 0) {
-        // if value is 0, reset signal is low
+        // check if value is 0 clear
         data = ioread32(fpga_dev.data_base_addr + REGISTER);
         if (!value)
             data = data & ~( (u32)0x1 << CTRL_RST);
         else
             data = data | ((u32)0x1 << CTRL_RST);
         iowrite32(data, fpga_dev.data_base_addr + REGISTER);
-        status = size;
+        status = count;
     }
     mutex_unlock(&fpga_data->fpga_lock);
     return status;
 }
 DEVICE_ATTR_RW(qsfp_reset);
 
-static ssize_t sfp_txdisable_show(struct device *dev, struct device_attribute *attr, char *buf)
+static ssize_t qsfp_isr_flags_show(struct device *dev,
+                                   struct device_attribute *attr, char *buf)
+{
+    u8 data;
+    u8 valid_bits;
+    struct sff_device_data *dev_data = dev_get_drvdata(dev);
+    unsigned int portid = dev_data->portid;
+    unsigned int REGISTER = SFF_PORT_INT_STATUS_BASE + (portid - 1) * 0x10;
+    valid_bits = BIT(INTR_INT_N) | BIT(INTR_PRESENT);
+
+    mutex_lock(&fpga_data->fpga_lock);
+    data = (u8) ioread32(fpga_dev.data_base_addr + REGISTER);
+    mutex_unlock(&fpga_data->fpga_lock);
+
+    /*
+     * Unify the return pattern to 2-bit
+     *  [1] : module interrupt
+     *  [0] : presence
+     */
+    data = data & valid_bits;
+    data = data >> 4;
+
+    return sprintf(buf, "0x%2.2x\n", data);
+}
+
+static ssize_t qsfp_isr_flags_store(struct device *dev,
+                                    struct device_attribute *attr,
+                                    const char *buf, size_t count)
+{
+    ssize_t status;
+    u32 value;
+    u8 valid_bits;
+    struct sff_device_data *dev_data = dev_get_drvdata(dev);
+    unsigned int portid = dev_data->portid;
+    unsigned int REGISTER = SFF_PORT_INT_STATUS_BASE + (portid - 1) * 0x10;
+    valid_bits = BIT(INTR_INT_N) | BIT(INTR_PRESENT);
+
+    mutex_lock(&fpga_data->fpga_lock);
+    status = kstrtou32(buf, 0, &value);
+    if (status == 0) {
+        value = value << 4;
+        value = value & valid_bits;
+        iowrite32(value, fpga_dev.data_base_addr + REGISTER);
+        status = count;
+    }
+    mutex_unlock(&fpga_data->fpga_lock);
+    return status;
+}
+DEVICE_ATTR_RW(qsfp_isr_flags);
+
+static ssize_t qsfp_isr_mask_show(struct device *dev,
+                                  struct device_attribute *attr, char *buf)
+{
+    u32 data;
+    u8 valid_bits;
+    struct sff_device_data *dev_data = dev_get_drvdata(dev);
+    unsigned int portid = dev_data->portid;
+    unsigned int REGISTER = SFF_PORT_INT_MASK_BASE + (portid - 1) * 0x10;
+    valid_bits = BIT(INTR_INT_N) | BIT(INTR_PRESENT);
+
+    mutex_lock(&fpga_data->fpga_lock);
+    data = ioread32(fpga_dev.data_base_addr + REGISTER);
+    mutex_unlock(&fpga_data->fpga_lock);
+
+    /*
+     * Unify the return pattern to 2-bit
+     *  [1] : module interrupt
+     *  [0] : presence
+     */
+    data = data & valid_bits;
+    data = data >> 4;
+
+    return sprintf(buf, "0x%2.2x\n", data);
+}
+
+static ssize_t qsfp_isr_mask_store(struct device *dev,
+                                   struct device_attribute *attr,
+                                   const char *buf, size_t count)
+{
+    ssize_t status;
+    u32 value;
+    u8 valid_bits;
+    struct sff_device_data *dev_data = dev_get_drvdata(dev);
+    unsigned int portid = dev_data->portid;
+    unsigned int REGISTER = SFF_PORT_INT_MASK_BASE + (portid - 1) * 0x10;
+    valid_bits = BIT(INTR_INT_N) | BIT(INTR_PRESENT);
+
+    mutex_lock(&fpga_data->fpga_lock);
+    status = kstrtou32(buf, 0, &value);
+    if (status == 0) {
+        value = value << 4;
+        value = value & valid_bits;
+        iowrite32(value, fpga_dev.data_base_addr + REGISTER);
+        status = count;
+    }
+    mutex_unlock(&fpga_data->fpga_lock);
+    return status;
+}
+DEVICE_ATTR_RW(qsfp_isr_mask);
+
+static ssize_t sfp_txdisable_show(struct device *dev,
+                                  struct device_attribute *attr, char *buf)
 {
     u32 data;
     struct sff_device_data *dev_data = dev_get_drvdata(dev);
@@ -941,7 +1057,9 @@ static ssize_t sfp_txdisable_show(struct device *dev, struct device_attribute *a
     mutex_unlock(&fpga_data->fpga_lock);
     return sprintf(buf, "%d\n", (data >> CTRL_TXDIS) & 1U);
 }
-static ssize_t sfp_txdisable_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
+static ssize_t sfp_txdisable_store(struct device *dev,
+                                   struct device_attribute *attr,
+                                   const char *buf, size_t count)
 {
     ssize_t status;
     long value;
@@ -960,22 +1078,112 @@ static ssize_t sfp_txdisable_store(struct device *dev, struct device_attribute *
         else
             data = data | ((u32)0x1 << CTRL_TXDIS);
         iowrite32(data, fpga_dev.data_base_addr + REGISTER);
-        status = size;
+        status = count;
     }
     mutex_unlock(&fpga_data->fpga_lock);
     return status;
 }
 DEVICE_ATTR_RW(sfp_txdisable);
 
+static ssize_t sfp_isr_flags_show(struct device *dev,
+                                  struct device_attribute *attr, char *buf)
+{
+    u8 data;
+    u8 valid_bits;
+    struct sff_device_data *dev_data = dev_get_drvdata(dev);
+    unsigned int portid = dev_data->portid;
+    unsigned int REGISTER = SFF_PORT_INT_STATUS_BASE + (portid - 1) * 0x10;
+    valid_bits = BIT(INTR_RXLOS) | BIT(INTR_MODABS);
+
+    mutex_lock(&fpga_data->fpga_lock);
+    data = (u8) ioread32(fpga_dev.data_base_addr + REGISTER);
+    mutex_unlock(&fpga_data->fpga_lock);
+
+    data = data & valid_bits;
+
+    return sprintf(buf, "0x%2.2x\n", data);
+}
+
+static ssize_t sfp_isr_flags_store(struct device *dev,
+                                   struct device_attribute *attr,
+                                   const char *buf, size_t count)
+{
+    ssize_t status;
+    u32 value;
+    u8 valid_bits;
+    struct sff_device_data *dev_data = dev_get_drvdata(dev);
+    unsigned int portid = dev_data->portid;
+    unsigned int REGISTER = SFF_PORT_INT_STATUS_BASE + (portid - 1) * 0x10;
+    valid_bits = BIT(INTR_INT_N) | BIT(INTR_PRESENT);
+
+    mutex_lock(&fpga_data->fpga_lock);
+    status = kstrtou32(buf, 0, &value);
+    if (status == 0) {
+        value = value & valid_bits;
+        iowrite32(value, fpga_dev.data_base_addr + REGISTER);
+        status = count;
+    }
+    mutex_unlock(&fpga_data->fpga_lock);
+    return status;
+}
+DEVICE_ATTR_RW(sfp_isr_flags);
+
+static ssize_t sfp_isr_mask_show(struct device *dev,
+                                 struct device_attribute *attr, char *buf)
+{
+    u32 data;
+    u8 valid_bits;
+    struct sff_device_data *dev_data = dev_get_drvdata(dev);
+    unsigned int portid = dev_data->portid;
+    unsigned int REGISTER = SFF_PORT_INT_MASK_BASE + (portid - 1) * 0x10;
+    valid_bits = BIT(INTR_RXLOS) | BIT(INTR_MODABS);
+
+    mutex_lock(&fpga_data->fpga_lock);
+    data = ioread32(fpga_dev.data_base_addr + REGISTER);
+    mutex_unlock(&fpga_data->fpga_lock);
+
+    data = data & valid_bits;
+
+    return sprintf(buf, "0x%2.2x\n", data);
+}
+
+static ssize_t sfp_isr_mask_store(struct device *dev,
+                                  struct device_attribute *attr,
+                                  const char *buf, size_t count)
+{
+    ssize_t status;
+    u32 value;
+    u8 valid_bits;
+    struct sff_device_data *dev_data = dev_get_drvdata(dev);
+    unsigned int portid = dev_data->portid;
+    unsigned int REGISTER = SFF_PORT_INT_MASK_BASE + (portid - 1) * 0x10;
+    valid_bits = BIT(INTR_RXLOS) | BIT(INTR_MODABS);
+
+    mutex_lock(&fpga_data->fpga_lock);
+    status = kstrtou32(buf, 0, &value);
+    if (status == 0) {
+        value = value & valid_bits;
+        iowrite32(value, fpga_dev.data_base_addr + REGISTER);
+        status = count;
+    }
+    mutex_unlock(&fpga_data->fpga_lock);
+    return status;
+}
+DEVICE_ATTR_RW(sfp_isr_mask);
+
 static struct attribute *sff_attrs[] = {
     &dev_attr_qsfp_modirq.attr,
     &dev_attr_qsfp_modprs.attr,
     &dev_attr_qsfp_lpmode.attr,
     &dev_attr_qsfp_reset.attr,
+    &dev_attr_qsfp_isr_flags.attr,
+    &dev_attr_qsfp_isr_mask.attr,
     &dev_attr_sfp_txfault.attr,
     &dev_attr_sfp_rxlos.attr,
     &dev_attr_sfp_modabs.attr,
     &dev_attr_sfp_txdisable.attr,
+    &dev_attr_sfp_isr_flags.attr,
+    &dev_attr_sfp_isr_mask.attr,
     NULL,
 };
 
@@ -989,22 +1197,30 @@ static const struct attribute_group *sff_attr_grps[] = {
 };
 
 
-static ssize_t port_led_mode_show(struct device *dev, struct device_attribute *attr, char *buf)
+static ssize_t port_led_mode_show(struct device *dev,
+                                  struct device_attribute *attr, char *buf)
 {
     // value can be "nomal", "test"
     __u8 led_mode_1, led_mode_2;
     int err;
-    err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_1);
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],
+                          CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x09,
+                          I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_1);
     if (err < 0)
         return err;
-    err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_2);
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],
+                          CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x09,
+                          I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_2);
     if (err < 0)
         return err;
+
     return sprintf(buf, "%s %s\n",
                    led_mode_1 ? "test" : "normal",
                    led_mode_2 ? "test" : "normal");
 }
-static ssize_t port_led_mode_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
+static ssize_t port_led_mode_store(struct device *dev,
+                                   struct device_attribute *attr,
+                                   const char *buf, size_t count)
 {
     int status;
     __u8 led_mode_1;
@@ -1015,62 +1231,65 @@ static ssize_t port_led_mode_store(struct device *dev, struct device_attribute *
     } else {
         return -EINVAL;
     }
-    status = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00,
-                             I2C_SMBUS_WRITE, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_1);
-    status = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00,
-                             I2C_SMBUS_WRITE, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_1);
-    return size;
+    status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],
+                             CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, 0x09,
+                             I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_1);
+    status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],
+                             CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_WRITE, 0x09,
+                             I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_mode_1);
+    return count;
 }
 DEVICE_ATTR_RW(port_led_mode);
 
 // Only work when port_led_mode set to 1
-static ssize_t port_led_color_show(struct device *dev, struct device_attribute *attr, char *buf)
+static ssize_t port_led_color_show(struct device *dev,
+                                   struct device_attribute *attr, char *buf)
 {
-    // value can be R/G/B/C/M/Y/W/OFF
+    // value can be "off", "green", "amber", "both"
     __u8 led_color1, led_color2;
     int err;
-    err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_color1);
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],
+                          CPLD1_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x0A,
+                          I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_color1);
     if (err < 0)
         return err;
-    err = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x09, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_color2);
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],
+                          CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, 0x0A,
+                          I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_color2);
     if (err < 0)
         return err;
     return sprintf(buf, "%s %s\n",
-                   led_color1 == 0x07 ? "off" : led_color1 == 0x06 ? "green" : led_color1 == 0x05 ?  "red" : led_color1 == 0x04 ? 
-                    "yellow" : led_color1 == 0x03 ? "blue" : led_color1 == 0x02 ?  "cyan" : led_color1 == 0x01 ?  "magenta" : "white",
-                   led_color1 == 0x07 ? "off" : led_color1 == 0x06 ? "green" : led_color1 == 0x05 ?  "red" : led_color1 == 0x04 ? 
-                    "yellow" : led_color1 == 0x03 ? "blue" : led_color1 == 0x02 ?  "cyan" : led_color1 == 0x01 ?  "magenta" : "white");
+                   led_color1 == 0x03 ? "off" : led_color1 == 0x02 ? "green" : led_color1 == 0x01 ? "amber" : "both",
+                   led_color2 == 0x03 ? "off" : led_color2 == 0x02 ? "green" : led_color2 == 0x01 ? "amber" : "both");
 }
 
-static ssize_t port_led_color_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
+static ssize_t port_led_color_store(struct device *dev,
+                                    struct device_attribute *attr,
+                                    const char *buf, size_t count)
 {
     int status;
     __u8 led_color;
     if (sysfs_streq(buf, "off")) {
-        led_color = 0x07;
-    } else if (sysfs_streq(buf, "green")) {
-        led_color = 0x06;
-    } else if (sysfs_streq(buf, "red")) {
-        led_color = 0x05;
-    } else if (sysfs_streq(buf, "yellow")) {
-        led_color = 0x04;
-    } else if (sysfs_streq(buf, "blue")) {
         led_color = 0x03;
-    } else if (sysfs_streq(buf, "cyan")) {
+    } else if (sysfs_streq(buf, "green")) {
         led_color = 0x02;
-    } else if (sysfs_streq(buf, "magenta")) {
+    } else if (sysfs_streq(buf, "amber")) {
         led_color = 0x01;
-    } else if (sysfs_streq(buf, "white")) {
+    } else if (sysfs_streq(buf, "both")) {
         led_color = 0x00;
     } else {
         status = -EINVAL;
         return status;
     }
-    status = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00,
-                             I2C_SMBUS_WRITE, 0x0A, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_color);
-    status = fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00,
-                             I2C_SMBUS_WRITE, 0x0A, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&led_color);
-    return size;
+    status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],
+                             CPLD1_SLAVE_ADDR, 0x00,
+                             I2C_SMBUS_WRITE, 0x0A, I2C_SMBUS_BYTE_DATA,
+                             (union i2c_smbus_data*)&led_color);
+    status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],
+                             CPLD2_SLAVE_ADDR, 0x00,
+                             I2C_SMBUS_WRITE, 0x0A, I2C_SMBUS_BYTE_DATA,
+                             (union i2c_smbus_data*)&led_color);
+    return count;
 }
 DEVICE_ATTR_RW(port_led_color);
 
@@ -1084,7 +1303,7 @@ static struct attribute_group sff_led_test_grp = {
     .attrs = sff_led_test,
 };
 
-static struct device * silverstone_sff_init(int portid) {
+static struct device * ds3000_sff_init(int portid) {
     struct sff_device_data *new_data;
     struct device *new_device;
 
@@ -1096,7 +1315,9 @@ static struct device * silverstone_sff_init(int portid) {
     /* The QSFP port ID start from 1 */
     new_data->portid = portid + 1;
     new_data->port_type = fpga_i2c_bus_dev[portid].port_type;
-    new_device = device_create_with_groups(fpgafwclass, sff_dev, MKDEV(0, 0), new_data, sff_attr_grps, "%s", fpga_i2c_bus_dev[portid].calling_name);
+    new_device = device_create_with_groups(fpgafwclass, sff_dev,
+                                           MKDEV(0, 0), new_data, sff_attr_grps, "%s",
+                                           fpga_i2c_bus_dev[portid].calling_name);
     if (IS_ERR(new_device)) {
         printk(KERN_ALERT "Cannot create sff device @port%d", portid);
         kfree(new_data);
@@ -1195,37 +1416,34 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr,
     struct i2c_dev_data *dev_data;
     void __iomem *pci_bar;
     unsigned int  portid, master_bus;
+
     unsigned int REG_FDR0;
     unsigned int REG_CR0;
     unsigned int REG_SR0;
     unsigned int REG_DR0;
     unsigned int REG_ID0;
 
+    REG_FDR0 = 0;
+    REG_CR0  = 0;
+    REG_SR0  = 0;
+    REG_DR0  = 0;
+    REG_ID0  = 0;
+
     /* Write the command register */
     dev_data = i2c_get_adapdata(adapter);
     portid = dev_data->portid;
     pci_bar = fpga_dev.data_base_addr;
-    master_bus = dev_data->pca9548.master_bus;
-    REG_FDR0  = I2C_MASTER_FREQ_1    + (master_bus - 1) * 0x0100;
-    REG_CR0   = I2C_MASTER_CTRL_1    + (master_bus - 1) * 0x0100;
-    REG_SR0   = I2C_MASTER_STATUS_1  + (master_bus - 1) * 0x0100;
-    REG_DR0   = I2C_MASTER_DATA_1    + (master_bus - 1) * 0x0100;
-    REG_ID0   = I2C_MASTER_PORT_ID_1 + (master_bus - 1) * 0x0100;
-
-    if (master_bus < I2C_MASTER_CH_1 || master_bus > I2C_MASTER_CH_TOTAL) {
-        error = -EINVAL;
-        goto Done;
-    }
 
 #ifdef DEBUG_KERN
-    printk(KERN_INFO "portid %2d|@ 0x%2.2X|f 0x%4.4X|(%d)%-5s| (%d)%-10s|CMD %2.2X "
+    printk(KERN_INFO "portid %2d|@ 0x%2.2X|f 0x%4.4X|(%d)%-5s| (%d)%-15s|CMD %2.2X "
            , portid, addr, flags, rw, rw == 1 ? "READ " : "WRITE"
            , size,                  size == 0 ? "QUICK" :
            size == 1 ? "BYTE" :
            size == 2 ? "BYTE_DATA" :
            size == 3 ? "WORD_DATA" :
            size == 4 ? "PROC_CALL" :
-           size == 5 ? "BLOCK_DATA" :  "ERROR"
+           size == 5 ? "BLOCK_DATA" :
+           size == 8 ? "I2C_BLOCK_DATA" :  "ERROR"
            , cmd);
 #endif
     /* Map the size to what the chip understands */
@@ -1235,6 +1453,7 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr,
     case I2C_SMBUS_BYTE_DATA:
     case I2C_SMBUS_WORD_DATA:
     case I2C_SMBUS_BLOCK_DATA:
+    case I2C_SMBUS_I2C_BLOCK_DATA:
         break;
     default:
         printk(KERN_INFO "Unsupported transaction %d\n", size);
@@ -1242,12 +1461,27 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr,
         goto Done;
     }
 
+    master_bus = dev_data->pca9548.master_bus;
+
+    if (master_bus < I2C_MASTER_CH_1 || master_bus > I2C_MASTER_CH_TOTAL) {
+        error = -ENXIO;
+        goto Done;
+    }
+
+    REG_FDR0  = I2C_MASTER_FREQ_1    + (master_bus - 1) * 0x0100;
+    REG_CR0   = I2C_MASTER_CTRL_1    + (master_bus - 1) * 0x0100;
+    REG_SR0   = I2C_MASTER_STATUS_1  + (master_bus - 1) * 0x0100;
+    REG_DR0   = I2C_MASTER_DATA_1    + (master_bus - 1) * 0x0100;
+    REG_ID0   = I2C_MASTER_PORT_ID_1 + (master_bus - 1) * 0x0100;
+
     iowrite8(portid, pci_bar + REG_ID0);
 
     ////[S][ADDR/R]
-    //Clear status register
+    // Clear status register
     iowrite8(0, pci_bar + REG_SR0);
-    iowrite8(1 << I2C_CR_BIT_MIEN | 1 << I2C_CR_BIT_MTX | 1 << I2C_CR_BIT_MSTA , pci_bar + REG_CR0);
+    iowrite8(1 << I2C_CR_BIT_MIEN |
+             1 << I2C_CR_BIT_MTX |
+             1 << I2C_CR_BIT_MSTA , pci_bar + REG_CR0);
     SET_REG_BIT_H(pci_bar + REG_CR0, I2C_CR_BIT_MEN);
 
     if (rw == I2C_SMBUS_READ &&
@@ -1274,9 +1508,10 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr,
     if (size == I2C_SMBUS_BYTE_DATA ||
             size == I2C_SMBUS_WORD_DATA ||
             size == I2C_SMBUS_BLOCK_DATA ||
+            size == I2C_SMBUS_I2C_BLOCK_DATA ||
             (size == I2C_SMBUS_BYTE && rw == I2C_SMBUS_WRITE)) {
 
-        //sent command code to data register
+        // sent command code to data register
         iowrite8(cmd, pci_bar + REG_DR0);
         info( "MS Send CMD 0x%2.2X", cmd);
 
@@ -1294,14 +1529,15 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr,
     case I2C_SMBUS_WORD_DATA:
         cnt = 2;  break;
     case I2C_SMBUS_BLOCK_DATA:
-        // in block data mode keep number of byte in block[0]
+    case I2C_SMBUS_I2C_BLOCK_DATA:
+        /* In block data modes keep number of byte in block[0] */
         cnt = data->block[0];
         break;
     default:
         cnt = 0;  break;
     }
 
-    // [CNT]  used only bloack data write
+    // [CNT]  used only block data write
     if (size == I2C_SMBUS_BLOCK_DATA && rw == I2C_SMBUS_WRITE) {
 
         iowrite8(cnt, pci_bar + REG_DR0);
@@ -1320,11 +1556,12 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr,
                 size == I2C_SMBUS_BYTE ||
                 size == I2C_SMBUS_BYTE_DATA ||
                 size == I2C_SMBUS_WORD_DATA ||
-                size == I2C_SMBUS_BLOCK_DATA
+                size == I2C_SMBUS_BLOCK_DATA ||
+                size == I2C_SMBUS_I2C_BLOCK_DATA
             )) {
-        int bid = 0;
+        bid = 0;
         info( "MS prepare to sent [%d bytes]", cnt);
-        if (size == I2C_SMBUS_BLOCK_DATA ) {
+        if (size == I2C_SMBUS_BLOCK_DATA || size == I2C_SMBUS_I2C_BLOCK_DATA) {
             bid = 1;    // block[0] is cnt;
             cnt += 1;   // offset from block[0]
         }
@@ -1338,13 +1575,15 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr,
                 goto Done;
             }
         }
+
     }
 
-    //REPEATE START
+    // REPEATE START
     if ( rw == I2C_SMBUS_READ && (
                 size == I2C_SMBUS_BYTE_DATA ||
                 size == I2C_SMBUS_WORD_DATA ||
-                size == I2C_SMBUS_BLOCK_DATA
+                size == I2C_SMBUS_BLOCK_DATA ||
+                size == I2C_SMBUS_I2C_BLOCK_DATA
             )) {
         info( "MS Repeated Start");
 
@@ -1370,7 +1609,8 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr,
                 size == I2C_SMBUS_BYTE ||
                 size == I2C_SMBUS_BYTE_DATA ||
                 size == I2C_SMBUS_WORD_DATA ||
-                size == I2C_SMBUS_BLOCK_DATA
+                size == I2C_SMBUS_BLOCK_DATA ||
+                size == I2C_SMBUS_I2C_BLOCK_DATA
             )) {
 
         switch (size) {
@@ -1380,12 +1620,15 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr,
         case I2C_SMBUS_WORD_DATA:
             cnt = 2;  break;
         case I2C_SMBUS_BLOCK_DATA:
-            //will be changed after recived first data
+            // will be changed after recived first data
             cnt = 3;  break;
+        case I2C_SMBUS_I2C_BLOCK_DATA:
+            cnt = data->block[0];  break;
         default:
             cnt = 0;  break;
         }
 
+        bid = 0;
         info( "MS Receive");
 
         //set to Receive mode
@@ -1395,7 +1638,7 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr,
 
         for (bid = -1; bid < cnt; bid++) {
 
-            // Wait {A}
+            // Wait for byte transfer
             error = i2c_wait_ack(adapter, 12, 0);
             if (error < 0) {
                 goto Done;
@@ -1415,8 +1658,12 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr,
                     info ( "SET STOP in read loop");
                     SET_REG_BIT_L(pci_bar + REG_CR0, I2C_CR_BIT_MSTA);
                 }
-                data->block[bid] = ioread8(pci_bar + REG_DR0);
-
+                if (size == I2C_SMBUS_I2C_BLOCK_DATA) {
+                    // block[0] is read length
+                    data->block[bid + 1] = ioread8(pci_bar + REG_DR0);
+                } else {
+                    data->block[bid] = ioread8(pci_bar + REG_DR0);
+                }
                 info( "DATA IN [%d] %2.2X", bid, data->block[bid]);
 
                 if (size == I2C_SMBUS_BLOCK_DATA && bid == 0) {
@@ -1426,9 +1673,8 @@ static int smbus_access(struct i2c_adapter *adapter, u16 addr,
         }
     }
 
-    //[P]
+    // [P]
     SET_REG_BIT_L(pci_bar + REG_CR0, I2C_CR_BIT_MSTA);
-    i2c_wait_ack(adapter, 12, 0);
     info( "MS STOP");
 
 Done:
@@ -1481,28 +1727,38 @@ static int fpga_i2c_access(struct i2c_adapter *adapter, u16 addr,
         if ( prev_switch != switch_addr && prev_switch != 0 ) {
             // reset prev_port PCA9548 chip
             retry = 3;
-            while(retry--){
-                error = smbus_access(adapter, (u16)(prev_switch), flags, I2C_SMBUS_WRITE, 0x00, I2C_SMBUS_BYTE, NULL);
-                if(error >= 0){
+            while (retry--) {
+                error = smbus_access(adapter, (u16)(prev_switch), flags,
+                                     I2C_SMBUS_WRITE, 0x00,
+                                     I2C_SMBUS_BYTE, NULL);
+                if (error >= 0) {
                     break;
-                }else{
-                    dev_dbg(&adapter->dev,"Failed to deselect ch %d of 0x%x, CODE %d\n", prev_ch, prev_switch, error);
+                } else {
+                    dev_dbg(&adapter->dev,
+                            "Failed to deselect ch %d of 0x%x, CODE %d\n",
+                            prev_ch, prev_switch, error);
                 }
             }
-            if(retry == 0)
+            if (retry < 0) {
                 goto release_unlock;
+            }
             // set PCA9548 to current channel
             retry = 3;
-            while(retry--){
-                error = smbus_access(adapter, switch_addr, flags, I2C_SMBUS_WRITE, 1 << channel, I2C_SMBUS_BYTE, NULL);
-                if(error >= 0){
+            while (retry--) {
+                error = smbus_access(adapter, switch_addr, flags,
+                                     I2C_SMBUS_WRITE, 1 << channel,
+                                     I2C_SMBUS_BYTE, NULL);
+                if (error >= 0) {
                     break;
-                }else{
-                    dev_dbg(&adapter->dev,"Failed to select ch %d of 0x%x, CODE %d\n", channel, switch_addr, error);
+                } else {
+                    dev_dbg(&adapter->dev,
+                            "Failed to deselect ch %d of 0x%x, CODE %d\n",
+                            prev_ch, prev_switch, error);
                 }
             }
-            if(retry == 0)
+            if (retry < 0) {
                 goto release_unlock;
+            }
             // update lasted port
             fpga_i2c_lasted_access_port[master_bus - 1] = switch_addr << 8 | channel;
 
@@ -1511,16 +1767,21 @@ static int fpga_i2c_access(struct i2c_adapter *adapter, u16 addr,
             if ( prev_ch != channel || prev_switch == 0 ) {
                 // set new PCA9548 at switch_addr to current
                 retry = 3;
-                while(retry--){
-                    error = smbus_access(adapter, switch_addr, flags, I2C_SMBUS_WRITE, 1 << channel, I2C_SMBUS_BYTE, NULL);
-                    if(error >= 0){
+                while (retry--) {
+                    error = smbus_access(adapter, switch_addr, flags,
+                                         I2C_SMBUS_WRITE, 1 << channel,
+                                         I2C_SMBUS_BYTE, NULL);
+                    if (error >= 0) {
                         break;
-                    }else{
-                        dev_dbg(&adapter->dev,"Failed to select ch %d of 0x%x, CODE %d\n", channel, switch_addr, error);
+                    } else {
+                        dev_dbg(&adapter->dev,
+                                "Failed to deselect ch %d of 0x%x, CODE %d\n",
+                                prev_ch, prev_switch, error);
                     }
                 }
-                if(retry == 0)
+                if (retry < 0) {
                     goto release_unlock;
+                }
                 // update lasted port
                 fpga_i2c_lasted_access_port[master_bus - 1] = switch_addr << 8 | channel;
             }
@@ -1529,22 +1790,24 @@ static int fpga_i2c_access(struct i2c_adapter *adapter, u16 addr,
 
     // Do SMBus communication
     error = smbus_access(adapter, addr, flags, rw, cmd, size, data);
-    if(error < 0){
-        dev_dbg( &adapter->dev,"smbus_xfer failed (%d) @ 0x%2.2X|f 0x%4.4X|(%d)%-5s| (%d)%-10s|CMD %2.2X "
-           , error, addr, flags, rw, rw == 1 ? "READ " : "WRITE"
-           , size,                  size == 0 ? "QUICK" :
-           size == 1 ? "BYTE" :
-           size == 2 ? "BYTE_DATA" :
-           size == 3 ? "WORD_DATA" :
-           size == 4 ? "PROC_CALL" :
-           size == 5 ? "BLOCK_DATA" :
-           size == 8 ? "I2C_BLOCK_DATA" :  "ERROR"
-           , cmd);
+    if (error < 0) {
+        dev_dbg( &adapter->dev,
+                 "smbus_xfer failed (%d) @ 0x%2.2X|f 0x%4.4X|(%d)%-5s| (%d)%-10s|CMD %2.2X "
+                 , error, addr, flags, rw, rw == 1 ? "READ " : "WRITE"
+                 , size,                  size == 0 ? "QUICK" :
+                 size == 1 ? "BYTE" :
+                 size == 2 ? "BYTE_DATA" :
+                 size == 3 ? "WORD_DATA" :
+                 size == 4 ? "PROC_CALL" :
+                 size == 5 ? "BLOCK_DATA" :
+                 size == 8 ? "I2C_BLOCK_DATA" :  "ERROR"
+                 , cmd);
     }
 
 release_unlock:
     mutex_unlock(&fpga_i2c_master_locks[master_bus - 1]);
-    dev_dbg(&adapter->dev,"switch ch %d of 0x%x -> ch %d of 0x%x\n", prev_ch, prev_switch, channel, switch_addr);
+    dev_dbg(&adapter->dev, "switch ch %d of 0x%x -> ch %d of 0x%x\n",
+            prev_ch, prev_switch, channel, switch_addr);
     return error;
 }
 
@@ -1559,10 +1822,11 @@ static u32 fpga_i2c_func(struct i2c_adapter *a)
            I2C_FUNC_SMBUS_BYTE      |
            I2C_FUNC_SMBUS_BYTE_DATA |
            I2C_FUNC_SMBUS_WORD_DATA |
-           I2C_FUNC_SMBUS_BLOCK_DATA;
+           I2C_FUNC_SMBUS_BLOCK_DATA |
+           I2C_FUNC_SMBUS_I2C_BLOCK;
 }
 
-static const struct i2c_algorithm silverstone_i2c_algorithm = {
+static const struct i2c_algorithm ds3000_i2c_algorithm = {
     .smbus_xfer = fpga_i2c_access,
     .functionality  = fpga_i2c_func,
 };
@@ -1577,23 +1841,24 @@ static const struct i2c_algorithm silverstone_i2c_algorithm = {
  * When bus_number_offset is -1, created adapter with dynamic bus number.
  * Otherwise create adapter at i2c bus = bus_number_offset + portid.
  */
-static struct i2c_adapter * silverstone_i2c_init(struct platform_device *pdev, int portid, int bus_number_offset)
+static struct i2c_adapter * ds3000_i2c_init(struct platform_device *pdev,
+        int portid, int bus_number_offset)
 {
     int error;
-
     struct i2c_adapter *new_adapter;
     struct i2c_dev_data *new_data;
     void __iomem *i2c_freq_base_reg;
 
     new_adapter = kzalloc(sizeof(*new_adapter), GFP_KERNEL);
     if (!new_adapter) {
-        printk(KERN_ALERT "Cannot alloc i2c adapter for %s", fpga_i2c_bus_dev[portid].calling_name);
+        printk(KERN_ALERT "Cannot alloc i2c adapter for %s",
+               fpga_i2c_bus_dev[portid].calling_name);
         return NULL;
     }
 
     new_adapter->owner = THIS_MODULE;
     new_adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
-    new_adapter->algo  = &silverstone_i2c_algorithm;
+    new_adapter->algo  = &ds3000_i2c_algorithm;
     /* If the bus offset is -1, use dynamic bus number */
     if (bus_number_offset == -1) {
         new_adapter->nr = -1;
@@ -1603,7 +1868,8 @@ static struct i2c_adapter * silverstone_i2c_init(struct platform_device *pdev, i
 
     new_data = kzalloc(sizeof(*new_data), GFP_KERNEL);
     if (!new_data) {
-        printk(KERN_ALERT "Cannot alloc i2c data for %s", fpga_i2c_bus_dev[portid].calling_name);
+        printk(KERN_ALERT "Cannot alloc i2c data for %s",
+               fpga_i2c_bus_dev[portid].calling_name);
         kfree_sensitive(new_adapter);
         return NULL;
     }
@@ -1631,32 +1897,16 @@ static struct i2c_adapter * silverstone_i2c_init(struct platform_device *pdev, i
     return new_adapter;
 };
 
-static void silverstone_dev_release( struct device * dev)
-{
-    return;
-}
-
-static struct platform_device silverstone_dev = {
-    .name           = DRIVER_NAME,
-    .id             = -1,
-    .num_resources  = 0,
-    .resource       = NULL,
-    .dev = {
-        .release = silverstone_dev_release,
-    }
-};
-
 /**
  * Board info for QSFP/SFP+ eeprom.
- * Note: Using OOM optoe as I2C eeprom driver.
- * https://www.opencompute.org/wiki/Networking/SpecsAndDesigns#Open_Optical_Monitoring
+ * Note: Using sff8436 as I2C eeprom driver.
  */
 static struct i2c_board_info sff8436_eeprom_info[] = {
-    { I2C_BOARD_INFO("optoe1", 0x50) }, //For QSFP w/ sff8436
-    { I2C_BOARD_INFO("optoe2", 0x50) }, //For SFP+ w/ sff8472
+    { I2C_BOARD_INFO("optoe1", 0x50) },
+    { I2C_BOARD_INFO("optoe2", 0x50) },
 };
 
-static int silverstone_drv_probe(struct platform_device *pdev)
+static int ds3000_drv_probe(struct platform_device *pdev)
 {
     int ret = 0;
     int portid_count;
@@ -1667,7 +1917,7 @@ static int silverstone_drv_probe(struct platform_device *pdev)
     /* The device class need to be instantiated before this function called */
     BUG_ON(fpgafwclass == NULL);
 
-    fpga_data = devm_kzalloc(&pdev->dev, sizeof(struct silverstone_fpga_data),
+    fpga_data = devm_kzalloc(&pdev->dev, sizeof(struct ds3000_fpga_data),
                              GFP_KERNEL);
 
     if (!fpga_data)
@@ -1679,6 +1929,7 @@ static int silverstone_drv_probe(struct platform_device *pdev)
     fpga_data->cpld2_read_addr = 0x00;
 
     mutex_init(&fpga_data->fpga_lock);
+
     for (ret = I2C_MASTER_CH_1 ; ret <= I2C_MASTER_CH_TOTAL; ret++) {
         mutex_init(&fpga_i2c_master_locks[ret - 1]);
     }
@@ -1777,14 +2028,15 @@ static int silverstone_drv_probe(struct platform_device *pdev)
     }
 
     for (portid_count = 0 ; portid_count < VIRTUAL_I2C_PORT_LENGTH ; portid_count++) {
-        fpga_data->i2c_adapter[portid_count] = silverstone_i2c_init(pdev, portid_count, VIRTUAL_I2C_BUS_OFFSET);
+        fpga_data->i2c_adapter[portid_count] = ds3000_i2c_init(pdev, portid_count, VIRTUAL_I2C_BUS_OFFSET);
     }
 
+
     /* Init SFF devices */
     for (portid_count = 0; portid_count < SFF_PORT_TOTAL; portid_count++) {
         struct i2c_adapter *i2c_adap = fpga_data->i2c_adapter[portid_count];
         if (i2c_adap) {
-            fpga_data->sff_devices[portid_count] = silverstone_sff_init(portid_count);
+            fpga_data->sff_devices[portid_count] = ds3000_sff_init(portid_count);
             sff_data = dev_get_drvdata(fpga_data->sff_devices[portid_count]);
             BUG_ON(sff_data == NULL);
             if ( sff_data->port_type == QSFP ) {
@@ -1797,19 +2049,21 @@ static int silverstone_drv_probe(struct platform_device *pdev)
                               &fpga_data->sff_i2c_clients[portid_count]->dev.kobj,
                               "i2c");
         }
+
     }
 
+    printk(KERN_INFO "Virtual I2C buses created\n");
+
 #ifdef TEST_MODE
     return 0;
 #endif
-    fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00,
+    fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], CPLD1_SLAVE_ADDR, 0x00,
                     I2C_SMBUS_READ, 0x00, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&cpld1_version);
-    fpga_i2c_access(fpga_data->i2c_adapter[SW_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00,
+    fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX], CPLD2_SLAVE_ADDR, 0x00,
                     I2C_SMBUS_READ, 0x00, I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&cpld2_version);
 
-    printk(KERN_INFO "Switch CPLD1 VERSION: %2.2x\n", cpld1_version);
-    printk(KERN_INFO "Switch CPLD2 VERSION: %2.2x\n", cpld2_version);
-
+    printk(KERN_INFO "CPLD1 VERSON: %2.2x\n", cpld1_version);
+    printk(KERN_INFO "CPLD2 VERSON: %2.2x\n", cpld2_version);
 
     /* Init I2C buses that has PCA9548 switch device. */
     for (portid_count = 0; portid_count < VIRTUAL_I2C_PORT_LENGTH; portid_count++) {
@@ -1826,7 +2080,8 @@ static int silverstone_drv_probe(struct platform_device *pdev)
 
             if (prev_i2c_switch != ( (master_bus << 8) | switch_addr) ) {
                 // Found the bus with PCA9548, trying to clear all switch in it.
-                smbus_access(fpga_data->i2c_adapter[portid_count], switch_addr, 0x00, I2C_SMBUS_WRITE, 0x00, I2C_SMBUS_BYTE, NULL);
+                smbus_access(fpga_data->i2c_adapter[portid_count], switch_addr, 0x00,
+                             I2C_SMBUS_WRITE, 0x00, I2C_SMBUS_BYTE, NULL);
                 prev_i2c_switch = ( master_bus << 8 ) | switch_addr;
             }
         }
@@ -1834,7 +2089,7 @@ static int silverstone_drv_probe(struct platform_device *pdev)
     return 0;
 }
 
-static int silverstone_drv_remove(struct platform_device *pdev)
+static int ds3000_drv_remove(struct platform_device *pdev)
 {
     int portid_count;
     struct sff_device_data *rem_data;
@@ -1872,20 +2127,20 @@ static int silverstone_drv_remove(struct platform_device *pdev)
     return 0;
 }
 
+static struct platform_driver ds3000_drv = {
+    .probe  = ds3000_drv_probe,
+    .remove = __exit_p(ds3000_drv_remove),
+    .driver = {
+        .name   = DRIVER_NAME,
+    },
+};
+
 #ifdef TEST_MODE
 #define FPGA_PCI_BAR_NUM 2
 #else
 #define FPGA_PCI_BAR_NUM 0
 #endif
 
-static struct platform_driver silverstone_drv = {
-    .probe  = silverstone_drv_probe,
-    .remove = __exit_p(silverstone_drv_remove),
-    .driver = {
-        .name   = DRIVER_NAME,
-    },
-};
-
 static const struct pci_device_id fpga_id_table[] = {
     {  PCI_VDEVICE(XILINX, FPGA_PCIE_DEVICE_ID) },
     {  PCI_VDEVICE(TEST, TEST_PCIE_DEVICE_ID) },
@@ -1934,11 +2189,15 @@ static int fpga_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
     printk(KERN_INFO "");
     fpga_version = ioread32(fpga_dev.data_base_addr);
     printk(KERN_INFO "FPGA VERSION : %8.8x\n", fpga_version);
-    fpgafw_init();
-    platform_device_register(&silverstone_dev);
-    platform_driver_register(&silverstone_drv);
+    if ((err = fpgafw_init()) < 0) {
+        goto pci_unmap;
+    }
+    ds3000_dev = platform_device_register_simple(DRIVER_NAME, -1, NULL, 0);
+    platform_driver_register(&ds3000_drv);
     return 0;
 
+pci_unmap:
+    pci_iounmap(pdev, fpga_dev.data_base_addr);
 pci_release:
     pci_release_regions(pdev);
 pci_disable:
@@ -1948,8 +2207,8 @@ static int fpga_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 
 static void fpga_pci_remove(struct pci_dev *pdev)
 {
-    platform_driver_unregister(&silverstone_drv);
-    platform_device_unregister(&silverstone_dev);
+    platform_driver_unregister(&ds3000_drv);
+    platform_device_unregister(ds3000_dev);
     fpgafw_exit();
     pci_iounmap(pdev, fpga_dev.data_base_addr);
     pci_release_regions(pdev);
@@ -1974,7 +2233,8 @@ struct fpga_reg_data {
     uint32_t value;
 };
 
-static long fpgafw_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg) {
+static long fpgafw_unlocked_ioctl(struct file *file, unsigned int cmd,
+                                  unsigned long arg) {
     int ret = 0;
     struct fpga_reg_data data;
     mutex_lock(&fpga_data->fpga_lock);
@@ -2065,25 +2325,24 @@ static int fpgafw_init(void) {
 
     // Register the device driver
     fpgafwdev = device_create(fpgafwclass, NULL, MKDEV(majorNumber, 0), NULL, DEVICE_NAME);
-    if (IS_ERR(fpgafwdev)) {                  // Clean up if there is an error
+    if (IS_ERR(fpgafwdev)) {                 // Clean up if there is an error
         class_destroy(fpgafwclass);           // Repeated code but the alternative is goto statements
         unregister_chrdev(majorNumber, DEVICE_NAME);
         printk(KERN_ALERT "Failed to create the FW upgrade device node\n");
         return PTR_ERR(fpgafwdev);
     }
-    printk(KERN_INFO "FPGA fw upgrade device node created correctly\n");
+    printk(KERN_INFO "FPGA fw upgrade device node created correctly\n"); // Made it! device was initialized
     return 0;
 }
 
 static void fpgafw_exit(void) {
     device_destroy(fpgafwclass, MKDEV(majorNumber, 0));     // remove the device
-    class_unregister(fpgafwclass);                          // unregister the device class
     class_destroy(fpgafwclass);                             // remove the device class
     unregister_chrdev(majorNumber, DEVICE_NAME);            // unregister the major number
     printk(KERN_INFO "Goodbye!\n");
 }
 
-int silverstone_init(void)
+int ds3000_init(void)
 {
     int rc;
     rc = pci_register_driver(&pci_dev_ops);
@@ -2092,15 +2351,15 @@ int silverstone_init(void)
     return 0;
 }
 
-void silverstone_exit(void)
+void ds3000_exit(void)
 {
     pci_unregister_driver(&pci_dev_ops);
 }
 
-module_init(silverstone_init);
-module_exit(silverstone_exit);
+module_init(ds3000_init);
+module_exit(ds3000_exit);
 
-MODULE_AUTHOR("Celestica Inc.");
-MODULE_DESCRIPTION("Celestica Silverstone platform driver");
+MODULE_AUTHOR("Pradchaya P. <pphuhcar@celestica.com>");
+MODULE_DESCRIPTION("Celestica ds3000 switchboard driver");
 MODULE_VERSION(MOD_VERSION);
 MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/setup.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/setup.py
new file mode 100644
index 000000000000..02fcfff6aea1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/setup.py
@@ -0,0 +1,28 @@
+import os
+import sys
+from setuptools import setup
+os.listdir
+
+setup(
+    name='sonic-platform',
+    version='1.0',
+    description='SONiC platform API implementation on Celestica Platforms based on PDDF',
+    license='Apache 2.0',
+    author='SONiC Team',
+    author_email='linuxnetdev@microsoft.com',
+    url='https://github.com/Azure/sonic-buildimage',
+    packages=['sonic_platform'],
+    classifiers=[
+        'Development Status :: 3 - Alpha',
+        'Environment :: Plugins',
+        'Intended Audience :: Developers',
+        'Intended Audience :: Information Technology',
+        'Intended Audience :: System Administrators',
+        'License :: OSI Approved :: Apache Software License',
+        'Natural Language :: English',
+        'Operating System :: POSIX :: Linux',
+        'Programming Language :: Python :: 3.9',
+        'Topic :: Utilities',
+    ],
+    keywords='sonic SONiC platform PLATFORM',
+)
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/__init__.py
new file mode 100644
index 000000000000..21d9cd445e31
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/__init__.py
@@ -0,0 +1,4 @@
+# All the derived classes for PDDF
+__all__ = ["platform", "chassis", "sfp", "psu", "thermal"]
+from . import platform
+from . import chassis
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/chassis.py
new file mode 100644
index 000000000000..00fe4a2457a2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/chassis.py
@@ -0,0 +1,295 @@
+#############################################################################
+# PDDF
+# Module contains an implementation of SONiC Chassis API
+#
+#############################################################################
+
+try:
+    import os
+    import re
+    import shutil
+    import subprocess
+    from . import component
+    from .event import XcvrEvent
+    from .helper import APIHelper
+    from .thermal import ThermalMon, THERMAL_MONITOR_SENSORS
+    from sonic_py_common import logger
+    from sonic_platform_pddf_base.pddf_chassis import PddfChassis
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+RESET_SOURCE_OS_REG = '0xa106'
+LPC_SYSLED_REG = '0xa162'
+LPC_GETREG_PATH = "/sys/bus/platform/devices/baseboard/getreg"
+LPC_SETREG_PATH = "/sys/bus/platform/devices/baseboard/setreg"
+LED_CTRL_MODE_GET_CMD = "ipmitool raw 0x3a 0x42 0x01"
+
+ORG_HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt"
+TMP_HW_REBOOT_CAUSE_FILE="/tmp/hw-reboot-cause.txt"
+
+SYSLOG_IDENTIFIER = "Chassis"
+helper_logger = logger.Logger(SYSLOG_IDENTIFIER)
+
+class Chassis(PddfChassis):
+    """
+    PDDF Platform-specific Chassis class
+    """
+    SYSLED_COLOR_VAL_MAP = {
+        'off': '0xff',
+        'green': '0xdc',
+        'amber': '0xec',
+        'amber_blink': '0xee',
+        'amber_blink_4hz': '0xee',
+        'amber_blink_1hz': '0xed',
+        'green_blink': '0xde',
+        'green_blink_4hz': '0xde',
+        'green_blink_1hz': '0xdd'
+    }
+
+    SYSLED_VAL_COLOR_MAP = {
+        '0xff': 'off',
+        '0xdc': 'green',
+        '0xec': 'amber',
+        '0xee': 'amber_blink_4hz',
+        '0xed': 'amber_blink_1hz',
+        '0xde': 'green_blink_4hz',
+        '0xdd': 'green_blink_1hz'
+    }
+
+    def __init__(self, pddf_data=None, pddf_plugin_data=None):
+        PddfChassis.__init__(self, pddf_data, pddf_plugin_data)
+        self._api_helper = APIHelper()
+
+        for index in range(self.platform_inventory['num_components']):
+            component_obj = component.Component(index)
+            self._component_list.append(component_obj)
+
+        if not self._api_helper.is_bmc_present():
+            thermal_count = len(self._thermal_list)
+            for idx, name in enumerate(THERMAL_MONITOR_SENSORS):
+                thermal = ThermalMon(thermal_count + idx, name)
+                self._thermal_list.append(thermal)
+
+    def initizalize_system_led(self):
+        """
+        This function is not defined in chassis base class,
+        system-health command would invoke chassis.initizalize_system_led(),
+        add this stub function just to let the command sucessfully execute
+        """
+        pass
+
+    def get_status_led(self):
+        """
+        Gets the state of the system LED
+        Args:
+            None
+        Returns:
+            A string, one of the valid LED color strings which could be vendor
+            specified.
+        """
+        led_status = self._api_helper.lpc_getreg(LPC_GETREG_PATH, LPC_SYSLED_REG)
+        color = self.SYSLED_VAL_COLOR_MAP.get(led_status, 'unknown')
+        return color
+
+    def set_status_led(self, color):
+        """
+        Sets the state of the system LED
+        Args:
+            color: A string representing the color with which to set the
+                   system LED
+        Returns:
+            bool: True if system LED state is set successfully, False if not
+        """
+        if self._api_helper.is_bmc_present():
+            led_mode_cmd = LED_CTRL_MODE_GET_CMD
+            if os.getuid() != 0:
+                cmd = "sudo " + cmd
+                led_mode_cmd = "sudo " + led_mode_cmd
+            status, mode = self._api_helper.get_cmd_output(led_mode_cmd)
+            # led take automatic control mode, led not settable
+            if status != 0 or mode.strip() == "01":
+                helper_logger.log_info("SYS LED takes automatic ctrl mode!")
+                return False
+
+        # Set SYS_LED through baseboard cpld
+        color_val = self.SYSLED_COLOR_VAL_MAP.get(color, None)
+        if color_val == None:
+            helper_logger.log_error("SYS LED color {} not support!".format(color))
+            return False
+
+        status = self._api_helper.lpc_setreg(LPC_SETREG_PATH, LPC_SYSLED_REG, color_val)
+
+        return status
+
+    def get_sfp(self, index):
+        """
+        Retrieves sfp represented by (1-based) index <index>
+        For Quanta the index in sfputil.py starts from 1, so override
+        Args:
+            index: An integer, the index (1-based) of the sfp to retrieve.
+            The index should be the sequence of a physical port in a chassis,
+            starting from 1.
+        Returns:
+            An object dervied from SfpBase representing the specified sfp
+        """
+        sfp = None
+
+        try:
+            if (index == 0):
+                raise IndexError
+            sfp = self._sfp_list[index-1]
+        except IndexError:
+            sys.stderr.write("override: SFP index {} out of range (1-{})\n".format(
+                index, len(self._sfp_list)))
+
+        return sfp
+    # Provide the functions/variables below for which implementation is to be overwritten
+
+    def get_reboot_cause(self):
+        """
+        Retrieves the cause of the previous reboot
+        Returns:
+            A tuple (string, string) where the first element is a string
+            containing the cause of the previous reboot. This string must be
+            one of the predefined strings in this class. If the first string
+            is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
+            to pass a description of the reboot cause.
+        """
+        hw_reboot_cause = self._api_helper.lpc_getreg(LPC_GETREG_PATH, RESET_SOURCE_OS_REG)
+        
+        if hw_reboot_cause == "0x33" and os.path.isfile(TMP_HW_REBOOT_CAUSE_FILE):
+            with open(TMP_HW_REBOOT_CAUSE_FILE) as hw_cause_file:
+               reboot_info = hw_cause_file.readline().rstrip('\n')
+               match = re.search(r'Reason:(.*),Time:(.*)', reboot_info)
+               description = 'CPU cold reset'
+               if match is not None:
+                  if match.group(1) == 'system':
+                     return (self.REBOOT_CAUSE_NON_HARDWARE, 'System cold reboot')
+        elif hw_reboot_cause == "0x99":
+            reboot_cause = self.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC
+            description = 'ASIC Overload Reboot'
+        elif hw_reboot_cause == "0x88":
+            reboot_cause = self.REBOOT_CAUSE_THERMAL_OVERLOAD_CPU
+            description = 'CPU Overload Reboot'
+        elif hw_reboot_cause == "0x66":
+            reboot_cause = self.REBOOT_CAUSE_WATCHDOG
+            description = 'Hardware Watchdog Reset'
+        elif hw_reboot_cause == "0x55":
+            reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER
+            description = 'CPU Cold Reset'
+        elif hw_reboot_cause == "0x44":
+            reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE
+            description = 'CPU Warm Reset'
+        elif hw_reboot_cause == "0x33":
+            reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE
+            description = 'Soft-Set Cold Reset'
+        elif hw_reboot_cause == "0x22":
+            reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE
+            description = 'Soft-Set Warm Reset'
+        elif hw_reboot_cause == "0x11":
+            reboot_cause = self.REBOOT_CAUSE_POWER_LOSS
+            description = 'Power Off Reset'
+        elif hw_reboot_cause == "0x00":
+            reboot_cause = self.REBOOT_CAUSE_POWER_LOSS
+            description = 'Power Cycle Reset'
+        else:
+            reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER
+            description = 'Hardware reason'
+
+        return (reboot_cause, description)
+
+    def get_watchdog(self):
+        """
+        Retreives hardware watchdog device on this chassis
+
+        Returns:
+            An object derived from WatchdogBase representing the hardware
+            watchdog device
+        """
+        try:
+            if self._watchdog is None:
+                from sonic_platform.cpld_watchdog import Watchdog
+                # Create the watchdog Instance from cpld watchdog
+                self._watchdog = Watchdog()
+
+        except Exception as e:
+            helper_logger.log_error("Fail to load watchdog due to {}".format(e))
+        return self._watchdog
+
+    ##############################################################
+    ###################### Event methods #########################
+    ##############################################################
+    def get_change_event(self, timeout=0):
+        """
+        Returns a nested dictionary containing all devices which have
+        experienced a change at chassis level
+        Args:
+            timeout: Timeout in milliseconds (optional). If timeout == 0,
+                this method will block until a change is detected.
+        Returns:
+            (bool, dict):
+                - True if call successful, False if not;
+                - A nested dictionary where key is a device type,
+                  value is a dictionary with key:value pairs in the format of
+                  {'device_id':'device_event'},
+                  where device_id is the device ID for this device and
+                        device_event,
+                             status='1' represents device inserted,
+                             status='0' represents device removed.
+                  Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0'}}
+                      indicates that fan 0 has been removed, fan 2
+                      has been inserted and sfp 11 has been removed.
+        """
+        # SFP event
+        if self.get_num_sfps() == 0:
+            for index in range(self.platform_inventory['num_ports']):
+                sfp = Sfp(index, self.pddf_obj, self.plugin_data)
+                self._sfp_list.append(sfp)
+
+        succeed, sfp_event = XcvrEvent(self._sfp_list).get_xcvr_event(timeout)
+        if succeed:
+            return True, {'sfp': sfp_event}
+
+        return False, {'sfp': {}}
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the chassis (Service tag)
+        Returns:
+            string: Serial number of chassis
+        """
+        return self._eeprom.serial_number_str()
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision for the chassis
+        Returns:
+            A string containing the hardware revision for this chassis.
+        """
+        return self._eeprom.revision_str()
+
+    def get_system_airflow(self):
+        """
+        Retrieve system airflow
+        Returns:
+            string: INTAKE or EXHAUST
+        """
+        airflow = self.get_serial()[5:8]
+        if airflow == "B2F":
+            return "INTAKE"
+        elif airflow == "F2B":
+            return "EXHAUST"
+        return "Unknown"
+
+    def get_thermal_manager(self):
+        """
+        Retrieves thermal manager class on this chasssis
+
+        Returns:
+            A class derived from ThermalManagerBase representing the
+            specified thermal manager
+        """
+        if not self._api_helper.is_bmc_present():
+            from .thermal_manager import ThermalManager
+            return ThermalManager
+        return None
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/component.py
new file mode 100644
index 000000000000..d6abdeb8c968
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/component.py
@@ -0,0 +1,321 @@
+try:
+    import re
+    import subprocess
+    from .helper import APIHelper
+    from sonic_platform_base.component_base import ComponentBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+BMC_EXIST =APIHelper().is_bmc_present()
+FPGA_VERSION_PATH = "/sys/bus/platform/devices/fpga_sysfs/version"
+Bios_Version_Cmd = "dmidecode -t bios | grep Version"
+
+BIOS_VERSION_CMD = "dmidecode -s bios-version"
+ONIE_VERSION_CMD = "cat /host/machine.conf"
+SWCPLD1_VERSION_CMD = "i2cget -y -f 102 0x30 0x0 | tr a-z A-Z | cut -d 'X' -f 2"
+SWCPLD2_VERSION_CMD = "i2cget -y -f 102 0x31 0x0 | tr a-z A-Z | cut -d 'X' -f 2"
+BASECPLD_VERSION_CMD = "cat /sys/devices/platform/baseboard/version | tr a-z A-Z | cut -d 'X' -f 2"
+COME_CPLD_VERSION_CMD = "cat /sys/devices/platform/baseboard/come_cpld_version | tr a-z A-Z | cut -d 'X' -f 2"
+SSD_VERSION_CMD = "smartctl -i /dev/sda"
+ASIC_PCIE_VERSION_CMD = "bcmcmd 'pciephy fw version' | grep 'PCIe FW version' | cut -d ' ' -f 4"
+
+
+COMPONENT_NAME_LIST = ["BIOS", "ONIE", "BMC", "FPGA", "CPLD COMe", "CPLD BASE",
+                       "CPLD SW1", "CPLD SW2", "ASIC PCIe", "SSD"]
+COMPONENT_DES_LIST = ["Basic input/output System", 
+                      "Open Network Install Environment",
+                      "Baseboard Management Controller",
+                      "FPGA for transceiver EEPROM access and other component I2C access",
+                      "COMe board CPLD",
+                      "CPLD for board functions, fan control and watchdog",
+                      "CPLD for port control QSFP(1-16)",
+                      "CPLD for port control QSFP(17-32), SFP(33)",
+                      "ASIC PCIe Firmware",
+                      "Solid State Drive - {}"]
+
+UNKNOWN_VER = "Unknown"
+
+class Component(ComponentBase):
+    """Platform-specific Component class"""
+
+    DEVICE_TYPE = "component"
+
+    def __init__(self, component_index):
+        ComponentBase.__init__(self)
+        self.index = component_index
+        self.helper = APIHelper()
+        self.name = self.get_name()
+
+    def get_firmware_version(self):
+        """
+        Retrieves the available firmware version of the component
+
+        Note: the firmware version will be read from image
+
+        Args:
+          image_path: A string, path to firmware image
+
+        Returns:
+          A string containing the available firmware version of the component
+        """
+        fw_version_info = {
+           "ONIE": self.__get_onie_ver(),
+           "SSD": self.__get_ssd_ver(),
+           "BIOS": self.__get_bios_ver(),
+           "FPGA": self.__get_fpga_version(),
+           "ASIC PCIe": self.__get_asic_pcie_ver(),
+        }
+        fw_version_info.update(self.__get_cpld_ver())
+        if self.__get_bmc_presence():
+            fw_version_info.update(self.__get_bmc_ver())
+        return fw_version_info.get(self.name, UNKNOWN_VER)
+
+    def get_firmware_update_notification(self, image_path):
+        """
+        Retrieves a notification on what should be done in order to complete
+        the component firmware update
+
+        Args:
+          image_path: A string, path to firmware image
+
+        Returns:
+          A string containing the component firmware update notification if required.
+          By default 'None' value will be used, which indicates that no actions are required
+        """
+        type = self.get_type()
+        if type == 'bios':
+            return "BIOS will be updated, please wait for completion and reboot the device to take effect!"
+        elif type == 'cpld' or type == 'fpga':
+            return "{} will be updated, please wait for completion and power reboot device to take effect!".format(type.upper())
+        elif type == 'bmc':
+            return "BMC image will be updated, please wait for completion!"
+        return None
+
+    def install_firmware(self, image_path):
+        """
+        Installs firmware to the component
+
+        This API performs firmware installation only: this may/may not be the same as firmware update.
+        In case platform component requires some extra steps (apart from calling Low Level Utility)
+        to load the installed firmware (e.g, reboot, power cycle, etc.) - this must be done manually by user
+
+        Note: in case immediate actions are required to complete the component firmware update
+        (e.g., reboot, power cycle, etc.) - will be done automatically by API and no return value provided
+
+        Args:
+          image_path: A string, path to firmware image
+
+        Returns:
+          A boolean, True if install was successful, False if not
+        """
+        #if self.component_data == None:
+        self.component_data = self._get_component_data()
+        pre_cmd = self.component_data['pre-update']
+        update_cmd = self.component_data['update']
+        post_cmd = self.component_data['post-update']
+        if pre_cmd != None:
+            status, _ = self._api_helper.get_cmd_output(pre_cmd)
+            if status != 0:
+                return False
+        if update_cmd != None:
+            update_cmd = update_cmd.format(image_path)
+            status, _ = self._api_helper.get_cmd_output(update_cmd)
+            if status != 0:
+                return False
+        if post_cmd != None:
+            status, _ = self._api_helper.get_cmd_output(post_cmd)
+            if status != 0:
+                return False
+
+        return True
+
+    def update_firmware(self, image_path):
+        """
+        Updates firmware of the component
+
+        This API performs firmware update: it assumes firmware installation and loading in a single call.
+        In case platform component requires some extra steps (apart from calling Low Level Utility)
+        to load the installed firmware (e.g, reboot, power cycle, etc.) - this will be done automatically by API
+
+        Args:
+          image_path: A string, path to firmware image
+
+        Returns:
+          Boolean False if image_path doesn't exist instead of throwing an exception error
+          Nothing when the update is successful
+
+        Raises:
+          RuntimeError: update failed
+        """
+        status = self.install_firmware(image_path)
+        if not status:
+            return status
+
+        type = self.get_type()
+        if type == 'fpga' or type == 'cpld':
+            # TODO:: power cycle FPGA or CPLD
+            pass
+
+        return True
+
+    def auto_update_firmware(self, image_path, boot_type):
+        """
+        Updates firmware of the component
+
+        This API performs firmware update automatically based on boot_type: it assumes firmware installation
+        and/or creating a loading task during the reboot, if needed, in a single call.
+        In case platform component requires some extra steps (apart from calling Low Level Utility)
+        to load the installed firmware (e.g, reboot, power cycle, etc.) - this will be done automatically during the reboot.
+        The loading task will be created by API.
+
+        Args:
+          image_path: A string, path to firmware image
+          boot_type: A string, reboot type following the upgrade
+                       - none/fast/warm/cold
+
+        Returns:
+          Output: A return code
+              return_code: An integer number, status of component firmware auto-update
+                  - return code of a positive number indicates successful auto-update
+                      - status_installed = 1
+                      - status_updated = 2
+                      - status_scheduled = 3
+                  - return_code of a negative number indicates failed auto-update
+                      - status_err_boot_type = -1
+                      - status_err_image = -2
+                      - status_err_unknown = -3
+
+        Raises:
+          RuntimeError: auto-update failure cause
+        """
+        raise NotImplementedError
+
+    def get_name(self):
+        """
+        Retrieves the name of the component
+        Returns:
+           A string containing the name of the component
+        """
+        return COMPONENT_NAME_LIST[self.index]
+
+    def get_description(self):
+        """
+        Retrieves the description of the component
+        Returns:
+           A string containing the description of the component
+        """
+        # For SSD get the model name from device
+        if self.get_name() == "SSD":
+          return "Solid State Drive - {}".format(self.__get_ssd_model())
+
+        return COMPONENT_DES_LIST[self.index]
+
+    def __get_cpld_ver(self):
+        cpld_version_dict = dict()
+        cpld_ver_info = {
+            'CPLD BASE': self.__get_basecpld_ver(),
+            'CPLD SW1': self.__get_swcpld1_ver(),
+            'CPLD SW2': self.__get_swcpld2_ver(),
+            'CPLD COMe': self.__get_comecpld_ver(),
+        }
+
+        for cpld_name, cpld_ver in cpld_ver_info.items():
+            ver1 = int(cpld_ver.strip()) / 10
+            ver2 = int(cpld_ver.strip()) % 10
+            version = "%d.%d" % (ver1,ver2)
+            cpld_version_dict[cpld_name] = version
+        return cpld_version_dict
+
+    def __get_asic_pcie_ver(self):
+        status, raw_ver=self.helper.run_command(ASIC_PCIE_VERSION_CMD)
+        if status:
+           return raw_ver
+        else:
+           return UNKNOWN_VER
+
+    def __get_bios_ver(self):
+        status, raw_ver=self.helper.run_command(BIOS_VERSION_CMD)
+        if status:
+           return raw_ver
+        else:
+           return UNKNOWN_VER
+
+    def __get_basecpld_ver(self):
+        status, raw_ver=self.helper.run_command(BASECPLD_VERSION_CMD)
+        if status:
+           return raw_ver
+        else:
+           return UNKNOWN_VER
+
+    def __get_comecpld_ver(self):
+        status, raw_ver=self.helper.run_command(COME_CPLD_VERSION_CMD)
+        if status:
+           return raw_ver
+        else:
+           return UNKNOWN_VER
+    
+    def __get_swcpld1_ver(self):
+        status, raw_ver=self.helper.run_command(SWCPLD1_VERSION_CMD)
+        if status:
+           return raw_ver
+        else:
+           return UNKNOWN_VER
+
+    def __get_swcpld2_ver(self):
+        status, raw_ver=self.helper.run_command(SWCPLD2_VERSION_CMD)
+        if status:
+            return raw_ver
+        else:
+           return UNKNOWN_VER
+
+    def __get_bmc_presence(self):
+        if BMC_EXIST:
+           return True
+        else:
+           return False
+
+    def __get_bmc_ver(self):
+        cmd="ipmitool mc info | grep 'Firmware Revision'"
+        status, raw_ver=self.helper.run_command(cmd)
+        if status:
+           bmc_ver=raw_ver.split(':')[-1].strip()
+           return {"BMC":bmc_ver}
+        else:
+           return {"BMC":"N/A"}
+
+    def __get_fpga_version(self):
+        status, fpga_version = self.helper.run_command("cat %s" % FPGA_VERSION_PATH)
+        if not status:
+            return UNKNOWN_VER
+        return fpga_version.replace("0x", "")
+
+    def __get_onie_ver(self):
+        onie_ver = "N/A"
+        status, raw_onie_data = self.helper.run_command(ONIE_VERSION_CMD)
+        if status:
+           ret = re.search(r"(?<=onie_version=).+[^\n]", raw_onie_data)
+           if ret != None:
+              onie_ver = ret.group(0)
+        return onie_ver
+
+    def __get_ssd_ver(self):
+        ssd_ver = "N/A"
+        status, raw_ssd_data = self.helper.run_command(SSD_VERSION_CMD)
+        if status:
+           ret = re.search(r"Firmware Version: +(.*)[^\\]", raw_ssd_data)
+           if ret != None:
+              ssd_ver = ret.group(1)
+        return ssd_ver
+
+    def __get_ssd_model(self):
+        model = "N/A"
+
+        status, raw_ssd_data = self.helper.run_command(SSD_VERSION_CMD)
+        if status:
+            ret = re.search(r"Device Model: +(.*)[^\\]", raw_ssd_data)
+            if ret != None:
+                try:
+                    model = ret.group(1)
+                except (IndexError):
+                    pass
+        return model
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/cpld_watchdog.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/cpld_watchdog.py
new file mode 100644
index 000000000000..7889ce15f83f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/cpld_watchdog.py
@@ -0,0 +1,228 @@
+#!/usr/bin/env python
+
+#############################################################################
+#
+# Watchdog contains an implementation of SONiC Platform Base Watchdog API
+#
+#############################################################################
+try:
+    import ctypes
+    import fcntl
+    import os
+    import subprocess
+    import time
+    import array
+    import syslog
+    from .helper import APIHelper
+    from sonic_platform_base.watchdog_base import WatchdogBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+LPC_CPLD_GETREG_PATH = "/sys/bus/platform/devices/baseboard/getreg"
+LPC_CPLD_SETREG_PATH = "/sys/bus/platform/devices/baseboard/setreg"
+LPC_WDT_SET_TIMER_L_REG = '0xa183'
+LPC_WDT_SET_TIMER_M_REG = '0xa182'
+LPC_WDT_SET_TIMER_H_REG = '0xa181'
+LPC_WDT_TIMER_L_REG = '0xa186'
+LPC_WDT_TIMER_M_REG = '0xa185'
+LPC_WDT_TIMER_H_REG = '0xa184'
+LPC_WDT_CTRL_REG = '0xa187'
+LPC_WDT_ARM_REG = '0xa188'
+
+WDT_ENABLE = 0x1
+WDT_DISABLE = 0x0
+WDT_COMMON_ERROR = -1
+DEFAULT_TIMEOUT = 180
+
+class CpldWatchdog(WatchdogBase):
+
+    def __init__(self):
+        WatchdogBase.__init__(self)
+        # Set default value
+        self._api_helper = APIHelper()
+        self._ka_count = int(1)
+        self.armed = True if self._active() else False
+        self.timeout = self._gettimeout() if self.armed else DEFAULT_TIMEOUT
+        #self._disable()
+
+    def _lpc_get(self, reg):
+        return self._api_helper.lpc_getreg(LPC_CPLD_GETREG_PATH, reg)
+
+    def _lpc_set(self, reg, val):
+        if type(val) is int:
+            val = hex(val)
+        return self._api_helper.lpc_setreg(LPC_CPLD_SETREG_PATH, reg, val)
+
+    def _active(self):
+        """
+        WDT is active or not
+        """
+        data = self._lpc_get(LPC_WDT_CTRL_REG)
+        return True if data == "0x01" else False
+
+    def _enable(self):
+        """
+        Turn on the watchdog timer
+        """
+        status = self._lpc_set(LPC_WDT_CTRL_REG, WDT_ENABLE)
+        if not status:
+            pass
+
+    def _disable(self):
+        """
+        Turn off the watchdog timer
+        """
+        status = self._lpc_set(LPC_WDT_CTRL_REG, WDT_DISABLE)
+        if not status:
+            pass
+
+    def _keepalive(self):
+        """
+        Keep alive watchdog timer
+        """
+        if bool(self._ka_count % 2):
+            status = self._lpc_set(LPC_WDT_ARM_REG, WDT_ENABLE)
+        else:
+            status = self._lpc_set(LPC_WDT_ARM_REG, WDT_DISABLE)
+
+        if not status:
+            syslog.syslog(syslog.LOG_ERR, "Feed Watchdog failed")
+
+        self._ka_count = self._ka_count + 1
+        if (self._ka_count >= 11):
+            self._ka_count = 1
+
+    def _settimeout(self, seconds):
+        """
+        Set watchdog timer timeout
+        @param seconds - timeout in seconds
+        @return is the actual set timeout
+        """
+        ms = seconds * 1000
+        ms_low_byte = ms & 0xff
+        ms_media_byte = (ms >> 8) & 0xff
+        ms_high_byte = (ms >> 16) & 0xff
+        self._lpc_set(LPC_WDT_SET_TIMER_L_REG, ms_low_byte)
+        self._lpc_set(LPC_WDT_SET_TIMER_M_REG, ms_media_byte)
+        self._lpc_set(LPC_WDT_SET_TIMER_H_REG, ms_high_byte)
+        return self._gettimeout()
+
+    def _gettimeout(self):
+        """
+        Get watchdog timeout
+        @return watchdog timeout
+        """
+        data = [0, 0, 0]
+        data[0] = self._lpc_get(LPC_WDT_SET_TIMER_L_REG)
+        data[1] = self._lpc_get(LPC_WDT_SET_TIMER_M_REG)
+        data[2] = self._lpc_get(LPC_WDT_SET_TIMER_H_REG)
+        seconds = int((int(data[2], 16) << 16
+                | int(data[1], 16) << 8
+                | int(data[0], 16)) / 1000)
+        return seconds
+
+    def _gettimeleft(self):
+        """
+        Get time left before watchdog timer expires
+        @return time left in seconds
+        """
+        data = [0, 0, 0]
+        data[0] = self._lpc_get(LPC_WDT_TIMER_L_REG)
+        data[1] = self._lpc_get(LPC_WDT_TIMER_M_REG)
+        data[2] = self._lpc_get(LPC_WDT_TIMER_H_REG)
+        seconds = int((int(data[2], 16) << 16
+                | int(data[1], 16) << 8
+                | int(data[0], 16)) / 1000)
+
+        return seconds
+
+    #################################################################
+
+    def arm(self, seconds):
+        """
+        Arm the hardware watchdog with a timeout of <seconds> seconds.
+        If the watchdog is currently armed, calling this function will
+        simply reset the timer to the provided value. If the underlying
+        hardware does not support the value provided in <seconds>, this
+        method should arm the watchdog with the *next greater* available
+        value.
+        Returns:
+            An integer specifying the *actual* number of seconds the watchdog
+            was armed with. On failure returns -1.
+        """
+
+        ret = WDT_COMMON_ERROR
+        if seconds < 0:
+            return ret
+
+        try:
+            if self.armed:
+                self._keepalive()
+                if self.timeout != seconds:
+                    self._disable()
+                    time.sleep(1)
+                    self.timeout = self._settimeout(seconds)
+                    self._enable()
+            else:
+                self.timeout = self._settimeout(seconds)
+                self._keepalive()
+                self._enable()
+                self.armed = True
+            ret = self.timeout
+        except IOError as e:
+            pass
+
+        return ret
+
+    def disarm(self):
+        """
+        Disarm the hardware watchdog
+        Returns:
+            A boolean, True if watchdog is disarmed successfully, False if not
+        """
+        disarmed = False
+        if self.is_armed():
+            try:
+                self._disable()
+                self.armed = False
+                disarmed = True
+            except IOError:
+                pass
+
+        return disarmed
+
+    def is_armed(self):
+        """
+        Retrieves the armed state of the hardware watchdog.
+        Returns:
+            A boolean, True if watchdog is armed, False if not
+        """
+
+        return self.armed
+
+    def get_remaining_time(self):
+        """
+        If the watchdog is armed, retrieve the number of seconds remaining on
+        the watchdog timer
+        Returns:
+            An integer specifying the number of seconds remaining on thei
+            watchdog timer. If the watchdog is not armed, returns -1.
+        """
+
+        timeleft = WDT_COMMON_ERROR
+
+        if self.armed:
+            try:
+                timeleft = self._gettimeleft()
+            except IOError:
+                pass
+
+        return timeleft
+
+class Watchdog(CpldWatchdog):
+    """PDDF Platform-Specific Watchdog Class"""
+
+    def __init__(self):
+        CpldWatchdog.__init__(self)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/eeprom.py
new file mode 100644
index 000000000000..cb3c825516e7
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/eeprom.py
@@ -0,0 +1,84 @@
+try:
+    import os
+    from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+EEPROM_TMP_FILE = '/tmp/eeprom_dump.bin'
+
+class Eeprom(PddfEeprom):
+
+    _TLV_DISPLAY_VENDOR_EXT = True
+    _TLV_INFO_MAX_LEN = 256
+    pddf_obj = {}
+    plugin_data = {}
+
+    def __init__(self, pddf_data=None, pddf_plugin_data=None):
+        if not pddf_data or not pddf_plugin_data:
+            raise ValueError('PDDF JSON data error')
+
+        self.pddf_obj = pddf_data
+        self.plugin_data = pddf_plugin_data
+
+        # system EEPROM always has device name EEPROM1
+        self.eeprom_path = self.pddf_obj.get_path("EEPROM1", "eeprom")
+        if self.eeprom_path is None:
+            return
+
+        super(PddfEeprom, self).__init__(self.eeprom_path, 0, '', True)
+        self.eeprom_tlv_dict = dict()
+        try:
+            if os.path.exists(EEPROM_TMP_FILE):
+                with open(EEPROM_TMP_FILE, 'rb') as b_fd:
+                    self.eeprom_data = bytearray(b_fd.read())
+            else:
+                self.eeprom_data = self.read_eeprom()
+                with open(EEPROM_TMP_FILE, 'wb') as b_fd:
+                    b_fd.write(self.eeprom_data)
+                os.chmod(EEPROM_TMP_FILE, 0o444)
+        except Exception as e:
+            self.eeprom_data = "N/A"
+            raise RuntimeError("PddfEeprom is not Programmed - Error: {}".format(str(e)))
+        else:
+            eeprom = self.eeprom_data
+
+            if not self.is_valid_tlvinfo_header(eeprom):
+                return
+
+            total_length = ((eeprom[9]) << 8) | (eeprom[10])
+            tlv_index = self._TLV_INFO_HDR_LEN
+            tlv_end = self._TLV_INFO_HDR_LEN + total_length
+
+            while (tlv_index + 2) < self._TLV_INFO_MAX_LEN and tlv_index < tlv_end:
+                if not self.is_valid_tlv(eeprom[tlv_index:]):
+                    break
+
+                tlv = eeprom[tlv_index:tlv_index + 2
+                             + (eeprom[tlv_index + 1])]
+                code = "0x%02X" % ((tlv[0]))
+
+                if (tlv[0]) == self._TLV_CODE_VENDOR_EXT:
+                    name = "Vendor Extension"
+                    value = ""
+                    if self._TLV_DISPLAY_VENDOR_EXT:
+                       for c in tlv[2:2 + tlv[1]]:
+                           value += "0x%02X " % c
+                else:
+                    name, value = self.decoder(None, tlv)
+
+                self.eeprom_tlv_dict[code] = value
+                if (eeprom[tlv_index]) == self._TLV_CODE_CRC_32:
+                    break
+
+                tlv_index += (eeprom[tlv_index+1]) + 2
+
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+    def revision_str(self):
+        (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_DEVICE_VERSION)
+        if not is_valid:
+            "N/A"
+        if type(results[2]) is bytearray:
+            return str(int.from_bytes(results[2], byteorder='little'))
+
+        return results[2].decode('ascii')
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/event.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/event.py
new file mode 100644
index 000000000000..86a1390cd6b7
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/event.py
@@ -0,0 +1,52 @@
+try:
+    import time
+    from sonic_py_common.logger import Logger
+except ImportError as e:
+    raise ImportError(repr(e) + " - required module not found")
+
+class XcvrEvent:
+    ''' Listen to insert/remove QSFP/SFP+ events '''
+
+    def __init__(self, sfp_list):
+        self._sfp_list = sfp_list
+        self._logger = Logger()
+
+    xcvr_change_event_data = {'valid': 0, 'last': 0, 'present': 0}
+
+    def get_xcvr_event(self, timeout):
+        port_dict = {}
+
+        # Using polling mode
+        now = time.time()
+
+        if timeout < 1000:
+            timeout = 1000
+        timeout = timeout / float(1000)  # Convert to secs
+
+        if now < (self.xcvr_change_event_data['last'] + timeout) \
+                and self.xcvr_change_event_data['valid']:
+            return True, port_dict
+
+        bitmap = 0
+        for sfp in self._sfp_list:
+            modpres = sfp.get_presence()
+            index = sfp.port_index - 1
+            if modpres:
+                bitmap = bitmap | (1 << index)
+
+        changed_ports = self.xcvr_change_event_data['present'] ^ bitmap
+        if changed_ports:
+            for sfp in self._sfp_list:
+                index = sfp.port_index - 1
+                if changed_ports & (1 << index):
+                    if (bitmap & (1 << index)) == 0:
+                        port_dict[str(index + 1)] = '0'
+                    else:
+                        port_dict[str(index + 1)] = '1'
+
+            # Update the cache dict
+            self.xcvr_change_event_data['present'] = bitmap
+            self.xcvr_change_event_data['last'] = now
+            self.xcvr_change_event_data['valid'] = 1
+
+        return True, port_dict
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/fan.py
new file mode 100644
index 000000000000..e50a7d70e2e6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/fan.py
@@ -0,0 +1,246 @@
+import os
+
+try:
+    from .helper import APIHelper
+    from sonic_platform_pddf_base.pddf_fan import PddfFan
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+SET_FAN_STATUS_LED_CMD = "0x3A 0x39 0x02 {} {}"
+BMC_EXIST = APIHelper().is_bmc_present()
+
+class Fan(PddfFan):
+    """PDDF Platform-Specific Fan class"""
+
+    BMC_FAN_FSC_STATUS_CMD = "ipmitool raw 0x3a 0x26 0x00"
+    LPC_CPLD_SETREG_PATH = "/sys/bus/platform/devices/baseboard/setreg"
+    FAN_PWM_CTRL_REG_MAP = {
+        1: '0xa1b2',
+        2: '0xa1b8',
+        3: '0xa1c4',
+        4: '0xa1ca'
+    }
+
+    def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0):
+        # idx is 0-based
+        PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index)
+        self._api_helper = APIHelper()
+
+    def get_presence(self):
+        """
+          Retrieves the presence of fan
+        """
+        if self.is_psu_fan:
+            return super().get_presence()
+        return super().get_presence()
+
+    def get_direction(self):
+        """
+          Retrieves the direction of fan
+
+          Returns:
+               A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
+               depending on fan direction
+               Or N/A if fan removed or abnormal
+        """
+        if not self.get_status():
+           return "N/A"
+
+        if self.is_psu_fan:
+            from sonic_platform.psu import Psu
+            psu = Psu(self.fans_psu_index - 1, self.pddf_obj, self.plugin_data)
+            model = psu.get_model()
+            if model in ["FSP550-20FM", "G1251-0550WNA"]:
+                return "EXHAUST"
+            elif model in ["FSP550-29FM", "G1251-0550WRA"]:
+                return "INTAKE"
+            return "Unknown"
+
+        return super().get_direction()
+
+
+    def get_target_speed(self):
+        """
+        Retrieves the target (expected) speed of the fan
+
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        target_speed = 0
+        if self.is_psu_fan:
+            # PSU fan not controllable, return current speed
+            return self.get_speed()
+        else:
+            speed_rpm = self.get_speed_rpm()
+            if self.fan_index == 1:
+                if(self.plugin_data['FAN']['FRONT_FAN_MAX_RPM_SPEED'].isnumeric()):
+                    max_fan_rpm = int(self.plugin_data['FAN']['FRONT_FAN_MAX_RPM_SPEED'])
+                else:
+                    return target_speed
+            else:
+                if(self.plugin_data['FAN']['REAR_FAN_MAX_RPM_SPEED'].isnumeric()):
+                    max_fan_rpm = int(self.plugin_data['FAN']['REAR_FAN_MAX_RPM_SPEED'])
+                else:
+                    return target_speed
+            speed_percentage = round(int((speed_rpm * 100) / max_fan_rpm))
+            target_speed = speed_percentage
+
+        return target_speed
+
+    def get_speed(self):
+        """
+        Retrieves the speed of fan as a percentage of full speed
+
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        if self.is_psu_fan:
+            attr = "psu_fan{}_speed_rpm".format(self.fan_index)
+            device = "PSU{}".format(self.fans_psu_index)
+            output = self.pddf_obj.get_attr_name_output(device, attr)
+            if not output:
+                return 0
+
+            output['status'] = output['status'].rstrip()
+            if output['status'].isalpha():
+                return 0
+            else:
+                speed = int(float(output['status']))
+
+            max_speed = int(self.plugin_data['PSU']['PSU_FAN_MAX_SPEED'])
+            speed_percentage = round((speed*100)/max_speed)
+            return speed_percentage if speed_percentage <= 100 else 100
+        else:
+            # Get fan rpm instead of fan pwm
+            idx = (self.fantray_index-1)*self.platform['num_fans_pertray'] + self.fan_index
+            attr = "fan" + str(idx) + "_input"
+            output = self.pddf_obj.get_attr_name_output("FAN-CTRL", attr)
+
+            if not output:
+                return 0
+
+            output['status'] = output['status'].rstrip()
+            if output['status'].isalpha():
+                return 0
+            else:
+                speed = int(float(output['status']))
+
+            if self.fan_index == 1:
+                max_speed = int(self.plugin_data['FAN']['FRONT_FAN_MAX_RPM_SPEED'])
+            else:
+                max_speed = int(self.plugin_data['FAN']['REAR_FAN_MAX_RPM_SPEED'])
+            speed_percentage = round((speed*100)/max_speed)
+
+            return speed_percentage if speed_percentage <= 100 else 100
+
+    def set_speed(self, speed):
+        """
+        Sets the fan speed
+
+        Args:
+            speed: An integer, the percentage of full fan speed to set fan to,
+                   in the range 0 (off) to 100 (full speed)
+
+        Returns:
+            A boolean, True if speed is set successfully, False if not
+        """
+        if self.is_psu_fan:
+            print("Setting PSU fan speed is not allowed")
+            return False
+
+        if speed < 0 or speed > 100:
+            print("Error: Invalid speed %d. Please provide a valid speed percentage" % speed)
+            return False
+
+        if 'duty_cycle_to_pwm' not in self.plugin_data['FAN']:
+            print("Setting fan speed is not allowed !")
+            return False
+
+        if(self.plugin_data['FAN']['duty_cycle_to_pwm'].isnumeric())
+            duty_cycle_to_pwm = int(self.plugin_data['FAN']['duty_cycle_to_pwm'])
+        else:
+            return False
+        pwm = int(round(duty_cycle_to_pwm(speed)))
+
+        if self._api_helper.is_bmc_present():
+            status, data = self._api_helper.get_cmd_output(self.BMC_FAN_FSC_STATUS_CMD)
+            if status != 0:
+                print("Error: failed to get BMC FSC status")
+                return False
+            if data == '01':
+                # Enable BMC FSC mode
+                return False
+
+        # FAN 1 & 2 in same fantray share the same register, skip Fan2 setting
+        if self.fan_index == 2:
+            return True
+        # Set FAN PWM through baseboard CPLD
+        reg = self.FAN_PWM_CTRL_REG_MAP.get(self.fantray_index)
+        status = self._api_helper.lpc_setreg(self.LPC_CPLD_SETREG_PATH, reg, hex(pwm))
+
+        return status
+
+    def get_speed_tolerance(self):
+        """
+        Retrieves the speed tolerance of the fan
+
+        Returns:
+            An integer, the percentage of variance from target speed which is
+            considered tolerable
+        """
+        return 15 if "PSU" in self.get_name() else 25
+
+    def is_under_speed(self):
+        speed = float(self.get_speed())
+        target_speed = float(self.get_target_speed())
+        speed_tolerance = self.get_speed_tolerance()
+
+        speed_min_th = target_speed * (1 - float(speed_tolerance) / 100)
+        if speed < speed_min_th:
+            return True
+        else:
+            return False
+
+    def is_over_speed(self):
+        speed = float(self.get_speed())
+        target_speed = float(self.get_target_speed())
+        speed_tolerance = self.get_speed_tolerance()
+
+        speed_max_th = target_speed * (1 + float(speed_tolerance) / 100)
+        if speed > speed_max_th:
+            return True
+        else:
+            return False
+
+    def set_status_led(self,color):
+        if self.is_psu_fan:
+            return super().set_status_led(color)
+
+        if color == self.get_status_led():
+            return False
+
+        if BMC_EXIST:
+            fan_led_color_map = {
+                'off': '00',
+                'green': '01',
+                'amber': '02',
+                'red': '02'
+            }
+
+            fan_index_val = hex(self.fantray_index + 3)
+
+            color_val = fan_led_color_map.get(color.lower(), None)
+
+            if fan_index_val is None:
+                return False
+
+            if color_val is None:
+                return False
+
+            status, _ = self._api_helper.ipmi_raw(SET_FAN_STATUS_LED_CMD.format(fan_index_val,color_val))
+
+            return status
+        else:
+            return self.set_system_led("SYS_LED", color)
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/fan_drawer.py
new file mode 100644
index 000000000000..3b582835accd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/fan_drawer.py
@@ -0,0 +1,28 @@
+#!/usr/bin/env python
+
+
+try:
+    from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class FanDrawer(PddfFanDrawer):
+    """PDDF Platform-Specific Fan-Drawer class"""
+
+    def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None):
+        # idx is 0-based
+        PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+    def get_presence(self):
+        status = False
+        # Usually if a tray is removed, all the fans inside it are absent
+        if self._fan_list and len(self._fan_list) == 2:
+            status = self._fan_list[0].get_presence() or self._fan_list[1].get_presence()
+        else:
+            status = self._fan_list[0].get_presence()
+        return status
+
+    def get_name(self):
+        return "Fantray {0}".format(self.fantray_index)
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/helper.py
new file mode 100644
index 000000000000..7ec1f23e950c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/helper.py
@@ -0,0 +1,139 @@
+import fcntl
+import os
+import struct
+import subprocess
+from mmap import *
+
+BMC_PRES_SYS_PATH = '/sys/bus/platform/devices/baseboard/bmc_presence'
+
+class APIHelper():
+    def pci_get_value(self, resource, offset):
+        status = True
+        result = ""
+        try:
+            fd = os.open(resource, os.O_RDWR)
+            mm = mmap(fd, 0)
+            mm.seek(int(offset))
+            read_data_stream = mm.read(4)
+            result = struct.unpack('I', read_data_stream)
+        except:
+            status = False
+        return status, result
+
+    def get_cmd_output(self, cmd):
+        status = 0
+        ret, data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            status = ret
+        
+        return status, data
+
+    def read_txt_file(self, file_path):
+        try:
+            with open(file_path, 'r') as fd:
+                data = fd.read()
+                return data.strip()
+        except IOError:
+            pass
+        return None
+
+    def read_one_line_file(self, file_path):
+        try:
+            with open(file_path, 'r') as fd:
+                data = fd.readline()
+                return data.strip()
+        except IOError:
+            pass
+        return None
+
+    def write_txt_file(self, file_path, value):
+        try:
+            with open(file_path, 'w') as fd:
+                fd.write(str(value))
+        except Exception:
+            return False
+        return True
+
+    def lpc_getreg(self, getreg_path, reg):
+        """
+        Get the cpld reg through lpc interface
+
+        Args:
+            getreg_path: getreg sysfs path
+            reg: 16 bits reg addr in hex str format
+
+        Returns:
+            A str, register value in hex str format
+        """
+        file = open(getreg_path, 'w+')
+        # Acquire an exclusive lock on the file
+        fcntl.flock(file, fcntl.LOCK_EX)
+
+        try:
+            file.write(reg)
+            file.flush()
+
+            # Seek to the beginning of the file
+            file.seek(0)
+
+            # Read the content of the file
+            result = file.readline().strip()
+        finally:
+            # Release the lock and close the file
+            fcntl.flock(file, fcntl.LOCK_UN)
+            file.close()
+
+        return result
+
+    def lpc_setreg(self, setreg_path, reg, val):
+        """
+        Set the cpld reg through lpc interface
+
+        Args:
+            setreg_path: setreg sysfs path
+            reg: 16 bits reg addr in hex str format
+            val: 8 bits register value in hex str format
+
+        Returns:
+            A boolean, True if speed is set successfully, False if not
+        """
+        status = True
+        file = open(setreg_path, 'w')
+        # Acquire an exclusive lock on the file
+        fcntl.flock(file, fcntl.LOCK_EX)
+
+        try:
+            data = "{} {}".format(reg, val)
+            file.write(data)
+            file.flush()
+        except:
+            status = False
+        finally:
+            # Release the lock and close the file
+            fcntl.flock(file, fcntl.LOCK_UN)
+            file.close()
+
+        return status
+
+    def is_bmc_present(self):
+        """
+        Get the BMC card present status
+
+        Returns:
+            A boolean, True if present, False if absent
+        """
+        presence = self.read_txt_file(BMC_PRES_SYS_PATH)
+        if presence == None:
+            print("Failed to get BMC card presence status")
+        return True if presence == "present" else False
+
+    def run_command(self,cmd):
+        status = True
+        result = ""
+        ret, data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            status = False
+        else:
+            result = data
+
+        return status, result
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/pcie.py
new file mode 100644
index 000000000000..6c01e694fdb3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/pcie.py
@@ -0,0 +1,10 @@
+try:
+    from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+class Pcie(PcieUtil):
+    """Celestica Platform-specific PCIe class"""
+
+    def __init__(self, platform_path):
+        PcieUtil.__init__(self, platform_path)
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/platform.py
new file mode 100644
index 000000000000..8595e80692df
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/platform.py
@@ -0,0 +1,23 @@
+#############################################################################
+# PDDF
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
+#
+#############################################################################
+
+
+try:
+    from sonic_platform_pddf_base.pddf_platform import PddfPlatform
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Platform(PddfPlatform):
+    """
+    PDDF Platform-Specific Platform Class
+    """
+
+    def __init__(self):
+        PddfPlatform.__init__(self)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/psu.py
new file mode 100644
index 000000000000..27ea301e307a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/psu.py
@@ -0,0 +1,49 @@
+try:
+    from sonic_platform_pddf_base.pddf_psu import PddfPsu
+    from .helper import APIHelper
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+LPC_GETREG_PATH = "/sys/bus/platform/devices/baseboard/getreg"
+LPC_PSU_STATUS_REG = '0xa160'
+LPC_PSU_POWER_STATUS_OFFSET = 0
+LPC_PSU_PRES_STATUS_OFFSET = 2
+
+class Psu(PddfPsu):
+    """PDDF Platform-Specific PSU class"""
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
+        PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data)
+        self._api_helper = APIHelper()
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+    def get_capacity(self):
+        return 550
+
+    def get_type(self):
+        return 'AC'
+
+    def get_revision(self):
+        """
+        Retrieves the revision of the device
+        Returns:
+            string: revision of device
+        """
+        if not self.get_presence():
+            return 'N/A'
+
+        if self._api_helper.is_bmc_present():
+            cmd = "ipmitool fru list {} | grep 'Product Version'".format(5 - self.psu_index)
+            status, output = self._api_helper.get_cmd_output(cmd)
+            if status == 0:
+                rev = output.split()[-1]
+                return rev
+        else:
+            # Get the revision information from FRU
+            cmd = "i2cget -y -f {} {} 0x2d w".format(42 + self.psu_index - 1, hex(0x52 + self.psu_index - 1))
+            status, output = self._api_helper.get_cmd_output(cmd)
+            if status == 0:
+                rev = bytes.fromhex(output.strip('0x')).decode('utf-8')
+                # swap to change the endian difference
+                return rev[::-1]
+        return 'N/A'
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/sfp.py
new file mode 100644
index 000000000000..5f88fb99704b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/sfp.py
@@ -0,0 +1,183 @@
+#!/usr/bin/env python
+
+try:
+    import ast
+    import syslog
+    import time
+    from multiprocessing import Lock
+    from sonic_platform_pddf_base.pddf_sfp import PddfSfp
+    from sonic_platform_base.sonic_xcvr.api.public.c_cmis import CmisApi
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+
+class Sfp(PddfSfp):
+    """
+    PDDF Platform-Specific Sfp class
+    """
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
+        PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data)
+        self.eeprom_lock = Lock()
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+    # Add reties to work around FPGAPCI 0050/eeprom: offset 0x0: sometimes read failed
+    def __read_eeprom(self, offset, num_bytes):
+        """
+        read eeprom specfic bytes beginning from a random offset with size as num_bytes
+
+        Args:
+            offset :
+                Integer, the offset from which the read transaction will start
+            num_bytes:
+                Integer, the number of bytes to be read
+
+        Returns:
+            bytearray, if raw sequence of bytes are read correctly from the offset of size num_bytes
+            None, if the read_eeprom fails
+        """
+        buf = None
+        eeprom_raw = []
+        sysfs_sfp_i2c_client_eeprom_path = self.eeprom_path
+
+        if not self.get_presence():
+            return None
+
+        sysfsfile_eeprom = None
+        attempts = 0
+        max_retries = 5
+        success = False
+        while attempts < max_retries and not success:
+            try:
+                if attempts > 0:
+                    time.sleep(0.2)
+                sysfsfile_eeprom = open(sysfs_sfp_i2c_client_eeprom_path, "rb", 0)
+                sysfsfile_eeprom.seek(offset)
+                buf = sysfsfile_eeprom.read(num_bytes)
+                success = True
+            except Exception as ex:
+                attempts += 1
+                # Eliminate the redundant errors by showing errors only for lower page and page 0
+                if attempts == max_retries:
+                    if offset < 256:
+                        syslog.syslog(syslog.LOG_INFO, "port {0}: {1}: offset {2}: read reach retry limit, refer to last eeprom cache".format(self.port_index, sysfs_sfp_i2c_client_eeprom_path, hex(offset)))
+                    return None
+            finally:
+                if sysfsfile_eeprom is not None:
+                    sysfsfile_eeprom.close()
+
+        if buf is None:
+            return None
+
+        for x in buf:
+            eeprom_raw.append(x)
+
+        while len(eeprom_raw) < num_bytes:
+            eeprom_raw.append(0)
+        return bytes(eeprom_raw)
+
+    # Read out any bytes from any offset
+    def read_eeprom(self, offset, num_bytes):
+        """
+        read eeprom specfic bytes beginning from a random offset with size as num_bytes
+
+        Args:
+             offset :
+                     Integer, the offset from which the read transaction will start
+             num_bytes:
+                     Integer, the number of bytes to be read
+
+        Returns:
+            bytearray, if raw sequence of bytes are read correctly from the offset of size num_bytes
+            None, if the read_eeprom fails
+        """
+        self.eeprom_lock.acquire()
+        bytes = self.__read_eeprom(offset, num_bytes)
+        self.eeprom_lock.release()
+        return bytes
+
+    def get_presence(self):
+        presence = PddfSfp.get_presence(self)
+        if not presence and self._xcvr_api != None:
+            self._xcvr_api = None
+
+        return presence
+
+    def get_xcvr_api(self):
+        if self._xcvr_api is None and self.get_presence():
+            self.refresh_xcvr_api()
+
+            # Find and update the right optoe driver
+            api_to_driver_map = {\
+                'Sff8636Api': 'optoe1',\
+                'Sff8472Api': 'optoe2',\
+                'CmisApi': 'optoe3',\
+                'CCmisApi': 'optoe3',\
+                'Sff8436Api': 'sff8436'\
+            }
+            create_dev = False
+            path_list = self.eeprom_path.split('/')
+            name_path = '/'.join(path_list[:-1]) + '/name'
+            del_dev_path = '/'.join(path_list[:-2]) + '/delete_device'
+            new_dev_path = '/'.join(path_list[:-2]) + '/new_device'
+            api_name = type(self._xcvr_api).__name__
+            new_driver = api_to_driver_map.get(api_name, 'optoe1')
+
+            try:
+                with open(name_path, 'r') as fd:
+                    cur_driver = fd.readline().strip()
+            except FileNotFoundError:
+                create_dev = True
+            else:
+                if cur_driver != new_driver:
+                    with open(del_dev_path, 'w') as fd:
+                        fd.write("0x50")
+                    create_dev = True
+
+            if create_dev:
+                with open(new_dev_path, 'w') as fd:
+                    fd.write("{} 0x50".format(new_driver))
+
+            if api_name == 'Sff8636Api' or \
+                api_name == 'Sff8436Api':
+                self.write_eeprom(93,1,bytes([0x04]))
+
+        return self._xcvr_api
+
+    def get_platform_media_key(self, transceiver_dict, port_speed, lane_count):
+        api = self.get_xcvr_api()
+        api_name = type(api).__name__
+        if api_name in ['CmisApi', 'CCmisApi']:
+            is_cmis = True
+        else:
+            is_cmis = False
+
+        # Per lane speed
+        media_key = str(int(port_speed / lane_count))
+        if is_cmis:
+            media_compliance_code = transceiver_dict['specification_compliance']
+            if 'copper' in media_compliance_code:
+                media_len = transceiver_dict['cable_length']
+                media_key += '-copper-' + str(media_len) + 'M'
+            else:
+                media_key += '-optical'
+        else:
+            media_compliance_dict = ast.literal_eval(transceiver_dict['specification_compliance'])
+            eth_compliance_str = '10/40G Ethernet Compliance Code'
+            ext_compliance_str = 'Extended Specification Compliance'
+            media_compliance_code = ''
+            if eth_compliance_str in media_compliance_dict:
+                media_compliance_code = media_compliance_dict[eth_compliance_str]
+            if ext_compliance_str in media_compliance_dict:
+                media_compliance_code = media_compliance_code + ' ' + media_compliance_dict[ext_compliance_str]
+            if 'CR' in media_compliance_code or "copper" in transceiver_dict['specification_compliance'].lower():
+                media_len = transceiver_dict['cable_length']
+                media_key += '-copper-' + str(media_len) + 'M'
+            else:
+                media_key += '-optical'
+
+        return {\
+            'vendor_key': '',\
+            'media_key': media_key,\
+            'lane_speed_key': ''\
+        }
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal.py
new file mode 100644
index 000000000000..ac73015d1ea3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal.py
@@ -0,0 +1,56 @@
+try:
+    from sonic_platform_pddf_base.pddf_thermal import PddfThermal
+    from sonic_platform_base.thermal_base import ThermalBase
+    from .helper import APIHelper
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+SENSORS_LOW_THRESHOLD_MAP = {"Base_Temp_U5": -5, "Base_Temp_U56": -5,
+                             "Switch_Temp_U28": -5, "Switch_Temp_U29": -5}
+
+class Thermal(PddfThermal):
+    """PDDF Platform-Specific Thermal class"""
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0):
+        PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+
+    def get_high_threshold(self):
+        if self.is_psu_thermal:
+            device = "PSU{}".format(self.thermals_psu_index)
+            output = self.pddf_obj.get_attr_name_output(device, "psu_temp1_high_threshold")
+            if not output:
+                return None
+
+            temp1 = output['status']
+            # temperature returned is in milli celcius
+            return float(temp1)/1000
+        else:
+            return super().get_high_threshold()
+
+    def get_low_threshold(self):
+        low_threshold = SENSORS_LOW_THRESHOLD_MAP.get(self.get_name(), None)
+        if low_threshold != None:
+            return low_threshold
+        return super().get_low_threshold()
+
+
+BCM_TEMP_GET_CMD = "cat /sys/devices/platform/fpga_sysfs/bcm_temp"
+THERMAL_MONITOR_SENSORS = ["CPU_Temp", "BCM_SW_Temp", "VDD_CORE_Temp", "VDD_ANLG_Temp"]
+THERMAL_THRESHOLDS = { "CPU_Temp":      { "high_threshold": 89, "low_threshold": 'N/A', "high_crit_threshold": 93,
+                                          "temp_cmd": "r=$(cat /sys/class/thermal/thermal_zone1/temp) && printf '%.1f' $(($r / 1000))" },
+                       "BCM_SW_Temp":   { "high_threshold": 110, "low_threshold": 'N/A', "high_crit_threshold": 120,
+                                          "temp_cmd": "r=$(cat /sys/devices/platform/fpga_sysfs/bcm_temp) && printf '%.1f' $(((434100 - ((12500000 / $r - 1) * 535) + 5000) / 1000))"},
+                       "VDD_CORE_Temp": { "high_threshold": 120, "low_threshold": 'N/A', "high_crit_threshold": 'N/A',
+                                          "temp_cmd": "r=$(cat /sys/class/hwmon/hwmon45/temp1_input) && printf '%.1f' $(($r / 1000))" },
+                       "VDD_ANLG_Temp": { "high_threshold": 120, "low_threshold": 'N/A', "high_crit_threshold": 'N/A',
+                                         "temp_cmd": "r=$(cat /sys/class/hwmon/hwmon44/temp1_input) && printf '%.1f' $(($r / 1000))" }}
+
+class ThermalMon(ThermalBase):
+    def __init__(self, index, name):
+        self.thermal_index = index + 1
+        self.thermal_name = name
+        self._helper = APIHelper()
+
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_actions.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_actions.py
new file mode 100644
index 000000000000..8be043d94310
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_actions.py
@@ -0,0 +1,341 @@
+from sonic_platform_base.sonic_thermal_control.thermal_action_base import ThermalPolicyActionBase
+from sonic_platform_base.sonic_thermal_control.thermal_json_object import thermal_json_object
+from .helper import APIHelper
+
+from sonic_py_common import logger
+
+sonic_logger = logger.Logger('thermal_actions')
+
+
+class SetFanSpeedAction(ThermalPolicyActionBase):
+    """
+    Base thermal action class to set speed for fans
+    """
+    # JSON field definition
+    JSON_FIELD_SPEED = 'speed'
+
+    def __init__(self):
+        """
+        Constructor of SetFanSpeedAction
+        """
+        self.default_speed = 50
+        self.hightemp_speed = 100
+        self.speed = self.default_speed
+
+    def load_from_json(self, json_obj):
+        """
+        Construct SetFanSpeedAction via JSON. JSON example:
+            {
+                "type": "fan.all.set_speed"
+                "speed": "100"
+            }
+        :param json_obj: A JSON object representing a SetFanSpeedAction action.
+        :return:
+        """
+        if SetFanSpeedAction.JSON_FIELD_SPEED in json_obj:
+            speed = float(json_obj[SetFanSpeedAction.JSON_FIELD_SPEED])
+            if speed < 0 or speed > 100:
+                raise ValueError('SetFanSpeedAction invalid speed value {} in JSON policy file, valid value should be [0, 100]'.
+                                 format(speed))
+            self.speed = float(json_obj[SetFanSpeedAction.JSON_FIELD_SPEED])
+        else:
+            raise ValueError('SetFanSpeedAction missing mandatory field {} in JSON policy file'.
+                             format(SetFanSpeedAction.JSON_FIELD_SPEED))
+
+    @classmethod
+    def set_all_fan_speed(cls, thermal_info_dict, speed):
+        from .thermal_infos import FanInfo
+        if FanInfo.INFO_NAME in thermal_info_dict and isinstance(thermal_info_dict[FanInfo.INFO_NAME], FanInfo):
+            fan_info_obj = thermal_info_dict[FanInfo.INFO_NAME]
+            for fan in fan_info_obj.get_all_fans():
+                fan.set_speed(int(speed))
+
+
+@thermal_json_object('fan.all.set_speed')
+class SetAllFanSpeedAction(SetFanSpeedAction):
+    """
+    Action to set speed for all fans
+    """
+    def execute(self, thermal_info_dict):
+        """
+        Set speed for all fans
+        :param thermal_info_dict: A dictionary stores all thermal information.
+        :return:
+        """
+        SetAllFanSpeedAction.set_all_fan_speed(thermal_info_dict, self.speed)
+
+
+class LinearFanController():
+    """
+    Common Linear FAN Controller for B2F and F2B
+    """
+    def __init__(self, low_temp, high_temp, hyst_temp, low_pwm, high_pwm):
+        self._low_temp = low_temp
+        self._high_temp = high_temp
+        self._hyst_temp = hyst_temp
+        self._low_pwm = low_pwm
+        self._high_pwm = high_pwm
+        self._linear_slope = (high_pwm - low_pwm) / (high_temp - low_temp)
+        self._last_pwm = None
+
+    def calc_fan_speed(self, thermal_data):
+        temp = thermal_data.curr_temp
+        descend = thermal_data.temp_descend
+
+        low_temp = self._low_temp - self._hyst_temp if descend else self._low_temp
+        high_temp = self._high_temp - self._hyst_temp if descend else self._high_temp
+        if temp <= low_temp:
+            sonic_logger.log_debug("[LinearController] temp: {} equal or lower than low temp: {}, set to lowest pwm: {}".format(temp, low_temp, self._low_pwm))
+            self._last_pwm = self._low_pwm
+            return self._low_pwm
+        elif temp >= high_temp:
+            sonic_logger.log_debug("[LinearController] temp: {} equal or higher than high temp: {}, set to highest pwm: {}".format(temp, high_temp, self._high_pwm))
+            self._last_pwm = self._high_pwm
+            return self._high_pwm
+        else:
+            pwm = float(self._linear_slope * (temp - low_temp) + self._low_pwm)
+            if descend:
+                if self._last_pwm != None and pwm > self._last_pwm:
+                    pwm = self._last_pwm
+            else:
+                if self._last_pwm != None and pwm < self._last_pwm:
+                    pwm = self._last_pwm
+            self._last_pwm = pwm
+            sonic_logger.log_debug("[LinearController] temp: {}, slope: {}, low_temp: {}, low_pwm: {}, set to pwm: {}".format(temp, self._linear_slope, low_temp, self._low_pwm, pwm))
+            return pwm
+
+class PIDFanController():
+    """
+    Common FAN PID controller for CPU and BCM Temp
+    """
+    MAX_SPEED = 255
+    MIN_SPEED = 89
+    def __init__(self, setpoint, p_val, i_val, d_val):
+        self._setpoint = setpoint
+        self._p = p_val
+        self._i = i_val
+        self._d = d_val
+        self._curr_speed = self.MIN_SPEED
+
+    def calc_fan_speed(self, thermal_data):
+        hist2_temp = thermal_data.hist2_temp
+        hist1_temp = thermal_data.hist1_temp
+        temp = thermal_data.curr_temp
+
+        if hist2_temp == None or hist1_temp == None:
+            return round(self._curr_speed / 2.55)
+        speed = self._curr_speed + self._p * (temp - hist1_temp) \
+            + self._i * (temp - self._setpoint) + self._d * (temp - 2 * hist1_temp + hist2_temp)
+        if speed > self.MAX_SPEED:
+            speed = self.MAX_SPEED
+        elif speed < self.MIN_SPEED:
+            speed = self.MIN_SPEED
+        self._curr_speed = speed
+        speed_percent = float(speed / 2.55)
+        sonic_logger.log_debug("[PIDController] setpoint: {} p: {} i: {} d: {}, temp: {} hist_temp1: {} hist_temp2: {}, pwm: {}, percent: {}".format(self._setpoint, self._p, self._i, self._d, temp, hist1_temp, hist2_temp, speed, speed_percent))
+        return speed_percent
+
+
+@thermal_json_object('thermal.temp_check_and_fsc_algo_control')
+class ThermalAlgorithmAction(SetFanSpeedAction):
+    """
+    Action to check thermal sensor temperature change status and set speed for all fans
+    """
+    THERMAL_LOG_LEVEL = "thermal_log_level"
+    CPU_PID_PARAMS = "cpu_pid_params"
+    BCM_PID_PARAMS = "bcm_pid_params"
+    F2B_LINEAR_PARAMS = "f2b_linear_params"
+    B2F_LINEAR_PARAMS = "b2f_linear_params"
+
+    def __init__(self):
+        SetFanSpeedAction.__init__(self)
+        self.sys_airflow = None
+        self.cpu_pid_params = None
+        self.bcm_pid_params = None
+        self.f2b_linear_params = None
+        self.b2f_linear_params = None
+        self.cpu_fan_controller = None
+        self.bcm_fan_controller = None
+        self.linear_fan_controller = None
+
+    def load_from_json(self, json_obj):
+        """
+        Construct ThermalAlgorithmAction via JSON. JSON example:
+            {
+                "type": "thermal.temp_check_and_fsc_algo_control",
+                "cpu_pid_params": [82, 3, 0.5, 0.2],
+                "bcm_pid_params": [88, 4, 0.3, 0.4],
+                "f2b_linear_params": [34, 54, 3, 35, 100],
+                "b2f_linear_params": [28, 48, 3, 35, 100]
+            }
+        :param json_obj: A JSON object representing a ThermalAlgorithmAction action.
+        :return:
+        """
+        if self.THERMAL_LOG_LEVEL in json_obj:
+            thermal_log_level = json_obj[self.THERMAL_LOG_LEVEL]
+            if not isinstance(thermal_log_level, int) or thermal_log_level not in range(0,8):
+                raise ValueError('ThermalAlgorithmAction invalid thermal log level, a interger in range 0-7 is required')
+            sonic_logger.set_min_log_priority(thermal_log_level)
+        if self.CPU_PID_PARAMS in json_obj:
+            cpu_pid_params = json_obj[self.CPU_PID_PARAMS]
+            if not isinstance(cpu_pid_params, list) or len(cpu_pid_params) != 4:
+                raise ValueError('ThermalAlgorithmAction invalid SetPoint PID {} in JSON policy file, valid value should be [point, p, i, d]'.
+                                 format(cpu_pid_params))
+            self.cpu_pid_params = cpu_pid_params
+        else:
+            raise ValueError('ThermalAlgorithmAction missing mandatory field [setpoint, p, i, d] in JSON policy file')
+
+        if self.BCM_PID_PARAMS in json_obj:
+            bcm_pid_params = json_obj[self.BCM_PID_PARAMS]
+            if not isinstance(bcm_pid_params, list) or len(bcm_pid_params) != 4:
+                raise ValueError('ThermalAlgorithmAction invalid SetPoint PID {} in JSON policy file, valid value should be [point, p, i, d]'.
+                                 format(bcm_pid_params))
+            self.bcm_pid_params = bcm_pid_params
+        else:
+            raise ValueError('ThermalAlgorithmAction missing mandatory field [setpoint, p, i, d] in JSON policy file')
+
+        if self.F2B_LINEAR_PARAMS in json_obj:
+            f2b_linear_params = json_obj[self.F2B_LINEAR_PARAMS]
+            if not isinstance(f2b_linear_params, list) or len(f2b_linear_params) != 5:
+                raise ValueError('ThermalAlgorithmAction invalid SetPoint PID {} in JSON policy file, valid value should be [point, p, i, d]'.
+                                 format(f2b_linear_params))
+            self.f2b_linear_params = f2b_linear_params
+        else:
+            raise ValueError('ThermalAlgorithmAction missing mandatory field [low_temp, high_temp, hyst_temp, low_pwm, high_pwm] in JSON policy file')
+
+        if self.B2F_LINEAR_PARAMS in json_obj:
+            b2f_linear_params = json_obj[self.B2F_LINEAR_PARAMS]
+            if not isinstance(b2f_linear_params, list) or len(b2f_linear_params) != 5:
+                raise ValueError('ThermalAlgorithmAction invalid SetPoint PID {} in JSON policy file, valid value should be [point, p, i, d]'.
+                                 format(b2f_linear_params))
+            self.b2f_linear_params = b2f_linear_params
+        else:
+            raise ValueError('ThermalAlgorithmAction missing mandatory field [low_temp, high_temp, hyst_temp, low_pwm, high_pwm] in JSON policy file')
+
+        sonic_logger.log_info("[ThermalAlgorithmAction] cpu_pid: {}, bcm_pid: {}, f2b_linear: {}, b2f_linear: {}".format(self.cpu_pid_params, self.bcm_pid_params, self.f2b_linear_params, self.b2f_linear_params))
+
+    def execute(self, thermal_info_dict):
+        """
+        Check check thermal sensor temperature change status and set speed for all fans
+        :param thermal_info_dict: A dictionary stores all thermal information.
+        :return:
+        """
+        if self.sys_airflow == None:
+            from .thermal_infos import ChassisInfo
+            if ChassisInfo.INFO_NAME in thermal_info_dict:
+                chassis_info_obj = thermal_info_dict[ChassisInfo.INFO_NAME]
+                chassis = chassis_info_obj.get_chassis()
+                self.sys_airflow = chassis.get_system_airflow()
+
+        if self.cpu_fan_controller == None:
+            self.cpu_fan_controller = PIDFanController(self.cpu_pid_params[0], self.cpu_pid_params[1],
+                                                       self.cpu_pid_params[2], self.cpu_pid_params[3])
+        if self.bcm_fan_controller == None:
+            self.bcm_fan_controller = PIDFanController(self.bcm_pid_params[0], self.bcm_pid_params[1],
+                                                       self.bcm_pid_params[2], self.bcm_pid_params[3])
+        if self.linear_fan_controller == None:
+            if self.sys_airflow == 'INTAKE':
+                linear_params = self.b2f_linear_params
+            else:
+                linear_params = self.f2b_linear_params
+            self.linear_fan_controller = LinearFanController(linear_params[0], linear_params[1], linear_params[2], \
+                                                             linear_params[3], linear_params[4])
+
+        from .thermal_infos import ThermalInfo
+        if ThermalInfo.INFO_NAME in thermal_info_dict and \
+           isinstance(thermal_info_dict[ThermalInfo.INFO_NAME], ThermalInfo):
+
+            thermal_info_obj = thermal_info_dict[ThermalInfo.INFO_NAME]
+            thermals_data = thermal_info_obj.get_thermals_data()
+            cpu_thermal_data = thermals_data["CPU_Temp"]
+            cpu_fan_pwm = self.cpu_fan_controller.calc_fan_speed(cpu_thermal_data)
+            bcm_thermal_data = thermals_data["BCM_SW_Temp"]
+            bcm_fan_pwm = self.bcm_fan_controller.calc_fan_speed(bcm_thermal_data)
+            if self.sys_airflow == 'INTAKE':
+                thermal_data = thermals_data["Base_Temp_U5"]
+                linear_fan_pwm1 = self.linear_fan_controller.calc_fan_speed(thermal_data)
+                thermal_data = thermals_data["Base_Temp_U56"]
+                linear_fan_pwm2 = self.linear_fan_controller.calc_fan_speed(thermal_data)
+            else:
+                thermal_data = thermals_data["Switch_Temp_U28"]
+                linear_fan_pwm1 = self.linear_fan_controller.calc_fan_speed(thermal_data)
+                thermal_data = thermals_data["Switch_Temp_U29"]
+                linear_fan_pwm2 = self.linear_fan_controller.calc_fan_speed(thermal_data)
+            target_fan_pwm = max(cpu_fan_pwm, bcm_fan_pwm, linear_fan_pwm1, linear_fan_pwm2)
+            sonic_logger.log_info("[ThermalAlgorithmAction] cpu_pid_pwm: {}, bcm_pid_pwm: {}, linear_fan_pwm: {}, linear_fan_pwm2: {}, target_pwm: {}".format(cpu_fan_pwm, bcm_fan_pwm, linear_fan_pwm1, linear_fan_pwm2, target_fan_pwm))
+            SetAllFanSpeedAction.set_all_fan_speed(thermal_info_dict, round(target_fan_pwm))
+
+
+@thermal_json_object('switch.shutdown')
+class SwitchPolicyAction(ThermalPolicyActionBase):
+    """
+    Base class for thermal action. Once all thermal conditions in a thermal policy are matched,
+    all predefined thermal action will be executed.
+    """
+    def execute(self, thermal_info_dict):
+        """
+        Take action when thermal condition matches. For example, adjust speed of fan or shut
+        down the switch.
+        :param thermal_info_dict: A dictionary stores all thermal information.
+        :return:
+        """
+        sonic_logger.log_warning("Alarm for temperature critical is detected, shutdown Device")
+        # Wait for 30s then shutdown
+        import time
+        time.sleep(30)
+        # Power off COMe through CPLD
+        CPLD_POWRE_OFF_CMD = "echo 0xa120 0xfc > /sys/bus/platform/devices/baseboard/setreg"
+        api_helper = APIHelper()
+        api_helper.get_cmd_output(CPLD_POWER_OFF_CMD)
+
+
+@thermal_json_object('thermal_control.control')
+class ControlThermalAlgoAction(ThermalPolicyActionBase):
+    """
+    Action to control the thermal control algorithm
+    """
+    # JSON field definition
+    JSON_FIELD_STATUS = 'status'
+
+    def __init__(self):
+        self.status = True
+
+    def load_from_json(self, json_obj):
+        """
+        Construct ControlThermalAlgoAction via JSON. JSON example:
+            {
+                "type": "thermal_control.control"
+                "status": "true"
+            }
+        :param json_obj: A JSON object representing a ControlThermalAlgoAction action.
+        :return:
+        """
+        if ControlThermalAlgoAction.JSON_FIELD_STATUS in json_obj:
+            status_str = json_obj[ControlThermalAlgoAction.JSON_FIELD_STATUS].lower()
+            if status_str == 'true':
+                self.status = True
+            elif status_str == 'false':
+                self.status = False
+            else:
+                raise ValueError('Invalid {} field value, please specify true of false'.
+                                 format(ControlThermalAlgoAction.JSON_FIELD_STATUS))
+        else:
+            raise ValueError('ControlThermalAlgoAction '
+                             'missing mandatory field {} in JSON policy file'.
+                             format(ControlThermalAlgoAction.JSON_FIELD_STATUS))
+
+    def execute(self, thermal_info_dict):
+        """
+        Disable thermal control algorithm
+        :param thermal_info_dict: A dictionary stores all thermal information.
+        :return:
+        """
+        from .thermal_infos import ChassisInfo
+        if ChassisInfo.INFO_NAME in thermal_info_dict:
+            chassis_info_obj = thermal_info_dict[ChassisInfo.INFO_NAME]
+            chassis = chassis_info_obj.get_chassis()
+            thermal_manager = chassis.get_thermal_manager()
+            if self.status:
+                thermal_manager.start_thermal_control_algorithm()
+            else:
+                thermal_manager.stop_thermal_control_algorithm()
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_conditions.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_conditions.py
new file mode 100644
index 000000000000..c8bb51ef966c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_conditions.py
@@ -0,0 +1,121 @@
+from sonic_platform_base.sonic_thermal_control.thermal_condition_base import ThermalPolicyConditionBase
+from sonic_platform_base.sonic_thermal_control.thermal_json_object import thermal_json_object
+
+
+class FanCondition(ThermalPolicyConditionBase):
+    def get_fan_info(self, thermal_info_dict):
+        from .thermal_infos import FanInfo
+        if FanInfo.INFO_NAME in thermal_info_dict and isinstance(thermal_info_dict[FanInfo.INFO_NAME], FanInfo):
+            return thermal_info_dict[FanInfo.INFO_NAME]
+        else:
+            return None
+
+@thermal_json_object('fantray.any.absence')
+class AnyFantrayAbsenceCondition(FanCondition):
+    def is_match(self, thermal_info_dict):
+        fan_info_obj = self.get_fan_info(thermal_info_dict)
+        return len(fan_info_obj.get_absence_fantrays()) > 0 if fan_info_obj else False
+
+@thermal_json_object('fantray.all.absence')
+class AllFantrayAbsenceCondition(FanCondition):
+    def is_match(self, thermal_info_dict):
+        fan_info_obj = self.get_fan_info(thermal_info_dict)
+        return len(fan_info_obj.get_presence_fantrays()) == 0 if fan_info_obj else False
+
+@thermal_json_object('fantray.all.presence')
+class AllFantrayPresenceCondition(FanCondition):
+    def is_match(self, thermal_info_dict):
+        fan_info_obj = self.get_fan_info(thermal_info_dict)
+        return len(fan_info_obj.get_absence_fantrays()) == 0 if fan_info_obj else True
+
+@thermal_json_object('fan.rotor.more_than_one.failed')
+class FanRotorMoreThanOneFailedCondition(FanCondition):
+    def is_match(self, thermal_info_dict):
+        fan_info_obj = self.get_fan_info(thermal_info_dict)
+        return len(fan_info_obj.get_absence_fans()) > 1 if fan_info_obj else False
+
+@thermal_json_object('fan.rotor.less_than_two.failed')
+class FanRotorLessThanTwoFailedCondition(FanCondition):
+    def is_match(self, thermal_info_dict):
+        fan_info_obj = self.get_fan_info(thermal_info_dict)
+        return len(fan_info_obj.get_absence_fans()) < 2 if fan_info_obj else True
+
+class PsuCondition(ThermalPolicyConditionBase):
+    def get_psu_info(self, thermal_info_dict):
+        from .thermal_infos import PsuInfo
+        if PsuInfo.INFO_NAME in thermal_info_dict and isinstance(thermal_info_dict[PsuInfo.INFO_NAME], PsuInfo):
+            return thermal_info_dict[PsuInfo.INFO_NAME]
+        else:
+            return None
+
+@thermal_json_object('psu.any.absence')
+class AnyPsuAbsenceCondition(PsuCondition):
+    def is_match(self, thermal_info_dict):
+        psu_info_obj = self.get_psu_info(thermal_info_dict)
+        return len(psu_info_obj.get_absence_psus()) > 0 if psu_info_obj else False
+
+@thermal_json_object('psu.all.absence')
+class AllPsuAbsenceCondition(PsuCondition):
+    def is_match(self, thermal_info_dict):
+        psu_info_obj = self.get_psu_info(thermal_info_dict)
+        return len(psu_info_obj.get_presence_psus()) == 0 if psu_info_obj else False
+
+@thermal_json_object('psu.all.presence')
+class AllPsuPresenceCondition(PsuCondition):
+    def is_match(self, thermal_info_dict):
+        psu_info_obj = self.get_psu_info(thermal_info_dict)
+        return len(psu_info_obj.get_absence_psus()) == 0 if psu_info_obj else True
+
+
+class ThermalCondition(ThermalPolicyConditionBase):
+    def get_thermal_info(self, thermal_info_dict):
+        from .thermal_infos import ThermalInfo
+        if ThermalInfo.INFO_NAME in thermal_info_dict and isinstance(thermal_info_dict[ThermalInfo.INFO_NAME], ThermalInfo):
+            return thermal_info_dict[ThermalInfo.INFO_NAME]
+        else:
+            return None
+
+@thermal_json_object('thermal.over.high_critical_threshold')
+class ThermalOverHighCriticalCondition(ThermalCondition):
+    def is_match(self, thermal_info_dict):
+        thermal_info_obj = self.get_thermal_info(thermal_info_dict)
+        if thermal_info_obj:
+            return thermal_info_obj.is_any_over_high_critical_threshold()
+        else:
+            return False
+
+@thermal_json_object('thermal.any.over.high_threshold')
+class AnyThermalOverHighThresholdCondition(ThermalCondition):
+    def is_match(self, thermal_info_dict):
+        thermal_info_obj = self.get_thermal_info(thermal_info_dict)
+        if thermal_info_obj:
+            return thermal_info_obj.is_any_warm_up_and_over_high_threshold()
+        else:
+            return False
+
+@thermal_json_object('thermal.any.below.low_threshold')
+class AnyThermalBelowLowThresholdCondition(ThermalCondition):
+    def is_match(self, thermal_info_dict):
+        thermal_info_obj = self.get_thermal_info(thermal_info_dict)
+        if thermal_info_obj:
+            return thermal_info_obj.is_any_cool_down_and_below_low_threshold()
+        else:
+            return False
+
+@thermal_json_object('thermal.all.below.high_threshold')
+class AnyThermalOverHighThresholdCondition(ThermalCondition):
+    def is_match(self, thermal_info_dict):
+        thermal_info_obj = self.get_thermal_info(thermal_info_dict)
+        if thermal_info_obj:
+            return not thermal_info_obj.is_any_warm_up_and_over_high_threshold()
+        else:
+            return True
+
+@thermal_json_object('thermal.all.over.low_threshold')
+class AnyThermalBelowLowThresholdCondition(ThermalCondition):
+    def is_match(self, thermal_info_dict):
+        thermal_info_obj = self.get_thermal_info(thermal_info_dict)
+        if thermal_info_obj:
+            return not thermal_info_obj.is_any_cool_down_and_below_low_threshold()
+        else:
+            return True
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_infos.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_infos.py
new file mode 100644
index 000000000000..4925637f8cb3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_infos.py
@@ -0,0 +1,362 @@
+from sonic_platform_base.sonic_thermal_control.thermal_info_base import ThermalPolicyInfoBase
+from sonic_platform_base.sonic_thermal_control.thermal_json_object import thermal_json_object
+from sonic_py_common import logger
+
+sonic_logger = logger.Logger('thermal_infos')
+
+@thermal_json_object('fan_info')
+class FanInfo(ThermalPolicyInfoBase):
+    """
+    Fan information needed by thermal policy
+    """
+
+    # Fan information name
+    INFO_NAME = 'fan_info'
+    FAN_LOW_WARNING_SPEED = 1370
+    FAN_FRONT_HIGH_WARNING_SPEED = 29125
+    FAN_REAR_HIGH_WARNING_SPEED = 25375
+
+    def __init__(self):
+        self._all_fans = set()
+        self._absence_fans = set()
+        self._presence_fans = set()
+        self._absence_fantrays = set()
+        self._presence_fantrays = set()
+        self._low_warning_fans = set()
+        self._high_warning_fans = set()
+        self._status_changed = False
+
+    def collect(self, chassis):
+        """
+        Collect absence and presence fans.
+        :param chassis: The chassis object
+        :return:
+        """
+        self._status_changed = False
+        try:
+            for fantray in chassis.get_all_fan_drawers():
+                if fantray.get_presence() and fantray not in self._presence_fantrays:
+                    self._presence_fantrays.add(fantray)
+                    self._status_changed = True
+                    if fantray in self._absence_fantrays:
+                        self._absence_fantrays.remove(fantray)
+                elif not fantray.get_presence() and fantray not in self._absence_fantrays:
+                    self._absence_fantrays.add(fantray)
+                    self._status_changed = True
+                    if fantray in self._presence_fantrays:
+                        self._presence_fantrays.remove(fantray)
+
+                for fan in fantray.get_all_fans():
+                    if fan.get_presence() and fantray not in self._presence_fans:
+                        self._presence_fans.add(fan)
+                        self._status_changed = True
+                        if fan in self._absence_fans:
+                            self._absence_fans.remove(fan)
+                    elif not fan.get_presence() and fan not in self._absence_fans:
+                        self._absence_fans.add(fan)
+                        self._status_changed = True
+                        if fan in self._presence_fans:
+                            self._presence_fans.remove(fan)
+
+                    fan_name = fan.get_name()
+                    fan_rpm = fan.get_speed_rpm()
+                    if fan not in self._all_fans:
+                        self._all_fans.add(fan)
+                    # FAN Low speed warning
+                    if fan_rpm < self.FAN_LOW_WARNING_SPEED and fan not in self._low_warning_fans:
+                        self._low_warning_fans.add(fan)
+                        sonic_logger.log_warning("FAN {} speed {}, low speed warning".format(fan_name, fan_rpm))
+                    elif fan_rpm > self.FAN_LOW_WARNING_SPEED and fan in self._low_warning_fans:
+                        sonic_logger.log_notice("FAN {}, restore from low speed warning".format(fan_name))
+                        self._low_warning_fans.remove(fan)
+                    # FAN high speed warning
+                    if fan.fan_index == 1:
+                        if fan_rpm > self.FAN_FRONT_HIGH_WARNING_SPEED and fan not in self._high_warning_fans:
+                            self._high_warning_fans.add(fan)
+                            sonic_logger.log_warning("FAN {} speed {}, high speed warning".format(fan_name, fan_rpm))
+                        elif fan_rpm > self.FAN_FRONT_HIGH_WARNING_SPEED and fan in self._high_warning_fans:
+                            self._high_warning_fans.remove(fan)
+                            sonic_logger.log_notice("FAN {}, restore from high speed warning".format(fan_name))
+                    else:
+                        if fan_rpm > self.FAN_REAR_HIGH_WARNING_SPEED and fan not in self._high_warning_fans:
+                            self._high_warning_fans.add(fan)
+                            sonic_logger.log_warning("FAN {} speed {}, high speed warning".format(fan_name, fan_rpm))
+                        elif fan_rpm > self.FAN_REAR_HIGH_WARNING_SPEED and fan in self._high_warning_fans:
+                            self._high_warning_fans.remove(fan)
+                            sonic_logger.log_notice("FAN {}, restore from high speed warning".format(fan_name))
+        except Exception as e:
+            sonic_logger.log_warning("Catch exception: {}, File: {}, Line: {}".format(type(e).__name__, __file__, e.__traceback__.tb_lineno))
+
+    def get_all_fans(self):
+        """
+        Retrieves all fans
+        :return: A set of fans
+        """
+        return self._all_fans
+
+    def get_absence_fantrays(self):
+        """
+        Retrieves absence fans
+        :return: A set of absence fantrays
+        """
+        return self._absence_fantrays
+
+    def get_presence_fantrays(self):
+        """
+        Retrieves presence fans
+        :return: A set of presence fantrays
+        """
+        return self._presence_fantrays
+
+    def get_absence_fans(self):
+        """
+        Retrieves absence fans
+        :return: A set of absence fans
+        """
+        return self._absence_fans
+
+    def get_presence_fans(self):
+        """
+        Retrieves presence fans
+        :return: A set of presence fans
+        """
+        return self._presence_fans
+
+    def get_low_warning_fans(self):
+        """
+        Retrieves low rpm warning fans
+        :return: A set of low rpm warning fans
+        """
+        return self._low_warning_fans
+
+    def get_high_warning_fans(self):
+        """
+        Retrieves high rpm warning fans
+        :return: A set of high rpm warning fans
+        """
+        return self._high_warning_fans
+
+    def is_status_changed(self):
+        """
+        Retrieves if the status of fan information changed
+        :return: True if status changed else False
+        """
+        return self._status_changed
+
+
+@thermal_json_object('psu_info')
+class PsuInfo(ThermalPolicyInfoBase):
+    """
+    PSU information needed by thermal policy
+    """
+    INFO_NAME = 'psu_info'
+    PSU_TEMP_HIGH_WARNING_THRESHOLD = 65
+
+    def __init__(self):
+        self._absence_psus = set()
+        self._presence_psus = set()
+        self._high_warning_psus = set()
+        self._status_changed = False
+
+    def collect(self, chassis):
+        """
+        Collect absence and presence PSUs.
+        :param chassis: The chassis object
+        :return:
+        """
+        self._status_changed = False
+        try:
+            for psu in chassis.get_all_psus():
+                if psu.get_presence() and psu not in self._presence_psus:
+                    self._presence_psus.add(psu)
+                    self._status_changed = True
+                    if psu in self._absence_psus:
+                        self._absence_psus.remove(psu)
+                elif (not psu.get_presence()) and psu not in self._absence_psus:
+                    self._absence_psus.add(psu)
+                    self._status_changed = True
+                    if psu in self._presence_psus:
+                        self._presence_psus.remove(psu)
+                # PSU Temp high warning
+                psu_name = psu.get_name()
+                psu_temp = psu.get_temperature()
+                if psu_temp != None and psu_temp != 'N/A':
+                    if psu_temp > self.PSU_TEMP_HIGH_WARNING_THRESHOLD and psu not in self._high_warning_psus:
+                        self._high_warning_psus.add(psu)
+                        sonic_logger.log_warning("PSU {} temp {}, high temperature warning".format(psu_name, psu_temp))
+                    elif psu_temp < self.PSU_TEMP_HIGH_WARNING_THRESHOLD and psu in self._high_warning_psus:
+                        self._high_warning_psus.remove(psu)
+                        sonic_logger.log_notice("PSU {} restore from high temperature warning".format(psu_name))
+        except Exception as e:
+            sonic_logger.log_warning("Catch exception: {}, File: {}, Line: {}".format(type(e).__name__, __file__, e.__traceback__.tb_lineno))
+
+    def get_absence_psus(self):
+        """
+        Retrieves presence PSUs
+        :return: A set of absence PSUs
+        """
+        return self._absence_psus
+
+    def get_presence_psus(self):
+        """
+        Retrieves presence PSUs
+        :return: A set of presence fans
+        """
+        return self._presence_psus
+
+    def get_high_warning_psus(self):
+        """
+        Retrieves high temperature warning PSUs
+        :return: A set of high temp fans
+        """
+        return self._high_warning_psus
+
+    def is_status_changed(self):
+        """
+        Retrieves if the status of PSU information changed
+        :return: True if status changed else False
+        """
+        return self._status_changed
+
+
+class ThermalData():
+    def __init__(self, name):
+        self.name = name
+        self.hist2_temp = None
+        self.hist1_temp = None
+        self.curr_temp = None
+        self.temp_descend = False
+
+    def update_temp(self, temp):
+        self.hist2_temp = self.hist1_temp
+        self.hist1_temp = self.curr_temp
+        self.curr_temp = temp
+        return self
+
+    def update_temp_trend(self):
+        if self.hist1_temp == None:
+            self.temp_descend = False
+        elif self.curr_temp < self.hist1_temp:
+            self.temp_descend = True
+        else:
+            self.temp_descend = False
+        return self
+
+@thermal_json_object('thermal_info')
+class ThermalInfo(ThermalPolicyInfoBase):
+    """
+    Thermal information needed by thermal policy
+    """
+
+    # Fan information name
+    INFO_NAME = 'thermal_info'
+    THERMAL_SHUTDOWN_TEMP_MAP = {"CPU_Temp": 93, "BCM_SW_Temp": 120}
+
+    def __init__(self):
+        self.init = False
+        self._high_warning_thermals = set()
+        self._low_warning_thermals = set()
+        self._high_shutdown_thermals = set()
+        self._thermals_data = {}
+
+    def collect(self, chassis):
+        """
+        Collect thermal sensor temperature change status
+        :param chassis: The chassis object
+        :return:
+        """
+        try:
+            for thermal in chassis.get_all_thermals():
+                name = thermal.get_name()
+                temp = thermal.get_temperature()
+                if temp == None or temp == 'N/A':
+                    continue
+                high_threshold = thermal.get_high_threshold()
+                low_threshold = thermal.get_low_threshold()
+                thermal_shutdown = self.THERMAL_SHUTDOWN_TEMP_MAP.get(name, None)
+
+                # Collect thermal data
+                thermal_data = self._thermals_data.get(name, None)
+                if thermal_data == None:
+                    thermal_data = ThermalData(name)
+                    self._thermals_data[name] = thermal_data
+                thermal_data.update_temp(temp).update_temp_trend()
+
+                # Handle high threshold condition
+                if high_threshold != None and high_threshold != 'N/A':
+                    if temp > high_threshold and thermal not in self._high_warning_thermals:
+                        self._high_warning_thermals.add(thermal)
+                        sonic_logger.log_warning("Thermal {} temp {}, high threshold warning".format(name, temp))
+                        if thermal_shutdown != None and temp > thermal_shutdown:
+                            self._high_shutdown_thermals.add(thermal)
+                            sonic_logger.log_warning("Thermal {} temp {}, high temp shutdown warning".format(name, temp))
+                    elif temp < (high_threshold - 3) and thermal in self._high_warning_thermals:
+                        self._high_warning_thermals.remove(thermal)
+                        sonic_logger.log_notice("Thermal {}, restore from high threshold warning".format(name))
+                        if thermal in self._high_shutdown_thermals:
+                            self._high_shutdown_thermals.remove(thermal)
+
+                # Handle low threshold condition
+                if low_threshold != None and low_threshold != 'N/A':
+                    if temp < low_threshold and thermal not in self._low_warning_thermals:
+                        self._low_warning_thermals.add(thermal)
+                        sonic_logger.log_warning("Thermal {} temp {}, low threshold warning".format(name, temp))
+                    elif temp > (low_threshold + 3) and thermal in self._low_warning_thermals:
+                        self._low_warning_thermals.remove(thermal)
+                        sonic_logger.log_notice("Thermal {}, restore from low threshold warning".format(name))
+        except Exception as e:
+            sonic_logger.log_warning("Catch exception: {}, File: {}, Line: {}".format(type(e).__name__, __file__, e.__traceback__.tb_lineno))
+
+    def is_any_warm_up_and_over_high_threshold(self):
+        """
+        Retrieves if the temperature is warm up and over high threshold
+        :return: True if the temperature is warm up and over high threshold else False
+        """
+        return len(self._high_warning_thermals) > 0
+
+    def is_any_cool_down_and_below_low_threshold(self):
+        """
+        Retrieves if the temperature is cold down and below low threshold
+        :return: True if the temperature is cold down and below low threshold else False
+        """
+        return len(self._low_warning_thermals) > 0
+
+    def is_any_over_high_critical_threshold(self):
+        """
+        Retrieves if the temperature is over high critical threshold
+        :return: True if the temperature is over high critical threshold else False
+        """
+        return len(self._high_shutdown_thermals) > 0
+
+    def get_thermals_data(self):
+        """
+        Retrieves all the thermal data
+        :return: thermal data dict using thermal name as key
+        """
+        return self._thermals_data
+
+
+@thermal_json_object('chassis_info')
+class ChassisInfo(ThermalPolicyInfoBase):
+    """
+    Chassis information needed by thermal policy
+    """
+    INFO_NAME = 'chassis_info'
+
+    def __init__(self):
+        self._chassis = None
+
+    def collect(self, chassis):
+        """
+        Collect platform chassis.
+        :param chassis: The chassis object
+        :return:
+        """
+        self._chassis = chassis
+
+    def get_chassis(self):
+        """
+        Retrieves platform chassis object
+        :return: A platform chassis object.
+        """
+        return self._chassis
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_manager.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_manager.py
new file mode 100644
index 000000000000..fb9557270f05
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/thermal_manager.py
@@ -0,0 +1,21 @@
+from sonic_platform_base.sonic_thermal_control.thermal_manager_base import ThermalManagerBase
+from .thermal_infos import *
+from .thermal_conditions import *
+from .thermal_actions import *
+
+class ThermalManager(ThermalManagerBase):
+    @classmethod
+    def initialize(cls):
+        """
+        Initialize thermal manager, including register thermal condition types and thermal action types
+        and any other vendor specific initialization.
+        """
+        return True
+
+    @classmethod
+    def deinitialize(cls):
+        """
+        Destroy thermal manager, including any vendor specific cleanup.
+        :return:
+        """
+        return True
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/watchdog.py
new file mode 100644
index 000000000000..90b5ee352c08
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform/watchdog.py
@@ -0,0 +1,14 @@
+try:
+    from sonic_platform_pddf_base.pddf_watchdog import PddfWatchdog
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+
+class Watchdog(PddfWatchdog):
+    """PDDF Platform-Specific Watchdog Class"""
+
+    def __init__(self):
+        PddfWatchdog.__init__(self)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform_setup.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform_setup.py
new file mode 100644
index 000000000000..a1535165bb66
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/pddf/sonic_platform_setup.py
@@ -0,0 +1,28 @@
+import os
+import sys
+from setuptools import setup
+os.listdir
+
+setup(
+    name='sonic-platform',
+    version='1.0',
+    description='SONiC platform API implementation on Celestica Platforms based on PDDF',
+    license='Apache 2.0',
+    author='SONiC Team',
+    author_email='linuxnetdev@microsoft.com',
+    url='https://github.com/Azure/sonic-buildimage',
+    packages=['sonic_platform'],
+    classifiers=[
+        'Development Status :: 3 - Alpha',
+        'Environment :: Plugins',
+        'Intended Audience :: Developers',
+        'Intended Audience :: Information Technology',
+        'Intended Audience :: System Administrators',
+        'License :: OSI Approved :: Apache Software License',
+        'Natural Language :: English',
+        'Operating System :: POSIX :: Linux',
+        'Programming Language :: Python :: 3.7',
+        'Topic :: Utilities',
+    ],
+    keywords='sonic SONiC platform PLATFORM',
+)
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/ds3000_platform_shutdown.sh b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/ds3000_platform_shutdown.sh
new file mode 100755
index 000000000000..89c53b2ccb7c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/ds3000_platform_shutdown.sh
@@ -0,0 +1,39 @@
+#!/bin/bash
+REBOOT_CAUSE_DIR="/host/reboot-cause"
+HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt"
+REBOOT_TIME=$(date)
+
+if [ $# -ne 1 ]; then
+    echo "Require reboot type"
+    exit 1
+fi
+
+if [ ! -d "$REBOOT_CAUSE_DIR" ]; then
+    mkdir $REBOOT_CAUSE_DIR
+fi
+
+echo "Reason:$1,Time:${REBOOT_TIME}" > ${HW_REBOOT_CAUSE_FILE}
+
+# Best effort to write buffered data onto the disk
+sync ; sync ; sync ; sleep 3
+
+bmc_present=`cat /sys/bus/platform/devices/baseboard/bmc_presence`
+
+if [[ "$bmc_present" == "present" ]]; then
+    # Set all LEDs to BMC's control
+    ipmitool raw 0x3a 0x42 0x02 0x01 &> /dev/null
+
+    # BMC cold power-cyle
+    ipmitool chassis power cycle &> /dev/null
+else
+    # Set System LED to booting pattern
+    i2cset -f -y 100 0x0d 0x62 0x02 &> /dev/null
+
+    # CPLD cold power-cyle
+    i2cset -f -y 100 0x0d 0x64 0x00 &> /dev/null
+fi
+
+# System should reboot by now and avoid the script returning to caller
+sleep 10
+
+exit 0
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pddf_post_device_create.sh
new file mode 100755
index 000000000000..95e4def3f903
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pddf_post_device_create.sh
@@ -0,0 +1,37 @@
+#!/bin/bash
+
+declare -r CPLD_SETREG="/sys/bus/platform/devices/baseboard/setreg"
+declare -r CPLD_GETREG="/sys/bus/platform/devices/baseboard/getreg"
+
+# Load fpga extend driver after fpga device created
+modprobe pddf_custom_fpga_extend
+
+# attach ucd90120 devices, bus 107, devices 0x34 and 0x35
+echo "ucd90120 0x34" > /sys/bus/i2c/devices/i2c-107/new_device
+echo "ucd90120 0x35" > /sys/bus/i2c/devices/i2c-107/new_device
+
+# attach mp2975 devices, bus 108, devices 0x70 and 0x7a
+echo "mp2975 0x70" > /sys/bus/i2c/devices/i2c-108/new_device
+echo "mp2975 0x7a" > /sys/bus/i2c/devices/i2c-108/new_device
+
+# Set SYS_LED to Green, assuming everything came up fine.
+echo "0xa162 0xdc" > ${CPLD_SETREG}
+
+# Disable CPLD thermal shutdown by default
+echo "0xa175 0x0" > ${CPLD_SETREG}
+
+BMC_PRESENCE_SYS_PATH="/sys/bus/platform/devices/baseboard/bmc_presence"
+BMC_PRESENCE=`cat ${BMC_PRESENCE_SYS_PATH}`
+
+#Set off Alarm LED
+if [ ${BMC_PRESENCE} == "present" ]; then
+   # Set all LEDs to Manual control
+   ipmitool raw 0x3a 0x42 0x02 0x00 &> /dev/null
+   # Set Alarm LED to OFF
+   ipmitool raw 0x3a 0x39 0x02 0x01 0x00 &> /dev/null
+
+   #Set CPLD Fan LED register to BMC control
+   ipmitool raw 0x3a 0x64 0x00 0x02 0x65 0x10 &> /dev/null
+else
+   i2cset -f -y 100 0x0d 0x63 0x33 &> /dev/null
+fi
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pddf_pre_driver_install.sh
new file mode 100755
index 000000000000..29bc603d447c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pddf_pre_driver_install.sh
@@ -0,0 +1,11 @@
+#!/bin/bash
+
+# Has customized those drivers,so rename them to lose effect
+psu_driver=pddf_psu_driver_module.ko
+ker_name=$(uname -r)
+driver_path=/usr/lib/modules/${ker_name}/extra/
+if [ -e ${driver_path}${psu_driver} ]; then
+    mv ${driver_path}${psu_driver} ${driver_path}${psu_driver}-bk
+fi
+
+echo 'pddf psu driver module has rename now'
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/platform_sensors.py
new file mode 100644
index 000000000000..8cab9ee29554
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/platform_sensors.py
@@ -0,0 +1,179 @@
+#!/usr/bin/python
+#
+# Silverstone-v2 platform sensors. This script get the sensor data from BMC 
+# using ipmitool and display them in lm-sensor alike format.
+#
+# The following data is support:
+#  1. Temperature sensors
+#  2. PSUs
+#  3. Fan Drawers
+
+import sys
+import logging
+import subprocess
+
+IPMI_SDR_CMD = ['/usr/bin/ipmitool', 'sdr', 'elist']
+MAX_NUM_FANS = 4
+MAX_NUM_PSUS = 2
+
+SENSOR_NAME = 0
+SENSOR_VAL = 4
+
+sensor_dict = {}
+
+def ipmi_sensor_dump(cmd):
+    ''' Execute ipmitool command return dump output
+        exit if any error occur.
+    '''
+    global sensor_dict
+    sensor_dump = ''
+
+    try:
+        sensor_dump = subprocess.check_output(IPMI_SDR_CMD, universal_newlines=True)
+    except subprocess.CalledProcessError as e:
+        logging.error('Error! Failed to execute: {}'.format(cmd))
+        sys.exit(1)
+
+    for line in sensor_dump.splitlines():
+        sensor_info = line.split('|')
+        sensor_dict[sensor_info[SENSOR_NAME].strip()] = sensor_info[SENSOR_VAL].strip()
+
+    return True
+
+def get_reading_by_name(sensor_name, sdr_elist_dump):
+    '''
+        Search for the match sensor name, return sensor
+        reading value and unit, return object epmtry string 
+        if search not match.
+
+        The output of sensor dump:
+        TEMP_FB_U52      | 00h | ok  |  7.1 | 31 degrees C
+        TEMP_FB_U17      | 01h | ok  |  7.1 | 27 degrees C
+        TEMP_SW_U52      | 02h | ok  |  7.1 | 30 degrees C
+        Fan2_Status      | 07h | ok  | 29.2 | Present
+        Fan2_Front       | 0Eh | ok  | 29.2 | 12000 RPM
+        Fan2_Rear        | 46h | ok  | 29.2 | 14700 RPM
+        PSU2_Status      | 39h | ok  | 10.2 | Presence detected
+        PSU2_Fan         | 3Dh | ok  | 10.2 | 16000 RPM
+        PSU2_VIn         | 3Ah | ok  | 10.2 | 234.30 Volts
+        PSU2_CIn         | 3Bh | ok  | 10.2 | 0.80 Amps
+    '''
+    found = ''
+
+    for line in sdr_elist_dump.splitlines():
+        line = line.decode()
+        if sensor_name in line:
+            found = line.strip()
+            break
+
+    if not found:
+        logging.error('Cannot find sensor name:' + sensor_name)
+
+    else:
+        try:
+            found = found.split('|')[4]
+        except IndexError:
+            logging.error('Cannot get sensor data of:' + sensor_name)
+
+    logging.basicConfig(level=logging.DEBUG)
+    return found
+
+
+def read_temperature_sensors():
+    sensor_list = [\
+        ('Base_Temp_U5',     'Baseboard Left Temp'),\
+        ('Base_Temp_U56',    'Baseboard Right Temp'),\
+        ('Switch_Temp_U28',  'Switchboard Left Temp'),\
+        ('Switch_Temp_U29',  'Switchboard Right Temp'),\
+        ('CPU_Temp',         'CPU Internal Temp'),\
+        ('Switch_Temp_U17',  'ASIC External Front Temp'),\
+        ('Switch_Temp_U18',  'ASIC External Rear Temp'),\
+        ('TEMP_SW_Internal', 'ASIC Internal Temp'),\
+        ('VDD_ANLG_Temp',    'MP2975 VDD ANLG Temp'),\
+        ('VDD_CORE_Temp',    'MP2975 VDD CORE Temp')\
+    ]
+
+    output = ''
+    sensor_format = '{0:{width}}{1}\n'
+    # Find max length of sensor calling name
+    max_name_width = max(len(sensor[1]) for sensor in sensor_list)
+
+    output += "Temperature Sensors\n"
+    output += "Adapter: IPMI adapter\n"
+    for sensor in sensor_list:
+        output += sensor_format.format('{}:'.format(sensor[1]),\
+                                       sensor_dict[sensor[0]],\
+                                       width=str(max_name_width+1))
+    output += '\n'
+    return output
+
+def read_fan_sensors(num_fans):
+
+    sensor_list = [\
+        ('Fan{}_Status', 'Fan Drawer {} Status'),\
+        ('Fan{}_Front',  'Fan {} front'),\
+        ('Fan{}_Rear',   'Fan {} rear'),\
+    ]
+
+    output = ''
+    sensor_format = '{0:{width}}{1}\n'
+    # Find max length of sensor calling name
+    max_name_width = max(len(sensor[1]) for sensor in sensor_list)
+
+    output += "Fan Drawers\n"
+    output += "Adapter: IPMI adapter\n"
+    for fan_num in range(1, num_fans+1):
+        for sensor in sensor_list:
+            ipmi_sensor_name = sensor[0].format(fan_num)
+            display_sensor_name = sensor[1].format(fan_num)
+            output += sensor_format.format('{}:'.format(display_sensor_name),\
+                                           sensor_dict[ipmi_sensor_name],\
+                                           width=str(max_name_width+1))
+    output += '\n'
+    return output
+
+def read_psu_sensors(num_psus):
+
+    sensor_list = [\
+        ('PSU{}_Status', 'PSU {} Status'),\
+        ('PSU{}_Fan',    'PSU {} Fan 1'),\
+        ('PSU{}_VIn',    'PSU {} Input Voltage'),\
+        ('PSU{}_CIn',    'PSU {} Input Current'),\
+        ('PSU{}_PIn',    'PSU {} Input Power'),\
+        ('PSU{}_Temp1',  'PSU {} Temp1'),\
+        ('PSU{}_Temp2',  'PSU {} Temp2'),\
+        ('PSU{}_VOut',   'PSU {} Output Voltage'),\
+        ('PSU{}_COut',   'PSU {} Output Current'),\
+        ('PSU{}_POut',   'PSU {} Output Power'),\
+    ]
+
+    output = ''
+    sensor_format = '{0:{width}}{1}\n'
+    # Find max length of sensor calling name
+    max_name_width = max(len(sensor[1]) for sensor in sensor_list)
+
+    output += "PSU\n"
+    output += "Adapter: IPMI adapter\n"
+    for psu_num in range(1, num_psus+1):
+        for sensor in sensor_list:
+            ipmi_sensor_name = sensor[0].format(psu_num)
+            display_sensor_name = sensor[1].format(psu_num)
+            output += sensor_format.format('{}:'.format(display_sensor_name),\
+                                           sensor_dict[ipmi_sensor_name],\
+                                           width=str(max_name_width+1))
+    output += '\n'
+    return output
+
+def main():
+    output_string = ''
+
+    if ipmi_sensor_dump(IPMI_SDR_CMD):
+        output_string += read_temperature_sensors()
+        output_string += read_psu_sensors(MAX_NUM_PSUS)
+        output_string += read_fan_sensors(MAX_NUM_FANS)
+
+        print(output_string)
+
+
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pre_pddf_init.sh b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pre_pddf_init.sh
new file mode 100755
index 000000000000..2556858cdab9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/pre_pddf_init.sh
@@ -0,0 +1,30 @@
+#!/bin/bash
+
+# Probe Baseboard CPLD driver
+modprobe baseboard_cpld
+sleep 1
+
+# Get BMC mode
+PLATFORM=`sed -n 's/onie_platform=\(.*\)/\1/p' /host/machine.conf`
+BMC_PRESENCE_SYS_PATH="/sys/bus/platform/devices/baseboard/bmc_presence"
+BMC_PRESENCE=`cat ${BMC_PRESENCE_SYS_PATH}`
+echo "Platform ${PLATFORM} BMC card ${BMC_PRESENCE}"
+
+# Copy pddf-device.json according to bmc mode
+PDDF_JSON="pddf-device.json"
+PDDF_JSON_BMC="pddf-device-bmc.json"
+PDDF_JSON_NONBMC="pddf-device-nonbmc.json"
+PDDF_JSON_PATH="/usr/share/sonic/device/${PLATFORM}/pddf"
+PLATFORM_COMPONENTS_FILE="/usr/share/sonic/device/${PLATFORM}/platform_components.json"
+if [ ${BMC_PRESENCE} == "present" ]; then
+    cp ${PDDF_JSON_PATH}/${PDDF_JSON_BMC} ${PDDF_JSON_PATH}/${PDDF_JSON}
+    # Add BMC component if BMC exists
+    if ! grep -q "BMC" ${PLATFORM_COMPONENTS_FILE}; then
+        sed -i '6i \                "BMC": {},' ${PLATFORM_COMPONENTS_FILE}
+    fi
+else
+    # BMC Card absent
+    cp ${PDDF_JSON_PATH}/${PDDF_JSON_NONBMC} ${PDDF_JSON_PATH}/${PDDF_JSON}
+    # Remove BMC component for NonBMC
+    sed -i '/"BMC"/d' ${PLATFORM_COMPONENTS_FILE}
+fi
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/sensors b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/sensors
new file mode 100644
index 000000000000..5d740a9eb7d7
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/scripts/sensors
@@ -0,0 +1,11 @@
+#!/bin/bash
+
+DOCKER_EXEC_FLAGS="i"
+
+# Determine whether stdout is on a terminal
+if [ -t 1 ] ; then
+    DOCKER_EXEC_FLAGS+="t"
+fi
+
+docker exec -$DOCKER_EXEC_FLAGS pmon sensors "$@"
+docker exec -$DOCKER_EXEC_FLAGS pmon python3 /usr/bin/platform_sensors.py "$@"
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/systemd/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-cel/ds3000/systemd/pddf-platform-init.service
new file mode 100644
index 000000000000..f4098b34b60e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/systemd/pddf-platform-init.service
@@ -0,0 +1,16 @@
+[Unit]
+Description=PDDF module and device initialization service
+Before=pmon.service watchdog-control.service
+Before=opennsl-modules.service
+DefaultDependencies=no
+
+[Service]
+Type=oneshot
+ExecStartPre=-/usr/local/bin/pre_pddf_init.sh
+ExecStart=/usr/local/bin/pddf_util.py install
+ExecStop=/usr/local/bin/pddf_util.py clean
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
+WantedBy=opennsl-modules.service
diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/afulnx_64 b/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/afulnx_64
new file mode 100755
index 0000000000000000000000000000000000000000..0ba1549c2891bac2e3c6aa385c5c2182c5319826
GIT binary patch
literal 1134256
zcmd3P3w%_?_5TgzLWJN(Of+DCRig$C8Wc5PkQE~?h!_<sf|_7Rc*rA?4a66(gvz>N
z<D-hNiuHwB6(0peg#eo1qZ+}s*lLZ>?z-0EJ5@CQ@Au5y-Pzq-w7>p;{r|&<z2}@c
zb7tnunVB<>J9qJE<HvMMOS7E6Zq~^bv9iHFA*o->$~ta8!TIB}imiR{JJ1?n^#E=Q
zjUf#4B|JN{Xy=(Bp_bJh&vg7R?xqOE-FyN#&pbu8oTrmRKAB$p&!<84eDv-t!JVgN
zc?D-Y=5@xSDtyMHH9~iu;RZpiviF!X{(0q>*<-xi$5g!B$5cG$*-pXubDmE5ST_Ej
zsLMC8n-3UqA0Jk!{KlW;<zLxHfoX&T9*^Jw&sho2uPzkSa-L4Svk{N^{JDRsG?sOa
zPR~s*t91UIr!KB_%<P$$oG|Q|+0%y1o;kO!en@@s2}4d8c69B$qmPwxQ$Bf5pKzXJ
zDW*qY%yTyWQ_~E8_TjHG?+f4D^W6R)uRZSC^y=;RzE{AotMQ*Qq+ADEmNzY{J86sX
ze=+_K9&laW@GnAnneX2}`|`1ut^>*SZx%Apw~Np#T<F7*fv)&-UFhGs(0@RhUCHsG
zU|rFBKsjB}4|d^S<C5-YF7&5d%6py*f4U2u71UKek8>$6?ZJ!x$$x`D@Fo+1PjD%3
zz$O2`N1U$mbCV1IH7@cWaG}5ALSO7cuX54PU>E*2mwX=N!oSl+{?{&Ydb#k|yU4%a
zg+9_nzQ@IGd%Ez?a>>uvF7yXo=s&v9k8sJ);V$`k#HGB2E^>S>>HfpT4*%wo?yp?<
zf9H~)`7Y_6>%yPrlI~C!{%c(LKXak~)`fn$OFqwW;s3J>eY*>Nkc<4wUFdyX%6p3o
z{}V3skuLTy&LyAIT;vRMk#m8IoC{s@|Ei1pr(O6LxY*kS7db;*^3&Tze%OWnjEnq5
zF7)9pa+bK{XOIhhKNtC5xyV1=ML$ov$p5<weT<9zw_NB&F8Tb(g?^xm{S0%-PqT}h
zdtJ&q$0eW7xX8cAMgD3R`du#a-*cgV<07ZQg?_OMo!)y_e!`nB^sO%WdCrC2?4qAX
zT<Cc&a;|rw|I>xu$3_0XT=;Kwp|`lu_qgaM-G#r^MgJ>Z=yxFh`&kEBO+zn3N|xo!
zqkhozB}w#i!E-S9D>U89NcfwA|5CpNKBDnI%vWjy(<+ZTigT0`tn%{dbLP!0uMJF{
zA1E)k%Ev7zKc{N?%-TTJ{8ML7t*x!91xsc9)bi<dQ|C`BpIUiY-OTw_niiNbf8Ii?
zeDcJxWoO`7KE1xayryb??Yy~DXU_~=UcR6RfpZtm(d<)a&z@H~HBePvRbN?E6PP(~
zZi4LjRkN$6);h9vdY8<bAApc)v&$A($od?WYe3U0E6Zz%4YkV8o4au4+-b;oZQYzI
zvQ;{TtFM_}ehGxmor-{kbE@XlRt2o;>e+R*GpyRc{K}fkt-!p6v*#_Wnr~IltErl6
zEv&4aOEN;|R?ey6bAIKF`J^N7R&}6i_G}dhrkc7ytu+S<orho)25PLlw7hc0rRCLA
zXU<k}YO5%wZZ77Bmoh@-jH&ajT9maiV9l&uSTld-+<-Ob(rGj2Tl1?#MHUn^Ghi*K
zm9T2$P-U=2GKdUS2WFx;<>jm&RGXwVv$nQoYGsvGJ-sThu$DOt%)8W@GiPdzRb4f&
z8cC^?7+xt{V5*!^HLV;fnOa>vb1rJks#F<3?Ab~eEc(pa`e`$#BS*>-P=m}K<w#Ki
z^TCd=s`>Nh&MTKHX4M8NDL8<j>e{NRORdToEF!9a>Okb0sne@!XI@c-;?>o_YLMk=
z^XdXR=jDnOI<BsqJr7nv{j2H#|7>f4*3Fz)hFLpQV9nIP3;=WHEvT|;QD<{m_UZGd
z*09E>A(Ph3d6faw;pH&$Io6!IxzrKGBQXe=CKZJu&80-qV;!ozdL}e7&#F<msjHn`
zRVBr!TsY0DU8vHjUO0bd098OKEMisNOawv+)wR~tz`U7Axn{OS4b7GsM52LtFdyg&
z+@dRxYHQ}A?v-IwQ(;mR;l0$FT3K0Di<-N9ZYA?Zm6Vs$;&l_AGj--%tJ;Z-NUX;N
z)mmG?l~K>t1Sp|$9yBz4Ze97bss-h9re0cwCyPJ>t7qo%tagC<IhW3zH_bZz)Kklk
zJG#g^ef-$br%sv#c$kIfDWk`h4?X%gMJ_+~Xp)5m@X$DToWWvHW30y>eLVWBZhQTQ
z?o;!m@0HJ8ij8#__t4ak9>VPwCz0OMl{Xzdx{|$*e)iH&GsW)6oBB($(ySJM&bmR_
z;g|R3s4xb85C75-8$*wT7vUKgd?SX8bZY{_8E5C?mtvW)yEQq+-^2Pq^W$L!`pw+O
zvU*unn*Zh-Zox9sKGtO#ua)qg)>RtMo;kA*SE5#Ee1E}h>qd>&^{2dU)}6rl*YP+#
z4YhU^Upcj6;}zF1xrXKZIpZ7YT;Fp3obix!u6;RwxoegDo*+;U&Y#zyW9W?i6&Q3!
z#|$ho=sN2Xr`Vt~ZRgKt(9QKmzd>i7oWC-I?u_XSn`F?TxY%EXLGKl#V%^rD!w_PB
zH3mI1MzySZgN}-e{Vg%*`^Ko2wZfpQl~)zmWYB3>&fhA7Zr1N=gTBARjOQAI&b3eH
zZ>>Skafo<sFz5#u^k##8ph4em&~puXn?dhq(03X1{sz6>pdVz=!v@`1lV|X5gFe9E
z?=a{C4Z8J2+-|w{=lo?Dbgx6iGs~bKY|wKJ`XL70YtRoh=miEn-=G&6^ur8#u|YrF
zp!*E^5eD6F&<hNDnL!_H&?g!6BMo|mK|ji%&oJnP2EE3h4>9QV2K{J*zQmv(W6)O^
z^df`aWYC8i^i>A^ScAUWpmQzQ`CDVqhdD$%*BW$=e$L+pgMNZT#IxC;pJ>px8}wp>
z-e%B;8}wZUeS|@8H|QrB^sqrMG3dJu`bdM`VbD)D=+={Q`yXY{GYq=Vpl2EMQw(~p
zK_6|<y$1bMgI-|JOAUIFK|jr)7aR032Hj`SxmM!*`3<_?A>vtP(8n6|Nd|qKL9a0A
zXBhMu27SCiuQBLn8uWUDKEa?bG3aV%O$Dwn=w$|flR-b*pszCM=NR<W2Ay+M=WmTc
zpXd<rTx-zJGw2%(`Y#N6vq3-Kpl>(mlMH&BLBGJD?=t9<4SKsl=Um$P3mbI31t~$h
z4f;h6GoBp={bGY|Jr%eAa)X{>&?^jjmO-Ct&~pv?B?jGV&?^mkfkB^U(2ERul|e5y
z=+y?@XV9k`biYBLVbIGA`Vxaa$)L|P=oJQimO-Ck&@VOUH3ogQL9aLHa}4?tgFe@w
zuQ2HI40@A6S2d>sR~hun4F1&yeZE0oW6*02`dWh?Fz6c$dYwUUHt1Z-cK)^-^o0%)
z&o+ZzZ_sxc^vex;yFtIgpob0ml?HvcLBGnN`x`#Z@Q3VQUteVTmp2FO@S*V1!;9bo
zhsVCt+wwQOkg<*IoyRW&OXp#Y`1K6(0U|CI6lw3o-(gn}M`SC~Cir~fbnPR}g3lt}
zo%mY8FCk7>KC)Wy$;9cxN16mbhd5pL$P&TF5vR)@sS$iMapcpAR0uwTI9>Eenc&9~
zr)wVZ34SDTy5x}}!4Dx$S3KesygzZe;E^oB`x2+?9kB%OMVu~oWcQCC9M+9^7V&n$
zzgr2ME_S3%@GppSi7(PD_$S2aYDd-z{yuTK*pbzO|AjbR>qwK}JBZVzjw})UW#V+D
zBQ=6=B~BMQQX%+8;&h!OWr9CRoGx?3C-}p}=_*Hx1ph5@y2uf);I|W}YaGcE{6^w*
zi6fTa*Ak~I9NGN?%fF1cmw3D2R}ep#c$?t!iPPncGz&h9_@Ttt3VsQ3y10?mf=?z+
z*EZ55_&LPs(ngjDK8`qD*+`Axqlp&~uMm6$@xjE)1V5HIUDk+C@FR)SRgDx0eh6{8
zs1dK={fW~xjbsVlmpEP0h$VP0;&eqLyZ1=_6E7m(F8FuX0jKL3X%qYl;&eG9&4PbI
zoUUeMt>Etyr;8a`E%;xE)3uB=3BH3kUCPK3!Cxj$S29u~_*UX{AtM!nZzN9FF;XV@
zlf>yVMtp)lOq{M_q)71J5~qt8@d|!Bak_?)EWvLiPM0uZ34Secx`L72-%I@y_YrRw
z{0icy5N{KFK5@Eyk!HbX5kHmqTEQ<NP8Tn-TJXul>Don_1V4v3UAo8;!N(D&D;KE|
zd^B-C@e0955FbmtOz>lgk0b6A{7B+-)gncLA3~fiTEr`Of8un_B3Xj>B~F(tVhP@h
zI9;*G?(d}jiI)*?7yP>raJpWRHo?CjPM0gvEchqH>1svR3jRKEx>%9bg8zj$U8_iw
z;5&%ZrHU*O{AJ>Fr6M(gZzWC_DpDc%M&fjxB4vU<Nt`ZI#3%T}#OW$UiUj{Hak@wm
zui&>6r)w0+68uKubcrIC;MWqTD-_xNFR6dx6~x;Gzk>Kw;%$P@Cr+0q(k%Ea;+4eL
z3VsQ3x;T;5f=?z+*Cx^=_&LPs(nOXBK8`qDnMjS`qlt3>ic|<bg7{40Wr80|d=_z^
z;71a_lz5TghY+VL67dS&pEzBRNS5GziPQCnSc3N=PM0IHyF==qI9-iMyWrnl3!E-S
zq)qTIh|{%*Gz<O-ak><dwSvD-oUTM<wcvjtP8TB5B=`>EbR8l~1b>-0U4}@F;9H5)
zRftpwzL7Xxgh-j-PZFnV5b+8AFmbvBks{zj|1mcB#>M{N`~HRxcb82Z+uB_7;~AE}
zb&DmB*1kvjtnlAa@UN;pgV0LP^9MgVm(IeHkr^52<?7COHsi4x3$8;qp#G&%i`bU$
zyZalWY5w86YV%b*e?xPcKWM+xbEwss{h~01?AL*TXa4&w_Ok%f=w(cKX<K!5_0gU|
zjmRR?YZ!T8Bf3|l8|b@%B>E>Ao3oJ4OP%d6ZDVe{!K?B!{lQ`Rt)=<7<Y_6*ACwmU
z4cw6MNQ~|NP<DQ(G(R)gvbh->aN&31Pxx1Y$L~<aV?_0=1EsOKu9spuWLJ7DqCfbj
zU~9PaU$zyrAKK?wD`ek`Ut~n{e)H#aOT`+2SV4Qa@GMT?*+CxbSR{W8vJ|wZ3eS`T
zp2xuB59LW_pCRu?=GPzm8&c;P#KvaN&CU2}d=!NYe}tcq-A_sIY+}JT^C#Sx4oFJ6
z1fEhuN1DV6m@HGlLTy1sR@4vW<T|RDf++qFwBgIp$psEI!%tG-V38F4$XYgpHBgvJ
zv^O|T0_wRHd9AxQybs(z74q7j(vjoo8OPG2^iJ7EOHv`HBaYHe5K#D{zCEn4=fob$
z^E{80oQv#2aguF$MncHEu2#|OLr%_onJ^O1uSHW+lb9M6QwX&u903-dmLVdlolunO
zLwI5S;I_>Loo86#FTd^V92?yA3|p!{xOGz#h?`L^OKdXy=;1vQvNF)g%A`zFd{0f*
zy6)T=v?uq3IT<<lkhU4J;`uu_WS;<@;EN{LCWj08EHU$W2J(4IFv6^|lVDaiBxbc6
zvuc0PgZ5ijZ3>;Kgreq$l%&-iVg^l!1r;Kw=LRtwTgr|qJ`|OonWi*&060<knNs<l
z<rl(fjHWk5)0$A@xl=CM=2Dk8BvsQpwy41$@@2EZCuC-e3PV1-$c(4)dz9PE`;Ce{
zuF-@V4>+OF<QMSEV>O=kjjHh*v>L;SYJ4_7vBnGI85Tu!wgv4)c4FOTIB7Yyhq|2%
zp2WI+AFW9&06D5Kb2RVkSl!;FGnHkHH_h;HX3Fjfk<eL*sf3kEDD;`{w2i<?Cd2GF
zLuXs`V53G$5n|NnFIc0o>SPNJXS0Dz`{905_*+bmWX33cvmc#v20LdA68ER0<+D2d
zp#irM4rPK|nxC<evHii<(3^Dbj2r`FKx^l$#EO<8JkM#LEtok%Hz-D4tQZ4LhWq0T
zn`xw-Z74~ew#_RLh?3-~j_E;vC?_46*jx-HiYa&Q=sMN1xX`XsJtoc|J#a#*=}D<J
zKp$4%Af*1w?o<Ja&v9r)JQx0kl6))B9~{$!BR!uCYfJ`_(W})y5DYA*>P6?if$_uX
zS&OOp++ZL-+aH{WG*C7#IH}n}KBMC|?}tY?3`6$^5r~`=`d9h4w0HM+XQo0~%$(OB
zRL>S)268(Q1W<D^B(m#&1yv6X7p5^XberwDlb!zk$VD-`_gJqTrTEwg{0$OjJwifc
zcW0-vHW{&ALrBcp>RwUhiXavCA0m;1JxY}UJ!YoWjb92?bauiO8LfEfJ8vjC!DnsE
zc)G^gqz2H|@chp^JC%*nS>G@z#-J>(HGDQ0oHQ~vQKA@7I0!Ef^bAQ`88b?PDr*hj
z$Wky{=-fVqMri0x*w%O$=pCeYgnUKY$Q4HRKO`kgz3)ba>;bnG?MvEj(F>kX%APdg
zLOiHs&w~9Bya&*S3zK``78SFhISYA-rRQ%&l`$Vo+`qCcR{^Zgi8@REV42is2YAJG
z5|&mUTrSJ{-;(uT(t}ec(LOAc)L2++Ly%S=+Qq4RCsvOIsvgl{ZKguPFMX++hbS+@
z(IRSFS_LXxDG-D*UHc&)R63DO#9<M{;e#^@UKIpQtSpmC&IpzjArA$HEgAV1YjO&4
zPZ#-))j1?$bh)`%<mj?E5&r~Jc6_=Elunpe*q|<)<lHHSwhR<Xl_$gBu+=FOo~_|y
z{sGNUwv<AF@lyQ1$kAP&?kz`-J;bcxMhs=KdPkAW_PYtIJrahdUF>g7&xg`6F+yn_
zAj<)CyRlDv6RW2|bk-qzn1D38kiF`Mp&*y$XT>^R>1l(_{!sc091ZCr7AjN*j>0r_
zZH3)Ex3DLD6PYNc*R=H0Fh?0?vb8b)ZNQTL$_w+eWboQp58NMo*B^Z2OaCKCH^WI6
zaQYj}n$)x1^t^&$q;{!>3jh~sxCn5z<}U_Z@V(;q0WN%2!G6HIG+YKa{TW4{1bE3h
z1y=yh)I2i)?|x3vYXDE&px}DIZ9;F%U&8!{>^C&JLZP3mCud`RlS04L=qiQ2x>1F$
zR_G8Nca1`ONa~IGYZZEpW~RE3P=`jF75b1yw=490jkYQDT#fEh=$%?}yFwq8;xy)m
z6}sT}Dp$J|I$bk&DAcD>j@!t_QY|?{q1WorEQKDYC3B(%=0eePW4>3R{}5F-<`*cm
zMWaOu{kuks6<V)V=Tqo=T9jX*-E=m}6#A@=J4vB0JgrJpq0r;CC@%CPSB{=*6#BXr
zRj*J>7h#D)-_z&{h4$6iXi{jcj=M^scWUO<3hkrOH3~gIqiYp<ghn?g)T_~Eh4$0v
zc7^uUXq!TNYjl@F(>2<z&>wVp!wUUIqq`N_I*<*#F~38h8+7gCcomiNj7BpQdWA-_
z6gowtxeA@FQLjSp*Jy!4|D@3(g&yJ5uR_~&s86A9Y1FUK(OS=C3f<qSUxnst<_d-8
z=umFlpa}cw&>DrFuhDviuF>ccg`Ta^6$<U|)UQI%(4l-m6OzBu=xT+2t<g0KU8k*X
ztwL|rx!R!642?D`)G6<Fg>KZM+7x<{uCiSUEzxMZLPt9FtI%7V`c>#cjdmz>g+_V!
z4@G!LqZtaFuXB~9(3_r64Tmpcf_b)P_A1oY%zQl&p}%}eG4t&Tpr`916f3k|hx!yc
zREPQ%+D+?9%~kA!bV8F<=!crQLZMe{Q8N_!*pn*V8iih?nd=oA)|p(Q(4b~sq0mb-
zbCW{1Y35Z5eNHE|TA?F#Cf6wRGtInKq35qv+1Q}a4jtMI6eHd)Jop!3j~r4s2hGwK
zvN$Pgd?JCorM-vW_C8&MhPiF?2F#qoLqAsYdFeZ_EYdG6Vd@;s#?(13bt0r{x2ban
z+BV1A(C^eE#+91Ls~^Rt=nu0uKsrY!rqh6Q8lF?*cin&nB`XaSmT#eq`JUwi;HY7a
zjr=fO|I!!2csPqEbOG}Gm_lT!d0h~5Xt)+$lwTZ_0s%sH*4N7K@FI{KJXUlpN>rkB
z=B48?%)w{B;8jy`&J#oMC=h@ou<Y3RM>vdJNek#H#{rm@l+ZybNmCBWBOFdS4e}#{
zoblKAgC7WOV;=?>9?8iEGDqSd?SG-l9FnuI5i%Skz*96G4yoNLmc|)q$UapJsWiU;
z@cJ)R+#>Sds$e=QM|`DVAK;sAQLrCy&np#N2KbIk6g&w^nazyLymWS=Gp12-#%8mu
zvoqt)SdA=O`jsQ5HB0?xQ5u0<2k<(8QzMJE(!f<gFVQdyda;ICQ^kxFJsA~H9JlVk
zU<V)nLKdbLC1RU01MhspsUTa`3?eei#oB*dhnOX-9nN2im5-a6+mQXq7M(W)s^x(r
z5mVe!)xrWf4xZ39kf`!kwK=>j{wmU%q0-{Q57X-$KSpWi)!I`9@c#XurOI9(I6wsz
zT^CS6#WT)TLB1<%72u~<Ach-NR+KAS7aH0*0-kifXB{SUfjlP&isG`rZp2)x=zIft
zy^y-Ou&1id4an<^ZD>w=5NnSteW2H9f1}2VPxf2w5C2(Yp)Dh?_D2BQM*9f94{+$I
z0=^6IoiRSE#SW9TMZ&D=R{JkN3&%?qHdV+1S8MnZtdKb^2J0C}yn}6dx6mY66f<)Y
z(o<{s*Ir;-;k)qzyU7goITa#dF~jiK_#x7iCA09eIy{^+MKgjKh08^QT>5DfGtYU$
zH0bFt8Y8`x6?hJ9Mq-ng7@jq~y1i^y0|;#K@Uh_S{jiTx--Msb30=W$l`9X#&s9V5
zbM?9SSro<3;x*u|2t80Tj?tzax{#0R@BIjxu>?OeN8)GJ`S`i?I{eJuf}c4*;%Dv)
z_?dSm?V}iZ5NjxM0M%#^<Rt~qiB3qa14xrYNSWpsub*Nq5M9n_r95B{<YN9@WQG5Q
z!vL`+LwZ_xT`K8J91%$3dO4N!;}AQ>l^cHD5YtN}GsUzeS0U}XUK^OX$hXQzoXBd#
z`n#s`HA2+t$*fgB3}ur~TgzSFN_|d((N3}gn)@kmL+C|TUH?$dvHvK-l5gn^L#^Rk
z7ixwZDQ@M&{F=~!{Sgew>3BRtbp`*%nfuOk?5x0`iv8><EKlQu2%?=92e*RzPoEZ9
z!8ZnP32q0^M4^)#U6n*>##Fg9AH6S0kajteYY69pR>o8-gbkxenUUgDoniq~EQqNi
zEa~Q4{n=1!vmXPcD5-OY+RH*qvBHmFVI7i{2I}&oh2bD5PSx}Zzl>7}k$b?Y^m}Uz
zS_w!sq0@hXCUhZwVsZiptF^r$3>lpe(o^I_&w(0VkE$-w8?s*oh}h#peYTPqvY*1k
zXn-TMjPT9pt7KFOY?dH$l+FE!N&e8y(&(o7kIR-;h+|fT?_!l<=?hKZo3bs~u>#$Y
z^Z{tCvc`#p+w{<Q{Kvoy8C*Y|0X2pD%|LyzeVeO&4b9mh>oB+u(tRbbW2L=^q)-N_
z#s9)O7KQ*=2UjcXZcr906WwNafCr5A5wrj{De#9+imWdIw%9#DL=Va^_MjaI@J?v4
zzr-`0c9pTISvQS-C@7@#fUWWmVDw)xu!HgO*J^*GA%uS!2Y1K9KZ_HiF=9kREw%(B
z?&fcmz!v)*hPBv#R*xNgAbiv}PB;yOl=F0MTI?qj>-i)oi+uhuinv|T?^chYpCh=%
z{^)CYyvs)zZ+=?g*9H=Lha1$*Xl+Lg0UA8qRt7Id5L30@W?6^G^zRPC4#LBLJ?reJ
zB6w^<{LUR{JKRKuLq`ooPgGg@dSkj3-gG=<?*qRmd;oTsH&=|nZuJ1PZq-`qHzHvD
zeccjMR(6JtR<>)<G>VPX3svgJyQZEOhI7WfSjmzd-ohLVLPv_a&O_k}RC8d<$b{^-
zzfvU|h?2DdM#<g^Cznj`PHjUact06xeQ>2ujpt6ILJx$EgQH>_2M2GqjzdB7!kwMQ
z#sO*U-G;vvUkEh!1s<mTHE>@5ayw|7Ttm;GP8IS$SZ|M2WUD;^#o{p&6yhv^GtTf4
z91n1<0>=WJcoy5tIe^e+7{)eJil^_+7JC$)y3P1>Sw6xMrf`uO$3)@rmGPrKPVh^d
z#;YxA+Lv*QngkenfA8<fdUq^J?F&1Wsr#Xj?bR~i!slcw8F!`1&_mcIocDz6JTxm-
z!fWfXvDIqt6KiF?2!Y~Zq4C#h_t6lDUqCGXTI>@@RMxw3y+~vjC0?Z@zN=Xg>un9f
zZ;QqMmJsss0`rboV^pjsfT{#uBSVY5T|Ks{$Mfp3fe#2i1C4-xs-bOp7#4nC8GhE`
zm{Pcj=$K>i^KpOt-1j4z;S(H|uKp~Y?u)dl$Tl=Wi~)Jl1*)C5XEC3}R#A(uFgfHN
z6%xY9k95_p`X|L*9E+Ql6jBwBJFn}wr@F=+9FKce*KvEg#{CB-&L|D@Jf`couP6?b
zH#yHw#N&4FI_|Gr<JQIF9^ZA`b6w*OkH<Zs>$nHT<6`cSr#5<MN4r1l?8HW1p671#
z#Gd5`V<RH`{R1{DJeQ^tJrVs0kK{-f{991CE9e{>;7lwQxLgIwWECfHBtj)<5T7gJ
z>z-Cbx+JP8?DPBdSRbC$!Ct8x(*Qfzd4SQ-J3dHm=&=qq*7N<p+tFjwl2$>r;@|;Y
zLw0Sk9X&IT|E-;|oE@}gcq?7(j2V6W%kLLibC~~D`xSsA&h`=94zT!K0bc}IG>Luu
zYk=6#@PR(Q8PDV47d?w-cS&i}YTd{4+zL3#5b|TE4Dn7+tlTl(qu<Dh0el4Z#=iuN
zik^okNj`$^jbA_}TkN(wi>#jhP<lSwph^_olJtv*)4Ali48i_(KYFst2jVlRvtl*$
z&vxwg<3JjZh6Rcfg}jF_NWeLRB<b5#fJnFdA(!Dh^C>*gFDCa^k=s3aV?2<d^Bc2w
zOo_u8AEwhxWLXR6Fb4ei-cX#T`v5}>T3m4tXBx6I{AbV{#=fYUx4^h=q0idT2jz~c
zaZa6L3vXHxGd+xh65c;t-%X|}%H0aDONU<@8yw*{V30+F&x9;1oPjf*{$P53coL>C
zaMLsCrC5O;u%gW9Nh}2oynb0cm7MUKX!|8uN|!x1;NX=N-Ou6NFO)Q%`;{~9tXPHY
zCitC>1vCPN1<Yx8vw+9ozw^js)<!Rqk=YINGyXMnT#umlLXJz2;}R>d4{}@*Sp@!Y
z{UPz(_6z^93%2vg);3+sro?>AnRpWONK|is%%2O=!lxfBVx+o;kYq&<4}Vn~mu)M)
zK?a|YL{I_xg4vWf7(gZTU5o-)(Ni$+Df?5y>1@u#)BrR!-kF;m;}i!6Ty*Be@y`5E
z1faJqR=w?mObdwy`h^ebqQtyuj~vGc$IeTnvJ+HyDmcQ&->U+2#skAm<sJ+UI3=UL
zP!$L#&OQz>j+`ac0(UIJZ`?=AvLk;(yZHm)p#3qytpFXrdz6z*e@O<*5=g;{@b)CB
zO>V%D<tSuY)$eaWk<KM@Gt;Ppuu#sXC0K=MQ`+N-(UEERDdf-5Y0-h<GGV$+F-Zr&
zRg$9^eq>tsr9tspCcTjBHAlk_5_;V};p+u()}d89LVj4&N5yh?O!)jpydH0#_l_9!
z1U#7M@RX-g75x|VUMv+%txlDSdxPPzFX89Wd*Zp7gYGm9f`04_<vfCC$o}JEF1OV6
zMnL#&jzCyi&uNmNjS^JLpg$l8>-a~9a_S`LZV6hzpeGTOW<~eM`9B0<A!r{E?*j41
zPS1M#767Zz7T!uv&Gcc+;_;Xg>TwQbI|!#rlWYD*WJ>DNvmBkV6tfU98dm`ckJu+x
zI8Wm*LBSaC-P>4#@x}VS9ig0N<N}uU1Rko1tcOiHsSZJuRz{f~j{?%uB+ZVKHXv(O
z6lZL6ZfD5ccnC<>Brz)!XOCABJw+Mf;BaHFSY87Mg>sHknaYc0D))D0;Z@{xiomGn
zPn<m7{jq8<^lfeej1KRrzb1EhG2h0S0kztdVB#A97yzaL+=T%d;8cLS6?ieg?iX;F
zo(>2PhH;p_fB{R?DA%sX=c%7{cDC53z6TCtbcUA_<~ndYI;cHJONFV^Vu>WZO2ma-
zRwjG(CO=MrtP*J(VHu#sPl5Ek6@`X%tU^_ObBlsk1Ma2iYXG01;kAIrX?O$Ri#6N~
zc$S8@174uvHo(g?ybJL48g2*tvWCNeztQk+z~5=O1MrUm%YIPzRVr&3ukD^1&H}u@
zhI0X5qhT-Ln>1Vi_*)GZ0q%aAl2Z(Ll!kqPPt~v=@aY;Z1ALQ)Cjq`y!xexZ(eMnw
zn>Abm_|)5#{Cez2-pqQ!UnB=@5_@&T)vm-Uy6TNQ<d{Sb`LeK2fvvOUZ>0p{JaaDl
zDw<1Ei!V1VF)o7p8NvNhgZmr7{ZoVUjNrV~;DJW)z|>&884=6cpw!@ljNpUPu&qgD
za9fkl0kYlVS-uP7AyzwSwo_zhA`6NOc2vVWGik#5AXBmlpLMg+Iql&%4bvV@*D&p&
zR>QQ1Ycx!IxI@FVhX*xGdw5F2w1>?araio(VcJ8_U#oO!565Yk_Hd$xX%8o9xE}B*
zfgAIepnO1m8iiv>bgV|36uMEP(uPC!HjS=Uq50BM8}rvFbcjaRDzsXoZ1IphU8Btk
zouSd~3VlMOZ3=x-qq`KkO{47!eN&@hg`Ou3v@w4-P#AnBs*8UBGc*`o1S=(CY{yk5
zksPD18<!j){^!BT)GW_t7zCFpu}#G^VMdZPd=Ev49s&zvs<bdZ9SfU>MLEp_L!)^q
zL*oWsY+E|nzW#Xw>sh*?HwDDR4QdT*m}ZxKqcR1WU4e$ZfJ-z?v-4}1W;ap8G`k87
z`vA|@FwJg_hG}+hYM5rXOT!g_-_|hAu3f`4yAL%?v)e6j%<QJ##H_0QJ%rBEs5ZM-
zG^)++O^vQbt%A9aSbxmy_SL91JC8=S*-g@Dvx<9xMzz_^(x^7OD>bUkZjVOW5f|1Z
zBc1{~@Zevx4)sWchNaF)PD!N1%<9x+dIqO8{Zpv$k5y7I8c9*?iICV66Qe!x>DW`f
zvM2Juo@hnNo>q{69&5!009MMNd)Kd&xvYRrmuk2P@UJzz3h)*UuLk@_4X*(l(ePTp
zUu$>+;It+s6Y8-0Xm~r|ej08Ae4d7P0bZ)%cEHOu90nZJ@NU2>HQWLC27#p&{6>>A
zK<;a_f`J;&1$~)@y@0RRZ~@?#HCzPvH4PU7-l1V1;DOqD{eTbAa2eneG&~9LI1N_-
zeoezOU@GwL<u7_R>X(S>cvi5=Pe>xgEM!1p0ESWyhWbQH9{LgrV%_tp>b`EZR4r<q
zb^Wty{lS&-S`TTs3E96}!>a(lqT$tm-_`IMz+Y;3E#OWKZvfmI*9*{nYX*FvhPMMg
zRKsn6%Qd_Ua7e@LfPbaoFyNasyc_VX8twpmhrm+nYcx3n<UDP7S%3>PoD29m4SNBv
z(r^LbH#J-Yc$bEY0l%$bAK(IQRer#Q8ZHCu)9@s~6E$1`c$bF%FV;GJoPVp<>0Qg)
z8kl5ua&?xSgB9fhYzJSG3B#MS5QGJR4!#1@!M8I!H#TEN`8KDPo$>cQcqjt1vY3p1
zA|tI?iCJ$|ry;xxIlDaT5ui7RvF*R-m__^XF=}xyrm&|WTogT?1fQZ$j?qty4j{ck
z(XWWn&)17k>Rr4UEMu;5Gz44KaxSEhMMZWC_~hD;Z(|mqO@d-}TJ~ILCxV47dOY^~
zeJBxMAc9_Up%+<7440w@#m416yI{m*@NH>NCy0`&b3;8mzoEJ|y9wxS3SfE}$Ut<s
zXZ?lwd^Id3!JTk2B|*BCrBq%ik`yGCW-pcIv#vs}PY}XXxk{%}9n)2+7nu>pFx4?S
z)iJSD_cc=OQb=xs5J&Y)or;I6bzy!%SBbatU4_b>D@wEdI4nSx0{<!)M>@_QZh1f5
zU%6$)MC=5r*b+2bHU_CXzL=d*VK+fo@RNPE`YX3F7II&Z#v*jXjJ$B56v4B6J}QOt
z6d(I0H2TtfEH7dSj1W*+S{t7~2}d0=oudw?Y(kWV7iQp;V2gd{t3`Od2n(PEFuqKb
zFppM+$eEDBGhBJWt(cxK0Ncv+ZY%6L0DxEHQL^8H@!{83+IlZzB(AW;eEy_YvAmGm
z+gZBZf&Qc7C3c;y;czq7D3AJ0I_BkvF<G?@XCq#?beYX#6b0L)ub2F=HDsW*546Iw
zVu|d!1I!2aj;}=YQ$m_a?_6r@rLgx=hVYRF+c4zpo>y?<5GBgs;_~tF94ZNmDB<~-
zgw>FMICIQ6Bja&Us%y8aQuSr2&buq!!p`_0L>Yl7o=t#}iZ31m9l)T=19^O05Xj+U
zLSSD$<~kjrvyfJIjSB54p><qV8;JKNS){jaM<#QTNp?5`MPaNuLsg@$bL!(!@_rLv
zU<zne{hIVQmq1lmFSH^9;Yx)&4Ypw_skvl(6l^Hc^p_3ImB!1YB)qLuHQHoKR8@Ja
zQq|vKdEp~b-&$23L~&77b>K)Ae@x&|KB|=BPE(4TsuXuhvf@0;>(ClhG*Mo4T~9Hf
zXaR|*1%z0oh-uONNrVtSrYbdeQ)Qoj8_NE~;x5%3+>OkqE4$ort)pxoVn9y%;=s)C
zGW3hiUWL~A!4z1b1*R*VhYU8Y^Y2!HZ8+GV^Dnn|t#j6VdPM8|HIpe(=g}9H&TF5C
z&ex$bwa)KAl>Z-f{^PAE`^ZH<q4RFxi-V5NUquW@=lf!LGfC%<QsAdoD}h?)2O4Zz
z=f5P|i(rG!7q|WloliEI5_P`t1*P-OXQA`asB^9JBM`+!=XJ`?&r^0jP1$+r&$aV9
zWxeMqlkTqUe3~MbDq{Lx?EKnWQ1+LuO3*oa-46DW9oVTj>y09e4JPII6v{y<l+W9e
zW4)e2c`=2uErs%43gyo!ly_1nucT162nFx|;K|7ek1st67@m>ie<hUhHqC#7!M}Vj
z{FiI~%MAXiz3`u{`NtakBlp5TT=Ne#_zz3uS4+|C8uqNPx5EmzVT^9(GofVfzD`QW
z{xhDACSC#Trit~M|8ax=-o5bOs`-Cq@HZs#C*<_;*Hlg)<TD}U79DbZO2}dzvM?oN
zx(+GlGojprbiNKW^3^*rUkUu*iiD8;PdptxeE`@^PxCZCbKvk#*$cnq9reI?4u9od
z_|HNZ>+N)d|D?U}AEEgN8T|Y2h5wpADEW)=bn;UR*sZ+fn*V%*|BNL5kiDM~YNv!o
z;Q=~ny(>;-yfudG7md(oQbK=agf^svPBlW$O9?&02pyFYI?@Ooniv|s2hIhit^LAR
zC?G5RiUN}E00`{UV&@@lTC``2y*~ix(ayw^Rmi7PYzwfdV(ibn5)b_ZaAN3gBlN?h
zP_vV+&}mIF(i)$XmdRhN`HKwx{6zkQ#u<4TWkH$V;}ia8MvMI>K%Abt&Bl)JOMu~;
z%CU-!@UfsN%uMo8WIwTu-YXQWj~Io#CaI7i`)VWfvc%AYES|5kcov@tAxG<w!&5?X
zbV#3+kbhwU!vcTKXM(gbm#dJI`Ai5oN{1Yp67raq_CSiXTXo2<QbHE#kOe6rRXXIN
zl#uZ{q%<YuI303SO33~?q<2clcbM)_2Vd}+P|}Ze$lp>z{-8r%ObK~fhx{%jWVH@i
z#b-jVd>iwGCUgUyP7_)V*lZ-Gja{bsXBzy}k{kb6Nik%ff~O<@c))J_{j~i34Egq6
z<bST^M-2Jz>_z_Nn*TC`ziKc1XKQ|z!^!{1M1H78-msEat+0%+r+RTuJ}MUH@i9hW
zzQy|z8?GM5EK2C#JnNci2ANw~8P3aP*e_4t%fglKw>#e$#bvkBZ*SvcOz+W{K>44;
z&)Avx85hFO8BgG6{G0eW^G5tkxEDWX9SiQFx^A0}X0&0GrtxvYzs4b`_y+t8{|A0X
z?8MJWU*V^O=t#;rnP*l;Jq&KODpm)Nwvfv!c;8~YUO!W}9EG!9lcQmBsA()$OfrNQ
zs~ucO@zNLeVsQp<VPZ9nv1OGdSC-(kh(G)xE`kRi3ZqAGp+>IafxvYC(odFgl8hrc
zT#@uFpNoM*t!g8fi!-tJQ11JkTAbN-%0#)KtBg%RR&$D(0YBf`@#8(AjgU7!l=Fv;
zYR2NnO1h`ivu-=HOJrXl%?{GXvo7qwnVxmx-;=4gXWedxjy23(4!jQ{w>wA%5FN7K
z*Tb`3C$Zj_?pfa^Od+c@h}EuAsw+4f2V$?v&w@o{1oQGw3%+++a2HlWCONAHr*!U6
zCp*ffTy)BX>efJ(F#~laYfpIQqHvgx$x=;gc*{dLsTfX!^z6u^W<bR&@;*<tTItL{
zJ1y}o8jfftWz6Cu5-C^>U0L=LXt`V3y9IX!x9t2NxC=|ZT<kI<9+M(!c$cEux)6oh
z&rNHXou5q;$o{r%OBlQMp5>!a?I7@V3NPL=LK_3NCusM628}5scXt@ne{B%z7ktE4
zdDzmZDXiMytP|#}uWZnBRurFAj-)fvpzv!Qg?H{?k`3)19B$el5pG9>%}w!8M8F{g
z{9wgAT`i2RK?ZRgdFiKIWanWRtSL^!J7uWlN#juu72^TTU}`I~mxIOH;JeCa`3JZ8
zSKgfePvD*Hp21gq?ioD)J<s4-Z+He@vc)ra@)MrH=iK8NJnjb1;L%H^%5@cUr4p;!
zS*;dVlojYpheM%Y3RT<2xDbbYe76njo%-e;R{Ny79xQlK8iTSZwn$%#b>A9wBogDs
zTTi23#4_YmG_g%LLIIn9ji2zc2hieBDCdQ^>`iya!m1O)JdF*^6vP*7<l<Ru1^zep
zL&pEC2r9$6SHVgiZ(a*u&vfw~wa)S5j}T=R5w;A?0dNU6#8^G7rWMQ;%qf1ySVCu9
zKNLMd&TrQliyQaG>mNbaAP6F}VKxt%0lX~<rE+vR1G*GkG{n4&VYx+jq7!5zu9Iu;
zLp~>>N#R`3@0m2Zh)pzGM!Xt@h?Qt9<w8I`I>K~kmHLhcK~#Hww0?FfE|-mY`Et}R
zAb3NM#m;48q%j>E8B~Yv@j8>qz|;9;_z<~-wabNO=1WDf%f`C6QS4^;{Sv2(u=m>x
zd9C&hc$u4jIHuM^gP0S{!*N8sS_gvNYJb<PSi(I9g0BI7bAosER|Ipw-N|RX%h*m7
zd)Gph*A?~bzdNLo|9ghC+F#*8r5jN{N{O><E_m6+Kz<&YdoEf#?y4J~pD{j|o{uv+
zh=GL@>?PUfgB6pYJ|X)zAVPuDt}$O>kTDA*m9|C5$r3pn8`y6ZP#GA)(yhS7;lt4#
zVukD&h&>a+(4RnFHso=T%e4XrtI=59f&e?h(DDr9tLqSGcHk?p0{btSoqtRkmI9Bl
z<S2RFV;Es*kkDqaz6+tqDH?k+l_%^6pEs1}HF;aDWGu23(h)J=^EfEj&kk<&cL#fn
z)E(U<c5m`y*$AJ2jSGk<WR`K6U_LCqFvcF-(tSK4*q3fb&x3dw!Pjt@W@kJcDQxkB
zCnbeK$jLuNM$XaQ$M9_=>Bb5}_8`bYHu8gZ4j`mjXvs<7!pLc;XLN!E?96lNA6VZ8
z^7GNF7s$bM&+<dm@DmRUw()cvUT91#bc?@xK(b_T#xqSFNcsK2FXTSl<FFs`lPZ|8
z>1U`Qo?c8vTH}R=E>>}03@T43Chk5$3UJzj_7BfHdQrX@Zgbm9-MkL&#JWLUzEC7D
z6R3?9Sclpav!|a6d$Dgrj264s`XZ|v_Q^pKGkvD{37>@ylzI<etFoBaVt=p>ts6O2
zuTb(<4xbEtv2BD=IG&2$oTpUb%E~_PFv<WX{Q{oi!t&jGF9QfD2MIuyP^5e~D}D&D
z$YPiQ`rJp(LB?<mA-iXci1r=8J#gT-|2m?@J_Gqm(<w)?5e1E~=D8xSSda3o=fxJm
zHo1T@t&MJTR)|$RtjiEzI)aK&#v(M|rp0`DLtN&okY6WLpCD&lMTQd!zpagn<LNlZ
zU4uqEij5d8dQ=+vnVB3ma;ac1+7A;MCN}phZi|ISCGT^fXJC3rd?*s%Fd9ikuLeo^
z`-oaZAz+Z9wQY+yjYaVI3ZuQ5Yk|_5Vp5`bWuh7l35P?mdt6eD7BoWp?SDoy)Sc4-
z<W~kOZop<VuFlT34XQ$3@O5E8E%qNVpr=98Su>@(YiMT~@urCObe~0J=#F!-JS%{A
z40HbR7@Rd<pV)3HIP)UEqB7UnuguUwx}k553wcr<Lf1m@VouJQE`&tSgoL0YAw5At
zD_)w3XM+-|yOPkm#kNtNF04Cu?<Ngv>{AxE&Vra}bI!(z+sR_&-XGDT!28}=36^`q
zQ_!KR1jo9bfc-kQT&>LiPPo*V1bZ6GfQNVDhIJq^$1CAkgOYGFNGN1xaF^3nW(MB~
zZg;pcRYU$GxT3w(%X%*XhAw!2ml%d0y$zgCm|<g-HImwD3S3)FK}fY4RKj=g@7e04
z+!4M6fJSh#6*v(_D+Vw5<H!+yac<n|7p4Y3fZ*r|)mU^~iFUma?bOt0^AOC$If9O|
zaHsUC$V0RusVRDvSHZs34bm>HW4Ue}UMnE2!z(#ATStq%^9fi?QX@$nn$^IMmQQ<^
zGR&;A=^PcP2_s^NGw2WEK6!iBnKF!LI~`->ZWI79vpJ0CqW8)~p|j&^8~|CgZ*{xx
zq39uG?kC(bWM_u#4d~u^0eo!4P7s!dIN7HJw<|xOWwU>U&k9?(@ta~p_LYc?WV3_z
zWq?#`=6fx95x&EZt_4TR(c~S&%SI2Q?r8TcKMhJw2vcJ;UYTZz;!%Qc0FCD<UN|3m
z#-A$OU(xv|6fQ0|K`PXimt4yJc&kxLY33$muYgDyeHQ~zCFbax7d?7!T0SQ^BYJAA
zeNm}n)T#`>E%vRCW5{J^p+-FdzkHHi1YI;Zt4J?XjAd7B_??C*@eT@N>(%IsSu{*1
zVU{#Q&RUhdHSwk^*q2P4k<Q02#+9ONOj?Sc3tq#|<lgw1@(q42<OMtz?ZVH+yqTx`
zU2yyAKf3NZMk^h8Egxg@&O(s?HvEh|9zWxP_&H-Le#S4y&zalsGl6f?owXC(MOQS}
zPGq!UuZ-m5gqP1mQ1SEl89om`BL?E<q+9S)LOCP<j-Qi<;b+wC;1&-SPjL?L^ulE5
zMTqhuvtf9w54~2hF&%-MMq^;%xY_4f=~vi2dKyPMoRw{efR`QL@DJYN4{ndGo|TzP
zUpqE3YTY!E?G{6wSJMOVY8B(yy~Zdq)0itUQcim`-h?uQ-}^#MB6Q(`;<3{d^3Vd)
zrGai@VNuMRYi+)0C!@gRXz|a8afyl{ZbpWqQ*?|n(U4gO%D!F*brN2Rl+eDhpps6{
z+j*^g8G1$}=cTF6Fqiv&ze=Wy_0p|X$h-;lSuUg5g=$cnEVVchf?1no`Z-=d{d}@b
z_#B|v0bu#!3Ety3##%_f7%j%W4n)TtoXq$|)>C|M>bT#fjIK{(se|T-{6uB~M(mTH
z)T8UUz{7R8u-nnAjII}kF98X?#7~T_3&G`#u9x!G?@-Q%7#}#gUTBQ2pTQzAP`-g6
z43y;@XfI53Pt`y>vC9w{Xv@S~qhrcyFT;~%79~cmQU=eu8ILXu)mFBkFSy2oP!_v=
zi2~SG9uFu7*GCt`7jtlbMIjUOCo&$ht|xZIpy8OUoX->Y^X&C9*j{W!{)*ax<y>q9
zChNo|uFUJkT=<xj9$JF$hWQmX$JZScW6kVFF4gb11YZw7RE@zOuh-fSuT^RiH!;Re
z$+F0##Rpp;`GM(i$@wwXWXWeiGR-C}igjfB3@tu-95P>S)g7oy*BXAR7Tz}-KxCOJ
zTDkV*%i-mEmh&raG2Uyy%lyOl9?yiSbnRnbhPFZn<3e%2FQofDSqCjczfQFmX$PZ7
zil69U%zp@W?>HD0JT9(2OC#$V@yS2+oB@r*J&c}n;9+nWVNe!k8!Cuje3>#&oDZzo
zQd*Zw2@_9KO9?0p8-DJB3_!ez>pxjs_yC?6MC^TWVP6b!i4)lP^2JXsE<Dr($K`aq
z2+3qZ_SVOo#f1%kpy~hTiwo_jm7i2WZ)El-Rq&IG3!;mYaFx2~0<|aB#WfV%E&Hf;
zZ&m|Pdignv3-iI9m@&P$AXaI*BIu2@m-EB}DPB$pT{Fyyr-->81q<bpk$jyfU8ciT
zF^8uXvDHA|z&!@0^S?B#j2qp>uyQ<ziNi|9(;QabzCUGH`Q8{-_*y%LmA^lthn3qo
ztPG5%3@g1sLhby-u;K-mGpu9-#;~#yl9Pv(<B<qDv?~zwzcH-HO+o15(3|{>VP(?X
zE{Byr{mfzIyS2`+atLCmVP!EpR;2DStejpI@BDdwU$G{4{^wN4a>-ugOr2_5k?Yap
zLzhQCtjC@wfX8HZIreOy7EgXmj5Rs=o#j83{QJmYd~|vgy+126b#%&^gVE_U*U{-E
z&RvlWAIJCzzQF^ytI_F5_tEL3pD{YU`P={D=rj|9u*>N5Jp2Qfpj8+^Fl*l1z;(yT
z|M435u|H>+n!YBvEBrTxsnc)8Ftz&c&M<WlWWl?~8u)&I%wehs)(_v|-(CaXuIx3Q
zrGIk`{Ft9JOig?6KUKk9A3G|@g)F6leF6Ra5vd*HgX@UoOI?Wx*;kZ^f$)mzVF{ki
zFpOC;*@z5cFU93ythey8WHn4>#Yo5~w@rpApOzj~=cO{Nm(ZKj+a@J3c4ymUSW;f?
zLqUM7VL`heAVe*(JdJmu>W~we?L-4{AwMS@%g_h@dojl7j7#Ey{b6fGyvVpH-E#|O
z&vi?%^Q3~*JtixaJr*bI$xw~OdQav>H8YI)8pG6j4=)!<$XKd94hwQmM(Lai7Uep7
zGI!7V8Tx(mzC>HFw}GJa`wSqh-`kab)j67fQ@@9xlaFQcXBo!FGgZdp`c*HdrRbOL
zS4q^|+etN`FYiq(AY!05^l3L<X4^r0m5V!q!R;6}GGRwj&KCQqyR;YPMe)^g^eymY
zFtXw<r~;&o{ZVnousMOv1z0!DJzKo7CvX!keaPtHd*_>h@3@k$#eV)y<+a7Po-#I9
z_^_@0Io@GHmemzi&c|<%%S`4f%FjV&VnqiH>H_96m=1RX|A8M~oz9LB9|IIQUqcS8
zE>qo%v|SNDQ^M89yu=yh2$;dwqa;!{q=Lkg!=2#i48}cUnnUL}1fi(uSf0_Pz+Z(}
zC)$mM)JZB;Tusgeh6!q&VLZe-4VuM~MRZJ}0m)px6rSQAPK^7RxYyf$9=NmHh3y_*
zLhj4qYSx+JSqi=%_F5(&Cpbfei<4pJC@F>t5nPteJYpH)Fw9c*mCFqsxpmplp+65N
zc}lSx!~53yrbT;^mP?xKb0F7|HZ)gc*~ePJvxHABModUtrYMr4___@7r6Wf^b<T;F
z>_>I^Jj-fSM?kE^({Kqe$uDN{_{vq6f>@OF{9suog!mB6Uw4Yi`T>|wcabH3Iv7jU
zT<3G?eU^WZ?5j8jrbRv@f<k%m6d;!X<G{@Bsnpwj8oxo~x$rwtPl&atlhMHX@KQMs
zBGg=&vy*x=smP?%hl+&eq?Zco9-xm{cW??ru4b4h49P2lIIqN%DSi<10|XIT!+ix|
zE#{_0i(@?B<0kkR&u2im`Y=IOA0}}1VZ2^_;3Z<}=-Q<Cc`RxsiweP0CUDVNNRG>_
zNbm)81b*097KgbkD{!hTEif&Zo_w{hgB-wd84d58se?5t<NzMBaF7ELvahUZL=RVw
zLC7LLrYOy{UxxmeBCoKlTgs2_uu-b55?`!^u|ko`{%jSWk_EWfqqG;*v<h|Js67-Y
zmt9`St{<j608nJSk4{A<lLmWlj07_-N*wI_VibTDWU$Avj)ACV>8pcVJdcl;1v#XP
z^%k|)f|AK_S?El^<HKd$HB{u!5CPBNw7TBPgtOCBrJ>u$WLRzKr`FmK<X_j?zPOuL
z)fzIIr8Oe8#ryRP#joyRDt?pb97*KH`e}O>MiKr&bLjQZV_%76bdUWYdVhZ~9kv?l
zoknZ8FDf6`A)<cD(nI!O2*HYCLpU#J4*(n;8VlOj3Ca!H-57*@Hy!Is3@Nf9^9cZC
z+8GI=wlNZTme1y@obJJuZX82q{p-AE^C^l@2Bfz4uyOCphQ+C!t=9||^t=ION??H{
zYnDe07Miq*_-lj8F8T~7A!=ceAh?XSIS&?uu@+4Srb=C4w2ht+3+7Ur5ll2YDr=J&
zV&t(f2B2QEAt_frCf)RrjKX@qoNh&4lwBgXqHqY(xEeBEueaP0t5-BW)GNK?4Atmg
z=QeRr)hj!Jdto$4G~pV_fvAuS-FzowcLKdkh8mjJLr`X7h47wG_eyaZbs$F@PrOQA
z70n6*YXmpN3Cyk~Q^TwVCnEbFRVCb5(G0ASF&but3?OXO2atGm9P0$?+R%ZjG9($N
zE+iyY6>`J_Do`gh+VSl`1i4p8qMgRuvfX)GtXjl$<?AiEs#=P%JL`v7H0Y#OeUqx7
zg!EWJyu+717%yK$1?f9{AB~wtd=2k^TtmI}c#dZB@72(b|6UF0%BR&FtzlRVJ_OB1
zgkD>kpq|;$-dBI6st@1uN#NkHq&|AFNOPbs$1#`07Kf#ZSTF4uy-~vhaKjw`oX*Lt
z;a}jZ%w5;;IX_Xue}=@aYM71RIck8+Cf!vp#=)~%8ybJ-oI53rN?3_^#GF=a9xILC
zRnKuE<{L8#1{38=H<8{!wf^V#*c-CsW@sl><BO*2#0J@YArrp_qW79&_cq4{&DfV%
zM=esCR(0>!_v@oPdbA9cd6|6>oKKkkr(a@)M&$MviVd@p|F3_m*C{0?g#5@yx|p?c
z()v<ENK+S=vj<vB9li?<wLz~qJtbdp1%nT2)SL=~EC7AAZUCZZ71BB2RO*4ATEmwv
zgif`*m1PRVH(ZtPf^jHj6OtZIzWo=zEBogKUFJy!MzO4Tok*_ea<P7(p=gByf3m93
zu6A1i_YW$+N|$f9Ws0^bdbgB6sSV}H60DxF20Kuf8JyPhXmsWZ`_5BvWh{po`$yci
zwvp$e)!tz{yZL(cqGB#jN`H#}We?gT*FZkC0)y~{icdRnr}=_Di2v!9FfT{h6U`t(
z2v7N1OaY?Cz82&3UQSm9rgYTvZ{Tnt4o(SOj!b~CQW0|5!E^>L2-&<h4%_LCuOt1C
zz3^sPlY#Fy2N3QU#P6le(;VkGH@FpoGfxS&1-EQuIX3Ou7jHHYl9@vIOVnYcQ57Y_
zsw+e?>78|lwc7n5h<_^9KN4d-k66*O!JE-pcZiB|kYfBik@03S7PQ*0BGdeP#@p>O
zE%NI`&RH}j?NTKu3aj^nSTC9Mg6O66`F6RykC0)MGgHdRMTFiS=QQLS(Tk}xtBylA
zG71kP=Q%{(oEKx+5j}}4ohHj|WEp6%pi$;Dg1Cu!-|UTtu;5m}8@?Kc`e8?dqB-hR
zVCH0*(4?zyxkp5Abq~T;cimr{M$4;VdH#@%w*bbNkCi4bj@9Q)^Bdp)@`FRp9?7x+
z%ta<yywuJoRk+a$y~b{mg`)CcHRr1xKhC4PK>Z3WX5Ui4cQkxzf~joap8-s=2MosL
zZJUcxI-FquK0cp^)r*m(3_MGM**I_h7EgPLZ-MV6ZUF1%ETpZ3oO`d$=8)eR7#p(R
zxk0S5Bxvshg!LHw8nsm%+(!B8MIGh_$G62W(bFku7a|MMqv8x=H=AfOF_z(AX|?A;
zGXGFV?G0GuQDsw7I&r&DBerQQ%Y1WWDsF+nn<G@bawg1HDaPhBNjzn0L*s)IyQ_7(
z+>pKQSJE`Uz)TQrH9KVA4+6|H6F1wTcQ;C!t?bgh{ngf@pab2T#kmMa+0s$Ac&kOh
zoXLlo`H+1Y@`2H&WaAM~$)>C<-PFTBpmCuV`H3p_O6nNgEKX!YIS(yM5v`W=Owq{#
zf7g}3$KgjgUQNs~f&ryt>#uB?ycp6eWZ!eW<nba9k1UZR%J9H(2NxGic?s6wt^SqE
ztgmZO(=G8LhsWV6tCS+hBsrAx@zTU1s0JpbNbO3H?zW{)X0lag#({X(Nk2a`&tKL>
zX4aySIZfMi4YdX)#1iE_gQ%qnBwFB>=;$)PovMV>x=Q!A|B`xq5BIgl_2s-q>8^xL
zOB^M5RDO8md({XRC3Kyi-`8}Zhc##?d(p#~Sh}}fCwizvx?Z<*m#t>w?m`tKx=Q+1
zbq4!SxWN72QN>e>9aW^OER`WkD~G$N!Zk||;#S)f6TKa+%uO31`{t0@V2fi7c08JW
zil}EeM-An4EJ`e$)8w$iJ{pe7p(o+$wAF;F2(=TMLdbh6ptA{85ISA>2#pjzLdOYT
zDWJi^M`)1n5y~NCoet=HK=_Uu8V~<k>@XpGPg6bK<^!*^#lt^U0Uzstt$gAS-$#i-
z3($2bT8)NU?DZ;IH3_YDg{DLDJy09}Htxoca?-3Z$k)zaVYlC&+k{YPMYct>Rz4qr
zyo**2Vktx``w<eY^dux&`9b)oi!TYa6N(V>QUmW2svz`7;Un}4A<@d$fLiT8qBZfa
z#oj@v#eP*iTKGWT<Kcf&0c|?qcYNZn)qXezRmAi&Swk)MJt|rm39a@xO^4*rwMu}q
z#EbHy52u^^6<y*ET-h`paRGi6w8sI$`Jbhqu0@gw4#yf0hBkA@1uNE^T+14kjEwjh
zC?qd<FxcXzLgj<N`HlM^jM^V3bo%p68Mvx)K30FB=2CpHBE0xnUX_ARMLZxt$^t!>
zDeb;jVKfh7oebY11bAra7^DaPh_BcW<S>sn?&Zkjz5B^Y5p_EGFS4Iw-;a;g;ha$>
z-)8Dh_kN&fU2{V_-ed7BpQu=tnJj2kzXiT|_kND^$cqUFp)-(|M7UDs!Ku?c&-!NE
z!w6qs`#80+k>U6VYNy(H<77F~Ku8v~#8)nI-h{zI?^zh?u<FWpk_RooT3OC>DfC4P
z`F-GQUgemT7P9XJ13Zf?wfy&ccv#t1;CLr92+6)`06Gf1<kY7ItgL5D97QqqN*wvj
z-f#!<5cvw;j)Fb`#OVDS+OzP=_kmQUcOx$NgMZsso%enn_YWX%O;;#?%FBUxFv6s&
z=~US^lfn>oE~^BeX^=!^4gAmh+B{)1D11P+Ey|PQ)Tqz_r$AiTB2_ziojZ}pQJ`)f
z8W$d|b;<@UABL*sd^tmDH*jW3ax<Ld9^5}ExgD1yxf@6|l9PP4h6~1~ThU%hAAdo~
zv28oZsyiUTQ1GG)H04}6#1pD5bZ<iTK4@huyINd^^zd7Lh&v*#R4&fvoP+d5x76OL
z@d83ZPXxuRQ>A^F5t|<{$_0yjz=*XM9WGgo9vdFBK{uQ^0;Dt?+0#HX|6~17Ra^eh
z&2l%rd8oW%7Rs^o1-5&A{#Cbi-ELz|-mz`RlAQ%^b_KY))jlxDVbinxYwQ`c+V8AT
zy^n<AT{faE_UnAK+INDLf6{@-PxN3>x4*J2z6sj8<lxgT!>3qqOCv9}glYzQ)WHdu
zirvvKzNw3~6*~;v+0@O@MTnqXg2+=Np2lLp+|xu)VZN-GA=@U$B4e@vG8jNtTv&9?
z7=e=F2nh^9UQ_WjcGs;Zk2|sW1aEqNbx`f7%Bx;=`m;_gYN*M@Tjk_odrymp$>6gG
zOM^~Ww|JNgN9{&fk9e32P%p&88k;YVr6&W`ns``A_jtV39K^0O!p6nJWLT>)!WPBD
zWT2a<!)V5<Io_QL!e%e(GQ90Hc7iBg7doc)*blIX8_6Bp(miGc+GImXz7_Cy9g(YE
z>G><Nx(W?p36Z<kvbQaJ?$CcXB~ESC`!l<Y=SyFijW0pT&UaS~%r9&?*d!I4YBLP?
ztZSC8xba^oPiVlazjQMke+F*(jT_yH6<(M%-myi51bYvOy*G4p)*TZXaJ7rLP@=Hl
z3bv8ZfC*s7w+vE5t~d<AU6l|UF=<;8@)dOD)ujz$;K4TxmScwyqn`a&0MYqf$u_i8
zcXr5r5{xS+b>dt!qlVKG3+<ZfzneqYIId8e-N=__T}-fKTwP!ERO7${hXdTB_R778
zEThT7P5wOD<j><Ke}BEne-FHQ8K8b%`yU!_<0<VQ9U|?KeM3t7H^Nfde>^O;{l~*n
z+rJT((*BLGl=iQ~;_V-V7Q26goY>~sQOtGGH0*sqfsXC)Lzs`Mt^!-jDTjT)`L3)5
zfOE0TTrns+eaq#Nn8juC2J>JMB0cOx8kZcY)QJ?^7*)%@h*al9%1MsoQIVj1Cnc8Q
zG>88qOe9qwzUvsX3}o^;OngUJ%_N>mVftQX`zYfbWRhO}`V^)=IZO-4B;EVW6s9K}
zrn5y7yWr9krt2K0LNZB*KPZK1y2I3yOzj*MzB}41T}*Ey9nN=T%BgFJGs!<A0yZhS
zs-X-g(wgK*zjY#|*3eE_4S=3%lOxShk>Dtye@`-oyPQ}fjaV|Qp6Dc%YC$ucNEykI
zx;c?j^LLyRY3Dce{*)#pr9TW2O>~*RA7nuRrMk<AB}Q<oiq)0=wmXq#BuBc$iIkeZ
zo193;B}W>vm;7Di#QK4oqPkRKf8Q3m)^C9mX?t>{txlv^{@6}B7U>RQ75H%%4NzxN
z9y7Ez9iD(8Q+$%SDKcY`?sg)LG9ro14|k6=%Zb#>h$JbcJCRaN=6EO4AHRz0Nm6?K
zC|5mMP9$!1JIZZmYrEY&(koYMWnG#asmh5IQ*KNVw>XhbNRGsBhohMq-J73l0g0cF
zC?493YC78y^7)r4yZmCYWH)-G2=Rw-l@=B;z1Y4)(xp5T$rE6hb^^i)Ele&l4=aFA
z6tKhHFNTl?^+i7#!IxL*a@_>!z?*?PR>1I`PI#>fzdI@XDJT3~6~5F7N8H;1ryd8u
zY$X?YK`NXD)a?sA?+`j{ct-u<a<vu0xA$039zP8K;{#n$oXs7&G4*^&{Q8VhSlFN>
zltE7aunb3F*uuzHg*iz!KuiwnuqSXq9~_IrhTaG|$@cg42ng9<@xhzcaQ72(&wPRU
zH&CP4*}}XH!H9GOH~s8daD?nR_(cpjCYulnAJ%@HTn%y)6mMU{1ZrabcHX1Z43GP5
zlo#E*eDdQfh^PEbnemy^kDMuC^Ah9-L3SokVb*E02cI`V1@DP)lZQUlp12pwBbZ@2
zdYBZw?OFaXIG|zpuKUm-+Jk5vUB#eNhXp6$Vfc>?pQH_M3mhT@|H`s7mlW#uONvr=
z5)7^*iJS9*()>1cvS2$HzEU7cg3MP3v(zMh2;I3o;?C`%JNKh@=lVfUy5O3f8jIT$
z!?2tJQ;|a^P5-Qc-tclA=?PanesX1O5h`&~?$}8In_otfyd|#kZvQvsNsh8Y@Ydfy
zqzIopoqq|F62g{4NmzI`+W|`#JqaN^%g8;Kl`ASfW0}BfzEXcsYV!5s5TnNPJn9y}
zXX3FoRj?qi+YhdYt6@KNEy@Pm-nIeDVU{|Lr;^!Jqa!?-8sVB)1og!W(csU!?(%Qb
zVbCaxA7=Xh^>vqJ&U#SNb(dI<oy5fkcGbavdi6jqNK06t)jPuK^KY!u*2et%_{1N;
zRSLpO`HlIHImDYa5wxZ_cwHPULb~d5i^lw6fO)?~WBv(%aK%L<&fHqoQap#_`5K-h
z@a&D}NqByPX9=DM;>qhFcHwz4o=td;!t-4S^5Us(zi7<Q2h0mF8uJeaggY=A@kW+q
z-G=92JdeloNIZjh9);&rJPYw$j^_|Ox8Zp-o<s0F2G5-kl!d3d9-|R!r<TPVG8*#_
z0EA028gW+7vYyAYAD;8@?2qR_JP*S27Cd=hCX?g+D}Tq6Up*OyC*NGUofakIUOj;9
zpi(=euMp*>@zbFMVg64JQ>(%?9D8c`@;_N3KAhdsQK|b#C)Ue!BrMO7v{GJd%;G{W
z)})4SS-_7@Ip|TU%8)RVK}5#T7YNit0IAGljb8Wdv(Tm)ICUHOTE!yHKD<U<?y(Fe
z$R=9^ZY+GL<@2rJY51K)Ezns*dJ+@)a?<p#Y|LK^&W%2bREy247GPCpCEbFR*QEqr
zi9qDYvBBs-2ql7#AFVGf^;V}TLv_AJszVz(2C2orH>&Z)H?ibEFYqush0#NF#vBde
zYByCg(StP)KYmKyla%6gm;VJ;aT5dP?+=_xL^h;;%DIM!GO|hdSKche@vj``^pGun
z+^6ubIvZ<xf%C~n+jir7L-8F$J{qYT-$RNoY0){rZ*I1!tgXQ#j!8z>VKc?EzA?WY
zLD-r={tYImW3|v@;h@|JO5}7zgCz2rRk|DaM!HVAN?*iPLGW%owc_1)Spu@qXpX{k
zS{qFOj!ASr9TOw`S$H5Zqk0yRAZKVD<=`Y-Yia%rkgU!0e!`1}sx~vj9|9e<$!rD7
zvSZ>JnzL~%c<a*lF;<J6&j^;`NDi2}B;n<x^gb_!m-8vO0+F@g!?fTE@>cvD!4+C?
z1qI8F-Wd=a%LvMirMgaNu@Q;rj}YPu!94T>b+X&_<1=wVb&Nq>jE5U(uM@4Aqw8#3
z8?%=PH!C$aY|Re!Ri#G0T>0Y#b7g7u$$h|R7R+NBa?Yp6^UFWr5jhW5sSDH1vwR~+
zu7bKM%-!?<>xH2=ky4mzR4=7%RE$Qwtfj_Al!-%RLvzoD_6}4bk)_YcgLV}tfC@<C
z`zI<i-kL}U#<mmP7on>G=(YrmWOOkk>MmxrIsl<L5tEG-7$1lyZ8YA!BQ68<3!fkA
zg(`IBt>Gm{<3)3AS*T}yk}2DnYu#D~?{(=5^cd7m?*_<Go4RGtk$9ZwcKy^B{s5M0
z5JTHp1o51}XRH0~ydv^oWp6Yg<15dlpvI1uL543bgKy7aKb%eQ{sFO*!GT_iwCEs|
zy3fmVF<C(i%-BdiHCO~zcaM)br$LAzHqs9`3e9BD3`O`X2<M^`wO5iFe1;Cj>wj=m
z5Y9c~EGUd{=uU|uSy1Q8Z^cT<3Z;N0&nZ248t;G-p$#cfBml&-PGNAA6B;$f15qy8
z_mCpW_hmM8pce>26(Rd+l-9HEW|5;~Zt-t<FWsNE-Cw!GpSFYdWeNT=8<UdsGA@8;
zas8oQ{@{uw!!83f4%3bmD-?*?_lhP3!Vg)o3ZQ5GIo|4E(`tbDo;4Dc1^N>JL>@;*
zTr>ZiPO`(ue7CyA<fkG0hgokfj%9tj0-5zT1v2Zq0P3u_16-m~O~aFl$JLh#7@=xM
zH>dd+vC-VAA-r-yV;c|4LbD-7H=9>5t4C$B4Ba?YzIrxBq%a3?Y}y3vgXdr-opT_6
z?Hv5VnQ7?A!j}u6D{S3{>^<Peo~|B#55Tv55(u_1^3)&_n8N#$2Ou05EWf}97Qp>-
zDYJQS6X!Isyn>5MIn_$Apiq-kv071CB6a)|iz<(e*NZCp>SsvZlO#2?gcjo54c#Tf
z%|FFJ!$O(9x)fzHQ!=+`J?oZmGs`txZE5W#nA=mbWuQjb&-<a7H_K`U&&<VV$<7e`
zH!#S8b2gaN!NgRiXB?*77!x*`Jyv+a{qmJH54Ms$77m;|b)Uky_v~?a_1qlpLl*5}
z6UGCa=&|;-!p-y{;FY5>;({!$1>k%>7h{y+)F6t?shwwZoaW-&-g!Lgp`7h&w6nbp
z*8@0ylX^XX0_BXTaC504E6TTu^U`prJnuW?MESrEQZQZ=)$g3e_UKz||15F7WTB!p
zJcKJ6LA$Y9_qxojo`!HLhE<=L3=%4EE5aEUsON%;Su>7m;+zZ)h6GN;8HVd8aXu|~
zUfIWzVZHA__?ajdR&81~U+2tXJ9mgaBJV&TWc4&<d9|$3hOCdPL{`7O$+|(wdX}tC
zzI>214Eg%z{CK`@SF#S;i>#<0nVPQ!VbhEvo-#z7uS5*kn+SUYwdGh0SN-0YA^t4h
z!nF_3vZGnya&%Upq-zQys8d+GWTlR4Z$GNn*!N)6!;%?<@~Kwp0E9_kUGHk;K?nic
zT1lj4zwSWYHK<#g!@xfRj!KbRoA+qpa++UO+LG7G_?E4#(fyblA}`KkjSkCmNkLrj
z!(Jj5Cy}L)HIjK!FI((FyXa7>ZEbYWar2ZMGs9vWSKEG+)wUnG+O|h`<kM-JrkuXS
z5INqWl$!a`0$P+b^n|4k`cC*<0Td-o70*Jd2G0UMp^__<dCO<~<^qoNMwh)gEge&h
z{SQ-94gJ2g(=K=-Dr7(WZILy^0vnX%g}l5KoF(Pl1Tu4(q2Bcwe48u|7l2X##zMIr
z5ayIuiJ=9!A2WHfXKkb?J(0Q!_vk@lK64o1m;{D=PQ|lS@6e=shx^ridul4qlP2VY
zmJ8931nq||ktA?^gSxhjv+bgd^(?jWs&WvW{o1gS?hCR0{MI-4et<4eVdPctaX}SF
z$C}|;X5h^QbQ5R7Orf(ee8fA7w;bN;hK~9LXM$lQ(;km2;3gvDE3@}QG1ZErS<GMK
z4kDdI8{&LEjk38|s<O8L!O=kmLmL_7gE@-fJTTxp^JccAxv->s-j1TK%T%Aod7e{v
zc9Bpx()k+en}D>D&0_<^@(bRlN7ICk=}4b=DEo2yV#!kKiKq#<Ru_XiO^#oXI+1K~
zZ$J(H>ZZU}BnvK9XRdx`^BL=pWuB)_q}KciuF5G@wxv$jk!|x5(uRPB??@rvFd^B9
zp!e1qu02HAr#|lH946eTEFpKuGDtuS)a?&n6<J3iF0i~vEy87x;_H^w%QH+$t{Qpj
zKpAiJ0nE`L%T2Gyy)+-WZ&-8$W6Vf2#$04FHih4fm?{Y>luJSAg!GiQWwR9Y)@fJ(
z;!r8_6iZJjIfn`<cc2RvuY4(mEX{BX!e@h}#a@iogqKMZg&i8>+(ynLx)64FjO9hL
zq>Hc<yAn1y#<`uGf2m}RJou%&wIW&-%fkUolovf%wl=OdWqH|yp=G>#1%6mwo(`;+
zu3wMCFM8wOy}%iX4J_TZ4a^pupZesU4XYVLo0DzFMy`@==krUXFDY|AnKe;;GV2%e
z$*f8IWYz`zWY%PUGHVJyb#>vJ__>Im%)0nq{FEPy%J(^+%qmr%%o-z~%<}V-S!4N)
ztZ_T>bH-Qr8Bg>~%9+5kduKh2*d;Wt$Xm)POXOw_HsdmLiQ_NGX3TmXiWw+xd7x>~
z?%6ouuBk6)!Km=vE!A_<G<BbGlPQL`n;=dJA`gpji5kc-Nj}kXFE%6fG}0a>X|MF-
zHVyj>^l0#P61?ca^5zN7k((vijQi^xQ*;FMgn(Wy0!C-yZ3W86h!^9^6d4W8Nwzu(
zEG>4Z!Z3W5T0?V^tsV_dq<`(yt_nbv1ef(g`e2z37W6DD?27?J4@Xxzj0Qa{l=J*<
z^gTOLzB{HbuqYu{Nhs&muDN=^&LMpt2*s(!A=+w@r0NK+$BlbZ_)S@)Nz1<iw8#up
z1>(JdGUD3_zq|k_tf@$>={O+ag>TE?S_rC)<`ElIWTgPLgzj<5I}*&BXf<V#qIf|m
zN~+0_C;?43-?Qv)B;m?}UdD@2Dj%cT@V12uyWneCHUI_bN&;V0LXb8W-4R}|?j%gk
zkbh;8W#~?^9PClvcAXqSCCdv%<hr^7l%>#fXER#W@-S)u^df#MVp+M^0YZ!9jJRj{
z(+G8%DW1htaP%OgP!ep$^o_kW&uKwGaT<O~(lA<<=ySGj0WQwM{N{E>8ow7Ytk+aA
z8EUp7V)k*w=-D$gop8DJE;y6$kL&gPnYSch|2h+CYF{orUpc;*i=|oN^A1v@Bl-;N
zj>T?Peib%?G5fFoz?iK)V=q17lhH>tA&gG#$%#&_SFV{T?lMF?;bE9A;=R#>yW*fj
zjAiV?2)ClhmsaO><Aa$mrwt=Ja8uLb=Kfb@k@TmE&>y1mhRL1MMIa1|-6@SbQtWM$
z#Pi}s(fA6Q^1J}c^(mMw%R&FVi)2g?twm>|q6^q7=Bi%N+2`?t$(efkgr^~__)ww~
z(U9fN4=B6|70-L53;YQT-RgSzL#js7Vs|JOHiXlWdG!UMy5)#f2&b$F&mxvd4~%``
z_u~~P&I(TE`GsRX)w34xoU9jc&V$j?|Kb$Ok41=uQ?LlZD>Q0ks0;>@z96Zu<3F$@
z?<Lmu#DGkHe(}*5j8c<$CH@7Q@H3hB;!pA8=fYX|xo9$eF1{N-<t2#ZyC<(+t}ZYA
z;35hcQ|?2M{}KF*-GHBQC*tRfJMlBV1V3l?#Londu4grZTiO+#!<cJ4r6Z#sD2^e{
z@V_uwNbn8qEpc#@23zdSg#Hh6X98bkasB-S@<7Buq7seD5;ba2lxV32MTm+vDk`>E
zQBkQP;#RRHiq-`rSZ=QiS{JnL`&PxeA!-7miM!ywi&onw#s%w!*24S!otbC3H;G;T
z@0QOecjlQnb7tnunKNh3Y^}jVaw0s@t=w*0>oly+Iyh;>BcSqdhEImWTD-OKK%8@(
z{(h+x+ZdQS3GCt3y-WPuV@L{)2Z}eLP=%%gxgmp=D)Oy)D6NUy=>Y`%)U*}TtK9K1
z6Fh$)0}n-Fj^K2-S~uzkk9HSvClPSQRX7+_wFhOC+k<o<Yp42Dd)ZX4T|)&Q#_hN^
ztD<5<Q6X*D(oacY2BTt<Ri|S%jABZtzou_hq_0%-wLifRM`$)x{)ELFmV4A==Uu$K
zC*?0>_mlDZ+3x<EzAM!=y9KUC!5R3<kAU>d)(rqFD63A<1-o$tSazc<&~D(Raq=hi
z!ouR^6i1GV)3ct9;h8-F)14B#RCKHl#Vc*nJqnzaelXBZA|i%b#7H8B`iO_<a8P^`
zvOsRK#Ad4{vqGs?)`1yuKPb-;xpum_*3UnSO(Ie5ND5s#L5h-n2cI5bq^ZdS9r!p5
z!f&BjP&&F944&EE27_sAC(Z`v1K!!ySvDdsBvP}pb+J#$OO|Ga2&VJp(Q8PFParc~
zlpu(&fN!v=70bF;I{RF{oH6+td<$y6sY7YGZ(2dK49wCtJ|3=(w6ZoU;exR-fWidu
zlmM0s;M80Ig$dwR0aR+=pH^s67!)Re-w9xn0JhHsP?!LwSQ!MMoeU`q*Lr~6tPBFs
zB7X{Cxd*7SGHB26%eesB`KT;<S{VdzZ!W+j5AeZHL<a#}lnbCRVOT5xTP;0L08?W^
zDNF#@3ZPPiIxZJLVFEY{0K~o-chk4wY%dm_72R%`+CSA6GP-M|s8}*L*J><uzy6W9
ztCKj#PB2e>TU{~1j+5&BZ8a<HMiy;26Mu0POQrL))j9F5(6%}g@RZ^IS6q=rJ$0YY
z3X|7<mijqtg%Fp0Aa$P)J(_-!O0y59FjXHxgN2!oe<RJE=``6c(^OkN()(IO)Ufw<
zv^V0%riQGXyJdb#gOF3^|3~f(at&;^A5rV%#u^pm|JW@;NuAgE>Ho_*+u__a|NdX1
zL)>5fFXb2A-V`(OH;5L`#O`h;xT~%*#eDk8M%PpM-tS<f($vp-EMiOCw(vQYT?{w%
zN!`wbgsRS?Zbb1;C3=;C`hR1IcKrXYM7It7F&agZDsG`VPFi&*;V1k^+_Wf;fuVR|
z9dgB4V<+j}f_wLsm1XPwO!5A9oH<{}X$wA<!(UtQq4%{0@5_h!{$?EadhB~KhI+w6
zJsXF-B41lz5r*<9ALWL@^|{)!rLvy#oTA+xZNZ;?G~T-t@15S;8vIGV*5DTBTqh?Q
z7mFRr(_)mx_@cEcy8yvS+18-glA-as0Sv8(-SMdUEA|Cl$H7MU=IZ`#SKzr@QZN(6
zHraL;Z5pd@JWNIQSXzTWle(~jqwEOi<}G~cep~Bl4z0ugLDAL?m@@p153QZwEmz|<
zXi7wL!v07Y>_7Vtj7TVXZ|~@oyc6*+m7h-by2><bWv|AG1U^h)oZr<jJNb<v{0;*S
z-rffVG`N|MOz=8>VxE$d3I1v^kMo-eKH#@C7_2f<{*rcW3kC8p;Q-%`luP&+9Q!PQ
zNCoZR@skaHM=}&pj-Lh%c%_V%wOTd~%}YQLS7AkI3o9u%q(piI0YM9=!imjdM^$R_
zu69>cN%+Wb<1KRy+p?mx0hqJFxSc7d7F@BJ2E7$jzJ^6?uZU$s7H6K!1mEs$6%6HM
zg23Yc!bc`3#4q*N8hU#^3OjyErC!~^D%IO6rR@**15GV>%QLuMSn&644SFeo2xAwX
z`r{{@IVCkS^gZOHG@ndx6iHJLNl(%z7{|%Y2K(7(Ecq$v!MX6`J^UC4znlLY;y$;q
z&s?UNM;MK>M!0FIt&I3fRQ>9FZ}MI~mfA>9%wxAhqm&)}x=7iJGZs<8oY%G=CsZ8#
zh}@jI|4|`S&Mte)1Q&b2Kj305T7#mTiZ_~`fI^?d6la5}sR&)ju|n(vs^UDON0TiM
z+f`tb0FgcZ1T$Y8V-w<W3ZqAj^=`dfnKh<Zu=rQ|td`<L`@A(LaQnPp#b^7xU&o_;
z-dY3HK5t!*pncx5SZSa4+ql~2t)+hL^L`gs`@G-7)jsb<xY0iE$ML&;-mUm-pZAk^
zw9oq~T<!CI8dn>ypTX5W?`Ltf&s#eawa@!`T<!CI0ayFH=i^5Eyzj&B_IW>m&-QsQ
zz@vTMS^?8OZ|!E(KJSNdwa@zzTxIttuJ(CrXwW`yEQ|$uByo(aba1@xF8`>PoBUSF
z-e^x1160sH93ujdL-i34R)1OBxJZ_3YlilA=J3LUvM|mW_=?QHH;#a!*ubZ0|G3nA
z8UZGIg0t%FzK2=$tU24?K{63HR+gJeXV}}u3)>TbLvp%R<N3f*+_9UVqHE~K7PjB0
zfa9vhRx7nH4LHVN2`D;QW<Con)GdKULzW_@#*lo>=+bj$C`U?fxtjd3WoJ$MbBcKl
z%N@ShUURQtM?#HkHd7Q{QO|-){dtb@7M6)>8QVeqAPLz)y<ZN{BI46P7daqr?(~?%
z1Zkk-9Z>$>=~APBeyZEAQobrpwr=RA1x)vla5Co|SJ)BAv4!g?Q<jCL4=xp4rCaX*
z+mSprM@^2I0#%MFXs{cjX&|_x$gl6Uv$SkY<B1FOB+JR0Rr|mbHD*-(X%gI{adQiX
z+d6cY@K}jiy>d6k8`;XxPu*j>QN(X_x8xYCtK-_wWj4hJ)|I2{CHbkANY2VW(Jph;
zR|>*FnZ)rup}pEAofI)${drAQb45-m1)lMq+nvQwfT_^L%u7R-WL}@Oa=p@XdXN-*
z_i+Ub6Kp-0W=WdST2U0*!j6q7uw5qOBftm3w(vzFwAE3$B<Xxs_mWk_yR&a(W{QEP
zMh2Qw252wf4WzLRNrgyC5mK8!3p$GB!$VwC)h)Oz8yrtBme<0rb78+GOkVPJwQP2^
zL|;F`Zfrb3+a->l<5J51Yy3(<Jx@rt_P0Hv*4C?F5xSJ!4C0y**6%Nt?K@rmI@JCq
ziB?KpCmCb1n~(8?6?B{ix$7YJcy|tDB;Hy_d5(gtOQZ|2;eJaJk(<CL5i{QD265l4
zQ<KA?wlL6hH(HXnAS}#r^h<|BUIq@J>fn~~xT);m!13N7e>4pn(YKlejwHK#^ljmX
zY^jmBEoj%1VuBRmMjq6#N$kHp)nD$9!M_A7ZssXDWKuJa_Z9OdV^=XT&Q!l-Z#5e-
zMte>Cu4`6!rhfb46iyW;{d2cCzggr*EhowLd6JgFhARgrl!u<&M^TyJt1)J<9Ig%|
z5Znp46G$}CcgZKTtGj3}3mHUA1VExuPlYPMH~=F9c@Y|TOr}Q*AQJ?ln_g_=clsut
zS2qT7=Hn}f_BZj^xUWHbkk~BmZl(L5D~fwd(;O0o172W^g16#Jmfo(}rXcL4(D>FP
z?YJ3)Y?!rt6+&<C<g=Jhmbju=ZTi#ILsx;qt{xKMI))?wg73Y+Lf5gD?<jGOH|fsO
zWe_>)()GJaDf&LMVh*P(>7*;w$9|X-jH%I@CEs&Uh^0x*`lL42c&NM$uDI2dKwZY!
z_=Dar+J1|ohCT~=645>$x)NI{C=uMuQ}-h|X_QJEv>S9`ePz2&k)d*}Lvc)(SAuq#
zRF%h>;DRHH41?<=yPo70qDedyTmx)*fR6#Gg_G_4@VjE?M1(cX12Gv*9%dPF!%=YM
zGFH1+H<aSN5bvB|PvSb58SRYAO~r0~#BKg$WhNTd+*10*hMViYC_CWVufS5ZhF}tC
zEpX4?naAksZjpV8gU%lYw{(rP1;Y&Q4)a6uq4hH#J6lv6vD9<-Ai6uOy@0_?3UjR~
z%+@BdRn=$v^KTTkTfP?j77m-0-j17Lfi91Vhn$uG6^HB3v@fQlGe40Q7`ON2`qX8&
zDk~bU>)4T+dLw~OO}!bPsj0W(k(zoNuGCbWMwXg-2d>oAJ8`9^{s~uVs!oqdP1WXj
zsi_)`A~p45{7y~16rZW7YDcN5m*YxJ)oQr(#y{dpO}!FVYO2%<si{}vN=>~6S8D1E
z+(=Dr!td17bMTp(s=g~VRc8jIrv4sRYHAi&YU;VT%1#D#sj27VN=>~0S8D3C&j)6&
zk(6lI@&P#~f4Lh2%Jj4OIaNQWwea)X*Z4X8V}8z9pPw^l@N?FNlBAQ2%cT3-2z~V^
z8AUddF&kV16x_ZMog-#=EkjQ8oN3bc2U0}CcGDNY3zUvh(XJT<AO8I$hW%>^NGDxv
zNgMaf0a9zEfv$8wo8|z`$OAgXfTAt?P6jc4NGey%3d<-?|JGoy(QXRMb6m+tQn|1W
zTz-svZzt1s`e%YFU`bq;2?pV#&z0hI3`cve&=!db-Qg?~#Q?fW+?i5x|5+ptsooeR
zo$TT&v2t42x04QGFW%P_^3Q-VE528b`oc<W5MH69{Gm?#E(hcS;;7MX>Uo%{Iov&y
z5X=FE+&rd>)SY2`g<_5+W{3r^$dqNvC-Nzn<<SXvN1tdKTudQ|56;*EuuO2i9PAqI
z>&~5Ic{qlTOmI5C+2CaJUr9Kt*8CR2N~QSMBNr?Zqm?cj)CkJN!}<)Bh<mr|zG1_M
z>N!}ju#TVR8h%=;`3YHv;|g)?94_&iapK!B;Cbe1*dmqSSQl=48P^ZzTwbKTki}T@
zD3D3iP355+i-uUGJ{n2U%OB>0b!C1dYso8w19i58dQDKl8Hx{H!q539RS?p-+dycB
z=Lt@ULyJPOWrpWupk3oFwNP_*I{&|M-m2T<RlzA_roYx;x_qs{cRS*MRfk<H!X1&}
z3N{%Kw+<7laUU1dn@1qCeS4GIB=$nVId$-#$E1#3jRju{ZF?o(S(gnf>4yAEUewe|
zdgo(T7X7l1j*nfn24g8K2SI=A^wq`WgO;u1XaCzzUyUOB|KSm)Yq!HL=T2YU>bzx~
zTbl2@7(nMN!0V4NEy9ak5j&WjzFLIm|K;hc$`NtVtDRRxuW?=#y%w)8dL7;w|M}@F
zYxn0rTD>~=^ws14%sqYe=m^*#{PQ!Chl?`79ei@{H@~@ut}Y<NbV>#r-ln2Y<^*`P
zGIi)`3h{0qcE-dd_0wWZrbHXZm@)EGpDjUCQ7F5iiPvkQuPlU*O*@qp&?z-hFTUpy
zi>q*G6_<PQLZoo%#dj`QWo&VW2!GDZ*Wt_tZM9B76o)NO`zkLWh<ot(1;}(BX)Km?
zj=m#BgYyhgX{29B;pCf3E7K#^bW3id?^fGu?lY!}J43aVf2Xf{N`~*Cyt2Vh<jD4}
z;fG6QJmAtCjM<<>U`{H$yPXU;!S~xM{l!%(QF_?gc3mnu^KlhF(bKg6P^JuUyHwT*
zuT;D{cyYy-Dx$WIGme(UTlZcEARBDcnjE|sO1f$tyudX@BwM~V(MBIPwA{)el88dM
zRUOAtGdoP-H#9|h`2?yJ4I{fmdNzj_bo*{y(a54kJ?T~jib~wdOz_!u<YUE4of}yF
z_nuM-Dm!Wz@HvMNG(BNckSf!f8=E>Mc%B4Cd78bJ;r&Xm!df#wxt6+i(eiD61tgsP
zLOkk~HhlyzO|qkkL<`S$QyOR8E}gASk#PfPB&o0*7h(ek{5?*Xep!D9D+o(B=4#y?
znWk8@?(HpqR6+GQLANVtMo!RW3R;vC)TE#lIYB2XXr1x|J(^|NLQU10YY0`r&k^q^
zSRX(8<?7XJh_vzBbEiL4)dkl*vW{`xwP3Rg2J4faxfJcFWK8BU+2zXS(9@*>k201S
z4!Dt~S{{tLY#SZ)h2uT8GxExYcu#Tdt^6p2*8=<DaH(={92QD^yk;7hJa~Lq)~4ZL
z5+e*J&)SY(;HyRPD`}|1SAy{8qc&%Elx<<C*2xVBVZHX0pEx^dHFt6$6{i$ZXlG7<
zwd_Shp>zig8n0Hj9i_8VWhl5HDd+%W`Kn4tJ|Q7_w9Z#=(yK0}Q7jg%=%f~jcCZzL
z(K0=a($7x%8EH|qMm<wJ#8{QekXcz3L=ufyC-hYLClzvJZTsAjwNe0yb^L7rz!1p<
zbKAB5A3_cF63u8+nb!9Y-qzcY7xp6O=2JcUTtaX>%{UAsk^_}=-(FI~_f7@$M*fd<
zu@BZ2i!*AYuRi+X3T~IO1i;bJM_)chMIZh6*a;e6F?bu3t~=<|N<wNj2hLCoW6bEx
zW3xUOZN9}TdjWPy47LoG*{Ps$2+%+G(4%7LQ4ad<1iAye_P`+?aHrA-*r{xo$5xHX
zJimBVugv0>Cu3+m=R9=QqCQloMuldC<0;fM8T)S|GOF3w7~a61ZVY2P0HpUe-PpBr
zW`!HRZbL(lq~oT>MjcgiVZ@=*eEZJ|d%=1`y(MsG#E(n^#uc;lKJvdfo(BU|2pG4&
zT=;CTrVNAR8>pWFCKi~KanA;S;rGi-s_T&>I;4y?745rWipZA#ZW{(t@QipY;=!#5
zmr$|P@IXQMNEfMlTk1VJrG{+_!f_Mh+Lt!zfk~CHAUyh>IJjZ+@Ye>^SQgH5o_xEC
z)(r+1hR;5hB&r~2P+>UDp*KnApb+N2#?U1(`23fvSBFn>17$>hB^p>5o_?SOr4qqQ
z+)D0y-u9Fm?)+f@5+ICuLNdKwL37tl<Z!n9RR!If6SPD@OH)BmurgO#zh35~b)|~=
z_<lBp8$clj6jF#1sMP*vDeVMsPssInX<t(U+E3*Joy%?0a^v(98-h%8hgmBJI+?#g
z9>fg}qO}g5%T1d}(hll6?NQyP-8)IUUe{^2>^ALMN!oS0PW$-=R;w<`{ECZFeK+ko
z?Y-Tmy*x>~S=VV#Nz#T(?n-z^ru#J2_f0Sj>l)Km2_{-{P(j1=JQO7fioso@_;~&9
zh_KYfhzONkr@bplOZEc`8uDv!UV>t1*C>unP$00%I8Y#22+NKkLL;UZTgNgfaWV`2
zLh5T;tDU$eb%;)UvQfzGqM7^#VrY@m*mGtInh|RQ>wW;(-tulPBQT($5m0;?LA5FV
zGNgvP{5@sEpG&Fe!JBiDeM`l9sUB?79dSWzyr?(XG4X3`sI(W=wNu6n0UW#*L|MG1
z%nXRvQwiQuR$}}z5|uw*K^CLaS(M+Spr0i{ZWP!O;L8-VM-oF&Q$8>yM>lY{5twpT
zoYHO?er=mVW%lNgdrJ4H+T;{DoBcyaF{)?qGh`=zwm5*FEzjj==wg1hTE)-SkMlEZ
zZ|Na6i1_B^OXD4@$&y<VJ6^AvwneNY<k|v7C|yn3Ke{ew>KZhjPM72?Hz+sL87r^-
ze42SG=HnrIQzAR2!l%Ou8n=eXc3h_Ou>0ANqy#?|y26fJ=$xA(7p0*6kfNRY@fk0-
ziqx2ihTB@x?Iy(>ltbnTM&`PR%wrsxcQ-QEi_Ck7%zKK=dx^|rMdrOl=6yuweT~eO
zYD?-{>s`~L`8ItJsL_fvO-@gl7;Bc{aMqpcEz}atMmc)mht&xsw6LbdlbVioO|Nil
z8LJhIddj3G9^MXeDq;-@s@qGvW(TR25f9dJsGfGO^X+ci2c{=^l{URXDN;ovMe2~L
zdWpMZBMz?=a3zc8deMbE(H7Nddg9|tuQd;+I)C}lX4WgK8M!%UE{B=5ACM(c2z`rC
z7;SiLO&_<pO{bT*a1e`W-4vj~qR1%e)Y*Yo2#`y3spOh|XT(_GMEAmu4U98l(z$b1
zrL*5dBZDnR^Y|crbAk#+k&y}@2EERZ`HN4z4TYcy>8@}{FY5}E>?)g2HuvU>)}U-K
zjgHB44cs}wOGLB={~SbE`1?;&a_bZ7o-MEMZ*&=f<Hr0Oe?Vslo(Ddx9G?tQr)10b
zen94s^?*c=JBkc$0|?Xh`r!}*M9UiGJo#GIS}6<gm*DRh5`Oaw;bzy@nwBKD*MpSB
zwR+I&q}f&LP{d5ojFS!K@tX-2DkvMwvKXu<|40gYRBKSGgsCh?e@~YCVo!Ie_7)1a
z0!F$y!3P5k*>)b;3ZUl%&k{%#TX86jo*!6fUhRjx8=p>X-ikXX_|0aPe6S@C>iEhA
z8z_rlq>FiHZ7ct_7V|nEnP6-D(Y(+0cTP3YkjXzF=S4$wKyHjXAh)|6kgL}Lxjl41
zZciPM+e=b;tPaTStpjrV=z!e5I&f7J9grLD4#;h12jpsXKyHK%$nBs5ay#mP+(;de
z+etfWM(Kdu=%z?y;F=u8m1)2USmy~I-qb`4VZnmLd%yR#1`o*B8qAjy;fW5&d0DJe
z<LS}h@Tx=t>403dJ0Ld{@6h;wTunMfO)7;B$PKkqq(}m9Px?9IptOtP6db!|H=t1N
zfLxyBE}ea-?VJd{L%gBmH)-!#WPkDkD0qT6Nk#fAqq*g35-Yf`yNDZzXbo=SSA0Di
zH?{l3o!ZjD=qgG&bh(?F`-8G(mx$)x#pG8dVG+rs<r}-HH{Zd&U^N`U-uRq8(2W2Y
z(8C1CRIOyK1u%@RJ&vDllC#J0TRwfvTe&gsBr#8=V#LZT!Se)R$XcE8dQ4tQ<<5BB
znFdBh1KwWLWiZKme%nmdOE5vF&UPtGZP{=2Dro|p4jjeLZ-bT>d)tC9o*q`P&gMId
zLqEg&=+K>={kcvBg=7sfZAl-C*i(BpYCL^SPK^8~DjQ>pH$Rm&_3(pR4fQK+`pTGt
zo|fgtOKMr{mh@_}by~nQlSXk?4}gtqINjp2-03m{BXL`}+q*O~%}EJN8HAV8<CB)6
zT?!N@8$`!JSyLz}kd<wXe-ssrSmHL1*v=V4AzlZy=^q^v9T)8H^Cs^3ce>8jo2k$r
zsf8Qi3>{-zbu|7}2Dx12j0rjl0sYD-u)4X~eHBow01=eU4k|ZF_=godPy1U&zi9Hj
zE4dATQFe4y!?%s|K|RKOew>D~RJt9d--RMXX>*2}NSEcJ?;;aa6hL!cD?mwoX1TI&
zSN1<JuZU1=Mh+!p$`fcsRbtq38pIA#3%v3dOc~A^Ob7G42FGAca~mpv=MmjW<4-JT
z`AleU0<9b9L9;P^VEwIpA7F^@E5B;P5Z@ZC+gDP+<Ak`mtOyt_Zrum{-+xf`pS-Px
z)3*%BUM4A^%t|5ZY-D918(qm{g}8WVQiwV78v+&L!V*`AYPU4{BUH2MwK8^-R>aDu
zdj&#-JQ>m>9@6(3_KjhIy9?~wHUjpr^w>hQm0HFhGp^6Tm(q)ys-_d5YoeO4tOCRz
z-m%`RVBNyxgLSK>{uDeZ<=1r;QTVu&e?sIx?_xt)f1b-lE&ioi@-0*Y)@@l*)`F^X
zRZqW@s?_tX0$JC;A{Brp+C!RXlil$dgRvo~o-h@b!j176x9=r$i~IHmmAPNA(9S8h
z&bSyER|s@n1pOTzp!Lli8AmVDcD?$Z4l8?e(X3s)(}UvE17KPoF2=Zf!{mEmAE?s2
zlA0>!3m~K3FuvPtG9NsoPF0_I4Jv(Ee^Y&CMSbS`(g!is_Tem*t`q7JegpT-38Xl;
z1`qRF*sj~hyQwHC3hRRz66muQ@pf=q_|SI<^~{oVv2Ruo5^lB>)^x;qL}V8KYt-jW
z;EH@lp3Kt}o#mBqHMH<GE^WFP#N05drum;${yX{y3x4j|u(&zr%u#bP##UGA(v*h2
zcn9L06a0){J{E0c;XlE9Ki)aPd;E56I#>5)QYKx2E&kSWEsj6>{TYPDpbL!3UC7P1
za!;^p{ju!1STUix5z~gEXa>F6_t10Z<1+}hRhdr0a$x~cHWg}_B;mK~2I3ouL?=Ld
zu226+T@KwaI_qQtw+%W0x^-HB8jexmSSVj}F{ur&jZI<g%2gbnRyNJw(wvA8w1DCQ
zZuO)P(NT*?OcpN?Bx^5-l_0D`MY8~+i>1SiMXQ#(n_OKxQRhT8qd+CdG%ne+IKP62
zukR|zT|Gcb1XvYcPuX{Ori#N6TO;c6RBDhIMjeN{FA`V{4g^n^mHY)&b0BYUW|2zP
z<geun6D9_Rws6OQjY%telwP(7rE6acZWbvNw-s?373@uzsKdI!I)+&z4Z|xRqnrUw
zChXCLP{3>e?RSBa9EWmw`vWsn_>q;Rv(G0mHrceSMW*2hF$)E*C~aY;pdAuz;f1d-
z24&1*#aM`bKy+)}8fL@8!=sH6tcS@uZc+`t<u0?*7FIM22DM^n<{52HN2u|N1?4bo
zs-v52_o|?2l!2?W>eH~5n>BCdX62$=dWmi?R-Zg|+m}!UO=;qZN5|o`TD1|?X-{wU
zj3_E`ZaZ+zJVJgId7$$XP`CW@DQ!uj*x0|5F5;<9OqnN=0Hx30t8xydW>pClZM<q@
zt!)b2H$`-0yX6jQvcmf1s@1;y9ldnh$__$nOFBcrR^x9E8jb#BSmK5+i_1p`NgDo4
zI>a4Crox{TYiO=<C(`%SxMeLG4Z??BirbYD%i6UpYF9kP)(}z$7xo6cxrC0a0#6YZ
zTGA5aG{vGK_-U4{HF+)Hw5C}+8(G?PA2=x5%Jo#V#tj$FpbSpvXgmlfeX)x1_YGpT
zm{pQLMEX(VJojv;3H8^)JHK9K>Pa`ieu%l1*K4~%=||nJqG+;`%v_ZVi5m%{PC8qr
zq$)hi-lYo8ZpIvmkf5Rao-BXv*4x#~Pz|Sen6*$14>B0Bd8SQk{L+-$3M$nfW;ye$
z<yIW(0W&(W+utcA2G9ZB*Vja4X_Fq}AXNn<FKA!IPt1d^7rawwy&zlM6}IdQReZ!^
zWAxG{oyO`43^}4<j<%ebhy5&vof{fV7tf3RRUF%2#mkG`HIB6^cgP&jslGmIUSQlc
zFL_a3@+!JgMbblG<91g1RD~Z>|4N^tfq@yIy`lr6!E~Pbn%cp}6f|{4!r@gZU3H91
z<>B^fd&pd=ddOoo6B`rhChx64@*@!0+2lqU+fcBX-ZpmM%xKrP!(y&+^#Dp&l}+>|
z-?)Dj)w-aHYd5M_(pcG5yr)|GqHfZ6R?Y@c1u17)O?%qHzWN-or17XI;D^smA?u<n
zDO}RVKoDzUjZ``s$_D*NIXgD&+%Rv`Fs4RGsOBsa?2PzGM2}MgK+Xv37pu2%ZR*aH
zs!540G5JHy`bUwR`}e0B=$Y6FFcXxJ6_Z1_#`T?3)z}EpYIprbG2&aFl>*^M!;O=r
z3_I>Bf=VtTv1u(KT>AqEAtpTuu#X6iFC;M!w<$ZjmB0<MnQ=8#uGZa35K^!Y1rY*)
zX?socL-C4^NzO}ge*6*)n0-Y-!&>0@0e<=LlpN)Y9{sHLhpg~d28V{4Qx9O(w9!c>
z-mu5&8i*Ke!CrWu+s-U5GUA@Jy?J-TtH0J@ANibtm$5pi<Fj&~)?i0mn1g0&p23t_
zJa!$++2QTHb)pR*gWNuY%g6TA{uM^7MtnNd#|r4WE%cXy@C-sqbsC1WH{o~O;bkao
z7|+~;)xF)McvHmhm-rcr9>Jbl+RS#m)i1)4={-(Ih-FzY_W5oD=CF#N2yDA>T5V!b
z@H618!x1-h3S8fn^YguWas<v}EsRQO-00}Z0C9*fAzV?upDW=8olEFfGUloFGk5od
zBE@At)D*N_yFqF_vb;$_Z8<?FD(HorphFe3EGK9$f*e(`-Xt+oH~}_jbph<MBe{1}
z*f&@A_i=T6ZO?rA+qoh-PjGfGM|?~!<tO8Z_@f8p6F)W9x|VATHUmhzi{P=%@fM9R
z#;U@5%t-TYg!eAIt-%)fa1<vV8-V-6Xm-2fGUAHI7I_}qso(0=&GQB@EfMN)9BO~k
zAlmjfUpYpslM?&x6%com^(0`B<P)o=T3S<)l6`#fr~p897XZXNi<xJ$ux*coxhle!
zQeVEkZ<FDnEw~9Q(nn*cdN$ZPa5NRWY>Xe8Zn<GTO*wU?g0>$+^48!e;&Bdh&JXtw
zE3hp+liUujt00N`;Ox&3X^c^m^ilD#O<)F4;tKV+_SO7`6|R7$KTknwIR)1V$mymZ
zQo;gL(~Z)?bYou~9rjwqePC$~UfV$CC`SYBCrP8(#-TwEEo?sr=)CB)<6MOMH|?u5
zun%wpd($t0w^4Rs9Yr=NFQ^|F@ZkjXiP!V6J<fzplMrrabA$7nem=6sCyo}Ct}YRY
zUN1@2B_t2p<H+~>Kt6W}Di8gU5qhnR+S3wTTI(RaRrh_!oCLLn2lkPk;6R#h@C|bu
zKnQ#;nlRy%PqEd^PpE__)*AeFeMs9HRNOa=p1Mbj>L!nBBZsP{8&vnDQPnt9&+%Te
zrY0$U>MX!apVH*DboNIWA&lL$CHYpUl3u;Mh9<%cp}ytK5Z1%ci+d!3`5^r8@eviB
z_}I%>zp^olWdJE>lbnP}^-+$0(n0BVWv<)F9-Z{dY_PJ><%Y4g{1g1-_BE4^++m<}
zww}@qw?({05`XP*RPt3i`+nk?;FT1V&emzQu(yk}4q+#)%NA;EjG2F%j#d7oby;p_
zs~|!=$GG1X9#I^yF>W`@)lgB&zRllIVh8b9^O_)SnNK5H?N%@As08B5P7o^-2tWP|
zLDlU&*X>=chYPi`TojpzdU7`{3I;37(6rt}A4*114q4H7CDjf(@soo!U9Ea|6FHmR
zwks3v>I?W8GM1k$%J|vxdwzz#%FkBw_}ThheukCDlTng6<=)l-;sw5(4I=wO2}o~5
zV2#DCx48qC8Hm*}Xr_?Rxav?u7uC=DxGXvt+34ThAUsD&9Pl@*X0n&WP7T;v5TI_e
zrITUbGP;uwJ3SdV77kKN@^8{{)800n)GmqYcHOQAh;BCSNzZV1Jd7Ub<Y*Sis1E4N
zh&K<aRYTp1V93i1uT2itAVFt1ZbYFFC}Cyk+o|8_MKNOA#<=yJ`D|nQr!8#`4bBEH
zeY4unb=b!pk8*ZSv^H*LHB1H21q;XWV-;;F*q=H14$33g{Ze;;xAdG%8AO0JixPP|
z)y)x1he_%oNwj>)pu|VEuD_#V`FCHUWYj|#$G0z{#0@Pxxuj!rcPMzN1a`LkB|$YL
zP%iRbBFVN|Mf7NO+j|vZl?rQrjUUQGS0GPr$e#5Wr&{M0XM^k|+Pl!eMMve+^HGmb
zN<X8n%y1yrT^Wi+-WhWFJ#Vha08+PZjm@LVS*aeOwo%LOLwwii)jXNGgB*%(L8>xy
zH+CRZh2*5%Xttu0w2P!twvb9bqjwV6ny(ovLhHMW<0HzS;hhuQ^7mnOpzdm1q$DV9
zZJ>EGe3C8yED|?1Y);zK0V#c8>4Gw%nz!@u@3{E9sXzk{-jt90dtS5DLc5N^#B8jX
z-=-Rj2pMs;)?+gk32BLh($)O%HV+5<DGl>U8HE}Hi=iDQr3>1%#6^XRy?sMhrsg!q
z9MwuA7M)?Z)y|L78&P&HL*AFVUHgUV_T-PC(fZ7J^HQj`)ZFx4(ddnyh9{o}<>1|l
zeH_e;HWp$wotJi05LjV>4Si=&H#L>T&~C*tClnWY+dQHd=}LX|yosAiPh8Yf!$-fu
zlN|}PR;HJY%50nVt<WJQd)-@d+bj~X&Jr0J<;!nf0p;f;lqcvC1-+0HbT&cO%$f&(
zoD+4Fpub6ijAcZG19Z7zw)|&`FB}y2Sb~NNo8y;!Z0qM^i`Z@rhwZ!1!8Ry`O#_<S
z$y`UM^6mGb9|@b!qW%h5%00NEHIypt$wnM;P{#)PDso?i9VPneVT{y|b8A3I_n2n{
zOg0g2@;<1O<51OboC!QI4qhGhyWh#K;;;lClBGXA*Dvgw#rAo22odZzx^F<+R`iT^
zl<AfNTE4<xs1X#Endwz)K3Cm7OqZMt?${vwTAQr!Qrf|*NovApg{qnD`|fAbLWt~!
z?ZvNwu`6vjIVRz<A4!v)A*sWrSO%qHQL@i{I^x!C9@!ZZLBM@=@4tY{!~4O%g7<iz
z1<oWtJf6GutR5i~BMsi#vilxm#)k*p(o@Ij{Iy`(-BUuzN*<N5+6#_`4QV0YnS81$
zQVEy8tc!e{smDe+?#C#tDOf|fv;|k=J@98Xd;BBb_s5!d9^TP=Ya)3aJ{-kqBKZg0
z?J!oHkIPkS5VU#5FP%vJiXADbwWS%*Fr4?M?AUAdBXLw=sj4$SDbo<w<)pHh7`N`d
zNQB_8{=6%zp2Rf_`BTfLsu@J-PhfL!y8wf;M@!`TLqjlpty19HidcBSj)`jPr-;oG
z&Dr3!Z=5Mx)5>S?!^js?n_LAsnpXZ^Y0h&Oh&jEsrqcE1y5;K4F2?%uTQ-lZr36|T
z=LJ)g30jdE2qbk%#3)UIY`IG*t|kRTU#*|h>8P_1&LHu^I(`z3><ydN)w*e28sVp!
zbNFeUOIe?ZW_H8gRRPbfS_G;XuS({}l&@D6CDYX#)OaeW3YGz@R_rca#CY1r6tDJ~
zjCgsqnHFWPNnfoNyiogKa$}P(Fl9R5gD?#2J{-bu*QQzftG!!AX$soCVYmtmfzrB}
z=ysmYo3T|XQbo2=gKHeBLDp!IwhF}6a<%U6lgCB)HAPTd6yfmJdc4p7kl@uNRzfut
z{5usQ!$uV}oQ|_oK|`aI$2yf$bFTU>IFYo~P-dvx>yC_5fT%G?mC?ke&Qts<3Y6cS
z9%Q$Zhw+qq5Vl~5jo+6V?ia{l0{6T|+)nSK?!!PerEYe50ZN;dy|n34n$yZ(Iy;M3
z4?d38S|`d@`@sZI-bzE``0{4W8)ClfMNVq4f2Za;dN`otlstUDjPOO~05~I;`s1i}
z)T+Zd2&O4cx<vgW3}&yWi<!FZ`yyKaE#&?ScW=zMOBaWOK{b0iOy$~a6Hm~^3)KS6
zJJ90Biq?4HWv??+{b^o)H)1)7DA0AXNhHflv<ym8j!JP1E1{d1LL0ZvuAroKDt+r@
zXg)MsYoLa0TtT;xK-aOI(&q8*0H7BX<*qo+(s5HUmJTbshJFdtwArDW)?(<F^tIWo
zv$n#t-u@Q+4TZ6ur90V$-!kPfxN(h6^3Izd)^mM!{%{+j284rI8HJw**s%8B86=MK
z`O7qVu*<)yQ~r%dhBy5*me`F4K_5=N{?g0>xpMbO#EAt<QmwO6M^E~m{?~j9LLF^x
zBwM}A*#}<W7*6;0fxo;4QnL?eeZ-Ma1_By9JqbKicT2$Wez}_!iF#VNqLDcSqSIC@
z+`Y{J==}o^>At{)XKlYSf|rt8(9eN%3nW;D+rsr;7Arb@sau=jokX|LFxwWiV?&p{
zgfahPyxZ<;1O4Cdp69$D;?-Yk@Tq*Qf#NjgzlZzTgx26qTtDV7@?(Ahc1Oo-IU0uB
z9vEEldBRNR<7e=^3><lbr)MV3Alfn9GKv&OoSuWa6R+-=LO;x*uk9B7+Tp3&dN!S@
zvG#w)ri(svH4~fOho7=PDnowG@=2q%YQUI7QjA%<u~P_!As}MLJdHC^-Poc|c_rdC
zSS?xyIFqcj34x|OOS$f6O?f)rW1RO?ysjy=)Id`zPEFZ>+jB;1a00Gx%E|+r`u0<-
zm#slR0fP4*w8WI3@9erouKMU3_t8(2#=QqWB-nt&xg>~BeiK{bwqg96jeBSc{m&ix
zhh^5!p>Tx0=zrLpUwo1@=STP{?LM6{>#8|dY~q@8(yOWFyyMGmoAcI}qULN3Zh#(z
zGBN5U*2^4mO2WdLp0wBR_>{@OPDez|{x<?;8lZVXyuE&5&HfSIUpemwO2uDm&>>%I
zpg1-AJGg^r_SbPEt=%{KsIS!Qrw9<dlW`9j|6|SG+L1K-Lj06{7KyrU7xn3KjM)Ev
zpFS#u{$Pi`s$2B`(`Ntv<D}U?!%t}+?3rJeuA2SUO<l7eE$JJXtMB`w+h)IKS<>t!
z<PbM|0Ur=&m#}tgHTw!^#ZIIltYhxP85>)JWusU5Q}1CfxQk5PD8&|;@&^<&KNXb6
zEZ>7l`<m33@ou!gG0RH4r#tW0%FCE#m3*y%;>0W}#AXM;L%5N+_sp`^-+xTp-_f41
z#x?jM=dIxAo;AK-J?uYVjj<{8bq@U=-J-7vkLHn&NNGe&Gel~<)SftLp;#>j6g2db
z+_0O$|0g=jy<x&ex8SGV^R<?eBdWS&qs<)~ZTw=2jgJ4kTQ)l8g@}z}y(3cHa4XcB
z9Va<8f$BPKz2F_vxI^qc97E~0WE6@R;$0>hreD<cNAq)w44R{)VHQR({)h*pT>YZa
zk$jUKMY92uj^nNDC!%D>l9@^W1m?#%mb`ib+yZi?3Qr}>njV|r<tbB)JQ962`>9!2
zLb`aud;Mo_QdFb%{X-b*g{4j3FwnP58p3|vYq{9&p`DbT0}IOuX{qGHdQ*4^vkOYe
z{?^i_0h;dM2h(kL$izZrqEgxWgLVQ-dn1QtUgWZi{<U+;P~>fY;&5v2?we?QRXC1b
zv>DjIbeP9fX`xFMD)LvxHCWEU#5kAT>D;%`F@PA#R(FGTcj~&l+4rPNG<^&vt;&T4
z<81LSgQ|-H-NAkea31Y559;~QuEok|vPm*4lW6$d?bKXmy@H0L6=;fPzh{^T9Tb;x
zG^OmBUrOCeR4{UlMy)XXbyZ#!ih8up*p#aK;swtE5WjicIN!C?%BN{39;&o<D%c{Y
zo$mjRc514srBT&XYpbc;=dzGee|MW}uQDH)d2HFoDt%c@=2JgOky(vl1T9lz7QU$F
zytuzEXO3Dl!kskhvxZM3da@&h>d1sUv*n-tvs1mX&-2#2?FMFD(`=|qsi&BWg)Hs&
zwl$giI;YH~*dGB%DE50L&3PfZ916IFujs_v#Z~HI=?UQGG$Rv0^~7ZNl9nz9N%kWR
zowI>+5Gmpkn^q4>-(7q>^%pUS(di4)rDOL^#d7#yOw|VI*lkj=y%bwvvwhEr>kzBW
zHWjm$_t35<t_7!XQ<#$e7Oq<KI&xJ3I%(3{QVoYBL*flS(hfwowoJ&0JjX|F;8M=X
zi9Fgzl9|vhNFo<(0-GgPRJRGTh8fiWW_+<|fN<3?EhH)b>>t+t1ELO!F@uva8}SS|
z@5K%j&r+xJ>XDh{OS%T73?mjd_7Tp>;Ox+iKJ&T-g+wI_1ebYi@%Mwj)mA=4_pHYX
zOYeS+IP8{vv#&AX&6bbvjHCX%37e=qFlXl7mcPW+UPk67iS5d!y-45kX&m{YlP?ps
z9$dcq`%cw`-8WGm`J@#C)?iU3v#fr|;(A{H;~a~gKX1I9lwZFJ*3T2H?Yj3isx<Mh
z5KrN+?vw$?#*{&8%NI%Fobvurn7b+OzMatN;Et7dq{_Q-x8>a}ue=m-TY?~8HD&oG
zDGO?QjoUf^o0L$pk>Iou%y@)=%Cto@8SJv<_k3s6EJ-uZ12d}N8Z?<ET}(x;=XMDs
z(JG(^9neu-06jRvt~rOrWr59>@7fhi9oK0uVpNGP5s*8weILWxcO#`3&za6-c~}oR
z@&si3rd;2DuIvtmEzkpWF+Q#OdiOwZ&g%CQ)veD0Rlofskucl$+HTWP0N@03dbcpC
z0vymi5Cu3hRe;_LMB0v{z`SwyiFgQ8^1M>=j6t<6yoOaWc%xS28ltBuN;0n!{3r+O
z=s)gxYDSjmec5X;_?aYwdu&HWv9Y3!T`e;XWGUt0j}W=Dm=VgbR+(8T`J>GmWx7ia
z3%9#Fa!&As3R%8Lzx3>fMHFt3T>R2sGb`3unh9<p!jBy8ysTe2Zf%*ZTrMUTD{OF)
z0qQ<<O;KGLKIZ%-+U;2`$`u8*3sr&A^jBeY?{BesalxEKpX+D@Wp(M@2$jr|o@_=+
zK5bFX&YC<#K`E(dchXz25*ID4tW?{&u~HJtBU{{4*R<*$Ev&-s@I~f%RMVFt6{x>0
zrhVIBy9lDoz)o;#X%d%N%J6cs@WkLr9$gkVRoK=ylfrsa);|A1Nj>PgHkw-YuFXY_
z)k|$Sj|ED6R2)hdE!-T4=7KHJktR)`<=%OMm4MT$iVEzoeDSf1CP$Si$%y}ocg`%$
zEM6$s=FOv2#&Y4G7o*z^dZ@Ao%PAH=GB^Gr;w3M*{N3`3hTK_xRgv~CDVSd{16Nlf
zug(U=Uk~E~rNWbYhr?l+4!3OC+Oo2Q>Fsqlvw`^s`HsEGEONza*VUYy6|W{^ZO)42
zmaM&zMAO-!cvl=@)7c?-JEoX-GrYe$N-LJb@Zl&<)7g!1f5M980NkEN<>p0jy7+9D
zzoe(L*016<N$OHTeg!SdhcbVdv<SU)wDM>EFm9_Hy>uWGHdYG%^ro8yYNhZx{PdIC
zp+fE~Fk<J~nwc2pUc$V4*O-?uvuO=Z`jU#cf}4b+;F~<}r)*Y@w=QCr_@qB1n{al{
zh5q`v1UlIL1!?{?RD5#kRTr)0gK!J5AjaI<e(CHt$uJzoVjf}rU3q`mVk;Z{;iiWU
z@Wq~%OOO(ZogMfE+iF~rO-QnH=Jkgrc<{No;O}V4V%JwvZnwhWtnj;CLcN~&0)8sL
z5oGG0CPVitrBs_i!K9?x8P~XG$J)SDv{zGV^9;sgbyZ`(&lFJWlx9?!7Jh$mLa)PJ
zIe*(sQyk|Dc~5R3Ybhk_eS-@-xEK-Y3FGCOjz=G78+vcE2?VM&wZZPf^~PslC!5H2
zG{PQFv#>$BvYcU_(OXa1EhDb5V^5%N>=KHNJwV-QP*p&k*)>!T-PH0sK_Lpuxb^i=
z{7fFo{96epI~l0!y_|&aWL<yfHOJ3d30j69etuIsrE;tqkpXspN5K(~LP6d1uWqt5
zmxAA**oSK~iFcs=1UlD)uFM5}22kkZY%+{K74gpbdS58n-AB4Y?bfMKjlIq8?$$s|
ziWG-m^tI;pry43@jE?<F9}M1naTrG^R`xh~WLr?b0%}npD!Q0pyY_h`VSwGMZ}g_1
zM&Azv*Yizt^;=+wN}LmK#&t$pSIx~Ip_;9}nj3DNBRD?%*d~z@YsfWsWkYzug<3UY
z7l_!!4FzQq?~lBr;a}UP;0+%wCD<b0B{CZv%o+$?!fzGXWI+Y#++oG-$XFbE;6iPg
zw(DRmS69Ya4_lWmQI~$p7qu?8s3RyUeYB*YVF(HhdrkU&rWKHE@VT7K3zQ@*Cut`5
zo&ee|{obDTd(2Q*%zVe8c^x8>mVl~2XU#DOO$W%CgX+Ph$-q?aYJ#KhN#334U5ONh
zkH2UmbI0jh8g*Udsf|1}k*8W7I_L=n;l^{_5?!rE;o5@Irrz4PAYF~Dai>DF>n?Y8
zg?e>$uDGg~!C<OB>iv{;(%aUKR;CW^YMrQ^M)l56!!E{gbis+*h%l8m9nkqE+9IzR
ziN-6MnEnKhiw1{t5N(FPd6I9p_h}(b#cX##TX@k!2p$cu0hlKj8d!^J6)pf!bgff`
z>b&r2!#|nIH9=lbOpXmxt@B*fY7|-@8Hd;-V0<TrdHn%4X2`r0Ug2RG-cY~H<P<~w
z87KvdI&0-qXP38}sh~ct%{mma{T7NFS7`A9SE15#Od_B|Pg}@D!STP!(fp>6=ou)*
zc_YfhaB~->xyWF3WecbFr=b{5rf8Gw7InLC7iv@&H0WWDNs$1ix!5Q}lC&u;10Lu*
zDNWxA$}*3>rL%`4OjQt6;ovhCE$~jx1fOUr!)0dYn~|_>;fa^^6u%m;w4Xy2ft{Ex
zhKvP>8u&twH|0c8{|T98{1W=2+5CF4V~E@EH_ALSWynjJH>a?9*0pg?x>lP(cFM^a
zmoz>Yb54W>C;QQX3(7TlnV>BM>Xc~<(no5mnf?L=b?tEgL<SL?kk}j`r(@Rx;ySi<
zJ_ulQVqEK<xV8^Vja!%7@CV%I+L!?swu=(B|K3$|q&ixejE*~&&el6R5ymbs_4Sz4
zeMhn>x=_1mX_4K;ycuVmg9V6M%<~T=ZYzoJ;cKbGsc=frUkPS~T!A*GsBUE6#&zSE
z?|HaMF|9;ksrIjyacz<e3}*K$hIs8yx@J!bU)fMe&b3fH3M<PzIcI!P9c@!v*gg+<
z_^7s^;Ws$L3mPlp9G|2tuI$xw$~yK@bYUZm?~A(8Yjm4*Ij}=oIc7YFKp8CX9w}_6
zCD^89#%)CI!*yqZ6QP~k=HWlv-XrF+6Dc^QN2IrfUyIJ(&{I150G%bxHrWjx=`$AB
zh=@FkKs)N$u$iAMqLMj0vw#3QWN|tkHSBcnHprEXcjdy9E7}Q|=0T;*De1o)MoJ`d
z0jyL4c`D?=9Uldh$rFB&@dHNqIX+mj0U9>MS3q8hSv4EH^fw!ar)LL#iqDO)gP{tH
zH+|>KGO5D0gAN^OYVI)m;s+YXA0(A5+y`qg8hBHT<E?w09(@Z$lY%ubH}NHw_%vnC
zTZR`o(Oyg)#;NG-ck_eRv=8w#)woFJn0+#37#a)A7C!>Bl(D~0r}#oIw!j8a#0z6_
z$8-$AH^%L|&GvoiuVl@0oRRe6`LEIk);4qd7!8kl(6ind2%m)a#-X*|N)oizab7Ns
zw8`aV1Y&lgmVvKjC1)z*z!ev|s%s>kPAR5l2OdeJYlq9=Sv7#!(x749Tx7rZZ74UE
zi>~RLM46|$icJLNM1KW5gPq@gDfaV%V*i(Ez>Do|EtvjVB1njgnlNjT?giCIG#Sx8
z3HS7Rna+r-@Cgv+6K6eE!_!Bp$VwuGCZlDh)1k-}9~nhX_Y|23MQCCxaL1OG5|r#H
zU>$~=ymBxVkn?!7VvlKD8dKxrjy|W{V|+SZy5QeEpFNVxXIm{d?R-4+pFP)+x{M-B
zq?GD0j&{H2Bd;_Kd8MJ88gs^<?04KANOrj(Ih3g2Lf}Oa?SV5T3yEWAh2DA5$`sSI
zGONl?Oe%ZChdE^X6=ZW2K4(4(x+atAQE%kdbl3N!bL(vY_nt<j<lEgBP-g;J9ZRk)
zxq?84Z#&`J%H!+E#rNgArbUl0XgJmZuK_TUzX1+|;!la_+xVo#!*b>d3rMPNRjVTG
zevS>#4S4s)8;jm;XIr>hW(3|GdkTCciJBhCH>9nR!HWpCgBJ7f$YhNzFMSholkKWb
z4d1b#q_xMAMy+1&-7(&+lSHMw(xi0_r^#wu8|QJ=XA(gxj3!_qL~&**M_mf}Q4inb
ze9vLw$xTl5R)h`sKs(ma@QJ&q1?ejGfO>~`>TQ=xz0;T<Iq1uP26(JUeW(W>mkYeN
z&9v0OrA;@&lP=+*E}^Vw4;}6kPR>o(pM+GzNYTER<7Pe7InoIaY1wFq_9Bjr;Nupi
zB*%tJ;o$LA#{o3W$&5NDGo%*O!py?Nj3Yjm<)w$z8Oe-pBWp9`v@@~Wq~nUaiycd8
z(4Z015=-N>u#}I*)u!9r>q_Y4HJP2e1wcj0jMD*=e8i+H^J@x-t9lI&+C5q9#oqO%
zR+z>SoV#2zQOBie6=S3rW9H-HYMHR3T~r%=FswjRRV;}c<K1DpnGXl!?Qq@!cuzZ3
zmc&i*;V4d)#Px7xNn9JZNS&^@x!@pYNnH7S+LB0a)oDZG05N+@*)|vw*Siz(pw1w1
zGlP(pN<J3wUl6`*6PI9eEA{bPa3|o$-f-RfI9(cE>KxidcYrpsPv)UL1GM26Kdg$+
z=oQyz{fX(6jl~rh_O-$?vw!D_q!`QaQ;ZF|Ee4b0@~Ve158q0atTy&m&sqw4Atz`R
zOyBZaDyS{^oS=sxI27%|<g>pohfF?uxN=-Xi|3Lf&*Wq0>?F!SspB%uKlCumh(2en
z+_j<KPS-*3h7Ebxp`oNhr};}XpXyj!zRl&6-c%w(BCnh5Mfp6UFCIn=n>oD%+shkq
zHT1Aa3AQwySW8&#oA)Ru8Nq7b;$3x`vD#O7N1SQiFYq?uZ4JK1hod;L+9$YTwZGx^
zaI9A6S?xRwjUfD(nBx@G7QBG>pAO-(c=gvByn>Gt?~22D$~jA%^Qdzkbk04_xkHXM
z9rbYM$&prA=C$7wY77<LmT5nMiGO|@+$KpcCJqTnF>&eZ8mNM6mN@RgTu}Z8{BX|z
zGRSSU$l&n=@)UsA-!`k7R|n=3=(79Etz@@%*V$dm42PuSENO(Vk))JZ%~#N_rwsY1
z!e7w7As<K^Gh!6GsnBbhiP&)l+lJ8Gd$_Ze^?WvU;^kdXWe09eF0M%9D3a93$O2wQ
zq7)JOP^xUO`YqGrXFp0}6ozV^9JwDag{ic{%-|RDJOUW(Q<>JtAF!=5><l~*fIoHx
zpsN(M&*sdoBiCrGB=T3CBb_mz&}l}Ts10@l1{J%~OV(qhV&_umeobrLO$w3ZXbs+B
ziK8$cx2e+rW-A5mX0;wjBhA;PzYWkylD6>Rb2N@edtk~;W#M);TaeN1Y7+1R&KqZ2
z$%suXKaW4@6dwgrt^v)pzI{GUA}U;?Jbd%2)qBt=CyB0bW?gQhG`=ECUES2S?t``{
ztH;r{r&>_MJ&sm7dnu=6;uo$`m)l*;bdKRDy3GDcz^DNCZu_PGPSW&(MTs<>g&&?R
zft&LBgI_;P_O)sxiH+ZTc^s02qaBVXX}nw<jic2TP{3Wtpr_1(v)-_Mmg|u2toyZw
z2VuOBW^f%~w5N^U;NAmgG_U3jY;C^zLDviYP!L^e>rOJKC0qmf>!w7cP$S;uXPH?0
z4c;@)Htz{|pTf&qp!jeUCkb~9t|Z)%xL(3t>m}SBZ6@KS67#H+aC_t3b+#eg6R-YS
zgJ0l7v?&hfXU^H#IXgP%r_LGXoFQ@&2?uQ_!~!m5dO*`KyMr6G>$XGS{pv;}kn}pS
z)qFxyeSOeNCh+d^_t{C{U5_8KXSE8LJ8FB`7D%=k=H9}*Z`YU~XHo;22G%){1U~80
zNDu;Bz^x@OycbigB>r~dV+CEFYEes`Smmx&2muv<7PM>H#YcYywr{J{+43P|2|xEw
zi6l(Bn8lD23o8Ni)2=B`n9`cwDLO}!3U@k;i|yS-F&_G!)|5nDA}rbRmRCFF#LaAO
zGYcn!t%SPJz)|ZB^gh|MDy8dBwsJhy{6cPfoWHD7nZ9D0l_$W+dQ9i6y>M&|R=*<Y
zmMyRB48znK!n3;ewqWQ#{Sg}lz#%r=(|4t_F&Ao=M`~y65flM|QQ^;bWdV@H)5N7d
zJtzC!4HR|O;}g`$Ith_IA4!DBDEu`3=C60+u}(rHHqx$Sn@CBD)0@mJ$IOm(oQECi
zjj8ls@PqnUt*_;<Z|Uq_Fs?3{*1DJe<hNng`)g9+wcg*_WEb~hh@4neY2DAW(0lHg
zN0`sLnmAH8ZSk&j_SGb(Fwf6NV6C8uE#+!$KC39q4!q!HhGOeMPh9JU;%M2iZu^|>
zdDaUyDRb;Cz5?f-B+g^+nCVKJ{-L^L%Qx)|<obZCeYzVQ_821IJQuF{`R$7(63YMb
zQm1UdVCM}h&C2cjMWrRDYbosm>;yvc!Wjc!x?2a;bks4%y-WhgZoN5zYC4j<1mSG*
zY@7A2CQ-|;<4Dn~tZ>0d>a-<TVL|t{RO8DO@Hc{;mIKQ(;f|xXrtm3_W^bGrwt^D=
z`2&WDqPZF=x-jgv(j2j2_um{v&Zj4-28<#X;N9#Tll14}-DZw?Gk8zO+ZtSi4@Yqt
zMVfFmikyY(N0EYq-IVM|ZCYsy&L(E4g4%+k@P6$OPR6Uh*5G)23?GWa`IU1HcFz9J
z+1ELHIA>QmMtRed<9_PZWH)LQj9}E*^6HeDJdKdls1c%F((R@%NYv!x@YC(?hwpN`
zT_pN1gL?s(zsy9x9}mtZu*I@_<f@dKoR{6HWJl61ENO)AXCzgp!zpNAk6(mQT9iL3
zH7=zYUqThcqV0=Pa{NsayZlEgf7#2$qgUou_q%7z@>PKf{A`?HO(mG%6Wp7d;7Jlt
zHtV(>qv6#{mv-t*P7+HAKDBeC7v-LtCjk(1bL0HHioSfiRa9zdqTv3MjWX&CDItC}
za48|qz8UFDbc=Y}+DT+z_CO-Cv-oL*m$jK7N3KS@D7w-6e&KOQ@B5j<F}D+ruJpch
zr~;aS^uFKSL04Z2jT12%>wWKY_WwWB`zDfqU$tCYa0uSBGS*EG!n@14<~;!Kq35Z`
zPQr(yIQ7_{<EqE*jq7{t4Bun#WlPAv>R9u4q+`8!1&lMwGfw5moQ`$DQ`WHt-=B1>
zb?`&?w_*M~y8Aw)hum8X^K@a}t!vCb1#{G0>?ZAWU%8M8VY;vEN~zRW9(^?KD-A<h
zgWi-O|Dw8Ix}<6D%VoRG0f^bI@f@nM7<SfXUv+-<66?WcKhM3Y<sY}?mTIgo)#j;E
zZN#1<(5Y1ETV58qq&79njk!4w>AoK6i;pB#1?d@GAU(EQr2FL|{kcbaMlRAJT_9bz
zTckfQAxt;Q{vK&{F49-j)AOpo*d<l<O@x>YMh$ue5i~~slp-gY!5Z&SMSu4<?8_;E
zfW00Q3T<TO6D0mQe@+<lH2k#YuH@e}W9r^LsqPiHYG~8t!>PZHEaB7fp)6E8=6(1w
zvu#()L_N#%@Ih2LHSC;-3hov!nA6$OhTl-yY6>nnP7Y=!>DU=+*eag4k!WTOA@wL`
zKevHSFQKL(E|2InRP?H{c|4XQ?xJ+`s<I<tjkl1SX34dt-^MfB6Yp_Ek%T)EKSbI3
z`Fx@@>QWFJUQI(Zu{Qr^#M*S~*o9c@^JXH}7^Q9VEQtU5oC(DZC`k$XVMW<y{j?wi
z3c_n%)RjNMqAq~c$sEvW4(O^bfP};W?eBn2?E=UwC6-+cK#>{|8K@_bq916Gt-r$i
z*7+t-55;@(1?D{%@6H!Wwob-}qd3XdU*bx(?uYAT>vAt!4`AcLzmlyJMj=~Iz61#<
zby1`ElZ2$W=O>SwY+Z79GNwI<A9^i+Hovu^F>Q+$LpxY#ckLSO+e?_SMSUjP3t;^w
zXRe~++r&KTN;~>;Xv#gzm19EZa(EeUCm3L$+^#ebbC)bt72#I+)RoxFVAjEkhb}mL
z=K^C7w<*1BS+aw$&w_yzru}<<!grS@8%g^t5c>8H_|a^q#whML*!$Uz=Fl|@WjAbI
z0d>_yHkn87Qm{Tg<Z=l_yEZDicbzG->y#(tb-B$nRdk)Q#&t@~Cexj=$U$(uL~^pT
zDi3D4rqojM(kDA}yYStBAo5%nE}h*d3!%Dk7fXsyUJSN)Nin^1^ZY+0UHokPFwGrL
z=QB;78DG8D$<N>!VAmE|+k$8D_PEG;!c%yUy~Mn&cptu0o#F+2IEquJSd6Pq@d&Q(
z6q6>pDZ(x?Y_<gt3X;Fp;K^t3S))ar(kXN~y8Y{Qbd!BAf}ek;0?|$Cch2c1B{uyF
zuDmmm^mFl3;}PW4wWR+VanNFzzrGO6`*e-@&uHG_VH@us0EWg)YawfD@|DuqkE38>
zs_pMjhUPOU$IK^9273F7p1y7k#y-_qHF=oHDEOReqV+CiEQHsmBiv$=jgT?GOb4LC
zWP*c0-5MM#GUsYGdjl0~Hl?$-hO;Q$5-VM4(>vtGh&h1N%5wmB5jhgQI2RHf=}9y_
zm-rX7xQT<2sEA)kl-6rPCS_?7J?Kf)|GtDoXfIb&hJ2miPcCT}D$yVEkS_E{Tkg$4
zx@Q+iCv=N+R36etJ<?-xk$%(GxuiW4q`BJ5+f2Dq+RJigFi?0QDBM+3i+s<x;5W$$
zte^3Gr3&t7|H}(7w=59cLudIGSd`lWeYrX<8=OxPmdFGczC|;zH$ONn71pMviG+SU
ziH5mtgr`u4+?I5o{qVyW-)l8Acjn}!doQq&<_iE8E<J=3E>H3!rg`$_BCY)S^Zsin
z$M!cUcerRmp;TzQQg`cY`FoH61WV;m?B!G`Jnn!(D)IzDQHahQcWg&Vt|gF}RsU>o
zvx~NRehK1^^|Iv`2}?FOg3`D(Ca+xC*kj67y3-y?o4}D$uGUGEt2BgW*47P8xk^n)
z%UyH2^Y*4(B{R`jx$1wbBczn8V*C{U9<8J15Her6BKz`RT!nJA0!o-fG}Bu=XZ+LB
zT;<BdG#f{Xz&;u55N9AgugIhV=Rc8>5Qi%?Mf)9|vVOi}*Kh)HaBDlb@~+{eKsmUN
zpX{tfZ2<At0Rs8HA>NJV*(gzg_gUvH$2<NC4H$#);V4c6Mj5UKj5Tp1Ey{D#T6h0z
zEo$kmuujdnNT{DGdkqg`a)yUb7n&Az#?7u-biU$5{1EPnPR$Z&Q9HC4+BdKp$I4kA
z+Di>>G7~xBt<+59KhUZ^y2+JGTGbo)DOZoq<?{V*P4zpCNK`eMpghy|U#LXG!O%Pn
zQmNaPA!TBfXc?O;{ymjw9j5QTD-G#dCHmrWgZNRE=(z}{dzI))K>kgY=ziL)YnAA?
zHzpnP1pH8Xo|ejUJ7%ZDERjky9a!1N;P6xN_WYx9_{n(BcixlmZhn<G{B(RciW7(b
z8dn^CG_L3H%0r#J9LD~Xf1v;&*%sfB@b3NiDfu99<(53+-8y3Dvs&Sot8O-La>p03
ze{YFn+gR5`b`*O%TrxyxONZN!0J}vqfDyhN;?=EOIWB#yQ#m}ZYV&_f&F=Khi{{Xc
z_7myoomUc)n&a&IAic8_M}K{2G*1W)bMpj>{Wj|)l(iyU*}9rzHICu>EYKGG_T^xA
znQcmDNJ5*HAK~-7J2%g_9*Ae<eQZ|VejR{}Rn<8Y)FJ}IRZGymyPKmN_joc#>1}hA
zj)TITT%e6~y={Whu^Sb%Nk!z^-6nc?dAG$@y`il84rQacO$4&RM$|N36>ogm89kHL
z?&N&dt=A<ieI<UV6fDkf5NB)5Io>%Gpmjx@wqPr~Yh7);yanE0Iq&9pAGk)mT!Rls
zapL8T<<4jg2IBI3vy{|pJue@@HWd)gg{Aa|_q@dWd%S(FwQPQecgT(AZAt)UdT&l|
zaDC6;fcEgUNiVn?Kb4(FqON-Zdqtg|oP)2Ez4$1PQyhJ;!#Soi&Xn{e(-JPdqjNds
z=38nSUiOM4CeO>?X&!naJQ*FWg=KyEXGE23@LRf{Hk|dR(FYVXQqo{5L93TaapL0_
zo#X5NllV<Kr!PyVU$b-kN><S0{Qu#X)>GvR<M`H~L|4|ORmp@M*S{uV$G-R>);C(4
z&ylbZJJJ_^fFMHk!;+j2CwmC8VNTM)*4uEML2dz8)S4B+o7Rv4;A#H|4JG{iKo?i0
zxH6p-u(+ob_ZD%`m??Ykf-7mG=>5`9b;(IxFP%8#LE|H|b0)Y;0NLOc59iUGEj0Uc
zF}PP{8&3^akB+|@jt$>HPxE7EgFU`zTW?@vI|g#bCp`)}c2|XpRdZbcGxTR<Lrpab
zkJ!nT9cc_iwr*Fu45su!F3hQCSE$~SeJx!5x$Uj1rg|K!5))Rpcff8G_U{)t@|WWO
ztNh@cc6d*e>H?}LX~PF~ds=bXV2J~dNOUtuvgNN1*EJx)EyOkJNSJWUzmXY6`6Djo
zJWFin32iI*i$sPybE6iE-NV9CF5HXM{6pf3?e*6l^cW|we-<tSIQkk9PB>2VYbXof
z+|E4teFrKA>sy|hdpkN_{kI-kwjNf{xJ&c3+wmOsjNwds4u9WrF~Perss3^yOIT*1
znOIfvkU;!J`}=%IGZc%RY&>Uty^7kZMO53BAp{NvaZ?;eFRlTHRl_V(egXN@4|)`Y
zCoW5BiuCB)80QANdcX&6(BKwaia37=f!DDM9pW_LsPFdK;9+i4W2U2g!>iX|m?^)F
z5KwJPaVY;L%G>R?|FlD8`aRKVZ;U1G#uHtLQ)1~~NYPY0QPRFl)qxML6cW_bw%|3q
z`XhAtwrQ5%dXlll!vf6)_sQX*AJ6g`m*TEC#ZqAA0uvML!s|`JK3!oNGeyLEX`xK;
z4%f1Ar#HXaUz-h{!$*y^pdQ}I)dgT0HCN@M+i^)geUqcE!B12Gg6=<zVj;!h*h+#_
ztH?|gS3Ew)`|bYfJ5t9-^0Y&5>-8OzLacj+mfpf)THQZa!eMVa*GqXuxbje(f^dK<
z&s`U|%r9iF?#uH>AGE2;(-zF(Q-5)Jr0i>hMvnDVHY4rfFS2nzoRCvIPuk7YZ81c`
zE^T4uRJ(N9PE7Y%puxGl7xB6`pJO|VW-TwWHd#**pDO!c6AIE<VHpXY?7-eCGw%(Z
z59jrJdY80eb*rP(8JS`AD)5Cz9F^Sq><z246@D?B?L>(*2~U8L?*X@C<iD@BDLcRg
z;VZqw$jb?Vk&nK@N^ua7o{_8C#TSbeZH=%o{FX|68L3^9w}qwexfU=wWBU|E(_43*
zJ<Ak*QU2g1bcAjOlax{ORaX2(KlKH?({3>x<Yl}+yUo1I@c!v`X+3Y^!%>{Ho@a4a
za3yaWF4qAp#&Jt7&2@)4MShA*fo;Ji#2lxfwxAgAj5`c(fLDLq_o|ew7KhWref{vD
z1%Bh470&tCIUmYt4);K5R?)*s&cT8F8G^5L$e+ZkKSH0t+kU5I`B)O#;=SRZw|jJF
zZ4G-6=T#;#&c2t?LUdZ`MZ4msy`Ke5?noZ#H9F`V{(*hcrUTt-p6+y@3Bb}=18@r3
zH{cfu%^=Kp=S2I0-$TcgNmVsh_xSLd*tCbGlEf`5hzYkpovFoS)t;%v5qsuLExx*4
zatX{z|8wx>Uz`7IjAq4eL35NxGb0zxpA3!P!Jk{$HC<sl+iU;Mh2myGDlT-ZQ~iEz
zGO{*nWNjR5<%+GhOB}fBoeBB_!#rR>vZi+_(ae4a_%+a{&59^d=hi^~@^~_bwC624
zX}L2mNm{cJKdre+i}X2qS=5?pn(*#tlF@BUxP~>UGu{miZ=(Qo{58U6^W<J6Lqwki
z2SLg9m-#W}yZz~y&T~$K&e6`X`MGr7?KUIP*Y~-yrnJuw2#U4SPdmrInT~(7bNub;
z_?tS%UzCo&q;ve)aXj4QEPhf^|MTbHzWal#n@oeB;-?)>26t{dG#+5<t&P91p<$sG
zFRlNJi>ICeUqvIvy;q1}eFtQ;ZOujzzgKN3gf+@X_p6`4tr*c3G7d+kPwkvTi!iEA
zI`~JoAn&jGR=6(r_;lLvDN3a-x87bkU2f(rwi;mCZTS0NB?C%D*m{!b$$oqrMEdr7
z_z6et;|FdV>A5$Csekw?k5QmcmWD4LZk~Rn4;)v;&%~-ySBTLRV&_b|&IHKVtD@BA
z7Udf((cwXKjYu8!?}RqBty&#k$WNq#mP78+g2sM0{R$9U4}-5`{qVHONqKuOkd|c^
z*K&j8;}r)VVw<vEQSLhhdVK8*F*UakCsK$=N3(H^#FjJ)bSO>~3a4#zN-4KnYz>Om
z;Ifqr12Kl2(JpD3Erh0w?kjSfpIef@-PA=%q`AzulCx<dM}4`K&}3IO`NdPQN@8ra
z)xRuSs?SWc+6ttbs|8QpGps;~7?z&Kd(d4rEVbdiae;Xs$NM?n*5EmOIEvF?+k!iy
ztu<IE*9ppN{U}>tra}|x!C0b=%e647@}`x8yCDTuKvmA2cOOSTGNZYS2{~1*Cx)sv
zRp~NP{o&Q6r`|g}@zx~Xp^3LT@m3{XJs6`u?bxk|{Mq1J>1BRg?ZA%&czJ%l1c)T@
z@w^%2$K+@*2o43h{=6nOndU!4bLDTmY*<)FzOi;bo8VOC+V4R{7lJwpmArQ%;c_sL
zkWyqo1Ni#xXf<WiSs>Ps%*$miou7u?ezJ0mg4)83IgcNG+YO}6HG8|!d)!I72&Z(m
zZXuyCDUwB$?${#h$X-7$+tj4maagReuLtI{pkv@H2T|xDcWkN>!R-Z>#>KN9acE0t
zOJo9~xcYf*4w=+kk}FKf?Kz)$ZDX3sB#4MmKq0Q0xUhY;m?feSAqCAp@fG<UH2Tjg
zvfh7Jk*~-)zamlsyR3+244o?S2pDoJvYoF;^NIgWMK=BKDzbGK71^}Aifq<ZMZT0&
z%W07jz9L^wa~08hFA;>e`5h|Ar9C}L&*_tnnYD;#klMlpz3lo<*$Ui)JTO|siZK=s
z`x0%=%esn&$qcG=&fy^SU!|oNjOXj$=j)CBJ1TZSn0$8Fs5>fd+!Yn|SnR)F%)$Rn
zF&p>FFXG_tidfl25j*<M?dUT%ehUVMmN-KC1xMb2;G^X-XQB+dV1MoT*1F^K5!ZFk
z@}|~pk#f{DC8i_k-u^1tCStA^Xx+?Xcg-i=y70i#ra3uK%WsdMDif&n8m1(8nq!Dn
z6wu?@v|&sFab*ngb^<ZDVdDhiv>0Mx0<lpi{aQC}t2XeY>en$OMWyXQAu1i)iAorl
zG!8_=S-a*?e8*(DQ5AOah~O(t1Sds%j~xMyOoOAMap#OFb15P`6hnO{MOD)oH~J-r
zE{#FB^<3?sD$u-V5?-G@*Tzb3D;Po>QZ)f^4PdI0KNl>OJcmqjSz$*i37{$|F)ueg
zN|es-<EZej`QkHH?p=kqc2&`SfkF9v@nj5DoItIc=8KzSh`%yb^?b2enlGASh{qF%
z$~0db9z$H8Ky3UU@x@?Jh-AM2K`zPi`NH;2r1;{x9KM*?RF<^m)3-!4>Jyc#3#Pa+
zhWe0Mc9%>sGX}W?L7Fhd(S+wQMSq&KOQzUKu+;EGGRdvss4kg8BffvUjk^l{A}m=;
z9ZYMIM;=e1xjBhoJ8a%*a$R)}8Oy%Oq^<%#DqSIE$(__ii?caL4w8kF<+B|QO$=Yg
z4~|E*M<Hi|9xa?mjSaa_Z*?Ks_DY%uC38&G3iD*gRE70e>sEB=`iqskbk~y)T~9OY
zOx@O*4jFN#9yMKE&@ljW!%EFAQn7y4)cBALkgJ#c=*wG!Xf$Q&_RwIK_&@RT)>Tu*
zJhm=U)Ah?+wIU2l1P$EL%%z7ImaryMD%Xuq6`d$#b&F;t;qz)%J}U*nkB(qxY_SHD
zmwWK5GJ5%o5FQKzgpdftJ|Z}xu;Gq#YdyR)<_}g^WX9DnU95$AYBCD;p>hlDEwaWn
z%`a+oOmbee8!c&u%#O7cw!*p#E-mx}7qOpCGdHY7#1GhmK0GCFt)%f;2a!e{7@E$<
z8{2}ZY=Kzcm?t<I?@JHctZWM24IeS@5qPKIZ4HjYhod-6&<@4b1nodvH!*2m?k8x6
zvHQYJ%4S7Rt!hKQU%~zE?4+xFiXS##7aX~49(9%Yeovb*cj|V3O5wWB;d)wI5^}ms
zgsYowceKZ$Zg+^oaZV>3akoo$$DRk!299*+<2~U~qgNL1qGt2X!F%aqk?ul#IEpKT
zbhB`O&Q_2!ao1AQ6gSsRau(z&jET(?#$itp>TrAPCCr`I2JkpRaHqxfpmMo><-M)J
zKjmw+I1I{PxUUZ9eB_+>obv`wVbnG$n!2_z`zFFR*ng&LBUyg;z)u^!NXk6AdNr#j
zJs*yB*4!s38$BUy&HcE+N&KvTH&oS=kY4xqDQm7&t@>=22G-kM`pyQ{3)2z7`;AuS
ze6#9taqgH^9|eZG6r7B8by4A*;9K{-0%s%_XS)^q?Q#vT13{27ybflZP(dTZ>+Y%T
zX=Zpe38aO^Xv0kLjD(m!oMi==eO-6NJeLtkl3emB+1&Nn4ziCC8h(NgPj&cJt$Ez0
z5nBQt+O9KI;bR`QEL`MZt2hrveg)y^`H8`6ooujTU7n^NQ&n{`=c-2oz~zcTEv{xm
z=W7Tqe;$Zz@Fc$(yEDGbNzp}QLm6_iewhRd=E9>3u~!r{U;C=#=ZDTIDp)W>!LkT7
z&-KCA6PztS0mNc|kM`&sw4S+67v8%%;r*5HUfl`ro&>|P{TkRrc`$5doNl+`{Np5o
zj>-uN2{P2$e0oMs)N_KKnFLu@;@L+z(m@7)QvBsfJV93|=#M!;zf(|do(%*UnL6ir
zprF%vifqbr5Ay7oLZ_-q5o;uLiQAyDo&v1jIk#Q}SySXy@3Y_JX4Rs03EzK^)e&t$
zvL(`?X6bb2hW<N4ci9<^?<H7^@WWo`U7gSO-q78UHgrb<;;bnU`#dvhw}ns7GDG)I
zD0;4;`_`D|{vpwGZtB+1ebo_QG($H=&v|g9Sp&6&Hpdz$VPuBSk$BV#Yvrn2R{H>L
zob)^`pCjPl!+6ZZ*x$m`2f{T8Bi*#?Us^U=TRj@Sy<E=8Ywm*DHT@BOPCc5R)3W^h
z_8xvtf0>^%F5>6R8~8bETc9U3_GsQ($tF*jEN9AhdlEJELVk|^l%Hc>;^)|}_&H9W
z#|zJ|?YiaLfgbn9_&=PcWaFn6$@%4;V~C$Hlb-{h=jWg``8oI-ekQKR&mph#bLd=t
z4to#iy6GRCd#;j=+3ELkb|0`WQT3Pev&T>Q*)zk>UccgJ>}-DaUc%2lTk*56?q@36
zs(=X`j9S~ir$h=KcQd7A7}$)!(fiVN5i1v|j^!p|i3>jkY&|<(LMUzeP~r52YEX@I
z?^(zC+pI<Q9tiimjpdqQ04maG&Pt=vVz)3*jG7L;LQ$h)RkNKJDfKxVrH;3ElA>Yn
zDAO9tbk?FWkGs{i{nD9YPgkx8r1!#Nt3_*zvBIAKF@e-^5F<>DbnO~ajI5ve*x7;`
zvD9A&biC#&6s~aQ=~W}oV9sIhe3#CCgEhaI$5qvysYx@GWK=5hNjP-0dcozw!t6!t
zo1VSgG6}Bld@0*;?5EgJN!o(r@xJhcX)VX#U9Z)=N8vrDO$y93d^n1e?sqtDB?`<T
zxTfzGH!uH{6IMseOmx50ZbPs8{d2k#37RH-fgh2u0XXvX3V)f#ztH{e@wlX;+~jaQ
z|Hn?a{4lZx%oi5+NLF)v_!rbaEN2M!Q=Q1_ZpRg#_>;of(f6i#&?CXpc}JfNYLwyf
z;}NPeejX1x;eETN_;!{udQ3k$KMdRDyoPvuc*Gc6nyCPypwnrE`NwJ0vC|3zoV`Uy
zLDQ!d&UX-csT$5nomM!C2>2vAtzi6z1T;-0nR*_1N+PNc#811N&9;r)c1i2N^zTv$
zn0^J}_q(L3d97+#PQ`8EZiMsnbI+#Chc+#X7}Ua>VMxEyCTDfS#+qREV;_s6n_r6n
zt+e5siOBQKm6^L;lhx(*9pHz#fQJD{LzEpyLkN*2U;Uyj?b*6@>Fi0;-e&prw`gMy
za>#9<dT<-5S<>yaf5>mp`2$r#CBEK~$Tkb!+&8^*>Z=`W=hRFAaNfql`Q1ko!u_F7
zY4cK|4kOBGP-DQE30|1ThNj>teo;X5ZfJPrUsMAMfb{AAh}-&--g46?tOi@ui1aU;
zQm%m5A4)c_Qt!06qsA&T2H>s)vr4w2#Fg4Enc{mn-)ON+T7mV+I}R&-5IhowVJm`%
zZHKE;_g@l>9ifh^ZkOuC`VU7u)>xfRz_V+e6J+a(3Ms`D7;_bO7V|p=j{LzSSEFun
zSZS-FHWar7>q3qJDlm6H;yv<d6Gi>;-tW9?;a!EdHP`?jj^ZShN^m8WdgFSjRC&0Q
zO3z`MN>MGE#CfT7R6`<_4#p4nKYm$0_eZnHXissv6=HnZV8axyQip4Lx48O*XVv92
zCy3%BM9WS}`s5S%Db?1UFs1vXCtxE$TIqs-C*$4kStH;{c;9}`ywmUwctHd_6(5e`
zM8IQlwZUl$?g%CgIDTfo$kTB)cD3e;U(%12LpYD+ak9Dh(qRRk2%;^Rhxc=E<Glp0
z{y5i%k9n!$a4vGrxz0JqIWwGdnsXZDfZ`b3HJ2K;qwwmF(8+lJ>_UH)gdXa>+yvkK
z2B(j>^-%o_IjJ7;>)$vMYX~_UKO{aDG`V6g8WL(Xg#4L%4{S(iGf#IzLJ6?+JU1nN
zo?;`e(^KNtjx>ReOkb!W#Yn0?-}ASrDe;A>F5LseNn3asDe|{2-E06|&Y4ek8FZdA
zACg44b6ltHA;l%QVTzF=fA+j}Tu^4uX8}VePHjpmB$~b)ZAw}<Z*Dx2{cusY>v~ht
zC)1J^SdO0-Xur6-7Wjtxh8q~+-8Q5#VMFR`XxN{74``jTaESAC9<UDrMf+X+Sh3n~
zGztd2$WqqZ)OMpU*_jh>H(JF<UVKM7{`t=F52xcF=p27TI{xO)@qdWp;eh|icB9{)
z;L5I9*qQjD@bAE#%i~>bH&Qnj=Y2N;UX5m9V@|eN*q<in&%!E!HkwA;jSA*<I}2Oy
zmtg#t+l{oPg+3$|x**(jr&!5oC=butH&NtzFVO0J$CU8<A%5`o<L6aaKf;UH&}*v5
z`78k7=@*WLCu3#Lb%B%7p2J!E5N@kkUG4^w`Or50ETL3po+ThTw9pz9y@J%r3G4i!
zN_jcGH~ZODbR^n7c;_xNIky+y<<47=cjuQRr}x8$qd3XwUFFVb4MySmy)ku1xPk7&
zMo8Nh+;d?pE$>Raci_DQgaF)%_m{7k_of8kdhd<;Y-a_2<nfN1q`=qUhnpTEQ7$*-
z50zaR93>sqvWTAWIEPbG_-*{)JhC%RudwUNEC4QlNp>oK{6+@Iu!0K{Ofqj}p6(>`
zYnJE#qV7%L^cu4N|EH7Oq>-c>35}3OqY+sMf`~@Y2x0^gK@dc25#6>yLK2gnN9;?G
zA;U1X!Hg{lI;(EG2xBtF5bNBYwyzmm{_oGJy4&+~o3EMI|M&ZS`}OLl&aFCis_N9K
zQ>V_Ys%uI$D5Dh0zw$~~erohzNK`!f#}%g^`g76;73be9oxid;y<0lHyg2;_b`81u
zH3c)4(bq^?d<r=+Aud0~wM=9G5?~m&2E?+x6`2riO0`L_+&`5hS6GJu*qDs0=dkZr
z$Q(8#g99&rY&TEGofn?4c^ek>=}I|-6f$v5K(LP!05h%k=XgVM4(CR`gU7_Pxe)R}
zZ;$5<^DRW?lUtMF+&`TEMf_C1NqBNsQxkR;gmQYA|BTtxj^P~rv`m3u@iC4?Ixh2=
zU^L$Dl$sA-*0}(@)UFCQD=i;f>(HaM!S9f~e9zy5N!q!j#m8kXK2sjf87}2$%iI;S
z-cHN>j<j%XDvm<x9lo7vft{AI`F`4>^l6#f9gZodox-hlQoA@Ub6-aT3a2@pmT5g&
z_2p)N-`wSkJGgJ-Wlqa{^+fix%p>F?6U-W2Rhm96b2&a=J1tY;Ps?00p2o^{5yQ5{
ztZE3pe@R7lJJU)=9L%)wP2Pqb(BYo9#Jy9u1(^H9rD?@utZA6Q{L&n(HUmp^xj!s(
z0BAIq!!kEf0!t+o8=m<Z8`XMFcV!0DhDLvV6oDgDP4_kgCzFf_Ctuu)&y3h@8j-%w
z9G01TvWQTl=HMPcllgq`&??4Fd_JsX8<We+g_;k3rJ(4r%*AmIt^JM%r_pG^ud!#C
z&2^CC0wTr3kLjR>;0bPE$_J0~tCz|7;65N)tmSDqiF1WeTGJZY9Da#Yf&rw%GM!Zc
zXiV=zwQTwez8GgMj}Obp+2#~3fShZ&@R?0CHsxMr+$N{w#!8!Vu1Ul*S2*migeO0Z
z`><^4$Etg*57@s!p|X=CfD;8nq7*(J2dqC(O^39e<J=d)jC`~re&I+p&RiTDxJmdx
zk8^U2bGO6EoFlLHSbN4;Qz9&#BoDSG9@h9fOo>?EMT7@}7CT1Drs)c9r@!hp0PEqC
z97lK9S{zj?8iLu1Gghf*y1$Uf;`<zUBhxuYx=f?)v!2nh!m&Q;<E^06930G}{-7Ay
zbQgcvAHHVX&(%b@Pk*?Ms@yp0D9o@*b@a;Z%p5X(;Liz-LmSGAQd#!s^7$(d=U7DL
z{_c`iy+YAu;0Yr$+q7RlkMDCB;y3&0dJ(xk=U(V>@5<ud53VPkJ%sc*`1#<LQSicF
z>qSJ4>tGO-$Eaj}!%Ikm5oZw;9zwcnV7e7rQMTMh_V7(MZp9{=yWQ#6iXZ%au~42#
z0@K=-kas%b?B|kxIbfM|#8_g`HgBI`6<KzKI?0qxrzIM4dyyP|@X=3*_3xF_i}lTd
zy;$dg^;aa;k4}%o`fC}_ZHo2PG0rlF)23LT8e`oTVVPKuAU-43d%B459MIYq>%Wh+
zY~eB0iC90QI49Pdau@rv3H!RE1tk1-G;JCOyQL9Kba66ENYhT{JrE+C%o67R;YqBn
zR9X8185i9EKY7E<(bWOFyk%e)z>QbP04@h2P?`+j4uo=4{O~JYp!43Fz&k2(W1SuR
z#(2F)ABDiHgz%F?7(va!ejxS{Msv^)@Jna|_5mz^Tg7Y-M4&Vr6<fMsQx|OLf^}W6
zrVG|k0EyKI^#|A)@HD6ac1&V(9t>|r%_ruyEUO8&9*`?4r384p<1|2}k>y@9ztg^p
zN{M#bBY2S!efzQWA~Gr?`UYUe#0u?0%I<{lMzmbeTGCazgC*jVv`QHY!=m+Y+up9f
z!xk(NO)B!4NYcrhYboQ`X<l@rGpITqYN8(dG$N|~#;1H5x?B+=G9n7|FCG!)SMi&=
z;(H)&`c7xB$P3d<#@H!x30eM)QzY#qKh~8{>=da@66VXc4aW|$3HtIwjj4rBk@ZqF
z4aS3mQzYeb|L_n$1aDY?7MsSb%_zd2@F%tI;F=XD0Wfe}dI+te&8&+jw7tb_p^Ql1
z!;b*d!#_@KuZNea6~T2<YP`Q#-+=a(MBWLqJH$jkwG8S@RJ;t@sW^S}boy$=>0eJt
z<^PO_0{U;J)88&me=$x^O_)<Y{P}0DrpYFyZCVJO2Mq5PK|4D-+H!(KLj2`EZfKY)
z-0cK&g4}gTp%Y{b1IfBJa)Nw!X}eC4wf3^k{x@f?GER^oeUf>xXLvpyjmUuYPLN*V
z*(+^TQD*Nv>Ps1FrMkfn_Wh*mV)&Au<+@mQ37&SyqT^lx9Qux_yQP5FI`9R+C*PGy
z{R@y(_Dc#UHwDiU`aMsRy{_&rA7gW{t1ukVofB|J;lF3}2LcXx-@pM0LSGLiN;USe
zc=!JF(XR95v$z15&fkkn+0Or&K8t~#rqpe<qxspzMKry-eT!C6=!c6^J_~;h$OtkO
z42s=}iU(bv;`H@?PWtzL?@?+{w-6Q6f3G<G<#hV1#pw&<bgu8BNr^El#>cNO){^Dx
zhg@f181ND~vt0l8z6WR~OBe1XbbL2gLFMO=i<e}l_r|1Y2)<LX`QS@edbCb|)8xu8
zeBu>L_)<?ZC@aEK-a`bjZpy=liE{Q`W>IAO1?-jUFh&x?2}NKw<ULO&>+~*jG_SSR
zQGT7uXBwNyx|i=0FTljy3%ws%wcU{S6DBcS5a-q!Sab40X1{Kq4;F#Tiq9<Q8O^d^
zA0!6*bz^H;Qt~DXMfw^NW98_zg}uy--7{C{onnLLpVXxYo9BZgQUz5}kj+t4c^19~
zSYe;>vR9=#AlS|tB{o0++*+lsN3>SS@XsB;@vE1ew@BOlcFVy(VO%~q>_FO{z8=`P
za0cl44R<CD#%@hexQ-Z8ou+5&h?}4nUcY&wFa2c(mk<xTzdgX%U7Lu)$?rG`D9s1D
zXD8}`HJa1|eTkt5Zq?GkRH^Ix+19yhDlxX7JEk(f_>{P6J;t>wI6q)(yY_R3-9Y|X
z_Vb7AsoI$KAWI(s?iZSB{3l?S4-NbW;Qk*;3x5hkpfoAtcL-%a|D6!~`7Z?Cey%*h
z+0V0%!G2zF6!x=92p_05`*|x6hY6!OC<EO4V=JaB;LU(dK~Eq8rC~p>=7Nqc_~8PJ
z{Kf^Jxu8`6)LIDj2lxTtpB>?Mlh_p=<cirRL3O(cm1F*jJJ?Wg$4+?gyW^uuW`WG@
zdj;0@RQoKaGq5LExfs~zTHbjX16%UZKSCJP27+Fjb4;1vYN3U{MkF+l{0qizhanr@
zW-9?k^v2VYtP+e&Tkgk!c`Z-SK3U-toN=yBkS3WZ`B1bTf?Z6Qstft>n?bhQtP1Nq
z*Kz{%FfpCi)7j|9>??_+hDLJ!&St1qyCYOnb?i|k^q*Hl_SjjqFEkP2>e}O%7f@R>
zqGsRi?qA#Rx>t&a?ds~<-@V<8ny}f?sg=MY>gWekb2zuQ*pUAV2n7Ys1}&+6j_Px`
zud}}qVS@03i_ThIyK5@hF49jc4O<@-kU1hEqi>~Eb3CGCkze+hXLvcxC1(Xp$hGbW
zN=5BVoFAPkIX+RAe%vYZh@~Ca+fiE$pb#ob%5Gr=Q2!)wuMYKrs#Jnu)~}>&+7f7c
zInj-`={|Z~re>S>|E3dy&udMz3fCqVIwb4i;6>qRohO-D6Lx9qM<0D(tWWOT!4{TH
z8dx@;$l94rlQopI3HYRWetY!M0NSw8hr4Ich&lH1g(q#@2~Y4GUGv$xqdse#x_AC_
z7BDQ<s(g=3;?fwKRs725$xGsuPw|IwJE%8Pw^&!Z*JQ~Gci}IRvGfQq72W8(_Quk;
zR4)vsN9!L0+FSqV{e1Z8k;&z|y_`}xi}4T{*zTS;zf#)qTvwBnQB_4$Y*h6tPVbdY
zUv*AV{tt<Y^Z%nb{nd2(Uy9S0#OVlV<XZesR!T=6?CPeK(m}v*c@DI*8moR1V%#-X
z|4Rv1c~(z7tA13pWUl8(R!Znr4vqVm{dZ7ur;hGuc(Ye-*C|uJ+hKbbuBeuRU}`s7
zQQduByDO>%J3^%W*UCfeyLzkY2Q&p|oNe>e$u2nF1xLBya2JeyjG4(wZcTlG54GUl
zM|W@ikJee;M3o*&UK<xb$l^8G504rvlNQENtn>3YGlNA3k!6n!@8p4+&I6X};yTdO
z{Zm$ypmw^p_OSZ594Ea_d}$L$D9v~UGNW<IiVjRp-JKfdK!gzNxD<;;J$WQ9ol1~8
zWRQ6BNTq3{ju|ALJW_cYsZ$1tCy!K_MhY@WJb9#=G*agb5>JM-*<=QG8m&tPjVFhe
zW8z4o8J}V{M7-K82OHC9t7WM1<f&n^rqNc<pz-9<kfSu(8W}X6JQ`MY8m(&vjVF&*
znMLcCLF37z)nw7SXV7@^XfQ5aXjul0Cw*D9m##^HbJ2cSMxNVL>bEz%cvipMCM09h
zy#)B{&&^hR9`JPsJ_FeCOPP(!fC!W(>vW02$xXq0LhmY=?ak6aKE~!?TT*r<D_}ps
z{T$c_@H7W*2{`c^L)aYfs(%@{Dc~)DO~KTMD5B7K8q+VDo~A?_L{rDs_88_Aqr3<^
z0HYXtLocfsf2J4V<NX~?c@f?LhURk<i)d!O2+#eg*o)AYOa)$q4Ty>-l+MNJU!3_f
z(q99)fd1li{>I|;d(-Ln7pLDGr{ll>BfTNT70XcUMR<NcSF)y~1;B9VZgOV1{*zt=
za@+`gUJk8+xRjE4;aB$A>+csw`x+u2`h3?N=3H3(Hl@VQg*D5}xp0dR^1%%r&+kLf
z_7g1>Yyq6CC?^KqxzPPpgjQ-iJe(*&wo@W`<GP4pf)R+Tnz!zz(&x$)^A}Z?J(74B
zRyPkri`y9(lu?gHhuIwNJV)+;%O2GG<4gJFeROxt8#2_y+ty>k#hlttdmuVa=$Ct%
zQDPp5e+-E{5Vhov*T0+zLf(nd`d6I+t;qM$n@PMOSdT>Cd6l|mC%soBADrSk(0F>r
ziZoB3>}EXO&xi(ldOXk5F`lP3+s3Yp-kpr4J;KL%v1g17I}ugeAn!(c@5#nwhoigz
z?&VDDG(#I7vYj6<@0;S@_m8S62R<O~)$$AX)`WW%o_iH7FTuv}63+KW47@Pk^MSV<
zKl}@jzi(z+%z9%R_0H9oBW<^x?ik!M!zse6dENyDgiM~htFil>eDK%%6L!yfMC@)R
z26p$Sf^KSd?uG}ghwmZLI&23=0hiGYDGH;E!Zb(WW7+@o4R5c_S#`Qm7)K(JZET8&
z8GWSQ{25oXKBH|?C4KrZIC(gaoi}dAf8#T%;ar9d5a&jToOT(XQRkj%A5Y3>w8`MM
zd`7!~p5L%DX^huzb}9B5^;suPFYy^2*P}h3Q4>_qA}OEI_T2MpQkV~V{2}SYzdWQ)
z>_7~ic*;K6E@(ADd;dOSoiWEd*T3)-4Y-@gtS&S2dCkjy+Gq4)ACM!TQJc=ct6x$T
zH9WE%IW|?~7FML|$XhwOje<&?e++`}5nc&Qfzhh+{9J#@sr_=BIuV}&_{O(3-A)D^
z@x6f;0?zzFGw-E91WMCfe=cEf=K8Y;y$h=5MCXE9?*Lp-{g1^3CDLIZZU$yZHJ`#!
zXkj!5_W_>rqtU+`@Cv}D;7>sKo|Hy#CjpVOU2u~Nu62Pn$B{OjKrSeIbZy8Jb+;p|
zRQ-W4EdjNcZp<nxc@khAFl9{Ss9w1C7I>t-qqEHhH$Q4@*vlJLi2v^9;6DexhLran
zy|gD%f*~gJU@<UiV;IF{C%?#hv?eM~`ko-y@(Mrbzx0;#v05FO>&H1|#90m9D~F|=
zGS{oAbTta2IjkZ_;oH@F4WZ2~=N(-E#cx;tsU@FxXy8N0$&ltS)&};9b?ZUa#zHs7
zqb`qgV{`$>JS%b48c5b#Vee>IvtZx(+4YGf*Y>{ix;+xsjsu3ZpRtLmZPuDIVa_?;
znec)ES>qSI;H@+{6HqxrwIhqJOSuRJ5EWZw|1Q02asGdeOXdHPhXVR<r_<jkPJbp&
z56@i5)SC~Qi;*5qkV-#d7bHA3qfFEK&wuUOeRo$&S#KSH;c}h=vRp2B?JAeQ4SR{;
zg<Byyk?Y{;eeAXCfE@~*1cMOejFVvM$?ZA`Zf0E4qJr11tLjS4JD^LWDPL<E&RFIa
zx3B%Ob`E%1OQrrh)1y7YHJ_zCnS9|WqNIvZ`xUwRU*HYwjc;T`Rd1|53>E3$m*+`$
zxKH05$BUH6`?Rk1UiC)Ey3COas&&0N_bFJb?6Ke#&Sad(zQH@wb9(#LPEQhH>)*_r
zv0Y@P<msxDjC6Ts(_jU0I_XDcqgIADeCu0xDS&HT)t@k+Fe<Edc7VL1b$~O$XuR`2
zk7xs@TiC<LQm{;t%p&q+T31E+sNeB`7w7g6coN{`5(CEqz6i)SrGW^PritYk!XX?6
z8%5aB^hV=kKd~&pOW9a{JQIsZhp+UDF8-O~mVM6q;$9xdx_D2_<470p2#hG_Ae|NE
zND1gpQ<&v+u}*##=;GxAU|UKTt1=SzPDuFR61V+vzgXGL0z1~je$D+0KTXJaoYwLe
zIm%MP^CzoyH(>~6b>{(~q;%)8=+0=4O7R}`FdPF@P1cHcC@@X##*VjwCi?+XW|}?R
z9#bx&R$+^QpRYBR%W9)sX^rQBDfhauh2<7#4UJaoQ?YR$=F(VeT+JC&?6B_!6l#qM
zm~K^#T#E;?522k4a!=S4il#MER?jdhr3(y^$O8Z$=x7qTAK=b`f%^cC>MY?L4n&|d
z3FjV!djGa7AqVYtB#8E}o#c$4UPF=5PsbvoDk1E*jTt}p9MAqWVerj%z-_u%F_!_J
z2-p-{2ZYt5G=c^fOmV@5E;z>pXS(1N1yDPdP=A0&1K#ThADP6C^kBH`fp$%r@KMsd
zTxxnL$6$_zOebLa@c_sa$d8{l?R4D;u5q*tOD7x9-W>byPS>5+H#@w<N6Ez<h=Lzp
zWm7Y!>vkeXJjDDL8t)W8oH157$|_s|#iq`xZLDM)ewxU_4c0O%XRm(7ib5-AsY7>G
z&c@(mN9ye)r$%bw>AD`wa?x08+se6or=$li0j39@JGQ+Zcun<v;*4a4J2YI!x*@vq
z`_a>_cgn-(9FTGUnFVC0>n?|mRjXyHaWJT$NXbFU77B=pZJ}^XQTm^Wiqn@Cr$3oa
zUr?O>hdBMev|xrg^VD=v4KN&RfOb}f+tNjm%sswwN*8tB&2-Tj+Z5`el}Knt7cJt1
zd^@`6uN$RxQNv2T)9V`k`O{=B?=na4tXq4?q~R@1#-u@uxl>)5@4?E2VUVnNdxljN
ziP_<ImFeJ{GYQC3yclc>4!Q*`0#d;OF@v4bn>s_YxkQ6A!hj8>rp2xX{Hp`60PMTE
z6xvK60;NfB{#xPWreGSOKlnD;E6mm*aHTm|d33DEzDmH)0VhEagiiqLyBhdmg3#i@
zXgC!geA{yeC#0GTcLYWda?~O#2tU*P`^omn@O&2-n)gwW0-9by>Z^Ysyf;f;i1c@-
zdY|Hz=0F45Q<{Fm*}F#-4Ys93#e?nf;`F<IPI|sL|GDY>XBDT9Nv9uQoIX5GZwlVK
znf{H(w1g^l75{diYZ>NH&+C9;*3sn5a?`{=Bbb>72v!qe4&m^yMnsCiRUY2@iGvFK
zw!8>2FHUmi?P0~_gR@=7n$z?A=cq&MNPc=HQ)EMMs1WkOfgaD_6>%O>yAai=1+pfr
zbMBH?GQ5f1V_i`8k?T>r$F>;Fa6yjE6}a`5k?-~iaB(Hs3j3hn$`5r9G1x!viaRha
zas_^Ww@A+*F~dz7@3g`cHqb}QkIeC?n?$IA)k<@a2h<<czV_L4E8qFXT6u<*8H`g<
zbUf;~IERi$4FxCOakAIWHfi=(TxZXUQ-81ezI`M04gSWj>{8C?0nyxUAcbQ%*bAl4
zw^03>!#|(vJXu8jV>=ghvZ}?5P6xb76b+A8I?1`PhdxqYgOv7|4G!OO2cj|`z+n^J
zFjoQN_glBB0wUiW9_~wz%lL^+bYYDZDM8!IL#5%KK*$~|qV(CUEl>hkPj^qnutKg>
zsc)~cO$_N{LHZ^^n<sbPAc5LdMEmX31h?yO6;xQ0x}Ecdd+okt4@e{z{)_Bai~C!-
zqV24u|KQ<;;XUrFL7A&=PGVgCa`Q-Db!SH;ueaVJdHwbVIxF98yKNOD?;3_#|Nost
z{H6RxnZ}dJ<I(=JjcM)fvAbnmkRyL-X5eQYQgc=9C_d*&`;hj10Xvl0%&|A%U27V+
zC*X~1X|5UuM4&XyRYM5%z0aKp*HaC-BWav7?ssEHRpZEU822I_{(|FO$;2Z;`BWuF
z?;gh@Q=3&=%+#uoQ2W-VR?P;|U+s)p_TdAgP`rC>jKdjSHLeYW<m&(V3z$d4qt}8z
z&B1m@xN+Sa4DgV|+B+q8cBZU3CHn%?ori;!RkP7T_+g|o(x<gET&3sf#G^G|B71WM
zMfwyyZ{5RnA!6T)Iom4Ta+)LKj-K@6fmLt%V8`@LBm~Hdjr?$JZ#Lh$07;!H@0~`-
zn0YlSn192XxF*sj_m*vIOH<o9qGsFL#w6R?Cat5oiV{^wnsDHbsb$4wB2SYm2`RSi
zb32}$T2`bBUMO3!t({+YB?$#tE_W$>mciOG)7^;1C&1O6Wj$HdFvQ*3QrtZlbXF7<
z-fzmgBB!zZ2CX_)z{YXiA|_EwpH4ZJo?-AvHrqa+Qn?L77QHNYbq`=9W7osmlZ@Ys
zJ)F(kgu9x?FchrVRm<k6;&xMUUB$eo883|s_;JlSbF0*6#p`z?_vXs|t0Xs3Yb)xq
zB#Q4mA0|x_97o{XP`&TKw%#1ve{2ly<q0lPuPQ2?{l9a7cI)F<B3DKUFf7@MdSnMn
z!SW$9JT9OMV^>Bq=OR&!{i&mm^WXZJ8Mnb-fjDJEyUT~0G{y^E84C~XmopX994rES
ze{Iuk^8w$gH1G+)hqp6uE?}SSrSawg;b(Z5KpO8p!awZR6#SlW7pL)RPIemafbAl|
zn!@tKe5bK~qi;UgDv_Mmfnn3}5XrJB(kVmn^@J-}A0^WevXpD-L%ej2#%9ZpOlJkI
zvEw(g(Zv9B!*{}X=M}huW2%wU?V$PR5*vO{#y4~xl7w<>b|o?MD|s*x4R0T!PH6KD
zNQo;!tN*6pk0Z1w%6jKkY?!UWW~aC+bWK%(%UF+oqi<2|?<mOH&u4uZnTTpn)=kOU
zp`g_91z89Atk<Wq`i6hhorX(As^K-@r5b+EuI)Cw)Ro{GKKBqBKL1QIhnMtY#4awV
z&fj`POqi>#YIwa-xYAB7NrlR$Hj`G6^S5zMVQ&U;cBwTih_4}-R1W2aVEHd>z`v{j
zvvWhn-VYlxtk0vENX^Le+oGAFpok$+5f!cl3;NQ61$=lFA965B6rB#av41B9Ks^yC
z*EWUW%MGlV;z>anue+335U=sg?>r#Wl@mprk#Gtj-j%HYk8$AY^0k(R^D()I+&2~3
zDZGcstQYAhic5KsKHw0w)A3W5`28AVlCj7Ds)e`)(n$4=rm`9zF+!oUKFg+l0&I+*
zk3pCVJ27Hvu~%za?k0h`XoS0UzJ|7ss6BpJZOO9Qj@(93_Sjm}HB~9O#O@R(iuKWQ
zH}FpD%A`z=-5dV8d&APXKd3+?aV8u}Nn+(LyxdQUV7e%4^aT233H;~@EXWdgiv<Qu
z8X>1ewk9X?T_5`%%rvf7mVFSlgSDPp5p)+zj7KeRpmEgulE$;v5CayGV<b(R(W`@N
z&@7_&<@;paV5V9UW-D@-t#llP0ie?Mk;bj1u~6UB&2e^6RMKi~<6YwMxNQD{szH3p
zEUD)}tEapEgxjfYllvDiD!LMdo%<H|mc_Z++`f8Jn;E^zU29$>Qmt9fx2EFMOutOu
z$!Q4j<M>qmlB6|ns0iewTD7ds)besvwq}j~jYA<T8pn8KZRS5F*SfJKxc3Z0qa@L(
z%+&>xL9x5>D|6O?^~?03xMN(s*P$}{N?adb@4d72UTUX(xllDO`F-n63?=${I5L#;
z?O#ny8z!S|MAe{u8=l!0A>Gy!9g`*cONh4gRvI-d&DHIwJZA0Hcy`xNt4KkOUXMAQ
z#<QcMY5sI5c}3NFe4LHfQr1hWxomaPYn!FBEl6eSQ<Uu;t2>;J8@ZGiM#1os6kk6S
zar(#BofYEisqi($%I8WQD}UKGE2m)#J6_!eqE$jXy1-+v%<|}Pu*IGV*JowZmST|d
zJUmywkrR+Qu3MC}APprVNPoyqv0Qxlx;9Szq6?`^2l2;;C;FBoC`*OXut*(<iOL}M
zyP|4Em{MzUt~C0mIlM;5hGe#qOcvtlNmW7aRo~3V!JGRV-@Nrt%Z!I}cc6JujR^-u
zH80JTO+Ao2j#KA~#BH9$pe%{)A)zxyLs)t~Ho9tv%ds~(B+t5jNLuBvY^EHU=4+Ql
zcm!vP+;9^Y?K)!3?!+~RZ*gia($<5Vwyu^~x1p_-+=jNE-`RA;Ag`_O^R+3^))Tik
zZ5<Vn*47tg3H-qmDA3jeAb^|>lD5v)B&)3*Z?=kQE}i?3Cpa<7pB3CYV%;Gl5t=Zg
z|ND+nm5#{!fqI|YoF%+6Q^e(8XQ|u-6<4E$D>^{pqxT$%{*J_LkeK_V&-%M;)?>&j
ziR-V+veX|fe-|Qks<7T+SAc1X>c&N6RA+su3NbG2Ueoe44|gU-varM#wIo~Amzb8W
zLTmaqm8(rpdF(f{*iA9^yPc?hlgIili!~c8amOlC>DAJ0@LdCj+qbEGT=89!itBUn
z<f;@_Wn;zZ)-r2;cn77qTAl)Av{lO&eEA!Jo1XtwKI|*^s(!lb23=ZPsd-xTO~N~h
zX^S1<wLIa<eH;EN+RHrcnk?-lw#M=VZZQI;F|5{1l(vs@9nqo!XrM$tt?@4XPb9OE
zMOqcUeuqfvqffxp9J!cJs9yYGZD+|7lXS+jGl*FG0;RkhBN2n9sa2Xj5DVw_kz@e&
zP@DtH6Hu>2^(W-z4itfnA_7Z&9Lb%MTsrw+82FGX0jx9TO%|Q#iV^i@jm6K^!nC&G
zFJIK&Tift$Lx<Wai#nZXL5Jyj;63uxs;853>`jrf5N!m2!|Fqd)@^66DYw})_DK><
za>02Du()67Wj4II6cz$w?(RoY+Y7^OAOylrAPg?yUgAfCeh$=3`Q4hV04C7aRuvo#
zYIn=G<(8!sJYK5!vG~4={A_Qdqs)!U{9r1xTG{d>c=@SS;vggRQ1;RBp|et+oWT9I
zgb`FDqXymaR#wW6X8FL^>V%xD+s5IaDg2=x|Eny1Ut4Y*ON~k#@=zh~?~zN-$PAAX
zkZWgLTP2yOopG5ta%yKxty)20UVs~u$`)4RpE)QW>?!xpQvN+luBPB`d%1<ltAwn<
zr~QavxLVz>yhr%F6S8?vAup1!l1g+@MSve9)SuwH97u&{Rn3N=b(3w9Oo`%UhNiYD
ztJ)-T`!+ny)+up$_-7Mx^Jh|S_y!GR(xO9V3zKfL99Z{Lr==rgF{l%yE^0bRUAU?!
zhpH6WXHS$N0l5i@_}BvS@$Ra{|GZXv7u0H&)yna1;;J9awm!|XZvzTT>AXHHL{rVE
z>lxROnjig*+dzFdGXKt=65FzA{jK*I*X=Nqdj-HusF-c}@n@b;9M1xJWUAcy{TU7q
zbcY#(5@x6)RLs0eIM#SB31a6$vD2sMdD0#{GjgL&X+5MiKeXy_ad=;djuO$C|BmRX
z1w^+hAeyRo9WMfXCsO+2AAZ1kOvxE?Kbz{7FzSCn*zyVQy;x`L&3b;84Hefde<Pok
zJiqnb@@2MLuIr<2nPp?lWw^&@xXowierBd0$C9D!(OIV2U54|>pb7kTpP@RNVLM;K
zQYz^()cO*B=QHe?&Cr1i)JSUH;aB(q?(q0yviQq5(CZLC`5qoIL)X+cXt6j#7P4-T
z1R5^Lrtgu0YymVzP$h}u2)PD+MAfM$0&!S)MAhljM^yEld#5jPQnth~lqjZYvT!BW
zQ?j_sOCDrrQRA#^hJIu~w8yZ8R380j;(WW3Z|=Q5(}HZKZ*dpXq5F{YT4T4wAtY<V
zVnHi_YG>SMm8hNZgz-ybS$wX|*NF)OVM3jlP$wqTi3xmGP7q9}6BFwA&InK?z&Jvf
zP$wqTi3xR8r`JrctLnRNL(9GmE8V8f`TM8UQp*y`atx^Zj)wfvHzdq9WPoo7%dr1v
z8uImi>4p@}A$NXDYv%ga6ij8u^F>cKcI@WnkShr_hm;_#^zbGA@pBjx?!909%DZgp
z3hNeUN!U8CLJ<t?UrT7w+6z2_h2HJgd3AJ3k=rle6Fr({ggIxmiD)ajUGq)tjB9Ow
z3zBG4iO65GcRZ~}t*jp=`LS~NNFbnwS|I;9p2D3LowZFWS)XZDvP)STJvVVR>QqUo
zHp8u2hE6gwfb!>651g25tmJ2Y4%;rAu$jh5P)d$y9vZ0JMJ?K{G?Jq}|AO=HdCuo4
zB{hY#aE}V5RbprkKXvSBfK`A)kF7fvuo|%MaVMXS(bxx2ow59>zWR*E1Sg@(Rzmq7
zp7LE;%2z<yR6RMhN~w2QZdH~RpJjPA%V=dm|JRGjJAgQ4L1%KF>2jW+oUJ}*=~<a(
zY+{A^i!ffjsbg-svvbQHb>Wm1oH8z(b||?gKVcSdr?RR0Bu^d6rtXwHu@c{!Cs*vp
z-%#x5JW2=k&lY<xm&r5^SKJ}|gtvd~#BRCc)qP7muPpJ5zqzGgy-xIbW?T(zskjau
z9r-a?^1~qS_<`&mAPEv>F{gztjXCw9J@nkB3u1636ub~2SL-Y4!6a&qSt#qNM<O=&
zjk+gQt?y`us<n=<*79t%9zg_MgCE0c(>R-{YB3ZP+DgYqsoUcQaJz5Pfa-Juw&r2Z
zwq$L&2#X=E+CZw|B_LI~qkZLe@|7#C%Sb{6m4m@vW(I()d30xwJSdCYTIH@VouK<s
z?JZBvXV}GO7?;g3j|{alyqujnGbLxUOsX7_$G>u=)_5W_vqb74;-#=dU3U-V%BEf8
zxu{Og)iI|e?D`ji67%JI9vF%z?rduj?^@W0GUp!P3tXNpuoDH&IYj*32*13m<GRAv
zw`(QVE3^2oZt6ck((*9~$rvipM5}%5l>X11q@?S7>Cb!#wUM4$d3~lwE)_MsCuo^%
z)Pe^ySua=CqkY!?*{u63>!Heeg3Ee#ChH-}suZ<hWHxKLvL2?a+_H;I_3Yk>u`n4V
zKRhBmfGLaQw!!mhh(gTs={z{bz4--&p5+UDFk9%&n^34(j-1a;F-}(;Y}HON8>Nfc
zn1|L2ebq|p&r0$PLK<w+!1FNG8zh%mwd1wQwMHosnk95`tM8y{)%w@I*2}ZCet%<X
zeYjY)idiWt$9WZ)1->LDH=R`NxFA)}d`DS6hqJr$EC3y#XrEd;Gp<vPI!HrIB~=x-
z5N+nGb=BuoYnHE8?(B@*9H?rU!WyT7ueB2N(Pvp>kdmjPwq#*U)wy9tb5_$=W6FX~
zlss7_v*fT4)%n}&;!zumfUiwQ)#lE&yLLfk)U~fe(B~|T+VRY1<oturS)FairOJ6Q
znObJ^<LkDi<C}jf@vY&}7(_L<fFg2fo*n=8X)=y*CxfF@++)7D1GB}gOL4J?K<Ld+
zBgw5&uE%|@aoJpN_ok9mkF3{L$?cTh<?&1S!Y&W_sE#};`7V<NN2z9`C;S|OL9Cc5
z{&oJ(KjrcH>dv*Z3FGwxVD!ux+ZVca%BE@mTKIWQ>@_Nz_5m?={Y=@kH`Rz4ctxFO
zJ9?wP54yslRpG1G6py-nw~FF~D*dqr`Q}fCD^5SWoT3rE9PgN>aiF8|SP_k<+oTb_
z&z{dfjO($wqj6Rdjq-Eidd#Q8a$(c9Y~JW{WjouyU#E}b{TuW`(DI`(vc5;5`8Yr)
zET=3fWxvJ6A70rBR_Xmk#_2enSo_dr9}30~gWod(Dk7lV09e<5o=#*p+9Qk|@S$2a
zwW<ah^J<8VQ`U`AXwJM<>69N@eI8V1Hs#$Yg(9*k&yeDV!a*M+)azM87BwCY+fv4D
z*A1gp?3Q3@$yzEe@A@A5+${E+y)?H|cj^&;vSGm|WW;pz+b7k|miuUeD}32Us`|B-
zMU)vtHW$s#Ql6ToyqGk};E7bpQMs&u3Nx2cc{)pFh^VLyQ6;^TeZ!d0o&|(3ij7c9
zme5y{fvBONSasG#g#3H%Xj9D+7~yL8PwTv-op=+BaByyh-?Jc$xR~6u?ugsFPtLwA
z&qZPw5uL=?!TsuX&kw8WgQBq5Yc00+_=VF)bn4Fwoj!V@(}(?cQ3b`StyTO^i`~cJ
z?&4+-SE~_Ls}WWG#d_YJSd});R%tbBD>z0EoW>nMfT)e~aCb;JVqKypf+KposWp0g
zXX#0JVp5|Vsqi@o3AS#fx~I~T5s_Gix=M^`R;Ai<MI_T;@X99fFdwGrOueG4mA+Tr
z7B-aa%@1!;hL;$MP~D5)8oJyyU~eOw^bu=RYryDi16DFtT!x-e2B@jU`}hoJXEQV_
zg9dC^`K(*PaB&yav^vn9e^SF4!`-N-gKJBciVLXJCf*B#vtes25}R4y&eS^@y{;PE
zufBUKrYSc%BLE~pr8(S2B}Bddq^tW8ic>MF_#wXHS7j^Sor;U?7}9+H6rA*wc9$A|
z@e*l3{|2U%HwDGYa3z|~-oQK$2lOY3OnT0DjCJ(1i`I*krP7ME%;66z<Q)msHxKIL
zi&v9{w1jA;bOpKd^a|mZ|LTX&^!!NGFEg2Jc^fW5c!ALP1AM|kG3`cPgizP!a8V1b
zfbv~>#xk;S27WARGOvdr*}JLN)mofuR<Wpp<X;vl|5K{7WhH99Mg6mO%SHOcBbTx@
zInu68&hngB0)7A1V3J9Zw@Ar9iTu=P0fo1223-Me_%8*b%S)%Y29->?&k{>uiI8%3
z<7EBw)@4u-!$B2)&HZW>Xm~5!NEOs&adcg-@p!l=PK?v=jarssea)g`*7pZbEXB`{
z9jgK^P;Y$nO<TQj2yza-YEyeWqAhvi3zzE`(<nIlRyJ*jb_=<pd^s1ck&+nNt+I0$
zjjE-~#2qzcw|^x3>qqVdiZ}Hc^UwJw#W!P4-Fj_va*?h;f`VgQbNK!T>TFv+C@P+r
zFMRI@RnryZx^~M&QN;02$CWF2S|aACF}7a{r%L*w0&tfVO5MW{R_>?*Td64#K4Vg2
zD?KKAsAn%;qJbzg6T>7#b*v<pe737bi}|7L=jMx}ty}W6(rr=T^P`fiwK6dys#Z-e
zN1?3LjFLiR4Xe#u^$QY1wmH~->wdW{RlVk52f#lM*+bxVfNRzm*dOo$K=$qf5hzU?
zT(>5yoZJ*_PKYZH<<L0WZ*V=8JtU3e5YYJ|9Zvczz28-*icH<qHprzMZ>9faRo{5S
z^t-^Az|U*<Yn$I}_!zpd$Zc;Gn^B4BliyQiY^KhXt1=R@2TPM(h38nM6<Z5-;epr7
z#1vP%!YzwiIO2A$wFb0s&%bo!*4=?J%lW>*JOheOo?)H3w$e4Jk48Sv5+k)CabUsa
z9S3obh-pV`*X)7x`9C^-=?vaO!0>ApC!Y%V)x|Qm_GlbSAI=}MGaKQ*rpggXJK9$o
zp8g08So&0Qm|14>ln;OYI%X?hDQ)rI$W^LKQKbsDc$ZQilNNQwjc9?|8GZtMuahRS
zZU=l(xLTPIPaS@X_w3Ev-QxY22BU3Tx-uhr^DESKe>L6U?F<ae;ojhAVDi*_mmgj!
zfSqW=d9auoV)W7{MzMzoFW-Y5ki%W>d`*8DF3Q$0T$>(JJ=h$Ks_vIF&Cnbi3HYx)
zY`l#Gtk~PYLjgD0M?>#uAOfXn=nYrM(A%HT-w9YV-t8^_jLjI0wHGk-L^|yBF|Qe$
zgZW!<PmnO0gWmzJRcrKr3)mO1DYyrSUD`?`xP^eoneORo_jH*HE_K0Vr9tg%!j~Mi
zvj9&TW`rjIKIy>I0G|a+-SD#lEfJQyMX&IE7?SlDhP;MIgi>oX?Ie(%fYH2X$}H4Y
zlEa<*(a_hQ-e4%Zktja*Gr{4seXVt5rG;blDum7|_lJ9q`YzE(2Lm(0UgxY<!3gvF
zB;-@Co#Ax8Rls^dBHdIl8yvQRi4I%8kR>1g-B|L)W{xFPs~Q&MS{~O#%sWL@t-{$=
zci5_q%9>IOAczX-<8Q9MRE%Q?O_*0h_IS3t0`gGM5~G0H;Sn`E;xi#R;xp?VHy9_l
zGXfGTHRzO%u@Wttstr0?D)*0A+}6e5R&`~46RW*Y)7oxe&vvQWbVHxe!Y(-kR1v$^
zZch>lvNX69cL<23mcP%szc)!s-*#={nYRhOwaH<j488_^kkH1rw)_UiR-tpK6c%rA
z6!3hL+QrN4s-USKn_##L43avPMJ2<fU<^2D`f3~g$Z&J`4wf3-RPB!&ZE44ir0M*5
zqwZTrs$M1n>`a>opJ}{YyhMYd?ej(tu1tjWcfbhiHq^UqVO;?A@XKxdgtb~<0Ywv*
z7wl`nWkuU7$JBNs#ls|K+ThAf&C!y+$KXPu;-k}Jiqj8Br`HyzZ=X&dRGhw9oKDC5
zH#ad&{l@W1v(&l3@TvsbSzguGxoe##*mRT~(qAy*;#q3Qj}nS*zyGjsmKx4@F@?11
zWzv5|`n(&6at^ndNuoQT{C8xr9WU3H(hN3*xeE@y_m?;O$vv2Z;>wv-$3WC{%82Y#
zr4aM6jB9Ujpw>2Ys>=6V{c?$Qrz)pLc6!y_+Z;ZI=y~(7ZUdTKrh5`LB7f`NDCrwF
z?w4DzKc}m8XXs@-NX>_PU1{P|9u9Os!78AxRCSSW(MHjf=%f>|y;L(q=qT3>b};<d
z8Sp<o82$ivX)=Ze3n3qD@A3R?m|B=LP9DfXI2)7i;x+(xK_vtp4Sr2O+U*-!=d?(H
zLg06#>7DTg?w;)hgQC2*vXmn4RHf&G3msb7)b~|CDq3z8jd&W~|DZdC9PT$s{3JcR
zhA5{t7$V6Xrka+t`!P8Se~V)B-PWfF^c6<NXc-q8{cbPB(Rh+IvTUT;jZwW?PeVLg
zdRx`D{TfcVPFowEqMsl{b9eh^Up03(?k6IG-SPqDgvTGpR^*;T)SP^`Z@v-}tt49#
zH+EJ2jY+gmnD$zo93*Qz*$J47KdgjnnfX>a-W;Q36=$4mg?nD)#L687@xAj8VIX0!
zbw*2H&L`iHr(!_^aN|gI+Hiit)0dGoGV=y4DmtkBTd3%uHr|p2Q&w>0HXD=HC9Y*U
zKimrdwdkleb@NBHM?fdPVQ<pt%yNRl<Jx;IP73NWN7r1o?h;<KFuCjApVj6ldkK7x
z*xBP)Dr-$@4lm=|8uXL95)wTv)};0HzOS2}77I;J$4BX7u64UG%{7170XLssu~Aau
zZDW!W?>mgU5LZ8(pFfXuWg{b9b0#BQTZcpy+jmrP;>J;8_tC|P$welZ#l_V;@q#w0
z31h+ylWKl<Oj6CWIK~|_Mx&i!^F17vY!zIELV2al!OalT-@HmJC$m!K&&EUz|MBV%
ztD1rZ@E;p=o&qGZRN5_BHbUE!2w{b2M9(b`^I*bkTl5<i)h>LelN@s$5lFnRrG5{k
z4TKB+)iFLSc)l{>7NG?dtr{&AZj=8{Q`k90p?g!%jmnmo!fzeQ)L&6TM^%)$&tBZu
zPOVzkx8<OQy~8Y<Hn{K(vO$R%%#O0IG`5d#bhQudxn-VfyxBYp<nV|Zufb32E7GmM
zh+7Y%qmq-TTp!o^>ehXEu+M<}TN1mZNYMQ52(WMd{$}}z5C%`zvRQIF+@(T_xJuPp
zHw4?czhmsOY1^f^Fi5>`TqtEN(5ZnX7EGv2Gl7W?Z3i25nxqS(kJ36}S@n|76(bJx
zJhu&oy@0Bf+vFxz@~SE(+Kvxv-cj$X>vSGr6AEe3T;ef$dJL?#w8Fnh7?J53`@efF
z!{qj{<*^~&IgYinQ|2Bwfo%O+T~fE9%VGxvlEfD+k!e}_jvE>ImF5rB@WjTv)^2k)
zW#1hBiU%ptehi>NwxF-cN|KCTSTR_%2nYFapu(5~l{~aON2zg(Eym7)z|wq84;VH`
znkHXU0XWd*ESq|@>xDs67AShKVT`C6+@Mdk8uE<cp`Zq>xjXqgV6SA;vW(@ozA|2{
zpQOz8DNk8S5hKRc=DSwGIX+b|TH>xwbW`ii)B_0{+{udNOixsU5mf_y*?Cumd@WTY
zqkEw~o%=d4iu?<({l$hQ{LEjEpRgPEG}h8ATdY*iQ(WA^*L*31kTj|@$ax6_QW#Yr
zx~Zn8^%%gKI@5aoJ2r{0<`dU;iQ>Z3`=j>P-y|{4aMxPHV9<dUYqje#XFtj}$KYVe
zdxhhJB*-<Th8j7=6wJ|lk3iI<mJu3M@lZgZdfVus{4LmosaBRl(CS_u%l7?WFxgtH
z7gPqBN%3Zs71@$qM69G$LduPqRGkVnho3y?<gz!_s5ZGAUM!bnIY{Q~f%-W>Kg0C1
zzkc@9&%XMpmD~=cMG9*aS|=lu3u>o?6~+uTpnu!ZUTh`7HLBhqG)9knj;qU8$r>AK
zab=Izl(X}XZD=6yuqF>|dUOwK^S~}}_pmMx`(ZxsFU_HG+VY0g$fKGqQ=?t?3y3Dq
zP(}bjjaAcGcjuLxNzNW{tVBzj(W!%4P|ZVEZR}Wd@jI%X%B*g9`Qo?rkT1XZ9Z0TP
z?O88wO*I|Yb3y>m9p&Co)@EO_#m55IAdWW*RJ&FQv~EPzu<66ir({i4L~Yrl!>aae
zc&_@DhSz8Gu%R^w9BUvwI2=Ke$69Wh74*XQR7Ab8QlY4ZdGYdl2i9~#KEIz5YNlPO
zs1+y>)c*Gq*~1?{tvqKdr{`>Vt;kDdSYid-AhTu2s6x#Um8u6~IIv2G1UHha%<P0%
zw0W#>wF*9)?A9B)FHXzZw|S=Xkxv-rv$vj6#^;_kvKd4#gG}SsjnLlijpQ;|xT2%k
z77}Z7``J4$ZpVt(Qfz@v2$ZyyF<;ZEgj$`5g4zfKeov%vz1$n$$uyd&Xi4SbhLvLP
zQtdH+n%;UN;xFNsdPPb2sY2EKN3lI9Pc<m?(Jgm^qFVfzt-kA_m2IUU@1<prE-h=M
zP~QF=cku<T!1_|^wi0H2NsJX8$9zi4r!-=v>r%eOLxCqY=%BkYDEUhzpJP4#bV2f$
zV#SZBz~I11zKcNq(K}6cL)x8dI;%0%z|pSxqi8-)H8fRh8KF=SHoFNhPZi;Ck1<Rk
zy5tx`Gn0zamtK?z$S9r{@Ei$9jmT7&K3s!^dJ@W8FIu`b1TU<`)uW_PkrrJ*uI?Ny
z>Cro1RN_>5-c?YbHjmEsL5+=);cceWbb@cDa+uR-0L2YMk2bK^U(bVhMuRS_?Kq4y
zMz978=8~!7z1YdvdYsHZ#uD=pv*R$~H@pdjyKYO2z_O&e2zzS{dhD1S2gl+@H0jiB
z8}&8`9%1ObV6r39n0qsPC7Qz=)l{dBHu)Yc`5tBRT{i7?`M?-f935Oo_|-CD{bGQg
zUbSjzQ_%Ts-T$Gx2MX_L*{Mgr+}7aZmDm|@=%_se?g+T=Q3ehKoP4w#+`9r1C`}IZ
zehMcy1zQn%2l|-PoCEzqoOq2ZC*eRB>2UFDEODBHi`MR!yG$6(!SR3-jxqXU0H*>r
z1t$aHIaeA_N4el|7aZ(@{avt^0>}&|yvmW;3Gl`-MsWwFx+ZOxfc+Ej@5q?`($3>k
zSvCE!nRRD#@TgC=$sUI3dYS(VuJqa&-VrWi!?>w=|H&8RHA`NL9`H=DBV28HzX?2g
zJo3Z;`CV4@{wk$sfH9dS($1{AF50{EDFaWV)281)@{7>hEaF|~<NqS!Xh?=mbNKAj
z8P~a;%rADGkDx--rw!M6uZUWq>-^Z~)K)p+Rgstl{XdKcT-ns_B&nSY>gI6CYsH@N
zDk0Dq(^$1LMpw1xTNkGaUFR1=kXGs~r4<sp&c`JQ1-v=XrL^Zde}Vo|oBFH1_v@a3
zHeKhNm!m0Z7Bg|MiNV1kf3Y4cbeO;S=cF%!e&C=bQV#P!l8my59Om4b<ir9s+(%XD
z*5fA}<_qZApLCc{La#(pbrvvE)r;D;Ema@UiQ!^yJhL~v%MEDHVZIPthT?W*@ldYx
zAm3{h#B8z$p$bpk0^E<N*n7TnarzeN^wo>gzv-UJ|2Yo@^xsOSzf+w4Qk+iT{WsqA
z%~v?a%DcWkFpOOc?JQ#pyz3b~ah;bljIri$#RukH-}lcn$T<xCj@8o1Y47@$q|ZBu
zDCb=to+LW&`Xt1)9q;<}Qa35@`iG1-Gh*RGf#*ufbT-{Pwl;MO;Y=dZ-cb}6G1PW+
zRfXx{d1ZQx&yaJ!=c_nF4TlE4#O47;N@+KZnxI5Mv>owKB0lX(1ZeY@iw`|lBdhVD
zaVAY9!Ab}xE^$NCShgu`ja)nZki@@2LVt$Zsx8Lfy<&wu@e0K7a)vRt+)ga*8&j*&
zj?D>A*?5{wbk?!yUGY-fzrvG8Q?{o(I{i(8#1(%J8EMXXYEGdmUU~O)Zv20(VKw_)
z0psJ8*lqgSNp1KeM?&$NWokroSm*e-z!8}12;e5r@tW3tH2M~oa;pV;+h_LC5R$Q>
zx|%b*YY(32_Mf=mxh<jax1pfNc~dPL-R?z+oO6SrsVQlY56!(2YjuE1C78x!E#$l<
zEKE_LI8<1~QoF$py+n2EPg}3x0In>*=;9#nr_#AWFs*==n;|N6bo@Y8O(@dAXKSO-
zKq3Y=yu9VYhNq!m$;1v~XBq2Evmv$GXTdD;jz=Z$N%pWHm4E>`P>B`JyRz`rjyY)e
zx4lJm8~bd{;p(cQ(9|~_Uc>*e9TjRlmZ<)$cm@&<RGqvf_zR3ZO?8#)JW^vTEiR5Q
zld!VLB#evr{p?f`xBl6?I2g)l--ech(CsB26IS@po`06R_yArsMWgCJa~H3XqJY2j
z$<<<i>Hi^jvAKy`4~6w@I%11_#G~Fxn!J8{xmwp_)-G`0*3U9sLsyvV78zh+-W-gh
z#i|23>14n+PcWPJM8M@I8F)Nk)yXobPX!`Snhf@%30F;O3XUM;8|{Y>m{n8SSaZ6w
z+gI{lzp;8McDqUl*LcqC_B%`2_#zDMX9oNR+JMsm*B-B8t^&etR~o@I7ff=&c`i81
z1*f^-Bn6Pr<6fs4wef%>PB&1g`U7EX0uJzCIGdX!BF4CjA1A~vi`0}dv}&CD8hfSD
zVjiisT-kjskx-)oA71WeT<qMQcLAe(Rc3a^jSS?mGAfx#E8Ulh#WD@i%0+Glsno+m
zPnu=kEBttP2S%~mx2DlU-dxLP{GbUcG!RRjbE(Jk<Tk6?*}D<dnzv&KDx3N+`5+=4
zTbTb<nai<NKF}541N!m}^@^%~HyN!^)$tm#6mBKa+rjz$X;C-;5_2ySJ||peODrmR
zFgAuCw@RJG_Y|hvG0fG&w)SzWU@jc@fZZUNx;1tKP^eUNYwQ<hmGXMY8>JzWuj^x2
zG%h`Z_HCq%Q<h9fIbKtJ_~~m&AHD}nAD-5^y*}(fKe%@8`vmR0-naAlY&$#C&agXo
z!<o^#sR8X7tq+QX`jh#4T3~bVr3$h(>RCj^HtI#i>8GUA4=hgKC7r%Qar&m|^v#RY
z*N)Sv>VIRSUh-$hZP}=21H<iAoeH^Kuul;KC1)B&()XD<)7hiV;b87Q<W2h>&%&^b
zjT+J+CJfP6byohs$;3`q+6HAVM?^e2Z6-URE(pu$$+Q{jHhC0$utIkx@wV3W{Q>jn
z`{lmx`%TNp`06bkHP%W=<@0;DCocJl@E|TaPTp&51VYQp$Wz#Sg}1O68fxPB*}Qz%
z?u;KfavO$+pRRDZEBMv9I_BG=^TqbMpCL9pTYNr5^uDn?VOaUQRNk3M-q2TlayIWl
z%KMMg{MM9rZ#SU3+m$jA_gS}GcqZ4`nNS~SK#@>y5$?jJa2TKE;bjiUIE(#zvu-6m
z)!8n3OVO=_a=OWV&n}Bx%Uphl=&pz-6>%3oVFN=vdc$$PUa*zzJhZBN-5KQXnhXET
zMS@nhKN-+Q-EQS_Fss|A4rr@xT}wijn$)eU>SkXsd7N6bR*EC#XLqrRwXUUV#!q^;
zZ^seYPA-Azk0?mY<b7l>n`y|hIY`e|nhfZ^IoU3F-WFYftq(BP<se^hGQ%U@pws;Z
z=7omfW-TE2-hl$!qhYU0uaPv3HNLyrZ`C+^2X=mF&kkQ$v`?c|o7b;iFNpe;v~Es)
zt6PpFUkY>fe)g$fyF_1o(@*WE5>wSHvK1@TA_2DE3d?5L4uq=k-XkT*q=#Q#<{*1p
zo4n7}g&Jt*s^nGST-D9LFZ|;HsT$Vla}U)m3sh1*xYw^Wo<2z5UpSdh;N&+vo?pk&
zCm(gE-^Y8VuE;X=ocHm>mZ~Q-1BQEA=Q{@J8y1`9`sMD#jNm39aNNLsn@t^R2`>0x
zM3cQG<O{c-?U-!AICqG)`n*L93aG29XI<~?_SdjC8iGY6su3uc{@JBlytq2g%F!g2
z`Y`Gy`QTTnlDbopW=*MvOL2fe(k+v;D6XN&DGO#Q_Y?X>vDuuCKfiediM!V`r}WZ{
zz8a+^M%1U_;Joiasnh-{vBxc@!u-qFbzoo%7ki<%we*Pe(qIaZQi^Umtj?D4HTJiw
z$=X7kL;l>{hkbp<WpSScHx@1T=BNH(Bw+4|>0!|2S`7mP&|~;@*!5b==7SkA?ovAE
zjHRw~SRmTM^FG!@bnBLUK1c5c%BV+pdk51jYGv8fr>UN#g&^1R8-5U3EWF@@AK3h4
zubS>$Y*te~H)Z9z?me|uXu??(<6Po!*vQU1wBR1%Vdtu49`B|YZ&X5Soh+@hW1Jl_
zw2qEwd9Ph?fQtxAK*K_+cKea1?Zwhg{WPF(FV`8k3-ZAki<7-vYO4F}#&pic!=0`i
zf{wX!64$)(kl{|1vP9frKnG8MA8}{8EZTfd+}SW`k#K$&<BWAUo;#NjA8|)`7sPmj
z6IvT(X^o6=Dl)WcB3f{#O0To}xrp%Hg~pw#0`4Hi*`00&BM|xE;6({{i16GQe>2kQ
zUPo>V>8i1jP$FnS=NBbt$;<yeS)ofSAb8x&d{qZ@)^`hq5`0KdxJPbd81I>k*{wZt
zEzSIdhjX_K@urPepCi@V@&G^d(c@5II!k>DdaJ{{+R6ueZD+blLoIxsy>t1V+Y!TX
z81sUvplQkthpnV_gLO#c-KEQ9dl_#~rr^hI?ISmX3!DMra+FeGT+?pFaq~DcPhoxR
zkUxA(+vV5)2|2lViBwotJvv?Sj|b6Oo0?~9QDcGD`rTWYDz)5I7dZxw%?F22)oAD7
z>uie42fMdZ`3>5r{Az7f{s-cuZEf>otg|aF6_eRW6TCejDRCSnMp}9z`?|xW`nkD(
z@&3Pf=U^Ep?9pMFkNM!oahm>ByzYgG$<9I4Q#+p0+T?rKYkk`{w+;Qz9Je;$xAnGE
zE(e_ZO9Q(BUV5IE<LdwsC{3&WQbMizI})<$|KVS}YBiZ@T;W&!9oS3NSUH`kL?whh
zAE))4j{&jk8Mf-*9`NGxt(a{AUju9kb`hbbKxqX1T(G4JHg&;<E?CzEYbt=S9(TCV
zsPzCm!huSyn{2V&0rdy&8Xjy4>iXjqNWHM@e<yZO?mnchIe7o+zBzl|0=vkT3QW`P
zt=$6AiFPz(CRgD(55WW=^E97pd9xk@&0qZ^gtlHC>1B1FRjc^5NhZ8~{|=1F_(a}O
z)J+ROxfKouW~`sDlLc*_$kV+qd}XsAP1U45!Fd<dHBvi^{zz*Tt%pPZVBUr5LY92Q
z7m}!p-g@O)25NFJ8x0-drn?6oH-#=g0aVJMlFTwwb%Tpp3-fBo-e}DR>qclYcB<W}
z7nFKT?bwK#y}HB5c-?EFJ0Ea$?eAO}Q4{Kyrd%0UsWj12O;&?ap(o-_5c0v%<*UoN
zTv^bN4_LUFw?lg(Y_H`aRlU;h@IK*wcEHL|hZz~aW$TXMvon?1v{U8aeixOcA9u<;
zvH}U1d3u%b<2Is}xQ(b!GHvwgP@fpo+>W^zZux%KTf{V%c5zjW-XfO9ZxJ_1Cj=88
zH&H44q~{MT_9C}VaG-EpGn>P!5P$8x>7%0zeRAgxwy<o{z_R&L(=(eUYgA}=+>YDu
zCC~*W(}TVM+Ks?%f(uZvxm-ER#NS|3`z6p0ex~)kau#JHA60(m2wL1JM(?MYz+F;q
zyz#O_Kzd4;qQQCbk_AK`>9(7=59_5yA**+WAilYBH}Yh#r{D2Za$lSVk30-LfN9CD
z?8MIwp882{N%u?fr93-iu0RSbS|axPbIjo?ERHEhu<bNB<0RL(g&$|5lquhBgL#FX
zi2fj0MI%qd>Fjf8#}hH_UWlY#h!uDuhWOJb1Db*_zc79Mu?s>MyyJp5T(E8*9Hv%s
z^ciuchH50cf_jT9-)t=tum0?CpGnSYU^A6BRzf@y;opxk2SD%euh$r`5iIK+uh3^e
zgousgC(#PMb&^cY-Ym#BV&!cM<<pcQUK$@G?DDfmIP8O^Bh__U8E?oXg9o@el(MGc
zQ)MZ2(e1ZZ`i5bi+xQ|wNM4Bz<FhiF7qwlh?a$AaVdqBLv?DN0?*ogn0ugySH%EPh
zhgeA*yBcRekte|)(E66zdtDTa|GaN5-1hlo;oNJ!%`T_m&WNl!t!R7MR#r^FeaWC&
zrCvnuKveAH+qgKr`_D=L?6V^JZxR*L|7&r2Q#$>b;`B%3bT!2IO(z!HAu#ynE$tPg
z&Ml24*Lsuo&`S7w8`71L4AS%3oEp4{sSPX4+p%n9WKl0*^i^KUyx0)@K?wQaPLJmo
zds^*>XMddtMcUgjYH#x;xDUabw}b7l@^)0T=t~(XZ^!tdNvBCU_r~7vq8Xcf+i)fW
zo!KLNhRZ-}fl9-*;$s@x`W|gqe+`k4)aU9>MxV3r>*aL%?sFs!X=leKoLhyE|5Cj~
zqoQS|2~^OCUEe5tDWL1*wh8ha*Ubmh_=QjFh=FpGDO0O#i3)RUjQ=X(g&Z57f6_Pi
zEap+`ZuH3IkJw^iU_RIlDyVT=8T^T(i20t|5QFmC+ZHD>KW&|SEw3ONf;Ck#CD7fK
zP9>}VY<8qe)>anZb?Y9U?z$7ETGxHPz`CwgLE@;=4Nl^+`Hy0DhfU`jn=8WO_VpSm
zyq73rcy^)xj9Q;L&Q;9ecWRBp{$!UMd{;RRkES{?hs$jNv?T|O^TDS4QqAsaqUUh0
z)?>nQuHlMQk2pJ%Gp65O>OXrr@Zrcm^!{cEXGiuCXI~)(&VD#wT(J4kSi6(Cu^uIn
zNPhrKhC9V}rH1gvpY%GSR?VkN(*7Y11O3vKWDB*AIYTHTLeg>~r_hlqcS>rCw`c#2
zk4XHtIUyW!o?|xG{&?@tI+vvvrRM#4MLw3e?`$n>4w{NX)7^jKCF*`nCk`X)p!sk_
zgewQli;a#uk%MN9r_2R0k~YG0=b-7pO>$n3w(p>M|HH@y5ol@YTo45gnuRgW+cJ&y
z>dPE7cM}f>V+YNRG2UE<CwE4HgQh;lxh_NNsE8JZk+xL@!(2o-2DHR<{&x<V7yp>J
zAS4xT$o_*n6&cUFV5Y|0Y2rGlLhckfXqsCi?r3H0xl`bvxjn{N>~K7H^2A5nL8Aq~
zjPY(xXcahU4v%rp$<W#@qUFuTps$Mv_W;cdNBd%C%$;@|G!H(Qa0hkbx${gz#z8aX
z7b!stPIy9smN;l`<J_W#r8#JpO_GCV6jW*7{se^%n#nNUGdbg+d33tPx8a~!A1YY~
zO~X*H&ho(=&htiUc<X8@i#v&7ILw#1o>CTFSsZeXlf-;5#bvT_|MeDR3eF@3Gor{r
zvm=_l&_S~qE{Vdp_4+|YmOs|Ge8*{P{Hxi>Nm~w@SU+{GclwF@|0)w-$Y^R7Ya~9(
z7cSAy6}^i+8nG{=<Hp5_u`lFl4&q3wp-STOmx(V#Zg3s@Osx^7+6(ja-Y~CESKHIo
zx4o0Ihup7|vquf5Ex|#+sgtt<Zy>8y3(~VcUYeE#(~G}F24w=X=RE6AoK6D!%b-?#
za(4Y+>E!JDe=wnYji6BI)^Nh*PaDZA$jRBEu5^>Q<mBv0oPvz~Uz;U8@QWX9)!**P
z*|J-$m&L-Y8!qnUS9VWxEjc;+RqEvIxKxP~`PN^!R6jS<@r6AX_jy?x0ulH5tCht$
zlRjtuDYiQi<L{H>s^PuQ`6&owXRp{)B(I8k=`nXG44|g-0M1G*pq}>0<|!*mSQd3{
z?O}_jmg89G*>G&im9&<6$mZ=SD>^Xpy1TK;N?8b9Q%@d=L(~aUhYS)=9;q~q)G>p^
zlSe8~BX!Ck@#K*z(?~%Ei6@U#lSb;CLE_1fHk*vFrO~=%(0FoaIpijdR+>TM$)mx>
zG}>wzG@d*fW@#F2^$Z$M9*w1A8f}dX8c!Y#12c`*HG{^JN2|=Db<3df<k4!fXx%et
zJb5%2moBs{gT|A))g!yAj8?DFj;(dx@0*iH6Jv8-z`OE$2<!oP)C>dH1iayLIaSvO
zB2b!qw_OQ;;QO~-2>lU@*>cIEwGLpXLu2W$aoUP>IOYz9HFqGr*EjdPbK2Gbj=#d_
z?+W-NAfFNkB2XGm+nrr7&;@;6Q0;<ET+mAagx4ZG>Pn+l26)ib26hF!!-1;-o_dYN
zb_U$>Is-cb>aRJtiZcfe%6lk$h#NO-T*5HBLyN7F{_L48C;8ckoQKCb5B5+~@Tj10
zA_O!y`KyLL{}Za0-jb{J17Iwxm%wY=Ij}3D9`3-MakkB1e*?1J$ZYSO18ah-8g)eb
zxZPVX(iFF5VIklgtB2j`O;G<aVD*hU>Jsiu_HQ=Irn)tYEgqV~b;wcV@`SK&lDvrN
zZB<|0VFeU>5#LA>=4%xeu9V@F4>tL|@uSe6_y>nBbGae-@lHE1klLCxnPe=tXlvFw
z+EWUTqpevT*&-NqTH8LFQ!sU-Za4;*Zm4~yy>9qa^?l$2-wjI)Xs;WV7;l37+m3$9
z+j1^Zu{T8L5LA9DeM~z2l;ZS}>GWNS)2q|zn--^+r_<LiPS3^ZOjrNSma8(Ew6skQ
z(T>3I_QMs0ylrdCRV0lU-G~rHmd`VfN=~|Mdk40vi}S|<%8^~`<jB!EZF#$n&RN$(
zF+Nr1?$+rl@22gtq04fu1MP8D{TAVi7bdpWdQHJ6Z#nJq1mPN2?cvJwF3w0P#0%;0
zDwo+zrJmsn_%$OF-ruuxsw?%_a4TNmMQPiiy~aXce}Km(;L!<qqzC7q(Q~a;_{9;+
z3wOY53Ep_KFCS0Qb4Pn#$}_#_wr!*r`t(I5WGHv)uR&)3&b{4wtG-7*cx^8Xy5?|$
zvpQ(h%~nD_xY4J3E9}VFNb9Q?kPQW{g2CJuB`Vy(85~2-`1Q=USMqwMXB}yz>}90m
zo%#7kFiNA^W_B@!y-rpkjP!7QAb_gy%Xe(;>6bq}X+=wCbYE@5isUtublP-ElrtdN
z4fGbcMDYFHz0s7Cr(s-~(C`i$-OX#}H@d%dandmx%EInvTK0D;X%;_o?h|x1KM45w
zx5<DX{dbIQUJ`WGN5~y5yB+wY@PUU-%^fM*Ui%7Fv+)28K}a6D<3tERf5&|A7ZGW4
zm!bc9eJ#+QA_m#th|F-U3{3ATD`i2}5ZtL`&L0un$*cwoldV71u@PFxmkC#((RIz2
zzkFy@d#JBqJ@{L-<=Qv;=J=dXsR-OojUnr_L0XQe&U7szyesaqJ)>o>yr{2FFabKr
ztun@VJTE}MB<lf0#oQQ;q1F(*PO0H~=xs#Px>jzlBZyo<%Ubt<QM*z*$Ef>>ju>_9
zdScWpVqnx)_bCWon@!++ioCXm_=P0L0+wz@J~%E#t0%O`euHJ_6HA|^)-itej|X}_
zs7~elTZQF3&F36mnDZx=jPZCHaH1bik>*?dyhIPJKF8L4|D-?KT=TuGjtaU_ezfM3
zusH|L=FrJ+_}Q(-n|BBb*L>@qpDxIDf?Q1Q@PKnIKE3Qam5z8A5_ANf-Oc`%bj0#?
z)e&nGLr0u?uL5*~>xCn%i@$lDNck1(*l_kw9-=<{4Oty_bJ+9K6w}+dc4?VL^~Fov
z;t>&TXI0i5Orrq(xjPFQKIJg|dvaa>D5KT#$*HKRU2k7kDx~ih*Em7e8%r)S2p-}Y
ztAaH+xZ?bK(}V4x>?yS#qxY0Q>gacfR<;xF+0))+iqF-*$GLhtW*ud)W7Y*n^gneM
z1*~+Z<BhxyQh)C*3b+z6Uilwf641I^(vJU~mjrA{3$%0=Gyd~S0)|^Z)8T_6puYej
zhWW5oA=AS#*2g2Av>b+TfK#nBq~bS25-HJ@0W)}xq@;!svZjt^@X5y+BdQM5Br}q6
zfL`27CkRBwT_~^)`rKbA@CHX>B~qiASOzeesoOIb3asO-`=7W_U|2gx_7U7#`3P9(
z;bRBT3^eEzX=u2>^RU!~0){!rkJ>N!+Dq$2b{s6aP(Xx+*@Xg!9~Z9}>IyCt7{d!G
zE)*D=G{P<v;63_@JJGCqJRn1>4#NRrHzxe#Wdp;F6cd8KY@lq~X=dtEb2a0N@$FtX
zFz<hG;lOpMOU(<zW7E(UcW{c+eY$|Ffs4e3!lq8%j_}to{=&aw@Q-^k=gU)6s`gaG
z_vVyNw+$(59PwxEA`GE>7GHHAXW8glq$m9{Swd1SS!?9V7a4Zl*=9YFE+Z@SIyj#X
zYa^y#Uy0MmVos+hY~9CWY3oTZ9r|<E$%lEj<U5I?qs?sV8Y;wlag&%`bwZ=dTYKOz
z?^VLJAHBY%8fDinU>SOkP<hD`RX3`ss*I1stwH&OgOKQ<E!ABRGe1_j>g$)QThnT>
z(OzYW11;+*Mr=f5b~2x)+)vwMW9@Jw!^_<0mi$=Fx)Polol111^&{HjmI40b0-6f5
zbSgcak7pLpS?{OlG!)UPfeyPcd)`?{XM>-h(>gS+%+v+vDf>x<**E;D>_H+QvLdcj
zt?)opAfr7Ro*vq;P#+&H*L>A=I^vpfN>2xQzyc|jA*SO7@|-9#<chB?ZgY}T1<46h
zA+_jcH7E6TWpq=ITwSSOFZmAq04zplDGAUYD6bs7Gmv@=YCTjVyeo=&P~GkZ;;gi%
z9YA5^+JG>(LA7nY@}ptO-R|{BHMgiB04H*Kbcoxzf*=l(svHEB9&RR_CBj2A8<eva
zSDjnYwWIx4yY0(Jsa-lfKfj*M`zsS!p&#B-RPW1T@geGYMO7tHj`x@$;$-?w#r_O#
z%n<d4^I@A;s5y9GSzmVdi^;)*fM4IThrmAoPMB@rJ%IQAR&K6`fC!X^?ho!DlpAd}
zq2K#Bd4hAJb-o)n+JiH2qlt95-qn~(&B2#1_s!iW49<N6UUZw$e+}>^z^33WApB=a
zBY4FHFSwxD1q)s9xC<Up0JVD+-fq<H0_^U<I{@_u!fk+W|IQF@1?+c+fwMe9bFftm
zRe7i>*jP|_ROfcRY0beGOI-=g!ABly3jQf5+?;H+`Pheczf4)iqI_t#0W;&C0{OOm
zX!;yD0_r{>@FEQ`H77;lTw;4(Lr?0htapit&(d6H+!gD`0+(1va{L>Y80To>0^YgW
z3Mh7oJ(DEN&tV~l@1JdJ#j<Oyd4(>qn;g1xiM3v1F0s_-1x_QG!O+X^f-7{1b$IdL
zxx_}^l5lkxFkI~k_uJ;`XD~9H^@?|i{n3E-Tw+g2YVyIzmmK|+%WE&9VwYG=ar!pt
z^g+exo2AoBi_^b)F-8AV9warX^8cPrUs0U?LY!_2#%8_$>~jg<&2ojyC-w<2%$)=A
zEOQHdVhDZChP}jb{G~`yG^;+sF+ceQu4X>V_{8QQylyh|pG!FNsdjy0)2BeO{mp;D
z9IYVrdMjS@G7sP{+rP0BT8FQ~v$y%+ofB7yd{~oTa6=gI!UQ}&0nhQE^I^5~el6<)
z>Tswzev-R9!!qv3WuB=DfAq%>w5f@krQ8Xwr>V9*%cb@E=W%9$YVM3`xief+%}+Ui
z-sC7`<e6JHasYLiBL`6HY3BWDJ&_JP2-@73Mn~+Wp~HyBa<uI>+tPJZu-cWi1Kc<X
zT>X))0+8ji{2K=YZiFIj)fbY7U&-8)yFBW^Wzb99IdLC^t6Q5{TH6jCzs+SPq#0sg
z-E2~38{7WHS%Ksj-#*85K&u6>3Lzi7;PJdm<|v}(5f!^+#KMMP3u|BS)D_Wke;p#C
zHG2!E{_;IL5kvbgG_vt>|72V4htIX+bP4yNM{66RCiqIQ$>>pXMD!b=FO@IZFLB>d
zNH!Uv&)Z%1p9T^AH3j2=R{gx?{}MLv+ai<R)AIjeo}-0bwEXV@+5c_J{}0)%AGPCu
z=kk9mTJZnM^8c2;iIiyhe>u+)cWW5opX&(4zg_;Xdo^YjgPi*WpCrTo$>sk}M@k!D
zPE&ll%m1&m<G#J+|Hxm&*3tjH<^PqV{;TEx^;e=P;K2Vs%m3BR{rAiNt2u&~Ufxal
zaJa4QoC9JhF3YZ{x>~6-!l6E_@!?<}4)UR`?j%MB%1USUP(1ToSHF;p_6$F33+-Sz
z+wmi*t@PPiH<1_Vz^n_iQZCHF9qW3_C3&E>7ygE<(O^8#49@yyyXhd9l1`z(KTw61
zBm7#jJXg1arpfYrO@Q>(cz8A7!3INfP1eGaOrN$k@W9rC+p3jaqgm5tid~}#$>2-A
zE0(V*bp(SC?5V3ry0!0sk!~C$Yu`;&-@Ey7E}lC3-WfZryhlPCbxK`QeVx29)x0|z
zOp|JKR6S>&v5ALwWIKj?iP2@w9z?eu=}^@y{4iGWp=7Qhqq~ktjw6d!vvqIN(1w>c
zUg+W4jhF7U@T@>RX$wP~RL$YFhbO1VbTMyo3h%Nd95ho4nu8gDjrZB=?AL(b{=vXs
z0iJNbmWWpZ5hzVd&`SvQp|=YO{fFLG_$BC+n^=O5yNV^KNQc)?iS9m`Qn)K3wNC4d
zhKtr|-(F=#@1~H>8okl}g^!_&(6;-bx0|QgGAdrDsWM_jGsjgUKUVUgw`0IAT%%nk
zrsU(>VA5-}A&$7a4W<(f9Cb41J)dau>zkJiC|cj()N*T5^OLFTaLzS{?@rCE#0o$3
zc0HHgCCiDp<B-<ZP)OpJKJ@l1FjL7Fi;DQ=ogF<I51<d-hu*qfvnnR(KlC<j9~$s&
zN=W|G554W~E2Wjo_O4P#7gefY<zkooMIH3ud8w7lcbu5VU>rLQ-IH0loJ)6RRxXdt
zX?NxF;@Q#4CFWjpP*0@>II%w)@PG$R*3SZb@{a~i0KD%{68rOj2$UwVKZWp<kz7GV
z$l=p51l|F&;7sR$nRWxxKl~b`UnPVyCz}K2m4$tC9}1&6m;*TJAuHw)K>an@u?jpd
zN+bA_3+{8loi3Q|f}0dT<|@LQ9hu7k&v@7<<^iWTa5|tP-m<{j@UDXJ8%`}pB2}<S
zDf}C0k(?r96E9E3<cYw@*clLQdrWSa_MLn}!3DmPE|+A-q*$a8u-y&um@M#}G+$gi
zE+2z%JLB?B&>8W?zLObA!u;H1SaA0V<~w=i5^G+e@8oEQ?tCW?fD?9F_`|B{!SCh+
zu4~{;0&5Mt5->ZY%gLW|u6)JIg^1s6?=M<oM#AP*ml>N&>8iHbd<P5&&sv}gt*u&I
zYT#-DA2V=OBh>Q2rNk6?FwP<>_MjYAoW5r|eMoWo*6H-V#pxTw>1enAW>e6&c~^I-
zk&l6qyKiV!mLUadL=FfWc9N-+>r-mv;j2xJY<O{@8X1WMX4J@phuc*nznU1Sk@Uy5
z3h!Y;#Z)sdRZti8!PRsoePB!M>o;*`kW7~5@IB7hu*5!72>D>V$MXyHY03?maw7v!
zDu5}yw|+Ltg)6w?wie5zJlt|`2Ss*<Umx#n7Exn=uaefT?2yAg?ClPJF=Ie7PP}Sk
zOVj~M&P&QaU-2r%f#Xgs5@G9Sbl&G~5t3YgO2=IBgjW3ZYXD9$klP;dHv@X*^ckT3
zi2d4w;2z;{bp~$*;NMYMlxRDo6ZggUmC0U%jl(e;ca)=~EAN=P&Vr!TwW~;zvuo>G
zO~F&2nf82Af#UF3nTEsF!pn!|;73Z*#h(<q3h=E*Ol5u#IOI_S{{?u`V^aGao-~!I
zG^u^Hr(`nwy9oWh)tZS;-(PnXlF=L-Crn5Cm;@Z1fNHTvI4l7V0epuNBMp(Nulo{i
z@X>TP7&Otp4Gi<flPNnGqPH5@Db8kT`~;$I!ta$&6i`ax)33d(KKbC+z6klqFLFh6
zDK5gl%Xy1T)M3=8*6;4*+H=H7jvsebO?gcZCo0xCdlaYl`#I@r73W_yFGc@b9tw2c
zKho*{EKdJRoZb{%`UyRR+$1}g-1%-=HttuBvNY0YU>NW|IkTOhRgEMr8Zjo&|Mi2+
z7KoUjQ|#Lxn}==PuwtWRaI6;Y$&&_0TVlTtY|}NXNNFu#^<0zny#Swi!a()Q@+T$s
z`vVauO=7<*p{$)jgjhS<5=5_?&T`U!!{t~zbFRnQQ3>Ha=a{uK4c^=*jOJiG;46(*
z%t?UyYYHX+Vdf}}V5|#{cELy&{K5sp6hLNw!cQETTEM60yEXvo4}?8Dm<%Mn0bQ!Z
zXb*Pgb*J2x?rX7=f%I29W0t+TGYZ9bX4E*G(N(o=AkaaBEIl9WI?aiS2Gamw`s~}e
zg`yHIWR~Ooter8nYBHJKL4Wa5Q`nuSYYKBIdfs8Y?R6S7e+7Cc)Q15hLyfWrVteIU
z*x(?e%kJUzFRZS{u^>Z6Tcex9&rdeXWRU+P?DkeT>(O~NWRG`WUT~5*BL=z4G1AnA
zM%3(bjGE+fjD}O~jt(vN3Tsdv<*^z}pazI(f1KU@gR(2^N-j+M8h5Ei)b`35DU<LD
zXII)}$n@8vuz&~7@lDj;g+cL`UD;7!w_)`?#jefRP3y%zsvn^_JM7vFuGzq6->KYR
zn-M>{Ycrxp<~LoN(MQ*2RO|a~)g6*+Gx~J2YcqB$VFKMPS2k7pkus{-%#gf<nd91B
zMc%4h*>v4Nz%*91im>bo`8{k-Rv#^6y;8Us{Syc@u8Q~ExV%jO?q=bMUMfG=gssqo
zy;+MM-|fMN=YZp<g#z(7%i$H9%%hToq+n`M6Xr+R)u#iU9#D-d!NuMk=wBwD&y^ZB
zLUd?Pqb&U@yaqn-DqO?T{1CV&G&3ht(W;A+(eni`qvwf7+Z#PkK_)zjTid1wCvk#2
zJm0{h1m0`lA%Jjcbtn|f3*V3u&r2PO(?3b4FB6&U+rath^m)bUzfY&%Q=EQ7oDP5g
z8(aCs$*yjinHB-VuspQ0GgDhPibR8LR}@S9vT!;_{<1fUG@hX3P95DxQXlu)sZ^Qr
z-JYp0w5b<>V7(u0wC{CyyEgT9D4PG#OU1NJJ;Vu!+0=Wio3^R19NGaL6Kp7ie6Wtk
z^ES0@U`NhOjmWqzw5c!SUQTCI|C#rcf(mSE`<_?%ya!RgjT(Xy{qNRo!>|^H5_jqK
zKQpWmfW)FMe$f2SAnD2;o>J6D*OL0JQ5~h)>{Y+9QwDP8&Kb0j@2QtQJRzywl;e%R
zX7iQ0-C>$1!h58drns+XI@37TK6;I8Hq4b8m@5^(vbMR#nB^X3=%aXw)i=dPL?{iz
zD<j+rNYDYGG}qXKuo$bzf2GrQ)^?gNl(1gC51Wk~6N;ltee9+e++~g=5yN><cjRj*
zL`R5X6npS^`Y2ha>BC*_d`<ru!<~w17~Y>2Ra-5{3hNv-dMMS}$R*m^ElySC<A*XH
z{A=F&zZY_d(s1HlyCBulIOA(DJ9<BSgo{->l7?HWq9%Gi#%)Cg7e(zQ<bw}mH1Obt
zwa|f43neK|p9T;Av2RXNfnoFr;Ju5?T>2B>7E26#0Pw74nS67A2$WWW$#)N7?SW0f
z9fW?Rv%=eY_u{K;oH-L)Po%@f(|%mV{vBm^C2iqBr~Uof%V~JGmWemztapJ^TGc46
zZonw59mt$jT9J*^H|<#Zl%kM<v_JO#GsF_Q%5Tb14aKV0r>3lkhg3zAB2rE#N8uc+
znW{FKCDR2Q;0n+ziQ=fx7;5cpf+&K{%-Ax)!AMA*KI=dNv!gqGR{xCEA-*o_3mJLw
zJpF(%;#U)JDCuUaiv%z^Bs1-!pr<@bUuxSbRp!Nvefj3@Kc$_;8S}R-(>EV<SS$5b
zM@rGgF5w`WC?iJwtkA|Wp&3v@ELQ?rcKG>8M-Bz1BTrK^+Pn<zI_%Bx+6TO!{B8q^
z{N#R>sciw__}lG>hr8PIa#v#0{k*2I(&@;%Co)|zl*-*}7WW>-DQZc;Z_kqFr{^_f
z(G2(h5%(tWRTkI({{`|$*i2B+Xjvknq9Ti;MnwpU8kZ_6Du@fNbzc+3Y83>O^ort+
zODk>_m)0GDY6yx6t=58C#jWE0#Gulu6)l?o`*UWV<=&f6Yrn7GKd)EroM)CZGiT16
zIdf*KtefLl!x%Iido0A4x1t7Q6|D?xW#LU9)6k^;=q!lDyK_Q<_O%)m7T)qQz7^)n
zqeIFmDF};MvNJT@4GOK6vHI3LP^(YF^H$5UV~Vmt^X~^`Sn8<_-UraS*>IXXIH@#Q
zHyiHO&7R>o-ReP^_8w(ZDd=0ps;S_xRzqyHOFO&uV8}7MYs944MZV<d(`OVNO?za}
zbfwW8Da*>05)E6h_tHJw%2kgM$;#EXrux<#CFV9MwYd=UVcU9tMkCqMR?`iJj`wZp
zJbE#NdmV`5UJSYBob-z!9o@SiCljuBK?XMWblSCT?jFg?TFLYiHHt+UJ~rH~?i%H`
z<r$=C#nDl&WcuIeD-FT2^AJ{X!7e{HdK{z`P4%W@;EqUB{b~ESc97zY+9=g*D_}au
zn1}K^hc{zZA8I<7n*&A?>@Ep=xAM^#e#T)zRIbC%$XB__ZizV3@8i0kI}_Tt#I62l
zFxoyY+c(8%*bBX)j9tM!XmK%m&#zBsYth6Qr?wXLk^rkI%?5WqI4IKrxHh;MDBJT|
z{RS`aI?*oAR_{jX=94%Z{1Wfe>rc$~e3TIFjkkL}zNtoud6x5Ugwl~F$5|}5Els~t
zzSqW{FT;{-BrXpxo`-%<*_wMUf_*Y!=Ss75$i_tYhVTWgZG16UE3R)kD-3s9yVo&S
z>gAmkAXr78>P~s0W$e}BgO!aL*vR;3g)X!;X=monCRt(O)3v!h){f|KkKC%76O?{M
zwz!ozoXVNm!^HLqr>d-MJz8d$#TWEyExjo*D{D)U1#2Y>#`8XsI2z+IO|jObLCN%E
zD7h`>M(QCoEn2u0<*uu^jZwO?T9yL%7*Z9noKAU*X_j<j;4`Xr8OOjBx9->|l@pLV
z90?!wSy0~o+>8sa&JEv?a2RF@cfea-kyxCXYjvIRz@W^I6bfCW7O>w7rhr@lc+HCj
zP6a&dCFvqp0pTc2=BG>LPG$`bcNdYHhh1u%a^3e5bdj>(P)nf>w?FB}tTEqpell9!
z1WbqQ3+mQKtG)<VM7LXGe$O#OS}WLD`fEz<P+>HZoN!4>?YKvU`{15<7^^<bs-bvI
zCrb(GU?(N2%ffR~kvh*GM>@N|I-K!48!!8Xzj44O;W7u5hPzu54s}q{)Z^bBEp_wp
zFjl&}SCSv)b#r}ZB&I`6&V;w^XEXYgo^c>iQ+h@R>miAr@%#Jo^^8X-fN7pNdd6IQ
z-EElV#u|3yHnq<_*Z^@X0Vy?bJz(17nz?PY$1c<|JeJNMY12D}RTP9S-zhxWfL3$~
zJMk+kixr^hYoPG%k%q&c2`<B{=^goR4({RY{YByp_(=4YFFXRMZh&vx(g_ez-fF?+
z>~rviDVcU7(Znt|ndY<eXuqMOy>96m;w}o;L?+!j|IjpB+*H{Eia13^50|Io{3VLx
z9zNFoftHtZHN@MAVlC%xsj8vntmd-Cs5#QMm?w@P%PC9Lc0ctx(}Ph_qY-W|U>fix
z?qA65P&GeCMza@qUpK;W#YM(?u1Huv-qF((g)SG`2v>bl{s=c2>RUBhmbWpkg@=PD
zKC|y9K?hNkoyZNrGY0VCznZl9IpA@x7`PwcjenEiITQ#-VG=xh$wlx~;(Ea|*$bZE
zVQ#D&cL#z;sKW&lb!!!@X*%hmdSZq5vo+sQU6N3Gc-%iU4{EKCWZl%LA^5v;M&f^S
zR?;<^fuZaZ_vTYJnjvk&;-|FoiIm99H>X(kg*NQ+D8f3Qj)K1@F4P5sb;narHPa^J
zTr*A7$3usj4YwB=+FYpVm(K3&Ch~4NwCV9ANC`&~OlkL~iQ~INn#dw-Kv{`;G{?P>
z@rw82aVg>0dH#4}Heue$gcsfE#o^Ts*d$!+fYNY~VJZ-ZTZU&R(+C9Z>%UDh^q4=D
zX!-YD=5JzQ%W$`xG<WBunV{0lBMtpCUFj_-bfJXJv<r9Hi$m49alf^BJS}Zx8GlH+
z+fK6=UQPH^l2tt0`QRWk%=dDJ`E<??M%c_SU!EA|SC4fKSMCh#QF|_`Nj1Yf^2jUQ
z1cxtgte_@mk1nXm;3#i*c5t?Kt!biUUEvXU#X(D%1=O9Xeq#aq5Wvd#4&iZ|nqkGr
z-e(a+#diBMe(L#&(VR+bE_7CpYp!$%UM3vbmzrtMW<DoH)oVvsC~1vk)anGEv?&Yc
z(f}!0nCh{u^;S-fwKk%mLEDwFyPcl&-NC^0-8FZ%)pzd_@6FgH8P*OA&z)mD-YLAo
zfVPIUQ<U<0i{i$M&hu@!8-u@9v}td}aM)aoj^Xbr*r;0;-ho4}OOJs%QW@@%YK?y3
zNt?t*uj-Ppp0D{k(*#YQtCb$*GyDQPaesapZ#QPjZcsPL_xZPJym-v~&Gkv|3q&w2
zoAhPb#E+k4q;%tFn!jJsWX#=|xpgvrrei$nVib&@={Pf^IC<k|iieIOit*5o7(c7W
z<nYYYRTKZ~>%hC8nv9<Tu*T0j@;N1M{IvaYkvyF&zC}{l`1!)wHhvB}CV%{VgqARl
zXmk9Wi)bkrKd+fHC{v*}Z471sE_=-e&6$8Vy>8&I0rl4qTra30P?*Ng>2fDKjXiUr
z)7Z~Ehb$U{O??_Gj~P;9>u`>dFdAK&e<d_!wOkUz*x*K&r=^9ZMwe-Ky3r-Xh7cKX
zD%JP(0JbXy%x#i(ic9Jwn<f-dz$r0K)(|eD5vp>f%dUji)>owjj0_M_Ee6;yKLlij
zYOo$1A6g&Yc6-A4-pFOMgR6E-`o8bMSE;a(mN_I9-qCLMXg*u#j5f1l&s_4yh_^8b
zn#YHmyQ?VeqQK~C4?;4F7&$ZH{vgWs-smW*mJK@M<X`PEe5a%&9qo}9ZZ1-KX^*N!
zT6?_U=d{6;C91Nt$0@7US^3}I)_Ucy8J1+(TIF|0h5v`jZ|N@SY@_lAf+*X2lL=P&
z&N%s%ADKgDyUVie%3pLqs`4qb`#YTN+C>Cw4E_$-=}qe<Zvp<|Edy5o>aQVqPf$ak
zF!h*M<oX^nd6MffyPau0rs_9Qn&T8HV!6~-p8SqeN~2_&HsDvxUz*c*CQFq|^_?Df
zyT0?#nQ`AKndXkgx7L3~x#WfYXF!aX{&UOiM(69~pv`@^p-K`=^`EEj>l8@#l&fll
zoJxq(q9=N3@w<V^#phcz1iv6+JMNRkfw2|I>D#Jkc;5DmX`5wx9!e<4dV#EVx!$i6
zrJYJ~5K+{jOPx4Sp-yG`<2rPy*BJhajWD7vJ2j`Qst^UWVw9r<`2O59yMU!PB!2kx
z&;pkJH|2=?^TeF+jR<Obi=U)Rx3h~6)TNuARl;nr-))fR9Jr$H6wey96U_*gbA7l*
z&~VBIi8@u0?O7?3XM>?e`G!Rs)7as5-O=}gEk&ip3+0od(^eF&c|V4sZ^)8^hkdfa
z_dta-|6z!u`MZRY!Q5L5Y5o>b+7ur<!vly9Q8;}bVJ+x(Rizs(-#y>4Uh^Hko&Ij1
z%B8=CAVURk6s8XJPq~wwuwUt^^qqDaGzM4tG*R2GqvzO!rnMnw-@|gd%_H}?Zd1ek
zT>oLnS>Gis>@r_VIk&Dzm-!e9<_$TGg#S-N&VZW=Sk#7`O$HaRXwH!H%%CJZEp^Ka
zhnz>aNS76a9I30VxNgW<0ita0yALxSxdA6%>i#KJlK(j5blAsu#tk_ssk;yDyBm4Z
z)K!3&y=$DZ7vMW94cx;s0Q=hnvA<0YOtZUO&omQ%>7?%Szc8kG>=uIfYY1MTW&T&G
z+gUnrO6per&aux<r^M{DE~)#1)V#=cm)2Sya{)qK8+4$^4M8szmoEABY^aW$`_=mP
z`LX}}d`~BQiSY_vPU==(<mx_Ts~oAj9E3>Sw{VaEie#sLok(3f&`E%22nE>{AahdJ
zn%@NT8$`*Ix?dg~@$^rVy630n4_=Ehsk=8>MP>xANaRS}Pq$5n=SW@0)rC^`iJKwM
z7`URY%Cp9X6WWlvUApB+-3LVLY;c>AykXIvG<NtD1{Ll*6qOb)luwG3k5V|3y2lah
zr0y?V#5|hMP((($eT6w2Y(NR~X?_w>+LXGBY5Z2C?#ZBIiBcU%`7U_hdd-P|mwjNM
z%H=x4X@c0YDTfYpl-$Wq>ehQIO*_##&_5`g{{9!K`--L|sc!T3eXiTIoEUeT>dMv?
z{n;*Qq13%B#z~hMLm~5|?!korPg3_WZk<b5Q6y+GseAX<X%@7pdXCiHCl&r5r0%X8
z6-r(8I45<F2T`{7c4Lf3`rzbC-9s@LMkV}@Qg`Mk<Cy}f`zWN_ojhTh#{j?n&^YB`
zz(YSa@F76`H3UxzY6ui2rnyh9XPU}Ooa8x32E)dn*G*BH9Tn+E@Xoq)-5WGVNwLov
z_dE8fPwpdIm()GXB`;*5;W1uV=*$}>b+1st>5|9tC8^sHGdG`O{O6<*vDDoiFDG@&
zFLrfb$O(+d7=y068>o=Fd*L7|6v-y3PU>E<m6HHl5eoj*T>s)EfHl8K-4lqCCv|_t
zeC2=9b-$lkz|tmlmu;CaQfpGTIw$-`N!>owXyFjJqHcg^jo%#BhSa^WV~*7AAzEjH
zz)0S(=xiE09K{x|Z1A0^w0NO>Ql#9C!kN^4fnX<fm%E60G~YlGk-Co)N(Ps3olZW@
zzu00OQg?qEzZI#w40I!02U5O+L+dp!0e<a3mCJRYR|Pc$3R4GakUQB)-8r60>tp?-
z15NO0enih{Q`bFuzuaz9{GjVLwa5NPsoT#bE$lL#Vw`lDg-|e0>b|8p;s0V@8J;a*
zQIopc^)F!29I3l}^CbK~NZlo+g;H0R6(@C9fhgPisr`&c=Hlc_-FH$Y`Hxa}<Kf0L
z1yc8CwC_mAG`#>%|J0af6Tm+;8@Q2YfQF#2poTzUVw&!9J=2t5>Lkw_M;X&xaUDVY
zH3WCiGXJa8?NgP@KC>Tk?6cp|G5f4b>b@&2zcpRA!38*7_w{Qfbyut4bjd&QC8>L@
z7Q(on#(%coC6>DP;pNxqe&y;un(etMse3P|kh%}!ASyCMs<XB=ky_f%Nq}n!1^<yC
za}pql@)@Vo@}zD@3jDuF-7C2_E*hrOy6%x=mH3+?k)!MWP@WF|QBrrtEXY#|SJV}I
z*4S!H8&bC~b&lwUh2c`sn)kYm<PD2%qp?FB2g?R0ib{(Y$|pt2=P8^?-5m*bQg=5O
zF^}fAD<V?2w=na*`89<!zlbPp>bifcupZ<r3{zHV^}DKerIwV2{ed#>)V))tc3S`2
z@t*p$IUMHXVG25c-WSbCL`_+uRI*RlE>^a-`MW+Bnh{=j7EQd272j`n70+U(=DNa#
z@~ImUg<1K+a3>c5JALpFOhjC+a(O`Pq`k>DnZ@E=Om-gSAK8_my?M3^or^F1N&a25
zRgZfV**e$l1R?5qlJTS_g-WbmFnV8-%37|E-+*VnnAmLX%Bk4*1Ivom4!`9RinO0<
z^pX5j9A_MwI2pg?_%#F{(jGW}mjljX_F1vJYOU;7Yi9&Y@qP~a)yti)WQlpl%EWbz
zwE70Vd<}~xssyz=L!PN_+mMmE7-HB~inty-?HKiCs~8DY%rPW{AiY>XdWynQ>0X=w
z>Od5?;5nLR5EXt$(J|9#y{lx}OdoS<$fWO5?J-m$zETPI_6g5)3GIm^_VHQX&(>At
zwr*$2*1T&RdO&XIs$qn>eH=1M=7qjQXu<<BHgZmu-dIT?8PC4~{BpHP_OAr~)4+cK
ze)gp{E_?@sqc92iRk%8^_X#cs_TIzs3m_|L3Q^)?c1qN(d>GDE4&k@FB2G4AiP&`t
zF&cwi0PDZ9Y<2?FUqdibh#D*mX9xGSopZKw&SuW}nH<n;fcv&XQv%rJz^;JbJFpX=
zL;e6=n>_Au&Tr*}gFb85);JVyK$xHONiw|nb9#~AMN|(A_cehdcN0pqRpR$_1@V@8
zMAK#b=IyaLPP3iVltGjd*=8P|8oaJ0am<*Tks^OH`92_yrlolqWLyS?8qz0~ma_sD
zW$1Zf2XsoRx7{9Az5F9y^Idc|8g?R1UOuzqaMu$)^c7ixHXRu(k#~cxrn&Nx9-Wu;
z6Q8s;H|bY13zPQCOZur#dSGtSg-VJ!KDFoU&5`LX5YySum$t=62S^gJ5d3Zbq}l%j
zOtb$Jw5>P0HsFMtOwoACcCkSQw6d-)er%d%ts9&KGO<<aF!LdJ#fQdrEDZ0L4)0wU
z-Z>rKtuXvM?g4Q4O(tn%_-Q+j7f1{BJCA=43~gQmcP?%6E>I|<+9nvp?gJ#1qIKo-
z4;CYKdt2ASJ3s%b%4%BI#<%FO*WmLJbw#u6dMB>%X1%azivi%R4#K^Mnw*=ceYtjF
zzP%S6k8A!0N!oWU@g>NUGf^D7e^jg{KaG?`>Z(XcnTN7YhydQ7fPe5{Sh~`5Jd@rf
zVc+-c%~d-i-CRPFD~LDYYrA<Mxho*T9(K)1{61d{$1X8<4NOpx8iK=o$&&Pb^VwtI
z9_0%8IN<*OGKu;K;B5~4J>ZgWB*W(c;V4Wpd@io;8n_$RpTL<Y(M+>!jrEjrZ={$G
z_l5~rnt<IBuyX=-1RS|$U3U#ksd9Xyy9R22;hR1r%H<pSjWX9sDYruCRIoON?_fKR
zQ=2?Db2$I}>jIo!zkL_PWSV(Ix?xSu<pSH0D6c<midWnpgTnBC*8Ugae<N}p{%6za
zpD7G~ARYeu!th(;@P=UE!?ao4t;NRi<pN#yNqTF`-bVGgq|BxI|JmgN=^g~BZ{P$A
z3R&;)@ORRE<x9R|c2BNeRbtQJ2UEm791|V_c*wWL;0FQz^*aL(06b`|82m6G9EItK
z**>^Oal~v7+~|mzXYi^6(N4xZj&>r{;e?${JDE2F?c{RPPHqEyz~P?_sK18bP9XZC
z!f<YM&Na@db<R}h{K`3#aN1HYBF&;9I7G1+fluGdwU0RXSYW6&gP`2@i4=?u4E-9V
za57Cgpqw|jW|)(v6%18YU3=hx@wi+vZ3gM0-j$cWUelV^rpNcC1A=dMu`=gt4VSw}
zPHT9DIMijMUHyTxZUB6*hcmq01%6xkPPxPM4j@QvFz%bTHN1iWAQA@y@+5sH)@->t
zqg^v<$2V6*4Iqi0ukr`q?wL^hGhmfcw{En0tZXMp?dAZ}w*sV*w%>&l3F9EF8=PJa
z&+BiO^xAf}o<!)b2$v-h>;THz3OuJJp2TaCS8a~hYx0_vcu}-%sSI66i03ObAMxFV
zh-Vcd{*}DuCy2pzS{^pMjwnnxT3#!25)Lg)*e5SxEQ)@bhH-?`O6_dZ{=kr-T9;kq
zv`}kjn<9R1*cLvHG>q;xW9|0Ko%1z};wPd;^k<v?!nV#fG>i`ifH8j$c=NPDnLX8;
zm>U7k`rbrS6W|XH{1~wM2T7?ffN&J1Vfa1VTPHLGZ{rr3wqI8+8AM;b3u9%(<+ho?
z$;8w)98`Gz!duuZ?x6dD5GCcK9Aj&M?Ewtgeg*zqvPA=IN%(6P4MXiNZ!NcM@N#8>
ztpONpgWJTmGohOi3a4)6))L;kAS&Hm0dh9m^Sd44q_>}pNbcUquzC4UW0LKC`E&qo
zOIN;YrsmhSrlTDXXiaC_V5?M%+MV9ANW{l15VK{Y4;?+$Nl4zafTw8*y`J;*=j}9n
zxoruJVNFqc8ji_(D^aiYQN3YhFR=DdF3kf$*TY*As%qItjJl)NxBV#|K9h(D$R1Ko
zbxN*>U9D2{yhoNCChx8i#HJoi^Npq4Gb>*}a$(MJ4`Vbp>+ag<h#Iah2~N2jxoHg%
zOUqR9uYB^wdnd_{vT)A2@p_D?BGR~*GVBH6>aGs`2B2^5?BH_XoOtau`*C4?2y@Uw
z)z&7qKWYWFmo|X>uGWzlZE@!roYDhC>H})K_HUeKH-LzoI-f930Dep4@&{ON0R3)S
z|Gx^veMv4sPs`;G(AeLBPne(iYEq{^B0S_EfpZg33jq4Vca8xD%H*d%d}ljIpw6c1
z4{(-)1Zt^3e}Ed3^#`aKqW)B;F%eJ|0hI!XHCZlyid7*1_Y&_;@@}>9?+r!~y;?Jl
zcB*zP{B1KV>}ZvB4jl4OJIBc5*pVqJ=B0T)Nh1y%hgob5D_|6+UK#S&^cSs&xo?@f
z#yJlB*0a#1?C<v+STgO_Br3)+EZK?=6U}gKHTh|4vdJaW&rKr2aqIavTgFw*bd6|P
z_}lJZ+>=!jpZ(POF6pRhWV>a=N4+zN%6a&l?8PD;%hdXANzm{KH8rvS`YHb@HAlz(
zC5gW-)S1>_Y(l7<#o>DSM&S+Pggpro`!#ouy*Bb*DGDRVd@yaK=sMaR)6V56&Lxr@
z4tq_jN5cEaKB+rIVNc%}85J{4#_4-7C7-EtIsqZE<#(`oUuB40a1p_to(Ef?%hk2|
z55CoB5E99qo|Hg6uY>DJ)K8s6O&OP=uERVhug0u1oqAMmx?-QMY@O+56{PFt)2$q}
zu5!9%y>vM@@ag8RGo3niZaFvh>CRbax@n}F>R7p`x!6PPd;_-K_Uq=hGSVvsbeBwv
zur{9>L2dI1Arft>${e}wd5H;?*5Tw+`|RTPi#-0RD@!^p^O@kKgza2i_)^Y`!wz^z
znBt+Xxr_TMxx6<AYgjT7TV$$70-5Nn-VsPmm#N;?hqhF2=0jVmH};_|)!nA}w4A)I
z=}yO4N}6%}&uY4;J?c)kJ{bC)^bFepBYHM>OvrFFD*T-66E6muOTxGC`eucXgwG^|
z=p?8y8KmyOz}Ucv&5GvU)J7%G3EnXZCgCMj?R1S8(z62TIh>wZg)cX6R~4y8jY;>y
z7Vbbms8@nd?r0`MjG$xtkC~74vZZR5XF1$Uhp*b)E}78f@rZa(jqYESMl&BYN>-(u
z##D8(qYjLzb_$%L)bq+2y4^Abmq)%ct2*hsEG;q5Hbkzprh1g7vpJYhT0!idk>2j&
zxx2f~M(jCeYZp)KovH2}#p@yUC!JY)qIoJ>97pL(&~tp7D!m(pc)x_)#!1EL^zU{_
zA^OUjS+(pgHCsBJsix0-F@wK)A_?}Vn$M^G#4ydL#T~-2?QU+2wD-PBrf>RfOH1>1
z4!t|qFStAb%M!5EgEnBMih9g<EJ3I&tOKsVF<WeT^aLyI-3w2(dzp88c(>HMUFACU
ze+{?LRn6oWY}HJb5cSMs4?Xx;rn|O!Rn@NCxAxn8Ygbpft1#~RR|{w3+&L$&o6RTv
z!mdTpa$NnctbOe<yaR{n1nsm_V!Gi{{^0f@x<_P9`wM!a^Iy#eI=@GBwhA(JNqNpK
z@Ow`hlo?G~nI!E4_+;lj1&#(R?P}mCzzKj2!G1v4SQMs7(s0~zOgTH_`bp9pKS}x(
zI~eAR0#0vbH$8MQ+fl(G*a3tLt+(TI4Z-aff|{w)*E=LOfF@w7@-jhrQzdUVRQsr3
zl`qVID;^K~?q(g-?R3$h?DTQ43pBg1r5;@!)mM#DUUkCDRqgETz}%-a#{Jc55N^E*
zCogkTSH!8s*0amLZ)wkIHeK8!2c}3)8nkSgb1+edvhC1Yb-+uNeOYa`+|{@3#=<q@
z+C%6YFM!aFe)KX?D1G{74F%GcBD`BQpv>PsnHfF=4Dp08k9gjYEAw6}cb-;z9GbnI
z;&2>XfFm+XGA}_&1uJWe*}AbGcq@A!{Cp|{0~DL#o~c4x*O<XH;T>DRF~fJNWZ~Ja
zG4qV{^hU<AKjIp*#$YY^@8vl8d%)Um#=hSHwqM`CZvejs#1<t2vw(_+IQgHr;^fb8
zqv`%sH{E|6lbxIV-1v(eo{o&6V(9SxQ<B{pp0J0&#)F0?Ezu7cB4x><^_JL7LRN>?
zTy|TMorBuvXY5R7;D3qkEwi<Zlg|Q!f7?R*zMCw7G~xSPMv!bD!6(ynCqLd|L7;WS
z@J0MIceGK+&KLfS!BE`on0GHZL5-iM9!EOk)@Ei1L5HPc1Hyzo+)H7@fSQN9+6;>$
zZ%gFY8q<->;>aZ~a>pn#Y~*%I#D?>i2fMn9LmPlWHn=*UwkZxRi-fn0Wh$GtgY3QU
z=&@n;?`ANt<sJI-=&x8}uGQgTJwg35`hHiXiK8Dyba_Mv<ff+gE=UlSx|@7l9*yBm
z9IZ3&x{3u(cfNRMeCT+b*sdC#r0`?#zuZwgGgx+<FCD*mFPDBdpMJM>rk|ISo^d0(
zA0#HCx8ip>e^6#`5u!2Z3ixEH^^#72ox2;j9^h?&4M7PI9Y$g5Fzs;FVb-1(Tk$9Q
z4s$uXUBXFQ<h?VHHj)J!4@$a47hsz12@tj3Eu!5bjp1L1rjg1j1!tNuC3t?j1mgl=
zFdp9~Ml>;zo|c|DtbHcjX4hmd*w3nX|D4O(!;W~W!Iv(K3}UZ@-|mt`>^PrY|0%kb
zx-m88&SAbl;?4oCK+Dg~uVM~&swTV-L8N_LlPmx{WCLr5d4K~qH1Ki2y8#=5r-5)3
zrY8A=+{q2W{kVQ%WsYx>FIdp68}~E|D?%N%@AG5s%Q<ggB3n)dhNK69I<JwuY`F@&
zQi>1~ndXz|G3l#II+sUdt=o;Dl8E{{?U>By*wW;LUtZdm`dV7IF`|;ff7&7c!kXU@
zC0>=Nnd*j3FD{&<jMOzG=Iz@ij4}(DT3vKbL9M(99}=#9Hc_s+gnw9K>telZ#o*87
z*h^2KDwbi3U6o}W?5CMaJNSb2gJHhe#tOFb?EHe2OrHvYoxrd=IwDfm^ngr~Jfds;
z&<=WVx2xMI){k=fAir`yIWDxftJiQqNeXkffA!6eyEH%UzKY9T=X9Z*CH@n-+d$0{
zKmF46_Qqg8NL!^6bB8zJz@Em!Re-l|YM}0o`5LexI1mU&VdCaW+?^0GyWwtP{k1ML
z-HphbZI3#f+`5vPhW7A$S6NEy&LVNt{_gS>oe*eU?<^+7-2q-t3H7Htz%{)v4Egt`
zxJhXgP4lQ$qA_@m)Cf94SLp4o9#NqbxEcYa*!J2w=~bn`@Zb1?W{#E<e~s*}n(3xE
z3o)~0>gLqBt}}fDwYLjVllNTTHpo?wlXeYfnhs+&O;;LXq;sm})Lzz=Z26D3hq_s>
ziLL`LC%zC)Ch@{bequHHv@Yoz!P5x0j}S79xs=J>Bh{rU;8kXNj6&1%%w6Hp*w(0<
z60M-B%1b{h+)_1#t-X1*d6H<Rz(+TK`<q9M9d;@~cQR-#jDa3A48jc53>|lXcl%Sz
zOj8f?&W`TiA6tK*6i!6_&eQpHjwnXPv7u^M+4_f|2aQx35D$=x;vXf~m|+<|PKy-c
zo$K*#n8Mr5qZ%llX-CH$k*U4}XZK8Xjm*bt4ceylyXQ$e0Ll!kUB30=+ND(|ERzR?
znK?tHP`|JATE+VmD8JjR-L69v#}|7oY{3Mkzv|f^sXDCW_ImWi>2F}vz<)?GvDtD{
zW1u1a{PZ;#hOF!*({6&KR{oOdS-_Gy$R#5#lbogrBKKJ4THyB=Iy7rKV^c9T|NgL>
z8tli^TyKc?YQ8WJ-)#}T)SWc0RU_)(NVTI@9mZ9Zx`r=ZqVW+1yHTgI_DxU1uB5X@
zntBF99X06n&9cQ|U(siho7d51n|q?OkDL~$dw>=<jxcc%zTFw|xno{_O-vvo3bdZ=
zUXtY{+GyAhEtI2N9J70-W^-DnJZYU7prrZA-EIHVYiT~Dwlz@oP)kw0O*G_|)Q#;w
zGSwhQy5eZe<(Y<4(^F9i&Gc0COj?VnsHAM`SGo`EpNzNVz{tB(Ps<<HqBYMAT-W)>
zTsO>$!2iRD`sn5^YpG!O0+aRUR3=w}$=e5)BV^0z3-O?OI>+W1Azv-aA0Z#1fvs($
zeQ;ZG-l~mN>Jc;}HOd_%PohwMkUSZ1r(QNPo&b2Q11AE01lSOq3WTFD4U!XZKWD@5
z;kbT~tn`EA+HKmLtTGDS)Guk3Ujsv$4Z)F1ny6J+It)(wg-z{QxBM}?zIINb-`1gj
z;*_?~cMC7L@BgH|7jKrd_mjXBdqhF5HQT}b+();yHLM#{r`5Ybb%>ZbQlc&%zzKxb
zcQZ~ZZlx99g+jg+R|2l>ZLRnY;1PWcd=v0Nz=q%hARL9M75|3YVKVpA;`&yc>|1fC
zt=H9x%gU2hTmnpmXM&^cR=ne+|E3ksO`$)@p&!&H`flL|_x_)>;=lVQt@s5nm70HY
zex+J##U9VPRy?g!suiEq>Alul@v-$<X~pqm<y-Mcz-Rkf(;WfWyWGIBfad}>1V;nm
zC`_$*5N;n@aX(z&iuJw~&%s(~5`wN@uwx|X>?^EYAwTr73U>rY+pYM<3I9ziJ_t&g
zh=l$Qhkh<>&^r2V;h1~=Pg-$DpQ~i=)-KoW3vz9(74Lb@wc<S;Q?2*~hv(X8#Z^VE
zwBq^5vVEmAH3rpyGd8oPI~VYdeg>WexWVRX#S4LO6sFyY60o`e|3utq68&p8?RY>2
zN>jyJYsJyM9hqf`s{n>=Hv>l=nf+|p-LQiKWJjZ<^?V|AId$@&;(14g4dLHdP1YSR
z3o|I{?pRLw6-<0yY*|Y}p<)QOS@rEPDw^G0@<!XIWBf9SfwpRB0+G?n_T0!ncaf7L
z3*>M43`+uX$Wk!n-nv)9fxUqt&3XlLIT~yRy7I{SC*{tz_EoPZO`zGehp6>7Mfe|;
zgByP43MB@e0ZgIJEf8*bTi9ettBYEuLy%(71N(K5a_|(lw)+9ZPqiy)#~kIL^XN8}
zgU#BfSUH!9O;@YNxmJ~@nd87Rx>mNxmWyg8=Eb-*iE*}zF)A;{q$I{(E=Iq+7>BzU
zn58q#9cQ^th^Co3yRjuPV)IMM^utkvz0ww43+9#`PlUhhJU|r-yzUw$)(W-StUt}Y
zAHg+ZE!2Y>@m;~;=Um6BM04;BcYWSgh?S1@OiNzfHR}*HvA)Q)gwMF>vxQ`)+Y-P!
zYR83k`RwG^Tz9VAj3!G$OYMH*x^sMJKZSzT;kd!?sn~BzzXsaC;!voQmPwqd4k>I~
zn*rF*8eX$_J#SrK%#jpFGsPJ(d+?q>&q>5s^hnApiEVbB<1oDt?ciKQTME&NRH|&x
z!MQQER*ceyh!e@mZD`WXZlZZrZ4dUh-Czs-+Q)^KcY~X_^HHjgr54N9z;5Wj%zu<C
zWQG4g?%mLTrT@T4a6|vle^lsWwg0Hp#~S}pr4Jc$l<63KXnLWKar$tko3Z^T>O-q|
z3OPj|<^JOw34^KV?7saKCeBLFP+s@}0hzw4ZZ!t=s@hg~G9<tmgvNkFe`3msm>%Zq
zV_~IyYTvD@UH)a&gH`aZPM7LW(PrVgXxzb-8_f(d@+65$r$51}h5i610uDa@?6Uz+
z1gsu>(#e3Q0G>K{ue|}!0Ni)*sGlp{IR?9ICjq-`?KY06bV_{;L5g&Pl}((dT&kQc
zXvf!zksB>;nR(+Vu&&->G=^7XkW$CDk@nla6|-@vW>bhhmmIdp(73y2DtVD8|1$Ef
zi>lzdF#L9HOLLD!vjo2lJYNQwrUzu)@|;+=j4(CkncvY`bak~r75&><q6Y5t94l6j
z7&)w86X80><FaI+dF^}9P~#b*0N=Y}ERAr~4fdYb{@dlHHc?*IHZ>!ocuH4Cai(Iq
zXbgwEsWl<jfMPSlOsOofqv_(cRI^hRTNC8TRNOIRL|jk#i^;XQ)5*kA1GOu8$^lg!
zTrxI$3?F2pcFkKSQz%91bs<ZGQC6G-qEIDI-C#jgTQ95P9{CG;EXp)O-AiMN901!U
zTmU<a1Cjokw+59yFcPKntVzm5*%U#$nF=Ce>(IJX&BCZ~?Z~@AdAE=AUWSSg)jBpK
zJ_mKgaki>;ru8iPo8#S5%9ZpiaVkLzcf_}DGN{!OH~1D+h`tZmJ$bT)mA#}lH3Tb;
zM5SxmlR`8EF9NrV$|5m1X9h~s#%g)8sS+7LcArNceLqE6)!3B^hYD)!m_`5mjSI|W
z(XGQnXqK$rwwO<mtzKc@e-YJ}&3OI~DTHzFa@=$G%f*&gz0qQtnQ@i(5MRbUeYO>b
z;wsleU@;3Pp8R7S@OShw@n1R+{p8&VC_U`V1$^5;woL=C@Gzpj+p8XCuSB<H9xexd
z(Zk63Zc9CknD4g4!$|pV^&YMSe%iyx_-^w(jEL{{golyv-5&AqMBs-!jC}7l*TaZ+
z+Y|A<dN<8cuBy`~<YsCPi@Tv126nG&cD&+ff4=DDL)6B5sx6`}nZ3&BCHh($yWMi<
z7rW**5|iW+OXBk-sRoGj&~gqO&(NX)C1w25`#gO>gd@JD#4PM(YI-axUMl(bRV1^f
zTSKCki!BEb=E~jtrOGLFJ(7vzzs3h;*uQgBv-P4e!gL*&gu683wk?^8@J`$bxAf@E
zy8-V|cRcIxWgi{B?2}=4_ax!jFD}uSDlJ(L;husg#=|PW6~K>pxKj5Qc(@99u7}3}
z-{WESc?EMkJQ4VI51#@&+r#Go-{9d%z_SdV)_=0{uMKMbrxV`6<^EG6ETI?s&)M#?
z+JDY*pJ&>q5w$T~e@#nEy29NTtx$!>Ltz_&lJ$FcgYO(fMvj&`8xJ&s+7GO07UqoX
zbZeDp@c9>=4|s#XlTSSlPz5{l!s7&LW93PV<&pt&fKTOLl5Z}qLzy#bSJl2Rj&&6^
z&cFJl)G*z7(Ha&1)_;l}@?)MzOa|qRX|l3)jL3drGqC!rJE)3jp1xhoHf4!OG2uBY
zqyJ@9kG4v-`!BV9{!+={FfvUMZgl@shStOW2T)Dx2bBWw7<1Pv%SWnzjQ!>oIfr-I
z19SSgr}-IwDnCbN`I+!2KS#aF&(YWMbIjfR9J@WStAs^7Il!)JP_C7Hjln%Y-j&%5
z^N<5-F0&5>Bb5A>%Q61>k(VS2ZtAHkQmVIBJnil5RW(z4Hq=|a%3kea<m)pwk5&p+
zt4FilY*LcqA3gkSB+V5}kE)y@p5jzpVw)%{b$9fDlI!cMFxgiYX~ke)Mg%RS&R<{k
zvfFu3Z_{m2YCU|(B)efbqyB8W9r9n1SVLl?cZD!PsNsf<1*3_M$#P~>u;NO>YueWh
zl78?Z@VFBNeGK&NejLFF0j|Yu!u<^QQ`}c@n{mIwUFH2h!+n(R&vA8h;|rVzB=&~L
zL%@ItD35?L1G2*yg8Xy=QLGHLzQs5|&rP;M*6I>}Yep6lH&*>=r!i);_3gC2D1_%k
z+N7g^%5>;zIy%gAnAU9evcwaa2Qpu347X4xnl0o*T>7c?%#wJ@E%qN!HFH{joi3F3
zzy1+LFPFDoqmlQ!v9~><#-8Enw^?0WiP-At29GprZL*;;A9%*HG^YyrQEq#(rU&Qq
z+$a%ch}ft6LI&jst}(V6U{{i#*L~4|KOq?=e~w@iftv>|8Y7Rh@o3&?(Hy}i2=2US
zh2SHAtL8Ig>Tj}|LOhgay&F}tDNDq33~jJoNOLNZXxU=ti$d9}AmC~=N<9f`H?QzQ
zR%ZC%nhkP%#`bTSq1UX|Xvr)UG14XL;~ds12jz4Wt}2^kGK8<SWU_c=dv*WSvU?1!
z>6!1#qon@jto#riwlLLop39C?OCJ*FL#nXWvNG|pwx*+fG_w<k?6WSF?sf|4wKcC9
zeG>%Y^3^JIYnVE_8i+=%B6~%?t9943C@U(L*(E~~s=2pLtA{WU5#59>ikDy7AHu_6
zy!BUKWvk!xILcFT53wa)M~H?8ATF(Aq{Q3kQrSM#Tbw8N>10uhE5BIVLb5UFGe&$?
zKgFX{pY4H)QdRqUIJYAKN=G-6-=dY+M#DGdOVP@*m0f2{>;Jk>&1WfdCwyK@e0rQ5
zoYC=Qbh%d(zha`SNIr}Bd?WtUd80S=rJ|5Y1-*ryw<lg2+DAy2VZFTjqFFD%*q1iP
zLwm_ngo?FAyEJPr6!TA6B9fb6odpdbeb<7G$ukI$J%E}K7lAgd{}9p3!`glu!Idev
zDg}>;VXq8=%!DFte<h|jIjhh_Vw%~j?lCGN;d0k%$~hC&mJn&b%9|o6+i_h7UoVk8
z9JuSx1dRaNZBK--N^(2yDBSmP_rR6#-V-;#9gX_~?q0a};O>q45$-;?FDW}^qwID6
zle)J_wlXB!NC~~{wEhPW!Hy)<6FMOBfg|j&VQEyergy0xR@MD~uGNZ?=`ZjJ*RqRp
znf2jzaynF*V?7%6w!TN5I7-<sp_N#*7`E;t#=mu9UZtt)W}-D;f{tCZRJ?I~)7lni
zIJY_A4rCC|M?1TD;lrOna$iNQnUuyKYL8DN&3!WS5d=cKM`D0Kcd$MqdYmFZ`3WSC
z=(|un5YLP|h1TtiFQNu_6<h6D;byVy|9`CTFc!8PR+#i(vcitUhZQRK|4FQ{VAX%m
z3XgYL7b_g`Ne(LvAcK5XxCcqnW?SA&i#a1!4SF&)J9$6dnozU<y16xn!9O4ahWj!}
z0NuevPeMkx3GZgyFxMJ`>0}Yh*Mr-YOn(LrYMq@Henf4~zy=j@OfE0&Pi3Q!{~yH4
z3G^M~B_y*XWfl6LBuW*-$`G&B-P_3xPeY)=0HX~<Ix~-UHGLqI+l$S4jUiQ27bA1b
z7C)U9X&#+D%C6`cpaZMV777|hqpF!brb9WO9l|GzH6-5OGZHMmAWqI%yA%j4@Suet
zl2rkO?^qnhz_>jmi}p|#NyMji!@r0SdgsGPMH>-rMsCt#y47@ERIb2!0#g#|S_D=;
zTXw@Qp1Wy)N{?(SVQWUVS$KP;P3pu-F;=LutP!+Qvb&Co<LQo*<tjN+byl`R)nS={
zBu>?74UaIcR-DyY<RnoYwlyi0X-$!^tv1EUGR#%<ngc@h#Az#v)<<}*weh*qqz^Wf
z)C`kh5MKsoW(`B;t3el5ssSSVx3{^JRL!S<>Thz>pVS~TF^P!*L5|tQrr6`qc4GgT
zjDMuqw|3crLuiqOXYf<kVolj-*@Tz8FS$VSY-L$3vpJ1=+%Wh7zNywGV=XpW#%3q9
z3};p`?O{YspUZoZ-Wua`&m8fL6}zW-C^^O7_ok!yY^4nP0>@*?(Xc?wGXt$&)W>+b
z?mQ|(VO>4O!fT$@8^f(se2;43Jyf@D6h)8Y4uDaq+(7!^z?K@@+<>Cm7|v3%n8MAx
zZfeU#dg7VbbY|jQBAz61xhh$%=}Kv}qk=FT2nNLkJmI|@WH!CAT((K#j3kZ~UwWN5
zAkF>nt433nh+W|RDXUhPq{-)-rTD@(R0W${nm>w+PON*$rA!fj@Wz?(hxyNRJ8sv(
zA4jdE6h2ziDvsjse+(7f@oH?CPeb4q6(E}ZH%&DLg@Py`3U!L^?N7_D<E-X7zN!$Y
zwWG3$N#EqI98{s<F&``9GGc$C*yR0)(2}{_qUsd7kKfHfw?^@xK_&NM!ryM4rwY7t
z6#&9{9^o8)gHUd!CWY`uLm2mg`xK8hv-C)O#gD5gHrXp(LPD&hoa$79>TP^f;_WWH
zd<uaI(k+*3_E07k=2~zJ9myf7b$zRLj4c)@ivAMBAO1bXT4ItkYh9^M&pA-MO(d1K
zDw4`#kyL6ezOa%U)+Lgxl@Up$;#5~)6G_i2UE~ihm9ASPHN8XWe6)z=!m;$4TtOf#
z>hYzyf?$79Ufv>SACcFiioW4KyF$;K4m&5JO~h8E)1*2|4KihkC^X@@QDYCY!w{O<
zR%r~WbX<iz!2XYM4EaevlMTeaFesoBb#|(i?wI%9HolDW0{ckiKy<zv!`>=zJCAOh
zt<Kk7=Hy&>oWv6&%s3li#+1yfEE(+&QtM-VK9&lRKDzNyAANK!nTOrM1#~HyXTzo<
zbuO7_1D@bcCG%E9af(U2(tYqu_vn(Re8^LkMI}$UEZh(|ZZtFdA)~n^Wx#03#M(1>
z+YSpplqs(5)qk(r_x7q?Q8yzkryqhZg}PF;9juS3Y#%*()KL;~vl;2lCJ2I}oZ(Tb
zft$OQ!%Y9v+?5I4K;gi3Qxt$QLkian$vtvA;w=g&Z#OU!F-jd>x5}{4#{7@Fj??o$
z*b>g0wkKS`u(GaXwTp=`piR7G-pFC5-~C$J3tbzrYwgaBvUTT&S)+DT>AK?}hI_P~
zO$VD*%YtHMx|I{(ZAbo5Wva@~(h5XX?X~7)C*N*gQ{>PC2DIa6psa5L8GwuYboDG|
z6L<}P6S>{M85(lu3VlsB6qq0)eV0MB2*bcE<%Jq7HC}&!Qj9(L|H@vm{A*_{E^m66
zoQ(+~Y7t7Q@gswn$|tWvPRUp3|6i54cT{HSBjuUujlynk=gkQoT9F!;@)iCs)ZL~m
zkr+syx_W}U#r6{s8iOYRx7~kFfsX-Ret>}w1CBpX+aKox;V4X-SRcS`Ke-{e7k3wl
zo#MKc-njB0YvOhFh^9qC9oBusUZlq0+e$8HybAM6WAHJc{<up`5O=9L=L6@w<DA!>
zv)nl^IOlmBT^s!z?)ZbOi1mQyj4|*Tz{|!OxDZf(#C<9Op8(vNxM6U8+xJE{U6<S&
z-4JMrnb9Sf`Q>);0qQBh%;g^dTkG34zb9wpnY-Olr<>s>6bz{3rV{<6>!vnwidque
z2d-_OY~s9J#m}~S)=?TF>65LN$UZ~xr*uHDNoZxxzuoa37fA)E4Zi+lJG&OKeNE4X
zVB$!~+YlV-oFn8Q4^mtBCXf`t(90hd*~08tMVx=GNA5O;WvQL7b_g5siT*57P(WIG
z1Smz#k^fAnxdSlNJc^*!sd)vp3#YO*nz?4DaJB*L0#%*;!mKW?FiooINPKypVuZ_P
z4zA2|smqyX;uT*8JGU_W#&r0k!tj&Q;Z=p<JI3MEX$&8fZ6j-X5ol#GyZ|+t9#ey5
zgOWl7Yj;l-u!WDj3apC5$>1qI$lwGhY$I*6_HCA>IIZ5MgSPi`f2W;oniu1@E{3iX
zpsiE)QCvs>ZC&Q>s=H6cMy2?vcTN9%wQF&mS{(&U;ZLLRxh<YPwaRQeV`4;fTl9ug
z7fko;{7w7Rsns(+f<#U&^;>C|(wmGMqH{KjIHqK$Rx1nQmi{F#?)8e>Zk9-xb87YX
zuTcVNR3<;6cUQ`n2}f*cw<OqJCEY{ZwaLv~f+s(8eXj@iFJ8eF6OG}<PiSLUaJvGs
z!Hqt=<NSW$X|Blz4=NgykKmUC#p-#_m)Vf9{iGz9O^Gp1F-&lSci$cC99&mw*jUux
zO7$`Et7?n-XL}wFQW9)snaYA?io}`!Lb;)^RLC7Oi0iYI3n=|+TXh$N=kdD@%G4c<
z#Qdy(Zos|-j5~DC95h-}vW~8$5F6M9!1BiH4}Re&f*=eYo=(%F0<$1R4ZeTODD!JY
z;Qd!0ud`96NsGt$p7a5M#66KWrZf@odtBU$;1qN**U_5n&jz~^wQi`A5r6$_+!c?E
zo4qpC?yBfp2@5~}T~eX5!jAVlw8=Xf)-2~|gB}#MR?YIk`>AHRbQ!~M&ox|>NywiF
zksXE^ijjByuiIyuX{Vmc-XFvbvoVXkJpV~@Ze}NW@Y~N*$a>DCjKL0v*@GYP6)Wqe
z=FuR~97xnWj$$O#eE3nL=5R&G20QwAo|;;arcF#(gl}<OW7OE|yGu9@;NC{4iwNoY
z<$K$yb-8?~sC`V%g`S+@!}lg>4-1#xmrFjMn=R!8FHiLpyc3KuV-NqUC^(NWN_izA
zX$rphWqWs7uWvDpg^Sdr;qpgRySV*X1-FJ`PJ`b<MX77yM@|3cOByA6ZX4I5Yx^XY
zHwT|UM&w`e86}H4)D@gXWuMZal#Fv86+FL%P67J3W#X&lBko?Hv1lRxu6mA?r=61A
z2ykjxe|r1O?ynHTEHow4rUQnL;Tbi+=45uy%0ZcV7glD%J5vFj!`t{`*4cbg_)DN@
zn!P^y)6R_0ChD5^4UZwLc@J~aILAadf1ZPLACI#;9fR}#Iylj_Irj!{YG*<&8_Yh0
z7Hn9go*eEuj;78Ae|wh}gUIuTIO)?6Y@@;mjY$=~^{wr9Ig`yYJZuAs$6M*}f;JO2
zAHi)Pr*lJtFMP=~jpgA!Z0V1EULqoSkGH&o({Qpu^%Tk$oD5tyZrHh*MPv90_g_jO
z-Jrmccg$a)Fxy0Ddm6o|H>mX#O?SvTb!Cy+66`7EA_B5O8QAo^6Mx39i?F+7!lB^F
z_FnsU>sO!Q<UifjZ$Ubv-lS=ILJ7w`6*qIqv}yRvSO068%}+LXVsb*;Pk41DobYpg
zwmis@HQhR=Q}tt%J7m9kOkw!`gpcsy<9YFwUeYz4ep}uj+|jp@38C&j@>heRHas~B
zH;WClNLy?kpvTH$gZG5zV2-tvU;QF^g26u6|COuuwRR?DfJ{;AJd?6s5~GbXDIYQg
z@;KT!lk%*Kv5qq-*AXM7(8gy{Qdd*_br|n5P*eKnGQfw9unERr0KanJp8>~?(<JE?
zARL8hlJq=o-^mR@J+43LSFR}#?RNz`D6HegL$GPe?r!Ly9Hm@ppN``707hB*6*zL0
zrRX43kb@_e^l-$hA1An$0)uO4o47U!gWhp}i!x~A;;)N6VjYY++aX@DLw+HpN<~VB
zn+pUjL^{CHGebcRA8+*h9^dsQ82BCFBS(pz9SFx!nCNMDy>aGlHQ&*hJ5SG@Sop51
zU&f?UsKb3<r~fwwClc{RH|gA0I9#rK1KxO~@E-)ke8<ALtxi#xqd2F+Ior!=g~G0-
zY<5PP^%V<Z|KcM@Y}ROdP5_43!kX7`ey;K<#i1LyS>i){<joS-GNacdE$gqEQ1!$+
z13r&uiPh(~F+;3(X$xnF_vHl$;dK0JgM+r$P^_f^yw1Z*&lQ=_WTe@SKqz&-oZKm4
z6){sis3LDlc<hGBVMuo`S2V1cXsW4#Qun`snpD~TT(7n3gwsuU)#(J*qUWf!(Z5Ch
zmn!PSB<doa!wR+Jl9qHi<5)qDcvh+;y-STW512-}V`y8AG|>ix9SG<2L`|>o1#WzZ
z1{3JglK|*4K@NC2;xbF!K3v^X(P}mbH|AP8o3~bT4GB}V{CO*{94sH=68{-jQE7u-
zO(FaczIQA`!6s)q-KsP^<!Y1D{;Z>mS5G{u&eLYo?*XJr6IK*ZvkI@)s5wMY3#fS>
zRR+(73Y?sfI_&glJdD{Z2LF7W2!oRdcG=N8^4vM`1ks=6)tEG+71tltOk~SXyA0`H
zQXFYZO)EbIrVU=v6>m8Y45X)(+RJEyLR@~z3-qu^O?W&^Pb+&;=-g@LvbYBRGNe;<
zLx(OyYI-d{ZrSpPX?@(`irdPx^6;gUz^0Xc31p0<WQF=+h16UYK3EaSluVN{asd3V
ztO%@PWkHJ+wrHRaEmG7+A>I7CgaTNjSQGiPMq%p`@@I`=MdaTpT9;6O7Abs)&Cq-n
zwnnkcQe-p#VPyhcabiS)Q7tdKL12tqj7aW$+KCI@elDJE40Z+#jy35&46w^Y1BU{R
z2W$v-1;SC727-aOdURncTtBd`^aH_mEJ3#+uAN%GR`*0^o#1v?2YyUnMRq?Zt<sBy
zJAh%OrMizThm|5bllodDyPGe{6Wn{gk}J5&UvYx_Y&a~sO{P+mG*R1;*zwD7UOXTb
zTQ&SOVGUqBkXX-^!p{<rlESAWg(E6Bsq55>Z1B8vKCfCV0H&7j>&~{^TKXlt5=XM<
zxic)nrpvOXuA1nsuS+TSm`mI)3%{hPxk9p}nGJsK^Od$R%H?}nLB4r+te6QXBHq)D
zslM9rBTd`7o%2e5#~T2t-Du%E-g8{u(8i4bZ!U@Y9yKcF{pXhlF}dP~;cU;1LA+?~
zs}U}ZJVo;QA>}pIUsvkYnviSR4s_hy1laR<W8sehpLXB}fD29(H?IQ1QJA>-@3<$U
z*1Uo1)tZSjotk*8jB~uZsF)7-!3lU^0`8xHRSCG42a~po)mo`9ysyLcaTMeqa-u##
zPq_2#ghy@!hDSz#s&yVY&=@&BP__?-5vR0Bz_#3=uH_lM4?#16>0}n3d!vn_W;QF1
zcs-|>1*3LXU#J1JMaC8Ceo*BV%Bxn7+YsjS-2v@jM$lD}=LG={!>}7XuOb?~xJ<Nd
zx`UrQ+vw%4GTM99yLId7L>EKW)4a5MCu#e%p0<CRX*;`+$gDn+!6Vl;`xaBN*fv`-
zeJ@kGf?c+zJJ7dN=I$-=ip|~K3&VdH@Lz<#N8~*GFQwD}sW5zAI($K4`0wIyxFj*K
z#J6K^^rmA)iH**{wBX|;$!+y$l0j3pF(>^gA@mi;glxR*o3M$Fi{>@;1T!>Iw#tF=
z6&xEAjl$l%75hEgUsf7E$n|oqsDHs^khcrB;!Z?w<>0z!^O|P~+<qSKwYbph#X_&w
z3%yDUy}p2_@^b9TtwwoXwS``96yo}@&}(vG!i%{KDG&Vy+`yCPHN7y_)rGib73TOf
z_rT=gdaw}v(n7C`xt1a?;qisU>09X4xv;2r7J7{>C|7P*E`2elE8odcCRwKXq7|k_
z?#3Y8f_L)V7|;Z`!zpfj0bJq04*+*Q&BhlXCM6%^*!Y4ww~Fxv*N-ptetc<(H#6l-
z(!Cktme-PTU?wp9d=ofwJ6~iaI6l1nnuL%C#ZrI3pQYZkv&;XgO|eaGpxKl#ug>I-
zBJEs&29ny~kQcUdW4c)qq<)mUG1p6OMyxOX=1Qu;;R9ewx=MG*<!Uv4aL|6ChTvkt
zb*jR;b`OmJ&4<&kdBA{S!!6TJb)}$R4`t8x7I~p3#i8{2g40-mP)kYcVVjCf)7yd+
zNNxZ6({*gn?u%wWnXJR7e`v=T6>hGvF-WFax@9=~XFNyasdF>~S429=E8&<_M1RZh
zZdCkkkRWLWhP~W$v5Xl+nX~YgHE$XoMs`dra(p!lV-sm~-+wH9XTO?A->ZPZek0g(
z$r?#tHB4z(2NP7)7WEIG0U)2QP|Y@CJCg30;U48{igIgs|DUMg@p$If@T^qCHttdO
z+E-_aHHMm@EOh}q_;l+X#ejF6VPF9GF(9@YARLA1BBu=QFto3KbN!s3OJuHg+ShyR
znrKBS@x9~XR}!8(8yMou*A;fH@?00MY2aj<ZsaF#2q~3zo3iyh{f3(|41Zgssu`RY
z{k?|V=!<;xZWg`3$iVD4o=%jd82na;#!n|wYrp3ckkT&>@<ttvaIn^J<LzcU7Hf=s
z;Ga|+uWs#3T6K6c9a%TfYAu{@XX;*v2$~XZbl^cRJ7UV>*$)_Ep1xTDG5xe8W%2xJ
zlac!6312?}Om5$o=jWDp>6jS~qGlQVM=Bf{4t}|Ug_qW^j=OL^@#0lu&#S*BtAib{
z-U0ainZ}^E1Acp!fwutebGCT(E+8C*Ns`}yt9kD=xSm%lJ+JP_3VB3YThn#Ai+I&d
z;))oWQab)K%M$K=6c`fh3f9)Scb&7{!!(UbvF@0+9P3VbqqW)YCdB@+v)z9`XP66T
zyRQ=Pqh`CW|21K&7l5hd*uDj|jAy&*o#9)|7!ykVGzL4?=PR}KP?zu9ee&~dZMGW`
z?<Fx##9*7eX0zSPm*mfO$3bc<YP8egZ`@_k1}m<5vK3Z5ltLZiSaB@ijB||t4hFo_
zfd>M91jzM;KsX8$EAERcRve96WPQJGvS-By*ea0_P)xr@TYAm%v|4L17MScqqx%nj
zDQTz8foZ2zz4Pf6X&O1*f6A&kl)u0n;ci!O7Kt&IpN=Uqz`W~kW#T+Y8<vW@|KiFb
zlj6<5lx1Q;SxTlq3c7GSx8Zr+v1IyP_}HDHCDXOTK+QMCT_rZ;9oHq+%yX@Zk&lz9
zuUe}<^sH-D{GzMii0xa|SinkNccsVigvVi9VOm}>9H)33_<0<&5*&+|iDbe*a$Q4w
zFI!dC(TCN&BD-mgm)Bo>oU(DB1Cecy%cLCR4)-)fx>6Z2G#xUX3D-7y;M$rluIOx)
zFJD**6fgMi|FElkd0qc5ZhT#!ETIzWTw^%rWxG$Z2g67Y_xNNNfwkmYR9+6=vhHA$
zF0=my#rot6qeag%7GsxL5m#5Hn(=tmZS{8+gDUuOq<onqMM~1l0N8V9B|0q$L{BTy
z+I5i)de_x6<i0_)Qbju>iDol1{MXcz!AG3rT69if;9CSPsxS0^PX4Ka8ZuM$seLcq
zPe1{5twY=-yF7;HRIYW1r=n)I@j9y!!0xn859y6{LIh#_qEW<pU&1Mo?a}F`c`C)#
zc?lzaTUd}Vcm7gEI-}anP_1P8nWzdj+{04ybS;CQ#w5d0xa#6|=rn#G#78uVTVpSI
zmy>M`RN0?mDVg>sYhg4O_$?T>i2GFWpdD?GQPVYiP>1xs%0EBTdgcEGZ$*`71|*E_
z8iVz~sJ}cU)ANu-gm|=7B#Y}D5{Q!8C%FSSY=Ck^IV{$nq|623Z`LM+Df3#vDVq$+
z97<`>U{3{n=mHbPCj(wO$-ol;=UgOFd<GDX!X%21kvq8|7?0~F8+GN^xE|JbIm@Dt
ztfVIhb-4XPbb!X-_hqcWDn?^)9bo-04gWQO-vTxSvw@gDDvYnI+}9P(ne04&>6~ik
zd6pcoogrUehXgzsaKx`%9RP0t3~#0LSjU7v^3;{^Qo<rlr6Jf*h#G=!au_MF$;Vdu
zZyQZIA5T#0dds;C=;0AuaTU$){S0tC{^BEz_f0SHlg9#=OT9~VB2iE>>JMC47F&3(
zRYmEtrUCCkide1bY<p9i+$~A5;+<yH&0GeB%d^EvfYi3hVgEZM;e!L8wrb~Z<$Yse
zR8Z#0+Yl$04Id&nr6+CV*)XyzzWy)v7FMG&MC4&H@}7-o%J2mCa7UioGz3@TNgG`5
zoJ*WD$vNja=S&>86)CsJN8Ob=?AMSq-3VX?*851+deg0-_Tkn4Rx#N0d$$1v^BUir
zS~~~Xr#(}q-Pz9X^|aqK{3yqt@yjz~K806oCVi|h{El?^t%c!Nro%5U3_m*#hhhGg
zZM5q>pC~8aEioFN0Pb8GmQ4SRsCNv_8_C(}SL5TAlPg39>6Uiz&%}e6d%_>!C3)-P
zcP}tcKbni`A}&B1>eg;yz5+U*j$z%nWqETsG2UH}A0zW#9K)@)ZO_#SDMci2o9*5Y
zQiyoMRJ%r3cXSP3O?6?ftoP7;9$e2JPYE?Yi-d_b=$RUV&Qg*IZ%ieZ;lH@4zXZeG
z&R%8n)L~(zRTf@5*nmP_i*Pne`zW46c9fu)b$9LRi?`l>cx__a=mN9-W<Cv8%NF@;
z@PL6q7AG6r%WrLPCBMAS#BaN7&+BlAHdP^Zyl=B#$J%9ezq%pX-8MkG+dil@e=GPl
zDvavhT%L-tI2FT+s~BNbZrLbQZSeh5+i}?3MR&_F5keDflFoP}W_47NJnBAqu^D=b
zjT*MFQrz_0ggP3g!_SURYNBmySCT84&&J6Hm-EX#Z~Qg{kMavCEIb=bQizdaqf`mg
zq*yT{A;kt!$z2Osl{=);#e`_RX027zblNb}-rCgYUCK~IsWM^hmZq<=ydHc%Z#%|y
zF4t=eF7NIJxMpphuHi#}<d?J6I>nmXbZ)Q5@=EBMC7Eh%=A8yI^}t_~5axGet?Ay}
zC*0WOSghhV9}yO(KdZvcz(i-YLUsz9x3JRr)LPOUJrDJ>D(;QalZVRd`ot@tOR%Xg
zdPA@=P>U`4R+^?#1)a)NEBe+*jiMF$kl;X*X$(7evI>o)LL)J5>Qo+ahA9s25H1Uq
zJJ5d*@NR#(8cfS1n9q+=m`}E{Gjte0;DFlTic$oO;$<t_6BEm#gNe~!F&OQJT(GSm
z+r9Zsb^jp*4b1geM#>UK%7N{SQwB;6Pz>y=oJP%r6Sw0Hm1+=j{1VMzAh$*6QmJ91
zYFF3(ojOh;5?CwX_zGuOt!O?jdkG1uNpJuOIJ`-sVJcnmsM>EWp{TPLbFuuCTRHXD
za{hRrp5Ecl`7vI%gu4y%&nit_QfV`@am=WDF`+KwjA##zh?b59WmjlcrIfg%y<6$s
z;oh~DifBvo9fa7T+6pz`hes>@HY&{!4$_3E4Ah)c4bB?Q8ujia?Jwv=A6>9rrb9Ej
z!d!rMQNB%EK}IN2m8l-8gq*dllw0yJ1%n`^?%^Tf!+W%*3>OqfIp9`G2V<*w2kIgc
z;U(Mg=s1~PW*V+70ru!GWqOk%2v(+@g<pgpMxqM4P2jtZNpCnW3NgxB@LL2o?^u{D
z;F^}G6OAZL_HngsOCPRbXHQDfd_EN(F3TqOs0?pM%IPQ4WX=LZ4>%|TpNS+jl07C&
zV7n?2Ru>%f@aHQVIA5uKJ_9(|Czf%%o3KF3vW8$dqe84PkF)-W#emr`jL-u{D1{Na
ziV=#nH>W6S72Kc54dv9&*rGi1xUof1raESeQs0cF@bt(jZb$wAR|QUG_akMKEr321
z?8v!{h;by&jd9MFl#hzobaxKplzPS~jTomm=75NCN{w-%GKg_{IL0aRj8l}$IDCl}
zIlEfazA8B;Yu%H1sh!z4@;P3lju`AMDgc9Bw2LqM1f5MlzY&+wt&Phh2!<tGRx(W&
z?G&<%R&#O^>T%VKiIIP;2NQBRZL6psIzQpWQwz}^b)L|+n({nS8e7(EY|JFNv*0q$
zJBksSCi7Fkw54q`Z4vP`tB9Glt7qE%#I#~o;U5ovHNTFg%CkIAh>3%L`DBWN#~{gM
z7=(Mjf_qoPv#Z3t;e6$1>|LG~bJ^gk&f1+*eF5XvMGrG>m46T^mM@cWua@e4(LawR
zBpaMdRK!S++Ta&JoR8u6^!gLCJ*xo7t!p$kbgg}s!uCS$?-FBMZrd0)QWpEgo-d<W
zmQQG{SYLOFi}n5=NHZ}>lN4(yA=%(HqPk+e2$T&P__bm^3h?8Kb(ymGF~vFtl%87q
zE6t?ViZ#@VwHr}gv4#R=gKhb>Vr>fW<BApjzO`aWRrJP<{XsRBhD9kl0PyiE%^I*T
z;Mc!4aBsjbvNAp#1cak788=4Bos9g$^^4aly>VlYdgcm^!5zh%ES_c7jA?*ByV?*=
z0o)m|A^0^A)(nO5b*cNB<ec-I=NZm9*?CTs1LDKw>k55n0*(Q!b9ww6u=h1sGrD(?
z)<92Z4<@~#gguDiTPQ-c!A?ZU21EFzHF{=)ErF)4>3%`y#$aPW{TatcGnXo-W3g%z
zKHXU=k(m#0gRaO-DMz;d2^hU|YcS-_{G#oNU!Z4%zvTiih9uMK{Y?3F`R`5f^895Z
z4!5=vPwS`>U&^nYictxh<`A3>PQ#Dd9fbJ~-Tg$qDAv((EM`B&yue~sD(16<js&oA
zOhRJ6TkQI}a-l@O=r4I|#$#PUi8Yzu3aMgEqxj{+l*Xn_`Jj^y1Hl8u2tDMtOvcfr
zHA4K`XYik?m-#e(tt<b?tTjg0@W$IXW;WLCsP)VG_uL;FO}HGabfNO}qrhKyXD2rB
z=!Vw3q^G*1&Tiu@JIJH)>p?P#sPP5MqA%@flveLQN)v9!1wOV6R}Ri_%uL&9JhFY{
zD<K>1>U}#zzM3Y4{k?Bd<SUAW>*I@19@dWY9RVls0lipWj#wt7BH49t-&`{S`S&}g
z-%W(@3$8$7#!?zyzy?Eryj|%f({3RbngD$rE$5fiXb5zk&2UGJMo^;>Mb*c6<|L<{
zM^Few@)S^n+$tY^l~s8}Zk6}(z8z{daOANn55<>F1=L~)_4}&G>NmvK?_7o|WgOYC
z_M|3J52{KG<&@p5#PHxNk0%|c5txp%8l0_noJU06jk!C`%uWLh$fr)!$)*t({5yb5
z9W%A-t{kt}ob<E8@ZxlMhr;mH9a8C=`N+e+A`XY>kvVC~s#z4Mm6fm=c(W45In~D;
zCA6~j3^0`V7)-g8D4EV_+)TKcafmb0PnU*9n|8(6ahtkha4gAm>B=m=Aayx8wA!WB
zD=V#e7N}{t8dfi&)P6UkJ(tBw18j9_(zL!Zaecl&QgwLX7YqIY4)6clqSj@>b)3O#
zOBU4LoU(8&(P=)H$CZZbSxJvde|JzHWR?GJ4BxxSt~DFZW}F{>M`Nf`CTdtqj91+H
zBXz8%Ew98KM@vmFl48-|IPhg->-nnpwp3s9Rd>MtRpQQ3+@U#fE3}75{d`rsoPPce
z-I(H6&@ETKfkmzJtdvpBJw%aSO8Q(?=f*#>o$#D9tF4s<ZEc<fE%$W$K<=rqj<CA{
z1s%bi8r?J;e@SA6v6;>s*HF&t0Xf$4Eo$c-6>K}io0**bW%6oUFf!A|1`WZ?du4y=
z)YI8tG!eZRA05A`#`T7nM>B40HbcxkeE1SXr&Fh{Dkt|c`7##u&4hE-umcMyoY28U
zRo@J!ckbz7ndq9jvL@DRGvOv5dy;HpKt4%IrVWO7!;|4C&@-qZKDQ@z587!wW+czb
z)th*~dH7{}&c288FXMd!T$;NF&Ha7Lb`tAuidgdu=UfS^4fduc+29nxjp6g>+emx}
zU)i2x`K6EVg%gjsd(X3Cl&TmM$Eb;`uBdO*?VHb{C`Djf*e)sFVczdu{LsqvKCYq^
zQ(8W;y7YYhZZegzcxJEme7@v9xmK=gd%RJst7`wQx3Ah$1bHy4E2e6!vIhNJ)!gku
zHB*|qgzue-2{AYg|FG`8cyX|L<FJwdbd7Vs9uBuidnwWlCY-R<-s{G(yy2@_cO(oa
zO<nzUD1#LI?-X2(tHs}-pF*zpAxnG+;>}w8u?<o!{=Vqs?o?==L@m$xfl4#>FwX1x
z@^;)RUeq7-m$9pDc#zKv)uUYKafCX>@DI|kU?n;pJM#Lu;8$DPWxO`iuxJ^&ZTQj?
zMzgZ!lcpANcX05J@8N}_{(c0kmQiT`?%3xC{VVAgox(ME#mMax!@+kUPAU>{LJda9
zYii;})A)^lwtbH&S66F3u9f)EOjWdX?@lE0z7O9mv8!2ASA^d}6_?r5^cdkQ7BY27
zDJO)38!5N`SV{zHG1;OVnDiAhu_$8xs+oGR;pS<RPgnpxO;3eS_199YBk~wU-aQ@J
zPc`O{mG(HIz~2dY&<!>n_$}bvn+?1TaOrH#4DJEKQJAJ0H_4sc5L}B}sab4s-5kv;
zXyDhiQ=u{VYVCHJ7u{6j4Zt66HH5DLcDYRm-vz=^7|tus`3ny7k4E>k*g1c6&XWoQ
z@q_wwg`S&$_W~XOVj|oHI36&Z_Ps7AxSP-L?!PBp<?zPfN}tee_d1A!&0){Y%!pt!
zfG%OCKMWF_NHoro^Xum!2l;f_U|%2<na*yZMmJ1Fnw2~C!{Eq@hxQ<ZGfJfU#FLY=
zA4qhp6M&J$2Y@VBvxxMjA}sUa`J1aSum4+xS<Y`V+4#t&5YONT;om>YMBGz+(Q_Y>
zlT0@LXfdx>Oiebf1BgZ6J6G|fLvRINw8T{B{K`4!Ip+-LoGJ%lST6dvH7!wC^XagJ
z#@jdgwXS+>{AiBqQQVZ8hOB>$S3Ue}qhV23g2SU9LvZ-5l8j?3zJnc*k`;9Nr-2y&
zDy-MnOrwOu7+Kgn$}i;o1HlY+C(?h+j^*bzOK&Hi)XMb+t`Ol@lr73=NM4#7T$=Qx
zrXe^`MQI53l0)7@M1iIjejtM80<Xeat<A+Yc%*G2bh_H+V(Idh#pSKapNox375U)2
zBEQG1j%uchjBva5TN{(2S%@#`Y)Tr<!_ank!j)*!7S6%tsN<q?wZ!f-*S3tRU9rIS
zoUn_k7SBcH)YrN|_zk>9!)QXXImu|4XhO2eO}K_76Rw>o9D3a_|K9yUL`ctA7QdeK
zD`(KhgqFG`3r;S-FX>J_fGO<vYuf5gdNje+;Uai`!5TiLl+Mkqz)n;k96^^heeO^L
z3I;51CGZoQP02EE;?WVWcw*DOF#L;eQsJNSk(d7Ubok4K;fvyM8t=zXY*wT9DJM;A
zJ_Lqde*sgj_$iq#x#p)aPXTg|5|K2Gd5EudiGZItjoD6_xGBcHeOm7>A3W4{cX{*I
zUS?<n>S+;CxN-$ZuRkRHn%5Z>jx8!v7xnuq)a6_ej<6!+%yKGVn0S`c_d(MiG|MTw
zwXIps8*r8Nh`d?O$G4zYd>99|Hp|ggs2a_37Ao$?IdS7zPQ%yMxgu*uT{6r0?!}ya
z1BFwZE?Fv*H^s4{K1b93*AtMo)97ZKA+&62f8;bS&eR;6L}gIl%_#UV{Xgu$DgN5$
zTo-+9h7&Un5MRBtDYuu-;-;AJ&|_>ty$1+PbGHeER$9u?_tFyx`PJZ;?fJ!5h%_b;
zpWq^<N)c0&0TENBZv0>Z@q+W{alSM>Y~z3A8{PXP<re&bk8JO`{JL@u^5qn_shq{1
z=7_@(t)5OcfcUWl{r8owYESzlLvoWm>5_c?rN%8T_tDthd*?XAXME~<pL$$w>I*fE
z2#SeLom+n9wE0M9|AB=RX};8}tZBBiizoQ;CQf>{B%)X2!xy&Ij6(LK;r%nwTGfd}
zhcP$18OEGJ#*V{ZX8$jxMINudiF|Dz!b8lNVkNtJFo{;(M52e2M0mX+uO|{OD_6$l
z@r=UeC1FH=ATK(EUH(rS-G{oyxbq6+`Ujpc^`uP=OvgM4$6VIiPjB{i3C>Z1&?i`(
zn_xQ<WV_Xo0TtVriY@&5?maVZ5p0`0!rqJVB_`}hS}ff8)kNnU=`!n}%)a)Sl{V*;
zuAZ4p_z4r7gl5`+Q`YoP;=ANarjvZFPhOFme2S7U+0+%nO`5h?v_8!l-T{Jm(sVN_
zd3eixZqn3rGq~tFIg?#o)6nz0f0%l}95tH0>Gi2%b)rpdhSrHx^qyjR&j{kudx~A}
zdA1=KiHBPpmkKeIFR2jQ;Km)`yJ@ZiltC!<nNxBr^Tgv4^)g-0BB1Umeh}=&YT*|o
zrG#^CklZCo6wvZACG1KGhvc<Pm!ee5+$#oGvIXT_yy4LQF^ztfLqDnzJ#{#l+Zd6|
z8<KxH5f&{arSAaY?3`>%!W*!SL=4e9)LO)5nx9-x!Z1k)u2<!i*9oe)2V9aeeXG=1
z+8?nkiE6tW2ADa9pFV2EvQ57Kbe<&X>jN(PXCx58eu1!8tcpt-HF)z#0!LkM4c%47
z2+<{aN1;ImiD&OkM$B%?OZIy0IMBmmUE5Kou9ubER1Za-BtVPI#fEg%brJVCq&*_`
z6VfyDkoFPMVvn@A-4xV2?Spc7A2YdCJq(A(HN}~8ucJ1(Lg7YvrO0PnN}IPO^2G|t
z6*#BlM<y?AhO;wPPP=5ztxW;F6oPBR6t0a>t|RVtIUVtA&$|;LZA!|lL917)OA%tI
z;zc$)b`tTHznO8gmqYTeDW>B08pXpH)gIUMTwD)<3+nU|b()^1I3lw>)Myl~yPN3J
zcs98wp1hV!n@v1;b>_9ktD6BnzXK<$TdGR{7Xr=*&L>R9z|(L8ExF6CfPIQJ|EcxS
zqm2#j!k}j`V=#N#k;KD^Zda#pe<O)V(4%|R%>6pnV!?W8k***LuW_;StxVfmFKOP!
z4Y=e*@?KR_p1qv1R_(IPL`TW=K3ZFEH*3C(ZPq0DhL)8t$A*?UvtmQb-q%TCj14Uk
zaTr?W#vGqxXj!$&nGgPxg{A6qW;(?jr;aTw-e|Hvw?rPU0<t~}IOAS3I_wL0#r+2E
z4Osnvt<M56rB;}&&&r+5`Yf*Bd_MU)XEeF%E_!xja2bVrNM78>1-Reu4dHRV$h4QB
z1`ESE#(j-*&LPe@z&U$6r&12sPUh0a-VWOdfcnFCVgeqWfJXvOA+9ryoX7PE;Zc7{
zhO#l?$$SkT>P{)|5kBEIc9`L0Sh$R>b+y3@%?N<td49d&WFDaYuuA|XhLav(H`a)#
zoGj|5OeVu`adQ@}=MDje6~CooxpS7tWbz38ZXsLeGG^acRCz62`R|KaP7MwgG58C&
zwL)%bg)F!7pxr2>>3ntCfcs&kJ6(IU8C2Hei}AnZQ!7NI2kmPy-^UZ~&j#-SScdA3
zS1G%7m`M<&ZaW~Q%ruXnFI1$Y#1PFiQg(^VYS+n+x-*f++Fdl#nLjM0a{Uygp1E{|
zHB8L|6u?<Q&O)~E;mi{I@IhafSz;e7tgV?PE=4Y-mW4XI?2SI*dA}+!OH9#R!irm9
zmUw{0@OX*%S?UU*9=Xbqv9Faoz6)iy1WRpjmEus!<n(*5RB(f9)B7%6tJ5<hGu1mm
zz_g*{3rz+KEFL49Y*30U9?d)ErCQ)psVcR>_G;|LVB}SUGQWRl&&>Qki#ZObx$+WC
zixb&gvu=IgR*!HLA+GsLuIBTyt=4>0jDmcxQ=FWd_e%x)n*W|ga5dk>H|3`}tIbCf
zI3lPX?|YCIo%i5+bH(+G&c<_Tl097;H)3tDBb1`@dt_bZqmF1qXdXK&S#SQ3`xaB?
zoqIULgn&<(ca8vU%Di)d4mo9$1?j6AlHT9?g7h9Y8qI7c$4<cX{1&Rxde6Vd(fLw$
zm3w-T`E<NuTg=IY;fJQf4=fDdEgim7Vfg0h@IHm%UE**WA+go0q`<8#La)Hv7NJMq
z;A$^hO$9KuZwIE_+Lug!7QUp(wd5==q_1nq6gBtu{<Cnc=jI;iT$gbAj|Q9yA<qV%
zeB=y5`?)OL4wRniBF=_#I1{3HHF}MbIR9lut&5$GaCKW^=iieQCKUy_wbQMp6ls^s
z0>kC(G<6%K1=XK?ib|z8=N41N5wg8coza%LW($%Vsq)M<JCkD3kT@{cTvGve4{-ul
z=9(^wyM0dF;nAY>Qy=D-YhH8an&A|0|3BuLYgRz5^osOR7g7BwOIG6THrADDwFgbP
ztK^biE$(^kmDG#-&}kIi3{jDk0kUgWbT8Ig)JUySokU#k+od*Eok(?hoGPU<rI(i%
zR-&BLRWPJF89eqHBdo21MI(4wbQ0w+6Ta8^L|cmPIA6x%<Zbx;lM+)_xw%fZXo~?v
ztm0*nGFZvXM79LWc*p6K<?Q(m`@Lza&m}QKOguK(|LHF+{uCt1rN!-R9mFmzUQR%`
zEhVE1NX?AbEO&v3y*@xn#%q=+z2$sCyR2LITwfU1ubQ1Lnm*^tb26R4;1(U<=2G)r
z{GwycQ;=2*z%3*SM_0DAc;iZSMYiWFWI!t|A--Cv8hVGTN3c5~SU?EZD9gv`Ez~{}
zetHbsdwOMq+gzx0nN;YDgc`?ct|)S)=ZXU^G@cPzP1W_<>vnMA5uirC4+8w>!=_<w
z3wYL}1`Yt6@tCyNp+GnallHo~+{q0=A6&1!mS69**ALk-Q8(tFOoN0v{AMy*b7OEG
zg+4$r8iOMMuYcU|j|F@fupu}a2uES8o*e9){hhOyb4EI67w7CC2W(s8?)QXY+Y(TJ
z_->wn<$#yE2)zLt0mDm!yzPT-u4gNB#}gKfax~9hu6ANq>gHl##O^kr$rZbiy16w3
z4v$@;#e$segWd6m$K1I|9eYA^NFQt5k11qY%M<w|t1h@Xr8(TBs=-gi3h7LW{Bx5J
zT7*{5O*To5i?pD$F10KbU^+e}#qx9#k{}y&pK5i_KRkK6OXHNI&n`F1Y3dB`*#sjA
zqqk1F=WRS2&ADgCs5$d&k%z36?U6GRk{<{R$)C~{rLA5NvrOgv?X!M;=5YhsTA%Sc
z!FMYi{?x{^Pw<L$g7*u<|C$c}b7A;X>F~!2!|zCk-&z=cWgJceM>@ezxh}Gg)2MAl
zX9HkpcQLqgX;(5m3)Q@qFjYj?aJo<@X{_gp!KT;1G0`Zyj7fEP<>G{|Q9`<HJH;8@
zlFJju!M1MHbf+3S6~vg6#Bht{M?JxC*ZLhW=buLj>`3E}-FGD$RHo)KSm?sZG;wV(
z4ksI&$8T*gmfwb;mS4`v9g9P>F*wc|^ZCKaLA&%hxksG8+d>78c4elQvC~fmg>R+O
z<-Y|$^#6MKBt5`}`@fLvQ{nvFUoJzwh5LSCR$-l=dj<~%CLNjEgR4O$+BB5MgD(Y0
zjhES1+)zoo`y+D)lU{9oKb;<Rz#n?+-rO_%@N>(gSmLJnK>Mu<g#f|kPs%O!Q6M@G
zed?s#rkA1cgmDY&q+CaN?eJy97P89nQi#q*2CLt3(z+q|4Cuc&DYtUD)gwA7_dX3m
zMNQ?zWoG*$PRhZ*SmihiN40J01H2ya0K5mlH<V~y2iZPz1p5gG*&c^~$R{Ud`XF0x
z&K~ET0SW&<^4<i#%Hn$bzJWXvC3vGG8d;-84ayQMVnC39s8NDMMFmB{r4$t_3UO@(
zBq;HU(z@@|mA39$!B`U(O{n^-h#Rh;qCPQJQBkQNyx((Xp6xDi?e_lj`Q*+#GiSCl
zXU?2+W;^>^U5hLOajbib8LZrFD51H9v|g6Y(wrz<v?78h*<bgA@ie}5Je9twn&i)O
zdT<wRT4@dG=h4z+)P29xgZpFWNKP3>`T{NyNk;m&8^cHk=l{~vgF=neaJX_Xdt8iz
zRHbZj_6~tfooNq&orXuYmQ+aB|NBo5-pm%}Os5C``h374(wrW=h3Isr2b%^3GJBfS
zgA0fTF~RA<$@+za^)Eg>=!q%+{$qpCgC5hPq5knf=%J`hKo2Lwy!BAvv3LS{0L6kV
zdz$oLaVXGe?lUXI9tyXNo?etU=MZkoX+W#T26s(_jt#DYkZIj8c4{kSWjZ$a?caU!
zG8en2p6?roIXc6!!3I)iJT_RpUqFHrQ?uP|pa{gFV~oLR#QjKVs54)fC7MK&doj;N
zFB(p(TFy@))sC{Rp%M=harB_8>Y#omgUJL7TFL>!ZWs$%KQrjj?ROj&6j{S+g73ZB
zD>jDuB1x>pd*zd=P`!iqh{fuC8}B(wL{s|^ACAPyHIT2#=Zr?@CHa=R^PuI`MiYEp
z?1<=l#5}Ro=z9Weia9*+9u{~<;EgZC#;Q;vD9Emn2PKKOg)*{zWC1Z)$KZw&GzGVl
zP13Y=+=W9L@76K^iadalGyu$?-NOq7^HEjZl_$$W!JJq8I?uLVax2u_68=WcyG5X6
zDMQr68}TEZEdx3#cYA8$GYk^9?6E+cwhIn&fJ9{O30nL5s;`U|_|2(C6rUiZHTRdg
zY$$h0<O3dS9%n|J5})17xN#~8LW>5+*o^kTz~gOZ?BMCR(sa3lJDfqCpMezFi6T+x
z%!7vUnhz*dYFSiQj?Z7`xbq~PFbgYAUX_&FWG^>%5Rj~*_H}z|?4e(oh7}omx!2wq
zbAoFACMmBXFE80zUs!RyE>mJX(GL5=M74#>ess}g^W5&o$guS_;&2mR740IOMqD36
zF#1Bb&|XIbXfU_X#%IrA7%C-+!A0mWY;ai!$}rLi;hM#HGtL4X_neCYdN~b0^m5fp
znds$pvT1TwuQY_{KKO{$cAr+ycWAqBzGzAcX}f<T$k%qCN{xRg9Di?W{0-swt5f4=
zhU0&e8h@%EPbdBqZMXEdrfp&qFUAiRN0N7R)Wv7ZV!73J<*>P`wb3DV9h9TNLhtX+
zLfgIJ;b3?ULE9aCcCxlRfl;Ldu;m5fyAoe_4?*>^kFa4u5ZN-A=*?%fp8Rd%L&?_#
z$>oS?%<XqqMm>21Y|7}#Vdb%IK3uqd0Y7GJJa&GPbruHleY8`XXGo76yCZhjKRsoX
z$%Hfc1$1akRd0l}OHKgYz9!Hho3Ew`i4MbnMCm>Nr|vVDyxBXon1poSTT{>!_x;*K
z=}Px7cIgxTw1kfch1agmin)_1K2Syb+p?Hzttxt@q?#0@BBS3(&?7;ROjW9iib6Go
z*~PyaBs9Ztv7osNvq*b7x^R+krf>nQ?1PozZ&>0U`05u?iV)J!Q!vu$8T%u#^8(uz
z_EGE9;p6=}e)YKcUU;I%#g`#~bn%xzir8LVzuIJ}wQ&DA9%9%z0MPAA_3OhRuK+@$
zFFn(c9Zc8kn3Bh!D)qL+Ts5w9+hF?>m42ouqw)lTv#HcrX;qUm74Q6~b^ez2KGdY%
zGw{B*Tm*u1@Zm_Dn1&~bi$HKPt`!JoTw?@+zlq_HcRRS)_2j>4E^pwKKSEap-j@UK
zO1#$rYdGz{Ss-9)?B>lMF}K&B0*+uO><P@hW@p6aKMKB`+s+Hv`c?R0NaJWhlp%Ry
zz%HbA`*M3&lC^jn!bQZui8cR;ALc;LUqP?NR@G&)ltsntRh8HO(~w)m%wXP3dsXFo
zr$-b1!6uA{5|&A$li%d{lSycf4Ty**RTB#TT@b-!8M+AjG$I0-VfH|TUN|t@wzk9R
z9-Fp}H!Zj1c!G$ya#6N9@^v4luT7_?nO?`7Kto!aUUxh<=!f?B>4%s8FH=9bG^WWZ
zCtm*CGw)65kwyt0V8Ye>W&8hr!i^ns^F7-C?Z`yLz|ds7{<+X(`zaqu@o$FXUrmjF
zDjeUC8h>v%{+`tMtNr+&IN2_%Hg%V~nHS;*r!&YqO54@#bfT5J?I|wu67(J8K#|&W
zzvt8w0ZW~SUdWU6KS+^7Dsk>PIZfxG4_29ZN9O{4EKLlU9ezzL<8wSt-5$?)bI<UX
z!;@A!_aCpJA{Hf_a>>iSV=AO>=HOEg(6#2DJZrprYT8+2fgO$QA#Q)x=>4oWYZT*4
zINkWwS>qNm`OaD6d6T7?HI|J{H*2g7gUknn-aY)(@18YYK301(I%^Dq9*zZHu=Bxq
z`#h&iejwg~&#QM|yeF-YS)&{uj>O5VvA4L)8ohA6S>rl0Yh1+!Dl(i$%kPyS?uWxG
ze|XQfUd}R$uhGOcI%k@%Q;l=7agI06F~&I@M^+FI#(kGM;T<k9CgY)jcmKe<AKv~i
z{3oZQ&~CQawJ52*juIvHfM@)Qms_vQAleqIq?&o^=sTo`ov+U_V_DSI7W|CmM@bhQ
z%icWI775g?g~27wQ!NY)k$SAUI%lJqhDIDm5fUsD#M?(FsjDZGC`qTQ6lEzipIvD)
zI`4us^I2Gj>*yzxqNY+*Fy+*IDgBtLrha>5CN=eGq&2NZvYNV$j0(+3ctO3_&exEr
z{cT;B5|h-dYA?SeRaLv~t7D|Fw3_K)lP-0#El!G%Mz<l12R3zswAzik$rh84*7^?G
zK}c(ziPrkVCgS2hv@#Jt56)Yih_5&^Ahe6|LuezGXCkz>K_d1duDF#y_k%lANbau^
z{-6mDPsDa*cLo<5Crz(s5ajE+lTzc43ddKa#t#n1m!-z<7LG4Ujql*c|HSEc_^(ad
zWcn?`4<@t7J33@rnSP656lv7N7%a6uho1(e%PV=_yp}aYD*J;jp-7#c_uiW6dDdgz
z^nBOTIz2CAQHuP{Qe!YZUrH=&X%0?ZBmC8<hIe7imB}4~jdKFkJ#3|!p2tdFDbw>a
z7-FgRPoADPK9zQQzTR@B$&kE1Jzq&pj8ZonU&5KruTIa8k;!*X&kZI^Gd&j{k#2f^
zDGZVY2)+OCiQhdv_lM2V+tKOyTPk%NBZ!%9Gv1Le>ZB*_y~cPq;C&5mqmxBL*oY%>
zGChBRTf}2OpWvE94E1a5^t^s5d&2*5N)`mU7>3m27LQ$svL<BVTW;y#>8Beamgj1w
z;)jTDCd()hW6+ZEAKoAq<dbmr3+2(r<T2*^=Hb84^c51Ga0(esAK|AW9aAz9DK^rI
zCZ`j48D~(~8Sl)O6orL&R~v5u-VHAc3cKOMkvKtN9<IEX)E?KOu>1xi;XH(8QJWks
zO|~O}vk|tcg0mr}s>@TV>fx-j`_fGT*YtF&tVr%=vlH?`7eO;6G$Tt2GDI493qQ!1
zm|B9>d7dYY+v_$dWZL%bFyq<U9bi1kXFY798zs>|Q?oGNzF5MK#8&SPW%0v(<<_9?
zTf2KR-NGyEv(2)*qD#wYs`&5;SaM=p0#nhk2P)IDfIRS1aHW9k5rAk~bm)R}B%)Uk
z;UT6(*VQMaY{31l=UMNc6wuM__(9!X%aRGY6|Q{6s0df)+7d8A*JN8aH;->4x;5Vb
zXzd!A^^eE!;O(Zgw@y4Ou|lk}U{XZtkQJ-O?w@qeVQ_k8Guty8qz8W0KUn?RW>En_
z&1?7(p+|SwwvWW`An}X&ku8vU4EtGYxKo(35W1=I9wOWgyXa9|b0>=B)P!3_s)+1l
zf=T7!TP4NFZX2U~eY{UJjaWrZ%u0#rddoOEBH>(t^Z2&U3}Z2eKe<Y$$z2wzeY-_n
z3HMk_nyr%Gjs%Z0pArmW5NmBKs<~rnC>Jp#p;V3rxcSs72v?NuPq>fLMg79@iqdYx
zr`@OO*a(B`&<56zX$!=n##!&AE=U;L050ZokgKBh9lO-B@MJTuGjrv}^s@2XX0cuX
zy%*3%t0=$T@S{1s)w*h~KVh<PfRH!@TsVsJO+9m)Uf@Lr*8VY)=Gf>r{Alex>duWj
zLG)k!Xo)e_lXwt)iyy5$tf|-iqLsa^m6h6I{@zyikLSzEbapX_(Js;x%hTAPgn4OU
z6|7g>@~!%=h%a0Wdr=zIhjXfPTRJO0X#Oi@o4vKMSa!_)iVX-Y@le36>?jceR>GgQ
zotncKq<}taK(%QaFx3amhQn@GudULU`35uysPI8^6jaftpw$L62<YmA<|(MG9GeOp
zYCwa4&j)*TEmBanw_4Ed1~dq0@<GcLR5k>fT-PI8fq@|4W(&I83}6%(CT@Y73~&%|
zrUx7YFA6LaYjVEP00#lXd|)u6z+3ykXBglhpuh*F!3w;M4_t15g8-NIO0Vq}qcjE9
zr5eR>M*|!LJmCYwffZPY$<+A+b_0NoAm9ogxX1!`@PQvUz(K%?K5)4O-qr`c+yDmw
z{e0jV7MKf!Y&FIk;2@wKz>9?Rd^y6s{hXh5FyzJD<^kcsK)~-nU7Eo_OuYfMgMomF
zK4@ex5Ob9QwS$2G*;Zk4jSL22CK*sW7zoJoK_i2Kn860r4h90=2W2MLBJER4`^0Q-
zK!bofAGBOSE$svPVOe-E5OAdhO&JWt)fr$r7zjAY15O?c#LYFpb}$gIj}M$Q7>Ju-
zfbC!)Ajbzz8Vtn!!T{UBK)@TcH|<~`ZYu+92Ll23`@l(qfw<T94G#taX8OQI(ZN96
zy$0A01_DO=z~#}wK-_c#YzG4Yd-%XJqJx3BBMh(|3<P{bBcg-B?seI*u2<}M86-_k
zAztSl72yl;-toSAx5vBqLlNOS<HM0S5#c-Fwwb{bsJI*vk%f@hjb_UHgazdK<*|{m
z2FcpZs?t*rgC6e{>nRXT&dzujyPAJDyz<xR>><8Jjl=0|z6y*JH_q0^X=|Ks7a5!7
zM%*sVn%f4vw;1o2cz0~k(9iKc{;_&L#k+iidOyZ1f7GYhdK>k5m6*G{bNEPvcUOzA
zyG5i)nQLX&O-=C{&5jH?UgqN0=`(rnO-=Fq5ZHqBV7@wnXM%uN{MfxbWKbv>G&(C5
zDtez0$NjJqc{2CQLyG9Pf=^_bPeg2Fe2ePyE`E{U!Az1uYGvh<;W-s^O{?pK|7eek
zh<VIG2q88`zCRpl4)=?=H^Cgwe-`49sGbUH&7%zlF4)cUJmWmcj@YY;ywyA^$>)*+
zd!9XAQNx|mTBZ5armkG7#J`r4KST|kT~hbsyeT?|WQd{D^i8lOr`vGTkon|dcI60B
zOTizV5;Av+dXiMlOT1jg+}XwK%&8N8UjMw!VFohjpsZ;Fk`j*0m~f>{c(5i+ekwXX
z`{vYI#L{FYr>iC~3f-B*q~U3euFDTooQTo2VHL%?zbxlcl0}m2@!J%mOY1AL7~VyE
zD3!Zixbq>YDHoeu1i4`BU3ws7kp5J%Ni|4M9-PS_-OtM{*&uzsv?DM`dz4k7Xwv=p
z@tT>GmQ=g7qS{EmCmEy_H@}3gGT`Q3lP<u`AvDb5<^gFGceb1t#Z8QJ=H_T{$P|4v
z`Gic-1xW{h-%EH_5Y#eZG2snW6X_1rvf#Fp$cCy$XSYWg&!*@8yg&DG$O%KK*WJ;2
zO*%slHf<OajQWr9GwSytgY={RZmQxAx<b@EdF4tynf6>=0Boak>?4M`jKvk^5?T#D
zh#=n_eMoA2|8V@ysqx$XkoeCYPAUIwf=v0eS>mzc=*ts&s%#b4n#kyFept|#a2BOz
zaF?F}@e5Mpukqt4;0Qh_;AD>_w+w|O!&@1~it?6-CAb>m1aq*YQxe3!1_G`v3mc&w
z26;sIqpSKJWjeFCxka|~{BS$Y2S*!J$xgD@@l*L-seF_o;<IN7Uc@RA<>_ODIwe?!
z{T;{aJ;<opJ=yr>R2pM#a7t=1B&i(4dwh7zbS%GIXVc-e5y`MQZIWPn3T&Fi^@HFd
zNc|JMBf;hYxOl_3;#@N-uG!CAva}l%Dg$E_Ift0psMFfS%*$}oa@5_N@<Lpm*&t-H
zJBaKam(eJBO^)W(mb~b3RleN^-VRK9WhU)5lD5B1J1?5H>C`q1puz`@n9~#Yp3hTH
zHEGr+vnL0V*#S1QMbXSIAT#$R*owDs*~g@*l{D<G*2=Gmra6c-&{A&mR>VUEa~}{A
zj@Ot+DV-e-RXVB8=l=SSbw%U6okYWOzCDD9g!7d+!A+}6pqGTRwLmT<b``Py1U+?M
z4CnLS3TjtwYS%J=+KCNGP+QtI(oG8{DgT-$`5dY&uF0Kwy~-N7Ek~O4f0p#e+4N(g
z=_g5g?@G4~lwDDqU7RSG)S{Iipl!(Ic{_dDXZmpl6{<}hCF4rulo0NRN=c{Ll71U4
zY4fkZ{mNWp2IQRi(-plee{N5zL%1>Y*EZoz(S%QvFwyIkk62FWI^R$9N|}&vv)nW~
z#im;nO*fZxp!j%_&;jw;FM}R4?H^0p3N8}Vd3`P)ht$4ir>|)?FE^UkQ1a5bpWCXX
z^J^t9O@0{3A3xWoYL^}9oc2<KCg<Gy&=S^(`cQ>0%WdIGK#u_BsNOMzj{NEXA+El7
z;g7q!O$J6y<MJHdFNj#M{s8V7<YRZ6K$%9%cE*I4blC8?<JIuHn2JV3bxG5Av8ns-
zA-Kn{wskLx)_v4O9kV?F7cB03q#<K@SZ}{(_#g%|F_$&DwL2)e?;rpPCvM^F+f`gj
z<Kt~mpJ|14F7i|T8h%Vq^c|&E$euKzr?EozY-UEbxc$68^}EZ~uOeE%2RM-o@s&vZ
z+~ZykFuE-!8G@c$rGub^p<6;Nx9vbPyjjOR2{Np})R*TvZwM)%xVc9g(&Rov-85<&
zutrKJB+tL%kV7LhRF)OVw);AhoU6a(Ch~YqJ7NuT_mRp!VJn}6+|N%D(zMgV**oh^
z2x?p%nCMV_uOPBuqB^{-Zp%``_2C_L0mPsyUUMG}C6}Jf1Em;RS1L^xJ*iAdqfV6H
z;LJm!p!Pr(J0^ihGu_C6%yT3t&j|;eEJ42r1u>D8))kXieHEe7?(-P3GQX9|$AI%U
zZShVKbX_Fup!ttdaH3!*$?3cxC++6yj?C!A+I+Kp@kQ>@GBG<Q#XOL&?1E|2d8{hL
zDX*Y6xx4#MIxR05u485&?yV*O(Vns~?EDoex?lz&%%kU%*y39mS#J<i>&X4uf<D==
zF9->Xm+k01#LLA5+t;d0ua56WuYO{Cbp<U8O_^N~x9J3L5iMH^h4agh$@w5WWRC8r
zL*~6vQY+_8ae^75H{=gCy2Pq?OcbnnUqK!^fQIR{nfGj?xawjCOP6MD#JA9$SqC%F
zvwY|?J1YL{I+$D-*`-<N*JEYrhUBdy!fR(H&5fk-2hS(3qztz4FPlw06i^63`~ee`
zkfSVBsYmQr?4W<uj<x6z8!Xr)r4FdSe{5j#%%Ge0OAz$PFpxmDhja@DN?D>q<sSt%
z1%uV;dW8U)Ty&`HPT`De+jMzIu}iaDv_Ohk!=TF8RzAt=J7vF?z=|Ny?}FpkY8Uh-
zf71oU>|-#opnQml&GTb7ZD&wUz1toZBH1^vwADK6?opE67I4`7z6obF0UpWjT_+^_
ze}q7?jU%<#g+p=7?0Y^Vi~D6Iy2;rK=e~ccASCA{ic}P{;?xs;q0vJi43QV+)1(lM
zo;N|JBx?}CRsQZC(az(CU(%Dx52Jl_lk^dd4%lF=AqnNbv~@?Rt|j))?}dr|)I25j
zuPU`YpNbO@yU1y+5#x3=gI+A5Xx?-bVk~Kno05ee2~ie_>yCXXAj&R=13a@*iL%&y
z9bvxM%PIGOqbC%dv&|yWYMLe9{g(7;+I<IcK5g#(k%6(y-hVUo0BR^NmG-21#d`mu
zC6w)z1a0MIelBT|_dw**n2WF;!;kM4q;$9d$4iS^pe(B65h}ejj0g#K*D;Q2oqO*h
z5%-+n6k)}aY@vWM)pLprmwLPp6fn<H!15>soO6Pq03DN_=m#E^ZQ&NuWGdwxNXcH0
z9`a7ON3Yvfd$d>p5>8hOXD3X#<EgbC9dfYtsC~J^++q6;B~miFrn<^D+)L>&PfD^q
zx?zR(Xuj#u8Rjc5;S2*6^k|;fqw=7<w5TsG=z#%uICFncEN9xdl(LrVOJ8*_F$}_1
zM0%&N<v4!jftfYf%h?Bcr#A3Sb-MPF94aM;-1Zod<g(H;tF(_g9~$bTFX-4>Cr8pW
zIkWHR6+6-NQRs0H+e!Jo>7*BJCvAv!(hK9hUnk8M0o@L}J6DH0>GNFer0D{{`_C56
zcG7nZyBp2^iAX2eVHfSBcj<$qPCD}Wa3{U-cm2w9Pq;`SRiLd*I9Gz1aF;!l+GT$o
zl-y-6V)<vRMY`-l+hx5lzq<eYZBQN4qvL4&R5Aid)AmRd6jCf9TdULcSScaer8gg@
zU0Q+C;OkRGtO0TF-R&f8avuIea+ikHpoFt6U@&wUUG9mG!Y~rfd;5_Rs(R&e#YJwT
zb10eUZMmvRNd{)zX7z+5_Mj!gxl7tbICuTAffAi??jZ-Sm~S}sM=_V%V$Sr7d2fDl
zF^me4&#Z|0`@JZxzb)?IXmO(`&fV?80H0G5&fcLyXH%&APY$`b1z9qAWEZ<n{Mob*
zW{s`G=p(09B(hN-o7_J4rAChQBG=y^j+9rYb6ZLi&Qj{{O^yYok=G40xV#J{9#R08
zn{R8qk@xLMBhRvp93O4uX=7<*`2|5E&qz2UO`+O>^B<;t`O?VMob{3N!fl%Z(s#7=
zsk%2czKZy-2blV9pT31_sJz$0Ur-n+p0+6#T;{c~OQeN#;U?)qkhDp+(;3of>_IbS
z4MIrg!e}#RjR}zsjZmr+^<8g@OBA%B$&~yB<?t$Ru06^wz4qy1|5#nT=1QM%#!6w0
zwy^7?h3!CLZs(`6VuMB8vhU5!#_M(<&|?<6GL*KI^^QGuZh6ezv@D3&#{G&f_7Js<
zbzjEk?P}V#(K+H)dRjG?mcj1h#I^KSC!FV>y*w90^1R*V>1cA=Z){g3YBV+ooLxej
zKDBLH9&OXGV*<&(`3gaP^t!G)P^7KZGFz>d)f18+W(E*v8VIp`GBY9f8fjsC0CAv!
z*d+;Kuz`^ED*uT(OrW8gwmJX-SM_e%I$Cbpnq@Ap&S`Sayag*Xe~r#$d>j&(Xal(G
z*ZSy{e_C(d3_#U3WmNT-i)mw%^NgQnxtC_vQ#twuv0J;2&ADsk5z@`FJgS5$!sa?D
z6?cQU5ZX7Z%uF?r5w(f$kNB3Wr9}W+CmWvD&T*c(xtC@^PA%i(3&~O>E4LAnS~!}I
z+7%T`*0in2S|PzCD$j{Owjy3n+5t<eOTr1-q)U(}&*mYu4HLoN<}8Jt2;w%GTk7Z0
zD;s#+uY$Y2S5&ZTcRB5P(`x|k`YonG>%_I~r5(G3+Tq&Z=DPt&Qv)|4Q`v@eF`>r1
zNn=jpDn~7_I!Ee7s`Z3u(SFD}V%E`s4QCe!NwJd&98Ij1bsb3{(d#ApT#a6y6usV{
zffh`7)%Fa)oAu_(`0OE2kujpnXkqv6G_E4y?PqD=IMaNN_((sO(^To_Dsd&C%=46r
zhk#1!R*1{N!tsi|F(w!8&6Y$Z5=UKLlIs#MGYOR(%lA`!dsI@6t!%-K#MdvDeQig}
z<-%i-oMBl9%54~uP0pj`korg%w7HnxnMwj%>E^zOsnYG^gnZaWCyc2EOO{s35&Vpc
zl32O+S7q9m@@%SDA&3V%7)9_1^E|Vyh+trW?@GB#xostJqYY%4mGk#Hh=s9><P0t=
z&Rq2j1D1>`^<ncXzTqxy`>Itus4jz`WdeKP$H%INheM%swx>?y(%o^@dE!4B6P-4&
zF{Yy+rA;~tsx&J&^^D2I<Fi1->@$RMPzx&A<Tkd+VkLk)b)1ZoadND^lD*E}Jc4ef
zYepry$<i<lve+W8l|NSo*CDSeI1#H6%sPha$~6;05{1&;4Kuc8iM7qHuwc1^Q|7RB
zgftZKv55be+i<uDX4XnDWLs6T3r(_TcR_Dv8A-0ne+gJgz5O<k)H6xV)XiIgk^RWZ
z9EXk;Q}$Ccgu1EPG`Wz1+;~VmKV&%_UVNV3Hwvv%0`*oB7Eif^;EuMgQoqvK!CGVT
zY;wP{cE$=*<wC0b_<9mZT}z{NeOa{%y%(d&J*tDYlwHm?;J4OvS?-=@kbsl{Nf|Q8
zl56hsjec`CQyIiJhGvg3s`HrUX@r>yT(`5#SmR{vt&)4sMi-B!%{jRFwfV)E!w;!l
z{y6=v^&1nd-#%JDzf7L3G+7QOOEKfiRsd<%{AjYxn0loZ<%#kGAff!JR{dTh8juaI
zT`bk1F*5wJ{2isDYaQK9Djbx`>zMY662_crWA6-;0s;uHUiTK6dZ7?$y_QGoHPP0q
zf_h2m<)(CBPdsD7rY*4l@lr<*#@5h>ImE!65PxiPF+byq#~YONrD(fIvAr#QU9@yp
z^$p3n>HyP+hEGV}j5Yytv)jrTF0u^co1wZ0Q)L-Sk(gm8)X6Ba0IvzaxZ(+>3io$6
z%Y1USTzaLfePm!vqI{Wgr|Pb4HnzoUL=}@ZoG?88*eS*1CHAcNW3I_=JlWNDDL%0F
zouRev<Gb5TCqy&tXfq|*Xu(Hi@%Y+jOJ1yfJ!=J+BvgM^nH)RV3d#b%RPe!QUQHuy
za}@=!`AA#;QQjujd?OWZ*ohza+ixWg;ahZ8S)GI_Gm;TF3sCLagtI4lUlz-6z|^XJ
zU9fLHWjipzjpYS;=oHU(Aj3Jnw;JrWwvio8q-6W&>x3@F2E)gS8v`Y`-6C0!Ysn^V
zjF9DdVe|3=8Vx6$aoq7k#|130mZwF8qbN%hPaZi4@01&ZceZV_)+g_!ffGQRh1h~#
zAg#ByQx9U0K-i~73hPB;k*aRhS(&CbH_u1Xx=x$6m~J_zs~K-Ohrm^JQxSc$D%v-D
zRkpG0qylIuLs;-{Y)5__1>THZ*;E6DBN)rE^m@S%-38Rui_{+RB9GU|<efg#c9skn
z_)Tt!G@1{D$0oNkA39yM9O?tK3j=(!QJ_0)eU+LPwDDd^U$BGPn`_%G5)%`L0v;1=
zSqYlrSQ%<^+~4<#ogm@tnZr9ZXSjGj!25*pzK3^x`{4*5^3)BE#36Y&Z{v2K!Lz2g
z97+KN^|71GcEJYrsA$b8E%lVt*#3w<STN+o&q(}G<hA4x-HhO!`0;fdIr=f{<5E*?
zYwAUg%C(uv4!4-e?2y#V><+hoz@6QJlLHO8vSEG)rs`uLpP`FZgNDZs6I?(X1=~hA
z%eIHgcysQ~5-DzRy@1j~^PxX&XY*C$Z1QSPUXRP{DY=wJb6Ji7SVlq-(QFQd;E+$m
zh!n4xBy{GD7I#ns^a}AO4Ub-Sc2Qb6%Nlu$#FSkWs}}2H&t{(c(0p{TfuEjxvgtyG
zk*VDo3<(*(MKTa3+FDjcYq<-xOmuy5-(I#w14tt))4#IdQ=;HsRG6u-C^6;$Q%H_Y
zFv%vkKAK=D2{<1|{@g$PEGB~&dMv43&TLuhT-1Zwa=)!Ovlbsf$Yc}pOB0e!$gvvI
z^++63+zmUKDe+8OTw}DjBW?W{Q%*M$wRBGuynUtE2s%8kj*}-j8bkGI`=Rf5dNQDp
z;iimzC}ZfNPblH>-`HZ_h!*oPreG+fW=l_{5CMfkE`ras3^RFrR_IgN#Ws&5DqCRk
zD7Sf7DjO)glFltsPPf4$wA;z<@k?z+Uq>r5o{WSX7=NW^UyFY<@QuCA=#!&?&*NwG
z6@rH7=u2}nuscBGrL-oe2=9Hl$|$<x9T-<{C%iY|ZFF|Uha+*qC<<`*=V)Lau4NPx
zETgz~pd9bN^9lg@Yjpk~zJPPcKHU{krtm5`FL+8t=+^w@#QYq$<3VtZeGO8Ci`3x<
zDJN5vC{nx&130ED5^@)*vXNI<A&k|}&l^cao7_EN02(YGPwt?0FSBqr-Lj$InGDPg
zI4ASLfHaecF`jhVO$I4_uK8U+7KoVMme}6HD3Fqh>dK{5{uL@apE(OCvmZ8`+jC;-
zkld2@S#AeSi>f)nWJkW_q{}sLu@l|S9`TwdC7jLB^Ks=*{0od%{SSux+I0ex@VB9c
zt1{G7CH3roNf42Qi*3Eyi}o-3ZV`3ndfR$+5&5zmr5RpOlRJloa3A*Nav%2L{3dOz
zdjPczblU6wX3LEMhTvE?7m5lCHqV24*3E?kL%N>d_ngP;W9UYvvWxLUH+xZJ65ZGX
zznv0JeFApZ<o0?*kBN72Cvk8>+a<HI%x^z@YhQa?1sTs<dTSLHP)f84)yJR}b9wlY
z($#r&5qiA<KBB=wuTOKX560NL7>+2QGKuLyi3g!>#gn(KZ{{&<)k}Z1`Sk_l=<n7m
z@}_JZFy0iW0)v!zQ%4S*yID+8`OWt!=~%URpg9tmPoE<#V-SlCD!)ix0Sbp4G<}a~
z2<@I*^*6!_m#k@1`(o{q7vHO0g>kG)6l_qRl&l7%&1yxOtS}!GW^p-hzL;Y2zh1G#
z?amZFdl)7H0)iE6PsS>~%x9gu;eB;G<(IqQ-FtiWcE_8*+vt?w!;v^)ot<z$9m5d~
zT+2G=Th@8pKCQ`EU-k?Lvl%~xxw1ByDm)phkk}GpS;WurMy?qXvyAvw66r$t<+Y*g
zFEiOs&6xf6?iCMOdgmstpGxnYZP7ySaZ~h$Ims=n?q%q`M~L2Qwm1CwGNDdG+fDAv
zdt<OlPsJ;@_o$e0>2>Af6lG_@I=qi|)c#wDcZYoSK8p8Pyp7J2_;4gny7B?s>=~R#
z!S%%Dn~k_U?-!KBokGO4FOa1BOPWXznDXtB`NF+|&dtS7_Z>xw=#ck1w>z;TF4fMB
zd!5_pyh%vf5)w|`o<Z*S<0t*sK&Q_=Nj(4I?5on2Cf!+XN~=vNEnRmO=9}((0{-E5
z=T?0)c4yn|yzXpt-oAusK{QpkinEdrC_mTje18_WU&^OwNvr|{-M$M|vfaKb-apez
zA_w8^u!DNL;yoO1qq93c9Ep=|FT@ossUxl@{Mc^4ft@YnayJFG*-?_-BSmNK_MLkK
z9aDgxy4RB;eaA?*kDi^}?FVKmA>k}5336YEpY#(l=Khnr{U}?Sbo(Kuw9lz+v@Pkn
z{oVr8?N3Q}dZRerCu6tg#)ED@m=gSM-_IZ?*FA=3-g)|m&y;RIoxlk)Cp9^f@!m!+
z;XM`aqC)jf#M^Es>AN%W;Ygfx`-!-69mY7^wmR3<&$r!vJKI_6%XdV*l&syq6n-1k
zl?}5sL*1O`Y5<N0p^l>^38(WOrk_MqjpL`EHq<0z&J$IakWj=Gk?opi@q=^~UZ#6c
z)j^Ro>jXrrC6n@-Ak;G-sPO^myUCpfwErrPH9eo?@sy;Tk2X2$shT3PcF*3d_kD-f
z_jUs$5Nv0k$n+_hq4@Qb(%v~XnBerqTFV0yPT}qWspjGb1z*leL4lRJ^60VSI`@vf
zPB#T(>&MAjx9w&M7OK4pKL!6LrQjr43nO)a*KLIwJ*pksQ)R8Coswm(3W!6i>d9IK
zhh>ztdgglcEz+YH{2vs9|Dp;k{);P-s+L#cTY*88%|fzp9b4456SUi7g)B84vt>=Z
z#|59odz}4FyvJ!T#Cx2yB;MoLhvGes_(QzMp}&jw7&cR;{&~>Qost&u=1!69!o2a4
zi`hd$9C*GI?^BX{lT(8?zq5L0;vL*g2FYdka3oF!$!~Bs4QX`F#kIU~jU6Pv?a3f1
z+KE9TS-bN%O%-&W&zM7l1RJIkD-P&l{jS<QUCBDiRJ?gH#KOpLl2I`e&R<C<#wi(I
z51Kq)o0*b_RpdTIoN?!|7o-A2m$|o?Z53nO6`Tr@pi=km`0$Jt8%?R~x)v-pKVZb5
zF;M?#Z>Zixn64r6bApW1F~T;=j7E4l8;`_nPp~eYl$zk{oNp!g1heE-b0k^dJs}pa
z!REoJE|^$|k)#AP8gg3ceqi@TmbksyktTI4qHn9DR=AM`O}>XqxX^2b49E>OZJ~q=
zmyk9#4>fYKZ*OsaBDNdDSe9y7$q|!9B&?F4s#$IcNylxg)KmouDp{3<`v`mq4Xl)P
z3zP=cMEBZLZDg{YJYI8!)J7M+;x)R@7JnX%mE}(oR!Bmv3Y<by|D%VWdRlkGMJvYA
zZ0wFZf|yYOVp_VIt2%m^=-v`NI*2AkX9*e`1T{Yqs?7t|FSWS?f7;rNPpwVe7_Cji
z4(V%ilZl=$(b3w>m7q{<T1rj*Pc<oiotomfq!b2`)3_)fZALot-uDf5^I|3t-LJ{L
zjzDkVP5O}<>ZwHm*E}9ST=SBPl802%T)!1a)bTHsShY1+^0?-%dt{vJi`oI_t;?F(
zqRH8VqE3?TX>v;Nj_$5JX*axY?4sUX@D}eT>}fB2I1(r9sVlCqr$SuIo{DZU68qbG
z1as5B>k$VST(6Bem}rctBeLQw^QN33Y;^8?si)j9>a6b;@G%!ZNI(3y$w>Ejj~r~_
z&Qjuav`;W^rMaC(Qd*NcHpif!*`>+-xUDj@;7Ipy(n9Xxiz|;6&B?c4)sZ4FxYWdj
zGtrqvb>-5>{A(e@v($c-=6!`+FSlg-)!|#2dfE3Cyy_M~AfD_}nN+jIA~j0Q#F`}U
zE2LPH204;xU`=|oSWfKi_8TNeP}mJuIFURA+vx23V$axg*kqnGqIpN*LVVONjz3nD
zJ)a<0b9eZ0_XDeYdmWTipHfpFk&+r6cO_ld{45D2(Los#ZOqd~m_(0|DAs(fO*FK6
zuM8zMh7(;xqBbq3NHHTbrnowsqLLI&%ifaW(CV!loxxIU3&%-~gqqZ>v3^o{;w3LD
zjL_$IX`_2(?S7nRu)hHlI!C=NiJ=$oA&U8&qc$7}1D)6%!v?zE&=v+dF+pOWoB6Q-
z>P#Ln6iX@$#hg#*91MyV@zbM&F32<}UXeZyZ|i6|nr4R0nHQL5vcswGpsecMl48gC
zu|0{6?9@QrG&h*5B}q82%GX^?%Z+KW`uBotUu3ADHtsc5vM|9h?LVmpQHD_Ox-T-d
z;)RI&?pa6pix}}5$F!x}bXt7u`KlET#e43Go<gME+)GC(u<mD`M8tR^$nW?Dhy2|)
zNe$I&?4gT9NNAQ_l}w6T<uMIyfKO--ar?dwY&pzOKckD`9-XsgKr!Cy8TdNXPvwdT
zDV6qhYXf2=!<N(KE33K}!zrKdn0qKw0Ahq3F3&gnZ}VFY@==AJA5(Jd=2Y+H4MBGY
zlO|8)0^PHl*Rs8zCLd8eBPFekDJ4n#kDTT%-pLS`C<o`@2aT)GO(w4DX|xkV>=d2P
zqI~wVHU?8V@eV3d<>0Pula+%7;MHJT-sPB0eBGx687u9&AhJOe5BCl3J;-3+`h3gA
zV74qV>qAQK{B&aqDd<7o4f}TWij(toJ4jGPB&e+f%?pCuYToEF!pM7XDUrO>p*P52
zr!ISgR|J3!E;V%DS_8YAT%4Pwc$wBtYtUjwhr6C$W)p`VCfr71vZQXx9%E)#>3k|R
zll&VByZQArg5E?5ckj}jvZO&QP#v-)V##c#aGAWqD)C*SP?<CPX7_7+w(yT6sObTe
z*#R4$Ey`6A)Yt&Z?t-0|1hH=b(ZjUp;3SBG0HV}Dh>#qv@fYp2#=4WX!@QPl=4IGV
z`y_BMR&PITw&>gG(IUsIlM1=Q6e3p{cxdUA3N<N!^3d{iDq4mGPzEjW*)OF+bqS!3
z)P~1r%VwUWdVRHx-(90El&A?wP%8qcT@4b?OoF&SfUq4=l>~8l0AV|#ZxY0520}Yx
zhj}d>=e6X`YiX@V_98*3M{0EgqOJtZ{CGaCsF$nU8pe2}?XKRuaSP(#%|yv6+zed#
z6aO4s`opk>I*~{!YTv7ndkj}^`l8~`wHs=mslB@Rdcw)zYMg}0XKvLHMp(ttB^$P?
zU4}rE==YS3sa?9{o9;_K>Xfx&)|w$bR;Yo9qekrLdhx>w*-rd<#nwwJPG+-ozL#X~
z7^eEGi)WBMS9!`71AH;vM#;9e+STp}8#ZD=+M-?HDdLr>HIaIB@iI-S2Mv-cpu29+
zYYn55Ai}_Wiac%^R*Ox{tD9<_VN-jVXTg~!a-}{EGmzrl_dDQQEWS6y7rPZ-SCmq>
z3=k%sTmyDAK?bZ+d<u3BKBgG|ScvS33XUOEQBH-FgR2TOZn=ER_Kp(IQzRY&23c21
zRft0IxR1UQ93t4s&1J!kDwR`cx!L_#-h3)kv->OT0u{vMxfA$A!a3tlOhR_^d65>l
z`Jr<5S^Sc4*sm=7x!2EN(cRXuWfFC-s5p5=bboM>?hhW6Ax?J)msLRhC1~8TA$X8(
zR$i2*noG066-9_nvf__Shvuj~R9_LlZLutyT?ilYsv}Bi=IyrzfsaUgt|2S0J<F#D
z?P<Q47G|inps@8ONy7L8Vs$YajRmy`e0Dc;A^Q+bW8X#*Ix<aTUuH)08vEXYbd41w
z=MQMC?E3b=|9wsCk)~<iFco`E%lU~-qecCM%A3D5oz+hc4axW$&r)-Iq3oXl@gleV
zILb`hjUJ^cH&Sxln#Fg@iHxd_G*bxM?`!2?x_$kmG~jDtxf#IMrUCy8;2^PImTB%u
zoT6qR^s@uubJ#zqDOJ>z14=teL5;GjM}bXv!ce?MMf_Wl+7YBjh2bt&IN40KtfDO!
zE`;NzXq>i)E79s1nX(z7{|Y^qq(WA8%aP#(Lt4pf*R+{6Bm8-XoN{PPxikjRZj_vz
zLe3k-j{NGIHK1DKg+qpmd=A=!`J}D?gBq7y{|k-KZ@W<r>Xo;Q0?VaY26K~11(r)K
zmhS<}?&t%3<!D-Wx8-xgMRO7b1!urN$-*9Ex(4}CGDJ?QGB+no2x*q)_H0_I1^`@i
zVrA;(uZ_Oy0@*Y_d{VYJ2OT;b!L?#0KZpFCpF`X8GvX_LDtF{(<SKp+o5#<n)j*e?
z_x|OVOR|20FB7MKmr+EO-N4U)efSwz%g=r%@-t{QKZBR?vwtsshP(*0&M>&T@76tN
zxow&|93RwP<bgEbV=!N$yDQ9vPak(TI@@3J0~5+c%I3*Wgoz$YDr%Q&0@*lJZsiQM
zwaz3BecLB9cxf2?2nCN$-e{acuO%MM?~<d#r9`$_$RpfE_MpZ=Fj04>Yo%p+53)A7
z`A)w**~QW3e88yoEJE_)W(oO)o0DCf(wav|LTh?wgpM?3wnArYj7k|t!4IHH8sn_G
zoeMVc+U6WAf_TDtm{4!(&ZC!fyG--*hN6_Rn&+D)b^$?}=WURFB8S%WOqs#+60reG
z&N-YoANs7;pbInPQl8C@{Q*m+CYu^M3cN6C%eps^InC=S^SsN++F+jVX$Rf`G!uv}
zS*GqUBe2k?o;FgbNMJ-^-pTgf?i=-4NJY(YKl_L-mzDWeE`e9QS`3x_SE&T0MvHA0
z?EvPQMHLZ6bUQsBz#YBbrS5Or2#!v1+j}VD=}Zy#5|MD)u~E~z<(+_7gRoS$h>{ad
z%jO^sUT)*EHSYOP921U>b6@4@$2*@gWbNL8hw++=(2*-<w&ZKyp9{6mUi;q3b;tsl
zN_ly^MIuVJau@t(pMqWgE_hBdAv5Q)fQT(Bzt|mmh)youD-!v|%$-7IxjJobK)Ls<
zK?k?&?!^W3>Z<^F!_6+j7Q^wo+bN*COaXt>0E|Begz7lUZh|YNBKlmVtYl&hp>+4*
z3aw5bk;d4hL^y~MqV1xS^VPx8-f1Us51$+ZA}*-ZFe(*E7EJ78NSmg<eQbUENPX|8
zzI}M4Ws%HR9!_V;=33pAo~FWCtyg#^GmD4C-?ofPt?=)-c0EId@5$VjJ<0aF+HzIK
zw#dS&M+BnaWL2NR;mjNs^kUT~o7wan+P^3^czCQX=g}!x`RszoQ7s#{m~nkn6hQct
z499)~ph8}i0Ce$lkT3!02mpgyj|=3~OOdpa(KJaIgADp$)t8=Cd+9F3YZBfuu{*RX
zytpHRI9jwp!Z%bjl{2G=#3mnes}SwQBd2CYdmyz{MINkbV*1fku0q+ed15{K+4A!0
z+@fo6+9Hk`Y3=kwcKcfrseUV|ouM@MhSTuwd`cR>&WZ9;d$f64@mgt^D+<m!=9*1{
z7Go-1C+i~;46oh<HwTJzaOzFxY{$nYd~455nhmNO1#X?pUSS;lo67UfV9J4`2I(~S
zn14V^v_U(VWh2wmtO)ArFzmy0G67Y52sI_j>2|U1`yl#Z;fTqutul#e)Z8k?OHOT7
zDcusXE7q=)<Gr>LD?k2uD<Q|dvM07ujSzKGNtMFs4G%k}oeZ>B7*HPP85^`dK$qge
zLyR2{K8ARIYN>}M+$Q(*4``;~P!VIi9%BA8HG1v+)@tO9Iv*d?HYtNCR9w*{IclIZ
zLE|p>;(P|v<n%w0_kD$nG&%d?T@5G0+Yj#@<?8K=_k^Lcpga&Cj>O4=a!=gN)43NN
zcYu~rKf`jrxh!!vIX6uJkiSOfQSrG82O|SGwfGaxEPmy(-Gp;KKI*mr(|)6q;3I31
zBvKCX?>RByNvCely#qa}w^=NDUJj)}OnG9<VK2ds($G9B`ZqRIiJqUGBa0hORSb#O
z?zI_?pB0l1G$(1lj$PDxn%Mw=o5$<w6<uUjyhYxdP%pU(F<$f`T`wW>F%&wWB3-C$
zp-d&sC-SR<T)Nlnpn2d6p%p5l$>XF5WYU_Rz)NmLb>$@Ym#S}gcVmX57AJbSB`;Oq
zZR=&1s%PwM^sH*|U}x)ijpYBs&so^1@U_pyu-e8vl(@|zZSGZ)p+!?tvljtQn`H?(
zDdtuaV^+x1p10^E1AcC>Lf%Qx?5sV$m&pI28;lPkCy?nKw3vn7ZRj-3L5qnpWW9qH
zB2gjr={R(HA}V`_1&i=Q0?ibaL?c$rynxsXiA9lQfu!rCFM7q?sRJ29jScfaxfZ|W
z#g@ZZG^!-7VUZswi(3OED7K3SCqcUt#C?ZkNfsqR6#Fa2=^)%SbkdPqSbp5L!isNA
z8)fBi5Pn+Wq_i<<gG>jZNRN&dYM02EgY4U6XWSsO<vq}xyg}vzT5^igp7SBz2ZkvV
zTZ^~mK=r<ZcgR7)&pyJ3BXPpd-ozDt_A0LBXR+JNKzx!_-zH~-0P@%9oFYE=g)-r1
z1MqXdFu#VM^}t8HJHqT5o&EUu&+)Tyy~6xVwYe={waU*{2tVuBR{7bCjiw(<=*MaJ
z>BlFJOQBWE&t!W60F?khu1Wk%a+SWkA6Db@v$NJ1eg<Fd67$ZIT}d{rF}S~fLJmHI
z>rEEl&EOWjm5IU4@N!FLa8KKcS_ZdfSHs}01~ESmgWG^e_X8N*t0DoWWpGcLm{u6v
zfOiDx0fQSLcz0%vO=fVvB&YAo;AWFYdImS*p8<m#f*+cgLs6L-Tqj~JgS+$-7~F3-
z2n2Up2g<_??sVcB@`}Ac;bvnbXiOyNK!Uh`ZHzLw89`LSxk|#C+}{oecDns&2KTEC
z0fRdZKW)5|?4xZ=VsN?ejr!ZEk&J^^v`Z|5+j$F@Wu-r}(`_|qPG)ciQq(WW4Jqv)
zyb}&qu66+4Cylop?^%ZkgF6HtJFz5A7~Foi@-Aq9+-xJTm0Je)Cc7uhMuP>t0}Le{
zc6V12=gHc3j_Qx#bIjL4pO3%~K3+N|86V#IXmq1;i8nEJw0Q`#X=n17mzsxVHfO^n
z8p?L(sQctMH*R_SAi)MF`yM2up@<J99Jfb%_PVvY<7tj4=?UtacE{6ce(d+%@w6u?
z{2}D+cq%nDUHS$!6>EajbVanL(>dm@b#A^M00aMffgfw(bM}a|Y!vYBb|L1@bX9Oj
z3&WudKr?J)g!Gr7@sXfiCFoZ{kST08DeNR$*s0ON-rd?(&QlHx{lnKMd>IUcBk<Gl
zZyc4}@u9=lWk^A43BwSUuZFP7+U#PP0CtPd77G@vzh{g)X>pAe{0gZPGF=WbZVBt?
zbF<qRWB8?1QijrNn*s~bc+;3MuhW=IY-8p{8&g1I4AkC0k#ULKigBq0UK|B>k!Ow7
z=BmBechnhyP>uIJXSvyQbBVPCk3$1hoP(gUz^>EeyfK<Ptt4w?3%u<|=tzAHuly1E
ziuE=+tHsCV6XGyZU%(wSl>3=*?MR(rN9x|2pxGv8^%p&3Z;Xnb0r_{FE~jVIlCRTv
z9Y*h1{gfW2D`L#E{_K9$Dl@xN)qYg<cU8lo*gXSrWGA=l1HqSEoZkVk(E@fc7Z}22
z)aok{>p$-qTP6{+G=lwtSF0ywfub1TCV;;b;9Zh(xu1wV4kw~laWwmDh!`so>rD!4
zVwWyz{xU3%H1Uz7UJOxdfv0cX_G&~N`91Jy^sOE*XA(y~6SYBvn`CjMKeU?uXnUKD
zKKaLMc9sI!JTqVF&Y$=f7_a&t4EdE{`KCX0gJK5F>I74zG@8|Lud=enl~%J_3<-n<
zkHw$|1=ehVtd@rpI(=p+qvbSsKz^2nZAF-nLCet+)>gwlUuP(wWtfCzYuMX_Nk_Nz
zmM}-do*_*7xTTYZUDOdCxc3Jzyz?MY%NC<r-ITQ<jvb%fwKc779`*Ny9yOh6mfS_i
zs<mGCStg;_T)2c!Z2ht#tSeof+j1!M!<F{FzTVD5VtE&|LPPR9C&9c&6_qN=yC^f-
zvVtba!j#pO|6-b8)}^X%%~;k=K|UGFIyZn(X&||*L!xEbLl>Pv^RsJvLAYY0M0mSC
zK({rU2*?5p0&W@`7DYk0{B4^i=U5=1VX^%fMrvjn_j7KL@Hj$W=;k!w5{C^(;$juY
zJnL#rxcl26d9kvW+6`LvvO%nScpRfJ1QoIUQgET|Pl{<9DrQrp7|nnnDJGJEO)U8n
zom}L1r^pF1{GMgx{ooWuKR8AC_el}5DeiJuuh_4oADf(A@or{F;w{2E<p}k5#rr5;
z&KKjukvN(73USAd<a{x%A@TafcH$fG<;E@Uij^6qQv}h!e;f#+OYtL*JUcR39`OXx
zKJLC|CQycNcA!39+V8AbT?s$+Q}_`9<1ZX}^Je$3Jj{KZq0&a1(vHtqT2$-}M5xX-
z6ET*=O(umYnS?|rW6^DL#)F_q2E`NbUU;P9^?1C4j#lrncxT{kbWX;HBXNS_qi`1w
z=e-+TD_czXgK6t4YVcFO;(SCcLhXjJZ4k!BdJ0P;jppESnUUVP$;RV4vZt+xYSG{D
z0`>4dO^fLkk?r@wFZw}B8@=8BCkE?3&Iv$y6H{F|xv9~zAx3rGcmHqWmiprMJXWKh
zN3IkFMj{4(rnfW5h5tRx5bPk{+Qp4CB)-TpPO*auv$0vuC*_r7DX~QwCY?Y2ZOeOO
z^?jsK1f8~mAf_?zp@HN4rjwH1X>zZBUgtS|2qym=Ef3(uS#>he3h#?aVJA`H=G!Dh
z(-H4SUHSr1HAIE84l4DG$XUJ(WY0)xI=KX(xA~ya!r!Na7H)Y7w{@xy>sMs6w3U4U
zt4;rP!oTrt=|9ofbs3*E$S#w|KyV4?9b&|^c_#jseW)((BV4EFG4FP6CEJ%;E_AnJ
ze?`kQ_qs^j1?(wl8Smb#frxqcsVB-{g^9awvssJ#rO(8o)zZg3B9h5Il1V4`m`LD#
zlE88ICxJ)PAxWJIU+o5*V-9{uwC{*aoFh7x!)FabL_f^t$f2Tw{wBxOhbHG3pZy0&
zkOk~qPFl)MKLF2si|g&z^c)#$SjUf6cgspI;}+Hc3&sP{uv;%bQbighp29pem{-3E
z%zgs1M*uTJjvElZtAv-PhPU@ioe@MvN^O2KL#Z8uQlA!>G^O4r;b}^}hH%r?hclEq
zHB+g5f>K9iD0N>6Umj%a;h?*O7xwn?r{S`braPneJkGSY#J#W6<ck;lX4!So(76&1
zIZ)5h9~kP9zCIK`)bm9}YF|H|(%09#;k7?gUrz<%yZU;Rz@)+Yz7n1W>)riQGxhbi
zuV*MV)Yq>GOqx=cNO+o3|44Z2eSK-BQbT=xa)wezNO+pQ{)L2R>g&rp(7SukX&nS=
zQU;2cC{O_na95~*YuoVRNqrYbY)nvv>QlJhHcB!52`ev@2pOg$&JoSP&W;7YdyTRe
z1!V_QC^s6E==gsep2p1aDkmQ*YQL#%!=g1y=i;<63TC@LBV+Z2{4oD$3U}7ugmoA6
zlg!JAuzW<p>qlsIP3|r19|0&XKxumN>s9pF`;^^K9^~K+qSuLRn3o#9RKi2ei43mJ
zdin>fg}23(JwsJzJ$0U#PJSG68G<LTVhA#Phcsu!>N?UsdkrIaPDOdQq&ogUlqU+l
ze3jB<DV1HMb&C8oVdQVMT#>)<)z*+-1Y$w{?*%9g@-HAfBl3@zL}`$JpoC{a{;hhR
zCkgpaNL2;-KOXy;N&B%^qSg6<c-FP*RMKA1sMsAVnP(*JrI@CK{skxvcDqP;PN_dG
zXai#bAwlNXEiV%ponLdZprV}OV9t3%VA5o~jPQ)zcDE!-(`{Esc&2XqFo!LaNNSNW
zlil<)jF~<!n=#Y=gYPkBK6)uy#~;|2iGn2@<!@!otb9s)b(R#9u~$FlL<${rf&isK
z{y`F+saJbQ<ahL{lOf}Oyx2;wt{^g9uP&1COuf3DT<(zEtG%E02jk3-=Rl5;sfIi5
znQHp@#&Kx2SZEfv$hvBp<-5dAH6>=MDUoRKwtG^Iqz`o~pj@6~o~8VbsixF$yU0{i
zxJ-NQZ!2kTQqPt8Qw<l>Ne%84plHwa$#Vb1rDq8CdF~nNNjY6Ul$57Q%F@#Ch}9WX
zN9;(6jP@;88Zy;(wj<U(*ehZi<B3>pC|inXC%H_D6rppu7V*&wDMjQ<5&1iKMQq;Q
zw&EW3q;18WlFR%^5h^BV5tpVGktapub@Ph2$tz;G@uX|TP|0OQqzIKjw20!=B66jO
z+%5rYiwR6}AAufsMfyR|NA!wkiA)*<8vclcM+ZS4uAYF7nXGf!Rw08xu3yjgcFFfx
z3OUVuO2}X4B(p-Ouh(R&q$LS*WU4P+yipI{OK#odHv8<_7fQH#8EY)p#qqPk#oHAc
z4+y1Ls*_A80^C*C?XFwQ=IB*4XVde>oJm3G>wSHyQ_xUZds4KNM<D^JG>|x{kbG@(
zcM8eZn<6O0suZ3<=aWIbVyDV5ZE`-vJK&dU#rYWTHOAYF_cgqY&gb}WBu)%EYjHmx
z!Wt5;HRvq11|3KCF&KO~=M$|`ASH(lSy*q7pRRfh?u_;>SHE709~EXE38HJ-p6P5S
zFVC)kcm|qudGj7|DBnIN-?EJPW>&1J;b$V@QA4qmy^o(7ezIS34XaC3nXVR1tnBYX
zl6yz`PBgr0xtk><&$CyhphFTUC<^V+ZgM`Opwmp}e2#bKue5VM#e2zVrl0W6KV3TK
zOMEyIC!O;l?mDhKeHV8-E~>;~xIn@66K*#~w-aSAMU%5XF_%jaHdDMeP1byi@U}Ta
z^6h~SN8(u0?`oVKjkBF`+8f6)&X$2vRFm^1ZXdG1`?+|}G<C;YJjK)<ulxbfY`yL)
z7jn>9IFr6f(2#cz7OS`4mYW6tIE3e^g1(j=nqo!^Rz5;=R*k+YC6`*)6hEkC066z%
zeb864s56SqYQ$*KZ5TyUv?jcgd|ny=IX>1?PZio34JAvCr$ZetzGA3DY>Z9#p^hmu
zCW(IS{(-$@GMa1ZWR{bs^i$o*9RyGDVuZ&$_k`N=N+`IPR>qn+#vqG;3>nyp*>pKj
z^cUYAcOxl+#o-!xidCeZDRt!}_YI51kLw~}iMii8oZH8$xX~nC1f0UjMtl2L-+HN<
z<RlfrK5c3oTOC>f>@1~8&7|&ElT-2@Be`2FH0%41QAhg0lQN1ZC%LgBz3S=FHdf^2
z$|0nP3WJO1{%R`8cawYHMm{**&U0Y3@=m?*Z8mUnas5$)efH`cu72l;XS4&WyKDUg
z&8pA6rK%K-;>+nRFf>m(U3Pkg@%E?zl$FY84mSl67|M!GtW<9r5%g5Cy}D<2*8Vhe
zY_)o0<FA>W4572da|87WU)3{<Zf2Ge(ocVv_An85VOK(s{qaMPtM|=BkSoaDy<}^V
zAFzAgq@EPJrzPGy1v9*7MrM+~ET{4wHHR*oI6+%hfMymmoKC6n?ZWXN^-oFvDnWkw
zm8tO!;rOMg@ela%^pV^f{bMfy--?^4JXZhBO2yqB<Q*N%)zb~DzfkBeFFK5?Eg9xX
zKQDfbqepO*JOz}HuNDfGX17)LQ$MYr8A;`mDA6HnIf#)g{ma5<0HB26U0^vH!p^W|
z>vRS-EuX-Z4IA_cy+-F4VX719rcH9<ir$O09HO6Fss}YXNA9D1eWY;?HqKDv>}Q-E
z$Ur!`e9nYtn>?IFC`0~L5IK^sd(UJ&Ru%^{@tB@S&f%S7IrGaw2WI`DN9luFGe5qb
z&<LXzaZBIOnuLd)cEa#GaXJd&=1g)sGZvqH4Ycm=bhI4k8_t&WM8T_#Ot8y+<j9Vr
zrz9x0kB2V_dPssQB0;xG(7Yf>`1)j+tGrGXUx;5i=|Q=>&~gtB=Sra!GCtKeMSK+!
zcAoUr6!DFzOmrPi&Js0-Jza6$NLt~2Y|F=T@1p}Bi@lFr-cR!U?c<Ma@ci4vAJfGy
z$!hEPV@QQ2+Z+<x1YG{W8*gh&%);{Q_(D@eLLYdWJe)lMrNcSzS2CRH71d5=#z2~9
z6)mS$o@r`6uyzgN<th&mL$|yrZ@EoY7BxZMa+_><(}&8N3MM`s#qJ`JIrSBzNfq!Y
z>BBIOTK$;vDCui?%V_BFx}m!WWET<yo}6#F7>j{cEes>;SBx-oodwt*b+zzc=S=}%
zJ;%b?CyJE?k&OrlI-MBmd+@SNTZHDjxg)gi0C2A+Ogabplk*b{fL%z_@=H1XgCsXj
zrUc*~FNNSLYV~#aE6?>0eZd2@iL%S^aOzNRz?$4AF2KU4JTT#OfvwSoZKYje`6ItV
zMGC8K_VIPO-%phw?@euYQ?1mC$!OM~V!u|s^lREK31@kK-9pNGQOw<U5TFS_LCXWY
zOF?ULDZ^ZmBCFmhnODlSmC2d!o^Z|%<@(NkL9Szyb0tST!$vWimPI~fOMa0qyK=s!
zZ?D+t+5^tbc;jcQIClfyV~qD&ym#PjbZ*0kBXJ^?{tj2}bG{rmTRI@8e!dk)SF%0H
z>;!#}X~_6K#pj;?EB`J8)~W<CeNQ#_;FG=!xOqgNj*5o;MZ*5bPwldXMf<X0^NEKy
z>gzlEOTF0%SyVPM)=<QUGBvlFi(=d>L+}X;Kg7aUMd1$wUQ-5L?XO8gGfzHeCKAzV
z9>UKgd}C?yMB-^RN!o`&GEJjo83Sj9^7^I8>#*<6>&H%kZEb0y?R@>L)_hH$<eFEv
z(<xAt8Tue{*8Dy2X67NGP)jh+kOO>HB>iXco<3DbV=X?Mx5Y7}5WB-@CQUDH3`zQu
z#|GU3pa?g-B!p}ZFvYT<Rk_O})-0zz8}bIy<M+J)l`KPAGg~Z-oVZnk%(avklSQ!@
z*LMi4jIjKdL-OpqL?)$tPQ+ld6`s2HW@c<CkYWx>SIlh&I8=<lN-_7n6e{Kss*qI7
zFTIq7Ci@S$R)lLj5E^{Zw2Z^au*g%X1LSd%IIy91!YUdCmD$B+p?uGzthY(Z`f`(X
z*0L7oiSAUdp+wsA`v*4ai;ZUA!P5E#5+k@W1EmsWtl@70I8u@)<M-|-lkqFC((p%L
z3^n}X)P_&?QWl!*Kj8`#({Q5?u30}t^Er}!lEd_K+5|1lNpu}Cod=MeC#0gL9naiv
z2K+vR$berNZAZ;p$@i$gg&4-v*TqhK3%M}UFQHm?^i8N|7W|ZK6cbxkCY)C;;&Or}
zw>zp3J+Z1MJ;CQkpa@F;3!i<@fi-%Q0W*&CsK6jS^M-`8z`{>o3j8b-e+YdOlk^4=
z*|Mq&IWxXN&x~&iaQi3VD7DTs(k!bFj&=WyJ;44YU1GLEHo^QzF6?t=Cm<@-5ZR2r
zzl@MFP$5>^e%37&7a}R+*t}jmTWIck)~AY?ZMceB?~yuEc0!lv7`5uwbhU>Ak;s$a
z5?)Sbhcrp#Vy80BFXJs0FA4K2W_?s%F<`|x?Zk*Rq~&<2liWoTjg(5#gUBIe8cA1_
zo+B3+?k^K-KR(N<{m(M;?*|XsUoID5lgI4-;6bwokrk0EOhH9<ZGQC0s|B<hp|hrV
z9v*YajJeHC?wP46zLrp~nyD$i9?wkN8*u-Qdn0ap+?#N}!o3-HN8DR*SK;1@I}ca3
z*Q_R^8Mx*anwsJo{BjXZO|fhd=Pnv^+1w4dwFK;gdl_ymZUXm2+{<xi<IcrhhAW%W
zd*NP*D|ggPxnS|s(IUf6dv>rm=R7kKe4Y0sKj)vx&jsE1x$s(kej|6?{PshBF6zh6
z^c#WhDN+<}363leXAe2oYI-w;`*8q!mRl}VkjO5^DQ-T(1Q*+jYc5ypg)gId`v2rI
zhU$Y!8vxB9_b||W1GGyBs1n<PRK^+{E>ehOH8fuHe}G7;S&OAwMdHQn(tNuK?-II!
zC+|eVbbg^(nf<Njlb|Q`SRAa-ibX;SmTZ};^f6{Nf0Wjh6Kd;o%X6?ik>cEk>8T3J
zRHDx#ufkfDxF^IHu8?t%$3b{PtE^uooV=EOpy@6`(_J89@A91y5UiR72rnkwyT#_F
z@J?W%)39KD$)Dk_GoKRv6PT#w_I`6-|DOAZrh2R;is1W`&+7}Dt!U+>ys#RV@wHaU
zbERZeVm36zh8{5VsQAKy9ZKMK#G#RzH&i!(owfG1fDIFy%D39y#y6F3yFFS!!PS?F
z+;39k*;^Jqt6edtlIP!t7q1ByG@2p>(&`R!L_?~;v+rE3Fl)mx)$JvE9i_C%HF*l;
zTw4)pw3Wt-QGM+k?NO4BE?zUIipNc~Wf=<gE`0C{+SS&hVk^y{c170WtQEYQHP>9n
zEUnkFY*m$1*7^0-S~SI;n`6vC3KXuT>1il6hi*rRM$a+ZI?Si@!0rf8+<k-2;BI%R
zAyCzNa^%)y(R!MvGjgSvoVplL^^#B~s@Z>&d5d5_WKV00$}zS+4{%!g;8!%*DO@PM
z%zZMNyB#!>$lE<Y%XPkfOf|e*)zO&CKD6K5d&EY`S?grGa*<X<YIQpN5mjN;Zqh6v
z^;olL199~8ZnM_Nw&O|QK-4ozb#5|wZDlUIgYunPLYVMrSE0dilY2WyC?E}c3387{
z=Vow*wp(yKum+H)qXDR0O7$BiAcwm5EYI@F%%RNAjm{*KNQM^Gd}=ne8$=~qiv6lT
zNEkI}XX?aO87H4sXd9T9^oENZ9=F_5%=sKdHpkr=3=;4O0V)A3lA@QPEqqHlao3B>
zw4T$jCq=on7g<q(pfY3V$psn8!f}fQDMBH=sRvG>eB&00>s|!Qp;&Wk=r)T66V{x|
zL{2e(p%^%K?*^d{_t_eu59fLUY0dA%p|+NmUPr)gbY>9<0-b5NQKDLUyGVde+rK17
z{Lw@VBZbf#+fJL@x{X5gPH)KtT8Y&k!;eI8hqFW!5aHPdXr|<w0?HlU0{W5QP`kav
z8(PW-3q|9H^zyh%inLA^Eu@<h&WVqjifDPcR4(B>0{~QUFfkQ#FB4oKIL^OQw36rD
zYa7jIDQqgwmZ(I*O$rX0Ek~m$>}?yIY8XPn-jWIXRv*D}1YTD3%9)px9Ju3K=uVi^
z7Qj06l-l!-E70Llv<qeOfVDR8A>zP=j-uW&8hU$!r@EcWY4p%Q>C-YZ>SjvGNeB^I
z*k4dAg_Btu8G;+KrnTcb;%T`p`5vvbZ0|v~<cLpbg))lvufEWhEaUJfYTVh>%8oyV
zg0r<>F89G@w=ufNU@%f75ecXHVX4;=Y9R5t`}p_(EiEExe+5Xxq#$sS)Vby4P|=8_
z&U~N(;*g@R(5z+Xhl+-33ht7Kg!5~S&r~$YiWr5uLAOK|Oq$+BhInYhworrn_HEEO
z_{fP(8)yfAV}r&Fzf-8+vWRvNRV~yYPiUUTZ<e{*qa1>T8_83O##k+yGDYP|Q4Gd%
zK;eknHn3MY=Ca_P-tuFixA&lBDaGZSOsmjqchS5LZ;;8v#ZITtG=<C52Z5nGcb3j+
zazB^>kzlXkQ~r_>@Ybyxxn$s4GNWnd3J{GkhADF@N#@2)bDZA-A#AK#+(^tRHfCH(
z%m^EEfQeCKw)Ffa*lAylTj=x<x6$c?6Kirhi^Csp<XRsGImDM_D*(sJ5#1gMb19qK
zf1O#%_hOpoGj`A`y0I-<v;bPA&s!{JAXO}RH@hN>C8ebmZOy?@FKS7}l6Q#WM#t>p
zM0sKDFu63%iwx2k@iJ{xN|wtimb^!nt4x;pwZrlf!}4l}<~M(np;i=a231PAZDrmM
ziPzmxH~q^5{+ua05+$m_?MQ0mfTh&~zh6_L38g75q9vx(^SkgWDUp~9{T&V7l_-@=
zqI%?t!CRz@Vnzwp^Ki(HP$vB=!$s!8GI3>c)JaoDaiRY@#9I<Y2=-#D3O!4R+PbQ@
zaTkd_mVv8F{aFM&=LL|P>eTu+oREGl+!3CdHLZlBcSN#Y$)LJG?jbUlC)<!)Oh{Qv
zaR9YG1!_lbM<JbHZIIPcWEFIfC_IHo)MZxYT92Iu4E0kxzTEWbU5R@tGrxx+v}0rk
zwGtQvF+0jKDQaQnEnY<Sj=7&-s>7zYf;P92X-1J1ulY<6Cx_4aRAhz6iVlc;!CA&w
zF%@uKbcVEr#1>IV39CvpSron!_YSTE^G<dg?e5wfeAz2|W=VAt1$!(+nJ_tf6H&Ev
z2h3f^q99QfRY78rMdAb4*|a-ag{lQ=2F=Zi*N-mlBVFEmz|#25YKxFX6A#-unJ78t
z_%sK#C=r6jA-*}L`FM-Y99T~!e(EMf5=LiY#!F>qiBW9UVx#OTHKqkD8vr2XfV#3+
zbzF+laWkZO8}jDS-LfuHpCS+yNQ&fC2AMv`8i(Y}WXP27D-kaMY9an)A?#TsPc(c$
zAcPzNE7A=dLiG<_uLs^Ww9wZyZt_Frl`;~5ZoL3^#*@OHrgb$LaRFsG@??!n+2JO3
zp&?53^kS3SL#juXsPs*47d~`Q(3pN%@msZvt`fPMP8$Nt&;dc|a#0ehG+A{Qi&;16
z8l5h1RolQ-V*!y}1)_Vb`3*sztmMRNgi{Eubx-QFin()&=!~>c&SLsA%$sNZ)#uIA
zew!|dB>`%dKDM9f_x$v+mMVnq!3|>|SNKl88cx7BE6>^m_hLqcxVvY;`MP^3D+uur
zG#OElg@3F8E1PJ#U~7Z8f_PW&z29WK<=L>QP3CRt4HC2_QJxQT+H`h7=xf8dd+L~J
zQ9I+BM3ovO0WD<cl2{W&wjEj}eI5LLt>`?Pjp{>XgtFH~>*U-dXQ0skRh&T3N$@Qf
zEe0loInL^x(929tE#pPx*esZFF{+CWv03($ELqc5WB`IO7L@bu?Fzy4T4uwNa02A&
z)C3qwv&6CiHEzyQXjy9Aq}LZ$&jT?V5Rn9@$QYxGWjo=U9#V1FZ!t(-C$6m}?O1k5
z&<@uIH{T6Nni`mH!N8DGH#gLnH)+gC*q*gO<+>YS2I~pYqWzF{)OZ~Y*kJl`g=Q;y
z7C|JC==BnPu6FbCr0Deq4YVMO7HH1^yxAJxhd^v9yjA(*@|23u>6Z%KGGJzKaHGRi
zdR@mSZn5qCB5?&PJr7pGWP~@l)6p2E+u<xCG&Q--#X7&DL74B}GYvqV+j*A8D1$0Y
zR2?7$o0lj*V8GIItbp)71xRQip<)EV9w<lc=jLx$+sMfo_kdSa!sNo;07g~P5KMOi
z!|P@OQ+0sQ20MXtj*=Vni%kG)Kq3y>K`LVbco?3JW7&;RS|^CG@gFY4egTU+KrdsK
zlhkGMIaEwkz2lEnvJv*#k{4@V&k_M?sOBV@b02vmoB3p8CNmgBMc5em&uc{q@-K9c
zN)&?gaR&9rngLl()r3h@i7S0o=6OoRLqMf<E5wDrj@O<WV{$p#Br;u|aGpCT7|zE+
zM1SSm8_wmDdx^aHz!~H}@faM9%dK_(Sztyt)oR|ANl=hFPDV1<RikgkYjOybVjbzi
zanaFUt{km0ZH&I-QK6kDWK~LWLRGV;N?*`UnMRp}w^;;HZ)yI3#sN`j`?plkDrphP
zl==2~4Ef_EAtgAWtj&yrE`itknSXy;Fh9hD2Ed_O%3;>yV}=cxW;Mo?4W+b1*-({&
zV;Sc)f$<pNs^{8DuzqzmD2GXnQzkV|nAEZMj`iito6?-jkBc-q>lXCX7FIzVY)3-c
zG?QyB3o+6&(ZNd7vO(4u$`oWJNffILvIL^Pg|HW5dNRjj0>Kt+MZYg|44$Vlhlb|)
zGRGc%s1++<2a5CDzxXl-N$l&VUgW2bN@R-6v9p#a9bI=8b*CN7C9LoAv1lQcYU%C+
z+z<x1TmXoNT(Jmpr$k4iyf!+M#n<ReG|mKZGAXc=eq$BbYHsvm{C4y3+B_2T99{e0
ztH9o4WZM+=PdS^IW>RC46xb6U@drV?#+Clhkm$P<*um)%)~4v<sS0fKyBSLTuEZH_
z1K*?2mMK4`x<92vctEPQeVaTaNgoRR{wuZZL%C*5ID)TjpWp>R>)%J)&gIfL(#umt
zR@?4lLL%DsB`HvUv{0mLRolMg!GEo`eIxfGFtmHQ7oHbZyT4G>i;W^)BV?FSb^gg}
zx4R!T2=weHUJJgWdUnG-KSIww_<`@EXYUMDCO!MB|8YJ0l+)=wD6}Y}o;}P$B+ZKH
z_3T4x)9Km2@I#aI?85u~IS<u5NzdMRU)nh@NzY!w(G-7@dz23tMn5^#^<S@Nch>fq
zm9YPuo<02D|NrUPzu*v1SkIPoL!Mx6mgeU;v$px))3c9bFTB@||4lvnh5`R(J$pxP
z);BVJ!sykvoE_D(8_)9e>_?{lR6Y9*4(BslwyI|@G%!C*&%SLz>w5Nd;(rD`yNqno
z>)F4%^gpO)pTZt@Z#avdJ(_QC7=-ogjW_yw_AOfldiHkd^z5&YT7E`7yXz@t8kOad
zj9T?;cekQd4?50QD5m|(wCbx*&Zt$t{yntn8*hkc)tuXOJiT#0@ijX87^jaone@ie
zUt7I#Fk7r6dgJNz)PJ?!_%u|LP67J<dgJbQ1>Jl>+N}Pii=OrfR=2cT)y$AAo2pf@
zM8|*$7K_k;Jfj&@p`&SkHI@w&fy{Z}7r~%KwsUUd+Z(h+B5VdLo;%X*5)!O<I)u2d
z_E$O?tfe-;MiC}iyk<FmF?kQc*0IPy?JveYN^ZVR;;@|!jM~nM#JD_=jl9)U)5WS~
ztzX8N(zG#ZbCav~O06AD%+CG9nkQ>{7*Ex%^WN=QYRMX?maKtd$tts!tkKxwP%P}K
z7_}R0SMNF!;pw+54gEK)b9fds!E-lb4(&pZ@a5UNjZH1#{DpHh9=n#aRd@02^?aVY
zgnI_(IPt7rG500)w#92RZ8=8FiQNQ)Id;LLTeKT7la}YyEIwZsIy^wNFeU?<g^oh8
zA$C*DcN5HaF$*2n>&O$^*AHLpc!hH>UUU98g|K`%xg*O^=@vUCd|w;-Xa-t(8@gK8
zAq=&p%OtB{p4I$X&f0k7A+z}<e0%r|&*r_Z@@MlmHuqE#5v%!+oXx9b1gEh=qxx1_
z_0d?(E8!`lC`g1xnax@J(KQgUkt?KUBX56O%4}XK@M<If^^pOa|7o-N=*%|q#^Zj{
zZ2sKu%xpf|*vOll^LVdD{u-U%i;oj>;$)h}Pn~F|@pGR2e{UKee@oE6|NYbWnCO_U
zsMVb|qh!5nxO6yfxpfDL%a}b(2i&2IgM_nouVBQoOys=8w>M(-cup{tkHPXEoyrd)
z#Lexav?3=%M#Y*t36RX+qhu-3E_`jVLO>xV#r60#p0T(JODIC(VQk>r{7p|?BkM%8
zS7k<Au8dT^)gDU;m0s1GSJD<4_lHI&krFEl92TGbCm<MLm7MUtH3P7U2Ap(G&4ww4
zqQ$m5NGA1*#4=TxrP)oB_Z9Vk5OPgfZ2Ar@2S~tPfLgvHZa>1xL$bqgPj={MWruri
zRK2fX7H}MNl*#N+oy-mu-d$nEh@CuXL4_olOX)XX5X#heBM2qOw$fVJ%TwMu9?~`j
z1GWl6uisz<p)@TJL5TJt3ysnpLZgs{Mp{{DWysb)=D$T2ViK@hbp+jTNpbdstZ`Hh
z!qxSE_XVzY6Ptkhf$^aDJ6CZe#hU{6<a?GJQL+0#*p96kHZN0pltuWEID}9c-v3c(
z#G!cYJb+18gyXv{lOV4my*I-BJ#To_E|JblmqXbSV};yX60mj18<o@c6M4+5fE-S+
z*<CEz(L#L|q$tbn$u~><&}5Om3sODXQfp78)}BJGds=EOp|8n_!{_XB{^8=+F?$5K
z`rj14uHgvBe@^_`(JP()6Y;AZ-yZFS#jpEoeevrQUbhjd{CA08D~@0wQN32hugkfS
zBWa65Abx#%NH9JB%fzpPsb+>P3g5?=GI9=VgMr|SUtQM|z#r$13e_vy7X14aIH8kG
zs2nkBa=&2S0zv6-VgT}Wo|7?<g?~<h4DL{ny%5Y;-IZyn5+`4ds&t<|%tIoFlhZtt
zliiRYTh7O^SK@8zP<kH+L+!I21A(0AK?1}HT_E1QS0~r*a>azm87=!VH%6Wgzg14}
ztL8s#2a&?_>I4D0SE2znv1Q8&Z<m6xNBA#Vvo|f9bew&d%pThjGdZf!bCQ3og_zte
z(}r-Qr7tlF=XqYafr)0<I#1(EI1T)szW5X^?CWV<NFt{-ayc4vu%E{ZdIse48Du=h
z4_pb)DrCFFbkfUTqcc-{KWr1A99Zy}Kf4p1OZfH%ptm@&C)vt~+YHkFS2h9G?;Nz_
zf0Hq9D*8DXvueLGh{}XS#8WCB+)C?Kh|5@OZEx8WuP&BNPvG05k}#WYSL3tke|-9r
z+4K+ETh?P_z@{_Wyx-?h%Oo}}1KsQ-s~G-svFTQJlFbM0KY>l(eK8}P8rz*@P0kgc
z5Fj1sB*fR~Txy(|#yQtGXNi+Zb?$wPRh{?ax`&7bTpss>N&ffloO+IygN@YvQL?)B
zy>?C&UlDZre?WEKR%eu!-Hemo5Pm_5A>8a9l&$%U<3j0v_tc|ICo+(`#oWzYiKqA1
zy`i4uivy<Z;Vxe!5Zv>-6St({iR>fiTeQb+SvJ<(7GQ!5J<RT7v|cT|d0ReyS~uKs
zx!(=(8odK1U9WzR#fYhC>!AtrLs3Z^*x27~%x=-sCEt0lO^<GEyXXmefId_weILFp
zeJCBpoXt^zSs(vIBgpDb!L%(#kmvdK7;>pum|#0-5d}7v(>cBoL_>NL;+7p5HiF0w
zdXp?(^NIM4K_q<C#yfY1l_q1XoLnl;7%L~21~u$N_U?rTQwE=G=;fzQ!c@+Z{i0cy
znN!6j*f@vR>NN!79b_*|C}}J&FvqzX%eO;6cieNu5HoFS&8o4yqluK9`m+_3{9CmH
ztgO`?CusT{TN)+H)+7C6OCN=L?Y~Ufw|coa=@flP;;)4PiHKT%FW(-C6uQeFm4%OS
zyoTexq24OIjn2XR;tUnX7SX&t<Pz4reL|6acd&^*F}H>D1I!%u7+e$Kg2+Cp=YD4J
zlvg^v-x_6Z0O8*Dy6NFEjpDAh2XlJ5bGls2Dhp==(i;}wi0ybV{6l1vOdztWxzQOW
zAZCx9Gz0TbZ)+~t4J|;X?=+T#*Qh(h_G2vx9d-=5=YLaR9kIjDA+Y|~g`EH6EQ6=W
zh$Z1kzCCgei>RlZ?~ABMzyFg()E~5vbICBn^jftf44a)Iq6U_Py9W5v<WJm|(aJ*3
zw?luDh}!l%cn1T)S`wJ+a+;it?-3~M!YNp*9Ogc8>ShpR^y>+CbBRE^8oAc`Dg!ZB
z9Hz^hOmgcvl~!(@_0a!&a_i(-0VVt|%dHO`YCG`(E~kU_%L|b4nx9#^9CERbtp7Kp
z%So~zfR-?gt8V4CM=rk2t3=$A%kRdE@~>PLSIq;sl{z?w7oVWB{;>?agmYnDz){EW
zeLCL(N5!he33MxCa>`z%0zDdCL|)D8CT2@Tg?8@o?v1?kfqXDdi*K$LXb~{S2NQa{
zW~|MlgeAAb0*I&xicyZEvb1Eh%^*#*2%%NNfH3n{P21Dm$Q5C#485eD6jdh&*ec1=
zh^A{;bX0q<$dhGJ(RAW;L{n4q)Pl|V+%hEAj1Zi!Bu^{ImU)6K9u;J}pAiVMgc(7W
zwVfvS430y#lB+bpF5DI2A1!F5_jR4?bM8kni&^7U#2qh^+3~)JEB9D=ipiv9dL{L&
zkI9U6LanP{qCzx-3c5v1l$E^yG8sakoC?-^<YwpP-iO@myx9BbVDDxYC@yy1;DvLs
z^E%JZ#m=id|JEd4<9*1@&NfExLAFKc#m;(J825;_a-H)#2iC5_fSPxPHNp<v^8Zoy
zHgI-MSKt4cWG+Tb%+QREbP|KXkVpohgW!b0p~29oDJemuQK7*M@lpvhsT@Z%cZ+Iy
zREuh<>Wi01$>hzPRNq3CXq9l&Uego3(^eUT{J+1o_jR4?%uIsk|GDqydFJz(bM2S4
z_g;JLwbx#I?YC#lw#(5>ZeNb)Uz_P6wiIn<F?xnANs9nQZWnJWq{!{J5fZ+_1BEd8
z2{1X!%CjOCW?7kz=hu~6eNr*`QALP>%#<F{xlHpVS?nANgU!gSJJiDGb(aiVtbx=v
zq&PmVJ$Unce8*Luk54SQO+lDe`*Y?I9}fyqt9IHfAD{ZA&GGR)?6C~r{-H^FdsKdu
zGNKvs;p4Elm;dxomW)#c#kC~(I%9mzR1kq?yuBmUaJ-$EzMT;B_E!?T{eRi?O|~09
zchiU6NNQ-arto!ZwY%Tz*J=-T4z1Pxm2(1-mdo5ZcpiTwlWnb*$zbm(FqS4ydmHDm
zbuF6NA4mk;$!52Mk2GE#Yd*UGLt<f{c&*jlU*f__Z6djOix0d=OD%5Sqopc^;ChE>
znzwhq1!CWB7Zs;@?*8f|wl>vss3)d+{c}o8_4-G-RcOuQj{T#b>J0|MRIj=x*i#?{
zzY(>WIp03E<i8JdzOjDJ_bS+G&bPP2OsmJy)s(jo1(UitADV9ILOgA;*~ZP>;~V!2
z&Y{K~woPf{zFRR!<8HmV#trE*u5sJ8O*Zc1g!gaUyW+6YrpwK{l?gfr<F6j9=|8+-
zZ{=pLX#Rf078}(j>HV9<H|my~qsdRf2WgJilFjk)7xS;*x=8Q;H>cpMIcV^IZZZG3
zsC33HO~DVw9|@=A6#SL*;wkuFdG}C#<bP^0f9U>xP^8yJD${_yl-($({Z@&JQ}A8)
zj^`5peN*r&_WS=e1)n#QsWUY!PQf$Tcd{EY*%1vhm<rf^i51f`iQ7Y(c^Rszn`P&I
z`apR@hWo6ULtut&t&oGEztuwOanve=-OuTIT_V%8xh$%>wF+PM3~x)hd*PnS4CNl(
z+^|fxB9l9gd^7rzZH97=Bi9TUf}BjIt@V~CiI*kro6`XY)BxZC7fN>9q+M7AZiJvw
zwAz&-O_l|uXy%@d^4%F{Q|&=`(r4}bP~w`SEEn5~G+a<x-VoMtiy4}%>NHwXtbE2H
z><nCZq8GgYY47%<<qbR)FZW21u5Mv#nZBbBTJe>mG+xw|8SZuca7P)0q=Mu&J8D&2
zicn1IpcR+&TZ`%Vu7F2!<IntMbI5sC!$_C&$d8-zrTugMzG_#e5pCpEr&e`Ob~Py%
z2`jR{MJrp*b~nMO^s4SP0wESeodWha0=KGrgx$t65@J+!o1*Sx?;y4?D$bVO_ffWA
zBHP|P(Y74Y6MXL(7?wL|^^ta-i8r(*)uLuv4}qdrLi|-Tyn~SnzZckWcQ|6iHeK?y
zHEvd_4v!%Z1(FEzN3q<C8jQs_O$DzYF)gUQk3M9f3u&SSvGVF%2jm&+Hj?GZLOi6-
zC9yGqo0v%5kPFV>+`vJ&E*+K&PR4Da<jc3Q_a2v`(eyF*JkqZ(Jf2x*KD_&)qByzA
z2t?L)U90wU!X8=&BdE4>Sp{yH4s{{fA-c{sr@N@_&VOb@x{ubYF;grHw^5varOx6m
zA#;tkZnoA}xR;TuRI;tZ?PN!xp6WL0T9}5;u-r5pJ-}Es|0qV=Xntt@Wss&(W>UH)
zZi?DPGyJfj!JlOm{`A#+_~e9*o1mbzV>qYfBQ)FC%`{spi6KX#+0JnxAG6u+-843C
zw%c%%r`<cqx3Tx8%{SW{UoJM=`I~JvM|o>UNLowx6Ymrl8xt`U<ytt)6}$?su;v>|
zC-ds^cnaHcD}An{mDp6ZYMy!!g0Wqcm-L11X_d}*j=l=8hLFShiyX$>XpwUT*Y4qG
z`|m7E$HdpJ(Uzw-97;p)!qvn~e6J?SOb<F;UpnB`aR*!qBmmPCVI6Rq>wxd@1SBMw
zNu_;ACD{=&9gdu49q?+1H_dlIz^22vGhN4<nhRd%Q~(`ssyf~axJfyca@tf5z%%i;
z_3lC8c-qtfYh4GNHrsW;-7bt<va0JH?FA?MS_7txxD%$u#A(+F=ir<JJ3pe8H=t=J
zdZF6Obwe+leobZ`@&-YIN%7(%q1St#6-U0d<*N-{iLBfmSIVzBYX1w^cRhvYwR{=z
zoj&JfY<;sWnMg=1sUUZs_@5XeEFn3xWm|2Pv_iSj^`TR22vidMlZ6=HjJ~~k5hej-
zksdP*_u$h+#~;dAxx8;{SU~T<%}uorBTf4@WMEe%x0mB`5eJA|l3|l+e8?-BG%6eE
z5L_~~4F7EBe}qYkyt4}X50WS@o6D5rMBox7qL_^GsdjJN>`42&NLXo>+g^M*{53`U
z<3V^IK-)<(n<o@;Lc<C^ty;faZs>4RwJyBAhclstF&_fl<bme^Tm)5qj%j6^^o8M?
z>;mmDPkIb7U^v;By=uNjNV?mUR0q?;QU7XV_h4zg4ugSwrF*((!qFyRHvOKeWo#MT
z#O^Sl$Tj109iwrVl3}lWSl!6oOSE#zMu0Yr08`xv(B?0mTg9BtvSnPJSG-FWPMu)Z
zsd^F@trrqurDMTYH5Sy4?mreh#z~5>ooifSo5SH3lSO=O2&YwwL$~Z?M3{^+$<gE_
z$K>K2us-BW7cznBH^oDDQ&DnE5cfHHkIe=5zhjbPtR%;GaKmh4DF=dBztwq(#$L9S
zsu7bzcO*G_&r3*-dBB-0Fks4vB}ctTq7gV62kI|%FUyGh|FMU^`bzVS1Q=zLj-O~y
z;P&;5c#;z?2nobkG&t-47R3g%A$)A<5PoRM;IK#oL!a{Q%cYzAX3^w>6&s+zMrxBP
z>>#KO5^A8c0itd+o(f3^J8isFr%E>BdhN3QdS#DG$sq!+q+Y!mt*a+kp%2?t7wgMk
zPw+6VP5IzKAHe0>Kl08ZT8v%mB82$%DWx(G?Pv%)R^=?YPm_?>gx<wMPp-bpcJ%}z
zU>z**8qKqr`!hS&(|Z}<+#}bTnWAXv1I`*BYgIm9V-lvgr@pPN&F&7(vG|X{A5D2V
z4uOupAoyK=tdiKU>vQaVifp7;kBdxn+K@1=pS4W=$X};fj!|>I9=V}slpp7=w2RW(
zfz$qJp$W%ybW>D$s^jyy;b)vJL<g1uIU1Z=m_;l^wi`Rp`cd-NJZGHQ#l~qC5t+<(
zf#o1J%(@B|i|k@3Bjqvea74s3bEgsc7;9TtJ0GrppE(+QXS$JvT*R?00vf_cz7ZRc
ztGZr-DB;&XsrOp_;-Q`%awhPa-DowEREtfjOP6wPJ6Dfcuu&uz9B~%*2owC(Zo5%@
zuccq9;gMUn<p{_22;89KvqcLxVQ!_yWbI0OxzxI6J`8zU&7;*m%xv1duM6Gt{-YS4
zmegRb3h{Wr7d*?|Et$&!1ocK;nl~uGogToJCfc_VxqGi8Om)@On>0r`mUL~VD_pF6
z?MfrJ@ulo(X477c_+7Yb8d48l$TzQbW=e;j*G<GTE`W|?3`|J5*Eg=6Zlj)>-fnts
zbp45@kNb}t)u1K8s(TDC+{HChzdN1Q79l2kh>vvB;b#vY?54v*<IsLL9qtOk{&r;}
zkuggoT?32U!cB*3>K(;h<KyXn)8T_jfbR()#UIqMZGdczcx`1Q4<D1OCwPX>Cc6UJ
zTF5;ByZ-Dl{|dO0ckA)Za4lhERIzf>sgphzzbD(L?6Z&COI_0$RLtm+$#yk_MC`jv
z&uz&h3>&U}SzXM%z1`E*peJRJby0NhQBs;7bzb$z`~Fkl?hWZ18s-74#0&Jzb;bTQ
z-f!W=s}&W0D_;a!mDAT+6G7X#peczU)()lBwIzaBLR8SyM9{V@5;Bs-c@M+Sa25Nt
zq8KLpT2x#Y`)ysZ7;Q_7Yok~jU8Yq%dXv$LL1=n+YX>j<UFW!{l@RrqDSXp>+xRx~
zoywPIW?3w3LD<!|=$+Y?>~z%7S&S)l4K3U%HmwD=pZ-|0=t3u4O}5?jcoy@Y3OAwa
zCy9Q*s~?5v%SbBJBciXCe_>aHh0_Q>@bUT<8)2rB_#od1oL`B9d?U<G1o=j2PXxt{
z;4_LF!TaMz@cy_F%wKE-?=7!-)EYrvYlJxwHE8^+Tq6uQ%sTi?-w3mOBh2=V(Ebq`
zVU8N%s>hBLU1)^bOG_Hz3Y#<CU_2`_il>uzlK<D4dezPCir&fh90oz(Rc`H>r|wxc
zqtgYTG`T)D;}93%73(`utg9Yz{Z4NNhm?}MP56GQ$<t<i1iLqbC!I0r%y{kE&F!gb
z<;OiheHVuTBAq3J&hicXk<NnHPTqy`IZaRrDc*(BLP+?lf7qzt4^Y<%$gNIen6)*#
zs;>7@+M{L1f6DCu5F_J|I_Ug5LjB978b+(Sb_9SiAx%v+CT#u)^=|>t2zFelrqn1+
zi4{AJP=6l?l%B~Pq5k$}fVXg{I6gw%%;-7slFc8X?%1JlIG9e{i;0WAFsCLLvPY%;
zY+To`xFghlWISK8132`uEgYX7C2bvgr2Y>dpJv1LmMU`x%qivXV;-M=7Q?UAj&bY%
z(j|GuVCkZ=*zl>PB}{wQH~cymkHNd+!+V`WtF}`L#qOki)-Cv>?)2YteEPG0=Mkml
zPLmsW0Q+MfpFUFAwG@v}zwyR<|9i)$QS`mGrxyrxnv<g_%eLXENbz$x4q9qHGPnJ_
za5nUdC8#MLVHMHg2_I;HB606%(u9{Mz$Q4b@RNk^2^c3WUpa;aMz|Dh4f6*we6d<-
z(=#rI7jXmhcoOK+A`ngWLJLiWNIGjG+fwf45CUkUZr5Z<B6+nl*<M~u0rES~Xy03(
zquY1W=iK%>eU56c(dVr8?ev+{e}`Gs{0=&`qK<CYGtoQGU~__qQ_%d3)E0QI3oI*q
z!e^q-S@yu|=pnA|>vyE?W8QZp8Xf77j0DVBjSe&Nsh??nvg&aO){X<0yoqdHI*rk&
z`{+qWwuTcSNpwn9Z~g&RmJ6PF4C9A0eDPR8foI{Cm4p~oDXo^BxYw-z33*T;C-?pC
z!V)D@<F>s-Fc}9rh^93#S6Y3k*#$XWaY;SCr4~X93~zH*$}~L(b0XAVtqRGj=hCW{
zqSrYu+cWT@Bj7dXn#@9%Bln0*%Kl>#JHMV@vTn}tsioEY(7c9z`2GQmrXDgbHgzn;
zf?i~ooe)8YE9QPq&n@?KmCpmqeWRE-?W#;k+V-iLh5nsW3~Ns>(WEwpefJnHM(%5H
zhR6LuU3(MjF55*@vU=%}8N!-l@LvHAR+9@A0+mZcX>+Q5>tEDSCmwZf;M3j2Px$W%
zj4G3XSa?%|5Y3=wPRjoB*zB5EyICw?8DSkIZa+uU2Fq`_m8;4QhY}Qq8S*Am36qM*
zt_PYTqK5Bh|4TGI_*=WzfA-vSI%w>Mi_bmc%MzrGUv7ul_cm!-O%{@-b^2l%T7t0E
z`wDfUUA4HSerf$sJub)+*Y?J%+7R5%3wTT!X>OfV>j@T-4y}qJldHN{s)ajwyoL_&
zWgw&~xxN9X>U=hqkda2??$qT_?pIVxk5W0~P+-I%|82wZ*nG0V1hU{AMt<#q$OXa9
zILW$}k9CGPdjf|NNZKIeiNiRyIQ5OH+}lgNX>XQ7ky_3+{nbgJjg1Yny~O0w9l=fY
z{~7ETKT7taf$2_g>3Y%?kfP?fBlbyk?@UswhTc-FS*f6OGKex`9=o3bE|S0#fWBGK
zXC|R*u2s-E#h{*GH{?Q@qZdzm)SM-NxkUi>`7ee>;EHCz^0z9fs@#l$K@9H|-}kUI
z8Jdv<`)Gvvf|)6bgjzts%00_|w=EHBcbCo+>VZk%TuP{KD`-)%8iqHoS*bJS!)x~{
zCDbfImlEpp3MwJgyS%fNAXKveN(l7~00Rj%3l(uogmUbh;Nh+5{Ve?MkP9A2?}Lb`
z8epmz(fxC37QQt8y-nS}k?UDp#=p7XB#=;VIbL6lBB6x(IxQHkmB8+U1gQc_4NmPf
z7>fN=(_SXslY!+$m#Rm0sCwiXMvV+D-e)b|m!Sr0ZSP#ilj?)6b#1vIS2GSYJzw;6
zZ%ELb;%Y_m!slVE3J+DQf_S#M+@wARfS&Fhu1NCu%ZIz{YCG3eu>wwK{v`2*VDV0T
zXuYU6fL*O&SDVpRj$05a9p9v&?~uM*urZ*s%Xp47Jw~0E@q3dn^xqL841SYmj$ITI
z6&Nns-&CqPgic-R@?ndci0pk#5XiX^kh5-S*^G*L(b%-hJ_cS3cx~$P8pXqSg|Y9c
z%<6qfSD1}9P@Zbvmbek_$=@9;q~p|L$YcjI+(K4s8~liZPw-#z6bm0Rqaqy@emBJs
z>kF??iENV6U?3!B5Q~%c6=AMfzd%tz{lk)qU=!?!t5?KxO!+BD8D6}vn9>b)7iF^R
zmduIb)t`1{4>W;N*$ldUToL+6N}u!EHD|oU_bL+E;4nv7RLJ8D)fbULB)N9T2a6t}
zs}Y+EuE$jv?+`gqi1aoUvj%bo@#sT9P7|b)_{^|Xr<Jk&tWnch`a+xfLaX{hM&~Ee
ziLtJ$L33V)yRL>xif$8bxD5^O?&GUJg>P_9<NH>bU$8@&0wa(1%&!p($uk^}DL(R4
z;#n5Ouxmby-0YgC2f7s7_}%nMz+!>V7PCrA)uTQEmMuJVTvFsJ)PLJD3%eSs!Mr6q
zwV}Di*-Lm`rv*N!m(7amS5teLtd7d|9+h3Uv^CM6!k@wvQ5H+@a53TJF$7|3Qf)Jx
zkGon|bp;e71BeCF{PXux+9@pd+pR30+iGh!zRC{pOC<$%k!2BLQtmPtq%aYb<VS1^
z2*ILt23^Inr8X7vqjpKniADE8^edra4by&*;FV1#cY{kuwu*}3w-I~<bkLdsvXm7b
zmQe*^#cQ#^BWBujI$P~If<j6vy{-h2k)R~LNwr%BE-xrE4AyiUr6R;)NiFPl5&fD~
zVozrd`X6CgL{cWzULk!ko$9Fc`1QVO<aaFi{~|m8Aj!_J8cVt!5wr7G8X@;Uc7CE?
z%RaIPU<+e*zHVrOov-n*#?Av-`7&f$l9ji}niuZ<o->@FW&Uro;pf#w<NmN2HvC}g
zEwW(^h?KJ7DVgl+(F%knh_$R6WU^1xV(Q6cAFj5~%@usI3(NUU$kC%#v+Yzv!OHyn
ziA1$Qu-tqBbuLTmQO}UKu;(}8XC7F_f0g|&M=~s5SDx8xRc4`^6jo)Tu<ZPL!1ME)
z`K2Pr-}y~AanT{?3mF8ZI2Pd;c_o6^6}=L|$k8ZPVi*A(d1dcjUG&P_y{za(93z?|
zSOoHh$mc|I9O;B|6f3cOvk`3J{AFmzS~x&1PuF6?RLN!bw(7VOiwTUyNaqSRUmTTv
z=cw$4Qpx<uJ;jceN37}Z^ERY6`gT4cDq|XbN#yWgeO`Xwuscb!My*We6GpVEu5UTI
ziKdx_3q@3uuzn=IMN{CMQJn1w<++>HbOfle{U(@80C7#4Svb3#S}Nlx4cmdU|BR*Y
zm2^X&Mdyn0%t33M1~JU>hHpVj&Ny(Rx~H#!M5#23mbapcvQ5Nzjq(haoMXe>e8-ge
z@Mw}an&gZ!ne2<1+$pPz^0ub1ox;vx&vHJz2+YDdBkj3s(S%Z`PntUE3o^(5vM7WX
zBfk6T4YXKGg56nJ0mf#@GsWsmi@yy0{%?|^cOsKMx>At3vZ!Q-w>PLox*G1>hQ*Sd
zsov5y7ad+~ZAA>3$MSX5ZellW`eSIBmTKQY)G!r&nn?a*ldJ3oTf%O`q9Nt=qr`Dq
z83g8~7R)3oWIveg!|YVp{{Iq(K~>4+*_nmcr%(#~@=cF+alK3?#B;O^!x3?4L@i2?
zaamonyp}-Ezdu)jjOq)(LVq|H;go1W+x{|p-7*VZ%?iv@a8diEQI|Ss*U~yplJYf8
zLTk2}h*YzPdB36xAF9eawwEG4QzZ&BBgt)aP~0=69Eg#M%o>DqMf_`4i3h!MpqurY
z#E;Aw<4vI1$_BC>E9MKwzloUTJ#HT59@4%?;pj}RvO)MEil(|96Qq1ebbbX$T54=z
z*UiJsmXHAk1jo`tnohS<`~4B1LudzxL*U1>QxXBDdI*TY5cu{x5dxcsX=gR96oJ@2
zlM5Dc={xh4Pcq}veek(pF2C9Qrf0H22d?mG=~kd#q3V8_rH$}K)T~_4W?<p+dZMF=
zZ1`7RoJ3nS!_?M`kA;?nL*v9(9ZKRKZYXZ0F%z5RJB!I<_*Xb5oLR}w^R#>}c+2i@
z_mfUqi`Bdd4Po9GFduH5gxzpi8Au%`PN06Z;r%{t9dR5vP|3wNq@O&ZEEQ%A!c<b4
z@Hy4#?jv2lVT%Q2nPp6ck+w4C!1u(homhEe!l`R=sbR4S%@D%OKQUak51Tp5!u&9y
zn=QtAjpDm`(lHfYAw;4av+uI0isee+85a}q4*{is3No-{cSXtkapY=O$l}IdaCwYu
zfE}&fa);ZDw)vf%Bt2BOFLCqLr)0ak^O3PB2lCd=?`<mVlKsQ6*;QSC>KNt%U!kUx
z(L2uhgJ|;&BvCH7fFzxLo7xYeTUVw!cFF~(6SDN|Nt$*nw!E(xMP4J>FQkZb5)o%9
zLU%{5s*cVVH@a!)97JGvHpP*(aZJZomVTYE?wb^Gke7j`Uh~SiSgPYp*9Q<1)!H*n
ztLMYnR21`uTXFt`1W2`l-=T8Z;4Y@%G5<XWB>e8?=QZ7nRm`iP7cQi%Lir+xrtLjx
zOAJj2zkQb_P=0Wi1j>_h!Qn2$BQ+IIgH)_sOi3e4Yh(`~YUw(P12IRgoRF4wmk*~2
zgKdQYRD$XBYHqo0Ou=Njl3GAImIJveq`UkoFm3{#pb8f>LP4YApljCu01OhyyA2<x
zlF+49b_JqS;YJltS%ipOxEM6(D{@Vft6r{|ay7~|TdpR#=E&8Y$wix5&@pi@AXCBx
zP}jNc-#D>aTSKgHgtJn=I+B|Hl%k2R^av&6XAn;gl@j8&k|HU@mk8r)R;hL?KfCX;
zs_#|pOD-Ex{`yGL=MF&C<J_3pW{p|m?FLe1ciuAX#D~(iI5Jr$ZZ3*{@}Nl79+(w%
zlta!|?M8*%#PJxcc9mwJ#fYY=6w*py(H%r*ktg;5uT|Lw+HW4_go?qOBp5RhR`;;d
zV8dFc+X7axBvlQ|)ZfoCRD;@bUyxiZZ`8)*fTZabSUBxHDUa4r?0XXq6<&yq^ms?R
zz(&M1I*v3B>A;0a%1Ml6`*c2ws@J^#GcD8Nme{9UC+3RruYXAVZw8BRmQb4^;!3I+
zJ1o)KM%+CPfGR9BrnsXXJnHnwbcJCd-K5%%SOvg?PqPh})g|ZjoT#)BvAn?v@;fFg
z!%=4nn__0U5p3e5V!zMi$~hC14}Wt!V4a8~M}-JW5rgr4c(qlAj2%U|9(U8zMiXfb
zr8xK`qyGI<(Jw~7SYol1zHEC#g{SxMhYcQjYebi+r=$b}&17{R(VAz}9T9kjoME&I
zU!N%VW)TKLbM}q{jGLi${t#2_$~Q;qZ!@(ro{q@flzq?TnymzrshiFC!bHYUnEV?O
z)Q_9;;9~wLKoV!+g*7aOAp12&RdszwZJi6A?i+)c48HUe3GU!m&Ntopo^-x5oUhyY
z+MMq(=R4W?e(rpeo$mqXJKFi~b-uLoeb@O8cD~!3Z-VpP?0n<!_3D0)ZjCu%H)6`0
zaI3m*cUWKPARl_ru<mfaA3NWdo$m+Ecb@Zo&-u=AzT2Je3(j|o^PTE^i=6Ky=eyqd
zKI42{&UcjaUG02_JKr39(P{A@k~!|eD8xS7@Zd-!_NZk)c0**Nx}D^h+w;8X_mP>}
z7GN`4K{(D!JwFy?Y%G9j)aYr&HD$8&F&v0j>rD#BRo$I>9G&F9q`VNDiR{ardJi66
za54^r%IScg1|d2IPO`9`z3FKbV_O$3oK9e!hB4)LIPxKrOIK)BrJ_U9KaOf3DwnP%
zqI`g<a)%_~7XU1bv^6=G>5CvqGPfYtu_&Tk<H}Pc0Ggp3S8T+yhTNz{4?sUiSFagT
zqq4>VAbAtf?=p)}ZK{)|`i^GA5J~E-p2?Wg6$3cZ$c7;X=-TdP4Gs-EzPIVvZ11tz
zwU0d{#$$WlV#2#o$o&HLpP2U<%0&`4pZ*0m;pmTgaMW94Qk&L9>jjfxhTRC+VrBLe
zVl<a&(A9RxSlWW~GZ<C(E8O*UhE~~ST>F0UM~>kt)X2VlEmcv<hC8CbyXH7vV>fcJ
za3BRskG7WA{@Yxewvoj_`w=8&aPzWzF{O0Q!jz1fUYRlx)3Ma0-PWnllK*bahS~L8
zk_J1zDbXVa4nAQ{Yl5K4yJ?1CTkmG<4Yu}f8Zfx+UrK6fL-0-SMqdiP;oWFV!PmSy
zjXUSv8QkCT`LyD`&AZ!hf783C;r@nq&&2&T@1E_dGn;zTJ?6jysoq=ofhcom58M4T
zBva;Ip;+j5K;Z3MHqQ>O*Yw<{hS1UVnw8E;gVro_PMWOd33H}t-e3vN56w6P)dWLn
zBhTEjLJgg3j@n_)5L;ZVntvLzJ*E;IE~^f|grcOK3rW7gzXK;;hEV31s-rwV9}phK
zqHr`<X#Zp`cy3qCTsuA)p71L3+aQm(Ff1SZf^R)^Fr^2bQOc<s>R|<VutF?R)-mQ9
zSW?!{j$Irf4^Wz>nxj%nDju4Rnu3Ipy0Bq;)3;40s#vN7Zp+qvR058zSjpVR@1<~^
zmNYM-;u$w9&Iz~fMzRn0rvr;myzaKJ)jBw|hPjN}THzW~MQIink|spTUJPQM2#zR(
zt~=S^tdso$PUEPz<hgXKp9fcDTU$X1)sL>&r%28?wH6N(DI^qXALWcwD+2N(o^dKt
zK;0kY5^_Cs%R4bSI+ry{l-G8QjF4y0Va?kB5c3h?s3bn4N^S>F7{Xv?(~3_9(vc6U
z<-^0Ppt)#i#BffCk(liP1}_wfbNLTwD@&sEf5zi&8XbT3ts2uXlTTL=Z_s@i-=2Mj
zlkEktxruA6K48TJ4mO`|l^gCMuMpb2rUFB7gr&DNH$AnnFwHqXv|(WC4JmufXz*ia
zzm~ybLn@iI%?CC(3}TM3QOkJR@oh|o=iv9qv}0{T3&5LEn>e4OiAYTY7$f^o)Z9$x
z3Nkb{w^sS#@IhO}Sagsc^*Pi>qrC=U1QND8Xf{Gi(3CN1=)DqUxY1wS)W_DtQTjVq
z`3EVijm3kg7%zT*po(F+4;<kUtz-9~p^(RKjL~W8y33d{1=o^;t`*pd+Kw%pMaUc<
z!v3XTy34=L%}cV_-Vvdv3LqD>I=J?|a8Hywn;1)L_A?-(V6}=CkEjT+Yc?U4s74R~
ztRCfxc}T_NgZ1}VA}4=Dt!dLU@ktjZ`q%<;!RKdGP%s7n?Ls@u29RbIg)e<U?=43w
zxMi(f^mFvkW02#SZhnrvlAq&l=I1lZ_?fJ*<45pw!oT=A@h{=+Sa>6izI`<1tb}G%
zeL6Vdd&2q7z*jgJ|L%WJ>K}stmxGw#;NNh*af0^;$5())6cn`8$!M7iry}f}X~WF1
zyZ+5AofF{o38@ZFN86Ar(Gje<TR1p>bvF2A0nE%x7vE#O-+Em*SGgUgZol*o$*eN6
z?vzYlFXgK6DkjZ`aWp%VeRb(vFeBN?|FC&frS7K)rdpZ7Df-Z{ZeA8?WwaV5ru|1m
zcAh_}H*~I=hE8Il1wP#%-VU|BVx6w1Tx-LbDRT7#*nfnT^O4#Ajk`9_{*9DhqTpHw
z<Bm*d<uu#y-otGI?W_nfKZ+5p?>lb%0OMEGr7FTsOuHqFai7Sa4NeCWn*DC)I|X0i
z)A%db_h*bhI*2h2{#obSUGUx_6NC%V87a{WV;IpAJnwd2R;MQ&-2$JE5SQ1Vb-{UJ
z@`hQ{FTRv-<GA)OUO^=2m`*P1mF+q7%XvF+w^$_ou=#B&w@p5WboWUuUoo1JX`_l<
z&0mNxDm<3n_M)P#WBMo{pdgHx51#-$LVKs~im#Bv>D#ac?HIXE!sWDK2&z4tF^@dD
zt?@|4CePic3AknJqLJ6r;fU@pDrT56yjHGyV7k95*IO0uZF1(gZ_E4F%6J}Is(v{l
zZq}3twXo4+$oV0;bl<P6ZV>xs(VTSwO=SHSOrcFS3p4&$2T}FAK_fQU(vP9^(mc5+
zZs;(JYv1026|yfOkQSLs_V~A_Vh|GlKqKMJN*x&qk$lzawAjsx?Xa91s=&Wofppqj
za9lVhwe(8~d-YGZvivK~Uo&0B=s0xWIhPKzCh5IF$#OOGYuOpM29&K&+J@4L71Vfj
zGU!YN%_|9-te~|eK?e=UYt$YD(fC?{sF-9$=&p$rbDyTUQ31cVa9YYuW9&6Ydagg5
zo#6hih77YqET)eJ=blrMl1-_eg}NpJ_d9I-bet1#o_p!|3vo8%?3gv{Fq{){j-P(+
zr8v`aUf3~f2JRNzvr^%=SW$|)gO|*YNav+7o0e!JS#0GyaWCEwu>Hk5x!A4L9{)i_
z)S8#T(}hpEh~bL(rjIyH%q{{5>Y^H1+=n;|?76gG9VMiAsIhdna2sG5X@Ry|8r8&>
zcb38beoAWw3JbiSK%4W&Weg{AaoT@RX5mdnBSX#Sbg6oh^}AmWEq0xgJqY&YK%pI<
zaDD7<Y7%zBt?01*XE)4JYIGw!wQ!yEN-}hv^dvGddbJ<y@_9)49Af#np0#~GSX<)~
z8xs@`&j)z|^yg+#;}X5RERk|p_ZnsP_j0X++)5HQ#WE<VD~U;x!sa+p?V45ME0Z_u
zYkYl-M0op{Tu_6PW|<+R|DhajC&%vcdAN3^b9YzCRjY2^>BKQ|EFq2?ZJFO>2yIzy
zT!vU4??rO$j9Ccck&cDB>y+0-@`}tU+b>m6w~4SDcS4em4Yz$)+}OTN_^LSu7<`5;
z7NvV%<EOhx`K<@@5Hp@h7EK3r6^~>>?=pVW?~Q`g@q3~}mW6alsYiB^)WCxL(pK7-
zXKQPtElQz#iam@R3(4NHE3~_WVpl+{xx%kenQZX%e~v+?{1w0Pl(v}FiwGf?)e&)4
zdxd*}aMbB`3}>Jb=Yy}30gAaV&TreKUo<8g^DFQaP0_qE7n}yX8Z_gr`(ZDMkqHx_
z!o*GOlMLS_yMnJ#K=oR<yHj-RYCPL0D_vmX(k~{Y=9Oh8HOHaf2pbBsVJa@A^FvG7
zb2FvPOq5ddA*GD^&{CE+3|^P>5~Vzt+Du)N*96MS9zH-56lwQG8=}xn5kJRmWy+%8
zC~<vBskWX=dcc4+Qch14-$e0_rxs?mQkFg^TUJVwQ$*YkU0`{3H!5q3$ENiLw`}iM
zT5PF@abPez{SL1AY_c)P&4}S+7}kn)p1IjN-=e}*kVc#la@q1nqSEIkDt*YNcQ;?@
z&ydx?N-N*NmX%)G)fHSpd?UK#om|b1lRF7P21k8jrA7^43r$rewJu$O347f33ExF#
zY_`gG`I23gHF!~6qQWy06+Z5REmZh4GAdR$v2<iwX~`^P!!EY06IJ%-RRbzZtsSHJ
zg`-f95R<#L@JCuYy1|vP*`=eGp%1m?e6(Mw`>0Dt`zJEaZGP!!ZZUt%$xd*sS97k<
zu2@e;V%s7={UT<(AqM$CU?230dV`3KAiU8=HkTh~>ro4lcK^#!$7T@~{o=m8g}84;
zai4X|lv5h)(##jZZ>^M!HMz9zEZ^we;zYB#5UxA>-}K=+nXtjTMey~`Ee;NaGW(DE
zuyMSp6Rt1j+8fsAupV7c8Gi?2Bg=GsOc>u}=C~nCBpPApGMGZ7jDtc1!&J5v1=_ja
z%(~0@6~4hNi7tG-zu-mTVODCURzITEQprCzR+O;gSv!}CoZW`^=f~p0Y~1;ta<&~-
zc}q#B2K;ZQ-3-XEc81P?{0~xZbFyn!W`<(Ks5`&5ZGZ9=SD9n-^%Th`QL$Eb19-2c
zfo+@ry?pmSNxCgc!N1j&NWllV`JMVFMg9OO_`8T|#?~KU0sX74jLk~H@}iV-`xQQ_
z6x=6~ac=Wc@NTp}2rem$6!hD_nB<gLLeZz|5kyRbrZ&`ek4B9P)9*0S=xUm^TEb3c
z-u?$mLr`bz;sva5M0>{M4*&4>yHc~0d&ZvnH^Y7K+JCTT%s^I<TXN5s1wOFx-Nc@;
zGv9xg>BUb;f@X^@F6(Jwmf7aPpCiw|&+N4_SF;EJ`DL-?5L<THvDp_UaWc0I@FlEi
zp)mX1N>`I%28`=v!mi)c{wbHuip)^0y5eDySnZ}lft6+?(qk5}vDmLYPGuvF5oJu@
z;6$k-w>kt~IrDxjc(`OyuFJgrLZ<8~)8?KJH@!>RPMMXXCqYV0W{Vdk=qh*kmA3}a
z^<wQC4Hhhdt_JcY5K7Y30#A7_N!P8RaxOT9B#y39(hDaGVMiPULVYecfcT};5}L-k
ze}gViX)5Cl(tR(BLuA;~<(yhCA|7LjBO-NkPl5RArDGG{;#(6nlRLbN%=>Z7t!!P*
z2KRl9ni<F<m?~K_3%n8<7Izu$Lp^iBWhBuAb6?-2%+^7RgHEv$6-)tS=~;=&4W)dy
zkduyf7gmHj+U8m9E1@cG$HPbHC$%)vp#3Bl9QwS?(l*b_bpU|tN8sh3iFrOYFK?ca
z&sOUW(z`zjBOj<vV2q3mtXQf^YWGy8$8MS$($llS5zlFwI+0&ZQ$0n+5XB`cRmW7B
zzI^J$qmSS`UCpl-Ix8qU%v#MT+y|Gv<`?DqX5`ab?T}I{%embS40$zsQ-TXY1(B-J
z=(vu%#}}~oc>%^h;9*!>3pATFE?w0l^Ska^Gd2N+``s#bPqAGNyUQqPhUGBmeD<1I
z{?(K?WOAx^AN&^C8Mb!zHC0`Q5Y`^OT=|nTA;G3~D$amMq<U?cGV)iXdN)WqMgH<s
z@4BRayHxL*q<>pyR0uzX;cLdBRo;qa3t^W3=v42WN%$R7y^E6mA*tSZNq=Rka7m)@
z0`rj=QymcYo*}8i<k-U#@rTEr>QrIB*aO(^v1fRyU@D^F^{KLgEkl~eS+9-W3tfxW
z(zHxZDXr=e<mCcap{hqlG%R4_btenW3E?|<EBf|yYl4YZJ1B0oKf{wMgMu?#Devr>
z<?Du)ttnephGWRW5pIjOQ0e_Cuq7>eCjqWSH(V37Xh}vx24*s=SRkB5fy-YVx^RTU
z&`SBtKmgE40PI}^XeEd8hO%V~E1#qRQ`uk5*lT5Wt-DRp$k+S6=gR(QseUDudlta(
z1xCdp2aWNBiAu>XU;aw@AZ2`OuriE>B_-%RYoDX5dD$~1^*Xs2A2r2btuUqt77?(N
zKEsLtQ9iWfz?OK`^Stq#TB095D~j=s0_0*OC|jMR@NGq~2%qv~y$WC1LZ#i}d!liC
zjY}IxOPR)^4v!h<E&Ehi0)@h-wopPb>d`fFV=YLCvg&;5zEd<*dr?=?^&-LDsM`o^
z4}#XS&~EsxrPkck6dbW&ERODSc07d*zauAvq~B1F!E;yQdguD~U?Vb6vC;3=?Om5I
zUW&0bwpC$L;jZFP39=5JG<fhPv{j5RW4Je7dkS6del6`v@(z!*a)V(2AjQpOq6Of0
zKX87edgr>b&JAVQb?dEI6?XM+d2T2loPV9FWy4f&H!e+?M!S>$GpW7ZKtNtUc6n)p
zaKlD$J0VzeMNdcQeE4vc-6t~w)pA6tor{0QLo>um&1_&DVC4|LBeHC%`fc|*X+29g
zAMVSnV3he(Pw*ZXnJi+2%7@SY27|1YGYZkDl@C`E22LX#PHfc;?)~amzeh>ZQbRCn
zG+!rh28#$mxC;{$0<Iyz)R@I8S~pTGqAY!{(^tv5rD2D+_s}4n&fbm`4}QXh@5%P|
z>x1pC4O3JhZtVM^fdvy%Zml}9ucWcRKmn@Q^udF7Fdp!OGPR(mMT4@&ZT>smo^m&+
zho@<VVod_oYg3WE{v>y%Ch{I(j3c~ilNSsg>XEI@YgkT&?`k3^AVv^dYB9olOSq@3
zFITTsxpJ*xxq?}~Y86|=qP-N0b7L&3mrOA-m?8Gj?fj6Kw`&s&0k#4OBk!(MpOl+k
z+$uy*`Ur?N!@h2hP}GanyQ@jAZrz}-dO4TyEKxPB1-rv1;K{!Z*N#bb^h18-YH9T<
z-cES0@95Q~9sNPl8J0`kW~_WTTKh<Zx9jLScBHnS83p_Hg>slzodug!Tqm}i`cRti
zO^&}=ej;`SoVnwBPAE7`yik|{9^p8Q%WTj2_qzfR2C9$;ILZ(WUQnEM;bft~3W6g!
zGERMS96fA)m&=FSrqe^X250_%s4i-Iqn;+1M!Uap;{aW465ufIdCQPbTHpHTFGa}U
z)0T@rZ=tNXaAg_y5nD!VbmDIQU@M<=jgq>ET!#Hs!MmM8*I1^DQmj^@=0oJ|7VGRL
zaTqZl-l;G!R5z9}OvlHta|S;o4>M-YfKfk4wO;`T^a)Pm)9_n~rAmF7bJn;$pUjw6
zW|sdaFX*h*?oW3?3^zco?-&dCc^?kWzOyph65VIFSAW2=XrH?%evzTa`NbHw;akLQ
z<Fy|Px8Hm?IJj-UW!xkY`*)6~&^j15E+Kz4PcR*aC_ZjAEu0TdvT&ojv-@^8Ent=K
zk?`G3k8Q6M?6ba$ki<n{mwXa-J@h#(C<-(u&`)^KWu>4QKxxHwza1m)S}I{p(SQ8)
zrcEyGiAu}ubyiGRnzoX(kx*}RNBuzm4{r;7*w{-hzXE@)@-Xf$k?z0YmO%?fTBNPo
z6aVRYWUcF{7hBo+@T(RaGkQ{t(-&RN5^zhS1S2tG7)NUgQ0b-s?i8hT|Kgk*gCq=&
z79e33i?@2Ra$DEK(SAU{xaA)cRh%uxO2i;%NLMnh$Qo1(M0W}nzXeewh8DJNuc&&z
z+pwMtM);|x+|}OpUEh<gwjsNo^ZDB=LaErB*rRjM&m+pif0#HTD>{9(ZBiCm1vcZc
z(<0TrGw{{QePNw61ky{<5rwiZ=}eE?#$)C>$l=DIZjB1zxOgCPL(ec<HSHa5!ejFd
zAPTA=Tc7n(WgLiFU{88fnPaFAUWcJ>pd9h-w%HQC{l$oc5W4Pm?Q1+|uI*()O|ALS
zzv-{R$pj!88%b&XebY0!;4p>d!><ebKg!Y>G`Wy@gye#qi+RknJa%w-%q-^Na64PL
z{V$K(y`{MAoW!kw<}QL-t5hUwJdv$fR%2Ra6rIC#Cp+y2F)Q6YP@H57`|@ySXLM#)
z`|Mq>DJsCAk?Ory$Us${#7pQz-`vWTA_ds>nyvoJal2Q5qfXFj!JAcnVud+^f1Lx+
znOu28PikJc$h2f#44f{TI0VH<7-<gfgUTXZC{|}|8+x<ZM&S8h|I1a$<^ZN8ly;zv
zzHW`Bb^Ar&>ZXIZu5Nq(-PNtJR3fxn@D@8@X@Ux?oHPRyPmtB-ZwnVyY9N<4G8@$Q
zq{_lYe)6CW<_Lfw*i^^}(uI|E9B9d+&cBakG}M=1UCwieMYxf6B=s{=+CWO*iwSny
zKetRUw&@v~{Rnn_d4Gbv!;VoQ){kIEzM<fcL9pi|!j}?E`m<HiM2hr2-`x-Qm^iYw
z+WaC()9P>{7XlRNC#Eu*9$gG8>zGhN)6THL6-JvSDVivD_0WD4b<(USxadlT)Slp~
ztL$^BKKbARefYCOO-@HmFGWW^l3WsD8HJ4}jLFP)<ip;U`47+l3=&#Y<Zg-J<ttoH
z`QUZ$ayss*%cx{FSVbV+;0b-0H2HCmSF03yFQKKn?#dx*#^6RGgjHH9KvO~F3a$_^
z=~7EiQprTjaS>+`5ox@^bUXkbKLEIzc2Cso0M+aiN~0>Z%C+}?e&7q!kKLiR@P~iL
z{HpD03|sbYv+Yc~k)5(Lxcb5E^%{|@dFOJ|q3X6-lMUX$T{xp(K4%S@&(SU)ce1{H
z?_A9TiG02*cPTbs*=C~-Ox2dLEzVsBSRpFB^~Sr}7FX-9r#uK=>ItTiyv%8@v0ySO
zoRCAgU_4OT=h^kFD9RY2LQ{vzqEXeg%7tzFU%<e2UM5#{iB4ipn?>?gkMv&b0yVGd
zBK9a;y@R-D(xHv=wWLcG&XoA8PPLyb&}s_Pe70jJ^Z65YJ>ABNZ!_ERmQMp?p2Q6p
z8e47J#_(s{xdt#@-&kE?WYK6{R&~cRt|GX(^umCQiDVFI79xBn=qr84FoVO#&T$vI
zpELxm#~9>vT&~-j7Esl7kODx0sjQY6o1I%rnYui^Sr+&%U414GChjtsxOJnU^C(4l
z8Ja~;@Zx3ajyxV!v`HL5Ljuv%`>?~WaW-E-4x{%z0C<_0kSP_J`0b8+bDbRcTL+B3
zg%;R`X#@@Ac2}-nZ%mxiKBh(<;<1}QM)m{BJD{HQSaH|bB2sq}0e6ix?&`Q3{%g`f
zv8L2qT`zyQRaC|h^RO%OaCefgYW^YO!;<=)LRP9Dl-@vfXd#}{2>xQus;;M~EJ#g2
zcP50c1WEf-;!r4Y*QHc9ro;qKiF&S%fdZ0;@z*Hf%sY+}uNF2#i6qby4hTx<8rX&+
zC2k=CN;GVN5)(E{iNe;4Vs5l6eqZWvrXk0bvKSoZn9-E)p5O`M)g`<5S{GdfS3#}?
z_>sb04~xlyOYvoy<_2F7n4jVIQ_&ZBmaWLSWr0S&;8VdST(N{s`~;(v9+KCqd)CL#
z9!~LT>m^@(U!SPalK?gtx)Ou1T|GZ|MW3RKS2rN^SA<4J(&3Ld$VdO?<-Q*>E8n-e
zttJ*7emuhDW+37s+y-$81<AXYQJKj163bWZ9e$gUzI(b{_da1m#i^FsnJhW{0c|5o
zWe2aNO(G>|(&)h+!iPLpKSsKI@Cm&7GtH#;RE7o4nG$9s9zv!uiG8Nkbnn@;U8zXn
z++%NXNP>?kX%!*PD8en>vczy|?OmoJq=n*Kj*VUOd5VJHYHkIVmI2W0n#~lCU2~d7
ztXJQ2wp1!qLD^&I4=zz~`X#O^@1smml?>iuRc^ou5{DZSYUNz8ze7kYV67{Ooiq_O
zdUoMV9?y4mm<7Gju}p>D`R!=z32IdcdA)qGEBhK(_OJ2AWfwlt6Ko*BI#OeFx<<QC
z7pq1xlfFVW`mWVi#sRXt!Dl(nWqG;JG9S$KE;JgsZ0fCh`&y+^u<FT}IH6&BCf>~4
z#an{fU2g)ae^cRa5~g-a$y$9$y}a3%x#8+xnfpm}7)59<*|F^mdrr6aFLsJq<KH8x
ziQ_xQnUGV)(juT{Gw=Hi_0juuj92s~MbjO4rqBelQeNFr6-Oy$At6HJvaX=4M3&;3
zd;5%Q;3-XL7!1;01kQz>ygwh-yi*(*dbc7Ms|i`@nPApoxc%5xyfS;Sar)Y6f$LhI
zad|hfHAM^istHGJ(mW%%rIgt}`fhv+g~nG|vq93B7?Igj)%ABrn}Mb0uANQcrUkU`
zI%p{|1PXv?beLXw+(Jh6srEg#2*E6@YJR5>3O;veg}R`O4z9xItac<U<Ew-J&eZS(
zbcrf9|7WgZgJAG=RRzv#;2DC=ppXFR{U#YPVjh;N>N?ZqX#{6&)>;+AAkDq_Eo<&N
zDt@Rc-mD9?&_4>F##5WQmG#u}^u+O3k4}0Inp>6dGSG@{hiW{lRUWmpNnO?L%ZOM4
z0*8XYORjzTBLEFXEMaJ+N0@>1Uc?U>Y`N~DK&03m1oVidEp&A1vO_tkhd*<nNw-1r
zFjm-RbvAeqkT@5b-Q_ab<??IwiQzYWcrF(K(i2?FZ&_j7B2#My$KA^Hdt|ESKZEVW
zb@fb+Qx~*Ma-;sUe?W)0W|gE(@+2Vkv-RrQ8*=QzC~G%!n7N0vbK2C0m+Qt{@2;+z
z&jYK}63cBag{nADV-oiy2hV~qqu|^abX0q7XWyu~+;sQJ_D>ZK>+IXTeV5L@aqWA#
zO#&P8sfo0ZQ<d>F%VV<`JSY_@w@Coc!FVWd{Qwb=Gq&W;FpAbB=Cgc@n5D`*W`}%y
z%;?xf%nnLoc6buALp}_%<rg^29^(s*zB9}8M_xbt0Raqz5*>rptKE7eG|wistZ0Nl
zBHIkswwb7|74~Ru-9XwHckHrS(<C$xqsx|I-(Hh_Y8P93sK`p`9wg7NJG>+*9G`dg
z9l!%B!SmFMfl~dav+qEK^e6=J1Q+RoL-6!naUPaWC~@=o#w~jeUe2|1sK3s+=EGsD
z)Dj;Gb_>ITBZtW9&0U{yGszbEP@M$GAT=uOL-+fIG&F@`F7XvNjVl*RnOnJ76S$R(
z*&8!iPSY~XZmg=h?sg{&H$sLd+j7yikPTIjqK0)oWoiVMR#o@5`|cCP3=!HEb6UTc
z@;D~lFUE|umS&HBF|Mbo9Nl$o8F&op<J|t~*&)Ip9mlLKiJAA*yf{Wyjbd)|ep{^1
z-Th*U^|`)ZOk5wg&Bzr$@3(Pf3R9CM#5E}#l?;xnQQ#RU2xqmM_uIG*ocW7`XI%4C
zDz1VwwB~r)Oh1a33!HhA5KYjdRZzSQ@`g{WL$1<`Z2mbSAN>8iv8g{0VZ7D*cc|<P
zN27m?0;?fTdKZhnfUX2|SAi;{-j%*VYD-N=3pO~)>N-hG0<iqsYc(4nCucS~ox}>B
z^nwqLj7C&p5U`j3C@@Sg<iM=kt)3c<D=>^IK}8SzgsvL?S>lrWjgyO^&7c#es51b0
z04U71P`IVfcs{Z<m29+1zBJQo%~UVdYXh=bDTA!CFDYNPSXMZ*!OuuznD`KlJ;QV(
z>Q22kl1o0wmSmbGOf#2pZYRbUKy9o;&F{cK!UQ8#oGssSD%j0b_D6m5<D-VQnmq-Q
z3pTtc$mLK%kY!q|oxU($k;n&?6s|RJYqmla@2h+<QAM--=7IuYoO%oOk^XMG7Gat`
z5}N8Arnuzws)pCJ2|;0nLy46nPPu(MA#JoVv;0+Eq?1dPkrFYrQDW+~<>3%iosDkB
z{(D0D-d<yy-llPLT08espklFN(~@1WU}{613|S)<=!`rCq*ValHviSe0{L6@)pY#~
zu;bG#zZ^}G!@2_jlNG?K;@Q*Pev!)X7k{P)WP_6ka2tO1zaRFX)U;Tg3+nxbpJU6(
z5^U3@41Vt$K3Fn@VIUvw_?+Y9v}16$`GNZ?qu?Tgx4HbpT1z9a51w}no~Ed_h{2k~
z@y1flW^x{q91L3(gyn{T$Soo^u}jnULnUd=whnb?V)d3-T}8)smLQ+T#z{j}non70
zTep@wt!g*BnN|B0*3sK-&t$W=G%y_nVv0JTo+z9W;RpK#v;PR+1#aVkO=hiwqON<(
zpsA{h*Na-gWWg?6AmF%WUaP+a2q9b6v4<5SysY@dRG1}ARu2{9>?H5MAkJq_l<exq
zlTldnqILBb0f@T#8R~0iL|t9?_gcmC;pczIHi8ErOz#=aNb-GUYkjWR5I(U?4C<(z
zE@R(OClhi}oQUVMTt~hBZ>1geYJu>sw?V3-3eq}i-;HrcwRWrOx&eG#+wnLOjh#zx
zoej={S0f)?sWwrGn|?qg?ouV9{fi_Snho|QN#O|PRBcbg)z!Pjj3&rZ#sJV>Wf__e
zdF70{@B^=7C`U3(^&S(kmY`^k&c5oZuE&YNF?UZ1xY_*7MbwqGpV-T4BN658mvr`3
zRCQgW4Bj-@bXC`b&M|kp&c6Dpu7!$Q%g>?n_^Il;M@~iyoIl3d`vgC6EB*Z52pu66
z2j8w>4c5KiO$N_bu=4AThHI<Sg$n*Y!G%lX98Oc17BvfJ$6-e+><0=vAr9M5VLw!u
zSzj!_(F(gyVKA*{r(p_{S-xO9RSfQ}?-M2#L(Fn#Nl$S7*<&>z+@KGC8pYYJAemQ*
zurgg(99KEXTHrCkur{qvH}pw`PqGjQuzM6pn(0C0<dnfqx4=6fyGMc@fnhGQ`{r_{
zSEj=Aea=*;4s6{rMfM%(gw<J&NpZS^Z8qG}%+;C72vwM^0F$z-vC%{*rj^mITB}qB
z+S`!M>O2yg1+;CzOL^6{ZUGWL65QVInh!4G5p~_)nhVay1=s}1^m=lY&^OtRO-(=w
z368@hs(><sK7VhwH%uUvj0lN<HE?^tXw+239!Tw|yaxmUtC!$2E332`+q_OGmU-{*
zlx^_Jw6Uq7V4*&D=?L!J#BbvB>AjX`R|`MZ)CiMqzdSQkm%m^;7f00l`N879!qtyV
zZQ$6X%^nbs#7@uygFSW|Vfe2;Yf*21Y|wkChw<z$7Kss;X~b<F(y_D8F&}>aZdQGd
z%>@~cST;Bemlxn%H{IkAoFFwwN1H0#4U6PCR!lOMiZq$Yp=$nURtDmHPat37846aV
z?EoW}-fDhkjH%XU=%{Qk8dEWZ#LL?8(aD|x+q~Ytk*$S2lh|GiT3-jP99L`8N0b4F
zgW!@{=w7J?oMdXKvAq?R;QU{?%i${_3AYfy`G=qBIKR^HNan(XY&Rld`P~N3&=~#-
zpCR>*vuKQMmtbVQQ6ysiv^*S^4W2uL<`35JOVdjsr9$GrBEB@LwC-@U%eyWYd|%Kj
zmcKg8GGd~sn_t>@RAP}d>N%?Xrl$#w`<`vokPXURu^`EOI!(q~vE;aX-LSaUgSM2=
zaxHZLhLpIano#ZRc6h318j{~6$^N@9Sgjh=;pl<Z;p*)hJWrH!z2IH60hQ2-TEp&}
zsx;WOSCFnj-HX7=s53UGmz4%Yow43`#z(&EI%9DYrgcV*4&-P}U^`E!H-*y~8{pwe
zb;cI_bhpZE)EOIu&mb+L>V!Awd>)ks^~O}Yb+d8S&BnQI*66z#Qi_}KK&o&I{eP+}
zG8;UP%QanXE_ezLCF_b|`bC|;HknT5rsW`5?>pJizLQz5y>})LCYt1Dcs2nm`N*Uu
z?ki;FDgr}^^x;oRg=$GU=+rErSd8useol-w;F6dcM2waRh`)R=6c^S!wOn1)a*-HK
z1Vk+tiP4SUaV^(RjF!QAU}Txw0iRs(?bBm1TBnw~9zXP}i(3vcdMRO>7o!)ws-a)!
z_9Q&5)9LXG;SYuC`GoiDI31Lb$n*`oc{zFpxJ!<vJZ9P8t<#cnG{i@7lB0}sTa=@t
zd=n$_^Wj$H3yNNj=7KxPhiTP4`ba{Vc;N{H4qMp~oCU#CUy><J(;d<=o#^Ra#sdc7
zyjM(TsO3aHz#9d;aY67^<zv_Dw$YL6Aah0};M=0F7~llb@iB%7*Q`lQ_J=Kg9hhD%
zSt1}0CMzt@<J@e&=?=AJFp5AF)gAS*B}D6souudqDhOo09lZ1T{<}qPUZ=(h))9fc
z)_r;TaEP`9v+qj4l0{1|;YSh2xrm<=fmZ4D=nSCW9RT{;Q<ld9BAiy9iKZXTB35&c
zY!&>4Ju9#V)AmggmrW|=+2t;Tc?x}AFC*#WS6*{7y?>5Ph#I;6c;Rd_CEy&f@YY$(
zmaKqG&_(vrTCyW}54U#`<J>>8e_VRQqQnaYy-#o^lb(|`TVwNrR&8<AtA_`nLkO3v
zUXl)H87^oYYG3RGLwO&{16B(VZfoW`lyWWO*v87MUsgNS+~;iz%?lRYBodOQx$2R5
zax=c!vzn3L9+9$auD@A$uUINp(k9LQEU)00HX9V}oK16XUJVTs8}pj8i{!Wbd**Rn
zQ0yLw+qknCLknaY{`RTHC3AjVx_tZ_>KWerTWhna#L>KFYB@oQzzNa(t3x_XMpgu=
z`tDs&DnM14UigP(wkd39>TjWP@m~ZK80RvGwQ)mpu^Y8FluP}t*_pzGx0V7$0|aqJ
z86BzV>+$4@GRw6kf{hd9oRsPKWi)zzjB^C)V(_<^ZVf&3JAaN$W&irNIuFC9^swSN
zf_FVR`<)~BBI$%}HF*s&26^sD(Tot+Q>Idc_@=(c2N(MZ>?}<RUXFT#83}5=C9Gct
zcjtWuLe5y;A30e=cU$t5h^B3$ZcV8Qw8H1vYwaj$T@$$BUpF{a&cXflMWG*Dso;U9
z3#Jnswfnf9VD=1#fhE$>9pR>la5Kn3ETMx3v#>Yy1YhLW1v!h@ED9Lua!OdlD&itz
zi`XuIDo(UN-4pCgJ`zzc{W3z%L#|kQAiU76;*GJw2}|B(_s`Sk0^bw#3QNPtE$5?K
zK1YyAgj(BhS=KQceN)h)PVEx0f<(13!XH4wnoo@ue2WR6b)HUt$ICP)^I=xRa+~;v
zuZ%zXw)*d6eI>Wkk;4SILfov!OL|Fo_(S2QzOkTqrupiX4zYe4(|-8dU&Hq>!#aWA
zx4_FefNJrb>*g}1oLSg@aXADL)-SwZ&(_<nF!pP!i?SVT6n$&uYOG`viyg_x*ZT#_
zcS^&V42^E!(yN(d=I#`qf+P^n`7JQ*JBmDwP6k%QgMO<UdLI5JJO^-Ey~nI?s!H#>
z3_42I&-%94AANA#dv0Cfc-C9rqTcgr6kO~*ZR$N~@{FxJX8LNx?680$RT^W;5R8SF
zonywrcI;5W`M9xtpn2*t=W_HHTx3)pS7dVG5a5n<aMWaSVT@qRG`86!6*S>wvxo6@
zq-kc$?+{)9b9fkC`&H_hmA<YbnCtqkdg{?(kL%HC-%}5zQAJbLPvaOMPYR?YDZ7bc
z8(;8!i(Wzbv7xVtRM#oE)X>LB+t1MVyR}xrIf9K1eUq)>{eboW5MhT7l2Cwc%dOH`
z&f!f;LQsVFe3#QsF*1qf$^}CRjwH-fb=s+jk=>zvPcTGAmHyJE?|CUN0RYy;rxqp5
z;wLSqgbMO~LP|6Z?%?F)N@R0K!aN~sOHXjC3=dGIqkn<{g63BbOVC^=%&c9b6@qm`
zm@^@0E>MQP_W3Y>Q&D<gE`qB*L%cTS>`94?_ggQP4D;J}6uys--$UQna4#|OfeDyC
zb*92jkT-gKJ7kGz2KM<67$*B<6zGFTUvp1wuN6VL1&Sp=A~t4&v6gM;`b;c|V$mZ<
zy>geMHgee1Q6Uuy;X6^^o?wNHHa$V7KHcbuEJS_7_4_9AXp^nIEFo4J=VGPlo$e(-
z(-Ohk03unnCoLj^H7SH6TwEu))bSLWpJWbw6RySOdww)j)+?}H*BaDX1{Uv63O6Qp
z+n-`^PS>HBqWqX>#i|hNqdvWL!#KS!6uuTz$#PM&{mx@nTC&^u;<xfeeY+>+`U<$%
z4Fk13>439xME9UMd&ky1o%PBsW2jQ_mlbZmHcXrkH$7_|@)^Q3&O^m=0^A_JD=U8C
z-&Toi!A}8Dhmw6aI!Mf7-#9Eu%b>7pi?z6bov+Mn)K6j>TsSbe+OX3OE0)4s9#UC*
zg2!aF=?Q+$2j7G4bFce+PamI<bBIG_<++})cqHa*qQWjuh7FxK_EK9K&`>>OBCnYA
z1gAy-40-7a^_!mHs3=TuLl*?^U`B~XYTFCC3jpd;b^iMa{~hkXt4Sd3Q!ksC4P{^t
zfZwSBv^^C;?S{AK7CAQWH%orfD~I)^i%ZA--VvZaX70y+;h4MLDTk-1A!yy9kNe;v
zdyW<5`hk7-34ytJ^Vo<TWx1-%+Ki-DcTnVl2bMV|aoBh!dH)$I@}v!;!3_ZPXA*6F
zs+9fTR#fVR)z(yY@%KQnS5r;HN5LDuM(}qP{96kS4pn)^M@6I(45Lll{c?UlSy;}w
zWX`ulITtQNig2b$s!Qe2j#D$a@&+9kU=}-~dk2z)#{){47U9is9mY3?xnk{{zt-Vh
zQaVlT5+(KYc;o3rl|~7kI7V2n=cOfmYqQ+7AKSXcAf~>_(J1IhAo6W?scmuH_mCAZ
zh2xq#Zxphm_QKHveAjc0>&&r89ATIRe_h&tX8zt9hjLL?eo0$wA#YPDJ3SNy7ul(K
z5U`Vt8KYf#Ub-Q1sU0%PNyU762a_}kg!4F2=+r;loG2U#w;c|i14Po-KsB_}D!E{^
z0GtwGTwzbY`BwO%RVjGyiGd7RA?k|F;DL#$4(|O3o(0S?8k1|ccfg_RBvYJ1WJdA*
zBuGxA-KFCp!HRYt%h0&R%nLg&RO?qqOFb60t%XrK93dMzPv)4wMFE2;8nUZfXiwf=
zCiew&NHlOPOFRT?Knxbs;k(_%BpF_mokJ+^4^W|2V-p;i$dQg5#zDl)Q~=-U{yR-y
zsQ?$c&n%0TVr*TKeG^buui~nmVkY_>eba(t(R0|N@QMJ%iLKh~KU>Yw>Ukt0Xhwk<
zjjN+Ae~b5{TWd6~W_nUKu4ZgpRi;Hwn;92kJm=GMn1!;U^uACVSL3EM@aE#UI<REn
zOg5C@8b7T}(|%k{gNvEv(=<Cv;zKOb@$6RSb}Q|z4oIH*1+6v`r>SnG$QgX;7h_Wk
z7eySO&bHc;yK-#Ewz`GDd|HQ=1$-#LOe7jg5{#5_ua1S$%Z_xn@YLU=?N%Vl>cG=~
z6C#an7eF013z*JK9q3ktPgtB;J&Z6aJy-MWjiwB|uq2@j{PWjV{*#1Bb9YVedsNMD
zQnuneq+?f5{GNeCEA_}wO7{x<dNK(gvVkYK5-<%2TIrc3t#MYYJPcdBjN0}diLCMw
z)#$pgPH?nK<TdW8giKIrHV{m8O_UFh|5Z`rK7<+QBtW{?eIqvI5HwDya>3h=DY4em
zmDtwPcY<^#mUY*B@SFi?KGTl@T<@><ZJgpn>9EDih4hX5IP|-4xp-g83ssp5J56yn
zNvHisK8%~Q+7AP<n<=m#uGb2OT<{q_2$qJ-HOq}x*x8KzAc3yWN!Pe+ZMZ~x^x6F?
zX^`Cg`rLiC`&IHq3dzjk$YVl=oiw@$40(%?sgw{&QyJ6K-JnBAQxsyul3?l;!ne(T
zOH34!CTBQlf*ip!Sx}<SY@~@Bv({hd#;ml2X>l9PCD;m#kfq{g+EYF_7B|29nH!qY
z5;t^hf8AdHy&z4>O#5EExUqOIZZw0op4;TbO_PZm5~Pdbrp>TXA@y?k^d@fN^uAE*
zRrQhZF!1`KxEZA6e)a`7)*x<BD_2gj8Jvj^jh4d-+o*Usy&0M%ATNY8aF+Y3G)nGN
zE^tD~Jk?$ZHO4~dbsiHg$`p<knGo{BuL+^Xq7YgPFhXcVNrI8Nn%l28x$#}1)h2YU
ze7Iz_S}9mam_}@8jPY{g&&096r1Bb*8($JgJn?r5xtALc0T^DT6C}CdNWdbw;im7K
zlN)}fF1fLtOXTGSMulMG!|M9#+3}{EntZ9;*oH*?`r=zkl?%EpvE)X)4=2$P0k|X1
zJvKcgwFct@T4IZGLlZ%hj?wlbP54c2&|^$)uq7#y8(*Nnez+dzaQy@yDI{Bz8`|77
zKyGxdnrXIjIx8cU*#Qqe*^Gm18x5*(>JMk7cjkj(v8&v>dV(^!dV=>);<I$#)4aZ`
zrNZz{uE3xN`PKOCI7taWna!sPI`vSQ4K@&BvN*D}$E*DGh947&ol>ZDDQkzyHQvej
zqS$r0cl899%GDEGqK`vG$-?vcqjE9;rKp@sNC_$oX()VIjIvlzcQ(<8HkV5A)Lr=|
zDtMV!xH*|D1L{!HgDnP86gAe#{@hBdU<}L#FXQS7UgekdY~*qHmusCAj1~i!O8+OZ
zMYG0(6r;XmyilE-mEZ6r)e|~}*-{C1*7+qSu&Ifsb)4n`ICT;S-qUeZ6gVUf+|bb!
z1rCh^t2%7Or&=BQT+r(Y#tL88Si8-mq%!*P&Y!YJ2Rph{NrOEI*obPj9jMKy=J)Mq
zL@&@iQNuxtJbcsoqR6sy9`2YJk1O`LjU%2N-o9gBdn(Q@(Dk<JF@cf#rV~Z#s`>9i
z%${IAKCA`T@FClp1Aaz7SvJI5@okJhjwoh%JTOZFn(Aar-*FY)cs$Nr>sGnoU>qEk
zV?km9F0&?Z!-`NfT%D^Y_>>}zD!q4*8Rb3sQ_9;rSzgW06x4WgtY+kca+0Y}7^!-v
zlQLJc`UHv&Zv3put?JTsC7{+#pbm{{*&6f~<2B5=O+)@4$ltkaD~(LG`QR&f^#@g(
z{da=Cg>#_e1P(}?zw87xvCJ8hCkEO*85~L)hK>oDbDqhZ{|wRSwYig9vaQ2%>0xBs
zT-c>w;#@1qb|e`JayA%_qm$fa6W9qiGEC-S41^Qhy+&Py8SE84o~8QW6@GIyFY^oV
zDtXew_F{S+EH?Lc2d%h-{c<(e{$v0NzpS7V5-ukRgM=sHE>P2Trf<!4ovB_b1v|Cq
zOt%19>`ZSB(KfBq2-`=!k1Do^3$G@J0xVE7LAVg8Go0e<5(7uw3Zt$uazT5>GNNbw
z5;96H-J2#>hsgj$qZy~_oz4@>3L_v<MwU~(!I*ZI)8+J_6H^_#5t`mh1#++4WTOc%
zEe69;Ben`~39kbcan5~k0C7%MPziDFCZF%b#3`r7@X{p&ikBWCg0g1ejd(|={7t>%
zYb;ba53F?1%X5s3V&a(N!Qc}@vNSfAZebqcuI)nDRXd@FEhQWL<}-sp6aEC@5Jd;p
zgI91D`DU!~P1XD>s5<&Fagq+4%)5ZXZ!vFh9Ut-MW(sX{P-h8BT2OGR!4L84FM*3k
z<W#fIm?$x!itu76s26z6Nc{$5`GwPIlZowWfY%-v&;U;>sH6dQBT<n%JB{Ks_X%wG
z64CI@ekpr`Umh1pl){OWcIm*<&gqxNgh+vjSj}0a_2W%-uI6;}sak4$c~}jXwQ@Rc
z#{O+^w&5&Hf<Ol<9(7|60*|nGjR3*UICIPpgS~Me5B+0HoCugiKrF)C%X%c;)+N<x
zxJ}1eDc}{nfK!=c)v5W7+^`RO1^s)*cB2#zctRxKolBGuQ!MRvu<&Q@1;S`QUy17Q
zF!@F!k6q+bOV6v4D6CMvE*Hj&R5;7!QepNRJ78I*o>`F%E;8JLz4f6V&$_ZWn7J&;
zt+JRKGMH_9Tfk|T0XRkI7;X+HI%g_e+iSYfAUORwBYFk5=mSn`=@lBTt4u?(tH5Mi
zMlGS=@fsWj)C)s7YUSW-J=#gfD@m@wB9e|?XE}kY<b$&*Lw`l77c2FzKkkDSVk;<9
zv?CU>^|Kz|5e3tqz4ASnk$EB;pEX^pH$mbpEw##zb&4{ZkJS=g=`DeBGtt2k2tY2q
zV>VcNjAJ8wBeTIn<_mVZPk~xxv<b6YxHwO!+YZXw-0<;|UF1bR%%Gxec;OB|5<0;P
zKXfyV<hq7Gy28~4!4jg~3}R3dw1<oj%kh$c+s@3kE82&RTuiTRL$eyE(I_1?7vGW*
z8^6h8O`;ErhPI`1T;uh-CgLe;ynBvDZjh%av^>-kC`@=Qaql9+ML8~BVw{TGbo*cU
z;J8ia-R0WUU%V7896S{T7u(d#X#K!uTGMm#iK1eATfGXdr%ksuhqv?+Hi2fSb0bE*
zZ{_-YdZa9*25GIl_9)lN_14P2HD9p*4_qs|>iC&uCmND+H4PRqvz>qzUaty!Q*e)V
zHBALfiUEe(U2?%LNGs5=Eqe>=kVB~02A%E6zP#z_@I6j@(C#bl-7H(2MD$%m_cIu~
zT04`GXNx_r0Xx;s?bfcsGISVYN|PVwr*c}y<e4`Gcdl;}ml#vXVcal~Zxj-Bb5lz2
zw}`XU_9sx+d@!%Y^=h|-dc~!Vhin@|v#Cdy0kA7c7Asxv)(CYqKy&F5>TASWaLg>9
z)h=8CN}e>SGaFMhc_xW0AZ`{c+sl5o4r%e;_R<vDUK+jaMV1ZIwY@QA8ChrILQFom
z^o#aGlq(|6!k4>7fwfWLPNEdeFM|~BPAO%g6t3kkP$?hrtyx@b30O+{{g<1;<0tnd
z3?9FHRM5fggo%S798Blgay@b3LniEkD*=Ew{Z~!<j!3SWF0j5DoT$vqSkVtNc#2si
zO6~HJWGDG9UQYo-WMFkW=+NFemrcRjLTy?YKCWz6^9Qp@49e%}qvfuAa52sz6KD=g
z{ILYmt}U_1cnRH+@O_oePdjW*%5bubQGuKFVCxgkU&Be5(lgJmxrBX_M1m;|C(!Wa
zWEA3$CRM?o@I<*vAx(=P3+IA)dVnIT!;HawN|39$i%)JCc%~C`nCcvFM~>Luj&UcG
z+vMePQrP5WHV%|fom2vEQ_a7#4EpAxuGqGca*hBBy4rnNAK>2)e}rfVqJ2U%AM8x9
z{@hKn9oy!D?Fs4C)D56F6;+r;ZQd-_CiH5xmRFO(Id1MC-$HZ0a04$#boB#o1*^N$
zzEZd0pi*yIrF6mUn|>mO-0R~iu3XLKK;(kmj`9h<gtveud^X>q6q^m&4B%vbt^Rza
zzM&om2jUhj7$T!BCFmdPiK+8YJL9gF+cQWX$gYp(5q<p<{q=B{^=>5kliY(QBDB0;
z!XGCRes8l0MX!DdJA6XvrRQxnArqQ@=?+b#+jk4;GEq7$`}YJJ4}&Qv>I1&eu&Qfs
zx)$2sc=3ek0DK$78vwlkkS^*8ejrDBtAkct%$AK{g?yT*Ht4E|;O7z4wGq@M*lvS%
z=Mxy(_gC?u<6llhCr&jV)2HAvxnqNYFFB8-69$F-XsY@mcX~5{ojgefJML_N$LckE
z+l@RuOTcXPj@ce2E7qcx|E*Fhb>k%)CfS*n_!**2lxTvbTV;ovUQHafh~^pb4S3C*
zgZt^BXgE@-R?V~33wH{F@t1HTt(Fa_%N*qgiRbF)YW;jg#Jx&jzUpcGv+#Sgq1hY~
z&Qii$a0n5E%%Z!@;=Y;B(_j$v075l;UI`4T$0;|p=fO@?j+Wo&t_{ML7vGu6v+(8c
zcYn6`Ma?EK9@@+-lDXOU>ZAGvJ2KBI?9(sY$qZ|iWG)_@R+*_*SvWDS9<4Id&#4jr
zn|iNvRX7p|m@FF{Cr8l2uc}R5GdN+Mv&rUYoMN8O;XYVyU&p3I9j99z^>WnoVy!q*
zDj7Ble5MPZ_YX<pGu?5?uSqk@X{&SOw39&~F&o;?PT2{(Ic1bI&D261)?<L2##r{?
z1x}TT)L}-kA5lng6uW_@Ax*o`>pjqUY)PBIHs#3ImaJfrtK?}Fq;ju%kYwO770*<E
zPET`?Y0?TX1lu{~>Yu>2>$zZ>C9|)Pda_a%W?N=jfSJqlfm3)!u#HUtJ|XL<S7ox5
z91M78Qg*{*n)<ozuVq{}KzXg2+Fj*sM;#ACh1OJiQ};07!aFG`e1IR_ACM0(oxMq~
zEKlY-0g9)ICp(hPvnQMErbadk1YbRvwyhBARuxdOM>#kB-sP>!hg!429H4yF@?pm;
zKkY4?KmqNV8@H4H9IvT9il!RF9t*7WY3_woX|*bioY*6-VNVBbV7N{3b<OMNX-;&_
z`g$5e&mAt%G8I$r=@?$(jSRI!?z>FOM5(H-Bk9w*;KhR&(zre;_&ttHzN<m@PyOlo
zFZZ(6l6rZg>%T;l3Y|T^ZWKgzYvirB*p(y;U212t8}Cha$8cM2ZzZ6alIZ<?bfco*
zpv=<fPy6U?6#d%)(TDixzkQA92M0tS?xTODXq%&zlzpU+{*j_DN~T8jO)WjfM=w;g
zJs=aMu2A%3AAO;s_aBgYijO`~(OeB(tQho8E&aTYZc_BWMc63wtrb1hM{lp_=aSJ|
zDf%2A{m&bTMgcCSHq6iS(Z5&ptwe__xb7n|nAXKbp+%>bUg&|p4{+haIL<P<*vDP3
zIMhAguoicjkGoKD2gY&RD9@{W+{ua?8OIsj=KHt<iQ_K&Ps4YdSwB2Jvp%BtHnQmK
z8`?fu2iIrz-hel=@FwF(4RzH^7r88$Fj2J+vXpUtDZsKMz@G(hTq(eYB*5bW*sBzv
z9#+O0<chcrfPC=qfn!x5ov-GIZ_!DFN(7=+kFEywE4Bo<j@BN8E3daL0qTo(qPE%2
zjj0=-L|!(yaYMew&vE+M$Bv(k)1sk#6?W~N0;e?WqwYq-O>P)x(#;L@hF$TXw~z~W
z`jZ>wSu|^0MnL;^axKSIHUC-x-2R^?Pscl%_al4}Ku0ida>G99@IJzv2)qR2_{S^$
z+kZ?b8SS5#H>+X1*0ILBt4}-bLUt;{I@M>K3V9Am`<eHg$&IR;O}}dXzYu{r4FsKR
z<SRLCxBUTbL+Cd8q5(ESD%J{VjGZ&tSOqf5JT{N|F6pNQo%NFBsXqumO=^zq1e58g
zR&)Jk(rBb=^IsdjY~*4%qpUL(X#-Kl5M)fz9HN158{amQ%5S$L^BMX|1ERB<Q#9aa
zeEu!^_TIq{z!`>-R%Z%tyL1O1&=#L*XjO>pFU<^kEsOzE7;S71*qNEE4#WL}lmCxh
zLtbudcuDrm+2}>!GFcQqGaC3FVMLjnYTt?sC-Vv;rIMTQ#}>emaCbl*Zz~Fhj&8L?
zD=Te&j5?7qM+9&u`kj_(1JN2IJrriE{D(A;*s*`}tk6{<YMu{C+c`+uuO`xJKd_Es
znmR*=TeqKexc1M|gyTi(I%r~NlRu6M{rK|<?v7Mwt*kd@gIg#es=Iqab#_1QVol6p
zQPp)C10mSWq!#*`eg|e>7KdG^p9>H(!5D!@Dlh&|;V&xGGf8M%O8GJSIaO~aK{Kh~
zbiQqo$~ToZpXyY;nc~1Hk;>O3EP$K>w>*9h^e1Js#}$?Dv3-*&pKh2U@ie9By~KG;
zt0Qo-SNV*$sl+Tn8iOl$seIGOx>f2-t=rc*1-4TwFuhK)-E_2}X&ue*<rFcQ?Ua=`
z4!iF$Ok2Ii*a*Z_gYX*TOT-uIEkk$rgCJZU9^!Ez!dqW58F&HcrBxBrDQ7VWnbPoO
zbjl3fYcdG=gh<_4gX)wI{K43vMO|xF)U~8jw!}K+WJ(G@&yN$RyUsA35_1SiE})j_
zqE6}3NndQq2AL+BUR77Ek2*Wj7u6T1sV`0=?M&YnukiY!!R`dCC$Met9i)TOXt33)
z*~Jc8Ph*Xy`Vyk-&KzyhBss<`H-VCvO#bXyt9mV{)JFZ)`W!ipAIi@-wS9w#%eP)%
zK<gZPs>SOfwydY#+)JvvKpKoJ<HZv~gP{(g=I6AlvjcD#=Wu8wH#bnoAfSFP9CWSc
z{{Rm6{oYB0Bo5sE`^9nS3iR0X_-b-@JlO0kO4N!HgO65>F9XEkXI%ER)?*@p6VKU^
zlKJ3|`*^h^A3X1!`QQcb;?SgAJ;5{X^OXDK^&#zz`trx!H{Qj$_}}2<vqT?BFxC;d
zfsiZs2@p&6Ve+fF+k3b?G8cSJp!r|{AD7#;-et=((@>bUU&O-fT68LtkZ4PgqFJzV
znEa8$32PknQIwI3fHnp2wb59X_cILtt$aDo@}4@=$*zRu{r#~?+4bpiQc(j8$Q5X*
zRtVkeOW*au3bCcP7qa9e!2f2;ds|${f1~9+-Y!?K(s;SVXfV+7zVF#)c|Y*RgysFj
zI|Uu=N|@%H5Kbg?v-69I3lG*wnp{u@03%b0<y}kpI}zR;CfYq$vz3CHz8SMZK4=@0
zw9kKCbHrTm;6jQt`+PtAoqb-JKMqKDYcVH+eyE^Jib33~w|6r011xjd(7YAjZ3K+1
z_|n)k3_d(ntQ6cwVsN=jA7{n?5zbv<6XWCFzaUD9?<7#;Ow3WWYz-m&e5Lc__dqND
z8G~5yN4tdkkx*9rGrSdlSNwTOwOnfwxnjz!dH4na(<QJ4EGkx=nA?cyez+J!zp<gZ
zSC<OlNh?PrQ;TGCYtgb)t>G1oI&D*U-`t&dsPs|CkY_(=%w@+{J<>NY6rFQJzt9{C
zW@%Zu))s|0gAG+!6XW}P&Y`Z&4JeK$vdRrRZPu>6HDV;))03=&H{xj-<3AhKj5ROv
zv1N?b!Im)?e_GuZP=?l4Z_Rt2p*32ma0=~5IcWCx8=`||7o6rqQoV-c;;mLUMQm8Q
zUi`}KA~D<<3!>KfP7w9m1MuxA7&hL*9)M<T{)RE75EU2H@su7kYq?(J>9?qV6S#y^
zsR;Dj4S@c=dys=>cYGdVeGiuEeaQL+6_NIGoq`dusowwPy34a!%CoLrL`v1h8m^Ox
zgXG*2=X_c+=Y8Uwb*=#l>-{W!hE~nr*#K*9rL68_VkTjlUNc|C`{JaP^>lx}B>voD
zy!12yw3h(1L;$(;5F)=;61itFaw{T#R1!I?7&(l{UzS9^vB2Y%OK(TyUy_mK=%h{r
zxpQ+hZQ`pH81)*o8BCim66fX=`yuD%9{#pxHMP*|rvfiofF{>mvNZ^DeGas`hkh&S
zW}@Jc3i@O*D6s`uudAWs`wc{FC;9(~dl&esimUJc0NHZHKq3%~7$9KOa8XcEQ9*-(
z9xc|0m!hI#RYa?m+QdsAD`?;;r$<_?w6)f@wqC0BT5A<hlK`4{YmIljR8y;Vr?HB)
z)~FQz-`|?q`<$Hw+P?4eKL30^IeYfZT5Hy<S+i!%b(akj@ZNb~Yfid^yKLjPNSRfT
z;#o-U1Oo7R0iK-)B&u0a|CNs_*n0e>9xPld;Op|hc@{2JN^?O<AqxxSlh{~Bff`F9
zFeM6X!EXViH+O{t=h`QP*R{~?7xG80k32zDNk%de+`+<#>q`LSJDDGPW06UEE%#sN
zYA_QUi=D4fYZWEP)u`c{v90k&B3gi-BA6-KFTkxp1TEd~7pRH$3vlOx9Sxfj?H9=8
zO^taimPus+zIAXhzR$Ex0F_bB23~MhqnDiF8H~8gpQJa=jToakH!{#g)bz7W3_5XA
z&d8$d(i6>h`Nq-$-{smL3N4sVoU9w-%lj@5kQQEU<}sKFKzHj#B|JA~LP~2HD^=Yc
zgPrNxQN)s7iDNO|HSlB5PKnXDg~YK=2Ibl{umyi(=5bPj;3SY?`B*)izcGtoUKOq~
za>3q2Cj5=teqcr2NqFAhz%$V3v7vdmv>|N{f;k+~CU@Vh-|0}>M<+dwHr`{8V;wIM
z-SU>8iC4EJ8+*Zd2F|Amz^`BbfH0-)W&Qdx4>bymg$jFC<vDC|{rYf^r1k3qw}=F(
z?(5fs3K08l5m8=3w4TgZN6YLlR=UDy{rU-odu6ld`t?r=@UGbkUg7$+##eS2YzwwT
zh6e?wb_tX!z;mjeZpbrmwlf|D(>24%I<GO&k@iVR<8ko{ua~j$c=s}AJeWk#a2oY8
z#r9VxG$)&I-gsELHy-hQ3yd-Tjr$r*Lp{D3j~L%)+9nk)jdC{d()>=NUUJ^TeGS$E
zwd>K02Z4TlMVSCsJt;t8*#}vaE8FXMGb4LnQD8=9U2AP?6mc>m2r_R*E+8%3uR)Rv
zHZAUHMz(Jaaw7}ONaz02F94klnHrVNMt^dD*ck)Pm%xc_2-=D5K@0gTkR~{!GVDa1
zT%}nKt()%&G?PzD7B~|%j90ZkeTUs|K0Vg?LRXP-)50GY^yERuh`fI5B#@23J5NC<
z)%oE7jM>)o=@J$-RoX4N``+~K$+ekGPMf4VN8)2wYpMD|vh_9sXS>?Xfqh$0x%kXL
z73@?>(>uQi!OF~<b~`+icFT%aQ4F~*2YoMp5@5I_0{OC=7E#b^@&)Z2X-g3G!^po<
zvuBm$T4l3mwj$wD>3Pb|5$5;vn61H66$Kmpx%*6Y;SEOQE&WgJBV0gM`g2WtuP?f$
z9nWSosa1y`ukyZH$3@;R=r)^i!_}^7Pl=oMc9*)Q{r`G4gKG9uCZ^B-+xrOZc%|P*
zh>m^ro4R<RwqTy;%I{iBKAwaglNq;=7M{PzTJmH7(9XnU#?U71{S7Z(8A-p3${?4t
zh;3yXVN<gzttLiWV`yj~8Fb%9s3jwfg|&@v@+{SUaN=<B8qC&%_Po8*fe*O@z}%9~
zdJ^{`5et^zLwG$0rimXRq=sg`r)I5IZRlU@A-vHczP+Q$Z+i$ay1|RQMs(bP0u<l2
z?LDLvx_xb-y2p^f>%MF42Odbh{<jNAZMD}w-6N^jKYoiyDo?l0ySf0eVvC4{y?!)l
z99chd{8PCr*T275v^~|@eJSg^T=RnHt8wf3iiJPdVYZX{-Q$67LoW8buqwh#>rj8~
ztoG3Bj42AidYo+CZSSBH4Q_3$Jlu><v9qHD<5jZH#r?x#Sm+Ewc?$s97%JT~h_~>{
zKN?;-T2mXT&1{=@urih`@hi|HG!axWL~8&e{0el%P+Ngkq+hWesTJrEnJoKj3Ref>
ztH#MK75?yHw=}@Aa(OcmwgO!)#rG@F!?`aV&PTZw=yALWQ~<UDT~QNO6XzC8KBOJ|
zXW5tg>=8SQOj?0<Cn>wFK##PNDif_hKk>R-fu`um73iLe8}h*1L^U&HEXg0Iy?60C
zg*D4nssyJF_zKofUCAXaTU3V8_jgwY>Y`w|fc*l)oJQ94zI31qak{Htsmn3BbRhLB
zr@Z(4CZ8j#2z*yCJoL|bEtwN5qfS(0AE&m=OPxYKDt|mEPP(mrOFRHG1Q@<c$Ky`L
zoOQU&nR*AR#chhevaHZgeK+5kAu@GcCbnnzEQ|Fjjf;KEK^H<v{fxUS=OiD!EQ-di
z`WZ3T9VNkbtrK>)9qH9HhbeqmHB)f-K9j9YE1PP7xh<zC3UgadDJ_nPCcA%xZT0?g
zKtl3tx-Jr(=%x<yS<C&2`$McO!ApXmWhds+cO@-+{}M45{8j+TE(H!@#kvePESx!X
zLW*0d{NVI<x+V}W15y1}es_BQTQ>7tnitIspuZSr!$C}4#L^m`{jL0IeX=Y&Ss=Nf
z${^Rkf*|cmk9&Vw;6>(HyL4DfaNiI{hmK!9#j`B9nfI7|ckT!K!T|dU658T2yrYVY
zN@-v^n?H^0Z>fhs50RQh`~Zfz0~A6mVeP4h=pl_%$M^Y3($l$qoa+IAaW#_@UFX-5
zFlh(#?%)Zj=VF+nk}$eB1v+bi(Vw+=whtwEuXHd!jbOx5-jScPj{6%)(ow+%|GdmU
z>-BV}&e*;;pY~___adXivr4(DsqH}tdC1tLLLEDaKOr^1?(yyTh(<*gGa$*p!rv<W
z>Y-|i!EQt%+)6!cq#*CIV+|NB!C)e#%>8&KXQ&VUZ_~8DZ0`n0=t66F=T}W_Un0&m
zwl6_R34eD9kC2dWm1=Bv^Z@-1do4-$9tlqMtGf-2a7WN<H9Za%vHn;mNJP#JK}DT)
z=)M)F?9#6j?G7bz({kl=?xy9(mpWZ2Z>=fP=q*=vlz|&M%{(~7(5_QjQ_YP>rNT?k
z_-ykL+4ZZAv7)SPyoX3TA!)T8?#-yfa@Rmu!GY^b#ZU0*g<fKQcIAuYT=L-Ds$xfW
z3}pGr#Hu--Y+I7->(@|`AttH-<%2Ifl#@M5R}$rRP{{WR@{O8)?_bgKD$x!Z%>@;F
z=4z(H^`?PQP_Q>Kt{PZ}ccx($8*ZX2H)R@X1d<E3HAtBTL7Hi(_<4b82*R&Lq<Yk7
z4VSvEcXAov3wfb0WHmGj#Qmrr(v-^r$~L$=sf+3g?xY?FDlP18QD}ISlYw+<)tX(Q
zg;WrUBGU-1V`-9Jgmsh%zPS^lx<uDS?80xKMm1FTQI|_LT8~`;O#br^5Gz(rw5op$
zvMt<0915C~3THZ$Vv&t}FuPyFqpVAypg5^;@V`L0x+lt;?3SY|^;7J7Q41#nqy{&l
zhE~M4Sa{VR-(vBhmf&!OT7oHh6tZV-XIe56kKJWdd!?jlZSG*{JM#`)>@Vr<j`Vy?
zYdG-=b^r&TLc1k+pWi-C%mEa`Jsr1O6k`+c^an#6$~HpT^qDJQA)kd}yefgxUno!g
z3zQQb$_Xx)v{0_|C=`!RmrO;BLkBuBzI2d@u@A5M>n@Z7DQ!!z4HS9&xwxA^(@pKa
zz<^9S?X%6RqBi^0n-c2$@p7_nnuVen=s<yLx`!s$xGV|!B%oY4`{kMAc{Dff3KaD`
z7ZdJqpFI`a(>(6IN!;&%ix!&OU#|Xw!GIpcs=46kujVbrAX$V#d1qm7m$r=@2@dfF
zJM#{6g5t1=GYAJR${Peazp{yf!T&j5plc#fvk1?_m)TABeKfd{3Ex99pOWwY83L9#
zp5c_j@ohstcZCL;qLp)Ov`^kKe1PoD0;@(BOZj(Mpe_VLt`k~pLTL>zuxM@WRGROH
zqRz$nXGw&9=Q=u^=~v(DUAP7}?8>;=H>8;Ke2K7GSrwv^obw&CGbY<=yCl+#=4l5o
zc;lQ1c8yZ_saAi!vN>W7GwbK-t5>Tj`7Y)2%L!^C%?^9=3GzM-VE}0~*v9#p0D|^H
z+cq!h31N_^)qr8*qEc_#0Ma)+@}HYGhp+KtQH+cGP(?P;_<vATvuGo=8?9$iaUA}=
zqRNtb#!I83n)}TMf4CUCu%t!ZOZw(FyO%UP2Ll^^#!rs|=4Vo=G&iCnVBVCPiJG@&
zSP53al1b3)pOx~~ezZi;Q2F31`Ia<6ia&wNuZssLl5m5+zSlmnz&yYJjXNiH{1%Gb
z<Fp;Qcrdw@XF=|PbB$a<cYHH3-MZsP{wv@5CUJi+xyfPsMt8`yjSFtk9sAEmckH*F
z#Fli%lQCfTZutRy4Wp>a>pcq5kBj)UnQo%noQHbY60xZVLz_Bnf@iJ*F-<Ws5intb
za<JJO8U}HbmDn1*m!`!0soDCD_GAQ#D5t>I>T~j<oGQ6YMU-nmv2a3^3?faG2X|<h
z%BM?)I!AS(qvK^bnV5ORI2lfkEZC*r$jfjvAkzv!;)_=7Vx*eORQ*9k3^1jjjZ)ka
z6B=t3PHMdCOCq|tnVyX+fCTcOGbH%1ddCpKGhZof?@y<Rq)fO6M{O_qTpTF{(*Q`Z
zRASTdR|cSyRp??J+TjZaQ(U8ic<_g_Si~UitW(%}y3@Ew%vnG>ZH~0G<4;hznyvU@
z_5hni8iijyYSiV2>anQKBwx%FdHF?qh*vxDFKakzS!omWQsHMOm==BA=k)p9&va6%
zywBC0cZtNny8e0$sNbha{Dy<bIy`Emc^-~hiv(JxZ=N<SL_wq8f!s<vj}UIUZaZV9
zWGO47o2^GES;Ab<W<C~Dj;fb63HQQ6+~DmqUBS<TosQAKB2Js!;M|24Oni@XJeXz$
zk*6u6jJ7rVxC<h}83ZzB*Uq-^HKC&j-_VRmvL~8wsgIUQS4!|dKHXaz*RjkdUeWJF
z(fPs91V>L!XJZ7`pdHv4w#23#Q<~EGQgxyDzR6vVTFQc!-TBwI{$!)4!sWZW<+U3X
z%j&ak-C7vf8N_O0s<Z4Lffg!Bc33iiqW-a;brPH~cRk3rE}<5WrY8kvf>{8ZlChA|
z2zJ^w=D~3bK2|20j>Y@NIN&*Exz5c#2s3CtVh2CXG8c^_{vb^1mvQ|g?Jax|#z@Hs
z<!9fhqe{f#XiE0jq1JHJJSY3Kll`#*Ao`prIxl+)?5-(^EnubCW9<_4g3Tm>zxv9f
z2PhP-UHlsKJ4;1VXYIr_=VHWFdA8%k%e0L_;%jGm5qP*sz*$~&%!5VPRWs%zKvySP
zPk|AMOzs>>p}^!KkE7$+IK(kS;^0}Mr*zpFWC{b4x_=A#tgOCese*>~P2|Q^NT`Ii
z9x=V=!`l$H&Fx2XI;&)97i0mN;WytKv$4~H#%LXtZozzx<1cbW(-)^*%`83D%Ofe+
zXQJqQ&D5x7w6nY>GPCpzl!m!BD?*aMvA${}PO@vcV2u(4=ks|9)e40-me$r&E8jj#
zTns$M(qOr8HTUNLC<7?f;`X8gG>vWxeyn>GuEBaoLBg)2pw45UZDc#grwSHeC)2{+
zs@~ka$RDv*%FDG4fkNvTlD91kP9!r^+qOEM4lsY8`+ksEX;^>Ymjm$quwr7@jL+|J
zb)re^CBG7#+)&2!-jf8xWN|khUktUxpmeoFithG1eI+(~vuQZ>sa(Qh<V|3(Y792r
z_<{z4u-Fn@0uMABtd<~SGh$<fwT;`*#0}cm4rk3)@8S79XHQBa1L!``YGpWHaYRve
zoDIbJSs!O=29u2zCsr!!Et{H~PWSDso2j|(wtr!2+-*W`XhM}*9}u^rsE*_ALY03|
z-nj`s;pjy?1;+&EnMm>mO5rN&1JeP#+i=b#rvuTkYX50#JKl;|+^svY4m{1Ih@@4m
z7@MX&@MPDL{Ov#|NKn|grBQUgC0V=a2DbAl!tQp7knb)EMm#Mw_Wkzid9D#Tro8rC
z0!v|y4w~eG{s54nO*$VWkK~}pO{<%!X{>{qZba%~b*-DmI^39LYVP*Lkoc|3eIZql
z6DCsq5?sea{J<*32!3`NjF>*5Urx#FOYiF){l|}X^lLr+IZ66gdivVRpgo<s*gNA6
zEiVIdb30XO9%|<S3MunW9l)Rb6NPqF=%)(lNZDjv7TP&jp?eidD<ll7B^BWNdst67
z8TGBPiKsMtI#SN@b>qQnX@A+^aN=^obbgtE^$UdY;SL+OgE%rmv~kBthB(L&(_2S;
zXY+WN!tkJTsc^I*zDQgyc!uAt<alR<h$&(|QZrP+4TkuGts{OtLX?{t-eZVo7~&~g
zLS*ihBxh8SV>yV4F5VnowK(w-&3f}%rPpxjX~`D%k4@w4yRWXreKl@z?@n+nj@3My
zTcB}11?U)PI8f~$Hl<2Vch_FvqiK7Kt&ugcRn`H@W;M>?M>W3f93P!;d)C4F$%qK-
zmuy&$I=9&ENQ+(?-%btALT*kuxO1*+dx=hJ<5wy7qt<B#IRK)z*ZZt5>lAPOvp^<n
z?J-v`s1<GBoE!rXDwtdCTQ{V0Olxop$og{@y0SG`LBwiBD7KSZ3L6T^o4w8jUnfpg
zN;?fcAnX<xgwer<DM}f<A~MoT1nVUD&iR(mOagJGCe_*68k-C56tIaq0>0iQTuVYE
z@L(7(059qRyqDEYFkk5`s|A1EI9~S^Bnl7X?yJeAO}E{p`Ts94uXd2JhON3gVXO9K
z+~`&{zdH{880$kh9H{XI9eY|Tme%x@zPZ|Qo>#0io6VeGiDC7DRNvLJ$ihU>)czu!
zY5RF5gx{Q`RfNLnu2xGJ_zPI4jMrK^;`8=6BsIKuu7p)~F=@=p$7QrEG;M1cGy;js
zK7eFCb?M5w{77dykMqTylPvDxjBj!y+CLwka^R<W@Z&xB;v{&vf!`H_PxRofms;C+
zTN1qE5-af&z^fgdJeHYFtAS6Bpa$IP?%KxnNu>Kh(z+H%OiuJ)smrvyH$X*}asx(g
z#Kf3`yP%{+mos{2_-u&r%~`+=@1xJ6g4TPyb39%*&L<k)qky|x2pN7*@lDs=i~1Y@
zs@i$_h-}*`Ss4_svHaHwHTocO{>@2Q?-2X=Ja_guwMm?ZBAncuJ`SNR;|eExs7w|n
z5xxzA1N<d`t9J2F*Ce6NjL0$$30A44t(M)D)~Jn!)BF%OotsnUsGaDu9qS3+n<O|S
zB1m^TLW*Wmsq#pgLJ+U(lSpr9$Y9ln=}3n^-AB_poTN-leV;B%-ry#+^OML|>f@(0
zzR13BeeU=h)Tr6;#v0?KHS9P>Z3ld3W)}MBy=N=>-<Ug&5L%CQbb6gTu67Dy5<SRU
zi-=)=h2i|I=T_RXSgPJ9d~K5^RB#ByG?`hnImU3F>KrA1--c)D)%|3EoYTK%fj8s`
z(B?%vN7l{X3CW}gVUasmB#NzwAlgm7+G)8BE>0vLW2~iSM4w#n@h9>&>bUH-Y`_UJ
zPHz)|YNhXsy>Y(Zt~fr`Oqs%e;;L{bmy7v3{PR7uJdKv)MdM~iBa^2QPE$$q1utOe
z@v}WcQb#MiEwI~gn)!+3x1p*f!gxT}1VgFtyKp4o<UMu)bv!0W*P)W;d!ndgsgwwO
zWE)2NB|bG_Y0GQ52h&DBRz;N%V26oy!V0s)#0H<t&zD+9QJGnu*<K04VlZphY<@f+
zwqC%)3J)_Tphw|K^E$vZjjh{_l7=XY<rVq{GDN5{Q}gT_+1B{pAirYTbDd~6*p7UR
z!gZpPDAIN=EnX-3{8%-^<T}xiv+}d7Oof*9ml$#b+W@usOGILeMBmESBsFB)*UGhg
z3+u(%wl(d2`?U3GrV8A$XWe#`r5J^Ic2{af@WA@dBQE_I?<4>Ejp&t{?qa6;@46s1
zoCT@&m8wNsD7L1FTUnu)*5F-mRPijPzDaOintcSV!RrKX{o_mpUm^H_3%*3~%C}}R
z2o@;!;wueLHF#Ff8dX}lvHd0gP1m#N7+Qn*BxS)_T|N22RAVJSP3rE$A^4jN%U3j8
zJ<6tc@_B>crrF*7fd|i|Rm2O^6t=72sCKtvh0oK#DQ*P{QIV?CWM)OjEh-%w*lg15
z%x!xDED->prF?xm8=U@kjT=tp*TxM;i!&`&Yzt?NVqKkg+8SW+@i7H)SNHd11W*S+
zo)KL>QqegoJUk#a_~avVZQAt!v>M}M<*?@JZh%ou(M*D?U_;wZ*&7)wCX55+7+5HO
zjC(>wgLG|6z1q|3%X~1e$G}^JI<t_^A-L6~pHqN(ibrj&1hq97OiubE*dI(EEXoJR
z0&lTV_hd?i))lRuM7(qJYF@_8`}E5;$T4N>{DRdZ(`SBX`;Pa!o$Y7huT1UZbYYBO
z8k*C%tp+H1>Ya_+U!c~xLjw@n+FryO8B_NaB|k)o>TfdfAvfmb82N<T43~mQa+nef
zMlf|ya^Okg!QRgJ8AGm_!)WMe#cUbMVtN0mPwHrWEYA=>RjspMpSFhPor#&EYtltK
z-iDWi*-<b6OrefzM<Lj3@YfHm=HJyLzZ0p!DN`G<WMZ4yO)(xh-6@pge!#_xVs5Lc
zzn>c|O>PX<LQ8N>^j`A7?4o6MBkJXjA}dS!Dp7Dj0YtE@))r5#M9YVo!DX11k<uM5
zxQ1rhi}i8!u+i}<k_dlO{x3yZvgG@!Fv&%|NG0UDHmJ~=<#&vR(R-fJ7vrc0XJcZG
z+ck0A1GB{~l<tnAa<jR>TddxYkKtI07Vy8VnB}!rpvsK<ZrN_I)TtZj&nHnLR?iU4
zmHuF!AL5}u8MdRLJnOaA*QPnIO|C5K5r-Wv3sti9s&Q=?*d&mRrr>`ki&V!>)Fc3Z
z&z#Yg$+p=!jy`SD<1kml!tQZZ>z!sj9ck9n^GVz&TA!(luuzwUh}zI`A4H+IAxY0&
z_tLh7jI8AAb907@Oc&R?Y{-5xwl&*Ta?d)(fmt=2ZuDTGEoP3hK|KJrnjuXqy=;0~
zH&Jiw!_NjgS^gOfbAvxw&cd74%(~wpTe9?7IbykiFTXDZL9V{}^%PQeI{Iq>80coe
zPhRIFuj&bYD16gb@+7`Xb<sHrad#zaVFR_mEl(R^rVD=~I2A<SdSSQA*^$S|XrtNR
zTyPWswBGOSWUY5U<&z7l^{~ESjPl{bU1cMP;`;{tu2SBZD?P$lm_4-0rnky%oZ&3v
zLb}NCP4>a8rZ@7|a<Sr`B8~zS3%lbAexSYPuh1q=4wain80pRC?x*Gt1kIKlfW#+>
zfF+W6aAR5C0eRpq=mFQ?7?GJZHX4BI+!ZMmOIwO_Wi!FZK9{-TFIS4E{oDL)Jf~8z
z5xYF)T+_~kl5NIQSDqMVU3Zg~W)%0KTP`kfpZR%3K3gdk`FbJE+6o!5)RRoQfXucL
znRrIAeBDZQ7<q?>23^z=JoeuBlsLBTsADNP!)%4?Xf#-9+}Vrvxw-isN%wZrBNh1`
zi81W5;F}O?2`=VW6zGTo6sY1N9p7RHU31__VhvJ_)t=;{0+M4}f&;<r(>WTk^z6$@
zma=rSxwA;?)={s<rlH_T<;NevCW5bhjDyBH=Mk){*OaEFn-gIQXy(P~S|#w|ISgJg
zD8=D1n8K~Ved^($IvlEUvuy^sZ{7B~rEmzl5$nrV)<Cjz$CVj92CqCqkL_B587dIv
zciREuQHQMb?=$8ss|lw$!`~9@sDhC2TN0A9KTn*b1i|HWC|B;5e`}%bHcdj9Ve1se
z_lJ<JM%FhIQ?P$>$=P}QT)Bh)A@G_NIn<*xCsB?mK%vB3Lb%@Ho#ydoc)a!`-i}GU
zAjaFx<IVJV>E9+;{3GL;s8G)O`20TD&+%!)9Evt6iFbPeUT#j>@%WI(Io#(pCy7&^
zz$tb(-|{%BK#6c!5@&iI#|!WT5Hh(hpbN*AACY~0diL2>s&(Pso5T(BxL(g#K`qe6
zT|f(8+m)YRRq=BX?~y2+TJ{2d=59>vSjGQ-Un;)V=lpy!=iFI&Qc=bK6nIs9w6(cg
z#m^}~NmTrNkLUI&tZnR8@s&xue8unK@!V4U+Qx1bAD)?KF;VgV*vIi1O-pvG_<IZR
z;)-AEaiY1&ZWVu70>@YUcRWrsLD{Y1GkF|e@uz^$t>VAbd&L*$ab-4&7}_oQN>ET<
z9B?xwgQCx|&$iUyz8SI&<|*>S2j<<`Mrh>a`qE@4AH084x-ePwS2KK&7FBLhh0dvp
zR450jRq$$b20oBzm>KAVgXz?rw#^eL`fQ+;Nzf4j)x9HI&-eB?-ytG)t|vA*Nvw@>
z8J$RP-`(4lml<r!yfz7cV+5a2+FyGl78eZZk|fes3Xt-Wz04yqBs8RMlHE5(vN4Xg
zQ-^ybM(~DoTQa9U5mKzH!#skUJ7hLAiO|LX!<B!ISJZd*asv38&msL_qN0A5M<{i5
zb-zbowbodgl0^7w9$~0MXz&PM_XrD;2-84tfF}Wnp)>w6xeOmmt{G!CaLuYZa2u~n
zA{OOy8tw?}=yPJq*H~*#B0N7YF8oM`5bo&;&&0AJbR`jf5g~|^xX<~GN4mr#O<I|d
z*!dAsG?39Ia~s)rl=txrBuvs7p58Y-y>4|p0(!K#3CV#;KSq6#4v&EV9{7am*;jN+
z|K*;}yd+;Qp0-6gbBdfeUYV32#Aaxd%5_OXS8b6HVqzbbSKX_U#1?yEZAoGWLk!1E
zpOeF?<VOh6$K-xz;}#{ErK{)jqlf<q@5dZ4efQ7#FG`Jb9!$>ai?Tk;)T%@UJ&iA4
zfR}HfuTFG$-}ZRbNxT){tvrmh{GyQmR8(a=Cll}Dz~eepUz@<(x_t#yP?6uIiF?JC
zqhM#HFVF0#6vvO7gk4A<s`v6O+Sp(eCh-M4>+r@A{|fdRV2xTrL?7(oih7GLYHhNp
zx7+BYK*gFo{H-4Tk|g}4z*~*rLRY%I39O|3^pE2;EtGNP=<Y3JuT$ZHBl#JilHAA7
zRsf#_uqF5c6x}dSPH!di2k{rww5c`dXcvFE;PGh^eelOOZ4~(`54?7|*Wej~$eRfa
zIm>I@8xtJGtwDRc^Z1cGr*~fEO}dp0ULX{IhwPUgLqPfOkm;*AP)#cqgB1--$EbuS
zQbS?&PW&w6XKRpuwz>=^kOg&BI(2jXAZ=Dn)emyYzMmDbv&<qnPi$w9>HL>&#|Vbf
zeDsD#?86w1tfi+I9LbA1u~7m7>-I@A?S2d}P^t~a)z3f!mDMd7)rxT!*z^67sV2~?
zNhYVPJ<3i}WW(C+bypbQF(J}R`5c1CqpIW{=FHePSK-7x+ee$YzeX{QJHAh$_!>lg
z7I9D-XYW+PiS|BMBNSGips4M86`Y`B^t?0Ng&PqmQPsKxxXKM0VWsQ|J|~e`ex#N+
z*lTJl8#{ebg0QuVF}Z>5f3VtxL69+}6$Z)OylHnwb$IcPQ2(4C-5|Wh?Ds)u;rAO*
zE2y!Fag7~k(zP11tIF-(a@E+c%&G;`BgDAI#$XGpHMC=Q27gS5Rx#SGcGD#*qw4f#
zXVSl{&J-D_I$`p+2UrdM{&f>^t3ArDQ>3fGxW>O|om6lO5WYIEC)i7MHuz|(&R>vI
zUpOYGuP9#C`2*s3KiS@?&Ts2Iu7kOXhPN%%!ImUHS{2`KI6u$rz|WxaEmx9(UJWQ*
zy!hG{D(UhqRnjM}l5U6)<4T$Zx%vA`#aKb>rhQK3Y%=$@FId;M#p?Xde_Wk=!b+lb
ze&5yAD^t3U?f-hD6}p)O?BFY}T17l(kFuK-88_QUi0q|uZ}rhuxsQ==KUcZmQM@X5
z6>-Sna(kz8@3Qya8;jLLEfp1x8phAb{A{&$|6p|*jDfaqSKDLsXjj{tUF&Fqmo3%W
zUtO)e`$}vK{j$CF>aq5{LHgFUFKFN+691x#hau+t${Jj`xx6h^dCAhFFx3UsPABHK
z8&Dk1WCSNu<RZwl2FDZ9Uu$r*4{76eaj#t@^QM18rUpRx`La}sz1O3*if}27M*yST
ztQV$)8C<)O`AtM4kHKzae#yVsjm&F!;YQ}wJREEH`;a#5->XEPx9h3irnInoMpgFS
z*OYPAdQ+U4JkUGe6YuBV)Dr_amN#rqALQXPAabZcq<KdZ$9s{zqj`tg`<8p)mk~#J
z>kxjn87jrwGUQpNn8B}JcDln%Xxxz=N`bRMk+RaYn03Q*!6z`l6!0u&ZOsXdzDmkj
z8B!3dwhVQ5Q}})r)M>;T70`X4F=vBbE-P3;PgJbs60`m4iNgEQ=4_BPddilMUtZ?2
z1&0HX_spX2>X!S-0I*KUckGTKWXnnPDmL|*j(U}H&7rzp<qF})@!2*|&rL?@4%|G0
zdFFO7=H8<`P9`w-rV6KN@hvge2mm>xbHV+DI%^!}-rUC^%r%C&uH>G%u2=<ZEuY*^
zT$$7LBwGxg=R6iDdFMvnU^nLmEot1_l<wsh0cAgkJ<5Kr$k+ltL?oK%os_%W8#e$*
z6Mx2=)5K?Aiv5*u3q+du7;yl7!`{)vRrYSn-@$J!+`BzA-=zkP1bKvbaa%ELpukd~
zIV|VSL}53S@>93{md&M6y4z9u=!KqYJHym=rg(9tZ>L<aA8)3&(j4-Py&le@8Q@mj
z#awU~xuCw)sILubJ1>KZIbaiTz!<&b@7Z-k(&!21Tg|Pib}lhnL&9TBY3@N}u`3Y#
zoHx^&YNyf@dN8&K2&dEaggQ1-EOdH8!c(e7rze<Bmn`K_kxmuGUR1U8x@5_f;3e2?
z$@Jr>VG{EB7((0|=b7x^w67&xVcVVmh6wV^zb%1C<+sTES|FUxuO!rYh{v7G_X340
zrLWGK(p$kJrH5yy^uCU~*4Kf9)<;9nUbX&ledmGk&vSt0f>-TPc84Nkt$&Qjyw*SH
z-n`b|&YRQv*Pf5vx)lPE);~iWRF~L0TEEWToz^#5xOc5LFW^XN^p1o0Ii8=bdI2v3
zN<J0jBQK!P8Xsb6J)g`tgUK&Tgrfj`c4CjVWS-ba;Pd)F5ri%1|4^~Nwc!%_|18-5
z7y5s=>HjY&R9=OC#M{<Y=wcw8{-00i|2O^rw(0+05J8^#*Cmjx>i=pWoc`ZSs8IiJ
z6z+eh|L1{|*Z*F|Kq$iFyF2}V22k|h9%XkZGOzzc7U;iwi}as2um5ea=et56rvJo2
zb&0)8|LxuDKjH9z?NINF_yOu5WtuearjoB8Y(CmV^J_VJghFe)j?u@>SSpIKy}p>Y
zE$Hi91B`4zFS6kKjlT!GKwmo!X3P*<xPQxJuW<c5<;~an8@z43)*l8!Hup)2L}y_W
z4EEW$ICJY9X6a;-N-cNiv5(Dc{|DVk->&}@qs4T1q-rlHHy-P>&8bQ&=2b<u)LpWa
z&HbBM5zYnwKzvSj-y_s{%vO7yTM$%UL=Q>wTWuIW0wS-<^!%4GhZKB;SlvalKR=7M
zCG(*jD-e*rXLp2_hR=4Z=>xw29OryQ14Xu(i|{H0$mjNQW&0{|M74p8G!QmuS|2tB
ziFJMfkRb*V7|7?p6O{;LGnbfjRs*tu=-i06^c$>CfLw(X^Yfs1x?(;WLEL4aegtu|
ze{tV*;YHtc;i13Q;7T9T_5s_ONt+ok&RXw}4KY~3gYp&IB-6Ke>1|q6lU3pS+wyZ?
z+S=WzTLb*&0QCoMJ7`*i$yE4FH;1;HGL!W2{AnizQ@!rsl-syl>wrId+5z|560pY1
z;m!{DcUuEyzg3*fb;7}oywT_B8cMJ?uOn)?2Pmo+z#<0__$shHG)=7X@zHYALAMbm
z-L#FOex8UzKB@3K1ySXucdbDyWf#Y6d1xkhW7@W-K0;7`#I7bdu=p?qAM~*;2FmtS
zrD=QWeR|H*@G;#u?-jQ_^?(CE+uRa#K1E7P@Q!=DsfSrTs|Xt>IX>{YlwZ@0OfiRt
zm$R04pt5HHymED79>0i%_^_6=Wx>@@W9XUXp*^k-Wq|Aq9;y|B(b>F%yLsy%Pijt*
z)GDU+VOcja`RVJX)Ot1v-O#pqGrJ}2>%ZPckF!1LjnGLoRZ_t4%KcTWqo@$R<~W0g
z{-QCy(;8UY@Fb^7;u)mT4)qzx$I}Nb!BfC+j4&7l5jb&snM^1|-bEs1V+)jqYubO`
zC>FJ=^<X&Yrmf`~iGKqWJuh^qoM-_d(iq~eM_hh{+QrZxJ<vXJ#<NTw@F~UM8>AmV
z@S^QBQBbigIERQ_*_ryqw|+<s1e3Dn`FFD$wr$G>Um!u|kB`dEbYfpNOpDr3)rpn&
z0arCHOUiy4eVz)H-$1pC#Cq<ONCysuhzx+%wm$MS?oHD8lyMFu=!{>ZtgaSgm9pzk
zRWxnUwz=H2SYq7cHmtfY`PNVudBjN)dlHd8tU9&KjtGr;!YY%)Sg_Nf2~!f?Xs8}G
zeD}4kAK$pmzuG2S9cGUPL#jH?{lyyK=czWUh_3VBIgh=jpJu>kh-JKMx6_^;lkWlh
zVbIWc*ibMGx&ZP*iqmX(e^DYTpGU6@`;nWN)vR@_uFhjQ{y*T<gWC7w+=PQ`MU*$S
zxefJi)w-TUN<A>VQIBBSuUj^pK1~^lIp7Gf=}~)92R@dQPhrx%95s3l{csfiF$4;S
zc?zWuB@D`Mj6zXWF9fcE09@Gt0^9Ul_~~Qz9q-v}S=(|Sx=@+Bb?TAYv0AnB#d_@e
zd4>tT>c#wwoyO0&FYz<}Dt;!c;b-?v{Os{4KNFAAUAUF5ku(0Gpyn>#wNH<UMmz4I
z9nlpWsJBgUYH3sWQtZ%O)E)Ar*dHM-xX$E78UB@v)68AqKEpYE{WWBM${|yb$puba
zt%DKQA}_9*q_~z$kA(VjK`r)Bi<3~N0u^2y=X%9j<!Twe91cgJBF`6WFX3D;`cWD&
zj*pg=$`sC(y+4{8MoO)p<M`HXUE|nI+T2(P5{mhYe{70pRlUW1Fj(SYMmw0xdxM$h
zVa7O^lX`=h>R~k1LSFm!22<`~<m3V~xHp);f8u!F#lgJ)aW6c#c^K6nbe`-EQ|>M}
zvpd8P!_OVK-8KBv0$8V}{xUSw4^xV8buMGI`c`XpYS68FndM?u)Sji<11P1XE}Bao
zpd%oUX)X`lNNisq50{b=&8#%r+*mHM(0RCPlO1H5BE99OCLN#N_&G^Yn>IakUn^#d
zZ4YktcidE=A93zY|1hEDbMIeJ%qi=Rmywr^u!%oxJl9-f<7Z`yw1Vl1O`!6*MKyRW
zw7_-k+Q;dZYAe{X4)c|imZYf?Lg)SzU@C*6+<A}E2q&{}207q|Vs-uE;|4q7^de)b
zDOhPPj2eOoo~qFUp282BnWlJ1dr6a-Od%7K4XyFyQ?|ypoe{g^h#6btccH7S|F`_o
z&lU2El&g_)u`DsgDCVMr3r}t6+WDgX4PCp`jo>5Rx!^dy5V4x6N;U4L8`XvXauO2V
zkEH$e@d(^mElTh@PLMl#$Yw!)6G#%aH#pr0Ra<0s0pnGzHvca(e|dz@yiqwzC&xvZ
zKTJ|V=64BFnKvqDL8e^hD-5oe%=4Yl>f?mRf2yfnY=3K_T)(r|nPYppdz|bZ$M9fJ
zOHq|B{;`h3#z(o}!?oD6?HC&|Klct{E2mQkmr-^DV)7e8rs>Rj-8mVashW}{ckob{
z>x`Cei$*bdP*ig9k+^DaLy0@PmIbegd@jiOT-XB~EV8H(i+RY8D^igeDP^`@PvW`6
z8VendK->{L9D*x|H-biqHF^<&Z4ul<;oOM*ctiy6Nk;@n6Ke!JFM!M!c{4II4JY_$
zO`go32^)TMxD9)E*s{pSLG&$w+=R#8M!c5R(0(xd){1=gFPUxEX3jt#fXNOu7?)GL
z&!L>Qm3JGQ6E(50Gi_<AdX<VBxCiud!C7#y_-XvY;ABGGY55^7b2ws}_S}{E<hjh~
zHozxD;9IS@k|k<JQRTf?P<iLXm3Iz8+6`*B_U!o$DhM`&)Z-8Wycb(i{f;oZve|Kw
zj=8wiVn+OuM^q2H^(Vtm+A^b6x8EVb)$OLZZk3-X`TXu8X!+f2M1r4KlI52nXjUxF
zZ(oZUaj=0pMS73{W}M%yB)I&(Lw;mbON7s8CPB++s$mEFSdwM*W>fc!en-r|sTuov
z22hUC{|Cxp$I8<2(G63M>3H&RotOaNeL}&h5`)Xq?5USZm|gt#2grLEp`J<<d$AbK
z^y*q9(<tqh<@s+Y7((P)R<{<Z^HqPOd*SpfF6EiYwhR9E9FC#i@kcJ*Nyov?6pgQN
zNo3;g6+RZH=|g>Sf;IX^1dLIh^hkU(n#31e;yFHXULx^9mw22{ygHG1J&8@tg;68E
zW$^n<5PWXn?)E6#!ydsz9!F$1h=VXj;wzkGvqfiMV*yja^N);A$w4ZT`!@ubJp?m0
z0dtRsNk=dP1an{lCg)*FBbayjFh$c*37E5iX=tyEARZOODG7*~qOw@>_uSklm~#^_
zqb(=dCl7O(U@lI;{PST~s+tI9j$po<fO*AW$Si`HESR4pV15fsLwnx{Vz3~7m4LX`
zAap^bg!kbv03J*LTxbBX=$;Y8qX~#wgNQ5OE<rq-fY<{FDyb-DH7l4m5-<Y{2HlOA
zJxeg}C1Bot$msCBKrg!Kg4vvaS?gf9xy8eb5KM7Xq0;;mn1=Sasz2uw5KY4q5SJMh
z4Lm%Rmj$z10%nfOiEDp7%x?s<Um;A{WMDGZV%0j;7kJoj33g^7Y>+m3HTgWx5X|uj
zn73D(1Qy499W0o06EMvV1~<azwUc1JnSi+gn1=S62;$SBKwOi6_=Zs_%5(FgU~Vde
zDLVleS2`qBSi0K<`(OfgTnr1%LfCH#_OS%)rd1JLnn@w-F@k+D0sCAGYj!U$;avp#
zb^`X+7`8G=_tPQ3ew2WHS5bYNW3_S93vP&n*Tco9JE+GgrjNoA!PfqPsgq2fW~R%m
zs{PpCxoC2O-355&5ZP_6kE$c`P;)dS0kn=$QXAe}{wpW)?kB-4qp|2#JAZI?U$W8k
zfxpYSWQh*A%5|xvR!f!)jNWu`euleCv64fag!OT!43j=H>b~wua-JfB)M6V$PJb&J
zo4L`7pJiGr9)O#aSzg=ahHdTu?+%n3Vi`B-Y4-z8QQxxzbX@2DEssjH@F7xax77>k
zP4?O-n#BV?YKPC1QMz3+M|^9zkaUt~X)dTbRcD{ht5(7z+InLgx=73Ora#(HbC&pt
z*2ublD{YRA4<vA0Q&me*Ri+gVt@E^*<W9+>g5IY_uHUvyac6Qcvqqe`)A4?iCByKY
z`7N96-MbLyMOls<vk}ndTGIk*4_OMFH<x$r%s8;3kIUuz#KX1QVpFp8zYuEF(O0j_
zbBu-*p%E1|$4@^DvPBK;8<0+U=Yi4iv0O({b4IFubRtsSsTJsYvN9d*9Hv`rOA%tZ
z|0>a{e4cp4h&0wprc=qUSkp%3zP_l&nC4+tEMhpt%V?N`ycAwPl&RW%;qLb+`;>TB
zv5gEViA{n^$;(v(3aA;&kE!<0N|lwFt}4EXq53$@vO=)-0YK<zOg`#Or?k;UHvTTd
zwW3MG;q<(}i3a9veoWtMMRF4;`~-Iy#ROY4LjzGoxNyqd&~pa!Yi>Mey!=)4(T(L9
zimNGN*rxcp(`)}VR_wY7OawS}cI<0rHAYcBuX>JhWEBqPN7=(>Yxv?Drp>zP*3WKI
zAGUuTu8aHBkLP<;>CH_4){l0yCqsMX1G^rUTAjXsVX9Fqiq6+JeX3bKo8(D13c=m}
z_bXYfhQeh7({Q1DCN70?wRFJRdsnVzl8tael<;jqhEfC_>fQ*nzc_P)H5H=K?TvOu
zgX8s+(1MK@Y3u7oLT_K(%~P&#5w#7piBj@o@E$kLCTT@@XkQ)kkx&3jV}C4wh)l<r
zps%e|3K8!58e(dQ(S=Ddh`mH`xuG;mcMU-r?v~dYqv>odwv_pUf-+}XYt#i%V;X?_
zoV$#yhIba5b!5AMbxN$*)*7?gRvy@pu^}3Z!{tJv=VTkX`kiLiELCVRXbCTV0=@nZ
zz0?PWenoSk%%VJAqH3d=_Y)mC$s{jClTaisUxHX}TpqVJk{!?1aQf$HkZ7B<TriSW
zqQY3vd;UHKDO%ZkItn}%1sbEkgHhn#C~&(4GC3K{;8(nO83ealIQStCJ7F)AbG7Wi
zH&a?F3NBYV1N=B~g%anHm<vuKtszWjgJT?#*$x&t2Zs}ElBo%+uqU10%msTAGc8q_
zN?n}J1y#Ig;fq&Y05P(J`x-_fh|8^L7+`QlE3zUJG?QV;15OvYc^$=1_tA|D6?WM|
z#e7tLq&I=NvZsE{NY#ivJ9bU>@ocb~2=+GeOJ%AjDOtKu?NZXta<nbDg`}(jn{rCr
z*)B0vtc8M+Fmg=EgR{h9FyDwXD^l{n)#561#+qdoAni!fm{^&=%jQwst~-@C@i@|W
z94Q`)?T!}?hu}B>KS=OlA7G1&YVgl{$EQANo4+P3Va9SfGnQeFRdF#=F&{%zu{m|I
zUH%9o?2XJ^=W^~fle%>sw<AcC-~8SGsq21!2K8|2c8WX>Nk2PZ(oz17->XROJSr;Z
z<-BPPqqlN?nY4U4kK?UZ7V5`Q#&LqRGFBSJU`HNt8L#OWPDRA${Eu}~-w576?os}2
zB~2K#?DMQ={wcejGQ3H22VXlOEqKv`P&2|<%WL+j`D51!5Ud2MuBr-t0mQa#Q27x7
z_L1_7`#vcbe4h|ZW`nB;pbyJ=pl&4(JU2gE_Ep7ETr|3#VCS~9yEz1`0e*o%TFlHK
zFn@n#`!iE8u4v@jPQji;s~8UkI}>tWOW7E684R-Ipg)i6tdyT~jz+A0a<^yoeFARF
zGV2T~7hl^BULn#8r)ZU0SoSFuJE9=4VJg0+6>p=vlNJn<ZF7_|+0W$%U&j?K%*-#F
zpPgHEvv5{O+gXR}w7XLd%Us9%3~aM%_b}SqWmSijy4mzM4U%@jt!JdkWkFGpSu-ah
zQLp3D4Qu;=pFM7d-HdXWwSk+}1`e~`p!Kby@GHsCW%&gow0xlfk~KtT+~$ZAh7G<T
zWv{Nh&*(~*?3?JtpR-+j!r_b-<#k(6PL0Ns+|^vCdVBS?alTQku$d#@2vqokB2G@y
zUB-tMWDN<*1O#r-n&&rVH()c)SZDbeR7umUsugNehh?7``*QZPXbt{Z*5Lo<gs|Q*
zCh!$b2-l(|_22KD=qLy|D%e&j6js8cs^S&WOp{QaO*I!3Nu@f>5K?uA7_3{Oj$0GM
zlg@HufI*e&aG8B}AkXVz;&q0Z%=(uFXlgRm(Nf2meQ9h<c0&)cQzXk8mf<A|;nfsq
zh}b$rY#oyF=I}cn>X3qJxA2S^>+$o1aDb?o=nlDXhQdDmHY;T3PKr7#DuwEzh6~-h
z732WdL%h)8%x{tgMES6;$Q%?kBWAw6Sk$R=RXiLB>X7V9^Hpriy5mN~pq_+uy9fSY
zSy20~##GwE{MIFdn?JL2+*Hzvl)`iw^Roo|UKk;AwU%d><tnn7V$6(gliG4CoFi`5
zSR4h0DVB7pQ;$UDpv3vlo>?_xKEn^+blv!)Wa-hq>w{q@CgtcvUv+?KH64#c$MxBy
zSfj16Mq9FUl6>a|mdpGWmCv&uW-+L9^~F9G<s^|JX-68vlVN>X5yMs2!&CM3QNl!@
zP$4Z*=Q>m=BQw{vEN(951iSK1becD)t-KaN4>xErPY)<TR_=MB$5AIaa&xNWr$SiY
zp}Y7!R>!kc6PEL5x65)iujv{n)+)qWMgRIe1y!CZ?HsHUmp^NUwp@J3!3fR;Y5vY6
z=*oBb5B0QX5VyH}fZ!_{!hSe1+NLF<W_gDpfIU9N@~UK>S9)uT*R6C#^#{29Ydf;P
z&v@!x9I8m~?ZmyOHA!<UhL=c2B}>(t_Kq(`y$|BVDb9*lNp`E{em9CYn0_6msbRO{
zs=SFcsZ@A5abj(NN<AP|ztBaW?W4^}V&k~Wc#zfO0AG)T`lwC@{j-m&lQ$%2fm$VU
z$s}W5SBdRjG#+7dNmPkTd?kX_v8x%1;MHIHN=(aOEO80|f5qajc<|*XE0^?Q)%QJs
zs_N2eN>(%ECmgjQm8sZq9mUdkELP%5J3XKS6IJ)+`a4Z*ka)m!)lEyy`~>+3sPCfl
z?8$dz#6mG$DJ_tMKJ`Q0{knUz(X*kspUb)0$#Im$4K3iNhYYFwVrz}X`O3%WQH4&1
z4S(rt-XLO^eho6%L9*Thyk<N`%l&sMXq75rb+Ks#)S5OS^01Wx%6+hPJfwQstw@#q
z{RcVs{#2De8yrFGYPEvKfS)D~z@)+#Y3t#A>`PsZW^QiOyrlb5^}{4UsSF(F9&Sg7
zh)uWnx-D|`WO_k84f1+)(Oi?P`CQKdtI92Ql}nW&xWdXEM2QPxedXHSrp2yuizD^?
zp_=s_5j3?+;a%;X&GuavF9~RKLn(Zo5b@bf2M4LX2MxT)bg<ZTaQy!Sn?}{SPIne?
zNo6@M*Zke-;Gk3;y$6yosjB|{OQMtJWDB}8fcE|iO1Heo6w>4}h<aw{aQ3pQ_t0QB
z>!9rdeS`km@w+jz=B=VkpEjHRdas^Yf*>qPq%bj%?%W9_+{lH%FOX(V@%JR&l`ESE
z=u$F>hcWR<^k5sA&{@-7l*uh_Pt$v$wqgB{M0`j*b7`WABsPw4Zs?<)U_74zj*alE
zIzP2VIUC}wX7rigU-JY>7Og?|#=jU`ITNE54i-?lPn*B`8ITZUzN_F4<>dZD@Z5ey
z+sx<j&K4dsRhn*f^C|IE?0N6oG?CjsAvydT<jS{9Zs3MIxj8lil4bJpOosTj+e~gi
zCf)_t8eTZiF6gy8XZ@7(4=65WEMj+c-7frG$mWs0b(7hP&R(EO*P2V$x@$@=Ah*sV
z3KE9+gcFp&q_r^A!W)PAglS6Hp#UQyRVBuw*>-BoX6v7!GQ_f<dP0Pm!i{tD{%VCS
zoLg3PHxBoiU7bYtmDX)yXeU<zX33_wIU}2(_Igu`;e&$-NRUaA*09FCSEF-GVfN>t
z@A|Ejl63qG%LoG#(AMhuo#7TNKBFa`ydqqMyn9)+_V}lPuY7E-Q<?22=gP`YK71CF
zPgh*`*?8@Q@hkYd8-@e~bbpL0z}os##q0Y|xY=1IN3_{j6Vo10N9J3DFG6WdOzBUA
zq@KFJ!C1DBH`z?)5J$H%#(xleXjM|qsyZXfoHU<4Bg59<lTXK|_KeA1Wn@(;aB9@f
zfLdXhY^${4pKSOKf*%*KlP^>C%9FlyL|OAZ?JQBjlu_CqN-=}+sU71WnhvkAwq}bz
z+EC3boF*%!uwM5bqu;_LO@-}L=hvV%l{v8Xy)R6KFVmUXWU|(VoT8pe6!ki@5bRzD
zmUB~{rA&%a4}8FSJ5va<n`(;`G1<ii?-nSg_HkK>E>fQAooznzz4;+A<QZ)Zr_s7H
zS#D$1$7ZG<XFKgC<%>qiikq}?Fsyq|O$kf89)WUZ)~u23CT|VDOi?>`%D#9+_R&oC
z&G3nLKixcwtqf<ps9ODkAu^pVwyQM}XhN7QZX1{)KV|w{=laKO2dObrCnn{PcWVKQ
zy-ItntQ)7D(ku$U#x_#&J|9-}oCy!)r}ZGq?g*Eib3!xu0{XhM9ph+sq0t@YbDAW%
zPfF<ydd5J^Tic{Cxs|$B`%ke-QeNSkalECX`5WJ*kR300K!ng5UXQB_$W#!gGT<iW
z@)p{g$u-NpLDIyW7L4m{an5iS;o<0tv{XmdlL96!O)%NU&HfjTwq2F1+OM+)X(XmX
zA|_6zyOHTiHMh?FeRNC@n_!*RyJ~RoV+n3*-bj5&DNO=YqptbIi=pP^=cPJ#2fjFx
z{h#SAGr97(j-HUwp^kq3_NThVw%F_HeSpDjv2#fpUA^ro{WSjp`e}}&Ecloy$7zS9
zT=HQq*>(flxgvV2G}YB@oyAmOU+Aw)&xqDp6sL;V?j7p{wz|$jc?%aF!Mc?709S3T
zk4B4FIcMQdCCM*N<W=HO?by-^27*Db);sOWD9Hq?S|^gql%+3Nyhyil3n_m{z&iLT
z-4vG*a*>eCXuXSyJC-JUmaNHH+LNStp7N`-_rR#KwtOj~F?EeGDke!G(h}_@9j(;p
zbVHF=Vq^==V!(X7R$@w9vSf+aw({V;X~)7v_Lf`VOUbQfm2|V=ER<k+wu9S#R_$nd
zv9|GQ;%x+L+7<S*bMKN2q!E4HI<*sfhcXdo#1U>q*d<0{Y+#P^l)@FAX!%$xy%AL_
z`srwb-9juwuXO|`c{fHWC?Q$?UaUg7aMkJmx0SY6uyw9SwDSBfth7bmv3x@*g9*~<
zk8XP^V1^ZQIp5{=!wm)*p$fLPg-)sZOw;U#H)s*f*DNEgGyNoLc3$~Z<7c;1Vih*I
zvc)V@)KZ*A7Oc>1iuDovKk(ug+Ip_g6*j>C!_`9#N080i;xV)`*ITb0+75zw7OkRh
zeHj)zwjouw<ptQM)iG^I6_U2kdT;2amH%7ojnBT(Ypqz7P%+UlA5&5);RN-sYD1YT
z-s@8BAhC@4<65mD%+W_S=FK9sKx+WYhb{#qwQ@1`J2SQ|vwTI>2fS}?FB$ud4@<^g
z_{Wm5=RR99_RDKZ#-8-+lCiUYUNZK`Yf8o*az$agRrjp}39T%!ke>x>iqtn-SVW!r
z(#0!L4oFSB=FDou)H(IrXsK{gA0?TRPV#p1OjHt%>4}3My*JJb)o4r`g`JwY;!%~)
zb&;rs?a4p@U)^()P;jP3?D2sew$n#RUf3Y#K?jP}fi`0c%@A=Dia=dgDE*?Zbz^DW
z2F}QsA5Dpeu!(BhoZ`EREOf5W7aYi=A_uE;EC8I3SeM}pTiU`<;BLoMNuxGL&7(}q
z`a!<JEw!uZEyjhULHk=}np~5^t%}d#u?+p6<?<^g2)pN^S;yXTQEi4SmmF8s&W0=3
zzSNMq7!$&OmyXQ5y{weUt#<a~6QQwvyPK!3|AU(+ke;<e;q|x~b}7_u4YIRR;SGLe
zxXVbrZlpHk3BK+LzVPo5+|x5=+5+L!l(kkn(N3o^FuTPZ*4dUHO_EhQMW*wLYR}!N
z16k*G{Mn7N{H|fPpI9yE!onUtG>2=<IhMYpThRW7M=Px;U6RcPCj(?zz%mzam^k%|
zB%G{cMSDhS;Nwaf+q?)(i);-%-U@|Tu8Vfdt)5P!FrT%losZarm2g!MSF;as#j+6)
z29NKQQ^JO>nv3}~i;ww;Q5+q0jasm#MzU-1Ssk_QJ*K%oPXQNWTFj~>W~sxpJYOao
z?Xc4ft1<QvuuYcqYeJ0*xdcXuI1DT~nTey4s#Qt8jEtPJkE5jNf-)JoDbO#7Gs0EG
z#ibfi$gP!pyCk=T<s9oVtyF))yHA$$Sz-z#R9MarAWAvYaXFs{)|K-KLddw7W4!s&
zmXZ^TNl|Il60Iq*%WJbny0USp&N8V%WQbBEnc7$+4Z7Ven7yV=n43RYFTKEk`bjGr
zi$yLi<z@iYIT8KEz3}5R<ZDBcrLgXeTwQ<3t-5o(G}CTmD^l*bzUTwUL+LuUk3O(a
z|7)|QR2Q3~=#a=c+L?u2)OQxr%WGZ9wLk3@tdQ<EDn^3x3BfCO4)2s?MN|3-R(jcD
zcgbyeWQWC9Ia{^s&05j-=#QKx$X9R9e6n8q?#gWi(KG<OsS__hA`b7rXqv*M44`<3
zEXKJZoRob`L<-sE14gj>*z%$M3?W<EaR*sNSX1X+epnoyzvuvi=|=QRJ&C@EjwgtA
zI`2(v))Y`Ytapn0^`zL)gQA~dsdS>k9!`+i<~*0%S@RAEk^HCN%O6X%aU9TFab)lM
zL35N;_w6mINeJEbi74IcPU+e^Pcu`C*j`t2e_p*_J5?YQij!?YW!_u;yQiOiI{Wx1
zZ>{-Dzx=1eo*cWDYnqC-S*F{`-a|8AFgRXb_~b3X!hXcP2h&m4@O@*r@V<<73|<fY
z^Z3-xcrXedOnAGQ3Kx3QkSOYZaT&Y%cOt#%iMacJu2Wn6w^8IX`N)+T9*)<x47%h_
zG^Fh9cY$~=4?&SDB+UxnXT6TR%B6yxr^0=?3a<`-YUM@yCf+Z<cvq<X0BVKNS{Z0*
zdMQudxLT+@U&%)z{Bpaq3*i?z;a{6Dk!dQgDBHG-o-0?jm$2LO*o(OVuU-<^Q3)g0
zMGlaYK#?LV^N|$CCW|`mq)f0{(a>JPAZ|zSUwOxv*BsE~JOT;LJ|QZ+E7jCIjHlDk
z)xTa+zZ&?aLwZRrsh=!v&2q42TjG={-Kbhok2M<21;1AK1qDGqc28eLET594(`me9
z%idtvubXIO<(?H~*EYOWVu3Xce^j7i?BhNkH{yC2yPU@qzwK`)^NVC(-Wo`z_6?BM
zU=v*FFBhbVTzw<mTH|f}z;|(@hS)(n5SoG7B^SIyaCc5Aa&6J81X+jScbXzD>b@`Z
z9x!heX4b0r#|C~2zi_QRwy0{lsad`Imo--OlOk#Jqu06wf8psoQK5tVzB*VpK?CjC
zE|yCY%Z^qs7u1Nj4dHVz?nt~R+6``-Y&8Z0Hy6*tx|m$B0|+c4Rb0d;j=%M%f@$nd
zOl0sO;?s=9K4v1_TDAnE8ePremZH-xT0&FwO+;IZ&rcgLVMDfE<ob6@>E7XVo1!v-
za56u&a*t!9DJsQ@`hw^F#S~R9qbufiTz_@7u_2zd*Hr@_>k>4wt#q*(Z5Ql|wOJ#<
zR>rWcH8l#`EK1b%eVB2Zy{I^Pr>08M!=qnvGZ99D*>INwy|#Ihn5SAxA;L|f5>rD=
zw}~btdpMGyuNiO+x3Yc@ajvE&nqbS;)=<k+3g&kT#{84u$tp`i{1>}&Ys`@|I^>UA
z6eIS!D;F49PicZHLw;ATvF>BVe#6?zSOD;G$20LLnNm1qa;4B7<{qQuD(r&O{wv-K
zDG#i%d)~&Sv#K&0B-d(?Jg0Dwd<z=n2gz@O^6w0iZCGJGOfJ~x!Ey9bRmC)cGyQnk
z3|epF<qZ<CYBL%y<IbtNg5tMmL~fAG5|(q@+9^5=v#J&R^^YVYjeoviW8?{pkySd)
z1?Z{9ilS}3m{%S59~YB)jeIp<GBpSn>^2jy#ggqM)?LZumb#(^`JxT>MH|z-Xfg*H
zmUX3cY)|cxv*GO=CY5jL4M+U#(T2y_JbK4($2tE1RA;~ti62(5r<7Fcse*bs7?J+v
z4T&`PF%)qx*7G(I0ck{>#<5|RfoAHMt!H}(2wxLqHn>lC4NNeT$wuVf1&bT|)R(i%
z1~|?s@co$Jw`_9+c3)7|HRcZ^Jb`xV+A77%WKynRFCR|y3k6<|KlmODu<U6?Ex|B?
zGUT7UX=F;4jI^F1__KSj+l934JXv~nyWfAcyqLz?eVvIM!>mcTNn4v)a=ys!-Yiem
z;p7H4L4y-i`oM2<-B=>N=Ob7SXs)9P2UqwAmX3Oy2QFE%LJETH%9)F2wV_!8Wkf=R
zH%ClDYCxtKbl+?$QH-6UC}$9KqAQM?q%@#39`lG(d=wpi6jkG*xLz)b$+TEC_bHg^
zjI33#+Uj3iP=TBcTJm=|5C6h`E0f7!PHNu+NYCZtk|j??W#mkZD}W{{{pNfdajkvd
z^?Mlgj5lx%&BcWfHx@v+;z46*A;jec5U#X9lomqFEr4)^2O>HoV0;`<0Fg2A6yjHq
z8i~dhCVKSzr`$Krdj5-P55eL;n7Xn2J_Z5Um5Icj>taim{LZ8jeA&M*)zt~4AIW=s
zC(3QV(dtidkYIAV?`Mw@)jXOq_>19JpZaw35pH#3uCN(UuP46X^J=?jt&sa0Uv~{?
zF5wRen|5olR0<x>_^Sb}7m&@G2QL!Lm3{Zuv`X&5<i+_vJ34ln3@})!hplMrO6Hwk
z2J|P2a{5GnilHvM)?n3-xn7!{%PN?(a#x7kpNtD}t}jID(L^EUvEUeutgGGS4CW@7
zpHHr%93v%5-T>bbJr1I)>OHyYB)RP&2Uf>xUJh|9pZXpN>S>Y}+`QXK<L|@5l@#5U
z59?&JZU>)6t9FjjuhKL87{93Gfydcy^@V%8-8pmZ-Be|3a5h-_BY0*$czQl~st-B?
zBv4mL^WefMpFc3Sx|+IMIfb9;E1jKsc6FuMD-P+aTDN;-Q#_5~ZyDPRm)!~Xhj624
zH3>UBo+41Xr(Sg$vlrneh3Q$X;;JdLj9sp5;XP6hqP?Xe#l}k9GmsSEEq}4kP7W0s
zcN3^g*m1C-Sro2e@zBX^2cooTIQy2}<9YgBn>L48Qq91~l<w=9QtKK=I5(%Xvxo)y
zp{~+Tdt8fs>sQ@D25Jkn$$H;Wn*!1QS6s<XC;Sd!%p^*DEN?IKmTVd0;GBd;p}3au
zkTA;X@3xk4H!rSbY`(`D>McZAf7_uk2C^9n=^c3L0Ax1!YMgu#$q+t^2z6|d@`(!f
zl=1+}Dk)`<H6<1aRIj<<k9T>2E~FoE0&O9xK%k{}BG4(M#sYmucfymu1o{f$ZUP<D
z>IC|v7wE#IKp(f!N^qkmaw<eth=>Wambd@rEh*4fLKEouLU95;R~Thga0<dHyf}g0
zt>%&qjw8Z3Fo%0-4vnQ*8K;f+_1{9Hf5r29U6R)d4WUSqFT%k|GvArU$CE&xuqTo4
z#fpiwjqfJYUbD1PmzH`gVW65wqyPJatK>D<U)wl5nf^1EzCKQ$oJ?Qj(six9-C+~_
z#zK!n^EL}HTORzxLQL@o-?LB~p>J8Jnf>hPY;o1}?5ERNy?9otpUhyS%iye-*hw+5
zqb;-^VlynHO!p@=gOU*3-6BImV=Saxcd$@14xM%bmipXhX4g#5hL-!{WbQY9B(Zkb
zjq!~SB-55yn(oDi>$YUt0!!0<_@w<MnKp|wSh<HpI2F@3xuBT-A;FRd#Pn4blK8H$
zki>V9g;e6NSV+k82tj8(mit%>+7YP3l>T5FcTXvfanPh0YM|Nks`Q<JWZ_?#nQgPe
zr&|)bans*m^ueINk&<rICes^SdIvYs(^N@cm`p!|bXvw!q|2sVolKocYA$$yMAB9!
z)5cobPhHyjWZFPcZLn*^@`FO#y5M&N`rB;GE2@9TfbBX^Ne3TqTZ*(Vl%sJ4B9x3s
z8Jr7tBLSn5=DP$AL~YVFIqyyutTVL)n*pNn%SVWISTMEYf~zwaH@AwjSiRFpZ?lNd
zMOnfN*V5R}@Qr<0YeMD|KV%KWFoo1~{LI6S2p`}qHI-MPV~I+-czEN@N=$9X(NOM}
zqpR$3Th9UE3oKRO#T=#U@{PmTi^)4_{kYQ7oF2H=$8sl99@ellJ!L&6E>F4Rxp7VG
z>RjYGUzy~*UdywVQ7#(sh>nHhoq}_m8S}1Cx~Y9XBvXrBr$*C~b2Q4;JOiRW6K4GW
z+9g%%LEcjyi}lr=7x-ea{`D4H#@3Oy?P?RrQ$*5VagdFUq%ZhWesM(muwv+mg0?vs
z$)P2aeK}lAlx+yKj~3dzq+|9&21CqFMmHN=qFIRLOR5&DU|DYJ!cB?a8=5N>w?X7h
zGQ6DlN3BGSvQ5<`ORf-FlyneD@<26sj!BvtpF#n(2yeOI=0VnG^~P9k_Re-b6?_Fw
zN9S;+@UxG}AGG{mM`tqGFmuN99Ab(hTZyy+c8+^UwbHq>N6MGw<`_?<xM3aBGcj9S
z-b5<<BXcXPUJ7>)k3m=bw1pNWXr-{>D>SOTj@t@LKBK*R1>T^Nb+5o*BA{q>OGgvR
zp^@s0uBx!|pJ@`Qtwg5ft|sRokxX=XMeFA0s7srJk86KVq4=sA0Wh^&?zY<9+BveI
z=0Bmp1vP&#HNR2}pt}AD4~2|Y&ALru8gBz2u=0}gqDf4}Nw7CPg18#|G;YBZ!j|qc
z@T`8>*aofp+?Y>4wU=}=ld@Jew>%(|C3GYWEu$yH9^LyeTZ466R+@sJrevm0ifkIU
zuotSPzYJJS|J5E;n4Vm9OE*7;yrdXL0a4s0Y)@{1$o(*m;HBCLTf5eru109r2+9;(
zI3G2Cy7_9+?GmXTbGr*%tgK<d-0s2%c7au?5L*|wDa@bW0-(s8MN&HGhqw@L3on%O
zyY($gf^xX1(AF-GVA2R$8vo~KhGYrd-4XpMn=+$*RE_^DJKDO{(HI2MYYij%FXpvl
zi}E+tyKGEdApgop{??}LrSQ&)>ezs|f|J+vRC;7hI>%9$?B*z{a$0((ELXIR(M2)J
z(Tck^?8wNshI<t@=lUj!WIIWHY5(tAiW?`Xmed^l4)VMqY?7jd`!%XQ(XaJl>2~dA
z$Zr?Fer4fy@d^W-o3DCPWY|TKtx4CK4igd0xaVq!DcnHoULv^VnvRY;ygpG&b6Of-
zB677F0Y#{^{pbbl>VIulr>l{I)r*J4k(C*l{g{{TI~JpLV|O8vgmYj~6&utjZRa_L
z>9$+uuPOQdR+MQ6lZ=<LQ>HIdQ3++zN_^ZmpiIV{X;j<}EK4?tm}T_(92KJ1l@xR(
zZs`Bn{U)bBfL4h%dFEGACYg#~-J9K&E_RMAFscpBW`3t=4$gTFHZiZBz!FB0&{<i4
zKuv5H1520Bf5`Ko7mgrVuYl#w_X`Cz%FW058r}MOl-XamBvs&9M1p*ty7Jmkcb=;S
zwSq!H(k7w?l66gi{>QZxElE*4s#?t~Iyteom}gi1cE63JYCOb(&9@L)>~vGe!Mkw9
zqD`Au;Y_4fPvWOB^*CPsLT%=%<+UK8R0)ffuuKWN3F9(h)F|ObC5%*Dsp1wYu1#^X
z*862u>XbeH>Ws89)XqR|R@HhoS7|rHMsV=!kd4~_N%JSb4#AQK257SW^*x_t8(+bG
zko9g$!tb|EaGVib!##}s)Tz0Hio8HL7tzi3Mz_`E!-#MY6NOTX#~$m;{lWI>3|9^s
zE=4JhT)W7;H!fDevDa?LXLtkaaZKfNY28kG^r;)FN8h@ELKIlXE&MRfTm0j3srl0u
zr|K(6;fOFYY!)fHDNpJcNQIZ}(N8m8+GP6Z-gYX@Zx+<fnF?Yb;dGgFsI%5(tJ7(C
zc!z|){h)7Ted-28xp(R^mVm4^Dh|$Latt!8gfxDh%v*y;pHlurqJR(i6l<|4)fCk*
zb}(9~CnsByY&<=Q*8pC4_wM~t;Xi0nvlx6)J*ao`wy^1&+bE3P6*j2eP9LE0Y(j`n
zl8u)A$VO``X8Gu~HIl2}xhak8!VA<ET2qV3-cANJ&fD{AR;9y04KMxInN#iwNF+@1
zzm6+IETuI(ve>$vDbksYieIhbV-u}Iqd;2W)tcp0_+do*Bm!id<*W4@5DNds@ts*Y
z`LyO^nh<Osz37ll^%2=F)NuOdXCY<hjo>JgB($gFXevsuay#QF(~Tn-Vg<4XLyMDi
zI>y4#>5d^PBw~o_!EM<ZKer|6{2V&4E`F*D_|exi5twFA`P#y=Ah3BZinuKJT+=ti
z?y@ZSyAO_C7QE?$yXAvb%Yu76TII4}o)7N4ELiM=W0nPVJ~(<=P~(GpEDQGa!Ewui
z4Nth-#xDyN`79<Z3+jDv_hrHP1SR~#HF<ly3sIPn_n=U0{Ig^0vJErW^hKe9GDyo}
z=z;nTR5=-er#g<NHA}k>Cv}5px}JId-Ofl)6!|k+f=!yyXbJw|CN}uMglPX-KxC$6
zB<W1JzS%On&Ug#1(Ib)BTL3AuiDdTmd}g2C<ucn(nORx(6ZzTQ$zSTozXcNzcukK4
z`36s3hrb_Dsw>O&p8UZg&l=T?s)I%TBSm}eWzxdoy^@zXDwe1^cZ*S13N>p}3<s0f
zy_T2FFx-8=Z8wk!Y@>x^c<lIr2DoZ`b7*_Vxos`BwW3B_E2hxT)V40Ex&a{l5xmg?
z7QC6D*dz8f9<{S(9F>8kd4v^rm7e@5Zh->CU9Bg7id(1vaav{8pW-f2fVk`Q<S#>b
zu>$-NywinJ;hoj}C;?o%bHvA`>Ptx$oBjFkxDTmha!ab3dC6q)fC)ctVY!ODwD}h-
zhnscs4#bkGcArv7LP!|HQOzv~Rqqkjr4kcL9#~TKJ}-!7kMIoK#H`D>;bAAHlBHN@
za-UH(2kj1+oFjM~!GW!&93SZmj8wu-*Y=UFeA1%nQ7Mf++Gr#2gU$<5-H6taZ7>iB
zT%V<FbZ&5`(xTq&m=9HAD!gO2eyNV%kXZ7-Wo(UEewB%P)^fz3;YIbK%^UNuM#mX{
zRC{G+`NJk{*Z(ZPtm+blIREjmRg7L3g<e*Li#63oRS%^5in|-31`~Qvn9Et1>&9})
z((&SRh2;yRs=m)!0;+EdsFM4%H8fX)shTBC4+*Ewol;|0_ZcL+nD~4hOXoZ692%m{
zXo6}nF@Bs>!>h>1$#VpVkg6skq_ElAq6mcDVb#QVZlhTHLawJFkJ1Ngin$}pzp&#6
zB$X{6!zBh0Ql5vJp@m50Ai3QY4l-LyClMjh6Gu5!6e3lEB$-9Y+1e@qRjpE>Syl5?
zsfc4z1i&H|OM87b_>DRnvA`gRS%<KoCjuWm$s;`F5X7iMSlAPxyb$4fhae^$!X-Ts
zDhm<L0im=1)tyDUwJvHw^@C{+`yHZhS+b!e2tPh2pv)K+X~x$d!jSWV7vCDr_b(_X
z^RE5{1#S&z@e+Qo3M-LCHe3RQc2IV;873~(Uew9saiHGVoeCmS;R(PuPI)@vXAB-g
z!kQiW$q-b8HF=6@QIzwzwsAoc<;~G(l5;EP%M{osvEe=V`ZS|k;^nZ(oiLkIF#k=V
zZ1OuJW?-szr{5nxN3)>EedlvMPI&up4jjyRn4c4e^K;Vv{G9wAKXZS@&nd<HocaTP
zPJ2eSbdty@FhzmJ8^xr|wF=KCJYh0CYi9%ms|<yj>&F0^`4VYFsNY-<f`gq6SjP;t
zX7(RYCnZaD(?v^=<;#l9wg?}QPy40owc-x`;XBlbVMLaiQ{-%HHs?$+&eA=9snHxN
zm1q{|lyDU75SNbD#)_5@reu~QiX*a*XR^<(mUS0z%YJuM%6WC@yV0ZmSM}v%Ea4lB
zup$EbppA$xAByGMDit`)uy5!)zWCGrn?PNqJr->{?Ml7P>^yGTcNG{v?Rq_ibk1mM
zh7TvBJ;wCo!pEkX-$xN66fw1_J&q_=#Q3IETLkg>Xd;HgqDu659Q`)Y9WRkX$FuyX
z0%e*~)a%jGiW!nY*tM(oe3#c%9j(iPt7Y0}_)?-|2^m@G>ISg9lvxUP{p@h1!%rh%
zkY<U7lg}#U)eW7#=Ni7)$3c#griIT&>`#SHsSLZUQk`QJ5-PA~MX*zzi(pHEZ3%wU
zguYmL`9>aT1?qSQW8m<u%DBDy)+N270jlw-o~i8PsumQkL|k{9l<v_>5_jwX`CdcU
zmr9nr3@U*|^BTGamMnSR-Ucoj)zDQ`vSbu(p`j~XvZOBorW=-w;n^|7Vs|K6@|FSb
zuxL<2*PxOm>QFj9v8Y{3mfU86y-Jqk6y45`DN4x_sfW{<3a2wCPLsSNj1%krtK&X_
znEqU9k442!sZO^q$4=WG?X4@GHdv3r_8C+JyHT+n4Pfd;X`PoU)SsBn3lu6-+*t})
zZJex-ddbdX6r$y(IuBQ9h~TCvG*qFz6$+H9`r9~6aibL4L7_5*$`#s9AtaN+N+aBj
zvYm5eJ29(uRg*}aMPe!}8|CcD6iv-$b>yFJ)9jtD@*qHe$jSo&`Z)Fr5~yTjG!J~N
z+6mm3C;zHu5A&`1vx-i=&q8@;rAn5*O9m~$1&^RYO_tf)6tE!O_JOd;L!U=fb!yZ~
zKe9ycXwjWnbGMd(uO1;dk9cQ<p7}EFR+LZO7!>$shBzquHz?{X8dBcFI$|U(_6)E;
z1wuaifTs2%n5-GX9Hk4La2wuHM67;)h%Io$<gCxKs;eS$Hj#WRb4P+17aXK?)wAyl
zRcPx7_c$=_2;YO#@On1-g)2wIEd^VuerOhD?7|zRG0fRg^;{$@VE;#|X94TjaY;*-
z?vHx31Z~V~`0AO7))l0WARWPd{J5_kcin&Rj^1H?;4-V84)Cpden-5ko=K+{R?k=@
z7LX=C_z7ybM-|;#f%Uw{)%~$9v#6HN|4~#+U6(lCV5tAYt|sY+gU`ub%zXXEZavxc
zT+oqsBx*-_A=ZqN4sZ=i*&1Ow$r9-pf8=LS;XH^Zx*8g$%5^#?sOma`^?OOEdyP-s
zKd$l5=27FfvGp%(*{Mg3M^#;&@M6^2a-#2C1T}ND>9O73l5Tt&i>uP@x=;o_IEdj$
zCp(H65jDQxleTk7JG+reg&sHt2ceo3-Z8K>)!3}>4^y2-cS~OUd}Q^9D|r%(JiN-(
zU3-~Z8SjXT&zV=F@HP#%YrR^B`C!h#Xhv?lCY!zMgqd-E+61+Hb&2Ispi+Ux@)r_L
z+bJY_IWT*m63zlZ*^a%y3V)2aU_YxKlu$*O;7d4x7C#SY*R6kPIO<f5?ox`suQYMW
zPbvgn9|MmQ@aOQ8<Z$4Tn25tisl&z%@z<DDuHKet=b0y_>y8q`Y-DDpL>5;}?{u$C
zUaWe|n7&UB^sXxWh)(n0pqZ*anzH_vM>~}8Y#$y^sYbd|Rq|D%11$qH&cQ6gF#~_&
zS{=t$HaHA;NR)UIC4~Da44>Np2J@QsTkv9{LY^LGO?3i5$7%<D1LszH_}|GIi*)kh
z^R32yXkW<;uGWJZn=XYZ(8=4#&(+v1<y6A8NUj@1%}WtP0}!2c@O`KwR<|Ix&xr(?
z)7|+&J+w!5)Q>c~+XmDKlBQ=roW61c6dFI}hqAi7#!+Br_jl=Z>J0old>BvC_@}H$
zE_lPgzRxSdk!sg!v!|){74M0Vv^%4ov_?H5%8u(>INQ<4@FSD^UzpBV!FF3e7-ujh
zr-zRBP5N0j4p9uQ0l2KH26sk#l%x;v%RJtXowbzHXmf3k%J5}_!74b17xX|~xuqc3
zY~RSUqb)YmaXnW-wb&Q^1o=l&V^g&FD^~3{8b<IVJ*f6-FBYqLH(fxk`O3d-7?r;l
z42#n#aM~jA!YM*!C6Vl+c{Ss7?VZ-J7P?H%ahcTZ4=<-!lvRdty5UFS^apDsgj{ei
zsWGQ7ook$K<A`hqM4W2cOae@DTKaONgqzCXbQyhQuW)%~eMxZhfK!Pwsrvpc!B_4#
zF60hVs6SvQyVY5}w#?={BgH6=80k1kM3~)Fyo9mXdfba4mX$-K4+Of7tMNpee-cup
z1vdY*yxH};&r<uIXu>-hFIMk2)d<!Dt6KLC(%-JJyq|NiILd-r&WJ;tym_`>+?0pj
zk6&QGw+MLo{Z)(MLuRv9&VLQxS!--ViU7Jc`0h_W)gH#L{6;Nz1EJF_q&9r=_oFs^
zBDC0k+Ia8!0?a$X%$1#{Y?yE0!2mP$Ds8-)pP2rC14a670+U~<AtLWP=)F64Q+jZh
zaoqim&oemg)>uf~J+dO=?kUDaJ-8cW+^r#r+-~R5D|g`ykp<c`((3a9As~3h&cPW9
zBhaq{#Os+piE(%^$0yApDV}|?25(O1s!6d6axvSh!d=+f7#=z#>4Nz7*BUO?hRyt}
z$|bUAb7aq`-s7aDv#OX*rV(P2&qI8elQ$dD;g;Z)f=BrBVCSCJ{7;M?o_N=stMh0z
z=ke()Ou%_4>l|v<sm<kN);Uk60Zv=P-~OWjyxyD!Yh8;l)o|{})Y})SO=k~g$vBR$
z(>z0x{3wy<lM^K>Q#L;Z1ss<D5_NtHdNun@=14-}liRb#_ZUCUdi@WKrygXdEG*AO
zB6Bh8m#PVxO{sImjUB{bJ}KE?1Vbe>Wtbiqv>8<1T;Jo)MU;6{wl`dMjE7t|h`b}X
zy&$&r8P=p+hBa}9E6%bE@0Tl{3+{3rd5;Y9R(@?M<TSqPmSNs%-YAIcfPmhW-oqb&
z?IWmOq$Svmk3{%^$_?zkkL6N79}ImUP;KZW!ZQ>`LC*WHJ}KAL_y5$odMC&FeQ}|d
z;^H%293XaVh&P(Z3y5ThH;mv}E~ruTTpQw{7|*jIGW@V4)($_6n@d)Eeqipwf-Mc>
z?hzImH!qVdvS|@C$<{SkQ&EUPHY+I#G0Kk2Dmz69FGD26Gun0&$MK4WteTCwuVD)<
z5YednBVTFiOEu}|v=JtczP4Lm`uiUekqs&|+~K3<diY*{TZ_u~r8j?1ed#+4P8_*d
z53V}H^x#fXAaRQxUh!sm#nW&+uLr9KQOk3j;uS*V_24=|*oWtGfj$r@me7N*5QOri
zmj92qYk`llxb~aJLO@_6f<{GHFk(Q(_zsE^Eb5}DQBlz<Mn#N|D&lTIuf<?C!ZxJF
z7F%qs;;Uk<O05N?7y=@}XTjP^eWq%4*R>XHt<j>~|Noqs@3G$|;OpM}l$~$p%$ak}
zoH;Xd<`o|DprZ#1{Qd^H4h!|KxgyEUs!a#;8~mSx_5&iTkUz!la}eUS`@H_t+zIO>
zOn*3Gy&ou0HDto|DSX@)B+_vNBzFN&NK{Q*`9nKly$u%xI<=CxSd%N@*l{Bdfue2E
zu{;$~eGNw;@*PA%5f4J}RSi}!T@-P!A*b{eYZs@19M>c7cp(;#bUK7-;4eMkb*S%w
zfHlU=s4u6rGk8+Xcp;#L|BpWJbYq_)PTa;kAnlV|L}GNkty<);I};F@J!NFX<^rY2
zb%S@jYDIGbVYx>bLQ^-mRvR;d?;~5ZMY#U&1#A)B`oAv_WIq4*j;{L}eRvoC??tcW
z@qgc?{_j#3!8ZKg9xU1soCeNf>bWcv?_^?_M^-270M+n1un%X1bzpaZB<))FM0Dnl
zkaI?Sa*%ojK5`t`hbfs@XzbE~9U#x^!2TqnY(hd^IIun0p#vL!FFFuewfuEU=l}Hf
zIIyMKNhV<LabVxDuqOjHeKh_t`d*@5H`e<N8L^nOj6wf&=gm|K?ePDf8^bI-3<>7;
zU!2nzYC0^FmjWU)vb)C6@;3{66k)&cHU?c2O4!MXw22YTIc;Jw<<V`MSan{YP3+Lm
zRq3wVM9rJQHgU`y(k7n9?yl`z6Y^l`x=pwuJFFz9O$=v*Z4)gZN!vsO(c5ejdn%dT
zwTS?E-Zt@8pKY}XPj;xnO3X!MQK#-LOXtNsyJ!<F4(!_&_6WeHN8z7fo47(p-}&3b
z+dp#K#AFVFt9+{n>%xbitb+9V9^c|H=hrX$hB-XAp)LcxlpPd>F8~$m!iSL-bj@S%
zi|!#_o;{Vlr)NA8`nwg#NKl-4f~GFqevdP*7(=HDvOt}<j&V2Af$x1hQU`pIBwbbb
zewE*_CdF6DxS|93Qyf>UMZAtH_CDS_uHZVw7QFt3`lHqMk16g9LkY(q_bFP6orYg_
z17;ShF@EJDuD)DAW<WtGD+>^0E7u+U;4r7_zYHX#cg0@j^kFC=*!9oEG?A>5AUg!e
zTf?V;@`Cg`#ouBLug3;jkJxz$hN)q>kC!!E4=Ny}^ZB!lsy!K`W_aECy72pVIaPbU
zntofgyjvIec2s=MEeZwvM%9kEQmQt5x2f6;<{(<N6Y-d_Lu-6Es&**SIAlx#WuSW3
z6rp-&prjdqBIU-*GQXbX54@SN7)<g<@z)f{{spB|R;6CRqjzS?;;u@qM5I}jdPIX=
zu1YP8I!bW{h));42&EVXx`Ik^0gtws@gSD<!w&*AiAFVq?_?OF`EVXgLVNf}_~ai_
zW_qA5Gf>Yc)MOWGoCoR<19h)L4Kq;b`a)3Epx0rQq-WqOeZ+_G`!Pyi+`^?Vd~r)2
zs`_^XPrTqWJh*}G85{^gxX+z*-;6K+H^PMo%e}quAi{RxMxq7fa=tM&zkD*{Cc+t4
zE5Gy0>+p-Co7IsK$#OaQK4N}3&mBfaV9${J-d4Uye(xz?BEP>WZ<F6g%QwjH%JL5U
z@|Xh_sEVC~k~}DXKpXVrszstF$p)x5nsOONRpR)rq!gQRsV`P{WtlbBoGh;vR2YtN
zuK?zTI8F;69ER?)L9lr)9BE6#qXc8(JOp==U>w)DhC>LpE`p_FZM}Uuk%qV2A$s;P
ze=u<FEj?Z43$4F57z@~f<vaxZ+#H<$Z%^-rk9FZ^kW>I`i2c<Ety%({>7!9JX{wx%
z+VI$<p2WVU^<$)Xb_jg(`>k6u+`q$|g^5bdS>nw(*_#u?7}NJYj-1(xn621m+jyg=
zz;nFWAR?3PMrIqO#oXzIul2&0IPhlxUakY+hBQ`?cb~#$(uvEE5zT3R38ee`+gWvd
zTOs@if@~68O!*bVkX0+ySk!jT`<qZmUT;yd{8=RNk2@t7Yf!>VJYlIA1Jh>Xt@ri(
zQ;`|UQI7<c`x3s>6LA>_eFq&9NiT!$hUCx<Z8(X$w+Su2hGcoC`4D%5%$t!ycS8xZ
z5<zh{aC5%nZs>;(aW@RZc@8ufasgknFcWFKwg^jlCGYrFkbcOuZCJvX<1LtS8c9f&
zlRNGa6fR|jfM}$HR>YWYR|1)&r*HhCFqFYM9oWPAg@bHIgRIRU<8Nr2$VL;{a~v?+
z^5Zp41N;6OH3;rmAf2}OYvn(b?gtZ#Sn1rYN-8nn3uWfZh&y~Dvw<JhB5dK|_~ai^
zw=sYxQU*S9zoKSDF6y7;K`kd=o5CM48&Fdzh)<LQuc;s?IwQMh9eTLaL%YgIaxKG<
z6uQgy^mpe_CEMIx)h{<9A{DL>s=`D011;uC&p?TCeLhR-0ofG(0+SDC;pCU60Cy_<
zIO34Bls_;dT;d5<pzHK`5?+tYSwdF$2Ikqe6aER135R>^7uE?sMnZJLSN*^`;SU9_
zfD=AN2AjgWA+2>ibO=&VHJUC7T3JmkO_VEYoN{fd=hx^p3CvXd>ES=!hYmmA8pAMP
z%bpW}zq>2=kCG(IlxIp0Cp^#_ytJ+r=z*srJ=Qc|mB5f@O#g?o;a*a)(`kM7f4M9s
zPHXyg((mB3B{Xs|5b)2^iMqQLQR#Lh10O35X1mkhZePH1uT5-EpMhaF%-|+~c6;aA
zDL=xME2;3$Z_RV(TFdg#ku!ArCi`FXda`q%wenpU4A<(Pg@S4GLx~cA$k8C}bM^%*
z=K}HIx(Vd!Yy_{pNP=e~_}vR6I0?Z}?F5d!xWlv7kNb113NQusS#K^x^Y9(t;Rb*x
zn55HV|4{1~grqA=*R)WyNMr+xhT^qsTv7UY;8Ca<&aX0Tg_3vBqSIspvc_OfEC3O+
zvy-C~IY#Lh8s`iDDWXZm0R|#O!~_(D+T_WQ{XwWKxXYSD8K+yw%rZe|1?j|ZjrpC#
zU(h{;|D4B^$&4Xrr43ZuK$Q)|7~n2dEMJfWbK5i7#BFpk<VN=(_CXG1$_M)fLR7%J
zjICp0b$ERn7McVJL{W{0XFJ1sYoPtyGt&5Pv6<{zmR1)ubkwsW#X+}899PJp08m|!
zWz8$`pa`Jwf3!7pj=-KjWM|-}GbGR}zF$LU??__|U$_^13Z`k*wgA>vCB;zy{F4hZ
zds`Sh*?_{ZuN7Ojd5x!TSQTfWjHmvN%W2IOB&e73fcLzDNHS{-Y6bCDx9$X~sb(Dd
zBh`!;v2ri!07C)#TQQ6n97yLYD{7@#JVDJRZeI6A^9&MV&<A;I0|7>9x~y4ML#GM_
z5KrUsw;FN_V}fC(pC)2VLHv3rbxdLWGWVk>ey00T9LFvan<pF>ofC{>dgxnG`q4Ad
zb2*r>7qLJX99`iD)yp4<f<GntW713prg6A%j$s2FOu`3C#XWpD=_?$z;Z9u<c9dO{
zlEhv8NSs&GTY=iEcK|L`$|n015Z)BaUI+nA3eE0`d!i?)u88U*cCyBLHArIPJ=vP3
zfM#Mutxln~6eN1Gq)HPl3gfuYnPQamdT3t(*Srx0_2;g=8od5U_zEEf<3IdX;7p4Z
z4U6G4a7XHr-6xO6ENeq($2^<?G$m~B4~}C4;;9})rx~3l>dkDF7?d*tHw;M=NQWCb
z2S?`87mnT0O~p?xf_>ZCA$ic`dQ<RUWJMLy?)Q~B>F4EqpPchOHs@Q^#Di~0PI|=u
z-NG5y7r0#n>}+DvCbE<Eu#@KP-7p56B-1=?rnnS|SOp54M_4tZNeGSUC6}uw{vr_~
zB8DKF>af^{!uZY&okj6I;3P@xCB<RH!HvNZE)HdS+HgszCG#1|l!Ss%<^#9<(3stL
za~TLGk-Kv=pkXOuw|MV{&fVkvGAnKF;!w6k&=djZue^AACghzz;HmD*%pFC(*GIE6
zE#@)dguJ*RC5E?=%e213oy<LWL#QElP(q9Zi|mIY3)-^!h7WWhf)C9rN+NZncfEU5
zj)*8vSZ1jMXuYILTw5Bgs0~%Qg;!29g<5K|gvN|Wut9Dq$YPs<gN62;4-9OP;|95?
z(P*}qJKi4>jGSV@2(oox=FBJr*eyayN+Da(mNEt?@}pE~qO7Pe-qHiOgrQk?pr%ds
z_Ox6R05lZ_!eI|8h8`EFGvf?=DRK3R%l1ly9Y_eGG&2Z5vb9cM^}Xd<m@ect$0Y0l
z+z+lnbbDxFI`;ssz=K9SoU1my(%5ts1e?xFYni&Vx(DQ()h85~1lNv9T85-$ZP{TK
zFg&J^dxns!sk%q1E!#`NI5ZDCi&=Rrb+mLIz^TTylExKM$Ge*7{75?Jhe_i^5%QvQ
z0f&>al7?tOp<NTcs&_EZN~A|e<c;~Gq>51#1*k;v8Lf(|14i*DxRL<_9N0WLv0D|a
zaEBz27nPwHsVxI;HYBlvGpp1BhB9ga2UvBHZC{Vl?qWXUkG-9-QZNQp(6WWZx{zEg
zmL{w^v)C3>)X*7?%;hlyEvnNL1#sqB!rV*Hw2GxgWnQL!B1#gMGql`I)Qeb6VjC0N
z+{8uRoa>p0DUL<k;7#1X#0^fO-kBi<Zeq$NH${xPq;xQ)!%aDa-;$y&-%XJX$C6^2
zwIzbXQ8DV2n&zSey6K|s0M({~vfeJLhstV>VT!$qMrE%eS)T9nbG}c>`5u?^ZA_?x
zZ)i^Xjyd06mRv<x<WYo0MiDyqjLaS4YJtPgBGDY8T?{q~m9tL_XOifsh)J|6B8iTQ
zm_(~0lIW<2NnGSb>!^rHv??Mw9Tm|;RS`*XRK%o+ib#s1A|^#tL{c0TF)5-VlH#a{
zN%6|lRgq4L2UjJUE>PdFkt3;1FgnnoQrdQoBtwLx`Ct?0`5xXx+R!;DlKd2jc-JD*
z$e5VqYfs;T`$Vt|Ba0zdGSVrd2+jyhRU{@tON!pgo6O;Xrel&qb2>aXy^!zI6_+<v
z_lHd_VG!1D=U57aX0RbrX!yS=E{m=ALOZ*2A%L%!AO;;eNY@xxG>8sYq;L!=ha<;;
zU=?qf+jUAzdwME%%u!XrwQEu-?|~S|i@ZO>Fkj@&7)8{c-U~+C$UBn!5Ea2E-iMbY
zx|Tgj?oRf2X}vqy_w&fU9~mvp%mramY;gkC!ds`FDwkqo{$y{JOR*KX=}wjRi!IDz
z0wPt8a7+ruZX_+ZkhgMlS1?Wic#~N$`fjPPezC}^w(P#S0EMcIP1Tx?p3{^K=vazu
z!yllf;{az8VLt}2t|eg17sESC+3raIK({0y-9tjFA)&7&;s3V6e`@vY+pKWtnN#8D
zvP9%O^(2~Bn7BG1Zfjgb(~kEi2Q+PDZn})vXk0`Q#n8aI@I#Bf3kF7tHpg}S`EwP$
z+v3swx+@;ZZt-efN`1yq2;z8N^tZ1iF<Znz6s<K(PDRc&lC(E6Lf4V<zThT(*_Ap{
zE)$bOXR*1gX3Z5{jFm584!P?|EE{IYd-BrMRFOXtr_d4k9b9xE>tZy5x^Q~$$6R%g
zNZLUX%9|klqZd%R1>~VU$$Z5fTSn$SjA$Lcl>Ngyd?|qppdee!#y=gf*vRY;h>1fO
zC+4z1%vpgL*~RP2CEc$tX3sz_XE<ZaG6y`#qGt?~W*zbZ#7^N9HXHA=PRWiZzRhx}
zc3g%53}cehISrGwFL>6MkL|#l8IC03eIC8$YI;5NkvzeeEzI(%I&|;he>4b$+?$%X
z&o@-;q{mVR3dV;hQy0XP3IT{jxezq3O8`NrDZP6P5Jav%FMNpGcoyrgf+(YOf|ki)
zeC|&#nV7<oXnXi!P-5AnYw~(AmYn2?Coa->g^7UkvTXqQsHD19NgkA6L1M<2Peokq
z07Pb%;~x@MiQc{lel^@iE*}`C#0p}o|5g&~^)!+SW2-w#W4$(D4F#93cLxCx*8-rH
z-VJa9(CnEkB$V02u?-3qe=L6M7|UO}*N~--S!BM3z71d)D2?eCH*2@QKxQ9I6&@Ev
zgwowh9^|dXWNd11GPVcr(1TiVqcCso!EEaanaNd=ylUC54NQ`IMwqE0k!m|oJ1-$Z
z!FP3kIM%MDqwPw%VS3`Uc6@NQnsihXR}DionEc8J26Nx6OxYxDGSen&nl5P~T?%WF
z{J`#+Zz@hVj#Bl4VJ@wdw!qDIg?*FnP`NFT?njuD1UI{)Ox#kSlX2K4y>-=nx48=R
zi2J_OOw<`69{v&&5v7^}Unx=HBZRe&QFG87%%}A%nvH}pDlpX6@#2fxLK9fm;C8HN
zfI91&ip!_9BRYmaWSJCTOT~xy<9o9heq`khWgw<fnK)Y6-tFN9^>*zCX|~RW(~C6%
zce8btCr)4ns3Jyq`@yR_wrSu+$kG%(5C1}+eUtZ;yo{O(e@7sW6o^D0)!!#TtLYX{
z4r`0Pp9sz&01Ru7xJL&8Da@@nz9T6Vn=IF(=6VXgtlWM^it&D@zNt9c)SpHsFw7B_
zJViZly(#K01dJfuhq@|Id*TkUa%4m?<!fqF<k~=|gukDlIYmc-3fc<691q+OG%TO=
z8eYBJY~pkZGa!x&3r58EZ|Llwn4~FYKD~vg3bbi#wliQ8xewZ6XO1U%1d3}4Z=5YJ
zz;#~TlXLMc*?n3(Bv?mVX8}}xYe?ork;cgonE;!4f#X<1rwAPa8&G@sN7k_*0O>;8
z(*xwnaM;*ssiRfnsUaIZv9g?1!q`XTeH(=pbQ0TwWjrL##PQjb7<arqB&$i1x+6AV
zN&gJ|G7*v3r#!Ku7I?a+1|t}^UvF_vU<R+=qxFnVl_sOjf@|918!ZuLl?nz&tcfij
z{iC<4_+KpY@EWRNl*L3_doe%gUOr8SEM}R@4p??%bUx>vzypKm5X$|YQcWRuQ!dhQ
zb=T^SqFD36B7DeCek*WkN-Xt}StR-I#T*SuJxRm2phD>t7iyxEynTgn?P3kDg*4Ve
z?H9_njRn^`Si=0UsHReBpBPZd!X%7e(4?sxgh~<p=ruD&5jj5Osy}j~%Rh%;R;gwS
zYR?4}vRRRpUQ`$o4;~G3Wa+6T^YnU9NocMy&Q2deAf{8t92g*^IY8(j#?3~ooveK<
z@f)jlkV(T{gqlw@?2I^sdSv#LEsRS`N_C>E<F!4dXzB>zYsXkKYd^Jm#bm5<x7OmH
zRW<l0{SsMh&?}5lt(ckv5ONFvj-`D=lZ^5PP%u|qK2M0ilC$Q9_`*xB-A7b_oAB;o
zIE5ol=Tj-eH{+9k2>#R!HrQZ;*-1C<G4%3y-iM%aY0L_SWTVR}hSC?~9~4=VYX-&s
ziIi+VvRk}@t0Cw|B8mN&l7?xgFt%og*w4Q5DU2{xKjABa*zgRSdyX2S36AT=r}!Lo
z@l*)I*+RD%<Q>q)#_p_YSCQ^@$?_)ta?E6Yr<>o)`8%y$2NoJiGD^DJY6g&bK7R>x
zBLhhC-g@WWY{$;vS}7$?Fl3y^UuL|40ffevU#CB_CB2!ku*$^+iPPJ|J6)r-)E@3@
zLhHg;oIMhImD|HxXKC8HaENK`;m=G&dw3#2fTunDo{5tR%>1i2NQLBKzGShv56)i!
zAQiqF|FX~!PsX9aLH0w@A<OiGA17kX7!z4dISES)V?DbaR#2m$iq#w$R)?(h+es8H
z&(em#yHvzwWI~d3WP-ZoNUJH_A4J8P&<kVlWed2$#24*Lg-cq{Bh!znb-;)!Q0f`@
zRk@X@yiKqikhd}RBf#4*4=(nUGO7b^cGPG<Bg`H(6T=M#b9cqKTW5f!A8-bUw+CmM
z(M25soN?9(Rx{%qh>9q{DN&&-()b!YMwT4V7D+zqi6DJ4e`7^J_L0Vi=wN~h)k7$o
zG05m;%L*ZoX+dh!z~{ctaalY5?P^^10MbnPPl|M%dXFR@^+W{Amm`ABs>?JfHJEMl
z!bIx!n9?}r5hlE29FA5K?i~mHCcJCBj}so8IKC--oYJ{VQ}{@P8qyd59*jU!cohCM
z<Kk3!s6_3Ke}yNM#<Z>Yp%&ER7kBm~BsJO;{wG3$=^X^{)~_V+Wc@~jAfbmP`d<7y
zdQIfUbDh~A$I++`(dD=dT&l_B!ROF!Ld%(|&FLO&5jBQHCqb$smYB>=z^R&dl&#%z
z=+gl_mr1+f+EU<u0lNgjmea~EMl17;r>PfQ6K3BC3ptT(#O)jJZ^N{ZGdrVZ?di*K
zWx%{-ISmSh&EJNON))k^?=#X^hg{vU!FwQ#qEwp#sEVSf`+FjSin60gHBH3|Mo2{C
z?aK(-!N{`t^2>H|Z48>l=B|DI@KcL9fR3X&;@GhBD<ptc?gij4j!rT+j4a(v$UPek
z48pwXt|Ez^ZKAK!=n$ft!auxPRAdzMT_*qw1W~Mcz97bE11OH}L%(*Q4&r-LdMr1x
zbOVDVh0i~sPRWYoU5tUDm1s87lI`1)?cL(+>`;}sUTRO}7@uK30>)@Ejy6vkDU=MG
zHfLpdJ<8Y|N{C)!I2HbU2HpS+e-|M9vk+TDi6Q7BUPU7Ru+J0#s0@TQnK-QkXYN(q
z6#h9<WbSn{0!`tE@h`MxZvz+_(_44_urkN&%E?-@&5%T(ex>%PW-@U(w9ko3-eK$+
zMl$qEKyTrkSkrniD3Ydx0c^wH3Sx~<#e2;w#O>_`4Ig0tDdGwlhn*^nENu7yeE}ki
z1yJIO8$KvbeYiSPlzIx!{roHTKrHoH>O+7aTMvccXCXd&8Z7)SV6v7Z#6*_q?V{Lu
zCxeelw6VHW&0wmOkPA`EQt_L-1Oenn*$NS<(CC>)LP2o_K~LGWkqt}J7N)S89&LE@
zi(XI9tBF$2+3@q|`B5i(^juf)E4dl!T9DM=w7!dsjdEJwBu_-J^&N^-X*P*tRN^{Y
zfHl)Ch`_H7ifX$BkulQSF$O9&@Q&&1g2g3MGs-l<H>6RAlT5-IPx6nZk&Bf)@OkV{
z)Zr2Hkx~$r=nYlikf|UpLp?@IPlnrZsW?n3iZnLjYZ`Vd*W)vixC||b2iDn=ZsM=S
z;WvvYjZhX#Ady)kOBV==$kO=&>}#z54Xe>4Q8c<(L~{u*a|)GB6_x9%4=l*wk~xt|
zAO}ZAHb;@E#C6pN6=cpdIVweBq5>!cnpHiL^UhgPKd^}02017`Sw1DPsT!9#w#AS2
z$Dk3#xY&muK*>%E$rEEo)pWW}@g}pa*?op|iX@(Qu>kHu!l6TxfiahHsMXr}Ih7D;
z{3XPv*;v=#1m!hKd5xvKmgs9p`Nl~~c`YfgVGmqmHvIT0zn^fH@<2!3WKyd^xgou2
zf$V_y9@RMJ4B)W0nfN_8z$~8rtn7s}es9^GW&GY-(Dt`rfI9ShXaewd_sR|yE0(P`
z2_>2Ue;8@Vjv$B3OW!p^n*GhoCA&V>us}8g%JK-<cV@}RSVn17fT$Re;ddf`F~5>s
zyEXjaEaGhaIY)V>+Y7_hhRy+WDUFDqOurIDZbr@M^+Y+$x9mwdn<xv^6)Z#R93a_w
zVSsvI^VY<I7RBfEA>6w)QAR>2-a8VnfB`!X?`)$+C+2voxbN`<%w@TVb@o<y`axKd
zi;R5CLf|1vjM8vxUpO$lVj%tk8`?rK!m-q!@bK85-r}P?D>`lt4Jv`8Vnf%&8efPs
zN`n+59ik02vCYgav84jLL7FSJ&C41a?o&x7OhdMl6izypRrj9;clkL6D=5OQ+_s%b
zV+lCJ+-Qw<au~Cr1AOVDhhn(r_LB`Uj81vb!nsP|Drzp+vlFSlz@Wl7(G<I#h|QZO
za979d09N+TmY%8&OicAg+}5U5JP9OELi;<QKNv+br?Jqz*ria_NvTrO0SZLv%=KXL
zD_Hr0Xtz_eIaUKAls!X~0(_ybhH+uNo)b#QPGWQ~)x{_h!iwo8M#hL<orBsPcB!dd
zTkYAtqGry(=^IkFRoK`C+F@YU)?%5j;r%juK(Nm|)DV3Lco+8)j(!sR;mRz8WLR`6
z0!`tG_!n<%Kx?3i?dgkZxuH8e7_r%dF<-I3dkOFm0hXJIo5G*fkv|zm+;<vlI-F(<
zu0-RHyUzKt$TQExd5%<H_z{3N4P1+V8{R8Oy$~zFe``3H?Sl~xT3QLFh*V<ud;p_N
z{G8DAtKZDb;U@g+VPesF!o>NAB@^GXz*7ZyiU1oXj>Lx@3z3{ucpt_zh0FQlGBL0#
zCRQ>5SA<?nCW??LKNH0c6K?@hnfNP0!o&t<4nK{5JxsiUm-0Z)J%}X}zp=n~3-B)m
z*f3F#55vSB%ET3nX$oJ=AD4-m8ftc)n)rkXP2nnlHw`=*|K?!=>Q(jxUnYsetq2F>
zChntoAG+Pic7k8&WY~RmgyOgg68oP+x-Ye39drvCx(UA)o@?{r<<n3empWPH8zRd>
zv^($1l|*`R@6NEmodr$d`v5o^LG4?f1nw=6=OQgv%BR;fJUu_Y{)Q-Vgn*cWY?;A(
znh)>eSi*7WBfg4m@PRqO2c}$nJp=f_HZC4U2e>@7nF4#%yPiTNe^hsLM&`Z-Zq(;e
z`%k;-zMM9vjk0S)4+JMe8*yxr`<NLk>FXI<?@RwNa5?E47{c7n&7Vy;iJKVO<V%#H
zmtgK-VuvsB2q$NnA$m0(va&L$ker*DxY?Ij&_dg}rBqfYw-y*5sBg<NgkJ{A#WNYT
zfeHrDmt%bp`Ab3xJm!S2OugwtN}O?KgoWDA5(_uk!qG_x>6H-*LtPzDd^ghgAK*7}
zPA6YPH~>eP5akT<Y&AmW+Y1;aV1*xp$lNn(z(T@8*%Lw=d)A3GG%{WmN(?f|Q%O$<
zikAK@bTXSI$2jirqq*h_i9%mk=r2=F4PYKBS)V+KS&OmKCHt65?Y<`2Il#r`u?1$q
zlB0f)m(dZ=m=W=Qu)bpp{L7#m;H-dGUn&7MA@;<y7I?BNC}pU53H*56smMQ)hXF!T
z&)p(HS}GF|ZX*Q#7+$YI32*R(Wr}ZLHhJPZOqfo?-J~#vxI-QIa5ayv(yZVvhFIzo
z%&{?%Cd6QcKqzf6u=M3Nj1zyG5w@y<4F*^vjvtwMn|LfQ<bh`i<yS@p%8RUkv{rnm
zht0o#?5A5Z4|?;F7v_^+Z$1+z!!F2*Tv#~74WLhnblW%?iXo2jkTNOY4t&s}YBU*W
zg*ItC=JX93kD-o6Vcpk(M19I+YK^Ev_?Gk8m1vc?;?3M3tjyQ<Xpp%L-`)qUzkmFv
z*dUo0MZ~O4tSR9_7+DjN0m2z4NP0iYo3dv`a379=MuDt%=ewz1T)37Fkj-ia{VP>h
z%%b?E9E~DQYBSQf17M_)t$Gf~(jQG=GczUFoYtFv3=`W!)u=BSAUiLGz0U;rf@-zr
zgs0ll7`_H^+*fajU7)O{TGZdHaCE(p*lDR2BIc*9QVJ&3qP}Q@6f?Ot#O7|l(A4(&
zB}n6+Lxd|<c@8=<p2WHZQ&CVbH9EWVwu-J_Nz51@H@5kTSi({*))*+%3cVH;x<JpZ
zo8{Sc>0Pm>NY;1_JE<1I35rNUYK_GbSys=8X`|QhK%NC|Pd8u4{7DS)v_yX{!wFP|
z7Dc8Ws7Audz`|sML9IJR-iVPM(sS0*6!~6OKy|iGp<1I$(pRT8H`TKmINFHsg|UD+
zp%b%u2S9c<o6U6nS+otbe|bTm!Wmri_6_W&!0?(=qf+35)WVZYNo84G<nZ8>K~b4K
zR|=U>K{({;lWSrVYgs%Gl`a#k?2Q`ulJUA#i=naUo-t`oW*Nl@mz2=Oh8_?h-Bea)
zB#&9j=rz}WPf}V-h!bMl2qQ(Iz(C;fBs>wq+^`KSt!W->lJF(5g4K*e>C&@YhO)C}
z3*%M@K5r}f6;Vs323@|b(pS2$S*^HyeCp|G=qd(HOU1dz0<WF$4TVw&Z<lkmnxd3w
z1qcYK6r&y~MoBFWA<KRWxF8)V4$3dZD5N+LDnaHT4wR;%VOHv!h-S77U4Ysn<h#HF
zTgN5<vCI-6dR8(3hu9ek@!->_!W;kq1dI4HS&r-)0nv^S%Zv~)&lVvLKaPj{1(1_y
zNXn+{3z5P@hH-!lJnGk?MEJTut%%4zC44{jc(Q!~XkH6p43746PY~1<4HzoQoLy)j
zf9SyVG*DWHr*Bj6oj@lXr$h0nl-S!1orUp{_~&};Yb%KN%bvvTZTsM$Lj2I|(JUF`
zK#r#<h|a9gp2lz<qSY9YZn}x%TY=~&dCY*UvxQ%soVmuP#+=1&xE-+4jeFX^t2$AV
z*@{|phls`HB(t>x?ZNZHV%cNr(1uL8<)Rr@EA=<}r!l5lm%ii@tt_MQk>n46(mg1p
z^+jr|vfut4(ShXYT6FaMH{NdI2)_L3pYUh+3p-*cRl$dhM)bu$BRNprrvv}&yAc2E
zSA>5??Sp^zpHHkMKK(ix#v6Smx^31;GiuV?qn1m_i9YGr2-YVA$H5$NG%Zmh+ov2X
z%5V*FP|sLHdnvARCZ9*tx$hK&;^*StmK!hPy)B6eP|`sc%A-1ieh%>^_VCeF_L04D
zWWWlX!<X|e4$&L_WfMPnj1Qz94U`4h@^#_E89*6hv<&gMmqeC|>dp%fM=a>(g#-)#
z?W?QHm$Ca6(<5#j2)#Xh8!jpK*i&KHj0Qx2(hhY`+-5jFT08tW%ZL-jRlzx0EZZjH
z;dI3~(RAJ0*2yBV$xL*x(-@X4_TGeVoy<#;u(t}vsgFYg>v@zYo+uo?DvH@Yn!=X=
zp88y>MhXVZA=H{wIZRk;j1+1yud!bPoPs-hB`7b)mZ&gpry6pVAeT-9#u*!x%_9t@
zUN!l=T9oJj@(f+51`)Iq4Qn7w86vz2-l1iP=Uii1wHVw{*#YSF%DL6K93)lfy!r;V
z^-*dP%#*i{6c{LDg9G1Jo%s#%Z7P2@X`_&gIfhS!XHV9xLZb_%_W_5Lvh6)(uZ;`6
zK{6Xtt5Q%C`ve%b{nVMFRCz{wUob&L*MNRXj`+(SCz;B~F<kJiUAspB)6dwZ0Hm#A
z#H8zQm<35?oGi5!=%-ewAR@^HBH(U>F_`pvgdu*&?GVON3ehKJ$PESs`;bjne(+I%
z$TuK<g$a&`^oSL$O+LY#dHPor%%R{5y<W}+frJr^?jk7FK^wP7$hhC^DwD>_1Jn5k
zS~qE%1Pu|nC~nxFC(yCxZKbP>wq79cYRU0lMir&QCf7UzZ45_ln~z7+!`8+>rdK;@
z6m?*SHL6WU>Z}Me)b-w=fOc5n(Zzh+rBB-?clq_O{m5>`EvAuL#R00>t|H__hTtK>
z?&tbxsxXG^oAJv(hT9~hVNNFa$M_8zl&}msOuTpAFT;HkzsUpNVZxlGmeEki79#Zq
zbms$5FM;11K)b^~PEAO^^#GK|k8kM2(`kHUjW4P-{u=>Szw6aN4sr^0!1{pK6HxN8
zdIBy#6rO;`z4^!~OOju2J`-m>0p!KPSx<nSN}9YlmYL5JfYpZu;uGMg0@}DSHez)Q
zYcxmV#jnt83{KSzpo^m|86NLt+$O{Nm-ZdBWL_1Xj9_wH9mS4dPzKY$jO=r>44OFf
zOn&zVgt}XP2C<RP$KXq`5$!Sfrj<dNvv+_Z!(evY*W&IcnEi1DSu`iXmq|F$%;4r5
zNG&|IhHX%%w5~2@>O~-3J4}ulE!{FsBbwQ;JF^#u$zF#`dLOH(1z*lx!WI#5ms}3B
zNk-@;2nF0FPtaN!MjS_rb(ieS#P(1WN==)9ExzVq^~c4=g{PbhDPWi(qGuDw%Ej@B
z+b(wriS@WktXdGwH|s9xIFQC#1#Z0~K6goXMZ4}2ZauSTV$EN|UGm;JU)o&)`<?4d
z3A#m$N@D$Ad>>8Wmrj&5rk=~`0?qbl3a>-N6D_B~c())1CUYKs>hXUp)q%0ea)hiu
z&-hDepX(WoznIymwY4Y|nt41as%Px#bPp^*(fI{5e~T479c%7mzB*zBm}^2x^ULdz
z-0-)tX2Se0S;78mtk?Qjst|}sM=bRwM|%i`(kDWn(vuJRl=mxg8x7QzKOtV%6z-@V
z8ET!UhE+&T-wx}Fgmxrw@^Bt<FMkN&w$qxkmi)@9C??n(ws53?=^*-QoSIWpF0<j}
zAyj`3GreP-m}HuYF4}CtmRYHi`odv0M>Dgb_zqHoz8~LFSlt!>{tw>ev4<*(2#yzl
zqEhM#jh3P(fL%uV<}C4p5!s-Zgmg#6!~hj%=TPy9mx>=SF)tNQNaM(%;scUqr~r#H
z%j68q-kZvegDS=L;&K_5Ihz9@-fs2=oKE&q;X_Y=-H=+?j{MCv*o+Y_k}R$pV+Wx-
z{QmL4)S#CDRJm2HHH_z(_J>MgrlX@?y#J-&`y#zU<{OSf=MQ8Vpgi-ruRm##N#Y9y
zlIuc@qK*Fs-K<pR7U+@9$z;_s$WBsUr<U1iJF<wa|0`%=iJ}>ZY)}8Jl3+%werP_T
zU{8*nV7edvd;-`7<oB4^;G9>0N38?Cv{#Y$)zq5R?+q!~u(1=Ux9GJw9dN;j(<seT
zUzh@>u@P}RZtIoHi!d*?Hxj*I&OdaGPY&gFh?56g0+T^lEC>s85pEQOopL-SD^7>b
zCM<(vcO~IFi?Kt)>@Je4e>%+>S#=^|L$ktdE`$$57_b1?bW*55dOpun45`}e64<Gm
z8@1S5OtCCnkSfDUpJcR>>NMx$I)O<ylL)~gx6L3sp`4{f2CT)-Y!3s0^4(m31dJRS
zhOpc**+y}Em8|*<tu(!LKiDrcDQYr~py0~gRlPq!{JXw**ztz<VPMb@Q9lqkTVy2p
zfwaYN_Bdz;B%6F4-$*JB;m*|d@Zu5JQVYigbmu8TKzGLNOTBx7l*2A!zYM>d2NVHh
zHlVQ;EOJA=BK@h!(k~~=7yBSf!6uB<u)j4NW3Hy~IQ%%9fCe0;E;l=U$GZB!7_p&L
zv<hheF=A;7A7BbOhFLT@yoZ2>ca|SHrzbi7gC@fTs|GpQ?%p*FjPdePkG<B;{(v@)
zqkaQkbeg~}0;0g2s#XJTU)NfS81+2-R@$ZM?9dU_6V_V3<Ixu?kxkY6QF_;}=G7v}
za^iMN%ivC8DX5N_S>kjJ=sl=5ER~KAW?aNb3Eky{?r}oDl8{?6`m$Oh#<`$?8d#hD
zVSirQj?l#B`Q^+zu{l{zY%zQ<lHUb-r7BiS>tf9-%ZXObXMvL+89a4FQ75`oX}FjL
zFd=O*0}}eRgcKCm`59~04T_wHO{Z)=e?lpnPO#~M@fi&I*bzsC^~ZWJo3rDY+oOwV
zT5B~!Gd%ukHi2>0I61jBfqPNf(@UQwYBP{PC2>H3#vpg?LYVCS`Nu&ElQ8$d!kAbr
z^z_rknS?@cG7pcn%i%C0J!TB4(cByh3l?6Crctd?G)k%SQ8G$D#DyufFihSsl6tKL
zJN?T6qi``F2hm>0UlGznu52YY{x7tB(z1|QKns5zEnI8xNFwG$WYKyWjz^>Bll1gQ
z#6Z{aXdE#xeS8$ZQT$fmx1#CP%2Z7yX{ndI3$!2_OKO&lPx17j!emcnrOaY2svlO)
zG1`jNs10z<PQ$V-n_L06Co?eZ2yGqWZN%Hya`4D4cRfJ7TUuw(Dwu0`F>s|LAa^vT
zljsB5(5%Xko2vtZ`0MzB(p%oAK#YM~iQ7rhKIHk{g7~>Gj)Owi@59V}nMuH!YEH&)
z8OEa(sO06umhO2ss*F#}bOl=4X+dAbdq%QQ;b1eRi`hC=?(yK99A)4inKNw%0XGus
z{r(oSD@pdZ821DKaW_@(CJhYM0lK&mXa3Dve|$P?WE1kEL(_Xu36G{R+%ygISpknV
zx8fPs0M`&_A50mX#j;gg)hBBq*6sEDs?txbF#dQa$o>eh(i^N|_meKJVt)`mW*obK
z@KO9>XZ4K1XiDbBaooxzC$p@mz{DkZ3mi<yy;o;r#o>1oWmRJb1n-xiK7;}!&S6=o
zt<=5@zka&A(%mJ%{U9T&PSvh(yo%dzvr$UnKmY?dbtU?l<@uFGa)GgN7FKyGI*z+!
zwASUkDGkJ4P%4eY$6do|0{{WEf;WZ+-HEWbQJh;Lje?DV2S_&on2iEW**QQ8Gg2ow
zkc9Ab8*U2M7xn~nvb>VHn!?wZ&no?#VLq$%^D^@p)6c2qvxc9r!j;lAR)p9wc=y<>
zMY<L|OG4U7tkYQVABCE+cK76qwfYG)+hD`c!1WS__CovQ_|c7cb&zC}t4t%YGoy2!
z04Xdgi_Iqn-?V~cIZLDkB0ZQkD2(pWH(}UPA<^uAp+kU~ES7wfY<a__gtl1Z97(p}
z`7@i1yzLer@BQ38E_d3voXeqqek$k6nGS`f^W70}#9H&>*e%kSHgcVZB>s^p5<qaq
z5u7{4_QF^iCR!t9{JYut!c8tX+~xT!#IdhfGxnnKvFOx#Oj<WVm0M+`Xs?a$H4K9-
z?1T1TM17er!RRdj7}pEN)PQnD`dH0>;WnC%fBblVI~2OivYqy@C!Ft@@j0yT?y}yJ
zhjqpUSZ5?e0a}DK^NB@D;axugki&XsfW&?vQCW8}3hypPPXWM~%X-}wus#p}_*q{X
z&1Jpf-(Y=0M0v5QGAPm*HRDWCmuVZZtlp-RQZzhNJ>D<h3#gz13&Ap)`*QriILOd!
zJ;G=*Z{i;sael^%RB4)ctm%0~I0?k+P5h%LQOk`LV2hy^#1lvaNNvPDK>Q%80&MHR
zs(}_1%!2t-L+6n158DRB?C<Z}Ed;u(9Soo3j%}Qb724KP!C?ktB0s~v|43sY+!AQ2
zlncg%AL3t+wj_=g1$?aJb5v6W{_$5+WJqo`&B1{=QP)*t0G*zJPn_p^mdLZyd47^X
zub_0+nEVdvB!4oE9~%Lh-uM6kKN_4%KnNw)YcWvg1zMiR9+q(0_G97vd*D1{J62;E
zd<@qF${QRgujNC_@KiE92cKa0Ibrw|a>SsYVGl=_2TEAEM=nRBfD#-Lk8mUi9aFwB
zja_59K7F%nQB(z_=3j-{$?V)mD^!{cdyMw<7XzG80+v+6o^&W+kHj^e`sWoX3)I-M
z4(PN?21xD&l6h~S2ar$xh|VkwK)*65m%$Tpb4=!n9Sj{D^?}G29*{R=+Q2nTDSx2Y
z{Tez;BS{`~%v^}UlB?1f4Q-3=eZR=n-cvwHS9Dhgp!W>WeG8uS%{<cEPe*a$I<Nd>
z)9G|jpAxqxwYV;Tdj0Mo1l_ZCYX)+h72&J^{6fI{JBHpQW$zqP3KOz(!1j5#^h*nf
zta4gZkd`r|1<qtYXg9>{5Fq9Uxbr9Tb2xCl^@H;Wb4^r`Agri0YZDI=^uTUDf(&Rk
z1YL^^e(Ajb4-nKVhoEgL%))@&qa>vZMPCwt{%F@+I;N72WQkue+g6xO0n|SO>aG<g
z9e}?$K+0b+-N}5~(@#p53gepKAT2wP7FS^ms8c^dVqPxGmCHmDb9oLiP?)n!R8V2e
z$b`eO0JGNuzlR`a5MwM-ke~?xg8qQl9a}Ol!|CE}%iCiMKi{Qm6)D-8Yk~d<XuqnC
zL&=#7STOqV$*>#zv+W3j2iot8@l?2(sz#DLndTufaggA9tO8}Ns0kD}B~ajo_qJ|D
zQIFc9;F@Bwbc8WZiZ;&qn{Nee`mD0j<~olntgonSoXmT~14T2w`$*ux=xdSSGQWsF
z6-L}cb|l##d@5c{LkeRUrO<BbiwB<G>k{0zE8cL9;><c0q><FiCoBS7BSVYA4y!gG
zg~>bTiv4L^E|!@Bj4>EK;lDc)-oX>uK@#G!@~4@3mmEBaB1n({-x(>X4^Z;_z+6hI
zK}j~|l93<N@&Kk}0Mmccm?~jpM=H#Qa3KiNKa*<Ua=HUt447`B>MJe9BsU!>WJsWp
zn^}k#6Y5$;V16AhSUX%^4kT!pjt4g~v&`t-j=qfchC(Oh)80h`a;4Ru#Y27T$s_(e
znvCE|6HAC%8wQsQ=Tq<{KZREguultY=GUfaQTgcV;RuHXv1;r1Tky1QTYClX-Q`Y7
zB?IQ!nnBAa426@~M=<Nhb~K{D3`b$eyI2Z0zYt;HgK`=XeO8W)JsKQoycfESYGRWf
zt%8X(+>AKP4k#sf06e2NR(>U_z(3d@wo|V37vMo)Y8dG<8YU!yw2x6$oTgBe^c>L5
zfJ2j`H$<9`Wix9=t5`89P)2M2+%hUrhP=~~pReaoaxPyqJ}zJLjo3W=ndTU5L}LTR
z|Mu@)ve>^X7JqQ*b~L3Icg*GVSQMrGmN7uM=%K5|#52wMq%Y@p6tZ}c8Q}De(l(Qv
zBXXMEr$yK*Q`~~7f=<&|2kB?<#4qJ5T8-K}j8%<>z;FH$oUUekI$Q2^DTyatOK8YT
zo2myR=WA#RoPy(yS6oC;Bpc$do0OINUJuE_LJD}!MSq8(2=0oPZ3l1|n)RA}p(t4_
zD&$1Zfz8Mkws3I^8vy6LUj?e@<MR>(+A9q0Bo1Ev7?v^&BKZBq+c{z>R)HX5LQ;(-
zM<hufCp~z&^5Xa42{PkDlHq{lg)&FkX66O-`GbfZ4mg0E8cFZGC;;6CXts=~<M27~
zEmc1ujSf;nEhPODC{VV@)C^@HvWTiIz~aH>9<Oo_T28Q9hIGhgU;OaTvk}nesH8Lq
z>Rj%2s3=6J4J7;bH@(J$rtsiH#ZR3Grzbp7;4MLqp*BBSUJ45HxI~fn%|oyOeu2;w
zTm5DcAJ5_xFj*c21*C+(a7|32-GBfjy152>Ym$Q1Xv>~|6F-KqrWZ%CvPw*4;U?Sg
zRi1+EiE5dP&sRLaO{QTTP?r@20sGev(`ns-93H;CsGj0LSh};?0K$!ZQG>YZCA{fi
zR{~#wuoUo6FeKj5oK84}VHzlo0xMmtTcae`0WuZmRArUe)HaW!D;f^n4x~0Vg}=ir
z7$1bwUwnf0GG}cSP*T@s;n!_<zBT1KB=H(Xt*j9K5UfTd{}3D>m5>Z_D{Q#SCKujt
zkdP2*{E23-L6%qIwfC~Go`moh7cq1OLZ2K1=gVXS9>?!l_#KMhv+=the!q*~eein@
zeqY1yx%mANey8B~r}#Y&zo!Bb8RTEA8BhL3`I{_fk&o3(m;sL0ty+YtOdrV+Ebgr%
zZB60*_+xdpDLmYKk~yUAVi|ZBI=rd_*`+C@pP!2bpg&QsQEVk(`G??`sDvDK#{h&E
zX*9GIqlg$1V`x#)u3D5z9UC;-(@z)k@ovR!@M7o@%0y8ns+#3sZ$dHMmQjSchXc?j
zA&7Rz)WS&P!Vq~FFPA&fcRoI{>`?(>zfMq&he$l-M55r;);1I?%xy!j_eLAK5eRKw
zUXi6Z9`)f!4Je-=9{0zj@w5amEdZwM*zG2zBY@yEAg~lWt!B+@(rScrYio?~(XBGt
zcuiNK=|F%|7b9SlkzzkF=%Xy9N5QY2k&HC%%Bx<R!o>$rQQFfl?ttRk!yi`e0}#p(
zy=_$1vWjIZ9opN?Y}a$v&O$VM-72@SNw14Vy+0v0HqLN;?<oo5E-9>#RVYR|{bagY
z+vnXf7-eCN*B-~i#0?)V|F4orCWFKSghY#uo2ztxJNKiK7U^Vs?VihSdi`pdkN{dh
zJfIz-nsMA-bpNqk8Q<0VEX{T~@4mc*Wi|0d3|XwjgpP}~<$rV*Ya_{H0K%ar*MGPJ
zDS3#=gNoAyTX~^^19DxgB_KZFHod7gKskdB>Ei1feIRj2$85&2yL+n`-5#na%I*CG
zz8OPVimL;Uh%$3DCNT{>Dv2do6AM9ujHT5F;?6L*`X+L#9d>t6*kxus+5-IkA@{>Q
zq2!mCoCkHCGgh3NGr^qj%H%7jGXQ-Yp)tfGF`Nmo9=)roJ*f$E*0SPh`8%cRFyiu6
zKE<j=zXc)wvD#}HfN}jJe_?{8@)1N+NR3jno?H}`?`!xCkv-Kzwzm=zt%5(gq63ew
zq>m;wFjFjstxSrubv2*OI$vEK#9U1S2e1&JmCU-Pm<cl_{Mmk5{NW|U5Plb*{EI<l
zYi*9!>%u1q4G9*L3a<lDW(x+S?0}vYc!r+UoM69BP^esWAJoj-bRQI9tX$mOnS(eZ
zM#kxq5rJ76@Sg_R#7O)xqcmO#wK;KXoDg@w0HZ?zxT!NECQ?F$txI3~4+W{?ekkVU
zeyBF)!#DA>E8HNzaqLgRekh`~`=MqVJkwc<?p~UTHpM=z9$@?<o$H*?dI>2s3g9OT
zAOJ_Cv#12`-LAyVBA9HZNwV`~ZRo(ft1VG=n!&Rr>e2FgU>^4vB#XgaC$TTOm)LVQ
z4Mmc_1O&-mgkS!#+85#%mL#w%s?K*;Hb@h_==T<lfMTF-E<$`LF2@)cY)u;dxu}<%
zFxtt5DKW|*i}8ddoexnpy#xUz3Bqug`{*ovver-2cdI87M02ryP#ljG8BTfspt)jj
zN+1$c&qMa?!AxPu?gm(FkV+hg+Ev;M+z^a6xyT38&5Zyneb|xb@5O9mst_Da?ud&P
z#U%JIaO8rdc9dG_-ND_4nXSxzQL4^<5#a2XE$ixT3i#y~xvNx*hfNNrMo2e`sb=_N
z1UbZ;hk9BLJfZZ+*{IQG7&7c!m*%g#+v6}&FaS>y9``5k$8mN26Wf?jX}m&#f7#=~
zI6rV|b9F}{2V1m0+~1qnJ8#kos#EK}%mUfn3WJ29JTVjioMbhm3&1F2BEM|I2;g=b
zk45T*&fd~erEw^Uvvx9mD9DWn)#jRQHG*%4w1U(w;@p0bY97D&*AzZ_5D!i8QrPei
z1X+s_gm+>XR2Crv?nrcj3Ozvo*<FENFC<XN1^PP^45q&tpvM4|em4!-m*2T{YkDgF
zq3R%losu&=nn9JCv$hk_93F8*vae^G4{o0*mG^&ey!<G=APH6dG0H$cDkrx~bt+5l
z$iTTz$?MNY0cu0nQ0K!8;>x(O*c`VnTH%G#b;13C)>eVmRuXCCqr$X7CD<X=g8|H{
zq}_4pdFI);Gw7&-#Bh`{aBopNbBesFMvoPGf%lUOh7yMYI5S*;v52Rb&53Xq^Y>8<
z1|RLRyCHLPulz)C_BUgy(y$lM-mGZN;~Rb&1hz^@h&1j8gn++5;3JKLJ@~z($n3Hq
zWKzovHJeM68Y`vZNaNYAl<+#O>{)l@gpt`?wPZ$$dZLxlH=weV`olrZpY{@=V4Nd>
z)%^m9W=^sK>t~V79H&w}9teJ-2*z3jI|mWqK_Vk@i@-1Gy$x@u?i@yN(fEvMN-V2;
zxRzzBJBL^Tk2bPii*+w#_)j^xi!}b;EQ7HGKY_>;Y51v0w!*&Ad|P2-3fG;mxqV>n
zEo=iuh&^IQZrut3=GHs19t~<P7HT+l%`a=<nR$wns5oX;tEeX+e}(2h%7XYgsV-rD
z9FJ4vJ8OQwq#y6$A<|b-yg6q^or)S4c8CA4r|5;;E<maI^+KQzH?saNkRrzqB}b%j
zqNfZ$h0GOc*w>_6VGlCjR@j)b?Ce32tJzhM^-Vdl#^=o0N_!P3**Z*Umz~!^+N(>d
z*37K2V(JGmG5c5*a}3#6Yj!y$5>yz;?vpaI`=xxQv1rWfCqGo>)8{j^q^|TCz*e6>
z!^j<^4VMg&#w<Q92RSl^d>WoL$yUTG&9@aXOzd7>;~^I;`K|2rwJOgMDD~l?BG19L
z#D4kUD^-Bh^LmAM^nB+$@Uwlkb}tV<J^au#hu2-I#9)mpJWP?BTSfS+r(cf=euU5x
zX>7-M6<Ib%)e7+P1<OMYO=5JLe`Wxz-1s0WGg!I7=<e#3o3G^R65M}ujuOfibd8j%
z4}s^?LO_pFnH>h`i3*Kju4%pj+<uAui_-%Go1<e8fX8NjG(;+|D;)!{)v?=v5|pfw
z43WlWPYF3XhGyK1d%1)FE2}By+sX<yQ%`*>KYkj;R$V{Et<{N2rCX~x?89<gzrRY0
zEqt(oJ1yK#pJ4ZkYi*a+Mx%6{$MCHgEb{8c@LgvO-xWX#Vs4fkk;d~pW%vma!`D34
zq+5yEmmsXfVEFd%pvaY2l~22N@0Ls&DX(^Yu!k_!rFK=V@r%pXnfa;$7VJ9D0BnIG
z?n=7=YzAP*LQr)Ie1z5893fS$`9YLPMn2h{TC%0NFF|0%O7GZ7bB51>tIRCYoP>8W
zvmA#z^0J<h8~<r!sWFkgasR0kgMGW)@bIKJVoaaN+($hTMR3&ODn6p*>y(3L_Fj(E
zQ0BHAm>Dk2keL_Rk3zgbbCUZ}6d&h)gyWbXD&E2|J@vf^7E(B-MDHBakKTGIiGK9K
zsW2(ts)$ep60s~}NgO;=h6b9U*o(J^7jG{w-W@F7Cn-t?)gF<?J3SGFW6+#sULz38
zN>dxAtxnUSeo5O=*fX~}U7A{*T92t&!TRPtjmQ})z*li<<FpZo=OGXy47swap@WZz
z%OMEVP6+^3^Nb~s{m%eJwr1MK_fi{(Z$t9{#m6sP>o#J|w8j_gH7+~J1T(8|B$}Np
z=3Hr4>Vb<^cbO@Jb;_w=%n>vDTDA+v9Pxc~L^LeI7N0RDMT2nkp$yBkc+(VTarJ_^
z^}JS&_k44X$y1PJXus3ZVergPG;sm+{o37Rrc^<oz5t@T5<NjNjxDcSwXlbs9`A4^
zmN2fzm;qVFAqxkr)A8v8pIl<WUxnq()F7P&l|~w8LoJZAuM`$(<c!u9$m?)ROA=^R
zo`R#jEv6q6Qx9MgxZ=bx3ZjI~T}kZN!9vy%@>O)w0$G^YQy{tW7XUqypue@CkjcHa
zZ|7$C0C+!w-vAJ>Fn(8M{%V^$m-K~wEkQ4R57|zza6!^*BNp;OLJqZ%c}RCbZy@M@
zP=&%JNPo}t|L~<dq`Tm!5!?(hZYpC{Z;$kMw1f>{_Ib9nAPXJ+E#!Nb19FOmbXdS1
zR4YygbQMAA0JSXa?XbW*S4_P+;4K8l0vDyfZWopQ$LPo<cR>0BEJ0^6+jAB!NP6wg
z7IJ?=;%r-v;<%){pv458WkDfJe2YaYk*j8vbQk>3mjQeNK%nCT0DY7OP1D=Db2m*d
zT4u>>A(CR`B>%|5ruVVfcTa=q+|`1gPw+n@U7DV>@t<~A(5BsO&b^tFk4>SVb4@|>
za|>F$hXwDv6yTRD_`y=bcBoeU5S#rmX5SClr5=OzGkK_myor$5&(dZ6xS&%Bx(U|B
zsurDuY6o1^a={NF`27F@$CnLM(f-`#F5#_!9uZgUX$krQ_a|l(hVCIb2B~B(3-%Jh
zP7<&}+BeuO?#VU^?!rAxxZz5%?t}DdlM6Q&a6qyz#ust{0#@(1I!C;8Y+dt@PTuWM
z2E*z<{pmoQ35XRtQX=*)B*%yN?1!DQNPz1QcoU&rX4#9;`IcD-Zwt!y#`OVZ1^8!B
z0dkj>>NDW)v0UKO`@1~LnyK~dop{+P--(nf)G9y}E8*Rp&?KUXp}e`X50|w{iKNWz
z<auMYF1=M`IfMHHVTUG0MV6w!Ga2x*W>ef`8uu8Hnw5ZapD|g9538aoK@U;7!ztCL
z9Dc<8p)y>H<W8r5J>=|kI+{D3c4+7<h|C`eZOr1BLUAN{4+_cXjXAvJLKMc5z-l?<
zR|WJW?w|QYSu6qBaOIu|4ni6{TCc|l<SazvV@^yd_Af{ri45)iCGUZ&I)+;%n{hFe
zXJ{7~-nmaPWM^luL-uCP&Y~MN*j3SUn{tbuXp1hXutk3|t(&3`Ut)?b!ipnrN#9?E
zKIi@QkOMUr>Ko^VDz0Bcl_n!vnktqixr7E+JeQNic`FM`D+wT%495f%dFpInx(&>-
zfhrrQmH=u!YFA1Uy{QCsnKR0@K%1~<BF+S~RI`2p8e-X9xcERSuwsL6B+AQ7F*cN#
zSqFKQ`y2>khJy`l72IIK7%o}!mn#<J;QN?KnHWGY1`9&6wufI?b099p6OO;wDCPS4
zpZza4vw?b>>a^fTOv>~?%0iPOYitg)@kvmF=ZdLNaq*f&Nv6BA=#WR?0awxhc&`G^
z76JJI4@ElzAZgD|0q8XfT5kE^Jv&t@Sly8K%5S}xPsjsa?FIkKatFUevl=lDN7EYA
zQOMqq=b$6Wb9eLC=5G4djpY}|C;wtRb~Xx!NhfpU0WGTs@%&?Wo(4r1RTpH9UxAb`
zDo8^c%#uQb=|_v$m&cV)UH^}Z6F-U%Ea|I=%kWX>efaYdj>j&BF(F>2V&_dHc`qr!
zQb;|1-IJ^G<(^zMpK@{)nWsA^S7Re`cL|*QF0454kuw*ce7X3{r^Pp`8+=>e>D-zr
zlaY^yNc3#x%RLP161konPER?9VdsI$6&nJi-UHM=QU$9^>SiZVj<pKbSuWP-$h=rj
zBEjFfnA3mHq1{WYbKsbDAhd%stbTSQ=7qqQ8H8DZBUnyMMIc75Kq_T)E#|uX0y#35
zRKdF4VqTmd>$`7*;LFgYGD`-jO53J}*7r+Bp?TSrMurzc82t0LDr~1Q+cqGcsMuoD
z)Ci5HHX-yaG&NGC)gl5lpUz2XNd*AJ<ZWslkb{3K&)aXQ4k)e8$!qgz@#&|<=juQZ
z-vZ!snwm?bRF_Mnhh`wn+ti}_<dQl%K&oJMNfoRPsd<}P5bIlScGuKg4m>1RTd`=W
z6^m=prUz*M0ZL)3FvQve?k?@1)}~r~u9$=P_9NB*-Bp{KOQZ;7d&MkGZFzvy7ygz@
z>X#C;G_@es>wq<LJP6JlBUHP?n;vipphH1JiGDuvEB8qoO{+A0Qv6)Ei8j@gN-N-2
z_>z5dwd$=7vTIvzQw>IQ+~biKb{SwZRi^jTrf!jQ`@D1!(Lf1v@|M61V*P^|YFNxy
zW~hJO;_@@}&KoG{54(5`nwKHbkRW|akSi!MG9;BB%y2!6nS^38C%a`~SlFI!xI&Io
z)4vA&=MTJ^dYpO%){8TzMnp4u{P(MC#!};~p=mc;AzsT-mJ2=H;41bMoORqW1|1k5
zsLkKK?qj|hgDL?Rl?j3;0iMa&ft(qsJ4HBJQyVDfgs#eQ6epNx7Z!G%EzIzX^|hCB
z_&v|ZuVEM5&JR%W<ZC(H8fNnXF9dMr^RQ2w@Y<+KlLro@fh-CXQrkr#%py%Bm}Nf}
z^<!I<;S}!lS8_N#-^ZzVGdQZt$Lh<k=CEp@XXS<d4WKhSS^{jn+5);^_Uf*R>4w{}
zEbJZ`SgGBl9%CSWvx%}sFNa%tkh<db{a13iRp|WOwgNh{rzODQ))deUw~bvD(+#($
zu&{5q)qehR4!hmA+UEhDxubuMCR@Y67AU4M*aC0qsvO5U2J@WH!Va{BeG{!Vl1oK*
zt@h2oqWIsz%jRn;o>nWY2Aklok<Xi@%oM_!m3|<YWhRS?*`mIYR$HD+MYpZ?Kbt^6
zdua}@-d5WMvyUUAk6BwxH{7OJ*x9x)!!26vaVF|3wAw=hWOUbROGv<9(Sv#^FBQkX
zObUz^2kYsNFXeJ;is^>iUm#EBaun8*nWmlgDgXNFo%XMTo%VJPh}H(WmjXXGo)KOU
z_RoI-7cbc!R1KXOK01AMN1%i|kjo=uQ-ae`2Qys3Vy4?-zI>DKvtRBoc95ThYTFvo
zc?E(0`DYaWVQ%N;Y4SRf4HU8r`8<3&g*e7M8px7lQ8(J6w!6vGYoJ|Mkop61sSqCn
z2JLxyEg}J7OMugLnF2_87tB8WVh*#mm~OcJDe`0%+J4e)@{Qeh)MlEVm;Ubr$WZ9~
z+zuoGyI2AoZcPE*aQo_?a=A6dbi?gp<jH)KE%i)45#6@beOUNbd$mxYrHUO7HoT8t
z@UiJ>snTTyGpt31%tBktH_=jO_(^aYQQq1=hQ;q{i?{XZX{o|zu-WzPq7c@ma2m|=
z@<tT(kl7(^CrjHNQg_!<=K`hAUf3p-m)EmM0QYlyv%qt%rht@p!ECgvV!Gk>{S7Fr
zt;7`Ow$ukrR2Q9dcP;f+p!AXs6heCbmU<Zp7;6czHS2opy5#o2u8Qe~+b{lz!d}3H
zx+U{0{-ysv`_((=7jh<9+wE(a2{Jqq^0e=uU*-go95s8!x7*h;FmDM?PaF+&-ETkN
zi7S<so37Z_`gU`4FS2hhN7n#0bCT`!^INPSf#1nnf-{{6X6Vmi-p%Rousdped5usC
zU6+eoBgq6k-)G|=9D0%!y-0GQac%*WH~ctmF?dC=Keh21n{01~iSrC17N~QsS6XSV
zeq97jfwCQ!5oMDNdQo_-aoAKh((!|fO|o^2!slX>Y#rkV7Mpa1(^iXYO?5~U2Td$6
z;^_Yz_~#x85@vwS?dcp+Oh`TDjO3;VGXMG6&aK%inbVeulW7hbWT#UoSmy1_CTnS3
z7AUqWSm0FTbPwBMgRD8DmugQ>V9jIEfkNaTYDw2yyRN0OFI7uBn`?0w137Bx&Ue3!
zS`xolP-2%qldqOY3FSS@)RK6Af<oILnY*i{F3RkDI#5fw1xnu-EU*<hSxW>D#if=c
zCu-?#Rv>Cgk_`D!0$p^k;i7wuJ!*do4)|qG#4@DY-uNUHVW#8E7Ed>$8g_f<D_6tC
zUd6?}<VodKyorE|@=OusT>_nl=XE(bNx$<HYJuwoL0G4etoLU4Ju+l3@D_vXX0}<(
z^~{xr9+n~P!dJ#AfOd6Vw&p@Yvmhbfr3MLgzWohKsM;$bQ5>Iy)~<(yZZ#6}!;*SY
zP#^U_L5A#Q0SWoD(u(+sIhVO`-Snh#KOoBxo%EHlKcRcJ=zU45KJg)@hVc#r4kXJ*
zYg(%=eZ3eN%22_;Ca&u<V6z;s$pE7Q{&OUEDI`Az*ZAxqpYd7*w|u~q_~}-E<0sg9
zijT9qC+uzx>;k!PGj~MIB3IK%P@TC@V6#`FE^LQ@^_t!AFBJcw4t`uIY}MD|py>LH
z^62m|A}CbN_^u#`BtHV_mb6InZ8G9P1d2dR0MTF90TJ7UQ+&+gh#&P;*-HXx_F@O)
z2rnHflmH#4Fw4PC(IdTCx*&Zpv*<+$Xyonb6`NEAq@o`*A5~0QWIn3-@e}h=hx4lI
z!MN`d1$mOiy+;cs4ZHTZGzQ_7;;W47-u1|3Bd`a`9ME=mM}><w^^pBPQ5?w)nQ#Td
zTi|3Nx=MsQO}Gl-f17YMw^-EzyKJR;lL7B@1kb@nIP32A46)q=7-eF<O@Qr4@Z3H%
z&miF{EUi0#Ly58MgT*F7LQg`l-c10jN&u2xh4z=XfN8`C`CxmWxh)^Zn)MU+d~C2`
zdq;hV=eGRGbM#_?$(a<%v75!XrHuNkVlIK)^{70zRAnJZgPd3A6O4PmC@k6gRR?I<
z`&CC9QD^pkJwsI{tj(N{ny2dxH5N$k$CslJmbu;a4GR0YXB>6x=XJ84;XbWFk=5FC
zMW!cMjij*Q;xaR4wFt4@={MZ70|`iPWk{aPdS?U-($(*=Cx|qT)8_xi>-<biW(^7i
z_n&NbzTCY-nw`5HP$#Oz&c2o?j7w|GYhgCi!VDrQ!k=gS%KKoP@oTAf{K^lGUr%>R
z-!59vzPcggViGd8n1p;82E9nv2e|7`q(?!3|KHrD(AF})*NPqZ8he_rBfTJ_BZ$91
z9Lrx-dO_WI@kt=1nr3d_Q+2fs9Pp3g6kTn@2XwVvhS!d+9`vfKs|w+4zA>M6mx+D?
zMNn7Mtj*H>J-y+0((`q6b^B@Ys#TDXKdc2IKOCmI`qhxm17od=z1&SB(yybdUyTsq
z&PT{=Pk<1ktCzg&>grd+A7u0g#6NN9*O6Y3=n5kJBnn;q2>*DEF&?Z~V;mE-z7_c%
ztT=lO`Zk!}MIpH`X#;*>G^Bfe2fx7jI{xACkDsw3Xg?lg#ztE{aOXtJa}`d~KRrpl
zmnRl6Vd;W$0yvLV5Rvm(1q%sg@jh134TO2DqDu&DLg8Z-<dJ{uRS7E|5fu=2M>ED;
zyVgS=s}T4|at+J@8vI}0($48#!YvISy-6B8w%lunv!bFB>OBenU??UXTzc+mR8Zfq
zW{QWhK4;}YdLWS!zXH?+O5KqFKQjRA(H!^8w!1gkh@G$0m2DW29s{;dcu87^0SuP@
z69US?;CyHjNaYYH4f3F2f5tylC4QR6D;7zV-mu2qA1LzNH$~Dj5Pa@05<Db-CK-}x
zZM4qwR>T*pK-2}@WP+&uIi6*X$}f}S=g2|DA}_cnXn``t5r!G$d7cC*fqu!cgz%id
z2}3;j`{AD@h>4$JVS$&0BY-~hlo_<lYW1ZJVcLWF(~6jOvuf}FDGa9#Rj&0~V2%dg
z<}LNfR^<K$G}wo9I+5mRun*v50(=7+>_ht5<3@v1F9tN&2e^@dUJdr8{tl_s;P)Uy
zXz)@M<%%~P6&(rm7$}O063DODUKL&9mGpO6s;FoenW&<^93z-RRCIfDe6mtil<+d6
zu$==BhcMEZzkQ&dP{_aQ@Vgqp)Bhw)iKna{fUWDjwBG@|yjYne`Vwwrf}9V}N%$TT
z95-nsd7zw~a9yQ?AA<tyVGdNt{6P;~Jn)d`z{L`5OYnAj*myb*wieXxD}+ZHA16yo
z!wX*!;>BTAYg-qm=@noCPpEq=_MiWNf{*-a7F#@Lzz-?pM?Q<lkCW}Pa@U^$tP4<a
zG69!?cxCTPS#UgR=0zT4@uL-}lXD@KIUA)N<d7YtW;HToTFOXG_m~$F@L~XFE)Zxj
zee4a>myefip|64^7&rbn+d>cO0r+$KNJYhE3>|62!$GXKjt#6g95!_%VRn2bx~R%d
zZ&mgtHP42v5H)LYLe?B=Q`p3)R@SOP^gxdqJWu^=$;n%&mlD;=R-tY(-^|RX<zxmM
z)h4P|cI<S6poR$gI|#J;^+ql;Kb79s&QIl@9Wy_TG-d+A%Bf({2%n@nmZQ9%J4$aQ
zB`YN&DJW`QG2O?E=jUWBObDqermk{+k2&|w$q5;W{~RqyWz<#f{h524jEW}v82w}!
z^6`E~Yc{y=vN(~;sATl%Ln|}Z=VZ*oXfS7zIgicB2}b4q%^XI9xsPS;669{l>@d)h
z{jKZ6hNUR=7BigCE+U_pDrmQSV)_{~o|BU?kC=iv&t=YGIXNMwh>7Z6ABHgZ+t4N$
zjR&5kRojksAky}!$EM!{&E0rc^vkNp9n5%XPR2ZZ2P^m@=B&)g3BLC*QC_}-x%X!7
zkIYU}TTvy6Z8rFSK8k!Ra`FY+L9m*ZGUJ?_jCmLh=DdzMkITskMh`YoUPgntk7Dj#
z0OdObnGgb~>0@Os;Pe)cJpCnmi)ydMfAx1LVf%ZFI&a=Z%-dyeK{v7A*!wbH$jsgL
z7OtPj8et!TVMOrl_7*-#J@N?3+s@v?N9Z-o*kx~_-gKv*@#P%LoZa>ol#!>m@Z~OG
z?(OR>e2hNzTjbl$-ojU43o~}vTeyr$gZAY-gE_nHEnG%}xyzVady9^K){1=_y@gLq
zcP&Aw+u2+An7xD<yX-AoF^M_w<=me+yX`GpF$Hsf_%L#t-r@)AzD#f7<NMb{GYeN1
zZAWk6qy8#p9GjETF`_Qt!3sW%Im0<QVMIT|@R?N9n(bz6MZw&kK7`!u2DJO$!pG=p
z=DR5;Ul+ZFkI{L|ct%dfJd6gb=p^PGl#>&T_A*gkMuWLanfrA-^vT|$CG#Re=q`3K
zvk5aPY*^dfq;Q_szPCLHeBa=t(1-j&B0mr$`e#>CeLld$3HS|83Vq05`;D0tUj9Uv
zlR{sH-ylQge|qPVEtTN|Y#`vN0L+|7Xsm<AFhk*`6aV0^Z9L{ig@4^H6Z~7+xMAUJ
zOo32wQ=Zq3{a%3M^XWBGajw^DG3u(-w}l|WGQXbJDu{H&13>C}tvUjw-b#S4=d}u!
zIvz;H@A{|JQZdHw8Z3Qx0vfMX5Y6Ym?&N#H6nO!hSI<)P_~SMAF<!pU2&oEl(@ozB
zY;F3znYP62?!ZUo1_#3BzQ6bjTw2V<gvEl#-r0`lb#bSp8?V=w;LSyts)TStGi0j1
z^EOt!y|gY&Npm2dT!dd#`(%vk;a00daDAHu#o-jwjg5GH4PbVl)mn0pXEI*^-ZNZy
zAmKUi7&G{RU%Vf{Yqk^kJ_6sO^eulzh`IpuRVaPpX~-#02ZF8DUi!`lmMmV1&r6&S
z@-RYHY!75#K)M^;N+}o-5PUIf?v?FW()!|;+I9%C|04tFL^XobRtYn%yKlOe;3bPe
zhDd)_t1sbaOfc>~U&3r87_za0fiDQ0ptH3b%%I)0?GIX|+;Vw-!KuwH-og(8s;}O*
z`K$v8nbqn;`ucr9Ds9^ZC_C7rLyr@HZ5zUwphONfL<W%E4A|@yEagitzPP3P$Qw(H
zgFNN=Xd8-DSGd?n0-fVO&N~5B*r%vbsQ%goFvV-I=K!1(KSgmn>jBdrH_|url@*l`
zf#0(J{#Rc|`V@Q~q_srqTGr`-QpXbD>si(yEAOElh-JNIrPs0sOJ7YuV_Ab}?nWwm
zwdqg}K0IShD}paF3V%$lkpSwqCZD;zeVDxDut~sCKfGR06$s8axW3JnyNTF<U>^g0
z{=A$`I09F|U7-+j4fkTjGB+7K+hM`~`iNTaB_tRMAivO;(p9?k3`)h<ayiIs90{}l
zA**=hlWayBc19dlzxaWT4&nPTu!gxl8^K-wAVGK~<||fpBj+=PXWRo(AD;ur2Iez^
zm4rh7??V@W>J2EGKr&)p4YfS2T7->}Say69Df+|(B_H`wLXFZtp7b?~vsRd9p{>)<
z?Q5X7-wg%rkK9^mU&>)W)YGngNGA{}N%R2t8h!-<ZX@M5|M8d**(I_qcLA1N)mNaf
zOG|ejkY>H9KJrpb-772Cpi+CxwPk+WGzG7#V3ZEcVHL>xDr6b!QBoy$a3I+Dp)p|4
z>h|;<H{qTyd0CWdx{xd(_Wj${2x5m$d-@H2pwUf6q9}6<f9)F{bKb8jWv1(JD;REo
ztK^=@iq!h?sdeL1Pc`ZLt-QAuHw5B-xM{e}b`b9hETiNq;eapasN_0UHrjX$sQAZl
zjVH{vRV5w|4OK5^$p6A8?+b(q%ZAD6GE%6@Idc(vm<_T$ebXOw2*r|^E81<Y{wCL1
zCKqX923&U6p1#*alDNn+T-O^}2IeM0j0(0=*oi>~gorhdFRz9ON^mLRiK*3ck>SP_
z>uH@s+_PqPIb8J%6+K1-*iwo{Qtj_E=AgB)A&RK<?MDVl(4oK7B$1pZ2_;C{-6V-1
zHA#p<Qiw@&*46=uJVq+WaPOn+aK$~zyx5TySVG3RFd{WJ%+y!~!1>qR+pElUF$SYD
zD&t2TK5!eS?vyQQtvb{*Hn{T+=y`=L>k>f9P2U)FRhP8R^Fq!9B&$#f>*_7@lONQI
z|LJ2|@g&$>FF9WykwwKs_36V6K<}@Ow{F$ikmAL1_-o@|Y#XQz5rfK=LDt4%RwN$Y
z#AjE}@0RGLlvB=eE~Rvz-;L|@yT@cNWp@Q0Cu*B1HFJu^N8?H0GhnN3)ba6g`N4Lm
z1K2(QJ5Rx2Kk{Ka0md48=ABLRxaIRSJkJ9YVKqVaI!}WcI0@|Gr&4MifeIU_k`48U
zsg@Y2UdZ8!;e0v``6zX{k{fMb8)->SBfa|pt*iHzv96>w^B;t&xktA$6iIT20F?u=
z?dj7OLd2;j<h%8{!$gbH9n|O1PbB&~V1s`SYyAsmM00{_nF|boLS7U;?>1r~N+~0L
z1~Y<2G(X6yvUQ#!7PFHsBzB}%@cpBG48rlWee2}-QF=!|wg@NRi3eeniM=`$mv?un
zN&Q^vmLsl)wKd;m`&&Ph>f^JfQ)5lV^1P(%?M1pi*f%{&IkPsB<+Gv^lyJQ#JkJwu
zv0;x970dGp7TEt4dmz@lpu7Vx!e}=yJ)*eD78Sy^o^YKBb4$mI5@zUSC-j07dR0PV
z^ChHgEVN-tSYD4*lJo(|x6n?|Tc|tZ&$uXqqmG4;hddzJjtHq4OoH_VN#NjiJ&gGD
z2}y$D14s34`ndq3cBu_e38_JSUs`k!!xE5!W;04g@sY-}!Y+1spe>R-7Eyqh{9AE)
zCXe@&uSW<QmxPq98p9T3@vP+#!e(@=8SVo9icYCQzP^h*Q_5)GJ4!)v2NZw(H<D7Y
zOyMsP#rW$%R6Ru|{k&0ApP`l#p?dev#jyBSG*s-Zm<y2$5Xpfc#OA*e^wV=4G?B(>
z$c1U{8_48{+pt@JL8~P+*7T@(^LBnYYu%95o<6RgrJ>$zr0l4SJgj_@U#bSt@K>^F
zg|3&d=S;x(Q*?|?1*Dq&1-}k$1u}$?7+^u_A`{-uIyif0Aa{hL*;&XYL6cdBl9)`a
z<VIvj$*IC^pk|UDJ{w2+bgO^eX-YAhN%l+!y-Wp?@{(*~Kjvg1W}_3uBo3pt7)Ei-
z7(dX8KZ{9#Et=y&8#cdY#+vvUjgO^`M<GZU_tvo(86z^lO-t0Us|T?^W3eH5$4@Fc
z;74lQDi7mg#0Eer&$N3BLYb`v_^>6J6CIR@Jww4JjRu%{9vN;t*{waBM^8TBpqC1g
zpS#Dg1;>>u8FuAacB(5+3ne%rjrW6oR{LTyf<K0rL?tK{M<kRO(<LkHJ#T?6Wh4Pv
z5)&iK(D!Q;>VeNmHI@mRCV44O0-JPP1d6wi8aqRt>`QBkJn2PD--L8ihXt8u1lYrH
zr14fpf!^g&1n|djTU3HR+L<1poq#NmiIJs3JEO4KxN1!TS76zc8f;lpv>1>TAnh1W
zny{qV$Wmg2B{w_7EwBm4o{df>_zosDrGUy)i-0)?${^L_7e8iS=XMr2za@%=*NyrZ
zCZH$wxlUN+{G<3A?q-GKvDt@pFgKm(je21Cy@BB_Gaq9z&o`N8Av5fEY?;na-!lGL
zDr}d86o4}l@abKud6R_z?GPDXX>c<hxc|9S`i4gJwzy!$*N8=BPZpm|k&zK2GT{lR
z>TXt%NfJ^CMzjV@N(R_C113oZY!<;H$<?x;po0Svx3dA2WI$vV2>^9Z=h(9Mi61z%
zgM0D7tO{3BBaLqnJtYhXyz`upbDYNFb=qn`Ti<NM10u`TPlRKE1#(_Q8e^Oj^0%4u
zA>2-H=0x1&w+SPy)=&u&?QH16A7SX$;OTo&+&5BG$>F(0bvC1@GE>z5A&d1acaa=h
za_rnU!eZT+Townis6*6Sxp6VoUhftlx6a)H{NUNF|AX3XoDX{L^|ZThs&>~OmCO2W
zEb4F+g;sgi@5Dukhm(@3if9`%5^jr}=uP+=WJb&7ZHA_OO_lpM-1fE9fI98#I|9&E
z`+6d`ef>43eND6N2x4*Cl+%~OObr;1-Za*<QW}`QVa3JKaE#+<SW=xUk&-4zqyj^>
zZ?Ke>qjO8S>xU?1jp5X`s&ALE{aNJ6j&NlL@O8zvXnZbXPo+>w1~mqSYP@$FZRx^q
zP{zTUJPM>_(X~6~<Lh#}<k(zpUzvwifZ4E2l`wJs3;UB_U9X+sJeYGxp?HaQq&q|O
z_?&)^el}98(RUFl6o>yox@a7bMn}LnzeD9Nwjl>3=>EEa>A+S`Y?0(}t63Pn2}Z{I
zG1eeQ<_kdQAp$e}d_?TwAtIj-?sFIu4-t0~xuIDw28nnEIkMMnKLx*F2@cAj82-mg
zfh*K5N<UGs8Q(`G@xouBv)$ENg)I;p>TKLYtg{49CjIs<35uHzS*pwIMF{E#`3%-W
z?{r~ei9hi*CW_lGPhuMqNkaZXN7l&Fq$aKgDGxj-q?~}@?n+hE%BHM!a?ImAoJyOf
zYuBn}CI0mBOrPhiE`NGC3BL^GRB4eE#Ns=11+my$<cF{}UP1U0Uu2?35Wd7^NTf#8
zLiRbs<;&+H$unFgm~=pTyNZmT&;XAyVBWrox@WL4$aXr|fJqWkiH#L*z!)UhCpT)L
zl4QU*V#^tDZZKeyWWc1yQ`#6Lw)+j3BpEO@0SB;qWsqPu7%)i!SpFv%kzx7JknbV!
z5wu9Sm;uprukxKF%p`zd4DLzT_kociSgSs<)o&KZaMwnYJXa1~4)+hHfQl`Rom=tX
zQJ;dQ@Tb2X85)gX<i~W}{SH~)K#YCu{7(!c!!yW$7jVkxv0I2z#ZT(<(^1Rlr-O4D
zAvh?;mtU?wmtyuezWhot8L(M=9S2)G;)QVb0EU2o$Xvso8Q}`%_BmXq+n8Al5PpjO
z)auU#`ZE>T(9E<1Sdgf(+TTY>bazJ6qc2mC=tR8fa=}Cl$ZPq!%aj<Pr_-Td5o^A#
zd}=I(cbGt8i^(W`0R5kl<nskE8_UL*PsOO5zZYOYvYvrjj!YPsf(VikRit>%sm!2T
z^LLmY5MO1vn5J~sDN!hUBCa6;Dbq-b_<Q$ADCw{&Y~G|`w4tER6g<t$0%0Lg6v?i5
z7v<o?*bHE;VoxS%7kpn4+UI|gFM$|Vj-2O;Nll|7;B*upnk-ub54ZWiZwM4(M2~$B
zt8Q{hS1_$G&C;=YjEWvfEt(}?7`)L@F(^LSO>C+zC&01(7}QjCb}z<N1BI;m)#w*^
z8{YsmL{g38Bd<31SUm4y0o))1S4EkL|Fkh94jdy!jk*F+)6fhqg;NOsPQ&u_<<bly
zjWe*Yh=;4L3?+7hN$iKY0~$wU)n-^i?GGN?f*E;J_;>fYZRI|OQTQD<kVw7!WNPdn
zb!ErH>5G%ng4ul7jMDfGHlt05J)n)AHz|jHlU78D!;d#NArEw@)&`(FnkF7hq<LN_
zft<84fTsK4-lMOPC|u;3vwJ8$e-k5?HX_C!!|OFD8Gj>TqIk#&EpbARNQhOTB}1EQ
zO*4F$4n|aNZTgXmffgXRa|fP{UeHKzB#bb&b|M_R#5l28%b=r|rP5vBCckmE)|KTf
z%(m4<2K#iPm@X|PfvGK>iv*MA3a1r<+F}*8Hrk}1H|-V{!4%_Zx;@`y(@mDwBR~Jh
z{-aKaOEk(6$eLd+D>gtv0Jh{=WOH?yaxbl6meBWO%u7+bvWlV-Yp%J(1Y&63S_CIN
z;y*m@z^z-+TKWnErmPoZ+|qM7tU<^;$_m#C=1oZ{UyOrAfbIZdb?igQTWp~d8G~I9
zw0Kdq56zF3*8`pJ;kiAAkZ!Y3j&797i(%*wX{@2*{G|Ix79?P-ype40C6VM{Gu<tV
zb<1Ae0o!CRlH5s3fN~lBud>3x5^Z9ty(1}cwh^lsHNraUuhhz%_1B?jt-Ah7NN4?3
zA${wwpUjb6kZg|JqY^UX{f8-orQv_yt*);{`1Fd#*k|BV7hkPe17yvKwYZ5AZco4S
z3w80enEdj~26B<J7@@Cl)o~0@!JCG4T(~eaFZ|KZV0<{vK|&~wF@bw)QDipk4m4Jh
zkcvGQsQFwpAwly1(14kH@B{rCJq;Mevhbb4a8F?|u_uB_06^wttI`v!MZE8m0`amF
zUVN=eBVKmA+U-$>7+o|RKn-oD@*&hRE2HmPhr$1)?p@%cs;;*2nUH~qfr$z>YLqAe
zf}%!64GKCU>R?eLqD4g-1!=68Mx4>8D8WoLV~9pY#am13rFhr3Eg&icM1s~!v{tFr
zHnz6Tyn`04m1vQC&$HIv=bV|$gwV_X|9$x>bI!i3y>5H$wb#BJPxfOUQEN>#jNC9D
zGAEnU5B9@V%xBTK<-Qq#f-!D#v5C$=bcIckVrDFw*&`9U-$b6_wn}rIl?+N)2{AyK
zOZh!IPp!VBn_5JS`DToIAq_g}L{Uc;E7Y{OgVhYPWyLDG+6Cw*!jO@HM$!FI*<g@G
z!9(Bm%n?HKdr|PE-jchcq#6Zh)a?IHvOVz5A|2+iS{B&AXCS}gTB=pxS9s-Ld*CJW
z#HE%MNRg!$KG=^3nz6O{YmBYtj!_w2pI*{qcs&Q7h;0r;0TDJ26N<o8wu<K<o=@a6
zFgOAjGzX@+g%0-=8f^;gB83if3l)0`6`DeuuIcJd?0G)b#EeUaK(7*uzU=N!oUjL3
zpgW4Z!}($ge8IW|2o#5$V|hX1^kc*teE1V|pwcL?<wg?Vx(=XH5LMtM=Ik34J1#k&
zZxI&n<U#A(JCwjPffnffim!(D|20`hF{^<NdBdi1X&P?aK7xNia}^fKWCKg608wTj
zh$u7uh(}@~ti`0VVf?1$u!hZkj2Z(dBaR}2Sf+s=JOwEU?uY4&Z)loU_5mtvgg3O&
z7r6?pbo)|AvU<0_ExZ^@NPgb#(uoy9H<1a!Wz)*K!~Ld}C4$R#Z7Ql~h2XLX(tw+M
zTfPGq1;F;LmG(I#b%f*ZeeqN{z9GD&BaE$e;c@GATGGloo!FwWU{fm$XHU0@NB4F1
zQBGnwK(p8D)4lS9LE*=INIW%O<xCSVbCDBkI2X|xtf}RbYcan{n}}4hIxT4}TC>k}
z=9v|5kyJjZt>x40PTC@^14^`II7g72Sh2V98B{t)<%t)LfXcPbR1C}M3lRW)AsG<x
z&PM2@5DA?rz!xHH>kDl(z$(Zzoi%*M6C&`kLMSH8xr-0-v{;_BD4_F|&{=@cE2%Vh
zf<Z*DlEuWQj>QQPE>gKBVU`h6F9OB4;!D3QKAl@Yro&x$mg_EPKFqctho6{V$^%11
z;PnTn@5q;<9)uVUE~_WO4V`%yX5@&qn*^ne%06*7sffGkzTJs9v0Wh1?^5S1NJO?%
zyM;?pxbZipFl14M9dtqocgV7F*1x~0yBpUP5mgu~!8jQEnW+R=t%BaGrA_i+iAvV9
z1W2t$Jw=B8QKl1+c|-EOH?bqoO9RKM!LdryQ1z-<K)3n)?&>c1fAFV}lXzj0Go%J%
zgKSx%eQ1Psq0PUFYRQCW>yQA@=GMRH+2HpBx4H)9Ha??VGAg#_W>41jChHAk=~ajC
zT!li}?ozy#t$=ma1ohMvY!Y`Q7$>vF%o`sOb7l<elef^{!3M=!`O8G%d~=oYPPAhj
zj|M??<5vTeo8jQ{s(g_#*g8a3r+@EcS(TxDV`JDos0__jGF3%qKVsb4s062`1BxuO
z16=4RLW%hcP#k){1Z)#~)XRn-fg0M=7Dpcj9Y>7wY}Sd9`Otz|`~s};7EtQ^+m+f{
zj07w0kzsFwB}Z2}BotvPwA2<cv-&t#M11o){snhk6-}`o*WsT57!-!r1s`X)P)nZf
z4JAk(j1;soRayx)+RM`+q4leaPqQ#S{}lTe@?93Dt92R!<5hBfB}D-L5}XC|%E7z{
zx7(!_tNZ%`XOzU5&D5W6o4J|IEHQa5`{%@~j<TRQUl<T<jFV#k5Jtc3FL}m6;{`}p
zDF(<I+#^dQ%UZJI3>{hS#$>H4D}mt22ElzS5?Y|DfPe(s=>-<s4>keYe_;M7jetyv
zUFZrSRpvy~pVJ!Qcd7rPZn11CGMU~6rrHLsMFY00+oRvWp*=BcE+lt-kCw&%%hIwB
z)Lk(J4PT-S%W8vZSXGB&Xq{%;?dNHCFVl*&o4OqB?qpJ2O9`_YnM5Xlui=9%H_9#f
zU<H(Rv!v@*7o9xn6bIyNI1mTH{%m_9^#$`;$29FuTZOJ)M^@DN#5CnKyQb-@o7FU(
z3glq5{>E412L0J&9fmA5P2*^EvYDn%W~3{W+Loo?b7xi(=@KpIJj*icU3`c#`IVWz
zQrSfdf{l+@4OLBO^S6a(ZIl+^po4cC^m%z`yg5({=G9I%D1?ronD6^a93Q43Jb<44
zzA=%%Axn@deJeMcX<F+tcs*kb{YU|b{m-><`Y+9d6b`q9rB9(ziR8`x*PHtk*E~7R
zJ@F&CD|$j)j6iIo!=YvM*l&+fynrTojZJp@uS#N{vs_8Yz@8zADM>#~+0Af~p^(Kw
zmUdr>Oit||j#m|>y!~F&2Qyttr#r!qOk#V{T>+C513YF%QZPyytI#yv>cjd3_6&zm
z=d32FBm1`4R~!-}`yuxuc<9za5jtE5F+f0x?@0Y%7B+=4*<@%^Hf@>KJDWx*_}PL$
z4mK5MVbktllQK1(O(#!w*i@)QWwPlUhfP&yTQ>dV6R_zx^w(o=lKvXa;1g&RK0SAP
z2A^CIGXTPPRM=p}%ZfGb1xKPi5xNvzMBF6ZTP*hL03^D1phI@(bM^F`X<tmVTekO!
zBbO;|T>bSAOwR_jrUtgUP|yaQ*M&xF)vUt)TrV1B?Lh=F1G=2{DrOYGehP02FsMq&
ztwvQSCHofZ4NSzb+Y>*!gnd3%CW$Oe>da>XqGC)GI*Lw`q702YGxV!4v1EImQ1`A#
z;v}5&7@36gfs=4fiOeK?_}^s`E;AyTgztZwh{GG>{_S7<zQh?790mhFY;=w9Og;mf
zWfv3i!1p{^-!)nHAuF+YH0Cm8r}2vH(*;Ols|)06J_E?*0tB%Yj1u1I^*D-o!8%U&
z&XtK@Xje)T+w*6KJ=?=8k*e|X6L$f1RGU-zz-gKs{=hS*VN)cRGn!Iy@6ylHB<?*(
zj^C9^DS0e6j|9|KM9|_+?F_UzeRu`0WIOsz)#2fmSQ)FD+1vxK`F)s95&{B10w{7Y
z!0?H4Y{;6A^ux}vz2+iZDPhu+n+}wwehl{;LAVQ~8O-UC%|_sGoo0Z2$0Fh80%)59
zbchQS>7jFNV_PvK+s5XjF++&XhUabDCQAk67&)hWO}36!rdAtXkS{f!=TZoQe@rho
z&#ZnFz$l>c&eJi@Q%IiN_Tho+IUSi6Ukg+ieP&YPXQQA^S3;ZESD3=dF(GksOxR((
zvo-qV#3qb@HnHVe0o$?j<A{MOd4MIqoLW7E*a6Y6HDnR}iKwXPPm(7#u0R)-F@=q>
z3>zamsM7EFIJzr)SYFcEz=3Rl*rA|KGT@A&%6mMG5dS8g7j9UK+08=bfvpMjSs~oa
zMLaY^^wNU#bpy1$4J-wX<1Y+XawJ|sLOoychpurNX)s+xc8oWfJd8>eEuwCij$p+H
z$uMvk^HybhM*RAZb=o)~rH<}nWuik){mfHYf~7=<N2Op7@aRl_Klq_e1K(gh234gT
zhITDSP@{jKR+OlVF($(wCJS78#DR-Q<ku<Yjr^u1LV&G+rIBAgS>s(qaRaENq2;IN
zXv>mrY7t51dn3ONbkw;Pb&>-Nc1;A1#6LH1a%f2MkT!F6S9g4Eyu;t-??841+D9&b
z7<^kS-!NeP^))~Q1v&^12=Ld3Zzg4DSl5L_J8;{4*Csde8Gt_2tm{2lb4}J-WU0fw
zfeg>)aQ_Hs82sd;AJ}n3gpeeNAtIS}-A3&!WuIoYC*<85!T1{+0$CdkS^V_{8)c52
zowU6b|7F*^q&>!Gkd~)e4|=lhHd&v5%`TShiTCiXq<%;VXCpOcl+NP*%L|AqA|DHt
zR?sY1tGE5gMcRNSwI?3Cj`D6#EWBRjF6j=N+7o99LV>4cuA}`pxo|&aB|CLmjI4sF
zr=>DXhR{bwszk~TFi=D#fx)|HyTP*SdQ>UpfcMXR*{}|Hh?o7+*r<hKD{K`~Gb<{A
zGnyI%&cxybW2>aLMI}ARVC_=!9u!J^bciRkbrVuxn(kDGJLEJYQ6kG*87lUKTpQb>
zVmgEi5+`yj8AC-8u3?=FP#9DZQB-6wd?VnL2CC#PKUN)j_=vG@O0%$@yov25lSFMy
z!c7WWBToAgJQ=M)C&L39clv}tF(g!hUE7U2nHDtk#2OlUdLAbZfrg$F%i|g;tbQkZ
z3I4(u9knP7%zRZe<~ivNJOhFq{@;gkdb?d6wGZ7c!NTZg{Po$7s{ERrHd~LF%UZTc
z1Nz4V9bfAtw}i!V3t;UT3(>(KoF{IiaDt6bp(T)D{Uw)y=41^H$$2S|FqxXov`AU$
z4D0ah{Cf}%8iXl&Y*iqD?$4`%oFz}Q6fyJ)W?{{-iH)V}$dw3XBZU|yCzOejCgJ*`
z$6-5*759!|>&ErYdp{?($9u62#va{AF|!z#Av?JUiD2gUfe$o&N(Li^7<hxF-?z;9
z?00A`JDInh<dS*TZ~>bqWCj}#GEG}}Zb<RRfR_xK?0WDnGgxjp<moCBTeMw+;YEjs
zj4%dcjnD|t)Ew)Truy?OO?&31>G=~~nr?s{1lWTBmNxFZy_KDoCO3Zh>PFCX46;#r
zfGPb5dlwKD5|=ZO=^#DQi}bq<y&_$8fkpa4G?GIQ{XIy(u14`{fF;t8m!u<IKFh)z
zN~9N>><tuz#;_1&J(E_#;LF{D=m`B&+q%)+$3mr{GIc1<KRlKpg@5QI%!FsjNwh=x
zvijSY*@@xCk<*`V=#}Jx*%rmQICPVP<lRni<s=6`ar7HtN%Hf1rITEHp@p{};3e;u
zZ0wnqerrZ3*jN%m2b#2jb`pbY2|)U+bL0Rj)9E$dX~;7yE9W*Lmst!ehYQeO2oB>Q
zYw=71mBv8TV+a5|><4mlHO&OLC-yAZ=mUCCqty$@BV13hC+lamGDV0}0i;-&_lC(c
z8zqji;AaE~v1Y-sk0{QYlLf_U-~<#)42q}cM)A_)T@=RxMaw6nYPePXGQXy(G(!Cu
z!bMn1`we{R{^5o$WAoAEBlTiM8Pon-gpUz~lC)o~gjn2#>}lw_FmH%>JCFtwQUr&(
zJSiB+zXw=V3ib><-lJd<Aj$@I6sEc9{y}JW0gH*g19o@PkP!=WbpI20%DvcKSNE@c
zC#UXzXQIp1Kd9BY8DOdV8;X^k)<(IyKN9egkD6>xcgL5ru*N2mQEO~EELK)^3$r5`
zXl%a=xDP8BTL)f)S>KUXg@x5uh&bf1kb&a{K99)G&8JI+n_k`_CflBP;C$Kb#p}-K
zq+{5eiO24_(!v>*(@tnL1WcWIX}TI*HA-3-X6rzq5YB8*94#&MbmAJ7u8C;1PeOX@
z?VLiI8*+s-4ptTv{N*|o(nv&Rh*3`=Edada0F&(z625qrRY>{SgmhiHkmgFOBBbXp
z-*F)gM7ISmdI;$|(n^Fv+C^KSkj~K-c1TEXkH{{hU-d4e2j=xrNMqj0DWunrafP%<
zty&0R*^^>Ja|!8#4hZQ&lkE`_K8*A_^vCKNY@DtHsv(i618>oQ!*b)ps%P(CD<sUw
zaKZ>vi*tF<)sxOSb|5<&DC8IwzM0^Xv}O;{yGzjwN&4jw#V!~8>COt|*KdNvMo)2L
zutDOh+ar;yj=_cpmBOxTgu-)kQs{}&VDb7QOJE%k$U)#99s)aI&!BY+(FzHCS8g`<
z@;eQ@yVAJ_>04?_8*|kPj2k*-0<5<rD;z`l@Q56cwBk-5^ee5*bsf~Hs7s;FtFDIX
zt1gH-uE2{$SPH#60Qq>lD@GW@7|~s+0T}>k<HT#RD2W0yx`lHI>YAnYW`Lhnv42LB
zP(;=i)E_ZvFy)*UM&IHE6D;o1fq@rdykT$S3EDwG79C^8cjB6_K|m*JgU35dP|kq&
zRb8*$bo#|s<c+WA6#2-bU7h}PcM<tL085eo)nMI3b}+nsiG_DK;3eCU4KC6z5<bGu
z6AmC4%(M*rulUWjZj>HlN+<czGFt?!Pg|b8>P${sV`ZD!Fx)r(Iuqbmry(=j1o(2)
zf;Yz&z&fIUC3;V|A#{+*4bOTz?8kqI7HJ#7<-5*_i#i(}w8}+AkY#qSVll=<j51b%
z&l=3-AT4MJ3j1AM5?U}k{_}Jk08&243K3NU3q-^^sJEv56^A2|pBUw^ysx{=^8UGB
zgZHPAGwF>vi~HlqAaJjXWxzfD>JtC3i`}r?ZhQtl7Xu#zBMUuQK9g02EDgh*bw&=J
zf6ENup*qZMBUWi8HnjT4o=SV%mAxu$sMZqN@oG+`y}Z&@+De#G*r|`Bs<dN+${EYJ
z&dV*ldcaE#HQ7ecW@Eu0!68cqWQVcE?k!N#ob3hX)$TB`gmaUDeb#*jhrP?-yl9xn
z!MoL<h5~YhSCqxzW$2-K?P=twi-hkOyN;bz3$;;1I8Q@d;$A~u22>H6>`O4pqL$_r
zBU8(w|0H^cWT5xysp+i1PNd<%Sbji6T2mt;jlGiYLp#22F!r>^h@^X`Pa7Y?C?+;7
zr77mf!yUzp%!Bqk0T;U$uhdn_qc`MK$`1e&t(2oDCm&>YUKTh_Ja>%+H?cdyin`le
z{?;y=5)M@NUV@?IxsEuCOrJ7aEU-<+5FpFlPOjN#p?T>nI0|7Sm~oyb3&zU9DIl~C
zj(#t6ZoI;FmNS4`4kzKuu`Zp@17Cpsfy^K9@k*m;mR5HIMnAwy8pow|j&{{My}i!6
znPWac?%7vNA6=gl(~~`z?xL8!C{DCSt9xR39$?{E0Gj{wLe)Lk4A(MP97E*jGdXqd
zJb1gVJ>agmG~IjbP)9DJdlf*b7n!)axBBIrlvW?+%48Hw94PorEh)&QdshG!3jL21
z;_;TO+QscX#k@l|Yc8gH+`W=b_u?ZR8gX=fCqXETwtAs+am4E0d%S!+dt9atyhDT1
z$BrE=U{gO*ZEE8_Qsh~wx|>>V0=(Ab63Gt?pDklxu<;I4o)*G8-wnpDMh<wh7=ZhP
z@2K4PZaBon_g3sc0NA4qzPshb_dVR#k^B-nL+PZR3`+vS@U#So%5$1DaFi2cJ@eEv
zWqI*TnPfdvd4?+>Ak;7Y4Nw^{OO<?RKUZNLR>;P&f5HtR7V6~Dl_h+#xn986p3SxY
zba$^k@j9eLtb8nsX8G%jR=CwdXETm7%qy<xQ7it9xWpql0w@8)T`p4$p96rNt@m(}
zPeSb5F?o9dcYt{7(q6^rn!IYXn?vpV6|NXJVE;Y9MgSH~HU7$&0jqYd$txlqSkVIF
z%D_3ebeZf6-Z00LDsKNm<&~AJ4#az*Rfn2Ja$s4YU+>hoF8}Roa#C~H!7er5;D7+Y
zK5~gt^9fqXE|rOZm)wvhhO9`hLp;Voda)vXDxmk$lUxye*p?IN>ko2~K0%TG9DXV+
zoJ7ESvi~-~;#q0eB5b(Qs#uimSj7y+Rv4;9U*Qvf??gCFX0ZD6_mwlf4px@}lRgo+
zRc__Z8ghOB+kt?rn6}w!F^iNyXIBQ@2UowI0W2M?LW*N7Yd;P_8nNy6<MXri;{X(e
z{kXvNWB#W1<MVsz$Gm|&S)u*-<R1zbV}0z$CzpDZ$n@i#0HPNjyTiv~%!G3E<8fnL
z9{beFKXH-DH?tqR!$%nK`reO)SLyxu47BQW3Db{{Mzg(8<M!iMU(89(#Rs_59E#xr
z{rC^+GB@V#$JYQ}kA9p5>2|LvHU0QTK<@=<R|G?IBaM6N95uhLzaTwYkWTN%F8g13
zA+sO1)!BahB=XpgMKOc1mrOqva?p=&orr$SC2dS_513)b{hydZ9Kf8xPCAJZ&5|GV
zk;;SFdUijh1B)59Gc)uA(Hsx3uvW5cVy%@+<)3lIx3dA(?91@G*QM)dYxdQ~bnpe;
zOxDXYWw%F<pnKzYKg90Z5v{5HT2sSXQzfmbJz7({x8}V1WFz1)C~($sobT)247A`G
z6510-nLN@UdB9@>pK;m@|I*;{Rc0|<&$!={h`IHS?gU#3Sh^F8Pu8I+rbR+ak_Lny
z4(U8n(qXYA9f<Ka*G{m@QOBGCt|e#_vBLqi_jC?jla@LIsSN#bSEfX6_`tor+^%W%
z_MXXEKlt_xo5dgW?qW=KXhWHl#1e#{%@^oiD~dF9mclkP{**bWxx%e^h^fh><VB_?
zU(#yEDm^gmo*I?{tM)P5Vy}Y8KwaY?FA%d$M^ITF%ICUy<0ipbk<GSufQ8Y9gn3LG
z63dJk192goYZ!<#Ku9^b0*BWn7j2jbr$Qli>sPP1#`fipR`_*|aW!iB61QLmVS5nQ
z%+Z7VfQ}w?6$Nk6&H{4dwHD+p0GX2I#vF(flG5RHEqR6J@K-e_*w}!G95kiXHtg(h
zS3GEe*nlm*r(AdvxSTT$EBSV0+v;iZYvg%P5Vt>k@f~Ab*E~z-Bg@lRcg6^pb$deO
zfWH0$VI8)Q^~$;p*IAHf0HiIv9dbwDEHU<*$>wia3j01911X1kv|#m;>n-H3m!%>5
z2=?$8Ij49wuS7BR?uKtijl|yn+}524i2?_{cb3?4Ig<WeKEnb$IGz?DFv*iuX|kG-
zmDs%$O7-l1_@{E2>^Y!<(t2|rJGQ?Mk$cZ^S<F$#0MLSU-1LrX(s9Pyv+Et3@D6Ef
z&oBGY+xMKn>yYwy*^@v0S4_s~?1Ja;&rZYe&%j3fv-3^(r|<;)Gw4nHGq?-?1Tk6b
zd~V}}xxSSh_=g>!b^fWoMA2+;J06&SCTM96)bWSw-0K6g@#trrPS$zH)M;a#4`xZ7
zGqlbWx6UC_hZ_dHyZUEM09g$@V&1SRoJLY5NW!&AmZmbLX{69pPMSuOru|9N0i<aR
zX*!TJ9YmTAE<<fN{a6e@ll%>XL;PK}8F;SF#}gfFU*h@y*~YzQw@nj|E7o6C^PD3_
z`^I-iOT*2B?nVyj$InV+f+ccRs_pPRUy65M9E_rJvTM+#TJlu>XrcR1C~?9#o`3!*
z+#(ycc^8!B@KYC%TRfVNBOV1fP9JU_QidiA1rXB}%qHjxSU)}7eE8>Q5Su}HDA7Fh
zOTM%K;^g>d2k3493YaATS%S^et0>FWrS(?RgTKUKn!q`5&iyIKaw;E8^Mk^W587-`
zq{hhxyz2m;jyheKOg{FYNacUNQdC5cMJ`1X1#N!uLMhtQrD&8=REeMFp(FX?p-6xp
z2cTYxnCPKs!Y@cs(@aBAJs(W-LXqre+yfMWx{~<XRV%;?j{>ZG2B!*;Rq0jCSC10K
z4D)8DI_Qs_G|^9jbnu?CLJo_iqF7WdY`-?oc${IAvA3uc7I+2qY^9G@B5uAlu!`%(
zn2A9DN{>cMFvwxlBA_a#cJ{L=EK_O9FbHyqJoD)?d7|AXEN5xzV3Lw;Y3f~Out#EP
zk~T*$ki*MYZ{5~y<_5eW*B}SI_|1`B-75gwm+Y@z@}Y-0{p3fdQ!@iq`0@6W#fO@H
zG5|%jpPZm2NAgG2;R+OT+G)Wdy%unn!@8byJG_9t&o322gm%by?vf>^ZBadkK;`W?
zjQuTE7D6ui=dFhl#bD!;K$~qyW%Q=P^?@sp<xeh>j6qLV3I474k&v}PZ6h`yCvHbS
zwhTd7a!`Yooz1cyoA3n6_8rf151wAc&@10R1g?5`1$=b=)rS$I5o#K5!>dykv|ezy
zY7f<qk{30M9_H{8MTQ+=7tBUf=Fo)Km|^*gy=ww32cPB3Jy@Zm#0-<!Fwye`8|~+Y
zi{VsbVW`8wm0JWxW7;hWXFTrVk!kWOUO6`h(;sn*=z1sgQ(?7*<7>kG7AkU7Tc?`p
z(9hAslk4e};r6yd=M+TE3A9MsuWaKZdA$ca4$)(WTlFPu0(Iy1L%X;jJe$<u50BOE
zV~u%a7c95WP(wa5Qo*81kYY6SS87=lQ=TkAv+TR661ePaLt>&#u~P_n20NvPYfSVV
zw{IsG(}<+e-jihv><MkXv#U;IuG}r>XAvwvgc^fra-cM*Si{H8a~tRN_w>%+0h_=@
z(he;pi-HYpNCSm@@y}WCf>@?*-&MRmO46>Bv*U&>?CluBcmcX^0WaRg*bGsu01RK^
zf<rJJI>*zhr*vtL(qmbAO!m^D9;N%EGzaBUs|Ci|T!ucyE5Iz(x{so#WP*)<k{bin
z^2+RsCK!`1iq=fNP8GLX^@R#{&~Qr7Xk9gMV&c}Z?0@n-C~W;l<uDfhZKsOvAq4g8
zP;(D;dc1B_mu?Gi2SSP2Mpz)>{s+9TAUjj|sFAS|y4BCt_$OHbt>!!bSd6vJ-KQ4N
zJEoXqAr~_llwGi{4n_a_Bjs0z0ZAyPU;|{yDE@_8{zD^WfDL3DDW6~lyIqfw^0a^C
z7%3mEup?ziN6LaR&PaL6$uiO$gdgwdaoGW8r2OyzJ5mnUlKK2mn=%=N9NG39DR=ho
z$VmCf7}tnnq`VOA<`^j_Bg+{nTP6$sm*K}dQa*(*IVNfjN*^iD*Rm5?)-zJxfU?er
zlVhZDNAztZ8j|NAL*h&Mt8<ZO_Rld=E~RGJvgj0*2dVam%G+KLJvoP_|1V2J$E>F7
zj+2ie)T|29%#N{R1L*!<nrvVH_Xg17e{BFQHmWrTW+KY~I_j7m89+}zKn73_2mAvI
zJ!5H&?XgHMx6jUS_Ad{RbOi}6+ZcS?lQ_PN=F~avF@R=c*>(m{%dR6u=KszBTKpdx
zKyeH>=K#9z{+R=)Te{}}`uEY91E^cN=K%ULN@p8D4@BqruMMD|n!_Hn{;TW&`uu_H
ze>*&Yo|$7f+ytieVK{u*6thNR1vNhB7<+f$fYxRL%@|{AxI)i+4|>c-k-<MAUTL23
zSY?wvqa>X=I~8T;m?>pgvD}u%bA=0JntAlhTWiLEM;wijB}SA*?0LZFVFj`p$_rS_
zJCd@t%sB&}xg+Tz4nTENqz%~cX;e61#&`Y+!;_D}VZ`Y5^D<|E{dl4bP%q=hJLn85
zGXv~A6xFHdN-cRGe{_IN3^xNTF_QsS`j+e*eDZ5L^q7ZA9_FF)3ztoPQO+H*zB|GU
zS;zu%0|mKY<72>DMkUtJN$6+8Ikf7;ZqWXU&(6f06dI(?08)uTqtb`gZN~|ff5eZM
z%27f<pOAb643Tk_*l?^gSYZY_9av?~KuJpD!(Iv?lg^Q<2UIzVO;pc}t4OjQBy&;v
z_EG5))Nys8$kkWg?^LCFRrMj4OYy_l87#vwF_lK>E)X27zQcGkEB!5Lr=wty;V*DT
z*ckMwsdi?iEW%moy`D_20}YQvY*}XpDpO54r|JM{<G1YuAJv<3sysG65;X)<1hXEP
zLq!axpLj4$e#e7?%uU%LNgul)M>Y08LCWaE^N+~B<>^S~pMKN9(|v&e^B_{z#E#?r
z@W>S0(24u0;%j*kr$kxGk!W`so3RYjb`F7pgQXETu%u~zyokj!^sy`^d~5;pAWXk8
z3F3>{JdAT4JHne^@0Uf2S*AfmXx!SlV#O=*Vswp<)U}Z#RM#X6xjBqVcUihhsuiD}
zxP=n33axg?LVnFu*$(7~Ga*CFoG#S>K~9(W`+tKef53F%F!2G!{B=zEX5nI%zIium
zWi{nTCAM$M<HNIX-J0?b_Hj)4z7xdA<>AL`<R<Q8O!>1Ys-}F)cqzG&KiVbtMj@It
zp)13b|LO02Hs$rhTy=ygKUR>-YRZQr%Q59YP<+Dp@tX1`oUlkt+&A5nAFX9eSXPuo
z37CPhj`_=G_T2I2_oUTYzI0RGvUeX%`OtkK6TlEPx0;{Rl()0AXE0V%zDDGlMO|vx
z8G0DR+@^e>mmnbXA2#I(KIJs!=TYVRZpuqMnC`eK-@N4iS5tnuh~>X#%6-&etCm)Z
zJ8sI)9j3ar9fLd86cYmm8)i-UOT@w|bh;_`_YLy<`=l$ojeOM@Q!XaP@yg|6;o*28
z*7EYpOoY}mI%Ab&|4LXX97Z0fE^L2<t;5ak`k;85$No)LCg0q{F@}Y#)g1Wr$aFJt
z_#Va>K7^ub4F7~8DESh9)Rq*X5M7CK8hJE@gN6~h0BK(9oqMXd#P5I=VPQB6pdwxb
z(>F;_2{ta3(R6&7kBcY=A<>`Iorr^esO^527^0AE{ElK6y;DlkjovX@b{NZgjNT7W
zcDsmfA~n#fY>0*%h#7p?Ma4Y~AIk?DZzpCTs@WHBqo+_(0_pZJe8bhE{Y^ygt3j+*
zNOGLhyQn%Ir!)&^jk9-5Z`gv(RBQ9u4!8%@CA~tvIj~kHCi!K&Js8QD@^%0Z&+6sY
zJGONvE5v_9DekVptOBRT%nOJcM&k7SAaCYDq&&~fl-<v^=Gn~r%U(`R*-~jU&u8Wa
zH*=&H>_}!l?q*)?&AghKw>X*g3n&O6yqhAZ?<jJyQzUeexBf+}f2x~#xi|B2W**{X
zI`=(7)4>ho4V64u;zk0sL@&u{Y(tQKRaZJ=AG{q7LPN%l`olPv+a)ABN#=6|k=63*
z_1n5}b%T5(2_52Z$L{ajH~FsUm??2zQ64s*I3-?3iPGdRQDSxR4R&Gv%0-B?H3t%$
z)qy2Apb_{0&vEyH+=`R7b?c(>UVBh72KX@^;5)4k)DpO^nFw}kUv{xW_UXhfb+o79
zZ|{(Xf8=R+R(iwBPqYpHtQZY9=!Ojpp@E|gqk#c8t$uQ66Lqitg$&WkJA}|Gs7sNT
zStL#>jDR98SzZA}pTLJDUON<fG+7}{CgJ#4XQziSgiDJ-d}F&k@!DXA=fPMLYXV1Z
zh;p|wVDSeQkRKgUUdqOf@87enJB5$5Ni->x7d|?_EILGA0rj$-%(6!cHxOtM`6w0o
z2H)%f+cw#K;i-27>#=e4b1`<pM2r|++^W#!i<U}qN>;|YntcsjrS?k<dxh~)s;+!C
zfDGHhds1HQ1i(PlW1-WsjRdM=RAV^BWksWQ5u|{(pk#pL>82P+a`7Rmcl@HpLO!F&
z$KRov1sXkBSDUO?kd^ozJ_nNc0^i0;Tzwm6ct$ee9&;LCfJ09zfpR_|p~C!D@|Osk
z<v^~IPAV%;?FOPNu|A4tT^yAM{$n}t2gV-dJ82bKUkAFM+>K##Ilg{}suh^v$28``
znjq<^0XA$zX;{SYJDzx?<X&bpSe1v`<K-jt5UcqDJ?@Jy1Bb`@RjvYWriGWfn7}C7
zR$xBfFRkN2)&ZkSS<mOGH`1wx#rm8y1{-k|jr4SB>~kz7S?!UnDWrkiMlROC;vM1m
zl(Hi3Pbs0)tC1^OAF>Z&`%q;cYV1R;eVA?^>i7V+rIo+<!y~s!@DGoR^-02w_0BV7
z#%JX7o?QNsx>9of=eyB#cs@n&#t1Gf08OVzEVIbtrbvxb<a`#1!zG!*b=yh&@Q?J`
zv-iZMh}dFlTC5SR2k%&Th2k-Voh0ppBB<~L@-PDPhhHzjM@I0mlA863H@?5e@5B>D
z-H5WAbO^k!S^~RGs@@t(eE5+uNEkQoH+CZ$=>^!20ITu+`SD|dvA=L_8wIPeFIkt?
z2^*rq2AAGZP2=36GUZ%YaocYFmRivv6qgUM>8AsPZF6Y^guv|rA#c3m3mPOseXMVg
zK=Di@J~dnot$NUK^?Ae9DqbNvsjO<1ND%Day`SF>q`}5}v7bb$=;quTZ6!pasI#&O
z%wC+lf@}|i?dOWGG^s4?G<K@32eGjpuF!-#F48?<xH5V=6#9PRfImTKWf7hntV&1#
zl&PNC*zdsK?rxv&%28~Uw?=;<4*n$l7D>ylC=Py4M=@XWJ!GL}f;aYNI(K8$;~nS!
zK?`&IN&2iFV(%HEdS`Bjj$D}qt;XHAht^ClT3_wrMeF!Jp+))(i*a8XblC8aJrstM
z7Z|`uSJI!SL0}?mm8jm9+qUs$1acgen9FD^?r`8MQ^8Og8T00m%ANbFRO%p=B`Cqa
z)FCLh1P>bFM4zhza7oaM6%g>mE&9At0W4*@-&8=TlC1^rZ^Jh3m5g4Ngj<FPs?$xk
zzuz!>x)EpNd#IqZgSSMMS>hdaFjT;g7SoUa@%Rva_@|%Ct&~AVQ;po~+;L`*sVe37
z2F9#RjEO2R=4<e7V*CrtYo(Fsks#PGOu2algI`Q>cmmC$G@7U8DIb_A1`cWZaZNnH
zhTAbV*oe=V=y?RDq61z=a41s8m)cUfIGU}w0?)iR9fd<Id^`%XCTuA_k78b6zHwKt
zc?t8S#Jo($OlSoF%Wh|madwmJF$4lj4)xLxgTnPv+>4nbyFCvGLY47?MKY#9NsG*Z
zi#M$I3N<ud6SfNv6U+*nJ@EX{#ZlpAda1Y<MYMs>`pt_1Bpzgxcq;k~4>9ok4&m5|
zFfar#y%eAnz<wY|^Tr0ej8e!|hLUDp&LA`X*+p_|>6rp4b*k2}w+aaY;-3(K$p(S9
zw90;3MLv3hY#xR%$iry~NTz(^D?9a~0xrThWE(ltAZ%zLLoC|zF$Cg(Nur>AiZCG}
zIQaB?&%^=O8wd`A5u}d@4i1-<F`?euIbTpfJD6`uJAV;cd$a?0SK8U#ZO20^_U~3e
zWg%=RgG4;s-9j9V?K&uL0xT^x&SCm>@QiX!2N3>A#M3@E2PW>_A0V)D#x|M*N1NAj
zeI09FEA;h1^IEB|Bh71wuV|tgzqW}g^Ni$6%;T!17#uw_|Ge0?ZrSCynmgta^(8cl
zfi)xGx{KyB7SQKG9S~3(=cojVlFNvhkR7>T2OzdonV#1imIM5RV088HLeneJHMrg>
z-vNo1CqKrsTGNI>9D=e~)BOkA4&59Yx#MKb+KbGIm4%56$l|Y0Kg<B5(HDpwvPR09
zf=kxSow41)1dG;^#B2myM9Ny=3a?B+jH`SF!fzTlU*fs~5{D%_!ekk%@7eejnHp|^
zzLjE2d1XW9cFDsGB%#w3Gr$%TSj!@*>20LmX@vL3EZ;1m#w_|M^95Y)zLhgl2HbJ+
z&vC0RHfz@PX#H0MvNy4}G!43(+kk?<H#=h;BPj>_Cu5`(r)qW0{y0pMeBUkA3P#Cg
zUHtr`P8QF0{I50?On!?JHtXsgSCP;jsv_)#R1xWokxO;}qDMupriut8^>vQki4xW%
z2kU_(&$bjDkvdlU!2E$In@xpALeDG^_SF+9Y>(Yg&Ls{6=brwZ%Q?r^24hnl{w^hd
z<DODk_<O#CX*CKac{0XuL*sNiY+OFXIyZY^I*aG-7*LnXO$$WgX^eiGDwxUWpKi>`
z=-nxlY>a-<BP}xe!~QuLeIh|qAHA-FevObx%KLhrq2avUD$_;I+~aM^5G<j+PtKDf
z`m*B+Jb(9W+{F(2z5*1^E)-NO3ytBP2L?b<Wh9D>NKIEoeV4q>#y_=Z8BB@nqWW1o
z7Md4)4>7ipn$USD61KgIgrQ;D7;wT-yibs9ad8sgMxs^~U4MyXY&X)y9qoDTiLyY3
z;5fh3$>P~W-Y_2SHA%yK@dcsYhJ|Yp7EUg)a&siii}Z1Wo6@J_7{5v>U#g<eH3>I$
z24gr4=Lr4s9T({nL$ZnV`&Nzm0MYF&VSF7st*iVz9~|gG#fa2cm2Q{tF3V8-6DWhS
zf5SnL+@#+^auUNzquq+T>0p#8WtpH>s;Qv-kzmnr<oeA!X>v{BHHTcM^h=j3Jg-+u
zG<*r4W9W-~24zL7(!MNlBD*m}tUit0AEeF+?!U`ZfRaV4f@10;NHG~sVF=za#Ux9N
zPvCUZE{;hBPT(_&Jt@TkhvJogtLkHEj@#sGw&`|!?wp6-afXArmE)ksxi|;oS}v70
zq*pFP<z$UfE6jCJEXk-N=`DxT4f=I-w8yNAAZE@`wgH-o+k7$;o14r5>pweLR(UxC
z7%LzheP+_WwiUQQ+6q>C#5I2m62Wq2wQT{DC*VUj0!O%`GHZb&p&yE5@^~g6%GoH8
zCMYuj`huS>h~UISM#f}(p9*~}<C5h_6$@gn;X){s?_Zfj%<%-fEvTKs{7qQotP7QM
zURZ8B`}64Ra`0XVa|#u+P_Zp^6Hjv>0cSPc!;(J+?W?-d#dKkvm2tzmN>7kp>P8P+
z9cr}8KJ%}^ad6>vftmgzd|Z%+Bcd~$GUuWUv1f@nHvIjXjkoJe7IT|?C`}2K#)XH{
z5t-8G2EOfTzYk58Fk)SDG>#8zB;-Xhqd`}CD&t+|&?7ok=`nK|H!ovD$u;-~^~%Dt
z5PR-m9K+v%`7&2_5Y3VVgknTbWp++)vXJXDA_}lt-#bKvcpi*Ae+NR1C@_Yxm_lGw
zK5x2x95eqE8{01fi)tMfRe}oDgXS>e^{99NoA9EwrZX?>-vD<%pPjUZ@;)4dm&xq6
zsJVU`qU&g_%xqfY33361c9uHrbkw08BU9<LqJ0{UVEbr0)K3n+$usuWwV}T6Ml0@C
z)_2Qsq3S*=l_V_-VIT=MJ_F{p1A8(tb@1x3PUSOfW$7NX-UfPA{dKkLEC2y9<w^_!
z4T0dYHu6rWiLSH_Fd1RoetwDoN2Ra=hNj0bLIeqN?t#}*gsVAxA=v8kH2=<3ihC(&
z#5O<T{zokSBtM|AEdk^6qf@gYf0wCU<UxL*Lb(S}(vaUN9r@ICF8F>?u`LMt)XKrA
zqUP{W$%XMV$9<ba0dpWa<gl(7t*4G~!Q@3p>&x;Gx`yZ<MJL=`zk0D#uk%V*-X>%O
zN>$#gH#^0iV=>DDAm7l{FLE*dnZFY{;Lzkd;7~(Xek3xX9#6r>bsmo8qc~Kg=q9To
zmwI6J!>V!Y9#83hS~~2MJ{F}@*BB0j`T^1sCvQ0OzQ4M|N!S$$5RMuNFhHeW5?+je
zNnU>iop4Hj95t4~Qf73jM0Kjo+yv8LmxCpsCfsSpx+w@3w*VakZ_t%jw{~~0?sA~t
z2<QaN{DI8BmpwAL+Sg<mF&ia370zUZ2Cm4Xp)Lk<HnV;gd{F*{+hvOwe~b9u9x9e(
zDFRA2hk2Xsq_WMyW!TFS_J`MeR1n_jRdkiS@S4t|@J=0Z30il>^&7pLoAnp(g|y&d
z4HzoM80Tf20Q$|LLhK@em4pA|YnoJcEQ3$SHgxS5yr~*7bmTSXzg!$Y)z{rA<f6P;
zRVpx_BL#>e1A=^5@N0Z|gW*;-)f^h)md4txHVASm8`k=9XR!Zme}`M3Fo`|lma9Uo
zLC@2<3z~6;(!gQF{RZ+5@6xL=UPMRO+?J{V@(2dVFOkEx$?hbs&2+1n-UDL9!m~lQ
zqHQS)5yi$gWyRDu(`J@(WKBa`o^Y5LT=43)ZWEvPFtC_D&S-;|VW_v(7}N?ccIy=;
zw;H;ke-=v$QaM$w_*4nU%Z<I`-OS*BTvL_MekRG~&|5T#x=S8~vjMO00<VAq`qA^U
z0nh6JJObdU?}k_4mP!8ABWO_T^p~-7*`orF3{zJaxCidVvlDgMTxPd%{Qj#g-K`RQ
zLWjaivT;CR*070yG*Z2bU@687K`W`tkTiw@kaRPUFAMd9t(T1waNq36ffZA1VL&`q
zJ+Irp-a@}{X9qw^g5KyVIr^YqMkO?kK7rwDj4W~l8?VJ+Z1EL;Ds$|$xF&A|!cJ?%
zD-B)sL_O#>v>}wges#son3epci^%fE15#shj$qEOCFkEKV^$g&E9gqSq`uV$^!PiC
zZ}lZ*o4ijc`7+Ik>ET;-l9&WhPC!kKZ`I{_@37Ba-)bv8n-9R?u6c*r$F1`b;TKry
zL49xljcZR2DpiKD`b%*%Ivua+OXD?t*HS1-1w&m(ol5M2WW#kV+@qDkG{EUp!AS#6
z(goS|2GjQ}GDfZ(--sWK^^9Hp_-8k$J5_B`nbS`}q{kDb%coWy&~RW~mGX5+Q)d|Q
ziPH5o6MAZ*xLeUZFsg(g`t&V-4{l*i!Hpj+qkE-3E7TtJSqIp9n%rI#r@vEd#+35r
z5X_#iuH4v5wq3&Yw%E@gZx76zWRw^(`g_R0G*z$?P?n6tbCK}@GYlD8v+rb3Td<<W
zSq-GSkzh7b0tx8vR<RaL+DdC7>6`hAF&EY%PdbohrNoOvdTu+gl{FJ;2e#^B=fh$H
zGFt9rxlWGbFry7!fnY2T;{YD!AKB2A7mRHHU-2-1SM=>m_;H~at#cAf0!Z!`l<Obi
zoCRacnVgU02^<rHF-Gs?asF=Nw?z(`umDMsi;{n2PD~21s65V#OlXu8rYB#-KNhbv
zpL?rtXR*Vdgis0B0mx%`VlE~?ZT@7v17UfHesV)wVd_T;(oLATVqX+Xea|*U#~GF@
z;BQMEZ_5Ty*^lZ2Af?RKjdYfCp5kde&+JAOPAA}LeatP*Dr{_;g<ZfzwyQfTp7%!e
zzeF@iJ~v!a_HjN4>4JUv`1)XY#ZV;TuRi%G{zb;e4W0cU3~vs3%_`_DAIIMsy(Yea
z-gBW_H&x4Q%u}FP2`ZdL9bzYQ@-1~3LAtU+a>mS&%og0d@TEU*MEhOwBBN#vn@Yv$
z0|WBoxc3K}x#2v+l;Qe9z<}TE42n{l8^z{uzo7U{MX6ET{7{0eO8JyUfvyES%IO~Z
zJGYBQpR<EnDeYxBTPs3qFq%U!5X%l_j74B}X*V~I+1=#I>-WJk@Vbz^E(JY>X}o?x
zIa=70*EBS&0$K}QUVEicZ%QbEFk*HXr2}?7{CFgAD_of`>Sf^+KrI9ROM5~`F^B);
zo#N}QjE#q&cN(^_Df?k#a4#4bqCJE-7?FE=`V&BuJ$)29c;ssK^1)E7Q~BYqbCRT!
z6S286^-A7>SLx1?D(%%p+N(>oSMQ&SN<WUAtlfFMbmzz^shJd>STNd`w*1soO^}H`
z5(50ZJxjO=6)SKbvo9r6OxC0YXlU!75?{m?WS<N;9qr%NHBmF_n@87{!d?7-TGzIM
zfd9{QZNa9EkQy{@jBKZ*$xHvbJV%m4+UTj(;0ZHL?EB*b&rm<a2PDPHn&e5d>-fy<
zM<kI?OPwbwujW1_Ppr(?5C8Zqz1%$4GZBAGZ^bV?MV?XOGn8*k@9q>o>8ObDE9u0A
zUrCpZv3Muy;g&_xcDN;iJ(XA~AQk*nI?=VCN}s#{lPHJ-1^5pfCKwIdt&>M!<aAh)
z{447L*~R$fAFI@IvvmcRx)pk)tj>P994_BmD?2Ci`oZ?ZvYXkC*5y%DGHT8Qe|{8m
z)L0prg>$-j(Oror;j_+0{HD%l;9gpcjItFmI;aze0zMQR^uRVwNisvp2x;^D4Oq(h
zWGSs#DOSMZ?Z<V)8H<(GBZFkru}jJ4bsP7jUyCH{6kRBYk&i@|e5@s2@7|z1t5pU#
zH9I*B0DlF#sB8l&d2f6SZ-S4uU>(VFh6b|*Dj4G=hwuvEJnj!{B6acx3#2#MPIoiS
z2hC4RPk|6~@1FWJsqUdn>oRsvIgNs}msw7%G<pt&kFJ9{*km&swp^~RB-`+D680L@
zWP}ZS0%K(#6MyucFn;Bs%0ATEhdMs6zfh6%Dd9ZvaD}FkKl;ScP@fo&)Tci<Po46_
zHp}_Mhw1jA!ah{nhZ;Vh?G60J-}+ctioc1;SfKE#0x8;^K@)S3>k#w?p_DfTK@~Qm
z65Mq#YXmMLK}?lu6A4i_mx3(}&pUBQJ(;dt!n^_z0b2|&<JMk3WCc-3zJUvD^=TcR
z)(37J#QP2ncXyX)jMb`VYWgcW#d=WmIW#GqW!%@QlyzLpsPkFuuK++os-xn5@(H91
zHr27!^?_k%MoDAlFF*7%LM+sXHNbp*AEe*Dl$-C{IO^_A2W|jH;&~HN_{op#n;N@<
z2qX*949?NKRw(Ca25RD#LP=bnmiQ+mDy<ut4X#mh_&J`N)*>OiSPqWiqO;%pDZHZ7
z?<*-lc6i?ocF@=og?O<*3^v}(3XT#sbd>~SS7js>1Y@%^l7^dLEe6&K_Hk;2Kru_>
zhx`D$SXEKtYvUc5`O$mFEHze^Kv9r+q)#u=q!HrRBA84&SndUL=acfyZaG3E3&|Da
zvLClQEBU{JKVg)RyFiJBNIC*Az{(yrf~SU48*fraq2Fu(E+x)teFfV%0k}NgJsM(*
zVBrmF=2}IT+0BE2QRdm6M$z~tG)g2s#gCtwQON||-%EIATKerh&UvF?tbRZ`(}zbT
zMqde^D1ZFUJoja-0w->bi99XNe1AhHKDpBtZV7L*rPwP-SwT3yL9h>RiIf$P*D~68
zVc}ysxkPsTg?c4WC($>;l<ybm(Ua<w2%s9KRZjL)^L}lXmHp(^x)d1wz~V%M8{oDB
z({bknpVs0;Ya^<q@C90%XOgG}%(5Bi`5WX}KN83xCvo9Vw2Ouf=l!&We?ld6p!3j;
zY+Y$TT43bjB!g8Q>@T#1oTM1x{N<+#wTjiDV;H$)`yF4=j}Z#TJfg~eGs&P$u48b-
zF7A^tmt0gvs~Yyd8efm&6p1?wL^HmzdUTc-x#7`KxQJQIXJl`pL_=+Nx|=0W)T)gh
z=&coqj&y1%b7iPw5Ql{$Bv=&ER+2jmi5bPkCj6;kmMW2B4Q*YGiZ9rRPkzb3O#?1f
z$tYGOi{&mqKJX^>PW)aG0y5HE<On>m2lygbpIjs@nGT6-HukXeu_ATyiVQa+*f@y+
z^vBRGtXv%eq(dvqvnj+h_$?Gz*jAwA_lz9uecdZkYG0`Ud^UpLWYkFnuj4Rk2OEp2
zO3<t(l7v6&U&=G9bF^b7VO27;z=Xvnp-6<%(1yORZmIPggUgX+9XOv{<Ni~rqrig8
zc$K8d$8@d|7fCKi&qrY0$?sRWHhQ5|hhXet8P&AG9t}muvtlcN^=yRqIXih74FqFD
z0M=?%a)7j<(jcSpLEhaBtCj#Z|H!JP`Y7BHRxM$MmsKnwGV!wN8A;T02nc}@E0#kP
zh@4oGmdkLV%?|mQU!R^YoYd;%WOTO6spA4{TxS)T?I@#&2^f{phBC_JWxx-{Qu!W6
z{Q)mRpK(6>M^6#@0W`peDqwVwi_z1zxb4pIwWfF|0NP@=dSTyS3ri<$=qiZHq036t
z4H!eUD}-X9^V?03m_pV?E-i{>uEwM=%~&)DG(RdU5tYpbO_q5XWwHXp`kbPPhFS3b
z3}AV>C|!vyE=n}Fw_M|Z!nbl9yc|%VDZpZ9NT#6>Up{ZasV2jctQ@@5<QqC&cnC9)
zgQp<hQR5H`W2g=RVLG(0@fUw6@R|Aj8-FbhRQ3MB*jSFk7(YXFE?7qi&;ZskGv&sL
z4%Wk8lF?S?hcIXlWT2z7i0;>Kk%wjo-f>T@QKA9LX5(rXXV^Gf!C0}8*egLBSS9U2
z&^lg4XF9AF<+Ju}I6rK{<0m}N87m{k83Paazn@ct4-Qvxm>_+Q*rWqaYLabRMwJkT
z48o;XMn>TdT)ti*gMNrpvmPTr2SxzkD}2Yv5o1+WpcelG32MW3hJzDu%r$K|uoVoe
z{s}kCuu3Bd(qW=g98Sr}I+s%t%Edk#_?2y8j9$bix=%VwY;qb&hA+;6cMGzAu<<2J
zPgnyGZSo!~<1dtDkSGhbQ_5&geeAQMoOD<3)PHLfNff2(DAjh4BO*tn9a-D_Y;>jk
ztzems{Uhi?gnc}lFC$}nV(t4nNeTmbovGmHcxIso(h5P|zEq)1dhDGK2s&_*jOl-&
z%$g&C#N-bE7}I|w+m$q|`(SD<cZ(#}{8@ec(r~k`r<L>`079RU`3C-hhRM2=?2MbZ
z*`0UD8XDl^`>cO6^Ny7CpMqwev&8^BV<$nOAJ{?&0mzbUIi~-Gur(#*1+7O3iWaU~
zJvq#<%a1qVnE3kDI3dWuIim(=;0mlNYCppUAZ<t@^(UQO`<M!*@E660Y=^d3Sph4+
zycOY>e|VhaK8DRBaVnL5_8eCv;JyAm{CGJ2O*}8$uofZuz?a{SmRnh5N{-8ZIir2$
z8bpl(e?kuKW5B=eT>pHGPKoQ+K$X?g;$Aju)KGa(bR_ZQ@52=x^pA)f<5Pm9opP7R
z5N9&MyxtE2n=RS`sYRnx6vYP{8Hh2Ebqll<LDs&^@^Gd(@Es5l$7mK4_QqSQ;psF7
z{7h|IRUmw6PuxtEbxVcgt<%LJ(n`4AL0-WNvts({@7Rp*nI0>qmjjST8c7@)hG+vf
zZv{UWiIBo;{*=#M7iuEJA2qm{X54c9!Yw6Gz*w1-0(EEnmV~$YY1Q#M?OkFmj-9HI
zpy{oz?YMaFnhWpen2{R~g#*ZniS(sge-1g@q!y8mq#pzppv4h@Mx}%%P$BWgAD72X
zt+T;m3@0q)Zw~zEpQAaN@Xg#MzK$Wo7Bh~4+y^?a-vjTZC_)9>4B=tKJru9tF*hVF
z*YCWtdq6o0WoISlrH8QwFkl9bHA<(Z`XYSPmTf6}eJD>nM7975D^QIW0xgmY51Ojb
zceM59q0fCY+Sf$C1)n1)8V22!APqRm!QZuSU=y0#K~wX#!)I<#9D-2|6fgZFK6eHD
zr+DxOk=XU1X?`rynOrz7QpzF#kH#W!91w8%JOCJ{^Z63Y4Z+9L&<F@vC=U)HlBk4y
zEg!JA@=y-2uh9YEpRGgHyy#88y}Bb}`pjL_R_rop&fH}%;XTzoVc>#wRcP{DSj&b@
zwKSClFqQd<whwgxz-(|z8HJs{9U}>+Y4t`ll^FImpu2sh^f!3L@L<k1+YbFTdse%z
zXkjLDONcevo4$(BNZQ>GQSSq9c8T%C*md&@FpU3bBm+#4A;cOXXc07J2K_M{#ul7K
zs&9jqxcJvqs-<({$D<QVjetB<StTvlo|2+P8J!l0Y^KnIMas&76o*Rf_}63)WDO;h
zyqW3Ef!%;RaH_$EI+&w=)*Ma3VPy>F)xL;qK&?jC=<lMv7trR`l*@=JFsB;gjXH=Q
z2{uHr9c7v+fQ>71S;=LJkw+h&{k80~tU(tG+_q)34*`xEvz?|Ist6B+Er2Y#vKS+Z
zh`K-_`-7m=tSVT|8vl+6Z%Gf~{h1kLEQxKZ+Q~4ve>%4zr~%@MiJ;)tPu;0W_d<p+
zaMw~77i_8p7LGd34twJL{6gI!ZHaw;uY-9x3&I@mSC}`e!`&&<bK_5}tO5nmi>mPR
z`$+Y}jC)PP^R^55bQYeroPgdr9S<+!_iX&`i{Eqbdmw(##qR<5oq^vE@p~SAZ^7?O
z{N9D%@8fqWducHqgpsgaievpV9OJ;t#$o7kC=#|sU<6p45q+kGTNFL+9II@RonuI(
z3L8-IRsm&R+v{JT`NN-6pjq33u_^^TZidmC&Gjo#RJ<)sh_^C<*(?a{$5~A7@W7C%
zNw#LV*=bWy#Rvs=T`I{v0S|1y;1vg~t^+mVAtgS+VN6@4U9chnl9&8Url6K>PP-yu
zq1Ei8bTLdvUbg%G{0-<L7*Irpf<F0mN9MY>M2Aan$uvM>zo1CQ6m(c5!_8*7Lp2Eg
zgjw_u#-pQ5!jc;stTYYschv|=1(~DS9A;}cU8*IVoFH<ztHqT9cEI3l8NSLcB44Ng
zThK2j$2V{pa|Lit|BT6fuK_wsu&E#Og$7u5r{Vo|yaTTg@q!n}U+4PO%R7+S?(4~h
zVj|o^PaX(MRo&dS69awC_Zzk@k}T<VVrqY|QBAG#$ZKs?0BWM`bHEYI`Veh|<*Ygk
z+q1>!KvPHx{*r!lDAuPQz=2>oY%T01&o69ra>&?UuT#d7UB|_-hwQDD8+$PH<X@9|
z!_ZUs;$i41WN;=!BQvvc>-P+*=H%8mtiQyiSJNg5x7LCP!G7_a__X5(!j0gY-#PzH
zrG~cLnyIxHy@?FN0QTZJZza%?anJ>wln{))$8l0A#?D~)Bxc%5gmzh<>1nc*W1Wow
zX{D|4wuEN5MO=I|_RzSNfTFPj*gKQ)NZtH`tc2hs3%TCbYEZ_zLj4H!cEP$@B+EAm
zvGi-a6Ami{I(=HO&{+^HcNPR^>Vn{rsWUMS0Wp+T<xPH$;qC-1R6Vm9mtOj#Lo@QX
ze8sI-$ZyS_KkIAc2gFEWq{2yo1)CD2!XlQ4zoUcF5~ND6$UPYK)9@@6X(>u$=#bT9
z{Brl7EKR%1&|GlPG#>TPC$1=<Z4B6T`rwJOlVtMyk~Vi8wK#)VZWK#Cg*7-~5R`_&
zxsph&_q8B$zV~%_WGa~R@}FguPl7iEE7|rcK>+O?h<n<aloAwtAa}uo7E3{rn$|$D
z@pC3YMe6a(KRkBmlZ=n`c&5|LG^uIau7Z<gp_Iv)3#DWpuo*1a1Y@myHA^d8D6R8?
zxun$%SYV^JqCrmn_Bp#&dM%tiBP~Yd*dk{I6qb3F2|G5Q5Kqd>G|--S^nX-6noOcB
zgx~x-mQXF|s~<{Nr42v~Y&#L7BB{|u&nHqgLPlFk@eYW{hI;$jKeC^f`+Mqwsm;Zj
z#BOjSSMLj`iRta=jqngFSfK(#nf2rkewAI?x44H%dKVes(^}LP+fL;AN}n_W3)F@>
zIul%nCz%Nf3UUB*Do#mH#gJDe2emBL{i6p+?e>st3srR6LjlwmK~&%X&masJzT_Ag
zG<2jVbN1x7Ro&OUxPpP!(g2|k6`)nLyek@(U_3bDBu+)Is~VJi+q8wEFb*a@DtvQ`
z_EMkPKqKSCF#B=CVFmt~-yc52;M7IjjyR6HASS2IQwqT>tuhr8=eOfkLsM1h8Ox{c
z8eA?JN2X;oPu-oRMG-)Xf&q#9FjbD7kOO3xR7=jo+G4oH42{>ozA)J`za-emxbx~l
z{F4~*vZ_poB^ax=DzlZkluczG+~BB;3`9GsGND{50~8z?;f^leUqqDL#Hm>3H*=6V
z?IHAV&U-^b=SmV|tjru7cG0RZ38XK%y9|de2e8XvAUX|ehS*=KaE_pY_JaKYb$6_v
zv#qLJL{+VaRuj)E#S@rVJXguL=z*0kR_Uh!Y50;7xC0hy1&b^~X;!1Y2d1_>tV>(Y
z01m93)TDB(1P?4ShZtmJhACQE1<elN`?n)k7q{98!MhW{T2`gCy%&6zVKzAk9Tx#|
z85?=vPch+&3wdMd<F^8%Lm8$a2DE%M%VfPwG|^sF00-J6a%3UsclXE#dd2*;i}xQ$
zAdFiHg%r_!o!rlP!H-@EuspuH7h|g+noVg*57FaMGWoSkWL)Ja2sUm-VeKCM*J}5u
zCLz_H?(yNe9Ni-Zg)^E2>UUg|s&i>lH8cr+A<=NV#IF9gZBOwgPc4via300ozEZ6m
z@bs0Vp4YxoO@V&B27Tp!*)b?JGa6y@(@RXkV78d-#~-0czo|8Z!o==4p|!aPtp&nR
zD0Uib7NwrTnpr)KW4D)}=j}8^Ecw6qheK{Xep%b@Jm`D(AsDmxmE|ap#6NR&pD(bj
zj%Z2uspV5G_!q!{)g7%sNN3yY<-S$yN8q#cnZye(L4imeIe!|&Aj!$KX1qgn=?##s
zaF@7&WUMzTUF;4_v)v&NK_Yf7dN_<dp<6h8!=v#h15Yw(Bdhw7ui>BU+`JPxJH}1N
z08F;LrvV^NY)sZ%&BhO1UxYCj#-3TvToJPe&!4TpspWDPP;SD%2g12$hmFXd9X@dD
z4LM<g=6f)LHpJofM_|GV<eD=xkbv%v=owdAj*=O1wU67R<2ON;>Q>wD6g8vw5aDM4
z7*nDIe%wvF60a@VK+h5}`PEQwU*fSBQ30<|Q2yf%y$iI7qT4c?D3>Ns7`mwHwm#HP
zj3;1V=W=k_?OZ=FE*MW};q-((*GUwhiDThmW1@`sW*aqcL@p$@t`<65dm!;3u_MMB
zCy<AH2_7P)Uq4KB#(+9s>R2?k`cD#5#m@AMm})6ws-?aN&WR#?0cd05Yxr+?anqE%
z{y1AW24n@AP#uBLF?!bgX&VGZl`%3(kZldR@L0+D9cG^qoSngu7C{gLm^lk&sXg)q
zWqB#{OFb+ftkf3Wp2_lGF@uFIwWtb=G2;$2RSDHjLVv?|Cjk-DfWr<<RIu`xgHjM;
zkafv@Q*ku(mG`6%>x*2R9DZGv+4ZS9yB?D|0j&x*igkAVLmZ|^9iEZ6k%@8?h(=fR
z5v-Jj8tm-z%%*k0Rx~`F-OdCT1fnVy1fF##wfksu8IVVzQzj3`mFT3C3r{-tk?o-N
z75fK1gf6Yd1lX6jW~B-*#0p+l^>pemT-6@J>p}*GsGp&BKN_<oc+mDjoLur1cc5|&
zi$$8ur;UM1`F56bUyCw~$W79^l%WLJT6N0m>u~=|n5!62^*VD|OdWZ18wnu|$s-EV
z$v2ZbOFkxdzX4)O{<Y8LAb%>AIve?4Bjdk9{_7Ekd`bf11tU0Dvb4(P2%+_1V(rzA
zQ1UoVPCPP)H$D@i9^`XBh~=N!$D3E=Ao%>}a}ZqM5-ctBB4w;^^mDMVf+OFvt=@ll
zg@;}ivK5S^@3@lr>Uwy{5F%Ya1uHswAhQN(*tDeOqc99$BAg*oZ%hcWLp+f=EUbH1
zG03rqY(X}ASfkGv<#HK5mRw6`cn5|XFT>%|Rbs4Vsamp|U4sW|^ywja>VbQ$Zi%k7
z=+tu1Wm&-ox1RGHK=cES_e|yRA{#}qKW14DIo>0>k)_{;&_Rsi%Iv*2IkF?OK{!fc
zjzv7O0b5g*G?pTXmJQjYyybEuW%7fwTII)M8BfXQkYM3Z5lFI3g0aQgD8voYK~%tm
z_K3j9!c+K45JH+h3}cc|%$6lWuE(|J#HUmR^a`tVDG+*^6drTXo8wp9C@g{#4~Y--
zkjNn8A&r4C?x9M_U-eL>Ml)Hm77DQhENYAYR!Y-0_!&Rv(KM%i?ZxYUsnV|^PF0>E
z_rB$Xo<;f-slhD#@7d^bT;0b`*#unZE%O&gRVj`q_~_H%i|NkL)`V;!>E}49JecE*
zMsk{i^->aX6riB@ca7V+{cW7fGS9)9FRGAc;$ONFebCNfUVai2R4AlYS*RGo0|p0W
z%zYU74#v8b$F_GCxd{q{7}FxEk+bN{rATpQ@y$~`oYzt8itWCFJ2KszH<&@5Cm*CZ
z@nj{8>2NcX&}b{c<ByKCNV^m*7-{FJwBP+7zyUhd1mT@8KPkGDMcUI$%hms$w2!(>
zrA-{2P=VcG^(GSqAq-U@Y$~KlYcT~Vk`}LU%AYVZVwico#7hrY8lpu&`7C4O5h@^Q
z7Ygw!GQi6#G%EtC?kS+NA?J+Q#f>80ECM=^{38i=X=A~<XF!$i38{uN=G__i^XGM<
zQArXjQEU4<149IkO@5HwbUs$<Dl}ea5b+AMB?CrS9-0Fy-@`Pbg$JV4*%|&*umq(m
zSh)zi(^F`N-_CMKs>oP~eSWPP+b}cHI10h7Ho%@~cLV%#5Jx7-->kRM{d+iiX}$3N
z_?>R{y{ze!Z5tSRT5y$}IR;&%2>#<Q<jL`f$>4t=TG~4R{{}J25KpYz^ax;?qcu|)
zEy8Y}%meJx{jc)72YtiQe8vPsigw+@>kH$@5A40Rv^kLW)aB5|mo0~I)7f@7Wa?+d
z8G7Ju_JsF31J{*(O$7iwMlr~kzaj~`F%50`lDtw?FjgOmSIddX2S-994YUxt-AGTN
z4sHT*g%)3HNXB_q722p@Q0ut|Jw6fPe9;s+>}sRbXFbdA=Bw{v(7t5`^b<H>-hrCv
zA3Rd^Ixa2{K+T~;EmrZWLowr=CKG8x9;RW_%yKN}DZ&FC3__>~jAk_auYX*Jo@5j4
zoUzXE9y8KvSqm*s3|pc7umD^t27i3X0C)vtihJ3p1up^%6zD{#RKiNSdH`h-?Xz9k
zWt-7H5Lfw>8j0<cm8}<rC=04fG<;x$2C~h?ZVSmIz@aE`#ov<_aC>Nf;$(A$^fjK`
zB5y8u-kx~SlPmO~)naM2z_~f7*zo!zS^5?RtX<WHP=<tQu>9Zfkw4t{N@S-dZqxNQ
zeCC%lTrl@aWZ)dxyPMbW8TvH}=1W1{&)e`>e*E(_$$s%y+>O4UqX???*Aj8O=HYdK
zfx>q`v$Z7~LJ4#FjX8LP#++xw`H`h5kW#^vI6m<RQB^A8ys~2wOUky-pZ}8DCgmj*
zUQ9!0Onxx7$uJVB;IxbrQmgb?%#0T?6M9$aOS>b*-YHXxOX1?uUvQXOYCBMHK8|~D
zG!v6DSzJ#G8HxA`#OQ|QU>%{s{{g_X`-@tJsCI;#p^*cdLk01Ps3nNDCq8{fmAleC
z{vRF(KA2PSA#|JOz?|1c`>-n`9ykvVD$E94Hpb0k95EB$l0jgjjE=%WjGgt!;U6Aj
z`b0BRXOb4$B##$_>?$Tx5Yy!WSXN{2upEAd60ST}f+X<MSRH_^1C{v2WfT!gx69?9
ztPCLY_?uh-r%m!KBp8%RBib(jk(gJq02131o0kC+gv$fG!NyusSF%p~g_0R!VTLYD
zp;K)G+7o)W3e{{*#!LJoh(PW$G^JVr0E??SxFhj+F|%QIYq+t&SR!Ax6_aWaDFMtg
zi)ma>tVc$}+MQvaC0N8HvR;#*(qe);4e9kyb$7Rh<9NjhaXedkqA8Nc!b1QEpZ>rL
zFu<0`4*RV4kC~~mgFQ<zXH_BEB-G#&us8AJMXy0D4t%=N(OHip4?gUoOdob2E2U%l
zE)FysM2{h&U|>zUy4FOlU@xml?`7{}ngi@XhBykK9&ggCFl0?CE5oAIeq6a4F6sdc
z!?Hm+OBbSXM%+)Y04oQ_liXR{nw#_?BrkqEx@BPBH)J<$bOILI5ER)3|0MqL7_-gT
zTGj5WJMhdC+C%v#PCoFs_E5nolgHGxhYAlo?v%;vLq)zMhh_lU___cJ#<-Cj?;H3I
zHWxnvVCbF#p9yyx=(Q;HpegkChuI>m$)MYq0!GvtM<po?4_spkzRH3PZM!<qCVO$M
zU9|)fV<SIXigK7+A@&Pcs~$JW&6=$4j8JymDOd^0pF9Q|&wQzq(o3IbfK+I*g?*v{
zBD)Q;u}5rbtuHb`>y0rAci0DH%rs8L$y>GFI}w=Di}Mxa6)Zz7Y6usqRy}Jl-{nzc
zK_=5vSFm^`FAbR<Zox4jF2a=34GD$ge?29>#(WF*acogiT~yVRTd1qdnIg1~Pb`_%
z)T#kqP4Yy@PMV~r<xAX8<k%?H7oQiC@Jl_;udJ8zDYEg0T}Q^?VFU*#VeG4rF_@Lo
z8vK^R19?t^?2~1lo{NYH_K>0H(k`T_FLPGy%2XhJrl57aIBRU4H<MUr?a`mJjVwL4
z3YE~dSa_motQi?sw`$|%a(3tf_)>|Ro547@fN|ie<E^~6IW?eFZ=;2SF^@M{&qIuZ
z=3Xwd4mKY8jrGtLtZPNGI%%>m3|)B`XZ8@+Fv2g8J0*;o@BU+*5f)$oY~ZD3%ImkK
zU~{-YemR%|-C}j&mmCLf02sz(0)z1dbHurS<pE9|xh|tO4T)a?w*qIhd$<)?OyUt1
z+$UR_ct<RmU1hbuydgc_%0Uk807T%37qyEPVgDf;ZML_Cab+rj6q_Ey_eR|}@mK<X
zeFdvE3g@#I2q*9kQYh7}O<?{>UDR5$z=hfGGi-r(pled{>H-oi=Ak_i0MjtcZeSVw
zCGpCgSA6enlrw~(l@%xn0I#t&{>%mUcAF0Dt>&cx(>oWjlEN#rW8a_}ks~DT%r`ak
zd`O!oQ_Ocxa8P2nl(?|P!s<hDuxvGB#)~yJv=)t}1~T%*Cvs_FS)2TVTVCyW{60p8
zw3vK{r!VvZpM2qa{0pOGvjGMHKk^Qvz2$%mvFH*^HvabG@V8NrQjvm7@nD>CO*Q2v
z%4Q3*DFeifx<6gIo&Sn-EoNe*=%m~RC|;4z#JgLlFCs5XuThd)NsLs3G1<!K@Thk!
z*&aM_W&?xB9<jTkR_=MF{o*||ERKl#0R4voy=82lt5GwwVMjSmLaTjJjs;x$^SAaz
zKYS<(LKZ`P&{HPbHfcH*!|KwVq{St%oB4|iQT028Orasd6b6!K8UCfP$Il+6k_0cn
z;rI54npOQ&29^~)T*58PXkk<en9K#?Xv8r|_^`^qXObj74@7BT&<Xd)Bm0&yNj)a$
z;LKdo)yLw%xcG7GJzw9~I^jGa)e-c}yRnBt<d<m(IAW(8g2Nf)=z}46O$>p!NH|xz
z`2Qh>O3>q3jG{Zh(1B!VmBY|Mcm4Mm3ZEJ~!MCul7%vnt23{LnM;D?9{e!5m&`G9H
z74@Q%`X=S3^EH82Eh-vcVv35Bj43?fVZNGQ#_nc)Jq!2Opw9R<_6%9q13CKDPkzh{
z>kI>epdarEVOcH+=NSkUz*xKnLHMMe5F)uC>;(vkJ8`0%{fRqnHsXhFRTl>Vglmcz
zt|{hj5Cm%q61P93?hAGnp|>t9<1hGuYgX-*&Djp3Vec%W3g{X5<)27{9>)0mw7ASg
zvM`1X-vS-BfLmG9qMI6~gIA4Jg*M2sfcVIVNU#x7YMEc;-Ec9k|HnmV8OawTne#Q#
zm3trplp$ikk0UVuQioA1SP%EoYA#HzB$#jDE|S*p8Qdm*1(!M8A<ti!1h%N(ep%52
z&ib^5lB-daF3o57oh_!l4NqbRbI>l%qm+Tih+h}6APxbU?|^*%GZoWD7KE3{Ute^O
z=Q{7fe7_QN;8o!}@hPQS@K2(AF?awxrL6g;%Sk`n*4>cE2WJwf2>|@@%{Ks!asb>(
z0H55Q4geUjIJYbL@gJ6U;f}QdRx49IEqMy^8w}}%7xh*c-=9f?ytuc*Sk6c*47ZEI
zUV<O~g<BR0`(=1U+NvcW3d$ipB5}@LTd*ZiOE|*BiKR)UR_<1rc{MGBPaQB0-*Dsb
z>1e%H06w=Ho3s}un0P6fLKUQJ2lKZ@!h^B0efUDth0a3wEbtWppu!5tlX(kYRc~OV
zIAMajqK(3rI!B8u{Px7zke2Q2T>#-d+LO`QA6}wb)Fv&ex4r$&PS?QVoY}$0y2SO$
z4iCjxheBU|=}zsa9Rv=2<gatI?=EUE?o5E((svV1K=+2E5tfj@)QR8|U(l@q7Cl?Q
zH6MQF^PH%0iDQxG<3!!EX}jP%E~>&`IN!TwZ4Kudi9q5^6NyKc(3~Grc^C8tEeUW0
z7f!X@Pzg>dLs(G{wS=1;@hR7=_)K(oLX{2Pr)`BCk4b8TJHi7CR|0Xw2IS6}0^Q1X
z{*f5I0@pAHgA~w|@8V#&pgC|M5)oZ4*15cf&Vg|exdUj&ARF?<x(YWMI(JF5Cl0@3
z3oj2YN&N0Qkcy4*IIasx`VvpD>m$e9ZE9l_0VcQm!eB(YKv*6vFfRAjb7+jZI_njD
zKn9I%V1S&uZsuPd5MH828th<t0jxfJuFdkSw}Obw^x|7x8HJ`iSw-`Xfy);$m+l~O
z_M$EPBF-~FNW1k^bTjP*W_u?>0GWdw8#3Di^Urj)2k!42zMHPw0}oG~Mt4J^6u?~;
zAEwdkp9t~_q`x#{2sNbPP8cknrAB7Y!%pY!)Ij&Hb_sIe!h&`68H>{cA7Iy%r97P8
z0HSt93wrJE$oOy=Sc{@zWgHi$XG7>UDs)MQ@ZELex<|9E8?RkzS4AUc=NV{iPyC~a
z#{{@ec?o!ai5!B22vrl`I0N@X@`A9m>wvU)4Y5IZtf~yZv-PNd9nhKqAG$mFAc8S0
z5JC^B)xgXQcG?aSQp%iC8C66vOpp!wBM_-1ZT=0oUF_B~4Hy=lgJrq8VB-^Jv7i)R
zE|S$Gu%(vE-?MwpIG}3$6awyoTN7-YZ7K@c+ir3<W*!4k&Q_(yzFEPIoRJ&Dfo+vX
zn&^AH64F4bN{%-8ajD<4anrtH<7S)mOp;4)sb8A6l(HC^+WmR4y|5>QErebED<>w;
zwbX{2bz>LsLo^XFI2<Dh-gI=1Y#(!P*xSi%3Cpf9;#F><nS8dr5#r_@JsBOb>=b-p
z@qI+?h?FG>Tb;(qxMfN5r;$`_n*?;v$KTj0^tw%u=9jyLPH!0{%V)~ma9{2+Al(4E
z(iXzasIo&2YLeD!@AOTY0z*T7vliDlYEvg61bUrA@5nh=g|0Og%kYTd&Fj33;;C$!
zQfSQIzsv4|DrSHIv#GST`o)filIz7gc6o^{pPi_QHm^4fk(gZ?L)%Rq>Q6t$^I}Lq
zH>*ZPMbsz+h7`>3Qx_{mI%uHr>gb6~!9fV^Ejy+H`+_2(=TDU?6tfGn0#sJZX1fX#
zb8o7j2P%SkZ>{^8i-HW23!>Lr1oOt{rBV7}o}(5<)ghO1xiIrCn`H&PV^o}r1GmW;
z28LB+Z2z3dB=EA5yqtrFx%v|knar1@Yb;XizJbUX5I$SP%Yk7wW{~U~G#3{<2!rkt
z9<(Tnaxt#=p6ND3U?kOTE}Og(LER@z^JrJWdG6q?)GyjWN2irtDcc|?RRyS35p%m_
zreK51BV`D%hz-xusZX1%N-rFo;|CUy?|gr11gl_Hth;P0sm2izaHR@3*cgRfXY!Ro
zzIGbmai#e#)zLKjTd0&S69$50j4Ifs8@ru3Xae<op7j*0t+esO8_eP`fF9c+&)8oQ
z|IO%^;v2`UnRj+C74ZS~H9c+jCQkXY*zV|bf~rbI%o+*bLe2GcFypv7n=e@7=6J<!
zK10_k-seaS0qTPGD4wg|tu<BDni|xa8rbSxZpp3~lYeR_=M9_cWwj+tS4Hl5lPm1F
zi6ZgMBE`7W>LV4i988m?x?*3%+<4FL3_!K`S1<QX(o^bpl{a-0@<2*aOL!~E7)!be
zl$ODO$SiF0%$E<gG;_sv?6|e;iF*lDfPEYftW>IQkuI$`37F8!kS+;yJL0Y6AIjru
zs=)IPj`k&n|51sN6}@s_L_Pvjo;nL8jb|gNF%FeLkX!S{uZp(H0@ng?JJAu|)}45$
zRz8I}Ue(RnBr{$;^;L-_yj2HP(TMD&XxLPxUuS@4Jv;2&!UMg+6+HLdVc1Ky8h07K
zwWEur%}q^aEC<!~^;8I1sk-bwt!O$rT=hLxFTUG)p|9b)pyGulkCgsScirqXfxX5h
zq;tKWh2Rl&N)<h&J0;#6+G<^*%qw@?Bk?q`KeK?;q1_<>Iu&z(w@vr&KWE$;tlR=p
zF`21ys9#EyMTbcMfl~P8O2x5vg9@X=(HjvCrGs7UOZ#XAz9|V<fp4DdIU{)!yPe{J
z1ai>m7&e+LH`a_BWO2N0qhNuCr;{3-OwuWcY(&JGAnfC>&K3_`#_pHQ?iikGVMPN(
zdOqg92-hQ#WC*kfp?wuz^H)II%oRqZ>7$!@nOv~(9sv@V2<+U3J#(LNH)4wyH{UGz
zDM|$H#lLZ^;|F$Og(-yXoxik5m|R3()PlKA;D;!0j8cIbDByq&WhO9K-mLJt1E6%%
z@#c%isS&NPmt$~)-IGsvj&R{9DdP&x=R(-a!rtpdz8A;rt6^OgjKzXYGJ^J)+9Y1Z
z?GFqlbco*JWG{XJXFGAcjnu$c*_Zg?9|^%gp!6v$+Yc;cPgj_=SetB<CNTl#FFJ&|
zBmV}4z1hGvpT;!Bz-Z3RnMp0Sb924;1~D&)-n8#1vV#G2Sw$YbQ!(fy7z7dc>wK~y
z4=>n;-OV)6*u`J`$rs8X?xP-uxED!shHfH8hO&gmUyM~cmAA=l{i(iR;j_Z@VdcA-
z2oj;BYQFfivhARjG<Y-6oIq}w+dqtF!Mf$-d~PF&znR##NiIXg<+Fji9!tZ`M7y}S
zOG$-!!H$Hh_~th>V#wyA6v>2z49o%ugfjSQf>#B!GIC|Buq1lu>d<0qw}x~Bticwc
zRG`$JI6s#5QQFV9VeCc}O5syaG=hajm}VN;3z`hZi9$uL54Xh1N|6Z)#VTfxl|eYi
zppZmaTG-E_#-}2|A(sgw2?i-0^6NxdsKDXo3MWXWt>Jt0$GCwO_LyEG;H@pHL>hkk
zPe;Jt5Qo=B^ZF72?@xSkM8NA2hX6A&Bj6Vy*+#&BcmpFiF$q6{vy5Ky@4p)X&oCTh
zrE55pu^z**zxXy9?WRl_^`_w%$rl^eyn%Fp0KW52ht>HaZ=-$VXI;6+bM=gXM~B!5
z`2Eo7#K;8_CbYCCxrA<m@~TGCq%lG)mfHvkEgmCesBw+ZW@C9b5)5>ozm5@-V?dya
ziL?*)a;q$ncp)V25F(NI^XkC_Q=QhsV2X8td^*Y+fk!?wWZRF4`l}r^Wf*vO${<9N
zt;}L?8N>#%mD!;%``@qs*Td|m|KAX1KmT~u6swP4%+Cz7+piL)EvT_4m>A=dP?i|u
zJdH7)#7%J-F~-UNfPtQa>z-bJNUr$e=Mg!p#NJbHxUma!nbfh;9a8ujOyDQImd^ht
zO7Ehjv&11ch2TmQ#y4~RS&(SNh9*vv;Bg|53rY%23@vvMvXlhlAN{=QKx{|DwC{V=
zQ>H`Z2Xk^-aD~aiO(~j#6|oY|VKIBK3yt>Mu(GiTUW9-u+<pZhT+Y_;52|A1I_ET)
zL*v~>44if7lyFwZ6KHC_ND01nE4@>sI=(hW5;%N1l8X=P01Xf*15N6z>Sqm1Nq8%^
zc`&Xb+^`0CtmmLU1sxccO?LgFFl<0uYJ96S-(0_#j*PhIV0b-op^H9VeVhBasn3~a
zeivv9L*NI7bc>#T9XUVIaia>2CnL&)Jh>&Q2;|i(d1VfHXh*&4ew0eS9@K!hEqH0Q
z=6X(i6fM9IvrV+h6s_8YE?UvMElNBA->^vzT*WtIZ5cB^=<cNWnn`h-_(79R@b}=g
z;CkMD4Z4-ou|A%{0%g-V2H>|!C_IdG0D`5k%Arv85fqWY;^;tDg$nsn@?|HSV{xfN
zeTTX#rS5hQ)1&ucPBfjCoJ}SlFe8ryZgDX`1}iGKhJp5Yu9U;jeB9fm3$ZIW4E^L9
zT5l~Si;0*L&o|)c;AkE$M1fWSTPN>OCr{#k(E|`m!|I1zqMJ{4&P>S?R4I%DZh+Uz
zA~pR8+a7{b(a}BY$%$xhJ)H0Wyxa`tI0q7325VO{44#>V!S2M93}$_*k74k7S{OU=
zOlR<Th{=P;GzvWVCH^5vA=nFsCZ?qsBx5l^L70W`kJyf2?3bn*!pzQWRC8e-jz$pE
z)02aZ@$}Nto3%7l6yXG?H(x(bdh>alYgeF>pau(ux0LMLHeDQYnT7>$oP=`q57(!1
zDrp0zoN(J%>C03!f27>mr>lpqLbRT$8urxH=Uj%u<|R?g0iu|x0b~oeKQ!=!70-|?
z0cIJ?OOM~6Mq)>L9T6_T*~eH}JpjTLi{XcVcx=)qD;xZ}>rDl>W?OHXdW&6e;vG^V
zQ_#ny9n2u=0q#08Z{)}6B-?BrW1f+Emd#^PF59z+goO&=B=N<3C^tFHz><jUo|oy;
zmJ$L_P3Yl4Rrr&-!1ZZmt_3b7xsP~Z6-?GwC_#Kjcn&|>j5#gZDUrKoxhe>@E(E4P
zgFn8j56n)7Ajd&%S4<0x4~%<1;GnS@xQDFI5QC&IsNnbma8AYF!D45Jt>7vE4*DDs
zEBDYqWj<}IS*MHiw5=*MHWZBUi(eo@6e1X#hWhT?TgW3Gr82@uzpAwJ0<qtoNx@L#
zdxY6D!T?-oP+=I@E*-&syMrdp3kOX#-4`|fAL`x)JkFx(|KGIP5=vnM77SSE0s(>)
z2nZOU;1&WdP$Xh~h+3oy)~ZE|Y@m-Kv^J5hX|QUAs;E^FE3Z|tlnO~&psBnTL@9_`
z5p>r@ErM9E(EsOqX6D{|lWiN&=XYKIy{_b*dtT0*IdjgLGiT<WaU9;J@@<rV*dL<O
zMtOOp`j(BqC{Z}^od`c;_*d+6q+7`2;ty0jOx(s*ZkmzzDz`@PFU~f%l4kVW#6|vy
zaV}uH)Ert!DR?NpRQLxhIcbIVvhQ0TfwiZ)P8NWw3>)>=!5V`gT6^(o--3EtP<=Hq
z8>}N6heqa(+z#vqzX<HIKR%o@6Dp{(;P{t1--Xo|9B<l6vRiPxDoTAr3ywc+#(-X)
ztiMW!wx&8y1{!>CY=<yS7S)kl*ZtQ>(v9S%98;aUlY2YV=*tI6Pw<EaLiiJB!Ye1v
zeCBmh`h3AIQ~Lg}#_qdvua1*VFqpNE6x!4DHqCl*OzO(1KDQ!9P8^@Q@{A|~!{&t4
zL6@9TZ1GX)0Ahwf%;2K5iEmC_xwlW{JySFB_|%nSVi6-0@ox>xlt|-WeFKZZZ$8}m
zCbz)#%`%w@TkD&DOOoS#^LcV_r*HO`Ism=)qS?iSLT9kzJiVebYPQSvzrM1fGfoUm
zk7*V`$6DwQYspV1J$d4J7`<6*Pxw5a@7;Qy@}l(DL#D7+i874znQGnkqV%nYN-voT
zRVi)Em|Z#(pWnC8Jl280XgiP`v$ZjAqw+>e(~B%u+#MZToqjKnaYxU#fipB8Gjz6F
zP`S4Fd%v8nG^rn!r}=_HKGkoBx`Q#iJ-zc@8U1BxxXVLUaa+W`G*sm%oaJ*#XEw9U
zu`c4PjYN)%w}!E=^96m_={DIjid_~kt9Otxjbgl}(kBIw{<RZc7L%#N&Y0oai8rzg
zzSjhn!5ta=N_bN+?3y6yWwub-<X6JGP+@20otS(DZ(!7%!7A)AiD+C*E+F@I#AGv0
zS~ab`=(gIH#e@?|)J=hqT3z2>FWo9&<z9NTxh{?M1~0%r7-lGesXhPL5U=pInfl4M
zvH-u(!wBrf0=zkSgKaH`-6D0TIPN=oD&`vs#9EcyZmXV{SJA3T0d<L?eFZ!+h6oGs
zu2$7`wbfO8g-1X^<n*i+n3TPw%IN1|%;mPtu)o~s7*-95L351ST)ISY&7M(}r{jMt
zW-z0sZokc_V<4(-*XcOeX%6d}={2rdz8(Gs*yg~sxGbXSNUH09F$HxrlA2}O!Bm#c
zMpBGl-~S6!5jgweFF4L#Maot=`xS|IoU^}5?(J~)ewwiuXMc&zgICv;f-yK7P3~M3
zG6rR^YOa}cCczPx10nLD94PPF_=Tl$3rl-0EbXzd`l9`|O|z@!hNb(t_bdS`bHvQ3
z{8$mkM_NZ9)VC5EQ#i5%BzSFst<8s_xnqX1_=-6@A(7i(PuBC_q9?QbH|aSmk=seW
z<T=V%vBZCjbOMJ&Rxa_UUF?|3*wHR_c4e&AX1s}BneZDg2Td&7KfjO_sMbcbXY%EF
z+IX7$Ju#Yx?0^S`l(gSXFhxD#zwhivfhj5MCTOtT1XBj>Cdm0}=rK7!%bN#Ucuz;0
z2gbxJ@J8Nwu7WY4g8HfzXj$F(!%s@hN#qztUp*|82M9E0TLp3{aO(a;*>0#_c+Dq;
z3T9QU;3wYvuolds1;Ip73ufmRYKnp^%%|_ljc}ahjn#4nSCdPuTG=V(%G}(R`pl_9
z6Iz(=s+RmhIbEVQ(}D4?Ut2!U7K|l#IX=vYy)ud1Xywin|4eBZaw?BR>B8WWn_A&z
z8TtW8%-=E&3CkT8F*nlJ4&bT1kKAC}H&%a^?Hjuu#P*G&4kfhVUCw_&4pS_Mu)a~o
z>X_;m5T$$U#sXMwJctWCXNx7@q%iFFi5XfJN+x*KkCd8Nu7A#TxlVDpp61o%k_Tzt
zJu~jMDev9*D$|nMI(A*x=GRTn^F1)8g=WB|13-TqQ{Is{KP0$ldmB`-9BLaoZ0AaS
z=^&{Y`R8qCg5OND3fzOf>A1scqRzBxYadiw;Vl=r?nqN_tD#7sK>?mRBxH+oSf<N9
z&P+59uS7{MrdF85yExNv7bnFd7iY%t-mRC!u)G##Xyy2~>_ETjEcScR(c-SY7VfI|
z+!t1RHQA_<5sH5dj}N5DMrdIJ$;Mi4leLS2GGUnIc)hhst8+G48~bdI(k|iJN%>z)
zS|QYBma6e|@K1{xAN?kKU&0NJ4W)}CYEfElYdLw})nU$1pVih>&gRS;cgyjhOFn*m
zeAzWMdd1GvSbUKB0|gfrwRKadHiVI}!Kr6|kU){IEG^v#G!ct<aunhGxHbLr`gf>K
zA4Xd@v}4BiLLTGiKX&MeC~NcIWbpYZ389%<Aen5Xymf&eV^fThStv=4GC5y%<b;ef
z3tJ~+##$JWZ-2fsq8ipV;CZi=yU!lM0Xl&$C39X@r^!#X2XL}Uvol+G^CrU4uvEFt
z>rA^i>>Vp+k1O{^tMx|dq*&|ZQS3f@&#iRjPO-u}xWdu(Htl!62kCw;zmY=%3N&I9
zG!;=d(^-kqVRXZD^ETAr#NR8`OO8WGaeH=unP2tGKjzo(NRdZol1W7@3;tDDZL^yi
z^#Nd$js2p~nA`VWRm&3_hwi(Me<au1eWCQj#n2$XdezffO{>i=&X4U%pYmzpg2w?|
zGA_Ei)}q-=Qt{r^|G&CbZ;U_P?ugYDK)|l91_7?yA@yy%QysTel<iFe9|Zn^orb7#
z3F4#q+OMf{%GK7)y{xg8O&<v>n(8`DT{Z8XdMPW04=fQ>Bb$fZ!A-bN5ebk^lTD-l
z7~a{1mb?qwfSNOfjnuLxc{8syr6b9Zrp<q;Qy{f`t@@NxxD$LRaKzetzi;dj>i~kS
zK$=?7sOi$YnT?I~OUGRf#J@OA!amEK$I%e%QG1SKgJ^Fye-snMTASLLeAfAMgwX-E
zk$?}S!wC;X%^bjd0uPg1%cGi0NvdWu7XQTfAWBnmZ;roDJbv&U)gAXk%L(G-w8Ox5
zhF$Vuc7_R#79>W7sw*LN#H!1$&W_aaH{_r(^$?zGg6BThZe}vppjMQjxvh?l;X{UK
z^I~UXmOMxF%ZO~U7O7K0pjiRwk>i-Kv^KuO!fdb<rl?_e_8_|<Rd4+y8=&rxL}*-{
z^l4@bJm+8T^ih*C!3pXjiu><B_QgF;)Wqp@7!%6z_N>X-S$j>r&EIfG*?dku3s+Lb
zfqL%;8MTq2-cViZ`9zQ<OguX6<`Js2>{ly0L~>+SE~hZA`Uvr4;(eg-wf}XPU-}t`
zG1>>rxL$@M6KE8HD@OCtM6RLOL#?`TW*0tPNp=2_#G>4J@b5>u#J@RP8$`Xe*#|~I
zw{Lz<V3xw#ZN;}PD3o^;Po%KW7*eA5L$*FNw1if%sqUrDZB+LVTcWF07tZM%Qr%fw
zt4_Wls=Lyv>tF=YiIhDU7QGW)7g^sIzH^=<rxg1>vS>2C<$Fvc0mExZLrSNXVfnm!
zfrKYUC6IdNZPkI)Aj+C<=GvmpT%;a{bB%>dElOu@#3?Gqgad^f>3vd}h0h2#?uMly
zW-|1Kn+En3B7@6Kq?~R&c}EsgS+Wz~SGh&)pL>tQ&eqK~03ZE=HN<``!ur`3Bp0;s
zIv*y>Qz074)jMfo{TFGfxICK{jDcIfK3+26;A(qKzvb+7N5AmC*1rqBx}rYY6EYby
zZsEWPKDwxq@+>LLrG<@@Sv@me+kW^<pej;(UHg0M4L)}Ws?GUiqm1V6<lfG9PIdl_
z<iSl61`aL5;B&&@3JMjls-dP}+gF9Uc^c+IVR0VR`_%~uIy8k61BDM*eK?qtKOR(!
zZ@<vi)*vTu%_<uj7^}FpdILF3&IT?2?Wj9&*2qV-ty6(TgF<(CTF~1YK<oo|zgO#|
zb$s@$0VSqy4e!1LoL2a*DIs>yK{|mdh=lwUULOl@^kJemh3K9|jcLMLWeVG@s?6a7
z%j?b+zE!yT3}Mlo%+0Z>P{ntlr@e}4k^C?zh22^ac=x45o%6n}mFUzt$B-TIdH5cV
z0o4rK+iKMx5n<x!XN`q^wI6Ww)4P7wlH$qUs0Xg@Sh#nb11W0QmN7lyaZx1eNgyV&
zbl1l%tbEF~_L{-X_T(DV26|;ep!5G?BA}b+=`O=_pw@P@g#Dx0ZcdfVKmLzfvRo(n
zuXR~}>APix1Jiz(__Jpu#HG{v!K<o1h>V8)0Q79ULc6#Z86MH6vG|9tburW*C^5Pn
zO4zvW;!evK@=vT>iu$R%$n?>3_#%}rQ<A^9e7K-*rN~gw>xY28lzj5XiD)%jA?)wD
z{}HUkbtrE3$CO);9aPQA#5V^czdKo?(tb1kd6;w&qd4v`Leueo5>4VFfj`N_z-6=k
zCtIJ-79=D>YVJJ}y$_r#qi23v9nXoLGI|(#b$Az`vqbBsa9i4f7H$t=SSRCI2VGNU
z9r9;F9>UW?7;$J}oWtJgY@9))<U<h%e`n*YSj3@<m~9clg+*TXQZ_^S*i)xW!bKD^
zoKl^;_yud&$lF@Cm5X|FE5T1{@zEI)oq@uhHvMzW6-Fw{#1_@K^|Dv{vcJs<mLm_N
z{nszkuEA8-qj>!SC};8w1%)|cXq@3eeZ_+k<pA|=Kxy`Wjk3WPiWauhPqYb}h8H$>
z({k%2*Xar>&wc;ncq8gSvZ=hkPBnn~zRzY!qzan#bE@+fXkXQ;S3#WZvj#ROF0~9I
z*7D4e6Kit2y5=s=yiM&7-_`llRF@1s>us_(a&@YG5-CFSw<%C6ELbRhEdGkg^t&pY
z9GcIFXHD$EjDlS?KdQ@19X+zL-sDM0g+nIpeGhkrU6pk8{x_@2d`qGmuj>7(YJXo9
z`$7L-HSy`QsrN>So@d+t7B!cAXK)iQRaF_Pf;HdvNpZPcf`~7zoxzKliF*0i|C`?Z
z^Si-kSxn6STTM@VZ*bEuQ&p!>6;1#7Y)NIuEXhWYw#SYuOXN9Qk;oP}q(Y^ZMeRez
zH)T=V*=LPJ&0RUSHBq~}CUn0EVyf$jL83N2#vB_%7*R9p#6+!CYwq1n_Olf-=H%-X
ze>~_TD+}KrOq}!DAWoCFNxYQ(r?ss8!Qfh6K8sqy1$05c{%;%h1yy-gL|oHU|7pY4
z|8Q`_(yFCMkHK3{eSAA&b$;kQ==`6eGPEbZ_AZR45B)c*_|f3j9!V9NyqaSJW5eb&
zueLf1b{d)<Dtw^BHr}5@@cxfkaI$1dsR`XTyvTx*zga}}F1RsvuFwdH4zrg`_2fUI
z!?prz#t>M`l{vr~ntTn(px9(6=IndkFcco-XlO&>Hk2frRTnw)MZ?)?`E_?Jp)D)d
z^RIGr**uw!!QV9~_onK(A0ju1jm;VD&Lr45!-D%ptr<$VU!dYjnJB~1<}Ou+@!QC7
zB^k=PuRg9HC#u)!LNn2FmSk2NX2rffDPz5BNeas180C{p4Z2baDyej4ydU{W-kF$6
zTBoF#$r*hL&a87j#m&WseO~F$BSQW>XSyf&DV!kI!aXjm^Lf%Yv8DW7^<vm$$ER)j
z{z*Ns0A=;7m3p%C@n@zIUCBoZoO+*6PH_d!v;u3KC#4_xC+P^6^j1Ca9du5iw5Di>
z84gTn>a9>`V*?T8gyI<0LcTi7=fd?Noc~jmX&srHd<KHe1V8lqXSxOQD8l!BRiR@D
zJ-RE~6j}(}!1Gw1JM%n_r?z1n&vOIMi98qcJb~v(o+t7=gy%bWF3@SQ!e2*1i74iL
zUK_>Ypr}Y$$7$%3I62^vm05^fIj?)=G^o_GpixcJ+)FLU_S|OZ`$N=gy!9+fh#~CB
zEQ|}wJ6$<m@K`$%3W&?e-EjDRU2L5#{6rYOUcBcF!TY4`<9*u2;0yZ<#v6Gr<2`;m
zcxz%RQnNI*$kCj_;$NNZ;&$2o8b?KGf5&t`M@3Y1bbMISL(wcnanjWu&_sXdl7;uH
z08Tohg8*r|h-(_(fu@U0;P|-2Zk_Pn8!W}bA61ODiH%^Z$vpIvlqf24yd1JMd>&N-
z>&~AtvFJz^PUM)U7^LF!HGpFl+FXUxDflFYDr!>|<6wwBd}lJH7|_rYVYTneXtzc8
zaJ_erO*CzI+Gj7e=-ug%Pj&Sw|MKJ!=S!tJ<z9!;s~M14z<OZ@q~*}$lvwTM!}9Q$
z=<_6M6Aeyd^%c#(0@hi%X$b#};6%;hRU%n;a@6plHQ!tn+HI$z!`bqh{P~4tvTPkO
ziQ+UMRf^)L00IGi1_+v|;pKo2`{4yjt4SLD(!C2Q8BN7LeufP%u?$U>8BS9MxV#Ku
zP=+Qlz~t)5n$V-&$q`^tX7Lxq;__>I_Hu)Up~T3r99q)$ftkijF!kq~!8I_o-yQ%T
z$5(w=z&Q*3is?-sSb#FNl+|hxc)Hm&#CBBXpqMpv(GGOr3>0qRUMJQn&f*K8vtY8@
z#jCCa_6aK&spWIDt!mzeI%X7as*K9m!sznkB+w<5Q`VrTF?r#+e$hDjr%yPc;CQOA
zG;}BH&H3c7lwkFwIuBBvs*81%QCy8h5<?M6VcyP4p=B-BknY{DQ7M-*Gm1Q`HpGr=
z_+qOaRi|`0mh;Ktc{n`xJseqJ<`B-Udoe3<2c&9miKP2XMOSmHDnC@qa(}~~)oN#g
z0!0PStvro|2h>=+1NCmoQVZEzx|1IO8}rv#n)4!vCOT?I>sKvq0z;QPTf@+8*tt6%
z06kE+_7pK6octIDIK<w)Z|yCC*jMziKwP^Jw$cj5S*#MaO9K|tP_K#xtS~Fqlj(?l
zhC^Eh)-c^djDA~FS!7w7wj9=j>|X7xm!E<0AJni6P=UwW$+>7-aUA_B4GfXc#RG+j
ze}v;)ecX9%)uuY{(w0`s0S^G`K}=S$K-WnjVJIVF%6i@mjJSeQgBbCAlwl08aOln)
z=B@hM50#?S=h12rB54gvbzMjEAoWECE_bMJv37x=5tRpST6Sw7KguUzn^TI%1Z1gW
zA2Dv7mch$TX+Cv~d!=<{qQ8Rytg@`Em0gFE;b#B7rf<WtP}icnLS6Uyja+3aL=sw#
z3WWI%*7YF5oDL)rM!P;er)p`Y8&{_hDU0dvs5Ppl-!B;`Z}5Nlz2gzr9=_#Osje~9
zq{X~sVc-yBiWffWBD6Q_&kDl=51%AyOFqV{ex&@$<$`q*Y`=uy{ZRQgxoJO;sdo?I
z*FK`q8bbd%1#VqS;4YrO;JGi)`*<G8^M0N(?jGRzTb>W{yo%>TJg?^YFwe8a<<ki0
zNARY!g=91KDX8QbK2G6mEUa0Heu_7v--m75pm2{9AnBW?pJ0ctsdW>_OqvgfEGDyq
z*2X&<?<7VetWsovs7f1g{kt&KyFE!))fzSowN&S3d_5w`3Zh*`%K&x1oPoL&m`w^9
zmRSZ1Ugv`<x6;C82*tn2O!xL`bxWmrx?8YNm6fK-9L0c}p6G*bc#D6&Uipby3)2>~
zCRuhfVVrgE#j$-?Xaxaf@QY1Woah>&qUHEC4!JpiD?9UJbX0eVZc!zK4T6k$_kB9V
z5o*e1PwE=`_L>CSwCt>|&L?Xs6PrjxWr;gzNuZ*NtFmtPc)3I=tY;FgtWpq{S`JB3
zZ;RYA+V$l1HXan$BO03CC#fK<O_3zpllR4Xhq!u=2CQo*NrbAb1D-4>5oQXhyw00*
z*zyrbZHVQXDGLW&H5B!<y%w^vl^k8{5t*msY-|(D+>;rK-WxKhjg(^^BD&C8Fji<#
zIzuvJwI`U*!9MX><n+e>&3+llnwdLMvjh=KaN6zZ*H?60taG`0e4h6$cJvx3TqL%k
zpA1l<Om<Z-NScVO;K^>oMHWE+oQthoHq!oy1+RKrRPV8_R0kJb-DxtF$jy*yG{xx`
z2B2<pKoni6j&|bhaGsQZ`Lz5-h6y@?yIo#EQvxdk^n|nj6cooVKf$4HNu-vmwEmmz
zvwca~0)$lO9OVSv0A<!7D5VbzUk!Z!;h=Q80QcA+wWe<d>dhH@Tb8T-<gVD*PW3-<
zfJJQjP+9dqr!XyiY@%A2e1cc~BsnqxWL2-{8Q*o0S3h$6G10c`qTkfQ&>3BYJ+p#L
z&P^hlT0gPEj9A#FQ$AjENd1&YT1P*E3q$l)W^IfV-&Ph`X|jLbZT3%fbLY$_&D>Fb
z%pEJ1>P%CBdX^9w2D$49yFu=HLN>@PC7?m>M?5vi-M~|W+>Jan$lb(KgWSzLHOSq<
zQ-j>CJZ+GhML<8QTI7Qye@8*%h{%B2hUsv@v>~QLicKIfee8y{-@Xc0Bm2{UE@reR
z?{2mglsXdc)9p#Rx<>hxPr4)=e52bGJ=czsUhS5>1J7HxraFJes|K&d6f1{n62*&a
z$Vb9#OK{;iJ}kLZ0r+s~5xQ{KWmEOaF8*w7k!UeegbBmlVpuW?hUzz1VK>Ge#?4i<
z@LfuXf&J^-1%(!&5Cn)M1L!pB@8NXp%^Ic%SZSw(cC*QBk<Vtc{H4bM1l#IU5gw_|
zCDxY#8vCD)Wj5Yzkxt~_trB)!n-svi1=6+EK>i9mvDo*HAm&W5JKP2e2Lg@Rcxbj$
zRv~dm5~WK;QFQ6G7AWlAT$A9l>8ty-F3crPTl~x<r2q49OTUKnToe5yS@V{)f{=aF
zPlIB){wM6fdl4^9=s4XFh+O~(hGX%uSm0WoWfpM6Z6VH$%gQDG(J60%u%pxyk(KLt
z)OE!L`$;L;iAfZs;X*1AO$k1DuDZyk1Va%oPYM3|<6x%W1oolY|4{oLE7t7s+P6F<
zm>boll}{1m8$vm%brhqs7~0>eBx;GAdb-hi0U`KNkBI9Zq;JLbQjlU+d-C3<cc`NG
z$QG$r=4!Uc?Mk4u>kWle-q|7wX#f@;vO~&<mrf9VY6OCaKg`bScZk@k%-M&fZeQTi
zYkrZfxz8QZFHTe$8`Z6F&>mr2?^x=r7GYzW2Af5^>n$_|1G3(z2}X-6;c{oOT4o4>
zb6I`~e@@`eC~4kfQbNAD4%WIspmlaFdy^K6$nCynfi)w=zgs-~-hY(qjEv$TzMc{B
zzbegAjrhmGE+TMfmz75UOcNBx?CKx%fqFh_14Icqjpi<APpl^caVTjRAG|s$oPRuf
z@IW@dDcdt^^PmPBEs?vC&V8mX6lM^~7!Rv1)SQ1L8{HYSyRWxdNXruAseP(d=dCVz
z>vL6UU$rfovwn7?v&7U;hVd_&)C6W9C^U)g$de_LR+`D^X(RZ5&7%5<s^}SFQQdrV
ztfzD5tJBqOert^DLAGGO&EaQB9(T1*JY{(xuHzv;{POP72MUvYS-tBgLrhK6_^^U!
z+z?9~O+9n(=_i_x8Me9;E7;p2S$o=`+DI(3R6jYCGJa+$tr%_M6N%H7#qv)JVR{*F
z#OvFMg;s|@x3-;0m1vZ|jFVPHC7~?h8tS>dO=O9RHmE=KnlozD1k>Wc-rlaOw80)I
zeDo~U<w(KczW+J$K)=3SSHI%oK%qO%gR*(r^5k#+M}ts#*Oj7`ZDT`ukB9BLGRnJM
zSJndZOgX~wj3p&p>y7x8o3jq}*`j`dNY<yR&Qr|Tb?s8EBYf7-<wbq5;)wNsyX#67
zYS)!DAGWn7B1_xfb#>NZTCzw6G`GLOYq(Vn-F5ZMp;YyTcU=v)-k}@IW~$!Tv+HWO
zRSn&BRimo>uB*GU<u#}OY}eIr@fq6miza~2>)CZR+^UA|x*Dab{I080-ecDLEGdy7
zZ6DmdERnYB%EYcxB3DB`sm!=U3L^%j-<t7Q7PV`9R!b&F@y=jf`sKaK4UYfCU0146
zLql1{w!iDD_*RJXx^`V{zm}o9uI8zhH@@p?`&ACzgjBC8U)Qdy?bkAN*VPRNQ%g~N
zusk{al<kPs@ONEpAC;jE9uF$7W7pL%su;5C>dq#lfW;yvsT%d&uB$8kw=mP-KB(~Q
zS#Aiu!4c)%t$OWvw^>Kz*zV4&`4XR=t?s<~nDp2;fU^~VGpM6-E7#lO0EZ?wkX+i@
z#;~E;izt%_y`jnXDVf6upitOpuCKM&|2+%Dq;*urUy=Ur-?=^c&ag4(q1if&*Jsn2
zYGIb#-u<YchVr*7sXLi@SJ`iOl)@y9Q_?_kUtaYS0ClqmU_DN*m(+_Ssl%*0!t%vH
z;WtV`%~=wu&MkmhIiI|;Ds3)Nxm=lFYr8dApB}5CE#6ioIMoNi_8Vs!wk#dpi>ob`
zR$O2!8e83X@gWML(gdn<HN$LVT4A<vs&fy&nh~Y}LPfJz{Y=>lz@QBoJ)1Bbu|@b!
z0lVw~nl5Y8GCE^_Yl|2G7TsytHFLMqE7^MFXC@>G6+!+W*91nZ7GJAz_=LnylbBzv
zCE>BU496Wz_bH#r+9;$EHx?z$8MOXiZaQRi?l>j3Nv2o5PyI?!|GFH0r_Qd%8daQN
zD~z4|oMRAyW>Ob`tRFjCvOR1!34KBP1mEvE*~&hV1&zqoL|daq9IOv1Z}>&!pJ%I<
zw%rfiv+^!Vlg$;|ecBmt(7eCYWRG2U@q0AN#lZ+b=WT;`nCz_T*+c12y~B`PG9=fZ
z_a~Q~wy&DBC&bm5{M+f&NS`<#LOVW$01APSAV?tAH>;D`rBMFhrNY&{mUQRp&JfZM
z##~YkUgv}2*K7#K=Ty^(bn4cB-7+H<VPCh*vWVn6g)UqEx^x^5(3TM${MNS-c7E&S
zgv@Wff`I(ickq<odL>W!t$)r_e(O7V%5QxaPx-BTdCG6y$MbB!FXpMAHoz&I?QvD!
z(RSLWp@?5uy^TW<*p+zWY2enKyiN}|RHWebTmDt;E}l7tIN;9qa0y=PgC@U(y-&kA
z#Fi4F{BuGk!fheU3TY<ozjGV(G1@lfx9y=gpytQI3qzQGiBDV|;ZYTXJ_ow{C^vBx
zY7#_4(M?<xj3%!8%d;VsqkJBAn7D2Y_D2miTY@r_p{(!>^x<?@e9L=zpSiDGz!SNn
zH6FQoa4jo|?h=VkbJDkNh*+#ko4b2gn=4eG5f8=@tp!fp2KqKPBOdK>6kV|le(}!A
z8L^_3{dYT-?QfeAJ9=>*r0ZSfIcYyPFj<nSfvnbD&P)%W-r}=alFw#6nd&@vG^K!O
z1Owv6eI3Nm(ZxE;pdS9eoe`@-&4>+Wgh#!Q?P(pxjQE7{*gmgkMm*fAhR%o|-G{2)
z@Qir4^$wjDzF+meo*D6Qs~S2Z{`=lk<!8h<9=jdWeb`@_4HuuGO+Qcgyq+2HaH|?R
zBYtrlRrwk5+c3~s&zcn!f~0NosIo-bjJS$KE~BR^^e+-AjF=IxvRzMQQS0(qEtwp}
zaN<>UQTs2>h*hHosIrW0e@6WHTOiKsnh|fmmZ3A^i&V=SpAm1r%Apg)*Y={y*EJ*F
zel0_1#EVr+QGBpGIpvt`h}H0C#M?(@XoGhKmDe#N9!3>IX2dt_i4+W;5qH>U9juzd
zeNf?-nTi?lJB}{Th?T?7h!xcMG=pd51oje%PmiAw4^2KtDl^Q8s{ouf1mFR2fJ2i<
zk?dx~!-DoWdMiS2D6|zMds~hvTB7)4tOS}V+s;;-w4g*-=T~9Q+(HmVqSO(ouKOGt
z?R=E6(Hr?R>YZ9#6HqN>>8YvsY&~tn9ou+XUK0?vZGNK}L2`_TFMscUGqjx}EQSZh
zrWixPbONR{QHOjwR2)j?A_%BV%0G`O#xy4Lv%z0&ol0rgXu*lbH`*w_`A7?vzrz~J
z6_Zf$rOY<^C9MqOw~=8B8fu>Fs1agJ*GsmKjMY{3kUtpgF!m3SzEn*)*v(?XE1S7g
zY%A8<g$-^98DgzDqi()RG8&!gv*}$wL35mGCZY)r*~a^9mgKW#Rm4xKzr)$WOghph
z*fc4ZCOlSQiarB{@tf4}s-O3I(1^8^kAJ@MO^N&5d)5=Jv$dG?Rh&0M*ZgK8U6bwr
zy6xh(?MB))?^bAQ{=~{UM@y9sChIa~-M51cB-OIM^=~dK^MVO%7UxK*dC%2R>NBo_
z9SS==`RbNZvT*;?@(0{gr*s|a#Wac*oJ8vmBqyM`^+)%`hi_KcXriX?STzw^tlxuf
z2aHaiu?vH`lg}Oxnfye!<9Z4|pa=kIyKuk4lv_eMXm~TP`hilz-6Bsx6XOkJ{Ejkm
z?Ait{@llTAxA>>?tu}*i2hUB4Rm5vV97l<BDWN0rHfO_~c_|Ksdd;70SCGm$cC}r~
zu}M>p(l{Mn_ZoW(rjV&Sd6+5;XfI<I*ro)>KdF+^0m{i?a0a|PSsTll>f$iREw)wM
z@Lw<d*YRc21Dc|(*BrFG`>D0@MIv9MRS$$#?FuTE6Ya)kOb(<|lU|{{zoTX~;FYKW
z%M*CbUL$#<u=2F9&vcZJX4@ft>-gS{eCPl&A4j0$W0hcTXP09<yU`_g+@MU<-M?y6
z-3eQ$D!2FG60t<1=tiUHUV%=4r;#suU&sfc5cJ#_(UYUYXczS4e=OfF5hbTD#8*-$
z(nw+|JS6J&Bl;O49uN`uX_JYLBXS{8jbg+twh&>)!nF0{9T=KGtT>@bwC7`n46c!Z
z!VkITUBilil))A+(bxV!ToND>UK$H;h=mJ2tm5k|tk9!T=&>mDYYUa@@4+!bl=s_R
z4=S3lE2?n)%gm6`FM65G=ZFF_xyOOk=ZUIFcIyUv-e!nqd+uyh7490`fx>kj;1b0F
z%bxn=^Gn_px{L(<gzx$&^rVHN0#v3LRi-@JTP{k7c(pe=jO|?-UGb`*!Cbae8mFxw
zCQ-c;*f^r>p;*sljnky(xc~LGMj_@7e)o>>TYl_n5<F>lgPZF7y!Zv=`-#@ilQw&n
zz$#C)iNLyi)}e}5wTz_EQFzDf@0>CH0sw416S+N=Rl(l*jJIm-tle#s9iJunJgLq-
zRlm=tEO+gSHBf7jj>kY`kwNi&JkDVF{pt4r9azTI`ijq?ob9gHXO3w;qr#(WODUXf
zN`OUzHin5Q+D*}xRv<&5NddUI8AZ~@Xe?+orI`U5`^0fbwKis@2oH|M@&QO|<Ee_}
zb1+wPciUcw#&MkAY;+R+q67TiH`Y<w2u}h<R1<#f(x*cCDDwm|>+3i&sVBt}&TU=r
zF4Dj#F7_f~weL$JjfQXm9Y1dR&^cE>#a?b-r%1Yqtns}qjl0>fEB&EiE^A68pKBb8
z>YP|FL@#R`ThmdeSG+j%vp%Owb%q0Q8;19p4>WEnKBw{!ikqVN@@FI+t<Q~n`|1Ck
z-y{}Eb!p&oHMZL3;+hUSa<HPr#6x2DR>eV0JT%q$O#rx$k@g?qux%RAL3a<Tb>i&Y
z?n5KnJM7vop*68NcbtRs8%X0qj}UUmjUQSzbNOhO>qc=g=W{m2FE>bajYMJ7wT183
zW3+=LnV@O20toL!0c_~CXvpyp;-CSpxsW4!w@#|^(9bmJb_RXd(Fy~kNyUm!^UtAW
z%79BQ)QVK635#{&Wp2NA$H#|cJ0!;!iXu_0=%F20Iub@|*#38193aUBa3GW@-XKI6
zw3=#4?{+a#9IiV<Grmv_+1Z@!J{XJkaJC}O5`la@D8Xcmm`$m#ve!1%wE<h&gs?Qm
zJ(7kT)>KxUKVy)=Nvo%Tq>e;w*E1q?)NKm1grrOeWGw)j)FCA|tA}V(UGD;~3!mB9
z^=wA;$nagN;A{UcR#n4ZP2z?2-i0o+p;>q|g=+k)hE)N|4s83RH%XS4E==0Q#0eeo
z8kX-_t%g~uVb9l9L+pgo@9pAwby)cI%wlxb5+DslOUJf4z7<X%76@x%41s+;0=9I%
zT>^OojMXa<_z`3f0!_VlE_VahrM|OTN_MwIOC+C<a?&E3+4QwkZoklj6m4g5MxEz+
z?$4b_!zx(70QQM73XK6I+|2EDFhPr(MRk0O@^)(<Plhd)CQ0PxyUr^-6E#P8{eFxi
zxqYjMwrZ=HcVGSdHq9%hWEV$AX4hF=w$)nz?Sn>^!ukA@E$@Eua*99=B>HLbN+B4X
z68divXxUUniYhHDH5x<|nCXe0&2m6;b_<s8C4&jkbbBDg@8&@W(L{g@1A2d|O+5^|
z?DYHy=rOgX_<7YK@;hq1v{PuP5h^#m3MNl`ipDS*Kd4K}m`nka630z!8;w}Eq`EFd
zaVvsjR&8`>lD)F?jv^bp0=}l&IHc85o0a<aI+yCSJ8XfHnGq=&092gF02tFW!&NLA
zen)$r7_N4XiOWAm2bw~KVU+g*1FzW;5;2LLE#4U(kijy0p+^Ee@OqFiwSg%YL*fNk
zMBQy20kE=^+@U^V5Y0I0%|yIAmantp(mTbzzn~W?r1#*tFzp2x5ix$89zepa?IyjM
zAiZLddV1!|VhHd+;@A&T3ksNe(J8MT2EdpeL$r<0Q8<SIk<?czK_pih_f!$d87dqV
zpgX9;HZF{(8sgit=dW|=UVHF;|3Ss?!YX31SR<#c2$I=4heiek(-J9|%Y}kSCvYq!
z#1u?>Ou_unvPG>i1*6u)70e4e0IHgT`38l-D^f6-N(Hl%=a86KOTomOQ5NgZT@h0-
zhQTlu%-4jSHI(jSI5q_{2$Q+K(_@%O!BofOh0BA2*%lgN7SB0l1yi9yZW8BEi>VN&
zkDP*O5no;9Q(MIKbkUTcVA^HHR8cUk$_O~y!^3m3-qpE$yPKFeG1c|m@UBXSVeVmO
zjP#{X?D(i`vwE}5>R(^^H8Cs><^CSeZX@R1S2MqDgb;;$4RK9A=v4RZgJb*2xE+HW
zt4CTri??cvL^Sw(=yUW48rUukY7=^nYIdjvXh&+{eWM&N*r-bHX}%~yDvQ7f#@N^^
zC~C-MrlJEUhWae2Y64gro$I1%uKq_Q))PF|6DqL2@iMSJLzVgQJ=D!>{k;3;%x4&l
z(u9a!>ncTPts3Oi#7VjyA#!%ot_tUBgeXMfiU8UUU2IF2fO;jf_*!N^8*8w5Do#7+
zU9_*>if2DdE0_~Un8sSsMkn(+B9`h2`k&!>_t#%Po+oSv&)PSLr^pv|{I|H!EY7ag
zN%oV^K(Z^uuJpvEReJRwl6_QGT6xlm+(GuN*+ws%Cy*0dr@{^zc#Nxua+dUbWhbx=
zOB@{WOND=NElEf8%L#Uq_}tuKw^&GGHccU0$F?XZ2Mr7l=0E)CBIiF;{xXE(pEYZz
z@C;YDl^eeJ3Cc1B_$j=?1+Cx`3k$^eqR@3w=z0qok6Fz)IH!4r{uCI9kkbmEepWt1
zLUI_YtQ>}dCWqk?doFSg8MZjhkhf4^gSYS!4`+rz%qY9@XvJ)@8InsCu#jfQl(not
zx5;wPBIf}F`YfsUXRmgc%~G~m2Jxrp!R>ixC(9A20=NW`VRH%Q8fRDd1Hb((=MS7O
zB=Di>iPbVm;345cz4DU>N=ZZAfKW-t_0-25frqA?BT%IU)Sx&=pn{Pj@S`>62t2x+
z2QB6*RkK&T`V!sXDvn%Y@)Q=WFYsPj1vD`jKBEkvn}>a*_bBS>BYUE-OF}Z@JeGpE
zScp;HTHQT5o3G1upN?Y7>Itwcc%0tA6ZSkE`N%@P(-}syP2FcV=i8bC3|)^|#<x!R
zRuGLIS8qA*+?hBWq7E#(@#L_RxR}FE0Xgg>1%3tKHGlZR9HNBtTAp!_-KSrpRu;;L
z)}RBHs0wBjwN7Vn`iK>j;?^y!xQ=EEi#obemy?dmwcD#Dc5`7A8BVQ?K_==;oY*Kj
z`)k;ti&1@`@TSe`BpL0>raG~D)w+&{%24Rc(!XEQLPl+(!=1UN4t|_C2FoVx?zH3F
zgnETWkxRx_EYxcKAnyY%Wc=Ch!-eDfI7NoUrz}FD-zik9{#fcWDZDI%MFQdQ@Sp4s
zZ~^r$<eJ>f;7q>a2#Tm`jmf?_ZD-Ntier4PyCWFRJ9WU8AFVS4w^3kYRN%=R1&*OW
z1l9$dDYFQNf*7`6^@5F_iH>1o^Em;3LZ>gGN;Xi`6yzOy5*oCIGk-*O-fD~mR~5%^
zg%T)5sI$8F)h#&7)StOa?6X!ngv&p3hle7t5gzb$u~*#W{Wb0zSTgf+?CQ&p^K^Wl
zFfh`0XU>YM>XFQ?X5qGP<H|tLm7K9y+{2mxUqyrF6W>;&-1?BZ??>OE3cl4`2jF=d
z{x#o)$}xRDCWfDJJ-1?y5Gt<SUKZ+7oreyM<$l#K32mBSWV9yuuCaTKb<3JdEA1V*
z-vwIPoy7PsJ!v4Efc#Qh9mKHtb!=&`SvRl0Nh@fI8SK2jgmp*n&L@XhoAv4D-E5bq
z-9a*_CHuQGH2cZu+&Bd2`hmg~$VtfSMIPF>Htth;udoqh4RTBM^u+NC>ZedrNGMA*
ze?3<WO!1FNGr2-~aZJ4UpD$@Q#nF2U&D?HLr>w1ux+!_#uCKoh&)z$v4W@k#tZais
zeNY>2q~wq`d|gaN8!l2CTp_)<HazyCwc*p_2Dc#-F_zP;XNkId&|;h4Yt&K1*Ip(9
z*ftfG0=8^_2dJHXVMVpbrW|hH!XKp*-TOe{FDVD+fqI7`U?PScs|%%Y(?=0p!Q0w+
zdMpBNV!~7=drd@kFE49rV=<3_^1QWkh*3zTT#Op3PymdM04zg<7Xe!Naw$O%yJ4<#
zV?|zFcd~Bzt5CgPH%Yyhe^>0p;y`M_eMnk~i>7LGpDo^QWsDka=jh`HW*b4q?Tn>c
zm?XjYYsrTU>4A~b4TRzgCa~Km+FYno^gSxNqFgk4o@h=7sd}9z8CB0G!p~I!u)6?U
zs(<bvji?t)yL2?g#tjH1gc&XpcLweD)F&y~V)a*)+`+9)fk^fov1304hal9*#9;_A
zx?s8DpZFI##_P1bI*yMuZ75}5eZC5?76JSEP+)J_4zTuW-2`(aitf6{infm04zQnA
z1BUuf6!9((Zf3IM?b~eTg+pnUdvB40ng#>fzvIMh0{R07gbpHp$3>;l3(JRAGvuxl
z+#a)#%prFxHdyGFUeZiAoW;#Et}0}t<pXd?C4=YQQs$hE5$AkwCSv23giYU4cA_oS
z_$6ZAC-Clziic!F#SO+u(mr$Vk->HMLRpIiyYKNCO|vAt3C=!!W^~7gOD7Q6a(L>h
zPr#=N9-I2oG-KH*jT^K1b>Ta#nttgr-S)U8TeFVUre<lpjcQr}Z<6-YsI;s?`GpEK
z*oHqS?(Kj+Q=jTOMvR7SSU{#n8q<+W*sRCZE=6f$re+!I2Ok$HP4b0@MNnTGE1X?g
zE3kK|V)?UXyXDM6cyCX2X<gW`8Btv5n!M%k%MY?vUXfN|TDY3MT(v_RR{F5AO>?=Y
zZ$0-pMuyT+%AHAF)kMn_JT>*Dy?rCA)$#W25--)oWx!jCG82IJOgh!&)UzWui{4#k
z@f)d2N2|)iFMpRF$6oPH%>w_^zPnlM_phmq8%t9i@F@=Xng1Q&J1h*F0_lYEj3%2u
zs!=@AK(p!Hv24|l!gizdVgGQ$Y=hXSAvz1@%IAq5NG!Z-@M4zbr#$&J`(Qht&6?bd
z$@x`na&XMw1%P_2(s|lv7iL(($0ntHiCSiuH>oPvo*9yfy}{O8D0uPzy>TnJd`~6k
zO>ERn=Dt~&yTFwF@R7d-ur{&kunQwWcA)T0QcNz2`UuTxh1IdM%)M4Gso6xk??4v-
zNm}TI>r>b06TAE)O&qnuJ`0u@Y?+_T1BEjLZ!;xyRiQP3JEP4q8YrAe`+ej5E=#Tl
zHVkcWUM3_%nUVgbE|AtuNJTCPIZlL(k*z~iF|xV#`Blh=jP6xB&hihT(s>c_9TdOo
zQI>Cn*Jn#FZK0xZ;5m-fCp#^fJ4b2hfN+x6ocIw#;v)dZ0f5OdXM=^NHvE+s8db0I
zj&_(|o_41h%?1hw?HJKc3p6ALrv2Z)#K`u*b1_&hmsm5u3H7-d`PzK=<-6)}>=mQ6
zIdL;u)?|Bg#>Jl+#lO9@w=zz1@zbODbGQsw`cy33ZtNbLX|oc*G`qF2QBC35q-R;&
z7|NOvBo~=6X$YB1lW9^T2RA`V?J#ircUq|k%nt{X!?&;zL?w$aXk23Zl^SsPj=IIR
znX=8CTCE`Zs<DRtYaHcn<y~40?sNE1hQR%1Rk*@QUkiJ@CLS8Ljm{*yu%}}ZrM7Cd
ze4$z`M^j9@Sda4P%eX#Dd%upN0rnELU?<mt>#D(iYc<$UFc=Pj?Mqi}!%_;U4ZCc$
z4XfD;HiS~TTwL`W6KlgUYQr(U4aY=nsNY5#rdNY4i+Bj^ZMESUMnT$OtfscSNjxG4
zST(Y}fER2?bG`=zGB;%xr<PA?JbeC?+LrLzTHB)Aqifx}PZ`7#j#a;24RSUH*+7j3
zei;^2YN`>bMu=he@OMFr>B$olhBDLri*~7z8or7@+DapLsfNm3F7toZ$lJJiuS`C_
zHG6smv9{I1{d^1GNeg?W?wnioJT9e__BL-I`%P_YrSqnqjh18EB{h)9(puaA?JuJ1
zY>jO0bBh7y#$E=9m_l-1U(-pp83Nk1lU3I<e^CF<+ez9fqbLQk7O+utw`_MU4w->M
z{#jMCsWCU23{%b_N9lh<+J#EXvr^3^04TR<e)2tCTG+jFG^_dGwCGJIXA&K64q()(
zjB2=>jRVdxN=t1Q>EOm&wrj~okts69=YvL^7Pl3saqc}LL(I0ICL2_E+KA~4lT>FI
z(WGdZaCh2j0iYo^B}!}&;-NLjaZVv?HP><ZWzgJvqC1{Y16Y{d?#?lQ^4-TU^4fi(
z!8Gu+{LG(UQmZ{Cb!+G-UI&{67PWm$G-3m*baV`2)V3wiP_~Ru3ks7OOS`i1a-2q$
zaS49~eKjNkxm_9^`>sEVbz=K89;7jj(}BhH5tDpYQGI`f>+Os1>3_n=u>B7Wx}gT<
z#|uwlt<MsA;K6XK%d-@yYN0Mrg}{w0RBuKRMQ0BbZhG2dh@wJ(1`3B%Vu*J{2_gIE
zlwFwV$bAFryiFYvMfc7raN1N1nY}n~r&oNRTV_x)OYr(<V&GmD5e<QPSTgPwn}15~
zs#)aMiV%@)9nfC$2gSxVE1jZjhNAVupjKX^>{VL%B?(z*<(&VxmHob9W{1D2N-I-a
zYvpoNNq&vS33bN~Mk8l+n;bWkY;MD9te4$cbS?btI&MuOZH#3L{L14UZyooSX<a5H
zRI20C5m!a4%OUbPrfo2${R1=w{7y=37)YeWH;#1`q0Pq5UHxFWf=N@j2YTLfs7*He
zIdgsy#R}H{z;9F5tU9V)t!!gr|Ac49cE0&frIxQ(4uyAVjlJy5%es&<hL^SBWhY+x
z!wV+xrV!pSwR~d;qZWOE+cTrMZDfN>uoKw}7Uq)x>TSzUZER`fUvn#a{+n942Pxeu
zve2AxKj|s?KTP7r;zw2{dihH50AU|KRZMeduz_I^oA!ZoCr$Ot-5^$|#@u}*R3Vvw
z7A{tyK&W;I^^hl2Hby9gBSPsVB9vYtLg^(UlwJa%6b^(^xDIL>ak6*`IS|)~qcBI;
z8wInDQ0<OJQ$-^-3W!h*B2>K=>KL#ck$TrcqKG=5-{7c2&sR|A6$xiG>U<a7H0ixY
zpSjO1H9}v;x;aaj)2MW+ZmDY1xkp-nxt3)8#8opAxi{-MEs;y{n3~8jxWJDZsa;Nu
z`8dK<sMv*hs!jv&K;e_W1s9fEqE+R;n&x1+wol`3;e)?Zr*I|)FHxamU7?z&&<ZQ$
zER`tNo0QAxpc!)cX~6f|vCgz(h#Dx2G4m;u54CASf?tvjMwCmU-<;q?ubw5Mch42k
zyJw8(-SbBD?${%GbsQ4Cib-G${~k$H^zL}Yy*hT8o$bEKH+W`a%XWFEcuIalZ=x^8
zJEw~7blyUUrk|)fyZ2o#OJV&}u2+;AZ5im;Io8=FmL(VXT>(?P7K*xSM|Bs?vEnen
zv0_vhX13p|J6oL5s_w%cm~GXw)}a3L=ghjU94MqMkL$OPZB99xf&%rj&;>cY>*qNU
zYfnrry)o(BySKvl`WA^vdf@yrMlpDTZP)>=f@rh}*)U<4mI#yY&G5ft?zz7Kuffbc
z^+^$<|Imn9zwshqjSg~ijLTIPfuH$YM$?e1Ub$i-;0SI8LUK?a?8xml!o`($w2~?P
z|5FhNvV4<gvNt9L8Fdhyt4V==L5=jj+Y7?OPq-db1_^>??6AWw+0bZZ>{dh-RN6}V
zzPwfc`Sq0cDdN+8^^Sf;dVO|5h?Xf<TXrS0f+cIS&~I{RW-epAji}jdH)#5=FuU1g
z#GdSx!8Bc>_P`wN1Bo3duV9-xnM@S+yKz8dso?S+<ZOkS8E10Rg79AJ)AX*N%FWRe
zICFfO-t}9df0bf~@dD}<n;s=&O_q~DvjRr%z9|sBaIU9OixdXis8fB@h&I55`uDgt
zwN#S%i;ufjw+N-Xe$5LsZc^i0G>t10_(MKpc{DoDB-G6#j7AtKD%fCD=5Dk|N>4FS
z179UK+viOTiWa7~HbgkiJX<(=F!+0|)0%X@>GMt2A%^8azN1J@<X4qz<kK8y-@m!T
ze>26{ZeK}JEbK2vV~vx>ayLq<aJ^t)C{QocNPXi#WRw38^=LMu0L4DGHz*An@j=bL
z17ccEFQi4MY&X;SfrK%Wf}qwPwf|_}egmDBd)9l97Z?vz@gToVCESL%Ar}C8)IPgA
zYjJF0<x7?cU0~30g%D4x9}lp;GAx*u#1Oej^-*XDA|tnk$PG%^HX{ER>kxtGCM0tE
zMp%4D+%$+jj#Rb{)De~5t>kaIq0X(X(;BF43i+trtQ%|*WN<f7!-N19cY%WRhM;J}
zpRfr~#_Ux_bQfK;PUly4)B+Qr7)yI@F8A1zB5gJMaIPt!YSn%X9#TgceW)|qD2%(Q
zyY>J{v-+gP+(>D6XKrg_qb|&CZ9I_Ma$(0C_;>Km{Clh1N{4LV--N~dJ9H%f4m*T@
zhcA$;M2)AEbH@;<SA;sDP64*LOn#+_<0w*HS1UgM2YJKBWqXWo*7VKnM~Up_XP#k~
zT;~ojwL4Xk#gs&0hA05OHgYp<^Q^qedb<iMTmH}$bt~~tQ?d2xKEDEzbpkwl(PJ-d
zDar;0$sfK9lKZB*da5BgM@U|%?S>%Xk<3kZ2#ykh173>_LNL8G1TB9V!DJc1&w*2f
z;JRPB7x;=j_Hpmn)oO=VH8FjSju<1-o0gVFX31}C-)%y__EDCxq$`RC^5603b{rYu
zTO{>?WIWG>jG{oZAoCFhemgPicA&)FA<e!UuJH|P?tK8<1p5o$bvt>R1iLAr6G=>p
z*7U6>hZ|2WTIZWknvT*O6Ia{iF?Av|2giwknV9G}Bm%Q30`peDC>lM$3Lb<svXpR-
z`nY2iN1LUF%gWrVVW{f{L!)l0^M6E5!uq7?^fF~(R$Ri6tGq^E7hj|IAB&+qwwF`A
zP_q#ebY!I5+r=a_lCjTj%{07iKSeLS?AkFbxFad){f|w<!$c+UtxP;TcgE|iXZk?m
zaMO~eAR)dXyfX-w_`=*T0fy+89trK(%1Fp~S}TmxuAju|sm`$9fvy@TeE%Up#9d_j
ziRqwPTHTdS=!5y>L%%&J(c7>pHq%;QteN~72@!v&j-qJ>$CR80B;a{-8)AEyE;Idd
zqUjgkn6z)>O0V90#koUhZEfUnB$pLE68!>pPG|G!h$=1Fci!X}DBSZfHHHQo#|9&z
zJvN?&49Zz)vk@^_Ak}!$s&4qa8uS1qj3!U0b7F+_>i9@SR~x4+zfle(wk;N_%HMRF
zjtuSm0{{-39*Fv)mtx)-$V$!zh&+Q=ldA5aXZQdJr(L?nUSe)R+lAc{wL|i|kEh8n
zr83T3_X-^_3Hs|;&lLlOoy01kU!1eIPMNDw>Q>*VVImOjgpDY5-u;eJ6(V+@I0s4~
zTP)8wN=b&@`o~OC9i^HarJ9UV$`Bl=MyZTz9o=9Scj$%_Oc2Ur0!JO&VwZ`;BiVyj
zWjRp{)}#K(Zs`T#RCaZZ`1(0@ZXl0GbD;2RAM1FSyo@>S+p%mVw+~_RiE$<m%Rs~U
zdN(k680=p34GSIWnfy%a%_=sB<p<GWR23f)=@gUxE;ZN>BmI&yKn;@%#D)Ru6Dzx;
z!`P5I1`3^G4d`qHb8I;GK}A(*OOv1s4}tgsR~X&z@LXt}Oy#ENJAp~Z+xZ=a&<pp)
z5K?UvA1M6R$C?F0<U|{T<x_97j<+3o9P(a8y;;wbkco4^xfp+#s%Hg@XE+KdF4uom
zzkv53HaOMzvkK`ff6!H-?OElfF~i`Ez=lEBUg+yLS`MQ;{gLXOtnJSb)Unp-1FrVr
zjqtR!6(VY#-)J_xQlL%2OtGC})SPjmE+xWYVPjKW#}m(%7jBO4S~z^bJy|W3N~2`h
zKe<?<a_|}hfBrfp5Jf!NYoymouu$xa_Zs+HeXn)jfDzVC8Kn5Jxa9u`AF7#%iQk&P
z|KPjx>$B&t4H$EQnK63|({t$MZ6V2GZAOc=nZ)drv_w;4@VBL@t}gb^kTfxoJ4RLW
ziF<^>!v_y=)!GmYzzz;I_48{)R{c}cVYZm(HYd4X{6*j&<g@rVMlFC%SfBDQT8nM7
z8^0Rp=hzgpvr%S-eWz4_%=*c1wVr1uMi;^72%7JU@CL&A5!}e*;2od4Ro^SUNcgkA
zQRpQ?H=fJ^@S6yHh3CsW|HAVXo^?F`&GTiRn|WTy^HrWV@_dcwXr9_1-IeX>Y@9=2
zrS>^RL+2DJEmD>ZNjc7^sEkz90bgaR;&bZ#oA!>nUdgPx3~;0s<6ce`W4c@K72!AU
zRz<w`E^&5e;bUtR6F!_Q=X|%t+dG>sRBT@Vh-eb<9;M<T-XQq+I`xdE#@9>ctEu)g
z<1pt4CgNk?72qcn2+t55(!(JNeXwn_4MELzI~4GBs!y{$w^=6&hPvB(ke+s*42T&b
zoZU&A8x#dKpSnkwmzja`mK(U@rT8TH%WKFw_a5=w-3!emzT5rBzw;b8iwh*}&z;ak
zAa}GquGpE6w5FW!dByBmI_-oj6*$Zum+gJRReF1C=}48fjWLHPWShzMRp?04OWN<U
zdAve9D|CfIBiZ|_s-jJVm^r~~N2V-!%qe2ynuf2I5R(ppCIv{DoYjgPfsCaf)9kCj
zh}9g^EneUPQO#LlSo|%`$00X)OR6SuiAC2bdJWNXwKS=B)1Wq)o`t@@{rhGUVDkx<
zvtL7Y^sJp4&=d(pYL&Ran~r`spVyD<gTLaN@qGzdN~SfTG1Cy6+H^|m7?;wVKZ)56
znYlb7znbr+?Iq7ib40cbWX3uWHpcd61v^s-FyjHfu#*GWl0T_lWzFkLZ<<X3KIRD<
zywOORYWiVv3Q!7Hir_m8>%M{{^PbMH?oNL5&rONmze75RbQYgADxtYMaX<p4v8qr9
zTIzyqBDW9J&WfWt&~&t*J2TdSr_1Y0ZA0TiObiX6Pma)d<jX?CPTfP$D%Ut2TV;dw
zJ6lE&N?Sf-oITVS{L1jd1>h889C1j9sbo7+W+;W{%#fok1llb?QyFB!j1>jHRW7{1
zxbPC#Kwt$%?FC2H1N->2wZDdTQ;}ln0G-vB8y#NQdaK^Ap(M#O^@O@JB3{10czI9p
z7`*JSe<73O<z4^kc)3~r?VYLKW&exg<r%7^d=%Bmy^fb*PvbDLu;=Bha%SLV$qXIQ
ztloj4AfV@z+1jj3O2+eYCeF(l&&z-@IT*}>^j<&R<#&G=Wk!LFV+SuZZN8!o?uo5L
zA*B2hQYa-0_ls7tB1qFtk_wdDJ*0cf`TbtC>a_PTkrVh`g7B4R%7Sp}XjKYvDg@yI
zxZwgP2p5<je8y;HG*PHtf-v2M+yXcs_%*PD{MgkOk5f0PP?aJ_RmLF-<eIGYUQ;MX
zXt)A=w!6*jTegxp@wfo-m@UmayDT1+t1hZEFnA^evLWyWrNcH^q}?Wqah0ms2}RO$
zqZfuZ-3j(=tuSdY-ZW0w{PVbsKv<N#ZA+>jo^0sUqH417&tg^C_;gj-I0z&}*=@<j
zNXLFdWn=0nm-5DB1Ku5%cl}vKPJXxYr7e5{Ed4r2P$n<fnxH(8bofY6)Tnx=o!NHV
zz}t4^rl(xo$&D+Hlxd5g<HR5KJ9?SCeE1J#d9m-Zsb!G75EJnzDg|9yVI6G67Lb*A
zl=SE=Fe-xXecGIO?H!CjvAOkr^i8poOx9esC{f>0WpQhf{bEsm6wE6_OX<BnTR!>G
z$LzSnqllQ8jV*Ax*8bB~-vV>8!uuBJV1kOqph5;+muqahZRSO(#+>G?s|i;cg5F}n
zv$}WP_=^&KOR;<l<NR`hA6&wIjL%2yn73(%OT8a-mRi=}bV;3Cq@`GYt=2q+FcqX%
zIwy#!ijy45O`vRZC0-LHw-`_fq&rg!W$nxts5wwL7lxy%Xu+(#+*?{)L65WwmdvwC
zt)ZB7NNTcxv%bvF#V4-ytP@T9(`KC-V8<bjUV(y66hDMOQZ##yzG#M;P1K&XX)QIV
z)lEbq8LOLpWQ!tYczHfeN21Z<x$}NgI}BqsSj9~<G>(zyM?MFZl$mB;L|XFoMJ>To
z!I<Mg;}RW)lr8C7fiY0YjKdbtnamD$Jq*3bSbTc97m9$J8CFcq@w1=!yRwY@!!!wP
zs2EdP>8jR5M;mobK3K=T6KJ7(R|CLR4A)xFD+0R9+VYmWtj8v2F&-KKGDhE1LgcPv
zSbuTjLu)XfO!g3B`{XK;I@eqA9&HF6nO1<5iOQVquB9zz!0hP5WgX2GbD}iHwzLdV
zBx8HlGfoLN1OuhT`g~ufgw1X(yScyjGe<u&6`It3%r9qbJ4S%6u(+56(Zi@WM(|X4
z-0*{ae4mp;<;jNUbXA5eD%t$Qg&+G|jx)B_8r9I8A0Y@B?A^(^PnA3GXyY7lW!y4$
zsv*~i?bgyo9UYUPnW-JaQQc?+W57Nr79$St$z~K|W4-Ip(;19hzj<APzT6~zxltx>
zLD+3l5nh9X+4NeWW}Tn^g-tB5`%pu<V)Er=7_Q-a#8g(_z3Vrp_)d+g)WHCv6R2bR
z8J=1}FCh%pC1!Y1PM!oS#~h5&nAK5Hp2F5u!U0&(29FnUp)3{*6Xlkyn~c8AJulrA
zUP*OoBFZ-!b-4>lx$FsF;4ODd)=gG3SvQ{@TYA5!ES$xms=xFB#h@6<F{dd8i7Usv
zT`@bvV-8S^+Q8Gnd6Qx^Y(z0N3pEEo|NGDUq(;SD)_1PszI=yQ08*r5JvX~P<m`R+
zu+x!a@*C+y`z)+ZJz<j8oje8>V_wkIot!`jaw}e7TE6vfBX>jh?#iR;8ZZ}9e416q
zre<EpaDoDKt~G(1c(a|t;xw!uJEG%@o9<4Hhp2v+IhBv25>w^qW^1aGduvip_E1SQ
zAMcnwYvS|#Z*7Tg9E8B$(^2N**i6*VV75X43gZt$p=<Agqe^$CUXvYkhVi$~PVxgc
z+@2}#D9qpP=thGw`=YrzuLPJCBBF^eS5IWQn@jnUpLw8(FUi&ty5yFF2(1hC)Nyso
zq!n$e*^vD{{y{j0&=o-D(wF7QC)PKyoYQdx!FycrK*yVgS*DInX|q&%alG_g6gma2
zp#azCRupKcTA+;r5!ig&!6Fc<x4eg@4x*d3<vBql<JqXEZwQux#KxHmrrob(SVU6%
zKrWIuLGrbr=~{RbV2X0{1&GDpdT<&oCd4is0g5R_dUU?Zs!GBOmz2ZHu8YF3-euep
zYiqp9mtWW)rFGA-FmuksAkWOljkI=+l=OV=eGW2cF1$OSnFP&J#<wzj{^g9fcQnLX
zh;+epzM0GJ3FYrSgz|eXWFd2cyxEP%67a`h)icZ~N-EY^)l5Q3v!FnJ+ewBhWW$+8
zzDVj6Fvgc)*CldOOD8x8t2T_Zk3%)qm8s@i4Pl;L<$S<Ug}Ykx0$$-%%j0Vs4Y7`&
zy4I5AXO=~5P`<pk^8Sr>@Gvj2oun^94|KX)b$!^5<MiP)nVFWNXHl%i1%s~Fq->Kl
z%)x06;qJ~xm5mn5cKxYTd1s?C$Qx-H!{(w3enR3vqW#{%pUCf|Qay_dJ@c()dmLOp
z5`W_fI|oB80j4!5)pdxC3mTE3$BwrEA->2oUv&*Z<S^Qy;xZZBg5A0wZw04I1pqWM
zY6&$geMqe9$Y8dyBENF8YB6tbItwkV*-mp`c^gUH3tSXzgP<%j8fNoj8z<e-4-s^X
z-9sYAQ~c}wGyj0;WN=SWB+$=!a~<q~!Y;RxL_3VM>NB!g-?(fF3bj9rBC&3p>j<Yo
zFt;P9iVT=q2l7s<Do86^I@R?F7C*#q4V61c$J6A{3Atl^=)m0JK2(=Gz}F<BCD-6<
zLUI#pg5;fnzVh)Ria0gygWh==n1`!)s~(Queu3JJtYvswAgcfoQ$vKQL}h7KjCuIo
z;R&A-bVM*C5zQnzCPXsp7^2U}TZKudQxI~rN2>(~ct|J&O^G@tMUWimoE<)wQD?j#
zqB-!>wg!F&K?6Qo1*E027}12LQ)wIT;(qPWJ~NAz*qa`3d%fN#uoP@5{=pH#K4cZT
zEF&`SnA-6fd+EObZY4x5rqkwDYl9JUNE@!cDYW5QW34JAIvFg`TkRK6!&K=z-x%<n
zqFP&en;gE5$#XZjCS$RZA+>xrc1!e_K(Drj^{ML$m#a244aieD_ZsTN&#q5(={lkz
z^y<G;;>uJ@?ZCslr|QqDFMjtU;4!8QI!QLw^@G6h0tV*T7U*EYQwbWg#Cml8jShF<
z>v;9K&o%8TxvOwPWb<PxKQnG1kGnOxAD-7w61vWZ32ur-uP3av5u!Jjb37MvY(rCT
z2zd}PLFuhiO*H*tudZlUoo}B_5;W}k+LhID>T>$Ks<u8?Pz;0yGlze+d#rujoc4S*
z>F1CiquZwCO&&HY0Frw(5`B<?6&xQNkG)d7ZxlH8u+l}UaY66;IIm=vVmRHNeB?SA
zY5gBtSAURB07(9PwamAE4tQ7%WR=AqdS<LX@_cJhnJZnH{3AQALi?yp8L2{q)b;y=
z)X_p}P}8Qbd>u`jCMbVr_RuF=u<+p@LOLX{2QKebjC$oz7!rOwGKRGTBJHudLpCV%
zn)Zu8ubl++8vq@Q+WmLD4%F`54=7U%inqzrz0>ZCjX}S<UJTILn1E~bQ@GBD32uaN
z`VoB52em>ebHG^;Y$&IF|6)q{LiR=#UK?dIAz$ON&536#u43-hHxo1p$Ef;1E5(Rb
zHLw9})wM*026fDX962I>6#LsssHz(t2i~zSw8+*9rY}!jKl=d)cpmQfigii0$C1Nx
z`O-eKOT^F&e|nsg>e_-`Qryh+uy2l<@hL$G%}|V*aU6W0W_+beGe*7fX8a>f)pMyj
z-i*IpSJ{k3)^k-v>{&7vbr^5oG9kWP<pSc05#n>{6d~?D_^y=sGjD&x^gmXJuchnb
zh#x%&aYRD&7lV2FfB*Yn{3U4ER}jXvaf}rsj30*n=r?ZB61EGBR|Q7Q=*`P(I5QzI
zPU+$}3O}I&jTMK&z1F?zub6Bimg)P0Sms#2E{>!T3kP%N+m@FrD08NBsioM-Y6`k<
zEx-%wOha@w_6t3j(VkWH^B&4s&6>VT2@#<N3V;2c-p9%wD}#g*j*vDbyg^w)Z9NNZ
z&K6jm_1!#+iy0m#F<J!FI2_n0=qGV58ht8VkbjiPouoTtCtm6zZ!<$cXh6$y^zeF~
zsje^hoO;8EKN4i`b;#OOI`sCh)Gmf&5E+r}_DPV&ZzCLK>Z*!Wa<dZVxysm}><WUB
zA>nV(jD|5koG}o&9@tIeB!x9d*YQ*#%nvqZ5D0G3U+eS^0M~n{xK$m$WQowAA2)9g
zlR}t#kL-nt*;{$}Lb_6BywQMgiw_fQF9)Z_a%2e0R@m13EgSNKoAO6i!MR>TsR6<2
zaXwkI3RGp;Dp(>JtHyQj6chvDtO6ljtd~md(O_3VOeBsQOdL~PH%dz>1vhGyaljeu
zCK0_R)s7<KCs9Ufx$6UnnkPvazr@z?`=Ju()@Btql!EQNx38d0DO4ar3Duu{hZ0oO
z`8+yNU9Jp?ROcREPwBO{;Q`mKI^V7zTQ9iT8QL>u$1ayHfzLuUdg2M)bV9D#w?eD_
z;uuSDeT{-?qXwf;;Z1LWq+3*bPq~7Y2g8L$@3jgr?>&v2g@47j)$Xkly12U<M-gjH
z7GP@naganL#ywt9nMmfW@`5zRf7F^&_>QZ1#GuxcE4b2BlAkiqU2Q5!9{0x!M>0TC
zv-pxu(c_#{=bzP#tv9pukzvyKRyLd!zX>puxKxb;X>+9umpLtN{6WnoP<~<LduVYv
z*gG2~mQrmJv9fB@+hEnk`~qSd=vS<<@?<*IW=Un$cF1=jb~T}UR0(J$lm8%naF8KU
zR&A0+^|3vX0TZEasW!?guk9aFrPa%F8Axcat}ZN#$XBkVe#XbQ#;M!mY*%#*>^ldR
za_l>$0guDUL+QHvty`ySA7@FaT@4;Fw>`miK1y^3b=c%f4UD{TI#k!`6x#+BnV|DH
z_%PKu&!nujvA6#r$Lt@R$+9;L)c}yvsm@Tp<C|h{Gt}!NL%s7`W=e1dkLQf~-n9;f
zYv6ShvXE9}Q2as){-IN?lMlUxwjfn@VEy71nhj|juqJpnhxzY`Ace_3^fIT0&E<J-
z_wO11Z1qobdXS#=@00ZufV2X=1#s*`5&Le)kJT!_je_PIHg|lhH-$d&vbp1@Fx{Qv
z-0`}Ys_YwHxCi3#WmA9#flCbNZs6qbRM1v-#0?bwrt@z(gQ^lp!^43Q&Jd8v5fHyD
zkX8A#UsZeZ-fAFLL?G$}V#fdipZ@;1;@?TX=&K0!#N>{r`BUCZqlr^%CrgvA3mE)j
zcM`}z<hm&GHX@5ZL-Yfwi(fO{=$ruUm45GL(YHnP<=LjEBAP4!WLz4N=bNzBSD{mz
zs5AR+u{(vyZ#`H1r%Hoov*Yy1_)b>+fs4J@mKDU0(Be|avWt|9tlq$)Qrau~R!$3-
zG{4_xYw_LsapT-n=aO>q6(J9xBIkW`w^?WoOsoZdtLdey<Gu1WJoT&l%u`?f41C!m
zfyN(U{<kK%j0`oj)OfhG|C;0yMU?h3XAao5;&z|v-R_%kz@S9sYiaT4WYB<t!nkip
z{dsazu-$f_Q?T6^Y^NZwG6*b>AaC#EFmBc0V)3k-6rSv2r!Y2W9<30JS-ZZf{Ly_@
zGo(?PY`v4pgYa2H*aCl^yD%yneE8NU>WuC=D@0}Wu#nF1V!UC}Dg2tUNjI7e6y9TV
zJu<m?+M2mW8a;LjRi9}hnA$nAIt~#oWqYSy$<>C2+m&Fo0rf9e^CCL<h5oGPi>KiW
z%hbJWiO__H43)Gnum2JBQ4w-$pUyyS<L$)Qy4a;kV!`V3JbUNci}zfg$B;l_*WVx0
z*^lSV+mO;6%4j<hI_X0xcl1)a_uhEf{V6+VX5)D^C4CEhUaD$|`{N~^r<HKT6mi59
z9ZAsQR!Xi^t57DZ+&KxzaiZ^03KnLGEQ6hSKR2SApU^H+q`?D)>lH~$tlxmv?mT^i
z*E$h`-aGX*w!1;BPDS_I=d~>*J0ing$4q!l`p}MpwY59S%%{xV@4;`_kBjMoZ1e>=
zmp2gME;iZ={U+Y&Y^=8s^3>TlUcqcnXJcC0kIHV~EKB0|QM`IhWq5A}j9vOO&dT<#
zr}eQ>VBRi_0!#vxE!(rmipzbYI^)n^L5j70`f0P*9avFiJDb<rV!%xzZJPOl*wCZS
z0Z?Of1BKAj1pvaIW4GpQsFj{G8@p=G<i~$*DhEMJp8tJ5HQf~Fhkd^;hEASNf@t$J
znge3Logyr^en!_ZsDXG45iu?k6kjOc`xjFTWJG6~I!5m>vAo$Bp~}Q^3Z=>**JZnR
z-j9l89~m6C4s-=5lrB~_wRGNwdd#}r%q-|#@k?ibJoObr`fJ|<X^p168(f0)NTTpA
z;ntnJRH>kvQj?-~tPA9H%54t4HKZM>&M&B$p_5sYGV~%AvaY$D>F9jNU7-Q?xnjre
zp)%dXq7OnG14fM;D12^_A^7X>(iw@ztVs^@MIu~x@-7mD`FrUb^|S!E%iJ0VcYFsI
zcO>(7SO*XB&%aH>!^8?o>HzBGxq@$WtBcpZhpYV^zV^pO#;P0@!zk5x3#6*70&_3<
z$`abv9EZLFR{psTb}xQIC6*_Dxx#qt&>>CYd*kFvm0uPwKb!I;7A2D3QPPZG#mIJU
z09`r>xSw@!l{KfVg?QE@$?BHp`hQ&^-q($Ob<58|tU{I-Y2kl;wwq)6k@~Vv;(*dV
z+5FvsIO?j8Yv&wU2|i2}h0myq=iVb-#WzXZHW<@b3}|-dg~lX(7nm|F^p=O-+pd!@
z#$NSrJ@$C!og_8f$-h1K;@@7!^6xFr@o$_C#n^ic|Mt0>f8!sf&5zw+9H6aob)}Ql
zw<(jD)AH-?kjSpoRvRqEzKyiH@CUr!sMk8QI!o@UzNW{63Gy^wHyA6Laa3+_vhbs?
z(x7=-$M?s=f}>e+DBC#zS1klPd9+P#JyRO5nXsBROHW0#_=sGH$oPoaA;N|Za$Xi9
z+AT-?D6Q7UX+Ca&p8N!Qh6TEl`#}gMz1_)Cw>NPy+~mgGWQ^n%8I-d`mS*y%EiW6S
zE_2IIgc!frex*%Qv)!zSP$pa%cOvIn%Q|V(FxZv|Csk|1E5rXRXr8NC&Hvf<|1!HO
z2-P^BY7lxo#1>1x1Ob7<sCXH+QP^qv6teAeQASP50;*j(r&$Q*n?tNyTx;h|B+j?h
zTH-*au8CKnVek1i+q2l-?Y4KccW1`bn2Fb(Z_~nD&gZhN>*T6;Rb<9Sxf;kd+vl>a
z$K<jtE5I5T<w}$5GM~$43)+O1I{?gQ<;`fqMy3_`K-n6L1vAZ?PcMjzNNEY#b1r*}
z&t6}d{T`n^6SB{C*)u-7w)4lJf6ZslhU}NQ>{*{ZU73Bl&u+Mv?}PsRRp1Dl82d)Z
zT6&8*vd^a*H!Iz+vvgQypzs}^o}pu`GYy@xnRJCu&${$v?ly)%%3ZoZ5*9OLUs~um
zW`;OsMxtZSzQvKC9$V)HwJ4PezaQqI93d!b_RixJ19~$&?GI9O4N~q%*vPS(zlAX5
zIZ{h?i{s4h_ph;o&d#l~6?$@W|6h*-*X}1Cuq@|YC=%M4*xGk+D8a>GIOxNOY+fs9
z(RV|W^X^EgpfP3|X@KKsOdu0t9My<v3o%xgDxGFA2>DDkyU9;q{(xpugRBK?9o&nY
z%?O<|(@{L;D08z-V-=!{{p=#+g-fv+FHn4P;{}TEZA^Gb@y{Sc;Y%D+OmHaU1&5Th
zgO(WsD?+cYcB{9%s0+AyPSu&<u%~>a{|0E9@5G;oCtQxP4n&&=(H2Dq5E7;s2<Fme
zxO}P%Vw?l9vj<^vB6K4xBw#TRSr1}D8APK4ao-nRL)twSekT~fBy=$lu!&(&lscp#
z5JXcbr{16!&WEx~-5dZ$-a4gFmX}%-j@=7t3C#>j_Sp@^qP+xkZQ7WDfb^sKdSZxh
zat%8-L`wJv@Pm*U#<%V44lyB>dq_R_@;97w0zB+IqW>8tocQ?*&7LMn^#f=$_tvg=
zhVF~)^0bLcKu>daswJ!5XQ_9Enp7-^!70Td*O~}uJyNe}H<7belmF}UnfGnlV!pJT
zE$XBNX7!cf<c)gQ1?kGoOCP3K@oxZe>kAs?3m-HUBMAd3w(-2*ZGX63*jJlaTYkEX
zt~RlB=Ojf_iSa6@tAcFn!-3?Ph!&*L6Xn`aON8i-R7&%dr{gC+0TCZ4H0J{&@iLNJ
z0>EHod*N+&JBr2}8IR*~7BQQ^#S(mzAwPG)eVs(%SCqO^$mr?r7$+Fpef>c%E}{K?
zIqi0dK-Kp9ZWR<8933Gd0_>xL*1vAMjJ5YzU&xT#wAdpDvuBwE&wFl`xSjUrpbpIa
z2J|GQW*Bq0PTXDZUM))f&ME3HSKng;g(tg&V{CAGpBMOPQI^}4#Wj$rW_irNl|J!C
z80M2Kv5YJ+yq7s7S{cvGuk!w~U*k<x7x^JCHxw)9jAn#s?QR=08DC3_K=8&rj~r*%
zW^di?V<&e{r5+`9XR%{cUw5*0iL(yjsaB0ZlQjahQeT~Hy-E2e&U7aH=DjM>*mW>*
z%;h%Ck9^a_KR^0{dOr+8)H`U@&--*Yevxh_P}!>Zm``^-NqU=%7)x&x{L_588}`($
zC>^ypP&nA9w_Bf*4hip>#oS{c`Tm<s2QmhCC(kBqUX+dX^ltt(zjo)A(6adjwmLK!
zOLQ9PlX=&I0lU95se?NkXAw>vyr6N8J-Oi5p4T=mvFCM-%j|iREd-|yzRi|^QwO`1
zUuRY`L(r0negxA5>s(M?m}Y|6p0Hn}(=EF2o*_+h^kzNrz^Isd6i+%*8r{aUgZQsI
zIqOEu9$W^;S*l30&pgk&L1&-xHFa<DROReWzQYwrb>*qwj^ZQot%{`V)1MbpGu5Le
zy+5k=n)MQe@(zLIW@a5;$$SWfDP+}5IYz9xI{h{IxMkul0BSG6waGP#IM!v&;T-ja
z^2wW((4D+q4<v<(O@FPSix*-~Z3MI(bg>kKFJM4CK>e#qrMhftSz9y32EDowJYj}f
zj5-I2ZKeEH=wIPz8dFY$&Ekm-E^+F-4gW+yrjoDD0U4BU<6IgHc~bsFSqG!=bywV%
zp$T!=cTz@<&J@Q#WxL(MwDHO2M0KS*iTQ3Z&L#=+rs)H766!)2S#g?)u9uD~kNe1U
z9ej0<hADn>1ey^_csk(+EFO={!wL|wHe`gG%$jKEl?qfxKgjG3iVBn}=gSA@eG?41
zJM^5lp~l=Y9i!=JtF&Whc{2pQSOicxBTlSTXPDgy80Wh8178@3m$mKJ!Zqv6i<CQm
z#rXgLu42zmo$8YFHhz>dyN?dN`LIU3*`2)NOU}EK?%m+52-n#yPCP!ORND8l^o6h3
z8mU8U9J$1aB3o*C+eo#&j$NivRA%JF5gqbssgc~@=K^$=y5es1;?SdeG44@}vbAlh
zZpsM9#XIN|Gt2njVu_-&Ge3Z3SiY0)fcxC1o~{chq7QE-M#SHN0qiJDIWg2b?Dig?
z4$X6RU1UUWDspXBAW#~2ljv_zkQejPiQAi{Hhj`i{<}vT*f>!rMi@*6R?|kBC$<Jn
zd7wzfEz8DF_0yeI#Rb9gq2`lMUf(2_&pV(T|7|!I%^1n?#pE~Yrm9-#F;4X0*<f@b
zfXKtcw6r#nJ3#HLm5nq|=snMUnnZ2Mt9xA6?n6(P?81opVhxmBSXjrRFp%w=q4AfW
z514V6Uoq9dumaGK`obMR7xgupmY-mpx;%L_0DCvbndk+_V&i;Gw{;rF?d@NGz$<GD
z4K<~is$%Ed$MqPUvkL2SJL&C;RM$+l9~0C8fFDwDCMBqCU;(w&J`wZlb-CJZAwevA
zs;li*|N3@bi)jE9-@?Cz5&CObxzMK>g;AFaJ1OpY?z@lqXb;mC`Hh-@)^X?3*b4nQ
zn+&EuXNcU<L^c}N>4<1*nhjanEMV1x<d-y+KpoDqJNTmSQcu4OT+qPSKQaxZ4XLZ}
z*bVO6Oc@KoBQzmEP~o&1{wiKX2UBv<dp7?ReG*PRiw^2UgT7T=k?r4P13QxBC6buS
zHX~-*^Z`LqNH=tio!>UXUe;tr>YS{xBRW1|;8dVpDebDLr){%^r{~*7DS+uTQ26=h
z>|nK--N~1~kBNmC3A}ycJu`d$x~MQR;9PMvt9)7ertK+>Aryf+;5cc8Xv3s&-XChR
zUBAffnp!@3ew_`u+=f0$Gccu%P}**(+ec5&D^XXak05b`CDtmjzI(JK)sj?8Qf+H~
z)vDsi{4YQmA%7wJgKYjE+59GPf1)+NX5OD_yI#uGbsw2;=6h9g6ElJszV17UT8^Tc
zRU<66hS(ia%g2tMKh~^}^h!x=)Z0@(^U{{y23WaI!-><sC%@>s8fs4HPX742whvnk
zPWK*2E~xmC4q#*}i;b~jTs0v2pdF1eHiQ1*92>o7WV;tNigDuu=)dU?bg~#8ojmtB
z8(O4dG$bw)d+<|uNi4k7hl!4lnl?{?(YQjK4A~x6C}QDVm#SSpvdqO{;DkL~jWUL;
zX80U=-BQ&3a4M+CN@3aif5i?iC8Fsj2ILTFrbd)<oM;jNsSQzz`#jy@rjLjxV*dwX
zAAPY(ahbZI0Uxid6HT0V;*2XCL)N)5r_(MI)o3nagpnsWf}fyVIn73TZLu{5526`H
zR!2mT6@{ZAC>rb)YlFQ45+jz8qs%tgV@X->KLLxOG{15sx)B~?&rMu&o}vC{{X?lR
z))<;o#;}fY(Yy8b^+-B*a^3X&LSrykjh36W1s92VY-D$%l)m3Hp6FXoD+_JXZ18l0
zrm(nF{A~C~pCx)AG4090pRQSc@iJ$uqHk&&xw0H#1j`prcvS}zXtz)9!-kmORJosj
zF`pp=6WA$bV9q)a(9fMGN~9$+-(RSdL8bU6@b)$vog2_hCG%vGmEAY9LDdftb?O!q
z6k1s^Hf#c-K1K0ku~uG;@@W(AJJ<zB!N;|6KmQ7Q($F~b^`DW=HBo}@+PRZ!r@1@K
zY8hYrUW6``tS^01s55N!v+k*4^H$UCHV1eVvLa;8eZhC@BeFem^~gLxBK3LwG8ls#
z9MAy>Gegwy%z@L{^O6+SU?kw(Mm_Z$71@a|yP)*Pb03unzYZ1Pr|;T6g|y0C881yE
zGQ>5_mnExn?-AYP<Mk|JU1Xqx5mPeLDPC=Z!-EdE@KRt<gx-j-ahtyGw|-fu9x3E=
zjn61oLAl(FU?6eUsVB9jZr}aNZ)wJ)If7pq*@O}EjKAZMi9=@8Za#e=vr9S1Zd;p6
z6!OpK*Ug{Y_zV`ohNzB>3T^ZfEX&B%EK)o(uh6EGK`zF**<E|@TDW|R6;xd##wJSd
zci8Y!mnfYXz0~>-a4p*|iPGDml${bK<4sH1jqhxulo5%NE$Udxn8ZRQ7*;(_YB3t!
zNW4j-_%pKHAcVpj=C{=_**D^CwShw#mAdjsDIaTC-ETs}s4+Xrface67*37;^^7%M
zG6d}V=Lj{+$aYG%VB|79B_0j9`wS!E8MOTBGqh0^T~X8DGv;1m6aOD|?*kuKRp$Rs
z+6+xg+X+xGXoUc!gwoQe2q^@ZLI($IAt2QvAVskjWud}M`6H!)B$9Cm=DVVHb!A!g
zr}gjl>nao$+EB2m2pSNyATAMHnPDnM<WIyxzwgg;&b@OdnUvtVzwhtY7i8`|_nhZE
z=lOr0bMCphpRUjWmeJZh<=T~q)%4X2L@{%RKvm*Dv1S0+5%fz7D^aU?B+{4r<XaSi
z`WQigGG7$r@K9%g1Y-K_r7nRtif^_!?3BhViv1}a=F|<5<8^$0M)JBVq}PGrKDk|*
zTv4rcO6EXm@UBclMLE`Vgi2>`GZl9>Z<Nk9xGz;ICPyX1{u`|S>^?zh6|mdvnSoV~
zGHKsOo*J>D%&{!IZft(XJKu$6n03^<kJd>LO)U!+p2Y9mlNY5<fdtK(BORb~QxA-l
z=DX3X<EOSUv1z+*r(!jp{p8EL7TlNJ(;lO^2b5YpQ8Jh+nZ-ByDu5!%1zX+zr!NT%
z2mX)v#=#FV<{Of35#J^c?zID9Ey>i7$9YCFX3LCVlS0`r`&*x-ha9fn>|dMz=0HAq
zfbx4sI`EA4V>c;h<*Vtb^9PrMU%<?k`&=UaNa5Tc8~U%2uJ<t;%#N1-iD8^7*a3by
z?`L@lW_IN;Zp&8;W40g0cMz_T!}u6wRfjR%4Z~@Tq7mg0X6|z0QtW~$CKBn1I6l4-
z(3rTnV?>!db^IHbX-VXiwJW35na4wIJTxw^Pt)<4nsv|g3n#P04+Vv-`Y!gC6`Tu1
za+xA*aBHuLU&)77v!sg?6JH>j;ni?lD2o<hM+!S8>RTQbc7!VUw~ytCOUE3`C+TOm
zV>x#8SdM*@V>w2<&PR>KC<6=i&vdz{x8On|c;+bW8ZC3ond}F2X~iRB&TVv7F`$G|
zIWx!gr*{Olu=kiR;K4mArkyFTWA(6dSjUJ(u5qI4qa#=(?9R_79QP|NXfV>KA}OCB
zIh^B60<oxNq0bF)Qo5!u%r3qS+ZE9kQ*+{><dJBLdsow`@<&#Up#xI{K!Qg<2AXWN
z*&+wU8HdNLl10rYRdf*q>9u2l|BfD*Mas8XOZ7uYP{V%%mNtN&^JB#?c;3yo#F1y{
z=SCJfjvjM~6VWT7`uvHj{b%Pj_ZEvo2rvxgxSNF_&*Qmb!CcSdgT&N1_VI9C&7}?q
zp{8@h+W9qs_I*^HO!C_ILC4y$2DHUsu5d4s7~}jm4J0uYxFHY~t`tEiA8bPOn!y!F
z5R5aV{MZ4Q==v8%r~<si8-CNd!ZW;#3PgnDVvm3FVuU2%;7O`e&DIz7z<Pz6b3R>R
zbuac-_ubSf)@sHx9`yXzVkBS}k7p<~L(K3jf$W+%nOum`wX7;HM^+uts(%<`L~rpU
z0@^A@Ff=|K5Z1YVd=TQGuBwEXifD=kSoT=Jd*+CNN8->J#n6cSu2_lVcKEgFfXVxH
zq^F_<YY`DR9xI)QK<=_2s-RipAVMg1+Cxq32cw_jAr#?|`dx`H;x4jZv5sxqVA)kO
zK_TvuiJ2QydTweg^MODjPLM=+g__{`$zFyedBbrsm;R+ibBlT%&v#P%UtF7(MYUV0
zjfz62-RG=y+ResYzyuAPGXL?VP??XEG9T%cnZ2kAdh*FVA{HC^1{NEQYTKiC1u5mZ
zp<>UDSc62@hrH1a`;=q-w$3*5nwc&W5cZuINII+@$qtnLS1){@FNLIE8AvNKgdFzH
ziVO2>ik#?tH6W;X-<s%pj(b?r!cVN!%y3#*BqMIeZp2zo$nLLBwbec-COPd6Dq>JA
z!2^O$5{}Oij1FA6kEH2Dx7)YE)*u(RMV{Hq6h!B3H60JsGS4#=4ui_4KCo+7YmG~#
zEU-tyXP(<}uT~Q{0^8?%>+e#wyqq)p1iHZ3n@Wwwo^ltZYJC#Sx}!E%mMJayAuG<<
z&mv0$C{afj&B2Ayi-NQjKwB*aOest5IQRpK%3GxCt~*YklLpD;siO~G@=n2@rEl6y
zrHs3Ar9m$|B!j%&W%NhO#cCP+md>Si@R1m3hH!TjnmdLkuRfm67Ej3TUHQEA*vuh%
z5U=vUE2L5*Iy7ss*c}1Q1ZujPPFg#H&xx+9WGZ+js@xBDT&5=_ZkDffDnq(k3_X@J
zSR!R{UnafP?h4!X+N=~(lQlavH?(Ql?;{H=kFJo?PIPkO&DMFU+JvoX(?v5EXX>Jb
zi?eir8w0#Luqu{q!0Y*63%;&@8vFyJ>#V3xCm}4H{nD{xSy@;@-f_`rfVrrY7z+Ll
zf-=Pkiiw^ELc+3-Q?gkK<?TBON(+TiL1_sD<sbeYf--L`L75kHv&S0<%H-V($`*(x
zL7AMm`3~{N577i=UZU%3kunn$$}CNdpdceU%CkaHE{qDwcP<(&D3;=qpq!+x8o4-G
z7tQh`NnJ%Hg@S65((!Z<q>L1kWh305#Z_38`I_b(i4nEE>mN}+w)*4j+xvohH^Qu8
zR8Jf--92zI$fuayISXr9wuluq=Ul8~sli-u@pY}mRqN{5Y-Lx+j?vXKukOC9uh4<(
z>T~6;+>}xyIyXylmJ!xy&^5(865`Rh&<3PBt=Xjts4VEjV_KScg5O8gs9KDV54Q}~
zVsN}kI!t}h#va#g`goMp%Rfv|cyQPeZ}00`WL9UNN_0s~JvI9a1D|rb<3nCo;|VWn
z_6A&~pJku#2sbNNi^DYNYZ6_zzNxmu6IZViF348$9Az4oIn3T5(zeZ)K`X7X_(he@
z3tb!t#p*jAsPA?{SsVr@CmGra>8^gq6-=2ID|T}w$2>0_1{sGS3lSE&DCu1nxG2e9
z^D95IDbG*%ED1_9Uo#h<Zr~kNhvoDjK%$@dem;xQZJVxH&%7`=I*YdRf(h+PC{NCT
zq9Zw0t`fs=9@A)#vop$%Wf51FXzCUKf<UUJY_b2Fs%U%KptuR@5Q6$Yr-~I_E#uId
z-F5Xpq>5J({K~tSuDv-`eC$JSMio;;4eIFs1FCr8-=vC|w6ZGx<^2C)Ra}4W*s6F!
zacouGZwyu3?|()WfAj1pRcw+fqCkIh;`4hSbVIL__*}%x-ahYAJ@HvPI$2m-nN@qk
z#OD--gjsR3>S39<VO)zjs9+Kste^8huB)BNj}MZs^7U1mv|@Z&tYq%c*Jc-1)~%%(
zSQ@*puKULmtQDJL{9*i&R%S1_2N~C8T(z7bbej(C(|<1-4y^Rq#sjVL_^CF=^u<`P
zL^H{15fI~Ohh1_>6{iEz{HJa>l%afcWc23D=*>CNn+wAmHbg3UT840O^yccwP5bq_
z;h*6|$DfSeX#0uZROv^?{nq3JThVPm*rt-%s#6HSG%7#i$9;{T)Q+O5>|$C)=wJ@9
z@XcQsR~r<!g>85>@!{+2)kN*<AKknVHeX5eUhV7exE~Po84(OPma)uxgjGJ0c>zpa
z{8Zq|us8Ne27HyDS3DpJ3Le~Eeh>(mZ}QKTPb6pl$qnTvUP#{KI~54^dQ9ZLp8Las
z`w1O`5<Po`Lj&Pn$oOg3+@Km@DynfWFus~QM_e>6TLHHj<4a&xxDU;i5Ad5Y5}gWD
z1i8UN#DyD8vHpLvv&s<f>2=mX+Zb49VaG&rLib4%*xvH_HLUuR`8u?eaq04-&SCh~
zvZ24W2gFj41A4^IRZHkp?+zUxd~COq1yv++g#{#V?ev+)eW@kWdsWvh$`f$MrvuDn
z(2UwrEq%IZ$!{~%glL9xBCHMg)S7-!_u`Gj(n^>esXgWs&(k(z-4G8qAjU3c+;#TL
zySgVP?pRFT?2dac?tAD#eG81QWvsaOxe0zTKKH<i!?&#Hc(pds^%HQbfYRC+g#Ai*
zD4RB?MiuzH2%Felza&1@FI(iozAYwwH#2!lw&xxTYS^*dhMm>ehZ;2n;U|bApiQWR
z_UvzgcJIBvt<60YK(pAt4DH9%5H!pAO(=cTRrBOnv2I1j@ch-hUmu~76`m5TCTLT@
z=*J6I&m3Kt3_j~}o;o`cl4PKON!%OE9yDX|%f^YW6L`m7z-O#@xUhok(wr+QG*#jA
zx#w%EdJDvtT|;j(1cNLSAUpQ@N#7!!7DDJBT`KRK)kFig;V8+dEPv**Ajl5cHA;Fq
zXW7@nkgsLJylGSVS@+)95lfvNNNcv3cBk&~**@x|m4URn@AY*hU($u$)m`H2{^E`6
zjwdb8+g_{fv=4~UUwHLDcd_rQa*3@xSKW`Dl}xlgr9am?)YWLwQ!d&~Q@pmOxVIFE
z$<e3ep=y5|!$XY+5r(}yY{pg-HN#ymH%j?Q;ZtYYhANvPMZwcHDe@*s(%lR@LOA2^
zo*g1--&KF%a>(HLAU2`?t;c7~E1(|HEN^4pokR!`&L0k50vvj)QR!Mc?m1mkiZd_#
zR1NXSTE3>r&!?tesqJ0YR@vV5V<b34;t#*^NT_m6qN|$|p{)7p{qO86vZ3JL37j^y
zAr70@@u%>QZSGBuPjw7WPu%!HYP*d?8+hn;M1ehX>6&gb;_(Mp+mR1PIH}a}>-Juj
zCP!{M_(f<?HTRw9{4Zi9p;?6*%3ni`Gnn8NH<hd5ptT|2zdT?Lw+>J0(#EkWy$_Dn
zd*<NX_x#w)j)cOE%z7P}_2TKH5aC4wIbtxK8BRq<q<-Coj}b$(CIc*L<ZSx~{I~6r
zx0E|o>_L!_A?lS`p__o9zX*Hs0Ze~GNJbaHRB3eU$VUGdG!pWUYC@|n!X<;J!42*{
zpHZZjxW%yK;~Z??7Vn>aeewfrN;5;0VP{i(tJTXMGK%~E^yHY_e{M#I_DEgu+&>ev
ziuaYPF*?PKWukwR3RPumY@(mb5<(@>OIlkB*!VzjV<JAGyWV|W1NPCmV!L3$#7Say
zEGe4o<oB}`;A-7QzD7UIfP8$E&qkBBH+!`K`x{ch6PMV=FzYKV1JYJ}PTnDO6QEmv
z7bWF2o|_hvSon@AAupsyJ7=})@miI@;T|AjR@X4~!Hlf2ZDwoI>v-9xR`u9XV=>V)
zvUrqlb;TIKv$<sspAH~;3;GqhBTPHq)yJEgb!*JBdM^N4arG#$yI|9|7?iO1*y;Es
z?d#W&N^U=^%6FY1X!a&B-}ENQCDGzo4znh0Voo6Z10?pVay-%bmA&6co@(HIado*G
zJe2it`?JD1#yixXW4NOBu{g}JDzZ@Ddm*$F*hG7;O4vpwh3WBlEo~oT>S<KE`aD49
zoM9j#c#iNHHxQhr0l7(}E(5vR5iy^<T6r7`iV&>+!ZYlV39IR;GuqE1E?&J)Df#W+
z-&R?*Nc>E7<;=d897H`YB~wW~jKQrJh}%7(M{2*P?EC%%w|-i#2Ddb8``frR)p2W=
z)`c8<;a1Y?V|3O&ZbAp#`YBscLJH>EENd}tAOW}j6Ll&B>AhY|1Wkx((|qyF#L{>+
z|Ds5bzJg=hF#_YPa>%wnzjq9_eMyz8vTcxD*%)j)Au%S~Jc<ALkFf16<!Z349k!j}
z$<D1jc+%enQ|#u*z2?S@+>|hwQri>`rPRHAz*t&IztYOLfP^DNqBHpB8o{tzVr7-=
zT@YS9s4Q4HJ1{I8$7DhJ8Zhr5QMjyXpA=y5PkvHtJH>SaPFH<6$~K-lo^_liHmF69
z+w%>NEswsQX_#?=$?zF&GJKfoR#U;Bc_2_|q&8`OOz-jMgSc{CS)~-&Oz?XKd{b^~
zgpR*uM?sBC##|U_7TKVn(A9VG)jtGXyt`cY{|fsXz+_DJv%)@#{gnO9>_7O_ak2mE
z<yG0=nI41v*9MVmnf*<wTaEoc_dv#G{~oMFxmB)zB3l_S81}Q#WI}KYTgPPoha=6Z
zv;S+XFu5*{F4z5km;E|U7+K#RO#GOz^6k#bTYxer(Y2P~QV*s2gh4FGCc174?QKu5
z(yuP!F{N~`W|e*wLX>_Pl}Iu0u8tW{_D!^St^L`ff$g*`VHJ)*93h!`4m<e*aiT!9
z2qR*gwmphZSy8Bf!A2nI8HZe|<*{n1Z$r9ajKf+HZmlHxyKej~qV{d!DZ3HycRM6N
zYu))(1^jC%C*Vf^gELLV!?2sqoGsI%YVy3xw^?bswu0#L;6zu+GphVRxeswd%jwsd
z<!aoTOxwkq_QHlwE)2X*a7@W3xzME6ndM(Ba^q>l!k;jX(9XkSH@UfjMs}K?!s{e8
zBTnCZQeew{pIW?0?#TJ_jL}%K+L~SIUA6^T<|m5VMR#6LRxRXBE|r-|#y+SSG0zhT
z#+-hB!BoH>Fqf{}D{$0F%p>XpSExSOA7Cjdpo{F505oQ@wEt{`AMQbQewg5C=)CAZ
zV&Ko5Tsd$fdexeDR@MyI({^g4$u=XEQ`!`I;=-7*axUI+6@MR4=31{+hAQdUho3Xp
z0rNa{wI*=B9&qpCndr1o;mL{RrwV@l&e6>R@bw+Y8p%hK(7BFfDtn8z6t}6N)#!M-
zCin2Yza_?D*8Y@c?V8eEH_E_$<gtKOW0@^at9$+n<C9_$ErNi|p$igP>%s^BS1kX5
zU>8BG-Ul<9kL`h|I{RlvKYOL>5p-2I_^&<;AhRpJnqo6egRPO1uZMo_X_n}m$7~?d
zZ`5e-OSf3ZuHQkoJ;tu)ZTp8*?J0XN+F_Ruu-^1tH;FbCF8tvH)O3@t=fzU9qj9Du
zw7?2dL;6&@lVb@|G9VWTidF_Rc7o#8);FD?C>^)k1jP;@{yh^EJL&GtCn&Zak1?u}
zp!m><<4sT;{nJ2^M&tn#oqO6At*V~g^J6(7fAM$T_<F9&evFf=G!$3g3X}*}+ap{(
zcDG#JcI=zx>b^ADP1<QcxbXMn>TJXC&8D4(z@i#gyW#fu(oS<97=x>vNmtgNsM>p8
z+{`-yrH0<pe!ZoAdQ0`arD?sTDZQmhy`@?$jl2B4n<L6B&B+`qc;;Tu^=TTFw~jgC
z-OKTOHvM=^eCD|Pxn~D0(e))Se`6ZG_(N}O^tK0-NOYbywmf^I*UO4d@sM&g=Mxg0
zlPg6WkD2ItDKK<KheX%E`FqqL47tttj$yIW4>}4&<N9xw`w3xG58L1JlYqfv`9B}F
z-@~-5c!t5P2-{nIR{^o-`uj17y$(ZB3^rccdcfm=h7z4GjG)91{Qa1qmH^7cCNib@
zo*Gpj>k-?6vDyv{PvEHV`msLD%2DZKg4~$SyW~WRzAJLJmo(8d+KkMq?9Z3f%t9VV
z43=kh$GFcTQK*9XH62HwMbhYT1QQmZz1QEb#a1o4+NKZ|T_G9oX5|Kgh1RW|v;LF*
zb?pCB`n8k7biqGe_t_QKdW|^D-Msp1NY}%s%~T8AA7H&gCty9yeaGNmyWLf}<P~4C
zsi{zL)_BYJckbGB+i91(oilf_W&yb1vyb>uZTtTW-oN-we74)&5vz^I3O%RLzYgi5
zL8N%KFYcpQv|~C(gbx>7P0m({ms9`uzRR5{ui?9R*TtI}&*zVJhk?3wnhCorDcO8G
z^h?BI9_*;+nzM}KYH=EcO9nAB+4TCvIAi*G;iPwS78SXBTb6S5Htn)!{e{^)tAurW
z0P8M7>)56bKsMp^n`6v9Pw`x<Db3!zl1DDMng4H2o=qzzw)ppmi=VY{$M^W~lMc`f
z21uSQ(W%4Bg1$CA>AQIueC+A}<|#tJJ`4L-Y~;Sf-7`Wb9hFr5#5-vk46=__;UE_t
zr6;b<rq6mjZgM?kFAQ*aqp6|2d*^_>QC00u;MKe1Mdj5jT6^)_R_leabk%q}6(rl8
z?Wm~98XBk3g%I2<_aQ$<lgp<(HP@>!beQ+N&ZlMAa1JFz)|vrHXo#FGmLVmcT>*%X
zIuO}elIkFFc=6*Ar7MqWZQ^$JsV$;ronmhmwQg~G%IgiGDx`AvF3b%}q&{KhGjn*k
znl#1@=U<)(Ox_eXQ8_sxEoyx6$r3rw4(`vfdz)nU7nZ|YV#)m~2RAal>pGOTvduCI
z;9P5yIUs6WhMB254I9xm!{G*H8?^D4TA~zzY*BbEt;#*SHQ|sF<sse;5i5Y(ixj3p
zeGt72L93VzrMa66p}uYY4)b3K!ods?E&Ntky8otj_6bBjoO0T?cDhsoc3JlLz7@`V
z+cBiQlBUo=+s<-Pg}v=cx^V?gde4Z(%qFU0oZ0JQ7d(U0G-eBjN}GenEx|=n7wB=f
ze))&__^f^fR*s*~xdByelPY$nd^F{gbM&G!09B9Mz1?k-9Awhviri^__A;4!WAn$V
z+iW5#ezsy{9b#DX<>8q~pO=;BkJUdn@?Zw5UmdIBd4ApoCU3>|YcQOoWn)To&e1~#
zuu=m+B2}zCS54}DnUK<%ZME#1nvm$a$H!L7^l&AFX{WaSaoOpv*q`P;Lg2uzQmNoy
zr3>hHvlRfA)8z2+Jq|{GZ}<9_3a6-0&{POU?OZ}Ya9XKuuL@aJvf#CulTvKY*>dp`
z3vrcK!hhVgGYGdcGW_b9uV9G@%{BS>NoRA+T%S15>^Sg)_PZT+iLS?_u7O0j!%X-9
zI!HI`{dF+8D&2FFoqz8a((OR4tKMPpy{&9N7<BXN_gOc>(QR!5O)(nhY@X?TG)m_t
z=HovoSEK_Q4C^`Xwc0g(I(w{lbPenj!?oVedVS|Es3pQxr`F*v3wl=b7$Wo+Juu?D
z;Ye?$Du%goq<=bV_anVn@N*~EaZY2orW-0Bx@D{<M#lQ}Dpewb{pf29Holfh3RU8(
zxd_&cFP}fg`1beXYcWoGErtCptDDsEvV5$@i@)wdq1Pc>iLS>nw%S|Fqc>FO)q5dH
zW+#Fz=jD^IGTvxoc-#r}`S_h@vXk`s`(?-MOx|@S8Rdvmn?LRNCNpWKl4jD(W;Ic{
ztiPem>S9bQribaEU7Ie-b}jy1gbZe6rxtE`zhcGsu__Qns@S{pj2`}^(&aj?fFr`}
zX!s^OS&U}OH52xyi#a(x(!86EC@F<*DOtX>Dp_GeOot(fO-@UDlqPD4CAy}CwkWW}
z#aGSC%692kvud3`HqQjN>py~;)lA~|csSA$t`xYHp-|Xc+g79ztkTsgUP4Fla$C|I
z=|V}o2BGw(XwqLpQ<UfoW}2&@46lM<OsZPX#2sflwgY(jf-Q-T(?Lu7M5o%(P_7^B
zP=&25YyT=iHm_%Ht(p;Qt7gRheeNjLcE^gXtk91#DV%;hNOUGDlnvW801^)PNo^p_
zn36Tik}0}sQ)SjTOeDVemz}%32-cL|>CDu3ju=CY&k|f3kB}Fq)lqrbof`h~wNRbY
z=$=&WzA&cfxWBzhKw&y(3umT>Wv?$}P-l3}@KLQxq*45u>*F`0d$Lk%ZR_^6s4ESC
z!KVoC*||&FeQi*?_%Ymqn%IPni$=AjdM0$qNwrS0>@u;Ht=dm}*Pc}8jiVJ?CCdau
z7t3{_edE_S92yb8BOQx?Iqv1Fz;pf69LHb`gME(3@7sCdaAVw6qe2v`Kc0^Khb__?
z=`t@ObDQiFhelgFCE=35?KgY3Pfc5&dI7YsUz0@fn$mtav`g^zXD@Dw@%73}+)-Vd
zNrbJ%hI|bhl8?9WOm3u4%6sqAwd%LoLwnQ@vRQ*{4&$(CV-50$Jjlm?|K89Q;^3Nz
z*z_+S|Jlg$WSt(s5;w58!<JjqaoR4^d)3!Oql~@jA@IEeesrtLa9xn0b0jXYF@=G~
zb5PI%jZ@2&4LKwi=lemmNcSAo<uIK!x)Kfx8b53Y-kRF36m5EtyD+^mSu1@=B1Ye$
z){BZd2+)zveTe|N^8KSjB_a?;eL3lIPl4ZG_*ehb<klI3TMrvUrczO{h)~Z(Y0F0u
z?=b)c#CzBiZ^3CHvm(R`>GlKlZDC7&xuPSS3tQ%kaxOx9{?rguSOa6X+zau)aT0G3
zru=mF7(=?8{_^p!1Ia?0FLU8lp0zacBlrHcE<O1HZB0T(>eG`4YGfY30fShNpUjw_
zBv$8)tDqRsrdAUqH)F)WSJ?|3*HVAgYHjOYTV-4K6&?b{O~;E6jK`-5n~ojrc9<RJ
zn<&M<qLR){on^17sLuuofmujnG5uOFf=Zq!VQ-OnqgqR7)lg!@!CAGe?P#JuSu~2t
zLk1^EISpThfFQAlvJv>6w7nW;kz=DXXInQ9VtNYiwMyAT)hA=+aB34(2jRj=l2aT}
zEiaSTmlpWm$0o4ZeNSK)h`5cT+J1T>Z)l{$kJ^RrXXLgmW(0g2<R>e5Q)4DCXEbm=
zsD(Y{xmBY^*%BIOXoG*S=~TOZ`4@=|R4u8pvhGl_QYCm#y|`kNug~bh>R6EHXFg$!
z2i0zTk8PrFgYOMBS=O`T|3!(SzT;g|P+9)MowFqPatts56L!_Sg-iOAwWrR#YF>Y`
zZfWY2Q~Q%sDLZv5pVufps_5kQ_*?^>==ut`20qdCk1_%I_zkX$MCT3e{&L-;?pqF|
z8$!6yh%7Ak8(-opeMObTuxZDsL<o7E`keGAAD`tbW>gW~OIxl<)yA=3MfL5JCorCh
zTbN`RQn=|EL`g`#{b0Z%bIYykO+{b4hbtBd-$Yj;<<b<SJmu7R3t9WD6A7opioIf+
z0EO_saggiQw$qle`K&9>e)vsyyKsp%gP$5J9p)IlhZsGeQA8O1(M#toRkioU{EP=F
z<=ebJRIt)HOX7u4w)3NZ#qU}O5`0A`8tJbDF2=U&3Lm75ix(KZP!f*uh^>;qx2d;r
z4cH$uMhtG-Xd)i#_Cpvc6kfIIMbE)bk&>~u6}w=%-r$-kr-41vN&8f7(byAMLXw}#
zARyzXE|U5rx=xgs;OOc}wrh)@&mZvQP%l9GE?}bbE!-(9(ybB5{+W)K<gR$zhCZ6<
z?AmnABk7*0wv}ELgB|)xfgcExf!BJ#TG8m*&_mVxF(g$Q1lVR#lU_-VeqJZ6`wvam
z`_SgjGE{c^GLEGG8WFAf3vW9B!UP5<z&SKLrBl>km2a?04W4_uYp_a#)Kg-9dm9=}
z?Jqp&pPEV1n3HBPj1QaDqVTGzxaKUhWi$R>Mj08U5!uT`*HTS3M)v>lX#e?m9wwOs
zy@3lqAFs*opO3HR9-xVQ{F0!`M_d(45M^!uyM55{jQ<wXKF)Y5nFhw!#xhq{@a}9s
z>ZHa40}dOLhnMfLNs`QbI7#}nF)21W)}AM@fNCKoaL&Jl<%f2))hX`M;p5!B&63P_
zjHa_?n8B-plM`k-K08i2tS1>qgY!Ph-)po8A^0eX>ICzo1|-Tt15HQRC18<(u8(#z
z6m18gdV{`VDE;7nS#{P9V>r?i&Fyv!ADp;R+twH$FYMh`()(g)2g$vlx+L$T&`p6!
zt6tJP+QOcr^_pdEc6wN^_y}M$x7K&#((5>z83@ITDGaOR>+#}^oc~@cch0e}$vwbi
zw)&eW#0hXpi^JOLct>d*9iLOBV<FmNh#n+Fed6P5#mC`V*aJxyA;Jm>?=ml%b+EAK
zywb(9j#jX9P~wh9Y93fHu-3n`r8QndRn-n!!SIeQN(dt0Vj>a)48gE*>!8H#6=1&O
z!EhoJV06lZAeBzuNO`O%DcU@YVYS=B_RlE*ji0vALW|4{u20}PwC=Z@vUAsFh94`e
zZLsf9RInIVd}1tfgh>Ir$*PCGP^WqIDD&{2OzsT@3(QvZ>No*~stBJX5Z0XabL?S<
zKPI4{;)0yOkQn*86TKlsjRAHP;vK^WTzQ_8v5h-|cM=Pvf+mP!ue)=<Blq^^MCAS;
zgI}(1hAr}(LwzCo>+Xceap3X^hs%aPlySK|S?iD7c-<WpUqCF%MV2S8EIP~~6|Dt>
zphHE&5H<fkI>bB5R@b>e8&Ny%2#^pQG<d$#*(l)>H~t6)JA~Ii?+~65K(OihB}~EX
zm`L?rNAHu7W;?KZzI%0}g1vHLL?b6557gq_3}UjX6&l=&bajxO54;QrIPKhrRvXz}
zP#=^ulsHbI5~arxN<}^$I+_)^S*N<|G|Jl|0&-h0&WRnvjfoqzpWlu1wm$}pxlL`>
ztM&Sj{l!-xh>Gmt23>97;Utr#;uFz_8})Ew`Qbg$huFMDv--*pZ;L+Mria_g4?Cg{
zjTi&r!_vj7Y}jnq)pnlj;UwE$qOm7~dNNpUW81LpiPN5P8+*Udo(!ptj;r^25(*O}
z9gohP?!{(E<n)AhOFmK_zNRDPvlE*m_bdTRh{NYof`(!5RYloSXZ29Y=1mQD0U)ev
ztTmo-!lLU#5?wEPTFUaWk-?UO8pY^(7gB3yWns-*aFUd<<Yyl^^|`TM?kC?FyX{XS
zm+!1T9oFMuCTIvv<<EYh$WDNp5MX<V^t<gbP2H@P(E}e%;oU`bN1vfuqAS?Fwpk^6
zMzKzD%(dBfy|_#6>1(T7KNifn4VHpfYrQS-B)Vp~W5C9#55osVm7(s1>dJr@g?(cv
zLwtA2;2&032LJFj&m)t=P#OHg>dN2{s-_ICS*eOL_%>CP!9RIpWzbO{NRK~_N%6G_
zpA)6I5~X+U>qH5TiMNEVUYK$-#t^1vwcz8W)&fi2U-$}uw2YFQSXq8#P=0cqj&2MZ
zm|?Et+(C&9g;;r(XFKk1B<=Ht$~!zMGpS>EW@hga`+A%%PItN*Iv752Xb0oJj+Gs+
z@2diK>Ikq?M}v(Xa%1Cg-pbRG(Lo*)cq7w?E#bwGSL9AIWUX{E;e-)_(%?8a-elGJ
zh$0WA0p0ow-{rmcpmer|Zx9aVkcFVM$+5Ag&7U>z5>hXzkB-U%t?md8RLW&$Ia?}U
zi^DruASf}!`HlG<23uS?2`vjThRK`l9TfQ{b{<n&Ol%r)h=`I^broMxR}*Rxfa(gT
zX&EAO-b^d@0}&gyuCde|eS0WEXS%H58=KV3toTN+hs_w|131b&V~Gq>d%T<N&mL$7
zOEYQ!<1E#>bp9-8*2XVzu!c4QLR}lI3LIl11qX<+k$W&@7U>JPak<O>c-PTQpyQmc
zji$pLI}FNL(8$s2WHP0QR@-1JeXk3@(8&=(h7Es=A5+w!Zc1@o0ZN49s>z24!_zW{
zcMQ*xUhJ9Kt7Jhflx6$h{Un6##hH4)M&M3J4)4zF^>Cc4!90h6{o%~nFZkZgxEo$g
zffET3RY7fpN``n4-4xWmAe=4y-D#6CclPd3#4QY|8U+><5AUt9%*edO`QIVfYgTe6
zQQ$5XU0hus)%Zf&eY`8?KK~*>t$S96ZtN5KjI6=V`|SJF$uZc{Xgmz~V-rViY%<C3
zQF<z$&!kd6Hj#8uD&jX;M5xZF(FDetbPUf<-1xu3$gbhfa%NlOCmq!kbDIdn#5>4F
z$P%@Z8d^Bzu$cDLE~kx%0GH$YQ+sQCHcwnpgs34it*=8x)Y+K>O2=DMh&lnI4P=}D
z=HlDl#V!Y%O~BCbSx}cKL3NMnEj|MYw#I)n`7n^|kAHzy`nNTn*H!UBu7frPKfa1`
zaPOi4?-JGJ;}@u-TF`G+=fy9LYH@;V@xHLdyowe9_yDESxnh%}n3EvU%Vs4~k=B{n
zqYHIVu{2*TH3^snB8N(K5!J;`=CKO4>hy(Guk9*LF7Ih~otZdkA>+g<3mN+Z+a4u4
zf5BLsbCskN9-HQzYonkvMx5(hJ*XC`{X!2^S<~!ec~c7v&tq3&e9k*r`{^%y=EpmC
z<xVCHRiP-@U%1kWFjKDRD2gt!qJ!mht!w1OobG$gt4KzjI>VM<zC%kKnI@fD-@41a
zsZN{Z9D=|`dmF1!pK7Iz%#`D8Bff+W4(0fm*`irHq?EXSt~!R}8RoNx*y<>Xiu+|A
zwaZuBsV;WLEAv2+lk{At$wua7c0`}PcrG2&F*W?usds)Yj8-|TJcgIwpHXKw48DOu
z3bFlES(~^^A6Lp_hNV1aDCMyqlX^ibeZm9+|Az9q1DLs1kZRe}`Xil$#4kOV9K(Vw
zm+zxdItalTiiZaf@KH3Z^DSCk3%4A6z3oPXX71d;vPB$L<6%T}MBEdUCm}>dK;$2=
zVeY<-qKD{IM~&J7uZZtb*2#TnW@_O#+_N<nGDy*wtGBlw#L-b5_t&Y7pw=2u+g@Y^
zLWJt|7Y&2{qOtKM_o!*Pzi3|PFIr+RyGO|uE()Kl=zDTO-^>j<77l$3^Zq*eW*Lj=
z5q(e14Ut^3D3-{O-UH!cwL*;H1vg`Jf6~HLjR1f%M1ItF8~1$iv`^w)pZggse}2cS
zk*_mVcEWtW&PM0}`v_PijVj?6vt_9&^}*+O^hL{&9rTRu;4i@#Sao}IeX!@5J~WuA
z<slp~vWJEoJ*0Cph&_A{k!GY6Y~U}IUUiwK1mAiLPW5xI68P;s#61>R`Apr*3{_G`
z>T_yt3tNe7#gM!D1zT2UgC|5<Qz6D&q<L<R57Dt3ddt1f9auB)@URu@B)yLeSZ#rK
z#-(nGOqU{hca~_-v-==he{u$?7?-;%T_M2M90SL-Ln56=hdpX&(>B>=RujxDpKHKJ
z;hk&q_y@nqI>v#`R83z-v?qQdf8<+&T-|1@N38IpTG?j{Y_b2=tPauBGlAfGDwn~v
z6HQmHDz4noH?Rj58q;nD9y+!WMevEhpkD)PG~-y0xU=<j`Q!|<4l8<>rgQ%Vj)bsl
z3h7*SFgMVhdNOf)>d9BOb8cKNp1EvJtbNUsyc;Xn!O5?=_}P@_<Jaw)t+fZw>R!We
z>0mma0+!kT%b4;3<&?Qv<cy!FA1vQTxqg?f(WIA-QjOGbx?|07EJLJ_!agM@D}Wf(
z=gOHJ@Q{k@=WDUb!nMH~9LVIY@t2PvZYkAojsJm*SZUJM`0sS#_F}s|ia)u}kFe23
zn2-MlHRKn)K}G^o1sp(k>UDR;H<Yyzv^&L?@6_wv@y}5ouhqlPv8i2|B&EB$<JSpF
zK7OhFD7cS*#4Z_%jr+<YY}}{2YVXmHfn`ZSeDYZJr-r!^_<7V|O!0KbM~6wm#1Dwv
zGn+^apC61voPr)%G<7LdUNX2im)f3>zxbMQV$#O_0a)V1)%YWG+(4(MH?m%-f9<6M
z)A=>q)A=Q^h{kz<0Qyw7|NmnLhIrW&zT6AnQLlhbR1?osfllI4P?s1~uSUO(LJe`x
zEyW`Qs4u7hPFUek%u}Zl!x@bc4BMc?cIYsWTlyfd`XIx`#knOL^6}zMFO(uhaT|XC
zxe>hj@>I=d2N?8rKj?cwFP%#bA$>!!ME4g}xns?SSfcYLYZt%iaD9|IIfuz!7FA1a
z2pmT~HB`C`LVSV><X^Ep@#Vg*JO%1gGXUh_bpH6Xs`M;@G)w6_3j;!;-z4eJ?>pOo
zWT_!pfA}u?2Ce?Wee?8q=>{`!sUase7D*K9kT5S4?9XZv63GTlq2u>{Vor?xmACYr
z&wB-uepfB}x0(z=JW-~=*V6`@Q9R^E_LG0@ej&_v=jG1?*%x)}s1HHr<4F*}X@dBW
z2ITGO>n}NvS)q|-NjA~3(OWy$=$DwwsKU^Xgf%<Vo!SZLA<^i=yI$HA!gOdD75fWK
zv6uZ5H0sMp85*`Xm$xFjTvp`S-9Y#<>>7Y(3o?VhvmT(T4E97xHXX`i=x3GvA{kAI
z%^0lI?`npzm$obZ&*{U7qPFv*&=mO;Sn-8E4m=%cY0=;92(Hmwyh|UK8ccNl40_W8
zovB}m5B8AoOEPs_YI~L)%BkTzJD0xsa4lTU5)K+>1K#jFayadeOARZ>o7xWIz#^!h
zQ@U1H4yr~YA;f%0ZmH0poP*V1r8ua9aAS*7L(Fj)Etp+F-Xg^;7qIc=7te{cY{@(o
zJmd8nYY4j?z-Yhrp04AMa)V7!n0~W^HvEn?1yt=(jk#mZAeTRJm)p72S&G0N#2d7j
zH;~a67TfUxxh>2TbgftNQiafCv|(jCyIf1Fcb^_hOfH5nG(@&1JM^q+g|qqszC%?{
z5DoJ>$0-GeWZfNz*(&d8W717|M;|@A1kY)8>0Fvxr`7XI=~-~Dt--ChGzFZ$euufo
z+?sWazBjk@CV1bzIA<R=TAX8xhf-=OGEMpdPpU87pE5m%+<*GmoLDZ!QcddXM2+z$
zxII+9ILBA|9!T7=^cx*d$0k3pBDeG#Is>^car*%BxV~dBHW?vazcux(cACD*ggNyZ
z|L=<BQ#WzK2^!A1(W!5BY{U0`3$6GzVJQ?o#ue662tFI-Dw(Ko(b2~nAE}Kx<k{{x
zC^@x}%C8xO*V6eeH-;osNDY+g6L+LuW%YSQF7;}<;~xf~i?5&=rd>*V(uvLbG;pmq
zn8&3Ct{}U=q?b+xqI++4U_L<Q+sH{n%*3D}WIAKXGPw?6t~h>I?7DJ68`*`_tL)@o
z%XjHC;98BXBh^>0RF!X4u2c(+c*`%v!g)Rgvr^kk6}HI@Z__IQP%fcsD1xgN%?8Vl
zbb_P$m|*l<y3N6OIDPoN`i|Pe!|93eR*UlRxHMP8^e~Az=yaQoOytm%kqv8TC9+RU
zwWqmG+`bfPSwfkksk4^HlJ2$B4s^JY{<Rlxj++vZolbon08kz|b#3wzY=4Q^D{R^I
za9EN=hLLh>l5R-%EWM5E?VF|m)ha4p>PT&$(!S<(boEm9P;1<#rxGoeW7Qcg^Gh|z
z?ZJy+yB_u}>x<@WN6}wzfCfziM1f?NBL$|XRZQu{J{x!kyIj@2TWAfjfK3k5eqy0=
z2h!uzcFx*d`f9L@Z$Mn#Td5n4N-MLUq@^TcuoNBNAf?+Yngf)NT^nQ>Fefv62xzw7
zf!5nJqtVDO9jt((bb)nPsOYd@9m+XJSW&PJMUTSh4lRlf_))d__6ZKL?*Y~fM3V8o
zQz$OZBMbSZO~_lbI(C8G!d(~_h0MG`mfG&xW@uY(@%gLFq%CQ$(nvxq;R0A{$TdDT
z=$P0e(dnW#F9$tKu`VM>>>AanM^9%zyp*=rBH7fhi%`hb|FzPX)YtQ9eXgnBII8~l
zE$!*W(8z$2KF4>=2S#YeMgssgAxm6`s{nv)J^eu0)<mZk)kBGb!ig?-IDu*QPz6j8
zr{}8I(>**xz6ClWnr}12D(Ev*Av&&mw>DqKALsVXgJUs^p5p&>A%0~G=<KY4mx`wX
zlBnm`=y|7lrl)ex+2zG=YLLzrd5kOIzbAyh;BSDh_X7hoLa=vTOVTIU9cV--9okzu
zxVLm*Z)s+4Y5y^g2l24rwue>C<cU(5=CBG}CTg0vv@a-eA&tG}V^A!bIyiXhOdORJ
z*1KLHay^Sd2G`Frr=&Mdf^7V24@1@ELBt%H3@HX*oY((Sk0pbVIZ&8C(uF0dnAJ2Y
zuLjrFfVAxgT2rqirh=FoS-A`Py1$*i))RN!M%1;Az@v9jE_D-~wG(Cx2(5HJ{+SCD
zW^5o<_@Tm#E4Zx)Gj0#UjN2n&#zr4zY}}f<vwLgmbpS1G$}hPI%CC1$Y4xEoM4uyg
z!r4UeZaF3M<IE&e4Fsk2gc)X|+)aK7Z@kF`W<j>Ua8D!k@kUzrk369ZJ^dH|)U1{!
zE`<20J3F?ub*Jvs@b+YQsNhfE=2Y-{yG^}rQHu=NKoH^#_z-8nLLA-6OAiFrFna=(
zw-F1sXOCi(?cBj5zD5TQr@w5`3HYVfhha%QxcJP-1I|B!6>-&_rK3Zbb3>R&R3*$;
zUow~;LN^eCRyx-iOmY%ap)nwP<l@G`l1$lv#R<Mdazt5^pHy0MtDcjbM??yT(E-&4
zi4=awFA5<e*+d-de_=roBdAz<qS=CKT7a;D>q0a@AQ6=+5Fn7N?|d7sG(=x+rP;Za
zCEFM_WK@7H%*?GQ5Z;D|D7dyyWBVd4G-CQ)3gIhS$fpP&Ajzkw*YD8MdNrT&c{ndP
z9$)dk5Ve_TtQuXd?!a8(pR1b>eM%wfQ+)l!4!tHL2_C%cAcRfO+ko{(Rme!3MS98g
zwiiW6=e+%$bk1@P;!X>s%t74luog>YZp$z=Qs*EBq7K5tz1um6U;qP(uP3U-($}ku
zSxbT-=*ECN-!M~70<Rm-oa>#$YjP6u!vRS3E+_F?)Ja(H*$a#A&|nk90P7I=p&{_M
z{0+bpozF)3=#d`fB0L#v5^1J}tt(|yqZy4eHM!J!ZJ1MdBXeTOyPMxCE^!-DWQ%+1
z!}vF07HQ`tfXtD$6y%q#PxoA-uRH7XIdiPL-q48&M4iKClr~C?GAB55TJP&HG=^tO
zc>zylD+cYc^Jjxt4~A#XjOt4mte#s6s!1ko2}eL1?A^GqByMFpZUq6f2@5ms<m8T_
zb{83Hjy%~!wx2|TW7;+|E0z~RPeXgM&8z{k2_{3}#j^_CrkMy(*>3mPUB9DGUHbVp
z2zFPUaM!1ET`LJxFJdw8Q0D(){4n2`>B;ul{QEAwQ4$_Sv^d|Rs22C!PC~C6ZMqwp
z^@8!bbdNl&^SuwvGB|LYRN~dj7i=iHx1<rO9)%VL#tpLYTaK2dO4)HJ^j?HhhbK$A
z^GolhS52)Kn}cw@E$&H?@zgq&^ZWN`4C;PK4rXweEZ)C#Vl^0G9$>6hI7Y|tEOrQC
z2*3wy<ImFJ=t)u=pO0kP8iVi!(!wr$j3w}oaPCGqsjN6jc6r;Ku9N=4tz=tACf<S=
zMZ3nzDd#f4^8hlmX@l1Pa{Vs#Imp-3A<=R6q&NCxt9x<~qB87-c_^As%``GvnpUL#
zJO*Kc1~!%hCDO{>BV|LDBA={7Qs5;2^KvF%o{)qW-d_?Mlp9#HEvBF+oQdn3*VNv|
z(*bLxIes{g7~pj+GH^8#C7@v}q>??Rk^>mo4GUd12+mwP+k}gR%$kj)tZ$?pm%TC0
z%89ngr@9f-UWkTI#n+!hTzMNM5~}UcM<PB*Zy=+TloQ-7I?aK!j)R@MR6@0JIz8~O
zJ-r~cF|)55Lw_O9>9AaHEWJ|)@fA7mXP1y?eEo&X^sJ&?mKD(;p#^x@6BVorc0>d#
zi5wJQ!61T#aUmFnp18=u49ibp$KyZeQc+u!zVCPRWoUJv!N|-~@*9iT8J;RZSM@P2
znJ22T8vwu~_xicL?6ue$nNZMdYxE%9uQ#wRscKL9lg*-_t|`UJ$aD$&U{X+A=N`WS
z_AX{p3;+_-g~YwCXU14zFLyTz>zm|$(6=oLZ9^)M1chQI6$QUO@-zYwYG`u>XRy+k
z`xdQ^$8V?y7f}P$R*8Ju%kp{+0XQ->j7$y3uEqnVhD#r$D@dt1Q;Mzz?mX?7(_(k^
zX~O{G^Ji@y3|nZ`g?jd6Kh9t-?Vq2vH~p#D&g-?I7m|+u!=tgy5x6|5js$z)FvDgD
zY=$aX@V|@&@s6|Rn2F%Ds??LYEw4O6OYQDDNKh=gRu)_jCwsUIL^4&Lf2#?F78R@G
z@)N~<?x9I%`N1Q*cV=!uuE3`@ZB@cXvWFXqqiZ(G(4$e2yU%pPnE3M2-_heR8N=Uo
z3r((A$oyTf{yBPPiWSafUlh@XDwlXx!T$B3ZOq3PB7m@I13=e%d$>{8PAUd?A8oox
zDAvn+y5@sT3D#NYBW@gMUMr9dIm+SUuZ<7n8+)<>z0OHe=tF*~J*}Z|xF+kZ$&%aD
z`&};UBXuaeP$5W8^wuKjz)o$riwO_-Tg9JLsrY_DGr5a@z=<1oT8e{;OE;qR$T?Qj
zqAX0gX+7(EW({Px+L}zrb8XH1!m+j%GvTA<)9hTRO)PtBq2m;IIGBLIc&lUc(+--(
zC3S2P=WsrQO<+_cg)ObMIUc>(aNf%!(MUU%P0tFn^(q+>vPb)&143R!3><G$f5)W?
zem%c%*fe8TS*7aDMN5X<il{!urX?y{MY6(R=~K2~7_Z2u%?n4cB??3@aCQA6<;*j*
zNSQq?D0DkI<8g}pnL7p;T3c@;)(NC=@yAa$5Y>En$ByN>;qKITsr4y@kYNr1Xh<^g
z4nz)jxVnAKcVpSNx`5&YHeCeI_j1qA!TD}bnPw0G=r6nyrPtM(K_CnLg$~Yu)`36M
z4pv9Lk>|tS;)AbuuIfb=!&nPztFWiu(_xqjvCKjI48}4X?zLthmf43N!iff84M-x9
ziRkL=b(@7_VFH*h%Ew=yB2ihh%`AG)(w%`t*NfxB@4Y<6iGSX>H#KTxkVUres-qk&
z9^&+4xV2wCwbNFKWLbg;pv10`HQQsE$$5cgc@Z`QtI~`oSuq|P$8;Jnj!D)|pfm&K
zUwbL-kX{0bT*qhAapLyj{Iuh30A*K1Y_jmqAuwOKQTU7KHI0TjqL&J!^ZFe+lQNyV
zr^Rf_kDB?(eSWUp^fdCrT3Z7@BZImA)NL{T5uV73=(pSduCw3j6M=Mx^+USg7B$Lu
zsaKbGPjp_dqK<onfnJa85)vJQ?F1|z4{o$ZGA+2#(n1>zgk>zl3o!Qx(O5<sa9`Nd
zqMl^OJ%SR;91}FEq0!rd8?Au7-H~w`-wTC*(R`a7s&l=82SjXjG;G?c^^l<J!vlE2
zXl8IjPl{DEUFBbU@pD``=JgUCY)x$@Qxcy6p2*UAF86nrXwNj0#U3T8j31s(;^1>L
z=$BPZ1mm_?<|2ptnViB5?u75D+ccH5EQs$u5S-!+VQiBqO<IBAY~Gg{H=<5g7C3ji
zNBxC%>2@x)4%a<`wVtHeJ=6VNMtVjUjF~A|R*Y~giE=9YK|@&-3Dlx^y-VVpg5ZMw
zzU^x^TWArYd?8m@VklC9^6f)rfqOx<w|Knjh#1+^iPYCG&YQF{Qxpn$C&-ml>{-+2
z(!b2(<n-ub4JOG&@?Yc|R1CYfgxOu%&J0pu7P;X8RI&+EOjkrhYk95q?#jjM^?@qT
zO)P^BzUn(DPjQ$Z^l~az7+C5)(RHDV%YfQn_z@drSqAA^qO$(3q$FB+_k3QLPzOX1
zA;-`g^-;yHzN=>;HTD>pWZl(W18mBFstJ^v2($>_G9O_O-HUsA)My-JWV9Ogy0M0h
z*$e{HcMZ~|h<e8O!H=e61mK_a-FE=O_}<u6jb%b0Dj^{r)Kpx(PH}V0x7wcSkPZ{r
zc`G`==ZZ<yl&2z-s^+L^&TU(i+tQtSw3~3nZ$V4v<JU|=gQ4+p#I}#RAfy?%gPPll
zONDEmR7VPBCQx2*jwpL<SpZ7B4Ws(~g`fTUB~W$~0&@~UZ9Kqa0h0&NQV-<>D8U{J
zo3q7h-s86qSszXq-u}c(IEST=A|nJl3gs=(dFm~GgQttC{CB41`<RI4lZ}u~)rrP5
z^GfZIj<`&fPxXBkY_u?^<Hk!%RW-CbQ!xR^9*s$)6EtIt$c;bGUV`UW9GBX0U7cO!
zQageUMu7e)YvtCzTxRy`D>_m;FqA2lgZ1u8YMWAT?%wV0fm|*{w+(v8)w3~R=?<-2
z>)Nu*jKZ}Lg!tnri<L50l%Wjxs`YHESh9nomDpGDxHci#M9~BJso$T(hKLr`2cZxV
zo6-iTQQr^&Wrw1BYUr`IHQ3n_+5FWXzji{Cv9~|I+F#}4E4gw4)xx_N+^|9W-a*bv
z?KOYyBE`*0<P=`l-g_x}K7O=X=`hTBT;$`27!Vv?qDy<E^6~wmfD|4umSN5QbL_{_
zBtFM}98LFgr$J37W4Y7N^E5JXS`)ub{373JG~+bLkZj>C>|{RPR}-QachN?CL9P1#
zCJzjqTe-k7U(1gqM@y{vc&^;6a#TuO6`I_r5}glN<?{ki@8hDV1b;rB-YtM<_YKK%
zV9<C!F7omEXuH1~74C|SqQbi-s=I&Xfl*-{7g(*KSmrv;CMj3%>Genq{kK{1?lRPX
z6}Oux%nXp&M@Z!3>nN4g`3qCSaC+5-#oNeib;DhKcvg$zHxD8ug-0I4Huc9ZqmkKl
zEoHk*-UfcR<>Novb(j(>WLPb|;7v`2_n=i4&Ie+eGv?!O15Vg!l7cD1M(GM=2je^8
zkDnZG%f~-h74-fiLH|F*RTdF>vzA+PKO+H6O+N`C`cvEGIXl+eAIrQepSs@#mxtSx
zBFiaur66u!c(gIbt0u}sTNu8+GBnX}thQ~b2I2RDaEbFz;-?97Z*lwx3bHh5%XaXC
zikUf!Y~soVwxy#`Z^=!$0IDV%bkN@6wg)Phi!H#iCQdQiJfIC?ykf-c28XXyp<k4S
zHRf<oWaSyO!BCg$xg6lqXjC>sZD4(qL_%GRoW8Z_n})%3w>*8jpAR?bJkV($QNzmV
z+xrxs`RUs~Q|~8!KP{3q3_pf=MmEKVsYZ8|$X%2gx#D>eY{^7-Y{7xBEd7X`#`ww;
zkS4O1b|jQZ8(DwSPJ69fvuIb|``s9NaqqTE=g|*oxVAkwPh?X0D7`xDtB%ssDa+qJ
z(Wc4DeiTaY(O)CO?%R>n_P*Kb+p^e4&?9EfJ%9)%T_S|g_x{1YZWiDxXN(bMKdqm6
z^PLJfpbeR@vA^&i+%jV#W8ja53IwDEk9&VznXOprHQTjuk(Oomtkw1XRU%k730ClK
zfI@eZjN%O<p!eV=6xKCl(EdHh7K@RN>u^iG+slKPVr#7=LayBITWjZ|A4m1p%%S-#
zvzk1kCXxzZ6G`oQWqW8HnnU)5TYnMbGJ*GVX`2GdT8IT>_*adA1vJ}vXIOiIt7Du9
zu4Q4}Oi3a*X`_~O5FP>=3C|#m1Ub#x&#0&@`Zc)D`wR2w+3`ZMQIZA@(_X}5H<@$(
zM~H1((nn}zMN~($MHAw|ngKt=KpdP-r1Se8eY`@sM_zg49Rr891JCoUtTh@$MFJ<-
zhwXw2dd$k`4CQ0TpZ@-ZXC=CHhLH-8d2)a8$6B=&InjAmSZvhUKu?LT<AXwrxZ>ZU
zF1e*dr#sCI7>tZ_;HM-$y-!$EV|6?+qjj$hGBj(n{_L}kF2Z0pT6Ywk@u`=~Jg#Hb
zwC9e(0Ke%o;{Z+*Xd;tZiQR%NSDx;=^AaK!zgs0zk&E#u5f!mLB#a?BxwG$T$4V-F
zhDxY-1xHZEdasO9>3UOXvBkW<@?Z{|<5ELcdcFIljRMKAzRh^dM#7jIYu}{NU5P?T
zW|h|K91TW6Z66JF03Qrg*|wn)^FG10*!Z4fU2LrUV#w#!t-;;ydAyca@++_`{sZ>K
zOiF|po)+E{*wQrDHrN5D$QXW>JZvXEPx=enjk*~v4+I9(-qK>Z%aH;5t`OD;7r^>M
zz!F9uD;=)3X7L;>jeNMo3vU%|&IjGHN|Mbda!?;-y(6iT`23c9>P5@(@vg`_SR=HV
zgkRKA8oFFZm%fgyNEuFJxelrv)L{`gQiohh&{uQ0PKAtxZ$~Ugx;83m1LO6?I=2C7
zqokChk?fT$?R$<al}|v&ywIKKba(@`Ti63nHRX`FWNdEs;VbTE6_t%4yl@PgJ#4`N
zG_rlp^lW@gxMHN#?MjGlNI!SL7NI@NEhd|S*Iziqwb~{`b-$0hAFw5!lS-tOQron_
zd_dE|ZRjMF-`ic*^D{sRZ&y4%s^mPAK&_qGDzbdj00J{;5VvdlFPo0#eB6FxghJN>
z$plW8FY~L>MSgcj#cOFUGrb))0AEWR?(Hgwvrzy%abD1Y7tSqG#1~s!nqpA>IXRAa
zYsI2x8=`|YbRjzEhQ6P_bUYjIs6JM;)KmLAqBg^=F=D8<g2A>u&;x>v*RqZJA_CWr
zu4N*ODDp)305Aa|U9`A&iC8!kW%`Pr*`B<^QS820hNWn&u1Fz+*d@1x`#y!H2wCv9
z<n96hv5*f*`bDi$l1$WqOL7Qw*0k2A>z6wd>Qw#^`lh1#Hc|a}bXhEWr-{lK{Td6|
zM-cS6!1ssc$!a)^zQ1ru)V`=QiCfUwYtf|;zfs0@CJ)gNdWalj@Lob8jm<v>E9W16
zTg+g8jOa2(ALf%>;upQp;_qOdwPn7Prb~-DA||S`iWJIKDMP_RMWNJHse*yh;S6-t
zz~3Pa|2UG5fwyeVJuz8q1#;j68p_dWa%51a?FwwI?PKH&S$oU+Xbe$}PY0kSc-Uz6
zSce%=nFvjlp)+l*fu*><Azz}R9=Vt@gVrlOYVJa7LiL9Df-P4F1ob3V_34dlwAH`%
z5}vPIY?n)5x9o^@a_K|Ni96QRYo<uoF1Sk7ce??Ha@4l_vA(HAE4=mSK|PAp*`N%U
zy+H~8xhE(wKH^SsKRd)G76{}QxB|f>sj87K2^Y7{hi)O_%Rrp5X3<P+7;lNfr1e1G
z7K_f1QE4qyZK#yctDRq=d4D1Og5fs^MzT862@JRow`Aj*dnwv(hRwauvz>W$w&eJ#
zHi4ngo*~|nQbe+ytAg5jqvaYF{F^{#jOfS|Fap4BBig7;gI=1_?3o*z7MJ;6yc?QC
zpJ@A`vE77m{+~h_svO3Ap(Fe3j53K&D4*(cM%CfRbVnAL(LGvvr)o2bAvGi1vdUw%
z8PdS;L^hAukj_^gl4NsxXx-LaX~L3G(bG}nscmGi;Z}9CveYrnQ#7kxOOTme@y=-t
z2X8Sz*rc6}d#2UUjVSGO^>W)KonbqLIITyva|-Tf*|bvL*4B@M#}G+%Ts_U9pb51{
zDD8_%-AidD*fIh#di-lIex1Lb$-}<;F9sTJl^YCtu#+fUdn#SpzUI+b=1kkfO7EeK
zJ}27R;)~%>QVHiW<XnWqSYY46W3)rMhZi*6+YLidsewf~UYdU}ar=@7Svwk{%>Z-~
zMuXmey)zmW`;9;c@|?P%&%@tkgZfE~L8!q^0snJ;*9|r6Y0OWuj#q6-H_1j9kQ`qe
z(`?mc)K%K3r*8L^u2@WXvb(Lt7tS#)DWpAlwY$gS->l*?x^S(5(oj0zm6ZDq`xPna
zslRaWi=kQxy+#yt7zbm<%+HrZ(6+{shf)R~j<-1&FBS_Tvc1DZi5=_hZo^|?y^FWJ
zEcp;dn^yGpPMr)TJU~_@5gZx*sxZ5PO}!>%IfXgERkA(U3M3P<{Vr__3v--n&H1Ft
zDU7NfU{P+#{r#z(66DhR**Bo%{;9dX#S>+=qjuVRuTi%8D^4wj%1f%O9S-?v-F_Xs
zpaj(8Qukl})pCuHQbGxhb+Ia#U>e*(0QfIC3Ib}21$lknlAu#4+R!g#<#ox5LaWpU
z9d>2{j&>Hiu^tF=pJ=Cr3KOJ_h&AlYZWBl^(igZGN(mMnAFvgeL7Ry-Z_)I_O|d$^
z#lzAk13De$>EvMtt(ekJT(XfK5G3==e6U%opxNmm6^1XrpADBrkm1bSu%Tq#H#FOR
zj<fAx3@iYA+HEei>w|(;AQ{L!DJHFF_orUuZ@UfXs^c7iw8?4%Hh>Ri1O(|%Pt=hL
z(hWt)647ixly1x+=T3$uO1xx|9jduau8N)^`@yCUGYxhO4ax3B(us+yCU~Ad9jReB
zKMdy+H(Vl79K}GahZh8LPsYD;Vl{f(v127-vK}$H4TV|<AQsyFw=BQRfa#M5$}!6U
zVNnnwyGCig3r^b6Zu{6cd(v)|+k4%;M$Ng=x@7*F*;5%mw{1q3lnznaLU-$884kGe
z5A78t>hZ8L*Mgw2<IRU%K8g2}`&gmoxQxuKLB0Al47Lbo{6@AL;YjyZk@l$bD-CQ{
ziZ}jz-Qlr(jN_ShTwxXDX2J?24dV}~!r8NS<QMhUs?+$?$%n^+jQt{dlEVkG&aY{t
z|EY8jQ8-r^FbzN>CmHM>*P%#u-i>{3^9*s2o#_o~4-m63^=f6}#eqk{QV(_Z=T%@!
zwS00W$ktscWE(uPR!{G}>bVZK?AXG|QoZ$t?jI(V(dDEthiwDdnMOPD$?a&@+0IdP
z8-+KAhs_VqVB)DQSC)9Qm;ULdsiK=t2i^GbG>|f!LCSD)md)oXLp*+eR4m4)tMu70
z%_6L3@<@@OQFo1Gq%gL2qNDn*Db3_;uqLJ|>d?mBl=vcz6Lu7UodeA{?Bt-PigDOp
zeL!&VlG=u-Fn{A#sGKWQ;tmz&Y%0w=RE(STm8cxZ+v`B1v!?KvES-mK6bcCki7c`X
zNR^MDQ(%2;3r8hQ%}xFM;OUpU1;LXk)!|aJ=yoa*4Cw4&hh-=V;&!6@Q8*AlD*kV7
z>^v$RiKk|E!qjK9t`-Q8YjvwCQh@;&`D?Thq<nioc42S}gZk+C6Re;>(K1ieQqSyY
zY(s8})EItnj^6y3-t7aPe=1U5hq>WIN`s(JZ^5^>8Q-Wkiw|!#*-2}Ou2#TcSu5Bk
zu5sX))Fn8ltC117j{?wNT`aSpKR*3gHt_QAF8$f`PX25bF$=G9q@NI>BTvT*zy&}j
z7QaWOkTJS2;pMkQFjV07nZt&La&!A|5(I717@MSYYl9}*gMq*z_t>b2dfi;>)eDHh
zY2rjA=2$L*KT*n@SW{|%GVXhIoa-e`_DB4G)eb4lNc$V#4u<?nmfF>6BXVcQvyIEV
z_#@IxKrS|?8)&4)<D{GSz6oJQS_61NTvxW6XG|W$ZUQ8J`$Wv5K`V?jfOb+maCU3_
z&a%YFXw*==son+{!2?5OV;>jfVGEI}LMEgP&x;LB;P@fmIyPj?$7sk+P}Gj{GfJQu
z=sk2X>*TbV!}FX0IC&Ik-cfOSySENhs>lH&;fG0$4hsy@_=oUo%dl1@4$<D|A&ejL
z^<zV3YVhBIeAp<+@DbYN+X#tjXN~Y^hH>D7C508vw37T$T{(VKFHTnw$g%Mc`Vm{J
ziF>qzCv6r|mGrElj6t9`)4`|4?%>$JO9yWqy91<k#0Zq%T!jM6WC(bFo#)D7iL94;
zTda#lOq{7iGPp<w7tTCWr!6Qk%T2*~D$pULA9p{On7g=CKI1ak&E<N|??w7GLGe=<
zY<(mCQ}%wQna9&C#St<0iSBQ(WfmLn>c}&Hl;8^gsP7$T*yAQ^%yZPeeE#9HxX^SC
zFvXSHaO>){&F1$!ixc_ck^96?qVp7AAxVOvhP@~NZNwuiui^OBi^w5xeUZLlb5StG
z;!*&qPbABs#D^z3FC*&H#b+O~i^-XJTA1zH%pFeT(paMF4lb>guxf!Wm)02I;;lg)
zhC+`mF|BR-Atg1W7C)DIjS~bt3K*NqfO}a@qVvO1xarO8#fcS`@);X-(<XpzvFyH3
zzKN}Z;=o*f+Kcb=t)Q7jxE7FbqpxgnVEKOT#Bg`UYqKwQUn=0ayefd3{YRnFE-s_g
zAH<!8ka76a`8m&QD`>6BtkuBW&4kP+$~O};A1L3{W=<~O#542DH+yKwA^<Q6^UELt
zia;2`HQm8Y{rClpI(O%v`38EX6K_8*a74HkmF<x|%WjD|XT#anc=q7PeNu<ycMMK+
zuWbDyckeHr$!+)D2-GDBjwk)N4$Hk{^%PxS;yQ42O4?J=F`e$YoFxz)g5Go51Wlj$
zpjh_<PBtKomVcq7J|v-ErnlNgW0F&!kJ*txSXo%~4?tcXyKc{pOORBmE(aOa1efJJ
zy2w2mCAjt|GfAH6Qr`k$x>Q11lbxhKTYRy}X=zfgd+S3_yn?KS5**!oo*|I<7nCs3
z^<|P>Hba-<cHF<pK1eB7`-U^Gs5L&_^3zdk%<3A$RYd!ib&QRvUWG-o$iKq5jK}Cd
zYq^DJH=$Qy+E>wm&Bq!PGWgk8Bu<#B7`N7p){Dwk3R47Upn#Y_0}d}{G3gDP-dS#%
zWNmT0&2A_+i;?Raf5THF4f_fc-&EUa6>V!HZ7r&*AQ7g<oUe<pY?2)z*nO5`jIzLt
zo*kruXLpqB<6}=8Z8|crdedU{iqeMYh0W=0+RieQ7prFvRXSooY>!OCO|H^un8zG8
zgL}bM;xBP8_FaZWxou!&QKUIQLE~|Jk0%Hw9pw18Uvt;YY~$bHy71JmP-C!YQH>VG
z{a3oVlMM6bjb|`-+C&DfaL$AL>3ql>M{O*7RzW_svf&AZKQ%cEUj{aZ_<zN)b`Ngd
z+<xg5u|oE+kySWgHUTC!cW1)n<}VGoS93%9beVm=0~auDc;{g;ou<wdU6WcIE(fc1
zIKdQ2Mg$LwbC3>hhrxj(2_=oPN9EXJl&il$CkH?g9E|>Gg6$4DG4Ge0ZJW|UieaX~
zXh?M%mEtmIFSn0zSojV%))3NFXDF6$qV7x=%U@~xCnJ4bHBXS5Y<lQshBtstFf-Jg
zuURP^e#uI>IUion(@cYsXF+u0_x#n)>EEkx(hA3?x~=i`l$j)u_7UN(-_cEFquo$B
z>_Ubb1Su&<3ZAa9{#NOhyNrIz<jcped|B+3Tj#w%f4xi<maAqyzV=r>voSN8*|?Ze
z5o1-E7<+r|BfL-?B*LFd5-#YocpNus(hQ9=YGy`m!w$!;NUK9tkqXV;hfYj%{((i?
zXpv8L1T_xGvQ*_7_+-a*$bXRRcz5D<1*VY-Vzb31^|1MeN}@u52nJsp(cM10Z5Tml
zTB7TNczfJi124Os!KLVYt)uHoku9j*!i+A_`A!2T@9crJDC^SE*GkZ+JUpFWE8V!(
zo)bJd(dpu~R3Wy~7nfysxgw>N^!;l>5POR3+6x4=`aTP+tXJuBC*5o+!^H`XgZt!F
z$TfH=(oJ-(dy^pS_0{)YS)<_Du~ETuEiat}^oFts@>XXOnhD$9N+MWY&GTL1&<sC&
z=G?_(!;r=GVqJibYnW8Sw?kryWM~(ObCjNO<N4#EF7Ud}Gvto}0~B-x>JBZ=o^@SS
zS{c4&TCvMrrd03g{=D#oE%Y4H>N3K>zYWe``)syRCfF}{d*KZUw#x_9yCv8YRI-t4
zQ=L<S7Kzj~CG&aBigV_F){*EMef{AY1ZTa6-0WU2dg4#K$e;s~Z|wEZf=}NHVg((;
zJ}h%6bv~;u=QeS3ko_{PT_YKg^DGQ2U%Neu?J6T{wT-M*!(yBTt+Vfq(tBcnC4y`^
zGYZmwx4)0@8drrNA2(wheEEdr5z6eAFQ<5+O*?}S-|uBiCMzH3Iw5SU%g6uv(qSTc
zr|h^Z#RbX5IQR08-r1(5?rGi#Ega<ulE(jUrE$<G7vI2L$>uoC@?&KnOGW@Wu<%EZ
zy?|U_0pt^Q7r#V5GF%<P%k^!E7=g~kQ$d>wxsYGK21h^Np8o9;@bEp%w5IW5U-|1V
zOldQkjjSTaobfs4A1IARSu%b7{UTqGt;aKG6x(a&j>Ty5#Q)3l5^yt-6QmH`r#au=
zC>V_l))tK_rn9B@@Lips<8t}eAJ6EJ4E~MGOfLuBvO59TOgl=9F3$65rlz2a%ryHt
zy}JME-GpNw1Du{|ZsV3V@a0p5wZ*vo@z@xB?w~d8rrNOu4k4ii+(MAIDNOOemHf28
z6Dt@0+@GBYPTAaj1(D%Q;PBSZ)s*UAfBa+qiZ*p3=ophAgsWa2R5+LuFa6HBP;;^t
z3m>6@X@Nm2LwmXp7h;|?3ARZuo7bMku8f`*DHbHf?^dZA4K4q{r@;R6+p6*idx;e-
z<Djidt+QNeq7hY5@G*;@_Tojzd_Ml~KdZJ%^A$>^Fh^-TPV-K&Ba19zbmEcdKG?Lz
z^@Me83eYLOEL>>b07+Uxl5FQ_13B+dz!Keqsz?Pwl<100aC<<OO*QT*MOv{De*+&u
z7Qg(=$Cp%jfZ!z{NJ-x!YGrYLf`Wi17Xz^Pz{fZ;TBm6xMvo7bqzGgbT5W+X`=Cv*
z<Bx~M*;)Dc*B%s|crgb^vPO)oA%ALJZi>C;*2Po6wMZq8LM2<gO1`2%in2z;Cv6L~
zOw)FW2g3{`{4KqmI>Y(eF0Jf<$d2GcMf(Aiwe9${hp>uVy6^TpqO8I$Nh4OV@*8d#
zZlqf2IUq7svdsbCxe_XSnQx-OjIuq*xo^HT3Y$>P0@i7{c7{pw+c|V$1nZ>J0R#8|
z4(YjR?sM=R!}}yU=kOFMPjr1Ds1}iQ=IydB4n?N`)5&${9dsdGRtYM04A(?!-jSS6
zUnO2ws8VwRr)&o0`Q-FmUujx+4^-^6sFRxz7JALAf=^=H_@L3_!)Nc2_>gm%!DM(s
zX>|l4eHE;NGRlW(15hyDJ1`bnpd2-nQ7w(86)h9i(sf$XE0_{YvxSv%QJ!~?kPJLu
zT{UCUA~t)CFN@9ZpBg1Li9jBF{L(QzA#*N&)=q)bnTF!?2x7-@ZRWa;;ktxvhOv`=
zh~{c-n;B$)Ypo?Rlu8wdEI}mXXAid{mJp|VLh)<Bs%Ut}ZX4d=8m@pNm$+t@8^m0+
zmasL|yTiz;H`=sByF%P{gQHBdT8a5p`0%E3c{lv0qjA~Mn9Y=<;agNgq7X7LgR@bf
z24|z_FFU==N6PO$zE1ZhUHaq2L3U+~{6mXDz=XL#f(w_Cfcs5m6@z)KzV#)@Ey6*G
zm_)ZlPgHEC#3u|+iPmZcYqGk1x%e|BAIgbVx%iX*w#iL_8d*DFSqB^<!^9|as0Aos
z0ddEt=KjL&%ji&_|DqeJN604`mN8TdF>Dyv=QC;;lZ}$!(682O*c2pf_>93EoAZrx
zyt8i>N-n|jW8_@JF2`3*3tfDrl!rkrUN2qXuE9WZ(Wnc4)Bbmne#=hX>sKpqU6AqV
zCmn?&{o0usRFIQ{_AXS-o+`uwuUg}#?!oN=iLPLJs3QKCqkRU?Mc(8Lg!&9tRY;S?
zihtq{*cn##A-YBKcZ+aX$tw<2588mU$b4kYfO*t(<q?W(MEc1X^)A;i8|k2OyiGt&
zJ0gFP!^|sukUq471SnF~){8S@rBednNr%K1wa!hziIVbV3fm}wU%*-FF4t}W099IW
zt*zc;+x{{8@*7pBQ&qn94Af$o{OvO71#We8JPr0v4Y+U`0$_BK={9UgQo7g%M`^u#
zi6JN|KE(sKo)qWhB&RXh*_LYSNk0*RfPsi>KEmE$cVkokYU@eN+TD5*7dCGNJ=<Rg
zs}`%VDws#qs)Jj6(L3JZ3!)Bd;CG*7=CE8%8`&pqY@|Z4k^#)1T1&8^0+AP6CX{6r
zBxSMR#I&dOf6=`neIu<Lkdpr{j}385;mYcP@Ym-fneER!?f_ui9F3g;)QZv`Z?I!P
zOmsGuZbGhAYN0xIeB{DeIxvuds{?DNev^bkKvk#qzxDjV7CEfQ|B97~&VK)dt)5!_
zT-%yRbp3l+hF7<|*uO?g!tb94>90?J1MbtI8>)o)tsg~Vd@?5U!L9KlR@*09<6r-6
zQ;cIEAr5gWG43tg%Ri$53JE#u(-7Ype>KbC#0cSkm2FIuP2JB~fouFi5y>U>N{4^_
zeo(!`<!I5)(b@Y&AUQSos<Kyyc=Btr!71IA&P#n9V!?MnPt`ssJ3yv=Az5&mw>aSh
zsT0A!*4ieQsgSl{%+4omEsKmMY;m=Peav_{{U@L&VwMggW}62)e!GCi8hD+`;6viK
ze04T`w5?KqR!(yM5qBd-IvRxDa*Rn~D8weaQOSAemrinEjp)iCd1JG7)>a2Mm?S3L
zM}rx!CW&nzSv#wnJ2mNWTNp+B5q`StFQU@jXh=%}M0h~BT=OE22=eMoX`=fPKRPp(
zldlD(oMj@3R;+JNj>58IWvpD1QjefyeKnJHLjVu4($sgN&c&B4)~N1C?xDn-?W+T@
zb-*8Fbuoo*`trzku`mdMZxf_1n^h9DQQ$CY)dK!!nw>@U<MTp*B<m<+WST+s7Y?HX
z2+H~aGpf)w<cO1@U}zScJsQQz36G6rr7fN_2*ug96|Utv5fM;6*mH8j$%E|0m3!IQ
z9Upx9Fw57d`*H4?n)c|(jv*=9fqj`_+2u;#OJ|k)rrtzXU;V}Ix~eyKK`ayafl*z#
zPpf92c0f?9{CxBDp_Ol>y_u-WJj&Nbb!~iSD{vj0dnAkrkiN!PhP^~cNj|yK?X!-n
z8{57*AO2cG$xsQ=039Vm6xEoGH?;EcTkols6zQf^HZ-#3@*Pi%AWWkBHxY0}McHbi
zF*Sjj^BX^ZWK^qfs-khPA`uc;f&(}|%Rlw;*#_2HgG5NUTh2e*w_?xg=|M{=-xMAH
z?1Y3Rh$I1-+fIi1XkjL^yFIM$s<MaG)CH;?NUH3jyIs<3WInL%TP`;Tzdq%n$^#|!
zqjwa;g^Cna$R=HcK3K-f=cJ}Q><DRsuaxCgmtwmcp1{{JmJf5i^Kp0mevMj&Hbc-e
z?e{9p$Dgtv=5;}4{v(grMt4?+wn<-!O>k{7ogV`GWPPJA`5w34u}o8F6D{+Eb;O3X
zpleRAc#9%@dahGsRIzpTed=51daE01G$GK;fD@g|d=pnNDbeY^kr32iQhan!!!s?>
z$s)CN10)x9u%9Jjxf&5JiMX4~Fs5eWkw1HhW00)6$vSD)WDZFIK#NiZ4nLzVYqEWO
zHeE(mpIdJ=oL#*khrbTGjW5!$dWeysSgXyz%&&uAtne+4&lscGzP_29)5vC*2hE@m
z0c7p!<HrEfx83z!4ahuzgh9XCgIpKggPiDEs#Kl)gZA#>`*0ARmF58;-%OEFgmpG6
zAHU;QK5<x^`1Dh@3=#jj6*1|{DOXqvV{3K(hE7<^#}5>O&Zm9KBDwf9mGFJo-L?7)
z4}GhYYxS&3^6{44wfc{8tAuOyE!XNx`q4_ppu;%4A8_|K1kd}p7yfX2X0c!r7C)bd
zNXbl%E!{H{Cl^00T7<yxRV`Zi$^A3a<bEeo?T``GV5VUabAV?=A3MN*`emdq0ILNi
z<hQm3K_CZ4Rxk;?OQnm2A~Z*j^AgJ+sW79$-&2Ud1{7WWb!kq#Cko1Se|fa1-2I2c
z?#~=q!MZ<Ar6apPQiavJe}xp4UIC3y9RVx|GUI=JjHUs_K_h(dM8yNbuy~(JqFsw%
zCu#V%kE(l1^}0;fW-2BAn@0hq>Do*`U5lX|GAUBz;?2^7e0+l{VKU5S3V}aT;B5wy
z;RAJm)VXC?%3|r`bt0M0bM}wzUb!5l!}vb&<M>$jy;6B8%LZ{o_+u1Px(~HbB%Zjy
z>PGg_gK~pVJ~%+R!K3^^%`iLeZ?r9P+8^fDP&9D}9ms>L{AZx4*l=G(ME1<err3SG
zG~0oD<7=4lzpz~g3!PQ2euvVQQx(fj*VCF(oqi?~-?`Mh_WE?6O<<>-y&}Ah;rNxu
zU>5SVKOW@8%w2;j9WEVi4@(D=W#J9>eO)1+Vb?R};`-UcK<?yIv3f&+z6&zeh%kTL
zRI(i}Zd3C@vE4WmKG6=sG+PL*oz?Cuuq9Cje5Xs6R0Eco1Wk9=lq|hMt61yd**M!D
zciJ@GcN&7mo$QR+#)<6r4LuC#^*aWIh-~OZ4Ea#`?sTqm)^>jRXbOVV%$3>FMqNO>
z^Y!OLR@A1VvdgD-GAK#wf{GVdI;Y-68rs(-%TTzDUt;>@<p4y*4_k5PEPf(Om3nfA
zo&dg0j#0R`skD8bn=&-2gg@G<i&~*ewwSU=jd+5zx_72*+F1uH-fBA%9eJ0zX@6F^
z@MQq~;cL5g6+0%nri}^-n>58?j%q+3Xygf8X%=M7#IHV>QSN0O1qlQ3k}6Fh`6M5E
zX)nlk&2kfSh*wiM^BW*`eL!}Ks9Gb61+ZeRd%4ou%F_Bo*G0fleTB^z#EMHJVCkIi
z6n6|Cn7Hu<h~*@?{uN0wmCvs!{)JLqO)M&zs4EA*IOuOZ(1*DdZIZFfA!&rlCFYiE
zc`mt?M?H>F;k_G*WlRDB6ng}N2V%kOGzO-{5`Y)PO4)Gehi5Jpp-f;@*d&Oalqd`@
z4I|`flj!Ip#CpJ0$JQFPBW<M!w7W#@7(zN`n{u<a_4;0eUG1lM&X8x7INDeex1T-h
z{O)>Iq{1Q%*A1^e-4hu$Q+#lPFg$FO{PE|sBX!Y~u6clT9oP0GkUz#L4HMP9$ViTV
zs`sC01eMO3onA1&=cO4p(t4f%LJU><hP@<p@>mc<S<}}))aOXS-Rl4b@n!`VYj=S&
z8HuhhqZlQ0p-iV3M)Q0lm&o`bdkgQo7<!67<Rr&VmXPRR_<jr{mc=*-*6G>eprT<*
zxL@92u<)N<GWSF2{4HjQqMw$j{WK?=Tz~%{R5X79aYiM28+j-i&yQ`E!6<y-@Crjg
zXRAV%5l8Rs^CiYYO)>W4kY3jOJX2M|R#3h0<x4OIA#269T-$8-3_h)Q<C-r*HHvXp
z@H(=0H{slNnOWRmr+|rs05~;)NhE$3%{slj!XWM@HK>ryZeZ8>O|MOAt^9hT^Lz`_
zbmt^07@WJ04lXRQ!If;f88u<Jqom*_<(SNNnyEV1xsZolmvlnuSv4I`qmYki#T|w?
z;;6Q)(eUBfx0@33;)pa7kZGTXW~gbOYVkcw<Mn=tuco+MQkzz9zDnTGTAXHUCt&uo
zWo!a&AgbE67_r^c-v$9;OOx30<Ucv3hI{>m2Uof+W~WP#>t()3V5|M<=^mv(JGRzP
zYwjJ6lWZ0`oiN0b;Z?=&B5?|Y>lH^KZKMp1xhSAz;gGpl`tU93jSFsmrbYjy6aThF
zR5l4jY6jQ{G0_6F{=%1LJK^<nTpcnZKgz#$GuhFOE*w`!AQAKspi`%Y(8YY*PqphR
zA3wIoGOI><!#K#S+OT#vl1K;GW)3otK{R><Z^4;~)Qu&&%fl_#g)iahOfDZZQqgm;
z$PpPhp1upVT;A*jf5g^`Hq9E5Btt~1a`hw|v)iFyLxSgbxe&$3aK8xeIzVi6I;A)|
z0xM`%X?{jvWrQOj=A86|=USx4p0-y4sJ<r{LGmJk#R*`sQ7w@;*8iEGy+Gidi_hi9
zr9qXQoQk!pN87mKZZAnWsNQ>5(-$v~ZEEJv=0^S$e&nXkwvWIh*HWw1Y96GRT;!5{
zxA?NoCA75+1V7l1^e4mPZhnMEgEMKy2s%!x<Fq<%QOB*W<Ayh`xxS)iK7Nt9L5KW#
zD5z5WUq2(kY)@k8?rKv%BG2ab=1<1lVhJ>qIB23Eq=rk!s9;#Tl{<!)uRbJlcg>ZY
zB;=lHSJzW^qnEZYLBkV*M_TYPGjoSFu8SMSb*+S8{vr5`biWG=go&=#>4JZ{Uhgg~
zVro}euD|e-Nuv)X^8Oc@WaYr!6fb9ViQ7A8sfAh5+C=AbT(jk3?G*6oo<fDv^p0T?
zPv57!_$q&b?&S3(3^O$QnXOG5dysNVl_oI}%FN-AD&%ANrWwQb4ZgxFX;Lo7xUyNk
z>=~6E;>wQlWj|LL=7-=||JsW`<8L~D)2!?Di?v*y&i~Mct9F>NeiPinC$GU}yAnqk
z&fMv_X;!<nhEq{-KjRQD?xl=IFUXd(UIY#}jb%cGs6h0!UCzHMED%<xSAbRNII)c_
z-0Y`AHDej`&8CN8LreC5A?MzoqB7pS#&9LF(67Wa?F5>I&d}-VqJ_uih8yjIVWB?#
zg;_*LmFC4JdQHW+@sV1slk}aI0L$VZJQ#ES=5|^q`LBnAHYW-kn845M<yRIFX}__4
z?q@V|%{~4Pd2b&dXHotAZ`xcXg@z5Kfq(^;5@-qq0#Xc6=<*;gQXxRms0a~ii3k!Q
zDdj;4CV|E!60~aZv5FunC<?Z<V4D_f3i^ctDisk5D(<?d1rZ`t`g?!Q%ysRx$)@oA
zz3%(3yRTQX^Kj<OnKNh3oH_Gw0oG`5PVFp8)E`V~a7TGiR3VBKS>5jY?<^dYDvE#8
zZdD$p_N1zOp(b=3OZH0Uy+v*h{^!C9mvg(H7EVFgp#Fy9te|?fJzm(uO|le?_hj$B
zQlHu?!v!S0+wEO;%_WR=E;<OQv)Tw`!a&68v{Le%39;!rrPkf+-wbFHZg*rwpL`G_
zQ?qyI(EZLP@tR)^hOWFFXL6jKF3#>dinEU|R%>lWOf#?_v{@w$enM>E8%nV{LV3Rk
zati<urz^~EPxiJ*bwU*yaVR$l>9jYpy_{@SAMhYHS!?%pT+OIEG6_4x+a%2&R#3nI
z_KseJ(PZ`}4rVLSXbTfps1D<_i9E7nyTg(h!G>VBU+?5y=T@65yxC>KJ4KX)6z||8
z6dTID&g})q;qC{U&E6(iJ92(ljPAY2UtqnLUm_lPZIIjMpATS)c8llaV(~EEX^p<q
zjv&1&|1Fi?Zl~>aL)2+ZXui`V6t2@I!^=kBX@;`E2@yoYmW54WkA2vBOrpvF2wwi%
zbnVE)K4ZSw5y2lxbmkE|@)8m@cuSf1=+qb!*ZBye)a_=sjhr!9T1}}a(FhxnU$M$Y
z?{EA8?6g>wmbv22bmV{FrMz+W_>$6JP-$Qf%k;@TLc3Ei&oq^(7^T?A%HOTzu%3%Y
z){|V^5Y^zuQQCKjP7`(IcTzoc35wOm(P4fZNx?c9{ah~)Vi6UpOHwXGm!!gRl=fZX
zP_7hWvBRCG%m5E4(s!JQv&Dc7k+8ew_yLBF_o@ZhRVTuJJPgfl_3V$^45cdo-d1Q4
z4G?06=v??y@sO?1xhL~v?re@?iEHKxVu?yq>@tXyR`kB(W5awzVQ5g;l+6e@Asj<S
z>&87@_fupj_kfS2>Hap`rzll=k!Fj!CJhg)v#gKQS#BVO^UH(&5dev{={qM6P5FC$
zZ`F*Dhp&5i*hMYNsK0HfUo#e-i^sq-FODZ2;W=U~Jnn<%Hs9%+Wzl>$NqF2)9%E)Z
zvs-dwGle$uw9tuWwnxMrQ<HAz*tk5Tb9!`n`ihcwN3a)mW*8rI850%g8Vje0XRKle
z<=>&ChL{N_{YZ<Znw@7DJB9J62keBIo>&y;T(L$wij~PqNrYN<ngBvA%cwOCoxU!v
zWufC=*Fs0OSyHXa{pl3uV6RZyiVBrZGFf`k-$sn|r0eX){PVt(QX@M1Vc$vns&O3X
zg8iX9)rA2!_)8|yOGnm|T-+Mf;0AxGK4y%CojArM+JBuou{iksL>1~|O`;|GIKRbu
z7DhWyT{y<WNfe=#I)isir}SchJw@~Lsz)8izkG@tz6>_=Rvsv5#v48}ozkQKSXq;K
zaj5pa6MVU*Kr5oH_27+5=_jjV=BO&(>8l7egz4gzG9pnj@rDE*d~IAL;uG)Jc)HxT
zZ7BD7AJLrACJS`Y$T=g@+ROcEue1usXNULT3D$Hva&|b>dx&jzup6?eP%a`BR4O3I
z^H45)ejutRx%ih}KpMT3RXRJ|;RR&u+2LZC5f_k@n&4Hwx3WrS2YdN-^dt}ph>hD{
z@MQ>Tf)=OzC1s^_)j$_Z<V%g)4NkvTJnpx^OuSO+`_}vyB#sm}W)xaYl<fW6qAK8e
zpdMep%--Q>jxxDk;&p`wxMF8bY8<pu#TA7^+!UvC8^lsJubJivRg4u2SDM!YeQBc8
zoZs%$CpFm%=)y|Q2$h%YJ=ta^Tlp|6`Y{4`!Uu{U8}@9k!b4Uvb=6LBQfREK@(~8i
zgNyuL7W^1CaiObnp;vE0@`f8pbQ=s^EHSoi7PrX95_UTv!+Km*Nh?U=lmZ+cF1**0
zvgry+T7o@yS6a-LY&nD3pJpL2DrvgJrCP#(VNzRZnl&j}x1lWLx6|@mKy})0+2IQF
z;NspREZd1Op?_WZyCk&{nBN06u<)BBhQjJsabEL}7yo2boObGL4(bFAtX31#JQmet
z3e;*^(QMlW4hjd6e+l2+)KYcEvyH-3<@DU)*J$Ku@<M63m0yInKs%yJ!<CII_Qut&
zm|ykj6L`USSEB3uoTP!yiOC|3W^}_;Gd0MyX>I;7$Ox6ED829K((H@J5}TrFE>)Ok
zjHNQyTsDF#iZTg8)`gnwKf^~m!44-Ag{dy-N|z*yt1!`W)muWx;K8cy`;T+L@R;@7
z`d{mC;s!x&GAII@6=1X>KE!gCoDIJFGrso5b?OZne};&;DtMMeuMD=R0{+P9WNW@n
z-d24Y1YLP-+akKcaUOUc8@KW2_Vy{_+bodH^yVZzh4br9?XGQOu7e`u$QBN_FcQei
zE!5EFJMtrjcIQ_unGF&!4NBZM<AqdYlbM#SjuBH>)^W~Od?=pYQ_Ibeq}KDau$*UX
zAdm_JPXF`Gw|gC9s^W}UPoigxw>*oCDS5Ii-;AXfb&?z8l#qKj&X@^Bd}v{MKV-}#
ze@B3I7Y&#va*atTV^UMZq?9q~ywObhJWOJ*s#l6in5o<ZHceYw)YkmHmJ{51j~#|+
zi4H?NPr|4+%B<|X_N^N<t62E|bb~MykdhV{5d8C}{**_{7|l=iPGguj7W8O}Hs)&A
z)znz$^jN&?!%dl``3;_Pw8Iq(+@q+mxH;T?d<--=>1+^xI#weG{X5!9;(K<SQ4)WL
zza$h^JykEfOF0-RTqV@;h(Uc9Crn(CwmWhpMh{$7(g0t*R8>a3=j`CHRCFSFO%<@Y
zId<p?AfYuUkNgF7-Ul-kkgmejD+MZzq%Tme;|q84r~u!H=yJwxi#flD&%<8&HXd44
zT_*q?V!SdLt(ZQ6;Zr!+)ua>0Y&-V9w_=rHckeZPQKnJ2P@AoYVd;Lb)t!uCP$U^+
zmGuy0fJxbChvit2_EpvwHyAQURn~_}gqe?0un)*b?BleR^((D>w|j==4&fTHhXE7X
z42D2+7_dPkmbQi|ixgOZhx_XaKv_@yVhg!&mk+P+sn?W}$PKA}npCqsQRSM(!3^Yc
zu>+95SAZOhcyAQ0={PP5@6vI26yBo)$@cJjckCI3Kg8q<jqR#1pP0hFfO<1`Hf{@b
zOpEGm2~~T$@97Rey7G_nQk;XH?x9-+-C7>{yFkYqF}tpF(waKeb>Rz4ShjtP7+3=x
z`%fo5Rw6nnQPET1MY;U(lVcb&<6WwVZj(@?{DHFd=_>1c4vtcY3C_pU@whcImT%37
z#le>r=0&1sk=$M(&y>*O{VHwr4WxJHCU+0dP2O<CE}^xTi>$pi2En)m92k-aSmQ|G
zO3H@h3ZKTdK#Sc>KEpfz+6C4QQ<ICUe2ZIsh46b`Jt)uQn{AKFq|<R8>x33NDdhJj
zcQ@ZdPyK-EjO>=oQ7*+M?RHs4w8{1CFqCJy@3#UYW)9W3Xz>XZ`K!?sqU?XsqHDeH
zEY_l<RFlV2`Br>sHNG4*8q2Gm7UT!1#Xt$U;2E%+ULAw!Z<_(H3E^8X;41bfL(<=7
zmwv{-*brmDah~)=>(dpc8@@_Mp!jT4rX`81I=Ny=y%Mc1Yz>_8%@Y<JwbtE`Q@M(P
z{NFLU7IgO*pjiOwmdXXkxD<E$|E~NHP(rgvdhk2`(SjH;_xdJTeoL62AMnK_-?LlX
z)g9T}*iKGp-GRFQg(P%(Z&<AEV|?8$HqP=>eVwXjXYD8Ue%bTDi2IAbwjV?A->`9_
za{Lvx2g`WHd_GnuGZ$)++YU@o%y;oss*dtwkgo#SE>*0WTYNR1&W`GkrA2j-KhGz^
zu=F@ILdYlazFcL^CfMhA?~+y4tbvBsFP^098m$j%JS{BT=+t~}lBY#3H#ex<Qh1Rz
zF!B#Y*@#U3zE~`gzblG`C<ODBVyZcg7jgB`{KNTA7jyg|SnjLB%b!25m>UXXoRD-e
z+ZOa~S)VH^_bX;vooy_I42pgyyRw*Fm4A(wElr-+C#;@DeBPwu9pm!P7Snw`gDd|~
zm@4W2u6@Z~iWNpV?fT0QwFJm{^Gem?a}hvsttpk`R(ua!0x=8-P3h7dHno>gu3rnW
zm=gE!P&9-6IPY<=reenCE(({O5!klJ^A+)SJpJq_2~C6*s2!EIwO87XJ&FK2X_j1q
z#zcP9bGLD=&?4ed*J#||3+sN{gX~UUB9wc>&VVxqM>N^Z_YS&Pcg*nx{Xp9(PT333
zjB53+|7*%7hb8=QS>&kNC<=?+`r;?bbt^v8+Sfm%-f^&g)qnX#&T|PjZOFYJgUPWI
zJtQp<Dst*_T3ulD^qXzvdV2S$IKA=mA4j!$TF4Xi#)K=(!RAz+9RRU)g?rOAoVJY^
z?3es~Rh}{v_GIr5qj)*l{wwWzJF+cvFq3t{x_YJGM!$;<GMO*-DFHr%0&_HJ>2`pJ
z{I!SdE(@99bG%kaR&el}3(IgSYSy23aLw|XcY`w2m)3rFTI-^akNK4zI0Ep!cxWj1
z`7Z;JyVbu%5R=V2LvCr9d~kIBO<}%q*9}4K>_isUmm`33>|XToG1*-*fi-(9HZiBn
zQ}r?4)8WhHHE`-f7F^;KlIf^zj}@koalC_}*};)zV2V78m(6|U!V=l0@F@$*bVdIB
z39buJVnexO|1e5u7kaKQGNE<Ta*6eMRS4j%Tqn_e>oTuBZvAZYz}A3TFw5nQ%RTwj
zs9JUfiF52vC{xAms)EufmA++k=}ol3?Xs6E{rj+mBklfK-NO@;H*k2?dwHARa9-Yd
z_4|tQ!~ENfZYCRVUWX`ahEu}UxSTh24x`bOW0%T&idXMfIz!|KJsjBQ)gQ*ge0@{u
zo#Fo)r*K?hS6OI0c}V|A%4;u03@uzC9G=X5i?rzJq9}c0Ed4!JXPmrM_+sOg7Fe@G
zRvhHQ5iP)FlRq3cMAVbj{^5bxSUa7bc0E~cE_<Js1MA60H;s~mDZX^7>`a(cX*g^H
zsJ8Q9)w3`Ap*XGSE;~pSQ=*=snkPTaX!gLJe0zNRz~<@;W%Z!ZG+qt|grjkG<-)yP
zpq%+}zGsv*_0La^YU-iN5A_|ia*~(hye8y!KC{LgAODM0&`WYrdhXb|_E0YSByZS+
z)VW=ZWlp}|VxjbXNofdEdUaa@VynsCILx9Fhi(W{m>(heOnHD4BY<nm15Aqmt}G9L
zINoZ*GB#`Y!FO1w<=x{pA)nO%578Xzk^FhW0q4_FFGv4wR8K8N-$f$7=ji-T_<ZZ>
z*Znp8*pN7le91|9p+4H@N|4Q+1{qo&JR}}FF;rBF!uPHgDdnchj;PK39(d$bc}8f6
z6+Rh>UW_I03$1L95jjB`tEywe1zlnPOuzF}iFrN#DS)W)SH3T==XeK%&YA5e`3|%B
z=GKw$$;BMbj@qf`Ns#1BMNfSfEkga|p5XOAf89LUdzapL#&y}IJ3NkHU5&BFzGYI3
zDDOuX+!U}8Fn2ToCjVjnOv~peJ8Mt<>*7wJot5pFto12f7a0kK4lVx-bxr)B;5pn#
zDzpp~&K@Y7IZ!x#pfGo!aLPd8<blG81BLWJ;n;z~(F28d4HS+TC>%CWIAox3&_JPK
zps@cyVcI}ppMk>Efx;dGh1~`UyABj;21dNUsW!EU^#vIrL|PSjMiJV81-7KV3nKlF
zN;?NY?;vU$pPK}+Ny3(se{2isI5|h`h2pKWU7(z%|C$brK)@B=rNixFD!fMr&yxA{
zy`6{Bu;o81lrAUg4C>pWv@OwvK;e_Z;wD9v&M^#E=<A?{FTBZQ8^yyMXecI!_aqD%
zD545D4#9SnE;71nQD3*(9#}BI;pU|xNbX>NxLMmtoNkVJecM7dWWqqR0(g0E(r<|q
z7}jIbqb+r!m8*}gFO2Q>hpKof^53db{`zdN@T>M3PD+xZ_yXcmnDkQzhHvy9PHXX#
zxEbDrYEAZLRS)<xLb>fiB5;CYR>k{^RS1HeJ@XP<3-SX9DOJ63OKH^w;^nIbv7EwJ
z9v0Pilj?&>4&fXjq{*%N`f`*ygH+EP+|r5sH*6fUnUM91;fjsoLc8d0Hw~u{R%Lp;
z_5HYxnq!}(V6sOBS^khvP4FIdayh4G);?F2nfS0gG+Z93$xPg+{dGPe_X@;-w^`Vl
zwQlM8=35sv!-ygpuWp&~>H={|D7pu^DKD=yu{KHf&K=XmiDp&TD=^w@G9d`|A|V=r
zMYX_EX3?!~AWa3Hj_`srWdKU967(vqG5Cj4+31#A#fqkmS<xURyfju6c8Wq316}t!
z5p`degR^5WuEKW+)Z=ff!Rfddl>V~vDV*Hb5uQ-gmV8W}N*(m*c&~Oqx&YO`<chfr
z9AlW|*D>++1J!5;6tV0~Fk}#dE=pNX3B47(?m-Pl(?uJ^)Xl_<yBif?JLt^{CCh-Z
zzS$sgcP9=)&gF3xx;%VIHO1hxSP9>u8&&DXNY!+Ftb6#p&UT-ep3F6eZJMOF=?(!G
z2`W2Mg|y|0=$t}1zI$U^bQ^F3)M#x6Lgj8zXiGd-w`Si=4B%;ncboLhR`lAYih`R7
zp`t{wZK^O-r8;aQ+nsN6q0nI{wV{{+dk<zuRK+&yR7hR8Z<ehc_owMx60hWMg&!mD
zdI@gy1y_DaBR;rHKX7phJ8cu;9vsFJWrOGi{$_&*cmSx6@lkyd0l-fbxa;1>FA%^F
zJV0=~0nC~PK(_iurE=)>CI2}4?ZB$@sz91390H=(m#F&Mf7y@Tpql%+%53dC%JIUu
z$<W+^N*x@if*ZlF0mD^iCkLvWL;OBU|IA7UKT>YGl5A;};43cm?&qKwSIUlSa;vzM
z^ZWB91i^Qr)GbPVz)~xDkkGxeWZS59qEh6h!hq48|Cy4r!Rdw{F^@LY`<3D}T7x=>
zvjsiZc^rr#P3CaB?d9q)d;EyNpS~EC^e0_9>_A?lgLg~E^~b7Sf32+18>}ZBV<wPT
zRAU0u5FHz+aU8l)Lo4LqSE;C!gUQ}T$xPTQ`6sM()mMrl<idW!M#9+*677^)m!fsr
zx>QluI+mZow|xPwmiv#g-lP=A6@MJ3Bc*0Esck9WjOYL1@4TP_wV%yj-GSLhFdT%K
z-<{iu8$DOpA*0k#x=lUd+ofg)2U1DcF4yj4?<Z+jyzRGtp$OxoC)qpMkC!?-T~j({
zo_SVdW+i_s)@6fD`t@Vyjla|EzTg`mr0y^4r`*^v?a%zK{JvlxRUh<$#zs<_0EItj
znYOlD+^Uh3@c=>60A@9*SoN7ojg6#p4ECfD_7BepS@k5r&N@J;uVrVwNn+otnTj`y
z18{$eMO{tp*_(y@-&R@*I~r^So@os(A(!E`z<xA1=P@{EeGlkt^;-T`yi{(GzDqbu
z2kAX)68AC6K5`zL&BGdRXDL*pv{MM>KDSj`t2q2(itFR5E%=0L^UVLui^lv-1IGNv
z^iz)cKS4r}3kn*$fB#2g_jd&D6xSZqoDFvI0KuRE%(@PMZ1um0#M%A#b7Oon#q~j}
zzV=M}i4@m;lq<)RgM_t|C-<#MS^L4frcR+bsw2*XH4V>_+)z?A&$L(XR-u;DUG7Hf
zI1R3~x;o3)9Lf!U1T^7rKT(asR;+SQbFW*I63X8SWGI+Mrv9xNyo3)04U#w%Jo2<l
z%LW?=^#!Z>yQWbe5?ZE0+2H1z#K7Q8{R{<HcyNOAior8{a47he4`qW}2=xUw@s}}R
z;cG2?rG+oG@W(Cu9t$6D;dk*j_n}W(&Hwzo)x23h+2A1;TV=7@dtBn3{KRH}FS*oL
zx4{HBBTJQ%|MbyX7tQ(T1fr&P+#JAifK^b3rgEK|%hq-|WH*;oAsYbow?%A}s>-2!
znQN{hZL8A!Sx`D_Yl*%;M#!8_G&6x!*F374VJ0XkJRHICNS^Amx@Ak~@S8xWgh=xN
z^ssyJL{)NdYpYZC1MYNOq>~l!^O!qAL%dm(t!hLPR!iHi`Qr3bxg~otEkLzXjsEDQ
z!kH{%Ry7F>E8c^Bel*x20!s@_O4(t%a5UJCfaUh&&xl(7jk!Uu+@g<W*%M=bwS?Nm
zO0X;2k$}^O*X4vD*!4{^Ie)1i2EVq2YrNT_bw*eIc48#XC6dT<FA3=CXa0-u>0Q}U
zto?dZsCsSrOvY4ya~)NEU-@$>y!JU8X<2szS8}z=J|xFRXZ1B>B5^h<i{t8+F=2+%
zVql`cClRX;FAvo}MU&lLqiE4fO7t5|8_J!kEis#<v(<&IWt;3Y#VxPc`$Ti~IKf;b
zd^f#r)cv;#Ej+%!0|Uw4A>G)`R^L`03ydqWvobSdBder$h=QkI5Cvk$C(4(ke#el}
z9ryPg(8|6g*Li74(dLRQBc?y&o>0`0w)kUrr+ttLhk{c!IpsygFZ1cGB5{!fg%u}z
z_D80Hdw6?r)||?E4H*p-e`LCP;pa>P-M|l3G@GFlT1JQp1CC8deHu8~s|(E#f3H5i
zrL*#V!S@yPFuWxWBW4|G_*}6nonwy6C#186NKa0#7zT8ww*kuO>Me7#!R9_uITqHr
z6@z`RtFL|!zvb^ZSNB6PPit$8Rwo5LGId=Bpf4kyUa)i{h}&kB^*sE_GZ<an4=3@c
zD?wT+#c8I=tcJ$L6Q+<*3CCMrci)vex1^bFOzBCm^;U>i>9WTj3~0GdgcA_*vY*G#
z;PDYF(>=)9z{>jQAwAoaeQvR4UKC_=@{1<Z$2ggO>_263y8(7DnJ8hXIiV_-zc8js
z+-5`d<zS^>dxRW~QYr%2#&Z*$NNVulZ+Vm}$EGo?&3_4Ah8^O2ezu_*tB*>0ewVia
z>U;i$8{SsWKO6X-H=^9cMV~?qVW{SV5O(E9QMpxY;i5m?gA@5=3GsOV&yx@po|j|<
zAN!5i7M!b}vRb)@H6{F-2hdRltLLAcHI_X)l(cMZzw(?S(l;}LYQ=|OAIkCFkvN{W
zfMb*H<MzqkPqFq#xc>BnD46xiYh%dR7T2p%qALNlMkjj~pbNrzF@KyC1F=R`2i$<*
zbh9MBUc35wSRAft;6f8al>dX>gL^Zu@Bot5BF;SaoH!$o5Gi_7u*_WbIyF*5ivwYj
zY4SX|VxCd3vo%UAP4={zLeYC)*;zZkbt|o6j0tR#3*^}HWMtc!iH?1Q?_23sz^IXE
z<EsKQ<9NUvibFgKi^=r#Z$1&=`6l=7llz(#DZKndg?t4iRw0Z1V?XlN6#`a$<XB)E
zT<@8YRAs|cU$VRZ?#TJC=To6j=jn%X^B#1pZ&Vt8(%Ne1<j_a;Z~5X?*@jbro=LPF
zX}zw!*B2j?JPD;vblL{)%%#>_CJ%ileX&L^EfmF2?%FeXs6tZ(Li1tDAzY?*zG7<U
z`~PJz%FG_5dk`HYA}ze>vE=5KXT98%2u9iq#<^5Af~+s;>k%O-ubcrXriJh#1ds4l
zD$vY3o_U2=N*Y;gte(jqw<tUITdt-WeMKbrj)!$^J(Z&_qP0eq$tYaZyrxQPl`m2O
zOKX~|*YksGy1kMO-_QTObaLNjvE_;Lb^KzB;@~K=S7E5T{dw;OJp#ocbp7m2!MiD4
zGJcYa&6=a7dkXvg8m&el?e!0QS9wd26H-`$I2Pz^z-@R|WR}`miK0h7qoTpaf2oUu
zhxFrzXDNcaK;X#{p1q~brxre?FfVqp?iz0l@~`&+4A!CCZT{SOCd-`2Xy6UW;A7Mw
zx!aouN}2H1jY7fKAQr&Wy)hIv3&~7Ob=a)5shqW<5erz%P4(8<RroH9B3TwoY0BA;
z@<}=8N5!@1zMPYB8yh$$JL;K&aXg9sNovq>m^AL4-RcK;SVxrcsJYgXBkUy#G)Mv(
z#`GTJ8BO*qQ_}^;3}N1KKl1wB**`SB4WQSawvS}#ZJCZwF&f`9X59>q8eJfoqA!G0
z@3TF)X@aZi+*gg5BqADJWsjjRWr^8KHZwdgk27AfgH^kqz9d#+^8VAgy2aPyoKJ|A
zpe^!-t!r67>bMQvkh`3Uf<E_DPp2K$9F}XKdZCgSaJjO~^t?gGvZ*F7E!tj>OVA+=
zRs#XQVhcTwK&B)PJ%4b*UPryhcWLJ)L(qLf;V|NQjwTiRs?2J`r~RYHG)5Xq_m3Jn
z7fE5zE!^FIpX)lSX0KQ^PhDGD&BMgsvKo^C_KJ><@LwSOVZ+>8Q1%>ET?BD_34}S+
zQ<=57@qJF)`)|t2P1of12K2e&lj<K78#kzRn{cjgtB_o?@>X4&LvFHUMAE;>9|3O)
zo&6PZ=+EF~po}F8#}<WTZjX~VJ=n<wcrCNtg*sgOxa+yVhNj6SO3y%OpP--zR(%a6
zj(m6Lje6sok(&j{A1&~mA+gDByqTmXd(ZS^o0nBbzRFV*wyOb{ZK80tXD-X7nCU{_
z9<9E;g_%c<i<G!~j<vyF)$qk7?z6?u<MNl7h2iC5^6$Y&ateui^wY(?LgFBF8pCwi
z#!R*mm>&Wo@sLo3U-2lFy2fO0$#wiwPIcX4VtDJOs5;e&I<~#Ulv<q6t9AHC-v$}=
z<;Z~IMo?b)4#}Je`v1HajPTFl?=$?C<z&w5tM@<@i(%7O=}eY24|kFgkJ+6}uA{hM
z>_S@_Sif5nA-sh{q{L?zzw>hjbt}o~qNAnPkMnx{Gg_fQV~u)mhG?W3l&X7FMT5WN
z8rcxGGSws}<JEo(#{)SD1<qH6wG`8g)-k0d4V1q-#g^DbIPZ9Xnn{|?KXbL8%_ljZ
z(huF2#J@!`7TK?mtAA^9@)~~5CBDZel7I0AzX%@+KJJ4<!L2@&4ZcCBFZddNv%!}v
z+->1cTli}JuGuKWhdIQ*yUNuD;=)jbc#{tf1qV_<|9GRx5KQB5HkfMR9W7jG;c@(h
zgFKGLM>Jp;CI(Y0Q$Y1nYM{|K^TS}ATC$WgTd<1lh6IC7y<mo3<q|XW<TeUEq+-RV
zs5^fY;pR|8b-lyAS2^5%IMN@_e7=b9<tt0^t%B&-%XR3uL)F`yv1LRYWka=kHDw@W
zg^IE}RMG-!seVDv_>cqfWhQq&A0bvI%Q|&B>)x?SNH^B#-pW}a_+-F)w+B8=;K-sh
zinjz1Y_kOZ{+qI!KCRGv_*f`6*xFyCly#wRF%vlFCY>H~A8AP?mscg1w{t+?1r7+j
zR6HQC0k`Tt2zrA$uXmAWc7q9eviHYs@+a$}C~M&vkaKH(EEa+~#ao=bfl>XLF@ZFY
z=d=D-_f-`31@_D_Vb`ZqrQZZ;aQ1;opZp%d?;eC0guo_(yv!01R(OQ)c0?yT3X{DL
zIlxUh*ObwKqH;B|4Yqs61ajCquC@MGiKqQFAQK=4Ou{@v8Y)@N@056lT%tq~4_W9T
zDoylWBA?jbYz_$o*G7v_s{Iep0{XB<efUu^18;>clZP9Bf2SLBTRFCtyZbMwQa^$m
zA2EZAU$CM4%?l+1_&209X-?{K7|<6^0L5xiq;@smOtXT%l2>wN*2#B#ta6x06RMpf
zG99Mb(%hGIPWnH<&aIzYCC*HCW<xd<P7tz`h*@}|1F6caI`70QtN$`<$&<>f%Dncx
zb#u<l?1pGU+bVbfG+AIKg<ph=QIbIjiZ;SXk{&$T)z{#VK$3ZYGI@Iti8iOLI5nh2
zc~gF+uvvw4YE#Bu7jaKcRwsKyhZoqC*}aapLiGHI1K1Jsb3{r1wv6bfMA|`%51%~2
z(Y1X(WP~pxL1<j)=oXQU5|yTL%EQuz@`4>3<2AGqwY#TAy!|yD(<%apQS#^G-yS7Q
z-^klg?jliMo-9(K&3|4_<GD)A9Y7}ce_jeb-N+q)Dx$lEQ4A}uIx*;3)aWus=c7RM
z9C-i*GOYyj&-t?b?Z9qEl-Fpka4P_?NqShvvrY+ChoG*SABWMBYT#H^>6&uH&KQJm
z7U62amN1YD1JX{GWhw3@iEQ<}KRX?i8>Oshc9nW?Q|AXzLo>GnXJcnr4H^#Dn_CoP
zifU$3;t-BsGbq8v9c$p4!d?;wS>(a=L5R>g&YNBHt;>U&Fu7BMT%RG)g!^ZHx`fpZ
z)?}PY_U{3v$g?(@ZV(?DEhUQy2Kx|Z-sLhag9S+BM{B59&b))<ykIrKyI)hC)l3Cd
z;i@fnzCRw$Xm)2w-n98X_@v5%80oPsg>x0p)_%Z#f&^!Lv?y%!zM>zesiZH++qs<J
zdHr}dM`|KuLTx=iUHR`g<ZBI1k4QToh1y(&UxEr=U9EacW*2$u1v?^jEv;-9qR2@<
z!%^{JM}^M!l&8XP)xFc;)WrT~7B3}rR)BrhWQXVikyHj`%c=$%<vGwehhVn)SsnSw
z294#5nB(6DElsVy$H7)^7Z$dhz=*28-T^=Pi}JK=kRCW#cOtUYA9kR3ZV$8%Jz!ji
zv$Ne)vBOfFhm`|<9H!73nb^9JE>vq{BFJ}dRD)#fuj*DHOg8g(d9akhbN=H}X$$6K
zGaA>yo`;m;7NqDO^#F4&1G1{~5}~nz*v$l+91a5+`Q*v2MJ!Fi(&XLu8hk0!yp3*G
z0n914%DB_jHk8msU$qp_I*rr6e$vm-z=mH>Y0_AYTE%vwI{3|J)xoy-EESjyp;oD4
z4mY&<dt8xUjaei-Iaqzim>^uFbt67o-907{=A39de@p->nr7tB852YTv@eT%Jy##J
z-$yIG!4tA$TWGgRfJ=pAOdaJ!hW(98imJ&eEV?|{QME{Z?8q&gHgFzC&IaFl#<97<
zTil_5a99i8nqmFxRYe+|ZQZ%vy42oqDyQofK2C=^o#s9OrgwO$?6Yx9o%=X#<5ZF@
zAucsXGeVT_b3OW>KZewmY7IZWQB@k>PmBTOHpaVjTO(WjqwNAc&tBGuVcNQ+>@aO}
zF4!&hGFN01W}w$bW;Ax)tPzbY0%^gpXy92OVvW?8$o=CxPV}379$%$#!&HLr25v?v
znGt@jhC-_)i_6UlHHUt#DV?r>a?<XdY_^2>KmaxA@awsD6uUxS6xz9SH<6PlOxB#l
zS5hXrs6G@P`M;<+^nckz>?r}`@uJ-ov>Dk$hKKeWJl%0WS)+U3N8XoYZ>5I4O@<vO
z3ARCGesVp0gmf%Sd*PYa((R1oT(`x7(PyXY4m`^Dm&?W!;Nr-)zpb9OvhMjo*H^KJ
z)I!m>4iL+WsxRyyrC4toFGNLMBH43~&8I9%G(MPdr>Y(;fh!fL(UN8;xbzR+r(sC|
zju$P(9`aWpysL8O0-Jd1JpdZ@yld?{DbFaGsUKD-r5B>2SMd6Rodf`3nGt@=%nV3(
z8Ca8eG0)R5RUO4X<j7g@tEW`ntc^hnYLJeouEL`tW0x2Tb*?|q>E5I)Vh{UW-=^mo
zE19#&-k0S4f>h9S2u)gj{J95RAA3{CeHId*xjH0Kn5!;LJEMmZNQL!y)4O6l4jOtw
z=%BMvA?uhv`}l&*QR))kdMQzRjj};~Tct`As8JxfJUIKm(-Ul7aC<U1lb|@yQy;;}
zZD>-k2FH@<ChpS)Xv|R1K!X0Q5B5-K&3MAO|3PNdlU0;Bi=slK9fg~IW+?4x>?%Q0
zvu$M++9D$Kd92`(3*F>hJZd{hXq*nHQxo|Ue$#Ac7xx@<)2l6@7lS1{n&?jq-zwND
zco6eEQQv8*4}!rOoaw`<Sb9TFqrjD=&o1wwkqh|-X6`_4$K{sk(iF=gbM&4y3&79~
zd$Nz%Xg*4jZnt`kj)8g(;MqI+URXP*QN-C!7v@#UBxj<CbmzMIf++;D!OkuZGEQG7
zHU~es2d;8XT|bP*QRm!00H?FTAIL@|n6DRzx53o{chdB?Bch&26f`EzGmNz@{9tZR
zawpfnN^Hhsh~p%krDZ-ekLnSEk(bbWRM%#MPLg!0Vkq~cwMJkS31F?zPdNgYvslOm
zC#aYRT>CM)EjY+wkx3j3{WPNWIB3lVd%8@jIMr40KZ3{xx9g`|6=zu$e<j<h_#{;T
z{*@x$7v34;!3pS}s~yG;ejE=LS2A=bB|2)dv#wQQa0`DcwiG5H*Mw%QMY3ScXCu}e
zC8!u{en1;Za;*8{ps^+(0YcvV$ryBh4ON>Bk}4+FET1pdq#PDw&4ViGx^X|6kPUW-
zs%Ugod{q$H;EQ8b(PUNphHO<4oTVzNf1&6j+3GLp*A8b}ZKnx|tL<lptF~_|-}-vp
z8f(y8L1cq>>!(~tJj^)ayPGPe2L1g4>xkV1?(lvDyy2iQVSN2=VXXZZKSg0Ym;$4P
z@lnCVIF2w@sU{<EUq|3QhAy~MKM=Ufh+83rnVg3w&!{^c>axLFMF%s+fKC;2gx-4?
z4bE1&ixqedUewgOS$b@kHi`*pfQ_6N7qU36K1yX7+e)2R|6++Vdsw=KKkg(48cnZ4
zT2fzgI|pA!?9^&$&-aS8@1GmrJzSH#;lES~k$mQGqrcS;4EXH9z`%K_eSG^b{YecD
z=YOmgs3{0XBL8h`PlRv`1Xi-JNMy%ra>*Z!B`0S4_W(n%lJ@{zV)P!MD?ZJLVGt*{
zDk-{TF!GrY1vQcQ*=^Wf)-y{d{sBZzEV-{A+M)(q=2(fCTjdc*fgnoA|B5ElTiM60
zn=o0%T5%<NH99Gu{?skwzo_lTliuB{pOY(3rH;(K{5j=Z{=D~a{+wFi&)jbQyzc=1
zoTjhzovx2q9w#$+j;gF1yGn!(I>p0O=n`VCV#;yG%(b(3U&sj@7vBwIXO1D}NEt@%
zapnN-9^73f7;}`&2;|Frt7*SqaqRuYoxq(adn{MYKL=O3Y#UEVjs~f@lRAG`xZJ9O
zkSYA<a<;x4HwQ~+&iE@@T*b$iuNdpZKH_DzkF9bZysucX-cmlcqEK6|(jSBV*o5{a
zt6$nUM$a%Lrs;)Vk7sY@s3x7`ZDQ0-xr@QaU1oRscPf^cD74qdTjJlN>)4%-+n9+|
zbOzF;If;m*ZA%#NgB*XJMwz&}MO@heH)ii=Ppag+h4Z5L=ofJY?mjOEWN|gHu@u2X
zcd7#isL*OeDl|-qz+WESUDx*Z(PvSoD{JFW!Uo3yK4Qaz&u3eXtUShwi)cU(D4esy
z1}ouB>$y_G^XgZ!b-_bpkH=q(U7|d{i?8-?RQu_tZ4&%f6p=-{lH0&570G`dGK3wx
z?kkBKl)oX$|D?~~AU^HbVecwhc#jT`VQvw^^Jk+FhGz*jSVX0FcMA_nZy#=oPFjM%
z7KQL~Yr(i=wN4(D=c!n4TEM!?<_VwtV<m@daL?k>|GK>pKSTM?b0Vf~R@IxS+TIJ^
z>Yl~jj4K#IUJ)PdS=^20INB6Bjy8_<cCens-Ihr9)_U?_v#Ew0G?_%^A5)j81E`bE
z9K<vmPWJrNQiFvM2DQVHPwZz!N@<60E=6+5-p{JYTQ;?_hyYq#wehB|{Quw7=(O{&
zd}a527}7Pj50Al{WN*M4+W5n3sSwY1$06vIl5cz!m%sBfvG3#F0W>oN;B}$gHij`9
z+f9l!Y9yw_lLnzzAgutuE&8Q9`PwVuo=W&{!P<_^6<&5GNw6(9*`vGlLdkA!^yOF!
z@6pLsLra%Xcd-@=P=|O)Lf{#ldv;w+0uANa<k%sSJG@AMrl?m$Z&-3NpG6JBQ%YC3
zY_{|%uZHCkUo*P};%I7G)TT=+Igv`j=IYUm;KmP`L=~T3zM6!hv&KKJ8%{I7`&m)j
zn?lN{o`%96sOlE=^07jvUT$%&({G4`hD68i`mM5Wx!AH&(-&*n*gN8mvAy5%jBPU3
zC$Im4kJEQUxmSO|LX8TWg{?W!u}E!h)U?>FWb1NQa3L?<>+~55xz<(qC*g-Jyw|YC
zb%nV0&EW=H>a_~@k8#)em)dLGjixH0utT%}Sn13Bc_r5;nd}n#x>|ht`FD+d4pri7
z=Q+&3Ruo!QZL7@V<s4)r*U0B*hnDTTMwV+;?VzgsG8ZQMZ#*HP#~J<5W=ENmJ<Gk=
zxD>d+K{V&)`MS@+#z01sy*CmE!5j$yt1!n1W!jW9rGu{&&yXi=vVEI-4&UbHP}vdT
zrwP2JViHYnA0YvrV|NLtvQ%X2T-MIeal{B$j0DwklRdI{H3U;4h2JLs+o)e<m`_8S
zPxOH{jo@9C?}%^96C-(N3E-4th`@w;#Rp8Nn<6!NI|*K>8^mw^sIc>dRN!$BPf?jr
zBbtz9Lan{npiSr`)J-v=Mn`Z)2RK~;9^R>A&+g$#GH>kS$&~Jgs}?s;vF_5_AYo!n
zn5YdCXJU10!$iviTCinj#|q8MU1Gto@q+zOP8HGAjt@tP1wPYI{XHdXJ{Z%;&2`$*
z0JD1B2BRtC^|w;cd+LW>qwZE?wn*7775_ttD^atH$#I5wq(JLLp;w%<>l1nvpCy$n
zDhxT@p=v;Ds(WYh)0IC8n<|8mSSHQVDut;nfiYb;yC!-4n^M0XIs2v@zpyW-;m36q
zdKsLZN?!kjK&i8pIxWx^2HL~GA_ZjZpCd`~B==|RQ=P5x3tavCfdV0HH(laI=8?Ni
zWaJj?NQcFlu&Z@#3gB}L*eMOYwxmOh=kT@5Z5`Z}QnsVLPK-msN*gdOdHt6)bRn)W
zB)2IHq%07YSdr#f@kWQh`}MxI2SxjkRjGldM5kG3+}&!f2`ja4RIS+nqTK(mP86`8
zDcmK6^eR=mS^!dv4^QJ4A)}qb>c-5UH<8HLGY*ug;*59$@;?wN?zNo7C<IeuG%jCN
zO1Lusy*PodQZ*TwMeq?_X{(IO)S=KBI$7T@AU){rC`Qj~o6iqt6CcH6^d1qX7aM^p
z;w%}+FM~we*lW~?-x<0>&ts#Fk7VyLSSN*R+_cT-(yO03Q>_V}upd-7#y9^X<9pCQ
zND$6dCyWrbP+B0R*+j-k%dyZ=losSECM_Zx&E=j=jL$mP?r5{lQp!e~uO%-AAxbG&
zsBu`&PZz(M6ivpWq3nc>d*^DA^y<rk$OdPG@#kIqxiftJ<HSQuZvU3|Gs&cjXGdMU
zt4g~rHm%!0!*_H?=b65%mk3!l=(isf^B7!glr-aar&F~6g%P1>oXE!U?27Px{pfiH
z+tUD>#GZLW2QDBr1;vTNUd&&dcjcUgh?QcW9qVJkr<i(C%h3sVwkj!IqNaqdPUs@M
zA`SW&%(5SXqd`75o5u1C4pr++oUthU9Olm;JD$Mq@cYMU;7{N60GP5^{pp%2@m}4|
z7j+qs;fZ+|!s!eqtaz<9M4XG7S<G7vqO=xV{7&VkiyHpt8#bZXo1V{2R&DP4y<NJ2
z0}S8qofdw-m*En8!@=u4t>9*b?O+a!b*~4hgeMKJpyNQqAM31c=do`SQFXXv_%=$_
z+&*b=E`Q*DsEJK9=I)_*dcu3E-)VlCWiOjw=JeB0n3-GobIQm0^WNqBIrUQh%)Ns@
z@B1x(PCJo5r}wH;nv5y}p<v%}dekG|An25anTa;`qEq1ztmD|p#T(VEY%sXX0rX^7
z*c~Yq#QUOMyfF%LIf?mI^C2Inn_Z81t`8p43peY7hfkf6K=$Y;?nu-mmt*%uXWbA6
zby@a^`cwLt(}(=+h{pB75=xE2cm)`t&r!Q*X6^+YDMU-!U};Kpa7o`Z_E2u?Apk0;
zu){#{v<BmdyJK-ha^wW>Jvj^6Z&zP6xW1~JOX-@q>NWLPJw28ZkJBS~Ecx^9lxB6=
z#bz8_YBTLc&_Gf~MfhzEi&{UCFy9ie*c+WtRT0+&bP7Ui4AZ2*9O_Q~rSok#NuqSf
zYq1FGg_D}pY%#Zboo^=b_|6@XjY}uyzhN_k?Ib2<PfGT@>J8;)vq+LXFZj4?iaccY
zX%XF?Y!xQfF}9wm(Q8Mrm=R60^5M6lte8;k@c-y{USNr_a;jTJTezyz&NgOP?!YT`
z>lxou_ewxbO1-(5_9wqiqVv1*muud4b^(5RU8CzT#ZDPpnQGDG=FJx{dkQu&G|=Z7
zoDL@2QQt~sU+Hm`rBzwl2KTPQ?Mc-NC>L}O@14A18=dbQ@hw}!kEr<`O;>ks9*^W-
zs)eB^LE`F3xBwFJM^M~J*@1B>!Z_W2;R96oH5#qLRpl!fCzvNZOl5hPXX=2F_uu33
z15(z8M#V+q41YApWDt1L@1RuS8WrK7uYdoj#oJSFR%0lSUGx$aJzhm8l&5H}08#=7
z$^#q(0Hzo7LZy9<>(Yskz;wWfb{5^@P1@U@SAS`81*%6n5`)jL2wR+{%q{buFG#!D
zi>4)V&6Ep!cy_5U?j;-RBER1E)jYNvgu0__@TW;Kdh+fLLmGRaoxKSZB6_(4pKkOe
z)uNT)&N9c2aHG>wB1DRi<qs@4lt~9YTB_eZP9@5t*QHCe=VM=Sp^%!%9~Fu9*6R>z
zu>MLgWxVl!?vsvFhl*23h~WbkmzGe~cxGKb>?Vr37_;`Hs0!dd@b}n;i;dJ_)L}ge
zr&lUN?;PDpYO($6gMXaF+(u)~q|Ad5jKRA1m_^tSS%ejt$Rdn<6}K6zYDdS*_FO`O
zV;h~qT}-l&ikT&D+6<VzX_*pfEXhw0q&#SQc5hCxIKy619QUn04Fv{ca_ab>gFbQm
zO8w>Ych(>3?*J*nIGkw{v|bm$Hk|2g!$q?H?P9SVBrBZkZO8D2#xCTq4+<yRL=6iU
zAk#0J5mpy>00q;adTzG40oLrU2B4uJ%G^IJcuwhiDSl1T^*V;Y<DoMMWM(4-PeA}?
z7&<R_)Pic94HzuMZvR-E%!m#;pWC$*q!P{JRp_vpFt^FO8?+SYikO2&wKdo2#v2U;
zSj$54UF(D0IIF`AkYF1JZD1~Ylfl0&*!hn2!QTi~<o09MHm$xs_&o{X#vVwVL2V3y
zPBW-$yj42I2!J9qfyvD66h#a=4|kt%I^f$v8Vo3vd#yfm^b0L~=Gmr;IyRct$m+|z
zxXh8`1+B~z2QOHSCV9rd8k4n*J_**xjeA*d&WNjWv$@VmA*FCJIt@MV2O3TozQV#w
zi_rKNJy>I+tj|{lzq2Uw5^b7Be7(i3Pjst4SRRYlaL$eIB3g=Dy$ETFw1GGj@h*#}
zsUS_Z!zQt6v-BFf*5KAXH8c`>&?BK3`F>D4)LqshEvS<{_GRd7u%D19zSW8byBboL
zly^x9OLET=)ag~IcT;(Rmu@nqn1am~gg&x3R2OWtxaiEDN&UvC`$wcz6*wdp-0qP0
zzVO9wj)5Z4A#c=p90BHp0CUI+R|V{_#-(+qw+KVBBSUz^+F6Dh?(n({EJNeMboBo&
z5-7KHX|bhCY$*3lvPGdEMCRX;ed|^m1kBJaS%{?J8_WrY^pH(i|Jb=+f_X2%v@NEl
zHH<;2kr;MYy1?FGB~zgrYc8xuVPxE7gA0XUW)Shl{C})c*(q7rKvKpg+k_sRQ0g&w
zCwq0S!$oQK({eu30;k7|S%U0YCP>ZJ6`h<lGPHIKyD8b*8%Oe$IFiC8R%BeKb%-dj
zyA<ipv!hBcEP+4P;Kz6JR7b3ePTTp56*uN!fDPpu;>A@cW33mOM)!s3WbdoqZQMYg
zwrJw2qmfl!2~C3dE|_=V@2qod-0rQgXr;64x)j>YZ@<z#(y_b~%1b(q*+aQoc`dMT
zABe@hQp6!UmE(pZ0h1NxemV7np9m3Biqr?Ug-EH`_K2+F{C#G#1~<4|6AGX;teqqn
zcZv9}FEsm1;=EDmRx2*Md$`JNzk+0~vq#i4cm8i@@e;;iZrkBJ6=9^9`cSId-R3M_
z@ZaB9;~gdWos7JY9G<nyJ3E8gwQ4f!?l_xULn6i{d!<b9svVa|_WXh%+|XePL*go}
zlds!GF{M0mR6;c1)i$lLDOgdkHLp_x&>Pwp_Qt|0+j!_WB1B>~fS>x;+f}4ot-bab
zOfPBGERD&qV)O=$4J`&=?3p*VZS(I{h`thrimSO_2te*KkH`9>D%s1Crm*cx2{NB9
zd1AWUS%<>gn+ZxD_9NV@aM`-g2X(=mrcp1Y3UgFXD&uaPlCGl@uDeNe!q92ouXVjT
z;5e*2OYqi|>*jm;0I;=wbhBR2E>>ANaWZXL{@U7~B~#$hxG~pS11Goq&|@L*_B%|<
zOGZd&5iH?sO*l9fD;$nWuy_q@Sn_;&oXlW;48A1>UmZR?oS)(Vj|nr~2&$rNLzLvk
z5ey8b6w^%D5ixbOMpZ3;tCBseFwu*{6&>%%FLQml;W0ClIC32PlAy>Ba>whisqq1&
z_4uzfKzOn&_!<B<GEmyVSBMnOLmI9xV(5-AY<of&Z2q#@+pM*UhaILuIJFhCKKDpi
z$&uhl<knE$&RYd@gwvG8P%g*E1M?4{AlC<n3M`Xle$mutc5IWgIx*Y)Vum(V%$5PF
z>3<S45%om|(E_?cOU9X6WzAHGHwLb$pNZ?nQt~f}SLnYKzZR&YGZJ|r5T-h9{-!#P
z$3Oh_V^oRRHXAb)IMt)mT#9T^{aWj=@#cxpT<`)89;@HidI5;edTT@xj;JB>6vYwk
zAo34!uY_PAXpGScC!?$z>gd7XKvl$gsm`BOI*4_FwHj{P%~uMd4gG3S?~=QPnrR~E
z%;*pwx}6DcoM+m`ig&I!XTpmr_hIgB@&O0098ImH(fz>&!mKc0%v@mDcd@txf`uT$
zZ2O<!dtcw$(9fvlg%Q_cR?f(;4VWRIrbfn16C_&Cr4`8CifcmEXViTeB>hUe=Gu_|
zv__d}{|>uXfp`z){<W)vPO~@amfBvCzS!<Fv>?KJZ`YDLuxa|4#Z5B&3ieN$$>a4U
z`@SiHsNGz*y#qd$UfulP(;#gq_xvFF7_|0U#wDsZt>g=KVAc~%E*VnwR+TRpS@|Ms
ztSaVV)DZEGAQn9hg=^don?|CJI^WOg)_0bAjAH(N^_g!~bwOG*-tH@_RUz`hYbq1K
z8rFWJBC4H^HB$!=`Av``^p~xJwH0Ag3SiC?AS||5*Bv`wU$T)TK{og5%xL)P<?!l%
zzsn8Nly;)W9;S$Z)k=k`>o_{ew1Y#-pg*L;G{hk`=)x;`!IQ$ykV?4&j5i4!SAZn8
zxLqC6nZYhs@hS5&u@gdzsmg6#rwN%$<}_G|NRJ`gxsCF&fF~_Brs<?bJZ&$RerV0?
zxRQ~*EuXP@#MJFjZVxROD8w-IZ9GNUq?q`ci1>0fz8n&PX`eSMn~eoF1Bv=I__H2{
z-3H~jh4~(+Cke9lUXwjKAmcxHz^otq`bdp^HWu923GOGJ$<D5q`={By+7S+Udw3}w
zb?9jYmKQ<46-P$|-6aL7{xo0uKcU;iyb^H+U76D409$qBfkxm1_vb2-z5Bu{O*)~l
zz9=6&5gQNB5)mO(F?w_JJAZ#=8=rxZeN^-{<qpSmaEvwuTth76_%LH%St(lai&?hi
z!)$H4WWim;#R?MSc8Q(>8ub9xsUj{VAw5BqhPb~T!~M|_xX&09H>EYouZ$gcA_*(Y
z>0BF{5Oak2xLNX<X~y7GH%q(gO;g@@g#!{;+Uh7W2pU@F-VM;588eSHTk@8HxbOCW
z=+7u^_A#T5j^VkGRm;$XEzJ6E5}J3jtAz}FAr%`TVI=<9$8?%kzqDp^gwUMG*Wl(9
zr+T12E&5GTXw>HkyRJuTjHfMn>p-0+fN4}2c0=ID(RLnMpm<uAgTE{E{;2FjR3eGk
zPFb#ArS<61Y4!lyY0_aKHGa-W_Re!M?8x<MwW)7d<l0Gg(<I8}%f(Qk7EGpMew>b>
zDd=84*=6Lw=-AU4#74ZF!KB$Ru5@2J6d07J`2fArIc>R`x6T~`;`P2z19$sJg$&x;
z8xW&C;G!Uf2?beOha7Ic+Ns;u;@B(ZuJqL}Vif@A?8#-B8#6!>9@Xyr0W^CX(o^k>
zfp>bNz+4Dk)H}FDES$2$hjKgjL#4%sM6kPf9cvNjigQ^o^_Bg#N84%&(@$?mt|?(1
zsMF@IC@J;H_HD!!D)Z@&|FYt36xU7zNxp^DGNO3XsEO3`q3cF<gNC}g4mY`~Z_pJ$
z0Z1+{H#>o$Awe+OSQ7BIr42kAf-3EXUoFBW0fqqHzKJ<5nDprVoLaxRkC!A)s()Iz
zNWdE}VcTNdvcu!Ung*WM;RiZsc%1%jF)gu0^lWz1>F;6)Wg2V}l3_!_)Gnl`hn#5?
zqnh|!ZnsqE0Cv;5%Ta2B(7LVgp0@^G=&yldxq{ay85Sj*93?leRIT<-ydBr5Qgn@8
zxXSI96?21M9;)dqSk2F>44JDp?`MZ1axd8OGPsS5p>(~<0rnM(H3*PcpT%ajy4ckg
zYeb(b?-Gk0@oN`5&tgr7Pqe%<EH?XS7dz2n>F?q$qTDQtowR}2>K2U1HFwv4Dv_J@
z6Qb>k9=Jcz0~EbO(eEm{yP_Ku-TMHdRf;CwB)U}5|J+TqNzuvEiT+K|Hbrk#^bd*-
zC_15m=&u!Bsc4s?zfg2o(bpCIk)n;;h<3~%`YlD<6#a*y1BxzHwCzBm*D1PD(dQMt
zOwnOQ&pC+b1&TH#PEV})oucy;ZBev&Cee2*x>V7PiXN$`Rn&Aa(dm{eRLc~tQ`9h5
z9YS=XqDEx9qOY@exq7ouZBn$LXhQ|j^r1wbR<upgI~29!YuVuLgAt1E!OW^Ux^HzO
zJ)kl38yq9fu_bX>lllTrx4lUky>_iDaPcbTtX7T+-0CvVCvzw*MWPO#XR-MgyV%Jp
z7z_}xL&d9GeO+y?=yc20T6Wc*$nNT8KKm4xT_s#ylCfQc4$lQY2|Ka+_nDIG+86AH
zmFy=Tx+-(sS~C%O!MJ-JI^!|&*DL?JbwZKp`&DMf6PdoJY}MMmwy|&CVupETJr@#Y
zGX;Jb>#*}STJQyx3FafctJ0V<s|V>KHTPaSf*f2<_E49ETca%^s+HNG#i*HehW%(i
zB%D}c&#(rq8Wt5>+^r_2{$QHbXQQR>iOdX?%O<lRu3M*@A$=#^ymLh54vxwtQXKLN
z)!6l~y4)L%Uz-ks^1k5P`pE`gwV2Hh!RHBQ(=*wpA8*Px_=tmfzrh4IxLBJ(H5Q@H
zbLq{Nenc^Sx=T;#r!Uyo#SS#6rXti)E`74nn`c8&m4|q2#@fCO!1V=3I*@-JDDq|(
ziyq+8pS1LJG5yOVfaoUuu)k%o+CG=~S$<+)47tFio}(YW@1q~h?>eZ{DuvxBSyG_M
z0)3lpK&qp^cPAMb@R-`0L)Yc%0k1cwokylkTJ!;P&rmKAxRhq~id#&t1?8GO`IGxP
zE`F+?;E35a11d0&dUVE>H>v+ge9fH<&)fqtn)%KGWZX+!cvB)HyVtK&MuZII)~i(C
ziCmTsULw_xxE~0>oKoxTBOsZfAx$s2^Zx0UzAYfR-e3Z&pUJ7kuZ+&(`<e^-POO8a
z^9{nXnrrfpf?Kl~OQ;btjGYH1zw8ku!J!UqgMQSkuUIkTi%d(HtEnWBpKIyW313I1
z99Dh11Ex2Li)l}vp2=`upZH~i8aWSFNg0CNXFtBPJrH@mKsA(m1A2^y+3HWdRRMW3
zOL@A}KO&x1AHKcfMpAH-2MPK8Cq8cK_+9<V^zAiB-v;402d@&D1;K7G4>ri;mK~6>
zOnV)z+561C<?S8%D|kwnF@#JwfA((-4R=PPJA9YB)EG9muAv_ke+r)!e`H2sl+`6V
zPE{|~s24?1O=#ywE1)V~j886~oLv66f1?Y6Wls9_6y76|TvLH^T`dgYjail0uBMOp
z@(O+w*GeN}{s=N^9acl&R`n;TKoMbN;)z}}#*{g%VwhsK#3B;eVT;E_*;r<7?dNG7
z7Om^NjTa(wE5^_Qb4a67z&~f`B5S$WuAea!tzGc;rt3<1JGxP`1YK-Ybe<M6G*_Fx
zN-5yzk^fZdVz>Chf9W5{7Rys=29uq!T+e+B<&wUBZ*X_a5w8rLLqoF~Jg?$79j{Wd
zJLRK|kUy+a;L@TT_L~`;6LCVjMFDm-w$ZEhg+zQ6q^dtQIfk<sp27~(wnT@miE|YO
zT?q7J?TQ1NUqm%;QM2yFGvbQwB&<0xxM0U?az&Si`3IoH3GXNls$g7JS?5nz1&*ij
zoTzS-;vw4#h;jAj*ScN}xq3#)h)Jo%Ay>gFcb=^T;HveK{yKj^#9><aU?$57m!d3y
zDHZX#`$aV12*0EsL5sfU=x7vpBX^+3!<KOx%g|tLHAE?vnwPWKG5?N|!M~CzO#iwH
zpDxXy9P26ONVTa!AbJ*E<GUY!xX{-9oJk3d!TH1=@hb*a>2H-aPbYswJEGI*mMm+n
z&;l({6>3t+9f_>uKgGk#J<7|e=3%#az`_i#-Eey0zRK~j4_#pw{1ofgsRS~LOScfr
zdm}o3?p_txq;=p%!EVevW;JY4+e~itQ3q8^1HFv0+O_c*rkNfgGMCb_C(T&Xy`b@0
zlW{NH)QUj^@K|QX+DzXDyEx<k=GAYL(Mcu7n4B21#WAMGY&n#+JQZ?n8Ji^qPT&3T
z54iPU2$Qw`bUQ7Y86^#VSqu)_=ek20g<?pBt@0IeIeJ=ExR6K2v^0cz$^;b9M)fdJ
z)kPO|$QS{D={b1rPy5q%%^78aY>2Z~Az0euWWtKw2LMCld4Sg`>uQ{ebeYkl%n-vT
zq}ClJA_p(>KFUiu3fE;G`<n-~*3Bqg=XbwYmHX~@X;$}xRZ;|1xlOkfV~`Q|0$p~y
zWz`9AMAjK_4IDlTlB+~A`-`8vL_3tp-d_@h6Hh)bPPm%@&3swU_QBSqF%|Ki(1<G0
zS|!tH@t0kR+hQeJqY}-dODsYbgDYatEfI8k8R#_7r^KM!Bj~O&(6#G>TQ6q+bmX_j
zjauJsFNrkX%{<`Gnwi&u1lAs_u)sM9Y!X0g<B|!dhn)xQ6*=2qIdtLP_IuP7+|lNe
za(}ap!QsU<E3pj|g)=NS?V(PNpdL~s5!68j)#{-ZL{Q%^fpT|R9_Slp^lt5%&-e70
zE4EI&Vn<yd+}b_ZSb%B^z3YJici_+7_uXow*jzT;_mW&ibL(G`zi5jor}(|<_+uMA
zcBz%U5_w+T0{SX-Hlt?Ei^!3UD9h7K<h@lFk~7p(-$e@BUfyflJy^4PqqqL2Ei(!G
z`$c+E1sZs1Pon^&&F|tx871KRzk{;z`v|xH)_nh>SLDh)7b%qanb`JD3ps9krwv$}
zvD?GIA`A2{v9}Mb=|4{jrtisrWqz3HdwoG4x_#Za_}8MHoO4BZnE+{+2-81>?{+~8
z8#<r9IF>%(!wZ0a*un~F-7eR6PyHhnA~0wH&bs#0Kj?$1V`&)9IvUW$c1w5vWY5Di
zwR`x0WX~pGx`#Qt^_tjXvJS<fG(#!-^%G`Wn7~0;zJBHiiKVfl=ST|E&`!JQ!`Nz4
zhK}+lmYWr&%U1kNUv~&wW&na#qYE>IL**cOL2@<2!e!V@=5p{*xHM*$2-fcubq?ka
ziZ@5h7L@(^2jQ(bN^s|-i_KA5Ha%scW9xM{I+oTr49ir&U9F$JXYzV++cB+skni=3
z+16iihUx!WTjg|@Mx}a5k{W8i@rEiP-q5gFDVVMAdK8JvJ3*)(xNthCg6sH6u2^F7
z7d{Cx=x-%1(p1GCeK+1spKo+Vx1f_fw^<jA61`7_q9^TdqNfyLS(NGLJZ8VyUpA9H
zz;?VQ3b#plas;Lqk~l`lu9lZ_a<GK%ccY}^9my3=tQ>uP`ifTfCq&uEU8`izOO%Xb
z$!}HyEL_HKtf%oDm#1-`5*lxdz(N{#DZzd{`P(P-sf)@H+HrauP2mJ%S2o?Yzx>+x
z|FLA?UpC#!hwTTcgQrAetl^97@t9xw-tQDd=Zpo6B<UA+t$au0=l+;<Z1h%+jtt1g
zhsR5S<na+Z5Zd2k`mj{NKl6gls<;7#OzJX=^nF_<gob1^fW1)A0W8cOBn8k$K#6Ho
z5o@x7vh{lE(-sbUB{936Tk<9-UL&J>YwRQJPv+8Jlc+mYB$ed0){8|C(7CuU>Mn-w
zxzJ`3WY6jM7`B(c3ay@SX|2CDGGgY6QPRW4^}c3i5j>mf0Zsz9TY!1Un$c`}W*M-k
zGRU^4BNwT>v^U?3T%@k)BHW4xxxm>57sGkAvl_0PlC;ot|J@pn7H~b~GVu}<+=KQt
z?;M4Ng1z6#m@Dl#SalUbhl0BFWKD><SWB@@E>BCW5Q^6IHFGt`#X~W1U%UjlW?fC5
z@maU=5u0^2+d5;C*O>kBB0HXKhM;N>I+WaR8jQ0Kf0lI+w1%K!rWuQN`jTaXxht`x
zHYsP549Z-zwAN<no32-K;bgbp6(7wkT?G}e=?Ol&`NW^(OJ244CyA+5O5Ar{ruXsA
zN&6G75Vul=!yINm?QKzvH`ddYvU=WB581LN&68JyE{RtdFyG#ES9^+dZI0GZB?NL5
z-njt4v)O5wF6OPCuZtR&hO7*B4^MX=aN4J^zmXtiW-Bm%uV<_I1Pc4OuQs{U5=DHW
z|6stQjK2osniS#_3pdLjkz=>fIS@+TS(Rx&p9PcJXrF6paONT7O$(L2NxH{5RmS5~
zp0G&Xkf$9ur+I`fhuOAmvk0hSZChcjtKl1K<kc^(iH@==bDYmyVVO+x`FlM(lw0X?
zbrQ9*o;<0b5N(yqvtz2#6*XF}yBbx@c3>;(S5>Nr(>aOf(Pb?m(D)b-{^k(q56=Pg
zP6J{kZFjspDvxEA049f6M2{V?Kt*a1ihwRv-qH-*T^5teWnM1zVqYqG!(IrcV^(Hd
z$gE{5bB9Xb5s6*?-@eI~dABm}E@p0uXRcJ{%3>yOs~L-|<e)MKi<wMb#mo)L+)&KC
zE}pqjnH!_b!i9<(PABojocBdJn-$s|<wWT@g>q54J8x~cwkRhy+WgRx2FaMw9<D(c
zjg`9JSGj+KsDxupnC^VX`drKwhVlMG!3zYt$Xug8x#^b(Ea)R~D0q~=k_dIo-Y9e$
zQ+=UIa_@y7ZFuiJ(%M1zMz|5GLFp|{9tVf;8k%HZ^sDT&JH3ieUVx?2v5$_0?9Bu#
z#Mxjxl|-{^=VzH&!<_s_T+U^g@@u3MpLHYAv{7Sng)YCJRL>2y;Kx={vAv~DQ<|+V
zK&@%qQYX6zarJ!j2Gq0pBM{XQ8dMs%dZ0y%*?D?-F5K<FC4!d@^}~x|a?<2<lcM^<
zu>mJI{RnS@<AJh)G^jIpa_`9FV~)!&nD%@CI$l(NpdX|0QoW-UBQbLU&V!MJOmI(|
zz1YchpXz6MV8?V+Sx~RNb+lx;0VecGvaQgep4nP~dyzgsi`&>;tlnHKsahJ*LO7aJ
zk~hqb25$5CaNxSZuA<AtC2PDtA?`K79m>?G_L;9CgG#cJ(Wv&BPsKB%QSCEz%ONT`
zsL)^$?Xr0024z~eIfA<5nbD|rXbT^Ya7Lrr=bRqpY*uJ<RGaffS_^W@(YW?y>>h>X
zMC01$#Ktvi2YI0A`P6)oMnFT_0vKB^&=dyJVIX4x>f<wtcy$r>cYhpMx~xuAG)i{y
z;vqG98-<kSu=kS5o)r}4p{iuhd+A1w+b4VNge6r+_^rmmktzv7?ZJf~0<3Y^{5arF
zguRX=3pG(VP*UAw-%#YuH1ovTTVf5DkC;<CZ`YKY#*luDa#1b*qXXD;BG^|U*8)tb
z$lor|(L^2*6)!_1ufH(l)^*ykK_l{QlX!<C(OsW1CX6J{kcZ?Is%45~Dhd;duS39e
zSsoZT&LDBybmsd`U3Ru8Nuj%9o!E7u>%<nNa$<GLFKILUvC~bq`)BKh*-xRQ&~kO^
z_`lf4M=aC#zOOcXfW1)-$%GfU{-{$vVcGBdvJEK1Hq$|NCJHt2M^5EPc(%ZBbP}D*
zL!m_Nt(O;d1Ct15`UI)M&7EcnY@y34VK~LMx>-#S7`Xz4hAsZq({jq1Eww1}MA-na
zwvHYESs6C+Gn3`yJ`@6Jr*oacY<03xCmc#X-~BMAXv{kI{7%P?Yf{TO!g9|h>3CVz
zuy2v>D}g>EF=v*IY1!_<s{~Q_m^vl+w2)+jg$|cpgH8E$MLm^v<&(JWJlZmY?t3=Y
z7<6}HXW5|pp*Hv-H5%qN@Cz5A&F%dl=xHdSN7Ik{+O7?b1<3Wg_*%}N?cpC7gnd7{
z41Uav?WQp<RhbRcBi)cvr!*!waL;!?K;ma8I<z4?W#$~GGJ+Rq*TCSDz4wdBgwNH(
zh%nNT0~0yyHtTF7CpaxcxY0vo#$i*Gwnwy$qq);uk#~ee21id~d`Jb81@x~rTQ~fZ
zA5X8;6B{cdr^tB2v%wmJui-Ogep9+QHj_O^jRQ5KF<p^AM8Q#=;xFR6mf9;2^VR<O
zyy>deHEC|a9IO7I5m&C?+(&2UCwp&zcR(Kc7Lez5paZHWjt!;R-!wB1W^v{AsEr-d
z;m)Sh#T_W>&miKX2oX>0bp;cHQ9|%lN^e&P{-ezmF9bUvNyW~`3&TCrSuIw7a7KtI
z>ip{Rov-EQto>Y}sbL}4t}(h4d71U{X(j^&equ7v|K4q7g`g5f4!ROQFP0c7E*p@r
z32ITW#DKi0@KGGpdb)y@rU`na&^dx7fhkOgy#_Qw@m7gdOmbShCwrgMi7X_`jq)=g
z>L4R(R3|xWg;98}S(w4tP-bDaY7wjn64HPFzKA0l#YuggzVl0D3>Gu6V^M0meU!E$
zwRI6m`TY@nR@Ik+sCoeSGV&wRD)q(fo`Us$b=%l*MqC?ppH!^7f0Btzow>~XQt~eD
z(#16P0uBdV=8*4X1y8D9FsfTc#{|8A)|Tv@<K?hUi-_~>vx4^R^)@yoWZj;x_6*Jy
zW5z;d=5d?y+k~_=*^>mRh{7G2|DKIlSfvUsDt_hARWE~5kQXyWN(H>%*K~0?qUA+0
zMA+Z!<cX`EJ{CBiG!j9r3;IsbJL#7u3RBgZi`C69pK9GKS}%5ee7*86vJw|5`TWaw
z#+h;HsHa1dy@#X6UDjbD8+I2asPF<IzNLtGfgw)zb};0NPhJ6Ng4XT;rGuy~e7|FL
z+_rch9|uuu*{6MQk(RJbW_}}^dTpYnUHix{XOTR<Mx>*<w%Jyq6Zk=axo?++KKB~Q
zB!6t~HYfQF%>Usk^aIMMVdJH^XZA!dIMGdJi@U7$N_UuUrOWCZVVZXAqFOUqxmrYD
zg}rsBBOt-$r)zaed+R)JxTj-ps51cN_PFlFO=<$Iq^UX#fr|(e4bO=^88R1Vkw%-@
zFxql(ds#|qrkqVXEn%QF477!T_As!>1$yec6yTqHsEb|D!UM7J(pY#|EPRI#7q>oy
z<!+z4zNh|C1^KmYHqqFq1Ocs7fPVxZbRi?XNnrt|6<AZnpWNN&kc5_La?x-5XgceP
zW|r!d1bi~{i$5{<P)qWLHztJcp~dvsw#_3;^_Vw4L$X?ltvzY6qc{H>N{)n%Y%)Eb
zh;KRcV9R)^@{=k3rtOk{y|QgvUywspOQHl|CA3T65@J<-ylhowz_&nBB_xTJ$>r|1
zdvguqXm2pIWcu4p9|%s5+RM&QOTz1*;bsm777L}MbN>;z`pXt<3JbPSF#muDHQu(0
z=+@EAoMg?c@XZuJ31gy!u-&aO7CV$Y$>rOpc%At<i$vpADBW@riRs0-jzeCIgBK;^
zPY_KyGJ`vj<yw9x+A+E#nN?iAYHb@q6?(k19ZDF{!IS@`4&Gru*TGQ<H8j5zJ9BiE
z?W(GMBx)s$K)vE+p}upPLmia}dDtGKHh*xLs@&d;gnF68W)%Jp82-72KZ1#gr%x+N
zXbe@XdyRiVUTct%jrAMfBuhz*rr@_Psf7>ks}@EuB@|e>QVKk((G<+kDhS>pseS_)
zq>EK?DFRC>=~)jpibJ!Ez5_jd@p9I`E6v!qCrx_3W#Nli73G&G=;+W+7NJEY6evEb
zs)x6T6>Czivjq@qpeqqECO@ZGgVWt&U)SiCTGFVh&a<lKSyjGRNo{%`J7F(&C3}8l
zCXrIojKO5@eLl{Rs>uI{2o+0pNBY;DB@jKDJ1AB;d#BF5VsX3}awqgRzah@l*%~SW
z_AU;*i&0YL?C}e^0VWb^x*tw+!Y#~`dkhctIfe)8og;iz3(cK?eTB4bR7QGrmB>R4
zKJpM&1oJ~WM1a!dSZA@Kk$Urk?5Rfis!Tf#wqo6GjZIOF=lB{?sIHbVYK#=_UwJdM
za4x_xmhx?MQ(}voF&xAN_e->J42Q=0_HMvx>72PfxQ0+gVL#G3T^i4TecaL}4-{$!
z${fdHk}Pp5HBy63o#7@|g{Q==)7;`C%X4*7yPD126tsiw3KjxqibG@f^A-J*eoH?6
zU(@~kYZD({TvIG!y1Y!0zQ@)+S7`<QSz4e{s(p+COm@`ptO{_(Vy_1F@RL1uH#b|o
z+sS7B?Z8jA_G9GrJ#Nq5ITO&IVu9H*RX74bEmx?c6pii7UL5Di>^-mGj>rAZaMAn6
z9!vKiyLdynGp|9^5Xq8>h^dPep9j>z48k&e{5JdVuO<lFNtbif9muV+`Aw1Q9^3>h
z$4jq!QG~svN!SjMj4kn?g5Mwc-#e8q6Yc8?SV-qaTu4TbJ6I#j*`;Ym%Y~Ljq3=YY
z??xeBPvD<0-)<oS0~Ro|uBRB3`qV!ec1>X*9R@OCpg9b*gn`yD(58TDx<dgA{lG%`
zTXrlqI@9lznu+7;N&wU~H~-R!Z5Q$G4HeiL3JIBO@=!469Sx+oG{+F@dG$of`@h?j
zqIuWrDf3klN6tB@nETwpZk^&&<QTu<Kj=ueG1<I>EYGmUszhF&Tn?k-6ZuWC=!8W6
zp;&asL|*bA0`HW_|1cJ<PUQ7<i7@vaiF|)7IyI61Of2elkIhA?Rx!^w-}6xJ7?h8!
zS+zZXYOF|YBClPV5dUt8{K2v4UM9Wmtd-b2z&Om?JvsV75+}~zHPdlkarnf$u2)=I
z<|IMiy6c`#RE|GErwFEZZyu+$mR(}?{MMwQTPhh_<v>89@Xqc#ZGNv{L@p*lYgGO4
z8PSR^*BEtfVW*IEUJLU>BT=|GOsq^4TElRVD9j7PyCw>mFr4U$${i7=B@^y>p9T{O
ze{k#1e8MsUofw7&bdE-(9GmEZ%02Dp+8w)dwYYDuIK43O*b1dL6i({8-;LPL$&}UD
z_1qO_IbEby%7MfXYE`BOsz8j50VEYF2IMSiu1NNL6*n>nr3w<so(_hBXm<nF6FroB
z?T?OA8og2C)z7#@DS;^Q(#<Y$Sv+w!&Y4JRq#EY>k*5b@(t6mTDbv5i>eB-cHh3DM
zXKr%4V_b<ZqK8FO_u$?YgCLUfKtt+B(zEh3{n|d1{-9iKN0`MhqLBYNOD0dBJTAzA
zxLn)0YuHH>P2IGSXvf8ryIV1Lw_>iaG-|A~a6=Un$<`jWJ9CD6QL#}of>^{^9jp<u
zl_2(zV4my7<nr48?$(f4?4Cljd{wvLy63kg0ph%iJ(eF_I)`Zq;pTQpZ~@`0$*W;H
z!M&g-)Eb49s*CEn!zGx?Y2=(x7xBJk?yGxRmJz1_JJdcwik^g2lpuXif>}sL-gjL>
zy+Me)Hcltmg3>tAN{kB`9-X?0(zcOjrF{a%i-(X10C9BKspj2lXQYM+>SdnjI*&gH
zKaX=w&A(2W?%~R0&u1;b%UyR9$p48yj;elL?qtG1$-4UwQQi8yL-)Gb{!UTa0P+=7
zH=>}Pu)u<fHDhE+gUGKRRVQbow_8y8`I|-+v&(?nE$AQ$A1E?rqcu{?_Qp*2+Sz6s
zJevFF>i7^bn6$wpSKRBz&8wO2_3+>&U*cj)3|M0k5se{tp7dKRjTl=!qP71<_iIP(
zI@r2`H8sbtL_64kJ9{U=z%7lwCw}1wkRb1$VBLV+9*PbTBK><SWK|v+cFj=kdXNco
zT9GRiq2{=DXGpii(z;l1^k~5mj%$?IokWW&?VH4)=0-=1wBe5l;=Amrcf#INF9X5j
zOw8tiLmjV+)nT&=o}+f@lSRs4t(KV0=GvhEdW4DSHF?O>)*idz@;14Nzk7J1J7Ct}
zuK0|E35{t@UM+cfa8Of5a>pS|U<#Stz5Q}u0W2ctb3~*hT;qbhj&T|VJrwLhI4gas
zNf0oJ3z$1Z^-G!Y+>7a3pXqxvclo1^|K)0h@f}snHgAu#0Udi4yDR7z@ju+A_!a(M
zRwIAeMJtq!%hm@^5#rm{zvahT9PfMh+QKD(%#5Kjy_1o2kH-%>H(QCeioccRCX@}j
z57qa&1nY5JQR{<GsVXY}cvShhuJV@utCgQ^mA_I$<!VNYGgt`Oh1&2Dx-)few!(&K
z1_NIjFLpl*e{Uu8d!0DR?^ONLlB(<M{laN5ift&|)^21UQp3mwnkk>J$@dBunU$|?
z>fXEq=~MZx%2Cr3NNZ)^y7BWA-<3Gu!k&{2CK3t~La;6yY;EGhylau5YYRw|JK^`W
zRR~F6a0w}V^BMpL9c(1%=%_x!@*YrO%rnZHL)}Dd^Upbx9NeKS2qa^w%2ZI-64EL*
z_60Zc3nR#i?wm3G`co{>WeljBqBaHX!lNeCajKOtO=!&q?<W*+B+{C2ia^waKffz#
z!X}8I36Cp<@6+oC8=@A**7z-Vq3<#qneRPE=z^_)LT?@W2wze#_$PlywQ(!Yj`5ux
zWf`*{CIqwV`hr11)c8^TP~)PZ;F|=ytSw6kfeLB;{kxHrzTg-Ke1r!cP2RJV1KX|!
zS38NH>|~a+JSnK}hm-T4BRP*JMsO<cD6*>v<-c#W9YU1a>|5x2yD-fAAi9D`H{U|1
zM<ys;tosRgeD8mQwn5vsl)`)0`k^5@1zp0r!pXd$Or|ges~zws?5B1<KO^WoLrK~Z
z?PI~dgb24Q`hu*%YY}YQAK?y<hJtL}NE9TjjD@YAwy|*Vh_UeM&SIuvv4?Sc_8dn-
zSf1}8Qj3XDWi~jNFkHAwvd2D5<>iwJRoWcqgj^yU>;RN?CoFnnmS@qI33wJ=wZd4`
zqm*p$Y5kOyt}oCr+2H5oJK^{-AwPgJ3I^Zd?<nE=)^Z8g4azd%5`G)W!R3UguwFlS
zJbJIUet#cPP5^`MJ%pTqEjrNz?DZq8z`yiUmclJy0OR8TI58sfODj~nnx7H9_(LVR
zUK|RZA~H$hcBhHkqeMe-TjRn`+<r>Li`(~<E^#}bfam2Qv=(t|Rton4^;1^dPT_1R
znI>-MIpC@GQ(Mc=2tvmxDHOL^L`>Xf5<u@DNk6^XB<V~onRw>=y~!29Uk_=JD{-59
zn;4&ba}BAFDfOsz?tChVX%aV*{&UiqZEdsX>3_V*{&VnMlElnW;v9)0B3XBpF>BR3
zVT9LeKOpS1+A>0sR{Nqr#H*7DcwUX;=0ChTLMh0ye#-W$R{nf5jC_aAaCoiu+TpM!
zIEuVcf_K2Z61=^YWr8<_kQ3Y;2~p!clvRyrwH(1NYs>S5oY0Lw-h{4SP}$&m4?Lz;
z`<TJip3BdO?mLyFP^)zlj%l?;L_;xab73cDA130(tXb(|-FO0?bwl?U>s~s{X#1Of
z%8D6UZ5NLzs8Vs>FSIhX%lR2W=dDT##q1d(CT71i_?Q@A$Bf?5JqaG$i*-$Kk!mn3
zvvOnh%E}`)N%O={=7^)~l*<f>nzTpF#L*@{jm-wSD?gPEcPMx_4Havzr>P7NlrUT1
zrL<#z@BS%FFkD$&pHs2wYZTR2Jt&p`ohPJjD3Kx<Esg3}@km&01q_ui{G+Zm$8jGP
z%YB`$y0cW>DC#wnlu%y?k@XLBc?wb`ZLqb9hzLy$+GD0h=TBUFN(iiT3wgCY+dNfM
zPBR+|)X5~1F^}qiY6<NP4O*KmGGU-G3^a#<mN3v72HL`a*=tznS`V6^Mb@(mEsjF!
zQZs6<v0vweR8XqH`aiz7A}tkWwp#$|;Q=(uq9h^@{`lFvdJSj;YrOC)EnWF4?-|M9
zn5z_gdwxaWWTQ!on0D{dY!ezbKABcooF8y4cTeh*{eNRMsFQ^~H!_`c5AWQufBtAn
zcMqSF>^a*4=OugefQ}vheTqPSPmjG#l{Ln&BE6rgbKS$ee>OAvd+NI&)w=G<+`+h-
zSm@ceD>1fI)@}?9<?`#;67#UMFKrjQ%-50*4}%i04IR6nWv8P$pLO@Sx)={$<kI*t
zV#U0oZ1Ce|CZu%be@_#NxM+dHJVYjg&=KJTIE{-#2G<=2o958-puyJ(ODdx^m-s8m
zd@|SiTkc|?RB!#Q#qTxYN_*|9Mt$CICV$o>_>+6uy|Z<<@OBUH(0Sn7D|Q>j)@bnO
z`j1hQ8O3UdJ|E&f`C8J>mk<({jSL`4XI6Q47d!50Uh9!)P(FBgrfZ#?RI3Tcom37#
z8&P|9KU}fcxu8g^U7#}FfmF9zBuR7CYlED2Z@=-+>isj=gI{kb_mR6KF2U`>XKzOY
zUn7|RldL(KW)jxCre1Bn<!IODlrmD~+x%b34F&VZ+W=?EJC{)C3>gZ3a}Y+8Xf*^h
zznQOIa=N~m^O*Ad(|#bpY!17h5{~l%wRw&{X|$x?t;wAqR;pHhoN-P&-N3{0yvzi<
zMPmu$DNGIL_!@BT1<h6iTsYzpR*At%(MDnO`&nVp$1yXBwCL;asqX>g_?6;^UKH!H
z7xdPzsgh9L@E^z5l=vFl>4qU%qbB+PvG+FcaTeFT@XA;q6gyG~q)I~JF|j}nwpJLN
z3dewCeRx$QOX$NE0V1!pD{14^?y?`UL<kYJ-Jt8Zm!!0zw`od0(vY-ic}p4yX@LO2
z<g+G8Z+Uxr-_kVcl_G90ZE3E1OXBzcKXc~U=h<D^B7w5M+Z9-P=6Pn$oH=vm%$YN1
z&U_v&<X`&Rn$Wq3u++8&zW?>1b5C&kej;=^H==+m5Jr@$W7b}j-8j|$1wzN2NM9gy
z!W_r00av-LM=v;g4L7f=KlDyay5doF6;{IrjibL0Pm-V0xe3z7w}GP42f%vHHwaFl
z+Y$ANGKscjN>bW%_!q{)gWW(A$Kvj*u?I$kBSwkxC^WM-vkYbK@&>+=kNfzv&wgZI
z8Q*#dd7E!58gEJn{y*~=dLR`#W`sIh`?qhVNyDUfyfHU`<~~5D7jVY~#v}Z<c>U1v
z>R-iM{?MPYb?q`7YDLQ0c8l3I-|ia#*604IB(i%R(i@@E^%|Bi=05DYBX7k}TKpEa
zyQEo9w>edOXo8`E)14R^V2;BgTUJ+yclX~oY%%mWhY)A{b@VTVBh%z9v_)(ThdIOH
z{-7pktN3C}x2yuY?rp8EC0`T(4rokQ5Jg*v0~cDkcYtjnK=Yx;MI(9e(@;494v09*
zS243SVQfZXGs-koodBP0<P+a;{zAH8DGJv)-r$Xw4rcaNIe7G(i4XFf;|TBpwqqM!
zW*e4x&j^<E-?|KqK3e^E_yd3^J^R8u2MbX66`(`nb9G1V^puBVCP2MNP>^`Tat9VN
zqctyMystglc~?D^lM^K9i-hwch|)km%J0l<%%{1$K!7g&d~87a3NF<H4d9oTrNb7@
zg=a4tugnF!KZ*C%R}f=*4w{?7>y8A`eELLs`V<(}6GQx!4yAWyvq_Q`OUr`&`fpw;
zH253*F+{z4EpdOwGlzf%*PJ?q(RbvJrHphkB_o6b8di%HQQZ-mCi$iTT9$kP=I}|C
z%{y5s(WkvxzJ$yrD3J10O^dnUD-`j_jd0D?w`^#_ru6cS0veUoPb^elk9R6S$y!Ft
zOs>^JY_}>wV$>0TOK~#&w??I!^)LMqY?Ji6Z-!0z=Q%$psg@!lq}Klxykkfd|0#oK
z?5PR2@rQrk(DE}Y<%g3qI;)x2m2EpBE;mBD5Zhk>-MG{rUH{${VTq%1^Gq15cQrHN
zS_X!Is*+ygZ>&h$&OVkpRpQIULh5YFp>3xwHa<pZ!%A4dmvH@a$X1LaD4;Exfl#{O
zL1rq6#o86ISPNE`PMJYr<8%)S*^Ze<$FMVmQ91H}O5;Xh)OX<zG4c&ohwOo0n21$3
zwycL)nTJM6e3?AaUb8jlV4Ruh)Xgy?gHcN8V3bT2(?5Mj0sBnST^BywmaBEb`vp<q
z%z_Vc=+FzJ6tv(|1fhZlZ$2(LTF7t;WV>Gc2`ulVSZU!S+d<~&#pV{|$=&swld6C4
z7a)NVD=o|cS*!buXv|xHXRip2dLuM?jnMf0rT-}a*MIL4A>hB@4<MtwXQa#Af?q;F
z{E}$lM`*`)k&6+zHoO6H7wjV@z@QcV4jc<)UYno~y5i;t=n^<n_7o=~IBP;{X_&bB
zgi-W`{B9fCRPdQLwEEg`Sn5J+rAR#>*VEzM4*;iT2F?Q!pwb+zu45}HAw%k0{cm6?
zLUHSZBr(L}8v~aBfF%~Tayngvi_A-J{~c49=h{Xkz-x<HF*1r8$l?>UNE^oeiXop&
zpFrvM4Ia*AcMjo&b|)rC)@IJ+Tk=z*128F%L)Cb6@J8rfeDmfvzwH8Z2n=jI3V`qx
z%Xh<jpM<=-`bk55#LnQy{Al2;Q{tM<+%MVz@I|L!09=d#z`8i7K*6;*J*|`komy_f
zJw>l1_LZHz*iczVyDhdv0L>=hpF>59XUxt*lWB{<<0xNa8ajNx5U6_bTk`2~XtY@O
z9$!3&nGdG2P0WUP$Oee4j2d)hbRi1PFC8((tC#^ZkYj6J-Xb)`%C!dV-E7>tpG8q!
zT{@V{4EgZe!2qhB5DdV8=Cab<V|X`cv0AA9)Y}A;d*u%oVP+P)hxMak<p)t@7(4Fx
zT2a1$&N}2^8{W&3AVeGC@_AwHM*Ddg9t3M~$np4M!+mlQz&f0vT`K|wyj^`cvuiM#
z++RRXeG6Xj=dm^(XZ+r8qF0Ys|La@LOLS#JUbXOrytLFQ?lII7eb(OvFM*GRTEq+#
z!XKj)7Fz_rCrvaNEHOYKPk+d!2D=1=A{q1?9OiP|IQv1<S6sG$K)2>oAV|Vu!J@`A
zq##P{X^d%6<NbkQC5t!7Z%kTekyO9}pG+RW9H?;_p#dg3Wrw{dbnMu>Yp>I>gDmFC
zk=9~~VtP@)b6NxXp--^F>T>~&ZKK)YM}JPpP_EZ3|CqQ)zCY4as4CAvpu7Hu5LKr~
zQq}g}(u4ZNr6o5K%*8sVBjr0T*A86`DaB*NB~uAfKKvV{NXZ5%TBWF3C2e;HS>2Is
zpej}YET)9j+lbKEeQ1@K*xLB8_`4v{qkMYoE<`e1yp8h%$TG^Zqad!iE^Bn@D3nQ)
z?{4NBTq)l;@*OwJa6(-&7X?-C`6jyO9$B5sj7w?tQM^;ZKgH_sOPKiZZ$ljbjJpT`
zKT9)6O9nvTOP@CI*WYlVq?joMh8J_4i4kRAoKtuB9SX+efP2k(_5~(~R(R-S5%NLM
z5PnJFE&O*LH&X6utR!*$VSzVm-QjN$A65(dz@?<zESH9}P^B3UfM4+9aYVOhtKm}o
zm)z`!9*1X3Cry|1q96of!TOA9GvImmV%<X@&KH$IR{aNTH=N5tJq!QZ!)wv(O_4Q<
zkO5b!=$sZEC@A_@=U7vKb+021Q`A9BZ>SQHLg$0Mkco3M^^AjGmvL=gXs)x7>#<s7
zSPVdfV%mA)d=d6v<R1*wi@=PdI_=zyZ1b#)ELV5eThTFJ7=RRhgyjv};Z<NURt-of
z*M<Z@KL6-5uzOG<+`Jp<V^FQUq2wPxL{5JEOUVq@XV>ftWVZw3956=5z%+S$@n3&U
z#L0fXI%Z;R?F%ieL9Tw!D}df9Atl_(>(4cn|4m<s%J0+4-&0U|8^E6Y8Y^F%XXUq>
z%D>N7d0W5M|L6X<1_dEg{@$rjUaxkeCy_=Vx+qRGK2m{d(dFP(NY0ZIxX-DDG_N@d
ze<rN^FaT=B#I_XIfq^ez(H+RMWBz+D^O5-_^!`GP<iYH8JRtphR41zAi*LG=eFFrT
znUQ79aqgz23#3T(dB+-g6BwAD8$i4s5giA}Hae~E9x#{=d8i~?a1T~XRxapkA_ceK
zd+L<I`*UboKE^VG!nEYZX-buR=OJGxkLLRt3(-7B5ay-s)rk+kA{><}o;&Y8`7u;x
zh^&SHsA%x&MJJG)=RyF2@^)9|kO|@|T?t&_-Ge0(E<3V^9MOHP+I{TKd6d1dksc1{
zGxhTg-5J?<;VHQ$7MUrzaR|Kn_l`<CAkO82MHreOZh#PKkjDCG-O5*HM~FrgEZ4B#
zW>kB>CMr}!zvBlb)}asHPN^e(jy5+1vJrtU!2}&*nH%<$(Qo_kT6WKxj<@ZD=n-j&
z@Eoaql7WH|soNlo&xfuApQe9;kXx+%k(r?ybb@PeH3#4el97u*yc&?q0aKInsWi^J
zLxR16n}QENhPR|6u)hVhd$6xN{CgG~v;h9spt8hcaqv2@oEFSj)JzSx<BCapSaz#v
z+kkBX?E%N;&;)TVM0Xldy;!I7r?U+GPj(-a`_cRM4qrI@Ld_*!(pL`pboNb(@mnAW
z^AS-Tp#j?e0^9#Q+y5My=L8#ll1LM+lb%o{ZVsNIeTKP|y<SG<d6S!mi%C;}ghDq=
zx{9IFx}2d+;>px5gAZiHzAVI=-a4?ll3?KgN}@GxNs6<AIy)C0M?5%K0N_kSAq0Fy
zx`Dxe<7voEyllbg>$Q3}If8Fc!T+fJMCPv%`GOVg4l@8yB0u|~cI-J32S9Sg*6c-W
zp;~9rd?o#_XxC{z9l9JX1z2--M$eI45O4?tsr15_Lz6j)`l>UUR*m*I*a0O`d-WH;
z%$Wh8h<F}nQf`q{aDhlz`x<D&5O@v+<Az_Rz+;P4xgI5L^YR7V*}(qCL24igqPFUQ
z5gCK3?|(|w^$Ta9N6L&*V}=jn6G?jM3KSt>WQlo}RLl)SN`b1}^{l<ksCBt(@!UXP
zQSj06#TPCn<{|~#bOoXrvlmE4e8cWKMh+pU=XqP`cpC%_N*cJbw8^2I<T<|B@=?>^
zHeI3W01eU<RkE(S!_%N+aeZ7gUH!z&ZQ72s<gln;A*gpkYeOqTkR+P{LoqVzA7BK2
zV-B-G`tC<8UTFDIH-QdC4)PVoS7CEWLD-sqU0Vxyr~?Az5oy1H`wT!8msaHEa6T}R
zwK^)WLGsz*F1At{Ek%eK=_!NEv2{>>bd3Zg(P75^<6@3xJaspeK-f_8*-%$4ayNvk
zo~2AfDeU_G`QrDHkt4R1i05S%=b6!b00Rh_wK7Zq5Vi`Q7oX*R9k9h9U?q4nKv1Se
z*2CFTSp=U!dXMa(0J!rBurCc+U;6G^YhjW!Kr|Rj!|hyu78DyibFnU2wpO>CIp^Dp
zD$p5KjAcNw^GiC$)*Y0+gnDz~>e1>a@xfJ|Z0ySF&oX;Ko5+U^8Z@VV>8NnbTD2>1
zYlY9!<)EZtY?~sx;%nXz0U{4xXk?0v`1(Lr?7ApPWU?Fl(1gn^d%XNh;0SDz1EA3j
z*i~GAHkpZsvy3n=^y<g8(J#z6Flx6U2~u3mx5FD>@Y!Tf63R(3iUZ;0DkRp{2xP%k
z?a0H4{2o#pEF<lM0XTw1@wyyT1YVB|@~-8U*@Z^ys$brM#WXHM!teUqQ2is1DN+}z
z$(UTL-DDc#7*83zE2(oI-Z(4S@fpk40nhWO=Xsy!dEWCpg=Y$NmQC6BM-Ol0douqc
zZ{uGBH-z_uPyTp2^0Qu9N*&&KyD2)qBzHO;yT_D2_F<EsoUfy~8fz=UV_CwJzg&I&
zGgJW*y&<o@)gAut!0fRpEO-_lYhyV`Zbj|bg(56KWOMNI#+~?H^&D5da`;@q-^IVj
z&X=mBNfNb2n_=Wj>oNA;>RY&55dFBe%!0ytubmiRA^qH=#F)g}L8PVedg@fDXJo*A
z9pE6W39%3XcVM#qoYE{0acm`8eHGK+W1Nx}-wrL1$g`_WO^DVlOIOza-d=k9j}5}t
z8=UsspIwF(5VCzvaj$+FZ$juKGDirVCQ$SeVAC~ES8qURT@0hbz+x?6`a14fAj20@
z7(ID-i@p%3z+%H2kfE^4zqEKAjwFa>w*m7e^c0!JpM4|++C3UT<In(6@fJ^{UOFXb
zGg*rPdUzvwxQJbh0`1SVd~OIP17-)qm<OIzhg6YerOQAK>?<-DdG%NbV_7RPTr$qy
zm30qCi+Y9N*!ORn0?LKohB7KVV9GxB;aafn+G~9;mp%#rp<{<(ss>^2MGkh=o0zGf
zeJi7W)nhET_?c@^2son)39JC+2iT$#D1XKjo@Qb4tF{wnE+Hx~qaaYDc(p7BipJ~Q
zHV>ihF{AhxdJv8&TuM9)?EIbhhU819Xd1uA00)&J!0YYAtUM27!3g;Q@L%uZ%&Yxr
zKkgIcjxT;eKZ*o_YXx54B$Co(u)BV;EDJ3#T#o?^>Wj2%LIL~S;(2cMJhyqC$=^1A
z2+txlF=&{FJwSMdD5|$qlZe_FG(yHcCEex4lFnT9YX$<c3MeBc=D<+}V!~8ta~)r7
zJ$r?UzN`b0*s`a=X3N-?CsJ%ADJy?foD)G6=fil!&-~IaDhQL`$SQQv=QavV0NmbL
zy7GnJLV2%M#1NqF$dz7*woe5-pnd-rO^16hzWNnn{2la*+cK4|K8){z;4RTFbFDs(
zmfkv+=ji+1P{`3&$03#`P@5S}7i}k4$dAK@Hn6Aayd(WZ^QsloA2vK=I~rqRl-*(2
z=F=nrvI-B_ET`!qvtRRZe}0fML|;TR9mUrf8S~kz@d~w>&a@09j#lSU7+~btj=1><
z&u}&NnwjGh4{_#bgG{t+UVRj=IAw6;7|eO4w6got)yvmo)*vmE>*t`e-(wQTRM6iA
zto$<Kf4mQooPmTi9ZmSl!%*$cabxl+usfgHhdRZJYAV07<S>VhVNF+5PH~#R#Iq$U
zFQ3Qmh0Hm=*epFI3y<oTW*dR#UH6h%@m<zC$KZVTXsSi5xTjzM>eQ&akfmm|Jg~G~
zm<+26!uv~^-#X3iMH^|3HQOjOk+))bDmS#X5VoW0a0}LW85qOlEV9tTb3@zG^MZ-@
z8;Uj&i4cK=9=&<J>CESU4k$y33_-!vkg}miIBb=V9_2Ee-`h;Ntd_gqmRo0NM7uO;
z;ki%_=yHLB<Ku#ONFl!0U5GJnm5b5c3VC-PGBCn$;(<cqtmQWYBbm{moKI1;#s|NY
zw(B*jzz&)MISq>m9~N(bl1(beD5asX?k=7Wg<A8spA+WP;mgZP<iNpK@tR9J(2mPU
z;Z9%ie<pmOr?WlT2Pua}4_ME#wA7qr_uiwXKey(&Ij>v;%-mGSFg1K_e}MuFNVDV}
zb?go4dH%v6E_S%jt_FoS6{0XJx(mjmOz>iR5!U|Xou+zxp=YXDs!Au;aJJ2lB~s#$
z_~0LUp{=kRWU>U;k??L0@S)Ydarp4q1L*k0OSiF+Pd@e>6K`cgwD32{ghN7DYNXy+
zNDc9s*S(m{064FHaY8Yx7sDEco_K~@#Yw|xMk{<|0>VPN4@3a5N8iP&A1A$~PV}a{
zZ{z!gCz;h@z81;Hg#xZzmF$*tzzyPdOSU(%_-9GZ1=R`7`c1%UPx>6#mtlk@&0Um4
zu0FysVVUEcc~9>^bfA|wwhukk25ENZ3-^Nr><Vo6<hLQ21$}pT<K6g*_aDa}{t#%r
zD-6DUrM^M4&VSSn^*{5xZF<xW(@%Nc?s$}aNV0sy^LF4-b|&Ax-}5%&>Z(z`g@CO=
zxM4*Ved{>~KEK4PiYY+qA@zxJ2(g&mYqHmfi{tUdPhwMugB62qrF>6w4q?+n3tuHd
ze@zC%;AbSH>`IllqjDt`o&rl35g9B32xkoq_-8_F-780|!yuNuR6FeW;&D>ROa?U}
zY-O@`e}FuO^WuFZXT;}rf_i0ydXP=9glZ_=OUrKuQP?{S-@?DuasheWk-wsq7=*tI
z@8Gpe#w_+iam7OeK8u`i<UtsN-Vr*TVz9_Shu&vBs^;@|qHvU=J1}mr-9lS6d$|jO
zh6B0D3=lM9;SlR^FEZsOTT|{<!-Tdj6#OJCYb+yBPC>Nj=%w`YB1AdtAHCXdrLcL3
zW0=_J-VaA?D~(GpbKm1d!hKPU7WJ~{bR7ura#gmKf6mQb!9TUxck<60vhU!Zb=eE~
zXMOep{#lcKBmbO(2nP7`M*m*F%#x_7(8h14MOP>T2U?<PapN~pg>b(e(pm`LqJ#%S
zK*D~2V}WvxC5**$D_Br>lIjk>k>3H{L2h|4-HhDu3Uv3*T0MJbt#<DWa+LCuduL|e
zwVP+(zy&kJN`xcl!MejgBy<4fMs3~UMWm2GujTF0O*Dm*as2rInHH4k?q_QN1!YjS
zu!p6j&Ml_p!a)?#Qqu~?=0Cg*s9Jfw7m4NmLd4)L(Kbtu3E)RQ^5M74{SwR(kbJuP
z#?C;`T>XNfK?{+^_OjV}oig$s#@R^7a{<h#xx29qZIwO<@c~s0=-(FpWiR=M9$sMJ
zNX{LS15AMJ_H)D#iKsn{mdKy^rCQ|zn4Lrqt_>|f_5FDeF;sJOupZ8tz;Xa1*IVc>
zP}GnblZ@M+Xe_5au5Vz7K-+LIlcif4!B*UZ1qg?=vR;}#c)!w>JJ#lIWCL98@_->%
z06^2xwzY>Ao545SJQIZndRYjD;kB?G%ho{m_)Ca~V&f4h9?LCm?F)~~0R^@NkFd(x
zV80!dx-MF5!Kn92nQQmUl`>FLG4@VAOx!sVXQ>cg1xHJmcY*sT-{bGi{98O`=<~l1
z_BY;Nz^~G2_$!^L;hOnpO7bLeVo^d=^G{sh4qLd=sRU7P-!#Yr?aMiJp7^*J6<}#@
zs{wigB$7U|^`Wy!GwGiMu5)KFz|M^c>~1FckUVtqlDZGQ1nvNpaI7cvMjq?I+F_td
zvB|^0MbNjrgtJsYvLH<LI&*JsKC3H+5Htq(0)J`Iay1|iS0Udp7fOsPq|zt%_wt3O
z0^)(}R2@QQ$El{>>&B3ahS4#o8*an;ZTtjzrNK3Mj^F%}-0x)yhK^lzL`cOvMm*`3
zzVOfAqn}}917?Px%(XNKI=JBPt$Mr)bXfXp3>bX%60+@R?Ltl6=Lgr`H9&{@fwQzT
zm;M1Y=JOt3bb!(d1Y=;Zd{z&^?l}#?IA2aY!m+Hw;JSSr2IlbPcZ7tX;BX*&9Y7De
zwA+MSq#Xz6u$M59RFvCZ!h8dCHiR)Oha&Y$SAzzHgdq=1NvQI6I{Htk7Zwk9EZy&G
zoG>4J&=EtGR9kb`0Nm3skm?@l-S|Fw^0y->RMl6nKJh{2=&z!<(3RQRC(sS=TOQ35
z%fiD2uJs;3pC_Qt`vBdkfDo$~fOw)!V6A%??*q$h!2r3@+qVUS#Kc&CCkNGvN5Ihf
zf#RDsegm#CQV%5lteMRrL!j@9S(03FA-K;-Ydokp6xR%pTy3!5)-A~vkH``)qg#wP
zUU=f+eRchTFRVp-Op$;7y}FM*fg7O~o^ATl!ZUS`J`O`0E`<lkM<d9|3F!_C)ZDjM
z|LCNCh}sX-A>ae`?t)sg@61mm;_Q@tE9tKm4cS9I0k=i6n(A*l*|i#nbbr&i?#l~L
zV7NJS@6okK?)z~Do=XO<fc$`hR2|}w@!M@M^QW2TROLk5KJgxr-{LymWU>Hq&7(C!
zpyP`dL4=7IVH2^3X@eGuC_zt|Yws3~TMN47B#|_?DW2qDS;TY)MqqZNd*S<1^$f&V
z>l4;3s)3dloE8K4lXaq0=bn&YP-KCoh5y5|aoA2}|BG{<h@Z#KM=gtMZuH}Z>GO~D
zXX*3AA8~ND8DB<_oMH_P{wxbUj46OW^X`#K_^!(v>%efl%^l8=px`o`8CWAgm;yRz
z(ghzObOV^jtXaeHwsnMqs$W9zCa7##SktN(`3!0RgMoF+;!}mk>i<_>3u4t@#<OLA
zL)4Q-XGZH6<%1A}U4)``SdeVk0!GYYLO~5+8QI*2ej;+anf)i-<lgOG$O6AUDp|k+
zoWhGL^}nRu@Ogs{KB!tx6y*b*Ri0C1Sq^x<#Nlfjz;|rM0BgCAU+!nQ2UzZ5I=OJI
z+Ellx6L*(w>cx4+O(<Kp>1MFTrU=e&Y>Hz(+myuttW8kbiSON(W&^JsTw+~F7Q8!C
z;|q)A$?K)ii%>0I(ieBW&<erCd`&FukU;2c*HU}@@J5G{3qN?=tdF8f!k0sUJn{j2
z3@!X`umSEUU*3$RDf1!ZwOL;`nP}7Q>xJRNEm+zzPnG-9lb3N3<rdb@lf}UF0DgF5
z13`+@*0B$3LUeiJOvP61fuH=%A3=B+q-oSP#Y9>IlD@z5DK^@}d}uV><iKWLZqg`A
zpoYu(;C5)@dD*{r3y@ND{ni6J0H%br^u_kk6+KXLQPCoV);VYS{itdO=y-hXmz|e0
z`~(tQaM2r#2xy^N4<`;lZVS-?91n2js0U*Ypdc3rGFi{-rJfgjzt&R_QLPN{h4TeC
zMB)yaXpLIlf^+@IZWQyDy5GbosXH=F#ax<ylzIwLgSC7UA4L-svz>dDniAbL3oPFX
zF|Z>5*9!rm!tY@kr|>hsJV-bT)kCQEv=H+jJyq3wffP~+^al_xW{{%8d~1g_dqnVv
zfqRr)<LzBoR(%V-5EgnO>~cLs89k4fT=$<VR6)BhK3e_jOypO%Zc~^39xZ|pe(-Wo
zd||DLhrPrb_%L6|q`LGOBmfi>Dijy#0WN{+>yCW5_yejSi^G?yXeH<(hLs{Z3us*e
zsC@JihXxiGx#eET!T$HwPP@Fjc6;AmrQq_#V2sUGN2~v|ritg-H`je!SfL%PKoZY$
z1_*hVXTLctBpxl8I~GoW=hxMJz8C&FGHIat1~Xyw4cG}okEHme(ZVwvl{LK7g;VnR
zo<1^0uqz%1Rb`zg*Y|jrbNhfIX&%wPSk9qi@S@c|w8;ay8JfnryzaD&%MPnw+QjYy
zo^?>6BtWfWwsRJ~iD~`o|6=s0R`x+F^MxpJ?gBtBJ^u3$T4!DJ(Xx|97%b-H4QC-z
z$I4`8T3M2Fn47}F;vOj`UkYDp`e^m1ZfQiz=i9JO_|Dg_CwKmedGi1e{=9i}$h;Xq
zo*wh&R`Z6ZasTmaQfkb+xfi7_FmL+In<?a(cvkYfTi&#VCQXLTCc{2tc&B-DiDsz%
zhU9;<NsgZLO(c(3Kk#2J3pjs`;f#BB@kj;fUIIQ|{YyyhGhaSrzBJ8!OF+z;WWy9e
z9IcL-q;u8@NxsJ<TR*|f$Ezoiyw8ByCtm^&nhzHt1uO|+mnl;J4FkWyBwN0Vq_8%6
z$#|X}J%1w@0MB$#{42Nu3(JrxplGV+GewQe9FWq-7qg`^m4>+ES4%=Ho%v5nLT+GY
z;)uEzzxZQoPb`|Tj7nY_^5&1Nhz90IGz%7DQUYGXQWHnW!}&5iP|L7!Z{R(KI1YO}
za85w>=b18}YTZu=@6G`0`A=uNpQ-~(yiqUzsmA@ZCZMNDEWj%FQ(ZtJDd$U_<$gkB
z`M;44x24v)pWYT&ddl~y+Wmwe@}Ks7I@kU5rhsbr7T|hpbeksE1eRy=IMliC-w{}b
zv#rhlX7~Mtf#vS}`=4>&UldptLz|)7+uir;0_J?HdH=Jxi`CTI0D5`3kv+U(r$tug
zw-w8Lq(qrJU!WvJRVB>hP56Rwh>6NRgzST8K>Rdd-?Z`pFXH@5GtO=1&+THGyMs2o
z5Au6T^JV#$5Ju$z*6vwwr5sBTx!tAvwfi`^<LDQ*=wS<7`WhB!l=HLT(z6-du<%R+
z7`j&5sYUA!e?$y>EdF6W(X#HV>#H9&qo$y)F)h{veN9dXjuMA@Rf+J34+EFtZ(Mzp
z+lVV}`W1!lzNL$`d|N(Lkb`+TRfSyHK=uuI&Qh7nsw><A9$5qOGiZ=RCF_EXiVy$!
zcjV#R?3P0(YwM2u3R1AB+yOuHV|bKOA(U?gneV6)z)M-1C%ch&wFa`X*agy}iqgHn
z%<T6*{bL)W3G>?r0r!Iln#LmqF5J*#Z$>vQzWBe)WI8~A0|DBlxj%rPc{xwO{1Bkj
zwv9y@3B;m;Vgr^(5tu?CSVT#Z*8>=H;2~lTd%k>s6W@ezAYT^MEqXgC!UnZfL%BWt
z%c#rbz>6JK=B%`QMF6=2`7dW><@P)CWo@=2|D`&Mdj?qr0i11a!ZV3;V8lS9t!E;7
z1?vx{(2xAXDF=UQ%pd)x1^A76j~qNeGe1Bkg>N#{uF$dc*?edT9s7B>vOGc8`u`L*
zI{GNESkJzGUM`e*xZc3VZ?qCc?%FAQpU-A)2y;qjYrz~0M;b$+`lEqkyk!R*3-V8c
zx~ae&Z@}f9De_zj4Pj28oWiH9`BcP?@+o@`t$ufC39!f=WIY_ICGb{#E!^kxj!?E|
z_$L?(<AQ)LQ66(mdUrlW`QuL2dD$hi4_i_&Tishih?(O~D+|jn-dk!`l=+qwg3vW+
z$vRODe)NZ@oq6wkfooOICWcSXt-&|Zb1x)qDc#tiXarRDqlhwrN*<XO8zCp&D{wO%
z$%ZAb{JLi&%X_ube+`LN$|?<spmF9mPfk+_ZJ8L|sO0NE@Ks_}9pB^vJRAH7Lqzfv
zlOYSieCk6!65>Fc#hQ05pm}C<IIl~+(h9l@E2z7RA-a?_ZI`+O<t)e+bwq<$#_KnN
z!IsBLWW-@|Z_bC16A|Ub>lVm+LE<iloNZ6rrMROTQ4qxxD*2EXQVW{Xf-&^D`r<2X
z<NjYPAmXaqShwmn!jQkZHlA15MtBw%x3SdeIIxSW8aTo?U>C<Xqs|^NEyZNRX%g%r
zGn-?`9@ufA=@?C$E|d;1Zysu^<L)p9CJZM+^p#3dcrN=&%1uBV(pu8E8i>u<t5B_i
z=N~-$lXe&O23N_F=dHH8-cs0IxFe;wyPC+7lo6CYrN*?o1bWY*g2w59#>|T;hoNwU
zs{R4JD#(GAAp_(JkX^y=;!VL%;S7wwKqi9_dj7Y8GhX}zNFDfv6`KoTQUWPi3j!<N
zVjzO{>FPhm?Q2|@UiZH*BSJI`A?o`zND(RUTlFS9FLJkZ@d{isf-q%m@^SqY^5=p}
z<WKdL|9V-VUD~AK9|&ymj*l7)h3w|=l`?ICYTmoR*<=U)73#j`d}_}x1CYx3R`LNA
z7OLK2(#lUt$4yM0Jf|G3{?db&%GSi&u(JLWK7;7L(uO(cc=c~1$sas^D*t$oeLPy-
zh*pJw+VUl4K43R-VmR6chU8zq0K6{3<F>moAAbu~{htLCr4!4=vS_US0n!pZT3l&>
zxe+%<t8e{Jk}-SGzFXdj;y2+f27D8*RM!K8qJr{jyXtF8egqy>-<QxrO;u79aV4Zu
z8&>Fk6IJEjz39f{)&GKT()gp*KQy=&pzu5kuY|&rB|id%J8<n3bafYnf4Yn9&Z8g!
zTP`pt+-6ZYUi}c*NU%Yac70rY54Z<J*~s@xzaeB?{~*EPT?iZe@ExpzCx`1n$iy>7
zQ_sE!2l+m<n!G^yL)W7Bj;<d)V|KerTEFFtS>a@X-p}3)xPet=1|Fxb5j;+O=uAz7
zRZ3`ebp7w1F)!Wo6_JCh$_zwi3?jSEm|r&z(cc@XfJ?97JSED(9*livn(lXD&wuf2
zpA(+@+g~)j{KzxFUwktjqw#$4%iCW%b-enV@0j6uyt>ML`nPY}cmLu({V(@v$$k1e
z_vyd8Pk-q?J?lPw&3*c^`}COm^ac0nLHFsi`h+3#8GU@Z`uz<UzE4*V^94TKs_nw#
zO#box_VH--T0F8Fa79}6$s>3Mm51s6cD(xgNSfZP{;&L^xxT8onoX{U^0{glsYr9Z
z%-}hIRbz53A*rzb_z#WPV~xMZXXN_s^HSq4BPqEK>2A3@!OF>0IvlR^o1`(FcukF;
z`iw|pG1`@0ar{3=^EqVxE}jdI>p}v2vkvO-8;v)bY`M=bhh_fac;jbUH$-(8?f=F1
zn@I(tnBo_D7)(;ss<2Z*TPR!lFId8=_mByo4;69%=JFDg;tIR&AlqgCEQGeMRKEah
z=z|2>sAE6|nbt7V0uWgqqRWa|5DCJ9YzL7go_6&QMA|N4phT#q@;X2VnRV8`6XKnX
zk_m<ns1LUX$)@CevbeRg;FK}uJ2d8d;wDU>FE?}1-o!aDB;AaMHa_6*0GIvvOOLC0
z<{0G%)`A#qII=FA5wbiV5NAL(3A?D=uR$NQN|RCu%OzOCl!~&zx1JB?vBo}DFa4t-
zOxx1$>o<7$7z;?N(xC1LX-WwABy`xE15J?x0oIbLqjZ=Um8B6VBL_#!P87qV^Nc;d
zs!qqRbq~?)N8XBtjZb__&o+4}rUS9xn3qCP20bxVf_wM?Dzq7z*B$B9jmH7dUH0y{
zc*w8HK|u#i00rrDhg}?ZPw`d~tiiY59Q{WOKU4*k0mb;_z$&(*F6%9KwZ50j$#$G|
z&{}X|rjdp^AR?A=hLKS{<d7kut_gtN!`#AofW1pG3;EQ!@q~SN&OSWP2Yh*ne_>%e
zCHWp_3U5#HFA4F0>q+=#nSeV1SS^Q`YCWk%Bu-*W@hnDYM*HOJGuG;NZuaemPM*uV
z1<%fQF5L;>FaTyd51qUz+rOMED0+f`;YicA7Iqm#^~NuApYd+u3p4`Do$gaRv3xv`
z-4=ow=<%v$hO_qK@jQV&4~CN~sn2uE)%ff>K-5M6KbxEa??M#Qw`%P<X=;+eSa)PS
z7z0^eDmL?=iUyJoc&&52Y`q(N?ZvEd;Xxf!6zo64x+yTQUn%`;*t9mkM`(q>8APjy
zAs-8VZl+LnLM;|U4XnW$8BXr!Uc0f>T4`k|UR+gAQB@+a!Nj&I6Ys&dC>!Du1qLDO
zKhN=t<hQX!{O!LBEj)(<F}@5ZLv?=yH+y-zXt)?;Ukv2lge$V(rG0Ve+4#oAd2o<8
zT`j68T{29ySXHVZ`wlvI>4F?gi)6w1IAAW<hMtW8KA&MfJf+}&K$<Q-S$A>ZbnRJ|
z_DtN(7A+F43_3VWf&UiQ@;Bp(<5`vsG6j5(X*d<RG*}jAs25GdReVzEcXADjzqpp!
z@zJ`qd|Qf(*ftF(p=E%`kbRM#pXcB`x!lg@MM!16t^Ik?;eX|EK~A7QzZULGZ<BgN
z*1pJsi&6uh3|NYFaI^?;fWTux%);Eqq*8t|w$~Tc_UdgUR$ss=j|`fG3Dgl1d0NUG
zt_#oC^;Cwx*ut}$;P@E2*9%>C5MHc%2%K3&LDMoXT&(Swi_@Iau%PDzA?-PD!S6~z
z5f|(~7=d632ra<g0f2abw;tyjkj^19hzMDR9g_1!m7E;~f^_An`W9mmLD8^tU4yVm
zL+IUWH)h^!3P7cBGKHjmkl&y%0OGPLPYT$~<X{;OC{f>Y&sk9e47ohVq8FH+MNIXi
z+@Ysxywu#lN<eg>CaB80xqMwEB=vRGH%fFB3c`w1qPs#1a6&MlehO>3+QSg&1q^&4
zjMfF+TSP+<2Y!y#n@=(+Grw{@@%NzNvgV-|(0$xjr&Y>!-#>77&kz(U2JKj)ihh)@
z4?R`Sp2y5z*z*8%eDT42QP7PnK{JTi$@-cp4`mx=i{yj^jIrF7_n7}X=>>1UNC2i6
zt#_)?hft1ULa2mKR%6b6M@m0!^a@OSk3&wXPg)7Km7{8YwrwN;uo$)SswXtTCW${R
zt_$|F+G)A=b1bf0YjkFXdx8l10U4hCtCBqXXFR+{o-JTl?Q`R{ODeQJk-Jzp$wQr!
z9_swL%dXtgJVEqW4Cc|5*wt`X?yY7XpYj3suqitr`wqfGbvk|o9mBa*g>K}z&uiWl
z(J0BMpCdz^MVXUl(r>SVNpIJ3MI8FPmqX!X#O23JTq(U2oViH;UVZQ_by!5abZkJ#
zb@Hxyv+;O?d~MTQ-EOY0NW*Nd%O%%7%{AfX`m`^X+53BP;UtvCm**oJU#`Q9{PMX6
zYdP1yeCY9(<r;nZIdXFwhZDwQmXcU3>kI{A^=UjfknjOB8{<+0@R=jyq{$9(l@eHV
zUTX&WkHKKN=FEMCUG4<TBClTEt)=^y-mZEyrY|t#vx}6+Eo=$sDi@oyFbaSqxxWfE
z%=MpBe-ZCDi}BLOfGvwPadcp~*Z^yXAOuw?6=B@VA;B`(s)gd2djkn{E$DZhacXZO
zdf=1>us7d=s@GxH26@2jh~f@Ud?c<rmo8-2nabS)!yB(NLI%VWv^XWHNoZK64@SWf
z4OcO)7y4j$wn;Sqk{!hP2d(juj4cH4mW+&K>`3blv7dBbR{HqA12Z_Y%Iu1JwwT2d
zbomaKnh;wjlmh0R1n^+VO(zgI*PIuBGIZ9>BortCfj)yFF|lw~sq8rAj0SkJe+jp&
zLv|crY}Z2IHJ4~`%`s-Q1Zd_GNTOVzlQ9LE;kK4FK_w9V=dcYnjVT1YvMei_dYN}&
zeGr9A1gRuIxwY2#V1^K)7kyK}v9#(5$W@=a){KS*5#K&|#z67i<yMvhSg<mRsxpe4
zXc0=8Z+R6>R4FAp(dSI~=^s)`8=8Xi@-2vO)Ee2>HR&@n;Lo)IIR9S=kWCSMv*MNk
z!@%Qfr0Ycuc*@avc16v&ji8|!OB<gjJz?tfDaLD7uNa?CU;?CsYW%C7k0q32NRE}X
zcNvU}I*B|F-feYJ6j3Ig8Af+ElRvw<NOza{NEAwfK%)v3%3m`G@>>b~%z+5V!IOck
zun`t=)rUSJKGrWSRNslG<qKc{jpKno$E)9`Po@iuf$KTWCf~!Td|C47UxvM1|2L`2
zAo8m3!XL=ImwkcyUL<PxB@%TpcdaC01*oO9?Rz<C6|_5Z(+29OU*67H=6iwMR?X`9
zL{DVi{Z#$4tco|7n9HB)j?7?GiaJoe#{J|o1L>?(cky9qWBcCrg;VW&dKP}zKGL)B
z7wyBn#~KIzXk%a`bZpBB{2l7u^!+RTTj)zaItx=&&0^y_up@Bfe`YVT<$D)?(7W)%
zPQW;I{$Ga<Jy{jHdO7z4sx&v<(tdOME$#1ZAA53QqS@yE=O^>ebr-h<By91IAL9ac
z>G4JYU-+j5O}1b5(kbY{&{1)Y5aSMWB4Zr?_=;1DKfDw<58=v*yGKF`-yb4sAcg~c
zaUbHT>|4M1;%8HVx{Euhk1f|A-p^5>fAUoB9|f_mJjwTH%?IBpU}}(F>8FaJzwr~C
zN=`?Esc?Kc*pZAxgYDfT+nTS~);v1uKDM+lwJUO<J(a@eG5L;{EiLc5YOJeg;9Xa4
zz3R$s%+QfcM~9NR^mugOz+|v597{Bhr^IJ3a8qNZsWGzY7N;wbji#OHWF!}lI+rwN
zE^!9J=}as!iCBC1ar5;?!!yxR`JAT4*-a+1H-9nQ_VH{inb4f4fot+9*xQ}{6pLlH
zJ3sZ$?WlVsaUhXAm~h6E)6?NZ#7U-|q*UN+cN#Obfv&;9{y}+`=D&*lu`?HoM{KWz
zlF0)Z=?s?;hG6W0+Cr*Jw-_=zTb#Zwr!$-lJ43Nav|}ndegM7YG&{)yXrI%Y3`dwA
zo{CD2a5k5Yx@DT>$3fe`aP?q04hV7{oRR`H_(vBf2mjjeZyx_7gPY6dXv2qj{Bu8)
zEIx3<;Lz~Mp1q^*x#{NAt?A4>vVUge)G6}%TGUn_s9LkOrrxPqEgok?^voHm)}T)L
zRa0+jZv$2q9|!G5yQ<8adQhTj%~@-!YwF*0-kZ;FaN6eY{DnhO$|8=BXP;9;ko>pC
z3n?&<cX&JRtBncsA6iZ*hKiNG5KgG{MP*!g#s$U(gtEga19Gpsd&udaxXa|GGmepD
z{@+fZI~<D#Y6An|4A1UiI96mFC2VC}RmPQPTvf(J+06Yr2GY??#tA3poCDE0C!2(3
zn#jfyx#+d)1CV_;Mxm58W&(}l{NuF8<4$)xoS9NJI?&kC8lT<L*m9NoYwK)d%gX-%
zrDf}=0~wjVJP?WQ&rLSRlaqmim+uGo+Q1N${Gr%wQRf<`F@idTQz|;*>n}fR17qEL
zLX|m<Y9iI<vY6A*9gUe5jJMYKDAucyM*M7YIBxlm0~SNJ;HNg=E5PjQF&ax{1o&5R
z{n<W|>yuSJZ2?I1aN$1@9*2!#A}2B>7@o*YP`FHICas~sU7of_A|k1-ae)8qW~Vcm
zhz>?4u{4LQFt3KA)2aT6iA*%>d!_P(d1|fL3OIvNvrd%?OKNk?%?|WFN+hml2b0sG
zBuo@L<H_*@1^JP$qU)8{xPZPs5RZm4Q70+}rW7>tgUNIRGhM{VPDK+=O4v!hHXDtd
z->K*~!q^k&Nu+XFr#pr&2ir!GMZQ=Ddgb$;$j^;k9Xn-cZtU*q3=H=7^;YJ%vXZCi
zz(~hHPv0&x-AOO)Z6Dm-vwN4bfqg$b70Wn1)8WaeGeO>nB%_(cWm#uBoE@KX#&hX3
zILaBC%VeX|P9&OvjZDgQCt(G3a;Zo-8+Bq?=U@z)6uxKENoZZPl}VAypkl#HITNPM
z(YZc42fmY^y{yVfB(qLBO50%+Y%HRSvS|)BR%d5V|B%fMx#bwe?vfiXp;9;DtzL7w
zS$0d7TXR55KoW{Od@|8^bUf=o+B(Sz!PM9*GYHy_9}J4F4l_*hra)a4i$!o_dtXmi
z2lL6=c_=r%o#MLXs!<tHG!Z*{qOkZT6R?1eHbXsx;)m@0U45(npv3}#d}pC~Jr;ly
zOE^O}4mlWb&U7pzofVA~WZ*}R_YJj<Q`lY8;W=kNx}d1Tl<bc43OmRpe)pOCr>jK&
zxaHgBW7sfF)Cq&F%#@}UX6p74%Xs{{pA%Tdata8o%sLbW_ePC&Uo^jUCBpmT(FhcU
z&RE7g8sSx$_sVD9Ya1FE47Ba(!Y_1ApsllKD3D4gC)43+bbO$#qpy>Co|SMFou!O)
z`TRI+?`R)!hH|M?GMzomI79)-sj?FqZvfJhvqfdiTpsH)nk}mK;@8)4F%mk(x96nW
zHi2OK@SyzK9vBI9BD4P7-uTW8dBV)T?U?wduuVD~P8^U)j8i&SO3ekUJ71FfjRkP}
zdYs{du|%c-2&OwHIvbu&#iN@YqO`q}JCl4EaU8%AMTn@GS=`x)303qTXhYMvcsAx_
zEo!bwJm5^g8jiU<0_8!~n1FMQ{B(q=G<C;}GVWx;(^0OloSsexI8bd@y<>kgo;)ZT
z44bQ^0aLY`kxNoi4)o|2df-#{K|q212n%35@5;p@92~Yp=Ox^JWnJDf3a<T<{g^GG
zd1a~QS%_@+YV;vz1bFY*(U`gRT1($Nh>Fd#T=e|ajmx2-o!bNN4}5?#ChVW?I0DBG
zWz*EU!9Su&Q(5$k9u|E6?Ck6Zd}EObj>n3=R5tq3>i7Uk6IME_%3JB%vgzAEu+nc3
zHYMF+IGvH7#Sf(1d{IolVdi!h@?4JV5;b!$Mk~wyFf6dtEt;*352n0q80xYZLNa1W
zY1US*LI<mi+se2Fx0D<#6(6$I`H;POexts9qMei3{5}y9qEGisj0f>NL4`jyG46L`
z#E1Tg{gIx;M6y|OcVhwJ@n~$Hj_r&kGrMx(bfkOF(1BR0H<roT<w?L12h8oF**TI4
z>K=R;J^N^~-305U{FKO#ovIkkx8b<)lRQ)Y;b?j~#@xLz7+D>&cXb;0LtTE&(!z(D
zI!5cM6KD=N;<yxOYP=Ggg7l7c{W7VtYQto6V>s#bMW>VLIoKLtLMXkRSaNr;VrM81
zJA?4yYc&4$PiAGP!7QFkMf2|4c@N>8yN1a}{rEa|LoS+&_F(73Gu}oL^b-z6(%x-Y
zk6-sBM>PPz{49GOW;53V02Mf)XguX$MQ+T{9D44)Fg}lUq@&nYX{R5x*_y$SO`9=&
z`g~mp>^1nZ(D^*7ZGz7OHZKOc+Yz+G&1Bj`@#1Tc6(DZD((Q6Gx0&%hs|7sy(GZY{
zkjFZbIqV`8ks{wh*3In_5BA;ZXcQya^M=m(Fm#Z*V?)sbdKAJkTj>4iNdsDT%k!-k
zW6%EF#Dr|#c&kN=ir=x%v_tJjUHOXQiT*1&*^-l)L4MJfy5jHsn)rKzvah|ofJTmK
zv&fG_$CjB?y%K}{j(N)6kMc}Zh1PH<kl&ALoJA4Z`oJ{swyp428wsJd=GW;w0s8T^
z=dbbU$bKkt*x9l?M*eZ-sq$IJbi~VKL2^}lZ*M-|Br@)ehSUAI>_9r1_0B@0a2E>h
zCR7jHRC{`oQ{0wo@h}4!4c-Iu-43110tZ8i=4q73i~)ICOTAyAtJn#-<|v;vDf|E5
zg`Yi)d<H)Deg+5nbtB^YYM)zkE97`7(o^88TWd|^jTtUKDm+|XJpAv%ztd4y8oT`B
zk;8pmki0%=EN}9%xF-VVso2CEB<mF(J=XJjtJSk9Zy|97fGcnNy0C31%ZOJXZ7cgS
z<z@r^capc^R0d~`Rpu7)tNH5V){gdpp^@IMKyV-s+)2$K2p_dP_hPL)fu&Z)9A7XC
zD5Do>LGWq+Of;R2Mc_v4F~i8tb}AW<jmrUy4n@qb6d+ZRspTb8|6TcXGAW$80-x?m
zdN~z{*)0<oO(v7NTb-GLM{|Vk4|E9>4^+Ex63%6l@QRF$Lx98Q)M<w&AU0FrY#NTt
zUFS627~H)HjvWA8@na|#KL)bjzk^;%e`83kIU^_w`EO9adf6{H*wxVwH^du(pPT=t
z&aRy!yBP0*?xVC0(c5(Qp22o_-HIh2E*1Oda4tiuYi{Q9%ZgeTjvBOf!bfN~y@qrF
zW~*$5tR-EbAGm0&QtrAn7Yg2r-2IOzcP-zm;3ZSx$K^xSYc10h3gA-mHyz!dOlCJb
z;gy7IMYfiWY<=z5OR{}gJf~9>de%NAmC6dAlntL$^r14d)9o~J`n4Lr5a4ovCP+~(
zPwu{`J2hBUXD71AaZxBTMITiUa`U)K5Y%jMe#yYaB6nEvL4VXA6((yQ?{Jt)kERxC
zFDs{^*SKiy+}S@S2ebs??py-r{rTf&fD0B>FF68h_9ZvdiJE(ho_9WgV?b`4LBG0Z
zM8VsM?Lz_V&(+_(vr}JJ_HfEZuDObL@cPP{ublQGDsz9?j1kJm;0U*@aZm;^`$pil
zx<yWYP%O%WoJ4_FRq>ZyBj%fYG37hCk7&;Q;FM)5jx(qBOe)R=;}IoR^8>kV&g)co
zrEGWwjL{v&K`Cb#K_t@Q#JD|aYkeDxK46dK;^dMyH|BQuJm*sG*(&oue?4E=51zCt
z<Pb1bg%8Sx4=R08X6ps97P@lR>eEzP%^pqRa5_!8Vki6$V<(&jf6)6VXdm*{9BKug
zb(7(ubQEE56IkPoq#^^d(`TI1k%Z?eJUQt=;V*~7q-i|`i%=E1J!o@^M6dX|wNaeD
zuD)(u9`UDOJ&tWO1Zzob8BgOV05;WZ)Q!_fkIMdT+4&(<^ro`Wn{=Ed%xEhbZ-^!^
zRbs$3C9Y}Na>ceyrQLxl^L3fc*Ol>BKI08ByGqP!UDNxckqGpW4n&DfC*xSl8nbh=
z(<DY-XLv3Z-Q=I<D&wro#u+*`IBF!RwKpXhk3}{Btli4rho?(b`nL@GSI;dJ=%vQr
z=5(D|;#;ME%dCGZ^JMwVlLLDt5T+YXm{&hYpjp`i@EdF$b1_7%xhBFpznW;XZjf4p
z>y#6hrS;arAzB%qWi~!JzjpKvc69H0t^6|?yf~Vkfv;p@A~qTHC)K50_{-hDw@wM_
zcff#W1OPn_02pTw1}N8K66jlB_njRBzVmVgaN1$$C=IKxw|)1n?SWceiIQQkEZ9Vn
z;|za0E%64-(K-))J9pi(C!CJaJ(TxL-P9Pl#U6q7cnsXsY4XvVAe#1PLW^B^IHH&8
z3#WR+a4V%(b8_4f&wM$LoDT%<=AU2)1}%^&U1D<{dOVp-jpK;63(bY&tryn1%<T@}
znA^Qz;&b+f(+T)vYlI1g50<FD84dV|vs}~RREi$kaiE?<pkXl#=F91Z5p?hpd3g{l
z9Zm5#Jg-mi(4&2V_pI%X&LTRoiC;$Syq+f4N294R^ye69#)^G@DEI(x4g@tu9~s(v
z%OZ|(B8Rm>x&%df5|QX^iT5rbOB|Pm2W`jMN{Pw4^VEMQNjjcU?r=QZ0X(wF14457
z&Yjmh*ePzyN|<8DWMtg?&5fCSmJ;O)?6RyHJ;crtyq((#D~^ETE-#SowO#3SGQHio
zOa;MZ;&Xpl&<v-`z+edmb4E<zOe#7an~0%5v&qRQ!#r{m5c`E42!v?DI>TE!n@e%c
zg|X_HQq-9m`Q0`SjYr3N60xk`iHKv6H1zNTGY&?<3DKEoC>G<0GeUsad-6Hb5GOe<
zv8{1zK!^x?HcOICLp?nXjM!o9SlUW_<#C`JRdvlWo~dcUaB?6XnMSwahubf4{EOh<
zH2w|YUk?9L`Y(yUY5dFLUljkCuMhvi_-FIP@Jz$dB>o|ux_q-~Uc<y6!LF1T^3aYn
zVDtlTPv*y+oY-L;X!e^Ou8iCrlSuJ}qn0Pq@za@<a})=|5EhVuDY!&Mqmk>}0~LAr
zR*IT~8B-7f;HhLHKF8qQ5_mfjosdo8qN<$PEeKR095%aUq^rA!Nl(MHe@jSHe32Gw
zs0mLQ-g|%%Y6qEju(S6_t2{gpzu1o}fJOM7%(%$+d})_?Sr+Wpmzm6e6e@b)_r>7w
z#z-NI%8zW_?Y%=?hPRp3g;khucyL6r?Ho@bOi6mqPBo0TfpWDr-q?0KoynmYbT6)x
zz}PbrZO&AU7~+#tSz&|;c*;rK67*~;nnrI$a#8j)f~;bOijBt@58f=hIR79Ryo(}6
zwTYb0gACdP_alQ8S(eBLGwM&#zLIZl9#~O+5|cWp2e_9$MfrQ9iOKAg1?}QtVyhs~
zn(6cA{kX&v%y4jj!22qX#}&;*kiD3o$7I%7Q7tgTCV&93LSK4U`YJbivF7sh_tw?b
z>$dCkSnAy9fnSv0(2H|`9Q9L-R)#O;G1Gq@0psSU8ziH&upT2Oy}gg+MONcb`KFmX
z-J@MSonr&Noqc1w`-jJdMg|7@2Zue(wmWGgc_E+W%k}K;86N9y@9FJ=Ba(|({yPNy
zSZDiiyPL;1-tzf|+jsVM`7$9R<}=$Kvm;t+O3Tk@rRpCT>>BDC+|xA%z1js|0#8%F
zV7hyxx7T!xKObfJ*v^se?ykWxXt(_x#r%|SPuFNiS6AndA?{Gmd%8T-VbGmCd-{YV
zx&rNqD7_2pFbHHgmBeYhlu^SeYf8x(|4NVRJcUE)EV2G?%^~z5?~0fS$MFb-0<#6~
zrjRqG{^D-R1E-I%n-OujNa?gQ-04=Jfa8*NS2T<8Ww}{gs}mmxXQxEj@XDJjnxWi`
zAH=N{kVy&8$t`k`XPj;I<{L`^loc64Up^>ZSWE~sUoID;E1FqT>2F(4^UYgjWWw1J
zhlV!^of>j0-&_PAv1q09Z}Sxv>ekZ?=wxsy{4|k^$E8jybHut++1r2p_x8zewIk-d
zB4%{(uc%?{W$6486fg$uA<cuc$wVN?^RZY$@9gg%w&QeAj(j;`S$si7ptC-L{Y{>3
zSoy|jpknJQ8(SawAsFiK?SjQm<*@PJv1_<-**lT*5aIE0+$JSDWReFZ<RyK6Jw5Nr
zVF&B-gPIBYQ_pV4R3kpZE<3FFKsXgXDI>qa%9t&iF)IV9e`MI)R^^Uc(Vx`v@(M?-
z@zav=zrwg>b*mY=9JkOapvOs=1>7NkNVK?_$=RFC#Uo-jh{q1dY7+WKI1Zn2+8ZRB
zC_YU$ZsIi^c#&<|z3DpGZ{)s0N*#L>8KjCMvL}|n6vnAb)QpO}sGR8ud}gHhUYaU|
z-CULK$?%+~4dQv`3{~8=kzeH_yMr_!;^#FwKboGRx*s%uR<loo)u}TW@*NJ%uQ%|)
zT&c<!)h6I=!8#KgAFfW4@u(gv>Jt3mUDpkUx=S7mb(dKhn%}B8Fz-Y*+u#SgJ9cuF
z#GME?KQeYxf%X@$Z#^YUKjh015xD1%iyg&1OKNg?;7<bMZf;}9K~}Xw3JQ|d56?s)
z5r}%^)%|Ywxy0;yCiiU(_JkUW%CF$YttBdJy)ucRt>d2C2J%xdj>Nx|hw)@CrB(j)
zuB9@*DtdVt?#p+T?B5mr8c!!EEB#x3{p((^tm7DVXL~=bcsFKp)0u)>6?yLgy>@W9
zsaZv@O8;@Sq)LqP*CIxFu&ZOF8-3`vv!E+wK0e3`yc5xb@HaqcGTt3b$A?Ii;hUq8
zLOn;;S*1oe&iI+jf>_#s%T8hA3GXTExmp4&RLU)1b9XcB`IWU(W$jd1J3;iD|CAY2
z-Uf$4Bg38jdv|ME$L|nAPnyV+KY=B@GS8OZJR2M|9qj7K#+}gNdUdEzgfw>Oa^pDm
zifhwza$%-t|HG$NRr<Hg`nO`gE+6~#pt!bKJ;?Q;&@q;UH;}Wt!~m1!>DF!AyhpJr
z<E+fa8ANEX-^kI|dLKX}a^W5Ts<!hp{Yl(C1L(f7X*dAWk4<*Fed4+(A^J5OKV-Yp
zc%FEiRQc!xVDD;ajgLAKu4a?7KCnWl8nXghr472W27A+aZ$7`lX`8?EwOE6ZGu?Xw
z#b`U6boNBkxS=6`XQ1ic%DsVS*bFJhy$<%Td(eXk{8-cds~tC9<&1m(fyVz9)4L6B
z0%@an9~6lgc~P0a%5eU&f!Fhghqecz8M@}nPbq#nV;pRhTqVEQ@Y^LBrou1f#V@!t
zrD8iPBikAJ!;W5aZ9-+;S3c`L?o(Czqn!GqGFAcsOekgOv%^D#m9bJjV`ZQ+uYe=V
zbF6S<rZQH_XRPe5jFqw-EBkS)Mld=N3p8eeIQ?~VU^|{}#=q@1+fh{U6=|b5d0k_$
zqAvo$A>0&aFN;IEa9`3KH^mvt>}pS6RpPOhn{Rey-YO$M`A&|yfbYT!YrG9%D+r!h
z5@>~^&HC3dKnR`e3d@O;w$1Hz&U0M&xcNfd_jt6WU~fsbmwb5076qa%%eiPhH7|t#
zPvwFyOBP3{o#ccw8JmGynZ0rYaX8EwZQ0Rc#oR-qZ&}5zSYCETXY1%z9)yVI;|J{Q
z>FWp}0@XmEedq2y_|@0WUqkrS!>2+1>fVcA!-zOj(TB@MAI5RGN`I7#jTp*p%eFwv
zRoWvJUHA3Zb?GN!J&-H?@%r}%!n^J6+Oxa2e^)>Qwsk>?$ii*HRaBhhfm*9~3`P;O
zkZv{oDQYK~?M@y*$vsT(OX?k}znIu?ZdHXI@7_|y&lUZpy!039!@-We&h3Hs2R;Dn
z0>-%Q=b>mKVxmjn4w3QX^mG_$u#ZtirO^9lXJ<c9+{t)T>F4t5XVb?<+pNg$a**8|
zbCv$Uj$Tc@Q|XVq9n(<cKYA<#nU}iv@Q<C3I+Ce5M5BeLFz&D1!<h)tMpvtSa6WQ+
zc6aw9#%6ARJeHY?Mi}m}I~I}Pjl*FRQkN#8mGX7R($fdS>FBOpEP^nKE9OI_fcN1r
zU|;xs$ux{Tazs!gpGbRFf^W;k5~a%-^cih+A{nQZYbwm3d$1e%qPR3WLrI((#GyjO
z^@V9^91&g+`8qs_d*cu#ED-1#9PA(5?jTAj0*N9DFkG{vX+)q#0MUc#B#ccG63$qp
z=ocyFJ7a0IDVd(zATe=0aKt+onu8lp+QgDUv{C)h`p{?M&@BP@G6+G4I5VhyIy@Vj
z&P_X8Tbr+BxLHIr+h7XXatzrZg?JPau?Az24P<~-0}}-OBq|7vo1BTJ58}GCXg)YD
zP|*4%iULWEGek2nUO<zlQjkaxH}vl;j%SWDRG%Xkv~%+&2o4RR!-CSFqV^yVGj2Ws
z4H5{<u_0jkcPJW{lcX-I&q#lG7)ap^AVza0YOykeahjDdB%$VOPo?74BDq)YT0vJQ
z4>~zs@`wH%=eTkQ6e>$+adBKSvB4Qm&mju1vp1H&`MHc3B{}Ad2I#^cj;0Y-4i-;v
zj;F2-wtk7t=o|zA5tlZLx<SEQhPmU>$?*7`fFpry`#Hk9XH0__OdRnb$H$|Y48xaz
z{VZG!pfMu{Xu%m!QNg$|gm5>QW~bmtj9}SWGSvpD#XYf$NWkE;@hRanrPC{em#6Pg
zavGtt*`9-3eF<}HaC#ELsUR%t5G!959?lq<23bw6%GvJM>Rf^LcZWzI$`owSIbb*&
zmU#n?<byZ5XL=D6t9^nY!R1HGVW?PPA|X`K=a8})h81PxtqlQ=7Y_vGYYSa!152Vt
z;Xaq22hy<_ND~}=Ax;)F1}Jt8CHU5i-cYb15X8}Oh#oT?iJ*b7!RHKCaNI2(p9*KQ
zX=h7}%egHUf1HAu-O|`{mHTTe4#sR{$~+YQwdI2S?Xu&d>;DpV1Y{_=3M_u<u_JUs
z&|zNcM_m7Q#Ic?+dnN~>bH$~K-^hHvB_F|DLjiFPqD-CQnIaF=>!Wj<3(|V1p3(5f
zfr%WhuZ+`j(Z@|sP;gdcW`1qp1lj`gAc}cYA8-OyYtC9*T~q&>p2Z3dL9Eo;-BVW|
zFChnpiU;ZnZ@h9KmccAN=N<txVKFYta5oftuc!YZ9G>oTWtvF0((=s8Hx#MN$7Qna
z<{T4@q{jJI=a){;eSqyWRXbP7^%CZJo2$~5T>6n8Dzc+|d^KtVh`o<{M>4qA2>Ll^
ze9uhFuByoQ*IT|<#!LB(7n%<$^HcfsM=%r!URTi<%Em{BdP4Ah`&ZN#I-GDMoZ@wJ
z+^yV?WiakrI*kfh(HF{VpHljFI(#4+Nzd?^KdKk@;jPo&J<_{-)QP}Wf<C63q_Jb-
zezI5srow1qCI%b!G%RsG{Sf^eoWzDUp(?yx(L@w?Y8ArFBy;I;++qV$jNIAgMrw~(
z3pfFjZ!X{R>it|^8`#!-#kS^_7X1G%cs;S*MSM%!zukp!^!|sDY%Ctj&N(wM^*90I
zrRBI^k`^0()A%OmimO|<ZDD-m_Gv`XfYAeCG$zB@G-#56u~K#bX!XTje{XMx(oRN)
zg$Hcf5z<*e@}@_*!xI4yhjRP5-9b|_@q?{7nh^7D7+2Rs3wi<&n}gx$*hCy%F*coy
zG$$+idb#-A3D-fs_L)GnI!>U!^XeF<uM0k|Sqy?a3rd`8rwKbl+(DUh(4Wywh2zeS
zw===<l`CX@a-w7J$=k4@*0I4IrgLzhP9+hJb4zk!f=np3KVDV<D`;X8gBaIFj!!vR
zijOERZXL(|5}+Bax3d0dBOzYbGc>pyE-V70ugfr$ahP9q;3j7;w(hw9;x8Z2ctHhU
zoQk|DH+h4ZOJz-C2G@wlB!&U{s*d-@S%zcg#kgEz(Vki1gEHd-H{RDUgg0gzx#xA*
zI2^hsZ!mm)`CN6VAUE<E3C}+j8`JA8<Ix2H?o0+da8D>sOLh;AY?nvApTZ7$5SI*1
z2RooZ1fk=LE<8HwK0+-<YFFd{91QSz%&RMpb@dFq>&mTHUAZlY&02FQ$-sfh;B+)K
zk)F^$a^H!2K}N@P#N3Y8fz4aJ)YNl-26zt$nu|}Iu35MoQ8VUtVlu(II{3F~lj~UR
z3N06YUzeOKb0M?!9{7`eU4y8g;HnTew+p62oo-1jdO38N`v7f5H=o?!icE6*b`umZ
zVqc5_??Gj==ug9wW+e}{IRQN?Ct>ORc)Rrsr^AU1yvaewv5_(MBWk5YT_OKKE;GgP
zX>$4T1}(-y;mp(+T%{1*Z)`9J+6pi?UoURFcihScqm!Wjm|6amtQTmJWc|1*!%MPJ
z#n2}|NRa~PW|1`x_Po~PpP4D7UAPE09GRnviPa@mpDa4O<qF=%$P4RV&H2jIhkMwk
zqT>hh#{$6vtdyN+Pa--VzUu43*X}X=LXI&hi_2|#&^eylQipJ}`}kD<#01?6^zQAz
z#_pcZK#3``vQJh<`(#CYTQKF>bEcJfuYBys9LTtrwWEJe*Wit22E^(b8fd|yxs(EI
z?;+3RQmJH`j&SK*VoNp#M<Xk-pv@-bG!O3rhfXU)m=Cr}6I{)3L`4s3BOzYbweG6=
z;0#WJu+Mn!C-K--dL|R%x>;nQp+}j^MqUez*b5uqnUOovT|3VTa86^Psn};Q(9h6s
ztI1GBbG-a2BN--IKxG|O4(C*4KEe3!-JTDhyh=OmW;KMW9LV@gtgakz=&upM<r&bi
z<vM8YqapNv!CSLE(o`f@ej+#}<O<+GB<U6h+e_tUz2}|!g!9AzYz6rKs_NgeQt;_p
zSQGXp$FVyS!8(R(0EueP_#&0~<Cswc0qd{s;JFR|=JC&%UdmFY0XaARI44xxy;|vS
z5as{YIgI^XAU7-h{eN+PS9F%L@!7#d-kUTxw5UbX8m~Nmjoq;}(2sx>oHy3guUXYv
z$xJaQV&|VWJkR5w`=R9IG;qV<(D2Bfy`%5B>E_g}>C8N`SMDU|Ozl~GkcybwZ;`){
zpY8a6dmx(*49g8{uaVt88J!M~XK@ZF=sua-%3XVKe^;Lz=E2!S9PBX$ZJg4)x!u9B
ztEuhQWV=#+WOZ(C-)_peC057{ZdCoc#CZn*S>=zb7jG#%@I*~|l|YaUa9l*w$!Sr;
zv*BzmqnDk#AN$*{Hx^*oQr8>CO-H(UxRZi|Q?L=k0zVT)k?5S+f$zT_`m~#musDK|
zcQ`tol5^A822peR8S^>a!`)6-Utb6JFmPIyCp5Wmhy$d(1eIE~82y2wr(VaP!^)lh
zcG10UE>Aufui@T7u#(XnAaOvR!bbF`q6xH?J0ON4ZdD{jitl&x93L)@hYij5kwy94
z-s(QP*_i|=Hwj|6`FF-7s|#wg+(Ykv9->DA@;J=kEk`<Ioi&cXayd=GP4g}Q*$R=~
zGW!FFGnmd6u78Gk{Iy4}(ju4Sk7vulSNF6H`ZS9Zc#&u(HkqJbO?Q&+Z|25XIM~7C
z3*WNoBsM;<Eo-vlaE||QT{8;qWgXJ7^aq-T<ClbsQAl%etJ8zSTw?M-z$G_c!i5x8
zaQO-)xD1+Nv+R~Ex8`D5M`9te_pyy-jy`APs5Fi!M|lF1=ow>Z29Y)JQ__FHJ*EB%
zjtGK~=9Hj0CYbLB?Jss{oWrM7uK|zZbBcM6jnXAyRc8}R!TD*=I|`kO+OxZ3XQ{>%
z<zu^7$V<RQ`Ny`-ZXH{>kT1Vx6N(m$Rp2(Z(t8$L=^KZQR}i}O-PE~r*DbsIAz?7<
zFqiJTU2~1o-QGLYr6R}8-!&V{j&y9jAs5X>doX%<P8gfB5qhUGZ$<Yk8{Lz9_}c3!
z;R6$x4~>>mitlm88S)adtH^85%+iyXNV;3GjS=t;eq25yqjNscy>1tZ$>z%!os-Q#
zOk8mBZOm*2FJI3$IzQnGL`+yc)00tOjePCFW{V>u!Rbe24vYj&*RC?<#mnZ~9X)v3
zd{(XL2*<~B2*iNH-he#LJ?#u4ei%Q7%?`m7yp$HYbg*zZ|7w6=iNON&<6iu2KA|#d
zXl4Pk#~nxW<ux&oU2pddtG91T*IN>vhi*#i_DF>D+IFF8@n?30{Z^3?W#oJI+RF#K
zqJh>67Z<-T()C?8j`g>X4Z(GugV8(A3f4KhrL>2!L=)$Lrow8<`pQpIt3`w(qqODa
zjAnJmmkVdhwRyD;(yBL_n8X1K1KiE6Y%VprFWHLS{lh)oH@Yoxzj3;xz6gl62^Ib?
zC;kVYNeD<X4}NsL>x=)0U^Y3qlUJiZY7xYLv_jYam+Re%9#lSixWRlMS8Qu#;?q^>
zlk)R*sPsu0_Q?%0ExGd&lzO;rN3CDBf8seqsxmK?;d$S5e4G|L*vVw2<-o4m8-~F!
z>v}ooH;NntXUk-)lX^wRC?`Eq`_YV6^r!E<CJ*({ab1kjF)Ugb=@U*yg@$RGan*uP
zU6Us1o(W?ljvzv*nv?lyvx9ZTG$Kb88>q$7%%U(#(|8U0EV3EvbS5{6Q=xKRc_NO3
z2VyujRiS{Irn@fL;)n%Z-D|}Vu60BD@DwbI;21OyBS^3TggwpD4z3W|OF>|)&!mvS
z!1CnpULilt<J>S1OSuH@B!#R4@P1GP2eDDD=O?9sN}FqCJ-J$Yx$6DHCgLDY)Q59%
z#5Oek#Xy7O(m|vy4oq{lwz;WmyPgRaYM68J0>@F(z_h)+eLvinH#^<iyJ_m*?DTE#
zi_JQ_lZh=}8fuf8H?bv<(_Z!wmU0~3K6ZkGy&c<~CI|v-TEH(l3>NTWyGcUhl1`~)
zmfZ!vt#mAN07L{u9E8MWzblu;CWM3;b8r~lGmhN_vsYpE91yqE<yM+^cbFbV!*K|N
zb~1F0*&lE~q=R8|7!}dRu)Bqw5FW5+jwJ9%<f6^juGaywIyfyYrJ*38K_og8%x32R
zuA<YIiB3P(y(d)ZkMddfa;OC})3N;rB2kDg*%*|gWD<szMmK~Z#S}8kQx#^j8D|1<
zm;$zVOaM_w3o;rp3?Mu+1(EBO!0w(l4DWJ7M!t|pU&tFzDG_)wnMmMmi4m;ZOSr^E
z&-)FbmeZqF(R<2C?*V`1xeNU*TZkn((Xf@_EB3DxdS#sD7UMit$X8NtF>{@cuMA4*
zXf{1JJ{=i?Z%<_|DVG?yuhG5)xRnac*f{s$C>!&s0zWG-TMu)ZRhf91P^EMY`~L5+
z?dy?ggn`Ln<ISACMYu<mgDaF9nnE!8;bdy)U^s=-+c^3^v`flhJ!p0=_|@TObJJpe
zF^DH8pw%Fz%L)}>XP)pj%6*HN58P~aAG14|qpu1CH}g1DD&bO<jw<4w{6@)+Il40<
zJD8)At+MA|HhccTp+1@CO|*|KSZFYQI_7DHCxS9>-84oL2NKDH33n}3c$iY+z01K$
ztI<(7uEIs$%~kP9eNAHcSH@b|j5Q30Ko}QuBxc7nY8~UxjbsoJfhUrk9W?of8wQ;n
zuXS$fH|B&ZZgC&C-U2ZmaHIaPeEtVx@~8Ttz1M|De0mZom@fdfKbPf`2e%!ne_!h_
z;d%S2#rvau1GOk<T*dg){up?MxUT{@!SA(>Z+NC?hPRWs@KfgT3<GCqM>E3Sc-yg3
zS8u)C+$3$=Tb!?bpx5c9QEoUHN9ao2TOkUOf$q|2RprDTo7z^MzQyI_4J+MEV{P14
z=8mW05}wTY8l?RdnO!zA`&Ay-6<b6Z*&-+lg4b^k?BG>I*BZ&7c71q~N*vDw?C#@?
zn8?%2`{PLj7=lTQ`AeL`wnLori<vr^QM~-kIRb?A592(IEGBW487~%tOE{vyVuxkB
zS@`|*v!;P_I{`bTqz^v`UKZWbf7uB9+%5?H6r;exX@rGe5PGFIkd#D^P%C!)GO^>6
zPhKPY%jCp(Cdgk!{^H`U$t_8-NsqyTI3{*!4ftlb*JHo%<PXQ^BtLFa+#gMkB`3zr
z$o3Si@K%}dRxqBN4Dc7X!nb4Pqd%`6zadZ}bUWDK7zYsvgx1@i%tWd06(lVW5(U@J
zMbkCVbFk6NC6ese^FSPNj?cum7w3#eXQFWjVsNxpTr;@gsVDsih=v!t%VAsV`8(Pt
ziI3>3A#>g1c0?A>-}^`_jb0xU5W~)Pr@($AcbgJ~e!d=;ngS_bJa=r<CSVQ1-pd4S
zex`^EPL2=)bH<;?#;z1Mk>;B%&=GTd5t-!lqWvnE7r}`!8WZj-y$!dVMyGLiDj+AY
zGET2hFYo0X=P`+N6er%&*w{A3v}Hx`r(qFIP0eLwCeLRr%9q61MRSw;L<~ULp9EQy
z4;Q`Scn0>Vv1OidCeqmM*XZ}2Qf@iu6F71?4F`c}f({D8CLoMlr0NpP=Hgok(rjyY
z;k3IqI<fAE31DUJTLo7E8ASCrzFvt*p@iZs?ip}(5T!=KfFnE_&3k=ATRP#IAx!7t
z2h^jP<sMS5o?sKSS2?0ATTzlOxH!Pv6rk4*gmc*>omZeh@y^^SP*?9I-kAh<<#z;4
z#}&~zGnLEYMpg8Q9KJNUTzceL45vwWva=wY?Kjy<B%R>0U>sRIehN-_CLD{Cq1~Qv
zoo_N^NcSA1QRC#!UiP9uWe&HT&{<w1#=Bf*%u2z|QE}nu@Trn;bwJehe5^4SiU1HT
zkw<@`JoV`RHW+1)J4cA+qnqU*9UU%``*R59&Y`6Al^Q^M;lC~D>nuXO<F+aL-NGT4
z3%_!vE&7U%&aC{EusvU8*cZYFm2k+zlS}cl^-o51Ac*skr_T!bV1PmGF(lFvQMWNR
z5~e{o{+gR4qf6L(lLO;Ucz`gpKDWO;RTOr+$I;5A#4he}%d$WiC2G1V5BElUk{9*k
zvIqKAMahI&j3ui7s23{)T@cKr=%nKtSGuP|^pGzix4jAb6|`Ua(|p#DRnG1`gYA96
zp|0VP0dqlW8rOW{=$!<svh5ziE!8-vESa!FD*csjM7|w^7+t5$sdThq7$Lgja~L_6
zuFdX~IH6%qL0_eFxO~PxuN0Q&K2x8GZhd+XTEEgkX>3UW2yj61-Nv9UWtI*rmMf0#
zS5VU4UEI~-HqpaZp11j9dtL(P>4uwFDZtYX$`}#l3gvu1*y#WHJZ7$(fB+MgP<TCN
zHYF?!Zc2SzJB?|_X0z>f;h0EW3{^Z0N5MRX3U9BSk=z10Nn41TPmV7YRLW*(&6<l`
z(J>WEk*DqL(#p`9!$Va)#5nAe&#1y3Nh#i`oi)PPc8+bI+poOn*0O^+-ode8BDdMh
zW-xTp&xLWzqV8bM)8CGRqD+c+$@)6PM^5HvQ5B0SF3jMm`E+p6vvOG=*xMtv3?aSc
z;IWWPCro=7*bY-LTo}j?kc8>z7Q=0T;>L$3H~8Qno&=rugiA1O#LR`=$l|SsQ=L^2
zOh+&fg%6HPACC-_ti*<Sz3}XTecNxojOY{ooGw3@WT#$gWp?HBgtz4^pOGVDZv2PM
zGL-Y_6=YU%{a!8`8lcCkUiRXtS<triD?PmBY_IytpSFJs>0}`=);Q$sG!*GbA%`g4
z#0y4x)z#ZLqODYR>C1V}c;HA#T?}bDEpQ&w&N030=C^X6gv1~R%P=pOB~S$!d_-=e
z@+(r3wEzy!0W)5O3(p<(Mit}yATuv-6*tj2kTuVjdHv8ZqyU=2j)3g|y6J|H7W_Oj
ztCz2|sBv2bZD<0dBQbH+e7or`U1%!AvOt_ApnX{UZS!ooK`dS{wE|{waY4ydO{v3p
zpt$uGSE?C3?5ob)mSkAn5}MG?D%A>4Rr799w=C1z?$fRYvhd;-Cjs0=oTa<3J8tvz
zhUR7!eFIGuAXzDq?F}ik-jPHexDN+Y%7yRy#=bLw@beR!!s`|$rhJp7r=dkGfpmW9
zCj;>(Yj@GQY((^6QuH7l=;<}#=n7!7jlcqyaqJzv`0j82D=NQDyfVD_v%O|aVep%k
z=7iHVG~jfa%ip-VmI^)eDat>NOVC^%Bkc&lw`zC!eLy?joe?;^5$-6<tK%VUM5Khx
z8Gp+@?Q!@D@rpC`9o4hZJ~|Bb4%jFOE<`6R+OjWSM>v(C1hUc%V^f9;6ibj9PVR98
zy4mc=O4q)l$f*^s52l>pekYhve|<t$x(r%@{b~VLxb6lYo!@<!avd%*)y%?L?`Ev?
zWv>9OsYMynTI|HTGYYy#<x+ky<=bKDL&?8lo3cp^(kW=1B$+$JC}dXD%lNSy^Fz^U
zMB8cSQ*n|+?_jy%>o@z|UO}jp;gA{*&wKiT=avp~H8)6aO9Kd&jqzwSV&*2x$HYY@
z2~07#LJtO^v{_Y~As>c@H)D>@P=6_^r$^@e!d&4r>`n%ZOwj)C(jcuLa(~D~oG%FS
zWVJ`lr}`6+bOpNcfW`+L^|wPrL^6YFL6h3qv)i8k5vH~Fk0OXN><pFjd<@ZOD4=Ih
zBDhSND||VZA`>2Pfz?bxS>>mDI}W7T67@-J7h<Pi=qNi~BB+(@ApwZR+1JncdCitM
z?QG`5o7e&VPc)5L{8vG5i}&eh?c#-ghBhfHeb21!(>O#N+xmrmg?bs5{6@TTc9rFr
zy8^N0?D(Ma*VhH^PmW_6F;dy|C#RlO=%>mh!<dm2RuVV7SZxh_;0h9vJC=Pc9xSJ=
z<5EY&x#(Gi!_2BA=rA{<9c7AxyH*mDsZ}ovKZ+$v=5gUh{XC=**I+gA=*YnKwBI>*
z8F*nQkptCX%8eUCgO=-qV@M2f@Dg%iOy)A_7f8J@tRb9u#5w~iStco@&r0QenwHg$
z6u7|9`d$8z+En*(+B@1u=s1Fz%~q)SsZY47ugxwhn3PdfBTpBBFQ3w4Dnu;7Vk=@1
zKo;0CG_<pLY3#z2&jm2a`4&$wi{#yv3qyKOKp?|6*onk4T)xA#SfkO2E`&CrqbA~+
z@D!cQbPt3iF98DLK;B}%C6{t1tKno4G54%Z%|{q747DC&a+nB@=dHCEVP@84muq1c
z^dL=T5XB}3*_M5x?eu@7t_$lkBTE+K8&GY`Zz-+y;D!NZ8jd3|N*rSjBppoMdTtUq
z!?fn8AUAId_=I{O*>**}ccrSuaBaJb=R`>oXiiEMcZSgRO9P7N4tlO&XZvZZwRE@Z
zL9A@;=~y+d%M?YLb?=cCp%O;%<tfBydWJ$5X3ks+8bx9vHkren#ypa0g_7I9rQ4Uv
zLlMDH3<+mcN1)~hJ9-B@x_8<0pu*)mMM)KuCqnap3i?m&cCp*Mc=155r%0(5STL4O
z(rhO=KAuZ+YYex#LQkSn7K;iILOn*Pud3WQ^(vB1sIG=MGu_$x<ckR_YHdWSmS_iz
zB&^D3P~+uw3ZmqnmUs8bd-{;`=LSu`(If*YP1kAqK26ta`pcSjG`*<lOElfE!@$2(
z(;-c_Xga0oD>QwtrnhSPgr=|5^ba-Nqv?ig4EzC24`@29>3L1xs_6$beYd6q*P8Nn
zpSMZV3^~uA0ZpG}l7V?mpRMVKHGPhzf2`^Cntt1L2L47(w`#gg)B7~NQ`7UB?$Gon
zG~KD`Kh?Ck4LJ~aUen$BJ<w+A<AG29v}hVv3CK@M)BT#hU(<&){fwsni>7PZ4ZM$Q
zx<%8!q3J12e?rrDYx*}e{jjF*)AUJA|CXj(cN+M=t?87ee@D}w(e&?X`Wa1sQqwPL
z`u8;5&|%<xO4DtczF*T*n*Ow=@7DBZH2tuqe_zx8pQisn(}7L{|FfEgHYQJhsOgZV
z|47q0O+TRNdo}$9O+T#ZM>PEpntoi<^<4)3moy#H^a)Mht?6eq{eY&wrRnE1{cTML
zx(&R)&~%HYpV9P`roXT0`!)Ud1?ihL{eXVA@wgW?Eyqoer)ig|uSx~Xl%^$+I=<hn
zX$C~+&*Pdt*CYcqAyeM^8HF_c2K^q>^g2!7rRnoD{eY(5tm#EfpRehr9s~aZP0woj
zEt-B<(?6r>7d73W>4u*-<$qSwZJNGF(<x0~rRfJWy-m|EYWiK8Zn@sT`#DYT)AY}4
z`aVrxuj!MT9@VtdYs%lK=~+#`N7E-XeUql!`b_>iHT`}~|C*-n)%34w`e99fOw-S4
z`qwob*lpnbv8J0e{h+3&H2o)<zF*Uy*YpWZKcwkP`VG7<YPwC+f2!$uP5+suAJ_Dw
znm(!N$87ll1Mg`~->vE6w!EglV#{m#tC|koV9I|-)AO4CTTOpm)8EzflBWMo(=~&p
z{P#57r0G^o@6+_vn!Zoda(E2yp4ard^?Uu0fwx1`ZJNGD)B7~7ZnuHEHSOqld|1;P
zG~G08;9a8W2~EF4(}y&@u^`>3>HGBirJ8<5)0b(wb;Q7LviUWAgW}t;$9x~u^nj*^
zG(E5BVNIXZ^oXY0_L}m0G(D^7y_$YN({{W(t7(mqU=GvaH}ik}u2ZMrpcq(-dmQQm
z<^*o_+2_>YiE)7>79mb2Q)7eXDXJ{b7vYfp7Wu;}@u-?vd&0@-;l3!>h!PIO)f{!7
zK!CW*L$m#3qBpMsCzZKp#2xu?lZ9z2{-AyNn<^YUx8dJB{uy}eDCVl18?2lgRGv5^
z)0{a&S>C@@85d=99;hOt$|qipx$=<H96de63(tf*Z~_P`-qIQ$b($I@jg6a}^#S<C
z72O;I-M!-HUnYM3m2p)*<EqjZ<<l3h^t4<>rj<|M?Hp<!6V0@8KVMC`+y||F!u9Xo
zaGIxBaCFMQ$t-RU!*i+VmPQ1n%%*X_GxspDl-6w<-a}TAk>xYaDt%Gui^_eZrS2nr
z&CX>f#`hl>o6N-`LHB8l?!xX7S@(Rb20}nqhvC5x1pvRXHk;kj*m9NoYb(}kEB`~#
zI2Rs-wFFJzrB*)$JcKuDkH<|6zS=-zCeSEXbXL}b<+2{c6w9B+Ot5j>{1?z8&T?ov
z8ZqBr)pOt-IN~;h6MN%w7To$c_r~@Idl8L#HrPI%ii!KfAdW@C|9?D{GFW)dgM+bP
zbifgTY&5e;&ilgu!rrpW__}kM;6yAveGsl@!7u;@#cd*^fP&fSR1iVJBI%iC9LX3H
zlYAh^Q`UGzwFNFka*EeIFiispVmneP2{1z+Ph>OBk|3=P+;TgB6G-C5Xb%irI|}R)
z60s;g2ZO%xAHqWrm1~8&?1|nLVB!?EQyT5`w6kSmg>Ty4n>xF8j_kU{>C8>15ZyH$
zqo0@@rxr1RBk~js0S6H){iKUd#De&TBAH-`Pv(6gy}gARGmt>7t^^WUWJD0&mzG6=
z^nOKqr5b+%pg}s!1P&_X;zmkKeiFFp@WC+@HW;q}Hxbo5K{%F;OD1!cKX@>l9iNII
z_(D1$9lYXq13x-Gm2_I1Yn_z=Nk+-nID6WR?vd{;Y4GO3Kt4SsX{{m}p9tcxyS8sC
zIUNnA!tv=KU5kQnnB3NU#kS_rQTMT>g(*aMXiuf^c}%|JWlPJut{Us=8F<%~Td%ru
z8#A0q4)kY+=u9>q4dwQ$5OC+G0gW-ReNQZ%&4uGOnt?qGaZ_Xb|7Y)9;H$c-gnwI6
zYfERU;*6tpX15ai5D2BHwL`0c1R5I>ng_O)$`_hYVgo@4lv;eFqfW<XeN)FzaeUz$
zwQ5Hli&iVX@iFr;)(5^B#};&a;N<)N?>Q@+TyByZN-Leo`LXz)vma}(z4qGsoO|xc
zx&4=(?|)aESX$b>u6=OzD!S0Ux^HE_lYa23XV@eDmOag!xn^MIdL9R#$=|>8K>AFk
z(=#@0Tv;re=3H3stL=Tv_0V1^n|Z~8rR*<3vgNH*errSZs<UR*m#eQ^ng8)fUS(E&
zs9VnWe}n~(+pkTLmXAB8;Fk5n-6`FLHwRUD71E=#MGpT|d$ZB-n}S@Zx(56D`v$L#
zKY$s|tGbiFq^O{G0e=g#uJ5W<gXzpG&r0V!{=CP`oHP5J$Me@MtND|4|A=F8?^WG{
z>sTfE<!JwIm)GF(C?Nyh(y}044t2O*oA<(_tlKB>eJqiuEBP~m6;I;{eLrSuK7TCU
zyQcg{LEZSd*FT#HrD!;$H~SSBPXYN~`s9xSyWXEz{t40S4|vkXx}I6(pIONMCT(W?
zfr-zqMxEg@d<)#YVql~1At^^n_J4LtNF^d9hP@mL)fa!GxKvubaX3UQJK|v00PFg?
z)s@NFZ#9%#7>=WIJ0qK=HXE;}u>Qy_SC^O+l*zx+&-C*5U)K9jefFf<EjhoD^M^V2
z=e*DCtlYUd7vx-$^Ol@f<a}DrYjSSM8Rd=@z9P5lO*!NE-S?2aH|6cT;GE3A@5%Y)
zod22g)HzvxQ_i>Nyfx=9bN<!btlXcUoAGfupPchqIiuXM!mYVoAIllXx8Fnd{&(Ka
z<UN#Q=pG7BzLcL^oc!MZ*!kXna!ih&Qhqq*SehqC^Zr)b$`w6))b}lLU|sjRYwK5B
zHCX-&oZ+4F#s2W6e#feA-b}U7KQ0=+E*;MF%?isqp3KiaEML;r-kD}^n)6uxrZEbR
zU5>vIDctg!-^(9>_<K6M@Qb$tabd^(hNeY}mv<~&+}L@=$Un2^@1qv;SG`;l`ST}v
z)$%(MlkZ17pUXfM)L6e^rGHRcrFz|Z?sA-UMal|{Fm3W4+A(wwt)Vk}Vs&drc3t$5
zoL|lP^PE#Uv;4o#d0x);oc%dpnDfm!KbrH)Ie(P%V9p13WqK#CFOHpclN*5CrDPGA
zyuLVQt}iCX<k<TyWxk;5@s>%Yly50aKGX51f2M;QJB-bxsg$i}!#`2wAG>CMW_sFb
zr%kSNUXC0qztdLr_UrhGC;P3H-=fXGHoKk(o>Xxh>BlPTkCMIoMBBpV#?r#Z&eD>`
z_R^yHO{K+6?WMLQ?WIQ8-n8g(rTL2&%;3>z4<27?ZYrHKJ1tt#RBGd^oYf{amX<6m
z7j5!rVQJ2qp7LJ{mGYNGd!H1ycdg|cs$Qp9_H^~(|EJ9-Th^_%^7RueKXZcRmkpP%
ze_a+YtvOfcygui<b3XA6S-IQt<Dca`;q_Vi895i`?9I6)=Ua1rCg%yczUev39|sws
z<t+o<{9J13v@_2<b4m6Yv9rBvLFe+NbI!VIEng(8o4;Y@Su-!}xrR3%ZRlOY4+;8O
ziAR-xCv$mw$MTM@C4Qbf%TYMzL<W6%bL+yk<*jXzlV@bZQCgcfTrM^9!WC*=7g{g4
zAk7|4#T<-ei#3&3J9G{V^6f_Uoc#jd?8K8CJZH~Ww1q-hb~C?(NG>X3YF}R0a|N;C
zJHN7O{g=+jUffhx;*pQs<tk^S7Jq6Z^kYZpDRX98u-fNHPOn>k`V2muuIDE@2FfpT
z$kMc^{Dm@BXQuG2x37{q)OGcQ`s9}{3-fpJlp82yF=p9|K<0PzVuz?zetCQ16+L-o
z{u_r`y*zV%-@y9z@=u=URm<%imYG*Ql$noMLUmeTqvxJj$|9wFH-SF&E?(HUygc&F
zop~Nd<#$|m<Zq*DyLglgzu_OwI@AVnP^FFLMXdx*v5|Nm?%}PK!zELqX;=9M+JQAA
z%Vmw1CO>x^JLhAb7s=kQoXy7ayJyNzl%(to;}at*%1hSdeVt?FzRu+QId<kx;ZBO*
zGmrZhrYwGwf44mCq3MawdG6iucgsibdB7^)2MqMC=7+!QGgN#Rz|HxzU~yyO@{Oy2
z;RpVP@AH@M{->Vo>w^5Mj&hr_%dA7sw^GhGL{%%u_0!>cNzAVCc&qtx49G7XI|lh>
z%k1iG@;=`&^!fL0jnDY|l=3UivNxR75Ae0t@+uh>;d|(-tTWFtB!}a+a8-DO-(!`-
z*3SZy*L}y(eVF_^fD=n6B;KGgd2M%$T-)XMGe>+w6ITqA??dr@H>vbQ-vV<SA<Huv
z9v^r7eWu*^gi{{)pa<W5*A>~g+|AD$@U(WU)b)k^{1Iao(89Vrv+|Bme$OJ!;2G(7
zZD%Uq{;sH(T`rV=^M{KC?+9_Rkl(qOdud)HeKWi7wRd;MU*?ST-&Pz)dhqzXejHDf
zQ}1H^iMCf+{x9<OC(l{O&N*vxERLPAxLdDd%MV?Ze{QD!&~CO0j=U~i)H_&y{Azjm
z2_=8j)%Vn{U+!yk6CbkH@fcOM4cA++X0X4}pEnv_`M3$b>G02C!{y4VeRL`n3m&eo
zwft+cZ7a)nz}Jr`TwJ%y*VAL#-L%Fp2qy3G95eTLjG((U-m_n|DMxaBVZZ8mzmr#7
z$KMk1qetaR9liW+;J}*fyO;cngnqu4DaPFc$|c*@9{QGrZ_W!389snF`O|j!Ta@@3
zLmk6`{(yzoWWSbi&SSH`ZY=*~`JwD`X8HZx`8O-RfGMWmAvK2^T>hrsKibMH*Q!7H
z^No|AS&u))p2wNKa7jn@jl}f%OFB#O9?hdSFUx^h@c?kg>b`Pvefj_9mD%675667@
z=~|!ceazu;&U7k&^*H?X9)E0FoKBJ7>@PL@=Ux0EZv4q>ao$F`_#3T4nGy3l%9X#R
z&CfxFvcon<xuyk6vtOufTe*_^Ma8zO>K!h>xO=_d%x2v=G_ON%x#|4-Uq3VzR*>vj
z;mlpb_N?UxVl3Wt>C6jri-ymg!-cGqnp=HtIUYPNC$)8T7SmAGv?(=Q)y-Q=Ig6H`
zlaBJmcJeW)dOk0fD~?UEaB+N!<%_<rrTnl@^D!vY8SZCM|8V*87!*nuJ{K0tm%o7?
zSY2L}N0c6|Jl{5#$M5hORqZ)6*2CJzE;p-uO_u-g*YGfph_?~;`%XWDW7a5Ejn<Fh
zdgZg-uyIw#ZPRcsF84a{it08V-mk;zRkg8(dLwKcF7NrcJdKJ$=(Nkvj}h0y<%$bL
zR%V1>hs%xB7he$^-tO?i6-88c6t9EETyG0kK`hCI3!z~<xrELxe$tZcmz59wu%Lh6
zP<~egFNyGpgAslhy<YL_l|$={*INul_ETJI{B16NhlO$AS+o&)N0eLd&sLVp;k@eC
zL6+zDR@V=v;p?gVcP`7nujY?}olg_P{jFZU{9fiLdzd}^<XQQ5w92LYDY(I6XX3Yx
z%0COqpCD&{R}yhmetw1*RTK=&N=)7>K31NkERT2o{*1PU1zl-D_FJ#(vuBv%e;18&
z9vhzrisdg}lUDR`?{DOGXpy0Tct1y3f6D~RcP#b{H2g>IX^<zpm^|g{``nJqwA{jx
z;AEc{YFbnN^{Du@$Mxr*_<-y|BduDV|JF_+W&VOC4J|FHkg~X`YsB#-#Y`R`E`KU7
zYb)OuZExymYG2w^OmA-;aa25*Up!b+Jh-@cFhaq_BaT>LE^2ET(cTDiTSk-~QLbr0
z*TP~eJk3++4gDUGyP&1DX=!Uq+oEEj1r19&x<<C%-n5`?X;b@U#bWJE^V`}wizyu!
zb#*qjJ$a;Y3yLLpF15XQ%mZ`9LmpQx9`YosFM9FK?^iS}Z03o^1q+%wI!f-hv^6v?
zZ)$IEYcC%*w=QjHX>MG;q=8?#Z|dZcR||Eu=8s1<HI|R(Q)hnH!i79{+0p!zrYtQx
z?rh_U$;E_8IkB~^b9sAHL*r%TqsFGC%?p|etv$KDxwC2clJ>UFrUjk3ZmvC-w=JYr
zM_X4rW|nI%ZENZBQM|VH_O2ySGEZFCHQX2v?=?0zlxvjtmM^%dp><KNSX&mhb+u+)
zXehg2d1F&+^Kib6E@^A!Pq*wekA5z0ShA$Kby4}Svw3k7w&hu!%R4$7_#>`dSxdQ-
zBh%*dIBA~WykPN?Lbp2?b`}rqf7^n#mO_c<)&*^gmo#)X&u?j3PQY|Dx3!jA?jSC4
z+GWd^Hn+8qpC>P9Ur?ys)Y_;E4>==GSlHZ>ed|#2jXS&=XWgR#ax||$4tvi_m#=-9
zQ}5}wc_1!1hR?qypU=ZSUK;a9lq_nic|it0amT~dY1M`mhAkVfw#lB-D6grdl=zo;
zxmYRxrL8J2HK{#`xsiA)%*c&2KZ~XF<(x}PX|r}5z0bvm`Ke>|Y94Y~*}JZMk;Xe#
zxI(M1mKZ+No?$;O=7Ma+z^3>N;EQm0VHW@UM04TuUDiaEVwt0d^|kkAKa`tYG4e;R
zi+uzK>ng5i$`2F|KX+5UEb~Uwu%3kjy!I=5?D+6fg>n@y3yq%~<k8&D{QAi5GEQC0
zO@7gFNi#n)={v3XOu}RI*<}__9P?Yq*>58fA8ej<y+4pre%)P89huY4%XPfZ7g=$l
zPT5Of)^Au{nWG(Ty{nsf_ulZ9)iP8nMbDPYm)~&~l}0Zg^|hK-MwoY~KMVZzxPf({
zuF%swXSiO}$^4g6a}T#g`uOe6b-D3b0bd+=Y5aG1FTyIRWhr^PKmUZCDN@f|N8kRs
z4V#c1@_!V`5)9h;hk`cGCup-^9M;ou4R?&PF9LE+(Weo5E-Jr1uKXc8^6&Ba+RIM^
z_A+a|X56rbHyRE0R-Lb%{Q4~KB+8;Ui|2A=mxKCH#1GG-rcHeH;_n>t9=b7Sy52v0
zd-}!|*Ul~^Kb`%Jh-?3~NHLGY!?ydkHnv>&geNR+zNGaD=UsfsMNhi;370fI>7t7-
zS$ttzOIypu=Ux2x^O}z<FOlWC57~9nnctqVdEsjoJ$&};XFltjl|R79n~<)`zEw&c
zz5R>1OP%~6wPax3V9Eyi^70AxiW5^=U;KdYS_^FK?%%-Yz%^I;6hEKthJO&2j6VLT
z#<{!_FEJ8S_wV%!)ylu_O^HnL5!l7a^ondG)@Of2!k1jB#Mk}9KLXj;=hR5W9xSF8
zy~t{00P*#4`aK~Hh##gE^R7g?kwK&nF>MW!kcEhOrdxgkqAqp2RWqZy!C84ewwHf`
zvWr*v@z%6MuL(@8OSu9Z(FbdcTYi+r@~;rnh<1qo%2viHH;VRB$=`3%FZx1X=^uF&
z;%{lyA^rwbLS`b(i23?h-$gxj=+}faA*L%aW{Lea#4%Ee{_o*9Av2H;M7`>_j4!nG
zH?Q0`eLYfbd~MTt8FpCS{c2^eAwA+CY_?C@YWajXzirQb+YDQ@C;DVr%Y^;Ii!W(h
z25_&?KU{F04gW|kPtlY^Wqlsw<;M^yK7RR8MzCwmXzg_Oah6}7Hk4o5cIDb@dPc;g
z{%X&~adE%ecqh`82E=|k4<kkr`%92+L?0>oHvAKQvAlT+sr0jPX1-&mFU_A-knrhr
z(mD|B?nJr}+g7yAJjHl!L}DAwZpU#vyS3lGXxC`=o3{yxJ{l8YGrKkUr<Qi~yY{Nz
z`Qtkp6Jnb6E5~KL{)LVDZ#+LZkL{;zyC3VXcIY4HhT~>_Lc%BJyRT?t(D6-(Z9D%=
z4;$Q1NVMrZv<)TnOZy*X9UE<u=9#WP65_FSW4~y>Z5n?vVp`k6H|!3tcg3~Evi2t-
z<N3LkzG`py&wXu7h<3@l(suNv2|emn^hdN&$G-8K5a+IbwSO@#iT#K-ZFB!>B>biS
z5>h!PwfIHfRQlWbYrnNmpA_41eM-oDq#0>Lobw5(Weyo1qpjoW7|&+QtVHyKHri+P
zX{%}BYj$gz_v+A}F;8qi;@AEZ^-XA<ALU%3oo<fvqsx2QdfLvuqCe$W=K;%Tr~R!Q
zpF~<KvJ_EI1F{%Nh~s2G*CCE+^fj^XwV7!VbH#o)k*+RfJo{QGqn=m?+}B29w6cvv
znzjxg`aB`p7=6=L>pR}k{uak1f5mEl@-6e_3ui9Mcp+&ozu?}RF6!&!%M?Cj7cXVY
zes?_!-?LjjpVivG@qB*~`kHe|u(Hob>eun~+SXn1CDlu{`g4@fKB|5^nlU_)_&pl!
z-qo?VsJVH;x+~9}Q_5a8Gq>mD6YJI^m!6zO&qVq&Uc5Fk?y(*__nl|XJJ-cn2NU~8
z!!Hs0_2^U7JCQZX^4g(oUR$^xBqYvBb?n;**B;v{wzGg^*FEbL`{sI*kO5>(zF*X1
zUX*vgGS9S-YW-^<-}Tou!M<uo6OxcFL?7$(@V&=gN6kVK;ySL)+MW>G*JktGpN-5x
zD%0lXY1RB-UtMEuN4>W1`s{Uw?I+|+#5gz$Nr-JkThg=!B>EQinr2^=gjCb-_(Yz4
z^EmqGb(Z_lA9hQ{wJ*j|+s;L_E4Gu_vA_By;=tdQPI;Q2p`#4D<+4q%J(sqeW1V{&
zDdT)ujp##tXWYa!SS$P0&b_8}BjFGCJr8N8{SBY!f5#^wqn$hK<3#LkrhM3|Zf&rg
zO4~a~)30Hp{fl^rb8y(}ct^ZDCZX55_D4NY*ZsIgi+p_+`TD}~*2b_Yv2Xk4=^Mps
zrfA3V39*j4%@2M0RT~oGxTrJY%61bHW$ahzj5_LaUwum06l1Io^R*`-(Y|T+&$RJu
z58qLALSw1!R;1W|7sp|9w7-P3?mT@o-`Owo5@Mh9L-??o-)4~?QnY_M=^aQD(urtK
z9JjNtEe&~^>3+U&9>r!o?N(we68m+?c%O^3Utf$iR;IhIStcR&)BPB`@y5wI#TfCp
za=gPQvgjB4=@{5A+bzaXoU`VW-i)*%`X(X9wtmn~`<D>w7stnR?a+QD{1)R^X=BRE
zX^(XkeGv6xJ~>zQm*s3T;vn`DY5GIkEMt4NWgkr|_P;ex3tu0pP1>sN=v(w%Tb1yW
z>Dp#Hu2V{!ON(|bAU*mWcB?1!yB~dueET2y_FI45Ti2^2wLg5=MBm$UY0Ej*IkPej
z8mLpvf36eS<~S<V;`3;%S<}(of!L2uM0*;M#fWoJd$q-M%PG!f%eYz3xKJXF68m+?
zvAAC8(@KBOA}u7w)jnF*eyu_7$@Qw5jR_lE+src_lxi{Id_5X#mgC-=w~^pou}NFi
z6>Emat|{88m=}E-Z_R3=Y_0RnxNSiqo)i1(cP!)D%{0f?{<(%}OF||(w<2!TQ@o#&
zeQ&*iU$Lp@J#1GG4y^U<>G@BF@$F@O$CbS;Yc`e9x1wX+mHa#tzxcAIo*!W{vHYF$
z@R!H&R4w!H%HD>ajooXm?CtSOS1PUT=KE@1^tP4<77yL#(XNU3%r(q7(+`z#pGY$<
zs$J7}knUJIU-X?iV!RjTY2kAYhtG|5?3?cRkM;Rvoc<oV4U<2dQvNO%oqXRs5MO)w
z1v1}PcXTul-z6)$iqf@|FE@4g_r~SgrP2r9VQ)*Nf5~}A&U4<Gr9WYUJZ*yIYt{d?
z+^+BEJnjhFd0<}8^Mx_v9E$UR*Bc3GKpbPmJmbW9Vtg1YrWtDq(M#sV9F1!ab-R7&
zJ((YG|6jr{<o*2X_h$W`_P&gl=EoayelF+lE6PRrKNVk@+p|6A_m0rMzs>7)=Ka4a
z=WBC*JLgX($Xh2^zE=I$<a+-u=i864osZ`A9`}K4+=KVYkEg$XWO_q>{M4Ku&iROn
z`l07f#p`mrUYGMLIVWn*&+>W?zA5v=nK_@D^Ph5lWP-e5g5_(~e}1mFCFj~BZ0C7-
zz0+^Y`W^h6&yPHg^r2g`^wAjQ9`d>B^&>y{<Gh^<^76sRpD3s2dS0IE4Tim;uhw=d
z>qY(1`0Bj<FMK=e|2uQOIOkKolcgUkyiaaV%K76XwDW?zehcST&%2(7z0a`#@x1J3
zCC|NHpSgKW?Rh-T-z(XV^S$T(TJ?CZ$9js_0bV~u`%)Wh*Xv0)^?Gc&`CdbKeX$6!
zjC#CQ@Ve8@>ru<AyO@4YU8hXcPncQW`0GQSjPyCJ;ivdI<LSEiYWK|kfq}JW6)y6r
z>F3o3#Lq@vqc`W&KM9F@Y>un`bDWj%e_}uU<d|DV-|54I=-2Rbq&o(&Z=HmAZ`rz*
z^%~B7?=KrOp{p)GHl}7F2?>8$#yaLjdF?75*K=&!+T>^8XnP*}*7ev}w0--y94VH)
zkmH1CyZv|np6Gk@H$E%UY|Z1=L|J_rV;~a}eRN-6gx~F3<T+;&GSRWIPSHoL99Mq!
zi@wwnw>%_0ur^(O=(Ae!xm$F*jiskt^Tbpx*TMhBhxWzTnQ>3eZ~NVlx7Q4{$GPP=
zCB$*iKA+FlKF1=`jDwUP8-K+)81u~Xj+czN<2b4_;wZ5{*1U=KW>U_5?QlLMM86fk
z3+U$9wiVm6UFVqT5lh+`^^G;lgr3BHv{$XqF-IrTzlg26#!_8p;a9G!|LQdc6gJ19
zJ(sqemG@<<#ZaPbEzkE>>%VJG_|Y-aH~K_B>9?4Nb?ocohy(Lu-*Uxxi1TZVoqi0z
zusfl9JI)RD*mjI*jJI)>5bbc^e9M}jkQh_*qHo$AF%kAxv)B6L`O7k)x6)^4l2`QE
zSsaHCn%J*4&WZFcM1MLamFFP)r|k(b-&j|of6<>KSu@pVeZ@A^tFKJAUE7HHFrHsV
z^GQNS(I?~i!?J$oZ#~xo8UC@27;DE{n;nBnTRTY8_R83(WxiO)>oxVOV-^xNvs>=V
zY&ZweH`=JpqovKw%RK<r=aQgeoGa>R%*Fl7DulywesNsX=Y7c7v?1o|SoT!2`)Jvy
zEtPG@T2}N=wX|yfxd?rV<-=F*JHCorCt}R5MtYHn_@$a1)zXgCHq0qshd6GIjj>y4
zqyCC<JDq*Epn1+ow_>^LvZT^8bDF1r9mkkEW<?$Ko9-5A&ZXFo{K|edQKs6u6l+4<
z2S0~$GmwNB$Bu{k?RRlKtE{KZZbdsR;}&V^@p?Iqwbe3S8@rhvb>i4E#d?+H%~u?c
z*g}7?Ua?%Uz47XqUo0Q?L>nH*c(k#<78ykJn`@dr*AB-c=6KXK-Ob~eQ(<T5H2-Ym
za%8k}SLAtN8;9j>qIFywD{WIz3lec)-|VMrwPVqn?-%<wUb|Eou?{DW#}kT-u&r_(
zkG>b}k20<|+UdIDm}vXm@jXGY-_GAnh+~tGO1n&pt(bQtIvgMS=e3^m)OE)GH6o^a
zJyC7UNG@-!{I6dUq93d2GB3tEJ|h&bUCgg`9acQ&T4uEV6@6eik7FIwk1>|)j__sT
z_^#?Sc9pxT=bnl)eNmrFf*nW~vLu&w*o2s_RF+>vn&q1jV<hHoV!t>JmGzdAZ+tm_
z`ttqaIbk$C6fJL+`m{q^8xXIPj8X0CM5>j&r)@qKY?y&BVtX<>`bwWUXB|JOAHCK|
z`MzW09PLHcAPF%xyAjV%ie=1m%}9vz-uy`0kRO|`o@$?m66vl9t{s-~e3lS(nC7`6
zA?7)UZPPN59yX*rZ56bv$HuK|Sd=&2_1iItt%)6dp%^<dA>oUNSNmpvLU*iF>qtw8
z>zMXxx3-z?vGo!%THh=CX&d@hpL8SYvQ3W@Vp{mfykdVHFY}AG)^luKb!fBswqY6T
zhc0Qmma{MV)$+2~zWa_ttlN<ndMa(w-?kZJ=dta}gy<*pBWBc>kfOh|)%s^4vykHW
zjTO&{vXkR@?-<7>#>%;;OwPk&cOE)-tIfm7@yph&V|5)JZQLf;&wJN-aB>{)-Pbdt
zjo;+@d2FwrUV|!LOHZEv?tPylMjN-u^WVMe{5Ls{_wMuGXyZ3|{+rnOPd|EpsTc7x
zhxbp;K)nBw5bvv)=e-s0)p(yMA=U2Bc#p^Wa`OI6<|q9&+C8m%;y&BGWqc>+?Y(o}
zj`lfZ@_OjVu7{45`8wLTPR`SN=RBSK+<A1bcaN2MsvXttBTTNp_wMy~y!kpgzW46&
zy{q%q@8f;mB_V!(^E-Dxllj@pV?T!_#N+t<;b*cqHqCv@`CP>eBq8&Wwp==)e>>!{
z-={VrasD@b0b*V&V%hl4wT1nJT!Yv~#Ik9&r+wO*5c}ZgOZP3SjrPSde)hDS`TEQ6
z>l5NuYy8(!_U`bLebg6=kOo9w_}q|w2|xMF$Fb_aI&7Pb%t7?+Ok}LIxp}#GW<tLz
z2{C4xkv60QNr*mh+^Rh*@&MASJ%2h@`_=5Mv<bB%o<&>C@j}EgN=U6XQS>hL$@)jy
zcBK!hJvUx0Eyl(A&Nt`xUDbt(Bi7*<hfSg9uG&@98U0k}rG>U4J^F9{Xk|<{_D8dG
zwCBU4ylvG|-!eY8U91;&`8g}n*&XrBV`cl6t<+OX{mOc_Q+&SExfS;4OP>=Cn~MG%
zuTHUSwfd2U`VsxCRxipH^NRbGIy`nOu1n7MZY0hjM|<5-U$H&syfPE9ZN+`h3q|3u
zoHv?n<`?yLa@>ckMtYH2`%!J3sFqgQkBewSv8?@3+;?qP+{UuW{Nh--Up&`Tv!PmA
zrCkX<wb(|n5&o<8?B!@aJl)D{wbb!`xLedI_W8OjYk2+iT;<$KdHOT+{TSyij=eVO
zL)1HfxNbP!GmwNBPo}%?HCG$rI3&b6-ka}6)Z;asbrUj(m>0*Mlhxz(l`&-<%eWQ$
z5c{qT+Fm&xO{CeD^}WWjoNZ`#LOjRIyZU!Ls2E{a<+^Bl)&4Ff%8i#FYhSFBqqR3$
zex;wRU!O~Yj#IVkbI(!5IOMSAvS(9vBI~ib-6mS6a?D)|j2*wbaI6zz{A-U)h_Pgu
z*e}MOV_`k}Zmb)F#h4k*R}?Fslj@-oK39*M=ZnfT)1!Q1zXh>P>u95G*?!pMe&u*f
zv`#|DctVj8eX+dPsoK+y=;MTRAWcXoV*iSL@tW2(qZw&L!tTU=(GQjN)TIyXf6Uif
z>$>*#=Jkx{TI>1Q$hNu>eXms3jq^iX%N6^oADnxxF-M|{YKQqxo%(M{F8W<xo313J
za!mAPY?Xd>Jk-&Ec&>LW)vv!3GMcVRJ=Mw;eNmaO?q;M~42<Q|iN*m<l=~swD(wz`
z&L>aZ+9aJn`n7VrjfeF}__UfnV{H&|?2WgCjQ6+JW3^NCqjRhq3BB5HTdo0pNSs4!
z)mJ$;5<2dxPW?B4T#e`pZ3=tp*e{N+>BasT57tdcE7FFjFCn#DE9e8q$MTMq$F{E>
zm1CvumAP0a#%(lPE9-kNNByqDj)CWkvFeh2m<{@RtodBorsc!V$@rR#uQ|j+oO{?k
zEWXBC-zQ`1aDPp%UD<V5ag8=kVsroQSc8tndF^PO%Z}w3IFfVL(K=7vo#&mSHFovH
zr;?Ckc^r#&9?6&%>mRN0J(jLRCgUNyHvLmwmmW*k4U@5O&&C2vXZbqv?l{jMt+70o
z*Y+b>&yQpccbtmnfhLaq%<N}qZSbB;LLA5O)^>`Nw_5a#w>GHA{xl%oThgZHoYwU_
zlY|%xrYi~Yb96T{m@`4s1`w}3TniK8=XujCmylJ6^@{g)i|c0bbMn(E=W*y$M<1d-
z^+p?}dF=fG^Sr;Z8VUP~b&A)=we;KZ37g^`h4(f>x3(puR$IeHb!xLdn}sB#4KdAj
zu0;|OeXX?}>s*7_XZ0uv@xEs0khasEr(4D}ZAnP@(|vvJm_=QEZvW#RmiM+SV;{n|
z_3SGNX+l~N{b>JcjdSZ+C*^glYkd0IV<PQT#((HlUl-DeBt*NawL$Wj^COWTb41%5
zSN$2Ws(-@2iT&`cezZ(C;#lZYeH<}8z`n7P5X)7Lfn`mP*i7t?7lW3G@2j-Qw){>j
zA?n+NXkXZt@?-6DztRrx!!{%OtphOz64Hqj?RBnqBeto%wv~{W3&xVimHLgx=%019
zt=ilh&!>rcWBIcdzs0&0<D*a1sm%$A`DNe2U#>xxu^-xKf2CziOURi>_$TI6H)-mN
zxQY0x%hR-B29glty9;SXoG)XQ4IgNSI<!Oki*@2&g0XNG;+V#K8*9BxlnXtR^B^0W
z$$60ZVZ3=zj4{Hf=JnQicdi)2()e_KIk!x6&L+h6O*iJ<k2<a;QKoV&D$b8sgA(Oy
zSu2Y3)H)NLKP}X8Zn}<Kg%tY|b2yQ%jpoI=5#`OR?2mo5u4ST*$F4C6aUCk!?c6ur
z@|LqsLc$mNIQ*!s9;ZA_yW9`E&G$IgIoni^>Gg<p-PdMynr9j7hc4;4)N=O4@wB`&
zE!y{3n-fymzB;TM{)%fC%Z4u7RiA0nb<jHQM>}CtrT&PmIFEX4Ut~gT*Z##gMLXep
z`=H-vArUj|);u3tD67uUAND2E97Fr)zV@3Jeu(nsS;n&FC1f&gGJj1ZZX8E_=ve4$
z{d)$Y&l93=%`+C%8*5OESHy*J6Y(tX>3CX7o7z~MuZiRTtuf-b+!O0T%ze*i`rmjl
zh9VX`CnO}Uw-&N*IrC%viuKT#G8Pju+S+Yi<+Z$N>afp_xB9EC%ayTEM>%aU?*A11
zSWLV6!|URN9IZZ}s{C2D9V%@(9RvG(DUy(xIo)4^=r_kte^icN18Le9=S9aj&NVT9
z9eJ8MtY185+0WvbhrgwH&4}lOCL|#X5N($UiTH^zGq$Z;Ef#96OZ5r+X(D}0=+`&J
z_0=?eXIiYWu9f=UV|_Z>8f(7g^sn=(7YQAeehB~SPyMJw93=L`pT=NuuEe;-+_bD|
z+H72e4aM;{Jt6kVIp)6Q?1wfc#4=%T%x%+axkjD54{*3YYw?@@H(p|VD&x-2?T(3J
zUP6pT$I-ZT+#OG8nV9EivLEY!v1q>Ss4wCs;;SxC(}o#HLR{~<kY=P28LMo>ly($j
zs90w<d2<lggtL%Y$YlIipNEy}guY5hCsLfRF}{wc^VRWBh~waxIPM9loae?!%x~)&
z8?I^Hh-E{M>BgL6YP$IzTQ<tX*eB8|+xb()e=)W&tLphfdm}!L@94Wc)<5?*VWZ~?
zr7dTIqxHu!#zf`(w2o_u<LnrZc8;rzr{WxsI7-y7WxVSsXUwT1A+ZLqTl44A%JI6l
z^l!XzoBVt<@*Ea%X`IAbR9y2+b1kc!@3r1np7i(8@%MOf-NG34BAz?ECXVw&V!wF)
zi1Uo+tr&01Tdr~q@*HGcb*j%g9=o<A#Ot5pT60#OZh6aDCn2$Z8AsiS>DuaXLQIRb
zD(p7jykacI`L~{Q>sm&et#6)oSwD11KYLluzSv*O%VPWCheUd1`|7Z6_^bF?E_B&$
z*emae`wiiH{h;3~=VudXp1YK`oC(JHYcgJrjd*eVoGZqSvF6-412GO0V%(W$j2nku
zn<k_(PU9NG`o^=z&Iy?i^{B&q=es%+a#!PMa(&Ny8EcuokM$?kmEsy^T9iGK>#|9I
zAMS5sIw6&FVxnvJk&K;VSnECC4$3<3v@_0$iTzrx>0J}*5YILC%j1L;ZPpLP^R9W$
zf6rN_y9U^{HW-65kc4z25wo5vEN8yuV*T;hb4IkMo`l3Tg8i}mNRRbMz3$tFd9jA6
zJKDU4ef63j>sw`8VSmxCM0xFvbFw-tryZf&w1|&Z_MJcNNCUDMi8<Jmr<<ovnUFYN
zPR_eSaid=xzkA|3C&p*;^F}s5BCh5C)N9)qbGkV0eWitzacyy)yEYn^t`P}wJ#js7
zKh|6GEN`A=6H<9E(6m@*#`=6=p88!Q6H<q0gJTnYXky>BWVChVXxQ&Mrk+JeLXMX0
zsH*vX(d7C#GWLwen5%IP+DMwQXN;H@aT>8gQaNt^H(yUU7xj(vO8+$?&eLl1Fp>U0
z<@&=I_}@J4u3?U`pH2U_j5%E`&-d}p5&9#}U$J%=_pT+y^H?pPBdT3%yAC<$^uOYK
z^PDD&*Yw5pOMA>u$PC155$iZ_z21*&^0<DkBhC42*-pfA#rIcO&NA^l1H0v|);aON
z)kjTuX{_suF7h2i$0XvV_!-QxPsn(&GmA1Imj6?a_r0xO)y662#zpwEITwBFn8aAg
zNOR8gB5_^exSHk~kPtsRTi$tUxrA8OeaplelGq<_yrT`*1>135ur23!F_z+7ZJFYA
zOb5rdX<wY1+Mo{Y(+<}$^KHki*7ZNick~Vp_N}=ptsm@3-D`T%;+0pW#@?0P8~O*=
zr}-OJuIycxF7N1UXz#q@#DxAPMB8JHk_mBrao>JuPxROGP(tFmHp*y!@%awR)FJjK
ze5M|Km5^3M9qmX1Vn0Xtsg`~;wKiUnuIU?GMR&UgH>^)}o9tA)OAwXibyYiNBXbb#
zQ7%Q?#>z8)Mxo4H_ABfAUP3qR??sG(h==&QH~Sa$%qyOwigA+2i&!w-I>v-PR=3;o
zh3k5I8RQLXFWJz$ez0#~O-tYU!4X3`W;tD^kE(sPbM0tC79!0^LSoKngX36fZ{=LG
zOw1?O!tjM-Zy${NSxAiaj2UGYm!7<?Z?HFw=veAoGdPe|_VxF&mpZOo*SB^sEf`q6
zwtHP~s_e1)IuP5it*{}ne@T99p7xnv?8gH*j(0DzTi(>?`ePl(!M-HKHmt8d)M5Xf
z6O}rw--+1&;`uzv)sY@CX)KyvpG$(S4c2wvxzdKHFClTB>SjOM*G}`a&Gk;(>}x`_
z-($;KPTSOHtSOc=-MXXMXC2oB^*Dyn&RFFsb_C;kXi|4<xbn*0_3O*)R5tFeYz;jd
zyVqRV+mlDcLgHh6Wi;?yXgN+sFJHYCEgrd@$)SETo?;H4l^1agO>;bATf$D9zs&c#
zEg_CcwRDopTf}8$TqSagdbGv3(EkZ>{5;k^^BkMg5XZ}{0kNzSx?QIeQq&v!B$xA~
zTS8iLMj6w(s-!tL%qx~Nj*Dp=mbb+J`pWBW?bkMKPl#)&ab|xKQq*T&Hxhm==8-&n
zUUFRYNiUL+*qYdh@pP?j&W~-|vXy$nkFDgX&pP_gvf7*w?ROm9cfHiUV*4=<>quAs
zX-McT+7deLyD^oJs1xN~w{1^}7+`lqS&yT9V!r{Y76bOjblXjcYn*z+_mLO<G(Gwf
zcH2)SwoZ18_0U=EJY#-061ucQeIC279bt=YhaC|gmNU(~ur;nr92@PiANtU>*YdNF
z@Cm!6uRi)BQQC8i@<nHjwC_JFj*phzf0g%tW6s_+GrKxUy$(ltYvq5((s|l}RP%eR
zYt9YJO8xKn#5IuV#(s>w;~e8?o@48_7%?{DoY|5eYmj4HODrF&_Sm;0@sBaCKZgf}
z{c7t#8|ls)$Ea9GKgU+--%33b@$XpuX`;a+8SlHxp0VPu=&SIPac3Q4&Ukb!F_s$<
z(_QEFw=o{)4)<g8TFH8*Ic~*uD&q4<+eqk(^Njk{ZCkPSX<tILIp(3|Vr?}(VlAwU
zhtX_mppNy5^WXN=X_{?Dzm7&+)S<5*F?JJDJmzr3apcb?eJ*0$#dak9)1P-|-?XjL
zuA}8&$Dx*aXMEabJK`GOoO2P3aqMK@_)!wF8tF!i=UCUx8*R;r7^BFaq`!`%_7&I7
zO1~TL(I@Bn()`%iGq!7u>stL@*?#4EcTcxJ+I+vK?f9S2UbT30J{cRXkxLL`Ev`!!
zupjYhzH79{vF^n@G-lM{{4?KjG5>0fJLAlF)<*Sv&T`H>H*8xy>h)L~E#v%m-?h+V
z%eWpNO}jSD>}p!rJhNeOb7@og{~0vErf;;zHnkya)Q4fe{<ynrtQ^bwRRgPg>o=_L
zU02`OyZ-9IfwlE5eJd9AuIXLZ?OnL~jw^dx)@&-HZ$-ztE9<!fv6}RTwQK8_^!Kcu
zb>-T%rH;XM+>$6Yuj%RClrBu1u<Gc8*Tiwoa!l-(Yif+OeZQyIiTMKqgQ;z;T}zLo
z{jp-OfqchA(Pra2#;oYaMEb%!&veThlQGWhj`>}0#GO7ePB$X9qaO7c(+P?ExGvMT
zrWeb{+HQK>L(vY8TM+fyhUWy!dhEXOn2<KaF>-8d+kRU<A!E(!I48DJ&N`M?w|W$9
zP@i+oc1?>m!%ov}EBYJhVZZ)R=UDbTMqzWb>#=oDL&DC=xJ%?UBHE-swN+hVqiw23
zoe2rsDs3jKv~iYEHuJ*P4Xg97E!L-b>73b2i&DcNQ)R`5!QNTfJi4g2yQg>E%nLiO
zUE7;3xFF5mG&^nHoW?Kq7+V^B;~sNb)H|3(deh3ji}=!{zxPa%XQZy?*3NStJHz|X
zGg8}<&gQn(<t@z}ooCNT^V`~5ni^W8%vqy0z~Z)?uUk61I#ToMwFB!07k95++uPI9
zdsX+9*Dmeu-_U#J(uS6<rsYf8XsxMzMq1F;+S%ULvb?!<VH+)J#JO{Vhc$GV{=2BT
zj-D7-ZmDklJvQ&proGDF+PRdpD-dlmE{mUIYb|RWKOh%Sj_Z1;B%}i|c8ynK)H$7y
ziF{{Jw9od6`dv4>k<e><G2fg!F-NsAzJnM`pLd0{SAQHWot@}%&c;0#Z3=s|#rZe~
zaXd^f_RqDzx(R7T+7R_6#C0L=_e4Ln-8_9@o<49~6Jnn{wyfnUeW`BO6U91~QO{_$
zR@V13kNS=8Xn(A_6g$iY$FB=nl1n>mLQGdG+cYigoQ$u`7nAXo#R;KtSiJao!I)}5
zE<=oY<IOoW8C!?@K)<;DOs-vr)@b7-Huvw2HRx!Z*N)b?>{yP0BROXst@G5~dEPl%
zV^>dnDhWB3$FXSVk&J1v{?QuWW9d3%G9Lc4*QLkOb;D#V+_SO3(pkPXygSbGM{6vP
z<+c4t*7GA-!|NEQ%KI3_^MZExnSK!QbLs%%XQlN>d`@MzycKm7_v6~HR$Z0%_pIlA
zL_Z^Y{ouY^WjWg{-WRAmE>{|-p7&*o^*oNPo*gA2Er|Zm5BjE>jbr(zc&}(K^=-%d
zN(r(3;+Radt%>NSsS)itR@$v3#Lc+sM)bR5Z@;DYo)Z%Hz@6*HN-yGl7Ry=Bz9eL<
z`@8zlGIA9%fOv1hx{iB7Y}0i8oe;})Bi{41&4d^e&4}ZnJ@ts63l<`tj}j7b<UJef
zM?2~bJJe@;rrGcKZYyG$q%r*xKG7ES6z}uvm*`XEhfT&oswl60(LZh02ilYnW5Yhg
zcv#kB$0q9Ni)wQ?k-h*?U$L(q>-Xqu6Z`GCsLOr(SBG4RBxGjJrO@`RKbGBN#X_R4
z_Gm|pwYuzsep0{b_AmTsT8y1}#zyqN==-8gmamLg{p<J?b$cAT-5+f{!(X+|m!svY
zGqK6B(C6BD7Lt&AqYr0cclgoRb{vdl$Jdx~9yTJTJFdo~b0OxB`?1wJ4joibpK%j$
zme?Qf?`|w}22%9B$EFu!rg9w2Ta6fd#<(^Y<9P<h39-)+ca`Tl^J5Navu&s&A?l9y
z-B*u!mXCQ6daohPvgVtYkQIn_73be*ZCTg06Vi$p)2<H<$YLbMlHIEB2N-P~DUPvi
z*uG<w5N$OMV(yw&>El=@!#BpqEF|nHj+to>$OViT&&09k)7gmUXZu)>*uQGJ66r<V
z9F90Pf3)*+v7Y5Tw%xgi=Y?o5Y`v>`P+8({U1}PaqqSC5j#JDx$EO={Y<m%p6JlD#
zYQ(7d<~je(cimG@q+32>!?-bi?#jAej2q{sacx`9t(d=Yeb7Lf_9*7rzBX#Rc9^CQ
z60#66&-CbnYk|7mnh@ub(w1|y`7${^I4IvH;<t&eGmcfnV`VJY5_iQ|s>RL@+A|)E
zpO`C&{qepFwoJ9PJ<bQt5A9X2F=xN*kLTKi)FH-X^mVL$S6gditwP0w;@G)mKW#ha
zjJA5L9}=QX)qFDE`8xVi&0h76=P%2Q=Cf+oVBv!%>Q$S^>gz)EyX%1G-C{rOzw1Rp
z%y%t`^PqM_e_|bsajd4Ray%^)I%1u2j7_&){TplWczzkpCkY+JcE|IFWh*~VG?Qk`
z8UxyCAGI$b9y^xqk7a}9E3X%7jg@M1Jmz7gP2scR9H;5>dAkW#i-Eh+=kfZGXjA_<
zrjBjImg8Eq(K)B>`Z;`jcbv~o&I7<c&qmHeysnvvMB3aM)8^#mqFx*qbwyfbnY(&S
z)8(yh_IaCT*3F(f{NJ2Sb+hMql<ib9>dmU(*u8FjJ=Oa!wf?F@|Ib;q>QbulzgmV5
zM%!P`(@@u}D6LyjTGiJ#Yek>Ynyt6%pc3Pm*moX#jbDrf(=B5x_abUAU&gs0>X@Do
zW2#a|%x$vD>-|L9x2$a&r^aSw`_5l&uuMX#weOf3-?4s#JuRfEH~PbF`8gTOnyzm3
zg`b=Q)#~^sy{WZ(HUIGt>XLN>8~b{CF;<_tZo74@>0Uu8{y_Z7b-msE>3I3?#Ov0F
zEr;^2DgR~pp}!?RpU2uxyhpAp!<G*0U4S$pi;*^@5phf9|Fgd}cPte1{0!=5o%UR;
z=l*EdrRF(q`q^<-m&cy7D#!UE(wcKg&^BX?q<)sJ_3DVeT-4mWVBMAH&M7gMdX$q-
ztXq#<nlCs-z4lo<Jdd7>%t2y1nH_c3A;yR86rX=HwxSHX6Y@i%eE7mX5ITqT-#FAZ
zW6?NFNL<&OuD`+$+NTe+F(JmR`5x=*O5ZNb)1qGZj^y%v%m%1^t%zeF7a^x13F$z5
zo<+T`6-s3r<Jp?1Q}pdDj!m;2`=Z^ps~&C9CS$V}z4|9~cz*VHO`fK&Q@*cXwcWPj
z9A{ivNB=A8v3~fdiGA%+#*6nvnI|LG*FV+9qL%*DQ8!{x9mYgL#u`U`rS107^4bu6
z)R*d0%rpMGk+9D+{gn{gFi-m}AO2Lg+tP;i=7#w#P0JT`H8&nQYHe8DRJuGeuPBx0
z;QDj{Ynu}?-@&QX{F%^OxrTI+rcK)77-@?(B&6sQ&r_zGmU0%)7aK`aM~q3OzL-Of
zy=C-;K1@ipc$}5zxt2sb`qTN55bcO`kDWV?O*4}6ecLcD^=<Sk;w_QpR)@?+<{+*;
zu~qY5rSE1^I3c#F55otx<+#S2sMfzkzCN)};j@@C=IN)14gDT=Yp;4^n~0tIXtee!
zV?I&VIb_?~r>)vkjNvml)}HeaZSpuF5mVOD_x4M%uDTpM^;*Yq?nKN}^j$)1OP^}5
z>BfpWx)JM}Um35}K0}Sw2klFU`W?IIt7+Bx7Gpqm)%i7Ae5fycV*J`K+tgn76VjCL
z+c$j_Yf9LmU$i%T9R5jp`e@@?8AtltI<~h7(Wmy?`o(cc99L^Qd{9Sz%$G&%+rMU{
z5piok)EE7U@iHEw9s3iT<J67BTyVc~d|UG}#)3Ax)lyHJ)MvZW&HlIN(w6hyGJY`z
zm|ecltq&UVJ~#&M&qrDi`{_OP*v2cnoPzpU9j>R=cRSkt>P4rqAMr7fc&}y5?Yl8&
zjM;|!ws#ehkjnKge0nl@vCnQfzQ*#c{;C%L6ZMzlrhOZcZp8Vn&90FNiR01wGuk{K
zZ{0ao$H8^LtqwUGvEK>tIMy9@OW7Y+`M#(2?rT;L^z^32?!j(9AGR)SZ&-ZT3!)}E
zE=y>`@z5S^sEi}$it*@L(ttQ;64HT;wkD4jdsLb5JhNTLFy@i=d2Ae2+FJaKmdLMM
z7hP}dtNm0*aUQs@-OWg>D~bIDh&ITCxQ5C)#F+IQV_nxH>$=wJn}pO_m!cE)%S8OI
zEzUE~$@bg+C&c+^n!Zhl=bdiEW5?F(&xCkfycYG?a>k77jXFa|r60n_ex7MS^rbPS
zucT{BLTXv_!snye@AZZ@85i24UE1lmJ60ZtJ>$-+LoZS*zJqc2?=shy${$=x`E7#o
zrxW&PpT`Y@?6XS7($emAedSv^&f7yr-Ui}c!<<V~`G4**WH%ZXtm?h;YNvbK!ugG9
zN%#8o*9@%d$=__5PAvOsCjCf=b2s{BKlO`!OgSCj@PmFaJ+3h=tLQUh!2DQ?)n(l{
zR!5A#=?PJfb!;zmrTn<E-C3lE-($UrI+g8Hw7ez$kABv%Z$GW${BsL^iT%;anHSr5
z?IsGgBlgGs+P64oI~Vkk*LKmj#J**n|K_`|=(FHy?8j!jTUWouHDbz-_4jE0uuSFL
zRnHlSb|z%BdD}*w=S|~3#?to3YOgp}6diuI!&vs+9e#`Pb=}Zj$HRU*x25Y&ti_dU
zP9m?;XQo-NxZc?($3mYdF%QD8N8-PP9(`^MXt%m-L;FpOevLBE53M>K@#a@1J==7o
z18G7!kuGFOE)CE;MSnFSvDLD!YNs(AajajIgoNGBG3TH@vRwRKntqNxv0J`Au%E_c
z_%r5_cB-SO$F}v6<7#=wC?TGU%`@Hd)qJRJ#&&r-u5|oy>>Q6wK~6wUK@!3?TGkVn
zT+-gr*|qe^7I;_J&=6{<e*$%nJATRuryQrgQ7e=89AvZt#~qK3@_#BqTY4fzLw_ng
z(b~u5?U;Ss@%Nc>-}~MF1d<YJ>k#`MV-bEnn>083m~w*h*0y1A34e`0|JuRcIbJ35
z^+A7X@4c$ZE0Sv}Z$O@yvUZC0v`{<ju~Vb@h+?B<9kagIF^iGAJC1E<<9j?aluFOf
z`SP4M=6qMqkLKK&^J_WV-ka6ml=JmDKc4faIsg29S-H76FUk2oaqRTx{N}cf<;{)f
zm+I?NBOjL9I@6V_y4PIAS8J>K)~EiyHI6RN;nk<b0~>qO>1UtrbQxULn|gZJ_pReS
zyxF@m%B9NX7UcCumfGmME=uJWJg0bdb!lPWCKPlIT+It7v;VaxURYjQyl~O*e%8u*
zt_;=VORwA3@kWr+@E1~TD_5@X9V|V$uV-*oiMMQ|{AD{_Pxh8N`?!p}sJDMOmD9$W
zp6+!$rFfliX~C+#wJKP$pgApBv!t|S;2PeQzPNi$_f@^Cd)JWB%NwXy@xC9|8spwI
zH_id>$N4s~e>&p%$F(}n0p^=NydJP$i=H;hd9GA!&k^xlP}Eh6o<{0)=XIs$K<)0y
z)4X;q>g2E{`{q;5S)-jDNJ4B&JGI%iJTK|DBeC1Qd7g{UK(*?oN=^31xnKLVQ@fAE
z5BA^dqssHNV>VHJ3#b$4^0>Aze$<^1{Ty)+?N!E~=f8=zYk9witya%*w12j3o7y#z
zxKEUCMVu4S569JG`>OrMVnSk$7+0oyAH((?qlnqWekWr6;v6%*+L(q;vWM@(>q9@A
z*f00JX45wJ!xnupA34$(r|N{;JJOi%qAmSZYrkrZ+406<ym%e0orJApjnzc^Q%zSf
zmhWmms_8GrRRjI8PsXL!^Tw6&>E|%#i!p4PYpro?yhU6m_8m9NDb|w-vApG6OA=z9
zb(L5riZQEh;~*i%v-QnSNOA43uJ)Kd-ZO5qC=-1(KEuAy8|`$H7j0W6;xXlQY|paV
z82O3)%08|jP2Ec9v%i+Jp1z2@qHQGCwC?*%zp;@JZT4KHUFr<Kn}0S^j3Ew(*RjNY
z8&a)L+86#BFYa0>t3Rxx4eHbe*Px<3qqP<7I4+i7jp!qF9PQ7Qs4Ug>oL~OO&dl<^
zQeA&P3#oP(U$*I(*%y858k>+NM4ObbFR@>Y*I46=aZ^VbeW8B$Eu*huGkvUkAc_3D
z(nftfk0a5@U3(8?LwiS4d-+X}D;5lFSTo24CNI2uOzD#4rP-TGb(fY(FZza&QY!s%
zcgAOYGvnfKXZ*u=GQR)28K-?O<Gc1|{MC;#{_-aoANu2rFZz1M5B^)m5A4Y}l&3G@
zDM@dqW<Rr1ege;*59(Um!|N?cFMpeI=!b*&IFOYr8_R$Ce<qR;$GANg<JJAR2W4zH
zhaLYuB<4+G-}z^nW7~_QoR(E0UYzT07hG3*X0}&*`}W$n+K3pJ5o>X-pQwGYW~oyh
zVY~ittI4nH_&uL>Ytov5)U<Bh06)+acN4g8GceGf7WS>_iO)=Y{yCFRXzO@2VEGdh
z$L!inZ+0t;qlL{aO<?|IolP^+hBfQ^u3E##EFOV8tGq7i+q-*xxTn@3J~(FYjV-)L
zb_V_HM2hFU`5Zg;#-n4LkQh7H5sy6=I*uO4dC~ZcxQlZ`#ERuii&(a<=lO)JK#T?J
z8t-18T7DK1vB7R>)`?FNrSpza-gLr9`%ZYk$m64B_v>=KKgoIONm)BHa?Z=ye~h!`
z2<=;z*Lz3KPvrb^&ihZz{Bf-E`$uT!fxO;jdH>esyd~%HCujZspT>Q8{~GfCb^ck_
z&+GEz*X8_h&aYRLi}K@f-x1auPjA>2ykBmA)Jqk|k$!$f`crfJUY@7FKIc1ge*GBd
z$BxjxFXZ*^sq<v_1GD%FF3OKvPZ^nhb$<M!oNvqdnTm3uXFT41g!RVL8+HYMSJBRc
zEBYJyX6ET{erVS3;58M;k=~Z4S2FU05C6-N`sP*~N4cZLPv`naYbWfTXnU3QzMHpm
zO6~`*qm&NBXWqQdx(r!@c-?QB_w-s2ueD59EaO&7{fj8qfV3lxxw!B3oA+OAC$?Jj
zEugS^)S*qzx!7u{ul?$<p41NQbE~C(7v=PqWn-(Qp8d2<%eo)Fi2Zm*(__cM&%gH1
zeqM~Y)zVJr*SE3NQqO+1BDN)MTN~VWYvu0~2EP9KrUyRkrsj|R%?tjn=_|jTzL-yW
zSJ9JR*v(aTKUdIR7suAYanBg}e=P0$^lv}2sP*Olx%IhSXI{Rq?+w|!TU)_v^5Yle
zygui-H)iGEStFO`<rdXgel)!o)L4I__KntFWqNPkzJ9Jl{A}Xq7`Hg~9*tWZb33BE
z8C&ZRKNIzqQw}|MpdQCB(r2?D^(=bBhckb_J?F=BPWwof{>A+GyEzZ!jL%iYHoZU4
zja0U2JJ0)6rmyqU8N2=^<BhvU^2?vij^FjwyT-?VA*&ypsJ`#)9NGSiuZ%n%P2aP>
zl$EQM-?%L+A6#8=9O<=k?Jb$UCwwO3*`LeUp7&>M&X?ufp7VY=r{(<1+<!m+d{+Oa
zTQknj$K@e8yL0{|Z+B<j-rC$>AIk0cRj&8+oag2IV$S>J<9<S3KJ0%^jd9SLw|80|
zPmj;}+MJi<9L)KQFJ}FDb<X$a{7%l}^Kwu5a#rqHId94NmYny^+ufTVr>WV>{^*>K
z&AH^HEWIH=uH>uo{Qp}~?)w$Tw^bZh>WT7y@yM*b)j9w5^z3+Ne!OdXc3jC<jFLZf
zl=RB_6FnZv^`_jO@$4H-e{-%U`+dypeD0d(I^`O*7IE`h!S%^?$~@Ps0mSulHPV8Z
zw+8WEQEaZUeTZe$YaR8f!>tR6byi(o3s^4JM9bQ)<%{RjCXOwygdJW}gbh+V)Mc62
z8rZR%*E-tPfv8Jb)^>{hwwyK<%Xr@_?DT%Co7WZEp{Sz`v0cwaMH}>!$J(Zi>he2<
zqQ24UQf#=KKB?BG<7NB$Tw5FuH~XzE%0%i_mL1Q>mF2x=(vE8ouQA=%zuKjpvDM-i
z%NEB^efm&eC@b<~eR?(GHk#f=<VEZh$Gch_m}WbUwPWY8wwoqRi*2IwBzzKavOZT7
z@eqB}@A}Si(Pux8m}Wm#Bi0F<q+6w)cG9%h`DH!#ZPR<kwbYOC47+VtG2Zk=H65|G
z*p}ly6X`<qV{Go5ua4q)eDktwy}dK%DNo6cXXN}~&i<T>az^>cujDK8a>rku>3i_9
zjPvs2%W`ha`KpR?Q9k&dJpa~;a<^9;NBO(Tuq*hxBW&ky@_N5mp7lTYwfy)KPaT>5
zo&5OMIUkglYpJLodV+m<{_`u!-B@uP<?kxPuHZ+Hu$}t6o^zyHe4a9x`6t-6Iy+vn
zCgVc~GCuF=89$!qNBQ91JU@<ur{(1juFvZKG-u==DSwmOwP|gp_xCwJIYIq@pX;gB
zj;lxMXRY-o%VpzrwES@Ox=i1Tt{urYUXvZaD`(_?EI<By&Tr@ZaYec23VpxM^QUYY
z+0KLW<F1?wEApe=@z|5si+1bs_Rq<AL4`e0ZalqL<n{VSVP*a2=60O*imacN-1qV<
z{Q-G?oS&;*?^a$*wXp_y&hE+ABKKn(OV4Q6KvBo*n$dJWDsP|(+MW{E9H+6L5c9mp
z;<?*=uRXj5^Ej>(Jn!2_uM@oXO^9WSYpTbVGtE9G#A^%nc^zc^XxsE+x%T|nb=vC(
z%iDfJytWA2Y~MD*hN8|yy7vkj5cOHF6VW#w+s}m5A+~cO;^uRuvFWeSq2ImEv0jvM
z-+n65m($o!h}WdOh_-sK*nRyvn*G|T9ma`$wl9kH)Sr;3+s(duEoYsC%tq8-movd?
z{;;n4tf!8!+jbISee=Q}?3VjHT0e{S>R<KM(%(e6KSh5=8&k{~v!BM8{W9j1(dI%s
zdHTSy(Z9tQ^;-Etq_T{@A5C8(Pv2W6#@yq|xm7v-F@DCOaodczMnvrDhgPHkS&TFx
z#XLXznCF<<@5p1fWZgDoVJ?oN^(|Xj&U@|AcBQWI^wd$;n6}(#dZG+PO51MD*5h{{
zqr7G3Nc(nwcI5HVvipR*|Ci?Mx}>>Oeg-Mqnc2mF9ry72{Ozxnl}b0BR4Pq<&>chb
zt|*oE{M8*pQ{kH)cE`{bc=@S!3~htYgEzz0zrJH=4}3(rW9T3}A5ME}sr2E~?iiX2
z&p-W+p%!>O+{G6^zk<{L4}aVC$UBC5NS_Wj!zaQUU@P1X-w$`fgK!VLX!;#P2jEgT
z6+Jh>>2M#M2iMl!G1LjS!G81M7Wmjl-7&NkJ_+uCpND(lUU(1=!5P@I<%~Oq8sXp9
zV;7t;oBHrU=g?pHd3ZCNJLis}-SB&GAN(~ul?8O!x%3zI!xs3@um|=%4n1%!+zQ_W
zr@$R>2YlRl_yxY@@z@1VJs-Q^v*9#uczg`bfS-lS;0b?w$Iu{5un}GjuZIWVHaKq{
zcEayH0XyNto`{|BOgM#;_DkTY@RM*Z{5oubZ4KB9KL<C%ug+&Y;AsmO4|o~e33tLh
z@aBsc5BM86m6Lf-Gvfg_!+G#!uoJ!p_QNN)U?==^EBfFmm(Xu`zYgq!2RqTz%Uall
z9{55y5B?kMgzcBoZ}=2=J=_bo!JosM;X|H6f8plK(FcFEjQ*~~uBXypxDn2UFM=)b
z4X_7phnwLi;SKPsa69|~+zAiBJ@9_Z=`VaJoO%_{R>SFV9-IfC0y|+p?1wLbTi{l>
z6@DD<fV<!>_;a`y9)t(s!~PHBy^6SlGvHj<2p7U-um|$@VWo}mdUyle2LB1(40poa
z@LO;n{4SiriRM@ERQOvs7oONn|KWpR51bA+!x``fcp=;lm%*KI4cr5-hX>%B;MAuv
z{%|_{GMoqZ!A|(!upgefg8su<a4T$qJK$5{F1Q))g)fB%;dVIf>Qd=8I0OC^Hp2T|
zN&n$=I0)y%>*4=_+u*a{&G28~Zg@M~2mc7CaFO`%9{LYw!nyEb*aEMBJ@7iX8U6#j
z0lpe;hwq0w;V0o9_*HlS{s2xbU!2l^_}9JkAI^rI@I2TLp9HtScDNPxz#Xt3?t;&P
zd*KV=LHIg2jT88r;SBge*a$xkm%&|d5blQ8!ym(K@R#srSXxQ{;R$dbd>EX<MaSvz
zR5%yTh4WwwY=u2=DclTK!5iROxE($Z?u0Lad*D`h0B(a**Op2jfz#n9;XL?N*a^P_
z`{B>w7I-Jz3a4B}|KaIy7n}?C!ghEN_P}ZUA;<IJ40r=<gdc><;7&LQe*mwC2jDjN
zpjGrAPKUeUe7Fx@45x5W^kR4_d<C2f|D%uo!`)9qAN<PI^c#K`ZihdDJK+Ji2mS#b
zfCK&Xn~UJTSVO<z?_ejqVt{_ajc^`(CG3aqfm`8E;STtFxC<V?mVUzr!h`Uka2gkJ
zXTuqA4s3)Mz-6!n4#KCx>)~7BHhA9Cu@kOYk3RSrco4pC1O4Sf^UWLSFWkKeJK=q=
z#V+{sXP^f*T!$XG=b88qKIXaf7d{^zgkO9<didaY?iTt5zwvk21LwVnc!5{Eg#N)N
z{R8#k&)^<-5FUV+y%c|4!*?HWI(#FX2j34n;a6Zk{QFnnKREl9=z|TfLLb})cf%`g
zU_9aAs~Jx&{C){fh4+0e{ev%qE$}C=Lmzzl>+u&~xa@%2;4Zj@^q<15aPAuz4>%w0
zf*avp_<MK|E_);6LA`@;20Ude;{jg^mw9|6{)3N(H^ZyoZulm+58nDF?0iP4^nriG
zPB{1f(r<VN?1U|E!A|%RxCK7wt=I*xhdbb3Zo@8k1KbNwe;anex4>!Fv97@x@WF4#
zF8L1Zg6G0P_?Yd)Gu-q+^uZh9F8Fo07vBFv=!5g%w9S0>hBM#`VIzDuTn4`i2jQ>b
z_3&Xk@F#o%ycrI{-SC}oAG{q-d1k3J?ZfmNHp98_*{}uffIaYMa5Mayk6<V4gxleZ
z;ZFDtxCj0_JOCf`QR3)Xe0GM@;bu4wegJmDAH#n5@SE@_d@0-t-wSuZFT-8%mvArq
z4Lk_feT@D;oAn9KfKU1a{fBRW%iz!9Al!2^{fD>wGy32kKZ`zi!spNjpY{d%{T%ec
zQ{lC6F8m>Efm3dy->?pDh6~{ha53BtSHqp~dbkI^8y<k4hEt!*dIYD#6Te8m;bUPZ
z{3+~*tG-0P;p^d6_{A?{CtUb7?1anVUbyue*!eu-2%ZYx0q4SxeFr<?7yk`A;n(42
zc<Xo32fqS$z;DA{@OHQtPQ4wwUckEZJ=%x=1`m?{8#wLxjNA9|E1U%z;WOYe_&GRe
z{txggTnM+B4{wI=g}dRL9}-vaiEzpm?1rbpNA1OKcs^`_7r`F*F1Q)q1aE*3`w{+y
zuY)_`cDM(g{bT$KFN9OE`(`)~eg}5K1F#?d`A_ISyc6z#(|$_-;hW%I_)qX4d@r2#
zLOzTCoc_Yqun`WzW$=Y?5WX5-4{wCq;5K+O{0Q6)KMVK4FTp8)$GQzqg?r#!_(RwN
zAMp$N3zx#pa231(u7%s-^WaYS3b+Tp8y<i=;nWwEN}t+~o$v(*&<9@&d*H|6X4v{0
z^ua;69ljp!gl~s?;Jbf^KKLOx^~KbK)8X{r<44%_2mA=Hfc<b2+yZa^Z~6^?0&j+o
z96}$w5FUWnz-cexx(LpIZ-k9-Md{9=W$=~9-8nP}Uk|T`|9bqLL)+oO``kIS6F%*J
zcMk1^=bd!t&_TEuPWyZ2C7c0Y3mf6aspx}eos2&C9e6!_%qi%D7r>qHzyt3b+5<OC
zyL0FOd>Nd2J?kBu4sU_;;ICjOJoh1Y4)w!};TE_AZiQFD9q^-nap%x(IR7v29NGu}
z5l;DsQfWUt6>fUyokMfs$6*Wn4eWsfr=kx&>=EdLkB2*81Kb6h;a>Qygua(DPN$&{
zKIC-t!5bfmK6ptT_Q9vaE%2pqD||WJ0cSl5eeiv7FTCsw{0N8Ow3p%UGw~yQ@LBi~
zz8o%tznO98&}Ml4%sYo}fG?YcKDePCeQ@J!^ugQbpbtK9F7~|~J0635@W5lS4=#Hg
z{e?e*o8jsUun&F_?tt&V5dXm?Pr!fhlW@u_N~OPgBKqJuI2S&=f$@NEg#GY0a0_gh
zk3RTwcr&~c?uHLqfIj$2IOUaGAHq}Nd5!3U--n&>XRseWp$UEPJ#Z^LVIlUxXTx3a
z%th#f{|`=i75%sveef+U=!3Vlq7UBx67<38a0`4j+y>tVZ-x)=ApYP7;Q{z(oy6Y_
zod4i-c+Ha;2l(Ji83))22jQ*odic%D&<Edt1@R1jvz&2&&*;UjSM#jnD(r%vgLC0E
zeT)OV-_sZexCm~Bx4^CNC0El=_}Ml14W2SUKjDkvl-HC>Z-b}8{<Y|XC$2{y?1DY;
zD;wx1`~}<!Ke!Qn@Siu~H+aIe*ax2r55gPawAYqOCq09>gJ0fEf8o!cNq^y`&!WHZ
zckp_6)wAg@JpMWO4}R&n_z(Ws^Y9;hDV+McQt7{5fdAm4zhnNw55rFQgcmU$@I7z~
zy!6G`3BUIe^ug2qo_@oZ!F}*y*VFIUvkv|P`rv=SdGN-UqR(U459hxeeQ-0}3SSI&
zz}LWC@a9*c4}SOt^u2+5rmx12@C&a&AN&^Vgg=D+@Zf9F2fy)p^ufo!5q)s#R_udk
z!hP`k8|m*GnTK#X{3x6Ucfw9M1pDES--Q3*?02&M!Rz2o_+hvQp8YQT2XBK@w{pID
zH~Qeu;5@i|JNn?;VL!YRZh<r2gMIK1a0hI8AN_@=e~@v8zlKw8#7`flzwq*p5I69x
zum%3+qr?rIeG_pAe+_SdpZFMd!smY+JK-I04{Z1ZcEXpysc)j6a60_=o3RtF`XqM3
zcYF#v;dP&;-|)3?8$9P<7-x7P+zs2|KDZoC`A6a!o(fO>40d`9Ti};&!A^Mpo!AMd
z!5iRda6A0j=jb>5!L9TgZvF!C4Lf$B@6FuDfOFw$*aENn68hk)zJed&d%lVv;d8!*
zeQ+z>4fnx)@ON;^|K&F)zK%ZlFgO>U0bAf#VGm5-z&_Z#8~fn%;dc0PxD(z8_rTk}
zi63G57JhsSc6^)p2j2`E;d|gR_^t0S|IFWmKKSi_M<4w9cj+%Y<97NBJK;gt4X3@8
zc!V?H^I#)<8C(W0{sH>nU;L19fh*xQ^Y_wk_yxEdehcn{zk^e@ai0G%;|%}%C+LHn
zKSdwB^=I@KKH}%t2hWDv;p5;=xat@57k+Oa{e{ziNq^tQ`T%FZhyN$~;F)k4d<-0f
zUxzoq+u?S&5AKA2`789nm%{__<U7#!Pt40Zu@624&Vw`eqYwV=0rbJo{hI#5AOD8_
z!jJtI`rw^#4?O#~=!1`gQ{RrC;B<H?oCkYhCw$27h-;7G7Wnbs6F2Y<xC8z-+yzhi
z1LFcuILNrb<NnCFyn}jh2K=x8CT`%AA>sx;5N?Jqg*U*t$L}B70qgFwe`pu{E!+p6
zK4t&Vly~y^=>GeMro-tc?;mP}S3hw7P!D|g^!-EE!zaRR@TR)`Lp$O3;U4%OXYU_6
z2%k5L`tRcYE}RFu>-P_J!W(DrAL@s{f?MDT=j<Qa3irU9;qp2AhjzmkoQpkh+hg|+
zO?@}l=Z`}leA9W@13wOz!OI`Ne`pX6oxgwR2G}x>e!=~47i_*@|Il8z6dr_E!fD(2
zJOO9GmtTlJ_?jo65B}>D(FcDqAARuY3-%9fhjW|I2XBIV;cFJ6559E~`rgC5YTiFI
z7k>3g`-fWKHy6`SIJJ#_!h>)dJY@;}gpYu`VcjMBhYrA#+Ue(exsL>=!#X$*&Vilq
z)(-4~pX$W_@RBa{!KW=nAMCjl|HJoRhCcZGr(oCnxITq5;MbO67yRB+u?x;wj$Lr*
zO7y^)z374G!`*NZ+y`H{l6ZJO*H=%&E_m|Q_zSLp%V1MKcEJy?#xD37xDEaY-VEP1
zfL*Zkbo>RE!f7ACUmNfjeEdf2f-k%VyWq@C*agprTj3(O1K#I4{14}D#{ckV&qN=5
z<g?NDLC!O9E^K}d`ryxC4}9%&_YZA`|L=L|gXcUSeekz%7o4*NeXt)Mgtxq4|In!)
zVjSUI`0ua<{uK7WPrML)@biC1e83031by(8a2IU&d-TB%UXMQbq?e*^2lL@&=z|Ae
zjz0LfSE3J|_$vAf9|gC<e}FsS8{jVZt{WH!xcb$M!-r`fo(ew?=fZEo7Wfm`13&&6
z?1Q(y7W?2SZ$KY>1>6O{v=x2uNjIYJBl!JI=!5?X=fXQ+3*7mSjECuO#y;5m7VLxP
zy%l}%q;13rJOl27e}Gdy%IEF3p%3=Kx$qOP1z!D6*avTeo8kVqV;`LP4(1m;AMS*U
z;2zis55R6X^(O9*!s+ljI1hdhcETO+#7@}t9^w!7yqEZc%io7ScpcmWJKv8!*bS$C
z41I7qybf-GpM(eDx8OW@C+vh5egOS&C)^6Z2Y0|}AH<*VOt=@m4Nm(w<N6`y8~o4?
z<_R47DE)?CzlnC>j*np<e8b0?AMl({;79mgxDP)3pYh`-SWiEReehkMLJ$1gPcz@(
zf82uq;Ax-39{6*3GhB8ndf@4wM-Tj)FVN4Mxz4!_d*G{KBi#Q*^uQ~=#Jq)Hf!CY=
zW$c2l{0e@9Cw&#a!M?BIH~5XOqwk-Y@87^Kc+zhC1W))T`rvcnAiVus=!4DQK_C1C
zyxIJJ#Xk6~e?uSqFF5s+jN2ac!B71=`rsd7CtUtr{0=`4x4<vJt?<;_@jsjecfrTP
zy>K2p2v@;rpJJW=9{q;T{yzPdKg3RW?OyDJEk7du;3~KsZh$-Ci{T#l6L<ig@nh`#
zG}lFNIy~bi*a?^X6g%NdU_X2<+yb}3t?&bI2mB=51-}UQ!V`Xmo$$MG+P`4`FR&9{
z4jbYB+lQU-z5l^D!&85Wo$w`aJ1qStcEabtz3@rDLLYoFoc0+$N8W)xc;DZn4}Jso
zz=l7d4{kk(KKK*39iH|_^uhUX4}1YU0B?j-Z{d36zv(x8DVzsiJVd|YEwCR>FC7@#
z0>2Em!iM7x4DEogfxF-t#~&El2fN{vo%9=?3U9j4fuXsue#(KN7J1(TL;a@1E%3~f
z4h(IB&xJR`&Z!56_Q21;1Mm?i9~heYSxzf(I(*ol9T;kaFM`Y958)tu+@Bv9x*mQH
zZilU>92nXO-wF4?Kf(j>pB{K%XxitP*AF@{Gy^{R!RUi;g3I93ryUsD3?KWD14B2!
z+y0V%!n(gcFti)){TuoTf0wZ9R^~mN4)1%~fuVWuxu+i(>V%~_?1C%c_3&$O8+_2C
z=qFqbcf)@>1AXwrv(Wc>?1a<d#r5ce&w!oqL+79mo;(+Q@bQnKpYS!0MGt)2`RIWk
z{agJ11wKb#fdAo-F2w)x3Fv_zej@&d2jLd@r1^{|+`E8&!rK}dPk2((fuX(d7YosM
z8|P7YD!lI^^ugO;3q0?l14BLVIdC)l9=riQtQq^@58zIC+Qp0md?h>p=PjncUxclU
z1AJr~_Q6-ce)!rY*av?Ex5Aq)`TvBS3%t|w|M<^2EtOW1b<^UMsnjBjQlq1mii2YH
zjaIr$kx7_JExJsUAvsc<2q%hBIC47?CbuKegd9XGs^Oe%-A>cz|9ovb^Esb=&hNj+
zgXcNV_xtmDzuuS6^=ylAgEcS=pS_0u!lBoaUnR$@k>m&Og*F&~#c(Bb!xx|rz5z?%
zW*CHD!4MoVn*87gFah1yk>6LW|Le&Q{tF%OwlTzmKSLipdo1zb9WV$xj${1bVi<w<
z-H=d{a62?@mB0U!A2dxMKiCVp;qA}|Kc7f{;b=GW0o&h5Jb3P8;=#UChzC!+nRs7w
z-#(T6VDT-)gZDu<+~FY}+zm_MhFi%GZh|5B1+0RF)95e!3>vqw9-#$JnofV=)H~QO
zV6VG~2ZzBDxC@rUnKPIV*m5Ru;DA}g`G);q4sqZdAL|&tcn@*l$IuJg-pe|MXTUPp
z8&<%JVHjQxqi`KGe9Lo}1;m3b7Lpe{9lBsK^uoJg0RH4B9<)6`KcRCm{e(*%WZd8r
z(6pW7H?+dnpaZ@SUGPijg+IUm+yl$trH>L1E?Y)CcxDOxg)^WjOn;#jz6u@Cw48Xb
z^^?Sdc~21!UbKpNfa_o-+yNs}{xtc)7SQw^*Qw7C58ktyc(C?a;z85%#Dk}oF%Pgm
z48k2S1b4$KSPc{KUufLHdRfEx!E2!%#-I}#USNNN))&bSKD(B9!k35#uYZO7;0&0A
z9bYBC?>WA2U>(DP*I9RP$Q#6gUg(GOVJUnVmcyrDC7fGMJb3?`%<B)dyOI4CUi>zB
z!Q0*;FZd7i!Xym9X74f&uq~{BXTUIg14iMd_vq)3T!&Q9Pq^g+#tr_xnQ?>DK4ksE
zr(g+O3xn`Y7=j<cDtOIDj2m=)Oh0#WT@0<TbBK8GM(BdiKrd|Z3HiZWU>WppAwOvN
zlz6ZhCg6(Ci1!o6t1pNLM}9>-IB^^C;G^FV51zAw{9y49<R|=*af54N6rQz{ajW8f
z^e4s*4*r>OgAeZ_4m^K1{e-qX#DPEVW&C0APsR)W1*6cpk2pWG9`_Rmc09m*!tSsb
zPJ(XejxwL{>c5yz_!=yS{=dl!KKc*y33t{I?-$l>jCk;`L-Y?mdW5{70=;m^QN|0-
zOVU61E)2no{$;%27KL>NyX75JOuw@3p$#6)Kd3n2q=JKr2fh#euwA2rN-5k7D`1h~
zpc019!6@7d4ZC<Q)%c)dfloj?d<!~ZpA(1&S3*Dh8J5CDO^62{hGF<BjKZExiT4}t
z!)<m@F~i584Ng9hcyK%Pz~Rk_2Uo*V_<75NN;$maB;vtcFbb!fa!@h;&hfbo`N7p~
z4=N7$K)ZvA3qI5SpyGw+o_bITKySx`N)RrDA-Eq_!OuD$RFZJendG%w{(eMWu&gV2
zL2Ebif<MCmT-W`eV%@{}>n!5K%U}>c5r*JBunK+w6R>R$@{Dj?h8B1aw8H>&!oQ&h
zCZQjW>q)=iE?5q4vK~|_p$|r2Elk3ey_jd(4?qW83tjMI7=X8&eNZWb=bTGka6gQ|
z$IfFO_Hz6?pZ>yD7m^SB61t$b&q2ipqp$=H>r4OOzZVe)_UT9e;A#EoAAABD|KR#&
z0OJB%K?iIHU2sYf;{<oX0PJ)rdBLk;1)LAV@C_J+d!XS@wjW4-a0#@*BrJwSgAOWg
zI2-z40+zrg4)TPbT}GbJID|amk)h-Xlb4g{KK|ZU%sjvySJH3zJ#@l{u4W$Kq!G*m
zbi-13i<5bPSBzvH;3qHwJC9->;Em9<pZDKDEBq5WV2jc8AGRJtp3v$dPuOiN@!-R-
z621o`!W)Qlfb~3{{=ya$=r5cE-Ecbe!MU&mJ~fdza5t=k=S(6FTn`OV?jNBUHgOXV
zZkkL#;cw6bn@ypgumdcGU0^xvaTD=i%Ug&CAB9O6gQmY24-fr>N1y|KG>v}3-Ovm7
z!2qm*W$-AhfX3UHXL$1+%rpEE8vZ7~JINDX0B!IESPb8WZnzox;J2^@?u0=Yg&~-L
zRj{d-d4{c^@gI)o&;q;7AWt}SCV9e*v&a)(H=8_RU=Df0RzC8CyI~ks&m~W|@?PRq
zv)z394Z{nF2NTc*AHR?Mq<j(i!P6cfKltHd@`H&b<OgRxNPh5&0P$+LPJM{{VE!Y-
zgT_bcFSJ4*Jg|&;f!-441s;KwaNFa|3;cOG^8$CSVEke{w}3YI`jgBvoVSX3hK8q^
zXL$89#DlKY#Dmv8M?c}MFbbc5hB$dcGo150`v+`PMm*RCdf=bX4-c*(9?V<IxWThw
z7$(-yPx#i$^fN*HSLi3Kfp)lZJ@McR8;A#=f1P=Ndtn(2mNRa!%|^xz4u6|?u+KZ>
zb&&CSkAA`puoynHiE)GG4;VLi)@J4bcKwKc!lI8EH@GFlxWVsW5>DU3dOpPQ`7`Df
z-dRaJXxmCWI1u{a^RNWI4ukMV7=pvUCO^1l8~MT2-_qa1oL{%oU)Ur}e_{N4)*Jj_
zC;fzjexjf7;VQ-r7W~4v!Rasx@7zV4BjoiPao}mt4(CEAd<uGC=y&D;{<WKVfEP#T
zFLc04SPUcZIhcf__R!y>Tqo|OzwnAbSa<OFKJtV2Md=q@_z(So9b>d#%kvQEfSuxu
z3%mvT;Fquj_DL`<urCb3QLqZ$0~2s9G#=x*7qq}94l>TL-y!0`t<VR5gC#HlgK+0z
z;=zAm73_F~c<^~>OmZBC7TD=1;{z{-PB<2N;9Tg3U%^s%MlItFN5C*#3={ATX#AJw
zJ<tm6$LKFy1>LaSzvKtk!BRNlIO7akD8zw_VFJDdjmK#x?~r1JEej4QHii1o4W~i}
zei3xR_KglHUf2}|-~+G>b~hYSDxeF7;aV7lJsKZU48*wvnqdVjhTlUUG@fusDTNon
za=0B<!p2PwDG~TqQ?}2`&)Wgbuz9mXiXGaZ6HbC2_yF|7T38Bqo=7}6pgHlN0wZw0
zk$Cy}d6%C=Jh&Lzpy_1tf*qk7&WAqu2P}bCwmzf;;V&=*i%vPDRKe{q0WUNiQj7)p
zc_C<lUD}W*oC%%q2k3=0FaV8h88>Kw6|e|~p$kUgENEzypEsf%dBQiK4L;JIJYfvF
z;TIjq6Lvq9JmFjzgulQ_XfTr>oCHmV{Jepk$O|5XZrJQJwufKAQfNJ$eBc-uh7~Xh
z=XWNb#`$@BEc6eq?@AoF4Lact=z+gLKimsT;Zax)AMHjyuvvHJ0lp5CaB~mxI)Q%o
zWc|S-&;k2eS#NMF^uoEl7&rLP+4K({IEQ(FC-!C@;14hXo1MozG$H@<$rIjw0eQk(
zE+kKQv@dzW{ENsFD*ee5Hnx)|Yym4_8yJDZU=n^<#5^?3&%13P^8jlHF%K}$!8pPb
zpbx$^n0bJWhLR^d5r*K&unNwA33$tu^t&1Tf>u}w9kBgX^c!9Wy|DFg;=xN`5YB^@
za0`sUW+TWCmO#^q%onu6KcNH8yq5gntI!9pA4z}V1XvDlf|c-T7=asL60RRjf1A@!
zXoF+M&|moE4U8Xr4*KD{uoQj-%i$NW61E;sJlGi~VdF{UXJmY#6}Ev6*a^Dena~S+
z!2ld|Bl`y&HHGnm@881s!Jlqp{NUv2%ySF&Cuo7)?qHtbdo!75c=9argyW$fJ_}1>
z0+z!I?j}$80F1!yb6DRk8JD@lg9qjjPdJ}=u*Cx6!GX{Z=fF}}4$EN_Rzk}{;=w!p
z^c&8Brjzn{Uq0gqzkQH+(D)GX;AzkgyTVd95thSG9%lc8`H!&w!Hc1x75fV`!^z9Y
z555MS@PfyP2j78y*sX+k@NQTR=fO&NKa9ZFVG@1{O(*B)Eni7~a84=n439%MoWF{7
z17BXvI)q=rAS`&6d4c_574*Uc3_@e;{JaRXz_w-N3D>P5Px#zg@`N8lKRg0U;koO`
z6HbMd@NXD_on9hOI1rjn$<G@Jt?=QOSwHX?birGLtRFZB2H>yjSwC<utbl*RFgygK
z@HjM>i2DY4!pEQ;Zh=mC6nfx|<>U!>!cy4cP4a|Auo7;B5m>yDJYf|ywPAmJi#*}I
zZ<8k+{|<S=r{5({c<ep$gqLq3Pq_Mh@`P()7;c79*!%<XY|DDy%)G-VKV+U@^N*P)
zcnWmGp3nzpz!Lc7C*%nYTgVe$3?otwlW;vWwc|Jet?(b{fbV@qp70~+h2GD}6JGKq
z^A2ag5PTI@!G9}>2Rna7y!M<ApcPKsN<4VO*TjR~ZR7{@zac+(E)2pV7=l;BDtHS_
zK<l@xqYn9b=Rpe`2<@=tcIF4RfgZRS`r(yf<_A8sgMPycf1uy+aTtNSVG@qoNuH;2
zzJXSF#!uu4zk@D#?H=-kQ}z-MegVtju|Jp>`F$Vx!IcMy(=k79>0itT?C>}90Ugi{
zuY*1~0hYj<VG!Q_4|%~Ks+nKdBSt^Xoaf@?1A81Kj{JUz{=uDx8GpF)DBHs^wQLU;
z!3cZ`CSj{%<kN|HhE_NgI^Yw~1>c5V_#+I!C@g~ttbnbP^bf9tQP}lg@;Z&<7_`9k
z&<+nkCyYZ6Y<`^aho`_&7=;z^OojP`ujCz8l5k-DVa0Sh`#ZG4vVy~k1AYiya1Zpt
zW{nOj0oV(c!4a?m-UY*OC5*yN&`_A4w-1`(Ji}qd2Diat_(0>siU;;Rfq3vuSO(8)
zLL4{;M&U|m=*;n|>0!kJ&u(^DvBPVi6XrK3FL);mz*Vpe9)K0lcrql;B{0nIZWx8%
zwI*&C=IIpjgZD!ltcAsJgz2#2h7Y!3eBf5-J%i&F^z(Z`+rvsJYz52V9k3D}f)O~d
z9pg#;anK5vK?i&Ry5Je@$ya;_@`cSik|(s7$rDb43AnM4IF|gp6<x>=1})?VUp<rj
z;NxA%2iCw+IItV}z!zX8JP0Gu(Vc$4bI&5)nXFT2g)^W7j_-L`3BkTr>ciKdu`9>-
zUetr$v#AHagKijyo^I^N=g=;^3cA>C2lPTuZ~6yK=N?vqa5(g_od=e{+2Uap48if|
z9agGf-ud(!+MtoR^PmM5*qC?N7CK=G^uzVA96oUY{e`<=6t=vO`Rz{L&;oZt2kg*?
zJmFO6h2Ovcyr3`h0GGiEIO8Jb0lNDU555EqXR+V(XT89&&<20ClMj6GV#Wh5hkp1R
zEQPPaa=7vm@`G)P7+?53Ou`nIG9Nuyf6xk-!!Z028hUac0Ui9_av*ub>!BAWU;uU>
zMBdO2E8x2@3crJ9wtvq-o^bhK)(xzHZnzctV4usF4|oF%!rNd7mcS~we+csd8xLbX
ztXywgPM&bV732j&R}l|>J%WD2T38BA*U)d+2Ufzswd4h#fyKR;myz@Xju}NB=WyPI
z#@?)VXu$7)W_SqNVDbOR6MA3}24D#8hf&yfG~1oc`5KzxtI!6|yN>qYRnQHmLLb}+
zOJL#k#DlY82o4-WJUAR0$m?}zhI^q6-r*u1Tm;?FFqSyb4=do?FbucCC>%eI^+&(H
zhj!Tg2G$Fl2R-l^=!b8PXC7hs1meKUCK3nkfKhn%jf~H^Tt`f0{NW1dfJbj74>;vE
z`UOw8o$-e?cMu0|zmqud<-3?i`05PeoX0%QAr4&Yqd)Mgd&ma{=CiKgN<ZTQU%8+8
zgO4mG4_Nvj+n=AGXAaOWcn-9~DbNYa9%f$Qb{K#!KSmt+9fn{8R>A!+0lg)}vk~uc
z;=z3@=od7sWWB?0p%>14igAWbN{I)LtRgRX`_t@C@Wp4?pWy7(>`xbP9q=sugZrQZ
z4t<_+g73Y^c*7glGT!3XF;4JX7>1o+qMz{hAbDNL^~$Tnf#cT`2ln1TUhvJ=7;kvl
z>*NJrf<d?&hG6G6=qH>E6R-pt`>>v&1zx?GcyK3l!Qv2k!I!p>7u@wJdBNJx$O~@%
zf;jNnujyZ3uGgUz?%Kxu!F#`D{@@AQi34x`jyNy?E8wyn<O3i0o;dJfXuOE|`GGj_
zq94fzp1PBKU=VuY)w}2)ya@*3#NWsVJ^`b!)9>sj{qpmkhh})?ZuS#sjgS{~KsPLb
zKDY;#z~Vi`gZIG@`~X%#1tws-z2w)Q@rD*S;1A-#E(ho*?DIG43qF*8L<z!<1xJ(+
z?AGXr5`m93KB5@x+~+qtqF7)6+TlaZk0>tKrS%cT2fs2OQA%O-v?EG6>~s1Nr4sf!
z^N13KJE7rXj*DH7C}tSxMjZHUF>&DDyNCnJXA%b*?>?ebz|AlWZF7z&NqEb{Y<~&$
zp$+z0c0_T)<jNz87tVb0h!TKb!ZJANDdIraI{E|0{BT4u4&XTOBmIG&{&Ylfz?$EW
zC~i1%{}IIx3#-{49yrK&zyU|t9)5n5eiU)Os%3jP_89$umLz$=DbNECLqD8&oH%e;
z<D*Ilu7XwYsS}PW33z{#ql)oTjz_JJDpqJT9aW0q6zGPZLm%AL=BQE%x3xQ}RKUO6
z69<mzKpeOg8V9o8%*27NPDd37Jma*ZiVL0vy)gguqe=k&UU*aqLRV+<f?K)}4}N?G
z@!+`@;tgWIJd=3voUX)!tDp<M-i^FqaS!r>QCJSI=yy~J!+&5DcIkgqF*rC66cGnj
z4Lqti;Xgy!9^N<Xs8Ry+N3lKh!%BG5|BfmVICS(;B?-4f(_pS6CLUGn@Ys!v5Bzk>
zQN<5C+<a6igR5_2duX1{_VCWTY5y{gJ9CdJ7HGVee!xld*dFH3ClA<iG26o%moOf%
z|3l;t?^?<@43Xyt<PR4=&h~K76Gs&f{0{oz*rymzSh<$|Ltl__gbSc?XntNbv_SU;
zwuhfVH(d1^?ZdvWGY+ur8^nQ+Z=@g4|2A=8^9r^f#(8QB+rxfeusuBKE82(lugM=a
z|AGAB<G+zVJaB;aFK7SwoBZL?B<l;_{4d+X#n1=M$7vr{!659OSF42JbVIEYfm55*
zDuye#K51U7SYYo~wTc72a&oQWhND{7Dn57|mcSQIsa1k-p@}%KOMBwLoiGWVU1}9`
zG1p&~TEzxOpINIELqBxGH@em;ei-jotCYbZ-D{N!_>Hwzse-$D5eI&8cCBK%lH=<+
zwTcziLI>Q{n>cXGxx|5IomZ=r!X>aAZaTkKiNc?3^yjMlyl@}t!z=pJ9$acCZ@2?i
z!Je1U9vllzS95$EKzs055qZP018Wrz+%>3H35a*lf4FZ*tx^ep8%BHZ{wvvjIOpZz
z^c$WCi(xD1h5_h<e_TVp@PtwH8@@D}Jm9kHYLx^WeSNKB9Krpoi#*^jV~GP#97i13
z3i@E#4a9-g@$?%$JE2wy!@^0#foq}h8uFS<9C-H4#DSA<r$6xJ8T1EEn@N9Q-W>V^
z+s~yxa4a-j%YFmRu;T*8AN~nl@bvr11I}Gc9&l=a{=g?5W<9{?VG_O!O-|O^(ptq1
zM?cE;&;z~j4j6zZJVqX{UkQ1@)sK@0d~yZ-7|HlQNk8DnPmu>~w2JY7F6e`A!xFgS
zY2v`XtBC{Of)UvAS@MCqpm`M6L(h>9oc28Vz<y=q15a2(KCl{=!J{v-Uf|E`hy$;A
zi8%1Fmx=Q~o*xB?1AD9|4jl0s`M|1j#syA!n{k2Xzr*~%-(VDe_%7o+n&S*K!)EWX
zZeTGihPPJGKiKqr);a97nR$lGekKmI?q;6hdC+(r>+Vmshw~29Do(fvdf+S7j0@aU
z!}jp&BWw>xA7guXCp2C!&r#T4;FC%E155rT4*cUdao~*#dBC!~V@erJ<R4Qi<oAMO
zN)<c?6Y!cw#}wlj@-ZA!EU-1S!yBO!dK({8yzq__jwu1ytO@bpiLe5WIPsVgfwN%}
zE{7%;=RatL{^rLN2P}my_$KtituO$?unaae5)b-e8192nczKIsieW7Apc(FhHfT7B
z{GbndU>WqoMXiVj%_kpILhvdWf#uLJj=WpbPdExX;I*e5<9p{g4?#cl!!o!8hTu{d
zfy<%c2CkE!1@3_k*xtnU@Ji^19#{q!!4P~EMqtY}jPrQTdu<sP*t8w_!*-`L9&jNn
zfjiGUrj)~3T^R?sqZ{)CyLD$=Cvcq%ZSb5PY!5&0$@XxjmF?l+UThCvgJJj?Ou%;M
zu>C}i)6fR*>dp4B!?|n^_rVf)(|K$U{e9RT-rAS#;qMnQ{*!o)U}t^61JDH>7a!yM
z;W&?7Lcd`chTv%f=r_C^8r<xU&;o0r0~QrAZm`*<j2n!?GI-%YwufI0V*cSy2YKH}
zyusuR?}biiy^Or!8$-w&o;ZxW;Q|<j|G)(N<#O_#Ouw%nZ@93Syy4)h$Q$ms`j}EG
zzYk~q!3##Pf51wZgg0En_EQ)aC)>lB&;=Jk9~?T8?O_O(!x^KF@qKPQpZg#EhcCk<
zJUE&-H*p<!J#nBPI^ieK15Y2rIKaDMDclarq1{D1xEw}cHB7>xV;Ps5`TH5P!js1_
zuJ8`%g4>}NUNVVza1AVnC%B0RFNF~}3nt-f&@?qa?=NVDXWd9V_&9XIf1wxdp3Hs=
zPoBbj!FD$>U+{8R1+Tk}c(B8C;@!e{Kr4I+I$)>Ui3j)H!T7<xcQSu)Dh$E}caa}F
zaVGN*AB6@F`}r)!53Zff_`ya#;=pOp3*Vbd960qJ;=m7J2wrqAdBNM}kr!M7O}BDi
z0IjgueDZ=`=z_mOFPyr7e!_Pa5)b|hL+}$n@!%tihzBPuVO>w-`VHD)DRjc^&;z?Z
z$h^XBuoOPJlsNFRM~MSlJw_ZjyM+GT#_x}_&fx-B3?GGV_yzRA6PMFZ*Z~INAQ*zT
z!YcSWOu$A@aJ-q$bBPu76ApZmcrd?|{=vShhy(jP!@7XiJj?db^E~;$*c$S=o#%cp
zkPm!#E&YPa*3mCG=M}bx-@qU|@DcL{cYVydf-^s5-tOQ${~2*$>~qEkM!#g7;q711
zA2?$x;{p$T&He{BY-9h0xBNsNu%e3X@8o*t7q*Avpc6j!EB%1;b}>)zq2I{^e!ZJK
zpg%$$@SeTo;pO`C59SH>{*yTHUFd`p_Y()UIzSwFa+GxqSNzSm!Z)jl0|&&2a~J)L
z69?8FWZl5yhv*NSb(lEtieromTnB^jyCnI*P73Q8@(xSIFoW}SL6YxN<9S)*B;TjT
z`2;%Q=S`A|7do3Jl>lsGOe#S*zC}{0gdJNZl?dDblW<Hc;>=_`+awhSTm)TkOk3i}
z?=S#Yw<8XW!4N#XeNw4{ufYVo=+vZQn#H(xO!7Ty^tTiFz!lI7-z!WiCGe&$Nxm<Q
z^XVB$B@BOuQ8>avzwYL`s%uiQz;VzH8+9WNjCCgt{Nyb1fopms`93zD+x1NHy=lxp
z3`2{RcrXYJv+>XjZN10~-U*B05$J})&Q2;m_ya6~;q!<G4L14*8}%X19QJ!?hCe|Y
z?A4bza3XZW4bTU#zlb<+4-CSO`Y~Sch5p2Y3QWM&cE-!cehsZ~`o)Yt+y!0mZ|H?d
z7=Z0Ap}+7vSOI$spucb`jKaU6VJ^>^i^vmpg*G?<7Q?@x2fBw65557*VDT{WgXdgM
zesJU!tPA);G5OuYdb^4^a4{@~Ctpo};XT9YFKlsblJ7@je}?7o<}u_2i(TXe$4yQu
z#(Ozm-$5McxRW^Wio3`Mo;r(sVCUJ47u+z1bqd!lV4UERg={~M`wl<r0=9mDae{jm
zlLu_|Alt((unhKx74X^s{eeHg1nm1T{h814@DcKWQy*hp!3!Q|oZ&|>0Pk2%95~|%
z;=mO!47b22%v-@YFW~+Gnqf7x!N*t9FW94$enB7f!#7|lG_7KM;K@(ZKX@&Sz@0D&
z4Q2FiA=e!*5(mDzjyTZvGI_yGLAHnE){_sMwt;@ZFf{rZx7S%m@Y-^=hvT3dKKC|x
zz*X;%2dswW@RWDS0~W&wTmzHv+4mTy`}lhRw8A)az_t~vOV|^7;b0hmlVBN~2`k`S
z7>3`$DD1U~@mj?B1DfG@XoGjbVt5~P!{yKiAA6rX;cKuQCSWCeWHa$#>_hr{Kl}Md
zj2CSDG5NtB&;<uTFT4&0;51kU?|~KYs}T9YS{Q|=e?oo_Fb>cR?}j$`0xX8xp&LH%
zDdPw$U@5GI<#1Ld@!*><3im<7;{3eAuZRbqf_AtEI^ktonOE53YvRF{+lU8$gynG4
zH}n^_`<8iux5Fe1LemnizqT_k@L}kHUqKf<?MKEBj)5g`E)2qsJK4YCc31_ks3IQx
z3z{C}`t%p#!5^Rl4*HdNFbKVHD=dK#7=)d65fA!c6<iII@LOmKuugs>9()TrV4L5G
z2d{@-_%IB>LA#k3I0;t35Ddd>B8($^02&_R{sWrfF=&H>_b@N;FmyxHUiuC1ge9;R
z24Sy1$P-S5Rq$_^fT#S)`gxfBavyoZ@Afk<uy>UFU>F9V_b>8;Z@>x|_?!G-5}F_3
zKI|Xzfo50?t<VikoT25FKl_@z{8_E?I~tobU7Fvdm3TA%eO6Je^pFafmwtWuJaeXg
zd9|{w3BR;#by>^ym!H&pX483j15WMV<9tgO2_Z4%l|OrUs=*T)@zvaU=~l%{xx{L{
zsan}2mk*b=Y~^U#d*s3be&!|ZJNR$?`_)P}5ssFv1hSor|K7(}X12SuW&6~ojTRN8
z%6*hi-CV7Fty3;>OZl(EN7YIvsE%9CuczTT4eI6-M&JE$wQ?V1yCQ+a<Kq!|d-2zZ
zaI`EGh&K?YG*qp06ru8F{AwL<!<XS(O8v}B;uPbb#80S`P`n!-!C#^AoObitf0FA<
z@Wps-{2+cHeu5@W2p_<oFJ6^@6@D##VcPc=NInU?X-jT>BXimte~MJhyrjMbZ^h3Q
z#|#R@+wseE>O1id>(uw)-)7$25<r!wA74d%?f94Ccj@?Ye3&@x({WPkP4cP4e@T7y
zyvsU_;QM}Btu$%MFRWkI;gFW|nvPt^LX>htBR+5Xb+z&=KWEAvEyvH6;`I8bd^P2K
zj4HF<=H(B{>;TfPgYwDSs+EmW?r1q&Al`*Hd{fQ)wRx%5p%*_IA58n{0;wOsNAYb$
zWM1OS@XK~oD{bo}6kmb=hWb;)tHv{oFZ{MzNezsY@sj#ce0%%|5t;g_{u_AzJ3dIc
z^nXap)%lH@<)?Zm+gT|8`8&o>w#&T4+wqn7UgA{kJMl;G3)8;0K<az&ljz4StUq;q
zKYru))yizCsESjHZ~sHJGAZq|ampnQzMrOkCH_9VQGDhl?MConymtRf;wRt-NnKUD
zrpC+#Uc0`m`0w$HHT50%p+8nDLp9!opM{tCBYrl2FW&HTZvFv$SG;z=FT<Ph6C{4-
zCH<<vPsVHa`!Ie1Ub`Ph@%P}h`?28!K2L?8DX~@KV8##prCK>rGha5m?bpmYV!g;h
zk$j5rx8nPz<D{0KcsKqb{4Hr;C=l<%@4_Ep9%y%XoiD*}j^vI{5dS-Vnp9Nf8N&D7
zlbJ6m<0bK{GG03l3H<rgSFdN;4~&Q|_z&q%dOuj3e|cs<mvSrRAOBIU+?*|6T~Mql
zFQ(kMzgiidEniwtcbt&zJ(Sy{)yg3m&(walB7d-I`vB#w|JE;;{sbxi^Pg&EAV1f=
z#D`?N>dgAf6r}o(ABcC>RfdvB0)G#FRwmEXd3j#`OgZ4mb|#LKJ7U#}94_l#;;o1+
z_$4A$>)C<t8?ROv*6d5_yYOA{J=5#wzx9v5D8X?{;{*5y4pu8X?x+{P3?Dg^>nrd@
zN2-<9*;do@9>(|6@lm`@#~YgQxi}qf#&_58HhdQyUyL{FcsIVSj`!hP>G%@-i8?-r
zH|Y2f{`leCaj3!{!JnoXpF{)ojVJ2Yx8U{S+Z(9wY@oiUf%^Ui>X$Z9zr2C^m6`fX
zbM__cFoOS6XMB?Q-*v{v)Lg&56|Yy{(LjAy1NFTP)DL9pYx6I|f2)&!1-=rmtsll$
z=+uwmH|o?kaKd~+r@k4#TBp7Zzf`AwF@6bNyWZRl)b}+|zodcs!3OGw8mM2@K>b7m
z^^Gm`^S9vj`fG2XzO#Y)o(Ags8>nB}K>hMeeeF0`;+N};e*|Bu<CFO3bi9cRkhMDA
zihotdJMiT?-i3b`pSr%v?2)oRdhvU7>Id)#bbJ}UM#op+594!={|(fSHc;Pil74(M
zUN62aQ(wE^72|&+pUi#Cf7d_w2%hHUyq5Jo{7#+xOYmVGAH;9PYv(<bsju}_4a84m
z>TB~il37TnT?_twytcj_FY7@&{!YBCA8maPeuYkbKYp1`{Zjk_o%-c?pHBTsyho>g
z1V34)eiA=Qr@rZAJ~ysY--<8Nsqet|)2Z*m_t2^D#andh2k<7H`epc*I`u2?$GI-j
zj(-?`1g{<cDE?2K`UV30u2bKP|5m5I4PU8KzZhSkQ{Ro>s8ipEe?g~y34XOs{UCm+
zPW=#miBA10{A`{23A|UQzL6URw@!Tvew<EyJN_!2`cC{%ymo)|G*I8)K>gAN>X$cA
zzp{b)kp}7~8>nyMAg!0b6|dJ{M+5a;4b=BGP(P5V&*f?Mg~}`Ae*+lLOR_e7onL{!
zQD<Jl_>p*5`aWX1Y-ZuVD1IgT(H|lPrk(>`+Op8ma{8EshDD76ayOK^KQi$EW;EB?
ze2qcoc~9@LncK9~eWi`^^N&_597eM*Lgy9Zd*Hdf%D%+A@f~#P`|z!F>X+aZ+V@Hn
z)qPeFKZg1*O22r5B?(LX5PpAcwX&O^@k^yxd=>t@WcGYih)Vece$}zu=Ws?IFrB7T
z--7>!`r79qc6>AH_m{w`^O_TH#j~4bUy_dp-xaStF8T3o@!Ih$#kas~$Fm%tBp+@3
zO8g<bHhu)Z7tiHy_9giw@jv3V?V8&0{Vh82t@tnSgC$C4UgUn-fj^9YTzvZZB2P0W
zXP+OsDfiHi3p4lIJPN#7y`KD(FF2mLPglh)#lMgLOD2@K1TDBOv!Uc)LHUDuHA;=N
ztJ*G%cjxo(^kmx`UNB9yU4rsijcSy0HQO1P;79R$vhDSrq|Vby`KZP<%Kuc`NgfXT
z<M^kfJx5FaTAJRET=@1)Yn1Ec`By6c=><zO0cG5Ll#gg$qg=($>GJ>Dlk!r^@1=Zb
zwjV{4>++HE3d&z>QKQ`S-}VKUs^V8s{txA=8)!dC`E4iHC^!GNeYU?6-`s)c)s%Ps
zul?-2Nx7Z!cTTBM{>qj!>GCr#DR)u6sBMk%jEGeKi{{jo%eeU{Z``gX{hUs<|CHeK
z@MC2=)pM>OelWgJ<3so>@m(~&3jaSmySv2UYA3V*<DK}^)4s6I8&Bo<g0GN1@C3Zh
zTkuMU8fA?L)jG4|1E<y~Cui5o@Ve!hI?lK#pWCq}=lQJ{{~7+Bbi6`=j7I=}v$;lT
zC-E}vh%dw6)Tt)t`EUjP3%s^|82|ZcHT9lT$$Uid{ZFq^MrZTweXDvtj9j?iSy+EN
zY2Sh`>ReNIU0;Yw<!i?~@K=b)yrjMpKMS9_-dA}Kej5IKajJRs<CowUrhRXL#3{ue
z!cP#9d5JH_7j<D>i&KqLCH^x!r}gYh>PPS)y!N?o65r#D8fAXAcDh{?gLRN`8YEto
zrxov`KAY9^4t!I_jonFncAdHKQ>bs()c4{a#P<=Oc}boD{7d+=wDXUD&r+l8m%6I;
zSAl=%OvWuUpF>*iD!4l{p%Sl(^6IWN$|luz;uHACyVWRT(!Nk2-q?xnMa8GCGgSSy
z;E&@UkcujA$4~2?U6<K;bK<w*AJo+M;0K+RI}d*RTKvPB`la~OdekWM(mor%9KQ&!
z&A$@=IlgUr{Ic^9!GGGbM#<CoB!0a$b3BnYcri42CN5mx!WYPMd5&8{T5is-J8((4
zjq;VfSs(JiH+5X=oqf(N<LIQk;=&r`Onz3c2M_*p`~_)WD3JPo{9YYjif_~>w|+Uk
z5U-72iSMQ3BlvzgK8YWq<4qhGojTr%pP=I%_-Q)cg`b1h_ScJFq2mMiH}MzBz^K+)
z8GgG?{R(`wjt}Eo^v#VE#rMQ(^Dz{1y|3fV_#1WN*zgN=>KEfz>v%VQ6Q1Vltp^`I
zq*K2H|C^2v;*ab25WeF@x&5lb_to(U{74;d?9BI<>UazO5&WHbyi|Xuvg7yT30JRQ
zPJB$qd+@b7-j6TnSCezyTAGRDOUM6j|HqG_{ya^)mH7AZsq>qZ@sj;3f<NBBMj0+b
zb-qaAFSO@+6BiQG@G(_=xqq_ahhALsf8IZ(_J8U%xuizvCl}&!PzK^X__HpnsdpVN
z#}hx^jGvgfPGb{8-G!WNS4R1`VY%Z|fxil`y*~)!FUC)0TlIWJ@$&D$)9vg_;v3Fj
zf7J12{IfdVhJOjKZMPV|5?`2&p6<6h6DPI)GiB1Q55JcBT3>=+k8dM&Rp-+nK8Vj8
z_X?$0;)L+;==du97Q9s|s*WcK{7(GqX`fwJMkd*NIqNFFetiqR>Wb|BLiW63#~;L>
zC-pNg$;XL5>B<^qP65Bj$peV@;P1G)M&a@^`%29}{!aYGQa^n@nXbMrE2Dhrh?<<g
zFIM31(eYut2Y+&7;$`kfr2Q!V#!)p&YiUQd9~&6Z8%EckPsz)SzY2e_5x=DJnwMV?
zOJ^qW?3AD3%3YUE{3$x#gKwnc{rLEpn)Lf9h$}CNUy9!`Hurj~9KTb?SK@!s@e%y*
zc<ps+65n=Qt~Yh%dysX!6@L$2d;RLbKdIwg_>DT=i~knCP&%qQ9tH51+>m?ST!y#d
zCrJIwOU9=He-B<8Cyd{Z*Ioxl@q2aR8@jQ+b>f@xUB~C<W5b*A+I))flksyUM^(Sv
z_)5GsA0PfRo%$vCvnS-%58`{^wedsvUDwqp8)ZjR?dMhaS=8^C&Zkfy<CehtbiA=U
z-$$$CE%*yrpW5qtJN_2x@0P%-<CIhCPt4wrW{(#hd=Y+0x_<V!<Hx^_Zz?|XO09qV
zb2`2pzYPDDroWZ=bKSXdBKXeuCUwD~#82W|;kD0^OlR@;cf9twkQJY=6W@WanUovf
zh2MqO#`ofP;<fPu_;2t{HF=idKh%j|f#0B0Ka5|kQ$LD-1m92MtJaC32j6>-zewZF
z_;2yr{B8J3yf)8be1%SZH+~~t+g~646+E})*_X^q34T3Zd!7j5rN75yB2)Jz^9mX*
zNWV`_j@OlxKX^-xvPGh$&m%7Nc_d2txt`qq7<zJDj6XxR%e*8HGyX!nydRVCDv~1c
zHvH?i)+iiK>WyPDelwoKYCZ49e}&Ka`yc*eyuAOA^W-*ZCe?rZ`sumj8^k|@*RJCb
z{$c!7X*ctdI92#v_;WS;NdkZL_T2bJE)@3R)yE4NR|`IhpCWmt#(kHe?gTCEI4D2=
zuKMw0I~V>8yq%vj^D#v|A3n+lP_AvS1V0d;T94^@yg|KPIpt$0*N#Ia{&IXLX-{=L
zir}xte=2@R%MEqooWvi;_twm>sTb$Pnf2pKf2{b%_#&yF8ix(}V={@!I22QU<}B7x
zI^J+p>VDdd?|pZTGA(<3GrXW~Vaj%X%I}#|qii+si|Tr*6mOfCdmUJgKNqiEXO;L%
zbbJJV1^!n_NOfLH;#<$JQQk=VRKAjr>1_5({Q9&n5~TW%cP!w!WVRpE3+`9<pYr+s
z`s+aAx$(E-Gso-f`M`&7wTS0W>FcrS(vH+G!QcHr?r|ZApQGbL__;d13V$!2Zf0K+
zKY=g74-%_74jRwl`@iwp^PDB)8)u`W^R(lG)aP+}_9f%w#J`Lmo>?bcYTl$?zh26J
zTAY18)LS-|yaM>EmgGM7EyF*CcS=Q7z7_bd@%N>DHcl9Cf3PO~K0#IeD1I_NwLi)>
zyd+-(TQ0%ho!!5eHY!-0&RFuYP`>-&8s%l#Ko!r9pYcfUeZ3Pu7q2}(c<{GsytMDf
zkHtTfX`k`BQ9WK|lz*|TM)^k5eg%HvW9(OH&u{5*4D-{Ecs@=e`KG+I6XmC2kJl*W
z|IN#2bvs7>AoBC_?EQQpo22H&g5QJB99Od5j^B@$aCI*kFDE{XUnNp?-tgeBe<JsJ
zs~`U{{-t#NY(GlzBUjWYFQk2;K;oC<cjI@8Q0>o^_%$nY&+ifZr})fuW1(y&<B`N$
zpR7?PXXkx${?yEXNIT~9xL;dUqc~)P%)HBXHvH50k=b$NFQ~E)^Gfxf^6gL8q~9;E
zy3g|9pM8e$O3zDCU41`($!h)%lRgflytGq_|LM8R{blMrP+0eN+*CUil>ha7jWS;1
zsgCPm`~_<=&xKXv6UDE7A@lbl)jBqCLsN}kED5RlX~s`@k#!_He(HF?x<Gy2vs3<g
zutph|-Y&b&ocNPosp0$A)7z!~!mJt}FXds%SF5&@aSPyGuV&YCp%jZR!@rInBSMvT
z1^yuZy0p)>AI4v}zD8LmJ~eLj=O;n=2b9lCZ&xUgc8oUu9gYpT?O5<r@mEMi)&6A1
zufjLfj*IfHujL*Gy!f{G!gRb=0u%oQ@TcMDiBR>k48I7U(|`Qucx_%`d=lSKUJ1(Y
zdp$QV;|2WtnfOuZ_Op3e@NeKV$C*MYHu0Yw-|UUtyqx%A{7k8+8ZQt2Wqd<<1t_<b
zXV1r}`IL6b@L%JX$$rYiF*&Y^ufPv`o9CYC{pr8?$4`EzM(HkVE;au}KK1^YpnTeU
znddF4{nN;U=f^f>k8`R1%YJCVufX5V&*^ye|8C}>d>`eh>-fxdmu%<4AHaLE$B81h
zIu9S^eLkpBo{+ez`7Xh4#Je;;h_A(~=Rw*D;fHVLz98G*-lNp*L@4k1aSi`YLaLqY
zxF+%I@t11aG4Y3~AMkgkeQF$Jysh~2LtMwF$GcF9rF{qftWRo`pR&hM&YzE_GmvsO
z<&n>7l*=;t$s^H%%$Y~Z{gj{hWexw10KcS;Gu!eDo=tC`nt#ftZL3j!k?rNfIUqIv
zc-!{+;~_qbUxI&)pX=72_$dC2aE<ba#vA(b{06Tc2g%Ef{}}I+`l)qP|M+XC{PgcK
z*VU@yrW3yv-#>dkFRC{mUds3VP=CLb`~rCMk6edHd#dAh8GbHaa;kf!`j4NFPhHom
z)=wDUduNUEw2YVP@7PiN#;W@5N=ySc8vF3GRr6DK0V3^KC?E7|Zu@rp5WKd1C;kw=
zdAj}Vdh<v-ztwMF;`{OD-*fw2il2+u_PZQEAFtjIBu*v%d;G_mb|d%&dx(=>w?$M<
zt)C=*(cWyFY@Vim+&ki*m5Qoywc>C5BU`^vilto#{yqFtB2>pa7ygnzYm_gg-ORf7
zWOhv1&PVyaef8I!_!4~U{ki9XAbvLfW?5IN^%25<`B&z8Tji_pjsD5zo9$l$e;s}a
zVbuLI_9xDN^$Vp~^0DAMS7)z(Q*mTY?D%qg>N-=We=f?+vE2T7@q_W&`3vBm!apbt
ztH!Ym-!fjKtjvrfmz4G1XAz?O{zUF|Ulo2GenUE5p+NeRz+ZYW`*)wLH`=-H!l$n5
zRO4vDZ#<M6-;VzQ-$DXsUJ~Dl|4QS{cn|&~eAoYu3)g3sLn^NT<)0m`QI1M1)w(Og
zudA(5ma4qOtH5_Y#&I*dzBUxpU5H8^Rg~YC%*`)>pRMDK7xR7~d<TiAYTtsN{%?))
zecET&ksW`I!u7MtOI}X=+`O2wouAXk&HC40Udnst$Lj6ZvRwdg!?(`#C;fTp!KwF=
zNq>TrcP)t3z2B}7l^VAYei(kB2vy!y_&f31`AOh!(!`PWjhFEJ4F8A3Nv-G2`7<&T
zB;{7huW1xhE<drZeAfvDfpi7Qub6UQi&(wuG4XEvdOW*bz5IOmZ}496nU~Zr!JpkS
zrmPmHT8BaWM*OO@FA_-o5Z-=LEa!bJRrodd8B$RdCxLI&DwgwkP2&L0?|Aj~q{O%2
zC*!sG+wl+JzfQ+56i9t1e!$5wWrS*7i1*-UwT>w}(#Pi_RO<S{kH4@@!|SDt@_m#a
zk?qvyfBfg|V>!o>F#hxox&4dcuf|`i$;&_{OHR%0pBW#-e?qhBb!Ed}*D;oU&Z=5(
z#rP)XnDUv_&%C7H?jqh#g4Z7JeE1ffVs(F)E~IK|{7UeH@xw%@;s^0F@Y;C@;aA|b
z`)w6|<!Ld6ua~Gl|9E3zEd3l$b(}R`%Kq26;d!u9{s-l<FVwxHe-8Ws{F5S8`MU78
zcFEoUy!eTD*|zQ_KL_yRbn2JkuhsDt_@Q|1@jZ;+g&!`#Rry5m?azoQ6Y^6&dmJ-x
z;Fw^^9al4cAzpj@u;FKEyo^aP{#N{F1^kk_UhG}(JmsOhO}ALi@!gL<gnv?%m&7Z@
z&pIone4mNOqtSZLO)Drr$C{g87;n+>QG5q{%XB-1G?9M(HHiE5UNNP8rXBf{aovMz
znHLM?P0ooar)u)E<D2zvc)hqNub^DJUcC6tc<uZI@JI04@h-#vh1af^3j98u`eFPp
zIzEcuj!)fxs@8>p2R!a`bMrCdOYz$G<Js`9oR_;^it%6LwfVd8Asz3-zk~0k8dvFK
z34ZJOvAX;4LR4y=f_S4Xrtr0Db?2vox*JN_u9ET_F34>^f_LipBz_n^)4xJOq}nkJ
z<~iMkF=bODMCQ6q{anmO`QeLVibIumYW?HS=pR#kZlL~o-$VIv%125=nV014$M?50
z4&qevQi>mr*N$g7elT9U9xCyd>eP?mFVyi#d{2Dl{l3}bf$1{l@sgPGr6wOMe!+m;
zb>hIki`T9b7yiql+;!r`|Ap7~D}etUe}=T1dC9nzW$HUK^UfjLS$Ewi<sr&D4~!|V
z>6FVDMJRuLQ0{t4;;Zouttayk?)wJU-%jG$@bmH7{EP83bi5mX3tszoI3M1BSxn*U
z>tx=u<6nZ049Q(zL42!W4IghRDgT&q3*qWsss7`?#%uFU;zJrQ<7pZy?<dM!XXzZr
zZIoYld2YO7d`}(k#uwsyN>Zxz?ZcmszdP;!>p#8(KUY&fh(C%~H1$LHU01}?pCib`
zmwr^?+ZH!GUP;P7r(AtLknu8c;qk$hxz`O={CQW$ltR^fNjnaFzu^tH<EH#C%DLUH
z-+z3|5wW`O%P5p$X}<)2HeNelLHrqbsZ;lopF{Z5b?R5)O*%e-Z-(C>K~(c$yqxFr
z_~9CF!T*TY-WS^OZLf``-^Z<r<HTQp*XHlR_t5cv{OS0A)9q&0K`Gwg%)MSH$M3<r
zRe8!hRN~Ja8B>;JjstSNaBb#5A>$OK{P|J2c^SCiU!mj8_=oW7btvuF@G<-gnd=4l
zD3<!~0#3?jT^GywT#g4n;`)ZyNq}<0nC$*gNK>ivQ5pV5ynH`U=DI5T{acbxi1Kg7
z#guN1>&mCkR39HBl>aa(rVKIEl@G5Qmel9s48?rDV+!k`b-FzD{Yblv1<O-+o;Y4I
zepc$;KRZ_M@6M_9k1xTej$^6gMg8-hoAT%!&JPku^?cZe{}*q}<jt*3vw|zrnaeS(
zl=6M^V#?#0ey8$U-KAiZCa)0nM)_mPM2VkyNxoJ1)p+&%iBI4g-xpKts{L5J@k*ZK
zF5>=3VyM=$1@FeUPy1E^>9;-O8@kVTQQrRkSkC*?y!eIquIcs*>*59Qk3JAnPS0L<
zEG@WQwSI$?FMTjp_kBF6{UkO2_yvKOQZ0dW#y>*&H4o)phbHl(@XyM2s^g~VD*hd4
zd|75c(w=W^luvpjrd*jR=TC11bswCPadc9?bZJa^Q59Fb2Y>pbx#v?qek{I))X%)6
zekuMM9bb+gg6Gc|+4Us#EAejpk+jbqM<RH~vY2v0dc2FISn4P7=RFov2C2M^r|D|)
zDd9Ox_I_aa9d-MYY-gkV>g6$I5kE6-*?B0&Z^D0^9k=lX->T-%L;3g>G5+1=|6UT$
zkFUi4BHGciyFh#?e%VUKMdD>%l3zLg{wFzJX4{!w@Vu&>Fy-#jSl#<t3T0E-E{gZ9
ziYbj7SYO8B+y}1ac%B}QY`-k{dCxYyz8sVfe=hgD<iZ!@)$=NOc=4Cwn`ZKtKi$@S
zuul42Lit(G$LjumT!>1IM-YD)uZ}16L-?qUufqSP@zQ<*zXShxcKn7H)O`?4;+aP9
zewj77>&S}l`2yz`>M&150;%u7ufeOIKS(<+{0lF}l-g`N_3tZvl+Rli<KN+yApfnS
z5`6hf4WB2<DWCFk{ry?mtHj@eKQFUx)z1&5JWBc8S7ORZ*>zoXje1=huVEiuAFKEM
zh_amp{{sH2%=v@2suhe^tv3hd*OteWv(x=3WRujmxbQc>nLA%z{5TySkU01OsyNbq
z8GiQ0|IUB%R=K+SF)0sGzW1Gm@4F(DfB0_heOD5H9KTx<R$YIaI01bAUQC&;nirX8
zE57rl-2OQ5ZSiMFoXkt|a%JjomN=U0Xeswm{^9#EWz2u&+4~x4uaxrS2lbDavRyg8
z-)5e}s^&v|9~`FK9f~O{sY|~K1+rZfzX#vYaogzR?=D+%kJ}dfvv}=(XU8ws@lO1M
zc<p_q2Y=4zx%WYS{Ln9A%A1<;F2(QplKV%MPxT+)<g14Fk1*x$QcicX{WnSf@dxp%
zHQvAt`P{8B<yDoJcFg!wzRui-rRJ|_sCs{~Q{HD=c7A%x=F*N6e;58!5vuD558m=k
z?)|VIf0@Qh`=$7s@c+xK4>`}O|GrT{`7__<&Py0yqT{3Z#rWouSLP-88b+}e@!RVp
z6mQ1&*-m_EKl75jY<O#!=d;=4$n=6T)$zbd`N$oa=kcoj%7cF&zg}XgykF{nA5(7E
z%yTLJ)gNNYifsQ^=huDVp5#|SdDorXKc%-Tl(6E%_{)BZDYI4a#7FUKtN8ng%1eI?
z|KmBu&ke693+4CxQvY}>@$C2o_$mCXo@Xci8@zgdk#;=zE%;WM{%{JZx1Iu&Z~T?(
z2Ti;({DfWg?{8E6$3KBrx0C8WKA_{H`1$zO5<l~j`i9ZGuM(d#|M&}k)0uyK&)@%#
z`KR0&sXzaz{^K{{?b&rRzM$@lH6)J!<v;Gty<RWFU-C!p^?C(<;-9(uc^JP6-(LEt
zy5ERqe5#*1*U84~xQ^KuQ`%_OlLdd}{@n9{9lz#4O!+6>PHO*`eme2KXv6EtOZho}
z<*ugy{(O8`6;H;c4F3;aey)4T&lUIs`0MK=6d%U-`n&#lTznKi1;0V+tBy+s0x0+!
zG~SHA?4R7{dN%z3s&kKH#rV7N+V$whPt)-}{3IP;f*-BpgZL|Td<Z{K$5-L|;QMI$
zmB5d}7pUf0=FK>U&!^OIKa{;b-j%PuueVbEVS?)?&GEy5fBRs=*B@@mA3Kyg-#+{k
z_#e~xWzQca_|b=R$1#Y%Qpbnz19f~Aei^=_w*UC$cpeL6U$Q=oF5YL0zfY{{_-w)d
zL!N`uzEB|b?fAkYx$&KN3;ukms9I+pd=dT>@tK#z@#F3I%zb)x97^%;(yn?xmip!R
z#nfLWF;wv@@r{ng6rW~(BKRq_TxYB1wIK6N9cDrp#xg(u>hG^oZlV0L<1yuTX)k>p
zFj0LS;Gn#zlDS`zI=m!L7k&r+2@$G1z4(!N@w)yNO0m=r;NQjHs>#0$e^NnQ*&?3y
z<s$-h$4$vEMERSI;>zdztb6}Y`8Y#dc~r_XdB}E2{P+0Rv*WUvFM*YVbNYJGJdW%4
zrt$3e$Y|TOQ$F{^hTC;f-nDsLxkCb~`;VW8-;(y(<7NPVwlSW54w&v|-P`0+*RMg!
zo43#}m+`Bl{7=g7*0dMF4{I4$#;L|t>L>A!oD^54ikF9lK)i_q;cu;S^S0vqpPZYw
z1HTXdFWYA3C!4p#b5p*hb#7ihe793_^D4pLYRb(ki2tBXZeAgLhqk$SRpCFyH<VYB
z^0Ichd6~xZe5`$LURL}S9dh$>;8&fRo0kiJ7_XgYFMdtOhVv?+e1SPPuONOmUOSH=
z{8^{v=2eBCb9!94B#)Qs{ox7xv-pYPRmVBw1kR`Uo728fAoFLz+Y944@AJ3g&%|FV
z6;+=%a^lD1wbxl5{Pp;zQa|&O_<sE5_!H_R6km$(i?@nb?LX!CV*IhR&mJ!;@#l1o
z*S*iLP>Ll^1b=>)xRNIeT-DzszN00s)JnySm*awof%zBT&~=iH@(pLwj%=5CNjt^(
za(vGDAHNPSb?RR7vk$)p&u&<+e<k<>_#%xD;!o)s&$)gH;a|oN*VM1V@5XEYE}6h5
zy2W$eM`E1BeSG)a{4MzAI^K@Y)A3IHLE>x2!Gqtg<Nf$w@fU0IFU1>(zeD58@gLzw
z=To4X&q{njk9hj|yllfOHUIdN@bgslQ^$Y&%$^O;v)RqxYpn5{_wCs5^K^VMeg}Sr
zG^{$$xbe1Lv@c%gy4z2A3FTi%xvD><_{+|YD+AKLP$2y&$KQ%yB0^Qa68|ecCOa5!
zvX<^jKO^{e`oxv3{G4vT_g(7qx8X*v5Blcz(~RGQPd%UE{7}f|(!LF!*Ds#)KCxo_
z`S^Ym*Y#iOyYVCOozuRRK)eq>4nHXE3kBj!@Qd-<>z-i7&ytF&<3R|&kNVp4UKRfG
z{<+7A1iqI&H&5eao@?VLXyRM&EATI+efD@`$M?86UiUuvLMfK~o%s9kJZ{M5Df8gL
ze}qq6hosg);Ry9S1SmiMlH9z?@FVeaRq>>q3jDkHooS!VD~$IIi06F%B8vYBpC=1L
zXB`^3k$<l!p7S{%3*LHZT$$cDy&Zq2s`vLk2j#xY;yItgap5=N8#<2qD4#wgciolX
zx8S)<&yJt;H;8XGG+y^Pz*K)_TtoQ5_;pfWr(Y4uw^BY$%2n$oiMI^PZO3#I`vcyY
zuAgnkihmy8P&>txTQART$Bkcr*Y?MU{{*jXrv#sWMZ@isQ@(_9ZGS59yYTH~epUU9
z;D0U7uG4IPlK6gCHatIOE(HFf{1eSM*ziwY6<10MC}6zh(y{LQ6=go0l(!r~e^00@
zpJ%)+v(RN8y_668UtIYhoo6<m0KR&3JpKG36?a49x(`mI=AZIC*X3R(gz(#Sd=>sf
zeCB>Ab@-S368JO6#Fcxq`PctDqiHJFBx5tzN7R>>v~R_4#ov}P>Hmp$;LjWvPk(+S
zQzqVpzY2e4#tFoG@eA>Dr2m=kF_pXm_`Ns8m7lWXwz_k{W9fmD?Shm)J2{?y-!8w)
zOMD3b4gRW>N&ioL6~4)oxN?rlr}~dS4S!L#|J#gp_fxW+=@y<F+#FY~mvYV{&46rY
z#ov7k*JGLE2bYxD?JSfRQ+}T(u8fs()%VNJ%fBuA1+x<0OTBk*jVmV^_=ST>XCOX+
zf9-az8)bXd`Ypr1d`CR}99VU}tHAHSGhXj~>5^v{zwWMvk8=si7te?*+o-E<$LL`>
z&x|WWG~R-rj=w6MS8BaVzIOZzv*PvMw<+F<?>;-8^Y=Rs{t*6BReZ_Uk3W4*TuGg<
z)9b#V?gP^juZ;3veYw|D75K1@592?_tM^-p6UEP%n|s_a+{(QpeyA!hsc*(7@#E7z
z+ix4*aZm1fsu({R|CuI^8{hU`u46Rg=fht-FP{Efooc>I@XPTpsp`u(1@YY%=+CRH
zze>uRE{y+wzn?2Xy-%s9J$@Pyo%|eMRPD+*Sn$p7%j{p7JS87H{!)BH=QkJS3Cb^`
zF6*q7K;n7vZ5HKT#|QAQ;9r!As_`hp+wbRoQIl5%zVqVTc?jbN;af<Y%qunj_`W*c
zzyYn7jyL1G=y)5xosKWY8+E)JpO2S+=Zt=3*O3o@>w~%TP=fy$zeaLbjdu_~JP=oI
zka0+z=j*?}x{~ro9;!bcGEWiwYxvZ2nACQKb(dYK`7li9x!J?Hd6@Cn;kBP*u;G_I
z63_WucrpHc{5r`y)lU8Q0eL7NvNX3HKYkTHDch;WrxZW`(cE=cj(-c^(7Fp#K6P1c
zJ5l^*d<SVK^OAL8xSjJP-XTsk-e&w?_|$z?`nZ%oPIVr)Q+{SiTzMqDE>q`MiRZ+Z
zJ|0&#r{nb&i1*+f%V}S;j{W$-PsEibX<t}ZzZ7p<5m&y|)Gx>Xy)v$JQF)o?O8k*0
z<LUP&>WqI>%Ad;akJ)w%EQ}7N*?G=-Gya-Yx%-g~KLr1kB&ym^i}6XF`fhxUj`!jB
z;`y^&y*MR!%hPdXt;PrO<@na(GcW0P2>&X6v5ZHm-^1(Pj+7er2<7coGrsBlZ@g?O
z+a>WQJQq)YUNW`a_=37O`pA5l@8mpMR{uGNY-hv2f`5XaGy7rPWm+n(lXA<NhReN_
zKh;3Fv|B=X>lflV?-vf@d%hS~1~#IS>T}y6{K%JbpW{^F`@GEcO7=Qub-wy@tx3uU
zy;8q_(!R;d{Nk_WXZ8GA@eA<U<EjHcQ^&jT9v$z+PtfrJ{3tw+CA00yc$eW<;ZKo%
zr{<}5=3Rp6c??m$bOY;Gwo8@Q|D1A!@((FjuNxCpllb@Wy<|JpIyT+K_xI{}D}E1t
zqG~^t{2cgmUg!QVo8RzZbq82!$4&W7Z)Wz(%<)aO^Wmp&jAy?Wo=d@c^HWOsqPKI$
zyBt49$5%=`9UsBpsN<9P>vg<|2RK*jcq`ta@u~jfFT%^ecPQg8_e1LIH#g;XZOR^B
zvd2Ro{?+&6%43@2SPA~D%?;0IIpx<=-kj#@UNX*=_$%?+`HbKv;wP)-Ej9o64Ijpp
z<C^`+G?VMEPvXko5?nQ3R=j76`o5t$J6|#m#gyOo8P5r1yYxD|O1%y|lz&ILHa|ap
zKfZ@-r&@=l_#|Gtzm?-_@Tuznc~c0RrTUNW`$g{kLj-@`m)ZNk?D!|~%PZqKpKCJl
zfN8~7jBoaMTK_z5qkQ4k+~Y<u{(k&Zntr(PCw`sV4<BBkzP5iQ_=JuR;`izJ5dIhZ
zFipEv_>*Y&8I4cim*dsP1DQV~573t4yJ!3T-+4sJt(33W7FX`lDVOmtru?sOvd`Ja
zqf+MsH~zcrapj%NahR_pD44Cfj_^}HZAb2Smg4WgYp(;#@e2Oq>~X#R_x6M-f9}V)
zVo9&})O<_+QT(er<I3P{{`Ke8IGg7PKjp4Z3;s{McAo6`pLM(w|E-Sq;6KIxE(4>w
z&hq0Qt%|4L*PPmK=H*XNjZYcnbAHYphYEbtU*gKi4U9t-<wt*wr@x<8wI3(&r~KCN
z^Jvo?J~vIdw!c>VO*-CzAFJbC_-k~$7e55QR5K0%{0I2dzqhJ04nfM-{m$`9vt0=P
z$Zq!6%=w4oZ}$C>vMwW(&)%C^*Q#+y;+Oo<@Hm)#9G58XrD{*&+3*TpJ3htugpPOP
z_vv^a{ujJ<97^z`{%m+0$|*0}m-{@p62Atoy^oLJzr(Aq@1-9}eE$CW_e<hUJZL@x
z&+TG%or<^O@5XEYUgf}lfLCAFo2l=@Z$8lQ`1&X>jMmRrwkyF8$EV&GoI0OwsP{RR
za>{*wasMp)vHJLrH~quBq|axCl%}tL@y%knK8Zh`;Q3hkIFYI^?VIl5{`^o}d0L)N
zrP|+I?|HY4^2ci9N+;RxRO_i2zapvsd_v-SD4+E&*9rWbIX~9@^SP-!1C*CjK3~dJ
z=fN_3r{nRu_wyA>vBayu->bxx=Q78$^!uH!%>KJORg~xFCzN5?{bE~w-50*e_DRZn
z7!t~w%<+S+3|617&G+)X1t%nw{B%Ey*d*1i4Zor(+hy8SZzpk`ly^EYp={SFmv!W&
zd|UHGz2{)!1NftO9?RG7KYpk&q3qH43VfRuiF(IVi4(^Eir4O+QG6KRUlm94HO%Ah
z^!U{GvZanYh1t&+NjwYXKeS9J2l%;ezQx<|FQ1gC`#X9oDHiX<AH;7Lk$H*t%;S2i
z6?w_HWM0y~e;)ho$;?xB9_qiJw2bntrzGm$@6$Vvmxcc-@Iy@rWxlLa)$>-~CF-hs
z;41A#sP}C9MEdhAne{3@iSKo4B4<B0&FA_CuRe}Qo>u%D_=_^@N&7u4#s81JGY_w8
z+T(t5PCAMzjX8+ksB(iKD1y^A=|I}1ZCXWWqDco$2W?tYT%}P{P;SgY-9}9@N3RkT
z(QAk~7bTY>>bl~ZPKJ|&{eFIHt-a4aL&(W}pZ9tHu%D-0*`M!PzcsJD_S$RjgWj-@
zKl1q>{J(ID->FxzR|cQ4uiv`X<XawD+WXoieO2f$rTFdVaVp;ut`@$-{-%6YeFd-M
zqBo*HkKV=Kx}SyqewiQrw&9WaPP~kLUhp#{oU8w(!jJfqKjQgTCVV-(r}dtE^ltQ3
zVfISlMX64^NfBA{TLFIro+ZFFKd6R(4DTtPdh|I5_#^gJG{L9CQ?xy&efr^Nz*lLm
zWQjj<HS2Ehv%`2Qe8&-y>B@v33-2ji`RFg94-|Xmka$YrPry@zxz<H1;LpGrmYw{I
z|7!St2l_*<FT(5KDI@*X6qkQh|L{}cs{e(x4+-Z-AAFGCTBO6x7e{zvIq%QI!{bkd
z*TZwQ{}ge=e<r*eevp?FK5{5r;?INccu3FXQi^^vy8HSn;VR%Q@GHcgzV3wdhZ^+h
zhnsOiCOIa)dU*Mf{+{1|L(j|bTmQyC=~Vql(%%hFJ<4xCFLZd)<y`-dX1tLIjDJaA
z8vM><{Q7+{mA=Q~r?}>+Ip~{5`6Iq_T?GF-+&!*~y)t<JWBt~r{WwweRNxtF?1^55
zUVozBy2z9VMeKRl6<;0teq;P0-<6hdjqqLJ(<S{nogwcH_|Yef_1nK^r1CA{64$Vg
z75+GX>+}TQ4-!2MePWj1YKWpsdFG(snC*|)Z(0PuISMa>-wr=T?3qLCRKnki!fW83
zasG&XrS<TAqwps9aquCwaa^(Qho{2}!+7Eq%#)+|PlYdy;y)Aq44mP_X(wVo51u-n
zb{xh_0G04z!p$N6%i(L`rr$a3unOK5#eXgQrzrj#;47#<s#nsJB97Q^hWjQ&)=M`$
zD+*7#QofhqkJx{b20sk{_lsfI_?!iQ0bcKctM(SWj!C;ILZ5Sr-+ETUsdgUR_aS;Y
z`mg9cjic4*SL8&-TL<5LlHdAg5AimkH%#d{-fr}Hxjo05d=<~*(OE8V@+;+;0neT4
zkNADQ9QaLe^?hO2I8y{ae0t=(pbS18{<XI66G!Y<!iVSiL-zAXIn}^d!xuZ_W3Zeh
zTm$;Mr}`t-#hT&u@B#R-5Aoj(e-fUn$2p&9!jrCM|J|(6_=Tszb58T?eQM&FLwFYa
zT=)@+=>LT0!>@_LOX2rM;T7-~qVQ_?)+oFV{xf{JMCoepjqu5*`y=)px4`d*XNCDs
zxP~zkeq0z&hPT04E(o!o0iSh7WIxV<PlvxK?a}pqXc4^o%*c4l;3LoSTP?2ZjFelY
z_@C{!60{v>Jg9;HyO4IL{X5T_>fwjXVf+Z=P4F9wnAc1C%^~*v@QdK)_d*;yi4{Bt
zn(Mbd2(yz4|8QQUolN*<_yB2-uHT)_gFkwX-`XZ|y81y0{Je#c<yj8j3eVU6Q^b*U
zR>Aivi7dBT_(b?T@#wPO0KXM3eFZ*L9I?|3uYw<-^OYi8{B*+~Smf{Vedy$C<#!eQ
z5$mHF@U`c<=hwmcx5Sr+zHpgIpG3wXyafIX{15@Ay{7SJIs9#SoYXh>F=K}8!S51}
z9x_tqI0dWwtx2fxs(S=vNp~&&?=JOQt^BRW)8O}TB%Vg}(iM^8Qww|(e5QnR^_PU}
zxc`IiDBK)kCmG%n#wGp?_~-C_r99Pmo*pv4$V2~ZW$68r%0GOk^ZZth#NnD(mBYuv
zR|!}4Ld&xneLeaF(Ov1TgTD_~6)hTvq^}YF27IHrE)bQyy+_r9AHDEGzy3~+tDPiX
z&+~ZrNM%X?C+SXwUkrE0BRmtn0zN3re;#};e4uV`xgx9l!)IRPx0)qgX8tO?96tOn
z{)q2HRKc%>7m5LMi2qvn2XK~iokMs7{FqC)pLD2c|L_|4>pDH@B8&fS_*s|wBle{x
zt>wB1?;mC-4L$=tFpOuxv!n2Q_)%~*-*J_5DLfs1ri>e|ak2uwqTH{apSb#UHT+HZ
zp%SmV{^4In;f?SBoX6cE{#)SFF87D5`%5__+`x4W9-gmccxDv;8StZ{_|Jilh~mEp
zo)X1>8GI;Q(qJF*cO^VAivJpTH~IRL?HO0vdp&#r{{6xJ7_zUn8U2$r)N@#S?1ndA
z!F)n<pO}^SlWt_*e3jo?ALc&|{>s(Nzco*{{b#|qUE`1Vu0=jPry_D4s1!cn+Q@aF
z3V1jC0kN;ffdY^Hfda{A4f^HR`}Mk`9w$7HyY7b?&@a2ej7zTe(+t1zMsvR{iRKV{
z-SD;WdxGOcNVz5dH7;)Fn<C3C1HRYIertYMx#hsmxh1mPir}rcMwVL{eCX|w<yHwV
zgTJp*s{fOEsevDJM`XFx!_%sIF1Kd%r|x84=;U*0NVz3c@|~Q!Bg-clen0#Lr#{j{
z$|n<j{5^iX@4~eoArJoa-y-u>0#9A<w?2|Ax$37J-V6_47p#JBt@ii$os&BBjT=}O
z(M6>GSK~kY@9>_|?MI(^zu$UG%ER@2@Wh+wcMnCTI~9ID{FJcz&V)Zy6PfNj__~LC
zPIoE##g9hz`wI94@Pj2Mu5qp!eoYvceAdD5gg+zx^>x_(Y^CbQP3Xrw=G^C}h_@vE
z`Qi7$cM)I?;fXi1P6`iicd79F$0PHZ37`5z&+RH7J+sz~+a?}KcPV@t+<u>trV!Gu
zD$zTh^6T&DxY|h#eEr{@d24}~lyuj_M{kO(w<h?*@cYB+%@04}*~t7P-oiR(UC;HF
zhQ8DDtp7;F=6WXi$$}pT?<qe;=-XcKTMKkLoN==Ze)x;5$Ln^uRLrLGuM(d3vbisG
zt!pzYN?7Bq5Z@}_b@&@r&pc4uEwFhb{D)T}%cBLJzr}C;E37;cZe<_ktA2YQo6okB
z48QfY$a2bnU;BE`<&=khPJ=UV&b958z)RlrTWi9~p&b74TaoK#Rq%J=cWD2PomzO_
zJAP|}i%UH;z`uBxc|`&zsz0oaw?9-P?W6^LzYqMDS~zr#R|&WA-SH12*NKwh&%+BP
z1LhDr8SnugMW#0g{ww|uv_0dB|04K~_&+a<m%&TmGju*ii7fsr;SX%({z7w~&1>Kl
zpG02Y>ftvwu`VheO}otC&nEcG@D`b8>HCT?LsG^J8991L`sg8}<jG<2>H%x|SM<9!
z;X3d2PP<CFo%^(Htn-D9k7@8fe;L`Xvf#JC!^g*b`0LGnt5oO1Y4@e@5!<7z|H8}Q
zUWu3blPR(%S6|?zTx!r~|C{S8f0IwAJ=DYh0}r3SHNiiI&({7^#1T7w`2OEejsjfc
zY~mffj|&ffUoaIu>OYY@6F%|V$aV2N_@(gh^_CL&Qh0be%i#s^nUWrJNII+Fcfo6g
zxyHd-_;D?f&jT9Z$A9Oyn#8}kAD8>fX1E1^Qpz>-{_>p!zVhe3!4&^VRm`J)VEr<x
z|Fc5;OTUvN{=(dxX>sxA4`nf6q%Y39cjAD7YpHj!Cu7>CpZwOZ*h}!=l`C~Sc8zDp
z{vO}z0TunP?RQ<m_0mM;5dW3Le?_a`x-~NXZM%AwN5o%`|L@y*4k!jxzxUan$x-vX
zX7t>S=(?11!kz4oMxQL<UF{(m{x!TnbEo}gzz+-ft&%XF178i7=58NizX)Ce4{vW}
z@MZ9k;@K5%CHyjY_&lHnUI{<O<zLEHe*fS}_|yEIkZ^ad)G^P(Swo=FOw-p4Nk<Fe
z$96jX$H`B^U97jmE4AGMam0Tz{N%34`?m~ub`+ii_rbS|0Y(=o2bF*LkZyC|Lj6dO
z7G4J56TYwbcjq6zAN)$qed37!8u<0_;R0OullAc1;IlM$^3??23Qy5oIbz2T|2zs$
zyqkS0QFto+N4Oer%>8OIb~51y{bKs9YIi9izf+lyJ{#SA-zwos;Va;3z}MkIzLQ>w
zel5DY{v})u{BC##f9rOh;_N$?d^Mmyi9SPgS2~;FKfnux>;5su+%~ClO<2b~<X6_^
zq{3YDnq>H2E%V%6g)1<lv96Cy^nP)z_VWN$?vl<t_)YLS{+9UEzKq-%&c2LN^uyy@
zUB4^j3)yc_iGD45c)8WU*TYr6)8%GoL*=6Z{d@FpB_FQ!$Y%Jy39S*&rMlt6;oJsF
zzMXcHbPr=Me28#!NcpD0Z-f`x5Lb8>ya~QexXVsHyr^Gm#Ph0B_$v4*;@=!%rvhFJ
zzto1f!mHu?_HT`NZd3=~3x2Wqcg5QXf6vou&r?%G7CSBQ`S{;kfUCbH{EdCh_}@eG
zq2fqACc~%W|0n^fywgMKDHC1n9VEKTULO1cINeORPaKKA1a85P5McaEJmv5`2eevG
z#B-wJS?Y0r53(Blp@FT|eiF_c60Q#Z1iYv8HKG3lJv@DW_($-=#Fnev5}8<h4?jTj
z6mcZosqk+2G6Ak}Clfw%P^+~~b2U7O|2+7<gIld)%~g4-{KFT*Hw!o8qsl*g*bcN?
z;ksRi^s{R8PtglJD%>`i-ip0C_=q8`_WSWpJdN;4@N1+zUFF{b-@H?6#JnV-n)Q14
zT)gAo$wxB$mnb{~e#+2D|2gp6;4CYJ*eQbVvU97wufiv?q`wTF4`+EI#D69HL--uc
zed37!8u;*CTCM8@xYAh<zZHI#=00)6e-r#uc=&kehwnYi^kY@tzL4=S>0Z)>zNZ*6
zhuBMlp9xp}$HlYY1#s1WTs+@!sbhD$DTNo|Kb%*<=SShy@Dlh|u|s-2Y>t)m)WHu)
ziY(Vg_<8Uq+dp3`68|mm<9CfL*MtqcX8`}m_Rm#J{3pZ5?G{<C8Sn~tc)8}lUxODK
zJ2X9~TvK6bgV}eod#n2Hal+8hc}lL?u_a|viJgIawCZ`gs-JXcAHCQq#m;#2&-goG
zpHMqXPuKGu@mGbvU-9>(_&X@nU%`yvyeQ#5-iO_@Rj<RkuYd5%;q`>q{nBUuY_l34
zGtm#)D|$Mm{PNM~qnmNY>7S+WOW>-U#5RZcuYkV_e?|A(bm3AS)$kR`tyYnj6I~u5
z->;}g-?U$A#QJ^{eBu7B5$pSYcqzQUL|_hyKk<IvlYoccpQOU4Md6w7G4Nqx!!<7E
z!B2qSs(FeyV!s6b9Q=F%u5q^<zR&Ph{rum>tKg5ohse0+8pmqk)v2xe_Z%q?`4KU(
z-vA$ZKqPO5*T8-Fai_Bz-Uw$oD1;|HKz>KGhJ2?|>LCsO4ScB7kE#cseVJ16=b&#r
zkpAMTKS@^+e7}Rt^~-ggEQ61Lzl9&tl_HM#uY@<j57%~lHm`xV9^7h83*+_h!_r!<
z-E=vrb|ZG0;D;RA8uEP~;ePl|hcS+7|IT=y_#o~5@F?{UUjdi<H`3|&&xD_m5!sIN
z;1l5kCE@0fcuU~NM&ae~gWwtB*VX^3;Mwr=6X29L`y)MnF*81~SBHM*s8;I{DGzf9
zZ-gItoOAti%A*Co;rPh(COkx$N8!ov%ixcP+0TIQeL}016V@(s;8RYDyuKE}PmIFL
z;D^AA?Zo4%@eh6>yw&8JeP7NvD*3CGc(Pg})^8i&6X8?Do~s`<!&kv`!gx2l7Czd=
zCH|xu-s^yGl6<Rnp6j{NRqh$+E625le3weX<-o6oj}dz+T)O=lnC}1RHR$6+ceVF&
z_{Z?EVY~|7Z#?y=xl@m|@blp#!~8eEuY{+$xTLEYUIkb0>FR!K|IC0&SHi>Wr=8ep
z-&d=6BwRB5V0ewI9Nh2iWTJ08IkLX<;P*!1CGbl4(XRAKeU`(YfV<b@CH^XS4cwA;
zM!MB~)Y2k#AEnwq`ZbfxeT1t#8{yBx3tjC~?6trL<T76jwkwZ)ArX6tk1!tPMfTfN
z_-^p<`Aw$b;r%=h-am?+5_sG6R{b2G_~cOehfBOWY2@%K_&#v;yxcYJ)WW}+8JW%o
z_|_=A8U9)n-VNUrg(p4A`fC)P2EPq%##x^vRLV6Ae#<PbgQlKHYRK;`7olH$daE^G
z%ANbtK{%4{GWf@5wOacKH~VLWSHeF#+iCYHAmzUXK5b4UuZO<^KU&(UtKT=lzbtCC
zD*Gv3!2imQA3pn>)`<1S#K#y<;Zww;IV3%)@J6^9CsITbo(ca2K3#yT{pG<&EsXSE
z0xyKS{Y&|k!>i!yoPOq8Xy4e2UX7l-sMYyi3+3yX;2MwW(T`fvYF#b!BiHl1Cis2J
zTJ`sykmQhb`{CCwZ`JEaifW$tIQ0ux_meK33f~An)-Z8Y{^1`+;d$^5_^2@dCGb5;
zBY8P|6nu)VKc8*C3ch4TXginksD;mlzv#>d*T&mFq$+wNIzQxU-E4GO=y$(Y;74Cs
z)@pxO-G^_LpTsA)kGeQ?98&cUzY!kZ&okkd!865xX?GHT9()6Qj#HmYL*A<|MgQh6
zq2VN+3iytfMDl9*;qcWu9-lZ8PaV7pZvPIC{BEE7`wUI!!!L8j$8-s&>K{G>UM|2j
zuT11d;l(IC6@JL-R(rp?V<!{78a_?zm_zL6!JmT<upzGS5_nA%UJkzl{^v0NRq#jP
zySljKyB7Ws{O#a49`gLO5&iTlTdl8L<G;k;0zdE?ryNtntnh?d>Ng5chW`RTSof=?
zw*L(HPS;2FpB(s}@bLaq1V0)c-hayAr$*tG@blr}{ig<gYZP7&e;TfS_ri6ZXoA0Y
z1M3T6{mKuY^w(A^pv$Mg&R617e1G<4bH5~zBZ+^h@MGZN`O1Xn!Nc>F2VW6|m%wj^
zhqt?OxaSt<KGA7kRq#FG2S`F(<7+K^1bmq0L&cGFHo*6XAFK20*lC83xwX}P-@|A7
z?}pz3UnanH-ALNVdN+KC=8pX|_}6fCAL<%sv*1ToMYi{R_;7gmxKRq<B?_;Ad&0Q1
z_iFf0ceGkr&Uojuf38L4yB>YFyIb}5A6)rpf=_`Tsq>K{j+B!heohpg_;>Dq;3eYG
zRo<!at?(6^JLQ@QKYCrH{XF>8D7*w-0$&+sza0KL{ASIa@~(nUxTiJb{a8tVEqpWl
z>9F)PzzhCn))8I(pc#JT`c~_6?LSu>vC|FjhMySLKawy!{N7f3pRwaV4L)y!bDeU^
zAq#%jeat7q?Bv6n?vGOc@CNuEk`Qx9dMXS*MVPDntKk;@`-j=DgMarxtG)lIK!S;#
zM)+9|wc5WY;j?)Q{O>i9=}FkcJORFkcr=IDNjBV_9%+vm@Q?97BRJnX-=42XxIFZo
z9yQ~FYh9!So*spl!>2~!Rq$m|crE;|QFsHq79M`xX@;+dH-wd6H~iGcBmE~m!@3`w
z%cN5elJ7M5Hn`eHs_vswLf)6nLBIM*Gj5}gqfn$gir^21aj{nhe;uyoJ=)&M?sBX`
z57f3s?9;7<_j@XIeMaJGfLFn9<Zt(Q)(qcmW2^oSwrif!4ex@h-+NH;hpy)&Kg)Bo
zzqjiBw66A;0WW^K)lwb6#dF{n!*`PS&7txSFO9;>;0xhW7WN_jE8$DvFA8*xXEpFW
zHbt&q)WiG3huTJP#ZD9aSL`$hciHj7pTK{3J4vi#{}=or?O&M_JE`!DXPk0y`h6z+
z0k}_JM{^~Z_|JpCTgQ5yv^UDtGg_}Fm%z_{-mI63XAbdSE_UFP1-SZ475p>!a@}rI
zL>B+G@Z&Z|mO}%4B>W%Z(Usq3_=oWD_S_9W_r+H0FLFbs>)-zTlbT;9KgYiO*I5@f
z`M{+8^D`<PndmRS;jE{t@=C^39(+iHS-(?u)1BwEqL-rY_a^f<$F6Us-R?!NM1Sk8
z5Zz-xAQrtA{o;38t@bG4rF<IE^WI}z<ZpL5w7_41htD$;p67WOd{^;r4zZIA|0g{B
z`ket6J8mxN%7H&6+(}o8XN}32=q2cPzTaxibM$okXT(%_SD-gHn)OXxZk}6Q;cL)$
z`=HhJyM#XTD-Qa8paK2%4_mGLp#6~WE$AP7)N}a67nnDH+-fB{;eDPPUGb-(kNc$6
zwXZZdUa0(|f7R4#y(DF*(w`FY9IpiZiho6xe>wbiczF3&!Eb?^c}I$vRqY?{haV!q
z)n6LmgFcPq&G3Dr@NW2#@cqS(ImCX_X725y@HBWfJbd1n1@}ea`S9bT@KX5E@GIgt
z%=jtgR{_5leywm_|MvE8mG2t#T|R5o-;;IayB<Cso+;s6ya~QA$Wug?{P{O?{||S!
zU*U-_@>~WUJ`YGW-0fe|n+acn|E>IO(i_sA^U+6cGxGqQA7_7vgfBxMjecdk9o}bu
zo=v5*3jKl4TdkYKzUw+u3m@@CtHm@{xHIlH!0X{GcZT?HhR^zvbtd8Fko<PT&xEH6
zbCp{X4R}Emo(5kLg=fJpjl%Qc*GA!`@Y|yB3i!QIcs2ZSc$!XUia3(~I`}K_TLieu
zp%I?d+#0c8rv+XHXBw#LORc9CT<q*iNqiZ*U$yGr7ofhhzQS2=O+&9nzgWlTTnDq@
zgSJQVeE5VPLiamJx=Z0R@jp@9NfAeQ1^f#5z5>i4?W7uhEnMxdw9}P7%Sl%~`qN*x
zS|>{wS37Bf{|Bz>*JaNSZ-YM?4|MG1JNA<5xexlrxi3tSppw2c_-F8g1-RnLg8v9N
z*Kem>^5F;mhw(+$ABjgc<*EF`&;Fk0z+rYO;7j4>O1fP4m(}psC`Vb=f;;x>#Lkbc
z5&P{L;itfthxu=TZ-AewxlbG^--K5fx8cW`@?c3QWc@Z3{q&zB_swL&&w{J_WHH7e
z`OAan!3!19{|PUF-vwVS$d!+B_+WqJexNG&6+cBj7paAh!2jObPKr2UzX5(QJp6vQ
z89olK#%=M;A^yAJW8mTKIcW>)%*3n4LD#sD2EQKvOLYA>^^gVM-r8zi5XST2<J;Ls
zVaip$y(8sa3ZKwn+AHmXpS*S6&l9~8eHr?M1WuGb%X$7KdM*0x-L2La#x6za=#sBS
z^!#6$w|O{mwbK^(thly_-~CEp!Z;?rO}~e&;!7zqmwi=Espx||ZTkIGOv)kgWWp!G
zrz)cV6P^cO11}Qfs^=2;dvLYB?&9TQ-y6xR;6C_w+D?HuV!sx?YeJjd51o2wfFB4C
zZx_w*gW><t_2aYcbi@BMsLkGI>DWnnmG(Zk&0ddC{-xa0;2**769bf!8XuY3de`WF
zor7MmLz{gaP7!Yst_WV)ug%$C!cgs82UF3r7}#_Ax2g9T6OIbqr@=3kt9Ks6P7QYM
z#9s-2>voYIa=mOo{|5b3ozGnHCgGalBL}v*_N9b=A2i`L`JJmadmrjh2`A;83~wO6
z;pLeDe+M4k?{nZ=;Dutq9Ac*kK9q6^@AqZ!GWa_2>uL{`@Px#+h<;oHPl2oT2noX>
z_Uqw!@JkiZ{|Rq`KMxP@_kQ>@@bG@0_&W2S0c{b_VN>A)cZ@8DO!$rX4<9G;;6G#k
z-;xy9_x(%YFJot-aNW;B?)NLuThI>`-5gSX)o{;{HoZShg$w)sEBb^UbSZ~s^y|=1
zvW?;j?}k4G5AVN8Z}7b)_`ERxY48(va{Bd1k;P6H{3`gFVgB>sZ^4^|yXv<Te*4h2
zknf9%oeKEUo!j*Dabrt(HT*94MZ&U%j1ot99Xx)QHoZ=6#yKgkM)>~l%cLLJ{WLc?
zU+|-^9@eJkiRh=A>vCcP-_uBHi}-#-Dts_J5p(t-@n^z+#ZEZSgZ~8oRy@1%T>^gv
zJ7v0mI^#__{Gi?1^nH_Sysm=34?kMlar$K~{73kOVfGu~(|2!+Sbu4TZ-9sQ<8Jta
z@KeN&IV4|6Z?bO?ew#4Y^Px0&!5)$QG7DY?5ASFB@blr}{j3!J4Cx=M?Wc$%@m9dM
z;6FT_)$lj*AKuUE;E&^fyBHWh<OeBMvC{~@WY0G1lQ7-_AG24Ro_C4HA^sEI;{6Et
zE{f>?geSvKhA$B0s>clY9dOkFw0C7E2mTOTRg{Yt!PmnNFiae=Uj}~+Zq|*R_D~7`
z@7|PytDUIvAO2&qX+L(m_MPrre;Uvy?c1imV`u73jsNhY_iNMN%~s=wFXTQg;ceyx
z!)f<k5@p*hnBv$?MIU=Wn_f3@wa-lWO!!`sA#+H+^28qePd3Drbd<p7z}5R+c09hn
zIPp}V-#WsyBiFpE8vfuxZF>K+EB-q86H$00{2BNRiQo8_>ue1Z!&9*TPs%kRo9nDj
zgN)E~RU+^s=}dZu=hp|i=R?8uE6HC5`eRYz&4E81#wFg=44zlOWqeF1cH*T)>2EcH
zRePu)d>j5I3owVoR}D`)xXs$xhPcA(;3MEgVZ0H(3?6>HZGnFZ5AR<I@ABSY6rK#<
z4i6t6GT?jtxy?F9;&t_l9C!)*bj?%5QTacL=eTgDTX6|1LgzQW$-#Z76@;Ih7CEn|
zhG)SG#h^J<{^8fbsaB_+g*U<<gjZ;uE{^aP_`Zikj#CNmkso;YIF$_lkoMvprzAgq
z@-rX*m+*JO<vrJDKH)dxFFbvv@Fw_fgtrfAcNOrD;Wr9Y{WN%;m-N@5Url<#$H97d
z#-VNY?|luG;Nrgt{#W=^0p<|yhd01y*$`KF&ikwZ9p?12p{EZSsOPWnVes9|c;wwV
z9z`D#t{i<(dYfelV%+g`4jCxC3jPE9M$L0Q*J@r1Kj-i^`?+4O=b9k{CI1cZFW|Gx
zeT#Rx$B9Su7WBO`+N@s^IFXkly{!qh2Z=ASk?**SYO|m7rhDdVyQ%P;V`)D!zR4yD
zZ@$+ZE(`tI%r^ZU2)xK4@#Vw6JfY3HTj#sLdwVe7qL-nceG=DsTi+hklhCWs4;kHN
zeZk+-Pdxw9>8XXc!#~pDeBSp%!!@EmI=0R7n)3Gis>8LwZ_jG8-gol<hLe9uPvSor
z|0lLt2kLO-bGTzz^fdImlerG*@?Gjp2`%3o^wV<MtQWLi;C&`kFG25^+-84Y7yAR9
zauoX&=wD53vyz;0-YG<{LEoB3dD!LkFDH4byc^K(n2CKm{(-^xld#`{e&wt-YZZS}
zo<lts>GqWH0qqPv%<#!nuJ})ee+yR=M$tGVof+^QPHVGHka!sV2YZilB9d@<=p)Z)
zbM~#DgFOjX0zV1<kuLvj@!ofw@|SQG=<Ty3=LOa90R@rsf;xB{yg!b8h@D3Gf3b6w
zKxsGSI-f1@0{q{vxzDp+w~K@i$v^x}UG7W0uR6u9${`i~&Z6MBKhu;?CVU;7>49@d
zKJ(x+i`$&<`>ytQ*V{EE=_^J5WUlGICZwu=`1E;g){nY=bG<EgC_TQ^pr<a-_qpWD
z=PA|ss)t_=SNr#jJ&C6YzWyBAyJ6x8_ruRx*rvbRW;Ef6AF;or#Ef5tOS)3wcfx1u
zbftJt52j1>EcB*DZPs$BSIXPF*r`@k??vc`Eo;-i|H!z!+9Q>+UKRk<I9HCo3H?hG
zr#O<HDtP(wHvK!DMiX8OZ-Y-UOdLr^1N@NEHv9W&^shRnU5eg<{?^Ji>mj>*Hw5#c
z^3Ov2Y3E0lS1LT|f;Rj2&eA<^=ysC{Z-8H}?fJZ`Lha?FAAV7r{XUb=Q=#))3V#q@
zBndZ%#9sk#gC8r5BBFX#IaI@UFKg4kLkz#b@H+Sj@NDgWsK=-6H^R?>A8Pml<G%&I
z3Vyb5b4a-)e9Uun_-TopsO!SiM1rV8(v^zty{b*`qt;l>OETdr;mf4on0j66UFcO6
zYy64*BK&QxXtU1J<5G(EG^bir{>ssRy)Lr-R>70kGC!8`HHX-%h3|Vqn^kYu;|sxZ
z7rha^{>C=zuX>z$%;UYrX^@g1Kl(AZaNl5TiX-6?x#3v>KStY4_Z|^yHx0ewR_A)=
zb6?NIZVvhmx3}r%Qeu=t<sW__e2&h4uJ^34{G&ft6*=Fpg1-v4_pNy2gXxj@>d+s#
zv(0Lgh@?yXXzCwcaaZWLDCuZ{UkKmF&fgxP_7a<T@9XY1`~A3d&sEx9D*QY6=XN|z
znrFf{u4}WdxB1n&U*y5l?`gBv_d}4)qux9Ex!Y4I`jZ>XJWRrJr1Gx<UJLIOpxTrC
zqK)SVcYBh2*Wz!@eQkO_9r<2r+IItdJ$#LXXOYlzsZM7zeCPWkc{ltL_=DPiisxSK
zKj~lif1pjhABG*D=VQ&&;2**F(Ef)`H}Pf}o-5oOlFoei&<7*ukEQU5@bLAa3iz$?
zV{Ie2Vy7Cu34UA{uY-RA_l5CBxc8yRbhbp{Qtk<#@(=$zNxQJeXYasxcey7crQz>e
z{Cz3?T|PGM{lvLYik^f1$fIr6u3BH~@$ML+m!PkIf_^6x4Z`p5ojlClE-KKsz7pF0
z#BMcw$`;m%Bz=reDc%I9;fh|5e*8aJ*VXfp%|36D)4@b<M!({<HfyO)*Q(Lp`A)i|
zd=oz7KBd8FA3kX}5-u4&;Z4>9wB2<cZy+SzO!R}^ZnJKZ35eVUd#~+p=SRZlqu=#U
zt~Y}@p*?yx47O!euVoT`8`oR0Zw^UMB|QC$(ECQQR|B5|Z<BsSyY&9(bSq`A0sYv2
zw^<L1Eg28)H|-z(7W^j7eV(;Cf8Fp?zG>6HM<e!@I@wd>R`NFHH~(RsQ5wnkA@9U{
zx2M_}ko07tFW#x$N;*jC<UjEsx1NuF_NaF2EnROvq<FVD5lHwl^r6SK>)*#y^_uJG
zQVvz<6OM0pzF*>bbjUzSN-ew@uD%On+G~M#QAB%f!e9Cc?bb26y}dKmdss+&>qZ}+
z+itImrg&EBa!F#Kdk{Wex0iMC-jkg6BI(XRe|LJj_4WWxWZlgBj{$bRCEa=GtIi0u
zE4&2$B|MM6RsBrS^-~VtFTY*C?<g9F<g*HXH$1Q-Cn}$ehhFdZJGwfi_^Zd?(sSA^
zb-_3O-bwYg9_sQZ@web_{B7-eJ}B+uEuG(lFIXSHz1_M^+M%@5N~im%c94pGQB}Kj
zu+HzQ!@a|u{7QLbp<lkf-70eQ{1Cke{j~?%tvB@b;D@2!mz{<y;mgrWAM07KM&EBE
z<>tXN?Qp0!$4Q`suScK$bh~wRyd-8wiuZD-8L9L)qd&K)y~q3SgfF=sJ=1Reh2Rq2
z!vsspD;d7$v+d4)FwaYxXTV>Dj}`ys5dS&wpW$nTi5+uaUIbrQ*KRG;>C5%b4NYG;
z`o`zlt*`YsvN_)SnKO=v-D>oU>m%Du9efk~R~=uvC!o{U2*3N4cB{qaU+a2qfiK_E
zZdJ>8#CTQct#Sq=DaXWS?!Vq?w?5bD^m&_t>6CP&p+EgzyYu@F9&Ut$XTiJRXY)7t
zPWPOt<I9I<zu#_uAK&NQC1_9LD?`t0Y`4_Hvy4CAhU!)5i66A<@5Ex)yJt|Bc<ayy
zf7ouXSER^#h44oBZ1{5iwhxJ~1^x{DQ)x%i&bK<vNR6L~U$Nf)al78XA=mwfw7pdL
z&`+Fp;IrF7Cj13>`2A-d{9!n^8_pr|m%tY_^<2Ic=!bsVuAfVokdmKj_*(cmQZMFE
z`G<e;S-aks>f(*?e{5^F-!~cQ;RZnEAHL7$?Rvkel;_aU@=V;${-`h7t#9l|a3!8p
z_?Pg-!g<(k+slL>`(<={5??<0q0Q~q?NZ)qzHp;c;9|E7{r>Ik);j)H?dA@h&PsUt
z*X`Eqo#2G?dQaWSJ-*hWFKMG4>u^5L-MXF{;9c+|jlIPLO6Bin_-^g()}j44G2`Pl
zk2kfSYkU-ciC@#_yW1`Gg*@d?Ep}b*3G<hMzg54sTf_PX?XBA1JE*_QpX4tee+v^j
z?C0Pqo*Q)jO5xwY%k=#g*N@VW`>jg!?43KD^=HptbpC4KkHKliQeHmKXPVc;%XaCo
zw%Pm>&70s^!#bSzUp;H|_0tdkJN$-01Tf{npmW6_SNf$qlK;)~;(a=-TfDYEUNZEq
zjkv$d!r%2N9rph4bnicc?Mm7~5&H4NJM8z)bG?&-y2MkCzUWUK))lVu<f40VczM>~
zui+rdjWDXcoTtmP9-e-1hjpstN42vlgY5Pq@i(K-JF>(2PV&LHm*D*><a(Y!gU>jo
zL%*l1uIJTG0wsJZ`sPvC*W+TkcbX%s{*i^=er$*Ry_$5-ZMvNE;TIp*VeL2&Bc?sA
zjraB+=qhKiUyi@C$2j(L-S(w?s?l#7+hKhm{m9rU@V@PCmg+j!fWPtMI;`V#KG*j5
z9ubny7WBf2)I$PxR5_d+a$lVIAJ)4kb=c2Q(>>4We5ArpnA~AKBl$P+=X#%vcV$DB
zLk|Alp3-5jSEtK*wWPlYJ~6k$x-z64T^iDk#9sye9+=)?Epg3v9*g%DyXQMnUbXo9
zp`gQhOzcUMe8|bBN=GC5s-ljFak&M)7#=>3CGeoR9$u>L6?m5f?Wy`l-(!A<UawL4
z_nd9FFX`u5==ta@uS$CM@Vuk@Up{=#1s&Gynx}hi(!3O21?RRz{QEpxbvv$rpM6e;
zb&0OOZ3DgMISG;SsX>2nQHS-tQxB@Ke&w!+H2gK<@5&|gCsW>QJnXbt?Pc;f+<TE%
zKI|qdZxT6uoPP;S6h2$lVf}Y7C%j)g+PghuUXY6Z@Wmb0Xp^oK@3Bt0BzzY7TdT;w
z8Rt{HZ#v_==tbzOS9e&4=<9BQccde$_{-7PUfyB7EomZ4qrLwaXs1u|U5$Rybsg5#
zgE&#;&m?ev?<)6rCGj-i@19#ateH+eCWqvs1^vT&I;@>_KDZwl6q1j`@0izBcUZqj
z`(qp_^tSG3r$g#F4gKCHI_&R@`#cMEeP+Rbfv4by`W$)&fz<d9@AqVf{e7Yo&vmB$
z;j7@A#lJbke+7JGZHINT>pCy_s)px3)uH#ZQ9mB9&*`_K*Q1wj>aaR>`R00CL(8`r
z{j9nUt2hDA(q9Uk;JW_*%YFIg4y(}C^F#Gi^yc~w`}ZLVyyu6Ff9RvPblBft@p-CE
z`-i^=zn^GTJ6~_|4?p`Kk-P%_6P#rV?f)a)FRI~xf3?H9+qA!U?=4QfNx9XdAKlR5
zywB!&Qip4Te*nKg+6_&{>pj=GE=ag;^z;uptaVau<`ACrJ@ed;On;a8>};LxG<d?+
z4rd?nJnC7>KMTGG{4o3aaB#4EL@z==@Z%24XY0oYb&0PWef%dK`o55JIV4;ad^P-P
zT`vXR%R}p>4*k2&I`q1YER}f&IEKY;6MECO4vS$=$}`>bmClDB{>bMY_V4_pdsb<l
z_ygZ1`J%&qe<$6uL6>7H{1G_QC~fC?y4C0%<V@!uz4XiIx}>8B{kY~1`+HpJp0jj(
zW$?@4g<?q3mp^1+27gw<-+~`0<;AxsD`fmy;~hODWp#p@k$K|>%kNvrKsLstM8Y)?
z?zOKv^!-AVaGw801dGcgT*8k$FWlat-{&RVwH|&!qe9|alfbWNtnR1QKECqEhi@fX
zybvt`IV5}*;pczTVVx)Kv&ZmrywSo-J(m;y?v@VyySj2;;&ZA|jU(0Q_1|^a-#zhB
z9BMva2mc9fzW?j<2A5A%xF+-izwfZWmzTcCj7xs_X!z^It@`CF+Fs&M+`qybbvw=V
zz8y@5q%#fuz8^d6-!ISgo*Am=pnvld^Hv?+=lx5lUV@(E@38mf_`JJ?>J{kYTe%L|
z*NJaJ$FUmpT{}9g4m*862gA#Cq5=K8K!>$K>Ooy6*aYsqJ7k_A`S9a!;V;Z1B_8^X
z$6M+|B<(fnXRZTQ<oqEGzA*~Vf>*=K2x}h_Pd<ELT);ZR&d*FI8r5&g(8qcL)_#&+
z)v)(+#x)6Fg+8WVz^c~aSH*kpb__^5>(I9h2<Uy1v>VTtx?eTIZyp%1w%|wA?~A&A
zTi{uP0(w18isrRo`AK|<e%jOEfc3OpzD)5<Ggs{?4gKoGfFA$EHix7m3w{?|rtkKl
z@(-_oo8Q69^<EoluM9nINFZb!l5myqrSKIx9qHlglC|is>=dvrvD?{&p>`Y5Q+EzH
z`;tAYP5$AP@XvI;bN&C&DNmLER@RY{0@i)Hyq9|a=E$nP($GKNEntn(^OVPid()kH
ziiFQW|7qWVl`Z#~%wtl#CxonXm7wpQ8n9kQMt>~D^Q=?8621cc8T1=<dsynd)@cqZ
z{u=bOkpXKDJAK1~=}RJf1A6Mg#4q+`JT=b)o8eR8c3p}r{iW<Qx(R$E*O!Ew^gf)`
z9tOJ|y)_ADjwp6hdBF7cp#ken2`KZ`S9N)2!pjc}SjWiqNnL*qb1qPlpM3N?jttn(
z{b;|z2Y;fMp>I7ZV11|alk5F=Fh7#MD)bGb0(#zP`ZGpGcwF;WNnbtw9y%@%v5&L~
zem6Wk-+uV@aP^%$GoM^F-1}_2%dVs^xt;RPH2q7yx9QpD)R)AYiS9?2zwJZ*&V&B|
z5AP2p@K51?m3FJvHLh_QuBw0ZX(tBk-$%*y9_q-t{?X^26tL#n{h}~bZ$Pi{1@v`H
zz7ypA(J4@|--5noEbT+Lf969cIJ%@ev4im00sS0a+RvxDo>SrHjSJ}ci<*Cqaw3*+
zS?ITn4>;dX_V8d#cs~3ics_sIhwxH(@`Ql3&4#!t|L|tG{T(0nP26QiB;jh%i%zEB
zOE^j2g*u*k_#5z3Z9Yw>y9qw{lz{b~aMONrd3Y~(KN4RzdL8;dbU4<LLgzKf0iL(y
zMAs!fndpNj1)TSzJ^#?@$%8*1g_ppWO%8<2$0Qx)@T@5TYmn{-K5v3kEvj6q(GQs#
zu$t|9|I98GJ^t3C|2U2DQu1LAvD*ZnJUw8Iw#UiLU^tb3^d)%#y{;(pj^a=~nFq0(
zW|;mb_YGn9ZJFp>P7PQG>U0-)hli#+AN|eK0@gKpJo9<igpOxr=%dbzu1on=p|3B9
zEZ<uAsf7XS5j(TE;=cj@9ei6DZ-zg0c4R;8hCdF^5dW;#FER6@q%P78A8R<vZ~FQN
z?||<w<!KHn$1He!QNaG4iFEJH!E#JPFG4RX4p_TNInfTy{kW8Pq9^orT-A3a{tM?(
zpZnmS=VBi3qJ8XvN8+nR-&h{7ZZ+4Lc<);0IwR%Kh@O6R==dY!X$yQ`_<J&5n{khu
zhF9&e9;)I`>Sq3PT|obCtQyysI~6DPGtg6SjI^Hv-vxf4q|5X-*1J;N>#UOgQvB_F
zOF(}IQ%YfnV0npNi5`Dzz}jU1Co2BIA<vU)(SN=xpnqRL!e16_cPjtr`S%2zeY*C3
ztrqxfcm-zdL;NTF!g~VnJ8Xz6JQ+UoZvp%Jmp)Ic?%x^kQR@Tx_i;@a@t*@<ULDZS
zkql49ErM@_pJeyL<AV8>aOLP7_Xa}tV@bFwc=~+-=Y3MWZ|VUxeo44G^v&pM+~Zsh
z;f-)B3U7g*cz?kDjzPNTVV$1@9w2=LAEGSi|HMu*{4Mx&7ngKpzz01L(D$8E{)0pF
zlZW1cjwAibXFr!J0et#kK)-KmY^waj&wMCgxw@5p{s|ukSI=SX@!RVQna@l3di)hX
z642l2cG+!$uY^mQ?L++g;TOVpvmvhVM2qJ?@Q;Mc^Sk$T`J}=}J<7aGxH-gsrr~?q
z5Lb8}{8;>l^Ah-RaQD1G{FlQ=!ZXAU>qquDR0Yq1mua5sVZB@Y*TV0I7i;eG6lmT6
zZ-p1yocn3<-wZ$Tv4H)2&L_|3gm=TQgdeW`r<5?rNLeMt#q-U)fR$>u*Zo54Hv|3t
z#{>3vcvC#fwY?npz$XIEd%1<iUJ-l`_!kn78vn-f+a3Sn7e4fOQ;z;I`pqHw4US%o
zp8I4#-^beF7b#h#w;ug$^tmD73!U)I==Y<~4AG}LdP01B+^6U{A^LbnPemVG8_>_$
z?D#z$j-G}7HTqC@_*0au(pQB3A^Lu9{q&$-j{Xt4Y8STs(Luc${rTU}>(Q%!LvKdE
z8a>k;|9L_C37+`44d}z%`sARVihdjVk#2o)P|rfIK|ji^FAeHN=r5x8n1A%m=zF=t
z&j^OEMt=r<q+6e(b-Aw9qrZe+;MP6kR(p*N!P2f<@Yjhyy1%O(29zPOlgNhgkDdxx
z-EN)N+C87>xCD!x4E)t>Wc-sG3%kC&g9nN)(eu#ncs}5~XS&8C?R}myB6=zM*XXB8
zg*)M=^|!-UqVM}kKtE5ib<b^1_*(QTboHHRTlbz8Z-;M0|9DG4zqerPo*XB<AAN^^
z1oZEYJNm_ro|F(Dw+MZW^nY9TUh3G-K!5+$fOUI_ev_l;p-+0<%+Kubo(CNJrRbla
zzlC|nzUMVZuSCD<jh@S|7X6>-ySu|rQ^8gFH=;M7PYFri$xizG=v@r~^<DR1{Es;C
zC-sYuyY9_^UI%s3zroQn(D!_cbs2a3p1U1A5B*N`cS7_x9K95M(%a@f#<72)qgSHW
zpeLJolxjcT-TR3LX+O2-_csRgb9yIyvkEWmxDox_f133ZTR(TT*L#vG0!fv!(~ZC9
zKL}Wr&b*X%%I|pD@g%eH^oXtIzQVTS(H&dTk%@i<`e|a&(es>i<fCs!KfqlNXORw1
zXgbRA_uR(;{hpv>r%2h6c&gC{eiG2%r*QOaN3Tae0$t|XPC9gVQ~7L0KN0<}ZryX8
z6Fy-;eB9&c`?&R4N><@h(H}t{=hkyqd(Xv-q%RA-5&bo{?x}a|7olI=WbUh-^ndE;
z<><bDMbDqqXEpjc=(mKIV`;D)#a{#dwtgDWzk_MVlgIew*LjiTNqYVGd;YV4{vC7M
z-zD0Q=t+El=?nBi31I7<d?&pb=zrQ4(EAJ>{eDN!Lw^kY3U_+FmpT2f6n*zE82>`_
zX^virKKV;Czi{j?ckI`qZ$MuZlD_#$SM4ADXLKHO1k=y!%bxd?7oocS<L{Z~fZiwN
z#PhWiPx7GnxHVq|tW6TY(Q6$&6Met!0qdoZd_3pmBOm?6uLIT%A$o<Qm!Ti=O~6_b
zV*eb+eiizq=sebN#s96N*P&1SkC{(9>ATU<o6uiH@2TB)qaXjRS$D9*v-lteq#Yy=
zj*m<Ij_aH|{*#q?rDviK`wcxG-Gly;JG|#PWkBYiW$4xDWuluycqM$`f1Uf3k@kH`
z4g7ELSH-W~SG=s}o%Qf(-<$Rz>q6`Ulk_*i?}MK#<&S@Fc5ogmdN=yJKLo5pwVvxe
zD5y(1l6Q!Y`|L+&K0Q*NPYKU}kNk;s75=sl;W_ZB@Y4m#KB*bne-ZqzQFs~rpHX-v
zeD|NtcqsWP(spX#^Wow4>){VZ;Z5)s_$)g;W?jw?PxA+?`8J=U?I*Iqx(r@ubCcgx
z_$yI(CVWV1sDJ5ydGJ%=3llh@UCDhb>$XMibp|P~GW^{h2<UzAlFzesIx6Acz{Ar~
z13#iOU>&d1m%?^kb-z^)p8-F{@MVTK!As%C8g9Q&<A>h_&orFdDt-UQ4+w9H!c*b@
zf|qFj=^h^ZO8PV5hj%&UnC>y<m<PWUzFqsz^?a`Vm%yiV)80(HY|B&qs2pAl=Q1Vj
zCO7;&k81Q&elhcJ?n`A~o3!6L_+0o-dYy!&mI2N>iKMRyeMUm3wVA(Ff8lY1a6kMP
z_?eogduC~#I3%9uO`Q?<p{ek*;LElDkscBt@n^y}!5i#!yY_uaJo)Iw13E+A(-K|^
zuYw<;?WyOIVy^<e5pJGuq<dY@H$<;Ne`HXn{@xkw#k)GRzc!%nwnL}=UAT15WjbHY
z@XO(Bi&5q4*>2W<;j<Dutu&ec$n&rRgX>5VUotO56b<RL&d~WQ@Xid4FBARlojR?B
z+HSgMuC|*8{|P?HE|&?R;Y!i>+qu*JeVAO&gF2lR@Qv^pw!K`<tKmPxFVuXbXN8WZ
z4nAX-PW!w4x!%J=<7q-)IIJ^b9n2433|H4rGhRx)B=W;FFT;0{c+4R@75*IDoloJJ
z@S#bOJP$qxevR0WahiRHQl2I758zXDx%j*%ho-jzz29z~dR{`hE;0SG8h$w3J?@LW
zI{4@C*X?qCC1_8^p(gZe_UN?Ull5ma4yAkFh*&>L*f~D#sN_!P_dw{zYCK4WXT!tG
zBLnV(tMLZYa!7gPz-Pm!E294sUIf1#{-BFX`pV#G`*d0_I^(3;&-M54ak3hJuk7Dx
zJtg6#JRdXl4?lajlm7y*EB{hHP3VcKoz^*ac^3!EN7B`eKJ$Q1z3w7**`F#rX&2_R
z@MZi>eCZxG4hT<!A3CBl;`=CB@B`pxoORw?%!iMI`?MY3MW$R!;ftf#sel*557z!u
zitYM`pBIJK!LNd68~^t6&PMn~_*CKMkn(7Oe-Hm!%458|{~mmhB6{L5!j0_I@1w{#
zJUv)mQeSE4|2?SF`F^Kd*9yE($GaXIs&P3Ff0zH6_F=cnBZ77$o>KIxv`$Mcc*=8?
z&Y&*wRH9#WDE-#lm+5$t+>br=_>aHE>7CYIdi+}I-8FRlYC@lXM5o2)wWJ=o1YhcS
zQ1y@gRz{~@U&f0ZlD;H9SUdNqPOHUE|JT9vNw^I3BaZ2`xQ%uWNp}u>-%*{`H?ID+
z)cZw5e=Eh`XUBKy^*C8)ovPb&1$>`O^0O<(<aw)imtAQB>X3MA(08BOY5lB``d`vp
z5BI~>K4ta1;Cin+Tr>K@8J+q$m<cQ4y5W^GJMG`GNbw#O%%|wdyK=obwbSaf%b_(?
z&qTlSv`+i|-xT-zzY;zl{kzjUEpD@={8PMfq2bHW-#eqzT4n1O1$D`975Wipc3RKy
zw|z)C*TNg&&kp9qjB881wS&XkVH5u5&8Ht|`{~}Cpna8p^jjA&-rD&)DX2^Q$$YS)
z?wn5jyND(M5-tPoS=ebErNjBW>7n8B(04EC)Zd+Rg)4!#z|Hpwa=ota6Nudk^sS3K
ztuc0aoDgca2EA*EGY+QP<6u4f)}>B8`MhEE)QrAtS*JC@E{Cz9b`y4Id|u8tDQT7Q
zj)6zzAKn7LT63T0a@|fd;AfR~TK8*v1;Mxb^>rW*efx?|{d`jFJ)rHCz{^&4>hBAQ
zO%BO-IlTBh<}JFPhCI&_y&ApYf=+86Ti?U!#wvV0`fC@FPMx0Ii1(k+kG!~3?{Am!
z=DuM5#eTvb@o_Kwg>l^;M+OJ&OF5*XKeEd7cgc^X^OFg`{ZeOM;<M)^dGK!d`}(<W
ziuWz2JF4qsDf*+AN4Bd9cq=?j@}b(b*V#!a>8wGIzk+(S(>XRYoek&*UDX-!9f4-J
zAO5w3Gl$sghQD0VX+14mT@M~}466F)!;@!R-)Zl=OSkvkWx%h3H{0bMyo{*)<)Kfy
z!OVYL@s+?g!`1KZsBvnOQ!tXA3iQI8I`wy2<@z%&SWl9k8uW^r>Gxt&uGbrNJ=DVw
zyQR~9zcbx_zq1Km1Aj=TbE$Vj(4LGV-RQ^M)@kkLdS1&#Vkh_WT2=qNfPcVUoe|%c
z&V&z#|I<#7+4r6Y{|x?T;pUM1mB4?3Q|v1J-eJM?NIVtjEq8b7-@}o1Hc98N8a`rO
zr~SR^6mIWTIoH9Dhu<i1P+s!BfyC1Ye+qu3jwj?kL3BU*K7Zr>!`2T8rbF~3J{)$~
z`c8WvB(GY8>KW)?R(I-kPsa62g4;$^f6PNqzPHo*lWzaH-hG{FR(dJ=e)l`|lJ2e-
ziN6xP=7CNt$1bPw!T6<|YSBM>uruU7Qg{RWzi_plB<<rIT^`Nw?1wt7t=e9Jw=vXS
zLUMfEuQkqnU%LJLF&Vzs!=2W>*jDXrof-e&_rbpxd#W7=CkT>`JoJ^1(*NynZ<+BA
ze)waZdVhx0?<bm<!vpXp?Z3eDq2^Wa=N|90zhCb2EY-XgzSk2`@()jkuhDkWJ(p_#
z&G2>blQmEAWNY3He-D15@y~0Ys$C`VfrJkDNrtn{NbxlIeou0}*W73Co6dq)z}@pr
zDTjRcEAZ>Zzd5AemBKS?JFRZlJSoN78Zu9kc2I@Cp-*>O>AK!hynhbXo7kyCPuavg
zQpPW59?%goPn2{t<FEbM$ot}M_}n^^ZmEwPT`o!ca$gIdMp*k0J8AH(@S|*qD?AI{
z2A?ck>`c^l^5JREnfo4TkN0X`3V$B1?hhplhuEorAO3u2$o_xf)nXssEFPtwoA=)8
z;4i&k`k`nXQf`fK@8(YH9s#Oc<PAYN(ee1v%hA&XkX~NnQ1K`3$GjZAPV-#P9Xh?K
z@YEMOBi{SSgqOk9z6qY&lWk=u556o4FM-d8@2%~p*!xn-;R~biD)?e}hw<<ES*NEK
zKKUi*zAD|muWEp=gqMqdb4d9$!@qzZU_)Ht-S8ja;rF*mDe-atf$!<^FXfsB{}%qJ
zaJgQ3?z4+km3t2Qg)etnEA@KR4<7I0koBk%^mkr2>p?Q_KUt3_<?sP-bn5SA>iW9H
zHmvF&eHHqbVd<%ZpVH8&eh*se(Yt@Je@M6{^r>%}`L78p`S8Q9eyh_uUH7Y8?~KrJ
zN&Cmg)xX`TzaM47iM=%VQSWeFF-#ocS@3(|i^QHeB%XYD=ezWOd%kkDGrdsZ%Fq`y
zcIx-hT;VF=FTnpR<*4r4z6mMETJ&q1OnFFuGy60f;IsZkead}-dJl3iS0-&(#)}s8
zlfUk?zSw~iRnBVC^U)5j8wbfx((w4Wgr7s_d#e87Kfnj*{G@w5!TgAxgZ^P_r}eh2
zzaFZWps(rZIeZ2BqE5=ou9vHW^&;u7L2v5nv;yY2x$IS57w`Q({5{b|{5|aHvOXsa
z<>&J>>3-7!U+L|NxPMIe6YV6S%eqNluYK~0t0^|su2a#s4Cu1n*Xb(oz7?9TEc6Qo
zby)|AZpLAsd^;}qnw_fe68x17?uzJd<?xm8@cvc>KM&s1e5nq7$qrri^(aNIM^X=s
z@FsYHPOr~<Mliji`_Yqk?6OX?^}J9$DV24_Azjv1DGyb|?>Yq{;WN;O?9yeup~L68
zKI@_KnTNh<SeN~~NBsD&F8>nvp-Ej4@7I^Zx4;ujdhGj)D)<w-c18ToW-Yu9uGY~>
zj~vo&8{qH3j}t(@V3}0$X1G5J?}qQTTbJ`Y7@o&<I+J){T?-GN_oTr`?@l|>?YqFc
zHrT!;{v7m;dv-<4UyI;Bz|HfCbo=>48GNU`x~xKzUi<k{C43f~?RqL7o(`R^8u$r&
zcj@0p7L7yVt%uKpUm-xAJ6)#VyKRDh06(}N-1PT#`-kqwlzx>kg85`hm-VePA5kwa
zeD0o*NWG`w?~c?iz5XTlk<Wy-n;i7xMs(?YBXa+8X;7DVO3>FG*rk7O&GZv)c0>A!
z#8ZjC_=CEvd!(GzI?!!SL5p6Ce%YV9?ERxY_x@2Sk4E%mX<d3h80T_GxEA<kc$3|3
zKMbZ%^uz<{pNDo?>$Sc#xcgj}a~isJSXapRttDI*{3m!;f}F@Y+eyxQ5R#rE^xZPL
ztS<gW&-JwF`YeM7;A*{C#;M7gSHd%n>eAo;<vPjha;lzd;3vVu*IDb~1@P0vzBwe`
zCip$@ZeenrXxH}r@XL?xinyOk97(ytPcZ(^H}R&z?}PtIb0<BS@F$|!$%8)%-%I?P
zL()?Me;mHA4RM8+!~YJKzwJZ*u7W=am*L(%gxA9Fft%-=v+VZ`8sMKt;mz><kBQ80
zH+)}sczTi;$Wx>EPlJmcwa?EaNYax9-xI#Gok(117y0mA;Hn>UsU0XAh>af!SBCyQ
zdU*Vm@K*R(@k_nQ{&TTc15X*%W$!az>fUEAdIS0$$9C!8&6TC;vx4ng;%h<w^ti5w
z=WYoHbH4-s96xHjmlx9IZw?8UioWUiu88?#CVUHAmTT=p{O7@6hDX#t{FNyF%i%A<
z!^^b_{tR3_FESB`{aW~snO*jJK)Ssi&;aj$f=MUk#<p0M{$}_v_#t8gZu{?skBq{T
z{>(TV<j#6S8hl!iD?3u|S@3!Ar}Vgy?tLt@+>6k=PwcXvt2+1BW$-;t3gu$25}pCS
zQpOYBw~6<z3K>so(W}Nr_R|LVi|`DBNj~lS_-6RO;O^(+5>Ge08-9`a=Q=-7HuB2f
z98%87EX19f)n(r|r`z|<8Sty%h2oKT?CVwz{5^QH&CPvU5&W*~NL~g%XB_hg?ce9w
zV#YuCKI0?(*TBDlpKjZqq5apx|2!d*H^CRdk2n79{Q`dY+9>`L4<Y^VD{cF$wf$81
zn2B8>>j6@JneYYhsd9Z~{PyPb3n{;R^xG#p^^{_dr={>0;KOx1DQw49<y`@P4Sts$
zKi?6NdZ>m^nbH;UetRAKd-(bG^=f%&yK6!pKefyHo3`ik+^OyP;qStiNjP&zJc)-=
zj?=r;@2IGHHQ$#_g;&5AieIU3o^y-;O!#N;1vY1&ij+$pJU!3kPhIDwC+b7Om7*Vk
z9=`v+!h}=TH<$lv_*DGo8zzp#QwP8GH{xkRuR=e<6;9&!!#BdS!g%6g+$Y2D3FE2o
zg)_QBo`b0T!ykudhxyNge+thC<0bG;_*25A9C?l_cFN(m%<QsKG<UuqQ3bynuKJm1
z9OAzg{%`nois=7@H^9$2wafm!i#^UY?W!4G2KR|q<`edMK{vb_exz`7h@B)BoL+#d
z^)eSvgZ~JBLYSoAyg!l!zh+jK-apAY2-`_iI`iRc;j@hmam0Qp{6n~!uNqBw1$^9T
zCOv#dMfSM}uZ9=G&Ai0vM|JQu@N#2A9P!@>{|SD8i%WZHfm`r(y1z{D-Vy9CspyG^
z$H!fA2JKdKXMVbO#QZb^e;4F;+5199hVKi>L$5uvOYaXhX^?c4z<p;CzhUACFNePh
zSL=;N6J7=X9{#Rj;z*mVg+DgCOTYiY_Xe(KVBX_8Z}yOsYZJ1EjI8K4VMzL#{u73b
zT0LOW5MRlVQKN^X^BsdRLsIyz0shCBa_z>>N7#{RwtYyvNi2-N0}sC*r@>!^tNnl`
zfcVdXZ-%S={j{&su`dS?xD)U8-sbtJU)<;Y7$Z3!ctpR6amD)YLG$|kCGPfkBOKRn
zYTTkJ+S5_}a^mJ|p13#eG5t<tQCVrp$E>AxzKoytt0(RyPruhZao>9S@pqM%S%^e9
z4F9S9PKcXj!pp;r)P8@C8(n1Ud&On-J0)%|t6um|%0j=ec>v#*`R_pfTtA5a{y6?9
zfj>&%j}rK!1pX+2KT6<_68NJ8{wRSzO5l$Y_@e~=zb}EJBYY~2WhZO*-M?se<OAA0
z`UmaampVF5jw3dYQEnhnt+vPgZIs+$^WEN++I?l`Y;`{7fN{!w@I>uSnyTIRXJ~hq
zx!N7SUb~h#R3QEfKexFoHOLX})@khUEn(+hn)5{C&f4Fn{@T%;cl>&a`pbT%JpbXP
z>RjzT;V-quiQD?C-Y#~l$Hy7pD^>r;#r=DTPyN;3oWJAI=d!gxj{6g|yMuP(_Asvd
zS%4s~;c<`Y`0cfZbta&!AIKqF9pu<uJ8@6%>QjH&e3m)4*AWYhKl!w$9CrM_S|&e9
zKE)~bCGv-zjvvhV+F@E(p8g;Fx5pzo|KU;HZ0c=;aW@)wi*Y|N?snt08Mps%pE9+Z
zaYq>UXycAE?o8v(HSS8|t}*V-#@%4tjmF(#+z*Vq-MDSW?f)lVoE*CucZ6||Htsm%
z&NS{^<E}LB8spw<+zrOvXxuHv{lK`}joW72{;4K@<Bl-y(Z(HT+?mFmYuuH_U1Qvv
zjl03P8;!fgxE~mIyK&o$+y4L)zi~$x_h{peGww{|&Nc2z<E}C8&Bone+>OTFV%!gm
zyWO~L#_d1C#BbaY#y#4&<BU7gxO0uW(zt7kd$Vyj7<Z#_w;1;W<8C)@n{oReXyP~S
z2;&}Y+;PU8Y23NSU1{7k#=Y6N8;rZrxLb_-fpNDRx6QcyN1FJJJHog}8+V*>XBu~|
zaaS65jd5=_?gry-H0~DTeqh|~#%(ih|AS2Y#vNhYqm4VxxN*Haa!Z#@T~WNEcw%Ys
zqRA^t)T^ew463|ME1tJtd1>*oiHjGMj#;o|`NYL@mpBG{VaN_Yd*0kR%V)<DQX99!
zFJH8vsJNu?f><rM!k@jc4;Jk3(~IY<SXMl)q;UECn37<JA3b+P?y?0-mMti~Af{@t
z!_OX_H?|MO7w3e}S$uxcvXwELaKevWR5WE-QSq`EE!g47|M-$6XBU>lRC;{3(zL(X
z7?`b!KWE9j7}8*epD{K!#+XCf-|R8t^TsVGDW0;lcySETJL#W3sZY^6;a4m#oL4-*
zxUeWjGj{%GkDZV`_LSM9$Bv#6OY)ugXHTC#h9)q3%(&PRV8=gaQBkZxL&l#a#f$o6
z!j6A-R__1Qe@5rd9D7P^Sr1A7T-wg!!bQcgny}M9XUWnF=B_MVQapD-OeXB`<8!CQ
z6i&DPVE-FCZv6ige$xLKKKIl<MIUUxGjg*h#?<md`~RfuF%u`x$cZ@-cKI(VUJ>ii
z7t(&_7ndxJIdUx6@t?b5L2+px4A|i(FB!XV+Qh7wE!g3w7p^Rxwq#M>5*b8euwsX|
z$Diqa9DlfePU}PUJLPA`KfbtBra+_T6)x!2b-+%4)`I0rnZ8g26Jr{}?eIl9{PGKy
zFX&VF*(Z<rpT<A?`Zv9_uyjQX6FEEm&h>xn{Ngzad*1-;@UzF|>C6A@>7}vMqZ5Am
zq=^$JkDJ1E@RUA<pO*7Kl^+#9VF}ZR6{WGwA?@_fEMB%?Zp^daVE^ah8Ee-G8GrQk
zH+B<t`llC{u2?#~bjh+<I=^fDnm%dF#3|EbH{ist!cUIbfD^uWj;gpZOO}+5DOoaS
z;n>2Z%UAsVP}XDkX~lDvtSnykdsP}9K6}yG#YIKMMcH$Dmw=wb_bvh9;U_Wf$$en&
zVh^@I?w?fo+2MN^dt~^@E0+~6>TTri_G98#;d>joD?H;DcL2GC%a$)#JTHbjIlKJq
z@zW%|*F#WvcsuF6H4q+N=J35AeS_uiq+jj<=!v6qa(ZPaTKto;dmB0!ztivJ1}ugQ
z*zw!#F2>-_^?&lpX@!eo4eV+^lgEx3$MQ?e7VPvB{*=WrhYptCY_4D9dR1d2+I86R
z=PoN=Uc78&@z^Dc=PsDn`wFnb+wDgU0x_h+4sWiXv0XgLhaKK&KQUUc!`tmA#^6r;
zs{O<o*p+_Meqy#@r+>CIpxNVROw5X*@I&K2WpT{02g`rj1Zn=U8?e(qZ9-08qIb%F
zHUr<Z6}_6WyIOxR{c8R)t+?;=2Q~kQ-GH6{>Dgmv#9n%?^k<LlOK_+B78TF!eW!Po
zpq>6j#mo9+zz#oqQSs8b%jU+`cwOz6`|tlP{z=)>bEi+^+BZ3-G}!59{h$x42f_Md
z{#`hybYb!D%@<uoul}^-XX(4Rv^aJvc6jIhEyjg#JN)b^qsPX!@~CrSho4ijxOnB_
zk|i-*dP4GVUw_Q}Yy6U4)}kH1J%5d1>KQeDd;Zqj1cb+Lhwp7?w8Kwk0O`vBV258)
zxNz~3(%5f7?eM1k#cah6AH4t1j%fnxgg5Kgqx-mi#Qk%uK||_a-#^E0B0T+LvU^+e
zVf}~o_ZWjlNq_7n?DS8|9y4W1UTkTX1lZxHPneOHHRaUFv0AXhtLG<kxp|M#fF0f$
z|FReNY5k4$o3ocJFP^lds90A_FaOUjEhG#J4HJvT@F;9?FM~PWCKk<>m2c-f)<2jp
zPMkb3Pu=tJ*Ers!iRmD`OkJjB&mNaEdisQz!is0o?-YH^fpz%cldnD)kofba^&y}M
zLU=}=*`vqx(S!*<Ci{O3|3Aj>UiOYDB_{pT|A+WpPhMk+T6rdZ6W(08V>A&Fe!SZD
z)oUxR@WGXnUWZog-%dZ_)yhc>p~J$*6jFN*rr(}<#AYNid~5|646kM{u|<yWV0iuH
zB31(u-d^(64<KT*5E5S2Z(<8B>F3T>?YxLFr1q}EbLZQq(5n2*qpR8K*;TA&h@U4n
z)6K)1SVOD$37?(Sm$H}Gh~Hkincaut4+-Cw7D)W8yr`&W%cIX&OTdIzQTN4w34hAs
zJ|-a;zHdp8@b;}ota&%}XC6KGCA6yl$up;op46wxCrU}b3g4H?*Wq&umoGnW$+Dt8
zWgv9jbz;m$NWY$X_bGOjf3x)3w;o9R^5|a%4|)DMJ8wyBtyt1OVYaLt_BnpS=Pd49
zXqEr}rTI$xk@;^QTaS+4-1_vX1|@#A^vH8_9=^tGBN*PSUB+m^2|u}S36Sun{lwgM
zB&quTL*0AK9y>aB`iz{|X43BP)3V1-nVCJ!{W+}PEe&^g77*!-vDt8kmpkY&IaAoi
z*ZZ7A58wM#xWi{p8k3!sm7SG6w)Y9>A$+eB;0`}&^u)>X?6LQ;ht|InzSpsbhSwK@
z-j{uN`_tiLh+Nt)?cdot@w=@p(t{noZ@pK=ueY8=n(h@Les(VR%4<|l65h4*H>#iC
zf)ZY~ZvK{^-_i)r*2mxS@!J~Vou%vF_8DE3@QY%;>IZE}_~6#jAn)y8gb#ak(A$vO
zUogDA^c#D4*Veb#0^^(b+4&oDFed=v?X9~Gi{%f(v-LKX5TSkvFIzuDVGL)4XXjrG
z0m8fzzC^t_5XO6ZN_ZX}_SSc#KNWsi-wmkn^5ihmbgu~EgHQf?6(ZD=iho64V^{50
zwho6Hjp0nCpGS`|1PSq~!^_s^5Zvn%3I9KipGykotmt)o;U0<KdFUCg_2yi{_ig0T
z)^+@SAHoT*wr=+(t<n4te%X>m>^xqwqI8aIy^ZGSH&{gYx$+9sZv+UF2+ylq=GCh(
ztv9DSyn1n~H{K)s5Z<-(H$whhpu+#Iubw>+o>z~0)_+eSyz}bM@A-|U+u`NWS2X?i
z7~y68imgK{7W8ErLU?)e@AsnVQ6FEl(Dmr7PwOAf^CPwOyvLZL3#8u(@7nqh-E$P`
z4nLb`hf%!zCUQOh>qF?cxCLW;%Kk&+wR_0P+WpM9FX!s>b7pBbK7K&_khtK{9shd2
z7k6sfdF{?|yB|LN+xveBJO4H8+zLC7^Mr<v4?FjSoqNO16T;5>g`M{gJ0B2sJ}~Tj
zP}uq4u=5?l&bQrj&TSR@9zEr$J?~lixBlHpV{VOG@Y9@6#@>9&_YWr@+j9BSJG}nt
z$MaTCsOY|7)f;!U%-`X%tY04bar5X$CMV9Av3S#S4_8haeeG@Ujep_I$yW{^{pk^V
z7hQS!re`;tysCZT)y)H5-f!4}qg7!)m!{nxXFt2Ce9zXb+KopK8aedT(SJHx^D9Pa
z*D_V}&NzKuKUuri=W2J&H0?f_r`^luXt&`!?H+TXc2}K#uClb}CHj1uIiG#GKKGrW
z^_{QM=Zmh>?qxS<_sLtdd(-XOExc2^+s@MAPTio-mp`oCGoRINN`cnb)#>xXSG3#y
znsy7$*7~S7^!c`Tw7YJO=AVC}&+qtLyPJzN-~VfU{=$#i-BzsmLjirB5U0P#v3aiM
z_jvUA)&bhRe28|h-{I!3rhb*?TUF$FdhQPk*Od&@Jl>T1tP}Nl+&S9L`=iad(SNVK
z#4Xa{l1|g%wwd!+iuC!a#ae&1RG<5n==1Zg*5@fp_4)I6>hsYxCfvE2k9t&}ANG{-
zzg+VXPwVqNU()WquWNVTx3zoL2ije`RlDytX}AAp+8zIecFUTz``p*s{plO+u3M$!
z`S5#ven+d}mug<tq0fi^qTQR!cTvU<);A|R@2K4|L$&+Qowd6@NxQG^t=;SP(Qe*;
z+O<rF*lT}%zUmqs-<~Jy^Ak_iZb60S*Ui%Bx16Qjv_kC`8~2rY`uxjtw0r#`?e4Wy
zyPL1mcJ5uF&sSZq&o5h}&wXq4`FA(!b7?mo{w45lApeH)FNJ?T{;lGl`Vh<SdcfZe
z+V1dbla3qp`L;*&`G4xP+f}dKlv}iZ_#68Co%ggmtWmqGZqxb)pXu{{1G6MGafc>q
zcfrou%^0TLKkusD;k#>h{9fAKzOQyKF&*TX6ZH9jG1~q2IPKnevUabTs@?xi)9wpJ
z+Kv00PEY<^eg5N8?b`kBPs@!zmCE3MDcQ>k<&}&Sc}kn2-polkH2g>j`v1MZQf4eI
zDlGjSgR$7tt7pG$Fcy1ue&wm=|JD5dhQV0U7tC+Z24k^j=T|MB_K@LN>^b%O8wO*s
z7tC+Z24k^j=Qn$751FNL$70XP?{654#a=MKJsXV0o}FLrGJ4E#EcTrI{)WL=>;?1N
zv%y&G+4(gOM5E?87JE*9f5Tub_JaBC*<dX8?EFs3j+#|9RL5e^$?tC%jKy9szdaj_
z#h#tt?6I?Y%y2CBoc#WV!C34C^V_q*SnS#Poie(|?DlQE`VE7zq%WA?o(;xg&(81Y
zl9C=X9E&}tet*MYEcSx=?b%=~_MH4KEg9F-1S=MM!Tk1YFcy2R{Pt)t7JGJn#}v+4
zxMFGaX=N<-oc#WV!C34C^V_q*SnP%6H|nG<7JK3Ojb<<wdlC7KVlWnaVfl?ZX^X{P
zcz&Z9jKy9=exn$S!Cuyq#l>;|r@b$ar)vBA-=;F9j48=6Wj->7jG1Sl$UKD1GDXD6
zP%3j}NEu3|BC~{|!i{7oGK4fJW2U0Q`R(njbIYlI_j{lFz0dPc>-E~_z22W;O=s<W
z&R+Yo_eLVnAT?WOH%QgP*3Ql0Fa*bR;xZ^9lu;o3fH!xPp}sCkQw1frzVP*W<o?n1
z7VGu66;jk%w9|K|Ve5;8zE7|}{JX1S>uZZLaz5^WT3e$<&X&GEhlBmMter)}?+;x&
zi~d#u;d&b(w;g_SuH}3eZNVn!WeSNv^yXRId8E`F4ijf^I1A8rp71;qIXVAz(q_cP
z6JY@615{_i$pZoYsst@&oLwluJb=#uE(1iK^ZK(g;!rsMj{wctaomsthw7X-l;Xl+
z1JIWPeF4xX0sRC(d|fHrIKOg$9RM45;p8N|IF#qZ;Uv)W@Zh*3&|e1nS%CQR4f%0)
z0RlLD4zN-X$DM_6h_@%iUyTdi?ga2xLjSy+Od$W&{35(`gRDoe!W)A7@Ra~WX3AE0
zLr@RM@IVS@xZw>!!eA6+T?l!{4T6NNMAnPY@P^=ic>6w~U}6Jr2oeT)D#9{8ctddQ
zeTFdN69&$3!5e~W?}&u)&jfc2f2kLVTl`awWZ;eo1H|8t^`{>0*lvWtXhb+@aK{u8
z9gG_KI;t{A9-rWj@q@gwj-Kj4Jstf&!)+Ad*T*3`7=H+%z(9})qJvQ%!F36K&mG`|
zV~sSB9q91={N_py39b?HKgZykZVMy?h|)J9$e|!hyl!3R5aBnSzLE;C!h<5D1+qUz
zm0=)>H5~^2ZhwdwB$CAW5vl4CmWeMLM&x@S{4TyzBiZ4Xgfniv0UUq#|God~6xI4E
zvfdkxUr<?h|ChCn=Du|%@O1l+5=Fi4njNsmFai!wNhD#o04D)l25@*fA_=1fI2qtp
zfNucY2k?!6p9CD)C*g!i1ROjU8j}M!CD7LZP6c=e;M9P>1bh?VQ-FhOZ5S-zn}L2)
z1FpaD?tvr>8{o8n3j<CExIEzWfNKE`o`a1s0~|a@8{+{ucvl|gIN-?f3r?6bfP?2>
zV^RPI&;7>S0DL>Je+W2u4mf52aQN+7NWzQ(jvVI@{sr&@9`Jp|$2{O=TyIZr_%|P?
zh9F8^+`M7}h=CPr-~E>LGsd!b>duonbB%K2`}<E*4=p3V2j3^e+R@V+C2PD-MIK-H
zcgS{*9ID-R)D|L{l5;*bAeH!8>+W+b(NyY_^E(FbcFC9C(D1z)<KWCK-RwWNbc8NZ
zI!R-b=I4|vlb*x;kgTev9tYdlE~`7bjFgf4vM3c#k`<4om^>RB5L3^6>$G^DKmOAv
z{~1p|&s@5diCm}dsqr5F!aH?kWh*xgBTpAP9e$U-bmn^Mgfk6$drp5qDYfT;RsBns
zI#)eilYNiGj$N9lrx_X?w0ed$m*~M>th;i>%+IN2!^*u1DwN?NF}D0M;UVm3hv@tG
zTBGB+EoUBM<2em?roDT6#{F^AGa;<pJFAY_l*fYZ`!qWrCAT|`_QvNsq$nRUcz=1*
z9Ve1hED_~(!$WB)4@yQX@)b2u$0ow7T(Isp1`b@J)?|pPUrj&9@s@<2+uTq1@z{m!
zr7w(QC!BalDmvr2oY{J>RO@|yQQpF7nS9ae)>9*W8Bdk;J*i0*Bh;GFdDjh_OIQzm
zmU`da-88GYqMMP$sBom?;j4|$eRKu|^jHVV>IV4yh#dP=pU$04x4hgxqj=?NQT0wf
zf0t~j2%Y_EENPcq%{UF+?#jDf5$`@;;}_gDS!XhECC4oTdrgWcDSN9r7k_FZ>#8`<
z)1!})?C+g3=uo90lF6dqMG-7H^|JF5I*(px<Kb(K5zEtxN@%}fe?5hS6T~M9+M0F}
zB@i)nHXD~6KBTzlFs9JP{yCgs(|h3}iNLu?+0fWx_WJufiI<3o=9oSUYIl*IVm5SB
z(W;2cY*rATSIJ|^uj6M~C~#|QdOb6SNxpmb+;rE5eHP(!)b>ZdTwb~KQs_QOx3F7j
zR_4yh^QRmSRjM~t76o3gFl@eR|EhGhxLnDK=!{~9VS#DSGgFDo6qTy1y}ILD9*C14
z)biAM{=ls3Mnd&uMp$vR-G=)#H^u4&8}|!OCCZD8&eF=L*JbB!TdBCFtNlfGPL(c@
zhU~&K%dpXQ@9XkxdZYY{w5t)@8y_<>w4~bTrd@Bt&S%JtA7AxxroY3dQW~z_aj9)f
z$hO1T(Vc?LL}t5}3yL3l=?-|ehMbf%y4RJn+&e#PE!Wr+I<lO3t1R~Igo5e3$tSvr
zdsBs466RPr75?Ns&lBHN&~YeSri<{734V}1Bs2Q{K4<r^^)!R)#qkehh8YH?cbu7=
zpC*h-?;gHG)>XRD#j(%zHE+Ur@zNywG4$B}WEqoZyh4g~Y_a~RgjoN;>E2J=V=hnL
zR`{EvR#GX>GY1?Y^LE*L$G!%YxyP^cK>qSwzk55{u1`n0cb-Tb7`XA~T*cJjD{U|O
zd#5|9e99%;tf;d5N`1-o&K_T`>@)fre%y10QgJ5ka@dV3wxi6xM4pBw#~$ZzEc+~f
z^6Hz1<&JwE+B_xS)=!gqBuV;8jKpR+_L46|9F;z;nh}irxosw{3@yVt+HCFAT9WrG
zUY!zrur!@2LlIo^<&kDCyRNW@<?iK@mP1AjpUeEZv+hhWht|4^aa9aWbSvbq^k8|d
zX@X_MS|!w(Zf<X`lrU3Nt8z-(SR}}-OJ}Q7m~f2Npr%xp<i!0puAz%#0b)z}+fEsw
zeEP`c;~l)z9>^Q&wk~*UhzMhE2`V|U*OT5_u)a{J*8H$TRyPS6yl&-@N>2Gl4Hemx
zEgD@d+s8FO_lT{&CHA;jGsi`e&o=})S!jE9P*Uk9pL)^Qcx0yv>PzIPMj9`4FO^O(
zc588~>dIN;Inq3>Jd8BGYN(=)w-nE+2D@UwY*_N84{CW^>(!}Rs3b)0T|o0ti+;qk
zG01dU)lx}3-1x%S%))27iLr|)SdHg^e|_8$nXQLV?prL;J@jdx9b)VxH0UT=*+Ps0
z=j^f~xhU>QaSVQ8iM+wm9!WQ@l2#zrI^wg-^R&|qBX^YtYH#QBRN~R6X|9iT*)WD&
z><gXojI<SFjWcI^U_+@VDdBV>=Pem=@RO#U&$y`-3Pug>qKG;8*%T6jb~~+vjVIeY
zdz#v;`^x0zY4REY{=%n=AI~#Se<W*+VZACH>#wboOx;j(FI<}SdTM}{YOOSC3oDb!
zct;7(IJFE1&%^l8ot0UTPBc>tAMc67{3^oi9KC)utNW+!u4GqU{In09S-ty@7(tP?
zVwor>dSl{G_ILMICuWuM+z6(1*~XXXk}mrW<6noJMyU$lZi_l<qgQY>eQWlH2abx&
z2MwAnEBcDghnDe_T#w%;?<i1T81ITsK9}EfIfi23tT^`&-A&ggGbY<)9%U&he-v@u
zTKu7Mj(gYiz@p{Nz0z~S<7Z26h1t{@B<d0y9H0rkbwq7v)4|DzmKaHK{x>u6#>eJ6
zB<UxtWp)XRR0``%^%kcaG>W^|h;@3|X{8AVoL+_eL>jVn)s)&-QGqt1F~R%zLNn<e
zGhSTsXXIr*+{S01!^m{7E$?2yNq*X~_Dod)76zd=K1)}qo7A0n8=D*@sdH&MsG3I~
z_M_!Ll<<8V%BhohvO6I#VWRm&k-*lX+C*)M&gM6~j#&8=Vc#dL1(v1U)QRFpL#*yY
z0`&eVwUuwDwwqK<9C{JL?K^pYa;NLm+{fuX`o|Z=Cxk5fLSEnTZ!GXXQ^0U88tRQy
z&b8OgT`D@s{PJd?O`XN)oBjxA`Vsr!F=un}jtABz6YQ9eWA3r}M{UXk?%bZ))Z2P0
zK+ow>K>Y?%FP$sJfvbPK-22G&rCo_Y%;3C)^d0%SsT?<T$$<o2{l3_nsD<8JNAK>v
z-W2-Tv+22U^Vy|a<2^kduU3Zj3QI56VS}Q4Luaku2E?DQPug48!%{K-<=!*38a~$R
z@cYiAqJj&8$>X6L3|C7gc^L2dB^L`YJx*k@^2@zla73e>aYMJt;gr+Ew9cPx(F)r?
z)AL-qIX~TLx=4Stl)va<-4&aj_Pv4%re|ZYoow9CnQ!ICGQJMIURfo!XZ3@_EZgS9
z4Ofn}j0u-Ud<deT9$=X~QPd)#^tK@LQ~RAkJ<npIfDaY3(VPco-__sE?tz*PVQMSg
z%l#r;o<tpQ3C$o{p!Xxus98m0%5BMWVzEXg(bjLQO#{55Q+vkx)GPX2>r9Tj-1F&i
z<#j3R9@s**(>x$Fth{&C&*yfI%)vhF6Az(sEPoYtYU=SS8waZ$IiJ+gq(w^VIH8$k
zC5)FJ%7U$<UnJ8n!m~H_p$e5={>B-4YV`X)$?2yawIXPiO69=(>9_BFj@=AY9!R~M
z@-AcBNc(=duh9`fz5)CNdQ8HqXOm554a=o2tddwVEw&1KGcRU&YIJ67Ey<9T?cF$w
zTFS(*O~1m9o}68F@;-i8aoFkX$_y(n>CXH2t7vKG>=y%MxnC<p*7uk-Q+^%3F~#)`
z>pnvv_BAwWVWHBnbg;>-N<_|~CMK*yxheE4g>B%{I~JEL*3SZ`s0y|*Z=w_%scR0N
z8_e~(rFP;*ODIXab0;Z70_`3LA0Bd6xgGXFEzgb$*7(l4ph-+<<_)6DbWVq#d;K_P
zEH$4oYVjVQ^m$Dg<1)jMU`{UXW>(jC`CjcJh5OB(=sfis&#AO<tIu|vJ=UBOnaJ}Z
znMA#4c>HofjGhtuX}jUh)1xktgZsD@)G3d(=M+;vFncIz7ihFAE!&L4ebWZ+`!X+7
zDtw7(ur24tANE#0)8e*vP28{kw3e&-nNhp0@beR|!()g8)5B|D-54=tss7ABJThU9
zY8VnL$|33x@V}b(v8-W0Pq->URH0<dnZ%lv@<mRU=YrWFQKbWkdskJHSo@B&p~B*p
zBMIjZDoalZRL2zA>$9G}Pxqc_KGOFyTkzgXb^<5;$U2@LH&4j6IZ;Pz!xg@m{UX?u
z{gd7G$}5{G+pcMJ_iIyF_av#JuE|jk?fohe`mStbi*Lg2D<pdw$@^sGjV8jCZhidX
zmYLV=l)K3~$c4M>nQRPZwB6Tp!xg%5J<$smQkz0L3+bfO56STFpjf=L@@faqcG<WN
z)rS6!+TqtXAB;%dHBUbxwbA>J7%#u8k5ej-Pt{XnMPsgJ92&GtsySdDKT$7O9EBbg
z;yRZ~QE-)ZfV)fSv|xNWZ^S0H{q5za{A*3~9-XOvIi@?_cW00JVot8xpa8jCW!W;1
z&Z8B!lHrOTnS+zqNjFdK521ZUJ*6ud8#VRY|0oOGowo6*k>qB|eVePXoVy}wc3@9D
zo3DFuhBI9<?90*AVHvsUrMpBj8{Uw|?K1Y@?<U?WOI|oOFZ$v0u2VZG7(Y?Gp`xv&
zXQ~s@4ueLcHVG@8EUyUdr7<quJzS2$x(0af89bV*piH|XGiqj6$u&AfBJI#-+6GrG
zH`icoLCOjnXraT`;$@3yl(rwsDn>gnR<FW|p2^@%Slr{?hsf@~YqF0t>F*Vv4lq^T
zy+fgpwwy`dA<K2A94)Wb1+y82p^a~L_m?F^tLCzwWZT*Q<ZJjCNjYUT=d|(DF;@N7
zh>J{2M|U5y7#)jY>tjgMEg9oWvm?uDwn|no*7_1^7w1*zck?zjzp~;$+9I}eX>C~M
zN+0p1UG6fHl&09%x1!Idd*}_@mk&hdSB5rL3`|`19lFd{y%^{p!9MNy`Q5X?o;WtS
z=FG97)3s7)c3t<4k5pp=j}dW*-ZHiE6HIP2OCF*kEf{=Q#`5&ggG$-suP-u8H8smv
zhxzTa8PhIafLcw%97s)zs+n6QNX)d0scV%ud-S!c8oz4#KE3ZqvVXgHh;13|L@*f>
zJw>;PjYxulJ(AtD{a$fjbW&=8=WvLna;E!SX;sbbs(4<G#%T+3-TQUW$2Tr}k11?@
z{+yS2{IHgp;{L4$iDV4ML~jjj+DMzFY$G&Ye=Jn*956Z1b|sI$q3jh4{nv4eFNJ0T
z@xvicn=%SFk@kyi#>}u}HElXQ?YYC5MLKVfHHt<3-Aup}Hot&ppRW<cZ3vxwaLu)}
zdDp%+*=w|k<a`mNnX;5bY!BwHO3CU<dh2Xgq-04nc&Yl_Df_M^c6NyNWrbh+#sQJ8
zJMU!Pr>7MM6_o^etQrr}Q>iS?PTST5PE1@G{TMdA?dzcOwH1<%;rAK2;fb`n6q<V-
z&7{t5+tXPxRT4B3#Dx{3vB>dbZCO2ITEF;5NZU2K^RsfBwQ?kARP;m9eF}1$cMotq
zlGN-ns?_8lm;3Z&ygk9N9Xo6DuA;kyW7YK-%N*TTY*0{5-zru)JJ+eI?^%+rJ3K%7
zNwX%GGi*Xvm#vMYr*kuisJ+8(!oP^qmm`g<`--Ly+66YtsZx{{lnC-J=$%-U`J=GW
zyIt==a8ey(tB0Tbf*FbGi52He@`x$ph|O25j8K!=9O9hJH5Ae5hMs5nrS4m8C+4ZA
zwaQ^vxv?a7YDR6_l1bT&m-s28dk@A6@~_40+Meq2#i8g@^6Vsoznx%&u($rMFIB<A
zI&_P6%~el1_T2xnNY#uk+JqS)D<{%;QAXuq^@@u9B`JF3MyH$+%ax}m=Z<cn>aj<Q
z1!W{eRPz<jJ5x?N?sUwqUtmb_r*~D4c=Wb#Bxpk|J9AFd*0;MVABIic3_p_It4IFH
z+%7db*Gm~Q`24GUbu)@r!}2a?LQ@UHU9mF~aXxi<4j~ubSS;G)rAIaEXzh-Er9E0)
z|3n(4=0lmZJWlhf|BAj`7!!@EzNg2dB<sF80Xc_OVWsyaCo27N7QTk=6kok%HaKu8
z4%>PcyMh`UJ7gkB<Unt5yk!?k>HWwGmT@GM0-F&!`Neh_>)>>sLtxRfn&#9blLj{%
zH^;VxmS_1c`uU72<d;KPbfdNpMMdA19!bPpgJeBQ708D5m1g60mlf_d)O}@?4wI{G
zC9{Y<b-c#}TAcL7EEj*sdfAXK9m}bH%_`%g!ie@0=^e`+32&sU`0vS+$K|};;Awv1
z;xG&S&=&eog-bobSi19HlN60K&(~YD&S>)_9_jY|Bvfd3GE1q<v8T63I6v!B<#deC
zqf<ImT;m*cC+rwrWl(dkvIH&mFD#tfVKXEA^gXK3OZ)7k`rTLOYgZaKZ)8ZmtkUu-
zsXOfIq+LoQ_q8-bO-kDxBja<oEz9$Q{T69RFSYWzbtf5;f2uWXnYYQhczx?LG_ln|
zChLcF<o%`=R+G%rWw*LCPK~*|%Ph#5Z@0J@nkM>5H8<0=xSN;KaKhs)UD`3t*lX_$
zU(2d1m>L=D?G10pjkK>nd{y_I4wpFg#+ibX7RIwa^Db9KT5ULsxY!$0_f`!w-|Y$@
zjjVVjkO?JepKTDfcpS89lIbmfVX#Ow{rsZ)#WB-#*-*U@-PY-Qg^L#)Lspsd8Pr!7
zY3;7PznGI^;XN!~Q~$nkV59C)-XSJQR<nX@hn7y{o;es*#k(xc+V_AxZbc~SmfF#z
z@GN1?gDjmjU5)zNDK8biZn$c;bm83uCU087V4HlUV#2FyPT7k`#r?(o)y?xbl!M0S
z&i8$ixXGS5u&8<14GjgK9o}}~(`zwTqHQ)}I<oo@Rh~p=g3MX^b|T|vPo=g+6#Mi$
zyTq6rJF`u6Ia9>kX?K2{PHmq>xA2aXNbh2=Sj!6sQSJ6Ii<@QU=T0v*NVE6t;I(eX
zdRV?Odh+N-yA)69h1=$C^3i;AZDYkElV7RJ#w>z*_cWvkKG@qm6HIE}U)|ZioSJ?h
z>ex^tS^f5;E&I}EIdklr+%I_%X=iq%@oHUm@ZZ~e-u$YQmD^}zPVVD#j1fD7CIqw(
zwHPLqUbrskz_*rNH5|hdouVa;gfb!M0=$TctlJ?QvR;eN!`UAa;q^V!nRV;L5TPCe
z^kCf>n!g-hem-cwdRi|$#8hdee*isLM}`J`ZLY66EUMPA3keLyCK)aPJy=)9tw|!S
z0s_K|bV%F3Py67jMn;e|WDFgGm*!RB-1-!MGMt55tx)gAqc$s-*|?Xe7kX<3d;m27
zdI5|Bm=3T2U@^ctfR6xn0(=f|1mHNpS%8ZGi3f4@Zv;pU5Z`KMz}W%v0~7@)15g_v
zL_|zN3Krp!GE9Ly6X1J*ibJ@1GXX-wIIaOO1>lyKKn}1TAoB=L9tCg)pvEhlydL0|
z*EsG4(DV(CF99@t3(5hA!Y8=xYx5H6&ISzO*Nz{aZ}a0%$@+{MC+-Rm9uEN?4UpN+
zFzE2+D6M3nVa2n~S<!vcW7U_bc$MM`4=AdAEj!MoWB}K}2`L%ju4es}{a@*~EaCc#
zZ{=UvqvRvbiJmmnh<|)wyPj6)j=!@1xApjT<MFTR^KQuaP?~jKt&GQAbXmz}pPzcm
zn8~SS_2hRUJ!a&}TrP?^BEzm~dZkw<3eG&FK>0fNZ7$$^p;O(O(s|54l>fPRh^fKj
zK>aX^7CyFytj&bS8}dRu*&<a&<ru~snu6$C&YvXORXsM5>PEVdcwH~?G};Yc#T13a
z;OmtVkR-GRl7gfmCHNSj45`3J2Q`Sx$Uu#l-~g!Hb9yp+qCz|Ct%AH{>85;qU;hpg
z!*4FdAH)8RAKv!o(Fl0$H~eq3^;>B_=D_v39~D0w`F~>ak3`@~*-y$KoC7~G`A4E(
z_xb&%#}7|$;800zaFEz;X?^h@Rr3?)U)LOVZ>Z4bdbQeBOhD5O+oJxTIR7KjuWOe2
zLi@)b`vO(-Yi!2!2EXDj{QslczIXn0%}zrda?gqRloGTu_5?rB2A6if_x)%2U)TI^
z&oKPl#{WzD)(^t}L*F$2ogBXAA4}V|r}>l4{AKkrVV=;|+SMO}K7MrhTasVbtl-|a
z&Bdilz2ssLmuUaqSAVP6|G@ayH52|j{SONJTPDArVZ|P3GR3*Zec=?Ur&U#(%Kuie
z|AFzZYyP)q7~wziZ;g$eow<A>cu2FNpyp0b>6TwN@tezkDffTZ=YRWq{_zO1e#rjq
zBN_fY?%&>%@b&!L<B6~5-=3@Zz2x6M_TlG8<Hn&><|vF-c3f=?cW6+-`dRYN8NQy9
z)}4hRUiB*H+xb`g^c|G{dC5O7fi|2hoHILFGmK=Q{j1;L<DXmo&!zbO{MGpl5&nw=
zRsEIyU+EJ(OehrGyJ%yjq0C3l-g}q#H)j`d%IhSKX&!F3pVzc`@T~f4ZJK^!icy1P
z3Wq7GANTB!%mEz!Rr&w6Uex>K(fUzGm9v`M8IbFp@?d7i3%epuDTR59vWd4n%2roa
zmO=3zu=Dfq^%K@{_OSK#M2Vxt(R+lX{MLjbd^isM+)@%PCM1Hhlt3(D{!2@7yroEp
zh$wouIL=;tojqKH6k1$J6jUA}A`Tm(*GyqK92@L&#K+g$*VYa~JA1(IY4?KA@OwHO
z&`SF>g?w$D0CV#2L)-Z|yB!vSAL4>W*b(F@KIp@N9zKEYIP~?#Y5X1Fciee;tRvR2
z&KrLHI^qCwUT(ffmCo>|uR{R*=?D{8=Lz3FZ403tj#xXwZ|ZZfK5`iL#WT22dwXk#
z0DA{7Uu(G0@bi$@%CNTe_O=a#(Dv{%N`2tw;K0Qmc7<!Sb$7OhJ>dt~ARp+pnsK$*
z!S^+w?LFPy9Xx#h=ljz4o=E&AvdiH2FDYV0m_d*f5P*2bH5u|juzNvB{3Y_o0q<{2
ztOzp*G6n+F8vFJ^cn;1EtG@U5C01NB_67c2YwX(xp+7t&pifw=C%*m^V#PJ%6d*wK
zNWw3{f%sOO5dK7BB#|+|`*#p4!VH2sfPfhUv?6h{NZ;}PAWjrsv4G%}g>U}vX%t}w
zLGNkS0Lmk1FyZ(it50zJ=AZ44r&nBaj7J6*PHSr+Fyh;fZzmqjVcqI?{wWNKumplq
z7}fx)#{q=2A89AP{Xh)4z!{{8`0`8{71vazAaK@ZjeV;h?~m`lFRcIG|2FWy4g51f
zfH2a2WGD&!Ltq&)CP@2`WXi4xa1GYt_HjAfC&6$+fw1^{e+=-)u;c7I2>#WA_~Nzu
z3lNJ40)GQOMMMl4AU6}hDW@BB07w7y0~9(7XTGn0X;phowX}-!1JeL+{=*tnJn+Yl
zKMITUM`3aPMq7|??OQ^9%dX{8;7_D}yua^e+=-&^W?W?Tg2j3V!tu)?@IT^)^FQK-
z^N$uqO8=Jd-ydF53}?Qte<9sqO|_7Y8|iAiA;9&eLC}3zj*Jn$mq!Y{)+~<{;{2n4
zA07zne*!CzGV%U1z<&n#<4VDMf17`JNjHH%RD`P^D#CgGmH!I@|1H3O3-BjwFCia+
z{qg%I(k5o$&kX!uf&s(tA9#O!yT%FXU%G{B|I#g-1>PPh8%cPM#}BaV`|*Q{asE&-
z&VLC%uxs8w`Y#dsmjnNDoWH>d;0OS<o<gfIN7{m~#zy4mnuUP~F7n^h60gBIqHyr%
zCkfnmr2V`9l;ARW|62rdFq~^Xh-zKmzq7@H`l;~_Ku16!#RE!eDEL^r-(U-J9LFji
z(A2bnZBuR6C{_{9<2I_b4xu0tQc@yfobtQCeRJe77fK!|C0$L_0cCwdRZ*0Ix2KDP
zy)SZSApUL}xGW_#m16j}!R-aE2;|x!vi*+h{~g!=JFfqCT>tO5{@-!^zvKFU$Mye?
t>;E0s|2wY#cU=GPxc=X9{lDY-f5-Lzj_dy&*Z(`N|9>~GA71){{vS~uhf)9l

literal 0
HcmV?d00001

diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/fpga_prog b/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/fpga_prog
new file mode 100755
index 0000000000000000000000000000000000000000..3227da590a0a516dadac3e4b7b0f5ce6a4f1fb66
GIT binary patch
literal 17536
zcmeHPe{@vUoxk}3#26+cBI2**iN=D;Btbw#p_#zIi-#Z!#C261Co^x7k;zPU=8Ys;
zT6!X!&IVe}p4MtlyN9)&uIp)!=-Fdg)?yG>tcz~!vX*t*)2yX+2Bk(sj4m?!`QCTG
zFYirex}H7#GnbS3-tXu8<9_dtci(&W-OJYkYgboRR0vL0Vuc`X{e>3Nq696=RR*L*
zEEN~v_bPFvm<qmHVwSwcB9K~XOu1%Sqwp$FvRhhd0mbx6rN@*bBsxXON|Ak6StwH>
zGzpL$#p+!kSx`-8m<kFAsYX$@qwvU1Q+ArNV>+q=W6JfTy3yYzRlj1o3NlJeNte?4
z-<c80zkG#cC(wH>STJR~KZhN~`9+ggDQ-~Zm1~z#6+cr|UC|hibuL-d7>_K7#}b*o
z1$|4GELgJ0mrnW?%6gN3(p|HzLzYC%s$5C=Oz?z}y!zdDKX_n`Hsf@@^T!XTK6&69
z58u6wZ21q_FP!?IIirO3!ZP^AGWgrTHT)GP8jq#??<|8qPzG-=gI`?+*UR9`%HaMo
z_?9yG(`E2kW$?4WHT)H)zXDLIeIjM>ua&_sDudIwD&_x$GB{0RrSzv%l#c)J%INPZ
zgZ~Zix%iuqaD9a7a#$jazL+VZ$zCHNqNWj#i{6Zx7QtZJ428D@!`)kg(NIjH;qFjM
z^rm77Gb&QX)>tAUdU`^=q9@&-2*biir4q?tJQ)s|u_U~u4P%RlhU3Y!A$me_2t=1*
z8i@x*PbNWz(UcL2h;-aAdSM>!3k9RGL?|A6$Pj5W1$W65a0->8NtwZ(P%I(R{poNr
z5fy9JwzaMdF7z$3a|?ZoMX+sCdoW_8jILPPG*X+|SH_bGV^gRzZopSpPcor=1ufN*
zifFD%`HyKOW&;Z;#@&1cw9s{e=dYQu*mRmnURGG<^4JCB^9|J@Jiqh2yuQv7%vSR_
z<6ec=G-*<SapsRVS~$(IJm-?)hy(W!pi<6(bF3s9b>OpE8Fb8ntEpc~=P7&|II1_N
zCI`;*D#?~QaQjvUyv2b#@1ME@ciunNJ8&wS(_Idn+lXZMJ8*P>ow^-(t&IxN>%i5c
zhLrX>aMdLe-|oQC;dc6l1FyGHA@(?MnoBr6=D?lv!d?e{F)M>U<-qBl#c7`dzl1^1
z{SKVwPEJD({89!%Uv=P@Iq+czez^nJ2i~vI2d6B!P80f$A+xeDtPi|gbJ*4>EN*Sk
zM4@37e(UG7AV+*R$@3!xq=se0(@@F}OMW5oG=%a)lE0pK8anxXlAlX_HSv2Te>w3q
zgz|eNKZAH0I{EFAuO*&_Oukq0mBiCf$=@&e&#nbeLnOam@~4TXp^<Nq{7K?zNaUL&
z{|@mq6!Mzn-zJ`hK;A3)Ul8vhUP%5m;%O-4N6!Ojc!_wr1oI=3KR`SUiTtqSpCg`z
zLVif{PZLi=Aiq!YPY_RCpWiF_?-5U3p5J5JNB4l2srgh}_RahB>^u6viP80&*6yD2
z8tS6&p1x6%<rQd&!X;7oI8#4o6-kz7!F1@mr+gh$zhz9%{?5D%UA&A~bn*1fg^{SQ
ze$FG(|K`KgtK&TE+emTu;#TQq{(0Ezht5~&*-`ya?#p_`EBc$~&Dn5Rp&Ztc!*c$%
zFaPu!O^8gRKCt|kl<S~)>h!_oZ-dKCM~mik{Jb*dP4E>I&UOmyqr-5C`jGnOd=wg#
z!)W#D*==Ll%$aP*=wRTC9v;>Q17mu{OM`*YY^4(!K2Qxm2kA%89?AXi^Fm=idH(rf
z<w=95TsCteq7PO#%#&(?vF4${zzNH1POlgq6xqNT@;cZ)7SV62lX~WqoB?mPBX4%w
zIchfyx?CLugMo7mV!IGKhU&jFRR8=?_7zCmA(iFl+E}HfNM((!aviH^MJkJJl`2-j
zP;?bE&sG^Zr((evajDF)Rer`QXeO7+Ok3r9tWsH|a-prVl~phexV%)_Dw~uFn#Ha1
zF)m%JU79VGfsq!Mk3ZN7URKat3ct4%KKLJ5;eipaOW_?`;SE-(aVh-9R`>}kRJ#<$
zi`c~ql`e&owuddOP~lQIVJqAYg+2DzX~7^ou4gmD*^Z+}0;6ahaU^ht2*%96!YFs(
zvqIs;KLe243rjtFXur@PeO&+KQ$0I8Ff=oJ2$#U|12hF^-=LxX3$)XV#OD4M7M5+~
zkJ>_4**<F9cEaLF;C&KVF0L-=!kc}GiqF19B|iac>w;;ZATis_z{R6NqFi9~z0HGx
z_jj+a$acKH{2$@_tCs@bezX!I)c6#JYVOrf3x)TV40hncdtY8V1)$a#nNE!%t9BSU
zST>Ap7h*a6)bHrPEHSWcRG78<kt^hXixCT-r^%-YpGN{?C{W}Bz^y8+gOiCZ>Z;Pe
zq1LF<k-#~!rMX5<Im4J7>Yo?&2Zs)g%+3bRk>D{M^+IDfW!?tN&*Fk{g~}p@n);s(
zImA^iF(wbltXQ8w4JO7~ojo+zaZdJt?EAOu(UK~mKVhi+y{*2og!;gct0`WFvTO>+
zps4%5&30R6)LCj!)Tp7bWPB*>-C0pI6yCuzK<;OsU?|kP`Z=>x_VKNQ9Y@jVa(p!6
z@xU4%r=U;HkL2!0sdP`Exz}gQUnhT?1_EQ%gY8ETbVZ}l?5m%gJoH(0_SHjUbLPL4
z9o}8HLv{4ypM07f-Z7N9%u&)g1Z9;pAWIs%HE^_k*E4c1J|oLIYiop{VRhZR$Q5^;
z>Iy2$x@xaPOIqstOQ@H+&QFfXDq3^NM%)`Qm%M<vWZ#j%tK=6q@jgU@2H0u`b@VJk
z*?q|)5?{R25)azqpFsQ~CT)?s2DyQ4FI1V=!~Sbf$W@T3tmC-5ZKO|S<u0b62Lt=`
zfgwClii5bu=)P+;)+<oU296GFJ6g!B$Q}O}aSQa(2ht<WA8cm%f5wjIDrn@MV*O{R
zG&vQ1M_Rh4!UHtA^z6Uu^AB4}y(N?o-W(J%7&zLN{ZD^(=$~jZIY5u6RyDqlvh-}=
zxIVD$cp<Y4dWiF<0CRIWid&>x8dqPk<IIqTV2x>{VO7eDwm?5z4NaOLUxy0ZkHGzi
zKvTSaMm5C=Dd47%R<fy|oWcWc1{LuG)_;=p2LmGqsGSeuPr6^BP%4V_vzUvZMC@<L
z66|BdOeMW+Acrt=BGZ&x&2BeK0o5&K7yLMcxocVD2568Ung!cO;5~PcnvlF|RuMAp
zJ8bj2fpQQY(&!+|93b5H<ec>(#&I@q%<8m%CiSA5oYiUaKBHSV8UtDbV}(o|BK-)@
zF1c@iL}5{9)skr2F_G~=cA8{;ki9o+FmOyp_8A~+R1Qg-V|d}w@7b)LH~oL%zq2j-
zOMizS&)N+uX30nC1w=Rcv!AzR&#s+MPoXvXq0g&wFP=uMJ5HHe^MCR4@7nBVYqMup
zWk2v2X8uYaI9#FM^6Sh=dZ)T)v;SWIX8(Qu;Nd;v&)Xm2RZIF)Z(Xz=K`CN%X1cUx
z+BM~pt<ezCXjP_vUi19M&P=+0Ueo+qr!a!m6c-?uX|zzHzXTfYHo{xlA|)h7DwHne
zr#F@CN`-n#SeUUMBbhNvNW!VG3&mPdm!ZiOBg0*`C5a_sW=Vkz*NAAbQdSgkip-qt
ziPo}wW_shvP(+i}(qcVbmYTESTzaaSmL_+O?d(A#6^q77hnVc?jbjlFacnTshH1tU
zU0QoGl8GCdqo22iVy4xPnrb)ANB?B-_|Zs#Oc9ltNo!_OY5ROWjpFcWELyHL^ig3L
z6E|ubX&Fviy?%{fTOALjyEW*OPl>2Xky~0a)Iug)H8waJ6XsMJTrTo0x~o=Lo*Z^o
z@zSPPx5?M!YgQKPH{7vigTK9f-5L#TmBwnL){xd}#lq%gO*buTzDf9dQ(E&vZDG?w
zm~>`h@rV`)nFg)^=ryEkMbK)Ajx>gf1aC_j>1Zr&tk7<YZk3r@4Q(PZjnev+ZNw)t
zsj#7uf@XC2v_`B((sk0<8;&(bj0a<3Bi-19M1eFR=0>(@f<Mc%bZ1pP8cX$T4W$gN
z6APcIe(9HnPJq@vwXNM$3@y!4o6c=W&y^K`f>Tawu)U;UcB{asLbW2*DOQFOUotg6
zExl6hdyJkW3bDlK<<5T7NXw3|RUR{m1rywf_0}~>Ma0rtSdBp0fJ&rU@hrpmr?|t(
zh#|YU4}BskuBf{8E@)G|>i$qDJPG=h4+@2&pu0d#&__oLg%hA7pw+km%>S@ZxE9pF
zoVp71Sv(FzK+oYZY!_%8kI~0KY2kxX#X}oJMW46gin?hvdn%@R3BMA5UiiO(6jUm$
zFT}Nwlm7ju3WZ+y6&~+u&+OalFWg$QU3~fSTd%+A+PUO{>{sFMDbxe+0d^wWd-3-)
z%DbIVzsI|?a^>`?l>tO#`Th#vW01GG<g0A?_kn*7`E4|1vwhXgm83xaU%=mGxJ9h3
zcFNaOlbquJ75)NvR0z=H2ipe*s;X|Sl4Ssuu~YkY<LS^Kpw;93R%NSa_BX2n9&LAZ
zt7qP>DY~a==TzOZbYNP$rzPcC>i0DHJ@Z;U8uXyw>Zy_I+iT%x5Bykn7;-k5CR<>#
z1twcyvIQnvV6p`!TVS#UCR<>#1twcyvIQnvV6p}N6fMB}!+1X!EmcrrT4%9hA3pU`
z;=M?V)TSQZ!^8W|crO>PW$<1e-hW2x4wP8_@%ciM_{Y>sKbGZXx=Us7T|%b)N=|D&
zl;)@aY2yr~*%lGby-5Vo(gh{2+F!(L3tpAs^&8s2Ly7k)?NtEdBPtM%dq`>v><hON
zmrq}RD6t-vm1O-8u7t3KM)LcVKYRyfxwOM_mE`He7$q!+NS^Cqp?|tx-q&61k#-bN
zI;-eZ)$p?vy-v|3imq1lPDP`NKB(wUMITl4M~XhL=qrl8rReV!J*((c)zPyQy-v|3
zJOHe4zwj^bb6m4><uYwvM`tEsX0)4qi+xQCZpuim`K!%KeNBtzTj&>YT!pKK_w_sV
zX{RUehj-&u!sG$z5L98uC0`E?7-M;g;OoGRPZfN<xbbO%$B`Sa5j_6f_yvN;xf`z)
zd_B1F3+;Kqjn|1`zAzkuD$E`&CHkvMc<l2R4t3PGUhq8Q#=WA2FI0!1N?c^0A8^3%
zGec-R@i+uk;$r(;gad~DOu_S&8@~kSA~Yu?^HpM&J-;}GRWzHZ{k3j<w(yq3c{Ux_
zrfIHPd{`JqtQ^hDm1wu^MeRu&0|_50!mn01&-0cSA#O&d0<$N_qo!4{TH+Jip-1`Q
z`v&{zm--Xi^D*G1;xAXPC#9bm;>YS-3;QQp%FlCB;o=GXh0m6#*Tnuhs`UAOC0YFZ
zMrJ0CpVPoAO7w3HDlh}>+@!`KU&gZ~&R)mqjb(6u89WGF8#lLen^BNfVq85e{dmNa
z>W1B>EOtoTHn%h1ErUM|+zbCa9@ya7GW!2g2A?7EiP!J(GWuuA;8Rgw=e}i*=khZ6
zb7lPa%ILRC+#}}KTb|{&5M=KGPVG>9{nF0iQt><tT;t#z^sj+mRC%f3`wfe}OE^ks
zQR9a`!BF~<^pERTZKjsrRDeG(ajD|^p{*5OT)(r6=97@}!{^#=P*$&%@$+lo<fpjb
z^UBZNYFyo}{G2J{ht8AHb&*k<%H_8s*mxwaj2&cp8C+9-PN{O`H!RrQSVrGp2Hyyr
z+P}D7LExGr4$k(M@$;=R_!GeAvay5ilkHRD{uoY~X)_az`oj2@&u2w~W={~uS`r4G
zlZhmQUGZdRC?1TM$y7QR%Jd2TMjG+myyTXprIqNcODq^lr9%BdBVnfcaU3SpV+13a
zo}PY~IJh9~Sa7TMc7=lU-5hZRgRAi^JP-`5TNT8i7PoRl1Xum#I)8iHO1A{x{Zl3&
z9B>N;bmc)`wLt{eti7YvzczTs>eU+qn}VDCt!o41Ri45Lr!z8ab&jW{h0oy7$s3#-
zq7y=Hu=rF^k@Sxo)`?~k;h;PqL<f@GcJknm8wwiuz#me_joc!6KFJLgA8#6$E|O=O
z#(7yYdFIKDSqGrp*o3o6ZgG@$OvqkCN25t8VCyiFb@IxsU3^$67)d9C-JwK;4l=df
z0mDcv5zM3wbn$ra&`42-t=#V9X)HGs40fi|900ZU))Y3zsKZ%qReA7A9ujlo7_7bI
z0lPZ*T$WpbPM5inU=U}rc(79c^Ht?Ks>SEO+_v(lm>Y7R8*|HqFWui`hB`sbltsHa
zhf{1us#o|DNz?H8TiX_3(~#o25*eS|GqNBS5kBI&(Q(2T=}*9)Ma`5YQQJ>kOc1h^
z5f71p%Js%g;gfyiL)O=o1Zx_7_@!9@N=Z3-eMYys?z<y!!klGlO#qe!=TSnaCl*Fb
zH28h!PvOJl(}M}cF}wZ$v$Q^dTeR9mHt{@k@nbsaI@2{^=$#zXt4#b}#Z*%`6TYu9
z-;9jYp5MQi(!K|0Dz;w*A+|&$xqN<4W6JUKItH%;u+MeK(4#rq^ZOjry-Gl@|5SIj
z=k<j<f#H^8+w*%LQ(hN=icH1rcOOt%bKvs%{gCNWWykTe9@8z5(;5cz{2s})N!b_2
zuVC>IGSsGQ&+nT|hm<0hUtIr3lzpqx<M&dgUgenV=@F{f{+qz4P1N#={r<}9Tk3HP
z8dfUq|14mqJ-_ENm3w{I7!;>pWMcYla87%EA7;w&Dl<EN#(z*`&(C*E-zj?U<8s;G
z4~y*i{hDd<YkP71|3TSv|MBxH(}5xbj+@JWw#dHt-2c6-sA!QpxeJ=wkIU!xdZv3w
z=t#xo{~R)UN2Y6t62AxX{|8X4&pgxrfDOGWusyF6%w9m=#>bn*jq_~(-w@E)V|!jt
z;Qw!d|6c_jpKQndNbl2BMYiX4O>ZMWq*065ziiL+BqUCI`~9ZLGU0OA0oyT8{t2_o
zSMMEOWnZjc)E(ku*b=7Hk+Txp&u2hUws%tQd#7rPa@e8*p!*EH^Kd*of71Bo*q!#<
b)x>wONXX@~?nPznSKMZ4oM%Nvi|zjxa%%%M

literal 0
HcmV?d00001

diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/ispvm b/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/ispvm
new file mode 100755
index 0000000000000000000000000000000000000000..f8e216556ebe1f37526e30257aa4c6e278f8ba6b
GIT binary patch
literal 101752
zcmeFa33yaR+CO?ucRJnaEESeOfFKPd$WFp0fke}gKm$Q`McD~yiL53a7DZ`H0<<BD
z>*x$R%#7opj*5<gD+JlZL1l5l6-3Z(!sZrG#N6Mn>YPp!;hVYl`R@Nd&wV^R-SzJE
z)?0hk>98y>f3QW@HS@7*S8K%fHc^xugVC?NUM5HDr^RYHTAG%sMS~xOk15wMon-+N
zkC{3Ys#%dzZ@s~9n5GzVW@_fnlzNwY&c!N@nQDm&r=E?Vfj3Mm`YSmzHTmKEMk&75
zAkAs2=w=$J$JlI`qxc(^UYvfx0N^=j7RK<4;h<j7&<h%RW~v$SGE+02G{et!gWoXC
z1&@!JQkKuCW4@V$Q*MyxZ_?L|z?-S5HyV2M^S^z}u#YkFyIfpG8F4XFBYUmKoT3?h
zd-s?#v)i1ad8LcHE$-L1Ti@Q@OXhd)Da*}jpz4ro$7^d|@0NAgb9!>8tj&LY`MYfs
zy7YhW1^P`NXpb^{C?6TlD}a-)%C#IwqDC5@j;&Xx>??eCuEKu%-35w`e@oV$0_{@t
zMxeVcAwS_V@>Q3i@4XEDk;~9uxD5UE%h2~-hTiBh<$d!q^7mbazUeabNwDt%ui+DO
znS4Kj;HBa``ZDw{E<>Ms8G7+$=(k*kzUVUa_LuShj?2h%7`Rlqx`FP(r{Qx9giFbv
zzYKjh=#8`%+8RFqJmz?E0&qJ?Y4C-9xWG57xN!PRcD{6N>d<i`rp_!ZF1)Fz#8+56
zZp5HD^XC<gn?7Ssq2gVV11km8@2h#eb4p8QX(hhmf(1*osZ$pe7tQl|rxwhbtradV
z@@d}r3kv6H3kr*i=NE%rR5HIHGjnQ5!Ss1vZ9%E8L@R<o@m#P<eA5eNQ*o+ydeIy*
z3ua9(*5=NgzCiO9&i88Gn+kmeTEX-=bLJNy!<q9-VZLC_{E|X#t|HDYok!`?k~xKi
z3t+Nf@${+QqIuKj6y1u_Of89UZtB#<$j}EW%fifyeN*R7FPf*7EGa3N5AVFig@xLX
z{GkH}P3_seXZJo~_^L3}t9$P-+#9BDnmd1<VTuhAqZ7v`ep@hF@jFU>N75~r*Gy_O
zxRkd^DO%9wKQ;EbfS0x`is4L=j&{gL2RsC+IX*WpDvIX_m<2v*z7~|XX@d>CspMO=
zF$S*eS;F?rdCqJ{dyV<=Wn&&Q>1zynbpyJe9Tv}94d_pdQS`kH=+7DSgAM2}8+3<X
z>6!VOcya^!qlWxj%alCl0AnhWguM}TV~HW@2P5c0smkxe5%g9O^k4+NO$6QSe_W%O
zbB<&i@^&Cbl}WNAg3dZOpTr2dIaiaH96^`sAVa|wL64lzJ4Vo%xA~+;(9M{V*Dr#O
z1`~dABIwRARnt5X^tcH6s0cb5V)&U5K~D%%HEmi1-E6~T&x)WoijZFrL2n#EUmQU<
zmcEkfkDwb(R?=5R(32wUtcjpEi=aOoL2n*GUl&17j-aoPptp#iZ-}6`jG(_9K~IUG
zS4YrWN6>!<e~-ZL5%@g<--|1L_LQA)cq(nX=VMr|sP<Xv_Ik>;JGRN-)b)9Lo~G5M
z?ZLNblLLtOEb>B!>+qz#Nt{ztXs^UyCC(`+R4wrrh;u3pZIJj=#5pyE)=B)Y#5pB}
z)=2!1#5om({1U&9IH#b{0*T*6oKsI|n#AuU&M7A}O5(Q?=TsBQk$5q2PT8S!iQi0|
zQ%=Yw@fpN9)r1lyek1V&;+n+A5a-k$I`b<CX~T$fstFyI_(0;EVnTZ*-k&(9mQc0C
zdlKiA651f~&cr#Dgw{#C9dS+}p*0e3Nt{zh$S?86#5rYz7D(JloKr<;T3Fw^2Dp62
zj}4snRAoOp5Oo>&QP%7(+ij>>KD%sl4Jg<Y5rW(+*WjqZq2RX&|AI(@zLoG91uuuK
z;8DP3=XG(n7gg=4%yW1Gwu5uQn2oC0%y4W;w7q#D7>AlxsDtPQGz5hni~@R!DBH@G
z1-2a*f`@=2vj>@388QgI3vEwTpX-t17K&w52P;uXPi4{^<OR-%tLr(pkW-a?GqoSQ
zK&kA(kb;gK%>!6J`u8XJCN>`o{tJGVf4aB;8Z)TTL=|o^VY`B-5k4<<lkyQ|PsRSy
zn7~1HhKZB6A@}PbAU5qcT=N8yIzTEIV&1!K%>eVMc?Vg10Y8HqXsW8umw*GGnB{qm
z(uTl2QXu<t3YRJPGs24i*Q|ilXkxGY!m^F0sj<LKL&Y#u_EueJG8(0~yJ%A`b7z0f
zI5{-1Z;B^y#8Y<k%&2ksRkjs<=}EkhN%lc#)+Ozqt!Y23K_-DYnl|23Wm}HalX=b)
zIOc1C;ovFoIUK}Kt~*?BfAThOJtEq`YW7g-RrMJt&2;(|`kt-7T0Ma?o~^-aJo--0
zzF&RGFnEh$FpdUIe;eBKXX~(|mG<zIWe<S@JcB=RsLdOJ1>@m*&;$2(+CB!ZPu?cl
z_*wApx4~qt5}zFMGA0uDR@Auz=N8ZLy0-?cFSAYMiA~jcMb$f8ng&`^Z(c=puE?#<
z%h<goh~{V5%h;{-*N9EF;LWV|Z!`9nZPnM?#e;8pVGCCDy_q|ge&H=Ut(Wd~gXhi5
z+*<r9JaI2ST(_+B89-~?<J^H?ww_MR@z?DbANX;sr?Pbh9QWA)qyyM;1zg&C%n|(R
zJZiZts4qXpeMf%V!yf%$W#aN9+TpsoK%#`u4gjUc{21ssak6_7ik_pn$BhqMfc>%V
zzz@s=X7|BeX@4&OX+OBaFz#s^gxS1`qorb}rWr>3@Ic$C=@QK;uPu$usIB>j5eL~@
zYaR*L7e^G;gJpNW9f8iMm0h3RBs7<SuWumUHIz35f*hYCblvs3!9EwWIslbMGirk^
z39Fhx{YKWysG|Q|FA@3e!+2r3vIB4gYa>uIzo!UaGQY#K{&RkE=8T8{#$#3w!(dcT
zPk1e>Cj)@0o^O6qb+4+YQd1+&zF^s5{o?MH1J((L8a)4sxKvb&2dib4W`7!s4%xLI
zI%L_2L{HVE)To)B%BZxCs9{eaH`Rf`@#b@K07{}z;0q9zAa@lDIYvK)E(Rm#u0nUa
zTFHh0E7=i{MGU3jawYf~1(TFubyzSpY*fwz<CW}Y%7)I$3?2x}o`W)sO2Mv5@UIlC
zR)Vv`g6}~vqSiDeTTa;rl<YNO*}o~HvXy?s5wt3M76oT3!DeB>TOp_-Itn$9fou|3
z8T%R9H_fp&8Zt1@mj*g310QfKmGR3A8xYDstKS;fp_CfaK&V!g9|kh2VIp{r%u3YG
zOiwRWSEbRY)WnI~f}cY+qBVKfuzo+4nwu?&iCS<ebj!}w1#G9iXq@HGu%a=oM@Zag
zNNfw(c1f84WK_GG4_0oa?M0A1XAfr74GnC4g+t`47=bkR@-H>*%?q1dn52V+^cneJ
z*1r|fz6r`ecY01uci`Y}m3Lg&oCr(7j`hlYsN8BI2WvH7O@y~i;ce&ugfO2FZ$W&U
z!r9(2_}ieTJef^nmDwi>xv-%18$qbdJ_9^>=tqKI0%V^E?FH&tequdi68KftB__p)
z4pE-^FnH(!UsDn_knX8mEorEUIHT9t9)Z15C#q`scADB2^g!D5AM@H0@G%yv^0>#l
z#|;hqGCn_WY^-PN$!oSugi5}COqOHch2WkakW<CUJ6gB{Co?|vuGx|ee%UrX_%ASW
zGiypum0idP)GTXZjK5o42LFEW%g*;KJ+);rD8X{tsp_Nmf%U)<vz<<n<;dPN6B0cE
z4=wv;rmrc3kx|Xz-5s7Uw_weO{!J^9T&xHBgnBbxKW9`+t05=s)Q{*G&whNBZAA7%
z4;GuKpx_GFsi-b(9tZ|LIYon8)~(PH*ol)v1L#s!_8(w0cp75TXfO#>HD8bYt+js2
z+MvKEC*aOZXo`({jUom<2ri)&Wk2{i;Eer-FNcD^elPuqp$mbaT(o7kX3nMIoc{zU
zqDQg5GOEXqmBr|R{_75G$CQ5)BDmh~%LLdJpm%_+J(5M!t48VGKvE09Sd%6r5gWT&
z%-ka5Tf5!j8xHN`1ycJ<Bqi;Y_D6uBeJc`EdtxA{Y6tV>cE=kS+3Uh2wGMGt<);?B
z+NPprG#Y<%s0QBJ`cs>;$G84$3moY5@8J92(e)hxEC6g8Gbs4pQ{~Y;fww$?_|r2$
zc*Jw|SMl6IPr;|2%#ZK5#$9&8GNRyUe&(0A4}!_<5DC5qBN+E879oFcS@u6b!<f<<
zm|JYT5Og&~zZAgGPXoKqZ3G73nm1)VZb2;AlYYTaTk~9fd&v<S>p~xWOC3KXxKR9K
zPfY{)BeQ`$iCn|ufv2L*7aLj#!>Zg^L)9BYzGbJQF^|p`D?i1sgjH)&T`x@=%UlBA
z%RW{R^{PkTTX)#ZuQEH6rH9!BZ)Ts5repl+66_0y0tdN_^Hj~UEI(F<g}o<mI(Q0n
zZ=m(_kitl(Q4#flc2w_QWj49kTEU_%c=8NNw&}v=XcR5D0NPNy7yO!C_4!L{QhE!d
z17CQzo<g>FSeAdoY=gHdtx9U$y9QOUgt<%kdoCqEOv#UhRA>q-O2!|0nPI)_FQwO5
z={2Dq*H>Y^PKI7%#Ankq*0>$)U}G9FVzk(F_8kxrpfwOfNlzmQeS%I?Uq$d^ADQr<
z_HL5)HbEr#=IMHSkukp&Cb8JR50bQbKT_n-or)EAKrvLn49xMB<pj&LZ>L!K^|U`D
z!hYD_*2>?*Q>E=XB%#hU7v3+y-cMx8c(<X6hV}Cai16zGbx(!cCG=Vte%ONFoMJ0L
zhr7cPd|HYBLh&sSuWtu|a6X$N<Zn~*b0~jLy}Y@fk!`v%`x!$wF?btvvD<tY1U~Si
zD9oFxc;o7Md12ll#Y?Z}wGH#GRJ^!)-i0YDCW*mV#S4O9<o9uyclxCCWqUpEr7-V+
z;;pOa-5cg@QoN=0yuvW=Pl`9Ho;NzoTc&tf^}Mt&uR!q<O&<C!CS|UJJrOg0ZfZYF
z<W;s--Ps_bQUNAOFgMi^Cg-MN>1=Cn(31gQX}~VP9Spc*1Rd)JSgv2bwG>-+c>>>^
zJ?II1<ayXr*?T+25l`sQ3A9ru9IbDE*uQ1ej?LJem%$xqUdDbn?D7WsyogyIW98S~
zH0>hyli~iZ+*F=NX*+XMn`>wbtGOb;;|;_w1L(~S*h*9yU!>BcLz6JlOk;>Ds?nG~
z1S-lm=p3>$_Im@iLdpe_Hc~8v^=ww5DE|p2xrGp`kl!1S#oky8{u|s?QC&P`J9JOk
z1xM*AjKNpIOE|k=0_++4=8S5wG0T$EFUwlG)KgXs*>jH46PO@|<2(jQQx^u&Z3d1;
zoXeaK)yVeL8!(?>9VV0VPfJ^29!&wwi_-{!srY5UqT*#pV1HTZOHD@Ld&|{Y;Gn2D
z3Ob_glH1ue*p_?5=B=K}raN(*BPwQMXhU`%U|GhKn7ZI>m1i~AX?SX$4Udb@gCxtJ
zUsZtPuFr!DC|a5Q2<Tf6I}o*%fPy!I>W#782AJ`AnoD8?XH{O^(99F1r!#gVK+U?!
z0FAsJo%{&K9|TK)BsQ7Ln%91&FMoz9u_@`G%(#yY66V6L0vvfh`5LtALeZ4odc3Y~
z&Di?0x7XxerxN2y!~xvWFe>+KbBVGl)sANhP*vWH+Q1>y#s!lvvD3h|=zdvY|H3$6
z2pt4Da7dbg%G(h_cSES=#roEb^N;J@*Kv)dR#=$2?V>yx4v4#tzzg6GQO=qK6q8?>
zJ@-ad?IsXLRMd&`X90*!wN>-#Do%>KKLVDQaWXICXkJFGF|OtYzV()UX)ld;i%r|z
zW!v>Utf}l+u6!;w?M7uqbw)e;!d<pgKk#)<^(i}63bn!Ja2cMbBZ1n^%;3_Oa|7R%
z9kF}SL^i$cyZOLZP~F{0HY7)Nja_W~UM-*9Q`}QS2T@9MK7!9%@#+-4tr&w^QR@Y+
z1Sz_04ayY_nP(s)$~*p60H;w$N9f<c;Win&YgVp->=MX^E}))yzB7Jo2KEV@1!@`-
z4}{7NFDu(&_Z&FviDCcY`ntS2M{Is)@mFZ+)pS5I4|3TO8GpG}PexzzBLjC}7mmbE
zTi4rtK9ClXRJKd^ma$>yrbdg3`&6{wfX{UZc}BIn?3lg=@p_+YQQf0|g8nGVhodra
zY?ZUBvpcW{Ct%+!`pjFlG&NfD#dw#;w}xFmyJK>F{N%Y6^0a~%&abosY8Gd4buz!w
zyBny4=YN!VDA)Y8S>wF{AN(x86AonQqI@7*)t#?nS(s%J<&QH(og738og}XMVV$e{
z@<}L>yJ|??W`}HE)%jI(ta?UuO%wFr+*R#8*p3a&{9KgxhMc$TSI15(>ds2@o8Co3
z5*yD2em-zy`4K<VeeY(Rtm#<a;*|*bsHq*g5<2j+qY1`J-``=)zVI{nQ-O_&>Oi|;
zuI9aP`Gy8Q1ltRC)_7k#Ht3vwJKU?HOEdDyPx`uocO1i3=ziHea_N%oHH<3Qt2m6X
zw|4K09#6%g@KsjGv!R<IuKM|UN9m!|Wf;3EpapBcVDT+?VBWyE)aaVK-EyE;RUs;(
zpcm?<l*>_Csj?d?hVSx9M6N&KM=w}Jt6KhzA5#fhfT-Y0B#b&HEXQ~#yI<$GD4z_v
zyXtx@s}ABg-BUHLiEj3%o$Pa%E;8RN{Q<ok-J>q!<e;jkYw`j=df5WeIOEhghs+oA
zZrmehm!>)}H!O1pPP+p&?!a+(AmrZqO_aO3CMq{@7IUk+?8q5+*_Wc`%J8`HMa;Xo
zF}va3Ns;@m8+qpH->h<?eecbD^Y-3>pS}Bz(>eW<oZ4Neb7$$E+`xy_`RUR+OZRY;
zLBM|y<v(NMG94Bb6VQ$j>U*&O59|mHW2*|UKUKVCqYte@pwSByavKm?QJ*1Z&>jnI
zc{t+@<flf5oM;7TIgD<u*mxN6c8H4gtgfA`u3T0?h?B)d+b21mR2!T2zu-_9T^Ma)
zKC%!M&!cYq=j~$C8BzWyYUqvv|9OngV*qBH^q-F@^<Y8oglLH!3ltrIx1ttMAE|vF
z+Bs;V?Zu`(ZOAK&Z;QkM8J~dv_hTiVwLnxnO>=UTlH(ICN0*+0<!8qkmj4bwS^gZ5
z@2M?vb7e)V!=OA9q~MkCJhToOde^{mCM=`*y$B9kcVAhAK5K!A@(&>+?oLFOvM4Ko
z%A$z!4Ag?WKs4Gz+2ONFu>gt)iC5}(fTp<HVd@`(J^~>s+CW=&lu!sE=D55i2E5=D
z?y)Mf|1lQuotV-Q5QHO<wkm2^Ij5vJ`Yn1`W}hvPlfm2wKo$7}AW{A=h;8BM6pT|A
zC(~j&EY|$fn6Ih7#MEC9)_+3kmr$Q~rolbjT~%hMQU46iWJ5)89pjvgyC^TGQ#VMb
zRR30`ng$`2&&z1Zb)gZEP&jH!RJedD!Ca||@+fo`_39fp@<GKkLf-DcR!lb`OgEzZ
zUijt4x(riedr^KrFhHrI;#)u&9Hn=cHm*T#e&8DCBzNXd3$OE3#xEX&*lhYpY>aAD
zUhO-^mUY-2I8&2=e89eeZ1DC5S4B0#G00Hh{;Wit-Qk7?dOM>M9T-A_dg*?{>Y}GI
zs*QUi=}bil{f7g-Z!+p?;#seh%*}kS<U?d|ZuI|{|Hot_f4y4ezZ-ai{81K}f6aPx
zyp!?WRv$98PD0d<K|8R+n|9B9@A6}QHpv5^pt%pjD!#lruuZJeFt?$3J;!`EpAUYC
zWr_cMvM3KCZi_nj&o@=$r2l-9DE|dC|M@1qYh;FMmBRgz|NIP5ex+>S3q*N>1U#jm
zpvg3bS<K)Qk!Xp*7qP6Z$@B6$%uU7sn*+&0j0Cp2Q5dr;vp+$CPTv*e#9#%)A=(Z|
z?RH&Mq`~ldzo_^T#=IDD%X=}>%i}LV$*+adh?(=qmozlM_D>|z{@(z=elf{q@q3WC
zf@ySTqiSEzlQF=y6p55CQG!%+)!b*aBRCUKa$`)np#WgFGs$J~J|sE8cW{^-nh0;q
z`eCGaj)_?L;XB*2n+gML(MV)|7e-1ue?@{4bpcuP2g_-wu{31p^|67or9HU8Z_uf{
z%hN0%EUOEhP@PNlKh)>vFtjC=a$6vW3_k<GfAm*`dOx7hi;?mOrmRscE=gV<|1^cQ
zP)pe{a}ex0Ul+U+V3r3BD2BU?jpu^Xu^aW4)##-)6Xj`eXcPzv8cdd~59+tNSbsP6
z9a8W6iQCpRJfFi#b;7G0xh~qZdNAU1m9Oc05G(GxU)B!-ZAuJ_1E6PsW+^lgvK=9N
zRH4b>t^;?DLS5i42KPmUb_9wz>T4C64&hZ0&Q&OO`>Gszbzp1RZe7mhd0TV#p7tNt
zOEJMG&AyhB`@CC^M`3;7?bUR(C$P0TNTlqr!~^@vjtKA8P?Wb<TzTLvZ?C8aP!+wX
zht&s87tBi=8yd@mZNW~T%ixv63$zHvpO=7Y5s&$bhy5FmKqT|?(r=B9Sl|B}#*>3w
z6KsL7z^@BEhdIz_hvxZ^*c|`J2ozUr-j&nur_z|5ax8lPfsBoVZBJFV%zT`X=2wlt
z9vr)frYauBp1g%9e+t54<G2bf^X<|Q_90D|yEFHe9`Y0%#9Aa{w}0uQRxM{$b}!_T
zUzzrJ3NPntMw#tNE(G%f-vqaP$wiJEYu?~NfMR3rqgFR|C7D}qZ%@Q>;P85X>E4W5
z3O@vintdE!&2pe4-T>3M@4Xc~h6QpNwQAQ8@`7gi&GT5}q#c!<Q5X6tvOlnl8Fj&9
zpvj#pErre=3db$H9~GNUk1abXV^VQ4zp~G#tq_L0A4M?CEvB5;a|1ug{bf^}*q<AY
zuo~M;EV{Z{5G`&q^8;tO#oQIS#e5Oh_ULQxAc4v*Y%yPQmwjXBc8_Z|(BAX)J@6G&
z)%Fs1y>)f9wlm1W;<H2Ze&BT8ytt9uN$(o$#4xqZgILDyfnsBdtLD{+30Lj+0>85I
zUvZ%<m`;|T=!d~KqC1wSb_4+(18c-MPu0>?mj_Vt_nxP#2IFuyH#Gr!;<9S{)^pa1
zYM_`#4qDm7Hgy}t2-NP#5#=i|_h3pqIgFMnm!>vFKss@Y(kk=;gi%?l{bM=p&uWC_
zPZKC$k<I1x&r3sS)^2&WA<B8#m{FU7Wj;4_&WulStd)pLs72Zc^WM_b#wc`6x~l(-
zPxH#_*duaNov4z@$UkS*91FC$<-t@v6WfCoeUTXsj*2mOJ_?ETE?<(^G>#haU4V;?
zy&L7M@})LfpX1()F}lvz$YiI0jiU5!6nJwB;)fCah?XcfNVy{KEI!BAC;FP2*?&Eh
z#-c1ZAxrd@!6j@XgEye&s>XHGV%~(SP^h&f!>CJaJmBLd4$*|&EWNVNQD~PY1-_N9
zrQi?)Tl$ARx@{lG*hvKXY?s!3sfmGo=pOxBXxf3VxBhA``&ti<{{kI?g-sAEI-#)0
zb_PfoTeyl{`5~G=w}Ww*dXEC8BXWI(0q<^DWvMI_XpF_?y(}gUKFUY1POGvTwZ_!r
z`x+LOr%i=$-35%^m1||I!C;pnPufHUv&EGt8&|~M9$lg~un%V~<+UPk4MHn6BF@Iy
zOTV3XT|sQD_UgH*jYDn0MSI2`q*he?%>B%!q;EZjb7-D)sT?wJX)}g~;FrgwOM4(v
zcR|K1R0uZKl_%q1hMPla>N%LI`Ij+H%DG5R0;)ZR=Ybu%;5=~BTZV}sgr?LOc2`*#
zsd9!7xqgQsAvhbkR!&N7TJdS%pl^cMbPx+TPt|NVi%m?8#nTBZ1B^rHl>3ID9#Gz<
z9ba}Zq>`@J1%AT3Q~M^e`)TiSFPDEcIk>L!VDJf^I*N>N>AMxV)g&Xg3nWz9-i0Zg
z)Qa+adV=h62pxYA0_cR*ukwcg#_3yr!1h<l1`Y*}d<0RXuhPUW+e(o6gksnh!u!oy
zTNM~MAlZi~g?8YJ=Pu#iSW%262b?*JcguqdU<v2B*l#wLYa#?$35$y15DQ7?s<Qu0
z*<8xv@C?HRPZAo3_9NSuQ9X5`YGe{@`XPtl9F5~Ij$Xn?g2|X5<v_%N$0^GFa%jpp
ziOwIxK|qd2$e25+@{hno=RAo<_5~)I+(0NV@XLX(FoL4}ANfo*wiu9e19e^;ZsG7i
zwLEw2E_-P#dVjaUI5v;U)G(}jtl4dVp)P9A?nCb@|5TKJjezA>+TP3KiC(pDD8e28
zDiFCR7~sttuo#hZ!wYv=NFQ326OHkF_sFWKq1RT$<<ul$JvuaiW>FoDzPb1pQQi!q
zLo>IQh5}~}9CqNHuWVlum3QgE`#(Xoum?LA()-7O=J+qz7cK-59Tx>#xCq177swrB
z9s*HOy`-hsl%Ja5sqE7iRE|;!xq<Ju*4WFw(#=r`-1t%8VpP&GD#dVAO3>x*40RWJ
zAGIReC0;F}N5*zA2bTuSRjhnKHn^mB*rY4=`vxKauK@O9Pt@0cYm`<x1ts@X4UFdT
zYE{#ro~pP}HO=eWmnZNh%kN+Ot5({}gQD|w09;x`3=uMa_s*OsJ;Z5R^%Img6pz*-
zHery?UV$vdreaIrEmRDzX>phGA(}o`Y1Xo@aU2_kV+x$jU@zGGz~NWys5ZRyiA~{<
z`t@Gsx4w9H04tKW^z!{~;i-n>`u?(?>Po*_WtVRV%Jz6E3Evlbb>_FFUqQ8|CSrO;
z{qnx18tdU;0aw8RTW{&9?J6W?htK)XHwLXU5MNvW`DVTr{_~A+zKvG!20Ba~Ur8|D
z+k@${x1u0?VGt|J_CAs<o6l8iI|&G_tQUsYEbA5<iYChY00}n2mV)OUALB@%yt?!m
zw2o>jZ_0iS$$FP4-vnVE%B~_1{1$tpESxxDe+Tti+kKGIOKtG6G!NrlJD{xMOq_fs
zhUaTAV#uhBcOnrR<MdT=77Wb!!1z7^rf^n*H}mb1_hCt$i=wDF^Fp31ZbdVcwAR)E
z3Kmfj0|c)UBml!A;A%J`HfJ{(2=@l!;5r-->2}~W-TnlJJJ{du5EVm}?)#92?hNQ|
zu~NbTO&OTruQ=947&bwI<*wkUh?^&jGbo1}R20Ah@M?gv9NFc7@EQioft4LjB)pmX
zO7>%>D*@xsvfyX*YDehZa6fs=Qfs>rJPYb-G*aK>Em3r$3|WWfh1+kftq+AnMKVcc
z*=>Nq>D%ED3f$fejnU9B3S8e`g0oeIlVyfDN3zg(2Z*X{Qe+AH9Do5%ZsosVFjWU)
zf5i-q)-W3bYv^lGRX<V@`WolQDng$DLWCZa`j}8&ha^t;)Zx-pWuhZZ{EZBp2V~F9
z!7txL#U9}9*ROy#HJChDh$&zMSJN^Ih4U>5`2jurK61zVBsheBNSe>Sg5|vhC6g6d
z?gv#lHbT17$D)ekdr}>neS|r-=21B=gniov8j8321NhcS1_xQmh0YR?P^8y$RHc_c
zE%Q91&bwAaE%XQ}YQGK>LzVp9ru-aQLkMDEE;xzuH(q4Fg_37+*{I4_8uq1pSIU>x
z+vj|SZ4cJl?!bldcnkLz>_C!(d5G+mB4mJ!&~T1igRI=2OTRw^jN^kHNaXRs>%=kH
zq-A`{IB%-)Si4OD4W3W^R4(aO<!Ro`){lX<=r9WYZvcTe{qI`V`*CIa1~5_aD5^vr
z+8@QlnSc?4OMFjN>o=N^j`cH_`?krH4aY@?b+P$eS<sd>MXW4?0+wc;f~YdQA{>5y
zCK!wE7}!zsUcFusLLfGs3;qSyXEmGZ>Ca;dtF?7Q9u}V?%PPv((B$TG!3h|!YVKC;
z6Qv43E~^cWV8Q0aO((iqnSFBtT&)e>b^yYC!{bqKcnAT%mLq{|AFNO6Lytc}hhAr;
zHwb#FVaDu-MhY}I4q)A|BtdQs@-mN!l|Q1U{Yx34O-W@}qc>aqZ~Fs#{YNh#JjEb{
z{H!#bk5&hlV@ZRG!A+Sce+PP;gfaf|lt1_*^1xC5+0xUY7r?6T&-4#^jL-6Y@PqRy
z{YYKr-($ft;%MMa<m5n3qWnQ*#p=>SV`xK`PtFsZGSx_7TqD-oM}gh(#_}&Xk|pKK
zIv4R<g!w(l|K=k9{Mkj>vVZff8aa^gc0c$M>Jq#3R1q2uIu;6?nd$fVv0~HN!1*n=
zz*p|AgSR32-ilB0iq2oM5WhiewV3Zv?$KYd+y^jq+yf4_B3K`c@dlzsWBX9mwQ(>5
ze6-`6!Nia}8wnP7oh^&_ZiIQprbXNqCwkA?K8KVavtbnmel+Ks8?!mPU+3%D;r5Vu
zkmJnaq^xCVY>N^i8?kqd8PCM}c*^@n`1=<e!myrNAb^qWIAGA*V#?<DRa%WJzCYBr
z^CBMJuwCr%E$4jv3KrfN{!Z$p-^usi&3L#CJ4<kw78+-?N1V{bqD-14G?4X1{Uy-n
zmE{x^irwZcrU10>3hs|~+P>(ISv!;@)n%N~d|nwK1AZ8%A}l~ZD5@E=3B*u&tnzw)
zThRVA?EhG^)xoEDmNLLL05)JMABh}>x&Yv)*b~mZF%4hAdlA>rTB996@fIka-Ro^D
zbwXv5!FqoM(+8$M=o|fhAPT^K&-YD26T@;D(9iyc6&ctn?*0nB_tgU<W+WP~F-CWK
zyX<G(Epp!vB%RJgM{Ea08J`<qpX0@DW4zd^`h9<=9505yhuRxlKVG!L=%j)X4Fd?q
zCm5{j`v?4up*@TrhMnUW*D>x`VMmQ0yWfG^kINxGhvoYi^T8_HRQhx`ZJG7ERnk4A
z*T1g_`JveV%l5GoH=R)6o+-TlGLFbzdKWTznWr#*^#6^2&}X%}=|@VvAKxB=PQX^p
z3~iE(_8`{}s=UoWLwS#*+1BTW_Vy<zXgrum<iv*Ew|LIB2sGF#rY-)yC>%e?&j!)2
z)x2w#a|!c}v0X>mD#)7jt(f++z7^$<z<kzsqT*iKDNE}DxwD~>QZPqDKM}cm0`V#R
zpsk30$aCOcf?cxQ#s*iiq{~oUJ8h@0!srz00BwKv7U*Cl@;u5_KT^fY(`$}YoaOnx
zWT&v5YiQ>xwwrLgakBqMm~n(QV;<XSTLbf!&@RA6|B%O|`#Eu6;M~1y8+s7-<|lBQ
zp4|hAh*DBMQeQU?bUDWSd<7^7=oZX580XadYypk)GhWuH(XogB8Cm(Wl5Y?dt6>K7
z4S#Wg?Nl6+vbP=n-F{35IP*%n071OE^#c;$w2V)Ud#7!@_xjA2A}8+k;32<5KQqF%
zSAgl|)k{8wHU6Rkwn_4TxvcESSy*}s2<-kH35QnWxYTU7H6O_fgPNnV9{GDQ_x1Tz
z*?&XFcVCCs58UI227Z)3Tf*zL-5vmWY<{N;a_oO^2V%4Jg4NfC!SJJ4c=`Oh{J^Q)
zz&Gx?rib|Ega^mk$Lq6I$CmZ=!Th#Ck11_ZlKAh>?-BSt0>4M#_Xzx-jexFMv~jsZ
zT_uG+muKh@Pj@YCW|)va^7`)DxDjI`xF)7pgN8@43{0{X6&LvmUHIEcMJ2NeXLje`
zi*n7t--w#mUmHVs=5(-&N?d6(otk8ZMYSF?3m5j7TR2x6G=1KcJ{SM~lgp%aH;DKv
zO)iMcFJ98$rMV`i%}h(1jBSsm@pt7+`C~$+d?%JE-+pCU$1gl)nil>8Qm*vHX^Wj&
zTKAq4v<1^kO0<QA#YNttg6Y1Z`SV=zPfFpBPQf8~I@9Hw#nRz#TrDb|Kkp_9x_nC(
z6lx^8)L*Nbzd))gq@cLKb&*B$FIrtUBCjX@j#lvuEpPFH!UA96OxK_>gZjH%bf|mp
z2~HGwPC@A$1kB)=bSGr$pQ4flFxAmFx0CBSEdzgXN^=dGzhFsm(M_{_u8hpge%*Se
zXJmADYUAe5cX<mJxuzH2R64hCo(};mEt!5(A+k&>aZO|a=1relIN8ZRl~pvOSOuUv
z9;Z|5#1xP=7=L364$Ukrbou7PL~)_7w0NGYVE)WPR;p9$lC7RDPHm}cuzP5JTi4P^
zD#@eVW5-Hz?sVUD*PvO21+z;^=k|A{rT1P869o(A%<R5!F8}lviq?yNZ43{}76vj{
zmuvUb)$PG23d_GNEUYI1{!gFPkWGPH7E;QZ_<z#--{AZHOCSF?^7?<n#t9>4m$Lo%
ze<<4=#F}+h-);>kf4a|CR8Z&|TR67}e?DzyX@PHkF<Nl(0yH*Fa}EYJb9zz95*Ple
zThTn%g5vo%6;Gc#w+Ov&zSo7n-{vZs*A0Jr%~v=#%;aC8b744v;S#hbJfn)|11_P~
z!lGhd>GV0Sxzh_~70pxK+0{|YMMs)5eTj=rvOoGDwRn-9H)hbt+`NnXFh>Q9ZZ7ya
z&xgNDSs2b485li9W_uZZjx$mpZiP!Tea8G^^!4s8dYpI?@oMndd!nxH3}_8M>p}M$
zpN70hd;@eBUqU}p=Krs7&VO0%HHhPO$nukdcPOLqA^biL%3f^nDF>d9k121ash~X$
zJ$_6Y(@1<Zcs_i3H;{>xC;S8X|3RjqP87~v<LK9^y1EDOX~_To3ZEI_%WjnIfAV9T
zA)AG?sR94+A9Nz^efEDtHd2p%>8-2-cz1`Nqia!{>grAaejIn&O>w^UBGNs$oO|(A
zv<c9+zgAb*74+QKagU4iainvQ{(zLfMQHj4uEWVkx|iu@T#6%o04aaQ{vy(jNFS(1
zTS8jC73~7)cBHG3roLHMw;pM4q^~3W0cl(m?Bc+}g>)v;e56N_E=HP*tvdg<@HnI=
zkou7F4<J8)v?<c^x3HB*x_x(D-Atr2-^SR1^zl7t-$--csjK@1Y5BXbhZnH7BVC8|
zeH<xA;l4E&XG!TueK<_ZMY<h_g?^+_AJ^5bMcNzb%Sdx^T>L)La-{s@qK_kO%Jfr|
z59y0YS0Q~L={n+{!C$1~a9EgylewliOkagGHHf$&jl%Iy3dThr(p;oR(Y{wPW#2$L
zj%_|xzF8>8ZT;3Un!Y$uZxv^E@IC@>9BL`}97O%~phT`ckx42(z41wW34TCMOGq4?
zkUUJpE^_#_Yg!KI+$*&ms8W9t(p4Ml>fmPhp%EWGYhJ0VyThP%M7j!}UqGXdHZUP^
zwPkoh@(Syq1Xo#<#gmZiPDmV>07K0CMSRlHp71)OA?v2>V9NTOrmQD6*90NPd{5xx
zfnIZ@e46qLWf%uqd&0R1i8mq>(vv}-13F*CCEao+!NIbpQyy*DO*))fVL{$y)}aZm
zc``S*p+5m~OCgs`Ip~iC-34#~=;fdvKuY~Gl+$Ic)}0B7P<6*Lj|afZLHj=mSjkv+
zI1?PhV%_*28OtoBkFP_{f&P#~Ipnbj4CcpvmJa#^(uX8$&@IEE=#FI!&Vc6w4<_W3
zkMAh-uLYoOAqBCovJ6Z}UTw`yaIJ{SP3Tx=8<mi5S?Wyah}uADA%Uv!#9n(bL7J0s
z9tV4eVXv7Y@f}t9m(EUrh8N=^<2E+IH3l{2k)_W=d!+0G&`;b_S66zm?C1oSWe9`^
z8KKhHR;nR86SCK#ToJy*(-l!}`ktGR{#)1Qp)l?Q*C4Yn17mYRK?4d?hQJrb%Y`vy
zCdL|cDfy7r8?<SlneB))4`_2hYpleybfl9&TMXK9_^4gWwt|LSW*vrdj8n}NRXHry
zI?Iya*tQdG4q|Jd(;H(`Hp_!Lwf56l-IDiD@Fr}pt9uAIc%v+<P^}0W^Lh)s&%nEe
zdCC4G`-JR2BNKA0d1zs*Jk^f|#<Gq70-fMa%z1!SJJYnT0GnbQJp2MKE9gUg8y|&+
zN;9+}+bY!-<C6>doLv})j5@f7?dNXmzyw!S)WC#}t8MOt^cB(WgnniA+=Lv<OU{IT
zLlV+aJCJ~+YEL6#5tDw9Y(O6vJN}Y%cdQ(Xs*!gT#%Np=M*8YWaLrCg9wHsprhyfN
zTnglLq>Ru1;NuWPcJU?i%!{3QN&2u@*>3YO54`p7x;nmr5fL}|Vp$#z+n`w4t`<W!
z4s!*6Im4$PKC40N_#Wn`i}leDEy&jhdv2^Xm6f1+fd|c0wvD%-n}v&1+=6M^V2&%(
zwz1)`O&tYq8hGu(ya@@8f!ibxf5KSvfoE6kZJOnR94cgaQox&qc??I}(xx%ip*-VE
zZ-%qo%JvW0rI5utZt`K@oCMk`(9V-GF+8rwzUg7#^k7_B!?wTY9e`!F6;Z3LRTc~g
z9S3hiYu$;qu?K_AI|+{A7|hvY!^02rd>!^X;%WiYrhM3@_kxxRS_@Lpe?}n)9)Lm6
zyMlgz^vl+NF5Bo3w9!XV&x3x`7EyN`FMA`yYS>zPaa%$?8SQ;=xV;ZaIAgI+wp_B+
zpao;xz^5Gc60t6L!RWh2+sq5wi|jw6tjAFOmvC-yY%Xl=HP#R@hHtAmKN<7rt*Q}W
z@Xm|1#uz;rSZ=K4c$hUjR{E5Twv+!wUEOCF`&3^>jH^bUMt`vmViA8Eu;Fq(n+aQo
z57*Vrg?|zK;##!p31&mi0c$nnI$}LjWcYqJ$B`<IBda-<ui!XR7R@1Kgfk(1kZcg)
z@dM)^`_Nw47<bHQbEs!yE~}ppMx)KWt%m<_W5Qt1*u`OxPsR%=g@D<I?y(HzI40{M
zkK>puv&U#7^DZ@7sre6fa$pDD?)T^S2>c#_-y`sQ1b&ae?-BSt0{_P%VE%t1=Kmk!
z$1jZenEyYB`Tv2K|Nn>L%Ht3T8ru>ckH}|;k;WORT<8Fnmx)Lh4^s@e?gnW7|0b;z
zIsE_SnEM0s|2au%z{iWH^GR}GZ_3A9L#1Q=&c{f!bc2thEcwhf9Oast5BEKMl2j7@
zHq^ABarngLEuRSnz&!*XETiRP?(x?d2LL906xNx1j6@q{<Zqr6nE79!#KLmt>s0w5
zE>(Xu@WX~-yj3O3Z~BGfI*IeFkk3yBZsx0~|9juz|39sP$-dlh;TdeC*BPnTNEaIE
z3L|~UNS`p$jYhiDNIx{vuZ^_UNTVC6e3}_)2P5rkq=Sw0IwSQO=|Ur2VWbZk=@Uk}
z(MXl`|L5NhztZh(RDk*a;ovkS8l6SgtfTOs3eAevwZm53x-Lq$?6q07b2h79ZM9l{
zuv@LcXbW%)a0_6o&2O>T4%=*2zr{vcl;09%!H4qEhohoF*P|f=m`yB*25hko8H9`P
zj^k&P&hwSJuIk>WdwRFNr4sAeN#XJ!M>Qhl>0zT~_b^*<gBWB1w`c*hS0$fl^h_Qe
z^Vw?zP#y{?(na4qII?KduQK(gbx`a-wZBL#j8q^e?(-n8KZ0Hz*9hJ&gmag2)MBx(
z#mSmQcYJ|%V(kqri^F~%MT*KHjFWbBbSpRKh}L1qAgFx5+ZJWRf0G4a+jS6#-iYpL
zyO%1_sRH1A)QEP)0lZ&=6A)h815)5Ph928Pl6n<fv;9F*N5T!;!`#V6k45&jM<n<R
zf@51p(C&!-175VZJuB(i_*sGNUlMGCING)obT~Mw!q0EuXB6R>Jt%i#w3Bc8JO2R3
zqT}{JP;>5v57CLIsiegWhp{#G?%z>p72L3=`=rp-D3ra=gA{VMgCTqN(|{A5ypFJ6
zy$*1)(?j{3Wq?zhy-0W81=!_G!FXvO<OQ7S+y(pgJlgE&{00TG58DVh-T7B!XutMj
z!2O)Xs51MgqkwaqUE!#GVjQ?0XZv`-lL$|6UeCNH6Q1SFq5Yfb@?tHP<**=>aXAFE
z=(Pxx;~<fEAHbM4mKNYT96y7SV2@(x8+)!oi9~a-HSq_8P!}J<q(y87Y!&w)t0++b
z^EUAY1o3M-7DD_T)#wn@@Es$v5oM<cK`U0+QS>-*59H&;P0U5K0!4@$kZ+=x1Gtf}
zp#3)%?IGVpJc2MZ75rZ^k_1PPX5wpj(p=n(ypqLIG=LUDLoO}FB3Ni8I>sTuq8lu?
z7Q12R3XueV+KA(@>=Lg+x2@1oUG2ntc-3CaKsZyyFzBWU9l9OFo%p^|+ySkQ0wapn
zNz_5Iv)Bx+E@CLc+*PnEb`xzu?=EhJZV&Mpd`K660h}RLA(x(_9F@~cq``;YqBr0^
zq5yDT;YZo85}!k|pV$d{rdSFe`it?fHbB%Mmn?BTWU@p{<dQ93KnuKDI6=8aoCYOF
zEQFR@{0yyuA{p=?(F5FEu^Sfh#3|IsU~vNQ5D|+Qdc=2-87eXm!(k#1-^0Z_kjWSA
zQN|Hs54^or+=hsa6g%)e3euW3T2!J$W5ff9##r%3P{xT2XpI-V6T41a4es?qhwcP%
zAL`-;aX;$fM)5SXCyFnT%Or6>>`xXeQPL^mTf}Xu_!U~y1W&7{iw&U95d0Ncfp{0+
zGX?+elS2Gr67K|y$6)6s@gV54#EbBuNcd3~H;Zwg&lXK!XO1`uf98t5ke??y;(NYm
zf>JLKw;-=u1n)qL#ZkzYh(++nCmO>}sj$N4LeUl8E)ws-!^NT{be9Oc46fZO8iRhD
zNP)~!F&(<Mi?xXV9pVnyTqZd7`^6K`S}rP}b*Fd&^fECO-{s;5_+KG(<hw$|A;*=1
ze=%T{_!H;>@o&`ZT>^irSF02$fLDt#C{dLth0NXJ7<{`&Bp{w^gd4fvE53*1ePR^y
zx?jA4m_Hy|!SaJ*DoXv3co+8nAf}<b4~tHad_+uug+B^AJo%I8iyB!g_#cTpDyq<C
z9utj`<DbP>psW+SVCOI5K1lvmtV1dOCXS-)j|={HjDHtjBgZGiLy-T6xDu50Vm!2-
z6gndFl(2&PwAhCn|0&$~enxbGx6g{H@ccRPA}ntZC*ke$g6oeLL}%Ffm-rdqFN%Kf
z@Fnp#NNyAZ5!+2-G%UO<y1<iHL?ghjisulk*F-74Ul;umpEtx!(Aq49LTih-1^!fv
zKCr)43<Uj6@etr`;#)*xyU0T>JH&^e>=Y#^^)7J(N>?MU2Yf<QL;j=~3GOMu|J~)Z
zSPJ-z7y|CM;&yoZotTZ%eJ>6`@(0l$<^544qU^QeC**!s?1!J{w8SHD&Y8*~GLiq+
zjI*bg;2gN`yh?(bfjb8fbU1jbA5{P&jrbKytug>{IRJDmu@N$l{c{N@iD$`QCk>21
zlZgGxT!<t#p}-ST;3o<^D+NYU;5iD!e2PFGjLYawPo6<$alI&^Ip?EraebMe!#Nec
z#a$&mcBVxG?ngM;c{7yaG6}n!J&{pdf5IJ|LuqFK;dG}LVTj8j+|M}?-*MT5bDZm`
zn?u;+JcKaExe1SQz6aOh1`?j&{F3?RvRbA&uVtwR4+o4n3Dp?qp`Qz!Um)ahLkatw
zuc9n*a?V@qbTQu%-9Yy{S0mza*G>R@r<2S2xRIk_r_6aT<ws8kyvn(m@C{qRUE^#-
ze<scW{b6SYsxEHQBEajM#Vprk`mo;lJeo}0l#d|4!I??>Q#mod?7WrnnMQxAos;Rq
zjN2i<U5h@14C3uOP>jay=tGw#T>v{AIbb^+q{pI0HF_g!m()xkO%mXZ!*LVA?r_H8
zC<Z8Ht4!G@TA~;ECIlV^#o=IOCjJY7Ot_1L#60AeP$@wNLMmF)z1SjT`8L>1wJ82V
zG;tg95v@o`dI7CjZ<hn97;Cj337(`Q@J??})fnsRev&}^DT4U2U(&Rs9JB>Jm9dGj
zZZL_B(fUo|dV|>P8MHF}${Z=V&Lp;j=Xz&WU5qu+B;JU4>z*N!cy1IDJk6?5Xnm+6
zo-v8-5hOid5rZc2N%Tp5gd!d`iM41u`n8I9&?G*G#-)!`#JvWwxgSx{U(#9lQO1T?
z-n9eQ*FFl{$#|ia66{laS`=yeCMjPEtmR8knr0|+0@q*Br=!ud+5uWS;3+<X*|IfO
z9{PBTW1^wuHy9hJ^_u<%Q)?Ktsv2r#8(QlO#$jr0*55I;*n(4@X{hDGI)@&<U@#DB
z`RLWU9c7bV{*jumH`JVLXqpW3g#mr5KGxKHlbZVt%>k->dPZw~T#R+Q5#QGOXv<P$
zDZMz?(2MQ*J+Re=v5Nj~FbrrZ7GrN?giG&_A?OQ3FP{=^OVH5u=Vg857!0&E`RHq#
ze+z^9KV<zJZmFmo9{A{MuR}|1cL!V1KXeX6r%-_Q1#Bx%>RjMk@7;SxOBU$3p~|BJ
z{b}6;y;i3|?~jq7)mH!(07!8f*<T+~bnEx}coupQ%)9y-0tIwD^;`O|PG4u(&H>6t
zU%M6N(_S*jb0Av<0>Wr@x-44S&Ikq<6_SDXtz7#I#v*8RFbhjWOYM;eyDRh!#*xoS
znGv(f!B}+#WBk0qLgD43uhM%WFs)jH_asZ%7{ET3a=Rf}2Fqx`G1mLTbvw=$$N#|v
zO_L@M7=kVa?QVU!X^#JanlzV&?w|7Ye_<|7H;Q&2@_ZO}kgtBNme$1}KL&EOK~6UU
zg`n%bTI*x<3@vS7g!)JI>a!x$Z3qOdD)mHby?SeXf~5p2{VGHHNo2+ysVw_iqwHG8
zM<dvh#lPXFp5`q$(kzjUa9VRka~nK;?L)BD?hCt=$Om;aqSEQ_90YIE$;00&(^3M4
z8UvsTkI{cDq*I^6mtLe-W6#XT%v4|dOW1CaPP^5x({2ImK$^oFU$tv5^O>zvRv(pe
z+%R%cE(0K&`W}S!8}(_1z$DQ4=xb-7x|R1g%3PL1FnMNCF{PQyJK<a=$<iQ~s^8|4
zx*lfqKKfpxnDUh?Y5yz+n)W^MrC%lOS?-<L`JW6<KfN~u<aoQ!&`PI9fBhhA$&oA?
zBST89!F)?aF2)))3S#oP;y(08JJ$(#5CQq<S$ccSYOS6GuR9F1dJMoAT54uUu7xP-
zz}DzsVAVXdHncD`o|ys|a+IlTeI`wDJiC<^+8GwYz9e1jOD}^THgJvpoaxJ7O<#7>
z(lwX!1u>9gt0@pRm7||AeK|!7!yEe2?qXji8T@cu2I>RQjAdM!VK$a=;lev*c0*rQ
z-F0zXOo6a3gY=~|#kkC%g+&d0Nx#^aRR%w7AWz?A`f``)%d@ofz~y`~<6;VgO%2u^
z81tkrAJW3QhQ4H9?91~8KO7g2K9&a9UVb%w;n_|~bwgj)G>D5S5cXxL{($MrFk0Bt
z(3jyC`|`QL4;vV+A2NL@h5=be57AQSa=w^xF$Kb=@^vn(Wn4DX!jBDonGp7+<wBG_
z+8D>Dq3P?_>Jy>dg>cvJF%_gF8eGmdvhSR^>w$UT%KmFI*HCq&{-~Mn*UY!Gp?UFo
zf`1TIJ+if%LSgSm>0g*u8e=t(($}yO?s+$b4M^{Y82oA&#hlRsLsS>S%KOp(llLa`
z3{}VK6QL@j)}Q&#{%^cDg~HyC)7P3-ytJ~Yq4(us@6*ijYcURKw?a$KJ&g@MMkmf)
zY39H}p|39|WcGLp#bU(0q$RT}QYig$LS`SK(D=&<nT?l1w_Z-jY*iHc^W}uh%A?Ts
z%L%PAVo0ITWrSRRGlbLv?QJZkb(cO3(tLhY2`0TMnCs=_G1Fj$Yp%V{30@8cccbQH
z2Yi85xWJGMPafuAkZzbV1;XP>s{XWT>J!t{uQavna;7*BaY{1<!d|86oCT#<9k9QV
zUJV0~Qh7O3rdOsw*sBh@8v}tf#oehIVQA`)mosI0WeON_*bVBdO;bEFm8Oo+)DxF8
zMXwn94Tb=4`RJYXBQ$k0c>IM?w}t{;uf-tLbu7Oo@M|)^y!@JvFC%P+4Xfd@cGJ6|
zJ;<{12V2s?F#u9dU(P|ZtfoM?2D<BuO;fj;rXHiI^OrMa)_^Gx_Ns@z%`~;sG<BS&
zoW@G$H%-j+$`mlN)bw;c0TGi0Y|M=#mpXj`q%^ynDR|YLHQ+J?!ZpxS@4@Kn-5PTK
zQ|Pty(_C8~)i*&sqZ|d%k9I?q^z@Zz`q#Xg=#_=C>)*@;u~z}RWKe?FQY}Q$UL_do
z_2Ux!0CR?3Ls08IFdp#wbfdWKNyDSB<#g5ORj$dOqM+XArbhUFS}OHr2kLF8gk%0}
zUr=S7rkHWMlW`h!x!Oa>uc9SWKxX`W4=xh4ehf2z#M^P~<<uG0%>69(n%?w~rh2VG
z=hyEeuBC6I_sewd<uj@i3Fm;E!PnjOWm2U7YiK2wA}`3+{S@;cGM1uw_#U8T@q#L9
zhg?xxe*rgp0%8RM&mOa<D<<jKWpE?h{}*^_?IewLMvuv$xV00dGoHqmVhzx)X4^Q7
z+Te4CN)YfRP?4SUDFm%+DP+1X<JVpIy5>QA#i65I!;SEA0#5_j!>)5R%bjQh$!Kvf
zcaY{7#F6kq*2?n$u51wz&Fv7u{H1o^<Mec`<CPIyW6^#!8^Q*|uCcs<`KH(@T(bhK
zCfF*bY&Q4}RxUYFk69*a?ujVSXnY!Jgh<Sm-!Az*SsVBf1~h&wH<Ibp27Zom@sse$
zAP?fqPgIqj%RN6o10P2?`AN(l6hhYg#7x)Stbi=|V{Juf(8Fl_{KU+*47?A0hM&aD
zK}(PmKM8hgPNT=fMZbb~;%}iK-+X);X@qhTA4@PL_yc#RCUr(c{5BpW3K^sbp~zp!
z8$uC3l?UaD$5Jl;dwKB1WAPC`pa-GxV~H34Xx^#iO+-;<vN(U#32N`7lA^R%(8!I8
z=!dYD;YIW`gu;AIf^Fe_rR^X)g4MWumaw{fwmGcob~<V(1=NMLRb56~)n#<Fx{S7}
z%V^6;bhqe-Z-KOBELwN;BLwY^NAT^qn>LIaViMFryFDWT#~kvY-QMeFkkvuEy)VVp
zLA(7b!in;r-QJI|I%v0N5>^N8_Wp#`LA!kbVRg`M&myc2+U?nd)j_*Ghp;+mx4Q|e
zgLeBs!s?*io|^{O)Iqy_FmGklLA%{UKh;6IeJEjd&~6{L7_d5Mw~rVPSRJ(6ubl)~
z9kkm=X26a*Xt$5%y_7m=x8G0(8FkQZpU7WJsDpO<r0W5zgLeC5`k)Tl?Nf$8ULCaC
zr*;CY4%+S0=#M&Rx6hai`R$s82kj2~-@%A&hcA1VI3Bdy9WJo#4$|XUA@nAJ)lVv~
zt>bvmZg&hJ$b)vfV+=qkJJ*zLq6r?f#{?FGVt24I1rOR|?jk|t!B|YC1bNWzY)SXx
zUjpkXd=j;&KO?a_)`1%J96$%Z1P|Vwttf$pH5zRfjk6Z*sZn(7dwBIkb7rA$$L?i_
zHRscW_Yt-@H$pacKU-@QiVcm}0|#NHaV6+_U%C-v-RlP%PvaaC$5AoH`nI1W5L;m!
z(Z?&|TYgE?#10atktkZAYw6P^*oEMX1@Oo2V3y)DiWQI`780B(K`ssTLJ4w%uX`o<
zDXBL}@KMUnlHh5AMG~Bv1n_1F))Jg8!PikHeU8ljUdqmuV35Y<N$^He`Jeh|g0rT+
zAW_yKqbB~61VV9d^780ONe)4Ixo|5rWW5Z5yle$gTGUm58+WGGoh0MxV=2V&G|`#O
z+ZJ|~7;CbhG~AnbY4wnWb=>gX8h!0~CvHck*Gr5>i%ROCaPl?)Z<fr=zO>LAt+_nT
zI$|jREYO6L=d(axS#-=G&E6w?RPyv@L+H&h3oAiuAy2YntaKs)O|GTZs<;t`M11(1
zK_K*yWjHt~%RsvwhFkw)FrR_ZD|l49c$|{PAv={#KId9K`f&??*dz@+NdpdydwjwM
zULUOph5?fwHc(@E$29N(4K!_N;G>HTnEbGT6P5&YJL!RrbxmtmLj#{(Y{2A)4V<)$
zG!1m4fvyb=tiL!0%ME_mfW^ATG;jkAR5divdQ3P5YY^D`3_d1u`RLJBb&v#J1r7Y&
z5SW14L@nqUSMWyUOuZYlVhUmDqpaAiDHzOB)`9mtt!%lZ6|FuRv|<W{3*)d(Hm!V4
zEB`jE+@gGmv8InPGE^<%TZ11qkYs&~2H2!*__V%Y2!vb2jTaj*`C$XitcOek88i@M
z#3^iG>BR<2e%L^Bt4r>Bp*)!e_?ix%uz>|(1FaZ?&IaFwo{gWo&!94+7@+bHgL!dX
ztPER_-C~>}6m}uO`Zv>smuO{LLl-jZ4bTOXk4`TiU06?>ZhT1trI&QWV_3NY_eCX8
zl+Ku<VP_Jp=`lu)#5abm<qe%_P$MQkY@m_#7Sli`4OBHWP*`6YjuIvx<CrQ<W9tj1
zfkGO1q@jWO8fn9D{K?>lJveRoo(5Pe_tL;W41sW~{C>2NmnIFEd^B3+!5K>?MpkLy
z6&l!V7`V7vZQ*jb@*u_M4=~YooPqomh!=LyDQ%5-9)pgl=V)yUBKRvzJ`c4GesKi<
z36syu0E2H1DYVZmy0p&&Px3P~*L{ZmGvK>EHjtNz95awx5h~Y71KAD^ree-Xa*e{R
zdOOZ`U39Je!-%2&Z%cI=a6AvF1iKiTNadZ62B3x9FCLIH7=AT~$)knbb$=i!lO?5X
zlMYJxJ>+*QNN^j?kUpntZQDjLc{N?n%+T6)Gnk)3bAw`9ow{FZ+b=?kSJU-cFgZAa
zdHf<~hSqvagh^;gb6VREjAAmftx>Led#JXf5zK7Gv^9#Tw(leOlTChowY9bwS<*NR
z+ZxqZnbve;Q^dKYg)3fvdle`7`)z>w+QFRi%b*4cF7#N9X&-RPPqC0^xp!pqEUpMz
zO9NM+wKmVdE>pik;x7|_it247{vh&d?q|ii<lJwEB{{S$G)my-WdAQqHuj6M4-`V6
z^}Po3;y$qY;-2)dA!PIyO@Gl+W?H$IR-V43mB+(Y+MY2={|)?o5~{2m+;O9s#8?BS
zn5%iJiqS$u!qq1dDK(Jqpzm60AQy;K7>EOra@}hnO^E!(K-yqQ;j)=UASc~Gt{^fv
z5*cqG(t|Aq(ivi^6J3XDk;_4c)*;BcwOJ0gQ$9bW64WbKXG!U-2%B7yy@3cNanu6N
z?$`%lnv1yILRss*8<t&J1bm1Qq;yu4u%wiO_7pxTOYn6U3fu7(LqeX+Lsf-w9KzTF
z(R8GzI?_9|akx?)t`5CY@73BlMx{h+u7!q{EQc1)w#Jyqf<$W_o@7C`>Fe66639PH
z08n514uo7U8RUVC)xJpNWF!(}gh7g>MI!D<WO5|3BocWr5_vunc_#wVI>f*aeT2RN
z2l9N5TU4sA<)oA3S6p^D{`H2WVTe7X#{=)j0{m>K(apAv+bG>@fuv)d!*O9Dga#RO
zDKyGJZiLVjB^13-bK-~a9OL?Gu3I9cT`M9?y8aT$*%-<BIFfTJl5>Si`6T1m%RuO$
zYhDDW?TQFaO@!<3MhLmSiV$)&ima^;1|kg)jo`E$AHf-hh$1GA5?S2#7R|LJLbP>7
zgy=<LTBq00U~wg`uZD%r*TZ`tZ2DRUzAT{k&=(l>fI5<ozSfC8pOjC%9{NzwT47Cl
zCD#F_sK#EAp?6_Va#|Z1gT|k`t~5+tJc5~gtcs%9HRRtd=)mbxZ>LW)RIr>da%X=}
zT1-dV$=q*3?%kOCOheRWil!<LqQ5)c7o@I527fMe5rq1@y6d#Ig+<XYX!DVO!UU<l
zmP?Z!{L?Y|RtoS8Gkptso4)N9pfT2iek6D@<ZENwZw8o#qs1Qlk&V8C=m$W1%9ofV
zdK~_@)Ot*X$NEn4=cVB6w_k&Dc0;y3<-2OXQl<^imYU0LNG*jwS}%`*VWgAKtc!Jc
zYu!?7JuX6r-NrE!EtLOX7N3<c<l18(a*S<ch~EcJ>vRKo3<z{>w`;O?y5GU3aUbL1
zhx2?&Rf2%^1+VwBQeXgx-C(>=PgdrGy(!ZtnFW7{a8wTm;Xe>w4Y3~b<&}qNwgzYh
zUc7spg%|K5)sNBRehhy-7tr)Qr1u8eQtQjQ|FhvnHKg?Qw}Bz&%^}ciy~*HR-0GZ0
ztK?dIA&j-&W{5p$lr?VM3LW&mJmFt!@N#JW?^|e|hZH3+e-&x{rU1h*^{^rLB5ZsK
zDaKo^u&^f_jiq7R{SgvYl%#<KR!udA#1`0SrzB#mR>NDZ^^XSo-^xwc)H1g)BrDSm
z&TzVdM_<dCtGA5zN>;@~aJRRN@yby^e*_v4%{yVFrPiN1yiDU0?n!rV05jz(u)1Re
zOz8?>G>5{r!wg9lc)xP?;sSRpG$a_-lS;y-LfiHhgT<1@!6af4S<>4Kc0@@BybUqy
zG%M>QYaSYvbsAesR<tCK2dHHi&6}ZFyO3<<Os#lb$h&&#Le1KZ9POH>P>!0wfzHbI
zleGx0MNN1BcvidwUq!WQ*Qh%dHa07_qgm>Xg}jzp4yQ5mr&(aiM_+pdEX(b*4-t~X
zqA8Qe){|oni{{S$&s{qh1--a|ntU`IuD@ViX1E5m#s{N_eDt+clNnYc!>)fc_{Q#8
zsk-ZLDF((p<~08xD*jCCbuf~TPn^6l7?|`}li&QQRopA^^+JAPKX&s)F@9n{aP#_H
zUZF3^<=K^Se&zla=J<*IB$vAqV`q}f{fMzAar4fTpO{*AJQ9BNDeh4y2tWEH_a4*%
zKl)U65EOo5KFDQ#@)L7R&ol2+2C*i2@foKP%54HIe&YLBa=U=QPkbv&ZVpm@;;*m_
zv^{1`E6@g+cRO+NZpY2hR*krBj@D|#&ix2F{KTBKxc`kV&5u6W%~42=MDDKu@?&-7
zn%6Tic5ChcDDe|tWYHdW@nDxP>KOMLd?QBQYZzM+^Ot$~I7N_m8`gvU5JK~AL&6R2
zHvZddji`qgz>>Vyh<b#e-SIHK9aXe%Tx*b^t~G2K@o1&;TEo_>2xN7wVe3nAb**8$
zim<xYu=OLXt~G3#gw?f%tv_LPtzjELSY2z_vIwhd4O=#0b**8`A*`-7Y;MBpTEjMw
zu)5Z;<)*?lb**6=+!?UC*06c#r@Gd#4JE9uHEhEc0an)<wh`k1t7{G0wG#oWYYp4T
zbl6eX8n)3nfYr5z?S?xcqpme<6NiJYt~G3vt^=&DHEfgVgSytRP2s4kt~G2^y8%|$
z8n$WlM_p^!W=w*-ajg+;e;kb1cKEWH*BWiWwmV3VXNAz41lByM$v}*2jll%fwZ>?G
zQkH+VQOX+E8ukEx1ZQ`!GUc^~{Vo#ZwT8V?g1pvnw4{6SFM`E)fN`zy7!teV&!9#<
z3(&zYd9C4SMTthyG4ItPl@}Q?dl^)9krA_xu)4^I**}8%>LMfNz;4Jlz8Pbj-i0zT
z*7D^@@HCcp5?vMXPLs%YnDwh@A;wzeryL}o#(F^Sr--ZllBP9&IT^$}rS3P?S2Cl)
zig<@f>`3AeMO<nUAHcdy_bB46Cb1VKM=RoDlXxqMH!xH&)>UTieD_|Tt|S+llDA`d
zs23@s&m@i{@fJlaHi^esq9tsJ2#9G@-q$Qwk_${pdHWGyLx{1?GKumY<gQ#voM{qU
z(53s7&1oi4Ucx-K2BU9`b%H^(I~dBw@>1r{D!VbJyu6-Sr--9WqP(biMiH+yiSo+k
zSw+k@i5*ydn-p=FNo>Z#zO0BIlQ@WBc|{Qio5Y<A^{a}QYZ4!(<ZFsJ&?HV_VP99o
z9FzDUo5UN6c(qA<pEfruVwOpKoPKUm#Qr9+6(y?`v7bql*Jb-v0MkvPyfQnWh#gI$
zygYkf5nU!xUZZ`Wh{+~VUZ{Pjh>0dqUaftkhz^q|FWC+%qGl519oxr>c+PA*@(%73
zMLc5=8%60yUWi5?oyrh?#ah>#1uXhe!n(5&qj-$4#c5?NeNEV^#V>)@oA}64C0T2H
z9hu+IR*co<hYX%3@}@3EKPjm}za(P#;0V#=AI#CIt6&~BcunO`db0IvAlg*^lILm#
z%OCJuqhR?1p&SLv-vzl9EPu~4P{K(|>CT6-Z0j!e0z7k7f_3jcOtj6iS;`M%nSY!M
z=WW~AG!9C90`TNMhFWtV8==sGd!t)g=;Q2IZSl}RYdO*o`2fwL<@^XlOWMKwgYtK9
z3;H7qJn~P*A=TG@idnqbpBdSplli~oLjL@@i(Vt~lf>5&KOyml+5&%t@j5B-BgFr}
zws=b7dF_Bp|4&Q&6!CGif5yq`>W@>S<~>>7Zzb+b1@5H%?<78u_)7A>m-yd^A0qz;
ziJv6Cl=gm<C7P0k^1f>nt38};dHVolgQtfJ$Z7)_07Of&Q}3ymiGcU^!51F+$M}%y
zYlmWqs3P%H3?uO#EUQR7BXN5N;7_w=o|X9RR|1!jc~0UP9f8Y|Zirz?Zzujfb9`Rn
zvpWHoC4E8SUl5li{g=eA?hIU(^hJqpCoUuXlC)pm1^C|?>5Y>AVOQYq(VtBcf3h2n
zH?o-D%P}kq4gha&p3IthMe_5yW9{7sk^EaGyu-6M3cM}OK2Gc?M}fWz0<H4^d=KD?
zcMYi_F4f*j(CTnw&;m<*r>3{i$HZ7yj*)io)$;nQ6ew%pH3N|~@UDTd29o*TRPnja
zg&!;<Uo_+xYsc}D2KI9i>_3|9Sz&gX;S#l9G1-kxcFQ{r_6)F-?~jl@X38!x9Zvo*
zf_*`;u^H5oT}De{7W^Xz(!p>R$@vlN0l#6loMW)%p_*Lm+yEgtEY)dAe1BM9E?eK3
z-m1t4RD#ymCeCbq%VljR_dxB|vUbZQemC(1)_#S=`PY@3zrxyHA!~PKI&e4nD<%FT
z@Z?EGBWFc?rQEgLf!ZoC=(0|#B7_>j3l1)Ku(E9>@(88nqY=_t8@bh)6SLPS0m>vF
zeeKQAP5#s%uLUwr8N-c@D`b!t!4cS3Hz;l7Uh0OJYJ-V^%`io6*RBXt(197P?aeH3
z_Za;X2(;r{tUxA0sXbrd)-x3R6NP#z_#uuQy<%q2aN94)IPK80;-PJ0tWNV6k6OF?
z6g-ZWWX!*FNcbpo_+G&>wm-<lNP8Lg9~I0WZt1lS&ShHLTZnw(&}T4*g$j|DJk0tt
zX-P|ZlgJZxW}V~47asZdGLh<Qs|6ZDKf3*dovIZ$HECW%e7(ev68{$+ep2ESdIIO0
z@cL5{zlXTI;CWi+aAhyxtLe%=C4P*!kM^FCcwTSdFA;y%&S7f?YP<Px+J8>k6McbK
z(&G&hp9lQ^>h8_s<0y{);aRnhH9qidSzIz;8xt(a_az^)B-@g8EZUVUfx}o{t>g{5
ztlgClY|Gdjxsd~TNC>e^5^|a&38zg6IS3{|Lc*C7LJT-JF$wS_A^g78T{Sa1yW+_6
zJntXxeC+M&>guZM>Z<CV+0pj7C#n8*O>dn}<~*wuU2z@4PCam0@X|3zCG@Kk&x3k8
zA!jVW&3@i8CR>(I#CaF<=xNc)?c&N5wDqGu`C%|_<=w>i{lMp$AJE2a5LKqH1`}M@
zjYnk>SM&n7k}Iua(NfEm{rRYD;R?A}-ZoE5?kBlI!9ri4P`WF!@@{7I4dc+^Zf}Rj
zJRRtbOw%Fv8AfjdpA8y~*DS0&v5?kp1KUAYY_3p;-0yIOwD=@5onz(x#)CfWpwHC5
z-D+VK<4}XOXFf6!Q?O@v2!22p{VhLTfg6iqjLC13r|i))HyN3EN)gTc<+@%)_21LX
z@6+`=ss1E+&VD`fe?<MX=c)aQ;lxWFIMkQ70q#UsXFfhgm*JxdO*-YBYE65T0;p?v
zfac-s+2k}`nw2&49Fn_X`19~)x|W&(TK<l-3{$@in)If{&_V}X)9_D$>bxbGhu68=
z{(My4;>tCsoHv$-O_is>iZaJiD?iVJHYjTn{n&3{st$rp1>lTphGVQoO!wr=uvuh^
z1jNpIfRvu9)e1z;$1~s4HGBeXQ;tGd;0#^A2&0+uEuuYB*ALL>-gga&`|~i0`T#l8
z*?%Wf{&|?r4?1A~svFPgAi|Rde;UEBYS@}Ye=`s$(nPPkkJLr9=9n^YBL%_a`Y8^@
zj%85dX;NaY?lGj8OvT-_-*sGI`jQcIZ{Z3>AHB*!Mp|g)-OK1Jz&P(AZ-=_srZ;t1
z!5x-Zd6zJnI^=%AL$jG_7F&6@dufh)Xs%+KMONM`9vW-XzsL*YL&<hU%Z*(9OT_>K
zH<GBy1un%gjC9Iqs<#g%;|9=U%1z|=9lCyk>e}F)n&X`-@GO#6lsjmvj|=+&eFZKb
zN`HWT#;a(%Xcd5$0qh1a+fO-T2eR9YKKh^^sG9K+`Z$1(Gw)}f@5f9So3gOi{lY#!
z^l=e(lL-4h3G-79E-V0Yx<nX4$Bb;}Dni3drod)?=yIe9J+c$4cw{4yXlMH=2N(7s
z^rK6JAqb4HYgZB4W5#EPepQ4OLWVYD9SQSO4leAot29eT7>(?7nzQ@4VJs~?!-vu9
z33^n$BIwfqrc>+S%%AizUnI=`%nhrE`S@Wi!u(sp{CQ$dt%EZk0us8sX40CU$qn7a
z{E4CW3-cjZKMKgxMog!s!8y;*!Z~j_hX+M??rmJ5<>3YJCkI@BRgBR;%0*B=#}&E}
z%-gfVD63b;|KbYWqUPS?X_*Z-B3ARP-0ynOWsHV|iR|38{mos@6=J%DY3Ac5)q~Ev
z(%az%Ps^vd!(3z&5BheO51sT**Rp)b`niYZNv4@+<sJ8+^Mb30+;qsBze>Y;1<hUI
zsf<Tfp+REtUB~Ec`Q{lt(0T`(XLAGDE;r%nT+5vy`U{LE_44laR$lg2rtoAEnKkpf
zl=hz+@;q)a>C&eUP<bOw+2oI%p<8LoITOxemYx@eP_Fwo>a;NZR@Xj`UBmewklOpO
zIu~|GZOVF*Vd$<#i@9|@KBO94wwI%>*Nzu;{pvNS|DKlbmo(oq*P{Mu>i@EC@27eg
z>I6>c_Eqapf0o*RH-vKb<rOq`+z-=5%T3-Nyp_vvCrp=axxrhxiz|A)8gjmeY>~Ip
z#mkyzaEqs66`g>=0>4nCMSr2`ug^&U7`X9HsA$IhYfTZXMExOJIiAz?gQ(}-#odT`
z?vJ@L1(jv!4OhU648g_c2Jw1X-UUTQf?h2z_EwI1D--5;$ToT^xjVQ*o1hyE`<&o8
z*jVNyv6kHAX@%gN;JMsl73uGyjs^5EF`0DfpTkEPxRI<k<q~`Z9?{RZ#;!+Q-vT_U
zdvsA<FNlxn`d8os=9b_`0dj}8YEaj=1V7gOe^QIOz9o2E*Xb|hr|4UPpJ@8ep?*4T
z0~f)M=z1J^EO4`;8=^DlJ!bm8FmEk4l3mSB#0I#LzG&Okk#jqd(@n%BAfIjlX>KAe
zV=^5o*p={j_2j?B740y?S;B?GA#Ms+bjw*>q5HHv(NeeAUa~f>=-Y^^xuWGf;3Yf8
z71}fAz3e4>%|n)Z7NUqQ@|~>+COw67t-M0UYx!%rqNQx&icZH}Ua~KF$Z{X#N+B3O
ztQqS&m!}x5?_6H@b{NeTqz?aZI^<4aH08N*a2F^@cP=v-tyNm-t;mFF&9CPcT^aDO
z%Dc_m@*r3AP1`G6(X3}8YtW?`tmF!{<bH@Nr0-X?V)X86?wyP#^L&T(U1**86Av}r
zlObw~{z}Q{wm>)7ADW2|T)c82KIoy?lpnzkfp2Jv>)>xw7E&7crjCb`RM+oF-l6No
zb(rS|nGGpu%{c=8IcLWKDq860+I9l<Yf+!4zlT5j-W<HpU@f36i~PiCaRAM@0yolA
zKfNnD49<G{GA)ePIo<;CR|yyiH>Ep?g;M~0oPcuxyhcDFfbx3i^WQTJH?mQl#mZ5L
zELzMJYOxkjT;|UOgzIcmKm&S}Mu+B2#A^|^>#;4M`}<Av3@JCDM-}y;=p5ewHR=Iu
z1(3Is33YJl;T~cP?5VH7jrUVm+Tr{dJ@jx-+kkIcX}H#68mqOK25K#)QCf>>h*tjB
znGNrwM$qe5I_+YL@fbX!AA?&9$QK@9(tn~KU4a{~KMR8B8GaiCExZ%JFA4Y#0Q!Zt
zg^vNa6~GeePU~t|I-K2v+(VcdFF@-Vf1r=Q;UibS76j&G)fJ#7Ps5Y0ug)il25nHF
zt@a?hHElh9dCK@^UL!Y>#m?O6p``p^sEROelw7O|VvY9^Oo4$-$;ZIrXj%t77pI73
z;pO=J5>@F(6s;xHk$whygpmH4hD4YdN1@A%@6g8&@sam+W>3o^swG_2Ua)io7E=0;
zm*tkyUjysE2woCc>by6xG_aKZ$XWlP^RmFQKV!a+<NqlZK}(NL#!n>TKi<PzN^k4w
zH}(nw#qw^%Qs<qE#rWAAl0*NC0!!)TI{F`&jh{&#7nnX~!bmmdv@zoX<A;w0I_F$#
z<j563A@UYj6%+7f?hIWF<%S^sL~^pF#w;DVY$P=gKNTJDZ7~&8A2A`I#*7?E%>h(T
z8ST(62HD6!pke~yM@<9QLSRPEHv~f~Caj!V3`>m}5?C>kcnOPB&jSTLJRZxWXfvea
z7HQSSi$3`3X#!}8%fx9g`6RbP4u(J3t*)F(h$#hul~eUlhR&Q?F@bEbD););Q%S+x
zp?C!YDnPFs*kvmEda8M61m;Yr3)D|(9N9FK$WI$;&C!IXe`sF-cAW#<86Vz<^Qv<X
z&|9KsQU?+s9nR7n(2|c1mgz99z{;u*G7GdJle0GG@JOf%7Uz1$kv59yq7CUd!$|t%
z>ZzpNOw*)m)Owz$j%PC-2^jwQZWVj>kr+5`PUmCDxa%B=;f^1Un=J1T5wSEtnzkZG
zyOA@e=4-E*!^6=YGnY-PEAv>8uFQ9Prj2TWOGE+|dIW3si#)S~_QhHg1n3f%U&REY
z$x;_ZE|5QRzMlPMu&Pz;v}yM+9hSQ@fkainv+B6bN-_#L%&LW$ddn)IDJ`DbImSdx
zC*o>#ItqXBorV~SH<?@nRwK7U4nQ2dfm=UiTtEk|1OWx1a-&$n*M#XXH;Q%O5^>N(
z(K`gLut(@hjE$CH9wWhgsyi_zLdQ}Vj++p06T)~e30Y_YBXj~F#Kd&7r_KB%*ZO2+
ziD>jCN0{QWqSjouiU4-GR!k_?lblDBe458sbR?fHk$i^44x-l+$!B@IO?U7Huymn-
zI$K)>(|L|7I&CoLQXCQGbXQR_zzmmu=G3$vGrh{Dhb-}#<?U$P^?cW02wcfI7o^4d
zZ10E=#|{_7t1l}SvZe@6vT%{73dQH3N=cGi=emr<<nv6jAZ6#fIe=JYi)l`<CZ<i&
zS!|MyCz5?8TIv~$?zpS~3lb?M$*0&AjCV%Ss#P}8Pl~N@M}gNs-7$Fc!>WwH_XRq_
z+$4bX;2ufg>j`g)=(G?|4{n<L|DOdndyI~DTBs*E2F_fAC%eu|F5(YwZ?H}EL}(rw
zctt(U6-SYEx;K7kuFsHQKU0|DyEj*(wBVyS$5O}3=QNi}9LuvvBj{bpSfJes<*Dh$
zmuDDXp6TV3Cegbj>-hHA1EZlu*|R5kpO=rUZx?vNL1!y>xz?*9w4s=0Hr~Y=GnA&x
z9EZJ53$jwqg-#svxH<EN)_kaFEyxIzg|b2}GSkHN)PYULSuzr9s>zE>)0aLxB1%K(
zU@CS|5cfNU#m_o~JHbHUpJPVjlYWWaqIzK}(Nh@jjJBs*VujlmFSHlVpWPnsOl_at
z)|o2Y9LH}Gy*)`{$2(CFlfvYV?idrc$2S+YMWdP07KtKhA}wo6b5F~*=AKwV6iQo(
zWJ|njZow8(zct#KY-c!;Y)%4;J76u#5G0a4sc6zp#yesO{5=YgFa=YhKX|poT7ku_
zSE@6PDqy6Zwpg;OJ84I|AXEz?2BwKQuBoUh2Ljw&NNdJaI}&!Rr>7k(4TFx3=1xG+
zu6T1Q-kzKt?_5EniFS3ib~bC~G$q!E9QiRJbvzKrQ`?Kn=3UhAk{S_gwQ%mrmGm(U
zA317g@FbN{m3L6J7O1>^>S3$$;;l7_Ip1FN$>#XLK-;w!FUeoIJ~1bF=;9T3tx_M_
z(>P({SJcdts;Tm2RghG5mFmVoFkc<tQ+fBxcfYLOu!4<OP9w(Z>b_PVW^t=}$U0fQ
zq*^m9j5Vo`?>SlhM|DHs7?inlPyUdAdL)pn4eQ!T)E*Bss)zOj#{&^Rj`|aUBT{cY
zg8I{_f5+4QGq<kWe~J20Py2IjUAMo0I`iLf5d3B(A!$Pr&`W_}Qhm>K^)>w-O~Hw(
zFz39$5T$P0O=>@x6D(NPhU($nt*HJSRaCyXyBL+9<rK7CnlpbwMQUzN5q+xmBWmJt
zwLM>*a(sPoLU6(@Z511nLx!lch`f0pLFgY)vBrzv+!nlY;@_@Xd@dCG`tC{~f1J~}
zxJK8A8Z`}*H3Vk-#b~&7_tR+jsV2HrYa?(Y@XzD~k01R2$iA>UNS%I}b1;WO`(pUA
zvRWv(|L=nRJ;rcmtoxG!ryx8~PIUKn*r|ACu*bVh03ib7oo#k&S5GqD8jn%PdP5l@
znVA4MNMRZmdb@D#?da-`cC}E<<4O-%^uzGcf<!?9D}T+Rj^+d~9k=ZXU^addAaA^F
z56#RO!N&EUO~Iv_`cW%vT-SR+<meyN=mM2Es75Eza7|x7sEdmMmQg<sM6R@=@ms-p
zs=NQFIx|>VJL}Rb?@%L8s^Va!S`#eZMDR?&B?#q}jq0|(<7)mvRh3lppFR{kdh31a
z)L`+msy#UVZ|a<2ast>tw1<50!N3u~N42^?(CQx1_@4%Xl@neE*9i|zOH7NcS7T2e
zy)Ia@KcRkNCDpc*&s-c_uFCq4UL3q-1%2E~A8OO#qmOP3u21x;i;okueNSqeS{^JG
zY};|6EmWr-0bHmi2aDGqZMyAk|J|xa?yGziLG{G0oG=;oPIVHsM|SPgaIuETMt7-7
zz(3qYBm0gD7OPW>)z$(vCckL;a@C1yr5c%3t;tu_sHbn~-M|0C!Ro@<sZ^6X`xw%w
zx{p5YRij#iy_8j-Qs=eqQX~3%kKVQk^}w)7!X6p+2P)Lp`*O~qX&v9&&~%HsuWw(l
zH!*+~g`7aey(*6a`|@2u(&pF@n$mkNBUkvLhVQzJ0{Gz}M0EFMl(Bv|Bv_y>?`u^1
z0|(Xk)@e7Z9gR&dz6fT4U=4lVLLbl2$5FSMGX^mZ50sziQO^wx1ZUimvvTSuZ$<AH
z)hWS)5OHEBi90wnXG!3h7cWwykoz7e1pbkoB>J|Yq~1?<l6nFY{_8_Yy&vxk?nC9O
zp*fcXaQG0?%PEvza{njk<^M2wAa&?PJ7cGSpfxLf*8PFIhP#lY2jmRwane`ww@VL{
z66E2#`t!Je8vV2y89b&^Nj0|hIu(0bO)Xw==)ezCiCML62h@(FI_2rB3VYWsUvZ;~
z9owZQ^{b0dR`saqtyqcsRVyNT>&bcVyCBr|)QPHfThteZHL6j;@%Ue$deOO3Z9TqJ
zy<i2AOZu0?Idat2RyCn@|F!DVeW2NjwD6o&tOoij)o-juHKjm(rVs05JV{`@Kuu|E
zM~XPsyKcp2Rpgjjh!e@cV_WhQ70d6};3#-I0l`^KZR-5s)2R<GTTW3DP}}iyNN5;#
zc-Yly`w@UDIH~GDkGiGrh#J$XzGD@rsvz+Ts8)z94DM4KD%GrgM45BW1S%32tyFhG
zwI5mq>#kULs~UA|@oMaPR<BXplXz&UwpYRohj*%-1;M$WQpw|LR8l1i`kr})I3rZl
z_JgXWSWP;3pyzjLR<YW!PtB@SNBRz{ALRu5=e#d|iP~AbQ;lm?&s)J`2h=IaWhphW
z_2`vNDRt_;LiL9|{c1$g;0p&-G+2=OM$W>~C7<3A{Jwg{dU`;OKZ3}_OnlEOFl225
z>h?Zlm>F)pI#?X+R@Vhis#o@${3y0MIWq&f!7Uf6alvAYGG|zD{ICPTvxBLohnIJ6
zRpa~B`}+^6F51)OsB!z8CUshH{6=-nj>DI#Q~LiAocJOVLeAL%wV+WQ+jCI8ZUtKt
z2b$D@zRFiIlEi-XPt54ZlOH~y`k~RQNO6h%P3n?HYTd8S>KDul)-koZQmrUZU+O!k
zk>FBzBsf7OgRS_S9DG`hDptwHHg#lZFn?kLDRu{aq_m1V_NkGrXTj(CCu|_Zt@M$I
z!?6o$!>{LT8>>d`E4puy8qqjVv0~ejl}oB-FURgkeLDxfGqIuS0?^~jZhXw94{}qr
z;bJv5crs7T!aR=Im#cOrLu%*K_+Ow#_N$c6xayRXlvo49`iFh-p=T&b=R8IqYRBP+
zZx8PH*}98butJ>7RijT{m};s}qmNv#b`;OV{|kS!Y*p$2(FRx0ryj>Lg3hN8N~$?+
z^r2}WT#Y#S`J$yO_J3l#iX&`B7ON@2BWm<Pm1yi&ql3vuu@VK>2dDL57e6E?=iISs
z>Or-k7(WE6KG3Q@8^}37pt=jxsKy}qb&mSio`P5FZo$UAa_;6rFc^<)yl;JQWqi9D
zapb;F3<TH14T6Wht0pFwtBL*hsh?TF%A*I49#E4C)FXRxX5nYrZ$Z?;(IywGe_~OF
zWvKbJ-3KpPs>WABX0Y{ESiR$V80>z;Q))IAprTu6Y5Aj#bH$ITGaJ7JeNKFUHsv==
zqDB9u575FSFlGB2C+*v>_K};vwg(AgCIU$h4F|ob>-QW{ryo&W#e}{)@U%w!DNvxU
z-P5Q(pM$(}kY)@k>{b}<po(L)ZQP_fS{GcfVX>OfxLlo%q!HZJ1`8a!;wY_RIXMf*
zsWFWR#Kiih{j@TFwy#w^WwolW^%biT1=lTZB4>lS)Lc#=cl4c9f3c1nrS&f-XU;fv
z9IpSuo?v5>`mTiuJLRD2twhx5&tguEz5Qy`L3Kgp6@_Y~cBsE=+hCriHmcBJstBg3
zuulCn5iBTE+Y9m+-Zy|WvFxP!BZT~6&*2p}-S%+d25b+INP5+omBA)VS<~!7HKmn?
zqk=Ed=TpH;gEu|=b2WidAy&}7gP#CR+s_BI536hY=#EXPlNL>l3RVQKI6ygi{K~D{
z3Xwd5l@I^?yXqo%$_M*S4h#f8f$d)Yz`&~yYi=uPYmoyJ>in#&Kx}hV>fkL$XBQIq
z0s1(kkslqFRL}1SHa@IoBcrLm4o#|ScJ`ACrqoNQ+<?j|s@x31U+m~tPbwtmQI*K8
zYShV1YWu!jn_dN{0FvXdMgVG96Meo#A3A)Ok*!A@QQHbYqSm*n?<3oP3z__TFxeTc
z>QG-&Jpypz$&^|d#K%Kc|BLG5ef^gObFWgrwf3d{uKv9zxUWfF894m%GXrXDKX~V;
z``}bh1)hFJjVL|}Z`cP?@{VGZ#kb5}zd^mRCs>(Mr|m<k?I$1VsZ?Y7Riah>2<bP!
zQLPIe4E{lVq%U~<5fYG8hl7XVQfeDHmfF^+MpUZNjVf7;rG!R<ZJsW+>BS6H%Gl}(
z`p{{sO1Gx85#Xt&c0`>~puT<S5zMukbX;AVlT<&)_z&zpax0m#5_v#X1`A$Pm-N2~
zH~COsfx0PhSUoyCsqWZbjIwxnLLI{T`JzhoA5ahONv483QZU%TYkT*jgWVcjf7LFm
zfx8N~sjhu$9NfGG>HMwT`*sDVs#Er<M{@S{HmukJvm(X9mT&EbEz$EC1ktU5;P}*)
zu<1{B_dljO4nL;a539do<-8_QjIuabNQQi_hYUG=pZb;6{|oi|JqM}#QwaD+t>E};
zgZow2)9P^F$!FA`b{|Y#xnKP&2d?>;1&iK+uuG}W?`eEQ-AaD*wOzsE>K}n)DfP+V
z5z64f1(#F8Rr~3~<1?=XC#Mq2SFBC-1`7|Q_6MggUzX}sEtDK9bB1GkX@^Vg$hx}n
zk}^9~S5b?P+DLh6#Ih4xaKE=X)oR(mws%D@wUZVRH<Z_fD{5;rTvKJ&RF^c;V;wwv
zv20sEYKeE+-6=fBqK;r-$2wayb-1afbX{F-O~pm!WoXklkLbFJND~CCD=(|Bs=!HF
zB&-JNl$M9XwRK^;wx+6v?pE!#?s%82fBM(LLnHk2bFwRH)|G>u)!N#gN^CLB71ian
z^^vg4p(PgYjGMlzOTy)vDpXNn*M=+X(ppfG0@bxOwGpUXYL`~kmag|o3YV-Yx7XCy
zlty3<P-C=ODQCPDwGB2|hxmjeFmbi1w)VtgJ+XvM533xhVQ?>xm@4K0+KZVINqckq
zrHS~?m}R%NH@CsCGz|;wimK4OxpwWEHS^|b6x%W!s;w(2gT~?VI!u<;66@`VVViD<
z!t3fHc6CLKgI=Kf)*C#u^*sF3Gf-tm${Qo;<G^U`PCT^~p9ocijQv)Z+GQ0yOtM}{
zD1^DDJ-#vLT)Wg>T~Sk}WmaEk*M`b#92+(2T6kTxZmp<+o@~9j_L^F#T~^+pn+#!N
zXssENQ=OOII$u|5O2MnVu7=Iqu*j|oEu2q=!$V*iV_A7sNmB$4Qs+plUTs&gYHfBZ
zQQDod*Yw1;redAZ9agiQiZ(R2r!XPtT>|@5u&(;S=gzK9wAk^^E)E$?eHF2{!xd|5
zN~(-0Fqn!`phD%P6>BhCb()zI58CbR@Vb(^a$~J<NdtvVS(u`&D`h;V)UGP2S!;*u
zLzwgk@qia5ntNl86OzRpyR8l{z}Qz;tfj%D&?1S#32Jnw$1u@e!yf@&9bPNbfZ!}~
zO%x8pLmh+7wd>&n?Ok2n7<fx;yJlSxYFMZN_yxt7rq=$9e3H;Dq1vh{4VYOJQ_(FT
zJ*w4B;ihn;yxJ}+iIiwA##D|np1Vaix~X%#&E%lw=%uM{dvkLlM(qvNWwG|=9h!3l
z_A)_AOgeQE!<1H)H<VY+u`5bTkdEvU<eySaPH7TOvH{VFf)aw6%WzY5Rc&p^F-D}W
z1XEjulmBQw=tsx(d>~bk1j=CuNxL=P9<wQ~Z9M)q>X<}a8mcFE(Wpk6Gbhqz&b&@-
zm#wWUskV~6c4q<y2a-$9wL`1JHfe#3)zRE@X{-m<wmUGh?2;6c@Z3mU#p?P92WN>S
z=-T=)^wyl#5Y8Qiwjn04EpAde8>-B2D4%na%f>r3!|HOF3TlA~siSdKweaE9$kzz9
zXeizpsS8J}wKetmrE}((1I+VhcO+AtvE^+s%uzgwYI9F?%W`~wGJE0t{Ml{z*VeK*
ze|GKM{MoJex*>Y$?CzefWGtHO>Y0t_mtCE31sEm_H>$x$*qN&G3+pQyklZoJ4vrI%
zPT3T0Cf8{z7-MQ)b>(Zz8{NpUTRSj`(Jjq9P%{T5rKPp?H4$0QO5hF@O@+|z1JEu}
z80*=&B~{oH>+VVv>PNAfx6weNvLn^m(cFy*?4tZ{2C}Z4<0f)ZO$ky9ag}dftW<)7
zkd{hA?^_gXyQO(Yd%SInaXg+CyAIjJ_+3duXkAm-4wbBRQa9$Uq^i8Ee2wO)ryjXO
zhX@wza!Lof1qn8*!!|}LTu<sw_6TuWMoLBNI2g2mc`U%hU>m}vBGC;OG08)FvB?ga
znbua+(EaD9^(PnbE}Rlh$jcYjm)E=5EF3D?V755y$s7*ooTe>&18Ls1hln$_u;YoY
z=#nLNBHB!u40CTb2s(<okqWv@GU&$h^`s4#Xp1Eh$Wz8L^;o~{wRN@ip|Cfx>&}?I
zSTBb%+1_zoCv|`wn6|<pFQr`)a<bO4-Z&t#p02K|4M%Lpf5<%PD++v$5^-~TyPar9
z5V1&JrPi0jLu7G~-A4pTM{h7Vn9FNQR#zFvK;V^x*45UrN7c&`kM%SW!54leFXNj#
z_&TYwuA-_;^T#f-HP&NA@g)ZKK)ij@dsC3ru#H5KFoF%qjdzZklL@ENx~5P>*V9}p
z&37Z%gSz&xyPI2zbPohbZC#V>j`jYR8nJn@+wgcbiX@+i_4LMIW$z{!>7d8j*38>X
zy<$<GqtR&{=GdG%jl=XNn>S-k=xS|Ea1iKSC(>3G_T;kb=AOJdIqGAU;+uP#lkqN-
zX-lit+Yw}1%zkr^$r^f(W0tJdC3STb*ve~Nusnw;ww=kW*C|<BlyW^!J2q_k9ziUv
zmpOMZ601%k2!|?aJga2-h#kGj7^DE!A}j;K+q?5Gt*u$(tPQ*g*S>>oEcNy#9N7!&
z6&R_(VYmjav=%?Yl)3tft#v{VS>3qrDP3Uc`=5NokY1{gTHS#<I|Dt^M3nB1bZcF?
zT~^QA0Jule+<KIhHB{gZrU~27HD*<HHru4VUg3Q^Qs0h8Gf&?j@l6}%&(`Z51-jkZ
z9B<dO9E^3ftLqWq={I%|iL^~SIc#FgUOVJn{nk{lmL+v&I%HKYGwFL<9J`2?=43NO
zcXh`)ZTMZY$;WzzWleD0z^sJWNtLb-)neYzFV@)`$D(ZMEf9SjueIiFeqBALRqlBt
z<LLRswhVU#$okM+_n`H>p`^-_xq0NYwSh|^7ddLs+FMl-Mi@Chk;P1M>qs+Wn#sf|
z9RtYr2ruIZ*nz<@ntPCth*GQP?Yp72u1xP~oGEtJM0QcR*ECZw*A8zm8+GkX*v-ji
z&g^s9)r}L>*HqxPva7wtn<|)}Mcd5~d{{3yv_fhP>z(bgJ2J>a)YX?pYU^y;(U$O?
zEC$3|eU>`c+2&C6==*Qy-kF>$+pW9FSz0#kykL&?vI$DR(=w(rGwWtvsG!$c=RS?1
z(oV*3$DFox*7su0eqe2RWNn>|iI+Q*RA(aI)){Nb*NK=$j!ij|QktOh#!#J&{fl!C
zx6|>+w0*X@hxe@Gw1?5zVy<yUtkdNo+%fT8YhB3(+uYWNu_LQ!X^&MncSbr=WVeu(
z3cdG;)p+!Q4H$M|xY?pdBKrQ4L&Dq}+PpH=uCBxqVbVEGwb{`+<Am#)CkQZsI9_QL
z(?^=<F5Sn-nQ8JTJw6@B8uD%pDTJ{Ff&c^wG{oWs1yPMks8rYE?l)~cPRkQ!YljZl
z(rE6^LjjY5ojIgj?Bt?aiwsJ;21{?MjK^bi9Mc@T&ScbFR9<J2FPtQ_!RsXC7A8lr
zy|or~5zK_sow>ScrKGG3DTuNZUWuX^vA5G}PP(h!meO60nKQ!6X2p2BGc6>#6nDV(
zhVqKF>mu%IW#YWNW}RIzXR%r3463SpZAod97E@Wf8l7t*b+uJw?;f!qZrbUofObRu
zz{t3#XFutfvD!F{89nXqBPLsbMY!BN^ogc=@JOIN)nRrOXu-N5E^daSIhzR94dep|
zTo@zOnM%Z3ARkGW9tG;nYlqyO(C8^E>-7l_VIn1tz0F`7OY6Ovr=c3pU}Dv=4s#oi
zQN-89n!8K8Qk}T5HptTE_GqfTIT<UhD@CHMYA6ebnsHdP-fi1knmge&J$O#h*_N+A
z(!2|6X;0Lm4W<<@?V?x6TB_om9JaXm*cncBQ^3bs8gNIAjaGsznF#g7dgEQGM3|n@
zxvY)9cBi5hP_KQp*~6w1?Xei$%e7E0!;Qb)-W|1xDOlmzMEM%T6AeXP${_)zTVi-#
zlES$0Xq8A)(fV#I!7&Sa7ncEgfdO{<iJioSb+qDGrF%Mb-o$ewdkY@UKvXJ9wu3Rd
zdhjg7u+<F0dQ~Gaosig_*jY|DD%H3(X>N-l-zMU?Lo20wcZ|F%5l_Z@*+Sr4iw9F+
zPG+y7$D5mXAZOe3%hatHYZRJ!>{^0tDc$cix2y&kD^*cfMtciN^)`YV@<ntiQ4?#!
z0xaTaA)o=7_meDuo2^7#w!y-$%<v;K>UkjUCJ(pL?!}6BV;PNiV1w*z+`%x~y#xBB
z66M>WJLVhSWOd*+s4Hrb59>*YZO6Wz?u~$?d4S(+WhW%-I1<gwYv-`-Uj5uq+aI>l
zLv6M(NSZLc?2uEJmxMIACX4V0qCB5Qc^SN3*tCy`<7-`8WB9IHcdzKwLRzs)#q%#m
zaCLLyQr)mNmekhQa}Rf@Ztlc9_h|KrAc7Z3E!;r#I(?n4bgQl%0rKPGqeeY5C*%$2
z8incbRK$#i=a=-R=4b>2xY>b|Qy81xG#(6F+W_9y+){<-iXhRRsOhwNaNrhX;Z%a$
z&Gbw~%P<f;-djUYN}?g`!A*l69*svU95+aMkgJVg9G||Zh`VpJ#7U}Gp<1m_w5+-$
zyk6UkZd^$=s}z&@q``D_#5$9@LrrXZ5<vwI*Xhb|j1smoQnJ>xL`zdWtKm*s5k1;y
zS4TH8FWo?Db5s~}0FENWG3<o7!#7>rQIJtEeY!hhmhJ}Q;jUCql!MeUgt0EA3<wTy
ziMK*Jv2jQ2=2FQ&&307VkJRnK_&9E9wkk9~QnfDD9cxa~AQBen%mBNiMhOlO+T@z#
zsU@4I>F_7&NqI?+xk^7fbNEUwH`Y!iOk5dt6Iyi^0rS_DM(9?$yfdk@n|v>Y1n+q+
zVrJcpoa{iJX2E5!n2@*1Al+G_`8M{|N`;d>;`LZBXh=M_WJbp{>%@^sgf>QXb94)q
z6)Q?3B0AFzR_tnPL-yD6ja#{jI@;dy&}eO;hU(_+TDbNYN}I-Iw5c%DL>8q8)$(=Q
z>K)z9iG;OgO_U-G;i8+OS`{NXj0aRY&Jh>sE<khPOh5!W!SP57V{R>syhnR?Dq$Yr
zXrUz?Fu#T1r5SZNtZDDsR@#M0>1qd?IF@t%N`-imWie#%OF&5^2S98YiE6DmCvxxf
zQ+FMfj-+)QFVUW;t)Hr3rCHM+@795$;}-sDJSmiFPvBj7EYoT8Mp3TW>G5ztgNsp#
zSm^GW1ky3(1e(@1o17-n(~SF%1U-?V5z)Z$ra$JVR=?|NW-ipz6-AtqD_Ar<tzau=
zs)Z6;bHcR(21%h06Q#`LS;>y>&15aDA$c!0EMa{6<3zs|C6=NSR*=pXJag>EA0g6p
zC6@uKUcfQ<3re~I)<yxxF=~i~Kh7SI+66A5fQ4y<hL8IxLJzXg9II$R;4eFhgay2X
zQOZj64M>H4{FSbN6~3FnV=hX-$GlyoGSbmEEJK*(q6}O2Q<S}qSq-yJ(wV&(mkdA@
z1l_D`bPq5e(FSyd+30@CbiZ`v($5%VT+)7$=}xiK_d|wiAcL4`PURA_E#NE%6%nwJ
zQD(ONyry%jPzS6F1w7y3wc(w6IpU;Oc5#p6T~NA?b2-c!l{0p%l`%v=9n5j<VCHz0
zd5zR>ljG0G2jS_bdpn+c@scZDS91vy3wYE)H3;|}Mr9xKH@Wprrz4NVh@j8s89c!y
z#0hw&{-YL(kOl#Z7?oX|@EYNCj0l+Tpf(CP&BH4)Ahkl5P(ZKHNXC5aWyL?}4nV+P
zIH-*R{*qDI2e6l04?7(r0(v`UDlra!xIourE)kRTgP9rEOm1JuWsWr`V?cfyIMuU5
zzWZhdo$y%g%6ul9%rLjxj?AJAUVfUvWD1W<U75ejCUY0Jf5efQIZi(fWCn4}e1>kq
z<9b)-zp}~vGPmF1$jlt4pJp(b!s7u~<{12>N5=INZhzj9nK@2B4P=hZHcsL3M_1;w
zY%<^EcKLZjTKxQq`Dq4|DLf`QN%7>oY%+_uy^>2Lu*6_VQD_=mp5bgfw{rVO-UUyg
zx!&a|2V|uUeJ^K^elD}w#!oYtZG^{w!z*)c{WOE|5*}Z3cxBF+pJp&#!sCd;D^o8&
z&0xHQ#}6D{nR@wY2ID0>=<g)y%9h)t?bP=`GnhQ#ahk&`Q+GejV7!FK`3|p4oBC-6
z<0U*6I=nLV^3x2)E5!2>b>=5iFF(y-yv(dv)-(pN(hE4tK{X~B+{xu|YdcQi>&qJu
z#2%NHp^V}J#!&RFVz`9MfK?};>_wE-6Bv++$X8Y}Fd!9?nJt`|ujLggu=EdDO#;4G
zR*RYcW-f<Yr<_nJ>+}IZw7Lzy(+z?UiB1neyqyX~0mE)FmzX30moUm~U8J_gB@}RN
z8X>Fa6e3}f(=j5T@FWS50jZU{gaUdcWNwBYXUG4wCjbQgE#rb#w}taUiwZK9F8O=7
zU(ioe;erJOJTYESVFBf^W@8ko{Q$p%Ko{=q4B&nW`+qv@BLdEHdNl|rr*j*NNX=!B
zUnfhyguUoT9xE{ZW=dZpEcrdi0pTc$dzu6#!m|1P>pX~mafxMld&CIIu&dAn*@&RM
z@4`W7g=V5l`^;dpLL*1pgRdNVpP_@$$SL=r{qkV?%CXdPpgm~iDEkb)pI|+2cJ+N_
zFup<~htGqr98Q<PS7_uMdTi_exWL#f?eniJSB{ehPdU~+gQw7pU~d4eoGG6{D>QP5
zJZQV?2AQ+f%x|sBS5Du^;44SQ%gOKHD`&!I&<c&5><(Hv`8|VHXfAhk7}O3z^D&oJ
zPIAxSD>M=lZ)XRg`4aQRoQ+tRHe045?Q$49c*+Uv8S>=}?Z2F3`XVO@C}%aB1mu_V
z9q!P1u4$nl-ox--E(2Cb!22Ck_&Em0Pd7c4HR8<ysq`|E*a`em#v$k3&fpOb*<hNT
z$8w03z_T6PoB@FsJE}DZSj;G8^#%qm;!2A{7ZPxbL)RS`ka4~2(#fc*J?aYF#JHf<
zYi+YmUwQh#dl_6E3!%XYoOA@&i7rD}2=*qTi&&L<z88sdk~sAfSWJkC7WRdX#L&Cp
zF4`R6Ztzt(DLunig+`7>2d$iko<S>Th;MfNTEK2b4Z%Wv)_~OH9B||9QcJnr1(c(|
zvxkMq-QskN2q=>9G*CbhV-{hliKKuP5zs3%b6X;(oXZHOSSc&($>l;I@^i@qSt*4=
zbjqd2+F2=uLR1}8xDd!#250GyXc?ba5{3~_^!(p9>g{J5HNMFuGNXVuOfyZ{T|hei
zx6?5q;LNk!j*$VWt!6BSC18_-Y7ns7K}7_-CXJoc4!MK^em9L!YR|fa0{$b7P-<u7
z8?~XJfNL0KJXdNRE}?*5N+XooV=ke9ucZ-6P5&mLMf=@|fO9?8j|@m{9b-W#U~?Lw
z)V8~X0v<>sl$y*kI6{H6tDC2GpEJev0$$~yE)-CXQ_t=$a&r0>r(?Z<auRy>j&cTi
z89y?l#C##c`#d;-Kg>8h^cL_M2Nn7pgFo@~6u7}r?fq$HpbC>`Q$o0tV#5B<9`*tc
zb=ZgKpd`AAU6g>U98`TNgS8GSB%nNx8)o%bN$a!$!_NJb@25^<J+N{KC_})PdSXU8
z?VK*4WB_lvC;>%(W$nrtkP(QE=qjL?QPUa5?x$a|;a2x=tzgS(1Ag^}Tf0nyUrDFI
zud37FR~QX1Y8if|ogRMGogS{@29opT=`=*TkSzuLm4gZk_#C5*V@vJtE}>!KeqO^(
z!t;Nby=eap7DFEE3OA6PEidQK6OF(!f@}{4h3DPO8@m=c(|%AH(kIJZzMLLk;TWr4
zK-)ou1&lGu7+Pv_V*A^$U*YhI2q?XXSLPl>&Z4Jtn&`^HJCh{iA%pyA)ij4oy@1ml
z)P(}df$Z7yqnyD0X(vn63n+)Ln~qZZoJ(lN;C|BKS9Cq<M1Q@2PdccGfU}uVcD;nx
zZ@D8mlECuy53DDk<!E)`sSKX$pu$Ei_jBw-1Fz!}fg<2{@eAa1DeJ&}eFk(t{ryNO
z>DcD*vIU%rUooc(*-gOZ4$2nr3l3_dfOj}3djjioHkaTfV3C8ejU4w=6fIz-NKt_o
zI*Nt_^bGpQdm8jrtSGE?f8VuS5$!cn^cQ6{(pA(zqORET9qgLxm}jGaV$6W`|A}3_
zir&xm{FBGl53q(WaY+MuH-o;4d7SQyFe0FgaGZ7E-ah=^$Xj{4>F~{S7fl}!!;AZ1
zFD9VOMV4MNGvZF@)y^K(!=-*o`&M4jtO3D@r(j3$ZpO2Q$8phnw1e1J)Q8vH+b0Tp
zT<P9EQQ1|DA5^;PW%I61HuQ5`VmxBS&p5V!S3?w4H#(de1e81wu-@;Fe{u*hyo?81
zPFHCIiRw8#A=FLGAX7p(fj`c4c#?4=gSWe=yBTzC#Sar*vE4Ygfv%gmL}nCl6b}${
zapP`7<$ivK>0jrPloEK#SVIRJ3s}i0A`|!;eu#|>_X>k&@pDz61YFE0>baTW9Uh#(
zx4T^*WAMjZVgO&*EtRJnx{!d+JE*XLzjeAMat5Sw20vlc&%dtX%ICO*$^t&XC{kJA
zN1eXVMJlg)2nBxAOX%9$Kw@<<VK#GOw4d882F-KE0pxo%shCW2^p95~WyGR1=`)zl
zcX~WU;Cmde3km4)x`Tsy-8+o`CTILIWN3TSdmjJQuJLZ#Efv?#LVxG>e{e~o7kC;^
zBjPEG<!;*jUM%Mwtqka$!a{U&^|<i=TI7Gq|8>p{vz&Yo689a?mPICcw*&uAwGboM
zIms*h0S5QDC;?w#6ixY7*4xcz;diTSX7UREPxTiq;PE$P3xgZ}Ct+}d69zZ&%nY>_
zZ^f76Qk5^;hFVJqE!A7osl_=ZSiFIADhCc2cY}jeaVn0!z?jfd758T9ETMM8e;jJ!
z5nG(;ZxB#CgA^B743AY^+*jNHC;{IoZZkci!9OT)doNBh!*SI)18=8Ar<29z3<xaR
z&^Se=EM9b1FYxm`J47e2yC!75!g34eeOI?4M>qMdn0U#8FZvKpV9{-?rS@HJoa4Hj
z;^}kp98FyfGFPQm*0_^PJbxJU+fzR+LhH*JOB0<>PS<^0BJm4Y&ZE`)2C39A(%cP8
zE$l3a^#Vq{y^Rd_(=U|_Bx3*MXkshoL5G;rg}WvJ&u~y7zY@gE(7T^+C-7lM;6?$T
zWfUIn1qP(@D+h`12c_cbvGG6E<4NW#EQeZK@lDRz+1UAwizB|yV<#H6%Q*zk8Fsc&
z|AwU<=W-0*^60^<Q*?_q170Zje{%aNy4|$NV9#RXd)u<9>nOs&^Ef|^u77X|XA`i5
zpP%3!M8GwSGOi}I`&>f9%>5MhA3V+ADAW%yyo(<=5l-Nn99+@BoeayL9uS>hB;j0X
z1`?TcBs^W@d;*6Um*wf1baPcL8W332!q!~08sZFkqk!i#iUbNQ%A=>~F0XeJGwvZ4
z%oZnar`JQya2f=pGdk(QMn^zb`-V*I8{VDv4Vl_Eycg|vc_u?7=6UQTu-J_zHk1G0
zlPxnv793z%H@l_~@cRy`Uaa%9i~0?Ne|Ax)uoF(^67jK!!7>+B$zX$v@_RHoit+Dv
zsa|66H5Vn;aV?R}o9Z)-lbK?(xz1mBY?dQ2G=;(WE-IT6;sKi+&ktS2;8$IgfTACk
zxNrAK<-Pj(>#Whg-(Iu-l>LLu_D3#z0cB#azGbt;yOH?rxSMEoKVQMAKXmOIWlH#s
zfUmhI)8>AT;3grZFcA3D+{PPhsnThrbnymTsy91my&X3+?&sSHx|h2m^|&1jB;ABN
z=_l}E?lu;S?8-b^_U4{@z&bm)>2zuN9#c%kOKi>tEuB<Ijt$C8S{`*MdVJ#iO7G>V
z_#l^<3IPWkR9L{zGfMxdpj5u-(%sJBoervAz$1*x{(XjD4YJ+!+~c6bEOax2!Ys#H
znz1xmK{LiVTw+85evVN_2dN!#2?fj@VR#rqsm)+4IQq>fLYFWv(qG^Km%oU-&qF4#
zNC9^NMIdn-OyX%CRsu^uyx2WhH&KpQU(76Gj-n9(uW?X~0$#@`Wo_>pkcvCT#%yE!
z1^0Q;VHXkbRL7`|0#0O<mLL_eNx*6pP==Y!JpDt>$PaP}s|q-Jm}xSTE44|CMPQ%F
z;1T|-RYNGX2N?^(A2N6{jnHp$QROjKh13-hGg%bjE@AjS4^H6Y4sOoC1eTV^CH1Xi
z_#zMPlMH{^gA-T=Lt7C4D6;K0ALnP|zjPj#*9-VF-c=hb`3El@N8>m@x=7iH41dUj
z`x3)<bBRav0{+-Rg#`SigQ}ZOhtA<ja!CRNzMgTIDgnRgpe{Vh;0vCflW{;HT@^ei
z;`SAWWuSyJRPN`y9j0iTP3D6voA?WSf^kEwnq7F1Bh^1S=vqQc^?j@<Q%m(f9ZZm|
zObW@IZSdd(-t5dqXg`B8wXnQ^XFHZ}5KycEs-@go<4}bJyvso~2q;sBjskiuD)0n0
z6P^JHC=-mHGr9EwhbkoCEsUa(3oKKDo&vt=^lT7N@f6^N<hKT-GM<s>Dxf$OR1@$U
zE|q}da-ed3%|H>B{eDM>$Y3OwIHOsZ;kegv+aZTd#=b^KZgSWx&R~<rx}WEaAwwG>
z5wFa#mSnJzwql1(hBiX7oJn%5Ol>aVw#49Ugk*=qW>JPVALq8u56(tNWDc_p>VEG2
z#Ncf92F%>a9|>Z$67X-_gu8hGC-PqjnT#v7<%|WPfNLF8y@0nksIY+Y7uANH)E-hs
zC9o6lw~R7`QoGz)VZ(k0lwsY*W1w&nSO$Ze4;jH4M>ktQQF{#jbjR5h&zn9Vcsdb~
zE^xuwvHEiLu?@og`~(Y-k(2MppJP42ZTc_kUggSbUgT*!e6bLX<{8F`F$gC*9bnxE
zC-5H~eH&f14D=GqdW%cM{1~4^poGz_4x{>e7<|D+`FYDkh*ObDKjul1iNH<lU41eY
zt*itQ3Va=FqY0&QJ0oe+Ag~xi6G~+&YeyVqs&KTrzBHj!Hagp+IRgUsdI_Z>6HOck
z8?X$LXk={e>=zCA=M))wDUawvE`buT-Wlv3>tcr6T(Sg%mvO1AVEw=sxFW^@I{_uG
zNIAbFflMqX{zPP_vLVERAQSN2n8Q2&VvY@-sTTMu#|JZ%^(giicj%&oOd_bNSyh=X
zpx(_a$&86xqMK;i!1Blt0?RajOu+YI2)#@Te@PD-DU};tQwS&t01r21D(`Wo9Lv5`
zWPTC00?M4CtAL`emik^S^k-*f*eE0Ly0-kf$=y5v`r}Fb{l)3$1O^^pl;phO+%zB~
zo9E2zMsem3J0rw*6EbWW7R`vjGA@UyAkOn-0D<Q*ZWz9LNMI)`^+k-QSFC`C&gF~|
zPYYO=2q+dLEe11SHqVzug!&0A7VzdXnNPwAEThF22LifkWIn<z;#=BUE=lA?40mz~
z7Z&g{4l4Xv1|P!VlyqS|ewe`x&V!M#fLk0?NWfhVDr0>Xt=6#&(n{bP8ApFwhQHat
zpCXGU$5_1EA_|Epx5en}eirdtrx$Ta5;vV?+S|B<9iEtGQ2*kR$a>E<xQ}s3IG3@3
zvaxStQ9GO$UPA)zaZvTwF?i5LeTBihT-3u1KJB7jW$@oFY7`G-hBKgg`7@pM4k{#|
z?V##+FnE=V`aXj{a#6ox@Ff>DG~bMW442qHu3&JDi)v#q>7uS;@V{KteGLA<Mg5e)
zU%RN^Gx(Z|n!%H`kV`00#$b($x|qQh7uCz)H7@E)4F14HW%G#w_JyTf!gaE_iMY(C
zT{6peW%C?yQrAry#7(~E%yxr-;v3LGz;<Vb8U&On29<zUyHo-ma8My}fE|vZ8w8Ze
z11|yNj=dTL6zh_0xK&Jvg-JkfqzNph1et(hNeVuJU8`o?q-L|~%RII>+%c}@v9&m3
z3|-IQVHcH6)p0zd=eaX0z7TOy0@{qqu@2M<-0hNO8>HpCvW;jFn{|a_{QuPi_9mNP
zn9E*32{|l=*{t(k2DF|%nr2pbJ;xFWC$KmNxf7dC904ewwX9z;*XNvg2?_YJgL=P!
ze`J)hcJ~cPMG`DlT0i%9XBmI5RRM#k;*v%ua0lbC$_luhQIoJ02`)Z2xOhg7HR>%~
zdFLjqX#?+td%eRw6k|}hXR+Pe>DlOTY7p=e2UREFZU@yM;2sB6=hs~7O$;D^3-~Of
z%$>i~@*Q6F0v0mL5K67sB@`k4QY7IudjTI|8vP=WR75rjhzv+g#G|)>B3t*CimOP*
z<EhmwO{9}o2>fAgLzo?6@Gci65@$N2yo4K_;_aBn9Znks+{!5Z9*|Ue9VFfZl8UQ_
z^TUCz8XFz?4D94`H<$jGa0LG;Zuh=uBa-gP(#9yK$Tr*#ZWYakT7C4ok!UM3lmoQ?
zTEYlX0S|j#X4ETO0+l%p_9C7UciL?~?+18ye2hyty@1a+sIY*)V3hv;Q!2l9>7HZo
z1qYS+P2p&x!l_(Bpn%gIRD*ys7-ix~YI7aJcVtg)Ec_=q-NJbcp6jCg%&Di}TC12m
z<aDbS@IpozO{I2`OZd*bBH4IF1~PeN1n(vm^Q<dQz|;AKGNYH&&SosEFJNUFq0}yR
z3H<}`3nhbz)K?uv-v0)JA{y(MfFhcD`UPe)zexN9vm_dUZ)BXZkRHCs6;TJPOE#H<
zjp$wve}Sbx-2@Bl)n8y42hj;EM$9%Qe?K!%e$5W?R^w4FF>eB1eU2f<BNYKZ%qYW4
zYM*fl--$gbD*Rt}L}uJS7cj>@hx7YI*mW+-FHC-|?gN~iI=M`6>8Jl|j={Xa<v3;P
zlezTM&)_E|@~f2cEM*1b{q%#;$uCv<>D!o({6gh+uJ;YXe=s`v)k;7ASDDW+et<ZF
zOZgdLKm95E-S~Je<(HG?2ao;qdznsti2E9@%P&y-=?`)H&0P9_H``Ayzd-#U)BArc
z+fOfluPm>q<?)+Z@|Veedif*r0jB#RmtW!Xb}r=)!2SK-Z9n<L^#8Q~-K>Yde>d;)
zw{dwHm+})AetP-kmJJ+IHkX^ZY~fOV&ZV8}@*6RJe)4lcyQiC$y<A?+rTkQs{8W&?
z|07KIIG4d0h9bhHpZ-byi<e(;>Hk?eKfV0w-JA)gWj>e7xLnPp{FIr$zxb2r^Ek`>
z0r&IMpT|qwLN1qbxsuCrE<;@U`<F7`S}wy}+FbhoAi&>WzKU(*??*qt<z6oR^zxnS
z_1t~~m$wf>FW<jD#O*)iQodaG^Zz#c?RUA9cN||C#GjvG|NS|aa?kq)*Zuro&o`KV
zaQP;eMbix4|9Lw5b3T{;Ri~fvvgG*tzhhll0qe`WxOj;b-q!hkR=l!KWW^7$g38Om
zzzXkQ7G=c`vx+!LdV48rxOL-jFGlzTt>?4iM_3_#v&`E|S*KWs_%U`m9^3P=UX1V`
zW#wnZkG3A*AoBK7))-5ID;<BTwY}1d5&mEv%7!0joi6v9o@Ql@x1PPogJ4iu6Rg{J
zWy4Rj?#YUuWId1-KiN8w6+gu~u_qh<T+7;<4L{ZD&x+3;k;;<yv(tGgd0#snjUSsh
z!-p|dB|mH7YgN`+K8(=k4}#B(Jlcy5vHtp&zXQEkn}d0mBs-Z2&PExqrdrSLH3)IX
z0#vi{p?g~5V@)*l^0|!ht9<wx#`pX1Ex?o9PwfSOOZJcn4QKkp4ZxG!$9;UhsOdBP
z>OtVM>HoN<pK5)1F92LJ-e&-lKDX~Btc(9OV8Y+Gm$1asTqjTv{+_+2F8Gs-e}M7A
zp9YvspOL`RxHj=3EVulF+5b$?2M}MyWI*4QjsFGOuoE)kYq{o=8AofF-XEt;8lM^O
z?V3+!+$}|Z%&{`_)jrUVLlS$I^NHB!W5ADx9lAOH4CS$Xmhtk_8<K_&Yd%x0?Ux%u
zN$d2p=9<q^gZ~CMJi_=xGYx(P^Zyz1IkeXxM4uNmJrj9~*9XCmf}C;ihqB8JvFMWr
zAm7tpK>8VRqVL~pFe0}S1JAcI^HnA2X<WDSi;AGoSD5h+%r|veW-ej=t9|-(XnOAK
zDK2L|k2C)#0;cgJj9<m6PxQP=^B-$H@0-WNgYds!)8|@O>@|Fuy>(3Er&>FGdeT??
zG~S}q4gGpkSkD7L7WVl#^I^30GSgcX2J=sDpqo&#^A_eW`u|(gOK-OvkM*A99-3!x
zvJ#vLJn^aW={cA2bv}HF#^+kOdkr6vTgmh_KKl0qPjW+Z4gK(dDYr8H9v?j&vqAdw
z`0&@G-}s!&b^N2ue^rU$`%8?Uu1{&afxVx1FunXn?n<UVqUGjVAKPoFAx>Z4XZq*Q
zHue8v{7(nre_ZpKYFVtm*ypdphYjDze1;D(;|==gCjw7)dxib~38p`j>31<bt8dL>
z`sXJaLfJ0N*YsnpH+=rQn)$r4*U*ce5ytQJ@wYX9R>D)z+j0D-*B-28^=SGr)&qP~
zb{)6wWd5ss{I6pCVjuom#y`H-Fc3WtGXLl27(Ay%>uZefFEscnHqgBqZ*bnvXN3>v
z&j9Ll(aU?|EO(!Fo<Uo0FunZ3qikn~BEMy`!&Hq&-0{4xVm`BgABT7!yVoFO9+zqS
zR4bqDAmd#JJmm+A>6wjH&-{y)8_WpSf0M=wm0Kp6{`NBs?)NPC3g9X3ihOcE$@C9!
z-jMwBr9t@L3w*vS&Vi0G|6<?#KFRzyaegl09xo7mPOcT)>#)$kUzmO@Z}hmE_1}y?
zG|kY{K7g)aSg&bamVG{($C{+^Q>~>weWo$~hkJE*to7!a3p~Z+?FenU{$vVkmBw?$
zQ`9rP{PFL%x$RQTf2{S2FCMos{p0fuA&ar-;TX+J(x)dqBqRJ4KKualv3S1`W4X6!
zyhlL>zc&c}8Rk>Oc0Pyce+@jzUE`CxI6(e6)%qagMN$pV%i|LahQreOJ@enhe#Og!
z^%~>lp_I&T4mJQJ_t;*;N9JWb<GX$OoXhxqKKvZuNl*VeyBzpz@q3}hyZ4o^VVra|
z2!4U7-zaf62%nw6Q@rQzHS{f}us+6oHnE-m&iGGj`mxptpPzhz>E#xzf%Q4e_<T0x
z+05r2=JU9Z&-XNbs@2H$kv#JR^Vu}XFxbd^ek*v|z~h?1a_LX4vf1sggW!ii5Y1yH
z%awT?3w$;{=MI9Wzn3FEEzC#adcCF}W963_Jv&TcZPfI+)<^dm1gmegYI-K}6nmNe
zgG?{{Kc?x&Sn}(lDeiNFrk`q!WqnZ9*OwUo{9aR+@!re$^L+FV0-wze&uBdM1Mf3@
zHZ!9a7~jw1jkBVEB>u>s{Vdn?vaB}<54+|1<POC`mM=t}@+{zqeiPFNxNRQrln?uP
z9TA;ZGyNNT4I#woE6n&1^AS7Pz@N=D-r_Q*@Ac7N&G;2Q{I!ffvDa`BxdXt9ZeIT1
zWcqbJJ`W5+PX~?4x#V&HwK?gzpu4#zSx{u*<aZo}T`+I{+yz#&Cz(j%)boO<g%gQm
zZ8!-v)?+6-Y#c@18B5R^=v{VOd)MaXcDp6n)swKBQ`_~?rR^~sxm~bm;ey54iR{*R
zXWVY?>1p0!;}l{X@!Q(djMKndQXL(1n7OBBgEE;$iW8Mvwl(*}pcWnDUAn*&bD<>0
z1npdCfj%_76-RU9)N>rH>pdJ=ADpaD)|Ii__L{nq>T<ihrp&gXMVjOm%PwoGDXFd~
zO>ar))7EW!ZB4yhzK%KI$Y9G}TUEQdq{^;cvnE^~u_Gm`tIBOUdp8=2cSfqiVACGo
z9JQl~lr{&=josEA@3Ob`#FOT%VE2^Xj1yutLJqA3+eEw~(GAWCm@*bywQ6lu#p+Uf
zZo%9F*e8{wbEwmi=|}F`6_IKjX)m)Jsm5{0oiTj|vz17;bfuE%y?bz2ZHP{?*LvXm
zV1UHYbL6u*g+09+O_)tb!|TzK3p$fy(<$O&p3?QCbRxYoPITr2a7hv!W{jhB>EQPE
z?x?L#bhl$IIL6oLqz~aHLg$EQbA)<2Ppv*5uuR1Ih<VR}?{u0wj!@Po1=FeAa@f2>
zOH*LZ=hdv-Be&~H=grk7;bW1hhxcS{O>WEuSAZKuFU4u$m)flum#gD^GZ<|cb8L95
zr>CpO-hz{Y+o4cLM{~DJO_QB=<~)Sh=~jll3<-QxA62aN2;*R3tt=lAt&!$5Xy{EI
zTV6vBY`WrT=Q8IIc^VfD5iZ|~DU7CTLvw9+7;lz?w7G|zON~>t%hw=8%}C{(W}^X&
ztIsRvSkb{|(_!@KQXFFFm)IFjb(1&5S{h<Kbbfk5X92jdIgLHq+>WEZGZ>iIYl%_R
zYg3eVr)=*5*WIZo4V)YdnGXd`niB!$6!Na_SWia=>xSy;SVwhpXLB27OwSJ(IR-Qn
zKqqj^x#F#{uGVxWw%yjz)oBDGH)#v<0omwoRHu+6%@SSg9hOccZj@p$F(_i$6}8~h
z67R&!#dzA?)9DkTo>*_ZE0vJ5vkiA`7TeyAG5b;hDWDH!$7fd?j>5J#H|sO+b)u^a
zN6f^+d$r!4^Wte3-V?<=8BvSt$TCx{t?jAAmUQbRupmV*)!gMAdu>#Gq`N!&TVmTa
zP5JijSQPGoL*{keiCG6jldR8Ex9!askD2F=RA)x8kt>?v>9gl;V~AD?WLL#`1@j>%
z<3MrvVSIB>Go3C@YG`YfRak3dNqtJX9svcG_8D%j1tt8DQW9pe3k#<+{n4(@)_9vy
zhK_XC4%rHa^u-DpJyKSyXBXazWa4T{`6IC-L9Eh|=oFVc>dAKAv(IS=m}8`5telCi
z=#nLN0>{#O7%hVG-Xr6^ncHNo3X_sZMLJJC)Ew_IN4)E1bH2M3+aAyKz=mo*u%4E6
zP8nFlcr7<ZWA1vX%ev5EfhkS(^k7FqlNF|rbW(@eCK>a476}^Cy7H2cHm7Yzw>Q&b
zj+x!*TZ3s#)y>;A9l?>ZI)=Mxs8!fp;k@|vSS%x*qo15)k99&vS{4Vh3KBaylFge@
zCVNb|MWA>mHg4TkL1$MoR?ya&D%hNgx3|oWw=k+?b;aytbDO2xwlpWUSOqORI>FDB
z$sW_vYtm_2#YS6Cti72!Fx1_iv<h_m762@0>q0dd+m27#^?|61lBZP=+rs<2EiGUo
zHPh8>_)HIhsTaut1FctcM?4BZ^Fowb1<|gK4$K{JvCXMAbZhQJI+AL<vz7Xprp=p?
z<fPUf?~DlylL?5NA|P|}ZoU5_m>$yy@L%p5<oj_c`Ek0#n`pfkJ-@&$sncJ+N0;(k
zFEL=gjdHLH0eSn&_w7>VJCp|S_b&tbwYT2t68+_Sc`481{&-xXFS&o=szu*7;#((2
zfBF7iN_;7+FFZccc9Q<`eM$rHL?ZI#dwwY|^%=}pwJt$lykqa^FYg0LxeD!ciT)x-
z%1hDqZ%==DZ$Qd!-J8y&H#&;`jJ9?HAe#z5dB4CZSz(bc{bl@DaR1fJP~Jn3vXL26
ze|qNR@BeY&NCfGpud(SRe~rY*O#k^1TD<-9xxbW$d<OTix32T`e}LbAkW%y&1*9(J
zXMO$UJqamqUMxLLDe?vTd0&5dpF&E0LsiH#;^!;eU*=Dq$4YrR?z_F0=q<Rf10WMg
ze|bMc%KLow^T!`OfA#j4_c)~7@(%JJM*lJR&tc}g?{RxOkhuK%N?ppQKtn&5DgEWW
zkbB-`|KFf5=`a1|{gDT_|9NQhUisb%;6LL(`L6Vr_e@T3e=)51x9BZ?@G125%9r<1
zPIRIHSCAS#m-LtNb+mc=TYH(f+msYv-Yef*0sJQZ6ED$Uo@;%a`@i9%7rBDYfpC&v
zBnU30|2aOq3`a_OpFv<R>DO8QAukfJpEhrh{ugdF9pBuL&cNTFp11mO)T4$R6W32q
zF{OO^Y3C2pKmSS7<7>W$Wd8oExWC_ikGy31|IPPGko1>wJ@*&=r2O^}Lox9p!I)C|
z36`F7`*GCv#3csXEso0_{Ipb;+`%NeSjT_(bvu7QL4L3T|HXe~{h;(9zNb6##~a&?
bq+j^*hhILW>umj>pchAQwfH*ts@DGlP$Tz1

literal 0
HcmV?d00001

diff --git a/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/pddf_switch_svc.py b/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/pddf_switch_svc.py
new file mode 100644
index 000000000000..319178d62a41
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/ds3000/utils/pddf_switch_svc.py
@@ -0,0 +1,83 @@
+#!/usr/bin/env python
+# Script to stop and start the respective platforms default services.
+# This will be used while switching the pddf->non-pddf mode and vice versa
+import os
+import sys
+import commands
+
+def check_pddf_support():
+    return True
+
+def stop_platform_svc():
+    status, output = commands.getstatusoutput("systemctl stop xxxx-platform-init.service")
+    if status:
+        print "Stop xxxx-platform-init.service failed %d"%status
+        return False
+    status, output = commands.getstatusoutput("systemctl disable xxxx-platform-init.service")
+    if status:
+        print "Disable xxxx-platform-init.service failed %d"%status
+        return False
+
+    status, output = commands.getstatusoutput("/usr/local/bin/xxxx_util.py clean")
+    if status:
+        print "xxxx_util.py clean command failed %d"%status
+        return False
+
+    # HACK , stop the pddf-platform-init service if it is active
+    status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service")
+    if status:
+        print "Stop pddf-platform-init.service along with other platform serives failed %d"%status
+        return False
+
+    return True
+
+def start_platform_svc():
+    status, output = commands.getstatusoutput("/usr/local/bin/xxxx_util.py install")
+    if status:
+        print "xxxx_util.py install command failed %d"%status
+        return False
+
+    status, output = commands.getstatusoutput("systemctl enable xxxx-platform-init.service")
+    if status:
+        print "Enable xxxx-platform-init.service failed %d"%status
+        return False
+    status, output = commands.getstatusoutput("systemctl start xxxx-platform-init.service")
+    if status:
+        print "Start xxxx-platform-init.service failed %d"%status
+        return False
+
+    return True
+
+def start_platform_pddf():
+    # Enable PDDF 2.0 object class for xxxx
+    status, output = commands.getstatusoutput("mkdir /usr/share/sonic/platform/sonic_platform")
+    if status:
+        print "Unable to create 2.0 object class folder /usr/share/sonic/platform/sonic_platform"
+        return False
+
+    status, output = commands.getstatusoutput("systemctl start pddf-platform-init.service")
+    if status:
+        print "Start pddf-platform-init.service failed %d"%status
+        return False
+
+    return True
+
+def stop_platform_pddf():
+    # Disable PDDF 2.0 object class for xxxx
+    status, output = commands.getstatusoutput("rm -r /usr/share/sonic/platform/sonic_platform")
+    if status:
+        print "Unable to delete 2.0 object class folder /usr/share/sonic/platform/sonic_platform"
+        return False
+
+    status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service")
+    if status:
+        print "Stop pddf-platform-init.service failed %d"%status
+        return False
+
+    return True
+
+def main():
+    pass
+
+if __name__ == "__main__":
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/pid_config_questone2.ini b/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/pid_config_questone2.ini
new file mode 100644
index 000000000000..7227dd6273c2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/pid_config_questone2.ini
@@ -0,0 +1,19 @@
+#[PID thermal control setting]
+[PID enable]
+PID_enable=0
+
+[SWITCH_TEMP]
+setpoint = 95
+P = 3
+I = 0.5
+D = 0.5
+min_output = 76
+
+[CPU_TEMP]
+setpoint = -15
+P = 3
+I = 0.5
+D = 0.5
+min_output = 76
+
+
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/questone2-modprobe.conf b/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/questone2-modprobe.conf
new file mode 100644
index 000000000000..57a28ea72eac
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/questone2-modprobe.conf
@@ -0,0 +1 @@
+options switchboard_fpga allow_unsafe_i2c_access=1
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/questone2-modules.conf b/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/questone2-modules.conf
new file mode 100644
index 000000000000..574c48f7a66f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/cfg/questone2-modules.conf
@@ -0,0 +1,16 @@
+# /etc/modules: kernel modules to load at boot time.
+#
+# This file contains the names of kernel modules that should be loaded
+# at boot time, one per line. Lines beginning with "#" are ignored.
+
+i2c-i801
+i2c-isch
+i2c-ismt
+i2c-dev
+i2c-mux
+i2c-smbus
+
+i2c-mux-gpio
+i2c-mux-pca954x
+8021q
+
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/modules/Makefile b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/Makefile
new file mode 100644
index 000000000000..c32df8e5e6e1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/Makefile
@@ -0,0 +1 @@
+obj-m := mc24lc64t.o questone2_switchboard.o questone2_baseboard_cpld.o
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/modules/mc24lc64t.c b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/mc24lc64t.c
new file mode 100644
index 000000000000..4603b3d41065
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/mc24lc64t.c
@@ -0,0 +1,171 @@
+/*
+ * mc24lc64t.c - driver for Microchip 24LC64T
+ *
+ * Copyright (C) 2017 Celestica Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/mutex.h>
+#include <linux/types.h>
+#include <linux/delay.h>
+#include <linux/jiffies.h>
+
+#define EEPROM_SIZE 8192  //mc24lt64t eeprom size in bytes.
+
+struct mc24lc64t_data {
+        struct mutex            update_lock;
+};
+
+static ssize_t mc24lc64t_read(struct file *filp, struct kobject *kobj,
+                            struct bin_attribute *bin_attr,
+                            char *buf, loff_t off, size_t count)
+{
+        struct i2c_client *client = kobj_to_i2c_client(kobj);
+        struct mc24lc64t_data *drvdata = i2c_get_clientdata(client);
+        unsigned long timeout, read_time, i = 0;
+        int status;
+
+        mutex_lock(&drvdata->update_lock);
+
+        if (i2c_smbus_write_byte_data(client, off>>8, off))
+        {
+                status = -EIO;
+                goto exit;
+        }
+
+        msleep(1);
+
+begin:
+
+        if (i < count)
+        {
+                timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/
+                do {
+                        read_time = jiffies;
+
+                        status = i2c_smbus_read_byte(client);
+                        if (status >= 0)
+                        {
+                                buf[i++] = status;
+                                goto begin;
+                        }
+                } while (time_before(read_time, timeout));
+
+                status = -ETIMEDOUT;
+                goto exit;
+        }
+
+        status = count;
+
+exit:
+        mutex_unlock(&drvdata->update_lock);
+
+        return status;
+}
+
+static ssize_t mc24lc64t_write (struct file *filp, struct kobject *kobj,
+                            struct bin_attribute *bin_attr,
+                            char *buf, loff_t off, size_t count){
+
+    struct i2c_client *client = kobj_to_i2c_client(kobj);
+    struct mc24lc64t_data *drvdata = i2c_get_clientdata(client);
+    unsigned long timeout, write_time, i = 0;
+    int status;
+    u16 value;
+
+    mutex_lock(&drvdata->update_lock);
+
+begin:
+    if (i < count){
+        timeout = jiffies + msecs_to_jiffies(25); /* 25 mS timeout*/
+        value = (buf[i] << 8)| off;
+        do {
+                write_time = jiffies;
+                status = i2c_smbus_write_word_data(client, off>>8, value);
+                if (status >= 0)
+                {
+                    // increase offset
+                    off++;
+                    // increase buffer index
+                    i++;
+                    goto begin;
+                }
+        } while (time_before(write_time, timeout));
+        status = -ETIMEDOUT;
+        goto exit;
+    }
+    status = count;
+
+exit:
+    mutex_unlock(&drvdata->update_lock);
+    return status;
+}
+
+static struct bin_attribute mc24lc64t_bit_attr = {
+        .attr = {
+                .name = "eeprom",
+                .mode = S_IRUGO | S_IWUGO,
+        },
+        .size = EEPROM_SIZE,
+        .read = mc24lc64t_read,
+        .write = mc24lc64t_write,
+};
+
+static int mc24lc64t_probe(struct i2c_client *client,
+                         const struct i2c_device_id *id)
+{
+        struct i2c_adapter *adapter = client->adapter;
+        struct mc24lc64t_data *drvdata;
+        int err;
+
+        if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA
+                                     | I2C_FUNC_SMBUS_READ_BYTE))
+                return -EPFNOSUPPORT;
+
+        if (!(drvdata = devm_kzalloc(&client->dev,
+                        sizeof(struct mc24lc64t_data), GFP_KERNEL)))
+                return -ENOMEM;
+
+        i2c_set_clientdata(client, drvdata);
+        mutex_init(&drvdata->update_lock);
+
+        err = sysfs_create_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr);
+
+        return err;
+}
+
+static void mc24lc64t_remove(struct i2c_client *client)
+{
+        struct mc24lc64t_data *drvdata = i2c_get_clientdata(client);
+        sysfs_remove_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr);
+}
+
+static const struct i2c_device_id mc24lc64t_id[] = {
+        { "24lc64t", 0 },
+        { }
+};
+MODULE_DEVICE_TABLE(i2c, mc24lc64t_id);
+
+static struct i2c_driver mc24lc64t_driver = {
+        .driver = {
+                .name   = "mc24lc64t",
+                .owner = THIS_MODULE,
+        },
+        .probe          = mc24lc64t_probe,
+        .remove         = mc24lc64t_remove,
+        .id_table       = mc24lc64t_id,
+};
+
+module_i2c_driver(mc24lc64t_driver);
+
+MODULE_AUTHOR("Abhisit Sangjan <asang@celestica.com>");
+MODULE_DESCRIPTION("Microchip 24LC64T Driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/modules/questone2_baseboard_cpld.c b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/questone2_baseboard_cpld.c
new file mode 100644
index 000000000000..20c353ee5d00
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/questone2_baseboard_cpld.c
@@ -0,0 +1,408 @@
+/*
+ * seastone2_baseboard_cpld.c - driver for Seastone2 Base Board CPLD
+ * This driver implement sysfs for CPLD register access using LPC bus.
+ * Copyright (C) 2017 Celestica Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/stddef.h>
+#include <linux/delay.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/acpi.h>
+#include <linux/io.h>
+#include <linux/dmi.h>
+#include <linux/slab.h>
+#include <linux/wait.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+#include <linux/types.h>
+#include <uapi/linux/stat.h>
+
+#define DRIVER_NAME "sys_cpld"
+/**
+ * CPLD register address for read and write.
+ */
+#define VERSION_ADDR 0xA100
+#define SCRATCH_ADDR 0xA101
+#define SYS_LED_ADDR 0xA162
+#define THERMAL_ADDR 0xA176
+#define CPLD_REGISTER_SIZE 0x77
+
+struct baseboard_cpld_data {
+    struct mutex       cpld_lock;
+    uint16_t           read_addr;
+};
+
+struct baseboard_cpld_data *cpld_data;
+
+/**
+ * Read the value from scratch register as hex string.
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer for get value
+ * @return         Hex string read from scratch register.
+ */
+static ssize_t scratch_show(struct device *dev, struct device_attribute *devattr,
+                char *buf)
+{
+    unsigned char data = 0;
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(SCRATCH_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    return sprintf(buf,"0x%2.2x\n", data);
+}
+
+/**
+ * Set scratch register with specific hex string.
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer of set value
+ * @param  count   number of bytes in buffer
+ * @return         number of bytes written, or error code < 0.
+ */
+static ssize_t scratch_store(struct device *dev, struct device_attribute *devattr,
+                const char *buf, size_t count)
+{
+    unsigned long data;
+    char *last;
+
+    mutex_lock(&cpld_data->cpld_lock);
+    data = (uint16_t)strtoul(buf,&last,16);
+    if(data == 0 && buf == last){
+        mutex_unlock(&cpld_data->cpld_lock);
+        return -EINVAL;
+    }
+    outb(data, SCRATCH_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    return count;
+}
+static DEVICE_ATTR_RW(scratch);
+
+
+/* CPLD version attributes */
+static ssize_t version_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    // CPLD register is one byte
+    mutex_lock(&cpld_data->cpld_lock);
+    int len = sprintf(buf, "0x%2.2x\n",inb(VERSION_ADDR));
+    mutex_unlock(&cpld_data->cpld_lock);
+    return len;
+}
+static DEVICE_ATTR_RO(version);
+
+
+static ssize_t getreg_store(struct device *dev, struct device_attribute *devattr,
+                const char *buf, size_t count)
+{
+    // CPLD register is one byte
+    uint16_t addr;
+    char *last;
+
+    addr = (uint16_t)strtoul(buf,&last,16);
+    if(addr == 0 && buf == last){
+        return -EINVAL;
+    }
+    cpld_data->read_addr = addr;
+    return count;
+}
+
+static ssize_t getreg_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    // CPLD register is one byte
+    mutex_lock(&cpld_data->cpld_lock);
+    int len = sprintf(buf, "0x%2.2x\n",inb(cpld_data->read_addr));
+    mutex_unlock(&cpld_data->cpld_lock);
+    return len;
+}
+static DEVICE_ATTR_RW(getreg);
+
+static ssize_t setreg_store(struct device *dev, struct device_attribute *devattr,
+                const char *buf, size_t count)
+{
+    // CPLD register is one byte
+    uint16_t addr;
+    uint8_t value;
+    char *tok;
+    char clone[count];
+    char *pclone = clone;
+    char *last;
+
+    strscpy(clone, buf, count);
+
+    mutex_lock(&cpld_data->cpld_lock);
+    tok = strsep((char**)&pclone, " ");
+    if(tok == NULL){
+        mutex_unlock(&cpld_data->cpld_lock);
+        return -EINVAL;
+    }
+    addr = (uint16_t)strtoul(tok,&last,16);
+    if(addr == 0 && tok == last){
+        mutex_unlock(&cpld_data->cpld_lock);
+        return -EINVAL;
+    }
+
+    tok = strsep((char**)&pclone, " ");
+    if(tok == NULL){
+        mutex_unlock(&cpld_data->cpld_lock);
+        return -EINVAL;
+    }
+    value = (uint8_t)strtoul(tok,&last,16);
+    if(value == 0 && tok == last){
+        mutex_unlock(&cpld_data->cpld_lock);
+        return -EINVAL;
+    }
+
+    outb(value,addr);
+    mutex_unlock(&cpld_data->cpld_lock);
+    return count;
+}
+static DEVICE_ATTR_WO(setreg);
+
+/**
+ * Read all CPLD register in binary mode.
+ * @return number of byte read.
+ */
+static ssize_t dump_read(struct file *filp, struct kobject *kobj,
+                struct bin_attribute *attr, char *buf,
+                loff_t off, size_t count)
+{
+    unsigned long i=0;
+    ssize_t status;
+
+    mutex_lock(&cpld_data->cpld_lock);
+begin:
+    if(i < count){
+        buf[i++] = inb(VERSION_ADDR + off);
+        off++;
+        msleep(1);
+        goto begin;
+    }
+    status = count;
+exit:
+    mutex_unlock(&cpld_data->cpld_lock);
+    return status;
+}
+static BIN_ATTR_RO(dump, CPLD_REGISTER_SIZE);
+
+/**
+ * Show system led status - on/off/1k/4k
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer for get value
+ * @return         Hex string read from scratch register.
+ */
+static ssize_t sys_led_show(struct device *dev, struct device_attribute *devattr,
+                char *buf)
+{
+    unsigned char data = 0;
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(SYS_LED_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    data = data & 0x3;
+    return sprintf(buf, "%s\n",
+            data == 0x03 ? "off" : data == 0x02 ? "4k" : data ==0x01 ? "1k": "on");
+}
+
+/**
+ * Set the status of system led - on/off/1k/4k
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer of set value
+ * @param  count   number of bytes in buffer
+ * @return         number of bytes written, or error code < 0.
+ */
+static ssize_t sys_led_store(struct device *dev, struct device_attribute *devattr,
+                const char *buf, size_t count)
+{
+    unsigned char led_status,data;
+    if(sysfs_streq(buf, "off")){
+        led_status = 0x03;
+    }else if(sysfs_streq(buf, "4k")){
+        led_status = 0x02;
+    }else if(sysfs_streq(buf, "1k")){
+        led_status = 0x01;
+    }else if(sysfs_streq(buf, "on")){
+        led_status = 0x00;
+    }else{
+        count = -EINVAL;
+        return count;
+    }
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(SYS_LED_ADDR);
+    data = data & ~(0x3);
+    data = data | led_status;
+    outb(data, SYS_LED_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    return count;
+}
+static DEVICE_ATTR_RW(sys_led);
+
+/**
+ * Show system led color - both/green/yellow/none
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer for get value
+ * @return         Hex string read from scratch register.
+ */
+static ssize_t sys_led_color_show(struct device *dev, struct device_attribute *devattr,
+                char *buf)
+{
+    unsigned char data = 0;
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(SYS_LED_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    data = (data >> 4) & 0x3;
+    return sprintf(buf, "%s\n",
+            data == 0x03 ? "off" : data == 0x02 ? "yellow" : data ==0x01 ? "green": "both");
+}
+
+/**
+ * Set the color of system led - both/green/yellow/none
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer of set value
+ * @param  count   number of bytes in buffer
+ * @return         number of bytes written, or error code < 0.
+ */
+static ssize_t sys_led_color_store(struct device *dev, struct device_attribute *devattr,
+                const char *buf, size_t count)
+{
+    unsigned char led_status,data;
+    if(sysfs_streq(buf, "off")){
+        led_status = 0x03;
+    }else if(sysfs_streq(buf, "yellow")){
+        led_status = 0x02;
+    }else if(sysfs_streq(buf, "green")){
+        led_status = 0x01;
+    }else if(sysfs_streq(buf, "both")){
+        led_status = 0x00;
+    }else{
+        count = -EINVAL;
+        return count;
+    }
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(SYS_LED_ADDR);
+    data = data & ~( 0x3 << 4);
+    data = data | (led_status << 4);
+    outb(data, SYS_LED_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    return count;
+}
+static DEVICE_ATTR_RW(sys_led_color);
+
+static struct attribute *baseboard_cpld_attrs[] = {
+    &dev_attr_version.attr,
+    &dev_attr_scratch.attr,
+    &dev_attr_getreg.attr,
+    &dev_attr_setreg.attr,
+    &dev_attr_sys_led.attr,
+    &dev_attr_sys_led_color.attr,
+    NULL,
+};
+
+static struct bin_attribute *baseboard_cpld_bin_attrs[] = {
+    &bin_attr_dump,
+    NULL,
+};
+
+static struct attribute_group baseboard_cpld_attrs_grp = {
+    .attrs = baseboard_cpld_attrs,
+    .bin_attrs = baseboard_cpld_bin_attrs,
+};
+
+static struct resource baseboard_cpld_resources[] = {
+    {
+        .start  = 0xA100,
+        .end    = 0xA1FF,
+        .flags  = IORESOURCE_IO,
+    },
+};
+
+static void baseboard_cpld_dev_release( struct device * dev)
+{
+    return;
+}
+
+static struct platform_device baseboard_cpld_dev = {
+    .name           = DRIVER_NAME,
+    .id             = -1,
+    .num_resources  = ARRAY_SIZE(baseboard_cpld_resources),
+    .resource       = baseboard_cpld_resources,
+    .dev = {
+        .release = baseboard_cpld_dev_release,
+    }
+};
+
+static int baseboard_cpld_drv_probe(struct platform_device *pdev)
+{
+    struct resource *res;
+    int ret =0;
+    int portid_count;
+
+    cpld_data = devm_kzalloc(&pdev->dev, sizeof(struct baseboard_cpld_data),
+        GFP_KERNEL);
+    if (!cpld_data)
+        return -ENOMEM;
+
+    mutex_init(&cpld_data->cpld_lock);
+
+    cpld_data->read_addr = VERSION_ADDR;
+
+    res = platform_get_resource(pdev, IORESOURCE_IO, 0);
+    if (unlikely(!res)) {
+        printk(KERN_ERR "Specified Resource Not Available...\n");
+        return -1;
+    }
+
+    ret = sysfs_create_group(&pdev->dev.kobj, &baseboard_cpld_attrs_grp);
+    if (ret) {
+        printk(KERN_ERR "Cannot create sysfs for baseboard CPLD\n");
+    }
+    return 0;
+}
+
+static int baseboard_cpld_drv_remove(struct platform_device *pdev)
+{
+    sysfs_remove_group(&pdev->dev.kobj, &baseboard_cpld_attrs_grp);
+    return 0;
+}
+
+static struct platform_driver baseboard_cpld_drv = {
+    .probe  = baseboard_cpld_drv_probe,
+    .remove = __exit_p(baseboard_cpld_drv_remove),
+    .driver = {
+        .name   = DRIVER_NAME,
+    },
+};
+
+int baseboard_cpld_init(void)
+{
+    // Register platform device and platform driver
+    platform_device_register(&baseboard_cpld_dev);
+    platform_driver_register(&baseboard_cpld_drv);
+    return 0;
+}
+
+void baseboard_cpld_exit(void)
+{
+    // Unregister platform device and platform driver
+    platform_driver_unregister(&baseboard_cpld_drv);
+    platform_device_unregister(&baseboard_cpld_dev);
+}
+
+module_init(baseboard_cpld_init);
+module_exit(baseboard_cpld_exit);
+
+MODULE_AUTHOR("Pradchaya Phucharoen  <pphuchar@celestica.com>");
+MODULE_DESCRIPTION("Celestica Seastone2/Questone2 Baseboard CPLD Driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/modules/questone2_switchboard.c b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/questone2_switchboard.c
new file mode 100644
index 000000000000..945d5f26c875
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/modules/questone2_switchboard.c
@@ -0,0 +1,2211 @@
+/*
+ * seastone_switchboard.c - driver for seastone2/questone2 Switch board FPGA/CPLD.
+ *
+ * Author: Pradchaya Phucharoen
+ *
+ * Copyright (C) 2017 Celestica Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ *   /
+ *   \--sys
+ *       \--devices
+ *            \--platform
+ *                \--seastone2
+ *                    |--FPGA
+ *                    |--CPLD1
+ *                    |--CPLD2
+ *                    \--SFF
+ *                        |--QSFP[1..32]
+ *                        \--SFP[1..2]
+ *
+ */
+
+#ifndef TEST_MODE
+#define MOD_VERSION "2.0.0"
+#else
+#define MOD_VERSION "TEST"
+#endif
+
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/stddef.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/acpi.h>
+#include <linux/io.h>
+#include <linux/dmi.h>
+#include <linux/slab.h>
+#include <linux/err.h>
+#include <linux/kobject.h>
+#include <linux/platform_device.h>
+#include <linux/types.h>
+#include <uapi/linux/stat.h>
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+#include <linux/jiffies.h>
+
+
+
+static int  majorNumber;
+#ifdef SEASTONE2
+#define CLASS_NAME "seastone2_fpga"
+#define DRIVER_NAME "seastone2"
+#define FPGA_PCI_NAME "Seastone2_fpga_pci"
+#else
+#define CLASS_NAME "questone2_fpga"
+#define DRIVER_NAME "questone2"
+#define FPGA_PCI_NAME "questone2_fpga_pci"
+#endif
+#define DEVICE_NAME "fwupgrade"
+
+
+static int smbus_access(struct i2c_adapter *adapter, u16 addr,
+              unsigned short flags, char rw, u8 cmd,
+              int size, union i2c_smbus_data *data);
+
+static int fpga_i2c_access(struct i2c_adapter *adapter, u16 addr,
+              unsigned short flags, char rw, u8 cmd,
+              int size, union i2c_smbus_data *data);
+
+static int fpgafw_init(void);
+static void fpgafw_exit(void);
+
+
+/*
+========================================
+FPGA PCIe BAR 0 Registers
+========================================
+Misc Control    0x00000000 – 0x000000FF.
+I2C_CH1         0x00000100 - 0x00000110
+I2C_CH2         0x00000200 - 0x00000210.
+I2C_CH3         0x00000300 - 0x00000310.
+I2C_CH4         0x00000400 - 0x00000410.
+I2C_CH5         0x00000500 - 0x00000510.
+I2C_CH6         0x00000600 - 0x00000610.
+I2C_CH7         0x00000700 - 0x00000710.
+I2C_CH8         0x00000800 - 0x00000810.
+I2C_CH9         0x00000900 - 0x00000910.
+I2C_CH10        0x00000A00 - 0x00000A10.
+SPI Master      0x00001200 - 0x00001300.
+PORT XCVR       0x00004000 - 0x00004FFF.
+*/
+
+/* MISC       */
+#define FPGA_VERSION            0x0000
+#define FPGA_VERSION_MJ_MSK     0xff00
+#define FPGA_VERSION_MN_MSK     0x00ff
+#define FPGA_SCRATCH            0x0004
+#define FPGA_BROAD_TYPE         0x0008
+#define FPGA_BROAD_REV_MSK      0x0038
+#define FPGA_BROAD_ID_MSK       0x0007
+#define FPGA_PLL_STATUS         0x0014
+#define BMC_I2C_SCRATCH         0x0020
+#define FPGA_SLAVE_CPLD_REST    0x0030
+#define FPGA_PERIPH_RESET_CTRL  0x0034
+#define FPGA_INT_STATUS         0x0040
+#define FPGA_INT_SRC_STATUS     0x0044
+#define FPGA_INT_FLAG           0x0048
+#define FPGA_INT_MASK           0x004c
+#define FPGA_MISC_CTRL          0x0050
+#define FPGA_MISC_STATUS        0x0054
+#define FPGA_AVS_VID_STATUS     0x0068
+#define FPGA_FEATURE_CARD_GPIO  0x0070
+#define FPGA_PORT_XCVR_READY    0x000c
+
+/* I2C_MASTER BASE ADDR */
+#define I2C_MASTER_FREQ_1           0x0100
+#define I2C_MASTER_CTRL_1           0x0104
+#define I2C_MASTER_STATUS_1         0x0108
+#define I2C_MASTER_DATA_1           0x010c
+#define I2C_MASTER_PORT_ID_1        0x0110
+#define I2C_MASTER_CH_1             1
+#define I2C_MASTER_CH_2             2
+#define I2C_MASTER_CH_3             3
+#define I2C_MASTER_CH_4             4
+#define I2C_MASTER_CH_5             5
+#define I2C_MASTER_CH_6             6
+#define I2C_MASTER_CH_7             7
+#define I2C_MASTER_CH_8             8
+#define I2C_MASTER_CH_9             9
+#define I2C_MASTER_CH_10            10
+#define I2C_MASTER_CH_TOTAL I2C_MASTER_CH_10
+
+/* SPI_MASTER */
+#define SPI_MASTER_WR_EN            0x1200 /* one bit */
+#define SPI_MASTER_WR_DATA          0x1204 /* 32 bits */
+#define SPI_MASTER_CHK_ID           0x1208 /* one bit */
+#define SPI_MASTER_VERIFY           0x120c /* one bit */
+#define SPI_MASTER_STATUS           0x1210 /* 15 bits */
+#define SPI_MASTER_MODULE_RST       0x1214 /* one bit */
+
+/* FPGA FRONT PANEL PORT MGMT */
+#define SFF_PORT_CTRL_BASE          0x4000
+#define SFF_PORT_STATUS_BASE        0x4004
+#define SFF_PORT_INT_STATUS_BASE    0x4008
+#define SFF_PORT_INT_MASK_BASE      0x400c
+
+#define PORT_XCVR_REGISTER_SIZE     0x1000
+
+/* PORT CTRL REGISTER
+[31:7]  RSVD
+[6]     LPMOD   6
+[5]     RSVD
+[4]     RST     4
+[3:1]   RSVD
+[0]     TXDIS   0
+*/
+#define CTRL_LPMOD   6
+#define CTRL_RST     4
+#define CTRL_TXDIS   0
+
+/* PORT STATUS REGISTER
+[31:6]  RSVD
+[5]     IRQ         5
+[4]     PRESENT     4
+[3]     RSVD
+[2]     TXFAULT     2
+[1]     RXLOS       1
+[0]     MODABS      0
+*/
+#define STAT_IRQ         5
+#define STAT_PRESENT     4
+#define STAT_TXFAULT     2
+#define STAT_RXLOS       1
+#define STAT_MODABS      0
+
+/* PORT INTRPT REGISTER
+[31:6]  RSVD
+[5]     INT_N       5
+[4]     PRESENT     4
+[3]     RSVD
+[2]     RSVD
+[1]     RXLOS       1
+[0]     MODABS      0
+*/
+#define INTR_INT_N      5
+#define INTR_PRESENT    4
+#define INTR_TXFAULT    2
+#define INTR_RXLOS      1
+#define INTR_MODABS     0
+
+/* PORT INT MASK REGISTER
+[31:6]  RSVD
+[5]     INT_N       5
+[4]     PRESENT     4
+[3]     RSVD
+[2]     RSVD
+[1]     RXLOS_INT   1
+[0]     MODABS      0
+*/
+#define MASK_INT_N      5
+#define MASK_PRESENT    4
+#define MASK_TXFAULT    2
+#define MASK_RXLOS      1
+#define MASK_MODABS     0
+
+enum {
+    I2C_SR_BIT_RXAK = 0,
+    I2C_SR_BIT_MIF,
+    I2C_SR_BIT_SRW,
+    I2C_SR_BIT_BCSTM,
+    I2C_SR_BIT_MAL,
+    I2C_SR_BIT_MBB,
+    I2C_SR_BIT_MAAS,
+    I2C_SR_BIT_MCF
+};
+
+enum {
+    I2C_CR_BIT_BCST = 0,
+    I2C_CR_BIT_RSTA = 2,
+    I2C_CR_BIT_TXAK,
+    I2C_CR_BIT_MTX,
+    I2C_CR_BIT_MSTA,
+    I2C_CR_BIT_MIEN,
+    I2C_CR_BIT_MEN,
+};
+
+/**
+ *
+ * The function is i2c algorithm implement to allow master access to
+ * correct endpoint devices trough the PCA9548 switch devices.
+ *
+ *  FPGA I2C Master [mutex resource]
+ *              |
+ *              |
+ *    ---------------------------
+ *    |        PCA9548(s)       |
+ *    ---1--2--3--4--5--6--7--8--
+ *       |  |  |  |  |  |  |  |
+ *   EEPROM      ...          EEPROM
+ *
+ */
+
+
+#ifdef SEASTONE2
+#define VIRTUAL_I2C_QSFP_PORT           32
+#define VIRTUAL_I2C_SFP_PORT            1
+#define VIRTUAL_I2C_CPLD_PORT           1
+#define VIRTUAL_I2C_POWER_CHIP_PORT     1
+#define VIRTUAL_I2C_CPLD_B_PORT         1
+#define VIRTUAL_I2C_PSU                 1
+#define VIRTUAL_I2C_FAN_TRAY            4
+#define VIRTUAL_I2C_POWER_MON           1
+#define VIRTUAL_I2C_LM75                1
+
+#define VIRTUAL_I2C_PORT_LENGTH \
+            VIRTUAL_I2C_SFP_PORT+VIRTUAL_I2C_QSFP_PORT+VIRTUAL_I2C_POWER_CHIP_PORT+VIRTUAL_I2C_CPLD_PORT+VIRTUAL_I2C_CPLD_B_PORT+VIRTUAL_I2C_PSU+VIRTUAL_I2C_FAN_TRAY+VIRTUAL_I2C_POWER_MON+VIRTUAL_I2C_LM75
+
+#define SFF_PORT_TOTAL    VIRTUAL_I2C_QSFP_PORT+VIRTUAL_I2C_SFP_PORT
+#else
+#define VIRTUAL_I2C_SFP_PORT            48
+#define VIRTUAL_I2C_QSFP_PORT           8
+#define VIRTUAL_I2C_CPLD_PORT           1
+#define VIRTUAL_I2C_POWER_CHIP_PORT     1
+#define VIRTUAL_I2C_CPLD_B_PORT         1
+#define VIRTUAL_I2C_PSU                 1
+#define VIRTUAL_I2C_FAN_TRAY            4
+#define VIRTUAL_I2C_POWER_MON           1
+#define VIRTUAL_I2C_LM75                1
+
+#define VIRTUAL_I2C_PORT_LENGTH \
+            VIRTUAL_I2C_SFP_PORT+VIRTUAL_I2C_QSFP_PORT+VIRTUAL_I2C_POWER_CHIP_PORT+VIRTUAL_I2C_CPLD_PORT+VIRTUAL_I2C_CPLD_B_PORT+VIRTUAL_I2C_PSU+VIRTUAL_I2C_FAN_TRAY+VIRTUAL_I2C_POWER_MON+VIRTUAL_I2C_LM75
+
+#define SFF_PORT_TOTAL    VIRTUAL_I2C_QSFP_PORT+VIRTUAL_I2C_SFP_PORT
+#endif
+
+#define VIRTUAL_I2C_CPLD_INDEX SFF_PORT_TOTAL
+
+#define VIRTUAL_I2C_BUS_OFFSET  2
+#define CPLD1_SLAVE_ADDR        0x30
+#define CPLD2_SLAVE_ADDR        0x31
+
+static struct class*  fpgafwclass  = NULL; ///< The device-driver class struct pointer
+static struct device* fpgafwdev = NULL; ///< The device-driver device struct pointer
+
+#define PCI_VENDOR_ID_TEST 0x1af4
+
+#ifndef PCI_VENDOR_ID_XILINX
+#define PCI_VENDOR_ID_XILINX 0x10EE
+#endif
+
+#define FPGA_PCIE_DEVICE_ID 0x7021
+#define TEST_PCIE_DEVICE_ID 0x1110
+
+
+#ifdef DEBUG_KERN
+#define info(fmt,args...)  printk(KERN_INFO "line %3d : "fmt,__LINE__,##args)
+#define check(REG)         printk(KERN_INFO "line %3d : %-8s = %2.2X",__LINE__,#REG,ioread8(REG));
+#else
+#define info(fmt,args...)
+#define check(REG)
+#endif
+
+#define GET_REG_BIT(REG,BIT)   ((ioread8(REG) >> BIT) & 0x01)
+#define SET_REG_BIT_H(REG,BIT) iowrite8(ioread8(REG) |  (0x01 << BIT),REG)
+#define SET_REG_BIT_L(REG,BIT) iowrite8(ioread8(REG) & ~(0x01 << BIT),REG)
+
+static struct mutex fpga_i2c_master_locks[I2C_MASTER_CH_TOTAL];
+/* Store lasted switch address and channel */
+static uint16_t fpga_i2c_lasted_access_port[I2C_MASTER_CH_TOTAL];
+
+enum PORT_TYPE {
+    NONE,
+    QSFP,
+    SFP
+};
+
+struct i2c_switch{
+    unsigned char master_bus;   // I2C bus number
+    unsigned char switch_addr;  // PCA9548 device address, 0xFF if directly connect to a bus.
+    unsigned char channel;      // PCA9548 channel number. If the switch_addr is 0xFF, this value is ignored.
+    enum PORT_TYPE port_type;   // QSFP/SFP tranceiver port type.
+    char calling_name[20];      // Calling name.
+};
+
+struct i2c_dev_data {
+    int portid;
+    struct i2c_switch pca9548;
+};
+
+#ifdef SEASTONE2
+/* PREDEFINED I2C SWITCH DEVICE TOPOLOGY */
+static struct i2c_switch fpga_i2c_bus_dev[] = {
+    /* BUS2 QSFP Exported as virtual bus */
+    {I2C_MASTER_CH_2,0x72,0,QSFP,"QSFP1"}, {I2C_MASTER_CH_2,0x72,1,QSFP,"QSFP2"}, {I2C_MASTER_CH_2,0x72,2,QSFP,"QSFP3"}, {I2C_MASTER_CH_2,0x72,3,QSFP,"QSFP4"},
+    {I2C_MASTER_CH_2,0x72,4,QSFP,"QSFP5"}, {I2C_MASTER_CH_2,0x72,5,QSFP,"QSFP6"}, {I2C_MASTER_CH_2,0x72,6,QSFP,"QSFP7"}, {I2C_MASTER_CH_2,0x72,7,QSFP,"QSFP8"},
+    {I2C_MASTER_CH_2,0x73,0,QSFP,"QSFP9"}, {I2C_MASTER_CH_2,0x73,1,QSFP,"QSFP10"},{I2C_MASTER_CH_2,0x73,2,QSFP,"QSFP11"},{I2C_MASTER_CH_2,0x73,3,QSFP,"QSFP12"},
+    {I2C_MASTER_CH_2,0x73,4,QSFP,"QSFP13"},{I2C_MASTER_CH_2,0x73,5,QSFP,"QSFP14"},{I2C_MASTER_CH_2,0x73,6,QSFP,"QSFP15"},{I2C_MASTER_CH_2,0x73,7,QSFP,"QSFP16"},
+    {I2C_MASTER_CH_2,0x74,0,QSFP,"QSFP17"},{I2C_MASTER_CH_2,0x74,1,QSFP,"QSFP18"},{I2C_MASTER_CH_2,0x74,2,QSFP,"QSFP19"},{I2C_MASTER_CH_2,0x74,3,QSFP,"QSFP20"},
+    {I2C_MASTER_CH_2,0x74,4,QSFP,"QSFP21"},{I2C_MASTER_CH_2,0x74,5,QSFP,"QSFP22"},{I2C_MASTER_CH_2,0x74,6,QSFP,"QSFP23"},{I2C_MASTER_CH_2,0x74,7,QSFP,"QSFP24"},
+    {I2C_MASTER_CH_2,0x75,0,QSFP,"QSFP25"},{I2C_MASTER_CH_2,0x75,1,QSFP,"QSFP26"},{I2C_MASTER_CH_2,0x75,2,QSFP,"QSFP27"},{I2C_MASTER_CH_2,0x75,3,QSFP,"QSFP28"},
+    {I2C_MASTER_CH_2,0x75,4,QSFP,"QSFP29"},{I2C_MASTER_CH_2,0x75,5,QSFP,"QSFP30"},{I2C_MASTER_CH_2,0x75,6,QSFP,"QSFP31"},{I2C_MASTER_CH_2,0x75,7,QSFP,"QSFP32"},
+    /* BUS1 SFP+ Exported as virtual bus */
+    {I2C_MASTER_CH_1,0x72,0,SFP,"SFP1"},{I2C_MASTER_CH_1,0x72,1,SFP,"SFP2"},
+    /* BUS3 CPLD Access via SYSFS */
+    {I2C_MASTER_CH_3,0xFF,0,NONE,"CPLD"},
+    /* BUS5 POWER CHIP Exported as virtual bus */
+    {I2C_MASTER_CH_5,0xFF,0,NONE,"POWER"},
+    /* BUS4 CPLD_B */
+    {I2C_MASTER_CH_4,0xFF,0,NONE,"CPLD_B"},
+    /* BUS6 PSU */
+    {I2C_MASTER_CH_6,0xFF,0,NONE,"PSU"},
+    /* BUS7 FAN */
+    /* Channel 2 is no hardware connected */
+    {I2C_MASTER_CH_7,0x77,0,NONE,"FAN5"},{I2C_MASTER_CH_7,0x77,1,NONE,"FAN4"},{I2C_MASTER_CH_7,0x77,3,NONE,"FAN2"},{I2C_MASTER_CH_7,0x77,4,NONE,"FAN1"},
+    /* BUS8 POWER MONITOR */
+    {I2C_MASTER_CH_8,0xFF,0,NONE,"UCD90120"},
+    /* BUS9 LM75 */
+    {I2C_MASTER_CH_9,0xFF,0,NONE,"LM75"},
+};
+#else
+/* PREDEFINED I2C SWITCH DEVICE TOPOLOGY */
+static struct i2c_switch fpga_i2c_bus_dev[] = {
+    /* BUS1 SFP Exported as virtual bus */
+    {I2C_MASTER_CH_10,0x72,0,SFP,"SFP1"}, {I2C_MASTER_CH_10,0x72,1,SFP,"SFP2"}, {I2C_MASTER_CH_10,0x72,2,SFP,"SFP3"}, {I2C_MASTER_CH_10,0x72,3,SFP,"SFP4"},
+    {I2C_MASTER_CH_10,0x72,4,SFP,"SFP5"}, {I2C_MASTER_CH_10,0x72,5,SFP,"SFP6"}, {I2C_MASTER_CH_10,0x72,6,SFP,"SFP7"}, {I2C_MASTER_CH_10,0x72,7,SFP,"SFP8"},
+    {I2C_MASTER_CH_10,0x73,0,SFP,"SFP9"}, {I2C_MASTER_CH_10,0x73,1,SFP,"SFP10"},{I2C_MASTER_CH_10,0x73,2,SFP,"SFP11"},{I2C_MASTER_CH_10,0x73,3,SFP,"SFP12"},
+    {I2C_MASTER_CH_10,0x73,4,SFP,"SFP13"},{I2C_MASTER_CH_10,0x73,5,SFP,"SFP14"},{I2C_MASTER_CH_10,0x73,6,SFP,"SFP15"},{I2C_MASTER_CH_10,0x73,7,SFP,"SFP16"},
+    {I2C_MASTER_CH_10,0x74,0,SFP,"SFP17"},{I2C_MASTER_CH_10,0x74,1,SFP,"SFP18"},{I2C_MASTER_CH_10,0x74,2,SFP,"SFP19"},{I2C_MASTER_CH_10,0x74,3,SFP,"SFP20"},
+    {I2C_MASTER_CH_10,0x74,4,SFP,"SFP21"},{I2C_MASTER_CH_10,0x74,5,SFP,"SFP22"},{I2C_MASTER_CH_10,0x74,6,SFP,"SFP23"},{I2C_MASTER_CH_10,0x74,7,SFP,"SFP24"},
+    {I2C_MASTER_CH_10,0x75,0,SFP,"SFP25"},{I2C_MASTER_CH_10,0x75,1,SFP,"SFP26"},{I2C_MASTER_CH_10,0x75,2,SFP,"SFP27"},{I2C_MASTER_CH_10,0x75,3,SFP,"SFP28"},
+    {I2C_MASTER_CH_10,0x75,4,SFP,"SFP29"},{I2C_MASTER_CH_10,0x75,5,SFP,"SFP30"},{I2C_MASTER_CH_10,0x75,6,SFP,"SFP31"},{I2C_MASTER_CH_10,0x75,7,SFP,"SFP32"},
+    {I2C_MASTER_CH_10,0x76,0,SFP,"SFP33"},{I2C_MASTER_CH_10,0x76,1,SFP,"SFP34"},{I2C_MASTER_CH_10,0x76,2,SFP,"SFP35"},{I2C_MASTER_CH_10,0x76,3,SFP,"SFP36"},
+    {I2C_MASTER_CH_10,0x76,4,SFP,"SFP37"},{I2C_MASTER_CH_10,0x76,5,SFP,"SFP38"},{I2C_MASTER_CH_10,0x76,6,SFP,"SFP39"},{I2C_MASTER_CH_10,0x76,7,SFP,"SFP40"},
+    {I2C_MASTER_CH_10,0x77,0,SFP,"SFP41"},{I2C_MASTER_CH_10,0x77,1,SFP,"SFP42"},{I2C_MASTER_CH_10,0x77,2,SFP,"SFP43"},{I2C_MASTER_CH_10,0x77,3,SFP,"SFP44"},
+    {I2C_MASTER_CH_10,0x77,4,SFP,"SFP45"},{I2C_MASTER_CH_10,0x77,5,SFP,"SFP46"},{I2C_MASTER_CH_10,0x77,6,SFP,"SFP47"},{I2C_MASTER_CH_10,0x77,7,SFP,"SFP48"},
+    /* BUS2 QSFP28 Exported as virtual bus */
+    {I2C_MASTER_CH_2,0x74,4,QSFP,"QSFP1"},{I2C_MASTER_CH_2,0x74,5,QSFP,"QSFP2"},{I2C_MASTER_CH_2,0x74,6,QSFP,"QSFP3"},{I2C_MASTER_CH_2,0x74,7,QSFP,"QSFP4"},
+    {I2C_MASTER_CH_2,0x74,0,QSFP,"QSFP5"},{I2C_MASTER_CH_2,0x74,1,QSFP,"QSFP6"},{I2C_MASTER_CH_2,0x74,2,QSFP,"QSFP7"},{I2C_MASTER_CH_2,0x74,3,QSFP,"QSFP8"},
+    /* BUS3 CPLD Access via SYSFS */
+    {I2C_MASTER_CH_3,0xFF,0,NONE,"CPLD"},
+    /* BUS5 POWER CHIP Exported as virtual bus */
+    {I2C_MASTER_CH_5,0xFF,0,NONE,"POWER"},
+    /* BUS4 CPLD_B */
+    {I2C_MASTER_CH_4,0xFF,0,NONE,"CPLD_B"},
+    /* BUS6 PSU */
+    {I2C_MASTER_CH_6,0xFF,0,NONE,"PSU"},
+    /* BUS7 FAN */
+    /* Channel 2 is no hardware connected */
+    {I2C_MASTER_CH_7,0x77,0,NONE,"FAN5"},{I2C_MASTER_CH_7,0x77,1,NONE,"FAN4"},{I2C_MASTER_CH_7,0x77,3,NONE,"FAN2"},{I2C_MASTER_CH_7,0x77,4,NONE,"FAN1"},
+    /* BUS8 UCD90120 */
+    {I2C_MASTER_CH_8,0xFF,0,NONE,"UCD90120"},
+    /* BUS9 TEMP SENSOR LM75 */
+    {I2C_MASTER_CH_9,0xFF,0,NONE,"LM75"}
+};
+#endif
+struct fpga_device{
+    /* data mmio region */
+    void __iomem *data_base_addr;
+    resource_size_t data_mmio_start;
+    resource_size_t data_mmio_len;
+};
+
+static struct fpga_device fpga_dev = {
+    .data_base_addr = NULL,
+    .data_mmio_start = NULL,
+    .data_mmio_len = NULL,
+};
+
+struct seastone2_fpga_data {
+    struct device *sff_devices[SFF_PORT_TOTAL];
+    struct i2c_client *sff_i2c_clients[SFF_PORT_TOTAL];
+    struct i2c_adapter *i2c_adapter[VIRTUAL_I2C_PORT_LENGTH];
+    struct mutex fpga_lock;         // For FPGA internal lock
+    unsigned long fpga_read_addr;
+    uint8_t cpld1_read_addr;
+    uint8_t cpld2_read_addr;
+};
+
+struct sff_device_data {
+    int portid;
+    enum PORT_TYPE port_type;
+};
+
+struct seastone2_fpga_data *fpga_data;
+
+/*
+ * Kernel object for other module drivers.
+ * Other module can use these kobject as a parent.
+ */
+
+static struct kobject *fpga = NULL;
+static struct kobject *cpld1 = NULL;
+static struct kobject *cpld2 = NULL;
+
+/**
+ * Device node in sysfs tree.
+ */
+static struct device *sff_dev = NULL;
+
+/**
+ * [get_fpga_reg_value description]
+ * @param  dev     [description]
+ * @param  devattr [description]
+ * @param  buf     [description]
+ * @return         [description]
+ */
+static ssize_t get_fpga_reg_value(struct device *dev, struct device_attribute *devattr,
+                char *buf)
+{
+    // read data from the address
+    uint32_t data;
+    data = ioread32(fpga_data->fpga_read_addr);
+    return sprintf(buf,"0x%8.8x\n",data);
+}
+/**
+ * [set_fpga_reg_address description]
+ * @param  dev     [description]
+ * @param  devattr [description]
+ * @param  buf     [description]
+ * @param  count   [description]
+ * @return         [description]
+ */
+static ssize_t set_fpga_reg_address(struct device *dev, struct device_attribute *devattr,
+                const char *buf, size_t count)
+{
+    uint32_t addr;
+    char *last;
+
+    addr = (uint32_t)strtoul(buf,&last,16);
+    if(addr == 0 && buf == last){
+        return -EINVAL;
+    }
+    fpga_data->fpga_read_addr = fpga_dev.data_base_addr+addr;
+    return count;
+}
+/**
+ * [get_fpga_scratch description]
+ * @param  dev     [description]
+ * @param  devattr [description]
+ * @param  buf     [description]
+ * @return         [description]
+ */
+static ssize_t get_fpga_scratch(struct device *dev, struct device_attribute *devattr,
+                char *buf)
+{
+    return sprintf(buf,"0x%8.8x\n", ioread32(fpga_dev.data_base_addr+FPGA_SCRATCH) & 0xffffffff);
+}
+/**
+ * [set_fpga_scratch description]
+ * @param  dev     [description]
+ * @param  devattr [description]
+ * @param  buf     [description]
+ * @param  count   [description]
+ * @return         [description]
+ */
+static ssize_t set_fpga_scratch(struct device *dev, struct device_attribute *devattr,
+                const char *buf, size_t count)
+{
+    uint32_t data;
+    char *last;
+    data = (uint32_t)strtoul(buf,&last,16);
+    if(data == 0 && buf == last){
+        return -EINVAL;
+    }
+    iowrite32(data, fpga_dev.data_base_addr+FPGA_SCRATCH);
+    return count;
+}
+/**
+ * [set_fpga_reg_value description]
+ * @param  dev     [description]
+ * @param  devattr [description]
+ * @param  buf     [description]
+ * @return         [description]
+ */
+static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *devattr,
+                const char *buf, size_t count)
+{
+    //register is 4 bytes
+    uint32_t addr;
+    uint32_t value;
+    uint32_t mode = 8;
+    char *tok;
+    char clone[count];
+    char *pclone = clone;
+    char *last;
+
+    strscpy(clone, buf, count);
+
+    mutex_lock(&fpga_data->fpga_lock);
+    tok = strsep((char**)&pclone, " ");
+    if(tok == NULL){
+        mutex_unlock(&fpga_data->fpga_lock);
+        return -EINVAL;
+    }
+    addr = (uint32_t)strtoul(tok,&last,16);
+    if(addr == 0 && tok == last){
+        mutex_unlock(&fpga_data->fpga_lock);
+        return -EINVAL;
+    }
+    tok = strsep((char**)&pclone, " ");
+    if(tok == NULL){
+        mutex_unlock(&fpga_data->fpga_lock);
+        return -EINVAL;
+    }
+    value = (uint32_t)strtoul(tok,&last,16);
+    if(value == 0 && tok == last){
+        mutex_unlock(&fpga_data->fpga_lock);
+        return -EINVAL;
+    }
+    tok = strsep((char**)&pclone, " ");
+    if(tok == NULL){
+        mode = 32;
+    }else{
+        mode = (uint32_t)strtoul(tok,&last,10);
+        if(mode == 0 && tok == last){
+            mutex_unlock(&fpga_data->fpga_lock);
+            return -EINVAL;
+        }
+    }
+    if(mode == 32){
+        iowrite32(value, fpga_dev.data_base_addr+addr);
+    }else if(mode == 8){
+        iowrite8(value, fpga_dev.data_base_addr+addr);
+    }else{
+        mutex_unlock(&fpga_data->fpga_lock);
+        return -EINVAL;
+    }
+    mutex_unlock(&fpga_data->fpga_lock);
+    return count;
+}
+
+/**
+ * Read all FPGA XCVR register in binary mode.
+ * @param  filp  [description]
+ * @param  kobj  [description]
+ * @param  attr  [description]
+ * @param  buf   [description]
+ * @param  off   [description]
+ * @param  count [description]
+ * @return       [description]
+ */
+static ssize_t dump_read(struct file *filp, struct kobject *kobj,
+                struct bin_attribute *attr, char *buf,
+                loff_t off, size_t count)
+{
+    unsigned long i=0;
+    ssize_t status;
+    u8 read_reg;
+
+    if( off + count > PORT_XCVR_REGISTER_SIZE ){
+        return -EINVAL;
+    }
+    mutex_lock(&fpga_data->fpga_lock);
+    while(i < count){
+        read_reg = ioread8(fpga_dev.data_base_addr + SFF_PORT_CTRL_BASE + off + i);
+        buf[i++] = read_reg;
+    }
+    status = count;
+    mutex_unlock(&fpga_data->fpga_lock);
+    return status;
+}
+
+/**
+ * Show FPGA port XCVR ready status
+ * @param  dev  [description]
+ * @param  attr [description]
+ * @param  buf  [description]
+ * @return      [description]
+ */
+static ssize_t ready_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    u32 data;
+    struct sff_device_data *dev_data = dev_get_drvdata(dev);
+    unsigned int REGISTER = FPGA_PORT_XCVR_READY;
+
+    mutex_lock(&fpga_data->fpga_lock);
+    data = ioread32(fpga_dev.data_base_addr+REGISTER);
+    mutex_unlock(&fpga_data->fpga_lock);
+    return sprintf(buf, "%d\n", (data >> 0) & 1U);
+}
+
+/* FPGA attributes */
+static DEVICE_ATTR( getreg, 0600, get_fpga_reg_value, set_fpga_reg_address);
+static DEVICE_ATTR( scratch, 0600, get_fpga_scratch, set_fpga_scratch);
+static DEVICE_ATTR( setreg, 0200, NULL , set_fpga_reg_value);
+static DEVICE_ATTR_RO(ready);
+static BIN_ATTR_RO( dump, PORT_XCVR_REGISTER_SIZE);
+
+static struct bin_attribute *fpga_bin_attrs[] = {
+        &bin_attr_dump,
+        NULL,
+};
+
+static struct attribute *fpga_attrs[] = {
+        &dev_attr_getreg.attr,
+        &dev_attr_scratch.attr,
+        &dev_attr_setreg.attr,
+        &dev_attr_ready.attr,
+        NULL,
+};
+
+static struct attribute_group fpga_attr_grp = {
+        .attrs = fpga_attrs,
+        .bin_attrs = fpga_bin_attrs,
+};
+
+/* SW CPLDs attributes */
+static ssize_t cpld1_getreg_show(struct device *dev,
+                                 struct device_attribute *attr, char *buf)
+{
+    // CPLD register is one byte
+    uint8_t data;
+    int err;
+
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],
+                          CPLD1_SLAVE_ADDR, 0x00,
+                          I2C_SMBUS_READ, fpga_data->cpld1_read_addr,
+                          I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data);
+
+    if (err < 0)
+        return err;
+
+    return sprintf(buf, "0x%2.2x\n", data);
+}
+
+static ssize_t cpld1_getreg_store(struct device *dev,
+                                  struct device_attribute *attr,
+                                  const char *buf, size_t count)
+{
+    ssize_t status;
+    uint8_t addr;
+
+    status = kstrtou8(buf, 0, &addr);
+    if (status == 0) {
+        fpga_data->cpld1_read_addr = addr;
+        status = count;
+    }
+    return status;
+}
+struct device_attribute dev_attr_cpld1_getreg = __ATTR(getreg, 0600, cpld1_getreg_show, cpld1_getreg_store);
+
+static ssize_t cpld1_dump_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    // CPLD register is one byte
+    uint8_t data;
+    fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00,I2C_SMBUS_READ,fpga_data->cpld1_read_addr,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&data);
+    return sprintf(buf,"0x%2.2x\n",data);
+}
+static ssize_t cpld1_dump_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
+{
+    uint8_t addr;
+    char *last;
+    addr = (uint8_t)strtoul(buf,&last,16);
+    if(addr == 0 && buf == last){
+        return -EINVAL;
+    }
+    fpga_data->cpld1_read_addr = addr;
+    return size;
+}
+struct device_attribute dev_attr_cpld1_dump = __ATTR(dump,0600,cpld1_dump_show,cpld1_dump_store);
+
+static ssize_t cpld1_scratch_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    // CPLD register is one byte
+    __u8 data;
+    int err;
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00,I2C_SMBUS_READ,0x01,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&data);
+    if(err < 0)
+        return err;
+    return sprintf(buf, "0x%2.2x\n",data);
+}
+static ssize_t cpld1_scratch_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
+{
+    // CPLD register is one byte
+    __u8 data;
+    char *last;
+    int err;
+    data = (uint8_t)strtoul(buf,&last,16);
+    if(data == 0 && buf == last){
+        return -EINVAL;
+    }
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00,I2C_SMBUS_WRITE,0x01,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&data);
+    if(err < 0)
+        return err;
+    return size;
+}
+struct device_attribute dev_attr_cpld1_scratch = __ATTR(scratch,0600,cpld1_scratch_show,cpld1_scratch_store);
+
+static ssize_t cpld1_setreg_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
+{
+
+    uint8_t addr,value;
+    char *tok;
+    char clone[size];
+    char *pclone = clone;
+    int err;
+    char *last;
+
+    strscpy(clone, buf, size);
+
+    tok = strsep((char**)&pclone, " ");
+    if(tok == NULL){
+        return sprintf(buf,"ERROR line %d",__LINE__);
+    }
+    addr = (uint8_t)strtoul(tok,&last,16);
+    if(addr == 0 && tok == last){
+        return -EINVAL;
+    }
+    tok = strsep((char**)&pclone, " ");
+    if(tok == NULL){
+        return sprintf(buf,"ERROR line %d",__LINE__);
+    }
+    value = (uint8_t)strtoul(tok,&last,16);
+    if(value == 0 && tok == last){
+        return -EINVAL;
+    }
+
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00,I2C_SMBUS_WRITE,addr,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&value);
+    if(err < 0)
+        return sprintf(buf,"ERROR line %d",__LINE__);
+
+    return size;
+}
+struct device_attribute dev_attr_cpld1_setreg = __ATTR(setreg,0200,NULL,cpld1_setreg_store);
+
+static struct attribute *cpld1_attrs[] = {
+        &dev_attr_cpld1_getreg.attr,
+        &dev_attr_cpld1_dump.attr,
+        &dev_attr_cpld1_scratch.attr,
+        &dev_attr_cpld1_setreg.attr,
+        NULL,
+};
+
+static struct attribute_group cpld1_attr_grp = {
+        .attrs = cpld1_attrs,
+};
+
+static ssize_t cpld2_getreg_show(struct device *dev,
+                                 struct device_attribute *attr, char *buf)
+{
+    // CPLD register is one byte
+    uint8_t data;
+    int err;
+
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],
+                          CPLD2_SLAVE_ADDR, 0x00, I2C_SMBUS_READ, fpga_data->cpld2_read_addr,
+                          I2C_SMBUS_BYTE_DATA, (union i2c_smbus_data*)&data);
+    if (err < 0)
+        return err;
+
+    return sprintf(buf, "0x%2.2x\n", data);
+}
+
+static ssize_t cpld2_getreg_store(struct device *dev,
+                                  struct device_attribute *attr,
+                                  const char *buf, size_t count)
+{
+    // CPLD register is one byte
+    uint8_t addr;
+    ssize_t status;
+
+    status = kstrtou8(buf, 0, &addr);
+    if (status == 0) {
+        fpga_data->cpld2_read_addr = addr;
+        status = count;
+    }
+    return status;
+}
+struct device_attribute dev_attr_cpld2_getreg = __ATTR(getreg, 0600, cpld2_getreg_show, cpld2_getreg_store);
+
+static ssize_t cpld2_dump_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    // CPLD register is one byte
+    uint8_t data;
+    fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00,I2C_SMBUS_READ,fpga_data->cpld2_read_addr,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&data);
+    return sprintf(buf,"0x%2.2x\n",data);
+}
+static ssize_t cpld2_dump_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
+{
+    // CPLD register is one byte
+    uint32_t addr;
+    char *last;
+    addr = (uint8_t)strtoul(buf,&last,16);
+    if(addr == 0 && buf == last){
+        return -EINVAL;
+    }
+    fpga_data->cpld2_read_addr = addr;
+    return size;
+}
+struct device_attribute dev_attr_cpld2_dump = __ATTR(dump,0600,cpld2_dump_show,cpld2_dump_store);
+
+static ssize_t cpld2_scratch_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    // CPLD register is one byte
+    __u8 data;
+    int err;
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00,I2C_SMBUS_READ,0x01,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&data);
+    if(err < 0)
+        return err;
+    return sprintf(buf, "0x%2.2x\n",data);
+}
+static ssize_t cpld2_scratch_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
+{
+    // CPLD register is one byte
+    __u8 data;
+    char *last;
+    int err;
+
+    data = (uint8_t)strtoul(buf,&last,16);
+    if(data == 0 && buf == last){
+        return -EINVAL;
+    }
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00,I2C_SMBUS_WRITE,0x01,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&data);
+    if(err < 0)
+        return err;
+    return size;
+}
+struct device_attribute dev_attr_cpld2_scratch = __ATTR(scratch,0600,cpld2_scratch_show,cpld2_scratch_store);
+
+static ssize_t cpld2_setreg_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
+{
+    uint8_t addr,value;
+    char *tok;
+    char clone[size];
+    char *pclone = clone;
+    int err;
+    char *last;
+
+    strscpy(clone, buf, size);
+
+    tok = strsep((char**)&pclone, " ");
+    if(tok == NULL){
+        return -EINVAL;
+    }
+    addr = (uint8_t)strtoul(tok,&last,16);
+    if(addr == 0 && tok == last){
+        return -EINVAL;
+    }
+    tok = strsep((char**)&pclone, " ");
+    if(tok == NULL){
+        return -EINVAL;
+    }
+    value = (uint8_t)strtoul(tok,&last,16);
+    if(value == 0 && tok == last){
+        return -EINVAL;
+    }
+
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00,I2C_SMBUS_WRITE,addr,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&value);
+    if(err < 0)
+        return err;
+
+    return size;
+}
+struct device_attribute dev_attr_cpld2_setreg = __ATTR(setreg,0200,NULL,cpld2_setreg_store);
+
+static struct attribute *cpld2_attrs[] = {
+        &dev_attr_cpld2_getreg.attr,
+        &dev_attr_cpld2_dump.attr,
+        &dev_attr_cpld2_scratch.attr,
+        &dev_attr_cpld2_setreg.attr,
+        NULL,
+};
+
+static struct attribute_group cpld2_attr_grp = {
+        .attrs = cpld2_attrs,
+};
+
+/* QSFP/SFP+ attributes */
+static ssize_t qsfp_modirq_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    u32 data;
+    struct sff_device_data *dev_data = dev_get_drvdata(dev);
+    unsigned int portid = dev_data->portid;
+    unsigned int REGISTER = SFF_PORT_STATUS_BASE + (portid-1)*0x10;
+
+    mutex_lock(&fpga_data->fpga_lock);
+    data = ioread32(fpga_dev.data_base_addr+REGISTER);
+    mutex_unlock(&fpga_data->fpga_lock);
+    return sprintf(buf, "%d\n", (data >> STAT_IRQ) & 1U);
+}
+DEVICE_ATTR_RO(qsfp_modirq);
+
+static ssize_t qsfp_modprs_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    u32 data;
+    struct sff_device_data *dev_data = dev_get_drvdata(dev);
+    unsigned int portid = dev_data->portid;
+    unsigned int REGISTER = SFF_PORT_STATUS_BASE + (portid-1)*0x10;
+
+    mutex_lock(&fpga_data->fpga_lock);
+    data = ioread32(fpga_dev.data_base_addr+REGISTER);
+    mutex_unlock(&fpga_data->fpga_lock);
+    return sprintf(buf, "%d\n", (data >> STAT_PRESENT) & 1U);
+}
+DEVICE_ATTR_RO(qsfp_modprs);
+
+static ssize_t sfp_txfault_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    u32 data;
+    struct sff_device_data *dev_data = dev_get_drvdata(dev);
+    unsigned int portid = dev_data->portid;
+    unsigned int REGISTER = SFF_PORT_STATUS_BASE + (portid-1)*0x10;
+
+    mutex_lock(&fpga_data->fpga_lock);
+    data = ioread32(fpga_dev.data_base_addr+REGISTER);
+    mutex_unlock(&fpga_data->fpga_lock);
+    return sprintf(buf, "%d\n", (data >> STAT_TXFAULT) & 1U);
+}
+DEVICE_ATTR_RO(sfp_txfault);
+
+static ssize_t sfp_rxlos_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    u32 data;
+    struct sff_device_data *dev_data = dev_get_drvdata(dev);
+    unsigned int portid = dev_data->portid;
+    unsigned int REGISTER = SFF_PORT_STATUS_BASE + (portid-1)*0x10;
+
+    mutex_lock(&fpga_data->fpga_lock);
+    data = ioread32(fpga_dev.data_base_addr+REGISTER);
+    mutex_unlock(&fpga_data->fpga_lock);
+    return sprintf(buf, "%d\n", (data >> STAT_RXLOS) & 1U);
+}
+DEVICE_ATTR_RO(sfp_rxlos);
+
+static ssize_t sfp_modabs_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    u32 data;
+    struct sff_device_data *dev_data = dev_get_drvdata(dev);
+    unsigned int portid = dev_data->portid;
+    unsigned int REGISTER = SFF_PORT_STATUS_BASE + (portid-1)*0x10;
+
+    mutex_lock(&fpga_data->fpga_lock);
+    data = ioread32(fpga_dev.data_base_addr+REGISTER);
+    mutex_unlock(&fpga_data->fpga_lock);
+    return sprintf(buf, "%d\n", (data >> STAT_MODABS) & 1U);
+}
+DEVICE_ATTR_RO(sfp_modabs);
+
+static ssize_t qsfp_lpmode_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    u32 data;
+    struct sff_device_data *dev_data = dev_get_drvdata(dev);
+    unsigned int portid = dev_data->portid;
+    unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid-1)*0x10;
+
+    mutex_lock(&fpga_data->fpga_lock);
+    data = ioread32(fpga_dev.data_base_addr+REGISTER);
+    mutex_unlock(&fpga_data->fpga_lock);
+    return sprintf(buf, "%d\n", (data >> CTRL_LPMOD) & 1U);
+}
+static ssize_t qsfp_lpmode_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
+{
+    ssize_t status;
+    long value;
+    u32 data;
+    struct sff_device_data *dev_data = dev_get_drvdata(dev);
+    unsigned int portid = dev_data->portid;
+    unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid-1)*0x10;
+
+    mutex_lock(&fpga_data->fpga_lock);
+    status = kstrtol(buf, 0, &value);
+    if (status == 0) {
+        // check if value is 0 clear
+        data = ioread32(fpga_dev.data_base_addr+REGISTER);
+        if(!value)
+            data = data & ~( (u32)0x1 << CTRL_LPMOD);
+        else
+            data = data | ((u32)0x1 << CTRL_LPMOD);
+        iowrite32(data,fpga_dev.data_base_addr+REGISTER);
+        status = size;
+    }
+    mutex_unlock(&fpga_data->fpga_lock);
+    return status;
+}
+DEVICE_ATTR_RW(qsfp_lpmode);
+
+static ssize_t qsfp_reset_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    u32 data;
+    struct sff_device_data *dev_data = dev_get_drvdata(dev);
+    unsigned int portid = dev_data->portid;
+    unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid-1)*0x10;
+
+    mutex_lock(&fpga_data->fpga_lock);
+    data = ioread32(fpga_dev.data_base_addr+REGISTER);
+    mutex_unlock(&fpga_data->fpga_lock);
+    return sprintf(buf, "%d\n", (data >> CTRL_RST) & 1U);
+}
+
+static ssize_t qsfp_reset_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
+{
+    ssize_t status;
+    long value;
+    u32 data;
+    struct sff_device_data *dev_data = dev_get_drvdata(dev);
+    unsigned int portid = dev_data->portid;
+    unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid-1)*0x10;
+
+    mutex_lock(&fpga_data->fpga_lock);
+    status = kstrtol(buf, 0, &value);
+    if (status == 0) {
+        // check if value is 0 clear
+        data = ioread32(fpga_dev.data_base_addr+REGISTER);
+        if(!value)
+            data = data & ~( (u32)0x1 << CTRL_RST);
+        else
+            data = data | ((u32)0x1 << CTRL_RST);
+        iowrite32(data,fpga_dev.data_base_addr+REGISTER);
+        status = size;
+    }
+    mutex_unlock(&fpga_data->fpga_lock);
+    return status;
+}
+DEVICE_ATTR_RW(qsfp_reset);
+
+static ssize_t sfp_txdisable_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    u32 data;
+    struct sff_device_data *dev_data = dev_get_drvdata(dev);
+    unsigned int portid = dev_data->portid;
+    unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid-1)*0x10;
+
+    mutex_lock(&fpga_data->fpga_lock);
+    data = ioread32(fpga_dev.data_base_addr+REGISTER);
+    mutex_unlock(&fpga_data->fpga_lock);
+    return sprintf(buf, "%d\n", (data >> CTRL_TXDIS) & 1U);
+}
+static ssize_t sfp_txdisable_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
+{
+    ssize_t status;
+    long value;
+    u32 data;
+    struct sff_device_data *dev_data = dev_get_drvdata(dev);
+    unsigned int portid = dev_data->portid;
+    unsigned int REGISTER = SFF_PORT_CTRL_BASE + (portid-1)*0x10;
+
+    mutex_lock(&fpga_data->fpga_lock);
+    status = kstrtol(buf, 0, &value);
+    if (status == 0) {
+        // check if value is 0 clear
+        data = ioread32(fpga_dev.data_base_addr+REGISTER);
+        if(!value)
+            data = data & ~( (u32)0x1 << CTRL_TXDIS);
+        else
+            data = data | ((u32)0x1 << CTRL_TXDIS);
+        iowrite32(data,fpga_dev.data_base_addr+REGISTER);
+        status = size;
+    }
+    mutex_unlock(&fpga_data->fpga_lock);
+    return status;
+}
+DEVICE_ATTR_RW(sfp_txdisable);
+
+static struct attribute *sff_attrs[] = {
+    &dev_attr_qsfp_modirq.attr,
+    &dev_attr_qsfp_modprs.attr,
+    &dev_attr_qsfp_lpmode.attr,
+    &dev_attr_qsfp_reset.attr,
+    &dev_attr_sfp_txfault.attr,
+    &dev_attr_sfp_rxlos.attr,
+    &dev_attr_sfp_modabs.attr,
+    &dev_attr_sfp_txdisable.attr,
+    NULL,
+};
+
+static struct attribute_group sff_attr_grp = {
+        .attrs = sff_attrs,
+};
+
+static const struct attribute_group *sff_attr_grps[] = {
+    &sff_attr_grp,
+    NULL
+};
+
+
+static ssize_t port_led_mode_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    // value can be "nomal", "test"
+    __u8 led_mode_1,led_mode_2;
+    int err;
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00,I2C_SMBUS_READ,0x09,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_mode_1);
+    if(err < 0)
+        return err;
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00,I2C_SMBUS_READ,0x09,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_mode_2);
+    if(err < 0)
+        return err;
+    return sprintf(buf, "%s %s\n",
+            led_mode_1 ? "test" : "normal",
+            led_mode_2 ? "test" : "normal");
+}
+static ssize_t port_led_mode_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
+{
+    int status;
+    __u8 led_mode_1;
+    if(sysfs_streq(buf, "test")){
+        led_mode_1 = 0x01;
+    }else if(sysfs_streq(buf, "normal")){
+        led_mode_1 = 0x00;
+    }else{
+        return -EINVAL;
+    }
+    status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00,
+        I2C_SMBUS_WRITE,0x09,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_mode_1);
+    status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00,
+        I2C_SMBUS_WRITE,0x09,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_mode_1);
+    return size;
+}
+DEVICE_ATTR_RW(port_led_mode);
+
+// Only work when port_led_mode set to 1
+static ssize_t port_led_color_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    // value can be "off", "green", "amber", "both"
+    __u8 led_color1,led_color2;
+    int err;
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00,I2C_SMBUS_READ,0x09,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_color1);
+    if(err < 0)
+        return err;
+    err = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00,I2C_SMBUS_READ,0x09,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_color2);
+    if(err < 0)
+        return err;
+    return sprintf(buf, "%s %s\n",
+            led_color1 == 0x03 ? "off" : led_color1 == 0x02 ? "green" : led_color1 ==0x01 ? "amber": "both",
+            led_color2 == 0x03 ? "off" : led_color2 == 0x02 ? "green" : led_color2 ==0x01 ? "amber": "both");
+}
+
+static ssize_t port_led_color_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
+{
+    int status;
+    __u8 led_color;
+    if(sysfs_streq(buf, "off")){
+        led_color = 0x03;
+    }else if(sysfs_streq(buf, "green")){
+        led_color = 0x02;
+    }else if(sysfs_streq(buf, "amber")){
+        led_color = 0x01;
+    }else if(sysfs_streq(buf, "both")){
+        led_color = 0x00;
+    }else{
+        status = -EINVAL;
+        return status;
+    }
+    status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00,
+        I2C_SMBUS_WRITE,0x0A,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_color);
+    status = fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00,
+        I2C_SMBUS_WRITE,0x0A,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&led_color);
+    return size;
+}
+DEVICE_ATTR_RW(port_led_color);
+
+static struct attribute *sff_led_test[] = {
+    &dev_attr_port_led_mode.attr,
+    &dev_attr_port_led_color.attr,
+    NULL,
+};
+
+static struct attribute_group sff_led_test_grp = {
+        .attrs = sff_led_test,
+};
+
+static struct device * seastone2_sff_init(int portid){
+    struct sff_device_data *new_data;
+    struct device *new_device;
+
+    new_data = kzalloc(sizeof(*new_data), GFP_KERNEL);
+    if (!new_data) {
+        printk(KERN_ALERT "Cannot alloc sff device data @port%d", portid);
+        return NULL;
+    }
+    /* The QSFP port ID start from 1 */
+    new_data->portid = portid+1;
+    new_data->port_type = fpga_i2c_bus_dev[portid].port_type;
+    new_device = device_create_with_groups(fpgafwclass, sff_dev, MKDEV(0,0), new_data, sff_attr_grps, "%s",fpga_i2c_bus_dev[portid].calling_name);
+    if (IS_ERR(new_device)) {
+        printk(KERN_ALERT "Cannot create sff device @port%d", portid);
+        kfree(new_data);
+        return NULL;
+    }
+    return new_device;
+}
+
+static int i2c_wait_ack(struct i2c_adapter *a,unsigned long timeout,int writing){
+    int error = 0;
+    int Status;
+
+    struct i2c_dev_data *new_data = i2c_get_adapdata(a);
+    void __iomem *pci_bar = fpga_dev.data_base_addr;
+
+    unsigned int REG_FDR0;
+    unsigned int REG_CR0;
+    unsigned int REG_SR0;
+    unsigned int REG_DR0;
+    unsigned int REG_ID0;
+
+    unsigned int master_bus = new_data->pca9548.master_bus;
+
+    if(master_bus < I2C_MASTER_CH_1 || master_bus > I2C_MASTER_CH_TOTAL){
+        error = -ENXIO;
+        return error;
+    }
+
+    REG_FDR0  = I2C_MASTER_FREQ_1    + (master_bus-1)*0x0100;
+    REG_CR0   = I2C_MASTER_CTRL_1    + (master_bus-1)*0x0100;
+    REG_SR0   = I2C_MASTER_STATUS_1  + (master_bus-1)*0x0100;
+    REG_DR0   = I2C_MASTER_DATA_1    + (master_bus-1)*0x0100;
+    REG_ID0   = I2C_MASTER_PORT_ID_1 + (master_bus-1)*0x0100;
+
+    check(pci_bar+REG_SR0);
+    check(pci_bar+REG_CR0);
+
+    timeout = jiffies + msecs_to_jiffies(timeout);
+    while(1){
+        Status = ioread8(pci_bar+REG_SR0);
+        if(jiffies > timeout){
+            info("Status %2.2X",Status);
+            info("Error Timeout");
+            error = -ETIMEDOUT;
+            break;
+        }
+
+
+        if(Status & (1 << I2C_SR_BIT_MIF)){
+            break;
+        }
+
+        if(writing == 0 && (Status & (1<<I2C_SR_BIT_MCF))){
+            break;
+        }
+    }
+    Status = ioread8(pci_bar+REG_SR0);
+    iowrite8(0, pci_bar+REG_SR0);
+
+    if(error<0){
+        info("Status %2.2X",Status);
+        return error;
+    }
+
+    if(!(Status & (1 << I2C_SR_BIT_MCF))){
+        info("Error Unfinish");
+        return -EIO;
+    }
+
+    if(Status & (1 <<I2C_SR_BIT_MAL)){
+        info("Error MAL");
+        return -EAGAIN;
+    }
+
+    if(Status & (1 << I2C_SR_BIT_RXAK)){
+        info( "SL No Acknowlege");
+        if(writing){
+            info("Error No Acknowlege");
+            iowrite8(1<<I2C_CR_BIT_MEN,pci_bar+REG_CR0);
+            return -ENXIO;
+        }
+    }else{
+        info( "SL Acknowlege");
+    }
+
+    return 0;
+}
+
+static int smbus_access(struct i2c_adapter *adapter, u16 addr,
+              unsigned short flags, char rw, u8 cmd,
+              int size, union i2c_smbus_data *data)
+{
+        int error = 0;
+        struct i2c_dev_data *dev_data;
+        /* Write the command register */
+        dev_data = i2c_get_adapdata(adapter);
+
+        unsigned int  portid = dev_data->portid;
+        void __iomem *pci_bar = fpga_dev.data_base_addr;
+
+#ifdef DEBUG_KERN
+        printk(KERN_INFO "portid %2d|@ 0x%2.2X|f 0x%4.4X|(%d)%-5s| (%d)%-15s|CMD %2.2X "
+            ,portid,addr,flags,rw,rw == 1 ? "READ ":"WRITE"
+            ,size,                  size == 0 ? "QUICK" :
+                                    size == 1 ? "BYTE" :
+                                    size == 2 ? "BYTE_DATA" :
+                                    size == 3 ? "WORD_DATA" :
+                                    size == 4 ? "PROC_CALL" :
+                                    size == 5 ? "BLOCK_DATA" :
+                                    size == 8 ? "I2C_BLOCK_DATA" :  "ERROR"
+            ,cmd);
+#endif
+        /* Map the size to what the chip understands */
+        switch (size) {
+            case I2C_SMBUS_QUICK:
+            case I2C_SMBUS_BYTE:
+            case I2C_SMBUS_BYTE_DATA:
+            case I2C_SMBUS_WORD_DATA:
+            case I2C_SMBUS_BLOCK_DATA:
+            case I2C_SMBUS_I2C_BLOCK_DATA:
+                break;
+            default:
+                printk(KERN_INFO "Unsupported transaction %d\n", size);
+                error = -EOPNOTSUPP;
+                goto Done;
+        }
+
+        unsigned int REG_FDR0;
+        unsigned int REG_CR0;
+        unsigned int REG_SR0;
+        unsigned int REG_DR0;
+        unsigned int REG_ID0;
+
+        unsigned int master_bus = dev_data->pca9548.master_bus;
+
+        if(master_bus < I2C_MASTER_CH_1 || master_bus > I2C_MASTER_CH_TOTAL){
+            error = -ENXIO;
+            goto Done;
+        }
+
+        REG_FDR0  = I2C_MASTER_FREQ_1    + (master_bus-1)*0x0100;
+        REG_CR0   = I2C_MASTER_CTRL_1    + (master_bus-1)*0x0100;
+        REG_SR0   = I2C_MASTER_STATUS_1  + (master_bus-1)*0x0100;
+        REG_DR0   = I2C_MASTER_DATA_1    + (master_bus-1)*0x0100;
+        REG_ID0   = I2C_MASTER_PORT_ID_1 + (master_bus-1)*0x0100;
+
+        iowrite8(portid,pci_bar+REG_ID0);
+
+        int cnt=0;
+
+        ////[S][ADDR/R]
+        // Clear status register
+        iowrite8(0,pci_bar+REG_SR0);
+        iowrite8(1 << I2C_CR_BIT_MIEN | 1 << I2C_CR_BIT_MTX | 1 << I2C_CR_BIT_MSTA ,pci_bar+REG_CR0);
+        SET_REG_BIT_H(pci_bar+REG_CR0,I2C_CR_BIT_MEN);
+
+        if(rw == I2C_SMBUS_READ &&
+                (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE)){
+            // sent device address with Read mode
+            iowrite8(addr << 1 | 0x01,pci_bar+REG_DR0);
+        }else{
+            // sent device address with Write mode
+           iowrite8(addr << 1 | 0x00,pci_bar+REG_DR0);
+        }
+
+
+
+        info( "MS Start");
+
+        //// Wait {A}
+        error = i2c_wait_ack(adapter,12,1);
+        if(error<0){
+            info( "get error %d",error);
+            goto Done;
+        }
+
+        //// [CMD]{A}
+        if(size == I2C_SMBUS_BYTE_DATA ||
+            size == I2C_SMBUS_WORD_DATA ||
+            size == I2C_SMBUS_BLOCK_DATA ||
+            size == I2C_SMBUS_I2C_BLOCK_DATA ||
+            (size == I2C_SMBUS_BYTE && rw == I2C_SMBUS_WRITE)){
+
+            // sent command code to data register
+            iowrite8(cmd,pci_bar+REG_DR0);
+            info( "MS Send CMD 0x%2.2X",cmd);
+
+            // Wait {A}
+            error = i2c_wait_ack(adapter,12,1);
+            if(error<0){
+                info( "get error %d",error);
+                goto Done;
+            }
+        }
+
+        switch(size){
+            case I2C_SMBUS_BYTE_DATA:
+                    cnt = 1;  break;
+            case I2C_SMBUS_WORD_DATA:
+                    cnt = 2;  break;
+            case I2C_SMBUS_BLOCK_DATA:
+            case I2C_SMBUS_I2C_BLOCK_DATA:
+            /* In block data modes keep number of byte in block[0] */
+                    cnt = data->block[0];
+                              break;
+            default:
+                    cnt = 0;  break;
+        }
+
+        // [CNT]  used only block data write
+        if(size == I2C_SMBUS_BLOCK_DATA && rw == I2C_SMBUS_WRITE){
+
+            iowrite8(cnt,pci_bar+REG_DR0);
+            info( "MS Send CNT 0x%2.2X",cnt);
+
+            // Wait {A}
+            error = i2c_wait_ack(adapter,12,1);
+            if(error<0){
+                info( "get error %d",error);
+                goto Done;
+            }
+        }
+
+        // [DATA]{A}
+        if( rw == I2C_SMBUS_WRITE && (
+                    size == I2C_SMBUS_BYTE ||
+                    size == I2C_SMBUS_BYTE_DATA ||
+                    size == I2C_SMBUS_WORD_DATA ||
+                    size == I2C_SMBUS_BLOCK_DATA ||
+                    size == I2C_SMBUS_I2C_BLOCK_DATA
+            )){
+            int bid=0;
+            info( "MS prepare to sent [%d bytes]",cnt);
+            if(size == I2C_SMBUS_BLOCK_DATA || size == I2C_SMBUS_I2C_BLOCK_DATA){
+                bid=1;      // block[0] is cnt;
+                cnt+=1;     // offset from block[0]
+            }
+            for(;bid<cnt;bid++){
+
+                iowrite8(data->block[bid],pci_bar+REG_DR0);
+                info( "   Data > %2.2X",data->block[bid]);
+                // Wait {A}
+                error = i2c_wait_ack(adapter,12,1);
+                if(error<0){
+                    goto Done;
+                }
+            }
+
+        }
+
+        // REPEATE START
+        if( rw == I2C_SMBUS_READ && (
+                size == I2C_SMBUS_BYTE_DATA ||
+                size == I2C_SMBUS_WORD_DATA ||
+                size == I2C_SMBUS_BLOCK_DATA ||
+                size == I2C_SMBUS_I2C_BLOCK_DATA
+            )){
+            info( "MS Repeated Start");
+
+            SET_REG_BIT_L(pci_bar+REG_CR0,I2C_CR_BIT_MEN);
+            iowrite8(1 << I2C_CR_BIT_MIEN |
+                1 << I2C_CR_BIT_MTX |
+                1 << I2C_CR_BIT_MSTA |
+                1 << I2C_CR_BIT_RSTA ,pci_bar+REG_CR0);
+            SET_REG_BIT_H(pci_bar+REG_CR0,I2C_CR_BIT_MEN);
+
+            // sent Address with Read mode
+            iowrite8( addr<<1 | 0x1 ,pci_bar+REG_DR0);
+
+            // Wait {A}
+            error = i2c_wait_ack(adapter,12,1);
+            if(error<0){
+                goto Done;
+            }
+
+        }
+
+        if( rw == I2C_SMBUS_READ && (
+                size == I2C_SMBUS_BYTE ||
+                size == I2C_SMBUS_BYTE_DATA ||
+                size == I2C_SMBUS_WORD_DATA ||
+                size == I2C_SMBUS_BLOCK_DATA ||
+                size == I2C_SMBUS_I2C_BLOCK_DATA
+            )){
+
+            switch(size){
+                case I2C_SMBUS_BYTE:
+                case I2C_SMBUS_BYTE_DATA:
+                        cnt = 1;  break;
+                case I2C_SMBUS_WORD_DATA:
+                        cnt = 2;  break;
+                case I2C_SMBUS_BLOCK_DATA:
+                    // will be changed after recived first data
+                        cnt = 3;  break;
+                case I2C_SMBUS_I2C_BLOCK_DATA:
+                        cnt = data->block[0];  break;
+                default:
+                        cnt = 0;  break;
+            }
+
+            int bid = 0;
+            info( "MS Receive");
+
+            //set to Receive mode
+            iowrite8(1 << I2C_CR_BIT_MEN |
+                1 << I2C_CR_BIT_MIEN |
+                1 << I2C_CR_BIT_MSTA , pci_bar+REG_CR0);
+
+            for(bid=-1;bid<cnt;bid++){
+
+                // Wait for byte transfer
+                error = i2c_wait_ack(adapter,12,0);
+                if(error<0){
+                    goto Done;
+                }
+
+                if(bid == cnt-2){
+                    info( "SET NAK");
+                    SET_REG_BIT_H(pci_bar+REG_CR0,I2C_CR_BIT_TXAK);
+                }
+
+                if(bid<0){
+                    ioread8(pci_bar+REG_DR0);
+                    info( "READ Dummy Byte" );
+                }else{
+
+                    if(bid==cnt-1){
+                        info ( "SET STOP in read loop");
+                        SET_REG_BIT_L(pci_bar+REG_CR0,I2C_CR_BIT_MSTA);
+                    }
+                    if(size == I2C_SMBUS_I2C_BLOCK_DATA){
+                        // block[0] is read length
+                        data->block[bid+1] = ioread8(pci_bar+REG_DR0);
+                    }else {
+                        data->block[bid] = ioread8(pci_bar+REG_DR0);
+                    }
+                    info( "DATA IN [%d] %2.2X",bid,data->block[bid]);
+
+                    if(size == I2C_SMBUS_BLOCK_DATA && bid == 0){
+                        cnt = data->block[0] + 1;
+                    }
+                }
+            }
+        }
+
+Stop:
+        // [P]
+        SET_REG_BIT_L(pci_bar+REG_CR0,I2C_CR_BIT_MSTA);
+        info( "MS STOP");
+
+Done:
+        iowrite8(1<<I2C_CR_BIT_MEN,pci_bar+REG_CR0);
+        check(pci_bar+REG_CR0);
+        check(pci_bar+REG_SR0);
+#ifdef DEBUG_KERN
+        printk(KERN_INFO "END --- Error code  %d",error);
+#endif
+        return error;
+}
+
+/**
+ * Wrapper of smbus_access access with PCA9548 I2C switch management.
+ * This function set PCA9548 switches to the proper slave channel.
+ * Only one channel among switches chip is selected during communication time.
+ *
+ * Note: If the bus does not have any PCA9548 on it, the switch_addr must be
+ * set to 0xFF, it will use normal smbus_access function.
+ */
+static int fpga_i2c_access(struct i2c_adapter *adapter, u16 addr,
+              unsigned short flags, char rw, u8 cmd,
+              int size, union i2c_smbus_data *data)
+{
+    int error = 0;
+    struct i2c_dev_data *dev_data;
+    dev_data = i2c_get_adapdata(adapter);
+    unsigned char master_bus = dev_data->pca9548.master_bus;
+    unsigned char switch_addr = dev_data->pca9548.switch_addr;
+    unsigned char channel = dev_data->pca9548.channel;
+
+    // Acquire the master resource.
+    mutex_lock(&fpga_i2c_master_locks[master_bus-1]);
+    uint16_t prev_port = fpga_i2c_lasted_access_port[master_bus-1];
+
+    if(switch_addr != 0xFF){
+        // Check lasted access switch address on a master
+        if((unsigned char)(prev_port >> 8) == switch_addr){
+            // check if channel is the same
+            if((unsigned char)(prev_port & 0x00FF) != channel){
+                // set new PCA9548 at switch_addr to current
+                error= smbus_access(adapter,switch_addr,flags,I2C_SMBUS_WRITE,1 << channel,I2C_SMBUS_BYTE,NULL);
+                // update lasted port
+                fpga_i2c_lasted_access_port[master_bus-1] = switch_addr << 8 | channel;
+            }
+        }else{
+            // reset prev_port PCA9548 chip
+            error= smbus_access(adapter,(u16)(prev_port >> 8),flags,I2C_SMBUS_WRITE,0x00,I2C_SMBUS_BYTE,NULL);
+            // set PCA9548 to current channel
+            error= smbus_access(adapter,switch_addr,flags,I2C_SMBUS_WRITE,1 << channel,I2C_SMBUS_BYTE,NULL);
+            // update lasted port
+            fpga_i2c_lasted_access_port[master_bus-1] = switch_addr << 8 | channel;
+        }
+    }
+
+    // Do SMBus communication
+    error = smbus_access(adapter,addr,flags,rw,cmd,size,data);
+    // reset the channel
+    mutex_unlock(&fpga_i2c_master_locks[master_bus-1]);
+    return error;
+}
+
+
+
+/**
+ * A callback function show available smbus functions.
+ */
+static u32 fpga_i2c_func(struct i2c_adapter *a)
+{
+    return I2C_FUNC_SMBUS_QUICK  |
+        I2C_FUNC_SMBUS_BYTE      |
+        I2C_FUNC_SMBUS_BYTE_DATA |
+        I2C_FUNC_SMBUS_WORD_DATA |
+        I2C_FUNC_SMBUS_BLOCK_DATA|
+        I2C_FUNC_SMBUS_I2C_BLOCK;
+}
+
+static const struct i2c_algorithm seastone2_i2c_algorithm = {
+    .smbus_xfer = fpga_i2c_access,
+    .functionality  = fpga_i2c_func,
+};
+
+/**
+ * Create virtual I2C bus adapter for switch devices
+ * @param  pdev             platform device pointer
+ * @param  portid           virtual i2c port id for switch device mapping
+ * @param  bus_number_offset bus offset for virtual i2c adapter in system
+ * @return                  i2c adapter.
+ *
+ * When bus_number_offset is -1, created adapter with dynamic bus number.
+ * Otherwise create adapter at i2c bus = bus_number_offset + portid.
+ */
+static struct i2c_adapter * seastone2_i2c_init(struct platform_device *pdev, int portid, int bus_number_offset)
+{
+    int error;
+
+    struct i2c_adapter *new_adapter;
+    struct i2c_dev_data *new_data;
+
+    new_adapter = kzalloc(sizeof(*new_adapter), GFP_KERNEL);
+    if (!new_adapter){
+        printk(KERN_ALERT "Cannot alloc i2c adapter for %s", fpga_i2c_bus_dev[portid].calling_name);
+        return NULL;
+    }
+
+    new_adapter->owner = THIS_MODULE;
+    new_adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
+    new_adapter->algo  = &seastone2_i2c_algorithm;
+    /* If the bus offset is -1, use dynamic bus number */
+    if (bus_number_offset == -1){
+        new_adapter->nr = -1;
+    }else{
+        new_adapter->nr = bus_number_offset + portid;
+    }
+
+    new_data = kzalloc(sizeof(*new_data), GFP_KERNEL);
+    if (!new_data){
+        printk(KERN_ALERT "Cannot alloc i2c data for %s", fpga_i2c_bus_dev[portid].calling_name);
+        kfree_sensitive(new_adapter);
+        return NULL;
+    }
+
+    new_data->portid = portid;
+    new_data->pca9548.master_bus = fpga_i2c_bus_dev[portid].master_bus;
+    new_data->pca9548.switch_addr = fpga_i2c_bus_dev[portid].switch_addr;
+    new_data->pca9548.channel = fpga_i2c_bus_dev[portid].channel;
+    strscpy(new_data->pca9548.calling_name, fpga_i2c_bus_dev[portid].calling_name,sizeof(new_data->pca9548.calling_name));
+
+    snprintf(new_adapter->name, sizeof(new_adapter->name),
+        "SMBus I2C Adapter PortID: %s", new_data->pca9548.calling_name);
+
+    void __iomem *i2c_freq_base_reg = fpga_dev.data_base_addr+I2C_MASTER_FREQ_1;
+    iowrite8(0x07,i2c_freq_base_reg+(new_data->pca9548.master_bus-1)*0x100); // 0x07 400kHz
+    i2c_set_adapdata(new_adapter,new_data);
+    error = i2c_add_numbered_adapter(new_adapter);
+    if(error < 0){
+        printk(KERN_ALERT "Cannot add i2c adapter %s", new_data->pca9548.calling_name);
+        kfree_sensitive(new_adapter);
+        kfree_sensitive(new_data);
+        return NULL;
+    }
+
+    return new_adapter;
+};
+
+// I/O resource need.
+static struct resource seastone2_resources[] = {
+    {
+        .start  = 0x10000000,
+        .end    = 0x10001000,
+        .flags  = IORESOURCE_MEM,
+    },
+};
+
+static void seastone2_dev_release( struct device * dev)
+{
+    return;
+}
+
+static struct platform_device seastone2_dev = {
+    .name           = DRIVER_NAME,
+    .id             = -1,
+    .num_resources  = ARRAY_SIZE(seastone2_resources),
+    .resource       = seastone2_resources,
+    .dev = {
+                    .release = seastone2_dev_release,
+    }
+};
+
+/**
+ * Board info for QSFP/SFP+ eeprom.
+ * Note: Using sff8436 as I2C eeprom driver.
+ */
+static struct i2c_board_info sff8436_eeprom_info[] = {
+    { I2C_BOARD_INFO("optoe1", 0x50) },
+    { I2C_BOARD_INFO("optoe2", 0x50) },
+};
+
+static int seastone2_drv_probe(struct platform_device *pdev)
+{
+    struct resource *res;
+    int ret = 0;
+    int portid_count;
+    uint8_t cpld1_version, cpld2_version;
+    uint16_t prev_i2c_switch = 0;
+
+    /* The device class need to be instantiated before this function called */
+    BUG_ON(fpgafwclass == NULL);
+
+    fpga_data = devm_kzalloc(&pdev->dev, sizeof(struct seastone2_fpga_data),
+                    GFP_KERNEL);
+
+    if (!fpga_data)
+        return -ENOMEM;
+
+    // Set default read address to VERSION
+    fpga_data->fpga_read_addr = fpga_dev.data_base_addr+FPGA_VERSION;
+    fpga_data->cpld1_read_addr = 0x00;
+    fpga_data->cpld2_read_addr = 0x00;
+
+    mutex_init(&fpga_data->fpga_lock);
+    for(ret=I2C_MASTER_CH_1 ;ret <= I2C_MASTER_CH_TOTAL; ret++){
+        mutex_init(&fpga_i2c_master_locks[ret-1]);
+    }
+
+    res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+    if (unlikely(!res)) {
+        printk(KERN_ERR "Specified Resource Not Available...\n");
+        kfree_sensitive(fpga_data);
+        return -1;
+    }
+
+    fpga = kobject_create_and_add("FPGA", &pdev->dev.kobj);
+    if (!fpga){
+        kfree_sensitive(fpga_data);
+        return -ENOMEM;
+    }
+
+    ret = sysfs_create_group(fpga, &fpga_attr_grp);
+    if (ret != 0) {
+        printk(KERN_ERR "Cannot create FPGA sysfs attributes\n");
+        kobject_put(fpga);
+        kfree_sensitive(fpga_data);
+        return ret;
+    }
+
+    cpld1 = kobject_create_and_add("CPLD1", &pdev->dev.kobj);
+    if (!cpld1){
+        sysfs_remove_group(fpga, &fpga_attr_grp);
+        kobject_put(fpga);
+        kfree_sensitive(fpga_data);
+        return -ENOMEM;
+    }
+    ret = sysfs_create_group(cpld1, &cpld1_attr_grp);
+    if (ret != 0) {
+        printk(KERN_ERR "Cannot create CPLD1 sysfs attributes\n");
+        kobject_put(cpld1);
+        sysfs_remove_group(fpga, &fpga_attr_grp);
+        kobject_put(fpga);
+        kfree_sensitive(fpga_data);
+        return ret;
+    }
+
+    cpld2 = kobject_create_and_add("CPLD2", &pdev->dev.kobj);
+    if (!cpld2){
+        sysfs_remove_group(cpld1, &cpld1_attr_grp);
+        kobject_put(cpld1);
+        sysfs_remove_group(fpga, &fpga_attr_grp);
+        kobject_put(fpga);
+        kfree_sensitive(fpga_data);
+        return -ENOMEM;
+    }
+    ret = sysfs_create_group(cpld2, &cpld2_attr_grp);
+    if (ret != 0) {
+        printk(KERN_ERR "Cannot create CPLD2 sysfs attributes\n");
+        kobject_put(cpld2);
+        sysfs_remove_group(cpld1, &cpld1_attr_grp);
+        kobject_put(cpld1);
+        sysfs_remove_group(fpga, &fpga_attr_grp);
+        kobject_put(fpga);
+        kfree_sensitive(fpga_data);
+        return ret;
+    }
+
+    sff_dev = device_create(fpgafwclass, NULL, MKDEV(0,0), NULL, "sff_device");
+    if (IS_ERR(sff_dev)){
+        printk(KERN_ERR "Failed to create sff device\n");
+        sysfs_remove_group(cpld2, &cpld2_attr_grp);
+        kobject_put(cpld2);
+        sysfs_remove_group(cpld1, &cpld1_attr_grp);
+        kobject_put(cpld1);
+        sysfs_remove_group(fpga, &fpga_attr_grp);
+        kobject_put(fpga);
+        kfree_sensitive(fpga_data);
+        return PTR_ERR(sff_dev);
+    }
+
+    ret = sysfs_create_group(&sff_dev->kobj, &sff_led_test_grp);
+    if (ret != 0) {
+        printk(KERN_ERR "Cannot create SFF attributes\n");
+        device_destroy(fpgafwclass, MKDEV(0,0));
+        sysfs_remove_group(cpld2, &cpld2_attr_grp);
+        kobject_put(cpld2);
+        sysfs_remove_group(cpld1, &cpld1_attr_grp);
+        kobject_put(cpld1);
+        sysfs_remove_group(fpga, &fpga_attr_grp);
+        kobject_put(fpga);
+        kfree_sensitive(fpga_data);
+        return ret;
+    }
+
+    ret = sysfs_create_link(&pdev->dev.kobj,&sff_dev->kobj,"SFF");
+    if (ret != 0){
+        sysfs_remove_group(&sff_dev->kobj, &sff_led_test_grp);
+        device_destroy(fpgafwclass, MKDEV(0,0));
+        sysfs_remove_group(cpld2, &cpld2_attr_grp);
+        kobject_put(cpld2);
+        sysfs_remove_group(cpld1, &cpld1_attr_grp);
+        kobject_put(cpld1);
+        sysfs_remove_group(fpga, &fpga_attr_grp);
+        kobject_put(fpga);
+        kfree_sensitive(fpga_data);
+        return ret;
+    }
+
+    for(portid_count=0 ; portid_count < VIRTUAL_I2C_PORT_LENGTH ; portid_count++){
+        fpga_data->i2c_adapter[portid_count] = seastone2_i2c_init(pdev, portid_count, VIRTUAL_I2C_BUS_OFFSET);
+    }
+
+
+    /* Init SFF devices */
+    for(portid_count=0; portid_count < SFF_PORT_TOTAL; portid_count++){
+        struct i2c_adapter *i2c_adap = fpga_data->i2c_adapter[portid_count];
+        if(i2c_adap){
+            fpga_data->sff_devices[portid_count] = seastone2_sff_init(portid_count);
+            struct sff_device_data *sff_data = dev_get_drvdata(fpga_data->sff_devices[portid_count]);
+            BUG_ON(sff_data == NULL);
+            if( sff_data->port_type == QSFP ){
+                fpga_data->sff_i2c_clients[portid_count] = i2c_new_client_device(i2c_adap, &sff8436_eeprom_info[0]);
+            }else{
+                fpga_data->sff_i2c_clients[portid_count] = i2c_new_client_device(i2c_adap, &sff8436_eeprom_info[1]);
+            }
+            sff_data = NULL;
+            sysfs_create_link(&fpga_data->sff_devices[portid_count]->kobj,
+                &fpga_data->sff_i2c_clients[portid_count]->dev.kobj,
+                "i2c");
+        }
+
+    }
+
+    printk(KERN_INFO "Virtual I2C buses created\n");
+
+#ifdef TEST_MODE
+    return 0;
+#endif
+    fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD1_SLAVE_ADDR,0x00,
+        I2C_SMBUS_READ,0x00,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&cpld1_version);
+    fpga_i2c_access(fpga_data->i2c_adapter[VIRTUAL_I2C_CPLD_INDEX],CPLD2_SLAVE_ADDR,0x00,
+        I2C_SMBUS_READ,0x00,I2C_SMBUS_BYTE_DATA,(union i2c_smbus_data*)&cpld2_version);
+
+    printk(KERN_INFO "CPLD1 VERSON: %2.2x\n", cpld1_version);
+    printk(KERN_INFO "CPLD2 VERSON: %2.2x\n", cpld2_version);
+
+    /* Init I2C buses that has PCA9548 switch device. */
+    for(portid_count = 0; portid_count < VIRTUAL_I2C_PORT_LENGTH; portid_count++){
+
+       struct i2c_dev_data *dev_data;
+       dev_data = i2c_get_adapdata(fpga_data->i2c_adapter[portid_count]);
+       unsigned char master_bus = dev_data->pca9548.master_bus;
+       unsigned char switch_addr = dev_data->pca9548.switch_addr;
+       unsigned char channel = dev_data->pca9548.channel;
+
+       if(switch_addr != 0xFF){
+
+           if(prev_i2c_switch != ( (master_bus << 8) | switch_addr) ){
+               // Found the bus with PCA9548, trying to clear all switch in it.
+               smbus_access(fpga_data->i2c_adapter[portid_count],switch_addr,0x00,I2C_SMBUS_WRITE,0x00,I2C_SMBUS_BYTE,NULL);
+               prev_i2c_switch = ( master_bus << 8 ) | switch_addr;
+           }
+       }
+    }
+    return 0;
+}
+
+static int seastone2_drv_remove(struct platform_device *pdev)
+{
+    int portid_count;
+    struct sff_device_data *rem_data;
+
+    for(portid_count=0; portid_count < SFF_PORT_TOTAL; portid_count++){
+        sysfs_remove_link(&fpga_data->sff_devices[portid_count]->kobj,"i2c");
+        i2c_unregister_device(fpga_data->sff_i2c_clients[portid_count]);
+    }
+
+    for(portid_count=0 ; portid_count < VIRTUAL_I2C_PORT_LENGTH ; portid_count++){
+        if(fpga_data->i2c_adapter[portid_count] != NULL){
+            info(KERN_INFO "<%x>",fpga_data->i2c_adapter[portid_count]);
+            i2c_del_adapter(fpga_data->i2c_adapter[portid_count]);
+        }
+    }
+
+    for (portid_count=0; portid_count < SFF_PORT_TOTAL; portid_count++){
+        if(fpga_data->sff_devices[portid_count] != NULL){
+            rem_data = dev_get_drvdata(fpga_data->sff_devices[portid_count]);
+            device_unregister(fpga_data->sff_devices[portid_count]);
+            put_device(fpga_data->sff_devices[portid_count]);
+            kfree(rem_data);
+        }
+    }
+
+    sysfs_remove_group(fpga, &fpga_attr_grp);
+    sysfs_remove_group(cpld1, &cpld1_attr_grp);
+    sysfs_remove_group(cpld2, &cpld2_attr_grp);
+    sysfs_remove_group(&sff_dev->kobj, &sff_led_test_grp);
+    kobject_put(fpga);
+    kobject_put(cpld1);
+    kobject_put(cpld2);
+    device_destroy(fpgafwclass, MKDEV(0,0));
+    devm_kfree(&pdev->dev, fpga_data);
+    return 0;
+}
+
+#ifdef TEST_MODE
+    #define FPGA_PCI_BAR_NUM 2
+#else
+    #define FPGA_PCI_BAR_NUM 0
+#endif
+
+
+
+static const struct pci_device_id fpga_id_table[] = {
+    {  PCI_VDEVICE(XILINX, FPGA_PCIE_DEVICE_ID) },
+    {  PCI_VDEVICE(TEST, TEST_PCIE_DEVICE_ID) },
+    {0, }
+};
+
+MODULE_DEVICE_TABLE(pci, fpga_id_table);
+
+static int fpga_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
+{
+    int err;
+    struct device *dev = &pdev->dev;
+        if ((err = pci_enable_device(pdev))) {
+        dev_err(dev, "pci_enable_device probe error %d for device %s\n",
+            err, pci_name(pdev));
+        return err;
+    }
+
+    if ((err = pci_request_regions(pdev, FPGA_PCI_NAME)) < 0) {
+        dev_err(dev, "pci_request_regions error %d\n", err);
+        goto pci_disable;
+    }
+
+    /* bar0: data mmio region */
+    fpga_dev.data_mmio_start = pci_resource_start(pdev, FPGA_PCI_BAR_NUM);
+    fpga_dev.data_mmio_len = pci_resource_len(pdev, FPGA_PCI_BAR_NUM);
+    fpga_dev.data_base_addr = pci_iomap(pdev, FPGA_PCI_BAR_NUM, 0);
+    if (!fpga_dev.data_base_addr) {
+        dev_err(dev, "cannot iomap region of size %lu\n",
+            (unsigned long)fpga_dev.data_mmio_len);
+        goto pci_release;
+    }
+    dev_info(dev, "data_mmio iomap base = 0x%lx \n",
+         (unsigned long)fpga_dev.data_base_addr);
+    dev_info(dev, "data_mmio_start = 0x%lx data_mmio_len = %lu\n",
+         (unsigned long)fpga_dev.data_mmio_start,
+         (unsigned long)fpga_dev.data_mmio_len);
+
+    printk(KERN_INFO "FPGA PCIe driver probe OK.\n");
+    printk(KERN_INFO "FPGA ioremap registers of size %lu\n",(unsigned long)fpga_dev.data_mmio_len);
+    printk(KERN_INFO "FPGA Virtual BAR %d at %8.8lx - %8.8lx\n",FPGA_PCI_BAR_NUM,(unsigned long)fpga_dev.data_base_addr,(unsigned long)fpga_dev.data_base_addr+ (unsigned long)fpga_dev.data_mmio_len);
+    printk(KERN_INFO "");
+    uint32_t buff = ioread32(fpga_dev.data_base_addr);
+    printk(KERN_INFO "FPGA VERSION : %8.8x\n", buff);
+    fpgafw_init();
+    return 0;
+
+reg_release:
+    pci_iounmap(pdev, fpga_dev.data_base_addr);
+pci_release:
+    pci_release_regions(pdev);
+pci_disable:
+    pci_disable_device(pdev);
+    return -EBUSY;
+}
+
+static void fpga_pci_remove(struct pci_dev *pdev)
+{
+    fpgafw_exit();
+    pci_iounmap(pdev, fpga_dev.data_base_addr);
+    pci_release_regions(pdev);
+    pci_disable_device(pdev);
+    printk(KERN_INFO "FPGA PCIe driver remove OK.\n");
+};
+
+static struct pci_driver pci_dev_ops = {
+    .name       = FPGA_PCI_NAME,
+    .probe      = fpga_pci_probe,
+    .remove     = fpga_pci_remove,
+    .id_table   = fpga_id_table,
+};
+
+
+static struct platform_driver seastone2_drv = {
+    .probe  = seastone2_drv_probe,
+    .remove = __exit_p(seastone2_drv_remove),
+    .driver = {
+        .name   = DRIVER_NAME,
+    },
+};
+
+enum{
+    READREG,
+    WRITEREG
+};
+
+struct fpga_reg_data {
+    uint32_t addr;
+    uint32_t value;
+};
+
+static long fpgafw_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg){
+    int ret = 0;
+    struct fpga_reg_data data;
+    mutex_lock(&fpga_data->fpga_lock);
+
+#ifdef TEST_MODE
+    static  uint32_t status_reg;
+#endif
+    // Switch function to read and write.
+    switch (cmd){
+        case READREG:
+            if (copy_from_user(&data, (void __user*)arg, sizeof(data)) != 0){
+                mutex_unlock(&fpga_data->fpga_lock);
+                return -EFAULT;
+            }
+            data.value = ioread32(fpga_dev.data_base_addr+data.addr);
+            if (copy_to_user((void __user*)arg ,&data, sizeof(data)) != 0){
+                mutex_unlock(&fpga_data->fpga_lock);
+                return -EFAULT;
+            }
+#ifdef TEST_MODE
+            if(data.addr == 0x1210){
+                switch (status_reg){
+                    case 0x0000 : status_reg=0x8000;
+                    break;
+
+                    case 0x8080 : status_reg=0x80C0;
+                    break;
+                    case 0x80C0 : status_reg=0x80F0;
+                    break;
+                    case 0x80F0 : status_reg=0x80F8;
+                    break;
+
+                }
+                iowrite32(status_reg,fpga_dev.data_base_addr+0x1210);
+            }
+#endif
+
+
+            break;
+        case WRITEREG:
+            if (copy_from_user(&data, (void __user*)arg, sizeof(data)) != 0){
+                mutex_unlock(&fpga_data->fpga_lock);
+                return -EFAULT;
+            }
+            iowrite32(data.value,fpga_dev.data_base_addr+data.addr);
+
+#ifdef TEST_MODE
+            if(data.addr == 0x1204){
+                status_reg=0x8080;
+                iowrite32(status_reg,fpga_dev.data_base_addr+0x1210);
+            }
+#endif
+
+            break;
+        default:
+            mutex_unlock(&fpga_data->fpga_lock);
+            return -EINVAL;
+    }
+    mutex_unlock(&fpga_data->fpga_lock);
+    return ret;
+}
+
+
+const struct file_operations fpgafw_fops = {
+    .owner      = THIS_MODULE,
+    .unlocked_ioctl = fpgafw_unlocked_ioctl,
+};
+
+
+static int fpgafw_init(void){
+   printk(KERN_INFO "Initializing the switchboard driver\n");
+   // Try to dynamically allocate a major number for the device -- more difficult but worth it
+   majorNumber = register_chrdev(0, DEVICE_NAME, &fpgafw_fops);
+   if (majorNumber<0){
+      printk(KERN_ALERT "Failed to register a major number\n");
+      return majorNumber;
+   }
+   printk(KERN_INFO "Device registered correctly with major number %d\n", majorNumber);
+
+   // Register the device class
+   fpgafwclass = class_create(THIS_MODULE, CLASS_NAME);
+   if (IS_ERR(fpgafwclass)){                // Check for error and clean up if there is
+      unregister_chrdev(majorNumber, DEVICE_NAME);
+      printk(KERN_ALERT "Failed to register device class\n");
+      return PTR_ERR(fpgafwclass);          // Correct way to return an error on a pointer
+   }
+   printk(KERN_INFO "Device class registered correctly\n");
+
+   // Register the device driver
+   fpgafwdev = device_create(fpgafwclass, NULL, MKDEV(majorNumber, 0), NULL, DEVICE_NAME);
+   if (IS_ERR(fpgafwdev)){               // Clean up if there is an error
+      class_destroy(fpgafwclass);           // Repeated code but the alternative is goto statements
+      unregister_chrdev(majorNumber, DEVICE_NAME);
+      printk(KERN_ALERT "Failed to create the FW upgrade device node\n");
+      return PTR_ERR(fpgafwdev);
+   }
+   printk(KERN_INFO "FPGA fw upgrade device node created correctly\n"); // Made it! device was initialized
+   return 0;
+}
+
+static void fpgafw_exit(void){
+   device_destroy(fpgafwclass, MKDEV(majorNumber, 0));     // remove the device
+   class_unregister(fpgafwclass);                          // unregister the device class
+   class_destroy(fpgafwclass);                             // remove the device class
+   unregister_chrdev(majorNumber, DEVICE_NAME);            // unregister the major number
+   printk(KERN_INFO "Goodbye!\n");
+}
+
+int seastone2_init(void)
+{
+    int rc;
+    rc = pci_register_driver(&pci_dev_ops);
+    if (rc)
+        return rc;
+    if(fpga_dev.data_base_addr == NULL){
+        printk(KERN_ALERT "FPGA PCIe device not found!\n");
+        return -ENODEV;
+    }
+    platform_device_register(&seastone2_dev);
+    platform_driver_register(&seastone2_drv);
+    return 0;
+}
+
+void seastone2_exit(void)
+{
+    platform_driver_unregister(&seastone2_drv);
+    platform_device_unregister(&seastone2_dev);
+    pci_unregister_driver(&pci_dev_ops);
+}
+
+module_init(seastone2_init);
+module_exit(seastone2_exit);
+
+MODULE_AUTHOR("Pradchaya P. pphuhcar@celestica.com");
+#ifdef SEASTONE2
+MODULE_DESCRIPTION("Celestica seastone2 platform driver");
+#else
+MODULE_DESCRIPTION("Celestica questone2 platform driver");
+#endif
+MODULE_VERSION(MOD_VERSION);
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/platform_sensors.py
new file mode 100755
index 000000000000..b600d48e8fb0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/platform_sensors.py
@@ -0,0 +1,161 @@
+#!/usr/bin/python
+#
+# Silverstone platform sensors. This script get the sensor data from BMC 
+# using ipmitool and display them in lm-sensor alike format.
+#
+# The following data is support:
+#  1. Temperature sensors
+#  2. PSUs
+#  3. Fan Drawers
+
+import sys
+import logging
+import subprocess
+
+IPMI_SDR_CMD = ['/usr/bin/ipmitool', 'sdr', 'elist']
+MAX_NUM_FANS = 4
+MAX_NUM_PSUS = 2
+
+SENSOR_NAME = 0
+SENSOR_VAL = 4
+
+sensor_dict = {}
+
+def ipmi_sensor_dump(cmd):
+    ''' Execute ipmitool command return dump output
+        exit if any error occur.
+    '''
+    global sensor_dict
+    sensor_dump = ''
+
+    try:
+        sensor_dump = subprocess.check_output(IPMI_SDR_CMD, universal_newlines=True)
+    except subprocess.CalledProcessError as e:
+        logging.error('Error! Failed to execute: {}'.format(cmd))
+        sys.exit(1)
+
+    for line in sensor_dump.splitlines():
+        sensor_info = line.split('|')
+        sensor_dict[sensor_info[SENSOR_NAME].strip()] = sensor_info[SENSOR_VAL].strip()
+
+    return True
+
+def get_reading_by_name(sensor_name, sdr_elist_dump):
+    found = ''
+
+    for line in sdr_elist_dump.splitlines():
+        line = line.decode()
+        if sensor_name in line:
+            found = line.strip()
+            break
+
+    if not found:
+        logging.error('Cannot find sensor name:' + sensor_name)
+
+    else:
+        try:
+            found = found.split('|')[4]
+        except IndexError:
+            logging.error('Cannot get sensor data of:' + sensor_name)
+
+    logging.basicConfig(level=logging.DEBUG)
+    return found
+
+
+def read_temperature_sensors():
+    sensor_list = [\
+        ('Base_Temp_U5',    'Baseboard Right Temp'),\
+        ('Base_Temp_U7',    'Baseboard Left Temp'),\
+        ('Switch_Temp_U31', 'ASIC External Front Temp'),\
+        ('Switch_Temp_U30', 'ASIC External Rear Temp'),\
+        ('Switch_Temp_U29', 'Switchboard Right Temp'),\
+        ('Switch_Temp_U28', 'Switchboard Left Temp'),\
+        ('CPU_Temp',        'CPU Internal Temp'),\
+        ('Switch_U33_Temp', 'IR3595 Chip Temp'),\
+        ('Switch_U21_Temp', 'IR3584 Chip Temp'),\
+    ]
+
+    output = ''
+    sensor_format = '{0:{width}}{1}\n'
+    # Find max length of sensor calling name
+    max_name_width = max(len(sensor[1]) for sensor in sensor_list)
+
+    output += "Temperature Sensors\n"
+    output += "Adapter: IPMI adapter\n"
+    for sensor in sensor_list:
+        output += sensor_format.format('{}:'.format(sensor[1]),\
+                                       sensor_dict[sensor[0]],\
+                                       width=str(max_name_width+1))
+    output += '\n'
+    return output
+
+def read_fan_sensors(num_fans):
+
+    sensor_list = [\
+        ('Fan{}_Status', 'Fan Drawer {} Status'),\
+        ('Fan{}_Front',  'Fan {} front'),\
+        ('Fan{}_Rear',   'Fan {} rear'),\
+    ]
+
+    output = ''
+    sensor_format = '{0:{width}}{1}\n'
+    # Find max length of sensor calling name
+    max_name_width = max(len(sensor[1]) for sensor in sensor_list)
+
+    output += "Fan Drawers\n"
+    output += "Adapter: IPMI adapter\n"
+    for fan_num in range(1, num_fans+1):
+        for sensor in sensor_list:
+            ipmi_sensor_name = sensor[0].format(fan_num)
+            display_sensor_name = sensor[1].format(fan_num)
+            output += sensor_format.format('{}:'.format(display_sensor_name),\
+                                           sensor_dict[ipmi_sensor_name],\
+                                           width=str(max_name_width+1))
+    output += '\n'
+    return output
+
+def read_psu_sensors(num_psus):
+
+    sensor_list = [\
+        ('PSU{}_Status', 'PSU {} Status'),\
+        ('PSU{}_Fan',    'PSU {} Fan 1'),\
+        ('PSU{}_VIn',    'PSU {} Input Voltage'),\
+        ('PSU{}_CIn',    'PSU {} Input Current'),\
+        ('PSU{}_PIn',    'PSU {} Input Power'),\
+        ('PSU{}_Temp1',  'PSU {} Ambient Temp'),\
+        ('PSU{}_Temp2',  'PSU {} Hotspot Temp'),\
+        ('PSU{}_VOut',   'PSU {} Output Voltage'),\
+        ('PSU{}_COut',   'PSU {} Output Current'),\
+        ('PSU{}_POut',   'PSU {} Output Power'),\
+    ]
+
+    output = ''
+    sensor_format = '{0:{width}}{1}\n'
+    # Find max length of sensor calling name
+    max_name_width = max(len(sensor[1]) for sensor in sensor_list)
+
+    output += "PSU\n"
+    output += "Adapter: IPMI adapter\n"
+    for psu_num in range(1, num_psus+1):
+        for sensor in sensor_list:
+            ipmi_sensor_name = sensor[0].format('L' if psu_num == 1 else 'R')
+            display_sensor_name = sensor[1].format(psu_num)
+            output += sensor_format.format('{}:'.format(display_sensor_name),\
+                                           sensor_dict[ipmi_sensor_name],\
+                                           width=str(max_name_width+1))
+    output += '\n'
+    return output
+
+def main():
+    output_string = ''
+
+    if ipmi_sensor_dump(IPMI_SDR_CMD):
+        output_string += read_temperature_sensors()
+        output_string += read_psu_sensors(MAX_NUM_PSUS)
+        output_string += read_fan_sensors(MAX_NUM_FANS)
+
+        print(output_string)
+
+
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/questone2_platform_shutdown.sh b/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/questone2_platform_shutdown.sh
new file mode 100755
index 000000000000..e04cac54fa98
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/questone2_platform_shutdown.sh
@@ -0,0 +1,26 @@
+#!/bin/bash
+REBOOT_CAUSE_DIR="/host/reboot-cause"
+HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt"
+REBOOT_TIME=$(date)
+
+if [ $# -ne 1 ]; then
+    echo "Require reboot type"
+    exit 1
+fi
+
+if [ ! -d "$REBOOT_CAUSE_DIR" ]; then
+    mkdir $REBOOT_CAUSE_DIR
+fi
+
+echo "Reason:$1,Time:${REBOOT_TIME}" > ${HW_REBOOT_CAUSE_FILE}
+
+# Best effort to write buffered data onto the disk
+sync ; sync ; sync ; sleep 3
+
+# BMC cold power-cyle
+ipmitool chassis power cycle &> /dev/null
+
+# System should reboot by now and avoid the script returning to caller
+sleep 10
+
+exit 0
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/sensors b/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/sensors
new file mode 100755
index 000000000000..5d740a9eb7d7
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/scripts/sensors
@@ -0,0 +1,11 @@
+#!/bin/bash
+
+DOCKER_EXEC_FLAGS="i"
+
+# Determine whether stdout is on a terminal
+if [ -t 1 ] ; then
+    DOCKER_EXEC_FLAGS+="t"
+fi
+
+docker exec -$DOCKER_EXEC_FLAGS pmon sensors "$@"
+docker exec -$DOCKER_EXEC_FLAGS pmon python3 /usr/bin/platform_sensors.py "$@"
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/setup.py b/platform/broadcom/sonic-platform-modules-cel/questone2/setup.py
new file mode 100644
index 000000000000..1bac52a180ac
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/setup.py
@@ -0,0 +1,10 @@
+from setuptools import setup
+
+setup(
+   name='sonic_platform',
+   version='1.0',
+   description='Module to initialize Celestica B3010 platforms',
+      
+   packages=['sonic_platform'],
+   package_dir={'sonic_platform': 'sonic_platform'},
+)
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/__init__.py
new file mode 100644
index 000000000000..d3c24cb008dd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/__init__.py
@@ -0,0 +1,2 @@
+__all__ = ["platform", "chassis"]
+from sonic_platform import platform
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/chassis.py
new file mode 100644
index 000000000000..85157d319298
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/chassis.py
@@ -0,0 +1,464 @@
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the Chassis information which are available in the platform
+#
+#############################################################################
+
+try:
+    import sys
+    import time
+    import os
+    import re
+    import shutil
+    from sonic_platform_base.chassis_base import ChassisBase
+    from .helper import APIHelper
+    from sonic_platform_base.sfp_base import SfpBase
+
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+NUM_FAN_DRAWER = 4
+NUM_FAN_PER_DRAWER = 2
+NUM_PSU = 2
+NUM_THERMAL = 13
+NUM_SFP = 56
+NUM_COMPONENT = 9
+
+SFP_PORT_START = 1
+SFP_PORT_END = 48
+QSFP_PORT_START = 49
+QSFP_PORT_END = 56
+
+REBOOT_CAUSE_REG = "0xA106"
+BASE_CPLD_PLATFORM = "sys_cpld"
+BASE_GETREG_PATH = "/sys/devices/platform/{}/getreg".format(BASE_CPLD_PLATFORM)
+IPMI_GET_SYS_STATUS_LED="ipmitool raw 0x3A 0x0C 0x00 0x02 0x62"
+IPMI_SET_SYS_STATUS_LED="ipmitool raw 0x3A 0x0C 0x00 0x03 0x62 {}"
+
+ORG_HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt"
+TMP_HW_REBOOT_CAUSE_FILE="/tmp/hw-reboot-cause.txt"
+
+class Chassis(ChassisBase):
+    """Platform-specific Chassis class"""
+    sfp_status_dict={}
+
+    #led color status
+    SYSLED_COLOR_VAL_MAP = {\
+        'off': '0x33',\
+        'green': '0x10',\
+        'green_blink_1hz': '0x11',\
+        'amber': '0x20'\
+    }
+
+    SYSLED_VAL_COLOR_DESC_MAP = {
+        0x33: 'off',\
+        0x10: 'green',\
+        0x11: 'green_blink_1hz',\
+        0x20: 'amber'\
+    }
+
+    def __init__(self):
+        ChassisBase.__init__(self)
+        self._api_helper = APIHelper()
+        self.sfp_module_initialized = False
+        self.fan_module_initialized = False
+        self._watchdog = None
+        self._airflow_direction = None
+        self.__initialize_eeprom()
+        
+        self.__initialize_thermals()
+        self.__initialize_fan()
+        self.__initialize_psu()
+        self.__initialize_components()
+
+    def __initialize_sfp(self):
+        if not self.sfp_module_initialized:
+            from sonic_platform.sfp import Sfp
+            for index in range(0, NUM_SFP):
+                sfp = Sfp(index)
+                self._sfp_list.append(sfp)
+                present = sfp.get_presence()
+                self.sfp_status_dict[sfp.index] = '1' if present else '0'
+            self.sfp_module_initialized = True
+
+    def __initialize_psu(self):
+        from sonic_platform.psu import Psu
+        for index in range(0, NUM_PSU):
+            psu = Psu(index)
+            self._psu_list.append(psu)
+
+    def __initialize_fan(self):
+        from sonic_platform.fan import Fan
+        from sonic_platform.fan_drawer import FanDrawer
+        for fand_index in range(0, NUM_FAN_DRAWER):
+            drawer_fan_list=[]
+            for fan_index in range(0, NUM_FAN_PER_DRAWER):
+                fan = Fan(fand_index, fan_index)
+                self._fan_list.append(fan)
+                drawer_fan_list.append(fan)
+            fan_drawer = FanDrawer(fand_index, drawer_fan_list)
+            self._fan_drawer_list.append(fan_drawer)
+        self.fan_module_initialized = True
+        
+
+    def __initialize_thermals(self):
+        from sonic_platform.thermal import Thermal
+        for index in range(0, NUM_THERMAL):
+            thermal = Thermal(index)
+            self._thermal_list.append(thermal)
+
+    def __initialize_eeprom(self):
+        from sonic_platform.eeprom import Eeprom
+        self._eeprom = Eeprom()
+    
+    def __initialize_components(self):
+        from sonic_platform.component import Component
+        for index in range(0, NUM_COMPONENT):
+            component = Component(index)
+            self._component_list.append(component)
+    
+    def initizalize_system_led(self):
+        return True
+
+    def get_status_led(self):
+        color_str = 'N/A'
+        status, output = self._api_helper.run_command(IPMI_GET_SYS_STATUS_LED)
+        if status:
+            color_val = int(output, 16) & 0x33
+            color_str = self.SYSLED_VAL_COLOR_DESC_MAP.get(color_val, color_str)
+
+        return color_str
+
+    def set_status_led(self, color):
+        status = False
+
+        color_val = self.SYSLED_COLOR_VAL_MAP.get(color, None)
+        if color_val != None:
+            cmd = IPMI_SET_SYS_STATUS_LED.format(color_val)
+            status, res = self._api_helper.run_command(cmd)
+
+        return status
+
+    def get_base_mac(self):
+        """
+        Retrieves the base MAC address for the chassis
+        Returns:
+            A string containing the MAC address in the format
+            'XX:XX:XX:XX:XX:XX'
+        """
+        return self._eeprom.get_mac()
+
+    def get_serial_number(self):
+        """
+        Retrieves the hardware serial number for the chassis
+        Returns:
+            A string containing the hardware serial number for this chassis.
+        """
+        return self._eeprom.get_serial()
+
+    def get_system_eeprom_info(self):
+        """
+        Retrieves the full content of system EEPROM information for the chassis
+        Returns:
+            A dictionary where keys are the type code defined in
+            OCP ONIE TlvInfo EEPROM format and values are their corresponding
+            values.
+        """
+        return self._eeprom.get_eeprom()
+
+    def get_reboot_cause(self):
+        """
+        Retrieves the cause of the previous reboot
+        Returns:
+            A tuple (string, string) where the first element is a string
+            containing the cause of the previous reboot. This string must be
+            one of the predefined strings in this class. If the first string
+            is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
+            to pass a description of the reboot cause.
+        """
+        hw_reboot_cause = self._api_helper.get_register_value(
+            BASE_GETREG_PATH, REBOOT_CAUSE_REG)
+
+
+        # This tmp copy is to retain the reboot-cause only for the current boot
+        if os.path.isfile(ORG_HW_REBOOT_CAUSE_FILE):
+            shutil.move(ORG_HW_REBOOT_CAUSE_FILE, TMP_HW_REBOOT_CAUSE_FILE)
+
+        if hw_reboot_cause == "0x00" and os.path.isfile(TMP_HW_REBOOT_CAUSE_FILE):
+            with open(TMP_HW_REBOOT_CAUSE_FILE) as hw_cause_file:
+                reboot_info = hw_cause_file.readline().rstrip('\n')
+                match = re.search(r'Reason:(.*),Time:(.*)', reboot_info)
+                if match is not None:
+                    if match.group(1) == 'system':
+                        return (self.REBOOT_CAUSE_NON_HARDWARE, 'System cold reboot')
+
+
+        if hw_reboot_cause == "0x99":
+            reboot_cause = self.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC
+            description = 'ASIC Overload Reboot'
+        elif hw_reboot_cause == "0x88":
+            reboot_cause = self.REBOOT_CAUSE_THERMAL_OVERLOAD_CPU
+            description = 'CPU Overload Reboot'
+        elif hw_reboot_cause == "0x77":
+            reboot_cause = self.REBOOT_CAUSE_WATCHDOG
+            description = 'Hardware Watchdog Reset'
+        elif hw_reboot_cause == "0x55":
+            reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER
+            description = 'CPU Cold Reset'
+        elif hw_reboot_cause == "0x44":
+            reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE
+            description = 'CPU Warm Reset'
+        elif hw_reboot_cause == "0x33":
+            # When NON_HARDWARE is used and device is powercycled via IPMI
+            # reboot cause computed as Unknown, Hence using HARDWARE_OTHER
+            reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER
+            description = 'Soft-Set Cold Reset'
+        elif hw_reboot_cause == "0x22":
+            reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE
+            description = 'Soft-Set Warm Reset'
+        elif hw_reboot_cause == "0x11":
+            reboot_cause = self.REBOOT_CAUSE_POWER_LOSS
+            description = 'Power On Reset'
+        elif hw_reboot_cause == "0x00":
+            reboot_cause = self.REBOOT_CAUSE_POWER_LOSS
+            description = 'Power Cycle Reset'
+        else:
+            reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER
+            description = 'Hardware reason'
+
+        return (reboot_cause, description)
+
+    ##############################################################
+    ######################## SFP methods #########################
+    ##############################################################
+
+    def get_num_sfps(self):
+        """
+        Retrieves the number of sfps available on this chassis
+        Returns:
+            An integer, the number of sfps available on this chassis
+        """
+        self.__initialize_sfp()
+
+        return len(self._sfp_list)
+
+    def get_all_sfps(self):
+        """
+        Retrieves all sfps available on this chassis
+        Returns:
+            A list of objects derived from SfpBase representing all sfps
+            available on this chassis
+        """
+        self.__initialize_sfp()
+
+        return self._sfp_list
+
+    def get_sfp(self, index):
+        """
+        Retrieves sfp represented by (0-based) index <index>
+        Args:
+            index: An integer, the index (0-based) of the sfp to retrieve.
+            The index should be the sequence of a physical port in a chassis,
+            starting from 0.
+            For example, 0 for Ethernet1, 1 for Ethernet2 and so on.
+        Returns:
+            An object dervied from SfpBase representing the specified sfp
+        """
+        sfp = None
+        self.__initialize_sfp()
+
+        try:
+            sfp = self._sfp_list[index - 1]
+        except IndexError:
+            sys.stderr.write("SFP index {} out of range (0-{})\n".format(
+                             index, len(self._sfp_list) - 1))
+        return sfp
+
+    ##############################################################
+    ####################### Other methods ########################
+    ##############################################################
+
+    def get_watchdog(self):
+        """
+        Retreives hardware watchdog device on this chassis
+        Returns:
+            An object derived from WatchdogBase representing the hardware
+            watchdog device
+        """
+        if self._watchdog is None:
+            from sonic_platform.watchdog import Watchdog
+            self._watchdog = Watchdog()
+
+        return self._watchdog
+
+    ##############################################################
+    ###################### Device methods ########################
+    ##############################################################
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+            Returns:
+            string: The name of the device
+        """
+        return self._api_helper.hwsku
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the PSU
+        Returns:
+            bool: True if PSU is present, False if not
+        """
+        return True
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+        Returns:
+            string: Model/part number of device
+        """
+        return self._eeprom.get_pn()
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+        Returns:
+            string: Serial number of device
+        """
+        return self.get_serial_number()
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision for the chassis
+        Returns:
+            A string containing the hardware revision for this chassis.
+        """
+        return self._eeprom.get_revision()
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the device
+        Returns:
+            A boolean value, True if device is operating properly, False if not
+        """
+        return True
+
+    ##############################################################
+    ###################### Event methods #########################
+    ##############################################################
+
+    def get_change_event(self, timeout=0):
+        """
+        Returns a nested dictionary containing all devices which have
+        experienced a change at chassis level
+
+        Args:
+            timeout: Timeout in milliseconds (optional). If timeout == 0,
+                this method will block until a change is detected.
+
+        Returns:
+            (bool, dict):
+                - bool: True if call successful, False if not;
+                - dict: A nested dictionary where key is a device type,
+                        value is a dictionary with key:value pairs in the format of
+                        {'device_id':'device_event'}, where device_id is the device ID
+                        for this device and device_event.
+                        The known devices's device_id and device_event was defined as table below.
+                         -----------------------------------------------------------------
+                         device   |     device_id       |  device_event  |  annotate
+                         -----------------------------------------------------------------
+                         'fan'          '<fan number>'     '0'              Fan removed
+                                                           '1'              Fan inserted
+
+                         'sfp'          '<sfp number>'     '0'              Sfp removed
+                                                           '1'              Sfp inserted
+                                                           '2'              I2C bus stuck
+                                                           '3'              Bad eeprom
+                                                           '4'              Unsupported cable
+                                                           '5'              High Temperature
+                                                           '6'              Bad cable
+
+                         'voltage'      '<monitor point>'  '0'              Vout normal
+                                                           '1'              Vout abnormal
+                         --------------------------------------------------------------------
+                  Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0', '12':'1'},
+                       'voltage':{'U20':'0', 'U21':'1'}}
+                  Indicates that:
+                     fan 0 has been removed, fan 2 has been inserted.
+                     sfp 11 has been removed, sfp 12 has been inserted.
+                     monitored voltage U20 became normal, voltage U21 became abnormal.
+                  Note: For sfp, when event 3-6 happened, the module will not be avalaible,
+                        XCVRD shall stop to read eeprom before SFP recovered from error status.
+        """
+        sfp_dict = {}
+
+        SFP_REMOVED = '0'
+        SFP_INSERTED = '1'
+
+        SFP_PRESENT = True
+        SFP_ABSENT = False
+
+        start_time = time.time()
+        time_period = timeout/float(1000) #Convert msecs to secs
+
+        while time.time() < (start_time + time_period) or timeout == 0:
+            for sfp in self._sfp_list:
+                port_idx = sfp.index
+                if self.sfp_status_dict[port_idx] == SFP_REMOVED and \
+                    sfp.get_presence() == SFP_PRESENT:
+                    sfp_dict[port_idx] = SFP_INSERTED
+                    self.sfp_status_dict[port_idx] = SFP_INSERTED
+                elif self.sfp_status_dict[port_idx] == SFP_INSERTED and \
+                    sfp.get_presence() == SFP_ABSENT:
+                    sfp_dict[port_idx] = SFP_REMOVED
+                    self.sfp_status_dict[port_idx] = SFP_REMOVED
+
+            if sfp_dict:
+                return True, {'sfp':sfp_dict}
+
+            time.sleep(0.5)
+
+        return True, {'sfp':{}} # Timeout
+
+    def get_airflow_direction(self):
+        if self._airflow_direction == None:
+            try:
+                vendor_extn = self._eeprom.get_vendor_extn()
+                airflow_type = vendor_extn.split()[2][2:4] # Either 0xFB or 0xBF
+                if airflow_type == 'FB':
+                    direction = 'exhaust'
+                elif airflow_type == 'BF':
+                    direction = 'intake'
+                else:
+                    direction = 'N/A'
+            except (AttributeError, IndexError):
+                direction = 'N/A'
+
+            self._airflow_direction = direction
+
+        return self._airflow_direction
+
+    def get_port_or_cage_type(self, index):
+        """
+        Retrieves sfp port or cage type corresponding to physical port <index>
+
+        Args:
+            index: An integer (>=0), the index of the sfp to retrieve.
+
+        Returns:
+            The masks of all types of port or cage that can be supported on the port
+            Types are defined in sfp_base.py
+        """
+        if index in range(1, 48+1):
+            return (SfpBase.SFP_PORT_TYPE_BIT_SFP_PLUS | SfpBase.SFP_PORT_TYPE_BIT_SFP28 | \
+                    SfpBase.SFP_PORT_TYPE_BIT_SFP)
+        elif index in range(49, 56+1):
+            return SfpBase.SFP_PORT_TYPE_BIT_QSFP28
+        else:
+            raise NotImplementedError
+
+
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/component.py
new file mode 100644
index 000000000000..185a62ef6a60
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/component.py
@@ -0,0 +1,156 @@
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica
+#
+# Component contains an implementation of SONiC Platform Base API and
+# provides the components firmware management function
+#
+#############################################################################
+
+import os.path
+import re
+
+try:
+    #from sonic_platform_base.component_base import ComponentBase
+    from .helper import APIHelper
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+NAME_IDX = 0
+DESC_IDX = 1
+VER_API_IDX = 2
+
+BASE_CPLD_PLATFORM = "sys_cpld"
+SW_CPLD_PLATFORM = "questone2"
+PLATFORM_SYSFS_PATH = "/sys/devices/platform/"
+
+FPGA_GETREG_PATH = "{}/{}/FPGA/getreg".format(
+    PLATFORM_SYSFS_PATH, SW_CPLD_PLATFORM)
+BASE_GETREG_PATH = "{}/{}/getreg".format(
+    PLATFORM_SYSFS_PATH, BASE_CPLD_PLATFORM)
+SW_CPLD1_GETREG_PATH = "{}/{}/CPLD1/getreg".format(
+    PLATFORM_SYSFS_PATH, SW_CPLD_PLATFORM)
+SW_CPLD2_GETREG_PATH = "{}/{}/CPLD2/getreg".format(
+    PLATFORM_SYSFS_PATH, SW_CPLD_PLATFORM)
+BIOS_VER_PATH = "/sys/class/dmi/id/bios_version"
+
+BASE_CPLD_VER_REG = "0xA100"
+COME_CPLD_VER_REG = "0xA1E0"
+SW_CPLD_VER_REG = "0x00"
+FPGA_VER_REG = "0x00"
+
+UNKNOWN_VER = "N/A"
+ONIE_VER_CMD = "cat /host/machine.conf"
+SSD_VER_CMD = "smartctl -i /dev/sda"
+
+class Component():
+    """Platform-specific Component class"""
+
+    DEVICE_TYPE = "component"
+
+    def __init__(self, component_index):
+        COMPONENT_LIST = [
+            ("BIOS",      "Basic input/output System", self.__get_bios_ver),
+            ("ONIE",      "Open Network Install Environment", self.__get_onie_ver),
+            ("BMC",       "Baseboard Management Controller", self.__get_bmc_ver),
+            ("FPGA",      "FPGA for transceiver EEPROM access and other component I2C access", self.__get_fpga_ver),
+            ("CPLD COMe", "COMe board CPLD", self.__get_cpld_ver),
+            ("CPLD BASE", "CPLD for board functions, fan control and watchdog", self.__get_cpld_ver),
+            ("CPLD SW1",  "CPLD for port control SFP(1-24)", self.__get_cpld_ver),
+            ("CPLD SW2",  "CPLD for port control SFP(25-48) QSFP(49-56)", self.__get_cpld_ver),
+            ("SSD",       "Solid State Drive - {}", self.__get_ssd_ver),
+        ]
+
+        self.index = component_index
+        self.name = COMPONENT_LIST[self.index][NAME_IDX]
+        self.description = COMPONENT_LIST[self.index][DESC_IDX]
+        self.__get_version = COMPONENT_LIST[self.index][VER_API_IDX]
+        self._api_helper = APIHelper()
+
+    def __get_bios_ver(self):
+        return self._api_helper.read_one_line_file(BIOS_VER_PATH)
+
+    def __get_onie_ver(self):
+        onie_ver = "N/A"
+        status, raw_onie_data = self._api_helper.run_command(ONIE_VER_CMD)
+        if status:
+            ret = re.search(r"(?<=onie_version=).+[^\n]", raw_onie_data)
+            if ret != None:
+                onie_ver = ret.group(0)
+        return onie_ver
+
+    def __get_bmc_ver(self):
+        cmd="ipmitool mc info | grep 'Firmware Revision'"
+        status, raw_ver=self._api_helper.run_command(cmd)
+        if status:
+            bmc_ver=raw_ver.split(':')[-1].strip()
+            return bmc_ver
+        else:
+            return UNKNOWN_VER
+
+    def __get_fpga_ver(self):
+        version_raw = self._api_helper.get_register_value(FPGA_GETREG_PATH, FPGA_VER_REG)
+        return "{}.{}".format(int(version_raw[2:][:4], 16), int(version_raw[2:][4:], 16)) if version_raw else UNKNOWN_VER
+
+    def __get_cpld_ver(self):
+        cpld_api_param = {
+            'CPLD COMe': (BASE_GETREG_PATH, COME_CPLD_VER_REG),
+            'CPLD BASE': (BASE_GETREG_PATH, BASE_CPLD_VER_REG),
+            'CPLD SW1': (SW_CPLD1_GETREG_PATH, SW_CPLD_VER_REG),
+            'CPLD SW2': (SW_CPLD2_GETREG_PATH, SW_CPLD_VER_REG),
+        }
+        api_param = cpld_api_param[self.name]
+
+        cpld_ver = self._api_helper.get_register_value(api_param[0], api_param[1])
+        return "{}.{}".format(int(cpld_ver[2], 16), int(cpld_ver[3], 16)) if cpld_ver else UNKNOWN_VER
+
+    def __get_ssd_ver(self):
+        ssd_ver = "N/A"
+        status, raw_ssd_data = self._api_helper.run_command(SSD_VER_CMD)
+        if status:
+            ret = re.search(r"Firmware Version: +(.*)[^\\]", raw_ssd_data)
+            if ret != None:
+                ssd_ver = ret.group(1)
+        return ssd_ver
+
+    def __get_ssd_model(self):
+        model = "N/A"
+
+        status, raw_ssd_data = self._api_helper.run_command(SSD_VER_CMD)
+        if status:
+            ret = re.search(r"Device Model: +(.*)[^\\]", raw_ssd_data)
+            if ret != None:
+                try:
+                    model = ret.group(1)
+                except (IndexError):
+                    pass
+        return model
+
+    def get_name(self):
+        """
+        Retrieves the name of the component
+         Returns:
+            A string containing the name of the component
+        """
+        return self.name
+
+    def get_description(self):
+        """
+        Retrieves the description of the component
+            Returns:
+            A string containing the description of the component
+        """
+        # For SSD get the model name from device
+        if self.name == "SSD":
+            return self.description.format(self.__get_ssd_model())
+
+        return self.description
+
+    def get_firmware_version(self):
+        """
+        Retrieves the firmware version of module
+        Returns:
+            string: The firmware versions of the module
+        """
+        return self.__get_version()
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/eeprom.py
new file mode 100644
index 000000000000..ff08cd949891
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/eeprom.py
@@ -0,0 +1,128 @@
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica
+#
+# Platform and model specific eeprom subclass, inherits from the base class,
+# and provides the followings:
+# - the eeprom format definition
+# - specific encoder/decoder if there is special need
+#############################################################################
+
+try:
+    import os
+    import sys
+    import re
+    import json
+    import fcntl
+
+    if sys.version_info.major == 3:
+        from io import StringIO
+    else:
+        from cStringIO import StringIO
+
+    from sonic_platform_base.sonic_eeprom import eeprom_tlvinfo
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+NULL = 'N/A'
+EEPROM_TMP_FILE = '/tmp/eeprom_dump.json'
+
+class Eeprom(eeprom_tlvinfo.TlvInfoDecoder):
+
+    EEPROM_DECODE_HEADLINES = 6
+
+    def __init__(self):
+        for i2cbus in range(2):
+            path_prefix = "/sys/class/i2c-adapter/i2c-{0}/".format(i2cbus)
+            with open(path_prefix + "name") as fd:
+                if 'SMBus iSMT adapter at ' in fd.readline():
+                    self._eeprom_path = path_prefix + "{0}-0056/eeprom".format(i2cbus)
+                    break
+        super(Eeprom, self).__init__(self._eeprom_path, 0, '', True)
+        self._eeprom = self._load_eeprom()
+
+    def __parse_output(self, decode_output):
+        decode_output.replace('\0', '')
+        lines = decode_output.split('\n')
+        lines = lines[self.EEPROM_DECODE_HEADLINES:]
+        _eeprom_info_dict = dict()
+
+        for line in lines:
+            try:
+                match = re.search('(0x[0-9a-fA-F]{2})\s+\d+\s+(.+)', line)
+                if match is not None:
+                    idx = match.group(1)
+                    value = match.group(2).rstrip('\0')
+
+                _eeprom_info_dict[idx] = value
+            except Exception:
+                pass
+        return _eeprom_info_dict
+
+    def _load_eeprom(self):
+        eeprom_dict = {}
+
+        if os.path.exists(EEPROM_TMP_FILE):
+            with open(EEPROM_TMP_FILE, 'r') as fd:
+                eeprom_dict = json.load(fd)
+
+            return eeprom_dict
+
+        original_stdout = sys.stdout
+        sys.stdout = StringIO()
+        rv = -1
+        try:
+            rv = self.read_eeprom_db()
+        except BaseException:
+            pass
+
+        if rv == 0:
+            decode_output = sys.stdout.getvalue()
+            sys.stdout = original_stdout
+            eeprom_dict = self.__parse_output(decode_output)
+        else:
+            e = self.read_eeprom()
+            if e is None:
+                sys.stdout = original_stdout
+                return {}
+
+            self.decode_eeprom(e)
+            decode_output = sys.stdout.getvalue()
+            sys.stdout = original_stdout
+
+            (is_valid, valid_crc) = self.is_checksum_valid(e)
+            if not is_valid:
+                return {}
+
+            eeprom_dict = self.__parse_output(decode_output)
+
+        if len(eeprom_dict) != 0:
+            with open(EEPROM_TMP_FILE, 'w') as fd:
+                fcntl.flock(fd, fcntl.LOCK_EX)
+                json.dump(eeprom_dict, fd)
+                fcntl.flock(fd, fcntl.LOCK_UN)
+
+        return eeprom_dict
+
+    def get_eeprom(self):
+        return self._eeprom
+
+    def get_product(self):
+        return self._eeprom.get('0x21', NULL)
+
+    def get_pn(self):
+        return self._eeprom.get('0x22', NULL)
+
+    def get_serial(self):
+        return self._eeprom.get('0x23', NULL)
+
+    def get_mac(self):
+        return self._eeprom.get('0x24', NULL)
+
+    def get_revision(self):
+        return self._eeprom.get('0x26', NULL)
+
+    def get_vendor_extn(self):
+        return self._eeprom.get('0xFD', NULL)
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/fan.py
new file mode 100644
index 000000000000..6a1faa44ebbe
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/fan.py
@@ -0,0 +1,345 @@
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the fan status which are available in the platform
+#
+#############################################################################
+
+try:
+    from sonic_platform_base.fan_base import FanBase
+    from .helper import APIHelper
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+NOT_AVAILABLE = 'N/A'
+
+FAN_NAME_TEMPLATE = "{}Fan{}{}"
+NUM_FAN_TRAYS = 4
+NUM_FANS_PER_TRAY = 2
+FAN_SPEED_TOLERANCE = 20
+MAX_RPM_FRONT=23000
+MAX_RPM_REAR=20500
+MAX_RPM_PSU=22600
+FAN_DIR_BASE = 0x41
+FAN_LED_BASE = 0x04
+FAN_FRU_BASE = 0x05
+FAN_STATUS_BASE = 0x00
+FAN_SID_BASE = 0x80
+PSU_FAN_SID_BASE = 0x8a
+PSU_FRU_BASE = 0x03
+
+
+IPMI_FAN_DIR="ipmitool raw 0x3a 0x0c 0x00 0x02 {}"
+IPMI_GET_SPEED="ipmitool raw 0x04 0x2d {}"
+IPMI_GET_CPLD_PWM="ipmitool raw 0x3a 0x0c 0x00 0x02 {}"
+IPMI_GET_PRESENCE="ipmitool raw 0x3a 0x03 0x03 {}"
+IPMI_GET_MODEL="ipmitool fru list {} | grep 'Board Part Number'"
+IPMI_GET_SERIAL="ipmitool fru list {} | grep 'Board Serial'"
+IPMI_GET_PSU_MODEL="ipmitool fru list {} | grep 'Product Name'"
+IPMI_GET_PSU_SPEED="ipmitool raw 0x04 0x2d {}"
+IPMI_SET_STATUS_LED="ipmitool raw 0x3a 0x0a {} {}"
+IPMI_GET_STATUS_LED="ipmitool raw 0x3a 0x0b {}"
+
+class Fan(FanBase):
+    """Platform-specific Fan class"""
+
+    def __init__(self, fan_tray_index, fan_index=0, is_psu_fan=False, psu_index=0):
+        self.fan_index = fan_index
+        self.fan_tray_index = fan_tray_index
+        self.is_psu_fan = is_psu_fan
+        self._api_helper = APIHelper()
+        self.index = (self.fan_tray_index * 2) + self.fan_index
+        self.name = None
+        if self.is_psu_fan:
+            self.psu_index = psu_index
+            self.max_speed = MAX_RPM_PSU
+            self._fan_sid_offset = PSU_FAN_SID_BASE + self.psu_index
+            self._fan_status_offset = FAN_STATUS_BASE + NUM_FAN_TRAYS + self.psu_index
+        else:
+            self._fan_status_offset = FAN_STATUS_BASE + self.fan_tray_index
+            self._fan_fru_offset = FAN_FRU_BASE + self.fan_tray_index
+            self._fan_dir_offset = FAN_DIR_BASE + (self.fan_tray_index * 4)
+            if self.fan_tray_index > 1:
+                # Questone CPLD firmware is used and hence FAN 3 will be missing
+                # There are only 4 FAN trays in this platform
+                self._fan_dir_offset = self._fan_dir_offset + 4
+
+            self._fan_speed_offset = self._fan_dir_offset - 1
+            self._fan_led_offset = FAN_LED_BASE + self.fan_tray_index
+
+            if fan_index % 2 == 0:
+                # Front FAN
+                self.is_front = True
+                self.max_speed = MAX_RPM_FRONT
+                self._fan_sid_offset = FAN_SID_BASE + 1 + (self.fan_tray_index * NUM_FANS_PER_TRAY)
+            else:
+                # Rear FAN
+                self.is_front = False
+                self.max_speed = MAX_RPM_REAR
+                self._fan_sid_offset = FAN_SID_BASE + (self.fan_tray_index * NUM_FANS_PER_TRAY)
+
+    def get_direction(self):
+        """
+        Retrieves the direction of fan
+        Returns:
+            A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
+            depending on fan direction
+        """
+        direction = NOT_AVAILABLE
+
+        if self.is_psu_fan:
+            cmd = IPMI_GET_PSU_MODEL.format(PSU_FRU_BASE + self.psu_index)
+            status, output = self._api_helper.run_command(cmd)
+            if status and output:
+                model = output.split(':')[-1]
+                if len(model) > 0:
+                    if model[-2:] == ' B':
+                        direction = self.FAN_DIRECTION_INTAKE
+                    else:
+                        direction = self.FAN_DIRECTION_EXHAUST
+        else:
+            cmd = IPMI_FAN_DIR.format(self._fan_dir_offset)
+            status, output = self._api_helper.run_command(cmd)
+            if status:
+                dir_num = int(output, 16) & 0x0C
+                if dir_num == 0x0:
+                    direction = self.FAN_DIRECTION_EXHAUST
+                elif dir_num == 0x8:
+                    direction = self.FAN_DIRECTION_INTAKE
+
+        return direction
+
+    def get_speed(self):
+        """
+        Retrieves the speed of fan as a percentage of full speed
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        speed = 0
+
+        if not self.is_psu_fan:
+            multiplier = 150.0
+        else:
+            multiplier = 100.0
+
+        cmd = IPMI_GET_PSU_SPEED.format(self._fan_sid_offset)
+        status, output = self._api_helper.run_command(cmd)
+        if status:
+            raw_speed = output.split()[0]
+            rpm_speed = int(raw_speed, 16) * multiplier
+            speed = int((rpm_speed/self.max_speed) * 100)
+
+        return speed
+
+    def get_target_speed(self):
+        """
+        Retrieves the target (expected) speed of the fan
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+
+        Note:
+            speed_pc = pwm_target/255*100
+
+            0   : when PWM mode is use
+            pwm : when pwm mode is not use
+        """
+        target_speed = 0
+
+        if self.is_psu_fan:
+            # Ignored for tolerance check
+            return self.get_speed()
+
+        cmd = IPMI_GET_CPLD_PWM.format(self._fan_speed_offset)
+        status, output = self._api_helper.run_command(cmd)
+        if status:
+            fan_pwm = int(output, 16)
+            target_speed = round(fan_pwm / 255 * 100)
+
+        return target_speed
+
+    def get_speed_tolerance(self):
+        """
+        Retrieves the speed tolerance of the fan
+        Returns:
+            An integer, the percentage of variance from target speed which is
+                 considered tolerable
+        """
+        return FAN_SPEED_TOLERANCE
+
+    def set_speed(self, speed):
+        """
+        Sets the fan speed
+        Args:
+            speed: An integer, the percentage of full fan speed to set fan to,
+                   in the range 0 (off) to 100 (full speed)
+        Returns:
+            A boolean, True if speed is set successfully, False if not
+        Notes:
+            pwm setting mode must set as Manual
+            manual: systemctl stop fanctrl.service
+            auto: systemctl start fanctrl.service
+        """
+
+        # FAN speed is controlled by BCM always
+        return False
+
+    def set_status_led(self, color):
+        """
+        Sets the state of the fan module status LED
+        Args:
+            color: A string representing the color with which to set the
+                   fan module status LED
+        Returns:
+            bool: True if status LED state is set successfully, False if not
+        """
+        # There is no per Fan LED
+        return True
+
+    def drawer_set_status_led(self, color):
+        status = False
+
+        color_dict = {\
+            self.STATUS_LED_COLOR_OFF: 0,\
+            self.STATUS_LED_COLOR_AMBER: 1,\
+            self.STATUS_LED_COLOR_RED: 1,\
+            self.STATUS_LED_COLOR_GREEN: 2\
+        }
+
+        if not self.is_psu_fan:
+            cmd = IPMI_SET_STATUS_LED.format(self._fan_led_offset, color_dict.get(color, 0))
+            status, _ = self._api_helper.run_command(cmd)
+
+        return status
+
+
+    def get_status_led(self):
+        """
+        Gets the state of the fan status LED
+        Returns:
+            A string, one of the predefined STATUS_LED_COLOR_* strings above
+
+        Note:
+            Output
+            STATUS_LED_COLOR_GREEN = "green"
+            STATUS_LED_COLOR_AMBER = "amber"
+            STATUS_LED_COLOR_RED = "red"
+            STATUS_LED_COLOR_OFF = "off"
+
+            Input
+            0x1: green
+            0x2: red
+            0x3: off
+        """
+        status = NOT_AVAILABLE
+        color_dict = {\
+            0: self.STATUS_LED_COLOR_OFF,\
+            1: self.STATUS_LED_COLOR_AMBER,\
+            2: self.STATUS_LED_COLOR_GREEN\
+        }
+
+        if not self.is_psu_fan:
+            cmd = IPMI_GET_STATUS_LED.format(self._fan_led_offset)
+            status, output = self._api_helper.run_command(cmd)
+            if status:
+                color = int(output, 16)
+                status = color_dict.get(color, status)
+ 
+        return status
+
+
+    ##############################################################
+    ###################### Device methods ########################
+    ##############################################################
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+            Returns:
+            string: The name of the device
+        """
+
+        if not self.name:
+            if not self.is_psu_fan:
+                psu_name = ""
+                fan_id = " {}".format(self.fan_tray_index + 1)
+                fan_type = " Front" if self.is_front else " Rear"
+            else:
+                psu_name = "PSU {} ".format(self.psu_index + 1)
+                fan_id = " {}".format(self.fan_tray_index + 1)
+                fan_type = ""
+
+            self.name = FAN_NAME_TEMPLATE.format(psu_name, fan_id, fan_type)
+
+        return self.name
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the FAN
+        Returns:
+            bool: True if FAN is present, False if not
+        """
+
+        presence = False
+
+        cmd = IPMI_GET_PRESENCE.format(self._fan_status_offset)
+        status, output = self._api_helper.run_command(cmd)
+        if status and output == "00":
+            presence = True
+
+        return presence
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+        Returns:
+            string: Model/part number of device
+        """
+        model = NOT_AVAILABLE
+
+        if not self.is_psu_fan:
+            cmd = IPMI_GET_MODEL.format(self._fan_fru_offset)
+            status, output = self._api_helper.run_command(cmd)
+            if status and output:
+                return output.split()[-1]
+
+        return model
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+        Returns:
+            string: Serial number of device
+        """
+        serial = NOT_AVAILABLE
+
+        if not self.is_psu_fan:
+            cmd = IPMI_GET_SERIAL.format(self._fan_fru_offset)
+            status, output = self._api_helper.run_command(cmd)
+            if status and output:
+                return output.split()[-1]
+
+        return serial
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the device
+        Returns:
+            A boolean value, True if device is operating properly, False if not
+        """
+        return self.get_presence() and self.get_speed() > 0
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        if not self.is_psu_fan:
+            return True
+
+        return False
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/fan_drawer.py
new file mode 100644
index 000000000000..14ea5c900506
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/fan_drawer.py
@@ -0,0 +1,82 @@
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the fan status which are available in the platform
+#
+#############################################################################
+
+try:
+    from sonic_platform_base.fan_drawer_base import FanDrawerBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class FanDrawer(FanDrawerBase):
+
+    def __init__(self, index, fan_list):
+        FanDrawerBase.__init__(self)
+
+        self._fan_list = fan_list
+        self._index = index + 1
+
+    def set_status_led(self, color):
+        """
+        Sets the state of the fan drawer status LED
+        Args:
+            color: A string representing the color with which to set the
+                   fan drawer status LED
+        Returns:
+            bool: True if status LED state is set successfully, False if not
+        """
+        return self._fan_list[0].drawer_set_status_led(color)
+
+    def get_status_led(self):
+        """
+        Gets the state of the fan drawer LED
+        Returns:
+            A string, one of the predefined STATUS_LED_COLOR_* strings above
+        """
+        return self._fan_list[0].get_status_led()
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+            Returns:
+            string: The name of the device
+        """
+        return 'Drawer {}'.format(self._index)
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the FAN
+        Returns:
+            bool: True if FAN is present, False if not
+        """
+        return self._fan_list[0].get_presence()
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+        Returns:
+            string: Model/part number of device
+        """
+        return self._fan_list[0].get_model()
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+        Returns:
+            string: Serial number of device
+        """
+        return self._fan_list[0].get_serial()
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the device
+        Returns:
+            A boolean value, True if device is operating properly, False if not
+        """
+        return self._fan_list[0].get_status()
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/helper.py
new file mode 100644
index 000000000000..7bcbd70a0a7c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/helper.py
@@ -0,0 +1,191 @@
+#!/usr/bin/env python
+
+import os
+import struct
+import subprocess
+from mmap import *
+from sonic_py_common.device_info import get_platform_and_hwsku
+
+SCALE = 16
+BIN_BITS = 8
+EMPTY_STRING = ""
+HOST_CHK_CMD = "docker > /dev/null 2>&1"
+
+
+class APIHelper():
+
+    def __init__(self):
+        (self.platform, self.hwsku) = get_platform_and_hwsku()
+
+    def get_register_value(self, getreg_path, register):
+        cmd = "echo {1} > {0}; cat {0}".format(getreg_path, register)
+        ret, data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            return None
+        else:
+            return data
+
+    def hex_to_bin(self, ini_string):
+        return bin(int(ini_string, SCALE)).zfill(BIN_BITS)
+
+    def is_host(self):
+        rv, _ = subprocess.getstatusoutput(HOST_CHK_CMD)
+        return (rv == 0)
+
+    def pci_get_value(self, resource, offset):
+        status = True
+        result = ""
+        try:
+            fd = os.open(resource, os.O_RDWR)
+            mm = mmap(fd, 0)
+            mm.seek(int(offset))
+            read_data_stream = mm.read(4)
+            result = struct.unpack('I', read_data_stream)
+        except Exception:
+            status = False
+        return status, result
+
+    def run_command(self, cmd):
+        status = True
+        result = ""
+        ret, data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            status = False
+        else:
+            result = data
+        
+        return status, result
+
+    def read_txt_file(self, file_path):
+        try:
+            with open(file_path, 'r') as fd:
+                data = fd.read()
+                return data.strip()
+        except IOError:
+            pass
+        return None
+
+    def read_one_line_file(self, file_path):
+        try:
+            with open(file_path, 'r') as fd:
+                data = fd.readline()
+                return data.strip()
+        except IOError:
+            pass
+        return None
+
+    def search_file_by_contain(self, directory, search_str, file_start):
+        for dirpath, dirnames, files in os.walk(directory):
+            for name in files:
+                file_path = os.path.join(dirpath, name)
+                if name.startswith(file_start) and search_str in self.read_txt_file(file_path):
+                    return dirpath
+        return None
+
+    def write_file(self, file_path, data):
+        try:
+            with open(file_path, 'w') as fd:
+                fd.write(str(data))
+                return True
+        except Exception:
+            pass
+        return False
+
+    def ipmi_raw(self, netfn, cmd):
+        status = True
+        result = ""
+        cmd = "ipmitool raw {} {}".format(str(netfn), str(cmd))
+        ret, data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            status = False
+        else:
+            result = data
+        
+        return status, result
+
+    def ipmi_fru_id(self, id, key=None):
+        status = True
+        result = ""
+        cmd = "ipmitool fru print {}".format(str(
+            id)) if not key else "ipmitool fru print {0} | grep '{1}' ".format(str(id), str(key))
+
+        ret, data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            status = False
+        else:
+            result = data
+        
+        return status, result
+
+    def ipmi_set_ss_thres(self, id, threshold_key, value):
+        status = True
+        result = ""
+        cmd = "ipmitool sensor thresh '{}' {} {}".format(
+            str(id), str(threshold_key), str(value))
+        ret, data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            status = False
+        else:
+            result = data
+        
+        return status, result
+
+    def fru_decode_product_serial(self, data):
+
+        if data and data[4] != 00:
+            start_product_info = ord(data[4]) * 8
+            start_format_version = start_product_info
+            start_product_info = start_format_version + 1
+            start_product_Lang_code = start_product_info + 1
+            start_product_Manu_name = start_product_Lang_code + 1
+            start_product_Manu_name_length = ord(data[start_product_Manu_name]) & 0x0F
+            start_product_name =  start_product_Manu_name + start_product_Manu_name_length + 1
+            start_product_name_length = ord(data[start_product_name]) & 0x0F
+            start_product_module_number = start_product_name + start_product_name_length +1
+            start_product_module_number_length = ord(data[start_product_module_number]) & 0x0F
+            start_product_version = start_product_module_number + start_product_module_number_length +1
+            start_product_version_length = ord(data[start_product_version]) & 0x0F
+            start_product_serial_number = start_product_version + start_product_version_length +1
+            start_product_serial_number_length = ord(data[start_product_serial_number]) & 0x1F
+            return data[start_product_serial_number+1:start_product_serial_number+start_product_serial_number_length+1]
+        return "N/A"
+
+    def fru_decode_product_model(self, data):
+        if data and data[4] != 00:
+            start_product_info = ord(data[4]) * 8
+            start_format_version = start_product_info
+            start_product_info = start_format_version + 1
+            start_product_lang_code = start_product_info + 1
+            start_product_manu_name = start_product_lang_code + 1
+            start_product_manu_name_length = ord(data[start_product_manu_name]) & 0x1F
+            start_product_name = start_product_manu_name + start_product_manu_name_length + 1
+            start_product_name_length = ord(data[start_product_name]) & 0x1F
+            start_product_module_number = start_product_name + start_product_name_length + 1
+            start_product_module_number_length = ord(data[start_product_module_number]) & 0x1F
+            return data[start_product_module_number + 1: start_product_module_number +start_product_module_number_length + 1]
+        return "N/A"
+ 
+    def fru_decode_product_name(self, data):
+
+        if data and data[4] != 00:
+            start_product_info = ord(data[4]) * 8
+            start_format_version = start_product_info
+            start_product_info = start_format_version + 1
+            start_product_Lang_code = start_product_info + 1
+            start_product_Manu_name = start_product_Lang_code + 1
+            start_product_Manu_name_length = ord(data[start_product_Manu_name]) & 0x0F
+            start_product_name =  start_product_Manu_name + start_product_Manu_name_length + 1
+            start_product_name_length = ord(data[start_product_name]) & 0x0F
+            return data[start_product_name+1: start_product_name+start_product_name_length+1]
+
+        return "N/A"
+
+    def read_eeprom_sysfs(self,sys_path,sysfs_file):
+        sysfs_path = os.path.join(sys_path, sysfs_file)
+        try:
+            with open(sysfs_path, mode='rb', buffering=0) as fd:
+                data = fd.read(256)
+                return data
+        except Exception:
+            pass
+        return None
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/pcie.py
new file mode 100644
index 000000000000..2f7931d42b01
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/pcie.py
@@ -0,0 +1,15 @@
+#
+# pcie_base.py
+#
+# Abstract base class for implementing platform-specific
+#  PCIE functionality for SONiC
+#
+
+try:
+    from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil
+except ImportError as e:
+    raise ImportError (str(e) + " - required module not found")
+
+class Pcie(PcieUtil): 
+    def __init__(self, platform_path):
+        PcieUtil.__init__(self, platform_path)
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/platform.py
new file mode 100644
index 000000000000..c9ba822ac0da
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/platform.py
@@ -0,0 +1,23 @@
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
+#
+#############################################################################
+
+try:
+    from sonic_platform_base.platform_base import PlatformBase
+    from sonic_platform.chassis import Chassis
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+class Platform(PlatformBase):
+    """Platform-specific Platform class"""
+
+    def __init__(self):
+        PlatformBase.__init__(self)
+        self._chassis = Chassis()
+
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/psu.py
new file mode 100644
index 000000000000..8c36c61e1f98
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/psu.py
@@ -0,0 +1,265 @@
+#############################################################################
+# Celestica
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the PSUs status which are available in the platform
+#
+#############################################################################
+
+try:
+    from sonic_platform_base.psu_base import PsuBase
+    from .helper import APIHelper
+    from sonic_platform.fan import Fan
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+IPMI_SENSOR_NETFN = "0x04"
+IPMI_SENSOR_READ_CMD = "0x2D {}"
+IPMI_SENSOR_THRESH_CMD = "0x27 {}"
+IPMI_FRU_MODEL_KEY = "Product Name"
+IPMI_FRU_SERIAL_KEY = "Product Serial"
+
+MAX_PSU_POWER = 550 #Watts
+psu_ipmi_id = {\
+    1: {\
+        "TEMP": "0x0d",\
+        "VOUT": "0x0f",\
+        "COUT": "0x10",\
+        "POUT": "0x11",\
+        "STATUS": "0x72",\
+        "FRU": 3,\
+    },
+    2: {\
+        "TEMP": "0x17",\
+        "VOUT": "0x19",\
+        "COUT": "0x1a",\
+        "POUT": "0x1b",\
+        "STATUS": "0x73",\
+        "FRU": 4,\
+    }
+}
+
+ANALOG_READ_OFFSET = 0
+EVENT_0_7_OFFSET = 2
+EVENT_8_14_OFFSET = 3
+
+FRU_SERIAL = 4
+FRU_MODEL = 1
+
+
+class Psu(PsuBase):
+    """Platform-specific Psu class"""
+
+    def __init__(self, psu_index):
+        PsuBase.__init__(self)
+        self.index = psu_index+1
+        # PSU has only one FAN
+        fan = Fan(0, 0, is_psu_fan=True, psu_index=psu_index)
+        self._fan_list.append(fan)
+        self._api_helper = APIHelper()
+
+    def get_voltage(self):
+        """
+        Retrieves current PSU voltage output
+        Returns:
+            A float number, the output voltage in volts,
+            e.g. 12.1
+        """
+        psu_voltage = 0.0
+        psu_vout_key = psu_ipmi_id[self.index]['VOUT']
+        status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\
+                                                   IPMI_SENSOR_READ_CMD.format(psu_vout_key))
+        value = output.split()[ANALOG_READ_OFFSET]
+        # Formula: Rx10^-1
+        psu_voltage = int(value, 16) / 10.0
+
+        return psu_voltage
+
+    def get_voltage_high_threshold(self):
+        return 12.6
+
+    def get_voltage_low_threshold(self):
+        return 11.4
+
+    def get_current(self):
+        """
+        Retrieves present electric current supplied by PSU
+        Returns:
+            A float number, the electric current in amperes, e.g 15.4
+        """
+        psu_current = 0.0
+        psu_cout_key = psu_ipmi_id[self.index]['COUT']
+        status, output = self._api_helper.ipmi_raw(
+            IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_cout_key))
+        value = output.split()[ANALOG_READ_OFFSET]
+        # Formula: Rx3x10^-1
+        psu_current = int(value, 16) * 3 / 10.0
+
+        return psu_current
+
+    def get_power(self):
+        """
+        Retrieves current energy supplied by PSU
+        Returns:
+            A float number, the power in watts, e.g. 302.6
+        """
+        psu_power = 0.0
+        psu_pout_key = psu_ipmi_id[self.index]['POUT']
+        status, output = self._api_helper.ipmi_raw(
+            IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pout_key))
+        value = output.split()[ANALOG_READ_OFFSET]
+        # Formula: Rx5
+        psu_power = int(value, 16) * 5
+        return psu_power
+
+    def get_powergood_status(self):
+        """
+        Retrieves the powergood status of PSU
+        Returns:
+            A boolean, True if PSU has stablized its output voltages and passed all
+            its internal self-tests, False if not.
+        """
+        return self.get_status()
+
+    def get_status_led(self):
+        """
+        Gets the state of the PSU status LED
+        Returns:
+            A string, one of the predefined STATUS_LED_COLOR_* strings above
+        """
+        if self.get_presence():
+            if self.get_powergood_status():
+                return self.STATUS_LED_COLOR_GREEN
+            else:
+                return "blinking green"
+        else:
+            return "N/A"
+
+    def get_temperature(self):
+        """
+        Retrieves current temperature reading from PSU
+        Returns:
+            A float number of current temperature in Celsius up to nearest thousandth
+            of one degree Celsius, e.g. 30.125
+        """
+        # PSU's ambient temperature sensor is considered as the PSU temperature
+        psu_temp = 0.0
+        psu_temp_id = psu_ipmi_id[self.index]['TEMP']
+        status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\
+                                                   IPMI_SENSOR_READ_CMD.format(psu_temp_id))
+        if status:
+            value = output.split()[ANALOG_READ_OFFSET]
+            psu_temp = float(int(value, 16))
+
+        return psu_temp
+
+    def get_maximum_supplied_power(self):
+        """
+        Retrieves the maximum supplied power by PSU
+        Returns:
+            A float number, the maximum power output in Watts.
+            e.g. 1200.1
+        """
+
+        return MAX_PSU_POWER
+
+    ##############################################################
+    ###################### Device methods ########################
+    ##############################################################
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+            Returns:
+            string: The name of the device
+        """
+        return "PSU {}".format(self.index)
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the PSU
+        Returns:
+            bool: True if PSU is present, False if not
+        """
+        psu_presence = False
+        psu_pstatus_key = psu_ipmi_id[self.index]['STATUS']
+        status, raw_status_read = self._api_helper.ipmi_raw(
+            IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pstatus_key))
+        status_byte = raw_status_read.split()[EVENT_0_7_OFFSET]
+
+        if status:
+            psu_presence = True if int(status_byte, 16) & 0x01 == 0x01 else False
+
+        return psu_presence
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+        Returns:
+            string: Model/part number of device
+        """
+        model = "Unknown"
+        if self.get_presence():
+            ipmi_fru_idx = psu_ipmi_id[self.index]['FRU']
+            status, raw_model = self._api_helper.ipmi_fru_id(
+                ipmi_fru_idx, IPMI_FRU_MODEL_KEY)
+
+            fru_pn_list = raw_model.split(':')[-1]
+            model = fru_pn_list.strip()
+        else:
+            model = "N/A"
+
+        return model
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+        Returns:
+            string: Serial number of device
+        """
+        serial = "Unknown"
+        if self.get_presence():
+            ipmi_fru_idx = psu_ipmi_id[self.index]['FRU']
+            status, raw_serial = self._api_helper.ipmi_fru_id(
+                ipmi_fru_idx, IPMI_FRU_SERIAL_KEY)
+
+            fru_sr_list = raw_serial.split(':')[-1]
+            serial = fru_sr_list.strip()
+        else:
+            model = "N/A"
+
+        return serial
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the device
+        Returns:
+            A boolean value, True if device is operating properly, False if not
+        """
+        psu_status = False
+        psu_pstatus_key = psu_ipmi_id[self.index]['STATUS']
+        status, raw_status_read = self._api_helper.ipmi_raw(
+            IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pstatus_key))
+        status_byte = raw_status_read.split()[EVENT_0_7_OFFSET]
+
+        if status:
+            psu_status = False if int(status_byte, 16) & 0x08 == 0x08 else True
+
+        return psu_status
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return self.index
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return True
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/sfp.py
new file mode 100644
index 000000000000..66950af04200
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/sfp.py
@@ -0,0 +1,197 @@
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica
+#
+# Sfp contains an implementation of SONiC Platform Base API and
+# provides the sfp device status which are available in the platform
+#
+#############################################################################
+import time
+
+try:
+    from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase
+    from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper
+    from .helper import APIHelper
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+SFP_TYPE = "SFP"
+QSFP_TYPE = "QSFP"
+
+QSFP_PORT_START = 49
+QSFP_PORT_END = 56
+SFP_PORT_START = 1
+SFP_PORT_END = 48
+
+PORT_INFO_PATH = '/sys/class/questone2_fpga'
+SFP_I2C_START = 2
+
+
+class Sfp(SfpOptoeBase):
+    """Platform-specific Sfp class"""
+
+    # Path to QSFP sysfs
+    PLATFORM_ROOT_PATH = "/usr/share/sonic/device"
+    PMON_HWSKU_PATH = "/usr/share/sonic/hwsku"
+
+    def __init__(self, sfp_index):
+        SfpOptoeBase.__init__(self)
+        # Init index
+        self.index = sfp_index + 1
+        self.sfp_type, self.port_name = self.__get_sfp_info()
+        self._api_helper = APIHelper()
+        self.platform = self._api_helper.platform
+        self.hwsku = self._api_helper.hwsku
+
+        # Init eeprom path
+        self.eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'.format(SFP_I2C_START+sfp_index)
+
+    def __get_sfp_info(self):
+        port_name = "Unknown"
+        sfp_type = "Unknown"
+
+        if self.index >= QSFP_PORT_START and self.index <= QSFP_PORT_END:
+            sfp_type = QSFP_TYPE
+            port_name = sfp_type + str(self.index - QSFP_PORT_START + 1)
+        elif self.index >= SFP_PORT_START and self.index <= SFP_PORT_END:
+            sfp_type = SFP_TYPE
+            port_name = sfp_type + str(self.index)
+        return sfp_type, port_name
+
+    def __get_path_to_port_config_file(self):
+        platform_path = "/".join([self.PLATFORM_ROOT_PATH, self.platform])
+        hwsku_path = "/".join([platform_path, self.hwsku]
+                              ) if self._api_helper.is_host() else self.PMON_HWSKU_PATH
+        return "/".join([hwsku_path, "port_config.ini"])
+
+    def get_eeprom_path(self):
+        return self.eeprom_path
+
+    def get_reset_status(self):
+        """
+        Retrieves the reset status of SFP
+        Returns:
+            A Boolean, True if reset enabled, False if disabled
+        """
+        reg_status = self._api_helper.read_one_line_file(
+            "/".join([PORT_INFO_PATH, self.port_name, "qsfp_reset"]))
+
+        return (int(reg_status) == 0)
+
+
+    def reset(self):
+        """
+        Reset SFP and return all user module settings to their default srate.
+        Returns:
+            A boolean, True if successful, False if not
+        """
+        if self.sfp_type != QSFP_TYPE:
+            return False
+
+        try:
+            reg_file = open(
+                "/".join([PORT_INFO_PATH, self.port_name, "qsfp_reset"]), "w")
+        except IOError as e:
+            #print("Error: unable to open file: %s" % str(e))
+            return False
+
+        # Convert our register value back to a hex string and write back
+        reg_file.seek(0)
+        reg_file.write(hex(0))
+        reg_file.close()
+
+        # Sleep 1 second to allow it to settle
+        time.sleep(1)
+
+        # Flip the bit back high and write back to the register to take port out of reset
+        try:
+            reg_file = open(
+                "/".join([PORT_INFO_PATH, self.port_name, "qsfp_reset"]), "w")
+        except IOError as e:
+            #print("Error: unable to open file: %s" % str(e))
+            return False
+
+        reg_file.seek(0)
+        reg_file.write(hex(1))
+        reg_file.close()
+
+        return True
+
+    def set_lpmode(self, lpmode):
+        """
+        Sets the lpmode (low power mode) of SFP
+        Args:
+            lpmode: A Boolean, True to enable lpmode, False to disable it
+            Note  : lpmode can be overridden by set_power_override
+        Returns:
+            A boolean, True if lpmode is set successfully, False if not
+        """
+
+        try:
+            reg_file = open(
+                "/".join([PORT_INFO_PATH, self.port_name, "qsfp_lpmode"]), "w")
+        except IOError as e:
+            return False
+
+        if lpmode:
+            value=1
+        else:
+            value=0
+        reg_file.write(hex(value))
+        reg_file.close()
+
+        return True
+
+    def get_lpmode(self):
+        """
+        Retrieves the lpmode (low power mode) status of this SFP
+        Returns:
+            A Boolean, True if lpmode is enabled, False if disabled
+        """
+
+        reg_status = self._api_helper.read_one_line_file(
+            "/".join([PORT_INFO_PATH, self.port_name, "qsfp_lpmode"]))
+
+        return (int(reg_status) == 1)
+
+    def get_position_in_parent(self):
+        return self.index
+
+    def is_replaceable(self):
+        return True
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+            Returns:
+            string: The name of the device
+        """
+        sfputil_helper = SfpUtilHelper()
+        sfputil_helper.read_porttab_mappings(
+            self.__get_path_to_port_config_file())
+        name = sfputil_helper.physical_to_logical[self.index] or "Unknown"
+        return name
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the PSU
+        Returns:
+            bool: True if PSU is present, False if not
+        """
+        # Get path for access port presence status
+        sysfs_filename = "sfp_modabs" if self.sfp_type == SFP_TYPE else "qsfp_modprs"
+        reg_path = "/".join([PORT_INFO_PATH, self.port_name, sysfs_filename])
+
+        content = self._api_helper.read_one_line_file(reg_path)
+        reg_value = int(content)
+
+        return (reg_value == 0)
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the device
+        Returns:
+            A boolean value, True if device is operating properly, False if not
+        """
+        return self.get_presence() and not self.get_reset_status()
diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/thermal.py
similarity index 50%
rename from device/celestica/x86_64-cel_silverstone-r0/sonic_platform/thermal.py
rename to platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/thermal.py
index 9ecf12218d50..d3d96b1e3e73 100644
--- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/thermal.py
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/thermal.py
@@ -19,9 +19,8 @@
 IPMI_SENSOR_NETFN = "0x04"
 IPMI_SS_READ_CMD = "0x2D {}"
 IPMI_SS_THRESHOLD_CMD = "0x27 {}"
-DEFUALT_LOWER_TRESHOLD = 0.0
 HIGH_TRESHOLD_SET_KEY = "unc"
-
+DEFAULT_VAL = 'N/A'
 
 class Thermal(ThermalBase):
     """Platform-specific Thermal class"""
@@ -30,26 +29,30 @@ def __init__(self, thermal_index):
         ThermalBase.__init__(self)
         self._api_helper = APIHelper()
         self.index = thermal_index
-        self.THERMAL_LIST = [
-            ('TEMP_FAN_U52',        'Fan Tray Middle Temperature Sensor',         '0x00'),
-            ('TEMP_FAN_U17',        'Fan Tray Right Temperature Sensor',          '0x01'),
-            ('TEMP_SW_U52',         'Switchboard Left Inlet Temperature Sensor',  '0x02'),
-            ('TEMP_SW_U16',         'Switchboard Right Inlet Temperature Sensor', '0x03'),
-            ('TEMP_BB_U3',          'Baseboard Temperature Sensor',               '0x04'),
-            ('TEMP_CPU',            'CPU Internal Temperature Sensor',            '0x05'),
-            ('TEMP_SW_Internal',    'ASIC Internal Temperature Sensor',           '0x61'),
-            ('SW_U04_Temp',         'IR3595 Chip Left Temperature Sensor',        '0x4F'),
-            ('SW_U14_Temp',         'IR3595 Chip Right Temperature Sensor',       '0x56'),
-            ('SW_U4403_Temp',       'IR3584 Chip Temperature Sensor',             '0x5D'),
+        thermal_list = [\
+            ('Base_Temp_U5',    '0x01', 'Baseboard Right Temp'),\
+            ('Base_Temp_U7',    '0x02', 'Baseboard Left Temp'),\
+            ('Switch_Temp_U31', '0x03', 'ASIC External Front Temp'),\
+            ('Switch_Temp_U30', '0x04', 'ASIC External Rear Temp'),\
+            ('Switch_Temp_U29', '0x05', 'Switchboard Right Temp'),\
+            ('Switch_Temp_U28', '0x06', 'Switchboard Left Temp'),\
+            ('CPU_Temp',        '0x07', 'CPU Internal Temp'),\
+            ('Switch_U33_Temp', '0x4C', 'IR3595 Chip Temp'),\
+            ('Switch_U21_Temp', '0x56', 'IR3584 Chip Temp'),\
+            ('PSUL_Temp1',       '0x0D', 'PSU 1 Ambient Temp'),\
+            ('PSUL_Temp2',       '0x0E', 'PSU 1 Hotspot Temp'),\
+            ('PSUR_Temp1',       '0x17', 'PSU 2 Ambient Temp'),\
+            ('PSUR_Temp2',       '0x18', 'PSU 2 Hotspot Temp'),\
         ]
-        self.sensor_id = self.THERMAL_LIST[self.index][0]
-        self.sensor_des = self.THERMAL_LIST[self.index][1]
-        self.sensor_reading_addr = self.THERMAL_LIST[self.index][2]
+        self.sensor_id = thermal_list[self.index][0]
+        self.sensor_reading_addr = thermal_list[self.index][1]
+        self.sensor_name = thermal_list[self.index][2]
 
-    def __set_threshold(self, key, value):
-        print('{} {}'.format(key, value))
+        temp = self.get_temperature(True)
+        self.minimum_thermal = temp
+        self.maximum_thermal = temp
 
-    def get_temperature(self):
+    def get_temperature(self, skip_record=False):
         """
         Retrieves current temperature reading from thermal
         Returns:
@@ -62,7 +65,20 @@ def get_temperature(self):
         if status and len(raw_ss_read.split()) > 0:
             ss_read = raw_ss_read.split()[0]
             temperature = float(int(ss_read, 16))
-        return temperature
+
+        if temperature != 0.0:
+            if not skip_record:
+                # Record maximum
+                if temperature > self.maximum_thermal:
+                    self.maximum_thermal = temperature
+
+                # Record minimum
+                if temperature < self.minimum_thermal:
+                    self.minimum_thermal = temperature
+
+            return temperature
+        else:
+            return DEFAULT_VAL
 
     def get_high_threshold(self):
         """
@@ -77,7 +93,10 @@ def get_high_threshold(self):
         if status and len(raw_up_thres_read.split()) > 6:
             ss_read = raw_up_thres_read.split()[4]
             high_threshold = float(int(ss_read, 16))
-        return high_threshold
+        if high_threshold != 0.0:
+            return high_threshold
+        else:
+            return DEFAULT_VAL
 
     def get_low_threshold(self):
         """
@@ -86,7 +105,7 @@ def get_low_threshold(self):
             A float number, the low threshold temperature of thermal in Celsius
             up to nearest thousandth of one degree Celsius, e.g. 30.125
         """
-        return DEFUALT_LOWER_TRESHOLD
+        return DEFAULT_VAL
 
     def set_high_threshold(self, temperature):
         """
@@ -97,7 +116,8 @@ def set_high_threshold(self, temperature):
         Returns:
             A boolean, True if threshold is set successfully, False if not
         """
-        status, ret_txt = self._api_helper.ipmi_set_ss_thres(self.sensor_id, HIGH_TRESHOLD_SET_KEY, temperature)
+        status, ret_txt = self._api_helper.ipmi_set_ss_thres(
+            self.sensor_id, HIGH_TRESHOLD_SET_KEY, temperature)
         return status
 
     def set_low_threshold(self, temperature):
@@ -111,37 +131,61 @@ def set_low_threshold(self, temperature):
         """
         return False
 
-    def get_name(self):
+    def get_high_critical_threshold(self):
         """
-        Retrieves the name of the thermal device
-            Returns:
-            string: The name of the thermal device
+        Retrieves the high critical threshold temperature of thermal
+        Returns:
+            A float number, the high critical threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
         """
-        return self.THERMAL_LIST[self.index][0]
+        high_critical_threshold = 0.0
+        status, raw_up_thres_read = self._api_helper.ipmi_raw(
+            IPMI_SENSOR_NETFN, IPMI_SS_THRESHOLD_CMD.format(self.sensor_reading_addr))
+        if status and len(raw_up_thres_read.split()) > 6:
+            ss_read = raw_up_thres_read.split()[5]
+            high_critical_threshold = float(int(ss_read, 16))
+        if high_critical_threshold != 0.0:
+            return high_critical_threshold
+        else:
+            return DEFAULT_VAL
 
-    def get_presence(self):
+    def get_minimum_recorded(self):
         """
-        Retrieves the presence of the device
+        Retrieves the minimum recorded temperature of thermal
         Returns:
-            bool: True if device is present, False if not
+            A float number, the minimum recorded temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
         """
-        return True if self.get_temperature() > 0 else False
+        return self.minimum_thermal
 
-    def get_model(self):
+    def get_maximum_recorded(self):
         """
-        Retrieves the model number (or part number) of the device
+        Retrieves the maximum recorded temperature of thermal
         Returns:
-            string: Model/part number of device
+            A float number, the maximum recorded temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        return self.maximum_thermal
+
+    ##############################################################
+    ###################### Device methods ########################
+    ##############################################################
+
+    def get_name(self):
+        """
+        Retrieves the name of the thermal device
+            Returns:
+            string: The name of the thermal device
         """
-        return self.sensor_des
+        return self.sensor_name
 
-    def get_serial(self):
+    def get_presence(self):
         """
-        Retrieves the serial number of the device
+        Retrieves the presence of the device
         Returns:
-            string: Serial number of device
+            bool: True if device is present, False if not
         """
-        return "Unknown"
+        return True if self.get_temperature() > 0 else False
 
     def get_status(self):
         """
@@ -150,3 +194,11 @@ def get_status(self):
             A boolean value, True if device is operating properly, False if not
         """
         return self.get_presence()
+
+    def is_replaceable(self):
+        """
+        Retrieves whether thermal module is replaceable
+        Returns:
+            A boolean value, True if replaceable, False if not
+        """
+        return False
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/watchdog.py
new file mode 100644
index 000000000000..562b2177b442
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/sonic_platform/watchdog.py
@@ -0,0 +1,264 @@
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica Qeastone2
+#
+# Watchdog contains an implementation of SONiC Platform Base API
+#
+#############################################################################
+import subprocess
+
+try:
+    from sonic_platform_base.watchdog_base import WatchdogBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+I2C_WDT_BUS_ID=60
+I2C_WDT_DEV_ID=0x0d
+I2C_WDT_RESET_SRC_REG=0x06
+I2C_WDT_CTRL_REG=0x81
+I2C_WDT_SET_TIMER_L_REG=0x82
+I2C_WDT_SET_TIMER_M_REG=0x83
+I2C_WDT_SET_TIMER_H_REG=0x84
+I2C_WDT_ARM_REG=0x85
+I2C_WDT_TIMER_L_REG=0x86
+I2C_WDT_TIMER_M_REG=0x87
+I2C_WDT_TIMER_H_REG=0x88
+
+WDT_ENABLE=0x1
+WDT_DISABLE=0x0
+WDT_KEEPALIVE=0x1
+WDT_COMMON_ERROR=-1
+DEFAULT_TIMEOUT=180
+
+class Watchdog(WatchdogBase):
+
+    def __init__(self):
+        # Set default value
+        self.armed = True if self._active() else False
+        self.timeout = self._gettimeout()
+        #self._disable()
+
+    def _i2cget_cmd(self, reg):
+        cmd = "i2cget -y -f {} {} {} b".format(I2C_WDT_BUS_ID, I2C_WDT_DEV_ID,
+                reg)
+        return cmd
+
+    def _i2cset_cmd(self, reg, val):
+        cmd = "i2cset -y -f {} {} {} {}".format(I2C_WDT_BUS_ID, I2C_WDT_DEV_ID,
+                reg, val)
+        return cmd
+
+    def _getstatusoutput(self, cmd):
+        ret,data = subprocess.getstatusoutput(cmd)
+        status = 0
+        if ret != 0:
+            status = ret
+        
+        return status, data
+
+    def _active(self):
+        """
+        WDT is active or not
+        """
+        status, data = self._getstatusoutput(self._i2cget_cmd(I2C_WDT_CTRL_REG))
+        if status:
+            pass
+        return True if data == "0x01" else False
+
+    def _enable(self):
+        """
+        Turn on the watchdog timer
+        """
+        status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_CTRL_REG,
+            WDT_ENABLE))
+        if status:
+            pass
+
+    def _disable(self):
+        """
+        Turn off the watchdog timer
+        """
+        status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_CTRL_REG,
+            WDT_DISABLE))
+        if status:
+            pass
+
+    def _keepalive(self):
+        """
+        Keep alive watchdog timer
+        """
+        self._settimeleft(0)
+        status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_ARM_REG,
+            WDT_KEEPALIVE))
+        if status:
+            pass
+
+    def _settimeout(self, seconds):
+        """
+        Set watchdog timer timeout
+        @param seconds - timeout in seconds
+        @return is the actual set timeout
+        """
+        ms = seconds * 1000
+        ms_low_byte = ms & 0xff
+        ms_media_byte = (ms >> 8) & 0xff
+        ms_high_byte = (ms >> 16) & 0xff
+        status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_SET_TIMER_L_REG,
+            ms_low_byte))
+        if status:
+            pass
+        status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_SET_TIMER_M_REG,
+            ms_media_byte))
+        if status:
+            pass
+        status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_SET_TIMER_H_REG,
+            ms_high_byte))
+        if status:
+            pass
+        return self._gettimeout()
+
+    def _gettimeout(self):
+        """
+        Get watchdog timeout
+        @return watchdog timeout
+        """
+        data = [0, 0, 0]
+        status, data[0] = self._getstatusoutput(self._i2cget_cmd(I2C_WDT_SET_TIMER_L_REG))
+        if status:
+            pass
+        status, data[1] = self._getstatusoutput(self._i2cget_cmd(I2C_WDT_SET_TIMER_M_REG))
+        if status:
+            pass
+        status, data[2] = self._getstatusoutput(self._i2cget_cmd(I2C_WDT_SET_TIMER_H_REG))
+        if status:
+            pass
+        seconds = int((int(data[2], 16) << 16
+                | int(data[1], 16) << 8
+                | int(data[0], 16)) / 1000)
+
+        return seconds
+
+    def _settimeleft(self, seconds):
+        """
+        Set watchdog timer timeout
+        @param seconds - timeout in seconds
+        @return is the actual set timeout
+        """
+        ms = seconds * 1000
+        ms_low_byte = ms & 0xff
+        ms_media_byte = (ms >> 8) & 0xff
+        ms_high_byte = (ms >> 16) & 0xff
+        status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_TIMER_L_REG,
+            ms_low_byte))
+        if status:
+            pass
+        status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_TIMER_M_REG,
+            ms_media_byte))
+        if status:
+            pass
+        status, data = self._getstatusoutput(self._i2cset_cmd(I2C_WDT_TIMER_H_REG,
+            ms_high_byte))
+        if status:
+            pass
+
+    def _gettimeleft(self):
+        """
+        Get time left before watchdog timer expires
+        @return time left in seconds
+        """
+        data = [0, 0, 0]
+        status, data[0] = self._getstatusoutput(self._i2cget_cmd(I2C_WDT_TIMER_L_REG))
+        if status:
+            pass
+        status, data[1] = self._getstatusoutput(self._i2cget_cmd(I2C_WDT_TIMER_M_REG))
+        if status:
+            pass
+        status, data[2] = self._getstatusoutput(self._i2cget_cmd(I2C_WDT_TIMER_H_REG))
+        if status:
+            pass
+        seconds = int((int(data[2], 16) << 16
+                | int(data[1], 16) << 8
+                | int(data[0], 16)) / 1000)
+
+        return (self.timeout - seconds) if (self.timeout > seconds) else -1
+
+    #################################################################
+
+    def arm(self, seconds):
+        """
+        Arm the hardware watchdog with a timeout of <seconds> seconds.
+        If the watchdog is currently armed, calling this function will
+        simply reset the timer to the provided value. If the underlying
+        hardware does not support the value provided in <seconds>, this
+        method should arm the watchdog with the *next greater* available
+        value.
+        Returns:
+            An integer specifying the *actual* number of seconds the watchdog
+            was armed with. On failure returns -1.
+        """
+
+        ret = WDT_COMMON_ERROR
+        if seconds < 0:
+            return ret
+
+        try:
+            if self.timeout != seconds:
+                self.timeout = self._settimeout(seconds)
+            if self.armed:
+                self._keepalive()
+            else:
+                self._settimeout(seconds)
+                self._keepalive()
+                self._enable()
+                self.armed = True
+            ret = self.timeout
+        except IOError as e:
+            pass
+
+        return ret
+
+    def disarm(self):
+        """
+        Disarm the hardware watchdog
+        Returns:
+            A boolean, True if watchdog is disarmed successfully, False if not
+        """
+        disarmed = False
+        if self.is_armed():
+            try:
+                self._disable()
+                self.armed = False
+                disarmed = True
+            except IOError:
+                pass
+
+        return disarmed
+
+    def is_armed(self):
+        """
+        Retrieves the armed state of the hardware watchdog.
+        Returns:
+            A boolean, True if watchdog is armed, False if not
+        """
+
+        return self.armed
+
+    def get_remaining_time(self):
+        """
+        If the watchdog is armed, retrieve the number of seconds remaining on
+        the watchdog timer
+        Returns:
+            An integer specifying the number of seconds remaining on thei
+            watchdog timer. If the watchdog is not armed, returns -1.
+        """
+
+        timeleft = WDT_COMMON_ERROR
+
+        if self.armed:
+            try:
+                timeleft = self._gettimeleft()
+            except IOError:
+                pass
+
+        return timeleft
diff --git a/platform/broadcom/sonic-platform-modules-cel/questone2/systemd/platform-modules-questone2.service b/platform/broadcom/sonic-platform-modules-cel/questone2/systemd/platform-modules-questone2.service
new file mode 100644
index 000000000000..c6ad69112edb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/questone2/systemd/platform-modules-questone2.service
@@ -0,0 +1,13 @@
+[Unit]
+Description=Celestica questone2 platform modules
+After=local-fs.target
+Before=pmon.service
+
+[Service]
+Type=oneshot
+ExecStart=-/etc/init.d/platform-modules-questone2 start
+ExecStop=-/etc/init.d/platform-modules-questone2 stop
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/modules/baseboard_cpld.c b/platform/broadcom/sonic-platform-modules-cel/seastone2/modules/baseboard_cpld.c
index 07ab42c21686..593a8655aacb 100644
--- a/platform/broadcom/sonic-platform-modules-cel/seastone2/modules/baseboard_cpld.c
+++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/modules/baseboard_cpld.c
@@ -375,4 +375,4 @@ module_exit(baseboard_cpld_exit);
 
 MODULE_AUTHOR("Pradchaya Phucharoen  <pphuchar@celestica.com>");
 MODULE_DESCRIPTION("Celestica Seastone2 Baseboard CPLD Driver");
-MODULE_LICENSE("GPL");
\ No newline at end of file
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/platform_sensors.py
new file mode 100755
index 000000000000..559a4315a30f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/platform_sensors.py
@@ -0,0 +1,161 @@
+#!/usr/bin/python
+#
+# Silverstone platform sensors. This script get the sensor data from BMC 
+# using ipmitool and display them in lm-sensor alike format.
+#
+# The following data is support:
+#  1. Temperature sensors
+#  2. PSUs
+#  3. Fan Drawers
+
+import sys
+import logging
+import subprocess
+
+IPMI_SDR_CMD = ['/usr/bin/ipmitool', 'sdr', 'elist']
+MAX_NUM_FANS = 4
+MAX_NUM_PSUS = 2
+
+SENSOR_NAME = 0
+SENSOR_VAL = 4
+
+sensor_dict = {}
+
+def ipmi_sensor_dump(cmd):
+    ''' Execute ipmitool command return dump output
+        exit if any error occur.
+    '''
+    global sensor_dict
+    sensor_dump = ''
+
+    try:
+        sensor_dump = subprocess.check_output(IPMI_SDR_CMD, universal_newlines=True)
+    except subprocess.CalledProcessError as e:
+        logging.error('Error! Failed to execute: {}'.format(cmd))
+        sys.exit(1)
+
+    for line in sensor_dump.splitlines():
+        sensor_info = line.split('|')
+        sensor_dict[sensor_info[SENSOR_NAME].strip()] = sensor_info[SENSOR_VAL].strip()
+
+    return True
+
+def get_reading_by_name(sensor_name, sdr_elist_dump):
+    found = ''
+
+    for line in sdr_elist_dump.splitlines():
+        line = line.decode()
+        if sensor_name in line:
+            found = line.strip()
+            break
+
+    if not found:
+        logging.error('Cannot find sensor name:' + sensor_name)
+
+    else:
+        try:
+            found = found.split('|')[4]
+        except IndexError:
+            logging.error('Cannot get sensor data of:' + sensor_name)
+
+    logging.basicConfig(level=logging.DEBUG)
+    return found
+
+
+def read_temperature_sensors():
+    sensor_list = [\
+        ('Base_Temp_U5',    'Baseboard Right Temp'),\
+        ('Base_Temp_U7',    'Baseboard Left Temp'),\
+        ('Switch_Temp_U1',  'ASIC External Front Temp'),\
+        ('Switch_Temp_U18', 'ASIC External Rear Temp'),\
+        ('Switch_Temp_U28', 'Switchboard Right Temp'),\
+        ('Switch_Temp_U29', 'Switchboard Left Temp'),\
+        ('CPU_Temp',        'CPU Internal Temp'),\
+        ('Switch_U33_Temp', 'IR3595 Chip Temp'),\
+        ('Switch_U21_Temp', 'IR3584 Chip Temp'),\
+    ]
+
+    output = ''
+    sensor_format = '{0:{width}}{1}\n'
+    # Find max length of sensor calling name
+    max_name_width = max(len(sensor[1]) for sensor in sensor_list)
+
+    output += "Temperature Sensors\n"
+    output += "Adapter: IPMI adapter\n"
+    for sensor in sensor_list:
+        output += sensor_format.format('{}:'.format(sensor[1]),\
+                                       sensor_dict[sensor[0]],\
+                                       width=str(max_name_width+1))
+    output += '\n'
+    return output
+
+def read_fan_sensors(num_fans):
+
+    sensor_list = [\
+        ('Fan{}_Status', 'Fan Drawer {} Status'),\
+        ('Fan{}_Front',  'Fan {} front'),\
+        ('Fan{}_Rear',   'Fan {} rear'),\
+    ]
+
+    output = ''
+    sensor_format = '{0:{width}}{1}\n'
+    # Find max length of sensor calling name
+    max_name_width = max(len(sensor[1]) for sensor in sensor_list)
+
+    output += "Fan Drawers\n"
+    output += "Adapter: IPMI adapter\n"
+    for fan_num in range(1, num_fans+1):
+        for sensor in sensor_list:
+            ipmi_sensor_name = sensor[0].format(fan_num)
+            display_sensor_name = sensor[1].format(fan_num)
+            output += sensor_format.format('{}:'.format(display_sensor_name),\
+                                           sensor_dict[ipmi_sensor_name],\
+                                           width=str(max_name_width+1))
+    output += '\n'
+    return output
+
+def read_psu_sensors(num_psus):
+
+    sensor_list = [\
+        ('PSU{}_Status', 'PSU {} Status'),\
+        ('PSU{}_Fan',    'PSU {} Fan 1'),\
+        ('PSU{}_VIn',    'PSU {} Input Voltage'),\
+        ('PSU{}_CIn',    'PSU {} Input Current'),\
+        ('PSU{}_PIn',    'PSU {} Input Power'),\
+        ('PSU{}_Temp1',  'PSU {} Ambient Temp'),\
+        ('PSU{}_Temp2',  'PSU {} Hotspot Temp'),\
+        ('PSU{}_VOut',   'PSU {} Output Voltage'),\
+        ('PSU{}_COut',   'PSU {} Output Current'),\
+        ('PSU{}_POut',   'PSU {} Output Power'),\
+    ]
+
+    output = ''
+    sensor_format = '{0:{width}}{1}\n'
+    # Find max length of sensor calling name
+    max_name_width = max(len(sensor[1]) for sensor in sensor_list)
+
+    output += "PSU\n"
+    output += "Adapter: IPMI adapter\n"
+    for psu_num in range(1, num_psus+1):
+        for sensor in sensor_list:
+            ipmi_sensor_name = sensor[0].format('L' if psu_num == 1 else 'R')
+            display_sensor_name = sensor[1].format(psu_num)
+            output += sensor_format.format('{}:'.format(display_sensor_name),\
+                                           sensor_dict[ipmi_sensor_name],\
+                                           width=str(max_name_width+1))
+    output += '\n'
+    return output
+
+def main():
+    output_string = ''
+
+    if ipmi_sensor_dump(IPMI_SDR_CMD):
+        output_string += read_temperature_sensors()
+        output_string += read_psu_sensors(MAX_NUM_PSUS)
+        output_string += read_fan_sensors(MAX_NUM_FANS)
+
+        print(output_string)
+
+
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/seastone2_platform_shutdown.sh b/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/seastone2_platform_shutdown.sh
new file mode 100755
index 000000000000..e04cac54fa98
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/seastone2_platform_shutdown.sh
@@ -0,0 +1,26 @@
+#!/bin/bash
+REBOOT_CAUSE_DIR="/host/reboot-cause"
+HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt"
+REBOOT_TIME=$(date)
+
+if [ $# -ne 1 ]; then
+    echo "Require reboot type"
+    exit 1
+fi
+
+if [ ! -d "$REBOOT_CAUSE_DIR" ]; then
+    mkdir $REBOOT_CAUSE_DIR
+fi
+
+echo "Reason:$1,Time:${REBOOT_TIME}" > ${HW_REBOOT_CAUSE_FILE}
+
+# Best effort to write buffered data onto the disk
+sync ; sync ; sync ; sleep 3
+
+# BMC cold power-cyle
+ipmitool chassis power cycle &> /dev/null
+
+# System should reboot by now and avoid the script returning to caller
+sleep 10
+
+exit 0
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/sensors b/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/sensors
new file mode 100755
index 000000000000..5d740a9eb7d7
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/scripts/sensors
@@ -0,0 +1,11 @@
+#!/bin/bash
+
+DOCKER_EXEC_FLAGS="i"
+
+# Determine whether stdout is on a terminal
+if [ -t 1 ] ; then
+    DOCKER_EXEC_FLAGS+="t"
+fi
+
+docker exec -$DOCKER_EXEC_FLAGS pmon sensors "$@"
+docker exec -$DOCKER_EXEC_FLAGS pmon python3 /usr/bin/platform_sensors.py "$@"
diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/setup.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/setup.py
new file mode 100644
index 000000000000..8d253086b26d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/setup.py
@@ -0,0 +1,31 @@
+from setuptools import setup
+
+setup(
+    name='sonic-platform',
+    version='1.0',
+    description='SONiC platform API implementation on Celestica Platforms',
+    license='Apache 2.0',
+    author='SONiC Team',
+    author_email='linuxnetdev@microsoft.com',
+    url='https://github.com/Azure/sonic-buildimage',
+    maintainer='Wirut Getbamrung',
+    maintainer_email='wgetbumr@celestica.com',
+    packages=[
+        'sonic_platform',
+    ],
+    package_dir={
+        'sonic_platform': 'sonic_platform'},
+    classifiers=[
+        'Development Status :: 3 - Alpha',
+        'Environment :: Plugins',
+        'Intended Audience :: Developers',
+        'Intended Audience :: Information Technology',
+        'Intended Audience :: System Administrators',
+        'License :: OSI Approved :: Apache Software License',
+        'Natural Language :: English',
+        'Operating System :: POSIX :: Linux',
+        'Programming Language :: Python :: 3.9',
+        'Topic :: Utilities',
+    ],
+    keywords='sonic SONiC platform PLATFORM',
+)
diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/__init__.py
new file mode 100644
index 000000000000..d3c24cb008dd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/__init__.py
@@ -0,0 +1,2 @@
+__all__ = ["platform", "chassis"]
+from sonic_platform import platform
diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/chassis.py
new file mode 100644
index 000000000000..56664cc6e8f2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/chassis.py
@@ -0,0 +1,457 @@
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the Chassis information which are available in the platform
+#
+#############################################################################
+
+try:
+    import sys
+    import time
+    import os
+    import re
+    import shutil
+    from sonic_platform_base.chassis_base import ChassisBase
+    from sonic_platform_base.sfp_base import SfpBase
+    from .helper import APIHelper
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+NUM_FAN_DRAWER = 4
+NUM_FAN_PER_DRAWER = 2
+NUM_PSU = 2
+NUM_THERMAL = 13
+NUM_SFP = 33
+NUM_COMPONENT = 9
+
+REBOOT_CAUSE_REG = "0xA106"
+BASE_CPLD_PLATFORM = "baseboard"
+BASE_GETREG_PATH = "/sys/devices/platform/{}/getreg".format(BASE_CPLD_PLATFORM)
+IPMI_GET_SYS_STATUS_LED="ipmitool raw 0x3A 0x0C 0x00 0x02 0x62"
+IPMI_SET_SYS_STATUS_LED="ipmitool raw 0x3A 0x0C 0x00 0x03 0x62 {}"
+
+ORG_HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt"
+TMP_HW_REBOOT_CAUSE_FILE="/tmp/hw-reboot-cause.txt"
+
+class Chassis(ChassisBase):
+    """Platform-specific Chassis class"""
+    sfp_status_dict={}
+
+    #led color status
+    SYSLED_COLOR_VAL_MAP = {\
+        'off': '0x33',\
+        'green': '0x10',\
+        'green_blink_1hz': '0x11',\
+        'amber': '0x20'\
+    }
+
+    SYSLED_VAL_COLOR_DESC_MAP = {
+        0x33: 'off',\
+        0x10: 'green',\
+        0x11: 'green_blink_1hz',\
+        0x20: 'amber'\
+    }
+
+    def __init__(self):
+        ChassisBase.__init__(self)
+        self._api_helper = APIHelper()
+        self.sfp_module_initialized = False
+        self.fan_module_initialized = False
+        self._watchdog = None
+        self._airflow_direction = None
+        self.__initialize_eeprom()
+        
+        self.__initialize_thermals()
+        self.__initialize_fan()
+        self.__initialize_psu()
+        self.__initialize_components()
+
+    def __initialize_sfp(self):
+        if not self.sfp_module_initialized:
+            from sonic_platform.sfp import Sfp
+            for index in range(0, NUM_SFP):
+                sfp = Sfp(index)
+                self._sfp_list.append(sfp)
+                present = sfp.get_presence()
+                self.sfp_status_dict[sfp.index] = '1' if present else '0'
+            self.sfp_module_initialized = True
+
+    def __initialize_psu(self):
+        from sonic_platform.psu import Psu
+        for index in range(0, NUM_PSU):
+            psu = Psu(index)
+            self._psu_list.append(psu)
+
+    def __initialize_fan(self):
+        from sonic_platform.fan import Fan
+        from sonic_platform.fan_drawer import FanDrawer
+        for fand_index in range(0, NUM_FAN_DRAWER):
+            drawer_fan_list=[]
+            for fan_index in range(0, NUM_FAN_PER_DRAWER):
+                fan = Fan(fand_index, fan_index)
+                self._fan_list.append(fan)
+                drawer_fan_list.append(fan)
+            fan_drawer = FanDrawer(fand_index, drawer_fan_list)
+            self._fan_drawer_list.append(fan_drawer)
+        self.fan_module_initialized = True
+        
+
+    def __initialize_thermals(self):
+        from sonic_platform.thermal import Thermal
+        for index in range(0, NUM_THERMAL):
+            thermal = Thermal(index)
+            self._thermal_list.append(thermal)
+
+    def __initialize_eeprom(self):
+        from sonic_platform.eeprom import Eeprom
+        self._eeprom = Eeprom()
+    
+    def __initialize_components(self):
+        from sonic_platform.component import Component
+        for index in range(0, NUM_COMPONENT):
+            component = Component(index)
+            self._component_list.append(component)
+    
+    def initizalize_system_led(self):
+        return True
+
+    def get_status_led(self):
+        color_str = 'N/A'
+        status, output = self._api_helper.run_command(IPMI_GET_SYS_STATUS_LED)
+        if status:
+            color_val = int(output, 16) & 0x33
+            color_str = self.SYSLED_VAL_COLOR_DESC_MAP.get(color_val, color_str)
+
+        return color_str
+
+    def set_status_led(self, color):
+        status = False
+
+        color_val = self.SYSLED_COLOR_VAL_MAP.get(color, None)
+        if color_val != None:
+            cmd = IPMI_SET_SYS_STATUS_LED.format(color_val)
+            status, res = self._api_helper.run_command(cmd)
+
+        return status
+
+    def get_base_mac(self):
+        """
+        Retrieves the base MAC address for the chassis
+        Returns:
+            A string containing the MAC address in the format
+            'XX:XX:XX:XX:XX:XX'
+        """
+        return self._eeprom.get_mac()
+
+    def get_serial_number(self):
+        """
+        Retrieves the hardware serial number for the chassis
+        Returns:
+            A string containing the hardware serial number for this chassis.
+        """
+        return self._eeprom.get_serial()
+
+    def get_system_eeprom_info(self):
+        """
+        Retrieves the full content of system EEPROM information for the chassis
+        Returns:
+            A dictionary where keys are the type code defined in
+            OCP ONIE TlvInfo EEPROM format and values are their corresponding
+            values.
+        """
+        return self._eeprom.get_eeprom()
+
+    def get_reboot_cause(self):
+        """
+        Retrieves the cause of the previous reboot
+        Returns:
+            A tuple (string, string) where the first element is a string
+            containing the cause of the previous reboot. This string must be
+            one of the predefined strings in this class. If the first string
+            is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
+            to pass a description of the reboot cause.
+        """
+        hw_reboot_cause = self._api_helper.get_register_value(
+            BASE_GETREG_PATH, REBOOT_CAUSE_REG)
+
+
+        # This tmp copy is to retain the reboot-cause only for the current boot
+        if os.path.isfile(ORG_HW_REBOOT_CAUSE_FILE):
+            shutil.move(ORG_HW_REBOOT_CAUSE_FILE, TMP_HW_REBOOT_CAUSE_FILE)
+
+        if hw_reboot_cause == "0x33" and os.path.isfile(TMP_HW_REBOOT_CAUSE_FILE):
+            with open(TMP_HW_REBOOT_CAUSE_FILE) as hw_cause_file:
+                reboot_info = hw_cause_file.readline().rstrip('\n')
+                match = re.search(r'Reason:(.*),Time:(.*)', reboot_info)
+                if match is not None:
+                    if match.group(1) == 'system':
+                        return (self.REBOOT_CAUSE_NON_HARDWARE, 'System cold reboot')
+
+
+        if hw_reboot_cause == "0x99":
+            reboot_cause = self.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC
+            description = 'ASIC Overload Reboot'
+        elif hw_reboot_cause == "0x88":
+            reboot_cause = self.REBOOT_CAUSE_THERMAL_OVERLOAD_CPU
+            description = 'CPU Overload Reboot'
+        elif hw_reboot_cause == "0x77":
+            reboot_cause = self.REBOOT_CAUSE_WATCHDOG
+            description = 'Hardware Watchdog Reset'
+        elif hw_reboot_cause == "0x55":
+            reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER
+            description = 'CPU Cold Reset'
+        elif hw_reboot_cause == "0x44":
+            reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE
+            description = 'CPU Warm Reset'
+        elif hw_reboot_cause == "0x33":
+            # When NON_HARDWARE is used and device is powercycled via IPMI
+            # reboot cause computed as Unknown, Hence using HARDWARE_OTHER
+            reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER
+            description = 'Soft-Set Cold Reset'
+        elif hw_reboot_cause == "0x22":
+            reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE
+            description = 'Soft-Set Warm Reset'
+        elif hw_reboot_cause == "0x11":
+            reboot_cause = self.REBOOT_CAUSE_POWER_LOSS
+            description = 'Power On Reset'
+        elif hw_reboot_cause == "0x00":
+            reboot_cause = self.REBOOT_CAUSE_POWER_LOSS
+            description = 'Power Cycle Reset'
+        else:
+            reboot_cause = self.REBOOT_CAUSE_HARDWARE_OTHER
+            description = 'Hardware reason'
+
+        return (reboot_cause, description)
+
+    ##############################################################
+    ######################## SFP methods #########################
+    ##############################################################
+
+    def get_num_sfps(self):
+        """
+        Retrieves the number of sfps available on this chassis
+        Returns:
+            An integer, the number of sfps available on this chassis
+        """
+        self.__initialize_sfp()
+
+        return len(self._sfp_list)
+
+    def get_all_sfps(self):
+        """
+        Retrieves all sfps available on this chassis
+        Returns:
+            A list of objects derived from SfpBase representing all sfps
+            available on this chassis
+        """
+        self.__initialize_sfp()
+
+        return self._sfp_list
+
+    def get_sfp(self, index):
+        """
+        Retrieves sfp represented by (0-based) index <index>
+        Args:
+            index: An integer, the index (0-based) of the sfp to retrieve.
+            The index should be the sequence of a physical port in a chassis,
+            starting from 0.
+            For example, 0 for Ethernet1, 1 for Ethernet2 and so on.
+        Returns:
+            An object dervied from SfpBase representing the specified sfp
+        """
+        sfp = None
+        self.__initialize_sfp()
+
+        try:
+            sfp = self._sfp_list[index - 1]
+        except IndexError:
+            sys.stderr.write("SFP index {} out of range (0-{})\n".format(
+                             index, len(self._sfp_list) - 1))
+        return sfp
+
+    ##############################################################
+    ####################### Other methods ########################
+    ##############################################################
+
+    def get_watchdog(self):
+        """
+        Retreives hardware watchdog device on this chassis
+        Returns:
+            An object derived from WatchdogBase representing the hardware
+            watchdog device
+        """
+        if self._watchdog is None:
+            from sonic_platform.watchdog import Watchdog
+            self._watchdog = Watchdog()
+
+        return self._watchdog
+
+    ##############################################################
+    ###################### Device methods ########################
+    ##############################################################
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+            Returns:
+            string: The name of the device
+        """
+        return self._api_helper.hwsku
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the PSU
+        Returns:
+            bool: True if PSU is present, False if not
+        """
+        return True
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+        Returns:
+            string: Model/part number of device
+        """
+        return self._eeprom.get_pn()
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+        Returns:
+            string: Serial number of device
+        """
+        return self.get_serial_number()
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision for the chassis
+        Returns:
+            A string containing the hardware revision for this chassis.
+        """
+        return self._eeprom.get_revision()
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the device
+        Returns:
+            A boolean value, True if device is operating properly, False if not
+        """
+        return True
+
+    ##############################################################
+    ###################### Event methods #########################
+    ##############################################################
+
+    def get_change_event(self, timeout=0):
+        """
+        Returns a nested dictionary containing all devices which have
+        experienced a change at chassis level
+
+        Args:
+            timeout: Timeout in milliseconds (optional). If timeout == 0,
+                this method will block until a change is detected.
+
+        Returns:
+            (bool, dict):
+                - bool: True if call successful, False if not;
+                - dict: A nested dictionary where key is a device type,
+                        value is a dictionary with key:value pairs in the format of
+                        {'device_id':'device_event'}, where device_id is the device ID
+                        for this device and device_event.
+                        The known devices's device_id and device_event was defined as table below.
+                         -----------------------------------------------------------------
+                         device   |     device_id       |  device_event  |  annotate
+                         -----------------------------------------------------------------
+                         'fan'          '<fan number>'     '0'              Fan removed
+                                                           '1'              Fan inserted
+
+                         'sfp'          '<sfp number>'     '0'              Sfp removed
+                                                           '1'              Sfp inserted
+                                                           '2'              I2C bus stuck
+                                                           '3'              Bad eeprom
+                                                           '4'              Unsupported cable
+                                                           '5'              High Temperature
+                                                           '6'              Bad cable
+
+                         'voltage'      '<monitor point>'  '0'              Vout normal
+                                                           '1'              Vout abnormal
+                         --------------------------------------------------------------------
+                  Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0', '12':'1'},
+                       'voltage':{'U20':'0', 'U21':'1'}}
+                  Indicates that:
+                     fan 0 has been removed, fan 2 has been inserted.
+                     sfp 11 has been removed, sfp 12 has been inserted.
+                     monitored voltage U20 became normal, voltage U21 became abnormal.
+                  Note: For sfp, when event 3-6 happened, the module will not be avalaible,
+                        XCVRD shall stop to read eeprom before SFP recovered from error status.
+        """
+        sfp_dict = {}
+
+        SFP_REMOVED = '0'
+        SFP_INSERTED = '1'
+
+        SFP_PRESENT = True
+        SFP_ABSENT = False
+
+        start_time = time.time()
+        time_period = timeout/float(1000) #Convert msecs to secs
+
+        while time.time() < (start_time + time_period) or timeout == 0:
+            for sfp in self._sfp_list:
+                port_idx = sfp.index
+                if self.sfp_status_dict[port_idx] == SFP_REMOVED and \
+                    sfp.get_presence() == SFP_PRESENT:
+                    sfp_dict[port_idx] = SFP_INSERTED
+                    self.sfp_status_dict[port_idx] = SFP_INSERTED
+                elif self.sfp_status_dict[port_idx] == SFP_INSERTED and \
+                    sfp.get_presence() == SFP_ABSENT:
+                    sfp_dict[port_idx] = SFP_REMOVED
+                    self.sfp_status_dict[port_idx] = SFP_REMOVED
+
+            if sfp_dict:
+                return True, {'sfp':sfp_dict}
+
+            time.sleep(0.5)
+
+        return True, {'sfp':{}} # Timeout
+
+    def get_airflow_direction(self):
+        if self._airflow_direction == None:
+            try:
+                vendor_extn = self._eeprom.get_vendor_extn()
+                airflow_type = vendor_extn.split()[2][2:4] # Either 0xFB or 0xBF
+                if airflow_type == 'FB':
+                    direction = 'exhaust'
+                elif airflow_type == 'BF':
+                    direction = 'intake'
+                else:
+                    direction = 'N/A'
+            except (AttributeError, IndexError):
+                direction = 'N/A'
+
+            self._airflow_direction = direction
+
+        return self._airflow_direction
+
+    def get_port_or_cage_type(self, index):
+        """
+        Retrieves sfp port or cage type corresponding to physical port <index>
+
+        Args:
+            index: An integer (>=0), the index of the sfp to retrieve.
+
+        Returns:
+            The masks of all types of port or cage that can be supported on the port
+            Types are defined in sfp_base.py
+        """
+        if index in range(1, 32+1):
+            return SfpBase.SFP_PORT_TYPE_BIT_QSFP28
+        elif index == 33:
+            return SfpBase.SFP_PORT_TYPE_BIT_SFP_PLUS
+        else:
+            raise NotImplementedError
+
+
diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/component.py
new file mode 100644
index 000000000000..1f82f87e6731
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/component.py
@@ -0,0 +1,156 @@
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica
+#
+# Component contains an implementation of SONiC Platform Base API and
+# provides the components firmware management function
+#
+#############################################################################
+
+import os.path
+import re
+
+try:
+    #from sonic_platform_base.component_base import ComponentBase
+    from .helper import APIHelper
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+NAME_IDX = 0
+DESC_IDX = 1
+VER_API_IDX = 2
+
+BASE_CPLD_PLATFORM = "baseboard"
+SW_CPLD_PLATFORM = "switchboard"
+PLATFORM_SYSFS_PATH = "/sys/devices/platform/"
+
+FPGA_GETREG_PATH = "{}/{}/FPGA/getreg".format(
+    PLATFORM_SYSFS_PATH, SW_CPLD_PLATFORM)
+BASE_GETREG_PATH = "{}/{}/getreg".format(
+    PLATFORM_SYSFS_PATH, BASE_CPLD_PLATFORM)
+SW_CPLD1_GETREG_PATH = "{}/{}/CPLD1/getreg".format(
+    PLATFORM_SYSFS_PATH, SW_CPLD_PLATFORM)
+SW_CPLD2_GETREG_PATH = "{}/{}/CPLD2/getreg".format(
+    PLATFORM_SYSFS_PATH, SW_CPLD_PLATFORM)
+BIOS_VER_PATH = "/sys/class/dmi/id/bios_version"
+
+BASE_CPLD_VER_REG = "0xA100"
+COME_CPLD_VER_REG = "0xA1E0"
+SW_CPLD_VER_REG = "0x00"
+FPGA_VER_REG = "0x00"
+
+UNKNOWN_VER = "N/A"
+ONIE_VER_CMD = "cat /host/machine.conf"
+SSD_VER_CMD = "smartctl -i /dev/sda"
+
+class Component():
+    """Platform-specific Component class"""
+
+    DEVICE_TYPE = "component"
+
+    def __init__(self, component_index):
+        COMPONENT_LIST = [
+            ("BIOS",      "Basic input/output System", self.__get_bios_ver),
+            ("ONIE",      "Open Network Install Environment", self.__get_onie_ver),
+            ("BMC",       "Baseboard Management Controller", self.__get_bmc_ver),
+            ("FPGA",      "FPGA for transceiver EEPROM access and other component I2C access", self.__get_fpga_ver),
+            ("CPLD COMe", "COMe board CPLD", self.__get_cpld_ver),
+            ("CPLD BASE", "CPLD for board functions, fan control and watchdog", self.__get_cpld_ver),
+            ("CPLD SW1",  "CPLD for port control QSFP(1-16)", self.__get_cpld_ver),
+            ("CPLD SW2",  "CPLD for port control QSFP(17-32) SFP(33)", self.__get_cpld_ver),
+            ("SSD",       "Solid State Drive - {}", self.__get_ssd_ver),
+        ]
+
+        self.index = component_index
+        self.name = COMPONENT_LIST[self.index][NAME_IDX]
+        self.description = COMPONENT_LIST[self.index][DESC_IDX]
+        self.__get_version = COMPONENT_LIST[self.index][VER_API_IDX]
+        self._api_helper = APIHelper()
+
+    def __get_bios_ver(self):
+        return self._api_helper.read_one_line_file(BIOS_VER_PATH)
+
+    def __get_onie_ver(self):
+        onie_ver = "N/A"
+        status, raw_onie_data = self._api_helper.run_command(ONIE_VER_CMD)
+        if status:
+            ret = re.search(r"(?<=onie_version=).+[^\n]", raw_onie_data)
+            if ret != None:
+                onie_ver = ret.group(0)
+        return onie_ver
+
+    def __get_bmc_ver(self):
+        cmd="ipmitool mc info | grep 'Firmware Revision'"
+        status, raw_ver=self._api_helper.run_command(cmd)
+        if status:
+            bmc_ver=raw_ver.split(':')[-1].strip()
+            return bmc_ver
+        else:
+            return UNKNOWN_VER
+
+    def __get_fpga_ver(self):
+        version_raw = self._api_helper.get_register_value(FPGA_GETREG_PATH, FPGA_VER_REG)
+        return "{}.{}".format(int(version_raw[2:][:4], 16), int(version_raw[2:][4:], 16)) if version_raw else UNKNOWN_VER
+
+    def __get_cpld_ver(self):
+        cpld_api_param = {
+            'CPLD COMe': (BASE_GETREG_PATH, COME_CPLD_VER_REG),
+            'CPLD BASE': (BASE_GETREG_PATH, BASE_CPLD_VER_REG),
+            'CPLD SW1': (SW_CPLD1_GETREG_PATH, SW_CPLD_VER_REG),
+            'CPLD SW2': (SW_CPLD2_GETREG_PATH, SW_CPLD_VER_REG),
+        }
+        api_param = cpld_api_param[self.name]
+
+        cpld_ver = self._api_helper.get_register_value(api_param[0], api_param[1])
+        return "{}.{}".format(int(cpld_ver[2], 16), int(cpld_ver[3], 16)) if cpld_ver else UNKNOWN_VER
+
+    def __get_ssd_ver(self):
+        ssd_ver = "N/A"
+        status, raw_ssd_data = self._api_helper.run_command(SSD_VER_CMD)
+        if status:
+            ret = re.search(r"Firmware Version: +(.*)[^\\]", raw_ssd_data)
+            if ret != None:
+                ssd_ver = ret.group(1)
+        return ssd_ver
+
+    def __get_ssd_model(self):
+        model = "N/A"
+        
+        status, raw_ssd_data = self._api_helper.run_command(SSD_VER_CMD)
+        if status:
+            ret = re.search(r"Device Model: +(.*)[^\\]", raw_ssd_data)
+            if ret != None:
+                try:
+                    model = ret.group(1)
+                except (IndexError):
+                    pass
+        return model
+
+    def get_name(self):
+        """
+        Retrieves the name of the component
+         Returns:
+            A string containing the name of the component
+        """
+        return self.name
+
+    def get_description(self):
+        """
+        Retrieves the description of the component
+            Returns:
+            A string containing the description of the component
+        """
+        # For SSD get the model name from device
+        if self.name == "SSD":
+            return self.description.format(self.__get_ssd_model())
+
+        return self.description
+
+    def get_firmware_version(self):
+        """
+        Retrieves the firmware version of module
+        Returns:
+            string: The firmware versions of the module
+        """
+        return self.__get_version()
diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/eeprom.py
new file mode 100644
index 000000000000..32afdc2751d5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/eeprom.py
@@ -0,0 +1,128 @@
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica
+#
+# Platform and model specific eeprom subclass, inherits from the base class,
+# and provides the followings:
+# - the eeprom format definition
+# - specific encoder/decoder if there is special need
+#############################################################################
+
+try:
+    import os
+    import sys
+    import re
+    import json
+    import fcntl
+
+    if sys.version_info.major == 3:
+        from io import StringIO
+    else:
+        from cStringIO import StringIO
+
+    from sonic_platform_base.sonic_eeprom import eeprom_tlvinfo
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+NULL = 'N/A'
+EEPROM_TMP_FILE = '/tmp/eeprom_dump.json'
+
+class Eeprom(eeprom_tlvinfo.TlvInfoDecoder):
+
+    EEPROM_DECODE_HEADLINES = 6
+
+    def __init__(self):
+        for i2cbus in range(2):
+            path_prefix = "/sys/class/i2c-adapter/i2c-{}/".format(i2cbus)
+            with open(path_prefix + "name") as fd:
+                if 'SMBus iSMT adapter at ' in fd.readline():
+                    self._eeprom_path = path_prefix + "{}-0056/eeprom".format(i2cbus)
+                    break
+        super(Eeprom, self).__init__(self._eeprom_path, 0, '', True)
+        self._eeprom = self._load_eeprom()
+
+    def __parse_output(self, decode_output):
+        decode_output.replace('\0', '')
+        lines = decode_output.split('\n')
+        lines = lines[self.EEPROM_DECODE_HEADLINES:]
+        _eeprom_info_dict = dict()
+
+        for line in lines:
+            try:
+                match = re.search('(0x[0-9a-fA-F]{2})\s+\d+\s+(.+)', line)
+                if match is not None:
+                    idx = match.group(1)
+                    value = match.group(2).rstrip('\0')
+
+                _eeprom_info_dict[idx] = value
+            except Exception:
+                pass
+        return _eeprom_info_dict
+
+    def _load_eeprom(self):
+        eeprom_dict = {}
+
+        if os.path.exists(EEPROM_TMP_FILE):
+            with open(EEPROM_TMP_FILE, 'r') as fd:
+                eeprom_dict = json.load(fd)
+
+            return eeprom_dict
+
+        original_stdout = sys.stdout
+        sys.stdout = StringIO()
+        rv = -1
+        try:
+            rv = self.read_eeprom_db()
+        except BaseException:
+            pass
+
+        if rv == 0:
+            decode_output = sys.stdout.getvalue()
+            sys.stdout = original_stdout
+            eeprom_dict = self.__parse_output(decode_output)
+        else:
+            e = self.read_eeprom()
+            if e is None:
+                sys.stdout = original_stdout
+                return {}
+
+            self.decode_eeprom(e)
+            decode_output = sys.stdout.getvalue()
+            sys.stdout = original_stdout
+
+            (is_valid, valid_crc) = self.is_checksum_valid(e)
+            if not is_valid:
+                return {}
+
+            eeprom_dict = self.__parse_output(decode_output)
+
+        if len(eeprom_dict) != 0:
+            with open(EEPROM_TMP_FILE, 'w') as fd:
+                fcntl.flock(fd, fcntl.LOCK_EX)
+                json.dump(eeprom_dict, fd)
+                fcntl.flock(fd, fcntl.LOCK_UN)
+
+        return eeprom_dict
+
+    def get_eeprom(self):
+        return self._eeprom
+
+    def get_product(self):
+        return self._eeprom.get('0x21', NULL)
+
+    def get_pn(self):
+        return self._eeprom.get('0x22', NULL)
+
+    def get_serial(self):
+        return self._eeprom.get('0x23', NULL)
+
+    def get_mac(self):
+        return self._eeprom.get('0x24', NULL)
+
+    def get_revision(self):
+        return self._eeprom.get('0x26', NULL)
+
+    def get_vendor_extn(self):
+        return self._eeprom.get('0xFD', NULL)
diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/fan.py
new file mode 100644
index 000000000000..2b577ac40287
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/fan.py
@@ -0,0 +1,345 @@
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the fan status which are available in the platform
+#
+#############################################################################
+
+try:
+    from sonic_platform_base.fan_base import FanBase
+    from .helper import APIHelper
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+NOT_AVAILABLE = 'N/A'
+
+FAN_NAME_TEMPLATE = "{}Fan{}{}"
+NUM_FAN_TRAYS = 4
+NUM_FANS_PER_TRAY = 2
+FAN_SPEED_TOLERANCE = 20
+MAX_RPM_FRONT=23000
+MAX_RPM_REAR=20500
+MAX_RPM_PSU=22600
+FAN_DIR_BASE = 0x41
+FAN_LED_BASE = 0x04
+FAN_FRU_BASE = 0x05
+FAN_STATUS_BASE = 0x00
+FAN_SID_BASE = 0x80
+PSU_FAN_SID_BASE = 0x8a
+PSU_FRU_BASE = 0x03
+
+
+IPMI_FAN_DIR="ipmitool raw 0x3a 0x0c 0x00 0x02 {}"
+IPMI_GET_SPEED="ipmitool raw 0x04 0x2d {}"
+IPMI_GET_CPLD_PWM="ipmitool raw 0x3a 0x0c 0x00 0x02 {}"
+IPMI_GET_PRESENCE="ipmitool raw 0x3a 0x03 0x03 {}"
+IPMI_GET_MODEL="ipmitool fru list {} | grep 'Board Part Number'"
+IPMI_GET_SERIAL="ipmitool fru list {} | grep 'Board Serial'"
+IPMI_GET_PSU_MODEL="ipmitool fru list {} | grep 'Product Name'"
+IPMI_GET_PSU_SPEED="ipmitool raw 0x04 0x2d {}"
+IPMI_SET_STATUS_LED="ipmitool raw 0x3a 0x0a {} {}"
+IPMI_GET_STATUS_LED="ipmitool raw 0x3a 0x0b {}"
+
+class Fan(FanBase):
+    """Platform-specific Fan class"""
+
+    def __init__(self, fan_tray_index, fan_index=0, is_psu_fan=False, psu_index=0):
+        self.fan_index = fan_index
+        self.fan_tray_index = fan_tray_index
+        self.is_psu_fan = is_psu_fan
+        self._api_helper = APIHelper()
+        self.index = (self.fan_tray_index * 2) + self.fan_index
+        self.name = None
+        if self.is_psu_fan:
+            self.psu_index = psu_index
+            self.max_speed = MAX_RPM_PSU
+            self._fan_sid_offset = PSU_FAN_SID_BASE + self.psu_index
+            self._fan_status_offset = FAN_STATUS_BASE + NUM_FAN_TRAYS + self.psu_index
+        else:
+            self._fan_status_offset = FAN_STATUS_BASE + self.fan_tray_index
+            self._fan_fru_offset = FAN_FRU_BASE + self.fan_tray_index
+            self._fan_dir_offset = FAN_DIR_BASE + (self.fan_tray_index * 4)
+            if self.fan_tray_index > 1:
+                # Questone CPLD firmware is used and hence FAN 3 will be missing
+                # There are only 4 FAN trays in this platform
+                self._fan_dir_offset = self._fan_dir_offset + 4
+
+            self._fan_speed_offset = self._fan_dir_offset - 1
+            self._fan_led_offset = FAN_LED_BASE + self.fan_tray_index
+
+            if fan_index % 2 == 0:
+                # Front FAN
+                self.is_front = True
+                self.max_speed = MAX_RPM_FRONT
+                self._fan_sid_offset = FAN_SID_BASE + 1 + (self.fan_tray_index * NUM_FANS_PER_TRAY)
+            else:
+                # Rear FAN
+                self.is_front = False
+                self.max_speed = MAX_RPM_REAR
+                self._fan_sid_offset = FAN_SID_BASE + (self.fan_tray_index * NUM_FANS_PER_TRAY)
+
+    def get_direction(self):
+        """
+        Retrieves the direction of fan
+        Returns:
+            A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
+            depending on fan direction
+        """
+        direction = NOT_AVAILABLE
+
+        if self.is_psu_fan:
+            cmd = IPMI_GET_PSU_MODEL.format(PSU_FRU_BASE + self.psu_index)
+            status, output = self._api_helper.run_command(cmd)
+            if status and output:
+                model = output.split(':')[-1]
+                if len(model) > 0:
+                    if model[-2:] == ' B':
+                        direction = self.FAN_DIRECTION_INTAKE
+                    else:
+                        direction = self.FAN_DIRECTION_EXHAUST
+        else:
+            cmd = IPMI_FAN_DIR.format(self._fan_dir_offset)
+            status, output = self._api_helper.run_command(cmd)
+            if status:
+                dir_num = int(output, 16) & 0x0C
+                if dir_num == 0x0:
+                    direction = self.FAN_DIRECTION_EXHAUST
+                elif dir_num == 0x8:
+                    direction = self.FAN_DIRECTION_INTAKE
+
+        return direction
+
+    def get_speed(self):
+        """
+        Retrieves the speed of fan as a percentage of full speed
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        speed = 0
+
+        if not self.is_psu_fan:
+            multiplier = 150.0
+        else:
+            multiplier = 100.0
+
+        cmd = IPMI_GET_PSU_SPEED.format(self._fan_sid_offset)
+        status, output = self._api_helper.run_command(cmd)
+        if status:
+            raw_speed = output.split()[0]
+            rpm_speed = int(raw_speed, 16) * multiplier
+            speed = int((rpm_speed/self.max_speed) * 100)
+
+        return speed
+
+    def get_target_speed(self):
+        """
+        Retrieves the target (expected) speed of the fan
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+
+        Note:
+            speed_pc = pwm_target/255*100
+
+            0   : when PWM mode is use
+            pwm : when pwm mode is not use
+        """
+        target_speed = 0
+
+        if self.is_psu_fan:
+            # Ignored for tolerance check
+            return self.get_speed()
+
+        cmd = IPMI_GET_CPLD_PWM.format(self._fan_speed_offset)
+        status, output = self._api_helper.run_command(cmd)
+        if status:
+            fan_pwm = int(output, 16)
+            target_speed = round(fan_pwm / 255 * 100)
+
+        return target_speed
+
+    def get_speed_tolerance(self):
+        """
+        Retrieves the speed tolerance of the fan
+        Returns:
+            An integer, the percentage of variance from target speed which is
+                 considered tolerable
+        """
+        return FAN_SPEED_TOLERANCE
+
+    def set_speed(self, speed):
+        """
+        Sets the fan speed
+        Args:
+            speed: An integer, the percentage of full fan speed to set fan to,
+                   in the range 0 (off) to 100 (full speed)
+        Returns:
+            A boolean, True if speed is set successfully, False if not
+        Notes:
+            pwm setting mode must set as Manual
+            manual: systemctl stop fanctrl.service
+            auto: systemctl start fanctrl.service
+        """
+
+        # FAN speed is controlled by BCM always
+        return False
+
+    def set_status_led(self, color):
+        """
+        Sets the state of the fan module status LED
+        Args:
+            color: A string representing the color with which to set the
+                   fan module status LED
+        Returns:
+            bool: True if status LED state is set successfully, False if not
+        """
+        # There is no per Fan LED
+        return True
+
+    def drawer_set_status_led(self, color):
+        status = False
+
+        color_dict = {\
+            self.STATUS_LED_COLOR_OFF: 0,\
+            self.STATUS_LED_COLOR_AMBER: 1,\
+            self.STATUS_LED_COLOR_RED: 1,\
+            self.STATUS_LED_COLOR_GREEN: 2\
+        }
+
+        if not self.is_psu_fan:
+            cmd = IPMI_SET_STATUS_LED.format(self._fan_led_offset, color_dict.get(color, 0))
+            status, _ = self._api_helper.run_command(cmd) 
+
+        return status
+
+
+    def get_status_led(self):
+        """
+        Gets the state of the fan status LED
+        Returns:
+            A string, one of the predefined STATUS_LED_COLOR_* strings above
+
+        Note:
+            Output
+            STATUS_LED_COLOR_GREEN = "green"
+            STATUS_LED_COLOR_AMBER = "amber"
+            STATUS_LED_COLOR_RED = "red"
+            STATUS_LED_COLOR_OFF = "off"
+
+            Input
+            0x1: green
+            0x2: red
+            0x3: off
+        """
+        status = NOT_AVAILABLE
+        color_dict = {\
+            0: self.STATUS_LED_COLOR_OFF,\
+            1: self.STATUS_LED_COLOR_AMBER,\
+            2: self.STATUS_LED_COLOR_GREEN\
+        }
+
+        if not self.is_psu_fan:
+            cmd = IPMI_GET_STATUS_LED.format(self._fan_led_offset)
+            status, output = self._api_helper.run_command(cmd) 
+            if status:
+                color = int(output, 16)
+                status = color_dict.get(color, status)
+ 
+        return status
+
+
+    ##############################################################
+    ###################### Device methods ########################
+    ##############################################################
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+            Returns:
+            string: The name of the device
+        """
+
+        if not self.name:
+            if not self.is_psu_fan:
+                psu_name = ""
+                fan_id = " {}".format(self.fan_tray_index + 1)
+                fan_type = " Front" if self.is_front else " Rear"
+            else:
+                psu_name = "PSU {} ".format(self.psu_index + 1)
+                fan_id = " {}".format(self.fan_tray_index + 1)
+                fan_type = ""
+
+            self.name = FAN_NAME_TEMPLATE.format(psu_name, fan_id, fan_type)
+
+        return self.name
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the FAN
+        Returns:
+            bool: True if FAN is present, False if not
+        """
+
+        presence = False
+
+        cmd = IPMI_GET_PRESENCE.format(self._fan_status_offset)
+        status, output = self._api_helper.run_command(cmd)
+        if status and output == "00":
+            presence = True
+
+        return presence
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+        Returns:
+            string: Model/part number of device
+        """
+        model = NOT_AVAILABLE
+
+        if not self.is_psu_fan:
+            cmd = IPMI_GET_MODEL.format(self._fan_fru_offset)
+            status, output = self._api_helper.run_command(cmd)
+            if status and output:
+                return output.split()[-1]
+
+        return model
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+        Returns:
+            string: Serial number of device
+        """
+        serial = NOT_AVAILABLE
+
+        if not self.is_psu_fan:
+            cmd = IPMI_GET_SERIAL.format(self._fan_fru_offset)
+            status, output = self._api_helper.run_command(cmd)
+            if status and output:
+                return output.split()[-1]
+
+        return serial
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the device
+        Returns:
+            A boolean value, True if device is operating properly, False if not
+        """
+        return self.get_presence() and self.get_speed() > 0
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        if not self.is_psu_fan:
+            return True
+
+        return False
diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/fan_drawer.py
new file mode 100644
index 000000000000..aea952d5822a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/fan_drawer.py
@@ -0,0 +1,91 @@
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the fan status which are available in the platform
+#
+#############################################################################
+
+try:
+    from sonic_platform_base.fan_drawer_base import FanDrawerBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class FanDrawer(FanDrawerBase):
+
+    def __init__(self, index, fan_list):
+        FanDrawerBase.__init__(self)
+
+        self._fan_list = fan_list
+        self._index = index + 1
+
+    def set_status_led(self, color):
+        """
+        Sets the state of the fan drawer status LED
+        Args:
+            color: A string representing the color with which to set the
+                   fan drawer status LED
+        Returns:
+            bool: True if status LED state is set successfully, False if not
+        """
+        return self._fan_list[0].drawer_set_status_led(color)
+
+    def get_status_led(self):
+        """
+        Gets the state of the fan drawer LED
+        Returns:
+            A string, one of the predefined STATUS_LED_COLOR_* strings above
+        """
+        return self._fan_list[0].get_status_led()
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+            Returns:
+            string: The name of the device
+        """
+        return 'Drawer {}'.format(self._index)
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the FAN
+        Returns:
+            bool: True if FAN is present, False if not
+        """
+        return self._fan_list[0].get_presence()
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+        Returns:
+            string: Model/part number of device
+        """
+        return self._fan_list[0].get_model()
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+        Returns:
+            string: Serial number of device
+        """
+        return self._fan_list[0].get_serial()
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the device
+        Returns:
+            A boolean value, True if device is operating properly, False if not
+        """
+        return self._fan_list[0].get_status()
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return True
+
diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/helper.py
new file mode 100644
index 000000000000..7bcbd70a0a7c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/helper.py
@@ -0,0 +1,191 @@
+#!/usr/bin/env python
+
+import os
+import struct
+import subprocess
+from mmap import *
+from sonic_py_common.device_info import get_platform_and_hwsku
+
+SCALE = 16
+BIN_BITS = 8
+EMPTY_STRING = ""
+HOST_CHK_CMD = "docker > /dev/null 2>&1"
+
+
+class APIHelper():
+
+    def __init__(self):
+        (self.platform, self.hwsku) = get_platform_and_hwsku()
+
+    def get_register_value(self, getreg_path, register):
+        cmd = "echo {1} > {0}; cat {0}".format(getreg_path, register)
+        ret, data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            return None
+        else:
+            return data
+
+    def hex_to_bin(self, ini_string):
+        return bin(int(ini_string, SCALE)).zfill(BIN_BITS)
+
+    def is_host(self):
+        rv, _ = subprocess.getstatusoutput(HOST_CHK_CMD)
+        return (rv == 0)
+
+    def pci_get_value(self, resource, offset):
+        status = True
+        result = ""
+        try:
+            fd = os.open(resource, os.O_RDWR)
+            mm = mmap(fd, 0)
+            mm.seek(int(offset))
+            read_data_stream = mm.read(4)
+            result = struct.unpack('I', read_data_stream)
+        except Exception:
+            status = False
+        return status, result
+
+    def run_command(self, cmd):
+        status = True
+        result = ""
+        ret, data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            status = False
+        else:
+            result = data
+        
+        return status, result
+
+    def read_txt_file(self, file_path):
+        try:
+            with open(file_path, 'r') as fd:
+                data = fd.read()
+                return data.strip()
+        except IOError:
+            pass
+        return None
+
+    def read_one_line_file(self, file_path):
+        try:
+            with open(file_path, 'r') as fd:
+                data = fd.readline()
+                return data.strip()
+        except IOError:
+            pass
+        return None
+
+    def search_file_by_contain(self, directory, search_str, file_start):
+        for dirpath, dirnames, files in os.walk(directory):
+            for name in files:
+                file_path = os.path.join(dirpath, name)
+                if name.startswith(file_start) and search_str in self.read_txt_file(file_path):
+                    return dirpath
+        return None
+
+    def write_file(self, file_path, data):
+        try:
+            with open(file_path, 'w') as fd:
+                fd.write(str(data))
+                return True
+        except Exception:
+            pass
+        return False
+
+    def ipmi_raw(self, netfn, cmd):
+        status = True
+        result = ""
+        cmd = "ipmitool raw {} {}".format(str(netfn), str(cmd))
+        ret, data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            status = False
+        else:
+            result = data
+        
+        return status, result
+
+    def ipmi_fru_id(self, id, key=None):
+        status = True
+        result = ""
+        cmd = "ipmitool fru print {}".format(str(
+            id)) if not key else "ipmitool fru print {0} | grep '{1}' ".format(str(id), str(key))
+
+        ret, data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            status = False
+        else:
+            result = data
+        
+        return status, result
+
+    def ipmi_set_ss_thres(self, id, threshold_key, value):
+        status = True
+        result = ""
+        cmd = "ipmitool sensor thresh '{}' {} {}".format(
+            str(id), str(threshold_key), str(value))
+        ret, data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            status = False
+        else:
+            result = data
+        
+        return status, result
+
+    def fru_decode_product_serial(self, data):
+
+        if data and data[4] != 00:
+            start_product_info = ord(data[4]) * 8
+            start_format_version = start_product_info
+            start_product_info = start_format_version + 1
+            start_product_Lang_code = start_product_info + 1
+            start_product_Manu_name = start_product_Lang_code + 1
+            start_product_Manu_name_length = ord(data[start_product_Manu_name]) & 0x0F
+            start_product_name =  start_product_Manu_name + start_product_Manu_name_length + 1
+            start_product_name_length = ord(data[start_product_name]) & 0x0F
+            start_product_module_number = start_product_name + start_product_name_length +1
+            start_product_module_number_length = ord(data[start_product_module_number]) & 0x0F
+            start_product_version = start_product_module_number + start_product_module_number_length +1
+            start_product_version_length = ord(data[start_product_version]) & 0x0F
+            start_product_serial_number = start_product_version + start_product_version_length +1
+            start_product_serial_number_length = ord(data[start_product_serial_number]) & 0x1F
+            return data[start_product_serial_number+1:start_product_serial_number+start_product_serial_number_length+1]
+        return "N/A"
+
+    def fru_decode_product_model(self, data):
+        if data and data[4] != 00:
+            start_product_info = ord(data[4]) * 8
+            start_format_version = start_product_info
+            start_product_info = start_format_version + 1
+            start_product_lang_code = start_product_info + 1
+            start_product_manu_name = start_product_lang_code + 1
+            start_product_manu_name_length = ord(data[start_product_manu_name]) & 0x1F
+            start_product_name = start_product_manu_name + start_product_manu_name_length + 1
+            start_product_name_length = ord(data[start_product_name]) & 0x1F
+            start_product_module_number = start_product_name + start_product_name_length + 1
+            start_product_module_number_length = ord(data[start_product_module_number]) & 0x1F
+            return data[start_product_module_number + 1: start_product_module_number +start_product_module_number_length + 1]
+        return "N/A"
+ 
+    def fru_decode_product_name(self, data):
+
+        if data and data[4] != 00:
+            start_product_info = ord(data[4]) * 8
+            start_format_version = start_product_info
+            start_product_info = start_format_version + 1
+            start_product_Lang_code = start_product_info + 1
+            start_product_Manu_name = start_product_Lang_code + 1
+            start_product_Manu_name_length = ord(data[start_product_Manu_name]) & 0x0F
+            start_product_name =  start_product_Manu_name + start_product_Manu_name_length + 1
+            start_product_name_length = ord(data[start_product_name]) & 0x0F
+            return data[start_product_name+1: start_product_name+start_product_name_length+1]
+
+        return "N/A"
+
+    def read_eeprom_sysfs(self,sys_path,sysfs_file):
+        sysfs_path = os.path.join(sys_path, sysfs_file)
+        try:
+            with open(sysfs_path, mode='rb', buffering=0) as fd:
+                data = fd.read(256)
+                return data
+        except Exception:
+            pass
+        return None
diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/pcie.py
new file mode 100644
index 000000000000..2f7931d42b01
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/pcie.py
@@ -0,0 +1,15 @@
+#
+# pcie_base.py
+#
+# Abstract base class for implementing platform-specific
+#  PCIE functionality for SONiC
+#
+
+try:
+    from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil
+except ImportError as e:
+    raise ImportError (str(e) + " - required module not found")
+
+class Pcie(PcieUtil): 
+    def __init__(self, platform_path):
+        PcieUtil.__init__(self, platform_path)
diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/platform.py
new file mode 100644
index 000000000000..c9ba822ac0da
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/platform.py
@@ -0,0 +1,23 @@
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
+#
+#############################################################################
+
+try:
+    from sonic_platform_base.platform_base import PlatformBase
+    from sonic_platform.chassis import Chassis
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+class Platform(PlatformBase):
+    """Platform-specific Platform class"""
+
+    def __init__(self):
+        PlatformBase.__init__(self)
+        self._chassis = Chassis()
+
diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/psu.py
new file mode 100644
index 000000000000..362463883ad9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/psu.py
@@ -0,0 +1,273 @@
+#############################################################################
+# Celestica
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the PSUs status which are available in the platform
+#
+#############################################################################
+
+try:
+    from sonic_platform_base.psu_base import PsuBase
+    from .helper import APIHelper
+    from sonic_platform.fan import Fan
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+IPMI_SENSOR_NETFN = "0x04"
+IPMI_SENSOR_READ_CMD = "0x2D {}"
+IPMI_SENSOR_THRESH_CMD = "0x27 {}"
+IPMI_FRU_MODEL_KEY = "Product Name"
+IPMI_FRU_SERIAL_KEY = "Product Serial"
+
+MAX_PSU_POWER = 550 #Watts
+psu_ipmi_id = {\
+    1: {\
+        "TEMP": "0x0d",\
+        "VOUT": "0x0f",\
+        "COUT": "0x10",\
+        "POUT": "0x11",\
+        "STATUS": "0x72",\
+        "FRU": 3,\
+    },
+    2: {\
+        "TEMP": "0x17",\
+        "VOUT": "0x19",\
+        "COUT": "0x1a",\
+        "POUT": "0x1b",\
+        "STATUS": "0x73",\
+        "FRU": 4,\
+    }
+}
+
+ANALOG_READ_OFFSET = 0
+EVENT_0_7_OFFSET = 2
+EVENT_8_14_OFFSET = 3
+
+FRU_SERIAL = 4
+FRU_MODEL = 1
+
+
+class Psu(PsuBase):
+    """Platform-specific Psu class"""
+
+    def __init__(self, psu_index):
+        PsuBase.__init__(self)
+        self.index = psu_index+1
+        # PSU has only one FAN
+        fan = Fan(0, 0, is_psu_fan=True, psu_index=psu_index)
+        self._fan_list.append(fan)
+        self._api_helper = APIHelper()
+
+    def get_voltage(self):
+        """
+        Retrieves current PSU voltage output
+        Returns:
+            A float number, the output voltage in volts,
+            e.g. 12.1
+        """
+        psu_voltage = 0.0
+        psu_vout_key = psu_ipmi_id[self.index]['VOUT']
+        status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\
+                                                   IPMI_SENSOR_READ_CMD.format(psu_vout_key))
+        value = output.split()[ANALOG_READ_OFFSET]
+        # Formula: Rx10^-1
+        psu_voltage = int(value, 16) / 10.0
+
+        return psu_voltage
+
+    def get_voltage_high_threshold(self):
+        return 12.6
+
+    def get_voltage_low_threshold(self):
+        return 11.4
+
+    def get_current(self):
+        """
+        Retrieves present electric current supplied by PSU
+        Returns:
+            A float number, the electric current in amperes, e.g 15.4
+        """
+        psu_current = 0.0
+        psu_cout_key = psu_ipmi_id[self.index]['COUT']
+        status, output = self._api_helper.ipmi_raw(
+            IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_cout_key))
+        value = output.split()[ANALOG_READ_OFFSET]
+        # Formula: Rx3x10^-1
+        psu_current = int(value, 16) * 3 / 10.0
+
+        return psu_current
+
+    def get_power(self):
+        """
+        Retrieves current energy supplied by PSU
+        Returns:
+            A float number, the power in watts, e.g. 302.6
+        """
+        psu_power = 0.0
+        psu_pout_key = psu_ipmi_id[self.index]['POUT']
+        status, output = self._api_helper.ipmi_raw(
+            IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pout_key))
+        value = output.split()[ANALOG_READ_OFFSET]
+        # Formula: Rx5
+        psu_power = int(value, 16) * 5
+        return psu_power
+
+    def get_powergood_status(self):
+        """
+        Retrieves the powergood status of PSU
+        Returns:
+            A boolean, True if PSU has stablized its output voltages and passed all
+            its internal self-tests, False if not.
+        """
+        return self.get_status()
+
+    def get_status_led(self):
+        """
+        Gets the state of the PSU status LED
+        Returns:
+            A string, one of the predefined STATUS_LED_COLOR_* strings above
+        """
+        if self.get_presence():
+            if self.get_powergood_status():
+                return self.STATUS_LED_COLOR_GREEN
+            else:
+                return "blinking green"
+        else:
+            return "N/A"
+
+    def get_temperature(self):
+        """
+        Retrieves current temperature reading from PSU
+        Returns:
+            A float number of current temperature in Celsius up to nearest thousandth
+            of one degree Celsius, e.g. 30.125
+        """
+        # PSU's ambient temperature sensor is considered as the PSU temperature
+        psu_temp = 0.0
+        psu_temp_id = psu_ipmi_id[self.index]['TEMP']
+        status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\
+                                                   IPMI_SENSOR_READ_CMD.format(psu_temp_id))
+        if status:
+            value = output.split()[ANALOG_READ_OFFSET]
+            psu_temp = float(int(value, 16))
+
+        return psu_temp
+
+    def get_maximum_supplied_power(self):
+        """
+        Retrieves the maximum supplied power by PSU
+        Returns:
+            A float number, the maximum power output in Watts.
+            e.g. 1200.1
+        """
+
+        return MAX_PSU_POWER
+
+    ##############################################################
+    ###################### Device methods ########################
+    ##############################################################
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+            Returns:
+            string: The name of the device
+        """
+        return "PSU {}".format(self.index)
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the PSU
+        Returns:
+            bool: True if PSU is present, False if not
+        """
+        psu_presence = False
+        psu_pstatus_key = psu_ipmi_id[self.index]['STATUS']
+        status, raw_status_read = self._api_helper.ipmi_raw(
+            IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pstatus_key))
+        status_byte = raw_status_read.split()[EVENT_0_7_OFFSET]
+
+        if status:
+            psu_presence = True if int(status_byte, 16) & 0x01 == 0x01 else False
+
+        return psu_presence
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+        Returns:
+            string: Model/part number of device
+        """
+        model = "Unknown"
+        if self.get_presence():
+            ipmi_fru_idx = psu_ipmi_id[self.index]['FRU']
+            status, raw_model = self._api_helper.ipmi_fru_id(
+                ipmi_fru_idx, IPMI_FRU_MODEL_KEY)
+
+            fru_pn_list = raw_model.split(':')[-1]
+            model = fru_pn_list.strip()
+        else:
+            model = "N/A"
+
+        return model
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+        Returns:
+            string: Serial number of device
+        """
+        serial = "Unknown"
+        if self.get_presence():
+            ipmi_fru_idx = psu_ipmi_id[self.index]['FRU']
+            status, raw_serial = self._api_helper.ipmi_fru_id(
+                ipmi_fru_idx, IPMI_FRU_SERIAL_KEY)
+
+            fru_sr_list = raw_serial.split(':')[-1]
+            serial = fru_sr_list.strip()
+        else:
+            model = "N/A"
+
+        return serial
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the device
+        Returns:
+            A boolean value, True if device is operating properly, False if not
+        """
+        psu_status = False
+        psu_pstatus_key = psu_ipmi_id[self.index]['STATUS']
+        status, raw_status_read = self._api_helper.ipmi_raw(
+            IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pstatus_key))
+        status_byte = raw_status_read.split()[EVENT_0_7_OFFSET]
+
+        if status:
+            psu_status = False if int(status_byte, 16) & 0x08 == 0x08 else True
+
+        return psu_status
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return self.index
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return True
+
+    def get_direction(self):
+        """
+        Return the airflow direction of PSU FAN
+        Returns:
+            string: 'intake' or 'exhaust'
+        """
+        self
diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/sfp.py
new file mode 100644
index 000000000000..9de0aea6277f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/sfp.py
@@ -0,0 +1,198 @@
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica
+#
+# Sfp contains an implementation of SONiC Platform Base API and
+# provides the sfp device status which are available in the platform
+#
+#############################################################################
+import time
+
+try:
+    from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase
+    from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper
+    from .helper import APIHelper
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+SFP_TYPE = "SFP"
+QSFP_TYPE = "QSFP"
+
+QSFP_PORT_START = 1
+QSFP_PORT_END = 32
+SFP_PORT_START = 33
+SFP_PORT_END = 33
+
+PORT_INFO_PATH = '/sys/class/seastone2_fpga'
+SFP_I2C_START = 2
+
+
+class Sfp(SfpOptoeBase):
+    """Platform-specific Sfp class"""
+
+    # Path to QSFP sysfs
+    PLATFORM_ROOT_PATH = "/usr/share/sonic/device"
+    PMON_HWSKU_PATH = "/usr/share/sonic/hwsku"
+
+    def __init__(self, sfp_index):
+        SfpOptoeBase.__init__(self)
+        # Init index
+        self.index = sfp_index + 1
+        self.sfp_type, self.port_name = self.__get_sfp_info()
+        self._api_helper = APIHelper()
+        self.platform = self._api_helper.platform
+        self.hwsku = self._api_helper.hwsku
+
+        # Init eeprom path
+        self.eeprom_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'.format(SFP_I2C_START+sfp_index)
+
+    def __get_sfp_info(self):
+        port_name = "Unknown"
+        sfp_type = "Unknown"
+
+        if self.index >= QSFP_PORT_START and self.index <= QSFP_PORT_END:
+            sfp_type = QSFP_TYPE
+            port_name = sfp_type + str(self.index)
+        elif self.index >= SFP_PORT_START and self.index <= SFP_PORT_END:
+            sfp_type = SFP_TYPE
+            port_name = sfp_type + str(self.index - SFP_PORT_START + 1)
+
+        return sfp_type, port_name
+
+    def __get_path_to_port_config_file(self):
+        platform_path = "/".join([self.PLATFORM_ROOT_PATH, self.platform])
+        hwsku_path = "/".join([platform_path, self.hwsku]
+                              ) if self._api_helper.is_host() else self.PMON_HWSKU_PATH
+        return "/".join([hwsku_path, "port_config.ini"])
+
+    def get_eeprom_path(self):
+        return self.eeprom_path
+
+    def get_reset_status(self):
+        """
+        Retrieves the reset status of SFP
+        Returns:
+            A Boolean, True if reset enabled, False if disabled
+        """
+        reg_status = self._api_helper.read_one_line_file(
+            "/".join([PORT_INFO_PATH, self.port_name, "qsfp_reset"]))
+
+        return (int(reg_status) == 0)
+
+
+    def reset(self):
+        """
+        Reset SFP and return all user module settings to their default srate.
+        Returns:
+            A boolean, True if successful, False if not
+        """
+        if self.sfp_type != QSFP_TYPE:
+            return False
+
+        try:
+            reg_file = open(
+                "/".join([PORT_INFO_PATH, self.port_name, "qsfp_reset"]), "w")
+        except IOError as e:
+            #print("Error: unable to open file: %s" % str(e))
+            return False
+
+        # Convert our register value back to a hex string and write back
+        reg_file.seek(0)
+        reg_file.write(hex(0))
+        reg_file.close()
+
+        # Sleep 1 second to allow it to settle
+        time.sleep(1)
+
+        # Flip the bit back high and write back to the register to take port out of reset
+        try:
+            reg_file = open(
+                "/".join([PORT_INFO_PATH, self.port_name, "qsfp_reset"]), "w")
+        except IOError as e:
+            #print("Error: unable to open file: %s" % str(e))
+            return False
+
+        reg_file.seek(0)
+        reg_file.write(hex(1))
+        reg_file.close()
+
+        return True
+
+    def set_lpmode(self, lpmode):
+        """
+        Sets the lpmode (low power mode) of SFP
+        Args:
+            lpmode: A Boolean, True to enable lpmode, False to disable it
+            Note  : lpmode can be overridden by set_power_override
+        Returns:
+            A boolean, True if lpmode is set successfully, False if not
+        """
+
+        try:
+            reg_file = open(
+                "/".join([PORT_INFO_PATH, self.port_name, "qsfp_lpmode"]), "w")
+        except IOError as e:
+            return False
+
+        if lpmode:
+            value=1
+        else:
+            value=0
+        reg_file.write(hex(value))
+        reg_file.close()
+
+        return True
+
+    def get_lpmode(self):
+        """
+        Retrieves the lpmode (low power mode) status of this SFP
+        Returns:
+            A Boolean, True if lpmode is enabled, False if disabled
+        """
+
+        reg_status = self._api_helper.read_one_line_file(
+            "/".join([PORT_INFO_PATH, self.port_name, "qsfp_lpmode"]))
+
+        return (int(reg_status) == 1)
+
+    def get_position_in_parent(self):
+        return self.index
+
+    def is_replaceable(self):
+        return True
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+            Returns:
+            string: The name of the device
+        """
+        sfputil_helper = SfpUtilHelper()
+        sfputil_helper.read_porttab_mappings(
+            self.__get_path_to_port_config_file())
+        name = sfputil_helper.physical_to_logical[self.index] or "Unknown"
+        return name
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the PSU
+        Returns:
+            bool: True if PSU is present, False if not
+        """
+        # Get path for access port presence status
+        sysfs_filename = "sfp_modabs" if self.sfp_type == SFP_TYPE else "qsfp_modprs"
+        reg_path = "/".join([PORT_INFO_PATH, self.port_name, sysfs_filename])
+
+        content = self._api_helper.read_one_line_file(reg_path)
+        reg_value = int(content)
+
+        return (reg_value == 0)
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the device
+        Returns:
+            A boolean value, True if device is operating properly, False if not
+        """
+        return self.get_presence() and not self.get_reset_status()
diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/thermal.py
new file mode 100644
index 000000000000..1db171329a02
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/thermal.py
@@ -0,0 +1,204 @@
+#############################################################################
+# Celestica
+#
+# Thermal contains an implementation of SONiC Platform Base API and
+# provides the thermal device status which are available in the platform
+#
+#############################################################################
+
+import os
+import re
+import os.path
+
+try:
+    from sonic_platform_base.thermal_base import ThermalBase
+    from .helper import APIHelper
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+IPMI_SENSOR_NETFN = "0x04"
+IPMI_SS_READ_CMD = "0x2D {}"
+IPMI_SS_THRESHOLD_CMD = "0x27 {}"
+HIGH_TRESHOLD_SET_KEY = "unc"
+DEFAULT_VAL = 'N/A'
+
+class Thermal(ThermalBase):
+    """Platform-specific Thermal class"""
+
+    def __init__(self, thermal_index):
+        ThermalBase.__init__(self)
+        self._api_helper = APIHelper()
+        self.index = thermal_index
+        thermal_list = [\
+            ('Base_Temp_U5',    '0x01', 'Baseboard Right Temp'),\
+            ('Base_Temp_U7',    '0x02', 'Baseboard Left Temp'),\
+            ('Switch_Temp_U1',  '0x03', 'ASIC External Front Temp'),\
+            ('Switch_Temp_U18', '0x04', 'ASIC External Rear Temp'),\
+            ('Switch_Temp_U28', '0x05', 'Switchboard Right Temp'),\
+            ('Switch_Temp_U29', '0x06', 'Switchboard Left Temp'),\
+            ('CPU_Temp',        '0x07', 'CPU Internal Temp'),\
+            ('Switch_U33_Temp', '0x4C', 'IR3595 Chip Temp'),\
+            ('Switch_U21_Temp', '0x56', 'IR3584 Chip Temp'),\
+            ('PSUL_Temp1',       '0x0D', 'PSU 1 Ambient Temp'),\
+            ('PSUL_Temp2',       '0x0E', 'PSU 1 Hotspot Temp'),\
+            ('PSUR_Temp1',       '0x17', 'PSU 2 Ambient Temp'),\
+            ('PSUR_Temp2',       '0x18', 'PSU 2 Hotspot Temp'),\
+        ]
+        self.sensor_id = thermal_list[self.index][0]
+        self.sensor_reading_addr = thermal_list[self.index][1]
+        self.sensor_name = thermal_list[self.index][2]
+
+        temp = self.get_temperature(True)
+        self.minimum_thermal = temp
+        self.maximum_thermal = temp
+
+    def get_temperature(self, skip_record=False):
+        """
+        Retrieves current temperature reading from thermal
+        Returns:
+            A float number of current temperature in Celsius up to nearest thousandth
+            of one degree Celsius, e.g. 30.125
+        """
+        temperature = 0.0
+        status, raw_ss_read = self._api_helper.ipmi_raw(
+            IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(self.sensor_reading_addr))
+        if status and len(raw_ss_read.split()) > 0:
+            ss_read = raw_ss_read.split()[0]
+            temperature = float(int(ss_read, 16))
+
+        if temperature != 0.0:
+            if not skip_record:
+                # Record maximum
+                if temperature > self.maximum_thermal:
+                    self.maximum_thermal = temperature
+
+                # Record minimum
+                if temperature < self.minimum_thermal:
+                    self.minimum_thermal = temperature
+
+            return temperature
+        else:
+            return DEFAULT_VAL
+
+    def get_high_threshold(self):
+        """
+        Retrieves the high threshold temperature of thermal
+        Returns:
+            A float number, the high threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        high_threshold = 0.0
+        status, raw_up_thres_read = self._api_helper.ipmi_raw(
+            IPMI_SENSOR_NETFN, IPMI_SS_THRESHOLD_CMD.format(self.sensor_reading_addr))
+        if status and len(raw_up_thres_read.split()) > 6:
+            ss_read = raw_up_thres_read.split()[4]
+            high_threshold = float(int(ss_read, 16))
+        if high_threshold != 0.0:
+            return high_threshold
+        else:
+            return DEFAULT_VAL
+
+    def get_low_threshold(self):
+        """
+        Retrieves the low threshold temperature of thermal
+        Returns:
+            A float number, the low threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        return DEFAULT_VAL
+
+    def set_high_threshold(self, temperature):
+        """
+        Sets the high threshold temperature of thermal
+        Args :
+            temperature: A float number up to nearest thousandth of one degree Celsius,
+            e.g. 30.125
+        Returns:
+            A boolean, True if threshold is set successfully, False if not
+        """
+        status, ret_txt = self._api_helper.ipmi_set_ss_thres(
+            self.sensor_id, HIGH_TRESHOLD_SET_KEY, temperature)
+        return status
+
+    def set_low_threshold(self, temperature):
+        """
+        Sets the low threshold temperature of thermal
+        Args :
+            temperature: A float number up to nearest thousandth of one degree Celsius,
+            e.g. 30.125
+        Returns:
+            A boolean, True if threshold is set successfully, False if not
+        """
+        return False
+
+    def get_high_critical_threshold(self):
+        """
+        Retrieves the high critical threshold temperature of thermal
+        Returns:
+            A float number, the high critical threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        high_critical_threshold = 0.0
+        status, raw_up_thres_read = self._api_helper.ipmi_raw(
+            IPMI_SENSOR_NETFN, IPMI_SS_THRESHOLD_CMD.format(self.sensor_reading_addr))
+        if status and len(raw_up_thres_read.split()) > 6:
+            ss_read = raw_up_thres_read.split()[5]
+            high_critical_threshold = float(int(ss_read, 16))
+        if high_critical_threshold != 0.0:
+            return high_critical_threshold
+        else:
+            return DEFAULT_VAL
+
+    def get_minimum_recorded(self):
+        """
+        Retrieves the minimum recorded temperature of thermal
+        Returns:
+            A float number, the minimum recorded temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        return self.minimum_thermal
+
+    def get_maximum_recorded(self):
+        """
+        Retrieves the maximum recorded temperature of thermal
+        Returns:
+            A float number, the maximum recorded temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        return self.maximum_thermal
+
+    ##############################################################
+    ###################### Device methods ########################
+    ##############################################################
+
+    def get_name(self):
+        """
+        Retrieves the name of the thermal device
+            Returns:
+            string: The name of the thermal device
+        """
+        return self.sensor_name
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the device
+        Returns:
+            bool: True if device is present, False if not
+        """
+        return True if self.get_temperature() > 0 else False
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the device
+        Returns:
+            A boolean value, True if device is operating properly, False if not
+        """
+        return self.get_presence()
+
+    def is_replaceable(self):
+        """
+        Retrieves whether thermal module is replaceable
+        Returns:
+            A boolean value, True if replaceable, False if not
+        """
+        return False
diff --git a/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/watchdog.py
new file mode 100644
index 000000000000..2290119674cb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/seastone2/sonic_platform/watchdog.py
@@ -0,0 +1,274 @@
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica Seastone2
+#
+# Watchdog contains an implementation of SONiC Platform Base API
+#
+#############################################################################
+import subprocess
+import syslog
+import fcntl
+
+try:
+    from sonic_platform_base.watchdog_base import WatchdogBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+PLATFORM_CPLD_PATH = '/sys/devices/platform/baseboard/{}'
+I2C_WDT_ARM_REG='0xA181'
+I2C_WDT_SET_TIMER_L_REG='0xA182'
+I2C_WDT_SET_TIMER_M_REG='0xA183'
+I2C_WDT_SET_TIMER_H_REG='0xA184'
+I2C_WDT_KEEPALIVE_REG='0xA185'
+I2C_WDT_TIMER_L_REG='0xA186'
+I2C_WDT_TIMER_M_REG='0xA187'
+I2C_WDT_TIMER_H_REG='0xA188'
+
+WDT_ENABLE=0x1
+WDT_DISABLE=0x0
+WDT_KEEPALIVE=0x1
+WDT_COMMON_ERROR=-1
+DEFAULT_TIMEOUT=180
+
+class Watchdog(WatchdogBase):
+
+    def __init__(self):
+        # Set default value
+        self.armed = True if self._is_active() else False
+        self.timeout = self._gettimeout()
+        #self._disable()
+
+    def _get_lpc_reg(self, reg):
+        file_path = PLATFORM_CPLD_PATH.format('getreg')
+        value = None
+        status = False
+
+        try:
+            fd = open(file_path, "w+")
+            # Acquire an exclusive lock on the file
+            fcntl.flock(fd, fcntl.LOCK_EX)
+            fd.write(reg)
+            fd.flush()
+            fd.seek(0)
+            value = fd.readline().rstrip()
+            status = True
+        except (IOError, PermissionError, FileNotFoundError):
+            syslog.syslog(syslog.LOG_ERR, "Baseboard LPC getreg failed with {}",format(e))
+            value = None
+            status = False
+        finally:
+            fcntl.flock(fd, fcntl.LOCK_UN)
+            fd.close()
+
+        return status, value
+
+    def _set_lpc_reg(self, reg, val):
+        status = False
+        file_path = PLATFORM_CPLD_PATH.format('setreg')
+        value = '{} {}'.format(reg, hex(val))
+
+        try:
+            fd = open(file_path, 'w')
+            fcntl.flock(fd, fcntl.LOCK_EX)
+            fd.write(value)
+            status = True
+        except (IOError, PermissionError, FileNotFoundError):
+            syslog.syslog(syslog.LOG_ERR, "Baseboard LPC setreg failed with {}",format(e))
+            value = None
+            status = False
+        finally:
+            fcntl.flock(fd, fcntl.LOCK_UN)
+            fd.close()
+
+        return status
+
+    def _is_active(self):
+        """
+        WDT is active or not
+        """
+        status, data = self._get_lpc_reg(I2C_WDT_ARM_REG)
+        if status and data == "0x01":
+            return True
+
+        return False
+
+    def _enable(self):
+        """
+        Turn on the watchdog timer
+        """
+        self._settimeleft(0)
+        return self._set_lpc_reg(I2C_WDT_ARM_REG, WDT_ENABLE)
+
+    def _disable(self):
+        """
+        Turn off the watchdog timer
+        """
+        return self._set_lpc_reg(I2C_WDT_ARM_REG, WDT_DISABLE)
+
+    def _keepalive(self):
+        """
+        Keep alive watchdog timer
+        """
+        self._settimeleft(0)
+        return self._set_lpc_reg(I2C_WDT_KEEPALIVE_REG, WDT_KEEPALIVE)
+
+    def _settimeout(self, seconds):
+        """
+        Set watchdog timer timeout
+        @param seconds - timeout in seconds
+        @return is the actual set timeout
+        """
+        ms = seconds * 1000
+        ms_low_byte = ms & 0xff
+        ms_media_byte = (ms >> 8) & 0xff
+        ms_high_byte = (ms >> 16) & 0xff
+        self._set_lpc_reg(I2C_WDT_SET_TIMER_L_REG, ms_low_byte)
+        self._set_lpc_reg(I2C_WDT_SET_TIMER_M_REG, ms_media_byte)
+        self._set_lpc_reg(I2C_WDT_SET_TIMER_H_REG, ms_high_byte)
+
+        return self._gettimeout()
+
+    def _gettimeout(self):
+        """
+        Get watchdog timeout
+        @return watchdog timeout
+        """
+        data = [0, 0, 0]
+        status, data[0] = self._get_lpc_reg(I2C_WDT_SET_TIMER_L_REG)
+        if not status:
+            return 0
+        status, data[1] = self._get_lpc_reg(I2C_WDT_SET_TIMER_M_REG)
+        if not status:
+            return 0
+        status, data[2] = self._get_lpc_reg(I2C_WDT_SET_TIMER_H_REG)
+        if not status:
+            return 0
+        seconds = int((int(data[2], 16) << 16
+                | int(data[1], 16) << 8
+                | int(data[0], 16)) / 1000)
+
+        return seconds
+
+    def _settimeleft(self, seconds):
+        """
+        Set watchdog timer timeout
+        @param seconds - timeout in seconds
+        @return is the actual set timeout
+        """
+        ms = seconds * 1000
+        ms_low_byte = ms & 0xff
+        ms_media_byte = (ms >> 8) & 0xff
+        ms_high_byte = (ms >> 16) & 0xff
+        self._set_lpc_reg(I2C_WDT_TIMER_L_REG, ms_low_byte)
+        self._set_lpc_reg(I2C_WDT_TIMER_M_REG, ms_media_byte)
+        self._set_lpc_reg(I2C_WDT_TIMER_H_REG, ms_high_byte)
+
+        return True
+
+    def _gettimeleft(self):
+        """
+        Get time left before watchdog timer expires
+        @return time left in seconds
+        """
+        data = [0, 0, 0]
+        status, data[0] = self._get_lpc_reg(I2C_WDT_TIMER_L_REG)
+        if not status:
+            return 0
+        status, data[1] = self._get_lpc_reg(I2C_WDT_TIMER_M_REG)
+        if not status:
+            return 0
+        status, data[2] = self._get_lpc_reg(I2C_WDT_TIMER_H_REG)
+        if not status:
+            return 0
+        seconds = int((int(data[2], 16) << 16
+                | int(data[1], 16) << 8
+                | int(data[0], 16)) / 1000)
+
+        return (self.timeout - seconds) if (self.timeout > seconds) else 0
+
+    #################################################################
+
+    def arm(self, seconds):
+        """
+        Arm the hardware watchdog with a timeout of <seconds> seconds.
+        If the watchdog is currently armed, calling this function will
+        simply reset the timer to the provided value. If the underlying
+        hardware does not support the value provided in <seconds>, this
+        method should arm the watchdog with the *next greater* available
+        value.
+        Returns:
+            An integer specifying the *actual* number of seconds the watchdog
+            was armed with. On failure returns -1.
+        """
+
+        ret = WDT_COMMON_ERROR
+        if seconds < 0:
+            return ret
+
+        try:
+            if self.timeout != seconds:
+                self.timeout = self._settimeout(seconds)
+            if self.armed:
+                self._keepalive()
+            else:
+                status = self._enable()
+                if not status:
+                    syslog.syslog(syslog.LOG_ERR, "Enable watchdog failed")
+                    return ret
+
+                self.armed = True
+
+            ret = self.timeout
+        except IOError:
+            pass
+
+        return ret
+
+    def disarm(self):
+        """
+        Disarm the hardware watchdog
+        Returns:
+            A boolean, True if watchdog is disarmed successfully, False if not
+        """
+        disarmed = False
+        if self.is_armed():
+            try:
+                status = self._disable()
+                if status:
+                    self.armed = False
+                    disarmed = True
+                else:
+                    syslog.syslog(syslog.LOG_ERR, "Disable watchdog failed")
+            except IOError:
+                pass
+
+        return disarmed
+
+    def is_armed(self):
+        """
+        Retrieves the armed state of the hardware watchdog.
+        Returns:
+            A boolean, True if watchdog is armed, False if not
+        """
+
+        return self.armed
+
+    def get_remaining_time(self):
+        """
+        If the watchdog is armed, retrieve the number of seconds remaining on
+        the watchdog timer
+        Returns:
+            An integer specifying the number of seconds remaining on thei
+            watchdog timer. If the watchdog is not armed, returns -1.
+        """
+
+        timeleft = WDT_COMMON_ERROR
+
+        if self.armed:
+            try:
+                timeleft = self._gettimeleft()
+            except IOError:
+                pass
+
+        return timeleft
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/Makefile b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/Makefile
new file mode 100644
index 000000000000..641690d4871e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/Makefile
@@ -0,0 +1,11 @@
+TARGET:= pddf_custom_fan_driver_module
+$(TARGET)-objs := ./fan_driver/pddf_custom_fan_api.o ./fan_driver/pddf_custom_fan_driver.o
+
+TARGET1:= pddf_custom_led_module
+$(TARGET1)-objs := ./led_driver/pddf_custom_led_module.o
+
+TARGET2:= pddf_custom_psu_driver_module
+$(TARGET2)-objs := ./psu_driver/pddf_psu_api.o ./psu_driver/pddf_psu_driver.o 
+
+obj-m := $(TARGET).o $(TARGET1).o $(TARGET2).o
+obj-m += pddf_custom_fpga_algo.o pddf_custom_fpga_extend.o tps536c7.o pddf_custom_wdt.o pddf_custom_lpc_basecpld.o
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_api.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_api.c
new file mode 100644
index 000000000000..6777690361b1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_api.c
@@ -0,0 +1,656 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * Description of various APIs related to FAN component
+ */
+
+#include <linux/module.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/dmi.h>
+#include "pddf_custom_fan_defs.h"
+#include "pddf_custom_fan_driver.h"
+
+/*#define FAN_DEBUG*/
+#ifdef FAN_DEBUG
+#define fan_dbg(...) printk(__VA_ARGS__)
+#else
+#define fan_dbg(...)
+#endif
+
+extern void *get_device_table(char *name);
+
+void get_fan_duplicate_sysfs(int idx, char *str)
+{
+	switch (idx)
+	{
+		default:
+			break;
+	}
+
+	return;
+}
+
+
+int fan_update_hw(struct device *dev, struct fan_attr_info *info, FAN_DATA_ATTR *udata)
+{
+	int status = 0;
+    struct i2c_client *client = to_i2c_client(dev);
+	FAN_SYSFS_ATTR_DATA *sysfs_attr_data = NULL;
+
+
+    mutex_lock(&info->update_lock);
+
+	sysfs_attr_data = udata->access_data;
+	if (sysfs_attr_data->pre_set != NULL)
+	{
+		status = (sysfs_attr_data->pre_set)(client, udata, info);
+		if (status!=0)
+			dev_warn(&client->dev, "%s: pre_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+	}
+	if (sysfs_attr_data->do_set != NULL)
+	{
+		status = (sysfs_attr_data->do_set)(client, udata, info);
+		if (status!=0)
+			dev_warn(&client->dev, "%s: do_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+
+	}
+	if (sysfs_attr_data->post_set != NULL)
+	{
+		status = (sysfs_attr_data->post_set)(client, udata, info);
+		if (status!=0)
+			dev_warn(&client->dev, "%s: post_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+	}
+
+    mutex_unlock(&info->update_lock);
+
+    return 0;
+}
+
+int fan_update_attr(struct device *dev, struct fan_attr_info *info, FAN_DATA_ATTR *udata)
+{
+	int status = 0;
+    struct i2c_client *client = to_i2c_client(dev);
+	FAN_SYSFS_ATTR_DATA *sysfs_attr_data = NULL;
+
+
+    mutex_lock(&info->update_lock);
+
+    if (time_after(jiffies, info->last_updated + HZ + HZ / 2) || !info->valid) 
+	{
+        dev_dbg(&client->dev, "Starting pddf_fan update\n");
+        info->valid = 0;
+
+		sysfs_attr_data = udata->access_data;
+		if (sysfs_attr_data->pre_get != NULL)
+		{
+			status = (sysfs_attr_data->pre_get)(client, udata, info);
+			if (status!=0)
+				dev_warn(&client->dev, "%s: pre_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+		}
+		if (sysfs_attr_data->do_get != NULL)
+		{
+			status = (sysfs_attr_data->do_get)(client, udata, info);
+			if (status!=0)
+				dev_warn(&client->dev, "%s: do_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+
+		}
+		if (sysfs_attr_data->post_get != NULL)
+		{
+			status = (sysfs_attr_data->post_get)(client, udata, info);
+			if (status!=0)
+				dev_warn(&client->dev, "%s: post_get function fails for %s attribute.ret %d\n", __FUNCTION__, udata->aname, status);
+		}
+
+		
+        info->last_updated = jiffies;
+        info->valid = 1;
+    }
+
+    mutex_unlock(&info->update_lock);
+
+    return 0;
+}
+
+ssize_t fan_show_default(struct device *dev, struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    struct i2c_client *client = to_i2c_client(dev);
+    struct fan_data *data = i2c_get_clientdata(client);
+    FAN_PDATA *pdata = (FAN_PDATA *)(client->dev.platform_data);
+    FAN_DATA_ATTR *usr_data = NULL;
+    struct fan_attr_info *attr_info = NULL;
+    int i, status=0;
+	char new_str[ATTR_NAME_LEN] = "";
+	FAN_SYSFS_ATTR_DATA *ptr = NULL;
+
+    for (i=0;i<data->num_attr;i++)
+    {
+		ptr = (FAN_SYSFS_ATTR_DATA *)pdata->fan_attrs[i].access_data;
+		get_fan_duplicate_sysfs(ptr->index , new_str);
+        if (strcmp(attr->dev_attr.attr.name, pdata->fan_attrs[i].aname) == 0 || strcmp(attr->dev_attr.attr.name, new_str) == 0)
+        {
+			attr_info = &data->attr_info[i];
+            usr_data = &pdata->fan_attrs[i];
+			strscpy(new_str, "", ATTR_NAME_LEN);
+        }
+    }
+
+    if (attr_info==NULL || usr_data==NULL)
+    {
+        printk(KERN_ERR "%s is not supported attribute for this client\n", usr_data->aname);
+		goto exit;
+	}
+
+    fan_update_attr(dev, attr_info, usr_data);
+
+	/*Decide the o/p based on attribute type */
+	switch(attr->index)
+	{
+		case FAN1_PRESENT:
+		case FAN2_PRESENT:
+		case FAN3_PRESENT:
+		case FAN4_PRESENT:
+		case FAN5_PRESENT:
+		case FAN6_PRESENT:
+		case FAN7_PRESENT:
+		case FAN8_PRESENT:
+		case FAN9_PRESENT:
+		case FAN10_PRESENT:
+		case FAN11_PRESENT:
+		case FAN12_PRESENT:
+        case FAN13_PRESENT:
+        case FAN14_PRESENT:
+		case FAN1_DIRECTION:
+		case FAN2_DIRECTION:
+		case FAN3_DIRECTION:
+		case FAN4_DIRECTION:
+		case FAN5_DIRECTION:
+		case FAN6_DIRECTION:
+		case FAN7_DIRECTION:
+		case FAN8_DIRECTION:
+		case FAN9_DIRECTION:
+		case FAN10_DIRECTION:
+		case FAN11_DIRECTION:
+		case FAN12_DIRECTION:
+        case FAN13_DIRECTION:
+		case FAN14_DIRECTION:
+		case FAN1_INPUT:
+		case FAN2_INPUT:
+		case FAN3_INPUT:
+		case FAN4_INPUT:
+		case FAN5_INPUT:
+		case FAN6_INPUT:
+		case FAN7_INPUT:
+		case FAN8_INPUT:
+		case FAN9_INPUT:
+		case FAN10_INPUT:
+		case FAN11_INPUT:
+		case FAN12_INPUT:
+        case FAN13_INPUT:
+		case FAN14_INPUT:
+		case FAN1_PWM:
+		case FAN2_PWM:
+		case FAN3_PWM:
+		case FAN4_PWM:
+		case FAN5_PWM:
+		case FAN6_PWM:
+		case FAN7_PWM:
+		case FAN8_PWM:
+		case FAN9_PWM:
+		case FAN10_PWM:
+		case FAN11_PWM:
+		case FAN12_PWM:
+        case FAN13_PWM:
+		case FAN14_PWM:
+		case FAN1_FAULT:
+		case FAN2_FAULT:
+		case FAN3_FAULT:
+		case FAN4_FAULT:
+		case FAN5_FAULT:
+		case FAN6_FAULT:
+		case FAN7_FAULT:
+		case FAN8_FAULT:
+		case FAN9_FAULT:
+		case FAN10_FAULT:
+		case FAN11_FAULT:
+		case FAN12_FAULT:
+        case FAN13_FAULT:
+		case FAN14_FAULT:
+            status = attr_info->val.intval;
+			break;
+		default:
+			fan_dbg(KERN_ERR "%s: Unable to find the attribute index for %s\n", __FUNCTION__, usr_data->aname);
+			status = 0;
+	}
+
+exit:
+    return sprintf(buf, "%d\n", status);
+}
+
+
+ssize_t fan_store_default(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    struct i2c_client *client = to_i2c_client(dev);
+    struct fan_data *data = i2c_get_clientdata(client);
+    FAN_PDATA *pdata = (FAN_PDATA *)(client->dev.platform_data);
+    FAN_DATA_ATTR *usr_data = NULL;
+    struct fan_attr_info *attr_info = NULL;
+    int i, ret ;
+	uint32_t val;
+
+    for (i=0;i<data->num_attr;i++)
+    {
+		if (strcmp(data->attr_info[i].name, attr->dev_attr.attr.name) == 0 && strcmp(pdata->fan_attrs[i].aname, attr->dev_attr.attr.name) == 0)
+        {
+            attr_info = &data->attr_info[i];
+            usr_data = &pdata->fan_attrs[i];
+        }
+    }
+
+    if (attr_info==NULL || usr_data==NULL) {
+		printk(KERN_ERR "%s is not supported attribute for this client\n", attr->dev_attr.attr.name);
+		goto exit;
+	}
+
+	switch(attr->index)
+	{
+		case FAN1_PWM:
+		case FAN2_PWM:
+		case FAN3_PWM:
+		case FAN4_PWM:
+		case FAN5_PWM:
+		case FAN6_PWM:
+		case FAN7_PWM:
+		case FAN8_PWM:
+		case FAN9_PWM:
+		case FAN10_PWM:
+		case FAN11_PWM:
+		case FAN12_PWM:
+        case FAN13_PWM:
+        case FAN14_PWM:
+			ret = kstrtoint(buf, 10, &val);
+			if (ret)
+			{
+				printk(KERN_ERR "%s: Unable to convert string into value for %s\n", __FUNCTION__, usr_data->aname);
+				return ret;
+			}
+			/*Update the value of attr_info here, and use it to update the HW values*/
+			attr_info->val.intval = val;
+			break;
+		default:
+			printk(KERN_ERR "%s: Unable to find the attr index for %s\n", __FUNCTION__, usr_data->aname);
+			goto exit;
+	}
+
+	fan_dbg(KERN_ERR "%s: pwm to be set is %d\n", __FUNCTION__, val);
+	fan_update_hw(dev, attr_info, usr_data);
+
+exit:
+	return count;
+}
+
+int fan_cpld_client_read(FAN_DATA_ATTR *udata)
+{
+    int status = -1;
+
+    if (udata!=NULL)
+    {
+        if (udata->len==1)
+        {
+            status = board_i2c_cpld_read(udata->devaddr , udata->offset);
+        }
+        else
+        {
+            /* Get the I2C client for the CPLD */
+            struct i2c_client *client_ptr=NULL;
+            client_ptr = (struct i2c_client *)get_device_table(udata->devname);
+            if (client_ptr)
+            {
+                if (udata->len==2)
+                {
+                    status = i2c_smbus_read_word_swapped(client_ptr, udata->offset);
+                }
+                else
+                    printk(KERN_ERR "PDDF_FAN: Doesn't support block CPLD read yet");
+            }
+            else
+                printk(KERN_ERR "Unable to get the client handle for %s\n", udata->devname);
+        }
+
+    }
+
+    return status;
+}
+
+int fan_cpld_client_write(FAN_DATA_ATTR *udata, uint32_t val)
+{
+    int status = 0;
+
+    if (udata->len==1)
+    {
+        status = board_i2c_cpld_write(udata->devaddr, udata->offset, val);
+    }
+    else
+    {
+        /* Get the I2C client for the CPLD */
+        struct i2c_client *client_ptr=NULL;
+        client_ptr = (struct i2c_client *)get_device_table(udata->devname);
+        if (client_ptr)
+        {
+            if (udata->len==2)
+            {
+                uint8_t val_lsb = val & 0xFF;
+                uint8_t val_hsb = (val >> 8) & 0xFF;
+                /* TODO: Check this logic for LE and BE */
+                status = i2c_smbus_write_byte_data(client_ptr, udata->offset, val_lsb);
+                if (status==0) status = i2c_smbus_write_byte_data(client_ptr, udata->offset+1, val_hsb);
+            }
+            else
+                printk(KERN_ERR "PDDF_FAN: Doesn't support block CPLD write yet");
+        }
+        else
+            printk(KERN_ERR "Unable to get the client handle for %s\n", udata->devname);
+    }
+
+    return status;
+}
+
+int fan_fpgai2c_client_read(FAN_DATA_ATTR *udata)
+{
+    int status = -1;
+
+    if (udata!=NULL)
+    {
+        if (udata->len==1)
+        {
+            status = board_i2c_fpga_read(udata->devaddr , udata->offset);
+            /*printk(KERN_ERR "### Reading offset 0x%x from 0x%x device ...  val 0x%x\n", udata->offset, udata->devaddr, status);*/
+        }
+        else
+        {
+            /* Get the I2C client for the FPGAI2C */
+            struct i2c_client *client_ptr=NULL;
+            client_ptr = (struct i2c_client *)get_device_table(udata->devname);
+            if (client_ptr)
+            {
+                if (udata->len==2)
+                {
+                    status = i2c_smbus_read_word_swapped(client_ptr, udata->offset);
+                }
+                else
+                    printk(KERN_ERR "PDDF_FAN: Doesn't support block FPGAI2C read yet");
+            }
+            else
+                printk(KERN_ERR "Unable to get the client handle for %s\n", udata->devname);
+        }
+
+    }
+
+    return status;
+}
+
+int fan_fpgai2c_client_write(FAN_DATA_ATTR *udata, uint32_t val)
+{
+    int status = 0;
+
+    if (udata->len==1)
+    {
+        status = board_i2c_fpga_write(udata->devaddr, udata->offset, val);
+    }
+    else
+    {
+        /* Get the I2C client for the FPGAI2C */
+        struct i2c_client *client_ptr=NULL;
+        client_ptr = (struct i2c_client *)get_device_table(udata->devname);
+        if (client_ptr)
+        {
+            if (udata->len==2)
+            {
+                uint8_t val_lsb = val & 0xFF;
+                uint8_t val_hsb = (val >> 8) & 0xFF;
+                /* TODO: Check this logic for LE and BE */
+                status = i2c_smbus_write_byte_data(client_ptr, udata->offset, val_lsb);
+                if (status==0) status = i2c_smbus_write_byte_data(client_ptr, udata->offset+1, val_hsb);
+            }
+            else
+                printk(KERN_ERR "PDDF_FAN: Doesn't support block FPGAI2C write yet");
+        }
+        else
+            printk(KERN_ERR "Unable to get the client handle for %s\n", udata->devname);
+    }
+
+    return status;
+}
+
+
+int sonic_i2c_get_fan_present_default(void *client, FAN_DATA_ATTR *udata, void *info)
+{
+    int status = 0;
+    int val = 0;
+    struct fan_attr_info *painfo = (struct fan_attr_info *)info;
+
+    if (strcmp(udata->devtype, "cpld") == 0)
+    {
+        val = fan_cpld_client_read(udata);
+    }
+    else if (strcmp(udata->devtype, "fpgai2c") == 0)
+    {
+        val = fan_fpgai2c_client_read(udata);
+    }
+    else
+    {
+	    val = i2c_smbus_read_byte_data((struct i2c_client *)client, udata->offset);
+    }
+	
+	if (val < 0)
+		status = val;
+	else
+		painfo->val.intval = ((val & udata->mask) == udata->cmpval);
+    
+
+    return status;
+}
+
+int sonic_i2c_get_fan_rpm_default(void *client, FAN_DATA_ATTR *udata, void *info)
+{
+    int status = 0;
+	int val = 0;
+    struct fan_attr_info *painfo = (struct fan_attr_info *)info;
+
+    if (strcmp(udata->devtype, "cpld") == 0)
+    {
+        val = fan_cpld_client_read(udata);
+    }
+    else if (strcmp(udata->devtype, "fpgai2c") == 0)
+    {
+        val = fan_fpgai2c_client_read(udata);
+    }
+    else
+    {
+        if (udata->len == 1)
+        {
+            val = i2c_smbus_read_byte_data((struct i2c_client *)client, udata->offset);
+        }
+        else if (udata->len ==2)
+        {
+            val = i2c_smbus_read_word_swapped((struct i2c_client *)client, udata->offset);
+            
+        }
+    }
+
+	if (val < 0)
+		status = val;
+	else
+	{
+		if (udata->is_divisor)
+			painfo->val.intval = udata->mult / (val >> 3);
+		else
+			painfo->val.intval = udata->mult * val;
+	}
+
+	return status;
+}
+
+
+int sonic_i2c_get_fan_direction_default(void *client, FAN_DATA_ATTR *udata, void *info)
+{
+    int status = 0;
+	int val = 0;
+    struct fan_attr_info *painfo = (struct fan_attr_info *)info;
+
+    if (strcmp(udata->devtype, "cpld") == 0)
+    {
+        val = fan_cpld_client_read(udata);
+    }
+    else if (strcmp(udata->devtype, "fpgai2c") == 0)
+    {
+        val = fan_fpgai2c_client_read(udata);
+    }
+    else
+    {
+	    val = i2c_smbus_read_byte_data((struct i2c_client *)client, udata->offset);
+    }
+
+    if (val < 0)
+        status = val;
+    else
+        painfo->val.intval = ((val & udata->mask) == udata->cmpval);
+
+    return status;
+}
+
+
+int sonic_i2c_set_fan_pwm_default(struct i2c_client *client, FAN_DATA_ATTR *udata, void *info)
+{
+    int status = 0;
+	int val = 0;
+    struct fan_attr_info *painfo = (struct fan_attr_info *)info;
+
+	val = painfo->val.intval & udata->mask;
+
+	if (val > 255)
+	{
+	  return -EINVAL;
+	}
+
+    if (strcmp(udata->devtype, "cpld") == 0)
+    {
+        status = fan_cpld_client_write(udata, val);
+    }
+    else if (strcmp(udata->devtype, "fpgai2c") == 0)
+    {
+        status = fan_fpgai2c_client_write(udata, val);
+    }
+    else
+    {
+        if (udata->len == 1)
+            status = i2c_smbus_write_byte_data(client, udata->offset, val);
+        else if (udata->len == 2)
+        {
+            uint8_t val_lsb = val & 0xFF;
+            uint8_t val_hsb = (val >> 8) & 0xFF;
+            /* TODO: Check this logic for LE and BE */
+            status = i2c_smbus_write_byte_data(client, udata->offset, val_lsb);
+            if (status == 0) status = i2c_smbus_write_byte_data(client, udata->offset+1, val_hsb);
+        }
+        else
+        {
+            printk(KERN_DEBUG "%s: pwm should be of len 1/2 bytes. Not setting the pwm as the length is %d\n", __FUNCTION__, udata->len);
+        }
+    }
+
+    return status;
+}
+
+
+int sonic_i2c_get_fan_pwm_default(void *client, FAN_DATA_ATTR *udata, void *info)
+{
+    int status = 0;
+	int val = 0;
+    struct fan_attr_info *painfo = (struct fan_attr_info *)info;
+
+    if (strcmp(udata->devtype, "cpld") == 0)
+    {
+        val = fan_cpld_client_read(udata);
+    }
+    else if (strcmp(udata->devtype, "fpgai2c") == 0)
+    {
+        val = fan_fpgai2c_client_read(udata);
+    }
+    else
+    {
+        if (udata->len == 1)
+        {
+            val = i2c_smbus_read_byte_data((struct i2c_client *)client, udata->offset);
+        }
+        else if (udata->len ==2)
+        {
+            val = i2c_smbus_read_word_swapped((struct i2c_client *)client, udata->offset);
+            
+        }
+    }
+
+	if (val < 0)
+		status = val;
+	else
+	{
+		val = val & udata->mask;
+		painfo->val.intval = val;
+	}
+    return status;
+}
+
+int sonic_i2c_get_fan_fault_default(void *client, FAN_DATA_ATTR *udata, void *info)
+{
+    int status = 0;
+	int val = 0;
+    struct fan_attr_info *painfo = (struct fan_attr_info *)info;
+
+	/*Assuming fan fault to be denoted by 1 byte only*/
+    if (strcmp(udata->devtype, "cpld") == 0)
+    {
+        val = fan_cpld_client_read(udata);
+    }
+    else if (strcmp(udata->devtype, "fpgai2c") == 0)
+    {
+        val = fan_fpgai2c_client_read(udata);
+    }
+    else
+    {
+	    val = i2c_smbus_read_byte_data((struct i2c_client *)client, udata->offset);
+    }
+
+	if (val < 0)
+		status = val;
+	else
+		painfo->val.intval = ((val & udata->mask) == udata->cmpval);
+    return status;
+}
+
+
+int pddf_fan_post_probe_default(struct i2c_client *client, const struct i2c_device_id *dev_id)
+{
+
+	/*Dummy func for now - check the respective platform modules*/
+    return 0;
+}
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_defs.h b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_defs.h
new file mode 100644
index 000000000000..24a91a291e8c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_defs.h
@@ -0,0 +1,93 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * Description:
+ *  Platform FAN defines/structures header file
+ */
+
+#ifndef __PDDF_FAN_DEFS_H__
+#define __PDDF_FAN_DEFS_H__
+
+
+#define MAX_NUM_FAN 7
+#define MAX_FAN_ATTRS 128
+#define ATTR_NAME_LEN 32
+#define STR_ATTR_SIZE 32
+#define DEV_TYPE_LEN 32
+
+/* Each client has this additional data 
+ */
+
+typedef struct FAN_DATA_ATTR
+{
+    char aname[ATTR_NAME_LEN];                    // attr name, taken from enum fan_sysfs_attributes
+    char devtype[DEV_TYPE_LEN];       // Type of FAN controller, i.e EMC2305, EMC2302, or FAN-CPLD etc
+    char devname[DEV_TYPE_LEN];       // Name of the device from where this informatin is to be read
+    uint32_t devaddr;
+    uint32_t offset;
+    uint32_t mask;
+    uint32_t cmpval;
+    uint32_t len;
+    int mult;                       // Multiplication factor to get the actual data
+    uint8_t is_divisor;                     // Check if the value is a divisor and mult is dividend
+    void *access_data;
+
+}FAN_DATA_ATTR;
+
+
+typedef struct FAN_SYSFS_ATTR_DATA
+{
+    int index;
+    unsigned short mode;
+    ssize_t (*show)(struct device *dev, struct device_attribute *da, char *buf);
+    int (*pre_get)(void *client, FAN_DATA_ATTR *adata, void *data);
+    int (*do_get)(void *client, FAN_DATA_ATTR *adata, void *data);
+    int (*post_get)(void *client, FAN_DATA_ATTR *adata, void *data);
+    ssize_t (*store)(struct device *dev, struct device_attribute *da, const char *buf, size_t count);
+    int (*pre_set)(void *client, FAN_DATA_ATTR *adata, void *data);
+    int (*do_set)(void *client, FAN_DATA_ATTR *adata, void *data);
+    int (*post_set)(void *client, FAN_DATA_ATTR *adata, void *data);
+    void *data;
+} FAN_SYSFS_ATTR_DATA;
+
+typedef struct FAN_SYSFS_ATTR_DATA_ENTRY
+{
+    char name[ATTR_NAME_LEN];
+    FAN_SYSFS_ATTR_DATA *a_ptr;
+} FAN_SYSFS_ATTR_DATA_ENTRY;
+
+
+/* FAN CLIENT DATA - PLATFORM DATA FOR FAN CLIENT */
+typedef struct FAN_DATA
+{
+    int num_fantrays;                    // num of fans controlled by this fan client
+    FAN_DATA_ATTR fan_attr;
+    int len;             // no of valid attributes for this fan client
+    FAN_DATA_ATTR fan_attrs[MAX_FAN_ATTRS]; 
+}FAN_DATA;
+
+typedef struct FAN_PDATA
+{
+    int num_fantrays;                    // num of fans controlled by this fan client
+    int len;             // no of valid attributes for this fan client
+    FAN_DATA_ATTR *fan_attrs; 
+}FAN_PDATA;
+
+extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
+extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
+
+extern int board_i2c_fpga_read(unsigned short cpld_addr, u8 reg);
+extern int board_i2c_fpga_write(unsigned short cpld_addr, u8 reg, u8 value);
+#endif
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_driver.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_driver.c
new file mode 100644
index 000000000000..1db3573c1c20
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_driver.c
@@ -0,0 +1,523 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * A pddf kernel driver module for a FAN controller 
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/dmi.h>
+#include <linux/kobject.h>
+#include "../../../../../pddf/i2c/modules/include/pddf_client_defs.h"
+#include "pddf_custom_fan_defs.h"
+#include "pddf_custom_fan_driver.h"
+#include "../../../../../pddf/i2c/modules/include/pddf_fan_api.h"
+
+#define DRVNAME "pddf_costom_fan"
+
+struct pddf_ops_t pddf_fan_ops = {
+	.pre_init = NULL,
+	.post_init = NULL,
+
+	.pre_probe = NULL,
+	.post_probe = pddf_fan_post_probe_default,
+
+	.pre_remove = NULL,
+	.post_remove = NULL,
+
+	.pre_exit = NULL,
+	.post_exit = NULL,
+};
+EXPORT_SYMBOL(pddf_fan_ops);
+
+
+
+FAN_SYSFS_ATTR_DATA data_fan1_present = {FAN1_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan1_present);
+FAN_SYSFS_ATTR_DATA data_fan2_present = {FAN2_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan2_present);
+FAN_SYSFS_ATTR_DATA data_fan3_present = {FAN3_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan3_present);
+FAN_SYSFS_ATTR_DATA data_fan4_present = {FAN4_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan4_present);
+FAN_SYSFS_ATTR_DATA data_fan5_present = {FAN5_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan5_present);
+FAN_SYSFS_ATTR_DATA data_fan6_present = {FAN6_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan6_present);
+FAN_SYSFS_ATTR_DATA data_fan7_present = {FAN7_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan7_present);
+FAN_SYSFS_ATTR_DATA data_fan8_present = {FAN8_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan8_present);
+FAN_SYSFS_ATTR_DATA data_fan9_present = {FAN9_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan9_present);
+FAN_SYSFS_ATTR_DATA data_fan10_present = {FAN10_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan10_present);
+FAN_SYSFS_ATTR_DATA data_fan11_present = {FAN11_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan11_present);
+FAN_SYSFS_ATTR_DATA data_fan12_present = {FAN12_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan12_present);
+FAN_SYSFS_ATTR_DATA data_fan13_present = {FAN13_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan13_present);
+FAN_SYSFS_ATTR_DATA data_fan14_present = {FAN14_PRESENT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_present_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan14_present);
+
+
+FAN_SYSFS_ATTR_DATA data_fan1_direction = {FAN1_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan1_direction);
+FAN_SYSFS_ATTR_DATA data_fan2_direction = {FAN2_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan2_direction);
+FAN_SYSFS_ATTR_DATA data_fan3_direction = {FAN3_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan3_direction);
+FAN_SYSFS_ATTR_DATA data_fan4_direction = {FAN4_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan4_direction);
+FAN_SYSFS_ATTR_DATA data_fan5_direction = {FAN5_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan5_direction);
+FAN_SYSFS_ATTR_DATA data_fan6_direction = {FAN6_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan6_direction);
+FAN_SYSFS_ATTR_DATA data_fan7_direction = {FAN7_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan7_direction);
+FAN_SYSFS_ATTR_DATA data_fan8_direction = {FAN8_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan8_direction);
+FAN_SYSFS_ATTR_DATA data_fan9_direction = {FAN9_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan9_direction);
+FAN_SYSFS_ATTR_DATA data_fan10_direction = {FAN10_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan10_direction);
+FAN_SYSFS_ATTR_DATA data_fan11_direction = {FAN11_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan11_direction);
+FAN_SYSFS_ATTR_DATA data_fan12_direction = {FAN12_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan12_direction);
+FAN_SYSFS_ATTR_DATA data_fan13_direction = {FAN13_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan13_direction);
+FAN_SYSFS_ATTR_DATA data_fan14_direction = {FAN14_DIRECTION, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_direction_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan14_direction);
+
+
+FAN_SYSFS_ATTR_DATA data_fan1_input = {FAN1_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan1_input);                                                                                                              
+FAN_SYSFS_ATTR_DATA data_fan2_input = {FAN2_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan2_input);                                                                                                              
+FAN_SYSFS_ATTR_DATA data_fan3_input = {FAN3_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan3_input);                                                                                                              
+FAN_SYSFS_ATTR_DATA data_fan4_input = {FAN4_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan4_input);                                                                                                              
+FAN_SYSFS_ATTR_DATA data_fan5_input = {FAN5_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan5_input);                                                                                                              
+FAN_SYSFS_ATTR_DATA data_fan6_input = {FAN6_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan6_input);
+FAN_SYSFS_ATTR_DATA data_fan7_input = {FAN7_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan7_input);             
+FAN_SYSFS_ATTR_DATA data_fan8_input = {FAN8_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan8_input);             
+FAN_SYSFS_ATTR_DATA data_fan9_input = {FAN9_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan9_input);             
+FAN_SYSFS_ATTR_DATA data_fan10_input = {FAN10_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan10_input);              
+FAN_SYSFS_ATTR_DATA data_fan11_input = {FAN11_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan11_input);             
+FAN_SYSFS_ATTR_DATA data_fan12_input = {FAN12_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan12_input);
+FAN_SYSFS_ATTR_DATA data_fan13_input = {FAN13_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan13_input);             
+FAN_SYSFS_ATTR_DATA data_fan14_input = {FAN14_INPUT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_rpm_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan14_input);
+
+FAN_SYSFS_ATTR_DATA data_fan1_pwm = {FAN1_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL};
+EXPORT_SYMBOL(data_fan1_pwm);             
+FAN_SYSFS_ATTR_DATA data_fan2_pwm = {FAN2_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL};
+EXPORT_SYMBOL(data_fan2_pwm);             
+FAN_SYSFS_ATTR_DATA data_fan3_pwm = {FAN3_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL};
+EXPORT_SYMBOL(data_fan3_pwm);             
+FAN_SYSFS_ATTR_DATA data_fan4_pwm = {FAN4_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL};
+EXPORT_SYMBOL(data_fan4_pwm);              
+FAN_SYSFS_ATTR_DATA data_fan5_pwm = {FAN5_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL};
+EXPORT_SYMBOL(data_fan5_pwm);             
+FAN_SYSFS_ATTR_DATA data_fan6_pwm = {FAN6_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL};
+EXPORT_SYMBOL(data_fan6_pwm);
+FAN_SYSFS_ATTR_DATA data_fan7_pwm = {FAN7_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL};
+EXPORT_SYMBOL(data_fan7_pwm);             
+FAN_SYSFS_ATTR_DATA data_fan8_pwm = {FAN8_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL};
+EXPORT_SYMBOL(data_fan8_pwm);             
+FAN_SYSFS_ATTR_DATA data_fan9_pwm = {FAN9_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL};
+EXPORT_SYMBOL(data_fan9_pwm);             
+FAN_SYSFS_ATTR_DATA data_fan10_pwm = {FAN10_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL};
+EXPORT_SYMBOL(data_fan10_pwm);              
+FAN_SYSFS_ATTR_DATA data_fan11_pwm = {FAN11_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL};
+EXPORT_SYMBOL(data_fan11_pwm);             
+FAN_SYSFS_ATTR_DATA data_fan12_pwm = {FAN12_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL};
+EXPORT_SYMBOL(data_fan12_pwm);
+FAN_SYSFS_ATTR_DATA data_fan13_pwm = {FAN13_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL};
+EXPORT_SYMBOL(data_fan13_pwm);             
+FAN_SYSFS_ATTR_DATA data_fan14_pwm = {FAN14_PWM, S_IRUGO | S_IWUSR, fan_show_default, NULL, sonic_i2c_get_fan_pwm_default, NULL, fan_store_default, NULL, sonic_i2c_set_fan_pwm_default, NULL, NULL};
+EXPORT_SYMBOL(data_fan14_pwm);
+
+
+FAN_SYSFS_ATTR_DATA data_fan1_fault = {FAN1_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan1_fault);
+FAN_SYSFS_ATTR_DATA data_fan2_fault = {FAN2_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan2_fault);
+FAN_SYSFS_ATTR_DATA data_fan3_fault = {FAN3_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan3_fault);
+FAN_SYSFS_ATTR_DATA data_fan4_fault = {FAN4_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan4_fault);
+FAN_SYSFS_ATTR_DATA data_fan5_fault = {FAN5_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan5_fault);
+FAN_SYSFS_ATTR_DATA data_fan6_fault = {FAN6_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan6_fault);
+FAN_SYSFS_ATTR_DATA data_fan7_fault = {FAN7_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan7_fault);
+FAN_SYSFS_ATTR_DATA data_fan8_fault = {FAN8_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan8_fault);
+FAN_SYSFS_ATTR_DATA data_fan9_fault = {FAN9_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan9_fault);
+FAN_SYSFS_ATTR_DATA data_fan10_fault = {FAN10_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan10_fault);
+FAN_SYSFS_ATTR_DATA data_fan11_fault = {FAN11_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan11_fault);
+FAN_SYSFS_ATTR_DATA data_fan12_fault = {FAN12_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan12_fault);
+FAN_SYSFS_ATTR_DATA data_fan13_fault = {FAN13_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan13_fault);
+FAN_SYSFS_ATTR_DATA data_fan14_fault = {FAN14_FAULT, S_IRUGO, fan_show_default, NULL, sonic_i2c_get_fan_fault_default, NULL, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(data_fan14_fault);
+
+
+FAN_SYSFS_ATTR_DATA_ENTRY fan_sysfs_attr_data_tbl[]=
+{
+	{ "fan1_present", &data_fan1_present},
+    { "fan2_present", &data_fan2_present},
+    { "fan3_present", &data_fan3_present},
+    { "fan4_present", &data_fan4_present},
+    { "fan5_present", &data_fan5_present},
+    { "fan6_present", &data_fan6_present},
+	{ "fan7_present", &data_fan7_present},
+    { "fan8_present", &data_fan8_present},
+    { "fan9_present", &data_fan9_present},
+    { "fan10_present", &data_fan10_present},
+    { "fan11_present", &data_fan11_present},
+    { "fan12_present", &data_fan12_present},
+    { "fan13_present", &data_fan13_present},
+    { "fan14_present", &data_fan14_present},
+	{ "fan1_direction", &data_fan1_direction},
+    { "fan2_direction", &data_fan2_direction},
+    { "fan3_direction", &data_fan3_direction},
+    { "fan4_direction", &data_fan4_direction},
+    { "fan5_direction", &data_fan5_direction},
+    { "fan6_direction", &data_fan6_direction},
+	{ "fan7_direction", &data_fan7_direction},
+    { "fan8_direction", &data_fan8_direction},
+    { "fan9_direction", &data_fan9_direction},
+    { "fan10_direction", &data_fan10_direction},
+    { "fan11_direction", &data_fan11_direction},
+    { "fan12_direction", &data_fan12_direction},
+    { "fan13_direction", &data_fan13_direction},
+    { "fan14_direction", &data_fan14_direction},
+	{ "fan1_input", &data_fan1_input},
+    { "fan2_input", &data_fan2_input},
+    { "fan3_input", &data_fan3_input},
+    { "fan4_input", &data_fan4_input},
+    { "fan5_input", &data_fan5_input},
+    { "fan6_input", &data_fan6_input},
+	{ "fan7_input", &data_fan7_input},
+    { "fan8_input", &data_fan8_input},
+    { "fan9_input", &data_fan9_input},
+    { "fan10_input", &data_fan10_input},
+    { "fan11_input", &data_fan11_input},
+    { "fan12_input", &data_fan12_input},
+    { "fan13_input", &data_fan13_input},
+    { "fan14_input", &data_fan14_input},
+	{ "fan1_pwm", &data_fan1_pwm},
+    { "fan2_pwm", &data_fan2_pwm},
+    { "fan3_pwm", &data_fan3_pwm},
+    { "fan4_pwm", &data_fan4_pwm},
+    { "fan5_pwm", &data_fan5_pwm},
+    { "fan6_pwm", &data_fan6_pwm},
+	{ "fan7_pwm", &data_fan7_pwm},
+    { "fan8_pwm", &data_fan8_pwm},
+    { "fan9_pwm", &data_fan9_pwm},
+    { "fan10_pwm", &data_fan10_pwm},
+    { "fan11_pwm", &data_fan11_pwm},
+    { "fan12_pwm", &data_fan12_pwm},
+    { "fan13_pwm", &data_fan13_pwm},
+    { "fan14_pwm", &data_fan14_pwm},
+	{ "fan1_fault", &data_fan1_fault},
+    { "fan2_fault", &data_fan2_fault},
+    { "fan3_fault", &data_fan3_fault},
+    { "fan4_fault", &data_fan4_fault},
+    { "fan5_fault", &data_fan5_fault},
+    { "fan6_fault", &data_fan6_fault},
+	{ "fan7_fault", &data_fan7_fault},
+    { "fan8_fault", &data_fan8_fault},
+    { "fan9_fault", &data_fan9_fault},
+    { "fan10_fault", &data_fan10_fault},
+    { "fan11_fault", &data_fan11_fault},
+    { "fan12_fault", &data_fan12_fault},
+    { "fan13_fault", &data_fan13_fault},
+    { "fan14_fault", &data_fan14_fault},
+};
+
+void *get_fan_access_data(char *name)
+{
+	int i=0;
+	for(i=0; i<(sizeof(fan_sysfs_attr_data_tbl)/sizeof(fan_sysfs_attr_data_tbl[0])); i++)
+	{
+		if(strcmp(name, fan_sysfs_attr_data_tbl[i].name) ==0)
+		{
+			return &fan_sysfs_attr_data_tbl[i];
+		}
+	}
+	return NULL;
+}
+EXPORT_SYMBOL(get_fan_access_data);
+
+
+
+static int pddf_fan_probe(struct i2c_client *client,
+            const struct i2c_device_id *dev_id)
+{
+    struct fan_data *data;
+    int status=0,i,num, j=0;
+	FAN_PDATA *fan_platform_data;
+    FAN_DATA_ATTR *data_attr;
+    FAN_SYSFS_ATTR_DATA_ENTRY *sysfs_data_entry;
+	char new_str[ATTR_NAME_LEN] = "";
+
+	if (client == NULL) {
+        printk("NULL Client.. \n");
+        goto exit;
+    }
+
+	if (pddf_fan_ops.pre_probe)
+	{
+		status = (pddf_fan_ops.pre_probe)(client, dev_id);
+		if (status != 0)
+			goto exit;
+	}
+
+    if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
+        status = -EIO;
+        goto exit;
+    }
+
+	/* Add support for a pre probe function */
+    data = kzalloc(sizeof(struct fan_data), GFP_KERNEL);
+    if (!data) {
+        status = -ENOMEM;
+        goto exit;
+    }
+
+    i2c_set_clientdata(client, data);
+    dev_info(&client->dev, "chip found\n");
+
+
+	/*Take control of the platform data*/
+	fan_platform_data = (FAN_PDATA *)(client->dev.platform_data);
+	num = fan_platform_data->len;
+	data->num_attr = num;
+
+	for (i=0;i<num;i++)
+	{
+		/*struct attribute *aptr = NULL;*/
+		struct sensor_device_attribute *dy_ptr = NULL;
+        data_attr = fan_platform_data->fan_attrs + i;
+		sysfs_data_entry = get_fan_access_data(data_attr->aname);
+		if (sysfs_data_entry == NULL)
+		{
+			printk(KERN_ERR "%s: Wrong attribute name provided by user '%s'\n", __FUNCTION__, data_attr->aname);
+			continue;
+		}
+			
+		dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL);
+        dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1];
+        strscpy((char *)dy_ptr->dev_attr.attr.name, data_attr->aname, ATTR_NAME_LEN);
+        dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode;
+        dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show;
+        dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store;
+        dy_ptr->index = sysfs_data_entry->a_ptr->index;
+
+        data->fan_attribute_list[i] = &dy_ptr->dev_attr.attr;
+        strscpy(data->attr_info[i].name, data_attr->aname, ATTR_NAME_LEN);
+        data->attr_info[i].valid = 0;
+		mutex_init(&data->attr_info[i].update_lock);
+
+		/*Create a duplicate entry*/
+		get_fan_duplicate_sysfs(dy_ptr->index, new_str);
+		if (strcmp(new_str,""))
+		{
+			dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL);
+			dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1];
+			strscpy((char *)dy_ptr->dev_attr.attr.name, new_str, ATTR_NAME_LEN);
+			dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode;
+			dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show;
+			dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store;
+			dy_ptr->index = sysfs_data_entry->a_ptr->index;
+
+			data->fan_attribute_list[num+j] = &dy_ptr->dev_attr.attr;
+			j++;
+			strscpy(new_str, "", ATTR_NAME_LEN);
+		}
+	}
+	data->fan_attribute_list[i+j] = NULL;
+	data->fan_attribute_group.attrs = data->fan_attribute_list;
+
+    /* Register sysfs hooks */
+    status = sysfs_create_group(&client->dev.kobj, &data->fan_attribute_group);
+    if (status) {
+        goto exit_free;
+    }
+
+    data->hwmon_dev = hwmon_device_register_with_info(&client->dev, client->name, NULL, NULL, NULL);
+    if (IS_ERR(data->hwmon_dev)) {
+        status = PTR_ERR(data->hwmon_dev);
+        goto exit_remove;
+    }
+
+    dev_info(&client->dev, "%s: fan '%s'\n",
+         dev_name(data->hwmon_dev), client->name);
+
+	/* Add a support for post probe function */
+	if (pddf_fan_ops.post_probe)
+	{
+		status = (pddf_fan_ops.post_probe)(client, dev_id);
+		if (status != 0)
+			goto exit_remove;
+	}
+
+	return 0;
+
+exit_remove:
+    sysfs_remove_group(&client->dev.kobj, &data->fan_attribute_group);
+exit_free:
+	/* Free all the allocated attributes */
+    for (i=0; data->fan_attribute_list[i]!=NULL; i++)
+    {
+        struct sensor_device_attribute *ptr = (struct sensor_device_attribute *)data->fan_attribute_list[i];
+        kfree(ptr);
+    }
+    pddf_dbg(FAN, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__);
+    kfree(data);
+exit:
+    return status;
+}
+
+static void pddf_fan_remove(struct i2c_client *client)
+{
+	int i = 0, ret = 0;
+	struct sensor_device_attribute *ptr = NULL;
+    struct fan_data *data = i2c_get_clientdata(client);
+	FAN_PDATA *platdata = (FAN_PDATA *)client->dev.platform_data;
+	FAN_DATA_ATTR *platdata_sub = platdata->fan_attrs;
+
+	if (pddf_fan_ops.pre_remove)
+	{
+		ret = (pddf_fan_ops.pre_remove)(client);
+		if (ret!=0)
+			printk(KERN_ERR "FAN pre_remove function failed\n");
+	}
+
+    hwmon_device_unregister(data->hwmon_dev);
+    sysfs_remove_group(&client->dev.kobj, &data->fan_attribute_group);
+    for (i=0; data->fan_attribute_list[i]!=NULL; i++)
+    {
+        ptr = (struct sensor_device_attribute *)data->fan_attribute_list[i];
+        kfree(ptr);
+    }
+    pddf_dbg(FAN, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__);
+    kfree(data);
+
+	if (platdata_sub) {
+		printk(KERN_DEBUG "%s: Freeing platform subdata\n", __FUNCTION__);
+		kfree(platdata_sub);
+	}
+	if (platdata) {
+		printk(KERN_DEBUG "%s: Freeing platform data\n", __FUNCTION__);
+		kfree(platdata);
+	}
+
+    if (pddf_fan_ops.post_remove)
+    {
+        ret = (pddf_fan_ops.post_remove)(client);
+        if (ret!=0)
+            printk(KERN_ERR "FAN post_remove function failed\n");
+    }
+}
+
+/* Addresses to scan */
+static const unsigned short normal_i2c[] = { I2C_CLIENT_END };
+
+static const struct i2c_device_id pddf_fan_id[] = {
+    { "fan_ctrl", 0 },
+    { "fan_cpld", 1 },
+    {}
+};
+MODULE_DEVICE_TABLE(i2c, pddf_fan_id);
+
+static struct i2c_driver pddf_fan_driver = {
+    .class        = I2C_CLASS_HWMON,
+    .driver = {
+        .name     = DRVNAME,
+    },
+    .probe        = pddf_fan_probe,
+    .remove       = pddf_fan_remove,
+    .id_table     = pddf_fan_id,
+    .address_list = normal_i2c,
+};
+
+static int __init pddf_fan_init(void)
+{
+	int status = 0;
+
+	if (pddf_fan_ops.pre_init)
+	{
+		status = (pddf_fan_ops.pre_init)();
+		if (status!=0)
+			return status;
+	}
+
+	status = i2c_add_driver(&pddf_fan_driver);
+	if (status!=0)
+		return status;
+
+	if (pddf_fan_ops.post_init)
+    {
+        status = (pddf_fan_ops.post_init)();
+        if (status!=0)
+            return status;
+    }
+	return status;
+
+}
+
+static void __exit pddf_fan_exit(void)
+{
+	if (pddf_fan_ops.pre_exit) (pddf_fan_ops.pre_exit)();
+    i2c_del_driver(&pddf_fan_driver);
+	if (pddf_fan_ops.post_exit) (pddf_fan_ops.post_exit)();
+}
+
+module_init(pddf_fan_init);
+module_exit(pddf_fan_exit);
+
+MODULE_AUTHOR("Broadcom, yajiang@celestica.com");
+MODULE_DESCRIPTION("pddf_fan driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_driver.h b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_driver.h
new file mode 100644
index 000000000000..7dc1a2931c3a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/pddf_custom_fan_driver.h
@@ -0,0 +1,117 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * Description
+ *  FAN driver related data structures
+ */
+#ifndef __PDDF_FAN_DRIVER_H__
+#define __PDDF_FAN_DRIVER_H__
+
+enum fan_sysfs_attributes {
+    FAN1_PRESENT,
+    FAN2_PRESENT,
+    FAN3_PRESENT,
+    FAN4_PRESENT,
+    FAN5_PRESENT,
+    FAN6_PRESENT,
+    FAN7_PRESENT,
+    FAN8_PRESENT,
+    FAN9_PRESENT,
+    FAN10_PRESENT,
+    FAN11_PRESENT,
+    FAN12_PRESENT,
+    FAN13_PRESENT,
+    FAN14_PRESENT,
+    FAN1_DIRECTION,
+    FAN2_DIRECTION,
+    FAN3_DIRECTION,
+    FAN4_DIRECTION,
+    FAN5_DIRECTION,
+    FAN6_DIRECTION,
+    FAN7_DIRECTION,
+    FAN8_DIRECTION,
+    FAN9_DIRECTION,
+    FAN10_DIRECTION,
+    FAN11_DIRECTION,
+    FAN12_DIRECTION,
+    FAN13_DIRECTION,
+    FAN14_DIRECTION,
+    FAN1_INPUT,
+    FAN2_INPUT,
+    FAN3_INPUT,
+    FAN4_INPUT,
+    FAN5_INPUT,
+    FAN6_INPUT,
+    FAN7_INPUT,
+    FAN8_INPUT,
+    FAN9_INPUT,
+    FAN10_INPUT,
+    FAN11_INPUT,
+    FAN12_INPUT,
+    FAN13_INPUT,
+    FAN14_INPUT,
+    FAN1_PWM,
+    FAN2_PWM,
+    FAN3_PWM,
+    FAN4_PWM,
+    FAN5_PWM,
+    FAN6_PWM,
+    FAN7_PWM,
+    FAN8_PWM,
+    FAN9_PWM,
+    FAN10_PWM,
+    FAN11_PWM,
+    FAN12_PWM,
+    FAN13_PWM,
+    FAN14_PWM,
+    FAN1_FAULT,
+    FAN2_FAULT,
+    FAN3_FAULT,
+    FAN4_FAULT,
+    FAN5_FAULT,
+    FAN6_FAULT,
+    FAN7_FAULT,
+    FAN8_FAULT,
+    FAN9_FAULT,
+    FAN10_FAULT,
+    FAN11_FAULT,
+    FAN12_FAULT,
+    FAN13_FAULT,
+    FAN14_FAULT,
+	FAN_MAX_ATTR 
+};
+/* Each client has this additional data */
+struct fan_attr_info {
+	char				name[ATTR_NAME_LEN];
+    struct mutex		update_lock;
+    char				valid;           /* != 0 if registers are valid */
+    unsigned long		last_updated;    /* In jiffies */
+	union {
+        char strval[STR_ATTR_SIZE];
+        int  intval;
+        u16  shortval;
+        u8   charval;
+    }val;
+};
+
+struct fan_data {
+    struct device			*hwmon_dev;
+	int						num_attr;
+	struct attribute		*fan_attribute_list[MAX_FAN_ATTRS];
+	struct attribute_group	fan_attribute_group;
+	struct fan_attr_info	attr_info[MAX_FAN_ATTRS];
+};
+
+#endif
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/readme.txt b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/readme.txt
new file mode 100644
index 000000000000..923733e858c0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/fan_driver/readme.txt
@@ -0,0 +1,4 @@
+5/23/2023: Added information about the seventh fan drawers
+           pddf_custom_fan_driver_module:Using
+           pddf_fan_driver_module:Abandoned
+    -yajiang@celestica.com
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/led_driver/pddf_custom_led_defs.h b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/led_driver/pddf_custom_led_defs.h
new file mode 100644
index 000000000000..e786e567d433
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/led_driver/pddf_custom_led_defs.h
@@ -0,0 +1,149 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * Description
+ *  Platform LED related defines and structures
+ */
+
+
+/*****************************************
+ *  kobj list 
+ *****************************************/
+
+struct kobject *platform_kobj=NULL;
+struct kobject *led_kobj=NULL;
+
+struct kobject *state_attr_kobj=NULL;
+struct kobject *cur_state_kobj=NULL;
+
+/*****************************************
+ * Static Data provided from user 
+ * space JSON data file
+ *****************************************/
+#define NAME_SIZE 32
+#define VALUE_SIZE 5
+typedef enum {
+    STATUS_LED_COLOR_OFF=0,
+    STATUS_LED_COLOR_GREEN=1,
+    STATUS_LED_COLOR_YELLOW=2,
+    STATUS_LED_COLOR_RED=3,
+    STATUS_LED_COLOR_BLUE=4,
+    STATUS_LED_COLOR_GREEN_BLINK=5,
+    STATUS_LED_COLOR_YELLOW_BLINK=6,
+    STATUS_LED_COLOR_RED_BLINK=7,
+    STATUS_LED_COLOR_BLUE_BLINK=8,
+    STATUS_LED_COLOR_AMBER,
+    STATUS_LED_COLOR_AMBER_BLINK,
+    MAX_LED_STATUS
+}LED_STATUS;
+
+char*  LED_STATUS_STR[] = {
+    "off",
+    "green",
+    "yellow",
+    "red",
+    "blue",
+    "green_blink",
+    "yellow_blink",
+    "red_blink",
+    "blue_blink",
+    "amber",
+    "amber_blink"
+};
+
+
+typedef struct 
+{
+    char bits[NAME_SIZE]; 
+    int pos; 
+    int mask_bits;
+}MASK_BITS;
+
+typedef struct
+{
+    int	swpld_addr;
+    int swpld_addr_offset;
+    MASK_BITS bits;
+    u8	 reg_values[VALUE_SIZE];
+    char value[NAME_SIZE];
+    char attr_devtype[NAME_SIZE];
+    char attr_devname[NAME_SIZE];
+} LED_DATA;
+
+typedef struct
+{
+    int state;
+    char color[NAME_SIZE]; 
+/* S3IP System LED RW sysfs */
+    int sys_led;
+    int bmc_led;
+    int fan_led;
+    int psu_led;
+    int loc_led;
+/* S3IP Power LED  RO sysfs */
+    int psu1_led;
+    int psu2_led;
+/* S3IP Fantray LED RO sysfs */
+    int fantray1_led;
+    int fantray2_led;
+    int fantray3_led;
+    int fantray4_led;
+    int fantray5_led;
+    int fantray6_led;
+    int fantray7_led;
+} CUR_STATE_DATA;
+
+typedef struct
+{
+    CUR_STATE_DATA cur_state;
+    char device_name[NAME_SIZE];
+    int index;
+    LED_DATA data[MAX_LED_STATUS];
+    int	swpld_addr;
+    int swpld_addr_offset;
+    char attr_devtype[NAME_SIZE];
+    char attr_devname[NAME_SIZE];
+} LED_OPS_DATA; 
+
+typedef enum{
+	LED_SYS,
+	LED_PSU,
+	LED_FAN,
+	LED_FANTRAY,
+	LED_DIAG,
+	LED_LOC,
+    LED_BMC,
+	LED_TYPE_MAX
+} LED_TYPE;
+char* LED_TYPE_STR[LED_TYPE_MAX] = 
+{
+	"LED_SYS",
+	"LED_PSU",
+	"LED_FAN",
+	"LED_FANTRAY",
+	"LED_DIAG",
+	"LED_LOC",
+    "LED_BMC"
+};
+
+/*****************************************
+ * Data exported from kernel for  
+ * user space plugin to get/set
+ *****************************************/
+#define PDDF_LED_DATA_ATTR( _prefix, _name, _mode, _show, _store, _type, _len, _addr)    \
+        struct pddf_data_attribute pddf_dev_##_prefix##_attr_##_name = { .dev_attr = __ATTR(_name, _mode, _show, _store),  \
+          .type = _type , \
+          .len = _len ,   \
+          .addr = _addr }
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/led_driver/pddf_custom_led_module.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/led_driver/pddf_custom_led_module.c
new file mode 100644
index 000000000000..8f0da48b4d98
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/led_driver/pddf_custom_led_module.c
@@ -0,0 +1,873 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * A pddf kernel module to manage various LEDs of a switch
+ */
+
+#define __STDC_WANT_LIB_EXT1__ 1
+#include <linux/kobject.h>
+#include <linux/string.h>
+#include <linux/sysfs.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/hwmon-sysfs.h>
+#include "pddf_custom_led_defs.h"
+#include "../../../../../pddf/i2c/modules/include/pddf_client_defs.h"
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/slab.h>
+
+#define DEBUG 0
+#define MAX_PSU_NUM 2
+#define MAX_FANTRAY_NUM 7
+LED_OPS_DATA sys_led_ops_data[1]={0};
+LED_OPS_DATA psu_led_ops_data[MAX_PSU_NUM]={0};
+LED_OPS_DATA diag_led_ops_data[1]= {0};
+LED_OPS_DATA fan_led_ops_data[1]= {0};
+LED_OPS_DATA loc_led_ops_data[1]= {0};
+LED_OPS_DATA bmc_led_ops_data[1]= {0};
+LED_OPS_DATA fantray_led_ops_data[MAX_FANTRAY_NUM]={0};
+LED_OPS_DATA temp_data={0};
+LED_OPS_DATA* dev_list[LED_TYPE_MAX] = {
+    sys_led_ops_data,
+    psu_led_ops_data,
+    fan_led_ops_data,
+    fantray_led_ops_data,
+    diag_led_ops_data,
+    loc_led_ops_data,
+    bmc_led_ops_data,
+    NULL
+};
+int num_psus = 0;
+int num_fantrays = 0;
+
+extern int board_i2c_cpld_read_new(unsigned short cpld_addr, char *name, u8 reg);
+extern int board_i2c_cpld_write_new(unsigned short cpld_addr, char *name, u8 reg, u8 value);
+extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
+extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
+extern int board_i2c_fpga_read(unsigned short cpld_addr, u8 reg);
+extern int board_i2c_fpga_write(unsigned short cpld_addr, u8 reg, u8 value);
+
+extern ssize_t show_pddf_data(struct device *dev, struct device_attribute *da, char *buf);
+extern ssize_t store_pddf_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count);
+extern ssize_t show_pddf_s3ip_data(struct device *dev, struct device_attribute *da, char *buf);
+extern ssize_t store_pddf_s3ip_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count);
+
+static LED_STATUS find_state_index(const char* state_str) {
+    int index;
+    char *ptr = (char *)state_str;
+    while (*ptr && *ptr!= '\n' && *ptr !='\0') ptr++;
+    *ptr='\0';
+    for ( index = 0; index < MAX_LED_STATUS; index++) {
+        if (strcmp(state_str, LED_STATUS_STR[index]) == 0 ) {
+            return index;
+        }
+    }
+    return MAX_LED_STATUS;
+}
+
+static LED_TYPE get_dev_type(char* name)
+{
+    LED_TYPE ret = LED_TYPE_MAX;
+    if(strcasecmp(name, "SYS_LED") == 0) {
+        ret = LED_SYS;
+    } else if(strcasecmp(name, "FAN_LED") == 0) {
+        ret = LED_FAN;
+    } else if(strstr(name, "PSU_LED")) {
+        ret = LED_PSU;
+    } else if(strcasecmp(name, "DIAG_LED") == 0) {
+        ret = LED_DIAG;
+    } else if(strcasecmp(name, "LOC_LED") == 0) {
+        ret = LED_LOC;
+    } else if(strstr(name, "FANTRAY_LED")) {
+        ret = LED_FANTRAY;
+    }
+#if DEBUG > 1
+    pddf_dbg(LED, KERN_INFO "LED get_dev_type: %s; %d\n", name, ret);
+#endif
+    return (ret);
+}
+static int dev_index_check(LED_TYPE type, int index)
+{
+#if DEBUG
+    pddf_dbg(LED, "dev_index_check: type:%s[%d] index:%d num_psus:%d num_fantrays:%d\n",
+        LED_TYPE_STR[type], type, index, num_psus, num_fantrays);
+#endif
+    switch(type)
+    {
+        case LED_PSU:
+            if(index >= MAX_PSU_NUM) return (-1);
+            break;
+        case LED_FANTRAY:
+            if(index >= MAX_FANTRAY_NUM) return (-1);
+            break;
+        default:
+            if(index >= 1) return (-1);
+            break;
+    }
+    return (0);
+}
+
+static LED_OPS_DATA* find_led_ops_data(struct device_attribute *da)
+{
+    struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da;
+    LED_OPS_DATA* ptr = (LED_OPS_DATA*)_ptr->addr;
+    LED_TYPE led_type;
+    if(!ptr || strlen(ptr->device_name) == 0 ) return (NULL);
+
+    if((led_type=get_dev_type(ptr->device_name)) == LED_TYPE_MAX) {
+        printk(KERN_ERR "PDDF_LED ERROR *%s Unsupported Led Type\n", __func__);
+        return (NULL);
+    }
+    if(dev_index_check(led_type, ptr->index) == -1) {
+        printk(KERN_ERR "PDDF_LED ERROR %s invalid index: %d for type:%s;%d\n", __func__, ptr->index, ptr->device_name, led_type);
+        return (NULL);
+    }
+#if DEBUG > 1
+    pddf_dbg(LED, "find_led_ops_data: name:%s; index=%d tempAddr:%p actualAddr:%p\n",
+        ptr->device_name, ptr->index, ptr, dev_list[led_type]+ptr->index);
+#endif
+    return (dev_list[led_type]+ptr->index);
+}
+
+static void print_led_data(LED_OPS_DATA *ptr, LED_STATUS state)
+{
+    int i = 0;
+    if(!ptr) return ;
+    pddf_dbg(LED, KERN_INFO "Print %s index:%d num_psus:%d num_fantrays:%d ADDR=%p\n",
+        ptr->device_name, ptr->index, num_psus, num_fantrays, ptr);
+    pddf_dbg(LED, KERN_INFO "\tindex: %d\n", ptr->index);
+    pddf_dbg(LED, KERN_INFO "\tdevtype/devname: %s:%s\n", ptr->attr_devtype, ptr->attr_devname);
+    pddf_dbg(LED, KERN_INFO  "\tcur_state: %d; %s \n", ptr->cur_state.state, ptr->cur_state.color);
+    for (i = 0; i< MAX_LED_STATUS; i++) {
+        if(ptr->data[i].swpld_addr && (i == state || state == -1)) {
+            pddf_dbg(LED, KERN_INFO "\t\t[%s]: addr/offset:0x%x;0x%x color:%s; value:[%s][0x%x][0x%x] mask_bits: 0x%x;"
+                    "pos:%d attr_devtype:%s attr_devname:%s\n",LED_STATUS_STR[i], ptr->data[i].swpld_addr,
+                    ptr->data[i].swpld_addr_offset, LED_STATUS_STR[i], ptr->data[i].value,
+                    ptr->data[i].reg_values[0], ptr->data[i].reg_values[1], ptr->data[i].bits.mask_bits,
+                    ptr->data[i].bits.pos, ptr->data[i].attr_devtype, ptr->data[i].attr_devname);
+        }
+    }
+}
+
+ssize_t get_status_led(struct device_attribute *da)
+{
+    int ret=0;
+    struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da;
+    LED_OPS_DATA* temp_data_ptr=(LED_OPS_DATA*)_ptr->addr;
+    LED_OPS_DATA* ops_ptr=find_led_ops_data(da);
+    uint32_t color_val=0, sys_val=0;
+    int state=0;
+    int cpld_type=0;
+    int j;
+
+    if (!ops_ptr) {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: Cannot find LED Ptr", __func__);
+        return (-1);
+    }
+
+    if (ops_ptr->swpld_addr == 0x0) {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: device: %s %d not configured\n", __func__,
+            temp_data_ptr->device_name, temp_data_ptr->index);
+        return (-1);
+    }
+
+    if (strcmp(ops_ptr->attr_devtype, "cpld") == 0) {
+        cpld_type = 1;
+        sys_val = board_i2c_cpld_read_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset);
+    } else if (strcmp(ops_ptr->attr_devtype, "fpgai2c") == 0) {
+        sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+    } else {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x not configured\n",__func__,
+            ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+        return (-1);
+    }
+
+    if (sys_val < 0) {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x read failed\n",__func__,
+            ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+        return sys_val;
+    }
+
+    strscpy(temp_data.cur_state.color, "None", NAME_SIZE);
+    for (state=0; state<MAX_LED_STATUS; state++) {
+        color_val = (sys_val & ~ops_ptr->data[state].bits.mask_bits);
+        for (j = 0; j < VALUE_SIZE && ops_ptr->data[state].reg_values[j] != 0xff; j++) {
+           if ((color_val ^ (ops_ptr->data[state].reg_values[j] << ops_ptr->data[state].bits.pos)) == 0) {
+                strscpy(temp_data.cur_state.color, LED_STATUS_STR[state], NAME_SIZE);
+                break;
+           }
+        }
+    }
+#if DEBUG
+    pddf_dbg(LED, KERN_ERR "Get : %s:%d addr/offset:0x%x; 0x%x devtype:%s;%s value=0x%x [%s]\n",
+        ops_ptr->device_name, ops_ptr->index, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset,
+        ops_ptr->attr_devtype, cpld_type? "cpld": "fpgai2c", sys_val, temp_data.cur_state.color);
+#endif
+    return(ret);
+}
+
+ssize_t set_status_led(struct device_attribute *da)
+{
+    int ret=0;
+    uint32_t sys_val=0, new_val=0, read_val=0;
+    LED_STATUS cur_state = MAX_LED_STATUS;
+    struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da;
+    LED_OPS_DATA* temp_data_ptr=(LED_OPS_DATA*)_ptr->addr;
+    LED_OPS_DATA* ops_ptr=find_led_ops_data(da);
+    char* _buf=temp_data_ptr->cur_state.color;
+    int cpld_type = 0;
+
+    if (!ops_ptr) {
+        pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s: Cannot find LED Ptr", __func__);
+        return (-1);
+    }
+
+    if (ops_ptr->swpld_addr == 0x0) {
+        pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s: device: %s %d not configured\n",
+            __func__, ops_ptr->device_name, ops_ptr->index);
+        return (-1);
+    }
+
+    pddf_dbg(LED, KERN_ERR "%s: Set [%s;%d] color[%s]\n", __func__,
+        temp_data_ptr->device_name, temp_data_ptr->index,
+        temp_data_ptr->cur_state.color);
+    cur_state = find_state_index(_buf);
+
+    if (cur_state == MAX_LED_STATUS) {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: not supported: %s\n", _buf, __func__);
+        return (-1);
+    }
+
+    if (ops_ptr->data[cur_state].swpld_addr != 0x0) {
+        if (strcmp(ops_ptr->data[cur_state].attr_devtype, "cpld") == 0) {
+            cpld_type = 1;
+            sys_val = board_i2c_cpld_read_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset);
+        } else if (strcmp(ops_ptr->data[cur_state].attr_devtype, "fpgai2c") == 0) {
+            sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+        } else {
+            pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s not configured\n",__func__,
+                ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype);
+            return (-1);
+        }
+
+        if (sys_val < 0){
+            return sys_val;
+        }
+
+        
+        new_val = (sys_val & ops_ptr->data[cur_state].bits.mask_bits) |
+                    (ops_ptr->data[cur_state].reg_values[0] << ops_ptr->data[cur_state].bits.pos);
+    } else {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s state %d; %s not configured\n",__func__,
+            ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, cur_state, _buf);
+        return (-1);
+    }
+
+    if (strcmp(ops_ptr->data[cur_state].attr_devtype, "cpld") == 0) {
+        ret = board_i2c_cpld_write_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset, new_val);
+        read_val = board_i2c_cpld_read_new(ops_ptr->swpld_addr, ops_ptr->attr_devname, ops_ptr->swpld_addr_offset);
+    } else if (strcmp(ops_ptr->data[cur_state].attr_devtype, "fpgai2c") == 0) {
+        ret = board_i2c_fpga_write(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, (uint8_t)new_val);
+        read_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+    } else {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s not configured\n",__func__,
+            ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype);
+        return (-1);
+    }
+
+#if DEBUG
+    pddf_dbg(LED, KERN_ERR "Set color:%s; 0x%x:0x%x sys_val:0x%x new_val:0x%x devtype:%s w_ret:0x%x read:0x%x devtype:%s\n",
+        LED_STATUS_STR[cur_state], ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, sys_val, new_val,
+        cpld_type? "cpld":"fpgai2c", ret, read_val, ops_ptr->data[cur_state].attr_devtype);
+#endif
+
+    return(ret);
+}
+
+
+ssize_t show_pddf_data(struct device *dev, struct device_attribute *da,
+             char *buf)
+{
+    int ret = 0;
+    struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da;
+    switch (ptr->type)
+    {
+        case PDDF_CHAR:
+            ret = sprintf(buf, "%s\n", ptr->addr);
+            break;
+        case PDDF_INT_DEC:
+            ret = sprintf(buf, "%d\n", *(int*)(ptr->addr));
+            break;
+        case PDDF_INT_HEX:
+            ret = sprintf(buf, "0x%x\n", *(int*)(ptr->addr));
+            break;
+        case PDDF_USHORT:
+            ret = sprintf(buf, "0x%x\n", *(unsigned short *)(ptr->addr));
+            break;
+        case PDDF_UINT32:
+            ret = sprintf(buf, "0x%x\n", *(uint32_t *)(ptr->addr));
+            break;
+        default:
+            break;
+    }
+#if DEBUG > 1
+    pddf_dbg(LED, "[ READ ] DATA ATTR PTR [%s] TYPE:%d, Value:[%s]\n",
+        ptr->dev_attr.attr.name, ptr->type, buf);
+#endif
+    return ret;
+}
+
+ssize_t store_pddf_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    int ret = 0, num = 0;
+    struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da;
+    switch (ptr->type)
+    {
+        case PDDF_CHAR:
+            memcpy(ptr->addr, buf, strlen(buf)-1); // to discard newline char form buf
+            ptr->addr[strlen(buf)-1] = '\0';
+#if DEBUG
+            pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_CHAR  VALUE:%s\n",
+                ptr->dev_attr.attr.name, ptr->addr);
+#endif
+            break;
+        case PDDF_INT_DEC:
+            ret = kstrtoint(buf,10,&num);
+            if (ret==0)
+                *(int *)(ptr->addr) = num;
+#if DEBUG
+            pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_DEC  VALUE:%d\n",
+                ptr->dev_attr.attr.name, *(int *)(ptr->addr));
+#endif
+            break;
+        case PDDF_INT_HEX:
+            ret = kstrtoint(buf,16,&num);
+            if (ret==0)
+                *(int *)(ptr->addr) = num;
+#if DEBUG
+            pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_HEX  VALUE:0x%x\n",
+                ptr->dev_attr.attr.name, *(int *)(ptr->addr));
+#endif
+            break;
+        case PDDF_USHORT:
+            ret = kstrtoint(buf,16,&num);
+            if (ret==0)
+                *(unsigned short *)(ptr->addr) = (unsigned short)num;
+#if DEBUG
+            pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_USHORT  VALUE:%x\n",
+                ptr->dev_attr.attr.name, *(unsigned short *)(ptr->addr));
+#endif
+            break;
+        case PDDF_UINT32:
+            ret = kstrtoint(buf,16,&num);
+            if (ret==0)
+                *(uint32_t *)(ptr->addr) = (uint32_t)num;
+#if DEBUG
+            pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR [%s] PDDF_UINT32 VALUE:%d\n",
+                ptr->dev_attr.attr.name, *(uint32_t *)(ptr->addr));
+#endif
+            break;
+        default:
+            break;
+    }
+    return count;
+}
+
+ssize_t show_pddf_s3ip_data(struct device *dev, struct device_attribute *da,
+             char *buf)
+{
+    int ret = 0;
+    pddf_dbg(LED, KERN_ERR " %s", __FUNCTION__);
+    struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da;
+    if (_ptr == NULL) {
+       pddf_dbg(LED, KERN_ERR "%s return", __FUNCTION__);
+       return -1;
+    }
+    LED_OPS_DATA* ops_ptr=(LED_OPS_DATA*)_ptr->addr;
+    uint32_t color_val=0, sys_val=0;
+    int state=0, j;
+    int cpld_type=0;
+    if (!ops_ptr) {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: Cannot find LED Ptr", __func__);
+        return (-1);
+    }
+    if (ops_ptr->swpld_addr == 0x0) {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: device: %s %d not configured\n", __func__,
+            ops_ptr->device_name, ops_ptr->index);
+        return (-1);
+    }
+    if ( strcmp(ops_ptr->attr_devtype, "cpld") == 0) {
+        cpld_type=1;
+        sys_val = board_i2c_cpld_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+    } else if ( strcmp(ops_ptr->attr_devtype, "fpgai2c") == 0) {
+        sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+    } else {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x not configured\n",__func__,
+            ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+        return (-1);
+    }
+
+    if (sys_val < 0) {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x read failed\n",__func__,
+            ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+        return sys_val;
+    }
+    for (state=0; state<MAX_LED_STATUS; state++) {
+        color_val = (sys_val & ~ops_ptr->data[state].bits.mask_bits);
+        for (j = 0; j < VALUE_SIZE && ops_ptr->data[state].reg_values[j] != 0xff; j++) {
+           if ((color_val ^ (ops_ptr->data[state].reg_values[j] << ops_ptr->data[state].bits.pos))==0) {
+                ret = sprintf(buf, "%d\n", state);
+                break;
+           }
+        }
+    }
+#if DEBUG
+    pddf_dbg(LED, KERN_ERR "Get : %s:%d addr/offset:0x%x; 0x%x devtype:%s;%s value=0x%x [%d]\n",
+        ops_ptr->device_name, ops_ptr->index, ops_ptr->swpld_addr,
+        ops_ptr->swpld_addr_offset, ops_ptr->attr_devtype, cpld_type? "cpld": "fpgai2c", sys_val, state);
+#endif
+    return ret;
+}
+
+ssize_t store_pddf_s3ip_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    int ret = 0;
+    int cur_state = 0;
+    uint32_t sys_val=0, new_val=0, read_val=0;
+    int cpld_type=0;
+
+    pddf_dbg(LED, KERN_ERR "%s: %s;%d", __FUNCTION__, buf, cur_state);
+    struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da;
+    ret = kstrtoint(buf,10,&cur_state);
+    if (_ptr == NULL || cur_state >= MAX_LED_STATUS || ret !=0) {
+       pddf_dbg(LED, KERN_ERR "%s return", __FUNCTION__);
+       return -1;
+    }
+    LED_OPS_DATA* ops_ptr=(LED_OPS_DATA*)_ptr->addr;
+
+    if ( strcmp(ops_ptr->attr_devtype, "cpld") == 0) {
+        cpld_type=1;
+        sys_val = board_i2c_cpld_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+    } else if ( strcmp(ops_ptr->attr_devtype, "fpgai2c") == 0) {
+        sys_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+    } else {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s 0x%x:0x%x not configured\n",__func__,
+            ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype, ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+        return (-1);
+    }
+
+    new_val = (sys_val & ops_ptr->data[cur_state].bits.mask_bits) |
+            (ops_ptr->data[cur_state].reg_values[0] << ops_ptr->data[cur_state].bits.pos);
+
+    if ( strcmp(ops_ptr->data[cur_state].attr_devtype, "cpld") == 0) {
+        ret = board_i2c_cpld_write(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, new_val);
+        read_val = board_i2c_cpld_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+    } else if ( strcmp(ops_ptr->data[cur_state].attr_devtype, "fpgai2c") == 0) {
+        ret = board_i2c_fpga_write(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset, (uint8_t)new_val);
+        read_val = board_i2c_fpga_read(ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset);
+    } else {
+        pddf_dbg(LED, KERN_ERR "ERROR %s: %s %d devtype:%s not configured\n",__func__,
+            ops_ptr->device_name, ops_ptr->index, ops_ptr->attr_devtype);
+        return (-1);
+    }
+
+#if DEBUG
+    pddf_dbg(LED, KERN_INFO "Set color:%s; 0x%x:0x%x sys_val:0x%x new_val:0x%x devtype:%s w_ret:0x%x read:0x%x devtype:%s\n",
+        LED_STATUS_STR[cur_state], ops_ptr->swpld_addr, ops_ptr->swpld_addr_offset,
+        sys_val, new_val, cpld_type? "cpld":"fpgai2c", ret, read_val, ops_ptr->data[cur_state].attr_devtype);
+#endif
+    return count;
+}
+
+
+static int load_led_ops_data(struct device_attribute *da, LED_STATUS state)
+{
+    struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da;
+    LED_OPS_DATA* ptr = (LED_OPS_DATA*)_ptr->addr;
+    LED_TYPE led_type;
+    LED_OPS_DATA* ops_ptr = NULL;
+    int i = 0;
+    char *token = NULL, *value_ptr = NULL;
+
+    if(!ptr || strlen(ptr->device_name)==0 ) {
+        pddf_dbg(LED, KERN_INFO "SYSTEM_LED: load_led_ops_data return -1 device_name:%s\n", ptr? ptr->device_name:"NULL");
+        return(-1);
+    }
+
+    if(ptr->device_name)
+    {
+        pddf_dbg(LED, KERN_INFO "[%s]: load_led_ops_data: index=%d addr=0x%x;0x%x devtype:%s devname=%s valu=%s\n",
+                ptr->device_name, ptr->index, ptr->swpld_addr, ptr->swpld_addr_offset, ptr->attr_devtype, ptr->attr_devname, ptr->data[0].value);
+    }
+    if((led_type=get_dev_type(ptr->device_name))==LED_TYPE_MAX) {
+        pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR *%s Unsupported Led Type\n", __func__);
+        return(-1);
+    }
+    if(dev_index_check(led_type, ptr->index)==-1) {
+        pddf_dbg(LED, KERN_ERR "PDDF_LED ERROR %s invalid index: %d for type:%d\n", __func__, ptr->index, led_type);
+        return(-1);
+    }
+    ops_ptr = dev_list[led_type]+ptr->index;
+
+    memcpy(ops_ptr->device_name, ptr->device_name, sizeof(ops_ptr->device_name));
+    ops_ptr->index = ptr->index;
+    memcpy(&ops_ptr->data[state], &ptr->data[0], sizeof(LED_DATA));
+    ops_ptr->data[state].swpld_addr = ptr->swpld_addr;
+    ops_ptr->data[state].swpld_addr_offset = ptr->swpld_addr_offset;
+    ops_ptr->swpld_addr = ptr->swpld_addr;
+    ops_ptr->swpld_addr_offset = ptr->swpld_addr_offset;
+    memcpy(ops_ptr->data[state].attr_devtype, ptr->attr_devtype, sizeof(ops_ptr->data[state].attr_devtype));
+    memcpy(ops_ptr->data[state].attr_devname, ptr->attr_devname, sizeof(ops_ptr->data[state].attr_devname));
+    memcpy(ops_ptr->attr_devtype, ptr->attr_devtype, sizeof(ops_ptr->attr_devtype));
+    memcpy(ops_ptr->attr_devname, ptr->attr_devname, sizeof(ops_ptr->attr_devname));
+#ifdef __STDC_LIB_EXT1__
+    memset_s(ops_ptr->data[state].reg_values, sizeof(ops_ptr->data[state].reg_values), 0xff, sizeof(ops_ptr->data[state].reg_values));
+#else
+    memset(ops_ptr->data[state].reg_values, 0xff, sizeof(ops_ptr->data[state].reg_values));
+#endif
+    value_ptr = kzalloc(sizeof(ops_ptr->data[state].value), GFP_KERNEL);
+    if (value_ptr) {
+       memcpy(value_ptr, ops_ptr->data[state].value, sizeof(ops_ptr->data[state].value));
+       while((token = strsep((char**)&value_ptr,";")) != NULL  && i < VALUE_SIZE) {
+          if (kstrtou8(token, 16, &ops_ptr->data[state].reg_values[i])) {
+                pddf_dbg(LED, KERN_ERR "load_led_ops_data: [%s] conversion error\n", token);
+           }
+           i++;
+       }
+       kfree(value_ptr);
+    }
+
+    print_led_data(dev_list[led_type]+ptr->index, state);
+
+    memset(ptr, 0, sizeof(LED_OPS_DATA));
+    return (0);
+}
+
+static int show_led_ops_data(struct device_attribute *da)
+{
+    LED_OPS_DATA* ops_ptr = find_led_ops_data(da);
+    print_led_data(ops_ptr, -1);
+    return(0);
+}
+
+static int verify_led_ops_data(struct device_attribute *da)
+{
+    struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da;
+    LED_OPS_DATA* ptr=(LED_OPS_DATA*)_ptr->addr;
+    LED_OPS_DATA* ops_ptr=find_led_ops_data(da);
+
+    if(ops_ptr)
+        memcpy(ptr, ops_ptr, sizeof(LED_OPS_DATA));
+    else
+    {
+        pddf_dbg(LED, "SYSTEM_LED: verify_led_ops_data: Failed to find ops_ptr name:%s; index=%d\n", ptr->device_name, ptr->index);
+    }
+    return (0);
+}
+
+
+ssize_t dev_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+#if DEBUG
+    pddf_dbg(LED, KERN_INFO "dev_operation [%s]\n", buf);
+#endif
+    if(strncmp(buf, "show", strlen("show")) == 0) {
+        show_led_ops_data(da);
+    }
+    else if(strncmp(buf, "verify", strlen("verify")) == 0) {
+        verify_led_ops_data(da);
+    }
+    else if(strncmp(buf, "get_status", strlen("get_status")) == 0) {
+        get_status_led(da);
+    }
+    else if(strncmp(buf, "set_status", strlen("set_status")) == 0) {
+        set_status_led(da);
+    }
+    else {
+        LED_STATUS index = find_state_index(buf);
+        if (index < MAX_LED_STATUS) {
+            load_led_ops_data(da, index);
+        } else {
+            printk(KERN_ERR "PDDF_ERROR: %s: Invalid value for dev_ops %s\n", __FUNCTION__, buf);
+        }
+    }
+    return (count);
+}
+
+ssize_t store_config_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    int ret, num;
+    struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da;
+    if(strncmp(ptr->dev_attr.attr.name, "num_psus", strlen("num_psus")) == 0) {
+        ret = kstrtoint(buf,10,&num);
+        if (ret==0)
+            *(int *)(ptr->addr) = num;
+#if DEBUG
+        pddf_dbg(LED, "[ WRITE ] ATTR CONFIG [%s] VALUE:%d; %d\n",
+                ptr->dev_attr.attr.name, num, num_psus);
+#endif
+        return(count);
+    }
+    if (strncmp(ptr->dev_attr.attr.name, "num_fantrays", strlen("num_fantrays")) ==0) {
+       ret = kstrtoint(buf, 10, &num);
+       if (ret == 0)
+          *(int *)(ptr->addr) = num;
+#if DEBUG
+        pddf_dbg(LED, "[ WRITE ] ATTR CONFIG [%s] VALUE:%d; %d\n",
+            ptr->dev_attr.attr.name, num, num_fantrays);
+#endif
+        return (count);
+    }
+    return (count);
+}
+
+ssize_t store_bits_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    int len = 0, num1 = 0, num2 = 0, i=0, rc1=0, rc2=0;
+    char mask=0xFF;
+    char *pptr=NULL;
+    char bits[NAME_SIZE];
+    struct pddf_data_attribute *ptr = (struct pddf_data_attribute *)da;
+    MASK_BITS* bits_ptr=(MASK_BITS*)(ptr->addr);
+    memcpy(bits_ptr->bits, buf, strlen(buf)-1); // to discard newline char form buf
+    bits_ptr->bits[strlen(buf)-1] = '\0';
+    if((pptr=strstr(buf,":")) != NULL) {
+        len = pptr-buf;
+        sprintf(bits, buf);
+        bits[len] = '\0';
+        rc1 = kstrtoint(bits, 16, &num1);
+        if (rc1 == 0)
+        {
+            sprintf(bits, ++pptr);
+            rc2 = kstrtoint(bits, 16, &num2);
+            if (rc2 == 0)
+            {
+                for (i=num2; i<=num1; i++) {
+                   mask &= ~(1 << i);
+                }
+                bits_ptr->mask_bits = mask;
+                bits_ptr->pos = num2;
+            }
+        }
+    } else {
+        rc1 = kstrtoint(buf, 16, &num1);
+        if (rc1 == 0)
+        {
+            bits_ptr->mask_bits = mask & ~(1 << num1);
+            bits_ptr->pos = num1;
+        }
+    }
+#if DEBUG
+        pddf_dbg(LED, KERN_ERR "[ WRITE ] ATTR PTR Bits [%s] VALUE:%s mask:0x%x; pos:0x%x\n",
+            ptr->dev_attr.attr.name, bits_ptr->bits, bits_ptr->mask_bits, bits_ptr->pos);
+#endif
+    return (count);
+}
+
+/**************************************************************************
+ * platform/ attributes
+ **************************************************************************/
+PDDF_LED_DATA_ATTR(platform, num_psus, S_IWUSR|S_IRUGO, show_pddf_data,
+        store_config_data, PDDF_INT_DEC, sizeof(int), (void*)&num_psus);
+PDDF_LED_DATA_ATTR(platform, num_fantrays, S_IWUSR|S_IRUGO, show_pddf_data,
+        store_config_data, PDDF_INT_DEC, sizeof(int), (void*)&num_fantrays);
+
+struct attribute* attrs_platform[]={
+    &pddf_dev_platform_attr_num_psus.dev_attr.attr,
+    &pddf_dev_platform_attr_num_fantrays.dev_attr.attr,
+    NULL,
+};
+struct attribute_group attr_group_platform={
+    .attrs = attrs_platform,
+};
+
+/**************************************************************************
+ * led/ attributes
+ **************************************************************************/
+PDDF_LED_DATA_ATTR(dev, device_name, S_IWUSR|S_IRUGO, show_pddf_data,
+            store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.device_name);
+PDDF_LED_DATA_ATTR(dev, attr_devtype, S_IWUSR|S_IRUGO, show_pddf_data,
+            store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.attr_devtype);
+PDDF_LED_DATA_ATTR(dev, attr_devname, S_IWUSR|S_IRUGO, show_pddf_data,
+            store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.attr_devname);
+PDDF_LED_DATA_ATTR(dev, index, S_IWUSR|S_IRUGO, show_pddf_data,
+            store_pddf_data, PDDF_INT_DEC, sizeof(int), (void*)&temp_data.index);
+PDDF_LED_DATA_ATTR(dev, swpld_addr, S_IWUSR|S_IRUGO, show_pddf_data,
+            store_pddf_data, PDDF_INT_HEX, sizeof(int), (void*)&temp_data.swpld_addr);
+PDDF_LED_DATA_ATTR(dev, swpld_addr_offset, S_IWUSR|S_IRUGO, show_pddf_data,
+            store_pddf_data, PDDF_INT_HEX, sizeof(int), (void*)&temp_data.swpld_addr_offset);
+PDDF_LED_DATA_ATTR(dev, dev_ops , S_IWUSR, NULL,
+            dev_operation, PDDF_CHAR, NAME_SIZE, (void*)&temp_data);
+
+struct attribute* attrs_dev[] = {
+    &pddf_dev_dev_attr_device_name.dev_attr.attr,
+    &pddf_dev_dev_attr_attr_devtype.dev_attr.attr,
+    &pddf_dev_dev_attr_attr_devname.dev_attr.attr,
+    &pddf_dev_dev_attr_index.dev_attr.attr,
+    &pddf_dev_dev_attr_swpld_addr.dev_attr.attr,
+    &pddf_dev_dev_attr_swpld_addr_offset.dev_attr.attr,
+    &pddf_dev_dev_attr_dev_ops.dev_attr.attr,
+    NULL,
+};
+
+struct attribute_group attr_group_dev = {
+    .attrs = attrs_dev,
+};
+
+/**************************************************************************
+ * state_attr/ attributes
+ **************************************************************************/
+#define LED_DEV_STATE_ATTR_GROUP(name, func) \
+    PDDF_LED_DATA_ATTR(name, bits, S_IWUSR|S_IRUGO, show_pddf_data, \
+        store_bits_data, PDDF_CHAR, NAME_SIZE, func.bits.bits); \
+    PDDF_LED_DATA_ATTR(name, value, S_IWUSR|S_IRUGO, show_pddf_data, \
+        store_pddf_data, PDDF_CHAR, NAME_SIZE, func.value); \
+    struct attribute* attrs_##name[]={ \
+        &pddf_dev_##name##_attr_bits.dev_attr.attr, \
+            &pddf_dev_##name##_attr_value.dev_attr.attr, \
+            NULL, \
+    }; \
+    struct attribute_group attr_group_##name={ \
+            .attrs = attrs_##name, \
+    }; \
+
+
+LED_DEV_STATE_ATTR_GROUP(state_attr, (void*)&temp_data.data[0])
+
+/**************************************************************************
+ * cur_state/ attributes
+ **************************************************************************/
+PDDF_LED_DATA_ATTR(cur_state, color, S_IWUSR|S_IRUGO, show_pddf_data,
+        store_pddf_data, PDDF_CHAR, NAME_SIZE, (void*)&temp_data.cur_state.color);
+PDDF_LED_DATA_ATTR(cur_state, sys_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void*)&sys_led_ops_data);
+PDDF_LED_DATA_ATTR(cur_state, loc_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, NAME_SIZE, (void*)&loc_led_ops_data);
+PDDF_LED_DATA_ATTR(cur_state, bmc_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void*)&bmc_led_ops_data);
+PDDF_LED_DATA_ATTR(cur_state, fan_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void*)&fan_led_ops_data);
+PDDF_LED_DATA_ATTR(cur_state, psu_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), NULL);
+PDDF_LED_DATA_ATTR(cur_state, psu1_led, S_IRUGO, show_pddf_s3ip_data,
+            NULL, PDDF_INT_DEC, sizeof(int), (void *)&psu_led_ops_data[0]);
+PDDF_LED_DATA_ATTR(cur_state, psu2_led, S_IRUGO, show_pddf_s3ip_data,
+            NULL, PDDF_INT_DEC, sizeof(int), (void *)&psu_led_ops_data[1]);
+PDDF_LED_DATA_ATTR(cur_state, fantray1_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[0]);
+PDDF_LED_DATA_ATTR(cur_state, fantray2_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[1]);
+PDDF_LED_DATA_ATTR(cur_state, fantray3_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[2]);
+PDDF_LED_DATA_ATTR(cur_state, fantray4_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[3]);
+PDDF_LED_DATA_ATTR(cur_state, fantray5_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[4]);
+PDDF_LED_DATA_ATTR(cur_state, fantray6_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[5]);
+PDDF_LED_DATA_ATTR(cur_state, fantray7_led, S_IWUSR|S_IRUGO, show_pddf_s3ip_data,
+            store_pddf_s3ip_data, PDDF_INT_DEC, sizeof(int), (void *)&fantray_led_ops_data[6]);
+
+
+struct attribute* attrs_cur_state[] = {
+    &pddf_dev_cur_state_attr_color.dev_attr.attr,
+    &pddf_dev_cur_state_attr_sys_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_loc_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_bmc_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_fan_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_psu_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_psu1_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_psu2_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_fantray1_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_fantray2_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_fantray3_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_fantray4_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_fantray5_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_fantray6_led.dev_attr.attr,
+    &pddf_dev_cur_state_attr_fantray7_led.dev_attr.attr,
+    NULL,
+};
+
+struct attribute_group attr_group_cur_state={
+    .attrs = attrs_cur_state,
+};
+
+/*************************************************************************/
+#define KOBJ_FREE(obj) \
+    if(obj) kobject_put(obj); \
+
+void free_kobjs(void)
+{
+    KOBJ_FREE(cur_state_kobj)
+    KOBJ_FREE(state_attr_kobj)
+    KOBJ_FREE(led_kobj)
+    KOBJ_FREE(platform_kobj)
+}
+
+int KBOJ_CREATE(char* name, struct kobject* parent, struct kobject** child)
+{
+    if (parent) {
+        *child = kobject_create_and_add(name, parent);
+    } else {
+        printk(KERN_ERR "PDDF_LED ERROR to create %s kobj; null parent\n", name);
+        free_kobjs();
+        return (-ENOMEM);
+    }
+    return (0);
+}
+
+int LED_DEV_ATTR_CREATE(struct kobject *kobj, const struct attribute_group *attr, const char* name)
+{
+    int status = sysfs_create_group(kobj, attr);
+    if(status) {
+        pddf_dbg(LED, KERN_ERR "Driver ERROR: sysfs_create %s failed rc=%d\n", name, status);
+    }
+    return (status);
+}
+
+
+static int __init led_init(void) {
+    struct kobject *device_kobj;
+    pddf_dbg(LED, KERN_INFO "PDDF GENERIC LED MODULE init..\n");
+
+    device_kobj = get_device_i2c_kobj();
+    if(!device_kobj)
+        return -ENOMEM;
+
+    KBOJ_CREATE("platform", device_kobj, &platform_kobj);
+    KBOJ_CREATE("led", device_kobj, &led_kobj);
+    KBOJ_CREATE("state_attr", led_kobj, &state_attr_kobj);
+    KBOJ_CREATE("cur_state", led_kobj, &cur_state_kobj);
+
+    LED_DEV_ATTR_CREATE(platform_kobj, &attr_group_platform, "attr_group_platform");
+    LED_DEV_ATTR_CREATE(led_kobj, &attr_group_dev, "attr_group_dev");
+    LED_DEV_ATTR_CREATE(state_attr_kobj, &attr_group_state_attr, "attr_group_state_attr");
+    LED_DEV_ATTR_CREATE(cur_state_kobj, &attr_group_cur_state, "attr_group_cur_state");
+    return (0);
+}
+
+
+static void __exit led_exit(void) {
+    pddf_dbg(LED, "PDDF GENERIC LED MODULE exit..\n");
+    free_kobjs();
+}
+
+module_init(led_init);
+module_exit(led_exit);
+
+MODULE_AUTHOR("Broadcom");
+MODULE_DESCRIPTION("led driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_fpga_algo.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_fpga_algo.c
new file mode 100644
index 000000000000..2c93c36f3f42
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_fpga_algo.c
@@ -0,0 +1,634 @@
+/*
+*
+* Licensed under the GNU General Public License Version 2
+*
+* This program is free software; you can redistribute it and/or modify
+* it under the terms of the GNU General Public License as published by
+* the Free Software Foundation; either version 2 of the License, or
+* (at your option) any later version.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+* GNU General Public License for more details.
+*
+*/
+
+/*
+* pddf_xilinx_device_7021_algo.c
+* Description:
+*   A sample i2c driver algorithms for Xilinx Corporation Device 7021 FPGA adapters
+*
+*********************************************************************************/
+#define __STDC_WANT_LIB_EXT1__ 1
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/delay.h>
+#include <linux/jiffies.h>
+#include <linux/errno.h>
+#include <linux/i2c.h>
+#include "../../../../pddf/i2c/modules/include/pddf_i2c_algo.h"
+
+#define DEBUG 0
+
+enum {
+    STATE_DONE = 0,
+    STATE_INIT,
+    STATE_ADDR,
+    STATE_ADDR10,
+    STATE_START,
+    STATE_WRITE,
+    STATE_READ,
+    STATE_STOP,
+    STATE_ERROR,
+};
+
+#define XIIC_MSB_OFFSET 0
+#define XIIC_REG_OFFSET (0x100 + XIIC_MSB_OFFSET)
+
+/*
+ * Register offsets in bytes from RegisterBase. Three is added to the
+ * base offset to access LSB (IBM style) of the word
+ */
+#define XIIC_CR_REG_OFFSET   (0x00 + XIIC_REG_OFFSET)	/* Control Register   */
+#define XIIC_SR_REG_OFFSET   (0x04 + XIIC_REG_OFFSET)	/* Status Register    */
+#define XIIC_DTR_REG_OFFSET  (0x08 + XIIC_REG_OFFSET)	/* Data Tx Register   */
+#define XIIC_DRR_REG_OFFSET  (0x0C + XIIC_REG_OFFSET)	/* Data Rx Register   */
+#define XIIC_ADR_REG_OFFSET  (0x10 + XIIC_REG_OFFSET)	/* Address Register   */
+#define XIIC_TFO_REG_OFFSET  (0x14 + XIIC_REG_OFFSET)	/* Tx FIFO Occupancy  */
+#define XIIC_RFO_REG_OFFSET  (0x18 + XIIC_REG_OFFSET)	/* Rx FIFO Occupancy  */
+#define XIIC_TBA_REG_OFFSET  (0x1C + XIIC_REG_OFFSET)	/* 10 Bit Address reg */
+#define XIIC_RFD_REG_OFFSET  (0x20 + XIIC_REG_OFFSET)	/* Rx FIFO Depth reg  */
+#define XIIC_GPO_REG_OFFSET  (0x24 + XIIC_REG_OFFSET)	/* Output Register    */
+
+/* Control Register masks */
+#define XIIC_CR_ENABLE_DEVICE_MASK        0x01	/* Device enable = 1      */
+#define XIIC_CR_TX_FIFO_RESET_MASK        0x02	/* Transmit FIFO reset=1  */
+#define XIIC_CR_MSMS_MASK                 0x04	/* Master starts Txing=1  */
+#define XIIC_CR_DIR_IS_TX_MASK            0x08	/* Dir of tx. Txing=1     */
+#define XIIC_CR_NO_ACK_MASK               0x10	/* Tx Ack. NO ack = 1     */
+#define XIIC_CR_REPEATED_START_MASK       0x20	/* Repeated start = 1     */
+#define XIIC_CR_GENERAL_CALL_MASK         0x40	/* Gen Call enabled = 1   */
+
+/* Status Register masks */
+#define XIIC_SR_GEN_CALL_MASK             0x01	/* 1=a mstr issued a GC   */
+#define XIIC_SR_ADDR_AS_SLAVE_MASK        0x02	/* 1=when addr as slave   */
+#define XIIC_SR_BUS_BUSY_MASK             0x04	/* 1 = bus is busy        */
+#define XIIC_SR_MSTR_RDING_SLAVE_MASK     0x08	/* 1=Dir: mstr <-- slave  */
+#define XIIC_SR_TX_FIFO_FULL_MASK         0x10	/* 1 = Tx FIFO full       */
+#define XIIC_SR_RX_FIFO_FULL_MASK         0x20	/* 1 = Rx FIFO full       */
+#define XIIC_SR_RX_FIFO_EMPTY_MASK        0x40	/* 1 = Rx FIFO empty      */
+#define XIIC_SR_TX_FIFO_EMPTY_MASK        0x80	/* 1 = Tx FIFO empty      */
+
+/* Interrupt Status Register masks    Interrupt occurs when...       */
+#define XIIC_INTR_ARB_LOST_MASK           0x01	/* 1 = arbitration lost   */
+#define XIIC_INTR_TX_ERROR_MASK           0x02	/* 1=Tx error/msg complete */
+#define XIIC_INTR_TX_EMPTY_MASK           0x04	/* 1 = Tx FIFO/reg empty  */
+#define XIIC_INTR_RX_FULL_MASK            0x08	/* 1=Rx FIFO/reg=OCY level */
+#define XIIC_INTR_BNB_MASK                0x10	/* 1 = Bus not busy       */
+#define XIIC_INTR_AAS_MASK                0x20	/* 1 = when addr as slave */
+#define XIIC_INTR_NAAS_MASK               0x40	/* 1 = not addr as slave  */
+#define XIIC_INTR_TX_HALF_MASK            0x80	/* 1 = TX FIFO half empty */
+
+/* The following constants specify the depth of the FIFOs */
+#define IIC_RX_FIFO_DEPTH         16	/* Rx fifo capacity               */
+#define IIC_TX_FIFO_DEPTH         16	/* Tx fifo capacity               */
+
+/*
+ * Tx Fifo upper bit masks.
+ */
+#define XIIC_TX_DYN_START_MASK            0x0100 /* 1 = Set dynamic start */
+#define XIIC_TX_DYN_STOP_MASK             0x0200 /* 1 = Set dynamic stop */
+
+/*
+ * The following constants define the register offsets for the Interrupt
+ * registers. There are some holes in the memory map for reserved addresses
+ * to allow other registers to be added and still match the memory map of the
+ * interrupt controller registers
+ */
+#define XIIC_IISR_OFFSET     0x20 /* Interrupt Status Register */
+#define XIIC_RESETR_OFFSET   0x40 /* Reset Register */
+
+#define XIIC_RESET_MASK             0xAUL
+
+#define XIIC_PM_TIMEOUT		1000	/* ms */
+/* timeout waiting for the controller to respond */
+#define XIIC_I2C_TIMEOUT	(msecs_to_jiffies(1000))
+
+struct fpgalogic_i2c {
+    void __iomem *base;
+    u32 reg_shift;
+    u32 reg_io_width;
+    wait_queue_head_t wait;
+    struct i2c_msg *msg;
+    int pos;
+    int nmsgs;
+    int state; /* see STATE_ */
+    int ip_clock_khz;
+    int bus_clock_khz;
+    void (*reg_set)(struct fpgalogic_i2c *i2c, int reg, u8 value);
+    u8 (*reg_get)(struct fpgalogic_i2c *i2c, int reg);
+    u32 timeout;
+    struct mutex lock;
+};
+static struct fpgalogic_i2c fpgalogic_i2c[I2C_PCI_MAX_BUS];
+extern void __iomem * fpga_ctl_addr;
+extern int (*ptr_fpgapci_read)(uint32_t);
+extern int (*ptr_fpgapci_write)(uint32_t, uint32_t);
+extern int (*pddf_i2c_pci_add_numbered_bus)(struct i2c_adapter *, int);
+static int xiic_reinit(struct fpgalogic_i2c *i2c);
+
+void i2c_get_mutex(struct fpgalogic_i2c *i2c)
+{
+    mutex_lock(&i2c->lock);
+}
+
+/**
+ * i2c_release_mutex - release mutex
+ */
+void i2c_release_mutex(struct fpgalogic_i2c *i2c)
+{
+    mutex_unlock(&i2c->lock);
+}
+
+static inline void xiic_setreg32(struct fpgalogic_i2c *i2c, int reg, int value)
+{
+	(void)iowrite32(value, i2c->base + reg);
+}
+
+static inline int xiic_getreg32(struct fpgalogic_i2c *i2c, int reg)
+{
+	u32 ret;
+
+	ret = ioread32(i2c->base + reg);
+	
+	return ret;
+}
+
+static inline void xiic_irq_clr(struct fpgalogic_i2c *i2c, u32 mask)
+{
+	u32 isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET);
+
+	xiic_setreg32(i2c, XIIC_IISR_OFFSET, isr & mask);
+}
+
+static int xiic_clear_rx_fifo(struct fpgalogic_i2c *i2c)
+{
+	u8 sr;
+	unsigned long timeout;
+
+	timeout = jiffies + XIIC_I2C_TIMEOUT;
+	for (sr = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET);
+		!(sr & XIIC_SR_RX_FIFO_EMPTY_MASK);
+		sr = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET)) {
+		xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET);
+		if (time_after(jiffies, timeout)) {
+			printk("Failed to clear rx fifo\n");
+			return -ETIMEDOUT;
+		}
+	}
+
+	return 0;
+}
+
+/**
+ * Wait until something change in a given register
+ * @i2c: ocores I2C device instance
+ * @reg: register to query
+ * @mask: bitmask to apply on register value
+ * @val: expected result
+ * @timeout: timeout in jiffies
+ *
+ * Timeout is necessary to avoid to stay here forever when the chip
+ * does not answer correctly.
+ *
+ * Return: 0 on success, -ETIMEDOUT on timeout
+ */
+static int poll_wait(struct fpgalogic_i2c *i2c,
+		       int reg, u8 mask, u8 val,
+		       const unsigned long timeout)
+{
+	unsigned long j;
+	u8 status = 0;
+
+	j = jiffies + timeout;
+	while (1) {
+		mutex_lock(&i2c->lock);
+		status = xiic_getreg32(i2c, reg);
+		mutex_unlock(&i2c->lock);
+		if ((status & mask) == val)
+			break;
+		if (time_after(jiffies, j))
+			return -ETIMEDOUT;
+                cpu_relax();
+                cond_resched();		
+	}
+	return 0;
+}
+
+/**
+ * Wait until is possible to process some data
+ * @i2c: ocores I2C device instance
+ *
+ * Used when the device is in polling mode (interrupts disabled).
+ *
+ * Return: 0 on success, -ETIMEDOUT on timeout
+ */
+static int ocores_poll_wait(struct fpgalogic_i2c *i2c)
+{
+	u8 mask = 0, status = 0;
+	int err = 0;
+	int val = 0;
+	int tmp = 0;
+	mutex_lock(&i2c->lock);
+	if (i2c->state == STATE_DONE) {
+		/* transfer is over */
+		mask = XIIC_SR_BUS_BUSY_MASK;
+	} else if (i2c->state == STATE_WRITE || i2c->state == STATE_START){
+		/* on going transfer */
+		if (0 == i2c->msg->len){
+			mask = XIIC_INTR_TX_ERROR_MASK;
+		} else {
+			mask = XIIC_SR_TX_FIFO_FULL_MASK;
+		}
+	}
+	else if (i2c->state == STATE_READ){
+		/* on going receive */
+		mask = XIIC_SR_TX_FIFO_EMPTY_MASK | XIIC_SR_RX_FIFO_EMPTY_MASK;
+	}
+	mutex_unlock(&i2c->lock);
+	// printk("Wait for: 0x%x\n", mask);
+
+	/*
+	 * once we are here we expect to get the expected result immediately
+	 * so if after 50ms we timeout then something is broken.
+	 */
+	
+	if (1 == i2c->nmsgs && 0 == i2c->msg->len && i2c->state == STATE_START && !(i2c->msg->flags & I2C_M_RD)) { 	/* for i2cdetect I2C_SMBUS_QUICK mode*/
+		err = poll_wait(i2c, XIIC_IISR_OFFSET, mask, mask, msecs_to_jiffies(50));
+		mutex_lock(&i2c->lock);
+		status = xiic_getreg32(i2c, XIIC_SR_REG_OFFSET);
+		mutex_unlock(&i2c->lock);
+		if (0 != err) { /* AXI IIC as an transceiver , if ever an XIIC_INTR_TX_ERROR_MASK interrupt happens, means no such i2c device */
+			err = 0;
+		} else {
+			err = -ETIMEDOUT;
+		}
+	}
+	else {
+		if (mask & XIIC_SR_TX_FIFO_EMPTY_MASK){
+			err = poll_wait(i2c, XIIC_SR_REG_OFFSET, mask, XIIC_SR_TX_FIFO_EMPTY_MASK, msecs_to_jiffies(50));
+			mask &= ~XIIC_SR_TX_FIFO_EMPTY_MASK;
+		}
+		if (0 == err){
+			err = poll_wait(i2c, XIIC_SR_REG_OFFSET, mask, 0, msecs_to_jiffies(50));
+		}
+		mutex_lock(&i2c->lock);
+		status = xiic_getreg32(i2c, XIIC_IISR_OFFSET);	
+		
+		if ((status & XIIC_INTR_ARB_LOST_MASK) ||
+			((status & XIIC_INTR_TX_ERROR_MASK) &&
+			!(status & XIIC_INTR_RX_FULL_MASK) &&
+			!(i2c->msg->flags & I2C_M_RD))) {  /* AXI IIC as an transceiver , if ever an XIIC_INTR_TX_ERROR_MASK interrupt happens, return */
+			err = -ETIMEDOUT;
+			
+			if (status & XIIC_INTR_ARB_LOST_MASK) {
+				val = xiic_getreg32(i2c, XIIC_CR_REG_OFFSET);
+				tmp = XIIC_CR_MSMS_MASK;
+				val &=(~tmp);
+				xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, val);
+				xiic_setreg32(i2c, XIIC_IISR_OFFSET, XIIC_INTR_ARB_LOST_MASK);
+				printk("%s: TRANSFER STATUS ERROR, ISR: bit 0x%x happens\n",
+					 __func__, XIIC_INTR_ARB_LOST_MASK);
+			} 
+			if (status & XIIC_INTR_TX_ERROR_MASK) {
+				int sta = 0;
+				int cr = 0;
+				sta = xiic_getreg32(i2c,XIIC_SR_REG_OFFSET);
+				cr = xiic_getreg32(i2c,XIIC_CR_REG_OFFSET);
+				xiic_setreg32(i2c, XIIC_IISR_OFFSET, XIIC_INTR_TX_ERROR_MASK);
+				printk("%s: TRANSFER STATUS ERROR, ISR: bit 0x%x happens; SR: bit 0x%x; CR: bit 0x%x\n",
+					 __func__, status, sta, cr);
+			}
+			/* Soft reset IIC controller. */
+			xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK);
+			(void)xiic_reinit(i2c);
+			mutex_unlock(&i2c->lock);
+			return err;
+		}
+		mutex_unlock(&i2c->lock);
+	}
+	
+	if (err)
+		printk("%s: STATUS timeout, bit 0x%x did not clear in 50ms\n",
+			 __func__, status);
+	return err;
+}
+
+static void ocores_process(struct fpgalogic_i2c *i2c)
+{
+	struct i2c_msg *msg = i2c->msg;
+	//unsigned long flags;
+	u16 val;
+
+	/*
+	 * If we spin here because we are in timeout, so we are going
+	 * to be in STATE_ERROR. See ocores_process_timeout()
+	 */
+	mutex_lock(&i2c->lock);
+	// printk("STATE: %d\n", i2c->state);
+
+	if (i2c->state == STATE_START) {
+		i2c->state =(msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE;
+		/* if it's the time sequence is 'start bit + address + read bit + stop bit' */
+		if (i2c->state == STATE_READ){
+			/* it's the last message so we include dynamic stop bit with length */
+			val = msg->len | XIIC_TX_DYN_STOP_MASK;
+			xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, val);
+			goto out;
+		}
+	}
+	if (i2c->state == STATE_READ){
+                /* suit for I2C_FUNC_SMBUS_BLOCK_DATA */
+                if (msg->flags & I2C_M_RECV_LEN) {
+                        msg->len = xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET);
+                        msg->flags &= ~I2C_M_RECV_LEN;
+                        msg->buf[i2c->pos++] = msg->len;
+                }
+                else {
+                        msg->buf[i2c->pos++] = xiic_getreg32(i2c, XIIC_DRR_REG_OFFSET);
+                }
+	} else if (i2c->state == STATE_WRITE){
+		/* if it reaches the last byte data to be sent */
+		if ((i2c->pos == msg->len - 1) && (i2c->nmsgs == 1)){
+			val = msg->buf[i2c->pos++] | XIIC_TX_DYN_STOP_MASK;
+			xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, val);
+			i2c->state = STATE_DONE;
+			goto out;
+		/* if it is not the last byte data to be sent */
+		} else if (i2c->pos < msg->len) {
+			xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, msg->buf[i2c->pos++]);
+			goto out;
+		}
+	}
+
+	/* end of msg? */
+	if (i2c->pos == msg->len) {
+		i2c->nmsgs--;
+		i2c->pos = 0;
+		if (i2c->nmsgs) {
+			i2c->msg++;
+			msg = i2c->msg;	
+			if (!(msg->flags & I2C_M_NOSTART)) /* send start? */{
+				i2c->state = STATE_START;			
+				xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msg) | XIIC_TX_DYN_START_MASK);
+				goto out;
+			}
+		} else {	/* end? */
+			i2c->state = STATE_DONE;
+			goto out;
+		}
+	}
+
+out:
+	mutex_unlock(&i2c->lock);
+	return ;
+}
+
+
+static int fpgai2c_poll(struct fpgalogic_i2c *i2c,
+			                  struct i2c_msg *msgs, int num)
+{
+	int ret = 0;
+	// u8 ctrl;
+	
+	mutex_lock(&i2c->lock);
+	/* Soft reset IIC controller. */
+	xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK);
+	/* Set receive Fifo depth to maximum (zero based). */
+	xiic_setreg32(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1);
+		
+	/* Reset Tx Fifo. */
+	xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK);
+	
+	/* Enable IIC Device, remove Tx Fifo reset & disable general call. */
+	xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_ENABLE_DEVICE_MASK);
+	
+	/* set i2c clock as 100Hz. */
+	//xiic_setreg32(i2c, 0x13c, 0x7C);
+	
+	/* make sure RX fifo is empty */
+	ret = xiic_clear_rx_fifo(i2c);
+	if (ret){
+		mutex_unlock(&i2c->lock);
+		return ret;
+	}
+	
+	i2c->msg = msgs;
+	i2c->pos = 0;
+	i2c->nmsgs = num;
+	i2c->state = STATE_START;
+
+	// printk("STATE: %d\n", i2c->state);
+	
+	if (msgs->len == 0 && num == 1){ /* suit for i2cdetect time sequence */
+		u8 status = xiic_getreg32(i2c, XIIC_IISR_OFFSET);
+		xiic_irq_clr(i2c, status);
+		/* send out the 1st byte data and stop bit */
+		xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msgs) | XIIC_TX_DYN_START_MASK | XIIC_TX_DYN_STOP_MASK);
+	} else {
+		/* send out the 1st byte data */
+		xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, i2c_8bit_addr_from_msg(msgs) | XIIC_TX_DYN_START_MASK);
+	}
+	mutex_unlock(&i2c->lock);
+	while (1) {
+		int err;
+		
+		err = ocores_poll_wait(i2c);
+		if (err) {
+			i2c->state = STATE_ERROR;
+			break;
+		}else if (i2c->state == STATE_DONE){
+			break;
+		}
+		ocores_process(i2c);
+	}
+
+	return (i2c->state == STATE_DONE) ? num : -EIO;
+}
+
+static int fpgai2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
+{
+    struct fpgalogic_i2c *i2c = i2c_get_adapdata(adap);
+    int err = -EIO;
+	u8 retry = 0, max_retry = 0;
+
+	if( ( (1 == msgs->len && (msgs->flags & I2C_M_RD)) || (0 == msgs->len && !(msgs->flags & I2C_M_RD)) ) && num == 1 ) /* I2C_SMBUS_QUICK or I2C_SMBUS_BYTE */
+		max_retry = 1;
+	else
+		max_retry = 5;  // retry 5 times if receive a NACK or other errors
+	while( (-EIO == err) && (retry < max_retry))
+	{
+		err = fpgai2c_poll(i2c, msgs, num);
+		retry++;
+	}
+
+     return err;
+
+}
+
+static u32 fpgai2c_func(struct i2c_adapter *adap)
+{
+/* a typical full-I2C adapter would use the following  */
+    return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
+}
+
+static const struct i2c_algorithm fpgai2c_algorithm= {
+    .master_xfer = fpgai2c_xfer, /*write I2C messages */
+    .functionality = fpgai2c_func, /* what the adapter supports */
+};
+
+static int xiic_reinit(struct fpgalogic_i2c *i2c)
+{
+	int ret;
+	int val = 0;
+	
+	/* Soft reset IIC controller. */
+	xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK);
+	
+	/* Set receive Fifo depth to maximum (zero based). */
+	xiic_setreg32(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1);
+
+	/* Reset Tx Fifo. */
+	xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK);
+
+	/* Enable IIC Device, remove Tx Fifo reset & disable general call. */
+	val |= XIIC_CR_ENABLE_DEVICE_MASK;
+	//val |= XIIC_CR_TX_FIFO_RESET_MASK;
+	//val |= XIIC_CR_MSMS_MASK;
+	val |= XIIC_CR_DIR_IS_TX_MASK;
+	xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, val);
+
+	/* make sure RX fifo is empty */
+	ret = xiic_clear_rx_fifo(i2c);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static int fpgai2c_init(struct fpgalogic_i2c *i2c)
+{
+    // int prescale;
+    // int diff;
+    // u8 ctrl;
+	int ret;
+
+	
+    //i2c->reg_set = xiic_setreg32;
+    //i2c->reg_get = xiic_getreg32;
+	
+	ret = xiic_reinit(i2c);
+	if (ret < 0) {
+		printk("Cannot xiic_reinit\n");
+		return ret;
+	}
+
+    /* Initialize interrupt handlers if not already done */
+    init_waitqueue_head(&i2c->wait);
+    return 0;
+}
+
+static int adap_data_init(struct i2c_adapter *adap, int i2c_ch_index)
+{
+    struct fpgapci_devdata *pci_privdata = 0;
+    pci_privdata = (struct fpgapci_devdata*) dev_get_drvdata(adap->dev.parent);
+
+    if (pci_privdata == 0) {
+        printk("[%s]: ERROR pci_privdata is 0\n", __FUNCTION__);
+        return -1;
+    }
+#if DEBUG
+    pddf_dbg(FPGA, KERN_INFO "[%s] index: [%d] fpga_data__base_addr:0x%0x8lx"
+        " fpgapci_bar_len:0x%08lx fpga_i2c_ch_base_addr:0x%08lx ch_size=0x%x supported_i2c_ch=%d",
+             __FUNCTION__, i2c_ch_index, pci_privdata->fpga_data_base_addr,
+            pci_privdata->bar_length, pci_privdata->fpga_i2c_ch_base_addr,
+            pci_privdata->fpga_i2c_ch_size, pci_privdata->max_fpga_i2c_ch);
+#endif
+    if (i2c_ch_index >= pci_privdata->max_fpga_i2c_ch || pci_privdata->max_fpga_i2c_ch > I2C_PCI_MAX_BUS) {
+        printk("[%s]: ERROR i2c_ch_index=%d max_ch_index=%d out of range: %d\n",
+             __FUNCTION__, i2c_ch_index, pci_privdata->max_fpga_i2c_ch, I2C_PCI_MAX_BUS);
+        return -1;
+    }
+#ifdef __STDC_LIB_EXT1__
+    memset_s(&fpgalogic_i2c[i2c_ch_index], sizeof(fpgalogic_i2c[0]), 0, sizeof(fpgalogic_i2c[0]));
+#else
+    memset(&fpgalogic_i2c[i2c_ch_index], 0, sizeof(fpgalogic_i2c[0]));
+#endif
+   
+    fpgalogic_i2c[i2c_ch_index].base = pci_privdata->fpga_i2c_ch_base_addr +
+                          i2c_ch_index* pci_privdata->fpga_i2c_ch_size;
+    mutex_init(&fpgalogic_i2c[i2c_ch_index].lock);
+    fpgai2c_init(&fpgalogic_i2c[i2c_ch_index]);
+
+
+    adap->algo_data = &fpgalogic_i2c[i2c_ch_index];
+    i2c_set_adapdata(adap, &fpgalogic_i2c[i2c_ch_index]);
+    return 0;
+}
+
+static int pddf_i2c_pci_add_numbered_bus_default (struct i2c_adapter *adap, int i2c_ch_index)
+{
+    int ret = 0;
+
+    adap_data_init(adap, i2c_ch_index);
+    adap->algo = &fpgai2c_algorithm;
+
+    ret = i2c_add_numbered_adapter(adap);
+    return ret;
+}
+
+/*
+ * FPGAPCI APIs
+ */
+int board_i2c_fpgapci_read(uint32_t offset)
+{
+	int data;
+	data=ioread32(fpga_ctl_addr+offset);
+	return data;
+}
+
+
+int board_i2c_fpgapci_write(uint32_t offset, uint32_t value)
+{
+	iowrite32(value, fpga_ctl_addr+offset);
+	return (0);
+}
+
+
+static int __init pddf_xilinx_device_7021_algo_init(void)
+{
+    pddf_dbg(FPGA, KERN_INFO "[%s]\n", __FUNCTION__);
+    pddf_i2c_pci_add_numbered_bus = pddf_i2c_pci_add_numbered_bus_default;
+    ptr_fpgapci_read = board_i2c_fpgapci_read;
+    ptr_fpgapci_write = board_i2c_fpgapci_write;
+    return 0;
+}
+
+static void __exit pddf_xilinx_device_7021_algo_exit(void)
+{
+    pddf_dbg(FPGA, KERN_INFO "[%s]\n", __FUNCTION__);
+
+    pddf_i2c_pci_add_numbered_bus = NULL;
+    ptr_fpgapci_read = NULL;
+    ptr_fpgapci_write = NULL;
+    return;
+}
+
+
+module_init (pddf_xilinx_device_7021_algo_init);
+module_exit (pddf_xilinx_device_7021_algo_exit);
+MODULE_DESCRIPTION("Xilinx Corporation Device 7021 FPGAPCIe I2C-Bus algorithm");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_fpga_extend.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_fpga_extend.c
new file mode 100644
index 000000000000..7f7f19068aa2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_fpga_extend.c
@@ -0,0 +1,340 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * fpga-cls.c - front panel port control.
+ *
+ * Pradchaya Phucharoen <pphuchar@celestica.com>
+ * Copyright (C) 2019 Celestica Corp.
+ */
+
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/spinlock.h>
+#include <linux/acpi.h>
+#include "../../../../pddf/i2c/modules/include/pddf_i2c_algo.h"
+
+#define XILINX_FPGA_VERSION            0x0000
+#define XILINX_FPGA_SCRATCH            0x0004
+#define XILINX_FPGA_REG_SIZE      0x2000
+
+
+/*
+ * fpga_priv - port fpga private data
+ * @dev: device for reference
+ * @base: virtual base address
+ * @num_ports: number of front panel ports
+ * @fp_devs: list of front panel port devices
+ */
+struct fpga_priv {
+	void __iomem *base;
+	struct mutex fpga_lock;         // For FPGA internal lock
+	void __iomem * fpga_read_addr;
+};
+
+extern void __iomem * fpga_ctl_addr;
+
+/**
+ * Show the value of the register set by 'set_fpga_reg_address'
+ * If the address is not set by 'set_fpga_reg_address' first,
+ * The version register is selected by default.
+ * @param  buf     register value in hextring
+ * @return         number of bytes read, or an error code
+ */
+static ssize_t get_fpga_reg_value(struct device *dev, struct device_attribute *devattr,
+                                  char *buf)
+{
+    // read data from the address
+    uint32_t data;
+	struct fpga_priv *fpga = dev_get_drvdata(dev);
+	
+    data = ioread32(fpga->fpga_read_addr);
+    return sprintf(buf, "0x%8.8x\n", data);
+}
+/**
+ * Store the register address
+ * @param  buf     address wanted to be read value of
+ * @return         number of bytes stored, or an error code
+ */
+static ssize_t set_fpga_reg_address(struct device *dev, struct device_attribute *devattr,
+                                    const char *buf, size_t count)
+{
+    uint32_t addr;
+    char *last;
+	struct fpga_priv *fpga = dev_get_drvdata(dev);
+
+    addr = (uint32_t)strtoul(buf, &last, 16);
+    if (addr == 0 && buf == last) {
+        return -EINVAL;
+    }
+    fpga->fpga_read_addr = fpga->base + addr;
+    return count;
+}
+/**
+ * Show value of fpga scratch register
+ * @param  buf     register value in hexstring
+ * @return         number of bytes read, or an error code
+ */
+static ssize_t get_fpga_scratch(struct device *dev, struct device_attribute *devattr,
+                                char *buf)
+{
+	struct fpga_priv *fpga = dev_get_drvdata(dev);
+	
+    return sprintf(buf, "0x%8.8x\n", ioread32(fpga->base + XILINX_FPGA_SCRATCH) & 0xffffffff);
+}
+/**
+ * Store value of fpga scratch register
+ * @param  buf     scratch register value passing from user space
+ * @return         number of bytes stored, or an error code
+ */
+static ssize_t set_fpga_scratch(struct device *dev, struct device_attribute *devattr,
+                                const char *buf, size_t count)
+{
+    uint32_t data;
+    char *last;
+	struct fpga_priv *fpga = dev_get_drvdata(dev);
+	
+    data = (uint32_t)strtoul(buf, &last, 16);
+    if (data == 0 && buf == last) {
+        return -EINVAL;
+    }
+    iowrite32(data, fpga->base + XILINX_FPGA_SCRATCH);
+    return count;
+}
+
+/**
+ * Show value of fpga version register
+ * @param  buf     register value in hexstring
+ * @return         number of bytes read, or an error code
+ */
+static ssize_t get_fpga_version(struct device *dev, struct device_attribute *devattr,
+                                char *buf)
+{
+	struct fpga_priv *fpga = dev_get_drvdata(dev);
+	
+    return sprintf(buf, "0x%8.8x\n", ioread32(fpga->base + XILINX_FPGA_VERSION) & 0xffffffff);
+}
+
+
+/**
+ * Store a value in a specific register address
+ * @param  buf     the value and address in format '0xhhhh 0xhhhhhhhh'
+ * @return         number of bytes sent by user space, or an error code
+ */
+static ssize_t set_fpga_reg_value(struct device *dev, struct device_attribute *devattr,
+                                  const char *buf, size_t count)
+{
+    // register are 4 bytes
+    uint32_t addr;
+    uint32_t value;
+    uint32_t mode = 8;
+    char *tok;
+    char clone[count];
+    char *pclone = clone;
+    char *last;
+	struct fpga_priv *fpga = dev_get_drvdata(dev);
+	
+    strscpy(clone, buf, count);
+    mutex_lock(&fpga->fpga_lock);
+    tok = strsep((char**)&pclone, " ");
+    if (tok == NULL) {
+        mutex_unlock(&fpga->fpga_lock);
+        return -EINVAL;
+    }
+    addr = (uint32_t)strtoul(tok, &last, 16);
+    if (addr == 0 && tok == last) {
+        mutex_unlock(&fpga->fpga_lock);
+        return -EINVAL;
+    }
+    tok = strsep((char**)&pclone, " ");
+    if (tok == NULL) {
+        mutex_unlock(&fpga->fpga_lock);
+        return -EINVAL;
+    }
+    value = (uint32_t)strtoul(tok, &last, 16);
+    if (value == 0 && tok == last) {
+        mutex_unlock(&fpga->fpga_lock);
+        return -EINVAL;
+    }
+    tok = strsep((char**)&pclone, " ");
+    if (tok == NULL) {
+        mode = 32;
+    } else {
+        mode = (uint32_t)strtoul(tok, &last, 10);
+        if (mode == 0 && tok == last) {
+            mutex_unlock(&fpga->fpga_lock);
+            return -EINVAL;
+        }
+    }
+    if (mode == 32) {
+        iowrite32(value, fpga->base + addr);
+    } else if (mode == 8) {
+        iowrite8(value, fpga->base + addr);
+    } else {
+        mutex_unlock(&fpga->fpga_lock);
+        return -EINVAL;
+    }
+    mutex_unlock(&fpga->fpga_lock);
+    return count;
+}
+
+/**
+ * Read all FPGA  register in binary mode.
+ * @param  buf   Raw transceivers port startus and control register values
+ * @return       number of bytes read, or an error code
+ */
+static ssize_t dump_read(struct file *filp, struct kobject *kobj,
+                         struct bin_attribute *attr, char *buf,
+                         loff_t off, size_t count)
+{
+    unsigned long i = 0;
+    ssize_t status;
+    u8 read_reg;
+	struct device *dev = kobj_to_dev(kobj);
+	struct fpga_priv *fpga = dev_get_drvdata(dev);
+
+    if ( off + count > XILINX_FPGA_REG_SIZE ) {
+        return -EINVAL;
+    }
+    mutex_lock(&fpga->fpga_lock);
+    while (i < count) {
+        read_reg = ioread8(fpga->base + off + i);
+        buf[i++] = read_reg;
+    }
+    status = count;
+    mutex_unlock(&fpga->fpga_lock);
+    return status;
+}
+
+
+/* FPGA attributes */
+static DEVICE_ATTR( getreg, 0600, get_fpga_reg_value, set_fpga_reg_address);
+static DEVICE_ATTR( setreg, 0200, NULL , set_fpga_reg_value);
+static DEVICE_ATTR( scratch, 0600, get_fpga_scratch, set_fpga_scratch);
+static DEVICE_ATTR( version, 0400, get_fpga_version, NULL);
+static BIN_ATTR_RO( dump, XILINX_FPGA_REG_SIZE);
+
+static struct bin_attribute *fpga_bin_attrs[] = {
+    &bin_attr_dump,
+    NULL,
+};
+
+static struct attribute *fpga_attrs[] = {
+    &dev_attr_getreg.attr,
+    &dev_attr_scratch.attr,
+    &dev_attr_version.attr,
+    &dev_attr_setreg.attr,
+    NULL,
+};
+
+static struct attribute_group fpga_attr_grp = {
+    .attrs = fpga_attrs,
+    .bin_attrs = fpga_bin_attrs,
+};
+
+
+static int cls_fpga_probe(struct platform_device *pdev)
+{
+
+	struct fpga_priv *fpga;
+	int ret = -ENOMEM;
+
+	if (!fpga_ctl_addr){
+	    printk(KERN_WARNING, "fpga_ctl_addr is null");
+	    return ret;
+	}
+
+	fpga = devm_kzalloc(&pdev->dev, sizeof(struct fpga_priv), GFP_KERNEL);
+	if (!fpga){
+		ret = -ENOMEM;
+		goto err_exit;
+	}
+
+	mutex_init(&fpga->fpga_lock); 
+	dev_set_drvdata(&pdev->dev, fpga);
+	fpga->base = fpga_ctl_addr;
+
+	printk("FPGA version: 0x%x\n", ioread32(fpga->base + XILINX_FPGA_VERSION));
+	
+    ret = sysfs_create_group(&pdev->dev.kobj, &fpga_attr_grp);
+    if (ret != 0) {
+        printk(KERN_ERR "Cannot create FPGA system sysfs attributes\n");
+        goto err_remove_fpga;
+    }
+
+    return 0;
+	
+err_remove_fpga:	
+	sysfs_remove_group(&pdev->dev.kobj, &fpga_attr_grp);
+mem_unmap:
+	iounmap(fpga->base);
+err_exit:
+	return ret;
+
+}
+
+static int cls_fpga_remove(struct platform_device *pdev)
+{
+	struct fpga_priv *fpga = dev_get_drvdata(&pdev->dev);
+	
+	sysfs_remove_group(&pdev->dev.kobj, &fpga_attr_grp);
+	iounmap(fpga->base);
+	return 0;
+}
+
+static void fpga_dev_release( struct device * dev)
+{
+    return;
+}
+static struct resource cls_fpga_resources[] = {
+    {
+	.start = NULL,
+        .end = NULL,
+	.flags = IORESOURCE_IO,	
+    },
+};
+
+static struct platform_device cls_fpga_dev = {
+    .name           = "fpga_sysfs",
+    .id             = -1,
+    .num_resources  = ARRAY_SIZE(cls_fpga_resources),
+    .resource       = cls_fpga_resources,
+    .dev = {
+        .release = fpga_dev_release,
+    }
+};
+
+static struct platform_driver cls_fpga_driver = {
+	.probe = cls_fpga_probe,
+	.remove = cls_fpga_remove,
+	.driver = {
+		.name = "fpga_sysfs",
+	},
+};
+
+static int __init drv_init(void)
+{
+	int rc = 0;
+	
+	rc = platform_device_register(&cls_fpga_dev);
+	rc += platform_driver_register(&cls_fpga_driver);
+	printk("fpga drv_init:%d\n", rc);
+	return rc; 
+}
+
+static void __exit drv_exit(void)
+{
+    platform_driver_unregister(&cls_fpga_driver);
+    platform_device_unregister(&cls_fpga_dev);
+    printk("fpga drv_exit.\n");
+}
+
+module_init(drv_init);
+module_exit(drv_exit);
+
+MODULE_AUTHOR("Nicholas Wu<nicwu@celestica.com>");
+MODULE_DESCRIPTION("Celestica fpga control driver");
+MODULE_VERSION("2.0.0");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:cls-fpga");
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_lpc_basecpld.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_lpc_basecpld.c
new file mode 100644
index 000000000000..08a9831785c9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_lpc_basecpld.c
@@ -0,0 +1,441 @@
+/*
+ * cpld_b .c - The CPLD driver for the Base Board of cloverstone
+ * The driver implement sysfs to access CPLD register on the baseboard of cloverstone via LPC bus.
+ * Copyright (C) 2018 Celestica Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/stddef.h>
+#include <linux/delay.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/acpi.h>
+#include <linux/io.h>
+#include <linux/dmi.h>
+#include <linux/slab.h>
+#include <linux/wait.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+#include <linux/types.h>
+#include <uapi/linux/stat.h>
+#include <linux/string.h>
+
+#define DRIVER_NAME "sys_cpld"
+/**
+ * CPLD register address for read and write.
+ */
+#define VERSION_ADDR 0xA100
+#define BMC_PRESENT_ADDR 0xA108
+#define SCRATCH_ADDR 0xA101
+#define SYS_LED_ADDR 0xA162
+#define CPLD_REGISTER_SIZE 0xFF
+
+struct cpld_b_data {
+    struct mutex       cpld_lock;
+    uint16_t           read_addr;
+};
+
+struct cpld_b_data *cpld_data;
+
+/**
+ * Read the value from scratch register as hex string.
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer for get value
+ * @return         Hex string read from scratch register.
+ */
+static ssize_t scratch_show(struct device *dev, struct device_attribute *devattr,
+                char *buf)
+{
+    unsigned char data = 0;
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(SCRATCH_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    return sprintf(buf,"0x%2.2x\n", data);
+}
+
+/**
+ * Set scratch register with specific hex string.
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer of set value
+ * @param  count   number of bytes in buffer
+ * @return         number of bytes written, or error code < 0.
+ */
+static ssize_t scratch_store(struct device *dev, struct device_attribute *devattr,
+                const char *buf, size_t count)
+{
+    unsigned long data;
+    char *last;
+
+    mutex_lock(&cpld_data->cpld_lock);
+    data = (uint16_t)strtoul(buf,&last,16);
+    if(data == 0 && buf == last){
+        mutex_unlock(&cpld_data->cpld_lock);
+        return -EINVAL;
+    }
+    outb(data, SCRATCH_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    return count;
+}
+static DEVICE_ATTR_RW(scratch);
+
+
+/* CPLD version attributes */
+static ssize_t version_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    int len = 0;
+    unsigned char value = 0;
+    // CPLD register is one byte
+    mutex_lock(&cpld_data->cpld_lock);
+    value = inb(VERSION_ADDR);
+    len = sprintf(buf, "%d.%d\n", value >> 4, value & 0x0F);
+    mutex_unlock(&cpld_data->cpld_lock);
+    return len;
+}
+static DEVICE_ATTR_RO(version);
+
+
+/* BMC Present Status */
+static ssize_t bmc_present_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    int len = 0;
+    unsigned char value = 0;
+    // CPLD register is one byte
+    mutex_lock(&cpld_data->cpld_lock);
+    value = inb(BMC_PRESENT_ADDR);
+    len = sprintf(buf, "%d\n", value & 0x0F);
+    mutex_unlock(&cpld_data->cpld_lock);
+    return len;
+}
+static DEVICE_ATTR_RO(bmc_present);
+
+
+static ssize_t getreg_store(struct device *dev, struct device_attribute *devattr,
+                const char *buf, size_t count)
+{
+    // CPLD register is one byte
+    uint16_t addr;
+    char *last;
+
+    addr = (uint16_t)strtoul(buf,&last,16);
+    if(addr == 0 && buf == last){
+        return -EINVAL;
+    }
+    cpld_data->read_addr = addr;
+    return count;
+}
+
+static ssize_t getreg_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+    int len = 0;
+    // CPLD register is one byte
+    mutex_lock(&cpld_data->cpld_lock);
+    len = sprintf(buf, "0x%2.2x\n",inb(cpld_data->read_addr));
+    mutex_unlock(&cpld_data->cpld_lock);
+    return len;
+}
+static DEVICE_ATTR_RW(getreg);
+
+static ssize_t setreg_store(struct device *dev, struct device_attribute *devattr,
+                const char *buf, size_t count)
+{
+    // CPLD register is one byte
+    uint16_t addr;
+    uint8_t value;
+    char *tok;
+    char clone[count];
+    char *pclone = clone;
+    char *last;
+
+    strscpy(clone, buf, count);
+
+    mutex_lock(&cpld_data->cpld_lock);
+    tok = strsep((char**)&pclone, " ");
+    if(tok == NULL){
+        mutex_unlock(&cpld_data->cpld_lock);
+        return -EINVAL;
+    }
+    addr = (uint16_t)strtoul(tok,&last,16);
+    if(addr == 0 && tok == last){
+        mutex_unlock(&cpld_data->cpld_lock);
+        return -EINVAL;
+    }
+
+    tok = strsep((char**)&pclone, " ");
+    if(tok == NULL){
+        mutex_unlock(&cpld_data->cpld_lock);
+        return -EINVAL;
+    }
+    value = (uint8_t)strtoul(tok,&last,16);
+    if(value == 0 && tok == last){
+        mutex_unlock(&cpld_data->cpld_lock);
+        return -EINVAL;
+    }
+
+    outb(value,addr);
+    mutex_unlock(&cpld_data->cpld_lock);
+    return count;
+}
+static DEVICE_ATTR_WO(setreg);
+
+/**
+ * Read all CPLD register in binary mode.
+ * @return number of byte read.
+ */
+static ssize_t dump_read(struct file *filp, struct kobject *kobj,
+                struct bin_attribute *attr, char *buf,
+                loff_t off, size_t count)
+{
+    unsigned long i=0;
+    ssize_t status;
+
+    mutex_lock(&cpld_data->cpld_lock);
+begin:
+    if(i < count){
+        buf[i++] = inb(VERSION_ADDR + off);
+        off++;
+        msleep(1);
+        goto begin;
+    }
+    status = count;
+exit:
+    mutex_unlock(&cpld_data->cpld_lock);
+    return status;
+}
+static BIN_ATTR_RO(dump, CPLD_REGISTER_SIZE);
+
+/**
+ * Show system led status - on/off/1k/4k
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer for get value
+ * @return         Hex string read from scratch register.
+ */
+static ssize_t sys_led_show(struct device *dev, struct device_attribute *devattr,
+                char *buf)
+{
+    unsigned char data = 0;
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(SYS_LED_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    data = data & 0x3;
+    return sprintf(buf, "%s\n",
+            data == 0x03 ? "off" : data == 0x02 ? "4k" : data ==0x01 ? "1k": "on");
+}
+
+/**
+ * Set the status of system led - on/off/1k/4k
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer of set value
+ * @param  count   number of bytes in buffer
+ * @return         number of bytes written, or error code < 0.
+ */
+static ssize_t sys_led_store(struct device *dev, struct device_attribute *devattr,
+                const char *buf, size_t count)
+{
+    unsigned char led_status,data;
+    if(sysfs_streq(buf, "off")){
+        led_status = 0x03;
+    }else if(sysfs_streq(buf, "4k")){
+        led_status = 0x02;
+    }else if(sysfs_streq(buf, "1k")){
+        led_status = 0x01;
+    }else if(sysfs_streq(buf, "on")){
+        led_status = 0x00;
+    }else{
+        count = -EINVAL;
+        return count;
+    }
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(SYS_LED_ADDR);
+    data = data & ~(0x3);
+    data = data | led_status;
+	
+    /* if bit[5:4] is not configured to 01(green) or 10(yellow), 
+    led will be off after set this filed */ 
+    if(led_status == 0x00 && (0x0 == (data >> 4 & 0x3) || 0x3 == (data >> 4 & 0x3))){  
+        data = data & ~(0x3 << 4); 
+        data = data | (0x01 << 4); /* set bit[5:4] to 01(green) defaultly */
+    } else if(led_status == 0x01 || led_status == 0x02){ 
+        data = data & ~(0x3 << 4); /* set bit[5:4] to 00(blink) defaultly */
+    }
+    outb(data, SYS_LED_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    return count;
+}
+static DEVICE_ATTR_RW(sys_led);
+
+/**
+ * Show system led color - both/green/yellow/none
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer for get value
+ * @return         Hex string read from scratch register.
+ */
+static ssize_t sys_led_color_show(struct device *dev, struct device_attribute *devattr,
+                char *buf)
+{
+    unsigned char data = 0;
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(SYS_LED_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    data = (data >> 4) & 0x3;
+    return sprintf(buf, "%s\n",
+            data == 0x03 ? "off" : data == 0x02 ? "yellow" : data ==0x01 ? "green": "both");
+}
+
+/**
+ * Set the color of system led - both/green/yellow/none
+ * @param  dev     kernel device
+ * @param  devattr kernel device attribute
+ * @param  buf     buffer of set value
+ * @param  count   number of bytes in buffer
+ * @return         number of bytes written, or error code < 0.
+ */
+static ssize_t sys_led_color_store(struct device *dev, struct device_attribute *devattr,
+                const char *buf, size_t count)
+{
+    unsigned char led_status,data;
+    if(sysfs_streq(buf, "off")){
+        led_status = 0x03;
+    }else if(sysfs_streq(buf, "yellow")){
+        led_status = 0x02;
+    }else if(sysfs_streq(buf, "green")){
+        led_status = 0x01;
+    }else if(sysfs_streq(buf, "both")){
+        led_status = 0x00;
+    }else{
+        count = -EINVAL;
+        return count;
+    }
+    mutex_lock(&cpld_data->cpld_lock);
+    data = inb(SYS_LED_ADDR);
+    data = data & ~( 0x3 << 4);
+    data = data | (led_status << 4);
+    outb(data, SYS_LED_ADDR);
+    mutex_unlock(&cpld_data->cpld_lock);
+    return count;
+}
+static DEVICE_ATTR_RW(sys_led_color);
+
+static struct attribute *cpld_b_attrs[] = {
+    &dev_attr_bmc_present.attr,
+    &dev_attr_version.attr,
+    &dev_attr_scratch.attr,
+    &dev_attr_getreg.attr,
+    &dev_attr_setreg.attr,
+    &dev_attr_sys_led.attr,
+    &dev_attr_sys_led_color.attr,
+    NULL,
+};
+
+static struct bin_attribute *cpld_b_bin_attrs[] = {
+    &bin_attr_dump,
+    NULL,
+};
+
+static struct attribute_group cpld_b_attrs_grp = {
+    .attrs = cpld_b_attrs,
+    .bin_attrs = cpld_b_bin_attrs,
+};
+
+static struct resource cpld_b_resources[] = {
+    {
+        .start  = 0xA100,
+        .end    = 0xA1FF,
+        .flags  = IORESOURCE_IO,
+    },
+};
+
+static void cpld_b_dev_release( struct device * dev)
+{
+    return;
+}
+
+static struct platform_device cpld_b_dev = {
+    .name           = DRIVER_NAME,
+    .id             = -1,
+    .num_resources  = ARRAY_SIZE(cpld_b_resources),
+    .resource       = cpld_b_resources,
+    .dev = {
+        .release = cpld_b_dev_release,
+    }
+};
+
+static int cpld_b_drv_probe(struct platform_device *pdev)
+{
+    struct resource *res;
+    int err = 0;
+
+    cpld_data = devm_kzalloc(&pdev->dev, sizeof(struct cpld_b_data),
+        GFP_KERNEL);
+    if (!cpld_data)
+        return -ENOMEM;
+
+    mutex_init(&cpld_data->cpld_lock);
+
+    cpld_data->read_addr = VERSION_ADDR;
+
+    res = platform_get_resource(pdev, IORESOURCE_IO, 0);
+    if (unlikely(!res)) {
+        printk(KERN_ERR "Specified Resource Not Available...\n");
+        return -ENODEV;
+    }
+
+    err = sysfs_create_group(&pdev->dev.kobj, &cpld_b_attrs_grp);
+    if (err) {
+        printk(KERN_ERR "Cannot create sysfs for baseboard CPLD\n");
+        return err;
+    }
+    return 0;
+}
+
+static int cpld_b_drv_remove(struct platform_device *pdev)
+{
+    sysfs_remove_group(&pdev->dev.kobj, &cpld_b_attrs_grp);
+    return 0;
+}
+
+static struct platform_driver cpld_b_drv = {
+    .probe  = cpld_b_drv_probe,
+    .remove = __exit_p(cpld_b_drv_remove),
+    .driver = {
+        .name   = DRIVER_NAME,
+    },
+};
+
+int cpld_b_init(void)
+{
+    // Register platform device and platform driver
+    platform_device_register(&cpld_b_dev);
+    platform_driver_register(&cpld_b_drv);
+    return 0;
+}
+
+void cpld_b_exit(void)
+{
+    // Unregister platform device and platform driver
+    platform_driver_unregister(&cpld_b_drv);
+    platform_device_unregister(&cpld_b_dev);
+}
+
+module_init(cpld_b_init);
+module_exit(cpld_b_exit);
+
+
+MODULE_AUTHOR("Celestica Inc.");
+MODULE_DESCRIPTION("LPC CPLD baseboard driver");
+MODULE_VERSION("2.0.0");
+MODULE_LICENSE("GPL");
+
diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/modules/pddf_custom_wdt.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_wdt.c
similarity index 85%
rename from platform/broadcom/sonic-platform-modules-cel/belgite/modules/pddf_custom_wdt.c
rename to platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_wdt.c
index 21ef0de9f31c..b26aabba64cd 100644
--- a/platform/broadcom/sonic-platform-modules-cel/belgite/modules/pddf_custom_wdt.c
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pddf_custom_wdt.c
@@ -37,29 +37,25 @@
 
 #define WDT_CONTROL_BASE             0xA100	
 #define TEST_SCRATCH_REG             0xA101
-#define REBOOT_CAUSE_REG             0xA105
-#define WDT_SET_TIMER_H_BIT_REG      0xA161
-#define WDT_SET_TIMER_M_BIT_REG      0xA162
-#define WDT_SET_TIMER_L_BIT_REG      0xA163
-#define WDT_TIMER_H_BIT_REG          0xA164
-#define WDT_TIMER_M_BIT_REG          0xA165
-#define WDT_TIMER_L_BIT_REG          0xA166
-#define WDT_ENABLE_REG               0xA167
-#define WDT_FEED_REG                 0xA168
-#define WDT_PUNCH_REG                0xA169
+#define REBOOT_CAUSE_REG             0xA106
+#define WDT_SET_TIMER_H_BIT_REG      0xA181
+#define WDT_SET_TIMER_M_BIT_REG      0xA182
+#define WDT_SET_TIMER_L_BIT_REG      0xA183
+#define WDT_TIMER_H_BIT_REG          0xA184
+#define WDT_TIMER_M_BIT_REG          0xA185
+#define WDT_TIMER_L_BIT_REG          0xA186
+#define WDT_ENABLE_REG               0xA187
+#define WDT_FEED_REG                 0xA188
+#define WDT_PUNCH_REG                0xA189
 #define WDT_START_FEED               0x01
 #define WDT_STOP_FEED                0x00
 
-#define POWER_CYCLE_RESET	     0x00
+
 #define POWER_ON_RESET		     0x11
 #define SOFT_SET_WARM_RESET	     0x22
 #define SOFT_SET_COLD_RESET	     0x33
 #define CPU_WARM_RESET		     0x44
-#define CPU_COLD_RESET		     0x55
-#define CPU_GPIO_WARM_RESET	     0x66
-#define WDT_RESET		     0x77
-#define CPU_OVERLOAD_RESET	     0x88
-#define INSUFFICIENT_FAN_SPEED_RESET 0xAA
+#define WDT_RESET		     0x66
 
 
 #define MAX_TIMER_VALUE     0xffffff
@@ -84,10 +80,10 @@ struct wdt_data {
 
 struct cpld_wdt_private {
 	struct platform_device *pdev;
-        struct watchdog_device wddev;
+	struct watchdog_device wddev;
 	struct cdev cdev;
-		struct miscdevice mdev;
-        bool suspended;
+	struct miscdevice mdev;
+	bool suspended;
 	struct wdt_data wdat;	
 };
 
@@ -271,10 +267,10 @@ static const struct watchdog_info ident = {
 static ssize_t identity_show(struct device *dev, struct device_attribute *attr,
                                 char *buf)
 {
-        struct cpld_wdt_private *wdt = dev_get_drvdata(dev);
+	struct cpld_wdt_private *wdt = dev_get_drvdata(dev);
 	if(!wdt)
 	   return -EINVAL;
-        return sprintf(buf, "%s\n", wdt->wdat.ident.identity);
+	return sprintf(buf, "%s\n", wdt->wdat.ident.identity);
 }
 
 static DEVICE_ATTR_RO(identity);
@@ -283,12 +279,12 @@ static DEVICE_ATTR_RO(identity);
 static ssize_t state_show(struct device *dev, struct device_attribute *attr,
                                 char *buf)
 {
-        struct cpld_wdt_private *wdt = dev_get_drvdata(dev);
+	struct cpld_wdt_private *wdt = dev_get_drvdata(dev);
 	bool state = watchdog_is_running(wdt);
 	if(true == state)
 		return sprintf(buf, "active\n");
 	else
-        	return sprintf(buf, "inactive\n");
+		return sprintf(buf, "inactive\n");
 }
 
 static DEVICE_ATTR_RO(state);
@@ -309,11 +305,10 @@ static DEVICE_ATTR_RO(status);
 static ssize_t reason_show(struct device *dev,
                                 struct device_attribute *attr, char *buf)
 {
-        char bootstatus;
+	char bootstatus;
 	struct cpld_wdt_private *wdt = dev_get_drvdata(dev);
-        if(!wdt)
-           return -EINVAL;
-
+	if(!wdt)
+		return -EINVAL;
 	bootstatus = watchdog_get_reason(wdt);
 
         return sprintf(buf, "0x%02x\n", bootstatus);
@@ -344,7 +339,7 @@ static ssize_t timeout_show(struct device *dev, struct device_attribute *attr,
  	unsigned int timeout;	
 	struct cpld_wdt_private *wdt = dev_get_drvdata(dev);
 	if(!wdt)
-           return -EINVAL;
+		return -EINVAL;
 
 	timeout = watchdog_get_timeout(wdt);
 
@@ -371,7 +366,7 @@ static int watchdog_open(struct inode *inode, struct file *file)
 {
 	struct cpld_wdt_private *wdt;
 
-		wdt = container_of(file->private_data, struct cpld_wdt_private, mdev);
+	wdt = container_of(file->private_data, struct cpld_wdt_private, mdev);
 
 	/* If the watchdog is alive we don't need to start it again */
 
@@ -384,15 +379,13 @@ static int watchdog_open(struct inode *inode, struct file *file)
 		__module_get(THIS_MODULE);
 
 	wdt->wdat.expect_close = 0;
-
-	
 	return nonseekable_open(inode, file);
 }
 
 static int watchdog_release(struct inode *inode, struct file *file)
 {
 	struct cpld_wdt_private *p;
-		p = container_of(file->private_data, struct cpld_wdt_private, mdev);
+	p = container_of(file->private_data, struct cpld_wdt_private, mdev);
 
 	if(!p)
 	    return -EINVAL;
@@ -523,8 +516,7 @@ static long watchdog_ioctl(struct file *file, unsigned int cmd,
 		new_timeout = new_timeout*1000;	
 		if (watchdog_set_timeout(p, new_timeout))
 			return -EINVAL;
-		
-                val = watchdog_get_timeout(p);	
+		val = watchdog_get_timeout(p);	
 		return put_user(val, uarg.i);
 	case WDIOC_GETTIMEOUT:
 		val = watchdog_get_timeout(p);
@@ -578,15 +570,12 @@ static int cpld_wdt_probe(struct platform_device *pdev)
 
 	p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL);
         if (!p)
-                return -ENOMEM;
-
-
+            return -ENOMEM;
 	mutex_init(&(p->wdat.lock));
-
-        p->wdat.ident.options = WDIOC_SETTIMEOUT
-				| WDIOF_MAGICCLOSE
-				| WDIOF_KEEPALIVEPING
-				| WDIOC_GETTIMELEFT;
+	p->wdat.ident.options = WDIOC_SETTIMEOUT
+			| WDIOF_MAGICCLOSE
+			| WDIOF_KEEPALIVEPING
+			| WDIOC_GETTIMELEFT;
 
 	snprintf(p->wdat.ident.identity,
 		sizeof(p->wdat.ident.identity), "%s", DRV_NAME);
@@ -597,13 +586,12 @@ static int cpld_wdt_probe(struct platform_device *pdev)
 	pr_info("Watchdog CPLD Version:0x%02x\n",
                  ver);
 
-        if (timeout) {
-		if (timeout <= 0
-		 || timeout >  max_timeout) {
+	if (timeout) {
+		if (timeout <= 0 || timeout >  max_timeout) {
 			pr_err("starting timeout out of range\n");
 			err = -EINVAL;
 			return err;
-		}
+			}
 
 		//watchdog_start(p);
 
@@ -617,68 +605,48 @@ static int cpld_wdt_probe(struct platform_device *pdev)
 		if (nowayout)
 			__module_get(THIS_MODULE);
 
-		pr_info("watchdog started with initial timeout of %u Second(s)\n",
-			timeout/1000);
-	}
+		pr_info("watchdog started with initial timeout of %u Second(s)\n", timeout/1000);
+		}
 
         err = watchdog_set_timeout(p, timeout);
 	if (err)
 		return err;
 
-        err = register_reboot_notifier(&watchdog_notifier);
+	err = register_reboot_notifier(&watchdog_notifier);
 	if (err)
 		return err;
-		p->mdev = watchdog_miscdev;
-        err = misc_register(&p->mdev);
+	p->mdev = watchdog_miscdev;
+	err = misc_register(&p->mdev);
 	if (err) {
-		pr_err("cannot register miscdev on minor=%d\n",
-		       watchdog_miscdev.minor);
-		return err;;
-	}
-
-       /*p->wdat.res = platform_get_resource(pdev, IORESOURCE_IO, WDT_CONTROL_BASE);
-        if (!p->wdat.res)
-                return -ENODEV;
+		pr_err("cannot register miscdev on minor=%d\n", watchdog_miscdev.minor);
+		return err;
+		}
 
-	if (!devm_request_region(dev, p->wdat.res->start,
-                                 resource_size(p->wdat.res),
-                                 pdev->name)) {
-                return -EBUSY;
-        }
-	*/
 	err = sysfs_create_group(&pdev->dev.kobj, &wdt_group);
-    	if (err) {
-        	printk(KERN_ERR "Cannot create sysfs for cpld_wdt.\n");
-        	return err;
-   	 }
+	if (err) {
+		printk(KERN_ERR "Cannot create sysfs for cpld_wdt.\n");
+		return err;
+		}
 
-        platform_set_drvdata(pdev, p);
-        dev_set_drvdata(dev, p);
+	platform_set_drvdata(pdev, p);
+	dev_set_drvdata(dev, p);
 
-        pr_info("initialized.  sec (nowayout=%d)\n",
-                 nowayout);
+	pr_info("initialized.  sec (nowayout=%d)\n",
+				nowayout);
 
 	return 0;
 }
 
 static int cpld_wdt_remove(struct platform_device *pdev)
 {
-        struct cpld_wdt_private *p = platform_get_drvdata(pdev);
-	/*
-        if (!nowayout)
-                watchdog_stop(&p->wddev);
-	*/
-	if(!p)
-		return 0;
-    
+    struct cpld_wdt_private *p = platform_get_drvdata(pdev);
+	
+	if (p) {
     	sysfs_remove_group(&pdev->dev.kobj, &wdt_group);
-
         misc_deregister(&p->mdev);
-
-	unregister_reboot_notifier(&watchdog_notifier);
-
-        return 0;
-
+        unregister_reboot_notifier(&watchdog_notifier);
+    }
+    return 0;
 }
 
 static struct platform_driver cpld_wdt_driver = {
@@ -722,14 +690,14 @@ static int __init cpld_wdt_init_module(void)
 	    pr_info("Platform Device/Driver Register Failed. err:%d\n", err);
 
 	pr_info("CPLD WatchDog Timer Driver v%s\n", DRV_VERSION);
-        return err;
+	return err;
 }
 
 static void __exit cpld_wdt_cleanup_module(void)
 {
-        platform_driver_unregister(&cpld_wdt_driver);
+	platform_driver_unregister(&cpld_wdt_driver);
 	platform_device_unregister(&cpld_wdt_dev);
-        pr_info("Watchdog Module Unloaded\n");
+	pr_info("Watchdog Module Unloaded\n");
 }
 
 module_init(cpld_wdt_init_module);
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pmbus.h b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pmbus.h
new file mode 100644
index 000000000000..cb6dbe29c0bf
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/pmbus.h
@@ -0,0 +1,504 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * pmbus.h - Common defines and structures for PMBus devices
+ *
+ * Copyright (c) 2010, 2011 Ericsson AB.
+ * Copyright (c) 2012 Guenter Roeck
+ */
+
+#ifndef PMBUS_H
+#define PMBUS_H
+
+#include <linux/bitops.h>
+#include <linux/regulator/driver.h>
+
+/*
+ * Registers
+ */
+enum pmbus_regs {
+	PMBUS_PAGE			= 0x00,
+	PMBUS_OPERATION			= 0x01,
+	PMBUS_ON_OFF_CONFIG		= 0x02,
+	PMBUS_CLEAR_FAULTS		= 0x03,
+	PMBUS_PHASE			= 0x04,
+
+	PMBUS_WRITE_PROTECT		= 0x10,
+
+	PMBUS_CAPABILITY		= 0x19,
+	PMBUS_QUERY			= 0x1A,
+
+	PMBUS_VOUT_MODE			= 0x20,
+	PMBUS_VOUT_COMMAND		= 0x21,
+	PMBUS_VOUT_TRIM			= 0x22,
+	PMBUS_VOUT_CAL_OFFSET		= 0x23,
+	PMBUS_VOUT_MAX			= 0x24,
+	PMBUS_VOUT_MARGIN_HIGH		= 0x25,
+	PMBUS_VOUT_MARGIN_LOW		= 0x26,
+	PMBUS_VOUT_TRANSITION_RATE	= 0x27,
+	PMBUS_VOUT_DROOP		= 0x28,
+	PMBUS_VOUT_SCALE_LOOP		= 0x29,
+	PMBUS_VOUT_SCALE_MONITOR	= 0x2A,
+
+	PMBUS_COEFFICIENTS		= 0x30,
+	PMBUS_POUT_MAX			= 0x31,
+
+	PMBUS_FAN_CONFIG_12		= 0x3A,
+	PMBUS_FAN_COMMAND_1		= 0x3B,
+	PMBUS_FAN_COMMAND_2		= 0x3C,
+	PMBUS_FAN_CONFIG_34		= 0x3D,
+	PMBUS_FAN_COMMAND_3		= 0x3E,
+	PMBUS_FAN_COMMAND_4		= 0x3F,
+
+	PMBUS_VOUT_OV_FAULT_LIMIT	= 0x40,
+	PMBUS_VOUT_OV_FAULT_RESPONSE	= 0x41,
+	PMBUS_VOUT_OV_WARN_LIMIT	= 0x42,
+	PMBUS_VOUT_UV_WARN_LIMIT	= 0x43,
+	PMBUS_VOUT_UV_FAULT_LIMIT	= 0x44,
+	PMBUS_VOUT_UV_FAULT_RESPONSE	= 0x45,
+	PMBUS_IOUT_OC_FAULT_LIMIT	= 0x46,
+	PMBUS_IOUT_OC_FAULT_RESPONSE	= 0x47,
+	PMBUS_IOUT_OC_LV_FAULT_LIMIT	= 0x48,
+	PMBUS_IOUT_OC_LV_FAULT_RESPONSE	= 0x49,
+	PMBUS_IOUT_OC_WARN_LIMIT	= 0x4A,
+	PMBUS_IOUT_UC_FAULT_LIMIT	= 0x4B,
+	PMBUS_IOUT_UC_FAULT_RESPONSE	= 0x4C,
+
+	PMBUS_OT_FAULT_LIMIT		= 0x4F,
+	PMBUS_OT_FAULT_RESPONSE		= 0x50,
+	PMBUS_OT_WARN_LIMIT		= 0x51,
+	PMBUS_UT_WARN_LIMIT		= 0x52,
+	PMBUS_UT_FAULT_LIMIT		= 0x53,
+	PMBUS_UT_FAULT_RESPONSE		= 0x54,
+	PMBUS_VIN_OV_FAULT_LIMIT	= 0x55,
+	PMBUS_VIN_OV_FAULT_RESPONSE	= 0x56,
+	PMBUS_VIN_OV_WARN_LIMIT		= 0x57,
+	PMBUS_VIN_UV_WARN_LIMIT		= 0x58,
+	PMBUS_VIN_UV_FAULT_LIMIT	= 0x59,
+
+	PMBUS_IIN_OC_FAULT_LIMIT	= 0x5B,
+	PMBUS_IIN_OC_WARN_LIMIT		= 0x5D,
+
+	PMBUS_POUT_OP_FAULT_LIMIT	= 0x68,
+	PMBUS_POUT_OP_WARN_LIMIT	= 0x6A,
+	PMBUS_PIN_OP_WARN_LIMIT		= 0x6B,
+
+	PMBUS_STATUS_BYTE		= 0x78,
+	PMBUS_STATUS_WORD		= 0x79,
+	PMBUS_STATUS_VOUT		= 0x7A,
+	PMBUS_STATUS_IOUT		= 0x7B,
+	PMBUS_STATUS_INPUT		= 0x7C,
+	PMBUS_STATUS_TEMPERATURE	= 0x7D,
+	PMBUS_STATUS_CML		= 0x7E,
+	PMBUS_STATUS_OTHER		= 0x7F,
+	PMBUS_STATUS_MFR_SPECIFIC	= 0x80,
+	PMBUS_STATUS_FAN_12		= 0x81,
+	PMBUS_STATUS_FAN_34		= 0x82,
+
+	PMBUS_READ_VIN			= 0x88,
+	PMBUS_READ_IIN			= 0x89,
+	PMBUS_READ_VCAP			= 0x8A,
+	PMBUS_READ_VOUT			= 0x8B,
+	PMBUS_READ_IOUT			= 0x8C,
+	PMBUS_READ_TEMPERATURE_1	= 0x8D,
+	PMBUS_READ_TEMPERATURE_2	= 0x8E,
+	PMBUS_READ_TEMPERATURE_3	= 0x8F,
+	PMBUS_READ_FAN_SPEED_1		= 0x90,
+	PMBUS_READ_FAN_SPEED_2		= 0x91,
+	PMBUS_READ_FAN_SPEED_3		= 0x92,
+	PMBUS_READ_FAN_SPEED_4		= 0x93,
+	PMBUS_READ_DUTY_CYCLE		= 0x94,
+	PMBUS_READ_FREQUENCY		= 0x95,
+	PMBUS_READ_POUT			= 0x96,
+	PMBUS_READ_PIN			= 0x97,
+
+	PMBUS_REVISION			= 0x98,
+	PMBUS_MFR_ID			= 0x99,
+	PMBUS_MFR_MODEL			= 0x9A,
+	PMBUS_MFR_REVISION		= 0x9B,
+	PMBUS_MFR_LOCATION		= 0x9C,
+	PMBUS_MFR_DATE			= 0x9D,
+	PMBUS_MFR_SERIAL		= 0x9E,
+
+	PMBUS_MFR_VIN_MIN		= 0xA0,
+	PMBUS_MFR_VIN_MAX		= 0xA1,
+	PMBUS_MFR_IIN_MAX		= 0xA2,
+	PMBUS_MFR_PIN_MAX		= 0xA3,
+	PMBUS_MFR_VOUT_MIN		= 0xA4,
+	PMBUS_MFR_VOUT_MAX		= 0xA5,
+	PMBUS_MFR_IOUT_MAX		= 0xA6,
+	PMBUS_MFR_POUT_MAX		= 0xA7,
+
+	PMBUS_IC_DEVICE_ID		= 0xAD,
+	PMBUS_IC_DEVICE_REV		= 0xAE,
+
+	PMBUS_MFR_MAX_TEMP_1		= 0xC0,
+	PMBUS_MFR_MAX_TEMP_2		= 0xC1,
+	PMBUS_MFR_MAX_TEMP_3		= 0xC2,
+
+/*
+ * Virtual registers.
+ * Useful to support attributes which are not supported by standard PMBus
+ * registers but exist as manufacturer specific registers on individual chips.
+ * Must be mapped to real registers in device specific code.
+ *
+ * Semantics:
+ * Virtual registers are all word size.
+ * READ registers are read-only; writes are either ignored or return an error.
+ * RESET registers are read/write. Reading reset registers returns zero
+ * (used for detection), writing any value causes the associated history to be
+ * reset.
+ * Virtual registers have to be handled in device specific driver code. Chip
+ * driver code returns non-negative register values if a virtual register is
+ * supported, or a negative error code if not. The chip driver may return
+ * -ENODATA or any other error code in this case, though an error code other
+ * than -ENODATA is handled more efficiently and thus preferred. Either case,
+ * the calling PMBus core code will abort if the chip driver returns an error
+ * code when reading or writing virtual registers.
+ */
+	PMBUS_VIRT_BASE			= 0x100,
+	PMBUS_VIRT_READ_TEMP_AVG,
+	PMBUS_VIRT_READ_TEMP_MIN,
+	PMBUS_VIRT_READ_TEMP_MAX,
+	PMBUS_VIRT_RESET_TEMP_HISTORY,
+	PMBUS_VIRT_READ_VIN_AVG,
+	PMBUS_VIRT_READ_VIN_MIN,
+	PMBUS_VIRT_READ_VIN_MAX,
+	PMBUS_VIRT_RESET_VIN_HISTORY,
+	PMBUS_VIRT_READ_IIN_AVG,
+	PMBUS_VIRT_READ_IIN_MIN,
+	PMBUS_VIRT_READ_IIN_MAX,
+	PMBUS_VIRT_RESET_IIN_HISTORY,
+	PMBUS_VIRT_READ_PIN_AVG,
+	PMBUS_VIRT_READ_PIN_MIN,
+	PMBUS_VIRT_READ_PIN_MAX,
+	PMBUS_VIRT_RESET_PIN_HISTORY,
+	PMBUS_VIRT_READ_POUT_AVG,
+	PMBUS_VIRT_READ_POUT_MIN,
+	PMBUS_VIRT_READ_POUT_MAX,
+	PMBUS_VIRT_RESET_POUT_HISTORY,
+	PMBUS_VIRT_READ_VOUT_AVG,
+	PMBUS_VIRT_READ_VOUT_MIN,
+	PMBUS_VIRT_READ_VOUT_MAX,
+	PMBUS_VIRT_RESET_VOUT_HISTORY,
+	PMBUS_VIRT_READ_IOUT_AVG,
+	PMBUS_VIRT_READ_IOUT_MIN,
+	PMBUS_VIRT_READ_IOUT_MAX,
+	PMBUS_VIRT_RESET_IOUT_HISTORY,
+	PMBUS_VIRT_READ_TEMP2_AVG,
+	PMBUS_VIRT_READ_TEMP2_MIN,
+	PMBUS_VIRT_READ_TEMP2_MAX,
+	PMBUS_VIRT_RESET_TEMP2_HISTORY,
+
+	PMBUS_VIRT_READ_VMON,
+	PMBUS_VIRT_VMON_UV_WARN_LIMIT,
+	PMBUS_VIRT_VMON_OV_WARN_LIMIT,
+	PMBUS_VIRT_VMON_UV_FAULT_LIMIT,
+	PMBUS_VIRT_VMON_OV_FAULT_LIMIT,
+	PMBUS_VIRT_STATUS_VMON,
+
+	/*
+	 * RPM and PWM Fan control
+	 *
+	 * Drivers wanting to expose PWM control must define the behaviour of
+	 * PMBUS_VIRT_PWM_[1-4] and PMBUS_VIRT_PWM_ENABLE_[1-4] in the
+	 * {read,write}_word_data callback.
+	 *
+	 * pmbus core provides a default implementation for
+	 * PMBUS_VIRT_FAN_TARGET_[1-4].
+	 *
+	 * TARGET, PWM and PWM_ENABLE members must be defined sequentially;
+	 * pmbus core uses the difference between the provided register and
+	 * it's _1 counterpart to calculate the FAN/PWM ID.
+	 */
+	PMBUS_VIRT_FAN_TARGET_1,
+	PMBUS_VIRT_FAN_TARGET_2,
+	PMBUS_VIRT_FAN_TARGET_3,
+	PMBUS_VIRT_FAN_TARGET_4,
+	PMBUS_VIRT_PWM_1,
+	PMBUS_VIRT_PWM_2,
+	PMBUS_VIRT_PWM_3,
+	PMBUS_VIRT_PWM_4,
+	PMBUS_VIRT_PWM_ENABLE_1,
+	PMBUS_VIRT_PWM_ENABLE_2,
+	PMBUS_VIRT_PWM_ENABLE_3,
+	PMBUS_VIRT_PWM_ENABLE_4,
+
+	/* Samples for average
+	 *
+	 * Drivers wanting to expose functionality for changing the number of
+	 * samples used for average values should implement support in
+	 * {read,write}_word_data callback for either PMBUS_VIRT_SAMPLES if it
+	 * applies to all types of measurements, or any number of specific
+	 * PMBUS_VIRT_*_SAMPLES registers to allow for individual control.
+	 */
+	PMBUS_VIRT_SAMPLES,
+	PMBUS_VIRT_IN_SAMPLES,
+	PMBUS_VIRT_CURR_SAMPLES,
+	PMBUS_VIRT_POWER_SAMPLES,
+	PMBUS_VIRT_TEMP_SAMPLES,
+};
+
+/*
+ * OPERATION
+ */
+#define PB_OPERATION_CONTROL_ON		BIT(7)
+
+/*
+ * WRITE_PROTECT
+ */
+#define PB_WP_ALL	BIT(7)	/* all but WRITE_PROTECT */
+#define PB_WP_OP	BIT(6)	/* all but WP, OPERATION, PAGE */
+#define PB_WP_VOUT	BIT(5)	/* all but WP, OPERATION, PAGE, VOUT, ON_OFF */
+
+#define PB_WP_ANY	(PB_WP_ALL | PB_WP_OP | PB_WP_VOUT)
+
+/*
+ * CAPABILITY
+ */
+#define PB_CAPABILITY_SMBALERT		BIT(4)
+#define PB_CAPABILITY_ERROR_CHECK	BIT(7)
+
+/*
+ * VOUT_MODE
+ */
+#define PB_VOUT_MODE_MODE_MASK		0xe0
+#define PB_VOUT_MODE_PARAM_MASK		0x1f
+
+#define PB_VOUT_MODE_LINEAR		0x00
+#define PB_VOUT_MODE_VID		0x20
+#define PB_VOUT_MODE_DIRECT		0x40
+
+/*
+ * Fan configuration
+ */
+#define PB_FAN_2_PULSE_MASK		(BIT(0) | BIT(1))
+#define PB_FAN_2_RPM			BIT(2)
+#define PB_FAN_2_INSTALLED		BIT(3)
+#define PB_FAN_1_PULSE_MASK		(BIT(4) | BIT(5))
+#define PB_FAN_1_RPM			BIT(6)
+#define PB_FAN_1_INSTALLED		BIT(7)
+
+enum pmbus_fan_mode { percent = 0, rpm };
+
+/*
+ * STATUS_BYTE, STATUS_WORD (lower)
+ */
+#define PB_STATUS_NONE_ABOVE		BIT(0)
+#define PB_STATUS_CML			BIT(1)
+#define PB_STATUS_TEMPERATURE		BIT(2)
+#define PB_STATUS_VIN_UV		BIT(3)
+#define PB_STATUS_IOUT_OC		BIT(4)
+#define PB_STATUS_VOUT_OV		BIT(5)
+#define PB_STATUS_OFF			BIT(6)
+#define PB_STATUS_BUSY			BIT(7)
+
+/*
+ * STATUS_WORD (upper)
+ */
+#define PB_STATUS_UNKNOWN		BIT(8)
+#define PB_STATUS_OTHER			BIT(9)
+#define PB_STATUS_FANS			BIT(10)
+#define PB_STATUS_POWER_GOOD_N		BIT(11)
+#define PB_STATUS_WORD_MFR		BIT(12)
+#define PB_STATUS_INPUT			BIT(13)
+#define PB_STATUS_IOUT_POUT		BIT(14)
+#define PB_STATUS_VOUT			BIT(15)
+
+/*
+ * STATUS_IOUT
+ */
+#define PB_POUT_OP_WARNING		BIT(0)
+#define PB_POUT_OP_FAULT		BIT(1)
+#define PB_POWER_LIMITING		BIT(2)
+#define PB_CURRENT_SHARE_FAULT		BIT(3)
+#define PB_IOUT_UC_FAULT		BIT(4)
+#define PB_IOUT_OC_WARNING		BIT(5)
+#define PB_IOUT_OC_LV_FAULT		BIT(6)
+#define PB_IOUT_OC_FAULT		BIT(7)
+
+/*
+ * STATUS_VOUT, STATUS_INPUT
+ */
+#define PB_VOLTAGE_VIN_OFF		BIT(3)
+#define PB_VOLTAGE_UV_FAULT		BIT(4)
+#define PB_VOLTAGE_UV_WARNING		BIT(5)
+#define PB_VOLTAGE_OV_WARNING		BIT(6)
+#define PB_VOLTAGE_OV_FAULT		BIT(7)
+
+/*
+ * STATUS_INPUT
+ */
+#define PB_PIN_OP_WARNING		BIT(0)
+#define PB_IIN_OC_WARNING		BIT(1)
+#define PB_IIN_OC_FAULT			BIT(2)
+
+/*
+ * STATUS_TEMPERATURE
+ */
+#define PB_TEMP_UT_FAULT		BIT(4)
+#define PB_TEMP_UT_WARNING		BIT(5)
+#define PB_TEMP_OT_WARNING		BIT(6)
+#define PB_TEMP_OT_FAULT		BIT(7)
+
+/*
+ * STATUS_FAN
+ */
+#define PB_FAN_AIRFLOW_WARNING		BIT(0)
+#define PB_FAN_AIRFLOW_FAULT		BIT(1)
+#define PB_FAN_FAN2_SPEED_OVERRIDE	BIT(2)
+#define PB_FAN_FAN1_SPEED_OVERRIDE	BIT(3)
+#define PB_FAN_FAN2_WARNING		BIT(4)
+#define PB_FAN_FAN1_WARNING		BIT(5)
+#define PB_FAN_FAN2_FAULT		BIT(6)
+#define PB_FAN_FAN1_FAULT		BIT(7)
+
+/*
+ * CML_FAULT_STATUS
+ */
+#define PB_CML_FAULT_OTHER_MEM_LOGIC	BIT(0)
+#define PB_CML_FAULT_OTHER_COMM		BIT(1)
+#define PB_CML_FAULT_PROCESSOR		BIT(3)
+#define PB_CML_FAULT_MEMORY		BIT(4)
+#define PB_CML_FAULT_PACKET_ERROR	BIT(5)
+#define PB_CML_FAULT_INVALID_DATA	BIT(6)
+#define PB_CML_FAULT_INVALID_COMMAND	BIT(7)
+
+enum pmbus_sensor_classes {
+	PSC_VOLTAGE_IN = 0,
+	PSC_VOLTAGE_OUT,
+	PSC_CURRENT_IN,
+	PSC_CURRENT_OUT,
+	PSC_POWER,
+	PSC_TEMPERATURE,
+	PSC_FAN,
+	PSC_PWM,
+	PSC_NUM_CLASSES		/* Number of power sensor classes */
+};
+
+#define PMBUS_PAGES	32	/* Per PMBus specification */
+#define PMBUS_PHASES	10	/* Maximum number of phases per page */
+
+/* Functionality bit mask */
+#define PMBUS_HAVE_VIN		BIT(0)
+#define PMBUS_HAVE_VCAP		BIT(1)
+#define PMBUS_HAVE_VOUT		BIT(2)
+#define PMBUS_HAVE_IIN		BIT(3)
+#define PMBUS_HAVE_IOUT		BIT(4)
+#define PMBUS_HAVE_PIN		BIT(5)
+#define PMBUS_HAVE_POUT		BIT(6)
+#define PMBUS_HAVE_FAN12	BIT(7)
+#define PMBUS_HAVE_FAN34	BIT(8)
+#define PMBUS_HAVE_TEMP		BIT(9)
+#define PMBUS_HAVE_TEMP2	BIT(10)
+#define PMBUS_HAVE_TEMP3	BIT(11)
+#define PMBUS_HAVE_STATUS_VOUT	BIT(12)
+#define PMBUS_HAVE_STATUS_IOUT	BIT(13)
+#define PMBUS_HAVE_STATUS_INPUT	BIT(14)
+#define PMBUS_HAVE_STATUS_TEMP	BIT(15)
+#define PMBUS_HAVE_STATUS_FAN12	BIT(16)
+#define PMBUS_HAVE_STATUS_FAN34	BIT(17)
+#define PMBUS_HAVE_VMON		BIT(18)
+#define PMBUS_HAVE_STATUS_VMON	BIT(19)
+#define PMBUS_HAVE_PWM12	BIT(20)
+#define PMBUS_HAVE_PWM34	BIT(21)
+#define PMBUS_HAVE_SAMPLES	BIT(22)
+
+#define PMBUS_PHASE_VIRTUAL	BIT(30)	/* Phases on this page are virtual */
+#define PMBUS_PAGE_VIRTUAL	BIT(31)	/* Page is virtual */
+
+enum pmbus_data_format { linear = 0, direct, vid };
+enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv };
+
+struct pmbus_driver_info {
+	int pages;		/* Total number of pages */
+	u8 phases[PMBUS_PAGES];	/* Number of phases per page */
+	enum pmbus_data_format format[PSC_NUM_CLASSES];
+	enum vrm_version vrm_version[PMBUS_PAGES]; /* vrm version per page */
+	/*
+	 * Support one set of coefficients for each sensor type
+	 * Used for chips providing data in direct mode.
+	 */
+	int m[PSC_NUM_CLASSES];	/* mantissa for direct data format */
+	int b[PSC_NUM_CLASSES];	/* offset */
+	int R[PSC_NUM_CLASSES];	/* exponent */
+
+	u32 func[PMBUS_PAGES];	/* Functionality, per page */
+	u32 pfunc[PMBUS_PHASES];/* Functionality, per phase */
+	/*
+	 * The following functions map manufacturing specific register values
+	 * to PMBus standard register values. Specify only if mapping is
+	 * necessary.
+	 * Functions return the register value (read) or zero (write) if
+	 * successful. A return value of -ENODATA indicates that there is no
+	 * manufacturer specific register, but that a standard PMBus register
+	 * may exist. Any other negative return value indicates that the
+	 * register does not exist, and that no attempt should be made to read
+	 * the standard register.
+	 */
+	int (*read_byte_data)(struct i2c_client *client, int page, int reg);
+	int (*read_word_data)(struct i2c_client *client, int page, int phase,
+			      int reg);
+	int (*write_word_data)(struct i2c_client *client, int page, int reg,
+			       u16 word);
+	int (*write_byte)(struct i2c_client *client, int page, u8 value);
+	/*
+	 * The identify function determines supported PMBus functionality.
+	 * This function is only necessary if a chip driver supports multiple
+	 * chips, and the chip functionality is not pre-determined.
+	 */
+	int (*identify)(struct i2c_client *client,
+			struct pmbus_driver_info *info);
+
+	/* Regulator functionality, if supported by this chip driver. */
+	int num_regulators;
+	const struct regulator_desc *reg_desc;
+
+	/* custom attributes */
+	const struct attribute_group **groups;
+};
+
+/* Regulator ops */
+
+extern const struct regulator_ops pmbus_regulator_ops;
+
+/* Macro for filling in array of struct regulator_desc */
+#define PMBUS_REGULATOR(_name, _id)				\
+	[_id] = {						\
+		.name = (_name # _id),				\
+		.id = (_id),					\
+		.of_match = of_match_ptr(_name # _id),		\
+		.regulators_node = of_match_ptr("regulators"),	\
+		.ops = &pmbus_regulator_ops,			\
+		.type = REGULATOR_VOLTAGE,			\
+		.owner = THIS_MODULE,				\
+	}
+
+/* Function declarations */
+
+void pmbus_clear_cache(struct i2c_client *client);
+int pmbus_set_page(struct i2c_client *client, int page, int phase);
+int pmbus_read_word_data(struct i2c_client *client, int page, int phase,
+			 u8 reg);
+int pmbus_write_word_data(struct i2c_client *client, int page, u8 reg,
+			  u16 word);
+int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg);
+int pmbus_write_byte(struct i2c_client *client, int page, u8 value);
+int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg,
+			  u8 value);
+int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
+			   u8 mask, u8 value);
+void pmbus_clear_faults(struct i2c_client *client);
+bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg);
+bool pmbus_check_word_register(struct i2c_client *client, int page, int reg);
+int pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info);
+const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client
+						      *client);
+int pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id,
+			      enum pmbus_fan_mode mode);
+int pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id,
+			      enum pmbus_fan_mode mode);
+int pmbus_update_fan(struct i2c_client *client, int page, int id,
+		     u8 config, u8 mask, u16 command);
+struct dentry *pmbus_get_debugfs_dir(struct i2c_client *client);
+
+#endif /* PMBUS_H */
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_api.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_api.c
new file mode 100644
index 000000000000..338417125569
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_api.c
@@ -0,0 +1,478 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ *  Description of various APIs related to PSU component
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/dmi.h>
+#include <linux/kobject.h>
+#include "../../../../../pddf/i2c/modules/include/pddf_psu_defs.h"
+#include "pddf_psu_driver.h"
+
+
+#define PSU_REG_VOUT_MODE 0x20
+#define PSU_REG_READ_VOUT 0x8b
+
+/*#define PSU_DEBUG*/
+#ifdef PSU_DEBUG
+#define psu_dbg(...) printk(__VA_ARGS__)
+#else
+#define psu_dbg(...)
+#endif
+
+
+void get_psu_duplicate_sysfs(int idx, char *str)
+{
+    switch (idx)
+    {
+        case PSU_V_OUT:
+            strscpy(str, "in3_input", ATTR_NAME_LEN);
+            break;
+        case PSU_I_OUT:
+            strscpy(str, "curr2_input", ATTR_NAME_LEN);
+            break;
+        case PSU_P_OUT:
+            strscpy(str, "power2_input", ATTR_NAME_LEN);
+            break;
+        case PSU_FAN1_SPEED:
+            strscpy(str, "fan1_input", ATTR_NAME_LEN);
+            break;
+        case PSU_TEMP1_INPUT:
+            strscpy(str, "temp1_input", ATTR_NAME_LEN);
+            break;
+        default:
+            break;
+    }
+
+    return;
+}
+
+static int two_complement_to_int(u16 data, u8 valid_bit, int mask)
+{
+    u16  valid_data  = data & mask;
+    bool is_negative = valid_data >> (valid_bit - 1);
+
+    return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data;
+}
+
+static u8 psu_get_vout_mode(struct i2c_client *client)
+{
+    u8 status = 0, retry = 10;
+    uint8_t offset = PSU_REG_VOUT_MODE;
+
+    while (retry)
+    {
+        status = i2c_smbus_read_byte_data((struct i2c_client *)client, offset);
+        if (unlikely(status < 0)) 
+        {
+            msleep(60);
+            retry--;
+            continue;
+        }
+        break;
+    }
+
+    if (status < 0)
+    {
+        printk(KERN_ERR "%s: Get PSU Vout mode failed\n", __func__);
+        return 0;
+    }
+    else
+    {
+        /*printk(KERN_ERR "%s: vout_mode reg value 0x%x\n", __func__, status);*/
+        return status;
+    }
+}
+
+static u16 psu_get_v_out(struct i2c_client *client)
+{
+    u16 status = 0, retry = 10;
+    uint8_t offset = PSU_REG_READ_VOUT;
+
+    while (retry) {
+        status = i2c_smbus_read_word_data((struct i2c_client *)client, offset);
+        if (unlikely(status < 0)) {
+            msleep(60);
+            retry--;
+            continue;
+        }
+        break;
+    }
+
+    if (status < 0)
+    {
+        printk(KERN_ERR "%s: Get PSU Vout failed\n", __func__);
+        return 0;
+    }
+    else
+    {
+        /*printk(KERN_ERR "%s: vout reg value 0x%x\n", __func__, status);*/
+        return status;
+    }
+}
+
+int psu_update_hw(struct device *dev, struct psu_attr_info *info, PSU_DATA_ATTR *udata)
+{
+    int status = 0;
+    struct i2c_client *client = to_i2c_client(dev);
+    PSU_SYSFS_ATTR_DATA *sysfs_attr_data = NULL;
+
+
+    mutex_lock(&info->update_lock);
+
+    sysfs_attr_data = udata->access_data;
+    if (sysfs_attr_data->pre_set != NULL)
+    {
+        status = (sysfs_attr_data->pre_set)(client, udata, info);
+        if (status!=0)
+            dev_warn(&client->dev, "%s: pre_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+    }
+    if (sysfs_attr_data->do_set != NULL)
+    {
+        status = (sysfs_attr_data->do_set)(client, udata, info);
+        if (status!=0)
+            dev_warn(&client->dev, "%s: do_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+
+    }
+    if (sysfs_attr_data->post_set != NULL)
+    {
+        status = (sysfs_attr_data->post_set)(client, udata, info);
+        if (status!=0)
+            dev_warn(&client->dev, "%s: post_set function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+    }
+
+    mutex_unlock(&info->update_lock);
+
+    return 0;
+}
+
+
+int psu_update_attr(struct device *dev, struct psu_attr_info *data, PSU_DATA_ATTR *udata)
+{
+    int status = 0;
+    struct i2c_client *client = to_i2c_client(dev);
+    PSU_SYSFS_ATTR_DATA *sysfs_attr_data=NULL;
+
+    mutex_lock(&data->update_lock);
+
+    if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || !data->valid)
+    {
+        dev_dbg(&client->dev, "Starting update for %s\n", data->name);
+
+        sysfs_attr_data = udata->access_data;
+        if (sysfs_attr_data->pre_get != NULL)
+        {
+            status = (sysfs_attr_data->pre_get)(client, udata, data);
+            if (status!=0)
+                dev_warn(&client->dev, "%s: pre_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+        }
+        if (sysfs_attr_data->do_get != NULL)
+        {
+            status = (sysfs_attr_data->do_get)(client, udata, data);
+            if (status!=0)
+                dev_warn(&client->dev, "%s: do_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+
+        }
+        if (sysfs_attr_data->post_get != NULL)
+        {
+            status = (sysfs_attr_data->post_get)(client, udata, data);
+            if (status!=0)
+                dev_warn(&client->dev, "%s: post_get function fails for %s attribute. ret %d\n", __FUNCTION__, udata->aname, status);
+        }
+
+        data->last_updated = jiffies;
+        data->valid = 1;
+    }
+
+    mutex_unlock(&data->update_lock);
+    return 0;
+}
+
+ssize_t psu_show_default(struct device *dev, struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    struct i2c_client *client = to_i2c_client(dev);
+    struct psu_data *data = i2c_get_clientdata(client);
+    PSU_PDATA *pdata = (PSU_PDATA *)(client->dev.platform_data);
+    PSU_DATA_ATTR *usr_data = NULL;
+    struct psu_attr_info *sysfs_attr_info = NULL;
+    int i, status=0;
+    u16 value = 0;
+    u8 vout_mode = 0;
+    int exponent, mantissa;
+    int multiplier = 1000;
+    char new_str[ATTR_NAME_LEN] = "";
+    PSU_SYSFS_ATTR_DATA *ptr = NULL;
+
+    for (i=0;i<data->num_attr;i++)
+    {
+        ptr = (PSU_SYSFS_ATTR_DATA *)pdata->psu_attrs[i].access_data;
+        get_psu_duplicate_sysfs(ptr->index , new_str);
+        if ( strcmp(attr->dev_attr.attr.name, pdata->psu_attrs[i].aname) == 0 || strcmp(attr->dev_attr.attr.name, new_str) == 0 )
+        {
+            sysfs_attr_info = &data->attr_info[i];
+            usr_data = &pdata->psu_attrs[i];
+            strscpy(new_str, "", ATTR_NAME_LEN);
+        }
+    }
+
+    if (sysfs_attr_info==NULL || usr_data==NULL)
+    {
+        printk(KERN_ERR "%s is not supported attribute for this client\n", attr->dev_attr.attr.name);
+        goto exit;
+    }
+
+    psu_update_attr(dev, sysfs_attr_info, usr_data);
+
+    switch(attr->index)
+    {
+        case PSU_PRESENT:
+        case PSU_POWER_GOOD:
+            status = sysfs_attr_info->val.intval;
+            return sprintf(buf, "%d\n", status);
+            break;
+        case PSU_MODEL_NAME:
+        case PSU_MFR_ID:
+        case PSU_SERIAL_NUM:
+        case PSU_FAN_DIR:
+            return sprintf(buf, "%s\n", sysfs_attr_info->val.strval);
+            break;
+        case PSU_V_OUT:
+            value = psu_get_v_out(client);
+            vout_mode = psu_get_vout_mode(client);
+            if ((vout_mode >> 5) == 0)
+                exponent = two_complement_to_int(vout_mode & 0x1f, 5, 0x1f);
+            else
+                exponent = 0;
+    
+            mantissa = value;
+            if (exponent >= 0)
+                return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier);
+			
+            else
+                return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent));
+            break;
+
+        case PSU_V_OUT_MIN:
+        case PSU_V_OUT_MAX:
+            multiplier = 1000;
+            value = sysfs_attr_info->val.shortval;
+            vout_mode = psu_get_vout_mode(client);
+            if ((vout_mode >> 5) == 0)
+                exponent = two_complement_to_int(vout_mode & 0x1f, 5, 0x1f);
+            else
+                exponent = 0;
+            mantissa = two_complement_to_int(value & 0xffff, 16, 0xffff);
+			
+            if (exponent >= 0)
+                return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier);
+            else
+                return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent));
+            break;       
+        case PSU_I_OUT:
+        case PSU_V_IN:
+        case PSU_I_IN:
+        case PSU_P_OUT_MAX:
+            multiplier = 1000;
+            value = sysfs_attr_info->val.shortval;
+            exponent = two_complement_to_int(value >> 11, 5, 0x1f);
+            mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff);
+            if (exponent >= 0)
+                return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier);
+            else
+                return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent));
+            break;
+        case PSU_P_IN:
+        case PSU_P_OUT:
+            multiplier = 1000000;
+            value = sysfs_attr_info->val.shortval;
+            exponent = two_complement_to_int(value >> 11, 5, 0x1f);
+            mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff);
+            if (exponent >= 0)
+                return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier);
+            else
+                return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent));
+
+            break;
+        case PSU_FAN1_SPEED:
+            value = sysfs_attr_info->val.shortval;
+            exponent = two_complement_to_int(value >> 11, 5, 0x1f);
+            mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff);
+            if (exponent >= 0)
+                return sprintf(buf, "%d\n", (mantissa << exponent));
+            else
+                return sprintf(buf, "%d\n", (mantissa) / (1 << -exponent));
+
+            break;
+        case PSU_TEMP1_INPUT:
+        case PSU_TEMP1_HIGH_THRESHOLD:
+            multiplier = 1000;
+            value = sysfs_attr_info->val.shortval;
+            exponent = two_complement_to_int(value >> 11, 5, 0x1f);
+            mantissa = two_complement_to_int(value & 0x7ff, 11, 0x7ff);
+            if (exponent >= 0)
+                return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier);
+            else
+                return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent));
+
+            break;
+        default:
+            printk(KERN_ERR "%s: Unable to find attribute index for %s\n", __FUNCTION__, usr_data->aname);
+            goto exit;
+    }
+
+exit:
+    return sprintf(buf, "%d\n", status);
+}
+
+
+ssize_t psu_store_default(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    struct i2c_client *client = to_i2c_client(dev);
+    struct psu_data *data = i2c_get_clientdata(client);
+    PSU_PDATA *pdata = (PSU_PDATA *)(client->dev.platform_data);
+    PSU_DATA_ATTR *usr_data = NULL;
+    struct psu_attr_info *sysfs_attr_info = NULL;
+    int i;
+
+    for (i=0;i<data->num_attr;i++)
+    {
+        if (strcmp(data->attr_info[i].name, attr->dev_attr.attr.name) == 0 && strcmp(pdata->psu_attrs[i].aname, attr->dev_attr.attr.name) == 0)
+        {
+            sysfs_attr_info = &data->attr_info[i];
+            usr_data = &pdata->psu_attrs[i];
+        }
+    }
+
+    if (sysfs_attr_info==NULL || usr_data==NULL) {
+        printk(KERN_ERR "%s is not supported attribute for this client\n", attr->dev_attr.attr.name);
+        goto exit;
+    }
+
+    switch(attr->index)
+    {
+        /*No write attributes for now in PSU*/
+        default:
+            goto exit;
+    }
+
+    psu_update_hw(dev, sysfs_attr_info, usr_data);
+
+exit:
+    return count;
+}
+
+extern int board_i2c_cpld_read_new(unsigned short cpld_addr, char *name, u8 reg);
+int sonic_i2c_get_psu_byte_default(void *client, PSU_DATA_ATTR *adata, void *data)
+{
+    int status = 0;
+    int val = 0;
+    struct psu_attr_info *padata = (struct psu_attr_info *)data;
+
+
+    if (strncmp(adata->devtype, "cpld", strlen("cpld")) == 0)
+    {
+        val = board_i2c_cpld_read_new(adata->devaddr, adata->devname, adata->offset);
+        if (val < 0){
+            return val;
+		}
+        padata->val.intval =  ((val & adata->mask) == adata->cmpval);
+        psu_dbg(KERN_ERR "%s: byte_value = 0x%x\n", __FUNCTION__, padata->val.intval);
+    }
+
+    return status;
+}
+
+int sonic_i2c_get_psu_block_default(void *client, PSU_DATA_ATTR *adata, void *data)
+{
+    int status = 0, retry = 10;
+    struct psu_attr_info *padata = (struct psu_attr_info *)data;
+    char buf[32]="";  //temporary placeholder for block data
+    uint8_t offset = (uint8_t)adata->offset;
+    int data_len = adata->len;
+
+    while (retry)
+    {
+        status = i2c_smbus_read_i2c_block_data((struct i2c_client *)client, offset, data_len-1, buf);
+        if (unlikely(status<0))
+        {
+            msleep(60);
+            retry--;
+            continue;
+        }
+        break;
+    }
+
+    if (status < 0)
+    {
+        buf[0] = '\0';
+        dev_dbg(&((struct i2c_client *)client)->dev, "unable to read block of data from (0x%x)\n", ((struct i2c_client *)client)->addr);
+    }
+    else
+    {
+        buf[data_len-1] = '\0';
+    }
+
+    if (strncmp(adata->devtype, "pmbus", strlen("pmbus")) == 0)
+        strscpy(padata->val.strval, buf+1, data_len-1);
+    else
+        strscpy(padata->val.strval, buf, data_len);
+
+    psu_dbg(KERN_ERR "%s: status = %d, buf block: %s\n", __FUNCTION__, status, padata->val.strval);
+    return 0;
+}
+
+int sonic_i2c_get_psu_word_default(void *client, PSU_DATA_ATTR *adata, void *data)
+{
+
+    int status = 0, retry = 10;
+    struct psu_attr_info *padata = (struct psu_attr_info *)data;
+    uint8_t offset = (uint8_t)adata->offset;
+
+    while (retry) {
+        status = i2c_smbus_read_word_data((struct i2c_client *)client, offset);
+        if (unlikely(status < 0)) {
+            msleep(60);
+            retry--;
+            continue;
+        }
+        break;
+    }
+
+    if (status < 0)
+    {
+        padata->val.shortval = 0;
+        dev_dbg(&((struct i2c_client *)client)->dev, "unable to read a word from (0x%x)\n", ((struct i2c_client *)client)->addr);
+    }
+    else
+    {
+        padata->val.shortval = status;
+    }
+
+    psu_dbg(KERN_ERR "%s: word value : %d\n", __FUNCTION__, padata->val.shortval);
+    return 0;
+}
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_api.h b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_api.h
new file mode 100644
index 000000000000..24e4ea02e7ec
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_api.h
@@ -0,0 +1,31 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * Description
+ *  PSU driver related api declarations
+ */
+
+#ifndef __PDDF_PSU_API_H__
+#define __PDDF_PSU_API_H__
+
+extern void get_psu_duplicate_sysfs(int idx, char *str);
+extern ssize_t psu_show_default(struct device *dev, struct device_attribute *da, char *buf);
+extern ssize_t psu_store_default(struct device *dev, struct device_attribute *da, const char *buf, size_t count);
+
+extern int sonic_i2c_get_psu_byte_default(void *client, PSU_DATA_ATTR *adata, void *data);
+extern int sonic_i2c_get_psu_block_default(void *client, PSU_DATA_ATTR *adata, void *data);
+extern int sonic_i2c_get_psu_word_default(void *client, PSU_DATA_ATTR *adata, void *data);
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_defs.h b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_defs.h
new file mode 100644
index 000000000000..60e81a9f5878
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_defs.h
@@ -0,0 +1,90 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * Description:
+ *  Platform PSU defines/structures header file
+ */
+
+#ifndef __PDDF_PSU_DEFS_H__
+#define __PDDF_PSU_DEFS_H__
+
+
+#define MAX_NUM_PSU 5
+#define MAX_PSU_ATTRS 32
+#define ATTR_NAME_LEN 32
+#define STR_ATTR_SIZE 32
+#define DEV_TYPE_LEN 32
+
+/* Each client has this additional data 
+ */
+
+typedef struct PSU_DATA_ATTR
+{
+    char aname[ATTR_NAME_LEN];                    // attr name, taken from enum psu_sysfs_attributes
+    char devtype[DEV_TYPE_LEN];       // either a 'eeprom' or 'cpld', or 'pmbus' attribute
+    char devname[DEV_TYPE_LEN];       // Name of the device from where this sysfs attr is read
+    uint32_t devaddr;
+    uint32_t offset;
+    uint32_t mask;
+    uint32_t cmpval;
+    uint32_t len;
+    void *access_data;
+
+}PSU_DATA_ATTR;
+
+typedef struct PSU_SYSFS_ATTR_DATA
+{
+    int index;
+    unsigned short mode;
+    ssize_t (*show)(struct device *dev, struct device_attribute *da, char *buf);
+    int (*pre_get)(void *client, PSU_DATA_ATTR *adata, void *data);
+    int (*do_get)(void *client, PSU_DATA_ATTR *adata, void *data);
+    int (*post_get)(void *client, PSU_DATA_ATTR *adata, void *data);
+    ssize_t (*store)(struct device *dev, struct device_attribute *da, const char *buf, size_t count);
+    int (*pre_set)(void *client, PSU_DATA_ATTR *adata, void *data);
+    int (*do_set)(void *client, PSU_DATA_ATTR *adata, void *data);
+    int (*post_set)(void *client, PSU_DATA_ATTR *adata, void *data);
+    void *data;
+} PSU_SYSFS_ATTR_DATA;
+
+typedef struct PSU_SYSFS_ATTR_DATA_ENTRY
+{
+    char name[ATTR_NAME_LEN];
+    PSU_SYSFS_ATTR_DATA *a_ptr;
+} PSU_SYSFS_ATTR_DATA_ENTRY;
+
+
+/* PSU CLIENT DATA - PLATFORM DATA FOR PSU CLIENT */
+typedef struct PSU_DATA
+{
+    int idx;    // psu index
+    int num_psu_fans;
+    PSU_DATA_ATTR psu_attr;
+    int len;             // no of valid attributes for this psu client
+    PSU_DATA_ATTR psu_attrs[MAX_PSU_ATTRS]; 
+}PSU_DATA;
+
+typedef struct PSU_PDATA
+{
+    int idx;                    // psu index
+    int num_psu_fans;      // num of fans supported by the PSU
+    int len;             // no of valid attributes for this psu client
+    PSU_DATA_ATTR *psu_attrs; 
+}PSU_PDATA;
+
+extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
+extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_driver.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_driver.c
new file mode 100644
index 000000000000..fa5d31a0866a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_driver.c
@@ -0,0 +1,398 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * A pddf kernel module driver for PSU
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/dmi.h>
+#include <linux/kobject.h>
+#include "../../../../../pddf/i2c/modules/include/pddf_client_defs.h"
+#include "../../../../../pddf/i2c/modules/include/pddf_psu_defs.h"
+#include "../../../../../pddf/i2c/modules/include/pddf_psu_driver.h"
+#include "../../../../../pddf/i2c/modules/include/pddf_psu_api.h"
+
+
+static unsigned short normal_i2c[] = { I2C_CLIENT_END };
+
+struct pddf_ops_t pddf_psu_ops = {
+	.pre_init = NULL,
+	.post_init = NULL,
+
+	.pre_probe = NULL,
+	.post_probe = NULL,
+
+	.pre_remove = NULL,
+	.post_remove = NULL,
+
+	.pre_exit = NULL,
+	.post_exit = NULL,
+};
+EXPORT_SYMBOL(pddf_psu_ops);
+
+
+PSU_SYSFS_ATTR_DATA access_psu_present = {PSU_PRESENT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_byte_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_present);
+
+PSU_SYSFS_ATTR_DATA access_psu_model_name = {PSU_MODEL_NAME, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_model_name);
+
+PSU_SYSFS_ATTR_DATA access_psu_power_good = {PSU_POWER_GOOD, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_byte_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_power_good);
+
+PSU_SYSFS_ATTR_DATA access_psu_mfr_id = {PSU_MFR_ID, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_mfr_id);
+
+PSU_SYSFS_ATTR_DATA access_psu_serial_num = {PSU_SERIAL_NUM, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_serial_num);
+
+PSU_SYSFS_ATTR_DATA access_psu_fan_dir = {PSU_FAN_DIR, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_block_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_fan_dir);
+
+PSU_SYSFS_ATTR_DATA access_psu_v_out = {PSU_V_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_v_out);
+
+PSU_SYSFS_ATTR_DATA access_psu_v_out_min = {PSU_V_OUT_MIN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_v_out_min);
+
+PSU_SYSFS_ATTR_DATA access_psu_v_out_max = {PSU_V_OUT_MAX, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_v_out_max);
+
+PSU_SYSFS_ATTR_DATA access_psu_i_out = {PSU_I_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_i_out);
+
+PSU_SYSFS_ATTR_DATA access_psu_p_out = {PSU_P_OUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_p_out);
+
+PSU_SYSFS_ATTR_DATA access_psu_p_out_max = {PSU_P_OUT_MAX, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_p_out_max);
+
+PSU_SYSFS_ATTR_DATA access_psu_fan1_speed_rpm = {PSU_FAN1_SPEED, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_fan1_speed_rpm);
+
+PSU_SYSFS_ATTR_DATA access_psu_temp1_input = {PSU_TEMP1_INPUT, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_temp1_input);
+
+PSU_SYSFS_ATTR_DATA access_psu_temp1_high_threshold = {PSU_TEMP1_HIGH_THRESHOLD, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_temp1_high_threshold);
+
+PSU_SYSFS_ATTR_DATA access_psu_v_in = {PSU_V_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_v_in);
+
+PSU_SYSFS_ATTR_DATA access_psu_i_in = {PSU_I_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_i_in);
+
+PSU_SYSFS_ATTR_DATA access_psu_p_in = {PSU_P_IN, S_IRUGO, psu_show_default, NULL, sonic_i2c_get_psu_word_default, NULL, NULL, NULL, NULL, NULL};
+EXPORT_SYMBOL(access_psu_p_in);
+
+PSU_SYSFS_ATTR_DATA_ENTRY psu_sysfs_attr_data_tbl[]=
+{
+	{ "psu_present", &access_psu_present},
+	{ "psu_model_name", &access_psu_model_name},
+	{ "psu_power_good" , &access_psu_power_good},
+	{ "psu_mfr_id" , &access_psu_mfr_id},
+	{ "psu_serial_num" , &access_psu_serial_num},
+	{ "psu_fan_dir" , &access_psu_fan_dir},
+	{ "psu_v_out" , &access_psu_v_out},
+	{ "psu_v_out_min" , &access_psu_v_out_min},
+	{ "psu_v_out_max" , &access_psu_v_out_max},
+	{ "psu_i_out" , &access_psu_i_out},
+	{ "psu_p_out" , &access_psu_p_out},
+	{ "psu_p_out_max" , &access_psu_p_out_max},
+	{ "psu_fan1_speed_rpm" , &access_psu_fan1_speed_rpm},
+	{ "psu_temp1_input" , &access_psu_temp1_input},
+	{ "psu_temp1_high_threshold" , &access_psu_temp1_high_threshold},
+	{ "psu_v_in" , &access_psu_v_in},
+	{ "psu_i_in" , &access_psu_i_in},
+	{ "psu_p_in" , &access_psu_p_in}
+};
+
+void *get_psu_access_data(char *name)
+{
+	int i=0;
+	for(i=0; i<(sizeof(psu_sysfs_attr_data_tbl)/sizeof(psu_sysfs_attr_data_tbl[0])); i++)
+	{
+		if(strcmp(name, psu_sysfs_attr_data_tbl[i].name) ==0)
+		{
+			return &psu_sysfs_attr_data_tbl[i];
+		}
+	}
+	return NULL;
+}
+EXPORT_SYMBOL(get_psu_access_data);
+
+
+static int psu_probe(struct i2c_client *client,
+            const struct i2c_device_id *dev_id)
+{
+    struct psu_data *data;
+    int status =0;
+    int i,num, j=0;
+    PSU_PDATA *psu_platform_data;
+    PSU_DATA_ATTR *data_attr;
+    PSU_SYSFS_ATTR_DATA_ENTRY *sysfs_data_entry;
+    char new_str[ATTR_NAME_LEN] = "";
+
+
+	if (client == NULL) {
+		printk("NULL Client.. \n");
+		goto exit;
+	}
+
+	if (pddf_psu_ops.pre_probe)
+    {
+        status = (pddf_psu_ops.pre_probe)(client, dev_id);
+        if (status != 0)
+            goto exit;
+    }
+
+    if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
+        status = -EIO;
+        goto exit;
+    }
+
+    data = kzalloc(sizeof(struct psu_data), GFP_KERNEL);
+    if (!data) {
+        status = -ENOMEM;
+        goto exit;
+    }
+
+    i2c_set_clientdata(client, data);
+    dev_info(&client->dev, "chip found\n");
+
+	/* Take control of the platform data */
+	psu_platform_data = (PSU_PDATA *)(client->dev.platform_data);
+	num = psu_platform_data->len;
+	data->index = psu_platform_data->idx - 1;
+	data->num_psu_fans = psu_platform_data->num_psu_fans;
+	data->num_attr = num;
+
+
+
+	/* Create and Add supported attr in the 'attributes' list */
+	for (i=0; i<num; i++)
+	{
+		/*struct attribute *aptr = NULL;*/
+		struct sensor_device_attribute *dy_ptr = NULL;
+		data_attr = psu_platform_data->psu_attrs + i;
+		sysfs_data_entry = get_psu_access_data(data_attr->aname);
+		if (sysfs_data_entry == NULL)
+		{
+			printk(KERN_ERR "%s: Wrong attribute name provided by user '%s'\n", __FUNCTION__, data_attr->aname);
+			continue;
+		}
+		
+		dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL);
+		dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1];
+		strscpy((char *)dy_ptr->dev_attr.attr.name, data_attr->aname, ATTR_NAME_LEN);
+		dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode;
+		dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show;
+		dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store;
+		dy_ptr->index = sysfs_data_entry->a_ptr->index;
+		
+		data->psu_attribute_list[i] = &dy_ptr->dev_attr.attr;
+		strscpy(data->attr_info[i].name, data_attr->aname, ATTR_NAME_LEN);
+		data->attr_info[i].valid = 0;
+		mutex_init(&data->attr_info[i].update_lock);
+
+		/*Create a duplicate entry*/
+		get_psu_duplicate_sysfs(dy_ptr->index, new_str);
+		if (strcmp(new_str,""))
+		{
+			dy_ptr = (struct sensor_device_attribute *)kzalloc(sizeof(struct sensor_device_attribute)+ATTR_NAME_LEN, GFP_KERNEL);
+			dy_ptr->dev_attr.attr.name = (char *)&dy_ptr[1];
+			strscpy((char *)dy_ptr->dev_attr.attr.name, new_str, ATTR_NAME_LEN);
+			dy_ptr->dev_attr.attr.mode = sysfs_data_entry->a_ptr->mode;
+			dy_ptr->dev_attr.show = sysfs_data_entry->a_ptr->show;
+			dy_ptr->dev_attr.store = sysfs_data_entry->a_ptr->store;
+			dy_ptr->index = sysfs_data_entry->a_ptr->index;
+
+			data->psu_attribute_list[num+j] = &dy_ptr->dev_attr.attr;
+			j++;
+			strscpy(new_str,"", ATTR_NAME_LEN);
+		}
+	}
+	data->psu_attribute_list[i+j] = NULL;
+	data->psu_attribute_group.attrs = data->psu_attribute_list;
+
+    /* Register sysfs hooks */
+    status = sysfs_create_group(&client->dev.kobj, &data->psu_attribute_group);
+    if (status) {
+        goto exit_free;
+    }
+
+	data->hwmon_dev = hwmon_device_register_with_info(&client->dev, client->name, NULL, NULL, NULL);
+	if (IS_ERR(data->hwmon_dev)) {
+		status = PTR_ERR(data->hwmon_dev);
+		goto exit_remove;
+	}
+
+    dev_info(&client->dev, "%s: psu '%s'\n",
+         dev_name(data->hwmon_dev), client->name);
+
+	/* Add a support for post probe function */
+    if (pddf_psu_ops.post_probe)
+    {
+        status = (pddf_psu_ops.post_probe)(client, dev_id);
+        if (status != 0)
+            goto exit_remove;
+    }
+
+    return 0;
+
+
+exit_remove:
+    sysfs_remove_group(&client->dev.kobj, &data->psu_attribute_group);
+exit_free:
+	/* Free all the allocated attributes */
+	for (i=0;data->psu_attribute_list[i]!=NULL;i++)
+	{
+		struct sensor_device_attribute *ptr = (struct sensor_device_attribute *)data->psu_attribute_list[i];
+		kfree(ptr);
+		data->psu_attribute_list[i] = NULL;
+		pddf_dbg(PSU, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__);
+	}
+    kfree(data);
+exit:
+    return status;
+}
+
+static void psu_remove(struct i2c_client *client)
+{
+	int i=0, ret = 0;
+    struct psu_data *data = i2c_get_clientdata(client);
+	PSU_PDATA *platdata = (PSU_PDATA *)client->dev.platform_data; // use dev_get_platdata()
+	PSU_DATA_ATTR *platdata_sub = platdata->psu_attrs;
+	struct sensor_device_attribute *ptr = NULL;
+
+	if (pddf_psu_ops.pre_remove)
+    {
+        ret = (pddf_psu_ops.pre_remove)(client);
+        if (ret!=0)
+            printk(KERN_ERR "FAN pre_remove function failed\n");
+    }
+
+	hwmon_device_unregister(data->hwmon_dev);
+	sysfs_remove_group(&client->dev.kobj, &data->psu_attribute_group);
+	for (i=0; data->psu_attribute_list[i]!=NULL; i++)
+    {
+        ptr = (struct sensor_device_attribute *)data->psu_attribute_list[i];
+		kfree(ptr);
+		data->psu_attribute_list[i] = NULL;
+	}
+    pddf_dbg(PSU, KERN_ERR "%s: Freed all the memory allocated for attributes\n", __FUNCTION__);
+    kfree(data);
+	if (platdata_sub) {
+		printk(KERN_DEBUG "%s: Freeing platform subdata\n", __FUNCTION__);
+		kfree(platdata_sub);
+	}
+	if (platdata) {
+		printk(KERN_DEBUG "%s: Freeing platform data\n", __FUNCTION__);
+		kfree(platdata);
+	}
+
+	if (pddf_psu_ops.post_remove)
+    {
+        ret = (pddf_psu_ops.post_remove)(client);
+        if (ret!=0)
+            printk(KERN_ERR "FAN post_remove function failed\n");
+    }
+}
+
+enum psu_intf
+{
+	eeprom_intf,
+	smbus_intf
+};
+
+static const struct i2c_device_id psu_id[] = {
+	{"psu_eeprom", eeprom_intf},
+	{"psu_pmbus", smbus_intf},
+	{}
+};
+
+MODULE_DEVICE_TABLE(i2c, psu_id);
+
+static struct i2c_driver psu_driver = {
+    .class        = I2C_CLASS_HWMON,
+    .driver = {
+        .name     = "psu",
+    },
+    .probe        = psu_probe,
+    .remove       = psu_remove,
+    .id_table     = psu_id,
+    .address_list = normal_i2c,
+};
+
+int example_fun(void)
+{
+	pddf_dbg(PSU, KERN_ERR "CALLING FUN...\n");
+	return 0;
+}
+EXPORT_SYMBOL(example_fun);
+
+
+int psu_init(void)
+{
+    int status = 0;
+
+    if (pddf_psu_ops.pre_init)
+    {
+        status = (pddf_psu_ops.pre_init)();
+        if (status!=0)
+            return status;
+    }
+
+	pddf_dbg(PSU, KERN_ERR "GENERIC_PSU_DRIVER.. init Invoked..\n");
+    status = i2c_add_driver(&psu_driver);
+    if (status!=0)
+        return status;
+	
+    if (pddf_psu_ops.post_init)
+    {
+        status = (pddf_psu_ops.post_init)();
+        if (status!=0)
+            return status;
+    }
+
+	return status;
+}
+EXPORT_SYMBOL(psu_init);
+
+void psu_exit(void)
+{
+	pddf_dbg(PSU, "GENERIC_PSU_DRIVER.. exit\n");
+	if (pddf_psu_ops.pre_exit) (pddf_psu_ops.pre_exit)();
+    i2c_del_driver(&psu_driver);
+	if (pddf_psu_ops.post_exit) (pddf_psu_ops.post_exit)();
+}
+EXPORT_SYMBOL(psu_exit);
+
+module_init(psu_init);
+module_exit(psu_exit);
+
+MODULE_AUTHOR("Broadcom");
+MODULE_DESCRIPTION("psu driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_driver.h b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_driver.h
new file mode 100644
index 000000000000..a94cf7441dbc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/psu_driver/pddf_psu_driver.h
@@ -0,0 +1,70 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * Description
+ *  PSU driver data structures
+ */
+#ifndef __PDDF_PSU_DRIVER_H__
+#define __PDDF_PSU_DRIVER_H__
+
+enum psu_sysfs_attributes {
+    PSU_PRESENT,
+    PSU_MODEL_NAME,
+    PSU_POWER_GOOD,
+	PSU_MFR_ID,
+	PSU_SERIAL_NUM,
+	PSU_FAN_DIR,
+    PSU_V_OUT,
+    PSU_V_OUT_MIN,
+    PSU_V_OUT_MAX,
+    PSU_I_OUT,
+    PSU_P_OUT, /* This is in micro watts to comply with lm-sensors */
+    PSU_P_OUT_MAX,
+    PSU_FAN1_SPEED,
+    PSU_TEMP1_INPUT,
+    PSU_TEMP1_HIGH_THRESHOLD,
+    PSU_V_IN,
+    PSU_I_IN,
+	PSU_P_IN,
+	PSU_ATTR_MAX
+};
+
+
+/* Every client has psu_data which is divided into per attribute data */
+struct psu_attr_info {
+	char				name[ATTR_NAME_LEN];
+	struct mutex        update_lock;
+    char                valid;           /* !=0 if registers are valid */
+    unsigned long       last_updated;    /* In jiffies */
+	u8					status;
+	union {
+		char strval[STR_ATTR_SIZE];
+		int	 intval;
+		u16	 shortval;
+		u8   charval;
+	}val;
+};
+struct psu_data {
+	struct device			*hwmon_dev;
+	u8						index;
+	int						num_psu_fans;
+	int						num_attr;
+	struct attribute		*psu_attribute_list[MAX_PSU_ATTRS];
+	struct attribute_group	psu_attribute_group;
+	struct psu_attr_info	attr_info[MAX_PSU_ATTRS];
+};
+
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/tps536c7.c b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/tps536c7.c
new file mode 100644
index 000000000000..3709503e621e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/modules/tps536c7.c
@@ -0,0 +1,133 @@
+/*
+ * Hardware monitoring driver for Texas Instruments TPS536C7
+ *
+ * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
+ * Copyright (c) 2017 Vadim Pasternak <vadimp@mellanox.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include "pmbus.h"
+
+
+#define TPS536C7_PROT_VR12_5MV		0x01 /* VR12.0 mode, 5-mV DAC */
+#define TPS536C7_PROT_VR12_5_10MV	0x02 /* VR12.5 mode, 10-mV DAC */
+#define TPS536C7_PROT_VR13_10MV		0x04 /* VR13.0 mode, 10-mV DAC */
+#define TPS536C7_PROT_IMVP8_5MV		0x05 /* IMVP8 mode, 5-mV DAC */
+#define TPS536C7_PROT_VR13_5MV		0x07 /* VR13.0 mode, 5-mV DAC */
+#define TPS536C7_PAGE_NUM		1
+
+static int tps536c7_identify(struct i2c_client *client,
+			     struct pmbus_driver_info *info)
+{
+    u8 buf[I2C_SMBUS_BLOCK_MAX];
+    int phases_a = 0, phases_b = 0;
+    int i, ret;
+	
+
+    return 1;
+	
+    ret = i2c_smbus_read_block_data(client, PMBUS_IC_DEVICE_ID, buf);
+    if (ret < 0)
+        return ret;
+	
+	dev_err(&client->dev, "jjj device ID: %s\n", buf);
+    if (strncmp("TI\x53\x6C\x70", buf, 5)) {
+        dev_err(&client->dev, "Unexpected device ID: %s\n", buf);
+        return -ENODEV;
+    }
+    #if 0
+    ret = i2c_smbus_read_block_data(client, TPS53676_USER_DATA_03, buf);
+    if (ret < 0)
+        return ret;
+    for (i = 0; i < 2 * TPS53676_MAX_PHASES; i += 2) {
+        if (buf[i + 1] & 0x80) {
+            if (buf[i] & 0x08)
+                phases_b++;
+            else
+                phases_a++;
+            }
+    }
+
+    info->format[PSC_VOLTAGE_OUT] = linear;
+    info->pages = 1;
+    info->phases[0] = phases_a;
+    if (phases_b > 0) {
+        info->pages = 2;
+        info->phases[1] = phases_b;
+    }
+	#endif
+	
+    return 0;
+}
+
+static struct pmbus_driver_info tps536c7_info = {
+	.pages = TPS536C7_PAGE_NUM,
+	.format[PSC_VOLTAGE_IN] = linear,
+	.format[PSC_VOLTAGE_OUT] = linear,
+	.format[PSC_TEMPERATURE] = linear,
+	.format[PSC_CURRENT_OUT] = linear,
+	.format[PSC_POWER] = linear,
+	.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
+		PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
+		PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
+		PMBUS_HAVE_POUT,
+	.identify = tps536c7_identify,
+};
+
+static int tps536c7_probe(struct i2c_client *client,
+			  const struct i2c_device_id *id)
+{
+	struct pmbus_driver_info *info;
+
+	info = devm_kzalloc(&client->dev, sizeof(*info), GFP_KERNEL);
+	if (!info)
+		return -ENOMEM;
+
+	memcpy(info, &tps536c7_info, sizeof(*info));
+
+	//return pmbus_do_probe(client, id, info);
+          return pmbus_do_probe(client, info);
+}
+
+static const struct i2c_device_id tps536c7_id[] = {
+	{"tps536c7", 0},
+	{}
+};
+
+MODULE_DEVICE_TABLE(i2c, tps536c7_id);
+
+static const struct of_device_id tps536c7_of_match[] = {
+	{.compatible = "ti,tps536c7"},
+	{}
+};
+MODULE_DEVICE_TABLE(of, tps536c7_of_match);
+
+static struct i2c_driver tps536c7_driver = {
+	.driver = {
+		.name = "tps536c7",
+		.of_match_table = of_match_ptr(tps536c7_of_match),
+	},
+	.probe = tps536c7_probe,
+	//.remove = pmbus_do_remove,
+	.id_table = tps536c7_id,
+};
+
+module_i2c_driver(tps536c7_driver);
+
+MODULE_AUTHOR("Vadim Pasternak <vadimp@mellanox.com>");
+MODULE_DESCRIPTION("PMBus driver for Texas Instruments TPS536C7");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/setup.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/setup.py
new file mode 100644
index 000000000000..34b109b5bbfd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/setup.py
@@ -0,0 +1,27 @@
+import os
+from setuptools import setup
+os.listdir
+
+setup(
+    name='sonic-platform',
+    version='1.0',
+    description='SONiC platform API implementation on Celestica Platforms based on PDDF',
+    license='Apache 2.0',
+    author='SONiC Team',
+    author_email='yajiang@celestica.com',
+    url='https://github.com/Azure/sonic-buildimage',
+    packages=['sonic_platform'],
+    classifiers=[
+        'Development Status :: 3 - Alpha',
+        'Environment :: Plugins',
+        'Intended Audience :: Developers',
+        'Intended Audience :: Information Technology',
+        'Intended Audience :: System Administrators',
+        'License :: OSI Approved :: Apache Software License',
+        'Natural Language :: English',
+        'Operating System :: POSIX :: Linux',
+        'Programming Language :: Python :: 3.9',
+        'Topic :: Utilities',
+    ],
+    keywords='sonic SONiC platform PLATFORM',
+)
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/__init__.py
new file mode 100644
index 000000000000..21d9cd445e31
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/__init__.py
@@ -0,0 +1,4 @@
+# All the derived classes for PDDF
+__all__ = ["platform", "chassis", "sfp", "psu", "thermal"]
+from . import platform
+from . import chassis
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/chassis.py
new file mode 100644
index 000000000000..747b35aabd4c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/chassis.py
@@ -0,0 +1,234 @@
+#!/usr/bin/env python
+# @Company ：Celestica
+# @Time    : 2023/7/22 15:37
+# @Mail    : yajiang@celestica.com
+# @Author  : jiang tao
+
+try:
+    import sys
+    import time
+    import syslog
+    import subprocess
+    import os
+    import re
+    import shutil
+    from . import helper
+    from . import component
+    from .watchdog import Watchdog
+    from sonic_platform_pddf_base.pddf_chassis import PddfChassis
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+BMC_EXIST = helper.APIHelper().get_bmc_status()
+
+REBOOT_CAUSE_PATH = "/sys/devices/platform/cpld_wdt/reason"
+SET_SYS_STATUS_LED = "0x3A 0x39 0x02 0x00 {}"
+
+ORG_HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt"
+TMP_HW_REBOOT_CAUSE_FILE="/tmp/hw-reboot-cause.txt"
+
+
+class Chassis(PddfChassis):
+    """
+    PDDF Platform-specific Chassis class
+    """
+    sfp_status_dict = {}
+
+    def __init__(self, pddf_data=None, pddf_plugin_data=None):
+        self.helper = helper.APIHelper()
+        PddfChassis.__init__(self, pddf_data, pddf_plugin_data)
+        self._watchdog = None
+        self._airflow_direction = None
+
+        for port_idx in range(1, self.platform_inventory['num_ports'] + 1):
+            present = self.get_sfp(port_idx).get_presence()
+            self.sfp_status_dict[port_idx] = '1' if present else '0'
+        for index in range(self.platform_inventory['num_component']):
+            component_obj = component.Component(index)
+            self._component_list.append(component_obj)
+
+    @staticmethod
+    def _getstatusoutput(cmd):
+        status = 0
+        ret, data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            status = ret
+        if data[-1:] == '\n':
+            data = data[:-1]
+        
+        return status, data
+
+    @staticmethod
+    def initizalize_system_led():
+        return True
+
+    def get_status_led(self):
+        return self.get_system_led("SYS_LED")
+
+    def set_status_led(self, color):
+        if color == self.get_status_led():
+            return False
+
+        if BMC_EXIST:
+            sys_led_color_map = {
+                'off': '00',
+                'green': '01',
+                'amber': '02',
+                'amber_blink_1hz': '03',
+                'amber_blink_4hz': '04',
+                'green_blink_1hz': '05',
+                'green_blink_4hz': '06',
+                'alternate_blink_1hz': '07',
+                'alternate_blink_4hz': '08'
+            }
+            color_val = sys_led_color_map.get(color.lower(), None)
+            if color_val is None:
+                print("SYS LED color %s not support!" % color)
+                return False
+
+            status, _ = self.helper.ipmi_raw(SET_SYS_STATUS_LED.format(color_val))
+
+            return status
+        else:
+            result = self.set_system_led("SYS_LED", color)
+            return result
+
+    def get_sfp(self, index):
+        """
+        Retrieves sfp represented by (1-based) index <index>
+        For Quanta the index in sfputil.py starts from 1, so override
+        Args:
+            index: An integer, the index (1-based) of the sfp to retrieve.
+            The index should be the sequence of a physical port in a chassis,
+            starting from 1.
+        Returns:
+            An object dervied from SfpBase representing the specified sfp
+        """
+        sfp = None
+
+        try:
+            if index == 0:
+                raise IndexError
+            sfp = self._sfp_list[index - 1]
+        except IndexError:
+            sys.stderr.write("override: SFP index {} out of range (1-{})\n".format(
+                index, len(self._sfp_list)))
+
+        return sfp
+
+    def get_reboot_cause(self):
+        """
+        Retrieves the cause of the previous reboot
+        Returns:
+            A tuple (string, string) where the first element is a string
+            containing the cause of the previous reboot. This string must be
+            one of the predefined strings in this class. If the first string
+            is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
+            to pass a description of the reboot cause.
+            REBOOT_CAUSE_POWER_LOSS = "Power Loss"
+            REBOOT_CAUSE_THERMAL_OVERLOAD_CPU = "Thermal Overload: CPU"
+            REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC = "Thermal Overload: ASIC"
+            REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER = "Thermal Overload: Other"
+            REBOOT_CAUSE_INSUFFICIENT_FAN_SPEED = "Insufficient Fan Speed"
+            REBOOT_CAUSE_WATCHDOG = "Watchdog"
+            REBOOT_CAUSE_HARDWARE_OTHER = "Hardware - Other"
+            REBOOT_CAUSE_NON_HARDWARE = "Non-Hardware"
+        """
+        reboot_cause = self.helper.read_txt_file(REBOOT_CAUSE_PATH) or "Unknown"
+
+        # This tmp copy is to retain the reboot-cause only for the current boot
+        if os.path.isfile(ORG_HW_REBOOT_CAUSE_FILE):
+            shutil.move(ORG_HW_REBOOT_CAUSE_FILE, TMP_HW_REBOOT_CAUSE_FILE)
+
+        if reboot_cause == "0x33" and os.path.isfile(TMP_HW_REBOOT_CAUSE_FILE):
+            with open(TMP_HW_REBOOT_CAUSE_FILE) as hw_cause_file:
+                reboot_info = hw_cause_file.readline().rstrip('\n')
+                match = re.search(r'Reason:(.*),Time:(.*)', reboot_info)
+                if match is not None:
+                    if match.group(1) == 'system':
+                        return (self.REBOOT_CAUSE_NON_HARDWARE, 'System cold reboot')
+
+        reboot_cause_description = {
+            '0x11': (self.REBOOT_CAUSE_POWER_LOSS, "Power on Reset"),
+            '0x22': (self.REBOOT_CAUSE_NON_HARDWARE, "Soft-set CPU warm reset"),
+            '0x33': (self.REBOOT_CAUSE_HARDWARE_OTHER, "CPU cold reset"),
+            '0x44': (self.REBOOT_CAUSE_NON_HARDWARE, "CPU warm reset"),
+            '0x66': (self.REBOOT_CAUSE_WATCHDOG, "Hardware Watchdog Reset"),
+
+        }
+        prev_reboot_cause = reboot_cause_description.get(reboot_cause,
+                                                         (self.REBOOT_CAUSE_NON_HARDWARE, "Unknown reason"))
+        return prev_reboot_cause
+
+    def get_watchdog(self):
+        """
+        Retreives hardware watchdog device on this chassis
+
+        Returns:
+            An object derived from WatchdogBase representing the hardware
+            watchdog device
+        """
+        try:
+
+            if self._watchdog is None:
+                # Create the watchdog Instance
+                self._watchdog = Watchdog()
+        except Exception as E:
+            syslog.syslog(syslog.LOG_ERR, "Fail to load watchdog due to {}".format(E))
+        return self._watchdog
+
+    def get_change_event(self, timeout=0):
+        sfp_dict = {}
+
+        sfp_removed = '0'
+        sfp_inserted = '1'
+
+        sfp_present = True
+        sfp_absent = False
+
+        start_time = time.time()
+        time_period = timeout / float(1000)  # Convert msecs to secss
+
+        while time.time() < (start_time + time_period) or timeout == 0:
+            for port_idx in range(1, self.platform_inventory['num_ports'] + 1):
+                if self.sfp_status_dict[port_idx] == sfp_removed and \
+                        self.get_sfp(port_idx).get_presence() == sfp_present:
+                    sfp_dict[port_idx] = sfp_inserted
+                    self.sfp_status_dict[port_idx] = sfp_inserted
+                elif self.sfp_status_dict[port_idx] == sfp_inserted and \
+                        self.get_sfp(port_idx).get_presence() == sfp_absent:
+                    sfp_dict[port_idx] = sfp_removed
+                    self.sfp_status_dict[port_idx] = sfp_removed
+
+            if sfp_dict:
+                return True, {'sfp': sfp_dict}
+
+            time.sleep(0.5)
+
+        return True, {'sfp': {}}  # Timeout
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision for the chassis
+        Returns:
+            A string containing the hardware revision for this chassis.
+        """
+        return self._eeprom.get_revision()
+
+    def get_airflow_direction(self):
+        if self._airflow_direction == None:
+            try:
+                vendor_extn = self._eeprom.get_vendor_extn()
+                airflow_type = vendor_extn.split()[2][2:4] # either 0xfb or 0xbf
+                if airflow_type == 'FB':
+                    direction = 'exhaust'
+                elif airflow_type == 'BF':
+                    direction = 'intake'
+                else:
+                    direction = 'N/A'
+            except (AttributeError, IndexError):
+                direction = 'N/A'
+
+            self._airflow_direction = direction
+
+        return self._airflow_direction
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/component.py
new file mode 100644
index 000000000000..3ce7e20fb0b1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/component.py
@@ -0,0 +1,230 @@
+#!/usr/bin/env python
+# @Company ：Celestica
+# @Time   : 2023/7/21 17:09
+# @Mail   : yajiang@celestica.com
+# @Author : jiang tao
+try:
+    from sonic_platform_base.component_base import ComponentBase
+    from . import helper
+    import re
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+BMC_EXIST = helper.APIHelper().get_bmc_status()
+FPGA_VERSION_PATH = "/sys/bus/platform/devices/fpga_sysfs/version"
+Bios_Version_Cmd = "dmidecode -t bios | grep Version"
+ONIE_Version_Cmd = "cat /host/machine.conf"
+SSD_Version_Cmd = "smartctl -i /dev/sda"
+ASIC_PCIE_VERSION_CMD = "bcmcmd 'pciephy fw version' | grep 'PCIe FW version' | cut -d ' ' -f 4"
+
+if BMC_EXIST:
+    Check_Bios_Boot = "ipmitool raw 0x3a 0x25 0x02"
+    Fan_CPLD_Cmd = "ipmitool raw 0x3a 0x64 02 01 00"
+    COME_CPLD_Cmd = "ipmitool raw 0x3a 0x3e 1 0x1a 1 0xe0"
+    Sys_Cpld_Cmd = "ipmitool raw 0x3a 0x64 0x00 0x01 0x00"
+    Sw_Cpld1_Cmd = "i2cget -y -f 108 0x30 0 | tr a-z A-Z | cut -d 'X' -f 2"
+    Sw_Cpld2_Cmd = "i2cget -y -f 108 0x31 0 | tr a-z A-Z | cut -d 'X' -f 2"
+    Main_BMC_Cmd = "0x32 0x8f 0x08 0x01"
+    Backup_BMC_Cmd = "0x32 0x8f 0x08 0x01"
+
+    COMPONENT_NAME_LIST = ["BIOS", "ONIE", "BMC", "FPGA", "CPLD COMe", "CPLD BASE",
+                           "CPLD SW1", "CPLD SW2", "CPLD FAN", "ASIC PCIe", "SSD"]
+    COMPONENT_DES_LIST = ["Basic Input/Output system",
+                          "Open Network Install Environment",
+                          "Baseboard Management Controller",
+                          "FPGA for transceiver EEPROM access and other component I2C access",
+                          "COMe board CPLD",
+                          "CPLD for board functions and watchdog",
+                          "CPLD for port control QSFP(1-16)",
+                          "CPLD for port control QSFP(17-32) SFP(33-34)",
+                          "CPLD for fan control and status",
+                          "ASIC PCIe Firmware",
+                          "Solid State Drive"]
+else:
+    Check_Bios_Boot = "i2cget -y -f 100 0x0d 0x70 | tr a-z A-Z | cut -d 'X' -f 2"
+    Fan_CPLD_Cmd = "i2cget -y -f 107 0x0d 0x00 | tr a-z A-Z | cut -d 'X' -f 2"
+    COME_CPLD_Cmd = "i2cget -y -f 104 0x0d 0xe0 | tr a-z A-Z | cut -d 'X' -f 2"
+    Sys_Cpld_Cmd = "i2cget -y -f 100 0x0d 0x00 | tr a-z A-Z | cut -d 'X' -f 2"
+    Sw_Cpld1_Cmd = "i2cget -y -f 108 0x30 0x00 | tr a-z A-Z | cut -d 'X' -f 2"
+    Sw_Cpld2_Cmd = "i2cget -y -f 108 0x31 0x00 | tr a-z A-Z | cut -d 'X' -f 2"
+
+    COMPONENT_NAME_LIST = ["BIOS", "ONIE", "BMC", "FPGA", "CPLD COMe", "CPLD BASE",
+                           "CPLD SW1", "CPLD SW2", "CPLD FAN", "SSD"]
+
+    COMPONENT_DES_LIST = ["Basic Input/Output system",
+                          "Open Network Install Environment",
+                          "Baseboard Management Controller",
+                          "FPGA for transceiver EEPROM access and other component I2C access",
+                          "COMe board CPLD",
+                          "CPLD for board functions and watchdog",
+                          "CPLD for port control QSFP(1-16)",
+                          "CPLD for port control QSFP(17-32) SFP(33-34)",
+                          "CPLD for fan control and status",
+                          "Solid State Drive"]
+
+
+
+class Component(ComponentBase):
+    """Platform-specific Component class"""
+
+    DEVICE_TYPE = "component"
+
+    def __init__(self, component_index):
+        ComponentBase.__init__(self)
+        self.index = component_index
+        self.helper = helper.APIHelper()
+        self.name = self.get_name()
+
+    def __get_bios_version(self):
+        """
+        Get Bios version by command 'dmidecode -t bios | grep Version'
+        return: Bios Version
+        """
+        status, result = self.helper.run_command(Check_Bios_Boot)
+        bios_version = "N/A"
+        if not status:
+            print("Fail! Unable to get the current Main bios or backup bios!")
+            return bios_version
+        status_ver, version_str = self.helper.run_command(Bios_Version_Cmd)
+        if not status:
+            print("Fail! Unable to get the bios version!")
+            return bios_version
+
+        bios_version = re.findall(r"Version:(.*)", version_str)[0]
+        if result.strip() == "01" and self.name == "BIOS":
+            return bios_version.strip()
+
+        elif result.strip() == "03" and self.name == "BIOS":
+            return bios_version.strip()
+        else:
+            return "N/A"
+
+    def __get_onie_version(self):
+        """
+        Get ONIE Version"
+        """
+        onie_version = "N/A"
+        status, raw_onie_data = self.helper.run_command(ONIE_Version_Cmd)
+        if status:
+            ret = re.search(r"(?<=onie_version=).+[^\n]", raw_onie_data)
+            if ret != None:
+                onie_version = ret.group(0)
+        return onie_version
+
+    def __get_cpld_version(self):
+        """
+        Get Come cpld/Fan cpld/Sys cpld/Switch 1 cpld/Switch 2 cpld version
+        """
+        version = "N/A"
+        cpld_version_dict = {
+            "CPLD COMe": COME_CPLD_Cmd,
+            "CPLD FAN": Fan_CPLD_Cmd,
+            "CPLD SW1": Sw_Cpld1_Cmd,
+            "CPLD SW2": Sw_Cpld2_Cmd,
+            "CPLD BASE": Sys_Cpld_Cmd,
+        }
+        if self.name in cpld_version_dict.keys():
+            version_cmd = cpld_version_dict[self.name]
+            status, ver = self.helper.run_command(version_cmd)
+            if not status:
+                print("Fail! Can't get %s version by command:%s" % (self.name, version_cmd))
+                return version
+            version1 = int(ver.strip()) / 10
+            version2 = int(ver.strip()) % 10
+            version = "%d.%d" % (version1, version2)
+            return version
+
+    def __get_fpga_version(self):
+        """
+        Get fpga version by fpga version bus path.
+        """
+        status, fpga_version = self.helper.run_command("cat %s" % FPGA_VERSION_PATH)
+        if not status:
+            return "N/A"
+        return fpga_version.replace("0x", "")
+
+    def __get_bmc_version(self):
+        """
+        Get main/backup bmc version
+        """
+        version = "N/A"
+        cmd = Main_BMC_Cmd if self.name == "Main_BMC" else Backup_BMC_Cmd
+        status, result = self.helper.ipmi_raw(cmd)
+        if not status:
+            print("Fail! Can't get the %s version by command:%s" % (self.name, cmd))
+            return version
+        str_1 = str(int(result.strip().split(" ")[0]))
+        str_2 = str(int(result.strip().split(" ")[1], 16))
+        version = "%s.%s" % (str_1, str_2)
+        return version
+
+    def __get_asic_pcie_ver(self):
+        status, raw_ver=self.helper.run_command(ASIC_PCIE_VERSION_CMD)
+        if status:
+            return raw_ver
+        else:
+            return "N/A"
+
+    def __get_ssd_version(self):
+        ssd_version = "N/A"
+        status, raw_ssd_data = self.helper.run_command(SSD_Version_Cmd)
+        if status:
+            ret = re.search(r"Firmware Version: +(.*)[^\\]", raw_ssd_data)
+            if ret != None:
+                ssd_version = ret.group(1)
+        return ssd_version
+
+    def get_name(self):
+        """
+        Retrieves the name of the component
+         Returns:
+            A string containing the name of the component
+        """
+        return COMPONENT_NAME_LIST[self.index]
+
+    def get_description(self):
+        """
+        Retrieves the description of the component
+            Returns:
+            A string containing the description of the component
+        """
+        return COMPONENT_DES_LIST[self.index]
+
+    def get_firmware_version(self):
+        """
+        Retrieves the firmware version of module
+        Returns:
+            string: The firmware versions of the module
+        """
+        fw_version = None
+
+        if "BIOS" in self.name:
+            fw_version = self.__get_bios_version()
+        elif "ONIE" in self.name:
+            fw_version = self.__get_onie_version()
+        elif "CPLD" in self.name:
+            fw_version = self.__get_cpld_version()
+        elif self.name == "FPGA":
+            fw_version = self.__get_fpga_version()
+        elif "BMC" in self.name:
+            fw_version = self.__get_bmc_version()
+        elif self.name == "ASIC PCIe":
+            fw_version = self.__get_asic_pcie_ver()
+        elif "SSD" in self.name:
+            fw_version = self.__get_ssd_version()
+        return fw_version
+
+    @staticmethod
+    def install_firmware(image_path):
+        """
+        Install firmware to module
+        Args:
+            image_path: A string, path to firmware image
+        Returns:
+            A boolean, True if install successfully, False if not
+        """
+        return False
+
+    @staticmethod
+    def update_firmware(image_path):
+        # Not support
+        return False
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/eeprom.py
new file mode 100644
index 000000000000..838328e321be
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/eeprom.py
@@ -0,0 +1,78 @@
+try:
+    import os
+    from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+EEPROM_TMP_FILE = '/tmp/eeprom_dump.bin'
+
+class Eeprom(PddfEeprom):
+    _TLV_DISPLAY_VENDOR_EXT = True
+    _TLV_INFO_MAX_LEN = 256
+    pddf_obj = {}
+    plugin_data = {}
+
+    def __init__(self, pddf_data=None, pddf_plugin_data=None):
+        if not pddf_data or not pddf_plugin_data:
+            raise ValueError('PDDF JSON data error')
+
+        self.pddf_obj = pddf_data
+        self.plugin_data = pddf_plugin_data
+
+        # system EEPROM always has device name EEPROM1
+        self.eeprom_path = self.pddf_obj.get_path("EEPROM1", "eeprom")
+        if self.eeprom_path is None:
+            return
+
+        super(PddfEeprom, self).__init__(self.eeprom_path, 0, '', True)
+        self.eeprom_tlv_dict = dict()
+        try:
+            if os.path.exists(EEPROM_TMP_FILE):
+                with open(EEPROM_TMP_FILE, 'rb') as b_fd:
+                    self.eeprom_data = bytearray(b_fd.read())
+            else:
+                self.eeprom_data = self.read_eeprom()
+                with open(EEPROM_TMP_FILE, 'wb') as b_fd:
+                    b_fd.write(self.eeprom_data)
+                os.chmod(EEPROM_TMP_FILE, 0o444)
+        except Exception as E:
+            self.eeprom_data = "N/A"
+            raise RuntimeError("PddfEeprom is not Programmed - Error: {}".format(str(E)))
+        else:
+            eeprom = self.eeprom_data
+
+            if not self.is_valid_tlvinfo_header(eeprom):
+                return
+
+            total_length = ((eeprom[9]) << 8) | (eeprom[10])
+            tlv_index = self._TLV_INFO_HDR_LEN
+            tlv_end = self._TLV_INFO_HDR_LEN + total_length
+
+            while (tlv_index + 2) < self._TLV_INFO_MAX_LEN and tlv_index < tlv_end:
+                if not self.is_valid_tlv(eeprom[tlv_index:]):
+                    break
+
+                tlv = eeprom[tlv_index:tlv_index + 2 + (eeprom[tlv_index + 1])]
+                code = "0x%02X" % tlv[0]
+
+                if (tlv[0]) == self._TLV_CODE_VENDOR_EXT:
+                    name = "Vendor Extension"
+                    value = ""
+                    if self._TLV_DISPLAY_VENDOR_EXT:
+                        for c in tlv[2:2 + tlv[1]]:
+                            value += "0x%02X " % c
+                else:
+                    name, value = self.decoder(None, tlv)
+
+                self.eeprom_tlv_dict[code] = value
+                if (eeprom[tlv_index]) == self._TLV_CODE_CRC_32:
+                    break
+
+                tlv_index += (eeprom[tlv_index + 1]) + 2
+
+    def get_revision(self):
+        return self.eeprom_tlv_dict.get('0x26', 'N/A')
+
+    def get_vendor_extn(self):
+        return self.eeprom_tlv_dict.get('0xFD', 'N/A')
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/fan.py
new file mode 100644
index 000000000000..ad90dfdf7b20
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/fan.py
@@ -0,0 +1,93 @@
+#!/usr/bin/env python
+# @Company ：Celestica
+# @Time    : 2023/7/21  16:36
+# @Mail    : yajiang@celestica.com
+# @Author  : jiang tao
+try:
+    from sonic_platform_pddf_base.pddf_fan import PddfFan
+    from . import helper
+    import re
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+BMC_EXIST = helper.APIHelper().get_bmc_status()
+Fan_Direction_Cmd = "0x3a 0x62 {}"
+SET_FAN_STATUS_LED_CMD = "0x3A 0x39 0x02 {} {}"
+
+
+class Fan(PddfFan):
+    """PDDF Platform-Specific Fan class"""
+
+    def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0):
+        # idx is 0-based 
+        PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index)
+        self.helper = helper.APIHelper()
+
+    def get_presence(self):
+        """
+          Retrieves the presence of fan
+        """
+        return super().get_presence()
+
+    def get_speed_tolerance(self):
+        """
+        Retrieves the speed tolerance of the fan
+
+        Returns:
+            An integer, the percentage of variance from target speed which is
+                 considered tolerable
+        """
+        return 15 if "PSU" in self.get_name() else 25
+
+    def is_under_speed(self):
+        speed = float(self.get_speed())
+        target_speed = float(self.get_target_speed())
+        speed_tolerance = self.get_speed_tolerance()
+
+        speed_min_th = target_speed * (1 - float(speed_tolerance) / 100)
+        if speed < speed_min_th:
+            return True
+        else:
+            return False
+
+    def is_over_speed(self):
+        speed = float(self.get_speed())
+        target_speed = float(self.get_target_speed())
+        speed_tolerance = self.get_speed_tolerance()
+
+        speed_max_th = target_speed * (1 + float(speed_tolerance) / 100)
+        if speed > speed_max_th:
+            return True
+        else:
+            return False
+
+    def set_status_led(self,color):
+        if self.is_psu_fan:
+            return super().set_status_led(color)
+
+        if color == self.get_status_led():
+            return False
+
+        if BMC_EXIST:
+            fan_led_color_map = {
+                'off': '00',
+                'green': '01',
+                'amber': '02',
+                'red': '02'
+            }
+
+            fan_index_val = hex(self.fantray_index + 3)
+
+            color_val = fan_led_color_map.get(color.lower(), None)
+
+            if fan_index_val is None:
+                return False
+
+            if color_val is None:
+                return False
+
+            status, _ = self.helper.ipmi_raw(SET_FAN_STATUS_LED_CMD.format(fan_index_val,color_val))
+
+            return status
+        else:
+            return self.set_system_led("SYS_LED", color)
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/fan_drawer.py
new file mode 100644
index 000000000000..babf6580ae3b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/fan_drawer.py
@@ -0,0 +1,21 @@
+#!/usr/bin/env python
+# @Company ：Celestica
+# @Time    : 2023/2/18 15:45
+# @Mail    : yajiang@celestica.com
+# @Author  : jiang tao
+
+
+try:
+    from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class FanDrawer(PddfFanDrawer):
+    """PDDF Platform-Specific Fan-Drawer class"""
+
+    def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None):
+        # idx is 0-based 
+        PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/helper.py
new file mode 100644
index 000000000000..94783ed18ac5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/helper.py
@@ -0,0 +1,143 @@
+#!/usr/bin/env python
+# @Company ：Celestica
+# @Time    : 2023/2/28 plugins:10
+# @Mail    : yajiang@celestica.com
+# @Author  : jiang tao
+import os
+import json
+import struct
+import subprocess
+from sonic_py_common import device_info
+from mmap import *
+
+HOST_CHK_CMD = "docker > /dev/null 2>&1"
+EMPTY_STRING = ""
+
+
+class APIHelper(object):
+
+    def __init__(self):
+        (self.platform, self.hwsku) = device_info.get_platform_and_hwsku()
+
+    @staticmethod
+    def is_host():
+        return os.system(HOST_CHK_CMD) == 0
+
+    @staticmethod
+    def pci_get_value(resource, offset):
+        status = True
+        result = ""
+        try:
+            fd = os.open(resource, os.O_RDWR)
+            mm = mmap(fd, 0)
+            mm.seek(int(offset))
+            read_data_stream = mm.read(4)
+            result = struct.unpack('I', read_data_stream)
+        except Exception:
+            status = False
+        return status, result
+
+    @staticmethod
+    def run_command(cmd):
+        status = True
+        result = ""
+        ret, data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            status = False
+        else:
+            result = data
+        
+        return status, result
+
+    @staticmethod
+    def run_interactive_command(cmd):
+        try:
+            subprocess.call(cmd)
+        except:
+            return False
+        return True
+
+    @staticmethod
+    def read_txt_file(file_path):
+        try:
+            with open(file_path, 'r') as fd:
+                data = fd.read()
+                return data.strip()
+        except IOError:
+            pass
+        return None
+
+    @staticmethod
+    def read_one_line_file(file_path):
+        try:
+            with open(file_path, 'r') as fd:
+                data = fd.readline()
+                return data.strip()
+        except IOError:
+            pass
+        return None
+
+    @staticmethod
+    def write_txt_file(file_path, value):
+        try:
+            with open(file_path, 'w') as fd:
+                fd.write(str(value))
+        except Exception as E:
+            print(str(E))
+            return False
+        return True
+
+    def get_cpld_reg_value(self, getreg_path, register):
+        cmd = "echo {1} > {0}; cat {0}".format(getreg_path, register)
+        status, result = self.run_command(cmd)
+        return result if status else None
+
+    @staticmethod
+    def ipmi_raw(cmd):
+        status = True
+        result = ""
+        cmd = "ipmitool raw {}".format(str(cmd))
+        ret, raw_data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            status = False
+        else:
+            result = raw_data
+        return status, result
+
+    @staticmethod
+    def ipmi_fru_id(key_id, key=None):
+        status = True
+        result = ""
+        cmd = "ipmitool fru print {}".format(str(
+            key_id)) if not key else "ipmitool fru print {0} | grep '{1}' ".format(str(key_id), str(key))
+        ret, data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            status = False
+        else:
+            result = data
+        return status, result
+
+    @staticmethod
+    def ipmi_set_ss_thres(id, threshold_key, value):
+        status = True
+        result = ""
+        cmd = "ipmitool sensor thresh '{}' {} {}".format(
+             str(id), str(threshold_key), str(value))
+        ret, data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            status = False
+        else:
+            result = data
+        return status, result
+    
+    @staticmethod
+    def get_bmc_status():
+        """
+        get bmc present by pddf-device.json
+        return: True(present), False(absent)
+        """
+        pddf_device_path = '/usr/share/sonic/platform/pddf/pddf-device.json'
+        with open(pddf_device_path) as f:
+            json_data = json.load(f)
+        bmc_present = json_data["PLATFORM"]["bmc_present"]
+        return True if bmc_present == "True" else False
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/platform.py
new file mode 100644
index 000000000000..8595e80692df
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/platform.py
@@ -0,0 +1,23 @@
+#############################################################################
+# PDDF
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
+#
+#############################################################################
+
+
+try:
+    from sonic_platform_pddf_base.pddf_platform import PddfPlatform
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Platform(PddfPlatform):
+    """
+    PDDF Platform-Specific Platform Class
+    """
+
+    def __init__(self):
+        PddfPlatform.__init__(self)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/psu.py
new file mode 100644
index 000000000000..033307568b31
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/psu.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+# @Company ：Celestica
+# @Time    : 2023/7/20  13:46
+# @Mail    : yajiang@celestica.com
+# @Author  : jiang tao
+try:
+    from sonic_platform_pddf_base.pddf_psu import PddfPsu
+    import re
+    import os
+    from . import helper
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+BMC_EXIST = helper.APIHelper().get_bmc_status()
+
+
+class Psu(PddfPsu):
+    """PDDF Platform-Specific PSU class"""
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
+        PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data)
+        self.helper = helper.APIHelper()
+        if BMC_EXIST:
+            from . import sensor_list_config
+            if not os.path.exists(sensor_list_config.Sensor_List_Info):
+                cmd = "ipmitool sensor list > %s" % sensor_list_config.Sensor_List_Info
+                self.helper.run_command(cmd)
+
+    @staticmethod
+    def get_capacity():
+        return 550
+
+    @staticmethod
+    def get_type():
+        return 'AC'
+
+    @staticmethod
+    def get_revision():
+        """
+        Get PSU HW Revision by read psu eeprom data.
+        return: HW Revision or 'N/A'
+        """
+        return "N/A"
+
+
+
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/sensor_list_config.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/sensor_list_config.py
new file mode 100644
index 000000000000..8c75e5480a73
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/sensor_list_config.py
@@ -0,0 +1,11 @@
+# -*- coding: utf-8 -*-#
+
+# @Time   : 2023/4/13 9:29
+# @Mail   : yajiang@celestica.com
+# @Author : jiang tao
+
+# The path of sensor list information file
+Sensor_List_Info = "/tmp/sensor_info.log"
+
+# The Sensor list information refresh interval
+Sensor_Info_Update_Period_Secs = 60
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/sfp.py
new file mode 100644
index 000000000000..89af6f6de14b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/sfp.py
@@ -0,0 +1,103 @@
+#!/usr/bin/env python
+
+try:
+    import ast
+    from sonic_platform_pddf_base.pddf_sfp import PddfSfp
+    from sonic_platform_base.sonic_xcvr.api.public.c_cmis import CmisApi
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Sfp(PddfSfp):
+    """
+    PDDF Platform-Specific Sfp class
+    """
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
+        PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data)
+
+    def get_presence(self):
+        presence = PddfSfp.get_presence(self)
+        if not presence and self._xcvr_api != None:
+            self._xcvr_api = None
+
+        return presence
+
+    def get_xcvr_api(self):
+        if self._xcvr_api is None and self.get_presence():
+            self.refresh_xcvr_api()
+
+            # Find and update the right optoe driver
+            api_to_driver_map = {\
+                'Sff8636Api': 'optoe1',\
+                'Sff8472Api': 'optoe2',\
+                'CmisApi': 'optoe3',\
+                'CCmisApi': 'optoe3',\
+                'Sff8436Api': 'sff8436'\
+            }
+            create_dev = False
+            path_list = self.eeprom_path.split('/')
+            name_path = '/'.join(path_list[:-1]) + '/name'
+            del_dev_path = '/'.join(path_list[:-2]) + '/delete_device'
+            new_dev_path = '/'.join(path_list[:-2]) + '/new_device'
+            api_name = type(self._xcvr_api).__name__
+            new_driver = api_to_driver_map.get(api_name, 'optoe1')
+
+            try:
+                with open(name_path, 'r') as fd:
+                    cur_driver = fd.readline().strip()
+            except FileNotFoundError:
+                create_dev = True
+            else:
+                if cur_driver != new_driver:
+                    with open(del_dev_path, 'w') as fd:
+                        fd.write("0x50")
+                    create_dev = True
+
+            if create_dev:
+                with open(new_dev_path, 'w') as fd:
+                    fd.write("{} 0x50".format(new_driver))
+
+            if api_name == 'Sff8636Api' or \
+                api_name == 'Sff8436Api':
+                self.write_eeprom(93,1,bytes([0x04]))
+
+        return self._xcvr_api
+
+    def get_platform_media_key(self, transceiver_dict, port_speed, lane_count):
+        api = self.get_xcvr_api()
+        api_name = type(api).__name__
+        if api_name in ['CmisApi', 'CCmisApi']:
+            is_cmis = True
+        else:
+            is_cmis = False
+
+        # Per lane speed
+        media_key = str(int(port_speed / lane_count))
+        if is_cmis:
+            media_compliance_code = transceiver_dict['specification_compliance']
+            if 'copper' in media_compliance_code:
+                media_len = transceiver_dict['cable_length']
+                media_key += '-copper-' + str(media_len) + 'M'
+            else:
+                media_key += '-optical'
+        else:
+            media_compliance_dict = ast.literal_eval(transceiver_dict['specification_compliance'])
+            eth_compliance_str = '10/40G Ethernet Compliance Code'
+            ext_compliance_str = 'Extended Specification Compliance'
+            media_compliance_code = ''
+            if eth_compliance_str in media_compliance_dict:
+                media_compliance_code = media_compliance_dict[eth_compliance_str]
+            if ext_compliance_str in media_compliance_dict:
+                media_compliance_code = media_compliance_code + ' ' + media_compliance_dict[ext_compliance_str]
+            if 'CR' in media_compliance_code or "copper" in transceiver_dict['specification_compliance'].lower():
+                media_len = transceiver_dict['cable_length']
+                media_key += '-copper-' + str(media_len) + 'M'
+            else:
+                media_key += '-optical'
+
+        return {\
+            'vendor_key': '',\
+            'media_key': media_key,\
+            'lane_speed_key': ''\
+        }
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/thermal.py
new file mode 100644
index 000000000000..572a82be48c6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/thermal.py
@@ -0,0 +1,68 @@
+#!/usr/bin/env python
+# @Company ：Celestica
+# @Time    : 2023/7/24 13:32
+# @Mail    : yajiang@celestica.com
+# @Author  : jiang tao
+
+try:
+    from sonic_platform_pddf_base.pddf_thermal import PddfThermal
+    from . import helper
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+BMC_EXIST = helper.APIHelper().get_bmc_status()
+FAN_STATUS_INFO_CMD = "i2cget -y -f 107 0x0d 0x26"
+
+
+class Thermal(PddfThermal):
+    """PDDF Platform-Specific Thermal class"""
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0):
+        self.helper = helper.APIHelper()
+        PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal=is_psu_thermal,
+                             psu_index=psu_index)
+
+    def get_high_critical_threshold(self):
+        """
+        Rewrite the method of obtaining PSU high critical in pddf_thermal
+
+        Returns:
+            A float number, the high critical threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        if BMC_EXIST:
+            from . import sensor_list_config
+            if not self.is_psu_thermal:
+                output = self.pddf_obj.get_attr_name_output(self.thermal_obj_name, "temp1_high_crit_threshold")
+                if not output:
+                    return None
+
+                if output['status'].isalpha():
+                    attr_value = None
+                else:
+                    attr_value = float(output['status'])
+
+                if output['mode'] == 'bmc':
+                    return attr_value
+                else:
+                    return float(attr_value / 1000)
+            else:
+                info = self.helper.read_txt_file(sensor_list_config.Sensor_List_Info)
+                for line in info.splitlines():
+                    if "PSU%d_Temp1" % self.thermals_psu_index in line:
+                        return float(line.split("|")[8])
+        else:
+            return super().get_high_critical_threshold()
+
+    def get_high_threshold(self):
+        if BMC_EXIST:
+            return super().get_high_threshold()
+        else:
+            status, fan_info = self.helper.run_command(FAN_STATUS_INFO_CMD)
+            if not status:
+                return None
+            thermal_name = self.get_name()
+            fan_dir = "B2F" if (bin(int(fan_info, 16)))[-2:-1] == "0" else "F2B"
+            value = self.plugin_data["THERMAL"]["NONE_BMC"]["temp1_high_threshold"][thermal_name][fan_dir]
+            return float(value) if value.isdigit() else None
+
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/watchdog.py
new file mode 100644
index 000000000000..7e4fc599dda2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/pddf/sonic_platform/watchdog.py
@@ -0,0 +1,208 @@
+#!/usr/bin/env python
+
+#############################################################################
+#
+# Watchdog contains an implementation of SONiC Platform Base Watchdog API
+#
+#############################################################################
+import fcntl
+import os
+import array
+
+try:
+    from . import helper
+    from sonic_platform_base.watchdog_base import WatchdogBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+""" ioctl constants """
+IO_WRITE = 0x40000000
+IO_READ = 0x80000000
+IO_READ_WRITE = 0xC0000000
+IO_SIZE_INT = 0x00040000
+IO_SIZE_40 = 0x00280000
+IO_TYPE_WATCHDOG = ord('W') << 8
+
+WDR_INT = IO_READ | IO_SIZE_INT | IO_TYPE_WATCHDOG
+WDR_40 = IO_READ | IO_SIZE_40 | IO_TYPE_WATCHDOG
+WDWR_INT = IO_READ_WRITE | IO_SIZE_INT | IO_TYPE_WATCHDOG
+
+""" Watchdog ioctl commands """
+WDIOC_GETSUPPORT = 0 | WDR_40
+WDIOC_GETSTATUS = 1 | WDR_INT
+WDIOC_GETBOOTSTATUS = 2 | WDR_INT
+WDIOC_GETTEMP = 3 | WDR_INT
+WDIOC_SETOPTIONS = 4 | WDR_INT
+WDIOC_KEEPALIVE = 5 | WDR_INT
+WDIOC_SETTIMEOUT = 6 | WDWR_INT
+WDIOC_GETTIMEOUT = 7 | WDR_INT
+WDIOC_SETPRETIMEOUT = 8 | WDWR_INT
+WDIOC_GETPRETIMEOUT = 9 | WDR_INT
+WDIOC_GETTIMELEFT = 10 | WDR_INT
+
+""" Watchdog status constants """
+WDIOS_DISABLECARD = 0x0001
+WDIOS_ENABLECARD = 0x0002
+
+WDT_COMMON_ERROR = -1
+WD_MAIN_IDENTITY = "cpld_wdt"
+WDT_SYSFS_PATH = "/sys/class/watchdog/"
+
+DEFAULT_TIMEOUT = 180
+watchdog = 0
+
+
+class Watchdog(WatchdogBase):
+    watchdog = None
+
+    def __init__(self):
+        global watchdog
+        self.helper = helper.APIHelper()
+        self.status_path = "/sys/devices/platform/cpld_wdt/status"
+        self.state_path = "/sys/devices/platform/cpld_wdt/state"
+        self.timeout_path = "/sys/devices/platform/cpld_wdt/timeout"
+        # Set default value
+        state = self.helper.read_txt_file(self.state_path)
+        self.armed = True if state == "active" else False
+        self.timeout = DEFAULT_TIMEOUT
+        if not watchdog:
+            watchdog = os.open("/dev/cpld_wdt", os.O_RDWR)
+        self.watchdog = watchdog
+
+    def _enable(self):
+        """
+        Turn on the watchdog timer
+        """
+        req = array.array('h', [WDIOS_ENABLECARD])
+        fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False)
+
+    def _disable(self):
+        """
+        Turn off the watchdog timer
+        """
+        req = array.array('h', [WDIOS_DISABLECARD])
+        fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False)
+
+    def _keep_alive(self):
+        """
+        Keep alive watchdog timer
+        """
+        fcntl.ioctl(self.watchdog, WDIOC_KEEPALIVE)
+
+    def _set_timeout(self, seconds):
+        """
+        Set watchdog timer timeout
+        @param seconds - timeout in seconds
+        @return is the actual set timeout
+        """
+        req = array.array('I', [seconds])
+        fcntl.ioctl(self.watchdog, WDIOC_SETTIMEOUT, req, True)
+        return int(req[0])
+
+    def _get_timeout(self):
+        """
+        Get watchdog timeout
+        @return watchdog timeout
+        """
+        req = array.array('I', [0])
+        fcntl.ioctl(self.watchdog, WDIOC_GETTIMEOUT, req, True)
+
+        return int(req[0])
+
+    def _get_time_left(self):
+        """
+        Get time left before watchdog timer expires
+        @return time left in seconds
+        """
+        req = array.array('I', [0])
+        fcntl.ioctl(self.watchdog, WDIOC_GETTIMELEFT, req, True)
+
+        return int(req[0])
+
+    #################################################################
+
+    def arm(self, seconds):
+        """
+        Arm the hardware watchdog with a timeout of <seconds> seconds.
+        If the watchdog is currently armed, calling this function will
+        simply reset the timer to the provided value. If the underlying
+        hardware does not support the value provided in <seconds>, this
+        method should arm the watchdog with the *next greater* available
+        value.
+        Returns:
+            An integer specifying the *actual* number of seconds the watchdog
+            was armed with. On failure returns -1.
+        """
+
+        ret = WDT_COMMON_ERROR
+        if seconds < 0:
+            return ret
+
+        try:
+            if self.timeout != seconds:
+                self.timeout = self._set_timeout(seconds)
+
+            if self.armed:
+                self._keep_alive()
+            else:
+                self._enable()
+                self.armed = True
+
+            ret = self.timeout
+        except IOError:
+            pass
+        return ret
+
+    def disarm(self):
+        """
+        Disarm the hardware watchdog
+        Returns:
+            A boolean, True if watchdog is disarmed successfully, False if not
+        """
+        disarmed = False
+        if self.is_armed():
+            try:
+                self._disable()
+                self.armed = False
+                disarmed = True
+            except IOError:
+                pass
+
+        return disarmed
+
+    def is_armed(self):
+        """
+        Retrieves the armed state of the hardware watchdog.
+        Returns:
+            A boolean, True if watchdog is armed, False if not
+        """
+
+        return self.armed
+
+    def get_remaining_time(self):
+        """
+        If the watchdog is armed, retrieve the number of seconds remaining on
+        the watchdog timer
+        Returns:
+            An integer specifying the number of seconds remaining on thei
+            watchdog timer. If the watchdog is not armed, returns -1.
+        """
+
+        time_left = WDT_COMMON_ERROR
+
+        if self.armed:
+            try:
+                time_left = self._get_time_left()
+            except IOError:
+                pass
+
+        return time_left
+
+    def __del__(self):
+        """
+        Close watchdog
+        """
+
+        if self.watchdog is not None:
+            os.close(self.watchdog)
+
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pddf_post_device_create.sh
new file mode 100755
index 000000000000..4e078f27639c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pddf_post_device_create.sh
@@ -0,0 +1,20 @@
+#!/bin/bash
+# install custom fpga device.
+
+sleep 3
+modprobe pddf_custom_fpga_extend
+
+bmc_present=`cat /usr/share/sonic/device/x86_64-cel_silverstone_v2-r0/bmc_status`
+#Set off Alarm LED
+if [[ "$bmc_present" == "True" ]]; then
+    # Set all LEDs to Manual control
+    ipmitool raw 0x3a 0x42 0x02 0x00 &> /dev/null
+
+    # Set Alarm LED to OFF
+    ipmitool raw 0x3a 0x39 0x02 0x01 0x00 &> /dev/null
+
+    #Set CPLD Fan LED register to BMC control
+    ipmitool raw 0x3a 0x64 0x00 0x02 0x65 0x10 &> /dev/null
+else
+    i2cset -f -y 100 0x0d 0x63 0x33 &> /dev/null
+fi
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pddf_pre_driver_install.sh
new file mode 100755
index 000000000000..4330f7c21382
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pddf_pre_driver_install.sh
@@ -0,0 +1,14 @@
+#!/bin/bash
+# Has customized those drivers,so rename them to lose effect
+psu_driver=pddf_psu_driver_module.ko
+fan_driver=pddf_fan_driver_module.ko
+ker_name=$(uname -r)
+driver_path=/usr/lib/modules/${ker_name}/extra/
+if [ -e ${driver_path}${psu_driver} ]; then
+    mv ${driver_path}${psu_driver} ${driver_path}${psu_driver}-bk
+fi
+
+if [ -e ${driver_path}${fan_driver} ]; then
+    mv ${driver_path}${fan_driver} ${driver_path}${fan_driver}-bk
+fi
+echo 'pddf psu,fan driver module has rename now'
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/platform_sensors.py
new file mode 100755
index 000000000000..8e0dfe90c063
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/platform_sensors.py
@@ -0,0 +1,180 @@
+#!/usr/bin/python
+#
+# Silverstone-v2 platform sensors. This script get the sensor data from BMC 
+# using ipmitool and display them in lm-sensor alike format.
+#
+# The following data is support:
+#  1. Temperature sensors
+#  2. PSUs
+#  3. Fan Drawers
+
+import sys
+import logging
+import subprocess
+
+IPMI_SDR_CMD = ['/usr/bin/ipmitool', 'sdr', 'elist']
+MAX_NUM_FANS = 7
+MAX_NUM_PSUS = 2
+
+SENSOR_NAME = 0
+SENSOR_VAL = 4
+
+sensor_dict = {}
+
+def ipmi_sensor_dump(cmd):
+    ''' Execute ipmitool command return dump output
+        exit if any error occur.
+    '''
+    global sensor_dict
+    sensor_dump = ''
+
+    try:
+        sensor_dump = subprocess.check_output(IPMI_SDR_CMD, universal_newlines=True)
+    except subprocess.CalledProcessError as e:
+        logging.error('Error! Failed to execute: {}'.format(cmd))
+        sys.exit(1)
+
+    for line in sensor_dump.splitlines():
+        sensor_info = line.split('|')
+        sensor_dict[sensor_info[SENSOR_NAME].strip()] = sensor_info[SENSOR_VAL].strip()
+
+    return True
+
+def get_reading_by_name(sensor_name, sdr_elist_dump):
+    '''
+        Search for the match sensor name, return sensor
+        reading value and unit, return object epmtry string 
+        if search not match.
+
+        The output of sensor dump:
+        TEMP_FB_U52      | 00h | ok  |  7.1 | 31 degrees C
+        TEMP_FB_U17      | 01h | ok  |  7.1 | 27 degrees C
+        TEMP_SW_U52      | 02h | ok  |  7.1 | 30 degrees C
+        Fan2_Status      | 07h | ok  | 29.2 | Present
+        Fan2_Front       | 0Eh | ok  | 29.2 | 12000 RPM
+        Fan2_Rear        | 46h | ok  | 29.2 | 14700 RPM
+        PSU2_Status      | 39h | ok  | 10.2 | Presence detected
+        PSU2_Fan         | 3Dh | ok  | 10.2 | 16000 RPM
+        PSU2_VIn         | 3Ah | ok  | 10.2 | 234.30 Volts
+        PSU2_CIn         | 3Bh | ok  | 10.2 | 0.80 Amps
+    '''
+    found = ''
+
+    for line in sdr_elist_dump.splitlines():
+        line = line.decode()
+        if sensor_name in line:
+            found = line.strip()
+            break
+
+    if not found:
+        logging.error('Cannot find sensor name:' + sensor_name)
+
+    else:
+        try:
+            found = found.split('|')[4]
+        except IndexError:
+            logging.error('Cannot get sensor data of:' + sensor_name)
+
+    logging.basicConfig(level=logging.DEBUG)
+    return found
+
+
+def read_temperature_sensors():
+    sensor_list = [\
+        ('TEMP_FB_U52',      'Fanboard Center Temp'),\
+        ('TEMP_FB_U17',      'Fanboard Right Temp'),\
+        ('TEMP_SW_U52',      'Switchboard Left Temp'),\
+        ('TEMP_SW_U16',      'Switchboard Right Temp'),\
+        ('TEMP_CPU',         'CPU Internal Temp'),\
+        ('TEMP_SW_Internal', 'ASIC Internal Temp'),\
+        ('VDD_CORE_Temp',    'TPS536C7 Chip Temp'),\
+        ('XP3R3V_R_Temp',    'MP2975 3.3v Chip Right Temp'),\
+        ('XP3R3V_L_Temp',    'MP2975 3.3v Chip Left Temp'),\
+        ('XP0R8V_Temp',      'MP2975 0.8v Chip Temp')\
+    ]
+
+    output = ''
+    sensor_format = '{0:{width}}{1}\n'
+    # Find max length of sensor calling name
+    max_name_width = max(len(sensor[1]) for sensor in sensor_list)
+
+    output += "Temperature Sensors\n"
+    output += "Adapter: IPMI adapter\n"
+    for sensor in sensor_list:
+        output += sensor_format.format('{}:'.format(sensor[1]),\
+                                       sensor_dict[sensor[0]],\
+                                       width=str(max_name_width+1))
+    output += '\n'
+    return output
+
+def read_fan_sensors(num_fans):
+
+    sensor_list = [\
+        ('Fan{}_Status', 'Fan Drawer {} Status'),\
+        ('Fan{}_Front',  'Fan {} front'),\
+        ('Fan{}_Rear',   'Fan {} rear'),\
+    ]
+
+    output = ''
+    sensor_format = '{0:{width}}{1}\n'
+    # Find max length of sensor calling name
+    max_name_width = max(len(sensor[1]) for sensor in sensor_list)
+
+    output += "Fan Drawers\n"
+    output += "Adapter: IPMI adapter\n"
+    for fan_num in range(1, num_fans+1):
+        for sensor in sensor_list:
+            ipmi_sensor_name = sensor[0].format(fan_num)
+            display_sensor_name = sensor[1].format(fan_num)
+            output += sensor_format.format('{}:'.format(display_sensor_name),\
+                                           sensor_dict[ipmi_sensor_name],\
+                                           width=str(max_name_width+1))
+    output += '\n'
+    return output
+
+def read_psu_sensors(num_psus):
+
+    sensor_list = [\
+        ('PSU{}_Status', 'PSU {} Status'),\
+        ('PSU{}_Fan',    'PSU {} Fan 1'),\
+        ('PSU{}_VIn',    'PSU {} Input Voltage'),\
+        ('PSU{}_CIn',    'PSU {} Input Current'),\
+        ('PSU{}_PIn',    'PSU {} Input Power'),\
+        ('PSU{}_Temp1',  'PSU {} Temp1'),\
+        ('PSU{}_Temp2',  'PSU {} Temp2'),\
+        ('PSU{}_Temp3',  'PSU {} Temp3'),\
+        ('PSU{}_VOut',   'PSU {} Output Voltage'),\
+        ('PSU{}_COut',   'PSU {} Output Current'),\
+        ('PSU{}_POut',   'PSU {} Output Power'),\
+    ]
+
+    output = ''
+    sensor_format = '{0:{width}}{1}\n'
+    # Find max length of sensor calling name
+    max_name_width = max(len(sensor[1]) for sensor in sensor_list)
+
+    output += "PSU\n"
+    output += "Adapter: IPMI adapter\n"
+    for psu_num in range(1, num_psus+1):
+        for sensor in sensor_list:
+            ipmi_sensor_name = sensor[0].format(psu_num)
+            display_sensor_name = sensor[1].format(psu_num)
+            output += sensor_format.format('{}:'.format(display_sensor_name),\
+                                           sensor_dict[ipmi_sensor_name],\
+                                           width=str(max_name_width+1))
+    output += '\n'
+    return output
+
+def main():
+    output_string = ''
+
+    if ipmi_sensor_dump(IPMI_SDR_CMD):
+        output_string += read_temperature_sensors()
+        output_string += read_psu_sensors(MAX_NUM_PSUS)
+        output_string += read_fan_sensors(MAX_NUM_FANS)
+
+        print(output_string)
+
+
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pre_pddf_init.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pre_pddf_init.py
new file mode 100755
index 000000000000..74f0e1ea91cc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/pre_pddf_init.py
@@ -0,0 +1,100 @@
+#!/usr/bin/env python
+# -*- coding: UTF-8 -*-
+# @Time    : 2023/7/24 9:34
+# @Mail    : yajiang@celestica.com
+# @Author  : jiang tao
+# @Function: Load pddf_custom_lpc_basecpld.ko, after confirming the BMC is in place,
+#            load different configuration files, and finally remove the driver.
+
+import subprocess
+import os
+import os.path
+
+
+class PrePddfInit(object):
+    def __init__(self):
+        self.ker_path = "/usr/lib/modules/{}/extra"
+        self.lpc_basecpld_name = "pddf_custom_lpc_basecpld"
+        self.lpc_basecpld_ko = "pddf_custom_lpc_basecpld.ko"
+        self.bmc_exist_cmd = "/sys/bus/platform/devices/sys_cpld/bmc_present"
+        self.platform_name = "x86_64-cel_silverstone_v2-r0"
+        self.bmc_present = False
+
+    @staticmethod
+    def run_command(cmd):
+        status = True
+        result = ""
+        ret, data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            status = False
+        else:
+            result = data
+
+        return status, result
+
+    def get_kernel_path(self):
+        """
+        get the kernel object complete path
+        :return:
+        """
+        sta_, res_ = self.run_command("uname -r")
+        if sta_:
+            return self.ker_path.format(res_)
+        else:
+            return None
+
+    def install_lpc_basecpld(self):
+        """
+        install lpc basecpld driver
+        """
+        ker_path = self.get_kernel_path()
+        if ker_path:
+            self.run_command("insmod %s/%s" % (ker_path, self.lpc_basecpld_ko))
+
+    def uninstall_lpc_basecpld(self):
+        self.run_command("rmmod %s" % self.lpc_basecpld_name)
+
+    def get_bmc_status(self):
+        """
+        get bmc status
+        """
+        self.install_lpc_basecpld()
+        if os.path.exists(self.bmc_exist_cmd):
+            # "1": "absent", "0": "present"
+            sta, res = self.run_command("cat %s" % self.bmc_exist_cmd)
+            self.bmc_present = False if res == "1" else True
+        self.uninstall_lpc_basecpld()
+
+    def choose_pddf_device_json(self):
+        """
+        Depending on the state of the BMC, different pddf-device.json file configurations will be used:
+        1.BMC exist: cp pddf-device.json-bmc pddf-device.json
+        2.None BMC : cp pddf-device.json-nonebmc pddf-device.json
+        """
+        device_name = "pddf-device.json-bmc" if self.bmc_present else "pddf-device.json-nonebmc"
+        device_path = "/usr/share/sonic/device/%s/pddf/" % self.platform_name
+        self.run_command("cp %s%s %spddf-device.json" % (device_path, device_name, device_path))
+
+    def choose_platform_components(self):
+        """
+        Depending on the state of the BMC, different platform_components.json file configurations will be used:
+        1.BMC exist: cp platform_components.json-bmc platform_components.json
+        2.None BMC : cp platform_components.json-nonebmc platform_components.json
+        """
+        # ./usr/share/sonic/device/x86_64-cel_silverstone_v2-r0/platform_components.json
+        device_name = "platform_components.json-bmc" if self.bmc_present else "platform_components.json-nonebmc"
+        device_path = "/usr/share/sonic/device/%s/" % self.platform_name
+        self.run_command("cp %s%s %splatform_components.json" % (device_path, device_name, device_path))
+
+    def main(self):
+        self.get_bmc_status()
+        self.choose_pddf_device_json()
+        self.choose_platform_components()
+        with open("/usr/share/sonic/device/%s/bmc_status" % self.platform_name, 'w') as fp:
+            fp.write(str(self.bmc_present))
+
+
+if __name__ == '__main__':
+    if not os.path.isfile("/usr/share/sonic/device/x86_64-cel_silverstone_v2-r0/bmc_status"):
+        pre_init = PrePddfInit()
+        pre_init.main()
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/sensors b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/sensors
new file mode 100755
index 000000000000..5d740a9eb7d7
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/sensors
@@ -0,0 +1,11 @@
+#!/bin/bash
+
+DOCKER_EXEC_FLAGS="i"
+
+# Determine whether stdout is on a terminal
+if [ -t 1 ] ; then
+    DOCKER_EXEC_FLAGS+="t"
+fi
+
+docker exec -$DOCKER_EXEC_FLAGS pmon sensors "$@"
+docker exec -$DOCKER_EXEC_FLAGS pmon python3 /usr/bin/platform_sensors.py "$@"
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/silverstone_v2_platform_shutdown.sh b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/silverstone_v2_platform_shutdown.sh
new file mode 100755
index 000000000000..03bc2fcf9730
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/scripts/silverstone_v2_platform_shutdown.sh
@@ -0,0 +1,39 @@
+#!/bin/bash
+REBOOT_CAUSE_DIR="/host/reboot-cause"
+HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt"
+REBOOT_TIME=$(date)
+
+if [ $# -ne 1 ]; then
+    echo "Require reboot type"
+    exit 1
+fi
+
+if [ ! -d "$REBOOT_CAUSE_DIR" ]; then
+    mkdir $REBOOT_CAUSE_DIR
+fi
+
+echo "Reason:$1,Time:${REBOOT_TIME}" > ${HW_REBOOT_CAUSE_FILE}
+
+# Best effort to write buffered data onto the disk
+sync ; sync ; sync ; sleep 3
+
+bmc_present=`cat /usr/share/sonic/device/x86_64-cel_silverstone_v2-r0/bmc_status`
+
+if [[ "$bmc_present" == "True" ]]; then
+    # Set all LEDs to BMC's control
+    ipmitool raw 0x3a 0x42 0x02 0x01 &> /dev/null
+
+    # BMC cold power-cyle
+    ipmitool chassis power cycle &> /dev/null
+else
+    # Set System LED to booting pattern
+    i2cset -f -y 100 0x0d 0x62 0x02 &> /dev/null
+
+    # CPLD cold power-cyle
+    i2cset -f -y 100 0x0d 0x64 0x00 &> /dev/null
+fi
+
+# System should reboot by now and avoid the script returning to caller
+sleep 10
+
+exit 0
diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/service/belgite-pddf-platform-monitor.service b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/service/silverstone-v2-pddf-platform-monitor.service
similarity index 58%
rename from platform/broadcom/sonic-platform-modules-cel/belgite/service/belgite-pddf-platform-monitor.service
rename to platform/broadcom/sonic-platform-modules-cel/silverstone-v2/service/silverstone-v2-pddf-platform-monitor.service
index 233971ae784d..a63f5fe71ccd 100644
--- a/platform/broadcom/sonic-platform-modules-cel/belgite/service/belgite-pddf-platform-monitor.service
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/service/silverstone-v2-pddf-platform-monitor.service
@@ -1,11 +1,13 @@
 [Unit]
-Description=Belgite Platform Monitoring service
+Description=Silverstone-V2 Platform background monitor service
 Before=pmon.service
 After=pddf-platform-init.service
 DefaultDependencies=no
 
 [Service]
-ExecStart=/usr/local/bin/belgite_pddf_monitor.py
+ExecStart=/usr/local/bin/pddf_fan_control_sensor_refresh.py
+Restart=always
+RestartSec=30s
 KillSignal=SIGKILL
 SuccessExitStatus=SIGKILL
 
diff --git a/platform/broadcom/sonic-platform-modules-cel/belgite/systemd/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/systemd/pddf-platform-init.service
similarity index 89%
rename from platform/broadcom/sonic-platform-modules-cel/belgite/systemd/pddf-platform-init.service
rename to platform/broadcom/sonic-platform-modules-cel/silverstone-v2/systemd/pddf-platform-init.service
index 249fa2e89764..021f7b283a1a 100644
--- a/platform/broadcom/sonic-platform-modules-cel/belgite/systemd/pddf-platform-init.service
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/systemd/pddf-platform-init.service
@@ -6,6 +6,7 @@ DefaultDependencies=no
 
 [Service]
 Type=oneshot
+ExecStartPre=/usr/local/bin/pre_pddf_init.py
 ExecStart=/usr/local/bin/pddf_util.py install
 ExecStop=/usr/local/bin/pddf_util.py clean
 RemainAfterExit=yes
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/CPUPIDRegulation.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/CPUPIDRegulation.py
new file mode 100755
index 000000000000..8ad50341cd9a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/CPUPIDRegulation.py
@@ -0,0 +1,129 @@
+#!/usr/bin/env python
+# -*- coding: UTF-8 -*-
+# @Time    : 2023/6/19 17:01
+# @Mail    : yajiang@celestica.com
+# @Author  : jiang tao
+# @Function: Perform fan PWM PID control according to the CPU temperature provided by the Thermal team
+
+try:
+    import os
+    import sys
+    import getopt
+    import subprocess
+    import statistics
+    import logging
+    import logging.config
+    import time  # this is only being used as part of the example
+    import signal
+    from sonic_platform import platform
+except ImportError as e:
+    raise ImportError('%s - required module not found' % str(e))
+
+# Defaults
+FUNCTION_NAME = 'FanControl'
+DUTY_MAX = 100
+CPU_TEMP_MAX = 130
+CPU_MAJOR_ALARM = 105
+TEMP_DIFF = 15  # abs(Tk - Tk-1) limit
+CPU_TEMPERATURE = "cat /sys/class/thermal/thermal_zone0/temp"
+
+# PID Defaults Value
+PWM_LIST = [35]  # [PWMk-1]
+T_LIST = []  # [Tk-2, Tk-1, Tk]
+Kp = 1.8
+Ki = 0.3
+Kd = 0
+SET_POINT = 96
+PWM_MIN = 35
+PWM_MAX = 100
+
+
+class CPUPIDRegulation(object):
+    """
+    Make a class we can use to capture stdout and sterr in the log
+    """
+    # static temp var
+    _ori_temp = 0
+    _new_perc = DUTY_MAX / 2
+    syslog = logging.getLogger("[" + FUNCTION_NAME + "]")
+    init_fan_temperature = [0, 0]
+
+    def __init__(self):
+        """Needs a logger and a logger level."""
+        formatter = logging.Formatter('%(name)s %(message)s')
+        sys_handler = logging.handlers.SysLogHandler(address='/dev/log')
+        sys_handler.setFormatter(formatter)
+        sys_handler.ident = 'common'
+        self.syslog.setLevel(logging.WARNING)
+        self.syslog.addHandler(sys_handler)
+
+    @staticmethod
+    def get_cpu_temperature():
+        """
+        Get CPU temperature
+        """
+        try:
+            temp = int(os.popen(CPU_TEMPERATURE).read().strip()) / 1000
+            return temp
+        except Exception:
+            return False
+
+    def exception_data_handling(self):
+        """
+        Get the temperature of CPU, and confirm whether the obtained value meets the conditions:
+        1. The temperature range is 0~130;
+        2. The temperature difference from the last time is within 15
+        Otherwise, loop 5 times to get the temperature value again:
+        1. if can't get the int value of temperature, return False;
+        2. all temperatures are int, return the temperatures average value
+        """
+        re_try = False
+        cpu_temp = self.get_cpu_temperature()
+        if cpu_temp is False:
+            re_try = True
+        elif cpu_temp not in range(CPU_TEMP_MAX+1):
+            re_try = True
+        elif T_LIST and abs(cpu_temp - T_LIST[-1]) > TEMP_DIFF:
+            re_try = True
+
+        if re_try:
+            error_temp_list = list()
+            for _ in range(5):
+                cpu_temp = self.get_cpu_temperature()
+                if (type(cpu_temp) is int) and \
+                        (cpu_temp in range(CPU_TEMP_MAX+1)) and \
+                        (abs(cpu_temp - T_LIST[-1]) <= TEMP_DIFF):
+                    return cpu_temp
+                else:
+                    error_temp_list.append(cpu_temp)
+            if False in error_temp_list:
+                return False
+            return statistics.mean(error_temp_list)
+        return cpu_temp
+
+    def pid_control(self):
+        """
+        PID adjustment according to Switch Internal Temperature
+        :return: fans pwm
+        """
+        cpu_temp = self.exception_data_handling()
+        if not cpu_temp:
+            return DUTY_MAX
+        if cpu_temp >= CPU_MAJOR_ALARM:
+            self.syslog.warning("High temperature warning: CPU temperature %sC, Major Alarm  %sC"
+                                % (cpu_temp, CPU_MAJOR_ALARM))
+        if len(T_LIST) < 2:
+            T_LIST.append(float(cpu_temp))
+            return PWM_LIST[0]
+        else:
+            T_LIST.append(float(cpu_temp))
+            pwm_k = PWM_LIST[0] + Kp * (T_LIST[2] - T_LIST[1]) + \
+                Ki * (T_LIST[2] - SET_POINT) + \
+                Kd * (T_LIST[2] - 2 * T_LIST[1] + T_LIST[0])
+            if pwm_k < PWM_MIN:
+                pwm_k = PWM_MIN
+            elif pwm_k > PWM_MAX:
+                pwm_k = PWM_MAX
+            PWM_LIST[0] = pwm_k
+            T_LIST.pop(0)
+            return pwm_k
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/FanControl.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/FanControl.py
new file mode 100755
index 000000000000..f7fe5e82b898
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/FanControl.py
@@ -0,0 +1,207 @@
+#!/usr/bin/env python
+# -*- coding: UTF-8 -*-
+# @Time    : 2023/6/19 17:44
+# @Mail    : yajiang@celestica.com
+# @Author  : jiang tao
+# @Function: Fan control strategy main program
+
+try:
+    import re
+    import os
+    import sys
+    import getopt
+    import subprocess
+    import logging
+    import logging.config
+    import time  # this is only being used as part of the example
+    import signal
+    from sonic_platform import platform
+    from . import CPUPIDRegulation
+    from . import FanLinearAdjustment
+    from . import SwitchInternalPIDRegulation
+except ImportError as e:
+    raise ImportError('%s - required module not found' % str(e))
+
+FUNCTION_NAME = "FanControl"
+ERROR_COLOR = "amber"
+NORMAL_COLOR = "green"
+DUTY_MAX = 100
+FAN_NUMBER = 7
+PSU_NUMBER = 2
+SENSOR_NUMBER = 6
+Fan_Front_MAX = 40000
+Fan_Front_MIN = 7800
+Fan_Rear_MAX = 37800
+Fan_Rear_MIN = 6600
+
+
+class FanControl(object):
+    """
+    Make a class we can use to capture stdout in the log
+    """
+    # static temp var
+    _ori_temp = 0
+    _new_perc = DUTY_MAX / 2
+    syslog = logging.getLogger("[" + FUNCTION_NAME + "]")
+    init_fan_temperature = [0, 0]
+
+    def __init__(self):
+        self.FanLinearAdjustment = FanLinearAdjustment.FanLinearAdjustment(DUTY_MAX, FAN_NUMBER, PSU_NUMBER, SENSOR_NUMBER)
+        self.SwitchInternalPIDRegulation = SwitchInternalPIDRegulation.SwitchInternalPIDRegulation()
+        self.CPUPIDRegulation = CPUPIDRegulation.CPUPIDRegulation()
+        # Needs a logger and a logger level
+        formatter = logging.Formatter('%(name)s %(message)s')
+        sys_handler = logging.handlers.SysLogHandler(address='/dev/log')
+        sys_handler.setFormatter(formatter)
+        sys_handler.ident = 'common'
+        self.syslog.setLevel(logging.WARNING)
+        self.syslog.addHandler(sys_handler)
+        self.platform_chassis_obj = platform.Platform().get_chassis()
+
+    def get_psu_status(self, fan_duty_list):
+        """
+        Get PSU Status.If one PSU not OK, all of the fans pwm will increase to 100
+        :param fan_duty_list: A list.TO app the fans target pwm
+        """
+        psu_presence_list = [True, True]
+        try:
+            pus_info = os.popen("i2cget -y -f 100 0x0d 0x60").read().strip()
+            psus_present = bin(int(pus_info, 16))[6:8]
+            for psu_index in range(PSU_NUMBER):
+                psu_presence = True if psus_present[psu_index] == "0" else False
+                if not psu_presence:
+                    psu_presence_list[psu_index] = False
+                    self.syslog.warning(
+                        "psu%s was error,presence:%s" % (psu_index + 1, str(psu_presence)))
+                else:
+                    psu_presence_list[psu_index] = True
+            if False in psu_presence_list:
+                fan_duty_list.append(DUTY_MAX)
+        except Exception:
+            pass
+
+    def get_fan_status(self):
+        """
+        Get all of fans status(fan drawer)
+        :return: A list indicating the status of all groups fans
+        """
+        fan_presence_list = [True, True, True, True, True, True, True]  # Default state: fans are OK
+        for fan_drawer_index in range(FAN_NUMBER):
+            try:
+                fan_presence = self.platform_chassis_obj.get_fan_drawer(fan_drawer_index).get_presence()
+                fan_status = self.platform_chassis_obj.get_fan_drawer(fan_drawer_index).get_status()
+                if not all([fan_presence, fan_status]):
+                    fan_presence_list[fan_drawer_index] = False
+                    self.syslog.warning("Fan Drawer-%s has error,presence:%s, status:%s"
+                                        % (fan_drawer_index + 1, fan_presence, fan_status))
+            except Exception:
+                pass
+        return fan_presence_list
+
+    def check_fans_presence(self):
+        """
+        check all fans presence or not
+        """
+        fans_inserted_list = self.get_fan_status()
+        fans_inserted_num = fans_inserted_list.count(True)
+        if fans_inserted_num == 0:  # all fans broken, cpld will power off
+            self.syslog.critical("No fans inserted!!! Severe overheating hazard. "
+                                 "Please insert Fans immediately or power off the device")
+
+    def set_fans_pwm_by_rpm(self, fan_duty_list):
+        """
+        Set fans pwm by fans rpm. If all fans normal or 1 fan broken,
+        manage the fans follow thermal policy.
+        More than 1 fans broken, Will increase the fan speed to 100%
+        :param fan_duty_list: A list.TO app the fans target pwm
+        """
+        fan_rpm_error_list = list()
+        for fan in self.platform_chassis_obj.get_all_fans():
+            fan_name = fan.get_name()
+            fan_speed_rpm = fan.get_speed_rpm()
+            if fan_name.endswith("1") and (fan_speed_rpm not in range(Fan_Front_MIN, Fan_Front_MAX + 1)):
+                fan_rpm_error_list.append(fan_name)
+            if fan_name.endswith("2") and (fan_speed_rpm not in range(Fan_Rear_MIN, Fan_Rear_MAX + 1)):
+                fan_rpm_error_list.append(fan_name)
+        if not fan_rpm_error_list:
+            for fan_drawer_index in range(FAN_NUMBER):
+                self.platform_chassis_obj.get_fan_drawer(fan_drawer_index).set_status_led(NORMAL_COLOR)
+            return None
+        if len(fan_rpm_error_list) >= 2:
+            self.syslog.warning("%s rpm less than the set minimum speed. "
+                                "Will increase the fan speed to 100%%" % fan_rpm_error_list)
+            fan_duty_list.append(DUTY_MAX)
+        else:
+            self.syslog.warning("%s rpm less than the set minimum speed. Fans pwm isn't changed" % fan_rpm_error_list)
+
+        fan_modules_index_list = list(set(int(re.findall(r"Fantray(\d)_\d", x)[0]) for x in fan_rpm_error_list))
+        for error_fan_drawer in fan_modules_index_list:
+            self.platform_chassis_obj.get_fan_drawer(error_fan_drawer-1).set_status_led(ERROR_COLOR)
+
+        self.syslog.warning("The STA front panel light will be set to %s" % ERROR_COLOR)
+        self.platform_chassis_obj.set_status_led(ERROR_COLOR)
+
+    def get_linear_pid_pwm(self, fan_duty_list):
+        """
+        Get the pwm value of liner regulation, cpu pid adjustment, switch internal pid adjustment
+        :param fan_duty_list: A list.TO app the fans target pwm
+        """
+        linear_regulation = self.FanLinearAdjustment.linear_control()
+        cpu_pid_adjustment = self.CPUPIDRegulation.pid_control()
+        sw_pid_adjustment = self.SwitchInternalPIDRegulation.pid_control()
+        fan_duty_list.append(linear_regulation)
+        fan_duty_list.append(cpu_pid_adjustment)
+        fan_duty_list.append(sw_pid_adjustment)
+
+    def manage_fans(self):
+        """
+        Set the fan speed according to the Fan Control Strategy
+        """
+        fan_duty_speed_list = list()
+
+        # Fan speed setting judgment-PSU
+        self.get_psu_status(fan_duty_speed_list)
+
+        # Fan speed setting judgment-FAN presence
+        self.check_fans_presence()
+
+        # Fan speed setting judgment-FAN SPEED
+        self.set_fans_pwm_by_rpm(fan_duty_speed_list)
+
+        # Fan speed setting judgment-linear and cpu pid and sw pid
+        self.get_linear_pid_pwm(fan_duty_speed_list)
+
+        self._new_perc = max(fan_duty_speed_list)
+        if self._new_perc < 35:
+            self._new_perc = 35
+        if self._new_perc > 100:
+            self._new_perc = 100
+
+        for fan in self.platform_chassis_obj.get_all_fans():
+            fan.set_speed(self._new_perc)
+
+
+def handler(signum, frame):
+    logging.warning('Cause signal %d, will set all fan speed to max.' % signum)
+    platform_chassis = platform.Platform().get_chassis()
+    set_error = list()
+    fan_index = 1
+    for fan in platform_chassis.get_all_fans():
+        set_stat = fan.set_speed(DUTY_MAX)
+        fan_drawer = fan_index//2
+        if not set_stat:
+            set_error.append(fan_drawer)
+        fan_index += 1
+    if set_error:
+        logging.error('Fail. Set Fantray %s to (%d) failed' % (list(set(set_error)), DUTY_MAX))
+    sys.exit(0)
+
+
+def main():
+    signal.signal(signal.SIGINT, handler)
+    signal.signal(signal.SIGTERM, handler)
+    monitor = FanControl()
+    # Loop forever, doing something useful hopefully:
+    while True:
+        monitor.manage_fans()
+        time.sleep(2)
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/FanLinearAdjustment.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/FanLinearAdjustment.py
new file mode 100755
index 000000000000..fac9ba9253ff
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/FanLinearAdjustment.py
@@ -0,0 +1,156 @@
+#!/usr/bin/env python
+# -*- coding: UTF-8 -*-
+# @Time    : 2023/6/16 17:00
+# @Mail    : yajiang@celestica.com
+# @Author  : jiang tao
+# @Function: Fan PWM confirmation according to Thermal team's fan linear control strategy
+
+try:
+    import sys
+    import getopt
+    import subprocess
+    import logging
+    import logging.config
+    import time  # this is only being used as part of the example
+    import signal
+    from sonic_platform import platform
+except ImportError as e:
+    raise ImportError('%s - required module not found' % str(e))
+
+# Defaults
+FUNCTION_NAME = "FanControl"
+
+
+class FanLinearAdjustment(object):
+    """
+    Make a class we can use to capture stdout in the log
+    """
+    syslog = logging.getLogger("[" + FUNCTION_NAME + "]")
+    init_fan_temperature = [0, 0]
+
+    def __init__(self, duty_max, fan_num, psu_num, sensor_num):
+        self.duty_max = duty_max
+        self.fan_num = fan_num
+        self.psu_num = psu_num
+        self.sensor_num = sensor_num
+        self.last_pwm = 0
+        #  Needs a logger and a logger level
+        formatter = logging.Formatter('%(name)s %(message)s')
+        sys_handler = logging.handlers.SysLogHandler(address='/dev/log')
+        sys_handler.setFormatter(formatter)
+        sys_handler.ident = 'common'
+        self.syslog.setLevel(logging.WARNING)
+        self.syslog.addHandler(sys_handler)
+        self.platform_chassis_obj = platform.Platform().get_chassis()
+        
+    def get_all_temperature(self):
+        """
+        Get U16 and U17 temperature by thermal API
+        return: [TEMP_SW_U16 temperature, TEMP_FB_U17 temperature]
+        """
+        all_temperature_list = list()
+        for sensor_index in range(self.sensor_num):
+            temp = self.platform_chassis_obj.get_thermal(sensor_index).get_temperature()
+            if temp is None or str(temp).strip() == "":
+                for count in range(5):  # retry to get the temperature
+                    temp = self.platform_chassis_obj.get_thermal(sensor_index).get_temperature()
+                    try:
+                        float(temp)
+                        break
+                    except ValueError:
+                        pass
+                else:
+                    return None
+            all_temperature_list.append(temp)
+        u16_temperature = all_temperature_list[4]
+        u17_temperature = all_temperature_list[5]
+        return [u16_temperature, u17_temperature]
+
+    def get_fan_pwm_by_temperature(self, temp_list):
+        """
+        According to the sensor temperature, the temperature rise and fall are judged,
+        and the fan speed with the highest speed is selected
+        :param temp_list: Sensor temperature list
+        :return: According to the sensor temperature, select the maximum expected fan value at each point(int)
+        """
+        fan_direction = "NA"
+        for fan in self.platform_chassis_obj.get_all_fans():
+            fan_status = fan.get_status()
+            if fan_status:
+                fan_direction = fan.get_direction()
+                break
+        all_temp = self.get_all_temperature()
+        if all_temp is None:
+            # According to Thermal suggestion, when the temperature can't be
+            # obtained, set the fan to full speed
+            self.syslog.warning("Can't get TEMP_FB_U17/TEMP_SW_U16, Will increase the fan speed to 100%%")
+            return self.duty_max
+
+        # B2F=intake: U17 temperature， F2B-EXHAUST: U16 temperature
+        sensor_index = 1 if fan_direction.lower() == "intake" else 0
+        sensor_temp = float(all_temp[sensor_index])
+        update_temp_sensor = True
+        diff_temp = temp_list[sensor_index] - all_temp[sensor_index]
+        if diff_temp > 0:
+            update_temp_sensor = False
+
+        if sensor_index == 0:
+            if not update_temp_sensor:  # U16 temperature down
+                b = 919 / 6
+                if sensor_temp <= 37:
+                    sensor_temp_pwm = 38
+                elif sensor_temp >= 49:
+                    sensor_temp_pwm = self.duty_max
+                else:
+                    sensor_temp_pwm = int((31 / 6) * sensor_temp - b)
+            else:  # U16 temperature up
+                b = 506 / 3
+                if sensor_temp <= 40:
+                    sensor_temp_pwm = 38
+                elif sensor_temp >= 52:
+                    sensor_temp_pwm = self.duty_max
+                else:
+                    sensor_temp_pwm = int((31 / 6) * sensor_temp - b)
+            return self.choose_pwm(update_temp_sensor, self.last_pwm, sensor_temp_pwm)
+        else:
+            if not update_temp_sensor:  # U17 temperature down
+                b = 20
+                if sensor_temp <= 23:
+                    sensor_temp_pwm = 40
+                elif sensor_temp >= 46:
+                    sensor_temp_pwm = self.duty_max
+                else:
+                    sensor_temp_pwm = int((60 / 23) * sensor_temp - b)
+            else:  # U17 temperature up
+                b = 640 / 23
+                if sensor_temp <= 23:
+                    sensor_temp_pwm = 40
+                elif sensor_temp >= 49:
+                    sensor_temp_pwm = self.duty_max
+                else:
+                    sensor_temp_pwm = int((60 / 23) * sensor_temp - b)
+            return self.choose_pwm(update_temp_sensor, self.last_pwm, sensor_temp_pwm)
+
+    @staticmethod
+    def choose_pwm(status, last_pwm, now_pwm):
+        """
+        choose the pwm with Thermal rules
+        :param status: Temperature rises (True) or falls(False)
+        :param last_pwm:last pwm value
+        :param now_pwm:Calculated pwm from current temperature
+        :return:int.The pwm value
+        """
+        if status:
+            return last_pwm if last_pwm >= now_pwm else now_pwm
+        else:
+            return now_pwm if last_pwm >= now_pwm else last_pwm
+
+    def linear_control(self):
+        """
+        According to linear adjustment return the fans pwm
+        :return: fans pwm
+        """
+        new_perc = self.get_fan_pwm_by_temperature(self.init_fan_temperature)
+        self.init_fan_temperature = self.get_all_temperature()
+        self.last_pwm = new_perc
+        return new_perc
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/SwitchInternalPIDRegulation.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/SwitchInternalPIDRegulation.py
new file mode 100755
index 000000000000..96f96b20369a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/SwitchInternalPIDRegulation.py
@@ -0,0 +1,145 @@
+#!/usr/bin/env python
+# -*- coding: UTF-8 -*-
+# @Time    : 2023/6/19 16:26
+# @Mail    : yajiang@celestica.com
+# @Author  : jiang tao
+# @Function: Perform fan PWM PID control according to the Switch Internal temperature provided by the Thermal team
+
+try:
+    import os
+    import sys
+    import getopt
+    import subprocess
+    import statistics
+    import logging
+    import logging.config
+    import time  # this is only being used as part of the example
+    import signal
+    from sonic_platform import platform
+except ImportError as e:
+    raise ImportError('%s - required module not found' % str(e))
+
+# Defaults
+FUNCTION_NAME = 'FanControl'
+DUTY_MAX = 100
+SW_TEMP_MAX = 150
+SW_MAJOR_ALARM = 110
+SW_SHUTDOWN = 124
+TEMP_DIFF = 15  # abs(Tk - Tk-1) limit
+SWITCH_INTERNAL_PATH = "/sys/devices/platform/fpga_sysfs/getreg"
+
+# PID Defaults Value
+PWM_LIST = [35]  # [PWMk-1]
+T_LIST = []  # [Tk-2, Tk-1, Tk]
+Kp = 3
+Ki = 0.3
+Kd = 0.5
+SET_POINT = 100
+PWM_MIN = 35
+PWM_MAX = 100
+
+
+class SwitchInternalPIDRegulation(object):
+    """
+    Make a class we can use to capture stdout in the log
+    """
+    _new_perc = DUTY_MAX / 2
+    syslog = logging.getLogger("[" + FUNCTION_NAME + "]")
+
+    def __init__(self):
+        # Needs a logger and a logger level
+        formatter = logging.Formatter('%(name)s %(message)s')
+        sys_handler = logging.handlers.SysLogHandler(address='/dev/log')
+        sys_handler.setFormatter(formatter)
+        sys_handler.ident = 'common'
+        self.syslog.setLevel(logging.WARNING)
+        self.syslog.addHandler(sys_handler)
+        self.platform_chassis_obj = platform.Platform().get_chassis()
+
+    def get_switch_internal_temperature(self):
+        """
+        Get Switch internal temperature
+        """
+        try:
+            subprocess.run("echo 0x78 > {}".format(SWITCH_INTERNAL_PATH))
+            ret,value_1 = subprocess.getstatusoutput("cat {}".format(SWITCH_INTERNAL_PATH))
+            value_1 = value_1.strip()
+
+            subprocess.run("echo 0x80 > {}".format(SWITCH_INTERNAL_PATH))
+            ret,value_2 = subprocess.getstatusoutput("cat {}".format(SWITCH_INTERNAL_PATH))
+            value_2 = value_2.strip()
+
+            freq = int(value_2, 16)
+            freq = freq * 256 + int(value_1, 16)
+            temp = (434100 - ((12500000 / freq - 1) * 535)) / 1000
+            return int(temp)
+        except Exception as E:
+            self.syslog.warning("Can't Get switch internal temperature! Cause:%s" % str(E))
+            return False
+
+    def exception_data_handling(self):
+        """
+        Get the temperature of Switch Internal, and confirm whether the obtained value meets the conditions:
+        1. The temperature range is 0~150;
+        2. The temperature difference from the last time is within 15
+        Otherwise, loop 5 times to get the temperature value again:
+        1. if can't get the int value of temperature, return False;
+        2. all temperatures are int, return the temperatures average value
+        """
+        re_try = False
+        sw_temp = self.get_switch_internal_temperature()
+        if sw_temp is False:
+            re_try = True
+        elif sw_temp not in range(SW_TEMP_MAX+1):
+            re_try = True
+        elif T_LIST and abs(sw_temp - T_LIST[-1]) > TEMP_DIFF:
+            re_try = True
+
+        if re_try:
+            error_temp_list = list()
+            while len(error_temp_list) < 5:
+                sw_temp = self.get_switch_internal_temperature()
+                if (type(sw_temp) is int) and \
+                        (sw_temp in range(SW_TEMP_MAX+1)) and \
+                        (abs(sw_temp - T_LIST[-1]) <= TEMP_DIFF):
+                    return sw_temp
+                else:
+                    error_temp_list.append(sw_temp)
+            if False in error_temp_list:
+                return False
+            return statistics.mean(error_temp_list)
+        return sw_temp
+
+    def pid_control(self):
+        """
+        PID adjustment according to Switch Internal Temperature
+        :return: fans pwm
+        """
+        sw_temp = self.exception_data_handling()
+        if not sw_temp:
+            return DUTY_MAX
+        sw_temp = sw_temp + 3
+        if sw_temp >= SW_MAJOR_ALARM:
+            self.syslog.warning("High temperature warning: switch internal temperature %sC, Major Alarm  %sC"
+                                % (sw_temp, SW_MAJOR_ALARM))
+        if sw_temp >= SW_SHUTDOWN:
+            self.syslog.critical("The Switch Internal temperature exceeds %sC, "
+                                 "the Switch board will be powered off. And will reboot now" % SW_SHUTDOWN)
+            os.popen("i2cset -y -f 100 0x0d 0x40 0x00")
+            os.popen("i2cset -y -f 100 0x0d 0x40 0x01")
+            os.popen("reboot")
+        if len(T_LIST) < 2:
+            T_LIST.append(float(sw_temp))
+            return PWM_LIST[0]
+        else:
+            T_LIST.append(float(sw_temp))
+            pwm_k = PWM_LIST[0] + Kp * (T_LIST[2] - T_LIST[1]) + \
+                Ki * (T_LIST[2] - SET_POINT) + \
+                Kd * (T_LIST[2] - 2 * T_LIST[1] + T_LIST[0])
+            if pwm_k < PWM_MIN:
+                pwm_k = PWM_MIN
+            elif pwm_k > PWM_MAX:
+                pwm_k = PWM_MAX
+            PWM_LIST[0] = pwm_k
+            T_LIST.pop(0)
+            return pwm_k
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/__init__.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/__init__.py
new file mode 100755
index 000000000000..fd2df8085779
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/FanControl/__init__.py
@@ -0,0 +1,5 @@
+# -*- coding: utf-8 -*-#
+
+# @Time   : 2023/6/20 16:01
+# @Mail   : yajiang@celestica.com
+# @Author : jiang tao
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/pddf_fan_control_sensor_refresh.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/pddf_fan_control_sensor_refresh.py
new file mode 100755
index 000000000000..d2e2b7f271f4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/pddf_fan_control_sensor_refresh.py
@@ -0,0 +1,26 @@
+#!/usr/bin/python
+# -*- coding: utf-8 -*-#
+
+# @Time   : 2023/7/31 13:15
+# @Mail   : yajiang@celestica.com
+# @Author : jiang tao
+
+import sys
+import time
+import json
+sys.path.append(r"/usr/local/bin")
+from FanControl import FanControl
+import pddf_sensor_list_refresh
+
+
+pddf_device_path = '/usr/share/sonic/platform/pddf/pddf-device.json'
+with open(pddf_device_path) as f:
+    json_data = json.load(f)
+bmc_present = json_data["PLATFORM"]["bmc_present"]
+# Wait for a while to ensure that the corresponding system files are ready
+time.sleep(30)
+if bmc_present == "False":
+    FanControl.main()
+
+if bmc_present == "True":
+    pddf_sensor_list_refresh.main()
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/pddf_sensor_list_refresh.py b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/pddf_sensor_list_refresh.py
new file mode 100755
index 000000000000..a320878bd242
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone-v2/utils/pddf_sensor_list_refresh.py
@@ -0,0 +1,39 @@
+#!/usr/bin/python
+# -*- coding: utf-8 -*-#
+
+# @Time   : 2023/4/13 9:46
+# @Mail   : yajiang@celestica.com
+# @Author : jiang tao
+
+import os
+import time
+
+try:
+    from sonic_platform import sensor_list_config
+    from sonic_py_common import logger
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+sensor_info_path = sensor_list_config.Sensor_List_Info
+refresh_interval = sensor_list_config.Sensor_Info_Update_Period_Secs
+
+log = logger.Logger()
+
+
+def write_sensor_list_info():
+    """
+    Write the log of the command 'ipmitool sensor list' in sensor_info.log
+    """
+    try:
+        info = os.popen("ipmitool sensor list").read()
+        if "System_Event" in info:
+            with open(sensor_info_path, "w") as f:
+                f.write(info)
+    except Exception as E:
+        log.log_error(str(E))
+
+
+def main():
+    while 1:
+        write_sensor_list_info()
+        time.sleep(refresh_interval)
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/cfg/silverstone-modules.conf b/platform/broadcom/sonic-platform-modules-cel/silverstone/cfg/silverstone-modules.conf
index cb8dcf640ba3..001538945867 100644
--- a/platform/broadcom/sonic-platform-modules-cel/silverstone/cfg/silverstone-modules.conf
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/cfg/silverstone-modules.conf
@@ -9,7 +9,7 @@ i2c-ismt
 i2c-dev
 i2c-mux
 i2c-smbus
+coretemp
 
-i2c-mux-pca954x
 ipmi_devintf
-ipmi_si
\ No newline at end of file
+ipmi_si
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/Makefile b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/Makefile
index f6ad4d9ba4d1..44b9b6147e57 100644
--- a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/Makefile
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/Makefile
@@ -1 +1 @@
-obj-m := baseboard-lpc.o mc24lc64t.o switchboard.o
\ No newline at end of file
+obj-m := baseboard-lpc.o mc24lc64t.o cls-switchboard.o xcvr-cls.o switch_cpld.o cls-i2c-mux-pca954x.o
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/baseboard-lpc.c b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/baseboard-lpc.c
index b6291f7d3ce4..50f9e2d886bc 100644
--- a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/baseboard-lpc.c
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/baseboard-lpc.c
@@ -98,7 +98,7 @@ static ssize_t version_show(struct device *dev, struct device_attribute *attr, c
     mutex_lock(&cpld_data->cpld_lock);
     version = inb(VERSION_ADDR);
     mutex_unlock(&cpld_data->cpld_lock);
-    return sprintf(buf, "%d.%d\n", version >> 4, version & 0x0F);
+    return sprintf(buf, "%x.%x\n", version >> 4, version & 0x0F);
 }
 static DEVICE_ATTR_RO(version);
 
@@ -430,4 +430,4 @@ module_exit(cpld_b_exit);
 MODULE_AUTHOR("Celestica Inc.");
 MODULE_DESCRIPTION("Celestica Silverstone CPLD baseboard driver");
 MODULE_VERSION("0.2.0");
-MODULE_LICENSE("GPL");
\ No newline at end of file
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-i2c-mux-pca954x.c b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-i2c-mux-pca954x.c
new file mode 100644
index 000000000000..87c51c15ad97
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-i2c-mux-pca954x.c
@@ -0,0 +1,578 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * I2C multiplexer
+ *
+ * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
+ * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
+ *
+ * This module supports the PCA954x and PCA984x series of I2C multiplexer/switch
+ * chips made by NXP Semiconductors.
+ * This includes the:
+ *	 PCA9540, PCA9542, PCA9543, PCA9544, PCA9545, PCA9546, PCA9547,
+ *	 PCA9548, PCA9846, PCA9847, PCA9848 and PCA9849.
+ *
+ * These chips are all controlled via the I2C bus itself, and all have a
+ * single 8-bit register. The upstream "parent" bus fans out to two,
+ * four, or eight downstream busses or channels; which of these
+ * are selected is determined by the chip type and register contents. A
+ * mux can select only one sub-bus at a time; a switch can select any
+ * combination simultaneously.
+ *
+ * Based on:
+ *	pca954x.c from Kumar Gala <galak@kernel.crashing.org>
+ * Copyright (C) 2006
+ *
+ * Based on:
+ *	pca954x.c from Ken Harrenstien
+ * Copyright (C) 2004 Google, Inc. (Ken Harrenstien)
+ *
+ * Based on:
+ *	i2c-virtual_cb.c from Brian Kuschak <bkuschak@yahoo.com>
+ * and
+ *	pca9540.c from Jean Delvare <jdelvare@suse.de>.
+ */
+
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/i2c.h>
+#include <linux/i2c-mux.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/module.h>
+#include <linux/pm.h>
+#include <linux/property.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <dt-bindings/mux/mux.h>
+#include "cls-pca954x.h"
+
+#define PCA954X_MAX_NCHANS 8
+
+#define PCA954X_IRQ_OFFSET 4
+
+enum pca_type {
+	pca_9540,
+	pca_9542,
+	pca_9543,
+	pca_9544,
+	pca_9545,
+	pca_9546,
+	pca_9547,
+	pca_9548,
+	pca_9846,
+	pca_9847,
+	pca_9848,
+	pca_9849,
+};
+
+struct chip_desc {
+	u8 nchans;
+	u8 enable;	/* used for muxes only */
+	u8 has_irq;
+	enum muxtype {
+		pca954x_ismux = 0,
+		pca954x_isswi
+	} muxtype;
+	struct i2c_device_identity id;
+};
+
+struct pca954x {
+	const struct chip_desc *chip;
+
+	u8 last_chan;		/* last register value */
+	/* MUX_IDLE_AS_IS, MUX_IDLE_DISCONNECT or >= 0 for channel */
+	s32 idle_state;
+
+	struct i2c_client *client;
+
+	struct irq_domain *irq;
+	unsigned int irq_mask;
+	raw_spinlock_t lock;
+};
+
+/* Provide specs for the PCA954x types we know about */
+static const struct chip_desc chips[] = {
+	[pca_9540] = {
+		.nchans = 2,
+		.enable = 0x4,
+		.muxtype = pca954x_ismux,
+		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
+	},
+	[pca_9542] = {
+		.nchans = 2,
+		.enable = 0x4,
+		.has_irq = 1,
+		.muxtype = pca954x_ismux,
+		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
+	},
+	[pca_9543] = {
+		.nchans = 2,
+		.has_irq = 1,
+		.muxtype = pca954x_isswi,
+		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
+	},
+	[pca_9544] = {
+		.nchans = 4,
+		.enable = 0x4,
+		.has_irq = 1,
+		.muxtype = pca954x_ismux,
+		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
+	},
+	[pca_9545] = {
+		.nchans = 4,
+		.has_irq = 1,
+		.muxtype = pca954x_isswi,
+		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
+	},
+	[pca_9546] = {
+		.nchans = 4,
+		.muxtype = pca954x_isswi,
+		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
+	},
+	[pca_9547] = {
+		.nchans = 8,
+		.enable = 0x8,
+		.muxtype = pca954x_ismux,
+		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
+	},
+	[pca_9548] = {
+		.nchans = 8,
+		.muxtype = pca954x_isswi,
+		.id = { .manufacturer_id = I2C_DEVICE_ID_NONE },
+	},
+	[pca_9846] = {
+		.nchans = 4,
+		.muxtype = pca954x_isswi,
+		.id = {
+			.manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS,
+			.part_id = 0x10b,
+		},
+	},
+	[pca_9847] = {
+		.nchans = 8,
+		.enable = 0x8,
+		.muxtype = pca954x_ismux,
+		.id = {
+			.manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS,
+			.part_id = 0x108,
+		},
+	},
+	[pca_9848] = {
+		.nchans = 8,
+		.muxtype = pca954x_isswi,
+		.id = {
+			.manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS,
+			.part_id = 0x10a,
+		},
+	},
+	[pca_9849] = {
+		.nchans = 4,
+		.enable = 0x4,
+		.muxtype = pca954x_ismux,
+		.id = {
+			.manufacturer_id = I2C_DEVICE_ID_NXP_SEMICONDUCTORS,
+			.part_id = 0x109,
+		},
+	},
+};
+
+static const struct i2c_device_id pca954x_id[] = {
+	{ "cls_pca9540", pca_9540 },
+	{ "cls_pca9542", pca_9542 },
+	{ "cls_pca9543", pca_9543 },
+	{ "cls_pca9544", pca_9544 },
+	{ "cls_pca9545", pca_9545 },
+	{ "cls_pca9546", pca_9546 },
+	{ "cls_pca9547", pca_9547 },
+	{ "cls_pca9548", pca_9548 },
+	{ "cls_pca9846", pca_9846 },
+	{ "cls_pca9847", pca_9847 },
+	{ "cls_pca9848", pca_9848 },
+	{ "cls_pca9849", pca_9849 },
+	{ }
+};
+MODULE_DEVICE_TABLE(i2c, pca954x_id);
+
+static const struct of_device_id pca954x_of_match[] = {
+	{ .compatible = "nxp,cls_pca9540", .data = &chips[pca_9540] },
+	{ .compatible = "nxp,cls_pca9542", .data = &chips[pca_9542] },
+	{ .compatible = "nxp,cls_pca9543", .data = &chips[pca_9543] },
+	{ .compatible = "nxp,cls_pca9544", .data = &chips[pca_9544] },
+	{ .compatible = "nxp,cls_pca9545", .data = &chips[pca_9545] },
+	{ .compatible = "nxp,cls_pca9546", .data = &chips[pca_9546] },
+	{ .compatible = "nxp,cls_pca9547", .data = &chips[pca_9547] },
+	{ .compatible = "nxp,cls_pca9548", .data = &chips[pca_9548] },
+	{ .compatible = "nxp,cls_pca9846", .data = &chips[pca_9846] },
+	{ .compatible = "nxp,cls_pca9847", .data = &chips[pca_9847] },
+	{ .compatible = "nxp,cls_pca9848", .data = &chips[pca_9848] },
+	{ .compatible = "nxp,cls_pca9849", .data = &chips[pca_9849] },
+	{}
+};
+MODULE_DEVICE_TABLE(of, pca954x_of_match);
+
+/* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer()
+   for this as they will try to lock adapter a second time */
+static int pca954x_reg_write(struct i2c_adapter *adap,
+			     struct i2c_client *client, u8 val)
+{
+	union i2c_smbus_data dummy;
+
+	return __i2c_smbus_xfer(adap, client->addr, client->flags,
+				I2C_SMBUS_WRITE, val,
+				I2C_SMBUS_BYTE, &dummy);
+}
+
+static u8 pca954x_regval(struct pca954x *data, u8 chan)
+{
+	/* We make switches look like muxes, not sure how to be smarter. */
+	if (data->chip->muxtype == pca954x_ismux)
+		return chan | data->chip->enable;
+	else
+		return 1 << chan;
+}
+
+static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan)
+{
+	struct pca954x *data = i2c_mux_priv(muxc);
+	struct i2c_client *client = data->client;
+	u8 regval;
+	int ret = 0;
+
+	regval = pca954x_regval(data, chan);
+	/* Only select the channel if its different from the last channel */
+	if (data->last_chan != regval) {
+		ret = pca954x_reg_write(muxc->parent, client, regval);
+		data->last_chan = ret < 0 ? 0 : regval;
+	}
+
+	return ret;
+}
+
+static int pca954x_deselect_mux(struct i2c_mux_core *muxc, u32 chan)
+{
+	struct pca954x *data = i2c_mux_priv(muxc);
+	struct i2c_client *client = data->client;
+	s32 idle_state;
+
+	idle_state = READ_ONCE(data->idle_state);
+	if (idle_state >= 0)
+		/* Set the mux back to a predetermined channel */
+		return pca954x_select_chan(muxc, idle_state);
+
+	if (idle_state == MUX_IDLE_DISCONNECT) {
+		/* Deselect active channel */
+		data->last_chan = 0;
+		return pca954x_reg_write(muxc->parent, client,
+					 data->last_chan);
+	}
+
+	/* otherwise leave as-is */
+
+	return 0;
+}
+
+static ssize_t idle_state_show(struct device *dev,
+				    struct device_attribute *attr,
+				    char *buf)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+	struct pca954x *data = i2c_mux_priv(muxc);
+
+	return sprintf(buf, "%d\n", READ_ONCE(data->idle_state));
+}
+
+static ssize_t idle_state_store(struct device *dev,
+				struct device_attribute *attr,
+				const char *buf, size_t count)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+	struct pca954x *data = i2c_mux_priv(muxc);
+	int val;
+	int ret;
+
+	ret = kstrtoint(buf, 0, &val);
+	if (ret < 0)
+		return ret;
+
+	if (val != MUX_IDLE_AS_IS && val != MUX_IDLE_DISCONNECT &&
+	    (val < 0 || val >= data->chip->nchans))
+		return -EINVAL;
+
+	i2c_lock_bus(muxc->parent, I2C_LOCK_SEGMENT);
+
+	WRITE_ONCE(data->idle_state, val);
+	/*
+	 * Set the mux into a state consistent with the new
+	 * idle_state.
+	 */
+	if (data->last_chan || val != MUX_IDLE_DISCONNECT)
+		ret = pca954x_deselect_mux(muxc, 0);
+
+	i2c_unlock_bus(muxc->parent, I2C_LOCK_SEGMENT);
+
+	return ret < 0 ? ret : count;
+}
+
+static DEVICE_ATTR_RW(idle_state);
+
+static irqreturn_t pca954x_irq_handler(int irq, void *dev_id)
+{
+	struct pca954x *data = dev_id;
+	unsigned long pending;
+	int ret, i;
+
+	ret = i2c_smbus_read_byte(data->client);
+	if (ret < 0)
+		return IRQ_NONE;
+
+	pending = (ret >> PCA954X_IRQ_OFFSET) & (BIT(data->chip->nchans) - 1);
+	for_each_set_bit(i, &pending, data->chip->nchans)
+		handle_nested_irq(irq_linear_revmap(data->irq, i));
+
+	return IRQ_RETVAL(pending);
+}
+
+static int pca954x_irq_set_type(struct irq_data *idata, unsigned int type)
+{
+	if ((type & IRQ_TYPE_SENSE_MASK) != IRQ_TYPE_LEVEL_LOW)
+		return -EINVAL;
+	return 0;
+}
+
+static struct irq_chip pca954x_irq_chip = {
+	.name = "i2c-mux-pca954x",
+	.irq_set_type = pca954x_irq_set_type,
+};
+
+static int pca954x_irq_setup(struct i2c_mux_core *muxc)
+{
+	struct pca954x *data = i2c_mux_priv(muxc);
+	struct i2c_client *client = data->client;
+	int c, irq;
+
+	if (!data->chip->has_irq || client->irq <= 0)
+		return 0;
+
+	raw_spin_lock_init(&data->lock);
+
+	data->irq = irq_domain_add_linear(client->dev.of_node,
+					  data->chip->nchans,
+					  &irq_domain_simple_ops, data);
+	if (!data->irq)
+		return -ENODEV;
+
+	for (c = 0; c < data->chip->nchans; c++) {
+		irq = irq_create_mapping(data->irq, c);
+		if (!irq) {
+			dev_err(&client->dev, "failed irq create map\n");
+			return -EINVAL;
+		}
+		irq_set_chip_data(irq, data);
+		irq_set_chip_and_handler(irq, &pca954x_irq_chip,
+			handle_simple_irq);
+	}
+
+	return 0;
+}
+
+static void pca954x_cleanup(struct i2c_mux_core *muxc)
+{
+	struct pca954x *data = i2c_mux_priv(muxc);
+	int c, irq;
+
+	if (data->irq) {
+		for (c = 0; c < data->chip->nchans; c++) {
+			irq = irq_find_mapping(data->irq, c);
+			irq_dispose_mapping(irq);
+		}
+		irq_domain_remove(data->irq);
+	}
+	i2c_mux_del_adapters(muxc);
+}
+
+static int pca954x_init(struct i2c_client *client, struct pca954x *data)
+{
+	int ret;
+
+	if (data->idle_state >= 0)
+		data->last_chan = pca954x_regval(data, data->idle_state);
+	else
+		data->last_chan = 0; /* Disconnect multiplexer */
+
+	ret = i2c_smbus_write_byte(client, data->last_chan);
+	if (ret < 0)
+		data->last_chan = 0;
+
+	return ret;
+}
+
+/*
+ * I2C init/probing/exit functions
+ */
+static int pca954x_probe(struct i2c_client *client,
+			 const struct i2c_device_id *id)
+{
+	struct i2c_adapter *adap = client->adapter;
+	struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev);
+	struct device *dev = &client->dev;
+	struct gpio_desc *gpio;
+	struct i2c_mux_core *muxc;
+	struct pca954x *data;
+	int num, force;
+	int ret;
+
+	if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE))
+		return -ENODEV;
+
+	muxc = i2c_mux_alloc(adap, dev, PCA954X_MAX_NCHANS, sizeof(*data), 0,
+			     pca954x_select_chan, pca954x_deselect_mux);
+	if (!muxc)
+		return -ENOMEM;
+	data = i2c_mux_priv(muxc);
+
+	i2c_set_clientdata(client, muxc);
+	data->client = client;
+
+	/* Reset the mux if a reset GPIO is specified. */
+	gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
+	if (IS_ERR(gpio))
+		return PTR_ERR(gpio);
+	if (gpio) {
+		udelay(1);
+		gpiod_set_value_cansleep(gpio, 0);
+		/* Give the chip some time to recover. */
+		udelay(1);
+	}
+
+	data->chip = device_get_match_data(dev);
+	if (!data->chip)
+		data->chip = &chips[id->driver_data];
+
+	if (data->chip->id.manufacturer_id != I2C_DEVICE_ID_NONE) {
+		struct i2c_device_identity id;
+
+		ret = i2c_get_device_id(client, &id);
+		if (ret && ret != -EOPNOTSUPP)
+			return ret;
+
+		if (!ret &&
+		    (id.manufacturer_id != data->chip->id.manufacturer_id ||
+		     id.part_id != data->chip->id.part_id)) {
+			dev_warn(dev, "unexpected device id %03x-%03x-%x\n",
+				 id.manufacturer_id, id.part_id,
+				 id.die_revision);
+			return -ENODEV;
+		}
+	}
+
+	data->idle_state = MUX_IDLE_AS_IS;
+	if (device_property_read_u32(dev, "idle-state", &data->idle_state)) {
+		if (device_property_read_bool(dev, "i2c-mux-idle-disconnect"))
+			data->idle_state = MUX_IDLE_DISCONNECT;
+	}
+
+	/*
+	 * Write the mux register at addr to verify
+	 * that the mux is in fact present. This also
+	 * initializes the mux to a channel
+	 * or disconnected state.
+	 */
+	ret = pca954x_init(client, data);
+	if (ret < 0) {
+		dev_warn(dev, "probe failed\n");
+		return -ENODEV;
+	}
+
+	ret = pca954x_irq_setup(muxc);
+	if (ret)
+		goto fail_cleanup;
+
+	/* Now create an adapter for each channel */
+	for (num = 0; num < data->chip->nchans; num++) {
+		force = 0;			  /* dynamic adap number */
+		if (pdata) {
+			if (num < pdata->num_modes) {
+				/* force static number */
+				force = pdata->modes[num].adap_id;
+			} else
+				/* discard unconfigured channels */
+				break;
+		}
+
+		ret = i2c_mux_add_adapter(muxc, force, num, 0);
+		if (ret)
+			goto fail_cleanup;
+	}
+
+	if (data->irq) {
+		ret = devm_request_threaded_irq(dev, data->client->irq,
+						NULL, pca954x_irq_handler,
+						IRQF_ONESHOT | IRQF_SHARED,
+						"pca954x", data);
+		if (ret)
+			goto fail_cleanup;
+	}
+
+	/*
+	 * The attr probably isn't going to be needed in most cases,
+	 * so don't fail completely on error.
+	 */
+	device_create_file(dev, &dev_attr_idle_state);
+
+	dev_info(dev, "registered %d multiplexed busses for I2C %s %s\n",
+		 num, data->chip->muxtype == pca954x_ismux
+				? "mux" : "switch", client->name);
+
+	return 0;
+
+fail_cleanup:
+	pca954x_cleanup(muxc);
+	return ret;
+}
+
+static void pca954x_remove(struct i2c_client *client)
+{
+	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+
+	device_remove_file(&client->dev, &dev_attr_idle_state);
+
+	pca954x_cleanup(muxc);
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int pca954x_resume(struct device *dev)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+	struct pca954x *data = i2c_mux_priv(muxc);
+	int ret;
+
+	ret = pca954x_init(client, data);
+	if (ret < 0)
+		dev_err(&client->dev, "failed to verify mux presence\n");
+
+	return ret;
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(pca954x_pm, NULL, pca954x_resume);
+
+static struct i2c_driver pca954x_driver = {
+	.driver		= {
+		.name	= "cls_pca954x",
+		.pm	= &pca954x_pm,
+		.of_match_table = pca954x_of_match,
+	},
+	.probe		= pca954x_probe,
+	.remove		= pca954x_remove,
+	.id_table	= pca954x_id,
+};
+
+module_i2c_driver(pca954x_driver);
+
+MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
+MODULE_DESCRIPTION("PCA954x I2C mux/switch driver");
+MODULE_LICENSE("GPL v2");
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-pca954x.h b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-pca954x.h
new file mode 100644
index 000000000000..2aaacf97cbac
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-pca954x.h
@@ -0,0 +1,44 @@
+/*
+ *
+ * cls-pca954x.h - I2C multiplexer/switch support
+ *
+ * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
+ * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
+ * Michael Lawnick <michael.lawnick.ext@nsn.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+
+#ifndef _CLS_I2C_PCA954X_H
+#define _CLS_I2C_PCA954X_H
+
+/* Platform data for the PCA954x I2C multiplexers */
+
+/* Per channel initialisation data:
+ * @adap_id: bus number for the adapter. 0 = don't care
+ *
+ */
+struct pca954x_platform_mode {
+	int		adap_id;
+};
+
+/* Per mux/switch data, used with i2c_register_board_info */
+struct pca954x_platform_data {
+	struct pca954x_platform_mode *modes;
+	int num_modes;
+};
+
+#endif /* _CLS_I2C_PCA954X_H */
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-switchboard.c b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-switchboard.c
new file mode 100644
index 000000000000..35ffc722e5a8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/cls-switchboard.c
@@ -0,0 +1,542 @@
+/*
+ * cls-switchboard.c - PCI device driver for Silverstone Switch board FPGA.
+ *
+ * Author: Pradchaya Phucharoen
+ *
+ * Copyright (C) 2019 Celestica Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/stddef.h>
+#include <linux/acpi.h>
+#include <linux/interrupt.h>
+#include <linux/i2c.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/i2c-ocores.h>
+#include "xcvr-cls.h"
+#include "cls-pca954x.h"
+
+#define MOD_VERSION "2.1.2"
+#define DRV_NAME "cls-switchboard"
+
+#define I2C_MUX_CHANNEL(_ch, _adap_id) \
+	[_ch] = { .adap_id = _adap_id }
+
+#define FPGA_PCIE_DEVICE_ID	0x7021
+#define MMIO_BAR		0
+#define I2C_BUS_OFS		9
+
+/* I2C ocore configurations */
+#define OCORE_REGSHIFT      	      2
+#define OCORE_IP_CLK_khz    	      62500
+#define OCORE_BUS_CLK_khz   	      100
+#define OCORE_REG_IO_WIDTH  	      1
+
+/* Optical port xcvr configuration */
+#define XCVR_REG_SHIFT		2
+#define XCVR_NUM_PORT		34
+#define XCVR_PORT_REG_SIZE	0x10
+
+/* i2c_bus_config - an i2c-core resource and platform data
+ *  @id - I2C bus device ID, for identification.
+ *  @res - resources for an i2c-core device.
+ *  @num_res - size of the resources.
+ *  @pdata - a platform data of an i2c-core device.
+ */
+struct i2c_bus_config {
+	int id;
+	struct resource *res;
+	ssize_t num_res;
+	struct ocores_i2c_platform_data pdata;
+};
+
+/* switchbrd_priv - switchboard private data */
+struct switchbrd_priv {
+	unsigned long base;
+	int num_i2c_bus;
+	struct platform_device **i2cbuses_pdev;
+	struct platform_device *regio_pdev;
+	struct platform_device *spiflash_pdev;
+	struct platform_device *xcvr_pdev;
+};
+
+/* I2C bus speed param */
+static int bus_clock_master_1 = 100;
+module_param(bus_clock_master_1, int, 0660);
+MODULE_PARM_DESC(bus_clock_master_1,
+	"I2C master 1 bus speed in KHz 50/80/100/200/400");
+
+static int bus_clock_master_2 = 100;
+module_param(bus_clock_master_2, int, 0660);
+MODULE_PARM_DESC(bus_clock_master_2,
+	"I2C master 2 bus speed in KHz 50/80/100/200/400");
+
+static int bus_clock_master_3 = 100;
+module_param(bus_clock_master_3, int, 0660);
+MODULE_PARM_DESC(bus_clock_master_3,
+	"I2C master 3 bus speed in KHz 50/80/100/200/400");
+
+static int bus_clock_master_4 = 100;
+module_param(bus_clock_master_4, int, 0660);
+MODULE_PARM_DESC(bus_clock_master_4,
+	"I2C master 4 bus speed in KHz 50/80/100/200/400");
+
+static int bus_clock_master_5 = 100;
+module_param(bus_clock_master_5, int, 0660);
+MODULE_PARM_DESC(bus_clock_master_5,
+	"I2C master 5 bus speed in KHz 50/80/100/200/400");
+
+// NOTE:  Silverstone i2c channel mapping is very wierd!!!
+/* PCA9548 channel config on MASTER BUS 3 */
+static struct pca954x_platform_mode i2c_mux_70_modes[] = {
+	I2C_MUX_CHANNEL(5, I2C_BUS_OFS + 23),
+	I2C_MUX_CHANNEL(6, I2C_BUS_OFS + 26),
+	I2C_MUX_CHANNEL(0, I2C_BUS_OFS + 27),
+	I2C_MUX_CHANNEL(7, I2C_BUS_OFS + 28),
+	I2C_MUX_CHANNEL(2, I2C_BUS_OFS + 29),
+	I2C_MUX_CHANNEL(4, I2C_BUS_OFS + 30),
+	I2C_MUX_CHANNEL(3, I2C_BUS_OFS + 31),
+	I2C_MUX_CHANNEL(1, I2C_BUS_OFS + 32)
+};
+
+static struct pca954x_platform_mode i2c_mux_71_modes[] = {
+	I2C_MUX_CHANNEL(2, I2C_BUS_OFS +  1),
+	I2C_MUX_CHANNEL(3, I2C_BUS_OFS +  2),
+	I2C_MUX_CHANNEL(0, I2C_BUS_OFS +  3),
+	I2C_MUX_CHANNEL(1, I2C_BUS_OFS +  4),
+	I2C_MUX_CHANNEL(6, I2C_BUS_OFS +  5),
+	I2C_MUX_CHANNEL(5, I2C_BUS_OFS +  6),
+	I2C_MUX_CHANNEL(7, I2C_BUS_OFS + 15),
+	I2C_MUX_CHANNEL(4, I2C_BUS_OFS +  8)
+};
+
+static struct pca954x_platform_mode i2c_mux_72_modes[] = {
+	I2C_MUX_CHANNEL(1, I2C_BUS_OFS + 17),
+	I2C_MUX_CHANNEL(7, I2C_BUS_OFS + 18),
+	I2C_MUX_CHANNEL(4, I2C_BUS_OFS + 19),
+	I2C_MUX_CHANNEL(0, I2C_BUS_OFS + 20),
+	I2C_MUX_CHANNEL(5, I2C_BUS_OFS + 21),
+	I2C_MUX_CHANNEL(2, I2C_BUS_OFS + 22),
+	I2C_MUX_CHANNEL(3, I2C_BUS_OFS + 25),
+	I2C_MUX_CHANNEL(6, I2C_BUS_OFS + 24)
+};
+
+static struct pca954x_platform_mode i2c_mux_73_modes[] = {
+	I2C_MUX_CHANNEL(4, I2C_BUS_OFS +  9),
+	I2C_MUX_CHANNEL(3, I2C_BUS_OFS + 10),
+	I2C_MUX_CHANNEL(6, I2C_BUS_OFS + 11),
+	I2C_MUX_CHANNEL(2, I2C_BUS_OFS + 12),
+	I2C_MUX_CHANNEL(1, I2C_BUS_OFS + 13),
+	I2C_MUX_CHANNEL(5, I2C_BUS_OFS + 14),
+	I2C_MUX_CHANNEL(7, I2C_BUS_OFS +  7),
+	I2C_MUX_CHANNEL(0, I2C_BUS_OFS + 16)
+};
+
+static struct pca954x_platform_data om_muxes[] = {
+	{
+		.modes = i2c_mux_70_modes,
+		.num_modes = ARRAY_SIZE(i2c_mux_70_modes),
+	},
+	{
+		.modes = i2c_mux_71_modes,
+		.num_modes = ARRAY_SIZE(i2c_mux_71_modes),
+	},
+	{
+		.modes = i2c_mux_72_modes,
+		.num_modes = ARRAY_SIZE(i2c_mux_72_modes),
+	},
+	{
+		.modes = i2c_mux_73_modes,
+		.num_modes = ARRAY_SIZE(i2c_mux_73_modes),
+	},
+};
+
+/* Optical Module bus 3 i2c muxes info */
+static struct i2c_board_info i2c_info_3[] = {
+	{
+		I2C_BOARD_INFO("cls_pca9548", 0x70),
+		.platform_data = &om_muxes[0],
+	},
+	{
+		I2C_BOARD_INFO("cls_pca9548", 0x71),
+		.platform_data = &om_muxes[1],
+	},
+	{
+		I2C_BOARD_INFO("cls_pca9548", 0x72),
+		.platform_data = &om_muxes[2],
+	},
+	{
+		I2C_BOARD_INFO("cls_pca9548", 0x73),
+		.platform_data = &om_muxes[3],
+	},
+};
+
+/* RESOURCE SEPERATES BY FUNCTION */
+/* Resource IOMEM for i2c bus 1 */
+static struct resource cls_i2c_res_1[] = {
+	{
+		.start = 0x800, .end = 0x81F,
+		.flags = IORESOURCE_MEM,},
+};
+
+/* Resource IOMEM for i2c bus 2 */
+static struct resource  cls_i2c_res_2[] = {
+	{
+		.start = 0x820, .end = 0x83F,
+		.flags = IORESOURCE_MEM,},
+};
+
+/* Resource IOMEM for i2c bus 3 */
+static struct resource  cls_i2c_res_3[] = {
+	{
+		.start = 0x840, .end = 0x85F,
+		.flags = IORESOURCE_MEM,},
+};
+
+/* Resource IOMEM for i2c bus 4 */
+static struct  resource cls_i2c_res_4[] = {
+	{
+		.start = 0x860, .end = 0x87F,
+		.flags = IORESOURCE_MEM,},
+};
+
+/* Resource IOMEM for i2c bus 5 */
+static struct resource  cls_i2c_res_5[] = {
+	{
+		.start = 0x880, .end = 0x89F,
+		.flags = IORESOURCE_MEM,},
+};
+
+/* Resource IOMEM for reg access */
+static struct resource reg_io_res[] = {
+	{
+		.start = 0x00, .end = 0xFF,
+		.flags = IORESOURCE_MEM,},
+};
+
+/* Resource IOMEM for spi flash firmware upgrade */
+static struct resource spi_flash_res[] = {
+	{
+		.start = 0x1200, .end = 0x121F,
+		.flags = IORESOURCE_MEM,},
+};
+
+/* Resource IOMEM for front panel XCVR */
+static struct resource xcvr_res[] = {
+	{
+		.start = 0x4000, .end = 0x421F,
+		.flags = IORESOURCE_MEM,},
+};
+
+static struct i2c_bus_config i2c_bus_configs[] = {
+	{
+		.id = 1,
+		.res = cls_i2c_res_1,
+		.num_res = ARRAY_SIZE(cls_i2c_res_1),
+		.pdata = {
+			.reg_shift = OCORE_REGSHIFT,
+			.reg_io_width = OCORE_REG_IO_WIDTH,
+			.clock_khz = OCORE_IP_CLK_khz,
+			.bus_khz = OCORE_BUS_CLK_khz,
+			.big_endian = false,
+			.num_devices = 0,
+			.devices = NULL,
+		},
+	},
+	{
+		.id = 2,
+		.res = cls_i2c_res_2,
+		.num_res = ARRAY_SIZE(cls_i2c_res_2),
+		.pdata = {
+			.reg_shift = OCORE_REGSHIFT,
+			.reg_io_width = OCORE_REG_IO_WIDTH,
+			.clock_khz = OCORE_IP_CLK_khz,
+			.bus_khz = OCORE_BUS_CLK_khz,
+			.big_endian = false,
+			.num_devices = 0,
+			.devices = NULL,
+		},
+	},
+	{
+		.id = 3,
+		.res = cls_i2c_res_3,
+		.num_res = ARRAY_SIZE(cls_i2c_res_3),
+		.pdata = {
+			.reg_shift = OCORE_REGSHIFT,
+			.reg_io_width = OCORE_REG_IO_WIDTH,
+			.clock_khz = OCORE_IP_CLK_khz,
+			.bus_khz = OCORE_BUS_CLK_khz,
+			.big_endian = false,
+			.num_devices = ARRAY_SIZE(i2c_info_3),
+			.devices = i2c_info_3,
+		},
+	},
+	{
+		.id = 4,
+		.res = cls_i2c_res_4,
+		.num_res = ARRAY_SIZE(cls_i2c_res_4),
+		.pdata = {
+			.reg_shift = OCORE_REGSHIFT,
+			.reg_io_width = OCORE_REG_IO_WIDTH,
+			.clock_khz = OCORE_IP_CLK_khz,
+			.bus_khz = OCORE_BUS_CLK_khz,
+			.big_endian = false,
+			.num_devices = 0,
+			.devices = NULL,
+		},
+	},
+	{
+		.id = 5,
+		.res = cls_i2c_res_5,
+		.num_res = ARRAY_SIZE(cls_i2c_res_5),
+		.pdata = {
+			.reg_shift = OCORE_REGSHIFT,
+			.reg_io_width = OCORE_REG_IO_WIDTH,
+			.clock_khz = OCORE_IP_CLK_khz,
+			.bus_khz = OCORE_BUS_CLK_khz,
+			.big_endian = false,
+			.num_devices = 0,
+			.devices = NULL,
+		},
+	},
+};
+
+/* xcvr front panel mapping */
+static struct port_info front_panel_ports[] = {
+	{"QSFP1",   1, QSFP},
+	{"QSFP2",   2, QSFP},
+	{"QSFP3",   3, QSFP},
+	{"QSFP4",   4, QSFP},
+	{"QSFP5",   5, QSFP},
+	{"QSFP6",   6, QSFP},
+	{"QSFP7",   7, QSFP},
+	{"QSFP8",   8, QSFP},
+	{"QSFP9",   9, QSFP},
+	{"QSFP10", 10, QSFP},
+	{"QSFP11", 11, QSFP},
+	{"QSFP12", 12, QSFP},
+	{"QSFP13", 13, QSFP},
+	{"QSFP14", 14, QSFP},
+	{"QSFP15", 15, QSFP},
+	{"QSFP16", 16, QSFP},
+	{"QSFP17", 17, QSFP},
+	{"QSFP18", 18, QSFP},
+	{"QSFP19", 19, QSFP},
+	{"QSFP20", 20, QSFP},
+	{"QSFP21", 21, QSFP},
+	{"QSFP22", 22, QSFP},
+	{"QSFP23", 23, QSFP},
+	{"QSFP24", 24, QSFP},
+	{"QSFP25", 25, QSFP},
+	{"QSFP26", 26, QSFP},
+	{"QSFP27", 27, QSFP},
+	{"QSFP28", 28, QSFP},
+	{"QSFP29", 29, QSFP},
+	{"QSFP30", 30, QSFP},
+	{"QSFP31", 31, QSFP},
+	{"QSFP32", 32, QSFP},
+	{"SFP1",   33, SFP},
+	{"SFP2",   34, SFP}
+	/* END OF LIST */
+};
+
+static struct cls_xcvr_platform_data xcvr_data = {
+	.port_reg_size = 0x10,
+	.num_ports = ARRAY_SIZE(front_panel_ports),
+	.devices = front_panel_ports,
+};
+
+
+// TODO: Add a platform configuration struct, and use probe as a factory,
+//	 so xcvr, fwupgrade device can configured as options.
+
+static int cls_fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)
+{
+
+	struct switchbrd_priv *priv;
+	struct platform_device **i2cbuses_pdev;
+	struct platform_device *regio_pdev;
+	struct platform_device *xcvr_pdev;
+	unsigned long rstart;
+	int num_i2c_bus, i;
+	int err;
+
+	err = pci_enable_device(dev);
+	if (err){
+		dev_err(&dev->dev,  "Failed to enable PCI device\n");
+		goto err_exit;
+	}
+
+	/* Check for valid MMIO address */
+	rstart = pci_resource_start(dev, MMIO_BAR);
+	if (!rstart) {
+		dev_err(&dev->dev, "Switchboard base address uninitialized, "
+			"check FPGA\n");
+		err = -ENODEV;
+		goto err_disable_device;
+	}
+
+	dev_dbg(&dev->dev, "BAR%d res: 0x%lx-0x%llx\n", MMIO_BAR,
+		rstart, pci_resource_end(dev, MMIO_BAR));
+
+	priv = devm_kzalloc(&dev->dev,
+				sizeof(struct switchbrd_priv), GFP_KERNEL);
+	if (!priv){
+		err = -ENOMEM;
+		goto err_disable_device;
+	}
+
+	pci_set_drvdata(dev, priv);
+	num_i2c_bus = ARRAY_SIZE(i2c_bus_configs);
+	i2cbuses_pdev = devm_kzalloc(
+				&dev->dev,
+				num_i2c_bus * sizeof(struct platform_device*),
+				GFP_KERNEL);
+
+	reg_io_res[0].start += rstart;
+	reg_io_res[0].end += rstart;
+
+	xcvr_res[0].start += rstart;
+	xcvr_res[0].end += rstart;
+
+	regio_pdev = platform_device_register_resndata(
+			&dev->dev, "cls-swbrd-io",
+			-1,
+			reg_io_res, ARRAY_SIZE(reg_io_res),
+			NULL, 0);
+
+	if (IS_ERR(regio_pdev)) {
+		dev_err(&dev->dev, "Failed to register cls-swbrd-io\n");
+		err = PTR_ERR(regio_pdev);
+		goto err_disable_device;
+	}
+
+	xcvr_pdev = platform_device_register_resndata(
+						      NULL,
+						      "cls-xcvr",
+						      -1,
+						      xcvr_res,
+						      ARRAY_SIZE(xcvr_res),
+						      &xcvr_data,
+						      sizeof(xcvr_data));
+
+	if (IS_ERR(xcvr_pdev)) {
+		dev_err(&dev->dev, "Failed to register xcvr node\n");
+		err = PTR_ERR(xcvr_pdev);
+		goto err_unregister_regio;
+	}
+
+	for(i = 0; i < num_i2c_bus; i++){
+
+		i2c_bus_configs[i].res[0].start += rstart;
+		i2c_bus_configs[i].res[0].end += rstart;
+
+		switch (i + 1) {
+		case 1:
+			i2c_bus_configs[i].pdata.bus_khz = bus_clock_master_1;
+			break;
+		case 2:
+			i2c_bus_configs[i].pdata.bus_khz = bus_clock_master_2;
+			break;
+		case 3:
+			i2c_bus_configs[i].pdata.bus_khz = bus_clock_master_3;
+			break;
+		case 4:
+			i2c_bus_configs[i].pdata.bus_khz = bus_clock_master_4;
+			break;
+		case 5:
+			i2c_bus_configs[i].pdata.bus_khz = bus_clock_master_5;
+			break;
+		default:
+			i2c_bus_configs[i].pdata.bus_khz = OCORE_BUS_CLK_khz;
+		}
+
+		dev_dbg(&dev->dev, "i2c-bus.%d: 0x%llx - 0x%llx\n",
+			i2c_bus_configs[i].id,
+			i2c_bus_configs[i].res[0].start,
+			i2c_bus_configs[i].res[0].end);
+
+		i2cbuses_pdev[i] = platform_device_register_resndata(
+					&dev->dev, "ocores-i2c",
+					i2c_bus_configs[i].id,
+					i2c_bus_configs[i].res,
+					i2c_bus_configs[i].num_res,
+					&i2c_bus_configs[i].pdata,
+					sizeof(i2c_bus_configs[i].pdata));
+
+		if (IS_ERR(i2cbuses_pdev[i])) {
+			dev_err(&dev->dev, "Failed to register ocores-i2c.%d\n",
+				i2c_bus_configs[i].id);
+			err = PTR_ERR(i2cbuses_pdev[i]);
+			goto err_unregister_ocore;
+		}
+	}
+
+	priv->base = rstart;
+	priv->num_i2c_bus = num_i2c_bus;
+	priv->i2cbuses_pdev = i2cbuses_pdev;
+	priv->regio_pdev = regio_pdev;
+	priv->xcvr_pdev = xcvr_pdev;
+	return 0;
+
+err_unregister_ocore:
+	for(i = 0; i < num_i2c_bus; i++){
+		if(priv->i2cbuses_pdev[i]){
+			platform_device_unregister(priv->i2cbuses_pdev[i]);
+		}
+	}
+err_unregister_xcvr:
+	platform_device_unregister(xcvr_pdev);
+err_unregister_regio:
+	platform_device_unregister(regio_pdev);
+err_disable_device:
+	pci_disable_device(dev);
+err_exit:
+	return err;
+}
+
+static int cls_fpga_remove(struct pci_dev *dev)
+{
+	int i;
+	struct switchbrd_priv *priv = pci_get_drvdata(dev);
+
+	for(i = 0; i < priv->num_i2c_bus; i++){
+		if(priv->i2cbuses_pdev[i])
+			platform_device_unregister(priv->i2cbuses_pdev[i]);
+	}
+	platform_device_unregister(priv->xcvr_pdev);
+	platform_device_unregister(priv->regio_pdev);
+	pci_disable_device(dev);
+	return 0;
+};
+
+static const struct pci_device_id pci_clsswbrd[] = {
+	{  PCI_VDEVICE(XILINX, FPGA_PCIE_DEVICE_ID) },
+	{0, }
+};
+
+MODULE_DEVICE_TABLE(pci, pci_clsswbrd);
+
+static struct pci_driver clsswbrd_pci_driver = {
+	.name = DRV_NAME,
+	.id_table = pci_clsswbrd,
+	.probe = cls_fpga_probe,
+	.remove = cls_fpga_remove,
+};
+
+module_pci_driver(clsswbrd_pci_driver);
+
+MODULE_AUTHOR("Pradchaya P.<pphuchar@celestica.com>");
+MODULE_DESCRIPTION("Celestica Silverstone switchboard driver");
+MODULE_VERSION(MOD_VERSION);
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switch_cpld.c b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switch_cpld.c
new file mode 100644
index 000000000000..b1900d03245e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/switch_cpld.c
@@ -0,0 +1,416 @@
+/*
+ * switch_cpld.c - i2c driver for Silverstone switchboard CPLD1/CPLD2
+ * provides sysfs interfaces to access CPLD register and control port LEDs
+ *
+ * Author: Budsakol Sirirattanasakul
+ *
+ * Copyright (C) 2019 Celestica Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/mutex.h>
+#include <linux/hwmon.h>
+
+#define CPLD1_ADDR      0x30
+#define CPLD2_ADDR      0x31
+
+#define SCRATCH_ADDR    0x01
+#define LED_OPMODE      0x09
+#define LED_TEST        0x0A
+
+struct switch_cpld_data {
+        struct mutex lock;
+        struct i2c_client *client;
+        struct i2c_client *client2;
+        uint8_t read_addr;
+};
+
+static ssize_t getreg_show(struct device *dev, struct device_attribute *attr,
+                           char *buf)
+{
+        struct switch_cpld_data *data = dev_get_drvdata(dev);
+        struct i2c_client *client = data->client;
+        int value;
+
+        value = i2c_smbus_read_byte_data(client, data->read_addr);
+        if (value < 0)
+                return value;
+
+        return sprintf(buf, "0x%.2x\n", value);
+}
+
+static ssize_t getreg_store(struct device *dev, struct device_attribute *attr,
+                            const char *buf, size_t size)
+{
+        uint8_t value;
+        ssize_t status;
+        struct switch_cpld_data *data = dev_get_drvdata(dev);
+
+        status = kstrtou8(buf, 0, &value);
+        if (status != 0)
+                return status;
+
+        data->read_addr = value;
+
+        return size;
+}
+
+static ssize_t setreg_store(struct device *dev, struct device_attribute *attr,
+                            const char *buf, size_t size)
+{
+        uint8_t addr, value;
+        ssize_t status;
+        struct switch_cpld_data *data = dev_get_drvdata(dev);
+        struct i2c_client *client = data->client;
+        char *tok;
+
+        tok = strsep((char **)&buf, " ");
+        if (tok == NULL)
+                return -EINVAL;
+        status = kstrtou8(tok, 0, &addr);
+        if (status != 0)
+                return status;
+
+        tok = strsep((char **)&buf, " ");
+        if (tok == NULL)
+                return -EINVAL;
+        status = kstrtou8(tok, 0, &value);
+        if (status != 0)
+                return status;
+
+        status = i2c_smbus_write_byte_data(client, addr, value);
+        if (status == 0)
+                status = size;
+        return status;
+}
+
+static ssize_t scratch_show(struct device *dev, struct device_attribute *attr,
+                            char *buf)
+{
+        struct switch_cpld_data *data = dev_get_drvdata(dev);
+        struct i2c_client *client = data->client;
+        int value;
+
+        value = i2c_smbus_read_byte_data(client, SCRATCH_ADDR);
+        if (value < 0)
+                return value;
+
+        return sprintf(buf, "0x%.2x\n", value);
+}
+
+static ssize_t scratch_store(struct device *dev, struct device_attribute *attr,
+                             const char *buf, size_t size)
+{
+        uint8_t value;
+        ssize_t status;
+        struct switch_cpld_data *data = dev_get_drvdata(dev);
+        struct i2c_client *client = data->client;
+
+        status = kstrtou8(buf, 0, &value);
+        if (status != 0)
+                return status;
+        status = i2c_smbus_write_byte_data(client, SCRATCH_ADDR, value);
+        if (status == 0)
+                status = size;
+        return status;
+}
+
+DEVICE_ATTR_RW(getreg);
+DEVICE_ATTR_WO(setreg);
+DEVICE_ATTR_RW(scratch);
+
+static struct attribute *switch_cpld_attrs[] = {
+        &dev_attr_getreg.attr,
+        &dev_attr_setreg.attr,
+        &dev_attr_scratch.attr,
+        NULL,
+};
+ATTRIBUTE_GROUPS(switch_cpld);
+
+static ssize_t port_led_mode_show(struct device *dev,
+                                  struct device_attribute *attr, char *buf)
+{
+        int led_mode_1, led_mode_2;
+        struct switch_cpld_data *data = dev_get_drvdata(dev);
+        struct i2c_client *client1 = data->client;
+        struct i2c_client *client2 = data->client2;
+
+        led_mode_1 = i2c_smbus_read_byte_data(client1, LED_OPMODE);
+        if (led_mode_1 < 0)
+                return led_mode_1;
+
+        led_mode_2 = i2c_smbus_read_byte_data(client2, LED_OPMODE);
+        if (led_mode_2 < 0)
+                return led_mode_2;
+
+        return sprintf(buf, "%s %s\n",
+                       led_mode_1 ? "test" : "normal",
+                       led_mode_2 ? "test" : "normal");
+}
+
+static ssize_t port_led_mode_store(struct device *dev,
+                                   struct device_attribute *attr,
+                                   const char *buf, size_t size)
+{
+        int status;
+        uint8_t led_mode;
+        struct switch_cpld_data *data = dev_get_drvdata(dev);
+        struct i2c_client *client1 = data->client;
+        struct i2c_client *client2 = data->client2;
+
+        if (sysfs_streq(buf, "test"))
+                led_mode = 0x01;
+        else if (sysfs_streq(buf, "normal"))
+                led_mode = 0x00;
+        else
+                return -EINVAL;
+
+        status = i2c_smbus_write_byte_data(client1, LED_OPMODE, led_mode);
+        if (status != 0) {
+                return status;
+        }
+
+        status = i2c_smbus_write_byte_data(client2, LED_OPMODE, led_mode);
+        if (status != 0) {
+                return status;
+        }
+
+        return size;
+}
+
+static ssize_t port_led_color_show(struct device *dev,
+                                   struct device_attribute *attr, char *buf)
+{
+        int led_color1, led_color2;
+        struct switch_cpld_data *data = dev_get_drvdata(dev);
+        struct i2c_client *client1 = data->client;
+        struct i2c_client *client2 = data->client2;
+
+        led_color1 = i2c_smbus_read_byte_data(client1, LED_TEST);
+        if (led_color1 < 0)
+                return led_color1;
+
+        led_color2 = i2c_smbus_read_byte_data(client2, LED_TEST);
+        if (led_color2 < 0)
+                return led_color2;
+
+        return sprintf(buf, "%s %s\n",
+                       led_color1 == 0x07 ? "off" : led_color1 == 0x06 ? "green" : led_color1 == 0x05 ?
+                       "red" : led_color1 == 0x04 ?
+                       "yellow" : led_color1 == 0x03 ? "blue" : led_color1 == 0x02 ?  "cyan" :
+                       led_color1 == 0x01 ?  "magenta" : "white",
+                       led_color2 == 0x07 ? "off" : led_color2 == 0x06 ? "green" : led_color2 == 0x05 ?
+                       "red" : led_color2 == 0x04 ?
+                       "yellow" : led_color2 == 0x03 ? "blue" : led_color2 == 0x02 ?  "cyan" :
+                       led_color2 == 0x01 ?  "magenta" : "white");
+}
+
+static ssize_t port_led_color_store(struct device *dev,
+                                    struct device_attribute *attr,
+                                    const char *buf, size_t size)
+{
+        int status;
+        uint8_t led_color;
+        struct switch_cpld_data *data = dev_get_drvdata(dev);
+        struct i2c_client *client1 = data->client;
+        struct i2c_client *client2 = data->client2;
+
+        if (sysfs_streq(buf, "off"))
+                led_color = 0x07;
+        else if (sysfs_streq(buf, "green"))
+                led_color = 0x06;
+        else if (sysfs_streq(buf, "red"))
+                led_color = 0x05;
+        else if (sysfs_streq(buf, "yellow"))
+                led_color = 0x04;
+        else if (sysfs_streq(buf, "blue"))
+                led_color = 0x03;
+        else if (sysfs_streq(buf, "cyan"))
+                led_color = 0x02;
+        else if (sysfs_streq(buf, "magenta"))
+                led_color = 0x01;
+        else if (sysfs_streq(buf, "white"))
+                led_color = 0x00;
+        else
+                return -EINVAL;
+
+        status = i2c_smbus_write_byte_data(client1, LED_TEST, led_color);
+        if (status != 0) {
+                return status;
+        }
+
+        status = i2c_smbus_write_byte_data(client2, LED_TEST, led_color);
+        if (status != 0) {
+                return status;
+        }
+
+        return size;
+}
+
+DEVICE_ATTR_RW(port_led_mode);
+DEVICE_ATTR_RW(port_led_color);
+
+static struct attribute *sff_led_attrs[] = {
+        &dev_attr_port_led_mode.attr,
+        &dev_attr_port_led_color.attr,
+        NULL,
+};
+
+static struct attribute_group sff_led_groups = {
+        .attrs = sff_led_attrs,
+};
+
+static int switch_cpld_probe(struct i2c_client *client,
+                             const struct i2c_device_id *id)
+{
+        int err;
+        struct switch_cpld_data *drvdata1, *drvdata2;
+        struct device *hwmon_dev1, *hwmon_dev2;
+        struct i2c_client *client2;
+
+        if (client->addr != CPLD1_ADDR) {
+                dev_err(&client->dev, "probe, bad i2c addr: 0x%x\n",
+                        client->addr);
+                err = -EINVAL;
+                goto exit;
+        }
+
+        if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
+                return -EPFNOSUPPORT;
+
+        /* CPLD1 */
+        drvdata1 = devm_kzalloc(&client->dev,
+                                sizeof(struct switch_cpld_data), GFP_KERNEL);
+
+        if (!drvdata1) {
+                err = -ENOMEM;
+                goto exit;
+        }
+
+        mutex_init(&drvdata1->lock);
+        drvdata1->client = client;
+        drvdata1->read_addr = 0x00;
+        i2c_set_clientdata(client, drvdata1);
+        hwmon_dev1 = devm_hwmon_device_register_with_groups(&client->dev,
+                        "CPLD1",
+                        drvdata1,
+                        switch_cpld_groups);
+
+        if (IS_ERR(hwmon_dev1)) {
+                err = PTR_ERR(hwmon_dev1);
+                goto exit;
+        }
+
+        err = sysfs_create_link(&client->dev.kobj, &hwmon_dev1->kobj, "CPLD1");
+        if (err) {
+                goto exit;
+        }
+
+        /* CPLD2 */
+        drvdata2 = devm_kzalloc(&client->dev,
+                                sizeof(struct switch_cpld_data), GFP_KERNEL);
+
+        if (!drvdata2) {
+                err = -ENOMEM;
+                goto err_link;
+        }
+
+        client2 = i2c_new_dummy_device(client->adapter, CPLD2_ADDR);
+        if (!client2) {
+                dev_err(&client->dev, "address 0x%02x unavailable\n",
+                        CPLD2_ADDR);
+                err = -EADDRINUSE;
+                goto err_link;
+        }
+
+        mutex_init(&drvdata2->lock);
+        drvdata2->read_addr = 0x00;
+        drvdata2->client = client2;
+        i2c_set_clientdata(client2, drvdata2);
+
+        /* attach client2 to be client2 of CPLD1
+           for later use on port led sysfs */
+        drvdata1->client2 = client2;
+
+        hwmon_dev2 = devm_hwmon_device_register_with_groups(&client2->dev,
+                        "CPLD2",
+                        drvdata2,
+                        switch_cpld_groups);
+
+        if (IS_ERR(hwmon_dev2)) {
+                err = PTR_ERR(hwmon_dev2);
+                goto err_client2;
+        }
+
+        err = sysfs_create_link(&client2->dev.kobj, &hwmon_dev2->kobj, "CPLD2");
+        if (err) {
+                goto err_client2;
+        }
+
+        //port led
+        err = sysfs_create_group(&client->dev.kobj, &sff_led_groups);
+        if (err) {
+                dev_err(&client->dev,
+                        "failed to create sysfs attribute group.\n");
+                goto err_link2;
+        }
+
+        return 0;
+
+err_link2:
+        sysfs_remove_link(&client2->dev.kobj, "CPLD2");
+
+err_client2:
+        if (client2)
+                i2c_unregister_device(client2);
+
+err_link:
+        sysfs_remove_link(&client->dev.kobj, "CPLD1");
+
+exit:
+        dev_err(&client->dev, "probe error %d\n", err);
+        return err;
+}
+
+static void switch_cpld_remove(struct i2c_client *client)
+{
+        struct switch_cpld_data *data = i2c_get_clientdata(client);
+
+        sysfs_remove_group(&client->dev.kobj, &sff_led_groups);
+        sysfs_remove_link(&data->client2->dev.kobj, "CPLD2");
+        sysfs_remove_link(&client->dev.kobj, "CPLD1");
+        i2c_unregister_device(data->client2);
+}
+
+static const struct i2c_device_id switch_cpld_ids[] = {
+        { "switch_cpld", 0x30 },
+        { }
+};
+
+MODULE_DEVICE_TABLE(i2c, switch_cpld_ids);
+
+static struct i2c_driver switch_cpld_driver = {
+        .driver = {
+                .name   = "switch_cpld",
+                .owner = THIS_MODULE,
+        },
+        .probe          = switch_cpld_probe,
+        .remove         = switch_cpld_remove,
+        .id_table       = switch_cpld_ids,
+};
+
+module_i2c_driver(switch_cpld_driver);
+
+MODULE_AUTHOR("Budsakol Sirirattanasakul<bsirir@celestica.com>");
+MODULE_DESCRIPTION("Celestica Silverstone Switchboard CPLD driver");
+MODULE_VERSION("1.0.0");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/xcvr-cls.c b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/xcvr-cls.c
new file mode 100644
index 000000000000..10fda963b9b3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/xcvr-cls.c
@@ -0,0 +1,520 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * xcvr-cls.c - front panel port control.
+ *
+ * Pradchaya Phucharoen <pphuchar@celestica.com>
+ * Copyright (C) 2019 Celestica Corp.
+ */
+
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/spinlock.h>
+#include <linux/hwmon.h>
+#include "xcvr-cls.h"
+
+/* FPGA front panel  */
+#define PORT_CTRL           0
+#define PORT_STATUS         0x4
+#define PORT_INT_STATUS     0x8
+#define PORT_INT_MASK       0xC
+
+/*
+ * Port control degister
+ * LPMOD    : active high, RW
+ * RST      : active low,  RW
+ * TXDIS    : active high, RW
+*/
+#define CTRL_LPMOD      BIT(6)
+#define CTRL_RST_L      BIT(4)
+#define CTRL_TXDIS      BIT(0)
+
+/*
+ * Port status register
+ * IRQ      : active low, RO
+ * PRESENT  : active low,  RO, for QSFP
+ * TXFAULT  : active high, RO
+ * RXLOS    : active high, RO
+ * MODABS   : active high, RO, for SFP
+*/
+#define STAT_IRQ_L      BIT(5)
+#define STAT_PRESENT_L  BIT(4)
+#define STAT_TXFAULT    BIT(2)
+#define STAT_RXLOS      BIT(1)
+#define STAT_MODABS     BIT(0)
+
+/*
+ * NOTE: Interrupt and mask must be expose as bitfeild.
+ *       Because the registers of interrupt flags are read-clear.
+ *
+ * Port interrupt flag resgister
+ * INT_N    : interrupt flag, set when INT_N is assert.
+ * PRESENT  : interrupt flag, set when QSFP module plugin/plugout.
+ * RXLOS    : interrupt flag, set when rxlos is assert.
+ * MODABS   : interrupt flag, set when SFP module plugin/plugout.
+*/
+#define INTR_INT_N      BIT(5)
+#define INTR_PRESENT    BIT(4)
+#define INTR_TXFAULT    BIT(2)
+#define INTR_RXLOS      BIT(1)
+#define INTR_MODABS     BIT(0)
+
+/* 
+ * Port interrupt mask register
+ * INT_N     : active low
+ * PRESENT   : active low
+ * RXLOS_INT : active low
+ * MODABS    : active low
+*/
+#define MASK_INT_N_L      BIT(5)
+#define MASK_PRESENT_L    BIT(4)
+#define MASK_TXFAULT_L    BIT(2)
+#define MASK_RXLOS_L      BIT(1)
+#define MASK_MODABS_L     BIT(0)
+
+
+/*
+ * port_data - optical port data
+ * @xcvr: xcvr memory accessor
+ * @name: port name
+ * @index: front panel port index starting from 1
+ */
+struct port_data {
+	struct xcvr_priv *xcvr;
+	const char *name;
+	unsigned int index;
+};
+
+/*
+ * xcvr_priv - port xcvr private data
+ * @dev: device for reference
+ * @base: virtual base address
+ * @num_ports: number of front panel ports
+ * @fp_devs: list of front panel port devices
+ */
+struct xcvr_priv {
+	struct device* dev;
+	void __iomem *base;
+	int port_reg_size;
+	int num_ports;
+	struct device **fp_devs;
+};
+
+static inline void port_setreg(struct xcvr_priv *xcvr, int reg, int index, u8 value)
+{
+	return iowrite8(value, xcvr->base + reg + (index - 1) * xcvr->port_reg_size);
+}
+
+static inline u8 port_getreg(struct xcvr_priv *xcvr, int reg, int index)
+{
+	return ioread8(xcvr->base + reg + (index - 1) * xcvr->port_reg_size);
+}
+
+static ssize_t qsfp_modprsL_show(struct device *dev, 
+				 struct device_attribute *attr, char *buf)
+{
+	u8 data;
+	struct port_data *port_data = dev_get_drvdata(dev);
+	unsigned int index = port_data->index;
+
+	data = port_getreg(port_data->xcvr, PORT_STATUS, index);
+	return sprintf(buf, "%d\n", (data & STAT_PRESENT_L)?1:0);
+}
+
+static ssize_t qsfp_irqL_show(struct device *dev,
+				struct device_attribute *attr, char *buf)
+{
+	u8 data;
+	struct port_data *port_data = dev_get_drvdata(dev);
+	unsigned int index = port_data->index;
+
+	data = port_getreg(port_data->xcvr, PORT_STATUS, index);
+	return sprintf(buf, "%d\n", (data & STAT_IRQ_L)?1:0);
+}
+
+static ssize_t qsfp_lpmode_show(struct device *dev,
+				struct device_attribute *attr, char *buf)
+{
+	u8 data;
+	struct port_data *port_data = dev_get_drvdata(dev);
+	unsigned int index = port_data->index;
+
+	data = port_getreg(port_data->xcvr, PORT_CTRL, index);
+	return sprintf(buf, "%d\n", (data & CTRL_LPMOD)?1:0);
+}
+
+static ssize_t qsfp_lpmode_store(struct device *dev, 
+				 struct device_attribute *attr, 
+				 const char *buf, size_t size)
+{
+	ssize_t status;
+	long value;
+	u8 data;
+	struct port_data *port_data = dev_get_drvdata(dev);
+	unsigned int index = port_data->index;
+
+	status = kstrtol(buf, 0, &value);
+	if (status == 0) {
+		data = port_getreg(port_data->xcvr, PORT_CTRL, index);
+		if (value == 0)
+			data &= ~CTRL_LPMOD;
+		else
+			data |= CTRL_LPMOD;
+		port_setreg(port_data->xcvr, PORT_CTRL, index, data);
+		status = size;
+	}
+	return status;
+}
+
+static ssize_t qsfp_resetL_show(struct device *dev,
+				struct device_attribute *attr, char *buf)
+{
+	u8 data;
+	struct port_data *port_data = dev_get_drvdata(dev);
+	unsigned int index = port_data->index;
+
+	data = port_getreg(port_data->xcvr, PORT_CTRL, index);
+	return sprintf(buf, "%d\n", (data & CTRL_RST_L)?1:0);
+}
+
+static ssize_t qsfp_resetL_store(struct device *dev, 
+				 struct device_attribute *attr, 
+				 const char *buf, size_t size)
+{
+	ssize_t status;
+	long value;
+	u8 data;
+	struct port_data *port_data = dev_get_drvdata(dev);
+	unsigned int index = port_data->index;
+
+	status = kstrtol(buf, 0, &value);
+	if (status == 0) {
+		data = port_getreg(port_data->xcvr, PORT_CTRL, index);
+		if (value == 0)
+			data &= ~CTRL_RST_L;
+		else
+			data |= CTRL_RST_L;
+		port_setreg(port_data->xcvr, PORT_CTRL, index, data);
+		status = size;
+	}
+	return status;
+}
+
+static ssize_t sfp_modabs_show(struct device *dev, 
+			       struct device_attribute *attr, char *buf)
+{
+	u8 data;
+	struct port_data *port_data = dev_get_drvdata(dev);
+	unsigned int index = port_data->index;
+
+	data = port_getreg(port_data->xcvr, PORT_STATUS, index);
+	return sprintf(buf, "%d\n", (data & STAT_MODABS)?1:0);
+}
+
+static ssize_t sfp_txfault_show(struct device *dev, 
+			       struct device_attribute *attr, char *buf)
+{
+	u8 data;
+	struct port_data *port_data = dev_get_drvdata(dev);
+	unsigned int index = port_data->index;
+
+	data = port_getreg(port_data->xcvr, PORT_STATUS, index);
+	return sprintf(buf, "%d\n", (data & STAT_TXFAULT)?1:0);
+}
+
+static ssize_t sfp_rxlos_show(struct device *dev, 
+			      struct device_attribute *attr, char *buf)
+{
+	u8 data;
+	struct port_data *port_data = dev_get_drvdata(dev);
+	unsigned int index = port_data->index;
+
+	data = port_getreg(port_data->xcvr, PORT_STATUS, index);
+	return sprintf(buf, "%d\n", (data & STAT_RXLOS)?1:0);
+}
+
+static ssize_t sfp_txdisable_show(struct device *dev,
+				  struct device_attribute *attr, char *buf)
+{
+	u8 data;
+	struct port_data *port_data = dev_get_drvdata(dev);
+	unsigned int index = port_data->index;
+
+	data = port_getreg(port_data->xcvr, PORT_CTRL, index);
+	return sprintf(buf, "%d\n", (data & CTRL_TXDIS)?1:0);
+}
+
+static ssize_t sfp_txdisable_store(struct device *dev, 
+				   struct device_attribute *attr, 
+				   const char *buf, size_t size)
+{
+	ssize_t status;
+	long value;
+	u8 data;
+	struct port_data *port_data = dev_get_drvdata(dev);
+	unsigned int index = port_data->index;
+
+	status = kstrtol(buf, 0, &value);
+	if (status == 0) {
+		data = port_getreg(port_data->xcvr, PORT_CTRL, index);
+		if (value == 0)
+			data &= ~CTRL_TXDIS;
+		else
+			data |= CTRL_TXDIS;
+		port_setreg(port_data->xcvr, PORT_CTRL, index, data);
+		status = size;
+	}
+	return status;
+}
+
+static ssize_t interrupt_show(struct device *dev,
+			      struct device_attribute *attr, char *buf)
+{
+	u8 data;
+	struct port_data *port_data = dev_get_drvdata(dev);
+	unsigned int index = port_data->index;
+
+	data = port_getreg(port_data->xcvr, PORT_INT_STATUS, index);
+	return sprintf(buf, "0x%2.2x\n", data);
+}
+
+static ssize_t interrupt_store(struct device *dev, 
+			       struct device_attribute *attr, 
+			       const char *buf, size_t size)
+{
+	ssize_t status;
+	long value;
+	struct port_data *port_data = dev_get_drvdata(dev);
+	unsigned int index = port_data->index;
+
+	status = kstrtoul(buf, 0, &value);
+	if (status == 0) {
+		port_setreg(port_data->xcvr, PORT_INT_STATUS, index, value);
+		status = size;
+	}
+	return status;
+}
+
+static ssize_t interrupt_mask_show(struct device *dev,
+				   struct device_attribute *attr, char *buf)
+{
+	u8 data;
+	struct port_data *port_data = dev_get_drvdata(dev);
+	unsigned int index = port_data->index;
+
+	data = port_getreg(port_data->xcvr, PORT_INT_MASK, index);
+	return sprintf(buf, "0x%2.2x\n", data);
+}
+
+static ssize_t interrupt_mask_store(struct device *dev, 
+				    struct device_attribute *attr, 
+				    const char *buf, size_t size)
+{
+	ssize_t status;
+	long value;
+	struct port_data *port_data = dev_get_drvdata(dev);
+	unsigned int index = port_data->index;
+
+	status = kstrtoul(buf, 0, &value);
+	if (status == 0) {
+		port_setreg(port_data->xcvr, PORT_INT_MASK, index, value);
+		status = size;
+	}
+	return status;
+}
+
+DEVICE_ATTR_RO(qsfp_modprsL);
+DEVICE_ATTR_RO(qsfp_irqL);
+DEVICE_ATTR_RW(qsfp_lpmode);
+DEVICE_ATTR_RW(qsfp_resetL);
+
+DEVICE_ATTR_RO(sfp_modabs);
+DEVICE_ATTR_RO(sfp_txfault);
+DEVICE_ATTR_RO(sfp_rxlos);
+DEVICE_ATTR_RW(sfp_txdisable);
+
+DEVICE_ATTR_RW(interrupt);
+DEVICE_ATTR_RW(interrupt_mask);
+
+/* qsfp_attrs */
+static struct attribute *qsfp_attrs[] = {
+	&dev_attr_qsfp_modprsL.attr,
+	&dev_attr_qsfp_lpmode.attr,
+	&dev_attr_qsfp_resetL.attr,
+	&dev_attr_interrupt.attr,
+	&dev_attr_interrupt_mask.attr,
+	NULL
+};
+
+/* sfp_attrs */
+static struct attribute *sfp_attrs[] = {
+	&dev_attr_sfp_modabs.attr,
+	&dev_attr_sfp_txfault.attr,
+	&dev_attr_sfp_rxlos.attr,
+	&dev_attr_sfp_txdisable.attr,
+	&dev_attr_interrupt.attr,
+	&dev_attr_interrupt_mask.attr,
+	NULL
+};
+
+ATTRIBUTE_GROUPS(qsfp);
+ATTRIBUTE_GROUPS(sfp);
+
+/* A single port device init */
+static struct device* init_port(struct device *dev, 
+				struct xcvr_priv *xcvr, 
+				struct port_info info, 
+				const struct attribute_group **groups) 
+{
+	struct port_data *new_data;
+
+	new_data = devm_kzalloc(dev, sizeof(struct port_data), GFP_KERNEL);
+	if (!new_data)
+		return ERR_PTR(-ENOMEM);
+
+	new_data->index = info.index;
+	new_data->name = info.name;
+	new_data->xcvr = xcvr;
+
+	return devm_hwmon_device_register_with_groups(dev, 
+						      info.name, 
+						      new_data, 
+						      groups);
+}
+
+static void xcvr_cleanup(struct xcvr_priv *xcvr)
+{
+	struct device *dev;
+	struct port_data *data;
+	int i;
+
+	for (i = 0; i < xcvr->num_ports; i++){
+		dev = xcvr->fp_devs[i];
+		if (dev == NULL)
+			continue;
+		data = dev_get_drvdata(dev);
+		sysfs_remove_link(&xcvr->dev->kobj, data->name);
+	}
+}
+
+static int cls_xcvr_probe(struct platform_device *pdev)
+{
+
+	struct xcvr_priv *xcvr;
+	struct cls_xcvr_platform_data *pdata;
+	struct resource *res;
+	int ret;
+	int i;
+
+	struct device **port_devs;
+
+	xcvr = devm_kzalloc(&pdev->dev, sizeof(struct xcvr_priv), GFP_KERNEL);
+	if (!xcvr){
+		ret = -ENOMEM;
+		goto err_exit;
+	}
+
+	dev_set_drvdata(&pdev->dev, xcvr);
+
+	/* mmap resource */
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (res) {
+		xcvr->base = devm_ioremap_resource(&pdev->dev, res);
+		if (IS_ERR(xcvr->base)){
+			ret = PTR_ERR(xcvr->base);
+			goto err_exit;
+		}
+	}
+
+	pdata = dev_get_platdata(&pdev->dev);
+	xcvr->dev = &pdev->dev;
+
+	if (pdata) {
+		/* assign pdata */
+		xcvr->num_ports = pdata->num_ports;
+		xcvr->port_reg_size = pdata->port_reg_size;
+	}
+
+	/* alloc front panel device list */
+	port_devs = devm_kzalloc(&pdev->dev, 
+				 xcvr->num_ports * sizeof(struct device*), 
+				 GFP_KERNEL);
+	if (!port_devs){
+		ret = -ENOMEM;
+		goto err_exit;
+	}
+
+
+	if (pdata) {
+		/* create each device attrs group determined by type */
+		for (i = 0; i < pdata->num_ports; i++) {
+			struct device *fp_dev;
+
+			if (pdata->devices[i].type == SFP){
+				fp_dev = init_port(&pdev->dev,
+						   xcvr, 
+						   pdata->devices[i], 
+						   sfp_groups);
+			}else{
+				fp_dev = init_port(&pdev->dev,
+						   xcvr,  
+						   pdata->devices[i], 
+						   qsfp_groups);
+			}
+			if (IS_ERR(fp_dev)) {
+				dev_err(&pdev->dev, 
+					"Failed to init port %s\n", 
+					pdata->devices[i].name);
+				ret = PTR_ERR(fp_dev);
+				goto dev_clean_up;
+			}
+
+			dev_info(&pdev->dev, 
+				 "Register port %s\n", 
+				 pdata->devices[i].name);
+
+			WARN(sysfs_create_link(&pdev->dev.kobj, 
+					       &fp_dev->kobj, 
+					       pdata->devices[i].name),
+			     "can't create symlink to %s\n", pdata->devices[i].name);
+			port_devs[i] = fp_dev;
+			fp_dev = NULL;
+		}
+		xcvr->fp_devs = port_devs;
+	}
+
+	return 0;
+
+dev_clean_up:
+	xcvr_cleanup(xcvr);
+err_exit:
+	return ret;
+
+}
+
+
+static int cls_xcvr_remove(struct platform_device *pdev)
+{
+	struct xcvr_priv *xcvr = dev_get_drvdata(&pdev->dev);
+	xcvr_cleanup(xcvr);
+	return 0;
+}
+
+
+static struct platform_driver cls_xcvr_driver = {
+	.probe = cls_xcvr_probe,
+	.remove = cls_xcvr_remove,
+	.driver = {
+		.name = "cls-xcvr",
+	},
+};
+
+module_platform_driver(cls_xcvr_driver);
+
+MODULE_AUTHOR("Pradchaya Phucharoen<pphuchar@celestica.com>");
+MODULE_DESCRIPTION("Celestica xcvr control driver");
+MODULE_VERSION("0.0.1-3");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:cls-xcvr");
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/xcvr-cls.h b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/xcvr-cls.h
new file mode 100644
index 000000000000..7659a7c0e9cc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/modules/xcvr-cls.h
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * xcvr-cls.h
+ *
+ * Pradchaya Phucharoen <pphuchar@celestica.com>
+ * Copyright (C) 2019 Celestica Corp.
+ */
+
+#ifndef _LINUX_I2C_CLS_H
+#define _LINUX_I2C_CLS_H
+
+enum PORT_TYPE {
+        NONE = 0,
+        SFP,
+        QSFP
+};
+
+/*
+ * port_info - optical port info
+ * @index: front panel port index starting from 1
+ * @typr: port type, see *PORT_TYPE*
+ */
+struct port_info {
+        const char *name;
+        unsigned int index;
+        enum PORT_TYPE type;
+};
+
+/*
+ * cls_xcvr_platform_data - port xcvr private data
+ * @port_reg_size: register range of each port
+ * @num_ports: number of front panel ports
+ * @devices: list of front panel port info
+ */
+struct cls_xcvr_platform_data {
+        unsigned int port_reg_size;
+        int num_ports;
+        struct port_info *devices;
+};
+
+#endif /* _LINUX_I2C_CLS_H */
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/platform_sensors.py
index 1aa1c0719825..0d4691b60005 100755
--- a/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/platform_sensors.py
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/platform_sensors.py
@@ -6,28 +6,39 @@
 # The following data is support:
 #  1. Temperature sensors
 #  2. PSUs
-#  3. Fan trays
+#  3. Fan Drawers
 
 import sys
 import logging
 import subprocess
 
-IPMI_SDR_CMD = ["ipmitool", "sdr", "elist"]
+IPMI_SDR_CMD = ['/usr/bin/ipmitool', 'sdr', 'elist']
 MAX_NUM_FANS = 7
 MAX_NUM_PSUS = 2
 
+SENSOR_NAME = 0
+SENSOR_VAL = 4
+
+sensor_dict = {}
 
 def ipmi_sensor_dump(cmd):
     ''' Execute ipmitool command return dump output
         exit if any error occur.
     '''
+    global sensor_dict
     sensor_dump = ''
+
     try:
-        sensor_dump = subprocess.check_output(cmd)
+        sensor_dump = subprocess.check_output(cmd, universal_newlines=True)
     except subprocess.CalledProcessError as e:
         logging.error('Error! Failed to execute: {}'.format(cmd))
         sys.exit(1)
-    return sensor_dump
+
+    for line in sensor_dump.splitlines():
+        sensor_info = line.split('|')
+        sensor_dict[sensor_info[SENSOR_NAME].strip()] = sensor_info[SENSOR_VAL].strip()
+
+    return True
 
 def get_reading_by_name(sensor_name, sdr_elist_dump):
     '''
@@ -49,7 +60,8 @@ def get_reading_by_name(sensor_name, sdr_elist_dump):
     '''
     found = ''
 
-    for line in sdr_elist_dump.split("\n"):
+    for line in sdr_elist_dump.splitlines():
+        line = line.decode()
         if sensor_name in line:
             found = line.strip()
             break
@@ -67,19 +79,18 @@ def get_reading_by_name(sensor_name, sdr_elist_dump):
     return found
 
 
-def read_temperature_sensors(ipmi_sdr_elist):
-
-    sensor_list = [
-        ('TEMP_FAN_U52',        'Fan Tray Middle Temp'),
-        ('TEMP_FAN_U17',        'Fan Tray Right Temp'),
-        ('TEMP_SW_U52',         'Switchboard Left Inlet Temp'),
-        ('TEMP_SW_U16',         'Switchboard Right Inlet Temp'),
-        ('TEMP_BB_U3',          'Baseboard Temp'),
-        ('TEMP_CPU',            'CPU Internal Temp'),
-        ('TEMP_SW_Internal',    'ASIC Internal Temp'),
-        ('SW_U04_Temp',         'IR3595 Chip Left Temp'),
-        ('SW_U14_Temp',         'IR3595 Chip Right Temp'),
-        ('SW_U4403_Temp',       'IR3584 Chip Temp'),
+def read_temperature_sensors():
+    sensor_list = [\
+        ('TEMP_FAN_U52',     'Fanboard Center Temp'),\
+        ('TEMP_FAN_U17',     'Fanboard Right Temp'),\
+        ('TEMP_SW_U52',      'Switchboard Left Temp'),\
+        ('TEMP_SW_U16',      'Switchboard Right Temp'),\
+        ('TEMP_BB_U3',       'Baseboard Temp'),\
+        ('TEMP_CPU',         'CPU Internal Temp'),\
+        ('TEMP_SW_Internal', 'ASIC Internal Temp'),\
+        ('SW_U04_Temp',      'IR35215 Chip Left Temp'),\
+        ('SW_U14_Temp',      'IR35215 Chip Right Temp'),\
+        ('SW_U4403_Temp',    'IR3584 Chip Temp'),\
     ]
 
     output = ''
@@ -90,20 +101,18 @@ def read_temperature_sensors(ipmi_sdr_elist):
     output += "Temperature Sensors\n"
     output += "Adapter: IPMI adapter\n"
     for sensor in sensor_list:
-        reading = get_reading_by_name(sensor[0],ipmi_sdr_elist)
-        output += sensor_format.format('{}:'.format(sensor[1]),
-                                       reading,
+        output += sensor_format.format('{}:'.format(sensor[1]),\
+                                       sensor_dict[sensor[0]],\
                                        width=str(max_name_width+1))
     output += '\n'
     return output
 
+def read_fan_sensors(num_fans):
 
-def read_fan_sensors(num_fans, ipmi_sdr_elist):
-
-    sensor_list = [
-        ('Fan{}_Status',    'Status'),
-        ('Fan{}_Front',     'Fan {} front'),
-        ('Fan{}_Rear',      'Fan {} rear'),
+    sensor_list = [\
+        ('Fan{}_Status', 'Fan Drawer {} Status'),\
+        ('Fan{}_Front',  'Fan {} front'),\
+        ('Fan{}_Rear',   'Fan {} rear'),\
     ]
 
     output = ''
@@ -111,33 +120,31 @@ def read_fan_sensors(num_fans, ipmi_sdr_elist):
     # Find max length of sensor calling name
     max_name_width = max(len(sensor[1]) for sensor in sensor_list)
 
-    output += "Fan Trays\n"
+    output += "Fan Drawers\n"
     output += "Adapter: IPMI adapter\n"
     for fan_num in range(1, num_fans+1):
         for sensor in sensor_list:
             ipmi_sensor_name = sensor[0].format(fan_num)
             display_sensor_name = sensor[1].format(fan_num)
-            reading = get_reading_by_name(ipmi_sensor_name, ipmi_sdr_elist)
-            output += sensor_format.format('{}:'.format(display_sensor_name),
-                                           reading,
+            output += sensor_format.format('{}:'.format(display_sensor_name),\
+                                           sensor_dict[ipmi_sensor_name],\
                                            width=str(max_name_width+1))
     output += '\n'
     return output
 
-
-def read_psu_sensors(num_psus, ipmi_sdr_elist):
-
-    sensor_list = [
-        ('PSU{}_Status',    'PSU {} Status'),
-        ('PSU{}_Fan',       'PSU {} Fan'),
-        ('PSU{}_VIn',       'PSU {} Input Voltag'),
-        ('PSU{}_CIn',       'PSU {} Input Current'),
-        ('PSU{}_PIn',       'PSU {} Input Power'),
-        ('PSU{}_Temp1',     'PSU {} Temp1'),
-        ('PSU{}_Temp2',     'PSU {} Temp2'),
-        ('PSU{}_VOut',      'PSU {} Output Voltag'),
-        ('PSU{}_COut',      'PSU {} Output Current'),
-        ('PSU{}_POut',      'PSU {} Output Power'),
+def read_psu_sensors(num_psus):
+
+    sensor_list = [\
+        ('PSU{}_Status', 'PSU {} Status'),\
+        ('PSU{}_Fan',    'PSU {} Fan 1'),\
+        ('PSU{}_VIn',    'PSU {} Input Voltage'),\
+        ('PSU{}_CIn',    'PSU {} Input Current'),\
+        ('PSU{}_PIn',    'PSU {} Input Power'),\
+        ('PSU{}_Temp1',  'PSU {} Ambient Temp'),\
+        ('PSU{}_Temp2',  'PSU {} Hotspot Temp'),\
+        ('PSU{}_VOut',   'PSU {} Output Voltage'),\
+        ('PSU{}_COut',   'PSU {} Output Current'),\
+        ('PSU{}_POut',   'PSU {} Output Power'),\
     ]
 
     output = ''
@@ -151,22 +158,21 @@ def read_psu_sensors(num_psus, ipmi_sdr_elist):
         for sensor in sensor_list:
             ipmi_sensor_name = sensor[0].format(psu_num)
             display_sensor_name = sensor[1].format(psu_num)
-            reading = get_reading_by_name(ipmi_sensor_name, ipmi_sdr_elist)
-            output += sensor_format.format('{}:'.format(display_sensor_name),
-                                           reading,
+            output += sensor_format.format('{}:'.format(display_sensor_name),\
+                                           sensor_dict[ipmi_sensor_name],\
                                            width=str(max_name_width+1))
     output += '\n'
     return output
 
-
 def main():
     output_string = ''
 
-    ipmi_sdr_elist = ipmi_sensor_dump(IPMI_SDR_CMD)
-    output_string += read_temperature_sensors(ipmi_sdr_elist)
-    output_string += read_psu_sensors(MAX_NUM_PSUS, ipmi_sdr_elist)
-    output_string += read_fan_sensors(MAX_NUM_FANS, ipmi_sdr_elist)
-    print(output_string)
+    if ipmi_sensor_dump(IPMI_SDR_CMD):
+        output_string += read_temperature_sensors()
+        output_string += read_psu_sensors(MAX_NUM_PSUS)
+        output_string += read_fan_sensors(MAX_NUM_FANS)
+
+        print(output_string)
 
 
 if __name__ == '__main__':
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/sensors b/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/sensors
index 405d92c2b3cc..5d740a9eb7d7 100755
--- a/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/sensors
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/sensors
@@ -8,4 +8,4 @@ if [ -t 1 ] ; then
 fi
 
 docker exec -$DOCKER_EXEC_FLAGS pmon sensors "$@"
-docker exec -$DOCKER_EXEC_FLAGS pmon platform_sensors.py "$@"
+docker exec -$DOCKER_EXEC_FLAGS pmon python3 /usr/bin/platform_sensors.py "$@"
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/silverstone_platform_shutdown.sh b/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/silverstone_platform_shutdown.sh
new file mode 100755
index 000000000000..973c90378dca
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/scripts/silverstone_platform_shutdown.sh
@@ -0,0 +1,26 @@
+#!/bin/bash
+REBOOT_CAUSE_DIR="/host/reboot-cause"
+HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt"
+REBOOT_TIME=$(date)
+
+if [ $# -ne 1 ]; then
+    echo "Require reboot type"
+    exit 1
+fi
+
+if [ ! -d "$REBOOT_CAUSE_DIR" ]; then
+    mkdir $REBOOT_CAUSE_DIR
+fi
+
+echo "Reason:$1,Time:${REBOOT_TIME}" > ${HW_REBOOT_CAUSE_FILE}
+
+# Best effort to write buffered data onto the disk
+sync ; sync ; sync ; sleep 3
+
+# BMC cold power-cyle
+ipmitool chassis power cycle &> /dev/null
+
+# System should reboot by now and avoid the script returning to caller
+sleep 10
+
+exit 0
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/setup.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/setup.py
index 20a2b6d1063a..7da0814059d9 100644
--- a/platform/broadcom/sonic-platform-modules-cel/silverstone/setup.py
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/setup.py
@@ -1,8 +1,5 @@
 from setuptools import setup
 
-DEVICE_NAME = 'celestica'
-HW_SKU = 'x86_64-cel_silverstone-r0'
-
 setup(
     name='sonic-platform',
     version='1.0',
@@ -17,7 +14,7 @@
         'sonic_platform',
     ],
     package_dir={
-        'sonic_platform': '../../../../device/{}/{}/sonic_platform'.format(DEVICE_NAME, HW_SKU)},
+        'sonic_platform': 'sonic_platform'},
     classifiers=[
         'Development Status :: 3 - Alpha',
         'Environment :: Plugins',
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/__init__.py
new file mode 100644
index 000000000000..d3c24cb008dd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/__init__.py
@@ -0,0 +1,2 @@
+__all__ = ["platform", "chassis"]
+from sonic_platform import platform
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/chassis.py
new file mode 100644
index 000000000000..da898c9a147e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/chassis.py
@@ -0,0 +1,452 @@
+#############################################################################
+# Celestica
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the Chassis information which are available in the platform
+#
+#############################################################################
+
+try:
+    from sonic_platform_base.chassis_base import ChassisBase
+    from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper
+    from sonic_py_common import device_info
+    from sonic_platform_base.sfp_base import SfpBase
+    from .helper import APIHelper
+    import time
+    import os
+    import re
+    import shutil
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+NUM_FAN_TRAY = 7
+NUM_FAN = 2
+NUM_PSU = 2
+NUM_THERMAL = 14
+NUM_SFP = 32
+NUM_COMPONENT = 10
+
+IPMI_OEM_NETFN = "0x3A"
+IPMI_GET_REBOOT_CAUSE = "0x03 0x00 0x01 0x06"
+
+IPMI_SET_SYS_LED_CMD = "0x07 0x00 {}"
+IPMI_GET_SYS_LED_CMD = "0x08 0x00"
+
+LPC_GETREG_PATH = "/sys/bus/platform/devices/baseboard-lpc/getreg"
+LPC_SETREG_PATH = "/sys/bus/platform/devices/baseboard-lpc/setreg"
+LPC_STATUS_LED_REG = "0xA162"
+
+ORG_HW_REBOOT_CAUSE_FILE="/host/reboot-cause/hw-reboot-cause.txt"
+TMP_HW_REBOOT_CAUSE_FILE="/tmp/hw-reboot-cause.txt"
+
+class Chassis(ChassisBase):
+    """Platform-specific Chassis class"""
+
+    #led color status
+    SYSLED_COLOR_VAL_MAP = {
+        'off':   '0xff',
+        'green': '0xdc',
+        'amber': '0xec',
+        'green_blink_1hz': '0xdd',
+        'green_blink_4hz': '0xde',
+        'amber_blink_1hz': '0xed',
+        'amber_blink_4hz': '0xee',
+        'green_amber_1hz': '0xcd',
+        'green_amber_4hz': '0xce'
+    }
+
+    SYSLED_VAL_COLOR_DESC_MAP = {
+        "0xff": "off",
+        "0xdc": "green",
+        "0xec": "amber",
+        "0xdd": "green blinking 1Hz",
+        "0xde": "green blinking 4Hz",
+        "0xed": "amber blinking 1Hz",
+        "0xee": "amber blinking 4Hz",
+        "0xcd": "green & amber alternate 1Hz",
+        "0xce": "green & amber alternate 4Hz"
+    }
+
+    def __init__(self):
+        ChassisBase.__init__(self)
+        self._api_helper = APIHelper()
+        self.sfp_module_initialized = False
+        self._sfp_list = []
+        self.sfp_status_dict = {}
+        self._watchdog = None
+        self._airflow_direction = None
+
+        self.__initialize_eeprom()
+        self.is_host = self._api_helper.is_host()
+
+        self.__initialize_fan()
+        self.__initialize_psu()
+        self.__initialize_thermals()
+        self.__initialize_components()
+
+    def __initialize_sfp(self):
+        sfputil_helper = SfpUtilHelper()
+        port_config_file_path = device_info.get_path_to_port_config_file()
+        sfputil_helper.read_porttab_mappings(port_config_file_path, 0)
+
+        #from sonic_platform.sfp import Sfp
+        from sonic_platform.sfp import Sfp
+        for index in range(0, NUM_SFP):
+            #sfp = Sfp(index, sfputil_helper.logical[index])
+            sfp = Sfp(index, sfputil_helper.physical_to_logical[index + 1])
+            self._sfp_list.append(sfp)
+            self.sfp_status_dict[sfp.index] = '1' if sfp.get_presence() else '0'
+        self.sfp_module_initialized = True
+
+    def __initialize_psu(self):
+        from sonic_platform.psu import Psu
+        for index in range(0, NUM_PSU):
+            psu = Psu(index)
+            self._psu_list.append(psu)
+
+    def __initialize_fan(self):
+        from sonic_platform.fan_drawer import FanDrawer
+        for i in range(NUM_FAN_TRAY):
+            fandrawer = FanDrawer(i)
+            self._fan_drawer_list.append(fandrawer)
+            self._fan_list.extend(fandrawer._fan_list)
+
+    def __initialize_thermals(self):
+        from sonic_platform.thermal import Thermal
+        # airflow = self.__get_air_flow()
+        for index in range(0, NUM_THERMAL):
+            thermal = Thermal(index)
+            self._thermal_list.append(thermal)
+
+    def __initialize_eeprom(self):
+        from sonic_platform.eeprom import Eeprom
+        self._eeprom = Eeprom()
+
+    def __initialize_components(self):
+        from sonic_platform.component import Component
+        for index in range(0, NUM_COMPONENT):
+            component = Component(index)
+            self._component_list.append(component)
+
+    def initizalize_system_led(self):
+        pass
+
+    def get_base_mac(self):
+        """
+        Retrieves the base MAC address for the chassis
+        Returns:
+            A string containing the MAC address in the format
+            'XX:XX:XX:XX:XX:XX'
+        """
+        return self._eeprom.get_mac()
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision for the chassis
+        Returns:
+            A string containing the hardware revision for this chassis.
+        """
+        return self._eeprom.get_revision()
+
+    def get_serial(self):
+        """
+        Retrieves the hardware serial number for the chassis
+        Returns:
+            A string containing the hardware serial number for this chassis.
+        """
+        return self._eeprom.get_serial()
+
+    def get_system_eeprom_info(self):
+        """
+        Retrieves the full content of system EEPROM information for the chassis
+        Returns:
+            A dictionary where keys are the type code defined in
+            OCP ONIE TlvInfo EEPROM format and values are their corresponding
+            values.
+        """
+        return self._eeprom.get_eeprom()
+
+    def get_reboot_cause(self):
+        """
+        Retrieves the cause of the previous reboot
+
+        Returns:
+            A tuple (string, string) where the first element is a string
+            containing the cause of the previous reboot. This string must be
+            one of the predefined strings in this class. If the first string
+            is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
+            to pass a description of the reboot cause.
+        """
+
+        status, raw_cause = self._api_helper.ipmi_raw(
+            IPMI_OEM_NETFN, IPMI_GET_REBOOT_CAUSE)
+        hx_cause = raw_cause.split()[0] if status and len(
+            raw_cause.split()) > 0 else 00
+
+        # This tmp copy is to retain the reboot-cause only for the current boot
+        if os.path.isfile(ORG_HW_REBOOT_CAUSE_FILE):
+            shutil.move(ORG_HW_REBOOT_CAUSE_FILE, TMP_HW_REBOOT_CAUSE_FILE)
+
+        if hx_cause == "77" and os.path.isfile(TMP_HW_REBOOT_CAUSE_FILE):
+            with open(TMP_HW_REBOOT_CAUSE_FILE) as hw_cause_file:
+                reboot_info = hw_cause_file.readline().rstrip('\n')
+                match = re.search(r'Reason:(.*),Time:(.*)', reboot_info)
+                if match is not None:
+                    if match.group(1) == 'system':
+                        return (self.REBOOT_CAUSE_NON_HARDWARE, 'System cold reboot')
+
+        reboot_cause = {
+            "00": self.REBOOT_CAUSE_HARDWARE_OTHER,
+            "11": self.REBOOT_CAUSE_POWER_LOSS,
+            "22": self.REBOOT_CAUSE_NON_HARDWARE,
+            "33": self.REBOOT_CAUSE_NON_HARDWARE,
+            "44": self.REBOOT_CAUSE_NON_HARDWARE,
+            "55": self.REBOOT_CAUSE_HARDWARE_OTHER,
+            "66": self.REBOOT_CAUSE_WATCHDOG,
+            "77": self.REBOOT_CAUSE_POWER_LOSS,
+            "88": self.REBOOT_CAUSE_WATCHDOG
+        }.get(hx_cause, self.REBOOT_CAUSE_HARDWARE_OTHER)
+
+        description = {
+            "00": "Hardware Reason",
+            "11": "Power On Reset",
+            "22": "Soft-Set CPU Warm Reset",
+            "33": "Soft-Set CPU Cold Reset",
+            "44": "CPU Warm Reset",
+            "55": "CPU Cold Reset",
+            "66": "GPIO Watchdog Reset",
+            "77": "Power Cycle Reset",
+            "88": "Hardware Watchdog Reset"
+        }.get(hx_cause, "Unknown reason")
+
+        return (reboot_cause, description)
+
+    def get_change_event(self, timeout=0):
+        """
+        Returns a nested dictionary containing all devices which have
+        experienced a change at chassis level
+        Args:
+            timeout: Timeout in milliseconds (optional). If timeout == 0,
+                this method will block until a change is detected.
+        Returns:
+            (bool, dict):
+                - True if call successful, False if not;
+                - A nested dictionary where key is a device type,
+                  value is a dictionary with key:value pairs in the format of
+                  {'device_id':'device_event'},
+                  where device_id is the device ID for this device and
+                        device_event,
+                             status='1' represents device inserted,
+                             status='0' represents device removed.
+                  Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0'}}
+                      indicates that fan 0 has been removed, fan 2
+                      has been inserted and sfp 11 has been removed.
+        """
+        # SFP event
+        if not self.sfp_module_initialized:
+            self.__initialize_sfp()
+
+        sfp_dict = {}
+
+        SFP_REMOVED = '0'
+        SFP_INSERTED = '1'
+
+        SFP_PRESENT = True
+        SFP_ABSENT = False
+
+        start_time = time.time()
+        time_period = timeout/float(1000) #Convert msecs to secs
+
+        while time.time() < (start_time + time_period) or timeout == 0:
+            for sfp in self._sfp_list:
+                port_idx = sfp.index
+                if self.sfp_status_dict[port_idx] == SFP_REMOVED and \
+                    sfp.get_presence() == SFP_PRESENT:
+                    sfp_dict[port_idx] = SFP_INSERTED
+                    self.sfp_status_dict[port_idx] = SFP_INSERTED
+                elif self.sfp_status_dict[port_idx] == SFP_INSERTED and \
+                    sfp.get_presence() == SFP_ABSENT:
+                    sfp_dict[port_idx] = SFP_REMOVED
+                    self.sfp_status_dict[port_idx] = SFP_REMOVED
+
+            if sfp_dict:
+                return True, {'sfp':sfp_dict}
+
+            time.sleep(0.5)
+
+        return True, {'sfp':{}} # Timeout
+
+    ##############################################################
+    ######################## SFP methods #########################
+    ##############################################################
+
+    def get_num_sfps(self):
+        """
+        Retrieves the number of sfps available on this chassis
+        Returns:
+            An integer, the number of sfps available on this chassis
+        """
+        if not self.sfp_module_initialized:
+            self.__initialize_sfp()
+
+        return len(self._sfp_list)
+
+    def get_all_sfps(self):
+        """
+        Retrieves all sfps available on this chassis
+        Returns:
+            A list of objects derived from SfpBase representing all sfps
+            available on this chassis
+        """
+        if not self.sfp_module_initialized:
+            self.__initialize_sfp()
+
+        return self._sfp_list
+
+    def get_sfp(self, index):
+        """
+        Retrieves sfp represented by (1-based) index <index>
+        Args:
+            index: An integer, the index (1-based) of the sfp to retrieve.
+            The index should be the sequence of a physical port in a chassis,
+            starting from 1.
+            For example, 1 for Ethernet0, 2 for Ethernet4 and so on.
+        Returns:
+            An object dervied from SfpBase representing the specified sfp
+        """
+        if not self.sfp_module_initialized:
+            self.__initialize_sfp()
+        return super(Chassis, self).get_sfp(index-1)
+
+    ##############################################################
+    ####################### Other methods ########################
+    ##############################################################
+
+    def get_watchdog(self):
+        """
+        Retreives hardware watchdog device on this chassis
+        Returns:
+            An object derived from WatchdogBase representing the hardware
+            watchdog device
+        """
+        if self._watchdog is None:
+            from sonic_platform.watchdog import Watchdog
+            self._watchdog = Watchdog()
+
+        return self._watchdog
+
+    ##############################################################
+    ###################### Device methods ########################
+    ##############################################################
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+            Returns:
+            string: The name of the device
+        """
+        return self._api_helper.hwsku
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the Chassis
+        Returns:
+            bool: True if Chassis is present, False if not
+        """
+        return True
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+        Returns:
+            string: Model/part number of device
+        """
+        return self._eeprom.get_pn()
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the device
+        Returns:
+            A boolean value, True if device is operating properly, False if not
+        """
+        return True
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
+
+    def set_status_led(self, color):
+        """
+        Sets the state of the PSU status LED
+        Args:
+            color: A string representing the color with which to set the PSU status LED
+                   Note: Only support green and off
+        Returns:
+            bool: True if status LED state is set successfully, False if not
+        """
+        color_val = self.SYSLED_COLOR_VAL_MAP.get(color)
+        if color_val == None:
+            return False
+
+        status = self._api_helper.lpc_setreg(LPC_SETREG_PATH, LPC_STATUS_LED_REG, color_val)
+        return status
+
+    def get_status_led(self):
+        """
+        Gets the state of the PSU status LED
+        Returns:
+            A string, one of the predefined STATUS_LED_COLOR_* strings above
+        """
+        color_val = self._api_helper.lpc_getreg(LPC_GETREG_PATH, LPC_STATUS_LED_REG)
+        color = self.SYSLED_VAL_COLOR_DESC_MAP.get(color_val, "N/A")
+        return color
+
+    def get_airflow_direction(self):
+        if self._airflow_direction == None:
+            try:
+                vendor_extn = self._eeprom.get_vendor_extn()
+                airflow_type = vendor_extn.split()[2][2:4] # Either 0xFB or 0xBF
+                if airflow_type == 'FB':
+                    direction = 'exhaust'
+                elif airflow_type == 'BF':
+                    direction = 'intake'
+                else:
+                    direction = 'N/A'
+            except (AttributeError, IndexError):
+                direction = 'N/A'
+
+            self._airflow_direction = direction
+
+        return self._airflow_direction
+
+    def get_port_or_cage_type(self, index):
+        """
+        Retrieves sfp port or cage type corresponding to physical port <index>
+
+        Args:
+            index: An integer (>=0), the index of the sfp to retrieve.
+
+        Returns:
+            The masks of all types of port or cage that can be supported on the port
+            Types are defined in sfp_base.py
+        """
+        if index in range(1, 32+1):
+            return (SfpBase.SFP_PORT_TYPE_BIT_QSFP28 | SfpBase.SFP_PORT_TYPE_BIT_SFP28 | \
+                    SfpBase.SFP_PORT_TYPE_BIT_SFP_PLUS | SfpBase.SFP_PORT_TYPE_BIT_QSFPDD | SfpBase.SFP_PORT_TYPE_BIT_QSFP)
+        else:
+            raise NotImplementedError
+
+
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/component.py
new file mode 100644
index 000000000000..8748404d9931
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/component.py
@@ -0,0 +1,181 @@
+#############################################################################
+# Celestica
+#
+# Component contains an implementation of SONiC Platform Base API and
+# provides the components firmware management function
+#
+#############################################################################
+
+import os.path
+import subprocess
+import re
+
+try:
+    from sonic_platform_base.component_base import ComponentBase
+    from .helper import APIHelper
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+NAME_IDX = 0
+DESC_IDX = 1
+VER_API_IDX = 2
+
+BASE_CPLD_VER_CMD = "0x03 0x00 0x01 0x00"
+FAN_CPLD_VER_CMD = "0x03 0x01 0x01 0x00"
+BIOS_VER_PATH = "/sys/class/dmi/id/bios_version"
+BMC_VER_CMD1 = ["ipmitool", "mc", "info"]
+BMC_VER_CMD2 = ["grep", "Firmware Revision"]
+ONIE_VER_CMD = ["cat", "/host/machine.conf"]
+SSD_VER_CMD = ["smartctl", " -i", "/dev/sda"]
+BASE_GETREG_PATH = "/sys/devices/platform/baseboard-lpc/getreg"
+MEM_PCI_RESOURCE = "/sys/bus/pci/devices/0000:09:00.0/resource0"
+FPGA_VER_MEM_OFFSET = 0
+NETFN = "0x3A"
+COME_CPLD_VER_REG = "0xA1E0"
+
+class Component(ComponentBase):
+    """Platform-specific Component class"""
+
+    DEVICE_TYPE = "component"
+
+    def __init__(self, component_index):
+        COMPONENT_LIST = [
+            ("BIOS",        "Basic Input/Output System", self.__get_bios_ver),
+            ("ONIE",        "Open Network Install Environment", self.__get_onie_ver),
+            ("BMC",         "Baseboard Management Controller", self.__get_bmc_ver),
+            ("FPGA",        "FPGA for transceiver EEPROM access and other component I2C access", self.__get_fpga_ver),
+            ("CPLD COMe",   "COMe board CPLD", self.__get_come_cpld_ver),
+            ("CPLD BASE",   "CPLD for board functions and watchdog", self.__get_cpld_ver_from_bmc),
+            ("CPLD SW1",    "CPLD for port control QSFP(1-16)", self.__get_sw_cpld1_ver),
+            ("CPLD SW2",    "CPLD for port control QSFP(17-32) SFP(33-34)", self.__get_sw_cpld2_ver),
+            ("CPLD FAN",    "CPLD for fan control and status", self.__get_cpld_ver_from_bmc),
+            ("SSD",         "Solid State Drive - {}", self.__get_ssd_ver)
+        ]
+        self.index = component_index
+        self.name = COMPONENT_LIST[self.index][NAME_IDX]
+        self.description = COMPONENT_LIST[self.index][DESC_IDX]
+        self.__get_version = COMPONENT_LIST[self.index][VER_API_IDX]
+        self._api_helper = APIHelper()
+
+    def __i2c_get(self, bus, i2caddr, offset):
+        try:
+            return int(subprocess.check_output(['/usr/sbin/i2cget', '-y', '-f', str(bus), str(i2caddr), str(offset)]), 16)
+        except (FileNotFoundError, subprocess.CalledProcessError):
+            return -1
+
+    def __get_bios_ver(self):
+        return self._api_helper.read_txt_file(BIOS_VER_PATH)
+
+    def __get_onie_ver(self):
+        onie_ver = "N/A"
+        status, raw_onie_data = self._api_helper.run_command(ONIE_VER_CMD)
+        if status:
+            ret = re.search(r"(?<=onie_version=).+[^\n]", raw_onie_data)
+            if ret != None:
+                onie_ver = ret.group(0)
+        return onie_ver
+
+    def __get_bmc_ver(self):
+        bmc_ver = "Unknown"
+        status, raw_bmc_data = self._api_helper.run_command(BMC_VER_CMD1, BMC_VER_CMD2)
+        if status:
+            bmc_ver_data = raw_bmc_data.split(":")
+            bmc_ver = bmc_ver_data[-1].strip() if len(
+                bmc_ver_data) > 1 else bmc_ver
+        return bmc_ver
+
+    def __get_fpga_ver(self):
+        fpga_ver = "Unknown"
+        status, reg_val = self._api_helper.pci_get_value(
+            MEM_PCI_RESOURCE, FPGA_VER_MEM_OFFSET)
+        if status:
+            major = reg_val[0] >> 16
+            minor = int(bin(reg_val[0])[16:32], 2)
+            fpga_ver = '{}.{}'.format(major, minor)
+        return fpga_ver
+
+    def __get_come_cpld_ver(self):
+        cpld_ver_str = self._api_helper.lpc_getreg(BASE_GETREG_PATH, COME_CPLD_VER_REG)
+        if not cpld_ver_str:
+            return "N/A"
+
+        cpld_ver = int(cpld_ver_str, 16)
+        return "{:x}.{:x}".format((cpld_ver >> 4) & 0xF, cpld_ver & 0xF)
+ 
+    def __get_cpld_ver_from_bmc(self):
+        cpld_ver = "N/A"
+        cmd = BASE_CPLD_VER_CMD
+
+        if self.name == "CPLD FAN":
+            cmd = FAN_CPLD_VER_CMD
+
+        (rc, op) = self._api_helper.ipmi_raw(NETFN, cmd)
+        if rc and len(op) == 2:
+            cpld_ver = op[0] + '.' + op[1]
+
+        return cpld_ver
+       
+    def __get_sw_cpld1_ver(self):
+        val = self.__i2c_get(4, 0x30, 0)
+        if val != -1:
+            return '{:x}.{:x}'.format((val >> 4) & 0xf, val & 0xf)
+        else:
+            return 'N/A'
+
+    def __get_sw_cpld2_ver(self):
+        val = self.__i2c_get(4, 0x31, 0)
+        if val != -1:
+            return '{:x}.{:x}'.format((val >> 4) & 0xf, val & 0xf)
+        else:
+            return 'N/A'
+
+    def __get_ssd_ver(self):
+        ssd_ver = "N/A"
+        status, raw_ssd_data = self._api_helper.run_command(SSD_VER_CMD)
+        if status:
+            ret = re.search(r"Firmware Version: +(.*)[^\\]", raw_ssd_data)
+            if ret != None:
+                ssd_ver = ret.group(1)
+        return ssd_ver
+
+    def __get_ssd_model(self):
+        model = "N/A"
+
+        status, raw_ssd_data = self._api_helper.run_command(SSD_VER_CMD)
+        if status:
+            ret = re.search(r"Device Model: +(.*)[^\\]", raw_ssd_data)
+            if ret != None:
+                try:
+                    model = ret.group(1)
+                except (IndexError):
+                    pass
+
+        return model
+
+    def get_name(self):
+        """
+        Retrieves the name of the component
+         Returns:
+            A string containing the name of the component
+        """
+        return self.name
+
+    def get_description(self):
+        """
+        Retrieves the description of the component
+            Returns:
+            A string containing the description of the component
+        """
+        # For SSD get the model name from device
+        if self.get_name() == "SSD":
+            return self.description.format(self.__get_ssd_model())
+
+        return self.description
+
+    def get_firmware_version(self):
+        """
+        Retrieves the firmware version of module
+        Returns:
+            string: The firmware versions of the module
+        """
+        return self.__get_version()
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/eeprom.py
new file mode 100644
index 000000000000..ed5891f4f5d5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/eeprom.py
@@ -0,0 +1,123 @@
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica
+#
+# Platform and model specific eeprom subclass, inherits from the base class,
+# and provides the followings:
+# - the eeprom format definition
+# - specific encoder/decoder if there is special need
+#############################################################################
+
+try:
+    import os
+    import sys
+    import re
+    import json
+    import fcntl
+
+    if sys.version_info.major == 3:
+        from io import StringIO
+    else:
+        from cStringIO import StringIO
+
+    from sonic_platform_base.sonic_eeprom import eeprom_tlvinfo
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+NULL = 'N/A'
+EEPROM_TMP_FILE = '/tmp/eeprom_dump.json'
+
+class Eeprom(eeprom_tlvinfo.TlvInfoDecoder):
+
+    EEPROM_DECODE_HEADLINES = 6
+
+    def __init__(self):
+        self._eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0056/eeprom"
+        super(Eeprom, self).__init__(self._eeprom_path, 0, '', True)
+        self._eeprom = self._load_eeprom()
+
+    def __parse_output(self, decode_output):
+        decode_output.replace('\0', '')
+        lines = decode_output.split('\n')
+        lines = lines[self.EEPROM_DECODE_HEADLINES:]
+        _eeprom_info_dict = dict()
+
+        for line in lines:
+            try:
+                match = re.search('(0x[0-9a-fA-F]{2})\s+\d+\s+(.+)', line)
+                if match is not None:
+                    idx = match.group(1)
+                    value = match.group(2).rstrip('\0')
+
+                _eeprom_info_dict[idx] = value
+            except Exception:
+                pass
+        return _eeprom_info_dict
+
+    def _load_eeprom(self):
+        eeprom_dict = {}
+
+        if os.path.exists(EEPROM_TMP_FILE):
+            with open(EEPROM_TMP_FILE, 'r') as fd:
+                eeprom_dict = json.load(fd)
+
+            return eeprom_dict
+
+        original_stdout = sys.stdout
+        sys.stdout = StringIO()
+        rv = -1
+        try:
+            rv = self.read_eeprom_db()
+        except BaseException:
+            pass
+
+        if rv == 0:
+            decode_output = sys.stdout.getvalue()
+            sys.stdout = original_stdout
+            eeprom_dict = self.__parse_output(decode_output)
+        else:
+            e = self.read_eeprom()
+            if e is None:
+                sys.stdout = original_stdout
+                return {}
+
+            self.decode_eeprom(e)
+            decode_output = sys.stdout.getvalue()
+            sys.stdout = original_stdout
+
+            (is_valid, valid_crc) = self.is_checksum_valid(e)
+            if not is_valid:
+                return {}
+
+            eeprom_dict = self.__parse_output(decode_output)
+
+        if len(eeprom_dict) != 0:
+            with open(EEPROM_TMP_FILE, 'w') as fd:
+                fcntl.flock(fd, fcntl.LOCK_EX)
+                json.dump(eeprom_dict, fd)
+                fcntl.flock(fd, fcntl.LOCK_UN)
+
+        return eeprom_dict
+
+    def get_eeprom(self):
+        return self._eeprom
+
+    def get_product(self):
+        return self._eeprom.get('0x21', NULL)
+
+    def get_pn(self):
+        return self._eeprom.get('0x22', NULL)
+
+    def get_serial(self):
+        return self._eeprom.get('0x23', NULL)
+
+    def get_mac(self):
+        return self._eeprom.get('0x24', NULL)
+
+    def get_revision(self):
+        return self._eeprom.get('0x26', NULL)
+
+    def get_vendor_extn(self):
+        return self._eeprom.get('0xFD', NULL)
diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/fan.py
similarity index 51%
rename from device/celestica/x86_64-cel_silverstone-r0/sonic_platform/fan.py
rename to platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/fan.py
index 1a18eed9c8d5..30ef3d934bc1 100644
--- a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/fan.py
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/fan.py
@@ -17,37 +17,36 @@
     raise ImportError(str(e) + "- required module not found")
 
 
-FAN_NAME_LIST = ["FAN-1F", "FAN-1R", "FAN-2F", "FAN-2R", "FAN-3F", "FAN-3R",
-                 "FAN-4F", "FAN-4R", "FAN-5F", "FAN-5R", "FAN-6F", "FAN-6R", "FAN-7F", "FAN-7R"]
-
 IPMI_OEM_NETFN = "0x3A"
 IPMI_SENSOR_NETFN = "0x04"
 IPMI_FAN_SPEED_CMD = "0x2D {}"
 IPMI_AIR_FLOW_CMD = "0x0A {}"
 IPMI_FAN_PRESENT_CMD = "0x06 0x03 {}"
+IPMI_FAN_SPEED_CPLD_CMD = "0x03 0x01 0x01 {}"
 IPMI_SET_FAN_LED_CMD = "0x07 {} {}"
 IPMI_GET_FAN_LED_CMD = "0x08 {}"
-IPMI_SET_PWM = "0x03 0x01 0x02 {} {}"
-
-IPMI_FRU_MODEL_KEY = "Board Part Number"
-IPMI_FRU_SERIAL_KEY = "Board Serial"
-
-MAX_OUTLET = 24700
-MAX_INLET = 29700
-SPEED_TOLERANCE = 10
 
-FAN1_FRONT_SS_ID = "0x0D"
-FAN1_REAR_SS_ID = "0x45"
+FAN_NAME_TEMPLATE = "{}Fan{}{}"
+
+FAN_FRONT_MAX_SPEED = 24700
+FAN_REAR_MAX_SPEED = 29700
+FAN_PSU_MAX_SPEED = 26500
+FAN_SPEED_TOLERANCE = 25
+
+CPLD_REG_FANTRAY_BASE = 0x22
+FAN_FRONT_SID_BASE = 0x0D # IPMI Sensor ID
+FAN_REAR_SID_BASE = 0x45 # IPMI Sensor ID
+FAN_FRU_ID_BASE = 6
+PSU_FRU_ID_BASE = 3
+PSU_FAN_SID_BASE = {\
+    0: 0x33,\
+    1: 0x3D\
+}
 FAN_LED_OFF_CMD = "0x00"
 FAN_LED_GREEN_CMD = "0x01"
 FAN_LED_RED_CMD = "0x02"
 FAN1_LED_CMD = "0x04"
-FAN_PWM_REGISTER_START = 0x22
-FAN_PWM_REGISTER_STEP = 0x10
-FAN1_FRU_ID = 6
-
-NUM_OF_FAN_TRAY = 7
-PSU_FAN1_FRONT_SS_ID = "0x33"
+NUM_FAN_TRAY = 7
 
 
 class Fan(FanBase):
@@ -58,10 +57,24 @@ def __init__(self, fan_tray_index, fan_index=0, is_psu_fan=False, psu_index=0):
         self.fan_index = fan_index
         self.fan_tray_index = fan_tray_index
         self.is_psu_fan = is_psu_fan
+        self.name = None
         if self.is_psu_fan:
             self.psu_index = psu_index
+            self.index = NUM_FAN_TRAY * 2 + self.psu_index
+            self.max_speed = FAN_PSU_MAX_SPEED
+            self.sid_offset = PSU_FAN_SID_BASE[self.psu_index]
+        else:
+            self.index = self.fan_tray_index * 2 + self.fan_index
+            if fan_index % 2 == 0:
+                self.is_front = True
+                self.sid_offset = FAN_FRONT_SID_BASE + self.fan_tray_index
+                self.max_speed = FAN_FRONT_MAX_SPEED
+            else:
+                self.is_front = False
+                self.sid_offset = FAN_REAR_SID_BASE + self.fan_tray_index
+                self.max_speed = FAN_REAR_MAX_SPEED
+
         self._api_helper = APIHelper()
-        self.index = self.fan_tray_index * 2 + self.fan_index
 
     def get_direction(self):
         """
@@ -70,13 +83,30 @@ def get_direction(self):
             A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
             depending on fan direction
         """
-        direction = self.FAN_DIRECTION_EXHAUST
-        fan_direction_key = hex(self.fan_tray_index) if not self.is_psu_fan else hex(
-            self.psu_index + NUM_OF_FAN_TRAY)
-        status, raw_flow = self._api_helper.ipmi_raw(
-            IPMI_OEM_NETFN, IPMI_AIR_FLOW_CMD.format(fan_direction_key))
-        if status and raw_flow == "01":
-            direction = self.FAN_DIRECTION_INTAKE
+        direction = self.FAN_DIRECTION_NOT_APPLICABLE
+
+        if not self.is_psu_fan:
+            offset = hex(self.fan_tray_index)
+        else:
+            offset = hex(NUM_FAN_TRAY + self.psu_index)
+
+        status, output = self._api_helper.ipmi_raw(IPMI_OEM_NETFN,\
+                                                   IPMI_AIR_FLOW_CMD.format(offset))
+        if status:
+            if output == "00":
+                direction = self.FAN_DIRECTION_EXHAUST
+            elif output == "01":
+                direction = self.FAN_DIRECTION_INTAKE
+            elif self.is_psu_fan:
+                # Trying to deduce from PSU model
+                status, output = self._api_helper.ipmi_fru_id(PSU_FRU_ID_BASE + self.fan_tray_index,
+                                                              "Board Part Number")
+                if status and output:
+                    model = output.split(':')[-1].strip()
+                    if model == "TDPS1500AB7C":
+                        direction = self.FAN_DIRECTION_INTAKE
+                    elif model == "TDPS1500AB6E":
+                        direction = self.FAN_DIRECTION_EXHAUST
 
         return direction
 
@@ -86,24 +116,20 @@ def get_speed(self):
         Returns:
             An integer, the percentage of full fan speed, in the range 0 (off)
                  to 100 (full speed)
-
-        Note:
-            M = 150
-            Max F2B = 24700 RPM 
-            Max B2F = 29700 RPM
         """
+        speed = 0
 
-        max_rpm = MAX_OUTLET if self.fan_index % 2 == 0 else MAX_INLET
-        fan1_ss_start = FAN1_FRONT_SS_ID if self.fan_index % 2 == 0 else FAN1_REAR_SS_ID
-
-        ss_id = hex(int(fan1_ss_start, 16) + self.fan_tray_index) if not self.psu_index else hex(
-            int(PSU_FAN1_FRONT_SS_ID, 16) + self.fan_tray_index)
-        status, raw_ss_read = self._api_helper.ipmi_raw(
-            IPMI_SENSOR_NETFN, IPMI_FAN_SPEED_CMD.format(ss_id))
+        if not self.is_psu_fan:
+            multiplier = 150.0
+        else:
+            multiplier = 200.0
 
-        ss_read = raw_ss_read.split()[0]
-        rpm_speed = int(ss_read, 16)*150
-        speed = int(float(rpm_speed)/max_rpm * 100)
+        status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\
+                                                   IPMI_FAN_SPEED_CMD.format(self.sid_offset))
+        if status:
+            raw_speed = output.split()[0]
+            rpm_speed = int(raw_speed, 16) * multiplier
+            speed = int((rpm_speed/self.max_speed) * 100)
 
         return speed
 
@@ -120,8 +146,18 @@ def get_target_speed(self):
             0   : when PWM mode is use
             pwm : when pwm mode is not use
         """
-        target = 0
-        return target
+        if self.is_psu_fan:
+            # Ignored for tolerance check
+            return self.get_speed()
+
+        offset = hex(CPLD_REG_FANTRAY_BASE + (16 * self.fan_tray_index))
+        status, output = self._api_helper.ipmi_raw(IPMI_OEM_NETFN,\
+                                                   IPMI_FAN_SPEED_CPLD_CMD.format(offset))
+        if status:
+            fan_pwm = int(output, 16)
+            target_speed = int(fan_pwm / 255 * 100)
+
+        return target_speed
 
     def get_speed_tolerance(self):
         """
@@ -130,7 +166,8 @@ def get_speed_tolerance(self):
             An integer, the percentage of variance from target speed which is
                  considered tolerable
         """
-        return SPEED_TOLERANCE
+
+        return FAN_SPEED_TOLERANCE
 
     def set_speed(self, speed):
         """
@@ -140,29 +177,10 @@ def set_speed(self, speed):
                    in the range 0 (off) to 100 (full speed)
         Returns:
             A boolean, True if speed is set successfully, False if not
-        Notes:
-            pwm setting mode must set as Manual
-            manual: ipmitool raw 0x3a 0x06 0x01 0x0
-            auto: ipmitool raw 0x3a 0x06 0x01 0x1
         """
-        # ipmitool raw 0x3a 0x03 0x01 0x02 {register} {pwm_speed}
-        # register = 22 32 42 52 62 72 82
-
-        if self.is_psu_fan:
-            # TODO
-            return False
 
-        speed_hex = hex(int(float(speed)/100 * 255))
-        fan_register_hex = hex(FAN_PWM_REGISTER_START +
-                               (self.fan_tray_index*FAN_PWM_REGISTER_STEP))
-
-        set_speed_cmd = IPMI_SET_PWM.format(fan_register_hex, speed_hex)
-        status, set_speed_res = self._api_helper.ipmi_raw(
-            IPMI_OEM_NETFN, set_speed_cmd)
-
-        set_speed = False if not status else True
-
-        return set_speed
+        # FAN speed is controlled by BCM always
+        return False
 
     def set_status_led(self, color):
         """
@@ -180,7 +198,7 @@ def set_status_led(self, color):
         """
 
         if self.is_psu_fan:
-            # Not support
+            # Not supported for PSU
             return False
 
         led_cmd = {
@@ -208,9 +226,9 @@ def get_status_led(self):
             STATUS_LED_COLOR_RED = "red"
             STATUS_LED_COLOR_OFF = "off"
         """
-        if self.is_psu_fan:
-            # Not support
-            return self.STATUS_LED_COLOR_OFF
+        if not self.get_presence() or self.is_psu_fan:
+            # Not supported for PSU
+            return "N/A"
 
         fan_selector = hex(int(FAN1_LED_CMD, 16) + self.fan_tray_index)
         status, hx_color = self._api_helper.ipmi_raw(
@@ -224,16 +242,30 @@ def get_status_led(self):
 
         return status_led
 
+    ##############################################################
+    ###################### Device methods ########################
+    ##############################################################
+
     def get_name(self):
         """
         Retrieves the name of the device
             Returns:
             string: The name of the device
         """
-        fan_name = FAN_NAME_LIST[self.fan_tray_index*2 + self.fan_index] if not self.is_psu_fan else "PSU-{} FAN-{}".format(
-            self.psu_index+1, self.fan_index+1)
 
-        return fan_name
+        if not self.name:
+            if not self.is_psu_fan:
+                psu_name = ""
+                fan_id = " {}".format(self.fan_tray_index + 1)
+                fan_type = " Front" if self.is_front else " Rear"
+            else:
+                psu_name = "PSU {} ".format(self.psu_index + 1)
+                fan_id = " {}".format(self.fan_tray_index + 1)
+                fan_type = ""
+
+            self.name = FAN_NAME_TEMPLATE.format(psu_name, fan_id, fan_type)
+
+        return self.name
 
     def get_presence(self):
         """
@@ -241,13 +273,12 @@ def get_presence(self):
         Returns:
             bool: True if FAN is present, False if not
         """
-        if self.is_psu_fan:
-            return True
 
         presence = False
-        status, raw_present = self._api_helper.ipmi_raw(
+
+        status, output = self._api_helper.ipmi_raw(
             IPMI_OEM_NETFN, IPMI_FAN_PRESENT_CMD.format(hex(self.index)))
-        if status and raw_present == "00":
+        if status and output == "00":
             presence = True
 
         return presence
@@ -258,17 +289,13 @@ def get_model(self):
         Returns:
             string: Model/part number of device
         """
-        if self.is_psu_fan:
-            return "Unknown"
-
-        model = "Unknown"
-        ipmi_fru_idx = self.fan_tray_index + FAN1_FRU_ID
-        status, raw_model = self._api_helper.ipmi_fru_id(
-            ipmi_fru_idx, IPMI_FRU_MODEL_KEY)
+        model = "N/A"
 
-        fru_pn_list = raw_model.split()
-        if len(fru_pn_list) > 4:
-            model = fru_pn_list[4]
+        if not self.is_psu_fan:
+            status, output = self._api_helper.ipmi_fru_id(FAN_FRU_ID_BASE + self.fan_tray_index,
+                                                          "Board Part Number")
+            if status and output:
+                model = output.split(':')[-1].strip()
 
         return model
 
@@ -278,17 +305,13 @@ def get_serial(self):
         Returns:
             string: Serial number of device
         """
-        if self.is_psu_fan:
-            return "Unknown"
-
-        serial = "Unknown"
-        ipmi_fru_idx = self.fan_tray_index + FAN1_FRU_ID
-        status, raw_model = self._api_helper.ipmi_fru_id(
-            ipmi_fru_idx, IPMI_FRU_SERIAL_KEY)
+        serial = "N/A"
 
-        fru_sr_list = raw_model.split()
-        if len(fru_sr_list) > 3:
-            serial = fru_sr_list[3]
+        if not self.is_psu_fan:
+            status, output = self._api_helper.ipmi_fru_id(FAN_FRU_ID_BASE + self.fan_tray_index,
+                                                          "Board Serial")
+            if status and output:
+                serial = output.split(':')[-1].strip()
 
         return serial
 
@@ -299,3 +322,24 @@ def get_status(self):
             A boolean value, True if device is operating properly, False if not
         """
         return self.get_presence() and self.get_speed() > 0
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device.
+        If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of
+        entPhysicalContainedIn is'0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device
+            or -1 if cannot determine the position
+        """
+
+        return self.fan_index + 1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return True if not self.is_psu_fan else False
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/fan_drawer.py
new file mode 100644
index 000000000000..a7e5f167ad79
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/fan_drawer.py
@@ -0,0 +1,108 @@
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the the Fan-Drawers' information available in the platform
+#
+#############################################################################
+
+try:
+    from sonic_platform_base.fan_drawer_base import FanDrawerBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+NUM_FAN = 2
+
+
+class FanDrawer(FanDrawerBase):
+    def __init__(self, fantray_index):
+        FanDrawerBase.__init__(self)
+        self._index = fantray_index + 1
+        self._init_fan(fantray_index)
+
+    def _init_fan(self, fantray_index):
+        from sonic_platform.fan import Fan
+        for index in range(NUM_FAN):
+            fan = Fan(fantray_index, index)
+            self._fan_list.append(fan)
+
+    def set_status_led(self, color):
+        """
+        Sets the state of the fan drawer status LED
+        Args:
+            color: A string representing the color with which to set the
+                   fan drawer status LED
+        Returns:
+            bool: True if status LED state is set successfully, False if not
+        """
+        return self._fan_list[0].set_status_led(color)
+
+    def get_status_led(self):
+        """
+        Gets the state of the fan drawer LED
+        Returns:
+            A string, one of the predefined STATUS_LED_COLOR_* strings above
+        """
+        return self._fan_list[0].get_status_led()
+
+    ##############################################################
+    ###################### Device methods ########################
+    ##############################################################
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+        Returns:
+            string: The name of the device
+        """
+        return "Drawer {}".format(self._index)
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the device
+        Returns:
+            bool: True if device is present, False if not
+        """
+        return self._fan_list[0].get_presence()
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+        Returns:
+            string: Model/part number of device
+        """
+        return self._fan_list[0].get_model()
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+        Returns:
+            string: Serial number of device
+        """
+        return self._fan_list[0].get_serial()
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the device
+        Returns:
+            A boolean value, True if device is operating properly, False if not
+        """
+        return self._fan_list[0].get_status()
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device
+        Returns:
+            integer: The 1-based relative physical position in parent device
+        """
+        return self._index
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return True
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/helper.py
new file mode 100644
index 000000000000..3e2cb798df91
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/helper.py
@@ -0,0 +1,190 @@
+import fcntl
+import os
+import struct
+import subprocess
+import fcntl
+
+from mmap import *
+from sonic_py_common.general import check_output_pipe
+from sonic_py_common.device_info import get_platform_and_hwsku
+
+from sonic_py_common import device_info
+
+HOST_CHK_CMD = "docker > /dev/null 2>&1"
+EMPTY_STRING = ""
+
+
+class APIHelper():
+
+    def __init__(self):
+        (self.platform, self.hwsku) = get_platform_and_hwsku()
+
+    def is_host(self):
+        ret,data = subprocess.getstatusoutput(HOST_CHK_CMD)
+        if ret != 0:
+            return False
+        return True
+
+    def pci_get_value(self, resource, offset):
+        status = True
+        result = ""
+        try:
+            fd = os.open(resource, os.O_RDWR)
+            mm = mmap(fd, 0)
+            mm.seek(int(offset))
+            read_data_stream = mm.read(4)
+            result = struct.unpack('I', read_data_stream)
+        except:
+            status = False
+        return status, result
+
+    def run_command(self, cmd1_args, cmd2_args=None):
+        status = True
+        result = ""
+        args = [cmd1_args] + ([cmd2_args] if cmd2_args is not None else [])
+        try:
+            result = check_output_pipe(*args)
+        except subprocess.CalledProcessError:
+            status = False
+        return status, result
+
+    def run_interactive_command(self, cmd):
+        try:
+            subprocess.call(cmd)
+        except:
+            return False
+        return True
+
+    def read_txt_file(self, file_path):
+        try:
+            with open(file_path, 'r') as fd:
+                data = fd.read()
+                return data.strip()
+        except IOError:
+            pass
+        return None
+
+    def read_one_line_file(self, file_path):
+        try:
+            with open(file_path, 'r') as fd:
+                data = fd.readline()
+                return data.strip()
+        except IOError:
+            pass
+        return None
+
+    def write_txt_file(self, file_path, value):
+        try:
+            with open(file_path, 'w') as fd:
+                fd.write(str(value))
+        except Exception:
+            return False
+        return True
+
+    def get_cpld_reg_value(self, getreg_path, register):
+        cmd = "echo {1} > {0}; cat {0}".format(getreg_path, register)
+        status, result = self.run_command(cmd)
+        return result if status else None
+
+    def ipmi_raw(self, netfn, cmd):
+        status = True
+        result = ""
+        cmd = "ipmitool raw {} {}".format(netfn, cmd)
+        ret, data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            status = False
+        else:
+            result = data.strip()
+        
+        return status, result
+
+    def ipmi_fru_id(self, id, key=None):
+        status = True
+        result = ""
+        cmd1_args = ["ipmitool", "fru", "print", str(id)]
+        if not key:
+            ret, data = subprocess.getstatusoutput(cmd)
+            if ret != 0:
+                status = False
+            else:
+                result = data.strip()
+        else:
+            cmd2_args = ["grep", str(key)]
+            status, result = self.run_command(cmd1_args, cmd2_args)
+        return status, result
+
+    def ipmi_set_ss_thres(self, id, threshold_key, value):
+        status = True
+        result = ""
+        cmd = "ipmitool sensor thresh '{}' {} {}".format(
+            str(id), str(threshold_key), str(value))
+        ret, data = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            status = False
+        else:
+            result = data.strip()
+        
+        return status, result
+
+    def lpc_getreg(self, getreg_path, reg):
+        """
+        Get the cpld reg through lpc interface
+
+        Args:
+            getreg_path: getreg sysfs path
+            reg: 16 bits reg addr in hex str format
+
+        Returns:
+            A str, register value in hex str format
+        """
+        try:
+            file = open(getreg_path, 'w+')
+            # Acquire an exclusive lock on the file
+            fcntl.flock(file, fcntl.LOCK_SH)
+
+            file.write(reg)
+            file.flush()
+
+            # Seek to the beginning of the file
+            file.seek(0)
+
+            # Read the content of the file
+            result = file.readline().strip()
+        except (OSError, IOError, FileNotFoundError):
+            result = None
+        finally:
+            # Release the lock and close the file
+            fcntl.flock(file, fcntl.LOCK_UN)
+            file.close()
+
+        return result
+
+    def lpc_setreg(self, setreg_path, reg, val):
+        """
+        Set the cpld reg through lpc interface
+
+        Args:
+            setreg_path: setreg sysfs path
+            reg: 16 bits reg addr in hex str format
+            val: 8 bits register value in hex str format
+
+        Returns:
+            A boolean, True if speed is set successfully, False if not
+        """
+        status = True
+        try:
+            file = open(setreg_path, 'w')
+            # Acquire an exclusive lock on the file
+            fcntl.flock(file, fcntl.LOCK_EX)
+
+            data = "{} {}".format(reg, val)
+            file.write(data)
+            file.flush()
+        except (OSError, IOError, FileNotFoundError):
+            status = False
+        finally:
+            # Release the lock and close the file
+            fcntl.flock(file, fcntl.LOCK_UN)
+            file.close()
+
+        return status
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/pcie.py
new file mode 100644
index 000000000000..0f8bc0830384
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/pcie.py
@@ -0,0 +1,15 @@
+#
+# pcie_base.py
+#
+# Abstract base class for implementing platform-specific
+#  PCIE functionality for SONiC
+#
+
+try:
+    from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil
+except ImportError as e:
+    raise ImportError (str(e) + " - required module not found")
+
+class Pcie(PcieUtil):
+    def __init__(self, platform_path):
+        PcieUtil.__init__(self, platform_path)
diff --git a/device/celestica/x86_64-cel_silverstone-r0/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/platform.py
similarity index 100%
rename from device/celestica/x86_64-cel_silverstone-r0/sonic_platform/platform.py
rename to platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/platform.py
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/psu.py
new file mode 100644
index 000000000000..ced1022796de
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/psu.py
@@ -0,0 +1,338 @@
+#############################################################################
+# Celestica
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the PSUs status which are available in the platform
+#
+#############################################################################
+
+try:
+    from sonic_platform_base.psu_base import PsuBase
+    from .helper import APIHelper
+    from sonic_platform.fan import Fan
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+IPMI_SENSOR_NETFN = "0x04"
+IPMI_SENSOR_READ_CMD = "0x2D {}"
+IPMI_SENSOR_THRESH_CMD = "0x27 {}"
+IPMI_FRU_MODEL_KEY = "Board Part Number"
+IPMI_FRU_SERIAL_KEY = "Board Serial"
+
+PSU_LED_OFF_CMD = "0x00"
+PSU_LED_GREEN_CMD = "0x01"
+PSU_LED_AMBER_CMD = "0x02"
+
+psu_ipmi_id = {\
+    1: {\
+        "TEMP": "0x34",\
+        "VOUT": "0x36",\
+        "COUT": "0x37",\
+        "POUT": "0x38",\
+        "STATUS": "0x2f",\
+        "FRU": 3,\
+    },
+    2: {\
+        "TEMP": "0x3E",\
+        "VOUT": "0x40",\
+        "COUT": "0x41",\
+        "POUT": "0x42",\
+        "STATUS": "0x39",\
+        "FRU": 4,\
+    }
+}
+
+ANALOG_READ_OFFSET = 0
+EVENT_0_7_OFFSET = 2
+EVENT_8_14_OFFSET = 3
+
+FRU_SERIAL = 3
+FRU_MODEL = 4
+
+TH_LNC = 0 # Low Non-critical threshold
+TH_LCR = 1 # Low Critical threshold
+TH_LNR = 2 # Low Non-recoverable threshold
+TH_HNC = 3 # High Non-critical threshold
+TH_HCR = 4 # High Critical threshold
+TH_HNR = 5 # High Non-recoverable threshold
+
+PSU_VOUT_SS_ID = ["0x36", "0x40"]
+PSU_COUT_SS_ID = ["0x37", "0x41"]
+PSU_POUT_SS_ID = ["0x38", "0x42"]
+PSU_STATUS_REG = ["0x39", "0x2f"]
+
+
+class Psu(PsuBase):
+    """Platform-specific Psu class"""
+
+    def __init__(self, psu_index):
+        PsuBase.__init__(self)
+        self.index = psu_index+1
+        # PSU has only one FAN
+        fan = Fan(0, 0, is_psu_fan=True, psu_index=psu_index)
+        self._fan_list.append(fan)
+        self._api_helper = APIHelper()
+
+    def get_voltage(self):
+        """
+        Retrieves current PSU voltage output
+        Returns:
+            A float number, the output voltage in volts,
+            e.g. 12.1
+        """
+        psu_voltage = 0.0
+        psu_vout_key = psu_ipmi_id[self.index]['VOUT']
+        status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\
+                                                   IPMI_SENSOR_READ_CMD.format(psu_vout_key))
+        value = output.split()[ANALOG_READ_OFFSET]
+        # Formula: Rx6x10^-2
+        psu_voltage = int(value, 16) * 6 / 100.0
+
+        return psu_voltage
+
+    def get_current(self):
+        """
+        Retrieves present electric current supplied by PSU
+        Returns:
+            A float number, the electric current in amperes, e.g 15.4
+        """
+        psu_current = 0.0
+        psu_cout_key = psu_ipmi_id[self.index]['COUT']
+        status, output = self._api_helper.ipmi_raw(
+            IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_cout_key))
+        value = output.split()[ANALOG_READ_OFFSET]
+        # Formula: Rx57x10^-2
+        psu_current = int(value, 16) * 57 / 100.0
+
+        return psu_current
+
+    def get_power(self):
+        """
+        Retrieves current energy supplied by PSU
+        Returns:
+            A float number, the power in watts, e.g. 302.6
+        """
+        psu_power = 0.0
+        psu_pout_key = psu_ipmi_id[self.index]['POUT']
+        status, output = self._api_helper.ipmi_raw(
+            IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pout_key))
+        value = output.split()[ANALOG_READ_OFFSET]
+        # Formula: Rx68x10^-1
+        psu_power = int(value, 16) * 68 / 10.0
+
+        return psu_power
+
+    def get_powergood_status(self):
+        """
+        Retrieves the powergood status of PSU
+        Returns:
+            A boolean, True if PSU has stablized its output voltages and passed all
+            its internal self-tests, False if not.
+        """
+        return self.get_status()
+
+    def get_status_led(self):
+        """
+        Gets the state of the PSU status LED
+        Returns:
+            A string, one of the predefined STATUS_LED_COLOR_* strings above
+        """
+        if not self.get_presence():
+            return "N/A"
+
+        if self.get_powergood_status():
+            return self.STATUS_LED_COLOR_GREEN
+
+        return self.STATUS_LED_COLOR_OFF
+
+    def __get_sensor_threshold(self, sensor_id, th_offset):
+        status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\
+                                                   IPMI_SENSOR_THRESH_CMD.format(sensor_id))
+        if status:
+            value = output.split()
+            if (int(value[0],16) >> th_offset) & 0x01 == 0x01:
+                return value[th_offset + 1]
+
+        raise NotImplementedError
+
+    def get_temperature(self):
+        """
+        Retrieves current temperature reading from PSU
+        Returns:
+            A float number of current temperature in Celsius up to nearest thousandth
+            of one degree Celsius, e.g. 30.125
+        """
+        # PSU's ambient temperature sensor is considered as the PSU temperature
+        psu_temp = 0.0
+        psu_temp_id = psu_ipmi_id[self.index]['TEMP']
+        status, output = self._api_helper.ipmi_raw(IPMI_SENSOR_NETFN,\
+                                                   IPMI_SENSOR_READ_CMD.format(psu_temp_id))
+        if status:
+            value = output.split()[ANALOG_READ_OFFSET]
+            psu_temp = float(int(value, 16))
+
+        return psu_temp
+
+    def get_temperature_high_threshold(self):
+        """
+        Retrieves the high threshold temperature of PSU
+        Returns:
+            A float number, the high threshold temperature of PSU in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        # Using critical-high as high threshold
+
+        value = self.__get_sensor_threshold(psu_ipmi_id[self.index]['TEMP'], TH_HCR)
+        psu_temp_high_threshold = float(int(value, 16))
+
+        return psu_temp_high_threshold
+
+    def get_voltage_high_threshold(self):
+        """
+        Retrieves the high threshold PSU voltage output
+        Returns:
+            A float number, the high threshold output voltage in volts,
+            e.g. 12.1
+        """
+        # Using critical-high as high threshold
+
+        value = self.__get_sensor_threshold(psu_ipmi_id[self.index]['VOUT'], TH_HCR)
+        # Formula: Rx6x10^-2
+        psu_voltage_high_crit = int(value, 16) * 6 / 100.0
+
+        return psu_voltage_high_crit
+
+    def get_voltage_low_threshold(self):
+        """
+        Retrieves the low threshold PSU voltage output
+        Returns:
+            A float number, the low threshold output voltage in volts,
+            e.g. 12.1
+        """
+        # Using critical-low as low threshold
+
+        value = self.__get_sensor_threshold(psu_ipmi_id[self.index]['VOUT'], TH_LCR)
+        # Formula: Rx6x10^-2
+        psu_voltage_low_crit = int(value, 16) * 6 / 100.0
+
+        return psu_voltage_low_crit
+
+    def get_maximum_supplied_power(self):
+        """
+        Retrieves the maximum supplied power by PSU
+        Returns:
+            A float number, the maximum power output in Watts.
+            e.g. 1200.1
+        """
+        # Using critical-high as the maximum available safe power limit
+
+        value = self.__get_sensor_threshold(psu_ipmi_id[self.index]['POUT'], TH_HCR)
+        # Formula: Rx12x10^0
+        psu_power_high_crit = int(value, 16) * 12.0
+
+        return psu_power_high_crit
+
+    ##############################################################
+    ###################### Device methods ########################
+    ##############################################################
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+            Returns:
+            string: The name of the device
+        """
+        return "PSU {}".format(self.index)
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the PSU
+        Returns:
+            bool: True if PSU is present, False if not
+        """
+        psu_presence = False
+        psu_pstatus_key = psu_ipmi_id[self.index]['STATUS']
+        status, raw_status_read = self._api_helper.ipmi_raw(
+            IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pstatus_key))
+        status_byte = raw_status_read.split()[EVENT_0_7_OFFSET]
+
+        if status:
+            psu_presence = True if int(status_byte, 16) & 0x01 == 0x01 else False
+
+        return psu_presence
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+        Returns:
+            string: Model/part number of device
+        """
+        model = "Unknown"
+        if self.get_presence():
+            ipmi_fru_idx = psu_ipmi_id[self.index]['FRU']
+            status, raw_model = self._api_helper.ipmi_fru_id(
+                ipmi_fru_idx, IPMI_FRU_MODEL_KEY)
+
+            fru_pn_list = raw_model.split()
+            if len(fru_pn_list) > FRU_MODEL:
+                model = fru_pn_list[FRU_MODEL]
+        else:
+            model = "N/A"
+
+        return model
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+        Returns:
+            string: Serial number of device
+        """
+        serial = "Unknown"
+        if self.get_presence():
+            ipmi_fru_idx = psu_ipmi_id[self.index]['FRU']
+            status, raw_model = self._api_helper.ipmi_fru_id(
+                ipmi_fru_idx, IPMI_FRU_SERIAL_KEY)
+
+            fru_sr_list = raw_model.split()
+            if len(fru_sr_list) > FRU_SERIAL:
+                serial = fru_sr_list[FRU_SERIAL]
+        else:
+            model = "N/A"
+
+        return serial
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the device
+        Returns:
+            A boolean value, True if device is operating properly, False if not
+        """
+        psu_status = False
+        psu_pstatus_key = psu_ipmi_id[self.index]['STATUS']
+        status, raw_status_read = self._api_helper.ipmi_raw(
+            IPMI_SENSOR_NETFN, IPMI_SENSOR_READ_CMD.format(psu_pstatus_key))
+        status_byte = raw_status_read.split()[EVENT_0_7_OFFSET]
+
+        if status:
+            failure_detected = True if int(status_byte, 16) & 0x02 == 0x02 else False
+            input_lost = True if int(status_byte, 16) & 0x08 == 0x08 else False
+            psu_status = False if (input_lost or failure_detected) else True
+
+        return psu_status
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return self.index
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return True
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/sfp.py
new file mode 100644
index 000000000000..204ee659f91d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/sfp.py
@@ -0,0 +1,232 @@
+#!/usr/bin/env python
+
+#############################################################################
+# Celestica
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the sfp status which are available in the platform
+#
+#############################################################################
+
+import time
+
+try:
+    from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase
+    from .helper import APIHelper
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+SFP_I2C_START = 10
+I2C_EEPROM_PATH = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'
+RESET_PATH = '/sys/devices/platform/cls-xcvr/hwmon/hwmon{0}/qsfp_resetL'
+LP_PATH = '/sys/devices/platform/cls-xcvr/hwmon/hwmon{0}/qsfp_lpmode'
+PRS_PATH = '/sys/devices/platform/cls-xcvr/hwmon/hwmon{0}/qsfp_modprsL'
+
+
+class Sfp(SfpOptoeBase):
+    """Platform-specific SfpOptoe class"""
+
+    def __init__(self, sfp_index=0, sfp_name=None):
+        SfpOptoeBase.__init__(self)
+
+        self.index = sfp_index + 1
+        self._api_helper = APIHelper()
+        self._name = sfp_name
+        self._sfp_type = None
+
+    def _detect_sfp_type(self):
+        sfp_type = 'N/A'
+        info = self.get_transceiver_info()
+        if info:
+            sfp_type = info.get("type_abbrv_name")
+        # XXX: Need this hack until xcvrd is refactored
+        if sfp_type in ["OSFP-8X", "QSFP-DD"]:
+            sfp_type = "QSFP_DD"
+        return sfp_type
+
+    @property
+    def sfp_type(self):
+        if self._sfp_type is None:
+            self._sfp_type = self._detect_sfp_type()
+        return self._sfp_type
+
+    def get_eeprom_path(self):
+        port_to_i2c_mapping = SFP_I2C_START + self.index - 1
+        port_eeprom_path = I2C_EEPROM_PATH.format(port_to_i2c_mapping)
+        return port_eeprom_path
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+            Returns:
+            string: The name of the device
+        """
+        return self._name
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the device
+        Returns:
+            A boolean value, True if device is operating properly, False if not
+        """
+        if not self.get_presence():
+            return False
+        reset = self.get_reset_status()
+        if reset:
+            status = False
+        else:
+            status = True
+        return status
+
+    def get_reset_status(self):
+        """
+        Retrieves the reset status of SFP
+        Returns:
+            A Boolean, True if reset enabled, False if disabled
+        """
+        reset_status_raw = self._api_helper.read_txt_file(
+            RESET_PATH.format((self.index))).rstrip()
+        if not reset_status_raw:
+            return False
+
+        reg_value = int(reset_status_raw, 16)
+        bin_format = bin(reg_value)[2:].zfill(32)
+        return bin_format[::-1][self.index - 1] == '0'
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the PSU
+        Returns:
+            bool: True if PSU is present, False if not
+        """
+        presence_status_raw = self._api_helper.read_txt_file(
+            PRS_PATH.format((self.index))).rstrip()
+        
+        if not presence_status_raw:
+            return False
+
+        content = presence_status_raw.rstrip()
+        reg_value = int(content, 16)
+
+        
+        # Mask absent
+        absence_mask = 0x1
+
+        # ModPrsL is active low
+        if reg_value & absence_mask == 0:
+            return True
+
+        return False
+
+    def get_lpmode(self):
+        """
+        Retrieves the lpmode (low power mode) status of this SFP
+        Returns:
+            A Boolean, True if lpmode is enabled, False if disabled
+        """
+        try:
+            with open(LP_PATH.format((self.index))) as reg_file:
+                content = reg_file.readline().rstrip()
+                lpmode = int(content, 16)
+        except (ValueError, IOError) as e:
+            return False
+
+        # check LPMode is active low
+        if lpmode == 0:
+            return False
+
+        return True
+
+    def reset(self):
+        """
+        Reset SFP and return all user module settings to their default srate.
+        Returns:
+            A boolean, True if successful, False if not
+        """
+        # Check for invalid port_num
+
+        try:
+            reg_file = open(RESET_PATH.format((self.index)), "r+")
+        except IOError as e:
+            print("Error: unable to open file: %s" % str(e))
+            return False
+
+        content = reg_file.readline().rstrip()
+
+        # File content is a string containing the hex representation of the
+        # register
+        reg_value = int(content, 16)
+
+        # Determind if port_num start from 1 or 0
+        bit_index = self.index - 1
+
+        # Mask off the bit corresponding to our port
+        mask = (1 << bit_index)
+
+        # ResetL is active low
+        reg_value = reg_value & ~mask
+
+        # Convert our register value back to a hex string and write back
+        reg_file.seek(0)
+        reg_file.write(hex(reg_value).rstrip('L'))
+        reg_file.close()
+
+        # Sleep 1 second to allow it to settle
+        time.sleep(1)
+
+        # Flip the bit back high and write back to the register
+        # to take port out of reset
+        try:
+            reg_file = open(RESET_PATH.format((self.index)), "w")
+        except IOError as e:
+            print("Error: unable to open file: %s" % str(e))
+            return False
+
+        reg_value = reg_value | mask
+        reg_file.seek(0)
+        reg_file.write(hex(reg_value).rstrip('L'))
+        reg_file.close()
+
+        return True
+
+    def set_lpmode(self, lpmode):
+        """
+        Sets the lpmode (low power mode) of SFP
+        Args:
+            lpmode: A Boolean, True to enable lpmode, False to disable it
+            Note  : lpmode can be overridden by set_power_override
+        Returns:
+            A boolean, True if lpmode is set successfully, False if not
+        """
+        try:
+            with open(LP_PATH.format((self.index)), "r+") as reg_file:
+                reg_file.seek(0)
+                content = hex(lpmode)
+                reg_file.write(content)
+        except IOError as e:
+            return False
+
+        return True
+
+    def get_error_description(self):
+        """
+        Retrives the error descriptions of the SFP module
+        Returns:
+            String that represents the current error descriptions of
+            vendor specific errors
+            In case there are multiple errors, they should be joined by '|',
+            like: "Bad EEPROM|Unsupported cable"
+        """
+        if self.sfp_type == "QSFP_DD":
+            return super().get_error_description()
+
+        if not self.get_presence():
+            return self.SFP_STATUS_UNPLUGGED
+        return self.SFP_STATUS_OK
+
+    def get_position_in_parent(self):
+        return self.index
+
+    def is_replaceable(self):
+        return True
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/thermal.py
new file mode 100644
index 000000000000..9f0c9e17adfa
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/thermal.py
@@ -0,0 +1,205 @@
+#############################################################################
+# Celestica
+#
+# Thermal contains an implementation of SONiC Platform Base API and
+# provides the thermal device status which are available in the platform
+#
+#############################################################################
+
+import os
+import re
+import os.path
+
+try:
+    from sonic_platform_base.thermal_base import ThermalBase
+    from .helper import APIHelper
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+IPMI_SENSOR_NETFN = "0x04"
+IPMI_SS_READ_CMD = "0x2D {}"
+IPMI_SS_THRESHOLD_CMD = "0x27 {}"
+HIGH_TRESHOLD_SET_KEY = "unc"
+DEFAULT_VAL = 'N/A'
+
+class Thermal(ThermalBase):
+    """Platform-specific Thermal class"""
+
+    def __init__(self, thermal_index):
+        ThermalBase.__init__(self)
+        self._api_helper = APIHelper()
+        self.index = thermal_index
+        thermal_list = [\
+            ('TEMP_FAN_U52',     '0x00', 'Fanboard Center Temp'),\
+            ('TEMP_FAN_U17',     '0x01', 'Fanboard Right Temp'),\
+            ('TEMP_SW_U52',      '0x02', 'Switchboard Left Temp'),\
+            ('TEMP_SW_U16',      '0x03', 'Switchboard Right Temp'),\
+            ('TEMP_BB_U3',       '0x04', 'Baseboard Temp'),\
+            ('TEMP_CPU',         '0x05', 'CPU Internal Temp'),\
+            ('TEMP_SW_Internal', '0x61', 'ASIC Internal Temp'),\
+            ('SW_U04_Temp',      '0x4F', 'IR35215 Chip Left Temp'),\
+            ('SW_U14_Temp',      '0x56', 'IR35215 Chip Right Temp'),\
+            ('SW_U4403_Temp',    '0x5D', 'IR3584 Chip Temp'),\
+            ('PSU1_Temp1',       '0x34', 'PSU 1 Ambient Temp'),\
+            ('PSU1_Temp2',       '0x35', 'PSU 1 Hotspot Temp'),\
+            ('PSU2_Temp1',       '0x3E', 'PSU 2 Ambient Temp'),\
+            ('PSU2_Temp2',       '0x3F', 'PSU 2 Hotspot Temp'),\
+        ]
+        self.sensor_id = thermal_list[self.index][0]
+        self.sensor_reading_addr = thermal_list[self.index][1]
+        self.sensor_name = thermal_list[self.index][2]
+
+        temp = self.get_temperature(True)
+        self.minimum_thermal = temp
+        self.maximum_thermal = temp
+
+    def get_temperature(self, skip_record=False):
+        """
+        Retrieves current temperature reading from thermal
+        Returns:
+            A float number of current temperature in Celsius up to nearest thousandth
+            of one degree Celsius, e.g. 30.125
+        """
+        temperature = 0.0
+        status, raw_ss_read = self._api_helper.ipmi_raw(
+            IPMI_SENSOR_NETFN, IPMI_SS_READ_CMD.format(self.sensor_reading_addr))
+        if status and len(raw_ss_read.split()) > 0:
+            ss_read = raw_ss_read.split()[0]
+            temperature = float(int(ss_read, 16))
+
+        if temperature != 0.0:
+            if not skip_record:
+                # Record maximum
+                if temperature > self.maximum_thermal:
+                    self.maximum_thermal = temperature
+
+                # Record minimum
+                if temperature < self.minimum_thermal:
+                    self.minimum_thermal = temperature
+
+            return temperature
+        else:
+            return DEFAULT_VAL
+
+    def get_high_threshold(self):
+        """
+        Retrieves the high threshold temperature of thermal
+        Returns:
+            A float number, the high threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        high_threshold = 0.0
+        status, raw_up_thres_read = self._api_helper.ipmi_raw(
+            IPMI_SENSOR_NETFN, IPMI_SS_THRESHOLD_CMD.format(self.sensor_reading_addr))
+        if status and len(raw_up_thres_read.split()) > 6:
+            ss_read = raw_up_thres_read.split()[4]
+            high_threshold = float(int(ss_read, 16))
+        if high_threshold != 0.0:
+            return high_threshold
+        else:
+            return DEFAULT_VAL
+
+    def get_low_threshold(self):
+        """
+        Retrieves the low threshold temperature of thermal
+        Returns:
+            A float number, the low threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        return DEFAULT_VAL
+
+    def set_high_threshold(self, temperature):
+        """
+        Sets the high threshold temperature of thermal
+        Args :
+            temperature: A float number up to nearest thousandth of one degree Celsius,
+            e.g. 30.125
+        Returns:
+            A boolean, True if threshold is set successfully, False if not
+        """
+        status, ret_txt = self._api_helper.ipmi_set_ss_thres(
+            self.sensor_id, HIGH_TRESHOLD_SET_KEY, temperature)
+        return status
+
+    def set_low_threshold(self, temperature):
+        """
+        Sets the low threshold temperature of thermal
+        Args :
+            temperature: A float number up to nearest thousandth of one degree Celsius,
+            e.g. 30.125
+        Returns:
+            A boolean, True if threshold is set successfully, False if not
+        """
+        return False
+
+    def get_high_critical_threshold(self):
+        """
+        Retrieves the high critical threshold temperature of thermal
+        Returns:
+            A float number, the high critical threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        high_critical_threshold = 0.0
+        status, raw_up_thres_read = self._api_helper.ipmi_raw(
+            IPMI_SENSOR_NETFN, IPMI_SS_THRESHOLD_CMD.format(self.sensor_reading_addr))
+        if status and len(raw_up_thres_read.split()) > 6:
+            ss_read = raw_up_thres_read.split()[5]
+            high_critical_threshold = float(int(ss_read, 16))
+        if high_critical_threshold != 0.0:
+            return high_critical_threshold
+        else:
+            return DEFAULT_VAL
+
+    def get_minimum_recorded(self):
+        """
+        Retrieves the minimum recorded temperature of thermal
+        Returns:
+            A float number, the minimum recorded temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        return self.minimum_thermal
+
+    def get_maximum_recorded(self):
+        """
+        Retrieves the maximum recorded temperature of thermal
+        Returns:
+            A float number, the maximum recorded temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        return self.maximum_thermal
+
+    ##############################################################
+    ###################### Device methods ########################
+    ##############################################################
+
+    def get_name(self):
+        """
+        Retrieves the name of the thermal device
+            Returns:
+            string: The name of the thermal device
+        """
+        return self.sensor_name
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the device
+        Returns:
+            bool: True if device is present, False if not
+        """
+        return True if self.get_temperature() > 0 else False
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the device
+        Returns:
+            A boolean value, True if device is operating properly, False if not
+        """
+        return self.get_presence()
+
+    def is_replaceable(self):
+        """
+        Retrieves whether thermal module is replaceable
+        Returns:
+            A boolean value, True if replaceable, False if not
+        """
+        return False
diff --git a/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/watchdog.py
new file mode 100644
index 000000000000..011759b0f457
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-cel/silverstone/sonic_platform/watchdog.py
@@ -0,0 +1,247 @@
+#############################################################################
+# Celestica Silverstone
+#
+# Watchdog contains an implementation of SONiC Platform Base API
+#
+#############################################################################
+import os
+import time
+import ctypes
+import fcntl
+import subprocess
+import array
+import syslog
+
+try:
+    from sonic_platform_base.watchdog_base import WatchdogBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+PLATFORM_CPLD_PATH = '/sys/devices/platform/baseboard-lpc/'
+WDT_TIMER_REG = '0xA181'
+WDT_ENABLE_REG = '0xA182'
+WDT_FEED_REG = '0xA183'
+WDT_REMAINTIME_REG1 = '0xA185'
+WDT_REMAINTIME_REG2 = '0xA186'
+ENABLE_CMD = 0x1
+DISABLE_CMD = 0x0
+WDT_COMMON_ERROR = -1
+
+
+class Watchdog(WatchdogBase):
+
+    timeout = 0
+
+    def __init__(self):
+        WatchdogBase.__init__(self)
+
+        # Set default value
+        #self._disable()
+        #self.timeout = self._gettimeout()
+        self.keepalive = int(1)
+
+    def _get_lpc_reg(self, reg):
+        file_path = os.path.join(PLATFORM_CPLD_PATH, 'getreg')
+        status = True
+        value = None
+
+        try:
+            with open(file_path, "r+") as fd:
+                fd.seek(0)
+                fd.write(reg)
+        except IOError as e:
+            syslog.syslog(syslog.LOG_ERR, "Unable to access file: {}".format(e))
+            return False, None
+        try:
+            with open(file_path) as fd:
+                value = fd.readline().rstrip()
+        except IOError as e:
+            syslog.syslog(syslog.LOG_ERR, "Unable to access file: {}".format(e))
+            return False, None
+        return True, value
+
+    def _set_lpc_reg(self, reg, val):
+        file_path = os.path.join(PLATFORM_CPLD_PATH, 'setreg')
+        value = '{} {}'.format(reg, hex(val))
+
+        try:
+            with open(file_path, 'w') as fd:
+                fd.write(str(value))
+        except Exception:
+            return False
+        return True
+
+    def _enable(self):
+        """
+        Turn on the watchdog timer
+        """
+        # echo 0xA182 0x1 > /sys/devices/platform/baseboard-lpc/setreg
+        status = self._set_lpc_reg(WDT_ENABLE_REG, ENABLE_CMD)
+
+        if not status:
+            return False
+
+        return True
+
+    def _disable(self):
+        """
+        Trun off the watchdog timer
+        """
+        # echo 0xA182 0x0 > /sys/devices/platform/baseboard-lpc/setreg
+        status = self._set_lpc_reg(WDT_ENABLE_REG, DISABLE_CMD)
+        if not status:
+            return False
+
+        return True
+
+    def _keepalive(self):
+        """
+        Keep alive watchdog timer
+        """
+        if bool(self.keepalive % 2):
+            status = self._set_lpc_reg(WDT_FEED_REG, ENABLE_CMD)
+        else:
+            status = self._set_lpc_reg(WDT_FEED_REG, DISABLE_CMD)
+
+        if not status:
+            syslog.syslog(syslog.LOG_ERR, "Feed Watchdog failed")
+
+        self.keepalive = self.keepalive+1
+        if (self.keepalive >= 11):
+            self.keepalive = 1
+
+    def _settimeout(self, seconds):
+        """
+        set watchdog timer timeout
+        @param seconds - timeout in seconds
+        @return is the actual set timeout
+        """
+        second_int = {
+            30: 1,
+            60: 2,
+            180: 3,
+            240: 4,
+            300: 5,
+            420: 6,
+            600: 7,
+        }.get(seconds)
+
+        status = self._set_lpc_reg(WDT_TIMER_REG, second_int)
+        if not status:
+            syslog.syslog(syslog.LOG_ERR, "Set timeout failed")
+        return self._gettimeout()
+
+    def _gettimeout(self):
+        """
+        Get watchdog timeout
+        @return watchdog timeout
+        """
+        status, data = self._get_lpc_reg(WDT_TIMER_REG)
+        if status:
+            pass
+
+        bin_val = bin(int(data, 16))[2:].zfill(3)
+
+        return {
+            '001': 30,
+            '010': 60,
+            '011': 180,
+            '100': 240,
+            '101': 300,
+            '110': 420,
+            '111': 600,
+        }.get(bin_val)
+
+    def arm(self, seconds):
+        """
+        Arm the hardware watchdog with a timeout of <seconds> seconds.
+        If the watchdog is currently armed, calling this function will
+        simply reset the timer to the provided value. If the underlying
+        hardware does not support the value provided in <seconds>, this
+        method should arm the watchdog with the *next greater* available
+        value.
+        Returns:
+            An integer specifying the *actual* number of seconds the watchdog
+            was armed with. On failure returns -1.
+        """
+        avaliable_second = [30, 60, 180, 240, 300, 420, 600]
+        ret = WDT_COMMON_ERROR
+
+        if seconds < 0 or seconds not in avaliable_second:
+            return ret
+
+        try:
+            if self.timeout != seconds:
+                self.timeout = self._settimeout(seconds)
+
+            if self.is_armed():
+                self._keepalive()
+            else:
+                status = self._enable()
+                if not status:
+                    syslog.syslog(syslog.LOG_ERR, "Enable watchdog failed")
+                    return ret
+
+            ret = self.timeout
+        except IOError as e:
+            syslog.syslog(syslog.LOG_ERR, "{}".format(e))
+
+        return ret
+
+    def disarm(self):
+        """
+        Disarm the hardware watchdog
+        Returns:
+            A boolean, True if watchdog is disarmed successfully, False if not
+        """
+        disarmed = False
+        if self.is_armed():
+            try:
+                status = self._disable()
+                if status:
+                    disarmed = True
+            except IOError:
+                syslog.syslog(syslog.LOG_ERR, "{}".format(e))
+
+        return disarmed
+
+
+    def is_armed(self):
+        """
+        Retrieves the armed state of the hardware watchdog.
+        Returns:
+            A boolean, True if watchdog is armed, False if not
+        """
+        status, data = self._get_lpc_reg(WDT_ENABLE_REG)
+        if status:
+            pass
+
+        armed = int(data, 16) & 0x1
+
+        return bool(armed)
+
+    def get_remaining_time(self):
+        """
+        If the watchdog is armed, retrieve the number of seconds remaining on
+        the watchdog timer
+        Retruns:
+            An integer specifying the number of seconds remaining on the
+            watchdog timer. If the watchdog is not armed, returns -1
+        """
+        retime = 0
+
+        status, data1 = self._get_lpc_reg(WDT_REMAINTIME_REG1)
+        if status:
+            pass
+
+        status, data2 = self._get_lpc_reg(WDT_REMAINTIME_REG2)
+        if status:
+            pass
+
+        retime = (int(data2,16) & 0xff) + ((int(data1,16) & 0x3f) * 256)
+
+        if retime <= 0:
+            return WDT_COMMON_ERROR
+        else:
+            return int(retime/10)

From 262b1d21dbb943e86ca5a92a1d36bfe9c9ce8793 Mon Sep 17 00:00:00 2001
From: Volodymyr Samotiy <volodymyrs@nvidia.com>
Date: Mon, 14 Oct 2024 10:55:59 +0300
Subject: [PATCH 097/364] [Mellanox] Updating SDK/FW to 4.7.1150/2014.1150
 (#20473)

Signed-off-by: Volodymyr Samotiy <volodymyrs@nvidia.com>
---
 platform/mellanox/fw.mk  | 12 ++++++------
 platform/mellanox/sdk.mk |  2 +-
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/platform/mellanox/fw.mk b/platform/mellanox/fw.mk
index 1e7d02b9924e..8a3f45c0350a 100644
--- a/platform/mellanox/fw.mk
+++ b/platform/mellanox/fw.mk
@@ -21,33 +21,33 @@ MLNX_FW_BASE_PATH = $(MLNX_SDK_BASE_PATH)
 # Place an URL here to FW if you want to download FW instead
 MLNX_FW_BASE_URL =
 
-SIMX_VERSION = 24.4-1098
+SIMX_VERSION = 24.7-1154
 
 FW_FROM_URL = y
 
-MLNX_FW_ASSETS_RELEASE_TAG = fw-2012.4082
+MLNX_FW_ASSETS_RELEASE_TAG = fw-2014.1150
 MLNX_FW_ASSETS_URL = $(MLNX_ASSETS_GITHUB_URL)/releases/download/$(MLNX_FW_ASSETS_RELEASE_TAG)
 
 ifeq ($(MLNX_FW_BASE_URL), )
 MLNX_FW_BASE_URL = $(MLNX_FW_ASSETS_URL)
 endif
 
-MLNX_SPC_FW_VERSION = 13.2012.4082
+MLNX_SPC_FW_VERSION = 13.2014.1150
 MLNX_SPC_FW_FILE = fw-SPC-rel-$(subst .,_,$(MLNX_SPC_FW_VERSION))-EVB.mfa
 $(MLNX_SPC_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC_FW_FILE)
 
-MLNX_SPC2_FW_VERSION = 29.2012.4082
+MLNX_SPC2_FW_VERSION = 29.2014.1150
 MLNX_SPC2_FW_FILE = fw-SPC2-rel-$(subst .,_,$(MLNX_SPC2_FW_VERSION))-EVB.mfa
 $(MLNX_SPC2_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC2_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC2_FW_FILE)
 
-MLNX_SPC3_FW_VERSION = 30.2012.4082
+MLNX_SPC3_FW_VERSION = 30.2014.1150
 MLNX_SPC3_FW_FILE = fw-SPC3-rel-$(subst .,_,$(MLNX_SPC3_FW_VERSION))-EVB.mfa
 $(MLNX_SPC3_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC3_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC3_FW_FILE)
 
-MLNX_SPC4_FW_VERSION = 34.2012.4082
+MLNX_SPC4_FW_VERSION = 34.2014.1150
 MLNX_SPC4_FW_FILE = fw-SPC4-rel-$(subst .,_,$(MLNX_SPC4_FW_VERSION))-EVB.mfa
 $(MLNX_SPC4_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC4_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC4_FW_FILE)
diff --git a/platform/mellanox/sdk.mk b/platform/mellanox/sdk.mk
index 14b0caceb919..5346e8a44589 100644
--- a/platform/mellanox/sdk.mk
+++ b/platform/mellanox/sdk.mk
@@ -14,7 +14,7 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 #
-MLNX_SDK_VERSION = 4.6.4082
+MLNX_SDK_VERSION = 4.7.1150
 MLNX_SDK_ISSU_VERSION = 101
 
 MLNX_SDK_DRIVERS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers

From e55e05bef9313795f68c0c90e5cb097456fada51 Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Tue, 15 Oct 2024 13:38:37 +0800
Subject: [PATCH 098/364] Support cisco-8000 smartswitch image build. (#20488)

### Why I did it
Support Cisco smart switch build.
---
 Makefile                                     | 3 +++
 platform/checkout/cisco-8000-smartswitch.ini | 4 ++++
 2 files changed, 7 insertions(+)
 create mode 100644 platform/checkout/cisco-8000-smartswitch.ini

diff --git a/Makefile b/Makefile
index ca2192f66fea..c560b83c7cfd 100644
--- a/Makefile
+++ b/Makefile
@@ -37,6 +37,9 @@ endif
 PLATFORM_PATH := platform/$(if $(PLATFORM),$(PLATFORM),$(CONFIGURED_PLATFORM))
 PLATFORM_CHECKOUT := platform/checkout
 PLATFORM_CHECKOUT_FILE := $(PLATFORM_CHECKOUT)/$(PLATFORM).ini
+ifeq ($(SMARTSWITCH),1)
+PLATFORM_CHECKOUT_FILE := $(PLATFORM_CHECKOUT)/$(PLATFORM)-smartswitch.ini
+endif
 PLATFORM_CHECKOUT_CMD := $(shell if [ -f $(PLATFORM_CHECKOUT_FILE) ]; then PLATFORM_PATH=$(PLATFORM_PATH) j2 $(PLATFORM_CHECKOUT)/template.j2 $(PLATFORM_CHECKOUT_FILE); fi)
 MAKE_WITH_RETRY := ./scripts/run_with_retry $(MAKE)
 
diff --git a/platform/checkout/cisco-8000-smartswitch.ini b/platform/checkout/cisco-8000-smartswitch.ini
new file mode 100644
index 000000000000..d169b242d322
--- /dev/null
+++ b/platform/checkout/cisco-8000-smartswitch.ini
@@ -0,0 +1,4 @@
+[module]
+repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git
+ref=0.master.ss.0.3
+

From 89faad29d9f238c5343d3d44089a81d9e9d7df3c Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 15 Oct 2024 16:01:47 +0800
Subject: [PATCH 099/364] [submodule] Update submodule sonic-snmpagent to the
 latest HEAD automatically (#20504)

#### Why I did it
src/sonic-snmpagent
```
* c5301b2 - (HEAD -> master, origin/master, origin/HEAD) Fix SNMP output having fewer unicast queues than expected (#330) (23 hours ago) [Justin Wong]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-snmpagent | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-snmpagent b/src/sonic-snmpagent
index deb7b7c43c2e..c5301b2cf943 160000
--- a/src/sonic-snmpagent
+++ b/src/sonic-snmpagent
@@ -1 +1 @@
-Subproject commit deb7b7c43c2e9fa26acbac9907443b5d6f7310d2
+Subproject commit c5301b2cf94304deb8e09959d67af6a089155507

From c603635fed67313cf6c77e7bf107c6f325e8573f Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 15 Oct 2024 19:38:36 +0800
Subject: [PATCH 100/364] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#20503)

#### Why I did it
src/sonic-linux-kernel
```
* 6d0f01b - (HEAD -> master, origin/master, origin/HEAD) Fix RCU stall detected in kernel 6.1 when unregistering devlink (#437) (2 hours ago) [Vivek]
* 32233e9 - Merge pull request #436 from vivekrnv/fix_w25q128 (9 hours ago) [bingwang-ms]
* 6ef1f0b - Merge branch 'master' into fix_w25q128 (12 days ago) [Saikrishna Arcot]
* b2b9ce9 - Fix for Winbond flash devices that could not parse SFDP (3 weeks ago) [Vivek Reddy]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index b2f73b600b0a..6d0f01bb20eb 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit b2f73b600b0aa97f7260006fb6d2eb87ca898246
+Subproject commit 6d0f01bb20eb4a7409d5c31c11a94d39a02c4d5b

From aa7477fad88d6b20cf731cf17fb4f89f754d279e Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 15 Oct 2024 19:38:55 +0800
Subject: [PATCH 101/364] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20487)

#### Why I did it
src/sonic-utilities
```
* 319f58d5 - (HEAD -> master, origin/master, origin/HEAD) [fast/warm-reboot] add cpufreq.default_governor=performance to BOOT_OPTIONS (#3435) (11 hours ago) [Stepan Blyshchak]
* 88ef85cb - Add a command to update log level and refresh configuration (#3428) (3 days ago) [Junchao-Mellanox]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 910252c996a5..319f58d5d5db 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 910252c996a59279101a7116f9bf89e1f936c596
+Subproject commit 319f58d5d5dbe86e2f0aeece67b8274dcd3f3ce8

From 8b88322701576695c1cc5458e6daa723e7727333 Mon Sep 17 00:00:00 2001
From: Nikola Dancejic <26731235+Ndancejic@users.noreply.github.com>
Date: Wed, 16 Oct 2024 10:57:03 -0700
Subject: [PATCH 102/364] [monit][arp_update] Adding monit script to check if
 arp_update is stuck (#19932)

[monit][arp_update] Adding monit script to check if arp_update is stuck

Signed-off-by: Nikola Dancejic <ndancejic@microsoft.com>
---
 .../build_templates/sonic_debian_extension.j2 |  2 +
 files/image_config/monit/arp_update_checker   | 83 +++++++++++++++++++
 files/image_config/monit/conf.d/sonic-host    |  4 +
 3 files changed, 89 insertions(+)
 create mode 100644 files/image_config/monit/arp_update_checker

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 003743cc9b75..da7cdd8a2744 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -396,6 +396,8 @@ sudo cp $IMAGE_CONFIGS/monit/memory_checker $FILESYSTEM_ROOT/usr/bin/
 sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/memory_checker
 sudo cp $IMAGE_CONFIGS/monit/restart_service $FILESYSTEM_ROOT/usr/bin/
 sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/restart_service
+sudo cp $IMAGE_CONFIGS/monit/arp_update_checker $FILESYSTEM_ROOT/usr/bin/
+sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/arp_update_checker
 
 # Installed smartmontools version should match installed smartmontools in docker-platform-monitor Dockerfile
 # TODO: are mismatching versions fine for bookworm?
diff --git a/files/image_config/monit/arp_update_checker b/files/image_config/monit/arp_update_checker
new file mode 100644
index 000000000000..9869bf057a8b
--- /dev/null
+++ b/files/image_config/monit/arp_update_checker
@@ -0,0 +1,83 @@
+#!/usr/bin/env python3
+
+"""
+arp_update_checker
+
+This script is intended to be run by Monit. It will write an alerting message into
+syslog if it finds arp_update script stuck on ping command.
+Then it will attempt to restart arp_update script.
+
+The following is an example in Monit configuration file to show how Monit will run
+this script:
+
+check program arp_update_checker with path "/usr/bin/arp_update_checker" every 10 cycles
+    if status != 0 for 3 times within 3 cycles then alert repeat every 1 cycles
+"""
+
+import syslog
+import subprocess
+import sys
+
+TIMEOUT=5.0
+
+def log_info(message):
+    syslog.syslog(syslog.LOG_INFO, message)
+
+def log_warning(message):
+    syslog.syslog(syslog.LOG_WARNING, message)
+
+def log_error(message):
+    syslog.syslog(syslog.LOG_ERR, message)
+
+def is_process_running(process_name):
+    """Check if there is any running process that contains the given name."""
+    try:
+        # Use pgrep to check if the process is running
+        output = subprocess.check_output(["pgrep", "-f", process_name])
+        return bool(output.strip())
+    except subprocess.CalledProcessError:
+        return False
+
+def is_arp_update_stuck(timeout=TIMEOUT):
+    """Check if arp_update is stuck by looking for a ping command running longer than the specified timeout. (Default 1sec)"""
+    try:
+        arp_update_pid = subprocess.check_output(["pgrep", "-x", "arp_update"]).strip().decode('utf-8')
+        child_pids = subprocess.check_output(["pgrep", "-P", arp_update_pid]).strip().decode('utf-8').split()
+        for pid in child_pids:
+            (cmd, elapsed_time)=subprocess.check_output(["ps", "-p", "1550527", "-o", "comm=,etimes="]).strip().decode('utf-8').split()
+
+            if "ping" in cmd:
+                # Check if the elapsed time is greater than the timeout
+                if elapsed_time > timeout:
+                    return True
+        return False
+    except subprocess.CalledProcessError:
+        return False
+
+def restart_arp_update():
+    """Restart the arp_update process."""
+    try:
+        log_info("patching arp_update...")
+        sed_regex="s/ping6cmd=\"ping6/ping6cmd=\"timeout 0.2 ping6/"
+        subprocess.check_call(["docker", "exec", "swss", "sed", "-i", "-s", sed_regex, "/usr/bin/arp_update"])
+        # restart arp_update to make sure changes are in effect
+        subprocess.check_call(["docker", "exec", "swss", "supervisorctl", "restart", "arp_update"])
+        log_info("arp_update process restarted successfully.")
+    except subprocess.CalledProcessError as e:
+        log_error(f"Failed to restart arp_update process: {e}")
+        sys.exit(1)
+
+def main():
+    """
+    This function will check if arp_update script is stuck and restart the script if needed.
+    """
+    if is_process_running("arp_update"):
+        if is_arp_update_stuck():
+            log_warning("arp_update process is stuck. Restarting...")
+            restart_arp_update()
+            sys.exit(1)
+    else:
+        log_warning("arp_update process is not running.")
+
+if __name__ == "__main__":
+    main()
\ No newline at end of file
diff --git a/files/image_config/monit/conf.d/sonic-host b/files/image_config/monit/conf.d/sonic-host
index 482a992b6df7..e71c082e9061 100644
--- a/files/image_config/monit/conf.d/sonic-host
+++ b/files/image_config/monit/conf.d/sonic-host
@@ -56,3 +56,7 @@ check program vnetRouteCheck with path "/usr/local/bin/vnet_route_check.py"
 # memory_check tool that verifies that memory usage does not cross the threshold or invokes techsupport.
 check program memory_check with path "/usr/local/bin/memory_threshold_check.py"
     if status == 2 for 10 times within 20 cycles then exec "/usr/local/bin/memory_threshold_check_handler.py"
+
+# arp_update_checker tool that verifies that arp_update script is not stuck on ping command every 10 minutes
+check program arp_update_checker with path "/usr/bin/arp_update_checker" every 10 cycles
+    if status != 0 for 3 times within 3 cycles then alert repeat every 1 cycles

From 4e39a16edc6c4237ae02caf7d50d25ce8057e77d Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Wed, 16 Oct 2024 13:16:06 -0700
Subject: [PATCH 103/364] [Mellanox]Adding new line to SN4700-O8V48 SAI profile
 (#20511)

### Why I did it
Fixing https://github.com/sonic-net/sonic-buildimage/issues/20466. Adding newline at the end of sai.profile

### How I did it
Added missing newline.

#### How to verify it
Loading with the SKU and check if everything works fine.
---
 .../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile    | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile
index 413fdb8b4235..d37fe070a833 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile
@@ -1,4 +1,4 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700_8x400g_48x200g.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
 SAI_INDEPENDENT_MODULE_MODE=1
-SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
\ No newline at end of file
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1

From 3fbecce344cebee7fc899d0c5eb2d3112e093cd6 Mon Sep 17 00:00:00 2001
From: Samuel Angebault <staphylo@arista.com>
Date: Thu, 17 Oct 2024 04:48:11 +0200
Subject: [PATCH 104/364] [Arista] Update platform library submodules (#20406)

Why I did it
add sfp power method stubs
rely on SfpOptoeBase lpmode methods instead of overrided ones
put the xcvr back into hw lpmode when performing a xcvr reset
add support for new psu model
miscelaneous fixes
Work item tracking
Microsoft ADO (number only):
How I did it
Updating the arista platform submodule

Description for the changelog
Update Arista platform drivers
---
 platform/barefoot/sonic-platform-modules-arista | 2 +-
 platform/broadcom/sonic-platform-modules-arista | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/barefoot/sonic-platform-modules-arista b/platform/barefoot/sonic-platform-modules-arista
index 522eb5cca9de..ed942d617ddd 160000
--- a/platform/barefoot/sonic-platform-modules-arista
+++ b/platform/barefoot/sonic-platform-modules-arista
@@ -1 +1 @@
-Subproject commit 522eb5cca9de7ddd6b96c5a361913855ad5d8e34
+Subproject commit ed942d617ddde8e63b5190ad3a7d8171c1dbde9a
diff --git a/platform/broadcom/sonic-platform-modules-arista b/platform/broadcom/sonic-platform-modules-arista
index 522eb5cca9de..ed942d617ddd 160000
--- a/platform/broadcom/sonic-platform-modules-arista
+++ b/platform/broadcom/sonic-platform-modules-arista
@@ -1 +1 @@
-Subproject commit 522eb5cca9de7ddd6b96c5a361913855ad5d8e34
+Subproject commit ed942d617ddde8e63b5190ad3a7d8171c1dbde9a

From b65ca453602e5b43612b1762c1db4ab46a65d478 Mon Sep 17 00:00:00 2001
From: Fei Zhou <156348280+fzhou-nokia@users.noreply.github.com>
Date: Thu, 17 Oct 2024 03:51:47 -0400
Subject: [PATCH 105/364] [Nokia-7220 IXR] Add support for NOKIA 7220 IXR-H4
 (#19738)

Why I did it
Add support for NOKIA 7220 IXR-H4

NOKIA 7220-IXR-H4:
Platform: x86_64-nokia_ixr7220_h4-r0
HwSKU: Nokia-IXR7220-H4
ASIC: Broadcom
Port Config: 64x400G + 2x10G

How I did it
Added module under ../device/nokia directory.
Modified the platform/broadcom/one-image.mk and platform/broadcom/ platform-modules-nokia.mk
Update PMON submodule link

How to verify it
Make sure the sonic-buildimage is successful
Run this image on x86_64-nokia_ixr7220_h4-r0 and verify all dockers are up and test basic commands like:
o show version
o show platform summary
o show platform syseeprom
o show platform fan
o show platform psustatus
o show platform firmware status
o show platform temperature
o sudo show system-health detail
o show interface status
Run OC test with T1 topology and have 100% pass on platform.
---
 .../Nokia-IXR7220-H4-64D/buffers.json.j2      |    2 +
 .../buffers_defaults_t0.j2                    |   42 +
 .../buffers_defaults_t1.j2                    |   42 +
 .../Nokia-IXR7220-H4-64D/ixr7220_h4_64d.bcm   | 1139 +++++++++++++++++
 .../pg_profile_lookup.ini                     |   23 +
 .../Nokia-IXR7220-H4-64D/port_config.ini      |   67 +
 .../Nokia-IXR7220-H4-64D/profile.ini          |    1 +
 .../Nokia-IXR7220-H4-64D/qos.json.j2          |    1 +
 .../Nokia-IXR7220-H4-64D/sai.profile          |    1 +
 .../custom_led_H4_V14.0.bin                   |  Bin 0 -> 1955 bytes
 .../x86_64-nokia_ixr7220_h4-r0/default_sku    |    1 +
 .../x86_64-nokia_ixr7220_h4-r0/installer.conf |    1 +
 .../led_proc_init.soc                         |    4 +
 .../x86_64-nokia_ixr7220_h4-r0/pcie.yaml      |  507 ++++++++
 .../x86_64-nokia_ixr7220_h4-r0/platform.json  |  499 ++++++++
 .../x86_64-nokia_ixr7220_h4-r0/platform_asic  |    1 +
 .../platform_env.conf                         |    3 +
 .../plugins/eeprom.py                         |   16 +
 .../plugins/led_control.py                    |   58 +
 .../system_health_monitoring_config.json      |   14 +
 .../thermal_policy.json                       |   66 +
 platform/broadcom/one-image.mk                |    1 +
 platform/broadcom/platform-modules-nokia.mk   |    7 +
 .../broadcom/sonic-platform-modules-nokia     |    2 +-
 24 files changed, 2497 insertions(+), 1 deletion(-)
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers.json.j2
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers_defaults_t0.j2
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers_defaults_t1.j2
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/ixr7220_h4_64d.bcm
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/pg_profile_lookup.ini
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/port_config.ini
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/profile.ini
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/qos.json.j2
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/sai.profile
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4-r0/custom_led_H4_V14.0.bin
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4-r0/default_sku
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4-r0/installer.conf
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4-r0/led_proc_init.soc
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4-r0/pcie.yaml
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4-r0/platform.json
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4-r0/platform_asic
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4-r0/platform_env.conf
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4-r0/plugins/eeprom.py
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4-r0/plugins/led_control.py
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4-r0/system_health_monitoring_config.json
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4-r0/thermal_policy.json

diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers.json.j2 b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers.json.j2
new file mode 100644
index 000000000000..0b1cb2c541b6
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers_defaults_t0.j2 b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers_defaults_t0.j2
new file mode 100644
index 000000000000..31ae10e0c86c
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers_defaults_t0.j2
@@ -0,0 +1,42 @@
+{%- set default_cable = '5m' %}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0,256,4) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+  "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "57000140",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "19247104"
+        },
+    	"egress_lossless_pool": {
+            "size": "57000140",
+            "type": "egress",
+            "mode": "dynamic"
+        } 
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "static_th":"58787284"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"1778",
+            "dynamic_th":"0"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"0",
+            "static_th":"58787284"
+        }
+    },
+{%- endmacro %}
+
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers_defaults_t1.j2 b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers_defaults_t1.j2
new file mode 100644
index 000000000000..31ae10e0c86c
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers_defaults_t1.j2
@@ -0,0 +1,42 @@
+{%- set default_cable = '5m' %}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0,256,4) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+  "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "57000140",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "19247104"
+        },
+    	"egress_lossless_pool": {
+            "size": "57000140",
+            "type": "egress",
+            "mode": "dynamic"
+        } 
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "static_th":"58787284"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"1778",
+            "dynamic_th":"0"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"0",
+            "static_th":"58787284"
+        }
+    },
+{%- endmacro %}
+
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/ixr7220_h4_64d.bcm b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/ixr7220_h4_64d.bcm
new file mode 100644
index 000000000000..c916ad785f9e
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/ixr7220_h4_64d.bcm
@@ -0,0 +1,1139 @@
+# $Copyright: Broadcom Ltd.$
+#
+# BCM5699 64x400g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress: 1
+            pfc_deadlock_seq_control: 1
+            sai_tunnel_support: 2
+            sai_port_phy_time_sync_en: 1
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 12288
+            fpem_mem_entries: 64000
+            default_cpu_tx_queue: 7
+---
+device:
+  0:
+    PC_PM_CORE:
+      ?
+        PC_PM_ID: 1
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x26371504
+        TX_LANE_MAP: 0x37260415
+        RX_POLARITY_FLIP: 0x0a
+        TX_POLARITY_FLIP: 0x0a
+      ?
+        PC_PM_ID: 2
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x26371504
+        TX_LANE_MAP: 0x51406273
+        RX_POLARITY_FLIP: 0x0a
+        TX_POLARITY_FLIP: 0xf5
+      ?
+        PC_PM_ID: 3
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x62735140
+        TX_LANE_MAP: 0x62735140
+        RX_POLARITY_FLIP: 0x0a
+        TX_POLARITY_FLIP: 0x0a
+      ?
+        PC_PM_ID: 4
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x51406273
+        TX_LANE_MAP: 0x40517362
+        RX_POLARITY_FLIP: 0xf5
+        TX_POLARITY_FLIP: 0xf5
+      ?
+        PC_PM_ID: 5
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x52437061
+        TX_LANE_MAP: 0x42537160
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xaf
+      ?
+        PC_PM_ID: 6
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x52437061
+        TX_LANE_MAP: 0x41507362
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xfa
+      ?
+        PC_PM_ID: 7
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x52437061
+        TX_LANE_MAP: 0x40517362
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xfa
+      ?
+        PC_PM_ID: 8
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x52437061
+        TX_LANE_MAP: 0x41507362
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xfa
+      ?
+        PC_PM_ID: 9
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x42537160
+        TX_LANE_MAP: 0x40516273
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xfa
+      ?
+        PC_PM_ID: 10
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x54237061
+        TX_LANE_MAP: 0x41507362
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xfa
+      ?
+        PC_PM_ID: 11
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x23547160
+        TX_LANE_MAP: 0x51406273
+        RX_POLARITY_FLIP: 0x57
+        TX_POLARITY_FLIP: 0xfa
+      ?
+        PC_PM_ID: 12
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x52437061
+        TX_LANE_MAP: 0x41507362
+        RX_POLARITY_FLIP: 0x57
+        TX_POLARITY_FLIP: 0xfa
+      ?
+        PC_PM_ID: 13
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x24350716
+        TX_LANE_MAP: 0x15042637
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0x0a
+      ?
+        PC_PM_ID: 14
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x41537062
+        TX_LANE_MAP: 0x41507362
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xfa
+      ?
+        PC_PM_ID: 15
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x14350726
+        TX_LANE_MAP: 0x15042637
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0x0a
+      ?
+        PC_PM_ID: 16
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x51437062
+        TX_LANE_MAP: 0x41507362
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xfa
+      ?
+        PC_PM_ID: 17
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x52436071
+        TX_LANE_MAP: 0x51406273
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 18
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x25340716
+        TX_LANE_MAP: 0x04153726
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 19
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x52437061
+        TX_LANE_MAP: 0x51406273
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 20
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x25340716
+        TX_LANE_MAP: 0x04153726
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 21
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x52437061
+        TX_LANE_MAP: 0x51406273
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 22
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x15340726
+        TX_LANE_MAP: 0x04153726
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 23
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x52437061
+        TX_LANE_MAP: 0x51406273
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 24
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x25340716
+        TX_LANE_MAP: 0x04153726
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 25
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x52437061
+        TX_LANE_MAP: 0x51406273
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 26
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x25340716
+        TX_LANE_MAP: 0x04153726
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 27
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x34251607
+        TX_LANE_MAP: 0x51406273
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 28
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x43516270
+        TX_LANE_MAP: 0x34250716
+        RX_POLARITY_FLIP: 0x51
+        TX_POLARITY_FLIP: 0x00
+      ?
+        PC_PM_ID: 29
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x15042637
+        TX_LANE_MAP: 0x25041637
+        RX_POLARITY_FLIP: 0xc5
+        TX_POLARITY_FLIP: 0xc5
+      ?
+        PC_PM_ID: 30
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x26371504
+        TX_LANE_MAP: 0x37260415
+        RX_POLARITY_FLIP: 0xca
+        TX_POLARITY_FLIP: 0xfa
+      ?
+        PC_PM_ID: 31
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x62735140
+        TX_LANE_MAP: 0x04153726
+        RX_POLARITY_FLIP: 0xcb
+        TX_POLARITY_FLIP: 0x05
+      ?
+        PC_PM_ID: 32
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x62735140
+        TX_LANE_MAP: 0x52736140
+        RX_POLARITY_FLIP: 0x3a
+        TX_POLARITY_FLIP: 0x3a
+      ?
+        PC_PM_ID: 33
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x26371504
+        TX_LANE_MAP: 0x25371604
+        RX_POLARITY_FLIP: 0x0a
+        TX_POLARITY_FLIP: 0xca
+      ?
+        PC_PM_ID: 34
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x37260415
+        TX_LANE_MAP: 0x40617352
+        RX_POLARITY_FLIP: 0x0a
+        TX_POLARITY_FLIP: 0xf5
+      ?
+        PC_PM_ID: 35
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x73624051
+        TX_LANE_MAP: 0x73524061
+        RX_POLARITY_FLIP: 0x0a
+        TX_POLARITY_FLIP: 0x0a
+      ?
+        PC_PM_ID: 36
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x51406273
+        TX_LANE_MAP: 0x52406173
+        RX_POLARITY_FLIP: 0xc5
+        TX_POLARITY_FLIP: 0x35
+      ?
+        PC_PM_ID: 37
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x34152607
+        TX_LANE_MAP: 0x43527061
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xff
+      ?
+        PC_PM_ID: 38
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x52437061
+        TX_LANE_MAP: 0x04153726
+        RX_POLARITY_FLIP: 0x51
+        TX_POLARITY_FLIP: 0xab
+      ?
+        PC_PM_ID: 39
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x25340716
+        TX_LANE_MAP: 0x15042637
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 40
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x34251607
+        TX_LANE_MAP: 0x40517362
+        RX_POLARITY_FLIP: 0xaa
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 41
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x25340716
+        TX_LANE_MAP: 0x15072634
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xfb
+      ?
+        PC_PM_ID: 42
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x34521670
+        TX_LANE_MAP: 0x40517362
+        RX_POLARITY_FLIP: 0x99
+        TX_POLARITY_FLIP: 0x8a
+      ?
+        PC_PM_ID: 43
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x15340726
+        TX_LANE_MAP: 0x15042637
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 44
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x43526170
+        TX_LANE_MAP: 0x40517362
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 45
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x25340716
+        TX_LANE_MAP: 0x15042637
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 46
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x43526170
+        TX_LANE_MAP: 0x40517362
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 47
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x25340716
+        TX_LANE_MAP: 0x15042637
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 48
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x34527160
+        TX_LANE_MAP: 0x51406273
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xaa
+      ?
+        PC_PM_ID: 49
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x43516270
+        TX_LANE_MAP: 0x41507362
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xfa
+      ?
+        PC_PM_ID: 50
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x53416270
+        TX_LANE_MAP: 0x51406273
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0xfa
+      ?
+        PC_PM_ID: 51
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x14350726
+        TX_LANE_MAP: 0x05142637
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0x0a
+      ?
+        PC_PM_ID: 52
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x35241607
+        TX_LANE_MAP: 0x04153726
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0x0a
+      ?
+        PC_PM_ID: 53
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x25340716
+        TX_LANE_MAP: 0x14053726
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0x0a
+      ?
+        PC_PM_ID: 54
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x32451706
+        TX_LANE_MAP: 0x15042637
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0x0a
+      ?
+        PC_PM_ID: 55
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x45320716
+        TX_LANE_MAP: 0x14053726
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0x0a
+      ?
+        PC_PM_ID: 56
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x24351706
+        TX_LANE_MAP: 0x04152637
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0x0a
+      ?
+        PC_PM_ID: 57
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x34251607
+        TX_LANE_MAP: 0x14053726
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0x0a
+      ?
+        PC_PM_ID: 58
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x34251607
+        TX_LANE_MAP: 0x04153726
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0x0a
+      ?
+        PC_PM_ID: 59
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x34251607
+        TX_LANE_MAP: 0x14053726
+        RX_POLARITY_FLIP: 0x55
+        TX_POLARITY_FLIP: 0x0a
+      ?
+        PC_PM_ID: 60
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x34251607
+        TX_LANE_MAP: 0x24351706
+        RX_POLARITY_FLIP: 0x57
+        TX_POLARITY_FLIP: 0xa0
+      ?
+        PC_PM_ID: 61
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x51406273
+        TX_LANE_MAP: 0x51406273
+        RX_POLARITY_FLIP: 0xf5
+        TX_POLARITY_FLIP: 0x35
+      ?
+        PC_PM_ID: 62
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x62735140
+        TX_LANE_MAP: 0x43627051
+        RX_POLARITY_FLIP: 0x0a
+        TX_POLARITY_FLIP: 0x0a
+      ?
+        PC_PM_ID: 63
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x26371504
+        TX_LANE_MAP: 0x40517362
+        RX_POLARITY_FLIP: 0x0a
+        TX_POLARITY_FLIP: 0xf5
+      ?
+        PC_PM_ID: 64
+        CORE_INDEX: 0
+      :
+        RX_LANE_MAP_AUTO: 0
+        TX_LANE_MAP_AUTO: 0
+        RX_POLARITY_FLIP_AUTO: 0
+        TX_POLARITY_FLIP_AUTO: 0
+        RX_LANE_MAP: 0x26371504
+        TX_LANE_MAP: 0x26371504
+        RX_POLARITY_FLIP: 0x0a
+        TX_POLARITY_FLIP: 0xca
+...
+---
+device:
+  0:
+    PC_PORT_PHYS_MAP:
+      ?
+        PORT_ID: 0
+      :
+        PC_PHYS_PORT_ID: 0
+      ?
+        PORT_ID: 1
+      :
+        PC_PHYS_PORT_ID: 1
+      ?
+        PORT_ID: 5
+      :
+        PC_PHYS_PORT_ID: 5
+      ?
+        PORT_ID: 9
+      :
+        PC_PHYS_PORT_ID: 9
+      ?
+        PORT_ID: 13
+      :
+        PC_PHYS_PORT_ID: 13
+      ?
+        PORT_ID: 17
+      :
+        PC_PHYS_PORT_ID: 17
+      ?
+        PORT_ID: 21
+      :
+        PC_PHYS_PORT_ID: 21
+      ?
+        PORT_ID: 25
+      :
+        PC_PHYS_PORT_ID: 25
+      ?
+        PORT_ID: 29
+      :
+        PC_PHYS_PORT_ID: 29
+      ?
+        PORT_ID: 34
+      :
+        PC_PHYS_PORT_ID: 33
+      ?
+        PORT_ID: 38
+      :
+        PC_PHYS_PORT_ID: 37
+      ?
+        PORT_ID: 42
+      :
+        PC_PHYS_PORT_ID: 41
+      ?
+        PORT_ID: 46
+      :
+        PC_PHYS_PORT_ID: 45
+      ?
+        PORT_ID: 51
+      :
+        PC_PHYS_PORT_ID: 49
+      ?
+        PORT_ID: 55
+      :
+        PC_PHYS_PORT_ID: 53
+      ?
+        PORT_ID: 59
+      :
+        PC_PHYS_PORT_ID: 57
+      ?
+        PORT_ID: 63
+      :
+        PC_PHYS_PORT_ID: 61
+      ?
+        PORT_ID: 68
+      :
+        PC_PHYS_PORT_ID: 65
+      ?
+        PORT_ID: 72
+      :
+        PC_PHYS_PORT_ID: 69
+      ?
+        PORT_ID: 76
+      :
+        PC_PHYS_PORT_ID: 73
+      ?
+        PORT_ID: 80
+      :
+        PC_PHYS_PORT_ID: 77
+      ?
+        PORT_ID: 85
+      :
+        PC_PHYS_PORT_ID: 81
+      ?
+        PORT_ID: 89
+      :
+        PC_PHYS_PORT_ID: 85
+      ?
+        PORT_ID: 93
+      :
+        PC_PHYS_PORT_ID: 89
+      ?
+        PORT_ID: 97
+      :
+        PC_PHYS_PORT_ID: 93
+      ?
+        PORT_ID: 102
+      :
+        PC_PHYS_PORT_ID: 97
+      ?
+        PORT_ID: 106
+      :
+        PC_PHYS_PORT_ID: 101
+      ?
+        PORT_ID: 110
+      :
+        PC_PHYS_PORT_ID: 105
+      ?
+        PORT_ID: 114
+      :
+        PC_PHYS_PORT_ID: 109
+      ?
+        PORT_ID: 119
+      :
+        PC_PHYS_PORT_ID: 113
+      ?
+        PORT_ID: 123
+      :
+        PC_PHYS_PORT_ID: 117
+      ?
+        PORT_ID: 127
+      :
+        PC_PHYS_PORT_ID: 121
+      ?
+        PORT_ID: 131
+      :
+        PC_PHYS_PORT_ID: 125
+      ?
+        PORT_ID: 136
+      :
+        PC_PHYS_PORT_ID: 129
+      ?
+        PORT_ID: 140
+      :
+        PC_PHYS_PORT_ID: 133
+      ?
+        PORT_ID: 144
+      :
+        PC_PHYS_PORT_ID: 137
+      ?
+        PORT_ID: 148
+      :
+        PC_PHYS_PORT_ID: 141
+      ?
+        PORT_ID: 153
+      :
+        PC_PHYS_PORT_ID: 145
+      ?
+        PORT_ID: 157
+      :
+        PC_PHYS_PORT_ID: 149
+      ?
+        PORT_ID: 161
+      :
+        PC_PHYS_PORT_ID: 153
+      ?
+        PORT_ID: 165
+      :
+        PC_PHYS_PORT_ID: 157
+      ?
+        PORT_ID: 170
+      :
+        PC_PHYS_PORT_ID: 161
+      ?
+        PORT_ID: 174
+      :
+        PC_PHYS_PORT_ID: 165
+      ?
+        PORT_ID: 178
+      :
+        PC_PHYS_PORT_ID: 169
+      ?
+        PORT_ID: 182
+      :
+        PC_PHYS_PORT_ID: 173
+      ?
+        PORT_ID: 187
+      :
+        PC_PHYS_PORT_ID: 177
+      ?
+        PORT_ID: 191
+      :
+        PC_PHYS_PORT_ID: 181
+      ?
+        PORT_ID: 195
+      :
+        PC_PHYS_PORT_ID: 185
+      ?
+        PORT_ID: 199
+      :
+        PC_PHYS_PORT_ID: 189
+      ?
+        PORT_ID: 204
+      :
+        PC_PHYS_PORT_ID: 193
+      ?
+        PORT_ID: 208
+      :
+        PC_PHYS_PORT_ID: 197
+      ?
+        PORT_ID: 212
+      :
+        PC_PHYS_PORT_ID: 201
+      ?
+        PORT_ID: 216
+      :
+        PC_PHYS_PORT_ID: 205
+      ?
+        PORT_ID: 221
+      :
+        PC_PHYS_PORT_ID: 209
+      ?
+        PORT_ID: 225
+      :
+        PC_PHYS_PORT_ID: 213
+      ?
+        PORT_ID: 229
+      :
+        PC_PHYS_PORT_ID: 217
+      ?
+        PORT_ID: 233
+      :
+        PC_PHYS_PORT_ID: 221
+      ?
+        PORT_ID: 238
+      :
+        PC_PHYS_PORT_ID: 225
+      ?
+        PORT_ID: 242
+      :
+        PC_PHYS_PORT_ID: 229
+      ?
+        PORT_ID: 246
+      :
+        PC_PHYS_PORT_ID: 233
+      ?
+        PORT_ID: 250
+      :
+        PC_PHYS_PORT_ID: 237
+      ?
+        PORT_ID: 255
+      :
+        PC_PHYS_PORT_ID: 241
+      ?
+        PORT_ID: 259
+      :
+        PC_PHYS_PORT_ID: 245
+      ?
+        PORT_ID: 263
+      :
+        PC_PHYS_PORT_ID: 249
+      ?
+        PORT_ID: 267
+      :
+        PC_PHYS_PORT_ID: 253
+      ?
+        PORT_ID: 50
+      :
+        PC_PHYS_PORT_ID: 258
+      ?
+        PORT_ID: 152
+      :
+        PC_PHYS_PORT_ID: 257
+...
+---
+device:
+  0:
+    PC_PORT:
+      ?
+        PORT_ID: [152, 50]
+      :
+        ENABLE: 0
+        SPEED: 10000
+        NUM_LANES: 1
+        FEC_MODE: PC_FEC_NONE
+        MAX_FRAME_SIZE: 9416
+      ?
+        PORT_ID: 0
+      :
+        &port_mode_10g
+        ENABLE: 1
+        SPEED: 10000
+        NUM_LANES: 1
+      ?
+        PORT_ID: [1, 5, 9, 13, 17, 21, 25, 29, 34, 38, 42, 46, 51, 55, 59, 63, 68, 72, 76, 80, 85, 89, 93, 97, 102, 106, 110, 114, 119, 123, 127, 131, 136, 140, 144, 148, 153, 157, 161, 165, 170, 174, 178, 182, 187, 191, 195, 199, 204, 208, 212, 216, 221, 225, 229, 233, 238, 242, 246, 250, 255, 259, 263, 267]
+      :
+        ENABLE: 0
+        SPEED: 400000
+        NUM_LANES: 8
+        FEC_MODE: PC_FEC_RS544_2XN
+        MAX_FRAME_SIZE: 9416
+
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0
+
+        # Per pipe flex state configuration
+        #FLEX_STATE_CONFIG:
+        #    FLEX_STATE_ING_OPERMODE_PIPEUNIQUE: 0
+        #    FLEX_STATE_EGR_OPERMODE_PIPEUNIQUE: 1
+
+        # Lossy vs Lossless mode
+        TM_THD_CONFIG:
+            THRESHOLD_MODE: LOSSLESS
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/pg_profile_lookup.ini b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/pg_profile_lookup.ini
new file mode 100644
index 000000000000..92d4f78ef3a8
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/pg_profile_lookup.ini
@@ -0,0 +1,23 @@
+# PG lossless profiles.
+# speed cable size    xon  xoff    threshold xon_offset
+  10000  5m   1248    2288 35776   0         2288
+  25000  5m   1248    2288 53248   0         2288
+  40000  5m   1248    2288 66560   0         2288
+  50000  5m   1248    2288 90272   0         2288
+ 100000  5m   18796   3556 150368  -2        3556
+ 200000  5m   18796   3556 150368  -2        3556
+ 400000  5m   18796   3556 150368  -2        3556
+  10000  40m  1248    2288 37024   0         2288
+  25000  40m  1248    2288 53248   0         2288
+  40000  40m  1248    2288 71552   0         2288
+  50000  40m  1248    2288 96096   0         2288
+ 100000  40m  18796   3556 150368  -2        3556
+ 200000  40m  18796   3556 150368  -2        3556
+ 400000  40m  18796   3556 150368  -2        3556
+  10000  300m 1248    2288 46176   0         2288
+  25000  300m 1248    2288 79040   0         2288
+  40000  300m 1248    2288 108160  0         2288
+  50000  300m 1248    2288 141856  0         2288
+ 100000  300m 18796   3556 150368  -2        3556
+ 200000  300m 18796   3556 150368  -2        3556
+ 400000  300m 18796   3556 150368  -2        3556
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/port_config.ini b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/port_config.ini
new file mode 100644
index 000000000000..07184ae23f78
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/port_config.ini
@@ -0,0 +1,67 @@
+# name          lanes                             alias               index     speed
+Ethernet0       129,130,131,132,133,134,135,136   fourhundredGigE1/1  1         400000
+Ethernet4       137,138,139,140,141,142,143,144   fourhundredGigE1/2  2         400000
+Ethernet8       145,146,147,148,149,150,151,152   fourhundredGigE1/3  3         400000
+Ethernet12      153,154,155,156,157,158,159,160   fourhundredGigE1/4  4         400000
+Ethernet16      161,162,163,164,165,166,167,168   fourhundredGigE1/5  5         400000
+Ethernet20      169,170,171,172,173,174,175,176   fourhundredGigE1/6  6         400000
+Ethernet24      177,178,179,180,181,182,183,184   fourhundredGigE1/7  7         400000
+Ethernet28      185,186,187,188,189,190,191,192   fourhundredGigE1/8  8         400000
+Ethernet32      193,194,195,196,197,198,199,200   fourhundredGigE1/9  9         400000
+Ethernet36      201,202,203,204,205,206,207,208   fourhundredGigE1/10 10        400000
+Ethernet40      249,250,251,252,253,254,255,256   fourhundredGigE1/11 11        400000
+Ethernet44      241,242,243,244,245,246,247,248   fourhundredGigE1/12 12        400000
+Ethernet48      225,226,227,228,229,230,231,232   fourhundredGigE1/13 13        400000
+Ethernet52      233,234,235,236,237,238,239,240   fourhundredGigE1/14 14        400000
+Ethernet56      217,218,219,220,221,222,223,224   fourhundredGigE1/15 15        400000
+Ethernet60      209,210,211,212,213,214,215,216   fourhundredGigE1/16 16        400000
+Ethernet64      289,290,291,292,293,294,295,296   fourhundredGigE1/17 17        400000
+Ethernet68      297,298,299,300,301,302,303,304   fourhundredGigE1/18 18        400000
+Ethernet72      281,282,283,284,285,286,287,288   fourhundredGigE1/19 19        400000
+Ethernet76      273,274,275,276,277,278,279,280   fourhundredGigE1/20 20        400000
+Ethernet80      257,258,259,260,261,262,263,264   fourhundredGigE1/21 21        400000
+Ethernet84      265,266,267,268,269,270,271,272   fourhundredGigE1/22 22        400000
+Ethernet88      305,306,307,308,309,310,311,312   fourhundredGigE1/23 23        400000
+Ethernet92      313,314,315,316,317,318,319,320   fourhundredGigE1/24 24        400000
+Ethernet96      321,322,323,324,325,326,327,328   fourhundredGigE1/25 25        400000
+Ethernet100     329,330,331,332,333,334,335,336   fourhundredGigE1/26 26        400000
+Ethernet104     337,338,339,340,341,342,343,344   fourhundredGigE1/27 27        400000
+Ethernet108     345,346,347,348,349,350,351,352   fourhundredGigE1/28 28        400000
+Ethernet112     353,354,355,356,357,358,359,360   fourhundredGigE1/29 29        400000
+Ethernet116     361,362,363,364,365,366,367,368   fourhundredGigE1/30 30        400000
+Ethernet120     369,370,371,372,373,374,375,376   fourhundredGigE1/31 31        400000
+Ethernet124     377,378,379,380,381,382,383,384   fourhundredGigE1/32 32        400000
+Ethernet128     97,98,99,100,101,102,103,104      fourhundredGigE1/33 33        400000
+Ethernet132     105,106,107,108,109,110,111,112   fourhundredGigE1/34 34        400000
+Ethernet136     113,114,115,116,117,118,119,120   fourhundredGigE1/35 35        400000
+Ethernet140     121,122,123,124,125,126,127,128   fourhundredGigE1/36 36        400000
+Ethernet144     57,58,59,60,61,62,63,64           fourhundredGigE1/37 37        400000
+Ethernet148     65,66,67,68,69,70,71,72           fourhundredGigE1/38 38        400000
+Ethernet152     49,50,51,52,53,54,55,56           fourhundredGigE1/39 39        400000
+Ethernet156     81,82,83,84,85,86,87,88           fourhundredGigE1/40 40        400000
+Ethernet160     41,42,43,44,45,46,47,48           fourhundredGigE1/41 41        400000
+Ethernet164     73,74,75,76,77,78,79,80           fourhundredGigE1/42 42        400000
+Ethernet168     33,34,35,36,37,38,39,40           fourhundredGigE1/43 43        400000
+Ethernet172     89,90,91,92,93,94,95,96           fourhundredGigE1/44 44        400000
+Ethernet176     25,26,27,28,29,30,31,32           fourhundredGigE1/45 45        400000
+Ethernet180     17,18,19,20,21,22,23,24           fourhundredGigE1/46 46        400000
+Ethernet184     1,2,3,4,5,6,7,8                   fourhundredGigE1/47 47        400000
+Ethernet188     9,10,11,12,13,14,15,16            fourhundredGigE1/48 48        400000
+Ethernet192     497,498,499,500,501,502,503,504   fourhundredGigE1/49 49        400000
+Ethernet196     505,506,507,508,509,510,511,512   fourhundredGigE1/50 50        400000
+Ethernet200     489,490,491,492,493,494,495,496   fourhundredGigE1/51 51        400000
+Ethernet204     481,482,483,484,485,486,487,488   fourhundredGigE1/52 52        400000
+Ethernet208     473,474,475,476,477,478,479,480   fourhundredGigE1/53 53        400000
+Ethernet212     417,418,419,420,421,422,423,424   fourhundredGigE1/54 54        400000
+Ethernet216     465,466,467,468,469,470,471,472   fourhundredGigE1/55 55        400000
+Ethernet220     433,434,435,436,437,438,439,440   fourhundredGigE1/56 56        400000
+Ethernet224     457,458,459,460,461,462,463,464   fourhundredGigE1/57 57        400000
+Ethernet228     425,426,427,428,429,430,431,432   fourhundredGigE1/58 58        400000
+Ethernet232     449,450,451,452,453,454,455,456   fourhundredGigE1/59 59        400000
+Ethernet236     441,442,443,444,445,446,447,448   fourhundredGigE1/60 60        400000
+Ethernet240     385,386,387,388,389,390,391,392   fourhundredGigE1/61 61        400000
+Ethernet244     401,402,403,404,405,406,407,408   fourhundredGigE1/62 62        400000
+Ethernet248     393,394,395,396,397,398,399,400   fourhundredGigE1/63 63        400000
+Ethernet252     409,410,411,412,413,414,415,416   fourhundredGigE1/64 64        400000
+Ethernet256     513                               tenGigE1/65         65        10000
+Ethernet257     515                               tenGigE1/66         66        10000
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/profile.ini b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/profile.ini
new file mode 100644
index 000000000000..4eda67c91a69
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/profile.ini
@@ -0,0 +1 @@
+switchMacAddress=XX:XX:XX:XX:XX:XX
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/qos.json.j2 b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/qos.json.j2
new file mode 100644
index 000000000000..3e548325ea30
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/sai.profile b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/sai.profile
new file mode 100644
index 000000000000..c03cbd55290a
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/ixr7220_h4_64d.bcm
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/custom_led_H4_V14.0.bin b/device/nokia/x86_64-nokia_ixr7220_h4-r0/custom_led_H4_V14.0.bin
new file mode 100644
index 0000000000000000000000000000000000000000..06bc6d598b4160da4193ee0c9f7e54895e439978
GIT binary patch
literal 1955
zcmd5+ZERCj7=BJa_7MgQCNRp@Z1=7Mx(yk{7*>(H-g*cv8?l82R?w~+a6uOf!K7l;
z&Orpl$T~i<b}X<BPzGjH5JZ<?{D_*E+&e-tWJ|^mxXK_@jfp@Ap0+v%smXqNlXFha
zdEe)K-*cY#K0CPB*&13!U!-;#!af>115OW7nuL1$Otv=n8iG2@d$#+^spb53&Pyy;
zqdqUcwV(uwaLteo#c@r`<p{?ddnroN6_FBdR=^+--YwW@j$g-%_6W`5!&I=eQOxeN
zAF;bBX?4<Ciq>*iF$akKaF>_J(;5r!1^+Nw@6CAfmXghOI?H&_Jt@!y<3{gEfu28Z
zbYlv1uyC`q3~raM-0iCO+Q;0%#>L-&^QL}<r72>$SS6Y<5&ruP=cGXU#*NNQf!>-x
zw^Pab4|~J*e=E0*;qT_3WBH5FID;d~+YIlag)7inkzbzRx#r%5d@@^$a^PT`_v(8d
z=G)9SbF1klDFV*>oy$W@>MAWS)h)F4)Y%Gqd>(qod#7%$Z?kX2H&Q>+pzVF;i@mgs
zcG4ai>jTek1y2goSpT^KQv|{}gi7l0pT80B%HPy&R^V0z@G@Ho0V?qvmZ1vIV-?n5
z9qO<iZ{Rg-!K-M*CbVEb-p6h<VJF&f2uE-fAK?^E<19WyAFKQ+EW%>sqYyJO7t>(E
z6qI2iGC`onT|B@a_!YOI;1^uMbzH_Z4B<<Bk8kiJt3ku6`2T#(5(?Jjl0_2&dh69_
zS_v5-4tcGAY5NjJ&sjUug}6Gz&g`P+mNoZgNlQv`<-qX9j0aJ&--B>%i#bEi!Re}U
zYl%%OgGcLKvtIewX$*J*pTa2O0E*v{RvBMkcZMc2Xa<f~|Gu`JqS&1miQdm8)>(n*
zsO>Pbg_*5&)OLE**2ZjY^wOv$9xp;)py1Qyk%5pivTg&#y!mo9o6BUKbP9)QgQuGY
zi#E^(EEH<kd5uE277A`3HN$3~w);aGG*Q}!c|tE`RF-Ju{kw1LZ%;-k<X47Ccw!_(
z-F8DjZ^o6O;q6r+oLGI3YFX@?wL#v49N`Hin?r{nbz{1i=5~5@GrNM1_ULirTZ#AD
zpgJXV4CN8NM=*-nyiv^J<G3_;w#n&jP1nmJ&9`afAU}&-RWI@$GN4kX${|m`zJKyQ
zR&@*QQZrb#to8%q0!%ILrqe|d_St7(YJe>0j~19S<qAKz36jA6rf*$e<vP6K;5ijs
zh2KG8E>jE%zjX69+2Fsa)-%oC$TS;F&3CD+jpd!HGqGz@!DqFTFgm(cPHgX5X|Nc@
ze$`G<x?agBLdP+2A<JJZCbNF6#4{vg>&*(=8T_BCS%*mYBu!Q~!)zEtY1t##qiQ@u
z_ozqapq<`&?Ci!+?%&xoEZd%hwUfFMH=bdR4KAmo^b@&(&5B}Rp2gyJHF=+c_<fXo
zHLN<Q!N2XXxR(Y|c3!@&CNYtOPTYBz)QWiT?@082lWFQM{mG(0BTm?OnN;Yd5L}+i
zdfnwv`gGPw#6*U{!8ECQi?kxIPxv73f}kxoiw1Fvmy~K1i&V*YsCCKFSRdgsGv5`7
m>1VZx(@Xt0QTvm6k;e5Yx;QyP&jM@N=w;(gHgsCV#o{jn!AL6r

literal 0
HcmV?d00001

diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/default_sku b/device/nokia/x86_64-nokia_ixr7220_h4-r0/default_sku
new file mode 100644
index 000000000000..fd40563624ac
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/default_sku
@@ -0,0 +1 @@
+Nokia-IXR7220-H4-64D t1
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/installer.conf b/device/nokia/x86_64-nokia_ixr7220_h4-r0/installer.conf
new file mode 100644
index 000000000000..8b137891791f
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/installer.conf
@@ -0,0 +1 @@
+
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/led_proc_init.soc b/device/nokia/x86_64-nokia_ixr7220_h4-r0/led_proc_init.soc
new file mode 100644
index 000000000000..82c688080fd6
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/led_proc_init.soc
@@ -0,0 +1,4 @@
+led stop
+led load /usr/share/sonic/platform/custom_led_H4_V14.0.bin
+led auto on
+led start
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/pcie.yaml b/device/nokia/x86_64-nokia_ixr7220_h4-r0/pcie.yaml
new file mode 100644
index 000000000000..ccfe27050883
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/pcie.yaml
@@ -0,0 +1,507 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: 6f00
+  name: 'Host bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D DMI2
+    (rev 03)'
+- bus: '00'
+  dev: '01'
+  fn: '0'
+  id: 6f02
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 1 (rev 03)'
+- bus: '00'
+  dev: '02'
+  fn: '0'
+  id: 6f04
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 03)'
+- bus: '00'
+  dev: '02'
+  fn: '2'
+  id: 6f06
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 03)'
+- bus: '00'
+  dev: '03'
+  fn: '0'
+  id: 6f08
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 03)'
+- bus: '00'
+  dev: '03'
+  fn: '1'
+  id: 6f09
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 03)'
+- bus: '00'
+  dev: '03'
+  fn: '2'
+  id: 6f0a
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 03)'
+- bus: '00'
+  dev: '03'
+  fn: '3'
+  id: 6f0b
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '0'
+  id: 6f28
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Map/VTd_Misc/System Management (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '1'
+  id: 6f29
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Hot Plug (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '2'
+  id: 6f2a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO RAS/Control Status/Global Errors (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '4'
+  id: 6f2c
+  name: 'PIC: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D I/O APIC (rev
+    03)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 8c31
+  name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
+    xHCI (rev 05)'
+- bus: '00'
+  dev: '16'
+  fn: '0'
+  id: 8c3a
+  name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset
+    Family MEI Controller #1 (rev 04)'
+- bus: '00'
+  dev: '16'
+  fn: '1'
+  id: 8c3b
+  name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset
+    Family MEI Controller #2 (rev 04)'
+- bus: '00'
+  dev: 1c
+  fn: '0'
+  id: 8c10
+  name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express
+    Root Port #1 (rev d5)'
+- bus: '00'
+  dev: 1c
+  fn: '7'
+  id: 8c1e
+  name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express
+    Root Port #8 (rev d5)'
+- bus: '00'
+  dev: 1d
+  fn: '0'
+  id: 8c26
+  name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
+    EHCI #1 (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: 8c54
+  name: 'ISA bridge: Intel Corporation C224 Series Chipset Family Server Standard
+    SKU LPC Controller (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '2'
+  id: 8c02
+  name: 'SATA controller: Intel Corporation 8 Series/C220 Series Chipset Family 6-port
+    SATA Controller 1 [AHCI mode] (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '3'
+  id: 8c22
+  name: 'SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller
+    (rev 05)'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: 6f50
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 0'
+- bus: '02'
+  dev: '00'
+  fn: '1'
+  id: 6f51
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 1'
+- bus: '02'
+  dev: '00'
+  fn: '2'
+  id: 6f52
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 2'
+- bus: '02'
+  dev: '00'
+  fn: '3'
+  id: 6f53
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 3'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '03'
+  dev: '00'
+  fn: '1'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '05'
+  dev: '00'
+  fn: '0'
+  id: b404
+  name: 'PCI bridge: Pericom Semiconductor Device b404 (rev 01)'
+- bus: '06'
+  dev: '01'
+  fn: '0'
+  id: b404
+  name: 'PCI bridge: Pericom Semiconductor Device b404 (rev 01)'
+- bus: '06'
+  dev: '02'
+  fn: '0'
+  id: b404
+  name: 'PCI bridge: Pericom Semiconductor Device b404 (rev 01)'
+- bus: '06'
+  dev: '03'
+  fn: '0'
+  id: b404
+  name: 'PCI bridge: Pericom Semiconductor Device b404 (rev 01)'
+- bus: '07'
+  dev: '00'
+  fn: '0'
+  id: '8664'
+  name: 'Class 2080: Accton Technology Corporation Device 8664'
+- bus: 08
+  dev: '00'
+  fn: '0'
+  id: '8664'
+  name: 'Class 2080: Accton Technology Corporation Device 8664'
+- bus: 09
+  dev: '00'
+  fn: '0'
+  id: '8664'
+  name: 'Class 2080: Accton Technology Corporation Device 8664'
+- bus: 0a
+  dev: '00'
+  fn: '0'
+  id: b990
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries BCM56990 Switch ASIC
+    [Tomahawk4] (rev 11)'
+- bus: 0e
+  dev: '00'
+  fn: '0'
+  id: '1533'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
+    03)'
+- bus: ff
+  dev: 0b
+  fn: '0'
+  id: 6f81
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '1'
+  id: 6f36
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '2'
+  id: 6f37
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '3'
+  id: 6f76
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link Debug (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '0'
+  id: 6fe0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '1'
+  id: 6fe1
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '2'
+  id: 6fe2
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '3'
+  id: 6fe3
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '4'
+  id: 6fe4
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '5'
+  id: 6fe5
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '6'
+  id: 6fe6
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '7'
+  id: 6fe7
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '0'
+  id: 6ff8
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '4'
+  id: 6ffc
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '5'
+  id: 6ffd
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '6'
+  id: 6ffe
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '0'
+  id: 6f1d
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R2PCIe Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '1'
+  id: 6f34
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R2PCIe Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '5'
+  id: 6f1e
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '6'
+  id: 6f7d
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '7'
+  id: 6f1f
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '12'
+  fn: '0'
+  id: 6fa0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Home Agent 0 (rev 03)'
+- bus: ff
+  dev: '12'
+  fn: '1'
+  id: 6f30
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Home Agent 0 (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '0'
+  id: 6fa8
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '1'
+  id: 6f71
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '2'
+  id: 6faa
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '3'
+  id: 6fab
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '4'
+  id: 6fac
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '5'
+  id: 6fad
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '6'
+  id: 6fae
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Broadcast (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '7'
+  id: 6faf
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Global Broadcast (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '0'
+  id: 6fb0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 0 Thermal Control (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '1'
+  id: 6fb1
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 1 Thermal Control (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '2'
+  id: 6fb2
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 0 Error (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '3'
+  id: 6fb3
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 1 Error (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '4'
+  id: 6fbc
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '5'
+  id: 6fbd
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '6'
+  id: 6fbe
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '7'
+  id: 6fbf
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '0'
+  id: 6fb4
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 2 Thermal Control (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '1'
+  id: 6fb5
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 3 Thermal Control (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '2'
+  id: 6fb6
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 2 Error (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '3'
+  id: 6fb7
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 3 Error (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '0'
+  id: 6f98
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '1'
+  id: 6f99
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '2'
+  id: 6f9a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '3'
+  id: 6fc0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '4'
+  id: 6f9c
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1f
+  fn: '0'
+  id: 6f88
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1f
+  fn: '2'
+  id: 6f8a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform.json b/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform.json
new file mode 100644
index 000000000000..29e11388382c
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform.json
@@ -0,0 +1,499 @@
+{
+    "chassis": {
+        "name": "7220 IXR-H4",
+        "components": [
+            {
+                "name": "BIOS"
+            },
+            {
+                "name": "SMB_FPGA"
+            },
+            {
+                "name": "UDB_FPGA"
+            },
+            {
+                "name": "LDB_FPGA"
+            },
+            {
+                "name": "SMB_CPLD"
+            },
+            {
+                "name": "UDB_CPLD1"
+            },
+            {
+                "name": "UDB_CPLD2"
+            },
+            {
+                "name": "LDB_CPLD1"
+            },
+            {
+                "name": "LDB_CPLD2"
+            },
+            {
+                "name": "FAN_CPLD"
+            },
+            {
+                "name": "PDBL_CPLD"
+            },
+            {
+                "name": "PDBR_CPLD"
+            },
+            {
+                "name": "SCM_CPLD"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fan1",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan2",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan3",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan4",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan5",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan6",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan7",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan8",
+                "status_led": {
+                    "controllable": false
+                }
+            }
+        ],
+        "fan_drawers": [
+            {
+                "name": "drawer1",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan1",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan2",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer2",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan3",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan4",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer3",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan5",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan6",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer4",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan7",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan8",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "PSU1",
+                "status_led": {
+                    "controllable": false
+                },
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "temperature": false
+            },
+            {
+                "name": "PSU2",
+                "status_led": {
+                    "controllable": false
+                },
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "temperature": false
+            }
+        ],
+        "thermals": [
+            {
+                "name": "MAC Rear",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MAC Under",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "UDB Front",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "UDB Rear",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "LDB Front",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "LDB Rear",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "PSU Left",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "PSU Right",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "FAN Left",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "FAN Right",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MAC TH4",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            }
+        ],
+        "sfps": [
+            {
+                "name": "QSFPDD_1"
+            },
+            {
+                "name": "QSFPDD_2"
+            },
+            {
+                "name": "QSFPDD_3"
+            },
+            {
+                "name": "QSFPDD_4"
+            },
+            {
+                "name": "QSFPDD_5"
+            },
+            {
+                "name": "QSFPDD_6"
+            },
+            {
+                "name": "QSFPDD_7"
+            },
+            {
+                "name": "QSFPDD_8"
+            },
+            {
+                "name": "QSFPDD_9"
+            },
+            {
+                "name": "QSFPDD_10"
+            },
+            {
+                "name": "QSFPDD_11"
+            },
+            {
+                "name": "QSFPDD_12"
+            },
+            {
+                "name": "QSFPDD_13"
+            },
+            {
+                "name": "QSFPDD_14"
+            },
+            {
+                "name": "QSFPDD_15"
+            },
+            {
+                "name": "QSFPDD_16"
+            },
+            {
+                "name": "QSFPDD_17"
+            },
+            {
+                "name": "QSFPDD_18"
+            },
+            {
+                "name": "QSFPDD_19"
+            },
+            {
+                "name": "QSFPDD_20"
+            },
+            {
+                "name": "QSFPDD_21"
+            },
+            {
+                "name": "QSFPDD_22"
+            },
+            {
+                "name": "QSFPDD_23"
+            },
+            {
+                "name": "QSFPDD_24"
+            },
+            {
+                "name": "QSFPDD_25"
+            },
+            {
+                "name": "QSFPDD_26"
+            },
+            {
+                "name": "QSFPDD_27"
+            },
+            {
+                "name": "QSFPDD_28"
+            },
+            {
+                "name": "QSFPDD_29"
+            },
+            {
+                "name": "QSFPDD_30"
+            },
+            {
+                "name": "QSFPDD_31"
+            },
+            {
+                "name": "QSFPDD_32"
+            },
+            {
+                "name": "QSFPDD_33"
+            },
+            {
+                "name": "QSFPDD_34"
+            },
+            {
+                "name": "QSFPDD_35"
+            },
+            {
+                "name": "QSFPDD_36"
+            },
+            {
+                "name": "QSFPDD_37"
+            },
+            {
+                "name": "QSFPDD_38"
+            },
+            {
+                "name": "QSFPDD_39"
+            },
+            {
+                "name": "QSFPDD_40"
+            },
+            {
+                "name": "QSFPDD_41"
+            },
+            {
+                "name": "QSFPDD_42"
+            },
+            {
+                "name": "QSFPDD_43"
+            },
+            {
+                "name": "QSFPDD_44"
+            },
+            {
+                "name": "QSFPDD_45"
+            },
+            {
+                "name": "QSFPDD_46"
+            },
+            {
+                "name": "QSFPDD_47"
+            },
+            {
+                "name": "QSFPDD_48"
+            },
+            {
+                "name": "QSFPDD_49"
+            },
+            {
+                "name": "QSFPDD_50"
+            },
+            {
+                "name": "QSFPDD_51"
+            },
+            {
+                "name": "QSFPDD_52"
+            },
+            {
+                "name": "QSFPDD_53"
+            },
+            {
+                "name": "QSFPDD_54"
+            },
+            {
+                "name": "QSFPDD_55"
+            },
+            {
+                "name": "QSFPDD_56"
+            },
+            {
+                "name": "QSFPDD_57"
+            },
+            {
+                "name": "QSFPDD_58"
+            },
+            {
+                "name": "QSFPDD_59"
+            },
+            {
+                "name": "QSFPDD_60"
+            },
+            {
+                "name": "QSFPDD_61"
+            },
+            {
+                "name": "QSFPDD_62"
+            },
+            {
+                "name": "QSFPDD_63"
+            },
+            {
+                "name": "QSFPDD_64"
+            },
+            {
+                "name": "SFP+_0"
+            },
+            {
+                "name": "SFP+_1"
+            }
+       	]
+    },
+    "interfaces": {}
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform_asic b/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform_asic
new file mode 100644
index 000000000000..960467652765
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform_env.conf b/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform_env.conf
new file mode 100644
index 000000000000..b4f7155e6b1d
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform_env.conf
@@ -0,0 +1,3 @@
+SYNCD_SHM_SIZE=512m
+is_ltsw_chip=1
+
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/plugins/eeprom.py b/device/nokia/x86_64-nokia_ixr7220_h4-r0/plugins/eeprom.py
new file mode 100644
index 000000000000..6e2aad4f52d8
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/plugins/eeprom.py
@@ -0,0 +1,16 @@
+try:
+    import os
+    from sonic_eeprom import eeprom_tlvinfo
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class board(eeprom_tlvinfo.TlvInfoDecoder):
+
+    def __init__(self, name, path, cpld_root, ro):
+        self.eeprom_path = "/sys/bus/i2c/devices/20-0051/eeprom"
+        if not os.path.exists(self.eeprom_path):
+            file = "/sys/bus/i2c/devices/i2c-20/new_device"
+            with open(file, 'w') as f:
+                f.write('24c32 0x51\n')
+        super(board, self).__init__(self.eeprom_path, 0, '', True)
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/plugins/led_control.py b/device/nokia/x86_64-nokia_ixr7220_h4-r0/plugins/led_control.py
new file mode 100644
index 000000000000..ee11694ab003
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/plugins/led_control.py
@@ -0,0 +1,58 @@
+"""
+    led_control.py
+
+    Platform-specific LED control functionality for SONiC
+"""
+
+try:
+    from sonic_led.led_control_base import LedControlBase
+    import os
+    import time
+    import syslog
+    import struct
+    from mmap import *
+    import sonic_platform.platform
+    import sonic_platform.chassis
+except ImportError as e:
+    raise ImportError(str(e) + " - required module not found")
+
+SYS_LED_PATH = "/sys/devices/platform/sys_fpga/led_sys"
+
+def DBG_PRINT(str):
+    syslog.openlog("nokia-led")
+    syslog.syslog(syslog.LOG_INFO, str)
+    syslog.closelog()
+
+class LedControl(LedControlBase):
+    """Platform specific LED control class"""
+
+    # Constructor
+    def __init__(self):
+        self.chassis = sonic_platform.platform.Platform().get_chassis()
+        self._initDefaultConfig()
+
+    def _initDefaultConfig(self):
+        # The fan tray leds and system led managed by new chassis class API
+        # leaving only a couple other front panel leds to be done old style
+        DBG_PRINT("starting system leds")
+        self._initSystemLed()
+        DBG_PRINT(" led done")
+
+    def _write_sysfs_file(self, sysfs_file, value):
+        # On successful write, the value read will be written on
+        # reg_name and on failure returns 'ERR'
+        rv = 'ERR'
+
+        if (not os.path.isfile(sysfs_file)):
+            return rv
+        try:
+            with open(sysfs_file, 'w') as fd:
+                rv = fd.write(str(value))
+        except Exception as e:
+            rv = 'ERR'
+
+        return rv
+    
+    def _initSystemLed(self):
+        # Write sys led
+        status = self._write_sysfs_file(SYS_LED_PATH, "8")
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/system_health_monitoring_config.json b/device/nokia/x86_64-nokia_ixr7220_h4-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000000..d5f3a7b98304
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/system_health_monitoring_config.json
@@ -0,0 +1,14 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu.temperature"
+    ],
+    "user_defined_checkers": [],
+    "polling_interval": 60,
+    "led_color": {
+        "fault": "amber",
+        "normal": "green",
+        "booting": "blinking green"
+    }
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/thermal_policy.json b/device/nokia/x86_64-nokia_ixr7220_h4-r0/thermal_policy.json
new file mode 100644
index 000000000000..7a55ce734861
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/thermal_policy.json
@@ -0,0 +1,66 @@
+{   
+    "thermal_control_algorithm": {
+        "run_at_boot_up": "false",
+        "fan_speed_when_suspend": "70"
+    },
+    "info_types": [
+        {
+            "type": "fan_info"
+        },
+        {
+            "type": "thermal_info"
+        },
+        {
+            "type": "chassis_info"
+        }
+    ],
+    "policies": [
+        {
+            "name": "any fan absence",
+            "conditions": [
+                {
+                    "type": "fan.any.absence"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "thermal_control.control",
+                    "status": "false"
+                },
+                {
+                    "type": "fan.all.set_speed",
+                    "speed": "90"
+                }
+            ]
+        },
+        {
+            "name": "all fan presence",
+            "conditions": [
+                {
+                    "type": "fan.all.presence"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "thermal.temp_check_and_set_all_fan_speed",
+                    "default_speed": "50",
+                    "threshold1_speed": "70",
+                    "hightemp_speed": "90"
+                }
+            ]
+        },
+	{
+            "name": "temp over high critical threshold",
+            "conditions": [
+                {
+                    "type": "thermal.over.high_critical_threshold"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "switch.shutdown"
+                }
+            ]
+        }
+    ]
+}
diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk
index d1b6d52b4d35..91168dd6ded8 100755
--- a/platform/broadcom/one-image.mk
+++ b/platform/broadcom/one-image.mk
@@ -86,6 +86,7 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \
                                $(NOKIA_IXR7250_PLATFORM_MODULE) \
                                $(NOKIA_IXR7220H3_PLATFORM_MODULE) \
                                $(NOKIA_IXR7220H4_32D_PLATFORM_MODULE) \
+                               $(NOKIA_IXR7220H4_64D_PLATFORM_MODULE) \
                                $(NOKIA_IXR7220H5_64D_PLATFORM_MODULE) \
                                $(TENCENT_TCS8400_PLATFORM_MODULE) \
                                $(TENCENT_TCS9400_PLATFORM_MODULE) \
diff --git a/platform/broadcom/platform-modules-nokia.mk b/platform/broadcom/platform-modules-nokia.mk
index 10c556917c8d..b671de058441 100644
--- a/platform/broadcom/platform-modules-nokia.mk
+++ b/platform/broadcom/platform-modules-nokia.mk
@@ -3,11 +3,13 @@
 NOKIA_IXR7250_PLATFORM_MODULE_VERSION = 1.0
 NOKIA_IXR7220H3_PLATFORM_MODULE_VERSION = 1.0
 NOKIA_IXR7220H4_32D_PLATFORM_MODULE_VERSION = 1.0
+NOKIA_IXR7220H4_64D_PLATFORM_MODULE_VERSION = 1.0
 NOKIA_IXR7220H5_64D_PLATFORM_MODULE_VERSION = 1.0
 
 export NOKIA_IXR7250_PLATFORM_MODULE_VERSION
 export NOKIA_IXR7220H3_PLATFORM_MODULE_VERSION
 export NOKIA_IXR7220H4_32D_PLATFORM_MODULE_VERSION
+export NOKIA_IXR7220H4_64D_PLATFORM_MODULE_VERSION
 export NOKIA_IXR7220H5_64D_PLATFORM_MODULE_VERSION
 
 NOKIA_IXR7250_PLATFORM_MODULE = sonic-platform-nokia-chassis_$(NOKIA_IXR7250_PLATFORM_MODULE_VERSION)_amd64.deb
@@ -27,6 +29,11 @@ $(NOKIA_IXR7220H4_32D_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADE
 $(NOKIA_IXR7220H4_32D_PLATFORM_MODULE)_PLATFORM = x86_64-nokia_ixr7220_h4_32d-r0
 $(eval $(call add_extra_package,$(NOKIA_IXR7250_PLATFORM_MODULE),$(NOKIA_IXR7220H4_32D_PLATFORM_MODULE)))
 
+NOKIA_IXR7220H4_64D_PLATFORM_MODULE = sonic-platform-nokia-ixr7220h4-64d_$(NOKIA_IXR7220H4_64D_PLATFORM_MODULE_VERSION)_amd64.deb
+$(NOKIA_IXR7220H4_64D_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) 
+$(NOKIA_IXR7220H4_64D_PLATFORM_MODULE)_PLATFORM = x86_64-nokia_ixr7220_h4-r0
+$(eval $(call add_extra_package,$(NOKIA_IXR7250_PLATFORM_MODULE),$(NOKIA_IXR7220H4_64D_PLATFORM_MODULE)))
+
 NOKIA_IXR7220H5_64D_PLATFORM_MODULE = sonic-platform-nokia-ixr7220h5-64d_$(NOKIA_IXR7220H5_64D_PLATFORM_MODULE_VERSION)_amd64.deb
 $(NOKIA_IXR7220H5_64D_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) 
 $(NOKIA_IXR7220H5_64D_PLATFORM_MODULE)_PLATFORM = x86_64-nokia_ixr7220_h5_64d-r0
diff --git a/platform/broadcom/sonic-platform-modules-nokia b/platform/broadcom/sonic-platform-modules-nokia
index a04cc6b2291a..b3ff7c08a431 160000
--- a/platform/broadcom/sonic-platform-modules-nokia
+++ b/platform/broadcom/sonic-platform-modules-nokia
@@ -1 +1 @@
-Subproject commit a04cc6b2291ad23ae26ad45dfcaed2715dde05b3
+Subproject commit b3ff7c08a431a76c72ed14cd257e90219f1ec576

From ae2194bcb74b3b0aa19da02edd7ca191a75b3662 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 17 Oct 2024 16:01:07 +0800
Subject: [PATCH 106/364] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20532)

#### Why I did it
src/sonic-utilities
```
* 244a1885 - (HEAD -> master, origin/master, origin/HEAD) Update the .NET core version to 8.0 (#3280) (21 hours ago) [Saikrishna Arcot]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 319f58d5d5db..244a18853f56 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 319f58d5d5dbe86e2f0aeece67b8274dcd3f3ce8
+Subproject commit 244a18853f56d40ad8460455fc20f9352402d022

From 4913865e6a9d0d950efc56e4f76cb10e94711f23 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 17 Oct 2024 16:01:12 +0800
Subject: [PATCH 107/364] [submodule] Update submodule sonic-swss to the latest
 HEAD automatically (#20531)

#### Why I did it
src/sonic-swss
```
* 90fceadf - (HEAD -> master, origin/master, origin/HEAD) [tests] Attempt to fix compatibility break from SAI headers (#3321) (10 hours ago) [Kamil Cudnik]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 55fd3f18f82e..90fceadf7565 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 55fd3f18f82ebb7fbbc4a935d36d2a746176fffe
+Subproject commit 90fceadf75654501e5fb2d9726344c6e0d0d0a86

From 51947ae90f85fd22bbc6345ff010f9579e0ee92c Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 17 Oct 2024 16:01:24 +0800
Subject: [PATCH 108/364] [submodule] Update submodule sonic-gnmi to the latest
 HEAD automatically (#20516)

#### Why I did it
src/sonic-gnmi
```
* 743c7af - (HEAD -> master, origin/master, origin/HEAD) Update dbus timeout (#305) (26 hours ago) [ganglv]
* 470e275 - Use version of gocov supported by sonic-gnmi (#300) (2 days ago) [Zain Budhwani]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 2b7f8a1b712c..743c7afac122 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 2b7f8a1b712cfc83b28d434eede9a3be30532c78
+Subproject commit 743c7afac122d07701de9077150edd22b72a265c

From e257ee645cc198b46d36949c92641d3a984acb40 Mon Sep 17 00:00:00 2001
From: Philo <135693886+philo-micas@users.noreply.github.com>
Date: Fri, 18 Oct 2024 02:59:02 +0800
Subject: [PATCH 109/364] [Micas/Platform]platform support M2-W6510-48GT4V
 (#20328)

* [Micas/Platform]platform support M2-W6510-48GT4V

Signed-off-by: philo <philo@micasnetworks.com>

* update debian files

Signed-off-by: philo <philo@micasnetworks.com>

* update permitted_list

Signed-off-by: philo <philo@micasnetworks.com>

* update system_health_monitoring_config.json

Signed-off-by: philo <philo@micasnetworks.com>

---------

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../M2-W6510-48GT4V/port_config.ini           |  53 +
 .../M2-W6510-48GT4V/sai.profile               |   1 +
 ...td3-m2-w6510-48gt4v-48x1G+4x25G.config.bcm | 251 +++++
 .../cust_fru.py                               | 135 +++
 .../custom_led.bin                            | Bin 0 -> 228 bytes
 .../default_sku                               |   1 +
 .../x86_64-micas_m2-w6510-48gt4v-r0/dev.xml   | 190 ++++
 .../dev_exhaust.xml                           | 190 ++++
 .../x86_64-micas_m2-w6510-48gt4v-r0/fru.py    | 961 ++++++++++++++++++
 .../installer.conf                            |   4 +
 .../led_proc_init.soc                         |   2 +
 .../media_settings.json                       |  56 +
 .../monitor.py                                | 457 +++++++++
 .../x86_64-micas_m2-w6510-48gt4v-r0/pcie.yaml | 172 ++++
 .../platform.json                             | 195 ++++
 .../platform_asic                             |   1 +
 .../platform_components.json                  |  13 +
 .../platform_env.conf                         |   1 +
 .../plugins/sfputil.py                        | 249 +++++
 .../plugins/ssd_util.py                       | 112 ++
 .../pmon_daemon_control.json                  |   3 +
 .../postinit_cmd_file.soc                     |  29 +
 .../preinit_cmd_file.soc                      |   2 +
 .../system_health_monitoring_config.json      |  11 +
 platform/broadcom/one-image.mk                |   3 +-
 platform/broadcom/platform-modules-micas.mk   |   8 +
 .../common/sonic_platform/fan.py              |  70 +-
 .../common/sonic_platform/thermal.py          |  33 +-
 .../debian/control                            |   4 +
 ...form-modules-micas-m2-w6510-48gt4v.install |   1 +
 ...orm-modules-micas-m2-w6510-48gt4v.postinst |  10 +
 .../debian/rule.mk                            |   1 +
 .../m2-w6510-48gt4v/Makefile                  |  28 +
 .../x86_64_micas_m2_w6510_48gt4v_r0_config.py | 754 ++++++++++++++
 ...64_micas_m2_w6510_48gt4v_r0_port_config.py |  12 +
 .../x86_64_micas_m2_w6510_48gt4v_r0_device.py | 607 +++++++++++
 ...micas_m2_w6510_48gt4v_r0_exhaust_device.py | 607 +++++++++++
 ...icas_m2_w6510_48gt4v_r0_exhaust_monitor.py | 141 +++
 ...x86_64_micas_m2_w6510_48gt4v_r0_monitor.py | 141 +++
 .../m2-w6510-48gt4v/modules/driver/Makefile   |  10 +
 .../modules/driver/wb_i2c_dev_device.c        | 145 +++
 .../driver/wb_i2c_mux_pca954x_device.c        | 146 +++
 .../modules/driver/wb_io_dev_device.c         | 138 +++
 .../modules/driver/wb_lpc_drv_device.c        | 150 +++
 .../modules/driver/wb_wdt_device.c            | 130 +++
 .../plat_sysfs_cfg/WB_PLAT_CPLD.cfg           |  40 +
 .../plat_sysfs_cfg/WB_PLAT_FAN.cfg            | 112 ++
 .../plat_sysfs_cfg/WB_PLAT_PSU.cfg            |  64 ++
 .../plat_sysfs_cfg/WB_PLAT_SFF.cfg            |  54 +
 .../plat_sysfs_cfg/cfg_file_name              |   4 +
 .../service/set-eth-mac.service               |  14 +
 .../m2-w6510-48gt4v/setup.py                  |  39 +
 src/sonic-device-data/tests/permitted_list    |   4 +
 53 files changed, 6548 insertions(+), 11 deletions(-)
 create mode 100755 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/port_config.ini
 create mode 100755 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/sai.profile
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/td3-m2-w6510-48gt4v-48x1G+4x25G.config.bcm
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/cust_fru.py
 create mode 100755 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/custom_led.bin
 create mode 100755 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/default_sku
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/dev.xml
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/dev_exhaust.xml
 create mode 100755 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/fru.py
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/installer.conf
 create mode 100755 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/led_proc_init.soc
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/media_settings.json
 create mode 100755 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/monitor.py
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/pcie.yaml
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform.json
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform_asic
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform_components.json
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform_env.conf
 create mode 100755 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/plugins/sfputil.py
 create mode 100755 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/plugins/ssd_util.py
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/pmon_daemon_control.json
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/postinit_cmd_file.soc
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/preinit_cmd_file.soc
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48gt4v-r0/system_health_monitoring_config.json
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48gt4v.install
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48gt4v.postinst
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/Makefile
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/config/x86_64_micas_m2_w6510_48gt4v_r0_config.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/config/x86_64_micas_m2_w6510_48gt4v_r0_port_config.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_device.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_exhaust_device.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_exhaust_monitor.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_monitor.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_i2c_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_i2c_mux_pca954x_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_io_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_lpc_drv_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_wdt_device.c
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_FAN.cfg
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_PSU.cfg
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_SFF.cfg
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/cfg_file_name
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/service/set-eth-mac.service
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/setup.py

diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/port_config.ini b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/port_config.ini
new file mode 100755
index 000000000000..46414e44002e
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/port_config.ini
@@ -0,0 +1,53 @@
+# name          lanes                alias                     index      speed
+Ethernet1       26                  gigabitE0/1                 0          1000
+Ethernet2       25                  gigabitE0/2                 1          1000
+Ethernet3       28                  gigabitE0/3                 2          1000
+Ethernet4       27                  gigabitE0/4                 3          1000
+Ethernet5       30                  gigabitE0/5                 4          1000
+Ethernet6       29                  gigabitE0/6                 5          1000
+Ethernet7       32                  gigabitE0/7                 6          1000
+Ethernet8       31                  gigabitE0/8                 7          1000
+Ethernet9       34                  gigabitE0/9                 8          1000
+Ethernet10      33                  gigabitE0/10                9          1000
+Ethernet11      36                  gigabitE0/11                10         1000
+Ethernet12      35                  gigabitE0/12                11         1000
+Ethernet13      38                  gigabitE0/13                12         1000
+Ethernet14      37                  gigabitE0/14                13         1000
+Ethernet15      40                  gigabitE0/15                14         1000
+Ethernet16      39                  gigabitE0/16                15         1000
+Ethernet17      42                  gigabitE0/17                16         1000
+Ethernet18      41                  gigabitE0/18                17         1000
+Ethernet19      44                  gigabitE0/19                18         1000
+Ethernet20      43                  gigabitE0/20                19         1000
+Ethernet21      50                  gigabitE0/21                20         1000
+Ethernet22      49                  gigabitE0/22                21         1000
+Ethernet23      52                  gigabitE0/23                22         1000
+Ethernet24      51                  gigabitE0/24                23         1000
+Ethernet25      1                   gigabitE0/25                24         1000
+Ethernet26      2                   gigabitE0/26                25         1000
+Ethernet27      3                   gigabitE0/27                26         1000
+Ethernet28      4                   gigabitE0/28                27         1000
+Ethernet29      5                   gigabitE0/29                28         1000
+Ethernet30      6                   gigabitE0/30                29         1000
+Ethernet31      7                   gigabitE0/31                30         1000
+Ethernet32      8                   gigabitE0/32                31         1000
+Ethernet33      9                   gigabitE0/33                32         1000
+Ethernet34      10                  gigabitE0/34                33         1000
+Ethernet35      11                  gigabitE0/35                34         1000
+Ethernet36      12                  gigabitE0/36                35         1000
+Ethernet37      13                  gigabitE0/37                36         1000
+Ethernet38      14                  gigabitE0/38                37         1000
+Ethernet39      15                  gigabitE0/39                38         1000
+Ethernet40      16                  gigabitE0/40                39         1000
+Ethernet41      17                  gigabitE0/41                40         1000
+Ethernet42      18                  gigabitE0/42                41         1000
+Ethernet43      19                  gigabitE0/43                42         1000
+Ethernet44      20                  gigabitE0/44                43         1000
+Ethernet45      21                  gigabitE0/45                44         1000
+Ethernet46      22                  gigabitE0/46                45         1000
+Ethernet47      23                  gigabitE0/47                46         1000
+Ethernet48      24                  gigabitE0/48                47         1000
+Ethernet49      58               twentyfiveGigE0/1              48         25000
+Ethernet50      57               twentyfiveGigE0/2              49         25000
+Ethernet51      60               twentyfiveGigE0/3              50         25000
+Ethernet52      59               twentyfiveGigE0/4              51         25000
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/sai.profile b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/sai.profile
new file mode 100755
index 000000000000..158552500fc6
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-m2-w6510-48gt4v-48x1G+4x25G.config.bcm
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/td3-m2-w6510-48gt4v-48x1G+4x25G.config.bcm b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/td3-m2-w6510-48gt4v-48x1G+4x25G.config.bcm
new file mode 100644
index 000000000000..9423645cf1e6
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/M2-W6510-48GT4V/td3-m2-w6510-48gt4v-48x1G+4x25G.config.bcm
@@ -0,0 +1,251 @@
+sai_load_hw_config=/usr/share/sonic/platform/cancun/sdk6.5.24/
+sai_postinit_cmd_file=/usr/share/sonic/platform/postinit_cmd_file.soc
+sai_preinit_cmd_file=/usr/share/sonic/platform/preinit_cmd_file.soc 
+
+#Basic configuration
+cache_coherency_check=0
+core_clock_to_pm_clock_factor=1
+#core_clock_frequency=495
+core_clock_frequency=445
+flowtracker_ipfix_observation_domain_id=1
+flowtracker_num_unique_user_entry_keys=10
+ifp_inports_support_enable=1
+ipv6_lpm_128b_enable=0x1
+l2delete_chunks=4096
+l2_mem_entries=32768
+#L2MODE_POLL for L2X thread
+l2xmsg_mode=0
+l3_alpm_enable=2
+l3_max_ecmp_mode=1
+l3_mem_entries=16384
+os=unix
+port_flex_enable=1
+
+#fix  No resources for operation
+stable_size=200000000
+scache_filename=/var/warmboot/wbscache
+stable_location=3
+warmboot_knet_shutdown_mode=1
+
+#RDMA
+sai_pfc_defaults_disable=1
+sai_optimized_mmu=1
+
+#ACL wb count
+ctr_evict_enable=0
+
+#tcam optimization for svi
+sai_nbr_bcast_ifp_optimized=2
+svi_my_station_optimization=1
+
+#support rif stats
+sai_stats_support_mask=0x1
+
+pbmp_xport_xe=0x001FFFFFFFFFFFFE
+
+#GPORT0
+portmap_1.0=1:1
+phy_port_primary_and_offset_1=0x0100
+portmap_2.0=2:1
+phy_port_primary_and_offset_2=0x0101
+portmap_3.0=3:1
+phy_port_primary_and_offset_3=0x0102
+portmap_4.0=4:1
+phy_port_primary_and_offset_4=0x0103
+
+portmap_5.0=5:1
+phy_port_primary_and_offset_5=0x0500
+portmap_6.0=6:1
+phy_port_primary_and_offset_6=0x0501
+portmap_7.0=7:1
+phy_port_primary_and_offset_7=0x0502
+portmap_8.0=8:1
+phy_port_primary_and_offset_8=0x0503
+
+#GPORT1
+portmap_9.0=9:1
+phy_port_primary_and_offset_9=0x0900
+portmap_10.0=10:1
+phy_port_primary_and_offset_10=0x0901
+portmap_11.0=11:1
+phy_port_primary_and_offset_11=0x0902
+portmap_12.0=12:1
+phy_port_primary_and_offset_12=0x0903
+portmap_13.0=13:1
+phy_port_primary_and_offset_13=0x0d00
+portmap_14.0=14:1
+phy_port_primary_and_offset_14=0x0d01
+portmap_15.0=15:1
+phy_port_primary_and_offset_15=0x0d02
+portmap_16.0=16:1
+phy_port_primary_and_offset_16=0x0d03
+
+#GPORT2
+portmap_17.0=17:1
+phy_port_primary_and_offset_17=0x1100
+portmap_18.0=18:1
+phy_port_primary_and_offset_18=0x1101
+portmap_19.0=19:1
+phy_port_primary_and_offset_19=0x1102
+portmap_20.0=20:1
+phy_port_primary_and_offset_20=0x1103
+portmap_21.0=21:1
+phy_port_primary_and_offset_21=0x1500
+portmap_22.0=22:1
+phy_port_primary_and_offset_22=0x1501
+portmap_23.0=23:1
+phy_port_primary_and_offset_23=0x1502
+portmap_24.0=24:1
+phy_port_primary_and_offset_24=0x1503
+
+#PM4x10Q0
+
+port_phy_addr_25=0x21
+port_phy_addr_26=0x22
+port_phy_addr_27=0x23
+port_phy_addr_28=0x24
+port_phy_addr_29=0x25
+port_phy_addr_30=0x26
+port_phy_addr_31=0x27
+port_phy_addr_32=0x28
+
+port_phy_addr_33=0x2a
+port_phy_addr_34=0x2b
+port_phy_addr_35=0x2c
+port_phy_addr_36=0x2d
+port_phy_addr_37=0x2e
+port_phy_addr_38=0x2f
+port_phy_addr_39=0x30
+port_phy_addr_40=0x31
+
+port_phy_addr_41=0x33
+port_phy_addr_42=0x34
+port_phy_addr_43=0x35
+port_phy_addr_44=0x36
+port_phy_addr_45=0x37
+port_phy_addr_46=0x38
+port_phy_addr_47=0x39
+port_phy_addr_48=0x3a
+
+phy_port_primary_and_offset_25=0x0100
+phy_port_primary_and_offset_26=0x0101
+phy_port_primary_and_offset_27=0x0102
+phy_port_primary_and_offset_28=0x0103
+phy_port_primary_and_offset_29=0x0104
+phy_port_primary_and_offset_30=0x0105
+phy_port_primary_and_offset_31=0x0106
+phy_port_primary_and_offset_32=0x0107
+
+phy_port_primary_and_offset_33=0x0a00
+phy_port_primary_and_offset_34=0x0a01
+phy_port_primary_and_offset_35=0x0a02
+phy_port_primary_and_offset_36=0x0a03
+phy_port_primary_and_offset_37=0x0a04
+phy_port_primary_and_offset_38=0x0a05
+phy_port_primary_and_offset_39=0x0a06
+phy_port_primary_and_offset_40=0x0a07
+
+phy_port_primary_and_offset_41=0x1300
+phy_port_primary_and_offset_42=0x1301
+phy_port_primary_and_offset_43=0x1302
+phy_port_primary_and_offset_44=0x1303
+phy_port_primary_and_offset_45=0x1304
+phy_port_primary_and_offset_46=0x1305
+phy_port_primary_and_offset_47=0x1306
+phy_port_primary_and_offset_48=0x1307
+
+
+port_gmii_mode{25}=1
+portmap_25.0=25:1
+portmap_26.0=26:1
+portmap_27.0=27:1
+portmap_28.0=28:1
+portmap_29.0=29:1
+portmap_30.0=30:1
+portmap_31.0=31:1
+portmap_32.0=32:1
+portmap_33.0=33:1
+portmap_34.0=34:1
+portmap_35.0=35:1
+portmap_36.0=36:1
+portmap_37.0=37:1
+portmap_38.0=38:1
+portmap_39.0=39:1
+portmap_40.0=40:1
+
+#PM4x10Q1
+port_gmii_mode{41}=1
+portmap_41.0=41:1
+portmap_42.0=42:1
+portmap_43.0=43:1
+portmap_44.0=44:1
+portmap_45.0=49:1
+portmap_46.0=50:1
+portmap_47.0=51:1
+portmap_48.0=52:1
+
+#PM4x25
+portmap_49.0=57:25
+portmap_50.0=58:25
+portmap_51.0=59:25
+portmap_52.0=60:25
+
+#Gport0-5 gt
+dport_map_port_1=25
+dport_map_port_2=26
+dport_map_port_3=27
+dport_map_port_4=28
+dport_map_port_5=29
+dport_map_port_6=30
+dport_map_port_7=31
+dport_map_port_8=32
+dport_map_port_9=33
+dport_map_port_10=34
+dport_map_port_11=35
+dport_map_port_12=36
+dport_map_port_13=37
+dport_map_port_14=38
+dport_map_port_15=39
+dport_map_port_16=40
+dport_map_port_17=41
+dport_map_port_18=42
+dport_map_port_19=43
+dport_map_port_20=44
+dport_map_port_21=45
+dport_map_port_22=46
+dport_map_port_23=47
+dport_map_port_24=48
+
+#PM4x10Q0 gt
+dport_map_port_25=2
+dport_map_port_26=1
+dport_map_port_27=4
+dport_map_port_28=3
+dport_map_port_29=6
+dport_map_port_30=5
+dport_map_port_31=8
+dport_map_port_32=7
+dport_map_port_33=10
+dport_map_port_34=9
+dport_map_port_35=12
+dport_map_port_36=11
+dport_map_port_37=14
+dport_map_port_38=13
+dport_map_port_39=16
+dport_map_port_40=15
+
+#PM4x10Q1 gt
+dport_map_port_41=18
+dport_map_port_42=17
+dport_map_port_43=20
+dport_map_port_44=19
+dport_map_port_45=22
+dport_map_port_46=21
+dport_map_port_47=24
+dport_map_port_48=23
+
+#PM4x25 fiber
+dport_map_port_49=50
+dport_map_port_50=49
+dport_map_port_51=52
+dport_map_port_52=51
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/cust_fru.py b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/cust_fru.py
new file mode 100644
index 000000000000..940c722ce467
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/cust_fru.py
@@ -0,0 +1,135 @@
+#!/usr/bin/python
+# -*- coding: utf-8 -*-
+import sys
+import os
+
+
+class CustFruException(Exception):
+    def __init__(self, message='custfrueerror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+
+class CustFru():
+    MAGIC_HEAD_INFO = 0x7a
+
+    _CUST_MAGIC_OFFSET = 0
+    _CUST_MAGIC_LEN = 1
+    _CUST_VERSION_OFFSET = 1
+    _CUST_VERSION_LEN = 6
+    _CUST_CRC_OFFSET = 7
+    _CUST_CRC_LEN = 1
+    _CUST_PRODUCT_NAME_OFFSET = 10
+    _CUST_PRODUCT_NAME_LEN = 17
+    _CUST_MANUFACTURER_OFFSET = 27
+    _CUST_MANUFACTURER_LEN = 7
+    _CUST_SERIAL_NUMBER_OFFSET = 34
+    _CUST_SERIAL_NUMBER_LEN = 25
+    _CUST_INPUT_TYPE_OFFSET = 78
+    _CUST_INPUT_TYPE_LEN = 2
+    _CUST_INPUT_OFFSET = 86
+    _CUST_INPUT_LEN = 15
+    _CUST_OUTPUT_OFFSET = 108
+    _CUST_OUTPUT_LEN = 11
+    _CUST_POWER_OFFSET = 200
+    _CUST_POWER_LEN = 10
+    _CUST_MANUFACTURER_DATE_OFFSET = 210
+    _CUST_MANUFACTURER_DATE_LEN = 3
+
+    def __init__(self):
+        self.magic = ""
+        self.version = ""
+        self.crc = ""
+        self.product_name = ""
+        self.manufacturer = ""
+        self.serial_number = ""
+        self.input_type = ""
+        self.input = ""
+        self.output = ""
+        self.power = ""
+        self.manufacturer_date = ""
+
+    def checksum(self, v):
+        result = 0
+        for item in v:
+            result += ord(item)
+        return (result & 0xff)
+
+    def decode(self, e2):
+        # header
+        e2_index = 0
+        head = ord(e2[0])
+        if head != self.MAGIC_HEAD_INFO:
+            raise CustFruException("Customization fru eeprom head info error, head:0x%x" % head, -10)
+        self.magic = "0x%02x" % self.MAGIC_HEAD_INFO
+
+        # version
+        version = "%s" % (e2[self._CUST_VERSION_OFFSET:self._CUST_VERSION_OFFSET + self._CUST_VERSION_LEN])
+        self.version = version.replace("\xff", "").strip()
+
+        # crc
+        crc_calc = self.checksum(e2[0:self._CUST_CRC_OFFSET])
+        if crc_calc != ord(e2[self._CUST_CRC_OFFSET]):
+            raise CustFruException("Customization fru eeprom crc check error, calc: 0x%x, read: 0x%x" % (crc_calc, ord(e2[self._CUST_CRC_OFFSET])), -10)
+        self.crc = crc_calc
+
+        # Product Name
+        product_name = "%s" % (e2[self._CUST_PRODUCT_NAME_OFFSET:self._CUST_PRODUCT_NAME_OFFSET + self._CUST_PRODUCT_NAME_LEN])
+        self.product_name = product_name.replace("\xff", "").strip()
+
+        # manufacturer
+        manufacturer = "%s" % (e2[self._CUST_MANUFACTURER_OFFSET:self._CUST_MANUFACTURER_OFFSET + self._CUST_MANUFACTURER_LEN])
+        self.manufacturer = manufacturer.strip()
+
+        # serial_number
+        serial_number = "%s" % (e2[self._CUST_SERIAL_NUMBER_OFFSET:self._CUST_SERIAL_NUMBER_OFFSET + self._CUST_SERIAL_NUMBER_LEN])
+        self.serial_number = serial_number.strip()
+
+        # input_type
+        input_type = "%s" % (e2[self._CUST_INPUT_TYPE_OFFSET:self._CUST_INPUT_TYPE_OFFSET + self._CUST_INPUT_TYPE_LEN])
+        self.input_type = input_type.strip()
+
+        # input
+        input = "%s" % (e2[self._CUST_INPUT_OFFSET:self._CUST_INPUT_OFFSET + self._CUST_INPUT_LEN])
+        self.input = input.strip()
+
+        # output
+        output = "%s" % (e2[self._CUST_OUTPUT_OFFSET:self._CUST_OUTPUT_OFFSET + self._CUST_OUTPUT_LEN])
+        self.output = output.strip()
+
+        # power
+        power = "%s" % (e2[self._CUST_POWER_OFFSET:self._CUST_POWER_OFFSET + self._CUST_POWER_LEN])
+        self.power = power.replace("\xff", "").strip()
+
+        # manufacturer_date
+        manufacturer_year = ord(e2[self._CUST_MANUFACTURER_DATE_OFFSET]) + 2000
+        manufacturer_month = ord(e2[self._CUST_MANUFACTURER_DATE_OFFSET + 1])
+        manufacturer_day = ord(e2[self._CUST_MANUFACTURER_DATE_OFFSET + 2])
+        self.manufacturer_date = "%04d-%02d-%02d" % (manufacturer_year, manufacturer_month, manufacturer_day)
+
+        return
+
+
+    def __str__(self):
+        formatstr = "Version            : %s      \n" \
+                    "Product Name       : %s      \n" \
+                    "Manufacturer       : %s      \n" \
+                    "Serial Number      : %s      \n" \
+                    "AC/DC Power Module : %s      \n" \
+                    "INPUT              : %s      \n" \
+                    "OUTPUT             : %s      \n" \
+                    "POWER              : %s      \n" \
+                    "Manufacturer Date  : %s      \n"
+        str_tmp = formatstr % (self.version,
+                            self.product_name,
+                            self.manufacturer,
+                            self.serial_number,
+                            self.input_type,
+                            self.input,
+                            self.output,
+                            self.power,
+                            self.manufacturer_date)
+        return str_tmp.replace("\x00","")
+
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/custom_led.bin
new file mode 100755
index 0000000000000000000000000000000000000000..5cdcccbfdd88d2f34df2aa252659b7b051acf285
GIT binary patch
literal 228
zcmWN~yH3IY7=Y35FSV$Mh<GV-6-wozCbXCcH~>Qj2Ny;iXk7XZI2&Vp14wv>CXU8|
zl>yj@F>%t#gg7|sd4aQh4w1Z!;#Dye^Ndt0kRLj+2Wbxc5t{dUeeeC=kmocw6`K=v
zdh29b{Z79<@Ey<YDwbM%?0n87M?nnRln=4yemDK*Q_*H|Y3q|-*u8R}+@G(6jP>`P
zTK--vU+&H!&H)LMq)3w?%OSb{$e@795k*Rrsc=jc3!54Wf=U356;=td&Ketp*d)vr
U5w?l4LySFk(b=a#oeP@$0W(Z3djJ3c

literal 0
HcmV?d00001

diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/default_sku b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/default_sku
new file mode 100755
index 000000000000..3987b26027f6
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/default_sku
@@ -0,0 +1 @@
+M2-W6510-48GT4V l2
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/dev.xml b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/dev.xml
new file mode 100644
index 000000000000..20e53bc1fc28
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/dev.xml
@@ -0,0 +1,190 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--
+      ### type  1 result/1000
+          type  2 result/100
+          type  3 read bit
+     ### property need check must add int front
+-->
+<catalog>
+    <fans>
+        <fan id="fan1" >
+            <property name="present" location="/sys/wb_plat/fan/fan1/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan1/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/8-0053/eeprom"/>
+            <property name="Speed" location="/sys/wb_plat/fan/fan1/motor0/speed"/>
+        </fan>
+        <fan id="fan2" >
+            <property name="present" location="/sys/wb_plat/fan/fan2/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan2/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/9-0053/eeprom"/>
+            <property name="Speed" location="/sys/wb_plat/fan/fan2/motor0/speed"/>
+        </fan>
+    </fans>
+    <temps>
+        <temp id="INLET_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/6-0049/hwmon/*/temp1_input" type="1" addend="-7"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/6-0049/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/6-0049/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="OUTLET_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/6-0048/hwmon/*/temp1_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/6-0048/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/6-0048/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+    </temps>
+    <psus>
+        <custpsu id="psu1" >
+            <property name="present" location="/sys/wb_plat/psu/psu1/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu1/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="custfru"  location="/sys/bus/i2c/devices/7-0056/eeprom"/>
+        </custpsu>
+        <custpsu id="psu2" >
+            <property name="present" location="/sys/wb_plat/psu/psu2/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu2/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="custfru"  location="/sys/bus/i2c/devices/7-0057/eeprom"/>
+        </custpsu> 
+    </psus> 
+    <dcdcs>
+        <dcdc id="VDD_CORE_0.8V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/17-0058/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.893" />
+            <property name="dcdc_min"   gettype="config" value="0.784" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="PVCCP" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/0-0068/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.364" />
+            <property name="dcdc_min"   gettype="config" value="0.468" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="PVNN" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/0-0068/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.364" />
+            <property name="dcdc_min"   gettype="config" value="0.585" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="P1V05" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/0-006e/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.155" />
+            <property name="dcdc_min"   gettype="config" value="0.945" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VCCRAM" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/0-006e/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.320" />
+            <property name="dcdc_min"   gettype="config" value="0.675" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="P1V2_VDDQ" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/0-005e/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.320" />
+            <property name="dcdc_min"   gettype="config" value="1.080" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="CPU_VDD1.8V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/3-0040/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.980" />
+            <property name="dcdc_min"   gettype="config" value="1.620" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="P3V3_STBY" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/3-0040/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.630" />
+            <property name="dcdc_min"   gettype="config" value="2.970" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="P5V_AUX" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/3-0040/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="5.500" />
+            <property name="dcdc_min"   gettype="config" value="4.500" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD1.2V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/3-0041/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.260" />
+            <property name="dcdc_min"   gettype="config" value="1.140" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD1.8V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/3-0041/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.890" />
+            <property name="dcdc_min"   gettype="config" value="1.710" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD3.3V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/3-0041/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.600" />
+            <property name="dcdc_min"   gettype="config" value="3.200" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD1.0V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/3-0042/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.071" />
+            <property name="dcdc_min"   gettype="config" value="0.969" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD3.3V_SFP" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/3-0042/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.600" />
+            <property name="dcdc_min"   gettype="config" value="3.200" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VAN_0.8V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/3-0042/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.893" />
+            <property name="dcdc_min"   gettype="config" value="0.784" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+    </dcdcs>
+    <mactemps>
+        <mactemp id="MAC_DIE_0" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/18-0044/hwmon/hwmon*/temp1_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_1" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/18-0044/hwmon/hwmon*/temp2_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_2" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/18-0044/hwmon/hwmon*/temp3_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_3" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/18-0044/hwmon/hwmon*/temp4_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_4" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/18-0044/hwmon/hwmon*/temp5_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_5" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/18-0044/hwmon/hwmon*/temp6_input"  type="1"/>
+        </mactemp>
+    </mactemps>
+    <cpus location="/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*"/>
+    <decode>
+    <fanpresent>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </fanpresent>
+    <fanstatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </fanstatus>
+    <psucheck>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </psucheck>
+    <psustatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </psustatus>
+    <psutype>
+        <code key="PA150II-F" value="PA150II-F"/>
+        <code key="PD150II-F" value="PD150II-F"/>
+        <code key="PA150II-R" value="PA150II-R"/>
+        <code key="PD150II-R" value="PD150II-R"/>
+    </psutype>
+    <fan_display_name>
+        <code key="M1LFAN I-F" value="M1LFAN I-F"/>
+        <code key="M1LFAN I-R" value="M1LFAN I-R"/>
+    </fan_display_name>
+    </decode>
+</catalog>
+
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/dev_exhaust.xml b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/dev_exhaust.xml
new file mode 100644
index 000000000000..a0939f5ba077
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/dev_exhaust.xml
@@ -0,0 +1,190 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--
+      ### type  1 result/1000
+          type  2 result/100
+          type  3 read bit
+     ### property need check must add int front
+-->
+<catalog>
+    <fans>
+        <fan id="fan1" >
+            <property name="present" location="/sys/wb_plat/fan/fan1/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan1/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/8-0053/eeprom"/>
+            <property name="Speed" location="/sys/wb_plat/fan/fan1/motor0/speed"/>
+        </fan>
+        <fan id="fan2" >
+            <property name="present" location="/sys/wb_plat/fan/fan2/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan2/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/9-0053/eeprom"/>
+            <property name="Speed" location="/sys/wb_plat/fan/fan2/motor0/speed"/>
+        </fan>
+    </fans>
+    <temps>
+        <temp id="INLET_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/6-0048/hwmon/*/temp1_input" type="1" addend="-7"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/6-0048/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/6-0048/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="OUTLET_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/6-0049/hwmon/*/temp1_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/6-0049/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/6-0049/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+    </temps>
+    <psus>
+        <custpsu id="psu1" >
+            <property name="present" location="/sys/wb_plat/psu/psu1/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu1/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="custfru"  location="/sys/bus/i2c/devices/7-0056/eeprom"/>
+        </custpsu>
+        <custpsu id="psu2" >
+            <property name="present" location="/sys/wb_plat/psu/psu2/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu2/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="custfru"  location="/sys/bus/i2c/devices/7-0057/eeprom"/>
+        </custpsu> 
+    </psus> 
+    <dcdcs>
+        <dcdc id="VDD_CORE_0.8V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/17-0058/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.893" />
+            <property name="dcdc_min"   gettype="config" value="0.784" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="PVCCP" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/0-0068/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.364" />
+            <property name="dcdc_min"   gettype="config" value="0.468" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="PVNN" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/0-0068/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.364" />
+            <property name="dcdc_min"   gettype="config" value="0.585" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="P1V05" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/0-006e/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.155" />
+            <property name="dcdc_min"   gettype="config" value="0.945" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VCCRAM" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/0-006e/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.320" />
+            <property name="dcdc_min"   gettype="config" value="0.675" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="P1V2_VDDQ" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/0-005e/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.320" />
+            <property name="dcdc_min"   gettype="config" value="1.080" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="CPU_VDD1.8V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/3-0040/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.980" />
+            <property name="dcdc_min"   gettype="config" value="1.620" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="P3V3_STBY" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/3-0040/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.630" />
+            <property name="dcdc_min"   gettype="config" value="2.970" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="P5V_AUX" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/3-0040/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="5.500" />
+            <property name="dcdc_min"   gettype="config" value="4.500" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD1.2V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/3-0041/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.260" />
+            <property name="dcdc_min"   gettype="config" value="1.140" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD1.8V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/3-0041/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.890" />
+            <property name="dcdc_min"   gettype="config" value="1.710" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD3.3V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/3-0041/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.600" />
+            <property name="dcdc_min"   gettype="config" value="3.200" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD1.0V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/3-0042/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.071" />
+            <property name="dcdc_min"   gettype="config" value="0.969" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD3.3V_SFP" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/3-0042/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.600" />
+            <property name="dcdc_min"   gettype="config" value="3.200" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VAN_0.8V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/3-0042/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.893" />
+            <property name="dcdc_min"   gettype="config" value="0.784" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+    </dcdcs>
+    <mactemps>
+        <mactemp id="MAC_DIE_0" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/18-0044/hwmon/hwmon*/temp1_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_1" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/18-0044/hwmon/hwmon*/temp2_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_2" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/18-0044/hwmon/hwmon*/temp3_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_3" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/18-0044/hwmon/hwmon*/temp4_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_4" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/18-0044/hwmon/hwmon*/temp5_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_5" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/18-0044/hwmon/hwmon*/temp6_input"  type="1"/>
+        </mactemp>
+    </mactemps>
+    <cpus location="/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*"/>
+    <decode>
+    <fanpresent>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </fanpresent>
+    <fanstatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </fanstatus>
+    <psucheck>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </psucheck>
+    <psustatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </psustatus>
+    <psutype>
+        <code key="PA150II-F" value="PA150II-F"/>
+        <code key="PD150II-F" value="PD150II-F"/>
+        <code key="PA150II-R" value="PA150II-R"/>
+        <code key="PD150II-R" value="PD150II-R"/>
+    </psutype>
+    <fan_display_name>
+        <code key="M1LFAN I-F" value="M1LFAN I-F"/>
+        <code key="M1LFAN I-R" value="M1LFAN I-R"/>
+    </fan_display_name>
+    </decode>
+</catalog>
+
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/fru.py b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/fru.py
new file mode 100755
index 000000000000..f95164e03601
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/fru.py
@@ -0,0 +1,961 @@
+#!/usr/bin/python3
+import collections
+from datetime import datetime, timedelta
+from bitarray import bitarray
+
+
+__DEBUG__ = "N"
+
+
+class FruException(Exception):
+    def __init__(self, message='fruerror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+
+def e_print(err):
+    print("ERROR: " + err)
+
+
+def d_print(debug_info):
+    if __DEBUG__ == "Y":
+        print(debug_info)
+
+
+class FruUtil():
+    @staticmethod
+    def decodeLength(value):
+        a = bitarray(8)
+        a.setall(True)
+        a[0:1] = 0
+        a[1:2] = 0
+        x = ord(a.tobytes())
+        return x & ord(value)
+
+    @staticmethod
+    def minToData():
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        endtime = datetime.now()
+        seconds = (endtime - starttime).total_seconds()
+        mins = seconds // 60
+        m = int(round(mins))
+        return m
+
+    @staticmethod
+    def getTimeFormat():
+        return datetime.now().strftime('%Y-%m-%d')
+
+    @staticmethod
+    def getTypeLength(value):
+        if value is None or len(value) == 0:
+            return 0
+        a = bitarray(8)
+        a.setall(False)
+        a[0:1] = 1
+        a[1:2] = 1
+        x = ord(a.tobytes())
+        return x | len(value)
+
+    @staticmethod
+    def checksum(b):
+        result = 0
+        for item in b:
+            result += ord(item)
+        return (0x100 - (result & 0xff)) & 0xff
+
+
+class BaseArea(object):
+    SUGGESTED_SIZE_COMMON_HEADER = 8
+    SUGGESTED_SIZE_INTERNAL_USE_AREA = 72
+    SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32
+    SUGGESTED_SIZE_BOARD_INFO_AREA = 80
+    SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80
+
+    INITVALUE = b'\x00'
+    resultvalue = INITVALUE * 256
+    COMMON_HEAD_VERSION = b'\x01'
+    __childList = None
+
+    def __init__(self, name="", size=0, offset=0):
+        self.__childList = []
+        self._offset = offset
+        self.name = name
+        self._size = size
+        self._isPresent = False
+        self._data = b'\x00' * size
+
+    @property
+    def childList(self):
+        return self.__childList
+
+    @childList.setter
+    def childList(self, value):
+        self.__childList = value
+
+    @property
+    def offset(self):
+        return self._offset
+
+    @offset.setter
+    def offset(self, value):
+        self._offset = value
+
+    @property
+    def size(self):
+        return self._size
+
+    @size.setter
+    def size(self, value):
+        self._size = value
+
+    @property
+    def data(self):
+        return self._data
+
+    @data.setter
+    def data(self, value):
+        self._data = value
+
+    @property
+    def isPresent(self):
+        return self._isPresent
+
+    @isPresent.setter
+    def isPresent(self, value):
+        self._isPresent = value
+
+
+class InternalUseArea(BaseArea):
+    pass
+
+
+class ChassisInfoArea(BaseArea):
+    pass
+
+
+class BoardInfoArea(BaseArea):
+    _boardTime = None
+    _fields = None
+    _mfg_date = None
+    areaversion = None
+    _boardversion = None
+    _language = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "mfg_date            : %s \n" \
+                    "boardManufacturer   : %s \n" \
+                    "boardProductName    : %s \n" \
+                    "boardSerialNumber   : %s \n" \
+                    "boardPartNumber     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.boardversion), self.size,
+                              self.language, self.getMfgRealData(),
+                              self.boardManufacturer, self.boardProductName,
+                              self.boardSerialNumber, self.boardPartNumber,
+                              self.fruFileId)
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "boardextra%d         : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["boardversion"] = ord(self.boardversion)
+        dic["boardlength"] = self.size
+        dic["boardlanguage"] = self.language
+        dic["boardmfg_date"] = self.getMfgRealData()
+        dic["boardManufacturer"] = self.boardManufacturer
+        dic["boardProductName"] = self.boardProductName
+        dic["boardSerialNumber"] = self.boardSerialNumber
+        dic["boardPartNumber"] = self.boardPartNumber
+        dic["boardfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]
+        index += 1
+        d_print("decode length :%d class size:%d" %
+                ((ord(self.data[index]) * 8), self.size))
+        index += 2
+
+        timetmp = self.data[index: index + 3]
+        self.mfg_date = ord(timetmp[0]) | (
+            ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16)
+        d_print("decode getMfgRealData :%s" % self.getMfgRealData())
+        index += 3
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardManufacturer:%s" % self.boardManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardProductName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardProductName:%s" % self.boardProductName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardSerialNumber:%s" % self.boardSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardPartNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardPartNumber:%s" % self.boardPartNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if self.data[index] != chr(0xc1):
+                templen = FruUtil.decodeLength(self.data[index])
+                tmpval = self.data[index + 1: index + templen + 1]
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+            else:
+                break
+
+    def fruSetValue(self, field, value):
+        tmp_field = getattr(self, field, None)
+        if tmp_field is not None:
+            setattr(self, field, value)
+
+    def recalcute(self):
+        d_print("boardInfoArea version:%x" % ord(self.boardversion))
+        d_print("boardInfoArea length:%d" % self.size)
+        d_print("boardInfoArea language:%x" % self.language)
+        self.mfg_date = FruUtil.minToData()
+        d_print("boardInfoArea mfg_date:%x" % self.mfg_date)
+
+        self.data = chr(ord(self.boardversion)) + \
+            chr(self.size // 8) + chr(self.language)
+
+        self.data += chr(self.mfg_date & 0xFF)
+        self.data += chr((self.mfg_date >> 8) & 0xFF)
+        self.data += chr((self.mfg_date >> 16) & 0xFF)
+
+        d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer)
+        typelength = FruUtil.getTypeLength(self.boardManufacturer)
+        self.data += chr(typelength)
+        self.data += self.boardManufacturer
+
+        d_print("boardInfoArea boardProductName:%s" % self.boardProductName)
+        self.data += chr(FruUtil.getTypeLength(self.boardProductName))
+        self.data += self.boardProductName
+
+        d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber))
+        self.data += self.boardSerialNumber
+
+        d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardPartNumber))
+        self.data += self.boardPartNumber
+
+        d_print("boardInfoArea fruFileId:%s" % self.fruFileId)
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is not None:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) // 8 + 1
+            self.size += incr * 8
+
+        self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+        d_print("self data:%d" % len(self.data))
+        d_print("self size:%d" % self.size)
+        d_print("adjust size:%d" % (self.size - len(self.data) - 1))
+        self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+
+        # checksum
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+    def getMfgRealData(self):
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        mactime = starttime + timedelta(minutes=self.mfg_date)
+        return mactime
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def mfg_date(self):
+        return self._mfg_date
+
+    @mfg_date.setter
+    def mfg_date(self, val):
+        self._mfg_date = val
+
+    @property
+    def boardversion(self):
+        self._boardversion = self.COMMON_HEAD_VERSION
+        return self._boardversion
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, val):
+        self._FRUFileID = val
+
+    @property
+    def boardPartNumber(self):
+        return self._boardPartNumber
+
+    @boardPartNumber.setter
+    def boardPartNumber(self, val):
+        self._boardPartNumber = val
+
+    @property
+    def boardSerialNumber(self):
+        return self._boardSerialNumber
+
+    @boardSerialNumber.setter
+    def boardSerialNumber(self, val):
+        self._boardSerialNumber = val
+
+    @property
+    def boardProductName(self):
+        return self._boradProductName
+
+    @boardProductName.setter
+    def boardProductName(self, val):
+        self._boradProductName = val
+
+    @property
+    def boardManufacturer(self):
+        return self._boardManufacturer
+
+    @boardManufacturer.setter
+    def boardManufacturer(self, val):
+        self._boardManufacturer = val
+
+    @property
+    def boardTime(self):
+        return self._boardTime
+
+    @boardTime.setter
+    def boardTime(self, val):
+        self._boardTime = val
+
+    @property
+    def fields(self):
+        return self._fields
+
+    @fields.setter
+    def fields(self, val):
+        self._fields = val
+
+
+class ProductInfoArea(BaseArea):
+    _productManufacturer = None
+    _productAssetTag = None
+    _FRUFileID = None
+    _language = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "productManufacturer : %s \n" \
+                    "productName         : %s \n" \
+                    "productPartModelName: %s \n" \
+                    "productVersion      : %s \n" \
+                    "productSerialNumber : %s \n" \
+                    "productAssetTag     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.areaversion), self.size,
+                              self.language, self.productManufacturer,
+                              self.productName, self.productPartModelName,
+                              self.productVersion, self.productSerialNumber,
+                              self.productAssetTag, self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "productextra%d       : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["productversion"] = ord(self.areaversion)
+        dic["productlength"] = self.size
+        dic["productlanguage"] = self.language
+        dic["productManufacturer"] = self.productManufacturer
+        dic["productName"] = self.productName
+        dic["productPartModelName"] = self.productPartModelName
+        dic["productVersion"] = int(self.productVersion, 16)
+        dic["productSerialNumber"] = self.productSerialNumber
+        dic["productAssetTag"] = self.productAssetTag
+        dic["productfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]  # 0
+        index += 1
+        d_print("decode length %d" % (ord(self.data[index]) * 8))
+        d_print("class size %d" % self.size)
+        index += 2
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productManufacturer:%s" % self.productManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productName:%s" % self.productName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productPartModelName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productPartModelName:%s" % self.productPartModelName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productVersion = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productVersion:%s" % self.productVersion)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productSerialNumber:%s" % self.productSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productAssetTag = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productAssetTag:%s" % self.productAssetTag)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if self.data[index] != chr(0xc1) and index < self.size - 1:
+                templen = FruUtil.decodeLength(self.data[index])
+                if templen == 0:
+                    break
+                tmpval = self.data[index + 1: index + templen + 1]
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+            else:
+                break
+
+    @property
+    def productVersion(self):
+        return self._productVersion
+
+    @productVersion.setter
+    def productVersion(self, name):
+        self._productVersion = name
+
+    @property
+    def areaversion(self):
+        self._areaversion = self.COMMON_HEAD_VERSION
+        return self._areaversion
+
+    @areaversion.setter
+    def areaversion(self, name):
+        self._areaversion = name
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def productManufacturer(self):
+        return self._productManufacturer
+
+    @productManufacturer.setter
+    def productManufacturer(self, name):
+        self._productManufacturer = name
+
+    @property
+    def productName(self):
+        return self._productName
+
+    @productName.setter
+    def productName(self, name):
+        self._productName = name
+
+    @property
+    def productPartModelName(self):
+        return self._productPartModelName
+
+    @productPartModelName.setter
+    def productPartModelName(self, name):
+        self._productPartModelName = name
+
+    @property
+    def productSerialNumber(self):
+        return self._productSerialNumber
+
+    @productSerialNumber.setter
+    def productSerialNumber(self, name):
+        self._productSerialNumber = name
+
+    @property
+    def productAssetTag(self):
+        return self._productAssetTag
+
+    @productAssetTag.setter
+    def productAssetTag(self, name):
+        self._productAssetTag = name
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, name):
+        self._FRUFileID = name
+
+    def fruSetValue(self, field, value):
+        tmp_field = getattr(self, field, None)
+        if tmp_field is not None:
+            setattr(self, field, value)
+
+    def recalcute(self):
+        d_print("product version:%x" % ord(self.areaversion))
+        d_print("product length:%d" % self.size)
+        d_print("product language:%x" % self.language)
+        self.data = chr(ord(self.areaversion)) + \
+            chr(self.size // 8) + chr(self.language)
+
+        typelength = FruUtil.getTypeLength(self.productManufacturer)
+        self.data += chr(typelength)
+        self.data += self.productManufacturer
+
+        self.data += chr(FruUtil.getTypeLength(self.productName))
+        self.data += self.productName
+
+        self.data += chr(FruUtil.getTypeLength(self.productPartModelName))
+        self.data += self.productPartModelName
+
+        self.data += chr(FruUtil.getTypeLength(self.productVersion))
+        self.data += self.productVersion
+
+        self.data += chr(FruUtil.getTypeLength(self.productSerialNumber))
+        self.data += self.productSerialNumber
+
+        self.data += chr(FruUtil.getTypeLength(self.productAssetTag))
+        if self.productAssetTag is not None:
+            self.data += self.productAssetTag
+
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea productextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is not None:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) // 8 + 1
+            self.size += incr * 8
+        d_print("self.data:%d" % len(self.data))
+        d_print("self.size:%d" % self.size)
+
+        self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+        self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+
+class MultiRecordArea(BaseArea):
+    pass
+
+
+class Field(object):
+
+    def __init__(self, fieldType="ASCII", fieldData=""):
+        self.fieldData = fieldData
+        self.fieldType = fieldType
+
+    @property
+    def fieldType(self):
+        return self.fieldType
+
+    @property
+    def fieldData(self):
+        return self.fieldData
+
+
+class ipmifru(BaseArea):
+    _BoardInfoArea = None
+    _ProductInfoArea = None
+    _InternalUseArea = None
+    _ChassisInfoArea = None
+    _multiRecordArea = None
+    _productinfoAreaOffset = BaseArea.INITVALUE
+    _boardInfoAreaOffset = BaseArea.INITVALUE
+    _internalUserAreaOffset = BaseArea.INITVALUE
+    _chassicInfoAreaOffset = BaseArea.INITVALUE
+    _multiRecordAreaOffset = BaseArea.INITVALUE
+    _bindata = None
+    _bodybin = None
+    _version = BaseArea.COMMON_HEAD_VERSION
+    _zeroCheckSum = None
+    _frusize = 256
+
+    def __str__(self):
+        tmpstr = ""
+        if self.boardInfoArea.isPresent:
+            tmpstr += "\nboardinfoarea: \n"
+            tmpstr += self.boardInfoArea.__str__()
+        if self.productInfoArea.isPresent:
+            tmpstr += "\nproductinfoarea: \n"
+            tmpstr += self.productInfoArea.__str__()
+        return tmpstr
+
+    def decodeBin(self, eeprom):
+        commonHead = eeprom[0:8]
+        d_print("decode version %x" % ord(commonHead[0]))
+        if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]):
+            raise FruException("HEAD VERSION error,not Fru format!", -10)
+        if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]):
+            strtemp = "check header checksum error [cal:%02x data:%02x]" % (
+                FruUtil.checksum(commonHead[0:7]), ord(commonHead[7]))
+            raise FruException(strtemp, -3)
+        if ord(commonHead[1]) != ord(self.INITVALUE):
+            d_print("Internal Use Area is present")
+            self.internalUseArea = InternalUseArea(
+                name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA)
+            self.internalUseArea.isPresent = True
+            self.internalUserAreaOffset = ord(commonHead[1])
+            self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: (
+                self.internalUserAreaOffset * 8 + self.internalUseArea.size)]
+        if ord(commonHead[2]) != ord(self.INITVALUE):
+            d_print("Chassis Info Area is present")
+            self.chassisInfoArea = ChassisInfoArea(
+                name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA)
+            self.chassisInfoArea.isPresent = True
+            self.chassicInfoAreaOffset = ord(commonHead[2])
+            self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: (
+                self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)]
+        if ord(commonHead[3]) != ord(self.INITVALUE):
+            self.boardInfoArea = BoardInfoArea(
+                name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA)
+            self.boardInfoArea.isPresent = True
+            self.boardInfoAreaOffset = ord(commonHead[3])
+            self.boardInfoArea.size = ord(
+                eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8
+            d_print("Board Info Area is present size:%d" %
+                    (self.boardInfoArea.size))
+            self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: (
+                self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)]
+            if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]):
+                strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" %  \
+                    (FruUtil.checksum(
+                        self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.boardInfoArea.decodedata()
+        if ord(commonHead[4]) != ord(self.INITVALUE):
+            d_print("Product Info Area is present")
+            self.productInfoArea = ProductInfoArea(
+                name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA)
+            self.productInfoArea.isPresent = True
+            self.productinfoAreaOffset = ord(commonHead[4])
+            d_print("length offset value: %02x" %
+                    ord(eeprom[self.productinfoAreaOffset * 8 + 1]))
+            self.productInfoArea.size = ord(
+                eeprom[self.productinfoAreaOffset * 8 + 1]) * 8
+            d_print("Product Info Area is present size:%d" %
+                    (self.productInfoArea.size))
+
+            self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: (
+                self.productinfoAreaOffset * 8 + self.productInfoArea.size)]
+            if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]):
+                strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % (
+                    FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.productInfoArea.decodedata()
+        if ord(commonHead[5]) != ord(self.INITVALUE):
+            self.multiRecordArea = MultiRecordArea(
+                name="MultiRecord record Area ")
+            d_print("MultiRecord record present")
+            self.multiRecordArea.isPresent = True
+            self.multiRecordAreaOffset = ord(commonHead[5])
+            self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: (
+                self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)]
+
+    def initDefault(self):
+        self.version = self.COMMON_HEAD_VERSION
+        self.internalUserAreaOffset = self.INITVALUE
+        self.chassicInfoAreaOffset = self.INITVALUE
+        self.boardInfoAreaOffset = self.INITVALUE
+        self.productinfoAreaOffset = self.INITVALUE
+        self.multiRecordAreaOffset = self.INITVALUE
+        self.zeroCheckSum = self.INITVALUE
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        self.productInfoArea = None
+        self.internalUseArea = None
+        self.boardInfoArea = None
+        self.chassisInfoArea = None
+        self.multiRecordArea = None
+        # self.recalcute()
+
+    @property
+    def version(self):
+        return self._version
+
+    @version.setter
+    def version(self, name):
+        self._version = name
+
+    @property
+    def internalUserAreaOffset(self):
+        return self._internalUserAreaOffset
+
+    @internalUserAreaOffset.setter
+    def internalUserAreaOffset(self, obj):
+        self._internalUserAreaOffset = obj
+
+    @property
+    def chassicInfoAreaOffset(self):
+        return self._chassicInfoAreaOffset
+
+    @chassicInfoAreaOffset.setter
+    def chassicInfoAreaOffset(self, obj):
+        self._chassicInfoAreaOffset = obj
+
+    @property
+    def productinfoAreaOffset(self):
+        return self._productinfoAreaOffset
+
+    @productinfoAreaOffset.setter
+    def productinfoAreaOffset(self, obj):
+        self._productinfoAreaOffset = obj
+
+    @property
+    def boardInfoAreaOffset(self):
+        return self._boardInfoAreaOffset
+
+    @boardInfoAreaOffset.setter
+    def boardInfoAreaOffset(self, obj):
+        self._boardInfoAreaOffset = obj
+
+    @property
+    def multiRecordAreaOffset(self):
+        return self._multiRecordAreaOffset
+
+    @multiRecordAreaOffset.setter
+    def multiRecordAreaOffset(self, obj):
+        self._multiRecordAreaOffset = obj
+
+    @property
+    def zeroCheckSum(self):
+        return self._zeroCheckSum
+
+    @zeroCheckSum.setter
+    def zeroCheckSum(self, obj):
+        self._zeroCheckSum = obj
+
+    @property
+    def productInfoArea(self):
+        return self._ProductInfoArea
+
+    @productInfoArea.setter
+    def productInfoArea(self, obj):
+        self._ProductInfoArea = obj
+
+    @property
+    def internalUseArea(self):
+        return self._InternalUseArea
+
+    @internalUseArea.setter
+    def internalUseArea(self, obj):
+        self.internalUseArea = obj
+
+    @property
+    def boardInfoArea(self):
+        return self._BoardInfoArea
+
+    @boardInfoArea.setter
+    def boardInfoArea(self, obj):
+        self._BoardInfoArea = obj
+
+    @property
+    def chassisInfoArea(self):
+        return self._ChassisInfoArea
+
+    @chassisInfoArea.setter
+    def chassisInfoArea(self, obj):
+        self._ChassisInfoArea = obj
+
+    @property
+    def multiRecordArea(self):
+        return self._multiRecordArea
+
+    @multiRecordArea.setter
+    def multiRecordArea(self, obj):
+        self._multiRecordArea = obj
+
+    @property
+    def bindata(self):
+        return self._bindata
+
+    @bindata.setter
+    def bindata(self, obj):
+        self._bindata = obj
+
+    @property
+    def bodybin(self):
+        return self._bodybin
+
+    @bodybin.setter
+    def bodybin(self, obj):
+        self._bodybin = obj
+
+    def recalcuteCommonHead(self):
+        self.bindata = ""
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        d_print("common Header %d" % self.offset)
+        d_print("fru eeprom size  %d" % self._frusize)
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            self.internalUserAreaOffset = self.offset // 8
+            self.offset += self.internalUseArea.size
+            d_print("internalUseArea is present offset:%d" % self.offset)
+
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            self.chassicInfoAreaOffset = self.offset // 8
+            self.offset += self.chassisInfoArea.size
+            d_print("chassisInfoArea is present offset:%d" % self.offset)
+
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            self.boardInfoAreaOffset = self.offset // 8
+            self.offset += self.boardInfoArea.size
+            d_print("boardInfoArea is present offset:%d" % self.offset)
+            d_print("boardInfoArea is present size:%d" %
+                    self.boardInfoArea.size)
+
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            self.productinfoAreaOffset = self.offset // 8
+            self.offset += self.productInfoArea.size
+            d_print("productInfoArea is present offset:%d" % self.offset)
+
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            self.multiRecordAreaOffset = self.offset // 8
+            d_print("multiRecordArea is present offset:%d" % self.offset)
+
+        if self.internalUserAreaOffset == self.INITVALUE:
+            self.internalUserAreaOffset = 0
+        if self.productinfoAreaOffset == self.INITVALUE:
+            self.productinfoAreaOffset = 0
+        if self.chassicInfoAreaOffset == self.INITVALUE:
+            self.chassicInfoAreaOffset = 0
+        if self.boardInfoAreaOffset == self.INITVALUE:
+            self.boardInfoAreaOffset = 0
+        if self.multiRecordAreaOffset == self.INITVALUE:
+            self.multiRecordAreaOffset = 0
+
+        self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset
+                             - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff
+        d_print("zerochecksum:%x" % self.zeroCheckSum)
+        self.data = ""
+        self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr(
+            self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum)
+
+        self.bindata = self.data + self.bodybin
+        totallen = len(self.bindata)
+        d_print("totallen %d" % totallen)
+        if totallen < self._frusize:
+            self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0]))
+        else:
+            raise FruException('bin data more than %d' % self._frusize, -2)
+
+    def recalcutebin(self):
+        self.bodybin = ""
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            d_print("internalUseArea present")
+            self.bodybin += self.internalUseArea.data
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            d_print("chassisInfoArea present")
+            self.bodybin += self.chassisInfoArea.data
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            d_print("boardInfoArea present")
+            self.boardInfoArea.recalcute()
+            self.bodybin += self.boardInfoArea.data
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            d_print("productInfoAreapresent")
+            self.productInfoArea.recalcute()
+            self.bodybin += self.productInfoArea.data
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            d_print("multiRecordArea present")
+            self.bodybin += self.productInfoArea.data
+
+    def recalcute(self, fru_eeprom_size=256):
+        self._frusize = fru_eeprom_size
+        self.recalcutebin()
+        self.recalcuteCommonHead()
+
+    def setValue(self, area, field, value):
+        tmp_area = getattr(self, area, None)
+        if tmp_area is not None:
+            tmp_area.fruSetValue(field, value)
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/installer.conf b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/installer.conf
new file mode 100644
index 000000000000..7fd2c7a28d4e
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/installer.conf
@@ -0,0 +1,4 @@
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll intel_iommu=on iommu=pt sdhci.debug_quirks2=0x1cc modprobe.blacklist=i2c_ismt,i2c_i801,r8169,spi_intel,spi_intel_platform,spi_intel_pci,pnd2_edac"
+CONSOLE_PORT=0xe060
+CONSOLE_DEV=0
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/led_proc_init.soc b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/led_proc_init.soc
new file mode 100755
index 000000000000..139597f9cb07
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/led_proc_init.soc
@@ -0,0 +1,2 @@
+
+
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/media_settings.json b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/media_settings.json
new file mode 100644
index 000000000000..182cb3d69cb0
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/media_settings.json
@@ -0,0 +1,56 @@
+{
+    "PORT_MEDIA_SETTINGS": {
+        "48": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x00000041"
+                },
+                "post1": {
+                    "lane0": "0x00000014"
+                }
+            }
+        },
+        "49": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x00000041"
+                },
+                "post1": {
+                    "lane0": "0x00000014"
+                }
+            }
+        },
+        "50": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x00000041"
+                },
+                "post1": {
+                    "lane0": "0x00000014"
+                }
+            }
+        },
+        "51": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x00000041"
+                },
+                "post1": {
+                    "lane0": "0x00000014"
+                }
+            }
+        }
+    }
+}
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/monitor.py b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/monitor.py
new file mode 100755
index 000000000000..37ed2168e611
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/monitor.py
@@ -0,0 +1,457 @@
+#!/usr/bin/python3
+#   * onboard temperature sensors
+#   * FAN trays
+#   * PSU
+#
+import os
+import re
+from lxml import etree as ET
+import glob
+import json
+from decimal import Decimal
+from fru import ipmifru
+from cust_fru import CustFru
+
+
+MAILBOX_DIR = "/sys/bus/i2c/devices/"
+BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type"
+BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow"
+
+
+CONFIG_NAME = "dev.xml"
+
+
+def byteTostr(val):
+    strtmp = ''
+    for value in val:
+        strtmp += chr(value)
+    return strtmp
+
+
+def typeTostr(val):
+    if isinstance(val, bytes):
+        strtmp = byteTostr(val)
+        return strtmp
+    return val
+
+
+def get_board_id():
+    if not os.path.exists(BOARD_ID_PATH):
+        return "NA"
+    with open(BOARD_ID_PATH) as fd:
+        id_str = fd.read().strip()
+    return "0x%x" % (int(id_str, 10))
+
+
+def getboardairflow():
+    if not os.path.exists(BOARD_AIRFLOW_PATH):
+        return "NA"
+    with open(BOARD_AIRFLOW_PATH) as fd:
+        airflow_str = fd.read().strip()
+    data = json.loads(airflow_str)
+    airflow = data.get("board", "NA")
+    return airflow
+
+
+boardid = get_board_id()
+boardairflow = getboardairflow()
+
+
+DEV_XML_FILE_LIST = [
+    "dev_" + boardid + "_" + boardairflow + ".xml",
+    "dev_" + boardid + ".xml",
+    "dev_" + boardairflow + ".xml",
+]
+
+
+def dev_file_read(path, offset, read_len):
+    retval = "ERR"
+    val_list = []
+    msg = ""
+    ret = ""
+    fd = -1
+
+    if not os.path.exists(path):
+        return False, "%s %s not found" % (retval, path)
+
+    try:
+        fd = os.open(path, os.O_RDONLY)
+        os.lseek(fd, offset, os.SEEK_SET)
+        ret = os.read(fd, read_len)
+        for item in ret:
+            val_list.append(item)
+    except Exception as e:
+        msg = str(e)
+        return False, "%s %s" % (retval, msg)
+    finally:
+        if fd > 0:
+            os.close(fd)
+    return True, val_list
+
+
+def getPMCreg(location):
+    retval = 'ERR'
+    if not os.path.isfile(location):
+        return "%s %s  notfound" % (retval, location)
+    try:
+        with open(location, 'r') as fd:
+            retval = fd.read()
+    except Exception as error:
+        return "ERR %s" % str(error)
+
+    retval = retval.rstrip('\r\n')
+    retval = retval.lstrip(" ")
+    return retval
+
+
+# Get a mailbox register
+def get_pmc_register(reg_name):
+    retval = 'ERR'
+    mb_reg_file = reg_name
+    filepath = glob.glob(mb_reg_file)
+    if len(filepath) == 0:
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    mb_reg_file = filepath[0]
+    if not os.path.isfile(mb_reg_file):
+        # print mb_reg_file,  'not found !'
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    try:
+        with open(mb_reg_file, 'rb') as fd:
+            retval = fd.read()
+        retval = typeTostr(retval)
+    except Exception as error:
+        retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error))
+
+    retval = retval.rstrip('\r\n')
+    retval = retval.lstrip(" ")
+    return retval
+
+
+class checktype():
+    def __init__(self, test1):
+        self.test1 = test1
+
+    @staticmethod
+    def getValue(location, bit, data_type, coefficient=1, addend=0):
+        try:
+            value_t = get_pmc_register(location)
+            if value_t.startswith("ERR") or value_t.startswith("NA"):
+                return value_t
+            if data_type == 1:
+                return float('%.1f' % ((float(value_t) / 1000) + addend))
+            if data_type == 2:
+                return float('%.1f' % (float(value_t) / 100))
+            if data_type == 3:
+                psu_status = int(value_t, 16)
+                return (psu_status & (1 << bit)) >> bit
+            if data_type == 4:
+                return int(value_t, 10)
+            if data_type == 5:
+                return float('%.1f' % (float(value_t) / 1000 / 1000))
+            if data_type == 6:
+                return Decimal(float(value_t) * coefficient / 1000).quantize(Decimal('0.000'))
+            return value_t
+        except Exception as e:
+            value_t = "ERR %s" % str(e)
+            return value_t
+
+    # fanFRU
+    @staticmethod
+    def decodeBinByValue(retval):
+        fru = ipmifru()
+        fru.decodeBin(retval)
+        return fru
+
+    @staticmethod
+    def getfruValue(prob_t, root, val):
+        try:
+            ret, binval_bytes = dev_file_read(val, 0, 256)
+            if ret is False:
+                return binval_bytes
+            binval = byteTostr(binval_bytes)
+            fanpro = {}
+            ret = checktype.decodeBinByValue(binval)
+            fanpro['fan_type'] = ret.productInfoArea.productName
+            fanpro['hw_version'] = ret.productInfoArea.productVersion
+            fanpro['sn'] = ret.productInfoArea.productSerialNumber
+            fan_display_name_dict = status.getDecodValue(root, "fan_display_name")
+            fan_name = fanpro['fan_type'].strip()
+            if len(fan_display_name_dict) == 0:
+                return fanpro
+            if fan_name not in fan_display_name_dict:
+                prob_t['errcode'] = -1
+                prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name)
+            else:
+                fanpro['fan_type'] = fan_display_name_dict[fan_name]
+            return fanpro
+        except Exception as error:
+            return "ERR " + str(error)
+
+    @staticmethod
+    def getslotfruValue(val):
+        try:
+            binval = checktype.getValue(val, 0, 0)
+            if binval.startswith("ERR"):
+                return binval
+            slotpro = {}
+            ret = checktype.decodeBinByValue(binval)
+            slotpro['slot_type'] = ret.boardInfoArea.boardProductName
+            slotpro['hw_version'] = ret.boardInfoArea.boardextra1
+            slotpro['sn'] = ret.boardInfoArea.boardSerialNumber
+            return slotpro
+        except Exception as error:
+            return "ERR " + str(error)
+
+    @staticmethod
+    def getpsufruValue(prob_t, root, val):
+        try:
+            psu_match = False
+            binval = checktype.getValue(val, 0, 0)
+            if binval.startswith("ERR"):
+                return binval
+            psupro = {}
+            ret = checktype.decodeBinByValue(binval)
+            psupro['type1'] = ret.productInfoArea.productPartModelName
+            psupro['sn'] = ret.productInfoArea.productSerialNumber
+            psupro['hw_version'] = ret.productInfoArea.productVersion
+            psu_dict = status.getDecodValue(root, "psutype")
+            psupro['type1'] = psupro['type1'].strip()
+            if len(psu_dict) == 0:
+                return psupro
+            for psu_name, display_name in psu_dict.items():
+                if psu_name.strip() == psupro['type1']:
+                    psupro['type1'] = display_name
+                    psu_match = True
+                    break
+            if psu_match is not True:
+                prob_t['errcode'] = -1
+                prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1'])
+            return psupro
+        except Exception as error:
+            return "ERR " + str(error)
+
+    @staticmethod
+    def getpsucustfruValue(prob_t, root, val):
+        try:
+            psu_match = False
+            binval = checktype.getValue(val, 0, 0)
+            if binval.startswith("ERR"):
+                return binval
+            psupro = {}
+            custfru = CustFru()
+            custfru.decode(binval)
+            psupro['type1'] = custfru.product_name.strip()
+            psupro['sn'] = custfru.serial_number.strip().replace(chr(0), "")
+            psupro['hw_version'] = custfru.version.strip()
+            psu_dict = status.getDecodValue(root, "psutype")
+            psupro['type1'] = psupro['type1'].strip()
+            if len(psu_dict) == 0:
+                return psupro
+            for psu_name, display_name in psu_dict.items():
+                if psu_name.strip() == psupro['type1']:
+                    psupro['type1'] = display_name
+                    psu_match = True
+                    break
+            if psu_match is not True:
+                prob_t['errcode'] = -1
+                prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1'])
+            return psupro
+        except Exception as error:
+            return "ERR " + str(error)
+
+
+class status():
+    def __init__(self, productname):
+        self.productname = productname
+
+    @staticmethod
+    def getETroot(filename):
+        tree = ET.parse(filename)
+        root = tree.getroot()
+        return root
+
+    @staticmethod
+    def getDecodValue(collection, decode):
+        decodes = collection.find('decode')
+        testdecode = decodes.find(decode)
+        test = {}
+        if testdecode is None:
+            return test
+        for neighbor in testdecode.iter('code'):
+            test[neighbor.attrib["key"]] = neighbor.attrib["value"]
+        return test
+
+    @staticmethod
+    def getfileValue(location):
+        return checktype.getValue(location, " ", " ")
+
+    @staticmethod
+    def getETValue(a, filename, tagname):
+        root = status.getETroot(filename)
+        for neighbor in root.iter(tagname):
+            prob_t = {}
+            prob_t.update(neighbor.attrib)
+            prob_t['errcode'] = 0
+            prob_t['errmsg'] = ''
+            for pros in neighbor.iter("property"):
+                ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items()))
+                if ret.get('e2type') == 'fru' and ret.get("name") == "fru":
+                    fruval = checktype.getfruValue(prob_t, root, ret["location"])
+                    if isinstance(fruval, str) and fruval.startswith("ERR"):
+                        prob_t['errcode'] = -1
+                        prob_t['errmsg'] = fruval
+                        break
+                    prob_t.update(fruval)
+                    continue
+
+                if ret.get("name") == "psu" and ret.get('e2type') == 'fru':
+                    psuval = checktype.getpsufruValue(prob_t, root, ret["location"])
+                    if isinstance(psuval, str) and psuval.startswith("ERR"):
+                        prob_t['errcode'] = -1
+                        prob_t['errmsg'] = psuval
+                        break
+                    prob_t.update(psuval)
+                    continue
+
+                if ret.get("name") == "psu" and ret.get('e2type') == 'custfru':
+                    psuval = checktype.getpsucustfruValue(prob_t, root, ret["location"])
+                    if isinstance(psuval, str) and psuval.startswith("ERR"):
+                        prob_t['errcode'] = -1
+                        prob_t['errmsg'] = psuval
+                        break
+                    prob_t.update(psuval)
+                    continue
+
+                if ret.get("gettype") == "config":
+                    prob_t[ret["name"]] = ret["value"]
+                    continue
+
+                if 'type' not in ret.keys():
+                    val = "0"
+                else:
+                    val = ret["type"]
+                if 'bit' not in ret.keys():
+                    bit = "0"
+                else:
+                    bit = ret["bit"]
+                if 'coefficient' not in ret.keys():
+                    coefficient = 1
+                else:
+                    coefficient = float(ret["coefficient"])
+                if 'addend' not in ret.keys():
+                    addend = 0
+                else:
+                    addend = float(ret["addend"])
+
+                s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend)
+                if isinstance(s, str) and s.startswith("ERR"):
+                    prob_t['errcode'] = -1
+                    prob_t['errmsg'] = s
+                    break
+                if 'default' in ret.keys():
+                    rt = status.getDecodValue(root, ret['decode'])
+                    prob_t['errmsg'] = rt[str(s)]
+                    if str(s) != ret["default"]:
+                        prob_t['errcode'] = -1
+                        break
+                else:
+                    if 'decode' in ret.keys():
+                        rt = status.getDecodValue(root, ret['decode'])
+                        if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt):
+                            prob_t['errcode'] = -1
+                            prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" %
+                                                       (s.replace("\x00", "").rstrip()))
+                        else:
+                            s = rt[str(s).replace("\x00", "").rstrip()]
+                name = ret["name"]
+                prob_t[name] = str(s)
+            a.append(prob_t)
+
+    @staticmethod
+    def getCPUValue(a, filename, tagname):
+        root = status.getETroot(filename)
+        for neighbor in root.iter(tagname):
+            location = neighbor.attrib["location"]
+
+        filepath = glob.glob(location)
+        if len(filepath) == 0:
+            return
+        location = filepath[0]
+        L = []
+        for dirpath, dirnames, filenames in os.walk(location):
+            for file in filenames:
+                if file.endswith("_input"):
+                    b = re.findall(r'temp(\d+)_input', file)
+                    idx = int(b[0])
+                    L.append(idx)
+            L = sorted(L)
+        for idx in L:
+            prob_t = {}
+            prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, idx))
+            prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, idx))) / 1000
+            prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, idx))) / 1000
+            prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, idx))) / 1000
+            prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, idx))) / 1000
+            a.append(prob_t)
+
+    @staticmethod
+    def getFileName():
+        fpath = os.path.dirname(os.path.realpath(__file__))
+        for file in DEV_XML_FILE_LIST:
+            xml = fpath + "/" + file
+            if os.path.exists(xml):
+                return xml
+        return fpath + "/" + CONFIG_NAME
+
+    @staticmethod
+    def checkFan(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "fan"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getTemp(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "temp"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getPsu(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "psu"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getCustPsu(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "custpsu"
+        status.getETValue(ret, _filename, _tagname)
+
+
+    @staticmethod
+    def getcputemp(ret):
+        _filename = status.getFileName()
+        _tagname = "cpus"
+        status.getCPUValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getDcdc(ret):
+        _filename = status.getFileName()
+        _tagname = "dcdc"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getmactemp(ret):
+        _filename = status.getFileName()
+        _tagname = "mactemp"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getmacpower(ret):
+        _filename = status.getFileName()
+        _tagname = "macpower"
+        status.getETValue(ret, _filename, _tagname)
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/pcie.yaml
new file mode 100644
index 000000000000..03062f6be938
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/pcie.yaml
@@ -0,0 +1,172 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: '1980'
+  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev
+    11)'
+- bus: '00'
+  dev: '04'
+  fn: '0'
+  id: 19a1
+  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers
+    (rev 11)'
+- bus: '00'
+  dev: '05'
+  fn: '0'
+  id: 19a2
+  name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000
+    Series Root Complex Event Collector (rev 11)'
+- bus: '00'
+  dev: '06'
+  fn: '0'
+  id: 19a3
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT
+    Root Port (rev 11)'
+- bus: '00'
+  dev: 09
+  fn: '0'
+  id: 19a4
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #0 (rev 11)'
+- bus: '00'
+  dev: 0a
+  fn: '0'
+  id: 19a5
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #1 (rev 11)'
+- bus: '00'
+  dev: 0b
+  fn: '0'
+  id: 19a6
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #2 (rev 11)'
+- bus: '00'
+  dev: 0e
+  fn: '0'
+  id: 19a8
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #4 (rev 11)'
+- bus: '00'
+  dev: '12'
+  fn: '0'
+  id: 19ac
+  name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller
+    - Host (rev 11)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 19c2
+  name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller
+    1 (rev 11)'
+- bus: '00'
+  dev: '15'
+  fn: '0'
+  id: 19d0
+  name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI
+    Controller (rev 11)'
+- bus: '00'
+  dev: '16'
+  fn: '0'
+  id: 19d1
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
+    Root Port #0 (rev 11)'
+- bus: '00'
+  dev: '17'
+  fn: '0'
+  id: 19d2
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
+    Root Port #1 (rev 11)'
+- bus: '00'
+  dev: '18'
+  fn: '0'
+  id: 19d3
+  name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME
+    HECI 1 (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '0'
+  id: 19d8
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+    (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '1'
+  id: 19d8
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+    (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '2'
+  id: 19d8
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+    (rev 11)'
+- bus: '00'
+  dev: 1c
+  fn: '0'
+  id: 19db
+  name: 'SD Host controller: Intel Corporation Device 19db (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: 19dc
+  name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev
+    11)'
+- bus: '00'
+  dev: 1f
+  fn: '1'
+  id: 19dd
+  name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Primary
+    to Side Band (P2SB) Bridge (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '2'
+  id: 19de
+  name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management
+    Controller (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '4'
+  id: 19df
+  name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev
+    11)'
+- bus: '00'
+  dev: 1f
+  fn: '5'
+  id: 19e0
+  name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series
+    SPI Controller (rev 11)'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: 19e2
+  name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology
+    (rev 11)'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: b274
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b274 (rev 02)'
+- bus: '06'
+  dev: '00'
+  fn: '0'
+  id: 15c6
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 1GbE (rev
+    11)'
+- bus: '06'
+  dev: '00'
+  fn: '1'
+  id: 15c6
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 1GbE (rev
+    11)'
+- bus: '07'
+  dev: '00'
+  fn: '0'
+  id: 15c7
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 1GbE (rev
+    11)'
+- bus: '07'
+  dev: '00'
+  fn: '1'
+  id: 15c7
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 1GbE (rev
+    11)'
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform.json b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform.json
new file mode 100644
index 000000000000..a7920cf1590f
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform.json
@@ -0,0 +1,195 @@
+{
+    "chassis": {
+        "name": "M2-W6510-48GT4V",
+        "thermal_manager": false,
+        "status_led": {
+            "controllable": false,
+            "colors": ["green", "blinking_green", "amber", "blinking_amber"]
+        },
+        "components": [
+            {
+                "name": "CPU_CPLD"
+            },
+            {
+                "name": "CTRL_CPLD"
+            },
+            {
+                "name": "PORT_CPLD"
+            },
+            {
+                "name": "BIOS"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fantray1_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 40,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray2_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 40,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            }
+        ],
+        "fan_drawers":[
+            {
+                "name": "Fantray1",
+                "num_fans" : 1,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray1_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 40,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray2",
+                "num_fans" : 1,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray2_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 40,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "Psu1",
+                "voltage": false,
+                "current": false,
+                "power": false,
+                "max_power": false,
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "temperature": false,
+                "fans_target_speed": false,
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "PSU1_FAN1",
+                        "speed": {
+                            "controllable": false,
+                            "minimum": 40,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Psu2",
+                "voltage": false,
+                "current": false,
+                "power": false,
+                "max_power": false,
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "temperature": false,
+                "fans_target_speed": false,
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "PSU2_FAN1",
+                        "speed": {
+                            "controllable": false,
+                            "minimum": 40,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "ASIC_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "CPU_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "INLET_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "OUTLET_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            }
+        ],
+        "modules": [],
+        "sfps": []
+    },
+    "interfaces": {}
+}
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform_asic b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform_asic
new file mode 100644
index 000000000000..960467652765
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform_components.json
new file mode 100644
index 000000000000..1cb8ac1136f9
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform_components.json
@@ -0,0 +1,13 @@
+{
+    "chassis": {
+        "M2-W6510-48GT4V": {
+            "component": {
+                "CPU_CPLD": { },
+                "CTRL_CPLD": { },
+                "PORT_CPLD": { },
+                "BIOS": { }
+            }
+        }
+    }
+}
+
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform_env.conf b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform_env.conf
new file mode 100644
index 000000000000..283e1c0ce710
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/platform_env.conf
@@ -0,0 +1 @@
+usemsi=1
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/plugins/sfputil.py
new file mode 100755
index 000000000000..f7e00bb938e1
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/plugins/sfputil.py
@@ -0,0 +1,249 @@
+# sfputil.py
+#
+# Platform-specific SFP transceiver interface for SONiC
+#
+
+try:
+    import time
+    import os
+    import traceback
+    from sonic_sfp.sfputilbase import SfpUtilBase
+except ImportError as e:
+    raise ImportError("%s - required module not found" % str(e))
+
+class SfpUtil(SfpUtilBase):
+    """Platform-specific SfpUtil class"""
+
+    PORT_START = 0
+    PORT_END = 51
+    PORTS_IN_BLOCK = 52
+
+    EEPROM_OFFSET = -36
+    SFP_DEVICE_TYPE = "optoe2"
+    QSFP_DEVICE_TYPE = "optoe1"
+    I2C_MAX_ATTEMPT = 3
+
+    _port_to_eeprom_mapping = {}
+    port_to_i2cbus_mapping ={}
+
+    @property
+    def port_start(self):
+        return self.PORT_START
+
+    @property
+    def port_end(self):
+        return self.PORT_END
+
+    @property
+    def qsfp_ports(self):
+        return []
+
+    @property
+    def port_to_eeprom_mapping(self):
+        return self._port_to_eeprom_mapping
+
+    def __init__(self):
+        for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+            self.port_to_i2cbus_mapping[x] = x + self.EEPROM_OFFSET - 1
+        self.port_to_i2cbus_mapping[48] = 12
+        self.port_to_i2cbus_mapping[49] = 11
+        self.port_to_i2cbus_mapping[50] = 14
+        self.port_to_i2cbus_mapping[51] = 13
+        SfpUtilBase.__init__(self)
+
+    def _sfp_read_file_path(self, file_path, offset, num_bytes):
+        attempts = 0
+        while attempts < self.I2C_MAX_ATTEMPT:
+            try:
+                file_path.seek(offset)
+                read_buf = file_path.read(num_bytes)
+            except Exception:
+                attempts += 1
+                time.sleep(0.05)
+            return True, read_buf
+        return False, None
+
+    def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset):
+        """Tries to read the eeprom file to determine if the
+        device/sfp is present or not. If sfp present, the read returns
+        valid bytes. If not, read returns error 'Connection timed out"""
+
+        if not os.path.exists(sysfs_sfp_i2c_client_eeprompath):
+            return False
+        with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile:
+            rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1)
+            return rv
+
+    def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype):
+        try:
+            sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path
+
+            # Write device address to new_device file
+            nd_str = "%s %s" % (devtype, hex(devaddr))
+            with open(sysfs_nd_path, "w") as nd_file:
+                nd_file.write(nd_str)
+
+        except Exception as err:
+            print("Error writing to new device file: %s" % str(err))
+            return 1
+        else:
+            return 0
+
+    def _get_port_eeprom_path(self, port_num, devid):
+        sysfs_i2c_adapter_base_path = ""
+
+        if port_num in self.port_to_eeprom_mapping:
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num]
+        else:
+            sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+            i2c_adapter_id = self._get_port_i2c_adapter_id(port_num)
+            if i2c_adapter_id is None:
+                print("Error getting i2c bus num")
+                return None
+
+            # Get i2c virtual bus path for the sfp
+            sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path,
+                                                        str(i2c_adapter_id))
+
+            # If i2c bus for port does not exist
+            if not os.path.exists(sysfs_sfp_i2c_adapter_path):
+                print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path)
+                return None
+
+            sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path,
+                                                        str(i2c_adapter_id),
+                                                        hex(devid)[-2:])
+
+            # If sfp device is not present on bus, Add it
+            if not os.path.exists(sysfs_sfp_i2c_client_path):
+                if port_num in self.qsfp_ports:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE)
+                else:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE)
+                if ret != 0:
+                    print("Error adding sfp device")
+                    return None
+
+            sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path
+
+        return sysfs_sfp_i2c_client_eeprom_path
+
+    def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes):
+        eeprom_raw = []
+        for i in range(0, num_bytes):
+            eeprom_raw.append("0x00")
+
+        rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes)
+        if rv is False:
+            return None
+
+        try:
+            for n in range(0, num_bytes):
+                if isinstance(raw[n], str):
+                    eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2)
+                elif isinstance(raw[n], int):
+                    eeprom_raw[n] = hex(raw[n])[2:].zfill(2)
+        except Exception as e:
+            return None
+
+        return eeprom_raw
+
+    def get_eeprom_dom_raw(self, port_num):
+        if port_num in self.qsfp_ports:
+            # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw
+            return None
+        # Read dom eeprom at addr 0x51
+        return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256)
+
+    def get_presence(self, port_num):
+        # Check for invalid port_num
+        if port_num < self.port_start or port_num > self.port_end:
+            return False
+
+        presence_path = "/sys/wb_plat/sff/sff%d/present" % (port_num+1)
+
+        try:
+            with open(presence_path, "rb") as data:
+                presence_data = data.read(2)
+                if presence_data == "":
+                    return False
+                result = int(presence_data, 16)
+        except IOError:
+            return False
+
+        if result == 1:
+            return True
+        return False
+
+    def get_low_power_mode(self, port_num):
+        # Check for invalid port_num
+
+        return True
+
+    def set_low_power_mode(self, port_num, lpmode):
+        # Check for invalid port_num
+
+        return True
+
+    def reset(self, port_num):
+        # Check for invalid port_num
+        if port_num < self.port_start or port_num > self.port_end:
+            return False
+
+        return True
+
+    def get_transceiver_change_event(self, timeout=0):
+        return False, {}
+
+    def get_highest_temperature(self):
+        offset = 0
+        hightest_temperature = -9999
+
+        presence_flag = False
+        read_eeprom_flag = False
+        temperature_valid_flag = False
+
+        for port in range(48, self.PORTS_IN_BLOCK):
+            if self.get_presence(port) is False:
+                continue
+
+            presence_flag = True
+            if port in self.qsfp_ports:
+                offset = 22
+            else:
+                offset = 96
+            size = 2
+
+            eeprom_path = self._get_port_eeprom_path(port, 0x50)
+            try:
+                with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+                    read_eeprom_flag = True
+                    eeprom_raw = self._read_eeprom_specific_bytes(eeprom, 0x100 + offset, size)
+                    msb = int(eeprom_raw[0], 16)
+                    lsb = int(eeprom_raw[1], 16)
+                    result = (msb << 8) | (lsb & 0xff)
+                    result = float(result / 256.0)
+                    if -50 <= result <= 200:
+                        temperature_valid_flag = True
+                        hightest_temperature = max(hightest_temperature, result)
+            except Exception:
+                print(traceback.format_exc())
+
+        # all port not presence
+        if presence_flag is False:
+            hightest_temperature = -10000
+
+        # all port read eeprom fail
+        elif read_eeprom_flag is False:
+            hightest_temperature = -9999
+
+        # all port temperature invalid
+        elif read_eeprom_flag is True and temperature_valid_flag is False:
+            hightest_temperature = -10000
+
+        hightest_temperature = round(hightest_temperature, 2)
+
+        return hightest_temperature
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/plugins/ssd_util.py
new file mode 100755
index 000000000000..95ca23e8b351
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/plugins/ssd_util.py
@@ -0,0 +1,112 @@
+#
+# ssd_util.py
+#
+# Generic implementation of the SSD health API
+# SSD models supported:
+#  - InnoDisk
+#  - StorFly
+#  - Virtium
+
+try:
+    import subprocess
+    from sonic_platform_base.sonic_ssd.ssd_base import SsdBase
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+HEALTH_CMD = "cat /sys/kernel/debug/mmc0/mmc0:0001/ext_csd | cut -c 537-538"
+SERIAL_CMD = "cat /sys/bus/mmc/devices/mmc0\\:0001/serial"
+FIRMWARE_CMD = "cat /sys/kernel/debug/mmc0/mmc0:0001/ext_csd | cut -c 509-522"
+NOT_AVAILABLE = "N/A"
+
+class SsdUtil(SsdBase):
+    """
+    Generic implementation of the SSD health API
+    """
+    def __init__(self, diskdev):
+        self.model = "KLMCG4JETD-B041"
+        self.temperature = NOT_AVAILABLE
+        self.vendor_ssd_info = "====No vendor information===="
+        self.health_list = [100,90,80,70,60,50,40,30,20,10,0]
+        try:
+            life_time = self._execute_shell(HEALTH_CMD)
+            if int(life_time) in range(1,12):
+                self.health = self.health_list[int(life_time) - 1]
+            else:
+                self.health = NOT_AVAILABLE
+        except Exception as e:
+            self.health = NOT_AVAILABLE
+
+        try:
+            self.firmware = self._execute_shell(FIRMWARE_CMD)
+        except Exception as e:
+            self.firmware = NOT_AVAILABLE
+
+        try:
+            serial = self._execute_shell(SERIAL_CMD)
+            self.serial = serial.replace("0x",'')
+        except Exception as e:
+            self.serial = NOT_AVAILABLE
+
+    def _execute_shell(self, cmd):
+        status, output = subprocess.getstatusoutput(cmd)
+        if status:
+            return None
+
+        return output
+
+    def get_health(self):
+        """
+        Retrieves current disk health in percentages
+
+        Returns:
+            A float number of current ssd health
+            e.g. 83.5
+        """
+        return self.health
+
+    def get_temperature(self):
+        """
+        Retrieves current disk temperature in Celsius
+
+        Returns:
+            A float number of current temperature in Celsius
+            e.g. 40.1
+        """
+        return self.temperature
+
+    def get_model(self):
+        """
+        Retrieves model for the given disk device
+
+        Returns:
+            A string holding disk model as provided by the manufacturer
+        """
+        return self.model
+
+    def get_firmware(self):
+        """
+        Retrieves firmware version for the given disk device
+
+        Returns:
+            A string holding disk firmware version as provided by the manufacturer
+        """
+        return self.firmware
+
+    def get_serial(self):
+        """
+        Retrieves serial number for the given disk device
+
+        Returns:
+            A string holding disk serial number as provided by the manufacturer
+        """
+        return self.serial
+
+    def get_vendor_output(self):
+        """
+        Retrieves vendor specific data for the given disk device
+
+        Returns:
+            A string holding some vendor specific disk information
+        """
+        return self.vendor_ssd_info
+
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/pmon_daemon_control.json
new file mode 100644
index 000000000000..94592fa8cebc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/pmon_daemon_control.json
@@ -0,0 +1,3 @@
+{
+    "skip_ledd": true
+}
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/postinit_cmd_file.soc b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/postinit_cmd_file.soc
new file mode 100644
index 000000000000..371d9a71e387
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/postinit_cmd_file.soc
@@ -0,0 +1,29 @@
+phy ge1 0x17 0x0D19
+phy ge1 0x15 0x4801
+phy ge1 0x17 0x0D18
+phy ge1 0x15 0x0D07
+phy ge1 0x17 0x0D19
+phy ge1 0x15 0xC801
+init port
+sleep 0 200
+ 
+phy ge9 0x17 0x0D19
+phy ge9 0x15 0x4801
+phy ge9 0x17 0x0D18
+phy ge9 0x15 0x0D07
+phy ge9 0x17 0x0D19
+phy ge9 0x15 0xC801
+init port
+sleep 0 200
+ 
+phy ge17 0x17 0x0D19
+phy ge17 0x15 0x4801
+phy ge17 0x17 0x0D18
+phy ge17 0x15 0x0D07
+phy ge17 0x17 0x0D19
+phy ge17 0x15 0xC801
+init port
+sleep 0 200
+
+led auto on
+led start
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/preinit_cmd_file.soc b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/preinit_cmd_file.soc
new file mode 100644
index 000000000000..5566f9f882a2
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/preinit_cmd_file.soc
@@ -0,0 +1,2 @@
+m0 load 0 0x0 /usr/share/sonic/platform/linkscan_led.bin
+m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/system_health_monitoring_config.json b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000000..a864df64aa4d
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48gt4v-r0/system_health_monitoring_config.json
@@ -0,0 +1,11 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": ["PSU2_FAN1","PSU1_FAN1","psu.power_threshold","psu.temperature","psu.voltage"],
+    "user_defined_checkers": [],
+    "polling_interval": 60,
+    "led_color": {
+        "fault"  : "blink_yellow",
+        "normal" : "green",
+        "booting": "blink_green"
+    }
+}
\ No newline at end of file
diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk
index 91168dd6ded8..38c1a9521388 100755
--- a/platform/broadcom/one-image.mk
+++ b/platform/broadcom/one-image.mk
@@ -97,7 +97,8 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \
                                $(UFISPACE_S9300_32D_PLATFORM_MODULE) \
                                $(UFISPACE_S9301_32D_PLATFORM_MODULE) \
                                $(UFISPACE_S9301_32DB_PLATFORM_MODULE) \
-                               $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)
+                               $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE) \
+			       $(MICAS_M2_W6510_48GT4V_PLATFORM_MODULE)
 
 $(SONIC_ONE_IMAGE)_LAZY_BUILD_INSTALLS = $(BRCM_OPENNSL_KERNEL) $(BRCM_DNX_OPENNSL_KERNEL)
 ifeq ($(INSTALL_DEBUG_TOOLS),y)
diff --git a/platform/broadcom/platform-modules-micas.mk b/platform/broadcom/platform-modules-micas.mk
index 7f2a95cade55..5b7fd2cdcb07 100644
--- a/platform/broadcom/platform-modules-micas.mk
+++ b/platform/broadcom/platform-modules-micas.mk
@@ -8,3 +8,11 @@ $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEAD
 $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6510-48v8c-r0
 SONIC_DPKG_DEBS += $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)
 SONIC_STRETCH_DEBS += $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)
+
+## M2-W6510-48GT4V
+MICAS_M2_W6510_48GT4V_PLATFORM_MODULE_VERSION = 1.0
+export MICAS_M2_W6510_48GT4V_PLATFORM_MODULE_VERSION
+
+MICAS_M2_W6510_48GT4V_PLATFORM_MODULE = platform-modules-micas-m2-w6510-48gt4v_$(MICAS_M2_W6510_48GT4V_PLATFORM_MODULE_VERSION)_amd64.deb
+$(MICAS_M2_W6510_48GT4V_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6510-48gt4v-r0
+$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6510_48GT4V_PLATFORM_MODULE)))
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py
index c693ad9f0ac5..0693b1f4eaea 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py
@@ -1,9 +1,19 @@
 #!/usr/bin/env python3
-########################################################################
 #
-# Module contains an implementation of SONiC Platform Base API and
-# provides the Fans' information which are available in the platform.
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
 #
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 ########################################################################
 
 try:
@@ -308,3 +318,57 @@ def get_revision(self):
             self.fan_dict_update()
             return self.fan_dict["HW"]
         return 'N/A'
+
+
+    def is_under_speed(self):
+        """
+        Calculates if the fan speed is under the tolerated low speed threshold
+
+        Default calculation requires get_speed_tolerance to be implemented, and checks
+        if the current fan speed (expressed as a percentage) is lower than <get_speed_tolerance>
+        percent below the target fan speed (expressed as a percentage)
+
+        Returns:
+            A boolean, True if fan speed is under the low threshold, False if not
+        """
+        speed = self.get_speed()
+        target_speed = self.get_target_speed()
+        tolerance = self.get_speed_tolerance()
+
+        if speed is None or target_speed is None or tolerance is None:
+            return False
+
+        for param, value in (('speed', speed), ('target speed', target_speed), ('speed tolerance', tolerance)):
+            if not isinstance(value, int):
+                raise TypeError(f'Fan {param} is not an integer value: {param}={value}')
+            if value < 0 or value > 100:
+                raise ValueError(f'Fan {param} is not a valid percentage value: {param}={value}')
+
+        return speed * 100 < target_speed * (100 - tolerance)
+
+    def is_over_speed(self):
+        """
+        Calculates if the fan speed is over the tolerated high speed threshold
+
+        Default calculation requires get_speed_tolerance to be implemented, and checks
+        if the current fan speed (expressed as a percentage) is higher than <get_speed_tolerance>
+        percent above the target fan speed (expressed as a percentage)
+
+        Returns:
+            A boolean, True if fan speed is over the high threshold, False if not
+        """
+        speed = self.get_speed()
+        target_speed = self.get_target_speed()
+        tolerance = self.get_speed_tolerance()
+
+        if speed is None or target_speed is None or tolerance is None:
+            return False
+
+        for param, value in (('speed', speed), ('target speed', target_speed), ('speed tolerance', tolerance)):
+            if not isinstance(value, int):
+                raise TypeError(f'Fan {param} is not an integer value: {param}={value}')
+            if value < 0 or value > 100:
+                raise ValueError(f'Fan {param} is not a valid percentage value: {param}={value}')
+
+        return speed * 100 > target_speed * (100 + tolerance)
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/thermal.py
index 4632de3bc1e4..c88f7cda8372 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/thermal.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/thermal.py
@@ -1,12 +1,19 @@
 #!/usr/bin/env python3
-
-########################################################################
 #
-# Module contains an implementation of SONiC Platform Base API and
-# provides the Thermals' information which are available in the platform
+# Copyright (C) 2024 Micas Networks Inc.
 #
-########################################################################
-
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 try:
     import time
@@ -86,7 +93,10 @@ def get_status(self):
             False if not
         """
         self.temp_dict_update()
-        if (self.temp_dict["Value"] >= self.temp_dict["High"]) or (self.temp_dict["Value"] <= self.temp_dict["Low"]):
+        if self.temp_dict["High"] is not None and self.temp_dict["Value"] > self.temp_dict["High"]:
+            return False
+
+        if self.temp_dict["Low"] is not None and self.temp_dict["Value"] < self.temp_dict["Low"]:
             return False
 
         return True
@@ -120,6 +130,15 @@ def get_temperature(self):
         value = self.temp_dict["Value"]
         if value is None or value == self.int_case.error_ret:
             return "N/A"
+        # temp value invalid
+        temp_invalid = self.temp_dict.get("Invalid")
+        if temp_invalid is not None and int(value) == int(temp_invalid):
+            return "N/A"
+        # temp value error
+        temp_error = self.temp_dict.get("Error")
+        if temp_error is not None and int(value) == int(temp_error):
+            return "N/A"
+
         if len(self.temperature_list) >= 1000:
             del self.temperature_list[0]
         self.temperature_list.append(float(value))
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/control b/platform/broadcom/sonic-platform-modules-micas/debian/control
index 55b5837776d5..8a4fbd115814 100644
--- a/platform/broadcom/sonic-platform-modules-micas/debian/control
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/control
@@ -7,3 +7,7 @@ Standards-Version: 3.9.3
 Package: platform-modules-micas-m2-w6510-48v8c
 Architecture: amd64
 Description: kernel modules for platform devices such as fan, led, sfp
+
+Package: platform-modules-micas-m2-w6510-48gt4v
+Architecture: amd64
+Description: kernel modules for platform devices such as fan, led, sfp
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48gt4v.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48gt4v.install
new file mode 100644
index 000000000000..66df2662aa38
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48gt4v.install
@@ -0,0 +1 @@
+m2-w6510-48gt4v/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6510-48gt4v-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48gt4v.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48gt4v.postinst
new file mode 100644
index 000000000000..a8132f4f65a9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48gt4v.postinst
@@ -0,0 +1,10 @@
+#!/bin/sh
+# postinst
+
+kernel_version=$(uname -r)
+
+if [ -e /boot/System.map-${kernel_version} ]; then
+    depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
+fi
+
+#DEBHELPER#
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
index f27bca1d6579..b6b2cd492660 100644
--- a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
@@ -1,5 +1,6 @@
 currentdir = $(shell pwd)
 
 MODULE_DIRS := m2-w6510-48v8c
+MODULE_DIRS += m2-w6510-48gt4v
 
 export MODULE_DIRS
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/Makefile
new file mode 100644
index 000000000000..a0c262841c51
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/Makefile
@@ -0,0 +1,28 @@
+PWD		= $(shell pwd)
+DIR_KERNEL_SRC = $(PWD)/modules/driver
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+SUB_BUILD_DIR = $(PWD)/build
+INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)
+INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin
+INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages
+INSTALL_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/plat_sysfs_cfg
+INSTALL_SERVICE_DIR = $(SUB_BUILD_DIR)/lib/systemd/system
+
+all:
+	$(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules
+	@if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi
+	cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR)
+	@if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi
+	cp -r $(PWD)/config/*  $(INSTALL_SCRIPT_DIR)
+	@if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi
+	@if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi
+	@if [ ! -d ${INSTALL_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_SYSFS_CFG_DIR} ;fi
+	@if [ -d $(PWD)/plat_sysfs_cfg/ ]; then cp -r $(PWD)/plat_sysfs_cfg/* ${INSTALL_SYSFS_CFG_DIR} ;fi
+	@if [ ! -d ${INSTALL_SERVICE_DIR} ]; then mkdir -p ${INSTALL_SERVICE_DIR} ;fi
+	@if [ -d $(PWD)/service/ ]; then cp -r $(PWD)/service/* ${INSTALL_SERVICE_DIR} ;fi
+clean:
+	rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd
+	rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order
+	rm -rf ${DIR_KERNEL_SRC}/.tmp_versions
+	rm -rf $(SUB_BUILD_DIR)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/config/x86_64_micas_m2_w6510_48gt4v_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/config/x86_64_micas_m2_w6510_48gt4v_r0_config.py
new file mode 100755
index 000000000000..5ff4e1013fcb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/config/x86_64_micas_m2_w6510_48gt4v_r0_config.py
@@ -0,0 +1,754 @@
+#!/usr/bin/python
+#
+from platform_common import *
+
+STARTMODULE = {
+    "hal_fanctrl": 1,
+    "hal_ledctrl": 1,
+    "avscontrol": 0,
+    "dev_monitor": 1,
+    "reboot_cause": 1,
+    "pmon_syslog": 1,
+    "sff_temp_polling": 1,
+    "generate_airflow": 1,
+    "set_eth_mac": 1,
+    "drv_update": 0,
+}
+
+MANUINFO_CONF = {
+    "bios": {
+        "key": "BIOS",
+        "head": True,
+        "next": "onie"
+    },
+    "bios_vendor": {
+        "parent": "bios",
+        "key": "Vendor",
+        "cmd": "dmidecode -t 0 |grep Vendor",
+        "pattern": r".*Vendor",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "bios_version": {
+        "parent": "bios",
+        "key": "Version",
+        "cmd": "dmidecode -t 0 |grep Version",
+        "pattern": r".*Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "bios_date": {
+        "parent": "bios",
+        "key": "Release Date",
+        "cmd": "dmidecode -t 0 |grep Release",
+        "pattern": r".*Release Date",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+    "onie": {
+        "key": "ONIE",
+        "next": "cpu"
+    },
+    "onie_date": {
+        "parent": "onie",
+        "key": "Build Date",
+        "file": "/host/machine.conf",
+        "pattern": r"^onie_build_date",
+        "separator": "=",
+        "arrt_index": 1,
+    },
+    "onie_version": {
+        "parent": "onie",
+        "key": "Version",
+        "file": "/host/machine.conf",
+        "pattern": r"^onie_version",
+        "separator": "=",
+        "arrt_index": 2,
+    },
+
+    "cpu": {
+        "key": "CPU",
+        "next": "cpld"
+    },
+    "cpu_vendor": {
+        "parent": "cpu",
+        "key": "Vendor",
+        "cmd": "dmidecode --type processor |grep Manufacturer",
+        "pattern": r".*Manufacturer",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "cpu_model": {
+        "parent": "cpu",
+        "key": "Device Model",
+        "cmd": "dmidecode --type processor | grep Version",
+        "pattern": r".*Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "cpu_core": {
+        "parent": "cpu",
+        "key": "Core Count",
+        "cmd": "dmidecode --type processor | grep \"Core Count\"",
+        "pattern": r".*Core Count",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+    "cpu_thread": {
+        "parent": "cpu",
+        "key": "Thread Count",
+        "cmd": "dmidecode --type processor | grep \"Thread Count\"",
+        "pattern": r".*Thread Count",
+        "separator": ":",
+        "arrt_index": 4,
+    },
+    "cpld": {
+        "key": "CPLD",
+        "next": "psu"
+    },
+
+    "cpld1": {
+        "key": "CPLD1",
+        "parent": "cpld",
+        "arrt_index": 1,
+    },
+    "cpld1_model": {
+        "key": "Device Model",
+        "parent": "cpld1",
+        "config": "LCMXO3LF-6900C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld1_vender": {
+        "key": "Vendor",
+        "parent": "cpld1",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld1_desc": {
+        "key": "Description",
+        "parent": "cpld1",
+        "config": "CPU_CPLD",
+        "arrt_index": 3,
+    },
+    "cpld1_version": {
+        "key": "Firmware Version",
+        "parent": "cpld1",
+        "reg": {
+            "loc": "/dev/port",
+            "offset": 0x700,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld2": {
+        "key": "CPLD2",
+        "parent": "cpld",
+        "arrt_index": 2,
+    },
+    "cpld2_model": {
+        "key": "Device Model",
+        "parent": "cpld2",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld2_vender": {
+        "key": "Vendor",
+        "parent": "cpld2",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld2_desc": {
+        "key": "Description",
+        "parent": "cpld2",
+        "config": "CTRL_CPLD",
+        "arrt_index": 3,
+    },
+    "cpld2_version": {
+        "key": "Firmware Version",
+        "parent": "cpld2",
+        "reg": {
+            "loc": "/dev/port",
+            "offset": 0x900,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld3": {
+        "key": "CPLD3",
+        "parent": "cpld",
+        "arrt_index": 3,
+    },
+    "cpld3_model": {
+        "key": "Device Model",
+        "parent": "cpld3",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld3_vender": {
+        "key": "Vendor",
+        "parent": "cpld3",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld3_desc": {
+        "key": "Description",
+        "parent": "cpld3",
+        "config": "PORT_CPLD",
+        "arrt_index": 3,
+    },
+    "cpld3_version": {
+        "key": "Firmware Version",
+        "parent": "cpld3",
+        "reg": {
+            "loc": "/dev/port",
+            "offset": 0xb00,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "psu": {
+        "key": "PSU",
+        "next": "fan"
+    },
+
+    "psu1": {
+        "parent": "psu",
+        "key": "PSU1",
+        "arrt_index": 1,
+    },
+    "psu1_hw_version": {
+        "key": "Hardware Version",
+        "parent": "psu1",
+        "extra": {
+            "funcname": "getCustPsu",
+            "id": "psu1",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "psu1_fw_version": {
+        "key": "Firmware Version",
+        "parent": "psu1",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "psu2": {
+        "parent": "psu",
+        "key": "PSU2",
+        "arrt_index": 2,
+    },
+    "psu2_hw_version": {
+        "key": "Hardware Version",
+        "parent": "psu2",
+        "extra": {
+            "funcname": "getCustPsu",
+            "id": "psu2",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "psu2_fw_version": {
+        "key": "Firmware Version",
+        "parent": "psu2",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan": {
+        "key": "FAN",
+    },
+
+    "fan1": {
+        "key": "FAN1",
+        "parent": "fan",
+        "arrt_index": 1,
+    },
+    "fan1_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan1",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan1",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan1_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan1",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan2": {
+        "key": "FAN2",
+        "parent": "fan",
+        "arrt_index": 2,
+    },
+    "fan2_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan2",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan2",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan2_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan2",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+}
+
+PMON_SYSLOG_STATUS = {
+    "polling_time": 3,
+    "sffs": {
+        "present": {"path": ["/sys/wb_plat/sff/*/present"], "ABSENT": 0},
+        "nochangedmsgflag": 0,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 1,
+        "alias": {
+            "sff49": "Ethernet49",
+            "sff50": "Ethernet50",
+            "sff51": "Ethernet51",
+            "sff52": "Ethernet52"
+        }
+    },
+    "fans": {
+        "present": {"path": ["/sys/wb_plat/fan/*/present"], "ABSENT": 0},
+        "status": [
+            {"path": "/sys/wb_plat/fan/%s/motor0/status", 'okval': 1},
+        ],
+        "nochangedmsgflag": 1,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 0,
+        "alias": {
+            "fan1": "FAN1",
+            "fan2": "FAN2"
+        }
+    },
+    "psus": {
+        "present": {"path": ["/sys/wb_plat/psu/*/present"], "ABSENT": 0},
+        "status": [
+            {"path": "/sys/wb_plat/psu/%s/output", "okval": 1},
+            {"path": "/sys/wb_plat/psu/%s/alert", "okval": 0},
+        ],
+        "nochangedmsgflag": 1,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 0,
+        "alias": {
+            "psu1": "PSU1",
+            "psu2": "PSU2"
+        }
+    }
+}
+
+##################### MAC Voltage adjust####################################
+MAC_DEFAULT_PARAM = [
+    {
+        "name": "mac_core",              # AVS name
+        "type": 0,                       # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range
+        "default": 0x01,                 # default value, if rov value not in range
+        "rov_source": 0,                 # 0: get rov value from cpld, 1: get rov value from SDK
+        "cpld_avs": {"io_addr": 0x956, "gettype": "io"},
+        "set_avs": {
+            "loc": "/sys/bus/i2c/devices/17-0058/hwmon/hwmon*/avs0_vout",
+            "gettype": "sysfs", "formula": "int((%f)*1000000)"
+        },
+        "mac_avs_param": {
+            0x08: 0.875,
+            0x04: 0.850,
+            0x02: 0.825,
+            0x01: 0.800
+        }
+    }
+]
+
+
+DRIVERLISTS = [
+    {"name": "wb_pinctrl_intel", "delay": 30},
+    {"name": "wb_gpio_c3000", "delay": 0},
+    {"name": "wb_gpio_c3000_device", "delay": 0},
+    {"name": "i2c_ismt", "delay": 0},
+    {"name": "i2c_i801", "delay": 0},
+    {"name": "i2c_dev", "delay": 0},
+    {"name": "i2c_algo_bit", "delay": 0},
+    {"name": "i2c_gpio", "delay": 0},
+    {"name": "i2c_mux", "delay": 0},
+    {"name": "wb_i2c_gpio_device gpio_sda=31 gpio_scl=32 gpio_chip_name=wb_gpio_c3000", "delay": 0},
+    {"name": "mdio_bitbang", "delay": 0},
+    {"name": "mdio_gpio", "delay": 0},
+    {"name": "wb_mdio_gpio_device gpio_mdc=33 gpio_mdio=34 gpio_chip_name=wb_gpio_c3000", "delay": 0},
+    {"name": "platform_common dfd_my_type=0x40b2", "delay": 0},
+    {"name": "wb_pcie_dev", "delay": 0},
+    {"name": "wb_lpc_drv", "delay": 0},
+    {"name": "wb_lpc_drv_device", "delay": 0},
+    {"name": "wb_io_dev", "delay": 0},
+    {"name": "wb_io_dev_device", "delay": 0},
+    {"name": "wb_i2c_dev", "delay": 0},
+    {"name": "wb_i2c_mux_pca9641", "delay": 0},
+    {"name": "wb_i2c_mux_pca954x", "delay": 0},
+    {"name": "wb_i2c_mux_pca954x_device", "delay": 0},
+    {"name": "wb_i2c_dev_device", "delay": 0},
+    {"name": "lm75", "delay": 0},
+    {"name": "optoe", "delay": 0},
+    {"name": "at24", "delay": 0},
+    {"name": "wb_mac_bsc", "delay": 0},
+    {"name": "pmbus_core", "delay": 0},
+    {"name": "xdpe12284", "delay": 0},
+    {"name": "ina3221", "delay": 0},
+    {"name": "wb_wdt", "delay": 0},
+    {"name": "wb_wdt_device", "delay": 0},
+    {"name": "plat_dfd", "delay": 0},
+    {"name": "plat_switch", "delay": 0},
+    {"name": "plat_fan", "delay": 0},
+    {"name": "plat_psu", "delay": 0},
+    {"name": "plat_sff", "delay": 0},
+    {"name": "hw_test", "delay": 0},
+]
+
+DEVICE = [
+    {"name": "24c02", "bus": 2, "loc": 0x56},
+    {"name": "wb_mac_bsc_td3_x2", "bus": 18, "loc": 0x44},
+    # fan
+    {"name": "24c02", "bus": 8, "loc": 0x53},
+    {"name": "24c02", "bus": 9, "loc": 0x53},
+
+    # psu
+    {"name": "24c02", "bus": 7, "loc": 0x56},
+    {"name": "24c02", "bus": 7, "loc": 0x57},
+    # temp
+    {"name": "tmp275", "bus": 6, "loc": 0x48},
+    {"name": "tmp275", "bus": 6, "loc": 0x49},
+    # dcdc
+    {"name": "xdpe12284", "bus": 0, "loc": 0x5e},
+    {"name": "xdpe12284", "bus": 0, "loc": 0x68},
+    {"name": "xdpe12284", "bus": 0, "loc": 0x6e},
+    {"name": "xdpe12284", "bus": 17, "loc": 0x58},
+    {"name": "ina3221", "bus": 3, "loc": 0x40},
+    {"name": "ina3221", "bus": 3, "loc": 0x41},
+    {"name": "ina3221", "bus": 3, "loc": 0x42},
+    # port
+    {"name": "optoe2", "bus": 11, "loc": 0x50},
+    {"name": "optoe2", "bus": 12, "loc": 0x50},
+    {"name": "optoe2", "bus": 13, "loc": 0x50},
+    {"name": "optoe2", "bus": 14, "loc": 0x50},
+]
+
+REBOOT_CTRL_PARAM = {
+    "cpu": {"io_addr": 0x910, "rst_val": 0x10, "rst_delay": 0, "gettype": "io"},
+    "mac": {"io_addr": 0x930, "rst_val": 0xbf, "rst_delay": 1, "unlock_rst_val": 0xff, "unlock_rst_delay": 1, "gettype": "io"},
+    "phy": {"io_addr": 0x930, "rst_val": 0xf7, "rst_delay": 1, "unlock_rst_val": 0xff, "unlock_rst_delay": 1, "gettype": "io"},
+}
+
+DEV_MONITOR_PARAM = {
+    "polling_time": 10,
+    "psus": [
+        {
+            "name": "psu1",
+            "present": {"gettype": "io", "io_addr": 0xb10, "presentbit": 0, "okval": 0},
+            "device": [
+                {"id": "psu1frue2", "name": "24c02", "bus": 7, "loc": 0x56, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "psu2",
+            "present": {"gettype": "io", "io_addr": 0xb10, "presentbit": 1, "okval": 0},
+            "device": [
+                {"id": "psu2frue2", "name": "24c02", "bus": 7, "loc": 0x57, "attr": "eeprom"},
+            ],
+        },
+    ],
+    "fans": [
+        {
+            "name": "fan1",
+            "present": {"gettype": "io", "io_addr": 0x994, "presentbit": 0, "okval": 0},
+            "device": [
+                {"id": "fan1frue2", "name": "24c02", "bus": 8, "loc": 0x53, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan2",
+            "present": {"gettype": "io", "io_addr": 0x994, "presentbit": 1, "okval": 0},
+            "device": [
+                {"id": "fan2frue2", "name": "24c02", "bus": 9, "loc": 0x53, "attr": "eeprom"},
+            ],
+        },
+    ],
+    "others": [
+        {
+            "name": "eeprom",
+            "device": [
+                {"id": "eeprom_1", "name": "24c02", "bus": 2, "loc": 0x56, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "tmp275",
+            "device": [
+                {"id": "tmp275_1", "name": "tmp275", "bus": 6, "loc": 0x48, "attr": "hwmon"},
+                {"id": "tmp275_2", "name": "tmp275", "bus": 6, "loc": 0x49, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "mac_bsc",
+            "device": [
+                {"id": "mac_bsc_1", "name": "wb_mac_bsc_td3_x2", "bus": 18, "loc": 0x44, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "ina3221",
+            "device": [
+                {"id": "ina3221_1", "name": "ina3221", "bus": 3, "loc": 0x40, "attr": "hwmon"},
+                {"id": "ina3221_2", "name": "ina3221", "bus": 3, "loc": 0x41, "attr": "hwmon"},
+                {"id": "ina3221_3", "name": "ina3221", "bus": 3, "loc": 0x42, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "xdpe12284",
+            "device": [
+                {"id": "xdpe12284_1", "name": "xdpe12284", "bus": 0, "loc": 0x68, "attr": "hwmon"},
+                {"id": "xdpe12284_2", "name": "xdpe12284", "bus": 0, "loc": 0x6e, "attr": "hwmon"},
+                {"id": "xdpe12284_2", "name": "xdpe12284", "bus": 0, "loc": 0x5e, "attr": "hwmon"},
+                {"id": "xdpe12284_2", "name": "xdpe12284", "bus": 17, "loc": 0x58, "attr": "hwmon"},
+            ],
+        },
+    ],
+}
+
+# INIT_PARAM_PRE = [
+#     {"loc": "17-0058/hwmon/hwmon*/avs0_vout_max", "value": "875000"},
+#     {"loc": "17-0058/hwmon/hwmon*/avs0_vout_min", "value": "800000"},
+# ]
+INIT_COMMAND_PRE = [
+    # close tx_disable
+    "dfd_debug io_wr 0xb0e 0x59",
+    "dfd_debug io_wr 0xb90 0x00",
+    "dfd_debug io_wr 0xb0e 0x4e",
+]
+
+INIT_PARAM = []
+
+INIT_COMMAND = []
+
+REBOOT_CAUSE_PARA = {
+    "reboot_cause_list": [
+        {
+            "name": "wdt_reboot",
+            "monitor_point": {"gettype": "io", "io_addr": 0x76b, "okval": 1},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Watchdog, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Watchdog, ", 
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size":1*1024*1024}
+            ],
+            "finish_operation": [
+                {"gettype": "io", "io_addr": 0x76b, "value": 0x00},
+            ]
+        },
+        {
+            "name": "otp_switch_reboot",
+            "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ",
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+            ],
+            "finish_operation": [
+                {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"},
+            ]
+        },
+        {
+            "name": "otp_other_reboot",
+            "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ",
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+            ],
+            "finish_operation": [
+                {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"},
+            ]
+        },
+    ],
+    "other_reboot_cause_record": [
+        {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+        {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+    ],
+}
+
+
+WARM_UPGRADE_PARAM = {
+    "slot0": {
+        "VME": {
+            "chain1": [
+                {"name": "CPU_CPLD",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/refresh_cpu_cpld_header.vme",
+                    "init_cmd": [
+                        {"cmd": "echo 98 > /sys/class/gpio/export", "gettype": "cmd"},
+                        {"cmd": "echo high > /sys/class/gpio/gpio98/direction", "gettype": "cmd"},
+                        {"io_addr": 0x7a5, "value": 0, "gettype": "io"},
+                    ],
+                    "rw_recover_reg": [
+                        {"io_addr": 0x721, "value": None, "gettype": "io"},
+                        {"io_addr": 0x765, "value": None, "gettype": "io"},
+                        {"io_addr": 0x766, "value": None, "gettype": "io"},
+                        {"io_addr": 0x768, "value": None, "gettype": "io"},
+                    ],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 30,
+                    "refresh_finish_flag_check": {"io_addr":0x7a5, "value":0x01, "gettype":"io"},
+                    "access_check_reg": {"io_addr": 0x705, "value": 0x5a, "gettype": "io"},
+                    "finish_cmd": [
+                        {"cmd": "echo 0 > /sys/class/gpio/gpio98/value", "gettype": "cmd"},
+                        {"cmd": "echo 98 > /sys/class/gpio/unexport", "gettype": "cmd"},
+                    ],
+                },
+            ],
+        },
+    },
+    "stop_services_cmd": [
+        "/usr/local/bin/platform_process.py stop",
+    ],
+    "start_services_cmd": [
+        "/usr/local/bin/platform_process.py start",
+    ],
+}
+
+UPGRADE_SUMMARY = {
+    "devtype": 0x40b2,
+
+    "slot0": {
+        "subtype": 0,
+        "VME": {
+            "chain1": {
+                "name": "CPU_CPLD",
+                "is_support_warm_upg": 1,
+            },
+            "chain2": {
+                "name": "CTRL_CPLD",
+                "is_support_warm_upg": 0,
+            },
+            "chain3": {
+                "name": "PORT_CPLD",
+                "is_support_warm_upg": 0,
+            },
+        },
+
+        "MTD": {
+            "chain1": {
+                "name": "BIOS",
+                "is_support_warm_upg": 0,
+                "filesizecheck": 10240,  # bios check file size, Unit: K
+                "init_cmd": [
+                    {"io_addr": 0x722, "value": 0x02, "gettype": "io"},
+                    {"cmd": "modprobe mtd", "gettype": "cmd"},
+                    {"cmd": "modprobe spi_nor", "gettype": "cmd"},
+                    {"cmd": "modprobe ofpart", "gettype": "cmd"},
+                    {"cmd": "modprobe intel_spi writeable=1", "gettype": "cmd"},
+                    {"cmd": "modprobe intel_spi_pci", "gettype": "cmd"},
+                ],
+                "finish_cmd": [
+                    {"cmd": "rmmod intel_spi_pci", "gettype": "cmd"},
+                    {"cmd": "rmmod intel_spi", "gettype": "cmd"},
+                    {"cmd": "rmmod ofpart", "gettype": "cmd"},
+                    {"cmd": "rmmod spi_nor", "gettype": "cmd"},
+                    {"cmd": "rmmod mtd", "gettype": "cmd"},
+                ],
+            },
+        },
+
+        "TEST": {
+            "cpld": [
+                {"chain": 1, "file": "/etc/.upgrade_test/cpu_cpld_test_header.vme", "display_name": "CPU_CPLD"},
+                {"chain": 2, "file": "/etc/.upgrade_test/ctrl_cpld_test_header.vme", "display_name": "CTRL_CPLD"},
+                {"chain": 3, "file": "/etc/.upgrade_test/port_cpld_test_header.vme", "display_name": "PORT_CPLD"},
+            ],
+        },
+    },
+}
+
+
+PLATFORM_E2_CONF = {
+    "fan": [
+        {"name": "fan1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/8-0053/eeprom"},
+        {"name": "fan2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/9-0053/eeprom"},
+    ],
+    "psu": [
+        {"name": "psu1", "e2_type": "custfru", "e2_path": "/sys/bus/i2c/devices/7-0056/eeprom"},
+        {"name": "psu2", "e2_type": "custfru", "e2_path": "/sys/bus/i2c/devices/7-0057/eeprom"},
+    ],
+    "syseeprom": [
+        {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/2-0056/eeprom"},
+    ],
+}
+
+AIR_FLOW_CONF = {
+    "psu_fan_airflow": {
+        "intake": ['PA150II-F', 'PD150II-F'],
+        "exhaust": ['PA150II-R', 'PD150II-R']
+    },
+
+    "fanairflow": {
+        "intake": ['M1LFAN I-F'],
+        "exhaust": ['M1LFAN I-R']
+    },
+
+    "fans": [
+        {
+            "name": "FAN1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/8-0053/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+        {
+            "name": "FAN2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/9-0053/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+    ],
+
+    "psus": [
+        {
+            "name": "PSU1", "e2_type": "custfru", "e2_path": "/sys/bus/i2c/devices/7-0056/eeprom",
+            "field": "product_name", "decode": "psu_fan_airflow"
+        },
+        {
+            "name": "PSU2", "e2_type": "custfru", "e2_path": "/sys/bus/i2c/devices/7-0057/eeprom",
+            "field": "product_name", "decode": "psu_fan_airflow"
+        }
+    ]
+}
+
+SET_MAC_CONF = [
+    {
+        "eth_name": "eth0",
+        "e2_name": "syseeprom",
+        "e2_type": "onie_tlv",
+        "e2_path": "/sys/bus/i2c/devices/2-0056/eeprom",
+        "mac_location": {"field": "Base MAC Address"},
+        "ifcfg": {
+            "ifcfg_file_path": "/etc/network/interfaces.d/ifcfg-eth0-mac", "file_mode": "add",
+        }
+    }
+]
+
+DRVIER_UPDATE_CONF = {
+    "reboot_flag": 1,
+    "drv_list": [
+        {
+            "source": "extra/sdhci_pci.ko",
+            "target": "kernel/drivers/mmc/host/sdhci-pci.ko",
+            "judge_flag": "/sys/module/sdhci_pci/parameters/wb_sdhci_pci"
+        },
+    ]
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/config/x86_64_micas_m2_w6510_48gt4v_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/config/x86_64_micas_m2_w6510_48gt4v_r0_port_config.py
new file mode 100755
index 000000000000..2e30ca213fc2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/config/x86_64_micas_m2_w6510_48gt4v_r0_port_config.py
@@ -0,0 +1,12 @@
+#!/usr/bin/python3
+#
+
+PLATFORM_INTF_OPTOE = {
+    "port_num": 52,
+    "port_bus_map": {
+        49: 12,
+        50: 11,
+        51: 14,
+        52: 13
+    }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_device.py
new file mode 100644
index 000000000000..0c5568884936
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_device.py
@@ -0,0 +1,607 @@
+#!/usr/bin/python3
+
+
+psu_fan_airflow = {
+    "intake": ['PA150II-F', 'PD150II-F'],
+    "exhaust": ['PA150II-R', 'PD150II-R']
+}
+
+fanairflow = {
+    "intake": ['M1LFAN I-F'],
+    "exhaust": ['M1LFAN I-R']
+}
+
+psu_display_name = {
+    "PA150II-F": ['PA150II-F'],
+    "PA150II-R": ['PA150II-R'],
+    "PD150II-F": ['PD150II-F'],
+    "PD150II-R": ['PD150II-R']
+}
+
+psutypedecode = {
+    "AC": ["PA150II-F", "PA150II-R"],
+    "DC": ["PD150II-F", "PD150II-R"],
+}
+
+
+class Unit:
+    Temperature = "C"
+    Voltage = "V"
+    Current = "A"
+    Power = "W"
+    Speed = "RPM"
+
+
+class threshold:
+    FAN_SPEED_MAX = 19800
+    FAN_SPEED_MIN = 4860
+
+
+class Description:
+    CPLD = "Used for managing IO modules, SFP+ modules and system LEDs"
+    BIOS = "Performs initialization of hardware components during booting"
+    FPGA = "Platform management controller for on-board temperature monitoring, in-chassis power"
+
+
+devices = {
+    "onie_e2": [
+        {
+            "name": "ONIE_E2",
+            "e2loc": {"loc": "/sys/bus/i2c/devices/2-0056/eeprom", "way": "sysfs"},
+            "airflow": "intake"
+        },
+    ],
+    "psus": [
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/7-0056/eeprom", "way": "sysfs"},
+            "e2_type": "custfru",
+            "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU1",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "psu_fan_tolerance": 40,
+            "InputsType": {"gettype": "fru", 'psutypedecode': psutypedecode},
+            "OutputsStatus": {"loc": "/sys/wb_plat/psu/psu1/output", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "Temperature": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Temperature
+            },
+            "FanSpeed": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Speed
+            },
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"value": None, "way": "config"},
+                    "Unit": Unit.Voltage
+
+                },
+                'DC': {
+                    "value": {"value": None, "way": "config"},
+                    "Unit": Unit.Voltage
+                },
+                'other': {
+                    "value": {"value": None, "way": "config"},
+                    "Unit": Unit.Voltage
+                }
+            },
+            "InputsCurrent": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Current
+            },
+            "InputsPower": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Power
+            },
+            "OutputsVoltage": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Voltage
+            },
+            "OutputsCurrent": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Current
+            },
+            "OutputsPower": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Power
+            },
+        },
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/7-0057/eeprom", "way": "sysfs"},
+            "e2_type": "custfru",
+            "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU2",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "psu_fan_tolerance": 40,
+            "InputsType": {"gettype": "fru", 'psutypedecode': psutypedecode},
+            "OutputsStatus": {"loc": "/sys/wb_plat/psu/psu2/output", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "Temperature": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Temperature
+            },
+            "FanSpeed": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Speed
+            },
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"value": None, "way": "config"},
+                    "Unit": Unit.Voltage
+
+                },
+                'DC': {
+                    "value": {"value": None, "way": "config"},
+                    "Unit": Unit.Voltage
+                },
+                'other': {
+                    "value": {"value": None, "way": "config"},
+                    "Unit": Unit.Voltage
+                }
+            },
+            "InputsCurrent": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Current
+            },
+            "InputsPower": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Power
+            },
+            "OutputsVoltage": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Voltage
+            },
+            "OutputsCurrent": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Current
+            },
+            "OutputsPower": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Power
+            },
+        }
+    ],
+    "temps": [
+        {
+            "name": "SWITCH_TEMP",
+            "temp_id": "TEMP1",
+            "api_name": "ASIC_TEMP",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/18-0044/hwmon/hwmon*/temp99_input", "way": "sysfs"},
+                "Min": 2000,
+                "Low": 10000,
+                "High": 105000,
+                "Max": 110000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "CPU_TEMP",
+            "temp_id": "TEMP2",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": 2000,
+                "Low": 10000,
+                "High": 85000,
+                "Max": 91000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "INLET_TEMP",
+            "temp_id": "TEMP3",
+            "Temperature": {
+                "value": [
+                    {"loc": "/sys/bus/i2c/devices/6-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                ],
+                "Min": -10000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "fix_value": {
+                "fix_type": "config",
+                "addend": -7,
+            }
+        },
+        {
+            "name": "OUTLET_TEMP",
+            "temp_id": "TEMP4",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/6-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 70000,
+                "Max": 75000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "SFF_TEMP",
+            "Temperature": {
+                "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 90000,
+                "Max": 100000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "invalid": -10000,
+            "error": -9999,
+        }
+    ],
+    "leds": [
+        {
+            "name": "FRONT_SYS_LED",
+            "led_type": "SYS_LED",
+            "led": {"loc": "/dev/cpld1", "offset": 0x50, "len": 1, "way": "devfile"},
+            "led_attrs": {
+                "off": 0x10, "red_flash": 0x11, "red": 0x12,
+                "green_flash": 0x13, "green": 0x14, "amber_flash": 0x15,
+                "amber": 0x16, "mask": 0x17
+            },
+        },
+        {
+            "name": "FRONT_PSU_LED",
+            "led_type": "PSU_LED",
+            "led": {"loc": "/dev/cpld1", "offset": 0x51, "len": 1, "way": "devfile"},
+            "led_attrs": {
+                "off": 0x10, "red_flash": 0x11, "red": 0x12,
+                "green_flash": 0x13, "green": 0x14, "amber_flash": 0x15,
+                "amber": 0x16, "mask": 0x17
+            },
+        },
+        {
+            "name": "FRONT_FAN_LED",
+            "led_type": "FAN_LED",
+            "led": {"loc": "/dev/cpld1", "offset": 0x52, "len": 1, "way": "devfile"},
+            "led_attrs": {
+                "off": 0x10, "red_flash": 0x11, "red": 0x12,
+                "green_flash": 0x13, "green": 0x14, "amber_flash": 0x15,
+                "amber": 0x16, "mask": 0x17
+            },
+        },
+    ],
+    "fans": [
+        {
+            "name": "FAN1",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/8-0053/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FAN_SPEED_MAX,
+            "led": {"loc": "/dev/cpld1", "offset": 0x92, "len": 1, "way": "devfile"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 6.6,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"loc": "/dev/cpld1", "offset": 0x90, "len": 1, "way": "devfile"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN2",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/9-0053/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FAN_SPEED_MAX,
+            "led": {"loc": "/dev/cpld1", "offset": 0x93, "len": 1, "way": "devfile"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 6.6,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"loc": "/dev/cpld1", "offset": 0x91, "len": 1, "way": "devfile"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+
+
+    ],
+    "cplds": [
+        {
+            "name": "CPU_CPLD",
+            "cpld_id": "CPLD1",
+            "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for system power",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "CTRL_CPLD",
+            "cpld_id": "CPLD2",
+            "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "PORT_CPLD",
+            "cpld_id": "CPLD3",
+            "VersionFile": {"loc": "/dev/cpld2", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "BIOS",
+            "cpld_id": "CPLD4",
+            "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"},
+            "desc": "Performs initialization of hardware components during booting",
+            "slot": 0,
+            "type": "str",
+            "warm": 0,
+        }
+    ],
+    "dcdc": [
+        {
+            "name": "VDD_CORE_0.8V",
+            "dcdc_id": "DCDC1",
+            "Min": 784,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/17-0058/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 893,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "PVCCP",
+            "dcdc_id": "DCDC2",
+            "Min": 468,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/0-0068/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1364,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "PVNN",
+            "dcdc_id": "DCDC3",
+            "Min": 585,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/0-0068/hwmon/hwmon*/in4_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1364,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "P1V05",
+            "dcdc_id": "DCDC4",
+            "Min": 945,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/0-006e/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1155,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VCCRAM",
+            "dcdc_id": "DCDC5",
+            "Min": 675,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/0-006e/hwmon/hwmon*/in4_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1320,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "P1V2_VDDQ",
+            "dcdc_id": "DCDC6",
+            "Min": 1080,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/0-005e/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1320,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "CPU_VDD1.8V",
+            "dcdc_id": "DCDC7",
+            "Min": 1620,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/3-0040/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1980,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "P3V3_STBY",
+            "dcdc_id": "DCDC8",
+            "Min": 2970,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/3-0040/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3630,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "P5V_AUX",
+            "dcdc_id": "DCDC9",
+            "Min": 4500,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/3-0040/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 5500,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VDD1.2V",
+            "dcdc_id": "DCDC10",
+            "Min": 1140,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/3-0041/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1260,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VDD1.8V",
+            "dcdc_id": "DCDC11",
+            "Min": 1710,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/3-0041/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1890,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VDD3.3V",
+            "dcdc_id": "DCDC12",
+            "Min": 3200,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/3-0041/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3600,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VDD1.0V",
+            "dcdc_id": "DCDC13",
+            "Min": 969,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/3-0042/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1071,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VDD3.3V_SFP",
+            "dcdc_id": "DCDC14",
+            "Min": 3200,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/3-0042/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3600,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VAN_0.8V",
+            "dcdc_id": "DCDC15",
+            "Min": 784,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/3-0042/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 893,
+            "format": "float(float(%s)/1000)",
+        },
+    ],
+    "cpu": [
+        {
+            "name": "cpu",
+            "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"
+        }
+    ],
+    "sfps": {
+        "ver": '1.0',
+        "port_index_start": 0,
+        "port_num": 52,
+        "log_level": 2,
+        "eeprom_retry_times": 5,
+        "eeprom_retry_break_sec": 0.2,
+        "presence_cpld": {
+            "dev_id": {
+                5: {
+                    "offset": {
+                        0x30: "50,49,52,51",
+                    },
+                },
+            },
+        },
+        "presence_val_is_present": 0,
+        "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom",
+        "eeprom_path_key": [11]*48 + list(range(11, 15)),
+        "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class",
+        "optoe_driver_key": list(range(11, 15)),
+        "txdis_cpld": {
+            "dev_id": {
+                5: {
+                    "offset": {
+                        0x90: "50,49,52,51",
+                    },
+                },
+            },
+        },
+        "txdisable_val_is_on": 1,
+    }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_exhaust_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_exhaust_device.py
new file mode 100644
index 000000000000..4ed0f5ab2399
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_exhaust_device.py
@@ -0,0 +1,607 @@
+#!/usr/bin/python3
+
+
+psu_fan_airflow = {
+    "intake": ['PA150II-F', 'PD150II-F'],
+    "exhaust": ['PA150II-R', 'PD150II-R']
+}
+
+fanairflow = {
+    "intake": ['M1LFAN I-F'],
+    "exhaust": ['M1LFAN I-R']
+}
+
+psu_display_name = {
+    "PA150II-F": ['PA150II-F'],
+    "PA150II-R": ['PA150II-R'],
+    "PD150II-F": ['PD150II-F'],
+    "PD150II-R": ['PD150II-R']
+}
+
+psutypedecode = {
+    "AC": ["PA150II-F", "PA150II-R"],
+    "DC": ["PD150II-F", "PD150II-R"],
+}
+
+
+class Unit:
+    Temperature = "C"
+    Voltage = "V"
+    Current = "A"
+    Power = "W"
+    Speed = "RPM"
+
+
+class threshold:
+    FAN_SPEED_MAX = 19800
+    FAN_SPEED_MIN = 4860
+
+
+class Description:
+    CPLD = "Used for managing IO modules, SFP+ modules and system LEDs"
+    BIOS = "Performs initialization of hardware components during booting"
+    FPGA = "Platform management controller for on-board temperature monitoring, in-chassis power"
+
+
+devices = {
+    "onie_e2": [
+        {
+            "name": "ONIE_E2",
+            "e2loc": {"loc": "/sys/bus/i2c/devices/2-0056/eeprom", "way": "sysfs"},
+            "airflow": "exhaust"
+        },
+    ],
+    "psus": [
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/7-0056/eeprom", "way": "sysfs"},
+            "e2_type": "custfru",
+            "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU1",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "psu_fan_tolerance": 40,
+            "InputsType": {"gettype": "fru", 'psutypedecode': psutypedecode},
+            "OutputsStatus": {"loc": "/sys/wb_plat/psu/psu1/output", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "Temperature": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Temperature
+            },
+            "FanSpeed": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Speed
+            },
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"value": None, "way": "config"},
+                    "Unit": Unit.Voltage
+
+                },
+                'DC': {
+                    "value": {"value": None, "way": "config"},
+                    "Unit": Unit.Voltage
+                },
+                'other': {
+                    "value": {"value": None, "way": "config"},
+                    "Unit": Unit.Voltage
+                }
+            },
+            "InputsCurrent": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Current
+            },
+            "InputsPower": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Power
+            },
+            "OutputsVoltage": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Voltage
+            },
+            "OutputsCurrent": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Current
+            },
+            "OutputsPower": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Power
+            },
+        },
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/7-0057/eeprom", "way": "sysfs"},
+            "e2_type": "custfru",
+            "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU2",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "psu_fan_tolerance": 40,
+            "InputsType": {"gettype": "fru", 'psutypedecode': psutypedecode},
+            "OutputsStatus": {"loc": "/sys/wb_plat/psu/psu2/output", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "Temperature": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Temperature
+            },
+            "FanSpeed": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Speed
+            },
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"value": None, "way": "config"},
+                    "Unit": Unit.Voltage
+
+                },
+                'DC': {
+                    "value": {"value": None, "way": "config"},
+                    "Unit": Unit.Voltage
+                },
+                'other': {
+                    "value": {"value": None, "way": "config"},
+                    "Unit": Unit.Voltage
+                }
+            },
+            "InputsCurrent": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Current
+            },
+            "InputsPower": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Power
+            },
+            "OutputsVoltage": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Voltage
+            },
+            "OutputsCurrent": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Current
+            },
+            "OutputsPower": {
+                "value": {"value": None, "way": "config"},
+                "Unit": Unit.Power
+            },
+        }
+    ],
+    "temps": [
+        {
+            "name": "SWITCH_TEMP",
+            "temp_id": "TEMP1",
+            "api_name": "ASIC_TEMP",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/18-0044/hwmon/hwmon*/temp99_input", "way": "sysfs"},
+                "Min": 2000,
+                "Low": 10000,
+                "High": 105000,
+                "Max": 110000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "CPU_TEMP",
+            "temp_id": "TEMP2",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": 2000,
+                "Low": 10000,
+                "High": 85000,
+                "Max": 91000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "INLET_TEMP",
+            "temp_id": "TEMP3",
+            "Temperature": {
+                "value": [
+                    {"loc": "/sys/bus/i2c/devices/6-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                ],
+                "Min": -10000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "fix_value": {
+                "fix_type": "config",
+                "addend": -7,
+            }
+        },
+        {
+            "name": "OUTLET_TEMP",
+            "temp_id": "TEMP4",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/6-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 70000,
+                "Max": 75000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "SFF_TEMP",
+            "Temperature": {
+                "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 90000,
+                "Max": 100000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "invalid": -10000,
+            "error": -9999,
+        }
+    ],
+    "leds": [
+        {
+            "name": "FRONT_SYS_LED",
+            "led_type": "SYS_LED",
+            "led": {"loc": "/dev/cpld1", "offset": 0x50, "len": 1, "way": "devfile"},
+            "led_attrs": {
+                "off": 0x10, "red_flash": 0x11, "red": 0x12,
+                "green_flash": 0x13, "green": 0x14, "amber_flash": 0x15,
+                "amber": 0x16, "mask": 0x17
+            },
+        },
+        {
+            "name": "FRONT_PSU_LED",
+            "led_type": "PSU_LED",
+            "led": {"loc": "/dev/cpld1", "offset": 0x51, "len": 1, "way": "devfile"},
+            "led_attrs": {
+                "off": 0x10, "red_flash": 0x11, "red": 0x12,
+                "green_flash": 0x13, "green": 0x14, "amber_flash": 0x15,
+                "amber": 0x16, "mask": 0x17
+            },
+        },
+        {
+            "name": "FRONT_FAN_LED",
+            "led_type": "FAN_LED",
+            "led": {"loc": "/dev/cpld1", "offset": 0x52, "len": 1, "way": "devfile"},
+            "led_attrs": {
+                "off": 0x10, "red_flash": 0x11, "red": 0x12,
+                "green_flash": 0x13, "green": 0x14, "amber_flash": 0x15,
+                "amber": 0x16, "mask": 0x17
+            },
+        },
+    ],
+    "fans": [
+        {
+            "name": "FAN1",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/8-0053/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FAN_SPEED_MAX,
+            "led": {"loc": "/dev/cpld1", "offset": 0x92, "len": 1, "way": "devfile"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 6.6,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"loc": "/dev/cpld1", "offset": 0x90, "len": 1, "way": "devfile"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN2",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/9-0053/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FAN_SPEED_MAX,
+            "led": {"loc": "/dev/cpld1", "offset": 0x93, "len": 1, "way": "devfile"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 6.6,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"loc": "/dev/cpld1", "offset": 0x91, "len": 1, "way": "devfile"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+
+
+    ],
+    "cplds": [
+        {
+            "name": "CPU_CPLD",
+            "cpld_id": "CPLD1",
+            "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for system power",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "CTRL_CPLD",
+            "cpld_id": "CPLD2",
+            "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "PORT_CPLD",
+            "cpld_id": "CPLD3",
+            "VersionFile": {"loc": "/dev/cpld2", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "BIOS",
+            "cpld_id": "CPLD4",
+            "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"},
+            "desc": "Performs initialization of hardware components during booting",
+            "slot": 0,
+            "type": "str",
+            "warm": 0,
+        }
+    ],
+    "dcdc": [
+        {
+            "name": "VDD_CORE_0.8V",
+            "dcdc_id": "DCDC1",
+            "Min": 784,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/17-0058/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 893,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "PVCCP",
+            "dcdc_id": "DCDC2",
+            "Min": 468,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/0-0068/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1364,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "PVNN",
+            "dcdc_id": "DCDC3",
+            "Min": 585,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/0-0068/hwmon/hwmon*/in4_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1364,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "P1V05",
+            "dcdc_id": "DCDC4",
+            "Min": 945,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/0-006e/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1155,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VCCRAM",
+            "dcdc_id": "DCDC5",
+            "Min": 675,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/0-006e/hwmon/hwmon*/in4_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1320,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "P1V2_VDDQ",
+            "dcdc_id": "DCDC6",
+            "Min": 1080,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/0-005e/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1320,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "CPU_VDD1.8V",
+            "dcdc_id": "DCDC7",
+            "Min": 1620,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/3-0040/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1980,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "P3V3_STBY",
+            "dcdc_id": "DCDC8",
+            "Min": 2970,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/3-0040/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3630,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "P5V_AUX",
+            "dcdc_id": "DCDC9",
+            "Min": 4500,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/3-0040/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 5500,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VDD1.2V",
+            "dcdc_id": "DCDC10",
+            "Min": 1140,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/3-0041/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1260,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VDD1.8V",
+            "dcdc_id": "DCDC11",
+            "Min": 1710,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/3-0041/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1890,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VDD3.3V",
+            "dcdc_id": "DCDC12",
+            "Min": 3200,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/3-0041/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3600,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VDD1.0V",
+            "dcdc_id": "DCDC13",
+            "Min": 969,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/3-0042/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1071,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VDD3.3V_SFP",
+            "dcdc_id": "DCDC14",
+            "Min": 3200,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/3-0042/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3600,
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "VAN_0.8V",
+            "dcdc_id": "DCDC15",
+            "Min": 784,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/3-0042/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 893,
+            "format": "float(float(%s)/1000)",
+        },
+    ],
+    "cpu": [
+        {
+            "name": "cpu",
+            "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"
+        }
+    ],
+    "sfps": {
+        "ver": '1.0',
+        "port_index_start": 0,
+        "port_num": 52,
+        "log_level": 2,
+        "eeprom_retry_times": 5,
+        "eeprom_retry_break_sec": 0.2,
+        "presence_cpld": {
+            "dev_id": {
+                5: {
+                    "offset": {
+                        0x30: "50,49,52,51",
+                    },
+                },
+            },
+        },
+        "presence_val_is_present": 0,
+        "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom",
+        "eeprom_path_key": [11]*48 + list(range(11, 15)),
+        "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class",
+        "optoe_driver_key": list(range(11, 15)),
+        "txdis_cpld": {
+            "dev_id": {
+                5: {
+                    "offset": {
+                        0x90: "50,49,52,51",
+                    },
+                },
+            },
+        },
+        "txdisable_val_is_on": 1,
+    }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_exhaust_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_exhaust_monitor.py
new file mode 100755
index 000000000000..8642d8c19368
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_exhaust_monitor.py
@@ -0,0 +1,141 @@
+# coding:utf-8
+
+
+monitor = {
+    "openloop": {
+        "linear": {
+            "name": "linear",
+            "flag": 0,
+            "pwm_min": 0x55,
+            "pwm_max": 0xff,
+            "K": 11,
+            "tin_min": 38,
+        },
+        "curve": {
+            "name": "curve",
+            "flag": 1,
+            "pwm_min": 0x55,
+            "pwm_max": 0xff,
+            "a": -0.05,
+            "b": 11.32,
+            "c": -166,
+            "tin_min": 25,
+        },
+    },
+
+    "pid": {
+        "CPU_TEMP": {
+            "name": "CPU_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x55,
+            "pwm_max": 0xff,
+            "Kp": 1,
+            "Ki": 0.4,
+            "Kd": 0,
+            "target": 80,
+            "value": [None, None, None],
+        },
+        "SWITCH_TEMP": {
+            "name": "SWITCH_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x55,
+            "pwm_max": 0xff,
+            "Kp": 1,
+            "Ki": 0.4,
+            "Kd": 0.3,
+            "target": 90,
+            "value": [None, None, None],
+        },
+        "OUTLET_TEMP": {
+            "name": "OUTLET_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x55,
+            "pwm_max": 0xff,
+            "Kp": 2,
+            "Ki": 0.4,
+            "Kd": 0.3,
+            "target": 60,
+            "value": [None, None, None],
+        },
+        "SFF_TEMP": {
+            "name": "SFF_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x55,
+            "pwm_max": 0xff,
+            "Kp": 2,
+            "Ki": 0.4,
+            "Kd": 0,
+            "target": 65,
+            "value": [None, None, None],
+        },
+    },
+
+    "temps_threshold": {
+        "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 105, "critical": 110},
+        "INLET_TEMP": {"name": "INLET_TEMP", "warning": 55, "critical": 60},
+        "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75},
+        "CPU_TEMP": {"name": "CPU_TEMP", "warning": 85, "critical": 91},
+        "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999},
+    },
+
+    "fancontrol_para": {
+        "interval": 5,
+        "fan_air_flow_monitor": 1,
+        "psu_air_flow_monitor": 1,
+        "max_pwm": 0xff,
+        "min_pwm": 0x55,
+        "abnormal_pwm": 0xff,
+        "warning_pwm": 0xff,
+        "temp_invalid_pid_pwm": 0x55,
+        "temp_error_pid_pwm": 0x55,
+        "temp_fail_num": 3,
+        "check_temp_fail": [
+            {"temp_name": "INLET_TEMP"},
+            {"temp_name": "SWITCH_TEMP"},
+            {"temp_name": "CPU_TEMP"},
+        ],
+        "temp_warning_num": 3,  # temp over warning 3 times continuously
+        "temp_critical_num": 3,  # temp over critical 3 times continuously
+        "temp_warning_countdown": 60,  # 5 min warning speed after not warning
+        "temp_critical_countdown": 60,  # 5 min full speed after not critical
+        "rotor_error_count": 6,  # fan rotor error 6 times continuously
+        "inlet_mac_diff": 999,
+        "check_crit_reboot_flag": 1,
+        "check_crit_reboot_num": 3,
+        "check_crit_sleep_time": 20,
+        "psu_absent_fullspeed_num": 1,
+        "fan_absent_fullspeed_num": 1,
+        "rotor_error_fullspeed_num": 1,
+        "psu_fan_control": 0,
+    },
+
+    "ledcontrol_para": {
+        "interval": 5,
+        "checkpsu": 0,  # 0: sys led don't follow psu led
+        "checkfan": 0,  # 0: sys led don't follow fan led
+        "psu_amber_num": 1,
+        "fan_amber_num": 1,
+        "board_sys_led": [
+            {"led_name": "FRONT_SYS_LED"},
+        ],
+        "board_psu_led": [
+            {"led_name": "FRONT_PSU_LED"},
+        ],
+        "board_fan_led": [
+            {"led_name": "FRONT_FAN_LED"},
+        ],
+        "psu_air_flow_monitor": 1,
+        "fan_air_flow_monitor": 1,
+        "psu_air_flow_amber_num": 1,
+        "fan_air_flow_amber_num": 1,
+    },
+
+    "otp_reboot_judge_file": {
+        "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag",
+        "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag",
+    },
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_monitor.py
new file mode 100755
index 000000000000..12704226a269
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/hal-config/x86_64_micas_m2_w6510_48gt4v_r0_monitor.py
@@ -0,0 +1,141 @@
+# coding:utf-8
+
+
+monitor = {
+    "openloop": {
+        "linear": {
+            "name": "linear",
+            "flag": 0,
+            "pwm_min": 0x55,
+            "pwm_max": 0xff,
+            "K": 11,
+            "tin_min": 38,
+        },
+        "curve": {
+            "name": "curve",
+            "flag": 1,
+            "pwm_min": 0x55,
+            "pwm_max": 0xff,
+            "a": -0.05,
+            "b": 11.32,
+            "c": -166,
+            "tin_min": 25,
+        },
+    },
+
+    "pid": {
+        "CPU_TEMP": {
+            "name": "CPU_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x55,
+            "pwm_max": 0xff,
+            "Kp": 1,
+            "Ki": 0.4,
+            "Kd": 0,
+            "target": 80,
+            "value": [None, None, None],
+        },
+        "SWITCH_TEMP": {
+            "name": "SWITCH_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x55,
+            "pwm_max": 0xff,
+            "Kp": 1,
+            "Ki": 0.4,
+            "Kd": 0.3,
+            "target": 90,
+            "value": [None, None, None],
+        },
+        "OUTLET_TEMP": {
+            "name": "OUTLET_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x55,
+            "pwm_max": 0xff,
+            "Kp": 2,
+            "Ki": 0.4,
+            "Kd": 0.3,
+            "target": 60,
+            "value": [None, None, None],
+        },
+        "SFF_TEMP": {
+            "name": "SFF_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x55,
+            "pwm_max": 0xff,
+            "Kp": 1,
+            "Ki": 1,
+            "Kd": 0.3,
+            "target": 65,
+            "value": [None, None, None],
+        },
+    },
+
+    "temps_threshold": {
+        "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 105, "critical": 110},
+        "INLET_TEMP": {"name": "INLET_TEMP", "warning": 55, "critical": 60},
+        "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75},
+        "CPU_TEMP": {"name": "CPU_TEMP", "warning": 85, "critical": 91},
+        "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999},
+    },
+
+    "fancontrol_para": {
+        "interval": 5,
+        "fan_air_flow_monitor": 1,
+        "psu_air_flow_monitor": 1,
+        "max_pwm": 0xff,
+        "min_pwm": 0x55,
+        "abnormal_pwm": 0xff,
+        "warning_pwm": 0xff,
+        "temp_invalid_pid_pwm": 0x55,
+        "temp_error_pid_pwm": 0x55,
+        "temp_fail_num": 3,
+        "check_temp_fail": [
+            {"temp_name": "INLET_TEMP"},
+            {"temp_name": "SWITCH_TEMP"},
+            {"temp_name": "CPU_TEMP"},
+        ],
+        "temp_warning_num": 3,  # temp over warning 3 times continuously
+        "temp_critical_num": 3,  # temp over critical 3 times continuously
+        "temp_warning_countdown": 60,  # 5 min warning speed after not warning
+        "temp_critical_countdown": 60,  # 5 min full speed after not critical
+        "rotor_error_count": 6,  # fan rotor error 6 times continuously
+        "inlet_mac_diff": 999,
+        "check_crit_reboot_flag": 1,
+        "check_crit_reboot_num": 3,
+        "check_crit_sleep_time": 20,
+        "psu_absent_fullspeed_num": 1,
+        "fan_absent_fullspeed_num": 1,
+        "rotor_error_fullspeed_num": 1,
+        "psu_fan_control": 0,
+    },
+
+    "ledcontrol_para": {
+        "interval": 5,
+        "checkpsu": 0,  # 0: sys led don't follow psu led
+        "checkfan": 0,  # 0: sys led don't follow fan led
+        "psu_amber_num": 1,
+        "fan_amber_num": 1,
+        "board_sys_led": [
+            {"led_name": "FRONT_SYS_LED"},
+        ],
+        "board_psu_led": [
+            {"led_name": "FRONT_PSU_LED"},
+        ],
+        "board_fan_led": [
+            {"led_name": "FRONT_FAN_LED"},
+        ],
+        "psu_air_flow_monitor": 1,
+        "fan_air_flow_monitor": 1,
+        "psu_air_flow_amber_num": 1,
+        "fan_air_flow_amber_num": 1,
+    },
+
+    "otp_reboot_judge_file": {
+        "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag",
+        "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag",
+    },
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/Makefile
new file mode 100755
index 000000000000..beabc653c10d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/Makefile
@@ -0,0 +1,10 @@
+MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
+MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules)
+
+EXTRA_CFLAGS+= -I$(MODULES_DIR)
+
+obj-m += wb_i2c_mux_pca954x_device.o
+obj-m += wb_lpc_drv_device.o
+obj-m += wb_i2c_dev_device.o
+obj-m += wb_io_dev_device.o
+obj-m += wb_wdt_device.o
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_i2c_dev_device.c
new file mode 100644
index 000000000000..6e187eae9797
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_i2c_dev_device.c
@@ -0,0 +1,145 @@
+/*
+ * An wb_i2c_dev_device driver for i2c device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_i2c_dev.h>
+
+static int g_wb_i2c_dev_device_debug = 0;
+static int g_wb_i2c_dev_device_error = 0;
+
+module_param(g_wb_i2c_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_i2c_dev_device_debug) { \
+        printk(KERN_INFO "[WB_I2C_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_I2C_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_i2c_dev_device_error) { \
+        printk(KERN_ERR "[WB_I2C_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static i2c_dev_device_t i2c_dev_device_data0 = {
+    .i2c_bus = 0,
+    .i2c_addr = 0x0d,
+    .i2c_name = "cpld3",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data1 = {
+    .i2c_bus = 15,
+    .i2c_addr = 0x51,
+    .i2c_name = "cpld4",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data2 = {
+    .i2c_bus = 16,
+    .i2c_addr = 0x52,
+    .i2c_name = "cpld5",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+struct i2c_board_info i2c_dev_device_info[] = {
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data0,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data1,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data2,
+    },
+};
+
+static int __init wb_i2c_dev_device_init(void)
+{
+    int i;
+    struct i2c_adapter *adap;
+    struct i2c_client *client;
+    i2c_dev_device_t *i2c_dev_device_data;
+
+    WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(i2c_dev_device_info); i++) {
+        i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+        i2c_dev_device_info[i].addr = i2c_dev_device_data->i2c_addr;
+        adap = i2c_get_adapter(i2c_dev_device_data->i2c_bus);
+        if (adap == NULL) {
+            i2c_dev_device_data->client = NULL;
+            printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_dev_device_data->i2c_bus);
+            continue;
+        }
+        client = i2c_new_client_device(adap, &i2c_dev_device_info[i]);
+        if (!client) {
+            i2c_dev_device_data->client = NULL;
+            printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n",
+                i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus);
+        } else {
+            i2c_dev_device_data->client = client;
+        }
+        i2c_put_adapter(adap);
+    }
+    return 0;
+}
+
+static void __exit wb_i2c_dev_device_exit(void)
+{
+    int i;
+    i2c_dev_device_t *i2c_dev_device_data;
+
+    WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(i2c_dev_device_info) - 1; i >= 0; i--) {
+        i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+        if (i2c_dev_device_data->client) {
+            i2c_unregister_device(i2c_dev_device_data->client);
+            i2c_dev_device_data->client = NULL;
+        }
+    }
+}
+
+module_init(wb_i2c_dev_device_init);
+module_exit(wb_i2c_dev_device_exit);
+MODULE_DESCRIPTION("I2C DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_i2c_mux_pca954x_device.c
new file mode 100644
index 000000000000..387ad5b223bf
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_i2c_mux_pca954x_device.c
@@ -0,0 +1,146 @@
+/*
+ * An wb_i2c_mux_pca954x_device driver for pca954x i2c load device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+ 
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_i2c_mux_pca954x.h>
+
+static int g_wb_i2c_mux_pca954x_device_debug = 0;
+static int g_wb_i2c_mux_pca954x_device_error = 0;
+
+module_param(g_wb_i2c_mux_pca954x_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_mux_pca954x_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_i2c_mux_pca954x_device_debug) { \
+        printk(KERN_INFO "[WB_I2C_MUX_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_i2c_mux_pca954x_device_error) { \
+        printk(KERN_ERR "[WB_I2C_MUX_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data0 = {
+    .i2c_bus                        = 0,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 1,
+    .pca9548_base_nr                = 3,
+    .pca9548_reset_type             = PCA9548_RESET_IO,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .io_attr.io_addr            = 0x93b,
+        .io_attr.mask               = 0x01,
+        .io_attr.reset_on           = 0,
+        .io_attr.reset_off          = 0x01,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data1 = {
+    .i2c_bus                        = 2,
+    .i2c_addr                       = 0x74,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 1,
+    .pca9548_base_nr                = 11,
+    .pca9548_reset_type             = PCA9548_RESET_IO,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .io_attr.io_addr            = 0x935,
+        .io_attr.mask               = 0x40,
+        .io_attr.reset_on           = 0,
+        .io_attr.reset_off          = 0x40,
+    },
+};
+
+struct i2c_board_info i2c_mux_pca954x_device_info[] = {
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data0,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data1,
+    },
+};
+
+static int __init wb_i2c_mux_pca954x_device_init(void)
+{
+    int i;
+    struct i2c_adapter *adap;
+    struct i2c_client *client;
+    i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data;
+
+    WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(i2c_mux_pca954x_device_info); i++) {
+        i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data;
+        i2c_mux_pca954x_device_info[i].addr = i2c_mux_pca954x_device_data->i2c_addr;
+        adap = i2c_get_adapter(i2c_mux_pca954x_device_data->i2c_bus);
+        if (adap == NULL) {
+            i2c_mux_pca954x_device_data->client = NULL;
+            printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_mux_pca954x_device_data->i2c_bus);
+            continue;
+        }
+        client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]);
+        if (!client) {
+            i2c_mux_pca954x_device_data->client = NULL;
+            printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n",
+                i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus);
+        } else {
+            i2c_mux_pca954x_device_data->client = client;
+        }
+        i2c_put_adapter(adap);
+    }
+    return 0;
+}
+
+static void __exit wb_i2c_mux_pca954x_device_exit(void)
+{
+    int i;
+    i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data;
+
+    WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(i2c_mux_pca954x_device_info) - 1; i >= 0; i--) {
+        i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data;
+        if (i2c_mux_pca954x_device_data->client) {
+            i2c_unregister_device(i2c_mux_pca954x_device_data->client);
+            i2c_mux_pca954x_device_data->client = NULL;
+        }
+    }
+}
+
+module_init(wb_i2c_mux_pca954x_device_init);
+module_exit(wb_i2c_mux_pca954x_device_exit);
+MODULE_DESCRIPTION("I2C MUX PCA954X Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_io_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_io_dev_device.c
new file mode 100644
index 000000000000..62cc4c459080
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_io_dev_device.c
@@ -0,0 +1,138 @@
+/*
+ * An wb_i2c_dev_device driver for i2c io device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+ 
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_io_dev.h>
+
+static int g_wb_io_dev_device_debug = 0;
+static int g_wb_io_dev_device_error = 0;
+
+module_param(g_wb_io_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_io_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_IO_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_io_dev_device_debug) { \
+        printk(KERN_INFO "[WB_IO_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_IO_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_io_dev_device_error) { \
+        printk(KERN_ERR "[WB_IO_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static io_dev_device_t io_dev_device_data0 = {
+    .io_dev_name = "cpld0",
+    .io_base = 0x700,
+    .io_len = 0x100,
+    .indirect_addr = 0,
+};
+
+static io_dev_device_t io_dev_device_data1 = {
+    .io_dev_name = "cpld1",
+    .io_base = 0x900,
+    .io_len = 0x100,
+    .indirect_addr = 0,
+};
+
+static io_dev_device_t io_dev_device_data2 = {
+    .io_dev_name = "cpld2",
+    .io_base = 0xb00,
+    .io_len = 0x100,
+    .indirect_addr = 0,
+};
+
+static void wb_io_dev_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device io_dev_device[] = {
+    {
+        .name   = "wb-io-dev",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &io_dev_device_data0,
+            .release = wb_io_dev_device_release,
+        },
+    },
+    {
+        .name   = "wb-io-dev",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &io_dev_device_data1,
+            .release = wb_io_dev_device_release,
+        },
+    },
+    {
+        .name   = "wb-io-dev",
+        .id = 3,
+        .dev    = {
+            .platform_data  = &io_dev_device_data2,
+            .release = wb_io_dev_device_release,
+        },
+    },
+};
+
+static int __init wb_io_dev_device_init(void)
+{
+    int i;
+    int ret = 0;
+    io_dev_device_t *io_dev_device_data;
+
+    WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(io_dev_device); i++) {
+        io_dev_device_data = io_dev_device[i].dev.platform_data;
+        ret = platform_device_register(&io_dev_device[i]);
+        if (ret < 0) {
+            io_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-io-dev.%d register failed!\n", i + 1);
+        } else {
+            io_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_io_dev_device_exit(void)
+{
+    int i;
+    io_dev_device_t *io_dev_device_data;
+
+    WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(io_dev_device) - 1; i >= 0; i--) {
+        io_dev_device_data = io_dev_device[i].dev.platform_data;
+        if (io_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&io_dev_device[i]);
+        }
+    }
+}
+
+module_init(wb_io_dev_device_init);
+module_exit(wb_io_dev_device_exit);
+MODULE_DESCRIPTION("IO DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_lpc_drv_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_lpc_drv_device.c
new file mode 100644
index 000000000000..363d670d5a99
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_lpc_drv_device.c
@@ -0,0 +1,150 @@
+/*
+ * An wb_i2c_ocores_device driver for i2c ocore device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_lpc_drv.h>
+
+static int g_wb_lpc_drv_device_debug = 0;
+static int g_wb_lpc_drv_device_error = 0;
+
+module_param(g_wb_lpc_drv_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_lpc_drv_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_LPC_DRV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_lpc_drv_device_debug) { \
+        printk(KERN_INFO "[WB_LPC_DRV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_LPC_DRV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_lpc_drv_device_error) { \
+        printk(KERN_ERR "[WB_LPC_DRV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static lpc_drv_device_t lpc_drv_device_data_0 = {
+    .lpc_io_name = "wb_lpc",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 0,
+    .lpc_io_base = 0x700,
+    .lpc_io_size = 0x100,
+    .lpc_gen_dec = 0x84,
+};
+
+static lpc_drv_device_t lpc_drv_device_data_1 = {
+    .lpc_io_name = "wb_lpc",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 0,
+    .lpc_io_base = 0x900,
+    .lpc_io_size = 0x100,
+    .lpc_gen_dec = 0x88,
+};
+
+static lpc_drv_device_t lpc_drv_device_data_2 = {
+    .lpc_io_name = "wb_lpc",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 0,
+    .lpc_io_base = 0xb00,
+    .lpc_io_size = 0x100,
+    .lpc_gen_dec = 0x90,
+};
+
+static void wb_lpc_drv_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device lpc_drv_device[] = {
+    {
+        .name   = "wb-lpc",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &lpc_drv_device_data_0,
+            .release = wb_lpc_drv_device_release,
+        },
+    },
+    {
+        .name   = "wb-lpc",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &lpc_drv_device_data_1,
+            .release = wb_lpc_drv_device_release,
+        },
+    },
+    {
+        .name   = "wb-lpc",
+        .id = 3,
+        .dev    = {
+            .platform_data  = &lpc_drv_device_data_2,
+            .release = wb_lpc_drv_device_release,
+        },
+    },
+};
+
+static int __init wb_lpc_drv_device_init(void)
+{
+    int i;
+    int ret = 0;
+    lpc_drv_device_t *lpc_drv_device_data;
+
+    WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(lpc_drv_device); i++) {
+        lpc_drv_device_data = lpc_drv_device[i].dev.platform_data;
+        ret = platform_device_register(&lpc_drv_device[i]);
+        if (ret < 0) {
+            lpc_drv_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-lpc.%d register failed!\n", i + 1);
+        } else {
+            lpc_drv_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_lpc_drv_device_exit(void)
+{
+    int i;
+    lpc_drv_device_t *lpc_drv_device_data;
+
+    WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(lpc_drv_device) - 1; i >= 0; i--) {
+        lpc_drv_device_data = lpc_drv_device[i].dev.platform_data;
+        if (lpc_drv_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&lpc_drv_device[i]);
+        }
+    }
+}
+
+module_init(wb_lpc_drv_device_init);
+module_exit(wb_lpc_drv_device_exit);
+MODULE_DESCRIPTION("LPC DRV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_wdt_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_wdt_device.c
new file mode 100644
index 000000000000..e49ba375cb1e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_wdt_device.c
@@ -0,0 +1,130 @@
+/*
+ * An wb_wdt_device driver for watchdog device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_wdt.h>
+
+static int g_wb_wdt_device_debug = 0;
+static int g_wb_wdt_device_error = 0;
+
+module_param(g_wb_wdt_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_wdt_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_WDT_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_wdt_device_debug) { \
+        printk(KERN_INFO "[WB_WDT_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_WDT_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_wdt_device_error) { \
+        printk(KERN_ERR "[WB_WDT_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static wb_wdt_device_t wb_wdt_device_data_0 = {
+    .config_dev_name = "/dev/cpld0",
+    .hw_algo = "eigenvalues",
+    .config_mode = 2,       /* Logic dev feed watchdog */
+    .priv_func_mode = 3,    /* IO */
+    .enable_val = 0xa5,
+    .disable_val = 0x0,
+    .enable_mask = 0xff,
+    .enable_reg = 0x68,
+    .timeout_cfg_reg = 0x66,
+    .timeleft_cfg_reg = 0x69,
+    .hw_margin = 90000,     /* timeout */
+    .timer_accuracy_reg_flag = 1,
+    .timer_accuracy_reg = 0x65,
+    .timer_accuracy_reg_val = 0x80, /* 1s */
+    .timer_accuracy = 1000,
+    .timer_update_reg_flag = 1,
+    .timer_update_reg = 0x67,
+    .timer_update_reg_val = 0x01,
+    .feed_wdt_type = 0,     /* watchdog device */
+    .wdt_config_mode.logic_wdt = {
+        .feed_dev_name = "/dev/cpld0",
+        .logic_func_mode = 0x03,    /* IO */
+        .feed_reg = 0x64,
+        .active_val = 0x01
+    },
+    .sysfs_index = SYSFS_NO_CFG,
+};
+
+static void wb_wdt_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device wb_wdt_device[] = {
+    {
+        .name   = "wb_wdt",
+        .id = 0,
+        .dev    = {
+            .platform_data  = &wb_wdt_device_data_0,
+            .release = wb_wdt_device_release,
+        },
+    },
+};
+
+static int __init wb_wdt_device_init(void)
+{
+    int i;
+    int ret = 0;
+    wb_wdt_device_t *wb_wdt_device_data;
+
+    WB_WDT_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(wb_wdt_device); i++) {
+        wb_wdt_device_data = wb_wdt_device[i].dev.platform_data;
+        ret = platform_device_register(&wb_wdt_device[i]);
+        if (ret < 0) {
+            wb_wdt_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "rg-wdt.%d register failed!\n", i + 1);
+        } else {
+            wb_wdt_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_wdt_device_exit(void)
+{
+    int i;
+    wb_wdt_device_t *wb_wdt_device_data;
+
+    WB_WDT_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(wb_wdt_device) - 1; i >= 0; i--) {
+        wb_wdt_device_data = wb_wdt_device[i].dev.platform_data;
+        if (wb_wdt_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&wb_wdt_device[i]);
+        }
+    }
+}
+
+module_init(wb_wdt_device_init);
+module_exit(wb_wdt_device_exit);
+MODULE_DESCRIPTION("WB WDT Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_CPLD.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
new file mode 100755
index 000000000000..2c10ab9bbb28
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
@@ -0,0 +1,40 @@
+# configuration item: I2C address of CPLD
+# format: cpld_i2c_dev.bus_[cpld_slot]_[cpld_id] cpld_i2c_dev.addr_[cpld_slot]_[cpld_id]
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+# bus: I2C bus number of CPLD
+# addr: I2C address of CPLD
+cpld_i2c_dev.bus_0_3=0
+cpld_i2c_dev.addr_0_3=0x0d
+cpld_i2c_dev.bus_0_4=15
+cpld_i2c_dev.addr_0_4=0x51
+cpld_i2c_dev.bus_0_5=16
+cpld_i2c_dev.addr_0_5=0x52
+
+
+# configuration item: LPC address of CPLD
+# format: cpld_lpc_addr_[cpld_slot]_[cpld_id]
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+cpld_lpc_dev_0_0=0x700
+cpld_lpc_dev_0_1=0x900
+cpld_lpc_dev_0_2=0xb00
+
+
+# configuration item: CPLD access method, lpc or i2c
+# format: mode_cpld_[cpld_slot][cpld_slot]=lpc/i2c
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+mode_cpld_0_0=lpc
+mode_cpld_0_1=lpc
+mode_cpld_0_2=lpc
+mode_cpld_0_3=i2c
+mode_cpld_0_4=i2c
+mode_cpld_0_5=i2c
+
+
+# configuration item: the number of CPLD
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: CPLD main_dev is 4
+# minor_dev: CPLD minor_dev not exist
+dev_num_4_0=6
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_FAN.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_FAN.cfg
new file mode 100755
index 000000000000..eb2d7faf58c8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_FAN.cfg
@@ -0,0 +1,112 @@
+# configuration item: the number of fans
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: fan main_dev is 1
+# minor_dev: fan minor_dev not exist(0)
+dev_num_1_0=2
+
+
+# configuration item: the number of rotors
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: rotor main_dev is 1
+# minor_dev: rotor minor_dev is 5
+dev_num_1_5=1
+
+
+# configuration item: fan presence status
+# format: dev_present_status_[main_dev_id][fan_index]
+# main_dev_id: fan main_dev_id is 1
+# fan_index: start from 1
+dev_present_status.mode_1_1=config
+dev_present_status.src_1_1=cpld
+dev_present_status.frmt_1_1=bit
+dev_present_status.pola_1_1=negative
+dev_present_status.addr_1_1=0x00010094
+dev_present_status.len_1_1=1
+dev_present_status.bit_offset_1_1=0
+
+dev_present_status.mode_1_2=config
+dev_present_status.src_1_2=cpld
+dev_present_status.frmt_1_2=bit
+dev_present_status.pola_1_2=negative
+dev_present_status.addr_1_2=0x00010094
+dev_present_status.len_1_2=1
+dev_present_status.bit_offset_1_2=1
+
+
+# configuration item: fan rotor status
+# format: fan_roll_status_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_roll_status.mode_1_0=config
+fan_roll_status.int_cons_1_0=
+fan_roll_status.src_1_0=cpld
+fan_roll_status.frmt_1_0=bit
+fan_roll_status.pola_1_0=positive
+fan_roll_status.fpath_1_0=
+fan_roll_status.addr_1_0=0x00010095
+fan_roll_status.len_1_0=1
+fan_roll_status.bit_offset_1_0=0
+
+
+fan_roll_status.mode_2_0=config
+fan_roll_status.int_cons_2_0=
+fan_roll_status.src_2_0=cpld
+fan_roll_status.frmt_2_0=bit
+fan_roll_status.pola_2_0=positive
+fan_roll_status.fpath_2_0=
+fan_roll_status.addr_2_0=0x00010095
+fan_roll_status.len_2_0=1
+fan_roll_status.bit_offset_2_0=1
+
+
+# configuration item: fan speed
+# format: fan_speed_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_speed.mode_1_0=config
+fan_speed.int_cons_1_0=
+fan_speed.src_1_0=cpld
+fan_speed.frmt_1_0=byte
+fan_speed.pola_1_0=
+fan_speed.fpath_1_0=
+fan_speed.addr_1_0=0x00010098
+fan_speed.len_1_0=1
+fan_speed.bit_offset_1_0=
+fan_speed.int_extra1_1_0=1
+
+
+fan_speed.mode_2_0=config
+fan_speed.int_cons_2_0=
+fan_speed.src_2_0=cpld
+fan_speed.frmt_2_0=byte
+fan_speed.pola_2_0=
+fan_speed.fpath_2_0=
+fan_speed.addr_2_0=0x00010099
+fan_speed.len_2_0=1
+fan_speed.bit_offset_2_0=
+fan_speed.int_extra1_2_0=1
+
+
+# configuration item: fan pwm
+# format: fan_ratio_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_ratio.mode_1_0=config
+fan_ratio.int_cons_1_0=
+fan_ratio.src_1_0=cpld
+fan_ratio.frmt_1_0=byte
+fan_ratio.pola_1_0=
+fan_ratio.fpath_1_0=
+fan_ratio.addr_1_0=0x00010090
+fan_ratio.len_1_0=1
+fan_ratio.bit_offset_1_0=
+
+fan_ratio.mode_2_0=config
+fan_ratio.int_cons_2_0=
+fan_ratio.src_2_0=cpld
+fan_ratio.frmt_2_0=byte
+fan_ratio.pola_2_0=
+fan_ratio.fpath_2_0=
+fan_ratio.addr_2_0=0x00010091
+fan_ratio.len_2_0=1
+fan_ratio.bit_offset_2_0=
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_PSU.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_PSU.cfg
new file mode 100755
index 000000000000..8b2d41974eb3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_PSU.cfg
@@ -0,0 +1,64 @@
+# configuration item: the number of psus
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: psu main_dev is 2
+# minor_dev: psu minor_dev not exist(0)
+dev_num_2_0=2
+
+
+# configuration item: psu status
+# format: psu_status_[psu_index]_[status_id]
+# psu_index: start from 1
+# status_id: 0: presence 1: output 2: alert
+# psu1 presence status
+psu_status.mode_1_0=config
+psu_status.src_1_0=cpld
+psu_status.frmt_1_0=bit
+psu_status.pola_1_0=negative
+psu_status.addr_1_0=0x00020010
+psu_status.len_1_0=1
+psu_status.bit_offset_1_0=0
+
+# psu1 output status
+psu_status.mode_1_1=config
+psu_status.src_1_1=cpld
+psu_status.frmt_1_1=bit
+psu_status.pola_1_1=positive
+psu_status.addr_1_1=0x00020011
+psu_status.len_1_1=1
+psu_status.bit_offset_1_1=0
+
+# psu1 alert status
+psu_status.mode_1_2=config
+psu_status.src_1_2=cpld
+psu_status.frmt_1_2=bit
+psu_status.pola_1_2=negative
+psu_status.addr_1_2=0x00020011
+psu_status.len_1_2=1
+psu_status.bit_offset_1_2=0
+
+# psu2 presence status
+psu_status.mode_2_0=config
+psu_status.src_2_0=cpld
+psu_status.frmt_2_0=bit
+psu_status.pola_2_0=negative
+psu_status.addr_2_0=0x00020010
+psu_status.len_2_0=1
+psu_status.bit_offset_2_0=1
+
+# psu2 output status
+psu_status.mode_2_1=config
+psu_status.src_2_1=cpld
+psu_status.frmt_2_1=bit
+psu_status.pola_2_1=positive
+psu_status.addr_2_1=0x00020011
+psu_status.len_2_1=1
+psu_status.bit_offset_2_1=1
+
+# psu2 alert status
+psu_status.mode_2_2=config
+psu_status.src_2_2=cpld
+psu_status.frmt_2_2=bit
+psu_status.pola_2_2=negative
+psu_status.addr_2_2=0x00020011
+psu_status.len_2_2=1
+psu_status.bit_offset_2_2=1
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_SFF.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_SFF.cfg
new file mode 100755
index 000000000000..9cfdcd29eb8f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/WB_PLAT_SFF.cfg
@@ -0,0 +1,54 @@
+# configuration item: the number of sffs
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: sff main_dev is 3
+# minor_dev: sff minor_dev not exist(0)
+dev_num_3_0=4
+
+
+# configuration item: The directory name of sff sysfs
+# format: sff_dir_name_[sff_index]
+# sff_index: start from 1
+sff_dir_name_1 =sff49
+sff_dir_name_2 =sff50
+sff_dir_name_3 =sff51
+sff_dir_name_4 =sff52
+
+
+# configuration item: sff cpld register status
+# format: sff_cpld_reg_[sff_index]_[cpld_reg]
+# sff_index: start from 1
+# cpld_reg: 1: power_on, 2: tx_fault, 3: tx_dis, 4:pre_n, 5:rx_los
+# 6: reset, 7: lpmode, 8: module_present, 9: interrupt
+
+# sff cpld presence status
+sff_cpld_reg.mode_1_8=config
+sff_cpld_reg.src_1_8=cpld
+sff_cpld_reg.frmt_1_8=bit
+sff_cpld_reg.pola_1_8=negative
+sff_cpld_reg.addr_1_8=0x00020030
+sff_cpld_reg.len_1_8=1
+sff_cpld_reg.bit_offset_1_8=1
+
+sff_cpld_reg.mode_2_8=config
+sff_cpld_reg.src_2_8=cpld
+sff_cpld_reg.frmt_2_8=bit
+sff_cpld_reg.pola_2_8=negative
+sff_cpld_reg.addr_2_8=0x00020030
+sff_cpld_reg.len_2_8=1
+sff_cpld_reg.bit_offset_2_8=0
+
+sff_cpld_reg.mode_3_8=config
+sff_cpld_reg.src_3_8=cpld
+sff_cpld_reg.frmt_3_8=bit
+sff_cpld_reg.pola_3_8=negative
+sff_cpld_reg.addr_3_8=0x00020030
+sff_cpld_reg.len_3_8=1
+sff_cpld_reg.bit_offset_3_8=3
+
+sff_cpld_reg.mode_4_8=config
+sff_cpld_reg.src_4_8=cpld
+sff_cpld_reg.frmt_4_8=bit
+sff_cpld_reg.pola_4_8=negative
+sff_cpld_reg.addr_4_8=0x00020030
+sff_cpld_reg.len_4_8=1
+sff_cpld_reg.bit_offset_4_8=2
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/cfg_file_name b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/cfg_file_name
new file mode 100755
index 000000000000..5f49420441a5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/plat_sysfs_cfg/cfg_file_name
@@ -0,0 +1,4 @@
+WB_PLAT_CPLD
+WB_PLAT_FAN
+WB_PLAT_PSU
+WB_PLAT_SFF
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/service/set-eth-mac.service b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/service/set-eth-mac.service
new file mode 100644
index 000000000000..4b74632c21cf
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/service/set-eth-mac.service
@@ -0,0 +1,14 @@
+[Unit]
+Description=Set eth mac address
+Before=interfaces-config.service
+Requires=platform_driver.service
+After=platform_driver.service
+#DefaultDependencies=no
+
+[Service]
+Type=oneshot
+ExecStart=/usr/local/bin/set_eth_mac.py
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/setup.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/setup.py
new file mode 100755
index 000000000000..6c3916921abb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/setup.py
@@ -0,0 +1,39 @@
+from setuptools import setup
+
+setup(
+    name='sonic-platform',
+    version='1.0',
+    description='SONiC platform API implementation',
+    license='Apache 2.0',
+    author='SONiC Team',
+    author_email='support',
+    url='',
+    maintainer='support',
+    maintainer_email='',
+    packages=[
+        'sonic_platform',
+        'plat_hal',
+        'wbutil',
+        'eepromutil',
+        'hal-config',
+        'config',
+    ],
+    py_modules=[
+        'hal_pltfm',
+        'platform_util',
+        'platform_intf',
+    ],
+    classifiers=[
+        'Development Status :: 3 - Alpha',
+        'Environment :: Plugins',
+        'Intended Audience :: Developers',
+        'Intended Audience :: Information Technology',
+        'Intended Audience :: System Administrators',
+        'License :: OSI Approved :: Apache Software License',
+        'Natural Language :: English',
+        'Operating System :: POSIX :: Linux',
+        'Programming Language :: Python :: 3.7',
+        'Topic :: Utilities',
+    ],
+    keywords='sonic SONiC platform PLATFORM',
+)
diff --git a/src/sonic-device-data/tests/permitted_list b/src/sonic-device-data/tests/permitted_list
index b526724a7819..a4c904a3e125 100644
--- a/src/sonic-device-data/tests/permitted_list
+++ b/src/sonic-device-data/tests/permitted_list
@@ -347,3 +347,7 @@ sai_default_cpu_tx_tc
 oversubscribe_mixed_sister_25_50_enable
 sai_disable_srcmacqedstmac_ctrl
 programmability_ucode_relative_path
+cache_coherency_check
+core_clock_to_pm_clock_factor
+flowtracker_ipfix_observation_domain_id
+flowtracker_num_unique_user_entry_keys

From 6d4bdb2f654fb0bf63db0656455d268432b0e586 Mon Sep 17 00:00:00 2001
From: Rida Hanif <rida.hanif@xflowresearch.com>
Date: Fri, 18 Oct 2024 00:03:27 +0500
Subject: [PATCH 110/364] YANG Model for DHCP DoS Mitigation (#18873)

#### Why I did it
Added Support for DHCP rate limit

#### How I did it
Modifed sonic-port.yang by adding a new leaf for dhcp rate limit

#### How to verify it
Updated Config DB and YANG model
---
 .../tests/files/sample_config_db.json         | 123 ++++++++++++------
 .../tests/yang_model_tests/tests/port.json    |   4 +
 .../yang_model_tests/tests_config/port.json   |  46 +++++++
 .../yang-models/sonic-port.yang               |   6 +
 4 files changed, 138 insertions(+), 41 deletions(-)

diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 1ed8940f826c..d58849dd04eb 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -591,7 +591,8 @@
                 "link_training": "off",
                 "laser_freq": "191600",
                 "tx_power": "-26.6",
-                "mode":"trunk"
+                "mode":"trunk",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet1": {
                 "alias": "Eth1/2",
@@ -609,7 +610,8 @@
                 "link_training": "on",
                 "laser_freq": "191300",
                 "tx_power": "-27.3",
-                "mode":"trunk"
+                "mode":"trunk",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet2": {
                 "alias": "Eth1/3",
@@ -627,7 +629,8 @@
                 "adv_interface_types": "all",
                 "subport" : "0",
                 "mode":"trunk",
-                "dom_polling":"enabled"
+                "dom_polling":"enabled",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet3": {
                 "alias": "Eth1/4",
@@ -637,7 +640,8 @@
                 "tpid": "0x88A8",
                 "admin_status": "up",
                 "subport": "1",
-                "mode":"trunk"
+                "mode":"trunk",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet4": {
                 "alias": "Eth2/1",
@@ -648,7 +652,8 @@
                 "admin_status": "up",
                 "subport": "2",
                 "mode":"trunk",
-                "dom_polling":"enabled"
+                "dom_polling":"enabled",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet5": {
                 "alias": "Eth2/2",
@@ -658,7 +663,8 @@
                 "tpid": "0x9200",
                 "admin_status": "up",
                 "subport": "3",
-                "mode":"trunk"
+                "mode":"trunk",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet6": {
                 "alias": "Eth2/3",
@@ -668,7 +674,8 @@
                 "tpid": "0x8100",
                 "admin_status": "up",
                 "subport": "4",
-                "mode":"trunk"
+                "mode":"trunk",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet7": {
                 "alias": "Eth2/4",
@@ -678,7 +685,8 @@
                 "tpid": "0x8100",
                 "admin_status": "up",
                 "subport": "5",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet8": {
                 "alias": "Eth3/1",
@@ -688,7 +696,8 @@
                 "tpid": "0x8100",
                 "admin_status": "up",
                 "subport": "6",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet9": {
                 "alias": "Eth3/2",
@@ -698,7 +707,8 @@
                 "tpid": "0x8100",
                 "admin_status": "up",
                 "subport": "7",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet10": {
                 "alias": "Eth3/3",
@@ -708,7 +718,8 @@
                 "tpid": "0x8100",
                 "admin_status": "up",
                 "subport": "8",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet11": {
                 "alias": "Eth3/4",
@@ -717,7 +728,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet12": {
                 "alias": "Eth4/1",
@@ -726,7 +738,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet13": {
                 "alias": "Eth4/2",
@@ -735,7 +748,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet14": {
                 "alias": "Eth4/3",
@@ -744,7 +758,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet15": {
                 "alias": "Eth4/4",
@@ -753,7 +768,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet16": {
                 "alias": "Eth5/1",
@@ -762,7 +778,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet17": {
                 "alias": "Eth5/2",
@@ -771,7 +788,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet18": {
                 "alias": "Eth5/3",
@@ -780,7 +798,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet19": {
                 "alias": "Eth5/4",
@@ -789,7 +808,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet20": {
                 "alias": "Eth6/1",
@@ -798,7 +818,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet21": {
                 "alias": "Eth6/2",
@@ -807,7 +828,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet22": {
                 "alias": "Eth6/3",
@@ -816,7 +838,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet23": {
                 "alias": "Eth6/4",
@@ -825,7 +848,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet24": {
                 "alias": "Eth7/1",
@@ -834,7 +858,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet25": {
                 "alias": "Eth7/2",
@@ -843,7 +868,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet26": {
                 "alias": "Eth7/3",
@@ -852,7 +878,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet27": {
                 "alias": "Eth7/4",
@@ -861,7 +888,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet28": {
                 "alias": "Eth8/1",
@@ -870,7 +898,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet29": {
                 "alias": "Eth8/2",
@@ -879,7 +908,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"trunk"
+                "mode":"trunk",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet30": {
                 "alias": "Eth8/3",
@@ -888,7 +918,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"trunk"
+                "mode":"trunk",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet31": {
                 "alias": "Eth8/4",
@@ -897,7 +928,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"trunk"
+                "mode":"trunk",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet32": {
                 "alias": "Eth9/1",
@@ -906,7 +938,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"trunk"
+                "mode":"trunk",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet33": {
                 "alias": "Eth9/2",
@@ -915,7 +948,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"trunk"
+                "mode":"trunk",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet34": {
                 "alias": "Eth9/3",
@@ -924,7 +958,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"trunk"
+                "mode":"trunk",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet35": {
                 "alias": "Eth9/4",
@@ -933,7 +968,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"trunk"
+                "mode":"trunk",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet36": {
                 "alias": "Eth10/1",
@@ -942,7 +978,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"trunk"
+                "mode":"trunk",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet112": {
                 "alias": "Eth29/1",
@@ -952,7 +989,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet120": {
                 "alias": "Eth31/1",
@@ -962,7 +1000,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet-BP0": {
                 "admin_status": "up",
@@ -976,7 +1015,8 @@
                 "role": "Int",
                 "speed": "40000",
                 "tpid": "0x8100",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             },
             "Ethernet-BP4": {
                 "admin_status": "up",
@@ -990,7 +1030,8 @@
                 "role": "Int",
                 "speed": "40000",
                 "tpid": "0x8100",
-                "mode":"routed"
+                "mode":"routed",
+                "dhcp_rate_limit": "300"
             }
         },
         "LOGGER": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/port.json b/src/sonic-yang-models/tests/yang_model_tests/tests/port.json
index e00c88561955..f53d19f42e63 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/port.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/port.json
@@ -13,6 +13,10 @@
         "eStrKey" : "Pattern",
         "eStr": ["rc"]
     },
+     "PORT_VALID_DHCP_RATE_LIMIT": {
+         "desc": "PORT_VALID_DHCP_RATE_LIMIT no failure."
+     },
+    
     "PORT_VALID_MTU_TEST_1": {
         "desc": "PORT_VALID_MTU_TEST_1 no failure."
     },
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
index 3028c8e1dd55..bd375b73717b 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
@@ -88,6 +88,52 @@
             }
         }
     },
+
+    "PORT_VALID_DHCP_RATE_LIMIT": {
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "name": "Ethernet0",
+                        "alias": "etp1a",
+                        "lanes": "60, 61",
+                        "speed": 100000,
+                        "subport": 1,
+                        "mode":"trunk",
+                        "dhcp_rate_limit": "301"
+                    },
+                    {
+                       "name": "Ethernet2",
+                        "alias": "etp1b",
+                        "lanes": "62, 63",
+                        "speed": 100000,
+                        "subport": 2,
+                        "mode":"trunk",
+                        "dhcp_rate_limit": "500"
+                    },
+                    {
+                        "name": "Ethernet4",
+                        "alias": "etp1c",
+                        "lanes": "64, 65",
+                        "speed": 100000,
+                        "subport": 3,
+                        "mode":"trunk",
+                        "dhcp_rate_limit": "100000"
+                    },
+                    {
+                        "name": "Ethernet6",
+                        "alias": "etp1d",
+                        "lanes": "66, 67",
+                        "speed": 100000,
+                        "subport": 4,
+                        "mode":"trunk",
+                        "dhcp_rate_limit": "400000"
+                    }
+                ]
+            }
+        }
+    },
+
     "PORT_VALID_AUTONEG_TEST_1": {
         "sonic-port:sonic-port": {
             "sonic-port:PORT": {
diff --git a/src/sonic-yang-models/yang-models/sonic-port.yang b/src/sonic-yang-models/yang-models/sonic-port.yang
index 5ba14e28ef97..7d315626d5cf 100644
--- a/src/sonic-yang-models/yang-models/sonic-port.yang
+++ b/src/sonic-yang-models/yang-models/sonic-port.yang
@@ -101,6 +101,12 @@ module sonic-port{
 					}
 				}
 
+				leaf dhcp_rate_limit {
+					description "DHCP DOS Mitigation Rate with default value 300";
+					type uint32; 
+					default 300;
+				}
+
 				leaf link_training {
 					description "Port link training mode";
 

From 88d35620caf475218002c379fdc9f717e9eec466 Mon Sep 17 00:00:00 2001
From: vdahiya12 <67608553+vdahiya12@users.noreply.github.com>
Date: Thu, 17 Oct 2024 20:23:23 -0700
Subject: [PATCH 111/364] [Arista] Update config.bcm of Arista-7260CX3-Q44 for
 handling 40g optics with (#20527)

For 40G optics there is SAI handling of T0 facing ports to be set with SR4 type and unreliable los set for a fixed set of ports. For this property to be invoked the requirement is set
phy_unlos_msft=1 in config.bcm.
This change is to meet the requirement and once this property is set, the los/interface type settings is applied by SAI on the required ports.

Signed-off-by: Vaibhav Dahiya <vdahiya@microsoft.com>
---
 .../x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/config.bcm.j2    | 1 +
 1 file changed, 1 insertion(+)

diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/config.bcm.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/config.bcm.j2
index de7cac15435a..0433fd6c1cf5 100644
--- a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/config.bcm.j2
+++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/config.bcm.j2
@@ -1050,3 +1050,4 @@ serdes_preemphasis_117=0x105004
 {{ mmu_sock }}
 {{ IPinIP_sock }}
 phy_an_lt_msft=1
+phy_unlos_msft=1

From 846b4b26d7d4ac0565e4bdccb91fce1616da7ebe Mon Sep 17 00:00:00 2001
From: Wenda Chu <32250288+w1nda@users.noreply.github.com>
Date: Fri, 18 Oct 2024 11:24:26 +0800
Subject: [PATCH 112/364] [wol]  Extend wol to support sending magic pattern in
 udp payload (#20523)

Why I did it
Although the magic pattern is fixed, we can send the magic pattern in UDP payload to leverage the benefits of UDP.

How I did it
Add code to support sending payload in udp and provide CLI parameters for it.

How to verify it
Unit test and run tests in sonic-mgmt
---
 src/sonic-nettools/.gitignore        |   3 +-
 src/sonic-nettools/Cargo.lock        |   5 +-
 src/sonic-nettools/Makefile          |   8 +-
 src/sonic-nettools/wol/Cargo.toml    |   1 +
 src/sonic-nettools/wol/src/main.rs   |   2 +
 src/sonic-nettools/wol/src/socket.rs | 336 +++++++++++++++++++++++++++
 src/sonic-nettools/wol/src/wol.rs    | 276 +++++++++++++---------
 7 files changed, 521 insertions(+), 110 deletions(-)
 create mode 100644 src/sonic-nettools/wol/src/socket.rs

diff --git a/src/sonic-nettools/.gitignore b/src/sonic-nettools/.gitignore
index 046d25633d83..5a87e35f5600 100644
--- a/src/sonic-nettools/.gitignore
+++ b/src/sonic-nettools/.gitignore
@@ -1,3 +1,4 @@
 target/
 bin/
-.vscode/
\ No newline at end of file
+.vscode/
+*.pcap
\ No newline at end of file
diff --git a/src/sonic-nettools/Cargo.lock b/src/sonic-nettools/Cargo.lock
index 695393102228..2f75b62942c2 100644
--- a/src/sonic-nettools/Cargo.lock
+++ b/src/sonic-nettools/Cargo.lock
@@ -135,9 +135,9 @@ checksum = "f8478577c03552c21db0e2724ffb8986a5ce7af88107e6be5d2ee6e158c12800"
 
 [[package]]
 name = "libc"
-version = "0.2.155"
+version = "0.2.159"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "97b3888a4aecf77e811145cadf6eef5901f4782c53886191b2f693f24761847c"
+checksum = "561d97a539a36e26a9a5fad1ea11a3039a67714694aaa379433e580854bc3dc5"
 
 [[package]]
 name = "memchr"
@@ -438,5 +438,6 @@ name = "wol"
 version = "0.0.1"
 dependencies = [
  "clap",
+ "libc",
  "pnet",
 ]
diff --git a/src/sonic-nettools/Makefile b/src/sonic-nettools/Makefile
index 021b1eb805c6..db8242cf4ff0 100644
--- a/src/sonic-nettools/Makefile
+++ b/src/sonic-nettools/Makefile
@@ -14,4 +14,10 @@ endif
 
 clean:
 	rm -rf target
-	rm -rf bin
\ No newline at end of file
+	rm -rf bin
+
+test:
+	cargo test
+
+fmt:
+	cargo clippy
diff --git a/src/sonic-nettools/wol/Cargo.toml b/src/sonic-nettools/wol/Cargo.toml
index 6b2276e79724..26c8fd1c4f94 100644
--- a/src/sonic-nettools/wol/Cargo.toml
+++ b/src/sonic-nettools/wol/Cargo.toml
@@ -5,3 +5,4 @@ version = "0.0.1"
 [dependencies]
 pnet = "0.35.0"
 clap = { version  = "4.5.7", features = ["derive"] }
+libc = "0.2.159"
diff --git a/src/sonic-nettools/wol/src/main.rs b/src/sonic-nettools/wol/src/main.rs
index c04ba9411bcd..368f35a3c8ba 100644
--- a/src/sonic-nettools/wol/src/main.rs
+++ b/src/sonic-nettools/wol/src/main.rs
@@ -1,7 +1,9 @@
 mod wol;
+mod socket;
 
 extern crate clap;
 extern crate pnet;
+extern crate libc;
 
 fn main() {
     if let Err(e) = wol::build_and_send() {
diff --git a/src/sonic-nettools/wol/src/socket.rs b/src/sonic-nettools/wol/src/socket.rs
new file mode 100644
index 000000000000..c67bcba82a32
--- /dev/null
+++ b/src/sonic-nettools/wol/src/socket.rs
@@ -0,0 +1,336 @@
+use libc;
+use std::net::{Ipv4Addr, Ipv6Addr};
+use std::{convert::TryInto, io, ptr, mem};
+use std::ffi::CString;
+use std::os::raw::c_int;
+use std::result::Result;
+use std::str::FromStr;
+
+use crate::wol::{ WolErr, WolErrCode, vprintln};
+
+const ANY_INTERFACE: &str = "ANY_INTERFACE";
+const IPV4_ANY_ADDR : &str = "0.0.0.0";
+const IPV6_ANY_ADDR : &str = "::";
+
+type CSocket = c_int;
+
+pub trait WolSocket {
+    fn get_socket(&self) -> CSocket;
+
+    fn send_magic_packet(&self, buf : &[u8]) -> Result<usize, WolErr> {
+        let res = unsafe {
+            libc::send(self.get_socket(), buf.as_ptr() as *const libc::c_void, buf.len(), 0)
+        };
+        if res < 0 {
+            Err(WolErr {
+                msg: format!("Failed to send packet, rc={}, error: {}", res, io::Error::last_os_error()),
+                code: WolErrCode::InternalError as i32
+            })
+        } else {
+            Ok(res as usize)
+        }
+    }
+}
+
+pub struct RawSocket{
+    pub cs: CSocket
+}
+
+impl RawSocket {
+    pub fn new(intf_name: &str) -> Result<RawSocket, WolErr> {
+        vprintln(format!("Creating raw socket for interface: {}", intf_name));
+        let res = unsafe {
+            libc::socket(libc::AF_PACKET, libc::SOCK_RAW, libc::ETH_P_ALL.to_be())
+        };
+        if res < 0 {
+            return Err(WolErr {
+                msg: format!("Failed to create raw socket, rc={}, error: {}", res, io::Error::last_os_error()),
+                code: WolErrCode::InternalError as i32
+            })
+        }
+        let _socket = RawSocket{ cs: res };
+        _socket.bind_to_intf(intf_name)?;
+        Ok(_socket)
+    }
+
+    fn bind_to_intf(&self, intf_name: &str) -> Result<(), WolErr> {
+        vprintln(format!("Binding raw socket to interface: {}", intf_name));
+        let addr_ll: libc::sockaddr_ll = RawSocket::generate_sockaddr_ll(intf_name)?;
+
+        vprintln(format!("Interface index={}, MAC={}", addr_ll.sll_ifindex, addr_ll.sll_addr.iter().map(|x| format!("{:02x}", x)).collect::<Vec<String>>().join(":")));
+
+        let res = unsafe {
+            libc::bind(
+                self.get_socket(),
+                &addr_ll as *const libc::sockaddr_ll as *const libc::sockaddr,
+                mem::size_of::<libc::sockaddr_ll>() as u32,
+            )
+        };
+
+        assert_return_code_is_zero(res, "Failed to bind raw socket to intface", WolErrCode::SocketError)?;
+
+        Ok(())
+    }
+
+    fn generate_sockaddr_ll(intf_name: &str) -> Result<libc::sockaddr_ll, WolErr> {
+        let mut addr_ll: libc::sockaddr_ll = unsafe { mem::zeroed() };
+        addr_ll.sll_family = libc::AF_PACKET as u16;
+        addr_ll.sll_protocol = (libc::ETH_P_ALL as u16).to_be();
+        addr_ll.sll_halen = 6; // MAC address length in bytes
+
+        let mut addrs: *mut libc::ifaddrs = ptr::null_mut();
+        let res = unsafe {
+            libc::getifaddrs(&mut addrs)
+        };
+        assert_return_code_is_zero(res, "Failed on getifaddrs function", WolErrCode::InternalError)?;
+
+        let mut addr = addrs;
+        while !addr.is_null() {
+            let addr_ref = unsafe { *addr };
+            if addr_ref.ifa_name.is_null() {
+                addr = addr_ref.ifa_next;
+                continue;
+            }
+
+            let _in = unsafe {
+                std::ffi::CStr::from_ptr(addr_ref.ifa_name).to_str().unwrap()
+            };
+            if _in == intf_name {
+                addr_ll.sll_ifindex = unsafe {
+                    libc::if_nametoindex(addr_ref.ifa_name) as i32
+                };
+                addr_ll.sll_addr = unsafe { (*(addr_ref.ifa_addr as *const libc::sockaddr_ll)).sll_addr };
+                break;
+            }
+            
+            addr = addr_ref.ifa_next;
+        }
+
+        if addr.is_null() {
+            return Err(WolErr {
+                msg: format!("Failed to find interface: {}", intf_name),
+                code: WolErrCode::InternalError as i32
+            });
+        }
+
+        unsafe {
+            libc::freeifaddrs(addrs);
+        }
+
+        Ok(addr_ll)
+    }
+}
+
+impl WolSocket for RawSocket {
+    fn get_socket(&self) -> CSocket { self.cs }
+}
+
+#[derive(Debug)]
+pub struct UdpSocket{
+    pub cs: CSocket
+}
+
+impl UdpSocket {
+    pub fn new(intf_name: &str, dst_port: u16, ip_addr: &str) -> Result<UdpSocket, WolErr> {
+        vprintln(format!("Creating udp socket for interface: {}, destination port: {}, ip address: {}", intf_name, dst_port, ip_addr));
+        let res = match ip_addr.contains(':') {
+            true => unsafe {libc::socket(libc::AF_INET6, libc::SOCK_DGRAM, libc::IPPROTO_UDP)},
+            false => unsafe {libc::socket(libc::AF_INET, libc::SOCK_DGRAM, libc::IPPROTO_UDP)},
+        };
+        if res < 0 {
+            return Err(WolErr {
+                msg: format!("Failed to create udp socket, rc={}, error: {}", res, io::Error::last_os_error()),
+                code: WolErrCode::SocketError as i32
+            })
+        }
+        let _socket = UdpSocket{ cs: res };
+        _socket.enable_broadcast()?;
+        _socket.bind_to_intf(intf_name)?;
+        _socket.connect_to_addr(dst_port, ip_addr)?;
+        Ok(_socket)
+    }
+
+    fn enable_broadcast(&self) -> Result<(), WolErr> {
+        vprintln(String::from("Enabling broadcast on udp socket"));
+        let res = unsafe {
+            libc::setsockopt(
+                self.get_socket(),
+                libc::SOL_SOCKET,
+                libc::SO_BROADCAST,
+                &1 as *const i32 as *const libc::c_void,
+                mem::size_of::<i32>().try_into().unwrap(),
+            )
+        };
+        assert_return_code_is_zero(res, "Failed to enable broadcast on udp socket", WolErrCode::SocketError)?;
+        
+        Ok(())
+    }
+
+    fn bind_to_intf(&self, intf: &str) -> Result<(), WolErr> {
+        vprintln(format!("Binding udp socket to interface: {}", intf));
+        let c_intf = CString::new(intf).map_err(|_| WolErr {
+            msg: String::from("Invalid interface name for binding"),
+            code: WolErrCode::SocketError as i32,
+        })?;
+        let res = unsafe {
+            libc::setsockopt(
+                self.get_socket(),
+                libc::SOL_SOCKET,
+                libc::SO_BINDTODEVICE,
+                c_intf.as_ptr() as *const libc::c_void,
+                c_intf.as_bytes_with_nul().len() as u32,
+            )
+        };
+        assert_return_code_is_zero(res, "Failed to bind udp socket to interface", WolErrCode::SocketError)?;
+
+        Ok(())
+    }
+
+    fn connect_to_addr(&self, port: u16, ip_addr: &str) -> Result<(), WolErr> {
+        vprintln(format!("Setting udp socket destination as address: {}, port: {}", ip_addr, port));
+        let (addr, addr_len) = match ip_addr.contains(':') {
+            true => (
+                &ipv6_addr(port, ip_addr, ANY_INTERFACE)? as *const libc::sockaddr_in6 as *const libc::sockaddr,
+                mem::size_of::<libc::sockaddr_in6>() as u32
+            ),
+            false => (
+                &ipv4_addr(port, ip_addr)? as *const libc::sockaddr_in as *const libc::sockaddr,
+                mem::size_of::<libc::sockaddr_in>() as u32
+            ),
+        };
+        let res = unsafe {
+            libc::connect(
+                self.get_socket(),
+                addr,
+                addr_len
+            )
+        };
+        assert_return_code_is_zero(res,"Failed to connect udp socket to address", WolErrCode::SocketError)?;
+
+        Ok(())
+    }
+}
+
+impl WolSocket for UdpSocket {
+    fn get_socket(&self) -> CSocket { self.cs }
+}
+
+fn ipv4_addr(port: u16, addr: &str) -> Result<libc::sockaddr_in, WolErr> {
+    let _addr = match addr == IPV4_ANY_ADDR {
+        true => libc::in_addr { s_addr: libc::INADDR_ANY },
+        false => libc::in_addr { s_addr: u32::from(Ipv4Addr::from_str(addr).map_err(|e| 
+                WolErr{
+                    msg: format!("Failed to parse ipv4 address: {}", e),
+                    code: WolErrCode::SocketError as i32
+                }
+            )?).to_be()
+        },
+    };
+    Ok(
+        libc::sockaddr_in {
+            sin_family: libc::AF_INET as u16,
+            sin_port: port.to_be(),
+            sin_addr: _addr,
+            sin_zero: [0; 8],
+        }
+    )
+}
+
+fn ipv6_addr(port: u16, addr: &str, intf_name: &str) -> Result<libc::sockaddr_in6, WolErr> {
+    let _addr = match addr == IPV6_ANY_ADDR {
+        true => libc::IN6ADDR_ANY_INIT,
+        false => libc::in6_addr { s6_addr: Ipv6Addr::from_str(addr).map_err(|e| 
+                WolErr{
+                    msg: format!("Failed to parse ipv6 address: {}", e),
+                    code: WolErrCode::SocketError as i32
+                }
+            )?.octets()
+        },
+    };
+    let _scope_id= match intf_name == ANY_INTERFACE {
+        true => 0,
+        false => unsafe { libc::if_nametoindex(CString::new(intf_name).map_err(|_| 
+                WolErr{
+                    msg: String::from("Invalid interface name for binding"),
+                    code: WolErrCode::SocketError as i32
+                }
+            )?.as_ptr()) as u32
+        }
+    };
+    Ok(
+        libc::sockaddr_in6 {
+            sin6_family: libc::AF_INET6 as u16,
+            sin6_port: port.to_be(),
+            sin6_flowinfo: 0,
+            sin6_addr: _addr,
+            sin6_scope_id: _scope_id.to_be(),
+        }
+    )
+}
+
+fn assert_return_code_is_zero(rc: i32, msg: &str, err_code: WolErrCode) -> Result<(), WolErr> {
+    if rc != 0 {
+        Err(WolErr {
+            msg: format!("{}, rc={},error: {}", msg, rc, io::Error::last_os_error()),
+            code: err_code as i32,
+        })
+    } else {
+        Ok(())
+    }
+}
+
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+
+    #[test]
+    fn test_ipv4_addr() {
+        let port = 1234;
+        let addr = ipv4_addr(port, IPV4_ANY_ADDR).unwrap();
+        assert_eq!(addr.sin_family , libc::AF_INET as u16);
+        assert_eq!(addr.sin_port.to_le() , port.to_be());
+        assert_eq!(addr.sin_addr.s_addr , libc::INADDR_ANY);
+        assert_eq!(addr.sin_zero , [0; 8]);
+
+        let ip = "1.1.1.1";
+        let addr = ipv4_addr(port, &ip).unwrap();
+        assert_eq!(addr.sin_family , libc::AF_INET as u16);
+        assert_eq!(addr.sin_port.to_le() , port.to_be());
+        assert_eq!(addr.sin_addr.s_addr , u32::from(Ipv4Addr::from_str(ip).unwrap()).to_be());
+        assert_eq!(addr.sin_zero , [0; 8]);
+    }
+
+    #[test]
+    fn test_ipv6_addr() {
+        let port = 1234;
+        let addr = ipv6_addr(port, IPV6_ANY_ADDR, ANY_INTERFACE).unwrap();
+        assert_eq!(addr.sin6_family , libc::AF_INET6 as u16);
+        assert_eq!(addr.sin6_port.to_le() , port.to_be());
+        assert_eq!(addr.sin6_flowinfo , 0);
+        assert_eq!(addr.sin6_addr.s6_addr , libc::IN6ADDR_ANY_INIT.s6_addr);
+        assert_eq!(addr.sin6_scope_id , 0);
+
+        let ip = "2001:db8::1";
+        let addr = ipv6_addr(port, &ip, ANY_INTERFACE).unwrap();
+        assert_eq!(addr.sin6_family , libc::AF_INET6 as u16);
+        assert_eq!(addr.sin6_port.to_le() , port.to_be());
+        assert_eq!(addr.sin6_flowinfo , 0);
+        assert_eq!(addr.sin6_addr.s6_addr , Ipv6Addr::from_str(ip).unwrap().octets());
+        assert_eq!(addr.sin6_scope_id , 0);
+    }
+
+    #[test]
+    fn test_assert_return_code_is_zero() {
+        let rc = 0;
+        assert_eq!(assert_return_code_is_zero(rc, "", WolErrCode::InternalError).is_ok(), true);
+
+        let rc = -1;
+        let msg = "test";
+        let err_code = WolErrCode::InternalError;
+        let result = assert_return_code_is_zero(rc, msg, err_code);
+        assert_eq!(result.is_err(), true);
+        assert_eq!(result.as_ref().unwrap_err().code, WolErrCode::InternalError as i32);
+        assert_eq!(result.unwrap_err().msg, format!("{}, rc=-1,error: {}", msg, io::Error::last_os_error()));
+    }
+}
\ No newline at end of file
diff --git a/src/sonic-nettools/wol/src/wol.rs b/src/sonic-nettools/wol/src/wol.rs
index b5d598d369f3..ff04c017cb78 100644
--- a/src/sonic-nettools/wol/src/wol.rs
+++ b/src/sonic-nettools/wol/src/wol.rs
@@ -1,15 +1,26 @@
 use clap::builder::ArgPredicate;
 use clap::Parser;
-use pnet::datalink::Channel::Ethernet;
-use pnet::datalink::{self, DataLinkSender, MacAddr, NetworkInterface};
+use pnet::datalink;
 use std::fs::read_to_string;
+use std::net::IpAddr;
 use std::result::Result;
 use std::str::FromStr;
+use std::sync::Mutex;
 use std::thread;
 use std::time::Duration;
 
+use crate::socket::{WolSocket, RawSocket, UdpSocket};
+
 const BROADCAST_MAC: [u8; 6] = [0xff, 0xff, 0xff, 0xff, 0xff, 0xff];
 
+pub static VERBOSE_OUTPUT: Mutex<bool> = Mutex::new(false);
+
+pub fn vprintln(msg: String) {
+    if *VERBOSE_OUTPUT.lock().unwrap() {
+        println!("{}", msg);
+    }
+}
+
 #[derive(Parser, Debug)]
 #[command(
     next_line_help = true,
@@ -20,7 +31,13 @@ Examples:
     wol Ethernet10 00:11:22:33:44:55
     wol Ethernet10 00:11:22:33:44:55 -b
     wol Vlan1000 00:11:22:33:44:55,11:33:55:77:99:bb -p 00:22:44:66:88:aa
-    wol Vlan1000 00:11:22:33:44:55,11:33:55:77:99:bb -p 192.168.1.1 -c 3 -i 2000"
+    wol Vlan1000 00:11:22:33:44:55,11:33:55:77:99:bb -p 192.168.1.1 -c 3 -i 2000
+    wol Ethernet10 00:11:22:33:44:55,11:33:55:77:99:bb -u
+    wol Vlan1000 00:11:22:33:44:55,11:33:55:77:99:bb -u -c 3 -i 2000
+    wol Vlan1000 00:11:22:33:44:55,11:33:55:77:99:bb -u -a 192.168.255.255
+    wol Vlan1000 00:11:22:33:44:55,11:33:55:77:99:bb -u -a ffff::ffff
+    wol Vlan1000 00:11:22:33:44:55,11:33:55:77:99:bb -u -a
+"
 )]
 struct WolArgs {
     /// The name of the network interface to send the magic packet through
@@ -30,29 +47,31 @@ struct WolArgs {
     target_mac: String,
 
     /// The flag to indicate if use broadcast MAC address instead of target device's MAC address as Destination MAC Address in Ethernet Frame Header [default: false]
-    #[arg(short, long, default_value_t = false)]
+    #[arg(short, long, default_value_t = false, conflicts_with("udp"))]
     broadcast: bool,
 
+    /// The flag to indicate if send udp packet [default: false]
+    #[arg(short, long, default_value_t = false, conflicts_with("broadcast"))]
+    udp: bool,
+
+    /// The destination ip address, both IPv4 address and IPv6 address are supported 
+    #[arg(short = 'a', long, default_value_t = String::from("255.255.255.255"), requires_if(ArgPredicate::IsPresent, "udp"))]
+    ip_address: String,
+
+    /// The destination udp port.
+    #[arg(short = 't', long, default_value_t = 9, requires_if(ArgPredicate::IsPresent, "udp"))]
+    udp_port: u16,
+
     /// An optional 4 or 6 byte password, in ethernet hex format or quad-dotted decimal (e.g. "127.0.0.1" or "00:11:22:33:44:55")
     #[arg(short, long, value_parser = parse_password)]
     password: Option<Password>,
 
-    /// For each target MAC address, the count of magic packets to send. count must between 1 and 5. This param must use with -i. [default: 1]
-    #[arg(
-        short,
-        long,
-        default_value_t = 1,
-        requires_if(ArgPredicate::IsPresent, "interval")
-    )]
+    /// For each target MAC address, the count of magic packets to send. count must between 1 and 5. This param must use with -i.
+    #[arg(short, long, default_value_t = 1, requires_if(ArgPredicate::IsPresent, "interval"))]
     count: u8,
 
-    /// Wait interval milliseconds between sending each magic packet. interval must between 0 and 2000. This param must use with -c. [default: 0]
-    #[arg(
-        short,
-        long,
-        default_value_t = 0,
-        requires_if(ArgPredicate::IsPresent, "count")
-    )]
+    /// Wait interval milliseconds between sending each magic packet. interval must between 0 and 2000. This param must use with -c.
+    #[arg(short, long, default_value_t = 0, requires_if(ArgPredicate::IsPresent, "count"))]
     interval: u64,
 
     /// The flag to indicate if we should print verbose output
@@ -83,42 +102,31 @@ impl std::fmt::Display for WolErr {
     }
 }
 
-enum WolErrCode {
+pub enum WolErrCode {
     SocketError = 1,
     InvalidArguments = 2,
-    UnknownError = 999,
+    InternalError = 255,
 }
 
 pub fn build_and_send() -> Result<(), WolErr> {
     let args = WolArgs::parse();
     let target_macs = parse_target_macs(&args)?;
     valide_arguments(&args)?;
+    *VERBOSE_OUTPUT.lock().unwrap() = args.verbose;
     let src_mac = get_interface_mac(&args.interface)?;
-    let mut tx = open_tx_channel(&args.interface)?;
+    let socket = create_wol_socket(&args)?;
     for target_mac in target_macs {
-        if args.verbose {
-            println!(
+        vprintln(format!(
                 "Building and sending packet to target mac address {}",
                 target_mac
                     .iter()
                     .map(|b| format!("{:02X}", b))
                     .collect::<Vec<String>>()
                     .join(":")
-            );
-        }
-        let dst_mac = if args.broadcast {
-            BROADCAST_MAC
-        } else {
-            target_mac
-        };
-        let magic_bytes = build_magic_packet(&src_mac, &dst_mac, &target_mac, &args.password)?;
-        send_magic_packet(
-            &mut tx,
-            magic_bytes,
-            &args.count,
-            &args.interval,
-            &args.verbose,
-        )?;
+            )
+        );
+        let magic_bytes = build_magic_bytes(&args, &src_mac, &target_mac, &args.password)?;
+        send_magic_packet(socket.as_ref(), magic_bytes, &args.count, &args.interval)?;
     }
 
     Ok(())
@@ -149,11 +157,18 @@ fn valide_arguments(args: &WolArgs) -> Result<(), WolErr> {
         });
     }
 
+    if IpAddr::from_str(&args.ip_address).is_err() {
+        return Err(WolErr {
+            msg: String::from("Invalid ip address"),
+            code: WolErrCode::InvalidArguments as i32,
+        });
+    }
+
     Ok(())
 }
 
 fn parse_mac_addr(mac_str: &str) -> Result<[u8; 6], WolErr> {
-    MacAddr::from_str(mac_str)
+    datalink::MacAddr::from_str(mac_str)
         .map(|mac| mac.octets())
         .map_err(|_| WolErr {
             msg: String::from("Invalid MAC address"),
@@ -230,14 +245,14 @@ fn is_ipv4_address_valid(ipv4_str: &str) -> bool {
 fn get_interface_mac(interface_name: &String) -> Result<[u8; 6], WolErr> {
     if let Some(interface) = datalink::interfaces()
         .into_iter()
-        .find(|iface: &NetworkInterface| iface.name == *interface_name)
+        .find(|iface: &datalink::NetworkInterface| iface.name == *interface_name)
     {
         if let Some(mac) = interface.mac {
             Ok(mac.octets())
         } else {
             Err(WolErr {
                 msg: String::from("Could not get MAC address of target interface"),
-                code: WolErrCode::UnknownError as i32,
+                code: WolErrCode::InternalError as i32,
             })
         }
     } else {
@@ -248,91 +263,76 @@ fn get_interface_mac(interface_name: &String) -> Result<[u8; 6], WolErr> {
     }
 }
 
-fn build_magic_packet(
+fn build_magic_bytes(
+    args: &WolArgs,
     src_mac: &[u8; 6],
-    dst_mac: &[u8; 6],
     target_mac: &[u8; 6],
     password: &Option<Password>,
 ) -> Result<Vec<u8>, WolErr> {
     let password_len = password.as_ref().map_or(0, |p| p.ref_bytes().len());
-    let mut pkt = vec![0u8; 116 + password_len];
-    pkt[0..6].copy_from_slice(dst_mac);
-    pkt[6..12].copy_from_slice(src_mac);
-    pkt[12..14].copy_from_slice(&[0x08, 0x42]);
-    pkt[14..20].copy_from_slice(&[0xff; 6]);
-    pkt[20..116].copy_from_slice(&target_mac.repeat(16));
+    let mut mbs = vec![0u8; 102 + password_len];
+    mbs[0..6].copy_from_slice(&[0xff; 6]);
+    mbs[6..102].copy_from_slice(&target_mac.repeat(16));
     if let Some(p) = password {
-        pkt[116..116 + password_len].copy_from_slice(p.ref_bytes());
+        mbs[102..102 + password_len].copy_from_slice(p.ref_bytes());
+    }
+    if !args.udp {
+        let mut _ether_header = vec![0u8; 14];
+        _ether_header[0..6].copy_from_slice( if args.broadcast { &BROADCAST_MAC } else { target_mac });
+        _ether_header[6..12].copy_from_slice(src_mac);
+        _ether_header[12..14].copy_from_slice(&[0x08, 0x42]); // EtherType for WOL
+        mbs.splice(0..0, _ether_header);
     }
-    Ok(pkt)
+    Ok(mbs)
 }
 
 fn send_magic_packet(
-    tx: &mut Box<dyn DataLinkSender>,
-    packet: Vec<u8>,
+    socket: &dyn WolSocket,
+    payload: Vec<u8>,
     count: &u8,
-    interval: &u64,
-    verbose: &bool,
-) -> Result<(), WolErr> {
+    interval: &u64
+) -> Result<(), WolErr>
+{
     for nth in 0..*count {
-        match tx.send_to(&packet, None) {
-            Some(Ok(_)) => {}
-            Some(Err(e)) => {
+        match socket.send_magic_packet(&payload) {
+            Ok(_) => {}
+            Err(e) => {
                 return Err(WolErr {
                     msg: format!("Network is down: {}", e),
                     code: WolErrCode::SocketError as i32,
                 });
             }
-            None => {
-                return Err(WolErr {
-                    msg: String::from("Network is down"),
-                    code: WolErrCode::SocketError as i32,
-                });
-            }
         }
-        if *verbose {
-            println!(
+        
+        vprintln(
+            format!(
                 "  | -> Sent the {}th packet and sleep for {} seconds",
                 &nth + 1,
                 &interval
-            );
-            println!(
-                "    | -> Packet bytes in hex {}",
-                &packet
+            )
+        );
+        vprintln(
+            format!(
+                "    | -> paylod bytes in hex {}",
+                &payload
                     .iter()
                     .fold(String::new(), |acc, b| acc + &format!("{:02X}", b))
             )
-        }
+        );
         thread::sleep(Duration::from_millis(*interval));
     }
     Ok(())
 }
 
-fn open_tx_channel(interface: &str) -> Result<Box<dyn DataLinkSender>, WolErr> {
-    if let Some(interface) = datalink::interfaces()
-        .into_iter()
-        .find(|iface: &NetworkInterface| iface.name == interface)
-    {
-        match datalink::channel(&interface, Default::default()) {
-            Ok(Ethernet(tx, _)) => Ok(tx),
-            Ok(_) => Err(WolErr {
-                msg: String::from("Network is down"),
-                code: WolErrCode::SocketError as i32,
-            }),
-            Err(e) => Err(WolErr {
-                msg: format!("Network is down: {}", e),
-                code: WolErrCode::SocketError as i32,
-            }),
-        }
+
+fn create_wol_socket(args: &WolArgs) -> Result<Box<dyn WolSocket>, WolErr> {
+    let _socket: Box<dyn WolSocket> = if args.udp {
+        Box::new(UdpSocket::new(&args.interface, args.udp_port, &args.ip_address)?)
     } else {
-        Err(WolErr {
-            msg: format!(
-                "Invalid value for \"INTERFACE\": interface {} is not up",
-                interface
-            ),
-            code: WolErrCode::InvalidArguments as i32,
-        })
-    }
+        Box::new(RawSocket::new(&args.interface)?)
+    };
+
+    Ok(_socket)
 }
 
 #[cfg(test)]
@@ -460,6 +460,9 @@ mod tests {
             interface: "Ethernet10".to_string(),
             target_mac: "00:11:22:33:44:55".to_string(),
             broadcast: false,
+            udp: false,
+            ip_address: String::from(""),
+            udp_port: 9,
             password: None,
             count: 1,
             interval: 0,
@@ -509,12 +512,13 @@ mod tests {
     }
 
     #[test]
-    fn test_build_magic_packet() {
+    fn test_build_magic_bytes() {
+        let args = WolArgs::try_parse_from(&["wol", "dontcare", "dontcare"]).unwrap();
         let src_mac = [0x00, 0x11, 0x22, 0x33, 0x44, 0x55];
         let target_mac = [0xff, 0xff, 0xff, 0xff, 0xff, 0xff];
         let four_bytes_password = Some(Password(vec![0x00, 0x11, 0x22, 0x33]));
         let magic_packet =
-            build_magic_packet(&src_mac, &target_mac, &target_mac, &four_bytes_password).unwrap();
+            build_magic_bytes(&args, &src_mac,  &target_mac, &four_bytes_password).unwrap();
         assert_eq!(magic_packet.len(), 120);
         assert_eq!(&magic_packet[0..6], &target_mac);
         assert_eq!(&magic_packet[6..12], &src_mac);
@@ -524,7 +528,7 @@ mod tests {
         assert_eq!(&magic_packet[116..120], &[0x00, 0x11, 0x22, 0x33]);
         let six_bytes_password = Some(Password(vec![0x00, 0x11, 0x22, 0x33, 0x44, 0x55]));
         let magic_packet =
-            build_magic_packet(&src_mac, &target_mac, &target_mac, &six_bytes_password).unwrap();
+            build_magic_bytes(&args, &src_mac, &target_mac, &six_bytes_password).unwrap();
         assert_eq!(magic_packet.len(), 122);
         assert_eq!(&magic_packet[0..6], &target_mac);
         assert_eq!(&magic_packet[6..12], &src_mac);
@@ -538,13 +542,23 @@ mod tests {
     }
 
     #[test]
-    fn test_build_magic_packet_without_password() {
+    fn test_build_magic_bytes_without_password() {
+        let args = WolArgs::try_parse_from(&["wol", "dontcare", "dontcare"]).unwrap();
         let src_mac = [0x00, 0x11, 0x22, 0x33, 0x44, 0x55];
-        let dst_mac = [0xff, 0xff, 0xff, 0xff, 0xff, 0xff];
         let target_mac = [0x01, 0x02, 0x03, 0x04, 0x05, 0x06];
-        let magic_packet = build_magic_packet(&src_mac, &dst_mac, &target_mac, &None).unwrap();
+        let magic_packet = build_magic_bytes(&args, &src_mac, &target_mac, &None).unwrap();
         assert_eq!(magic_packet.len(), 116);
-        assert_eq!(&magic_packet[0..6], &dst_mac);
+        assert_eq!(&magic_packet[0..6], &target_mac);
+        assert_eq!(&magic_packet[6..12], &src_mac);
+        assert_eq!(&magic_packet[12..14], &[0x08, 0x42]);
+        assert_eq!(&magic_packet[14..20], &[0xff; 6]);
+        assert_eq!(&magic_packet[20..116], target_mac.repeat(16));
+        let args = WolArgs::try_parse_from(&["wol", "dontcare", "dontcare", "-b"]).unwrap();
+        let src_mac = [0x00, 0x11, 0x22, 0x33, 0x44, 0x55];
+        let target_mac = [0x01, 0x02, 0x03, 0x04, 0x05, 0x06];
+        let magic_packet = build_magic_bytes(&args, &src_mac, &target_mac, &None).unwrap();
+        assert_eq!(magic_packet.len(), 116);
+        assert_eq!(&magic_packet[0..6], BROADCAST_MAC);
         assert_eq!(&magic_packet[6..12], &src_mac);
         assert_eq!(&magic_packet[12..14], &[0x08, 0x42]);
         assert_eq!(&magic_packet[14..20], &[0xff; 6]);
@@ -679,9 +693,59 @@ mod tests {
             "error: the following required arguments were not provided:\n  --interval <INTERVAL>\n\nUsage: wol --count <COUNT> --interval <INTERVAL> <INTERFACE> <TARGET_MAC>\n\nFor more information, try '--help'.\n"
         );
         // Verbose can be set
-        let args =
-            WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-b", "--verbose"])
-                .unwrap();
+        let args = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-b", "--verbose"]).unwrap();
         assert_eq!(args.verbose, true);
+        // Ip address should be valid
+        let args = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-b", "-a", "xxx"]);
+        let result = valide_arguments(&args.unwrap());
+        assert!(result.is_err());
+        assert_eq!(
+            result.unwrap_err().to_string(),
+            "Error: Invalid ip address"
+        );
+        // Udp port should be in 0-65535
+        let args = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-u", "-t", "65535"])
+            .unwrap();
+        assert_eq!(args.udp_port, 65535);
+        let result = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-u", "-t", "65536"]);
+        assert!(result.is_err());
+        assert_eq!(
+            result.unwrap_err().to_string(),
+            "error: invalid value '65536' for '--udp-port <UDP_PORT>': 65536 is not in 0..=65535\n\nFor more information, try '--help'.\n"
+        );
+        // Udp port should be specified with udp flag
+        let result = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-t", "9"]);
+        assert!(result.is_err());
+        assert_eq!(
+            result.unwrap_err().to_string(),
+            "error: the following required arguments were not provided:\n  --udp\n\nUsage: wol --udp --udp-port <UDP_PORT> <INTERFACE> <TARGET_MAC>\n\nFor more information, try '--help'.\n"
+        );
+        // Ip address should be specified with udp flag
+        let result = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-a", "192.168.1.1"]);
+        assert!(result.is_err());
+        assert_eq!(
+            result.unwrap_err().to_string(),
+            "error: the following required arguments were not provided:\n  --udp\n\nUsage: wol --udp --ip-address <IP_ADDRESS> <INTERFACE> <TARGET_MAC>\n\nFor more information, try '--help'.\n"
+        );
+        // Broadcast and udp flags are mutually exclusive
+        let result = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-b", "-u"]);
+        assert!(result.is_err());
+        assert_eq!(
+            result.unwrap_err().to_string(),
+            "error: the argument '--broadcast' cannot be used with '--udp'\n\nUsage: wol --broadcast <INTERFACE> <TARGET_MAC>\n\nFor more information, try '--help'.\n"
+        );
+    }
+
+    #[test]
+    fn verify_args_default_value(){
+        let args = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05"]).unwrap();
+        assert_eq!(args.broadcast, false);
+        assert_eq!(args.udp, false);
+        assert_eq!(args.ip_address, "255.255.255.255");
+        assert_eq!(args.udp_port, 9);
+        assert_eq!(args.password.is_none(), true);
+        assert_eq!(args.count, 1);
+        assert_eq!(args.interval, 0);
+        assert_eq!(args.verbose, false);
     }
 }

From 9076904b83179b80070e92763af54856ce09cf80 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 19 Oct 2024 19:04:05 +0800
Subject: [PATCH 113/364] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20546)

#### Why I did it
src/sonic-utilities
```
* 4a6d1218 - (HEAD -> master, origin/master, origin/HEAD) [doc] correct the fec histogram output for show int counters fec-histogram (#3579) (9 hours ago) [vdahiya12]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 244a18853f56..4a6d12180763 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 244a18853f56d40ad8460455fc20f9352402d022
+Subproject commit 4a6d12180763af3a62c8ae773f140737052d0011

From fac457bd78a1f0af3e6e9a98e60d224b17d111aa Mon Sep 17 00:00:00 2001
From: Nazarii Hnydyn <nazariig@nvidia.com>
Date: Sun, 20 Oct 2024 15:38:27 +0300
Subject: [PATCH 114/364] [Mellanox] Update SPC-1 SimX resource allocation
 (#20461)

- Why I did it
To fix hw-mgmt init on a SimX platform

- How I did it
Disabled W/A for SPC-1 HW resource allocation

- How to verify it
Check service active state
systemctl is-active hw-management.service

Signed-off-by: Nazarii Hnydyn <nazariig@nvidia.com>
---
 device/mellanox/x86_64-mlnx_msn2700_simx-r0/installer.conf | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
 mode change 120000 => 100644 device/mellanox/x86_64-mlnx_msn2700_simx-r0/installer.conf

diff --git a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/installer.conf b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/installer.conf
deleted file mode 120000
index 955db12ff425..000000000000
--- a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/installer.conf
+++ /dev/null
@@ -1 +0,0 @@
-../x86_64-mlnx_msn2700-r0/installer.conf
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/installer.conf b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/installer.conf
new file mode 100644
index 000000000000..c46f0eb7a459
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/installer.conf
@@ -0,0 +1 @@
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq"

From 20ab1910557ec82674d533ec43754bf681065035 Mon Sep 17 00:00:00 2001
From: Vivek <vivekreddykarri98@gmail.com>
Date: Sun, 20 Oct 2024 05:44:03 -0700
Subject: [PATCH 115/364] [Mellanox] Disable IOMMU for SN4280 platform (#20271)

- Why I did it
Disable amd_iommu cmdline option to improve the bootup time after kexec from 60 sec to < 10 sec.

- How I did it

- How to verify it
Verified Warm-reboot is finishing much earlier
Ran the sonic-mgmt test suite and verified no issue.

Signed-off-by: Vivek Reddy <vkarri@nvidia.com>
---
 device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf
index 867e2217ce1b..531efb3e9143 100644
--- a/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf
@@ -1 +1 @@
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq module_blacklist=mlx5_ib,mlx5_core ima_hash=sha384"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq module_blacklist=mlx5_ib,mlx5_core ima_hash=sha384 amd_iommu=off"

From 905c666e02e01c2508f2beb1a195333338f4c7fb Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Sun, 20 Oct 2024 20:53:21 +0800
Subject: [PATCH 116/364] [Mellanox] use SDK sysfs for module low power mode
 control (#19388)

- Why I did it
Nvidia platform API is using SDK API to control module low power mode. This PR is aimed to migrate those logic to
SDK provided sysfs nodes.

- How I did it
Use SDK provided sysfs nodes for LPM control.

- How to verify it
Manual test passed
sonic-mgmt regression test passed
---
 .../sonic_platform/chassis.py                 |   4 -
 .../mlnx-platform-api/sonic_platform/sfp.py   | 281 +-----------------
 .../mlnx-platform-api/tests/test_sfp.py       |  79 ++---
 3 files changed, 37 insertions(+), 327 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
index e0bcb2846a70..cc140ac9935f 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
@@ -128,10 +128,6 @@ def __del__(self):
         if self.sfp_event:
             self.sfp_event.deinitialize()
 
-        if self._sfp_list:
-            if self.sfp_module.SFP.shared_sdk_handle:
-                self.sfp_module.deinitialize_sdk_handle(self.sfp_module.SFP.shared_sdk_handle)
-
     @property
     def RJ45_port_list(self):
         if not self._RJ45_port_inited:
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index 1a0245b79e62..04d9679d1978 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -40,16 +40,6 @@
 except ImportError as e:
     raise ImportError (str(e) + "- required module not found")
 
-try:
-    # python_sdk_api does not support python3 for now. Daemons like thermalctld or psud
-    # also import this file without actually use the sdk lib. So we catch the ImportError
-    # and ignore it here. Meanwhile, we have to trigger xcvrd using python2 now because it
-    # uses the sdk lib.
-    from python_sdk_api.sxd_api import *
-    from python_sdk_api.sx_api import *
-except ImportError as e:
-    pass
-
 # Define the sdk constants
 SX_PORT_MODULE_STATUS_INITIALIZING = 0
 SX_PORT_MODULE_STATUS_PLUGGED = 1
@@ -57,15 +47,6 @@
 SX_PORT_MODULE_STATUS_PLUGGED_WITH_ERROR = 3
 SX_PORT_MODULE_STATUS_PLUGGED_DISABLED = 4
 
-try:
-    if os.environ["PLATFORM_API_UNIT_TESTING"] == "1":
-        # Unable to import SDK constants under unit test
-        # Define them here
-        SX_PORT_ADMIN_STATUS_UP = True
-        SX_PORT_ADMIN_STATUS_DOWN = False
-except KeyError:
-    pass
-
 # identifier value of xSFP module which is in the first byte of the EEPROM
 # if the identifier value falls into SFP_TYPE_CODE_LIST the module is treated as a SFP module and parsed according to 8472
 # for QSFP_TYPE_CODE_LIST the module is treated as a QSFP module and parsed according to 8436/8636
@@ -185,7 +166,7 @@
 SFP_SYSFS_POWER_MODE = 'power_mode'
 SFP_SYSFS_POWER_MODE_POLICY = 'power_mode_policy'
 POWER_MODE_POLICY_HIGH = 1
-POWER_MODE_POLICY_AUTO = 2
+POWER_MODE_POLICY_LOW = 3
 POWER_MODE_LOW = 1
 # POWER_MODE_HIGH = 2  # not used
 
@@ -288,38 +269,6 @@
 logger = Logger()
 
 
-# SDK initializing stuff, called from chassis
-def initialize_sdk_handle():
-    rc, sdk_handle = sx_api_open(None)
-    if (rc != SX_STATUS_SUCCESS):
-        logger.log_warning("Failed to open api handle, please check whether SDK is running.")
-        sdk_handle = None
-
-    return sdk_handle
-
-
-def deinitialize_sdk_handle(sdk_handle):
-    if sdk_handle is not None:
-        rc = sx_api_close(sdk_handle)
-        if (rc != SX_STATUS_SUCCESS):
-            logger.log_warning("Failed to close api handle.")
-
-        return rc == SXD_STATUS_SUCCESS
-    else:
-         logger.log_warning("Sdk handle is none")
-         return False
-
-class SdkHandleContext(object):
-    def __init__(self):
-        self.sdk_handle = None
-
-    def __enter__(self):
-        self.sdk_handle = initialize_sdk_handle()
-        return self.sdk_handle
-
-    def __exit__(self, exc_type, exc_val, exc_tb):
-        deinitialize_sdk_handle(self.sdk_handle)
-
 class NvidiaSFPCommon(SfpOptoeBase):
     sfp_index_to_logical_port_dict = {}
     sfp_index_to_logical_lock = threading.Lock()
@@ -361,14 +310,6 @@ def __init__(self, sfp_index):
         self.index = sfp_index + 1
         self.sdk_index = sfp_index
 
-    @property
-    def sdk_handle(self):
-        if not SFP.shared_sdk_handle:
-            SFP.shared_sdk_handle = initialize_sdk_handle()
-            if not SFP.shared_sdk_handle:
-                logger.log_error('Failed to open SDK handle')
-        return SFP.shared_sdk_handle
-
     @classmethod
     def _get_module_info(self, sdk_index):
         """
@@ -620,24 +561,6 @@ def write_eeprom(self, offset, num_bytes, write_buffer):
                 return False
         return True
 
-    @classmethod
-    def mgmt_phy_mod_pwr_attr_get(cls, power_attr_type, sdk_handle, sdk_index, slot_id):
-        sx_mgmt_phy_mod_pwr_attr_p = new_sx_mgmt_phy_mod_pwr_attr_t_p()
-        sx_mgmt_phy_mod_pwr_attr = sx_mgmt_phy_mod_pwr_attr_t()
-        sx_mgmt_phy_mod_pwr_attr.power_attr_type = power_attr_type
-        sx_mgmt_phy_mod_pwr_attr_t_p_assign(sx_mgmt_phy_mod_pwr_attr_p, sx_mgmt_phy_mod_pwr_attr)
-        module_id_info = sx_mgmt_module_id_info_t()
-        module_id_info.slot_id = slot_id
-        module_id_info.module_id = sdk_index
-        try:
-            rc = sx_mgmt_phy_module_pwr_attr_get(sdk_handle, module_id_info, sx_mgmt_phy_mod_pwr_attr_p)
-            assert SX_STATUS_SUCCESS == rc, "sx_mgmt_phy_module_pwr_attr_get failed {}".format(rc)
-            sx_mgmt_phy_mod_pwr_attr = sx_mgmt_phy_mod_pwr_attr_t_p_value(sx_mgmt_phy_mod_pwr_attr_p)
-            pwr_mode_attr = sx_mgmt_phy_mod_pwr_attr.pwr_mode_attr
-            return pwr_mode_attr.admin_pwr_mode_e, pwr_mode_attr.oper_pwr_mode_e
-        finally:
-            delete_sx_mgmt_phy_mod_pwr_attr_t_p(sx_mgmt_phy_mod_pwr_attr_p)
-
     def get_lpmode(self):
         """
         Retrieves the lpmode (low power mode) status of this SFP
@@ -649,44 +572,13 @@ def get_lpmode(self):
             if self.is_sw_control():
                 api = self.get_xcvr_api()
                 return api.get_lpmode() if api else False
-            elif DeviceDataManager.is_module_host_management_mode():
-                file_path = SFP_SDK_MODULE_SYSFS_ROOT_TEMPLATE.format(self.sdk_index) + SFP_SYSFS_POWER_MODE
-                power_mode = utils.read_int_from_file(file_path)
-                return power_mode == POWER_MODE_LOW
         except Exception as e:
             print(e)
             return False
 
-        if utils.is_host():
-            # To avoid performance issue,
-            # call class level method to avoid initialize the whole sonic platform API
-            get_lpmode_code = 'from sonic_platform import sfp;\n' \
-                              'with sfp.SdkHandleContext() as sdk_handle:' \
-                              'print(sfp.SFP._get_lpmode(sdk_handle, {}, {}))'.format(self.sdk_index, self.slot_id)
-            lpm_cmd = ["docker", "exec", "pmon", "python3", "-c", get_lpmode_code]
-            try:
-                output = subprocess.check_output(lpm_cmd, universal_newlines=True)
-                return 'True' in output
-            except subprocess.CalledProcessError as e:
-                print("Error! Unable to get LPM for {}, rc = {}, err msg: {}".format(self.sdk_index, e.returncode, e.output))
-                return False
-        else:
-            return self._get_lpmode(self.sdk_handle, self.sdk_index, self.slot_id)
-
-    @classmethod
-    def _get_lpmode(cls, sdk_handle, sdk_index, slot_id):
-        """Class level method to get low power mode.
-
-        Args:
-            sdk_handle: SDK handle
-            sdk_index (integer): SDK port index
-            slot_id (integer): Slot ID
-
-        Returns:
-            [boolean]: True if low power mode is on else off
-        """
-        _, oper_pwr_mode = cls.mgmt_phy_mod_pwr_attr_get(SX_MGMT_PHY_MOD_PWR_ATTR_PWR_MODE_E, sdk_handle, sdk_index, slot_id)
-        return oper_pwr_mode == SX_MGMT_PHY_MOD_PWR_MODE_LOW_E
+        file_path = SFP_SDK_MODULE_SYSFS_ROOT_TEMPLATE.format(self.sdk_index) + SFP_SYSFS_POWER_MODE
+        power_mode = utils.read_int_from_file(file_path)
+        return power_mode == POWER_MODE_LOW
 
     def reset(self):
         """
@@ -709,128 +601,6 @@ def reset(self):
             logger.log_error(f'Failed to reset module - {e}')
             return False
 
-
-    @classmethod
-    def is_nve(cls, port):
-        return (port & NVE_MASK) != 0
-
-
-    @classmethod
-    def is_cpu(cls, port):
-        return (port & CPU_MASK) != 0
-
-
-    @classmethod
-    def _fetch_port_status(cls, sdk_handle, log_port):
-        oper_state_p = new_sx_port_oper_state_t_p()
-        admin_state_p = new_sx_port_admin_state_t_p()
-        module_state_p = new_sx_port_module_state_t_p()
-        rc = sx_api_port_state_get(sdk_handle, log_port, oper_state_p, admin_state_p, module_state_p)
-        assert rc == SXD_STATUS_SUCCESS, "sx_api_port_state_get failed, rc = %d" % rc
-
-        admin_state = sx_port_admin_state_t_p_value(admin_state_p)
-        oper_state = sx_port_oper_state_t_p_value(oper_state_p)
-
-        delete_sx_port_oper_state_t_p(oper_state_p)
-        delete_sx_port_admin_state_t_p(admin_state_p)
-        delete_sx_port_module_state_t_p(module_state_p)
-
-        return oper_state, admin_state
-
-
-    @classmethod
-    def is_port_admin_status_up(cls, sdk_handle, log_port):
-        _, admin_state = cls._fetch_port_status(sdk_handle, log_port);
-        return admin_state == SX_PORT_ADMIN_STATUS_UP
-
-
-    @classmethod
-    def set_port_admin_status_by_log_port(cls, sdk_handle, log_port, admin_status):
-        rc = sx_api_port_state_set(sdk_handle, log_port, admin_status)
-        if SX_STATUS_SUCCESS != rc:
-            logger.log_error("sx_api_port_state_set failed, rc = %d" % rc)
-
-        return SX_STATUS_SUCCESS == rc
-
-
-    @classmethod
-    def get_logical_ports(cls, sdk_handle, sdk_index, slot_id):
-        # Get all the ports related to the sfp, if port admin status is up, put it to list
-        port_cnt_p = new_uint32_t_p()
-        uint32_t_p_assign(port_cnt_p, 0)
-        rc = sx_api_port_device_get(sdk_handle, DEVICE_ID, SWITCH_ID, None,  port_cnt_p)
-
-        assert rc == SX_STATUS_SUCCESS, "sx_api_port_device_get failed, rc = %d" % rc
-        port_cnt = uint32_t_p_value(port_cnt_p)
-        port_attributes_list = new_sx_port_attributes_t_arr(port_cnt)
-
-        rc = sx_api_port_device_get(sdk_handle, DEVICE_ID , SWITCH_ID, port_attributes_list,  port_cnt_p)
-        assert rc == SX_STATUS_SUCCESS, "sx_api_port_device_get failed, rc = %d" % rc
-
-        port_cnt = uint32_t_p_value(port_cnt_p)
-        log_port_list = []
-        for i in range(0, port_cnt):
-            port_attributes = sx_port_attributes_t_arr_getitem(port_attributes_list, i)
-            if not cls.is_nve(int(port_attributes.log_port)) \
-               and not cls.is_cpu(int(port_attributes.log_port)) \
-               and port_attributes.port_mapping.module_port == sdk_index \
-               and port_attributes.port_mapping.slot == slot_id \
-               and cls.is_port_admin_status_up(sdk_handle, port_attributes.log_port):
-                log_port_list.append(port_attributes.log_port)
-
-        delete_sx_port_attributes_t_arr(port_attributes_list)
-        delete_uint32_t_p(port_cnt_p)
-        return log_port_list
-
-
-    @classmethod
-    def mgmt_phy_mod_pwr_attr_set(cls, sdk_handle, sdk_index, slot_id, power_attr_type, admin_pwr_mode):
-        result = False
-        sx_mgmt_phy_mod_pwr_attr = sx_mgmt_phy_mod_pwr_attr_t()
-        sx_mgmt_phy_mod_pwr_mode_attr = sx_mgmt_phy_mod_pwr_mode_attr_t()
-        sx_mgmt_phy_mod_pwr_attr.power_attr_type = power_attr_type
-        sx_mgmt_phy_mod_pwr_mode_attr.admin_pwr_mode_e = admin_pwr_mode
-        sx_mgmt_phy_mod_pwr_attr.pwr_mode_attr = sx_mgmt_phy_mod_pwr_mode_attr
-        sx_mgmt_phy_mod_pwr_attr_p = new_sx_mgmt_phy_mod_pwr_attr_t_p()
-        sx_mgmt_phy_mod_pwr_attr_t_p_assign(sx_mgmt_phy_mod_pwr_attr_p, sx_mgmt_phy_mod_pwr_attr)
-        module_id_info = sx_mgmt_module_id_info_t()
-        module_id_info.slot_id = slot_id
-        module_id_info.module_id = sdk_index
-        try:
-            rc = sx_mgmt_phy_module_pwr_attr_set(sdk_handle, SX_ACCESS_CMD_SET, module_id_info, sx_mgmt_phy_mod_pwr_attr_p)
-            if SX_STATUS_SUCCESS != rc:
-                logger.log_error("Error occurred when setting power mode for SFP module {}, slot {}, error code {}".format(sdk_index, slot_id, rc))
-                result = False
-            else:
-                result = True
-        finally:
-            delete_sx_mgmt_phy_mod_pwr_attr_t_p(sx_mgmt_phy_mod_pwr_attr_p)
-
-        return result
-
-
-    @classmethod
-    def _set_lpmode_raw(cls, sdk_handle, sdk_index, slot_id, ports, attr_type, power_mode):
-        result = False
-        # Check if the module already works in the same mode
-        admin_pwr_mode, oper_pwr_mode = cls.mgmt_phy_mod_pwr_attr_get(attr_type, sdk_handle, sdk_index, slot_id)
-        if (power_mode == SX_MGMT_PHY_MOD_PWR_MODE_LOW_E and oper_pwr_mode == SX_MGMT_PHY_MOD_PWR_MODE_LOW_E) \
-           or (power_mode == SX_MGMT_PHY_MOD_PWR_MODE_AUTO_E and admin_pwr_mode == SX_MGMT_PHY_MOD_PWR_MODE_AUTO_E):
-            return True
-        try:
-            # Bring the port down
-            for port in ports:
-                cls.set_port_admin_status_by_log_port(sdk_handle, port, SX_PORT_ADMIN_STATUS_DOWN)
-            # Set the desired power mode
-            result = cls.mgmt_phy_mod_pwr_attr_set(sdk_handle, sdk_index, slot_id, attr_type, power_mode)
-        finally:
-            # Bring the port up
-            for port in ports:
-                cls.set_port_admin_status_by_log_port(sdk_handle, port, SX_PORT_ADMIN_STATUS_UP)
-
-        return result
-
-
     def set_lpmode(self, lpmode):
         """
         Sets the lpmode (low power mode) of SFP
@@ -856,47 +626,16 @@ def set_lpmode(self, lpmode):
                 # If at some point get_lpmode=desired_lpmode, it will return true.
                 # If after timeout ends, lpmode will not be desired_lpmode, it will return false.
                 return utils.wait_until(check_lpmode, 2, 1, api=api, lpmode=lpmode)
-            elif DeviceDataManager.is_module_host_management_mode():
-                # FW control under CMIS host management mode. 
-                # Currently, we don't support set LPM under this mode.
-                # Just return False to indicate set Fail
-                return False
         except Exception as e:
             print(e)
             return False
 
-        if utils.is_host():
-            # To avoid performance issue,
-            # call class level method to avoid initialize the whole sonic platform API
-            set_lpmode_code = 'from sonic_platform import sfp;\n' \
-                              'with sfp.SdkHandleContext() as sdk_handle:' \
-                              'print(sfp.SFP._set_lpmode({}, sdk_handle, {}, {}))' \
-                              .format('True' if lpmode else 'False', self.sdk_index, self.slot_id)
-            lpm_cmd = ["docker", "exec", "pmon", "python3", "-c", set_lpmode_code]
-
-            # Set LPM
-            try:
-                output = subprocess.check_output(lpm_cmd, universal_newlines=True)
-                return 'True' in output
-            except subprocess.CalledProcessError as e:
-                print("Error! Unable to set LPM for {}, rc = {}, err msg: {}".format(self.sdk_index, e.returncode, e.output))
-                return False
-        else:
-            return self._set_lpmode(lpmode, self.sdk_handle, self.sdk_index, self.slot_id)
-
-
-    @classmethod
-    def _set_lpmode(cls, lpmode, sdk_handle, sdk_index, slot_id):
-        log_port_list = cls.get_logical_ports(sdk_handle, sdk_index, slot_id)
-        sdk_lpmode = SX_MGMT_PHY_MOD_PWR_MODE_LOW_E if lpmode else SX_MGMT_PHY_MOD_PWR_MODE_AUTO_E
-        cls._set_lpmode_raw(sdk_handle,
-                            sdk_index,
-                            slot_id,
-                            log_port_list,
-                            SX_MGMT_PHY_MOD_PWR_ATTR_PWR_MODE_E,
-                            sdk_lpmode)
-        logger.log_info("{} low power mode for module {}, slot {}".format("Enabled" if lpmode else "Disabled", sdk_index, slot_id))
-        return True
+        file_path = SFP_SDK_MODULE_SYSFS_ROOT_TEMPLATE.format(self.sdk_index) + SFP_SYSFS_POWER_MODE_POLICY
+        target_admin_mode = POWER_MODE_POLICY_LOW if lpmode else POWER_MODE_POLICY_HIGH
+        current_admin_mode = utils.read_int_from_file(file_path)
+        if current_admin_mode == target_admin_mode:
+            return True
+        return utils.write_file(file_path, str(target_admin_mode))
 
     def is_replaceable(self):
         """
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
index 947736f3660d..092179f03fff 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
@@ -56,7 +56,6 @@ def test_sfp_index(self, mock_max_port):
 
     @mock.patch('sonic_platform.sfp.SFP.is_sw_control')
     @mock.patch('sonic_platform.sfp.SFP.read_eeprom', mock.MagicMock(return_value=None))
-    @mock.patch('sonic_platform.sfp.SFP.shared_sdk_handle', mock.MagicMock(return_value=2))
     @mock.patch('sonic_platform.sfp.SFP._get_module_info')
     @mock.patch('sonic_platform.chassis.Chassis.get_num_sfps', mock.MagicMock(return_value=2))
     @mock.patch('sonic_platform.chassis.extract_RJ45_ports_index', mock.MagicMock(return_value=[]))
@@ -169,14 +168,6 @@ def test_sfp_read_eeprom(self, mock_get_page):
             handle.seek.side_effect = [0, 128, 0, 128, 0]
             assert sfp.read_eeprom(0, 320) == bytearray([0]*128 + [1]*128 + [2]*64)
 
-    @mock.patch('sonic_platform.sfp.SFP._fetch_port_status')
-    def test_is_port_admin_status_up(self, mock_port_status):
-        mock_port_status.return_value = (0, True)
-        assert SFP.is_port_admin_status_up(None, None)
-
-        mock_port_status.return_value = (0, False)
-        assert not SFP.is_port_admin_status_up(None, None)
-
     @mock.patch('sonic_platform.sfp.SFP._get_eeprom_path', mock.MagicMock(return_value = None))
     @mock.patch('sonic_platform.sfp.SFP._get_sfp_type_str')
     @mock.patch('sonic_platform.sfp.SFP.is_sw_control')
@@ -376,38 +367,11 @@ def test_is_sw_control(self, mock_mode, mock_read):
         assert not sfp.is_sw_control()
         mock_read.return_value = 1
         assert sfp.is_sw_control()
-
-    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode', mock.MagicMock(return_value=False))
-    @mock.patch('sonic_platform.sfp.SFP.is_sw_control', mock.MagicMock(return_value=False))
-    @mock.patch('sonic_platform.utils.is_host', mock.MagicMock(side_effect = [True, True, False, False]))
-    @mock.patch('subprocess.check_output', mock.MagicMock(side_effect = ['True', 'False']))
-    @mock.patch('sonic_platform.sfp.SFP._get_lpmode', mock.MagicMock(side_effect = [True, False]))
-    @mock.patch('sonic_platform.sfp.SFP.sdk_handle', mock.MagicMock(return_value = None))
-    def test_get_lpmode(self):
-        sfp = SFP(0)
-        assert sfp.get_lpmode()
-        assert not sfp.get_lpmode()
-        assert sfp.get_lpmode()
-        assert not sfp.get_lpmode()
-
-    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode', mock.MagicMock(return_value=False))
-    @mock.patch('sonic_platform.sfp.SFP.is_sw_control', mock.MagicMock(return_value=False))
-    @mock.patch('sonic_platform.utils.is_host', mock.MagicMock(side_effect = [True, True, False, False]))
-    @mock.patch('subprocess.check_output', mock.MagicMock(side_effect = ['True', 'False']))
-    @mock.patch('sonic_platform.sfp.SFP._set_lpmode', mock.MagicMock(side_effect = [True, False]))
-    @mock.patch('sonic_platform.sfp.SFP.sdk_handle', mock.MagicMock(return_value = None))
-    def test_set_lpmode(self):
-        sfp = SFP(0)
-        assert sfp.set_lpmode(True)
-        assert not sfp.set_lpmode(True)
-        assert sfp.set_lpmode(False)
-        assert not sfp.set_lpmode(False)
         
     @mock.patch('sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode', mock.MagicMock(return_value=True))
     @mock.patch('sonic_platform.utils.read_int_from_file')
-    @mock.patch('sonic_platform.sfp.SFP.is_sw_control')
-    def test_get_lpmode_cmis_host_mangagement(self, mock_control, mock_read):
-        mock_control.return_value = True
+    @mock.patch('sonic_platform.sfp.SFP.is_sw_control', mock.MagicMock(return_value=True))
+    def test_get_lpmode_cmis_host_mangagement(self, mock_read):
         sfp = SFP(0)
         sfp.get_xcvr_api = mock.MagicMock(return_value=None)
         assert not sfp.get_lpmode()
@@ -419,18 +383,10 @@ def test_get_lpmode_cmis_host_mangagement(self, mock_control, mock_read):
         
         mock_api.get_lpmode.return_value = True
         assert sfp.get_lpmode()
-        
-        mock_control.return_value = False
-        mock_read.return_value = 1
-        assert sfp.get_lpmode()
-        
-        mock_read.return_value = 2
-        assert not sfp.get_lpmode()
 
     @mock.patch('sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode', mock.MagicMock(return_value=True))
-    @mock.patch('sonic_platform.sfp.SFP.is_sw_control')
-    def test_set_lpmode_cmis_host_mangagement(self, mock_control):
-        mock_control.return_value = True
+    @mock.patch('sonic_platform.sfp.SFP.is_sw_control', mock.MagicMock(return_value=True))
+    def test_set_lpmode_cmis_host_mangagement(self):
         sfp = SFP(0)
         sfp.get_xcvr_api = mock.MagicMock(return_value=None)
         assert not sfp.set_lpmode(False)
@@ -440,10 +396,6 @@ def test_set_lpmode_cmis_host_mangagement(self, mock_control):
         mock_api.get_lpmode = mock.MagicMock(return_value=False)
         assert sfp.set_lpmode(False)
         assert not sfp.set_lpmode(True)
-        
-        mock_control.return_value = False
-        assert not sfp.set_lpmode(True)
-        assert not sfp.set_lpmode(False)
 
     def test_determine_control_type(self):
         sfp = SFP(0)
@@ -556,3 +508,26 @@ def test_initialize_sfp_modules(self):
         SFP.wait_ready_task.stop()
         SFP.wait_ready_task.join()
         SFP.wait_ready_task = None
+
+    @mock.patch('sonic_platform.sfp.SFP.is_sw_control', mock.MagicMock(return_value=False))
+    @mock.patch('sonic_platform.utils.read_int_from_file')
+    def test_get_lpmode(self, mock_read_int):
+        sfp = SFP(0)
+        mock_read_int.return_value = 1
+        assert sfp.get_lpmode()
+        mock_read_int.assert_called_with('/sys/module/sx_core/asic0/module0/power_mode')
+
+        mock_read_int.return_value = 2
+        assert not sfp.get_lpmode()
+
+    @mock.patch('sonic_platform.sfp.SFP.is_sw_control', mock.MagicMock(return_value=False))
+    @mock.patch('sonic_platform.utils.write_file')
+    @mock.patch('sonic_platform.utils.read_int_from_file')
+    def test_set_lpmode(self, mock_read_int, mock_write):
+        sfp = SFP(0)
+        mock_read_int.return_value = 1
+        assert sfp.set_lpmode(False)
+        assert mock_write.call_count == 0
+
+        assert sfp.set_lpmode(True)
+        mock_write.assert_called_with('/sys/module/sx_core/asic0/module0/power_mode_policy', '3')

From 0975cd0996253f9602f4fb320eb20dd6b7049975 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 22 Oct 2024 19:01:04 +0800
Subject: [PATCH 117/364] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#20572)

#### Why I did it
src/sonic-platform-daemons
```
* 5d827af - (HEAD -> master, origin/master, origin/HEAD) Reduce log level for lane speed key construction failure (#549) (10 hours ago) [Tomer Shalvi]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index ca812b0df105..5d827af7a92e 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit ca812b0df105ecb98b90f2b9ef6b7aa24592222b
+Subproject commit 5d827af7a92ec4bc0960cc708f7a71582122eeb4

From c9e340ea9eb8c6b0121b793b0585217219b96a23 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 22 Oct 2024 19:01:13 +0800
Subject: [PATCH 118/364] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#20570)

#### Why I did it
src/sonic-host-services
```
* 47fd128 - (HEAD -> master, origin/master, origin/HEAD) [Banner] Added BannerCfg class to hostcfgd to handle Banner messages (#79) (19 hours ago) [Sviatoslav Boichuk]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index b7f26d4eaf12..47fd12892058 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit b7f26d4eaf125af4c889a9dbadeebacbeb9e9271
+Subproject commit 47fd1289205874a95ca2886d676e0221d62e7aab

From 651ce0d3e4f604ababa25d7c01e4d6b4a7fd4e52 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Tue, 22 Oct 2024 05:22:45 -0700
Subject: [PATCH 119/364] [Mellanox] Fix the issue with ASIC detection on the
 SN4280 platform (#20397)

- Why I did it
Fix the issue with ASIC detection on the SN4280 platform.

The root cause of the issue is in the PCI subsystem race condition. When the Dark Mode is enabled on the system start we do the following actions in parallel:

The dpuctl service starts and powers down the DPUs which causes the DPU PCI devices removal.
At the same time the syncd service starts. It launches mlnx-fw-upgrade.sh script which queries the available ASIC devices from the PCI subsystem using the lspci command.
There is a small period after the removal of the DPU PCI device when the PCI subsystem in Linux remains inconsistent and lspci command might return an error upon execution. This might cause an error in mlnx-fw-upgrade.sh which interrupts the syncd container start.

- How I did it
Add a retry mechanism for the lspci command. Cache lspci output to reduce the number of command executions.

- How to verify it
Run regression.
---
 platform/mellanox/mlnx-fw-upgrade.j2 | 22 +++++++++++++++++-----
 1 file changed, 17 insertions(+), 5 deletions(-)

diff --git a/platform/mellanox/mlnx-fw-upgrade.j2 b/platform/mellanox/mlnx-fw-upgrade.j2
index 00796d54b096..3099232edb4e 100755
--- a/platform/mellanox/mlnx-fw-upgrade.j2
+++ b/platform/mellanox/mlnx-fw-upgrade.j2
@@ -246,19 +246,31 @@ function GetAsicType() {
     local -r SPC4_PRODUCT_ID="cf80"
     local -r BF3_PRODUCT_ID="a2dc"
 
-    if lspci -n | grep "${VENDOR_ID}:${SPC1_PRODUCT_ID}" &>/dev/null; then
+    local -i QUERY_RETRY_COUNT="0"
+    local -i QUERY_RETRY_COUNT_MAX="10"
+    local pcitree=$(lspci -n 2>/dev/null)
+    ERROR_CODE="$?"
+
+    while [[ ("${QUERY_RETRY_COUNT}" -lt "QUERY_RETRY_COUNT_MAX") && ("${ERROR_CODE}" != "${EXIT_SUCCESS}") ]]; do
+        sleep 1s
+        ((QUERY_RETRY_COUNT++))
+        pcitree=$(lspci -n 2>/dev/null)
+        ERROR_CODE="$?"
+    done
+
+    if echo $pcitree | grep "${VENDOR_ID}:${SPC1_PRODUCT_ID}" &>/dev/null; then
         echo "${SPC1_ASIC}"
         exit "${EXIT_SUCCESS}"
-    elif lspci -n | grep "${VENDOR_ID}:${SPC2_PRODUCT_ID}" &>/dev/null; then
+    elif echo $pcitree | grep "${VENDOR_ID}:${SPC2_PRODUCT_ID}" &>/dev/null; then
         echo "${SPC2_ASIC}"
         exit "${EXIT_SUCCESS}"
-    elif lspci -n | grep "${VENDOR_ID}:${SPC3_PRODUCT_ID}" &>/dev/null; then
+    elif echo $pcitree | grep "${VENDOR_ID}:${SPC3_PRODUCT_ID}" &>/dev/null; then
         echo "${SPC3_ASIC}"
         exit "${EXIT_SUCCESS}"
-    elif lspci -n | grep "${VENDOR_ID}:${SPC4_PRODUCT_ID}" &>/dev/null; then
+    elif echo $pcitree | grep "${VENDOR_ID}:${SPC4_PRODUCT_ID}" &>/dev/null; then
         echo "${SPC4_ASIC}"
         exit "${EXIT_SUCCESS}"
-    elif lspci -n | grep "${VENDOR_ID}:${BF3_PRODUCT_ID}" &>/dev/null; then
+    elif echo $pcitree | grep "${VENDOR_ID}:${BF3_PRODUCT_ID}" &>/dev/null; then
         echo "${BF3_NIC}"
         exit "${EXIT_SUCCESS}"
     fi

From a06a559b38721899962da7735d6c4b01c2b26fc2 Mon Sep 17 00:00:00 2001
From: Gagan Punathil Ellath <gpunathilell@nvidia.com>
Date: Tue, 22 Oct 2024 05:49:57 -0700
Subject: [PATCH 120/364] [Mellanox] Platform specific pcie changes for SN4280
 (#20386)

- Why I did it
Aligning the SN4280 Platform, since there is only one XGMAC 10GbE Controller present in the platform, the other device is removed from the pcie.yaml file

- How I did it
Generated pcie data using pcieutil generate and updated the repository
---
 device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml b/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml
index 99ebce459458..4c7889b3fdc4 100644
--- a/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml
@@ -1,5 +1,6 @@
 ##
-## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 ## Apache-2.0
 ##
 ## Licensed under the Apache License, Version 2.0 (the "License");
@@ -275,11 +276,6 @@
   fn: '4'
   id: '1458'
   name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller'
-- bus: 0a
-  dev: '00'
-  fn: '5'
-  id: '1458'
-  name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller'
 - bus: '40'
   dev: '00'
   fn: '0'

From e5449f2577366fe30ba96f5fa3e48e090e67ba65 Mon Sep 17 00:00:00 2001
From: Tomer Shalvi <116184476+tshalvi@users.noreply.github.com>
Date: Tue, 22 Oct 2024 15:59:55 +0300
Subject: [PATCH 121/364] [Mellanox] Added functionality to handle empty EEPROM
 files (#20190)

- Why I did it
On Mellanox platforms, it was decided that a good way to simulate an I2C stuck scenario would be to have the files representing the module's EEPROM remain empty. When these files are empty, module initialization will not complete because the read_eeprom() function gets stuck in an infinite loop (while num_bytes > 0: will never evaluate to False as the decrement operation num_bytes -= read_length has no effect). This happens because 0 bytes are always read from the EEPROM when it is empty. This PR addresses this issue.

- How I did it
On Mellanox platforms only, I added a validation check to ensure that if an attempt to read from the EEPROM results in 0 bytes read, the _read_eeprom() function exits and returns None.

- How to verify it
Simulate the empty EEPROM (can be done as described in the script below), update _get_eeprom_path() to redirect to the empty EEPROM location, config reload, and verify that not all ports are down.
---
 platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index 04d9679d1978..ddaa60d2860e 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -494,6 +494,9 @@ def _read_eeprom(self, offset, num_bytes, log_on_error=True):
                     else:
                         result += content
                     read_length = len(content)
+                    if read_length == 0:
+                        logger.log_error(f'SFP {self.sdk_index}: EEPROM page {page} is empty, no data retrieved')
+                        return None
                     num_bytes -= read_length
                     if num_bytes > 0:
                         page_size = f.seek(0, os.SEEK_END)

From dd395e336e0eee4c217d22a8a764ebbbd72c5fce Mon Sep 17 00:00:00 2001
From: Yuanzhe <150663541+yuazhe@users.noreply.github.com>
Date: Tue, 22 Oct 2024 21:05:38 +0800
Subject: [PATCH 122/364] [Mellanox] Enabled SDK API recording by default
 (#19925)

- Why I did it
SDK sniffer will record the RPC calls from the SDK user API library to the sx_sdk task into a .pcap file. This .pcap file can be replayed afterward to get the exact same state on SDK and FW to reproduce and investigate issues.

SDK added cyclic mode of API sniffer, and previously, users could use config platform mlnx sniffer enable/disable to control the feature, now they must manually change the content of saiprofile. The old CLI entry point will be removed.

- How I did it
Added relevant SAI keys in sai-common.profile
removed deprecated CLI in sonic-utilities sonic-net/sonic-utilities#3491

- How to verify it
Check the pcap file under /var/log/sdk_dbg

Signed-off-by: Yuanzhe, Liu <yualiu@nvidia.com>
---
 platform/mellanox/docker-syncd-mlnx/sai-common.profile | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/platform/mellanox/docker-syncd-mlnx/sai-common.profile b/platform/mellanox/docker-syncd-mlnx/sai-common.profile
index 62e4323e2e24..6876eb876c5f 100644
--- a/platform/mellanox/docker-syncd-mlnx/sai-common.profile
+++ b/platform/mellanox/docker-syncd-mlnx/sai-common.profile
@@ -1,3 +1,7 @@
 SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
 SAI_DUMP_STORE_AMOUNT=10
 SAI_ASYNC_ROUTING_ENABLED=1
+SAI_KEY_SDK_SNIFFER_MODE=cyclic
+SAI_KEY_SDK_SNIFFER_LOG_NUM=10
+SAI_KEY_SDK_SNIFFER_LOG_MAX_SIZE=314572800
+SAI_KEY_SDK_SNIFFER_WRITE_INTERVAL=1000

From aa79561a1b781fe77b92e60aaecf1662b5d7e436 Mon Sep 17 00:00:00 2001
From: "Marty Y. Lok" <76118573+mlok-nokia@users.noreply.github.com>
Date: Tue, 22 Oct 2024 13:08:06 -0400
Subject: [PATCH 123/364] [Nokia][sonic-platform] Update sonic-platform
 submodule for Nokia-IXR7250E platform (#20367)

Update sonic-platform submodule for Nokia-IXR7250E:
Fixes Nokia-ION/ndk#57

cdfbbe2 [H4-32D]Update platform modules after OC tests (Update README.md #17)
f28eff0 [H4-64D]Fix SFP+ port, eeprom, reboot-cause, thermal algorithm, add PSU input voltage check (Fix rules in Makefiles #15)
178e15a Minor watchdog change for better retention of last kick stamp
c479392 Remove rogue platform_reboot file
331abe0 Enhance watchdog script to detect fsde device hung signature
4c6b7c1 Fixed update temperature issue
5002fb7 Remove average and maximum
c620130 No PSU Master status led in IMM. No need to set it

Signed-off-by: mlok <marty.lok@nokia.com>
---
 platform/broadcom/sonic-platform-modules-nokia | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sonic-platform-modules-nokia b/platform/broadcom/sonic-platform-modules-nokia
index b3ff7c08a431..cdfbbe2becbf 160000
--- a/platform/broadcom/sonic-platform-modules-nokia
+++ b/platform/broadcom/sonic-platform-modules-nokia
@@ -1 +1 @@
-Subproject commit b3ff7c08a431a76c72ed14cd257e90219f1ec576
+Subproject commit cdfbbe2becbf1bca62481f7e8389f254465a9d8c

From 7572168bc183bf618fa6b697a488cd399b905b5e Mon Sep 17 00:00:00 2001
From: zitingguo-ms <zitingguo@microsoft.com>
Date: Tue, 22 Oct 2024 20:24:49 -0700
Subject: [PATCH 124/364] [Broadcom] Upgrade xgs SAI version to 11.2.13.1
 (#20489)

Why I did it
Upgrade xgs SAI version to 11.2.12.1-1 with following fixes:

11.2.5.1: [CSP CS00012362865]Fabric switch initialization delayed if SW linkscan enabled during platform init
11.2.6.1: [CSP CS00012359404] Port SONIC-93179 to SAI 11.2 branch
11.2.7.1: Error with setting SAI_NEIGHBOR_ENTRY_ATTR_IS_LOCAL attribute for neighbor
11.2.8.1: [CSP CS00012340980] Use LOG_ERROR instead of LOG_WARN in BCM_CHECK_ERROR_RETURN.
11.2.9.1: [CSP CS00012352844] Added missing DoNOtLearn action to knet port trap
11.2.10.1: Avoid using strcpy() in SDK kernel modules
11.2.11.1: [CSP CS00012355320] Bookworm GPL-modules: 'lspci -d' command no longer takes '0x'
11.2.12.1: Avoid using strcpy() in SDK kernel modules
11.2.12.1-1: [AN/LT] enable Microsoft AN/LT behavior
11.2.13.0: [CSP CS00012363592] SONIC-94873 to 11.2 Changes to apply the KNET bypass rule on RCY ports
Work item tracking
Microsoft ADO (number only): 29867405
How I did it
Upgrade the SAI version in the sai.mk file.

How to verify it
https://dev.azure.com/mssonic/internal/_build/results?buildId=673863&view=results
---
 platform/broadcom/sai.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index 632a8c222c43..85cdd54e5622 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,4 +1,4 @@
-LIBSAIBCM_XGS_VERSION = 11.2.4.1
+LIBSAIBCM_XGS_VERSION = 11.2.13.1
 LIBSAIBCM_DNX_VERSION = 11.2.9.1
 LIBSAIBCM_XGS_BRANCH_NAME = SAI_11.2.0_GA
 LIBSAIBCM_DNX_BRANCH_NAME = SAI_11.2.0_GA

From d4fe0bd795e44aacba96dab29e21383b0342cc99 Mon Sep 17 00:00:00 2001
From: Ashwin Srinivasan <93744978+assrinivasan@users.noreply.github.com>
Date: Tue, 22 Oct 2024 20:38:24 -0700
Subject: [PATCH 125/364] Strip null bytes from parsed eeprom data before
 writing to db (#20512)

Why I did it
This was failing sonic-mgmt test test_syseepromd due to a setup error on account of null bytes being parsed from the S6000 eeprom.

This is due to differences in the way sonic-db-cli handles null values in the part number as parsed by the EEPROM in the 202012 image vs 202205+ image versions:

How I did it
Added logic to strip null bytes from parsed data before writing to database.

How to verify it
Run the aforementioned sonic-mgmt test before and after making the change in this PR -- note that test fails on setup without the change. See attached logs.
s6000_test_syseepromd_logs.txt

Flashed image with this change on an S6000 device and ran the above sonic-mgmt test:
---
 .../sonic-platform-modules-dell/s6000/sonic_platform/eeprom.py  | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/eeprom.py
index 734feb66bacc..2401f418fdc3 100644
--- a/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/eeprom.py
+++ b/platform/broadcom/sonic-platform-modules-dell/s6000/sonic_platform/eeprom.py
@@ -429,7 +429,7 @@ def update_eeprom_db(self, e):
                     data = ":".join(["{:02x}".format(T) for T in e[offset:offset+f[1]]]).upper()
                 else:
                     data = e[offset:offset+f[1]].decode('ascii')
-                client.hset('EEPROM_INFO|{}'.format(f[0]), 'Value', data)
+                client.hset('EEPROM_INFO|{}'.format(f[0]), 'Value', data.strip('\x00'))
                 offset += f[1]
 
             if not self._is_valid_block_checksum(e[blk_start:blk_end]):

From bc924ed3f78941ae487b44c3f8b53a054aed3835 Mon Sep 17 00:00:00 2001
From: Yutong Zhang <90831468+yutongzhang-microsoft@users.noreply.github.com>
Date: Wed, 23 Oct 2024 15:05:14 +0800
Subject: [PATCH 126/364] Comment out onboarding dualtor (#20567)

Why I did it
As all dualtor test scripts are stable, we have moved them to dualtor PR checker. We don't need onboarding dualtor PR checker anymore. So in this PR, we comment out the onboarding dualtor PR checker.
---
 azure-pipelines.yml | 32 ++++++++++++++++----------------
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/azure-pipelines.yml b/azure-pipelines.yml
index b72aa967cc2e..3956a7c94448 100644
--- a/azure-pipelines.yml
+++ b/azure-pipelines.yml
@@ -295,22 +295,22 @@ stages:
           MGMT_BRANCH: $(BUILD_BRANCH)
           TEST_SET: onboarding_t1
 
-  - job: onboarding_elastictest_dualtor
-    displayName: "onboarding dualtor testcases by Elastictest - optional"
-    timeoutInMinutes: 240
-    continueOnError: true
-    pool: sonic-ubuntu-1c
-    steps:
-      - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
-        parameters:
-          TOPOLOGY: dualtor
-          STOP_ON_FAILURE: "False"
-          RETRY_TIMES: 0
-          MIN_WORKER: $(T0_DUALTOR_INSTANCE_NUM)
-          MAX_WORKER: $(T0_DUALTOR_INSTANCE_NUM)
-          KVM_IMAGE_BRANCH: $(BUILD_BRANCH)
-          MGMT_BRANCH: $(BUILD_BRANCH)
-          TEST_SET: onboarding_dualtor
+#  - job: onboarding_elastictest_dualtor
+#    displayName: "onboarding dualtor testcases by Elastictest - optional"
+#    timeoutInMinutes: 240
+#    continueOnError: true
+#    pool: sonic-ubuntu-1c
+#    steps:
+#      - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
+#        parameters:
+#          TOPOLOGY: dualtor
+#          STOP_ON_FAILURE: "False"
+#          RETRY_TIMES: 0
+#          MIN_WORKER: $(T0_DUALTOR_INSTANCE_NUM)
+#          MAX_WORKER: $(T0_DUALTOR_INSTANCE_NUM)
+#          KVM_IMAGE_BRANCH: $(BUILD_BRANCH)
+#          MGMT_BRANCH: $(BUILD_BRANCH)
+#          TEST_SET: onboarding_dualtor
 
 #  - job: wan_elastictest
 #    displayName: "kvmtest-wan by Elastictest"

From 8d09a2b56b437ca55a5ebda096522aac2b5f56af Mon Sep 17 00:00:00 2001
From: Feng-msft <fenpan@microsoft.com>
Date: Wed, 23 Oct 2024 21:24:46 +0800
Subject: [PATCH 127/364] Fix supervisor config generation for multiple db
 instance issue support. (#20545)

Why I did it
Fix supervisor config generation for multiple db instance issue support.

Work item tracking
Microsoft ADO (number only):29964282
How I did it
Correct generation template.
---
 dockers/docker-database/supervisord.conf.j2 | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/dockers/docker-database/supervisord.conf.j2 b/dockers/docker-database/supervisord.conf.j2
index 232b8ffcbfa7..f2fdffd2677d 100644
--- a/dockers/docker-database/supervisord.conf.j2
+++ b/dockers/docker-database/supervisord.conf.j2
@@ -48,7 +48,8 @@ autostart=true
 autorestart=false
 stdout_logfile=syslog
 stderr_logfile=syslog
-{%- endif -%}
+
+{% endif %}
 {%     endfor %}
 {% endif %}
 

From d4779a89533a0d4a74f1c47d6e0520176ff6cafc Mon Sep 17 00:00:00 2001
From: wumiao_nokia <wu.miao@nokia.com>
Date: Wed, 23 Oct 2024 13:27:05 -0400
Subject: [PATCH 128/364] Ntpd Error Log Caught by Log Analyzer Results in Test
 Cases Failure (#19580)

Fix NTP error log which causes many test failure caught by log analyzer
---
 files/image_config/ntp/ntp-systemd-wrapper | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/files/image_config/ntp/ntp-systemd-wrapper b/files/image_config/ntp/ntp-systemd-wrapper
index 0704a8e92bdb..71e061ed512c 100644
--- a/files/image_config/ntp/ntp-systemd-wrapper
+++ b/files/image_config/ntp/ntp-systemd-wrapper
@@ -8,6 +8,7 @@
 DAEMON=/usr/sbin/ntpd
 PIDFILE=/run/ntpd.pid
 LOCKFILE=/run/lock/ntpsec-ntpdate
+NTPLOGDIR=/var/log/ntpsec
 
 if [ -r /etc/default/ntpsec ]; then
         . /etc/default/ntpsec
@@ -24,6 +25,11 @@ fi
 
 NTPD_OPTS="$NTPD_OPTS -u ntpsec:ntpsec"
 
+if [ ! -e $NTPLOGDIR ]; then
+    mkdir $NTPLOGDIR
+    chmod 777 $NTPLOGDIR
+fi
+
 # Protect the service startup against concurrent ntpdate ifup hooks
 (
         if flock -w 180 9; then

From c2f88d0da05bdd839e75f884cea7040d26dcdb86 Mon Sep 17 00:00:00 2001
From: fountzou <169114916+fountzou@users.noreply.github.com>
Date: Wed, 23 Oct 2024 21:22:42 +0300
Subject: [PATCH 129/364] Set the default value of `SMARTSWITCH` to false and
 error handling in sourcing the platform_utils file. (#20413)

Set the default value of `SMARTSWITCH` to false and error handling in sourcing the platform_utils file.

Signed-off-by: fountzou <ioannis.fountzoulas@nokia.com>
---
 dockers/docker-fpm-frr/base_image_files/TSA | 4 +++-
 dockers/docker-fpm-frr/base_image_files/TSB | 4 +++-
 dockers/docker-fpm-frr/base_image_files/TSC | 4 +++-
 3 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/dockers/docker-fpm-frr/base_image_files/TSA b/dockers/docker-fpm-frr/base_image_files/TSA
index 4f78cd58ce1c..68ee72337b70 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSA
+++ b/dockers/docker-fpm-frr/base_image_files/TSA
@@ -1,7 +1,9 @@
 #!/bin/bash
 
 # Source the platform_utils script
-source "$(dirname "$0")/platform_utils"
+source "$(dirname "$0")/platform_utils" > /dev/null 2>&1
+
+${SMARTSWITCH:=false}
 
 # Restrict command to sudo users
 if [ "$EUID" -ne 0 ] ; then
diff --git a/dockers/docker-fpm-frr/base_image_files/TSB b/dockers/docker-fpm-frr/base_image_files/TSB
index 8c82796f18c1..f6f6d4044286 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSB
+++ b/dockers/docker-fpm-frr/base_image_files/TSB
@@ -1,7 +1,9 @@
 #!/bin/bash
 
 # Source the platform_utils script
-source "$(dirname "$0")/platform_utils"
+source "$(dirname "$0")/platform_utils" > /dev/null 2>&1
+
+${SMARTSWITCH:=false}
 
 # Restrict command to sudo users
 if [ "$EUID" -ne 0 ] ; then
diff --git a/dockers/docker-fpm-frr/base_image_files/TSC b/dockers/docker-fpm-frr/base_image_files/TSC
index ccb6c7d6ea21..f991d0eec396 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSC
+++ b/dockers/docker-fpm-frr/base_image_files/TSC
@@ -1,7 +1,9 @@
 #!/bin/bash
 
 # Source the platform_utils script
-source "$(dirname "$0")/platform_utils"
+source "$(dirname "$0")/platform_utils" > /dev/null 2>&1
+
+${SMARTSWITCH:=false}
 
 # Restrict command to sudo users
 if [ "$EUID" -ne 0 ] ; then

From 0e9b11fd7f6e54c3f8cdde4313b8971d8535cafb Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 24 Oct 2024 19:51:50 +0800
Subject: [PATCH 130/364] [submodule] Update submodule sonic-platform-common to
 the latest HEAD automatically (#20599)

#### Why I did it
src/sonic-platform-common
```
* 912ceb3 - (HEAD -> master, origin/master, origin/HEAD) Refactor parse_virtium_info to support new ssd model (#495) (21 hours ago) [Yuanzhe]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index f07a6aa8ef19..912ceb34c8a3 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit f07a6aa8ef19f1ea2043e6443f476ff8fdfc0fed
+Subproject commit 912ceb34c8a352b235ad77ea07778c4779a5bd4a

From c83ff1b7f53a8c7608cbf6df01849cc8c480c11c Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 24 Oct 2024 19:52:02 +0800
Subject: [PATCH 131/364] [submodule] Update submodule sonic-swss to the latest
 HEAD automatically (#20583)

#### Why I did it
src/sonic-swss
```
* bd945f67 - (HEAD -> master, origin/master, origin/HEAD) Add mgmt VRF support. (#3299) (2 hours ago) [Hua Liu]
* e71eb2dc - Fix p4orch tests after SAI update (#3337) (29 hours ago) [Saikrishna Arcot]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 90fceadf7565..bd945f673e0b 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 90fceadf75654501e5fb2d9726344c6e0d0d0a86
+Subproject commit bd945f673e0b2871debae5a951afd7de854d19f3

From b3e379c2a6f9551d556a50ba1456d31958a8bb4c Mon Sep 17 00:00:00 2001
From: Ze Gan <ganze718@gmail.com>
Date: Fri, 25 Oct 2024 00:54:04 +0800
Subject: [PATCH 132/364] [Arista]: Update XON to 0 for TH5 (#19849)

[Arista] Update XON to 0 for TH5

Signed-off-by: Ze Gan <zegan@microsoft.com>
---
 .../BALANCED/pg_profile_lookup.ini            | 25 +++----------------
 1 file changed, 4 insertions(+), 21 deletions(-)

diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/pg_profile_lookup.ini
index bc4b6528ea10..ecf0712e392f 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/pg_profile_lookup.ini
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/pg_profile_lookup.ini
@@ -1,23 +1,6 @@
 # PG lossless profiles.
 # speed cable size    xon  xoff    threshold xon_offset
-  10000  5m   1248    2288 35776   0         2288
-  25000  5m   1248    2288 53248   0         2288
-  40000  5m   1248    2288 66560   0         2288
-  50000  5m   1248    2288 90272   0         2288
- 100000  5m   18796   3556 300990  0        3556
- 200000  5m   18796   3556 300990  0        3556
- 400000  5m   18796   3556 300990  0        3556
-  10000  40m  1248    2288 37024   0         2288
-  25000  40m  1248    2288 53248   0         2288
-  40000  40m  1248    2288 71552   0         2288
-  50000  40m  1248    2288 96096   0         2288
- 100000  40m  18796   3556 300990  0        3556
- 200000  40m  18796   3556 300990  0        3556
- 400000  40m  18796   3556 300990  0        3556
-  10000  300m 1248    2288 46176   0         2288
-  25000  300m 1248    2288 79040   0         2288
-  40000  300m 1248    2288 108160  0         2288
-  50000  300m 1248    2288 141856  0         2288
- 100000  300m 18796   3556 300990  0        3556
- 200000  300m 18796   3556 300990  0        3556
- 400000  300m 18796   3556 300990  0        3556
+ 100000  5m   18796   0    300990  0         3556
+ 200000  5m   18796   0    300990  0         3556
+ 100000  40m  18796   0    300990  0         3556
+ 200000  40m  18796   0    300990  0         3556

From 06c469e6cc0a13beae45f2bdbea8c0d0ee82946c Mon Sep 17 00:00:00 2001
From: Feng-msft <fenpan@microsoft.com>
Date: Fri, 25 Oct 2024 07:08:13 +0800
Subject: [PATCH 133/364] Add new redis database instance for BMP_STATE_DB.
 (#19016)

#### Why I did it
Add new redis database instance for BMP_STATE_DB. since bmp data set will be a bit large which we don't want block existing state_db operation.

#### How I did it
Changed database config and will use it into other bmp relevant PR.
---
 dockers/docker-database/database_config.json.j2 | 15 +++++++++++++--
 dockers/docker-database/docker-database-init.sh |  6 +++++-
 files/build_templates/docker_image_ctl.j2       |  3 +++
 3 files changed, 21 insertions(+), 3 deletions(-)

diff --git a/dockers/docker-database/database_config.json.j2 b/dockers/docker-database/database_config.json.j2
index 65db6cb72641..f37b64ee9665 100644
--- a/dockers/docker-database/database_config.json.j2
+++ b/dockers/docker-database/database_config.json.j2
@@ -23,7 +23,13 @@
             "unix_socket_path": "",
             "persistence_for_warm_boot" : "yes"
         }
-{% endif %}
+{% endif %},
+        "redis_bmp":{
+            "hostname" : "{{HOST_IP}}",
+            "port" : {{BMP_DB_PORT}},
+            "unix_socket_path" : "/var/run/redis{{DEV}}/redis_bmp.sock",
+            "persistence_for_warm_boot" : "yes"
+        }
     },
     "DATABASES" : {
         "APPL_DB" : {
@@ -129,7 +135,12 @@
             "separator": ":",
             "instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %}
         }
-{% endif %}
+{% endif %},
+         "BMP_STATE_DB" : {
+            "id" : 20,
+            "separator": "|",
+            "instance" : "redis_bmp"
+        }
     },
     "VERSION" : "1.0"
 }
diff --git a/dockers/docker-database/docker-database-init.sh b/dockers/docker-database/docker-database-init.sh
index 467f33c212d1..c50add1a7698 100755
--- a/dockers/docker-database/docker-database-init.sh
+++ b/dockers/docker-database/docker-database-init.sh
@@ -41,6 +41,8 @@ then
     fi
 fi
 
+export BMP_DB_PORT=6400
+
 REDIS_DIR=/var/run/redis$NAMESPACE_ID
 mkdir -p $REDIS_DIR/sonic-db
 mkdir -p /etc/supervisor/conf.d/
@@ -48,7 +50,7 @@ mkdir -p /etc/supervisor/conf.d/
 if [ -f /etc/sonic/database_config$NAMESPACE_ID.json ]; then
     cp /etc/sonic/database_config$NAMESPACE_ID.json $REDIS_DIR/sonic-db/database_config.json
 else
-    HOST_IP=$host_ip REDIS_PORT=$redis_port DATABASE_TYPE=$DATABASE_TYPE j2 /usr/share/sonic/templates/database_config.json.j2 > $REDIS_DIR/sonic-db/database_config.json
+    HOST_IP=$host_ip REDIS_PORT=$redis_port DATABASE_TYPE=$DATABASE_TYPE BMP_DB_PORT=$BMP_DB_PORT j2 /usr/share/sonic/templates/database_config.json.j2 > $REDIS_DIR/sonic-db/database_config.json
 fi
 
 # on VoQ system, we only publish redis_chassis instance and CHASSIS_APP_DB when
@@ -130,5 +132,7 @@ rm -rf /etc/localtime
 ln -sf /usr/share/zoneinfo/$TZ /etc/localtime
 
 chown -R redis:redis $REDIS_DIR
+REDIS_BMP_DIR="/var/lib/redis_bmp"
+chown -R redis:redis $REDIS_BMP_DIR
 
 exec /usr/local/bin/supervisord
diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 732681818824..f1757f69ba42 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -94,6 +94,7 @@ function preStartAction()
             # Create an emtpy file and overwrite any RDB if already there
             echo -n > /tmp/dump.rdb
             docker cp /tmp/dump.rdb database$DEV:/var/lib/redis/
+            docker cp /tmp/dump.rdb database$DEV:/var/lib/redis_bmp/
         fi
     fi
 {%- elif docker_container_name == "pde" %}
@@ -296,7 +297,9 @@ function postStartAction()
         fi
         REDIS_SOCK="/var/run/redis-chassis/redis_chassis.sock"
     fi
+    REDIS_BMP_SOCK="/var/run/redis/redis_bmp.sock"
     chgrp -f redis $REDIS_SOCK && chmod -f 0760 $REDIS_SOCK
+    chgrp -f redis $REDIS_BMP_SOCK && chmod -f 0760 $REDIS_BMP_SOCK
 {%- elif docker_container_name == "swss" %}
     # Wait until swss container state is Running
     until [[ ($(docker inspect -f {{"'{{.State.Running}}'"}} swss$DEV) == "true") ]]; do

From 4e9c08a605b176e22b1f20f74deecb7aada2c8c2 Mon Sep 17 00:00:00 2001
From: jingwenxie <jingwenxie@microsoft.com>
Date: Fri, 25 Oct 2024 09:19:03 +0800
Subject: [PATCH 134/364] [syslog] Add default syslog ip to interfaces.j2
 (#20340)

#### Why I did it
This is to make interfaces iprule to align with syslog server ip if exists and goes default if not provided
#### How I did it
Set ip rule when interface up and down. Fix test gap on interfaces.j2 for syslog parsing
#### How to verify it
use j2 tempalte unit test
---
 files/image_config/interfaces/interfaces.j2   |  26 +
 .../tests/sample_output/py2/interfaces        |   2 +
 .../tests/sample_output/py2/interfaces_syslog |  55 +
 .../tests/sample_output/py2/mvrf_interfaces   |   2 +
 .../sample_output/py2/two_mgmt_interfaces     |   4 +
 .../tests/sample_output/py3/interfaces        |   2 +
 .../tests/sample_output/py3/interfaces_syslog |  55 +
 .../tests/sample_output/py3/mvrf_interfaces   |   2 +
 .../sample_output/py3/two_mgmt_interfaces     |   4 +
 .../tests/t0-sample-graph-syslog.xml          | 943 ++++++++++++++++++
 src/sonic-config-engine/tests/test_j2files.py |   6 +
 11 files changed, 1101 insertions(+)
 create mode 100644 src/sonic-config-engine/tests/sample_output/py2/interfaces_syslog
 create mode 100644 src/sonic-config-engine/tests/sample_output/py3/interfaces_syslog
 create mode 100644 src/sonic-config-engine/tests/t0-sample-graph-syslog.xml

diff --git a/files/image_config/interfaces/interfaces.j2 b/files/image_config/interfaces/interfaces.j2
index a75b617f1ec5..cfdd322c4543 100644
--- a/files/image_config/interfaces/interfaces.j2
+++ b/files/image_config/interfaces/interfaces.j2
@@ -88,6 +88,19 @@ iface {{ name }} {{ 'inet' if prefix | ipv4 else 'inet6' }} static
 {% for route in MGMT_INTERFACE[(name, prefix)]['forced_mgmt_routes'] %}
     up ip {{ '-4' if prefix | ipv4 else '-6' }} rule add pref {{ force_mgmt_route_priority }} to {{ route }} table {{ vrf_table }}
 {% endfor %}
+{% if SYSLOG_SERVER is defined and SYSLOG_SERVER %}
+{% for server in SYSLOG_SERVER %}
+{% if server | ipv4 and prefix | ipv4 %}
+    up ip rule add pref {{ force_mgmt_route_priority }} to {{ server }}/32 table {{ vrf_table }}
+{% elif server | ipv6 and prefix | ipv6 %}
+    up ip -6 rule add pref {{ force_mgmt_route_priority }} to {{ server }}/128 table {{ vrf_table }}
+{% endif %}
+{% endfor %}
+{% else %}
+{% if prefix | ipv4 %}
+    up ip rule add pref {{ force_mgmt_route_priority }} to 10.20.6.16/32 table {{ vrf_table }}
+{% endif %}
+{% endif %}
 {% if prefix | ipv6 and vrf_table == 'default'%}
     # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown
     up ip -6 rule add pref {{ force_mgmt_route_priority + 3 }} lookup {{ vrf_table }}
@@ -99,6 +112,19 @@ iface {{ name }} {{ 'inet' if prefix | ipv4 else 'inet6' }} static
 {% for route in MGMT_INTERFACE[(name, prefix)]['forced_mgmt_routes'] %}
     pre-down ip {{ '-4' if route | ipv4 else '-6' }} rule delete pref {{ force_mgmt_route_priority }} to {{ route }} table {{ vrf_table }}
 {% endfor %}
+{% if SYSLOG_SERVER is defined and SYSLOG_SERVER %}
+{% for server in SYSLOG_SERVER %}
+{% if server | ipv4 and prefix | ipv4 %}
+    down ip rule delete pref {{ force_mgmt_route_priority }} to {{ server }}/32 table {{ vrf_table }}
+{% elif server | ipv6 and prefix | ipv6 %}
+    down ip -6 rule delete pref {{ force_mgmt_route_priority }} to {{ server }}/128 table {{ vrf_table }}
+{% endif %}
+{% endfor %}
+{% else %}
+{% if prefix | ipv4 %}
+    down ip rule delete pref {{ force_mgmt_route_priority }} to 10.20.6.16/32 table {{ vrf_table }}
+{% endif %}
+{% endif %}
 {% if prefix | ipv6 and vrf_table == 'default'%}
     pre-down ip -6 rule delete pref {{ force_mgmt_route_priority + 3 }} lookup {{ vrf_table }}
 {% endif %}
diff --git a/src/sonic-config-engine/tests/sample_output/py2/interfaces b/src/sonic-config-engine/tests/sample_output/py2/interfaces
index 15d5f8426247..f4a67ce37cd9 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/interfaces
+++ b/src/sonic-config-engine/tests/sample_output/py2/interfaces
@@ -24,10 +24,12 @@ iface eth0 inet static
     up ip -4 route add default via 10.0.0.1 dev eth0 table default metric 201
     up ip -4 route add 10.0.0.0/24 dev eth0 table default
     up ip -4 rule add pref 32765 from 10.0.0.100/32 table default
+    up ip rule add pref 32764 to 10.20.6.16/32 table default
     # management port down rules
     pre-down ip -4 route delete default via 10.0.0.1 dev eth0 table default
     pre-down ip -4 route delete 10.0.0.0/24 dev eth0 table default
     pre-down ip -4 rule delete pref 32765 from 10.0.0.100/32 table default
+    down ip rule delete pref 32764 to 10.20.6.16/32 table default
 iface eth0 inet6 static
     address 2603:10e2:0:2902::8
     netmask 64
diff --git a/src/sonic-config-engine/tests/sample_output/py2/interfaces_syslog b/src/sonic-config-engine/tests/sample_output/py2/interfaces_syslog
new file mode 100644
index 000000000000..8b58153b5b77
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py2/interfaces_syslog
@@ -0,0 +1,55 @@
+#
+# =============== Managed by SONiC Config Engine DO NOT EDIT! ===============
+# generated from /usr/share/sonic/templates/interfaces.j2 using sonic-cfggen
+# file: /etc/network/interfaces
+#
+# The loopback network interface
+auto lo
+iface lo inet loopback
+   address 127.0.0.1
+   netmask 255.255.0.0
+   scope host
+   post-up ip addr del 127.0.0.1/8 dev lo
+   pre-down ip addr add 127.0.0.1/8 dev lo
+
+# The management network interface
+auto eth0
+iface eth0 inet static
+    address 10.0.0.100
+    netmask 255.255.255.0
+    network 10.0.0.0
+    broadcast 10.0.0.255
+    ########## management network policy routing rules
+    # management port up rules
+    up ip -4 route add default via 10.0.0.1 dev eth0 table default metric 201
+    up ip -4 route add 10.0.0.0/24 dev eth0 table default
+    up ip -4 rule add pref 32765 from 10.0.0.100/32 table default
+    up ip rule add pref 32764 to 10.3.145.8/32 table default
+    up ip rule add pref 32764 to 100.127.20.21/32 table default
+    # management port down rules
+    pre-down ip -4 route delete default via 10.0.0.1 dev eth0 table default
+    pre-down ip -4 route delete 10.0.0.0/24 dev eth0 table default
+    pre-down ip -4 rule delete pref 32765 from 10.0.0.100/32 table default
+    down ip rule delete pref 32764 to 10.3.145.8/32 table default
+    down ip rule delete pref 32764 to 100.127.20.21/32 table default
+iface eth0 inet6 static
+    address 2603:10e2:0:2902::8
+    netmask 64
+    network 2603:10e2:0:2902::
+    broadcast 2603:10e2:0:2902:ffff:ffff:ffff:ffff
+    ########## management network policy routing rules
+    # management port up rules
+    up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201
+    up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table default
+    up ip -6 rule add pref 32765 from 2603:10e2:0:2902::8/128 table default
+    # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown
+    up ip -6 rule add pref 32767 lookup default
+    # management port down rules
+    pre-down ip -6 route delete default via 2603:10e2:0:2902::1 dev eth0 table default
+    pre-down ip -6 route delete 2603:10e2:0:2902::/64 dev eth0 table default
+    pre-down ip -6 rule delete pref 32765 from 2603:10e2:0:2902::8/128 table default
+    pre-down ip -6 rule delete pref 32767 lookup default
+#
+source /etc/network/interfaces.d/*
+#
+
diff --git a/src/sonic-config-engine/tests/sample_output/py2/mvrf_interfaces b/src/sonic-config-engine/tests/sample_output/py2/mvrf_interfaces
index 518fbb0389a1..a72d754b3ca8 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/mvrf_interfaces
+++ b/src/sonic-config-engine/tests/sample_output/py2/mvrf_interfaces
@@ -36,12 +36,14 @@ iface eth0 inet static
     up ip -4 rule add pref 32765 from 10.0.0.100/32 table 5000
     up ip -4 rule add pref 32764 to 11.11.11.11 table 5000
     up ip -4 rule add pref 32764 to 22.22.22.0/23 table 5000
+    up ip rule add pref 32764 to 10.20.6.16/32 table 5000
     # management port down rules
     pre-down ip -4 route delete default via 10.0.0.1 dev eth0 table 5000
     pre-down ip -4 route delete 10.0.0.0/24 dev eth0 table 5000
     pre-down ip -4 rule delete pref 32765 from 10.0.0.100/32 table 5000
     pre-down ip -4 rule delete pref 32764 to 11.11.11.11 table 5000
     pre-down ip -4 rule delete pref 32764 to 22.22.22.0/23 table 5000
+    down ip rule delete pref 32764 to 10.20.6.16/32 table 5000
 iface eth0 inet6 static
     address 2603:10e2:0:2902::8
     netmask 64
diff --git a/src/sonic-config-engine/tests/sample_output/py2/two_mgmt_interfaces b/src/sonic-config-engine/tests/sample_output/py2/two_mgmt_interfaces
index 1b46be4bc380..9e44fe93e0df 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/two_mgmt_interfaces
+++ b/src/sonic-config-engine/tests/sample_output/py2/two_mgmt_interfaces
@@ -25,10 +25,12 @@ iface eth1 inet static
     up ip -4 route add default via 10.0.10.1 dev eth1 table default metric 201
     up ip -4 route add 10.0.10.0/24 dev eth1 table default
     up ip -4 rule add pref 32765 from 10.0.10.100/32 table default
+    up ip rule add pref 32764 to 10.20.6.16/32 table default
     # management port down rules
     pre-down ip -4 route delete default via 10.0.10.1 dev eth1 table default
     pre-down ip -4 route delete 10.0.10.0/24 dev eth1 table default
     pre-down ip -4 rule delete pref 32765 from 10.0.10.100/32 table default
+    down ip rule delete pref 32764 to 10.20.6.16/32 table default
 iface eth0 inet static
     address 10.0.0.100
     netmask 255.255.255.0
@@ -39,10 +41,12 @@ iface eth0 inet static
     up ip -4 route add default via 10.0.0.1 dev eth0 table default metric 201
     up ip -4 route add 10.0.0.0/24 dev eth0 table default
     up ip -4 rule add pref 32765 from 10.0.0.100/32 table default
+    up ip rule add pref 32764 to 10.20.6.16/32 table default
     # management port down rules
     pre-down ip -4 route delete default via 10.0.0.1 dev eth0 table default
     pre-down ip -4 route delete 10.0.0.0/24 dev eth0 table default
     pre-down ip -4 rule delete pref 32765 from 10.0.0.100/32 table default
+    down ip rule delete pref 32764 to 10.20.6.16/32 table default
 iface eth1 inet6 static
     address 2603:10e2:0:abcd::8
     netmask 64
diff --git a/src/sonic-config-engine/tests/sample_output/py3/interfaces b/src/sonic-config-engine/tests/sample_output/py3/interfaces
index 15d5f8426247..f4a67ce37cd9 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/interfaces
+++ b/src/sonic-config-engine/tests/sample_output/py3/interfaces
@@ -24,10 +24,12 @@ iface eth0 inet static
     up ip -4 route add default via 10.0.0.1 dev eth0 table default metric 201
     up ip -4 route add 10.0.0.0/24 dev eth0 table default
     up ip -4 rule add pref 32765 from 10.0.0.100/32 table default
+    up ip rule add pref 32764 to 10.20.6.16/32 table default
     # management port down rules
     pre-down ip -4 route delete default via 10.0.0.1 dev eth0 table default
     pre-down ip -4 route delete 10.0.0.0/24 dev eth0 table default
     pre-down ip -4 rule delete pref 32765 from 10.0.0.100/32 table default
+    down ip rule delete pref 32764 to 10.20.6.16/32 table default
 iface eth0 inet6 static
     address 2603:10e2:0:2902::8
     netmask 64
diff --git a/src/sonic-config-engine/tests/sample_output/py3/interfaces_syslog b/src/sonic-config-engine/tests/sample_output/py3/interfaces_syslog
new file mode 100644
index 000000000000..8b58153b5b77
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py3/interfaces_syslog
@@ -0,0 +1,55 @@
+#
+# =============== Managed by SONiC Config Engine DO NOT EDIT! ===============
+# generated from /usr/share/sonic/templates/interfaces.j2 using sonic-cfggen
+# file: /etc/network/interfaces
+#
+# The loopback network interface
+auto lo
+iface lo inet loopback
+   address 127.0.0.1
+   netmask 255.255.0.0
+   scope host
+   post-up ip addr del 127.0.0.1/8 dev lo
+   pre-down ip addr add 127.0.0.1/8 dev lo
+
+# The management network interface
+auto eth0
+iface eth0 inet static
+    address 10.0.0.100
+    netmask 255.255.255.0
+    network 10.0.0.0
+    broadcast 10.0.0.255
+    ########## management network policy routing rules
+    # management port up rules
+    up ip -4 route add default via 10.0.0.1 dev eth0 table default metric 201
+    up ip -4 route add 10.0.0.0/24 dev eth0 table default
+    up ip -4 rule add pref 32765 from 10.0.0.100/32 table default
+    up ip rule add pref 32764 to 10.3.145.8/32 table default
+    up ip rule add pref 32764 to 100.127.20.21/32 table default
+    # management port down rules
+    pre-down ip -4 route delete default via 10.0.0.1 dev eth0 table default
+    pre-down ip -4 route delete 10.0.0.0/24 dev eth0 table default
+    pre-down ip -4 rule delete pref 32765 from 10.0.0.100/32 table default
+    down ip rule delete pref 32764 to 10.3.145.8/32 table default
+    down ip rule delete pref 32764 to 100.127.20.21/32 table default
+iface eth0 inet6 static
+    address 2603:10e2:0:2902::8
+    netmask 64
+    network 2603:10e2:0:2902::
+    broadcast 2603:10e2:0:2902:ffff:ffff:ffff:ffff
+    ########## management network policy routing rules
+    # management port up rules
+    up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201
+    up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table default
+    up ip -6 rule add pref 32765 from 2603:10e2:0:2902::8/128 table default
+    # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown
+    up ip -6 rule add pref 32767 lookup default
+    # management port down rules
+    pre-down ip -6 route delete default via 2603:10e2:0:2902::1 dev eth0 table default
+    pre-down ip -6 route delete 2603:10e2:0:2902::/64 dev eth0 table default
+    pre-down ip -6 rule delete pref 32765 from 2603:10e2:0:2902::8/128 table default
+    pre-down ip -6 rule delete pref 32767 lookup default
+#
+source /etc/network/interfaces.d/*
+#
+
diff --git a/src/sonic-config-engine/tests/sample_output/py3/mvrf_interfaces b/src/sonic-config-engine/tests/sample_output/py3/mvrf_interfaces
index 518fbb0389a1..a72d754b3ca8 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/mvrf_interfaces
+++ b/src/sonic-config-engine/tests/sample_output/py3/mvrf_interfaces
@@ -36,12 +36,14 @@ iface eth0 inet static
     up ip -4 rule add pref 32765 from 10.0.0.100/32 table 5000
     up ip -4 rule add pref 32764 to 11.11.11.11 table 5000
     up ip -4 rule add pref 32764 to 22.22.22.0/23 table 5000
+    up ip rule add pref 32764 to 10.20.6.16/32 table 5000
     # management port down rules
     pre-down ip -4 route delete default via 10.0.0.1 dev eth0 table 5000
     pre-down ip -4 route delete 10.0.0.0/24 dev eth0 table 5000
     pre-down ip -4 rule delete pref 32765 from 10.0.0.100/32 table 5000
     pre-down ip -4 rule delete pref 32764 to 11.11.11.11 table 5000
     pre-down ip -4 rule delete pref 32764 to 22.22.22.0/23 table 5000
+    down ip rule delete pref 32764 to 10.20.6.16/32 table 5000
 iface eth0 inet6 static
     address 2603:10e2:0:2902::8
     netmask 64
diff --git a/src/sonic-config-engine/tests/sample_output/py3/two_mgmt_interfaces b/src/sonic-config-engine/tests/sample_output/py3/two_mgmt_interfaces
index 4be6dcd5d801..df2ac9ad30ad 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/two_mgmt_interfaces
+++ b/src/sonic-config-engine/tests/sample_output/py3/two_mgmt_interfaces
@@ -25,10 +25,12 @@ iface eth0 inet static
     up ip -4 route add default via 10.0.0.1 dev eth0 table default metric 201
     up ip -4 route add 10.0.0.0/24 dev eth0 table default
     up ip -4 rule add pref 32765 from 10.0.0.100/32 table default
+    up ip rule add pref 32764 to 10.20.6.16/32 table default
     # management port down rules
     pre-down ip -4 route delete default via 10.0.0.1 dev eth0 table default
     pre-down ip -4 route delete 10.0.0.0/24 dev eth0 table default
     pre-down ip -4 rule delete pref 32765 from 10.0.0.100/32 table default
+    down ip rule delete pref 32764 to 10.20.6.16/32 table default
 iface eth0 inet6 static
     address 2603:10e2:0:2902::8
     netmask 64
@@ -56,10 +58,12 @@ iface eth1 inet static
     up ip -4 route add default via 10.0.10.1 dev eth1 table default metric 201
     up ip -4 route add 10.0.10.0/24 dev eth1 table default
     up ip -4 rule add pref 32765 from 10.0.10.100/32 table default
+    up ip rule add pref 32764 to 10.20.6.16/32 table default
     # management port down rules
     pre-down ip -4 route delete default via 10.0.10.1 dev eth1 table default
     pre-down ip -4 route delete 10.0.10.0/24 dev eth1 table default
     pre-down ip -4 rule delete pref 32765 from 10.0.10.100/32 table default
+    down ip rule delete pref 32764 to 10.20.6.16/32 table default
 iface eth1 inet6 static
     address 2603:10e2:0:abcd::8
     netmask 64
diff --git a/src/sonic-config-engine/tests/t0-sample-graph-syslog.xml b/src/sonic-config-engine/tests/t0-sample-graph-syslog.xml
new file mode 100644
index 000000000000..4573e43a42f9
--- /dev/null
+++ b/src/sonic-config-engine/tests/t0-sample-graph-syslog.xml
@@ -0,0 +1,943 @@
+<DeviceMiniGraph xmlns="Microsoft.Search.Autopilot.Evolution" xmlns:i="http://www.w3.org/2001/XMLSchema-instance">
+  <CpgDec>
+    <IsisRouters xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    <PeeringSessions>
+       <BGPSession>
+         <StartRouter>switch-t0</StartRouter>
+         <StartPeer>10.1.0.32</StartPeer>
+         <EndRouter>BGPMonitor</EndRouter>
+         <EndPeer>10.20.30.40</EndPeer>
+         <Multihop>30</Multihop>
+         <HoldTime>10</HoldTime>
+         <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <MacSec>false</MacSec>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>10.0.0.56</StartPeer>
+        <EndRouter>ARISTA01T1</EndRouter>
+        <EndPeer>10.0.0.57</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>FC00::71</StartPeer>
+        <EndRouter>ARISTA01T1</EndRouter>
+        <EndPeer>FC00::72</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <MacSec>false</MacSec>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>10.0.0.58</StartPeer>
+        <EndRouter>ARISTA02T1</EndRouter>
+        <EndPeer>10.0.0.59</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>FC00::75</StartPeer>
+        <EndRouter>ARISTA02T1</EndRouter>
+        <EndPeer>FC00::76</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <MacSec>false</MacSec>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>10.0.0.60</StartPeer>
+        <EndRouter>ARISTA03T1</EndRouter>
+        <EndPeer>10.0.0.61</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>FC00::79</StartPeer>
+        <EndRouter>ARISTA03T1</EndRouter>
+        <EndPeer>FC00::7A</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <MacSec>false</MacSec>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>10.0.0.62</StartPeer>
+        <EndRouter>ARISTA04T1</EndRouter>
+        <EndPeer>10.0.0.63</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>FC00::7D</StartPeer>
+        <EndRouter>ARISTA04T1</EndRouter>
+        <EndPeer>FC00::7E</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+    </PeeringSessions>
+    <Routers xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+      <a:BGPRouterDeclaration>
+          <a:ASN>1</a:ASN>
+          <a:BgpGroups/>
+          <a:Hostname>BGPMonitor</a:Hostname>
+          <a:Peers>
+              <BGPPeer>
+                  <ElementType>BGPPeer</ElementType>
+                  <Address>10.1.0.32</Address>
+                  <RouteMapIn i:nil="true"/>
+                  <RouteMapOut i:nil="true"/>
+                  <Vrf i:nil="true"/>
+              </BGPPeer>
+          </a:Peers>
+          <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>65100</a:ASN>
+        <a:Hostname>switch-t0</a:Hostname>
+        <a:Peers>
+          <BGPPeer>
+            <Address>10.0.0.57</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.59</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.61</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.63</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+        </a:Peers>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64600</a:ASN>
+        <a:Hostname>ARISTA01T1</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64600</a:ASN>
+        <a:Hostname>ARISTA02T1</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64600</a:ASN>
+        <a:Hostname>ARISTA03T1</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64600</a:ASN>
+        <a:Hostname>ARISTA04T1</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+    </Routers>
+  </CpgDec>
+  <DpgDec>
+    <DeviceDataPlaneInfo>
+      <IPSecTunnels/>
+      <LoopbackIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:LoopbackIPInterface>
+          <Name>HostIP</Name>
+          <AttachTo>Loopback0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>10.1.0.32/32</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.1.0.32/32</a:PrefixStr>
+        </a:LoopbackIPInterface>
+        <a:LoopbackIPInterface>
+          <Name>HostIP1</Name>
+          <AttachTo>Loopback0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>FC00:1::32/128</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>FC00:1::32/128</a:PrefixStr>
+        </a:LoopbackIPInterface>
+        <a:LoopbackIPInterface>
+          <Name>LoopbackIP1</Name>
+          <AttachTo>Loopback1</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>10.10.0.99/32</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.10.0.99/32</a:PrefixStr>
+        </a:LoopbackIPInterface>
+        <a:LoopbackIPInterface>
+          <Name>LoopbackIP2</Name>
+          <AttachTo>Loopback2</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>10.21.0.64/32</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.21.0.64/32</a:PrefixStr>
+        </a:LoopbackIPInterface>
+        <a:LoopbackIPInterface>
+          <Name>LoopbackIP3</Name>
+          <AttachTo>Loopback3</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>10.21.64.2/32</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.21.64.2/32</a:PrefixStr>
+        </a:LoopbackIPInterface>
+       </LoopbackIPInterfaces>
+      <ManagementIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:ManagementIPInterface>
+          <Name>HostIP</Name>
+          <AttachTo>eth0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>10.0.0.100/24</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.0.0.100/24</a:PrefixStr>
+        </a:ManagementIPInterface>
+        <a:ManagementIPInterface>
+          <Name>HostIP</Name>
+          <AttachTo>eth0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>2603:10e2:0:2902::8/64</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>2603:10e2:0:2902::8/64</a:PrefixStr>
+        </a:ManagementIPInterface>
+      </ManagementIPInterfaces>
+      <ManagementVIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <MplsInterfaces/>
+      <MplsTeInterfaces/>
+      <RsvpInterfaces/>
+      <Hostname>switch-t0</Hostname>
+      <PortChannelInterfaces>
+        <PortChannel>
+          <Name>PortChannel01</Name>
+          <AttachTo>fortyGigE0/112</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <Name>PortChannel02</Name>
+          <AttachTo>fortyGigE0/116</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <Name>PortChannel03</Name>
+          <AttachTo>fortyGigE0/120</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <Name>PortChannel04</Name>
+          <AttachTo>fortyGigE0/124</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+      </PortChannelInterfaces>
+      <VlanInterfaces>
+        <VlanInterface>
+          <Name>Vlan1000</Name>
+          <AttachTo>fortyGigE0/4;fortyGigE0/8;fortyGigE0/12;fortyGigE0/16;fortyGigE0/20;fortyGigE0/24;fortyGigE0/28;fortyGigE0/32;fortyGigE0/36;fortyGigE0/40;fortyGigE0/44;fortyGigE0/48;fortyGigE0/52;fortyGigE0/56;fortyGigE0/60;fortyGigE0/64;fortyGigE0/68;fortyGigE0/72;fortyGigE0/76;fortyGigE0/80;fortyGigE0/84;fortyGigE0/88;fortyGigE0/92;fortyGigE0/96</AttachTo>
+          <NoDhcpRelay>False</NoDhcpRelay>
+          <StaticDHCPRelay>0.0.0.0/0</StaticDHCPRelay>
+          <FhrpProtoType i:nil="true"/>
+          <Type i:nil="true"/>
+          <DhcpRelays>192.0.0.1;192.0.0.2</DhcpRelays>
+          <Dhcpv6Relays>fc02:2000::1;fc02:2000::2</Dhcpv6Relays>
+          <VlanID>1000</VlanID>
+          <Tag>1000</Tag>
+          <Subnets>192.168.0.0/27</Subnets>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets/>
+        </VlanInterface>
+        <VlanInterface>
+          <Name>Vlan2000</Name>
+          <AttachTo>PortChannel01;PortChannel02;PortChannel03</AttachTo>
+          <NoDhcpRelay>False</NoDhcpRelay>
+          <StaticDHCPRelay>0.0.0.0/0</StaticDHCPRelay>
+          <FhrpProtoType i:nil="true"/>
+          <Type i:nil="true"/>
+          <DhcpRelays>192.0.0.3;192.0.0.4</DhcpRelays>
+          <Dhcpv6Relays>fc02:2000::3;fc02:2000::4</Dhcpv6Relays>
+          <VlanID>2000</VlanID>
+          <Tag>2000</Tag>
+          <Subnets>192.168.200.0/27</Subnets>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets/>
+        </VlanInterface>
+        <VlanInterface>
+          <Name>Vlan99</Name>
+          <AttachTo>fortyGigE0/100</AttachTo>
+          <NoDhcpRelay>False</NoDhcpRelay>
+          <StaticDHCPRelay>0.0.0.0/0</StaticDHCPRelay>
+          <FhrpProtoType i:nil="true"/>
+          <Type>UserDefinedL2Vlan</Type>
+          <DhcpRelays>192.0.0.1;192.0.0.2</DhcpRelays>
+          <VlanID>99</VlanID>
+          <Tag>99</Tag>
+          <Subnets/>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets/>
+        </VlanInterface>
+        <VlanInterface>
+          <Name>Vlan98</Name>
+          <AttachTo>fortyGigE0/100;PortChannel01;PortChannel03</AttachTo>
+          <NoDhcpRelay>False</NoDhcpRelay>
+          <StaticDHCPRelay>0.0.0.0/0</StaticDHCPRelay>
+          <FhrpProtoType i:nil="true"/>
+          <Type>UserDefinedL2Vlan</Type>
+          <DhcpRelays>192.0.0.1;192.0.0.2</DhcpRelays>
+          <VlanID>98</VlanID>
+          <Tag>98</Tag>
+          <Subnets/>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets/>
+        </VlanInterface>
+      </VlanInterfaces>
+      <IPInterfaces>
+        <IPInterface>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel01</AttachTo>
+          <Prefix>10.0.0.56/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:Name="true"/>
+          <AttachTo>PortChannel01</AttachTo>
+          <Prefix>FC00::71/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel02</AttachTo>
+          <Prefix>10.0.0.58/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:Name="true"/>
+          <AttachTo>PortChannel02</AttachTo>
+          <Prefix>FC00::75/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel03</AttachTo>
+          <Prefix>10.0.0.60/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:Name="true"/>
+          <AttachTo>PortChannel03</AttachTo>
+          <Prefix>FC00::79/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel04</AttachTo>
+          <Prefix>10.0.0.62/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:Name="true"/>
+          <AttachTo>PortChannel04</AttachTo>
+          <Prefix>FC00::7D/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:nil="true"/>
+          <AttachTo>Vlan1000</AttachTo>
+          <Prefix>192.168.0.1/27</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:nil="true"/>
+          <AttachTo>Vlan2000</AttachTo>
+          <Prefix>192.168.200.1/27</Prefix>
+        </IPInterface>
+      </IPInterfaces>
+      <DataAcls/>
+      <AclInterfaces>
+        <AclInterface>
+          <AttachTo>ERSPAN</AttachTo>
+          <InAcl>everflow</InAcl>
+          <Type>Everflow</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>ERSPANv6</AttachTo>
+          <InAcl>everflowV6</InAcl>
+          <Type>Everflow</Type>
+        </AclInterface>
+	<AclInterface>
+          <AttachTo>EGRESS_ERSPAN</AttachTo>
+	  <OutAcl>everflow_egress</OutAcl>
+	  <Type>Everflow</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>PortChannel01;PortChannel02;PortChannel03;PortChannel04</AttachTo>
+          <InAcl>DataAclIngress</InAcl>
+          <Type>DataPlane</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>PortChannel01;PortChannel02;Vlan98</AttachTo>
+          <OutAcl>DataAclEgress</OutAcl>
+          <Type>DataPlane</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>SNMP</AttachTo>
+          <InAcl>SNMP_ACL</InAcl>
+          <Type>SNMP</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>NTP</AttachTo>
+          <InAcl>NTP_ACL</InAcl>
+          <Type>NTP</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>SSH</AttachTo>
+          <InAcl>SSH_ACL</InAcl>
+          <Type>SSH</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>SSH</AttachTo>
+          <InAcl>ROUTER-PROTECT</InAcl>
+          <Type>SSH</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>SNMP</AttachTo>
+          <InAcl>ROUTER-PROTECT</InAcl>
+          <Type>SNMP</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>NTP</AttachTo>
+          <InAcl>NTP_ACL</InAcl>
+        </AclInterface>
+      </AclInterfaces>
+      <DownstreamSummaries/>
+      <DownstreamSummarySet xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    </DeviceDataPlaneInfo>
+  </DpgDec>
+  <PngDec>
+    <DeviceInterfaceLinks>
+      <DeviceLinkBase>
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <EndDevice>ARISTA01T1</EndDevice>
+        <EndPort>Ethernet1/1</EndPort>
+        <StartDevice>switch-t0</StartDevice>
+        <StartPort>fortyGigE0/112</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase>
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <EndDevice>ARISTA02T1</EndDevice>
+        <EndPort>Ethernet1/1</EndPort>
+        <StartDevice>switch-t0</StartDevice>
+        <StartPort>fortyGigE0/116</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase>
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <EndDevice>ARISTA03T1</EndDevice>
+        <EndPort>Ethernet1/1</EndPort>
+        <StartDevice>switch-t0</StartDevice>
+        <StartPort>fortyGigE0/120</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase>
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <EndDevice>ARISTA04T1</EndDevice>
+        <EndPort>Ethernet1/1</EndPort>
+        <StartDevice>switch-t0</StartDevice>
+        <StartPort>fortyGigE0/124</StartPort>
+        <Bandwidth>100000</Bandwidth>
+      </DeviceLinkBase>
+      <DeviceLinkBase>
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <EndDevice>switch-t0</EndDevice>
+        <EndPort>fortyGigE0/4</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA05T1</StartDevice>
+        <StartPort>Ethernet1/33</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase>
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <EndDevice>Servers0</EndDevice>
+        <EndPort>eth0</EndPort>
+        <StartDevice>switch-t0</StartDevice>
+        <StartPort>fortyGigE0/4</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase>
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <EndDevice>Servers100</EndDevice>
+        <EndPort>eth0</EndPort>
+        <StartDevice>switch-t0</StartDevice>
+        <StartPort>fortyGigE0/100</StartPort>
+      </DeviceLinkBase>
+    </DeviceInterfaceLinks>
+    <Devices>
+      <Device i:type="ToRRouter">
+        <Hostname>switch-t0</Hostname>
+        <HwSku>Force10-S6000</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <Hostname>ARISTA01T1</Hostname>
+        <HwSku>Arista</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <Hostname>ARISTA02T1</Hostname>
+        <HwSku>Arista</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <Hostname>ARISTA03T1</Hostname>
+        <HwSku>Arista</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <Hostname>ARISTA04T1</Hostname>
+        <HwSku>Arista</HwSku>
+      </Device>
+    </Devices>
+  </PngDec>
+  <DeviceInfos>
+    <DeviceInfo>
+      <EthernetInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet0</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet8</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet12</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet16</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet20</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet24</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet28</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet32</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet36</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet40</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet44</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet48</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet52</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet56</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet60</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet64</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet68</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet72</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet76</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet80</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet84</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet88</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet92</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet96</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet100</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet104</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet108</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet112</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet116</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet120</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+      </EthernetInterfaces>
+      <HwSku>Force10-S6000</HwSku>
+      <ManagementInterfaces/>
+    </DeviceInfo>
+  </DeviceInfos>
+  <MetadataDeclaration>
+    <Devices xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+      <a:DeviceMetadata>
+        <a:Name>switch-t0</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ErspanDestinationIpv4</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>2.2.2.2</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+    </Devices>
+    <Properties xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+  </MetadataDeclaration>
+  <LinkMetadataDeclaration>
+    <Link xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+      <a:LinkMetadata>
+        <a:Name i:nil="true"/>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>AutoNegotiation</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>FECDisabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA05T1:Ethernet1/33;switch-t0:fortyGigE0/4</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name i:nil="true"/>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>AutoNegotiation</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>False</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>FECDisabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA06T1:Ethernet1/34;switch-t0:fortyGigE0/8</a:Key>
+      </a:LinkMetadata>
+    </Link>
+  </LinkMetadataDeclaration>
+<MetadataDeclaration>
+ <Devices xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+  <a:DeviceMetadata>
+   <a:Name>switch-t0</a:Name>
+   <a:Properties>
+    <a:DeviceProperty>
+     <a:Name>DeploymentId</a:Name>
+     <a:Reference i:nil="true"/>
+     <a:Value>1</a:Value>
+    </a:DeviceProperty>
+    <a:DeviceProperty>
+     <a:Name>SyslogResources</a:Name>
+     <a:Reference i:nil="true" />
+     <a:Value>10.3.145.8;100.127.20.21</a:Value>
+    </a:DeviceProperty>
+  </a:Properties>
+  </a:DeviceMetadata>
+ </Devices>
+ <Properties xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+</MetadataDeclaration>
+  <Hostname>switch-t0</Hostname>
+  <HwSku>Force10-S6000</HwSku>
+</DeviceMiniGraph>
diff --git a/src/sonic-config-engine/tests/test_j2files.py b/src/sonic-config-engine/tests/test_j2files.py
index 2f424f6c3949..3ff70d40ae83 100644
--- a/src/sonic-config-engine/tests/test_j2files.py
+++ b/src/sonic-config-engine/tests/test_j2files.py
@@ -20,6 +20,7 @@ def setUp(self):
         self.ztp_ip = os.path.join(self.test_dir, "sample-ztp-ip.json")
         self.ztp_inband_ip = os.path.join(self.test_dir, "sample-ztp-inband-ip.json")
         self.t0_minigraph = os.path.join(self.test_dir, 't0-sample-graph.xml')
+        self.t0_minigraph_syslog = os.path.join(self.test_dir, 't0-sample-graph-syslog.xml')
         self.t0_minigraph_secondary_subnets = os.path.join(self.test_dir, 't0-sample-graph-secondary-subnets.xml')
         self.t0_mvrf_minigraph = os.path.join(self.test_dir, 't0-sample-graph-mvrf.xml')
         self.t0_minigraph_nomgmt = os.path.join(self.test_dir, 't0-sample-graph-nomgmt.xml')
@@ -131,6 +132,11 @@ def test_interfaces(self):
         argument = ['-m', self.t0_minigraph, '-p', self.t0_port_config, '-a', '{\"hwaddr\":\"e4:1d:2d:a5:f3:ad\"}', '-t', interfaces_template]
         self.run_script(argument, output_file=self.output_file)
         self.assertTrue(utils.cmp(os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'interfaces'), self.output_file))
+        
+        # ZTP disabled, MGMT_INTERFACE defined, SYSLOG_SERVER defined
+        argument = ['-m', self.t0_minigraph_syslog, '-p', self.t0_port_config, '-a', '{\"hwaddr\":\"e4:1d:2d:a5:f3:ad\"}', '-t', interfaces_template]
+        self.run_script(argument, output_file=self.output_file)
+        self.assertTrue(utils.cmp(os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'interfaces_syslog'), self.output_file))
 
         argument = ['-m', self.t0_mvrf_minigraph, '-p', self.t0_port_config, '-a', '{\"hwaddr\":\"e4:1d:2d:a5:f3:ad\"}', '-t', interfaces_template]
         self.run_script(argument, output_file=self.output_file)

From 0e419bb5a356ba93edb86e19e055bfa6821305d2 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <yaqiangzhu@microsoft.com>
Date: Fri, 25 Oct 2024 12:19:17 +0800
Subject: [PATCH 135/364] [dhcp_relay] Only check parent dhcrelay process in
 dhcprelayd (#20551)

Why I did it
In master and 202405 branch, dhcp_relay container was updated to Bookworm, hence isc-dhcp-relay was updated from 4.4.1 to 4.4.3. In this version, isc-dhcp-relay would create child process to proceed when there is network io, hence dhcprelayd would get duplicated dhcrelay process when checking

How I did it
Only check parent dhcp_relay process

How to verify it
UT
Run https://github.com/sonic-net/sonic-mgmt/blob/master/tests/dhcp_relay/test_dhcp_relay_stress.py with latest dhcprelayd
---
 .../dhcp_utilities/common/utils.py            | 18 -------------
 .../dhcp_utilities/dhcprelayd/dhcprelayd.py   | 20 ++++++++++++--
 .../tests/common_utils.py                     |  6 ++++-
 .../tests/test_dhcprelayd.py                  | 26 +++++++++++++------
 src/sonic-dhcp-utilities/tests/test_utils.py  | 15 -----------
 5 files changed, 41 insertions(+), 44 deletions(-)

diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/common/utils.py b/src/sonic-dhcp-utilities/dhcp_utilities/common/utils.py
index 325553f536af..ee4b1815f5a0 100644
--- a/src/sonic-dhcp-utilities/dhcp_utilities/common/utils.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/common/utils.py
@@ -150,24 +150,6 @@ def _parse_table_to_dict(table):
     return ret
 
 
-def get_target_process_cmds(process_name):
-    """
-    Get running process cmds
-    Args:
-        process_name: name of process
-    Returns:
-        List of cmds list
-    """
-    res = []
-    for proc in psutil.process_iter():
-        try:
-            if proc.name() == process_name:
-                res.append(proc.cmdline())
-        except psutil.NoSuchProcess:
-            continue
-    return res
-
-
 def is_smart_switch(device_metadata):
     """
     Check in device metadata whether subtype is smartswitch
diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py
index d1b22a3158b4..208ab9a6c934 100644
--- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py
@@ -8,7 +8,7 @@
 import syslog
 import time
 from swsscommon import swsscommon
-from dhcp_utilities.common.utils import DhcpDbConnector, terminate_proc, get_target_process_cmds, is_smart_switch
+from dhcp_utilities.common.utils import DhcpDbConnector, terminate_proc, is_smart_switch
 from dhcp_utilities.common.dhcp_db_monitor import DhcpRelaydDbMonitor, DhcpServerTableIntfEnablementEventChecker, \
      VlanTableEventChecker, VlanIntfTableEventChecker, DhcpServerFeatureStateChecker, MidPlaneTableEventChecker
 
@@ -226,7 +226,23 @@ def _check_dhcp_relay_processes(self):
         """
         Check whether dhcrelay running as expected, if not, dhcprelayd will exit with code 1
         """
-        running_cmds = get_target_process_cmds("dhcrelay")
+        procs = {}
+        for proc in psutil.process_iter():
+            try:
+                if proc.name() != "dhcrelay":
+                    continue
+                procs[proc.pid] = [proc.ppid(), proc.cmdline()]
+            except psutil.NoSuchProcess:
+                continue
+
+        # When there is network io, dhcrelay would create child process to proceed them, psutil has chance to get
+        # duplicated cmdline. Hence ignore chlid process in here
+        running_cmds = []
+        for _, (parent_pid, cmdline) in procs.items():
+            if parent_pid in procs:
+                continue
+            running_cmds.append(cmdline)
+
         running_cmds.sort()
         expected_cmds = [value for key, value in self.dhcp_relay_supervisor_config.items() if "isc-dhcpv4-relay" in key]
         expected_cmds.sort()
diff --git a/src/sonic-dhcp-utilities/tests/common_utils.py b/src/sonic-dhcp-utilities/tests/common_utils.py
index f5eb4e018f86..29c579545d8e 100644
--- a/src/sonic-dhcp-utilities/tests/common_utils.py
+++ b/src/sonic-dhcp-utilities/tests/common_utils.py
@@ -65,10 +65,11 @@ def mock_get_config_db_table(table_name):
 
 
 class MockProc(object):
-    def __init__(self, name, pid=1, exited=False):
+    def __init__(self, name, pid=1, exited=False, ppid=1):
         self.proc_name = name
         self.pid = pid
         self.exited = exited
+        self.parent_id = ppid
 
     def name(self):
         if self.exited:
@@ -96,6 +97,9 @@ def wait(self):
     def status(self):
         return self.status
 
+    def ppid(self):
+        return self.parent_id
+
 
 class MockPopen(object):
     def __init__(self, pid):
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcprelayd.py b/src/sonic-dhcp-utilities/tests/test_dhcprelayd.py
index 4914ff020d63..7b542f51359d 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcprelayd.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcprelayd.py
@@ -195,23 +195,33 @@ def test_execute_supervisor_dhcp_relay_process(mock_swsscommon_dbconnector_init,
             mock_run.assert_called_once_with(["supervisorctl", op, "dhcpmon-Vlan1000"], check=True)
 
 
-@pytest.mark.parametrize("target_procs_cmds", [[["dhcrelay", "-d"]], [["dhcpmon"]]])
-def test_check_dhcp_relay_process(mock_swsscommon_dbconnector_init, mock_swsscommon_table_init, target_procs_cmds):
+@pytest.mark.parametrize("iter_process", [
+    [
+        ["dhcrelay", 2, False, 1], ["dhcrelay", 3, False, 2], ["dhcpmon", 4, False, 1], ["dhcrelay", 5, True, 1]
+    ],
+    [
+        ["dhcpmon", 4, False, 1]
+    ]])
+def test_check_dhcp_relay_process(mock_swsscommon_dbconnector_init, mock_swsscommon_table_init, iter_process):
     exp_config = {
-        "isc-dhcpv4-relay-Vlan1000": ["dhcrelay", "-d"]
+        "isc-dhcpv4-relay-Vlan1000": ["/usr/sbin/dhcrelay", "-d", "-m", "discard", "-a", "%h:%p", "%P",
+                                      "--name-alias-map-file", "/tmp/port-name-alias-map.txt", "-id", "Vlan1000",
+                                      "-iu", "docker0", "240.127.1.2"],
+        "dhcpmon-Vlan1000": ["/usr/sbin/dhcpmon", "-id", "Vlan1000", "-iu", "docker0", "-im", "eth0"]
     }
-    with patch("dhcp_utilities.dhcprelayd.dhcprelayd.get_target_process_cmds", return_value=target_procs_cmds), \
-         patch.object(DhcpRelayd, "dhcp_relay_supervisor_config",
+    process_iter_ret = [MockProc(name=item[0], pid=item[1], exited=item[2], ppid=item[3]) for item in iter_process]
+    with patch.object(DhcpRelayd, "dhcp_relay_supervisor_config",
                       return_value=exp_config, new_callable=PropertyMock), \
-         patch.object(sys, "exit", mock_exit_func):
+         patch.object(sys, "exit", mock_exit_func), \
+         patch.object(psutil, "process_iter", return_value=process_iter_ret):
         dhcp_db_connector = DhcpDbConnector()
         dhcprelayd = DhcpRelayd(dhcp_db_connector, None)
         try:
             dhcprelayd._check_dhcp_relay_processes()
         except SystemExit:
-            assert target_procs_cmds[0] != exp_config["isc-dhcpv4-relay-Vlan1000"]
+            assert all(process[0] != "dhcrelay" for process in iter_process)
         else:
-            assert target_procs_cmds[0] == exp_config["isc-dhcpv4-relay-Vlan1000"]
+            assert any(process[0] == "dhcrelay" for process in iter_process)
 
 
 def test_get_dhcp_relay_config(mock_swsscommon_dbconnector_init, mock_swsscommon_table_init):
diff --git a/src/sonic-dhcp-utilities/tests/test_utils.py b/src/sonic-dhcp-utilities/tests/test_utils.py
index 4a41049fe06e..88d07c648d87 100644
--- a/src/sonic-dhcp-utilities/tests/test_utils.py
+++ b/src/sonic-dhcp-utilities/tests/test_utils.py
@@ -141,21 +141,6 @@ def test_validate_ttr_type(test_data):
     assert res == test_data[2]
 
 
-def test_get_target_process_cmds():
-    with patch.object(psutil, "process_iter", return_value=[MockProc("dhcrelay", 1),
-                                                            MockProc("dhcrelay", 1, exited=True),
-                                                            MockProc("dhcpmon", 2)],
-                      new_callable=PropertyMock):
-        res = utils.get_target_process_cmds("dhcrelay")
-        expected_res = [
-            [
-                "/usr/sbin/dhcrelay", "-d", "-m", "discard", "-a", "%h:%p", "%P", "--name-alias-map-file",
-                "/tmp/port-name-alias-map.txt", "-id", "Vlan1000", "-iu", "docker0", "240.127.1.2"
-            ]
-        ]
-        assert res == expected_res
-
-
 @pytest.mark.parametrize("is_smart_switch", [True, False])
 def test_is_smart_switch(is_smart_switch):
     device_metadata = {"localhost": {"subtype": "SmartSwitch"}} if is_smart_switch else {"localhost": {}}

From c03ae8dcdbf33eafe5777c2410dc476511e6c778 Mon Sep 17 00:00:00 2001
From: Sai Kiran <110003254+opcoder0@users.noreply.github.com>
Date: Fri, 25 Oct 2024 21:11:41 +1100
Subject: [PATCH 136/364] [docker-ptf]: CI change to publish docker-ptf image
 to the docker registry (#20528)

Why I did it
Changes to docker-ptf Dockerfile don't get automatically published to the docker registry accessed by the community. This PR addresses the issue.

Work item tracking
Microsoft ADO (number only): 29869315

How I did it
Modified the postSteps phase in azure-pipelines-image-template.yml to invoke the script to push docker-ptf image to the docker registry. The push is applicable to build branches (master, 202305, 202311 etc.) and not feature branches.

How to verify it
TBD

Tested branch (Please provide the tested image version)
Not applicable.

Description for the changelog
[docker-ptf]: CI change to publish docker-ptf image to the public/community docker registry

Change pipeline YAML to publish docker-ptf image to docker registry
Publish only docker-ptf image for main or release branches only and not feature branch

Link to config_db schema for YANG module changes
Not applicable
---
 .../azure-pipelines-image-template.yml        | 21 ++++++++++++++++++-
 .azure-pipelines/official-build.yml           |  1 +
 2 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/.azure-pipelines/azure-pipelines-image-template.yml b/.azure-pipelines/azure-pipelines-image-template.yml
index fde8b76c4b83..f934bf366484 100644
--- a/.azure-pipelines/azure-pipelines-image-template.yml
+++ b/.azure-pipelines/azure-pipelines-image-template.yml
@@ -58,9 +58,28 @@ jobs:
         displayName: 'Make configure'
     postSteps:
       - script: |
+          BUILD_REASON=$(Build.Reason)
+          echo "Build.Reason = $BUILD_REASON"
+          echo "Build.DefinitionName = $BUILD_DEFINITIONNAME"
+          if [[ "$BUILD_REASON" != "PullRequest" && "$BUILD_DEFINITIONNAME" == "Azure.sonic-buildimage.official.vs" ]]
+          then
+            PORT=443
+            DOCKERS=$(ls target/docker-ptf.gz)
+            BRANCH=$(Build.SourceBranchName)
+            echo "Branch = $BRANCH"
+            LABELS="$BRANCH"
+            [[ "$BRANCH" == "master" ]] && LABELS="$LABELS latest"
+            for f in $DOCKERS; do
+              echo $f
+              echo "Labels = $LABELS"
+              ./push_docker.sh $f $(REGISTRY_SERVER_PUBLIC) $PORT $(REGISTRY_USERNAME) "$REGISTRY_PASSWD" "$LABELS"
+            done
+          fi
           mkdir -p $(Build.ArtifactStagingDirectory)/target
           mv target/* $(Build.ArtifactStagingDirectory)/target/
-        displayName: Copy Artifacts
+        env:
+          REGISTRY_PASSWD: $(REGISTRY_PASSWD)
+        displayName: Publish to Docker Registry and Copy Artifacts
         condition: always()
       - publish:  $(Build.ArtifactStagingDirectory)
         artifact: 'sonic-buildimage.$(GROUP_NAME)$(GROUP_EXTNAME)'
diff --git a/.azure-pipelines/official-build.yml b/.azure-pipelines/official-build.yml
index ecc9bd89c697..a228529b4abf 100644
--- a/.azure-pipelines/official-build.yml
+++ b/.azure-pipelines/official-build.yml
@@ -36,6 +36,7 @@ stages:
 - stage: Build
   pool: sonicbld-1es
   variables:
+  - group: Container-Registry
   - name: CACHE_MODE
     value: wcache
   - template: .azure-pipelines/azure-pipelines-repd-build-variables.yml@buildimage

From caf8d6228125a7b655b3923ca61f966086fb4ec0 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 25 Oct 2024 22:19:14 +0800
Subject: [PATCH 137/364] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#20598)

#### Why I did it
src/sonic-linux-kernel
```
* fe78170 - (HEAD -> master, origin/master, origin/HEAD) Disable AMD memory encryption (#438) (26 hours ago) [Samuel Angebault]
* b8cdf9e - Add arm64 dts and xmc spi device for Wistron platform support (#433) (30 hours ago) [Owen]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index 6d0f01bb20eb..fe78170347f9 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit 6d0f01bb20eb4a7409d5c31c11a94d39a02c4d5b
+Subproject commit fe78170347f947f67828f94b75d3ff8e12f7fd43

From 8e0fb3052d82d2fc5a50f3bca9fe0d88074f183b Mon Sep 17 00:00:00 2001
From: Carmine Scarpitta <cscarpit@cisco.com>
Date: Fri, 25 Oct 2024 18:28:22 +0200
Subject: [PATCH 138/364] [FRR]: Fixing SRv6 SID uninstall (#20585)

This PR fixes the SRv6 SID uninstall introduced in this PR: #18715
This fix has been already merged in the FRR mainline: FRRouting/frr#16835

Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
---
 .../dplane_fpm_sonic/dplane_fpm_sonic.c       |  80 ++++---
 ...e-SID-structure-in-seg6local-nexthop.patch | 207 ++++++++++++++++++
 src/sonic-frr/patch/series                    |   1 +
 3 files changed, 247 insertions(+), 41 deletions(-)
 create mode 100644 src/sonic-frr/patch/bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch

diff --git a/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c b/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c
index c87a913acb1c..f01c647d4a67 100644
--- a/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c
+++ b/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c
@@ -1022,6 +1022,45 @@ static ssize_t netlink_srv6_localsid_msg_encode(int cmd,
 			(cmd == RTM_NEWSRV6LOCALSID) ? "RTM_NEWSRV6LOCALSID" : "RTM_DELSRV6LOCALSID", p, dplane_ctx_get_vrf(ctx),
 			table_id);
 
+	seg6local_ctx = &nexthop->nh_srv6->seg6local_ctx;
+
+	nest =
+		nl_attr_nest(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_FORMAT);
+
+	if (nexthop->nh_srv6->seg6local_ctx.block_len)
+		if (!nl_attr_put8(
+				&req->n, datalen, 
+				FPM_SRV6_LOCALSID_FORMAT_BLOCK_LEN,
+				nexthop->nh_srv6->seg6local_ctx.block_len))
+			return -1;
+
+	if (nexthop->nh_srv6->seg6local_ctx.node_len)
+		if (!nl_attr_put8(
+				&req->n, datalen, 
+				FPM_SRV6_LOCALSID_FORMAT_NODE_LEN,
+				nexthop->nh_srv6->seg6local_ctx.node_len))
+			return -1;
+
+	if (nexthop->nh_srv6->seg6local_ctx.function_len)
+		if (!nl_attr_put8(
+				&req->n, datalen, 
+				FPM_SRV6_LOCALSID_FORMAT_FUNC_LEN,
+				nexthop->nh_srv6->seg6local_ctx.function_len))
+			return -1;
+
+	if (nexthop->nh_srv6->seg6local_ctx.argument_len)
+		if (!nl_attr_put8(
+				&req->n, datalen, 
+				FPM_SRV6_LOCALSID_FORMAT_ARG_LEN,
+				nexthop->nh_srv6->seg6local_ctx.argument_len))
+			return -1;
+
+	nl_attr_nest_end(&req->n, nest);
+
+	if (cmd == RTM_DELSRV6LOCALSID)
+		return NLMSG_ALIGN(req->n.nlmsg_len);
+
 	for (ALL_LIST_ELEMENTS_RO(srv6->locators, node, l)) {
 		if (prefix_match(&l->prefix, p)) {
 			locator = l;
@@ -1029,47 +1068,6 @@ static ssize_t netlink_srv6_localsid_msg_encode(int cmd,
 		}
 	}
 
-	if (locator) {
-		nest =
-			nl_attr_nest(&req->n, datalen, 
-						FPM_SRV6_LOCALSID_FORMAT);
-
-		if (locator->block_bits_length)
-			if (!nl_attr_put8(
-					&req->n, datalen, 
-					FPM_SRV6_LOCALSID_FORMAT_BLOCK_LEN,
-					locator->block_bits_length))
-				return -1;
-
-		if (locator->node_bits_length)
-			if (!nl_attr_put8(
-					&req->n, datalen, 
-					FPM_SRV6_LOCALSID_FORMAT_NODE_LEN,
-					locator->node_bits_length))
-				return -1;
-
-		if (locator->function_bits_length)
-			if (!nl_attr_put8(
-					&req->n, datalen, 
-					FPM_SRV6_LOCALSID_FORMAT_FUNC_LEN,
-					locator->function_bits_length))
-				return -1;
-
-		if (locator->argument_bits_length)
-			if (!nl_attr_put8(
-					&req->n, datalen, 
-					FPM_SRV6_LOCALSID_FORMAT_ARG_LEN,
-					locator->argument_bits_length))
-				return -1;
-
-		nl_attr_nest_end(&req->n, nest);
-	}
-
-	if (cmd == RTM_DELSRV6LOCALSID)
-		return NLMSG_ALIGN(req->n.nlmsg_len);
-
-	seg6local_ctx = &nexthop->nh_srv6->seg6local_ctx;
-
 	switch (nexthop->nh_srv6->seg6local_action) {
 	case ZEBRA_SEG6_LOCAL_ACTION_END:
 		action = (locator && CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ? FPM_SRV6_LOCALSID_ACTION_UN : FPM_SRV6_LOCALSID_ACTION_END;
diff --git a/src/sonic-frr/patch/bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch b/src/sonic-frr/patch/bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch
new file mode 100644
index 000000000000..161a0454b3c5
--- /dev/null
+++ b/src/sonic-frr/patch/bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch
@@ -0,0 +1,207 @@
+From 8b9b9549e6d2785d4237ddb510d285aba022bb68 Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Sun, 15 Sep 2024 17:23:34 +0200
+Subject: [PATCH 1/5] lib: Include SID structure in seg6local nexthop
+
+Include SID structure information in seg6local nexthop data structure.
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ lib/srv6.h | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/lib/srv6.h b/lib/srv6.h
+index acfb0631cc..3749b01563 100644
+--- a/lib/srv6.h
++++ b/lib/srv6.h
+@@ -72,6 +72,10 @@ struct seg6local_context {
+ 	struct in_addr nh4;
+ 	struct in6_addr nh6;
+ 	uint32_t table;
++	uint8_t block_len;
++	uint8_t node_len;
++	uint8_t function_len;
++	uint8_t argument_len;
+ };
+ 
+ struct srv6_locator {
+-- 
+2.45.2
+
+
+From ebea171cadaae63d89c41fdd5e4d507cf9084e42 Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Sun, 15 Sep 2024 18:53:35 +0200
+Subject: [PATCH 2/5] bgpd: Include structure when installing End.DT4/6 SID
+
+Include SID structure information when installing an SRv6 End.DT6 or End.DT4 SID
+in the forwarding plane.
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ bgpd/bgp_mplsvpn.c | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+diff --git a/bgpd/bgp_mplsvpn.c b/bgpd/bgp_mplsvpn.c
+index 2af553d982..b9eef35812 100644
+--- a/bgpd/bgp_mplsvpn.c
++++ b/bgpd/bgp_mplsvpn.c
+@@ -393,6 +393,18 @@ void vpn_leak_zebra_vrf_sid_update_per_af(struct bgp *bgp, afi_t afi)
+ 	if (!vrf)
+ 		return;
+ 
++	if (bgp->vpn_policy[afi].tovpn_sid_locator) {
++		ctx.block_len =
++			bgp->vpn_policy[afi].tovpn_sid_locator->block_bits_length;
++		ctx.node_len =
++			bgp->vpn_policy[afi].tovpn_sid_locator->node_bits_length;
++		ctx.function_len =
++			bgp->vpn_policy[afi]
++				.tovpn_sid_locator->function_bits_length;
++		ctx.argument_len =
++			bgp->vpn_policy[afi]
++				.tovpn_sid_locator->argument_bits_length;
++	}
+ 	ctx.table = vrf->data.l.table_id;
+ 	act = afi == AFI_IP ? ZEBRA_SEG6_LOCAL_ACTION_END_DT4
+ 		: ZEBRA_SEG6_LOCAL_ACTION_END_DT6;
+-- 
+2.45.2
+
+
+From f5c7cf0edc25905d357effe54ece27ed5db0ae6b Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Sun, 15 Sep 2024 18:54:55 +0200
+Subject: [PATCH 3/5] bgpd: Include structure when installing End.DT46 SID
+
+Include SID structure information when installing an SRv6 End.DT46 SID
+in the forwarding plane.
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ bgpd/bgp_mplsvpn.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/bgpd/bgp_mplsvpn.c b/bgpd/bgp_mplsvpn.c
+index b9eef35812..005a54ec1b 100644
+--- a/bgpd/bgp_mplsvpn.c
++++ b/bgpd/bgp_mplsvpn.c
+@@ -453,6 +453,12 @@ void vpn_leak_zebra_vrf_sid_update_per_vrf(struct bgp *bgp)
+ 	if (!vrf)
+ 		return;
+ 
++	if (bgp->tovpn_sid_locator) {
++		ctx.block_len = bgp->tovpn_sid_locator->block_bits_length;
++		ctx.node_len = bgp->tovpn_sid_locator->node_bits_length;
++		ctx.function_len = bgp->tovpn_sid_locator->function_bits_length;
++		ctx.argument_len = bgp->tovpn_sid_locator->argument_bits_length;
++	}
+ 	ctx.table = vrf->data.l.table_id;
+ 	act = ZEBRA_SEG6_LOCAL_ACTION_END_DT46;
+ 	zclient_send_localsid(zclient, tovpn_sid, bgp->vrf_id, act, &ctx);
+-- 
+2.45.2
+
+
+From e2428a573321cb5909a3858008df2968b655a086 Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Sun, 15 Sep 2024 18:56:21 +0200
+Subject: [PATCH 4/5] bgpd: Include structure when removing End.DT4/6 SID
+
+Include SID structure information when removing an SRv6 End.DT4 or End.DT6 SID
+from the forwarding plane.
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ bgpd/bgp_mplsvpn.c | 18 ++++++++++++++++--
+ 1 file changed, 16 insertions(+), 2 deletions(-)
+
+diff --git a/bgpd/bgp_mplsvpn.c b/bgpd/bgp_mplsvpn.c
+index 005a54ec1b..aba1b4febe 100644
+--- a/bgpd/bgp_mplsvpn.c
++++ b/bgpd/bgp_mplsvpn.c
+@@ -495,6 +495,7 @@ void vpn_leak_zebra_vrf_sid_update(struct bgp *bgp, afi_t afi)
+ void vpn_leak_zebra_vrf_sid_withdraw_per_af(struct bgp *bgp, afi_t afi)
+ {
+ 	int debug = BGP_DEBUG(vpn, VPN_LEAK_LABEL);
++	struct seg6local_context seg6localctx = {};
+ 
+ 	if (bgp->vrf_id == VRF_UNKNOWN) {
+ 		if (debug)
+@@ -507,9 +508,22 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_af(struct bgp *bgp, afi_t afi)
+ 		zlog_debug("%s: deleting sid for vrf %s afi (id=%d)", __func__,
+ 			   bgp->name_pretty, bgp->vrf_id);
+ 
++	if (bgp->vpn_policy[afi].tovpn_sid_locator) {
++		seg6localctx.block_len =
++			bgp->vpn_policy[afi].tovpn_sid_locator->block_bits_length;
++		seg6localctx.node_len =
++			bgp->vpn_policy[afi].tovpn_sid_locator->node_bits_length;
++		seg6localctx.function_len =
++			bgp->vpn_policy[afi]
++				.tovpn_sid_locator->function_bits_length;
++		seg6localctx.argument_len =
++			bgp->vpn_policy[afi]
++				.tovpn_sid_locator->argument_bits_length;
++	}
+ 	zclient_send_localsid(zclient,
+-		bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent,
+-		bgp->vrf_id, ZEBRA_SEG6_LOCAL_ACTION_UNSPEC, NULL);
++			      bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent,
++			      bgp->vrf_id, ZEBRA_SEG6_LOCAL_ACTION_UNSPEC,
++			      &seg6localctx);
+ 	XFREE(MTYPE_BGP_SRV6_SID,
+ 	      bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent);
+ }
+-- 
+2.45.2
+
+
+From 8d148b738cdf8b987a67e13979331d91337494f3 Mon Sep 17 00:00:00 2001
+From: Carmine Scarpitta <cscarpit@cisco.com>
+Date: Sun, 15 Sep 2024 18:56:48 +0200
+Subject: [PATCH 5/5] bgpd: Include structure when removing End.DT46 SID
+
+Include SID structure information when removing an SRv6 End.DT46 SID
+from the forwarding plane.
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ bgpd/bgp_mplsvpn.c | 12 +++++++++++-
+ 1 file changed, 11 insertions(+), 1 deletion(-)
+
+diff --git a/bgpd/bgp_mplsvpn.c b/bgpd/bgp_mplsvpn.c
+index aba1b4febe..6589f3e388 100644
+--- a/bgpd/bgp_mplsvpn.c
++++ b/bgpd/bgp_mplsvpn.c
+@@ -535,6 +535,7 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_af(struct bgp *bgp, afi_t afi)
+ void vpn_leak_zebra_vrf_sid_withdraw_per_vrf(struct bgp *bgp)
+ {
+ 	int debug = BGP_DEBUG(vpn, VPN_LEAK_LABEL);
++	struct seg6local_context seg6localctx = {};
+ 
+ 	if (bgp->vrf_id == VRF_UNKNOWN) {
+ 		if (debug)
+@@ -548,9 +549,18 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_vrf(struct bgp *bgp)
+ 		zlog_debug("%s: deleting sid for vrf %s (id=%d)", __func__,
+ 			   bgp->name_pretty, bgp->vrf_id);
+ 
++	if (bgp->tovpn_sid_locator) {
++		seg6localctx.block_len =
++			bgp->tovpn_sid_locator->block_bits_length;
++		seg6localctx.node_len = bgp->tovpn_sid_locator->node_bits_length;
++		seg6localctx.function_len =
++			bgp->tovpn_sid_locator->function_bits_length;
++		seg6localctx.argument_len =
++			bgp->tovpn_sid_locator->argument_bits_length;
++	}
+ 	zclient_send_localsid(zclient, bgp->tovpn_zebra_vrf_sid_last_sent,
+ 			      bgp->vrf_id, ZEBRA_SEG6_LOCAL_ACTION_UNSPEC,
+-			      NULL);
++			      &seg6localctx);
+ 	XFREE(MTYPE_BGP_SRV6_SID, bgp->tovpn_zebra_vrf_sid_last_sent);
+ }
+ 
+-- 
+2.45.2
+
diff --git a/src/sonic-frr/patch/series b/src/sonic-frr/patch/series
index c14a56f5b10f..0cb3259b47d9 100644
--- a/src/sonic-frr/patch/series
+++ b/src/sonic-frr/patch/series
@@ -52,3 +52,4 @@
 0052-bgpd-backpressure-log-error-for-evpn-when-route-inst.patch
 0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch
 build-dplane-fpm-sonic-module.patch
+bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch

From 16c98c028ef8f4ddeffba860b2700af921d967f9 Mon Sep 17 00:00:00 2001
From: Philo <135693886+philo-micas@users.noreply.github.com>
Date: Sat, 26 Oct 2024 01:33:02 +0800
Subject: [PATCH 139/364] [Micas/Platform]platform support M2-W6520-24DC8QC
 (#20553)

* [Micas/Platform]platform support M2-W6920-32QC2X

Signed-off-by: philo <philo@micasnetworks.com>

* update platform files

Signed-off-by: philo <philo@micasnetworks.com>

* fix Semgrep

Signed-off-by: philo <philo@micasnetworks.com>

* Update control

---------

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../M2-W6520-24DC8QC/hwsku.json               |  100 +
 .../M2-W6520-24DC8QC/port_config.ini          |   33 +
 .../M2-W6520-24DC8QC/sai.profile              |    1 +
 ...m2-w6520-24dc8qc-24x200G+8x400G-copper.yml | 4114 +++++++++++++++
 .../td4-m2-w6520-24dc8qc-24x200G+8x400G.yml   | 4125 +++++++++++++++
 .../x86_64-micas_m2-w6520-24dc8qc-r0/cpu.cint |   85 +
 .../custom_led.bin                            |  Bin 0 -> 716 bytes
 .../default_sku                               |    1 +
 .../x86_64-micas_m2-w6520-24dc8qc-r0/dev.xml  |  371 ++
 .../x86_64-micas_m2-w6520-24dc8qc-r0/fru.py   |  961 ++++
 .../hwsku.json                                |  100 +
 .../installer.conf                            |    2 +
 .../media_settings.json                       | 1476 ++++++
 .../monitor.py                                |  402 ++
 .../pcie.yaml                                 |  581 +++
 .../platform.json                             | 1010 ++++
 .../platform_asic                             |    1 +
 .../platform_components.json                  |   16 +
 .../platform_env.conf                         |    2 +
 .../plugins/sfputil.py                        |  365 ++
 .../plugins/ssd_util.py                       |  318 ++
 .../pmon_daemon_control.json                  |    3 +
 .../postinit_cmd_file.soc                     |    7 +
 .../system_health_monitoring_config.json      |    0
 platform/broadcom/one-image.mk                |    3 +-
 platform/broadcom/platform-modules-micas.mk   |    8 +
 .../common/app/dev_util/dfd_debug.c           |   20 +
 .../common/app/dev_util/dfd_utest.c           |   23 +-
 .../common/app/dev_util/dfd_utest.h           |   21 +-
 .../app/fw_upgrade/fw_upgrade/fw_upgrade.c    |   20 +
 .../fw_upgrade/fw_upgrade/fw_upgrade_debug.c  |   20 +
 .../fw_upgrade/include/fw_upgrade.h           |   20 +
 .../fw_upgrade/include/fw_upgrade_debug.h     |   20 +
 .../common/lib/algorithm/hysteresis.py        |   16 +
 .../common/lib/algorithm/openloop.py          |   16 +
 .../common/lib/algorithm/pid.py               |   16 +
 .../common/lib/eepromutil/cust_fru.py         |   17 +-
 .../common/lib/eepromutil/fantlv.py           |   44 +-
 .../common/lib/eepromutil/fru.py              |   55 +-
 .../common/lib/eepromutil/onietlv.py          |   32 +-
 .../common/lib/eepromutil/wedge.py            |  418 ++
 .../common/lib/eepromutil/wedge_v5.py         |  591 +++
 .../common/lib/plat_hal/baseutil.py           |   18 +-
 .../common/lib/plat_hal/chassisbase.py        |  120 +-
 .../common/lib/plat_hal/component.py          |   18 +-
 .../common/lib/plat_hal/cpld.py               |   18 +-
 .../common/lib/plat_hal/cpu.py                |   17 +-
 .../common/lib/plat_hal/dcdc.py               |   25 +-
 .../common/lib/plat_hal/devicebase.py         |   37 +-
 .../common/lib/plat_hal/fan.py                |  126 +-
 .../common/lib/plat_hal/interface.py          |   49 +-
 .../common/lib/plat_hal/led.py                |   24 +-
 .../common/lib/plat_hal/onie_e2.py            |   18 +-
 .../common/lib/plat_hal/osutil.py             |   50 +-
 .../common/lib/plat_hal/psu.py                |   20 +-
 .../common/lib/plat_hal/rotor.py              |   22 +-
 .../common/lib/plat_hal/sensor.py             |   84 +-
 .../common/lib/plat_hal/temp.py               |   47 +-
 .../common/lib/restful_util/restful_api.py    |   23 +-
 .../common/lib/wbutil/baseutil.py             |   16 +
 .../common/lib/wbutil/smbus.py                |   30 +-
 .../common/modules/Makefile                   |    7 +
 .../common/modules/ct7148.c                   |  237 +
 .../common/modules/dfd_tlveeprom.c            |   37 +-
 .../common/modules/dfd_tlveeprom.h            |   20 +
 .../common/modules/fpga_i2c.h                 |   20 +
 .../common/modules/hw_test.c                  |   20 +-
 .../common/modules/hw_test.h                  |   19 +
 .../common/modules/pinctrl/core.h             |   21 +-
 .../common/modules/pinctrl/wb_gpio_c3000.c    |   20 +-
 .../modules/pinctrl/wb_gpio_c3000_device.c    |   20 +
 .../common/modules/pinctrl/wb_pinctrl_intel.c |   22 +-
 .../common/modules/pinctrl/wb_pinctrl_intel.h |   22 +-
 .../modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c  |   20 +
 .../plat_sysfs/dev_cfg/cfg/dfd_cfg_adapter.c  |   20 +
 .../plat_sysfs/dev_cfg/cfg/dfd_cfg_file.c     |   20 +
 .../plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c     |   39 +
 .../plat_sysfs/dev_cfg/cfg/dfd_cfg_listnode.c |   20 +
 .../plat_sysfs/dev_cfg/dfd_fan_driver.c       |   20 +
 .../modules/plat_sysfs/dev_cfg/dfd_module.c   |   20 +
 .../plat_sysfs/dev_cfg/dfd_psu_driver.c       |   20 +
 .../plat_sysfs/dev_cfg/dfd_sensors_driver.c   |   20 +
 .../plat_sysfs/dev_cfg/dfd_sff_driver.c       |   20 +
 .../plat_sysfs/dev_cfg/dfd_slot_driver.c      |   20 +
 .../plat_sysfs/dev_cfg/include/dfd_cfg.h      |   20 +
 .../dev_cfg/include/dfd_cfg_adapter.h         |   20 +
 .../plat_sysfs/dev_cfg/include/dfd_cfg_file.h |   20 +
 .../plat_sysfs/dev_cfg/include/dfd_cfg_info.h |   23 +-
 .../dev_cfg/include/dfd_cfg_listnode.h        |   20 +
 .../dev_cfg/include/dfd_fan_driver.h          |   20 +
 .../plat_sysfs/dev_cfg/include/dfd_module.h   |   20 +
 .../dev_cfg/include/dfd_psu_driver.h          |   20 +
 .../dev_cfg/include/dfd_sensors_driver.h      |   20 +
 .../dev_cfg/include/dfd_sff_driver.h          |   20 +
 .../dev_cfg/include/dfd_slot_driver.h         |   20 +
 .../dev_sysfs/include/plat_switch.h           |   20 +
 .../dev_sysfs/include/sysfs_common.h          |   20 +
 .../modules/plat_sysfs/dev_sysfs/plat_fan.c   |   17 +-
 .../modules/plat_sysfs/dev_sysfs/plat_psu.c   |   17 +-
 .../plat_sysfs/dev_sysfs/plat_sensor.c        |   18 +-
 .../modules/plat_sysfs/dev_sysfs/plat_sff.c   |   17 +-
 .../modules/plat_sysfs/dev_sysfs/plat_slot.c  |   17 +-
 .../plat_sysfs/dev_sysfs/plat_switch.c        |   20 +-
 .../common/modules/platform_common.h          |   20 +
 .../common/modules/platform_common_module.c   |   20 +
 .../common/modules/pmbus.h                    |   20 +-
 .../common/modules/s3ip_sysfs/Makefile        |   19 +
 .../modules/s3ip_sysfs/device_driver/Makefile |   36 +
 .../device_driver/cpld_device_driver.c        |  217 +
 .../device_driver/curr_sensor_device_driver.c |  220 +
 .../device_driver/eeprom_device_driver.c      |  209 +
 .../device_driver/fan_device_driver.c         |  542 ++
 .../device_driver/fpga_device_driver.c        |  216 +
 .../include/device_driver_common.h            |   69 +
 .../device_driver/psu_device_driver.c         | 1025 ++++
 .../device_driver/slot_device_driver.c        | 1100 ++++
 .../device_driver/syseeprom_device_driver.c   |  136 +
 .../device_driver/sysled_device_driver.c      |  240 +
 .../device_driver/system_device_driver.c      |  109 +
 .../device_driver/temp_sensor_device_driver.c |  275 +
 .../device_driver/transceiver_device_driver.c |  481 ++
 .../device_driver/vol_sensor_device_driver.c  |  267 +
 .../device_driver/watchdog_device_driver.c    |  214 +
 .../modules/s3ip_sysfs/switch_driver/Makefile |   35 +
 .../s3ip_sysfs/switch_driver/cfg/dfd_cfg.c    | 1169 +++++
 .../switch_driver/cfg/dfd_cfg_adapter.c       |  654 +++
 .../switch_driver/cfg/dfd_cfg_file.c          |  305 ++
 .../switch_driver/cfg/dfd_cfg_info.c          |  929 ++++
 .../switch_driver/cfg/dfd_cfg_listnode.c      |  133 +
 .../switch_driver/cfg/dfd_frueeprom.c         |  534 ++
 .../switch_driver/cfg/dfd_tlveeprom.c         |  469 ++
 .../switch_driver/include/dfd_cfg.h           |  247 +
 .../switch_driver/include/dfd_cfg_adapter.h   |  136 +
 .../switch_driver/include/dfd_cfg_file.h      |  101 +
 .../switch_driver/include/dfd_cfg_info.h      |  192 +
 .../switch_driver/include/dfd_cfg_listnode.h  |   80 +
 .../switch_driver/include/dfd_frueeprom.h     |  107 +
 .../switch_driver/include/dfd_sysfs_common.h  |  251 +
 .../switch_driver/include/dfd_tlveeprom.h     |   91 +
 .../switch_driver/include/switch_driver.h     |  101 +
 .../switch_driver/include/wb_cpld_driver.h    |  100 +
 .../switch_driver/include/wb_eeprom_driver.h  |   59 +
 .../switch_driver/include/wb_fan_driver.h     |  191 +
 .../switch_driver/include/wb_fpga_driver.h    |  100 +
 .../switch_driver/include/wb_led_driver.h     |   45 +
 .../switch_driver/include/wb_module.h         |  360 ++
 .../switch_driver/include/wb_psu_driver.h     |  114 +
 .../switch_driver/include/wb_sensors_driver.h |   82 +
 .../switch_driver/include/wb_sff_driver.h     |   63 +
 .../switch_driver/include/wb_slot_driver.h    |   64 +
 .../switch_driver/include/wb_system_driver.h  |   33 +
 .../include/wb_watchdog_driver.h              |   37 +
 .../s3ip_sysfs/switch_driver/switch_driver.c  | 4577 +++++++++++++++++
 .../s3ip_sysfs/switch_driver/wb_cpld_driver.c |  274 +
 .../switch_driver/wb_eeprom_driver.c          |  230 +
 .../s3ip_sysfs/switch_driver/wb_fan_driver.c  | 1093 ++++
 .../s3ip_sysfs/switch_driver/wb_fpga_driver.c |  341 ++
 .../s3ip_sysfs/switch_driver/wb_led_driver.c  |  133 +
 .../s3ip_sysfs/switch_driver/wb_module.c      |   73 +
 .../s3ip_sysfs/switch_driver/wb_psu_driver.c  |  950 ++++
 .../switch_driver/wb_sensors_driver.c         |  345 ++
 .../s3ip_sysfs/switch_driver/wb_sff_driver.c  |  143 +
 .../s3ip_sysfs/switch_driver/wb_slot_driver.c |  174 +
 .../switch_driver/wb_system_driver.c          |  253 +
 .../switch_driver/wb_watchdog_driver.c        |  217 +
 .../modules/s3ip_sysfs/sysfs_driver/Makefile  |   34 +
 .../s3ip_sysfs/sysfs_driver/cpld_sysfs.c      |  444 ++
 .../sysfs_driver/curr_sensor_sysfs.c          |  385 ++
 .../s3ip_sysfs/sysfs_driver/eeprom_sysfs.c    |  417 ++
 .../s3ip_sysfs/sysfs_driver/fan_sysfs.c       |  777 +++
 .../s3ip_sysfs/sysfs_driver/fpga_sysfs.c      |  345 ++
 .../sysfs_driver/include/cpld_sysfs.h         |   36 +
 .../sysfs_driver/include/curr_sensor_sysfs.h  |   38 +
 .../sysfs_driver/include/eeprom_sysfs.h       |   36 +
 .../sysfs_driver/include/fan_sysfs.h          |   53 +
 .../sysfs_driver/include/fpga_sysfs.h         |   36 +
 .../sysfs_driver/include/psu_sysfs.h          |   73 +
 .../sysfs_driver/include/slot_sysfs.h         |   80 +
 .../s3ip_sysfs/sysfs_driver/include/switch.h  |   96 +
 .../sysfs_driver/include/syseeprom_sysfs.h    |   32 +
 .../sysfs_driver/include/sysled_sysfs.h       |   39 +
 .../sysfs_driver/include/system_sysfs.h       |   54 +
 .../sysfs_driver/include/temp_sensor_sysfs.h  |   42 +
 .../sysfs_driver/include/transceiver_sysfs.h  |   50 +
 .../sysfs_driver/include/vol_sensor_sysfs.h   |   40 +
 .../sysfs_driver/include/watchdog_sysfs.h     |   36 +
 .../s3ip_sysfs/sysfs_driver/psu_sysfs.c       | 1180 +++++
 .../s3ip_sysfs/sysfs_driver/slot_sysfs.c      | 1955 +++++++
 .../modules/s3ip_sysfs/sysfs_driver/switch.c  |  309 ++
 .../s3ip_sysfs/sysfs_driver/sysled_sysfs.c    |  289 ++
 .../s3ip_sysfs/sysfs_driver/system_sysfs.c    |  218 +
 .../sysfs_driver/temp_sensor_sysfs.c          |  458 ++
 .../sysfs_driver/transceiver_sysfs.c          |  996 ++++
 .../sysfs_driver/vol_sensor_sysfs.c           |  416 ++
 .../s3ip_sysfs/sysfs_driver/watchdog_sysfs.c  |  241 +
 .../common/modules/wb_csu550.c                |   19 +-
 .../common/modules/wb_fpga_i2c_bus_drv.c      |   29 +-
 .../common/modules/wb_fpga_pca954x_drv.c      |   29 +-
 .../common/modules/wb_fpga_pcie.c             |   20 +-
 .../common/modules/wb_gpio_d1500.c            |   22 +-
 .../common/modules/wb_gpio_device.c           |   20 +
 .../common/modules/wb_i2c_dev.c               |   36 +-
 .../common/modules/wb_i2c_dev.h               |   20 +
 .../common/modules/wb_i2c_gpio_device.c       |   20 +
 .../common/modules/wb_i2c_mux_pca954x.c       |   35 +-
 .../common/modules/wb_i2c_mux_pca954x.h       |   20 +
 .../common/modules/wb_i2c_mux_pca9641.c       |   24 +-
 .../common/modules/wb_i2c_mux_pca9641.h       |   20 +
 .../common/modules/wb_i2c_ocores.c            |   21 +-
 .../common/modules/wb_i2c_ocores.h            |   20 +
 .../common/modules/wb_indirect_dev.c          |  869 ++++
 .../common/modules/wb_indirect_dev.h          |   54 +
 .../common/modules/wb_io_dev.c                |  141 +-
 .../common/modules/wb_io_dev.h                |   26 +
 .../common/modules/wb_lpc_drv.c               |   20 +-
 .../common/modules/wb_lpc_drv.h               |   20 +
 .../common/modules/wb_mac_bsc.c               |    3 +-
 .../common/modules/wb_mdio_gpio_device.c      |   20 +
 .../common/modules/wb_pcie_dev.c              |  142 +-
 .../common/modules/wb_pcie_dev.h              |   24 +
 .../common/modules/wb_platform_i2c_dev.c      |   20 +
 .../common/modules/wb_platform_i2c_dev.h      |   20 +
 .../common/modules/wb_spi_dev.c               |   35 +-
 .../common/modules/wb_spi_dev.h               |   20 +
 .../common/modules/wb_spi_gpio_device.c       |   20 +
 .../common/modules/wb_spi_ocores.c            |   56 +-
 .../common/modules/wb_spi_ocores.h            |   21 +
 .../common/modules/wb_ucd9081.c               |  356 ++
 .../common/modules/wb_uio_irq.c               |   20 +
 .../common/modules/wb_wdt.c                   |   75 +-
 .../common/modules/wb_wdt.h                   |   20 +
 .../common/modules/wb_xdpe132g5c.c            |   21 +-
 .../common/modules/wb_xdpe132g5c_pmbus.c      |   20 +
 .../common/script/auto_update.py              |   15 +
 .../common/script/avscontrol.py               |   18 +-
 .../common/script/cpodaemon.sh                |   99 +
 .../common/script/dev_monitor.py              |   16 +
 .../common/script/drv_update.py               |   17 +-
 .../common/script/generate_airflow.py         |   17 +-
 .../common/script/hal_fanctrl.py              |   16 +
 .../common/script/hal_ledctrl.py              |  208 +-
 .../common/script/hal_pltfm.py                |   20 +-
 .../common/script/intelligent_monitor.py      |   55 +-
 .../script/intelligent_monitor/monitor_fan.py |   16 +-
 .../common/script/platform_common.py          |   27 +-
 .../common/script/platform_config.py          |   27 +-
 .../common/script/platform_driver.py          |   22 +-
 .../common/script/platform_e2.py              |  775 ++-
 .../common/script/platform_intf.py            |   16 +
 .../common/script/platform_ipmi.py            |   17 +-
 .../common/script/platform_manufacturer.py    |   36 +-
 .../common/script/platform_power.py           |  111 +
 .../common/script/platform_process.py         |   16 +
 .../common/script/platform_sensors.py         |   26 +
 .../common/script/platform_sensors_hal.py     |  280 +
 .../common/script/platform_test.py            |   16 +-
 .../common/script/platform_util.py            |   75 +-
 .../common/script/pmon_syslog.py              |   20 +-
 .../common/script/power_ctrl.py               |  333 ++
 .../common/script/reboot_cause.py             |   25 +-
 .../common/script/reboot_ctrl.py              |  150 -
 .../common/script/sensors                     |   17 +-
 .../common/script/set_eth_mac.py              |   17 +-
 .../common/script/sfp_highest_temperatue.py   |  168 +-
 .../common/script/slot_monitor.py             |   17 +-
 .../common/script/ssdmon                      |   16 +-
 .../common/script/subnetwork.py               |   17 +-
 .../common/script/tty_console.py              |   16 +-
 .../common/script/upgrade.py                  |   31 +-
 .../common/script/warm_upgrade.py             |   20 +-
 .../common/sonic_platform/chassis.py          |   19 +-
 .../common/sonic_platform/component.py        |   19 +-
 .../common/sonic_platform/dcdc.py             |   19 +-
 .../common/sonic_platform/eeprom.py           |   23 +-
 .../common/sonic_platform/fan_drawer.py       |   16 +-
 .../common/sonic_platform/pcie.py             |   19 +-
 .../common/sonic_platform/platform.py         |   18 +-
 .../common/sonic_platform/psu.py              |   17 +-
 .../common/sonic_platform/sfp.py              |  351 +-
 .../common/sonic_platform/watchdog.py         |   17 +-
 .../debian/control                            |    6 +-
 ...orm-modules-micas-m2-w6520-24dc8qc.install |    1 +
 ...rm-modules-micas-m2-w6520-24dc8qc.postinst |   10 +
 .../debian/rule.mk                            |    1 +
 .../m2-w6520-24dc8qc/Makefile                 |   25 +
 ...x86_64_micas_m2_w6520_24dc8qc_r0_config.py | 1424 +++++
 ...4_micas_m2_w6520_24dc8qc_r0_port_config.py |    7 +
 ...x86_64_micas_m2_w6520_24dc8qc_r0_device.py | 1190 +++++
 ...86_64_micas_m2_w6520_24dc8qc_r0_monitor.py |  207 +
 .../m2-w6520-24dc8qc/modules/driver/Makefile  |   12 +
 .../modules/driver/wb_fpga_i2c_bus_device.c   |  874 ++++
 .../modules/driver/wb_fpga_pca954x_device.c   |  329 ++
 .../modules/driver/wb_i2c_dev_device.c        |  175 +
 .../modules/driver/wb_io_dev_device.c         |  138 +
 .../modules/driver/wb_lpc_drv_device.c        |  150 +
 .../modules/driver/wb_pcie_dev_device.c       |  113 +
 .../plat_sysfs_cfg/WB_PLAT_CPLD.cfg           |   37 +
 .../plat_sysfs_cfg/WB_PLAT_FAN.cfg            |  437 ++
 .../plat_sysfs_cfg/WB_PLAT_PSU.cfg            |   64 +
 .../plat_sysfs_cfg/WB_PLAT_SFF.cfg            |  383 ++
 .../plat_sysfs_cfg/cfg_file_name              |    4 +
 .../m2-w6520-24dc8qc/setup.py                 |   39 +
 302 files changed, 57953 insertions(+), 851 deletions(-)
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/hwsku.json
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/port_config.ini
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/sai.profile
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/td4-m2-w6520-24dc8qc-24x200G+8x400G-copper.yml
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/td4-m2-w6520-24dc8qc-24x200G+8x400G.yml
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/cpu.cint
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/custom_led.bin
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/default_sku
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/dev.xml
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/fru.py
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/hwsku.json
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/installer.conf
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/media_settings.json
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/monitor.py
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/pcie.yaml
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/platform.json
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/platform_asic
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/platform_components.json
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/platform_env.conf
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/plugins/sfputil.py
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/plugins/ssd_util.py
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/pmon_daemon_control.json
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/postinit_cmd_file.soc
 create mode 100644 device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/system_health_monitoring_config.json
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/wedge.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/wedge_v5.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/ct7148.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/cpld_device_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/curr_sensor_device_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/eeprom_device_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/fan_device_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/fpga_device_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/include/device_driver_common.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/psu_device_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/slot_device_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/syseeprom_device_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/sysled_device_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/system_device_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/temp_sensor_device_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/transceiver_device_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/vol_sensor_device_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/watchdog_device_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg_adapter.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg_file.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg_info.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg_listnode.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_frueeprom.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_tlveeprom.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg_adapter.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg_file.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg_info.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg_listnode.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_frueeprom.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_sysfs_common.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_tlveeprom.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/switch_driver.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_cpld_driver.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_eeprom_driver.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_fan_driver.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_fpga_driver.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_led_driver.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_module.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_psu_driver.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_sensors_driver.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_sff_driver.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_slot_driver.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_system_driver.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_watchdog_driver.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/switch_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_cpld_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_eeprom_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_fan_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_fpga_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_led_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_module.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_psu_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_sensors_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_sff_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_slot_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_system_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_watchdog_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/cpld_sysfs.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/curr_sensor_sysfs.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/eeprom_sysfs.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/fan_sysfs.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/fpga_sysfs.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/cpld_sysfs.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/curr_sensor_sysfs.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/eeprom_sysfs.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/fan_sysfs.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/fpga_sysfs.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/psu_sysfs.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/slot_sysfs.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/switch.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/syseeprom_sysfs.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/sysled_sysfs.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/system_sysfs.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/temp_sensor_sysfs.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/transceiver_sysfs.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/vol_sensor_sysfs.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/watchdog_sysfs.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/psu_sysfs.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/slot_sysfs.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/switch.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/sysled_sysfs.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/system_sysfs.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/temp_sensor_sysfs.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/transceiver_sysfs.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/vol_sensor_sysfs.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/watchdog_sysfs.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_indirect_dev.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_indirect_dev.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_ucd9081.c
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/cpodaemon.sh
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/platform_power.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors_hal.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/power_ctrl.py
 delete mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/reboot_ctrl.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.install
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.postinst
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/config/x86_64_micas_m2_w6520_24dc8qc_r0_config.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/config/x86_64_micas_m2_w6520_24dc8qc_r0_port_config.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/hal-config/x86_64_micas_m2_w6520_24dc8qc_r0_device.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/hal-config/x86_64_micas_m2_w6520_24dc8qc_r0_monitor.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_fpga_i2c_bus_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_fpga_pca954x_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_i2c_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_io_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_lpc_drv_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_pcie_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/plat_sysfs_cfg/cfg_file_name
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/setup.py

diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/hwsku.json b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/hwsku.json
new file mode 100644
index 000000000000..cadf2fb312eb
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/hwsku.json
@@ -0,0 +1,100 @@
+{
+    "interfaces": {
+        "Ethernet1": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet5": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet9": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet13": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet17": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet21": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet25": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet29": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet33": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet37": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet41": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet45": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet49": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet53": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet57": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet61": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet65": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet69": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet73": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet77": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet81": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet85": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet89": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet93": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet97": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet105": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet113": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet121": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet129": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet137": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet145": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet153": {
+            "default_brkout_mode": "1x400G"
+        }
+    }
+}
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/port_config.ini b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/port_config.ini
new file mode 100644
index 000000000000..1a166a9a8367
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/port_config.ini
@@ -0,0 +1,33 @@
+# name              lanes                                alias                     index      speed
+Ethernet1           25,26,27,28                          twoHundredGigE0/1         0          200000
+Ethernet5           29,30,31,32                          twoHundredGigE0/2         1          200000
+Ethernet9           41,42,43,44                          twoHundredGigE0/3         2          200000
+Ethernet13          45,46,47,48                          twoHundredGigE0/4         3          200000
+Ethernet17          49,50,51,52                          twoHundredGigE0/5         4          200000
+Ethernet21          53,54,55,56                          twoHundredGigE0/6         5          200000
+Ethernet25          57,58,59,60                          twoHundredGigE0/7         6          200000
+Ethernet29          61,62,63,64                          twoHundredGigE0/8         7          200000
+Ethernet33          9,10,11,12                           twoHundredGigE0/9         8          200000
+Ethernet37          13,14,15,16                          twoHundredGigE0/10        9          200000
+Ethernet41          17,18,19,20                          twoHundredGigE0/11        10         200000
+Ethernet45          21,22,23,24                          twoHundredGigE0/12        11         200000
+Ethernet49          81,82,83,84                          twoHundredGigE0/13        12         200000
+Ethernet53          85,86,87,88                          twoHundredGigE0/14        13         200000
+Ethernet57          89,90,91,92                          twoHundredGigE0/15        14         200000
+Ethernet61          93,94,95,96                          twoHundredGigE0/16        15         200000
+Ethernet65          97,98,99,100                         twoHundredGigE0/17        16         200000
+Ethernet69          101,102,103,104                      twoHundredGigE0/18        17         200000
+Ethernet73          137,138,139,140                      twoHundredGigE0/19        18         200000
+Ethernet77          141,142,143,144                      twoHundredGigE0/20        19         200000
+Ethernet81          145,146,147,148                      twoHundredGigE0/21        20         200000
+Ethernet85          149,150,151,152                      twoHundredGigE0/22        21         200000
+Ethernet89          153,154,155,156                      twoHundredGigE0/23        22         200000
+Ethernet93          157,158,159,160                      twoHundredGigE0/24        23         200000
+Ethernet97          1,2,3,4,5,6,7,8                      fourHundredGigE0/1        24         400000
+Ethernet105         33,34,35,36,37,38,39,40              fourHundredGigE0/2        25         400000
+Ethernet113         65,66,67,68,69,70,71,72              fourHundredGigE0/3        26         400000
+Ethernet121         73,74,75,76,77,78,79,80              fourHundredGigE0/4        27         400000
+Ethernet129         105,106,107,108,109,110,111,112      fourHundredGigE0/5        28         400000
+Ethernet137         113,114,115,116,117,118,119,120      fourHundredGigE0/6        29         400000
+Ethernet145         121,122,123,124,125,126,127,128      fourHundredGigE0/7        30         400000
+Ethernet153         129,130,131,132,133,134,135,136      fourHundredGigE0/8        31         400000
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/sai.profile b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/sai.profile
new file mode 100644
index 000000000000..4b3cbf7154af
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td4-m2-w6520-24dc8qc-24x200G+8x400G.yml
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/td4-m2-w6520-24dc8qc-24x200G+8x400G-copper.yml b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/td4-m2-w6520-24dc8qc-24x200G+8x400G-copper.yml
new file mode 100644
index 000000000000..8a7c7a7e9fbc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/td4-m2-w6520-24dc8qc-24x200G+8x400G-copper.yml
@@ -0,0 +1,4114 @@
+---
+bcm_device:
+    0:
+        global:
+            bcm_tunnel_term_compatible_mode: 1
+            vlan_flooding_l2mc_num_reserved: 2048
+            l3_alpm_template: 2
+            l3_alpm2_bnk_threshold: 100
+            uft_mode: 1
+            l3_enable: 1
+            l2_hitbit_enable: 0
+            pktio_mode: 1
+            warmboot_knet_shutdown_mode: 1
+            sai_optimized_mmu: 1
+            sai_pfc_defaults_disable: 1
+            sai_postinit_cmd_file: /usr/share/sonic/platform/postinit_cmd_file.soc
+...
+
+---
+bcm_device:
+    0:
+        port:
+            11:
+                dport_map_port: 1
+            12:
+                dport_map_port: 2
+            13:
+                dport_map_port: 3
+            14:
+                dport_map_port: 4
+            20:
+                dport_map_port: 5
+            21:
+                dport_map_port: 6
+            22:
+                dport_map_port: 7
+            23:
+                dport_map_port: 8
+            24:
+                dport_map_port: 9
+            25:
+                dport_map_port: 10
+            26:
+                dport_map_port: 11
+            27:
+                dport_map_port: 12
+            28:
+                dport_map_port: 13
+            29:
+                dport_map_port: 14
+            30:
+                dport_map_port: 15
+            31:
+                dport_map_port: 16
+            3:
+                dport_map_port: 17
+            4:
+                dport_map_port: 18
+            5:
+                dport_map_port: 19
+            6:
+                dport_map_port: 20
+            7:
+                dport_map_port: 21
+            8:
+                dport_map_port: 22
+            9:
+                dport_map_port: 23
+            10:
+                dport_map_port: 24
+            40:
+                dport_map_port: 25
+            41:
+                dport_map_port: 26
+            42:
+                dport_map_port: 27
+            43:
+                dport_map_port: 28
+            44:
+                dport_map_port: 29
+            45:
+                dport_map_port: 30
+            46:
+                dport_map_port: 31
+            47:
+                dport_map_port: 32
+            48:
+                dport_map_port: 33
+            49:
+                dport_map_port: 34
+            50:
+                dport_map_port: 35
+            51:
+                dport_map_port: 36
+            64:
+                dport_map_port: 37
+            65:
+                dport_map_port: 38
+            66:
+                dport_map_port: 39
+            67:
+                dport_map_port: 40
+            68:
+                dport_map_port: 41
+            69:
+                dport_map_port: 42
+            70:
+                dport_map_port: 43
+            71:
+                dport_map_port: 44
+            72:
+                dport_map_port: 45
+            73:
+                dport_map_port: 46
+            74:
+                dport_map_port: 47
+            75:
+                dport_map_port: 48
+            1:
+                dport_map_port: 49
+            2:
+                dport_map_port: 50
+            15:
+                dport_map_port: 51
+            16:
+                dport_map_port: 52
+            32:
+                dport_map_port: 53
+            33:
+                dport_map_port: 54
+            34:
+                dport_map_port: 55
+            35:
+                dport_map_port: 56
+            52:
+                dport_map_port: 57
+            53:
+                dport_map_port: 58
+            54:
+                dport_map_port: 59
+            55:
+                dport_map_port: 60
+            60:
+                dport_map_port: 61
+            61:
+                dport_map_port: 62
+            62:
+                dport_map_port: 63
+            63:
+                dport_map_port: 64
+...
+
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            # CORE CLOCK FREQUENCY
+            CORE_CLK_FREQ: CLK_1350MHZ
+            # PP CLOCK FREQUENCY
+            PP_CLK_FREQ: CLK_1350MHZ
+...
+
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x73510624
+                    RX_LANE_MAP: 0x46270513
+                    TX_POLARITY_FLIP: 0xa
+                    RX_POLARITY_FLIP: 0x17
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x52317046
+                    RX_LANE_MAP: 0x31247056
+                    TX_POLARITY_FLIP: 0x90
+                    RX_POLARITY_FLIP: 0x47
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x23104567
+                    RX_LANE_MAP: 0x64752310
+                    TX_POLARITY_FLIP: 0x29
+                    RX_POLARITY_FLIP: 0x5a
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x23104567
+                    RX_LANE_MAP: 0x64752310
+                    TX_POLARITY_FLIP: 0x29
+                    RX_POLARITY_FLIP: 0x5a
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x25047361
+                    RX_LANE_MAP: 0x10452736
+                    TX_POLARITY_FLIP: 0xf5
+                    RX_POLARITY_FLIP: 0xc0
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x45763210
+                    RX_LANE_MAP: 0x13026457
+                    TX_POLARITY_FLIP: 0xa
+                    RX_POLARITY_FLIP: 0xf9
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x45763210
+                    RX_LANE_MAP: 0x13026457
+                    TX_POLARITY_FLIP: 0xa
+                    RX_POLARITY_FLIP: 0xf9
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x45673210
+                    RX_LANE_MAP: 0x13026457
+                    TX_POLARITY_FLIP: 0x4a
+                    RX_POLARITY_FLIP: 0xf3
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x02476531
+                    RX_LANE_MAP: 0x05261734
+                    TX_POLARITY_FLIP: 0xdf
+                    RX_POLARITY_FLIP: 0x84
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x37065241
+                    RX_LANE_MAP: 0x04175263
+                    TX_POLARITY_FLIP: 0x36
+                    RX_POLARITY_FLIP: 0x39
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x54762301
+                    RX_LANE_MAP: 0x13025467
+                    TX_POLARITY_FLIP: 0x70
+                    RX_POLARITY_FLIP: 0x6f
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x73125046
+                    RX_LANE_MAP: 0x21437056
+                    TX_POLARITY_FLIP: 0x78
+                    RX_POLARITY_FLIP: 0x5c
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x32104567
+                    RX_LANE_MAP: 0x64572310
+                    TX_POLARITY_FLIP: 0xd6
+                    RX_POLARITY_FLIP: 0xad
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x03172465
+                    RX_LANE_MAP: 0x45173620
+                    TX_POLARITY_FLIP: 0xed
+                    RX_POLARITY_FLIP: 0x36
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x36175042
+                    RX_LANE_MAP: 0x04176253
+                    TX_POLARITY_FLIP: 0x10
+                    RX_POLARITY_FLIP: 0xfa
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x74615203
+                    RX_LANE_MAP: 0x51704236
+                    TX_POLARITY_FLIP: 0x5f
+                    RX_POLARITY_FLIP: 0x56
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x26374051
+                    RX_LANE_MAP: 0x37046251
+                    TX_POLARITY_FLIP: 0xaa
+                    RX_POLARITY_FLIP: 0x21
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x45672310
+                    RX_LANE_MAP: 0x32105476
+                    TX_POLARITY_FLIP: 0x15
+                    RX_POLARITY_FLIP: 0x92
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x70465321
+                    RX_LANE_MAP: 0x63107542
+                    TX_POLARITY_FLIP: 0xe6
+                    RX_POLARITY_FLIP: 0xf2
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x23015476
+                    RX_LANE_MAP: 0x64752301
+                    TX_POLARITY_FLIP: 0x50
+                    RX_POLARITY_FLIP: 0x6c
+...
+
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                # CPU port
+                PORT_ID: 0
+            :
+                PC_PHYS_PORT_ID: 0
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 3
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 5
+            :
+                PC_PHYS_PORT_ID: 13
+            ?
+                PORT_ID: 7
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 9
+            :
+                PC_PHYS_PORT_ID: 21
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 13
+            :
+                PC_PHYS_PORT_ID: 29
+            ?
+                PORT_ID: 15
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 20
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 45
+            ?
+                PORT_ID: 24
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 26
+            :
+                PC_PHYS_PORT_ID: 53
+            ?
+                PORT_ID: 28
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 30
+            :
+                PC_PHYS_PORT_ID: 61
+            ?
+                PORT_ID: 32
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 40
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 42
+            :
+                PC_PHYS_PORT_ID: 85
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 46
+            :
+                PC_PHYS_PORT_ID: 93
+            ?
+                PORT_ID: 48
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 50
+            :
+                PC_PHYS_PORT_ID: 101
+            ?
+                PORT_ID: 52
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 54
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 60
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 62
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 64
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 66
+            :
+                PC_PHYS_PORT_ID: 141
+            ?
+                PORT_ID: 68
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 70
+            :
+                PC_PHYS_PORT_ID: 149
+            ?
+                PORT_ID: 72
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 74
+            :
+                PC_PHYS_PORT_ID: 157
+
+...
+
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: 0
+            :
+                ENABLE: 1
+                SPEED: 10000
+                NUM_LANES: 1
+            ?
+                PORT_ID: [3, 5, 7, 9, 11, 13,
+                          20, 22, 24, 26, 28, 30,
+                          40, 42, 44, 46, 48, 50,
+                          64, 66, 68, 70, 72, 74]
+            :
+                ENABLE: 0
+                SPEED: 200000
+                FEC_MODE: PC_FEC_RS544_2XN
+                NUM_LANES: 4
+                LINK_TRAINING: 0
+                MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [1, 15, 32, 34, 52, 54, 60, 62]
+            :
+                ENABLE: 0
+                SPEED: 400000
+                FEC_MODE: PC_FEC_RS544_2XN
+                NUM_LANES: 8
+                LINK_TRAINING: 0
+                MAX_FRAME_SIZE: 9416
+
+...
+
+---
+device:
+    0:
+        TM_SCHEDULER_CONFIG:
+            NUM_MC_Q: NUM_MC_Q_4
+...
+
+---
+device:
+    0:
+        PC_TX_TAPS:
+            ?
+                PORT_ID: 11
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 11
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 11
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 11
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 13
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 13
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 13
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 13
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 20
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 20
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 20
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 20
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 22
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 22
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 22
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 22
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 24
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 24
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 24
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 24
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 26
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 24
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 26
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 26
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 26
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 24
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 28
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 24
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 28
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 28
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 24
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 28
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 30
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 24
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 30
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 24
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 30
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 30
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 24
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 3
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 3
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 3
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 3
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 5
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 5
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 5
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 5
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 7
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 7
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 7
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 24
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 7
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 9
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 9
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 9
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 24
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 9
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 40
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 40
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 24
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 40
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 24
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 40
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 24
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 42
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 42
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 42
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 24
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 42
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 44
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 24
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 44
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 24
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 44
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 24
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 44
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 24
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 46
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 46
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 46
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 46
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 48
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 24
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 48
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 24
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 48
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 24
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 48
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 24
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 50
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 50
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 24
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 50
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 50
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 64
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 64
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 64
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 64
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 66
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 66
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 66
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 66
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 68
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 68
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 68
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 68
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 70
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 70
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 70
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 70
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 72
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 72
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 72
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 72
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 74
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 74
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 74
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 74
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 15
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 15
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 15
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 15
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 15
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 15
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 15
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 15
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 32
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 32
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 32
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 32
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 32
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 32
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 32
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 32
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 52
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 52
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 52
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 52
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 52
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 52
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 52
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 52
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 54
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 54
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 54
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 54
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 54
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 54
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 54
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 54
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 60
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 60
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 60
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 60
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 60
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 60
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 60
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 60
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 62
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 62
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 62
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 62
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 62
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 62
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 62
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+            ?
+                PORT_ID: 62
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 28
+                TX_PRE_SIGN: 1
+                TX_PRE2: 6
+...
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/td4-m2-w6520-24dc8qc-24x200G+8x400G.yml b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/td4-m2-w6520-24dc8qc-24x200G+8x400G.yml
new file mode 100644
index 000000000000..779f4b79d1b9
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/M2-W6520-24DC8QC/td4-m2-w6520-24dc8qc-24x200G+8x400G.yml
@@ -0,0 +1,4125 @@
+---
+bcm_device:
+    0:
+        global:
+            bcm_tunnel_term_compatible_mode: 1
+            vlan_flooding_l2mc_num_reserved: 0
+            shared_block_mask_section: uc_bc
+            l3_alpm_template: 2
+            l3_alpm2_bnk_threshold: 100
+            svi_my_station_optimization: 1
+            sai_nbr_bcast_ifp_optimized: 2
+            uft_mode: 1
+            l3_enable: 1
+            l2_hitbit_enable: 0
+            pktio_mode: 1
+            sai_optimized_mmu: 1
+            sai_pfc_defaults_disable: 1
+            warmboot_knet_shutdown_mode: 1
+            sai_postinit_cmd_file: /usr/share/sonic/platform/postinit_cmd_file.soc
+...
+
+---
+device:
+    0:
+        FP_CONFIG:
+            #FP_ING_OPERMODE: PIPE_UNIQUE
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+
+---
+bcm_device:
+    0:
+        port:
+            11:
+                dport_map_port: 1
+            12:
+                dport_map_port: 2
+            13:
+                dport_map_port: 3
+            14:
+                dport_map_port: 4
+            20:
+                dport_map_port: 5
+            21:
+                dport_map_port: 6
+            22:
+                dport_map_port: 7
+            23:
+                dport_map_port: 8
+            24:
+                dport_map_port: 9
+            25:
+                dport_map_port: 10
+            26:
+                dport_map_port: 11
+            27:
+                dport_map_port: 12
+            28:
+                dport_map_port: 13
+            29:
+                dport_map_port: 14
+            30:
+                dport_map_port: 15
+            31:
+                dport_map_port: 16
+            3:
+                dport_map_port: 17
+            4:
+                dport_map_port: 18
+            5:
+                dport_map_port: 19
+            6:
+                dport_map_port: 20
+            7:
+                dport_map_port: 21
+            8:
+                dport_map_port: 22
+            9:
+                dport_map_port: 23
+            10:
+                dport_map_port: 24
+            40:
+                dport_map_port: 25
+            41:
+                dport_map_port: 26
+            42:
+                dport_map_port: 27
+            43:
+                dport_map_port: 28
+            44:
+                dport_map_port: 29
+            45:
+                dport_map_port: 30
+            46:
+                dport_map_port: 31
+            47:
+                dport_map_port: 32
+            48:
+                dport_map_port: 33
+            49:
+                dport_map_port: 34
+            50:
+                dport_map_port: 35
+            51:
+                dport_map_port: 36
+            64:
+                dport_map_port: 37
+            65:
+                dport_map_port: 38
+            66:
+                dport_map_port: 39
+            67:
+                dport_map_port: 40
+            68:
+                dport_map_port: 41
+            69:
+                dport_map_port: 42
+            70:
+                dport_map_port: 43
+            71:
+                dport_map_port: 44
+            72:
+                dport_map_port: 45
+            73:
+                dport_map_port: 46
+            74:
+                dport_map_port: 47
+            75:
+                dport_map_port: 48
+            1:
+                dport_map_port: 49
+            2:
+                dport_map_port: 50
+            15:
+                dport_map_port: 51
+            16:
+                dport_map_port: 52
+            32:
+                dport_map_port: 53
+            33:
+                dport_map_port: 54
+            34:
+                dport_map_port: 55
+            35:
+                dport_map_port: 56
+            52:
+                dport_map_port: 57
+            53:
+                dport_map_port: 58
+            54:
+                dport_map_port: 59
+            55:
+                dport_map_port: 60
+            60:
+                dport_map_port: 61
+            61:
+                dport_map_port: 62
+            62:
+                dport_map_port: 63
+            63:
+                dport_map_port: 64
+...
+
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            # CORE CLOCK FREQUENCY
+            CORE_CLK_FREQ: CLK_1350MHZ
+            # PP CLOCK FREQUENCY
+            PP_CLK_FREQ: CLK_1350MHZ
+...
+
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x73510624
+                    RX_LANE_MAP: 0x46270513
+                    TX_POLARITY_FLIP: 0xa
+                    RX_POLARITY_FLIP: 0x17
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x52317046
+                    RX_LANE_MAP: 0x31247056
+                    TX_POLARITY_FLIP: 0x90
+                    RX_POLARITY_FLIP: 0x47
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x23104567
+                    RX_LANE_MAP: 0x64752310
+                    TX_POLARITY_FLIP: 0x29
+                    RX_POLARITY_FLIP: 0x5a
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x23104567
+                    RX_LANE_MAP: 0x64752310
+                    TX_POLARITY_FLIP: 0x29
+                    RX_POLARITY_FLIP: 0x5a
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x25047361
+                    RX_LANE_MAP: 0x10452736
+                    TX_POLARITY_FLIP: 0xf5
+                    RX_POLARITY_FLIP: 0xc0
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x45763210
+                    RX_LANE_MAP: 0x13026457
+                    TX_POLARITY_FLIP: 0xa
+                    RX_POLARITY_FLIP: 0xf9
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x45763210
+                    RX_LANE_MAP: 0x13026457
+                    TX_POLARITY_FLIP: 0xa
+                    RX_POLARITY_FLIP: 0xf9
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x45673210
+                    RX_LANE_MAP: 0x13026457
+                    TX_POLARITY_FLIP: 0x4a
+                    RX_POLARITY_FLIP: 0xf3
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x02476531
+                    RX_LANE_MAP: 0x05261734
+                    TX_POLARITY_FLIP: 0xdf
+                    RX_POLARITY_FLIP: 0x84
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x37065241
+                    RX_LANE_MAP: 0x04175263
+                    TX_POLARITY_FLIP: 0x36
+                    RX_POLARITY_FLIP: 0x39
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x54762301
+                    RX_LANE_MAP: 0x13025467
+                    TX_POLARITY_FLIP: 0x70
+                    RX_POLARITY_FLIP: 0x6f
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x73125046
+                    RX_LANE_MAP: 0x21437056
+                    TX_POLARITY_FLIP: 0x78
+                    RX_POLARITY_FLIP: 0x5c
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x32104567
+                    RX_LANE_MAP: 0x64572310
+                    TX_POLARITY_FLIP: 0xd6
+                    RX_POLARITY_FLIP: 0xad
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x03172465
+                    RX_LANE_MAP: 0x45173620
+                    TX_POLARITY_FLIP: 0xed
+                    RX_POLARITY_FLIP: 0x36
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x36175042
+                    RX_LANE_MAP: 0x04176253
+                    TX_POLARITY_FLIP: 0x10
+                    RX_POLARITY_FLIP: 0xfa
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x74615203
+                    RX_LANE_MAP: 0x51704236
+                    TX_POLARITY_FLIP: 0x5f
+                    RX_POLARITY_FLIP: 0x56
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x26374051
+                    RX_LANE_MAP: 0x37046251
+                    TX_POLARITY_FLIP: 0xaa
+                    RX_POLARITY_FLIP: 0x21
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x45672310
+                    RX_LANE_MAP: 0x32105476
+                    TX_POLARITY_FLIP: 0x15
+                    RX_POLARITY_FLIP: 0x92
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x70465321
+                    RX_LANE_MAP: 0x63107542
+                    TX_POLARITY_FLIP: 0xe6
+                    RX_POLARITY_FLIP: 0xf2
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x23015476
+                    RX_LANE_MAP: 0x64752301
+                    TX_POLARITY_FLIP: 0x50
+                    RX_POLARITY_FLIP: 0x6c
+...
+
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                # CPU port
+                PORT_ID: 0
+            :
+                PC_PHYS_PORT_ID: 0
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 3
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 5
+            :
+                PC_PHYS_PORT_ID: 13
+            ?
+                PORT_ID: 7
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 9
+            :
+                PC_PHYS_PORT_ID: 21
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 13
+            :
+                PC_PHYS_PORT_ID: 29
+            ?
+                PORT_ID: 15
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 20
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 45
+            ?
+                PORT_ID: 24
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 26
+            :
+                PC_PHYS_PORT_ID: 53
+            ?
+                PORT_ID: 28
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 30
+            :
+                PC_PHYS_PORT_ID: 61
+            ?
+                PORT_ID: 32
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 40
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 42
+            :
+                PC_PHYS_PORT_ID: 85
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 46
+            :
+                PC_PHYS_PORT_ID: 93
+            ?
+                PORT_ID: 48
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 50
+            :
+                PC_PHYS_PORT_ID: 101
+            ?
+                PORT_ID: 52
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 54
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 60
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 62
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 64
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 66
+            :
+                PC_PHYS_PORT_ID: 141
+            ?
+                PORT_ID: 68
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 70
+            :
+                PC_PHYS_PORT_ID: 149
+            ?
+                PORT_ID: 72
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 74
+            :
+                PC_PHYS_PORT_ID: 157
+
+...
+
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: 0
+            :
+                ENABLE: 1
+                SPEED: 10000
+                NUM_LANES: 1
+            ?
+                PORT_ID: [3, 5, 7, 9, 11, 13,
+                          20, 22, 24, 26, 28, 30,
+                          40, 42, 44, 46, 48, 50,
+                          64, 66, 68, 70, 72, 74]
+            :
+                ENABLE: 0
+                SPEED: 200000
+                FEC_MODE: PC_FEC_RS544_2XN
+                NUM_LANES: 4
+                LINK_TRAINING: 0
+                MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [1, 15, 32, 34, 52, 54, 60, 62]
+            :
+                ENABLE: 0
+                SPEED: 400000
+                FEC_MODE: PC_FEC_RS544_2XN
+                NUM_LANES: 8
+                LINK_TRAINING: 0
+                MAX_FRAME_SIZE: 9416
+
+...
+
+---
+device:
+    0:
+        TM_SCHEDULER_CONFIG:
+            NUM_MC_Q: NUM_MC_Q_4
+...
+
+---
+device:
+    0:
+        PC_TX_TAPS:
+            ?
+                PORT_ID: 11
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 14
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 11
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 11
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 11
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 13
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 13
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 13
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 13
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 20
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 20
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 20
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 20
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 22
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 22
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 22
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 22
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 24
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 24
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 24
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 24
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 26
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 26
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 26
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 26
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 28
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 28
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 28
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 28
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 30
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 30
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 30
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 30
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 3
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 3
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 3
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 3
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 7
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 7
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 7
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 7
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 9
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 9
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 9
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 9
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 40
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 40
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 40
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 40
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 42
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 42
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 42
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 42
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 44
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 44
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 44
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 44
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 46
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 46
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 46
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 46
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 48
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 48
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 48
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 48
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 50
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 50
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 50
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 50
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 64
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 64
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 64
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 64
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 66
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 66
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 66
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 66
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 68
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 68
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 68
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 68
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 70
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 70
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 70
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 70
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 72
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 72
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 72
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 72
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 74
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 74
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 74
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 74
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 148
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 124
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 15
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 15
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 15
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 15
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 15
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 15
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 15
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 15
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 32
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 32
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 32
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 32
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 32
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 32
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 32
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 32
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 52
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 52
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 52
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 52
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 52
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 52
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 52
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 52
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 54
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 54
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 54
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 54
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 54
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 54
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 54
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 54
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 60
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 60
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 60
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 60
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 60
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 60
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 60
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 60
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 62
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 62
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 62
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 62
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 62
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 62
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 62
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 124
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 62
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+...
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/cpu.cint b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/cpu.cint
new file mode 100644
index 000000000000..e286d3cf42a6
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/cpu.cint
@@ -0,0 +1,85 @@
+cint_reset();
+
+int cint_field_group_create(int unit, bcm_field_group_t grp)
+{
+    int rv;
+
+    bcm_field_qset_t    qset;
+    bcm_field_aset_t    aset;
+
+    BCM_FIELD_QSET_INIT(qset);
+    BCM_FIELD_QSET_ADD(qset,bcmFieldQualifyDstMac);
+    BCM_FIELD_QSET_ADD(qset, bcmFieldQualifyStageIngress);
+
+    BCM_FIELD_ASET_INIT(aset);
+    BCM_FIELD_ASET_ADD(aset, bcmFieldActionCopyToCpu); 
+
+    rv = bcm_field_group_create_mode_id(unit, qset, 103, bcmFieldGroupModeAuto, grp);
+    if (rv != BCM_E_NONE) {
+        printf("bcm_field_group_create_mode_id failed, rv = %d\r\n", rv);
+        return -1;
+    }
+    printf("cint_field_group_create success!!!, rv = %d\r\n", rv);
+
+    bcm_field_group_dump(unit,grp);   
+    return 0;
+}
+
+int cint_field_entry_create1(int unit, bcm_field_group_t grp,bcm_field_entry_t entry)
+{
+    int rv;
+    bcm_mac_t dst_mac = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+    bcm_mac_t mac_mask = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+	
+    rv = bcm_field_entry_create_id(unit, grp, entry);    
+    if (rv != BCM_E_NONE) {
+        printf("bcm_field_entry_create_id failed, rv = %d\r\n", rv);
+        return -1;
+    }
+
+
+    rv =bcm_field_qualify_DstMac(unit, entry, dst_mac, mac_mask);
+    if (rv != BCM_E_NONE) {
+        printf("bcm_field_qualify_DstMac failed,ret = %d\r\n", rv);
+        bcm_field_entry_destroy(unit, entry);
+        return -1;
+    }
+
+    rv = bcm_field_action_add(unit, entry, bcmFieldActionCopyToCpu, 1, 0);
+    if (rv != BCM_E_NONE) {
+        printf("bcm_field_action_add failed, rv = %d \r\n", rv);
+        bcm_field_entry_destroy(unit, entry);
+        return -1;
+    }
+
+    rv = bcm_field_action_add(unit, entry, bcmFieldActionDrop, 1, 0);
+    if (rv != BCM_E_NONE) {
+        printf("bcm_field_action_add failed, rv = %d \r\n", rv);
+        bcm_field_entry_destroy(unit, entry);
+        return -1;
+    }
+	
+    rv = bcm_field_entry_install(unit, entry);
+    if (rv != BCM_E_NONE) {
+        printf("bcm_field_entry_install failed,ret = %d\r\n", rv);
+        bcm_field_entry_destroy(unit, entry);
+        return -1;
+    }  
+
+    printf("********************* BEGIN ****************************\r\n");
+    bcm_field_entry_dump(unit, entry);
+    printf("*********************** END ****************************\r\n");
+
+    return 0;
+}
+
+cint_field_group_create(0,5);
+cint_field_entry_create1(0,5,2048);
+
+//bcm_field_entry_destroy(0, 2048);
+//bcm_field_group_destroy(0, 5);
+
+
+
+
+
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/custom_led.bin
new file mode 100644
index 0000000000000000000000000000000000000000..b3185be90620437bade87ac81750977221683aea
GIT binary patch
literal 716
zcma)%PiPZi5XIlOo1`0Ksck82Y$9nkk*2Ff1%+s}Uy?G!mO^V$YPM=(5#rH{G@ks2
zQWK>$6?WZ<=+#SI?LoAl-l`y*dWqz+;2|fW=tc12RuDZ|55o-a%`m^WzI=vG&?pVj
z`tzGhEhrOqUL4Vh#RVn6#h5|g+RUJ~O+%W@96MxM$)b*QZh`dBWw+z*i{iVf_p&*2
zpH$wJM(vF=F6Al0uM^Z(TX3K(5_%>`lUC(b3wnf$m>z0ai!|+Sh&Gfgp|`EJC9%~O
z>Ow-Oi%v(vXZsYdGeMmhm1}?_C{J;zSU$!M?CD>wvAC${q>&Kq<lgFU!tAh-W64=-
zpjgIstsFAp<b=7;a%fgu=)UEtzAR2nJt9puW-1gcvH8W)w99OgiU4=%p>R}3D4Z5;
zP2wbQ<{%1X(xvm;dE(MF(p+xWF&H0{-&$j?BiYQzO5Jk967>{GyhC1dGorV}&i_(9
zf7CuVYt(BX(O!$GV%<b|_~Yb5@<shlftVT0j8GsG%IxB2H}XcGp;XMdd3pbx8jB(_
zcw{i{i7|)mTeBv1G%TpTT9B3G4|%CDTBsDhHoMsmxt{m*efcChP+_N<r<*NH1Fz=D
zpvUxt)>mFr<sk4q3EcRruDbKTO5eoaxc#4<&3*(CMgqIB7yFUKVffLCc64DJ$8i#;
bP{29N;x^`S4+b89p$91(#d%yn30LqF-<HRv

literal 0
HcmV?d00001

diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/default_sku b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/default_sku
new file mode 100644
index 000000000000..afadd24f36c5
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/default_sku
@@ -0,0 +1 @@
+M2-W6520-24DC8QC l2
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/dev.xml b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/dev.xml
new file mode 100644
index 000000000000..e71ddf3237b3
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/dev.xml
@@ -0,0 +1,371 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--
+      ### type    1 result/1000
+          type    2 result/100
+          type    3 read bit
+     ### property need check must add int front
+-->
+<catalog>
+    <fans>
+        <fan id="fan1" >
+            <property name="present" location="/sys/wb_plat/fan/fan1/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan1/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan1/motor1/status" type="4" decode="fanstatus"  default="1"/>
+    		<property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/35-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan1/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan1/motor1/speed"/>
+        </fan>
+        <fan id="fan2" >
+            <property name="present" location="/sys/wb_plat/fan/fan2/present"       type="4" decode="fanpresent" default="1" />
+            <property name="status"  location="/sys/wb_plat/fan/fan2/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan2/motor1/status" type="4" decode="fanstatus"  default="1"/>
+    		<property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/34-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan2/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan2/motor1/speed"/>
+        </fan>
+        <fan id="fan3" >
+            <property name="present" location="/sys/wb_plat/fan/fan3/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan3/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan3/motor1/status" type="4" decode="fanstatus"  default="1"/>
+    		<property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/33-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan3/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan3/motor1/speed"/>
+        </fan>
+        <fan id="fan4" >
+            <property name="present" location="/sys/wb_plat/fan/fan4/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan4/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan4/motor1/status" type="4" decode="fanstatus"  default="1"/>
+    		<property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/32-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan4/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan4/motor1/speed"/>
+        </fan>
+        <fan id="fan5" >
+            <property name="present" location="/sys/wb_plat/fan/fan5/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan5/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan5/motor1/status" type="4" decode="fanstatus"  default="1"/>
+    		<property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/31-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan5/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan5/motor1/speed"/>
+        </fan>
+        <fan id="fan6" >
+            <property name="present" location="/sys/wb_plat/fan/fan6/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan6/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan6/motor1/status" type="4" decode="fanstatus"  default="1"/>
+    		<property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/30-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan6/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan6/motor1/speed"/>
+        </fan>
+    </fans>
+    <temps>
+        <temp id="air_inlet_TL" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/40-004f/hwmon/*/temp1_input" type="1" addend="-3"/>
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/40-004f/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/40-004f/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="air_inlet_BL" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/39-004b/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/39-004b/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/39-004b/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="air_outlet_L" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/36-0048/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/36-0048/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/36-0048/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="air_outlet_R" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/36-0049/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/36-0049/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/36-0049/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="air_hotlet" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/40-004e/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/40-004e/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/40-004e/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="MAC_PACKAGE0" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/39-004c/hwmon/*/temp2_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/39-004c/hwmon/*/temp2_max" type="1" />
+            <property name="temp1_max_hyst" location="/sys/bus/i2c/devices/39-004c/hwmon/*/temp2_crit_hyst" type="1"/>
+        </temp>
+        <temp id="MAC_PACKAGE1" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/40-004c/hwmon/*/temp2_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/40-004c/hwmon/*/temp2_max" type="1" />
+            <property name="temp1_max_hyst" location="/sys/bus/i2c/devices/40-004c/hwmon/*/temp2_crit_hyst" type="1"/>
+        </temp>
+    </temps>
+    <psus>
+        <psu id="psu1" >
+            <property name="present" location="/sys/wb_plat/psu/psu1/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu1/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/41-0050/eeprom"/>
+            <property name="in_current"    location="/sys/bus/i2c/devices/41-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"    location="/sys/bus/i2c/devices/41-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/41-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/41-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/41-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/41-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/41-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/41-0058/hwmon/*/power2_input"  type="5"/>
+        </psu>
+        <psu id="psu2" >
+            <property name="present" location="/sys/wb_plat/psu/psu2/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu2/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/42-0050/eeprom"/>
+            <property name="in_current"    location="/sys/bus/i2c/devices/42-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"    location="/sys/bus/i2c/devices/42-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/42-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/42-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/42-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/42-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/42-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/42-0058/hwmon/*/power2_input"  type="5"/>
+        </psu>
+    </psus>
+    <dcdcs>
+        <dcdc id="VDD5V_CLK_MCU" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="5.750" />
+            <property name="dcdc_min"   gettype="config" value="4.250" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD3.3_CLK" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD1.0V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.150" />
+            <property name="dcdc_min"   gettype="config" value="0.850" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD1.8V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.070" />
+            <property name="dcdc_min"   gettype="config" value="1.530" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_BOARD_VDD3.3V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in5_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD1.2V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in6_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.380" />
+            <property name="dcdc_min"   gettype="config" value="1.020" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD_CORE" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in7_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.100" />
+            <property name="dcdc_min"   gettype="config" value="0.600" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="ANALOG0.75V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in8_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.000" />
+            <property name="dcdc_min"   gettype="config" value="0.615" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_VDD1.2V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in9_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.380" />
+            <property name="dcdc_min"   gettype="config" value="1.020" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDDO1.8V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in10_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.070" />
+            <property name="dcdc_min"   gettype="config" value="1.530" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_ANA1.2V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in11_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.380" />
+            <property name="dcdc_min"   gettype="config" value="1.020" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_ANA1.8V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in12_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.070" />
+            <property name="dcdc_min"   gettype="config" value="1.530" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="QSFP56_VDD3.3V_A" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in13_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="QSFP56_VDD3.3V_B" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in14_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="QSFPDD_VDD3.3V_A" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in15_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="QSFPDD_VDD3.3V_B" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in16_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD5.0V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/24-005b/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="5.750" />
+            <property name="dcdc_min"   gettype="config" value="4.250" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="SW_VDD1.2V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/24-005b/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.380" />
+            <property name="dcdc_min"   gettype="config" value="1.020" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD2.5V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/24-005b/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.875" />
+            <property name="dcdc_min"   gettype="config" value="2.125" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="CONNECT_BOARD_VDD3.3V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/24-005b/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD12V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/24-005b/hwmon/hwmon*/in6_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="13.800" />
+            <property name="dcdc_min"   gettype="config" value="10.200" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VDD3.3_STBY" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/24-005b/hwmon/hwmon*/in7_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="SSD_VDD3.3V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/24-005b/hwmon/hwmon*/in8_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VCCIN" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/25-0067/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.244" />
+            <property name="dcdc_min"   gettype="config" value="1.368" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="P1V05" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/25-0067/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.232" />
+            <property name="dcdc_min"   gettype="config" value="0.882" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VCCD_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/25-006c/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.452" />
+            <property name="dcdc_min"   gettype="config" value="0.990" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="VCCSCSUS_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/25-006c/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.265" />
+            <property name="dcdc_min"   gettype="config" value="0.855" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="P3V3_STBY_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/25-0043/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="4.004" />
+            <property name="dcdc_min"   gettype="config" value="2.682" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="P5V_AUX_IN" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/25-0043/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="6.347" />
+            <property name="dcdc_min"   gettype="config" value="3.852" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="P1V7_VCCSCFUSESUS_IN" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/25-0043/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.057" />
+            <property name="dcdc_min"   gettype="config" value="1.377" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+    </dcdcs>
+    <mactemps>
+        <mactemp id="MAC_DIE_0" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/44-0044/hwmon/hwmon*/temp1_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_1" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/44-0044/hwmon/hwmon*/temp2_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_2" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/44-0044/hwmon/hwmon*/temp3_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_3" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/44-0044/hwmon/hwmon*/temp4_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_4" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/44-0044/hwmon/hwmon*/temp5_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_5" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/44-0044/hwmon/hwmon*/temp6_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_6" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/44-0044/hwmon/hwmon*/temp7_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_7" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/44-0044/hwmon/hwmon*/temp8_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_8" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/44-0044/hwmon/hwmon*/temp9_input"  type="1"/>
+        </mactemp>
+    </mactemps>
+    <macpowers>
+        <macpower id="MAC_Core" >
+            <property name="power_input" location="/sys/bus/i2c/devices/43-005b/hwmon/hwmon*/power1_input"  type="5"/>
+        </macpower>
+        <macpower id="MAC_Analog" >
+            <property name="power_input" location="/sys/bus/i2c/devices/43-005b/hwmon/hwmon*/power3_input"  type="5"/>
+        </macpower>
+    </macpowers>
+    <cpus location="/sys/class/hwmon/hwmon0"/>
+    <decode>
+    <fanpresent>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </fanpresent>
+    <fanstatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </fanstatus>
+    <psucheck>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </psucheck>
+    <psustatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </psustatus>
+    <psutype>
+        <code key="DPS-1300AB-6 S" value="PA1300I-F"/>
+        <code key="GW-CRPS1300D" value="PA1300I-F"/>
+    </psutype>
+    <fan_display_name>
+        <code key="M1HFAN II-F" value="M1HFAN II-F"/>
+    </fan_display_name>
+    </decode>
+</catalog>
+
+
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/fru.py b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/fru.py
new file mode 100644
index 000000000000..f95164e03601
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/fru.py
@@ -0,0 +1,961 @@
+#!/usr/bin/python3
+import collections
+from datetime import datetime, timedelta
+from bitarray import bitarray
+
+
+__DEBUG__ = "N"
+
+
+class FruException(Exception):
+    def __init__(self, message='fruerror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+
+def e_print(err):
+    print("ERROR: " + err)
+
+
+def d_print(debug_info):
+    if __DEBUG__ == "Y":
+        print(debug_info)
+
+
+class FruUtil():
+    @staticmethod
+    def decodeLength(value):
+        a = bitarray(8)
+        a.setall(True)
+        a[0:1] = 0
+        a[1:2] = 0
+        x = ord(a.tobytes())
+        return x & ord(value)
+
+    @staticmethod
+    def minToData():
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        endtime = datetime.now()
+        seconds = (endtime - starttime).total_seconds()
+        mins = seconds // 60
+        m = int(round(mins))
+        return m
+
+    @staticmethod
+    def getTimeFormat():
+        return datetime.now().strftime('%Y-%m-%d')
+
+    @staticmethod
+    def getTypeLength(value):
+        if value is None or len(value) == 0:
+            return 0
+        a = bitarray(8)
+        a.setall(False)
+        a[0:1] = 1
+        a[1:2] = 1
+        x = ord(a.tobytes())
+        return x | len(value)
+
+    @staticmethod
+    def checksum(b):
+        result = 0
+        for item in b:
+            result += ord(item)
+        return (0x100 - (result & 0xff)) & 0xff
+
+
+class BaseArea(object):
+    SUGGESTED_SIZE_COMMON_HEADER = 8
+    SUGGESTED_SIZE_INTERNAL_USE_AREA = 72
+    SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32
+    SUGGESTED_SIZE_BOARD_INFO_AREA = 80
+    SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80
+
+    INITVALUE = b'\x00'
+    resultvalue = INITVALUE * 256
+    COMMON_HEAD_VERSION = b'\x01'
+    __childList = None
+
+    def __init__(self, name="", size=0, offset=0):
+        self.__childList = []
+        self._offset = offset
+        self.name = name
+        self._size = size
+        self._isPresent = False
+        self._data = b'\x00' * size
+
+    @property
+    def childList(self):
+        return self.__childList
+
+    @childList.setter
+    def childList(self, value):
+        self.__childList = value
+
+    @property
+    def offset(self):
+        return self._offset
+
+    @offset.setter
+    def offset(self, value):
+        self._offset = value
+
+    @property
+    def size(self):
+        return self._size
+
+    @size.setter
+    def size(self, value):
+        self._size = value
+
+    @property
+    def data(self):
+        return self._data
+
+    @data.setter
+    def data(self, value):
+        self._data = value
+
+    @property
+    def isPresent(self):
+        return self._isPresent
+
+    @isPresent.setter
+    def isPresent(self, value):
+        self._isPresent = value
+
+
+class InternalUseArea(BaseArea):
+    pass
+
+
+class ChassisInfoArea(BaseArea):
+    pass
+
+
+class BoardInfoArea(BaseArea):
+    _boardTime = None
+    _fields = None
+    _mfg_date = None
+    areaversion = None
+    _boardversion = None
+    _language = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "mfg_date            : %s \n" \
+                    "boardManufacturer   : %s \n" \
+                    "boardProductName    : %s \n" \
+                    "boardSerialNumber   : %s \n" \
+                    "boardPartNumber     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.boardversion), self.size,
+                              self.language, self.getMfgRealData(),
+                              self.boardManufacturer, self.boardProductName,
+                              self.boardSerialNumber, self.boardPartNumber,
+                              self.fruFileId)
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "boardextra%d         : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["boardversion"] = ord(self.boardversion)
+        dic["boardlength"] = self.size
+        dic["boardlanguage"] = self.language
+        dic["boardmfg_date"] = self.getMfgRealData()
+        dic["boardManufacturer"] = self.boardManufacturer
+        dic["boardProductName"] = self.boardProductName
+        dic["boardSerialNumber"] = self.boardSerialNumber
+        dic["boardPartNumber"] = self.boardPartNumber
+        dic["boardfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]
+        index += 1
+        d_print("decode length :%d class size:%d" %
+                ((ord(self.data[index]) * 8), self.size))
+        index += 2
+
+        timetmp = self.data[index: index + 3]
+        self.mfg_date = ord(timetmp[0]) | (
+            ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16)
+        d_print("decode getMfgRealData :%s" % self.getMfgRealData())
+        index += 3
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardManufacturer:%s" % self.boardManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardProductName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardProductName:%s" % self.boardProductName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardSerialNumber:%s" % self.boardSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardPartNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardPartNumber:%s" % self.boardPartNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if self.data[index] != chr(0xc1):
+                templen = FruUtil.decodeLength(self.data[index])
+                tmpval = self.data[index + 1: index + templen + 1]
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+            else:
+                break
+
+    def fruSetValue(self, field, value):
+        tmp_field = getattr(self, field, None)
+        if tmp_field is not None:
+            setattr(self, field, value)
+
+    def recalcute(self):
+        d_print("boardInfoArea version:%x" % ord(self.boardversion))
+        d_print("boardInfoArea length:%d" % self.size)
+        d_print("boardInfoArea language:%x" % self.language)
+        self.mfg_date = FruUtil.minToData()
+        d_print("boardInfoArea mfg_date:%x" % self.mfg_date)
+
+        self.data = chr(ord(self.boardversion)) + \
+            chr(self.size // 8) + chr(self.language)
+
+        self.data += chr(self.mfg_date & 0xFF)
+        self.data += chr((self.mfg_date >> 8) & 0xFF)
+        self.data += chr((self.mfg_date >> 16) & 0xFF)
+
+        d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer)
+        typelength = FruUtil.getTypeLength(self.boardManufacturer)
+        self.data += chr(typelength)
+        self.data += self.boardManufacturer
+
+        d_print("boardInfoArea boardProductName:%s" % self.boardProductName)
+        self.data += chr(FruUtil.getTypeLength(self.boardProductName))
+        self.data += self.boardProductName
+
+        d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber))
+        self.data += self.boardSerialNumber
+
+        d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardPartNumber))
+        self.data += self.boardPartNumber
+
+        d_print("boardInfoArea fruFileId:%s" % self.fruFileId)
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is not None:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) // 8 + 1
+            self.size += incr * 8
+
+        self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+        d_print("self data:%d" % len(self.data))
+        d_print("self size:%d" % self.size)
+        d_print("adjust size:%d" % (self.size - len(self.data) - 1))
+        self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+
+        # checksum
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+    def getMfgRealData(self):
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        mactime = starttime + timedelta(minutes=self.mfg_date)
+        return mactime
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def mfg_date(self):
+        return self._mfg_date
+
+    @mfg_date.setter
+    def mfg_date(self, val):
+        self._mfg_date = val
+
+    @property
+    def boardversion(self):
+        self._boardversion = self.COMMON_HEAD_VERSION
+        return self._boardversion
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, val):
+        self._FRUFileID = val
+
+    @property
+    def boardPartNumber(self):
+        return self._boardPartNumber
+
+    @boardPartNumber.setter
+    def boardPartNumber(self, val):
+        self._boardPartNumber = val
+
+    @property
+    def boardSerialNumber(self):
+        return self._boardSerialNumber
+
+    @boardSerialNumber.setter
+    def boardSerialNumber(self, val):
+        self._boardSerialNumber = val
+
+    @property
+    def boardProductName(self):
+        return self._boradProductName
+
+    @boardProductName.setter
+    def boardProductName(self, val):
+        self._boradProductName = val
+
+    @property
+    def boardManufacturer(self):
+        return self._boardManufacturer
+
+    @boardManufacturer.setter
+    def boardManufacturer(self, val):
+        self._boardManufacturer = val
+
+    @property
+    def boardTime(self):
+        return self._boardTime
+
+    @boardTime.setter
+    def boardTime(self, val):
+        self._boardTime = val
+
+    @property
+    def fields(self):
+        return self._fields
+
+    @fields.setter
+    def fields(self, val):
+        self._fields = val
+
+
+class ProductInfoArea(BaseArea):
+    _productManufacturer = None
+    _productAssetTag = None
+    _FRUFileID = None
+    _language = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "productManufacturer : %s \n" \
+                    "productName         : %s \n" \
+                    "productPartModelName: %s \n" \
+                    "productVersion      : %s \n" \
+                    "productSerialNumber : %s \n" \
+                    "productAssetTag     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.areaversion), self.size,
+                              self.language, self.productManufacturer,
+                              self.productName, self.productPartModelName,
+                              self.productVersion, self.productSerialNumber,
+                              self.productAssetTag, self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "productextra%d       : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["productversion"] = ord(self.areaversion)
+        dic["productlength"] = self.size
+        dic["productlanguage"] = self.language
+        dic["productManufacturer"] = self.productManufacturer
+        dic["productName"] = self.productName
+        dic["productPartModelName"] = self.productPartModelName
+        dic["productVersion"] = int(self.productVersion, 16)
+        dic["productSerialNumber"] = self.productSerialNumber
+        dic["productAssetTag"] = self.productAssetTag
+        dic["productfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]  # 0
+        index += 1
+        d_print("decode length %d" % (ord(self.data[index]) * 8))
+        d_print("class size %d" % self.size)
+        index += 2
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productManufacturer:%s" % self.productManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productName:%s" % self.productName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productPartModelName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productPartModelName:%s" % self.productPartModelName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productVersion = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productVersion:%s" % self.productVersion)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productSerialNumber:%s" % self.productSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productAssetTag = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productAssetTag:%s" % self.productAssetTag)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if self.data[index] != chr(0xc1) and index < self.size - 1:
+                templen = FruUtil.decodeLength(self.data[index])
+                if templen == 0:
+                    break
+                tmpval = self.data[index + 1: index + templen + 1]
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+            else:
+                break
+
+    @property
+    def productVersion(self):
+        return self._productVersion
+
+    @productVersion.setter
+    def productVersion(self, name):
+        self._productVersion = name
+
+    @property
+    def areaversion(self):
+        self._areaversion = self.COMMON_HEAD_VERSION
+        return self._areaversion
+
+    @areaversion.setter
+    def areaversion(self, name):
+        self._areaversion = name
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def productManufacturer(self):
+        return self._productManufacturer
+
+    @productManufacturer.setter
+    def productManufacturer(self, name):
+        self._productManufacturer = name
+
+    @property
+    def productName(self):
+        return self._productName
+
+    @productName.setter
+    def productName(self, name):
+        self._productName = name
+
+    @property
+    def productPartModelName(self):
+        return self._productPartModelName
+
+    @productPartModelName.setter
+    def productPartModelName(self, name):
+        self._productPartModelName = name
+
+    @property
+    def productSerialNumber(self):
+        return self._productSerialNumber
+
+    @productSerialNumber.setter
+    def productSerialNumber(self, name):
+        self._productSerialNumber = name
+
+    @property
+    def productAssetTag(self):
+        return self._productAssetTag
+
+    @productAssetTag.setter
+    def productAssetTag(self, name):
+        self._productAssetTag = name
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, name):
+        self._FRUFileID = name
+
+    def fruSetValue(self, field, value):
+        tmp_field = getattr(self, field, None)
+        if tmp_field is not None:
+            setattr(self, field, value)
+
+    def recalcute(self):
+        d_print("product version:%x" % ord(self.areaversion))
+        d_print("product length:%d" % self.size)
+        d_print("product language:%x" % self.language)
+        self.data = chr(ord(self.areaversion)) + \
+            chr(self.size // 8) + chr(self.language)
+
+        typelength = FruUtil.getTypeLength(self.productManufacturer)
+        self.data += chr(typelength)
+        self.data += self.productManufacturer
+
+        self.data += chr(FruUtil.getTypeLength(self.productName))
+        self.data += self.productName
+
+        self.data += chr(FruUtil.getTypeLength(self.productPartModelName))
+        self.data += self.productPartModelName
+
+        self.data += chr(FruUtil.getTypeLength(self.productVersion))
+        self.data += self.productVersion
+
+        self.data += chr(FruUtil.getTypeLength(self.productSerialNumber))
+        self.data += self.productSerialNumber
+
+        self.data += chr(FruUtil.getTypeLength(self.productAssetTag))
+        if self.productAssetTag is not None:
+            self.data += self.productAssetTag
+
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea productextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is not None:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) // 8 + 1
+            self.size += incr * 8
+        d_print("self.data:%d" % len(self.data))
+        d_print("self.size:%d" % self.size)
+
+        self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+        self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+
+class MultiRecordArea(BaseArea):
+    pass
+
+
+class Field(object):
+
+    def __init__(self, fieldType="ASCII", fieldData=""):
+        self.fieldData = fieldData
+        self.fieldType = fieldType
+
+    @property
+    def fieldType(self):
+        return self.fieldType
+
+    @property
+    def fieldData(self):
+        return self.fieldData
+
+
+class ipmifru(BaseArea):
+    _BoardInfoArea = None
+    _ProductInfoArea = None
+    _InternalUseArea = None
+    _ChassisInfoArea = None
+    _multiRecordArea = None
+    _productinfoAreaOffset = BaseArea.INITVALUE
+    _boardInfoAreaOffset = BaseArea.INITVALUE
+    _internalUserAreaOffset = BaseArea.INITVALUE
+    _chassicInfoAreaOffset = BaseArea.INITVALUE
+    _multiRecordAreaOffset = BaseArea.INITVALUE
+    _bindata = None
+    _bodybin = None
+    _version = BaseArea.COMMON_HEAD_VERSION
+    _zeroCheckSum = None
+    _frusize = 256
+
+    def __str__(self):
+        tmpstr = ""
+        if self.boardInfoArea.isPresent:
+            tmpstr += "\nboardinfoarea: \n"
+            tmpstr += self.boardInfoArea.__str__()
+        if self.productInfoArea.isPresent:
+            tmpstr += "\nproductinfoarea: \n"
+            tmpstr += self.productInfoArea.__str__()
+        return tmpstr
+
+    def decodeBin(self, eeprom):
+        commonHead = eeprom[0:8]
+        d_print("decode version %x" % ord(commonHead[0]))
+        if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]):
+            raise FruException("HEAD VERSION error,not Fru format!", -10)
+        if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]):
+            strtemp = "check header checksum error [cal:%02x data:%02x]" % (
+                FruUtil.checksum(commonHead[0:7]), ord(commonHead[7]))
+            raise FruException(strtemp, -3)
+        if ord(commonHead[1]) != ord(self.INITVALUE):
+            d_print("Internal Use Area is present")
+            self.internalUseArea = InternalUseArea(
+                name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA)
+            self.internalUseArea.isPresent = True
+            self.internalUserAreaOffset = ord(commonHead[1])
+            self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: (
+                self.internalUserAreaOffset * 8 + self.internalUseArea.size)]
+        if ord(commonHead[2]) != ord(self.INITVALUE):
+            d_print("Chassis Info Area is present")
+            self.chassisInfoArea = ChassisInfoArea(
+                name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA)
+            self.chassisInfoArea.isPresent = True
+            self.chassicInfoAreaOffset = ord(commonHead[2])
+            self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: (
+                self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)]
+        if ord(commonHead[3]) != ord(self.INITVALUE):
+            self.boardInfoArea = BoardInfoArea(
+                name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA)
+            self.boardInfoArea.isPresent = True
+            self.boardInfoAreaOffset = ord(commonHead[3])
+            self.boardInfoArea.size = ord(
+                eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8
+            d_print("Board Info Area is present size:%d" %
+                    (self.boardInfoArea.size))
+            self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: (
+                self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)]
+            if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]):
+                strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" %  \
+                    (FruUtil.checksum(
+                        self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.boardInfoArea.decodedata()
+        if ord(commonHead[4]) != ord(self.INITVALUE):
+            d_print("Product Info Area is present")
+            self.productInfoArea = ProductInfoArea(
+                name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA)
+            self.productInfoArea.isPresent = True
+            self.productinfoAreaOffset = ord(commonHead[4])
+            d_print("length offset value: %02x" %
+                    ord(eeprom[self.productinfoAreaOffset * 8 + 1]))
+            self.productInfoArea.size = ord(
+                eeprom[self.productinfoAreaOffset * 8 + 1]) * 8
+            d_print("Product Info Area is present size:%d" %
+                    (self.productInfoArea.size))
+
+            self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: (
+                self.productinfoAreaOffset * 8 + self.productInfoArea.size)]
+            if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]):
+                strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % (
+                    FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.productInfoArea.decodedata()
+        if ord(commonHead[5]) != ord(self.INITVALUE):
+            self.multiRecordArea = MultiRecordArea(
+                name="MultiRecord record Area ")
+            d_print("MultiRecord record present")
+            self.multiRecordArea.isPresent = True
+            self.multiRecordAreaOffset = ord(commonHead[5])
+            self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: (
+                self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)]
+
+    def initDefault(self):
+        self.version = self.COMMON_HEAD_VERSION
+        self.internalUserAreaOffset = self.INITVALUE
+        self.chassicInfoAreaOffset = self.INITVALUE
+        self.boardInfoAreaOffset = self.INITVALUE
+        self.productinfoAreaOffset = self.INITVALUE
+        self.multiRecordAreaOffset = self.INITVALUE
+        self.zeroCheckSum = self.INITVALUE
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        self.productInfoArea = None
+        self.internalUseArea = None
+        self.boardInfoArea = None
+        self.chassisInfoArea = None
+        self.multiRecordArea = None
+        # self.recalcute()
+
+    @property
+    def version(self):
+        return self._version
+
+    @version.setter
+    def version(self, name):
+        self._version = name
+
+    @property
+    def internalUserAreaOffset(self):
+        return self._internalUserAreaOffset
+
+    @internalUserAreaOffset.setter
+    def internalUserAreaOffset(self, obj):
+        self._internalUserAreaOffset = obj
+
+    @property
+    def chassicInfoAreaOffset(self):
+        return self._chassicInfoAreaOffset
+
+    @chassicInfoAreaOffset.setter
+    def chassicInfoAreaOffset(self, obj):
+        self._chassicInfoAreaOffset = obj
+
+    @property
+    def productinfoAreaOffset(self):
+        return self._productinfoAreaOffset
+
+    @productinfoAreaOffset.setter
+    def productinfoAreaOffset(self, obj):
+        self._productinfoAreaOffset = obj
+
+    @property
+    def boardInfoAreaOffset(self):
+        return self._boardInfoAreaOffset
+
+    @boardInfoAreaOffset.setter
+    def boardInfoAreaOffset(self, obj):
+        self._boardInfoAreaOffset = obj
+
+    @property
+    def multiRecordAreaOffset(self):
+        return self._multiRecordAreaOffset
+
+    @multiRecordAreaOffset.setter
+    def multiRecordAreaOffset(self, obj):
+        self._multiRecordAreaOffset = obj
+
+    @property
+    def zeroCheckSum(self):
+        return self._zeroCheckSum
+
+    @zeroCheckSum.setter
+    def zeroCheckSum(self, obj):
+        self._zeroCheckSum = obj
+
+    @property
+    def productInfoArea(self):
+        return self._ProductInfoArea
+
+    @productInfoArea.setter
+    def productInfoArea(self, obj):
+        self._ProductInfoArea = obj
+
+    @property
+    def internalUseArea(self):
+        return self._InternalUseArea
+
+    @internalUseArea.setter
+    def internalUseArea(self, obj):
+        self.internalUseArea = obj
+
+    @property
+    def boardInfoArea(self):
+        return self._BoardInfoArea
+
+    @boardInfoArea.setter
+    def boardInfoArea(self, obj):
+        self._BoardInfoArea = obj
+
+    @property
+    def chassisInfoArea(self):
+        return self._ChassisInfoArea
+
+    @chassisInfoArea.setter
+    def chassisInfoArea(self, obj):
+        self._ChassisInfoArea = obj
+
+    @property
+    def multiRecordArea(self):
+        return self._multiRecordArea
+
+    @multiRecordArea.setter
+    def multiRecordArea(self, obj):
+        self._multiRecordArea = obj
+
+    @property
+    def bindata(self):
+        return self._bindata
+
+    @bindata.setter
+    def bindata(self, obj):
+        self._bindata = obj
+
+    @property
+    def bodybin(self):
+        return self._bodybin
+
+    @bodybin.setter
+    def bodybin(self, obj):
+        self._bodybin = obj
+
+    def recalcuteCommonHead(self):
+        self.bindata = ""
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        d_print("common Header %d" % self.offset)
+        d_print("fru eeprom size  %d" % self._frusize)
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            self.internalUserAreaOffset = self.offset // 8
+            self.offset += self.internalUseArea.size
+            d_print("internalUseArea is present offset:%d" % self.offset)
+
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            self.chassicInfoAreaOffset = self.offset // 8
+            self.offset += self.chassisInfoArea.size
+            d_print("chassisInfoArea is present offset:%d" % self.offset)
+
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            self.boardInfoAreaOffset = self.offset // 8
+            self.offset += self.boardInfoArea.size
+            d_print("boardInfoArea is present offset:%d" % self.offset)
+            d_print("boardInfoArea is present size:%d" %
+                    self.boardInfoArea.size)
+
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            self.productinfoAreaOffset = self.offset // 8
+            self.offset += self.productInfoArea.size
+            d_print("productInfoArea is present offset:%d" % self.offset)
+
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            self.multiRecordAreaOffset = self.offset // 8
+            d_print("multiRecordArea is present offset:%d" % self.offset)
+
+        if self.internalUserAreaOffset == self.INITVALUE:
+            self.internalUserAreaOffset = 0
+        if self.productinfoAreaOffset == self.INITVALUE:
+            self.productinfoAreaOffset = 0
+        if self.chassicInfoAreaOffset == self.INITVALUE:
+            self.chassicInfoAreaOffset = 0
+        if self.boardInfoAreaOffset == self.INITVALUE:
+            self.boardInfoAreaOffset = 0
+        if self.multiRecordAreaOffset == self.INITVALUE:
+            self.multiRecordAreaOffset = 0
+
+        self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset
+                             - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff
+        d_print("zerochecksum:%x" % self.zeroCheckSum)
+        self.data = ""
+        self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr(
+            self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum)
+
+        self.bindata = self.data + self.bodybin
+        totallen = len(self.bindata)
+        d_print("totallen %d" % totallen)
+        if totallen < self._frusize:
+            self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0]))
+        else:
+            raise FruException('bin data more than %d' % self._frusize, -2)
+
+    def recalcutebin(self):
+        self.bodybin = ""
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            d_print("internalUseArea present")
+            self.bodybin += self.internalUseArea.data
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            d_print("chassisInfoArea present")
+            self.bodybin += self.chassisInfoArea.data
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            d_print("boardInfoArea present")
+            self.boardInfoArea.recalcute()
+            self.bodybin += self.boardInfoArea.data
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            d_print("productInfoAreapresent")
+            self.productInfoArea.recalcute()
+            self.bodybin += self.productInfoArea.data
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            d_print("multiRecordArea present")
+            self.bodybin += self.productInfoArea.data
+
+    def recalcute(self, fru_eeprom_size=256):
+        self._frusize = fru_eeprom_size
+        self.recalcutebin()
+        self.recalcuteCommonHead()
+
+    def setValue(self, area, field, value):
+        tmp_area = getattr(self, area, None)
+        if tmp_area is not None:
+            tmp_area.fruSetValue(field, value)
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/hwsku.json b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/hwsku.json
new file mode 100644
index 000000000000..cadf2fb312eb
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/hwsku.json
@@ -0,0 +1,100 @@
+{
+    "interfaces": {
+        "Ethernet1": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet5": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet9": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet13": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet17": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet21": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet25": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet29": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet33": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet37": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet41": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet45": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet49": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet53": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet57": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet61": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet65": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet69": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet73": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet77": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet81": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet85": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet89": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet93": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet97": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet105": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet113": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet121": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet129": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet137": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet145": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet153": {
+            "default_brkout_mode": "1x400G"
+        }
+    }
+}
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/installer.conf b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/installer.conf
new file mode 100644
index 000000000000..7a9fec8cc99c
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/installer.conf
@@ -0,0 +1,2 @@
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll"
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/media_settings.json b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/media_settings.json
new file mode 100644
index 000000000000..1d7f598d2fe8
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/media_settings.json
@@ -0,0 +1,1476 @@
+{
+    "PORT_MEDIA_SETTINGS": {
+        "0": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "1": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "2": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "3": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "4": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "5": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "6": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "7": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "8": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "9": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "10": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "11": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "12": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "13": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "14": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "15": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "16": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "17": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "18": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "19": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "20": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff0"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "21": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "22": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "23": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "24": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000094",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000090",
+                    "lane6": "0x0000007C",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x00000000",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "25": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "26": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "27": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "28": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "29": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "30": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "31": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x0000007C",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        }
+    }
+}
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/monitor.py b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/monitor.py
new file mode 100644
index 000000000000..5fc287892e50
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/monitor.py
@@ -0,0 +1,402 @@
+#!/usr/bin/python3
+#   * onboard temperature sensors
+#   * FAN trays
+#   * PSU
+#
+import os
+from lxml import etree as ET
+import glob
+import json
+from decimal import Decimal
+from fru import ipmifru
+
+
+MAILBOX_DIR = "/sys/bus/i2c/devices/"
+BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type"
+BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow"
+
+
+CONFIG_NAME = "dev.xml"
+
+
+def byteTostr(val):
+    strtmp = ''
+    for value in val:
+        strtmp += chr(value)
+    return strtmp
+
+
+def typeTostr(val):
+    if isinstance(val, bytes):
+        strtmp = byteTostr(val)
+        return strtmp
+    return val
+
+
+def get_board_id():
+    if not os.path.exists(BOARD_ID_PATH):
+        return "NA"
+    with open(BOARD_ID_PATH) as fd:
+        id_str = fd.read().strip()
+    return "0x%x" % (int(id_str, 10))
+
+
+def getboardairflow():
+    if not os.path.exists(BOARD_AIRFLOW_PATH):
+        return "NA"
+    with open(BOARD_AIRFLOW_PATH) as fd:
+        airflow_str = fd.read().strip()
+    data = json.loads(airflow_str)
+    airflow = data.get("board", "NA")
+    return airflow
+
+
+boardid = get_board_id()
+boardairflow = getboardairflow()
+
+
+DEV_XML_FILE_LIST = [
+    "dev_" + boardid + "_" + boardairflow + ".xml",
+    "dev_" + boardid + ".xml",
+    "dev_" + boardairflow + ".xml",
+]
+
+
+def dev_file_read(path, offset, read_len):
+    retval = "ERR"
+    val_list = []
+    msg = ""
+    ret = ""
+    fd = -1
+
+    if not os.path.exists(path):
+        return False, "%s %s not found" % (retval, path)
+
+    try:
+        fd = os.open(path, os.O_RDONLY)
+        os.lseek(fd, offset, os.SEEK_SET)
+        ret = os.read(fd, read_len)
+        for item in ret:
+            val_list.append(item)
+    except Exception as e:
+        msg = str(e)
+        return False, "%s %s" % (retval, msg)
+    finally:
+        if fd > 0:
+            os.close(fd)
+    return True, val_list
+
+
+def getPMCreg(location):
+    retval = 'ERR'
+    if not os.path.isfile(location):
+        return "%s %s  notfound" % (retval, location)
+    try:
+        with open(location, 'r') as fd:
+            retval = fd.read()
+    except Exception as error:
+        return "ERR %s" % str(error)
+
+    retval = retval.rstrip('\r\n')
+    retval = retval.lstrip(" ")
+    return retval
+
+
+# Get a mailbox register
+def get_pmc_register(reg_name):
+    retval = 'ERR'
+    mb_reg_file = reg_name
+    filepath = glob.glob(mb_reg_file)
+    if len(filepath) == 0:
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    mb_reg_file = filepath[0]
+    if not os.path.isfile(mb_reg_file):
+        # print mb_reg_file,  'not found !'
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    try:
+        with open(mb_reg_file, 'rb') as fd:
+            retval = fd.read()
+        retval = typeTostr(retval)
+    except Exception as error:
+        retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error))
+
+    retval = retval.rstrip('\r\n')
+    retval = retval.lstrip(" ")
+    return retval
+
+
+class checktype():
+    def __init__(self, test1):
+        self.test1 = test1
+
+    @staticmethod
+    def getValue(location, bit, data_type, coefficient=1, addend=0):
+        try:
+            value_t = get_pmc_register(location)
+            if value_t.startswith("ERR") or value_t.startswith("NA"):
+                return value_t
+            if data_type == 1:
+                return float('%.1f' % ((float(value_t) / 1000) + addend))
+            if data_type == 2:
+                return float('%.1f' % (float(value_t) / 100))
+            if data_type == 3:
+                psu_status = int(value_t, 16)
+                return (psu_status & (1 << bit)) >> bit
+            if data_type == 4:
+                return int(value_t, 10)
+            if data_type == 5:
+                return float('%.1f' % (float(value_t) / 1000 / 1000))
+            if data_type == 6:
+                return Decimal(float(value_t) * coefficient / 1000).quantize(Decimal('0.000'))
+            return value_t
+        except Exception as e:
+            value_t = "ERR %s" % str(e)
+            return value_t
+
+    # fanFRU
+    @staticmethod
+    def decodeBinByValue(retval):
+        fru = ipmifru()
+        fru.decodeBin(retval)
+        return fru
+
+    @staticmethod
+    def getfruValue(prob_t, root, val):
+        try:
+            ret, binval_bytes = dev_file_read(val, 0, 256)
+            if ret is False:
+                return binval_bytes
+            binval = byteTostr(binval_bytes)
+            fanpro = {}
+            ret = checktype.decodeBinByValue(binval)
+            fanpro['fan_type'] = ret.productInfoArea.productName
+            fanpro['hw_version'] = ret.productInfoArea.productVersion
+            fanpro['sn'] = ret.productInfoArea.productSerialNumber
+            fan_display_name_dict = status.getDecodValue(root, "fan_display_name")
+            fan_name = fanpro['fan_type'].strip()
+            if len(fan_display_name_dict) == 0:
+                return fanpro
+            if fan_name not in fan_display_name_dict:
+                prob_t['errcode'] = -1
+                prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name)
+            else:
+                fanpro['fan_type'] = fan_display_name_dict[fan_name]
+            return fanpro
+        except Exception as error:
+            return "ERR " + str(error)
+
+    @staticmethod
+    def getslotfruValue(val):
+        try:
+            binval = checktype.getValue(val, 0, 0)
+            if binval.startswith("ERR"):
+                return binval
+            slotpro = {}
+            ret = checktype.decodeBinByValue(binval)
+            slotpro['slot_type'] = ret.boardInfoArea.boardProductName
+            slotpro['hw_version'] = ret.boardInfoArea.boardextra1
+            slotpro['sn'] = ret.boardInfoArea.boardSerialNumber
+            return slotpro
+        except Exception as error:
+            return "ERR " + str(error)
+
+    @staticmethod
+    def getpsufruValue(prob_t, root, val):
+        try:
+            psu_match = False
+            binval = checktype.getValue(val, 0, 0)
+            if binval.startswith("ERR"):
+                return binval
+            psupro = {}
+            ret = checktype.decodeBinByValue(binval)
+            psupro['type1'] = ret.productInfoArea.productPartModelName
+            psupro['sn'] = ret.productInfoArea.productSerialNumber
+            psupro['hw_version'] = ret.productInfoArea.productVersion
+            psu_dict = status.getDecodValue(root, "psutype")
+            psupro['type1'] = psupro['type1'].strip()
+            if len(psu_dict) == 0:
+                return psupro
+            for psu_name, display_name in psu_dict.items():
+                if psu_name.strip() == psupro['type1']:
+                    psupro['type1'] = display_name
+                    psu_match = True
+                    break
+            if psu_match is not True:
+                prob_t['errcode'] = -1
+                prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1'])
+            return psupro
+        except Exception as error:
+            return "ERR " + str(error)
+
+
+class status():
+    def __init__(self, productname):
+        self.productname = productname
+
+    @staticmethod
+    def getETroot(filename):
+        tree = ET.parse(filename)
+        root = tree.getroot()
+        return root
+
+    @staticmethod
+    def getDecodValue(collection, decode):
+        decodes = collection.find('decode')
+        testdecode = decodes.find(decode)
+        test = {}
+        if testdecode is None:
+            return test
+        for neighbor in testdecode.iter('code'):
+            test[neighbor.attrib["key"]] = neighbor.attrib["value"]
+        return test
+
+    @staticmethod
+    def getfileValue(location):
+        return checktype.getValue(location, " ", " ")
+
+    @staticmethod
+    def getETValue(a, filename, tagname):
+        root = status.getETroot(filename)
+        for neighbor in root.iter(tagname):
+            prob_t = {}
+            prob_t.update(neighbor.attrib)
+            prob_t['errcode'] = 0
+            prob_t['errmsg'] = ''
+            for pros in neighbor.iter("property"):
+                ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items()))
+                if ret.get('e2type') == 'fru' and ret.get("name") == "fru":
+                    fruval = checktype.getfruValue(prob_t, root, ret["location"])
+                    if isinstance(fruval, str) and fruval.startswith("ERR"):
+                        prob_t['errcode'] = -1
+                        prob_t['errmsg'] = fruval
+                        break
+                    prob_t.update(fruval)
+                    continue
+
+                if ret.get("name") == "psu" and ret.get('e2type') == 'fru':
+                    psuval = checktype.getpsufruValue(prob_t, root, ret["location"])
+                    if isinstance(psuval, str) and psuval.startswith("ERR"):
+                        prob_t['errcode'] = -1
+                        prob_t['errmsg'] = psuval
+                        break
+                    prob_t.update(psuval)
+                    continue
+
+                if ret.get("gettype") == "config":
+                    prob_t[ret["name"]] = ret["value"]
+                    continue
+
+                if 'type' not in ret.keys():
+                    val = "0"
+                else:
+                    val = ret["type"]
+                if 'bit' not in ret.keys():
+                    bit = "0"
+                else:
+                    bit = ret["bit"]
+                if 'coefficient' not in ret.keys():
+                    coefficient = 1
+                else:
+                    coefficient = float(ret["coefficient"])
+                if 'addend' not in ret.keys():
+                    addend = 0
+                else:
+                    addend = float(ret["addend"])
+
+                s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend)
+                if isinstance(s, str) and s.startswith("ERR"):
+                    prob_t['errcode'] = -1
+                    prob_t['errmsg'] = s
+                    break
+                if 'default' in ret.keys():
+                    rt = status.getDecodValue(root, ret['decode'])
+                    prob_t['errmsg'] = rt[str(s)]
+                    if str(s) != ret["default"]:
+                        prob_t['errcode'] = -1
+                        break
+                else:
+                    if 'decode' in ret.keys():
+                        rt = status.getDecodValue(root, ret['decode'])
+                        if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt):
+                            prob_t['errcode'] = -1
+                            prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" %
+                                                       (s.replace("\x00", "").rstrip()))
+                        else:
+                            s = rt[str(s).replace("\x00", "").rstrip()]
+                name = ret["name"]
+                prob_t[name] = str(s)
+            a.append(prob_t)
+
+    @staticmethod
+    def getCPUValue(a, filename, tagname):
+        root = status.getETroot(filename)
+        for neighbor in root.iter(tagname):
+            location = neighbor.attrib["location"]
+        L = []
+        for dirpath, dirnames, filenames in os.walk(location):
+            for file in filenames:
+                if file.endswith("input"):
+                    L.append(os.path.join(dirpath, file))
+            L = sorted(L, reverse=False)
+        for i in range(len(L)):
+            prob_t = {}
+            prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, i + 1))
+            prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, i + 1))) / 1000
+            prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, i + 1))) / 1000
+            prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, i + 1))) / 1000
+            prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, i + 1))) / 1000
+            a.append(prob_t)
+
+    @staticmethod
+    def getFileName():
+        fpath = os.path.dirname(os.path.realpath(__file__))
+        for file in DEV_XML_FILE_LIST:
+            xml = fpath + "/" + file
+            if os.path.exists(xml):
+                return xml
+        return fpath + "/" + CONFIG_NAME
+
+    @staticmethod
+    def checkFan(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "fan"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getTemp(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "temp"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getPsu(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "psu"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getcputemp(ret):
+        _filename = status.getFileName()
+        _tagname = "cpus"
+        status.getCPUValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getDcdc(ret):
+        _filename = status.getFileName()
+        _tagname = "dcdc"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getmactemp(ret):
+        _filename = status.getFileName()
+        _tagname = "mactemp"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getmacpower(ret):
+        _filename = status.getFileName()
+        _tagname = "macpower"
+        status.getETValue(ret, _filename, _tagname)
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/pcie.yaml
new file mode 100644
index 000000000000..ee025879f7f8
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/pcie.yaml
@@ -0,0 +1,581 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: 6f00
+  name: 'Host bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D DMI2
+    (rev 05)'
+- bus: '00'
+  dev: '01'
+  fn: '0'
+  id: 6f02
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 1 (rev 05)'
+- bus: '00'
+  dev: '01'
+  fn: '1'
+  id: 6f03
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 1 (rev 05)'
+- bus: '00'
+  dev: '02'
+  fn: '0'
+  id: 6f04
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 05)'
+- bus: '00'
+  dev: '02'
+  fn: '2'
+  id: 6f06
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 05)'
+- bus: '00'
+  dev: '02'
+  fn: '3'
+  id: 6f07
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 05)'
+- bus: '00'
+  dev: '03'
+  fn: '0'
+  id: 6f08
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 05)'
+- bus: '00'
+  dev: '03'
+  fn: '1'
+  id: 6f09
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 05)'
+- bus: '00'
+  dev: '03'
+  fn: '2'
+  id: 6f0a
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 05)'
+- bus: '00'
+  dev: '03'
+  fn: '3'
+  id: 6f0b
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 05)'
+- bus: '00'
+  dev: '04'
+  fn: '0'
+  id: 6f20
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Crystal Beach DMA Channel 0 (rev 05)'
+- bus: '00'
+  dev: '04'
+  fn: '1'
+  id: 6f21
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Crystal Beach DMA Channel 1 (rev 05)'
+- bus: '00'
+  dev: '04'
+  fn: '2'
+  id: 6f22
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Crystal Beach DMA Channel 2 (rev 05)'
+- bus: '00'
+  dev: '04'
+  fn: '3'
+  id: 6f23
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Crystal Beach DMA Channel 3 (rev 05)'
+- bus: '00'
+  dev: '04'
+  fn: '4'
+  id: 6f24
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Crystal Beach DMA Channel 4 (rev 05)'
+- bus: '00'
+  dev: '04'
+  fn: '5'
+  id: 6f25
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Crystal Beach DMA Channel 5 (rev 05)'
+- bus: '00'
+  dev: '04'
+  fn: '6'
+  id: 6f26
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Crystal Beach DMA Channel 6 (rev 05)'
+- bus: '00'
+  dev: '04'
+  fn: '7'
+  id: 6f27
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Crystal Beach DMA Channel 7 (rev 05)'
+- bus: '00'
+  dev: '05'
+  fn: '0'
+  id: 6f28
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Map/VTd_Misc/System Management (rev 05)'
+- bus: '00'
+  dev: '05'
+  fn: '1'
+  id: 6f29
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Hot Plug (rev 05)'
+- bus: '00'
+  dev: '05'
+  fn: '2'
+  id: 6f2a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO RAS/Control Status/Global Errors (rev 05)'
+- bus: '00'
+  dev: '05'
+  fn: '4'
+  id: 6f2c
+  name: 'PIC: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D I/O APIC (rev
+    05)'
+- bus: '00'
+  dev: '05'
+  fn: '6'
+  id: 6f39
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IO Performance Monitoring (rev 05)'
+- bus: '00'
+  dev: '06'
+  fn: '0'
+  id: 6f10
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '06'
+  fn: '1'
+  id: 6f11
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '06'
+  fn: '2'
+  id: 6f12
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '06'
+  fn: '3'
+  id: 6f13
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '06'
+  fn: '4'
+  id: 6f14
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '06'
+  fn: '5'
+  id: 6f15
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '06'
+  fn: '6'
+  id: 6f16
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '06'
+  fn: '7'
+  id: 6f17
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '07'
+  fn: '0'
+  id: 6f18
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '07'
+  fn: '1'
+  id: 6f19
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '07'
+  fn: '2'
+  id: 6f1a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '07'
+  fn: '3'
+  id: 6f1b
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '07'
+  fn: '4'
+  id: 6f1c
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 8c31
+  name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
+    xHCI (rev 05)'
+- bus: '00'
+  dev: '16'
+  fn: '0'
+  id: 8c3a
+  name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset
+    Family MEI Controller #1 (rev 04)'
+- bus: '00'
+  dev: '16'
+  fn: '1'
+  id: 8c3b
+  name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset
+    Family MEI Controller #2 (rev 04)'
+- bus: '00'
+  dev: 1d
+  fn: '0'
+  id: 8c26
+  name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
+    EHCI #1 (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: 8c54
+  name: 'ISA bridge: Intel Corporation C224 Series Chipset Family Server Standard
+    SKU LPC Controller (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '2'
+  id: 8c02
+  name: 'SATA controller: Intel Corporation 8 Series/C220 Series Chipset Family 6-port
+    SATA Controller 1 [AHCI mode] (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '3'
+  id: 8c22
+  name: 'SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller
+    (rev 05)'
+- bus: '04'
+  dev: '00'
+  fn: '0'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '04'
+  dev: '00'
+  fn: '1'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '05'
+  dev: '00'
+  fn: '0'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '05'
+  dev: '00'
+  fn: '1'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '06'
+  dev: '00'
+  fn: '0'
+  id: b780
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b780 (rev 01)'
+- bus: '07'
+  dev: '00'
+  fn: '0'
+  id: '1537'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Backplane Connection
+    (rev 03)'
+- bus: 08
+  dev: '00'
+  fn: '0'
+  id: '7011'
+  name: 'Memory controller: Xilinx Corporation Device 7011'
+- bus: ff
+  dev: 0b
+  fn: '0'
+  id: 6f81
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 05)'
+- bus: ff
+  dev: 0b
+  fn: '1'
+  id: 6f36
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 05)'
+- bus: ff
+  dev: 0b
+  fn: '2'
+  id: 6f37
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 05)'
+- bus: ff
+  dev: 0b
+  fn: '3'
+  id: 6f76
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link Debug (rev 05)'
+- bus: ff
+  dev: 0c
+  fn: '0'
+  id: 6fe0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 05)'
+- bus: ff
+  dev: 0c
+  fn: '1'
+  id: 6fe1
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 05)'
+- bus: ff
+  dev: 0c
+  fn: '2'
+  id: 6fe2
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 05)'
+- bus: ff
+  dev: 0c
+  fn: '3'
+  id: 6fe3
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 05)'
+- bus: ff
+  dev: 0f
+  fn: '0'
+  id: 6ff8
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 05)'
+- bus: ff
+  dev: 0f
+  fn: '4'
+  id: 6ffc
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 05)'
+- bus: ff
+  dev: 0f
+  fn: '5'
+  id: 6ffd
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 05)'
+- bus: ff
+  dev: 0f
+  fn: '6'
+  id: 6ffe
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 05)'
+- bus: ff
+  dev: '10'
+  fn: '0'
+  id: 6f1d
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R2PCIe Agent (rev 05)'
+- bus: ff
+  dev: '10'
+  fn: '1'
+  id: 6f34
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R2PCIe Agent (rev 05)'
+- bus: ff
+  dev: '10'
+  fn: '5'
+  id: 6f1e
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 05)'
+- bus: ff
+  dev: '10'
+  fn: '6'
+  id: 6f7d
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 05)'
+- bus: ff
+  dev: '10'
+  fn: '7'
+  id: 6f1f
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 05)'
+- bus: ff
+  dev: '12'
+  fn: '0'
+  id: 6fa0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Home Agent 0 (rev 05)'
+- bus: ff
+  dev: '12'
+  fn: '1'
+  id: 6f30
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Home Agent 0 (rev 05)'
+- bus: ff
+  dev: '12'
+  fn: '2'
+  id: 6f70
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Home Agent 0 Debug (rev 05)'
+- bus: ff
+  dev: '13'
+  fn: '0'
+  id: 6fa8
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Target Address/Thermal/RAS (rev 05)'
+- bus: ff
+  dev: '13'
+  fn: '1'
+  id: 6f71
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Target Address/Thermal/RAS (rev 05)'
+- bus: ff
+  dev: '13'
+  fn: '2'
+  id: 6faa
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 05)'
+- bus: ff
+  dev: '13'
+  fn: '3'
+  id: 6fab
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 05)'
+- bus: ff
+  dev: '13'
+  fn: '4'
+  id: 6fac
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 05)'
+- bus: ff
+  dev: '13'
+  fn: '5'
+  id: 6fad
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 05)'
+- bus: ff
+  dev: '13'
+  fn: '6'
+  id: 6fae
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Broadcast (rev 05)'
+- bus: ff
+  dev: '13'
+  fn: '7'
+  id: 6faf
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Global Broadcast (rev 05)'
+- bus: ff
+  dev: '14'
+  fn: '0'
+  id: 6fb0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 0 Thermal Control (rev 05)'
+- bus: ff
+  dev: '14'
+  fn: '1'
+  id: 6fb1
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 1 Thermal Control (rev 05)'
+- bus: ff
+  dev: '14'
+  fn: '2'
+  id: 6fb2
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 0 Error (rev 05)'
+- bus: ff
+  dev: '14'
+  fn: '3'
+  id: 6fb3
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 1 Error (rev 05)'
+- bus: ff
+  dev: '14'
+  fn: '4'
+  id: 6fbc
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 05)'
+- bus: ff
+  dev: '14'
+  fn: '5'
+  id: 6fbd
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 05)'
+- bus: ff
+  dev: '14'
+  fn: '6'
+  id: 6fbe
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 05)'
+- bus: ff
+  dev: '14'
+  fn: '7'
+  id: 6fbf
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 05)'
+- bus: ff
+  dev: '15'
+  fn: '0'
+  id: 6fb4
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 2 Thermal Control (rev 05)'
+- bus: ff
+  dev: '15'
+  fn: '1'
+  id: 6fb5
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 3 Thermal Control (rev 05)'
+- bus: ff
+  dev: '15'
+  fn: '2'
+  id: 6fb6
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 2 Error (rev 05)'
+- bus: ff
+  dev: '15'
+  fn: '3'
+  id: 6fb7
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 3 Error (rev 05)'
+- bus: ff
+  dev: 1e
+  fn: '0'
+  id: 6f98
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 05)'
+- bus: ff
+  dev: 1e
+  fn: '1'
+  id: 6f99
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 05)'
+- bus: ff
+  dev: 1e
+  fn: '2'
+  id: 6f9a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 05)'
+- bus: ff
+  dev: 1e
+  fn: '3'
+  id: 6fc0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 05)'
+- bus: ff
+  dev: 1e
+  fn: '4'
+  id: 6f9c
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 05)'
+- bus: ff
+  dev: 1e
+  fn: '7'
+  id: 6f9f
+  name: 'System peripheral: Intel Corporation Device 6f9f (rev 05)'
+- bus: ff
+  dev: 1f
+  fn: '0'
+  id: 6f88
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 05)'
+- bus: ff
+  dev: 1f
+  fn: '2'
+  id: 6f8a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 05)'
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/platform.json b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/platform.json
new file mode 100644
index 000000000000..d22eee94c31b
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/platform.json
@@ -0,0 +1,1010 @@
+{
+    "chassis": {
+        "name": "M2-W6520-24DC8QC",
+        "thermal_manager": false,
+        "status_led": {
+            "controllable": false,
+            "colors": [
+                "green",
+                "blinking_green",
+                "amber",
+                "blinking_amber"
+            ]
+        },
+        "components": [
+            {
+                "name": "CPU_CPLD"
+            },
+            {
+                "name": "CONNECT_CPLD"
+            },
+            {
+                "name": "MAC_CPLDA"
+            },
+            {
+                "name": "MAC_CPLDB"
+            },
+            {
+                "name": "FAN_CPLD"
+            },
+            {
+                "name": "FPGA"
+            },
+            {
+                "name": "BIOS"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fantray1_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray1_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray2_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray2_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray3_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray3_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray4_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray4_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray5_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray5_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray6_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray6_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            }
+        ],
+        "fan_drawers": [
+            {
+                "name": "Fantray1",
+                "num_fans": 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": [
+                        "amber",
+                        "green",
+                        "off"
+                    ]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray1_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray1_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray2",
+                "num_fans": 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": [
+                        "amber",
+                        "green",
+                        "off"
+                    ]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray2_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray2_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray3",
+                "num_fans": 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": [
+                        "amber",
+                        "green",
+                        "off"
+                    ]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray3_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray3_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray4",
+                "num_fans": 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": [
+                        "amber",
+                        "green",
+                        "off"
+                    ]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray4_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray4_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray5",
+                "num_fans": 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": [
+                        "amber",
+                        "green",
+                        "off"
+                    ]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray5_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray5_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray6",
+                "num_fans": 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": [
+                        "amber",
+                        "green",
+                        "off"
+                    ]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray6_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray6_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "Psu1",
+                "voltage": true,
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": true,
+                "voltage_low_threshold": true,
+                "temperature": true,
+                "fans_target_speed": true,
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "PSU1_FAN1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Psu2",
+                "voltage": true,
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": true,
+                "voltage_low_threshold": true,
+                "temperature": true,
+                "fans_target_speed": true,
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "PSU2_FAN1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "BOARD_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "CPU_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "INLET_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "OUTLET_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "ASIC_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "PSU1_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "PSU2_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            }
+        ],
+        "modules": [],
+        "sfps": []
+    },
+    "interfaces": {
+        "Ethernet1": {
+            "index": "0,0,0,0",
+            "lanes": "25,26,27,28",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth1"
+                ],
+                "2x100G": [
+                    "Eth1/1",
+                    "Eth1/2"
+                ]
+            }
+        },
+        "Ethernet5": {
+            "index": "1,1,1,1",
+            "lanes": "29,30,31,32",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth2"
+                ],
+                "2x100G": [
+                    "Eth2/1",
+                    "Eth2/2"
+                ]
+            }
+        },
+        "Ethernet9": {
+            "index": "2,2,2,2",
+            "lanes": "41,42,43,44",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth3"
+                ],
+                "2x100G": [
+                    "Eth3/1",
+                    "Eth3/2"
+                ]
+            }
+        },
+        "Ethernet13": {
+            "index": "3,3,3,3",
+            "lanes": "45,46,47,48",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth4"
+                ],
+                "2x100G": [
+                    "Eth4/1",
+                    "Eth4/2"
+                ]
+            }
+        },
+        "Ethernet17": {
+            "index": "4,4,4,4",
+            "lanes": "49,50,51,52",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth5"
+                ],
+                "2x100G": [
+                    "Eth5/1",
+                    "Eth5/2"
+                ]
+            }
+        },
+        "Ethernet21": {
+            "index": "5,5,5,5",
+            "lanes": "53,54,55,56",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth6"
+                ],
+                "2x100G": [
+                    "Eth6/1",
+                    "Eth6/2"
+                ]
+            }
+        },
+        "Ethernet25": {
+            "index": "6,6,6,6",
+            "lanes": "57,58,59,60",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth7"
+                ],
+                "2x100G": [
+                    "Eth7/1",
+                    "Eth7/2"
+                ]
+            }
+        },
+        "Ethernet29": {
+            "index": "7,7,7,7",
+            "lanes": "61,62,63,64",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth8"
+                ],
+                "2x100G": [
+                    "Eth8/1",
+                    "Eth8/2"
+                ]
+            }
+        },
+        "Ethernet33": {
+            "index": "8,8,8,8",
+            "lanes": "9,10,11,12",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth9"
+                ],
+                "2x100G": [
+                    "Eth9/1",
+                    "Eth9/2"
+                ]
+            }
+        },
+        "Ethernet37": {
+            "index": "9,9,9,9",
+            "lanes": "13,14,15,16",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth10"
+                ],
+                "2x100G": [
+                    "Eth10/1",
+                    "Eth10/2"
+                ]
+            }
+        },
+        "Ethernet41": {
+            "index": "10,10,10,10",
+            "lanes": "17,18,19,20",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth11"
+                ],
+                "2x100G": [
+                    "Eth11/1",
+                    "Eth11/2"
+                ]
+            }
+        },
+        "Ethernet45": {
+            "index": "11,11,11,11",
+            "lanes": "21,22,23,24",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth12"
+                ],
+                "2x100G": [
+                    "Eth12/1",
+                    "Eth12/2"
+                ]
+            }
+        },
+        "Ethernet49": {
+            "index": "12,12,12,12",
+            "lanes": "81,82,83,84",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth13"
+                ],
+                "2x100G": [
+                    "Eth13/1",
+                    "Eth13/2"
+                ]
+            }
+        },
+        "Ethernet53": {
+            "index": "13,13,13,13",
+            "lanes": "85,86,87,88",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth14"
+                ],
+                "2x100G": [
+                    "Eth14/1",
+                    "Eth14/2"
+                ]
+            }
+        },
+        "Ethernet57": {
+            "index": "14,14,14,14",
+            "lanes": "89,90,91,92",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth15"
+                ],
+                "2x100G": [
+                    "Eth15/1",
+                    "Eth15/2"
+                ]
+            }
+        },
+        "Ethernet61": {
+            "index": "15,15,15,15",
+            "lanes": "93,94,95,96",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth16"
+                ],
+                "2x100G": [
+                    "Eth16/1",
+                    "Eth16/2"
+                ]
+            }
+        },
+        "Ethernet65": {
+            "index": "16,16,16,16",
+            "lanes": "97,98,99,100",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth17"
+                ],
+                "2x100G": [
+                    "Eth17/1",
+                    "Eth17/2"
+                ]
+            }
+        },
+        "Ethernet69": {
+            "index": "17,17,17,17",
+            "lanes": "101,102,103,104",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth18"
+                ],
+                "2x100G": [
+                    "Eth18/1",
+                    "Eth18/2"
+                ]
+            }
+        },
+        "Ethernet73": {
+            "index": "18,18,18,18",
+            "lanes": "137,138,139,140",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth19"
+                ],
+                "2x100G": [
+                    "Eth19/1",
+                    "Eth19/2"
+                ]
+            }
+        },
+        "Ethernet77": {
+            "index": "19,19,19,19",
+            "lanes": "141,142,143,144",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth20"
+                ],
+                "2x100G": [
+                    "Eth20/1",
+                    "Eth20/2"
+                ]
+            }
+        },
+        "Ethernet81": {
+            "index": "20,20,20,20",
+            "lanes": "145,146,147,148",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth21"
+                ],
+                "2x100G": [
+                    "Eth21/1",
+                    "Eth21/2"
+                ]
+            }
+        },
+        "Ethernet85": {
+            "index": "21,21,21,21",
+            "lanes": "149,150,151,152",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth22"
+                ],
+                "2x100G": [
+                    "Eth22/1",
+                    "Eth22/2"
+                ]
+            }
+        },
+        "Ethernet89": {
+            "index": "22,22,22,22",
+            "lanes": "153,154,155,156",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth23"
+                ],
+                "2x100G": [
+                    "Eth23/1",
+                    "Eth23/2"
+                ]
+            }
+        },
+        "Ethernet93": {
+            "index": "23,23,23,23",
+            "lanes": "157,158,159,160",
+            "breakout_modes": {
+                "1x200G": [
+                    "Eth24"
+                ],
+                "2x100G": [
+                    "Eth24/1",
+                    "Eth24/2"
+                ]
+            }
+        },
+        "Ethernet97": {
+            "index": "24,24,24,24,24,24,24,24",
+            "lanes": "1,2,3,4,5,6,7,8",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth25"
+                ],
+                "2x200G[100G]": [
+                    "Eth25/1",
+                    "Eth25/2"
+                ]
+            }
+        },
+        "Ethernet105": {
+            "index": "25,25,25,25,25,25,25,25",
+            "lanes": "33,34,35,36,37,38,39,40",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth26"
+                ],
+                "2x200G[100G]": [
+                    "Eth26/1",
+                    "Eth26/2"
+                ]
+            }
+        },
+        "Ethernet113": {
+            "index": "26,26,26,26,26,26,26,26",
+            "lanes": "65,66,67,68,69,70,71,72",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth27"
+                ],
+                "2x200G[100G]": [
+                    "Eth27/1",
+                    "Eth27/2"
+                ]
+            }
+        },
+        "Ethernet121": {
+            "index": "27,27,27,27,27,27,27,27",
+            "lanes": "73,74,75,76,77,78,79,80",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth28"
+                ],
+                "2x200G[100G]": [
+                    "Eth28/1",
+                    "Eth28/2"
+                ]
+            }
+        },
+        "Ethernet129": {
+            "index": "28,28,28,28,28,28,28,28",
+            "lanes": "105,106,107,108,109,110,111,112",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth29"
+                ],
+                "2x200G[100G]": [
+                    "Eth29/1",
+                    "Eth29/2"
+                ]
+            }
+        },
+        "Ethernet137": {
+            "index": "29,29,29,29,29,29,29,29",
+            "lanes": "113,114,115,116,117,118,119,120",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth30"
+                ],
+                "2x200G[100G]": [
+                    "Eth30/1",
+                    "Eth30/2"
+                ]
+            }
+        },
+        "Ethernet145": {
+            "index": "30,30,30,30,30,30,30,30",
+            "lanes": "121,122,123,124,125,126,127,128",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth31"
+                ],
+                "2x200G[100G]": [
+                    "Eth31/1",
+                    "Eth31/2"
+                ]
+            }
+        },
+        "Ethernet153": {
+            "index": "31,31,31,31,31,31,31,31",
+            "lanes": "129,130,131,132,133,134,135,136",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth32"
+                ],
+                "2x200G[100G]": [
+                    "Eth32/1",
+                    "Eth32/2"
+                ]
+            }
+        }
+    }
+}
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/platform_asic b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/platform_asic
new file mode 100644
index 000000000000..960467652765
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/platform_components.json
new file mode 100644
index 000000000000..8fc136f7b9b1
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/platform_components.json
@@ -0,0 +1,16 @@
+{
+    "chassis": {
+        "M2-W6520-24DC8QC": {
+            "component": {
+                "CPU_CPLD": { },
+                "CONNECT_CPLD": { },
+                "FAN_CPLD": { },
+                "MAC_CPLDA": { },
+                "MAC_CPLDB": { },
+                "FPGA": { },
+                "BIOS": { }
+            }
+        }
+    }
+}
+
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/platform_env.conf b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/platform_env.conf
new file mode 100644
index 000000000000..fc119184d5c1
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/platform_env.conf
@@ -0,0 +1,2 @@
+is_ltsw_chip=1
+SYNCD_SHM_SIZE=1g
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/plugins/sfputil.py
new file mode 100644
index 000000000000..f6c4e0477c57
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/plugins/sfputil.py
@@ -0,0 +1,365 @@
+# sfputil.py
+#
+# Platform-specific SFP transceiver interface for SONiC
+#
+
+try:
+    import time
+    import re
+    import os
+    import threading
+    import traceback
+    import subprocess
+    from ctypes import create_string_buffer
+    from sonic_sfp.sfputilbase import SfpUtilBase
+    from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom
+except ImportError as e:
+    raise ImportError("%s - required module not found" % str(e))
+
+class SfpUtil(SfpUtilBase):
+    """Platform-specific SfpUtil class"""
+
+    PORT_START = 0
+    PORT_END = 31
+    PORTS_IN_BLOCK = 32
+
+    EEPROM_OFFSET = 46
+    SFP_DEVICE_TYPE = "optoe2"
+    QSFP_DEVICE_TYPE = "optoe1"
+    QSFP_DD_DEVICE_TYPE = "optoe3"
+    I2C_MAX_ATTEMPT = 3
+
+    OPTOE_TYPE1 = 1
+    OPTOE_TYPE2 = 2
+    OPTOE_TYPE3 = 3
+
+    SFP_STATUS_INSERTED = '1'
+    SFP_STATUS_REMOVED = '0'
+
+    _port_to_eeprom_mapping = {}
+    port_to_i2cbus_mapping ={}
+    port_dict = {}
+
+    qsfp_ports_list = []
+    qsfp_dd_ports_list = []
+
+    @property
+    def port_start(self):
+        return self.PORT_START
+
+    @property
+    def port_end(self):
+        return self.PORT_END
+
+    @property
+    def qsfp_ports(self):
+        return self.qsfp_ports_list
+
+    @property
+    def qsfp_dd_ports(self):
+        return self.qsfp_dd_ports_list
+
+    @property
+    def port_to_eeprom_mapping(self):
+        return self._port_to_eeprom_mapping
+
+    def __init__(self):
+        self.qsfp_ports_list = []
+        self.qsfp_dd_ports_list = []
+        for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+            self.port_to_i2cbus_mapping[x] = (x + self.EEPROM_OFFSET)
+
+            if self.get_presence(x):
+                self.port_dict[x] = self.SFP_STATUS_INSERTED
+            else:
+                self.port_dict[x] = self.SFP_STATUS_REMOVED
+
+            if (self.check_is_qsfpdd(x)):
+                self.qsfp_dd_ports_list.append(x)
+                self.check_optoe_type(x, self.OPTOE_TYPE3)
+            else:
+                self.qsfp_ports_list.append(x)
+                self.check_optoe_type(x, self.OPTOE_TYPE1)
+        SfpUtilBase.__init__(self)
+
+    def _sfp_read_file_path(self, file_path, offset, num_bytes):
+        attempts = 0
+        while attempts < self.I2C_MAX_ATTEMPT:
+            try:
+                file_path.seek(offset)
+                read_buf = file_path.read(num_bytes)
+            except:
+                attempts += 1
+                time.sleep(0.05)
+            else:
+                return True, read_buf
+        return False, None
+
+    def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset):
+        """Tries to read the eeprom file to determine if the
+        device/sfp is present or not. If sfp present, the read returns
+        valid bytes. If not, read returns error 'Connection timed out"""
+
+        if not os.path.exists(sysfs_sfp_i2c_client_eeprompath):
+            return False
+        else:
+            with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile:
+                rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1)
+                return rv
+
+    def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype):
+        try:
+            sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path
+
+            # Write device address to new_device file
+            nd_file = open(sysfs_nd_path, "w")
+            nd_str = "%s %s" % (devtype, hex(devaddr))
+            nd_file.write(nd_str)
+            nd_file.close()
+
+        except Exception as err:
+            print("Error writing to new device file: %s" % str(err))
+            return 1
+        else:
+            return 0
+
+    def _get_port_eeprom_path(self, port_num, devid):
+        sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+        if port_num in self.port_to_eeprom_mapping.keys():
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num]
+        else:
+            sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+            i2c_adapter_id = self._get_port_i2c_adapter_id(port_num)
+            if i2c_adapter_id is None:
+                print("Error getting i2c bus num")
+                return None
+
+            # Get i2c virtual bus path for the sfp
+            sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path,
+                                                        str(i2c_adapter_id))
+
+            # If i2c bus for port does not exist
+            if not os.path.exists(sysfs_sfp_i2c_adapter_path):
+                print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path)
+                return None
+
+            sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path,
+                                                        str(i2c_adapter_id),
+                                                        hex(devid)[-2:])
+
+            # If sfp device is not present on bus, Add it
+            if not os.path.exists(sysfs_sfp_i2c_client_path):
+                if port_num in self.qsfp_dd_ports:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DD_DEVICE_TYPE)
+                elif  port_num in self.qsfp_ports:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE)
+                else:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE)
+                if ret != 0:
+                    print("Error adding sfp device")
+                    return None
+
+            sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path
+
+        return sysfs_sfp_i2c_client_eeprom_path
+
+    def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes):
+        eeprom_raw = []
+        for i in range(0, num_bytes):
+            eeprom_raw.append("0x00")
+
+        rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes)
+        if rv == False:
+            return None
+
+        try:
+            for n in range(0, num_bytes):
+                eeprom_raw[n] = hex(raw[n])[2:].zfill(2)
+        except:
+            return None
+
+        return eeprom_raw
+
+    def get_eeprom_dom_raw(self, port_num):
+        if port_num in self.qsfp_ports:
+            # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw
+            return None
+        else:
+            # Read dom eeprom at addr 0x51
+            return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256)
+
+    def get_presence(self, port_num):
+        # Check for invalid port_num
+        if port_num < self.port_start or port_num > self.port_end:
+            return False
+
+        cmd = "cat /sys/wb_plat/sff/sff{}/present".format(str(port_num+1))
+        ret, output = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            return False
+        if output == "1":
+            return True
+        return False
+
+    def check_is_qsfpdd(self, port_num):
+        try:
+            if self.get_presence(port_num) == False:
+                return False
+
+            eeprom_path = self._get_port_eeprom_path(port_num, 0x50)
+            with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+                eeprom_raw = self._read_eeprom_specific_bytes(eeprom, 0, 1)
+                # according to sff-8024 A0h Byte 0 is '1e' or '18' means the transceiver is qsfpdd
+                if (eeprom_raw[0] == '1e' or eeprom_raw[0] == '18'):
+                    return True
+        except Exception as e:
+            print(traceback.format_exc())
+
+        return False
+
+    def check_optoe_type(self, port_num, optoe_type):
+        if self.get_presence(port_num) == False:
+            return True
+        try:
+            eeprom_path = self._get_port_eeprom_path(port_num, 0x50)
+            dev_class_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/dev_class'
+            i2c_path = dev_class_path.format(str(self.port_to_i2cbus_mapping[port_num]))
+            cmd = "cat " + i2c_path
+            ret, output = subprocess.getstatusoutput(cmd)
+            if ret != 0:
+                print("cmd: %s execution fail, output:%s" % (cmd, output))
+                return False
+            if int(output) != optoe_type:
+                cmd = "echo " + str(optoe_type) + " > " + i2c_path
+                ret, output = subprocess.getstatusoutput(cmd)
+                if ret != 0:
+                    print("cmd: %s execution fail, output:%s" % (cmd, output))
+                    return False
+            return True
+
+        except Exception as e:
+            print(traceback.format_exc())
+            return False
+
+    def get_low_power_mode(self, port_num):
+        # Check for invalid port_num
+
+        return True
+
+    def set_low_power_mode(self, port_num, lpmode):
+        # Check for invalid port_num
+
+        return True
+
+    def reset(self, port_num):
+        # Check for invalid port_num
+        if port_num < self.port_start or port_num > self.port_end:
+            return False
+
+        return True
+
+    def get_transceiver_change_event(self, timeout=0):
+
+        start_time = time.time()
+        current_port_dict = {}
+        forever = False
+
+        if timeout == 0:
+            forever = True
+        elif timeout > 0:
+            timeout = timeout / float(1000) # Convert to secs
+        else:
+            print ("get_transceiver_change_event:Invalid timeout value", timeout)
+            return False, {}
+
+        end_time = start_time + timeout
+        if start_time > end_time:
+            print ('get_transceiver_change_event:' \
+                       'time wrap / invalid timeout value', timeout)
+
+            return False, {} # Time wrap or possibly incorrect timeout
+
+        while timeout >= 0:
+            # Check for OIR events and return updated port_dict
+            for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+                if self.get_presence(x):
+                    current_port_dict[x] = self.SFP_STATUS_INSERTED
+                else:
+                    current_port_dict[x] = self.SFP_STATUS_REMOVED
+            if (current_port_dict == self.port_dict):
+                if forever:
+                    time.sleep(1)
+                else:
+                    timeout = end_time - time.time()
+                    if timeout >= 1:
+                        time.sleep(1) # We poll at 1 second granularity
+                    else:
+                        if timeout > 0:
+                            time.sleep(timeout)
+                        return True, {}
+            else:
+                # Update reg value
+                self.port_dict = current_port_dict
+                return True, self.port_dict
+        print ("get_transceiver_change_event: Should not reach here.")
+        return False, {}
+
+    def get_highest_temperature(self):
+        offset = 0
+        hightest_temperature = -9999
+
+        presence_flag = False
+        read_eeprom_flag = False
+        temperature_valid_flag = False
+
+        for port in range(self.PORT_START, self.PORTS_IN_BLOCK):
+            if self.get_presence(port) == False:
+                continue
+
+            presence_flag = True
+
+            if port in self.qsfp_dd_ports:
+                offset = 14
+            elif port in self.qsfp_ports:
+                offset = 22
+            else:
+                offset = 96
+
+            eeprom_path = self._get_port_eeprom_path(port, 0x50)
+            try:
+                with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+                    read_eeprom_flag = True
+                    eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2)
+                    if len(eeprom_raw) != 0:
+                        msb = int(eeprom_raw[0], 16)
+                        lsb = int(eeprom_raw[1], 16)
+
+                        result = (msb << 8) | (lsb & 0xff)
+                        result = float(result / 256.0)
+                        if -50 <= result <= 200:
+                            temperature_valid_flag = True
+                            if hightest_temperature < result:
+                                hightest_temperature = result
+            except Exception as e:
+                pass
+
+        # all port not presence
+        if presence_flag == False:
+            hightest_temperature = -10000
+
+        # all port read eeprom fail
+        elif read_eeprom_flag == False:
+            hightest_temperature = -9999
+
+        # all port temperature invalid
+        elif read_eeprom_flag == True and temperature_valid_flag == False:
+            hightest_temperature = -10000
+
+        hightest_temperature = round(hightest_temperature, 2)
+
+        return hightest_temperature
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/plugins/ssd_util.py
new file mode 100644
index 000000000000..e8cf2e1a7cbc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/plugins/ssd_util.py
@@ -0,0 +1,318 @@
+#
+# ssd_util.py
+#
+# Generic implementation of the SSD health API
+# SSD models supported:
+#  - InnoDisk
+#  - StorFly
+#  - Virtium
+
+try:
+    import re
+    import os
+    import subprocess
+    from sonic_platform_base.sonic_storage.storage_base import StorageBase
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+SMARTCTL = "smartctl {} -a"
+INNODISK = "iSmart -d {}"
+VIRTIUM  = "SmartCmd -m {}"
+DISK_LIST_CMD = "fdisk -l -o Device"
+DISK_FREE_CMD = "df -h"
+MOUNT_CMD = "mount"
+
+NOT_AVAILABLE = "N/A"
+PE_CYCLE = 3000
+FAIL_PERCENT = 95
+
+# Set Vendor Specific IDs
+INNODISK_HEALTH_ID = 169
+INNODISK_TEMPERATURE_ID = 194
+
+class SsdUtil(StorageBase):
+    """
+    Generic implementation of the SSD health API
+    """
+    model = NOT_AVAILABLE
+    serial = NOT_AVAILABLE
+    firmware = NOT_AVAILABLE
+    temperature = NOT_AVAILABLE
+    health = NOT_AVAILABLE
+    remaining_life = NOT_AVAILABLE
+    sata_rate = NOT_AVAILABLE
+    ssd_info = NOT_AVAILABLE
+    vendor_ssd_info = NOT_AVAILABLE
+
+    def __init__(self, diskdev):
+        self.vendor_ssd_utility = {
+            "Generic"  : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info },
+            "InnoDisk" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+            "M.2"      : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+            "StorFly"  : { "utility" : VIRTIUM,  "parser" : self.parse_virtium_info },
+            "Virtium"  : { "utility" : VIRTIUM,  "parser" : self.parse_virtium_info }
+        }
+
+        """
+        The dict model_attr keys relate the vendors
+        LITEON : "ER2-GD","AF2MA31DTDLT"
+        Intel  : "SSDSCKKB"
+        SMI    : "SM619GXC"
+        samsung: "MZNLH"
+        ADATA  : "IM2S3134N"
+        """
+        self.model_attr = {
+             "ER2-GD"       : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+             "AF2MA31DTDLT" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+             "SSDSCK"       : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n233\s+(.+?)\n" },
+             "SM619GXC"     : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n169\s+(.+?)\n" },
+             "MZNLH"        : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n245\s+(.+?)\n" },
+             "IM2S3134N"    : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n231\s+(.+?)\n" },
+             "MTFDDAV240TCB-1AR1ZABAA"    : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }
+        }
+
+        self.key_list = list(self.model_attr.keys())
+        self.attr_info_rule = "[\s\S]*SMART Attributes Data Structure revision number: 1|SMART Error Log Version[\s\S]*"
+        self.dev = diskdev
+        # Generic part
+        self.fetch_generic_ssd_info(diskdev)
+        self.parse_generic_ssd_info()
+        self.fetch_vendor_ssd_info(diskdev, "Generic")
+        
+        # Known vendor part
+        if self.model:
+            model_short = self.model.split()[0]
+            if model_short in self.vendor_ssd_utility:
+                self.fetch_vendor_ssd_info(diskdev, model_short)
+                self.parse_vendor_ssd_info(model_short)
+            else:
+                # No handler registered for this disk model
+                pass
+        else:
+            # Failed to get disk model
+            self.model = "Unknown"
+
+    def _execute_shell(self, cmd):
+        process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE)
+        output, error = process.communicate()
+        exit_code = process.returncode
+        if exit_code:
+            return None
+        return output
+
+    def _parse_re(self, pattern, buffer):
+        res_list = re.findall(pattern, str(buffer))
+        return res_list[0] if res_list else NOT_AVAILABLE
+
+    def fetch_generic_ssd_info(self, diskdev):
+        self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev))
+
+    # Health and temperature values may be overwritten with vendor specific data
+    def parse_generic_ssd_info(self):
+        if "nvme" in self.dev:
+            self.model = self._parse_re('Model Number:\s*(.+?)\n', self.ssd_info)
+
+            health_raw = self._parse_re('Percentage Used\s*(.+?)\n', self.ssd_info)
+            if health_raw == NOT_AVAILABLE:
+                self.health = NOT_AVAILABLE
+            else:
+                health_raw = health_raw.split()[-1]
+                self.health = 100 - float(health_raw.strip('%'))
+
+            temp_raw = self._parse_re('Temperature\s*(.+?)\n', self.ssd_info)
+            if temp_raw == NOT_AVAILABLE:
+                self.temperature = NOT_AVAILABLE
+            else:
+                temp_raw = temp_raw.split()[-2]
+                self.temperature = float(temp_raw)
+        else:
+            self.model = self._parse_re('Device Model:\s*(.+?)\n', self.ssd_info)
+            model_key = ""
+            for key in self.key_list:
+                if re.search(key, self.model):
+                    model_key = key
+                    break
+            if  model_key != "":
+                self.remaining_life = self._parse_re(self.model_attr[model_key]["remainingLife"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[2]
+                self.temperature = self._parse_re(self.model_attr[model_key]["temperature"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[8]
+                self.health = self.remaining_life
+            # Get the LITEON ssd health value by (PE CYCLE - AVG ERASE CYCLE )/(PE CYCLE)
+            if model_key in ["ER2-GD", "AF2MA31DTDLT"]:
+                avg_erase = int(self._parse_re('\n173\s+(.+?)\n' ,re.sub(self.attr_info_rule,"",self.ssd_info)).split()[-1])
+                self.health = int(round((PE_CYCLE - avg_erase)/PE_CYCLE*100,0))
+            if self.remaining_life != NOT_AVAILABLE and  int(self.remaining_life) < FAIL_PERCENT:
+                self.remaining_life = "Fail"
+        self.sata_rate = self._parse_re('SATA Version is:.*current: (.+?)\)\n', self.ssd_info)
+        self.serial = self._parse_re('Serial Number:\s*(.+?)\n', self.ssd_info)
+        self.firmware = self._parse_re('Firmware Version:\s*(.+?)\n', self.ssd_info)
+
+    def parse_innodisk_info(self):
+        if self.vendor_ssd_info:
+            self.health = self._parse_re('Health:\s*(.+?)%', self.vendor_ssd_info)
+            self.temperature = self._parse_re('Temperature\s*\[\s*(.+?)\]', self.vendor_ssd_info)
+        else:
+            if self.health == NOT_AVAILABLE:
+                health_raw = self.parse_id_number(INNODISK_HEALTH_ID)
+                self.health = health_raw.split()[-1]
+            if self.temperature == NOT_AVAILABLE:
+                temp_raw = self.parse_id_number(INNODISK_TEMPERATURE_ID)
+                self.temperature = temp_raw.split()[-6]
+
+    def parse_virtium_info(self):
+        if self.vendor_ssd_info:
+            self.temperature = self._parse_re('Temperature_Celsius\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            nand_endurance = self._parse_re('NAND_Endurance\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            avg_erase_count = self._parse_re('Average_Erase_Count\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            try:
+                self.health = 100 - (float(avg_erase_count) * 100 / float(nand_endurance))
+            except (ValueError, ZeroDivisionError):
+                # Invalid avg_erase_count or nand_endurance.
+                pass
+
+    def fetch_vendor_ssd_info(self, diskdev, model):
+        self.vendor_ssd_info = self._execute_shell(self.vendor_ssd_utility[model]["utility"].format(diskdev))
+
+    def parse_vendor_ssd_info(self, model):
+        self.vendor_ssd_utility[model]["parser"]()
+
+    def check_readonly2(self, partition, filesystem):
+        # parse mount cmd output info
+        mount_info = self._execute_shell(MOUNT_CMD)
+        for line in mount_info.split('\n'):
+            column_list = line.split()
+            if line == '':
+                continue
+            if column_list[0] == partition and column_list[2] == filesystem:
+                if column_list[5].split(',')[0][1:] == "ro":
+                    return partition
+                else:
+                    return NOT_AVAILABLE
+        return NOT_AVAILABLE
+
+    def check_readonly(self, partition, filesystem):
+        ret = os.access(filesystem, os.W_OK)
+        if ret == False:
+            return partition
+        else:
+            return NOT_AVAILABLE
+        
+    def get_health(self):
+        """
+        Retrieves current disk health in percentages
+
+        Returns:
+            A float number of current ssd health
+            e.g. 83.5
+        """
+        if self.health == 'N/A':
+            return "NA"
+        else:
+            return float(self.health)
+
+    def get_temperature(self):
+        """
+        Retrieves current disk temperature in Celsius
+
+        Returns:
+            A float number of current temperature in Celsius
+            e.g. 40.1
+        """
+        if self.temperature == 'N/A':
+            return 'NA'
+        else:
+            return float(self.temperature)
+
+    def get_model(self):
+        """
+        Retrieves model for the given disk device
+
+        Returns:
+            A string holding disk model as provided by the manufacturer
+        """
+        return self.model
+
+    def get_firmware(self):
+        """
+        Retrieves firmware version for the given disk device
+
+        Returns:
+            A string holding disk firmware version as provided by the manufacturer
+        """
+        return self.firmware
+
+    def get_serial(self):
+        """
+        Retrieves serial number for the given disk device
+
+        Returns:
+            A string holding disk serial number as provided by the manufacturer
+        """
+        return self.serial
+    def get_sata_rate(self):
+        """
+        Retrieves SATA rate for the given disk device
+        Returns:
+            A string holding current SATA rate as provided by the manufacturer
+        """
+        return self.sata_rate
+    def get_remaining_life(self):
+        """
+        Retrieves remaining life for the given disk device
+        Returns:
+            A string holding disk remaining life as provided by the manufacturer
+        """
+        return self.remaining_life
+    def get_vendor_output(self):
+        """
+        Retrieves vendor specific data for the given disk device
+
+        Returns:
+            A string holding some vendor specific disk information
+        """
+        return self.vendor_ssd_info
+
+    def parse_id_number(self, id):
+        return self._parse_re('{}\s*(.+?)\n'.format(id), self.ssd_info)
+
+    def get_readonly_partition(self):
+        """
+        Check the partition mount filesystem is readonly status,then output the result.
+        Returns:
+            The readonly partition list
+        """
+
+        ro_partition_list = []
+        partition_list = []
+
+        # parse fdisk cmd output info
+        disk_info = self._execute_shell(DISK_LIST_CMD)
+        begin_flag = False
+        for line in disk_info.split('\n'):
+            if line == "Device":
+                begin_flag = True
+                continue
+            if begin_flag:
+                if line != "":
+                    partition_list.append(line)
+                else:
+                    break
+
+        # parse df cmd output info
+        disk_free = self._execute_shell(DISK_FREE_CMD)
+        disk_dict = {}
+        line_num = 0
+        for line in disk_free.split('\n'):
+            line_num = line_num + 1
+            if line_num == 1 or line == "":
+                continue
+            column_list = line.split()
+            disk_dict[column_list[0]] = column_list[5]
+
+        # get partition which is readonly
+        for partition in partition_list:
+            if partition in disk_dict:
+                ret = self.check_readonly(partition, disk_dict[partition])
+                if (ret != NOT_AVAILABLE):
+                    ro_partition_list.append(ret)
+
+        return ro_partition_list
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/pmon_daemon_control.json
new file mode 100644
index 000000000000..94592fa8cebc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/pmon_daemon_control.json
@@ -0,0 +1,3 @@
+{
+    "skip_ledd": true
+}
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/postinit_cmd_file.soc b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/postinit_cmd_file.soc
new file mode 100644
index 000000000000..6167c3d68f33
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/postinit_cmd_file.soc
@@ -0,0 +1,7 @@
+led load /usr/share/sonic/platform/custom_led.bin
+
+led auto on
+
+led start
+
+linkscan SwPortBitMap=xe,ce,cd
diff --git a/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/system_health_monitoring_config.json b/device/micas/x86_64-micas_m2-w6520-24dc8qc-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000000..e69de29bb2d1
diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk
index 38c1a9521388..caac3b74f1b0 100755
--- a/platform/broadcom/one-image.mk
+++ b/platform/broadcom/one-image.mk
@@ -98,7 +98,8 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \
                                $(UFISPACE_S9301_32D_PLATFORM_MODULE) \
                                $(UFISPACE_S9301_32DB_PLATFORM_MODULE) \
                                $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE) \
-			       $(MICAS_M2_W6510_48GT4V_PLATFORM_MODULE)
+			       $(MICAS_M2_W6510_48GT4V_PLATFORM_MODULE) \
+			       $(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE)
 
 $(SONIC_ONE_IMAGE)_LAZY_BUILD_INSTALLS = $(BRCM_OPENNSL_KERNEL) $(BRCM_DNX_OPENNSL_KERNEL)
 ifeq ($(INSTALL_DEBUG_TOOLS),y)
diff --git a/platform/broadcom/platform-modules-micas.mk b/platform/broadcom/platform-modules-micas.mk
index 5b7fd2cdcb07..fb2277921950 100644
--- a/platform/broadcom/platform-modules-micas.mk
+++ b/platform/broadcom/platform-modules-micas.mk
@@ -16,3 +16,11 @@ export MICAS_M2_W6510_48GT4V_PLATFORM_MODULE_VERSION
 MICAS_M2_W6510_48GT4V_PLATFORM_MODULE = platform-modules-micas-m2-w6510-48gt4v_$(MICAS_M2_W6510_48GT4V_PLATFORM_MODULE_VERSION)_amd64.deb
 $(MICAS_M2_W6510_48GT4V_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6510-48gt4v-r0
 $(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6510_48GT4V_PLATFORM_MODULE)))
+
+## M2-W6520-24DC8QC
+MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE_VERSION = 1.0
+export MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE_VERSION
+
+MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE = platform-modules-micas-m2-w6520-24dc8qc_$(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE_VERSION)_amd64.deb
+$(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6520-24dc8qc-r0
+$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE)))
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_debug.c b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_debug.c
index 93ed6066efed..71d6cd510a88 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_debug.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_debug.c
@@ -1,3 +1,23 @@
+/*
+ * An dfd_debug driver for dfd debug function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <stdlib.h>
 #include <stdio.h>
 #include <stdbool.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.c b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.c
index c82b0baad4c3..dbf5f8462eb6 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.c
@@ -1,3 +1,22 @@
+/*
+ * An dfd_utest driver for dfd utest function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
 
 #include <errno.h>
 #include <stdlib.h>
@@ -1865,10 +1884,6 @@ static int mdiodev_arg_parse(int argc, char* argv[], int *mdio_index, int *phyad
     }
 
     regaddr = strtoul(argv[4], &end, 0);
-    if (*end || regaddr > 0xffff) {
-        fprintf(stderr, "Error: regaddr invalid!\n");
-        return -EINVAL;
-    }
 
     if (argc > 5) {
         value = strtoul(argv[5], &end, 0);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.h b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.h
index 1ae65148ea9c..71445a449abd 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.h
@@ -1,4 +1,23 @@
-/* monitor_utest.h */
+/*
+ * A header definition for dfd_utest driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef __DFD_UTEST_H__
 #define __DFD_UTEST_H__
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade.c b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade.c
index 2045608d5c3b..7141ef08be56 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade.c
@@ -1,3 +1,23 @@
+/*
+ * An fw_upgrade driver for firmware upgrade function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <sys/io.h>
 #include <unistd.h>
 #include <stdio.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade_debug.c b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade_debug.c
index a7a78d011011..0ee3a6f52ef0 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade_debug.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade_debug.c
@@ -1,3 +1,23 @@
+/*
+ * An fw_upgrade_debug driver for firmware upgrade debug function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <unistd.h>
 #include <fcntl.h>
 #include <stdio.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade.h b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade.h
index bd806a94b154..aa012b8ab6d7 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for fw_upgrade driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef _FW_UPGRADE_H_
 #define _FW_UPGRADE_H_
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade_debug.h b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade_debug.h
index 05911da62a7e..bc6a6ff33404 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade_debug.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade_debug.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for fw_upgrade_debug driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef __FW_UPGRADE_DEBUG_H__
 #define __FW_UPGRADE_DEBUG_H__
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/hysteresis.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/hysteresis.py
index 81fd596e7fee..34aa0f8866ac 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/hysteresis.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/hysteresis.py
@@ -1,4 +1,20 @@
 #!/usr/bin/env python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import os
 import syslog
 import copy
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/openloop.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/openloop.py
index 3bb46b286998..3a284230271c 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/openloop.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/openloop.py
@@ -1,4 +1,20 @@
 #!/usr/bin/env python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import os
 import syslog
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/pid.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/pid.py
index 25c2069fea66..93a4ec545627 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/pid.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/pid.py
@@ -1,4 +1,20 @@
 #!/usr/bin/env python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import os
 import syslog
 import copy
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/cust_fru.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/cust_fru.py
index 940c722ce467..ea401f78fd00 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/cust_fru.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/cust_fru.py
@@ -1,5 +1,20 @@
 #!/usr/bin/python
-# -*- coding: utf-8 -*-
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import sys
 import os
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/fantlv.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/fantlv.py
index 4be78e7fdc03..f7f2d7731ed7 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/fantlv.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/fantlv.py
@@ -1,5 +1,19 @@
 #!/usr/bin/python3
-# -*- coding: utf-8 -*-
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 class FantlvException(Exception):
     def __init__(self, message='fantlverror', code=-100):
@@ -32,18 +46,34 @@ def dstatus(self):
     def typename(self):
         return self._typename
 
+    @typename.setter
+    def typename(self, value):
+        self._typename = value
+
     @property
     def typesn(self):
         return self._typesn
 
+    @typesn.setter
+    def typesn(self, value):
+        self._typesn = value
+
     @property
     def typehwinfo(self):
         return self._typehwinfo
 
+    @typehwinfo.setter
+    def typehwinfo(self, value):
+        self._typehwinfo = value
+
     @property
     def typedevtype(self):
         return self._typedevtype
 
+    @typedevtype.setter
+    def typedevtype(self, value):
+        self._typedevtype = value
+
     def __init__(self):
         self._typename = ""
         self._typesn = ""
@@ -61,15 +91,15 @@ def strtoarr(self, val):
 
     def hex_to_str(self, s):
         len_t = len(s)
-        if len_t % 2 != 0:
+        if int(len_t % 2) != 0:
             return 0
         ret = ""
-        for t in range(0, len_t / 2):
+        for t in range(0, int(len_t / 2)):
             ret += chr(int(s[2 * t:2 * t + 2], 16))
         return ret
 
-    def generate_fan_value(self):
-        bin_buffer = [chr(0xff)] * 256
+    def generate_fan_value(self, size=256):
+        bin_buffer = [chr(0x00)] * size
         bin_buffer[0] = chr(self.VERSION)
         bin_buffer[1] = chr(self.FLAG)
         bin_buffer[2] = chr(self.HW_VER)
@@ -80,6 +110,10 @@ def generate_fan_value(self):
         total_len = len(self.typename) + len(self.typesn) + \
             len(self.typehwinfo) + len(typedevtype_t) + 8
 
+        rawdata_len = self._FAN_TLV_HDR_LEN + total_len + 2
+        if rawdata_len > size:
+            raise FantlvException("Generate rg tlv value failed, totallen: %d more than e2_size: %d" % (rawdata_len, size), -10)
+
         bin_buffer[4] = chr(total_len >> 8)
         bin_buffer[5] = chr(total_len & 0x00FF)
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/fru.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/fru.py
index f95164e03601..c409a4e11202 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/fru.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/fru.py
@@ -1,7 +1,22 @@
 #!/usr/bin/python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import collections
 from datetime import datetime, timedelta
-from bitarray import bitarray
 
 
 __DEBUG__ = "N"
@@ -27,17 +42,19 @@ def d_print(debug_info):
 class FruUtil():
     @staticmethod
     def decodeLength(value):
-        a = bitarray(8)
-        a.setall(True)
-        a[0:1] = 0
-        a[1:2] = 0
-        x = ord(a.tobytes())
-        return x & ord(value)
+        return 0x3f & ord(value)
 
     @staticmethod
-    def minToData():
+    def minToData(endtime = None):
         starttime = datetime(1996, 1, 1, 0, 0, 0)
-        endtime = datetime.now()
+        if isinstance(endtime, str):
+            try:
+                endtime = datetime.strptime(endtime, "%Y-%m-%d %H:%M:%S")
+            except Exception as e:
+                d_print("Invalid endtime format, endtime: %s, errmsg: %s, used datetime.now" % (endtime, str(e)))
+                endtime = datetime.now()
+        else:
+            endtime = datetime.now()
         seconds = (endtime - starttime).total_seconds()
         mins = seconds // 60
         m = int(round(mins))
@@ -51,12 +68,7 @@ def getTimeFormat():
     def getTypeLength(value):
         if value is None or len(value) == 0:
             return 0
-        a = bitarray(8)
-        a.setall(False)
-        a[0:1] = 1
-        a[1:2] = 1
-        x = ord(a.tobytes())
-        return x | len(value)
+        return 0xc0 | len(value)
 
     @staticmethod
     def checksum(b):
@@ -146,7 +158,7 @@ class BoardInfoArea(BaseArea):
     def __str__(self):
         formatstr = "version             : %x\n" \
                     "length              : %d \n" \
-                    "language            : %x \n" \
+                    "language            : %d \n" \
                     "mfg_date            : %s \n" \
                     "boardManufacturer   : %s \n" \
                     "boardProductName    : %s \n" \
@@ -247,8 +259,9 @@ def fruSetValue(self, field, value):
     def recalcute(self):
         d_print("boardInfoArea version:%x" % ord(self.boardversion))
         d_print("boardInfoArea length:%d" % self.size)
-        d_print("boardInfoArea language:%x" % self.language)
-        self.mfg_date = FruUtil.minToData()
+        d_print("boardInfoArea language:%d" % self.language)
+
+        self.mfg_date = FruUtil.minToData(self.mfg_date)
         d_print("boardInfoArea mfg_date:%x" % self.mfg_date)
 
         self.data = chr(ord(self.boardversion)) + \
@@ -396,7 +409,7 @@ class ProductInfoArea(BaseArea):
     def __str__(self):
         formatstr = "version             : %x\n" \
                     "length              : %d \n" \
-                    "language            : %x \n" \
+                    "language            : %d \n" \
                     "productManufacturer : %s \n" \
                     "productName         : %s \n" \
                     "productPartModelName: %s \n" \
@@ -576,7 +589,7 @@ def fruSetValue(self, field, value):
     def recalcute(self):
         d_print("product version:%x" % ord(self.areaversion))
         d_print("product length:%d" % self.size)
-        d_print("product language:%x" % self.language)
+        d_print("product language:%d" % self.language)
         self.data = chr(ord(self.areaversion)) + \
             chr(self.size // 8) + chr(self.language)
 
@@ -928,7 +941,7 @@ def recalcuteCommonHead(self):
         if totallen < self._frusize:
             self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0]))
         else:
-            raise FruException('bin data more than %d' % self._frusize, -2)
+            raise FruException("Generate fru value failed, totallen: %d more than e2_size: %d" % (totallen, self._frusize), -2)
 
     def recalcutebin(self):
         self.bodybin = ""
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/onietlv.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/onietlv.py
index a90f8f8453c8..e61b982ea122 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/onietlv.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/onietlv.py
@@ -1,4 +1,20 @@
 #!/usr/bin/python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import binascii
 
 
@@ -12,7 +28,7 @@ def __init__(self, message='onietlverror', code=-100):
 
 class onie_tlv(object):
     TLV_INFO_ID_STRING = "TlvInfo\x00"
-    TLV_INFO_INIA_ID = "\x00\x00\x13\x11"
+    TLV_INFO_IANA_HEADER = "\x00"
     TLV_INFO_VERSION = 0x01
     TLV_INFO_LENGTH = 0x00
     TLV_INFO_LENGTH_VALUE = 0xba
@@ -186,7 +202,7 @@ def generate_ext(self, cardid):
         ret = chr(0x01) + chr(len(ret)) + ret
         return ret
 
-    def generate_value(self, _t):
+    def generate_value(self, _t, size=256):
         ret = []
         for i in self.TLV_INFO_ID_STRING:
             ret.append(i)
@@ -195,7 +211,8 @@ def generate_value(self, _t):
         ret.append(chr(self.TLV_INFO_LENGTH_VALUE))
 
         total_len = 0
-        for key in _t:
+        key_list = sorted(_t.keys())
+        for key in key_list:
             x = self.getTLV_BODY(key, _t[key])
             ret += x
             total_len += len(x)
@@ -207,8 +224,11 @@ def generate_value(self, _t):
         for t in range(0, 4):
             ret.append(chr(int(s[2 * t + 2:2 * t + 4], 16)))
         totallen = len(ret)
-        if totallen < 256:
-            for left_t in range(0, 256 - totallen):
+        if totallen > size:
+            raise OnietlvException("Generate ONIE tlv value failed, totallen: %d more than e2_size: %d" % (totallen, size), -1)
+
+        if totallen < size:
+            for left_t in range(0, size - totallen):
                 ret.append(chr(0x00))
         return (ret, True)
 
@@ -236,7 +256,7 @@ def decode(self, e):
         ret = self.decode_tlv(e[tlv_index:tlv_end])
         for item in ret:
             if item['code'] == self.TLV_CODE_VENDOR_EXT:
-                if item["value"][0:4] == self.TLV_INFO_INIA_ID:
+                if item["value"][0] == self.TLV_INFO_IANA_HEADER:
                     rt = self.decode_tlv(item["value"][4:])
                 else:
                     rt = self.decode_tlv(item["value"][0:])
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/wedge.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/wedge.py
new file mode 100755
index 000000000000..139977eccc7b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/wedge.py
@@ -0,0 +1,418 @@
+#!/usr/bin/python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+import re
+
+class WedgeException(Exception):
+    def __init__(self, message='wedgeerror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+class Wedge():
+    MAGIC_HEAD_INFO = 0xfbfb
+    VERSION = 0x03
+    WEDGE_SIZE = 196
+
+    _FBW_EEPROM_F_MAGIC = 2
+    _FBW_EEPROM_F_VERSION = 1
+    _FBW_EEPROM_F_PRODUCT_NAME = 20
+    _FBW_EEPROM_F_PRODUCT_NUMBER = 8
+    _FBW_EEPROM_F_ASSEMBLY_NUMBER = 12
+    _FBW_EEPROM_F_FACEBOOK_PCBA_NUMBER = 12
+    _FBW_EEPROM_F_FACEBOOK_PCB_NUMBER = 12
+    _FBW_EEPROM_F_ODM_PCBA_NUMBER = 13
+    _FBW_EEPROM_F_ODM_PCBA_SERIAL = 13
+    _FBW_EEPROM_F_PRODUCT_STATE = 1
+    _FBW_EEPROM_F_PRODUCT_VERSION = 1
+    _FBW_EEPROM_F_PRODUCT_SUBVERSION = 1
+    _FBW_EEPROM_F_PRODUCT_SERIAL = 13
+    _FBW_EEPROM_F_PRODUCT_ASSET = 12
+    _FBW_EEPROM_F_SYSTEM_MANUFACTURER = 8
+    _FBW_EEPROM_F_SYSTEM_MANU_DATE = 4
+    _FBW_EEPROM_F_PCB_MANUFACTURER = 8
+    _FBW_EEPROM_F_ASSEMBLED = 8
+    _FBW_EEPROM_F_LOCAL_MAC = 12
+    _FBW_EEPROM_F_EXT_MAC_BASE = 12
+    _FBW_EEPROM_F_EXT_MAC_SIZE = 2
+    _FBW_EEPROM_F_LOCATION = 20
+    _FBW_EEPROM_F_CRC8 = 1
+
+    def __init__(self):
+        self.magic = ""
+        self.fbw_version = ""
+        self.fbw_product_name = ""
+        self.fbw_product_number = ""
+        self.fbw_assembly_number = ""
+        self.fbw_facebook_pcba_number = ""
+        self.fbw_facebook_pcb_number = ""
+        self.fbw_odm_pcba_number = ""
+        self.fbw_odm_pcba_serial = ""
+        self.fbw_production_state = ""
+        self.fbw_product_version = ""
+        self.fbw_product_subversion = ""
+        self.fbw_product_serial = ""
+        self.fbw_product_asset = ""
+        self.fbw_system_manufacturer = ""
+        self.fbw_system_manufacturing_date = ""
+        self.fbw_system_manufacturing_date_show = ""
+        self.fbw_pcb_manufacturer = ""
+        self.fbw_assembled = ""
+        self.fbw_local_mac = ""
+        self.fbw_local_mac_show = ""
+        self.fbw_mac_base = ""
+        self.fbw_mac_base_show = ""
+        self.fbw_mac_size = ""
+        self.fbw_location = ""
+        self.fbw_crc8 = ""
+
+    def isValidMac(self, mac):
+        if re.match(r"^\s*([0-9a-fA-F]{2,2}:){5,5}[0-9a-fA-F]{2,2}\s*$", mac):
+            return True
+        return False
+
+    def mac_addr_decode(self, origin_mac):
+        mac = origin_mac.replace("0x", "")
+        if len(mac) != 12:
+            msg = "Invalid MAC address: %s" % origin_mac
+            return False, msg
+        release_mac = ""
+        for i in range(len(mac) // 2):
+            if i == 0:
+                release_mac += mac[i * 2:i * 2 + 2]
+            else:
+                release_mac += ":" + mac[i * 2:i * 2 + 2]
+        return True, release_mac
+
+    def wedge_crc8(self, v):
+        # TBD
+        return '0x00'
+
+    def strtoarr(self, str_tmp, size):
+        if len(str_tmp) > size:
+            raise WedgeException("Wedge eeprom str:%s exceed max len: %d" % (str_tmp, size), -10)
+
+        s = []
+        for index in str_tmp:
+            s.append(index)
+
+        append_len = size - len(str_tmp)
+        if append_len > 0:
+            append_list = [chr(0x00)] * append_len
+            s.extend(append_list)
+        return s
+
+    def generate_value(self, size=256):
+        bin_buffer = [chr(0x00)] * size
+        bin_buffer[0] = chr(0xfb)
+        bin_buffer[1] = chr(0xfb)
+        bin_buffer[2] = chr(0x03)
+
+        index_start = 3
+        # Product Name
+        bin_buffer[index_start: index_start + self._FBW_EEPROM_F_PRODUCT_NAME] = self.strtoarr(self.fbw_product_name,
+            self._FBW_EEPROM_F_PRODUCT_NAME)
+        index_start += self._FBW_EEPROM_F_PRODUCT_NAME
+        # Product Part Numbe
+        bin_buffer[index_start: index_start + self._FBW_EEPROM_F_PRODUCT_NUMBER] = self.strtoarr(self.fbw_product_number,
+            self._FBW_EEPROM_F_PRODUCT_NUMBER)
+        index_start += self._FBW_EEPROM_F_PRODUCT_NUMBER
+
+        # System Assembly Part Number
+        bin_buffer[index_start: index_start + self._FBW_EEPROM_F_ASSEMBLY_NUMBER] = self.strtoarr(self.fbw_assembly_number,
+            self._FBW_EEPROM_F_ASSEMBLY_NUMBER)
+        index_start += self._FBW_EEPROM_F_ASSEMBLY_NUMBER
+
+        # Facebook PCBA Part Number
+        bin_buffer[index_start: index_start + self._FBW_EEPROM_F_FACEBOOK_PCBA_NUMBER] = self.strtoarr(self.fbw_facebook_pcba_number,
+            self._FBW_EEPROM_F_FACEBOOK_PCBA_NUMBER)
+        index_start += self._FBW_EEPROM_F_FACEBOOK_PCBA_NUMBER
+
+        # Facebook PCB Part Number
+        bin_buffer[index_start: index_start + self._FBW_EEPROM_F_FACEBOOK_PCB_NUMBER] = self.strtoarr(self.fbw_facebook_pcb_number,
+            self._FBW_EEPROM_F_FACEBOOK_PCB_NUMBER)
+        index_start += self._FBW_EEPROM_F_FACEBOOK_PCB_NUMBER
+
+        # ODM PCBA Part Number
+        bin_buffer[index_start: index_start + self._FBW_EEPROM_F_ODM_PCBA_NUMBER] = self.strtoarr(self.fbw_odm_pcba_number,
+            self._FBW_EEPROM_F_ODM_PCBA_NUMBER)
+        index_start += self._FBW_EEPROM_F_ODM_PCBA_NUMBER
+
+        # ODM PCBA Serial Number
+        bin_buffer[index_start: index_start + self._FBW_EEPROM_F_ODM_PCBA_SERIAL] = self.strtoarr(self.fbw_odm_pcba_serial,
+            self._FBW_EEPROM_F_ODM_PCBA_SERIAL)
+        index_start += self._FBW_EEPROM_F_ODM_PCBA_SERIAL
+
+        # Product Production State
+        if self.fbw_production_state > 0xff:
+            raise WedgeException("Product Production State: %d config error, exceed 255"
+                % self.fbw_production_state, -10)
+        bin_buffer[index_start] = chr(self.fbw_production_state)
+        index_start += self._FBW_EEPROM_F_PRODUCT_STATE
+
+        # Product Version
+        if self.fbw_product_version > 0xff:
+            raise WedgeException("Product Version: %d config error, exceed 255"
+                % self.fbw_product_version, -10)
+        bin_buffer[index_start] = chr(self.fbw_product_version)
+        index_start += self._FBW_EEPROM_F_PRODUCT_VERSION
+
+        # Product Sub Version
+        if self.fbw_product_subversion > 0xff:
+            raise WedgeException("Product Sub Version: %d config error, exceed 255"
+                % self.fbw_product_subversion, -10)
+        bin_buffer[index_start] = chr(self.fbw_product_subversion)
+        index_start += self._FBW_EEPROM_F_PRODUCT_SUBVERSION
+
+        # Product Serial Number
+        bin_buffer[index_start: index_start + self._FBW_EEPROM_F_PRODUCT_SERIAL] = self.strtoarr(self.fbw_product_serial, self._FBW_EEPROM_F_PRODUCT_SERIAL)
+        index_start += self._FBW_EEPROM_F_PRODUCT_SERIAL
+
+        # Product Asset Tag
+        bin_buffer[index_start: index_start + self._FBW_EEPROM_F_PRODUCT_ASSET] = self.strtoarr(self.fbw_product_asset, self._FBW_EEPROM_F_PRODUCT_ASSET)
+        index_start += self._FBW_EEPROM_F_PRODUCT_ASSET
+
+        # System Manufacturer
+        bin_buffer[index_start: index_start + self._FBW_EEPROM_F_SYSTEM_MANUFACTURER] = self.strtoarr(self.fbw_system_manufacturer, self._FBW_EEPROM_F_SYSTEM_MANUFACTURER)
+        index_start += self._FBW_EEPROM_F_SYSTEM_MANUFACTURER
+
+        # System Manufacturing Date
+        if (len(self.fbw_system_manufacturing_date) != 8):
+            raise WedgeException("System Manufacturing Date config error, value: %s"
+                % self.fbw_system_manufacturing_date, -10)
+
+        year = int(self.fbw_system_manufacturing_date[0:4])
+        month = int(self.fbw_system_manufacturing_date[4:6])
+        day = int(self.fbw_system_manufacturing_date[6:8])
+        if month < 1 or month > 12 or day < 1 or day > 31:
+            raise WedgeException("System Manufacturing Date config error, value: %s"
+                % self.fbw_system_manufacturing_date, -10)
+        bin_buffer[index_start] = chr(year & 0xff)
+        bin_buffer[index_start + 1] = chr((year & 0xff00) >> 8)
+        bin_buffer[index_start + 2] = chr(month)
+        bin_buffer[index_start + 3] = chr(day)
+        index_start += self._FBW_EEPROM_F_SYSTEM_MANU_DATE
+
+        # PCB Manufacturer
+        bin_buffer[index_start: index_start + self._FBW_EEPROM_F_PCB_MANUFACTURER] = self.strtoarr(self.fbw_pcb_manufacturer,
+            self._FBW_EEPROM_F_PCB_MANUFACTURER)
+        index_start += self._FBW_EEPROM_F_PCB_MANUFACTURER
+
+        # Assembled At
+        bin_buffer[index_start: index_start + self._FBW_EEPROM_F_ASSEMBLED] = self.strtoarr(self.fbw_assembled,
+            self._FBW_EEPROM_F_ASSEMBLED)
+        index_start += self._FBW_EEPROM_F_ASSEMBLED
+
+        # Local MAC Address
+        status, mac = self.mac_addr_decode(self.fbw_local_mac)
+        if self.isValidMac(mac) is False:
+            msg = "Invalid Local MAC Address: %s" % self.fbw_local_mac
+            raise WedgeException(msg , -10)
+
+        bin_buffer[index_start: index_start + self._FBW_EEPROM_F_LOCAL_MAC] = self.strtoarr(self.fbw_local_mac, self._FBW_EEPROM_F_LOCAL_MAC)
+        index_start += self._FBW_EEPROM_F_LOCAL_MAC
+        # Extended MAC Address
+        status, mac = self.mac_addr_decode(self.fbw_mac_base)
+        if self.isValidMac(mac) is False:
+            msg = "Invalid Extended MAC Address: %s" % self.fbw_mac_base
+            raise WedgeException(msg , -10)
+
+        bin_buffer[index_start: index_start + self._FBW_EEPROM_F_EXT_MAC_BASE] = self.strtoarr(self.fbw_mac_base, self._FBW_EEPROM_F_EXT_MAC_BASE)
+        index_start += self._FBW_EEPROM_F_EXT_MAC_BASE
+
+        # Extended MAC Address Size
+        if self.fbw_mac_size > 0xffff:
+            raise WedgeException("Extended MAC Address Size: %d config error, exceed 65535"
+                % self.fbw_mac_size, -10)
+        bin_buffer[index_start] = chr(self.fbw_mac_size & 0xff)
+        bin_buffer[index_start + 1] = chr((self.fbw_mac_size & 0xff00) >> 8)
+        index_start += self._FBW_EEPROM_F_EXT_MAC_SIZE
+
+        # Location on Fabric
+        bin_buffer[index_start: index_start + self._FBW_EEPROM_F_LOCATION] = self.strtoarr(self.fbw_location,
+            self._FBW_EEPROM_F_LOCATION)
+        index_start += self._FBW_EEPROM_F_LOCATION
+
+        # CRC8
+        bin_buffer[index_start] = chr(0x00)
+        index_start += self._FBW_EEPROM_F_CRC8
+        return bin_buffer
+
+    def decode(self, e2):
+        # header check
+        e2_index = 0
+        head = ord(e2[0]) | (ord(e2[1]) << 8)
+        if head != self.MAGIC_HEAD_INFO:
+            raise WedgeException("Wedge eeprom head info error, not Wedge eeprom type, head:0x%04x" % head, -10)
+        self.magic = "0x%04x" % self.MAGIC_HEAD_INFO
+        e2_index += self._FBW_EEPROM_F_MAGIC
+
+        # E2 format version check
+        if ord(e2[e2_index]) != self.VERSION:
+            raise WedgeException("Wedge eeprom version: 0x%02x, not V3 format" % ord(e2[e2_index]), -10)
+        self.fbw_version = self.VERSION
+        e2_index += self._FBW_EEPROM_F_VERSION
+
+        # crc
+        self.fbw_crc8 = ord(e2[self.WEDGE_SIZE-1])
+
+        # Product Name
+        self.fbw_product_name = "%s" % (e2[e2_index:e2_index + self._FBW_EEPROM_F_PRODUCT_NAME])
+        e2_index += self._FBW_EEPROM_F_PRODUCT_NAME
+
+        # Product Part Numbe
+        self.fbw_product_number = "%s" % e2[e2_index:e2_index+self._FBW_EEPROM_F_PRODUCT_NUMBER]
+        #self.fbw_product_number = "%s-%s" % (e2[e2_index:e2_index+2], e2[e2_index + 2: e2_index + 8])
+        e2_index += self._FBW_EEPROM_F_PRODUCT_NUMBER
+
+        # System Assembly Part Number
+        self.fbw_assembly_number = "%s" % e2[e2_index:e2_index+self._FBW_EEPROM_F_ASSEMBLY_NUMBER]
+        #self.fbw_assembly_number = "%s-%s-%s" % (e2[e2_index:e2_index+3], e2[e2_index+3:e2_index+10], e2[e2_index+10:e2_index+12])
+        e2_index += self._FBW_EEPROM_F_ASSEMBLY_NUMBER
+
+        # Facebook PCBA Part Number
+        self.fbw_facebook_pcba_number = "%s" % e2[e2_index:e2_index+self._FBW_EEPROM_F_FACEBOOK_PCBA_NUMBER]
+        #self.fbw_facebook_pcba_number = "%s-%s-%s" % (e2[e2_index:e2_index+3], e2[e2_index+3:e2_index+10], e2[e2_index+10:e2_index+12])
+        e2_index += self._FBW_EEPROM_F_FACEBOOK_PCBA_NUMBER
+
+        # Facebook PCB Part Number
+        self.fbw_facebook_pcb_number ="%s" % e2[e2_index:e2_index+self._FBW_EEPROM_F_FACEBOOK_PCB_NUMBER]
+        #self.fbw_facebook_pcb_number = "%s-%s-%s" % (e2[e2_index:e2_index+3], e2[e2_index+3:e2_index+10], e2[e2_index+10:e2_index+12])
+        e2_index += self._FBW_EEPROM_F_FACEBOOK_PCB_NUMBER
+
+        # ODM PCBA Part Number
+        self.fbw_odm_pcba_number = "%s" % (e2[e2_index:e2_index + self._FBW_EEPROM_F_ODM_PCBA_NUMBER])
+        e2_index += self._FBW_EEPROM_F_ODM_PCBA_NUMBER
+
+        # ODM PCBA Serial Number
+        self.fbw_odm_pcba_serial = "%s" % (e2[e2_index:e2_index + self._FBW_EEPROM_F_ODM_PCBA_SERIAL])
+        e2_index += self._FBW_EEPROM_F_ODM_PCBA_SERIAL
+
+        # Product Production State
+        self.fbw_production_state = (ord(e2[e2_index]))
+        e2_index += self._FBW_EEPROM_F_PRODUCT_STATE
+
+        # Product Version
+        self.fbw_product_version = (ord(e2[e2_index]))
+        e2_index += self._FBW_EEPROM_F_PRODUCT_VERSION
+
+        # Product Version
+        self.fbw_product_subversion = (ord(e2[e2_index]))
+        e2_index += self._FBW_EEPROM_F_PRODUCT_SUBVERSION
+
+        # Product Serial Number
+        self.fbw_product_serial = "%s" % (e2[e2_index:e2_index + self._FBW_EEPROM_F_PRODUCT_SERIAL])
+        e2_index += self._FBW_EEPROM_F_PRODUCT_SERIAL
+
+        # Product Asset Tag
+        self.fbw_product_asset = "%s" % (e2[e2_index:e2_index + self._FBW_EEPROM_F_PRODUCT_ASSET])
+        e2_index += self._FBW_EEPROM_F_PRODUCT_ASSET
+
+        # System Manufacturer
+        self.fbw_system_manufacturer = "%s" % (e2[e2_index:e2_index + self._FBW_EEPROM_F_SYSTEM_MANUFACTURER])
+        e2_index += self._FBW_EEPROM_F_SYSTEM_MANUFACTURER
+
+        # System Manufacturing Date
+        year = ord(e2[e2_index]) | (ord(e2[e2_index + 1]) << 8)
+        month = ord(e2[e2_index + 2])
+        day = ord(e2[e2_index + 3])
+        self.fbw_system_manufacturing_date = "%04d%02d%02d" % (year, month, day)
+        self.fbw_system_manufacturing_date_show = "%02d-%02d-%04d" % (month, day, year)
+        e2_index += self._FBW_EEPROM_F_SYSTEM_MANU_DATE
+
+        # PCB Manufacturer
+        self.fbw_pcb_manufacturer = "%s" % (e2[e2_index:e2_index + self._FBW_EEPROM_F_PCB_MANUFACTURER])
+        e2_index += self._FBW_EEPROM_F_PCB_MANUFACTURER
+
+        # Assembled At
+        self.fbw_assembled = "%s" % (e2[e2_index:e2_index + self._FBW_EEPROM_F_ASSEMBLED])
+        e2_index += self._FBW_EEPROM_F_ASSEMBLED
+
+        # Local MAC Address
+        self.fbw_local_mac = "%s" % (e2[e2_index:e2_index + self._FBW_EEPROM_F_LOCAL_MAC])
+        status, mac = self.mac_addr_decode(self.fbw_local_mac)
+        if status is False:
+            raise WedgeException("Wedge eeprom decode local MAC error, msg: %s" % mac, -10)
+        self.fbw_local_mac_show = mac.upper()
+        e2_index += self._FBW_EEPROM_F_LOCAL_MAC
+
+        # Extended MAC Address
+        self.fbw_mac_base = "%s" % (e2[e2_index:e2_index + self._FBW_EEPROM_F_EXT_MAC_BASE])
+        status, mac = self.mac_addr_decode(self.fbw_mac_base)
+        if status is False:
+            raise WedgeException("Wedge eeprom decode local MAC error, msg: %s" % mac, -10)
+        self.fbw_mac_base_show = mac.upper()
+        e2_index += self._FBW_EEPROM_F_EXT_MAC_BASE
+
+        # Extended MAC Address Size
+        mac_size = ord(e2[e2_index]) | (ord(e2[e2_index + 1]) << 8)
+        self.fbw_mac_size = mac_size
+        e2_index += self._FBW_EEPROM_F_EXT_MAC_SIZE
+
+        # Location on Fabric
+        self.fbw_location = "%s" % (e2[e2_index:e2_index + self._FBW_EEPROM_F_LOCATION])
+        e2_index += self._FBW_EEPROM_F_LOCATION
+        return
+
+
+    def __str__(self):
+        formatstr = "Version                      : %d      \n" \
+                    "Product Name                 : %s      \n" \
+                    "Product Part Number          : %s      \n" \
+                    "System Assembly Part Number  : %s      \n" \
+                    "Facebook PCBA Part Number    : %s      \n" \
+                    "Facebook PCB Part Number     : %s      \n" \
+                    "ODM PCBA Part Number         : %s      \n" \
+                    "ODM PCBA Serial Number       : %s      \n" \
+                    "Product Production State     : %d      \n" \
+                    "Product Version              : %d      \n" \
+                    "Product Sub-Version          : %d      \n" \
+                    "Product Serial Number        : %s      \n" \
+                    "Product Asset Tag            : %s      \n" \
+                    "System Manufacturer          : %s      \n" \
+                    "System Manufacturing Date    : %s      \n" \
+                    "PCB Manufacturer             : %s      \n" \
+                    "Assembled At                 : %s      \n" \
+                    "Local MAC                    : %s      \n" \
+                    "Extended MAC Base            : %s      \n" \
+                    "Extended MAC Address Size    : %d      \n" \
+                    "Location on Fabric           : %s      \n" \
+                    "CRC8                         : 0x%02x  \n"
+        str_tmp = formatstr % (self.fbw_version,
+                            self.fbw_product_name,
+                            self.fbw_product_number,
+                            self.fbw_assembly_number,
+                            self.fbw_facebook_pcba_number,
+                            self.fbw_facebook_pcb_number,
+                            self.fbw_odm_pcba_number,
+                            self.fbw_odm_pcba_serial,
+                            self.fbw_production_state,
+                            self.fbw_product_version,
+                            self.fbw_product_subversion,
+                            self.fbw_product_serial,
+                            self.fbw_product_asset,
+                            self.fbw_system_manufacturer,
+                            self.fbw_system_manufacturing_date_show,
+                            self.fbw_pcb_manufacturer,
+                            self.fbw_assembled,
+                            self.fbw_local_mac_show,
+                            self.fbw_mac_base_show,
+                            self.fbw_mac_size,
+                            self.fbw_location,
+                            self.fbw_crc8)
+        return str_tmp.replace("\x00","")
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/wedge_v5.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/wedge_v5.py
new file mode 100755
index 000000000000..4d42865f619b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/wedge_v5.py
@@ -0,0 +1,591 @@
+#!/usr/bin/python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+import re
+
+class WedgeException(Exception):
+    def __init__(self, message='wedgeerror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+class WedgeV5():
+    MAGIC_HEAD_INFO = 0xfbfb
+    VERSION = 0x05
+
+    FBWV5_PRODUCT_NAME = 0x01
+    FBWV5_PRODUCT_PART_NUMBER = 0x02
+    FBWV5_ASSEMBLY_PART_NUMBER = 0x03
+    FBWV5_ASSEMBLY_PART_NUMBER_LEN = 8
+    FBWV5_META_PCBA_PART_NUMBER = 0x04
+    FBWV5_META_PCBA_PART_NUMBER_LEN = 12
+    FBWV5_META_PCB_PART_NUMBER = 0x05
+    FBWV5_META_PCB_PART_NUMBER_LEN = 12
+    FBWV5_ODM_PCBA_PART_NUMBER = 0x06
+    FBWV5_ODM_PCBA_SERIAL_NUMBER = 0x07
+    FBWV5_PRODUCT_PRODUCTION_STATE = 0x08
+    FBWV5_PRODUCT_PRODUCTION_STATE_LEN = 1
+    FBWV5_PRODUCT_VERSION = 0x09
+    FBWV5_PRODUCT_VERSION_LEN = 1
+    FBWV5_PRODUCT_SUB_VERSION = 0x0A
+    FBWV5_PRODUCT_SUB_VERSION_LEN = 1
+    FBWV5_PRODUCT_SERIAL_NUMBER = 0x0B
+    FBWV5_SYSTEM_MANUFACTURER = 0x0C
+    FBWV5_SYSTEM_MANUFACTURING_DATE = 0x0D
+    FBWV5_SYSTEM_MANUFACTURING_DATE_LEN = 8
+    FBWV5_PCB_MANUFACTURER = 0x0E
+    FBWV5_ASSEMBLED_AT = 0x0F
+    FBWV5_E2_LOCATION_ON_FABRIC = 0x10
+    FBWV5_X86_CPU_MAC = 0x11
+    FBWV5_X86_CPU_MAC_LEN = 8
+    FBWV5_BMC_MAC = 0x12
+    FBWV5_BMC_MAC_LEN = 8
+    FBWV5_SWITCH_ASIC_MAC = 0x13
+    FBWV5_SWITCH_ASIC_MAC_LEN = 8
+    FBWV5_META_RESERVED_MAC = 0x14
+    FBWV5_META_RESERVED_MAC_LEN = 8
+    FBWV5_CRC16 = 0xFA
+
+
+    @property
+    def product_name(self):
+        return self._ProductName
+
+    @property
+    def product_part_number(self):
+        return self._ProductPartNumber
+
+    @property
+    def assembly_part_number(self):
+        return self._AssemblyPartNumber
+
+    @property
+    def meta_pcba_part_number(self):
+        return self._MetaPCBAPartNumber
+
+    @property
+    def meta_pcb_part_number(self):
+        return self._MetaPCBPartNumber
+
+    @property
+    def odm_pcba_part_number(self):
+        return self._ODMPCBAPartNumber
+
+    @property
+    def odm_pcba_serial_number(self):
+        return self._ODMPCBASerialNumber
+
+    @property
+    def product_production_state(self):
+        return self._ProductProductionState
+
+    @property
+    def product_version(self):
+        return self._ProductVersion
+
+    @property
+    def product_sub_version(self):
+        return self._ProductSubVersion
+
+    @property
+    def product_serial_number(self):
+        return self._ProductSerialNumber
+
+    @property
+    def system_manufacturer(self):
+        return self._SystemManufacturer
+
+    @property
+    def system_manufacturing_date(self):
+        return self._SystemManufacturingDate
+
+    @property
+    def pcb_manufacturer(self):
+        return self._PCBManufacturer
+
+    @property
+    def assembled_at(self):
+        return self._AssembledAt
+
+    @property
+    def e2_location_on_fabric(self):
+        return self._E2LocationOnFabric
+
+    @property
+    def x86_cpu_mac(self):
+        return self._X86_CPU_MAC
+
+    @property
+    def x86_cpu_mac_size(self):
+        return self._X86_CPU_MAC_SIZE
+
+    @property
+    def bmc_mac(self):
+        return self._BMC_MAC
+
+    @property
+    def bmc_mac_size(self):
+        return self._BMC_MAC_SIZE
+
+    @property
+    def switch_asic_mac(self):
+        return self._SWITCH_ASIC_MAC
+
+    @property
+    def switch_asic_mac_size(self):
+        return self._SWITCH_ASIC_MAC_SIZE
+
+    @property
+    def meta_reserved_mac(self):
+        return self._MetaReservedMAC
+
+    @property
+    def meta_reserved_mac_size(self):
+        return self._MetaReservedMAC_SIZE
+
+    @property
+    def crc16(self):
+        return self._crc16
+
+
+    def __init__(self):
+        self._ProductName = ""
+        self._ProductPartNumber = ""
+        self._AssemblyPartNumber = ""
+        self._MetaPCBAPartNumber = ""
+        self._MetaPCBPartNumber = ""
+        self._ODMPCBAPartNumber = ""
+        self._ODMPCBASerialNumber = ""
+        self._ProductProductionState = ""
+        self._ProductVersion = ""
+        self._ProductSubVersion = ""
+        self._ProductSerialNumber = ""
+        self._SystemManufacturer = ""
+        self._SystemManufacturingDate = ""
+        self._PCBManufacturer = ""
+        self._AssembledAt = ""
+        self._E2LocationOnFabric = ""
+        self._X86_CPU_MAC  = ""
+        self._X86_CPU_MAC_SIZE  = ""
+        self._BMC_MAC = ""
+        self._BMC_MAC_SIZE = ""
+        self._SWITCH_ASIC_MAC = ""
+        self._SWITCH_ASIC_MAC_SIZE = ""
+        self._MetaReservedMAC = ""
+        self._MetaReservedMAC_SIZE = ""
+        self._crc16 = ""
+
+    def crc_ccitt(self, data, crc_init=0xFFFF, poly=0x1021):
+        '''
+        CRC-16-CCITT Algorithm
+        '''
+
+        data_array = bytearray()
+        for x in data:
+            data_array.append(ord(x))
+
+        crc = crc_init
+        for byte in data_array:
+            crc ^= byte << 8
+            for _ in range(8):
+                if crc & 0x8000:
+                    crc = (crc << 1) ^ poly
+                else:
+                    crc <<= 1
+                crc &= 0xFFFF
+
+        return '0x%04X' % (crc & 0xFFFF)
+
+
+    def check_mac_addr(self, mac):
+        if re.match(r"^\s*([0-9a-fA-F]{2,2}:){5,5}[0-9a-fA-F]{2,2}\s*$", mac):
+            return True
+        return False
+
+    def decoce_mac_and_size(self, value):
+        mac_addr = ":".join(['%02X' % ord(T) for T in value[0:6]]).upper()
+        ret = self.check_mac_addr(mac_addr)
+        if ret is False:
+            return False, "Invalid MAC address: [%s]" % mac_addr
+
+        mac_size = ((ord(value[6]) << 8) | ord(value[7]))
+        if mac_size == 0:
+            return False, "Invalid MAC address size: %d" % mac_size
+        return True, ""
+
+    def getTLV_BODY(self, tlv_type, value):
+        x = []
+        temp_t = None
+        if tlv_type == self.FBWV5_ASSEMBLY_PART_NUMBER and len(value) != self.FBWV5_ASSEMBLY_PART_NUMBER_LEN:
+            if len(value) > self.FBWV5_ASSEMBLY_PART_NUMBER_LEN:
+                raise WedgeException("Invalid System Assembly Part Number length. value: %s, length: %d, length must less than %d" %
+                    (value, len(value), self.FBWV5_ASSEMBLY_PART_NUMBER_LEN), -1)
+            temp_list = list(value) + [chr(0x00)] * (self.FBWV5_ASSEMBLY_PART_NUMBER_LEN - len(value))
+            temp_t = ''.join(temp_list)
+
+        if tlv_type == self.FBWV5_META_PCBA_PART_NUMBER and len(value) != self.FBWV5_META_PCBA_PART_NUMBER_LEN:
+            if len(value) > self.FBWV5_META_PCBA_PART_NUMBER_LEN:
+                raise WedgeException("Invalid Meta PCBA Part Number length. value: %s, length: %d, length must be %d" %
+                    (value, len(value), self.FBWV5_META_PCBA_PART_NUMBER_LEN), -1)
+            temp_list = list(value) + [chr(0x00)] * (self.FBWV5_META_PCBA_PART_NUMBER_LEN - len(value))
+            temp_t = ''.join(temp_list)
+
+
+        if tlv_type == self.FBWV5_META_PCB_PART_NUMBER and len(value) != self.FBWV5_META_PCB_PART_NUMBER_LEN:
+            if len(value) > self.FBWV5_META_PCB_PART_NUMBER_LEN:
+                raise WedgeException("Invalid Meta PCB Part Number length. value: %s, length: %d, length must be %d" %
+                    (value, len(value), self.FBWV5_META_PCB_PART_NUMBER_LEN), -1)
+            temp_list = list(value) + [chr(0x00)] * (self.FBWV5_META_PCB_PART_NUMBER_LEN - len(value))
+            temp_t = ''.join(temp_list)
+
+        if (tlv_type == self.FBWV5_PRODUCT_PRODUCTION_STATE
+            or tlv_type == self.FBWV5_PRODUCT_VERSION
+            or tlv_type == self.FBWV5_PRODUCT_SUB_VERSION):
+            if not isinstance(value, int) or value > 0xff or value < 0:
+                raise WedgeException("Invalid Wedge EEPROM Format V5 Tlv type: %d, value: %s" %
+                    (tlv_type, value), -1)
+            temp_t = chr(value)
+
+        if tlv_type == self.FBWV5_SYSTEM_MANUFACTURING_DATE and len(value) != self.FBWV5_SYSTEM_MANUFACTURING_DATE_LEN:
+            raise WedgeException("Invalid System Manufacturing Date. value: %s, length: %d, format must YYYYMMDD"
+                % (value, len(value)), -1)
+
+        if tlv_type == self.FBWV5_X86_CPU_MAC:
+            if len(value) != self.FBWV5_X86_CPU_MAC_LEN:
+                raise WedgeException("Invalid X86 CPU MAC length: %d, must be %d"
+                    % (len(value), self.FBWV5_X86_CPU_MAC_LEN), -1)
+            status, msg = self.decoce_mac_and_size(value)
+            if status is False:
+                raise WedgeException("Decode X86 CPU MAC failed, msg: %s" % (value, msg), -1)
+
+        if tlv_type == self.FBWV5_BMC_MAC:
+            if len(value) != self.FBWV5_BMC_MAC_LEN:
+                raise WedgeException("Invalid BMC MAC length: %d, must be %d"
+                    % (len(value), self.FBWV5_BMC_MAC_LEN), -1)
+            status, msg = self.decoce_mac_and_size(value)
+            if status is False:
+                raise WedgeException("Decode BMC MAC failed, msg: %s" % (value, msg), -1)
+
+        if tlv_type == self.FBWV5_SWITCH_ASIC_MAC:
+            if len(value) != self.FBWV5_SWITCH_ASIC_MAC_LEN:
+                raise WedgeException("Invalid Switch ASIC MAC length: %d, must be %d"
+                    % (len(value), self.FBWV5_SWITCH_ASIC_MAC_LEN), -1)
+            status, msg = self.decoce_mac_and_size(value)
+            if status is False:
+                raise WedgeException("Decode Switch ASIC MAC failed, msg: %s" % (value, msg), -1)
+
+        if tlv_type == self.FBWV5_META_RESERVED_MAC:
+            if len(value) != self.FBWV5_META_RESERVED_MAC_LEN:
+                raise WedgeException("Invalid META Reserved MAC length: %d, must be %d"
+                    % (len(value), self.FBWV5_META_RESERVED_MAC_LEN), -1)
+            status, msg = self.decoce_mac_and_size(value)
+            if status is False:
+                raise WedgeException("Decode META Reserved MAC failed, msg: %s" % (value, msg), -1)
+
+        if temp_t is None:
+            temp_t = value
+
+        x.append(chr(tlv_type))
+        x.append(chr(len(temp_t)))
+        for i in temp_t:
+            x.append(i)
+        return x
+
+    def generate_value(self, _t, size=256):
+        ret = []
+        ret.append(chr(0xfb))
+        ret.append(chr(0xfb))
+        ret.append(chr(self.VERSION))
+        ret.append(chr(0xff))
+
+        key_list = sorted(_t.keys())
+        for key in key_list:
+            x = self.getTLV_BODY(key, _t[key])
+            ret += x
+
+        crc16_str = self.crc_ccitt(ret)
+        crc16_val = int(crc16_str, 16)
+
+        ret.append(chr(self.FBWV5_CRC16))
+        ret.append(chr(0x02))
+        ret.append(chr((crc16_val >> 8) & 0xff))
+        ret.append(chr((crc16_val & 0xff)))
+
+        totallen = len(ret)
+        if (totallen > size):
+            raise WedgeException("Generate Wedge EEPROM Format V5 failed, totallen: %d more than e2_size: %d"
+                % (totallen, size), -1)
+        if (totallen < size):
+            for left_t in range(0, size - totallen):
+                ret.append(chr(0x00))
+        return ret
+
+    def decoder(self, t):
+        ret = []
+        if ord(t[0]) == self.FBWV5_PRODUCT_NAME:
+            name = "Product Name"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._ProductName = value
+        elif ord(t[0]) == self.FBWV5_PRODUCT_PART_NUMBER:
+            name = "Product Part Number"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._ProductPartNumber = value
+        elif ord(t[0]) == self.FBWV5_ASSEMBLY_PART_NUMBER:
+            name = "System Assembly Part Number"
+            _len = ord(t[1])
+            if _len != self.FBWV5_ASSEMBLY_PART_NUMBER_LEN:
+                raise WedgeException("Invalid System Assembly Part Number len: %d" % _len, -1)
+            value = t[2:2 + ord(t[1])]
+            self._AssemblyPartNumber = value
+        elif ord(t[0]) == self.FBWV5_META_PCBA_PART_NUMBER:
+            name = "Meta PCBA Part Number"
+            _len = ord(t[1])
+            if _len != self.FBWV5_META_PCBA_PART_NUMBER_LEN:
+                raise WedgeException("Invalid Meta PCBA Part Number len: %d" % _len, -1)
+            value = t[2:2 + ord(t[1])]
+            self._MetaPCBAPartNumber = value
+        elif ord(t[0]) == self.FBWV5_META_PCB_PART_NUMBER:
+            name = "Meta PCB Part Number"
+            _len = ord(t[1])
+            if _len != self.FBWV5_META_PCB_PART_NUMBER_LEN:
+                raise WedgeException("Invalid Meta PCB Part Number len: %d" % _len, -1)
+            value = t[2:2 + ord(t[1])]
+            self._MetaPCBPartNumber = value
+        elif ord(t[0]) == self.FBWV5_ODM_PCBA_PART_NUMBER:
+            name = "ODM/JDM PCBA Part Number"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._ODMPCBAPartNumber = value
+        elif ord(t[0]) == self.FBWV5_ODM_PCBA_SERIAL_NUMBER:
+            name = "ODM/JDM PCBA Serial Number"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._ODMPCBASerialNumber = value
+        elif ord(t[0]) == self.FBWV5_PRODUCT_PRODUCTION_STATE:
+            name = "Product Production State"
+            _len = ord(t[1])
+            if _len != self.FBWV5_PRODUCT_PRODUCTION_STATE_LEN:
+                raise WedgeException("Invalid Product Production State len: %d" % _len, -1)
+            value = ord(t[2])
+            self._ProductProductionState = value
+        elif ord(t[0]) == self.FBWV5_PRODUCT_VERSION:
+            name = "Product Version"
+            _len = ord(t[1])
+            if _len != self.FBWV5_PRODUCT_VERSION_LEN:
+                raise WedgeException("Invalid Product Version len: %d" % _len, -1)
+            value = ord(t[2])
+            self._ProductVersion = value
+        elif ord(t[0]) == self.FBWV5_PRODUCT_SUB_VERSION:
+            name = "Product Sub-Version"
+            _len = ord(t[1])
+            if _len != self.FBWV5_PRODUCT_SUB_VERSION_LEN:
+                raise WedgeException("Invalid Product Sub-Version len: %d" % _len, -1)
+            value = ord(t[2])
+            self._ProductSubVersion = value
+        elif ord(t[0]) == self.FBWV5_PRODUCT_SERIAL_NUMBER:
+            name = "Product Serial Number"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._ProductSerialNumber = value
+        elif ord(t[0]) == self.FBWV5_SYSTEM_MANUFACTURER:
+            name = "System Manufacturer"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._SystemManufacturer = value
+        elif ord(t[0]) == self.FBWV5_SYSTEM_MANUFACTURING_DATE:
+            name = "System Manufacturing Date"
+            _len = ord(t[1])
+            if _len != self.FBWV5_SYSTEM_MANUFACTURING_DATE_LEN:
+                raise WedgeException("Invalid System Manufacturing Date len: %d" % _len, -1)
+            value = t[2:2 + ord(t[1])]
+            self._SystemManufacturingDate = value
+        elif ord(t[0]) == self.FBWV5_PCB_MANUFACTURER:
+            name = "PCB Manufacturer"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._PCBManufacturer = value
+        elif ord(t[0]) == self.FBWV5_ASSEMBLED_AT:
+            name = "Assembled at"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._AssembledAt = value
+        elif ord(t[0]) == self.FBWV5_E2_LOCATION_ON_FABRIC:
+            name = "EEPROM location on Fabric"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._E2LocationOnFabric = value
+        elif ord(t[0]) == self.FBWV5_X86_CPU_MAC:
+            name = "X86 CPU MAC Base"
+            _len = ord(t[1])
+            if _len != self.FBWV5_X86_CPU_MAC_LEN:
+                raise WedgeException("Invalid X86 CPU MAC Base len: %d" % _len, -1)
+            value = ":".join(['%02X' % ord(T) for T in t[2:8]]).upper()
+            self._X86_CPU_MAC = value
+            ret.append({"name": name, "code": ord(t[0]), "value": value, "lens": 6})
+            # X86 CPU MAC Address Size
+            name = "X86 CPU MAC Address Size"
+            _len = 2
+            value = ((ord(t[8]) << 8) | ord(t[9]))
+            self._X86_CPU_MAC_SIZE = value
+        elif ord(t[0]) == self.FBWV5_BMC_MAC:
+            name = "BMC MAC Base"
+            _len = ord(t[1])
+            if _len != self.FBWV5_BMC_MAC_LEN:
+                raise WedgeException("Invalid BMC MAC Base len: %d" % _len, -1)
+            value = ":".join(['%02X' % ord(T) for T in t[2:8]]).upper()
+            self._BMC_MAC = value
+            ret.append({"name": name, "code": ord(t[0]), "value": value, "lens": 6})
+            # BMC MAC Address Size
+            name = "BMC MAC Address Size"
+            _len = 2
+            value = ((ord(t[8]) << 8) | ord(t[9]))
+            self._BMC_MAC_SIZE = value
+        elif ord(t[0]) == self.FBWV5_SWITCH_ASIC_MAC:
+            name = "Switch ASIC MAC Base"
+            _len = ord(t[1])
+            if _len != self.FBWV5_SWITCH_ASIC_MAC_LEN:
+                raise WedgeException("Invalid Switch ASIC MAC Base len: %d" % _len, -1)
+            value = ":".join(['%02X' % ord(T) for T in t[2:8]]).upper()
+            self._SWITCH_ASIC_MAC = value
+            ret.append({"name": name, "code": ord(t[0]), "value": value, "lens": 6})
+            # Switch ASIC MAC Address Size
+            name = "Switch ASIC MAC Address Size"
+            _len = 2
+            value = ((ord(t[8]) << 8) | ord(t[9]))
+            self._SWITCH_ASIC_MAC_SIZE = value
+        elif ord(t[0]) == self.FBWV5_META_RESERVED_MAC:
+            name = "META Reserved MAC Base"
+            _len = ord(t[1])
+            if _len != self.FBWV5_META_RESERVED_MAC_LEN:
+                raise WedgeException("Invalid META Reserved MAC Base len: %d" % _len, -1)
+            value = ":".join(['%02X' % ord(T) for T in t[2:8]]).upper()
+            self._MetaReservedMAC = value
+            ret.append({"name": name, "code": ord(t[0]), "value": value, "lens": 6})
+            # META Reserved MAC Address Size
+            name = "META Reserved MAC Address Size"
+            _len = 2
+            value = ((ord(t[8]) << 8) | ord(t[9]))
+            self._MetaReservedMAC_SIZE = value
+        elif ord(t[0]) == self.FBWV5_CRC16 and len(t) == 4:
+            name = "CRC16"
+            _len = ord(t[1])
+            value = "0x%04X" % ((ord(t[2]) << 8) | (ord(t[3])))
+            self._crc16 = value
+        else:
+            name = "Unknown"
+            _len = ord(t[1])
+            value = ""
+            for c in t[2:2 + ord(t[1])]:
+                value += "0x%02X " % (ord(c),)
+            raise WedgeException("Unknown Wedge EEPROM Format V5 TLV type: 0x%02x, len: %d, value: %s" % (ord(t[0]), ord(t[1]), value), -1)
+        ret.append({"name": name, "code": ord(t[0]), "value": value, "lens": _len})
+        return ret
+
+
+    def decode_tlv(self, e2):
+        tlv_index = 0
+        tlv_end = len(e2)
+        ret = []
+        while tlv_index < tlv_end:
+            rt = self.decoder(e2[tlv_index:tlv_index + 2 + ord(e2[tlv_index + 1])])
+            ret.extend(rt)
+            if ord(e2[tlv_index]) == self.FBWV5_CRC16:
+                break
+            tlv_index += ord(e2[tlv_index + 1]) + 2
+        return ret, tlv_index
+
+    def decode(self, e2):
+        e2_index = 0
+        head = ord(e2[0]) | (ord(e2[1]) << 8)
+        if head != self.MAGIC_HEAD_INFO:
+            raise WedgeException("Wedge eeprom head info error, not Wedge eeprom type, head:0x%04x" % head, -10)
+        e2_index += 2
+
+        # E2 Version check
+        if ord(e2[e2_index]) != self.VERSION:
+            raise WedgeException("Wedge eeprom version: 0x%02x, not V5 format" % ord(e2[e2_index]), -10)
+        e2_index += 1
+
+        # one byte Reserved
+        e2_index += 1
+
+        ret, tlv_data_len = self.decode_tlv(e2[e2_index:])
+
+        # check crc
+        e2_crc_data_len = tlv_data_len + 4 # two byte Magic word + one byte Format Version + one byte Reserved
+
+        crc_calc = self.crc_ccitt(e2[0:e2_crc_data_len])
+        crc_read = self.crc16
+        if crc_calc != crc_read:
+            print("Wedge EEPROM Format V5 crc error, calc value: %s, read value: %s" % (crc_calc, crc_read), -1)
+
+        return ret
+
+    def __str__(self):
+        formatstr = "Product Name                   : %s      \n" \
+                    "Product Part Number            : %s      \n" \
+                    "System Assembly Part Number    : %s      \n" \
+                    "Meta PCBA Part Number          : %s      \n" \
+                    "Meta PCB Part Number           : %s      \n" \
+                    "ODM/JDM PCBA Part Number       : %s      \n" \
+                    "ODM/JDM PCBA Serial Number     : %s      \n" \
+                    "Product Production State       : %s      \n" \
+                    "Product Version                : %s      \n" \
+                    "Product Sub-Version            : %s      \n" \
+                    "Product Serial Number          : %s      \n" \
+                    "System Manufacturer            : %s      \n" \
+                    "System Manufacturing Date      : %s      \n" \
+                    "PCB Manufacturer               : %s      \n" \
+                    "Assembled at                   : %s      \n" \
+                    "EEPROM location on Fabric      : %s      \n" \
+                    "X86 CPU MAC Base               : %s      \n" \
+                    "X86 CPU MAC Address Size       : %s      \n" \
+                    "BMC MAC Base                   : %s      \n" \
+                    "BMC MAC Address Size           : %s      \n" \
+                    "Switch ASIC MAC Base           : %s      \n" \
+                    "Switch ASIC MAC Address Size   : %s      \n" \
+                    "META Reserved MAC Base         : %s      \n" \
+                    "META Reserved MAC Address Size : %s      \n" \
+                    "CRC16                          : %s      \n"
+        return formatstr % (self.product_name,
+                            self.product_part_number,
+                            self.assembly_part_number,
+                            self.meta_pcba_part_number,
+                            self.meta_pcb_part_number,
+                            self.odm_pcba_part_number,
+                            self.odm_pcba_serial_number,
+                            self.product_production_state,
+                            self.product_version,
+                            self.product_sub_version,
+                            self.product_serial_number,
+                            self.system_manufacturer,
+                            self.system_manufacturing_date,
+                            self.pcb_manufacturer,
+                            self.assembled_at,
+                            self.e2_location_on_fabric,
+                            self.x86_cpu_mac,
+                            self.x86_cpu_mac_size,
+                            self.bmc_mac,
+                            self.bmc_mac_size,
+                            self.switch_asic_mac,
+                            self.switch_asic_mac_size,
+                            self.meta_reserved_mac,
+                            self.meta_reserved_mac_size,
+                            self.crc16)
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/baseutil.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/baseutil.py
index abf0ecf97d6b..12f9aa881daf 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/baseutil.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/baseutil.py
@@ -1,10 +1,20 @@
 #!/usr/bin/env python3
-#######################################################
 #
-# baseutil.py
-# Python implementation of the Class baseutil
+# Copyright (C) 2024 Micas Networks Inc.
 #
-#######################################################
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import importlib.machinery
 import os
 import syslog
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/chassisbase.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/chassisbase.py
index 767d6da34ba9..ea1ef4930a15 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/chassisbase.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/chassisbase.py
@@ -1,21 +1,31 @@
 #!/usr/bin/env python3
-#######################################################
 #
-# chassisbase.py
-# Python implementation of the Class chassisbase
+# Copyright (C) 2024 Micas Networks Inc.
 #
-#######################################################
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+import os
 from plat_hal.dcdc import dcdc
 from plat_hal.onie_e2 import onie_e2
 from plat_hal.psu import psu
 from plat_hal.led import led
-from plat_hal.temp import temp
+from plat_hal.temp import temp, temp_s3ip
 from plat_hal.fan import fan
 from plat_hal.cpld import cpld
 from plat_hal.component import component
 from plat_hal.cpu import cpu
 from plat_hal.baseutil import baseutil
-
+from plat_hal.osutil import osutil
 
 class chassisbase(object):
     __onie_e2_list = []
@@ -89,6 +99,52 @@ def __init__(self, conftype=0, conf=None):
             temptemp.append(temp1)
         self.temp_list = temptemp
 
+        '''
+        sensor print source select
+        '''
+        self.__sensor_print_src = __confTemp.get("sensor_print_src", None)
+
+        # temp_data_source. the following is example:
+        '''
+        "temp_data_source": [
+        {
+            "path": "/sys/s3ip/temp_sensor/",
+            "type": "temp",
+            "Unit": Unit.Temperature,
+            "read_times": 3,
+            "format": "float(float(%s)/1000)"
+        },
+        ],
+        '''
+        tmp_list = []
+        temp_data_source_conf = __confTemp.get("temp_data_source", {})
+        for item in temp_data_source_conf:
+            try:
+                path = item.get("path", None)
+                if path is None:
+                    continue
+                sensor_type = item.get("type", None)
+                if sensor_type is None:
+                    continue
+                number_path = "%s/%s" % (path, "number")
+                ret, number = osutil.readsysfs(number_path)
+                if ret is True:
+                    for index in range(1, int(number) + 1):
+                        sensor_dir = "%s%d" % (sensor_type, index)
+                        # only monitored sensor add to list
+                        monitor_flag_path = "%s/%s/%s" % (path, sensor_dir, "monitor_flag")
+                        if os.path.exists(monitor_flag_path):
+                            ret, monitor_flag = osutil.readsysfs(monitor_flag_path)
+                            if ret is True and int(monitor_flag) == 0:
+                                continue
+                        s3ip_conf = item.copy()
+                        s3ip_conf["sensor_dir"] = sensor_dir
+                        obj = temp_s3ip(s3ip_conf)
+                        tmp_list.append(obj)
+            except Exception:
+                pass
+        self.temp_list_s3ip = tmp_list
+
         # fan
         fantemp = []
         fanconfig = __confTemp.get('fans', [])
@@ -105,6 +161,54 @@ def __init__(self, conftype=0, conf=None):
             dcdctemp.append(dcdc1)
         self.dcdc_list = dcdctemp
 
+        # dcdc_data_source. the following is example:
+        '''
+        "dcdc_data_source": [
+        {
+            "path": "/sys/s3ip/vol_sensor/",
+            "type": "vol",
+            "Unit": Unit.Voltage,
+            "read_times": 3,
+            "format": "float(float(%s)/1000)"
+        },
+        {
+            "path": "/sys/s3ip/curr_sensor/",
+            "type": "curr",
+            "Unit": Unit.Current,
+            "read_times": 3,
+            "format": "float(float(%s)/1000)"
+        },
+        ],
+        '''
+        dcdc_data_source_conf = __confTemp.get("dcdc_data_source", {})
+        tmp_list = []
+        for item in dcdc_data_source_conf:
+            try:
+                path = item.get("path", None)
+                if path is None:
+                    continue
+                sensor_type = item.get("type", None)
+                if sensor_type is None:
+                    continue
+                number_path = "%s/%s" % (path, "number")
+                ret, number = osutil.readsysfs(number_path)
+                if ret is True:
+                    for index in range(1, int(number) + 1):
+                        sensor_dir = "%s%d" % (sensor_type, index)
+                        # only monitored sensor add to list
+                        monitor_flag_path = "%s/%s/%s" % (path, sensor_dir, "monitor_flag")
+                        if os.path.exists(monitor_flag_path):
+                            ret, monitor_flag = osutil.readsysfs(monitor_flag_path)
+                            if ret is True and int(monitor_flag) == 0:
+                                continue
+                        s3ip_conf = item.copy()
+                        s3ip_conf["sensor_dir"] = sensor_dir
+                        dcdc_obj = dcdc(s3ip_conf = s3ip_conf)
+                        tmp_list.append(dcdc_obj)
+            except Exception:
+                pass
+        self.dcdc_list.extend(tmp_list)
+
         # cpld
         cpldtemp = []
         cpldconfig = __confTemp.get('cplds', [])
@@ -316,3 +420,7 @@ def cpu(self, val):
 
     def get_cpu_byname(self, name):
         return self.cpu
+
+    @property
+    def sensor_print_src(self):
+        return self.__sensor_print_src
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/component.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/component.py
index 0f2ad2167485..e0cd231308fa 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/component.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/component.py
@@ -1,10 +1,20 @@
 #!/usr/bin/env python3
-#######################################################
 #
-# component.py
-# Python implementation of the Class fan
+# Copyright (C) 2024 Micas Networks Inc.
 #
-#######################################################
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 from plat_hal.devicebase import devicebase
 from plat_hal.osutil import osutil
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/cpld.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/cpld.py
index 09eed5f975ee..b0abe6e9c302 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/cpld.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/cpld.py
@@ -1,10 +1,20 @@
 #!/usr/bin/env python3
-#######################################################
 #
-# fan.py
-# Python implementation of the Class fan
+# Copyright (C) 2024 Micas Networks Inc.
 #
-#######################################################
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 from plat_hal.devicebase import devicebase
 
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/cpu.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/cpu.py
index c6bec1abd1c2..8fb1d70e57e0 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/cpu.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/cpu.py
@@ -1,9 +1,20 @@
 #!/usr/bin/env python3
-###############################################################################
 #
-# Hardware Abstraction Layer APIs -- CPU APIs.
+# Copyright (C) 2024 Micas Networks Inc.
 #
-###############################################################################
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 from plat_hal.devicebase import devicebase
 
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/dcdc.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/dcdc.py
index ba604995043d..719680f878b6 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/dcdc.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/dcdc.py
@@ -1,11 +1,30 @@
 #!/usr/bin/env python3
-from plat_hal.devicebase import devicebase
-from plat_hal.sensor import sensor
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
+from plat_hal.devicebase import devicebase
+from plat_hal.sensor import sensor, sensor_s3ip
 
 class dcdc(devicebase):
-    def __init__(self, conf=None):
+    def __init__(self, conf = None, s3ip_conf = None):
         if conf is not None:
             self.name = conf.get('name', None)
             self.dcdc_id = conf.get("dcdc_id", None)
             self.sensor = sensor(conf)
+        if s3ip_conf is not None:
+            self.sensor = sensor_s3ip(s3ip_conf)
+            self.name = self.sensor.name
+            self.dcdc_id = self.sensor.sensor_id
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/devicebase.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/devicebase.py
index 001b4ee239bf..4d8eb6dcf511 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/devicebase.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/devicebase.py
@@ -1,10 +1,20 @@
 #!/usr/bin/env python3
-#######################################################
 #
-# devicebase.py
-# Python implementation of the Class devicebase
+# Copyright (C) 2024 Micas Networks Inc.
 #
-#######################################################
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import subprocess
 import shlex
 import ast
@@ -30,6 +40,8 @@ def get_op_value(self, node):
             value = node.n
         elif isinstance(node, ast.Str):      # node is Str Constant
             value = node.s
+        elif isinstance(node, ast.List):     # node is List Constant
+            value = [element.value for element in node.elts]
         else:
             raise NotImplementedError("Unsupport operand type: %s" % type(node))
         return value
@@ -78,7 +90,7 @@ def visit_Call(self, node):
         int support one or two parameters, eg: int(xxx) or int(xxx, 16)
         xxx can be ast.Call/ast.Constant(ast.Num/ast.Str)/ast.BinOp
         '''
-        calc_tuple = ("float", "int", "str")
+        calc_tuple = ("float", "int", "str", "max", "min")
 
         if node.func.id not in calc_tuple:
             raise NotImplementedError("Unsupport function call type: %s" % node.func.id)
@@ -86,7 +98,10 @@ def visit_Call(self, node):
         args_val_list = []
         for item in node.args:
             ret = self.get_op_value(item)
-            args_val_list.append(ret)
+            if isinstance(ret, list):
+                args_val_list.extend(ret)
+            else:
+                args_val_list.append(ret)
 
         if node.func.id == "str":
             if len(args_val_list) != 1:
@@ -101,6 +116,16 @@ def visit_Call(self, node):
             value = float(args_val_list[0])
             self.value = value
             return value
+
+        if node.func.id == "max":
+            value = max(args_val_list)
+            self.value = value
+            return value
+
+        if node.func.id == "min":
+            value = min(args_val_list)
+            self.value = value
+            return value
         # int
         if len(args_val_list) == 1:
             value = int(args_val_list[0])
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/fan.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/fan.py
index 5b33af02527c..80543bec83a2 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/fan.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/fan.py
@@ -1,12 +1,23 @@
 #!/usr/bin/env python3
-#######################################################
 #
-# fan.py
-# Python implementation of the Class fan
+# Copyright (C) 2024 Micas Networks Inc.
 #
-#######################################################
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 from eepromutil.fru import ipmifru
 from eepromutil.fantlv import fan_tlv
+from eepromutil.wedge_v5 import WedgeV5
 from plat_hal.devicebase import devicebase
 from plat_hal.rotor import rotor
 
@@ -50,6 +61,7 @@ def __init__(self, conf=None):
             self.EnableWatchdogConf = conf.get('EnableWatchdogConf', None)
             self.led_attrs_config = conf.get('led_attrs', None)
             self.led_config = conf.get('led', None)
+            self.led_map = conf.get('led_map', None)
             self.Rotor_config = conf.get('Rotor', None)
             self.fan_display_name_conifg = conf.get("fan_display_name", None)
             rotor_tmp = []
@@ -228,6 +240,12 @@ def get_led(self):
         if ret is False or value is None:
             return False, 'N/A'
         ledval = int(value) & mask
+        if self.led_map is not None:
+            led_color = self.led_map.get(ledval, None)
+            if led_color is None:
+                return False, 'N/A'
+            return True, led_color
+
         for key, val in self.led_attrs_config.items():
             if (ledval == val) and (key != "mask"):
                 return True, key
@@ -256,7 +274,7 @@ def get_rotor_byname(self, rotor_index):
 
     def get_presence(self):
         ret, val = self.get_value(self.present)
-        if ret is False or val is None or val == "no_support":
+        if ret is False or val is None or val == "no_support" or val == "NA" or val == "ACCESS FAILED":
             return False
         if isinstance(val, str):
             value = int(val, 16)
@@ -273,9 +291,10 @@ def get_speed_pwm(self, rotor_index):
         rotor_item = self.get_rotor_index(rotor_index)
         if rotor_item is None:
             return False
-        if rotor_item.i2c_speed is None:
+        speed_pwm = rotor_item.i2c_speed
+        if speed_pwm is None:
             return False
-        val = round(rotor_item.i2c_speed * 100 / 255)
+        val = round(speed_pwm * 100 / 255)
         return val
 
     def feed_watchdog(self):
@@ -286,16 +305,39 @@ def feed_watchdog(self):
                 return ret
         return ret
 
-    def get_fru_info(self):
+    def get_wedge_v5_info(self, eeprom):
+        try:
+            product_version = None
+            product_sub_version = None
+            wegdev5 = WedgeV5()
+            rets = wegdev5.decode(eeprom)
+            for item in rets:
+                if item["code"] == wegdev5.FBWV5_PRODUCT_NAME:
+                    self.productName = item["value"].replace("\x00", "").strip()
+                elif item["code"] == wegdev5.FBWV5_PRODUCT_SERIAL_NUMBER:
+                    self.productSerialNumber = item["value"].replace("\x00", "").strip()
+                elif item["code"] == wegdev5.FBWV5_PRODUCT_VERSION:
+                    product_version = "%d" % item["value"]
+                elif item["code"] == wegdev5.FBWV5_PRODUCT_SUB_VERSION:
+                    product_sub_version = "%02d" % item["value"]
+            if product_version is not None and product_sub_version is not None:
+                self.hw_version = product_version + "." + product_sub_version
+            elif product_version is not None:
+                self.hw_version = product_version
+            elif product_sub_version is not None:
+                self.hw_version = product_sub_version
+            else:
+                self.hw_version = None
+        except Exception:
+            self.productName = None
+            self.productSerialNumber = None
+            self.hw_version = None
+            return False
+        return True
+
+    def get_fru_info(self, eeprom):
         try:
-            if self.get_presence() is False:
-                raise Exception("%s: not present" % self.name)
-            eeprom = self.get_eeprom_info(self.e2loc)
-            if eeprom is None:
-                raise Exception("%s: value is none" % self.name)
             fru = ipmifru()
-            if isinstance(eeprom, bytes):
-                eeprom = self.byteTostr(eeprom)
             fru.decodeBin(eeprom)
             self.productName = fru.productInfoArea.productName.strip()  # PN
             self.productSerialNumber = fru.productInfoArea.productSerialNumber.strip()  # SN
@@ -307,13 +349,8 @@ def get_fru_info(self):
             return False
         return True
 
-    def get_tlv_info(self):
+    def get_tlv_info(self, eeprom):
         try:
-            if self.get_presence() is False:
-                raise Exception("%s: not present" % self.name)
-            eeprom = self.get_eeprom_info(self.e2loc)
-            if eeprom is None:
-                raise Exception("%s: value is none" % self.name)
             tlv = fan_tlv()
             rets = tlv.decode(eeprom)
             for item in rets:
@@ -330,14 +367,53 @@ def get_tlv_info(self):
             return False
         return True
 
+    def decode_eeprom_by_type(self, e2_type, eeprom):
+        if e2_type == "fru":
+            return self.get_fru_info(eeprom)
+
+        if e2_type == "fantlv":
+            return self.get_tlv_info(eeprom)
+
+        if e2_type == "wedge_v5":
+            return self.get_wedge_v5_info(eeprom)
+        return False
+
+    def decode_eeprom_by_traverse(self, eeprom):
+        support_e2_type = ("fru", "fantlv", "wedge_v5")
+        for e2_type in support_e2_type:
+            status = self.decode_eeprom_by_type(e2_type, eeprom)
+            if status is True:
+                return True
+        return False
+
     def decode_eeprom_info(self):
         '''get fan name, hw version, sn'''
-        if self.e2_type == "fru":
-            return self.get_fru_info()
+        try:
+            if self.get_presence() is False:
+                raise Exception("%s: not present" % self.name)
 
-        if self.e2_type == "fantlv":
-            return self.get_tlv_info()
+            eeprom = self.get_eeprom_info(self.e2loc)
+            if eeprom is None:
+                raise Exception("%s: value is none" % self.name)
+
+            if isinstance(eeprom, bytes):
+                eeprom = self.byteTostr(eeprom)
 
+            if self.e2_type is None:
+                return self.decode_eeprom_by_traverse(eeprom)
+
+            if isinstance(self.e2_type, str):
+                return self.decode_eeprom_by_type(self.e2_type, eeprom)
+
+            if isinstance(self.e2_type, list):
+                for e2_type in self.e2_type:
+                    status = self.decode_eeprom_by_type(e2_type, eeprom)
+                    if status is True:
+                        return True
+        except Exception:
+            self.productName = None
+            self.productSerialNumber = None
+            self.hw_version = None
         return False
 
     def get_AirFlow(self):
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py
index 88873a029b64..e12c469e612b 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py
@@ -1,13 +1,23 @@
 #!/usr/bin/env python3
-#######################################################
 #
-# interface.py
-# Python implementation of the Class interface
+# Copyright (C) 2024 Micas Networks Inc.
 #
-#######################################################
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import collections
 from plat_hal.chassisbase import chassisbase
-from plat_hal.baseutil import baseutil
+from plat_hal.baseutil import baseutil, getplatform_name
 from plat_hal.osutil import osutil
 
 
@@ -864,7 +874,7 @@ def get_dcdc_all_info(self):
             tmp = dcdc.sensor.Value
             if tmp is not None:
                 dicttmp['Value'] = tmp
-                if tmp > dicttmp['Max'] or tmp < dicttmp['Min']:
+                if tmp > float(dicttmp['Max']) or tmp < float(dicttmp['Min']):
                     dicttmp["Status"] = "NOT OK"
                 else:
                     dicttmp["Status"] = "OK"
@@ -914,6 +924,8 @@ def get_monitor_temp_by_id(self, temp_id):
             dic["High"] = self.error_ret
             dic["Value"] = self.error_ret
             dic["Unit"] = self.error_ret
+            dic["Invalid"] = self.error_ret
+            dic["Error"] = self.error_ret
         else:
             dic["Name"] = temptmp.name
             dic["Api_name"] = temptmp.api_name
@@ -924,6 +936,8 @@ def get_monitor_temp_by_id(self, temp_id):
             temp_value = temptmp.Value
             dic["Value"] = temp_value if (temp_value is not None) else self.error_ret
             dic["Unit"] = temptmp.Unit
+            dic["Invalid"] = temptmp.temp_invalid
+            dic["Error"] = temptmp.temp_error
         return dic
 
     def get_temp_info(self):
@@ -942,6 +956,22 @@ def get_temp_info(self):
             val_list[temp.name] = dic
         return val_list
 
+    def get_temp_info_s3ip(self):
+        val_list = collections.OrderedDict()
+        # temp
+        templist = self.chas.temp_list_s3ip
+        for temp in templist:
+            dic = collections.OrderedDict()
+            dic["Min"] = temp.Min
+            dic["Max"] = temp.Max
+            dic["Low"] = temp.Low
+            dic["High"] = temp.High
+            temp_value = temp.Value
+            dic["Value"] = temp_value if (temp_value is not None) else self.error_ret
+            dic["Unit"] = temp.Unit
+            val_list[temp.name] = dic
+        return val_list
+
     def get_sensor_info(self):
         val_list = collections.OrderedDict()
         # temp
@@ -1337,3 +1367,10 @@ def get_cpu_reboot_cause(self):
             return "Unknown reboot cause"
         return cpu.get_cpu_reboot_cause()
 
+    def get_sensor_print_src(self):
+        """
+        Get sensor data source
+        @return string of sensor data source
+        """
+        return self.chas.sensor_print_src
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/led.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/led.py
index 7fb869c74d7f..0ae751b81e3d 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/led.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/led.py
@@ -1,10 +1,20 @@
 #!/usr/bin/env python3
-#######################################################
 #
-# led.py
-# Python implementation of the Class led
+# Copyright (C) 2024 Micas Networks Inc.
 #
-#######################################################
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 from plat_hal.devicebase import devicebase
 
 
@@ -15,6 +25,7 @@ def __init__(self, conf=None):
             self.led_type = conf.get('led_type', None)
             self.led_attrs_config = conf.get('led_attrs', None)
             self.led_config = conf.get('led', None)
+            self.led_map = conf.get('led_map', None)
 
     def set_color(self, color):
         status = self.led_attrs_config.get(color, None)
@@ -46,6 +57,11 @@ def get_color(self):
         if ret is False or value is None:
             return False, 'N/A'
         ledval = int(value) & mask
+        if self.led_map is not None:
+            led_color = self.led_map.get(ledval, None)
+            if led_color is None:
+                return False, 'N/A'
+            return True, led_color
         for key, val in self.led_attrs_config.items():
             if (ledval == val) and (key != "mask"):
                 return True, key
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/onie_e2.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/onie_e2.py
index 9ac32cace263..d09fa70973c7 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/onie_e2.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/onie_e2.py
@@ -1,10 +1,20 @@
 #!/usr/bin/env python3
-#######################################################
 #
-# onie_e2.py
-# Python implementation of the Class onie_e2
+# Copyright (C) 2024 Micas Networks Inc.
 #
-#######################################################
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 from plat_hal.devicebase import devicebase
 from eepromutil.onietlv import onie_tlv
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/osutil.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/osutil.py
index 684e26bb9ecd..4501bcf5f29a 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/osutil.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/osutil.py
@@ -1,10 +1,19 @@
 #!/usr/bin/env python3
-#######################################################
 #
-# osutil.py
-# Python implementation of the Class osutil
+# Copyright (C) 2024 Micas Networks Inc.
 #
-#######################################################
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 import os
 import glob
@@ -53,37 +62,31 @@ def wrapper(*args, **kwargs):
     return decorator
 
 
-pidfile = None
-
-
 def file_rw_lock(file_path):
-    global pidfile
     pidfile = open(file_path, "r")
     try:
         fcntl.flock(pidfile, fcntl.LOCK_EX | fcntl.LOCK_NB)
-        platform_hal_debug("file_rw_lock success")
-        return True
+        platform_hal_debug("%s file_rw_lock success, pidfile: %s" % (file_path, pidfile))
+        return True, pidfile
     except Exception:
         if pidfile is not None:
             pidfile.close()
             pidfile = None
-        return False
+        return False, pidfile
 
 
-def file_rw_unlock():
+def file_rw_unlock(pidfile):
     try:
-        global pidfile
-
         if pidfile is not None:
             fcntl.flock(pidfile, fcntl.LOCK_UN)
             pidfile.close()
+            platform_hal_debug("file_rw_unlock success, pidfile: %s" % pidfile)
             pidfile = None
-            platform_hal_debug("file_rw_unlock success")
         else:
             platform_hal_debug("pidfile is invalid, do nothing")
         return True
     except Exception as e:
-        platform_hal_debug("file_rw_unlock err, msg: %s" % (str(e)))
+        platform_hal_debug("file_rw_unlock err, pidfile: %s, msg: %s" % (pidfile, str(e)))
         return False
 
 
@@ -91,11 +94,11 @@ def take_file_rw_lock(file_path):
     loop = 1000
     ret = False
     for i in range(0, loop):
-        ret = file_rw_lock(file_path)
+        ret, pidfile = file_rw_lock(file_path)
         if ret is True:
             break
         time.sleep(0.001)
-    return ret
+    return ret, pidfile
 
 
 class osutil(object):
@@ -252,6 +255,7 @@ def io_rd(reg_addr, read_len=1):
     @staticmethod
     def readsysfs(location, flock_path=None):
         flock_path_tmp = None
+        pidfile = None
         platform_hal_debug("readsysfs, location:%s, flock_path:%s" % (location, flock_path))
         try:
             if flock_path is not None:
@@ -259,7 +263,7 @@ def readsysfs(location, flock_path=None):
                 if len(flock_paths) != 0:
                     flock_path_tmp = flock_paths[0]
                     platform_hal_debug("try to get file lock, path:%s" % flock_path_tmp)
-                    ret = take_file_rw_lock(flock_path_tmp)
+                    ret, pidfile = take_file_rw_lock(flock_path_tmp)
                     if ret is False:
                         platform_hal_debug("take file lock timeout, path:%s" % flock_path_tmp)
                         return False, ("take file rw lock timeout, path:%s" % flock_path_tmp)
@@ -270,14 +274,14 @@ def readsysfs(location, flock_path=None):
             with open(locations[0], 'rb') as fd1:
                 retval = fd1.read()
             retval = osutil.byteTostr(retval)
-            if flock_path_tmp is not None:
-                file_rw_unlock()
+            if pidfile is not None:
+                file_rw_unlock(pidfile)
 
             retval = retval.rstrip('\r\n')
             retval = retval.lstrip(" ")
         except Exception as e:
-            if flock_path_tmp is not None:
-                file_rw_unlock()
+            if pidfile is not None:
+                file_rw_unlock(pidfile)
             platform_hal_debug("readsysfs error, msg:%s" % str(e))
             return False, (str(e) + " location[%s]" % location)
         return True, retval
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py
index a7fc90e0fe23..c62da1929d34 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py
@@ -1,10 +1,20 @@
 #!/usr/bin/env python3
-#######################################################
 #
-# psu.py
-# Python implementation of the Class psu
+# Copyright (C) 2024 Micas Networks Inc.
 #
-#######################################################
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 from eepromutil.fru import ipmifru
 from eepromutil.cust_fru import CustFru
 from plat_hal.devicebase import devicebase
@@ -428,7 +438,7 @@ def psu_not_present_pwm(self, val):
     @property
     def present(self):
         ret, val = self.get_value(self.__presentconfig)
-        if ret is False or val is None or val == "no_support":
+        if ret is False or val is None or val == "no_support" or val == "NA" or val == "ACCESS FAILED":
             return False
         mask = self.__presentconfig.get("mask")
         if isinstance(val, str):
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/rotor.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/rotor.py
index ff120cb474b2..0b96bf340ce3 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/rotor.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/rotor.py
@@ -1,10 +1,20 @@
 #!/usr/bin/env python3
-#######################################################
 #
-# rotor.py
-# Python implementation of the Class rotor
+# Copyright (C) 2024 Micas Networks Inc.
 #
-#######################################################
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 from plat_hal.devicebase import devicebase
 from plat_hal.sensor import sensor
 
@@ -32,7 +42,7 @@ def __init__(self, conf=None):
 
     def getRunning(self):
         ret, val = self.get_value(self.rotor_run_conf)
-        if ret is False or val is None or val == "no_support":
+        if ret is False or val is None or val == "no_support" or val == "NA" or val == "ACCESS FAILED":
             return False
         if isinstance(val, str):
             value = int(val, 16)
@@ -120,7 +130,7 @@ def rotor_HwAlarm(self):
         ret, val = self.get_value(self.rotor_HwAlarm_conf)
         mask = self.rotor_HwAlarm_conf.get("mask")
         no_alarm_value = self.rotor_HwAlarm_conf.get("no_alarm")
-        if ret is False or val is None:
+        if ret is False or val is None or val == "no_support" or val == "NA" or val == "ACCESS FAILED":
             return False
         if isinstance(val, str):
             value = int(val, 16)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/sensor.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/sensor.py
index af2a5384b618..99396923c41a 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/sensor.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/sensor.py
@@ -1,10 +1,20 @@
 #!/usr/bin/env python3
-#######################################################
 #
-# sensor.py
-# Python implementation of the Class sensor
+# Copyright (C) 2024 Micas Networks Inc.
 #
-#######################################################
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import time
 from plat_hal.devicebase import devicebase
 
@@ -103,9 +113,9 @@ def get_median(self, value_config, read_times):
         val_list = []
         for i in range(0, read_times):
             ret, real_value = self.get_value(value_config)
-            if i != (read_times - 1):
-                time.sleep(0.01)
             if ret is False or real_value is None:
+                if i != (read_times - 1):
+                    time.sleep(0.01)
                 continue
             val_list.append(real_value)
         val_list.sort()
@@ -272,3 +282,65 @@ def __str__(self):
                               self.Max, self.Unit,
                               self.format)
         return tmpstr
+
+class sensor_s3ip(sensor):
+    def __init__(self, s3ip_conf):
+        self.s3ip_conf = s3ip_conf
+        value_conf = {}
+        value_conf["loc"] = "%s/%s/%s" % (self.s3ip_conf.get("path"), self.s3ip_conf.get("sensor_dir"), "value")
+        value_conf["way"] = "sysfs"
+        conf = {}
+        conf["value"] = value_conf
+        conf["read_times"] = s3ip_conf.get("read_times", 1)
+        conf["Unit"] = unit = s3ip_conf.get("Unit", None)
+        conf["format"] = unit = s3ip_conf.get("format", None)
+        super(sensor_s3ip, self).__init__(conf)
+        self.min_path = "%s/%s/%s" % (self.s3ip_conf.get("path"), self.s3ip_conf.get("sensor_dir"), "min")
+        self.max_path = "%s/%s/%s" % (self.s3ip_conf.get("path"), self.s3ip_conf.get("sensor_dir"), "max")
+        self.alias = "%s/%s/%s" % (self.s3ip_conf.get("path"), self.s3ip_conf.get("sensor_dir"), "alias")
+        self.sensor_id = self.s3ip_conf.get("type").upper()
+
+    @property
+    def Min(self):
+        try:
+            ret, val = self.get_sysfs(self.min_path)
+            if ret is True:
+                return val
+        except Exception:
+            pass
+        return None
+
+    @Min.setter
+    def Min(self, val):
+        try:
+            return self.set_sysfs(self.min_path, val)
+        except Exception as e:
+            return False, (str(e) + " location[%s][%d]" % (self.min_path, val))
+
+    @property
+    def Max(self):
+        try:
+            ret, val = self.get_sysfs(self.max_path)
+            if ret is True:
+                return val
+        except Exception:
+            pass
+        return None
+
+    @Max.setter
+    def Max(self, val):
+        try:
+            return self.set_sysfs(self.max_path, val)
+        except Exception as e:
+            return False, (str(e) + " location[%s][%d]" % (self.max_path, val))
+
+    @property
+    def name(self):
+        try:
+            ret, val = self.get_sysfs(self.alias)
+            if ret is True:
+                return val
+        except Exception:
+            pass
+        return None
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/temp.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/temp.py
index a202c20339c9..1dbd443f71c3 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/temp.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/temp.py
@@ -1,14 +1,23 @@
 #!/usr/bin/env python3
-#######################################################
 #
-# temp.py
-# Python implementation of the Class temp
+# Copyright (C) 2024 Micas Networks Inc.
 #
-#######################################################
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import os
 import syslog
-from plat_hal.sensor import sensor
-
+from plat_hal.sensor import sensor, sensor_s3ip
 
 PLATFORM_HAL_TEMP_DEBUG_FILE = "/etc/.platform_hal_temp_debug_flag"
 
@@ -82,7 +91,7 @@ def get_max_value(self, conf):
             ret, val = self.get_value(conf)
             if ret is False or val is None:
                 return None
-            return val
+            return float(val)
         except Exception:
             return None
 
@@ -120,6 +129,25 @@ def Value(self):
                     self.__Value = int(max_val)
                 else:
                     self.__Value = self.get_format_value(self.format % max_val)
+            elif isinstance(self.ValueConfig, dict) and self.ValueConfig.get("val_conf_list") is not None:
+                val_list = []
+                fail_set = set()
+                for index, val_conf_item in enumerate(self.ValueConfig["val_conf_list"]):
+                    val_tmp = self.get_max_value(val_conf_item)
+                    if val_tmp is None:
+                        fail_set.add(index)
+                        fail_val = val_conf_item.get("fail_val")
+                        if fail_val is None:
+                            return None
+                        val_tmp = fail_val
+                    val_list.append(val_tmp)
+                # check fail set
+                fail_conf_set_list = self.ValueConfig.get("fail_conf_set_list",[])
+                for item in fail_conf_set_list:
+                    if item.issubset(fail_set):
+                        return None
+                val_tuple = tuple(val_list)
+                self.__Value = self.get_format_value(self.ValueConfig["format"] % (val_tuple))
             else:
                 ret, val = self.get_value(self.ValueConfig)
                 if ret is False or val is None:
@@ -137,3 +165,8 @@ def Value(self):
     @Value.setter
     def Value(self, val):
         self.__Value = val
+
+class temp_s3ip(sensor_s3ip):
+    def __init__(self, s3ip_conf = None):
+        super(temp_s3ip, self).__init__(s3ip_conf)
+        self.temp_id = s3ip_conf.get("type").upper()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/restful_api.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/restful_api.py
index 2cb7f5273a44..86e102594cab 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/restful_api.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/restful_api.py
@@ -1,11 +1,26 @@
 #!/usr/bin/env python3
-# -*- coding: utf-8 -*-
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 import os
 import syslog
 
 import requests
 
+
 class RestfulApiClient():
     Debug_file = "/tmp/restful_api_debug"
     BmcBaseUrl = 'http://240.1.1.2:8080'
@@ -14,12 +29,13 @@ class RestfulApiClient():
     HostnameUrl = '/api/v1.0/hostname'
     EventsUrl = '/api/v1.0/events'
     SensorsUrl = '/api/v1.0/sys_switch/sensors'
+    TempSensorsUrl = '/api/v1.0/sys_switch/temp_sensor'
+    VolSensorsUrl = '/api/v1.0/sys_switch/vol_sensor'
+    CurSensorsUrl = '/api/v1.0/sys_switch/cur_sensor'
     SyseepromUrl = '/api/v1.0/syseeprom'
     FansUrl = '/api/v1.0/sys_switch/fans'
-    # FanUrl = '/api/v1.0/sys_switch/fan/fan1'
     FanUrl = '/api/v1.0/sys_switch/fan/'
     PsusUrl = '/api/v1.0/sys_switch/psus'
-    # PsuUrl = '/api/v1.0/sys_switch/psu/psu1'
     PsuUrl = '/api/v1.0/sys_switch/psu/'
     LEDsUrl = '/api/v1.0/sys_switch/leds'
     FirmwaresUrl = '/api/v1.0/sys_switch/firmwares'
@@ -28,7 +44,6 @@ class RestfulApiClient():
     TimeUrl = '/api/v1.0/time'
     TimezoneUrl = '/api/v1.0/timezone'
     NtpUrl = '/api/v1.0/ntp'
-    PowerUrl = '/api/v1.0/power'
 
     def restful_api_error_log(self, msg):
         syslog.openlog("restful_api")
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/baseutil.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/baseutil.py
index 340a1f7a733f..fdc4410e2c20 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/baseutil.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/baseutil.py
@@ -1,4 +1,20 @@
 #!/usr/bin/env python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import os
 
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/smbus.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/smbus.py
index 5f1659b3bbf0..d474cffa2d35 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/smbus.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/smbus.py
@@ -1,25 +1,19 @@
 #!/usr/bin/env python3
-# smbus2 - A drop-in replacement for smbus-cffi/smbus-python
-# The MIT License (MIT)
-# Copyright (c) 2017 Karl-Petter Lindegaard
 #
-# Permission is hereby granted, free of charge, to any person obtaining a copy
-# of this software and associated documentation files (the "Software"), to deal
-# in the Software without restriction, including without limitation the rights
-# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-# copies of the Software, and to permit persons to whom the Software is
-# furnished to do so, subject to the following conditions:
+# Copyright (C) 2024 Micas Networks Inc.
 #
-# The above copyright notice and this permission notice shall be included in all
-# copies or substantial portions of the Software.
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
 #
-# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
-# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
-# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
-# SOFTWARE.
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 import os
 import sys
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
index e432430dba46..4e106f013819 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
@@ -8,9 +8,11 @@ module_out_put_dir := $(PWD)/build
 export module_out_put_dir
 
 PLAT_SYSFS_DIR = $(PWD)/plat_sysfs
+S3IP_SYSFS_DIR = $(PWD)/s3ip_sysfs
 PINCTRL = $(PWD)/pinctrl
 
 export PLAT_SYSFS_DIR
+export S3IP_SYSFS_DIR
 
 platform_common-objs := platform_common_module.o dfd_tlveeprom.o
 obj-m += platform_common.o
@@ -39,9 +41,14 @@ obj-m += wb_i2c_mux_pca9641.o
 obj-m += wb_i2c_mux_pca954x.o
 obj-m += wb_xdpe132g5c_pmbus.o
 obj-m += wb_i2c_gpio_device.o
+obj-m += ct7148.o
+obj-m += wb_ucd9081.o
+obj-m += wb_indirect_dev.o
+
 
 all :
 	$(MAKE) -C $(PLAT_SYSFS_DIR)
+	$(MAKE) -C $(S3IP_SYSFS_DIR)
 	$(MAKE) -C $(PINCTRL)
 	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
 	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ct7148.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ct7148.c
new file mode 100644
index 000000000000..fff4b0e0eecc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ct7148.c
@@ -0,0 +1,237 @@
+/*
+ * An ct7148 driver for tmp ct7148 function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/of_device.h>
+#include <linux/sysfs.h>
+
+/* debug switch level */
+typedef enum {
+    DBG_START,
+    DBG_VERBOSE,
+    DBG_KEY,
+    DBG_WARN,
+    DBG_ERROR,
+    DBG_END,
+} dbg_level_t;
+
+static int debuglevel = 0;
+module_param(debuglevel, int, S_IRUGO | S_IWUSR);
+
+#define CT7318_DEBUG(fmt, arg...)  do { \
+    if (debuglevel > DBG_START && debuglevel < DBG_ERROR) { \
+          printk(KERN_INFO "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+    } else if (debuglevel >= DBG_ERROR) {   \
+        printk(KERN_ERR "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+    } else {    } \
+} while (0)
+
+#define CT7318_ERROR(fmt, arg...)  do { \
+     if (debuglevel > DBG_START) {  \
+        printk(KERN_ERR "[ERROR]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+       } \
+ } while (0)
+
+enum chips { ct7318 };
+
+/* The CT7318 registers */
+#define CT7318_CONFIG_REG_1             0x09
+#define CT7318_CONVERSION_RATE_REG      0x0A
+#define CT7318_MANUFACTURER_ID_REG      0xFE
+#define CT7318_DEVICE_ID_REG            0xFF
+
+static const u8 CT7318_TEMP_MSB[2] = { 0x00, 0x01 };
+static const u8 CT7318_TEMP_LSB[2] = { 0x15, 0x10 };
+
+/* Flags */
+#define CT7318_CONFIG_SHUTDOWN          0x40
+#define CT7318_CONFIG_RANGE             0x04
+
+/* Manufacturer / Device ID's */
+#define CT7318_MANUFACTURER_ID          0x59
+#define CT7318_DEVICE_ID                0x8D
+
+static const struct i2c_device_id ct7318_id[] = {
+    { "ct7318", 2 },
+    { }
+};
+MODULE_DEVICE_TABLE(i2c, ct7318_id);
+
+static const struct of_device_id ct7318_of_match[] = {
+    {.compatible = "sensylink,ct7318"},
+    { },
+};
+MODULE_DEVICE_TABLE(of, ct7318_of_match);
+
+struct ct7318_data {
+    struct i2c_client *client;
+    struct mutex update_lock;
+    u32 temp_config[5];
+    struct hwmon_channel_info temp_info;
+    const struct hwmon_channel_info *info[2];
+    struct hwmon_chip_info chip;
+    char valid;
+    unsigned long last_updated;
+    unsigned long channels;
+    u8 config;
+    s16 temp[4];
+};
+
+static int ct7318_register_to_temp(s16 reg)
+{
+    s16 tmp_val;
+    int val;
+
+    CT7318_DEBUG("reg_data, data=0x%04x \n", reg);
+
+    /* Positive number:reg*0.125 */
+    if (!(reg & 0x400)) {
+        val = reg * 125;
+        /* Negative number: The first bit is the sign bit, and the rest is inverted +1 */
+    } else {
+        tmp_val = ((~((s16)reg)) & 0x7ff) + 1;
+        CT7318_DEBUG("ct7318, tmp_val=0x%08x -- %d\n", tmp_val, tmp_val);
+        val = -(tmp_val * 125);
+    }
+
+    CT7318_DEBUG("ct7318 reg2data, val=0x%08x -- %d \n", val, val);
+
+    return val;
+}
+
+static struct ct7318_data *ct7318_update_device(struct device *dev)
+{
+    struct ct7318_data *data = dev_get_drvdata(dev);
+    struct i2c_client *client = data->client;
+    int i;
+
+    mutex_lock(&data->update_lock);
+
+    if (time_after(jiffies, data->last_updated + (HZ / 16)) || !data->valid) {
+
+        for (i = 0; i < data->channels; i++) {
+            data->temp[i] = i2c_smbus_read_byte_data(client, CT7318_TEMP_MSB[i]) << 3;
+            data->temp[i] |= (i2c_smbus_read_byte_data(client, CT7318_TEMP_LSB[i]) >> 5);
+        }
+        data->last_updated = jiffies;
+        data->valid = 1;
+    }
+
+    mutex_unlock(&data->update_lock);
+
+    return data;
+}
+
+static int ct7318_read(struct device *dev, enum hwmon_sensor_types type,
+                       u32 attr, int channel, long *val)
+{
+    struct ct7318_data *ct7318 = ct7318_update_device(dev);
+
+    switch (attr) {
+        case hwmon_temp_input:
+            *val = ct7318_register_to_temp(ct7318->temp[channel]);
+            return 0;
+        case hwmon_temp_fault:
+            /*
+            * The OPEN bit signals a fault. This is bit 0 of the temperature
+            * register (low byte).
+            */
+            return 0;
+        default:
+            return -EOPNOTSUPP;
+    }
+}
+
+static umode_t ct7318_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr, int channel)
+{
+    switch (attr) {
+        case hwmon_temp_fault:
+            if (channel == 0) {
+                return 0;
+            }
+            return 0444;
+        case hwmon_temp_input:
+            return 0444;
+        default:
+            return 0;
+    }
+}
+
+static const struct hwmon_ops ct7318_ops = {
+    .read = ct7318_read,
+    .is_visible = ct7318_is_visible,
+};
+
+static int ct7318_probe(struct i2c_client *client)
+{
+    struct device *dev = &client->dev;
+    struct device *hwmon_dev;
+    struct ct7318_data *data;
+    int i;
+
+    data = devm_kzalloc(dev, sizeof(struct ct7318_data), GFP_KERNEL);
+    if (!data) {
+        return -ENOMEM;
+    }
+
+    mutex_init(&data->update_lock);
+
+    data->channels = i2c_match_id(ct7318_id, client)->driver_data;
+    data->client = client;
+
+    for (i = 0; i < data->channels; i++) {
+        data->temp_config[i] = HWMON_T_INPUT;
+    }
+
+    data->chip.ops = &ct7318_ops;
+    data->chip.info = data->info;
+
+    data->info[0] = &data->temp_info;
+
+    data->temp_info.type = hwmon_temp;
+    data->temp_info.config = data->temp_config;
+
+    hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, data, &data->chip, NULL);
+    return PTR_ERR_OR_ZERO(hwmon_dev);
+}
+
+static struct i2c_driver ct7318_driver = {
+    .class = I2C_CLASS_HWMON,
+    .driver = {
+        .name   = "ct7318",
+        .of_match_table = of_match_ptr(ct7318_of_match),
+    },
+    .probe_new = ct7318_probe,
+    .id_table = ct7318_id,
+};
+
+module_i2c_driver(ct7318_driver);
+
+MODULE_AUTHOR("sonic_rd@whitebox");
+MODULE_DESCRIPTION("Sensylink CT7318 temperature sensor driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.c
index 0d6f38ecc551..7469c760a568 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.c
@@ -1,9 +1,11 @@
 /*
- * Copyright (C) 2003-2014 FreeIPMI Core Team
+ * An dfd_tlveeprom driver for dfd rlveeprom function
  *
- * This program is free software: you can redistribute it and/or modify
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
+ * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
  *
  * This program is distributed in the hope that it will be useful,
@@ -12,33 +14,10 @@
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- *
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
-/*****************************************************************************\
- *  Copyright (C) 2007-2014 Lawrence Livermore National Security, LLC.
- *  Copyright (C) 2007 The Regents of the University of California.
- *  Produced at Lawrence Livermore National Laboratory (cf, DISCLAIMER).
- *  Written by Albert Chu <chu11@llnl.gov>
- *  UCRL-CODE-232183
- *
- *  This file is part of Ipmi-fru, a tool used for retrieving
- *  motherboard field replaceable unit (FRU) information. For details,
- *  see http://www.llnl.gov/linux/.
- *
- *  Ipmi-fru is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by the
- *  Free Software Foundation; either version 3 of the License, or (at your
- *  option) any later version.
- *
- *  Ipmi-fru is distributed in the hope that it will be useful, but
- *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- *  for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with Ipmi-fru.  If not, see <http://www.gnu.org/licenses/>.
-\*****************************************************************************/
+
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/slab.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.h
index 6eaac5848223..30991eca5bc8 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for dfd_tlveeprom driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef DFD_OPENBMC_TLVEEPROM_H
 #define DFD_OPENBMC_TLVEEPROM_H
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/fpga_i2c.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/fpga_i2c.h
index 649a8452debe..293484605cf7 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/fpga_i2c.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/fpga_i2c.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for fpga_i2c driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef _FPGA_I2C_H
 #define _FPGA_I2C_H
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.c
index e74f4e800582..84d3f54943fd 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.c
@@ -1,9 +1,21 @@
 /*
- * hw_test.c
- * Original Author : support, 2020-10-15
+ * An hw_test driver for hw test read/write function
  *
- * History
- *    v1.0    support  2020-10-15  Initial version.
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <linux/miscdevice.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.h
index 695fa336c4ff..231396390272 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.h
@@ -1,3 +1,22 @@
+/*
+ * A header definition for hw_test driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
 
 #ifndef _LINUX_DRAM_DRIVER_H
 #define _LINUX_DRAM_DRIVER_H
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/core.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/core.h
index 840103c40c14..81655ead6007 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/core.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/core.h
@@ -1,11 +1,24 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Core private header for the pin control subsystem
+ * A header definition for pin control subsystem
  *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * Based on core.h
  * Copyright (C) 2011 ST-Ericsson SA
- * Written on behalf of Linaro for ST-Ericsson
  *
- * Author: Linus Walleij <linus.walleij@linaro.org>
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <linux/kref.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000.c
index 753c8a061a86..7689ba1371bf 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000.c
@@ -1,9 +1,21 @@
-// SPDX-License-Identifier: GPL-2.0
 /*
- * Intel Denverton SoC pinctrl/GPIO driver
+ * An wb_gpio_c3000 driver for gpio c3000 function
  *
- * Copyright (C) 2017, Intel Corporation
- * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <linux/mod_devicetable.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000_device.c
index 33ab19a5ac44..ddfc5791b706 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000_device.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000_device.c
@@ -1,3 +1,23 @@
+/*
+ * An wb_gpio_c3000_device driver for gpio c3000 device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <linux/module.h>
 #include <linux/io.h>
 #include <linux/device.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.c
index 7a52f17ac8f9..98d735ea6a1a 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.c
@@ -1,10 +1,24 @@
-// SPDX-License-Identifier: GPL-2.0
 /*
- * Intel pinctrl/GPIO core driver.
+ * An wb_pinctrl_intel driver for pinctrl intel function
  *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * Based on pinctrl-intel.c
  * Copyright (C) 2015, Intel Corporation
- * Authors: Mathias Nyman <mathias.nyman@linux.intel.com>
- *          Mika Westerberg <mika.westerberg@linux.intel.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <linux/acpi.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.h
index 5ed0cc0651a5..111edabacfcc 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.h
@@ -1,10 +1,24 @@
-/* SPDX-License-Identifier: GPL-2.0 */
 /*
- * Core pinctrl/GPIO driver for Intel GPIO controllers
+ * A header definition for pinctrl_intel driver
  *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * Based on pinctrl-intel.h
  * Copyright (C) 2015, Intel Corporation
- * Authors: Mathias Nyman <mathias.nyman@linux.intel.com>
- *          Mika Westerberg <mika.westerberg@linux.intel.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #ifndef PINCTRL_INTEL_H
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c
index 22962556eb0d..44bfe8e95b6f 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c
@@ -1,3 +1,23 @@
+/*
+ * An dfd_cfg driver for cfg function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <linux/list.h>
 #include <linux/string.h>
 #include <linux/types.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_adapter.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_adapter.c
index 9c8dc6aa098e..cd26851725cc 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_adapter.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_adapter.c
@@ -1,3 +1,23 @@
+/*
+ * An dfd_cfg_adapter driver for cfg adapter function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <linux/fs.h>
 #include <linux/slab.h>
 #include <asm/unistd.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_file.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_file.c
index ac1c22ff1c51..eaf58f6bc519 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_file.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_file.c
@@ -1,3 +1,23 @@
+/*
+ * An dfd_cfg_file driver for cfg file function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <asm/unistd.h>
 #include <linux/uaccess.h>
 #include <linux/stat.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c
index c1ad958bc8bb..26a7fab2c967 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c
@@ -1,3 +1,23 @@
+/*
+ * An dfd_cfg_info driver for cfg information function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <linux/string.h>
 #include <linux/types.h>
 #include <linux/slab.h>
@@ -551,6 +571,22 @@ static int dfd_info_reg2data_mac_th5(int data, int *temp_value)
     return DFD_RV_OK;
 }
 
+static int dfd_info_reg2data_mac_th4(int data, int *temp_value)
+{
+    int tmp_val;
+    int val;
+
+    DBG_DEBUG(DBG_VERBOSE, "reg2data_mac_th4, data=%d\n", data);
+
+    tmp_val = data >> 4;
+    val = 356070 - (((tmp_val - 2) * 237340) / 2000);
+
+    DBG_DEBUG(DBG_VERBOSE, "reg2data_mac_th4, val=%d\n", val);
+    *temp_value = val;
+
+    return DFD_RV_OK;
+}
+
 static int dfd_info_reg2data_mac_td3(int data, int *temp_value)
 {
     int val;
@@ -658,6 +694,9 @@ static int dfd_info_get_cpld_temperature(int key, int *value)
     case MAC_TD3:
         rv = dfd_info_reg2data_mac_td3(temp_reg, &temp_value);
         break;
+    case MAC_TH4:
+        rv = dfd_info_reg2data_mac_th4(temp_reg, &temp_value);
+        break;
     default:
         temp_value = temp_reg;
         rv = DFD_RV_OK;
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_listnode.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_listnode.c
index d6fd7e104c9f..450d8a360173 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_listnode.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_listnode.c
@@ -1,3 +1,23 @@
+/*
+ * An dfd_cfg_listnode driver for cfg listnode function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <linux/list.h>
 #include <linux/slab.h>
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_fan_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_fan_driver.c
index d8965d75c9c0..203a8cc0d637 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_fan_driver.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_fan_driver.c
@@ -1,3 +1,23 @@
+/*
+ * An dfd_fan_driver driver for dfd fan function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <linux/module.h>
 #include <linux/slab.h>
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_module.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_module.c
index 9e5b00b795de..c937cb790fd1 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_module.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_module.c
@@ -1,3 +1,23 @@
+/*
+ * An dfd_module driver for dfd module function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <linux/module.h>
 
 #include "../dev_sysfs/include/sysfs_common.h"
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_psu_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_psu_driver.c
index 55e2e4339ae7..bb0eba0bfa05 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_psu_driver.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_psu_driver.c
@@ -1,3 +1,23 @@
+/*
+ * An dfd_psu_driver driver for dfd psu function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <linux/module.h>
 #include <linux/slab.h>
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_sensors_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_sensors_driver.c
index bfca20290efb..433a51dc75ff 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_sensors_driver.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_sensors_driver.c
@@ -1,3 +1,23 @@
+/*
+ * An dfd_sensor_driver driver for dfd sensor function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <linux/module.h>
 #include <linux/slab.h>
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_sff_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_sff_driver.c
index 5c1faff975b1..f768c5640e76 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_sff_driver.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_sff_driver.c
@@ -1,3 +1,23 @@
+/*
+ * An dfd_sff_driver driver for dfd sff function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <linux/module.h>
 
 #include "./include/dfd_module.h"
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_slot_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_slot_driver.c
index 69c82adabef0..6e3c70abea6f 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_slot_driver.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_slot_driver.c
@@ -1,3 +1,23 @@
+/*
+ * An dfd_slot_driver driver for dfd slot function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <linux/module.h>
 #include <linux/slab.h>
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg.h
index af3de1ca9938..2b698f37af61 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for dfd_cfg driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef __DFD_CFG_H__
 #define __DFD_CFG_H__
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_adapter.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_adapter.h
index 70d8b536c437..c599250dd225 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_adapter.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_adapter.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for dfd_cfg_adapter driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef __DFD_CFG_ADAPTER_H__
 #define __DFD_CFG_ADAPTER_H__
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_file.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_file.h
index 50d7a42d5564..d74bfae0d697 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_file.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_file.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for dfd_cfg_file driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef __DFD_CFG_FILE_H__
 #define __DFD_CFG_FILE_H__
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_info.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_info.h
index 88e8f92c10fe..def93cd51353 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_info.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_info.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for dfd_cfg_info driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef __DFD_CFG_INFO_H__
 #define __DFD_CFG_INFO_H__
 
@@ -97,7 +117,8 @@ typedef enum sensor_format_mem_s {
     LINEAR16,
     TMP464,
     MAC_TH5,
-    MAC_TD3
+    MAC_TD3,
+    MAC_TH4
 } sensor_format_mem_t;
 
 typedef int (*info_hwmon_buf_f)(uint8_t *buf, int buf_len, uint8_t *buf_new, int *buf_len_new, info_ctrl_t *info_ctrl);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_listnode.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_listnode.h
index 955dfa96e42e..9c4bb057beb8 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_listnode.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_listnode.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for dfd_cfg_listnode driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef __DFD_CFG_LISTNODE_H__
 #define __DFD_CFG_LISTNODE_H__
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_fan_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_fan_driver.h
index 1065fd9eed3f..e1987b0f06cd 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_fan_driver.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_fan_driver.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for dfd_fan_driver driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef _DFD_FAN_DRIVER_H_
 #define _DFD_FAN_DRIVER_H_
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_module.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_module.h
index a547255cf3ab..8ed110e7ae69 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_module.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_module.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for dfd_module driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef __DFD_MODULE_H__
 #define __DFD_MODULE_H__
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_psu_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_psu_driver.h
index ce7199660557..a9d7f465915e 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_psu_driver.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_psu_driver.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for dfd_psu_driver driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef _DFD_PSU_DRIVER_H_
 #define _DFD_PSU_DRIVER_H_
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_sensors_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_sensors_driver.h
index 16733b26029f..25998164ab36 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_sensors_driver.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_sensors_driver.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for dfd_sensor_driver driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef _DFD_SENSORS_DRIVER_H_
 #define _DFD_SENSORS_DRIVER_H_
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_sff_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_sff_driver.h
index 7107b72ee4b2..3e9305d6647c 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_sff_driver.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_sff_driver.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for dfd_aff_driver driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef _DFD_SFF_DRIVER_H_
 #define _DFD_SFF_DRIVER_H_
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_slot_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_slot_driver.h
index c68caecd2e66..1e628c0e9754 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_slot_driver.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_slot_driver.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for dfd_slot_driver driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef _DFD_SLOT_DRIVER_H_
 #define _DFD_SLOT_DRIVER_H_
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/include/plat_switch.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/include/plat_switch.h
index bbd813e87114..b862ef7121cf 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/include/plat_switch.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/include/plat_switch.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for plat_switch driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef _PLAT_SWITCH_H_
 #define _PLAT_SWITCH_H_
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/include/sysfs_common.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/include/sysfs_common.h
index 5b73731e1fbf..4ac0cee1a4a6 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/include/sysfs_common.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/include/sysfs_common.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for sysfs_common driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef _SYSFS_COMMON_H_
 #define _SYSFS_COMMON_H_
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_fan.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_fan.c
index 931c7c243a21..3809da9ec1a1 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_fan.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_fan.c
@@ -1,8 +1,21 @@
 /*
- * plat_fan.c
+ * An plat_fan driver for plat fan function
  *
- * This module create fan kobjects and attributes in /sys/wb_plat/fan
+ * Copyright (C) 2024 Micas Networks Inc.
  *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <linux/slab.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_psu.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_psu.c
index 197f94b64991..4207b9bc8ca7 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_psu.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_psu.c
@@ -1,8 +1,21 @@
 /*
- * plat_psu.c
+ * An plat_psu driver for plat psu function
  *
- * This module create psu kobjects and attributes in /sys/wb_plat/psu
+ * Copyright (C) 2024 Micas Networks Inc.
  *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <linux/slab.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sensor.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sensor.c
index aaf62f4c1a3c..da7d5a872350 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sensor.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sensor.c
@@ -1,7 +1,21 @@
 /*
- * plat_sensor.c
+ * An plat_sensor driver for plat sensor function
  *
- * This module create sensor kobjects and attributes in /sys/wb_plat/sensor
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <linux/slab.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sff.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sff.c
index 50c0f78aede9..cf2cd5181f01 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sff.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sff.c
@@ -1,8 +1,21 @@
 /*
- * plat_sff.c
+ * An plat_sff driver for plat sff function
  *
- * This module create sff kobjects and attributes in /sys/wb_plat/sff
+ * Copyright (C) 2024 Micas Networks Inc.
  *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <linux/slab.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_slot.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_slot.c
index 7c50f283bd06..979de7418475 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_slot.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_slot.c
@@ -1,8 +1,21 @@
 /*
- * plat_slot.c
+ * An plat_slot driver for plat slot function
  *
- * This module create sff kobjects and attributes in /sys/wb_plat/slot
+ * Copyright (C) 2024 Micas Networks Inc.
  *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <linux/slab.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_switch.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_switch.c
index fea008b41bfe..e36ff6657c90 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_switch.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_switch.c
@@ -1,11 +1,23 @@
 /*
- * plat_switch.c
+ * An plat_switch driver for plat switch function
  *
- * This module create a kset in sysfs called /sys/wb_plat
- * Then other switch kobjects are created and assigned to this kset,
- * such as "board", "cpld", "fan", "psu", "sff", ...
+ * Copyright (C) 2024 Micas Networks Inc.
  *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
+
 #include "./include/plat_switch.h"
 
 #define SWITCH_INFO(fmt, args...)  LOG_INFO("switch: ", fmt, ##args)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common.h
index 9e4a4fae00c1..ffd752204e4f 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for platfrom_common driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef __PLATFORM_COMMON_H__
 #define __PLATFORM_COMMON_H__
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common_module.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common_module.c
index 189a3aa056b2..57f436e5b8af 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common_module.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common_module.c
@@ -1,3 +1,23 @@
+/*
+ * An platform_common_module driver for platform  common modules function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/sysfs.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pmbus.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/pmbus.h
index 10fb17879f8e..853dba4333e3 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/pmbus.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/pmbus.h
@@ -1,9 +1,25 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
 /*
- * pmbus.h - Common defines and structures for PMBus devices
+ * A header definition for pmbus driver
  *
+ * Copyright (C) 2024 Micas Networks Inc.
+ * 
+ * Based on kernel pmbus.h
  * Copyright (c) 2010, 2011 Ericsson AB.
  * Copyright (c) 2012 Guenter Roeck
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #ifndef PMBUS_H
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/Makefile
new file mode 100644
index 000000000000..c4e5d6928bb0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/Makefile
@@ -0,0 +1,19 @@
+PWD		= $(shell pwd)
+SYSFS_OUT_PUT := $(PWD)/build
+sysfs_out_put_dir := $(SYSFS_OUT_PUT)/S3IP_sysfs/
+sysfs_cfg_dir := $(SYSFS_OUT_PUT)/dfd_cfg/
+export sysfs_out_put_dir sysfs_cfg_dir
+
+SYSFS_DRIVER_DIR = $(PWD)/sysfs_driver
+SWITCH_DRIVER_DIR = $(PWD)/switch_driver
+DEVICE_DRIVER_DIR = $(PWD)/device_driver
+
+export SYSFS_DRIVER_DIR SWITCH_DRIVER_DIR
+
+all :
+	$(MAKE) -C $(SYSFS_DRIVER_DIR)
+	$(MAKE) -C $(SWITCH_DRIVER_DIR)
+	$(MAKE) -C $(DEVICE_DRIVER_DIR)
+
+clean :
+	-rm  -rf $(SYSFS_OUT_PUT)
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/Makefile
new file mode 100644
index 000000000000..a971e0bf3844
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/Makefile
@@ -0,0 +1,36 @@
+PWD		= $(shell pwd)
+
+MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
+DEV_SYSFS_HEADER_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../sysfs_driver/include)
+SWITCH_DVR_HEADER_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../switch_driver/include)
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -I$(DEV_SYSFS_HEADER_DIR)
+EXTRA_CFLAGS+= -I$(SWITCH_DVR_HEADER_DIR)
+EXTRA_CFLAGS+= -Wall
+
+KBUILD_EXTRA_SYMBOLS += $(SYSFS_DRIVER_DIR)/Module.symvers
+KBUILD_EXTRA_SYMBOLS += $(SWITCH_DRIVER_DIR)/Module.symvers
+
+obj-m := syseeprom_device_driver.o
+obj-m += fan_device_driver.o
+obj-m += cpld_device_driver.o
+obj-m += sysled_device_driver.o
+obj-m += slot_device_driver.o
+obj-m += psu_device_driver.o
+obj-m += transceiver_device_driver.o
+obj-m += temp_sensor_device_driver.o
+obj-m += vol_sensor_device_driver.o
+obj-m += curr_sensor_device_driver.o
+obj-m += fpga_device_driver.o
+obj-m += watchdog_device_driver.o
+obj-m += system_device_driver.o
+obj-m += eeprom_device_driver.o
+
+all:
+	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
+	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
+	cp -p  $(PWD)/*.ko $(module_out_put_dir)
+clean:
+	rm -f $(PWD)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd 
+	rm -f $(PWD)/Module.markers $(PWD)/Module.symvers $(PWD)/modules.order 
+	rm -rf $(PWD)/.tmp_versions
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/cpld_device_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/cpld_device_driver.c
new file mode 100644
index 000000000000..de760b7bc775
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/cpld_device_driver.c
@@ -0,0 +1,217 @@
+/*
+ * An cpld_device_driver driver for cpld devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+
+#include "device_driver_common.h"
+#include "cpld_sysfs.h"
+#include "dfd_sysfs_common.h"
+
+#define CPLD_INFO(fmt, args...) LOG_INFO("cpld: ", fmt, ##args)
+#define CPLD_ERR(fmt, args...)  LOG_ERR("cpld: ", fmt, ##args)
+#define CPLD_DBG(fmt, args...)  LOG_DBG("cpld: ", fmt, ##args)
+
+static int g_loglevel = 0;
+static struct switch_drivers_s *g_drv = NULL;
+
+/******************************************CPLD***********************************************/
+static int wb_get_main_board_cpld_number(void)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_cpld_number);
+
+    ret = g_drv->get_main_board_cpld_number();
+    return ret;
+}
+
+/*
+ * wb_get_main_board_cpld_alias - Used to identify the location of cpld,
+ * @cpld_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_cpld_alias(unsigned int cpld_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_cpld_alias);
+
+    ret = g_drv->get_main_board_cpld_alias(cpld_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_cpld_type - Used to get cpld model name
+ * @cpld_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_cpld_type(unsigned int cpld_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_cpld_type);
+
+    ret = g_drv->get_main_board_cpld_type(cpld_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_cpld_firmware_version - Used to get cpld firmware version,
+ * @cpld_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_cpld_firmware_version(unsigned int cpld_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_cpld_firmware_version);
+
+    ret = g_drv->get_main_board_cpld_firmware_version(cpld_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_cpld_board_version - Used to get cpld board version,
+ * @cpld_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_cpld_board_version(unsigned int cpld_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_cpld_board_version);
+
+    ret = g_drv->get_main_board_cpld_board_version(cpld_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_cpld_test_reg - Used to test cpld register read
+ * filled the value to buf, value is hexadecimal, start with 0x
+ * @cpld_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_cpld_test_reg(unsigned int cpld_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_cpld_test_reg);
+
+    ret = g_drv->get_main_board_cpld_test_reg(cpld_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_set_main_board_cpld_test_reg - Used to test cpld register write
+ * @cpld_index: start with 1
+ * @value: value write to cpld
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_set_main_board_cpld_test_reg(unsigned int cpld_index, unsigned int value)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_main_board_cpld_test_reg);
+
+    ret = g_drv->set_main_board_cpld_test_reg(cpld_index, value);
+    return ret;
+}
+/***************************************end of CPLD*******************************************/
+
+static struct s3ip_sysfs_cpld_drivers_s drivers = {
+    /*
+     * set ODM CPLD drivers to /sys/s3ip/cpld,
+     * if not support the function, set corresponding hook to NULL.
+     */
+    .get_main_board_cpld_number = wb_get_main_board_cpld_number,
+    .get_main_board_cpld_alias = wb_get_main_board_cpld_alias,
+    .get_main_board_cpld_type = wb_get_main_board_cpld_type,
+    .get_main_board_cpld_firmware_version = wb_get_main_board_cpld_firmware_version,
+    .get_main_board_cpld_board_version = wb_get_main_board_cpld_board_version,
+    .get_main_board_cpld_test_reg = wb_get_main_board_cpld_test_reg,
+    .set_main_board_cpld_test_reg = wb_set_main_board_cpld_test_reg,
+};
+
+static int __init cpld_device_driver_init(void)
+{
+    int ret;
+
+    CPLD_INFO("cpld_init...\n");
+    g_drv = s3ip_switch_driver_get();
+    check_p(g_drv);
+
+    ret = s3ip_sysfs_cpld_drivers_register(&drivers);
+    if (ret < 0) {
+        CPLD_ERR("cpld drivers register err, ret %d.\n", ret);
+        return ret;
+    }
+
+    CPLD_INFO("cpld_init success.\n");
+    return 0;
+}
+
+static void __exit cpld_device_driver_exit(void)
+{
+    s3ip_sysfs_cpld_drivers_unregister();
+    CPLD_INFO("cpld_exit success.\n");
+    return;
+}
+
+module_init(cpld_device_driver_init);
+module_exit(cpld_device_driver_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4, all=0xf).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("sonic S3IP sysfs");
+MODULE_DESCRIPTION("cpld device driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/curr_sensor_device_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/curr_sensor_device_driver.c
new file mode 100644
index 000000000000..1c2a1e25f6de
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/curr_sensor_device_driver.c
@@ -0,0 +1,220 @@
+/*
+ * An curr_sensor_device_driver driver for current devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+
+#include "device_driver_common.h"
+#include "curr_sensor_sysfs.h"
+#include "dfd_sysfs_common.h"
+
+#define CURR_SENSOR_INFO(fmt, args...) LOG_INFO("curr_sensor: ", fmt, ##args)
+#define CURR_SENSOR_ERR(fmt, args...)  LOG_ERR("curr_sensor: ", fmt, ##args)
+#define CURR_SENSOR_DBG(fmt, args...)  LOG_DBG("curr_sensor: ", fmt, ##args)
+
+static int g_loglevel = 0;
+static struct switch_drivers_s *g_drv = NULL;
+
+/*************************************main board current***************************************/
+static int wb_get_main_board_curr_number(void)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_curr_number);
+
+    ret = g_drv->get_main_board_curr_number();
+    return ret;
+}
+
+/*
+ * wb_get_main_board_curr_alias - Used to identify the location of the current sensor,
+ * @curr_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_curr_alias(unsigned int curr_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_curr_alias);
+
+    ret = g_drv->get_main_board_curr_alias(curr_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_curr_type - Used to get the model of current sensor,
+ * @curr_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_curr_type(unsigned int curr_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_curr_type);
+
+    ret = g_drv->get_main_board_curr_type(curr_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_curr_max - Used to get the maximum threshold of current sensor
+ * filled the value to buf, the value is integer with mA
+ * @curr_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_curr_max(unsigned int curr_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_curr_max);
+
+    ret = g_drv->get_main_board_curr_max(curr_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_curr_min - Used to get the minimum threshold of current sensor
+ * filled the value to buf, the value is integer with mA
+ * @curr_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_curr_min(unsigned int curr_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_curr_min);
+
+    ret = g_drv->get_main_board_curr_min(curr_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_curr_value - Used to get the input value of current sensor
+ * filled the value to buf, the value is integer with mA
+ * @curr_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_curr_value(unsigned int curr_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_curr_value);
+
+    ret = g_drv->get_main_board_curr_value(curr_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_curr_monitor_flag - Used to get the monitor flag of current sensor
+ * filled the value to buf, the value is integer with mA
+ * @curr_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_curr_monitor_flag(unsigned int curr_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_curr_monitor_flag);
+
+    ret = g_drv->get_main_board_curr_monitor_flag(curr_index, buf, count);
+    return ret;
+}
+/*********************************end of main board current************************************/
+
+static struct s3ip_sysfs_curr_sensor_drivers_s drivers = {
+    /*
+     * set ODM current sensor drivers to /sys/s3ip/curr_sensor,
+     * if not support the function, set corresponding hook to NULL.
+     */
+    .get_main_board_curr_number = wb_get_main_board_curr_number,
+    .get_main_board_curr_alias = wb_get_main_board_curr_alias,
+    .get_main_board_curr_type = wb_get_main_board_curr_type,
+    .get_main_board_curr_max = wb_get_main_board_curr_max,
+    .get_main_board_curr_min = wb_get_main_board_curr_min,
+    .get_main_board_curr_value = wb_get_main_board_curr_value,
+    .get_main_board_curr_monitor_flag = wb_get_main_board_curr_monitor_flag,
+};
+
+static int __init curr_sensor_dev_drv_init(void)
+{
+    int ret;
+
+    CURR_SENSOR_INFO("curr_sensor_init...\n");
+    g_drv = s3ip_switch_driver_get();
+    check_p(g_drv);
+
+    ret = s3ip_sysfs_curr_sensor_drivers_register(&drivers);
+    if (ret < 0) {
+        CURR_SENSOR_ERR("curr sensor drivers register err, ret %d.\n", ret);
+        return ret;
+    }
+
+    CURR_SENSOR_INFO("curr_sensor_init success.\n");
+    return 0;
+}
+
+static void __exit curr_sensor_dev_drv_exit(void)
+{
+    s3ip_sysfs_curr_sensor_drivers_unregister();
+    CURR_SENSOR_INFO("curr_sensor_exit success.\n");
+    return;
+}
+
+module_init(curr_sensor_dev_drv_init);
+module_exit(curr_sensor_dev_drv_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4, all=0xf).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("sonic S3IP sysfs");
+MODULE_DESCRIPTION("current sensors device driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/eeprom_device_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/eeprom_device_driver.c
new file mode 100644
index 000000000000..ee5d3495ed19
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/eeprom_device_driver.c
@@ -0,0 +1,209 @@
+/*
+ * An eeprom_device_driver driver for eeprom devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+
+#include "device_driver_common.h"
+#include "eeprom_sysfs.h"
+#include "dfd_sysfs_common.h"
+
+#define EEPROM_INFO(fmt, args...)  LOG_INFO("eeprom: ", fmt, ##args)
+#define EEPROM_ERR(fmt, args...)   LOG_ERR("eeprom: ", fmt, ##args)
+#define EEPROM_DBG(fmt, args...)   LOG_DBG("eeprom: ", fmt, ##args)
+
+static int g_loglevel = 0;
+static struct switch_drivers_s *g_drv = NULL;
+
+/*****************************************eeprom*******************************************/
+
+/*
+ * wb_get_eeprom_number - Used to get eeprom number
+ *
+ * This function returns the size of eeprom by your switch,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_get_eeprom_number(void)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_eeprom_number);
+
+    ret = g_drv->get_eeprom_number();
+    return ret;
+}
+
+/*
+ * wb_get_eeprom_size - Used to get eeprom size
+ *
+ * This function returns the size of eeprom by your switch,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_get_eeprom_size(unsigned int e2_index)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_eeprom_size);
+
+    ret = g_drv->get_eeprom_size(e2_index);
+    return ret;
+}
+
+/*
+ * wb_get_eeprom_alias - Used to get eeprom alias
+ *
+ * This function returns the size of eeprom by your switch,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_eeprom_alias(unsigned int e2_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_eeprom_alias);
+
+    ret = g_drv->get_eeprom_alias(e2_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_eeprom_tag - Used to get eeprom tag
+ *
+ * This function returns the size of eeprom by your switch,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_eeprom_tag(unsigned int e2_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_eeprom_tag);
+
+    ret = g_drv->get_eeprom_tag(e2_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_eeprom_type - Used to get eeprom type
+ *
+ * This function returns the size of eeprom by your switch,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_eeprom_type(unsigned int e2_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_eeprom_type);
+
+    ret = g_drv->get_eeprom_type(e2_index, buf, count);
+    return ret;
+}
+
+
+/*
+ * wb_read_eeprom_data - Used to read eeprom data,
+ * @buf: Data read buffer
+ * @offset: offset address to read eeprom data
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * returns 0 means EOF,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_read_eeprom_data(unsigned int e2_index, char *buf, loff_t offset, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->read_eeprom_data);
+
+    ret = g_drv->read_eeprom_data(e2_index, buf, offset, count);
+    return ret;
+}
+
+/*
+ * wb_write_eeprom_data - Used to write eeprom data
+ * @buf: Data write buffer
+ * @offset: offset address to write eeprom data
+ * @count: length of buf
+ *
+ * This function returns the written length of eeprom,
+ * returns 0 means EOF,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_write_eeprom_data(unsigned int e2_index, char *buf, loff_t offset, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->write_eeprom_data);
+
+    ret = g_drv->write_eeprom_data(e2_index, buf, offset, count);
+    return ret;
+}
+/*************************************end of eeprom****************************************/
+
+static struct s3ip_sysfs_eeprom_drivers_s drivers = {
+    /*
+     * set ODM eeprom drivers to /sys/s3ip/eeprom,
+     * if not support the function, set corresponding hook to NULL.
+     */
+    .get_eeprom_number = wb_get_eeprom_number,
+    .get_eeprom_alias = wb_get_eeprom_alias,
+    .get_eeprom_tag = wb_get_eeprom_tag,
+    .get_eeprom_type = wb_get_eeprom_type,
+    .get_eeprom_size = wb_get_eeprom_size,
+    .read_eeprom_data = wb_read_eeprom_data,
+    .write_eeprom_data = wb_write_eeprom_data,
+};
+
+static int __init eeprom_dev_drv_init(void)
+{
+    int ret;
+
+    EEPROM_INFO("eeprom_dev_drv_init...\n");
+    g_drv = s3ip_switch_driver_get();
+    check_p(g_drv);
+
+    ret = s3ip_sysfs_eeprom_drivers_register(&drivers);
+    if (ret < 0) {
+        EEPROM_ERR("eeprom drivers register err, ret %d.\n", ret);
+        return ret;
+    }
+    EEPROM_INFO("eeprom_dev_drv_init success.\n");
+    return 0;
+}
+
+static void __exit eeprom_dev_drv_exit(void)
+{
+    s3ip_sysfs_eeprom_drivers_unregister();
+    EEPROM_INFO("eeprom_exit success.\n");
+    return;
+}
+
+module_init(eeprom_dev_drv_init);
+module_exit(eeprom_dev_drv_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4, all=0xf).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("sonic S3IP sysfs");
+MODULE_DESCRIPTION("eeprom device driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/fan_device_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/fan_device_driver.c
new file mode 100644
index 000000000000..5360043678db
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/fan_device_driver.c
@@ -0,0 +1,542 @@
+/*
+ * An fan_device_driver driver for fan devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+
+#include "device_driver_common.h"
+#include "fan_sysfs.h"
+#include "dfd_sysfs_common.h"
+
+#define FAN_INFO(fmt, args...) LOG_INFO("fan: ", fmt, ##args)
+#define FAN_ERR(fmt, args...)  LOG_ERR("fan: ", fmt, ##args)
+#define FAN_DBG(fmt, args...)  LOG_DBG("fan: ", fmt, ##args)
+
+static int g_loglevel = 0;
+static struct switch_drivers_s *g_drv = NULL;
+
+/********************************************fan**********************************************/
+static int wb_get_fan_number(void)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_number);
+
+    ret = g_drv->get_fan_number();
+    return ret;
+}
+
+static int wb_get_fan_motor_number(unsigned int fan_index)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_motor_number);
+
+    ret = g_drv->get_fan_motor_number(fan_index);
+    return ret;
+}
+
+/*
+ * wb_get_fan_model_name - Used to get fan model name,
+ * @fan_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_fan_model_name(unsigned int fan_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_model_name);
+
+    ret = g_drv->get_fan_model_name(fan_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_fan_vendor - Used to get vendor,
+ * @fan_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_fan_vendor(unsigned int fan_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_vendor);
+
+    ret = g_drv->get_fan_vendor(fan_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_fan_serial_number - Used to get fan serial number,
+ * @fan_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_fan_serial_number(unsigned int fan_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_serial_number);
+
+    ret = g_drv->get_fan_serial_number(fan_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_fan_part_number - Used to get fan part number,
+ * @fan_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_fan_part_number(unsigned int fan_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_part_number);
+
+    ret = g_drv->get_fan_part_number(fan_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_fan_hardware_version - Used to get fan hardware version,
+ * @fan_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_fan_hardware_version(unsigned int fan_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_hardware_version);
+
+    ret = g_drv->get_fan_hardware_version(fan_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_fan_status - Used to get fan status,
+ * filled the value to buf, fan status define as below:
+ * 0: ABSENT
+ * 1: OK
+ * 2: NOT OK
+ *
+ * @fan_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_fan_status(unsigned int fan_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_status);
+
+    ret = g_drv->get_fan_status(fan_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_fan_present - Used to get fan present status,
+ * filled the value to buf, fan status define as below:
+ * 0: ABSENT
+ * 1: PRESENT
+ *
+ * @fan_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_fan_present(unsigned int fan_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_present);
+
+    ret = g_drv->get_fan_present(fan_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_fan_led_status - Used to get fan led status
+ * filled the value to buf, led status value define as below:
+ * 0: dark
+ * 1: green
+ * 2: yellow
+ * 3: red
+ * 4:blue
+ * 5: green light flashing
+ * 6: yellow light flashing
+ * 7: red light flashing
+ * 8:blue light flashing
+ *
+ * @fan_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_fan_led_status(unsigned int fan_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_led_status);
+
+    ret = g_drv->get_fan_led_status(fan_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_set_fan_led_status - Used to set fan led status
+ * @fan_index: start with 1
+ * @status: led status, led status value define as below:
+ * 0: dark
+ * 1: green
+ * 2: yellow
+ * 3: red
+ * 4: blue
+ * 5: green light flashing
+ * 6: yellow light flashing
+ * 7: red light flashing
+ * 8: blue light flashing
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_set_fan_led_status(unsigned int fan_index, int status)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_fan_led_status);
+
+    ret = g_drv->set_fan_led_status(fan_index, status);
+    return ret;
+}
+
+/*
+ * wb_get_fan_direction - Used to get fan air flow direction,
+ * filled the value to buf, air flow direction define as below:
+ * 0: F2B
+ * 1: B2F
+ *
+ * @fan_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_fan_direction(unsigned int fan_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_direction);
+
+    ret = g_drv->get_fan_direction(fan_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_fan_motor_status - Used to get fan motor status
+ * filled the value to buf
+ * @fan_index: start with 1
+ * @motor_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_fan_motor_status(unsigned int fan_index, unsigned int motor_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_motor_status);
+
+    ret = g_drv->get_fan_motor_status(fan_index, motor_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_fan_motor_speed - Used to get fan motor speed
+ * filled the value to buf
+ * @fan_index: start with 1
+ * @motor_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_fan_motor_speed(unsigned int fan_index, unsigned int motor_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_motor_speed);
+
+    ret = g_drv->get_fan_motor_speed(fan_index, motor_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_fan_motor_speed_tolerance - Used to get fan motor speed tolerance
+ * filled the value to buf
+ * @fan_index: start with 1
+ * @motor_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_fan_motor_speed_tolerance(unsigned int fan_index, unsigned int motor_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_motor_speed_tolerance);
+
+    ret = g_drv->get_fan_motor_speed_tolerance(fan_index, motor_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_fan_motor_speed_target - Used to get fan motor speed target
+ * filled the value to buf
+ * @fan_index: start with 1
+ * @motor_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_fan_motor_speed_target(unsigned int fan_index, unsigned int motor_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_motor_speed_target);
+
+    ret = g_drv->get_fan_motor_speed_target(fan_index, motor_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_fan_motor_speed_max - Used to get the maximum threshold of fan motor
+ * filled the value to buf
+ * @fan_index: start with 1
+ * @motor_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_fan_motor_speed_max(unsigned int fan_index, unsigned int motor_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_motor_speed_max);
+
+    ret = g_drv->get_fan_motor_speed_max(fan_index, motor_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_fan_motor_speed_min - Used to get the minimum threshold of fan motor
+ * filled the value to buf
+ * @fan_index: start with 1
+ * @motor_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_fan_motor_speed_min(unsigned int fan_index, unsigned int motor_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_motor_speed_min);
+
+    ret = g_drv->get_fan_motor_speed_min(fan_index, motor_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_fan_ratio - Used to get the ratio of fan
+ * filled the value to buf
+ * @fan_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_fan_ratio(unsigned int fan_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_ratio);
+
+    ret = g_drv->get_fan_ratio(fan_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_set_fan_ratio - Used to set the ratio of fan
+ * @fan_index: start with 1
+ * @ratio: motor speed ratio, from 0 to 100
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_set_fan_ratio(unsigned int fan_index, int ratio)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_fan_ratio);
+
+    ret = g_drv->set_fan_ratio(fan_index, ratio);
+    return ret;
+}
+/****************************************end of fan*******************************************/
+
+static struct s3ip_sysfs_fan_drivers_s drivers = {
+    /*
+     * set ODM fan drivers to /sys/s3ip/fan,
+     * if not support the function, set corresponding hook to NULL.
+     */
+    .get_fan_number = wb_get_fan_number,
+    .get_fan_motor_number = wb_get_fan_motor_number,
+    .get_fan_model_name = wb_get_fan_model_name,
+    .get_fan_vendor = wb_get_fan_vendor,
+    .get_fan_serial_number = wb_get_fan_serial_number,
+    .get_fan_part_number = wb_get_fan_part_number,
+    .get_fan_hardware_version = wb_get_fan_hardware_version,
+    .get_fan_status = wb_get_fan_status,
+    .get_fan_present = wb_get_fan_present,
+    .get_fan_led_status = wb_get_fan_led_status,
+    .set_fan_led_status = wb_set_fan_led_status,
+    .get_fan_direction = wb_get_fan_direction,
+    .get_fan_motor_status = wb_get_fan_motor_status,
+    .get_fan_motor_speed = wb_get_fan_motor_speed,
+    .get_fan_motor_speed_tolerance = wb_get_fan_motor_speed_tolerance,
+    .get_fan_motor_speed_target = wb_get_fan_motor_speed_target,
+    .get_fan_motor_speed_max = wb_get_fan_motor_speed_max,
+    .get_fan_motor_speed_min = wb_get_fan_motor_speed_min,
+    .get_fan_ratio = wb_get_fan_ratio,
+    .set_fan_ratio = wb_set_fan_ratio
+};
+
+static int __init fan_dev_drv_init(void)
+{
+    int ret;
+
+    FAN_INFO("fan_init...\n");
+    g_drv = s3ip_switch_driver_get();
+    check_p(g_drv);
+
+    ret = s3ip_sysfs_fan_drivers_register(&drivers);
+    if (ret < 0) {
+        FAN_ERR("fan drivers register err, ret %d.\n", ret);
+        return ret;
+    }
+
+    FAN_INFO("fan_init success.\n");
+    return 0;
+}
+
+static void __exit fan_dev_drv_exit(void)
+{
+    s3ip_sysfs_fan_drivers_unregister();
+    FAN_INFO("fan_exit success.\n");
+    return;
+}
+
+module_init(fan_dev_drv_init);
+module_exit(fan_dev_drv_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4, all=0xf).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("sonic S3IP sysfs");
+MODULE_DESCRIPTION("fan device driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/fpga_device_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/fpga_device_driver.c
new file mode 100644
index 000000000000..7fda8b9b7184
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/fpga_device_driver.c
@@ -0,0 +1,216 @@
+/*
+ * An fpga_device_driver driver for fpga devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+
+#include "device_driver_common.h"
+#include "fpga_sysfs.h"
+#include "dfd_sysfs_common.h"
+
+#define FPGA_INFO(fmt, args...) LOG_INFO("fpga: ", fmt, ##args)
+#define FPGA_ERR(fmt, args...)  LOG_ERR("fpga: ", fmt, ##args)
+#define FPGA_DBG(fmt, args...)  LOG_DBG("fpga: ", fmt, ##args)
+
+static int g_loglevel = 0;
+static struct switch_drivers_s *g_drv = NULL;
+
+/******************************************FPGA***********************************************/
+static int wb_get_main_board_fpga_number(void)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_fpga_number);
+
+    ret = g_drv->get_main_board_fpga_number();
+    return ret;
+}
+
+/*
+ * wb_get_main_board_fpga_alias - Used to identify the location of fpga,
+ * @fpga_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_fpga_alias(unsigned int fpga_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_fpga_alias);
+
+    ret = g_drv->get_main_board_fpga_alias(fpga_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_fpga_type - Used to get fpga model name
+ * @fpga_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_fpga_type(unsigned int fpga_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_fpga_type);
+
+    ret = g_drv->get_main_board_fpga_type(fpga_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_fpga_firmware_version - Used to get fpga firmware version,
+ * @fpga_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_fpga_firmware_version(unsigned int fpga_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_fpga_firmware_version);
+
+    ret = g_drv->get_main_board_fpga_firmware_version(fpga_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_fpga_board_version - Used to get fpga board version,
+ * @fpga_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_fpga_board_version(unsigned int fpga_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_fpga_board_version);
+
+    ret = g_drv->get_main_board_fpga_board_version(fpga_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_fpga_test_reg - Used to test fpga register read
+ * filled the value to buf, value is hexadecimal, start with 0x
+ * @fpga_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_fpga_test_reg(unsigned int fpga_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_fpga_test_reg);
+
+    ret = g_drv->get_main_board_fpga_test_reg(fpga_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_set_main_board_fpga_test_reg - Used to test fpga register write
+ * @fpga_index: start with 1
+ * @value: value write to fpga
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_set_main_board_fpga_test_reg(unsigned int fpga_index, unsigned int value)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_main_board_fpga_test_reg);
+
+    ret = g_drv->set_main_board_fpga_test_reg(fpga_index, value);
+    return ret;
+}
+/***************************************end of FPGA*******************************************/
+
+static struct s3ip_sysfs_fpga_drivers_s drivers = {
+    /*
+     * set ODM FPGA drivers to /sys/s3ip/fpga,
+     * if not support the function, set corresponding hook to NULL.
+     */
+    .get_main_board_fpga_number = wb_get_main_board_fpga_number,
+    .get_main_board_fpga_alias = wb_get_main_board_fpga_alias,
+    .get_main_board_fpga_type = wb_get_main_board_fpga_type,
+    .get_main_board_fpga_firmware_version = wb_get_main_board_fpga_firmware_version,
+    .get_main_board_fpga_board_version = wb_get_main_board_fpga_board_version,
+    .get_main_board_fpga_test_reg = wb_get_main_board_fpga_test_reg,
+    .set_main_board_fpga_test_reg = wb_set_main_board_fpga_test_reg,
+};
+
+static int __init fpga_dev_drv_init(void)
+{
+    int ret;
+
+    FPGA_INFO("fpga_init...\n");
+    g_drv = s3ip_switch_driver_get();
+    check_p(g_drv);
+
+    ret = s3ip_sysfs_fpga_drivers_register(&drivers);
+    if (ret < 0) {
+        FPGA_ERR("fpga drivers register err, ret %d.\n", ret);
+        return ret;
+    }
+    FPGA_INFO("fpga_init success.\n");
+    return 0;
+}
+
+static void __exit fpga_dev_drv_exit(void)
+{
+    s3ip_sysfs_fpga_drivers_unregister();
+    FPGA_INFO("fpga_exit success.\n");
+    return;
+}
+
+module_init(fpga_dev_drv_init);
+module_exit(fpga_dev_drv_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4, all=0xf).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("sonic S3IP sysfs");
+MODULE_DESCRIPTION("fpga device driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/include/device_driver_common.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/include/device_driver_common.h
new file mode 100644
index 000000000000..5628c298b9c9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/include/device_driver_common.h
@@ -0,0 +1,69 @@
+/*
+ * A header definition for devcie_driver_common driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _DEVICE_DRIVER_COMMON_H_
+#define _DEVICE_DRIVER_COMMON_H_
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+#include <linux/workqueue.h>
+#include <linux/kobject.h>
+#include <linux/delay.h>
+
+enum LOG_LEVEL {
+    INFO = 0x1,
+    ERR  = 0x2,
+    DBG  = 0x4,
+    ALL  = 0xf
+};
+
+#define LOG_INFO(_prefix, fmt, args...) do { \
+    if (g_loglevel & INFO) { \
+        printk(KERN_INFO _prefix "%s "fmt, __FUNCTION__, ##args); \
+    } \
+} while (0)
+
+#define LOG_ERR(_prefix, fmt, args...) do { \
+    if (g_loglevel & ERR) { \
+        printk(KERN_ERR _prefix "%s "fmt, __FUNCTION__, ##args); \
+    } \
+} while (0)
+
+#define LOG_DBG(_prefix, fmt, args...) do { \
+    if (g_loglevel & DBG) { \
+        printk(KERN_DEBUG _prefix "%s "fmt, __FUNCTION__, ##args); \
+    } \
+} while (0)
+
+#define check_pfun(p) do { \
+    if (p == NULL) { \
+        if (g_loglevel & ERR) { \
+            printk(KERN_ERR "%s, %s is NULL.\n", __FUNCTION__, #p); \
+        } \
+        return -ENOSYS; \
+    } \
+} while (0)
+
+#define check_p(p) check_pfun(p)
+
+#endif /* _DEVICE_DRIVER_COMMON_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/psu_device_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/psu_device_driver.c
new file mode 100644
index 000000000000..c97f4814523d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/psu_device_driver.c
@@ -0,0 +1,1025 @@
+/*
+ * An psu_device_driver driver for psu devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+
+#include <linux/slab.h>
+
+#include "device_driver_common.h"
+#include "psu_sysfs.h"
+#include "dfd_sysfs_common.h"
+
+#define PSU_INFO(fmt, args...) LOG_INFO("psu: ", fmt, ##args)
+#define PSU_ERR(fmt, args...)  LOG_ERR("psu: ", fmt, ##args)
+#define PSU_DBG(fmt, args...)  LOG_DBG("psu: ", fmt, ##args)
+
+static int g_loglevel = 0;
+static struct switch_drivers_s *g_drv = NULL;
+
+/********************************************psu**********************************************/
+static int wb_get_psu_number(void)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_number);
+
+    ret = g_drv->get_psu_number();
+    return ret;
+}
+
+static int wb_get_psu_temp_number(unsigned int psu_index)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_temp_number);
+
+    ret = g_drv->get_psu_temp_number(psu_index);
+    return ret;
+}
+
+/*
+ * wb_get_psu_model_name - Used to get psu model name,
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_model_name(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_model_name);
+
+    ret = g_drv->get_psu_model_name(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_vendor - Used to get psu model name,
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_vendor(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_vendor);
+
+    ret = g_drv->get_psu_vendor(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_date - Used to get psu date,
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_date(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_date);
+
+    ret = g_drv->get_psu_date(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_status - Used to get psu status,
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_status(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_status);
+
+    ret = g_drv->get_psu_status(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_hw_status - Used to get psu status,
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_hw_status(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_hw_status);
+
+    ret = g_drv->get_psu_hw_status(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_alarm - Used to get psu alarm status,
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_alarm(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_alarm);
+
+    ret = g_drv->get_psu_alarm(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_serial_number - Used to get psu serial number,
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_serial_number(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_serial_number);
+
+    ret = g_drv->get_psu_serial_number(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_part_number - Used to get psu part number,
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_part_number(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_part_number);
+
+    ret = g_drv->get_psu_part_number(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_hardware_version - Used to get psu hardware version,
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_hardware_version(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_hardware_version);
+
+    ret = g_drv->get_psu_hardware_version(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_type - Used to get the input type of psu
+ * filled the value to buf, input type value define as below:
+ * 0: DC
+ * 1: AC
+ *
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_type(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_type);
+
+    ret = g_drv->get_psu_type(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_in_curr - Used to get the input current of psu
+ * filled the value to buf, the value is integer with mA
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_in_curr(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_in_curr);
+
+    ret = g_drv->get_psu_in_curr(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_in_vol - Used to get the input voltage of psu
+ * filled the value to bu, the value is integer with mV
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_in_vol(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_in_vol);
+
+    ret = g_drv->get_psu_in_vol(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_in_power - Used to get the input power of psu
+ * filled the value to buf, the value is integer with uW
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_in_power(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_in_power);
+
+    ret = g_drv->get_psu_in_power(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_out_curr - Used to get the output current of psu
+ * filled the value to buf, the value is integer with mA
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_out_curr(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_out_curr);
+
+    ret = g_drv->get_psu_out_curr(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_out_vol - Used to get the output voltage of psu
+ * filled the value to buf, the value is integer with mV
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_out_vol(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_out_vol);
+
+    ret = g_drv->get_psu_out_vol(psu_index, buf, count);
+    return ret;
+}
+
+static ssize_t wb_get_psu_attr_threshold(unsigned int psu_index, unsigned int type, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_attr_threshold);
+
+    ret = g_drv->get_psu_attr_threshold(psu_index, type, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_out_power - Used to get the output power of psu
+ * filled the value to buf, the value is integer with uW
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_out_power(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_out_power);
+
+    ret = g_drv->get_psu_out_power(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_out_max_power - Used to get the output max power of psu
+ * filled the value to buf, the value is integer with uW
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_out_max_power(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_out_max_power);
+
+    ret = g_drv->get_psu_out_max_power(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_present_status - Used to get psu present status
+ * filled the value to buf, psu present status define as below:
+ * 0: ABSENT
+ * 1: PRESENT
+ *
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_present_status(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_present_status);
+
+    ret = g_drv->get_psu_present_status(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_in_status - Used to get psu input status
+ * filled the value to buf, psu input status define as below:
+ * 0: NOT OK
+ * 1: OK
+ *
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_in_status(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_in_status);
+
+    ret = g_drv->get_psu_in_status(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_status_pmbus - Used to get psu status from pmbus
+ * filled the value to buf, psu output status define as below:
+ * 0: NOT OK
+ * 1: OK
+ *
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_status_pmbus(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_status_pmbus);
+
+    ret = g_drv->get_psu_status_pmbus(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_out_status - Used to get psu output status
+ * filled the value to buf, psu output status define as below:
+ * 0: NOT OK
+ * 1: OK
+ *
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_out_status(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_out_status);
+
+    ret = g_drv->get_psu_out_status(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_fan_speed_cal - Used to get psu fan speed cal
+ * filled the value to buf
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_fan_speed_cal(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_fan_speed_cal);
+
+    ret = g_drv->get_psu_fan_speed_cal(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_fan_speed - Used to get psu fan speed
+ * filled the value to buf
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_fan_speed(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_fan_speed);
+
+    ret = g_drv->get_psu_fan_speed(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_fan_ratio - Used to get the ratio of psu fan
+ * filled the value to buf
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_fan_ratio(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_fan_ratio);
+
+    ret = g_drv->get_psu_fan_ratio(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_set_psu_fan_ratio - Used to set the ratio of psu fan
+ * @psu_index: start with 1
+ * @ratio: from 0 to 100
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_set_psu_fan_ratio(unsigned int psu_index, int ratio)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_psu_fan_ratio);
+
+    ret = g_drv->set_psu_fan_ratio(psu_index, ratio);
+    return ret;
+}
+
+/*
+ * wb_get_psu_fan_direction - Used to get psu air flow direction,
+ * filled the value to buf, air flow direction define as below:
+ * 0: F2B
+ * 1: B2F
+ *
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_fan_direction(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_fan_direction);
+
+    ret = g_drv->get_psu_fan_direction(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_led_status - Used to get psu led status
+ * filled the value to buf, led status value define as below:
+ * 0: dark
+ * 1: green
+ * 2: yellow
+ * 3: red
+ * 4: blue
+ * 5: green light flashing
+ * 6: yellow light flashing
+ * 7: red light flashing
+ * 8: blue light flashing
+ *
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_led_status(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_led_status);
+
+    ret = g_drv->get_psu_led_status(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_temp_alias - Used to identify the location of the temperature sensor of psu,
+ * @psu_index: start with 1
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_temp_alias(unsigned int psu_index, unsigned int temp_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_temp_alias);
+
+    ret = g_drv->get_psu_temp_alias(psu_index, temp_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_temp_type - Used to get the model of temperature sensor of psu,
+ * @psu_index: start with 1
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_temp_type(unsigned int psu_index, unsigned int temp_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_temp_type);
+
+    ret = g_drv->get_psu_temp_type(psu_index, temp_index, buf, count);
+    return ret;
+
+}
+
+/*
+ * wb_get_psu_temp_max - Used to get the maximum threshold of temperature sensor of psu,
+ * filled the value to buf, the value is integer with millidegree Celsius
+ * @psu_index: start with 1
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_temp_max(unsigned int psu_index, unsigned int temp_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_temp_max);
+
+    ret = g_drv->get_psu_temp_max(psu_index, temp_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_set_psu_temp_max - Used to set the maximum threshold of temperature sensor of psu,
+ * get value from buf and set it to maximum threshold of psu temperature sensor
+ * @psu_index: start with 1
+ * @temp_index: start with 1
+ * @buf: the buf store the data to be set, eg '80.000'
+ * @count: length of buf
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_set_psu_temp_max(unsigned int psu_index, unsigned int temp_index,
+               const char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_psu_temp_max);
+
+    ret = g_drv->set_psu_temp_max(psu_index, temp_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_temp_min - Used to get the minimum threshold of temperature sensor of psu,
+ * filled the value to buf, the value is integer with millidegree Celsius
+ * @psu_index: start with 1
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_temp_min(unsigned int psu_index, unsigned int temp_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_temp_min);
+
+    ret = g_drv->get_psu_temp_min(psu_index, temp_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_set_psu_temp_min - Used to set the minimum threshold of temperature sensor of psu,
+ * get value from buf and set it to minimum threshold of psu temperature sensor
+ * @psu_index: start with 1
+ * @temp_index: start with 1
+ * @buf: the buf store the data to be set, eg '50.000'
+ * @count: length of buf
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_set_psu_temp_min(unsigned int psu_index, unsigned int temp_index,
+               const char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_psu_temp_min);
+
+    ret = g_drv->set_psu_temp_min(psu_index, temp_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_temp_value - Used to get the input value of temperature sensor of psu
+ * filled the value to buf, the value is integer with millidegree Celsius
+ * @psu_index: start with 1
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_temp_value(unsigned int psu_index, unsigned int temp_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_temp_value);
+
+    ret = g_drv->get_psu_temp_value(psu_index, temp_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_eeprom_size - Used to get psu eeprom size
+ *
+ * This function returns the size of port eeprom,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_get_psu_eeprom_size(unsigned int psu_index)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_eeprom_size);
+
+    ret = g_drv->get_psu_eeprom_size(psu_index);
+    return ret;
+}
+
+/*
+ * wb_read_psu_eeprom_data - Used to read psu eeprom data,
+ * @buf: Data read buffer
+ * @offset: offset address to read psu eeprom data
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * returns 0 means EOF,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_read_psu_eeprom_data(unsigned int psu_index, char *buf, loff_t offset,
+                   size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->read_psu_eeprom_data);
+
+    ret = g_drv->read_psu_eeprom_data(psu_index, buf, offset, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_blackbox_info - Used to get psu blackbox information,
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_blackbox_info(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_blackbox_info);
+
+    ret = g_drv->get_psu_blackbox_info(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_psu_pmbus_info - Used to get psu pmbus information,
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_psu_pmbus_info(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_psu_pmbus_info);
+
+    ret = g_drv->get_psu_pmbus_info(psu_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_clear_psu_blackbox - Used to clear psu blackbox information
+ * @psu_index: start with 1
+ * @value: 1
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_clear_psu_blackbox(unsigned int psu_index, uint8_t value)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->clear_psu_blackbox);
+
+    ret = g_drv->clear_psu_blackbox(psu_index, value);
+    return ret;
+}
+
+/****************************************end of psu*******************************************/
+
+static struct s3ip_sysfs_psu_drivers_s drivers = {
+    /*
+     * set ODM psu drivers to /sys/s3ip/psu,
+     * if not support the function, set corresponding hook to NULL.
+     */
+    .get_psu_number = wb_get_psu_number,
+    .get_psu_temp_number = wb_get_psu_temp_number,
+    .get_psu_model_name = wb_get_psu_model_name,
+    .get_psu_vendor = wb_get_psu_vendor,
+    .get_psu_date = wb_get_psu_date,
+    .get_psu_status = wb_get_psu_status,
+    .get_psu_hw_status = wb_get_psu_hw_status,
+    .get_psu_alarm = wb_get_psu_alarm,
+    .get_psu_serial_number = wb_get_psu_serial_number,
+    .get_psu_part_number = wb_get_psu_part_number,
+    .get_psu_hardware_version = wb_get_psu_hardware_version,
+    .get_psu_type = wb_get_psu_type,
+    .get_psu_in_curr = wb_get_psu_in_curr,
+    .get_psu_in_vol = wb_get_psu_in_vol,
+    .get_psu_in_power = wb_get_psu_in_power,
+    .get_psu_out_curr = wb_get_psu_out_curr,
+    .get_psu_out_vol = wb_get_psu_out_vol,
+    .get_psu_out_power = wb_get_psu_out_power,
+    .get_psu_out_max_power = wb_get_psu_out_max_power,
+    .get_psu_present_status = wb_get_psu_present_status,
+    .get_psu_status_pmbus = wb_get_psu_status_pmbus,
+    .get_psu_in_status = wb_get_psu_in_status,
+    .get_psu_out_status = wb_get_psu_out_status,
+    .get_psu_fan_speed = wb_get_psu_fan_speed,
+    .get_psu_fan_ratio = wb_get_psu_fan_ratio,
+    .set_psu_fan_ratio = wb_set_psu_fan_ratio,
+    .get_psu_fan_direction = wb_get_psu_fan_direction,
+    .get_psu_led_status = wb_get_psu_led_status,
+    .get_psu_temp_alias = wb_get_psu_temp_alias,
+    .get_psu_temp_type = wb_get_psu_temp_type,
+    .get_psu_temp_max = wb_get_psu_temp_max,
+    .set_psu_temp_max = wb_set_psu_temp_max,
+    .get_psu_temp_min = wb_get_psu_temp_min,
+    .set_psu_temp_min = wb_set_psu_temp_min,
+    .get_psu_temp_value = wb_get_psu_temp_value,
+    .get_psu_fan_speed_cal = wb_get_psu_fan_speed_cal,
+    .get_psu_attr_threshold = wb_get_psu_attr_threshold,
+    .get_psu_eeprom_size = wb_get_psu_eeprom_size,
+    .read_psu_eeprom_data = wb_read_psu_eeprom_data,
+    .get_psu_blackbox_info = wb_get_psu_blackbox_info,
+    .get_psu_pmbus_info = wb_get_psu_pmbus_info,
+    .clear_psu_blackbox = wb_clear_psu_blackbox,
+};
+
+static int __init psu_dev_drv_init(void)
+{
+    int ret;
+
+    PSU_INFO("psu_init...\n");
+    g_drv = s3ip_switch_driver_get();
+    check_p(g_drv);
+
+    ret = s3ip_sysfs_psu_drivers_register(&drivers);
+    if (ret < 0) {
+        PSU_ERR("psu drivers register err, ret %d.\n", ret);
+        return ret;
+    }
+    PSU_INFO("psu_init success.\n");
+    return 0;
+}
+
+static void __exit psu_dev_drv_exit(void)
+{
+    s3ip_sysfs_psu_drivers_unregister();
+    PSU_INFO("psu_exit ok.\n");
+
+    return;
+}
+
+module_init(psu_dev_drv_init);
+module_exit(psu_dev_drv_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4, all=0xf).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("sonic S3IP sysfs");
+MODULE_DESCRIPTION("psu device driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/slot_device_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/slot_device_driver.c
new file mode 100644
index 000000000000..f22e51e1613e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/slot_device_driver.c
@@ -0,0 +1,1100 @@
+/*
+ * An slot_device_driver driver for slot devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+
+#include <linux/slab.h>
+
+#include "device_driver_common.h"
+#include "slot_sysfs.h"
+#include "dfd_sysfs_common.h"
+
+#define SLOT_INFO(fmt, args...) LOG_INFO("slot: ", fmt, ##args)
+#define SLOT_ERR(fmt, args...)  LOG_ERR("slot: ", fmt, ##args)
+#define SLOT_DBG(fmt, args...)  LOG_DBG("slot: ", fmt, ##args)
+
+static int g_loglevel = 0;
+static struct switch_drivers_s *g_drv = NULL;
+
+/******************************************slot***********************************************/
+static int wb_get_slot_number(void)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_number);
+
+    ret = g_drv->get_slot_number();
+    return ret;
+}
+
+static int wb_get_slot_temp_number(unsigned int slot_index)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_temp_number);
+
+    ret = g_drv->get_slot_temp_number(slot_index);
+    return ret;
+}
+
+static int wb_get_slot_vol_number(unsigned int slot_index)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_vol_number);
+
+    ret = g_drv->get_slot_vol_number(slot_index);
+    return ret;
+}
+
+static int wb_get_slot_curr_number(unsigned int slot_index)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_curr_number);
+
+    ret = g_drv->get_slot_curr_number(slot_index);
+    return ret;
+}
+
+static int wb_get_slot_fpga_number(unsigned int slot_index)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_fpga_number);
+
+    ret = g_drv->get_slot_fpga_number(slot_index);
+    return ret;
+}
+
+static int wb_get_slot_cpld_number(unsigned int slot_index)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_cpld_number);
+
+    ret = g_drv->get_slot_cpld_number(slot_index);
+    return ret;
+}
+
+/*
+ * wb_get_slot_model_name - Used to get slot model name,
+ * @slot_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_model_name(unsigned int slot_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_model_name);
+
+    ret = g_drv->get_slot_model_name(slot_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_vendor - Used to get slot model name,
+ * @slot_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_vendor(unsigned int slot_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_vendor);
+
+    ret = g_drv->get_slot_vendor(slot_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_serial_number - Used to get slot serial number,
+ * @slot_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_serial_number(unsigned int slot_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_serial_number);
+
+    ret = g_drv->get_slot_serial_number(slot_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_part_number - Used to get slot part number,
+ * @slot_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_part_number(unsigned int slot_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_part_number);
+
+    ret = g_drv->get_slot_part_number(slot_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_hardware_version - Used to get slot hardware version,
+ * @slot_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_hardware_version(unsigned int slot_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_hardware_version);
+
+    ret = g_drv->get_slot_hardware_version(slot_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_status - Used to get slot status,
+ * filled the value to buf, slot status define as below:
+ * 0: ABSENT
+ * 1: OK
+ * 2: NOT OK
+ *
+ * @slot_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_status(unsigned int slot_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_status);
+
+    ret = g_drv->get_slot_status(slot_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_led_status - Used to get slot led status
+ * filled the value to buf, led status value define as below:
+ * 0: dark
+ * 1: green
+ * 2: yellow
+ * 3: red
+ * 4: blue
+ * 5: green light flashing
+ * 6: yellow light flashing
+ * 7: red light flashing
+ * 8: blue light flashing
+ *
+ * @slot_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_led_status(unsigned int slot_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_led_status);
+
+    ret = g_drv->get_slot_led_status(slot_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_set_slot_led_status - Used to set slot led status
+ * @slot_index: start with 1
+ * @status: led status, led status value define as below:
+ * 0: dark
+ * 1: green
+ * 2: yellow
+ * 3: red
+ * 4:blue
+ * 5: green light flashing
+ * 6: yellow light flashing
+ * 7: red light flashing
+ * 8:blue light flashing
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_set_slot_led_status(unsigned int slot_index, int status)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_slot_led_status);
+
+    ret = g_drv->set_slot_led_status(slot_index, status);
+    return ret;
+}
+
+/*
+ * wb_set_slot_power_status - Used to set slot power status,
+ * filled the value to buf, slot status define as below:
+ * 0: OFF
+ * 1: ON
+ *
+ * @slot_index: start with 1
+ * @status: power status
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_set_slot_power_status(unsigned int slot_index, int status)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_slot_power_status);
+
+    ret = g_drv->set_slot_power_status(slot_index, status);
+    return ret;
+}
+
+/*
+ * wb_get_slot_power_status - Used to get slot power status,
+ * filled the value to buf, slot status define as below:
+ * 0: OFF
+ * 1: ON
+ *
+ * @slot_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_power_status(unsigned int slot_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_power_status);
+
+    ret = g_drv->get_slot_power_status(slot_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_temp_alias - Used to identify the location of the temperature sensor of slot,
+ * @slot_index: start with 1
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_temp_alias(unsigned int slot_index, unsigned int temp_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_temp_alias);
+
+    ret = g_drv->get_slot_temp_alias(slot_index, temp_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_temp_type - Used to get the model of temperature sensor of slot,
+ * @slot_index: start with 1
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_temp_type(unsigned int slot_index, unsigned int temp_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_temp_type);
+
+    ret = g_drv->get_slot_temp_type(slot_index, temp_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_temp_max - Used to get the maximum threshold of temperature sensor of slot,
+ * filled the value to buf, the value is integer with millidegree Celsius
+ * @slot_index: start with 1
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_temp_max(unsigned int slot_index, unsigned int temp_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_temp_max);
+
+    ret = g_drv->get_slot_temp_max(slot_index, temp_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_temp_min - Used to get the minimum threshold of temperature sensor of slot,
+ * filled the value to buf, the value is integer with millidegree Celsius
+ * @slot_index: start with 1
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_temp_min(unsigned int slot_index, unsigned int temp_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_temp_min);
+
+    ret = g_drv->get_slot_temp_min(slot_index, temp_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_temp_value - Used to get the input value of temperature sensor of slot,
+ * filled the value to buf, the value is integer with millidegree Celsius
+ * @slot_index: start with 1
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_temp_value(unsigned int slot_index, unsigned int temp_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_temp_value);
+
+    ret = g_drv->get_slot_temp_value(slot_index, temp_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_vol_alias - Used to identify the location of the voltage sensor of slot,
+ * @slot_index: start with 1
+ * @vol_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_vol_alias(unsigned int slot_index, unsigned int vol_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_vol_alias);
+
+    ret = g_drv->get_slot_vol_alias(slot_index, vol_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_vol_type - Used to get the model of voltage sensor of slot,
+ * such as udc90160, tps53622 and so on
+ * @slot_index: start with 1
+ * @vol_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_vol_type(unsigned int slot_index, unsigned int vol_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_vol_type);
+
+    ret = g_drv->get_slot_vol_type(slot_index, vol_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_vol_max - Used to get the maximum threshold of voltage sensor of slot,
+ * filled the value to buf, the value is integer with mV
+ * @slot_index: start with 1
+ * @vol_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_vol_max(unsigned int slot_index, unsigned int vol_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_vol_max);
+
+    ret = g_drv->get_slot_vol_max(slot_index, vol_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_vol_min - Used to get the minimum threshold of voltage sensor of slot,
+ * filled the value to buf, the value is integer with mV
+ * @slot_index: start with 1
+ * @vol_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_vol_min(unsigned int slot_index, unsigned int vol_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_vol_min);
+
+    ret = g_drv->get_slot_vol_min(slot_index, vol_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_vol_range - Used to get the output error value of voltage sensor of slot,
+ * filled the value to buf
+ * @slot_index: start with 1
+ * @vol_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_vol_range(unsigned int slot_index, unsigned int vol_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_vol_range);
+
+    ret = g_drv->get_slot_vol_range(slot_index, vol_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_vol_nominal_value - Used to get the nominal value of voltage sensor of slot,
+ * filled the value to buf
+ * @slot_index: start with 1
+ * @vol_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_vol_nominal_value(unsigned int slot_index,
+                   unsigned int vol_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_vol_nominal_value);
+
+    ret = g_drv->get_slot_vol_nominal_value(slot_index, vol_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_vol_value - Used to get the input value of voltage sensor of slot,
+ * filled the value to buf, the value is integer with mV
+ * @slot_index: start with 1
+ * @vol_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_vol_value(unsigned int slot_index, unsigned int vol_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_vol_value);
+
+    ret = g_drv->get_slot_vol_value(slot_index, vol_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_curr_alias - Used to identify the location of the current sensor of slot,
+ * @slot_index: start with 1
+ * @curr_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_curr_alias(unsigned int slot_index, unsigned int curr_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_curr_alias);
+
+    ret = g_drv->get_slot_curr_alias(slot_index, curr_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_curr_type - Used to get the model of current sensor of slot,
+ * @slot_index: start with 1
+ * @curr_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_curr_type(unsigned int slot_index, unsigned int curr_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_curr_type);
+
+    ret = g_drv->get_slot_curr_type(slot_index, curr_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_curr_max - Used to get the maximum threshold of current sensor of slot,
+ * filled the value to buf, the value is integer with mA
+ * @slot_index: start with 1
+ * @curr_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_curr_max(unsigned int slot_index, unsigned int curr_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_curr_max);
+
+    ret = g_drv->get_slot_curr_max(slot_index, curr_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_curr_min - Used to get the minimum threshold of current sensor of slot,
+ * filled the value to buf, the value is integer with mA
+ * @slot_index: start with 1
+ * @curr_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_curr_min(unsigned int slot_index, unsigned int curr_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_curr_min);
+
+    ret = g_drv->get_slot_curr_min(slot_index, curr_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_curr_value - Used to get the input value of current sensor of slot,
+ * filled the value to buf, the value is integer with mA
+ * @slot_index: start with 1
+ * @curr_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_curr_value(unsigned int slot_index, unsigned int curr_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_curr_value);
+
+    ret = g_drv->get_slot_curr_value(slot_index, curr_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_fpga_alias - Used to identify the location of slot fpga,
+ * @slot_index: start with 1
+ * @fpga_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_fpga_alias(unsigned int slot_index, unsigned int fpga_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_fpga_alias);
+
+    ret = g_drv->get_slot_fpga_alias(slot_index, fpga_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_fpga_type - Used to get slot fpga model name
+ * @slot_index: start with 1
+ * @fpga_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_fpga_type(unsigned int slot_index, unsigned int fpga_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_fpga_type);
+
+    ret = g_drv->get_slot_fpga_type(slot_index, fpga_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_fpga_firmware_version - Used to get slot fpga firmware version,
+ * @slot_index: start with 1
+ * @fpga_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_fpga_firmware_version(unsigned int slot_index, unsigned int fpga_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_fpga_firmware_version);
+
+    ret = g_drv->get_slot_fpga_firmware_version(slot_index, fpga_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_fpga_board_version - Used to get slot fpga board version,
+ * @slot_index: start with 1
+ * @fpga_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_fpga_board_version(unsigned int slot_index, unsigned int fpga_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_fpga_board_version);
+
+    ret = g_drv->get_slot_fpga_board_version(slot_index, fpga_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_fpga_test_reg - Used to test slot fpga register read
+ * filled the value to buf, value is hexadecimal, start with 0x
+ * @slot_index: start with 1
+ * @fpga_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_fpga_test_reg(unsigned int slot_index, unsigned int fpga_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_fpga_test_reg);
+
+    ret = g_drv->get_slot_fpga_test_reg(slot_index, fpga_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_set_slot_fpga_test_reg - Used to test slot fpga register write
+ * @slot_index: start with 1
+ * @fpga_index: start with 1
+ * @value: value write to slot fpga
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_set_slot_fpga_test_reg(unsigned int slot_index, unsigned int fpga_index,
+           unsigned int value)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_slot_fpga_test_reg);
+
+    ret = g_drv->set_slot_fpga_test_reg(slot_index, fpga_index, value);
+    return ret;
+}
+
+/*
+ * wb_get_slot_cpld_alias - Used to identify the location of slot cpld,
+ * @slot_index: start with 1
+ * @cpld_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_cpld_alias(unsigned int slot_index, unsigned int cpld_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_cpld_alias);
+
+    ret = g_drv->get_slot_cpld_alias(slot_index, cpld_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_cpld_type - Used to get slot cpld model name
+ * @slot_index: start with 1
+ * @cpld_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_cpld_type(unsigned int slot_index, unsigned int cpld_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_cpld_type);
+
+    ret = g_drv->get_slot_cpld_type(slot_index, cpld_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_cpld_firmware_version - Used to get slot cpld firmware version,
+ * @slot_index: start with 1
+ * @cpld_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_cpld_firmware_version(unsigned int slot_index, unsigned int cpld_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_cpld_firmware_version);
+
+    ret = g_drv->get_slot_cpld_firmware_version(slot_index, cpld_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_cpld_board_version - Used to get slot cpld board version,
+ * @slot_index: start with 1
+ * @cpld_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_cpld_board_version(unsigned int slot_index, unsigned int cpld_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_cpld_board_version);
+
+    ret = g_drv->get_slot_cpld_board_version(slot_index, cpld_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_slot_cpld_test_reg - Used to test slot cpld register read
+ * filled the value to buf, value is hexadecimal, start with 0x
+ * @slot_index: start with 1
+ * @cpld_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_slot_cpld_test_reg(unsigned int slot_index, unsigned int cpld_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_slot_cpld_test_reg);
+
+    ret = g_drv->get_slot_cpld_test_reg(slot_index, cpld_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_set_slot_cpld_test_reg - Used to test slot cpld register write
+ * @slot_index: start with 1
+ * @cpld_index: start with 1
+ * @value: value write to slot cpld
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_set_slot_cpld_test_reg(unsigned int slot_index, unsigned int cpld_index,
+           unsigned int value)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_slot_cpld_test_reg);
+
+    ret = g_drv->set_slot_cpld_test_reg(slot_index, cpld_index, value);
+    return ret;
+}
+/***************************************end of slot*******************************************/
+
+static struct s3ip_sysfs_slot_drivers_s drivers = {
+    /*
+     * set ODM slot drivers to /sys/s3ip/slot,
+     * if not support the function, set corresponding hook to NULL.
+     */
+    .get_slot_number = wb_get_slot_number,
+    .get_slot_temp_number = wb_get_slot_temp_number,
+    .get_slot_vol_number = wb_get_slot_vol_number,
+    .get_slot_curr_number = wb_get_slot_curr_number,
+    .get_slot_cpld_number = wb_get_slot_cpld_number,
+    .get_slot_fpga_number = wb_get_slot_fpga_number,
+    .get_slot_model_name = wb_get_slot_model_name,
+    .get_slot_vendor = wb_get_slot_vendor,
+    .get_slot_serial_number = wb_get_slot_serial_number,
+    .get_slot_part_number = wb_get_slot_part_number,
+    .get_slot_hardware_version = wb_get_slot_hardware_version,
+    .get_slot_status = wb_get_slot_status,
+    .get_slot_led_status = wb_get_slot_led_status,
+    .set_slot_led_status = wb_set_slot_led_status,
+    .get_slot_power_status = wb_get_slot_power_status,
+    .set_slot_power_status = wb_set_slot_power_status,
+    .get_slot_temp_alias = wb_get_slot_temp_alias,
+    .get_slot_temp_type = wb_get_slot_temp_type,
+    .get_slot_temp_max = wb_get_slot_temp_max,
+    .get_slot_temp_min = wb_get_slot_temp_min,
+    .get_slot_temp_value = wb_get_slot_temp_value,
+    .get_slot_vol_alias = wb_get_slot_vol_alias,
+    .get_slot_vol_type = wb_get_slot_vol_type,
+    .get_slot_vol_max = wb_get_slot_vol_max,
+    .get_slot_vol_min = wb_get_slot_vol_min,
+    .get_slot_vol_range = wb_get_slot_vol_range,
+    .get_slot_vol_nominal_value = wb_get_slot_vol_nominal_value,
+    .get_slot_vol_value = wb_get_slot_vol_value,
+    .get_slot_curr_alias = wb_get_slot_curr_alias,
+    .get_slot_curr_type = wb_get_slot_curr_type,
+    .get_slot_curr_max = wb_get_slot_curr_max,
+    .get_slot_curr_min = wb_get_slot_curr_min,
+    .get_slot_curr_value = wb_get_slot_curr_value,
+    .get_slot_fpga_alias = wb_get_slot_fpga_alias,
+    .get_slot_fpga_alias = wb_get_slot_fpga_alias,
+    .get_slot_fpga_type = wb_get_slot_fpga_type,
+    .get_slot_fpga_firmware_version = wb_get_slot_fpga_firmware_version,
+    .get_slot_fpga_board_version = wb_get_slot_fpga_board_version,
+    .get_slot_fpga_test_reg = wb_get_slot_fpga_test_reg,
+    .set_slot_fpga_test_reg = wb_set_slot_fpga_test_reg,
+    .get_slot_cpld_alias = wb_get_slot_cpld_alias,
+    .get_slot_cpld_type = wb_get_slot_cpld_type,
+    .get_slot_cpld_firmware_version = wb_get_slot_cpld_firmware_version,
+    .get_slot_cpld_board_version = wb_get_slot_cpld_board_version,
+    .get_slot_cpld_test_reg = wb_get_slot_cpld_test_reg,
+    .set_slot_cpld_test_reg = wb_set_slot_cpld_test_reg,
+};
+
+static int __init slot_dev_drv_init(void)
+{
+    int ret;
+
+    SLOT_INFO("slot_init...\n");
+    g_drv = s3ip_switch_driver_get();
+    check_p(g_drv);
+
+    ret = s3ip_sysfs_slot_drivers_register(&drivers);
+    if (ret < 0) {
+        SLOT_ERR("slot drivers register err, ret %d.\n", ret);
+        return ret;
+    }
+    SLOT_INFO("slot_init success.\n");
+    return 0;
+}
+
+static void __exit slot_dev_drv_exit(void)
+{
+    s3ip_sysfs_slot_drivers_unregister();
+    SLOT_INFO("slot_exit success.\n");
+    return;
+}
+
+module_init(slot_dev_drv_init);
+module_exit(slot_dev_drv_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4, all=0xf).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("sonic S3IP sysfs");
+MODULE_DESCRIPTION("slot device driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/syseeprom_device_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/syseeprom_device_driver.c
new file mode 100644
index 000000000000..c431c5dbb703
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/syseeprom_device_driver.c
@@ -0,0 +1,136 @@
+/*
+ * An syseeprom_device_driver driver for syseeprom devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+
+#include <linux/slab.h>
+
+#include "device_driver_common.h"
+#include "syseeprom_sysfs.h"
+#include "dfd_sysfs_common.h"
+
+#define SYSE2_INFO(fmt, args...)  LOG_INFO("syseeprom: ", fmt, ##args)
+#define SYSE2_ERR(fmt, args...)   LOG_ERR("syseeprom: ", fmt, ##args)
+#define SYSE2_DBG(fmt, args...)   LOG_DBG("syseeprom: ", fmt, ##args)
+
+static int g_loglevel = 0;
+static struct switch_drivers_s *g_drv = NULL;
+
+/*****************************************syseeprom*******************************************/
+/*
+ * wb_get_syseeprom_size - Used to get syseeprom size
+ *
+ * This function returns the size of syseeprom by your switch,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_get_syseeprom_size(void)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_syseeprom_size);
+
+    ret = g_drv->get_syseeprom_size();
+    return ret;
+}
+
+/*
+ * wb_read_syseeprom_data - Used to read syseeprom data,
+ * @buf: Data read buffer
+ * @offset: offset address to read syseeprom data
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * returns 0 means EOF,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_read_syseeprom_data(char *buf, loff_t offset, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->read_syseeprom_data);
+
+    ret = g_drv->read_syseeprom_data(buf, offset, count);
+    return ret;
+}
+
+/*
+ * wb_write_syseeprom_data - Used to write syseeprom data
+ * @buf: Data write buffer
+ * @offset: offset address to write syseeprom data
+ * @count: length of buf
+ *
+ * This function returns the written length of syseeprom,
+ * returns 0 means EOF,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_write_syseeprom_data(char *buf, loff_t offset, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->write_syseeprom_data);
+
+    ret = g_drv->write_syseeprom_data(buf, offset, count);
+    return ret;
+}
+/*************************************end of syseeprom****************************************/
+
+static struct s3ip_sysfs_syseeprom_drivers_s drivers = {
+    /*
+     * set ODM syseeprom drivers to /sys/s3ip/syseeprom,
+     * if not support the function, set corresponding hook to NULL.
+     */
+    .get_syseeprom_size = wb_get_syseeprom_size,
+    .read_syseeprom_data = wb_read_syseeprom_data,
+    .write_syseeprom_data = wb_write_syseeprom_data,
+};
+
+static int __init syseeprom_dev_drv_init(void)
+{
+    int ret;
+
+    SYSE2_INFO("syseeprom_dev_drv_init...\n");
+    g_drv = s3ip_switch_driver_get();
+    check_p(g_drv);
+
+    ret = s3ip_sysfs_syseeprom_drivers_register(&drivers);
+    if (ret < 0) {
+        SYSE2_ERR("syseeprom drivers register err, ret %d.\n", ret);
+        return ret;
+    }
+    SYSE2_INFO("syseeprom_dev_drv_init success.\n");
+    return 0;
+}
+
+static void __exit syseeprom_dev_drv_exit(void)
+{
+    s3ip_sysfs_syseeprom_drivers_unregister();
+    SYSE2_INFO("syseeprom_exit success.\n");
+    return;
+}
+
+module_init(syseeprom_dev_drv_init);
+module_exit(syseeprom_dev_drv_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4, all=0xf).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("sonic S3IP sysfs");
+MODULE_DESCRIPTION("syseeprom device driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/sysled_device_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/sysled_device_driver.c
new file mode 100644
index 000000000000..05da8b680084
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/sysled_device_driver.c
@@ -0,0 +1,240 @@
+/*
+ * An sysled_device_driver driver for sysled devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+
+#include <linux/slab.h>
+
+#include "device_driver_common.h"
+#include "sysled_sysfs.h"
+#include "dfd_sysfs_common.h"
+
+#define SYSLED_INFO(fmt, args...) LOG_INFO("sysled: ", fmt, ##args)
+#define SYSLED_ERR(fmt, args...)  LOG_ERR("sysled: ", fmt, ##args)
+#define SYSLED_DBG(fmt, args...)  LOG_DBG("sysled: ", fmt, ##args)
+
+static int g_loglevel = 0;
+static struct switch_drivers_s *g_drv = NULL;
+
+/*****************************************sysled**********************************************/
+/*
+ * wb_get_sys_led_status - Used to get sys led status
+ * filled the value to buf, led status value define as below:
+ * 0: dark
+ * 1: green
+ * 2: yellow
+ * 3: red
+ * 4: blue
+ * 5: green light flashing
+ * 6: yellow light flashing
+ * 7: red light flashing
+ * 8: blue light flashing
+ *
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_sys_led_status(char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_sys_led_status);
+
+    ret = g_drv->get_sys_led_status(buf, count);
+    return ret;
+}
+
+/*
+ * wb_set_sys_led_status - Used to set sys led status
+ * @status: led status, led status value define as below:
+ * 0: dark
+ * 1: green
+ * 2: yellow
+ * 3: red
+ * 4: blue
+ * 5: green light flashing
+ * 6: yellow light flashing
+ * 7: red light flashing
+ * 8: blue light flashing
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_set_sys_led_status(int status)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_sys_led_status);
+
+    ret = g_drv->set_sys_led_status(status);
+    return ret;
+}
+
+/* Similar to wb_get_sys_led_status */
+static ssize_t wb_get_bmc_led_status(char *buf, size_t count)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_bmc_led_status);
+
+    ret = g_drv->get_bmc_led_status(buf, count);
+    return ret;
+}
+
+/* Similar to wb_set_sys_led_status */
+static int wb_set_bmc_led_status(int status)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_bmc_led_status);
+
+    ret = g_drv->set_bmc_led_status(status);
+    return ret;
+}
+
+/* Similar to wb_get_sys_led_status */
+static ssize_t wb_get_sys_fan_led_status(char *buf, size_t count)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_sys_fan_led_status);
+
+    ret = g_drv->get_sys_fan_led_status(buf, count);
+    return ret;
+}
+
+/* Similar to wb_set_sys_led_status */
+static int wb_set_sys_fan_led_status(int status)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_sys_fan_led_status);
+
+    ret = g_drv->set_sys_fan_led_status(status);
+    return ret;
+}
+
+/* Similar to wb_get_sys_led_status */
+static ssize_t wb_get_sys_psu_led_status(char *buf, size_t count)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_sys_psu_led_status);
+
+    ret = g_drv->get_sys_psu_led_status(buf, count);
+    return ret;
+}
+
+/* Similar to wb_set_sys_led_status */
+static int wb_set_sys_psu_led_status(int status)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_sys_psu_led_status);
+
+    ret = g_drv->set_sys_psu_led_status(status);
+    return ret;
+}
+
+/* Similar to wb_get_sys_led_status */
+static ssize_t wb_get_id_led_status(char *buf, size_t count)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_id_led_status);
+
+    ret = g_drv->get_id_led_status(buf, count);
+    return ret;
+}
+
+/* Similar to wb_set_sys_led_status */
+static int wb_set_id_led_status(int status)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_id_led_status);
+
+    ret = g_drv->set_id_led_status(status);
+    return ret;
+}
+
+/**************************************end of sysled******************************************/
+
+static struct s3ip_sysfs_sysled_drivers_s drivers = {
+    /*
+     * set ODM sysled drivers to /sys/s3ip/sysled,
+     * if not support the function, set corresponding hook to NULL.
+     */
+    .get_sys_led_status = wb_get_sys_led_status,
+    .set_sys_led_status = wb_set_sys_led_status,
+    .get_bmc_led_status = wb_get_bmc_led_status,
+    .set_bmc_led_status = wb_set_bmc_led_status,
+    .get_sys_fan_led_status = wb_get_sys_fan_led_status,
+    .set_sys_fan_led_status = wb_set_sys_fan_led_status,
+    .get_sys_psu_led_status = wb_get_sys_psu_led_status,
+    .set_sys_psu_led_status = wb_set_sys_psu_led_status,
+    .get_id_led_status = wb_get_id_led_status,
+    .set_id_led_status = wb_set_id_led_status,
+};
+
+static int __init sysled_init(void)
+{
+    int ret;
+
+    SYSLED_INFO("sysled_init...\n");
+    g_drv = s3ip_switch_driver_get();
+    check_p(g_drv);
+
+    ret = s3ip_sysfs_sysled_drivers_register(&drivers);
+    if (ret < 0) {
+        SYSLED_ERR("sysled drivers register err, ret %d.\n", ret);
+        return ret;
+    }
+
+    SYSLED_INFO("sysled create success.\n");
+    return 0;
+}
+
+static void __exit sysled_exit(void)
+{
+    s3ip_sysfs_sysled_drivers_unregister();
+    SYSLED_INFO("sysled_exit ok.\n");
+    return;
+}
+
+module_init(sysled_init);
+module_exit(sysled_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4, all=0xf).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("sonic S3IP sysfs");
+MODULE_DESCRIPTION("sysled device driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/system_device_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/system_device_driver.c
new file mode 100644
index 000000000000..65013163cb90
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/system_device_driver.c
@@ -0,0 +1,109 @@
+/*
+ * An system_device_driver driver for system devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+
+#include <linux/slab.h>
+
+#include "device_driver_common.h"
+#include "system_sysfs.h"
+#include "dfd_sysfs_common.h"
+
+#define TEMP_SENSOR_INFO(fmt, args...) LOG_INFO("system: ", fmt, ##args)
+#define TEMP_SENSOR_ERR(fmt, args...)  LOG_ERR("system: ", fmt, ##args)
+#define TEMP_SENSOR_DBG(fmt, args...)  LOG_DBG("system: ", fmt, ##args)
+
+static int g_loglevel = 0;
+static struct switch_drivers_s *g_drv = NULL;
+
+static ssize_t wb_set_system_value(unsigned int type,  int value)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_system_value);
+
+    ret = g_drv->set_system_value(type, value);
+    return ret;
+}
+
+static ssize_t wb_get_system_value(unsigned int type, int *value, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_system_value);
+
+    ret = g_drv->get_system_value(type, value, buf, count);
+    return ret;
+}
+
+static ssize_t wb_get_system_port_power_status(unsigned int type, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_system_port_power_status);
+
+    ret = g_drv->get_system_port_power_status(type, buf, count);
+    return ret;
+}
+/***********************************end of main board temp*************************************/
+
+static struct s3ip_sysfs_system_drivers_s drivers = {
+    /*
+     * set ODM system drivers to /sys/s3ip/system,
+     * if not support the function, set corresponding hook to NULL.
+     */
+    .get_system_value = wb_get_system_value,
+    .set_system_value = wb_set_system_value,
+    .get_system_port_power_status = wb_get_system_port_power_status,
+};
+
+static int __init system_dev_drv_init(void)
+{
+    int ret;
+
+    TEMP_SENSOR_INFO("system_init...\n");
+    g_drv = s3ip_switch_driver_get();
+    check_p(g_drv);
+
+    ret = s3ip_sysfs_system_drivers_register(&drivers);
+    if (ret < 0) {
+        TEMP_SENSOR_ERR("temp sensor drivers register err, ret %d.\n", ret);
+        return ret;
+    }
+    TEMP_SENSOR_INFO("system_init success.\n");
+    return 0;
+}
+
+static void __exit system_dev_drv_exit(void)
+{
+    s3ip_sysfs_system_drivers_unregister();
+    TEMP_SENSOR_INFO("system_exit success.\n");
+    return;
+}
+
+module_init(system_dev_drv_init);
+module_exit(system_dev_drv_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4, all=0xf).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("sonic S3IP sysfs");
+MODULE_DESCRIPTION("system device driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/temp_sensor_device_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/temp_sensor_device_driver.c
new file mode 100644
index 000000000000..afd0bc25c8d0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/temp_sensor_device_driver.c
@@ -0,0 +1,275 @@
+/*
+ * An temp_sensor_device_driver driver for temperature devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+
+#include <linux/slab.h>
+
+#include "device_driver_common.h"
+#include "temp_sensor_sysfs.h"
+#include "dfd_sysfs_common.h"
+
+#define TEMP_SENSOR_INFO(fmt, args...) LOG_INFO("temp_sensor: ", fmt, ##args)
+#define TEMP_SENSOR_ERR(fmt, args...)  LOG_ERR("temp_sensor: ", fmt, ##args)
+#define TEMP_SENSOR_DBG(fmt, args...)  LOG_DBG("temp_sensor: ", fmt, ##args)
+
+static int g_loglevel = 0;
+static struct switch_drivers_s *g_drv = NULL;
+
+/***************************************main board temp*****************************************/
+/*
+ * wb_get_main_board_temp_number - Used to get main board temperature sensors number,
+ *
+ * This function returns main board temperature sensors by your switch,
+ * If there is no main board temperature sensors, returns 0,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_get_main_board_temp_number(void)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_temp_number);
+
+    ret = g_drv->get_main_board_temp_number();
+    return ret;
+}
+
+/*
+ * wb_get_main_board_temp_alias - Used to identify the location of the temperature sensor,
+ * such as air_inlet, air_outlet and so on.
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_temp_alias(unsigned int temp_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_temp_alias);
+
+    ret = g_drv->get_main_board_temp_alias(temp_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_temp_type - Used to get the model of temperature sensor,
+ * such as lm75, tmp411 and so on
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_temp_type(unsigned int temp_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_temp_type);
+
+    ret = g_drv->get_main_board_temp_type(temp_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_temp_max - Used to get the maximum threshold of temperature sensor
+ * filled the value to buf, the value is integer with millidegree Celsius
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_temp_max(unsigned int temp_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_temp_max);
+
+    ret = g_drv->get_main_board_temp_max(temp_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_temp_min - Used to get the minimum threshold of temperature sensor
+ * filled the value to buf, the value is integer with millidegree Celsius
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_temp_min(unsigned int temp_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_temp_min);
+
+    ret = g_drv->get_main_board_temp_min(temp_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_temp_high - Used to get the highimum threshold of temperature sensor
+ * filled the value to buf, the value is integer with millidegree Celsius
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_temp_high(unsigned int temp_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_temp_high);
+
+    ret = g_drv->get_main_board_temp_high(temp_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_temp_low - Used to get the lowimum threshold of temperature sensor
+ * filled the value to buf, the value is integer with millidegree Celsius
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_temp_low(unsigned int temp_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_temp_low);
+
+    ret = g_drv->get_main_board_temp_low(temp_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_temp_value - Used to get the input value of temperature sensor
+ * filled the value to buf, the value is integer with millidegree Celsius
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_temp_value(unsigned int temp_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_temp_value);
+
+    ret = g_drv->get_main_board_temp_value(temp_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_temp_monitor_flag - Used to get the monitor flag of temperature sensor
+ * filled the value to buf, the value is integer with millidegree Celsius
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_temp_monitor_flag(unsigned int temp_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_temp_monitor_flag);
+
+    ret = g_drv->get_main_board_temp_monitor_flag(temp_index, buf, count);
+    return ret;
+}
+/***********************************end of main board temp*************************************/
+
+static struct s3ip_sysfs_temp_sensor_drivers_s drivers = {
+    /*
+     * set ODM temperature sensor drivers to /sys/s3ip/temp_sensor,
+     * if not support the function, set corresponding hook to NULL.
+     */
+    .get_main_board_temp_number = wb_get_main_board_temp_number,
+    .get_main_board_temp_alias = wb_get_main_board_temp_alias,
+    .get_main_board_temp_type = wb_get_main_board_temp_type,
+    .get_main_board_temp_max = wb_get_main_board_temp_max,
+    .get_main_board_temp_min = wb_get_main_board_temp_min,
+    .get_main_board_temp_value = wb_get_main_board_temp_value,
+    .get_main_board_temp_high = wb_get_main_board_temp_high,
+    .get_main_board_temp_low = wb_get_main_board_temp_low,
+    .get_main_board_temp_monitor_flag = wb_get_main_board_temp_monitor_flag,
+};
+
+static int __init temp_sensor_dev_drv_init(void)
+{
+    int ret;
+
+    TEMP_SENSOR_INFO("temp_sensor_init...\n");
+    g_drv = s3ip_switch_driver_get();
+    check_p(g_drv);
+
+    ret = s3ip_sysfs_temp_sensor_drivers_register(&drivers);
+    if (ret < 0) {
+        TEMP_SENSOR_ERR("temp sensor drivers register err, ret %d.\n", ret);
+        return ret;
+    }
+    TEMP_SENSOR_INFO("temp_sensor_init success.\n");
+    return 0;
+}
+
+static void __exit temp_sensor_dev_drv_exit(void)
+{
+    s3ip_sysfs_temp_sensor_drivers_unregister();
+    TEMP_SENSOR_INFO("temp_sensor_exit success.\n");
+    return;
+}
+
+module_init(temp_sensor_dev_drv_init);
+module_exit(temp_sensor_dev_drv_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4, all=0xf).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("sonic S3IP sysfs");
+MODULE_DESCRIPTION("temperature sensors device driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/transceiver_device_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/transceiver_device_driver.c
new file mode 100644
index 000000000000..1aad05fea3f5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/transceiver_device_driver.c
@@ -0,0 +1,481 @@
+/*
+ * An transceiver_device_driver driver for sff devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+
+#include "device_driver_common.h"
+#include "transceiver_sysfs.h"
+#include "dfd_sysfs_common.h"
+
+#define SFF_INFO(fmt, args...) LOG_INFO("sff: ", fmt, ##args)
+#define SFF_ERR(fmt, args...)  LOG_ERR("sff: ", fmt, ##args)
+#define SFF_DBG(fmt, args...)  LOG_DBG("sff: ", fmt, ##args)
+
+static int g_loglevel = 0;
+static struct switch_drivers_s *g_drv = NULL;
+
+/****************************************transceiver******************************************/
+static int wb_get_eth_number(void)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_eth_number);
+
+    ret = g_drv->get_eth_number();
+    return ret;
+}
+
+/*
+ * wb_get_transceiver_power_on_status - Used to get the whole machine port power on status,
+ * filled the value to buf, 0: power off, 1: power on
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_transceiver_power_on_status(char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_transceiver_power_on_status);
+
+    ret = g_drv->get_transceiver_power_on_status(buf, count);
+    return ret;
+}
+
+/*
+ * wb_set_transceiver_power_on_status - Used to set the whole machine port power on status,
+ * @status: power on status, 0: power off, 1: power on
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_set_transceiver_power_on_status(int status)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_transceiver_power_on_status);
+
+    ret = g_drv->set_transceiver_power_on_status(status);
+    return ret;
+}
+
+/*
+ * wb_get_transceiver_present_status - Used to get the whole machine port present status,
+ * filled the value to buf, 0: absent, 1: present
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_transceiver_present_status(char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_transceiver_present_status);
+
+    ret = g_drv->get_transceiver_present_status(buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_eth_power_on_status - Used to get single port power on status,
+ * filled the value to buf, 0: power off, 1: power on
+ * @eth_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_eth_power_on_status(unsigned int eth_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_eth_power_on_status);
+
+    ret = g_drv->get_eth_power_on_status(eth_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_set_eth_power_on_status - Used to set single port power on status,
+ * @eth_index: start with 1
+ * @status: power on status, 0: power off, 1: power on
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_set_eth_power_on_status(unsigned int eth_index, int status)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_eth_power_on_status);
+
+    ret = g_drv->set_eth_power_on_status(eth_index, status);
+    return ret;
+}
+
+/*
+ * wb_get_eth_tx_fault_status - Used to get port tx_fault status,
+ * filled the value to buf, 0: normal, 1: abnormal
+ * @eth_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_eth_tx_fault_status(unsigned int eth_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_eth_tx_fault_status);
+
+    ret = g_drv->get_eth_tx_fault_status(eth_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_eth_tx_disable_status - Used to get port tx_disable status,
+ * filled the value to buf, 0: tx_enable, 1: tx_disable
+ * @eth_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_eth_tx_disable_status(unsigned int eth_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_eth_tx_disable_status);
+
+    ret = g_drv->get_eth_tx_disable_status(eth_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_set_eth_tx_disable_status - Used to set port tx_disable status,
+ * @eth_index: start with 1
+ * @status: tx_disable status, 0: tx_enable, 1: tx_disable
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_set_eth_tx_disable_status(unsigned int eth_index, int status)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_eth_tx_disable_status);
+
+    ret = g_drv->set_eth_tx_disable_status(eth_index, status);
+    return ret;
+}
+
+/*
+ * wb_get_eth_present_status - Used to get port present status,
+ * filled the value to buf, 1: present, 0: absent
+ * @eth_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_eth_present_status(unsigned int eth_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_eth_present_status);
+
+    ret = g_drv->get_eth_present_status(eth_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_eth_rx_los_status - Used to get port rx_los status,
+ * filled the value to buf, 0: normal, 1: abnormal
+ * @eth_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_eth_rx_los_status(unsigned int eth_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_eth_rx_los_status);
+
+    ret = g_drv->get_eth_rx_los_status(eth_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_eth_reset_status - Used to get port reset status,
+ * filled the value to buf, 0: unreset, 1: reset
+ * @eth_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_eth_reset_status(unsigned int eth_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_eth_reset_status);
+
+    ret = g_drv->get_eth_reset_status(eth_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_set_eth_reset_status - Used to set port reset status,
+ * @eth_index: start with 1
+ * @status: reset status, 0: unreset, 1: reset
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_set_eth_reset_status(unsigned int eth_index, int status)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_eth_reset_status);
+
+    ret = g_drv->set_eth_reset_status(eth_index, status);
+    return ret;
+}
+
+/*
+ * wb_get_eth_low_power_mode_status - Used to get port low power mode status,
+ * filled the value to buf, 0: high power mode, 1: low power mode
+ * @eth_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_eth_low_power_mode_status(unsigned int eth_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_eth_low_power_mode_status);
+
+    ret = g_drv->get_eth_low_power_mode_status(eth_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_eth_interrupt_status - Used to get port interruption status,
+ * filled the value to buf, 0: no interruption, 1: interruption
+ * @eth_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_eth_interrupt_status(unsigned int eth_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_eth_interrupt_status);
+
+    ret = g_drv->get_eth_interrupt_status(eth_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_eth_eeprom_size - Used to get port eeprom size
+ *
+ * This function returns the size of port eeprom,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_get_eth_eeprom_size(unsigned int eth_index)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_eth_eeprom_size);
+
+    ret = g_drv->get_eth_eeprom_size(eth_index);
+    return ret;
+}
+
+/*
+ * wb_read_eth_eeprom_data - Used to read port eeprom data,
+ * @buf: Data read buffer
+ * @offset: offset address to read port eeprom data
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * returns 0 means EOF,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_read_eth_eeprom_data(unsigned int eth_index, char *buf, loff_t offset,
+                   size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->read_eth_eeprom_data);
+
+    ret = g_drv->read_eth_eeprom_data(eth_index, buf, offset, count);
+    return ret;
+}
+
+/*
+ * wb_write_eth_eeprom_data - Used to write port eeprom data
+ * @buf: Data write buffer
+ * @offset: offset address to write port eeprom data
+ * @count: length of buf
+ *
+ * This function returns the written length of port eeprom,
+ * returns 0 means EOF,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_write_eth_eeprom_data(unsigned int eth_index, char *buf, loff_t offset,
+                   size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->write_eth_eeprom_data);
+
+    ret = g_drv->write_eth_eeprom_data(eth_index, buf, offset, count);
+    return ret;
+}
+
+static ssize_t wb_get_eth_optoe_type(unsigned int sff_index, int *optoe_type, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_eth_optoe_type);
+
+    ret = g_drv->get_eth_optoe_type(sff_index, optoe_type, buf, count);
+    return ret;
+}
+
+static ssize_t wb_set_eth_optoe_type(unsigned int sff_index, int optoe_type)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_eth_optoe_type);
+
+    ret = g_drv->set_eth_optoe_type(sff_index, optoe_type);
+    return ret;
+}
+
+/************************************end of transceiver***************************************/
+
+static struct s3ip_sysfs_transceiver_drivers_s drivers = {
+    /*
+     * set ODM transceiver drivers to /sys/s3ip/transceiver,
+     * if not support the function, set corresponding hook to NULL.
+     */
+    .get_eth_number = wb_get_eth_number,
+    .get_transceiver_power_on_status = wb_get_transceiver_power_on_status,
+    .set_transceiver_power_on_status = wb_set_transceiver_power_on_status,
+    .get_transceiver_present_status = wb_get_transceiver_present_status,
+    .get_eth_power_on_status = wb_get_eth_power_on_status,
+    .set_eth_power_on_status = wb_set_eth_power_on_status,
+    .get_eth_tx_fault_status = wb_get_eth_tx_fault_status,
+    .get_eth_tx_disable_status = wb_get_eth_tx_disable_status,
+    .set_eth_tx_disable_status = wb_set_eth_tx_disable_status,
+    .get_eth_present_status = wb_get_eth_present_status,
+    .get_eth_rx_los_status = wb_get_eth_rx_los_status,
+    .get_eth_reset_status = wb_get_eth_reset_status,
+    .set_eth_reset_status = wb_set_eth_reset_status,
+    .get_eth_low_power_mode_status = wb_get_eth_low_power_mode_status,
+    .get_eth_interrupt_status = wb_get_eth_interrupt_status,
+    .get_eth_eeprom_size = wb_get_eth_eeprom_size,
+    .read_eth_eeprom_data = wb_read_eth_eeprom_data,
+    .write_eth_eeprom_data = wb_write_eth_eeprom_data,
+    .get_eth_optoe_type = wb_get_eth_optoe_type,
+    .set_eth_optoe_type = wb_set_eth_optoe_type,
+};
+
+static int __init sff_dev_drv_init(void)
+{
+    int ret;
+
+    SFF_INFO("sff_init...\n");
+    g_drv = s3ip_switch_driver_get();
+    check_p(g_drv);
+
+    ret = s3ip_sysfs_sff_drivers_register(&drivers);
+    if (ret < 0) {
+        SFF_ERR("transceiver drivers register err, ret %d.\n", ret);
+        return ret;
+    }
+    SFF_INFO("sff_init success.\n");
+    return 0;
+}
+
+static void __exit sff_dev_drv_exit(void)
+{
+    s3ip_sysfs_sff_drivers_unregister();
+    SFF_INFO("sff_exit success.\n");
+    return;
+}
+
+module_init(sff_dev_drv_init);
+module_exit(sff_dev_drv_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4, all=0xf).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("sonic S3IP sysfs");
+MODULE_DESCRIPTION("transceiver device driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/vol_sensor_device_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/vol_sensor_device_driver.c
new file mode 100644
index 000000000000..a2fc96551235
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/vol_sensor_device_driver.c
@@ -0,0 +1,267 @@
+/*
+ * An vol_sensor_device_driver driver for voltage devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+
+#include <linux/slab.h>
+
+#include "device_driver_common.h"
+#include "vol_sensor_sysfs.h"
+#include "dfd_sysfs_common.h"
+
+#define VOL_SENSOR_INFO(fmt, args...) LOG_INFO("vol_sensor: ", fmt, ##args)
+#define VOL_SENSOR_ERR(fmt, args...)  LOG_ERR("vol_sensor: ", fmt, ##args)
+#define VOL_SENSOR_DBG(fmt, args...)  LOG_DBG("vol_sensor: ", fmt, ##args)
+
+static int g_loglevel = 0;
+static struct switch_drivers_s *g_drv = NULL;
+
+/*************************************main board voltage***************************************/
+static int wb_get_main_board_vol_number(void)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_vol_number);
+
+    ret = g_drv->get_main_board_vol_number();
+    return ret;
+}
+
+/*
+ * wb_get_main_board_vol_alias - Used to identify the location of the voltage sensor,
+ * @vol_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_vol_alias(unsigned int vol_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_vol_alias);
+
+    ret = g_drv->get_main_board_vol_alias(vol_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_vol_type - Used to get the model of voltage sensor,
+ * such as udc90160, tps53622 and so on
+ * @vol_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_vol_type(unsigned int vol_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_vol_type);
+
+    ret = g_drv->get_main_board_vol_type(vol_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_vol_max - Used to get the maximum threshold of voltage sensor
+ * filled the value to buf, the value is integer with mV
+ * @vol_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_vol_max(unsigned int vol_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_vol_max);
+
+    ret = g_drv->get_main_board_vol_max(vol_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_vol_min - Used to get the minimum threshold of voltage sensor
+ * filled the value to buf, the value is integer with mV
+ * @vol_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_vol_min(unsigned int vol_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_vol_min);
+
+    ret = g_drv->get_main_board_vol_min(vol_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_vol_range - Used to get the output error value of voltage sensor
+ * filled the value to buf
+ * @vol_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_vol_range(unsigned int vol_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_vol_range);
+
+    ret = g_drv->get_main_board_vol_range(vol_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_vol_nominal_value - Used to get the nominal value of voltage sensor
+ * filled the value to buf
+ * @vol_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_vol_nominal_value(unsigned int vol_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_vol_nominal_value);
+
+    ret = g_drv->get_main_board_vol_nominal_value(vol_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_vol_value - Used to get the input value of voltage sensor
+ * filled the value to buf, the value is integer with mV
+ * @vol_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_vol_value(unsigned int vol_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_vol_value);
+
+    ret = g_drv->get_main_board_vol_value(vol_index, buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_main_board_vol_monitor_flag - Used to get the monitor flag of voltage sensor
+ * filled the value to buf, the value is integer with mV
+ * @vol_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_main_board_vol_monitor_flag(unsigned int vol_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_main_board_vol_monitor_flag);
+
+    ret = g_drv->get_main_board_vol_monitor_flag(vol_index, buf, count);
+    return ret;
+}
+/*********************************end of main board voltage************************************/
+
+static struct s3ip_sysfs_vol_sensor_drivers_s drivers = {
+    /*
+     * set ODM voltage sensor drivers to /sys/s3ip/vol_sensor,
+     * if not support the function, set corresponding hook to NULL.
+     */
+    .get_main_board_vol_number = wb_get_main_board_vol_number,
+    .get_main_board_vol_alias = wb_get_main_board_vol_alias,
+    .get_main_board_vol_type = wb_get_main_board_vol_type,
+    .get_main_board_vol_max = wb_get_main_board_vol_max,
+    .get_main_board_vol_min = wb_get_main_board_vol_min,
+    .get_main_board_vol_range = wb_get_main_board_vol_range,
+    .get_main_board_vol_nominal_value = wb_get_main_board_vol_nominal_value,
+    .get_main_board_vol_value = wb_get_main_board_vol_value,
+    .get_main_board_vol_monitor_flag = wb_get_main_board_vol_monitor_flag,
+};
+
+static int __init vol_sensor_dev_drv_init(void)
+{
+    int ret;
+
+    VOL_SENSOR_INFO("vol_sensor_init...\n");
+    g_drv = s3ip_switch_driver_get();
+    check_p(g_drv);
+
+    ret = s3ip_sysfs_vol_sensor_drivers_register(&drivers);
+    if (ret < 0) {
+        VOL_SENSOR_ERR("vol sensor drivers register err, ret %d.\n", ret);
+        return ret;
+    }
+    VOL_SENSOR_INFO("vol_sensor_init success.\n");
+    return 0;
+}
+
+static void __exit vol_sensor_dev_drv_exit(void)
+{
+    s3ip_sysfs_vol_sensor_drivers_unregister();
+    VOL_SENSOR_INFO("vol_sensor_exit success.\n");
+    return;
+}
+
+module_init(vol_sensor_dev_drv_init);
+module_exit(vol_sensor_dev_drv_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4, all=0xf).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("sonic S3IP sysfs");
+MODULE_DESCRIPTION("voltage sensors device driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/watchdog_device_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/watchdog_device_driver.c
new file mode 100644
index 000000000000..b2075afe1081
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/watchdog_device_driver.c
@@ -0,0 +1,214 @@
+/*
+ * An watchdog_device_driver driver for watchdog devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+
+#include "device_driver_common.h"
+#include "watchdog_sysfs.h"
+#include "dfd_sysfs_common.h"
+
+#define WDT_INFO(fmt, args...) LOG_INFO("watchdog: ", fmt, ##args)
+#define WDT_ERR(fmt, args...)  LOG_ERR("watchdog: ", fmt, ##args)
+#define WDT_DBG(fmt, args...)  LOG_DBG("watchdog: ", fmt, ##args)
+
+static int g_loglevel = 0;
+static struct switch_drivers_s *g_drv = NULL;
+
+/****************************************watchdog*********************************************/
+/*
+ * wb_get_watchdog_identify - Used to get watchdog identify, such as iTCO_wdt
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_watchdog_identify(char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_watchdog_identify);
+
+    ret = g_drv->get_watchdog_identify(buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_watchdog_timeleft - Used to get watchdog timeleft,
+ * filled the value to buf
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_watchdog_timeleft(char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_watchdog_timeleft);
+
+    ret = g_drv->get_watchdog_timeleft(buf, count);
+    return ret;
+}
+
+/*
+ * wb_get_watchdog_timeout - Used to get watchdog timeout,
+ * filled the value to buf
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_watchdog_timeout(char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_watchdog_timeout);
+
+    ret = g_drv->get_watchdog_timeout(buf, count);
+    return ret;
+}
+
+/*
+ * wb_set_watchdog_timeout - Used to set watchdog timeout,
+ * @value: timeout value
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_set_watchdog_timeout(int value)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_watchdog_timeout);
+
+    ret = g_drv->set_watchdog_timeout(value);
+    return ret;
+}
+
+/*
+ * wb_get_watchdog_enable_status - Used to get watchdog enable status,
+ * filled the value to buf, 0: disable, 1: enable
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t wb_get_watchdog_enable_status(char *buf, size_t count)
+{
+    ssize_t ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_watchdog_enable_status);
+
+    ret = g_drv->get_watchdog_enable_status(buf, count);
+    return ret;
+}
+
+/*
+ * wb_set_watchdog_enable_status - Used to set watchdog enable status,
+ * @value: enable status value, 0: disable, 1: enable
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_set_watchdog_enable_status(int value)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_watchdog_enable_status);
+
+    ret = g_drv->set_watchdog_enable_status(value);
+    return ret;
+}
+
+/*
+ * wb_set_watchdog_reset - Used to feed watchdog,
+ * @value: any value to feed watchdog
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int wb_set_watchdog_reset(int value)
+{
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->set_watchdog_reset);
+
+    ret = g_drv->set_watchdog_reset(value);
+    return ret;
+}
+
+/*************************************end of watchdog*****************************************/
+
+static struct s3ip_sysfs_watchdog_drivers_s drivers = {
+    /*
+     * set ODM watchdog sensor drivers to /sys/s3ip/watchdog,
+     * if not support the function, set corresponding hook to NULL.
+     */
+    .get_watchdog_identify = wb_get_watchdog_identify,
+    .get_watchdog_timeleft = wb_get_watchdog_timeleft,
+    .get_watchdog_timeout = wb_get_watchdog_timeout,
+    .set_watchdog_timeout = wb_set_watchdog_timeout,
+    .get_watchdog_enable_status = wb_get_watchdog_enable_status,
+    .set_watchdog_enable_status = wb_set_watchdog_enable_status,
+    .set_watchdog_reset = wb_set_watchdog_reset,
+};
+
+static int __init watchdog_dev_drv_init(void)
+{
+    int ret;
+
+    WDT_INFO("watchdog_init...\n");
+    g_drv = s3ip_switch_driver_get();
+    check_p(g_drv);
+
+    ret = s3ip_sysfs_watchdog_drivers_register(&drivers);
+    if (ret < 0) {
+        WDT_ERR("watchdog drivers register err, ret %d.\n", ret);
+        return ret;
+    }
+    WDT_INFO("watchdog create success.\n");
+    return 0;
+}
+
+static void __exit watchdog_dev_drv_exit(void)
+{
+    s3ip_sysfs_watchdog_drivers_unregister();
+    WDT_INFO("watchdog_exit success.\n");
+    return;
+}
+
+module_init(watchdog_dev_drv_init);
+module_exit(watchdog_dev_drv_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4, all=0xf).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("sonic S3IP sysfs");
+MODULE_DESCRIPTION("watchdog device driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/Makefile
new file mode 100644
index 000000000000..98b0d0db75c4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/Makefile
@@ -0,0 +1,35 @@
+PWD		= $(shell pwd)
+
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+
+SUBDIR_CFG = cfg
+wb_switch_driver-objs := switch_driver.o wb_module.o \
+wb_fan_driver.o \
+wb_eeprom_driver.o \
+wb_cpld_driver.o \
+wb_fpga_driver.o \
+wb_led_driver.o \
+wb_slot_driver.o \
+wb_sensors_driver.o \
+wb_psu_driver.o \
+wb_sff_driver.o \
+wb_watchdog_driver.o \
+wb_system_driver.o \
+$(SUBDIR_CFG)/dfd_cfg.o \
+$(SUBDIR_CFG)/dfd_cfg_adapter.o \
+$(SUBDIR_CFG)/dfd_cfg_file.o \
+$(SUBDIR_CFG)/dfd_cfg_info.o \
+$(SUBDIR_CFG)/dfd_cfg_listnode.o \
+$(SUBDIR_CFG)/dfd_frueeprom.o \
+$(SUBDIR_CFG)/dfd_tlveeprom.o \
+
+obj-m := wb_switch_driver.o
+all:
+	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
+	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
+	cp -p  $(PWD)/*.ko $(module_out_put_dir)
+clean:
+	rm -f $(PWD)/*.o $(PWD)/$(SUBDIR_CFG)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd $(PWD)/$(SUBDIR_CFG)/.*.cmd
+	rm -f $(PWD)/Module.markers $(PWD)/Module.symvers $(PWD)/modules.order 
+	rm -rf $(PWD)/.tmp_versions  
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg.c
new file mode 100644
index 000000000000..0637d8566aa2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg.c
@@ -0,0 +1,1169 @@
+/*
+ * An dfd_cfg driver for cfg devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/list.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <asm/uaccess.h>
+
+#include "wb_module.h"
+#include "dfd_cfg_file.h"
+#include "dfd_cfg_listnode.h"
+#include "dfd_cfg_info.h"
+#include "dfd_cfg_adapter.h"
+#include "dfd_cfg.h"
+
+/* Configuration item name */
+#ifdef DFD_CFG_ITEM
+#undef DFD_CFG_ITEM
+#endif
+#define DFD_CFG_ITEM(_id, _name, _index_min, _index_max)    _name,
+static char *dfd_cfg_item_name[] = {
+    DFD_CFG_ITEM_ALL
+};
+
+/* The index range of the item is specified */
+#ifdef DFD_CFG_ITEM
+#undef DFD_CFG_ITEM
+#endif
+#define DFD_CFG_ITEM(_id, _name, _index_min, _index_max)    {_index_min, _index_max},
+static index_range_t dfd_cfg_item_index_range[] = {
+    DFD_CFG_ITEM_ALL
+};
+
+/* led status register value conversion level list header */
+LIST_HEAD(dfd_lib_cfg_led_status_decode_conv_lst);
+
+/* Fan name Convert Air duct type chain head */
+LIST_HEAD(dfd_lib_cfg_fan_name_conv_dir_lst);
+
+/* Fan name Convert Air duct type chain head */
+LIST_HEAD(dfd_lib_cfg_power_name_conv_lst);
+
+/* Configure the root node of the necklace watch */
+static lnode_root_t dfd_ko_cfg_list_root;
+
+/* input key,and then get configuration string */
+char *key_to_name(uint64_t key)
+{
+    return dfd_cfg_item_name[key];
+}
+
+/* Strip out Spaces and carriage returns */
+void dfd_ko_cfg_del_space_lf_cr(char *str)
+{
+    int i, j;
+    int len;
+
+    if (str == NULL) {
+        DBG_DEBUG(DBG_ERROR, "param error, str is NULL\n");
+        return;
+    }
+    /* Remove all Spaces from the configuration line */
+    len = strlen(str);
+    for (i = 0; i < len; i++) {
+        if (str[i] == '\r' || str[i] == '\n' || str[i] == ' ') {
+            for (j = i; j < len - 1; j++) {
+                str[j] = str[j + 1];
+            }
+            str[j] = '\0';
+            len--;
+            i--;
+        }
+    }
+}
+
+void dfd_ko_cfg_del_lf_cr(char *str)
+{
+    int i, len;
+
+    len = strlen(str);
+    for (i = 0; i < len; i++) {
+        if (str[i] == '\r' || str[i] == '\n') {
+            str[i] = '\0';
+        }
+    }
+}
+
+/**
+ * Free linked list
+ * @root: Root node pointer
+ *
+ * @return : void
+ */
+void val_convert_node_lst_free(struct list_head *root)
+{
+    val_convert_node_t *node, *node_next;
+
+    if (root == NULL) {
+        return;
+    }
+
+    /* Iterate to delete the linked list */
+    list_for_each_entry_safe(node, node_next, root, lst) {
+        list_del(&node->lst);
+        kfree(node);
+        node = NULL;
+    }
+
+    return;
+
+}
+
+/* Register value conversion node added */
+static void dfd_ko_cfg_regval_conv_lst_add(struct list_head *root, int val, char *str,
+                int index1, int index2)
+{
+    val_convert_node_t *val_convert;
+
+    val_convert = (val_convert_node_t *)kmalloc(sizeof(val_convert_node_t), GFP_KERNEL);
+    if (val_convert == NULL) {
+        DBG_DEBUG(DBG_ERROR, "kmalloc val_convert_node_t fail\n");
+        return;
+    }
+    mem_clear(val_convert, sizeof(val_convert_node_t));
+
+    val_convert->int_val = val;
+    val_convert->index1 = index1;
+    val_convert->index2 = index2;
+    if (str != NULL) {
+        strlcpy(val_convert->str_val, str, sizeof(val_convert->str_val));
+    }
+
+    /* After initialization, the list does not change and does not need to be locked */
+    list_add_tail(&(val_convert->lst), root);
+}
+
+/* Get an index value from an integer value */
+static int dfd_ko_cfg_get_index2_by_intval(struct list_head *root, int val, int index1,
+               int *index2)
+{
+    val_convert_node_t *val_convert;
+
+    /* The list does not change after initialization and does not need to be locked */
+    list_for_each_entry(val_convert, root, lst) {
+        if ((val_convert->int_val == val) && (index1 == val_convert->index1)) {
+            *index2 = val_convert->index2;
+            return 0;
+        }
+    }
+
+    return -1;
+}
+
+/* Gets an index value from a string value */
+static int dfd_ko_cfg_get_index_by_strval(struct list_head *root, char *str, int *index1, int *index2)
+{
+    val_convert_node_t *val_convert;
+
+    /* The list does not change after initialization and does not need to be locked */
+    list_for_each_entry(val_convert, root, lst) {
+        if (strncmp(val_convert->str_val, str, strlen(val_convert->str_val)) == 0) {
+            *index1 = val_convert->index1;
+            *index2 = val_convert->index2;
+            return 0;
+        }
+    }
+
+    return -1;
+}
+
+/* Create a message lookup table */
+static void dfd_ko_cfg_convert_list_build(dfd_cfg_item_id_t cfg_item_id, int val, char *str,
+                int index1, int index2)
+{
+    if (cfg_item_id == DFD_CFG_ITEM_LED_STATUS_DECODE) {
+        dfd_ko_cfg_regval_conv_lst_add(&dfd_lib_cfg_led_status_decode_conv_lst, val, str, index1, index2);
+    } else if (cfg_item_id == DFD_CFG_ITEM_FAN_NAME) {
+        dfd_ko_cfg_regval_conv_lst_add(&dfd_lib_cfg_fan_name_conv_dir_lst, val, str, index1, index2);
+    } else if (cfg_item_id == DFD_CFG_ITEM_POWER_NAME) {
+        dfd_ko_cfg_regval_conv_lst_add(&dfd_lib_cfg_power_name_conv_lst, val, str, index1, index2);
+    }
+    return;
+}
+
+/**
+ * dfd_ko_cfg_get_led_status_decode2_by_regval - Reverse check the register value of the led status
+ * @regval: Defined led values
+ * @index1: led type
+ * @*value: Gets the register value of the led status
+ * @returns: 0 Succeeded, otherwise failed
+ */
+int dfd_ko_cfg_get_led_status_decode2_by_regval(int regval, int index1, int *value)
+{
+    int rv;
+
+    if (value == NULL) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error\n");
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    rv = dfd_ko_cfg_get_index2_by_intval(&dfd_lib_cfg_led_status_decode_conv_lst, regval,
+        index1, value);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "get led status decode by regval[0x%x] index1[%d] fail\n",
+            regval, index1);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    return 0;
+}
+
+/**
+ * dfd_ko_cfg_get_fan_direction_by_name - obtain the air duct type by fan name
+ * @fan_name: Fan name
+ * @fan_direction: Duct type
+ *
+ * @returns: 0 Succeeded, otherwise failed
+ */
+int dfd_ko_cfg_get_fan_direction_by_name(char *fan_name, int *fan_direction)
+{
+    int rv;
+    int index1, index2;
+
+    if ((fan_name == NULL) || (fan_direction == NULL)) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error\n");
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    rv = dfd_ko_cfg_get_index_by_strval(&dfd_lib_cfg_fan_name_conv_dir_lst, fan_name, &index1, &index2);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "get fan direction by name[%s] fail\n", fan_name);
+        return -DFD_RV_NODE_FAIL;
+    }
+
+    *fan_direction = index1;
+
+    return 0;
+}
+
+/**
+ * dfd_ko_cfg_get_fan_direction_by_name - obtain the fan type by fan name
+ * @fan_name: Fan name
+ * @fan_type: Fan type
+ * @sub_type: Fan sub-type
+ *
+ * @returns: 0 Succeeded, otherwise failed
+ */
+int dfd_ko_cfg_get_fan_type_by_name(char *fan_name, int *fan_type, int *sub_type)
+{
+    int rv;
+    int index1, index2;
+
+    if ((fan_name == NULL) || (fan_type == NULL)) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error\n");
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    rv = dfd_ko_cfg_get_index_by_strval(&dfd_lib_cfg_fan_name_conv_dir_lst, fan_name, &index1, &index2);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "get fan direction by name[%s] fail\n", fan_name);
+        return -DFD_RV_NODE_FAIL;
+    }
+
+    *fan_type = index1;
+    *sub_type = index2;
+
+    return 0;
+}
+
+/**
+ * dfd_ko_cfg_get_power_type_by_name - obtain the power supply type by power supply name
+ * @name: PSU name
+ * @power_type: PSU type
+ *
+ * @returns: 0 Succeeded, otherwise failed
+ */
+int dfd_ko_cfg_get_power_type_by_name(char *power_name, int *power_type)
+{
+    int rv;
+    int index1, index2;
+
+    if ((power_name == NULL) || (power_type == NULL)) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error\n");
+        return -1;
+    }
+
+    rv = dfd_ko_cfg_get_index_by_strval(&dfd_lib_cfg_power_name_conv_lst, power_name, &index1, &index2);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "get power type by name[%s] fail\n", power_name);
+        return -1;
+    }
+
+    *power_type = index1;
+
+    return 0;
+}
+
+/* Convert a string to a value */
+static int dfd_ko_cfg_get_value_from_char(char *value_str, int32_t *value, int line_num)
+{
+    int value_tmp = 0;
+
+    if (strlen(value_str) == 0) {
+        DBG_DEBUG(DBG_WARN, "line%d: value str is empty\n", line_num);
+        *value = DFD_CFG_EMPTY_VALUE;
+        return 0;
+    }
+
+    /* Format processing data */
+    if ((strlen(value_str) > 2) && (value_str[0] == '0')
+            && (value_str[1] == 'x' || value_str[1] == 'X')) {
+        value_tmp = (int32_t)simple_strtol(value_str, NULL, 16);    /* hexadecimal */
+    } else {
+        value_tmp = (int32_t)simple_strtol(value_str, NULL, 10);    /* decimalism */
+    }
+
+    *value = value_tmp;
+    return 0;
+}
+
+/* Get an index value,index2=NULL indicates that there is only one level index */
+static int dfd_ko_cfg_analyse_index(char *index_str, int *index1, int *index2, int line_num)
+{
+    int rv;
+    char *index1_begin_char, *index2_begin_char;
+
+    /* first character should be'_' */
+    if (index_str[0] != '_') {
+        DBG_DEBUG(DBG_ERROR, "line%d: no '-' between name and index1\n", line_num);
+        return -1;
+    }
+
+    /* Gets the first-level index value */
+    index1_begin_char = index_str;
+    rv = dfd_ko_cfg_get_value_from_char(++index1_begin_char, index1, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    /* No secondary index exists */
+    if (index2 == NULL) {
+        return 0;
+    }
+
+    /* Gets the secondary index value */
+    index2_begin_char = strchr(index1_begin_char, '_');
+    if (index2_begin_char == NULL) {
+        DBG_DEBUG(DBG_ERROR, "line%d: no '-' between index1 and index2\n", line_num);
+        return -1;
+    } else {
+        rv = dfd_ko_cfg_get_value_from_char(++index2_begin_char, index2, line_num);
+        if (rv < 0) {
+            return -1;
+        }
+    }
+
+    return 0;
+}
+
+/* The index value of the array is checked. index2=NULL indicates that it is not checked */
+static int dfd_ko_cfg_check_array_index(index_range_t *index_range, int *index1, int *index2,
+               int line_num)
+{
+    /* Level 1 index value check */
+    if ((*index1 < 0) || (*index1 > index_range->index1_max)) {
+        DBG_DEBUG(DBG_ERROR, "line%d: index1[%d] invalid, max=%d\n", line_num, *index1,
+            index_range->index1_max);
+        return -1;
+    }
+
+    /* The secondary index does not exist */
+    if (index2 == NULL) {
+        return 0;
+    }
+
+    /* Secondary index value check */
+    if ((*index2 < 0) || (*index2 > index_range->index2_max)) {
+        DBG_DEBUG(DBG_ERROR, "line%d: index2[%d] invalid, max=%d\n", line_num, *index2,
+            index_range->index2_max);
+        return -1;
+    }
+
+    return 0;
+}
+
+/* Get index value */
+static int dfd_ko_cfg_get_index(char *index_str, index_range_t *index_range, int *index1,
+            int *index2, int line_num)
+{
+    int rv;
+
+    /* No secondary index value exists */
+    if (index_range->index2_max == INDEX_NOT_EXIST) {
+        index2 = NULL;
+    }
+
+    /* Analytic index value */
+    rv = dfd_ko_cfg_analyse_index(index_str, index1, index2, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    /* Check the index value for valid values */
+    rv = dfd_ko_cfg_check_array_index(index_range, index1, index2, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    return 0;
+}
+
+/* Add a configuration item */
+static int dfd_ko_cfg_add_int_item(uint64_t key, int value, int line_num)
+{
+    int rv;
+    int *int_cfg;
+
+    int_cfg = lnode_find_node(&dfd_ko_cfg_list_root, key);
+    if (int_cfg == NULL) {
+        /* Node does not exist,kmalloc new node */
+        int_cfg = (int *)kmalloc(sizeof(int), GFP_KERNEL);
+        if (int_cfg == NULL) {
+            DBG_DEBUG(DBG_ERROR, "line%d: kmalloc int fail\n", line_num);
+            return -1;
+        }
+
+        /* Add to linked list */
+        *int_cfg = value;
+        rv = lnode_insert_node(&dfd_ko_cfg_list_root, key, int_cfg);
+        if (rv == 0) {
+            DBG_DEBUG(DBG_VERBOSE, "line%d: add int item[%d] success, key=0x%08llx\n",
+                line_num, value, key);
+        } else {
+            kfree(int_cfg);
+            int_cfg = NULL;
+            DBG_DEBUG(DBG_ERROR, "line%d: add int item[%d] fail, key=0x%08llx rv=%d \n",
+                line_num, value, key, rv);
+            return -1;
+        }
+    } else {
+        /* If the node already exists, modify the configuration value */
+        DBG_DEBUG(DBG_WARN, "line%d: replace int item[%d->%d], key=0x%08llx\n",
+            line_num, *int_cfg, value, key);
+        *int_cfg = value;
+    }
+
+    return 0;
+}
+
+/* Parse int type configuration */
+static int dfd_ko_cfg_analyse_int_item(dfd_cfg_item_id_t cfg_item_id, char *arg_name,
+               char *arg_value, char *cfg_pre, index_range_t *index_range, int line_num)
+{
+    int rv;
+    int index1 = 0, index2 = 0;
+    int value, key;
+    char *arg_name_tmp;
+
+    /* Get index value */
+    if (index_range->index1_max != INDEX_NOT_EXIST) {
+        arg_name_tmp = arg_name + strlen(cfg_pre);
+        rv = dfd_ko_cfg_get_index(arg_name_tmp, index_range, &index1, &index2, line_num);
+        if (rv < 0) {
+            return -1;
+        }
+    }
+
+    /* Get configuration value */
+    rv = dfd_ko_cfg_get_value_from_char(arg_value, &value, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    /* Add a configuration item */
+    key = DFD_CFG_KEY(cfg_item_id, index1, index2);
+    rv = dfd_ko_cfg_add_int_item(key, value, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    /* Some data needs to be backtracked, and an int type backtracked linked list is created */
+    dfd_ko_cfg_convert_list_build(cfg_item_id, value, NULL, index1, index2);
+    return 0;
+}
+
+/* Add a configuration item */
+static int dfd_ko_cfg_add_str_item(uint64_t key, char *str, int line_num)
+{
+    int rv;
+    char *str_cfg;
+
+    str_cfg = lnode_find_node(&dfd_ko_cfg_list_root, key);
+    if (str_cfg == NULL) {
+        /* kmalloc new node */
+        str_cfg = (char *)kmalloc(DFD_CFG_STR_MAX_LEN, GFP_KERNEL);
+        if (str_cfg == NULL) {
+            DBG_DEBUG(DBG_ERROR, "line%d: kmalloc str[%lu] fail\n", line_num, strlen(str));
+            return -1;
+        }
+        mem_clear(str_cfg, DFD_CFG_STR_MAX_LEN);
+        strlcpy(str_cfg, str, DFD_CFG_STR_MAX_LEN);
+
+        /* Add to linked list */
+        rv = lnode_insert_node(&dfd_ko_cfg_list_root, key, str_cfg);
+        if (rv == 0) {
+            DBG_DEBUG(DBG_VERBOSE, "line%d: add string item[%s] success, key=0x%08llx\n",
+                line_num, str_cfg, key);
+        } else {
+            kfree(str_cfg);
+            str_cfg = NULL;
+            DBG_DEBUG(DBG_ERROR, "line%d: add string item[%s] fail, key=0x%08llx rv=%d \n",
+                line_num, str_cfg, key, rv);
+            return -1;
+        }
+    } else {
+        DBG_DEBUG(DBG_WARN, "line%d: replace string item[%s->%s], key=0x%08llx\n",
+            line_num, str_cfg, str, key);
+        mem_clear(str_cfg, DFD_CFG_STR_MAX_LEN);
+        strlcpy(str_cfg, str, DFD_CFG_STR_MAX_LEN);
+    }
+
+    return 0;
+}
+
+/* Parse the str type configuration */
+static int dfd_ko_cfg_analyse_str_item(dfd_cfg_item_id_t cfg_item_id, char *arg_name,
+               char *arg_value, char *cfg_pre, index_range_t *index_range, int line_num)
+{
+    int rv;
+    int index1 = 0, index2 = 0;
+    int btree_key;
+    char *arg_name_tmp;
+
+    /* Get index value */
+    if (index_range->index1_max != INDEX_NOT_EXIST) {
+        arg_name_tmp = arg_name + strlen(cfg_pre);
+        rv = dfd_ko_cfg_get_index(arg_name_tmp, index_range, &index1, &index2, line_num);
+        if (rv < 0) {
+            return -1;
+        }
+    }
+
+    /* Length check */
+    if (strlen(arg_value) >= DFD_CFG_STR_MAX_LEN) {
+        DBG_DEBUG(DBG_ERROR, "line%d: string item[%s] is too long \n", line_num, arg_value);
+        return -1;
+    }
+
+    /* Add a configuration item */
+    btree_key = DFD_CFG_KEY(cfg_item_id, index1, index2);
+    rv = dfd_ko_cfg_add_str_item(btree_key, arg_value, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    /* Part of the data need to reverse lookup, create a string type reverse lookup list */
+    dfd_ko_cfg_convert_list_build(cfg_item_id, 0, arg_value, index1, index2);
+    return 0;
+}
+
+/* Gets the dfd_i2c_dev_t member */
+static int dfd_ko_cfg_get_i2c_dev_member(char *member_str, dfd_i2c_dev_mem_t *member, int line_num)
+{
+    dfd_i2c_dev_mem_t mem_index;
+
+    for (mem_index = DFD_I2C_DEV_MEM_BUS; mem_index < DFD_I2C_DEV_MEM_END; mem_index++) {
+        if (memcmp(member_str, g_dfd_i2c_dev_mem_str[mem_index],
+                strlen(g_dfd_i2c_dev_mem_str[mem_index])) == 0) {
+            *member =  mem_index;
+            return 0;
+        }
+    }
+
+    DBG_DEBUG(DBG_ERROR, "line%d: i2c dev member[%s] invalid\n", line_num, member_str);
+    return -1;
+}
+
+/* Set the i2c_dev member value */
+static void dfd_ko_cfg_set_i2c_dev_mem_value(dfd_i2c_dev_t *i2c_dev, dfd_i2c_dev_mem_t member,
+                int value)
+{
+    switch (member) {
+    case DFD_I2C_DEV_MEM_BUS:
+        i2c_dev->bus = value;
+        break;
+    case DFD_I2C_DEV_MEM_ADDR:
+        i2c_dev->addr = value;
+        break;
+    default:
+        break;
+    }
+}
+
+/* Add a configuration item */
+static int dfd_ko_cfg_add_i2c_dev_item(uint64_t key, dfd_i2c_dev_mem_t member, int value, int line_num)
+{
+    int rv;
+    dfd_i2c_dev_t *i2c_dev_cfg;
+
+    i2c_dev_cfg = lnode_find_node(&dfd_ko_cfg_list_root, key);
+    if (i2c_dev_cfg == NULL) {
+        /* Node does not exist,kmalloc new node */
+        i2c_dev_cfg = (dfd_i2c_dev_t *)kmalloc(sizeof(dfd_i2c_dev_t), GFP_KERNEL);
+        if (i2c_dev_cfg == NULL) {
+            DBG_DEBUG(DBG_ERROR, "line%d: kmalloc i2c_dev fail\n", line_num);
+            return -1;
+        }
+        mem_clear(i2c_dev_cfg, sizeof(dfd_i2c_dev_t));
+
+        /* Add to linked list */
+        dfd_ko_cfg_set_i2c_dev_mem_value(i2c_dev_cfg, member, value);
+        rv = lnode_insert_node(&dfd_ko_cfg_list_root, key, i2c_dev_cfg);
+        if (rv == 0) {
+            DBG_DEBUG(DBG_VERBOSE, "line%d: add i2c_dev item[%s=%d] success, key=0x%08llx\n",
+                line_num, g_dfd_i2c_dev_mem_str[member], value, key);
+        } else {
+            kfree(i2c_dev_cfg);
+            i2c_dev_cfg = NULL;
+            DBG_DEBUG(DBG_ERROR, "line%d: add i2c_dev item[%s=%d] fail, key=0x%08llx rv=%d\n",
+                line_num, g_dfd_i2c_dev_mem_str[member], value, key, rv);
+            return -1;
+        }
+    } else {
+        /* If the node already exists, modify the configuration value */
+        DBG_DEBUG(DBG_VERBOSE, "line%d: replace i2c_dev item[%s=%d], key=0x%08llx\n", line_num,
+            g_dfd_i2c_dev_mem_str[member], value, key);
+        dfd_ko_cfg_set_i2c_dev_mem_value(i2c_dev_cfg, member, value);
+    }
+
+    return 0;
+}
+
+/* Parse the dfd_i2c_dev_t type configuration */
+static int dfd_ko_cfg_analyse_i2c_dev_item(dfd_cfg_item_id_t cfg_item_id, char *arg_name,
+            char *arg_value, char *cfg_pre, index_range_t *index_range, int line_num)
+{
+    int rv;
+    int index1 = 0, index2 = 0;
+    int value, key;
+    char *arg_name_tmp;
+    dfd_i2c_dev_mem_t member;
+
+    /* Parsing structure member */
+    arg_name_tmp = arg_name + strlen(cfg_pre);
+    rv = dfd_ko_cfg_get_i2c_dev_member(arg_name_tmp, &member, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    /* Get index value */
+    if (index_range->index1_max != INDEX_NOT_EXIST) {
+        arg_name_tmp += strlen(g_dfd_i2c_dev_mem_str[member]);
+        rv = dfd_ko_cfg_get_index(arg_name_tmp, index_range, &index1, &index2, line_num);
+        if (rv < 0) {
+            return -1;
+        }
+    }
+
+    /* Value acquisition */
+    rv = dfd_ko_cfg_get_value_from_char(arg_value, &value, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    /* Add a configuration item */
+    key = DFD_CFG_KEY(cfg_item_id, index1, index2);
+    rv = dfd_ko_cfg_add_i2c_dev_item(key, member, value, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    return 0;
+}
+
+/* String to enumeration value */
+static int dfd_ko_cfg_get_enum_value_by_str(char *enum_val_str[], int enum_val_end, char *buf)
+{
+    int i;
+    int enum_val;
+
+    enum_val = DFD_CFG_INVALID_VALUE;
+    for (i = 0; i < enum_val_end; i++) {
+        if (memcmp(buf, enum_val_str[i], strlen(enum_val_str[i])) == 0) {
+            enum_val = i;
+            break;
+        }
+    }
+
+    return enum_val;
+}
+
+/* Obtain the info_ctrl_t member */
+static int dfd_ko_cfg_get_info_ctrl_member(char *member_str, info_ctrl_mem_t *member, int line_num)
+{
+    info_ctrl_mem_t mem_index;
+
+    for (mem_index = INFO_CTRL_MEM_MODE; mem_index < INFO_CTRL_MEM_END; mem_index++) {
+        if (memcmp(member_str, g_info_ctrl_mem_str[mem_index],
+                strlen(g_info_ctrl_mem_str[mem_index])) == 0) {
+            *member =  mem_index;
+            return 0;
+        }
+    }
+
+    DBG_DEBUG(DBG_ERROR, "line%d: info ctrl member[%s] invalid\n", line_num, member_str);
+    return -1;
+}
+
+/* Set the info_ctrl member value */
+static void dfd_ko_cfg_set_info_ctrl_mem_value(info_ctrl_t *info_ctrl, info_ctrl_mem_t member,
+                char *buf_val, int line_num)
+{
+    switch (member) {
+    case INFO_CTRL_MEM_MODE:
+        info_ctrl->mode = dfd_ko_cfg_get_enum_value_by_str(g_info_ctrl_mode_str,
+                              INFO_CTRL_MODE_END, buf_val);
+        break;
+    case INFO_CTRL_MEM_INT_CONS:
+        dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->int_cons), line_num);
+        break;
+    case INFO_CTRL_MEM_SRC:
+        info_ctrl->src = dfd_ko_cfg_get_enum_value_by_str(g_info_src_str, INFO_SRC_END, buf_val);
+        break;
+    case INFO_CTRL_MEM_FRMT:
+        info_ctrl->frmt = dfd_ko_cfg_get_enum_value_by_str(g_info_frmt_str, INFO_FRMT_END, buf_val);
+        break;
+    case INFO_CTRL_MEM_POLA:
+        info_ctrl->pola = dfd_ko_cfg_get_enum_value_by_str(g_info_pola_str, INFO_POLA_END, buf_val);
+        break;
+    case INFO_CTRL_MEM_FPATH:
+        mem_clear(info_ctrl->fpath, sizeof(info_ctrl->fpath));
+        strlcpy(info_ctrl->fpath, buf_val, sizeof(info_ctrl->fpath));
+        break;
+    case INFO_CTRL_MEM_ADDR:
+        dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->addr), line_num);
+        break;
+    case INFO_CTRL_MEM_LEN:
+        dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->len), line_num);
+        break;
+    case INFO_CTRL_MEM_BIT_OFFSET:
+        dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->bit_offset), line_num);
+        break;
+    case INFO_CTRL_MEM_STR_CONS:
+        mem_clear(info_ctrl->str_cons, sizeof(info_ctrl->str_cons));
+        strlcpy(info_ctrl->str_cons, buf_val, sizeof(info_ctrl->str_cons));
+        break;
+    case INFO_CTRL_MEM_INT_EXTRA1:
+        dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->int_extra1), line_num);
+        break;
+    case INFO_CTRL_MEM_INT_EXTRA2:
+        dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->int_extra2), line_num);
+        break;
+    case INFO_CTRL_MEM_INT_EXTRA3:
+        dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->int_extra3), line_num);
+        break;
+    default:
+        break;
+    }
+}
+
+/* ADD A CONFIGURATION ITEM */
+static int dfd_ko_cfg_add_info_ctrl_item(uint64_t key, info_ctrl_mem_t member, char *buf_val,
+            int line_num)
+{
+    int rv;
+    info_ctrl_t *info_ctrl_cfg;
+
+    info_ctrl_cfg = lnode_find_node(&dfd_ko_cfg_list_root, key);
+    if (info_ctrl_cfg == NULL) {
+        /* Node does not exist,kmalloc new node */
+        info_ctrl_cfg = (info_ctrl_t *)kmalloc(sizeof(info_ctrl_t), GFP_KERNEL);
+        if (info_ctrl_cfg == NULL) {
+            DBG_DEBUG(DBG_ERROR, "line%d: kmalloc info_ctrl fail\n", line_num);
+            return -1;
+        }
+        mem_clear(info_ctrl_cfg, sizeof(info_ctrl_t));
+
+        /* Add to linked list */
+        dfd_ko_cfg_set_info_ctrl_mem_value(info_ctrl_cfg, member, buf_val, line_num);
+        rv = lnode_insert_node(&dfd_ko_cfg_list_root, key, info_ctrl_cfg);
+        if (rv == 0) {
+            DBG_DEBUG(DBG_VERBOSE, "line%d: add info_ctrl item[%s=%s] success, key=0x%08llx\n",
+                line_num, g_info_ctrl_mem_str[member], buf_val, key);
+        } else {
+            kfree(info_ctrl_cfg);
+            info_ctrl_cfg = NULL;
+            DBG_DEBUG(DBG_ERROR, "line%d: add info_ctrl item[%s=%s] fail, key=0x%08llx rv=%d\n",
+                line_num, g_info_ctrl_mem_str[member], buf_val, key, rv);
+            return -1;
+        }
+    } else {
+        /* If the node already exists, modify the configuration value */
+        DBG_DEBUG(DBG_VERBOSE, "line%d: replace info_ctrl item[%s=%s], key=0x%08llx\n",
+            line_num, g_info_ctrl_mem_str[member], buf_val, key);
+        dfd_ko_cfg_set_info_ctrl_mem_value(info_ctrl_cfg, member, buf_val, line_num);
+    }
+
+    return 0;
+}
+
+/* Parse the configuration of info_ctrl_t */
+static int dfd_ko_cfg_analyse_info_ctrl_item(dfd_cfg_item_id_t cfg_item_id, char *arg_name,
+               char *arg_value, char *cfg_pre, index_range_t *index_range, int line_num)
+{
+    int rv;
+    int index1 = 0, index2 = 0;
+    uint64_t key;
+    char *arg_name_tmp;
+    info_ctrl_mem_t member;
+
+    /* Parsing structure member */
+    arg_name_tmp = arg_name + strlen(cfg_pre);
+    rv = dfd_ko_cfg_get_info_ctrl_member(arg_name_tmp, &member, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    /* Get index value */
+    if (index_range->index1_max != INDEX_NOT_EXIST) {
+        arg_name_tmp += strlen(g_info_ctrl_mem_str[member]);
+        rv = dfd_ko_cfg_get_index(arg_name_tmp, index_range, &index1, &index2, line_num);
+        if (rv < 0) {
+            return -1;
+        }
+    }
+
+    /* ADD A CONFIGURATION ITEM */
+    key = DFD_CFG_KEY(cfg_item_id, index1, index2);
+    rv = dfd_ko_cfg_add_info_ctrl_item(key, member, arg_value, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    return 0;
+}
+
+/* Parsing configuration */
+static int dfd_ko_cfg_analyse_config(char *arg_name, char*arg_value, int line_num)
+{
+    int i, rv = 0;
+    int cfg_item_num;
+
+    cfg_item_num = sizeof(dfd_cfg_item_name) / sizeof(dfd_cfg_item_name[0]);
+    for (i = 0; i < cfg_item_num; i++) {
+        if (memcmp(arg_name, dfd_cfg_item_name[i], strlen(dfd_cfg_item_name[i])) == 0){
+            if (DFD_CFG_ITEM_IS_INT(i)) {
+                rv = dfd_ko_cfg_analyse_int_item(i, arg_name, arg_value, dfd_cfg_item_name[i],
+                    &(dfd_cfg_item_index_range[i]), line_num);
+            } else if (DFD_CFG_ITEM_IS_STRING(i)) {
+                rv = dfd_ko_cfg_analyse_str_item(i, arg_name, arg_value, dfd_cfg_item_name[i],
+                    &(dfd_cfg_item_index_range[i]), line_num);
+            } else if (DFD_CFG_ITEM_IS_I2C_DEV(i)) {
+                rv = dfd_ko_cfg_analyse_i2c_dev_item(i, arg_name, arg_value, dfd_cfg_item_name[i],
+                    &(dfd_cfg_item_index_range[i]), line_num);
+            } else if (DFD_CFG_ITEM_IS_INFO_CTRL(i)) {
+                rv = dfd_ko_cfg_analyse_info_ctrl_item(i, arg_name, arg_value, dfd_cfg_item_name[i],
+                    &(dfd_cfg_item_index_range[i]), line_num);
+            } else {
+                rv = -1;
+            }
+            break;
+        }
+    }
+
+    return rv;
+}
+
+/* Cut the configuration row with '=' */
+static int dfd_ko_cfg_cut_config_line(char *config_line, char *arg_name, char *arg_value)
+{
+    int i, j = 0, k = 0;
+    int len, name_value_flag = 0;
+
+    len = strlen(config_line);
+    for (i = 0; i < len; i++) {
+        if (config_line[i] == '=') {
+            name_value_flag = 1;
+            continue;
+        }
+
+        /* Data before and after cutting equal sign */
+        if (name_value_flag == 0) {
+            arg_name[j++] = config_line[i];
+        } else {
+            arg_value[k++] = config_line[i];
+        }
+    }
+
+    /* Failed to return if the equal sign does not exist */
+    if (name_value_flag == 0) {
+        return -1;
+    } else {
+        return 0;
+    }
+}
+
+/* Parse configuration row */
+static int dfd_ko_cfg_analyse_config_line(char *config_line, int line_num)
+{
+    int rv;
+    char arg_name[DFD_CFG_NAME_MAX_LEN] = {0};
+    char arg_value[DFD_CFG_VALUE_MAX_LEN] = {0};
+
+    /* Remove all Spaces from the configuration line */
+    dfd_ko_cfg_del_space_lf_cr(config_line);
+
+    /* Blank line */
+    if (strlen(config_line) == 0) {
+        DBG_DEBUG(DBG_VERBOSE, "line%d: space line\n", line_num);
+        return 0;
+    }
+
+    /* Comment line */
+    if (config_line[0] == '#') {
+        DBG_DEBUG(DBG_VERBOSE, "line%d: comment line[%s]\n", line_num, config_line);
+        return 0;
+    }
+
+    /* Look for the '=' character after the line argument and record its position */
+    rv = dfd_ko_cfg_cut_config_line(config_line, arg_name, arg_value);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_VERBOSE, "line%d: [%s]no '=' between name and value\n",
+            line_num, config_line);
+        return -1;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "line%d: config_line[%s] name[%s] value[%s]\n",
+        line_num, config_line, arg_name, arg_value);
+    return dfd_ko_cfg_analyse_config(arg_name, arg_value, line_num);
+}
+
+/* Parse configuration file */
+static int dfd_ko_cfg_analyse_config_file(char *fpath)
+{
+    int rv;
+    int line_num = 1;
+    kfile_ctrl_t kfile_ctrl;
+    char config_line[DFD_CFG_CMDLINE_MAX_LEN] = {0};
+
+    rv = kfile_open(fpath, &kfile_ctrl);
+    if (rv != KFILE_RV_OK) {
+        DBG_DEBUG(DBG_ERROR, "open config file[%s] fail, rv=%d\n", fpath, rv);
+        return -1;
+    }
+
+    /* Parse the configuration rows line by line */
+    while (kfile_gets(config_line, sizeof(config_line), &kfile_ctrl) > 0) {
+        rv = dfd_ko_cfg_analyse_config_line(config_line, line_num++);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "!!!!file[%s] config line[%d %s] analyse fail\n",
+                fpath, line_num - 1, config_line);
+            break;
+        }
+
+        (void)mem_clear(config_line, sizeof(config_line));
+
+    }
+    kfile_close(&kfile_ctrl);
+
+    return rv;
+}
+
+/**
+ * dfd_ko_cfg_get_item - Get configuration item
+ * @key: node key
+ *
+ * @returns: NULL configuration item does not exist, other configuration items are successful
+ */
+void *dfd_ko_cfg_get_item(uint64_t key)
+{
+    return lnode_find_node(&dfd_ko_cfg_list_root, key);
+}
+
+/* Print configuration item */
+static void dfd_ko_cfg_print_item(uint64_t key, const void *cfg)
+{
+    int item_id;
+    dfd_i2c_dev_t *i2c_dev;
+    info_ctrl_t *info_ctrl;
+
+    if (cfg == NULL) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error\n");
+        return;
+    }
+    printk(KERN_INFO "**************************\n");
+    printk(KERN_INFO "key=0x%08llx\n", key);
+
+    item_id = DFD_CFG_ITEM_ID(key);
+    if (DFD_CFG_ITEM_IS_INT(item_id)) {
+        printk(KERN_INFO "int=%d\n", *((int *)cfg));
+    } else if (DFD_CFG_ITEM_IS_I2C_DEV(item_id)) {
+        i2c_dev = (dfd_i2c_dev_t *)cfg;
+        printk(KERN_INFO ".bus=0x%02x\n", i2c_dev->bus);
+        printk(KERN_INFO ".addr=0x%02x\n", i2c_dev->addr);
+    } else if (DFD_CFG_ITEM_IS_INFO_CTRL(item_id)) {
+        info_ctrl = (info_ctrl_t *)cfg;
+        printk(KERN_INFO ".mode=%s\n", g_info_ctrl_mode_str[info_ctrl->mode]);
+        printk(KERN_INFO ".int_cons=%d\n", info_ctrl->int_cons);
+        printk(KERN_INFO ".src=%s\n", g_info_src_str[info_ctrl->src]);
+        printk(KERN_INFO ".frmt=%s\n", g_info_frmt_str[info_ctrl->frmt]);
+        printk(KERN_INFO ".pola=%s\n", g_info_pola_str[info_ctrl->pola]);
+        printk(KERN_INFO ".fpath=%s\n", info_ctrl->fpath);
+        printk(KERN_INFO ".addr=0x%02x\n", info_ctrl->addr);
+        printk(KERN_INFO ".len=%d\n", info_ctrl->len);
+        printk(KERN_INFO ".bit_offset=%d\n", info_ctrl->bit_offset);
+    } else {
+        printk(KERN_INFO "item[%d] error!\n", item_id);
+    }
+}
+
+/**
+ * dfd_ko_cfg_show_item - Display configuration items
+ * @key: node key
+ */
+void dfd_ko_cfg_show_item(uint64_t key)
+{
+    void *cfg;
+
+    cfg = lnode_find_node(&dfd_ko_cfg_list_root, key);
+    if (cfg == 0) {
+        printk(KERN_INFO "item[0x%08llx] not exist\n", key);
+        return;
+    }
+
+    dfd_ko_cfg_print_item(key, cfg);
+}
+
+/* x86 devices get the card type method */
+static int dfd_get_my_dev_type_by_file(void)
+{
+    struct file *fp;
+    loff_t pos;
+    int card_type;
+    char buf[DFD_PID_BUF_LEN];
+    int ret;
+
+    fp= filp_open(DFD_PUB_CARDTYPE_FILE, O_RDONLY, 0);
+    if (IS_ERR(fp)) {
+        DBG_DEBUG(DBG_VERBOSE, "open file fail!\n");
+        return -1;
+    }
+
+    mem_clear(buf, DFD_PID_BUF_LEN);
+    pos = 0;
+    ret = kernel_read(fp, buf, DFD_PRODUCT_ID_LENGTH + 1, &pos);
+    if (ret < 0) {
+        DBG_DEBUG(DBG_VERBOSE, "kernel_read failed, path=%s, addr=0, size=%d, ret=%d\n",
+            DFD_PUB_CARDTYPE_FILE, DFD_PRODUCT_ID_LENGTH + 1, ret);
+        filp_close(fp, NULL);
+        return -1;
+    }
+
+    card_type = simple_strtoul(buf, NULL, 0);
+    DBG_DEBUG(DBG_VERBOSE, "card_type 0x%x.\n", card_type);
+
+    filp_close(fp, NULL);
+    return card_type;
+}
+
+/**
+ * drv_get_my_dev_type - Get device type
+ *
+ * return: Return the corresponding value
+ *
+ */
+static int drv_get_my_dev_type(void)
+{
+    static int type = -1;
+
+    if (type > 0) {
+        return type;
+    }
+    type = dfd_get_my_dev_type_by_file();
+    DBG_DEBUG(DBG_VERBOSE, "ko board type %d\n", type);
+    return type;
+}
+
+static int dfd_ko_cfg_init(void)
+{
+    int rv;
+    int card_type;
+    char file_name[32] = {0};
+    char fpath[128] = {0};
+    kfile_ctrl_t kfile_ctrl;
+
+    /* Initializes the list root node */
+    rv = lnode_init_root(&dfd_ko_cfg_list_root);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "init list root fail, rv=%d\n", rv);
+        return -1;
+    }
+
+    /* Gets the card type */
+    card_type = drv_get_my_dev_type();
+    if (card_type < 0) {
+        DBG_DEBUG(DBG_ERROR, "get my dev type fail, rv=%d\n", card_type);
+        return -1;
+    }
+
+    /* Read the required profile name for the corresponding board type */
+    snprintf(fpath, sizeof(fpath), "%s0x%x", DFD_KO_FILE_NAME_DIR, card_type);
+    rv = kfile_open(fpath, &kfile_ctrl);
+    if (rv != KFILE_RV_OK) {
+        DBG_DEBUG(DBG_ERROR, "open config file[%s] fail, rv=%d\n", fpath, rv);
+        return -1;
+    }
+
+    /* Multiple profiles are supported */
+    while (kfile_gets(file_name, sizeof(file_name), &kfile_ctrl) > 0) {
+        /* Read configuration file */
+        dfd_ko_cfg_del_space_lf_cr(file_name);
+        snprintf(fpath, sizeof(fpath), "%s%s.cfg", DFD_KO_CFG_FILE_DIR, file_name);
+        DBG_DEBUG(DBG_VERBOSE, ">>>>start parsing config file[%s]\n", fpath);
+
+        /* Description Failed to parse the configuration file */
+        rv = dfd_ko_cfg_analyse_config_file(fpath);
+        if (rv < 0) {
+            break;
+        }
+    }
+    kfile_close(&kfile_ctrl);
+
+    /* todo Configure data validity check */
+    return 0;
+}
+
+/**
+ * dfd_dev_cfg_init - Module initialization
+ *
+ * @returns: <0 Fail, or succeed
+ */
+int32_t dfd_dev_cfg_init(void)
+{
+    return dfd_ko_cfg_init();
+}
+
+/**
+ * dfd_dev_cfg_init - Module exit
+ *
+ * @returns: void
+ */
+
+void dfd_dev_cfg_exit(void)
+{
+    lnode_free_list(&dfd_ko_cfg_list_root);
+    val_convert_node_lst_free(&dfd_lib_cfg_led_status_decode_conv_lst);
+    val_convert_node_lst_free(&dfd_lib_cfg_fan_name_conv_dir_lst);
+    val_convert_node_lst_free(&dfd_lib_cfg_power_name_conv_lst);
+    return;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg_adapter.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg_adapter.c
new file mode 100644
index 000000000000..c4c273059b11
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg_adapter.c
@@ -0,0 +1,654 @@
+/*
+ * An dfd_cfg_adapter driver for cfg of adapter devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/fs.h>
+#include <linux/slab.h>
+#include <asm/unistd.h>
+#include <asm/uaccess.h>
+#include <linux/types.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/uio.h>
+#include "wb_module.h"
+#include "dfd_cfg_file.h"
+#include "dfd_cfg.h"
+#include "dfd_cfg_adapter.h"
+
+/* dfd_i2c_dev_t member string */
+char *g_dfd_i2c_dev_mem_str[DFD_I2C_DEV_MEM_END] = {
+    ".bus",
+    ".addr",
+};
+
+static dfd_i2c_dev_t* dfd_ko_get_cpld_i2c_dev(int sub_slot, int cpld_id)
+{
+    uint64_t key;
+    dfd_i2c_dev_t *i2c_dev;
+
+    /* Read configuration value */
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_CPLD_I2C_DEV, sub_slot, cpld_id);
+    i2c_dev = dfd_ko_cfg_get_item(key);
+    if (i2c_dev == NULL) {
+        DBG_DEBUG(DBG_ERROR, "get cpld[%d] i2c dev config fail, key_name=%s\n",
+            cpld_id, key_to_name(DFD_CFG_ITEM_CPLD_I2C_DEV));
+        return NULL;
+    }
+
+    return i2c_dev;
+}
+
+static int dfd_ko_i2c_block_read(int bus, int addr, int offset, uint8_t *buf, uint32_t size)
+{
+    struct file *fp;
+    struct i2c_client client;
+    int i;
+    int rv = 0;
+    char i2c_path[32];
+
+    mem_clear(i2c_path, 32);
+    snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", bus);
+
+    fp = filp_open(i2c_path, O_RDWR, S_IRUSR | S_IWUSR);
+    if (IS_ERR(fp)) {
+        DBG_DEBUG(DBG_ERROR, "i2c open fail.\n");
+        return -1;
+    }
+    memcpy(&client, fp->private_data, sizeof(struct i2c_client));
+    client.addr = addr;
+
+    if (i2c_check_functionality(client.adapter, I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
+        for (i = 0; i < size; i += 32) {
+                rv = i2c_smbus_read_i2c_block_data(&client, offset + i, WB_MIN(32, size-i), buf + i);
+            if (rv < 0) {
+                DBG_DEBUG(DBG_ERROR, "i2c_block read failed, rv = %d\n", rv);
+                rv = -DFD_RV_DEV_FAIL;
+                goto out;
+            }
+            if (rv != 32) {
+                break;
+            }
+        }
+        rv = DFD_RV_OK;
+    } else {
+        rv = -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+out:
+    filp_close(fp, NULL);
+    return rv;
+}
+
+static int32_t dfd_ko_i2c_smbus_transfer(int read_write, int bus, int addr, int offset, uint8_t *buf, uint32_t size)
+{
+    int rv;
+    struct i2c_adapter *i2c_adap;
+    union i2c_smbus_data data;
+
+    i2c_adap = i2c_get_adapter(bus);
+    if (i2c_adap == NULL) {
+        DBG_DEBUG(DBG_ERROR, "get i2c bus[%d] adapter fail\n", bus);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    /* Operation i2c */
+    if (read_write == I2C_SMBUS_WRITE) {
+        data.byte = *buf;
+    } else {
+        data.byte = 0;
+    }
+    rv = i2c_smbus_xfer(i2c_adap, addr, 0, read_write, offset, I2C_SMBUS_BYTE_DATA, &data);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "i2c dev[bus=%d addr=0x%x offset=0x%x size=%d rw=%d] transfer fail, rv=%d\n",
+            bus, addr, offset, size, read_write, rv);
+        rv = -DFD_RV_DEV_FAIL;
+    } else {
+        DBG_DEBUG(DBG_VERBOSE, "i2c dev[bus=%d addr=0x%x offset=0x%x size=%d rw=%d] transfer success\n",
+            bus, addr, offset, size, read_write);
+        rv = DFD_RV_OK;
+    }
+
+    if (read_write == I2C_SMBUS_READ) {
+        if (rv == DFD_RV_OK) {
+            *buf = data.byte;
+        } else {
+            *buf = 0;
+        }
+    }
+
+    i2c_put_adapter(i2c_adap);
+    return rv;
+}
+
+static int32_t dfd_ko_i2c_read_bulk_data(int bus, int addr, int offset, uint8_t *buf, uint32_t size)
+{
+    int i, rv;
+    for (i = 0; i < DFD_KO_CPLD_I2C_RETRY_TIMES; i++) {
+        rv = dfd_ko_i2c_block_read(bus, addr, offset, buf, size);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "[%d] read[offset=0x%x] fail, rv %d\r\n", i, addr, rv);
+            msleep(DFD_KO_CPLD_I2C_RETRY_SLEEP);
+        } else {
+            DBG_DEBUG(DBG_VERBOSE, "[%d] read[offset=0x%x] success\r\n",
+                i, addr);
+            break;
+        }
+    }
+    return rv;
+}
+
+static int32_t dfd_ko_i2c_read_data(int bus, int addr, int offset, uint8_t *buf, uint32_t size)
+{
+    int i, rv;
+    for (i = 0; i < DFD_KO_CPLD_I2C_RETRY_TIMES; i++) {
+        rv = dfd_ko_i2c_smbus_transfer(I2C_SMBUS_READ, bus, addr, offset, buf, size);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "[%d]cpld read[offset=0x%x] fail, rv %d\n", i, addr, rv);
+            msleep(DFD_KO_CPLD_I2C_RETRY_SLEEP);
+        } else {
+            DBG_DEBUG(DBG_VERBOSE, "[%d]cpld read[offset=0x%x] success, value=0x%x\n",
+                i, addr, *buf);
+            break;
+        }
+    }
+    return rv;
+}
+
+static int32_t dfd_ko_i2c_write_data(int bus, int addr, int offset, uint8_t data, uint32_t size)
+{
+    int i, rv;
+    for (i = 0; i < DFD_KO_CPLD_I2C_RETRY_TIMES; i++) {
+        rv = dfd_ko_i2c_smbus_transfer(I2C_SMBUS_WRITE, bus, addr, offset, &data, size);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "[%d]cpld write[offset=0x%x] fail, rv=%d\n", i, addr, rv);
+            msleep(DFD_KO_CPLD_I2C_RETRY_SLEEP);
+        } else {
+            DBG_DEBUG(DBG_VERBOSE, "[%d]cpld write[offset=0x%x, data=%d] success\n", i, addr, data);
+            break;
+        }
+    }
+
+    return rv;
+}
+
+/**
+ * dfd_ko_cpld_i2c_read - cpld read operation
+ * @offset: Offset address
+ * @buf: data
+ *
+ * @returns: <0 Failure, other success
+ */
+static int32_t dfd_ko_cpld_i2c_read(int32_t addr, uint8_t *buf)
+{
+    int rv;
+    int sub_slot, cpld_id, cpld_addr;
+    dfd_i2c_dev_t *i2c_dev;
+
+    if (buf == NULL) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error\n");
+        return -DFD_RV_INDEX_INVALID;
+    }
+
+    /* Obtain the i2c device bus addr */
+    sub_slot = DFD_KO_CPLD_GET_SLOT(addr);
+    cpld_id = DFD_KO_CPLD_GET_ID(addr);
+    cpld_addr = DFD_KO_CPLD_GET_INDEX(addr);
+
+    i2c_dev = dfd_ko_get_cpld_i2c_dev(sub_slot, cpld_id);
+    if (i2c_dev == NULL) {
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+    rv = dfd_ko_i2c_read_data(i2c_dev->bus, i2c_dev->addr, cpld_addr, buf, sizeof(uint8_t));
+
+    return rv;
+}
+
+/**
+ * dfd_ko_cpld_i2c_write - cpld WRITE OPERATION
+ * @offset: Offset address
+ * @buf: data
+ *
+ * @returns: <0 Failure, other success
+ */
+static int32_t dfd_ko_cpld_i2c_write(int32_t addr, uint8_t data)
+{
+    int rv;
+    int sub_slot, cpld_id, cpld_addr;
+    dfd_i2c_dev_t *i2c_dev;
+
+    /* Obtain the i2c device bus addr */
+    sub_slot = DFD_KO_CPLD_GET_SLOT(addr);
+    cpld_id = DFD_KO_CPLD_GET_ID(addr);
+    cpld_addr = DFD_KO_CPLD_GET_INDEX(addr);
+
+    i2c_dev = dfd_ko_get_cpld_i2c_dev(sub_slot, cpld_id);
+    if (i2c_dev == NULL) {
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    rv = dfd_ko_i2c_write_data(i2c_dev->bus, i2c_dev->addr, cpld_addr, data, sizeof(uint8_t));
+
+    return rv;
+}
+
+#ifdef CONFIG_X86
+/**
+ * dfd_ko_cpld_io_read - cpld io spatial read operation
+ * @offset: address
+ * @buf: data
+ *
+ * @returns: <0 Failure, other success
+ */
+static int32_t dfd_ko_cpld_io_read(int32_t addr, uint8_t *buf)
+{
+    uint64_t key;
+    int cpld_id, sub_slot, offset;
+    int *tmp;
+    uint16_t io_port;
+
+    sub_slot = DFD_KO_CPLD_GET_SLOT(addr);
+    cpld_id = DFD_KO_CPLD_GET_ID(addr);
+    offset = DFD_KO_CPLD_GET_INDEX(addr);
+
+    /* int Type configuration item */
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_CPLD_LPC_DEV, sub_slot, cpld_id);
+    tmp = dfd_ko_cfg_get_item(key);
+    if (tmp == NULL) {
+        DBG_DEBUG(DBG_ERROR,"get cpld io base config fail, key_name=%s\n",
+            key_to_name(DFD_CFG_ITEM_CPLD_LPC_DEV));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    io_port = (u16)(*tmp) + offset;
+    *buf = inb(io_port);
+    DBG_DEBUG(DBG_VERBOSE, "read cpld io port addr 0x%x, data 0x%x\n", io_port, *buf);
+
+    return DFD_RV_OK;
+
+}
+#endif
+
+#ifdef CONFIG_X86
+/**
+ * dfd_ko_cpld_io_write - cpld io space WRITE OPERATION
+ * @addr: address
+ * @data: data
+ *
+ * @returns: <0 Failure, other success
+ */
+static int32_t dfd_ko_cpld_io_write(int32_t addr, uint8_t data)
+{
+    uint64_t key;
+    int cpld_id, sub_slot, offset;
+    int *tmp;
+    uint16_t io_port;
+
+    sub_slot = DFD_KO_CPLD_GET_SLOT(addr);
+    cpld_id = DFD_KO_CPLD_GET_ID(addr);
+    offset = DFD_KO_CPLD_GET_INDEX(addr);
+
+    /* int Type configuration item */
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_CPLD_LPC_DEV, sub_slot, cpld_id);
+    tmp = dfd_ko_cfg_get_item(key);
+    if (tmp == NULL) {
+        DBG_DEBUG(DBG_ERROR, "get cpld io base config fail, key_name=%s\n",
+            key_to_name(DFD_CFG_ITEM_CPLD_LPC_DEV));
+        return -1;
+    }
+
+    io_port = (u16)(*tmp) + offset;
+    DBG_DEBUG(DBG_VERBOSE, "write cpld io port addr 0x%x, data 0x%x\n", io_port, data);
+    outb(data, (u16)io_port);
+
+    return DFD_RV_OK;
+}
+#endif
+
+static int dfd_cfg_get_cpld_mode(int sub_slot, int cpld_id, int *mode)
+{
+    uint64_t key;
+    char *name;
+
+    if (mode == NULL) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error\n");
+        return -DFD_RV_TYPE_ERR;
+    }
+
+    /* string type configuration item */
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_CPLD_MODE, sub_slot, cpld_id);
+    name = dfd_ko_cfg_get_item(key);
+    if (name == NULL) {
+        DBG_DEBUG(DBG_ERROR, "get cpld[%d] mode info ctrl fail, key_name=%s\n",
+            cpld_id, key_to_name(DFD_CFG_ITEM_CPLD_MODE));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "cpld_id %d mode_name %s.\n", cpld_id, name);
+    if (!strncmp(name, DFD_KO_CPLD_MODE_I2C_STRING, strlen(DFD_KO_CPLD_MODE_I2C_STRING))) {
+        *mode = DFD_CPLD_MODE_I2C;
+    } else if (!strncmp(name, DFD_KO_CPLD_MODE_LPC_STRING, strlen(DFD_KO_CPLD_MODE_LPC_STRING))) {
+        *mode = DFD_CPLD_MODE_LPC;
+    } else {
+        /* The default mode is I2C */
+        *mode = DFD_CPLD_MODE_I2C;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "cpld_id %d mode %d.\n", cpld_id, *mode);
+    return 0;
+}
+
+/**
+ * dfd_ko_cpld_read - cpld read operation, read only one byte
+ * @offset: Offset address
+ * @buf: data
+ *
+ * @returns: <0 Failure, other success
+ */
+int32_t dfd_ko_cpld_read(int32_t addr, uint8_t *buf)
+{
+    int ret;
+    int sub_slot, cpld_id;
+    int cpld_mode;
+
+    sub_slot = DFD_KO_CPLD_GET_SLOT(addr);
+    cpld_id = DFD_KO_CPLD_GET_ID(addr);
+    /* cpld mode, including I2C and LPC. Other modes are not supported */
+    ret = dfd_cfg_get_cpld_mode(sub_slot, cpld_id, &cpld_mode);
+    if (ret) {
+        DBG_DEBUG(DBG_WARN, "drv_get_cpld_mode sub_slot %d cpldid %d faile, set default i2c mode.\n", sub_slot, cpld_id);
+        cpld_mode = DFD_CPLD_MODE_I2C;
+    }
+
+    if (cpld_mode == DFD_CPLD_MODE_I2C) {
+        ret = dfd_ko_cpld_i2c_read(addr, buf);
+    } else if (cpld_mode == DFD_CPLD_MODE_LPC) {
+#ifdef CONFIG_X86
+        ret = dfd_ko_cpld_io_read(addr, buf);
+#else
+        DBG_DEBUG(DBG_ERROR, "ERROR:only x86 arch support cpld_mode %d.\n", cpld_mode);
+        ret = -DFD_RV_DEV_NOTSUPPORT;
+#endif
+    } else {
+        DBG_DEBUG(DBG_ERROR, "cpld_mode %d invalid.\n", cpld_mode);
+        ret = -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "addr 0x%x val 0x%x ret %d\n", addr, *buf, ret);
+    return ret;
+}
+
+/**
+ * dfd_ko_cpld_write - cpld WRITE OPERATION Write a byte
+ * @offset: Offset address
+ * @buf: data
+ *
+ * @returns: <0 Failure, other success
+ */
+int32_t dfd_ko_cpld_write(int32_t addr, uint8_t val)
+{
+    int ret;
+    int sub_slot, cpld_id, cpld_mode;
+
+    sub_slot = DFD_KO_CPLD_GET_SLOT(addr);
+    cpld_id = DFD_KO_CPLD_GET_ID(addr);
+
+    ret = dfd_cfg_get_cpld_mode(sub_slot, cpld_id, &cpld_mode);
+    if (ret) {
+        DBG_DEBUG(DBG_ERROR, "drv_get_cpld_mode sub_slot %d cpldid %d faile, set default local_bus mode.\n", sub_slot, cpld_id);
+        cpld_mode = DFD_CPLD_MODE_I2C;
+    }
+
+    if (cpld_mode == DFD_CPLD_MODE_I2C) {
+        ret = dfd_ko_cpld_i2c_write(addr, val);
+    } else if (cpld_mode == DFD_CPLD_MODE_LPC) {
+#ifdef CONFIG_X86
+        ret = dfd_ko_cpld_io_write(addr, val);
+#else
+        DBG_DEBUG(DBG_ERROR, "ERROR:only x86 arch support cpld_mode %d.\n", cpld_mode);
+        ret = -DFD_RV_DEV_NOTSUPPORT;
+#endif
+    } else {
+        DBG_DEBUG(DBG_ERROR, "cpld_mode %d invalid.\n", cpld_mode);
+        ret = -DFD_RV_MODE_INVALID;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "addr 0x%x val 0x%x ret %d\n", addr, val, ret);
+    return ret;
+}
+
+/**
+ * dfd_ko_i2c_read_tmp - I2C read operation
+ * @bus: I2C BUS Device address
+ * @offset:Register offset
+ * @buf:Read buffer
+ * @size:Read length
+ * @returns: <0 Failure, other success
+ */
+static int32_t dfd_ko_i2c_read_tmp(int bus, int addr, int offset, uint8_t *buf, uint32_t size)
+{
+    int i, rv;
+
+    for (i = 0; i < size; i++) {
+        rv = dfd_ko_i2c_read_data(bus, addr, offset, &buf[i], sizeof(uint8_t));
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "dfd_ko_i2c_read_data[bus=%d addr=0x%x offset=0x%x]fail, rv=%d\n",
+                bus, addr, offset, rv);
+            return rv;
+        }
+        offset++;
+    }
+
+    return size;
+}
+
+/**
+ * dfd_ko_i2c_write - I2C  WRITE OPERATION
+ * @bus: I2C BUS
+ * @addr: I2C Device address
+ * @offset:Register offset
+ * @buf: Write buffer
+ * @size:Write length
+ * @returns: <0 Failure, other success
+ */
+int32_t dfd_ko_i2c_write(int bus, int addr, int offset, uint8_t *buf, uint32_t size)
+{
+    int i, rv;
+
+    for (i = 0; i < size; i++) {
+        rv = dfd_ko_i2c_write_data(bus, addr, offset, buf[i], sizeof(uint8_t));
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "dfd_ko_i2c_write[bus=%d addr=0x%x offset=0x%x]fail, rv=%d\n",
+                bus, addr, offset, rv);
+            return rv;
+        }
+        offset++;
+    }
+
+    return size;
+
+}
+
+/**
+ * dfd_ko_read_file - File read operation
+ * @fpath: File path
+ * @addr: address
+ * @val: data
+ * @read_bytes: length
+ *
+ * @returns: <0 Failure, other success
+ */
+int32_t dfd_ko_read_file(char *fpath, int32_t addr, uint8_t *val, int32_t read_bytes)
+{
+    int32_t ret;
+    struct file *filp;
+    loff_t pos;
+
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, read_bytes, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
+    if ((fpath == NULL) || (val == NULL) || (addr < 0) || (read_bytes < 0)) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error, addr=%d read_bytes=%d\n", addr, read_bytes);
+        return -DFD_RV_INDEX_INVALID;
+    }
+
+    /* Open file */
+    filp = filp_open(fpath, O_RDONLY, 0);
+    if (IS_ERR(filp)) {
+        DBG_DEBUG(DBG_ERROR, "open file[%s] fail\n", fpath);
+        return -DFD_RV_DEV_FAIL;
+    }
+    /* Location file */
+    pos = addr;
+    iov_iter_kvec(&iter, ITER_DEST, &iov, 1, iov.iov_len);
+    ret = vfs_iter_read(filp, &iter, &pos, 0);
+    if (ret < 0) {
+        DBG_DEBUG(DBG_ERROR, "vfs_iter_read failed, path=%s, addr=%d, size=%d, ret=%d\n", fpath, addr, read_bytes, ret);
+        ret = -DFD_RV_DEV_FAIL;
+    }
+    filp_close(filp, NULL);
+    return ret;
+}
+
+/**
+ * dfd_ko_other_i2c_dev_read - other_i2c read operation
+ * @addr: address
+ * @val: data
+ * @read_bytes: length
+ *
+ * @returns: <0 Failure, other success
+ */
+int32_t dfd_ko_other_i2c_dev_read(int32_t addr, uint8_t *value, int32_t read_len)
+{
+    uint64_t key;
+    int rv;
+    int e2p_main_id, e2p_index, e2p_addr;
+    dfd_i2c_dev_t *i2c_dev;
+
+    if ((value == NULL) || (read_len <= 0)) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error, read_len=%d\r\n", read_len);
+        return -1;
+    }
+
+    e2p_main_id = DFD_KO_OTHER_I2C_GET_MAIN_ID(addr);
+    e2p_index = DFD_KO_OTHER_I2C_GET_INDEX(addr);
+    e2p_addr = DFD_KO_OTHER_I2C_GET_OFFSET(addr);
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_OTHER_I2C_DEV, e2p_main_id, e2p_index);
+    i2c_dev = dfd_ko_cfg_get_item(key);
+    if (i2c_dev == NULL) {
+        DBG_DEBUG(DBG_ERROR, "psu i2c dev config error, key_name: %s\r\n",
+            key_to_name(DFD_CFG_ITEM_OTHER_I2C_DEV));
+        return -DFD_RV_NODE_FAIL;
+    }
+
+    rv = dfd_ko_i2c_read_bulk_data(i2c_dev->bus, i2c_dev->addr, e2p_addr, value, read_len);
+    DBG_DEBUG(DBG_VERBOSE, "dfd_ko_other_i2c_dev_read, value[0] = 0x%x\n", value[0]);
+    DBG_DEBUG(DBG_VERBOSE, "dfd_ko_other_i2c_dev_read, value[1] = 0x%x\n", value[1]);
+    return rv;
+}
+
+/**
+ * dfd_ko_i2c_read - I2C read operation
+ * @bus: I2C BUS
+ * @addr: I2C Device address
+ * @offset:Register offset
+ * @buf:Read buffer
+ * @size:Read length
+ * @sysfs_name:sysfs attribute name
+ * @returns: <0 Failure, other success
+ */
+int32_t dfd_ko_i2c_read(int bus, int addr, int offset, uint8_t *buf, uint32_t size, const char *sysfs_name)
+{
+    int rv;
+    char sysfs_path[DFD_SYSFS_PATH_MAX_LEN];
+
+    if (buf == NULL) {
+        DBG_DEBUG(DBG_ERROR, "params error, buf is NULL.\n");
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    if (sysfs_name == NULL) {   /* Read in i2c mode */
+        DBG_DEBUG(DBG_VERBOSE, "using i2c_smbus_xfer, bus:%d, addr:0x%x, offset:0x%x, read size:%d.\n",
+            bus, addr, offset, size);
+        rv = dfd_ko_i2c_read_tmp(bus, addr, offset, buf, size);
+    } else {    /* Read by sysfs */
+        mem_clear(sysfs_path, sizeof(sysfs_path));
+        snprintf(sysfs_path, sizeof(sysfs_path), "/sys/bus/i2c/devices/%d-%04x/%s",
+            bus, addr, sysfs_name);
+        DBG_DEBUG(DBG_VERBOSE, "using sysfs, sysfs_path:%s, offset:0x%x, read size:%d.\n",
+            sysfs_path, offset, size);
+        rv = dfd_ko_read_file(sysfs_path, offset, buf, size);
+    }
+
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "dfd_ko_i2c_read failed.\n");
+    } else {
+        DBG_DEBUG(DBG_VERBOSE, "dfd_ko_i2c_read success.\n");
+    }
+
+    return rv;
+}
+
+/**
+ * dfd_ko_write_file - file WRITE OPERATION
+ * @fpath: file path
+ * @addr: address
+ * @val: data
+ * @write_bytes: length
+ *
+ * @returns: <0 Failure, other success
+ */
+int32_t dfd_ko_write_file(char *fpath, int32_t addr, uint8_t *val, int32_t write_bytes)
+{
+    int32_t ret;
+    struct file *filp;
+    loff_t pos;
+
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, write_bytes, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
+    if ((fpath == NULL) || (val == NULL) || (addr < 0) || (write_bytes <= 0)) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error, addr=%d write_bytes=%d\n", addr, write_bytes);
+        return -DFD_RV_INDEX_INVALID;
+    }
+
+     /* Open file */
+    filp = filp_open(fpath, O_RDWR, 777);
+    if (IS_ERR(filp)) {
+        DBG_DEBUG(DBG_ERROR, "open file[%s] fail\n", fpath);
+        return -DFD_RV_DEV_FAIL;
+    }
+    /* Location file */
+    pos = addr;
+    iov_iter_kvec(&iter, ITER_SOURCE, &iov, 1, iov.iov_len);
+    ret = vfs_iter_write(filp, &iter, &pos, 0);
+    if (ret < 0) {
+        DBG_DEBUG(DBG_ERROR,"vfs_iter_write failed, path=%s, addr=%d, size=%d, ret=%d\n", fpath, addr, write_bytes, ret);
+        ret = -DFD_RV_DEV_FAIL;
+    }
+    vfs_fsync(filp, 1);
+    filp_close(filp, NULL);
+    return ret;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg_file.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg_file.c
new file mode 100644
index 000000000000..7164e02d90f2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg_file.c
@@ -0,0 +1,305 @@
+/*
+ * An dfd_cfg_file driver for cfg of file devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <asm/unistd.h>
+#include <asm/uaccess.h>
+#include <linux/stat.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/mm.h>
+#include <linux/types.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+
+#include "dfd_cfg_file.h"
+#include "wb_module.h"
+
+struct getdents_callback {
+    struct dir_context ctx;
+    const char *obj_name;    /* Name to be matched */
+    char *match_name;        /* Matching result */
+    int dir_len;             /* Directory name length */
+    int found;               /* Configuration flag */
+};
+
+/*
+ * Open file
+ * @fname: filename
+ * @kfile_ctrl: File control variable
+ *
+ * @returns: 0 Success, other failure
+ */
+int kfile_open(char *fname, kfile_ctrl_t *kfile_ctrl)
+{
+    int ret;
+    struct file *filp;
+    loff_t pos;
+
+    if ((fname == NULL) || (kfile_ctrl == NULL)) {
+        return KFILE_RV_INPUT_ERR;
+    }
+
+    /* Open file */
+    filp = filp_open(fname, O_RDONLY, 0);
+    if (IS_ERR(filp)) {
+        return KFILE_RV_OPEN_FAIL;
+    }
+
+    kfile_ctrl->size = filp->f_inode->i_size;
+
+    /* Request file size memory */
+    kfile_ctrl->buf = kmalloc(kfile_ctrl->size, GFP_KERNEL);
+    if (kfile_ctrl->buf == NULL) {
+        ret = KFILE_RV_MALLOC_FAIL;
+        goto close_fp;
+    }
+    mem_clear(kfile_ctrl->buf, kfile_ctrl->size);
+    /* Read file contents */
+    pos = 0;
+    ret = kernel_read(filp, kfile_ctrl->buf, kfile_ctrl->size, &pos);
+    if (ret < 0) {
+        ret = KFILE_RV_RD_FAIL;
+        goto free_buf;
+    }
+    /* Set current position */
+    kfile_ctrl->pos = 0;
+
+    ret = KFILE_RV_OK;
+    goto close_fp;
+
+free_buf:
+    kfree(kfile_ctrl->buf);
+    kfile_ctrl->buf = NULL;
+
+close_fp:
+    filp_close(filp, NULL);
+    return ret;
+}
+
+/*
+ * Close file
+ * @kfile_ctrl: File control variable
+ */
+void kfile_close(kfile_ctrl_t *kfile_ctrl)
+{
+    if (kfile_ctrl == NULL) {
+        return;
+    }
+
+    /* Set the file size to 0 to free memory */
+    kfile_ctrl->size = 0;
+    kfile_ctrl->pos = 0;
+    if (kfile_ctrl->buf) {
+        kfree(kfile_ctrl->buf);
+        kfile_ctrl->buf = NULL;
+    }
+}
+
+/*
+ * Get a row
+ * @buf: buf Buffer area
+ * @buf_size: buf size
+ * @kfile_ctrl: File control variable
+ *
+ * @returns: >=0 Success, other failure
+ */
+int kfile_gets(char *buf, int buf_size, kfile_ctrl_t *kfile_ctrl)
+{
+    int i;
+    int has_cr = 0;
+
+    if ((buf == NULL) || (buf_size <= 0) || (kfile_ctrl == NULL) || (kfile_ctrl->buf == NULL)
+            || (kfile_ctrl->size <= 0)) {
+        return KFILE_RV_INPUT_ERR;
+    }
+
+    /* Clear the buf first */
+    mem_clear(buf, buf_size);
+    for (i = 0; i < buf_size; i++) {
+        /* It's at the end of the file */
+        if (kfile_ctrl->pos >= kfile_ctrl->size) {
+            break;
+        }
+
+        /* The previous data is a newline character, and a line has been copied */
+        if (has_cr) {
+            break;
+        }
+
+        /* Search for a newline */
+        if (IS_CR(kfile_ctrl->buf[kfile_ctrl->pos])) {
+            has_cr = 1;
+        }
+
+        /* Copy data */
+        buf[i] = kfile_ctrl->buf[kfile_ctrl->pos];
+        kfile_ctrl->pos++;
+    }
+
+    return i;
+}
+
+/*
+ * Read data
+ * @buf: buf Buffer area
+ * @buf_size: buf size
+ * @kfile_ctrl: File control variable
+ *
+ * @returns: >=0 Success, other failure
+ */
+int kfile_read(int32_t addr, char *buf, int buf_size, kfile_ctrl_t *kfile_ctrl)
+{
+    int i;
+
+    if ((buf == NULL) || (buf_size <= 0) || (kfile_ctrl == NULL) || (kfile_ctrl->buf == NULL)
+            || (kfile_ctrl->size <= 0)) {
+        return KFILE_RV_INPUT_ERR;
+    }
+
+    /* Address check */
+    if ((addr < 0) || (addr >= kfile_ctrl->size)) {
+        return KFILE_RV_ADDR_ERR;
+    }
+
+    /* Clear the buf first */
+    mem_clear(buf, buf_size);
+
+    kfile_ctrl->pos = addr;
+    for (i = 0; i < buf_size; i++) {
+        /* It's at the end of the file */
+        if (kfile_ctrl->pos >= kfile_ctrl->size) {
+            break;
+        }
+
+        /* Copy data */
+        buf[i] = kfile_ctrl->buf[kfile_ctrl->pos];
+        kfile_ctrl->pos++;
+    }
+
+    return i;
+}
+
+static bool kfile_filldir_one(struct dir_context *ctx, const char * name, int len,
+                             loff_t pos, u64 ino, unsigned int d_type)
+{
+    struct getdents_callback *buf;
+    bool result;
+    buf = container_of(ctx, struct getdents_callback, ctx);
+    result = 1;
+    if (strncmp(buf->obj_name, name, strlen(buf->obj_name)) == 0) {
+        if (buf->dir_len < len) {
+            DBG_DEBUG(DBG_ERROR, "match ok. dir name:%s, but buf_len %d small than dir len %d.\n",
+                name, buf->dir_len, len);
+            buf->found = 0;
+            return 0;
+        }
+        mem_clear(buf->match_name, buf->dir_len);
+        memcpy(buf->match_name, name, len);
+        buf->found = 1;
+        result = 0;
+    }
+    return result;
+}
+
+/*
+ * Read data
+ * @buf: buf Buffer area
+ * @buf_size: buf size
+ * @kfile_ctrl: File control variable
+ *
+ * @returns: >=0 Success, other failure
+ */
+int kfile_iterate_dir(const char *dir_path, const char *obj_name, char *match_name, int len)
+{
+    int ret;
+    struct file *dir;
+    struct getdents_callback buffer = {
+        .ctx.actor = kfile_filldir_one,
+    };
+
+    if (!dir_path || !obj_name || !match_name) {
+        DBG_DEBUG(DBG_ERROR, "params error. \n");
+        return KFILE_RV_INPUT_ERR;
+    }
+    buffer.obj_name = obj_name;
+    buffer.match_name = match_name;
+    buffer.dir_len = len;
+    buffer.found = 0;
+    /* Open folde */
+    dir = filp_open(dir_path, O_RDONLY, 0);
+    if (IS_ERR(dir)) {
+        DBG_DEBUG(DBG_ERROR, "filp_open error, dir path:%s\n", dir_path);
+        return KFILE_RV_OPEN_FAIL;
+    }
+    ret = iterate_dir(dir, &buffer.ctx);
+    if (buffer.found) {
+        DBG_DEBUG(DBG_VERBOSE, "match ok, dir name:%s\n", match_name);
+        filp_close(dir, NULL);
+        return DFD_RV_OK;
+    }
+    filp_close(dir, NULL);
+    return -DFD_RV_NODE_FAIL;
+}
+
+#if 0
+/*
+ * Write data
+ * @fname: indicates the file name
+ * @addr: offset address of the file to be written
+ * @buf: Writes data
+ * @buf_size: indicates the data size
+ *
+ * @returns: >=0 Success, others fail
+ */
+int kfile_write(char *fpath, int32_t addr, char *buf, int buf_size)
+{
+    int ret = KFILE_RV_OK;
+    struct file *filp;
+    int wlen;
+
+    if ((fpath == NULL) || (buf == NULL) || (buf_size <= 0)) {
+        return KFILE_RV_INPUT_ERR;
+    }
+
+    /* Address check */
+    if (addr < 0) {
+        return KFILE_RV_ADDR_ERR;
+    }
+
+    /* Open file */
+    filp = filp_open(fpath, O_RDWR, 0);
+    if (IS_ERR(filp)) {
+        return KFILE_RV_OPEN_FAIL;
+    }
+
+    filp->f_op->llseek(filp,0,0);
+    filp->f_pos = addr;
+    /* Write file content */
+    wlen = filp->f_op->write(filp, buf, buf_size, &(filp->f_pos));
+    if (wlen < 0) {
+        ret = KFILE_RV_WR_FAIL;
+    }
+
+    filp->f_op->llseek(filp,0,0);
+    filp_close(filp, NULL);
+
+    return ret;
+}
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg_info.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg_info.c
new file mode 100644
index 000000000000..615285d1c326
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg_info.c
@@ -0,0 +1,929 @@
+/*
+ * An dfd_cfg_info driver for cfg of information devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/slab.h>
+
+#include "wb_module.h"
+#include "dfd_cfg_adapter.h"
+#include "dfd_cfg.h"
+#include "dfd_cfg_info.h"
+#include "dfd_cfg_file.h"
+
+#define DFD_HWMON_NAME              "hwmon"
+
+/* CPLD_VOLATGE_VALUE_MODE1 */
+/* high 8 bit + high 4 bit(bit4-bit7) */
+#define DFD_GET_CPLD_VOLATGE_CODE_VALUE(value)        ((value >> 4)& 0xfff)
+#define DFD_GET_CPLD_VOLATGE_REAL_VALUE(code_val, k)  ((code_val * 16 * 33 * k) / ((65536 - 5000) * 10))
+
+/* CPLD_VOLATGE_VALUE_MODE2 */
+/* high 8 bit + low 4 bit(bit0-bit3) */
+#define DFD_GET_CPLD_VOLATGE_CODE_VALUE2(value)        (((value & 0xff00) >> 4) + (value & 0xf))
+#define DFD_GET_CPLD_VOLATGE_REAL_VALUE2(code_val, k)  ((code_val * 33 * k) / 40950)
+
+typedef enum cpld_volatge_value_s {
+    CPLD_VOLATGE_VALUE_MODE1,
+    CPLD_VOLATGE_VALUE_MODE2,
+} cpld_volatge_value_t;
+
+#define VALID_MAC_TEMP_MAX      (120)
+#define VALID_MAC_TEMP_MIN      (-40)
+#define MAC_TEMP_INVALID        (-99999999)
+
+/* info_ctrl_t member string */
+char *g_info_ctrl_mem_str[INFO_CTRL_MEM_END] = {
+    ".mode",
+    ".int_cons",
+    ".src",
+    ".frmt",
+    ".pola",
+    ".fpath",
+    ".addr",
+    ".len",
+    ".bit_offset",
+    ".str_cons",
+    ".int_extra1",
+    ".int_extra2",
+    ".int_extra3",
+};
+
+/* info_ctrl_mode_t enumeration string */
+char *g_info_ctrl_mode_str[INFO_CTRL_MODE_END] = {
+    "none",
+    "config",
+    "constant",
+    "tlv",
+    "str_constant",
+};
+
+/* info_src_t enumeration string */
+char *g_info_src_str[INFO_SRC_END] = {
+    "none",
+    "cpld",
+    "fpga",
+    "other_i2c",
+    "file",
+};
+
+/* info_frmt_t enumeration string */
+char *g_info_frmt_str[INFO_FRMT_END] = {
+    "none",
+    "bit",
+    "byte",
+    "num_bytes",
+    "num_str",
+    "num_buf",
+    "buf",
+};
+
+/* info_pola_t enumeration string */
+char *g_info_pola_str[INFO_POLA_END] = {
+    "none",
+    "positive",
+    "negative",
+};
+
+/* Read information from the cpld */
+static int dfd_read_info_from_cpld(int32_t addr, int read_bytes, uint8_t *val)
+{
+    int i, rv;
+
+    for (i = 0; i < read_bytes; i++) {
+        rv = dfd_ko_cpld_read(addr, &(val[i]));
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "read info[addr=0x%x read_bytes=%d] from cpld fail, reading_byte=%d rv=%d\n",
+                addr, read_bytes, i, rv);
+            return rv;
+        }
+        addr++;
+    }
+
+    return read_bytes;
+}
+
+/* Write information to the cpld */
+static int dfd_write_info_to_cpld(int32_t addr, int write_bytes, uint8_t *val, uint8_t bit_mask)
+{
+    int rv;
+    uint8_t val_tmp;
+
+    val_tmp = val[0];
+    rv = dfd_ko_cpld_write(addr, val_tmp);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "write info[addr=0x%x val=0x%x] to cpld fail, rv=%d\n", addr, val_tmp, rv);
+        return -1;
+    }
+
+    return 0;
+}
+
+/* Read information from other_i2c */
+static int dfd_read_info_from_other_i2c(int32_t addr, int read_bytes, uint8_t *val)
+{
+    int rv;
+
+    rv = dfd_ko_other_i2c_dev_read(addr, val, read_bytes);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "read info[addr=0x%x read_bytes=%d] from othre i2c fail, rv=%d\r\n",
+            addr, read_bytes, rv);
+        return rv;
+    }
+
+    return read_bytes;
+}
+
+/* Read information */
+static int dfd_read_info(info_src_t src, char *fpath, int32_t addr, int read_bytes, uint8_t *val)
+{
+    int rv = 0;
+
+    /* Read data from different sources */
+    switch (src) {
+    case INFO_SRC_CPLD:
+        rv = dfd_read_info_from_cpld(addr, read_bytes, val);
+        break;
+    case INFO_SRC_FPGA:
+        rv = -1;
+        DBG_DEBUG(DBG_ERROR, "not support read info from fpga\n");
+        break;
+    case INFO_SRC_OTHER_I2C:
+        rv = dfd_read_info_from_other_i2c(addr, read_bytes, val);
+        break;
+    case INFO_SRC_FILE:
+        rv = dfd_ko_read_file(fpath, addr, val, read_bytes);
+        break;
+    default:
+        rv = -1;
+        DBG_DEBUG(DBG_ERROR, "info src[%d] error\n", src);
+        break;
+    }
+
+    return rv;
+}
+
+/* Write message */
+static int dfd_write_info(info_src_t src, char *fpath, int32_t addr, int write_bytes, uint8_t *val, uint8_t bit_mask)
+{
+    int rv = 0;
+
+    /* Write data to separate sources */
+    switch (src) {
+    case INFO_SRC_CPLD:
+        rv = dfd_write_info_to_cpld(addr, write_bytes, val, bit_mask);
+        break;
+    case INFO_SRC_FPGA:
+        rv = -1;
+        DBG_DEBUG(DBG_ERROR, "not support write info to fpga\n");
+        break;
+    case INFO_SRC_OTHER_I2C:
+        rv = -1;
+        DBG_DEBUG(DBG_ERROR, "not support write info to other i2c\n");
+        break;
+    case INFO_SRC_FILE:
+        rv = dfd_ko_write_file(fpath, addr, val, write_bytes);
+        break;
+    default:
+        rv = -1;
+        DBG_DEBUG(DBG_ERROR, "info src[%d] error\n", src);
+        break;
+    }
+
+    return rv;
+}
+
+static int dfd_get_info_value(info_ctrl_t *info_ctrl, int *ret, info_num_buf_to_value_f pfun)
+{
+    int i, rv;
+    int read_bytes, readed_bytes, int_tmp;
+    uint8_t byte_tmp, val[INFO_INT_MAX_LEN + 1] = {0};
+
+    if (info_ctrl->mode == INFO_CTRL_MODE_CONS) {
+        *ret = info_ctrl->int_cons;
+        return DFD_RV_OK;
+    }
+    if (info_ctrl->mode == INFO_CTRL_MODE_TLV) {
+        return INFO_CTRL_MODE_TLV;
+    }
+
+    if (IS_INFO_FRMT_BIT(info_ctrl->frmt)) {
+        if (!INFO_BIT_OFFSET_VALID(info_ctrl->bit_offset)) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl bit_offsest[%d] invalid\n",
+                info_ctrl->bit_offset);
+            return -DFD_RV_TYPE_ERR;
+        }
+        read_bytes = 1;
+    } else if (IS_INFO_FRMT_BYTE(info_ctrl->frmt) || IS_INFO_FRMT_NUM_STR(info_ctrl->frmt)
+            || IS_INFO_FRMT_NUM_BUF(info_ctrl->frmt)) {
+        if (!INFO_INT_LEN_VALAID(info_ctrl->len)) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl len[%d] invalid\n", info_ctrl->len);
+            return -DFD_RV_TYPE_ERR;
+        }
+        read_bytes = info_ctrl->len;
+    } else {
+        DBG_DEBUG(DBG_ERROR, "info ctrl info format[%d] error\n", info_ctrl->frmt);
+        return -DFD_RV_TYPE_ERR;
+    }
+
+    readed_bytes = dfd_read_info(info_ctrl->src, info_ctrl->fpath, info_ctrl->addr, read_bytes, &(val[0]));
+    if (readed_bytes <= 0) {
+        DBG_DEBUG(DBG_ERROR, "read int info[src=%s frmt=%s fpath=%s addr=0x%x read_bytes=%d] fail, rv=%d\n",
+            g_info_src_str[info_ctrl->src], g_info_frmt_str[info_ctrl->frmt], info_ctrl->fpath,
+            info_ctrl->addr, read_bytes, readed_bytes);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    if (IS_INFO_FRMT_BIT(info_ctrl->frmt)) {
+        if (info_ctrl->pola == INFO_POLA_NEGA) {
+            val[0] = ~val[0];
+        }
+        byte_tmp = (val[0] >> info_ctrl->bit_offset) & (~(0xff << info_ctrl->len));
+        if (pfun) {
+            rv = pfun(&byte_tmp, sizeof(byte_tmp), &int_tmp);
+            if (rv < 0) {
+                DBG_DEBUG(DBG_ERROR, "info ctrl bit process fail, rv=%d\n", rv);
+                return rv;
+            }
+        } else {
+            int_tmp = (int)byte_tmp;
+        }
+    } else if (IS_INFO_FRMT_BYTE(info_ctrl->frmt)) {
+        int_tmp = 0;
+        for (i = 0; i < info_ctrl->len; i++) {
+            if (info_ctrl->pola == INFO_POLA_NEGA) {
+                int_tmp |=  val[info_ctrl->len - i - 1];
+            } else {
+                int_tmp |=  val[i];
+            }
+            if (i != (info_ctrl->len - 1)) {
+                int_tmp <<= 8;
+            }
+        }
+    } else if (IS_INFO_FRMT_NUM_STR(info_ctrl->frmt)) {
+        val[readed_bytes] = '\0';
+        int_tmp = simple_strtol((char *)(&(val[0])), NULL, 10);
+    } else {
+        if (pfun == NULL) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl number buf process function is null\n");
+            return -DFD_RV_INDEX_INVALID;
+        }
+        rv = pfun(val, readed_bytes, &int_tmp);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl number buf process fail, rv=%d\n", rv);
+            return rv;
+        }
+    }
+
+    *ret = int_tmp;
+    DBG_DEBUG(DBG_VERBOSE, "read int info[src=%s frmt=%s pola=%s fpath=%s addr=0x%x len=%d bit_offset=%d] success, ret=%d\n",
+            g_info_src_str[info_ctrl->src], g_info_frmt_str[info_ctrl->frmt], g_info_pola_str[info_ctrl->pola],
+            info_ctrl->fpath, info_ctrl->addr, info_ctrl->len, info_ctrl->bit_offset, *ret);
+    return DFD_RV_OK;
+}
+
+/**
+ * dfd_info_get_int - Get int type information
+ * @key: Search keyword of the configuration item
+ * @ret: int type information
+ * @pfun: num buf type data conversion function
+ *
+ * @returns: 0 Success, <0 failure
+ */
+int dfd_info_get_int(uint64_t key, int *ret, info_num_buf_to_value_f pfun)
+{
+    int rv;
+    info_ctrl_t *info_ctrl;
+
+    if (!DFD_CFG_ITEM_IS_INFO_CTRL(DFD_CFG_ITEM_ID(key)) || (ret == NULL)) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error, key=0x%08llx\n", key);
+        return -DFD_RV_INDEX_INVALID;
+    }
+
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_DEBUG(DBG_WARN, "get info ctrl fail, key=0x%08llx\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "get info ctrl value, key=0x%08llx\n", key);
+    rv = dfd_get_info_value(info_ctrl, ret, pfun);
+    return rv;
+}
+
+/**
+ * dfd_info_get_buf - Get buf type information
+ * @key: Search keyword of the configuration item
+ * @buf: information buf
+ * @buf_len: buf length, which must be no less than info_ctrl->len
+ * @pfun: Data conversion function pointer
+ *
+ * @returns: <0 Success, <0 failure
+ */
+int dfd_info_get_buf(uint64_t key, uint8_t *buf, int buf_len, info_buf_to_buf_f pfun)
+{
+    int rv;
+    int read_bytes, buf_real_len;
+    uint8_t buf_tmp[INFO_BUF_MAX_LEN];
+    info_ctrl_t *info_ctrl;
+
+    /* Entry check */
+    if (!DFD_CFG_ITEM_IS_INFO_CTRL(DFD_CFG_ITEM_ID(key)) || (buf == NULL)) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error, key=0x%08llx\n", key);
+        return -DFD_RV_INDEX_INVALID;
+    }
+
+    /* Get the configuration item read and write control variables */
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_DEBUG(DBG_WARN, "get info ctrl fail, key=0x%08llx\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    /* Failed to return the non-configured mode */
+    if (info_ctrl->mode != INFO_CTRL_MODE_CFG) {
+        DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08llx] mode[%d] invalid\n", key, info_ctrl->mode);
+        return -DFD_RV_TYPE_ERR;
+    }
+
+    /* Parameter check */
+    if (!IS_INFO_FRMT_BUF(info_ctrl->frmt) || !INFO_BUF_LEN_VALAID(info_ctrl->len)
+            || (buf_len <= info_ctrl->len)) {
+        DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08llx] format=%d or len=%d invlaid, buf_len=%d\n",
+            key, info_ctrl->frmt, info_ctrl->len, buf_len);
+        return -DFD_RV_TYPE_ERR;
+    }
+
+    /* Read information */
+    read_bytes = dfd_read_info(info_ctrl->src, info_ctrl->fpath, info_ctrl->addr, info_ctrl->len, buf_tmp);
+    if (read_bytes <= 0) {
+        DBG_DEBUG(DBG_ERROR, "read buf info[key=0x%08llx src=%s frmt=%s fpath=%s addr=0x%x len=%d] fail, rv=%d\n",
+            key, g_info_src_str[info_ctrl->src], g_info_frmt_str[info_ctrl->frmt], info_ctrl->fpath,
+            info_ctrl->addr, info_ctrl->len, read_bytes);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    /* Data conversion processing */
+    if (pfun) {
+        buf_real_len = buf_len;
+        rv = pfun(buf_tmp, read_bytes, buf, &buf_real_len);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08llx] buf process fail, rv=%d\n", key, rv);
+            return -DFD_RV_DEV_FAIL;
+        }
+    } else {
+        buf_real_len = read_bytes;
+        memcpy(buf, buf_tmp, read_bytes);
+    }
+
+    return buf_real_len;
+}
+
+/**
+ * dfd_2key_info_get_buf - Get buf type information
+ * @key: indicates the search keyword of the configuration item
+ * @buf: Message buf
+ * @buf_len: indicates the buf length, which must be no less than info_ctrl->len
+ * @pfun: Data conversion function pointer
+ *
+ * @returns: <0 fails, others succeed
+ */
+static int dfd_2key_info_get_buf(info_ctrl_t *info_ctrl, uint8_t *buf, int buf_len, info_hwmon_buf_f pfun)
+{
+    int rv;
+    int read_bytes, buf_real_len;
+    uint8_t buf_tmp[INFO_BUF_MAX_LEN];
+    char fpath[INFO_FPATH_MAX_LEN];
+    int coefficient, addend;
+
+    /* Parameter check */
+    if (!IS_INFO_FRMT_BUF(info_ctrl->frmt) || !INFO_BUF_LEN_VALAID(info_ctrl->len)
+            || (buf_len <= info_ctrl->len)) {
+        DBG_DEBUG(DBG_ERROR, "key_path info ctrl format=%d or len=%d invlaid, buf_len=%d\n",
+            info_ctrl->frmt, info_ctrl->len, buf_len);
+        return -DFD_RV_TYPE_ERR;
+    }
+
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    rv = kfile_iterate_dir(info_ctrl->fpath, DFD_HWMON_NAME, buf_tmp, INFO_BUF_MAX_LEN);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "dir patch:%s, can find name %s dir \n",
+            info_ctrl->fpath, DFD_HWMON_NAME);
+        return -DFD_RV_NO_NODE;
+    }
+    mem_clear(fpath, sizeof(fpath));
+    snprintf(fpath, sizeof(fpath), "%s%s/%s",
+        info_ctrl->fpath, buf_tmp, info_ctrl->str_cons);
+    DBG_DEBUG(DBG_VERBOSE, "match ok path: %s\n", fpath);
+
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    /* Read information */
+    read_bytes = dfd_read_info(info_ctrl->src, fpath, info_ctrl->addr, info_ctrl->len, buf_tmp);
+    if (read_bytes <= 0) {
+        DBG_DEBUG(DBG_ERROR, "read buf info[src: %s frmt: %s fpath: %s addr: 0x%x len: %d] fail, rv=%d\n",
+            g_info_src_str[info_ctrl->src], g_info_src_str[info_ctrl->frmt], fpath,
+            info_ctrl->addr, info_ctrl->len, read_bytes);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    /* Data conversion processing */
+    if (pfun) {
+        buf_real_len = buf_len;
+        coefficient = info_ctrl->int_extra1;
+        addend = info_ctrl->int_extra2;
+        if (coefficient != 0) {
+            rv = pfun(buf_tmp, read_bytes, buf, &buf_real_len, info_ctrl, coefficient, addend);
+        } else {
+            rv = pfun(buf_tmp, read_bytes, buf, &buf_real_len, info_ctrl, 1, addend);
+        }
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl buf process fail, rv=%d\n", rv);
+            return -DFD_RV_DEV_FAIL;
+        }
+    } else {
+        buf_real_len = read_bytes;
+        memcpy(buf, buf_tmp, buf_real_len);
+    }
+    return buf_real_len;
+}
+
+/**
+ * dfd_info_set_int - Set the int type information
+ * @key: Search keyword of the configuration item
+ * @val: int type information
+ *
+ * @returns: 0 succeeds, <0 fails
+ */
+int dfd_info_set_int(uint64_t key, int val)
+{
+    int rv;
+    int write_bytes;
+    uint8_t byte_tmp, bit_mask, val_tmp;
+    info_ctrl_t *info_ctrl;
+    uint8_t *val_buf;
+	
+	val_buf = &byte_tmp;
+    /* Entry check */
+    if (!DFD_CFG_ITEM_IS_INFO_CTRL(DFD_CFG_ITEM_ID(key))) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error, key=0x%08llx\n", key);
+        return -DFD_RV_INDEX_INVALID;
+    }
+
+    /* Get the configuration item read and write control variables */
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_DEBUG(DBG_WARN, "get info ctrl fail, key=0x%08llx\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    /* Non-configuration is not processed */
+    if (info_ctrl->mode != INFO_CTRL_MODE_CFG) {
+        DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08llx] mode[%d] warnning\n", key, info_ctrl->mode);
+        return -DFD_RV_TYPE_ERR;
+    }
+
+    /* Information conversion */
+    if (IS_INFO_FRMT_BIT(info_ctrl->frmt)) {
+        /* Bit offset check */
+        if (!INFO_BIT_OFFSET_VALID(info_ctrl->bit_offset)) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08llx] bit_offsest[%d] invalid\n",
+                key, info_ctrl->bit_offset);
+            return -DFD_RV_TYPE_ERR;
+        }
+
+        /* Write data value conversion */
+        byte_tmp = (uint8_t)(val & 0xff);           /* The minimum 8 bits of data in bit format is valid */
+        byte_tmp <<= info_ctrl->bit_offset;         /* The value is shifted to the corresponding bit */
+        if (info_ctrl->pola == INFO_POLA_NEGA) {    /* Negative polarity data is reversed */
+            byte_tmp = ~byte_tmp;
+        }
+
+        write_bytes = 1;
+        /* Information valid mask */
+        bit_mask = (~(0xff << info_ctrl->len)) << info_ctrl->bit_offset;
+        if (bit_mask != 0xff) {
+            rv = dfd_read_info(info_ctrl->src, info_ctrl->fpath, info_ctrl->addr, write_bytes,
+                    &val_tmp);
+            if (rv < 0) {
+                DBG_DEBUG(DBG_ERROR,
+                    "read original info[src=%d][fpath=%s][addr=0x%x] fail. rv = %d\n",
+                    info_ctrl->src, info_ctrl->fpath, info_ctrl->addr, rv);
+                return -DFD_RV_DEV_FAIL;
+            }
+            val_tmp = (val_tmp & (~bit_mask)) | ((uint8_t)byte_tmp & bit_mask);
+            byte_tmp = val_tmp;
+        }
+    } else if (IS_INFO_FRMT_BYTE(info_ctrl->frmt)) {
+        /* Length check */
+        if (!INFO_INT_LEN_VALAID(info_ctrl->len)) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08llx] len[%d] invalid\n", key, info_ctrl->len);
+            return -DFD_RV_TYPE_ERR;
+        }
+
+        /* XXX There is currently no requirement to set multi-byte int data */
+        write_bytes = 1;
+
+        /* Write data value conversion  */
+        byte_tmp = (uint8_t)(val & 0xff);
+
+        /* Information valid mask */
+        bit_mask = 0xff;
+    } else if (IS_INFO_FRMT_NUM_STR(info_ctrl->frmt)) {
+        val_buf = info_ctrl->str_cons;
+        write_bytes = strlen(info_ctrl->str_cons);
+        if (write_bytes <= 0) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08llx] write num_str: fpath: %s, len[%d] invalid\n",
+                key, info_ctrl->fpath, write_bytes);
+            return -DFD_RV_INVALID_VALUE;
+        }
+        bit_mask = 0xff;
+        DBG_DEBUG(DBG_VERBOSE, "info ctrl[key=0x%08llx], write num_str: fpath: %s, write val: %s, len: %d\n",
+            key, info_ctrl->fpath, val_buf, write_bytes);
+    } else if (IS_INFO_FRMT_NUM_BUF(info_ctrl->frmt)) {
+        /* Length check */
+        if (!INFO_INT_LEN_VALAID(info_ctrl->len)) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08llx] len[%d] invalid\n", key, info_ctrl->len);
+            return -DFD_RV_TYPE_ERR;
+        }
+
+        /* num is converted before buf is set. XXX does not need to set multi-byte int data */
+        write_bytes = 1;
+
+        /* Write data value conversion */
+        byte_tmp = (uint8_t)(val & 0xff);
+
+        /* Information valid mask */
+        bit_mask = 0xff;
+    } else {
+        DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08llx] format[%d] error\n", key, info_ctrl->frmt);
+        return -DFD_RV_TYPE_ERR;
+    }
+
+    /* Write message */
+    rv = dfd_write_info(info_ctrl->src, info_ctrl->fpath, info_ctrl->addr, write_bytes,
+            val_buf, bit_mask);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "write int info[src=%s frmt=%s fpath=%s addr=0x%x len=%d val=%d] fail, rv=%d\n",
+            g_info_src_str[info_ctrl->src], g_info_frmt_str[info_ctrl->frmt], info_ctrl->fpath,
+            info_ctrl->addr, info_ctrl->len, val, rv);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "write int info[src=%s frmt=%s pola=%s fpath=%s addr=0x%x len=%d bit_offset=%d val=%d] success\n",
+            g_info_src_str[info_ctrl->src], g_info_frmt_str[info_ctrl->frmt], g_info_pola_str[info_ctrl->pola],
+            info_ctrl->fpath, info_ctrl->addr, info_ctrl->len, info_ctrl->bit_offset, val);
+    return DFD_RV_OK;
+}
+
+static long dfd_info_reg2data_linear(uint64_t key, int data)
+{
+    s16 exponent;
+    s32 mantissa;
+    long val;
+    info_ctrl_t *info_ctrl;
+
+    /* Get the configuration item read and write control variables */
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_DEBUG(DBG_WARN, "get info ctrl fail, key=0x%08llx\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    switch (info_ctrl->int_extra1) {
+    case LINEAR11:
+        exponent = ((s16)data) >> 11;
+        mantissa = ((s16)((data & 0x7ff) << 5)) >> 5;
+        val = mantissa;
+        val = val * 1000L;
+        break;
+    case LINEAR16:
+        break;
+    default:
+        break;
+    }
+
+    if (DFD_CFG_ITEM_ID(key) == DFD_CFG_ITEM_HWMON_POWER) {
+        val = val * 1000L;
+    }
+
+    if (exponent >= 0) {
+        val <<= exponent;
+    } else {
+        val >>= -exponent;
+    }
+
+    return val;
+}
+
+static long dfd_info_reg2data_tmp464(uint64_t key, int data)
+{
+    s16 tmp_val;
+    long val;
+
+    DBG_DEBUG(DBG_VERBOSE, "reg2data_tmp464, data=%d\n", data);
+
+    /* Positive number:data/8*0.0625 */
+    if (data >= 0) {
+        val = data*625/80;
+    /* Negative number: The first bit is the sign bit and the rest is inverted +1 */
+    } else {
+        tmp_val = ~(data & 0x7ff) + 1;
+        val = tmp_val*625/80;
+    }
+
+    return val;
+}
+
+static long dfd_info_reg2data_mac_th5(uint64_t key, int data)
+{
+    int tmp_val;
+    long val;
+
+    DBG_DEBUG(DBG_VERBOSE, "reg2data_mac_th5, data=0x%d\n", data);
+
+    tmp_val = data >> 4;
+    val = 476359 - (((tmp_val - 2) * 317704) / 2000);
+
+    DBG_DEBUG(DBG_VERBOSE, "reg2data_mac_th5, val=0x%ld\n", val);
+    return val;
+}
+
+static long dfd_info_reg2data_mac_th4(uint64_t key, int data)
+{
+    int tmp_val;
+    int val;
+
+    DBG_DEBUG(DBG_VERBOSE, "reg2data_mac_th4, data=%d\n", data);
+
+    tmp_val = data >> 4;
+    val = 356070 - (((tmp_val - 2) * 237340) / 2000);
+
+    DBG_DEBUG(DBG_VERBOSE, "reg2data_mac_th4, val=%d\n", val);
+    return val;
+}
+
+
+static int dfd_info_get_cpld_voltage(uint64_t key, uint32_t *value)
+{
+    int rv;
+    uint32_t vol_ref_tmp, vol_ref;
+    uint32_t vol_curr_tmp, vol_curr;
+    info_ctrl_t *info_ctrl;
+    info_ctrl_t info_ctrl_tmp;
+    uint32_t vol_coefficient;
+
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_DEBUG(DBG_WARN, "get info ctrl fail, key=0x%08llx\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    vol_coefficient = (uint32_t)info_ctrl->int_extra2;
+
+    rv = dfd_get_info_value(info_ctrl, &vol_curr_tmp, NULL);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "get cpld current voltage error, addr:0x%x, rv = %d\n", info_ctrl->addr, rv);
+        return rv;
+    }
+    if (info_ctrl->int_extra3 == CPLD_VOLATGE_VALUE_MODE2) {
+        vol_curr_tmp = DFD_GET_CPLD_VOLATGE_CODE_VALUE2(vol_curr_tmp);
+        vol_curr = DFD_GET_CPLD_VOLATGE_REAL_VALUE2(vol_curr_tmp, info_ctrl->int_extra2);
+        DBG_DEBUG(DBG_VERBOSE, "vol_curr_tmp = 0x%x, vol_curr = 0x%x, is same.\n", vol_curr_tmp, vol_curr);
+    } else {
+        vol_curr_tmp = DFD_GET_CPLD_VOLATGE_CODE_VALUE(vol_curr_tmp);
+        if (info_ctrl->addr == info_ctrl->int_extra1) {
+        vol_curr = DFD_GET_CPLD_VOLATGE_REAL_VALUE(vol_curr_tmp, vol_coefficient);
+        DBG_DEBUG(DBG_VERBOSE, "current voltage is reference voltage, vol_curr_tmp: 0x%x, coefficient: %u, vol_curr: %u\n",
+            vol_curr_tmp, vol_coefficient, vol_curr);
+        } else {
+            memcpy(&info_ctrl_tmp, info_ctrl, sizeof(info_ctrl_t));
+            info_ctrl_tmp.addr = info_ctrl->int_extra1;
+            rv = dfd_get_info_value(&info_ctrl_tmp, &vol_ref_tmp, NULL);
+            if (rv < 0) {
+                DBG_DEBUG(DBG_ERROR, "get cpld reference voltage error, addr: 0x%x, rv: %d\n", info_ctrl_tmp.addr, rv);
+                return rv;
+            }
+            vol_ref = DFD_GET_CPLD_VOLATGE_CODE_VALUE(vol_ref_tmp);
+            DBG_DEBUG(DBG_VERBOSE, "vol_ref_tmp: 0x%x, vol_ref: 0x%x\n", vol_ref_tmp, vol_ref);
+            vol_curr = (vol_curr_tmp * vol_coefficient) / vol_ref;
+            DBG_DEBUG(DBG_VERBOSE, "vol_curr_tmp: 0x%x, vol_ref: 0x%x, coefficient: %u, vol_curr: %u\n",
+                vol_curr_tmp, vol_ref, vol_coefficient, vol_curr);
+        }
+    }
+    *value = vol_curr;
+    return DFD_RV_OK;
+}
+
+static int dfd_info_get_cpld_temperature(uint64_t key, int *value)
+{
+    int rv;
+    int temp_reg;
+    info_ctrl_t *info_ctrl;
+    long val;
+
+    /* Get the configuration item read and write control variables */
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_DEBUG(DBG_WARN, "get info ctrl fail, key=0x%08llx\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    /* Read the temperature value */
+    rv = dfd_info_get_int(key, &temp_reg, NULL);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "get cpld current temperature error, addr:0x%x, rv =%d\n", info_ctrl->addr, rv);
+        return rv;
+    }
+    DBG_DEBUG(DBG_VERBOSE, "get cpld temp:0x%08x, extra1 0x%x\n", temp_reg, info_ctrl->int_extra1);
+
+    switch (info_ctrl->int_extra1) {
+    case LINEAR11:
+        val = dfd_info_reg2data_linear(key, temp_reg);
+        break;
+    case TMP464:
+        val = dfd_info_reg2data_tmp464(key, temp_reg);
+        break;
+    case MAC_TH5:
+        val = dfd_info_reg2data_mac_th5(key, temp_reg);
+        break;
+    case MAC_TH4:
+        val = dfd_info_reg2data_mac_th4(key, temp_reg);
+        break;
+    default:
+        val = temp_reg;
+        break;
+    }
+
+    if ((val / 1000 < VALID_MAC_TEMP_MIN) || (val / 1000 > VALID_MAC_TEMP_MAX)) {
+        DBG_DEBUG(DBG_ERROR, "mac temp invalid, temp = %ld\n", val);
+        val = MAC_TEMP_INVALID;
+    }
+    DBG_DEBUG(DBG_VERBOSE, "calc temp:%ld \n", val);
+    *value = val;
+
+    return DFD_RV_OK;
+}
+
+static int dfd_info_get_sensor_value(uint64_t key, uint8_t *buf, int buf_len, info_hwmon_buf_f pfun)
+{
+    int rv, buf_real_len;
+    uint32_t value;
+    int temp_value;
+    uint8_t buf_tmp[INFO_BUF_MAX_LEN];
+    info_ctrl_t *info_ctrl;
+
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_DEBUG(DBG_ERROR, "get info ctrl fail, key=0x%08llx\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    if (DFD_CFG_ITEM_ID(key) == DFD_CFG_ITEM_HWMON_IN && info_ctrl->src == INFO_SRC_CPLD) {
+        rv = dfd_info_get_cpld_voltage(key, &value);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "get cpld voltage failed.key=0x%08llx, rv:%d\n", key, rv);
+            return -DFD_RV_DEV_NOTSUPPORT;
+        }
+        DBG_DEBUG(DBG_VERBOSE, "get cpld voltage ok, value:%u\n", value);
+        mem_clear(buf_tmp, sizeof(buf_tmp));
+        snprintf(buf_tmp, sizeof(buf_tmp), "%u\n", value);
+        buf_real_len = strlen(buf_tmp);
+        if (buf_len <= buf_real_len) {
+            DBG_DEBUG(DBG_ERROR, "length not enough.buf_len:%d,need length:%d\n", buf_len, buf_real_len);
+            return -DFD_RV_DEV_FAIL;
+        }
+        if (pfun) {
+            buf_real_len = buf_len;
+            rv = pfun(buf_tmp, strlen(buf_tmp), buf, &buf_real_len, info_ctrl, 1, 0);
+            if (rv < 0) {
+                DBG_DEBUG(DBG_ERROR, "deal date error.org value:%s, buf_len:%d, rv=%d\n",
+                    buf_tmp, buf_len, rv);
+                return -DFD_RV_DEV_NOTSUPPORT;
+            }
+        } else {
+            memcpy(buf, buf_tmp, buf_real_len);
+        }
+        return buf_real_len;
+    } else if (DFD_CFG_ITEM_ID(key) == DFD_CFG_ITEM_HWMON_TEMP && info_ctrl->src == INFO_SRC_CPLD) {
+        rv = dfd_info_get_cpld_temperature(key, &temp_value);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "get cpld temperature failed.key=0x%08llx, rv:%d\n", key, rv);
+            return -DFD_RV_DEV_NOTSUPPORT;
+        }
+        DBG_DEBUG(DBG_VERBOSE, "get cpld temperature ok, value:%d buf_len %d\n", temp_value, buf_len);
+        mem_clear(buf_tmp, sizeof(buf_tmp));
+        snprintf(buf_tmp, sizeof(buf_tmp), "%d\n", temp_value);
+        buf_real_len = strlen(buf_tmp);
+        if (buf_len <= buf_real_len) {
+            DBG_DEBUG(DBG_ERROR, "length not enough.buf_len:%d,need length:%d\n", buf_len, buf_real_len);
+            return -DFD_RV_DEV_FAIL;
+        }
+        DBG_DEBUG(DBG_VERBOSE, "buf_real_len %d\n", buf_real_len);
+        memcpy(buf, buf_tmp, buf_real_len);
+        return buf_real_len;
+    }
+
+    DBG_DEBUG(DBG_ERROR, "not support mode. key:0x%08llx\n", key);
+    return -DFD_RV_MODE_NOTSUPPORT;
+}
+
+/**
+ * dfd_info_get_sensor - Get sensors
+ * @key: HWMON Configures the key
+ * @buf:Result storage
+ * @buf_len: buf Length
+ *
+ * @returns: <0 Failure, other success
+ */
+int dfd_info_get_sensor(uint64_t key, char *buf, int buf_len, info_hwmon_buf_f pfun)
+{
+    info_ctrl_t *key_info_ctrl;
+    int rv;
+
+    /* Entry check */
+    if (!DFD_CFG_ITEM_IS_INFO_CTRL(DFD_CFG_ITEM_ID(key)) ||
+        (buf == NULL) || buf_len <= 0) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error, key: 0x%08llx, buf_len: %d\n",
+            key, buf_len);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    mem_clear(buf, buf_len);
+    /* Get the configuration item read and write control variables */
+    key_info_ctrl = dfd_ko_cfg_get_item(key);
+    if (key_info_ctrl == NULL) {
+        DBG_DEBUG(DBG_VERBOSE, "can't find dfd config, key: 0x%08llx\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+    /* String type */
+    if (key_info_ctrl->mode == INFO_CTRL_MODE_SRT_CONS) {
+        snprintf(buf, buf_len, "%s\n", key_info_ctrl->str_cons);
+        DBG_DEBUG(DBG_VERBOSE, "get sensor value through string config, key: 0x%08llx, value: %s\n", key, buf);
+        return strlen(buf);
+    }
+    /* int constant type */
+    if (key_info_ctrl->mode == INFO_CTRL_MODE_CONS) {
+        snprintf(buf, buf_len, "%d\n", key_info_ctrl->int_cons);
+        DBG_DEBUG(DBG_VERBOSE, "get sensor value through int config, key: 0x%08llx, value: %d\n", key, key_info_ctrl->int_cons);
+        return strlen(buf);
+    }
+
+    /* Read from the hwmon file */
+    if (key_info_ctrl->mode == INFO_CTRL_MODE_CFG && key_info_ctrl->src == INFO_SRC_FILE) {
+        if (strstr(key_info_ctrl->fpath, "hwmon") != NULL) {
+            DBG_DEBUG(DBG_VERBOSE, "get sensor value through hwmon, key: 0x%08llx\n", key);
+            rv = dfd_2key_info_get_buf(key_info_ctrl, buf, buf_len, pfun);
+            if (rv < 0) {
+                DBG_DEBUG(DBG_VERBOSE, "get sensor value through hwmon failed, key: 0x%08llx, rv: %d\n", key, rv);
+            }
+            return rv;
+        } else {
+            DBG_DEBUG(DBG_VERBOSE, "get sensor value, key:0x%08llx\n", key);
+            rv = dfd_info_get_buf(key, buf, buf_len, NULL);
+            if (rv < 0) {
+                DBG_DEBUG(DBG_VERBOSE, "get sensor value failed, key:0x%08llx, rv:%d\n", key, rv);
+            }
+            return rv;
+        }
+    }
+    rv = dfd_info_get_sensor_value(key, buf, buf_len, pfun);
+    if ( rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "get sensor value failed, key: 0x%08llx, rv: %d\n", key, rv);
+    }
+    return rv;
+}
+
+/**
+ * @buf:Input and result store
+ *
+ */
+void dfd_info_del_no_print_string(char *buf)
+{
+    int i, len;
+
+    len = strlen(buf);
+    /* Culling noncharacter */
+    for (i = 0; i < len; i++) {
+        if ((buf[i] < 0x21) || (buf[i] > 0x7E)) {
+            buf[i] = '\0';
+            break;
+        }
+    }
+    return;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg_listnode.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg_listnode.c
new file mode 100644
index 000000000000..888cfe8b05f2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg_listnode.c
@@ -0,0 +1,133 @@
+/*
+ * An dfd_cfg_listnode driver for cfg of listnode devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/list.h>
+#include <linux/slab.h>
+
+#include "dfd_cfg_listnode.h"
+
+/**
+ * Find node
+ * @root: Root node pointer
+ * @key: Node index value
+ *
+ * @return : Node data pointer, NULL failed
+ */
+void *lnode_find_node(lnode_root_t *root, uint64_t key)
+{
+    lnode_node_t *lnode;
+
+    if (root == NULL) {
+        return NULL;
+    }
+
+    /* Traversal query */
+    list_for_each_entry(lnode, &(root->root), lst) {
+        if (lnode->key == key) {
+            return lnode->data;
+        }
+    }
+
+    return NULL;
+}
+
+/**
+ * Insert node
+ * @root: Root node pointer
+ * @key: Node index value
+ * @data: data
+ *
+ * @return : 0-- success, other failures
+ */
+int lnode_insert_node(lnode_root_t *root, uint64_t key, void *data)
+{
+    lnode_node_t *lnode;
+    void *data_tmp;
+
+    if ((root == NULL) || (data == NULL)) {
+        return LNODE_RV_INPUT_ERR;
+    }
+
+    /* Check whether the node exists */
+    data_tmp = lnode_find_node(root, key);
+    if (data_tmp != NULL) {
+        return LNODE_RV_NODE_EXIST;
+    }
+
+    /* Node memory request */
+    lnode = kmalloc(sizeof(lnode_node_t), GFP_KERNEL);
+    if (lnode == NULL) {
+        return LNODE_RV_NOMEM;
+    }
+
+    /* Add to list */
+    lnode->key = key;
+    lnode->data = data;
+    list_add_tail(&(lnode->lst), &(root->root));
+
+    return LNODE_RV_OK;
+}
+
+/**
+ * Example Initialize the root node
+ * @root: Root node pointer
+ *
+ * @return : 0 Succeeded, others failed
+ */
+int lnode_init_root(lnode_root_t *root)
+{
+    if (root == NULL) {
+        return LNODE_RV_INPUT_ERR;
+    }
+
+    INIT_LIST_HEAD(&(root->root));
+
+    return LNODE_RV_OK;
+}
+
+/**
+ * Free linked list
+ * @root: Root node pointer
+ *
+ * @return : void
+ */
+void lnode_free_list(lnode_root_t *root)
+{
+    lnode_node_t *lnode, *lnode_next;
+
+    if (root == NULL) {
+        return;
+    }
+
+    /* Iterate to delete the linked list */
+    list_for_each_entry_safe(lnode, lnode_next, &(root->root), lst) {
+        if (lnode->data) {
+            kfree(lnode->data);
+            lnode->data = NULL;
+            lnode->key = 0;
+        }
+        list_del(&lnode->lst);
+        kfree(lnode);
+        lnode = NULL;
+    }
+
+    return;
+
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_frueeprom.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_frueeprom.c
new file mode 100644
index 000000000000..ded8eb8a8db8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_frueeprom.c
@@ -0,0 +1,534 @@
+/*
+ * An dfd_frueeprom driver for frueeprom devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+
+#include "dfd_frueeprom.h"
+#include "dfd_cfg_adapter.h"
+#include "wb_module.h"
+
+int g_dfd_fru_dbg_level = 0;
+module_param(g_dfd_fru_dbg_level, int, S_IRUGO | S_IWUSR);
+
+/**
+ * Takes the pointer to stream of bytes and length
+ * and returns the 8 bit checksum
+ * This algo is per IPMI V2.0 spec
+ */
+static unsigned char ipmi_calculate_crc(const unsigned char *data, size_t len)
+{
+    char crc = 0;
+    size_t byte = 0;
+
+    for (byte = 0; byte < len; byte++) {
+        crc += *data++;
+    }
+
+    return(-crc);
+}
+
+/* Validates the data for crc and mandatory fields */
+static int ipmi_verify_fru_data(const uint8_t *data, const size_t len)
+{
+    uint8_t checksum = 0;
+    int rc = -DFD_RV_TYPE_ERR;
+
+    /* Validate for first byte to always have a value of [1] */
+    if (data[0] != IPMI_FRU_HDR_BYTE_ZERO) {
+        DBG_FRU_DEBUG(DBG_ERROR, "Invalid entry:[%d] in byte-0\n",data[0]);
+        return rc;
+    } else {
+        DBG_FRU_DEBUG(DBG_VERBOSE, "SUCCESS: Validated [0x%X] in entry_1 of fru_data\n",data[0]);
+    }
+
+    /* See if the calculated CRC matches with the embedded one.
+     * CRC to be calculated on all except the last one that is CRC itself.*/
+    checksum = ipmi_calculate_crc(data, len - 1);
+    if (checksum != data[len-1]) {
+        DBG_FRU_DEBUG(DBG_ERROR, "Checksum mismatch."
+                      " Calculated:[0x%X], Embedded:[0x%X]\n",
+                      checksum, data[len - 1]);
+        return rc;
+    } else {
+        DBG_FRU_DEBUG(DBG_VERBOSE, "SUCCESS: Checksum matches:[0x%X]\n",checksum);
+    }
+
+    return 0;
+}
+
+/* private method to parse type/length */
+static int ipmi_parse_type_length (const void *areabuf,
+                                   unsigned int areabuflen,
+                                   unsigned int current_area_offset,
+                                   uint8_t *number_of_data_bytes,
+                                   ipmi_fru_field_t *field)
+{
+    const uint8_t *areabufptr = (const uint8_t*) areabuf;
+    uint8_t type_length;
+    uint8_t type_code;
+
+    type_length = areabufptr[current_area_offset];
+
+    /* ipmi workaround
+     *
+     * dell p weredge r610
+     *
+     * my reading of the fru spec is that all non-custom fields are
+     * required to be listed by the vendor.  however, on this
+     * motherboard, some areas list this, indicating that there is
+     * no more data to be parsed.  so now, for "required" fields, i
+     * check to see if the type-length field is a sentinel before
+     * calling this function.
+     */
+
+    type_code = (type_length & IPMI_FRU_TYPE_LENGTH_TYPE_CODE_MASK) >> IPMI_FRU_TYPE_LENGTH_TYPE_CODE_SHIFT;
+    (*number_of_data_bytes) = type_length & IPMI_FRU_TYPE_LENGTH_NUMBER_OF_DATA_BYTES_MASK;
+
+    /* special case: this shouldn't be a length of 0x01 (see type/length
+     * byte format in fru information storage definition).
+     */
+    DBG_FRU_DEBUG(DBG_VERBOSE, "areabuflen:%d, current_area_offset:0x%x, type_code:0x%x, number_of_data_bytes:%d\n",
+                  areabuflen, current_area_offset, type_code, *number_of_data_bytes);
+#if 0
+    if (type_code == IPMI_FRU_TYPE_LENGTH_TYPE_CODE_LANGUAGE_CODE
+        && (*number_of_data_bytes) == 0x01) {
+        DBG_FRU_DEBUG(DBG_ERROR, "fru type length error.value:0x%x\n", type_length);
+        return (-1);
+    }
+#endif
+    if ((current_area_offset + 1 + (*number_of_data_bytes)) > areabuflen) {
+        DBG_FRU_DEBUG(DBG_ERROR, "buf length error. current_area_offset:0x%x, need length:%d, total length:0x%x\n",
+                      current_area_offset, *number_of_data_bytes, areabuflen);
+        return (-1);
+    }
+
+    if (field) {
+        mem_clear (field->type_length_field, IPMI_FRU_AREA_TYPE_LENGTH_FIELD_MAX);
+        memcpy (field->type_length_field, &areabufptr[current_area_offset + 1], *number_of_data_bytes);
+        DBG_FRU_DEBUG(DBG_VERBOSE, "fru parse ok. value:%s\n", field->type_length_field);
+        field->type_length_field_length = *number_of_data_bytes;
+    }
+
+    return (0);
+}
+
+static int ipmi_fru_product_info_area(const void *areabuf,
+                                      unsigned int areabuflen, ipmi_product_info_t *ipmi_product_info)
+{
+    const uint8_t *areabufptr = (const uint8_t*) areabuf;
+    unsigned int area_offset = 2;
+    uint8_t number_of_data_bytes;
+    int rv;
+    ipmi_fru_field_t **ipmi_fru_field_point;
+    int ipmi_fru_field_len, i;
+
+    if (!areabuf || !areabuflen || !ipmi_product_info) {
+        DBG_FRU_DEBUG(DBG_ERROR, "Invalid Parameter.\n");
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    /* Verify the crc and size */
+    rv = ipmi_verify_fru_data(areabuf, areabuflen);
+    if (rv < 0) {
+        DBG_FRU_DEBUG(DBG_ERROR, "Failed to validate fru product info data\n");
+        return rv;
+    }
+
+    ipmi_fru_field_len = (sizeof(ipmi_product_info_t) - sizeof(uint8_t *)) /(sizeof(ipmi_fru_field_t *));
+
+    if (ipmi_product_info->language_code) {
+        (*ipmi_product_info->language_code) = areabufptr[area_offset];
+    }
+    area_offset++;
+    ipmi_fru_field_point = (ipmi_fru_field_t **)((uint8_t *)ipmi_product_info + sizeof(uint8_t *));
+    for (i = 0; i < ipmi_fru_field_len; i++) {
+        if (*ipmi_fru_field_point) {
+            mem_clear(*ipmi_fru_field_point, sizeof(ipmi_fru_field_t));
+        }
+
+        if (((areabufptr[area_offset] == IPMI_FRU_SENTINEL_VALUE) && (i >= IPMI_FRU_PRODUCT_AREA_MIN_LEN))
+            || (area_offset == areabuflen - 1)) {
+            rv = 0;
+            break;
+        }
+
+        rv = ipmi_parse_type_length(areabufptr, areabuflen, area_offset, &number_of_data_bytes, *ipmi_fru_field_point);
+        if (rv < 0) {
+            DBG_FRU_DEBUG(DBG_ERROR, "[%d] _parse_type_length area_offset[%d] rv=%d \n", i, area_offset, rv);
+            break;
+        }
+
+        area_offset += 1;          /* type/length byte */
+        area_offset += number_of_data_bytes;
+        ipmi_fru_field_point++;
+    }
+
+    return (rv);
+}
+
+static int ipmi_fru_board_info_area(const void *areabuf,
+                                    unsigned int areabuflen, ipmi_board_info_t *ipmi_board_info)
+{
+    const uint8_t *areabufptr = (const uint8_t*) areabuf;
+    unsigned int area_offset = 2;
+    uint8_t number_of_data_bytes;
+    int rv;
+    ipmi_fru_field_t **ipmi_fru_field_point;
+    int ipmi_fru_field_len, i;
+
+    if (!areabuf || !areabuflen || !ipmi_board_info) {
+        DBG_FRU_DEBUG(DBG_ERROR, "Invalid Parameter.\n");
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    /* Verify the crc and size */
+    rv = ipmi_verify_fru_data(areabuf, areabuflen);
+    if (rv < 0) {
+        DBG_FRU_DEBUG(DBG_ERROR, "Failed to validate fru product info data\n");
+        return rv;
+    }
+
+    ipmi_fru_field_len = (sizeof(ipmi_board_info_t) - sizeof(uint8_t *) - sizeof(uint8_t *)) /(sizeof(ipmi_fru_field_t *));
+
+    if (ipmi_board_info->language_code) {
+        (*ipmi_board_info->language_code) = areabufptr[area_offset];
+    }
+    area_offset++;
+
+    if (ipmi_board_info->mfg_time) {
+        memcpy(ipmi_board_info->mfg_time, &areabufptr[area_offset], IPMI_FRU_BOARD_INFO_MFG_TIME_LENGTH);
+    }
+    area_offset += IPMI_FRU_BOARD_INFO_MFG_TIME_LENGTH;
+    ipmi_fru_field_point = (ipmi_fru_field_t **)((uint8_t *)ipmi_board_info + sizeof(uint8_t *) + sizeof(uint8_t *));
+    for (i = 0; i < ipmi_fru_field_len; i++) {
+        if (*ipmi_fru_field_point) {
+            mem_clear(*ipmi_fru_field_point, sizeof(ipmi_fru_field_t));
+        }
+
+        if (((areabufptr[area_offset] == IPMI_FRU_SENTINEL_VALUE) && (i >= IPMI_FRU_BOARD_AREA_MIN_LEN))
+            || (area_offset == areabuflen - 1)) {
+            rv = 0;
+            break;
+        }
+
+        rv = ipmi_parse_type_length(areabufptr, areabuflen, area_offset, &number_of_data_bytes, *ipmi_fru_field_point);
+        if (rv < 0) {
+            DBG_FRU_DEBUG(DBG_ERROR, "[%d] _parse_type_length area_offset[%d] rv=%d \n", i, area_offset, rv);
+            break;
+        }
+
+        area_offset += 1;          /* type/length byte */
+        area_offset += number_of_data_bytes;
+        ipmi_fru_field_point++;
+    }
+
+    return (rv);
+}
+
+/**
+ * Validates the fru data per ipmi common header constructs.
+ * Returns with updated common_hdr and also file_size
+ */
+static int ipmi_validate_common_hdr(const uint8_t *fru_data, const size_t data_len)
+{
+    int rc = -1;
+
+    uint8_t common_hdr[sizeof(fru_common_header_t)] = {0};
+    if (data_len >= sizeof(common_hdr)) {
+        memcpy(common_hdr, fru_data, sizeof(common_hdr));
+    } else {
+        DBG_FRU_DEBUG(DBG_ERROR, "Incomplete fru data file. Size:[%zd]\n", data_len);
+        return rc;
+    }
+
+    /* Verify the crc and size */
+    rc = ipmi_verify_fru_data(common_hdr, sizeof(common_hdr));
+    if (rc < 0) {
+        DBG_FRU_DEBUG(DBG_ERROR, "Failed to validate common header\n");
+        return rc;
+    }
+
+    return 0;
+}
+
+/* Header information acquisition */
+static int dfd_get_frue2prom_info(int bus, int dev_addr, fru_common_header_t *info, const char *sysfs_name)
+{
+    int ret;
+    uint8_t fru_common_header_info[sizeof(fru_common_header_t)];
+
+    if (info == NULL) {
+        DBG_FRU_DEBUG(DBG_ERROR, "Invalid parameter!\n");
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    ret = dfd_ko_i2c_read(bus, dev_addr, 0, (uint8_t *)info, sizeof(fru_common_header_t), sysfs_name);
+    if (ret < 0) {
+        DBG_FRU_DEBUG(DBG_ERROR, "Read eeprom head info error(bus: %d, addr: 0x%02x).\n", bus, dev_addr);
+        return ret;
+    }
+
+    memcpy(fru_common_header_info, (uint8_t *)info, sizeof(fru_common_header_t));
+
+    if (ipmi_validate_common_hdr(fru_common_header_info, sizeof(fru_common_header_t)) != 0) {
+        return -DFD_RV_TYPE_ERR;
+    }
+
+    return DFD_RV_OK;
+}
+
+static int dfd_set_fru_product_info(ipmi_product_info_t *ipmi_product_info, ipmi_fru_field_t *vpd_info, int type)
+{
+    int ret;
+    ret = DFD_RV_OK;
+    if (ipmi_product_info == NULL || vpd_info == NULL) {
+        DBG_FRU_DEBUG(DBG_ERROR, "Invalid parameter!\n");
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    mem_clear((uint8_t *)ipmi_product_info, sizeof(ipmi_product_info_t));
+    switch (type) {
+    case DFD_DEV_INFO_TYPE_SN:
+        ipmi_product_info->product_serial_number = vpd_info;
+        break;
+    case DFD_DEV_INFO_TYPE_NAME:
+        ipmi_product_info->product_name = vpd_info;
+        break;
+    case DFD_DEV_INFO_TYPE_DEV_TYPE:
+        ipmi_product_info->product_type_fields = vpd_info;
+        break;
+    case DFD_DEV_INFO_TYPE_HW_INFO:
+        ipmi_product_info->product_version = vpd_info;
+        break;
+    case DFD_DEV_INFO_TYPE_VENDOR:
+        ipmi_product_info->product_manufacturer_name = vpd_info;
+        break;
+    case DFD_DEV_INFO_TYPE_PART_NUMBER:
+        ipmi_product_info->product_part_model_number = vpd_info;
+        break;
+    case DFD_DEV_INFO_TYPE_ASSET_TAG:
+        ipmi_product_info->product_asset_tag = vpd_info;
+        break;
+    default:
+        ret = -1;
+        break;
+    }
+
+    return ret;
+}
+
+static int dfd_set_fru_board_info(ipmi_board_info_t *ipmi_board_info, ipmi_fru_field_t *vpd_info, int type)
+{
+    int ret;
+    ret = DFD_RV_OK;
+    if (ipmi_board_info == NULL || vpd_info == NULL) {
+        DBG_FRU_DEBUG(DBG_ERROR, "Invalid parameter!\n");
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    mem_clear((uint8_t *)ipmi_board_info, sizeof(ipmi_board_info_t));
+    switch (type) {
+    case DFD_DEV_INFO_TYPE_SN:
+        ipmi_board_info->board_serial_number = vpd_info;
+        break;
+    case DFD_DEV_INFO_TYPE_NAME:
+        ipmi_board_info->board_product_name = vpd_info;
+        break;
+    case DFD_DEV_INFO_TYPE_HW_INFO:
+        ipmi_board_info->board_custom_fields = vpd_info;
+        break;
+    case DFD_DEV_INFO_TYPE_PART_NUMBER:
+        ipmi_board_info->board_part_number = vpd_info;
+        break;
+    case DFD_DEV_INFO_TYPE_VENDOR:
+        ipmi_board_info->board_manufacturer = vpd_info;
+        break;
+    default:
+        ret = -1;
+        break;
+    }
+
+    return ret;
+}
+
+/**
+ * dfd_get_fru_data - Obtain product area FRU information
+ * @bus:FRU E2 bus number
+ * @dev_addr:FRU E2 Device address
+ * @type 2: Product name, 3: product serial number 5: hardware version number 6: product ID
+ * @buf: Data is stored in buf
+ * @buf_len:buf length
+ * @sysfs_name:sysfs attribute name
+ * @returns:0 success, negative value: failed
+ */
+int dfd_get_fru_data(int bus, int dev_addr, int type, uint8_t *buf, uint32_t buf_len, const char *sysfs_name)
+{
+    fru_common_header_t info;
+    uint8_t *fru_data;
+    int ret;
+    uint8_t fru_len;
+    ipmi_product_info_t ipmi_product_info;
+    ipmi_fru_field_t vpd_info;
+    int product_offset;
+    int fru_len_tmp;
+
+    if (buf == NULL || buf_len <= 0) {
+        DBG_FRU_DEBUG(DBG_ERROR, "Invalid parameter!\n");
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    DBG_FRU_DEBUG(DBG_VERBOSE, "Read fru eeprom (bus: %d, addr: 0x%02x, type:%d, buf: %p, len: %d).\n",
+                  bus, dev_addr, type, buf, buf_len);
+
+    ret = dfd_get_frue2prom_info(bus, dev_addr, &info, sysfs_name);
+    if (ret < 0) {
+        DBG_FRU_DEBUG(DBG_ERROR, "Read eeprom info head error(bus: %d, addr: 0x%02x, buf: %p, len: %d).\n",
+                      bus, dev_addr, buf, buf_len);
+        return ret;
+    }
+
+    product_offset = info.product_offset * IPMI_EIGHT_BYTES;
+    ret = dfd_ko_i2c_read(bus, dev_addr, product_offset + 1, &fru_len, 1, sysfs_name);
+    if (ret < 0) {
+        DBG_FRU_DEBUG(DBG_ERROR, "read eeprom info product_offset(bus: %d, addr: 0x%02x, product offset:%d).\n",
+                      bus, dev_addr, info.product_offset);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    fru_len_tmp = fru_len * IPMI_EIGHT_BYTES;
+    fru_data = (uint8_t *)kmalloc(sizeof(uint8_t) * fru_len_tmp, GFP_KERNEL);
+    if (fru_data == NULL) {
+        DBG_FRU_DEBUG(DBG_ERROR, "Allocate buffer(len:%d) error!\n", fru_len_tmp);
+        return -DFD_RV_NO_MEMORY;
+    }
+
+    ret = dfd_ko_i2c_read(bus, dev_addr, product_offset, fru_data, fru_len_tmp, sysfs_name);
+    if (ret < 0) {
+        DBG_FRU_DEBUG(DBG_ERROR, "Get FRU data error.\n");
+        kfree(fru_data);
+        return ret;
+    }
+
+    mem_clear((uint8_t *)&vpd_info, sizeof(ipmi_fru_field_t));
+    ret = dfd_set_fru_product_info(&ipmi_product_info, &vpd_info, type);
+    if (ret < 0) {
+        DBG_FRU_DEBUG(DBG_ERROR, "Not support to get info: %d.\n", type);
+        kfree(fru_data);
+        return ret;
+    }
+
+    ret = ipmi_fru_product_info_area(fru_data, fru_len_tmp, &ipmi_product_info);
+    if (ret < 0) {
+        DBG_FRU_DEBUG(DBG_ERROR, "analysis FRU product info error.\n");
+        kfree(fru_data);
+        return ret;
+    }
+
+    kfree(fru_data);
+
+    buf_len = buf_len < vpd_info.type_length_field_length ? buf_len : vpd_info.type_length_field_length;
+    memcpy(buf, (uint8_t *)&vpd_info, buf_len);
+
+    return DFD_RV_OK;
+}
+
+/**
+ * dfd_get_fru_board_data - Obtain the FRU information of the board area
+ * @bus:FRU E2 bus number
+ * @dev_addr:FRU E2 Device address
+ * @type: 2: Product name, 3: product serial number 5: hardware version number
+ * @buf:Data is stored in buf
+ * @buf_len:buf length
+ * @sysfs_name:sysfs attribute name
+ * @returns: 0 success, negative value: failed
+ */
+int dfd_get_fru_board_data(int bus, int dev_addr, int type, uint8_t *buf, uint32_t buf_len, const char *sysfs_name)
+{
+    fru_common_header_t info;
+    uint8_t *fru_data;
+    int ret;
+    uint8_t fru_len;
+    ipmi_board_info_t ipmi_board_info;
+    ipmi_fru_field_t vpd_info;
+    int board_offset;
+    int fru_len_tmp;
+
+    if (buf == NULL || buf_len <= 0) {
+        DBG_FRU_DEBUG(DBG_ERROR, "Invalid parameter!\n");
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    DBG_FRU_DEBUG(DBG_VERBOSE, "Read fru eeprom (bus: %d, addr: 0x%02x, type:%d, buf: %p, len: %d).\n",
+                  bus, dev_addr, type, buf, buf_len);
+
+    ret = dfd_get_frue2prom_info(bus, dev_addr, &info, sysfs_name);
+    if (ret < 0) {
+        DBG_FRU_DEBUG(DBG_ERROR, "Read eeprom info head error(bus: %d, addr: 0x%02x, buf: %p, len: %d).\n",
+                      bus, dev_addr, buf, buf_len);
+        return ret;
+    }
+
+    board_offset = info.board_offset * IPMI_EIGHT_BYTES;
+    ret = dfd_ko_i2c_read(bus, dev_addr, board_offset + 1, &fru_len, 1, sysfs_name);
+    if (ret < 0) {
+        DBG_FRU_DEBUG(DBG_ERROR, "read eeprom info product_offset(bus: %d, addr: 0x%02x, product offset:%d).\n",
+                      bus, dev_addr, info.board_offset);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    fru_len_tmp = fru_len * IPMI_EIGHT_BYTES;
+    fru_data = (uint8_t *)kmalloc(sizeof(uint8_t) * fru_len_tmp, GFP_KERNEL);
+    if (fru_data == NULL) {
+        DBG_FRU_DEBUG(DBG_ERROR, "Allocate buffer(len:%d) error!\n", fru_len_tmp);
+        return -DFD_RV_NO_MEMORY;
+    }
+
+    ret = dfd_ko_i2c_read(bus, dev_addr, board_offset, fru_data, fru_len_tmp, sysfs_name);
+    if (ret < 0) {
+        DBG_FRU_DEBUG(DBG_ERROR, "Get FRU data error.\n");
+        kfree(fru_data);
+        return ret;
+    }
+
+    mem_clear((uint8_t *)&vpd_info, sizeof(ipmi_fru_field_t));
+    ret = dfd_set_fru_board_info(&ipmi_board_info, &vpd_info, type);
+    if (ret < 0) {
+        DBG_FRU_DEBUG(DBG_ERROR, "Not support to get info: %d.\n", type);
+        kfree(fru_data);
+        return ret;
+    }
+
+    ret = ipmi_fru_board_info_area(fru_data, fru_len_tmp, &ipmi_board_info);
+    if (ret < 0) {
+        DBG_FRU_DEBUG(DBG_ERROR, "analysis FRU product info error.\n");
+        kfree(fru_data);
+        return ret;
+    }
+
+    kfree(fru_data);
+
+    buf_len = buf_len < vpd_info.type_length_field_length ? buf_len : vpd_info.type_length_field_length;
+    memcpy(buf, (uint8_t *)&vpd_info, buf_len);
+
+    return DFD_RV_OK;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_tlveeprom.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_tlveeprom.c
new file mode 100644
index 000000000000..3011aa2cac04
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_tlveeprom.c
@@ -0,0 +1,469 @@
+/*
+ * An dfd_tlveeprom driver for tlveeprom devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+
+#include "dfd_tlveeprom.h"
+#include "wb_module.h"
+
+#define TLV_CODE_PRODUCT_NAME   (0x21)
+#define TLV_CODE_PART_NUMBER    (0x22)
+#define TLV_CODE_SERIAL_NUMBER  (0x23)
+#define TLV_CODE_MAC_BASE       (0x24)
+#define TLV_CODE_MANUF_DATE     (0x25)
+#define TLV_CODE_DEVICE_VERSION (0x26)
+#define TLV_CODE_LABEL_REVISION (0x27)
+#define TLV_CODE_PLATFORM_NAME  (0x28)
+#define TLV_CODE_ONIE_VERSION   (0x29)
+#define TLV_CODE_MAC_SIZE       (0x2A)
+#define TLV_CODE_MANUF_NAME     (0x2B)
+#define TLV_CODE_MANUF_COUNTRY  (0x2C)
+#define TLV_CODE_VENDOR_NAME    (0x2D)
+#define TLV_CODE_DIAG_VERSION   (0x2E)
+#define TLV_CODE_SERVICE_TAG    (0x2F)
+#define TLV_CODE_VENDOR_EXT     (0xFD)
+#define TLV_CODE_CRC_32         (0xFE)
+
+/* using in is_valid_tlvinfo_header */
+static uint32_t g_eeprom_size;
+
+/*
+ *  List of TLV codes and names.
+ */
+static const struct tlv_code_desc tlv_code_list[] = {
+    { TLV_CODE_PRODUCT_NAME, "Product Name"},
+    { TLV_CODE_PART_NUMBER, "Part Number"},
+    { TLV_CODE_SERIAL_NUMBER, "Serial Number"},
+    { TLV_CODE_MAC_BASE, "Base MAC Address"},
+    { TLV_CODE_MANUF_DATE, "Manufacture Date"},
+    { TLV_CODE_DEVICE_VERSION, "Device Version"},
+    { TLV_CODE_LABEL_REVISION, "Label Revision"},
+    { TLV_CODE_PLATFORM_NAME, "Platform Name"},
+    { TLV_CODE_ONIE_VERSION, "ONIE Version"},
+    { TLV_CODE_MAC_SIZE, "MAC Addresses"},
+    { TLV_CODE_MANUF_NAME, "Manufacturer"},
+    { TLV_CODE_MANUF_COUNTRY, "Country Code"},
+    { TLV_CODE_VENDOR_NAME, "Vendor Name"},
+    { TLV_CODE_DIAG_VERSION, "Diag Version"},
+    { TLV_CODE_SERVICE_TAG, "Service Tag"},
+    { TLV_CODE_VENDOR_EXT, "Vendor Extension"},
+    { TLV_CODE_CRC_32, "CRC-32"},
+};
+
+#define TLV_CODE_NUM (sizeof(tlv_code_list) / sizeof(tlv_code_list[0]))
+
+const unsigned long g_crc_table[] = {
+    0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3,
+    0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91,
+    0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
+    0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5,
+    0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b,
+    0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
+    0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f,
+    0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d,
+    0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
+    0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01,
+    0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457,
+    0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
+    0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb,
+    0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9,
+    0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
+    0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad,
+    0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683,
+    0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
+    0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7,
+    0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5,
+    0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
+    0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79,
+    0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f,
+    0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
+    0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713,
+    0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21,
+    0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
+    0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45,
+    0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db,
+    0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
+    0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf,
+    0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d,
+};
+
+static unsigned long crc32(unsigned long crc, const unsigned char *buf, unsigned len)
+{
+    unsigned i;
+    if (len < 1)
+        return 0xffffffff;
+
+    for (i = 0; i != len; ++i) {
+        crc = g_crc_table[(crc ^ buf[i]) & 0xff] ^ (crc >> 8);
+    }
+
+    crc = crc ^ 0xffffffff;
+
+    return crc;
+}
+
+/*
+ *  is_valid_tlv
+ *
+ *  Perform basic sanity checks on a TLV field. The TLV is pointed to
+ *  by the parameter provided.
+ *      1. The type code is not reserved (0x00 or 0xFF)
+ */
+static inline bool is_valid_tlv(tlvinfo_tlv_t *tlv)
+{
+    return ((tlv->type != 0x00) && (tlv->type != 0xFF));
+}
+
+/*
+ *  is_valid_tlvinfo_header
+ *
+ *  Perform sanity checks on the first 11 bytes of the TlvInfo EEPROM
+ *  data pointed to by the parameter:
+ *      1. First 8 bytes contain null-terminated ASCII string "TlvInfo"
+ *      2. Version byte is 1
+ *      3. Total length bytes contain value which is less than or equal
+ *         to the allowed maximum (2048-11)
+ *
+ */
+static inline bool is_valid_tlvinfo_header(tlvinfo_header_t *hdr)
+{
+    int max_size = g_eeprom_size;
+    return((strcmp(hdr->signature, TLV_INFO_ID_STRING) == 0) &&
+           (hdr->version == TLV_INFO_VERSION) &&
+           (be16_to_cpu(hdr->totallen) <= max_size));
+}
+
+/*
+ *  decode_tlv_value
+ *
+ *  Decode a single TLV value into a string.
+
+ *  The validity of EEPROM contents and the TLV field have been verified
+ *  prior to calling this function.
+ */
+static void decode_tlv_value(tlvinfo_tlv_t *tlv, tlv_decode_value_t *decode_value)
+{
+    int i;
+    char *value;
+    uint32_t length;
+
+    value = (char *)decode_value->value;
+
+    switch (tlv->type) {
+    case TLV_CODE_PRODUCT_NAME:
+    case TLV_CODE_PART_NUMBER:
+    case TLV_CODE_SERIAL_NUMBER:
+    case TLV_CODE_MANUF_DATE:
+    case TLV_CODE_LABEL_REVISION:
+    case TLV_CODE_PLATFORM_NAME:
+    case TLV_CODE_ONIE_VERSION:
+    case TLV_CODE_MANUF_NAME:
+    case TLV_CODE_MANUF_COUNTRY:
+    case TLV_CODE_VENDOR_NAME:
+    case TLV_CODE_DIAG_VERSION:
+    case TLV_CODE_SERVICE_TAG:
+        memcpy(value, tlv->value, tlv->length);
+        value[tlv->length] = 0;
+        length = tlv->length;
+        break;
+    case TLV_CODE_MAC_BASE:
+        length = sprintf(value, "%02X:%02X:%02X:%02X:%02X:%02X",
+                tlv->value[0], tlv->value[1], tlv->value[2],
+                tlv->value[3], tlv->value[4], tlv->value[5]);
+        break;
+    case TLV_CODE_DEVICE_VERSION:
+        length = sprintf(value, "%u", tlv->value[0]);
+        break;
+    case TLV_CODE_MAC_SIZE:
+        length = sprintf(value, "%u", (tlv->value[0] << 8) | tlv->value[1]);
+        break;
+    case TLV_CODE_VENDOR_EXT:
+        value[0] = 0;
+        length = 0;
+        for (i = 0; (i < (TLV_DECODE_VALUE_MAX_LEN/5)) && (i < tlv->length); i++) {
+            length += sprintf(value, "%s %02X", value, tlv->value[i]);
+        }
+        break;
+    case TLV_CODE_CRC_32:
+        length = sprintf(value, "0x%02X%02X%02X%02X", tlv->value[0],
+                tlv->value[1], tlv->value[2], tlv->value[3]);
+        break;
+    default:
+        value[0] = 0;
+        length = 0;
+        for (i = 0; (i < (TLV_DECODE_VALUE_MAX_LEN/5)) && (i < tlv->length); i++) {
+            length += sprintf(value, "%s 0x%02X", value, tlv->value[i]);
+        }
+        break;
+    }
+
+    decode_value->length = length;
+}
+
+/*
+ *  is_checksum_valid
+ *
+ *  Validate the checksum in the provided TlvInfo EEPROM data. First,
+ *  verify that the TlvInfo header is valid, then make sure the last
+ *  TLV is a CRC-32 TLV. Then calculate the CRC over the EEPROM data
+ *  and compare it to the value stored in the EEPROM CRC-32 TLV.
+ */
+static bool is_checksum_valid(uint8_t *eeprom)
+{
+    tlvinfo_header_t *eeprom_hdr;
+    tlvinfo_tlv_t *eeprom_crc;
+    unsigned int calc_crc;
+    unsigned int stored_crc;
+
+    eeprom_hdr = (tlvinfo_header_t *) eeprom;
+
+    /* Is the eeprom header valid? */
+    if (!is_valid_tlvinfo_header(eeprom_hdr)) {
+        return false;
+    }
+
+    /* Is the last TLV a CRC? */
+    eeprom_crc = (tlvinfo_tlv_t *) &eeprom[sizeof(tlvinfo_header_t) +
+        be16_to_cpu(eeprom_hdr->totallen) - (sizeof(tlvinfo_tlv_t) + 4)];
+    if ((eeprom_crc->type != TLV_CODE_CRC_32) || (eeprom_crc->length != 4)) {
+        return false;
+    }
+
+    /* Calculate the checksum */
+    calc_crc = crc32(0xffffffffL, (const unsigned char *)eeprom, sizeof(tlvinfo_header_t) +
+             be16_to_cpu(eeprom_hdr->totallen) - 4);
+    stored_crc = ((eeprom_crc->value[0] << 24) | (eeprom_crc->value[1] << 16) |
+          (eeprom_crc->value[2] <<  8) | eeprom_crc->value[3]);
+
+    return (calc_crc == stored_crc);
+}
+
+/*
+ *  tlvinfo_find_tlv
+ *
+ *  This function finds the TLV with the supplied code in the EERPOM.
+ *  An offset from the beginning of the EEPROM is returned in the
+ *  eeprom_index parameter if the TLV is found.
+ */
+static bool tlvinfo_find_tlv(uint8_t *eeprom, uint8_t tcode, int *eeprom_index)
+{
+    tlvinfo_header_t *eeprom_hdr;
+    tlvinfo_tlv_t    *eeprom_tlv;
+    int eeprom_end;
+
+    eeprom_hdr = (tlvinfo_header_t *) eeprom;
+
+    /* Search through the TLVs, looking for the first one which matches the
+     * supplied type code. */
+    *eeprom_index = sizeof(tlvinfo_header_t);
+    eeprom_end = sizeof(tlvinfo_header_t) + be16_to_cpu(eeprom_hdr->totallen);
+    while (*eeprom_index < eeprom_end) {
+        eeprom_tlv = (tlvinfo_tlv_t *) &eeprom[*eeprom_index];
+        if (!is_valid_tlv(eeprom_tlv)) {
+            return false;
+        }
+
+        if (eeprom_tlv->type == tcode) {
+            return true;
+        }
+
+        *eeprom_index += sizeof(tlvinfo_tlv_t) + eeprom_tlv->length;
+    }
+
+    return false;
+}
+
+/*
+ *  tlvinfo_decode_tlv
+ *
+ *  This function finds the TLV with the supplied code in the EERPOM
+ *  and decodes the value into the buffer provided.
+ */
+static bool tlvinfo_decode_tlv(uint8_t *eeprom, uint8_t tcode, tlv_decode_value_t *decode_value)
+{
+    int eeprom_index;
+    tlvinfo_tlv_t *eeprom_tlv;
+
+    /* Find the TLV and then decode it */
+    if (tlvinfo_find_tlv(eeprom, tcode, &eeprom_index)) {
+        eeprom_tlv = (tlvinfo_tlv_t *) &eeprom[eeprom_index];
+        decode_tlv_value(eeprom_tlv, decode_value);
+        return true;
+    }
+
+    return false;
+}
+
+/*
+ *  parse_tlv_eeprom
+ *
+ *  parse the EEPROM into memory, if it hasn't already been read.
+ */
+int parse_tlv_eeprom(uint8_t *eeprom, uint32_t size)
+{
+    unsigned int i;
+    bool ret;
+    tlvinfo_header_t *eeprom_hdr;
+    tlv_decode_value_t decode_value;
+    int j;
+
+    eeprom_hdr = (tlvinfo_header_t *) eeprom;
+    g_eeprom_size = size; /* eeprom real size */
+
+    if (!is_valid_tlvinfo_header(eeprom_hdr)) {
+        DBG_DEBUG(DBG_ERROR, "Failed to check tlv header.\n");
+        return -1;
+    }
+
+    if (!is_checksum_valid(eeprom)) {
+        DBG_DEBUG(DBG_ERROR, "Failed to check tlv crc.\n");
+        return -1;
+    }
+
+    for (i = 0; i < TLV_CODE_NUM; i++) {
+        mem_clear((void *)&decode_value, sizeof(tlv_decode_value_t));
+        ret = tlvinfo_decode_tlv(eeprom, tlv_code_list[i].m_code, &decode_value);
+        if (!ret) {
+            DBG_DEBUG(DBG_ERROR, "No found type: %s\n", tlv_code_list[i].m_name);
+            continue;
+        }
+
+        DBG_DEBUG(DBG_VERBOSE, "i: %d,Found type: %s tlv[%d]:%s\n", i, tlv_code_list[i].m_name, tlv_code_list[i].m_code,
+            decode_value.value);
+        for (j = 0; j < decode_value.length; j++) {
+            if ((j % 16) == 0) {
+                DBG_DEBUG(DBG_VERBOSE, "\n");
+            }
+            DBG_DEBUG(DBG_VERBOSE, "%02x ", decode_value.value[j]);
+        }
+        DBG_DEBUG(DBG_VERBOSE, "\n\n");
+    }
+    return 0;
+}
+static int dfd_parse_tlv_eeprom(uint8_t *eeprom, uint32_t size, uint8_t main_type, tlv_decode_value_t *decode_value)
+{
+    bool ret;
+    tlvinfo_header_t *eeprom_hdr;
+    int j;
+
+    eeprom_hdr = (tlvinfo_header_t *) eeprom;
+    g_eeprom_size = size; /* eeprom real size */
+
+    if (!is_valid_tlvinfo_header(eeprom_hdr)) {
+        DBG_DEBUG(DBG_ERROR, "Failed to check tlv header.\n");
+        return -1;
+    }
+
+    if (!is_checksum_valid(eeprom)) {
+        DBG_DEBUG(DBG_ERROR, "Failed to check tlv crc.\n");
+        return -1;
+    }
+
+    ret = tlvinfo_decode_tlv(eeprom, main_type, decode_value);
+    if (!ret) {
+        DBG_DEBUG(DBG_ERROR, "No found type: %d\n", main_type);
+        return -1;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "Found type: %d, value: %s\n", main_type,decode_value->value);
+    for (j = 0; j < decode_value->length; j++) {
+        if ((j % 16) == 0) {
+            DBG_DEBUG(DBG_VERBOSE, "\n");
+        }
+        DBG_DEBUG(DBG_VERBOSE, "%02x ", decode_value->value[j]);
+    }
+    DBG_DEBUG(DBG_VERBOSE, "\n\n");
+
+    return 0;
+}
+#if 0
+/* Parsing extends the custom TLV format */
+static int tlvinfo_find_wb_ext_tlv(tlv_decode_value_t *ext_tlv_value, uint8_t ext_type,
+                                   uint8_t *buf, uint32_t *buf_len)
+{
+    tlvinfo_tlv_t    *eeprom_tlv;
+    int eeprom_end, eeprom_index;
+
+    /* Search through the TLVs, looking for the first one which matches the
+     * supplied type code.*/
+    DBG_DEBUG(DBG_VERBOSE, "ext_tlv_value->length: %d.\n", ext_tlv_value->length);
+    for (eeprom_index = 0; eeprom_index < ext_tlv_value->length; eeprom_index++) {
+        if ((eeprom_index % 16) == 0) {
+            DBG_DEBUG(DBG_VERBOSE, "\n");
+        }
+        DBG_DEBUG(DBG_VERBOSE, "%02x ", ext_tlv_value->value[eeprom_index]);
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "\n");
+
+    eeprom_index = 0;
+    eeprom_end = ext_tlv_value->length;
+    while (eeprom_index < eeprom_end) {
+        eeprom_tlv = (tlvinfo_tlv_t *) &(ext_tlv_value->value[eeprom_index]);
+        if (!is_valid_tlv(eeprom_tlv)) {
+            DBG_DEBUG(DBG_ERROR, "tlv is not valid, eeprom_tlv->type 0x%x.\n", eeprom_tlv->type);
+            return -1;
+        }
+
+        DBG_DEBUG(DBG_VERBOSE, "eeprom_tlv->length %d.\n", eeprom_tlv->length);
+        if (eeprom_tlv->type == ext_type) {
+            if (*buf_len >= eeprom_tlv->length) {
+                memcpy(buf, eeprom_tlv->value, eeprom_tlv->length);
+                DBG_DEBUG(DBG_VERBOSE, "eeprom_tlv->length %d.\n", eeprom_tlv->length);
+                *buf_len = eeprom_tlv->length;
+                return 0;
+            }
+            DBG_DEBUG(DBG_VERBOSE, "buf_len %d small than info_len %d.\n", *buf_len, eeprom_tlv->length);
+            return -1;
+        }
+
+        eeprom_index += sizeof(tlvinfo_tlv_t) + eeprom_tlv->length;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "ext_type %d: tlv is not found.\n", ext_type);
+    return -1;
+}
+#endif
+/* Obtain EEPROM information */
+int dfd_tlvinfo_get_e2prom_info(uint8_t *eeprom, uint32_t size, dfd_tlv_type_t *tlv_type, uint8_t* buf, uint32_t *buf_len)
+{
+    tlv_decode_value_t decode_value;
+    int ret;
+
+    if (eeprom == NULL || tlv_type == NULL || buf == NULL) {
+        DBG_DEBUG(DBG_ERROR, "Input para invalid.\n");
+        return -1;
+    }
+
+    mem_clear((void *)&decode_value, sizeof(tlv_decode_value_t));
+    ret = dfd_parse_tlv_eeprom(eeprom, size, tlv_type->main_type, &decode_value);
+    if (ret) {
+        DBG_DEBUG(DBG_ERROR, "dfd_parse_tlv_eeprom failed ret %d.\n", ret);
+        return ret;
+    }
+
+    if (*buf_len >= decode_value.length) {
+        memcpy(buf, decode_value.value, decode_value.length);
+        *buf_len = decode_value.length;
+        return 0;
+    }
+    DBG_DEBUG(DBG_ERROR, "buf_len %d small than info_len %d.\n", *buf_len, decode_value.length);
+    return -1;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg.h
new file mode 100644
index 000000000000..1cc8143d1f30
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg.h
@@ -0,0 +1,247 @@
+/*
+ * A header definition for dfd_cfg driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __DFD_CFG_H__
+#define __DFD_CFG_H__
+
+#include <linux/list.h>
+
+#define DFD_KO_FILE_NAME_DIR       "/etc/s3ip_sysfs_cfg/file_name/"       /* Library configuration file name directory */
+#define DFD_KO_CFG_FILE_DIR        "/etc/s3ip_sysfs_cfg/cfg_file/"        /* Library configuration file directory */
+#define DFD_PUB_CARDTYPE_FILE      "/sys/module/platform_common/parameters/dfd_my_type"
+
+#define DFD_CFG_CMDLINE_MAX_LEN (256)   /* The maximum length of the command line is specified */
+#define DFD_CFG_NAME_MAX_LEN    (256)   /* The maximum length of a name is specified */
+#define DFD_CFG_VALUE_MAX_LEN   (256)   /* The maximum length of the configuration value */
+#define DFD_CFG_STR_MAX_LEN     (64)    /* The maximum length of a character string is specified */
+#define DFD_CFG_CPLD_NUM_MAX    (16)    /* Maximum number of cpld */
+#define DFD_PRODUCT_ID_LENGTH   (8)
+#define DFD_PID_BUF_LEN         (32)
+#define DFD_TEMP_NAME_BUF_LEN   (32)
+
+#define DFD_CFG_EMPTY_VALUE     (-1)    /* Null configuration value */
+#define DFD_CFG_INVALID_VALUE   (0)     /* Configuring an illegal value */
+
+/* Set the key value of the binary tree */
+#define DFD_CFG_KEY(item, index1, index2) \
+    (((((uint64_t)item) & 0xffff) << 24) | (((index1) & 0xffff) << 8) | ((index2) & 0xff))
+#define DFD_CFG_ITEM_ID(key)    (((key) >> 24) & 0xffff)
+#define DFD_CFG_INDEX1(key)     (((key) >> 8) & 0xffff)
+#define DFD_CFG_INDEX2(key)     ((key)& 0xff)
+
+/* Index range */
+#define INDEX_NOT_EXIST     (-1)
+#define INDEX1_MAX           (0xffff)
+#define INDEX2_MAX           (0xff)
+
+#define DFD_CFG_ITEM_ALL \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_NONE, "none", INDEX_NOT_EXIST, INDEX_NOT_EXIST)                       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_DEV_NUM, "dev_num", INDEX1_MAX, INDEX2_MAX)                 \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_BMC_SYSTEM_CMD_NUM, "bmc_system_cmd_num", INDEX1_MAX, INDEX_NOT_EXIST)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_FAN_THRESHOLD, "fan_threshold", INDEX1_MAX, INDEX2_MAX)   \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_LED_STATUS_DECODE, "led_status_decode", INDEX1_MAX, INDEX2_MAX)   \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_SYSTEM_STATUS_DECODE, "system_status_decode", INDEX1_MAX, INDEX2_MAX)   \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_CPLD_LPC_DEV, "cpld_lpc_dev", INDEX1_MAX, DFD_CFG_CPLD_NUM_MAX)       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_FAN_TYPE_NUM, "fan_type_num", INDEX1_MAX, INDEX_NOT_EXIST)       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_EEPROM_SIZE, "eeprom_size", INDEX1_MAX, INDEX2_MAX)       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_DECODE_POWER_FAN_DIR, "decode_power_fan_dir", INDEX1_MAX, INDEX_NOT_EXIST)       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_WATCHDOG_ID, "watchdog_id", INDEX1_MAX, INDEX_NOT_EXIST)       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_POWER_RSUPPLY, "power_rate_supply", INDEX1_MAX, INDEX_NOT_EXIST)           \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_FAN_DIRECTION, "fan_direction", INDEX1_MAX, INDEX2_MAX)   \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_HWMON_TEMP_MONITOR_DC, "dc_monitor_flag_hwmon_temp", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_HWMON_IN_MONITOR_FLAG_DC, "dc_monitor_flag_hwmon_in", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_HWMON_CURR_MONITOR_FLAG_DC, "dc_monitor_flag_hwmon_curr", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_INT_END, "end_int", INDEX_NOT_EXIST, INDEX_NOT_EXIST)                 \
+                                                                                                    \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_CPLD_MODE, "mode_cpld", INDEX1_MAX, DFD_CFG_CPLD_NUM_MAX)                 \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_CPLD_NAME, "cpld_name", INDEX1_MAX, INDEX2_MAX)              \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_CPLD_TYPE, "cpld_type", INDEX1_MAX, INDEX2_MAX)              \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_FPGA_NAME, "fpga_name", INDEX1_MAX, INDEX2_MAX)              \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_FPGA_TYPE, "fpga_type", INDEX1_MAX, INDEX2_MAX)              \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_FPGA_MODEL_DECODE, "fpga_model_decode", INDEX1_MAX, INDEX_NOT_EXIST)   \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_FAN_E2_MODE, "fan_e2_mode", INDEX_NOT_EXIST, INDEX_NOT_EXIST)       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_PSU_FRU_MODE, "psu_fru_mode", INDEX_NOT_EXIST, INDEX_NOT_EXIST)       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_FAN_SYSFS_NAME, "fan_sysfs_name", INDEX_NOT_EXIST, INDEX_NOT_EXIST)       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_POWER_NAME, "power_name", INDEX1_MAX, INDEX2_MAX)       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_FAN_NAME, "fan_name", INDEX1_MAX, INDEX2_MAX)       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_DECODE_POWER_NAME, "decode_power_name", INDEX1_MAX, INDEX_NOT_EXIST)       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_FAN_SPEED_CAL, "fan_speed_cal", INDEX1_MAX, INDEX_NOT_EXIST)       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_DECODE_FAN_NAME, "decode_fan_name", INDEX1_MAX, INDEX_NOT_EXIST)       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_EEPROM_PATH, "eeprom_path", INDEX1_MAX, INDEX2_MAX)       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_WATCHDOG_NAME, "watchdog_name", INDEX1_MAX, INDEX2_MAX)              \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_PSU_SYSFS_NAME, "psu_sysfs_name", INDEX_NOT_EXIST, INDEX_NOT_EXIST)       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_SLOT_SYSFS_NAME, "slot_sysfs_name", INDEX_NOT_EXIST, INDEX_NOT_EXIST)       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_EEPROM_ALIAS, "eeprom_alias", INDEX1_MAX, INDEX2_MAX)       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_EEPROM_TAG, "eeprom_tag", INDEX1_MAX, INDEX2_MAX)       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_EEPROM_TYPE, "eeprom_type", INDEX1_MAX, INDEX2_MAX)       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_PSU_BLACKBOX_INFO, "psu_blackbox_info", INDEX1_MAX, INDEX_NOT_EXIST)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_PSU_PMBUS_INFO, "psu_pmbus_info", INDEX1_MAX, INDEX_NOT_EXIST)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_PSU_CLEAR_BLACKBOX, "psu_clear_blackbox", INDEX1_MAX, INDEX_NOT_EXIST)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_STRING_END, "end_string", INDEX_NOT_EXIST, INDEX_NOT_EXIST)           \
+                                                                                                    \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_CPLD_I2C_DEV, "cpld_i2c_dev", INDEX1_MAX, INDEX2_MAX)           \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_OTHER_I2C_DEV, "other_i2c_dev", INDEX1_MAX, INDEX2_MAX)         \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_I2C_DEV_END, "end_i2c_dev", INDEX_NOT_EXIST, INDEX_NOT_EXIST)         \
+                                                                                                    \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_FAN_ROLL_STATUS, "fan_roll_status", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_FAN_SPEED, "fan_speed", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_FAN_RATIO, "fan_ratio", INDEX1_MAX, INDEX_NOT_EXIST)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_LED_STATUS, "led_status", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_CPLD_VERSION, "cpld_version", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_CPLD_HW_VERSION, "cpld_hw_version", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_CPLD_TEST_REG, "cpld_test_reg", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_DEV_PRESENT_STATUS, "dev_present_status", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_PSU_STATUS, "psu_status", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_HWMON_TEMP, "hwmon_temp", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_HWMON_TEMP_MONITOR_FLAG, "monitor_flag_hwmon_temp", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_HWMON_IN, "hwmon_in", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_HWMON_IN_MONITOR_FLAG, "monitor_flag_hwmon_in", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_HWMON_CURR, "hwmon_curr", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_HWMON_CURR_MONITOR_FLAG, "monitor_flag_hwmon_curr", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_HWMON_PSU, "hwmon_psu", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_SFF_OPTOE_TYPE, "sff_optoe_type", INDEX1_MAX, INDEX_NOT_EXIST)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_HWMON_POWER, "hwmon_power", INDEX1_MAX, INDEX2_MAX) \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_SFF_CPLD_REG, "sff_cpld_reg", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_FPGA_VERSION, "fpga_version", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_FPGA_TEST_REG, "fpga_test_reg", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_FPGA_MODEL_REG, "fpga_model_reg", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_PSU_PMBUS_REG, "psu_pmbus_reg", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_WATCHDOG_DEV, "watchdog_dev", INDEX1_MAX, INDEX2_MAX)              \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_BMC_SYSTEM, "bmc_system", INDEX1_MAX, INDEX2_MAX)              \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_PRE_CHECK_BMC_SYSTEM, "pre_check_bmc_system", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_CHECK_VAL_BMC_SYSTEM, "check_val_bmc_system", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_PSU_FRU_PMBUS, "psu_fru_pmbus", INDEX1_MAX, INDEX2_MAX)              \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_POWER_STATUS, "power_status", INDEX1_MAX, INDEX2_MAX)  \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_INFO_CTRL_END, "end_info_ctrl", INDEX_NOT_EXIST, INDEX_NOT_EXIST)     \
+
+/* Configuration item id enumeration definition */
+#ifdef DFD_CFG_ITEM
+#undef DFD_CFG_ITEM
+#endif
+#define DFD_CFG_ITEM(_id, _name, _index_min, _index_max)    _id,
+typedef enum dfd_cfg_item_id_s {
+    DFD_CFG_ITEM_ALL
+} dfd_cfg_item_id_t;
+
+#define DFD_CFG_ITEM_IS_INT(item_id) \
+    (((item_id) > DFD_CFG_ITEM_NONE) && ((item_id) < DFD_CFG_ITEM_INT_END))
+
+#define DFD_CFG_ITEM_IS_STRING(item_id) \
+    (((item_id) > DFD_CFG_ITEM_INT_END) && ((item_id) < DFD_CFG_ITEM_STRING_END))
+
+#define DFD_CFG_ITEM_IS_I2C_DEV(item_id) \
+    (((item_id) > DFD_CFG_ITEM_STRING_END) && ((item_id) < DFD_CFG_ITEM_I2C_DEV_END))
+
+#define DFD_CFG_ITEM_IS_INFO_CTRL(item_id) \
+    (((item_id) > DFD_CFG_ITEM_I2C_DEV_END) && ((item_id) < DFD_CFG_ITEM_INFO_CTRL_END))
+
+/* Index value range structure */
+typedef struct index_range_s {
+    int index1_max;             /* The primary index indicates the maximum value */
+    int index2_max;             /* Indicates the maximum value of the secondary index */
+} index_range_t;
+
+/* Register value conversion node */
+typedef struct val_convert_node_s {
+    struct list_head lst;
+    int int_val;                        /* Integer value */
+    char str_val[DFD_CFG_STR_MAX_LEN];  /* String value */
+    int index1;                         /* Index value 1 */
+    int index2;                         /* Index value 2 */
+} val_convert_node_t;
+
+/**
+ * dfd_ko_cfg_get_item - Get configuration item
+ * @key: Node key
+ *
+ * @returns: The NULL configuration item does not exist, and other configuration items are successful
+ */
+void *dfd_ko_cfg_get_item(uint64_t key);
+
+/**
+ * dfd_ko_cfg_show_item - Display configuration items
+ * @key: Node key
+ */
+void dfd_ko_cfg_show_item(uint64_t key);
+
+/**
+ * dfd_dev_cfg_init - Module initialization
+ *
+ * @returns: <0 Failed, otherwise succeeded
+ */
+int32_t dfd_dev_cfg_init(void);
+
+/**
+ * dfd_dev_cfg_exit - Module exit
+ *
+ * @returns: void
+ */
+void dfd_dev_cfg_exit(void);
+
+/* Strip out Spaces and carriage returns */
+void dfd_ko_cfg_del_space_lf_cr(char *str);
+
+void dfd_ko_cfg_del_lf_cr(char *str);
+
+/**
+ * dfd_ko_cfg_get_fan_direction_by_name - obtain the air duct type by fan name
+ * @fan_name: Fan name
+ * @fan_direction: Duct type
+ *
+ * @returns: 0 Succeeded, otherwise failed
+ */
+int dfd_ko_cfg_get_fan_direction_by_name(char *fan_name, int *fan_direction);
+
+/**
+ * dfd_ko_cfg_get_power_type_by_name - obtain the power supply type by power supply name
+ * @power_name: Power supply name
+ * @power_type: Power supply type
+ * @returns: 0 Succeeded, otherwise failed
+ */
+int dfd_ko_cfg_get_power_type_by_name(char *power_name, int *power_type);
+
+/**
+ * dfd_ko_cfg_get_led_status_decode2_by_regval - Reverse check the register value of the led status
+ * @regval: Defined led values
+ * @index1: led type
+ * @value: Gets the register value of the led status
+ * @returns: 0 Succeeded, otherwise failed
+ */
+int dfd_ko_cfg_get_led_status_decode2_by_regval(int regval, int index1, int *value);
+
+/**
+ * dfd_ko_cfg_get_fan_direction_by_name - obtain the fan type by fan name
+ * @fan_name: Fan name
+ * @fan_type: Fan type
+ * @sub_type: Fan sub-type
+ *
+ * @returns: 0 Succeeded, otherwise failed
+ */
+ int dfd_ko_cfg_get_fan_type_by_name(char *fan_name, int *fan_type, int *sub_type);
+
+ /**
+ * key_to_name - convert to name by key
+ * @key: Fan name
+ *
+ * @returns: name
+ */
+char *key_to_name(uint64_t key);
+
+#endif /* __DFD_CFG_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg_adapter.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg_adapter.h
new file mode 100644
index 000000000000..f70c46328e58
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg_adapter.h
@@ -0,0 +1,136 @@
+/*
+ * A header definition for dfd_cfg_adapter driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __DFD_CFG_ADAPTER_H__
+#define __DFD_CFG_ADAPTER_H__
+
+#define DFD_KO_CPLD_I2C_RETRY_SLEEP            (10)  /* ms */
+#define DFD_KO_CPLD_I2C_RETRY_TIMES            (50 / DFD_KO_CPLD_I2C_RETRY_SLEEP)
+
+#define DFD_KO_CPLD_GET_SLOT(addr)             ((addr >> 24) & 0xff)
+#define DFD_KO_CPLD_GET_ID(addr)               ((addr >> 16) & 0xff)
+#define DFD_KO_CPLD_GET_INDEX(addr)            (addr & 0xffff)
+#define DFD_KO_CPLD_MODE_I2C_STRING            "i2c"
+#define DFD_KO_CPLD_MODE_LPC_STRING            "lpc"
+
+#define DFD_KO_OTHER_I2C_GET_MAIN_ID(addr)     ((addr >> 24) & 0xff)
+#define DFD_KO_OTHER_I2C_GET_INDEX(addr)       ((addr >> 16) & 0xff)
+#define DFD_KO_OTHER_I2C_GET_OFFSET(addr)      (addr & 0xffff)
+#define DFD_SYSFS_PATH_MAX_LEN                 (64)
+
+typedef struct dfd_i2c_dev_s {
+    int bus;        /* bus number */
+    int addr;       /* Bus address */
+} dfd_i2c_dev_t;
+
+/* dfd_i2c_dev_t member macro */
+typedef enum dfd_i2c_dev_mem_s {
+    DFD_I2C_DEV_MEM_BUS,
+    DFD_I2C_DEV_MEM_ADDR,
+    DFD_I2C_DEV_MEM_END
+} dfd_i2c_dev_mem_t;
+
+typedef enum cpld_mode_e {
+    DFD_CPLD_MODE_I2C,     /* I2C bus */
+    DFD_CPLD_MODE_LPC,      /*LPC bus*/
+} cpld_mode_t;
+
+/* i2c access mode */
+typedef enum i2c_mode_e {
+    DFD_I2C_MODE_NORMAL_I2C,    /* I2C bus */
+    DFD_I2C_MODE_SMBUS,         /* SMBUS bus */
+} i2c_mode_t;
+
+/* Global variable */
+extern char *g_dfd_i2c_dev_mem_str[DFD_I2C_DEV_MEM_END];      /* dfd_i2c_dev_t member string */
+
+/**
+ * dfd_ko_cpld_read - cpld read operation
+ * @addr: Offset address
+ * @buf: data
+ *
+ * @returns: <0 Failed, others succeeded
+ */
+int32_t dfd_ko_cpld_read(int32_t addr, uint8_t *buf);
+
+/**
+ * dfd_ko_cpld_write - cpld write operation
+ * @addr: address
+ * @data: data
+ *
+ * @returns: <0 Failed, others succeeded
+ */
+int32_t dfd_ko_cpld_write(int32_t addr, uint8_t val);
+
+/**
+ * dfd_ko_i2c_read - I2C read operation
+ * @bus: I2C bus
+ * @addr: I2C device address
+ * @offset:register offset
+ * @buf:Read buffer
+ * @size:Read length
+ * @sysfs_name:sysfs attribute name
+ * @returns: <0 Failed, others succeeded
+ */
+int32_t dfd_ko_i2c_read(int bus, int addr, int offset, uint8_t *buf, uint32_t size, const char *sysfs_name);
+
+/**
+ * dfd_ko_i2c_write - I2C write operation
+ * @bus: I2C bus
+ * @addr: I2C device address
+ * @offset:register offset
+ * @buf:write buffer
+ * @size: write length
+ * @returns: <0 Failed, others succeeded
+ */
+int32_t dfd_ko_i2c_write(int bus, int addr, int offset, uint8_t *buf, uint32_t size);
+
+/**
+ * dfd_ko_read_file - File read operation
+ * @fpath: File path
+ * @addr: address
+ * @val: data
+ * @read_bytes: length
+ *
+ * @returns: <0 Failed, others succeeded
+ */
+int32_t dfd_ko_read_file(char *fpath, int32_t addr, uint8_t *val, int32_t read_bytes);
+
+/**
+ * dfd_ko_write_file - File write operation
+ * @fpath: File path
+ * @addr: address
+ * @val:  data
+ * @write_bytes: length
+ *
+ * @returns: <0 Failed, others succeeded
+ */
+int32_t dfd_ko_write_file(char *fpath, int32_t addr, uint8_t *val, int32_t write_bytes);
+
+/**
+ * dfd_ko_other_i2c_dev_read - other_i2c read operation
+ * @addr: address
+ * @val: data
+ * @read_len: length
+ *
+ * @returns: <0 Failed, others succeeded
+ */
+int32_t dfd_ko_other_i2c_dev_read(int32_t addr, uint8_t *value, int32_t read_len);
+#endif /* __DFD_CFG_ADAPTER_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg_file.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg_file.h
new file mode 100644
index 000000000000..4eba8aabbd49
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg_file.h
@@ -0,0 +1,101 @@
+/*
+ * A header definition for dfd_cfg_file driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __DFD_CFG_FILE_H__
+#define __DFD_CFG_FILE_H__
+
+#include <linux/types.h>
+
+/* Returned value */
+#define KFILE_RV_OK             (0)
+#define KFILE_RV_INPUT_ERR      (-1)    /* Entry error */
+#define KFILE_RV_STAT_FAIL      (-2)    /* Failed to obtain file properties. Procedure */
+#define KFILE_RV_OPEN_FAIL      (-3)    /* Failed to open file */
+#define KFILE_RV_MALLOC_FAIL    (-4)    /* Failed to allocate memory */
+#define KFILE_RV_RD_FAIL        (-5)    /* Read failure */
+#define KFILE_RV_ADDR_ERR       (-6)    /* Address error */
+#define KFILE_RV_WR_FAIL        (-7)    /* Address error */
+
+/* Whether it is a newline character */
+#define IS_CR(c)  ((c) == '\n')
+
+/* File operation control structure */
+typedef struct kfile_ctrl_s {
+    int32_t size;       /* File size */
+    int32_t pos;        /* Current position */
+    char *buf;          /* File cache */
+} kfile_ctrl_t;
+
+/*
+ * Open file
+ * @fname: filename
+ * @kfile_ctrl: File control variable
+ *
+ * @returns: 0 Succeeded, others failed
+ */
+int kfile_open(char *fname, kfile_ctrl_t *kfile_ctrl);
+
+/*
+ * Close file
+ * @kfile_ctrl: File control variable
+ */
+void kfile_close(kfile_ctrl_t *kfile_ctrl);
+
+/*
+ * Close file
+ * @kfile_ctrl: File control variable
+ *
+ * @returns: >=0 Succeeded. Others failed
+ */
+int kfile_gets(char *buf, int buf_size, kfile_ctrl_t *kfile_ctrl);
+
+/*
+ * Read data
+ * @buf: buf Buffer area
+ * @buf_size: buf size
+ * @kfile_ctrl: File control variable
+ *
+ * @returns: >=0 Succeeded. Others failed
+ */
+int kfile_read(int32_t addr, char *buf, int buf_size, kfile_ctrl_t *kfile_ctrl);
+
+/*
+ * Read data
+ * @buf: buf Buffer area
+ * @buf_size: buf size
+ * @kfile_ctrl: File control variable
+ *
+ * @returns: >=0 Succeeded. Others failed
+ */
+int kfile_iterate_dir(const char *dir_path, const char *obj_name, char *match_name, int len);
+
+#if 0
+/*
+ * Write data
+ * @fname: filename
+ * @addr: Offset address of the file written to
+ * @buf: Write data
+ * @buf_size: Data size
+ *
+ * @returns: >=0 Succeeded. Others failed
+ */
+int kfile_write(char *fpath, int32_t addr, char *buf, int buf_size);
+#endif
+#endif /* __DFD_CFG_FILE_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg_info.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg_info.h
new file mode 100644
index 000000000000..2e5dd2f3d645
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg_info.h
@@ -0,0 +1,192 @@
+/*
+ * A header definition for dfd_cfg_info driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __DFD_CFG_INFO_H__
+#define __DFD_CFG_INFO_H__
+
+#include <linux/types.h>
+
+/* num buf format data to convert to a numeric function pointer */
+typedef int (*info_num_buf_to_value_f)(uint8_t *num_buf, int buf_len, int *num_val);
+
+/* num buf format data to convert to a numeric function pointer */
+typedef int (*info_buf_to_buf_f)(uint8_t *buf, int buf_len, uint8_t *buf_new, int *buf_len_new);
+
+/* Information format judgment macro */
+#define IS_INFO_FRMT_BIT(frmt)      ((frmt) == INFO_FRMT_BIT)
+#define IS_INFO_FRMT_BYTE(frmt)     (((frmt) == INFO_FRMT_BYTE) || ((frmt) == INFO_FRMT_NUM_BYTES))
+#define IS_INFO_FRMT_NUM_STR(frmt)  ((frmt) == INFO_FRMT_NUM_STR)
+#define IS_INFO_FRMT_NUM_BUF(frmt)  ((frmt) == INFO_FRMT_NUM_BUF)
+#define IS_INFO_FRMT_BUF(frmt)      ((frmt) == INFO_FRMT_BUF)
+
+/* INT Validity judgment of information length */
+#define INFO_INT_MAX_LEN            (32)
+#define INFO_INT_LEN_VALAID(len)    (((len) > 0) && ((len) < INFO_INT_MAX_LEN))
+
+/* buf Validity judgment of information length */
+#define INFO_BUF_MAX_LEN            (128)
+#define INFO_BUF_LEN_VALAID(len)    (((len) > 0) && ((len) < INFO_BUF_MAX_LEN))
+
+/* Determine the validity of information bit offset */
+#define INFO_BIT_OFFSET_VALID(bit_offset)   (((bit_offset) >= 0) && ((bit_offset) < 8))
+
+/* Information control mode */
+typedef enum info_ctrl_mode_e {
+    INFO_CTRL_MODE_NONE,
+    INFO_CTRL_MODE_CFG,      /* Configuration mode */
+    INFO_CTRL_MODE_CONS,     /* macromode */
+    INFO_CTRL_MODE_TLV,      /* TLV mode */
+    INFO_CTRL_MODE_SRT_CONS, /* String constant*/
+    INFO_CTRL_MODE_END
+} info_ctrl_mode_t;
+
+/* Information format */
+typedef enum info_frmt_e {
+    INFO_FRMT_NONE,
+    INFO_FRMT_BIT,          /* Single or multiple bits, not more than 8 bits */
+    INFO_FRMT_BYTE,         /* Single byte */
+    INFO_FRMT_NUM_BYTES,    /* Multiple byte values, up to sizeof(int) */
+    INFO_FRMT_NUM_STR,      /* String value */
+    INFO_FRMT_NUM_BUF,      /* String value */
+    INFO_FRMT_BUF,          /* Multiple bytes */
+    INFO_FRMT_END
+} info_frmt_t;
+
+/* Information source */
+typedef enum info_src_e {
+    INFO_SRC_NONE,
+    INFO_SRC_CPLD,          /* CPLD equipment */
+    INFO_SRC_FPGA,          /* FPGA equipment */
+    INFO_SRC_OTHER_I2C,     /* other i2c equipment */
+    INFO_SRC_FILE,          /* file */
+    INFO_SRC_END
+} info_src_t;
+
+/* Polarity of information */
+typedef enum info_pola_e {
+    INFO_POLA_NONE,
+    INFO_POLA_POSI,         /* Positive polarity bit value 1 Valid value high bytes saved in the source low address space */
+    INFO_POLA_NEGA,         /* Negative polarity bit value 0 Effective value high bytes saved in the source high address space */
+    INFO_POLA_END
+} info_pola_t;
+
+/* Information control structure */
+#define INFO_FPATH_MAX_LEN     (128)  /* Maximum length of the file source path */
+#define INFO_STR_CONS_MAX_LEN  (64)   /* Maximum length of a string constant */
+typedef struct info_ctrl_s {
+    info_ctrl_mode_t mode;          /* mode */
+    int32_t int_cons;               /* Only the int type is supported */
+    info_src_t src;                 /* source */
+    info_frmt_t frmt;               /* format */
+    info_pola_t pola;               /* polarity */
+    char fpath[INFO_FPATH_MAX_LEN]; /* File path, only the file source information */
+    int32_t addr;                   /* address */
+    int32_t len;                    /* Length, bit length, or byte length */
+    int32_t bit_offset;             /* Offset number of bits in the address */
+    char str_cons[INFO_STR_CONS_MAX_LEN]; /* String constant */
+    int32_t int_extra1;             /* int type reserved */
+    int32_t int_extra2;
+    int32_t int_extra3;             /* cpld voltage mode */
+} info_ctrl_t;
+
+/* info_ctrl_t member macro */
+typedef enum info_ctrl_mem_s {
+    INFO_CTRL_MEM_MODE,
+    INFO_CTRL_MEM_INT_CONS,
+    INFO_CTRL_MEM_SRC,
+    INFO_CTRL_MEM_FRMT,
+    INFO_CTRL_MEM_POLA,
+    INFO_CTRL_MEM_FPATH,
+    INFO_CTRL_MEM_ADDR,
+    INFO_CTRL_MEM_LEN,
+    INFO_CTRL_MEM_BIT_OFFSET,
+    INFO_CTRL_MEM_STR_CONS,
+    INFO_CTRL_MEM_INT_EXTRA1,
+    INFO_CTRL_MEM_INT_EXTRA2,
+    INFO_CTRL_MEM_INT_EXTRA3,
+    INFO_CTRL_MEM_END
+} info_ctrl_mem_t;
+
+/* sensor data format */
+typedef enum sensor_format_mem_s {
+    LINEAR11 = 1,
+    LINEAR16 = 2,
+    TMP464   = 3,
+    MAC_TH5  = 4,
+    MAC_TH4  = 5,
+} sensor_format_mem_t;
+
+/* hwmon data format conversion */
+typedef int (*info_hwmon_buf_f)(uint8_t *buf, int buf_len, uint8_t *buf_new, int *buf_len_new,
+                info_ctrl_t *info_ctrl, int coefficient, int addend);
+
+/* Global variable */
+extern char *g_info_ctrl_mem_str[INFO_CTRL_MEM_END];  /* info_ctrl_t member string */
+extern char *g_info_src_str[INFO_SRC_END];            /* info_src_t enumeration string */
+extern char *g_info_frmt_str[INFO_FRMT_END];          /* info_frmt_t enumeration string */
+extern char *g_info_pola_str[INFO_POLA_END];          /* info_pola_t enumeration string */
+extern char *g_info_ctrl_mode_str[INFO_CTRL_MODE_END];/* info_ctrl_mode_t enumeration string */
+
+/**
+ * dfd_info_get_int - Get int type information
+ * @key: Search keyword of the configuration item
+ * @ret: int type information
+ * @pfun: num Data conversion function of type buf
+ *
+ * @returns: 0 succeeds, <0 fails
+ */
+int dfd_info_get_int(uint64_t key, int *ret, info_num_buf_to_value_f pfun);
+
+/**
+ * dfd_info_get_buf - Get buf type information
+ * @key: Search keyword of the configuration item
+ * @buf: Information buf
+ * @buf_len: buf length, which must be no less than info_ctrl->len
+ * @pfun: Data conversion function pointer
+ *
+ * @returns: 0 succeeds, <0 fails
+ */
+int dfd_info_get_buf(uint64_t key, uint8_t *buf, int buf_len, info_buf_to_buf_f pfun);
+
+/**
+ * dfd_info_set_int - Set the int type information
+ * @key: Search keyword of the configuration item
+ * @val: int type information
+ *
+ * @returns: 0 succeeds, <0 fails
+ */
+int dfd_info_set_int(uint64_t key, int val);
+
+/**
+ * dfd_info_get_sensor - Get sensors
+ * @key: HWMON Configures the key
+ * @buf: Result storage
+ * @buf_len: buf length
+ *
+ * @returns: <0 Failed, others succeeded
+ */
+int dfd_info_get_sensor(uint64_t key, char *buf, int buf_len, info_hwmon_buf_f pfun);
+
+/**
+ * @buf:Input and result store
+ *
+ */
+void dfd_info_del_no_print_string(char *buf);
+#endif /* __DFD_CFG_INFO_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg_listnode.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg_listnode.h
new file mode 100644
index 000000000000..8b2b12ad512a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg_listnode.h
@@ -0,0 +1,80 @@
+/*
+ * A header definition for dfd_cfg_listnode driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __DFD_CFG_LISTNODE_H__
+#define __DFD_CFG_LISTNODE_H__
+
+#include <linux/list.h>
+
+/* Returned value */
+#define LNODE_RV_OK             (0)
+#define LNODE_RV_INPUT_ERR      (-1)    /* Entry error */
+#define LNODE_RV_NODE_EXIST     (-2)    /* Node already exists */
+#define LNODE_RV_NOMEM          (-3)    /* Node already exists */
+
+/* Root node public structure */
+typedef struct lnode_root_s {
+    struct list_head root;
+} lnode_root_t;
+
+/* Node structure */
+typedef struct lnode_node_s {
+    struct list_head lst;
+
+    uint64_t key;               /* Node search index value */
+    void *data;                 /* The actual data pointer */
+} lnode_node_t;
+
+/**
+ * Find node
+ * @root: Root node pointer
+ * @key: Node index value
+ *
+ * @return : Node data pointer,NULL failed
+ */
+void *lnode_find_node(lnode_root_t *root, uint64_t key);
+
+/**
+ * Insert node
+ * @root: Root node pointer
+ * @key: Node index value
+ * @data: data
+ *
+ * @return : 0-- success, other failures
+ */
+int lnode_insert_node(lnode_root_t *root, uint64_t key, void *data);
+
+/**
+ * Example Initialize the root node
+ * @root: Root node pointer
+ *
+ * @return : 0-- success, other failures
+ */
+int lnode_init_root(lnode_root_t *root);
+
+/**
+ * Free linked list
+ * @root: Root node pointer
+ *
+ * @return : void
+ */
+void lnode_free_list(lnode_root_t *root);
+
+#endif /* __DFD_CFG_LISTNODE_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_frueeprom.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_frueeprom.h
new file mode 100644
index 000000000000..a95943c5a90d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_frueeprom.h
@@ -0,0 +1,107 @@
+/*
+ * A header definition for dfd_cfg_frueeprom driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _DFD_FRUEEPROM_H_
+#define _DFD_FRUEEPROM_H_
+
+/* Per IPMI v2.0 FRU specification */
+typedef struct fru_common_header_s {
+    uint8_t fixed;
+    uint8_t internal_offset;
+    uint8_t chassis_offset;
+    uint8_t board_offset;
+    uint8_t product_offset;
+    uint8_t multi_offset;
+    uint8_t pad;
+    uint8_t crc;
+} __attribute__((packed)) fru_common_header_t;
+
+/* first byte in header is 1h per IPMI V2 spec. */
+
+#define IPMI_FRU_HDR_BYTE_ZERO   1
+#define IPMI_EIGHT_BYTES         8
+#define IPMI_FRU_PRODUCT_AREA_MIN_LEN       (7)
+#define IPMI_FRU_BOARD_AREA_MIN_LEN         (5)
+
+#define IPMI_FRU_AREA_TYPE_LENGTH_FIELD_MAX            512
+#define IPMI_FRU_BOARD_INFO_MFG_TIME_LENGTH            3
+#define IPMI_FRU_SENTINEL_VALUE                        0xC1
+#define IPMI_FRU_TYPE_LENGTH_TYPE_CODE_MASK            0xC0
+#define IPMI_FRU_TYPE_LENGTH_TYPE_CODE_SHIFT           0x06
+#define IPMI_FRU_TYPE_LENGTH_NUMBER_OF_DATA_BYTES_MASK 0x3F
+#define IPMI_FRU_TYPE_LENGTH_TYPE_CODE_LANGUAGE_CODE   0x03
+
+struct ipmi_fru_field {
+    uint8_t type_length_field[IPMI_FRU_AREA_TYPE_LENGTH_FIELD_MAX];
+    /* store length of data stored in buffer */
+    unsigned int type_length_field_length;
+};
+
+typedef struct ipmi_fru_field ipmi_fru_field_t;
+
+typedef struct ipmi_product_info_s {
+    uint8_t *language_code;
+    ipmi_fru_field_t *product_manufacturer_name;
+    ipmi_fru_field_t *product_name;
+    ipmi_fru_field_t *product_part_model_number;
+    ipmi_fru_field_t *product_version;
+    ipmi_fru_field_t *product_serial_number;
+    ipmi_fru_field_t *product_asset_tag;
+    ipmi_fru_field_t *product_fru_file_id;
+    ipmi_fru_field_t *product_custom_fields;
+    ipmi_fru_field_t *product_type_fields;
+} ipmi_product_info_t;
+
+typedef struct ipmi_board_info_s {
+    uint8_t *language_code;
+    uint8_t *mfg_time;
+    ipmi_fru_field_t *board_manufacturer;
+    ipmi_fru_field_t *board_product_name;
+    ipmi_fru_field_t *board_serial_number;
+    ipmi_fru_field_t *board_part_number;
+    ipmi_fru_field_t *board_fru_file_id;
+    ipmi_fru_field_t *board_custom_fields;  /*hw version */
+} ipmi_board_info_t;
+
+/**
+ * dfd_get_fru_data - Obtain product area FRU information
+ * @bus:FRU E2 bus number
+ * @dev_addr:FRU E2 Device address
+ * @type: 2: Product name, 3: product serial number 5: hardware version number 6: product ID
+ * @buf:Data is stored in buf
+ * @buf_len:buf length
+ * @sysfs_name:sysfs attribute name
+ * @returns: 0 success, negative value: failed
+ */
+int dfd_get_fru_data(int bus, int dev_addr, int type, uint8_t *buf, uint32_t buf_len, const char *sysfs_name);
+
+/**
+ * dfd_get_fru_board_data - Obtain the FRU information of the board area
+ * @bus:FRU E2 bus number
+ * @dev_addr:FRU E2 Device address
+ * @type: 2: Product name, 3: product serial number 5: hardware version number
+ * @buf:Data is stored in buf
+ * @buf_len:buf length
+ * @sysfs_name:sysfs attribute name
+ * @returns: 0 success, negative value: failed
+ */
+int dfd_get_fru_board_data(int bus, int dev_addr, int type, uint8_t *buf, uint32_t buf_len, const char *sysfs_name);
+
+#endif /* endif _DFD_FRUEEPROM_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_sysfs_common.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_sysfs_common.h
new file mode 100644
index 000000000000..994bb2387ddb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_sysfs_common.h
@@ -0,0 +1,251 @@
+/*
+ * A header definition for dfd_sysfs_common driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _DFD_SYSFS_COMMON_H_
+#define _DFD_SYSFS_COMMON_H_
+
+struct switch_drivers_s {
+    /* temperature sensors */
+    int (*get_main_board_temp_number)(void);
+    ssize_t (*get_main_board_temp_alias)(unsigned int temp_index, char *buf, size_t count);
+    ssize_t (*get_main_board_temp_type)(unsigned int temp_index, char *buf, size_t count);
+    ssize_t (*get_main_board_temp_max)(unsigned int temp_index, char *buf, size_t count);
+    int (*set_main_board_temp_max)(unsigned int temp_index, const char *buf, size_t count);
+    ssize_t (*get_main_board_temp_min)(unsigned int temp_index, char *buf, size_t count);
+    int (*set_main_board_temp_min)(unsigned int temp_index, const char *buf, size_t count);
+    ssize_t (*get_main_board_temp_value)(unsigned int temp_index, char *buf, size_t count);
+    ssize_t (*get_main_board_temp_high)(unsigned int temp_index, char *buf, size_t count);
+    ssize_t (*get_main_board_temp_low)(unsigned int temp_index, char *buf, size_t count);
+    ssize_t (*get_main_board_temp_monitor_flag)(unsigned int temp_index, char *buf, size_t count);
+    /* voltage sensors */
+    int (*get_main_board_vol_number)(void);
+    ssize_t (*get_main_board_vol_alias)(unsigned int vol_index, char *buf, size_t count);
+    ssize_t (*get_main_board_vol_type)(unsigned int vol_index, char *buf, size_t count);
+    ssize_t (*get_main_board_vol_max)(unsigned int vol_index, char *buf, size_t count);
+    int (*set_main_board_vol_max)(unsigned int vol_index, const char *buf, size_t count);
+    ssize_t (*get_main_board_vol_min)(unsigned int vol_index, char *buf, size_t count);
+    int (*set_main_board_vol_min)(unsigned int vol_index, const char *buf, size_t count);
+    ssize_t (*get_main_board_vol_range)(unsigned int vol_index, char *buf, size_t count);
+    ssize_t (*get_main_board_vol_nominal_value)(unsigned int vol_index, char *buf, size_t count);
+    ssize_t (*get_main_board_vol_value)(unsigned int vol_index, char *buf, size_t count);
+    ssize_t (*get_main_board_vol_monitor_flag)(unsigned int vol_index, char *buf, size_t count);
+    /* current sensors */
+    int (*get_main_board_curr_number)(void);
+    ssize_t (*get_main_board_curr_alias)(unsigned int curr_index, char *buf, size_t count);
+    ssize_t (*get_main_board_curr_type)(unsigned int curr_index, char *buf, size_t count);
+    ssize_t (*get_main_board_curr_max)(unsigned int curr_index, char *buf, size_t count);
+    int (*set_main_board_curr_max)(unsigned int curr_index, const char *buf, size_t count);
+    ssize_t (*get_main_board_curr_min)(unsigned int curr_index, char *buf, size_t count);
+    int (*set_main_board_curr_min)(unsigned int curr_index, const char *buf, size_t count);
+    ssize_t (*get_main_board_curr_value)(unsigned int curr_index, char *buf, size_t count);
+    ssize_t (*get_main_board_curr_monitor_flag)(unsigned int curr_index, char *buf, size_t count);
+    /* syseeprom */
+    int (*get_syseeprom_size)(void);
+    ssize_t (*read_syseeprom_data)(char *buf, loff_t offset, size_t count);
+    ssize_t (*write_syseeprom_data)(char *buf, loff_t offset, size_t count);
+    /* fan */
+    int (*get_fan_number)(void);
+    int (*get_fan_motor_number)(unsigned int fan_index);
+    ssize_t (*get_fan_model_name)(unsigned int fan_index, char *buf, size_t count);
+    ssize_t (*get_fan_vendor)(unsigned int fan_index, char *buf, size_t count);
+    ssize_t (*get_fan_serial_number)(unsigned int fan_index, char *buf, size_t count);
+    ssize_t (*get_fan_part_number)(unsigned int fan_index, char *buf, size_t count);
+    ssize_t (*get_fan_hardware_version)(unsigned int fan_index, char *buf, size_t count);
+    ssize_t (*get_fan_status)(unsigned int fan_index, char *buf, size_t count);
+    ssize_t (*get_fan_present)(unsigned int fan_index, char *buf, size_t count);
+    ssize_t (*get_fan_led_status)(unsigned int fan_index, char *buf, size_t count);
+    int (*set_fan_led_status)(unsigned int fan_index, int status);
+    ssize_t (*get_fan_direction)(unsigned int fan_index, char *buf, size_t count);
+    ssize_t (*get_fan_motor_status)(unsigned int fan_index, unsigned int motor_index, char *buf, size_t count);
+    ssize_t (*get_fan_motor_speed)(unsigned int fan_index, unsigned int motor_index, char *buf, size_t count);
+    ssize_t (*get_fan_motor_speed_tolerance)(unsigned int fan_index, unsigned int motor_index, char *buf, size_t count);
+    ssize_t (*get_fan_motor_speed_target)(unsigned int fan_index, unsigned int motor_index, char *buf, size_t count);
+    ssize_t (*get_fan_motor_speed_max)(unsigned int fan_index, unsigned int motor_index, char *buf, size_t count);
+    ssize_t (*get_fan_motor_speed_min)(unsigned int fan_index, unsigned int motor_index, char *buf, size_t count);
+    ssize_t (*get_fan_ratio)(unsigned int fan_index, char *buf, size_t count);
+    int (*set_fan_ratio)(unsigned int fan_index, int ratio);
+    /* PSU */
+    int (*get_psu_number)(void);
+    int (*get_psu_temp_number)(unsigned int psu_index);
+    ssize_t (*get_psu_model_name)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_vendor)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_date)(unsigned int psu_index, char *buf, size_t count);
+	ssize_t (*get_psu_status)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_hw_status)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_alarm)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_serial_number)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_part_number)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_hardware_version)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_type)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_in_curr)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_in_vol)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_in_power)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_out_curr)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_out_vol)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_out_power)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_out_max_power)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_present_status)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_in_status)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_out_status)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_status_pmbus)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_fan_speed)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_fan_ratio)(unsigned int psu_index, char *buf, size_t count);
+    int (*set_psu_fan_ratio)(unsigned int psu_index, int ratio);
+    ssize_t (*get_psu_fan_direction)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_led_status)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_fan_speed_cal)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_temp_alias)(unsigned int psu_index, unsigned int temp_index, char *buf, size_t count);
+    ssize_t (*get_psu_temp_type)(unsigned int psu_index, unsigned int temp_index, char *buf, size_t count);
+    ssize_t (*get_psu_temp_max)(unsigned int psu_index, unsigned int temp_index, char *buf, size_t count);
+    int (*set_psu_temp_max)(unsigned int psu_index, unsigned int temp_index, const char *buf, size_t count);
+    ssize_t (*get_psu_temp_min)(unsigned int psu_index, unsigned int temp_index, char *buf, size_t count);
+    int (*set_psu_temp_min)(unsigned int psu_index, unsigned int temp_index, const char *buf, size_t count);
+    ssize_t (*get_psu_temp_value)(unsigned int psu_index, unsigned int temp_index, char *buf, size_t count);
+    ssize_t (*get_psu_attr_threshold)(unsigned int psu_index, unsigned int type,  char *buf, size_t count);
+    int (*get_psu_eeprom_size)(unsigned int psu_index);
+    ssize_t (*read_psu_eeprom_data)(unsigned int psu_index, char *buf, loff_t offset, size_t count);
+    ssize_t (*get_psu_blackbox_info)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_pmbus_info)(unsigned int psu_index, char *buf, size_t count);
+    int (*clear_psu_blackbox)(unsigned int psu_index, uint8_t value);
+    /* transceiver */
+    int (*get_eth_number)(void);
+    ssize_t (*get_transceiver_power_on_status)(char *buf, size_t count);
+    int (*set_transceiver_power_on_status)(int status);
+    ssize_t (*get_transceiver_present_status)(char *buf, size_t count);
+    ssize_t (*get_eth_power_on_status)(unsigned int eth_index, char *buf, size_t count);
+    int (*set_eth_power_on_status)(unsigned int eth_index, int status);
+    ssize_t (*get_eth_tx_fault_status)(unsigned int eth_index, char *buf, size_t count);
+    ssize_t (*get_eth_tx_disable_status)(unsigned int eth_index, char *buf, size_t count);
+    int (*set_eth_tx_disable_status)(unsigned int eth_index, int status);
+    ssize_t (*get_eth_present_status)(unsigned int eth_index, char *buf, size_t count);
+    ssize_t (*get_eth_rx_los_status)(unsigned int eth_index, char *buf, size_t count);
+    ssize_t (*get_eth_reset_status)(unsigned int eth_index, char *buf, size_t count);
+    int (*set_eth_reset_status)(unsigned int eth_index, int status);
+    ssize_t (*get_eth_low_power_mode_status)(unsigned int eth_index, char *buf, size_t count);
+    ssize_t (*get_eth_interrupt_status)(unsigned int eth_index, char *buf, size_t count);
+    int (*get_eth_eeprom_size)(unsigned int eth_index);
+    ssize_t (*read_eth_eeprom_data)(unsigned int eth_index, char *buf, loff_t offset, size_t count);
+    ssize_t (*write_eth_eeprom_data)(unsigned int eth_index, char *buf, loff_t offset, size_t count);
+    ssize_t (*get_eth_optoe_type)(unsigned int sff_index, int *optoe_type, char *buf, size_t count);
+    int (*set_eth_optoe_type)(unsigned int sff_index, int optoe_type);
+    /* sysled */
+    ssize_t (*get_sys_led_status)(char *buf, size_t count);
+    int (*set_sys_led_status)(int status);
+    ssize_t (*get_bmc_led_status)(char *buf, size_t count);
+    int (*set_bmc_led_status)(int status);
+    ssize_t (*get_sys_fan_led_status)(char *buf, size_t count);
+    int (*set_sys_fan_led_status)(int status);
+    ssize_t (*get_sys_psu_led_status)(char *buf, size_t count);
+    int (*set_sys_psu_led_status)(int status);
+    ssize_t (*get_id_led_status)(char *buf, size_t count);
+    int (*set_id_led_status)(int status);
+    /* FPGA */
+    int (*get_main_board_fpga_number)(void);
+    ssize_t (*get_main_board_fpga_alias)(unsigned int fpga_index, char *buf, size_t count);
+    ssize_t (*get_main_board_fpga_type)(unsigned int fpga_index, char *buf, size_t count);
+    ssize_t (*get_main_board_fpga_firmware_version)(unsigned int fpga_index, char *buf, size_t count);
+    ssize_t (*get_main_board_fpga_board_version)(unsigned int fpga_index, char *buf, size_t count);
+    ssize_t (*get_main_board_fpga_test_reg)(unsigned int fpga_index, char *buf, size_t count);
+    int (*set_main_board_fpga_test_reg)(unsigned int fpga_index, unsigned int value);
+    /* CPLD */
+    int (*get_main_board_cpld_number)(void);
+    ssize_t (*get_main_board_cpld_alias)(unsigned int cpld_index, char *buf, size_t count);
+    ssize_t (*get_main_board_cpld_type)(unsigned int cpld_index, char *buf, size_t count);
+    ssize_t (*get_main_board_cpld_firmware_version)(unsigned int cpld_index, char *buf, size_t count);
+    ssize_t (*get_main_board_cpld_board_version)(unsigned int cpld_index, char *buf, size_t count);
+    ssize_t (*get_main_board_cpld_test_reg)(unsigned int cpld_index, char *buf, size_t count);
+    int (*set_main_board_cpld_test_reg)(unsigned int cpld_index, unsigned int value);
+    /* watchdog */
+    ssize_t (*get_watchdog_identify)(char *buf, size_t count);
+    ssize_t (*get_watchdog_timeleft)(char *buf, size_t count);
+    ssize_t (*get_watchdog_timeout)(char *buf, size_t count);
+    int (*set_watchdog_timeout)(int value);
+    ssize_t (*get_watchdog_enable_status)(char *buf, size_t count);
+    int (*set_watchdog_enable_status)(int value);
+    int (*set_watchdog_reset)(int value);
+    /* slot */
+    int (*get_slot_number)(void);
+    int (*get_slot_temp_number)(unsigned int slot_index);
+    int (*get_slot_vol_number)(unsigned int slot_index);
+    int (*get_slot_curr_number)(unsigned int slot_index);
+    int (*get_slot_cpld_number)(unsigned int slot_index);
+    int (*get_slot_fpga_number)(unsigned int slot_index);
+    ssize_t (*get_slot_model_name)(unsigned int slot_index, char *buf, size_t count);
+    ssize_t (*get_slot_vendor)(unsigned int slot_index, char *buf, size_t count);
+    ssize_t (*get_slot_serial_number)(unsigned int slot_index, char *buf, size_t count);
+    ssize_t (*get_slot_part_number)(unsigned int slot_index, char *buf, size_t count);
+    ssize_t (*get_slot_hardware_version)(unsigned int slot_index, char *buf, size_t count);
+    ssize_t (*get_slot_status)(unsigned int slot_index, char *buf, size_t count);
+    ssize_t (*get_slot_led_status)(unsigned int slot_index, char *buf, size_t count);
+    int (*set_slot_led_status)(unsigned int slot_index, int status);
+    ssize_t (*get_slot_power_status)(unsigned int slot_index, char *buf, size_t count);
+    int (*set_slot_power_status)(unsigned int slot_index, int status);
+    ssize_t (*get_slot_temp_alias)(unsigned int slot_index, unsigned int temp_index, char *buf, size_t count);
+    ssize_t (*get_slot_temp_type)(unsigned int slot_index, unsigned int temp_index, char *buf, size_t count);
+    ssize_t (*get_slot_temp_max)(unsigned int slot_index, unsigned int temp_index, char *buf, size_t count);
+    int (*set_slot_temp_max)(unsigned int slot_index, unsigned int temp_index, const char *buf, size_t count);
+    ssize_t (*get_slot_temp_min)(unsigned int slot_index, unsigned int temp_index, char *buf, size_t count);
+    int (*set_slot_temp_min)(unsigned int slot_index, unsigned int temp_index, const char *buf, size_t count);
+    ssize_t (*get_slot_temp_value)(unsigned int slot_index, unsigned int temp_index, char *buf, size_t count);
+    ssize_t (*get_slot_vol_alias)(unsigned int slot_index, unsigned int vol_index, char *buf, size_t count);
+    ssize_t (*get_slot_vol_type)(unsigned int slot_index, unsigned int vol_index, char *buf, size_t count);
+    ssize_t (*get_slot_vol_max)(unsigned int slot_index, unsigned int vol_index, char *buf, size_t count);
+    int (*set_slot_vol_max)(unsigned int slot_index, unsigned int vol_index, const char *buf, size_t count);
+    ssize_t (*get_slot_vol_min)(unsigned int slot_index, unsigned int vol_index, char *buf, size_t count);
+    int (*set_slot_vol_min)(unsigned int slot_index, unsigned int vol_index, const char *buf, size_t count);
+    ssize_t (*get_slot_vol_range)(unsigned int slot_index, unsigned int vol_index, char *buf, size_t count);
+    ssize_t (*get_slot_vol_nominal_value)(unsigned int slot_index, unsigned int vol_index, char *buf, size_t count);
+    ssize_t (*get_slot_vol_value)(unsigned int slot_index, unsigned int vol_index, char *buf, size_t count);
+    ssize_t (*get_slot_curr_alias)(unsigned int slot_index, unsigned int curr_index, char *buf, size_t count);
+    ssize_t (*get_slot_curr_type)(unsigned int slot_index, unsigned int curr_index, char *buf, size_t count);
+    ssize_t (*get_slot_curr_max)(unsigned int slot_index, unsigned int curr_index, char *buf, size_t count);
+    int (*set_slot_curr_max)(unsigned int slot_index, unsigned int curr_index, const char *buf, size_t count);
+    ssize_t (*get_slot_curr_min)(unsigned int slot_index, unsigned int curr_index, char *buf, size_t count);
+    int (*set_slot_curr_min)(unsigned int slot_index, unsigned int curr_index, const char *buf, size_t count);
+    ssize_t (*get_slot_curr_value)(unsigned int slot_index, unsigned int curr_index, char *buf, size_t count);
+    ssize_t (*get_slot_fpga_alias)(unsigned int slot_index, unsigned int fpga_index, char *buf, size_t count);
+    ssize_t (*get_slot_fpga_type)(unsigned int slot_index, unsigned int fpga_index, char *buf, size_t count);
+    ssize_t (*get_slot_fpga_firmware_version)(unsigned int slot_index, unsigned int fpga_index, char *buf, size_t count);
+    ssize_t (*get_slot_fpga_board_version)(unsigned int slot_index, unsigned int fpga_index, char *buf, size_t count);
+    ssize_t (*get_slot_fpga_test_reg)(unsigned int slot_index, unsigned int fpga_index, char *buf, size_t count);
+    int (*set_slot_fpga_test_reg)(unsigned int slot_index, unsigned int fpga_index, unsigned int value);
+    ssize_t (*get_slot_cpld_alias)(unsigned int slot_index, unsigned int cpld_index, char *buf, size_t count);
+    ssize_t (*get_slot_cpld_type)(unsigned int slot_index, unsigned int cpld_index, char *buf, size_t count);
+    ssize_t (*get_slot_cpld_firmware_version)(unsigned int slot_index, unsigned int cpld_index, char *buf, size_t count);
+    ssize_t (*get_slot_cpld_board_version)(unsigned int slot_index, unsigned int cpld_index, char *buf, size_t count);
+    ssize_t (*get_slot_cpld_test_reg)(unsigned int slot_index, unsigned int cpld_index, char *buf, size_t count);
+    int (*set_slot_cpld_test_reg)(unsigned int slot_index, unsigned int cpld_index, unsigned int value);
+    /* system */
+    ssize_t (*get_system_value)(unsigned int type, int *value, char *buf, size_t count);
+    ssize_t (*set_system_value)(unsigned int type, int value);
+    ssize_t (*get_system_port_power_status)(unsigned int type, char *buf, size_t count);
+    /* eeprom */
+    int (*get_eeprom_number)(void);
+    int (*get_eeprom_size)(unsigned int e2_index);
+    ssize_t (*get_eeprom_alias)(unsigned int e2_index, char *buf, size_t count);
+    ssize_t (*get_eeprom_tag)(unsigned int e2_index, char *buf, size_t count);
+    ssize_t (*get_eeprom_type)(unsigned int e2_index, char *buf, size_t count);
+    ssize_t (*read_eeprom_data)(unsigned int e2_index, char *buf, loff_t offset, size_t count);
+    ssize_t (*write_eeprom_data)(unsigned int e2_index, char *buf, loff_t offset, size_t count);
+};
+
+extern struct switch_drivers_s * s3ip_switch_driver_get(void);
+
+#endif /*_DFD_SYSFS_COMMON_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_tlveeprom.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_tlveeprom.h
new file mode 100644
index 000000000000..75e0f06bd305
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_tlveeprom.h
@@ -0,0 +1,91 @@
+/*
+ * A header definition for dfd_tlveeprom driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _DFD_TLVEEPROM_H_
+#define _DFD_TLVEEPROM_H_
+
+#ifndef be16_to_cpu
+#define be16_to_cpu(x)   ntohs(x)
+#endif
+
+#ifndef cpu_to_be16
+#define cpu_to_be16(x)   htons(x)
+#endif
+
+#define TLV_CODE_NAME_LEN 64
+
+/*
+ *  Struct for displaying the TLV codes and names.
+ */
+struct tlv_code_desc {
+    uint8_t m_code;
+    char m_name[TLV_CODE_NAME_LEN];
+};
+
+/* ONIE TLV Type Type and extended TLV type definition */
+typedef struct dfd_tlv_type_s {
+    uint8_t main_type;    /* ONIE standard TLV TYPE */
+    uint8_t ext_type;     /* Extended TLV TYPE type */
+} dfd_tlv_type_t;
+
+/* Header Field Constants */
+#define TLV_INFO_ID_STRING      "TlvInfo"
+#define TLV_INFO_VERSION        0x01
+
+struct __attribute__ ((__packed__)) tlvinfo_header_s {
+    char    signature[8];   /* 0x00 - 0x07 EEPROM Tag "TlvInfo" */
+    uint8_t      version;  /* 0x08        Structure version */
+    uint16_t     totallen; /* 0x09 - 0x0A Length of all data which follows */
+};
+typedef struct tlvinfo_header_s tlvinfo_header_t;
+
+/*
+ * TlvInfo TLV: Layout of a TLV field
+ */
+struct __attribute__ ((__packed__)) tlvinfo_tlv_s {
+    uint8_t  type;
+    uint8_t  length;
+    uint8_t  value[0];
+};
+typedef struct tlvinfo_tlv_s tlvinfo_tlv_t;
+
+#define TLV_VALUE_MAX_LEN        255
+/*
+ * The max decode value is currently for the 'raw' type or the 'vendor
+ * extension' type, both of which have the same decode format.  The
+ * max decode string size is computed as follows:
+ *
+ *   strlen(" 0xFF") * TLV_VALUE_MAX_LEN + 1
+ *
+ */
+#define TLV_DECODE_VALUE_MAX_LEN    ((5 * TLV_VALUE_MAX_LEN) + 1)
+
+typedef struct tlv_decode_value_s {
+    uint8_t value[TLV_DECODE_VALUE_MAX_LEN];
+    uint32_t length;
+} tlv_decode_value_t;
+
+typedef enum dfd_tlvinfo_ext_tlv_type_e {
+    DFD_TLVINFO_EXT_TLV_TYPE_DEV_TYPE   = 1,
+} dfd_tlvinfo_ext_tlv_type_t;
+
+int dfd_tlvinfo_get_e2prom_info(uint8_t *eeprom, uint32_t size, dfd_tlv_type_t *tlv_type, uint8_t* buf, uint32_t *buf_len);
+
+#endif /* endif _DFD_TLVEEPROM_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/switch_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/switch_driver.h
new file mode 100644
index 000000000000..7ab38f42d367
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/switch_driver.h
@@ -0,0 +1,101 @@
+/*
+ * A header definition for switch_driver driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _SWITCH_DRIVER_H_
+#define _SWITCH_DRIVER_H_
+
+#define SWITCH_DEV_NO_SUPPORT         "NA"
+#define SWITCH_DEV_ERROR              "ACCESS FAILED"
+#define WB_SYSFS_RV_UNSUPPORT         (999)
+
+typedef enum dbg_level_e {
+    DBG_VERBOSE = 0x01,
+    DBG_WARN    = 0x02,
+    DBG_ERROR   = 0x04,
+} dbg_level_t;
+
+typedef enum fan_status_e {
+    FAN_STATUS_ABSENT  = 0,
+    FAN_STATUS_OK      = 1,
+    FAN_STATUS_NOT_OK  = 2,
+} fan_status_t;
+
+typedef enum led_status_e {
+    LED_STATUS_DARK         = 0,
+    LED_STATUS_GREEN        = 1,
+    LED_STATUS_YELLOW       = 2,
+    LED_STATUS_RED          = 3,
+    LED_STATUS_BLUE         = 4,
+    LED_STATUS_GREEN_FLASH  = 5,
+    LED_STATUS_YELLOW_FLASH = 6,
+    LED_STATUS_RED_FLASH    = 7,
+} led_status_t;
+
+typedef enum air_flow_direction_e {
+    F2B = 0, /* air enters from the front of the cabinet, and exhausts from the back */
+    B2F = 1, /* air enters from the back of the cabinet, and exhausts from the front */
+} air_flow_direction_t;
+
+typedef enum psu_input_type_e {
+    POWER_DC = 0,
+    POWER_AC = 1,
+} psu_input_type_t;
+
+typedef enum psu_status_e {
+    PSU_STATUS_ABSENT  = 0, /* psu absent */
+    PSU_STATUS_PRESENT = 1, /* psu present and status ok */
+    PSU_STATUS_WARN    = 2, /* psu present and status warn (pmbus 0x79 bit11 value 0)*/
+    PSU_STATUS_FAIL    = 3, /* psu present and status fail (pmbus 0x79 bit11 value 1)*/
+} psu_status_t;
+
+typedef enum psu_status_word_e {
+    PSU_VOUT_FAULT = 0x8000,
+    PSU_IOUT_FAULT = 0x4000,
+    PSU_INPUT_FAULT = 0x2000,
+    PSU_MFR_FAULT = 0x1000,
+    PSU_PG_FAULT = 0x0800,
+    PSU_FAN_FAULT = 0x0400,
+    PSU_OFF_FAULT = 0x0040,
+    PSU_TEMP_FAULT = 0x0004,
+} psu_status_word_t;
+
+typedef enum psu_io_status_e {
+    PSU_IO_STATUS_ABNORMAL = 0,
+    PSU_IO_STATUS_NORMAL  = 1,
+} psu_io_status_t;
+
+typedef enum dev_status_e {
+    DEV_ABSENT  = 0, /* dev absent */
+    DEV_PRESENT = 1, /* dev present */
+} dev_status_t;
+
+extern int g_switch_dbg_level;
+
+#define SWITCH_DEBUG(level, fmt, arg...) do { \
+    if (g_switch_dbg_level & level) { \
+        if (level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+#endif  /* _SWITCH_DRIVER_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_cpld_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_cpld_driver.h
new file mode 100644
index 000000000000..7698a3f0ef60
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_cpld_driver.h
@@ -0,0 +1,100 @@
+/*
+ * A header definition for wb_cpld_driver driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _WB_CPLD_DRIVER_H_
+#define _WB_CPLD_DRIVER_H_
+
+/**
+ * dfd_get_cpld_name - Obtain the CPLD name
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @index:The number of the CPLD starts from 0
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success: Returns the length of buf
+ *       :Failed: A negative value is returned
+ */
+ssize_t dfd_get_cpld_name(uint8_t main_dev_id, unsigned int cpld_index, char *buf, size_t count);
+
+/**
+ * dfd_get_cpld_type - Obtain the CPLD model
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @index:The number of the CPLD starts from 0
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success: Returns the length of buf
+ *       :Failed: A negative value is returned
+ */
+ssize_t dfd_get_cpld_type(uint8_t main_dev_id, unsigned int cpld_index, char *buf, size_t count);
+
+/**
+ * dfd_get_cpld_fw_version - Obtain the CPLD firmware version
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @index:The number of the CPLD starts from 0
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success: Returns the length of buf
+ *       :Failed: A negative value is returned
+ */
+ssize_t dfd_get_cpld_fw_version(uint8_t main_dev_id, unsigned int cpld_index, char *buf, size_t count);
+
+/**
+ * dfd_get_cpld_hw_version - Obtain the hardware version of the CPLD
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @index:The number of the CPLD starts from 0
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success: Returns the length of buf
+ *       :Failed: A negative value is returned
+ */
+ssize_t dfd_get_cpld_hw_version(uint8_t main_dev_id, unsigned int cpld_index, char *buf, size_t count);
+
+/**
+ * dfd_set_cpld_testreg - Set the CPLD test register value
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @cpld_index:The number of the CPLD starts from 0
+ * @value: Writes the value of the test register
+ * return: Success:0
+ *       :Failed: A negative value is returned
+ */
+int dfd_set_cpld_testreg(uint8_t main_dev_id, unsigned int cpld_index, int value);
+
+/**
+ * dfd_get_cpld_testreg - Read the CPLD test register value
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @cpld_index:The number of the CPLD starts from 0
+ * @value: Read the test register value
+ * return: Success:0
+ *       :Failed: A negative value is returned
+ */
+int dfd_get_cpld_testreg(uint8_t main_dev_id, unsigned int cpld_index, int *value);
+
+/**
+ * dfd_get_cpld_testreg_str - Read the CPLD test register value
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @cpld_index: The number of the CPLD starts from 0
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success: Returns the length of buf
+ *       :Failed: A negative value is returned
+ */
+ssize_t dfd_get_cpld_testreg_str(uint8_t main_dev_id, unsigned int cpld_index,
+            char *buf, size_t count);
+
+#endif /* _WB_CPLD_DRIVER_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_eeprom_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_eeprom_driver.h
new file mode 100644
index 000000000000..e86ee210be78
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_eeprom_driver.h
@@ -0,0 +1,59 @@
+/*
+ * A header definition for wb_eeprom_driver driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _WB_EEPROM_DRIVER_H_
+#define _WB_EEPROM_DRIVER_H_
+
+/**
+ * dfd_get_eeprom_size - Gets the data size of the eeprom
+ * @e2_type: This section describes the E2 type, including system, PSU, fan, and module E2
+ * @index: E2 number
+ * return: Succeeded: The data size of the eeprom is returned
+ *       : Failed: A negative value is returned
+ */
+int dfd_get_eeprom_size(int e2_type, int index);
+
+/**
+ * dfd_read_eeprom_data - Read eeprom data
+ * @e2_type: This section describes the E2 type, including system, PSU, fan, and module E2
+ * @index: E2 number
+ * @buf: eeprom data received buf
+ * @offset: The offset address of the read
+ * @count: Read length
+ * return: Success: Returns the length of fill buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_read_eeprom_data(int e2_type, int index, char *buf, loff_t offset, size_t count);
+
+/**
+ * dfd_write_eeprom_data - Write eeprom data
+ * @e2_type: This section describes the E2 type, including system, PSU, fan, and module E2
+ * @index: E2 number
+ * @buf: eeprom data buf
+ * @offset: The offset address of the write
+ * @count: Write length
+ * return: Success: The length of the written data is returned
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_write_eeprom_data(int e2_type, int index, char *buf, loff_t offset, size_t count);
+ssize_t dfd_get_eeprom_alias(int e2_type, unsigned int e2_index, char *buf, size_t count);
+ssize_t dfd_get_eeprom_tag(int e2_type, unsigned int e2_index, char *buf, size_t count);
+ssize_t dfd_get_eeprom_type(int e2_type, unsigned int e2_index, char *buf, size_t count);
+#endif /* _WB_EEPROM_DRIVER_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_fan_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_fan_driver.h
new file mode 100644
index 000000000000..b1e66cb0530c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_fan_driver.h
@@ -0,0 +1,191 @@
+/*
+ * A header definition for wb_fan_driver driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _WB_FAN_DRIVER_H_
+#define _WB_FAN_DRIVER_H_
+
+/**
+ * dfd_get_fan_status_str - Obtaining fan status
+ * @index: Number of the fan, starting from 1
+ * return: Success: Length of the status string
+ *       : Negative value - Read failed
+ */
+ssize_t dfd_get_fan_status_str(unsigned int fan_index, char *buf, size_t count);
+
+/**
+ * dfd_get_fan_present_str - Obtaining fan present status
+ * @index: Number of the fan, starting from 1
+ * return: Success: Length of the status string
+ *       : Negative value - Read failed
+ */
+ssize_t dfd_get_fan_present_str(unsigned int fan_index, char *buf, size_t count);
+
+/**
+ * dfd_get_fan_info - Obtaining Fan Information
+ * @index: Number of the fan, starting from 1
+ * @cmd: Fan information type, fan name :2, fan serial number :3, fan hardware version :5
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+
+/**
+ * dfd_get_fan_motor_status_str - Obtain the fan motor status
+ * @fan_index: Number of the fan, starting from 1
+ * @motor_index: Motor number, starting with 1
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fan_motor_status_str(unsigned int fan_index, unsigned int motor_index,
+            char *buf, size_t count);
+
+ssize_t dfd_get_fan_info(unsigned int fan_index, uint8_t cmd, char *buf, size_t count);
+
+/**
+ * dfd_get_fan_speed - Obtain the fan speed
+ * @fan_index: Number of the fan, starting from 1
+ * @motor_index: Motor number, starting with 1
+ * @speed: Speed value
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+int dfd_get_fan_speed(unsigned int fan_index, unsigned int motor_index,unsigned int *speed);
+
+/**
+ * dfd_get_fan_speed_str - Obtain the fan speed
+ * @fan_index: Number of the fan, starting from 1
+ * @motor_index: Motor number, starting with 1
+ * @buf: Receive buf
+ * @count: Receive buf length
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fan_speed_str(unsigned int fan_index, unsigned int motor_index,
+            char *buf, size_t count);
+
+/**
+ * dfd_set_fan_pwm - Set the fan speed duty cycle
+ * @fan_index: Number of the fan, starting from 1
+ * @pwm:   Duty cycle
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+int dfd_set_fan_pwm(unsigned int fan_index, int pwm);
+
+/**
+ * dfd_get_fan_pwm - Obtain the fan speed duty cycle
+ * @fan_index: Number of the fan, starting from 1
+ * @pwm:  Duty cycle
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+int dfd_get_fan_pwm(unsigned int fan_index, int *pwm);
+
+/**
+ * dfd_get_fan_pwm_str - Obtain the fan speed duty cycle
+ * @fan_index: Number of the fan, starting from 1
+ * @buf: Receive buf
+ * @count: Receive buf length
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fan_pwm_str(unsigned int fan_index, char *buf, size_t count);
+
+/**
+ * dfd_get_fan_motor_speed_tolerance_str - Obtain the fan speed tolerance
+ * @fan_index: Number of the fan, starting from 1
+ * @motor_index: Motor number, starting with 1
+ * @buf: Receive buf
+ * @count: Receive buf length
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fan_motor_speed_tolerance_str(unsigned int fan_index, unsigned int motor_index,
+            char *buf, size_t count);
+
+/**
+ * dfd_get_fan_speed_target - Obtain the standard fan speed
+ * @fan_index
+ * @motor_index
+ * @value Standard speed value
+ * @returns: Success :0
+ *         : Failed: A negative value is returned
+ */
+int dfd_get_fan_speed_target(unsigned int fan_index, unsigned int motor_index, int *value);
+
+/**
+ * dfd_get_fan_motor_speed_target_str - Obtain the standard fan speed
+ * @fan_index: Number of the fan, starting from 1
+ * @motor_index: Motor number, starting with 1
+ * @buf: Receive buf
+ * @count: Receive buf length
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fan_motor_speed_target_str(unsigned int fan_index, unsigned int motor_index,
+            char *buf, size_t count);
+
+/**
+ * dfd_get_fan_direction_str - Obtain the fan air duct type
+ * @fan_index: Number of the fan, starting from 1
+ * @buf :Duct type receives buf
+ * @count :Duct type receives buf length
+ * @returns: Succeeded: Air duct type String length
+ *           Failed: A negative value is returned
+ */
+ssize_t dfd_get_fan_direction_str(unsigned int fan_index, char *buf, size_t count);
+
+/**
+ * dfd_get_fan_motor_speed_max_str - Obtain the standard fan speed
+ * @fan_index: Number of the fan, starting from 1
+ * @motor_index: Motor number, starting with 1
+ * @buf: Receive buff
+ * @count: Receive buf length
+ * return: Success :0
+ *       :Failed: A negative value is returned
+ */
+ssize_t dfd_get_fan_motor_speed_max_str(unsigned int fan_index, unsigned int motor_index,
+            char *buf, size_t count);
+
+/**
+ * dfd_get_fan_motor_speed_min_str - Obtain the standard fan speed
+ * @fan_index: Number of the fan, starting from 1
+ * @motor_index: Motor number, starting with 1
+ * @buf: Receive buf
+ * @count: Receive buf length
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fan_motor_speed_min_str(unsigned int fan_index, unsigned int motor_index,
+            char *buf, size_t count);
+
+/**
+ * dfd_get_fan_present_status - Obtain the fan status
+ * @index: Number of the fan, starting from 1
+ * return: 0:ABSENT
+ *         1:PRESENT
+ *       : Negative value - Read failed
+ */
+int dfd_get_fan_present_status(unsigned int fan_index);
+
+#endif /* _WB_FAN_DRIVER_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_fpga_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_fpga_driver.h
new file mode 100644
index 000000000000..05863c4737af
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_fpga_driver.h
@@ -0,0 +1,100 @@
+/*
+ * A header definition for wb_fpga_driver driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _WB_FPGA_DRIVER_H_
+#define _WB_FPGA_DRIVER_H_
+
+/**
+ * dfd_get_fpga_name -Get the FPGA name
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @index:Number of the FPGA, starting from 1
+ * @buf: Receive buf
+ * @count: Receive buf length
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fpga_name(uint8_t main_dev_id, unsigned int fpga_index, char *buf, size_t count);
+
+/**
+ * dfd_get_fpga_type - Get FPGA model
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @index:Number of the FPGA, starting from 1
+ * @buf: Receive buf
+ * @count: Receive buf length
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fpga_type(uint8_t main_dev_id, unsigned int fpga_index, char *buf, size_t count);
+
+/**
+ * dfd_get_fpga_fw_version - Obtain the FPGA firmware version
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @index:Number of the FPGA, starting from 1
+ * @buf: Receive buf
+ * @count: Receive buf length
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fpga_fw_version(uint8_t main_dev_id, unsigned int fpga_index, char *buf, size_t count);
+
+/**
+ * dfd_get_fpga_hw_version - Obtain the hardware version of the FPGA
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @index:Number of the FPGA, starting from 1
+ * @buf: Receive buf
+ * @count: Receive buf length
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fpga_hw_version(uint8_t main_dev_id, unsigned int fpga_index, char *buf, size_t count);
+
+/**
+ * dfd_set_fpga_testreg - Sets the value of the FPGA test register
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @fpga_index:Number of the FPGA, starting from 1
+ * @value:   Writes the value of the test register
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+int dfd_set_fpga_testreg(uint8_t main_dev_id, unsigned int fpga_index, int value);
+
+/**
+ * dfd_get_fpga_testreg - Read the FPGA test register value
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @fpga_index: Number of the FPGA, starting from 1
+ * @value:   Read the test register value
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+int dfd_get_fpga_testreg(uint8_t main_dev_id, unsigned int fpga_index, int *value);
+
+/**
+ * dfd_get_fpga_testreg_str - Read the FPGA test register value
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @fpga_index:Number of the FPGA, starting from 1
+ * @buf: Receive buf
+ * @count: Receive buf length
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fpga_testreg_str(uint8_t main_dev_id, unsigned int fpga_index,
+            char *buf, size_t count);
+
+#endif /* _WB_FPGA_DRIVER_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_led_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_led_driver.h
new file mode 100644
index 000000000000..bac7b23d9836
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_led_driver.h
@@ -0,0 +1,45 @@
+/*
+ * A header definition for wb_led_driver driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _WB_LED_DRIVER_H_
+#define _WB_LED_DRIVER_H_
+
+/**
+ * dfd_get_led_status - Get LED and other status
+ * @led_id: led lamp type
+ * @led_index: led light offset
+ * @buf: LED light status receives buf
+ * @count: Accept the buf length
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_led_status(uint16_t led_id, uint8_t led_index, char *buf, size_t count);
+
+/**
+ * dfd_set_led_status - Set LED light status
+ * @led_id: led lamp type
+ * @led_index: led light offset
+ * @value: LED light status value
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_set_led_status(uint16_t led_id, uint8_t led_index, int value);
+
+#endif /* _WB_LED_DRIVER_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_module.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_module.h
new file mode 100644
index 000000000000..6bce2817cb13
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_module.h
@@ -0,0 +1,360 @@
+/*
+ * A header definition for wb_module driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _WB_MODULE_H_
+#define _WB_MODULE_H_
+
+#include "switch_driver.h"
+
+#define mem_clear(data, size) memset((data), 0, (size))
+typedef enum dfd_rv_s {
+    DFD_RV_OK               = 0,
+    DFD_RV_INIT_ERR         = 1,
+    DFD_RV_SLOT_INVALID     = 2,
+    DFD_RV_MODE_INVALID     = 3,
+    DFD_RV_MODE_NOTSUPPORT  = 4,
+    DFD_RV_TYPE_ERR         = 5,
+    DFD_RV_DEV_NOTSUPPORT   = 6,
+    DFD_RV_DEV_FAIL         = 7,
+    DFD_RV_INDEX_INVALID    = 8,
+    DFD_RV_NO_INTF          = 9,
+    DFD_RV_NO_NODE          = 10,
+    DFD_RV_NODE_FAIL        = 11,
+    DFD_RV_INVALID_VALUE    = 12,
+    DFD_RV_NO_MEMORY        = 13,
+    DFD_RV_CHECK_FAIL       = 14,
+} dfd_rv_t;
+
+typedef enum status_mem_e {
+    STATUS_ABSENT  = 0,
+    STATUS_OK      = 1,
+    STATUS_NOT_OK  = 2,
+    STATUS_MEM_END = 3,
+} status_mem_t;
+
+/* psu PMBUS */
+typedef enum psu_sensors_type_e {
+    PSU_SENSOR_NONE    = 0,
+    PSU_IN_VOL         = 1,
+    PSU_IN_CURR        = 2,
+    PSU_IN_POWER       = 3,
+    PSU_OUT_VOL        = 4,
+    PSU_OUT_CURR       = 5,
+    PSU_OUT_POWER      = 6,
+    PSU_FAN_SPEED      = 7,
+    PSU_OUT_MAX_POWERE = 8,
+    PSU_OUT_STATUS     = 9,
+    PSU_IN_STATUS      = 10,
+    PSU_IN_TYPE        = 11,
+    PSU_FAN_RATIO      = 12,
+    PSU_IN_VOL_MAX     = 13,
+    PSU_IN_CURR_MAX    = 14,
+    PSU_IN_VOL_MIN     = 15,
+    PSU_IN_CURR_MIN    = 16,
+    PSU_OUT_VOL_MAX     = 17,
+    PSU_OUT_CURR_MAX    = 18,
+    PSU_OUT_VOL_MIN     = 19,
+    PSU_OUT_CURR_MIN    = 20,
+    PSU_FAN_SPEED_MAX   = 21,
+    PSU_FAN_SPEED_MIN   = 22,
+    PSU_IN_POWER_MAX    = 23,
+    PSU_IN_POWER_MIN    = 24,
+    PSU_OUT_POWER_MAX   = 25,
+    PSU_OUT_POWER_MIN   = 26,
+    PSU_HW_STATUS          = 27,
+} psu_sensors_type_t;
+
+/* Watchdog type */
+typedef enum wb_wdt_type_e {
+    WB_WDT_TYPE_NAME         = 0,     /* watchdog identify */
+    WB_WDT_TYPE_STATE        = 1,     /* watchdog state */
+    WB_WDT_TYPE_TIMELEFT     = 2,     /* watchdog timeleft */
+    WB_WDT_TYPE_TIMEOUT      = 3,     /* watchdog timeout */
+    WB_WDT_TYPE_ENABLE       = 4,     /* watchdog enable */
+} wb_wdt_type_t;
+
+/* Port Power Status */
+typedef enum wb_port_power_status_e {
+    WB_PORT_POWER_OFF        = 0,     /* port power off */
+    WB_PORT_POWER_ON         = 1,     /* port power on */
+} wb_port_power_status_t;
+
+/* sensor monitor or not */
+typedef enum wb_sensor_monitor_flag_e {
+    WB_SENSOR_MONITOR_NO    = 0,     /* sensor not monitor  */
+    WB_SENSOR_MONITOR_YES   = 1,     /* sensor monitor  */
+} wb_sensor_monitor_flag_t;
+
+typedef enum dfd_dev_info_type_e {
+    DFD_DEV_INFO_TYPE_MAC               = 1,
+    DFD_DEV_INFO_TYPE_NAME              = 2,
+    DFD_DEV_INFO_TYPE_SN                = 3,
+    DFD_DEV_INFO_TYPE_PWR_CONS          = 4,
+    DFD_DEV_INFO_TYPE_HW_INFO           = 5,
+    DFD_DEV_INFO_TYPE_DEV_TYPE          = 6,
+    DFD_DEV_INFO_TYPE_PART_NAME         = 7,
+    DFD_DEV_INFO_TYPE_PART_NUMBER       = 8,  /* part number */
+    DFD_DEV_INFO_TYPE_FAN_DIRECTION     = 9,
+    DFD_DEV_INFO_TYPE_MAX_OUTPUT_POWRER = 10, /* max_output_power */
+    DFD_DEV_INFO_TYPE_SPEED_CAL = 11,
+    DFD_DEV_INFO_TYPE_ASSET_TAG = 12,
+    DFD_DEV_INFO_TYPE_VENDOR    = 13,
+} dfd_dev_tlv_type_t;
+
+/* Master device type */
+typedef enum wb_main_dev_type_e {
+    WB_MAIN_DEV_MAINBOARD = 0,      /* Main board */
+    WB_MAIN_DEV_FAN       = 1,      /* FAN */
+    WB_MAIN_DEV_PSU       = 2,      /* PSU */
+    WB_MAIN_DEV_SFF       = 3,      /* Optical module */
+    WB_MAIN_DEV_CPLD      = 4,      /* CPLD */
+    WB_MAIN_DEV_SLOT      = 5,      /* Daughter card */
+} wb_main_dev_type_t;
+
+/* Subdevice type */
+typedef enum wb_minor_dev_type_e {
+    WB_MINOR_DEV_NONE  = 0,    /* None */
+    WB_MINOR_DEV_TEMP  = 1,    /* temperature*/
+    WB_MINOR_DEV_IN    = 2,    /* voltage */
+    WB_MINOR_DEV_CURR  = 3,    /* current */
+    WB_MINOR_DEV_POWER = 4,    /* power */
+    WB_MINOR_DEV_MOTOR = 5,    /* motor */
+    WB_MINOR_DEV_PSU   = 6,    /* Power supply type */
+    WB_MINOR_DEV_FAN   = 7,    /* Fan model */
+    WB_MINOR_DEV_CPLD  = 8,    /* CPLD */
+    WB_MINOR_DEV_FPGA  = 9,    /* FPGA */
+    WB_MINOR_DEV_EEPROM = 10,  /* EEPROM */
+} wb_minor_dev_type_t;
+
+/* SENSORS attribute type */
+typedef enum wb_sensor_type_e {
+    WB_SENSOR_INPUT       = 0,     /* Sensor value */
+    WB_SENSOR_ALIAS       = 1,     /* Sensor nickname */
+    WB_SENSOR_TYPE        = 2,     /* Sensor type*/
+    WB_SENSOR_MAX         = 3,     /* Sensor maximum */
+    WB_SENSOR_MAX_HYST    = 4,     /* Sensor hysteresis value */
+    WB_SENSOR_MIN         = 5,     /* Sensor minimum */
+    WB_SENSOR_CRIT        = 6,     /* Sensor crit value */
+    WB_SENSOR_RANGE       = 7,     /* Sensor error value */
+    WB_SENSOR_NOMINAL_VAL = 8,     /* Nominal value of the sensor */
+    WB_SENSOR_HIGH        = 9,     /* Sensor height */
+    WB_SENSOR_LOW         = 10,    /* Sensor low */
+} wb_sensor_type_t;
+
+/* sff cpld attribute type */
+typedef enum wb_sff_cpld_attr_e {
+    WB_SFF_POWER_ON      = 0x01,
+    WB_SFF_TX_FAULT,
+    WB_SFF_TX_DIS,
+    WB_SFF_PRESENT_RESERVED,
+    WB_SFF_RX_LOS,
+    WB_SFF_RESET,
+    WB_SFF_LPMODE,
+    WB_SFF_MODULE_PRESENT,
+    WB_SFF_INTERRUPT,
+} wb_sff_cpld_attr_t;
+
+/* LED attribute type */
+typedef enum wb_led_e {
+    WB_SYS_LED_FRONT   = 0,      /* Front panel SYS light */
+    WB_SYS_LED_REAR    = 1,      /* SYS light on rear panel */
+    WB_BMC_LED_FRONT   = 2,      /* BMC indicator on the front panel */
+    WB_BMC_LED_REAR    = 3,      /* BMC indicator on the rear panel */
+    WB_FAN_LED_FRONT   = 4,      /* Front panel fan light */
+    WB_FAN_LED_REAR    = 5,      /* Rear panel fan light */
+    WB_PSU_LED_FRONT   = 6,      /* Front panel power light */
+    WB_PSU_LED_REAR    = 7,      /* Rear panel power light */
+    WB_ID_LED_FRONT    = 8,      /* Front panel positioning light */
+    WB_ID_LED_REAR     = 9,      /* Rear panel positioning light */
+    WB_FAN_LED_MODULE  = 10,     /* Fan module indicator */
+    WB_PSU_LED_MODULE  = 11,     /* Power module indicator */
+    WB_SLOT_LED_MODULE = 12,     /* Sub-card status indicator */
+} wb_led_t;
+
+extern int g_dfd_dbg_level;
+extern int g_dfd_fan_dbg_level;
+extern int g_dfd_fru_dbg_level;
+extern int g_dfd_eeprom_dbg_level;
+extern int g_dfd_cpld_dbg_level;
+extern int g_dfd_fpga_dbg_level;
+extern int g_dfd_sysled_dbg_level;
+extern int g_dfd_slot_dbg_level;
+extern int g_dfd_sensor_dbg_level;
+extern int g_dfd_psu_dbg_level;
+extern int g_dfd_sff_dbg_level;
+extern int g_dfd_watchdog_dbg_level;
+extern int g_dfd_custom_dbg_level;
+
+#define WB_MIN(a, b)   ((a) < (b) ? (a) : (b))
+#define WB_MAX(a, b)   ((a) > (b) ? (a) : (b))
+
+#define DBG_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_dbg_level & level) { \
+        if (level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+#define DFD_FAN_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_fan_dbg_level & level) { \
+        if (level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+#define DBG_FRU_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_fru_dbg_level & level) { \
+        if (level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+#define DBG_EEPROM_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_eeprom_dbg_level & level) { \
+        if (level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+#define DBG_CPLD_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_cpld_dbg_level & level) { \
+        if (level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+#define DBG_FPGA_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_fpga_dbg_level & level) { \
+        if (level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+#define DBG_SYSLED_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_sysled_dbg_level & level) { \
+        if (level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+#define DFD_SLOT_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_slot_dbg_level & level) { \
+        if (level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+#define DFD_SENSOR_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_sensor_dbg_level & level) { \
+        if (level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+#define DFD_PSU_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_psu_dbg_level & level) { \
+        if (level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+#define DFD_SFF_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_sff_dbg_level & level) { \
+        if (level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+#define DFD_WDT_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_watchdog_dbg_level & level) { \
+        if (level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+#define DFD_SYSTEM_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_custom_dbg_level & level) { \
+        if (level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+/**
+ * wb_dev_cfg_init - dfd module initialization
+ *
+ * @returns: <0 Failed, otherwise succeeded
+ */
+int32_t wb_dev_cfg_init(void);
+
+/**
+ * wb_dev_cfg_exit - dfd module exit
+ *
+ * @returns: void
+ */
+
+void wb_dev_cfg_exit(void);
+
+/**
+ * dfd_get_dev_number - Get the number of devices
+ * @main_dev_id:Master device number
+ * @minor_dev_id:Secondary device number
+ * @returns: <0 failed, otherwise number of devices is returned
+ */
+int dfd_get_dev_number(unsigned int main_dev_id, unsigned int minor_dev_id);
+#endif  /* _WB_MODULE_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_psu_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_psu_driver.h
new file mode 100644
index 000000000000..5de93f46bd11
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_psu_driver.h
@@ -0,0 +1,114 @@
+/*
+ * A header definition for wb_psu_driver driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _WB_PSU_DRIVER_H_
+#define _WB_PSU_DRIVER_H_
+
+/**
+ * dfd_get_psu_info - Get Power Information
+ * @index: Number of the power supply, starting from 1
+ * @cmd: Power supply information Type, power supply name :2, power supply serial number :3, power supply hardware version :5
+ * @buf: Receive buf
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_psu_info(unsigned int psu_index, uint8_t cmd, char *buf, size_t count);
+
+/**
+ * dfd_get_psu_present_status_str - Get Power status
+ * @index: Number of the power supply, starting from 1
+ * return: Success: Length of the status string
+ *       : Negative value - Read failed
+ */
+ssize_t dfd_get_psu_present_status_str(unsigned int psu_index, char *buf, size_t count);
+
+/**
+ * dfd_get_psu_out_status_str - Get the output power status
+ * @index: Number of the power supply, starting from 1
+ * return: Success: Length of the status string
+ *       : Negative value - Read failed
+ */
+ssize_t dfd_get_psu_out_status_str(unsigned int psu_index, char *buf, size_t count);
+
+/**
+ * dfd_get_psu_status_pmbus_str - Gets the value on the pmbus register of the power supply
+ * @index: Number of the power supply, starting from 1
+ * return: Success: Length of the status string
+ *       : Negative value - Read failed
+ */
+ssize_t dfd_get_psu_status_pmbus_str(unsigned int psu_index, char *buf, size_t count);
+
+/**
+ * dfd_get_psu_in_status_str - Get the input power status
+ * @index: Number of the power supply, starting from 1
+ * return: Success: Length of the status string
+ *       : Negative value - Read failed
+ */
+ssize_t dfd_get_psu_in_status_str(unsigned int psu_index, char *buf, size_t count);
+
+/**
+ * dfd_get_psu_input_type - Get the power input type
+ * @index: Number of the power supply, starting from 1
+ * @buf: Receive buf
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_psu_input_type(unsigned int psu_index, char *buf, size_t count);
+
+/**
+ * dfd_get_psu_alarm_status - Get power PMBUS WORD STATUS status
+ * @index: Number of the power supply, starting from 1
+ * return: Success:return psu output status
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_psu_alarm_status(unsigned int psu_index, char *buf, size_t count);
+
+/**
+ * dfd_get_psu_fan_ratio_str - Gets the target fan rotation rate
+ * @index: Number of the power supply, starting from 1
+ * return: Success: Length of the status string
+ *       : Negative value - Read failed
+ */
+ssize_t dfd_get_psu_fan_ratio_str(unsigned int psu_index, char *buf, size_t count);
+ssize_t dfd_set_psu_fan_ratio_str(unsigned int psu_index, int pwm);
+/**
+ * dfd_get_psu_pmbus_status - Get power Status Word
+ * @index: Number of the power supply, starting from 1
+ * return: Success: Length of the status string
+ *       : Negative value - Read failed
+ */
+ssize_t dfd_get_psu_pmbus_status(unsigned int psu_index, char *buf, size_t count);
+/**
+ * dfd_get_psu_present_status - Obtain the power supply status
+ * @index: Number of the power supply, starting from 1
+ * return: 0:Not in the position
+ *         1:position
+ *       : Negative value - Read failed
+ */
+int dfd_get_psu_present_status(unsigned int psu_index);
+
+ssize_t dfd_get_psu_threshold_str(unsigned int psu_index, unsigned int type, char *buf, size_t count);
+
+ssize_t dfd_get_psu_hw_status_str(unsigned int psu_index, char *buf, size_t count);
+
+ssize_t dfd_get_psu_blackbox(unsigned int psu_index, char *buf, size_t count);
+ssize_t dfd_get_psu_pmbus(unsigned int psu_index, char *buf, size_t count);
+int dfd_clear_psu_blackbox(unsigned int psu_index, uint8_t value);
+#endif /* _WB_PSU_DRIVER_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_sensors_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_sensors_driver.h
new file mode 100644
index 000000000000..d33ee3217e37
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_sensors_driver.h
@@ -0,0 +1,82 @@
+/*
+ * A header definition for wb_sensors_driver driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _WB_SENSORS_DRIVER_H_
+#define _WB_SENSORS_DRIVER_H_
+
+/**
+ * dfd_get_temp_info - Get temperature information
+ * @main_dev_id: Motherboard :0 Power supply :2 subcard :5
+ * @dev_index: If no device index exists, the value is 0, and 1 indicates slot1/psu1
+ * @temp_index: Temperature index, starting at 1
+ * @temp_type: Read type,1:alias 2:type 3:max 4:max_hyst 5:min 6:input
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_temp_info(uint8_t main_dev_id, uint8_t dev_index, uint8_t temp_index,
+            uint8_t temp_attr, char *buf, size_t count);
+
+/**
+ * dfd_get_voltage_info - Get voltage information
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @dev_index: If no device index exists, the value is 0, and 1 indicates slot1
+ * @in_index: Voltage index, starting at 1
+ * @in_type:Voltage type,1:alias 2:type 3:max 4:max_hyst 5:min 6:input
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_voltage_info(uint8_t main_dev_id, uint8_t dev_index, uint8_t in_index,
+            uint8_t in_attr, char *buf, size_t count);
+
+/**
+ * dfd_get_current_info - Get current information
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @dev_index: If no device index exists, the value is 0, and 1 indicates slot1
+ * @in_index: Current index, starting at 1
+ * @in_type: Current type,1:alias 2:type 3:max 4:max_hyst 5:min 6:input
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_current_info(uint8_t main_dev_id, uint8_t dev_index, uint8_t curr_index,
+            uint8_t curr_attr, char *buf, size_t count);
+
+/**
+ * dfd_get_psu_sensor_info - Obtain PMBUS information about the power supply
+ * @psu_index: Power index, starting at 1
+ * @sensor_type: Type of the obtained pmbus information
+ * @buf: pmbus results are stored in buf
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_psu_sensor_info(uint8_t psu_index, uint8_t sensor_type, char *buf, size_t count);
+
+
+/**
+ * dfd_get_main_board_monitor_flag - Get Monitor flag info
+ * @main_dev_id: Motherboard :0 Power supply :2 subcard :5
+ * @dev_index: If no device index exists, the value is 0, and 1 indicates slot1
+ * @sensor_type: Type of the obtained pmbus information
+ * @in_type: Voltage type,1:alias 2:type 3:max 4:max_hyst 5:min 6:input
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+int dfd_get_main_board_monitor_flag(uint8_t main_dev_id, uint8_t dev_index, uint8_t sensor_type,
+        uint8_t sensor_index, char *buf, size_t count);
+#endif /* _WB_SENSORS_DRIVER_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_sff_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_sff_driver.h
new file mode 100644
index 000000000000..e26e12805de6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_sff_driver.h
@@ -0,0 +1,63 @@
+/*
+ * A header definition for wb_sff_driver driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _WB_SFF_DRIVER_H_
+#define _WB_SFF_DRIVER_H_
+
+/**
+ * dfd_set_sff_cpld_info - Example Set the CPLD register status of the optical module
+ * @sff_index: Optical module number, starting from 1
+ * @cpld_reg_type: Optical module CPLD register type
+ * @value: Writes the value to the register
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+int dfd_set_sff_cpld_info(unsigned int sff_index, int cpld_reg_type, int value);
+
+/**
+ * dfd_get_sff_cpld_info - Obtain the CPLD register status of the optical module
+ * @sff_index: Optical module number, starting from 1
+ * @cpld_reg_type: Optical module CPLD register type
+ * @buf: Optical module E2 receives information from buf
+ * @count: buf length
+ * return: Success: Returns the length of fill buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_sff_cpld_info(unsigned int sff_index, int cpld_reg_type, char *buf, size_t count);
+
+/**
+ * dfd_get_single_eth_optoe_type - get sff optoe type
+ * @sff_index: Optical module number, starting from 1
+ * @optoe_type: Optical module type
+ * return: Success: Returns the length of fill buf
+ *       : Failed: A negative value is returned
+ */
+int dfd_get_single_eth_optoe_type(unsigned int sff_index, int *optoe_type);
+
+/**
+ * dfd_set_single_eth_optoe_type - set sff optoe type
+ * @sff_index: Optical module number, starting from 1
+ * @optoe_type: Optical module type
+ * return: Success: Returns the length of fill buf
+ *       : Failed: A negative value is returned
+ */
+int dfd_set_single_eth_optoe_type(unsigned int sff_index, int optoe_type);
+
+#endif /* _WB_SFF_DRIVER_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_slot_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_slot_driver.h
new file mode 100644
index 000000000000..7978fa5b7698
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_slot_driver.h
@@ -0,0 +1,64 @@
+/*
+ * A header definition for wb_slot_driver driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _WB_SLOT_DRIVER_H_
+#define _WB_SLOT_DRIVER_H_
+
+/**
+ * dfd_get_slot_status_str - Gets the subcard status
+ * @slot_index: Number of the sub-card, starting from 1
+ * @buf: Receive buf
+ * @count: Receive buf length
+ * return: Success: Length of the status string
+ *       : Negative value - Read failed
+ */
+ssize_t dfd_get_slot_status_str(unsigned int slot_index, char *buf, size_t count);
+
+/**
+ * dfd_get_slot_info - Obtain the subcard information
+ * @slot_index: Number of the sub-card, starting from 1
+ * @cmd: Card information type, sub-card name :2, sub-card serial number :3, sub-card hardware version number :5
+ * @buf: Receive buf
+ * @count: Receive buf length
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_slot_info(unsigned int slot_index, uint8_t cmd, char *buf, size_t count);
+
+/**
+ * dfd_get_slot_power_status_str - get power status of slot
+ * @slot_index: Number of the sub-card, starting from 1
+ * @buf: Receive buf
+ * @count: Receive buf length
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_slot_power_status_str(unsigned int slot_index, char *buf, size_t count);
+
+/**
+ * dfd_set_slot_power_status_str - set power status of slot
+ * @slot_index: Number of the sub-card, starting from 1
+ * @value: Power status of slot
+ * return: Success: 0 is returned
+ *       : Failed: A negative value is returned
+ */
+int dfd_set_slot_power_status_str(unsigned int slot_index, int value);
+
+#endif /* _WB_SLOT_DRIVER_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_system_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_system_driver.h
new file mode 100644
index 000000000000..2298c5bb11b1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_system_driver.h
@@ -0,0 +1,33 @@
+/*
+ * A header definition for wb_system_driver driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _SYSTEM_DRIVER_H_
+#define _SYSTEM_DRIVER_H_
+
+typedef enum module_pwr_status_e {
+    MODULE_POWER_OFF = 0,
+    MODULE_POWER_ON,
+} module_pwr_status_t;
+
+ssize_t dfd_system_get_system_value(unsigned int type, int *value);
+ssize_t dfd_system_set_system_value(unsigned int type, int value);
+ssize_t dfd_system_get_port_power_status(unsigned int type, char *buf, size_t count);
+
+#endif /* _SYSTEM_DRIVER_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_watchdog_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_watchdog_driver.h
new file mode 100644
index 000000000000..c59bd64e692a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_watchdog_driver.h
@@ -0,0 +1,37 @@
+/*
+ * A header definition for wb_watchdog_driver driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _WB_WATCHDOG_DRIVER_H_
+#define _WB_WATCHDOG_DRIVER_H_
+
+/**
+ * dfd_get_watchdog_info - Get watchdog information
+ * @type: Watchdog information type
+ * @buf: Receive buf
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_watchdog_info(uint8_t type, char *buf, size_t count);
+
+ssize_t dfd_watchdog_get_status_str(char *buf, size_t count);
+ssize_t dfd_watchdog_get_status(char *buf, size_t count);
+ssize_t dfd_watchdog_set_status(int value);
+
+#endif /* _WB_WATCHDOG_DRIVER_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/switch_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/switch_driver.c
new file mode 100644
index 000000000000..5628aadab430
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/switch_driver.c
@@ -0,0 +1,4577 @@
+/*
+ * An switch_driver driver for switch devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/module.h>
+
+#include "dfd_sysfs_common.h"
+#include "switch_driver.h"
+#include "wb_module.h"
+#include "wb_fan_driver.h"
+#include "wb_eeprom_driver.h"
+#include "wb_cpld_driver.h"
+#include "wb_fpga_driver.h"
+#include "wb_led_driver.h"
+#include "wb_slot_driver.h"
+#include "wb_sensors_driver.h"
+#include "wb_psu_driver.h"
+#include "wb_sff_driver.h"
+#include "wb_watchdog_driver.h"
+#include "wb_system_driver.h"
+#include "dfd_cfg.h"
+
+int g_switch_dbg_level = 0;
+
+/* change the following parameter by your switch. */
+#define MAIN_BOARD_TEMP_SENSOR_NUMBER    (10)
+#define MAIN_BOARD_VOL_SENSOR_NUMBER     (10)
+#define MAIN_BOARD_CURR_SENSOR_NUMBER    (0)
+#define SYSEEPROM_SIZE                   (256)
+#define FAN_NUMBER                       (6)
+#define FAN_MOTOR_NUMBER                 (2)
+#define PSU_NUMBER                       (2)
+#define PSU_TEMP_SENSOR_NUMBER           (3)
+#define ETH_NUMBER                       (32)
+#define ETH_EEPROM_SIZE                  (0x8180)
+#define MAIN_BOARD_FPGA_NUMBER           (1)
+#define MAIN_BOARD_CPLD_NUMBER           (5)
+#define SLOT_NUMBER                      (0)
+#define SLOT_TEMP_NUMBER                 (0)
+#define SLOT_VOL_NUMBER                  (0)
+#define SLOT_CURR_NUMBER                 (0)
+#define SLOT_FPGA_NUMBER                 (0)
+#define SLOT_CPLD_NUMBER                 (0)
+
+/***************************************main board temp*****************************************/
+/*
+ * dfd_get_main_board_temp_number - Used to get main board temperature sensors number,
+ *
+ * This function returns main board temperature sensors by your switch,
+ * If there is no main board temperature sensors, returns 0,
+ * otherwise it returns a negative value on failed.
+ */
+static int dfd_get_main_board_temp_number(void)
+{
+    int ret;
+
+    ret = dfd_get_dev_number(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_TEMP);
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_temp_alias - Used to identify the location of the temperature sensor,
+ * such as air_inlet, air_outlet and so on.
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_temp_alias(unsigned int temp_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_temp_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, temp_index, WB_SENSOR_ALIAS,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_temp_type - Used to get the model of temperature sensor,
+ * such as lm75, tmp411 and so on
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_temp_type(unsigned int temp_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_temp_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, temp_index, WB_SENSOR_TYPE,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_temp_max - Used to get the maximum threshold of temperature sensor
+ * filled the value to buf, the value is integer with millidegree Celsius
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_temp_max(unsigned int temp_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_temp_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, temp_index, WB_SENSOR_MAX,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_temp_min - Used to get the minimum threshold of temperature sensor
+ * filled the value to buf, the value is integer with millidegree Celsius
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_temp_min(unsigned int temp_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_temp_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, temp_index, WB_SENSOR_MIN,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_temp_high - Used to get the high threshold of temperature sensor
+ * filled the value to buf, the value is integer with millidegree Celsius
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_temp_high(unsigned int temp_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_temp_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, temp_index, WB_SENSOR_HIGH,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_temp_low - Used to get the low threshold of temperature sensor
+ * filled the value to buf, the value is integer with millidegree Celsius
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_temp_low(unsigned int temp_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_temp_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, temp_index, WB_SENSOR_LOW,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_temp_value - Used to get the input value of temperature sensor
+ * filled the value to buf, the value is integer with millidegree Celsius
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_temp_value(unsigned int temp_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_temp_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, temp_index, WB_SENSOR_INPUT,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_temp_monitor_flag - Used to get monitor flag of temperature sensor
+ * filled the value to buf, the value is integer
+ * @index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_temp_monitor_flag(unsigned int index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_main_board_monitor_flag(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, WB_MINOR_DEV_TEMP, index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+/***********************************end of main board temp*************************************/
+
+/*************************************main board voltage***************************************/
+static int dfd_get_main_board_vol_number(void)
+{
+    int ret;
+
+    ret = dfd_get_dev_number(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_IN);
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_vol_alias - Used to identify the location of the voltage sensor,
+ * @vol_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_vol_alias(unsigned int vol_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_voltage_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, vol_index, WB_SENSOR_ALIAS,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_vol_type - Used to get the model of voltage sensor,
+ * such as udc90160, tps53622 and so on
+ * @vol_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_vol_type(unsigned int vol_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_voltage_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, vol_index, WB_SENSOR_TYPE,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_vol_max - Used to get the maximum threshold of voltage sensor
+ * filled the value to buf, the value is integer with mV
+ * @vol_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_vol_max(unsigned int vol_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_voltage_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, vol_index, WB_SENSOR_MAX,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_vol_min - Used to get the minimum threshold of voltage sensor
+ * filled the value to buf, the value is integer with mV
+ * @vol_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_vol_min(unsigned int vol_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_voltage_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, vol_index, WB_SENSOR_MIN,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_vol_range - Used to get the output error value of voltage sensor
+ * filled the value to buf
+ * @vol_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_vol_range(unsigned int vol_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_voltage_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, vol_index,
+              WB_SENSOR_RANGE, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_vol_nominal_value - Used to get the nominal value of voltage sensor
+ * filled the value to buf
+ * @vol_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_vol_nominal_value(unsigned int vol_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_voltage_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, vol_index,
+              WB_SENSOR_NOMINAL_VAL, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_vol_value - Used to get the input value of voltage sensor
+ * filled the value to buf, the value is integer with mV
+ * @vol_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_vol_value(unsigned int vol_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_voltage_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, vol_index, WB_SENSOR_INPUT,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_vol_monitor_flag - Used to get monitor flag of voltage sensor
+ * filled the value to buf, the value is integer
+ * @temp_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_vol_monitor_flag(unsigned int temp_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_main_board_monitor_flag(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, WB_MINOR_DEV_IN, temp_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+/*********************************end of main board voltage************************************/
+/*************************************main board current***************************************/
+static int dfd_get_main_board_curr_number(void)
+{
+    int ret;
+
+    ret = dfd_get_dev_number(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_CURR);
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_curr_alias - Used to identify the location of the current sensor,
+ * @curr_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_curr_alias(unsigned int curr_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_current_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, curr_index, WB_SENSOR_ALIAS,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_curr_type - Used to get the model of current sensor,
+ * @curr_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_curr_type(unsigned int curr_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_current_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, curr_index, WB_SENSOR_TYPE,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_curr_max - Used to get the maximum threshold of current sensor
+ * filled the value to buf, the value is integer with mA
+ * @curr_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_curr_max(unsigned int curr_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_current_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, curr_index, WB_SENSOR_MAX,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_curr_min - Used to get the minimum threshold of current sensor
+ * filled the value to buf, the value is integer with mA
+ * @curr_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_curr_min(unsigned int curr_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_current_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, curr_index, WB_SENSOR_MIN,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_curr_value - Used to get the input value of current sensor
+ * filled the value to buf, the value is integer with mA
+ * @curr_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_curr_value(unsigned int curr_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_current_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, curr_index, WB_SENSOR_INPUT,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_curr_monitor_flag - Used to get monitor flag of current sensor
+ * filled the value to buf, the value is integer
+ * @index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_curr_monitor_flag(unsigned int index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_main_board_monitor_flag(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, WB_MINOR_DEV_CURR, index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+/*********************************end of main board current************************************/
+
+/*****************************************syseeprom*******************************************/
+/*
+ * dfd_get_syseeprom_size - Used to get syseeprom size
+ *
+ * This function returns the size of syseeprom by your switch,
+ * otherwise it returns a negative value on failed.
+ */
+static int dfd_get_syseeprom_size(void)
+{
+    int ret;
+
+    ret = dfd_get_eeprom_size(WB_MAIN_DEV_MAINBOARD, 0);
+    return ret;
+}
+
+/*
+ * dfd_read_syseeprom_data - Used to read syseeprom data,
+ * @buf: Data read buffer
+ * @offset: offset address to read syseeprom data
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * returns 0 means EOF,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_read_syseeprom_data(char *buf, loff_t offset, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_read_eeprom_data(WB_MAIN_DEV_MAINBOARD, 0, buf, offset, count);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+
+/*
+ * dfd_write_syseeprom_data - Used to write syseeprom data
+ * @buf: Data write buffer
+ * @offset: offset address to write syseeprom data
+ * @count: length of buf
+ *
+ * This function returns the written length of syseeprom,
+ * returns 0 means EOF,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_write_syseeprom_data(char *buf, loff_t offset, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_write_eeprom_data(WB_MAIN_DEV_MAINBOARD, 0, buf, offset, count);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+/*************************************end of syseeprom****************************************/
+
+/********************************************fan**********************************************/
+static int dfd_get_fan_number(void)
+{
+    int ret;
+
+    ret = dfd_get_dev_number(WB_MAIN_DEV_FAN, WB_MINOR_DEV_NONE);
+    return ret;
+}
+
+/*
+ * dfd_get_fan_status - Used to get fan status,
+ * filled the value to buf, fan status define see enum status_e
+ * @fan_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_fan_status(unsigned int fan_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_fan_status_str(fan_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_fan_present - Used to get fan present status,
+ * filled the value to buf, fan status define see enum status_e
+ * @fan_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_fan_present(unsigned int fan_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_fan_present_str(fan_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+static int dfd_get_fan_motor_number(unsigned int fan_index)
+{
+    int ret;
+
+    ret = dfd_get_dev_number(WB_MAIN_DEV_FAN, WB_MINOR_DEV_MOTOR);
+    return ret;
+}
+
+/*
+ * dfd_get_fan_model_name - Used to get fan model name,
+ * @fan_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_fan_model_name(unsigned int fan_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_fan_present_status(fan_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_fan_info(fan_index, DFD_DEV_INFO_TYPE_NAME, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_fan_vendor - Used to get fan vendor,
+ * @fan_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_fan_vendor(unsigned int fan_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_fan_present_status(fan_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_fan_info(fan_index, DFD_DEV_INFO_TYPE_VENDOR, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_fan_serial_number - Used to get fan serial number,
+ * @fan_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_fan_serial_number(unsigned int fan_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_fan_present_status(fan_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_fan_info(fan_index, DFD_DEV_INFO_TYPE_SN, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_fan_part_number - Used to get fan part number,
+ * @fan_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_fan_part_number(unsigned int fan_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_fan_present_status(fan_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_fan_info(fan_index, DFD_DEV_INFO_TYPE_PART_NUMBER, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_fan_hardware_version - Used to get fan hardware version,
+ * @fan_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_fan_hardware_version(unsigned int fan_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_fan_present_status(fan_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_fan_info(fan_index, DFD_DEV_INFO_TYPE_HW_INFO, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_fan_led_status - Used to get fan led status
+ * filled the value to buf, led status value define see enum fan_status_e
+ * @fan_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_fan_led_status(unsigned int fan_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_led_status(WB_FAN_LED_MODULE, fan_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_set_fan_led_status - Used to set fan led status
+ * @fan_index: start with 1
+ * @status: led status, led status value define see enum led_status_e
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int dfd_set_fan_led_status(unsigned int fan_index, int status)
+{
+    int ret;
+
+    ret = dfd_set_led_status(WB_FAN_LED_MODULE, fan_index, status);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_fan_direction - Used to get fan air flow direction,
+ * filled the value to buf, air flow direction define see enum air_flow_direction_e
+ * @fan_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_fan_direction(unsigned int fan_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_fan_present_status(fan_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf,  count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_fan_direction_str(fan_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_fan_motor_status - Used to get fan motor status
+ * filled the value to buf
+ * @fan_index: start with 1
+ * @motor_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_fan_motor_status(unsigned int fan_index, unsigned int motor_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_fan_motor_status_str(fan_index, motor_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_fan_motor_speed - Used to get fan motor speed
+ * filled the value to buf
+ * @fan_index: start with 1
+ * @motor_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_fan_motor_speed(unsigned int fan_index, unsigned int motor_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_fan_speed_str(fan_index, motor_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_fan_motor_speed_tolerance - Used to get fan motor speed tolerance
+ * filled the value to buf
+ * @fan_index: start with 1
+ * @motor_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_fan_motor_speed_tolerance(unsigned int fan_index, unsigned int motor_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_fan_present_status(fan_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_fan_motor_speed_tolerance_str(fan_index, motor_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_fan_motor_speed_target - Used to get fan motor speed target
+ * filled the value to buf
+ * @fan_index: start with 1
+ * @motor_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_fan_motor_speed_target(unsigned int fan_index, unsigned int motor_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_fan_present_status(fan_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_fan_motor_speed_target_str(fan_index, motor_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_fan_motor_speed_max - Used to get the maximum threshold of fan motor
+ * filled the value to buf
+ * @fan_index: start with 1
+ * @motor_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_fan_motor_speed_max(unsigned int fan_index, unsigned int motor_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_fan_present_status(fan_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_fan_motor_speed_max_str(fan_index, motor_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_fan_motor_speed_min - Used to get the minimum threshold of fan motor
+ * filled the value to buf
+ * @fan_index: start with 1
+ * @motor_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_fan_motor_speed_min(unsigned int fan_index, unsigned int motor_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_fan_present_status(fan_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_fan_motor_speed_min_str(fan_index, motor_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_fan_ratio - Used to get the ratio of fan
+ * filled the value to buf
+ * @fan_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_fan_ratio(unsigned int fan_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_fan_pwm_str(fan_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_set_fan_ratio - Used to set the ratio of fan
+ * @fan_index: start with 1
+ * @ratio: motor speed ratio, from 0 to 100
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int dfd_set_fan_ratio(unsigned int fan_index, int ratio)
+{
+    int ret;
+
+    /* add vendor codes here */
+    ret = dfd_set_fan_pwm(fan_index, ratio);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+/****************************************end of fan*******************************************/
+/********************************************psu**********************************************/
+static int dfd_get_psu_number(void)
+{
+    int ret;
+
+    ret = dfd_get_dev_number(WB_MAIN_DEV_PSU, WB_MINOR_DEV_NONE);
+    return ret;
+}
+
+/*
+ * dfd_get_psu_present_status - Used to get psu present status
+ * filled the value to buf, psu present status define see enum psu_status_e
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_psu_present(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_psu_present_status_str(psu_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+static int dfd_get_psu_temp_number(unsigned int psu_index)
+{
+    int ret;
+
+    ret = dfd_get_dev_number(WB_MAIN_DEV_PSU, WB_MINOR_DEV_TEMP);
+    return ret;
+}
+
+/* Similar to dfd_get_psu_model_name */
+static ssize_t dfd_get_psu_model_name(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_info(psu_index, DFD_DEV_INFO_TYPE_PART_NAME, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+static ssize_t dfd_get_psu_vendor(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_info(psu_index, DFD_DEV_INFO_TYPE_VENDOR, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+static ssize_t dfd_get_psu_date(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_info(psu_index, DFD_DEV_INFO_TYPE_ASSET_TAG, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+static ssize_t dfd_get_psu_status(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status_word;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf,  count);
+        status = status | 0x01;
+        return (ssize_t)snprintf(buf, count, "0x%x\n", status);
+    }
+
+    ret = dfd_get_psu_pmbus_status(psu_index, buf, count);
+    if (ret < 0) {
+        SWITCH_DEBUG(DBG_ERROR, "get psu pmbus status error, ret: %ld, psu_index: %u\n", ret, psu_index);
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    } else {
+        ret = kstrtoint(buf, 0, &status_word);
+        if (ret) {
+            SWITCH_DEBUG(DBG_ERROR, "invalid value: %s \n", buf);
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+
+    status = 0;
+    mem_clear(buf,  count);
+    if (status_word < 0) {
+        return status_word;
+    } else {
+        status = (status_word & PSU_OFF_FAULT) ? (status | 0x02) : status;
+        status = (status_word & PSU_FAN_FAULT) ? (status | 0x04) : status;
+        status = (status_word & PSU_VOUT_FAULT) ? (status | 0x08) : status;
+        status = (status_word & PSU_IOUT_FAULT) ? (status | 0x10) : status;
+        status = (status_word & PSU_INPUT_FAULT) ? (status | 0x20) : status;
+        status = (status_word & PSU_TEMP_FAULT) ? (status | 0x40) : status;
+    }
+    return (ssize_t)snprintf(buf, count, "0x%x\n", status);
+}
+
+static ssize_t dfd_get_psu_alarm(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_alarm_status(psu_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to wb_get_fan_serial_number */
+static ssize_t dfd_get_psu_serial_number(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_info(psu_index, DFD_DEV_INFO_TYPE_SN, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to wb_get_fan_part_number */
+static ssize_t dfd_get_psu_part_number(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_info(psu_index, DFD_DEV_INFO_TYPE_PART_NUMBER, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to wb_get_fan_hardware_version */
+static ssize_t dfd_get_psu_hardware_version(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_info(psu_index, DFD_DEV_INFO_TYPE_HW_INFO, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_psu_type - Used to get the input type of psu
+ * filled the value to buf, input type value define see enum psu_input_type_e
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_psu_type(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_input_type(psu_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_psu_in_curr - Used to get the input current of psu
+ * filled the value to buf, the value is integer with mA
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_psu_in_curr(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_sensor_info(psu_index, PSU_IN_CURR, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_psu_in_vol - Used to get the input voltage of psu
+ * filled the value to buf, the value is integer with mV
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_psu_in_vol(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_sensor_info(psu_index, PSU_IN_VOL, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_psu_in_power - Used to get the input power of psu
+ * filled the value to buf, the value is integer with uW
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_psu_in_power(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_sensor_info(psu_index, PSU_IN_POWER, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_psu_out_curr - Used to get the output current of psu
+ * filled the value to buf, the value is integer with mA
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_psu_out_curr(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_sensor_info(psu_index, PSU_OUT_CURR, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_psu_out_vol - Used to get the output voltage of psu
+ * filled the value to buf, the value is integer with mV
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_psu_out_vol(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_sensor_info(psu_index, PSU_OUT_VOL, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_psu_out_power - Used to get the output power of psu
+ * filled the value to buf, the value is integer with uW
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_psu_out_power(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_sensor_info(psu_index, PSU_OUT_POWER, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_psu_out_max_power - Used to get the output max power of psu
+ * filled the value to buf, the value is integer with uW
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_psu_out_max_power(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_info(psu_index, DFD_DEV_INFO_TYPE_MAX_OUTPUT_POWRER, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_psu_in_status - Used to get psu input status
+ * filled the value to buf, psu input status define see enum psu_io_status_e
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_psu_in_status(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_in_status_str(psu_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_psu_out_status - Used to get psu output status
+ * filled the value to buf, psu output status define see enum psu_io_status_e
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_psu_out_status(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf,  count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_out_status_str(psu_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+static ssize_t dfd_get_psu_hw_status(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_psu_hw_status_str(psu_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+static ssize_t dfd_get_psu_attr_threshold(unsigned int psu_index, unsigned int type, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_psu_threshold_str(psu_index, type, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+static ssize_t dfd_get_psu_status_pmbus(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_status_pmbus_str(psu_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_psu_fan_speed - Used to get psu fan speed
+ * filled the value to buf
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_psu_fan_speed(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_sensor_info(psu_index, PSU_FAN_SPEED, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_psu_fan_ratio - Used to get the ratio of psu fan
+ * filled the value to buf
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_psu_fan_ratio(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_fan_ratio_str(psu_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_set_psu_fan_ratio - Used to set the ratio of psu fan
+ * @psu_index: start with 1
+ * @ratio: from 0 to 100
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int dfd_set_psu_fan_ratio(unsigned int psu_index, int ratio)
+{
+    /* add vendor codes here */
+    return -WB_SYSFS_RV_UNSUPPORT;
+}
+
+/*
+ * dfd_get_psu_fan_direction - Used to get psu air flow direction,
+ * filled the value to buf, air flow direction define enum air_flow_direction_e
+ * @psu_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_psu_fan_direction(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_info(psu_index, DFD_DEV_INFO_TYPE_FAN_DIRECTION, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_fan_led_status */
+static ssize_t dfd_get_psu_led_status(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status_word;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        status = LED_STATUS_DARK; /* led off */
+        return (ssize_t)snprintf(buf, count, "%d\n", status);
+    }
+    status = LED_STATUS_GREEN;
+
+    ret = dfd_get_psu_pmbus_status(psu_index, buf, count);
+    if (ret < 0) {
+        SWITCH_DEBUG(DBG_ERROR, "get psu pmbus status error, ret: %ld, psu_index: %u\n", ret, psu_index);
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    } else {
+        ret = kstrtoint(buf, 0, &status_word);
+        if (ret) {
+            SWITCH_DEBUG(DBG_ERROR, "invalid value: %s \n", buf);
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    mem_clear(buf,  count);
+    if (status_word > 0) {
+        status = LED_STATUS_YELLOW; /* led amber */
+        return (ssize_t)snprintf(buf, count, "%d\n", status);
+    }
+    return (ssize_t)snprintf(buf, count, "%d\n", status); /* led green */
+}
+
+static ssize_t dfd_get_psu_fan_speed_cal(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_info(psu_index, DFD_DEV_INFO_TYPE_SPEED_CAL, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_temp_alias */
+static ssize_t dfd_get_psu_temp_alias(unsigned int psu_index, unsigned int temp_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_temp_info(WB_MAIN_DEV_PSU, psu_index, temp_index, WB_SENSOR_ALIAS,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_temp_type */
+static ssize_t dfd_get_psu_temp_type(unsigned int psu_index, unsigned int temp_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_temp_info(WB_MAIN_DEV_PSU, psu_index, temp_index, WB_SENSOR_TYPE,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+
+}
+
+/* Similar to dfd_get_main_board_temp_max */
+static ssize_t dfd_get_psu_temp_max(unsigned int psu_index, unsigned int temp_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_temp_info(WB_MAIN_DEV_PSU, psu_index, temp_index, WB_SENSOR_MAX,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_set_main_board_temp_max */
+static int dfd_set_psu_temp_max(unsigned int psu_index, unsigned int temp_index,
+               const char *buf, size_t count)
+{
+    /* add vendor codes here */
+    return -WB_SYSFS_RV_UNSUPPORT;
+}
+
+/* Similar to dfd_get_main_board_temp_min */
+static ssize_t dfd_get_psu_temp_min(unsigned int psu_index, unsigned int temp_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_temp_info(WB_MAIN_DEV_PSU, psu_index, temp_index, WB_SENSOR_MIN,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_set_main_board_temp_min */
+static int dfd_set_psu_temp_min(unsigned int psu_index, unsigned int temp_index,
+               const char *buf, size_t count)
+{
+    /* add vendor codes here */
+    return -WB_SYSFS_RV_UNSUPPORT;
+}
+
+/* Similar to dfd_get_main_board_temp_value */
+static ssize_t dfd_get_psu_temp_value(unsigned int psu_index, unsigned int temp_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf,  count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_temp_info(WB_MAIN_DEV_PSU, psu_index, temp_index, WB_SENSOR_INPUT,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_psu_eeprom_size - Used to get psu eeprom size
+ *
+ * This function returns the size of psu eeprom,
+ * otherwise it returns a negative value on failed.
+ */
+static int dfd_get_psu_eeprom_size(unsigned int psu_index)
+{
+    int ret;
+
+    ret = dfd_get_eeprom_size(WB_MAIN_DEV_PSU, psu_index);
+    return ret;
+}
+
+/*
+ * dfd_read_psu_eeprom_data - Used to read psu eeprom data,
+ * @buf: Data read buffer
+ * @offset: offset address to read psu eeprom data
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * returns 0 means EOF,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_read_psu_eeprom_data(unsigned int psu_index, char *buf, loff_t offset,
+                   size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_read_eeprom_data(WB_MAIN_DEV_PSU, psu_index, buf, offset, count);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+
+static ssize_t dfd_get_psu_blackbox_info(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_blackbox(psu_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+static ssize_t dfd_get_psu_pmbus_info(unsigned int psu_index, char *buf, size_t count)
+{
+    ssize_t ret;
+    int status;
+
+    status = dfd_get_psu_present_status(psu_index);
+    if (status == DEV_ABSENT) {
+        mem_clear(buf,  count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    }
+
+    ret = dfd_get_psu_pmbus(psu_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_clear_psu_blackbox_info - Used to clear psu blackbox information
+ * @psu_index: start with 1
+ * @value: 1
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int dfd_clear_psu_blackbox_info(unsigned int psu_index, uint8_t value)
+{
+    int ret;
+
+    ret = dfd_clear_psu_blackbox(psu_index, value);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+
+}
+/****************************************end of psu*******************************************/
+/****************************************transceiver******************************************/
+static int dfd_get_eth_number(void)
+{
+    int ret;
+
+    ret = dfd_get_dev_number(WB_MAIN_DEV_SFF, WB_MINOR_DEV_NONE);
+    return ret;
+}
+
+/*
+ * dfd_get_transceiver_power_on_status - Used to get the whole machine port power on status,
+ * filled the value to buf, 0: power off, 1: power on
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_transceiver_power_on_status(char *buf, size_t count)
+{
+    ssize_t ret;
+    unsigned int eth_index, eth_num;
+    int len, left_len;
+    eth_num = dfd_get_dev_number(WB_MAIN_DEV_SFF, WB_MINOR_DEV_NONE);
+    if (eth_num <= 0) {
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+    }
+
+    mem_clear(buf, count);
+    len = 0;
+    left_len = count - 1;
+
+    for (eth_index = 1; eth_index <= eth_num; eth_index++) {
+        SWITCH_DEBUG(DBG_VERBOSE, "eth index: %u\n", eth_index);
+        if (left_len > 0) {
+            ret = dfd_get_sff_cpld_info(eth_index, WB_SFF_POWER_ON, buf, left_len);
+            if (ret < 0) {
+                SWITCH_DEBUG(DBG_ERROR, "get eth%u power status failed, ret: %ld\n", eth_index, ret);
+                break;
+            }
+        } else {
+            SWITCH_DEBUG(DBG_ERROR, "error: get_transceiver_power_on_status are not enough buffers.\n");
+            ret = -DFD_RV_NO_MEMORY;
+            break;
+        }
+        dfd_ko_cfg_del_lf_cr(buf);  /* del '\n' */
+        len = strlen(buf);
+        left_len = count - len - 2; /* Reserve end to add '\n' and '\0' */
+    }
+
+    if (ret < 0) {
+        mem_clear(buf, count);
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+
+    len = strlen(buf);
+    if (len >= count) {
+        SWITCH_DEBUG(DBG_ERROR, "error: get_transceiver_power_on_status buffers too long, need: %ld, act: %d.\n", count, len);
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+    }
+    buf[len] = '\n';
+    ret = strlen(buf);
+    SWITCH_DEBUG(DBG_VERBOSE, "get_transceiver_power_on_status ok. sff num:%d, len:%ld\n", eth_num, ret);
+
+    return ret;
+}
+
+/*
+ * dfd_set_transceiver_power_on_status - Used to set the whole machine port power on status,
+ * @status: power on status, 0: power off, 1: power on
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int dfd_set_transceiver_power_on_status(int status)
+{
+    int ret;
+
+    ret = dfd_set_sff_cpld_info(0, WB_SFF_POWER_ON, status);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_transceiver_present_status - Used to get the whole machine port present status,
+ * filled the value to buf, 0: absent, 1: present
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_transceiver_present_status(char *buf, size_t count)
+{
+    ssize_t ret;
+    unsigned int eth_index, eth_num;
+    int len, left_len;
+
+    eth_num = dfd_get_dev_number(WB_MAIN_DEV_SFF, WB_MINOR_DEV_NONE);
+    if (eth_num <= 0) {
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+    }
+
+    mem_clear(buf, count);
+    len = 0;
+    left_len = count - 1;
+
+    for (eth_index = 1; eth_index <= eth_num; eth_index++) {
+        SWITCH_DEBUG(DBG_VERBOSE, "eth index: %u\n", eth_index);
+        if (left_len > 0) {
+            ret = dfd_get_sff_cpld_info(eth_index, WB_SFF_MODULE_PRESENT, buf + len, left_len);
+            if (ret < 0) {
+                SWITCH_DEBUG(DBG_ERROR, "get eth%u present status failed, ret: %ld\n", eth_index, ret);
+                break;
+            }
+        } else {
+            SWITCH_DEBUG(DBG_ERROR, "error: get_transceiver_present_status are not enough buffers.\n");
+            ret = -DFD_RV_NO_MEMORY;
+            break;
+        }
+        dfd_ko_cfg_del_lf_cr(buf);  /* del '\n' */
+        len = strlen(buf);
+        left_len = count - len - 2; /* Reserve end to add '\n' and '\0' */
+    }
+
+    if (ret < 0) {
+        mem_clear(buf, count);
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+
+    len = strlen(buf);
+    if (len >= count) {
+        SWITCH_DEBUG(DBG_ERROR, "error: get_transceiver_present_status buffers too long, need: %ld, act: %d.\n", count, len);
+        mem_clear(buf, count);
+        return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+    }
+    buf[len] = '\n';
+    ret = strlen(buf);
+    SWITCH_DEBUG(DBG_VERBOSE, "get_transceiver_present_status ok. sff num:%d, len:%ld\n", eth_num, ret);
+
+    return ret;
+}
+
+
+/*
+ * dfd_get_eth_power_on_status - Used to get single port power on status,
+ * filled the value to buf, 0: power off, 1: power on
+ * @eth_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_eth_power_on_status(unsigned int eth_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_sff_cpld_info(eth_index, WB_SFF_POWER_ON, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_set_eth_power_on_status - Used to set single port power on status,
+ * @eth_index: start with 1
+ * @status: power on status, 0: power off, 1: power on
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int dfd_set_eth_power_on_status(unsigned int eth_index, int status)
+{
+    int ret;
+
+    ret = dfd_set_sff_cpld_info(eth_index, WB_SFF_POWER_ON, status);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_eth_tx_fault_status - Used to get port tx_fault status,
+ * filled the value to buf, 0: normal, 1: abnormal
+ * @eth_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_eth_tx_fault_status(unsigned int eth_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_sff_cpld_info(eth_index, WB_SFF_TX_FAULT, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_eth_tx_disable_status - Used to get port tx_disable status,
+ * filled the value to buf, 0: tx_enable, 1: tx_disable
+ * @eth_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_eth_tx_disable_status(unsigned int eth_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_sff_cpld_info(eth_index, WB_SFF_TX_DIS, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_set_eth_tx_disable_status - Used to set port tx_disable status,
+ * @eth_index: start with 1
+ * @status: tx_disable status, 0: tx_enable, 1: tx_disable
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int dfd_set_eth_tx_disable_status(unsigned int eth_index, int status)
+{
+    int ret;
+
+    ret = dfd_set_sff_cpld_info(eth_index, WB_SFF_TX_DIS, status);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_eth_present_status - Used to get port present status,
+ * filled the value to buf, 1: present, 0: absent
+ * @eth_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_eth_present_status(unsigned int eth_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_sff_cpld_info(eth_index, WB_SFF_MODULE_PRESENT, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_eth_rx_los_status - Used to get port rx_los status,
+ * filled the value to buf, 0: normal, 1: abnormal
+ * @eth_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_eth_rx_los_status(unsigned int eth_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_sff_cpld_info(eth_index, WB_SFF_RX_LOS, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_eth_reset_status - Used to get port reset status,
+ * filled the value to buf, 0: unreset, 1: reset
+ * @eth_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_eth_reset_status(unsigned int eth_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_sff_cpld_info(eth_index, WB_SFF_RESET, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_set_eth_reset_status - Used to set port reset status,
+ * @eth_index: start with 1
+ * @status: reset status, 0: unreset, 1: reset
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int dfd_set_eth_reset_status(unsigned int eth_index, int status)
+{
+    int ret;
+
+    ret = dfd_set_sff_cpld_info(eth_index, WB_SFF_RESET, status);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+
+/**
+ * dfd_get_eth_optoe_type - get sff optoe type
+ * @sff_index: Optical module number, starting from 1
+ * @optoe_type: Optical module type
+ * return: Success: Returns the length of fill buf
+ *       : Failed: A negative value is returned
+ */
+static ssize_t dfd_get_eth_optoe_type(unsigned int eth_index, int *optoe_type, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_single_eth_optoe_type(eth_index, optoe_type);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return (ssize_t)snprintf(buf, count, "%d\n", *optoe_type);
+}
+
+/**
+ * dfd_set_eth_optoe_type - set sff optoe type
+ * @sff_index: Optical module number, starting from 1
+ * @optoe_type: Optical module type
+ * return: Success: Returns the length of fill buf
+ *       : Failed: A negative value is returned
+ */
+static int dfd_set_eth_optoe_type(unsigned int eth_index, int optoe_type)
+{
+    int ret;
+
+    ret = dfd_set_single_eth_optoe_type(eth_index, optoe_type);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+
+
+/*
+ * dfd_get_eth_low_power_mode_status - Used to get port low power mode status,
+ * filled the value to buf, 0: high power mode, 1: low power mode
+ * @eth_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_eth_low_power_mode_status(unsigned int eth_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_sff_cpld_info(eth_index, WB_SFF_LPMODE, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_eth_interrupt_status - Used to get port interruption status,
+ * filled the value to buf, 0: no interruption, 1: interruption
+ * @eth_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_eth_interrupt_status(unsigned int eth_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_sff_cpld_info(eth_index, WB_SFF_INTERRUPT, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_eth_eeprom_size - Used to get port eeprom size
+ *
+ * This function returns the size of port eeprom,
+ * otherwise it returns a negative value on failed.
+ */
+static int dfd_get_eth_eeprom_size(unsigned int eth_index)
+{
+    int ret;
+
+    ret = dfd_get_eeprom_size(WB_MAIN_DEV_SFF, eth_index);
+    return ret;
+}
+
+/*
+ * dfd_read_eth_eeprom_data - Used to read port eeprom data,
+ * @buf: Data read buffer
+ * @offset: offset address to read port eeprom data
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * returns 0 means EOF,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_read_eth_eeprom_data(unsigned int eth_index, char *buf, loff_t offset,
+                   size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_read_eeprom_data(WB_MAIN_DEV_SFF, eth_index, buf, offset, count);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+
+/*
+ * dfd_write_eth_eeprom_data - Used to write port eeprom data
+ * @buf: Data write buffer
+ * @offset: offset address to write port eeprom data
+ * @count: length of buf
+ *
+ * This function returns the written length of port eeprom,
+ * returns 0 means EOF,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_write_eth_eeprom_data(unsigned int eth_index, char *buf, loff_t offset,
+                   size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_write_eeprom_data(WB_MAIN_DEV_SFF, eth_index, buf, offset, count);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+/************************************end of transceiver***************************************/
+/*****************************************sysled**********************************************/
+/*
+ * dfd_get_sys_led_status - Used to get sys led status
+ * filled the value to buf, led status value define see enum fan_status_e
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_sys_led_status(char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_led_status(WB_SYS_LED_FRONT, WB_MINOR_DEV_NONE, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_set_sys_led_status - Used to set sys led status
+ * @status: led status, led status value define see enum led_status_e
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int dfd_set_sys_led_status(int status)
+{
+    int ret;
+
+    ret = dfd_set_led_status(WB_SYS_LED_FRONT, WB_MINOR_DEV_NONE, status);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_sys_led_status */
+static ssize_t dfd_get_bmc_led_status(char *buf, size_t count)
+{
+    int ret;
+
+    ret = dfd_get_led_status(WB_BMC_LED_FRONT, WB_MINOR_DEV_NONE, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_set_sys_led_status */
+static int dfd_set_bmc_led_status(int status)
+{
+    int ret;
+
+    ret = dfd_set_led_status(WB_BMC_LED_FRONT, WB_MINOR_DEV_NONE, status);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_sys_led_status */
+static ssize_t dfd_get_sys_fan_led_status(char *buf, size_t count)
+{
+    int ret;
+
+    ret = dfd_get_led_status(WB_FAN_LED_FRONT, WB_MINOR_DEV_NONE, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_set_sys_led_status */
+static int dfd_set_sys_fan_led_status(int status)
+{
+    int ret;
+
+    ret = dfd_set_led_status(WB_FAN_LED_FRONT, WB_MINOR_DEV_NONE, status);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_sys_led_status */
+static ssize_t dfd_get_sys_psu_led_status(char *buf, size_t count)
+{
+    int ret;
+
+    ret = dfd_get_led_status(WB_PSU_LED_FRONT, WB_MINOR_DEV_NONE, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_set_sys_led_status */
+static int dfd_set_sys_psu_led_status(int status)
+{
+    int ret;
+
+    ret = dfd_set_led_status(WB_PSU_LED_FRONT, WB_MINOR_DEV_NONE, status);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_sys_led_status */
+static ssize_t dfd_get_id_led_status(char *buf, size_t count)
+{
+    int ret;
+
+    ret = dfd_get_led_status(WB_ID_LED_FRONT, WB_MINOR_DEV_NONE, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_set_sys_led_status */
+static int dfd_set_id_led_status(int status)
+{
+    int ret;
+
+    ret = dfd_set_led_status(WB_ID_LED_FRONT, WB_MINOR_DEV_NONE, status);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+
+/**************************************end of sysled******************************************/
+/******************************************FPGA***********************************************/
+static int dfd_get_main_board_fpga_number(void)
+{
+    int ret;
+
+    ret = dfd_get_dev_number(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_FPGA);
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_fpga_alias - Used to identify the location of fpga,
+ * @fpga_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_fpga_alias(unsigned int fpga_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_fpga_name(WB_MAIN_DEV_MAINBOARD, fpga_index - 1, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_fpga_type - Used to get fpga model name
+ * @fpga_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_fpga_type(unsigned int fpga_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_fpga_type(WB_MAIN_DEV_MAINBOARD, fpga_index - 1, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_fpga_firmware_version - Used to get fpga firmware version,
+ * @fpga_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_fpga_firmware_version(unsigned int fpga_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_fpga_fw_version(WB_MAIN_DEV_MAINBOARD, fpga_index - 1, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_fpga_board_version - Used to get fpga board version,
+ * @fpga_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_fpga_board_version(unsigned int fpga_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_fpga_hw_version(WB_MAIN_DEV_MAINBOARD, fpga_index - 1, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_fpga_test_reg - Used to test fpga register read
+ * filled the value to buf, value is hexadecimal, start with 0x
+ * @fpga_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_fpga_test_reg(unsigned int fpga_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_fpga_testreg_str(WB_MAIN_DEV_MAINBOARD, fpga_index - 1, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_set_main_board_fpga_test_reg - Used to test fpga register write
+ * @fpga_index: start with 1
+ * @value: value write to fpga
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int dfd_set_main_board_fpga_test_reg(unsigned int fpga_index, unsigned int value)
+{
+    int ret;
+
+    ret = dfd_set_fpga_testreg(WB_MAIN_DEV_MAINBOARD, fpga_index - 1, value);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+/***************************************end of FPGA*******************************************/
+/******************************************CPLD***********************************************/
+static int dfd_get_main_board_cpld_number(void)
+{
+    int ret;
+
+    ret = dfd_get_dev_number(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_CPLD);
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_cpld_alias - Used to identify the location of cpld,
+ * @cpld_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_cpld_alias(unsigned int cpld_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_cpld_name(WB_MAIN_DEV_MAINBOARD, cpld_index - 1, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_cpld_type - Used to get cpld model name
+ * @cpld_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_cpld_type(unsigned int cpld_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_cpld_type(WB_MAIN_DEV_MAINBOARD, cpld_index - 1, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_cpld_firmware_version - Used to get cpld firmware version,
+ * @cpld_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_cpld_firmware_version(unsigned int cpld_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_cpld_fw_version(WB_MAIN_DEV_MAINBOARD, cpld_index - 1, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_cpld_board_version - Used to get cpld board version,
+ * @cpld_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_cpld_board_version(unsigned int cpld_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_cpld_hw_version(WB_MAIN_DEV_MAINBOARD, cpld_index - 1, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_main_board_cpld_test_reg - Used to test cpld register read
+ * filled the value to buf, value is hexadecimal, start with 0x
+ * @cpld_index: start with 1
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * if not support this attributes filled "NA" to buf,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_main_board_cpld_test_reg(unsigned int cpld_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_cpld_testreg_str(WB_MAIN_DEV_MAINBOARD, cpld_index - 1, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_set_main_board_cpld_test_reg - Used to test cpld register write
+ * @cpld_index: start with 1
+ * @value: value write to cpld
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int dfd_set_main_board_cpld_test_reg(unsigned int cpld_index, unsigned int value)
+{
+    int ret;
+
+    ret = dfd_set_cpld_testreg(WB_MAIN_DEV_MAINBOARD, cpld_index - 1, value);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+/***************************************end of CPLD*******************************************/
+/****************************************watchdog*********************************************/
+/*
+ * dfd_get_watchdog_identify - Used to get watchdog identify, such as iTCO_wdt
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_watchdog_identify(char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_watchdog_info(WB_WDT_TYPE_NAME, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_watchdog_timeleft - Used to get watchdog timeleft,
+ * filled the value to buf
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_watchdog_timeleft(char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_watchdog_info(WB_WDT_TYPE_TIMELEFT, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_watchdog_timeout - Used to get watchdog timeout,
+ * filled the value to buf
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_watchdog_timeout(char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_watchdog_info(WB_WDT_TYPE_TIMEOUT, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_set_watchdog_timeout - Used to set watchdog timeout,
+ * @value: timeout value
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int dfd_set_watchdog_timeout(int value)
+{
+    /* add vendor codes here */
+    return -WB_SYSFS_RV_UNSUPPORT;
+}
+
+/*
+ * dfd_get_watchdog_enable_status - Used to get watchdog enable status,
+ * filled the value to buf, 0: disable, 1: enable
+ * @buf: Data receiving buffer
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_watchdog_enable_status(char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_watchdog_get_status(buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_set_watchdog_enable_status - Used to set watchdog enable status,
+ * @value: enable status value, 0: disable, 1: enable
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int dfd_set_watchdog_enable_status(int value)
+{
+    /* add vendor codes here */
+    int ret;
+    ret = dfd_watchdog_set_status(value);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+
+/*
+ * dfd_set_watchdog_reset - Used to feed watchdog,
+ * @value: any value to feed watchdog
+ *
+ * This function returns 0 on success,
+ * otherwise it returns a negative value on failed.
+ */
+static int dfd_set_watchdog_reset(int value)
+{
+    /* add vendor codes here */
+    return -WB_SYSFS_RV_UNSUPPORT;
+}
+/*************************************end of watchdog*****************************************/
+/******************************************slot***********************************************/
+static int dfd_get_slot_number(void)
+{
+    int ret;
+
+    ret = dfd_get_dev_number(WB_MAIN_DEV_SLOT, WB_MINOR_DEV_NONE);
+    return ret;
+}
+
+static int dfd_get_slot_temp_number(unsigned int slot_index)
+{
+    int ret;
+
+    ret = dfd_get_dev_number(WB_MAIN_DEV_SLOT, WB_MINOR_DEV_TEMP);
+    return ret;
+}
+
+static int dfd_get_slot_vol_number(unsigned int slot_index)
+{
+    int ret;
+
+    ret = dfd_get_dev_number(WB_MAIN_DEV_SLOT, WB_MINOR_DEV_IN);
+    return ret;
+}
+
+static int dfd_get_slot_curr_number(unsigned int slot_index)
+{
+    int ret;
+
+    ret = dfd_get_dev_number(WB_MAIN_DEV_SLOT, WB_MINOR_DEV_CURR);
+    return ret;
+}
+
+static int dfd_get_slot_fpga_number(unsigned int slot_index)
+{
+    int ret;
+
+    ret = dfd_get_dev_number(WB_MAIN_DEV_SLOT, WB_MINOR_DEV_FPGA);
+    return ret;
+}
+
+static int dfd_get_slot_cpld_number(unsigned int slot_index)
+{
+    int ret;
+
+    ret = dfd_get_dev_number(WB_MAIN_DEV_SLOT, WB_MINOR_DEV_CPLD);
+    return ret;
+}
+
+/* Similar to dfd_get_fan_model_name */
+static ssize_t dfd_get_slot_model_name(unsigned int slot_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_slot_info(slot_index, DFD_DEV_INFO_TYPE_NAME, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+static ssize_t dfd_get_slot_vendor(unsigned int slot_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_slot_info(slot_index, DFD_DEV_INFO_TYPE_VENDOR, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to wb_get_fan_serial_number */
+static ssize_t dfd_get_slot_serial_number(unsigned int slot_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_slot_info(slot_index, DFD_DEV_INFO_TYPE_SN, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to wb_get_fan_part_number */
+static ssize_t dfd_get_slot_part_number(unsigned int slot_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_slot_info(slot_index, DFD_DEV_INFO_TYPE_PART_NUMBER, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to wb_get_fan_hardware_version */
+static ssize_t dfd_get_slot_hardware_version(unsigned int slot_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_slot_info(slot_index, DFD_DEV_INFO_TYPE_HW_INFO, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_fan_status */
+static ssize_t dfd_get_slot_status(unsigned int slot_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_slot_status_str(slot_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_fan_led_status */
+static ssize_t dfd_get_slot_led_status(unsigned int slot_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_led_status(WB_SLOT_LED_MODULE, slot_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_set_fan_led_status */
+static int dfd_set_slot_led_status(unsigned int slot_index, int status)
+{
+    int ret;
+
+    ret = dfd_set_led_status(WB_SLOT_LED_MODULE, slot_index, status);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+
+static ssize_t dfd_get_slot_power_status(unsigned int slot_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_slot_power_status_str(slot_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+static int dfd_set_slot_power_status(unsigned int slot_index, int status)
+{
+    int ret;
+
+    ret = dfd_set_slot_power_status_str(slot_index, status);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_temp_alias */
+static ssize_t dfd_get_slot_temp_alias(unsigned int slot_index, unsigned int temp_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_temp_info(WB_MAIN_DEV_SLOT, slot_index, temp_index, WB_SENSOR_ALIAS,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_temp_type */
+static ssize_t dfd_get_slot_temp_type(unsigned int slot_index, unsigned int temp_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_temp_info(WB_MAIN_DEV_SLOT, slot_index, temp_index, WB_SENSOR_TYPE,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_temp_max */
+static ssize_t dfd_get_slot_temp_max(unsigned int slot_index, unsigned int temp_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_temp_info(WB_MAIN_DEV_SLOT, slot_index, temp_index, WB_SENSOR_MAX,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_temp_min */
+static ssize_t dfd_get_slot_temp_min(unsigned int slot_index, unsigned int temp_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_temp_info(WB_MAIN_DEV_SLOT, slot_index, temp_index, WB_SENSOR_MIN,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_temp_value */
+static ssize_t dfd_get_slot_temp_value(unsigned int slot_index, unsigned int temp_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_temp_info(WB_MAIN_DEV_SLOT, slot_index, temp_index, WB_SENSOR_INPUT,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_vol_alias */
+static ssize_t dfd_get_slot_vol_alias(unsigned int slot_index, unsigned int vol_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_voltage_info(WB_MAIN_DEV_SLOT, slot_index, vol_index, WB_SENSOR_ALIAS,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_vol_type */
+static ssize_t dfd_get_slot_vol_type(unsigned int slot_index, unsigned int vol_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_voltage_info(WB_MAIN_DEV_SLOT, slot_index, vol_index, WB_SENSOR_TYPE,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_vol_max */
+static ssize_t dfd_get_slot_vol_max(unsigned int slot_index, unsigned int vol_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_voltage_info(WB_MAIN_DEV_SLOT, slot_index, vol_index, WB_SENSOR_MAX,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_vol_min */
+static ssize_t dfd_get_slot_vol_min(unsigned int slot_index, unsigned int vol_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_voltage_info(WB_MAIN_DEV_SLOT, slot_index, vol_index, WB_SENSOR_MIN,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_vol_range */
+static ssize_t dfd_get_slot_vol_range(unsigned int slot_index, unsigned int vol_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_voltage_info(WB_MAIN_DEV_SLOT, slot_index, vol_index, WB_SENSOR_RANGE,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_vol_nominal_value */
+static ssize_t dfd_get_slot_vol_nominal_value(unsigned int slot_index,
+                   unsigned int vol_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_voltage_info(WB_MAIN_DEV_SLOT, slot_index, vol_index, WB_SENSOR_NOMINAL_VAL,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_vol_value */
+static ssize_t dfd_get_slot_vol_value(unsigned int slot_index, unsigned int vol_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_voltage_info(WB_MAIN_DEV_SLOT, slot_index, vol_index, WB_SENSOR_INPUT,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_curr_alias */
+static ssize_t dfd_get_slot_curr_alias(unsigned int slot_index, unsigned int curr_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_current_info(WB_MAIN_DEV_SLOT, slot_index, curr_index, WB_SENSOR_ALIAS,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_curr_type */
+static ssize_t dfd_get_slot_curr_type(unsigned int slot_index, unsigned int curr_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_current_info(WB_MAIN_DEV_SLOT, slot_index, curr_index, WB_SENSOR_TYPE,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_curr_max */
+static ssize_t dfd_get_slot_curr_max(unsigned int slot_index, unsigned int curr_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_current_info(WB_MAIN_DEV_SLOT, slot_index, curr_index, WB_SENSOR_MAX,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_curr_min */
+static ssize_t dfd_get_slot_curr_min(unsigned int slot_index, unsigned int curr_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_current_info(WB_MAIN_DEV_SLOT, slot_index, curr_index, WB_SENSOR_MIN,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_curr_value */
+static ssize_t dfd_get_slot_curr_value(unsigned int slot_index, unsigned int curr_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_current_info(WB_MAIN_DEV_SLOT, slot_index, curr_index, WB_SENSOR_INPUT,
+              buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_fpga_alias */
+static ssize_t dfd_get_slot_fpga_alias(unsigned int slot_index, unsigned int fpga_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_fpga_name(slot_index, fpga_index - 1, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_fpga_type */
+static ssize_t dfd_get_slot_fpga_type(unsigned int slot_index, unsigned int fpga_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_fpga_type(slot_index, fpga_index - 1, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_fpga_firmware_version */
+static ssize_t dfd_get_slot_fpga_firmware_version(unsigned int slot_index, unsigned int fpga_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_fpga_fw_version(slot_index, fpga_index - 1, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_fpga_board_version */
+static ssize_t dfd_get_slot_fpga_board_version(unsigned int slot_index, unsigned int fpga_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_fpga_hw_version(slot_index, fpga_index - 1, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_fpga_test_reg */
+static ssize_t dfd_get_slot_fpga_test_reg(unsigned int slot_index, unsigned int fpga_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_fpga_testreg_str(slot_index, fpga_index - 1, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_set_main_board_fpga_test_reg */
+static int dfd_set_slot_fpga_test_reg(unsigned int slot_index, unsigned int fpga_index,
+           unsigned int value)
+{
+    int ret;
+
+    ret = dfd_set_fpga_testreg(slot_index, fpga_index - 1, value);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_cpld_alias */
+static ssize_t dfd_get_slot_cpld_alias(unsigned int slot_index, unsigned int cpld_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_cpld_name(slot_index, cpld_index - 1, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_cpld_type */
+static ssize_t dfd_get_slot_cpld_type(unsigned int slot_index, unsigned int cpld_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_cpld_type(slot_index, cpld_index - 1, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_cpld_firmware_version */
+static ssize_t dfd_get_slot_cpld_firmware_version(unsigned int slot_index, unsigned int cpld_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_cpld_fw_version(slot_index, cpld_index - 1, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_cpld_board_version */
+static ssize_t dfd_get_slot_cpld_board_version(unsigned int slot_index, unsigned int cpld_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_cpld_hw_version(slot_index, cpld_index - 1, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_get_main_board_cpld_test_reg */
+static ssize_t dfd_get_slot_cpld_test_reg(unsigned int slot_index, unsigned int cpld_index,
+                   char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_cpld_testreg_str(slot_index, cpld_index - 1, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/* Similar to dfd_set_main_board_cpld_test_reg */
+static int dfd_set_slot_cpld_test_reg(unsigned int slot_index, unsigned int cpld_index,
+           unsigned int value)
+{
+    int ret;
+
+    ret = dfd_set_cpld_testreg(slot_index, cpld_index - 1, value);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+/***************************************end of slot*******************************************/
+/*****************************************system*********************************************/
+static ssize_t dfd_get_system_value(unsigned int type, int *value, char *buf, size_t count)
+{
+    int ret;
+
+    ret = dfd_system_get_system_value(type, value);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return (ssize_t)snprintf(buf, count, "%d\n", *value);
+}
+
+static ssize_t dfd_set_system_value(unsigned int type, int value)
+{
+    int ret;
+
+    ret = dfd_system_set_system_value(type, value);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+
+static ssize_t dfd_get_system_port_power_status(unsigned int type, char *buf, size_t count)
+{
+    int ret;
+
+    ret = dfd_system_get_port_power_status(type, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+/*************************************end of system*****************************************/
+/*****************************************eeprom*********************************************/
+static int dfd_get_eeprom_number(void)
+{
+    int ret;
+
+    ret = dfd_get_dev_number(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_EEPROM);
+    return ret;
+}
+
+/*
+ * dfd_get_board_eeprom_size - Used to get board eeprom size, including slots eeprom
+ *
+ * This function returns the size of board eeprom, including slots eeprom
+ * otherwise it returns a negative value on failed.
+ */
+static int dfd_get_board_eeprom_size(unsigned int e2_index)
+{
+    int ret;
+
+    ret = dfd_get_eeprom_size(WB_MAIN_DEV_MAINBOARD, e2_index);
+    return ret;
+}
+
+/*
+ * dfd_get_board_eeprom_alias - Used to get board eeprom alias, including slots eeprom
+ *
+ * This function returns the alias of board eeprom, including slots eeprom
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_board_eeprom_alias(unsigned int e2_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_eeprom_alias(WB_MAIN_DEV_MAINBOARD, e2_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_board_eeprom_tag - Used to get board eeprom tag, including slots eeprom
+ *
+ * This function returns the alias of board eeprom, including slots eeprom
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_board_eeprom_tag(unsigned int e2_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_eeprom_tag(WB_MAIN_DEV_MAINBOARD, e2_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_get_board_eeprom_type - Used to get board eeprom type, including slots eeprom
+ *
+ * This function returns the type of board eeprom, including slots eeprom
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_get_board_eeprom_type(unsigned int e2_index, char *buf, size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_get_eeprom_type(WB_MAIN_DEV_MAINBOARD, e2_index, buf, count);
+    if (ret < 0) {
+        if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+    return ret;
+}
+
+/*
+ * dfd_read_board_eeprom_data - Used to read board eeprom data, including slots eeprom
+ * @buf: Data read buffer
+ * @offset: offset address to read board eeprom data, including slots eeprom
+ * @count: length of buf
+ *
+ * This function returns the length of the filled buffer,
+ * returns 0 means EOF,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_read_board_eeprom_data(unsigned int e2_index, char *buf, loff_t offset,
+                   size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_read_eeprom_data(WB_MAIN_DEV_MAINBOARD, e2_index, buf, offset, count);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+
+/*
+ * dfd_write_board_eeprom_data - Used to write board eeprom data, including slots eeprom
+ * @buf: Data write buffer
+ * @offset: offset address to write board eeprom data, including slots eeprom
+ * @count: length of buf
+ *
+ * This function returns the written length of eeprom,
+ * returns 0 means EOF,
+ * otherwise it returns a negative value on failed.
+ */
+static ssize_t dfd_write_board_eeprom_data(unsigned int e2_index, char *buf, loff_t offset,
+                   size_t count)
+{
+    ssize_t ret;
+
+    ret = dfd_write_eeprom_data(WB_MAIN_DEV_MAINBOARD, e2_index, buf, offset, count);
+    if (ret == -DFD_RV_DEV_NOTSUPPORT) {
+        return -WB_SYSFS_RV_UNSUPPORT;
+    }
+    return ret;
+}
+
+/*************************************end of eeprom*****************************************/
+
+
+static struct switch_drivers_s switch_drivers = {
+    /*
+     * set odm switch drivers,
+     * if not support the function, set corresponding hook to NULL.
+     */
+    /* temperature sensors */
+    .get_main_board_temp_number = dfd_get_main_board_temp_number,
+    .get_main_board_temp_alias = dfd_get_main_board_temp_alias,
+    .get_main_board_temp_type = dfd_get_main_board_temp_type,
+    .get_main_board_temp_max = dfd_get_main_board_temp_max,
+    .get_main_board_temp_min = dfd_get_main_board_temp_min,
+    .get_main_board_temp_value = dfd_get_main_board_temp_value,
+    .get_main_board_temp_high = dfd_get_main_board_temp_high,
+    .get_main_board_temp_low = dfd_get_main_board_temp_low,
+    .get_main_board_temp_monitor_flag = dfd_get_main_board_temp_monitor_flag,
+    /* voltage sensors */
+    .get_main_board_vol_number = dfd_get_main_board_vol_number,
+    .get_main_board_vol_alias = dfd_get_main_board_vol_alias,
+    .get_main_board_vol_type = dfd_get_main_board_vol_type,
+    .get_main_board_vol_max = dfd_get_main_board_vol_max,
+    .get_main_board_vol_min = dfd_get_main_board_vol_min,
+    .get_main_board_vol_range = dfd_get_main_board_vol_range,
+    .get_main_board_vol_nominal_value = dfd_get_main_board_vol_nominal_value,
+    .get_main_board_vol_value = dfd_get_main_board_vol_value,
+    .get_main_board_vol_monitor_flag = dfd_get_main_board_vol_monitor_flag,
+    /* current sensors */
+    .get_main_board_curr_number = dfd_get_main_board_curr_number,
+    .get_main_board_curr_alias = dfd_get_main_board_curr_alias,
+    .get_main_board_curr_type = dfd_get_main_board_curr_type,
+    .get_main_board_curr_max = dfd_get_main_board_curr_max,
+    .get_main_board_curr_min = dfd_get_main_board_curr_min,
+    .get_main_board_curr_value = dfd_get_main_board_curr_value,
+    .get_main_board_curr_monitor_flag = dfd_get_main_board_curr_monitor_flag,
+    /* syseeprom */
+    .get_syseeprom_size = dfd_get_syseeprom_size,
+    .read_syseeprom_data = dfd_read_syseeprom_data,
+    .write_syseeprom_data = dfd_write_syseeprom_data,
+    /* fan */
+    .get_fan_number = dfd_get_fan_number,
+    .get_fan_motor_number = dfd_get_fan_motor_number,
+    .get_fan_model_name = dfd_get_fan_model_name,
+    .get_fan_vendor = dfd_get_fan_vendor,
+    .get_fan_serial_number = dfd_get_fan_serial_number,
+    .get_fan_part_number = dfd_get_fan_part_number,
+    .get_fan_hardware_version = dfd_get_fan_hardware_version,
+    .get_fan_status = dfd_get_fan_status,
+    .get_fan_present = dfd_get_fan_present,
+    .get_fan_led_status = dfd_get_fan_led_status,
+    .set_fan_led_status = dfd_set_fan_led_status,
+    .get_fan_direction = dfd_get_fan_direction,
+    .get_fan_motor_status = dfd_get_fan_motor_status,
+    .get_fan_motor_speed = dfd_get_fan_motor_speed,
+    .get_fan_motor_speed_tolerance = dfd_get_fan_motor_speed_tolerance,
+    .get_fan_motor_speed_target = dfd_get_fan_motor_speed_target,
+    .get_fan_motor_speed_max = dfd_get_fan_motor_speed_max,
+    .get_fan_motor_speed_min = dfd_get_fan_motor_speed_min,
+    .get_fan_ratio = dfd_get_fan_ratio,
+    .set_fan_ratio = dfd_set_fan_ratio,
+    /* psu */
+    .get_psu_number = dfd_get_psu_number,
+    .get_psu_temp_number = dfd_get_psu_temp_number,
+    .get_psu_model_name = dfd_get_psu_model_name,
+    .get_psu_vendor = dfd_get_psu_vendor,
+    .get_psu_date = dfd_get_psu_date,
+    .get_psu_status = dfd_get_psu_status,
+    .get_psu_hw_status = dfd_get_psu_hw_status,
+    .get_psu_alarm = dfd_get_psu_alarm,
+    .get_psu_serial_number = dfd_get_psu_serial_number,
+    .get_psu_part_number = dfd_get_psu_part_number,
+    .get_psu_hardware_version = dfd_get_psu_hardware_version,
+    .get_psu_type = dfd_get_psu_type,
+    .get_psu_in_curr = dfd_get_psu_in_curr,
+    .get_psu_in_vol = dfd_get_psu_in_vol,
+    .get_psu_in_power = dfd_get_psu_in_power,
+    .get_psu_out_curr = dfd_get_psu_out_curr,
+    .get_psu_out_vol = dfd_get_psu_out_vol,
+    .get_psu_out_power = dfd_get_psu_out_power,
+    .get_psu_out_max_power = dfd_get_psu_out_max_power,
+    .get_psu_present_status = dfd_get_psu_present,
+    .get_psu_in_status = dfd_get_psu_in_status,
+    .get_psu_out_status = dfd_get_psu_out_status,
+    .get_psu_status_pmbus = dfd_get_psu_status_pmbus,
+    .get_psu_fan_speed = dfd_get_psu_fan_speed,
+    .get_psu_fan_ratio = dfd_get_psu_fan_ratio,
+    .set_psu_fan_ratio = dfd_set_psu_fan_ratio,
+    .get_psu_fan_direction = dfd_get_psu_fan_direction,
+    .get_psu_led_status = dfd_get_psu_led_status,
+    .get_psu_temp_alias = dfd_get_psu_temp_alias,
+    .get_psu_temp_type = dfd_get_psu_temp_type,
+    .get_psu_temp_max = dfd_get_psu_temp_max,
+    .set_psu_temp_max = dfd_set_psu_temp_max,
+    .get_psu_temp_min = dfd_get_psu_temp_min,
+    .set_psu_temp_min = dfd_set_psu_temp_min,
+    .get_psu_temp_value = dfd_get_psu_temp_value,
+    .get_psu_fan_speed_cal = dfd_get_psu_fan_speed_cal,
+    .get_psu_attr_threshold = dfd_get_psu_attr_threshold,
+    .get_psu_eeprom_size = dfd_get_psu_eeprom_size,
+    .read_psu_eeprom_data = dfd_read_psu_eeprom_data,
+    .get_psu_blackbox_info = dfd_get_psu_blackbox_info,
+    .get_psu_pmbus_info = dfd_get_psu_pmbus_info,
+    .clear_psu_blackbox = dfd_clear_psu_blackbox_info,
+    /* transceiver */
+    .get_eth_number = dfd_get_eth_number,
+    .get_transceiver_power_on_status = dfd_get_transceiver_power_on_status,
+    .set_transceiver_power_on_status = dfd_set_transceiver_power_on_status,
+    .get_eth_power_on_status = dfd_get_eth_power_on_status,
+    .set_eth_power_on_status = dfd_set_eth_power_on_status,
+    .get_eth_tx_fault_status = dfd_get_eth_tx_fault_status,
+    .get_eth_tx_disable_status = dfd_get_eth_tx_disable_status,
+    .set_eth_tx_disable_status = dfd_set_eth_tx_disable_status,
+    .get_transceiver_present_status = dfd_get_transceiver_present_status,
+    .get_eth_present_status = dfd_get_eth_present_status,
+    .get_eth_rx_los_status = dfd_get_eth_rx_los_status,
+    .get_eth_reset_status = dfd_get_eth_reset_status,
+    .set_eth_reset_status = dfd_set_eth_reset_status,
+    .get_eth_low_power_mode_status = dfd_get_eth_low_power_mode_status,
+    .get_eth_interrupt_status = dfd_get_eth_interrupt_status,
+    .get_eth_eeprom_size = dfd_get_eth_eeprom_size,
+    .read_eth_eeprom_data = dfd_read_eth_eeprom_data,
+    .write_eth_eeprom_data = dfd_write_eth_eeprom_data,
+    .get_eth_optoe_type = dfd_get_eth_optoe_type,
+    .set_eth_optoe_type = dfd_set_eth_optoe_type,
+    /* sysled */
+    .get_sys_led_status = dfd_get_sys_led_status,
+    .set_sys_led_status = dfd_set_sys_led_status,
+    .get_bmc_led_status = dfd_get_bmc_led_status,
+    .set_bmc_led_status = dfd_set_bmc_led_status,
+    .get_sys_fan_led_status = dfd_get_sys_fan_led_status,
+    .set_sys_fan_led_status = dfd_set_sys_fan_led_status,
+    .get_sys_psu_led_status = dfd_get_sys_psu_led_status,
+    .set_sys_psu_led_status = dfd_set_sys_psu_led_status,
+    .get_id_led_status = dfd_get_id_led_status,
+    .set_id_led_status = dfd_set_id_led_status,
+    /* FPGA */
+    .get_main_board_fpga_number = dfd_get_main_board_fpga_number,
+    .get_main_board_fpga_alias = dfd_get_main_board_fpga_alias,
+    .get_main_board_fpga_type = dfd_get_main_board_fpga_type,
+    .get_main_board_fpga_firmware_version = dfd_get_main_board_fpga_firmware_version,
+    .get_main_board_fpga_board_version = dfd_get_main_board_fpga_board_version,
+    .get_main_board_fpga_test_reg = dfd_get_main_board_fpga_test_reg,
+    .set_main_board_fpga_test_reg = dfd_set_main_board_fpga_test_reg,
+    /* CPLD */
+    .get_main_board_cpld_number = dfd_get_main_board_cpld_number,
+    .get_main_board_cpld_alias = dfd_get_main_board_cpld_alias,
+    .get_main_board_cpld_type = dfd_get_main_board_cpld_type,
+    .get_main_board_cpld_firmware_version = dfd_get_main_board_cpld_firmware_version,
+    .get_main_board_cpld_board_version = dfd_get_main_board_cpld_board_version,
+    .get_main_board_cpld_test_reg = dfd_get_main_board_cpld_test_reg,
+    .set_main_board_cpld_test_reg = dfd_set_main_board_cpld_test_reg,
+    /* watchdog */
+    .get_watchdog_identify = dfd_get_watchdog_identify,
+    .get_watchdog_timeleft = dfd_get_watchdog_timeleft,
+    .get_watchdog_timeout = dfd_get_watchdog_timeout,
+    .set_watchdog_timeout = dfd_set_watchdog_timeout,
+    .get_watchdog_enable_status = dfd_get_watchdog_enable_status,
+    .set_watchdog_enable_status = dfd_set_watchdog_enable_status,
+    .set_watchdog_reset = dfd_set_watchdog_reset,
+    /* slot */
+    .get_slot_number = dfd_get_slot_number,
+    .get_slot_temp_number = dfd_get_slot_temp_number,
+    .get_slot_vol_number = dfd_get_slot_vol_number,
+    .get_slot_curr_number = dfd_get_slot_curr_number,
+    .get_slot_cpld_number = dfd_get_slot_cpld_number,
+    .get_slot_fpga_number = dfd_get_slot_fpga_number,
+    .get_slot_model_name = dfd_get_slot_model_name,
+    .get_slot_vendor = dfd_get_slot_vendor,
+    .get_slot_serial_number = dfd_get_slot_serial_number,
+    .get_slot_part_number = dfd_get_slot_part_number,
+    .get_slot_hardware_version = dfd_get_slot_hardware_version,
+    .get_slot_status = dfd_get_slot_status,
+    .get_slot_led_status = dfd_get_slot_led_status,
+    .set_slot_led_status = dfd_set_slot_led_status,
+    .get_slot_power_status = dfd_get_slot_power_status,
+    .set_slot_power_status = dfd_set_slot_power_status,
+    .get_slot_temp_alias = dfd_get_slot_temp_alias,
+    .get_slot_temp_type = dfd_get_slot_temp_type,
+    .get_slot_temp_max = dfd_get_slot_temp_max,
+    .get_slot_temp_min = dfd_get_slot_temp_min,
+    .get_slot_temp_value = dfd_get_slot_temp_value,
+    .get_slot_vol_alias = dfd_get_slot_vol_alias,
+    .get_slot_vol_type = dfd_get_slot_vol_type,
+    .get_slot_vol_max = dfd_get_slot_vol_max,
+    .get_slot_vol_min = dfd_get_slot_vol_min,
+    .get_slot_vol_range = dfd_get_slot_vol_range,
+    .get_slot_vol_nominal_value = dfd_get_slot_vol_nominal_value,
+    .get_slot_vol_value = dfd_get_slot_vol_value,
+    .get_slot_curr_alias = dfd_get_slot_curr_alias,
+    .get_slot_curr_type = dfd_get_slot_curr_type,
+    .get_slot_curr_max = dfd_get_slot_curr_max,
+    .get_slot_curr_min = dfd_get_slot_curr_min,
+    .get_slot_curr_value = dfd_get_slot_curr_value,
+    .get_slot_fpga_alias = dfd_get_slot_fpga_alias,
+    .get_slot_fpga_type = dfd_get_slot_fpga_type,
+    .get_slot_fpga_firmware_version = dfd_get_slot_fpga_firmware_version,
+    .get_slot_fpga_board_version = dfd_get_slot_fpga_board_version,
+    .get_slot_fpga_test_reg = dfd_get_slot_fpga_test_reg,
+    .set_slot_fpga_test_reg = dfd_set_slot_fpga_test_reg,
+    .get_slot_cpld_alias = dfd_get_slot_cpld_alias,
+    .get_slot_cpld_type = dfd_get_slot_cpld_type,
+    .get_slot_cpld_firmware_version = dfd_get_slot_cpld_firmware_version,
+    .get_slot_cpld_board_version = dfd_get_slot_cpld_board_version,
+    .get_slot_cpld_test_reg = dfd_get_slot_cpld_test_reg,
+    .set_slot_cpld_test_reg = dfd_set_slot_cpld_test_reg,
+    .get_system_value = dfd_get_system_value,
+    .get_system_port_power_status = dfd_get_system_port_power_status,
+    .set_system_value = dfd_set_system_value,
+    /* eeprom */
+    .get_eeprom_number = dfd_get_eeprom_number,
+    .get_eeprom_size = dfd_get_board_eeprom_size,
+    .get_eeprom_alias = dfd_get_board_eeprom_alias,
+    .get_eeprom_tag = dfd_get_board_eeprom_tag,
+    .get_eeprom_type = dfd_get_board_eeprom_type,
+    .read_eeprom_data = dfd_read_board_eeprom_data,
+    .write_eeprom_data = dfd_write_board_eeprom_data,
+};
+
+struct switch_drivers_s * s3ip_switch_driver_get(void)
+{
+    return &switch_drivers;
+}
+
+static int32_t __init switch_driver_init(void)
+{
+    int ret;
+
+    SWITCH_DEBUG(DBG_VERBOSE, "Enter.\n");
+    ret = wb_dev_cfg_init();
+    if (ret < 0) {
+        SWITCH_DEBUG(DBG_ERROR, "wb_dev_cfg_init failed ret %d.\n", ret);
+        return ret;
+    }
+    SWITCH_DEBUG(DBG_VERBOSE, "success.\n");
+    return 0;
+}
+
+static void __exit switch_driver_exit(void)
+{
+    SWITCH_DEBUG(DBG_VERBOSE, "switch_driver_exit.\n");
+    wb_dev_cfg_exit();
+    return;
+}
+
+module_init(switch_driver_init);
+module_exit(switch_driver_exit);
+EXPORT_SYMBOL(s3ip_switch_driver_get);
+module_param(g_switch_dbg_level, int, S_IRUGO | S_IWUSR);
+MODULE_AUTHOR("sonic S3IP sysfs");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_cpld_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_cpld_driver.c
new file mode 100644
index 000000000000..d5bf876041ea
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_cpld_driver.c
@@ -0,0 +1,274 @@
+/*
+ * An wb_cpld_driver driver for cpld devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+
+#include "wb_module.h"
+#include "dfd_cfg.h"
+#include "dfd_cfg_adapter.h"
+#include "dfd_cfg_info.h"
+
+int g_dfd_cpld_dbg_level = 0;
+module_param(g_dfd_cpld_dbg_level, int, S_IRUGO | S_IWUSR);
+
+/**
+ * dfd_get_cpld_name - Obtain the CPLD name
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @index:The number of the CPLD starts from 0
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_cpld_name(uint8_t main_dev_id, unsigned int cpld_index, char *buf, size_t count)
+{
+    uint64_t key;
+    char *cpld_name;
+
+    if (buf == NULL) {
+        DBG_CPLD_DEBUG(DBG_ERROR, "param error, buf is NULL. main_dev_id: %u, cpld index: %u\n",
+            main_dev_id, cpld_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    if (count <= 0) {
+        DBG_CPLD_DEBUG(DBG_ERROR, "buf size error, count: %lu, main_dev_id: %u, cpld index: %u\n",
+            count, main_dev_id, cpld_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    mem_clear(buf, count);
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_CPLD_NAME, main_dev_id, cpld_index);
+    cpld_name = dfd_ko_cfg_get_item(key);
+    if (cpld_name == NULL) {
+        DBG_CPLD_DEBUG(DBG_ERROR, "main_dev_id: %u, cpld%u name config error, key_name:%s\n",
+            main_dev_id, cpld_index, key_to_name(DFD_CFG_ITEM_CPLD_NAME));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DBG_CPLD_DEBUG(DBG_VERBOSE, "%s\n", cpld_name);
+    snprintf(buf, count, "%s\n", cpld_name);
+    return strlen(buf);
+}
+
+/**
+ * dfd_get_cpld_type - Obtain the CPLD model
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @index:The number of the CPLD starts from 0
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_cpld_type(uint8_t main_dev_id, unsigned int cpld_index, char *buf, size_t count)
+{
+    uint64_t key;
+    char *cpld_type;
+
+    if (buf == NULL) {
+        DBG_CPLD_DEBUG(DBG_ERROR, "param error, buf is NULL, main_dev_id: %u, cpld index: %u\n",
+            main_dev_id, cpld_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    if (count <= 0) {
+        DBG_CPLD_DEBUG(DBG_ERROR, "buf size error, count: %lu, main_dev_id: %u, cpld index: %u\n",
+            count, main_dev_id, cpld_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    mem_clear(buf, count);
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_CPLD_TYPE, main_dev_id, cpld_index);
+    cpld_type = dfd_ko_cfg_get_item(key);
+    if (cpld_type == NULL) {
+        DBG_CPLD_DEBUG(DBG_ERROR, "main_dev_id: %u, cpld%u type config error, key_name: %s\n",
+            main_dev_id, cpld_index, key_to_name(DFD_CFG_ITEM_CPLD_TYPE));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DBG_CPLD_DEBUG(DBG_VERBOSE, "%s\n", cpld_type);
+    snprintf(buf, count, "%s\n", cpld_type);
+    return strlen(buf);
+}
+
+/**
+ * dfd_get_cpld_fw_version - Obtain the CPLD firmware version
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @index:The number of the CPLD starts from 0
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_cpld_fw_version(uint8_t main_dev_id, unsigned int cpld_index, char *buf, size_t count)
+{
+    uint64_t key;
+    uint32_t value;
+    int rv;
+
+    if (buf == NULL) {
+        DBG_CPLD_DEBUG(DBG_ERROR, "param error, buf is NULL, main_dev_id: %u, cpld index: %u\n",
+            main_dev_id, cpld_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DBG_CPLD_DEBUG(DBG_ERROR, "buf size error, count: %lu, main_dev_id: %u, cpld index: %u\n",
+            count, main_dev_id, cpld_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    mem_clear(buf, count);
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_CPLD_VERSION, main_dev_id, cpld_index);
+    rv = dfd_info_get_int(key, &value, NULL);
+    if (rv < 0) {
+        DBG_CPLD_DEBUG(DBG_ERROR, "main_dev_id: %u, cpld%u fw config error, key_name: %s, ret: %d\n",
+            main_dev_id, cpld_index, key_to_name(DFD_CFG_ITEM_CPLD_VERSION), rv);
+        return rv;
+    }
+
+    DBG_CPLD_DEBUG(DBG_VERBOSE, "main_dev_id: %u, cpld%u firmware version: %x\n",
+        main_dev_id, cpld_index, value);
+    snprintf(buf, count, "%08x\n", value);
+    return strlen(buf);
+}
+
+/**
+ * dfd_get_cpld_hw_version - Obtain the hardware version of the CPLD
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @index:The number of the CPLD starts from 0
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_cpld_hw_version(uint8_t main_dev_id, unsigned int cpld_index, char *buf, size_t count)
+{
+    uint64_t key;
+    uint32_t value;
+    int rv;
+
+    if (buf == NULL) {
+        DBG_CPLD_DEBUG(DBG_ERROR, "param error, buf is NULL, main_dev_id: %u, cpld index: %u\n",
+            main_dev_id, cpld_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DBG_CPLD_DEBUG(DBG_ERROR, "buf size error, count: %lu, main_dev_id: %u, cpld index: %u\n",
+            count, main_dev_id, cpld_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    mem_clear(buf, count);
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_CPLD_HW_VERSION, main_dev_id, cpld_index);
+    rv = dfd_info_get_int(key, &value, NULL);
+    if (rv < 0) {
+        DBG_CPLD_DEBUG(DBG_ERROR, "main_dev_id: %u, cpld%u fw config error, key_name: %s, ret: %d\n",
+                       main_dev_id, cpld_index, key_to_name(DFD_CFG_ITEM_CPLD_HW_VERSION), rv);
+        return rv;
+    }
+    DBG_CPLD_DEBUG(DBG_VERBOSE, "main_dev_id: %u, cpld%u hardware version 0x%x\n", main_dev_id, cpld_index, value);
+    snprintf(buf, count, "%02x\n", value);
+    return strlen(buf);
+}
+
+/**
+ * dfd_set_cpld_testreg - Set the CPLD test register value
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @cpld_index:The number of the CPLD starts from 0
+ * @value: Writes the value of the test register
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+int dfd_set_cpld_testreg(uint8_t main_dev_id, unsigned int cpld_index, int value)
+{
+    uint64_t key;
+    int ret;
+
+    if (value < 0 || value > 0xff) {
+        DBG_CPLD_DEBUG(DBG_ERROR, "main_dev_id: %u, can't set cpld%u test reg value = 0x%02x\n",
+            main_dev_id, cpld_index, value);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_CPLD_TEST_REG, main_dev_id, cpld_index);
+    ret = dfd_info_set_int(key, value);
+    if (ret < 0) {
+        DBG_CPLD_DEBUG(DBG_ERROR, "main_dev_id: %u, set cpld%u test reg error, key_name: %s, ret:%d\n",
+            main_dev_id, cpld_index, key_to_name(DFD_CFG_ITEM_CPLD_TEST_REG), ret);
+        return ret;
+    }
+    return DFD_RV_OK;
+}
+
+/**
+ * dfd_get_cpld_testreg - Read the CPLD test register value
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @cpld_index: The number of the CPLD starts from 0
+ * @value: Read the test register value
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+int dfd_get_cpld_testreg(uint8_t main_dev_id, unsigned int cpld_index, int *value)
+{
+    uint64_t key;
+    int ret;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_CPLD_TEST_REG, main_dev_id, cpld_index);
+    ret = dfd_info_get_int(key, value, NULL);
+    if (ret < 0) {
+        DBG_CPLD_DEBUG(DBG_ERROR, "main_dev_id: %u, get cpld%u test reg error, key_name: %s, ret: %d\n",
+            main_dev_id, cpld_index, key_to_name(DFD_CFG_ITEM_CPLD_TEST_REG), ret);
+        return ret;
+    }
+    return DFD_RV_OK;
+}
+
+/**
+ * dfd_get_cpld_testreg_str - Read the CPLD test register value
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @cpld_index: The number of the CPLD starts from 0
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_cpld_testreg_str(uint8_t main_dev_id, unsigned int cpld_index,
+            char *buf, size_t count)
+{
+    int ret, value;
+
+    if (buf == NULL) {
+        DBG_CPLD_DEBUG(DBG_ERROR, "param error, buf is NULL, main_dev_id: %u, cpld index: %u\n",
+            main_dev_id, cpld_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DBG_CPLD_DEBUG(DBG_ERROR, "buf size error, count: %lu, main_dev_id: %u, cpld index: %u\n",
+            count, main_dev_id, cpld_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    mem_clear(buf, count);
+    ret = dfd_get_cpld_testreg(main_dev_id, cpld_index, &value);
+    if (ret < 0) {
+        return ret;
+    }
+    return (ssize_t)snprintf(buf, count, "0x%02x\n", value);
+}
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_eeprom_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_eeprom_driver.c
new file mode 100644
index 000000000000..7a3b760c2266
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_eeprom_driver.c
@@ -0,0 +1,230 @@
+/*
+ * An wb_eeprom_driver driver for eeprom devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+
+#include "wb_module.h"
+#include "dfd_cfg.h"
+#include "dfd_cfg_adapter.h"
+#include "dfd_tlveeprom.h"
+
+int g_dfd_eeprom_dbg_level = 0;
+module_param(g_dfd_eeprom_dbg_level, int, S_IRUGO | S_IWUSR);
+
+/**
+ * dfd_get_eeprom_size - Gets the data size of the eeprom
+ * @e2_type: This section describes the E2 type, including system, PSU, fan, and module E2
+ * @index: E2 number
+ * return: Succeeded: The data size of the eeprom is returned
+ *       : Failed: A negative value is returned
+ */
+int dfd_get_eeprom_size(int e2_type, int index)
+{
+    uint64_t key;
+    int *p_eeprom_size;
+
+    /* Obtain the eeprom size */
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_EEPROM_SIZE, e2_type, index);
+
+    p_eeprom_size = dfd_ko_cfg_get_item(key);
+    if (p_eeprom_size == NULL) {
+        DBG_EEPROM_DEBUG(DBG_ERROR, "get eeprom size error. key_name:%s\n", 
+            key_to_name(DFD_CFG_ITEM_EEPROM_SIZE));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    return *p_eeprom_size;
+}
+
+/**
+ * dfd_read_eeprom_data - Read eeprom data
+ * @e2_type: This section describes the E2 type, including system, PSU, fan, and module E2
+ * @index: E2 number
+ * @buf: eeprom data receives buf
+ * @offset: The offset address of the read
+ * @count: Read length
+ * return: Success: Returns the length of fill buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_read_eeprom_data(int e2_type, int index, char *buf, loff_t offset, size_t count)
+{
+    uint64_t key;
+    ssize_t rd_len;
+    char *eeprom_path;
+
+    if (buf == NULL || offset < 0 || count <= 0) {
+        DBG_EEPROM_DEBUG(DBG_ERROR, "params error, offset: 0x%llx, rd_count: %lu.\n",
+            offset, count);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    /* Obtain the eeprom read path*/
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_EEPROM_PATH, e2_type, index);
+    eeprom_path = dfd_ko_cfg_get_item(key);
+    if (eeprom_path == NULL) {
+        DBG_EEPROM_DEBUG(DBG_ERROR, "get eeprom path error, e2_type: %d, index: %d, key_name: %s\n",
+            e2_type, index, key_to_name(DFD_CFG_ITEM_EEPROM_PATH));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DBG_EEPROM_DEBUG(DBG_VERBOSE, "e2_type: %d, index: %d, path: %s, offset: 0x%llx, \
+        rd_count: %lu\n", e2_type, index, eeprom_path, offset, count);
+
+    mem_clear(buf, count);
+    rd_len = dfd_ko_read_file(eeprom_path, offset, buf, count);
+    if (rd_len < 0) {
+        DBG_EEPROM_DEBUG(DBG_ERROR, "read eeprom data failed, loc: %s, offset: 0x%llx, \
+        rd_count: %lu, ret: %ld,\n", eeprom_path, offset, count, rd_len);
+    } else {
+        DBG_EEPROM_DEBUG(DBG_VERBOSE, "read eeprom data success, loc: %s, offset: 0x%llx, \
+            rd_count: %lu, rd_len: %ld,\n", eeprom_path, offset, count, rd_len);
+    }
+
+    return rd_len;
+}
+
+/**
+ * dfd_write_eeprom_data - Write eeprom data
+ * @e2_type: This section describes the E2 type, including system, PSU, fan, and module E2
+ * @index: E2 number
+ * @buf: eeprom data buf
+ * @offset: The offset address of the write
+ * @count: Write length
+ * return: Success: The length of the written data is returned
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_write_eeprom_data(int e2_type, int index, char *buf, loff_t offset, size_t count)
+{
+    uint64_t key;
+    ssize_t wr_len;
+    char *eeprom_path;
+
+    if (buf == NULL || offset < 0 || count <= 0) {
+        DBG_EEPROM_DEBUG(DBG_ERROR, "params error, offset: 0x%llx, count: %lu.\n", offset, count);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    /* Obtain the eeprom read path */
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_EEPROM_PATH, e2_type, index);
+    eeprom_path = dfd_ko_cfg_get_item(key);
+    if (eeprom_path == NULL) {
+        DBG_EEPROM_DEBUG(DBG_ERROR, "get eeprom path error, e2_type: %d, index: %d, key_name: %s\n",
+            e2_type, index, key_to_name(DFD_CFG_ITEM_EEPROM_PATH));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DBG_EEPROM_DEBUG(DBG_VERBOSE, "e2_type: %d, index: %d, path: %s, offset: 0x%llx, \
+        wr_count: %lu.\n", e2_type, index, eeprom_path, offset, count);
+
+    wr_len = dfd_ko_write_file(eeprom_path, offset, buf, count);
+    if (wr_len < 0) {
+        DBG_EEPROM_DEBUG(DBG_ERROR, "write eeprom data failed, loc:%s, offset: 0x%llx, \
+            wr_count: %lu, ret: %ld.\n", eeprom_path, offset, count, wr_len);
+    } else {
+        DBG_EEPROM_DEBUG(DBG_VERBOSE, "write eeprom data success, loc:%s, offset: 0x%llx, \
+            wr_count: %lu, wr_len: %ld.\n", eeprom_path, offset, count, wr_len);
+    }
+
+    return wr_len;
+}
+
+ssize_t dfd_get_eeprom_alias(int e2_type, unsigned int e2_index, char *buf, size_t count)
+{
+    uint64_t key;
+    char *e2_alias;
+
+    if (buf == NULL) {
+        DBG_EEPROM_DEBUG(DBG_ERROR, "param error buf is NULL.\n");
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DBG_EEPROM_DEBUG(DBG_ERROR, "buf size error, count: %lu\n", count);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    mem_clear(buf, count);
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_EEPROM_ALIAS, e2_type, e2_index);
+    e2_alias = dfd_ko_cfg_get_item(key);
+    if (e2_alias == NULL) {
+        DBG_EEPROM_DEBUG(DBG_ERROR, "get eeprom alias config error, e2_type: %d, e2_index: %u, key_name: %s\n",
+            e2_type, e2_index, key_to_name(DFD_CFG_ITEM_EEPROM_ALIAS));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DBG_FPGA_DEBUG(DBG_VERBOSE, "%s\n", e2_alias);
+    snprintf(buf, count, "%s\n", e2_alias);
+    return strlen(buf);
+}
+
+ssize_t dfd_get_eeprom_tag(int e2_type, unsigned int e2_index, char *buf, size_t count)
+{
+    uint64_t key;
+    char *e2_tag;
+
+    if (buf == NULL) {
+        DBG_EEPROM_DEBUG(DBG_ERROR, "param error buf is NULL.\n");
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DBG_EEPROM_DEBUG(DBG_ERROR, "buf size error, count: %lu\n", count);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    mem_clear(buf, count);
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_EEPROM_TAG, e2_type, e2_index);
+    e2_tag = dfd_ko_cfg_get_item(key);
+    if (e2_tag == NULL) {
+        DBG_EEPROM_DEBUG(DBG_ERROR, "get eeprom tag config error, e2_type: %d, e2_index: %u, key: %s\n",
+            e2_type, e2_index, key_to_name(DFD_CFG_ITEM_EEPROM_TAG));
+         return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DBG_FPGA_DEBUG(DBG_VERBOSE, "%s\n", e2_tag);
+    snprintf(buf, count, "%s\n", e2_tag);
+    return strlen(buf);
+}
+
+ssize_t dfd_get_eeprom_type(int e2_type, unsigned int e2_index, char *buf, size_t count)
+{
+    uint64_t key;
+    char *eeprom_type;
+
+    if (buf == NULL) {
+        DBG_EEPROM_DEBUG(DBG_ERROR, "param error buf is NULL.\n");
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DBG_EEPROM_DEBUG(DBG_ERROR, "buf size error, count: %lu\n", count);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    mem_clear(buf, count);
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_EEPROM_TYPE, e2_type, e2_index);
+    eeprom_type = dfd_ko_cfg_get_item(key);
+    if (eeprom_type == NULL) {
+        DBG_EEPROM_DEBUG(DBG_ERROR, "get eeprom type config error, e2_type: %d, e2_index: %u, key_name: %s\n",
+            e2_type, e2_index, key_to_name(DFD_CFG_ITEM_EEPROM_TYPE));
+         return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DBG_FPGA_DEBUG(DBG_VERBOSE, "%s\n", eeprom_type);
+    snprintf(buf, count, "%s\n", eeprom_type);
+    return strlen(buf);
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_fan_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_fan_driver.c
new file mode 100644
index 000000000000..77f88429edfb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_fan_driver.c
@@ -0,0 +1,1093 @@
+/*
+ * An wb_fan_driver driver for fan devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/slab.h>
+
+#include "wb_module.h"
+#include "dfd_cfg.h"
+#include "dfd_cfg_adapter.h"
+#include "dfd_cfg_info.h"
+#include "dfd_frueeprom.h"
+
+#define DFD_FAN_EEPROM_MODE_TLV_STRING    "tlv"
+#define DFD_FAN_EEPROM_MODE_FRU_STRING    "fru"
+#define FAN_SIZE                          (256)
+
+typedef enum fan_present_status_e {
+    ABSENT  = 0,
+    PRESENT = 1,
+} fan_present_status_t;
+
+typedef enum fan_motor_status_e {
+    MOTOR_STALL = 0,
+    MOTOR_ROLL  = 1,
+} fan_motor_status_t;
+
+typedef enum fan_eeprom_mode_e {
+    FAN_EEPROM_MODE_TLV,     /* TLV */
+    FAN_EEPROM_MODE_FRU,      /*FRU*/
+} fan_eeprom_mode_t;
+
+typedef struct  dfd_dev_head_info_s {
+    uint8_t   ver;                       /* The version number defined in the E2PROM file, initially 0x01 */
+    uint8_t   flag;                      /* The new version E2PROM is identified as 0x7E */
+    uint8_t   hw_ver;                    /* It consists of two parts: the main version number and the revised version */
+    uint8_t   type;                      /* Hardware type definition information */
+    int16_t   tlv_len;                   /* Valid data length (16 bits) */
+} dfd_dev_head_info_t;
+
+typedef struct dfd_dev_tlv_info_s {
+    uint8_t  type;                       /* Data type */
+    uint8_t  len;                        /* Data length */
+    uint8_t  data[0];                    /* Data */
+} dfd_dev_tlv_info_t;
+
+/* Specifies the fixed value of the fan speed */
+typedef enum wb_fan_threshold_e {
+    FAN_SPEED_MIN   = 1,        /* Minimum value */
+    FAN_SPEED_MAX   = 2,        /* Maximum value */
+    FAN_SPEED_TOLERANCE = 3,    /* tolerance */
+    FAN_SPEED_TARGET_0 = 0x10,  /* index of the rated speed when PWM=0x */
+    FAN_SPEED_TARGET_10 = 0x11,
+    FAN_SPEED_TARGET_20 = 0x12,
+    FAN_SPEED_TARGET_30 = 0x13,
+    FAN_SPEED_TARGET_40 = 0x14,
+    FAN_SPEED_TARGET_50 = 0x15,
+    FAN_SPEED_TARGET_60 = 0x16,
+    FAN_SPEED_TARGET_70 = 0x17,
+    FAN_SPEED_TARGET_80 = 0x18,
+    FAN_SPEED_TARGET_90 = 0x19,
+    FAN_SPEED_TARGET_100 = 0x1a, /* index of the rated speed when PWM=100 */
+
+} wb_fan_threshold_t;
+
+/* fan_threshold_[Threshold type(high 8bit)+Master device type(low 8bit)]_[subdevice ID(high 4bit)+Front and rear motor id(low 4bit)] */
+#define DFD_GET_FAN_THRESHOLD_KEY1(threshold_type, main_dev_id) \
+    (((threshold_type & 0xff) << 8) | (main_dev_id & 0xff))
+#define DFD_GET_FAN_THRESHOLD_KEY2(sub_type_id, motor_id) \
+        (((sub_type_id & 0x0f) << 4) | (motor_id & 0x0f))
+
+int g_dfd_fan_dbg_level = 0;
+module_param(g_dfd_fan_dbg_level, int, S_IRUGO | S_IWUSR);
+
+static char *dfd_get_fan_sysfs_name(void)
+{
+    uint64_t key;
+    char *sysfs_name;
+
+    /* string type configuration item */
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FAN_SYSFS_NAME, 0, 0);
+    sysfs_name = dfd_ko_cfg_get_item(key);
+    if (sysfs_name == NULL) {
+        DFD_FAN_DEBUG(DBG_VERBOSE, "key_name=%s, sysfs_name is NULL, use default way.\n", 
+            key_to_name(DFD_CFG_ITEM_FAN_SYSFS_NAME));
+    } else {
+        DFD_FAN_DEBUG(DBG_VERBOSE, "sysfs_name: %s.\n", sysfs_name);
+    }
+    return sysfs_name;
+}
+
+/**
+ * dfd_get_fan_eeprom_mode - The fan type E2 is obtained
+ * return: 0:TLV
+ *         1:FRU
+ *       : Negative value - Read failed
+ */
+static int dfd_get_fan_eeprom_mode(void)
+{
+    uint64_t key;
+    int mode;
+    char *name;
+
+    /* string type configuration item */
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FAN_E2_MODE, 0, 0);
+    name = dfd_ko_cfg_get_item(key);
+    if (name == NULL) {
+        /* By default, the TLV format is returned */
+        DFD_FAN_DEBUG(DBG_WARN, "get fan eeprom mode fail, key_name=%s\n", 
+            key_to_name(DFD_CFG_ITEM_FAN_E2_MODE));
+        return FAN_EEPROM_MODE_TLV;
+    }
+
+    DFD_FAN_DEBUG(DBG_VERBOSE, "fan eeprom mode_name %s.\n", name);
+    if (!strncmp(name, DFD_FAN_EEPROM_MODE_TLV_STRING, strlen(DFD_FAN_EEPROM_MODE_TLV_STRING))) {
+        mode = FAN_EEPROM_MODE_TLV;
+    } else if (!strncmp(name, DFD_FAN_EEPROM_MODE_FRU_STRING, strlen(DFD_FAN_EEPROM_MODE_FRU_STRING))) {
+        mode = FAN_EEPROM_MODE_FRU;
+    } else {
+        /* The default TLV mode is returned */
+        mode = FAN_EEPROM_MODE_TLV;
+    }
+
+    DFD_FAN_DEBUG(DBG_VERBOSE, "fan eeprom mode %d.\n", mode);
+    return mode;
+}
+
+static int dfd_fan_tlv_eeprom_read(int bus, int addr, uint8_t cmd, char *buf, int len,
+               const char *sysfs_name)
+{
+    dfd_dev_head_info_t info;
+    char tmp_tlv_len[sizeof(uint16_t)];
+    char *tlv_data;
+    dfd_dev_tlv_info_t *tlv;
+    int buf_len;
+    int rv, match_flag;
+
+    rv = dfd_ko_i2c_read(bus, addr, 0, (uint8_t *)&info, sizeof(dfd_dev_head_info_t), sysfs_name);
+    if (rv < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "read fan i2c failed, bus: %d, addr: 0x%x, rv: %d\n",
+            bus, addr, rv);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    /* convert TLV_LEN */
+    memcpy(tmp_tlv_len, (uint8_t *)&info.tlv_len, sizeof(uint16_t));
+    info.tlv_len = (tmp_tlv_len[0] << 8) + tmp_tlv_len[1];
+
+    if ((info.tlv_len <= 0) || (info.tlv_len > 0xFF)) {
+        DFD_FAN_DEBUG(DBG_ERROR, "fan maybe not set mac.\n");
+        return -DFD_RV_TYPE_ERR;
+    }
+    DFD_FAN_DEBUG(DBG_VERBOSE, "info.tlv_len: %d\n", info.tlv_len);
+
+    tlv_data = (uint8_t *)kmalloc(info.tlv_len, GFP_KERNEL);
+    if (tlv_data == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "tlv_data kmalloc failed \n");
+        return -DFD_RV_NO_MEMORY;
+    }
+    mem_clear(tlv_data, info.tlv_len);
+
+    rv = dfd_ko_i2c_read(bus, addr, sizeof(dfd_dev_head_info_t), tlv_data, info.tlv_len, sysfs_name);
+    if (rv < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR,"fan eeprom read failed\n");
+        kfree(tlv_data);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    buf_len = len - 1;
+    match_flag = 0;
+    for (tlv = (dfd_dev_tlv_info_t *)tlv_data; (ulong)tlv < (ulong)tlv_data + info.tlv_len;) {
+        DFD_FAN_DEBUG(DBG_VERBOSE, "tlv: %p, tlv->type: 0x%x, tlv->len: 0x%x info->tlv_len: 0x%x\n",
+            tlv, tlv->type, tlv->len, info.tlv_len);
+        if (tlv->type == cmd && tlv->len <= buf_len) {
+            DFD_FAN_DEBUG(DBG_VERBOSE, "find tlv data, copy...\n");
+            memcpy(buf, (uint8_t *)tlv->data, tlv->len);
+            buf_len = (uint32_t)tlv->len;
+            match_flag = 1;
+            break;
+        }
+        tlv = (dfd_dev_tlv_info_t *)((uint8_t*)tlv + sizeof(dfd_dev_tlv_info_t) + tlv->len);
+    }
+    kfree(tlv_data);
+    if (match_flag == 0) {
+        DFD_FAN_DEBUG(DBG_ERROR,"can't find fan tlv date. bus: %d, addr: 0x%02x, tlv type: %d.\n",
+            bus, addr, cmd);
+        return -DFD_RV_TYPE_ERR;
+    }
+    return buf_len;
+}
+
+/**
+ * dfd_get_fan_present_status - Obtain the fan running status
+ * @index: Number of the fan, starting from 1
+ * @motor_index: Motor number, starting with 1
+ * return: 0:STALL
+ *         1:ROLL
+ *       : Negative value - Read failed
+ */
+static int dfd_get_fan_roll_status(unsigned int fan_index, unsigned int motor_index)
+{
+    uint64_t key;
+    int ret;
+    int status;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FAN_ROLL_STATUS, fan_index, motor_index);
+    ret = dfd_info_get_int(key, &status, NULL);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "get fan roll status error, fan: %u, motor: %u, key_name: %s\n",
+            fan_index, motor_index, key_to_name(DFD_CFG_ITEM_FAN_ROLL_STATUS));
+        return ret;
+    }
+    return status;
+}
+
+/**
+ * dfd_get_fan_present_status - Obtain the fan status
+ * @index: Number of the fan, starting from 1
+ * return: 0:ABSENT
+ *         1:PRESENT
+ *       : Negative value - Read failed
+ */
+int dfd_get_fan_present_status(unsigned int fan_index)
+{
+    uint64_t key;
+    int ret;
+    int status;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_DEV_PRESENT_STATUS, WB_MAIN_DEV_FAN, fan_index);
+    ret = dfd_info_get_int(key, &status, NULL);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "get fan present status error, key_name: %s\n", 
+            key_to_name(DFD_CFG_ITEM_DEV_PRESENT_STATUS));
+        return ret;
+    }
+    return status;
+}
+
+/**
+ * dfd_get_fan_status - Obtaining fan status
+ * @index: Number of the fan, starting from 1
+ * return: 0:ABSENT
+ *         1:OK
+ *         2:NOT OK
+ *       : Negative value - Read failed
+ */
+static int dfd_get_fan_status(unsigned int fan_index)
+{
+    int motor_num, motor_index, status, errcnt;
+
+    /* Obtaining fan status */
+    status = dfd_get_fan_present_status(fan_index);
+    if (status != PRESENT) {
+        DFD_FAN_DEBUG(DBG_ERROR, "fan index: %u, status: %d\n", fan_index, status);
+        return status;
+    }
+
+    /* Get the motor running state */
+    motor_num = dfd_get_dev_number(WB_MAIN_DEV_FAN, WB_MINOR_DEV_MOTOR);
+    if (motor_num <= 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "get motor number error: %d\n", motor_num);
+        return -DFD_RV_DEV_FAIL;
+    }
+    errcnt = 0;
+    for (motor_index = 1; motor_index <= motor_num; motor_index++) {
+        status = dfd_get_fan_roll_status(fan_index, motor_index);
+        if (status < 0) {
+            DFD_FAN_DEBUG(DBG_ERROR,  "get fan roll status error, fan index: %u, motor index: %d, status: %d\n",
+                fan_index, motor_index, status);
+            return status;
+        }
+        if (status != MOTOR_ROLL) {
+            DFD_FAN_DEBUG(DBG_ERROR,
+                "stall:fan index: %u, motor index: %d, status: %d\n",fan_index, motor_index, status);
+            errcnt++;
+        }
+    }
+    if (errcnt > 0) {
+        return FAN_STATUS_NOT_OK;
+    }
+    return FAN_STATUS_OK;
+}
+
+/**
+ * dfd_get_fan_status_str - Obtaining fan status
+ * @index: Number of the fan, starting from 1
+ * return: Success: Length of the status string
+ *       : Negative value - Read failed
+ */
+ssize_t dfd_get_fan_status_str(unsigned int fan_index, char *buf, size_t count)
+{
+    int ret;
+
+    if (buf == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "params error, fan_index: %u count: %lu",
+            fan_index, count);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "buf size error, count: %lu, fan index: %u\n",
+            count, fan_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    ret = dfd_get_fan_status(fan_index);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "get fan status error, ret: %d, fan_index: %u\n",
+            ret, fan_index);
+        return ret;
+    }
+    mem_clear(buf, count);
+    return (ssize_t)snprintf(buf, count, "%d\n", ret);
+}
+
+
+/**
+ * dfd_get_fan_present_str - Obtaining fan present status
+ * @index: Number of the fan, starting from 1
+ * return: Success: Length of the status string
+ *       : Negative value - Read failed
+ */
+ssize_t dfd_get_fan_present_str(unsigned int fan_index, char *buf, size_t count)
+{
+    int ret;
+
+    if (buf == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "params error, fan_index: %u count: %lu",
+            fan_index, count);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "buf size error, count: %lu, fan index: %u\n",
+            count, fan_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    ret = dfd_get_fan_present_status(fan_index);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "get fan present status error, ret: %d, fan_index: %u\n",
+            ret, fan_index);
+        return ret;
+    }
+    mem_clear(buf,  count);
+    return (ssize_t)snprintf(buf, count, "%d\n", ret);
+}
+
+/**
+ * dfd_get_fan_motor_status_str - Obtain the fan motor status
+ * @fan_index: Number of the fan, starting from 1
+ * @motor_index: Motor number, starting with 1
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fan_motor_status_str(unsigned int fan_index, unsigned int motor_index,
+            char *buf, size_t count)
+{
+    int ret;
+
+    if (buf == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "buf is NULL, fan index: %u, motor index: %u\n",
+            fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "buf size error, count: %lu, fan index: %u, motor index: %u\n",
+            count, fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    ret = dfd_get_fan_roll_status(fan_index, motor_index);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "get fan motor status error, ret: %d, fan_index: %u, motor index: %u\n",
+            ret, fan_index, motor_index);
+        return ret;
+    }
+    mem_clear(buf,  count);
+    return (ssize_t)snprintf(buf, count, "%d\n", ret);
+}
+
+/**
+ * dfd_fan_product_name_decode - Fan name conversion
+ * @psu_buf: Original fan name
+ * @buf_len: fan_buf length
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+static int dfd_fan_product_name_decode(char *fan_buf, int buf_len)
+{
+    uint64_t key;
+    int i, j;
+    char *p_fan_name, *p_decode_name;
+    int *fan_type_num;
+    int *fan_display_num;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_DEV_NUM, WB_MAIN_DEV_FAN, WB_MINOR_DEV_FAN);
+    fan_display_num = dfd_ko_cfg_get_item(key);
+    if (fan_display_num == NULL) {
+        DFD_FAN_DEBUG(DBG_VERBOSE, "get fan display name number error, key_name:%s, \
+            skip fan name decode\n", key_to_name(DFD_CFG_ITEM_DEV_NUM));
+        return DFD_RV_OK;
+    }
+
+    for (i = 1; i <= *fan_display_num; i++) {
+        key = DFD_CFG_KEY(DFD_CFG_ITEM_FAN_TYPE_NUM, i, 0);
+        fan_type_num = dfd_ko_cfg_get_item(key);
+        if (fan_type_num == NULL) {
+            DFD_FAN_DEBUG(DBG_ERROR, "config error, get fan type number error, key_name: %s\n", 
+                key_to_name(DFD_CFG_ITEM_FAN_TYPE_NUM));
+            return -DFD_RV_DEV_NOTSUPPORT;
+        }
+        for (j = 1; j <= *fan_type_num; j++) {
+            key = DFD_CFG_KEY(DFD_CFG_ITEM_FAN_NAME, i, j);
+            p_fan_name = dfd_ko_cfg_get_item(key);
+            if (p_fan_name == NULL) {
+                DFD_FAN_DEBUG(DBG_ERROR, "config error, get fan origin name error, key_name: %s\n", 
+                    key_to_name(DFD_CFG_ITEM_FAN_NAME));
+                return -DFD_RV_DEV_NOTSUPPORT;
+            }
+            if (!strncmp(fan_buf, p_fan_name, strlen(p_fan_name))) {
+                key = DFD_CFG_KEY(DFD_CFG_ITEM_DECODE_FAN_NAME, i, 0);
+                p_decode_name = dfd_ko_cfg_get_item(key);
+                if (p_decode_name == NULL) {
+                    DFD_FAN_DEBUG(DBG_ERROR, "config error, get fan decode name error, key_name: %s\n", 
+                        key_to_name(DFD_CFG_ITEM_DECODE_FAN_NAME));
+                    return -DFD_RV_DEV_NOTSUPPORT;
+                }
+                mem_clear(fan_buf, buf_len);
+                strlcpy(fan_buf, p_decode_name, buf_len);
+                DFD_FAN_DEBUG(DBG_VERBOSE, "fan name match ok, display fan name: %s.\n", fan_buf);
+                return DFD_RV_OK;
+            }
+        }
+    }
+
+    DFD_FAN_DEBUG(DBG_ERROR, "fan name: %s error, can't match.\n", fan_buf);
+    return -DFD_RV_DEV_NOTSUPPORT;
+}
+
+/**
+ * dfd_get_fan_info - Obtaining Fan Information
+ * @index: Number of the fan, starting from 1
+ * @cmd: Fan information type, fan name :2, fan serial number :3, fan hardware version :5
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fan_info(unsigned int fan_index, uint8_t cmd, char *buf, size_t count)
+{
+    uint64_t key;
+    int rv, eeprom_mode;
+    char fan_buf[FAN_SIZE];
+    dfd_i2c_dev_t *i2c_dev;
+    const char *sysfs_name;
+
+    if (buf == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "buf is NULL, fan index: %u, cmd: 0x%x.\n", fan_index, cmd);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "buf size error, count: %lu, fan index: %u, cmd: 0x%x.\n",
+            count, fan_index, cmd);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    mem_clear(buf, count);
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_OTHER_I2C_DEV, WB_MAIN_DEV_FAN, fan_index);
+    i2c_dev = dfd_ko_cfg_get_item(key);
+    if (i2c_dev == NULL) {
+        DFD_FAN_DEBUG(DBG_VERBOSE, "can't find fan%u I2C dfd config, key_name: %s\n", 
+            fan_index, key_to_name(DFD_CFG_ITEM_OTHER_I2C_DEV));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    sysfs_name = dfd_get_fan_sysfs_name();
+    eeprom_mode = dfd_get_fan_eeprom_mode();
+    mem_clear(fan_buf, FAN_SIZE);
+    if (eeprom_mode == FAN_EEPROM_MODE_TLV) {
+        if (cmd == DFD_DEV_INFO_TYPE_PART_NUMBER) {
+            DFD_FAN_DEBUG(DBG_VERBOSE, "fan tlv not have part_number attributes\n");
+            return -DFD_RV_DEV_NOTSUPPORT;
+        }
+        rv = dfd_fan_tlv_eeprom_read(i2c_dev->bus, i2c_dev->addr, cmd, fan_buf, FAN_SIZE, sysfs_name);
+    } else {
+        if (cmd == DFD_DEV_INFO_TYPE_VENDOR) {
+            rv = dfd_get_fru_board_data(i2c_dev->bus, i2c_dev->addr, cmd, fan_buf, FAN_SIZE, sysfs_name);
+        } else {
+            rv = dfd_get_fru_data(i2c_dev->bus, i2c_dev->addr, cmd, fan_buf, FAN_SIZE, sysfs_name);
+        }
+    }
+
+    if (rv < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "fan eeprom read failed");
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    DFD_FAN_DEBUG(DBG_VERBOSE, "%s\n", fan_buf);
+    /* Fan product name conversion */
+    if (cmd == DFD_DEV_INFO_TYPE_NAME) {
+        rv = dfd_fan_product_name_decode(fan_buf, FAN_SIZE);
+        if (rv < 0) {
+            DFD_FAN_DEBUG(DBG_ERROR, "fan name decode error. rv: %d\n", rv);
+        }
+    }
+
+    snprintf(buf, count, "%s\n", fan_buf);
+    return strlen(buf);
+}
+
+/**
+ * dfd_get_fan_speed - Obtain the fan speed
+ * @fan_index: Number of the fan, starting from 1
+ * @motor_index: Motor number, starting with 1
+ * @speed: Speed value
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+int dfd_get_fan_speed(unsigned int fan_index, unsigned int motor_index, unsigned int *speed)
+{
+    uint64_t key;
+    int ret, speed_tmp;
+
+    if (speed == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "param error. fan index: %u, motor index: %u\n",
+            fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FAN_SPEED, fan_index, motor_index);
+    ret = dfd_info_get_int(key, &speed_tmp, NULL);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "get fan%u motor%u speed error, key: %s, ret: %d\n",
+            fan_index, motor_index, key_to_name(DFD_CFG_ITEM_FAN_SPEED), ret);
+        return ret;
+    }
+
+    if (speed_tmp == 0 || speed_tmp == 0xffff) {
+        *speed = 0;
+    } else {
+        *speed = 15000000 / speed_tmp;
+    }
+    return DFD_RV_OK;
+}
+
+/**
+ * dfd_get_fan_speed_str - Obtain the fan speed
+ * @fan_index: Number of the fan, starting from 1
+ * @motor_index: Motor number, starting with 1
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fan_speed_str(unsigned int fan_index, unsigned int motor_index,
+            char *buf, size_t count)
+{
+    int ret;
+    unsigned int speed;
+
+    if (buf == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "buf is NULL, fan index: %u, motor index: %u\n",
+            fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "buf size error, count: %lu, fan index: %u, motor index: %u\n",
+            count, fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    ret = dfd_get_fan_speed(fan_index, motor_index, &speed);
+    if (ret < 0) {
+        return ret;
+    }
+    mem_clear(buf, count);
+    return (ssize_t)snprintf(buf, count, "%d\n", speed);
+}
+
+/**
+ * dfd_set_fan_pwm - set the fan speed duty cycle
+ * @fan_index: Number of the fan, starting from 1
+ * @pwm:   Duty cycle
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+int dfd_set_fan_pwm(unsigned int fan_index, int pwm)
+{
+    uint64_t key;
+    int ret, data;
+
+    if (pwm < 0 || pwm > 100) {
+        DFD_FAN_DEBUG(DBG_ERROR, "can not set pwm = %d.\n", pwm);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    data = pwm * 255 / 100;
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FAN_RATIO, fan_index, 0);
+    ret = dfd_info_set_int(key, data);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "set fan%u ratio error, key_name: %s,ret: %d\n",
+            fan_index, key_to_name(DFD_CFG_ITEM_FAN_RATIO), ret);
+        return ret;
+    }
+    return DFD_RV_OK;
+}
+
+/**
+ * dfd_get_fan_pwm - Obtain the fan speed duty cycle
+ * @fan_index: Number of the fan, starting from 1
+ * @pwm:   Duty cycle
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+int dfd_get_fan_pwm(unsigned int fan_index, int *pwm)
+{
+    uint64_t key;
+    int ret, ratio;
+
+    if (pwm == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "param error. fan index: %u\n", fan_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FAN_RATIO, fan_index, 0);
+    ret = dfd_info_get_int(key, &ratio, NULL);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "get fan%u ratio error, key_name: %s,ret: %d\n",
+            fan_index, key_to_name(DFD_CFG_ITEM_FAN_RATIO), ret);
+        return ret;
+    }
+    if ((ratio * 100) % 255 > 0) {
+        *pwm = ratio * 100 / 255 + 1;
+    } else {
+        *pwm = ratio * 100 / 255;
+    }
+    return DFD_RV_OK;
+}
+
+/**
+ * dfd_get_fan_pwm_str - Obtain the fan speed duty cycle
+ * @fan_index: Number of the fan, starting from 1
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fan_pwm_str(unsigned int fan_index, char *buf, size_t count)
+{
+    int ret, value;
+
+    if (buf == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "buf is NULL, fan index: %u\n", fan_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "buf size error, count: %lu, fan index: %u\n", count,
+            fan_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    ret = dfd_get_fan_pwm(fan_index, &value);
+    if (ret < 0) {
+        return ret;
+    }
+    mem_clear(buf, count);
+    return (ssize_t)snprintf(buf, count, "%d\n", value);
+}
+
+static int dfd_get_fan_type(unsigned int fan_index, int *fan_type, int *fan_sub_type)
+{
+    int rv;
+    char fan_buf[FAN_SIZE];
+
+    /* Get the fan name */
+    rv = dfd_get_fan_info(fan_index, DFD_DEV_INFO_TYPE_NAME, fan_buf, FAN_SIZE);
+    if (rv < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "get fan%u name error, ret: %d\n", fan_index, rv);
+        return rv;
+    }
+
+    DFD_FAN_DEBUG(DBG_VERBOSE, "%s\n", fan_buf);
+    dfd_info_del_no_print_string(fan_buf);
+
+    DFD_FAN_DEBUG(DBG_VERBOSE, "dfd_fan_product_name_decode get fan name %s\n", fan_buf);
+    rv = dfd_ko_cfg_get_fan_type_by_name((char *)fan_buf, fan_type, fan_sub_type);
+    if (rv < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "get fan%u type by name error, ret: %d\n", fan_index, rv);
+        return -DFD_RV_NO_NODE;
+    }
+
+    DFD_FAN_DEBUG(DBG_VERBOSE, "get fan%u type %d subtype %d by name ok\n", fan_index, *fan_type, *fan_sub_type);
+    return DFD_RV_OK;
+}
+
+/**
+ * dfd_get_fan_speed_target - Obtain the standard fan speed
+ * @fan_index
+ * @motor_index
+ * @value Standard speed value
+ * @returns: 0 success, negative value: failed
+ */
+int dfd_get_fan_speed_target(unsigned int fan_index, unsigned int motor_index, int *value)
+{
+    uint64_t key;
+    int *p_fan_speed_target;
+    int key1, key2, fan_type, fan_sub_type, pwm;
+    int ret;
+
+    if (value == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "param error. fan index: %u, motor index: %u\n",
+            fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    /* Get the fan type */
+    ret = dfd_get_fan_type(fan_index, &fan_type, &fan_sub_type);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "fan get type error, rv: %d\n", ret);
+        return -EIO;
+    }
+
+    /* Get current PWM */
+    ret = dfd_get_fan_pwm(fan_index, &pwm);
+    if (ret < 0) {
+        return ret;
+    }
+
+    /* Gets the rated speed corresponding to the current PWM */
+    key1 = DFD_GET_FAN_THRESHOLD_KEY1((pwm / 10 + FAN_SPEED_TARGET_0), WB_MAIN_DEV_FAN);
+    key2 = DFD_GET_FAN_THRESHOLD_KEY2(fan_type, motor_index);
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FAN_THRESHOLD, key1, key2);
+    p_fan_speed_target = dfd_ko_cfg_get_item(key);
+    if (p_fan_speed_target == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "get fan%u motor%u speed target failed, key_name: %s\n",
+            fan_index, motor_index, key_to_name(DFD_CFG_ITEM_FAN_THRESHOLD));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+    *value = *p_fan_speed_target;
+    DFD_FAN_DEBUG(DBG_VERBOSE, "get fan%u motor%u speed target ok, key_name: %s, value: %d\n",
+        fan_index, motor_index, key_to_name(DFD_CFG_ITEM_FAN_THRESHOLD), *value);
+    return DFD_RV_OK;
+}
+
+/**
+ * dfd_get_fan_motor_speed_target_str - Obtain the standard fan speed
+ * @fan_index: Number of the fan, starting from 1
+ * @motor_index: Motor number, starting with 1
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fan_motor_speed_target_str(unsigned int fan_index, unsigned int motor_index,
+            char *buf, size_t count)
+{
+    int ret, value;
+
+    if (buf == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "buf is NULL, fan index: %u, motor index: %u\n",
+            fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "buf size error, count: %lu, fan index: %u, motor index: %u\n",
+            count, fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    mem_clear(buf, count);
+    ret = dfd_get_fan_speed_target(fan_index, motor_index, &value);
+    if (ret < 0) {
+        return ret;
+    }
+    return (ssize_t)snprintf(buf, count, "%d\n", value);
+}
+
+/**
+ * dfd_get_fan_motor_speed_tolerance - Obtain the fan speed tolerance
+ * @fan_index
+ * @motor_index
+ * @value Speed tolerance
+ */
+static int dfd_get_fan_motor_speed_tolerance(unsigned int fan_index, unsigned int motor_index, int *value)
+{
+    uint64_t key;
+    int *p_fan_speed_tolerance;
+    int target, ret;
+    int key1, key2, fan_type, fan_sub_type;
+
+    if (value == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "param error. fan index: %u, motor index: %u.\n",
+            fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    /* Get the fan type */
+    ret = dfd_get_fan_type(fan_index, &fan_type, &fan_sub_type);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "fan get type error, ret: %d\n", ret);
+        return -EIO;
+    }
+
+    /* Obtain the error rate of the fan */
+    key1 = DFD_GET_FAN_THRESHOLD_KEY1(FAN_SPEED_TOLERANCE, WB_MAIN_DEV_FAN);
+    key2 = DFD_GET_FAN_THRESHOLD_KEY2(fan_type, motor_index);
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FAN_THRESHOLD, key1, key2);
+    p_fan_speed_tolerance = dfd_ko_cfg_get_item(key);
+    if (p_fan_speed_tolerance == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "get fan%u motor%u speed tolerance failed, key_name: %s\n",
+            fan_index, motor_index, key_to_name(DFD_CFG_ITEM_FAN_THRESHOLD));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    /* Obtain the fan speed target */
+    ret = dfd_get_fan_speed_target(fan_index, motor_index, &target);
+    if (ret < 0) {
+        return ret;
+    }
+
+    /* error rpm = Rated speed corresponding to the current pwm * Fan error ratio / 100 */
+    *value = target * *p_fan_speed_tolerance / 100;
+
+    DFD_FAN_DEBUG(DBG_VERBOSE, "get fan%u motor%u speed tolerance ok, key: %s, tolerance rate: %d, value: %d\n",
+        fan_index, motor_index, key_to_name(DFD_CFG_ITEM_FAN_THRESHOLD), *p_fan_speed_tolerance, *value);
+    return DFD_RV_OK;
+}
+
+/**
+ * dfd_get_fan_motor_speed_tolerance_str - Obtain the fan speed tolerance
+ * @fan_index: Number of the fan, starting from 1
+ * @motor_index: Motor number, starting with 1
+ * @buf: Receive buf
+ * @count: Duct type receives buf length
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fan_motor_speed_tolerance_str(unsigned int fan_index, unsigned int motor_index,
+            char *buf, size_t count)
+{
+    int ret, value;
+
+    if (buf == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "buf is NULL, fan index: %u, motor index: %u\n",
+            fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "buf size error, count: %lu, fan index: %u, motor index: %u\n",
+            count, fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    mem_clear(buf, count);
+    ret = dfd_get_fan_motor_speed_tolerance(fan_index, motor_index, &value);
+    if (ret < 0) {
+        return ret;
+    }
+    return (ssize_t)snprintf(buf, count, "%d\n", value);
+}
+
+/**
+ * dfd_get_fan_direction - Obtain the fan air duct type
+ * @fan_index:  The fan offset starts from 1
+ * @value 0:F2B, 1:B2F
+ * @returns: 0 success, negative value: failed
+ */
+static int dfd_get_fan_direction(unsigned int fan_index, int *value)
+{
+    uint64_t key;
+    int *p_fan_dirction;
+    int fan_type, fan_sub_type;
+    int rv;
+
+    if (value == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "param error, fan index: %u\n", fan_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    /* Get the fan type */
+    rv = dfd_get_fan_type(fan_index, &fan_type, &fan_sub_type);
+    if (rv < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "fan get type error, rv: %d\n", rv);
+        return -EIO;
+    }
+
+    /* Obtain the fan direction based on the fan type and subtype */
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FAN_DIRECTION, fan_type, fan_sub_type);
+    p_fan_dirction = dfd_ko_cfg_get_item(key);
+    if (p_fan_dirction == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "get fan%u direction failed, key_name: %s\n",
+            fan_index, key_to_name(DFD_CFG_ITEM_FAN_DIRECTION));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+    *value = *p_fan_dirction;
+    DFD_FAN_DEBUG(DBG_VERBOSE, "get fan%u direction success, key_name: %s, value: %d\n",
+        fan_index, key_to_name(DFD_CFG_ITEM_FAN_DIRECTION), *value);
+    return DFD_RV_OK;
+}
+
+/**
+ * dfd_get_fan_direction_str - Obtain the fan air duct type
+ * @fan_index:The fan offset starts from 1
+ * @buf :Duct type receives buf
+ * @count :Duct type receives buf length
+ * @returns: Succeeded: Air duct type String length
+ *           Failure: negative value
+ */
+ssize_t dfd_get_fan_direction_str(unsigned int fan_index, char *buf, size_t count)
+{
+    int ret, value;
+
+    if (buf == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "param error, buf is NULL, fan index: %u.\n", fan_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "param error, buf is NULL, fan index: %u.\n", fan_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    ret = dfd_get_fan_direction(fan_index, &value);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "get fan direction string failed, ret: %d, fan_index: %u\n",
+            ret, fan_index);
+        return ret;
+    }
+    mem_clear(buf, count);
+    return (ssize_t)snprintf(buf, count, "%d\n", value);
+}
+
+/**
+ * dfd_get_fan_motor_speed_max - Obtain the maximum fan speed
+ * @fan_index
+ * @motor_index
+ * @value Maximum fan speed
+ * @returns: 0 success, negative value: failed
+ */
+static int dfd_get_fan_motor_speed_max(unsigned int fan_index, unsigned int motor_index, int *value)
+{
+    uint64_t key;
+    int *p_fan_speed_max;
+    int key1, key2, fan_type, fan_sub_type;
+    int rv;
+
+    if (value == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "param error, fan index: %u, motor index: %u\n",
+            fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    /* Get the fan type */
+    rv = dfd_get_fan_type(fan_index, &fan_type, &fan_sub_type);
+    if (rv < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "fan get type error, rv: %d\n", rv);
+        return -EIO;
+    }
+
+    key1 = DFD_GET_FAN_THRESHOLD_KEY1(FAN_SPEED_MAX, WB_MAIN_DEV_FAN);
+    key2 = DFD_GET_FAN_THRESHOLD_KEY2(fan_type, motor_index);
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FAN_THRESHOLD, key1, key2);
+    p_fan_speed_max = dfd_ko_cfg_get_item(key);
+    if (p_fan_speed_max == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "get fan%u motor%u speed max failed, key_name: %s\n",
+            fan_index, motor_index, key_to_name(DFD_CFG_ITEM_FAN_THRESHOLD));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+    *value = *p_fan_speed_max;
+    DFD_FAN_DEBUG(DBG_VERBOSE, "get fan%u motor%u speed max success, key_name: %s, value: %d\n",
+        fan_index, motor_index, key_to_name(DFD_CFG_ITEM_FAN_THRESHOLD), *value);
+    return DFD_RV_OK;
+}
+
+/**
+ * dfd_get_fan_motor_speed_max_str - Obtain the standard fan speed
+ * @fan_index: Number of the fan, starting from 1
+ * @motor_index: Motor number, starting with 1
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fan_motor_speed_max_str(unsigned int fan_index, unsigned int motor_index,
+            char *buf, size_t count)
+{
+    int ret, value;
+
+    if (buf == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "buf is NULL, fan index: %u, motor index: %u\n",
+            fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "buf size error, count: %lu, fan index: %u, motor index: %u\n",
+            count, fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    mem_clear(buf, count);
+    ret = dfd_get_fan_motor_speed_max(fan_index, motor_index, &value);
+    if (ret < 0) {
+        return ret;
+    }
+    return (ssize_t)snprintf(buf, count, "%d\n", value);
+}
+
+/**
+ * dfd_get_fan_motor_speed_min - Obtain the minimum fan speed
+ * @fan_index
+ * @motor_index
+ * @value Minimum fan speed
+ * @returns: 0 success, negative value: failed
+ */
+static int dfd_get_fan_motor_speed_min(unsigned int fan_index, unsigned int motor_index, int *value)
+{
+    uint64_t key;
+    int *p_fan_speed_min;
+    int key1, key2, fan_type, fan_sub_type;
+    int rv;
+
+    if (value == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "param error. fan index: %u, motor index: %u\n",
+            fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    /* Get the fan type */
+    rv = dfd_get_fan_type(fan_index, &fan_type, &fan_sub_type);
+    if (rv < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "fan get type error, rv: %d\n", rv);
+        return -EIO;
+    }
+
+    key1 = DFD_GET_FAN_THRESHOLD_KEY1(FAN_SPEED_MIN, WB_MAIN_DEV_FAN);
+    key2 = DFD_GET_FAN_THRESHOLD_KEY2(fan_type, motor_index);
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FAN_THRESHOLD, key1, key2);
+    p_fan_speed_min = dfd_ko_cfg_get_item(key);
+    if (p_fan_speed_min == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "get fan%u motor%u speed min failed, key_name: %s\n",
+            fan_index, motor_index, key_to_name(DFD_CFG_ITEM_FAN_THRESHOLD));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+    *value = *p_fan_speed_min;
+    DFD_FAN_DEBUG(DBG_VERBOSE, "get fan%u motor%u speed min success, key_name: %s, value: %d\n",
+        fan_index, motor_index, key_to_name(DFD_CFG_ITEM_FAN_THRESHOLD), *value);
+    return DFD_RV_OK;
+}
+
+/**
+ * dfd_get_fan_motor_speed_min_str - Obtain the standard fan speed
+ * @fan_index: Number of the fan, starting from 1
+ * @motor_index: Motor number, starting with 1
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fan_motor_speed_min_str(unsigned int fan_index, unsigned int motor_index,
+            char *buf, size_t count)
+{
+    int ret, value;
+
+    if (buf == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "buf is NULL, fan index: %u, motor index: %u\n",
+            fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "buf size error, count: %lu, fan index: %u, motor index: %u\n",
+            count, fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    mem_clear(buf, count);
+    ret = dfd_get_fan_motor_speed_min(fan_index, motor_index, &value);
+    if (ret < 0) {
+        return ret;
+    }
+    return (ssize_t)snprintf(buf, count, "%d\n", value);
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_fpga_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_fpga_driver.c
new file mode 100644
index 000000000000..e5c326df0eb0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_fpga_driver.c
@@ -0,0 +1,341 @@
+/*
+ * An wb_fpga_driver driver for fpga devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+
+#include "wb_module.h"
+#include "dfd_cfg.h"
+#include "dfd_cfg_adapter.h"
+#include "dfd_cfg_info.h"
+
+#define FPGA_REG_WIDTH_MAX            (4)
+
+int g_dfd_fpga_dbg_level = 0;
+module_param(g_dfd_fpga_dbg_level, int, S_IRUGO | S_IWUSR);
+
+/**
+ * dfd_get_fpga_name - Get the FPGA name
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @index:FPGA number, starting from 1
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fpga_name(uint8_t main_dev_id, unsigned int fpga_index, char *buf, size_t count)
+{
+    uint64_t key;
+    char *fpga_name;
+
+    if (buf == NULL) {
+        DBG_FPGA_DEBUG(DBG_ERROR, "param error, buf is NULL. main_dev_id: %u, fpga index: %u\n",
+            main_dev_id, fpga_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    if (count <= 0) {
+        DBG_FPGA_DEBUG(DBG_ERROR, "buf size error, count: %lu, main_dev_id: %u, fpga index: %u\n",
+            count, main_dev_id, fpga_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    mem_clear(buf, count);
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FPGA_NAME, main_dev_id, fpga_index);
+    fpga_name = dfd_ko_cfg_get_item(key);
+    if (fpga_name == NULL) {
+        DBG_FPGA_DEBUG(DBG_ERROR, "main_dev_id: %u, fpga%u name config error, key_name: %s\n",
+            main_dev_id, fpga_index, key_to_name(DFD_CFG_ITEM_FPGA_NAME));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DBG_FPGA_DEBUG(DBG_VERBOSE, "%s\n", fpga_name);
+    snprintf(buf, count, "%s\n", fpga_name);
+    return strlen(buf);
+}
+
+static ssize_t dfd_get_fpga_model(uint8_t main_dev_id, unsigned int fpga_index, char *buf, size_t count)
+{
+    uint64_t key;
+    int ret, fpga_model_val;
+    char *fpga_type;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FPGA_MODEL_REG, main_dev_id, fpga_index);
+    ret = dfd_info_get_int(key, &fpga_model_val, NULL);
+    if (ret < 0) {
+        DBG_FPGA_DEBUG(DBG_ERROR, "get main_dev_id: %u, fpga%u model failed, key_name: %s, ret: %d\n",
+            main_dev_id, fpga_index, key_to_name(DFD_CFG_ITEM_FPGA_MODEL_REG), ret);
+        return ret;
+    }
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FPGA_MODEL_DECODE, fpga_model_val, 0);
+    fpga_type = dfd_ko_cfg_get_item(key);
+    if (fpga_type == NULL) {
+        DBG_FPGA_DEBUG(DBG_ERROR, "main_dev_id: %u, fpga%u decode fpga model val 0x%08x failed\n",
+            main_dev_id, fpga_index, fpga_model_val);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DBG_FPGA_DEBUG(DBG_VERBOSE,
+        "main_dev_id: %u, fpga%u decode fpga model success, origin value: 0x%08x decode value: %s\n",
+        main_dev_id, fpga_index, fpga_model_val, fpga_type);
+    snprintf(buf, count, "%s\n", fpga_type);
+    return strlen(buf);
+}
+
+/**
+ * dfd_get_fpga_type - Get FPGA model
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @index:FPGA number, starting from 1
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fpga_type(uint8_t main_dev_id, unsigned int fpga_index, char *buf, size_t count)
+{
+    uint64_t key;
+    char *fpga_type;
+    ssize_t ret;
+
+    if (buf == NULL) {
+        DBG_FPGA_DEBUG(DBG_ERROR, "param error, buf is NULL, main_dev_id: %u, fpga index: %u\n",
+            main_dev_id, fpga_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    if (count <= 0) {
+        DBG_FPGA_DEBUG(DBG_ERROR, "buf size error, count: %lu, main_dev_id: %u, fpga index: %u\n",
+            count, main_dev_id, fpga_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    mem_clear(buf, count);
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FPGA_TYPE, main_dev_id, fpga_index);
+    fpga_type = dfd_ko_cfg_get_item(key);
+    if (fpga_type == NULL) {
+        DBG_FPGA_DEBUG(DBG_VERBOSE,
+            "main_dev_id: %u, fpga%u type config is NULL, try to get fpga type from fpga model\n",
+            main_dev_id, fpga_index);
+        /* Unconfigured fpga_type Obtain the device model from fpga_model */
+        ret = dfd_get_fpga_model(main_dev_id, fpga_index, buf, count);
+        return ret;
+    }
+
+    DBG_FPGA_DEBUG(DBG_VERBOSE, "%s\n", fpga_type);
+    snprintf(buf, count, "%s\n", fpga_type);
+    return strlen(buf);
+}
+
+/**
+ * dfd_get_fpga_fw_version - Obtain the FPGA firmware version
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @index:FPGA number, starting from 1
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fpga_fw_version(uint8_t main_dev_id, unsigned int fpga_index, char *buf, size_t count)
+{
+    uint64_t key;
+    int rv;
+    uint32_t value;
+
+    if (buf == NULL) {
+        DBG_FPGA_DEBUG(DBG_ERROR, "param error, buf is NULL, main_dev_id: %u, fpga index: %u\n",
+            main_dev_id, fpga_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DBG_FPGA_DEBUG(DBG_ERROR, "buf size error, count: %lu, main_dev_id: %u, fpga index: %u\n",
+            count, main_dev_id, fpga_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    mem_clear(buf, count);
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FPGA_VERSION, main_dev_id, fpga_index);
+    rv = dfd_info_get_int(key, &value, NULL);
+    if (rv < 0) {
+        DBG_FPGA_DEBUG(DBG_ERROR, "main_dev_id: %u, fpga%u fw config error, key_name: %s, ret: %d\n",
+            main_dev_id, fpga_index, key_to_name(DFD_CFG_ITEM_FPGA_VERSION), rv);
+        return rv;
+    }
+
+    DBG_FPGA_DEBUG(DBG_VERBOSE, "main_dev_id: %u, fpga%u firmware version: %x\n",
+        main_dev_id, fpga_index, value);
+    snprintf(buf, count, "0x%08x\n", value);
+    return strlen(buf);
+}
+
+/**
+ * dfd_get_fpga_hw_version - Obtain the hardware version of the FPGA
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @index: FPGA number, starting from 1
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fpga_hw_version(uint8_t main_dev_id, unsigned int fpga_index, char *buf, size_t count)
+{
+
+    if (buf == NULL) {
+        DBG_FPGA_DEBUG(DBG_ERROR, "param error, buf is NULL, main_dev_id: %u, fpga index: %u\n",
+            main_dev_id, fpga_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DBG_FPGA_DEBUG(DBG_ERROR, "buf size error, count: %lu, main_dev_id: %u, fpga index: %u\n",
+            count, main_dev_id, fpga_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    DBG_FPGA_DEBUG(DBG_VERBOSE, "main_dev_id: %u, fpga%u hardware version not support\n",
+        main_dev_id, fpga_index);
+   return -DFD_RV_DEV_NOTSUPPORT;
+}
+
+static int value_convert_to_buf(unsigned int value, uint8_t *buf, int len, int pola)
+{
+    int i;
+
+    if ((pola != INFO_POLA_POSI) && (pola != INFO_POLA_NEGA)) {
+        DBG_FPGA_DEBUG(DBG_ERROR, "unsupport pola mode: %d\n", pola);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    mem_clear(buf, len);
+    if (pola == INFO_POLA_POSI) {   /* Big-end mode */
+        for (i = 0; i < len; i++) {
+            buf[i] = (value >> ((len - i - 1) * 8)) & 0xff;
+        }
+    } else {    /* Small terminal mode */
+        for (i = 0; i < len; i++) {
+            buf[i] = (value >> (i * 8)) & 0xff;
+        }
+    }
+    return DFD_RV_OK;
+}
+
+/**
+ * dfd_set_fpga_testreg - Sets the value of the FPGA test register
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @fpga_index: FPGA number, starting from 1
+ * @value: Writes the value of the test register
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+int dfd_set_fpga_testreg(uint8_t main_dev_id, unsigned int fpga_index, unsigned int value)
+{
+    uint64_t key;
+    int ret;
+    uint8_t wr_buf[FPGA_REG_WIDTH_MAX];
+    info_ctrl_t *info_ctrl;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FPGA_TEST_REG, main_dev_id, fpga_index);
+    /* Get the configuration item read and write control variables */
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_FPGA_DEBUG(DBG_VERBOSE, "main_dev_id: %u, fpga%u get info ctrl failed, key_name: %s\n",
+            main_dev_id, fpga_index, key_to_name(DFD_CFG_ITEM_FPGA_TEST_REG));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+    if (info_ctrl->fpath == NULL) {
+        DBG_FPGA_DEBUG(DBG_VERBOSE, "main_dev_id: %u, fpga%u get fpath failed\n", main_dev_id,
+            fpga_index);
+         return -DFD_RV_INVALID_VALUE;
+    }
+    if (info_ctrl->len > FPGA_REG_WIDTH_MAX) {
+        DBG_FPGA_DEBUG(DBG_ERROR, "main_dev_id: %u, fpga%u info_ctrl len: %d, unsupport\n",
+            main_dev_id, fpga_index, info_ctrl->len);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    ret = value_convert_to_buf(value, wr_buf, FPGA_REG_WIDTH_MAX, info_ctrl->pola);
+    if (ret < 0) {
+        DBG_FPGA_DEBUG(DBG_ERROR, "value: 0x%x convert to buf failed, pola:%d, ret: %d\n",
+            value, info_ctrl->pola, ret);
+        return ret;
+    }
+
+    DBG_FPGA_DEBUG(DBG_VERBOSE, "main_dev_id: %u, fpga%u fpath: %s, addr: 0x%x, len: %d value: 0x%x\n",
+        main_dev_id, fpga_index, info_ctrl->fpath, info_ctrl->addr, info_ctrl->len, value);
+    ret = dfd_ko_write_file(info_ctrl->fpath, info_ctrl->addr, wr_buf, info_ctrl->len);
+    if (ret < 0) {
+        DBG_FPGA_DEBUG(DBG_ERROR, "set fpga test reg failed, ret: %d", ret);
+        return ret;
+    }
+    return DFD_RV_OK;
+}
+
+/**
+ * dfd_get_fpga_testreg - Read the FPGA test register value
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @fpga_index: FPGA number, starting from 1
+ * @value: Read the test register value
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+int dfd_get_fpga_testreg(uint8_t main_dev_id, unsigned int fpga_index, int *value)
+{
+    uint64_t key;
+    int ret;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FPGA_TEST_REG, main_dev_id, fpga_index);
+    ret = dfd_info_get_int(key, value, NULL);
+    if (ret < 0) {
+        DBG_FPGA_DEBUG(DBG_ERROR, "main_dev_id: %u, get fpga%u test reg error, key_name: %s, ret: %d\n",
+            main_dev_id, fpga_index, key_to_name(DFD_CFG_ITEM_FPGA_TEST_REG), ret);
+        return ret;
+    }
+    return DFD_RV_OK;
+}
+
+/**
+ * dfd_get_fpga_testreg_str - Read the FPGA test register value
+ * @main_dev_id: Motherboard :0 Subcard :5
+ * @fpga_index: FPGA number, starting from 1
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_fpga_testreg_str(uint8_t main_dev_id, unsigned int fpga_index,
+            char *buf, size_t count)
+{
+    int ret, value;
+
+    if (buf == NULL) {
+        DBG_FPGA_DEBUG(DBG_ERROR, "param error, buf is NULL, main_dev_id: %u, fpga index: %u\n",
+            main_dev_id, fpga_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DBG_FPGA_DEBUG(DBG_ERROR, "buf size error, count: %lu, main_dev_id: %u, fpga index: %u\n",
+            count, main_dev_id, fpga_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    mem_clear(buf, count);
+    ret = dfd_get_fpga_testreg(main_dev_id, fpga_index, &value);
+    if (ret < 0) {
+        return ret;
+    }
+    return (ssize_t)snprintf(buf, count, "0x%08x\n", value);
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_led_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_led_driver.c
new file mode 100644
index 000000000000..c66c3150dd79
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_led_driver.c
@@ -0,0 +1,133 @@
+/*
+ * An wb_led_driver driver for led devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+
+#include "wb_module.h"
+#include "dfd_cfg.h"
+#include "dfd_cfg_info.h"
+#include "dfd_cfg_adapter.h"
+
+int g_dfd_sysled_dbg_level = 0;
+module_param(g_dfd_sysled_dbg_level, int, S_IRUGO | S_IWUSR);
+
+/**
+ * dfd_get_led_status_value - Get LED light status value
+ * @led_id See the wb_led_t definition
+ * @value 0: Off, 1: green, 2: yellow, 3: red, 4: blue, 5: green, 6: yellow, 7: red
+ * @returns: 0 success, negative value: failed
+ */
+static int dfd_get_led_status_value(uint16_t led_id, uint8_t led_index, int *value)
+{
+    uint64_t key;
+    int ori_value, ret;
+    int *p_decode_value;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_LED_STATUS, led_id, led_index);
+    ret = dfd_info_get_int(key, &ori_value, NULL);
+    if (ret < 0) {
+        DBG_SYSLED_DEBUG(DBG_ERROR, "get led status error, key: %s, ret: %d\n", 
+            key_to_name(DFD_CFG_ITEM_LED_STATUS), ret);
+        return ret;
+    }
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_LED_STATUS_DECODE, led_id, ori_value);
+    p_decode_value = dfd_ko_cfg_get_item(key);
+    if (p_decode_value != NULL) {
+        DBG_SYSLED_DEBUG(DBG_VERBOSE, "led id: %u index: %u, ori_value: 0x%x, decode value :0x%x\n",
+                led_id, led_index, ori_value, *p_decode_value);
+        *value = *p_decode_value;
+        return DFD_RV_OK;
+    }
+    return -DFD_RV_INVALID_VALUE;
+}
+
+/**
+ * dfd_get_led_status - Get LED light status
+ * @led_id: led lamp type
+ * @led_index: led light offset
+ * @buf: LED light status receives buf
+ * @count: Accept the buf length
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_led_status(uint16_t led_id, uint8_t led_index, char *buf, size_t count)
+{
+    int ret, led_value;
+
+    if (buf == NULL) {
+        DBG_SYSLED_DEBUG(DBG_ERROR, "param error, buf is NULL. led_id: %u, led_index: %u\n",
+            led_id, led_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DBG_SYSLED_DEBUG(DBG_ERROR, "buf size error, count: %lu, led_id: %u, led_index: %u\n",
+            count, led_id, led_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    mem_clear(buf, count);
+    ret = dfd_get_led_status_value(led_id, led_index, &led_value);
+    if (ret < 0) {
+        DBG_SYSLED_DEBUG(DBG_ERROR, "get led status error, ret: %d, led_id: %u, led_index: %u\n",
+            ret, led_id, led_index);
+        return ret;
+    }
+    return (ssize_t)snprintf(buf, count, "%d\n", led_value);
+}
+
+/**
+ * dfd_set_led_status - Set LED light status
+ * @led_id: led lamp type
+ * @led_index: led light offset
+ * @value: LED light status value
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_set_led_status(uint16_t led_id, uint8_t led_index, int value)
+{
+    uint64_t key;
+    int ret, led_value;
+
+    if (value < 0 || value > 0xff) {
+        DBG_SYSLED_DEBUG(DBG_ERROR, "can not set led status value = %d.\n", value);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    DBG_SYSLED_DEBUG(DBG_VERBOSE, "set led id: %u index: %u, status[%d].\n",
+        led_id, led_index, value);
+    ret = dfd_ko_cfg_get_led_status_decode2_by_regval(value, led_id, &led_value);
+    if (ret < 0) {
+        DBG_SYSLED_DEBUG(DBG_ERROR, "get led status register error, ret: %d, led_id: %u, value: %d\n",
+            ret, led_id, value);
+        return ret;
+    }
+
+    DBG_SYSLED_DEBUG(DBG_VERBOSE, "get led[%u] index[%u] status[%d] decode value[%d]\n",
+        led_id, led_index, value, led_value);
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_LED_STATUS, led_id, led_index);
+    ret = dfd_info_set_int(key, led_value);
+    if (ret < 0) {
+        DBG_SYSLED_DEBUG(DBG_ERROR, "set led status error, key_name: %s, ret: %d\n", 
+            key_to_name(DFD_CFG_ITEM_LED_STATUS), ret);
+        return ret;
+    }
+
+    return DFD_RV_OK;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_module.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_module.c
new file mode 100644
index 000000000000..69610668a971
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_module.c
@@ -0,0 +1,73 @@
+/*
+ * An wb_module driver for module devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+
+#include "wb_module.h"
+#include "dfd_cfg.h"
+
+int g_dfd_dbg_level = 0;   /* Debug level */
+module_param(g_dfd_dbg_level, int, S_IRUGO | S_IWUSR);
+
+/**
+ * wb_dev_cfg_init - dfd module initialization
+ *
+ * @returns:<0 Failed, otherwise succeeded
+ */
+int32_t wb_dev_cfg_init(void)
+{
+    return dfd_dev_cfg_init();
+}
+
+/**
+ * wb_dev_cfg_exit - dfd module exit
+ *
+ * @returns: void
+ */
+
+void wb_dev_cfg_exit(void)
+{
+    dfd_dev_cfg_exit();
+    return;
+}
+
+/**
+ * dfd_get_dev_number - Get the number of devices
+ * @main_dev_id:Master device number
+ * @minor_dev_id:Secondary device number
+ * @returns: <0 failed, otherwise number of devices is returned
+ */
+int dfd_get_dev_number(unsigned int main_dev_id, unsigned int minor_dev_id)
+{
+    uint64_t key;
+    int dev_num;
+    int *p_dev_num;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_DEV_NUM, main_dev_id, minor_dev_id);
+    p_dev_num = dfd_ko_cfg_get_item(key);
+    if (p_dev_num == NULL) {
+        DBG_DEBUG(DBG_ERROR, "get device number failed, key_name:%s\n",
+            key_to_name(DFD_CFG_ITEM_DEV_NUM));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+    dev_num = *p_dev_num;
+    DBG_DEBUG(DBG_VERBOSE, "get device number ok, number:%d\n",dev_num);
+    return dev_num;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_psu_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_psu_driver.c
new file mode 100644
index 000000000000..aad65d282921
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_psu_driver.c
@@ -0,0 +1,950 @@
+/*
+ * An wb_psu_driver driver for psu devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/slab.h>
+
+#include "wb_module.h"
+#include "dfd_cfg.h"
+#include "dfd_cfg_adapter.h"
+#include "dfd_cfg_info.h"
+#include "dfd_frueeprom.h"
+
+#define PSU_SIZE                         (256)
+#define WB_GET_PSU_PMBUS_BUS(addr)       (((addr) >> 24) & 0xff)
+#define WB_GET_PSU_PMBUS_ADDR(addr)      (((addr) >> 8) & 0xffff)
+#define WB_GET_PSU_PMBUS_OFFSET(addr)    ((addr) & 0xff)
+#define DFD_PSU_FRU_MODE_E2_STRING       "eeprom"
+#define DFD_PSU_FRU_MODE_PMBUS_STRING    "pmbus"
+
+#define PSU_PMBUS_POWER_GOOD        BIT(11)
+
+typedef enum dfd_psu_pmbus_type_e {
+    DFD_PSU_PMBUS_TYPE_AC      = 1,
+    DFD_PSU_PMBUS_TYPE_DC      = 2,
+} dfd_psu_pmbus_type_t;
+
+typedef enum dfd_psu_sysfs_type_e {
+    DFD_PSU_SYSFS_TYPE_DC      = 0,
+    DFD_PSU_SYSFS_TYPE_AC      = 1,
+} dfd_psu_sysfs_type_t;
+
+typedef enum dfd_psu_status_e {
+    DFD_PSU_PRESENT_STATUS  = 0,
+    DFD_PSU_OUTPUT_STATUS   = 1,
+    DFD_PSU_ALERT_STATUS    = 2,
+    DFD_PSU_INPUT_STATUS    = 3,
+} dfd_psu_status_t;
+
+typedef enum dfd_psu_alarm_e {
+    DFD_PSU_NOT_OK        = 0,
+    DFD_PSU_OK        = 1,
+} dfd_psu_alarm_t;
+
+enum knos_alarm {
+    PSU_TERMAL_ERROR    = 0x1,
+    PSU_FAN_ERROR       = 0x2,
+    PSU_VOL_ERROR       = 0x4,
+};
+
+typedef enum psu_fru_mode_e {
+    PSU_FRU_MODE_E2,         /* eeprom */
+    PSU_FRU_MODE_PMBUS,      /*pmbus*/
+} fan_eeprom_mode_t;
+
+
+/* PMBUS STATUS WORD decode */
+#define PSU_STATUS_WORD_CML             (1 << 1)
+#define PSU_STATUS_WORD_TEMPERATURE     (1 << 2)
+#define PSU_STATUS_WORD_VIN_UV          (1 << 3)
+#define PSU_STATUS_WORD_IOUT_OC         (1 << 4)
+#define PSU_STATUS_WORD_VOUT_OV         (1 << 5)
+#define PSU_STATUS_WORD_OFF             (1 << 6)
+#define PSU_STATUS_WORD_BUSY            (1 << 7)
+#define PSU_STATUS_WORD_FANS            (1 << 10)
+#define PSU_STATUS_WORD_POWER_GOOD      (1 << 11)
+#define PSU_STATUS_WORD_INPUT           (1 << 13)
+#define PSU_STATUS_WORD_IOUT            (1 << 14)
+#define PSU_STATUS_WORD_VOUT            (1 << 15)
+
+#define PSU_VOLTAGE_ERR_OFFSET          (PSU_STATUS_WORD_VOUT | PSU_STATUS_WORD_IOUT | \
+                                         PSU_STATUS_WORD_INPUT | PSU_STATUS_WORD_POWER_GOOD| \
+                                         PSU_STATUS_WORD_OFF | PSU_STATUS_WORD_VOUT_OV| \
+                                         PSU_STATUS_WORD_IOUT_OC | PSU_STATUS_WORD_VIN_UV)
+
+int g_dfd_psu_dbg_level = 0;
+module_param(g_dfd_psu_dbg_level, int, S_IRUGO | S_IWUSR);
+
+static int dfd_get_psu_fru_mode(void)
+{
+    uint64_t key;
+    int mode;
+    char *name;
+
+    /* string Type configuration item */
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_PSU_FRU_MODE, 0, 0);
+    name = dfd_ko_cfg_get_item(key);
+    if (name == NULL) {
+        /* The default EEPROM format is returned */
+        DFD_PSU_DEBUG(DBG_VERBOSE, "get psu fru mode config fail, key=%s, use default eeprom mode\n",
+            key_to_name(DFD_CFG_ITEM_PSU_FRU_MODE));
+        return PSU_FRU_MODE_E2;
+    }
+
+    DFD_PSU_DEBUG(DBG_VERBOSE, "psu fru mode %s.\n", name);
+    if (!strncmp(name, DFD_PSU_FRU_MODE_E2_STRING, strlen(DFD_PSU_FRU_MODE_E2_STRING))) {
+        mode = PSU_FRU_MODE_E2;
+    } else if (!strncmp(name, DFD_PSU_FRU_MODE_PMBUS_STRING, strlen(DFD_PSU_FRU_MODE_PMBUS_STRING))) {
+        mode = PSU_FRU_MODE_PMBUS;
+    } else {
+        /* The default EEPROM format is returned */
+        mode = PSU_FRU_MODE_E2;
+    }
+
+    DFD_FAN_DEBUG(DBG_VERBOSE, "psu fru mode %d.\n", mode);
+    return mode;
+}
+
+static char *dfd_get_psu_sysfs_name(void)
+{
+    uint64_t key;
+    char *sysfs_name;
+
+    /* string Type configuration item */
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_PSU_SYSFS_NAME, 0, 0);
+    sysfs_name = dfd_ko_cfg_get_item(key);
+    if (sysfs_name == NULL) {
+        DFD_PSU_DEBUG(DBG_VERBOSE, "key_name=%s, sysfs_name is NULL, use default way.\n",
+            key_to_name(DFD_CFG_ITEM_PSU_SYSFS_NAME));
+    } else {
+        DFD_PSU_DEBUG(DBG_VERBOSE, "sysfs_name: %s.\n", sysfs_name);
+    }
+    return sysfs_name;
+}
+
+static void dfd_psu_del_no_print_string(char *buf)
+{
+    int i, len;
+
+    len = strlen(buf);
+    /* Culling noncharacter */
+    for (i = 0; i < len; i++) {
+        if ((buf[i] < 0x21) || (buf[i] > 0x7E)) {
+            buf[i] = '\0';
+            break;
+        }
+    }
+    return;
+}
+
+/**
+ * dfd_get_psu_present_status - Obtain the power supply status
+ * @index: Number of the power supply, starting from 1
+ * return: 0:Not in the position
+ *         1:position
+ *       : Negative value - Read failed
+ */
+int dfd_get_psu_present_status(unsigned int psu_index)
+{
+    int present_key, present_status;
+    int ret;
+
+    /* Get presence status */
+    present_key = DFD_CFG_KEY(DFD_CFG_ITEM_PSU_STATUS, psu_index, DFD_PSU_PRESENT_STATUS);
+    ret = dfd_info_get_int(present_key, &present_status, NULL);
+    if (ret  < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "dfd_get_psu_status error. psu_index: %u, ret: %d\n",
+            psu_index, ret);
+        return ret;
+    }
+
+    return present_status;
+}
+
+/**
+ * dfd_get_psu_present_status_str - Obtain power status
+ * @index: Number of the power supply, starting from 1
+ * return: Success: Length of the status string
+ *       : Gets the value on the pmbus register of the power supply
+ */
+ssize_t dfd_get_psu_present_status_str(unsigned int psu_index, char *buf, size_t count)
+{
+    int ret;
+    if (buf == NULL) {
+        DFD_PSU_DEBUG(DBG_ERROR, "params error.psu_index: %u.",psu_index);
+        return -EINVAL;
+    }
+    if (count <= 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "buf size error, count: %lu, psu index: %u\n",
+            count, psu_index);
+        return -EINVAL;
+    }
+
+    ret = dfd_get_psu_present_status(psu_index);
+    if (ret < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "get psu status error, ret: %d, psu_index: %u\n", ret, psu_index);
+        return ret;
+    }
+    mem_clear(buf, count);
+    return (ssize_t)snprintf(buf, count, "%d\n", ret);
+}
+
+ssize_t dfd_get_psu_pmbus_status(unsigned int psu_index, char *buf, size_t count)
+{
+    int key;
+    int ret;
+
+    /* PMBUS STATUS WORD (0x79) */
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_HWMON_PSU, psu_index, PSU_HW_STATUS);
+    ret = dfd_info_get_sensor(key, buf, count, NULL);
+
+    if (ret < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "get psu%u pmbus status info failed, key: 0x%08x, ret: %d\n",
+            psu_index, DFD_CFG_ITEM_HWMON_PSU, ret);
+    } else {
+        DFD_PSU_DEBUG(DBG_VERBOSE, "psu_index: %u, pmbus_data = %s \n", psu_index, buf);
+    }
+    return ret;
+}
+
+/**
+ * dfd_get_psu_hw_status_str - get psu status str
+ * @index: Number of the power supply, starting from 1
+ * return: Success: Length of the status string
+ *       : Gets the value on the pmbus register of the power supply
+ */
+ssize_t dfd_get_psu_hw_status_str(unsigned int psu_index, char *buf, size_t count)
+{
+    int ret;
+    int status_word;
+    int status;
+    int output_key, output_status;
+    int alert_key, alert_status;
+
+    if (buf == NULL) {
+        DFD_PSU_DEBUG(DBG_ERROR, "params error, psu_index: %u", psu_index);
+        return -EINVAL;
+    }
+    if (count <= 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "buf size error, count: %lu, psu index: %u\n",
+            count, psu_index);
+        return -EINVAL;
+    }
+
+    /* get psu present status first */
+    ret = dfd_get_psu_present_status(psu_index);
+    if (ret < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "get psu present status error, ret: %d, psu_index: %u\n", ret, psu_index);
+        return ret;
+    }
+    if (ret == PSU_STATUS_ABSENT) {
+        return (ssize_t)snprintf(buf, count, "%d\n", PSU_STATUS_ABSENT);
+    }
+
+    /* get psu alert and power status from cpld */
+    output_key = DFD_CFG_KEY(DFD_CFG_ITEM_PSU_STATUS, psu_index, DFD_PSU_OUTPUT_STATUS);
+    alert_key = DFD_CFG_KEY(DFD_CFG_ITEM_PSU_STATUS, psu_index, DFD_PSU_ALERT_STATUS);
+    ret = dfd_info_get_int(output_key, &output_status, NULL);
+    if (ret < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "get psu output_key error, ret: %d, psu_index: %u\n",
+            ret, psu_index);
+        return ret;
+    }
+    ret = dfd_info_get_int(alert_key, &alert_status, NULL);
+    if (ret < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "get psu alert_key error, ret: %d, psu_index: %u\n",
+            ret, psu_index);
+        return ret;
+    }
+    DFD_PSU_DEBUG(DBG_VERBOSE, "get psu %u alert: %u, output:  %u.\n", psu_index, alert_status, output_status);
+    /* if cpld status not ok */
+    if (!alert_status || !output_status) {
+    /* jduge psu status from psu pmbus 0x79 */
+        ret = dfd_get_psu_pmbus_status(psu_index, buf, count);
+        if (ret < 0) {
+            DFD_PSU_DEBUG(DBG_ERROR, "get psu pmbus status error, ret: %d, psu_index: %u\n", ret, psu_index);
+            return ret;
+        } else {
+            ret = kstrtoint(buf, 0, &status_word);
+            if (ret) {
+                DFD_PSU_DEBUG(DBG_ERROR, "invalid value: %s \n", buf);
+                return -EINVAL;
+            }
+            DFD_PSU_DEBUG(DBG_VERBOSE, "get psu %u statu reg value: %u.\n", psu_index, status_word);
+            status = (status_word & PSU_PMBUS_POWER_GOOD) ? PSU_STATUS_FAIL : PSU_STATUS_WARN;
+        }
+    } else {
+        status = PSU_STATUS_PRESENT;
+    }
+
+    mem_clear(buf,  count);
+    return (ssize_t)snprintf(buf, count, "%d\n", status);
+}
+
+/**
+ * dfd_get_psu_status_pmbus_str - Gets the value on the pmbus register of the power supply
+ * @index: Number of the power supply, starting from 1
+ * return: Success: Length of the status string
+ *       : Negative value - Read failed
+ */
+ssize_t dfd_get_psu_status_pmbus_str(unsigned int psu_index, char *buf, size_t count)
+{
+    uint64_t key;
+    int ret;
+    int pmbus_data;
+
+    if (buf == NULL) {
+        DFD_PSU_DEBUG(DBG_ERROR, "buf is NULL, psu index: %u\n", psu_index);
+        return -EINVAL;
+    }
+    if (count <= 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "buf size error, count: %lu, psu index: %u\n", count, psu_index);
+        return -EINVAL;
+    }
+
+    /* Gets the status from the pmbus register of the power supply */
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_PSU_PMBUS_REG, psu_index, PSU_SENSOR_NONE);
+    ret = dfd_info_get_int(key, &pmbus_data, NULL);
+    if (ret < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "get psu%u pmbus status info failed, key_name: %s, ret: %d\n",
+            psu_index, key_to_name(DFD_CFG_ITEM_PSU_PMBUS_REG), ret);
+        return ret;
+    }
+
+    DFD_PSU_DEBUG(DBG_VERBOSE, "psu_index: %u, pmbus_data = 0x%x \n", psu_index, pmbus_data);
+
+    mem_clear(buf, count);
+    return (ssize_t)snprintf(buf, count, "%d\n", pmbus_data);
+}
+
+/**
+ * dfd_get_psu_fan_speed_cal_str - Obtain the formula for calculating the speed of the power supply
+ * @index: Number of the power supply, starting from 1
+ * return: Success: Length of the status string
+ *       : Negative value - Read failed
+ */
+static int dfd_get_psu_fan_speed_cal_str(int power_type, char *psu_buf, int buf_len)
+{
+    uint64_t key;
+    char *speed_cal;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FAN_SPEED_CAL, power_type, 0);
+    speed_cal = dfd_ko_cfg_get_item(key);
+    if (speed_cal == NULL) {
+        DFD_PSU_DEBUG(DBG_ERROR, "config error, get psu speed cal error, key_name: %s\n",
+            key_to_name(DFD_CFG_ITEM_FAN_SPEED_CAL));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+    mem_clear(psu_buf, buf_len);
+    strlcpy(psu_buf, speed_cal, buf_len);
+    DFD_PSU_DEBUG(DBG_VERBOSE, "psu speed cal match ok, speed_cal: %s\n", psu_buf);
+    return DFD_RV_OK;
+}
+
+/**
+ * dfd_get_psu_out_status_str - Obtain the output power status
+ * @index: Number of the power supply, starting from 1
+ * return: Success: Length of the status string
+ *       : Negative value - Read failed
+ */
+ssize_t dfd_get_psu_out_status_str(unsigned int psu_index, char *buf, size_t count)
+{
+    uint64_t key;
+    int ret;
+    int pmbus_data;
+    int output_status;
+
+    if (buf == NULL) {
+        DFD_PSU_DEBUG(DBG_ERROR, "buf is NULL, psu index: %u\n", psu_index);
+        return -EINVAL;
+    }
+    if (count <= 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "buf size error, count: %lu, psu index: %u\n", count, psu_index);
+        return -EINVAL;
+    }
+
+    /* Gets the status from the pmbus register of the power supply */
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_PSU_PMBUS_REG, psu_index, PSU_OUT_STATUS);
+    ret = dfd_info_get_int(key, &pmbus_data, NULL);
+    if (ret < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "get psu%u pmbus status info failed, key_name: %s, ret: %d\n",
+            psu_index, key_to_name(DFD_CFG_ITEM_PSU_PMBUS_REG), ret);
+        return ret;
+    }
+
+    output_status = DFD_PSU_OK;
+    if (pmbus_data & (PSU_STATUS_WORD_INPUT | PSU_STATUS_WORD_OFF | PSU_STATUS_WORD_POWER_GOOD)) {
+        /* The judgment logic of no power is consistent with that of Baidu sysfs */
+        output_status = DFD_PSU_NOT_OK;
+    }
+    DFD_PSU_DEBUG(DBG_VERBOSE, "psu_index: %u, pmbus_data = 0x%x \n", psu_index, pmbus_data);
+
+    mem_clear(buf, count);
+    return (ssize_t)snprintf(buf, count, "%d\n", output_status);
+}
+
+/**
+ * dfd_psu_product_name_decode - Power name conversion
+ * @power_type: Power supply type
+ * @psu_buf: Power name buffer
+ * @buf_len: psu_buf length
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+static int dfd_psu_product_name_decode(int power_type, char *psu_buf, int buf_len)
+{
+    uint64_t key;
+    char *p_decode_name;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_DECODE_POWER_NAME, power_type, 0);
+    p_decode_name = dfd_ko_cfg_get_item(key);
+    if (p_decode_name == NULL) {
+        DFD_PSU_DEBUG(DBG_ERROR, "config error, get psu decode name error, key_name: %s\n",
+            key_to_name(DFD_CFG_ITEM_DECODE_POWER_NAME));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+    mem_clear(psu_buf, buf_len);
+    strlcpy(psu_buf, p_decode_name, buf_len);
+    DFD_PSU_DEBUG(DBG_VERBOSE, "psu name match ok, display psu name: %s\n", psu_buf);
+    return DFD_RV_OK;
+}
+
+/**
+ * dfd_psu_fan_direction_decode - Power duct type conversion
+ * @power_type: Power supply type
+ * @psu_buf: Power name buffer
+ * @buf_len: psu_buf length
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+static int dfd_psu_fan_direction_decode(int power_type, char *psu_buf, int buf_len)
+{
+    uint64_t key;
+    char *p_decode_direction;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_DECODE_POWER_FAN_DIR, power_type, 0);
+    p_decode_direction = dfd_ko_cfg_get_item(key);
+    if (p_decode_direction == NULL) {
+        DFD_PSU_DEBUG(DBG_ERROR, "config error, get psu decode direction error, key_name: %s\n",
+            key_to_name(DFD_CFG_ITEM_DECODE_POWER_FAN_DIR));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+    mem_clear(psu_buf, buf_len);
+    snprintf(psu_buf, buf_len, "%d", *p_decode_direction);
+    DFD_PSU_DEBUG(DBG_VERBOSE, "psu%u fan direction match ok, display psu direction: %s\n",
+        power_type, psu_buf);
+    return DFD_RV_OK;
+}
+
+/**
+ * dfd_psu_max_output_power - Rated power of supply
+ * @power_type: Power supply type
+ * @psu_buf: Data buffer
+ * @buf_len: psu_buf length
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+static int dfd_psu_max_output_power(int power_type, char *psu_buf, int buf_len)
+{
+    uint64_t key;
+    int value;
+    int *p_power_max_output_power;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_POWER_RSUPPLY, power_type, 0);
+    p_power_max_output_power = dfd_ko_cfg_get_item(key);
+    if (p_power_max_output_power == NULL) {
+        DFD_PSU_DEBUG(DBG_ERROR, "config error, get psu input type error, key_name: %s\n",
+            key_to_name(DFD_CFG_ITEM_POWER_RSUPPLY));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+    value = *p_power_max_output_power;
+    mem_clear(psu_buf, buf_len);
+    snprintf(psu_buf, buf_len, "%d", value);
+    DFD_PSU_DEBUG(DBG_VERBOSE, "psu name %s match max output power %d\n", psu_buf, value);
+    return DFD_RV_OK;
+}
+
+static int dfd_get_psu_fru_pmbus(unsigned int psu_index, uint8_t cmd, char *buf, size_t buf_len)
+{
+    uint64_t key;
+    int rv, len;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_PSU_FRU_PMBUS, psu_index, cmd);
+    DFD_PSU_DEBUG(DBG_VERBOSE, "psu index: %d, cmd: %d, key_name: %s\n",
+        psu_index, cmd, key_to_name(DFD_CFG_ITEM_PSU_FRU_PMBUS));
+
+    rv = dfd_info_get_sensor(key, buf, buf_len, NULL);
+    if (rv < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "get psu fru info by pmbus failed, key_name: %s, rv: %d\n",
+            key_to_name(DFD_CFG_ITEM_PSU_FRU_PMBUS), rv);
+    } else {
+        len = strlen(buf);
+        if (len > 0 && buf[len - 1] == '\n') {
+            buf[len - 1] = '\0';
+        }
+        DFD_PSU_DEBUG(DBG_VERBOSE, "get psu fru info by pmbus success, value: %s\n", buf);
+    }
+    return rv;
+}
+
+static int dfd_get_psu_type(unsigned int psu_index, dfd_i2c_dev_t *i2c_dev, int *power_type,
+               const char *sysfs_name, int fru_mode)
+{
+    int rv;
+    char psu_buf[PSU_SIZE];
+
+    mem_clear(psu_buf, sizeof(psu_buf));
+    if (fru_mode == PSU_FRU_MODE_PMBUS) {
+        rv = dfd_get_psu_fru_pmbus(psu_index, DFD_DEV_INFO_TYPE_PART_NUMBER, psu_buf, PSU_SIZE);
+    } else {
+        rv = dfd_get_fru_data(i2c_dev->bus, i2c_dev->addr, DFD_DEV_INFO_TYPE_PART_NUMBER, psu_buf,
+                PSU_SIZE, sysfs_name);
+    }
+
+    if (rv < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "get psu type from eeprom read failed, rv: %d\n", rv);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    DFD_PSU_DEBUG(DBG_VERBOSE, "%s\n", psu_buf);
+    dfd_psu_del_no_print_string(psu_buf);
+
+    DFD_PSU_DEBUG(DBG_VERBOSE, "dfd_psu_product_name_decode get psu name %s\n", psu_buf);
+    rv = dfd_ko_cfg_get_power_type_by_name((char *)psu_buf, power_type);
+    if (rv < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "get power type by name[%s] fail, rv: %d\n", psu_buf, rv);
+        return -DFD_RV_NO_NODE;
+    }
+
+    DFD_PSU_DEBUG(DBG_VERBOSE, "get psu%u return power_type[0x%x]\n", psu_index, *power_type);
+    return DFD_RV_OK;
+}
+
+/**
+ * dfd_get_psu_info - Get Power Information
+ * @index: Number of the power supply, starting from 1
+ * @cmd: Power supply information Type, power supply name :2, power supply serial number :3, power supply hardware version :5
+ * @buf: Receive buf
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_psu_info(unsigned int psu_index, uint8_t cmd, char *buf, size_t count)
+{
+    uint64_t key;
+    int rv;
+    char psu_buf[PSU_SIZE];
+    dfd_i2c_dev_t *i2c_dev;
+    int power_type;
+    int fru_mode;
+    const char *sysfs_name;
+
+    if (buf == NULL) {
+        DFD_PSU_DEBUG(DBG_ERROR, "buf is NULL, psu index: %u, cmd: 0x%x\n", psu_index, cmd);
+        return -EINVAL;
+    }
+    if (count <= 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "buf size error, count: %lu, psu index: %u, cmd: 0x%x\n",
+            count, psu_index, cmd);
+        return -EINVAL;
+    }
+
+    fru_mode = dfd_get_psu_fru_mode();
+    mem_clear(buf, count);
+    mem_clear(psu_buf, PSU_SIZE);
+    if (fru_mode == PSU_FRU_MODE_E2) {
+        key = DFD_CFG_KEY(DFD_CFG_ITEM_OTHER_I2C_DEV, WB_MAIN_DEV_PSU, psu_index);
+        i2c_dev = dfd_ko_cfg_get_item(key);
+        if (i2c_dev == NULL) {
+            DFD_PSU_DEBUG(DBG_ERROR, "psu i2c dev config error, key_name: %s\n",
+                key_to_name(DFD_CFG_ITEM_OTHER_I2C_DEV));
+            return -DFD_RV_DEV_NOTSUPPORT;
+        }
+        sysfs_name = dfd_get_psu_sysfs_name();
+    }
+
+    /* Power E2 product name conversion */
+    if (cmd == DFD_DEV_INFO_TYPE_PART_NAME) {
+        rv = dfd_get_psu_type(psu_index, i2c_dev, &power_type, sysfs_name, fru_mode);
+        if (rv < 0) {
+            DFD_PSU_DEBUG(DBG_ERROR, "psu get type error, rv: %d\n", rv);
+            return -EIO;
+        }
+        rv = dfd_psu_product_name_decode(power_type, psu_buf, PSU_SIZE);
+        if (rv < 0) {
+            DFD_PSU_DEBUG(DBG_ERROR, "psu name decode error, power_type[0x%x] rv: %d\n",
+                power_type, rv);
+            return -EIO;
+        }
+    } else if (cmd == DFD_DEV_INFO_TYPE_FAN_DIRECTION) {
+        rv = dfd_get_psu_type(psu_index, i2c_dev, &power_type, sysfs_name, fru_mode);
+        if (rv < 0) {
+            DFD_PSU_DEBUG(DBG_ERROR, "psu get type error, rv: %d\n", rv);
+            return -EIO;
+        }
+        rv = dfd_psu_fan_direction_decode(power_type, psu_buf, PSU_SIZE);
+        if (rv < 0) {
+            DFD_PSU_DEBUG(DBG_ERROR, "psu input type decode error, power_type[0x%x] rv: %d\n",
+                power_type, rv);
+            return -EIO;
+        }
+    } else if (cmd == DFD_DEV_INFO_TYPE_MAX_OUTPUT_POWRER) {
+        rv = dfd_get_psu_type(psu_index, i2c_dev, &power_type, sysfs_name, fru_mode);
+        if (rv < 0) {
+            DFD_PSU_DEBUG(DBG_ERROR, "psu get type error, rv:%d\n", rv);
+            return -EIO;
+        }
+        rv = dfd_psu_max_output_power(power_type, psu_buf, PSU_SIZE);
+        if (rv < 0) {
+            DFD_PSU_DEBUG(DBG_ERROR, "psu max ouput power error, power_type[0x%x] rv: %d\n",
+                power_type, rv);
+            return -EIO;
+        }
+    } else if (cmd == DFD_DEV_INFO_TYPE_SPEED_CAL) {
+        rv = dfd_get_psu_type(psu_index, i2c_dev, &power_type, sysfs_name, fru_mode);
+        if (rv < 0) {
+            DFD_PSU_DEBUG(DBG_ERROR, "psu get type error, rv:%d\n", rv);
+            return -EIO;
+        }
+        rv = dfd_get_psu_fan_speed_cal_str(power_type, psu_buf, PSU_SIZE);
+        if (rv < 0) {
+            DFD_PSU_DEBUG(DBG_ERROR, "psu fan speed cal error, power_type[0x%x] rv: %d\n",
+                power_type, rv);
+            return -EIO;
+        }
+    } else {
+        if (fru_mode == PSU_FRU_MODE_PMBUS) {
+            rv = dfd_get_psu_fru_pmbus(psu_index, cmd, psu_buf, PSU_SIZE);
+        } else {
+            rv = dfd_get_fru_data(i2c_dev->bus, i2c_dev->addr, cmd, psu_buf, PSU_SIZE, sysfs_name);
+        }
+        if (rv < 0) {
+            DFD_PSU_DEBUG(DBG_ERROR, "psu eeprom read failed, rv: %d\n", rv);
+            return -EIO;
+        }
+    }
+
+    snprintf(buf, count, "%s\n", psu_buf);
+    return strlen(buf);
+}
+
+/**
+ * dfd_get_psu_input_type - Obtain the power input type
+ * @index: Number of the power supply, starting from 1
+ * @buf: Receive buf
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_psu_input_type(unsigned int psu_index, char *buf, size_t count)
+{
+    uint64_t key;
+    int ret;
+    int data;
+
+    if (buf == NULL) {
+        DFD_PSU_DEBUG(DBG_ERROR, "buf is NULL, psu index: %u\n", psu_index);
+        return -EINVAL;
+    }
+    if (count <= 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "buf size error, count: %lu, psu index: %u\n", count, psu_index);
+        return -EINVAL;
+    }
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_PSU_PMBUS_REG, psu_index, PSU_IN_TYPE);
+    ret = dfd_info_get_int(key, &data, NULL);
+    if (ret < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "get psu%u pmbus status info failed, key_name: %s, ret: %d\n",
+            psu_index, key_to_name(DFD_CFG_ITEM_PSU_PMBUS_REG), ret);
+        return ret;
+    }
+
+    DFD_PSU_DEBUG(DBG_VERBOSE, "psu_index: %u, pmbus_data = 0x%x \n", psu_index, data);
+
+    if (data == DFD_PSU_PMBUS_TYPE_AC) {
+        return snprintf(buf, count, "%d\n", DFD_PSU_SYSFS_TYPE_AC);
+    } else if (data == DFD_PSU_PMBUS_TYPE_DC) {
+        return snprintf(buf, count, "%d\n", DFD_PSU_SYSFS_TYPE_DC);
+    } else {
+        DFD_PSU_DEBUG(DBG_WARN, "get psu%u input type data[%u] unknow, ret: %d\n",
+                psu_index, data, ret);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DFD_PSU_DEBUG(DBG_ERROR, "get psu%u pmbus type data[%u] unknow, ret: %d\n",
+        psu_index, data, ret);
+    return -EIO;
+}
+
+/**
+ * dfd_get_psu_in_status_str - Obtain the input power status
+ * @index: Number of the power supply, starting from 1
+ * return: Success: Length of the status string
+ *       : Negative value - Read failed
+ */
+ssize_t dfd_get_psu_in_status_str(unsigned int psu_index, char *buf, size_t count)
+{
+    uint64_t key;
+    int ret;
+    int pmbus_data;
+    int input_status;
+
+    if (buf == NULL) {
+        DFD_PSU_DEBUG(DBG_ERROR, "buf is NULL, psu index: %u\n", psu_index);
+        return -EINVAL;
+    }
+    if (count <= 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "buf size error, count: %lu, psu index: %u\n", count, psu_index);
+        return -EINVAL;
+    }
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_PSU_PMBUS_REG, psu_index, PSU_IN_STATUS);
+    ret = dfd_info_get_int(key, &pmbus_data, NULL);
+    if (ret < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "get psu%u pmbus status info failed, key_name: %s, ret: %d\n",
+            psu_index, key_to_name(DFD_CFG_ITEM_PSU_PMBUS_REG), ret);
+        return ret;
+    }
+
+    input_status = DFD_PSU_OK;
+    if (pmbus_data & PSU_STATUS_WORD_INPUT) {
+        /* no power judgment logic, according to the opinion only bit13 judgment */
+        DFD_PSU_DEBUG(DBG_VERBOSE, "psu_index: %u, no power, pmbus_data = 0x%x \n", psu_index, pmbus_data);
+        input_status = DFD_PSU_NOT_OK;
+    }
+    DFD_PSU_DEBUG(DBG_VERBOSE, "psu_index: %u, pmbus_data = 0x%x \n", psu_index, pmbus_data);
+
+    mem_clear(buf, count);
+    return (ssize_t)snprintf(buf, count, "%d\n", input_status);
+}
+
+ssize_t dfd_get_psu_alarm_status(unsigned int psu_index, char *buf, size_t count)
+{
+    uint64_t key;
+    int ret;
+    int pmbus_data;
+    int alarm;
+
+    if (buf == NULL) {
+        DFD_PSU_DEBUG(DBG_ERROR, "buf is NULL, psu index: %u\n", psu_index);
+        return -EINVAL;
+    }
+    if (count <= 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "buf size error, count: %lu, psu index: %u\n", count, psu_index);
+        return -EINVAL;
+    }
+
+    /* PMBUS STATUS WORD (0x79) */
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_PSU_PMBUS_REG, psu_index, PSU_OUT_STATUS);
+    ret = dfd_info_get_int(key, &pmbus_data, NULL);
+    if (ret < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "get psu%u pmbus status info failed, key_name: %s, ret: %d\n",
+            psu_index, key_to_name(DFD_CFG_ITEM_PSU_PMBUS_REG), ret);
+        return ret;
+    }
+
+    alarm = 0;
+    if (pmbus_data & PSU_STATUS_WORD_TEMPERATURE) {
+        DFD_PSU_DEBUG(DBG_VERBOSE, "psu%d PSU_TERMAL_ERROR, pmbus_data = 0x%x \n", psu_index, pmbus_data);
+        alarm |= PSU_TERMAL_ERROR;
+    }
+
+    if (pmbus_data & PSU_STATUS_WORD_FANS) {
+        DFD_PSU_DEBUG(DBG_VERBOSE, "psu%d PSU_FAN_ERROR, pmbus_data = 0x%x \n", psu_index, pmbus_data);
+        alarm |= PSU_FAN_ERROR;
+    }
+
+    if (pmbus_data & PSU_VOLTAGE_ERR_OFFSET) {
+        DFD_PSU_DEBUG(DBG_VERBOSE, "psu%d PSU_VOL_ERROR, pmbus_data = 0x%x \n", psu_index, pmbus_data);
+        alarm |= PSU_VOL_ERROR;
+    }
+    DFD_PSU_DEBUG(DBG_VERBOSE, "psu_index: %u, pmbus_data = 0x%x \n", psu_index, pmbus_data);
+
+    mem_clear(buf, count);
+    return (ssize_t)snprintf(buf, count, "%d\n", alarm);
+}
+
+/**
+ * dfd_get_psu_fan_ratio_str - Gets the target fan rotation rate
+ * @index: Number of the power supply, starting from 1
+ * return: Success: Length of the status string
+ *       : Negative value - Read failed
+ */
+ssize_t dfd_get_psu_fan_ratio_str(unsigned int psu_index, char *buf, size_t count)
+{
+    uint64_t key;
+    int ret;
+    int pmbus_data;
+
+    if (buf == NULL) {
+        DFD_PSU_DEBUG(DBG_ERROR, "buf is NULL, psu index: %u\n", psu_index);
+        return -EINVAL;
+    }
+    if (count <= 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "buf size error, count: %lu, psu index: %u\n", count, psu_index);
+        return -EINVAL;
+    }
+
+    /* Gets the status from the pmbus register of the power supply */
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_PSU_PMBUS_REG, psu_index, PSU_FAN_RATIO);
+    ret = dfd_info_get_int(key, &pmbus_data, NULL);
+    if (ret < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "get psu%u pmbus fan ratio info failed, key_name: %s, ret: %d\n",
+            psu_index, key_to_name(DFD_CFG_ITEM_PSU_PMBUS_REG), ret);
+        return ret;
+    }
+
+    mem_clear(buf, count);
+    return (ssize_t)snprintf(buf, count, "%d\n", pmbus_data);
+}
+
+ssize_t dfd_get_psu_threshold_str(unsigned int psu_index, unsigned int type, char *buf, size_t count)
+{
+    uint64_t key;
+    int ret;
+
+    if (buf == NULL) {
+        DFD_PSU_DEBUG(DBG_ERROR, "buf is NULL, psu index: %u\n", psu_index);
+        return -EINVAL;
+    }
+    if (count <= 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "buf size error, count: %lu, psu index: %u\n", count, psu_index);
+        return -EINVAL;
+    }
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_HWMON_PSU, psu_index, type);
+    ret = dfd_info_get_sensor(key, buf, count, NULL);
+    if (ret < 0) {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "get psu sensor info error, key_name: %s, ret: %d\n",
+            key_to_name(DFD_CFG_ITEM_HWMON_PSU), ret);
+    } else {
+        DFD_SENSOR_DEBUG(DBG_VERBOSE, "get psu sensor info success, value: %s\n", buf);
+    }
+    return ret;
+}
+
+ssize_t dfd_get_psu_blackbox(unsigned int psu_index, char *buf, size_t count)
+{
+    uint64_t key;
+    ssize_t rd_len;
+    char *blackbox_path;
+
+    if (buf == NULL) {
+        DFD_PSU_DEBUG(DBG_ERROR, "params error.psu_index: %u.",psu_index);
+        return -EINVAL;
+    }
+    if (count <= 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "buf size error, count: %lu, psu index: %u\n",
+            count, psu_index);
+        return -EINVAL;
+    }
+
+    /* Obtain the blackbox_info path*/
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_PSU_BLACKBOX_INFO, psu_index, 0);
+    blackbox_path = dfd_ko_cfg_get_item(key);
+    if (blackbox_path == NULL) {
+        DFD_PSU_DEBUG(DBG_ERROR, "get psu%u blackbox_info path error, key_name: %s\n",
+            psu_index, key_to_name(DFD_CFG_ITEM_PSU_BLACKBOX_INFO));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DFD_PSU_DEBUG(DBG_VERBOSE, "psu_index: %u, blackbox_info path: %s\n", psu_index, blackbox_path);
+
+    mem_clear(buf,  count);
+    rd_len = dfd_ko_read_file(blackbox_path, 0, buf, count);
+    if (rd_len < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "read psu%u blackbox info failed, blackbox_info path: %s, ret: %ld\n",
+            psu_index, blackbox_path, rd_len);
+    } else {
+        DFD_PSU_DEBUG(DBG_VERBOSE, "read psu%u blackbox info success, blackbox_info path: %s, rd_len: %ld\n",
+            psu_index, blackbox_path, rd_len);
+    }
+
+    return rd_len;
+}
+
+ssize_t dfd_get_psu_pmbus(unsigned int psu_index, char *buf, size_t count)
+{
+    uint64_t key;
+    ssize_t rd_len;
+    char *pmbus_info_path;
+
+    if (buf == NULL) {
+        DFD_PSU_DEBUG(DBG_ERROR, "params error.psu_index: %u.",psu_index);
+        return -EINVAL;
+    }
+    if (count <= 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "buf size error, count: %lu, psu index: %u\n",
+            count, psu_index);
+        return -EINVAL;
+    }
+
+    /* Obtain the pmbus_info path*/
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_PSU_PMBUS_INFO, psu_index, 0);
+    pmbus_info_path = dfd_ko_cfg_get_item(key);
+    if (pmbus_info_path == NULL) {
+        DFD_PSU_DEBUG(DBG_ERROR, "get psu%u pmbus_info path error, key_name: %s\n",
+            psu_index, key_to_name(DFD_CFG_ITEM_PSU_PMBUS_INFO));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DFD_PSU_DEBUG(DBG_VERBOSE, "psu_index: %u, pmbus_info path: %s\n", psu_index, pmbus_info_path);
+
+    mem_clear(buf,  count);
+    rd_len = dfd_ko_read_file(pmbus_info_path, 0, buf, count);
+    if (rd_len < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "read psu%u pmbus info failed, pmbus_info path: %s, ret: %ld\n",
+            psu_index, pmbus_info_path, rd_len);
+    } else {
+        DFD_PSU_DEBUG(DBG_VERBOSE, "read psu%u pmbus info success, pmbus_info path: %s, rd_len: %ld\n",
+            psu_index, pmbus_info_path, rd_len);
+    }
+
+    return rd_len;
+}
+
+int dfd_clear_psu_blackbox(unsigned int psu_index, uint8_t value)
+{
+    uint64_t key;
+    int ret;
+    char *clear_blackbox_info_path;
+    uint8_t wr_buf[INFO_INT_MAX_LEN];
+
+    /* Obtain the clear_blackbox path*/
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_PSU_CLEAR_BLACKBOX, psu_index, 0);
+    clear_blackbox_info_path = dfd_ko_cfg_get_item(key);
+    if (clear_blackbox_info_path == NULL) {
+        DFD_PSU_DEBUG(DBG_ERROR, "get psu%u clear blackbox path error, key_name: %s\n",
+            psu_index, key_to_name(DFD_CFG_ITEM_PSU_CLEAR_BLACKBOX));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DFD_PSU_DEBUG(DBG_VERBOSE, "psu_index: %u, clear blackbox path: %s, write value: %u\n",
+        psu_index, clear_blackbox_info_path, value);
+
+    mem_clear(wr_buf, sizeof(wr_buf));
+    snprintf(wr_buf, sizeof(wr_buf), "%u", value);
+    ret = dfd_ko_write_file(clear_blackbox_info_path, 0, wr_buf, strlen(wr_buf));
+    if (ret < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "clear psu%u blackbox info failed, ret: %d\n", psu_index, ret);
+        return ret;
+    }
+
+    DFD_PSU_DEBUG(DBG_VERBOSE, "psu_index: %u, clear blackbox info success\n", psu_index);
+    return DFD_RV_OK;
+}
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_sensors_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_sensors_driver.c
new file mode 100644
index 000000000000..c7342de6e3e2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_sensors_driver.c
@@ -0,0 +1,345 @@
+/*
+ * An wb_sensors_driver driver for snesors devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/slab.h>
+
+#include "wb_module.h"
+#include "dfd_cfg.h"
+#include "dfd_cfg_adapter.h"
+#include "dfd_cfg_info.h"
+#include "dfd_frueeprom.h"
+#include "dfd_cfg_file.h"
+
+#define DFD_GET_TEMP_SENSOR_KEY1(dev_index, temp_index) \
+    (((dev_index & 0xff) << 8) | (temp_index & 0xff))
+#define DFD_GET_TEMP_SENSOR_KEY2(main_dev_id, temp_type) \
+        (((main_dev_id & 0x0f) << 4) | (temp_type & 0x0f))
+#define DFD_FORMAT_STR_MAX_LEN          (32)
+
+int g_dfd_sensor_dbg_level = 0;
+module_param(g_dfd_sensor_dbg_level, int, S_IRUGO | S_IWUSR);
+
+static int dfd_deal_hwmon_buf(uint8_t *buf, int buf_len, uint8_t *buf_new, int *buf_len_new,
+               info_ctrl_t *info_ctrl, int coefficient, int addend)
+{
+    int i, tmp_len;
+    int exp, decimal, divisor;
+    int org_value, tmp_value;
+    int div_result, div_mod;
+    char fmt_str[DFD_FORMAT_STR_MAX_LEN];
+
+    exp = info_ctrl->int_cons;         /* Numerical conversion index */
+    decimal = info_ctrl->bit_offset;   /* Decimal point retention number */
+
+    /* No conversion is required, just copy the value */
+    if ((exp <= 0) && (coefficient == 1) && (addend == 0)) {
+        DBG_DEBUG(DBG_VERBOSE, "exponent %d, coefficient: %d, addend: %d, don't need transform, buf_len: %d, buf_len_new: %d\n",
+            exp, coefficient, addend, buf_len, *buf_len_new);
+        snprintf(buf_new, *buf_len_new, "%s", buf);
+        *buf_len_new = strlen(buf_new);
+        return DFD_RV_OK;
+    }
+
+    divisor = 1;
+    for (i = 0; i < exp; i++) {
+        divisor *= 10;
+    }
+    org_value = simple_strtol(buf, NULL, 10);
+    DBG_DEBUG(DBG_VERBOSE, "original value: %d, exp: %d, divisor: %d, decimal: %d, coefficient: %d, addend: %d\n",
+        org_value, exp, divisor, decimal, coefficient, addend);
+
+    org_value = (org_value + addend) * coefficient;
+    if (org_value < 0) {
+        tmp_value = 0 - org_value;
+    } else {
+        tmp_value = org_value;
+    }
+    div_result = tmp_value / divisor;
+    div_mod = tmp_value % divisor;
+    DBG_DEBUG(DBG_VERBOSE, "tmp_value: %d, divisor: %d, div_result: %d, div_mod: %d\n",
+        tmp_value, divisor, div_result, div_mod);
+    /* don't need to keep the decimal, just round it */
+    if (decimal == 0) {
+        snprintf(buf_new, *buf_len_new, "%d\n", div_result);
+        *buf_len_new = strlen(buf_new);
+        return DFD_RV_OK;
+    }
+    mem_clear(fmt_str, sizeof(fmt_str));
+    if (org_value < 0) {
+        snprintf(fmt_str, sizeof(fmt_str), "-%%d.%%0%dd\n",exp);
+    } else {
+        snprintf(fmt_str, sizeof(fmt_str), "%%d.%%0%dd\n",exp);
+    }
+    DBG_DEBUG(DBG_VERBOSE, "format string: %s",fmt_str);
+    snprintf(buf_new, *buf_len_new, fmt_str, div_result, div_mod);
+    *buf_len_new = strlen(buf_new);
+    tmp_len = *buf_len_new;
+    /* Keep decimal places only when the number of decimal places is reduced */
+    if (decimal > 0) {
+        for (i = 0; i < *buf_len_new; i++) {
+            if (buf_new[i] == '.') {
+                if (i + decimal + 2 <= *buf_len_new) {
+                    buf_new[i + decimal + 1 ] = '\n';
+                    buf_new[i + decimal + 2 ] = '\0';
+                    *buf_len_new = strlen(buf_new);
+                    DBG_DEBUG(DBG_VERBOSE, "deal decimal[%d] ok, str len:%d, value:%s\n",
+                        decimal, *buf_len_new, buf_new);
+                }
+                break;
+            }
+        }
+        if (tmp_len == *buf_len_new) {
+            DBG_DEBUG(DBG_WARN, "deal decimal[%d] failed, use original value:%s\n", decimal,
+                buf_new);
+        }
+    }
+    return DFD_RV_OK;
+}
+
+static int dfd_get_sensor_info(uint8_t main_dev_id, uint8_t dev_index, uint8_t sensor_type,
+               uint8_t sensor_index, uint8_t sensor_attr, char *buf, size_t count)
+{
+    uint64_t key;
+    uint16_t key_index1;
+    uint8_t key_index2;
+    int rv;
+    info_hwmon_buf_f pfunc;
+
+    key_index1 = DFD_GET_TEMP_SENSOR_KEY1(dev_index, sensor_index);
+    key_index2 = DFD_GET_TEMP_SENSOR_KEY2(main_dev_id, sensor_attr);
+    if (sensor_type == WB_MINOR_DEV_TEMP) {
+        key = DFD_CFG_KEY(DFD_CFG_ITEM_HWMON_TEMP, key_index1, key_index2);
+    } else if (sensor_type == WB_MINOR_DEV_IN) {
+        key = DFD_CFG_KEY(DFD_CFG_ITEM_HWMON_IN, key_index1, key_index2);
+    } else if (sensor_type == WB_MINOR_DEV_CURR) {
+        key = DFD_CFG_KEY(DFD_CFG_ITEM_HWMON_CURR, key_index1, key_index2);
+    } else {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "Unknow sensor type: %u\n",sensor_type);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    DFD_SENSOR_DEBUG(DBG_VERBOSE, "main_dev_id: %u, dev_index: 0x%x, sensor_index: 0x%x, \
+        sensor_attr: 0x%x, key: 0x%08llx\n", main_dev_id, dev_index, sensor_index, sensor_attr, key);
+
+    pfunc = dfd_deal_hwmon_buf;
+    rv = dfd_info_get_sensor(key, buf, count, pfunc);
+    return rv;
+}
+
+/**
+ * dfd_get_temp_info - Get temperature information
+ * @main_dev_id: Motherboard :0 Power supply :2 subcard :5
+ * @dev_index: If no device index exists, the value is 0, and 1 indicates slot1/psu1
+ * @temp_index: Temperature index, starting at 1
+ * @temp_type: Read type,1:alias 2:type 3:max 4:max_hyst 5:min 6:input
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_temp_info(uint8_t main_dev_id, uint8_t dev_index, uint8_t temp_index,
+            uint8_t temp_attr, char *buf, size_t count)
+{
+    int rv;
+
+    if (buf == NULL) {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "param error, buf is NULL\n");
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    if (count <= 0) {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "buf size error, count: %lu\n", count);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    rv = dfd_get_sensor_info(main_dev_id, dev_index, WB_MINOR_DEV_TEMP, temp_index, temp_attr,
+             buf, count);
+    if (rv < 0) {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "get temp info error, rv: %d\n", rv);
+    } else {
+        DFD_SENSOR_DEBUG(DBG_VERBOSE, "get temp info success, value: %s\n", buf);
+    }
+    return rv;
+}
+
+/**
+ * dfd_get_voltage_info - Get voltage information
+ * @main_dev_id: Motherboard :0 Power supply :2 subcard :5
+ * @dev_index: If no device index exists, the value is 0, and 1 indicates slot1
+ * @in_index: Voltage index, starting at 1
+ * @in_type: Voltage type,1:alias 2:type 3:max 4:max_hyst 5:min 6:input
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_voltage_info(uint8_t main_dev_id, uint8_t dev_index, uint8_t in_index,
+            uint8_t in_attr, char *buf, size_t count)
+{
+    int rv;
+
+    if (buf == NULL) {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "param error buf is NULL.\n");
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "buf size error, count: %lu\n", count);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    rv = dfd_get_sensor_info(main_dev_id, dev_index, WB_MINOR_DEV_IN, in_index, in_attr, buf,
+             count);
+    if (rv < 0) {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "get voltage info error, rv: %d\n", rv);
+    } else {
+        DFD_SENSOR_DEBUG(DBG_VERBOSE, "get voltage info success, value: %s\n", buf);
+    }
+    return rv;
+}
+
+/**
+ * dfd_get_current_info - Get current information
+ * @main_dev_id: Motherboard :0 Power supply :2 subcard :5
+ * @dev_index: If no device index exists, the value is 0, and 1 indicates slot1
+ * @in_index: Current index, starting at 1
+ * @in_type: Current type,1:alias 2:type 3:max 4:max_hyst 5:min 6:input
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_current_info(uint8_t main_dev_id, uint8_t dev_index, uint8_t curr_index,
+            uint8_t curr_attr, char *buf, size_t count)
+{
+    int rv;
+
+    if (buf == NULL) {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "param error buf is NULL.\n");
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "buf size error, count: %lu\n", count);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    rv = dfd_get_sensor_info(main_dev_id, dev_index, WB_MINOR_DEV_CURR, curr_index, curr_attr,
+             buf, count);
+    if (rv < 0) {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "get current info error, rv: %d\n", rv);
+    } else {
+        DFD_SENSOR_DEBUG(DBG_VERBOSE, "get current info success, value: %s\n", buf);
+    }
+    return rv;
+}
+
+/**
+ * dfd_get_psu_sensor_info - Obtain PMBUS information about the power supply
+ * @psu_index: Power index, starting at 1
+ * @sensor_type: Type of the obtained pmbus information
+ * @buf: pmbus results are stored in buf
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_psu_sensor_info(uint8_t psu_index, uint8_t sensor_type, char *buf, size_t count)
+{
+    uint64_t key;
+    int rv;
+    info_hwmon_buf_f pfunc;
+
+    if (buf == NULL) {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "param error. buf is NULL.\n");
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "buf size error, count: %lu\n", count);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_HWMON_PSU, psu_index, sensor_type);
+    DFD_SENSOR_DEBUG(DBG_VERBOSE, "psu index: %d, sensor type: %d, key_name: %s,\n", psu_index,
+        sensor_type, key_to_name(DFD_CFG_ITEM_HWMON_PSU));
+    pfunc = dfd_deal_hwmon_buf;
+    rv = dfd_info_get_sensor(key, buf, count, pfunc);
+    if (rv < 0) {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "get psu sensor info error, key_name: %s, rv: %d\n", 
+            key_to_name(DFD_CFG_ITEM_HWMON_PSU), rv);
+    } else {
+        DFD_SENSOR_DEBUG(DBG_VERBOSE, "get psu sensor info success, value: %s\n", buf);
+    }
+    return rv;
+}
+
+/**
+ * dfd_get_main_board_monitor_flag - Get Monitor flag info
+ * @main_dev_id: Motherboard :0 Power supply :2 subcard :5
+ * @dev_index: If no device index exists, the value is 0, and 1 indicates slot1
+ * @sensor_type: Type of the obtained pmbus information
+ * @in_type: Voltage type,1:alias 2:type 3:max 4:max_hyst 5:min 6:input
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+int dfd_get_main_board_monitor_flag(uint8_t main_dev_id, uint8_t dev_index, uint8_t sensor_type,
+        uint8_t sensor_index, char *buf, size_t count)
+{
+    uint64_t key;
+    uint16_t key_index1;
+    uint8_t key_index2;
+    int rv, sensor_type_key, decode_key;
+    int data;
+    info_ctrl_t *info_ctrl;
+    int *p_decode_value;
+
+    key_index1 = DFD_GET_TEMP_SENSOR_KEY1(dev_index, sensor_index);
+    key_index2 = DFD_GET_TEMP_SENSOR_KEY2(main_dev_id, 0); /* 4bytes. currently low bytes is 0. */
+    if (sensor_type == WB_MINOR_DEV_TEMP) {
+        sensor_type_key = DFD_CFG_ITEM_HWMON_TEMP_MONITOR_FLAG;
+        decode_key = DFD_CFG_ITEM_HWMON_TEMP_MONITOR_DC;
+    } else if (sensor_type == WB_MINOR_DEV_IN) {
+        sensor_type_key = DFD_CFG_ITEM_HWMON_IN_MONITOR_FLAG;
+        decode_key = DFD_CFG_ITEM_HWMON_IN_MONITOR_FLAG_DC;
+    } else if (sensor_type == WB_MINOR_DEV_CURR) {
+        sensor_type_key = DFD_CFG_ITEM_HWMON_CURR_MONITOR_FLAG;
+        decode_key = DFD_CFG_ITEM_HWMON_CURR_MONITOR_FLAG_DC;
+    } else {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "Unknow sensor type: %u\n",sensor_type);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    key = DFD_CFG_KEY(sensor_type_key, key_index1, key_index2);
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_DEBUG(DBG_VERBOSE, "get info ctrl failed, key=0x%08llx\n", key);
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", WB_SENSOR_MONITOR_YES);
+    }
+
+    rv = dfd_info_get_int(key, &data, NULL);
+    if (rv < 0) {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "get monitor flag error, key_name: %s, rv: %d\n",
+            key_to_name(sensor_type_key), rv);
+        return rv;
+    }
+
+    key = DFD_CFG_KEY(decode_key, key_index1, data);
+    p_decode_value = dfd_ko_cfg_get_item(key);
+    if (p_decode_value == NULL) {
+        DFD_SENSOR_DEBUG(DBG_VERBOSE, "status needn't decode. value:0x%x\n", data);
+    } else {
+        DFD_SENSOR_DEBUG(DBG_VERBOSE, "ori_value:0x%x, decoded value:0x%x\n", data, *p_decode_value);
+        data = *p_decode_value;
+    }
+
+    DFD_SENSOR_DEBUG(DBG_VERBOSE, "main_dev_id: %u, dev_index: 0x%x, sensor_index: 0x%x, \
+        key_name: %s, data = %d\n", main_dev_id, dev_index, sensor_index, key_to_name(sensor_type_key), data);
+
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", data);
+}
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_sff_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_sff_driver.c
new file mode 100644
index 000000000000..1b55989ebde0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_sff_driver.c
@@ -0,0 +1,143 @@
+/*
+ * An wb_sff_driver driver for sff devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+
+#include "wb_module.h"
+#include "dfd_cfg.h"
+#include "dfd_cfg_info.h"
+#include "dfd_cfg_adapter.h"
+
+int g_dfd_sff_dbg_level = 0;
+module_param(g_dfd_sff_dbg_level, int, S_IRUGO | S_IWUSR);
+
+/**
+ * dfd_set_sff_cpld_info - Example Set the CPLD register status of the optical module
+ * @sff_index: Optical module number, starting from 1
+ * @cpld_reg_type: Optical module CPLD register type
+ * @value: Writes the value to the register
+ * return: Success :0
+ *       : Failed: A negative value is returned
+ */
+int dfd_set_sff_cpld_info(unsigned int sff_index, int cpld_reg_type, int value)
+{
+    uint64_t key;
+    int ret;
+
+    if ((value != 0) && (value != 1)) {
+        DFD_SFF_DEBUG(DBG_ERROR, "sff%u cpld reg type %d, can't set invalid value: %d\n",
+            sff_index, cpld_reg_type, value);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_SFF_CPLD_REG, sff_index, cpld_reg_type);
+    ret = dfd_info_set_int(key, value);
+    if (ret < 0) {
+        DFD_SFF_DEBUG(DBG_ERROR, "set sff%u cpld reg type %d error, key_name: %s, ret: %d.\n",
+            sff_index, cpld_reg_type, key_to_name(DFD_CFG_ITEM_SFF_CPLD_REG), ret);
+        return ret;
+    }
+
+    return DFD_RV_OK;
+}
+
+/**
+ * dfd_get_sff_cpld_info - Obtain the CPLD register status of the optical module
+ * @sff_index: Optical module number, starting from 1
+ * @cpld_reg_type: Optical module CPLD register type
+ * @buf: Optical module E2 receives information from buf
+ * @count: buf length
+ * return: Success: Returns the length of fill buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_sff_cpld_info(unsigned int sff_index, int cpld_reg_type, char *buf, size_t count)
+{
+    uint64_t key;
+    int ret, value;
+
+    if (buf == NULL) {
+        DFD_SFF_DEBUG(DBG_ERROR, "param error, buf is NULL. sff_index: %u, cpld_reg_type: %d\n",
+            sff_index, cpld_reg_type);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    if (count <= 0) {
+        DFD_SFF_DEBUG(DBG_ERROR, "buf size error, count: %lu, sff index: %u, cpld_reg_type: %d\n",
+            count, sff_index, cpld_reg_type);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    mem_clear(buf, count);
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_SFF_CPLD_REG, sff_index, cpld_reg_type);
+    ret = dfd_info_get_int(key, &value, NULL);
+    if (ret < 0) {
+        DFD_SFF_DEBUG(DBG_ERROR, "get sff%u cpld reg type %d error, key_name: %s, ret: %d\n",
+            sff_index, cpld_reg_type, key_to_name(DFD_CFG_ITEM_SFF_CPLD_REG), ret);
+        return ret;
+    }
+    return (ssize_t)snprintf(buf, count, "%d\n", value);
+}
+
+/**
+ * dfd_get_single_eth_optoe_type - get sff optoe type
+ * @sff_index: Optical module number, starting from 1
+ * @optoe_type: Optical module type
+ * return: Success: Returns the length of fill buf
+ *       : Failed: A negative value is returned
+ */
+int dfd_get_single_eth_optoe_type(unsigned int sff_index, int *optoe_type)
+{
+    uint64_t key;
+    int ret, value;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_SFF_OPTOE_TYPE, sff_index, 0);
+    ret = dfd_info_get_int(key, &value, NULL);
+    if (ret < 0) {
+        DFD_SFF_DEBUG(DBG_ERROR, "get sff optoe type error, key_name: %s, ret:%d.\n", 
+			key_to_name(DFD_CFG_ITEM_SFF_OPTOE_TYPE), ret);
+        return ret;
+    }
+
+    /* assic int to int */
+    *optoe_type = value - '0';
+    return ret;
+}
+
+/**
+ * dfd_set_single_eth_optoe_type - set sff optoe type
+ * @sff_index: Optical module number, starting from 1
+ * @optoe_type: Optical module type
+ * return: Success: Returns the length of fill buf
+ *       : Failed: A negative value is returned
+ */
+int dfd_set_single_eth_optoe_type(unsigned int sff_index, int optoe_type)
+{
+    uint64_t key;
+    int ret, value;
+
+    /* int to assic int */
+    value = optoe_type + '0';
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_SFF_OPTOE_TYPE, sff_index, 0);
+    ret = dfd_info_set_int(key, value);
+    if (ret < 0) {
+        DFD_SFF_DEBUG(DBG_ERROR, "set sff optoe type error, key_name: %s, ret:%d.\n", 
+			key_to_name(DFD_CFG_ITEM_SFF_OPTOE_TYPE), ret);
+        return ret;
+    }
+
+    return ret;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_slot_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_slot_driver.c
new file mode 100644
index 000000000000..5ba743f3c4d4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_slot_driver.c
@@ -0,0 +1,174 @@
+/*
+ * An wb_slot_driver driver for slot devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/slab.h>
+
+#include "wb_module.h"
+#include "dfd_cfg.h"
+#include "dfd_cfg_adapter.h"
+#include "dfd_cfg_info.h"
+#include "dfd_frueeprom.h"
+
+#define SLOT_SIZE                         (256)
+
+int g_dfd_slot_dbg_level = 0;
+module_param(g_dfd_slot_dbg_level, int, S_IRUGO | S_IWUSR);
+
+static char *dfd_get_slot_sysfs_name(void)
+{
+    uint64_t key;
+    char *sysfs_name;
+
+    /* string Type configuration item */
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_SLOT_SYSFS_NAME, 0, 0);
+    sysfs_name = dfd_ko_cfg_get_item(key);
+    if (sysfs_name == NULL) {
+        DFD_SLOT_DEBUG(DBG_VERBOSE, "key_name=%s, sysfs_name is NULL, use default way.\n", 
+            key_to_name(DFD_CFG_ITEM_SLOT_SYSFS_NAME));
+    } else {
+        DFD_SLOT_DEBUG(DBG_VERBOSE, "sysfs_name: %s.\n", sysfs_name);
+    }
+    return sysfs_name;
+}
+
+/**
+ * dfd_get_slot_status - Gets the subcard status
+ * @index: Number of the sub-card, starting from 1
+ * return: 0:ABSENT
+ *         1:OK
+ *       : Negative value - Read failed
+ */
+static int dfd_get_slot_status(unsigned int slot_index)
+{
+    uint64_t key;
+    int ret;
+    int status;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_DEV_PRESENT_STATUS, WB_MAIN_DEV_SLOT, slot_index);
+    ret = dfd_info_get_int(key, &status, NULL);
+    if (ret < 0) {
+        DFD_SLOT_DEBUG(DBG_ERROR, "get slot status error, key_name:%s\n",
+            key_to_name(DFD_CFG_ITEM_DEV_PRESENT_STATUS));
+        return ret;
+    }
+    return status;
+}
+
+/**
+ * dfd_get_slot_status_str - Gets the subcard status
+ * @slot_index: Number of the sub-card, starting from 1
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success: Length of the status string
+ *       : Negative value - Read failed
+ */
+ssize_t dfd_get_slot_status_str(unsigned int slot_index, char *buf, size_t count)
+{
+    int ret;
+    if (buf == NULL) {
+        DFD_SLOT_DEBUG(DBG_ERROR, "params error.slot_index:%d.",slot_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+    ret = dfd_get_slot_status(slot_index);
+    if (ret < 0) {
+        DFD_SLOT_DEBUG(DBG_ERROR, "get slot status error,ret:%d, slot_index:%d\n", ret, slot_index);
+        return ret;
+    }
+    mem_clear(buf, count);
+    return (ssize_t)snprintf(buf, count, "%d\n", ret);
+}
+
+/**
+ * dfd_get_slot_info - Obtain the subcard information
+ * @slot_index: Number of the sub-card, starting from 1
+ * @cmd: Subcard information type, subcard name :2, subcard serial number :3, subcard hardware version number :5
+ * @buf: Receive buf
+ * @count: Accept the buf length
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_slot_info(unsigned int slot_index, uint8_t cmd, char *buf, size_t count)
+{
+    uint64_t key;
+    int rv;
+    char slot_buf[SLOT_SIZE];
+    dfd_i2c_dev_t *i2c_dev;
+    const char *sysfs_name;
+
+    if (buf == NULL) {
+        DFD_SLOT_DEBUG(DBG_ERROR, "buf is NULL, slot index:%d, cmd:%d\n", slot_index, cmd);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    mem_clear(buf, count);
+    mem_clear(slot_buf, SLOT_SIZE);
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_OTHER_I2C_DEV, WB_MAIN_DEV_SLOT, slot_index);
+    i2c_dev = dfd_ko_cfg_get_item(key);
+    if (i2c_dev == NULL) {
+        DFD_SLOT_DEBUG(DBG_ERROR, "slot i2c dev config error, key_name=%s\n", 
+            key_to_name(DFD_CFG_ITEM_OTHER_I2C_DEV));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+    sysfs_name = dfd_get_slot_sysfs_name();
+    rv = dfd_get_fru_board_data(i2c_dev->bus, i2c_dev->addr, cmd, slot_buf, SLOT_SIZE, sysfs_name);
+
+    if (rv < 0) {
+        DFD_SLOT_DEBUG(DBG_ERROR, "slot eeprom read failed");
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    DFD_SLOT_DEBUG(DBG_VERBOSE, "%s\n", slot_buf);
+    snprintf(buf, count, "%s\n", slot_buf);
+    return strlen(buf);
+}
+
+ssize_t dfd_get_slot_power_status_str(unsigned int slot_index, char *buf, size_t count)
+{
+    uint64_t key;
+    int ret;
+    int status;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_POWER_STATUS, WB_MAIN_DEV_SLOT, slot_index);
+    ret = dfd_info_get_int(key, &status, NULL);
+    if (ret < 0) {
+        DFD_SLOT_DEBUG(DBG_ERROR, "get slot status error, key_name: %s\r\n",
+            key_to_name(DFD_CFG_ITEM_POWER_STATUS));
+        return ret;
+    }
+    mem_clear(buf, count);
+    return (ssize_t)snprintf(buf, count, "%d\n", status);
+}
+
+int dfd_set_slot_power_status_str(unsigned int slot_index, int value)
+{
+    uint64_t key;
+    int ret;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_POWER_STATUS, WB_MAIN_DEV_SLOT, slot_index);
+    ret = dfd_info_set_int(key, value);
+    if (ret < 0) {
+        DBG_SYSLED_DEBUG(DBG_ERROR, "set led status error, key_name: %s,ret:%d\r\n", 
+            key_to_name(DFD_CFG_ITEM_POWER_STATUS), ret);
+        return ret;
+    }
+    return ret;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_system_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_system_driver.c
new file mode 100644
index 000000000000..d938c118b086
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_system_driver.c
@@ -0,0 +1,253 @@
+/*
+ * An wb_system_driver driver for system devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+#include <linux/delay.h>
+
+#include "wb_module.h"
+#include "dfd_cfg.h"
+#include "dfd_cfg_info.h"
+#include "dfd_cfg_adapter.h"
+#include "wb_system_driver.h"
+#include "switch_driver.h"
+
+#define NODE_MAX_LEN        (64)
+
+int g_dfd_custom_dbg_level = 0;
+module_param(g_dfd_custom_dbg_level, int, S_IRUGO | S_IWUSR);
+
+/* Get current function step number */
+int dfd_get_cmd_count(unsigned int type)
+{
+    uint64_t key;
+    int cmd_num;
+    int *p_cmd_num;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_BMC_SYSTEM_CMD_NUM, type, 0);
+    p_cmd_num = dfd_ko_cfg_get_item(key);
+    if (p_cmd_num == NULL) {
+        DFD_SYSTEM_DEBUG(DBG_ERROR, "get cmd number failed, key_name:%s\n",
+            key_to_name(DFD_CFG_ITEM_BMC_SYSTEM_CMD_NUM));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+    cmd_num = *p_cmd_num;
+    DFD_SYSTEM_DEBUG(DBG_VERBOSE, "get cmd number ok, type:0x%x, number:%d\n", type, cmd_num);
+    return cmd_num;
+}
+
+void dfd_cmd_delay(unsigned int usdelay)
+{
+    DFD_SYSTEM_DEBUG(DBG_VERBOSE, "usdelay:%d\n", usdelay);
+    usleep_range(usdelay, usdelay + 1);
+    return;
+}
+
+ssize_t dfd_system_get_system_value(unsigned int type, int *value)
+{
+    uint64_t key;
+    int ret;
+    info_ctrl_t *info_ctrl;
+    int *p_decode_value;
+
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_BMC_SYSTEM, type, 0);
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DFD_SYSTEM_DEBUG(DBG_ERROR, "get info ctrl fail, key_name: %s, type=0x%x\n",
+            key_to_name(DFD_CFG_ITEM_BMC_SYSTEM), type);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+    DFD_SYSTEM_DEBUG(DBG_VERBOSE, "get, key_name: %s, type=0x%x\n",
+        key_to_name(DFD_CFG_ITEM_BMC_SYSTEM), type);
+    ret = dfd_info_get_int(key, value, NULL);
+    if (ret < 0) {
+        DFD_SYSTEM_DEBUG(DBG_ERROR, "get system value error, key_name: %s, type=0x%x, ret:%d\n",
+            key_to_name(DFD_CFG_ITEM_BMC_SYSTEM), type, ret);
+        return ret;
+    }
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_SYSTEM_STATUS_DECODE, type, *value);
+    p_decode_value = dfd_ko_cfg_get_item(key);
+    if (p_decode_value == NULL) {
+        DFD_SYSTEM_DEBUG(DBG_VERBOSE, "type:%d, status needn't decode. value:0x%x\n", type, *value);
+    } else {
+        DFD_SYSTEM_DEBUG(DBG_VERBOSE, "type:%d, ori_value:0x%x, decoded value:0x%x\n", type, *value, *p_decode_value);
+        *value = *p_decode_value;
+    }
+    return DFD_RV_OK;
+}
+
+static int dfd_system_check_value_i(unsigned int type_detail, int cmd_i)
+{
+    uint64_t key;
+    int ret, i;
+    info_ctrl_t *info_ctrl;
+    int tmp_value, retry_times;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_CHECK_VAL_BMC_SYSTEM, type_detail, cmd_i);
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DFD_SYSTEM_DEBUG(DBG_VERBOSE, "key=%s, type_detail=0x%x, cmd_i=%d, don't need to check value\n",
+            key_to_name(DFD_CFG_ITEM_CHECK_VAL_BMC_SYSTEM), type_detail, cmd_i);
+        return DFD_RV_OK;
+    }
+
+    DFD_SYSTEM_DEBUG(DBG_VERBOSE, "key_name=%s, type_detail=0x%x, cmd_i=%d, start to check value,\n",
+        key_to_name(DFD_CFG_ITEM_CHECK_VAL_BMC_SYSTEM), type_detail, cmd_i);
+    DFD_SYSTEM_DEBUG(DBG_VERBOSE, "check value, except value: %d, retry_times: %d, sleep_time: %dus\n",
+        info_ctrl->int_extra1, info_ctrl->int_extra2, info_ctrl->int_extra3);
+
+    if (info_ctrl->int_extra2 <= 0) {
+        retry_times = 1;
+    } else {
+        retry_times = info_ctrl->int_extra2;
+    }
+
+    for (i = 0; i < retry_times; i++) {
+        ret = dfd_info_get_int(key, &tmp_value, NULL);
+        if (ret < 0) {
+            DFD_SYSTEM_DEBUG(DBG_ERROR, "key_name=%s, type_detail=0x%x, cmd_i=%d, get check value error, ret: %d\n",
+                key_to_name(DFD_CFG_ITEM_CHECK_VAL_BMC_SYSTEM), type_detail, cmd_i, ret);
+            return ret;
+        }
+        if (tmp_value == info_ctrl->int_extra1) {
+            DFD_SYSTEM_DEBUG(DBG_VERBOSE, "key_name=%s, type_detail=0x%x, cmd_i=%d, check value ok, get value: %d, except value: %d\n",
+                key_to_name(DFD_CFG_ITEM_CHECK_VAL_BMC_SYSTEM), type_detail, cmd_i, tmp_value, info_ctrl->int_extra1);
+            return DFD_RV_OK;
+        }
+        DFD_SYSTEM_DEBUG(DBG_VERBOSE, "key_name=%s, type_detail=0x%x, cmd_i=%d, check value failed, get value: %d, except value: %d, retry: %d\n",
+            key_to_name(DFD_CFG_ITEM_CHECK_VAL_BMC_SYSTEM), type_detail, cmd_i, tmp_value, info_ctrl->int_extra1, i + 1);
+
+        if (info_ctrl->int_extra3 > 0) {
+            dfd_cmd_delay(info_ctrl->int_extra3);
+        }
+    }
+
+    DFD_SYSTEM_DEBUG(DBG_ERROR, "key_name=%s, type_detail=0x%x, cmd_i=%d, check value failed, get value: %d, except value: %d\n",
+        key_to_name(DFD_CFG_ITEM_CHECK_VAL_BMC_SYSTEM), type_detail, cmd_i, tmp_value, info_ctrl->int_extra1);
+    return -DFD_RV_CHECK_FAIL;
+}
+
+ssize_t dfd_system_set_system_value(unsigned int type, int value)
+{
+    uint64_t key;
+    int ret, cmd_i, cmd_count;
+    info_ctrl_t *info_ctrl;
+    unsigned int type_detail;
+    int tmp_value;
+
+    DFD_SYSTEM_DEBUG(DBG_VERBOSE, "set system value, type=0x%x, value=%d\n", type, value);
+    /* get step number */
+    type_detail = type | (value & 0xff);
+    ret = dfd_get_cmd_count(type_detail);
+    if(ret <= 0) {
+        DFD_SYSTEM_DEBUG(DBG_ERROR, "get cmd number, type_detail=0x%x\n", type_detail);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    cmd_count = ret;
+    /* exec each step */
+    for(cmd_i = 0; cmd_i < cmd_count; cmd_i++) {
+        /* first do pre check */
+        key = DFD_CFG_KEY(DFD_CFG_ITEM_PRE_CHECK_BMC_SYSTEM, type_detail, cmd_i);
+        info_ctrl = dfd_ko_cfg_get_item(key);
+        if (info_ctrl) {
+            DFD_SYSTEM_DEBUG(DBG_VERBOSE, "key_name=%s, type_detail=0x%x, cmd_i=%d, start to pre check\n",
+                key_to_name(DFD_CFG_ITEM_PRE_CHECK_BMC_SYSTEM), type_detail, cmd_i);
+            ret = dfd_info_get_int(key, &tmp_value, NULL);
+            if (ret < 0) {
+                DFD_SYSTEM_DEBUG(DBG_ERROR, "key_name=%s, type_detail=0x%x, cmd_i=%d, get pre check value error, ret: %d\n",
+                    key_to_name(DFD_CFG_ITEM_PRE_CHECK_BMC_SYSTEM), type_detail, cmd_i, ret);
+                return ret;
+            }
+            if (tmp_value != info_ctrl->int_extra1) {
+                DFD_SYSTEM_DEBUG(DBG_VERBOSE, "key_name=%s, type_detail=0x%x, cmd_i=%d, pre check error, get value: %d, except value: %d, skip this step\n",
+                    key_to_name(DFD_CFG_ITEM_PRE_CHECK_BMC_SYSTEM), type_detail, cmd_i, tmp_value, info_ctrl->int_extra1);
+                continue;
+            }
+            DFD_SYSTEM_DEBUG(DBG_VERBOSE, "key_name=%s, type_detail=0x%x, cmd_i=%d, pre check ok, get value: %d, except value: %d\n",
+                key_to_name(DFD_CFG_ITEM_PRE_CHECK_BMC_SYSTEM), type_detail, cmd_i, tmp_value, info_ctrl->int_extra1);
+        }
+        /* get current step cfg */
+        key = DFD_CFG_KEY(DFD_CFG_ITEM_BMC_SYSTEM, type_detail, cmd_i);
+        info_ctrl = dfd_ko_cfg_get_item(key);
+        if (info_ctrl == NULL) {
+            DFD_SYSTEM_DEBUG(DBG_ERROR, "get info ctrl fail, key_name=%s, type_detail=0x%x, cmd_i=%d\n",
+                key_to_name(DFD_CFG_ITEM_BMC_SYSTEM), type_detail, cmd_i);
+            return -DFD_RV_DEV_NOTSUPPORT;
+        }
+
+        DFD_SYSTEM_DEBUG(DBG_VERBOSE, "set, key_name=%s, type_detail=0x%x, cmd_i=%d\n",
+            key_to_name(DFD_CFG_ITEM_BMC_SYSTEM), type_detail, cmd_i);
+        /* set int type info */
+        ret = dfd_info_set_int(key, info_ctrl->int_cons);
+        if (ret < 0) {
+            DFD_SYSTEM_DEBUG(DBG_ERROR, "set system value error, key_name=%s, type_detail=0x%x, cmd_i=%d, value=%d, ret:%d\n",
+                key_to_name(DFD_CFG_ITEM_BMC_SYSTEM), type_detail, cmd_i, value, ret);
+            return ret;
+        }
+
+        /* delay if it has */
+        if(info_ctrl->int_extra1 > 0) {
+            dfd_cmd_delay(info_ctrl->int_extra1);
+        }
+
+        /* check value */
+        ret = dfd_system_check_value_i(type_detail, cmd_i);
+        if (ret < 0) {
+            DFD_SYSTEM_DEBUG(DBG_ERROR, "set system value check value error, ret: %d\n", ret);
+            return ret;
+        }
+    }
+
+    return DFD_RV_OK;
+}
+
+ssize_t dfd_system_get_port_power_status(unsigned int type, char *buf, size_t count)
+{
+    int ret, cmd_i, cmd_count;
+    unsigned int type_detail;
+
+    /* get step number */
+    type_detail = type;
+    ret = dfd_get_cmd_count(type_detail);
+    if(ret <= 0) {
+        DFD_SYSTEM_DEBUG(DBG_ERROR, "get cmd number, type_detail=0x%x\n", type_detail);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    cmd_count = ret;
+    /* exec each step */
+    for(cmd_i = 0; cmd_i < cmd_count; cmd_i++) {
+        /* check value */
+        ret = dfd_system_check_value_i(type_detail, cmd_i);
+        if (ret < 0) {
+            if(ret == -DFD_RV_CHECK_FAIL) {
+                return (ssize_t)snprintf(buf, count, "%d\n", WB_PORT_POWER_ON);
+            }
+            DFD_SYSTEM_DEBUG(DBG_ERROR, "set system value check value error, ret: %d\n", ret);
+            return ret;
+        }
+    }
+
+    return (ssize_t)snprintf(buf, count, "%d\n", WB_PORT_POWER_OFF);
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_watchdog_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_watchdog_driver.c
new file mode 100644
index 000000000000..a146b2e9a337
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_watchdog_driver.c
@@ -0,0 +1,217 @@
+/*
+ * An wb_watchdog_driver driver for watchdog devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */ 
+
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+
+#include "wb_module.h"
+#include "dfd_cfg.h"
+#include "dfd_cfg_info.h"
+#include "dfd_cfg_adapter.h"
+
+#define WDT_FILE_NAME_LEN                   (64)
+#define WDT_ABSOLUTE_PATH_NAME_LEN          (256)
+#define WDT_SYSFS_FILE_DIR                  ("/sys/class/watchdog/watchdog%d/")
+
+typedef enum wb_wdt_enable_status_e {
+    WB_WDT_DISENABLE        = 0,     /* close watchdog */
+    WB_WDT_ENABLE           = 1,     /* open watchdog */
+} wb_wdt_enable_status_t;
+
+struct wdt_file_enable_status_s {
+    wb_wdt_enable_status_t value;
+    char state[WDT_FILE_NAME_LEN];
+};
+
+struct wdt_file_enable_status_s wdt_file_enable_status_match[] = {
+    {WB_WDT_DISENABLE,       "inactive"},
+    {WB_WDT_ENABLE,      "active"},
+};
+
+int g_dfd_watchdog_dbg_level = 0;
+module_param(g_dfd_watchdog_dbg_level, int, S_IRUGO | S_IWUSR);
+
+static int watchdog_file_read(char *fpath, char *buf, int size)
+{
+    int ret;
+    struct file *filp;
+    loff_t pos;
+
+    filp = filp_open(fpath, O_RDONLY, 0);
+    if (IS_ERR(filp)) {
+        DFD_WDT_DEBUG(DBG_ERROR, "watchdog can't open %s.\n", fpath);
+        filp = NULL;
+        ret = -ENOENT;
+        return ret;
+    }
+
+    mem_clear(buf, size);
+    pos = 0;
+    ret = kernel_read(filp, buf, size - 1, &pos);
+    if (ret < 0) {
+        DFD_WDT_DEBUG(DBG_ERROR, "kernel_read failed, path=%s, addr=0, size=%d, ret=%d\n",
+            fpath, size -1, ret);
+    }
+
+    filp_close(filp, NULL);
+    filp = NULL;
+    return ret;
+}
+
+/**
+ * dfd_get_watchdog_id - Obtain watchdog Number
+ * @wdt_index: watchdwatchdog index number
+
+ * return: Succeeded: The watchdog number is returned
+ *       : Failed: A negative value is returned
+ */
+static int dfd_get_watchdog_id(unsigned int wdt_index)
+{
+    uint64_t key;
+    int *p_watchdog_id;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_WATCHDOG_ID, wdt_index, 0);
+    p_watchdog_id = dfd_ko_cfg_get_item(key);
+    if (p_watchdog_id == NULL) {
+        DFD_WDT_DEBUG(DBG_ERROR, "get watchdog id error, key_name: %s\n", 
+            key_to_name(DFD_CFG_ITEM_WATCHDOG_ID));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+    DFD_WDT_DEBUG(DBG_VERBOSE, "get watchdog id ok, watchdog index:%u, id:0x%x.\n",
+        wdt_index, *p_watchdog_id);
+    return *p_watchdog_id;
+}
+
+static int watchdog_get_file_name(unsigned int wdt_index, wb_wdt_type_t type, char *buf, int len)
+{
+    uint64_t key;
+    char *watchdog_name;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_WATCHDOG_NAME, wdt_index, type);
+    watchdog_name = dfd_ko_cfg_get_item(key);
+    if (watchdog_name == NULL) {
+        DFD_WDT_DEBUG(DBG_ERROR, "watchdog name config error, key_name: %s\n", 
+            key_to_name(DFD_CFG_ITEM_WATCHDOG_NAME));
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DFD_WDT_DEBUG(DBG_VERBOSE, "get watchdog%u %s\n", wdt_index, watchdog_name);
+    snprintf(buf, len, "%s", watchdog_name);
+    return DFD_RV_OK;
+}
+
+/**
+ * dfd_get_watchdog_info - Get watchdog information
+ * @type: Watchdog information type
+ * @buf: Receive buf
+ * return: Success: Returns the length of buf
+ *       : Failed: A negative value is returned
+ */
+ssize_t dfd_get_watchdog_info(uint8_t type, char *buf, size_t count)
+{
+    char fpath[WDT_ABSOLUTE_PATH_NAME_LEN];
+    int watchdog_id, len, ret;
+
+    /* get watchdog sysfs name */
+    watchdog_id = dfd_get_watchdog_id(0);
+    mem_clear(fpath, WDT_ABSOLUTE_PATH_NAME_LEN);
+    snprintf(fpath, WDT_ABSOLUTE_PATH_NAME_LEN - 1, WDT_SYSFS_FILE_DIR, watchdog_id);
+    len = strlen(fpath);
+    ret = watchdog_get_file_name(watchdog_id, type, &fpath[len], WDT_ABSOLUTE_PATH_NAME_LEN - len);
+    if (ret < 0) {
+        DFD_WDT_DEBUG(DBG_WARN, "watchdog type[%u] don't support to get sysfs name.\n", type);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    ret = watchdog_file_read(fpath, buf, count - 1);
+    if (ret < 0) {
+        DFD_WDT_DEBUG(DBG_ERROR, "watchdog read file %s error, ret: %d\n", fpath, ret);
+    }
+
+    return ret;
+}
+
+ssize_t dfd_watchdog_get_status(char *buf, size_t count)
+{
+    uint64_t key;
+    int watchdog_id, ret, value;
+
+    watchdog_id = dfd_get_watchdog_id(0);
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_WATCHDOG_DEV, watchdog_id, WB_WDT_TYPE_ENABLE);
+    ret = dfd_info_get_int(key, &value, NULL);
+    if (ret < 0) {
+        DFD_WDT_DEBUG(DBG_ERROR, "get watchdog enable status, key_name: %s\n", 
+            key_to_name(DFD_CFG_ITEM_WATCHDOG_DEV));
+            return ret;
+    }
+    DFD_WDT_DEBUG(DBG_VERBOSE, "get watchdog enable status ok, watchdog index:%u, enable:0x%x.\n",
+                  watchdog_id, value);
+    return (ssize_t)snprintf(buf, count, "%d\n", value);
+}
+
+ssize_t dfd_watchdog_set_status(int value)
+{
+    uint64_t key;
+    int watchdog_id, ret;
+
+    watchdog_id = dfd_get_watchdog_id(0);
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_WATCHDOG_DEV, watchdog_id, WB_WDT_TYPE_ENABLE);
+    ret = dfd_info_set_int(key, value);
+    if (ret < 0) {
+        DFD_WDT_DEBUG(DBG_ERROR, "set watchdog enable status, key: %s\n", 
+            key_to_name(DFD_CFG_ITEM_WATCHDOG_DEV));
+        return ret;
+    }
+    DFD_WDT_DEBUG(DBG_VERBOSE, "set watchdog enable status ok, watchdog index:%u, enable:0x%x.\n",
+                  watchdog_id, value);
+    return 0;
+}
+
+ssize_t dfd_watchdog_get_status_str(char *buf, size_t count)
+{
+    int ret, i;
+    int enable_status;
+
+    ret = dfd_get_watchdog_info(WB_WDT_TYPE_STATE, buf, count);
+    if (ret < 0) {
+        DFD_WDT_DEBUG(DBG_ERROR, "watchdog type[%d] get sysfs name failed.\n", WB_WDT_TYPE_STATE);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    enable_status = -1;
+    for (i = 0; i < ARRAY_SIZE(wdt_file_enable_status_match); i++) {
+        if (strncmp(wdt_file_enable_status_match[i].state, buf, \
+                 strlen(wdt_file_enable_status_match[i].state)) == 0) {
+            enable_status = wdt_file_enable_status_match[i].value;
+            DFD_WDT_DEBUG(DBG_VERBOSE, "watchdog read state file %s match enable status[%d].\n",
+                buf, enable_status);
+            break;
+        }
+    }
+
+    if (enable_status < 0) {
+        DFD_WDT_DEBUG(DBG_ERROR, "watchdog read state file %s don't match enable status\n", buf);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    return (ssize_t)snprintf(buf, count, "%d\n", enable_status);
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/Makefile
new file mode 100644
index 000000000000..197a0e6ff98f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/Makefile
@@ -0,0 +1,34 @@
+PWD		= $(shell pwd)
+
+MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
+DEV_SYSFS_HEADER_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../sysfs_driver/include)
+SWITCH_DVR_HEADER_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../switch_driver/include)
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -I$(DEV_SYSFS_HEADER_DIR)
+EXTRA_CFLAGS+= -I$(SWITCH_DVR_HEADER_DIR)
+EXTRA_CFLAGS+= -Wall
+
+s3ip_sysfs-objs := switch.o cpld_sysfs.o \
+curr_sensor_sysfs.o \
+fan_sysfs.o \
+fpga_sysfs.o \
+psu_sysfs.o \
+slot_sysfs.o \
+sysled_sysfs.o \
+temp_sensor_sysfs.o \
+transceiver_sysfs.o \
+vol_sensor_sysfs.o \
+watchdog_sysfs.o \
+system_sysfs.o \
+eeprom_sysfs.o \
+
+obj-m := s3ip_sysfs.o
+
+all:
+	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
+	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
+	cp -p  $(PWD)/*.ko $(module_out_put_dir)
+clean:
+	rm -f $(PWD)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd 
+	rm -f $(PWD)/Module.markers $(PWD)/Module.symvers $(PWD)/modules.order 
+	rm -rf $(PWD)/.tmp_versions
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/cpld_sysfs.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/cpld_sysfs.c
new file mode 100644
index 000000000000..d5b13e3a83f5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/cpld_sysfs.c
@@ -0,0 +1,444 @@
+/*
+ * An cpld_sysfs driver for cpld sysfs devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+#include <linux/fs.h>
+
+#include "switch.h"
+#include "cpld_sysfs.h"
+
+static int g_cpld_loglevel = 0;
+
+#define CPLD_REBOOT_CAUSE_FILE      "/etc/.reboot/.previous-reboot-cause.txt"
+#define REBOOT_CAUSE_NAME_LEN       (64)
+
+/* Reboot cause type */
+typedef enum wb_reboot_cause_type_e {
+    REBOOT_CAUSE_NON_HARDWARE = 0,
+    REBOOT_CAUSE_POWER_LOSS,
+    REBOOT_CAUSE_THERMAL_OVERLOAD_CPU,
+    REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC,
+    REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER,
+    REBOOT_CAUSE_INSUFFICIENT_FAN_SPEED,
+    REBOOT_CAUSE_WATCHDOG,
+    REBOOT_CAUSE_HARDWARE_OTHER,
+    REBOOT_CAUSE_CPU_COLD_RESET,
+    REBOOT_CAUSE_CPU_WARM_RESET,
+    REBOOT_CAUSE_BIOS_RESET,
+    REBOOT_CAUSE_PSU_SHUTDOWN,
+    REBOOT_CAUSE_BMC_SHUTDOWN,
+    REBOOT_CAUSE_RESET_BUTTON_SHUTDOWN,
+    REBOOT_CAUSE_RESET_BUTTON_COLD_SHUTDOWN,
+} wb_reboot_cause_type_t;
+
+struct reboot_cause_file_info_s {
+    wb_reboot_cause_type_t reboot_cause_type;
+    char reboot_cause_name[REBOOT_CAUSE_NAME_LEN];
+};
+
+struct reboot_cause_file_info_s reboot_cause_file_info_match[] = {
+    {REBOOT_CAUSE_POWER_LOSS,                   "Power Loss"},
+    {REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC,        "Watchdog reboot"},
+    {REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER,       "BMC reboot"},
+    {REBOOT_CAUSE_BMC_SHUTDOWN,                 "BMC powerdown"},
+    {REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC,        "Thermal Overload: ASIC"},
+    {REBOOT_CAUSE_CPU_WARM_RESET,               "Warm reboot"},
+};
+
+#define CPLD_INFO(fmt, args...) do {                                        \
+    if (g_cpld_loglevel & INFO) { \
+        printk(KERN_INFO "[CPLD_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define CPLD_ERR(fmt, args...) do {                                        \
+    if (g_cpld_loglevel & ERR) { \
+        printk(KERN_ERR "[CPLD_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define CPLD_DBG(fmt, args...) do {                                        \
+    if (g_cpld_loglevel & DBG) { \
+        printk(KERN_DEBUG "[CPLD_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct cpld_obj_s {
+    struct switch_obj *obj;
+};
+
+struct cpld_s {
+    unsigned int cpld_number;
+    struct cpld_obj_s *cpld;
+};
+
+static struct cpld_s g_cpld;
+static struct switch_obj *g_cpld_obj = NULL;
+static struct s3ip_sysfs_cpld_drivers_s *g_cpld_drv = NULL;
+
+static int cpld_file_read(char *fpath, char *buf, int size)
+{
+    int ret;
+    struct file *filp;
+    loff_t pos;
+
+    filp = filp_open(fpath, O_RDONLY, 0);
+    if (IS_ERR(filp)) {
+        CPLD_ERR("can't open %s", fpath);
+        filp = NULL;
+        ret = -ENOENT;
+        goto fail;
+    }
+    mem_clear(buf, size);
+    pos = 0;
+    ret = kernel_read(filp, buf, size - 1, &pos);
+    if (ret < 0) {
+        CPLD_ERR("read file %s error, ret:%d\n", fpath, ret);
+    }
+fail:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+        filp = NULL;
+    }
+
+    return ret;
+}
+
+static ssize_t cpld_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%u\n", g_cpld.cpld_number);
+}
+
+static ssize_t cpld_reboot_cause_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    char reboot_cause_buf[REBOOT_CAUSE_NAME_LEN];
+    int ret, i;
+    char *point;
+    int reboot_cause_type;
+
+    mem_clear(reboot_cause_buf, sizeof(reboot_cause_buf));
+    ret = cpld_file_read(CPLD_REBOOT_CAUSE_FILE, reboot_cause_buf, REBOOT_CAUSE_NAME_LEN - 1);
+    if (ret < 0) {
+        CPLD_ERR("read file %s error, ret:%d\n", CPLD_REBOOT_CAUSE_FILE, ret);
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", 0);
+    }
+
+    point = strchr(reboot_cause_buf, ',');
+    if (point != NULL) {
+        *point = 0;
+    }
+    CPLD_DBG("read reboot cause:%s\n", reboot_cause_buf);
+
+    reboot_cause_type = 0;
+    for (i = 0; i < ARRAY_SIZE(reboot_cause_file_info_match); i++) {
+        if (strncmp(reboot_cause_file_info_match[i].reboot_cause_name, reboot_cause_buf, \
+                    strlen(reboot_cause_file_info_match[i].reboot_cause_name)) == 0) {
+            reboot_cause_type = reboot_cause_file_info_match[i].reboot_cause_type;
+            CPLD_DBG("reboot cause %s match type[%d].\n", reboot_cause_file_info_match[i].reboot_cause_name, reboot_cause_type);
+            break;
+        }
+    }
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", reboot_cause_type);
+}
+
+static ssize_t cpld_alias_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int cpld_index;
+
+    check_p(g_cpld_drv);
+    check_p(g_cpld_drv->get_main_board_cpld_alias);
+
+    cpld_index = obj->index;
+    CPLD_DBG("cpld index: %u\n", cpld_index);
+    return g_cpld_drv->get_main_board_cpld_alias(cpld_index, buf, PAGE_SIZE);
+}
+
+static ssize_t cpld_type_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int cpld_index;
+
+    check_p(g_cpld_drv);
+    check_p(g_cpld_drv->get_main_board_cpld_type);
+
+    cpld_index = obj->index;
+    CPLD_DBG("cpld index: %u\n", cpld_index);
+    return g_cpld_drv->get_main_board_cpld_type(cpld_index, buf, PAGE_SIZE);
+}
+
+static ssize_t cpld_fw_version_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int cpld_index;
+
+    check_p(g_cpld_drv);
+    check_p(g_cpld_drv->get_main_board_cpld_firmware_version);
+
+    cpld_index = obj->index;
+    CPLD_DBG("cpld index: %u\n", cpld_index);
+    return g_cpld_drv->get_main_board_cpld_firmware_version(cpld_index, buf, PAGE_SIZE);
+}
+
+static ssize_t cpld_board_version_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int cpld_index;
+
+    check_p(g_cpld_drv);
+    check_p(g_cpld_drv->get_main_board_cpld_board_version);
+
+    cpld_index = obj->index;
+    CPLD_DBG("cpld index: %u\n", cpld_index);
+    return g_cpld_drv->get_main_board_cpld_board_version(cpld_index, buf, PAGE_SIZE);
+}
+
+static ssize_t cpld_test_reg_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int cpld_index;
+
+    check_p(g_cpld_drv);
+    check_p(g_cpld_drv->get_main_board_cpld_test_reg);
+
+    cpld_index = obj->index;
+    CPLD_DBG("cpld index: %u\n", cpld_index);
+    return g_cpld_drv->get_main_board_cpld_test_reg(cpld_index, buf, PAGE_SIZE);
+}
+
+static ssize_t cpld_test_reg_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int cpld_index, value;
+    int ret;
+
+    check_p(g_cpld_drv);
+    check_p(g_cpld_drv->set_main_board_cpld_test_reg);
+
+    cpld_index = obj->index;
+    sscanf(buf, "0x%x", &value);
+    ret = g_cpld_drv->set_main_board_cpld_test_reg(cpld_index, value);
+    if (ret < 0) {
+        CPLD_ERR("set cpld%u test reg failed, value:0x%x, ret: %d.\n", cpld_index, value, ret);
+        return ret;
+    }
+    CPLD_DBG("set cpld%u test reg success, value: 0x%x.\n", cpld_index, value);
+    return count;
+}
+
+/************************************cpld dir and attrs*******************************************/
+static struct switch_attribute cpld_number_att = __ATTR(number, S_IRUGO, cpld_number_show, NULL);
+static struct switch_attribute cpld_reboot_cause_att = __ATTR(reboot_cause, S_IRUGO, cpld_reboot_cause_show, NULL);
+
+static struct attribute *cpld_dir_attrs[] = {
+    &cpld_number_att.attr,
+    &cpld_reboot_cause_att.attr,
+    NULL,
+};
+
+static struct attribute_group cpld_root_attr_group = {
+    .attrs = cpld_dir_attrs,
+};
+
+/*******************************cpld[1-n] dir and attrs*******************************************/
+static struct switch_attribute cpld_alias_attr = __ATTR(alias, S_IRUGO, cpld_alias_show, NULL);
+static struct switch_attribute cpld_type_attr = __ATTR(type, S_IRUGO, cpld_type_show, NULL);
+static struct switch_attribute cpld_fw_version_attr = __ATTR(firmware_version, S_IRUGO, cpld_fw_version_show, NULL);
+static struct switch_attribute cpld_board_version_attr = __ATTR(board_version, S_IRUGO, cpld_board_version_show, NULL);
+static struct switch_attribute cpld_test_reg_attr = __ATTR(reg_test, S_IRUGO | S_IWUSR, cpld_test_reg_show, cpld_test_reg_store);
+
+static struct attribute *cpld_attrs[] = {
+    &cpld_alias_attr.attr,
+    &cpld_type_attr.attr,
+    &cpld_fw_version_attr.attr,
+    &cpld_board_version_attr.attr,
+    &cpld_test_reg_attr.attr,
+    NULL,
+};
+
+static struct attribute_group cpld_attr_group = {
+    .attrs = cpld_attrs,
+};
+
+static int cpld_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct cpld_obj_s *curr_cpld;
+
+    curr_cpld = &g_cpld.cpld[index - 1];
+    if (curr_cpld->obj) {
+        sysfs_remove_group(&curr_cpld->obj->kobj, &cpld_attr_group);
+        switch_kobject_delete(&curr_cpld->obj);
+        CPLD_DBG("delete cpld%u dir and attrs success.\n", index);
+    }
+
+    return 0;
+}
+
+static int cpld_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
+{
+    char name[8];
+    struct cpld_obj_s *curr_cpld;
+
+    curr_cpld = &g_cpld.cpld[index - 1];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "cpld%u", index);
+    curr_cpld->obj = switch_kobject_create(name, parent);
+    if (!curr_cpld->obj) {
+        CPLD_ERR("create %s object error!\n", name);
+        return -EBADRQC;
+    }
+    curr_cpld->obj->index = index;
+    if (sysfs_create_group(&curr_cpld->obj->kobj, &cpld_attr_group) != 0) {
+        CPLD_ERR("create %s attrs error.\n", name);
+        switch_kobject_delete(&curr_cpld->obj);
+        return -EBADRQC;
+    }
+    CPLD_DBG("create %s dir and attrs success.\n", name);
+    return 0;
+}
+
+static int cpld_sub_create_kobj_and_attrs(struct kobject *parent, int cpld_num)
+{
+    unsigned int cpld_index, i;
+
+    g_cpld.cpld = kzalloc(sizeof(struct cpld_obj_s) * cpld_num, GFP_KERNEL);
+    if (!g_cpld.cpld) {
+        CPLD_ERR("kzalloc g_cpld.cpld error, cpld number = %d.\n", cpld_num);
+        return -ENOMEM;
+    }
+
+    for (cpld_index = 1; cpld_index <= cpld_num; cpld_index++) {
+        if (cpld_sub_single_create_kobj_and_attrs(parent, cpld_index) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = cpld_index; i > 0; i--) {
+        cpld_sub_single_remove_kobj_and_attrs(i);
+    }
+    kfree(g_cpld.cpld);
+    g_cpld.cpld = NULL;
+    return -EBADRQC;
+}
+
+/* create cpld[1-n] directory and attributes*/
+static int cpld_sub_create(void)
+{
+    int ret;
+
+    ret = cpld_sub_create_kobj_and_attrs(&g_cpld_obj->kobj, g_cpld.cpld_number);
+    return ret;
+}
+
+/* delete cpld[1-n] directory and attributes*/
+static void cpld_sub_remove(void)
+{
+    unsigned int cpld_index;
+
+    if (g_cpld.cpld) {
+        for (cpld_index = g_cpld.cpld_number; cpld_index > 0; cpld_index--) {
+            cpld_sub_single_remove_kobj_and_attrs(cpld_index);
+        }
+        kfree(g_cpld.cpld);
+        g_cpld.cpld = NULL;
+    }
+    g_cpld.cpld_number = 0;
+    return;
+}
+
+/* create cpld directory and number attributes */
+static int cpld_root_create(void)
+{
+    g_cpld_obj = switch_kobject_create("cpld", NULL);
+    if (!g_cpld_obj) {
+        CPLD_ERR("switch_kobject_create cpld error!\n");
+        return -ENOMEM;
+    }
+
+    if (sysfs_create_group(&g_cpld_obj->kobj, &cpld_root_attr_group) != 0) {
+        switch_kobject_delete(&g_cpld_obj);
+        CPLD_ERR("create cpld dir attrs error!\n");
+        return -EBADRQC;
+    }
+    return 0;
+}
+
+/* delete cpld directory and number attributes */
+static void cpld_root_remove(void)
+{
+    if (g_cpld_obj) {
+        sysfs_remove_group(&g_cpld_obj->kobj, &cpld_root_attr_group);
+        switch_kobject_delete(&g_cpld_obj);
+    }
+
+    return;
+}
+
+int s3ip_sysfs_cpld_drivers_register(struct s3ip_sysfs_cpld_drivers_s *drv)
+{
+    int ret, cpld_num;
+
+    CPLD_INFO("s3ip_sysfs_cpld_drivers_register...\n");
+    if (g_cpld_drv) {
+        CPLD_ERR("g_cpld_drv is not NULL, can't register\n");
+        return -EPERM;
+    }
+
+    check_p(drv);
+    check_p(drv->get_main_board_cpld_number);
+    g_cpld_drv = drv;
+
+    cpld_num = g_cpld_drv->get_main_board_cpld_number();
+    if (cpld_num <= 0) {
+        CPLD_ERR("cpld number: %d, don't need to create cpld dirs and attrs.\n", cpld_num);
+        g_cpld_drv = NULL;
+        return -EINVAL;
+    }
+
+    mem_clear(&g_cpld, sizeof(struct cpld_s));
+    g_cpld.cpld_number = cpld_num;
+    ret = cpld_root_create();
+    if (ret < 0) {
+        CPLD_ERR("create cpld root dir and attrs failed, ret: %d\n", ret);
+        g_cpld_drv = NULL;
+        return ret;
+    }
+    ret = cpld_sub_create();
+    if (ret < 0) {
+        CPLD_ERR("create cpld sub dir and attrs failed, ret: %d\n", ret);
+        cpld_root_remove();
+        g_cpld_drv = NULL;
+        return ret;
+    }
+    CPLD_INFO("s3ip_sysfs_cpld_drivers_register success\n");
+    return 0;
+}
+
+void s3ip_sysfs_cpld_drivers_unregister(void)
+{
+    if (g_cpld_drv) {
+        cpld_sub_remove();
+        cpld_root_remove();
+        g_cpld_drv = NULL;
+        CPLD_DBG("s3ip_sysfs_cpld_drivers_unregister success.\n");
+    }
+    return;
+}
+
+EXPORT_SYMBOL(s3ip_sysfs_cpld_drivers_register);
+EXPORT_SYMBOL(s3ip_sysfs_cpld_drivers_unregister);
+module_param(g_cpld_loglevel, int, 0644);
+MODULE_PARM_DESC(g_cpld_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/curr_sensor_sysfs.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/curr_sensor_sysfs.c
new file mode 100644
index 000000000000..3d2e86382ef1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/curr_sensor_sysfs.c
@@ -0,0 +1,385 @@
+/*
+ * An curr_sensor_sysfs driver for current sysfs devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+
+#include "switch.h"
+#include "curr_sensor_sysfs.h"
+
+static int g_curr_sensor_loglevel = 0;
+
+#define CURR_SENSOR_INFO(fmt, args...) do {                                        \
+    if (g_curr_sensor_loglevel & INFO) { \
+        printk(KERN_INFO "[CURR_SENSOR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define CURR_SENSOR_ERR(fmt, args...) do {                                        \
+    if (g_curr_sensor_loglevel & ERR) { \
+        printk(KERN_ERR "[CURR_SENSOR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define CURR_SENSOR_DBG(fmt, args...) do {                                        \
+    if (g_curr_sensor_loglevel & DBG) { \
+        printk(KERN_DEBUG "[CURR_SENSOR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct curr_sensor_obj_s {
+    struct switch_obj *obj;
+};
+
+struct curr_sensor_s {
+    unsigned int curr_number;
+    struct curr_sensor_obj_s *curr;
+};
+
+static struct s3ip_sysfs_curr_sensor_drivers_s *g_curr_sensor_drv = NULL;
+static struct curr_sensor_s g_curr_sensor;
+static struct switch_obj *g_curr_sensor_obj = NULL;
+
+static ssize_t curr_sensor_number_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%u\n", g_curr_sensor.curr_number);
+}
+
+static ssize_t curr_sensor_value_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int curr_index;
+
+    check_p(g_curr_sensor_drv);
+    check_p(g_curr_sensor_drv->get_main_board_curr_value);
+
+    curr_index = obj->index;
+    CURR_SENSOR_DBG("curr index: %u\n", curr_index);
+    return g_curr_sensor_drv->get_main_board_curr_value(curr_index, buf, PAGE_SIZE);
+}
+
+static ssize_t curr_sensor_alias_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int curr_index;
+
+    check_p(g_curr_sensor_drv);
+    check_p(g_curr_sensor_drv->get_main_board_curr_alias);
+
+    curr_index = obj->index;
+    CURR_SENSOR_DBG("curr index: %u\n", curr_index);
+    return g_curr_sensor_drv->get_main_board_curr_alias(curr_index, buf, PAGE_SIZE);
+}
+
+static ssize_t curr_sensor_type_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int curr_index;
+
+    check_p(g_curr_sensor_drv);
+    check_p(g_curr_sensor_drv->get_main_board_curr_type);
+
+    curr_index = obj->index;
+    CURR_SENSOR_DBG("curr index: %u\n", curr_index);
+    return g_curr_sensor_drv->get_main_board_curr_type(curr_index, buf, PAGE_SIZE);
+}
+
+static ssize_t curr_sensor_max_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int curr_index;
+
+    check_p(g_curr_sensor_drv);
+    check_p(g_curr_sensor_drv->get_main_board_curr_max);
+
+    curr_index = obj->index;
+    CURR_SENSOR_DBG("curr index: %u\n", curr_index);
+    return g_curr_sensor_drv->get_main_board_curr_max(curr_index, buf, PAGE_SIZE);
+}
+
+static ssize_t curr_sensor_max_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int curr_index;
+    int ret;
+
+    check_p(g_curr_sensor_drv);
+    check_p(g_curr_sensor_drv->set_main_board_curr_max);
+
+    curr_index = obj->index;
+    CURR_SENSOR_DBG("curr index: %u\n", curr_index);
+    ret = g_curr_sensor_drv->set_main_board_curr_max(curr_index, buf, count);
+    if (ret < 0) {
+        CURR_SENSOR_ERR("set curr%u max threshold failed, value: %s, count: %lu, ret: %d\n",
+            curr_index, buf, count, ret);
+        return ret;
+    }
+    CURR_SENSOR_DBG("set curr%u max threshold success, value: %s, count: %lu, ret: %d\n",
+        curr_index, buf, count, ret);
+    return count;
+}
+
+static ssize_t curr_sensor_min_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int curr_index;
+
+    check_p(g_curr_sensor_drv);
+    check_p(g_curr_sensor_drv->get_main_board_curr_min);
+
+    curr_index = obj->index;
+    CURR_SENSOR_DBG("curr index: %u\n", curr_index);
+    return g_curr_sensor_drv->get_main_board_curr_min(curr_index, buf, PAGE_SIZE);
+}
+
+static ssize_t curr_sensor_min_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int curr_index;
+    int ret;
+
+    check_p(g_curr_sensor_drv);
+    check_p(g_curr_sensor_drv->set_main_board_curr_min);
+
+    curr_index = obj->index;
+    CURR_SENSOR_DBG("curr index: %u\n", curr_index);
+    ret = g_curr_sensor_drv->set_main_board_curr_min(curr_index, buf, count);
+    if (ret < 0) {
+        CURR_SENSOR_ERR("set curr%u min threshold failed, value: %s, count: %lu, ret: %d\n",
+            curr_index, buf, count, ret);
+        return ret;
+    }
+    CURR_SENSOR_DBG("set curr%u min threshold success, value: %s, count: %lu, ret: %d\n",
+        curr_index, buf, count, ret);
+    return count;
+}
+
+static ssize_t curr_sensor_monitor_flag_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int curr_index;
+
+    check_p(g_curr_sensor_drv);
+    check_p(g_curr_sensor_drv->get_main_board_curr_monitor_flag);
+
+    curr_index = obj->index;
+    CURR_SENSOR_DBG("curr index: %u\n", curr_index);
+    return g_curr_sensor_drv->get_main_board_curr_monitor_flag(curr_index, buf, PAGE_SIZE);
+}
+/************************************curr_sensor dir and attrs*******************************************/
+static struct switch_attribute num_curr_att = __ATTR(number, S_IRUGO, curr_sensor_number_show, NULL);
+
+static struct attribute *curr_sensor_dir_attrs[] = {
+    &num_curr_att.attr,
+    NULL,
+};
+
+static struct attribute_group curr_sensor_root_attr_group = {
+    .attrs = curr_sensor_dir_attrs,
+};
+
+/*******************************curr1 curr2 dir and attrs*******************************************/
+static struct switch_attribute curr_value_attr = __ATTR(value, S_IRUGO, curr_sensor_value_show, NULL);
+static struct switch_attribute curr_alias_attr = __ATTR(alias, S_IRUGO, curr_sensor_alias_show, NULL);
+static struct switch_attribute curr_type_attr = __ATTR(type, S_IRUGO, curr_sensor_type_show, NULL);
+static struct switch_attribute curr_max_attr = __ATTR(max, S_IRUGO | S_IWUSR, curr_sensor_max_show, curr_sensor_max_store);
+static struct switch_attribute curr_min_attr = __ATTR(min,  S_IRUGO | S_IWUSR, curr_sensor_min_show, curr_sensor_min_store);
+static struct switch_attribute curr_monitor_flag_attr = __ATTR(monitor_flag,  S_IRUGO, curr_sensor_monitor_flag_show, NULL);
+
+static struct attribute *curr_sensor_attrs[] = {
+    &curr_value_attr.attr,
+    &curr_alias_attr.attr,
+    &curr_type_attr.attr,
+    &curr_max_attr.attr,
+    &curr_min_attr.attr,
+    &curr_monitor_flag_attr.attr,
+    NULL,
+};
+
+static struct attribute_group curr_sensor_attr_group = {
+    .attrs = curr_sensor_attrs,
+};
+
+static int curr_sensor_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct curr_sensor_obj_s *curr_sensor;
+
+    curr_sensor = &g_curr_sensor.curr[index - 1];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "curr%u", index);
+    curr_sensor->obj = switch_kobject_create(name, parent);
+    if (!curr_sensor->obj) {
+        CURR_SENSOR_ERR("create %s object error.\n", name);
+        return -ENOMEM;
+    }
+    curr_sensor->obj->index = index;
+    if (sysfs_create_group(&curr_sensor->obj->kobj, &curr_sensor_attr_group) != 0) {
+        CURR_SENSOR_ERR("create %s attrs error.\n", name);
+        switch_kobject_delete(&curr_sensor->obj);
+        return -EBADRQC;
+    }
+    CURR_SENSOR_DBG("create %s dir and attrs success.\n", name);
+    return 0;
+}
+
+static void curr_sensor_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct curr_sensor_obj_s *curr_sensor;
+
+    curr_sensor = &g_curr_sensor.curr[index - 1];
+    if (curr_sensor->obj) {
+        sysfs_remove_group(&curr_sensor->obj->kobj, &curr_sensor_attr_group);
+        switch_kobject_delete(&curr_sensor->obj);
+        CURR_SENSOR_DBG("delete curr%u dir and attrs success.\n", index);
+    }
+
+    return;
+}
+
+static int curr_sensor_sub_create_kobj_and_attrs(struct kobject *parent, int curr_num)
+{
+    unsigned int curr_index, i;
+
+    g_curr_sensor.curr = kzalloc(sizeof(struct curr_sensor_obj_s) * curr_num, GFP_KERNEL);
+    if (!g_curr_sensor.curr) {
+        CURR_SENSOR_ERR("kzalloc g_curr_sensor.curr error, curr number: %d.\n", curr_num);
+        return -ENOMEM;
+    }
+
+    for (curr_index = 1; curr_index <= curr_num; curr_index++) {
+        if (curr_sensor_sub_single_create_kobj_and_attrs(parent, curr_index) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = curr_index; i > 0; i--) {
+        curr_sensor_sub_single_remove_kobj_and_attrs(i);
+    }
+    kfree(g_curr_sensor.curr);
+    g_curr_sensor.curr = NULL;
+    return -EBADRQC;
+}
+
+/* create curr[1-n] directory and attributes*/
+static int curr_sensor_sub_create(void)
+{
+    int ret;
+
+    ret = curr_sensor_sub_create_kobj_and_attrs(&g_curr_sensor_obj->kobj,
+              g_curr_sensor.curr_number);
+    return ret;
+}
+
+/* delete curr[1-n] directory and attributes*/
+static void curr_sensor_sub_remove(void)
+{
+    unsigned int curr_index;
+
+    if (g_curr_sensor.curr) {
+        for (curr_index = g_curr_sensor.curr_number; curr_index > 0; curr_index--) {
+            curr_sensor_sub_single_remove_kobj_and_attrs(curr_index);
+        }
+        kfree(g_curr_sensor.curr);
+        g_curr_sensor.curr = NULL;
+    }
+    g_curr_sensor.curr_number = 0;
+    return;
+}
+
+/* create curr_sensor directory and number attributes */
+static int curr_sensor_root_create(void)
+{
+    g_curr_sensor_obj = switch_kobject_create("curr_sensor", NULL);
+    if (!g_curr_sensor_obj) {
+        CURR_SENSOR_ERR("switch_kobject_create curr_sensor error!\n");
+        return -ENOMEM;
+    }
+
+    if (sysfs_create_group(&g_curr_sensor_obj->kobj, &curr_sensor_root_attr_group) != 0) {
+        switch_kobject_delete(&g_curr_sensor_obj);
+        CURR_SENSOR_ERR("create curr_sensor dir attrs error!\n");
+        return -EBADRQC;
+    }
+    return 0;
+}
+
+/* delete curr_sensor directory and number attributes */
+static void curr_sensor_root_remove(void)
+{
+    if (g_curr_sensor_obj) {
+        sysfs_remove_group(&g_curr_sensor_obj->kobj, &curr_sensor_root_attr_group);
+        switch_kobject_delete(&g_curr_sensor_obj);
+    }
+
+    return;
+}
+
+int s3ip_sysfs_curr_sensor_drivers_register(struct s3ip_sysfs_curr_sensor_drivers_s *drv)
+{
+    int ret, curr_num;
+
+    CURR_SENSOR_INFO("s3ip_sysfs_curr_sensor_drivers_register...\n");
+    if (g_curr_sensor_drv) {
+        CURR_SENSOR_ERR("g_curr_sensor_drv is not NULL, can't register\n");
+        return -EPERM;
+    }
+
+    check_p(drv);
+    check_p(drv->get_main_board_curr_number);
+    g_curr_sensor_drv = drv;
+
+    curr_num = g_curr_sensor_drv->get_main_board_curr_number();
+    if (curr_num <= 0) {
+        CURR_SENSOR_ERR("curr sensor number: %d, don't need to create curr_sensor dirs and attrs.\n",
+            curr_num);
+        g_curr_sensor_drv = NULL;
+        return -EINVAL;
+    }
+    mem_clear(&g_curr_sensor, sizeof(struct curr_sensor_s));
+    g_curr_sensor.curr_number = curr_num;
+    ret = curr_sensor_root_create();
+    if (ret < 0) {
+        CURR_SENSOR_ERR("create curr_sensor root dir and attrs failed, ret: %d\n", ret);
+        g_curr_sensor_drv = NULL;
+        return ret;
+    }
+
+    ret = curr_sensor_sub_create();
+    if (ret < 0) {
+        CURR_SENSOR_ERR("create curr_sensor sub dir and attrs failed, ret: %d\n", ret);
+        curr_sensor_root_remove();
+        g_curr_sensor_drv = NULL;
+        return ret;
+    }
+    CURR_SENSOR_INFO("s3ip_sysfs_curr_sensor_drivers_register success\n");
+    return ret;
+}
+
+void s3ip_sysfs_curr_sensor_drivers_unregister(void)
+{
+    if (g_curr_sensor_drv) {
+        curr_sensor_sub_remove();
+        curr_sensor_root_remove();
+        g_curr_sensor_drv = NULL;
+        CURR_SENSOR_DBG("s3ip_sysfs_curr_sensor_drivers_unregister success.\n");
+    }
+    return;
+}
+
+EXPORT_SYMBOL(s3ip_sysfs_curr_sensor_drivers_register);
+EXPORT_SYMBOL(s3ip_sysfs_curr_sensor_drivers_unregister);
+module_param(g_curr_sensor_loglevel, int, 0644);
+MODULE_PARM_DESC(g_curr_sensor_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/eeprom_sysfs.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/eeprom_sysfs.c
new file mode 100644
index 000000000000..920cbf0bb824
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/eeprom_sysfs.c
@@ -0,0 +1,417 @@
+/*
+ * An eeprom_sysfs driver for eeprom sysfs devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+
+#include "switch.h"
+#include "eeprom_sysfs.h"
+
+static int g_eeprom_loglevel = 0;
+
+#define EEPROM_INFO(fmt, args...) do {                                        \
+    if (g_eeprom_loglevel & INFO) { \
+        printk(KERN_INFO "[EEPROM_SYSFS][func:%s line:%d]"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define EEPROM_ERR(fmt, args...) do {                                        \
+    if (g_eeprom_loglevel & ERR) { \
+        printk(KERN_ERR "[EEPROM_SYSFS][func:%s line:%d]"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define EEPROM_DBG(fmt, args...) do {                                        \
+    if (g_eeprom_loglevel & DBG) { \
+        printk(KERN_DEBUG "[EEPROM_SYSFS][func:%s line:%d]"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct eeprom_obj_s {
+    struct switch_obj *eeprom_obj;
+    struct bin_attribute bin;
+    int eeprom_creat_bin_flag;
+};
+
+struct eeprom_s {
+    unsigned int eeprom_number;
+    struct eeprom_obj_s *eeprom;
+};
+
+static struct eeprom_s g_eeprom;
+static struct switch_obj *g_eeprom_obj = NULL;
+static struct s3ip_sysfs_eeprom_drivers_s *g_eeprom_drv = NULL;
+
+static ssize_t eeprom_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", g_eeprom.eeprom_number);
+}
+
+static ssize_t eeprom_size_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    struct eeprom_obj_s *curr_eeprom;
+
+    EEPROM_DBG("get eeprom size, eeprom index: %u\n", obj->index);
+    curr_eeprom = &g_eeprom.eeprom[obj->index - 1];
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%ld\n", curr_eeprom->bin.size);
+}
+
+static ssize_t eeprom_alias_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int eeprom_index;
+
+    check_p(g_eeprom_drv);
+    check_p(g_eeprom_drv->get_eeprom_alias);
+
+    eeprom_index = obj->index;
+    EEPROM_DBG("get eeprom alias, eeprom index: %u\n", eeprom_index);
+    return g_eeprom_drv->get_eeprom_alias(eeprom_index, buf, PAGE_SIZE);
+}
+
+static ssize_t eeprom_tag_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int eeprom_index;
+
+    check_p(g_eeprom_drv);
+    check_p(g_eeprom_drv->get_eeprom_tag);
+
+    eeprom_index = obj->index;
+    EEPROM_DBG("get eeprom tag, eeprom index: %u\n", eeprom_index);
+    return g_eeprom_drv->get_eeprom_tag(eeprom_index, buf, PAGE_SIZE);
+}
+
+static ssize_t eeprom_type_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int eeprom_index;
+
+    check_p(g_eeprom_drv);
+    check_p(g_eeprom_drv->get_eeprom_type);
+
+    eeprom_index = obj->index;
+    EEPROM_DBG("get eeprom type, eeprom index: %u\n", eeprom_index);
+    return g_eeprom_drv->get_eeprom_type(eeprom_index, buf, PAGE_SIZE);
+}
+
+static ssize_t eeprom_eeprom_read(struct file *filp, struct kobject *kobj, struct bin_attribute *attr,
+                   char *buf, loff_t offset, size_t count)
+{
+    struct switch_obj *eeprom_obj;
+    ssize_t rd_len;
+    unsigned int eeprom_index;
+
+    check_p(g_eeprom_drv);
+    check_p(g_eeprom_drv->read_eeprom_data);
+
+    eeprom_obj = to_switch_obj(kobj);
+    eeprom_index = eeprom_obj->index;
+    mem_clear(buf, count);
+    rd_len = g_eeprom_drv->read_eeprom_data(eeprom_index, buf, offset, count);
+    if (rd_len < 0) {
+        EEPROM_ERR("read eeprom%u eeprom data error, offset: 0x%llx, read len: %lu, ret: %ld.\n",
+            eeprom_index, offset, count, rd_len);
+        return rd_len;
+    }
+
+    EEPROM_DBG("read eeprom%u eeprom data success, offset:0x%llx, read len:%lu, really read len:%ld.\n",
+        eeprom_index, offset, count, rd_len);
+
+    return rd_len;
+}
+
+static ssize_t eeprom_eeprom_write(struct file *filp, struct kobject *kobj, struct bin_attribute *attr,
+                   char *buf, loff_t offset, size_t count)
+{
+    struct switch_obj *eeprom_obj;
+    ssize_t wr_len;
+    unsigned int eeprom_index;
+
+    check_p(g_eeprom_drv);
+    check_p(g_eeprom_drv->write_eeprom_data);
+
+    eeprom_obj = to_switch_obj(kobj);
+    eeprom_index = eeprom_obj->index;
+    wr_len = g_eeprom_drv->write_eeprom_data(eeprom_index, buf, offset, count);
+    if (wr_len < 0) {
+        EEPROM_ERR("write eeprom%u eeprom data error, offset: 0x%llx, read len: %lu, ret: %ld.\n",
+            eeprom_index, offset, count, wr_len);
+        return wr_len;
+    }
+
+    EEPROM_DBG("write eeprom%u eeprom data success, offset:0x%llx, write len:%lu, really write len:%ld.\n",
+        eeprom_index, offset, count, wr_len);
+
+    return wr_len;
+}
+
+/************************************eeprom* signal attrs*******************************************/
+static struct switch_attribute eeprom_alias_attr = __ATTR(alias, S_IRUGO | S_IWUSR, eeprom_alias_show, NULL);
+static struct switch_attribute eeprom_tag_attr = __ATTR(tag, S_IRUGO | S_IWUSR, eeprom_tag_show, NULL);
+static struct switch_attribute eeprom_size_attr = __ATTR(size, S_IRUGO, eeprom_size_show, NULL);
+static struct switch_attribute eeprom_type_attr = __ATTR(type, S_IRUGO | S_IWUSR, eeprom_type_show, NULL);
+
+static struct attribute *eeprom_signal_attrs[] = {
+    &eeprom_alias_attr.attr,
+    &eeprom_tag_attr.attr,
+    &eeprom_size_attr.attr,
+    &eeprom_type_attr.attr,
+    NULL,
+};
+
+static struct attribute_group eeprom_signal_attr_group = {
+    .attrs = eeprom_signal_attrs,
+};
+
+/*******************************eeprom dir and attrs*******************************************/
+static struct switch_attribute eeprom_number_attr = __ATTR(number, S_IRUGO, eeprom_number_show, NULL);
+
+static struct attribute *eeprom_dir_attrs[] = {
+    &eeprom_number_attr.attr,
+    NULL,
+};
+
+static struct attribute_group eeprom_eeprom_attr_group = {
+    .attrs = eeprom_dir_attrs,
+};
+
+/* create eeprom* eeprom attributes */
+static int eeprom_sub_single_create_eeprom_attrs(unsigned int index)
+{
+    int ret, eeprom_size;
+    struct eeprom_obj_s *curr_eeprom;
+
+    check_p(g_eeprom_drv->get_eeprom_size);
+    eeprom_size = g_eeprom_drv->get_eeprom_size(index);
+    if (eeprom_size <= 0) {
+        EEPROM_ERR("Invalid eeprom size, eeprom index: %u, eeprom_size: %d\n",
+                 index, eeprom_size);
+        return -EINVAL;
+    }
+
+    curr_eeprom = &g_eeprom.eeprom[index - 1];
+    sysfs_bin_attr_init(&curr_eeprom->bin);
+    curr_eeprom->bin.attr.name = "data";
+    curr_eeprom->bin.attr.mode = 0644;
+    curr_eeprom->bin.read = eeprom_eeprom_read;
+    curr_eeprom->bin.write = eeprom_eeprom_write;
+    curr_eeprom->bin.size = eeprom_size;
+
+    ret = sysfs_create_bin_file(&curr_eeprom->eeprom_obj->kobj, &curr_eeprom->bin);
+    if (ret) {
+        EEPROM_ERR("eeprom%u, create eeprom bin error, ret: %d. \n", index, ret);
+        return -EBADRQC;
+    }
+
+    EEPROM_DBG("eeprom%u, create bin file success, eeprom size: %d.\n", index, eeprom_size);
+    curr_eeprom->eeprom_creat_bin_flag = 1;
+    return 0;
+}
+
+static int eeprom_sub_single_create_kobj(struct kobject *parent, unsigned int index)
+{
+    struct eeprom_obj_s *curr_eeprom;
+    char eeprom_dir_name[DIR_NAME_MAX_LEN];
+
+    curr_eeprom = &g_eeprom.eeprom[index - 1];
+    mem_clear(eeprom_dir_name, sizeof(eeprom_dir_name));
+    snprintf(eeprom_dir_name, sizeof(eeprom_dir_name), "eeprom%d", index);
+    curr_eeprom->eeprom_obj = switch_kobject_create(eeprom_dir_name, parent);
+    if (!curr_eeprom->eeprom_obj) {
+        EEPROM_ERR("create eeprom%d object error! \n", index);
+        return -EBADRQC;
+    }
+    curr_eeprom->eeprom_obj->index = index;
+    if (sysfs_create_group(&curr_eeprom->eeprom_obj->kobj, &eeprom_signal_attr_group) != 0) {
+        switch_kobject_delete(&curr_eeprom->eeprom_obj);
+        return -EBADRQC;
+    }
+
+    EEPROM_DBG("create eeprom%d dir and attrs success\n", index);
+    return 0;
+}
+
+/* remove eeprom directory and attributes */
+static void eeprom_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct eeprom_obj_s *curr_eeprom;
+
+    curr_eeprom = &g_eeprom.eeprom[index - 1];
+    if (curr_eeprom->eeprom_obj) {
+        if (curr_eeprom->eeprom_creat_bin_flag) {
+            sysfs_remove_bin_file(&curr_eeprom->eeprom_obj->kobj, &curr_eeprom->bin);
+            curr_eeprom->eeprom_creat_bin_flag = 0;
+        }
+        sysfs_remove_group(&curr_eeprom->eeprom_obj->kobj, &eeprom_signal_attr_group);
+        switch_kobject_delete(&curr_eeprom->eeprom_obj);
+    }
+
+    return;
+}
+
+static int eeprom_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
+{
+    int ret;
+
+    ret = eeprom_sub_single_create_kobj(parent, index);
+    if (ret < 0) {
+        EEPROM_ERR("create eeprom%d dir error.\n", index);
+        return ret;
+    }
+
+    ret = eeprom_sub_single_create_eeprom_attrs(index);
+    if (ret < 0) {
+        eeprom_sub_single_remove_kobj_and_attrs(index);
+        EEPROM_ERR("create eeprom%d data error.\n", index);
+        return ret;
+    }
+    return 0;
+}
+
+static int eeprom_sub_create_kobj_and_attrs(struct kobject *parent, int eeprom_num)
+{
+    unsigned int eeprom_index, i;
+
+    g_eeprom.eeprom = kzalloc(sizeof(struct eeprom_obj_s) * eeprom_num, GFP_KERNEL);
+    if (!g_eeprom.eeprom) {
+        EEPROM_ERR("kzalloc g_eeprom.eeprom error, eeprom number = %d.\n", eeprom_num);
+        return -ENOMEM;
+    }
+
+    for (eeprom_index = 1; eeprom_index <= eeprom_num; eeprom_index++) {
+        if (eeprom_sub_single_create_kobj_and_attrs(parent, eeprom_index) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = eeprom_index; i > 0; i--) {
+        eeprom_sub_single_remove_kobj_and_attrs(i);
+    }
+    kfree(g_eeprom.eeprom);
+    g_eeprom.eeprom = NULL;
+    return -EBADRQC;
+}
+
+/* create eeprom directory and attributes */
+static int eeprom_sub_create(void)
+{
+    int ret;
+
+    ret = eeprom_sub_create_kobj_and_attrs(&g_eeprom_obj->kobj, g_eeprom.eeprom_number);
+    return ret;
+}
+
+/* delete eeprom directory and attributes */
+static void eeprom_sub_remove(void)
+{
+    unsigned int eeprom_index;
+
+    if (g_eeprom.eeprom) {
+        for (eeprom_index = g_eeprom.eeprom_number; eeprom_index > 0; eeprom_index--) {
+            eeprom_sub_single_remove_kobj_and_attrs(eeprom_index);
+        }
+        kfree(g_eeprom.eeprom);
+        g_eeprom.eeprom = NULL;
+    }
+    g_eeprom.eeprom_number = 0;
+    return;
+}
+
+/* create eeprom directory and attributes */
+static int eeprom_eeprom_create(void)
+{
+    g_eeprom_obj = switch_kobject_create("eeprom", NULL);
+    if (!g_eeprom_obj) {
+        EEPROM_ERR("switch_kobject_create eeprom error!\n");
+        return -ENOMEM;
+    }
+    g_eeprom_obj->index = 0;
+    if (sysfs_create_group(&g_eeprom_obj->kobj, &eeprom_eeprom_attr_group) != 0) {
+        switch_kobject_delete(&g_eeprom_obj);
+        EEPROM_ERR("create eeprom dir attrs error!\n");
+        return -EBADRQC;
+    }
+    return 0;
+}
+
+/* delete eeprom directory and attributes */
+static void eeprom_eeprom_remove(void)
+{
+    if (g_eeprom_obj) {
+        sysfs_remove_group(&g_eeprom_obj->kobj, &eeprom_eeprom_attr_group);
+        switch_kobject_delete(&g_eeprom_obj);
+    }
+
+    return;
+}
+
+int s3ip_sysfs_eeprom_drivers_register(struct s3ip_sysfs_eeprom_drivers_s *drv)
+{
+    int ret, eeprom_num;
+
+    EEPROM_INFO("s3ip_sysfs_eeprom_drivers_register...\n");
+    if (g_eeprom_drv) {
+        EEPROM_ERR("g_eeprom_drv is not NULL, can't register\n");
+        return -EPERM;
+    }
+
+    check_p(drv);
+    check_p(drv->get_eeprom_number);
+    g_eeprom_drv = drv;
+
+    eeprom_num = g_eeprom_drv->get_eeprom_number();
+    if (eeprom_num <= 0) {
+        EEPROM_ERR("eeprom number: %d, don't need to create eeprom dirs and attrs.\n", eeprom_num);
+        g_eeprom_drv = NULL;
+        return -EINVAL;
+    }
+
+    mem_clear(&g_eeprom, sizeof(struct eeprom_s));
+    g_eeprom.eeprom_number = eeprom_num;
+    ret = eeprom_eeprom_create();
+    if (ret < 0) {
+        EEPROM_ERR("create eeprom root dir and attrs failed, ret: %d\n", ret);
+        g_eeprom_drv = NULL;
+        return ret;
+    }
+    ret = eeprom_sub_create();
+    if (ret < 0) {
+        EEPROM_ERR("create eeprom sub dir and attrs failed, ret: %d\n", ret);
+        eeprom_eeprom_remove();
+        g_eeprom_drv = NULL;
+        return ret;
+    }
+    EEPROM_INFO("s3ip_sysfs_eeprom_drivers_register success\n");
+    return ret;
+}
+
+void s3ip_sysfs_eeprom_drivers_unregister(void)
+{
+    if (g_eeprom_drv) {
+        eeprom_sub_remove();
+        eeprom_eeprom_remove();
+        g_eeprom_drv = NULL;
+        EEPROM_DBG("s3ip_sysfs_eeprom_drivers_unregister success.\n");
+    }
+    return;
+}
+
+EXPORT_SYMBOL(s3ip_sysfs_eeprom_drivers_register);
+EXPORT_SYMBOL(s3ip_sysfs_eeprom_drivers_unregister);
+module_param(g_eeprom_loglevel, int, 0644);
+MODULE_PARM_DESC(g_eeprom_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/fan_sysfs.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/fan_sysfs.c
new file mode 100644
index 000000000000..e1b9b56d3ab5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/fan_sysfs.c
@@ -0,0 +1,777 @@
+/*
+ * An fan_sysfs driver for fan sysfs devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+
+#include "switch.h"
+#include "fan_sysfs.h"
+
+static int g_fan_loglevel = 0;
+static bool g_fan_status_debug  = 0;
+
+#define FAN_INFO(fmt, args...) do {                                        \
+    if (g_fan_loglevel & INFO) { \
+        printk(KERN_INFO "[FAN_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define FAN_ERR(fmt, args...) do {                                        \
+    if (g_fan_loglevel & ERR) { \
+        printk(KERN_ERR "[FAN_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define FAN_DBG(fmt, args...) do {                                        \
+    if (g_fan_loglevel & DBG) { \
+        printk(KERN_DEBUG "[FAN_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct motor_obj_s {
+    struct switch_obj *obj;
+};
+
+struct fan_obj_s {
+    unsigned int motor_number;
+    struct motor_obj_s *motor;
+    struct switch_obj *obj;
+};
+
+struct fan_s {
+    unsigned int fan_number;
+    struct fan_obj_s *fan;
+};
+
+static struct fan_s g_fan;
+static struct switch_obj *g_fan_obj = NULL;
+static struct s3ip_sysfs_fan_drivers_s *g_fan_drv = NULL;
+
+static ssize_t fan_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", g_fan.fan_number);
+}
+
+static ssize_t fan_motor_number_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int index;
+
+    index = obj->index;
+    FAN_DBG("fan_motor_number_show, fan index: %u\n", index);
+
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%u\n", g_fan.fan[index - 1].motor_number);
+}
+
+static ssize_t fan_model_name_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int fan_index;
+
+    check_p(g_fan_drv);
+    check_p(g_fan_drv->get_fan_model_name);
+
+    fan_index = obj->index;
+    FAN_DBG("fan index: %u\n", fan_index);
+    return g_fan_drv->get_fan_model_name(fan_index, buf, PAGE_SIZE);
+}
+
+static ssize_t fan_vendor_show(struct switch_obj *obj, struct switch_attribute *attr,
+                               char *buf)
+{
+    unsigned int fan_index;
+
+    check_p(g_fan_drv);
+    check_p(g_fan_drv->get_fan_vendor);
+
+    fan_index = obj->index;
+    FAN_DBG("fan index: %u\n", fan_index);
+    return g_fan_drv->get_fan_vendor(fan_index, buf, PAGE_SIZE);
+}
+
+static ssize_t fan_sn_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int fan_index;
+
+    check_p(g_fan_drv);
+    check_p(g_fan_drv->get_fan_serial_number);
+
+    fan_index = obj->index;
+    FAN_DBG("fan index: %u\n", fan_index);
+    return g_fan_drv->get_fan_serial_number(fan_index, buf, PAGE_SIZE);
+}
+
+static ssize_t fan_pn_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int fan_index;
+
+    check_p(g_fan_drv);
+    check_p(g_fan_drv->get_fan_part_number);
+
+    fan_index = obj->index;
+    FAN_DBG("fan index: %u\n", fan_index);
+    return g_fan_drv->get_fan_part_number(fan_index, buf, PAGE_SIZE);
+}
+
+static ssize_t fan_hw_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int fan_index;
+
+    check_p(g_fan_drv);
+    check_p(g_fan_drv->get_fan_hardware_version);
+
+    fan_index = obj->index;
+    FAN_DBG("fan index: %u\n", fan_index);
+    return g_fan_drv->get_fan_hardware_version(fan_index, buf, PAGE_SIZE);
+}
+
+static ssize_t fan_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int fan_index;
+    int ret, res;
+    char debug_file_buf[DEBUG_FILE_SIZE];
+
+    check_p(g_fan_drv);
+    check_p(g_fan_drv->get_fan_status);
+
+    fan_index = obj->index;
+    FAN_DBG("fan index: %u\n", fan_index);
+    ret = g_fan_drv->get_fan_status(fan_index, buf, PAGE_SIZE);
+    if (ret < 0) {
+        FAN_ERR("get fan%u status failed, ret: %d\n", fan_index, ret);
+        return ret;
+    }
+
+    if (g_fan_status_debug) {
+        FAN_INFO("s3ip sysfs fan status debug is enable\n");
+
+        if ((strncmp(buf, SWITCH_DEV_NO_SUPPORT, strlen(SWITCH_DEV_NO_SUPPORT)) == 0) || (strncmp(buf, SWITCH_DEV_ERROR, strlen(SWITCH_DEV_ERROR)) == 0)) {
+            FAN_DBG("fan%d status sysfs unsupport or error\n", fan_index);
+            return ret;
+        }
+
+        if (strcmp(buf, FAN_ABSENT_STR) == 0) {
+            FAN_DBG("fan%d absent, return act value\n", fan_index);
+            return ret;
+        }
+
+        mem_clear(debug_file_buf, sizeof(debug_file_buf));
+        res = dev_debug_file_read(SINGLE_FAN_STATUS_DEBUG_FILE, fan_index, debug_file_buf, sizeof(debug_file_buf));
+        if (res) {
+            FAN_ERR("fan%u status debug file read failed, ret: %d\n", fan_index, res);
+            return ret;
+        }
+
+        if ((strcmp(debug_file_buf, FAN_ABSENT_STR) == 0) || (strcmp(debug_file_buf, FAN_OK_STR) == 0) || (strcmp(debug_file_buf, FAN_NOTOK_STR) == 0)) {
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%s", debug_file_buf);
+        } else {
+            FAN_ERR("fan%d status debug file value err, value: %s, not 0 1 or 2\n", fan_index, debug_file_buf);
+            return ret;
+        }
+    }
+    return ret;
+}
+
+static ssize_t fan_present_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int fan_index;
+
+    check_p(g_fan_drv);
+    check_p(g_fan_drv->get_fan_present);
+
+    fan_index = obj->index;
+    FAN_DBG("fan index: %u\n", fan_index);
+    return g_fan_drv->get_fan_present(fan_index, buf, PAGE_SIZE);
+}
+
+static ssize_t fan_led_status_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int fan_index;
+
+    check_p(g_fan_drv);
+    check_p(g_fan_drv->get_fan_led_status);
+
+    fan_index = obj->index;
+    FAN_DBG("fan index: %u\n", fan_index);
+    return g_fan_drv->get_fan_led_status(fan_index, buf, PAGE_SIZE);
+}
+
+static ssize_t fan_led_status_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char *buf, size_t count)
+{
+    unsigned int fan_index;
+    int ret, led_status;
+
+    check_p(g_fan_drv);
+    check_p(g_fan_drv->set_fan_led_status);
+
+    fan_index = obj->index;
+    ret = kstrtoint(buf, 0, &led_status);
+    if (ret != 0) {
+        FAN_ERR("invaild fan led status ret: %d, buf: %s.\n", ret, buf);
+        return -EINVAL;
+    }
+    FAN_DBG("fan index: %u, led_status: %d\n", fan_index, led_status);
+    ret = g_fan_drv->set_fan_led_status(fan_index, led_status);
+    if (ret < 0) {
+        FAN_ERR("set fan%u led_status: %d failed, ret: %d\n", fan_index, led_status, ret);
+        return ret;
+    }
+    FAN_DBG("set fan%u led_status: %d success\n", fan_index, led_status);
+    return count;
+}
+
+static ssize_t fan_motor_status_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int fan_index, motor_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_fan_drv);
+    check_p(g_fan_drv->get_fan_motor_status);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    fan_index = p_obj->index;
+    motor_index = obj->index;
+    FAN_DBG("fan index: %u, motor index: %d\n", fan_index, motor_index);
+    return g_fan_drv->get_fan_motor_status(fan_index, motor_index, buf, PAGE_SIZE);
+}
+
+static ssize_t fan_motor_speed_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int fan_index, motor_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_fan_drv);
+    check_p(g_fan_drv->get_fan_motor_speed);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    fan_index = p_obj->index;
+    motor_index = obj->index;
+    FAN_DBG("fan index: %u, motor index: %d\n", fan_index, motor_index);
+    return g_fan_drv->get_fan_motor_speed(fan_index, motor_index, buf, PAGE_SIZE);
+}
+
+static ssize_t fan_motor_speed_tolerance_show(struct switch_obj *obj,
+                   struct switch_attribute *attr, char *buf)
+{
+    unsigned int fan_index, motor_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_fan_drv);
+    check_p(g_fan_drv->get_fan_motor_speed_tolerance);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    fan_index = p_obj->index;
+    motor_index = obj->index;
+    FAN_DBG("fan index: %u, motor index: %d\n", fan_index, motor_index);
+    return g_fan_drv->get_fan_motor_speed_tolerance(fan_index, motor_index, buf, PAGE_SIZE);
+}
+
+static ssize_t fan_motor_speed_target_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int fan_index, motor_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_fan_drv);
+    check_p(g_fan_drv->get_fan_motor_speed_target);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    fan_index = p_obj->index;
+    motor_index = obj->index;
+    FAN_DBG("fan index: %u, motor index: %d\n", fan_index, motor_index);
+    return g_fan_drv->get_fan_motor_speed_target(fan_index, motor_index, buf, PAGE_SIZE);
+}
+
+static ssize_t fan_motor_speed_max_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int fan_index, motor_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_fan_drv);
+    check_p(g_fan_drv->get_fan_motor_speed_max);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    fan_index = p_obj->index;
+    motor_index = obj->index;
+    FAN_DBG("fan index: %u, motor index: %d\n", fan_index, motor_index);
+    return g_fan_drv->get_fan_motor_speed_max(fan_index, motor_index, buf, PAGE_SIZE);
+}
+
+static ssize_t fan_motor_speed_min_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int fan_index, motor_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_fan_drv);
+    check_p(g_fan_drv->get_fan_motor_speed_min);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    fan_index = p_obj->index;
+    motor_index = obj->index;
+    FAN_DBG("fan index: %u, motor index: %d\n", fan_index, motor_index);
+    return g_fan_drv->get_fan_motor_speed_min(fan_index, motor_index, buf, PAGE_SIZE);
+}
+
+ssize_t fan_ratio_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int fan_index;
+
+    check_p(g_fan_drv);
+    check_p(g_fan_drv->get_fan_ratio);
+
+    fan_index = obj->index;
+    FAN_DBG("fan index: %u\n", fan_index);
+    return g_fan_drv->get_fan_ratio(fan_index, buf, PAGE_SIZE);
+}
+
+static ssize_t fan_ratio_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int fan_index;
+    int ret, ratio;
+
+    check_p(g_fan_drv);
+    check_p(g_fan_drv->set_fan_ratio);
+
+    fan_index = obj->index;
+
+    ret = kstrtoint(buf, 0, &ratio);
+    if (ret != 0) {
+        FAN_ERR("invaild fan ratio ret: %d, buf: %s.\n", ret, buf);
+        return -EINVAL;
+    }
+
+    if (ratio < 0 || ratio > 100) {
+        FAN_ERR("param invalid, can not set ratio: %d.\n", ratio);
+        return -EINVAL;
+    }
+    FAN_DBG("fan index: %u, ratio: %d\n", fan_index, ratio);
+    ret = g_fan_drv->set_fan_ratio(fan_index, ratio);
+    if (ret < 0) {
+        FAN_ERR("set fan%u  ratio: %d failed, ret: %d\n", fan_index, ratio, ret);
+        return ret;
+    }
+    FAN_DBG("set fan%u, ratio: %d success\n", fan_index, ratio);
+    return count;
+}
+
+ssize_t fan_direction_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int fan_index;
+
+    check_p(g_fan_drv);
+    check_p(g_fan_drv->get_fan_direction);
+
+    fan_index = obj->index;
+    FAN_DBG("fan index: %u\n", fan_index);
+    return g_fan_drv->get_fan_direction(fan_index, buf, PAGE_SIZE);
+}
+
+/************************************fan dir and attrs*******************************************/
+static struct switch_attribute fan_number_att = __ATTR(number, S_IRUGO, fan_number_show, NULL);
+
+static struct attribute *fan_dir_attrs[] = {
+    &fan_number_att.attr,
+    NULL,
+};
+
+static struct attribute_group fan_root_attr_group = {
+    .attrs = fan_dir_attrs,
+};
+
+/*******************************fan1 fan2 dir and attrs*******************************************/
+static struct switch_attribute fan_model_name_attr = __ATTR(model_name, S_IRUGO, fan_model_name_show, NULL);
+static struct switch_attribute fan_vendor_attr = __ATTR(vendor, S_IRUGO, fan_vendor_show, NULL);
+static struct switch_attribute fan_sn_attr = __ATTR(serial_number, S_IRUGO, fan_sn_show, NULL);
+static struct switch_attribute fan_pn_attr = __ATTR(part_number, S_IRUGO, fan_pn_show, NULL);
+static struct switch_attribute fan_hw_attr = __ATTR(hardware_version, S_IRUGO, fan_hw_show, NULL);
+static struct switch_attribute fan_num_motors_attr = __ATTR(motor_number, S_IRUGO, fan_motor_number_show, NULL);
+static struct switch_attribute fan_status_attr = __ATTR(status, S_IRUGO, fan_status_show, NULL);
+static struct switch_attribute fan_present_attr = __ATTR(present, S_IRUGO, fan_present_show, NULL);
+static struct switch_attribute fan_led_status_attr = __ATTR(led_status, S_IRUGO | S_IWUSR, fan_led_status_show, fan_led_status_store);
+static struct switch_attribute fan_direction_attr = __ATTR(direction, S_IRUGO, fan_direction_show, NULL);
+static struct switch_attribute fan_ratio_attr = __ATTR(ratio, S_IRUGO | S_IWUSR, fan_ratio_show, fan_ratio_store);
+
+static struct attribute *fan_attrs[] = {
+    &fan_model_name_attr.attr,
+    &fan_vendor_attr.attr,
+    &fan_sn_attr.attr,
+    &fan_pn_attr.attr,
+    &fan_hw_attr.attr,
+    &fan_num_motors_attr.attr,
+    &fan_status_attr.attr,
+    &fan_present_attr.attr,
+    &fan_led_status_attr.attr,
+    &fan_direction_attr.attr,
+    &fan_ratio_attr.attr,
+    NULL,
+};
+
+static struct attribute_group fan_attr_group = {
+    .attrs = fan_attrs,
+};
+
+/*******************************motor1 motor2 dir and attrs*******************************************/
+static struct switch_attribute motor_status_attr = __ATTR(status, S_IRUGO, fan_motor_status_show, NULL);
+static struct switch_attribute motor_speed_attr = __ATTR(speed, S_IRUGO, fan_motor_speed_show, NULL);
+static struct switch_attribute motor_speed_tolerance_attr = __ATTR(speed_tolerance, S_IRUGO, fan_motor_speed_tolerance_show, NULL);
+static struct switch_attribute motor_speed_target_attr = __ATTR(speed_target, S_IRUGO, fan_motor_speed_target_show, NULL);
+static struct switch_attribute motor_speed_max_attr = __ATTR(speed_max, S_IRUGO, fan_motor_speed_max_show, NULL);
+static struct switch_attribute motor_speed_min_attr = __ATTR(speed_min, S_IRUGO, fan_motor_speed_min_show, NULL);
+
+static struct attribute *motor_attrs[] = {
+    &motor_status_attr.attr,
+    &motor_speed_attr.attr,
+    &motor_speed_tolerance_attr.attr,
+    &motor_speed_target_attr.attr,
+    &motor_speed_max_attr.attr,
+    &motor_speed_min_attr.attr,
+    NULL,
+};
+
+static struct attribute_group motor_attr_group = {
+    .attrs = motor_attrs,
+};
+
+static void fanindex_single_motor_remove_kobj_and_attrs(struct fan_obj_s *curr_fan, unsigned int motor_index)
+{
+    struct motor_obj_s *curr_motor; /* point to motor1 motor2...*/
+
+    curr_motor = &curr_fan->motor[motor_index - 1];
+    if (curr_motor->obj) {
+        sysfs_remove_group(&curr_motor->obj->kobj, &motor_attr_group);
+        switch_kobject_delete(&curr_motor->obj);
+        FAN_DBG("delete fan%u motor%u dir and attrs success.\n", curr_fan->obj->index,
+            motor_index);
+    }
+    return;
+}
+
+static int fanindex_single_motor_create_kobj_and_attrs(struct fan_obj_s *curr_fan, unsigned int motor_index)
+{
+    char name[8];
+    struct motor_obj_s *curr_motor; /* point to motor1 motor2...*/
+
+    curr_motor = &curr_fan->motor[motor_index - 1];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "motor%u", motor_index);
+    curr_motor->obj = switch_kobject_create(name, &curr_fan->obj->kobj);
+    if (!curr_motor->obj) {
+        FAN_ERR("create fan%u, motor%u object error!\n", curr_fan->obj->index, motor_index);
+        return -ENOMEM;
+    }
+
+    curr_motor->obj->index = motor_index;
+    if (sysfs_create_group(&curr_motor->obj->kobj, &motor_attr_group) != 0) {
+        FAN_ERR("create fan%u, motor%u attrs error.\n", curr_fan->obj->index, motor_index);
+        switch_kobject_delete(&curr_motor->obj);
+        return -EBADRQC;
+    }
+    FAN_DBG("create fan%u, motor%u dir and attrs success.\n", curr_fan->obj->index, motor_index);
+    return 0;
+}
+
+/* create motor[1-n] directory and attributes in fan directory */
+static int fanindex_motor_create_kobj_and_attrs(struct fan_obj_s *curr_fan)
+{
+    unsigned int motor_index, i, motor_num;
+
+    motor_num = curr_fan->motor_number;
+    curr_fan->motor = kzalloc(sizeof(struct motor_obj_s) * motor_num, GFP_KERNEL);
+    if (!curr_fan->motor) {
+        FAN_ERR("kzalloc motor error, fan index: %u, motor number: %d.\n",
+            curr_fan->obj->index, motor_num);
+        return -ENOMEM;
+    }
+    for (motor_index = 1; motor_index <= motor_num; motor_index++) {
+        if (fanindex_single_motor_create_kobj_and_attrs(curr_fan, motor_index) != 0) {
+            goto motor_error;
+        }
+    }
+    return 0;
+motor_error:
+    for (i = motor_index; i > 0; i--) {
+        fanindex_single_motor_remove_kobj_and_attrs(curr_fan, i);
+    }
+    kfree(curr_fan->motor);
+    curr_fan->motor = NULL;
+    return -EBADRQC;
+}
+
+/* delete motor[1-n] directory and attributes in fan directory */
+static void fanindex_motor_remove_kobj_and_attrs(struct fan_obj_s *curr_fan)
+{
+    unsigned int motor_index, motor_num;
+
+    if (curr_fan->motor) {
+        motor_num = curr_fan->motor_number;
+        for (motor_index = motor_num; motor_index > 0; motor_index--) {
+            fanindex_single_motor_remove_kobj_and_attrs(curr_fan, motor_index);
+        }
+        kfree(curr_fan->motor);
+        curr_fan->motor = NULL;
+    }
+
+    return;
+}
+
+/* create motor[1-n] directory and attributes */
+static int fan_motor_create(void)
+{
+    int fan_num, motor_num;
+    unsigned int fan_index, i;
+    struct fan_obj_s *curr_fan;     /* point to fan1 fan2...*/
+
+    fan_num = g_fan.fan_number;
+    if (fan_num <= 0) {
+        FAN_DBG("fan number: %d, skip to create motor* dirs and attrs.\n", fan_num);
+        return 0;
+    }
+
+    check_p(g_fan_drv->get_fan_motor_number);
+
+    for (fan_index = 1; fan_index <= fan_num; fan_index++) {
+        motor_num = g_fan_drv->get_fan_motor_number(fan_index);
+        if (motor_num <= 0) {
+            FAN_DBG("fan%u motor number: %d, don't need to create motor* dirs and attrs.\n",
+                fan_index, motor_num);
+            continue;
+        }
+        curr_fan = &g_fan.fan[fan_index - 1];
+        curr_fan->motor_number = motor_num;
+        if (fanindex_motor_create_kobj_and_attrs(curr_fan) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = fan_index; i > 0; i--) {
+        curr_fan = &g_fan.fan[i - 1];
+        fanindex_motor_remove_kobj_and_attrs(curr_fan);
+    }
+    return -EBADRQC;
+}
+
+/* delete motor[1-n] directory and attributes */
+static void fan_motor_remove(void)
+{
+    unsigned int fan_index;
+    struct fan_obj_s *curr_fan;
+
+    if (g_fan.fan) {
+        for (fan_index = g_fan.fan_number; fan_index > 0; fan_index--) {
+            curr_fan = &g_fan.fan[fan_index - 1];
+            fanindex_motor_remove_kobj_and_attrs(curr_fan);
+            curr_fan->motor_number = 0;
+        }
+    }
+    return;
+}
+
+static int fan_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct fan_obj_s *curr_fan;
+
+    curr_fan = &g_fan.fan[index - 1];
+    if (curr_fan->obj) {
+        sysfs_remove_group(&curr_fan->obj->kobj, &fan_attr_group);
+        switch_kobject_delete(&curr_fan->obj);
+        FAN_DBG("delete fan%u dir and attrs success.\n", index);
+    }
+    return 0;
+}
+
+static int fan_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
+{
+    char name[8];
+    struct fan_obj_s *curr_fan;
+
+    curr_fan = &g_fan.fan[index - 1];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "fan%u", index);
+    curr_fan->obj = switch_kobject_create(name, parent);
+    if (!curr_fan->obj) {
+        FAN_ERR("create %s object error!\n", name);
+        return -ENOMEM;
+    }
+
+    curr_fan->obj->index = index;
+    if (sysfs_create_group(&curr_fan->obj->kobj, &fan_attr_group) != 0) {
+        FAN_ERR("create %s attrs error.\n", name);
+        switch_kobject_delete(&curr_fan->obj);
+        return -EBADRQC;
+    }
+    FAN_DBG("create %s dir and attrs success.\n", name);
+    return 0;
+}
+
+/* create fan[1-n] directory and attributes */
+static int fan_sub_create_kobj_and_attrs(struct kobject *parent, int fan_num)
+{
+    unsigned int fan_index, i;
+
+    g_fan.fan = kzalloc(sizeof(struct fan_obj_s) * fan_num, GFP_KERNEL);
+    if (!g_fan.fan) {
+        FAN_ERR("kzalloc fan.fan error, fan number: %d.\n", fan_num);
+        return -ENOMEM;
+    }
+
+    for (fan_index = 1; fan_index <= fan_num; fan_index++) {
+        if (fan_sub_single_create_kobj_and_attrs(parent, fan_index) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = fan_index; i > 0; i--) {
+        fan_sub_single_remove_kobj_and_attrs(i);
+    }
+    kfree(g_fan.fan);
+    g_fan.fan = NULL;
+    return -EBADRQC;
+}
+
+static int fan_sub_create(void)
+{
+    int ret;
+
+    ret = fan_sub_create_kobj_and_attrs(&g_fan_obj->kobj, g_fan.fan_number);
+    return ret;
+}
+
+/* delete fan[1-n] directory and attributes */
+static void fan_sub_remove(void)
+{
+    unsigned int fan_index;
+
+    if (g_fan.fan) {
+        for (fan_index = g_fan.fan_number; fan_index > 0; fan_index--) {
+            fan_sub_single_remove_kobj_and_attrs(fan_index);
+        }
+        kfree(g_fan.fan);
+        g_fan.fan = NULL;
+    }
+    g_fan.fan_number = 0;
+
+    return;
+}
+
+/* create fan directory and number attributes */
+static int fan_root_create(void)
+{
+    g_fan_obj = switch_kobject_create("fan", NULL);
+    if (!g_fan_obj) {
+        FAN_ERR("switch_kobject_create fan error!\n");
+        return -ENOMEM;
+    }
+
+    if (sysfs_create_group(&g_fan_obj->kobj, &fan_root_attr_group) != 0) {
+        switch_kobject_delete(&g_fan_obj);
+        FAN_ERR("create fan dir attrs error!\n");
+        return -EBADRQC;
+    }
+    return 0;
+}
+
+/* delete fan directory and number attributes */
+static void fan_root_remove(void)
+{
+    if (g_fan_obj) {
+        sysfs_remove_group(&g_fan_obj->kobj, &fan_root_attr_group);
+        switch_kobject_delete(&g_fan_obj);
+        FAN_DBG("delete fan dir and attrs success.\n");
+    }
+    return;
+}
+
+int s3ip_sysfs_fan_drivers_register(struct s3ip_sysfs_fan_drivers_s *drv)
+{
+    int ret, fan_num;
+
+    FAN_INFO("s3ip_sysfs_fan_drivers_register...\n");
+    if (g_fan_drv) {
+        FAN_ERR("g_fan_drv is not NULL, can't register\n");
+        return -EPERM;
+    }
+
+    check_p(drv);
+    check_p(drv->get_fan_number);
+    g_fan_drv = drv;
+
+    fan_num = g_fan_drv->get_fan_number();
+    if (fan_num <= 0) {
+        FAN_ERR("fan number: %d, don't need to create fan dirs and attrs.\n", fan_num);
+        g_fan_drv = NULL;
+        return -EINVAL;
+    }
+
+    mem_clear(&g_fan, sizeof(struct fan_s));
+    g_fan.fan_number = fan_num;
+    ret = fan_root_create();
+    if (ret < 0) {
+        FAN_ERR("create fan root dir and attrs failed, ret: %d\n", ret);
+        g_fan_drv = NULL;
+        return ret;
+    }
+
+    ret = fan_sub_create();
+    if (ret < 0) {
+        FAN_ERR("create fan sub dir and attrs failed, ret: %d\n", ret);
+        fan_root_remove();
+        g_fan_drv = NULL;
+        return ret;
+    }
+
+    ret = fan_motor_create();
+    if (ret < 0) {
+        FAN_ERR("create fan motor dir and attrs failed, ret: %d\n", ret);
+        fan_sub_remove();
+        fan_root_remove();
+        g_fan_drv = NULL;
+        return ret;
+    }
+    FAN_INFO("s3ip_sysfs_fan_drivers_register success.\n");
+    return 0;
+}
+
+void s3ip_sysfs_fan_drivers_unregister(void)
+{
+    if (g_fan_drv) {
+        fan_motor_remove();
+        fan_sub_remove();
+        fan_root_remove();
+        g_fan_drv = NULL;
+        FAN_DBG("s3ip_sysfs_fan_drivers_unregister success.\n");
+    }
+    return;
+}
+
+EXPORT_SYMBOL(s3ip_sysfs_fan_drivers_register);
+EXPORT_SYMBOL(s3ip_sysfs_fan_drivers_unregister);
+module_param(g_fan_loglevel, int, 0644);
+MODULE_PARM_DESC(g_fan_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
+module_param(g_fan_status_debug, bool, 0644);
+MODULE_PARM_DESC(g_fan_status_debug, "the fan present debug switch(0: disable, 1:enable, defalut: 0).\n");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/fpga_sysfs.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/fpga_sysfs.c
new file mode 100644
index 000000000000..d0ec8dfc62f7
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/fpga_sysfs.c
@@ -0,0 +1,345 @@
+/*
+ * An fpga_sysfs driver for fpga sysfs devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+
+#include "switch.h"
+#include "fpga_sysfs.h"
+
+static int g_fpga_loglevel = 0;
+
+#define FPGA_INFO(fmt, args...) do {                                        \
+    if (g_fpga_loglevel & INFO) { \
+        printk(KERN_INFO "[FPGA_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define FPGA_ERR(fmt, args...) do {                                        \
+    if (g_fpga_loglevel & ERR) { \
+        printk(KERN_ERR "[FPGA_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define FPGA_DBG(fmt, args...) do {                                        \
+    if (g_fpga_loglevel & DBG) { \
+        printk(KERN_DEBUG "[FPGA_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct fpga_obj_s {
+    struct switch_obj *obj;
+};
+
+struct fpga_s {
+    unsigned int fpga_number;
+    struct fpga_obj_s *fpga;
+};
+
+static struct fpga_s g_fpga;
+static struct switch_obj *g_fpga_obj = NULL;
+static struct s3ip_sysfs_fpga_drivers_s *g_fpga_drv = NULL;
+
+static ssize_t fpga_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%u\n", g_fpga.fpga_number);
+}
+
+static ssize_t fpga_alias_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int fpga_index;
+
+    check_p(g_fpga_drv);
+    check_p(g_fpga_drv->get_main_board_fpga_alias);
+
+    fpga_index = obj->index;
+    FPGA_DBG("fpga index: %u\n", fpga_index);
+    return g_fpga_drv->get_main_board_fpga_alias(fpga_index, buf, PAGE_SIZE);
+}
+
+static ssize_t fpga_type_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int fpga_index;
+
+    check_p(g_fpga_drv);
+    check_p(g_fpga_drv->get_main_board_fpga_type);
+
+    fpga_index = obj->index;
+    FPGA_DBG("fpga index: %u\n", fpga_index);
+    return g_fpga_drv->get_main_board_fpga_type(fpga_index, buf, PAGE_SIZE);
+}
+
+static ssize_t fpga_fw_version_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int fpga_index;
+
+    check_p(g_fpga_drv);
+    check_p(g_fpga_drv->get_main_board_fpga_firmware_version);
+
+    fpga_index = obj->index;
+    FPGA_DBG("fpga index: %u\n", fpga_index);
+    return g_fpga_drv->get_main_board_fpga_firmware_version(fpga_index, buf, PAGE_SIZE);
+}
+
+static ssize_t fpga_board_version_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int fpga_index;
+
+    check_p(g_fpga_drv);
+    check_p(g_fpga_drv->get_main_board_fpga_board_version);
+
+    fpga_index = obj->index;
+    FPGA_DBG("fpga index: %u\n", fpga_index);
+    return g_fpga_drv->get_main_board_fpga_board_version(fpga_index, buf, PAGE_SIZE);
+}
+
+static ssize_t fpga_test_reg_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int fpga_index;
+
+    check_p(g_fpga_drv);
+    check_p(g_fpga_drv->get_main_board_fpga_test_reg);
+
+    fpga_index = obj->index;
+    FPGA_DBG("fpga index: %u\n", fpga_index);
+    return g_fpga_drv->get_main_board_fpga_test_reg(fpga_index, buf, PAGE_SIZE);
+}
+
+static ssize_t fpga_test_reg_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int fpga_index, value;
+    int ret;
+
+    check_p(g_fpga_drv);
+    check_p(g_fpga_drv->set_main_board_fpga_test_reg);
+
+    fpga_index = obj->index;
+    sscanf(buf, "0x%x", &value);
+    ret = g_fpga_drv->set_main_board_fpga_test_reg(fpga_index, value);
+    if (ret < 0) {
+        FPGA_ERR("set fpga%u test reg failed, value:0x%x, ret: %d.\n", fpga_index, value, ret);
+        return ret;
+    }
+    FPGA_DBG("set fpga%u test reg success, value: 0x%x.\n", fpga_index, value);
+    return count;
+}
+
+/************************************fpga dir and attrs*******************************************/
+static struct switch_attribute fpga_number_att = __ATTR(number, S_IRUGO, fpga_number_show, NULL);
+
+static struct attribute *fpga_dir_attrs[] = {
+    &fpga_number_att.attr,
+    NULL,
+};
+
+static struct attribute_group fpga_root_attr_group = {
+    .attrs = fpga_dir_attrs,
+};
+
+/*******************************fpga[1-n] dir and attrs*******************************************/
+static struct switch_attribute fpga_alias_attr = __ATTR(alias, S_IRUGO, fpga_alias_show, NULL);
+static struct switch_attribute fpga_type_attr = __ATTR(type, S_IRUGO, fpga_type_show, NULL);
+static struct switch_attribute fpga_fw_version_attr = __ATTR(firmware_version, S_IRUGO, fpga_fw_version_show, NULL);
+static struct switch_attribute fpga_board_version_attr = __ATTR(board_version, S_IRUGO, fpga_board_version_show, NULL);
+static struct switch_attribute fpga_test_reg_attr = __ATTR(reg_test, S_IRUGO | S_IWUSR, fpga_test_reg_show, fpga_test_reg_store);
+
+static struct attribute *fpga_attrs[] = {
+    &fpga_alias_attr.attr,
+    &fpga_type_attr.attr,
+    &fpga_fw_version_attr.attr,
+    &fpga_board_version_attr.attr,
+    &fpga_test_reg_attr.attr,
+    NULL,
+};
+
+static struct attribute_group fpga_attr_group = {
+    .attrs = fpga_attrs,
+};
+
+static int fpga_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct fpga_obj_s *curr_fpga;
+
+    curr_fpga = &g_fpga.fpga[index - 1];
+    if (curr_fpga->obj) {
+        sysfs_remove_group(&curr_fpga->obj->kobj, &fpga_attr_group);
+        switch_kobject_delete(&curr_fpga->obj);
+        FPGA_DBG("delete fpga%u dir and attrs success.\n", index);
+    }
+    return 0;
+}
+
+static int fpga_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
+{
+    char name[8];
+    struct fpga_obj_s *curr_fpga;
+
+    curr_fpga = &g_fpga.fpga[index - 1];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "fpga%u", index);
+    curr_fpga->obj = switch_kobject_create(name, parent);
+    if (!curr_fpga->obj) {
+        FPGA_ERR("create %s object error!\n", name);
+        return -EBADRQC;
+    }
+    curr_fpga->obj->index = index;
+    if (sysfs_create_group(&curr_fpga->obj->kobj, &fpga_attr_group) != 0) {
+        FPGA_ERR("create %s attrs error.\n", name);
+        switch_kobject_delete(&curr_fpga->obj);
+        return -EBADRQC;
+    }
+    FPGA_DBG("create %s dir and attrs success.\n", name);
+    return 0;
+}
+
+static int fpga_sub_create_kobj_and_attrs(struct kobject *parent, int fpga_num)
+{
+    unsigned int fpga_index, i;
+
+    g_fpga.fpga = kzalloc(sizeof(struct fpga_obj_s) * fpga_num, GFP_KERNEL);
+    if (!g_fpga.fpga) {
+        FPGA_ERR("kzalloc g_fpga.fpga error, fpga number = %d.\n", fpga_num);
+        return -ENOMEM;
+    }
+
+    for (fpga_index = 1; fpga_index <= fpga_num; fpga_index++) {
+        if (fpga_sub_single_create_kobj_and_attrs(parent, fpga_index) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = fpga_index; i > 0; i--) {
+        fpga_sub_single_remove_kobj_and_attrs(i);
+    }
+    kfree(g_fpga.fpga);
+    g_fpga.fpga = NULL;
+    return -EBADRQC;
+}
+
+/* create fpga[1-n] directory and attributes*/
+static int fpga_sub_create(void)
+{
+    int ret;
+
+    ret = fpga_sub_create_kobj_and_attrs(&g_fpga_obj->kobj, g_fpga.fpga_number);
+    return ret;
+}
+
+/* delete fpga[1-n] directory and attributes*/
+static void fpga_sub_remove(void)
+{
+    unsigned int fpga_index;
+
+    if (g_fpga.fpga) {
+        for (fpga_index = g_fpga.fpga_number; fpga_index > 0; fpga_index--) {
+            fpga_sub_single_remove_kobj_and_attrs(fpga_index);
+        }
+        kfree(g_fpga.fpga);
+        g_fpga.fpga = NULL;
+    }
+    g_fpga.fpga_number = 0;
+    return;
+}
+
+/* create fpga directory and number attributes */
+static int fpga_root_create(void)
+{
+    g_fpga_obj = switch_kobject_create("fpga", NULL);
+    if (!g_fpga_obj) {
+        FPGA_ERR("switch_kobject_create fpga error!\n");
+        return -ENOMEM;
+    }
+
+    if (sysfs_create_group(&g_fpga_obj->kobj, &fpga_root_attr_group) != 0) {
+        switch_kobject_delete(&g_fpga_obj);
+        FPGA_ERR("create fpga dir attrs error!\n");
+        return -EBADRQC;
+    }
+    return 0;
+}
+
+/* delete fpga directory and number attributes */
+static void fpga_root_remove(void)
+{
+    if (g_fpga_obj) {
+        sysfs_remove_group(&g_fpga_obj->kobj, &fpga_root_attr_group);
+        switch_kobject_delete(&g_fpga_obj);
+    }
+
+    return;
+}
+
+int s3ip_sysfs_fpga_drivers_register(struct s3ip_sysfs_fpga_drivers_s *drv)
+{
+    int ret, fpga_num;
+
+    FPGA_INFO("s3ip_sysfs_fpga_drivers_register...\n");
+    if (g_fpga_drv) {
+        FPGA_ERR("g_fpga_drv is not NULL, can't register\n");
+        return -EPERM;
+    }
+
+    check_p(drv);
+    check_p(drv->get_main_board_fpga_number);
+    g_fpga_drv = drv;
+
+    fpga_num = g_fpga_drv->get_main_board_fpga_number();
+    if (fpga_num <= 0) {
+        FPGA_ERR("fpga number: %d, don't need to create fpga dirs and attrs.\n", fpga_num);
+        g_fpga_drv = NULL;
+        return -EINVAL;
+    }
+
+    mem_clear(&g_fpga, sizeof(struct fpga_s));
+    g_fpga.fpga_number = fpga_num;
+    ret = fpga_root_create();
+    if (ret < 0) {
+        FPGA_ERR("create fpga root dir and attrs failed, ret: %d\n", ret);
+        g_fpga_drv = NULL;
+        return ret;
+    }
+    ret = fpga_sub_create();
+    if (ret < 0) {
+        FPGA_ERR("create fpga sub dir and attrs failed, ret: %d\n", ret);
+        fpga_root_remove();
+        g_fpga_drv = NULL;
+        return ret;
+    }
+    FPGA_INFO("s3ip_sysfs_fpga_drivers_register success\n");
+    return 0;
+}
+
+void s3ip_sysfs_fpga_drivers_unregister(void)
+{
+    if (g_fpga_drv) {
+        fpga_sub_remove();
+        fpga_root_remove();
+        g_fpga_drv = NULL;
+        FPGA_DBG("s3ip_sysfs_fpga_drivers_unregister success.\n");
+    }
+
+    return;
+}
+
+EXPORT_SYMBOL(s3ip_sysfs_fpga_drivers_register);
+EXPORT_SYMBOL(s3ip_sysfs_fpga_drivers_unregister);
+module_param(g_fpga_loglevel, int, 0644);
+MODULE_PARM_DESC(g_fpga_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/cpld_sysfs.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/cpld_sysfs.h
new file mode 100644
index 000000000000..2638b18c6f4c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/cpld_sysfs.h
@@ -0,0 +1,36 @@
+/*
+ * A header definition for cpld_sysfs driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _CPLD_SYSFS_H_
+#define _CPLD_SYSFS_H_
+
+struct s3ip_sysfs_cpld_drivers_s {
+    int (*get_main_board_cpld_number)(void);
+    ssize_t (*get_main_board_cpld_alias)(unsigned int cpld_index, char *buf, size_t count);
+    ssize_t (*get_main_board_cpld_type)(unsigned int cpld_index, char *buf, size_t count);
+    ssize_t (*get_main_board_cpld_firmware_version)(unsigned int cpld_index, char *buf, size_t count);
+    ssize_t (*get_main_board_cpld_board_version)(unsigned int cpld_index, char *buf, size_t count);
+    ssize_t (*get_main_board_cpld_test_reg)(unsigned int cpld_index, char *buf, size_t count);
+    int (*set_main_board_cpld_test_reg)(unsigned int cpld_index, unsigned int value);
+};
+
+extern int s3ip_sysfs_cpld_drivers_register(struct s3ip_sysfs_cpld_drivers_s *drv);
+extern void s3ip_sysfs_cpld_drivers_unregister(void);
+#endif /*_CPLD_SYSFS_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/curr_sensor_sysfs.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/curr_sensor_sysfs.h
new file mode 100644
index 000000000000..fc9bb4948a14
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/curr_sensor_sysfs.h
@@ -0,0 +1,38 @@
+/*
+ * A header definition for curr_sensor_sysfs driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _CURR_SENSOR_SYSFS_H_
+#define _CURR_SENSOR_SYSFS_H_
+
+struct s3ip_sysfs_curr_sensor_drivers_s {
+    int (*get_main_board_curr_number)(void);
+    ssize_t (*get_main_board_curr_alias)(unsigned int curr_index, char *buf, size_t count);
+    ssize_t (*get_main_board_curr_type)(unsigned int curr_index, char *buf, size_t count);
+    ssize_t (*get_main_board_curr_max)(unsigned int curr_index, char *buf, size_t count);
+    int (*set_main_board_curr_max)(unsigned int curr_index, const char *buf, size_t count);
+    ssize_t (*get_main_board_curr_min)(unsigned int curr_index, char *buf, size_t count);
+    int (*set_main_board_curr_min)(unsigned int curr_index, const char *buf, size_t count);
+    ssize_t (*get_main_board_curr_value)(unsigned int curr_index, char *buf, size_t count);
+    ssize_t (*get_main_board_curr_monitor_flag)(unsigned int curr_index, char *buf, size_t count);
+};
+
+extern int s3ip_sysfs_curr_sensor_drivers_register(struct s3ip_sysfs_curr_sensor_drivers_s *drv);
+extern void s3ip_sysfs_curr_sensor_drivers_unregister(void);
+#endif /*_CURR_SENSOR_SYSFS_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/eeprom_sysfs.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/eeprom_sysfs.h
new file mode 100644
index 000000000000..5ebb79afdc9a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/eeprom_sysfs.h
@@ -0,0 +1,36 @@
+/*
+ * A header definition for eeprom_sysfs driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _EEPROM_SYSFS_H_
+#define _EEPROM_SYSFS_H_
+
+struct s3ip_sysfs_eeprom_drivers_s {
+    int (*get_eeprom_number)(void);
+    ssize_t (*get_eeprom_alias)(unsigned int e2_index, char *buf, size_t count);
+    ssize_t (*get_eeprom_tag)(unsigned int e2_index, char *buf, size_t count);
+    ssize_t (*get_eeprom_type)(unsigned int e2_index, char *buf, size_t count);
+    int (*get_eeprom_size)(unsigned int e2_index);
+    ssize_t (*read_eeprom_data)(unsigned int e2_index, char *buf, loff_t offset, size_t count);
+    ssize_t (*write_eeprom_data)(unsigned int e2_index, char *buf, loff_t offset, size_t count);
+};
+
+extern int s3ip_sysfs_eeprom_drivers_register(struct s3ip_sysfs_eeprom_drivers_s *drv);
+extern void s3ip_sysfs_eeprom_drivers_unregister(void);
+#endif /*_EEPROM_SYSFS_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/fan_sysfs.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/fan_sysfs.h
new file mode 100644
index 000000000000..f89afabd86bd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/fan_sysfs.h
@@ -0,0 +1,53 @@
+/*
+ * A header definition for fan_sysfs driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _FAN_SYSFS_H_
+#define _FAN_SYSFS_H_
+
+struct s3ip_sysfs_fan_drivers_s {
+    int (*get_fan_number)(void);
+    int (*get_fan_motor_number)(unsigned int fan_index);
+    ssize_t (*get_fan_model_name)(unsigned int fan_index, char *buf, size_t count);
+    ssize_t (*get_fan_vendor)(unsigned int fan_index, char *buf, size_t count);
+    ssize_t (*get_fan_serial_number)(unsigned int fan_index, char *buf, size_t count);
+    ssize_t (*get_fan_part_number)(unsigned int fan_index, char *buf, size_t count);
+    ssize_t (*get_fan_hardware_version)(unsigned int fan_index, char *buf, size_t count);
+    ssize_t (*get_fan_status)(unsigned int fan_index, char *buf, size_t count);
+    ssize_t (*get_fan_present)(unsigned int fan_index, char *buf, size_t count);
+    ssize_t (*get_fan_led_status)(unsigned int fan_index, char *buf, size_t count);
+    int (*set_fan_led_status)(unsigned int fan_index, int status);
+    ssize_t (*get_fan_direction)(unsigned int fan_index, char *buf, size_t count);
+    ssize_t (*get_fan_motor_status)(unsigned int fan_index, unsigned int motor_index, char *buf, size_t count);
+    ssize_t (*get_fan_motor_speed)(unsigned int fan_index, unsigned int motor_index, char *buf, size_t count);
+    ssize_t (*get_fan_motor_speed_tolerance)(unsigned int fan_index, unsigned int motor_index, char *buf, size_t count);
+    ssize_t (*get_fan_motor_speed_target)(unsigned int fan_index, unsigned int motor_index, char *buf, size_t count);
+    ssize_t (*get_fan_motor_speed_max)(unsigned int fan_index, unsigned int motor_index, char *buf, size_t count);
+    ssize_t (*get_fan_motor_speed_min)(unsigned int fan_index, unsigned int motor_index, char *buf, size_t count);
+    ssize_t (*get_fan_ratio)(unsigned int fan_index, char *buf, size_t count);
+    int (*set_fan_ratio)(unsigned int fan_index, int ratio);
+};
+
+extern int s3ip_sysfs_fan_drivers_register(struct s3ip_sysfs_fan_drivers_s *drv);
+extern void s3ip_sysfs_fan_drivers_unregister(void);
+#define SINGLE_FAN_STATUS_DEBUG_FILE       "/etc/sonic/.status_fan_%d"
+#define FAN_ABSENT_STR              "0\n"
+#define FAN_OK_STR                  "1\n"
+#define FAN_NOTOK_STR               "2\n"
+#endif /*_FAN_SYSFS_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/fpga_sysfs.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/fpga_sysfs.h
new file mode 100644
index 000000000000..5335a5b0fa4c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/fpga_sysfs.h
@@ -0,0 +1,36 @@
+/*
+ * A header definition for fpga_sysfs driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _FPGA_SYSFS_H_
+#define _FPGA_SYSFS_H_
+
+struct s3ip_sysfs_fpga_drivers_s {
+    int (*get_main_board_fpga_number)(void);
+    ssize_t (*get_main_board_fpga_alias)(unsigned int fpga_index, char *buf, size_t count);
+    ssize_t (*get_main_board_fpga_type)(unsigned int fpga_index, char *buf, size_t count);
+    ssize_t (*get_main_board_fpga_firmware_version)(unsigned int fpga_index, char *buf, size_t count);
+    ssize_t (*get_main_board_fpga_board_version)(unsigned int fpga_index, char *buf, size_t count);
+    ssize_t (*get_main_board_fpga_test_reg)(unsigned int fpga_index, char *buf, size_t count);
+    int (*set_main_board_fpga_test_reg)(unsigned int fpga_index, unsigned int value);
+};
+
+extern int s3ip_sysfs_fpga_drivers_register(struct s3ip_sysfs_fpga_drivers_s *drv);
+extern void s3ip_sysfs_fpga_drivers_unregister(void);
+#endif /*_FPGA_SYSFS_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/psu_sysfs.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/psu_sysfs.h
new file mode 100644
index 000000000000..c89de1cea6a2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/psu_sysfs.h
@@ -0,0 +1,73 @@
+/*
+ * A header definition for psu_sysfs driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PSU_SYSFS_H_
+#define _PSU_SYSFS_H_
+
+struct s3ip_sysfs_psu_drivers_s {
+    int (*get_psu_number)(void);
+    int (*get_psu_temp_number)(unsigned int psu_index);
+    ssize_t (*get_psu_model_name)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_vendor)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_date)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_status)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_hw_status)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_alarm)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_serial_number)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_part_number)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_hardware_version)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_type)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_in_curr)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_in_vol)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_in_power)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_out_curr)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_out_vol)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_out_power)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_out_max_power)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_present_status)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_status_pmbus)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_in_status)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_out_status)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_fan_speed)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_fan_ratio)(unsigned int psu_index, char *buf, size_t count);
+    int (*set_psu_fan_ratio)(unsigned int psu_index, int ratio);
+    ssize_t (*get_psu_fan_direction)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_led_status)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_fan_speed_cal)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_temp_alias)(unsigned int psu_index, unsigned int temp_index, char *buf, size_t count);
+    ssize_t (*get_psu_temp_type)(unsigned int psu_index, unsigned int temp_index, char *buf, size_t count);
+    ssize_t (*get_psu_temp_max)(unsigned int psu_index, unsigned int temp_index, char *buf, size_t count);
+    int (*set_psu_temp_max)(unsigned int psu_index, unsigned int temp_index, const char *buf, size_t count);
+    ssize_t (*get_psu_temp_min)(unsigned int psu_index, unsigned int temp_index, char *buf, size_t count);
+    int (*set_psu_temp_min)(unsigned int psu_index, unsigned int temp_index, const char *buf, size_t count);
+    ssize_t (*get_psu_temp_value)(unsigned int psu_index, unsigned int temp_index, char *buf, size_t count);
+    ssize_t (*get_psu_attr_threshold)(unsigned int psu_index, unsigned int type,  char *buf, size_t count);
+    int (*get_psu_eeprom_size)(unsigned int psu_index);
+    ssize_t (*read_psu_eeprom_data)(unsigned int psu_index, char *buf, loff_t offset, size_t count);
+    ssize_t (*get_psu_blackbox_info)(unsigned int psu_index, char *buf, size_t count);
+    ssize_t (*get_psu_pmbus_info)(unsigned int psu_index, char *buf, size_t count);
+    int (*clear_psu_blackbox)(unsigned int psu_index, uint8_t value);
+};
+
+extern int s3ip_sysfs_psu_drivers_register(struct s3ip_sysfs_psu_drivers_s *drv);
+extern void s3ip_sysfs_psu_drivers_unregister(void);
+#define SINGLE_PSU_PRESENT_DEBUG_FILE       "/etc/sonic/.present_psu_%d"
+
+#endif /*_PSU_SYSFS_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/slot_sysfs.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/slot_sysfs.h
new file mode 100644
index 000000000000..e5cba548f224
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/slot_sysfs.h
@@ -0,0 +1,80 @@
+/*
+ * A header definition for slot_sysfs driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _SLOT_SYSFS_H_
+#define _SLOT_SYSFS_H_
+
+struct s3ip_sysfs_slot_drivers_s {
+    int (*get_slot_number)(void);
+    int (*get_slot_temp_number)(unsigned int slot_index);
+    int (*get_slot_vol_number)(unsigned int slot_index);
+    int (*get_slot_curr_number)(unsigned int slot_index);
+    int (*get_slot_cpld_number)(unsigned int slot_index);
+    int (*get_slot_fpga_number)(unsigned int slot_index);
+    ssize_t (*get_slot_model_name)(unsigned int slot_index, char *buf, size_t count);
+    ssize_t (*get_slot_vendor)(unsigned int slot_index, char *buf, size_t count);
+    ssize_t (*get_slot_serial_number)(unsigned int slot_index, char *buf, size_t count);
+    ssize_t (*get_slot_part_number)(unsigned int slot_index, char *buf, size_t count);
+    ssize_t (*get_slot_hardware_version)(unsigned int slot_index, char *buf, size_t count);
+    ssize_t (*get_slot_status)(unsigned int slot_index, char *buf, size_t count);
+    ssize_t (*get_slot_led_status)(unsigned int slot_index, char *buf, size_t count);
+    int (*set_slot_led_status)(unsigned int slot_index, int status);
+    ssize_t (*get_slot_power_status)(unsigned int slot_index, char *buf, size_t count);
+    int (*set_slot_power_status)(unsigned int slot_index, int status);
+    ssize_t (*get_slot_temp_alias)(unsigned int slot_index, unsigned int temp_index, char *buf, size_t count);
+    ssize_t (*get_slot_temp_type)(unsigned int slot_index, unsigned int temp_index, char *buf, size_t count);
+    ssize_t (*get_slot_temp_max)(unsigned int slot_index, unsigned int temp_index, char *buf, size_t count);
+    int (*set_slot_temp_max)(unsigned int slot_index, unsigned int temp_index, const char *buf, size_t count);
+    ssize_t (*get_slot_temp_min)(unsigned int slot_index, unsigned int temp_index, char *buf, size_t count);
+    int (*set_slot_temp_min)(unsigned int slot_index, unsigned int temp_index, const char *buf, size_t count);
+    ssize_t (*get_slot_temp_value)(unsigned int slot_index, unsigned int temp_index, char *buf, size_t count);
+    ssize_t (*get_slot_vol_alias)(unsigned int slot_index, unsigned int vol_index, char *buf, size_t count);
+    ssize_t (*get_slot_vol_type)(unsigned int slot_index, unsigned int vol_index, char *buf, size_t count);
+    ssize_t (*get_slot_vol_max)(unsigned int slot_index, unsigned int vol_index, char *buf, size_t count);
+    int (*set_slot_vol_max)(unsigned int slot_index, unsigned int vol_index, const char *buf, size_t count);
+    ssize_t (*get_slot_vol_min)(unsigned int slot_index, unsigned int vol_index, char *buf, size_t count);
+    int (*set_slot_vol_min)(unsigned int slot_index, unsigned int vol_index, const char *buf, size_t count);
+    ssize_t (*get_slot_vol_range)(unsigned int slot_index, unsigned int vol_index, char *buf, size_t count);
+    ssize_t (*get_slot_vol_nominal_value)(unsigned int slot_index, unsigned int vol_index, char *buf, size_t count);
+    ssize_t (*get_slot_vol_value)(unsigned int slot_index, unsigned int vol_index, char *buf, size_t count);
+    ssize_t (*get_slot_curr_alias)(unsigned int slot_index, unsigned int curr_index, char *buf, size_t count);
+    ssize_t (*get_slot_curr_type)(unsigned int slot_index, unsigned int curr_index, char *buf, size_t count);
+    ssize_t (*get_slot_curr_max)(unsigned int slot_index, unsigned int curr_index, char *buf, size_t count);
+    int (*set_slot_curr_max)(unsigned int slot_index, unsigned int curr_index, const char *buf, size_t count);
+    ssize_t (*get_slot_curr_min)(unsigned int slot_index, unsigned int curr_index, char *buf, size_t count);
+    int (*set_slot_curr_min)(unsigned int slot_index, unsigned int curr_index, const char *buf, size_t count);
+    ssize_t (*get_slot_curr_value)(unsigned int slot_index, unsigned int curr_index, char *buf, size_t count);
+    ssize_t (*get_slot_fpga_alias)(unsigned int slot_index, unsigned int fpga_index, char *buf, size_t count);
+    ssize_t (*get_slot_fpga_type)(unsigned int slot_index, unsigned int fpga_index, char *buf, size_t count);
+    ssize_t (*get_slot_fpga_firmware_version)(unsigned int slot_index, unsigned int fpga_index, char *buf, size_t count);
+    ssize_t (*get_slot_fpga_board_version)(unsigned int slot_index, unsigned int fpga_index, char *buf, size_t count);
+    ssize_t (*get_slot_fpga_test_reg)(unsigned int slot_index, unsigned int fpga_index, char *buf, size_t count);
+    int (*set_slot_fpga_test_reg)(unsigned int slot_index, unsigned int fpga_index, unsigned int value);
+    ssize_t (*get_slot_cpld_alias)(unsigned int slot_index, unsigned int cpld_index, char *buf, size_t count);
+    ssize_t (*get_slot_cpld_type)(unsigned int slot_index, unsigned int cpld_index, char *buf, size_t count);
+    ssize_t (*get_slot_cpld_firmware_version)(unsigned int slot_index, unsigned int cpld_index, char *buf, size_t count);
+    ssize_t (*get_slot_cpld_board_version)(unsigned int slot_index, unsigned int cpld_index, char *buf, size_t count);
+    ssize_t (*get_slot_cpld_test_reg)(unsigned int slot_index, unsigned int cpld_index, char *buf, size_t count);
+    int (*set_slot_cpld_test_reg)(unsigned int slot_index, unsigned int cpld_index, unsigned int value);
+};
+
+extern int s3ip_sysfs_slot_drivers_register(struct s3ip_sysfs_slot_drivers_s *drv);
+extern void s3ip_sysfs_slot_drivers_unregister(void);
+#endif /*_SLOT_SYSFS_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/switch.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/switch.h
new file mode 100644
index 000000000000..2f7e1ef2f8a1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/switch.h
@@ -0,0 +1,96 @@
+/*
+ * A header definition for switch driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _SWITCH_H_
+#define _SWITCH_H_
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+#include <linux/workqueue.h>
+#include <linux/kobject.h>
+#include <linux/delay.h>
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+#include "switch_driver.h"
+#include "wb_module.h"
+
+#define DIR_NAME_MAX_LEN        (64)
+#define DEBUG_FILE_SIZE     (64)
+#define DEV_PRESEN_STR          "1\n"
+#define DEV_ABSENT_STR          "0\n"
+#define mem_clear(data, size) memset((data), 0, (size))
+
+enum LOG_LEVEL {
+    INFO = 0x1,
+    ERR  = 0x2,
+    DBG  = 0x4,
+    ALL  = 0xf
+};
+
+extern int g_switch_loglevel;
+
+#define check_pfun(p) do { \
+    if (p == NULL) { \
+        if (g_switch_loglevel & ERR) { \
+            printk(KERN_ERR "%s, %s is NULL.\n", __FUNCTION__, #p); \
+        } \
+        return -WB_SYSFS_RV_UNSUPPORT; \
+    } \
+} while (0)
+
+#define check_p(p) check_pfun(p)
+
+#define to_switch_obj(x) container_of(x, struct switch_obj, kobj)
+#define to_switch_attr(x) container_of(x, struct switch_attribute, attr)
+#define to_switch_device_attr(x) container_of(x, struct switch_device_attribute, switch_attr)
+
+#define SWITCH_ATTR(_name, _mode, _show, _store, _type)    \
+    { .switch_attr = __ATTR(_name, _mode, _show, _store),  \
+      .type = _type }
+
+#define SWITCH_DEVICE_ATTR(_name, _mode, _show, _store, _type) \
+struct switch_device_attribute switch_dev_attr_##_name         \
+        = SWITCH_ATTR(_name, _mode, _show, _store, _type)
+
+struct switch_obj {
+    struct kobject kobj;
+    unsigned int index;
+};
+
+/* a custom attribute that works just for a struct switch_obj. */
+struct switch_attribute {
+    struct attribute attr;
+    ssize_t (*show)(struct switch_obj *foo, struct switch_attribute *attr, char *buf);
+    ssize_t (*store)(struct switch_obj *foo, struct switch_attribute *attr, const char *buf, size_t count);
+};
+
+struct switch_device_attribute {
+    struct switch_attribute switch_attr;
+    int type;
+};
+
+struct switch_obj *switch_kobject_create(const char *name, struct kobject *parent);
+void switch_kobject_delete(struct switch_obj **obj);
+int dev_debug_file_read(char *file_name, unsigned int dev_index, char *buf, int size);
+
+#endif /* _SWITCH_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/syseeprom_sysfs.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/syseeprom_sysfs.h
new file mode 100644
index 000000000000..7ce272ad6112
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/syseeprom_sysfs.h
@@ -0,0 +1,32 @@
+/*
+ * A header definition for syseeprom_sysfs driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _SYSEEPROM_SYSFS_H_
+#define _SYSEEPROM_SYSFS_H_
+
+struct s3ip_sysfs_syseeprom_drivers_s {
+    int (*get_syseeprom_size)(void);
+    ssize_t (*read_syseeprom_data)(char *buf, loff_t offset, size_t count);
+    ssize_t (*write_syseeprom_data)(char *buf, loff_t offset, size_t count);
+};
+
+extern int s3ip_sysfs_syseeprom_drivers_register(struct s3ip_sysfs_syseeprom_drivers_s *drv);
+extern void s3ip_sysfs_syseeprom_drivers_unregister(void);
+#endif /*_SYSEEPROM_SYSFS_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/sysled_sysfs.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/sysled_sysfs.h
new file mode 100644
index 000000000000..5eaf3af7057e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/sysled_sysfs.h
@@ -0,0 +1,39 @@
+/*
+ * A header definition for sysled_sysfs driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _SYSLED_SYSFS_H_
+#define _SYSLED_SYSFS_H_
+
+struct s3ip_sysfs_sysled_drivers_s {
+    ssize_t (*get_sys_led_status)(char *buf, size_t count);
+    int (*set_sys_led_status)(int status);
+    ssize_t (*get_bmc_led_status)(char *buf, size_t count);
+    int (*set_bmc_led_status)(int status);
+    ssize_t (*get_sys_fan_led_status)(char *buf, size_t count);
+    int (*set_sys_fan_led_status)(int status);
+    ssize_t (*get_sys_psu_led_status)(char *buf, size_t count);
+    int (*set_sys_psu_led_status)(int status);
+    ssize_t (*get_id_led_status)(char *buf, size_t count);
+    int (*set_id_led_status)(int status);
+};
+
+extern int s3ip_sysfs_sysled_drivers_register(struct s3ip_sysfs_sysled_drivers_s *drv);
+extern void s3ip_sysfs_sysled_drivers_unregister(void);
+#endif /*_SYSLED_SYSFS_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/system_sysfs.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/system_sysfs.h
new file mode 100644
index 000000000000..a5edf5e107b8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/system_sysfs.h
@@ -0,0 +1,54 @@
+/*
+ * A header definition for system_sysfs driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _SYSTEM_SYSFS_H_
+#define _SYSTEM_SYSFS_H_
+
+struct s3ip_sysfs_system_drivers_s {
+    ssize_t (*get_system_value)(unsigned int type, int *value, char *buf, size_t count);
+    ssize_t (*set_system_value)(unsigned int type, int value);
+    ssize_t (*get_system_port_power_status)(unsigned int type, char *buf, size_t count);
+};
+
+extern int s3ip_sysfs_system_drivers_register(struct s3ip_sysfs_system_drivers_s *drv);
+extern void s3ip_sysfs_system_drivers_unregister(void);
+
+/* system api type */
+typedef enum wb_plat_system_type_e {
+    WB_SYSTEM_BMC_READY         = 0x0000,  /* bmc ready         */
+    WB_SYSTEM_SOL_ACTIVE        = 0x0100,  /* sol active        */
+    WB_SYSTEM_PSU_RESET         = 0x0200,  /* psu reset         */
+    WB_SYSTEM_CPU_BOARD_CTRL    = 0x0300,  /* cpu board control */
+    WB_SYSTEM_CPU_BOARD_STATUS  = 0x0400,  /* cpu board status  */
+    WB_SYSTEM_BIOS_UPGRADE      = 0x0500,  /* bios upgrade      */
+    WB_SYSTEM_BIOS_SWITCH       = 0x0600,  /* bios switch       */
+    WB_SYSTEM_BIOS_VIEW         = 0x0700,  /* bios flash view   */
+    WB_SYSTEM_BIOS_BOOT_OK      = 0x0800,  /* bios boot status  */
+    WB_SYSTEM_BIOS_FAIL_RECORD  = 0x0900,  /* bios startup failure record */
+    WB_SYSTEM_BMC_RESET         = 0x0a00,  /* bmc reset         */
+    WB_SYSTEM_MAC_BOARD_RESET   = 0x0b00,  /* mac board reset   */
+    WB_SYSTEM_MAC_PWR_CTRL      = 0x0c00,  /* mac power on/off  */
+    WB_SYSTEM_EMMC_PWR_CTRL     = 0x0d00,  /* emmc power on/off */
+    WB_SYSTEM_PORT_PWR_CTL      = 0x0e00,  /* power power on/off*/
+    WB_SYSTEM_BMC_VIEW          = 0x0f00,  /* bmc view          */
+    WB_SYSTEM_BMC_SWITCH        = 0x1000,  /* bmc switch        */
+} wb_plat_system_type_t;
+
+#endif /*_SYSTEM_SYSFS_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/temp_sensor_sysfs.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/temp_sensor_sysfs.h
new file mode 100644
index 000000000000..dc6138388b34
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/temp_sensor_sysfs.h
@@ -0,0 +1,42 @@
+/*
+ * A header definition for temp_sensor_sysfs driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _TEMP_SENSOR_SYSFS_H_
+#define _TEMP_SENSOR_SYSFS_H_
+
+struct s3ip_sysfs_temp_sensor_drivers_s {
+    int (*get_main_board_temp_number)(void);
+    ssize_t (*get_main_board_temp_alias)(unsigned int temp_index, char *buf, size_t count);
+    ssize_t (*get_main_board_temp_type)(unsigned int temp_index, char *buf, size_t count);
+    ssize_t (*get_main_board_temp_max)(unsigned int temp_index, char *buf, size_t count);
+    int (*set_main_board_temp_max)(unsigned int temp_index, const char *buf, size_t count);
+    ssize_t (*get_main_board_temp_min)(unsigned int temp_index, char *buf, size_t count);
+    int (*set_main_board_temp_min)(unsigned int temp_index, const char *buf, size_t count);
+    ssize_t (*get_main_board_temp_high)(unsigned int temp_index, char *buf, size_t count);
+    int (*set_main_board_temp_high)(unsigned int temp_index, const char *buf, size_t count);
+    ssize_t (*get_main_board_temp_low)(unsigned int temp_index, char *buf, size_t count);
+    int (*set_main_board_temp_low)(unsigned int temp_index, const char *buf, size_t count);
+    ssize_t (*get_main_board_temp_value)(unsigned int temp_index, char *buf, size_t count);
+    ssize_t (*get_main_board_temp_monitor_flag)(unsigned int temp_index, char *buf, size_t count);
+};
+
+extern int s3ip_sysfs_temp_sensor_drivers_register(struct s3ip_sysfs_temp_sensor_drivers_s *drv);
+extern void s3ip_sysfs_temp_sensor_drivers_unregister(void);
+#endif /*_TEMP_SENSOR_SYSFS_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/transceiver_sysfs.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/transceiver_sysfs.h
new file mode 100644
index 000000000000..a4fcb485d37a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/transceiver_sysfs.h
@@ -0,0 +1,50 @@
+/*
+ * A header definition for transceiver_sysfs driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _TRANSCEIVER_SYSFS_H_
+#define _TRANSCEIVER_SYSFS_H_
+
+struct s3ip_sysfs_transceiver_drivers_s {
+    int (*get_eth_number)(void);
+    ssize_t (*get_transceiver_power_on_status)(char *buf, size_t count);
+    int (*set_transceiver_power_on_status)(int status);
+    ssize_t (*get_transceiver_present_status)(char *buf, size_t count);
+    ssize_t (*get_eth_power_on_status)(unsigned int eth_index, char *buf, size_t count);
+    int (*set_eth_power_on_status)(unsigned int eth_index, int status);
+    ssize_t (*get_eth_tx_fault_status)(unsigned int eth_index, char *buf, size_t count);
+    ssize_t (*get_eth_tx_disable_status)(unsigned int eth_index, char *buf, size_t count);
+    int (*set_eth_tx_disable_status)(unsigned int eth_index, int status);
+    ssize_t (*get_eth_present_status)(unsigned int eth_index, char *buf, size_t count);
+    ssize_t (*get_eth_rx_los_status)(unsigned int eth_index, char *buf, size_t count);
+    ssize_t (*get_eth_reset_status)(unsigned int eth_index, char *buf, size_t count);
+    int (*set_eth_reset_status)(unsigned int eth_index, int status);
+    ssize_t (*get_eth_low_power_mode_status)(unsigned int eth_index, char *buf, size_t count);
+    ssize_t (*get_eth_interrupt_status)(unsigned int eth_index, char *buf, size_t count);
+    int (*get_eth_eeprom_size)(unsigned int eth_index);
+    ssize_t (*read_eth_eeprom_data)(unsigned int eth_index, char *buf, loff_t offset, size_t count);
+    ssize_t (*write_eth_eeprom_data)(unsigned int eth_index, char *buf, loff_t offset, size_t count);
+    ssize_t (*get_eth_optoe_type)(unsigned int sff_index, int *optoe_type, char *buf, size_t count);
+    ssize_t (*set_eth_optoe_type)(unsigned int sff_index, int optoe_type);
+};
+
+extern int s3ip_sysfs_sff_drivers_register(struct s3ip_sysfs_transceiver_drivers_s *drv);
+extern void s3ip_sysfs_sff_drivers_unregister(void);
+#define SINGLE_TRANSCEIVER_PRESENT_DEBUG_FILE       "/etc/sonic/.present_eth_%d"
+#endif /*_TRANSCEIVER_SYSFS_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/vol_sensor_sysfs.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/vol_sensor_sysfs.h
new file mode 100644
index 000000000000..f13d4a2057e2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/vol_sensor_sysfs.h
@@ -0,0 +1,40 @@
+/*
+ * A header definition for vol_sensor_sysfs driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _VOL_SENSOR_SYSFS_H_
+#define _VOL_SENSOR_SYSFS_H_
+
+struct s3ip_sysfs_vol_sensor_drivers_s {
+    int (*get_main_board_vol_number)(void);
+    ssize_t (*get_main_board_vol_alias)(unsigned int vol_index, char *buf, size_t count);
+    ssize_t (*get_main_board_vol_type)(unsigned int vol_index, char *buf, size_t count);
+    ssize_t (*get_main_board_vol_max)(unsigned int vol_index, char *buf, size_t count);
+    int (*set_main_board_vol_max)(unsigned int vol_index, const char *buf, size_t count);
+    ssize_t (*get_main_board_vol_min)(unsigned int vol_index, char *buf, size_t count);
+    int (*set_main_board_vol_min)(unsigned int vol_index, const char *buf, size_t count);
+    ssize_t (*get_main_board_vol_range)(unsigned int vol_index, char *buf, size_t count);
+    ssize_t (*get_main_board_vol_nominal_value)(unsigned int vol_index, char *buf, size_t count);
+    ssize_t (*get_main_board_vol_value)(unsigned int vol_index, char *buf, size_t count);
+    ssize_t (*get_main_board_vol_monitor_flag)(unsigned int vol_index, char *buf, size_t count);
+};
+
+extern int s3ip_sysfs_vol_sensor_drivers_register(struct s3ip_sysfs_vol_sensor_drivers_s *drv);
+extern void s3ip_sysfs_vol_sensor_drivers_unregister(void);
+#endif /*_VOL_SENSOR_SYSFS_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/watchdog_sysfs.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/watchdog_sysfs.h
new file mode 100644
index 000000000000..ac9e7666aee8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/watchdog_sysfs.h
@@ -0,0 +1,36 @@
+/*
+ * A header definition for watchdog_sysfs driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _WATCHDOG_SYSFS_H_
+#define _WATCHDOG_SYSFS_H_
+
+struct s3ip_sysfs_watchdog_drivers_s {
+    ssize_t (*get_watchdog_identify)(char *buf, size_t count);
+    ssize_t (*get_watchdog_timeleft)(char *buf, size_t count);
+    ssize_t (*get_watchdog_timeout)(char *buf, size_t count);
+    int (*set_watchdog_timeout)(int value);
+    ssize_t (*get_watchdog_enable_status)(char *buf, size_t count);
+    int (*set_watchdog_enable_status)(int value);
+    int (*set_watchdog_reset)(int value);
+};
+
+extern int s3ip_sysfs_watchdog_drivers_register(struct s3ip_sysfs_watchdog_drivers_s *drv);
+extern void s3ip_sysfs_watchdog_drivers_unregister(void);
+#endif /*_WATCHDOG_SYSFS_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/psu_sysfs.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/psu_sysfs.c
new file mode 100644
index 000000000000..ecb6ca30e6d4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/psu_sysfs.c
@@ -0,0 +1,1180 @@
+/*
+ * An psu_sysfs driver for psu sysfs devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+
+#include "switch.h"
+#include "psu_sysfs.h"
+
+static int g_psu_loglevel = 0;
+static bool g_psu_present_debug = 0;
+
+#define PSU_INFO(fmt, args...) do {                                        \
+    if (g_psu_loglevel & INFO) { \
+        printk(KERN_INFO "[PSU_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define PSU_ERR(fmt, args...) do {                                        \
+    if (g_psu_loglevel & ERR) { \
+        printk(KERN_ERR "[PSU_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define PSU_DBG(fmt, args...) do {                                        \
+    if (g_psu_loglevel & DBG) { \
+        printk(KERN_DEBUG "[PSU_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct temp_obj_s {
+    struct switch_obj *obj;
+};
+
+struct psu_obj_s {
+    unsigned int temp_number;
+    struct temp_obj_s *temp;
+    struct switch_obj *obj;
+    struct bin_attribute bin;
+    int psu_creat_bin_flag;
+};
+
+struct psu_s {
+    unsigned int psu_number;
+    struct psu_obj_s *psu;
+};
+
+static struct psu_s g_psu;
+static struct switch_obj *g_psu_obj = NULL;
+static struct s3ip_sysfs_psu_drivers_s *g_psu_drv = NULL;
+
+static ssize_t psu_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", g_psu.psu_number);
+}
+
+static ssize_t psu_temp_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int index;
+
+    index = obj->index;
+    PSU_DBG("psu index: %u\n",index);
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%u\n", g_psu.psu[index - 1].temp_number);
+}
+
+static ssize_t psu_model_name_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_model_name);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_model_name(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_vendor_show(struct switch_obj *obj, struct switch_attribute *attr,
+                               char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_vendor);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_vendor(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_date_show(struct switch_obj *obj, struct switch_attribute *attr,
+                             char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_date);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_date(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_hw_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_hardware_version);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_hardware_version(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_sn_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_serial_number);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_serial_number(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_pn_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_part_number);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_part_number(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_type_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_type);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_type(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_in_curr_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_in_curr);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_in_curr(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_in_vol_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_in_vol);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_in_vol(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_in_power_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_in_power);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_in_power(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_out_curr_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_out_curr);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_out_curr(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_out_vol_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_out_vol);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_out_vol(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_out_power_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_out_power);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_out_power(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_out_max_power_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_out_max_power);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_out_max_power(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_present_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+    int ret, res;
+    char debug_file_buf[DEBUG_FILE_SIZE];
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_present_status);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    ret = g_psu_drv->get_psu_present_status(psu_index, buf, PAGE_SIZE);
+    if (ret < 0) {
+        PSU_ERR("get psu%u present status failed, ret: %d\n", psu_index, ret);
+        return ret;
+    }
+
+    if (g_psu_present_debug) {
+        PSU_INFO("s3ip sysfs psu present debug is enable\n");
+        if (strcmp(buf, DEV_ABSENT_STR) == 0) {
+            PSU_DBG("psu%d absent, return act value\n", psu_index);
+            return ret;
+        }
+
+        if ((strncmp(buf, SWITCH_DEV_NO_SUPPORT, strlen(SWITCH_DEV_NO_SUPPORT)) == 0) || (strncmp(buf, SWITCH_DEV_ERROR, strlen(SWITCH_DEV_ERROR)) == 0)) {
+            PSU_DBG("psu%d status sysfs unsupport or error\n", psu_index);
+            return ret;
+        }
+
+        mem_clear(debug_file_buf, sizeof(debug_file_buf));
+        res = dev_debug_file_read(SINGLE_PSU_PRESENT_DEBUG_FILE, psu_index, debug_file_buf, sizeof(debug_file_buf));
+        if (res) {
+            PSU_ERR("psu%u present debug file read failed, ret: %d\n", psu_index, res);
+            return ret;
+        }
+
+        if ((strcmp(debug_file_buf, DEV_PRESEN_STR) == 0) || (strcmp(debug_file_buf, DEV_ABSENT_STR) == 0)) {
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%s", debug_file_buf);
+        } else {
+            PSU_ERR("psu%d present debug file value err, value: %s, not 0 or 1\n", psu_index, debug_file_buf);
+            return ret;
+        }
+    }
+
+    return ret;
+}
+
+static ssize_t get_psu_status_pmbus_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_status_pmbus);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_status_pmbus(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t get_psu_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_status);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_status(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t get_psu_hw_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_hw_status);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_hw_status(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t get_psu_alarm_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_alarm);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_alarm(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_out_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_out_status);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_out_status(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_in_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_in_status);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_in_status(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_fan_speed_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_fan_speed);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_fan_speed(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_fan_speed_cal_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_fan_speed_cal);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_fan_speed_cal(psu_index, buf, PAGE_SIZE);
+}
+
+ssize_t psu_fan_ratio_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_fan_ratio);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_fan_ratio(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_fan_ratio_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int psu_index;
+    int ret, ratio;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->set_psu_fan_ratio);
+
+    psu_index = obj->index;
+    ret = kstrtoint(buf, 0, &ratio);
+    if (ret != 0) {
+        PSU_ERR("invaild psu fan ratio ret: %d, buf: %s.\n", ret, buf);
+        return -EINVAL;
+    }
+    if (ratio < 0 || ratio > 100) {
+        PSU_ERR("param invalid, can not set ratio: %d.\n", ratio);
+        return -EINVAL;
+    }
+    PSU_DBG("psu index: %u, ratio: %d\n", psu_index, ratio);
+    ret = g_psu_drv->set_psu_fan_ratio(psu_index, ratio);
+    if (ret < 0) {
+        PSU_ERR("set psu%u ratio: %d failed, ret: %d\n",
+            psu_index, ratio, ret);
+        return ret;
+    }
+    PSU_DBG("set psu%u, ratio: %d success\n", psu_index, ratio);
+    return count;
+}
+
+static ssize_t psu_fan_direction_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_fan_direction);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_fan_direction(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_led_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_led_status);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_led_status(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_temp_value_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index, temp_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_temp_value);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    psu_index = p_obj->index;
+    temp_index = obj->index;
+
+    PSU_DBG("psu index: %u, temp index: %u\n", psu_index, temp_index);
+    return g_psu_drv->get_psu_temp_value(psu_index, temp_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_temp_alias_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index, temp_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_temp_alias);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    psu_index = p_obj->index;
+    temp_index = obj->index;
+
+    PSU_DBG("psu index: %u, temp index: %u\n", psu_index, temp_index);
+    return g_psu_drv->get_psu_temp_alias(psu_index, temp_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_temp_type_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index, temp_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_temp_type);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    psu_index = p_obj->index;
+    temp_index = obj->index;
+
+    PSU_DBG("psu index: %u, temp index: %u\n", psu_index, temp_index);
+    return g_psu_drv->get_psu_temp_type(psu_index, temp_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_temp_max_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index, temp_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_temp_max);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    psu_index = p_obj->index;
+    temp_index = obj->index;
+
+    PSU_DBG("psu index: %u, temp index: %u\n", psu_index, temp_index);
+    return g_psu_drv->get_psu_temp_max(psu_index, temp_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_temp_max_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int psu_index, temp_index;
+    int ret;
+    struct switch_obj *p_obj;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->set_psu_temp_max);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    psu_index = p_obj->index;
+    temp_index = obj->index;
+    ret = g_psu_drv->set_psu_temp_max(psu_index, temp_index, buf, count);
+    if (ret < 0) {
+        PSU_ERR("set psu%u temp%u max threshold failed, value: %s, count: %lu, ret: %d\n",
+            psu_index, temp_index, buf, count, ret);
+        return ret;
+    }
+    PSU_DBG("set psu%u temp%u max threshold success, value: %s, count: %lu, ret: %d\n",
+        psu_index, temp_index, buf, count, ret);
+    return count;
+}
+
+static ssize_t psu_temp_min_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index, temp_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_temp_min);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    psu_index = p_obj->index;
+    temp_index = obj->index;
+
+    PSU_DBG("psu index: %u, temp index: %u\n", psu_index, temp_index);
+    return g_psu_drv->get_psu_temp_min(psu_index, temp_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_temp_min_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int psu_index, temp_index;
+    int ret;
+    struct switch_obj *p_obj;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->set_psu_temp_min);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    psu_index = p_obj->index;
+    temp_index = obj->index;
+    ret = g_psu_drv->set_psu_temp_min(psu_index, temp_index, buf, count);
+    if (ret < 0) {
+        PSU_ERR("set psu%u temp%u min threshold failed, value: %s, count: %lu, ret: %d\n",
+            psu_index, temp_index, buf, count, ret);
+        return ret;
+    }
+    PSU_DBG("set psu%u temp%u min threshold success, value: %s, count: %lu, ret: %d\n",
+        psu_index, temp_index, buf, count, ret);
+    return count;
+}
+
+static ssize_t psu_attr_threshold_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+    struct switch_device_attribute  *tmp_attr;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_attr_threshold);
+
+    psu_index = obj->index;
+    tmp_attr = to_switch_device_attr(attr);
+    check_p(tmp_attr);
+    return g_psu_drv->get_psu_attr_threshold(psu_index, tmp_attr->type, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_eeprom_read(struct file *filp, struct kobject *kobj, struct bin_attribute *attr,
+                               char *buf, loff_t offset, size_t count)
+{
+    struct switch_obj *psu_obj;
+    ssize_t rd_len;
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->read_psu_eeprom_data);
+
+    psu_obj = to_switch_obj(kobj);
+    psu_index = psu_obj->index;
+    mem_clear(buf,  count);
+    rd_len = g_psu_drv->read_psu_eeprom_data(psu_index, buf, offset, count);
+    if (rd_len < 0) {
+        PSU_ERR("read psu%u eeprom data error, offset: 0x%llx, read len: %lu, ret: %ld.\n",
+            psu_index, offset, count, rd_len);
+        return rd_len;
+    }
+
+    PSU_DBG("read psu%u eeprom data success, offset:0x%llx, read len:%lu, really read len:%ld.\n",
+        psu_index, offset, count, rd_len);
+
+    return rd_len;
+}
+
+static ssize_t psu_blackbox_info_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_blackbox_info);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_blackbox_info(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_pmbus_info_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int psu_index;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->get_psu_pmbus_info);
+
+    psu_index = obj->index;
+    PSU_DBG("psu index: %u\n", psu_index);
+    return g_psu_drv->get_psu_pmbus_info(psu_index, buf, PAGE_SIZE);
+}
+
+static ssize_t psu_clear_blackbox_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int psu_index;
+    int ret;
+    uint8_t vaule;
+
+    check_p(g_psu_drv);
+    check_p(g_psu_drv->clear_psu_blackbox);
+
+    psu_index = obj->index;
+    ret = kstrtou8(buf, 0, &vaule);
+    if (ret != 0) {
+        PSU_ERR("Invaild value ret: %d, buf: %s.\n", ret, buf);
+        return -EINVAL;
+    }
+    if (vaule != 1) {
+        PSU_ERR("Invaild value: %u, only support write 1 to clear psu blackbox information\n", vaule);
+        return -EINVAL;
+    }
+    PSU_DBG("psu index: %u, clear psu blackbox information\n", psu_index);
+    ret = g_psu_drv->clear_psu_blackbox(psu_index, vaule);
+    if (ret < 0) {
+        PSU_ERR("clear psu%u blackbox information failed, ret: %d\n",
+            psu_index, ret);
+        return ret;
+    }
+    PSU_DBG("clear psu%u blackbox information success\n", psu_index);
+    return count;
+}
+
+/************************************psu dir and attrs*******************************************/
+static struct switch_attribute psu_number_att = __ATTR(number, S_IRUGO, psu_number_show, NULL);
+
+static struct attribute *psu_dir_attrs[] = {
+    &psu_number_att.attr,
+    NULL,
+};
+
+static struct attribute_group psu_root_attr_group = {
+    .attrs = psu_dir_attrs,
+};
+
+/*******************************psu[1-n] dir and attrs*******************************************/
+static struct switch_attribute psu_model_name_attr = __ATTR(model_name, S_IRUGO, psu_model_name_show, NULL);
+static struct switch_attribute psu_vendor_attr = __ATTR(vendor, S_IRUGO, psu_vendor_show, NULL);
+static struct switch_attribute psu_date_attr = __ATTR(date, S_IRUGO, psu_date_show, NULL);
+static struct switch_attribute psu_hw_attr = __ATTR(hardware_version, S_IRUGO, psu_hw_show, NULL);
+static struct switch_attribute psu_sn_attr = __ATTR(serial_number, S_IRUGO, psu_sn_show, NULL);
+static struct switch_attribute psu_pn_attr = __ATTR(part_number, S_IRUGO, psu_pn_show, NULL);
+static struct switch_attribute psu_type_attr = __ATTR(type, S_IRUGO, psu_type_show, NULL);
+static struct switch_attribute psu_in_curr_attr = __ATTR(in_curr, S_IRUGO, psu_in_curr_show, NULL);
+static struct switch_attribute psu_in_vol_attr = __ATTR(in_vol, S_IRUGO, psu_in_vol_show, NULL);
+static struct switch_attribute psu_in_power_attr = __ATTR(in_power, S_IRUGO, psu_in_power_show, NULL);
+static struct switch_attribute psu_out_curr_attr = __ATTR(out_curr, S_IRUGO, psu_out_curr_show, NULL);
+static struct switch_attribute psu_out_vol_attr = __ATTR(out_vol, S_IRUGO, psu_out_vol_show, NULL);
+static struct switch_attribute psu_out_power_attr = __ATTR(out_power, S_IRUGO, psu_out_power_show, NULL);
+static struct switch_attribute psu_out_max_power_attr = __ATTR(out_max_power, S_IRUGO, psu_out_max_power_show, NULL);
+static struct switch_attribute psu_num_temps_attr = __ATTR(num_temp_sensors, S_IRUGO, psu_temp_number_show, NULL);
+static struct switch_attribute psu_present_attr = __ATTR(present, S_IRUGO, psu_present_status_show, NULL);
+static struct switch_attribute status_fr_pmbus_attr = __ATTR(status_fr_pmbus, S_IRUGO, get_psu_status_pmbus_show, NULL);
+static struct switch_attribute psu_status_attr = __ATTR(status, S_IRUGO, get_psu_status_show, NULL);
+static struct switch_attribute psu_hw_status_attr = __ATTR(hw_status, S_IRUGO, get_psu_hw_status_show, NULL);
+static struct switch_attribute psu_alarm_attr = __ATTR(alarm, S_IRUGO, get_psu_alarm_show, NULL);
+static struct switch_attribute psu_out_status_attr = __ATTR(out_status, S_IRUGO, psu_out_status_show, NULL);
+static struct switch_attribute psu_in_status_attr = __ATTR(in_status, S_IRUGO, psu_in_status_show, NULL);
+static struct switch_attribute psu_fan_speed_attr = __ATTR(fan_speed, S_IRUGO, psu_fan_speed_show, NULL);
+static struct switch_attribute psu_fan_ratio_attr = __ATTR(fan_ratio, S_IRUGO | S_IWUSR, psu_fan_ratio_show, psu_fan_ratio_store);
+static struct switch_attribute psu_fan_direction_attr = __ATTR(fan_direction, S_IRUGO, psu_fan_direction_show, NULL);
+static struct switch_attribute psu_led_status_attr = __ATTR(led_status, S_IRUGO, psu_led_status_show, NULL);
+static struct switch_attribute psu_fan_speed_cal_attr = __ATTR(fan_speed_cal, S_IRUGO, psu_fan_speed_cal_show, NULL);
+static struct switch_attribute psu_blackbox_info_attr = __ATTR(blackbox_info, S_IRUGO, psu_blackbox_info_show, NULL);
+static struct switch_attribute psu_pmbus_info_attr = __ATTR(pmbus_info, S_IRUGO, psu_pmbus_info_show, NULL);
+static struct switch_attribute psu_clear_blackbox_attr = __ATTR(clear_blackbox, S_IWUSR, NULL, psu_clear_blackbox_store);
+static SWITCH_DEVICE_ATTR(in_vol_max, S_IRUGO, psu_attr_threshold_show, NULL, PSU_IN_VOL_MAX);
+static SWITCH_DEVICE_ATTR(in_vol_min, S_IRUGO, psu_attr_threshold_show, NULL, PSU_IN_VOL_MIN);
+static SWITCH_DEVICE_ATTR(in_curr_max, S_IRUGO, psu_attr_threshold_show, NULL, PSU_IN_CURR_MAX);
+static SWITCH_DEVICE_ATTR(in_curr_min, S_IRUGO, psu_attr_threshold_show, NULL, PSU_IN_CURR_MIN);
+static SWITCH_DEVICE_ATTR(in_power_max, S_IRUGO, psu_attr_threshold_show, NULL, PSU_IN_POWER_MAX);
+static SWITCH_DEVICE_ATTR(in_power_min, S_IRUGO, psu_attr_threshold_show, NULL, PSU_IN_POWER_MIN);
+static SWITCH_DEVICE_ATTR(out_vol_max, S_IRUGO, psu_attr_threshold_show, NULL, PSU_OUT_VOL_MAX);
+static SWITCH_DEVICE_ATTR(out_vol_min, S_IRUGO, psu_attr_threshold_show, NULL, PSU_OUT_VOL_MIN);
+static SWITCH_DEVICE_ATTR(out_curr_max, S_IRUGO, psu_attr_threshold_show, NULL, PSU_OUT_CURR_MAX);
+static SWITCH_DEVICE_ATTR(out_curr_min, S_IRUGO, psu_attr_threshold_show, NULL, PSU_OUT_CURR_MIN);
+static SWITCH_DEVICE_ATTR(out_power_max, S_IRUGO, psu_attr_threshold_show, NULL, PSU_OUT_POWER_MAX);
+static SWITCH_DEVICE_ATTR(out_power_min, S_IRUGO, psu_attr_threshold_show, NULL, PSU_OUT_POWER_MIN);
+static SWITCH_DEVICE_ATTR(fan_speed_max, S_IRUGO, psu_attr_threshold_show, NULL, PSU_FAN_SPEED_MAX);
+static SWITCH_DEVICE_ATTR(fan_speed_min, S_IRUGO, psu_attr_threshold_show, NULL, PSU_FAN_SPEED_MIN);
+
+static struct attribute *psu_attrs[] = {
+    &psu_model_name_attr.attr,
+    &psu_vendor_attr.attr,
+    &psu_date_attr.attr,
+    &psu_hw_attr.attr,
+    &psu_sn_attr.attr,
+    &psu_pn_attr.attr,
+    &psu_type_attr.attr,
+    &psu_in_curr_attr.attr,
+    &psu_in_vol_attr.attr,
+    &psu_in_power_attr.attr,
+    &psu_out_curr_attr.attr,
+    &psu_out_vol_attr.attr,
+    &psu_out_power_attr.attr,
+    &psu_out_max_power_attr.attr,
+    &psu_num_temps_attr.attr,
+    &psu_present_attr.attr,
+    &status_fr_pmbus_attr.attr,
+    &psu_status_attr.attr,
+    &psu_hw_status_attr.attr,
+    &psu_alarm_attr.attr,
+    &psu_out_status_attr.attr,
+    &psu_in_status_attr.attr,
+    &psu_fan_speed_attr.attr,
+    &psu_fan_ratio_attr.attr,
+    &psu_fan_direction_attr.attr,
+    &psu_led_status_attr.attr,
+    &psu_fan_speed_cal_attr.attr,
+    &psu_blackbox_info_attr.attr,
+    &psu_pmbus_info_attr.attr,
+    &psu_clear_blackbox_attr.attr,
+    &switch_dev_attr_in_vol_max.switch_attr.attr,
+    &switch_dev_attr_in_vol_min.switch_attr.attr,
+    &switch_dev_attr_in_curr_max.switch_attr.attr,
+    &switch_dev_attr_in_curr_min.switch_attr.attr,
+    &switch_dev_attr_in_power_max.switch_attr.attr,
+    &switch_dev_attr_in_power_min.switch_attr.attr,
+    &switch_dev_attr_out_vol_max.switch_attr.attr,
+    &switch_dev_attr_out_vol_min.switch_attr.attr,
+    &switch_dev_attr_out_curr_max.switch_attr.attr,
+    &switch_dev_attr_out_curr_min.switch_attr.attr,
+    &switch_dev_attr_out_power_max.switch_attr.attr,
+    &switch_dev_attr_out_power_min.switch_attr.attr,
+    &switch_dev_attr_fan_speed_max.switch_attr.attr,
+    &switch_dev_attr_fan_speed_min.switch_attr.attr,
+    NULL,
+};
+
+static struct attribute_group psu_attr_group = {
+    .attrs = psu_attrs,
+};
+
+/*******************************psu temp[1-n] dir and attrs*******************************************/
+static struct switch_attribute psu_temp_alias_attr = __ATTR(alias, S_IRUGO, psu_temp_alias_show, NULL);
+static struct switch_attribute psu_temp_type_attr = __ATTR(type, S_IRUGO, psu_temp_type_show, NULL);
+static struct switch_attribute psu_temp_max_attr = __ATTR(max, S_IRUGO | S_IWUSR, psu_temp_max_show, psu_temp_max_store);
+static struct switch_attribute psu_temp_min_attr = __ATTR(min,  S_IRUGO | S_IWUSR, psu_temp_min_show, psu_temp_min_store);
+static struct switch_attribute psu_temp_value_attr = __ATTR(value, S_IRUGO, psu_temp_value_show, NULL);
+
+static struct attribute *psu_temp_attrs[] = {
+    &psu_temp_alias_attr.attr,
+    &psu_temp_type_attr.attr,
+    &psu_temp_max_attr.attr,
+    &psu_temp_min_attr.attr,
+    &psu_temp_value_attr.attr,
+    NULL,
+};
+
+static struct attribute_group psu_temp_attr_group = {
+    .attrs = psu_temp_attrs,
+};
+
+static void psuindex_single_temp_remove_kobj_and_attrs(struct psu_obj_s *curr_psu, unsigned int temp_index)
+{
+    struct temp_obj_s *curr_temp; /* point to temp1 temp2...*/
+
+    curr_temp = &curr_psu->temp[temp_index - 1];
+    if (curr_temp->obj) {
+        sysfs_remove_group(&curr_temp->obj->kobj, &psu_temp_attr_group);
+        switch_kobject_delete(&curr_temp->obj);
+        PSU_DBG("delete psu%u temp%u dir and attrs success.\n", curr_psu->obj->index, temp_index);
+    }
+    return;
+}
+
+static int psuindex_single_temp_create_kobj_and_attrs(struct psu_obj_s *curr_psu, unsigned int temp_index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct temp_obj_s *curr_temp; /* point to temp1 temp2...*/
+
+    curr_temp = &curr_psu->temp[temp_index - 1];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "temp%u", temp_index);
+    curr_temp->obj = switch_kobject_create(name, &curr_psu->obj->kobj);
+    if (!curr_temp->obj) {
+        PSU_ERR("create psu%u, %s object error!\n", curr_psu->obj->index, name);
+        return -ENOMEM;
+    }
+    curr_temp->obj->index = temp_index;
+    if (sysfs_create_group(&curr_temp->obj->kobj, &psu_temp_attr_group) != 0) {
+        PSU_ERR("create psu%u, %s attrs error.\n", curr_psu->obj->index, name);
+        switch_kobject_delete(&curr_temp->obj);
+        return -EBADRQC;
+    }
+    PSU_DBG("create psu%u, %s success.\n", curr_psu->obj->index, name);
+    return 0;
+}
+
+static int psuindex_temp_create_kobj_and_attrs(struct psu_obj_s *curr_psu)
+{
+    unsigned int temp_index, i, temp_num;
+
+    temp_num = curr_psu->temp_number;
+    curr_psu->temp = kzalloc(sizeof(struct temp_obj_s) * temp_num, GFP_KERNEL);
+    if (!curr_psu->temp) {
+        PSU_ERR("kzalloc temp error, psu index: %u, temp number: %u.\n",
+            curr_psu->obj->index, temp_num);
+        return -ENOMEM;
+    }
+    for(temp_index = 1; temp_index <= temp_num; temp_index++) {
+        if(psuindex_single_temp_create_kobj_and_attrs(curr_psu, temp_index) != 0 ) {
+            goto temp_error;
+        }
+    }
+    return 0;
+temp_error:
+    for(i = temp_index; i > 0; i--) {
+        psuindex_single_temp_remove_kobj_and_attrs(curr_psu, i);
+    }
+    kfree(curr_psu->temp);
+    curr_psu->temp = NULL;
+    return -EBADRQC;
+}
+
+static void psuindex_temp_remove_kobj_and_attrs(struct psu_obj_s *curr_psu)
+{
+    unsigned int temp_index, temp_num;
+
+    if (curr_psu->temp) {
+        temp_num = curr_psu->temp_number;
+        for (temp_index = temp_num; temp_index > 0; temp_index--) {
+            psuindex_single_temp_remove_kobj_and_attrs(curr_psu, temp_index);
+        }
+        kfree(curr_psu->temp);
+        curr_psu->temp = NULL;
+    }
+    return;
+}
+
+/* create psu temp[1-n] directory and attributes*/
+static int psu_temp_create(void)
+{
+    int psu_num, temp_num;
+    unsigned int psu_index, i;
+    struct psu_obj_s *curr_psu;     /* point to psu1 psu2...*/
+
+    psu_num = g_psu.psu_number;
+    if (psu_num <= 0) {
+        PSU_DBG("psu number: %d, skip to create temp* dirs and attrs.\n", psu_num);
+        return 0;
+    }
+
+    check_p(g_psu_drv->get_psu_temp_number);
+    for(psu_index = 1; psu_index <= psu_num; psu_index++) {
+        temp_num = g_psu_drv->get_psu_temp_number(psu_index);
+        if (temp_num <= 0) {
+            PSU_DBG("psu%u temp number: %d, don't need to create temp* dirs and attrs.\n",
+                psu_index, temp_num);
+            continue;
+        }
+        curr_psu = &g_psu.psu[psu_index - 1];
+        curr_psu->temp_number = temp_num;
+        if(psuindex_temp_create_kobj_and_attrs(curr_psu) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for(i = psu_index; i > 0; i--) {
+        curr_psu = &g_psu.psu[i - 1];
+        psuindex_temp_remove_kobj_and_attrs(curr_psu);
+    }
+    return -EBADRQC;
+}
+
+/* delete psu temp[1-n] directory and attributes*/
+static void psu_temp_remove(void)
+{
+    unsigned int psu_index;
+    struct psu_obj_s *curr_psu;
+
+    if (g_psu.psu) {
+        for(psu_index = g_psu.psu_number; psu_index > 0; psu_index--) {
+            curr_psu = &g_psu.psu[psu_index - 1];
+            psuindex_temp_remove_kobj_and_attrs(curr_psu);
+            curr_psu->temp_number = 0;
+        }
+    }
+    return;
+}
+
+/* create psu* eeprom attributes */
+static int psu_sub_single_create_eeprom_attrs(unsigned int index)
+{
+    int ret, eeprom_size;
+    struct psu_obj_s *curr_psu;
+
+    check_p(g_psu_drv->get_psu_eeprom_size);
+    eeprom_size = g_psu_drv->get_psu_eeprom_size(index);
+    if (eeprom_size <= 0) {
+        PSU_INFO("psu%u, eeprom_size: %d, don't need to creat eeprom attr.\n",
+            index, eeprom_size);
+        return 0;
+    }
+
+    curr_psu = &g_psu.psu[index - 1];
+    sysfs_bin_attr_init(&curr_psu->bin);
+    curr_psu->bin.attr.name = "eeprom";
+    curr_psu->bin.attr.mode = 0444;
+    curr_psu->bin.read = psu_eeprom_read;
+    curr_psu->bin.size = eeprom_size;
+
+    ret = sysfs_create_bin_file(&curr_psu->obj->kobj, &curr_psu->bin);
+    if (ret) {
+        PSU_ERR("psu%u, create eeprom bin error, ret: %d. \n", index, ret);
+        return -EBADRQC;
+    }
+
+    PSU_DBG("psu%u, create bin file success, eeprom size:%d.\n", index, eeprom_size);
+    curr_psu->psu_creat_bin_flag = 1;
+    return 0;
+}
+
+static int psu_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct psu_obj_s *curr_psu;
+
+    curr_psu = &g_psu.psu[index - 1];
+    if (curr_psu->obj) {
+        if (curr_psu->psu_creat_bin_flag) {
+            sysfs_remove_bin_file(&curr_psu->obj->kobj, &curr_psu->bin);
+            curr_psu->psu_creat_bin_flag = 0;
+        }
+        sysfs_remove_group(&curr_psu->obj->kobj, &psu_attr_group);
+        switch_kobject_delete(&curr_psu->obj);
+        PSU_DBG("delete psu%u dir and attrs success.\n", index);
+    }
+    return 0;
+}
+
+static int psu_sub_single_create_kobj(struct kobject *parent, unsigned int index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct psu_obj_s *curr_psu;
+
+    curr_psu = &g_psu.psu[index - 1];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "psu%u", index);
+    curr_psu->obj = switch_kobject_create(name, parent);
+    if (!curr_psu->obj) {
+        PSU_ERR("create %s object error!\n", name);
+        return -ENOMEM;
+    }
+    curr_psu->obj->index = index;
+    if (sysfs_create_group(&curr_psu->obj->kobj, &psu_attr_group) != 0) {
+        PSU_ERR("create %s attrs error.\n", name);
+        switch_kobject_delete(&curr_psu->obj);
+        return -EBADRQC;
+    }
+    PSU_DBG("create %s dir and attrs success.\n", name);
+    return 0;
+}
+
+
+static int psu_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
+{
+    int ret;
+
+    ret = psu_sub_single_create_kobj(parent, index);
+    if (ret < 0) {
+        PSU_ERR("create psu%d dir error.\n", index);
+        return ret;
+    }
+
+    psu_sub_single_create_eeprom_attrs(index);
+    return 0;
+}
+
+static int psu_sub_create_kobj_and_attrs(struct kobject *parent, int psu_num)
+{
+    unsigned int psu_index, i;
+
+    g_psu.psu = kzalloc(sizeof(struct psu_obj_s) * psu_num, GFP_KERNEL);
+    if (!g_psu.psu) {
+        PSU_ERR("kzalloc psu.psu error, psu number = %d.\n", psu_num);
+        return -ENOMEM;
+    }
+
+    for (psu_index = 1; psu_index <= psu_num; psu_index++) {
+        if (psu_sub_single_create_kobj_and_attrs(parent, psu_index) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = psu_index; i > 0; i--) {
+        psu_sub_single_remove_kobj_and_attrs(i);
+    }
+    kfree(g_psu.psu);
+    g_psu.psu = NULL;
+    return -EBADRQC;
+}
+
+/* create psu[1-n] directory and attributes*/
+static int psu_sub_create(void)
+{
+    int ret;
+
+    ret = psu_sub_create_kobj_and_attrs(&g_psu_obj->kobj, g_psu.psu_number);
+    return ret;
+}
+
+/* delete psu[1-n] directory and attributes*/
+static void psu_sub_remove(void)
+{
+    unsigned int psu_index;
+
+    if (g_psu.psu) {
+        for (psu_index = g_psu.psu_number; psu_index > 0; psu_index--) {
+            psu_sub_single_remove_kobj_and_attrs(psu_index);
+        }
+        kfree(g_psu.psu);
+        g_psu.psu = NULL;
+    }
+    g_psu.psu_number = 0;
+    return;
+}
+
+/* create psu directory and number attributes*/
+static int psu_root_create(void)
+{
+    g_psu_obj = switch_kobject_create("psu", NULL);
+    if (!g_psu_obj) {
+        PSU_ERR("switch_kobject_create psu error!\n");
+        return -ENOMEM;
+    }
+
+    if (sysfs_create_group(&g_psu_obj->kobj, &psu_root_attr_group) != 0) {
+        switch_kobject_delete(&g_psu_obj);
+        PSU_ERR("create psu dir attrs error!\n");
+        return -EBADRQC;
+    }
+    return 0;
+}
+
+/* delete psu directory and number attributes*/
+static void psu_root_remove(void)
+{
+    if (g_psu_obj) {
+        sysfs_remove_group(&g_psu_obj->kobj, &psu_root_attr_group);
+        switch_kobject_delete(&g_psu_obj);
+        PSU_DBG("delete psu dir and attrs success.\n");
+    }
+    return;
+}
+
+int s3ip_sysfs_psu_drivers_register(struct s3ip_sysfs_psu_drivers_s *drv)
+{
+    int ret, psu_num;
+
+    PSU_INFO("s3ip_sysfs_psu_drivers_register...\n");
+    if (g_psu_drv) {
+        PSU_ERR("g_psu_drv is not NULL, can't register\n");
+        return -EPERM;
+    }
+
+    check_p(drv);
+    check_p(drv->get_psu_number);
+    g_psu_drv = drv;
+
+    psu_num = g_psu_drv->get_psu_number();
+    if (psu_num <= 0) {
+        PSU_ERR("psu number: %d, don't need to create psu dirs and attrs.\n", psu_num);
+        g_psu_drv = NULL;
+        return -EINVAL;
+    }
+
+    mem_clear(&g_psu, sizeof(struct psu_s));
+    g_psu.psu_number = psu_num;
+    ret = psu_root_create();
+    if (ret < 0) {
+        PSU_ERR("create psu root dir and attrs failed, ret: %d\n", ret);
+        g_psu_drv = NULL;
+        return ret;
+    }
+
+    ret = psu_sub_create();
+    if (ret < 0) {
+        PSU_ERR("create psu sub dir and attrs failed, ret: %d\n", ret);
+        psu_root_remove();
+        g_psu_drv = NULL;
+        return ret;
+    }
+
+    ret = psu_temp_create();
+    if (ret < 0) {
+        PSU_ERR("create psu temp dir and attrs failed, ret: %d\n", ret);
+        psu_sub_remove();
+        psu_root_remove();
+        g_psu_drv = NULL;
+        return ret;
+    }
+    PSU_INFO("s3ip_sysfs_psu_drivers_register success.\n");
+    return 0;
+}
+
+void s3ip_sysfs_psu_drivers_unregister(void)
+{
+    if (g_psu_drv) {
+        psu_temp_remove();
+        psu_sub_remove();
+        psu_root_remove();
+        g_psu_drv = NULL;
+        PSU_DBG("s3ip_sysfs_psu_drivers_unregister success.\n");
+    }
+
+    return;
+}
+
+EXPORT_SYMBOL(s3ip_sysfs_psu_drivers_register);
+EXPORT_SYMBOL(s3ip_sysfs_psu_drivers_unregister);
+module_param(g_psu_loglevel, int, 0644);
+MODULE_PARM_DESC(g_psu_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
+module_param(g_psu_present_debug, bool, 0644);
+MODULE_PARM_DESC(g_psu_present_debug, "the psu present debug switch(0: disable, 1:enable, defalut: 0).\n");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/slot_sysfs.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/slot_sysfs.c
new file mode 100644
index 000000000000..eb3bde77b7dd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/slot_sysfs.c
@@ -0,0 +1,1955 @@
+/*
+ * An slot_sysfs driver for slot sysfs devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+
+#include "switch.h"
+#include "slot_sysfs.h"
+
+static int g_slot_loglevel = 0;
+
+#define SLOT_INFO(fmt, args...) do {                                        \
+    if (g_slot_loglevel & INFO) { \
+        printk(KERN_INFO "[SLOT_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define SLOT_ERR(fmt, args...) do {                                        \
+    if (g_slot_loglevel & ERR) { \
+        printk(KERN_ERR "[SLOT_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define SLOT_DBG(fmt, args...) do {                                        \
+    if (g_slot_loglevel & DBG) { \
+        printk(KERN_DEBUG "[SLOT_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct slot_temp_obj_s {
+    struct switch_obj *obj;
+};
+
+struct slot_vol_obj_s {
+    struct switch_obj *obj;
+};
+
+struct slot_curr_obj_s {
+    struct switch_obj *obj;
+};
+
+struct slot_fpga_obj_s {
+    struct switch_obj *obj;
+};
+
+struct slot_cpld_obj_s {
+    struct switch_obj *obj;
+};
+
+struct slot_obj_s {
+    unsigned int temp_number;
+    unsigned int vol_number;
+    unsigned int curr_number;
+    unsigned int fpga_number;
+    unsigned int cpld_number;
+    struct slot_temp_obj_s *temp;
+    struct slot_vol_obj_s *vol;
+    struct slot_curr_obj_s *curr;
+    struct slot_fpga_obj_s *fpga;
+    struct slot_cpld_obj_s *cpld;
+    struct switch_obj *obj;
+};
+
+struct slot_s {
+    unsigned int slot_number;
+    struct slot_obj_s *slot;
+};
+
+static struct slot_s g_slot;
+static struct switch_obj *g_slot_obj = NULL;
+static struct s3ip_sysfs_slot_drivers_s *g_slot_drv = NULL;
+
+static ssize_t slot_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%u\n", g_slot.slot_number);
+}
+
+static ssize_t slot_temp_number_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int index;
+
+    index = obj->index;
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%u\n", g_slot.slot[index - 1].temp_number);
+}
+
+static ssize_t slot_vol_number_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int index;
+
+    index = obj->index;
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%u\n", g_slot.slot[index - 1].vol_number);
+}
+
+static ssize_t slot_curr_number_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int index;
+
+    index = obj->index;
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%u\n", g_slot.slot[index - 1].curr_number);
+}
+
+static ssize_t slot_fpga_number_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int index;
+
+    index = obj->index;
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%u\n", g_slot.slot[index - 1].fpga_number);
+}
+
+static ssize_t slot_cpld_number_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int index;
+
+    index = obj->index;
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%u\n", g_slot.slot[index - 1].cpld_number);
+}
+
+static ssize_t slot_model_name_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int slot_index;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_model_name);
+
+    slot_index = obj->index;
+    SLOT_DBG("slot index: %u\n", slot_index);
+    return g_slot_drv->get_slot_model_name(slot_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_vendor_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int slot_index;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_vendor);
+
+    slot_index = obj->index;
+    SLOT_DBG("slot index: %u\n", slot_index);
+    return g_slot_drv->get_slot_vendor(slot_index, buf, PAGE_SIZE);
+}
+static ssize_t slot_sn_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int slot_index;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_serial_number);
+
+    slot_index = obj->index;
+    SLOT_DBG("slot index: %u\n", slot_index);
+    return g_slot_drv->get_slot_serial_number(slot_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_pn_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_part_number);
+
+    slot_index = obj->index;
+    SLOT_DBG("slot index: %u\n", slot_index);
+    return g_slot_drv->get_slot_part_number(slot_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_hw_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_hardware_version);
+
+    slot_index = obj->index;
+    SLOT_DBG("slot index: %u\n", slot_index);
+    return g_slot_drv->get_slot_hardware_version(slot_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_status);
+
+    slot_index = obj->index;
+    SLOT_DBG("slot index: %u\n", slot_index);
+    return g_slot_drv->get_slot_status(slot_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_led_status_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int slot_index;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_led_status);
+
+    slot_index = obj->index;
+    SLOT_DBG("slot index: %u\n", slot_index);
+    return g_slot_drv->get_slot_led_status(slot_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_led_status_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char *buf, size_t count)
+{
+    unsigned int slot_index;
+    int ret, led_status;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->set_slot_led_status);
+
+    slot_index = obj->index;
+    ret = kstrtoint(buf, 0, &led_status);
+    if (ret != 0) {
+        SLOT_ERR("invaild slot led status ret: %d, buf: %s.\n", ret, buf);
+        return -EINVAL;
+    }
+    SLOT_DBG("slot index: %u, led_status: %d\n", slot_index, led_status);
+    ret = g_slot_drv->set_slot_led_status(slot_index, led_status);
+    if (ret < 0) {
+        SLOT_ERR("set slot%u led_status: %d failed, ret: %d\n", slot_index, led_status, ret);
+        return -EIO;
+    }
+    SLOT_DBG("set slot%u led_status: %d success\n", slot_index, led_status);
+    return count;
+}
+
+/*************************************slot temp*************************************************/
+static ssize_t slot_temp_value_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, temp_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_temp_value);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    temp_index = obj->index;
+
+    SLOT_DBG("slot index: %u, temp index: %u\n", slot_index, temp_index);
+    return g_slot_drv->get_slot_temp_value(slot_index, temp_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_temp_alias_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, temp_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_temp_alias);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    temp_index = obj->index;
+
+    SLOT_DBG("slot index: %u, temp index: %u\n", slot_index, temp_index);
+    return g_slot_drv->get_slot_temp_alias(slot_index, temp_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_temp_type_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, temp_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_temp_type);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    temp_index = obj->index;
+
+    SLOT_DBG("slot index: %u, temp index: %u\n", slot_index, temp_index);
+    return g_slot_drv->get_slot_temp_type(slot_index, temp_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_temp_max_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, temp_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_temp_max);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    temp_index = obj->index;
+
+    SLOT_DBG("slot index: %u, temp index: %u\n", slot_index, temp_index);
+    return g_slot_drv->get_slot_temp_max(slot_index, temp_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_temp_max_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int slot_index, temp_index;
+    int ret;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->set_slot_temp_max);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    temp_index = obj->index;
+    ret = g_slot_drv->set_slot_temp_max(slot_index, temp_index, buf, count);
+    if (ret < 0) {
+        SLOT_ERR("set slot%u temp%u max threshold failed, value: %s, count: %lu, ret: %d\n",
+            slot_index, temp_index, buf, count, ret);
+        return ret;
+    }
+    SLOT_DBG("set slot%u temp%u max threshold success, value: %s, count: %lu, ret: %d\n",
+        slot_index, temp_index, buf, count, ret);
+    return count;
+}
+
+static ssize_t slot_temp_min_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, temp_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_temp_min);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    temp_index = obj->index;
+
+    SLOT_DBG("slot index: %u, temp index: %u\n", slot_index, temp_index);
+    return g_slot_drv->get_slot_temp_min(slot_index, temp_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_temp_min_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int slot_index, temp_index;
+    int ret;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->set_slot_temp_min);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    temp_index = obj->index;
+    ret = g_slot_drv->set_slot_temp_min(slot_index, temp_index, buf, count);
+    if (ret < 0) {
+        SLOT_ERR("set slot%u temp%u min threshold failed, value: %s, count: %lu, ret: %d\n",
+            slot_index, temp_index, buf, count, ret);
+        return ret;
+    }
+    SLOT_DBG("set slot%u temp%u min threshold success, value: %s, count: %lu, ret: %d\n",
+        slot_index, temp_index, buf, count, ret);
+    return count;
+}
+/**********************************end of slot temp**********************************************/
+
+/*************************************slot vol*************************************************/
+static ssize_t slot_vol_value_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, vol_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_vol_value);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    vol_index = obj->index;
+
+    SLOT_DBG("slot index: %u, vol index: %u\n", slot_index, vol_index);
+    return g_slot_drv->get_slot_vol_value(slot_index, vol_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_vol_alias_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, vol_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_vol_alias);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    vol_index = obj->index;
+
+    SLOT_DBG("slot index: %u, vol index: %u\n", slot_index, vol_index);
+    return g_slot_drv->get_slot_vol_alias(slot_index, vol_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_vol_type_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, vol_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_vol_type);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    vol_index = obj->index;
+
+    SLOT_DBG("slot index: %u, vol index: %u\n", slot_index, vol_index);
+    return g_slot_drv->get_slot_vol_type(slot_index, vol_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_vol_max_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, vol_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_vol_max);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    vol_index = obj->index;
+
+    SLOT_DBG("slot index: %u, vol index: %u\n", slot_index, vol_index);
+    return g_slot_drv->get_slot_vol_max(slot_index, vol_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_vol_max_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int slot_index, vol_index;
+    int ret;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->set_slot_vol_max);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    vol_index = obj->index;
+    ret = g_slot_drv->set_slot_vol_max(slot_index, vol_index, buf, count);
+    if (ret < 0) {
+        SLOT_ERR("set slot%u vol%u max threshold failed, value: %s, count: %lu, ret: %d\n",
+            slot_index, vol_index, buf, count, ret);
+        return ret;
+    }
+    SLOT_DBG("set slot%u vol%u max threshold success, value: %s, count: %lu, ret: %d\n",
+        slot_index, vol_index, buf, count, ret);
+    return count;
+}
+
+static ssize_t slot_vol_min_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, vol_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_vol_min);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    vol_index = obj->index;
+
+    SLOT_DBG("slot index: %u, vol index: %u\n", slot_index, vol_index);
+    return g_slot_drv->get_slot_vol_min(slot_index, vol_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_vol_min_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int slot_index, vol_index;
+    int ret;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->set_slot_vol_min);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    vol_index = obj->index;
+    ret = g_slot_drv->set_slot_vol_min(slot_index, vol_index, buf, count);
+    if (ret < 0) {
+        SLOT_ERR("set slot%u vol%u min threshold failed, value: %s, count: %lu, ret: %d\n",
+            slot_index, vol_index, buf, count, ret);
+        return ret;
+    }
+    SLOT_DBG("set slot%u vol%u min threshold success, value: %s, count: %lu, ret: %d\n",
+        slot_index, vol_index, buf, count, ret);
+    return count;
+}
+
+static ssize_t slot_vol_range_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, vol_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_vol_range);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    vol_index = obj->index;
+
+    SLOT_DBG("slot index: %u, vol index: %u\n", slot_index, vol_index);
+    return g_slot_drv->get_slot_vol_range(slot_index, vol_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_vol_nominal_value_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, vol_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_vol_nominal_value);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    vol_index = obj->index;
+
+    SLOT_DBG("slot index: %u, vol index: %u\n", slot_index, vol_index);
+    return g_slot_drv->get_slot_vol_nominal_value(slot_index, vol_index, buf, PAGE_SIZE);
+}
+/**********************************end of slot vol**********************************************/
+/*************************************slot curr*************************************************/
+static ssize_t slot_curr_value_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, curr_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_curr_value);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    curr_index = obj->index;
+
+    SLOT_DBG("slot index: %u, curr index: %u\n", slot_index, curr_index);
+    return g_slot_drv->get_slot_curr_value(slot_index, curr_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_curr_alias_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, curr_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_curr_alias);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    curr_index = obj->index;
+
+    SLOT_DBG("slot index: %u, curr index: %u\n", slot_index, curr_index);
+    return g_slot_drv->get_slot_curr_alias(slot_index, curr_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_curr_type_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, curr_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_curr_type);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    curr_index = obj->index;
+
+    SLOT_DBG("slot index: %u, curr index: %u\n", slot_index, curr_index);
+    return g_slot_drv->get_slot_curr_type(slot_index, curr_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_curr_max_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, curr_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_curr_max);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    curr_index = obj->index;
+
+    SLOT_DBG("slot index: %u, curr index: %u\n", slot_index, curr_index);
+    return g_slot_drv->get_slot_curr_max(slot_index, curr_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_curr_max_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int slot_index, curr_index;
+    int ret;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->set_slot_curr_max);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    curr_index = obj->index;
+    return g_slot_drv->set_slot_curr_max(slot_index, curr_index, buf, count);
+    if (ret < 0) {
+        SLOT_ERR("set slot%u curr%u max threshold failed, value: %s, count: %lu, ret: %d\n",
+            slot_index, curr_index, buf, count, ret);
+        return ret;
+    }
+    SLOT_DBG("set slot%u curr%u max threshold success, value: %s, count: %lu, ret: %d\n",
+        slot_index, curr_index, buf, count, ret);
+    return count;
+}
+
+static ssize_t slot_curr_min_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, curr_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_curr_min);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    curr_index = obj->index;
+
+    SLOT_DBG("slot index: %u, curr index: %u\n", slot_index, curr_index);
+    return g_slot_drv->get_slot_curr_min(slot_index, curr_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_curr_min_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int slot_index, curr_index;
+    int ret;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->set_slot_curr_min);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    curr_index = obj->index;
+    ret = g_slot_drv->set_slot_curr_min(slot_index, curr_index, buf, count);
+    if (ret < 0) {
+        SLOT_ERR("set slot%u curr%u min threshold failed, value: %s, count: %lu, ret: %d\n",
+            slot_index, curr_index, buf, count, ret);
+        return ret;
+    }
+    SLOT_DBG("set slot%u curr%u min threshold success, value: %s, count: %lu, ret: %d\n",
+        slot_index, curr_index, buf, count, ret);
+    return count;
+}
+/**********************************end of slot curr**********************************************/
+/*************************************slot fpga*************************************************/
+static ssize_t slot_fpga_alias_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, fpga_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_fpga_alias);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    fpga_index = obj->index;
+
+    SLOT_DBG("slot index: %u, fpga index: %u\n", slot_index, fpga_index);
+    return g_slot_drv->get_slot_fpga_alias(slot_index, fpga_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_fpga_type_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, fpga_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_fpga_type);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    fpga_index = obj->index;
+
+    SLOT_DBG("slot index: %u, fpga index: %u\n", slot_index, fpga_index);
+    return g_slot_drv->get_slot_fpga_type(slot_index, fpga_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_fpga_fw_version_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int slot_index, fpga_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_fpga_firmware_version);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    fpga_index = obj->index;
+
+    SLOT_DBG("slot index: %u, fpga index: %u\n", slot_index, fpga_index);
+    return g_slot_drv->get_slot_fpga_firmware_version(slot_index, fpga_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_fpga_board_version_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int slot_index, fpga_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_fpga_board_version);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    fpga_index = obj->index;
+
+    SLOT_DBG("slot index: %u, fpga index: %u\n", slot_index, fpga_index);
+    return g_slot_drv->get_slot_fpga_board_version(slot_index, fpga_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_fpga_test_reg_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int slot_index, fpga_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_fpga_test_reg);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    fpga_index = obj->index;
+
+    SLOT_DBG("slot index: %u, fpga index: %u\n", slot_index, fpga_index);
+    return g_slot_drv->get_slot_fpga_test_reg(slot_index, fpga_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_fpga_test_reg_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int slot_index, fpga_index, value;
+    int ret;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->set_slot_fpga_test_reg);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    fpga_index = obj->index;
+    sscanf(buf, "0x%x", &value);
+    ret = g_slot_drv->set_slot_fpga_test_reg(slot_index, fpga_index, value);
+    if (ret < 0) {
+        SLOT_ERR("set slot%u fpga%u test reg failed, value:0x%x, ret: %d.\n",
+            slot_index, fpga_index, value, ret);
+        return ret;
+    }
+    SLOT_DBG("set slot%u fpga%u test reg success, value: 0x%x.\n", slot_index, fpga_index, value);
+    return count;
+}
+/**********************************end of slot fpga**********************************************/
+/*************************************slot cpld*************************************************/
+static ssize_t slot_cpld_alias_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, cpld_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_cpld_alias);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    cpld_index = obj->index;
+
+    SLOT_DBG("slot index: %u, cpld index: %u\n", slot_index, cpld_index);
+    return g_slot_drv->get_slot_cpld_alias(slot_index, cpld_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_cpld_type_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, cpld_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_cpld_type);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    cpld_index = obj->index;
+
+    SLOT_DBG("slot index: %u, cpld index: %u\n", slot_index, cpld_index);
+    return g_slot_drv->get_slot_cpld_type(slot_index, cpld_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_cpld_fw_version_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int slot_index, cpld_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_cpld_firmware_version);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    cpld_index = obj->index;
+
+    SLOT_DBG("slot index: %u, cpld index: %u\n", slot_index, cpld_index);
+    return g_slot_drv->get_slot_cpld_firmware_version(slot_index, cpld_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_cpld_board_version_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int slot_index, cpld_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_cpld_board_version);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    cpld_index = obj->index;
+
+    SLOT_DBG("slot index: %u, cpld index: %u\n", slot_index, cpld_index);
+    return g_slot_drv->get_slot_cpld_board_version(slot_index, cpld_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_cpld_test_reg_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int slot_index, cpld_index;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_cpld_test_reg);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    cpld_index = obj->index;
+
+    SLOT_DBG("slot index: %u, cpld index: %u\n", slot_index, cpld_index);
+    return g_slot_drv->get_slot_cpld_test_reg(slot_index, cpld_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_cpld_test_reg_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int slot_index, cpld_index, value;
+    int ret;
+    struct switch_obj *p_obj;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->set_slot_cpld_test_reg);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    slot_index = p_obj->index;
+    cpld_index = obj->index;
+    sscanf(buf, "0x%x", &value);
+    ret = g_slot_drv->set_slot_cpld_test_reg(slot_index, cpld_index, value);
+    if (ret < 0) {
+        SLOT_ERR("set slot%u cpld%u test reg failed, value:0x%x, ret: %d.\n",
+            slot_index, cpld_index, value, ret);
+        return ret;
+    }
+    SLOT_DBG("set slot%u cpld%u test reg success, value: 0x%x.\n", slot_index, cpld_index, value);
+    return count;
+}
+
+static ssize_t slot_power_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    unsigned int slot_index;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->get_slot_power_status);
+
+    slot_index = obj->index;
+    SLOT_DBG("slot index: %u\n", slot_index);
+    return g_slot_drv->get_slot_power_status(slot_index, buf, PAGE_SIZE);
+}
+
+static ssize_t slot_power_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char *buf, size_t count)
+{
+    unsigned int slot_index;
+    int ret, power;
+
+    check_p(g_slot_drv);
+    check_p(g_slot_drv->set_slot_power_status);
+
+    slot_index = obj->index;
+    ret = kstrtoint(buf, 0, &power);
+    if (ret != 0) {
+        SLOT_ERR("invaild slot power status ret: %d, buf: %s.\n", ret, buf);
+        return -EINVAL;
+    }
+    SLOT_DBG("slot index: %u, power: %d\n", slot_index, power);
+    ret = g_slot_drv->set_slot_power_status(slot_index, power);
+    if (ret < 0) {
+        SLOT_ERR("set slot%u power: %d failed, ret: %d\n", slot_index, power, ret);
+        return ret;
+    }
+    SLOT_DBG("set slot%u power: %d success\n", slot_index, power);
+    return count;
+}
+/**********************************end of slot cpld**********************************************/
+/**********************************slot dir and attrs********************************************/
+static struct switch_attribute slot_number_attr = __ATTR(number, S_IRUGO, slot_number_show, NULL);
+
+static struct attribute *slot_dir_attrs[] = {
+    &slot_number_attr.attr,
+    NULL,
+};
+
+static struct attribute_group slot_root_attr_group = {
+    .attrs = slot_dir_attrs,
+};
+
+/*******************************slot[1-n] dir and attrs*******************************************/
+static struct switch_attribute slot_model_name_attr = __ATTR(model_name, S_IRUGO, slot_model_name_show, NULL);
+static struct switch_attribute slot_vendor_attr = __ATTR(vendor, S_IRUGO, slot_vendor_show, NULL);
+static struct switch_attribute slot_hw_attr = __ATTR(hardware_version, S_IRUGO, slot_hw_show, NULL);
+static struct switch_attribute slot_sn_attr = __ATTR(serial_number, S_IRUGO, slot_sn_show, NULL);
+static struct switch_attribute slot_pn_attr = __ATTR(part_number, S_IRUGO, slot_pn_show, NULL);
+static struct switch_attribute slot_status_attr = __ATTR(status, S_IRUGO, slot_status_show, NULL);
+static struct switch_attribute slot_led_status_attr = __ATTR(led_status, S_IRUGO | S_IWUSR, slot_led_status_show, slot_led_status_store);
+static struct switch_attribute slot_power_on_attr = __ATTR(power_on, S_IRUGO | S_IWUSR, slot_power_show, slot_power_store);
+static struct switch_attribute num_temp_sensors_attr = __ATTR(num_temp_sensors, S_IRUGO, slot_temp_number_show, NULL);
+static struct switch_attribute num_vol_sensors_attr = __ATTR(num_vol_sensors, S_IRUGO, slot_vol_number_show, NULL);
+static struct switch_attribute num_curr_sensors_attr = __ATTR(num_curr_sensors, S_IRUGO, slot_curr_number_show, NULL);
+static struct switch_attribute num_fpga_attr = __ATTR(num_fpgas, S_IRUGO, slot_fpga_number_show, NULL);
+static struct switch_attribute num_cpld_attr = __ATTR(num_cplds, S_IRUGO, slot_cpld_number_show, NULL);
+
+static struct attribute *slot_attrs[] = {
+    &slot_model_name_attr.attr,
+    &slot_vendor_attr.attr,
+    &slot_power_on_attr.attr,
+    &slot_hw_attr.attr,
+    &slot_sn_attr.attr,
+    &slot_pn_attr.attr,
+    &slot_status_attr.attr,
+    &slot_led_status_attr.attr,
+    &num_temp_sensors_attr.attr,
+    &num_vol_sensors_attr.attr,
+    &num_curr_sensors_attr.attr,
+    &num_fpga_attr.attr,
+    &num_cpld_attr.attr,
+    NULL,
+};
+
+static struct attribute_group slot_attr_group = {
+    .attrs = slot_attrs,
+};
+
+/*******************************slot temp[1-n] dir and attrs*******************************************/
+static struct switch_attribute slot_temp_alias_attr = __ATTR(alias, S_IRUGO, slot_temp_alias_show, NULL);
+static struct switch_attribute slot_temp_type_attr = __ATTR(type, S_IRUGO, slot_temp_type_show, NULL);
+static struct switch_attribute slot_temp_max_attr = __ATTR(max, S_IRUGO | S_IWUSR, slot_temp_max_show, slot_temp_max_store);
+static struct switch_attribute slot_temp_min_attr = __ATTR(min,  S_IRUGO | S_IWUSR, slot_temp_min_show, slot_temp_min_store);
+static struct switch_attribute slot_temp_value_attr = __ATTR(value, S_IRUGO, slot_temp_value_show, NULL);
+
+static struct attribute *slot_temp_attrs[] = {
+    &slot_temp_alias_attr.attr,
+    &slot_temp_type_attr.attr,
+    &slot_temp_max_attr.attr,
+    &slot_temp_min_attr.attr,
+    &slot_temp_value_attr.attr,
+    NULL,
+};
+
+static struct attribute_group slot_temp_attr_group = {
+    .attrs = slot_temp_attrs,
+};
+
+/*******************************slot vol[1-n] dir and attrs*******************************************/
+static struct switch_attribute slot_vol_alias_attr = __ATTR(alias, S_IRUGO, slot_vol_alias_show, NULL);
+static struct switch_attribute slot_vol_type_attr = __ATTR(type, S_IRUGO, slot_vol_type_show, NULL);
+static struct switch_attribute slot_vol_max_attr = __ATTR(max, S_IRUGO | S_IWUSR, slot_vol_max_show, slot_vol_max_store);
+static struct switch_attribute slot_vol_min_attr = __ATTR(min,  S_IRUGO | S_IWUSR, slot_vol_min_show, slot_vol_min_store);
+static struct switch_attribute slot_vol_value_attr = __ATTR(value, S_IRUGO, slot_vol_value_show, NULL);
+static struct switch_attribute slot_vol_range_attr = __ATTR(range, S_IRUGO, slot_vol_range_show, NULL);
+static struct switch_attribute slot_vol_nominal_value_attr = __ATTR(nominal_value, S_IRUGO, slot_vol_nominal_value_show, NULL);
+
+static struct attribute *slot_vol_attrs[] = {
+    &slot_vol_alias_attr.attr,
+    &slot_vol_type_attr.attr,
+    &slot_vol_max_attr.attr,
+    &slot_vol_min_attr.attr,
+    &slot_vol_value_attr.attr,
+    &slot_vol_range_attr.attr,
+    &slot_vol_nominal_value_attr.attr,
+    NULL,
+};
+
+static struct attribute_group slot_vol_attr_group = {
+    .attrs = slot_vol_attrs,
+};
+
+/*******************************slot curr[1-n] dir and attrs*******************************************/
+static struct switch_attribute slot_curr_alias_attr = __ATTR(alias, S_IRUGO, slot_curr_alias_show, NULL);
+static struct switch_attribute slot_curr_type_attr = __ATTR(type, S_IRUGO, slot_curr_type_show, NULL);
+static struct switch_attribute slot_curr_max_attr = __ATTR(max, S_IRUGO | S_IWUSR, slot_curr_max_show, slot_curr_max_store);
+static struct switch_attribute slot_curr_min_attr = __ATTR(min,  S_IRUGO | S_IWUSR, slot_curr_min_show, slot_curr_min_store);
+static struct switch_attribute slot_curr_value_attr = __ATTR(value, S_IRUGO, slot_curr_value_show, NULL);
+
+static struct attribute *slot_curr_attrs[] = {
+    &slot_curr_alias_attr.attr,
+    &slot_curr_type_attr.attr,
+    &slot_curr_max_attr.attr,
+    &slot_curr_min_attr.attr,
+    &slot_curr_value_attr.attr,
+    NULL,
+};
+
+static struct attribute_group slot_curr_attr_group = {
+    .attrs = slot_curr_attrs,
+};
+
+/*******************************slot fpga[1-n] dir and attrs*******************************************/
+static struct switch_attribute slot_fpga_alias_attr = __ATTR(alias, S_IRUGO, slot_fpga_alias_show, NULL);
+static struct switch_attribute slot_fpga_type_attr = __ATTR(type, S_IRUGO, slot_fpga_type_show, NULL);
+static struct switch_attribute slot_fpga_fw_version_attr = __ATTR(firmware_version, S_IRUGO, slot_fpga_fw_version_show, NULL);
+static struct switch_attribute slot_fpga_board_version_attr = __ATTR(board_version, S_IRUGO, slot_fpga_board_version_show, NULL);
+static struct switch_attribute slot_fpga_test_reg_attr = __ATTR(reg_test, S_IRUGO | S_IWUSR, slot_fpga_test_reg_show, slot_fpga_test_reg_store);
+
+static struct attribute *slot_fpga_attrs[] = {
+    &slot_fpga_alias_attr.attr,
+    &slot_fpga_type_attr.attr,
+    &slot_fpga_fw_version_attr.attr,
+    &slot_fpga_board_version_attr.attr,
+    &slot_fpga_test_reg_attr.attr,
+    NULL,
+};
+
+static struct attribute_group slot_fpga_attr_group = {
+    .attrs = slot_fpga_attrs,
+};
+
+/*******************************slot cpld[1-n] dir and attrs*******************************************/
+static struct switch_attribute slot_cpld_alias_attr = __ATTR(alias, S_IRUGO, slot_cpld_alias_show, NULL);
+static struct switch_attribute slot_cpld_type_attr = __ATTR(type, S_IRUGO, slot_cpld_type_show, NULL);
+static struct switch_attribute slot_cpld_fw_version_attr = __ATTR(firmware_version, S_IRUGO, slot_cpld_fw_version_show, NULL);
+static struct switch_attribute slot_cpld_board_version_attr = __ATTR(board_version, S_IRUGO, slot_cpld_board_version_show, NULL);
+static struct switch_attribute slot_cpld_test_reg_attr = __ATTR(reg_test, S_IRUGO | S_IWUSR, slot_cpld_test_reg_show, slot_cpld_test_reg_store);
+
+static struct attribute *slot_cpld_attrs[] = {
+    &slot_cpld_alias_attr.attr,
+    &slot_cpld_type_attr.attr,
+    &slot_cpld_fw_version_attr.attr,
+    &slot_cpld_board_version_attr.attr,
+    &slot_cpld_test_reg_attr.attr,
+    NULL,
+};
+
+static struct attribute_group slot_cpld_attr_group = {
+    .attrs = slot_cpld_attrs,
+};
+
+/***************************************slot cpld*****************************************/
+static void slotindex_single_cpld_remove_kobj_and_attrs(struct slot_obj_s *curr_slot,
+                unsigned int cpld_index)
+{
+    struct slot_cpld_obj_s *curr_cpld;
+
+    curr_cpld = &curr_slot->cpld[cpld_index - 1];
+    if (curr_cpld->obj) {
+        sysfs_remove_group(&curr_cpld->obj->kobj, &slot_cpld_attr_group);
+        switch_kobject_delete(&curr_cpld->obj);
+        SLOT_DBG("delete slot%u cpld%u dir and attrs success.\n", curr_slot->obj->index,
+            cpld_index);
+    }
+    return;
+}
+
+static int slotindex_single_cpld_create_kobj_and_attrs(struct slot_obj_s *curr_slot,
+               unsigned int cpld_index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct slot_cpld_obj_s *curr_cpld;
+
+    curr_cpld = &curr_slot->cpld[cpld_index - 1];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "cpld%u", cpld_index);
+    curr_cpld->obj = switch_kobject_create(name, &curr_slot->obj->kobj);
+    if (!curr_cpld->obj) {
+        SLOT_ERR("create slot%u %s object error!\n", curr_slot->obj->index, name);
+        return -ENOMEM;
+    }
+    curr_cpld->obj->index = cpld_index;
+    if (sysfs_create_group(&curr_cpld->obj->kobj, &slot_cpld_attr_group) != 0) {
+        SLOT_ERR("create slot%u %s attrs error.\n", curr_slot->obj->index, name);
+        switch_kobject_delete(&curr_cpld->obj);
+        return -EBADRQC;
+    }
+    SLOT_DBG("create slot%u %s success.\n", curr_slot->obj->index, name);
+    return 0;
+}
+
+static void slotindex_cpld_remove_kobj_and_attrs(struct slot_obj_s *curr_slot)
+{
+    unsigned int cpld_index, cpld_num;
+
+    if (curr_slot->cpld) {
+        cpld_num = curr_slot->cpld_number;
+        for (cpld_index = cpld_num; cpld_index > 0; cpld_index--) {
+            slotindex_single_cpld_remove_kobj_and_attrs(curr_slot, cpld_index);
+        }
+        kfree(curr_slot->cpld);
+        curr_slot->cpld = NULL;
+    }
+    return;
+}
+
+static int slotindex_cpld_create_kobj_and_attrs(struct slot_obj_s *curr_slot)
+{
+    unsigned int cpld_index, i, cpld_num;
+
+    cpld_num = curr_slot->cpld_number;
+    curr_slot->cpld = kzalloc(sizeof(struct slot_cpld_obj_s) * cpld_num, GFP_KERNEL);
+    if (!curr_slot->cpld) {
+        SLOT_ERR("kzalloc slot cpld error, slot index: %u, cpld number: %u.\n",
+            curr_slot->obj->index, cpld_num);
+        return -ENOMEM;
+    }
+
+    for (cpld_index = 1; cpld_index <= cpld_num; cpld_index++) {
+        if (slotindex_single_cpld_create_kobj_and_attrs(curr_slot, cpld_index) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = cpld_index; i > 0; i--) {
+        slotindex_single_cpld_remove_kobj_and_attrs(curr_slot, i);
+    }
+    kfree(curr_slot->cpld);
+    curr_slot->cpld = NULL;
+    return -EBADRQC;
+}
+
+/* create slot cpld[1-n] directory and attributes*/
+static int slot_cpld_create(void)
+{
+    int cpld_num;
+    unsigned int slot_index, i;
+    struct slot_obj_s *curr_slot;
+
+    check_p(g_slot_drv->get_slot_cpld_number);
+    for (slot_index = 1; slot_index <= g_slot.slot_number; slot_index++) {
+        cpld_num = g_slot_drv->get_slot_cpld_number(slot_index);
+        if (cpld_num <= 0) {
+            SLOT_DBG("slot%u cpld number: %d, don't need to create cpld* dirs and attrs.\n",
+                slot_index, cpld_num);
+            continue;
+        }
+        curr_slot = &g_slot.slot[slot_index - 1];
+        curr_slot->cpld_number = cpld_num;
+        if (slotindex_cpld_create_kobj_and_attrs(curr_slot) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = slot_index; i > 0; i--) {
+        curr_slot = &g_slot.slot[i - 1];
+        slotindex_cpld_remove_kobj_and_attrs(curr_slot);
+    }
+    return -EBADRQC;
+}
+
+/* delete slot cpld[1-n] directory and attributes*/
+static void slot_cpld_remove(void)
+{
+    unsigned int slot_index;
+    struct slot_obj_s *curr_slot;
+
+    if (g_slot.slot) {
+        for (slot_index = g_slot.slot_number; slot_index > 0; slot_index--) {
+            curr_slot = &g_slot.slot[slot_index - 1];
+            slotindex_cpld_remove_kobj_and_attrs(curr_slot);
+            curr_slot->cpld_number = 0;
+        }
+    }
+    return;
+}
+/************************************end of slot cpld**************************************/
+/***************************************slot fpga*****************************************/
+static void slotindex_single_fpga_remove_kobj_and_attrs(struct slot_obj_s *curr_slot,
+                unsigned int fpga_index)
+{
+    struct slot_fpga_obj_s *curr_fpga;
+
+    curr_fpga = &curr_slot->fpga[fpga_index - 1];
+    if (curr_fpga->obj) {
+        sysfs_remove_group(&curr_fpga->obj->kobj, &slot_fpga_attr_group);
+        switch_kobject_delete(&curr_fpga->obj);
+        SLOT_DBG("delete slot%u fpga%u dir and attrs success.\n", curr_slot->obj->index,
+            fpga_index);
+    }
+    return;
+}
+
+static int slotindex_single_fpga_create_kobj_and_attrs(struct slot_obj_s *curr_slot,
+               unsigned int fpga_index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct slot_fpga_obj_s *curr_fpga;
+
+    curr_fpga = &curr_slot->fpga[fpga_index - 1];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "fpga%u", fpga_index);
+    curr_fpga->obj = switch_kobject_create(name, &curr_slot->obj->kobj);
+    if (!curr_fpga->obj) {
+        SLOT_ERR("create slot%u %s object error!\n", curr_slot->obj->index, name);
+        return -ENOMEM;
+    }
+    curr_fpga->obj->index = fpga_index;
+    if (sysfs_create_group(&curr_fpga->obj->kobj, &slot_fpga_attr_group) != 0) {
+        SLOT_ERR("create slot%u %s attrs error.\n", curr_slot->obj->index, name);
+        switch_kobject_delete(&curr_fpga->obj);
+        return -EBADRQC;
+    }
+    SLOT_DBG("create slot%u %s success.\n", curr_slot->obj->index, name);
+    return 0;
+}
+
+static void slotindex_fpga_remove_kobj_and_attrs(struct slot_obj_s *curr_slot)
+{
+    unsigned int fpga_index, fpga_num;
+
+    if (curr_slot->fpga) {
+        fpga_num = curr_slot->fpga_number;
+        for (fpga_index = fpga_num; fpga_index > 0; fpga_index--) {
+            slotindex_single_fpga_remove_kobj_and_attrs(curr_slot, fpga_index);
+        }
+        kfree(curr_slot->fpga);
+        curr_slot->fpga = NULL;
+    }
+    return;
+}
+
+static int slotindex_fpga_create_kobj_and_attrs(struct slot_obj_s *curr_slot)
+{
+    unsigned int fpga_index, i, fpga_num;
+
+    fpga_num = curr_slot->fpga_number;
+    curr_slot->fpga = kzalloc(sizeof(struct slot_fpga_obj_s) * fpga_num, GFP_KERNEL);
+    if (!curr_slot->fpga) {
+        SLOT_ERR("kzalloc slot fpga error, slot index: %u, fpga number: %u.\n",
+            curr_slot->obj->index, fpga_num);
+        return -ENOMEM;
+    }
+
+    for (fpga_index = 1; fpga_index <= fpga_num; fpga_index++) {
+        if (slotindex_single_fpga_create_kobj_and_attrs(curr_slot, fpga_index) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = fpga_index; i > 0; i--) {
+        slotindex_single_fpga_remove_kobj_and_attrs(curr_slot, i);
+    }
+    kfree(curr_slot->fpga);
+    curr_slot->fpga = NULL;
+    return -EBADRQC;
+}
+
+/* create slot fpga[1-n] directory and attributes*/
+static int slot_fpga_create(void)
+{
+    int fpga_num;
+    unsigned int slot_index, i;
+    struct slot_obj_s *curr_slot;
+
+    check_p(g_slot_drv->get_slot_fpga_number);
+    for (slot_index = 1; slot_index <= g_slot.slot_number; slot_index++) {
+        fpga_num = g_slot_drv->get_slot_fpga_number(slot_index);
+        if (fpga_num <= 0) {
+            SLOT_DBG("slot%u fpga number: %d, don't need to create fpga* dirs and attrs.\n",
+                slot_index, fpga_num);
+            continue;
+        }
+        curr_slot = &g_slot.slot[slot_index - 1];
+        curr_slot->fpga_number = fpga_num;
+        if (slotindex_fpga_create_kobj_and_attrs(curr_slot) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = slot_index; i > 0; i--) {
+        curr_slot = &g_slot.slot[i - 1];
+        slotindex_fpga_remove_kobj_and_attrs(curr_slot);
+    }
+    return -EBADRQC;
+}
+
+/* delete slot fpga[1-n] directory and attributes*/
+static void slot_fpga_remove(void)
+{
+    unsigned int slot_index;
+    struct slot_obj_s *curr_slot;
+
+    if (g_slot.slot) {
+        for (slot_index = g_slot.slot_number; slot_index > 0; slot_index--) {
+            curr_slot = &g_slot.slot[slot_index - 1];
+            slotindex_fpga_remove_kobj_and_attrs(curr_slot);
+            curr_slot->fpga_number = 0;
+        }
+    }
+    return;
+}
+/************************************end of slot fpga**************************************/
+/*************************************slot current*****************************************/
+static void slotindex_single_curr_remove_kobj_and_attrs(struct slot_obj_s *curr_slot,
+                unsigned int curr_index)
+{
+    struct slot_curr_obj_s *curr;
+
+    curr = &curr_slot->curr[curr_index - 1];
+    if (curr->obj) {
+        sysfs_remove_group(&curr->obj->kobj, &slot_curr_attr_group);
+        switch_kobject_delete(&curr->obj);
+        SLOT_DBG("delete slot%u curr_sensor%u dir and attrs success.\n", curr_slot->obj->index,
+            curr_index);
+    }
+    return;
+}
+
+static int slotindex_single_curr_create_kobj_and_attrs(struct slot_obj_s *curr_slot,
+               unsigned int curr_index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct slot_curr_obj_s *curr;
+
+    curr = &curr_slot->curr[curr_index - 1];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "curr_sensor%u", curr_index);
+    curr->obj = switch_kobject_create(name, &curr_slot->obj->kobj);
+    if (!curr->obj) {
+        SLOT_ERR("create slot%u %s object error!\n", curr_slot->obj->index, name);
+        return -ENOMEM;
+    }
+    curr->obj->index = curr_index;
+    if (sysfs_create_group(&curr->obj->kobj, &slot_curr_attr_group) != 0) {
+        SLOT_ERR("create slot%u %s attrs error.\n", curr_slot->obj->index, name);
+        switch_kobject_delete(&curr->obj);
+        return -EBADRQC;
+    }
+    SLOT_DBG("create slot%u %s success.\n", curr_slot->obj->index, name);
+    return 0;
+}
+
+static void slotindex_curr_remove_kobj_and_attrs(struct slot_obj_s *curr_slot)
+{
+    unsigned int curr_index, curr_num;
+
+    if (curr_slot->curr) {
+        curr_num = curr_slot->curr_number;
+        for (curr_index = curr_num; curr_index > 0; curr_index--) {
+            slotindex_single_curr_remove_kobj_and_attrs(curr_slot, curr_index);
+        }
+        kfree(curr_slot->curr);
+        curr_slot->curr = NULL;
+    }
+    return;
+}
+
+static int slotindex_curr_create_kobj_and_attrs(struct slot_obj_s *curr_slot)
+{
+    unsigned int curr_index, i, curr_num;
+
+    curr_num = curr_slot->curr_number;
+    curr_slot->curr = kzalloc(sizeof(struct slot_curr_obj_s) * curr_num, GFP_KERNEL);
+    if (!curr_slot->curr) {
+        SLOT_ERR("kzalloc slot curr error, slot index: %u, curr number: %u.\n",
+            curr_slot->obj->index, curr_num);
+        return -ENOMEM;
+    }
+
+    for (curr_index = 1; curr_index <= curr_num; curr_index++) {
+        if (slotindex_single_curr_create_kobj_and_attrs(curr_slot, curr_index) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = curr_index; i > 0; i--) {
+        slotindex_single_curr_remove_kobj_and_attrs(curr_slot, i);
+    }
+    kfree(curr_slot->curr);
+    curr_slot->curr = NULL;
+    return -EBADRQC;
+}
+
+/* create slot curr_snesor[1-n] directory and attributes*/
+static int slot_curr_create(void)
+{
+    int curr_num;
+    unsigned int slot_index, i;
+    struct slot_obj_s *curr_slot;
+
+    check_p(g_slot_drv->get_slot_curr_number);
+    for (slot_index = 1; slot_index <= g_slot.slot_number; slot_index++) {
+        curr_num = g_slot_drv->get_slot_curr_number(slot_index);
+        if (curr_num <= 0) {
+            SLOT_DBG("slot%u curr number: %d, don't need to create curr_sensor* dirs and attrs.\n",
+                slot_index, curr_num);
+            continue;
+        }
+        curr_slot = &g_slot.slot[slot_index - 1];
+        curr_slot->curr_number = curr_num;
+        if (slotindex_curr_create_kobj_and_attrs(curr_slot) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = slot_index; i > 0; i--) {
+        curr_slot = &g_slot.slot[i - 1];
+        slotindex_curr_remove_kobj_and_attrs(curr_slot);
+    }
+    return -EBADRQC;
+}
+
+/* delete slot curr_sensor[1-n] directory and attributes*/
+static void slot_curr_remove(void)
+{
+    unsigned int slot_index;
+    struct slot_obj_s *curr_slot;
+
+    if (g_slot.slot) {
+        for (slot_index = g_slot.slot_number; slot_index > 0; slot_index--) {
+            curr_slot = &g_slot.slot[slot_index - 1];
+            slotindex_curr_remove_kobj_and_attrs(curr_slot);
+            curr_slot->curr_number = 0;
+        }
+    }
+    return;
+}
+/**********************************end of slot current************************************/
+/*************************************slot voltage****************************************/
+static void slotindex_single_vol_remove_kobj_and_attrs(struct slot_obj_s *curr_slot,
+                unsigned int vol_index)
+{
+    struct slot_vol_obj_s *curr_vol;
+
+    curr_vol = &curr_slot->vol[vol_index - 1];
+    if (curr_vol->obj) {
+        sysfs_remove_group(&curr_vol->obj->kobj, &slot_vol_attr_group);
+        switch_kobject_delete(&curr_vol->obj);
+        SLOT_DBG("delete slot%u vol_sensor%u dir and attrs success.\n", curr_slot->obj->index,
+            vol_index);
+    }
+    return;
+}
+
+static int slotindex_single_vol_create_kobj_and_attrs(struct slot_obj_s *curr_slot,
+               unsigned int vol_index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct slot_vol_obj_s *curr_vol;
+
+    curr_vol = &curr_slot->vol[vol_index - 1];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "vol_sensor%u", vol_index);
+    curr_vol->obj = switch_kobject_create(name, &curr_slot->obj->kobj);
+    if (!curr_vol->obj) {
+        SLOT_ERR("create slot%u %s object error!\n", curr_slot->obj->index, name);
+        return -ENOMEM;
+    }
+    curr_vol->obj->index = vol_index;
+    if (sysfs_create_group(&curr_vol->obj->kobj, &slot_vol_attr_group) != 0) {
+        SLOT_ERR("create slot%u %s attrs error.\n", curr_slot->obj->index, name);
+        switch_kobject_delete(&curr_vol->obj);
+        return -EBADRQC;
+    }
+    SLOT_DBG("create slot%u %s success.\n", curr_slot->obj->index, name);
+    return 0;
+}
+
+static void slotindex_vol_remove_kobj_and_attrs(struct slot_obj_s *curr_slot)
+{
+    unsigned int vol_index, vol_num;
+
+    if (curr_slot->vol) {
+        vol_num = curr_slot->vol_number;
+        for (vol_index = vol_num; vol_index > 0; vol_index--) {
+            slotindex_single_vol_remove_kobj_and_attrs(curr_slot, vol_index);
+        }
+        kfree(curr_slot->vol);
+        curr_slot->vol = NULL;
+    }
+    return;
+}
+
+static int slotindex_vol_create_kobj_and_attrs(struct slot_obj_s *curr_slot)
+{
+    unsigned int vol_index, i, vol_num;
+
+    vol_num = curr_slot->vol_number;
+    curr_slot->vol = kzalloc(sizeof(struct slot_vol_obj_s) * vol_num, GFP_KERNEL);
+    if (!curr_slot->vol) {
+        SLOT_ERR("kzalloc slot vol error, slot index: %u, vol number: %u.\n",
+            curr_slot->obj->index, vol_num);
+        return -ENOMEM;
+    }
+
+    for (vol_index = 1; vol_index <= vol_num; vol_index++) {
+        if (slotindex_single_vol_create_kobj_and_attrs(curr_slot, vol_index) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = vol_index; i > 0; i--) {
+        slotindex_single_vol_remove_kobj_and_attrs(curr_slot, i);
+    }
+    kfree(curr_slot->vol);
+    curr_slot->vol = NULL;
+    return -EBADRQC;
+}
+
+/* create slot vol_snesor[1-n] directory and attributes*/
+static int slot_vol_create(void)
+{
+    int vol_num;
+    unsigned int slot_index, i;
+    struct slot_obj_s *curr_slot;
+
+    check_p(g_slot_drv->get_slot_vol_number);
+    for (slot_index = 1; slot_index <= g_slot.slot_number; slot_index++) {
+        vol_num = g_slot_drv->get_slot_vol_number(slot_index);
+        if (vol_num <= 0) {
+            SLOT_DBG("slot%u vol number: %d, don't need to create vol_sensor* dirs and attrs.\n",
+                slot_index, vol_num);
+            continue;
+        }
+        curr_slot = &g_slot.slot[slot_index - 1];
+        curr_slot->vol_number = vol_num;
+        if (slotindex_vol_create_kobj_and_attrs(curr_slot) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = slot_index; i > 0; i--) {
+        curr_slot = &g_slot.slot[i - 1];
+        slotindex_vol_remove_kobj_and_attrs(curr_slot);
+    }
+    return -EBADRQC;
+}
+
+/* delete slot vol_sensor[1-n] directory and attributes*/
+static void slot_vol_remove(void)
+{
+    unsigned int slot_index;
+    struct slot_obj_s *curr_slot;
+
+    if (g_slot.slot) {
+        for (slot_index = g_slot.slot_number; slot_index > 0; slot_index--) {
+            curr_slot = &g_slot.slot[slot_index - 1];
+            slotindex_vol_remove_kobj_and_attrs(curr_slot);
+            curr_slot->vol_number = 0;
+        }
+    }
+    return;
+}
+/**********************************end of slot voltage************************************/
+/***************************************slot temp*****************************************/
+static void slotindex_single_temp_remove_kobj_and_attrs(struct slot_obj_s *curr_slot,
+                unsigned int temp_index)
+{
+    struct slot_temp_obj_s *curr_temp;
+
+    curr_temp = &curr_slot->temp[temp_index - 1];
+    if (curr_temp->obj) {
+        sysfs_remove_group(&curr_temp->obj->kobj, &slot_temp_attr_group);
+        switch_kobject_delete(&curr_temp->obj);
+        SLOT_DBG("delete slot%u temp_sensor%u dir and attrs success.\n", curr_slot->obj->index,
+            temp_index);
+    }
+    return;
+}
+
+static int slotindex_single_temp_create_kobj_and_attrs(struct slot_obj_s *curr_slot,
+               unsigned int temp_index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct slot_temp_obj_s *curr_temp;
+
+    curr_temp = &curr_slot->temp[temp_index - 1];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "temp_sensor%u", temp_index);
+    curr_temp->obj = switch_kobject_create(name, &curr_slot->obj->kobj);
+    if (!curr_temp->obj) {
+        SLOT_ERR("create slot%u %s object error!\n", curr_slot->obj->index, name);
+        return -ENOMEM;
+    }
+    curr_temp->obj->index = temp_index;
+    if (sysfs_create_group(&curr_temp->obj->kobj, &slot_temp_attr_group) != 0) {
+        SLOT_ERR("create slot%u %s attrs error.\n", curr_slot->obj->index, name);
+        switch_kobject_delete(&curr_temp->obj);
+        return -EBADRQC;
+    }
+    SLOT_DBG("create slot%u %s success.\n", curr_slot->obj->index, name);
+    return 0;
+}
+
+static void slotindex_temp_remove_kobj_and_attrs(struct slot_obj_s *curr_slot)
+{
+    unsigned int temp_index, temp_num;
+
+    if (curr_slot->temp) {
+        temp_num = curr_slot->temp_number;
+        for (temp_index = temp_num; temp_index > 0; temp_index--) {
+            slotindex_single_temp_remove_kobj_and_attrs(curr_slot, temp_index);
+        }
+        kfree(curr_slot->temp);
+        curr_slot->temp = NULL;
+    }
+    return;
+}
+
+static int slotindex_temp_create_kobj_and_attrs(struct slot_obj_s *curr_slot)
+{
+    unsigned int temp_index, i, temp_num;
+
+    temp_num = curr_slot->temp_number;
+    curr_slot->temp = kzalloc(sizeof(struct slot_temp_obj_s) * temp_num, GFP_KERNEL);
+    if (!curr_slot->temp) {
+        SLOT_ERR("kzalloc slot temp error, slot index: %u, temp number: %u.\n",
+            curr_slot->obj->index, temp_num);
+        return -ENOMEM;
+    }
+
+    for (temp_index = 1; temp_index <= temp_num; temp_index++) {
+        if (slotindex_single_temp_create_kobj_and_attrs(curr_slot, temp_index) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = temp_index; i > 0; i--) {
+        slotindex_single_temp_remove_kobj_and_attrs(curr_slot, i);
+    }
+    kfree(curr_slot->temp);
+    curr_slot->temp = NULL;
+    return -EBADRQC;
+}
+
+/* create slot temp_sensor[1-n] directory and attributes*/
+static int slot_temp_create(void)
+{
+    int temp_num;
+    unsigned int slot_index, i;
+    struct slot_obj_s *curr_slot;
+
+    check_p(g_slot_drv->get_slot_temp_number);
+    for (slot_index = 1; slot_index <= g_slot.slot_number; slot_index++) {
+        temp_num = g_slot_drv->get_slot_temp_number(slot_index);
+        if (temp_num <= 0) {
+            SLOT_DBG("slot%u temp number: %d, don't need to create temp_sensor* dirs and attrs.\n",
+                slot_index, temp_num);
+            continue;
+        }
+        curr_slot = &g_slot.slot[slot_index - 1];
+        curr_slot->temp_number = temp_num;
+        if (slotindex_temp_create_kobj_and_attrs(curr_slot) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = slot_index; i > 0; i--) {
+        curr_slot = &g_slot.slot[i - 1];
+        slotindex_temp_remove_kobj_and_attrs(curr_slot);
+    }
+    return -EBADRQC;
+}
+
+/* delete slot temp_sensor[1-n] directory and attributes*/
+static void slot_temp_remove(void)
+{
+    unsigned int slot_index;
+    struct slot_obj_s *curr_slot;
+
+    if (g_slot.slot) {
+        for (slot_index = g_slot.slot_number; slot_index > 0; slot_index--) {
+            curr_slot = &g_slot.slot[slot_index - 1];
+            slotindex_temp_remove_kobj_and_attrs(curr_slot);
+            curr_slot->temp_number = 0;
+        }
+    }
+    return;
+}
+/************************************end of slot temp**************************************/
+
+static int slot_child_obj_create(void)
+{
+    int ret;
+
+    if (g_slot.slot_number <= 0) {
+        SLOT_DBG("slot number: %u, skip to create slot child dirs and attrs.\n",
+            g_slot.slot_number);
+        return 0;
+    }
+    /* temp create */
+    ret = slot_temp_create();
+    if (ret < 0) {
+        goto temp_err;
+    }
+    /* Voltage create */
+    ret = slot_vol_create();
+    if(ret < 0) {
+        goto vol_err;
+    }
+    /* current create */
+    ret = slot_curr_create();
+    if(ret < 0) {
+        goto curr_err;
+    }
+    /* fpga create */
+    ret = slot_fpga_create();
+    if(ret < 0) {
+        goto fpga_err;
+    }
+    /* cplf create */
+    ret = slot_cpld_create();
+    if(ret < 0) {
+        goto cpld_err;
+    }
+    return 0;
+cpld_err:
+    slot_fpga_remove();
+fpga_err:
+    slot_curr_remove();
+curr_err:
+    slot_vol_remove();
+vol_err:
+    slot_temp_remove();
+temp_err:
+    return ret;
+}
+
+static void slot_child_obj_remove(void)
+{
+    slot_cpld_remove();
+    slot_fpga_remove();
+    slot_curr_remove();
+    slot_vol_remove();
+    slot_temp_remove();
+    return;
+}
+
+static void slot_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct slot_obj_s *curr_slot;
+
+    curr_slot = &g_slot.slot[index - 1];
+    if (curr_slot->obj) {
+        sysfs_remove_group(&curr_slot->obj->kobj, &slot_attr_group);
+        switch_kobject_delete(&curr_slot->obj);
+        SLOT_DBG("delete slot%u dir and attrs success.\n", index);
+    }
+
+    return;
+}
+
+static int slot_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct slot_obj_s * curr_slot;
+
+    curr_slot = &g_slot.slot[index - 1];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "slot%u", index);
+    curr_slot->obj = switch_kobject_create(name, parent);
+    if (!curr_slot->obj) {
+        SLOT_ERR("create %s object error!\n", name);
+        return -EBADRQC;
+    }
+    curr_slot->obj->index = index;
+    if (sysfs_create_group(&curr_slot->obj->kobj, &slot_attr_group) != 0) {
+        SLOT_ERR("create %s attrs error.\n", name);
+        switch_kobject_delete(&curr_slot->obj);
+        return -EBADRQC;
+    }
+    SLOT_DBG("create %s dir and attrs success.\n", name);
+    return 0;
+}
+
+static int slot_sub_create_kobj_and_attrs(struct kobject *parent, int slot_num)
+{
+    unsigned int slot_index, i;
+
+    g_slot.slot = kzalloc(sizeof(struct slot_obj_s) * slot_num, GFP_KERNEL);
+    if (!g_slot.slot) {
+        SLOT_ERR("kzalloc slot.slot error, slot number = %d.\n", slot_num);
+        return -ENOMEM;
+    }
+
+    for(slot_index = 1; slot_index <= slot_num; slot_index++) {
+        if(slot_sub_single_create_kobj_and_attrs(parent, slot_index) != 0 ) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for(i = slot_index; i > 0; i--) {
+        slot_sub_single_remove_kobj_and_attrs(i);
+    }
+    kfree(g_slot.slot);
+    g_slot.slot = NULL;
+    return -EBADRQC;
+}
+
+/* create slot[1-n] directory and attributes*/
+static int slot_sub_create(void)
+{
+    int ret;
+
+    ret = slot_sub_create_kobj_and_attrs(&g_slot_obj->kobj, g_slot.slot_number);
+    return ret;
+}
+
+/* delete slot[1-n] directory and attributes*/
+static void slot_sub_remove(void)
+{
+    unsigned int slot_index;
+
+    if (g_slot.slot) {
+        for (slot_index = g_slot.slot_number; slot_index > 0; slot_index--) {
+            slot_sub_single_remove_kobj_and_attrs(slot_index);
+        }
+        kfree(g_slot.slot);
+        g_slot.slot = NULL;
+    }
+    g_slot.slot_number = 0;
+    return;
+}
+
+/* create slot directory and number attributes*/
+static int slot_root_create(void)
+{
+    g_slot_obj = switch_kobject_create("slot", NULL);
+    if (!g_slot_obj) {
+        SLOT_ERR("switch_kobject_create slot error!\n");
+        return -ENOMEM;
+    }
+
+    if (sysfs_create_group(&g_slot_obj->kobj, &slot_root_attr_group) != 0) {
+        switch_kobject_delete(&g_slot_obj);
+        SLOT_ERR("create slot dir attrs error!\n");
+        return -EBADRQC;
+    }
+    return 0;
+}
+
+/* delete slot directory and number attributes*/
+static void slot_root_remove(void)
+{
+    if (g_slot_obj) {
+        sysfs_remove_group(&g_slot_obj->kobj, &slot_root_attr_group);
+        switch_kobject_delete(&g_slot_obj);
+    }
+
+    return;
+}
+
+int s3ip_sysfs_slot_drivers_register(struct s3ip_sysfs_slot_drivers_s *drv)
+{
+    int ret, slot_num;
+
+    SLOT_INFO("s3ip_sysfs_slot_drivers_register...\n");
+    if (g_slot_drv) {
+        SLOT_ERR("g_slot_drv is not NULL, can't register\n");
+        return -EPERM;
+    }
+
+    check_p(drv);
+    check_p(drv->get_slot_number);
+    g_slot_drv = drv;
+
+    slot_num = g_slot_drv->get_slot_number();
+    if (slot_num <= 0) {
+        SLOT_ERR("slot number: %d, don't need to create slot dirs and attrs.\n", slot_num);
+        g_slot_drv = NULL;
+        return -EINVAL;
+    }
+
+    mem_clear(&g_slot, sizeof(struct slot_s));
+    g_slot.slot_number = slot_num;
+    ret = slot_root_create();
+    if (ret < 0) {
+        SLOT_ERR("create slot root dir and attrs failed, ret: %d\n", ret);
+        g_slot_drv = NULL;
+        return ret;
+    }
+
+    ret = slot_sub_create();
+    if (ret < 0) {
+        SLOT_ERR("create slot sub dir and attrs failed, ret: %d\n", ret);
+        slot_root_remove();
+        g_slot_drv = NULL;
+        return ret;
+    }
+
+    ret = slot_child_obj_create();
+    if (ret < 0) {
+        SLOT_ERR("create slot child dir and attrs failed, ret: %d\n", ret);
+        slot_sub_remove();
+        slot_root_remove();
+        g_slot_drv = NULL;
+        return ret;
+    }
+    SLOT_INFO("s3ip_sysfs_slot_drivers_register success.\n");
+    return 0;
+}
+
+void s3ip_sysfs_slot_drivers_unregister(void)
+{
+    if (g_slot_drv) {
+        slot_child_obj_remove();
+        slot_sub_remove();
+        slot_root_remove();
+        g_slot_drv = NULL;
+        SLOT_DBG("s3ip_sysfs_slot_drivers_unregister success.\n");
+    }
+    return;
+}
+
+EXPORT_SYMBOL(s3ip_sysfs_slot_drivers_register);
+EXPORT_SYMBOL(s3ip_sysfs_slot_drivers_unregister);
+module_param(g_slot_loglevel, int, 0644);
+MODULE_PARM_DESC(g_slot_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/switch.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/switch.c
new file mode 100644
index 000000000000..c34d48e4caf5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/switch.c
@@ -0,0 +1,309 @@
+/*
+ * An switch driver for switch devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include "switch.h"
+#include "syseeprom_sysfs.h"
+
+int g_switch_loglevel = 0;
+
+#define SWITCH_INFO(fmt, args...) do {                                        \
+    if (g_switch_loglevel & INFO) { \
+        printk(KERN_INFO "[SWITCH][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define SWITCH_ERR(fmt, args...) do {                                        \
+    if (g_switch_loglevel & ERR) { \
+        printk(KERN_ERR "[SWITCH][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define SWITCH_DBG(fmt, args...) do {                                        \
+    if (g_switch_loglevel & DBG) { \
+        printk(KERN_DEBUG "[SWITCH][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct syseeprom_s {
+    struct bin_attribute bin;
+    int creat_eeprom_bin_flag;
+};
+
+static struct s3ip_sysfs_syseeprom_drivers_s *g_syseeprom_drv = NULL;
+static struct kset *switch_kset;
+static struct syseeprom_s g_syseeprom;
+
+static ssize_t switch_attr_show(struct kobject *kobj, struct attribute *attr, char *buf)
+{
+    struct switch_attribute *attribute;
+    struct switch_obj *device;
+
+    attribute = to_switch_attr(attr);
+    device = to_switch_obj(kobj);
+
+    if (!attribute->show) {
+        return -ENOSYS;
+    }
+
+    return attribute->show(device, attribute, buf);
+}
+
+static ssize_t switch_attr_store(struct kobject *kobj, struct attribute *attr, const char *buf,
+                   size_t len)
+{
+    struct switch_attribute *attribute;
+    struct switch_obj *obj;
+
+    attribute = to_switch_attr(attr);
+    obj = to_switch_obj(kobj);
+
+    if (!attribute->store) {
+        return -ENOSYS;
+    }
+
+    return attribute->store(obj, attribute, buf, len);
+}
+
+static const struct sysfs_ops switch_sysfs_ops = {
+    .show = switch_attr_show,
+    .store = switch_attr_store,
+};
+
+static void switch_obj_release(struct kobject *kobj)
+{
+    struct switch_obj *obj;
+
+    obj = to_switch_obj(kobj);
+    kfree(obj);
+    return;
+}
+
+static struct kobj_type switch_ktype = {
+    .sysfs_ops = &switch_sysfs_ops,
+    .release = switch_obj_release,
+};
+
+static ssize_t syseeprom_read(struct file *filp, struct kobject *kobj, struct bin_attribute *attr,
+                   char *buf, loff_t offset, size_t count)
+{
+    ssize_t rd_len;
+
+    check_p(g_syseeprom_drv);
+    check_p(g_syseeprom_drv->read_syseeprom_data);
+
+    mem_clear(buf, count);
+    rd_len = g_syseeprom_drv->read_syseeprom_data(buf, offset, count);
+    if (rd_len < 0) {
+        SWITCH_ERR("read syseeprom data error, offset: 0x%llx, read len: %lu, ret: %ld.\n",
+            offset, count, rd_len);
+        return rd_len;
+    }
+    SWITCH_DBG("read syseeprom data success, offset:0x%llx, read len:%lu, really read len:%ld.\n",
+        offset, count, rd_len);
+    return rd_len;
+}
+
+static ssize_t syseeprom_write(struct file *filp, struct kobject *kobj, struct bin_attribute *attr,
+                   char *buf, loff_t offset, size_t count)
+{
+    ssize_t wr_len;
+
+    check_p(g_syseeprom_drv);
+    check_p(g_syseeprom_drv->write_syseeprom_data);
+
+    wr_len = g_syseeprom_drv->write_syseeprom_data(buf, offset, count);
+    if (wr_len < 0) {
+        SWITCH_ERR("write syseeprom data error, offset: 0x%llx, read len: %lu, ret: %ld.\n",
+            offset, count, wr_len);
+        return wr_len;
+    }
+    SWITCH_DBG("write syseeprom data success, offset:0x%llx, write len:%lu, really write len:%ld.\n",
+        offset, count, wr_len);
+    return wr_len;
+}
+
+static int syseeprom_create_eeprom_attrs(void)
+{
+    int ret, eeprom_size;
+
+    eeprom_size = g_syseeprom_drv->get_syseeprom_size();
+    if (eeprom_size <= 0) {
+        SWITCH_ERR("syseeprom size: %d, invalid.\n", eeprom_size);
+        return -EINVAL;
+    }
+
+    sysfs_bin_attr_init(&g_syseeprom.bin);
+    g_syseeprom.bin.attr.name = "syseeprom";
+    g_syseeprom.bin.attr.mode = 0644;
+    g_syseeprom.bin.read = syseeprom_read;
+    g_syseeprom.bin.write = syseeprom_write;
+    g_syseeprom.bin.size = eeprom_size;
+
+    ret = sysfs_create_bin_file(&switch_kset->kobj, &g_syseeprom.bin);
+    if (ret) {
+        SWITCH_ERR("create syseeprom bin error, ret: %d. \n", ret);
+        return -EBADRQC;
+    }
+    SWITCH_DBG("create syseeprom bin file success, eeprom size:%d.\n", eeprom_size);
+    g_syseeprom.creat_eeprom_bin_flag = 1;
+    return 0;
+}
+
+static void syseeprom_remove_eeprom_attrs(void)
+{
+    if (g_syseeprom.creat_eeprom_bin_flag) {
+        sysfs_remove_bin_file(&switch_kset->kobj, &g_syseeprom.bin);
+        g_syseeprom.creat_eeprom_bin_flag = 0;
+    }
+
+    return;
+}
+
+int dev_debug_file_read(char *file_name, unsigned int dev_index, char *buf, int size)
+{
+    char file_path[DIR_NAME_MAX_LEN];
+    loff_t pos;
+    struct file *filp;
+    int ret;
+
+    mem_clear(file_path, sizeof(file_path));
+    mem_clear(buf, size);
+
+    sprintf(file_path, file_name, dev_index);
+    filp = filp_open(file_path, O_RDONLY, 0);
+    if (IS_ERR(filp)) {
+        SWITCH_ERR("dev_debug_file open failed, path=%s, ret=%d\n", file_path, ret);
+        filp = NULL;
+        ret = -ENOENT;
+        return ret;
+    }
+
+    pos = 0;
+    ret = kernel_read(filp, buf, size - 1, &pos);
+    if (ret < 0) {
+        SWITCH_ERR("dev_debug_file kernel_read failed, path=%s, addr=0, size=%d, ret=%d\n", file_name, size - 1, ret);
+        filp_close(filp, NULL);
+        return ret;
+    }
+
+    filp_close(filp, NULL);
+    filp = NULL;
+    return 0;
+}
+
+int s3ip_sysfs_syseeprom_drivers_register(struct s3ip_sysfs_syseeprom_drivers_s *drv)
+{
+    int ret;
+
+    SWITCH_INFO("s3ip_sysfs_syseeprom_drivers_register...\n");
+    if (g_syseeprom_drv) {
+        SWITCH_ERR("g_syseeprom_drv is not NULL, can't register\n");
+        return -EPERM;
+    }
+
+    check_p(drv);
+    check_p(drv->get_syseeprom_size);
+    g_syseeprom_drv = drv;
+
+    ret = syseeprom_create_eeprom_attrs();
+    if (ret < 0) {
+        SWITCH_ERR("create syseeprom attributes failed, ret: %d\n", ret);
+        g_syseeprom_drv = NULL;
+        return ret;
+    }
+    SWITCH_INFO("s3ip_sysfs_syseeprom_drivers_register success.\n");
+    return 0;
+}
+
+void s3ip_sysfs_syseeprom_drivers_unregister(void)
+{
+    if (g_syseeprom_drv) {
+        syseeprom_remove_eeprom_attrs();
+        g_syseeprom_drv = NULL;
+        SWITCH_DBG("s3ip_sysfs_syseeprom_drivers_unregister success.\n");
+    }
+
+    return;
+}
+
+struct switch_obj *switch_kobject_create(const char *name, struct kobject *parent)
+{
+    struct switch_obj *obj;
+    int ret;
+
+    obj = kzalloc(sizeof(*obj), GFP_KERNEL);
+    if (!obj) {
+        SWITCH_DBG("switch_kobject_create %s kzalloc error", name);
+        return NULL;
+    }
+
+    obj->kobj.kset = switch_kset;
+
+    ret = kobject_init_and_add(&obj->kobj, &switch_ktype, parent, "%s", name);
+    if (ret) {
+        kobject_put(&obj->kobj);
+        SWITCH_DBG("kobject_init_and_add %s error", name);
+        return NULL;
+    }
+
+    return obj;
+}
+
+void switch_kobject_delete(struct switch_obj **obj)
+{
+    if (*obj) {
+        SWITCH_DBG("%s delete %s.\n", (*obj)->kobj.parent->name, (*obj)->kobj.name);
+        kobject_put(&((*obj)->kobj));
+        *obj = NULL;
+    }
+}
+
+static int __init switch_init(void)
+{
+    SWITCH_INFO("switch_init...\n");
+
+    switch_kset = kset_create_and_add("s3ip", NULL, NULL);
+    if (!switch_kset) {
+        SWITCH_ERR("create switch_kset error.\n");
+        return -ENOMEM;
+    }
+
+    SWITCH_INFO("switch_init success.\n");
+    return 0;
+}
+
+static void __exit switch_exit(void)
+{
+    if (switch_kset) {
+        kset_unregister(switch_kset);
+    }
+
+    SWITCH_INFO("switch_exit success.\n");
+}
+
+module_init(switch_init);
+module_exit(switch_exit);
+EXPORT_SYMBOL(s3ip_sysfs_syseeprom_drivers_register);
+EXPORT_SYMBOL(s3ip_sysfs_syseeprom_drivers_unregister);
+module_param(g_switch_loglevel, int, 0644);
+MODULE_PARM_DESC(g_switch_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("sonic S3IP sysfs");
+MODULE_DESCRIPTION("switch driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/sysled_sysfs.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/sysled_sysfs.c
new file mode 100644
index 000000000000..242fb20a8755
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/sysled_sysfs.c
@@ -0,0 +1,289 @@
+/*
+ * An sysled_sysfs driver for sysled sysfs devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+
+#include "switch.h"
+#include "sysled_sysfs.h"
+
+static int g_sysled_loglevel = 0;
+
+#define SYSLED_INFO(fmt, args...) do {                                        \
+    if (g_sysled_loglevel & INFO) { \
+        printk(KERN_INFO "[SYSLED_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define SYSLED_ERR(fmt, args...) do {                                        \
+    if (g_sysled_loglevel & ERR) { \
+        printk(KERN_ERR "[SYSLED_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define SYSLED_DBG(fmt, args...) do {                                        \
+    if (g_sysled_loglevel & DBG) { \
+        printk(KERN_DEBUG "[SYSLED_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static struct switch_obj *g_sysled_obj = NULL;
+static struct s3ip_sysfs_sysled_drivers_s *g_sysled_drv = NULL;
+
+static ssize_t sys_led_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    check_p(g_sysled_drv);
+    check_p(g_sysled_drv->get_sys_led_status);
+
+    return g_sysled_drv->get_sys_led_status(buf, PAGE_SIZE);
+}
+
+static ssize_t sys_led_status_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char *buf, size_t count)
+{
+    int ret, value;
+
+    check_p(g_sysled_drv);
+    check_p(g_sysled_drv->set_sys_led_status);
+
+    ret = kstrtoint(buf, 0, &value);
+    if (ret != 0) {
+        SYSLED_ERR("invaild led status ret: %d, can't set sys led status\n", ret);
+        SYSLED_ERR("invaild led status buf: %s\n", buf);
+        return -EINVAL;
+    }
+    ret = g_sysled_drv->set_sys_led_status(value);
+    if (ret < 0) {
+        SYSLED_ERR("set sys led status %d faield, ret: %d\n", value, ret);
+        return ret;
+    }
+    SYSLED_DBG("set sys led status %d success\n", value);
+    return count;
+}
+
+static ssize_t bmc_led_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    check_p(g_sysled_drv);
+    check_p(g_sysled_drv->get_bmc_led_status);
+
+    return g_sysled_drv->get_bmc_led_status(buf, PAGE_SIZE);
+}
+
+static ssize_t bmc_led_status_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char *buf, size_t count)
+{
+    int ret, value;
+
+    check_p(g_sysled_drv);
+    check_p(g_sysled_drv->set_bmc_led_status);
+
+    ret = kstrtoint(buf, 0, &value);
+    if (ret != 0) {
+        SYSLED_ERR("invaild led status ret: %d, can't set bmc led status\n", ret);
+        SYSLED_ERR("invaild led status buf: %s\n", buf);
+        return -EINVAL;
+    }
+    ret = g_sysled_drv->set_bmc_led_status(value);
+    if (ret < 0) {
+        SYSLED_ERR("set bmc led status %d faield, ret: %d\n", value, ret);
+        return ret;
+    }
+    SYSLED_DBG("set bmc led status %d success\n", value);
+    return count;
+}
+
+static ssize_t sys_fan_led_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    check_p(g_sysled_drv);
+    check_p(g_sysled_drv->get_sys_fan_led_status);
+
+    return g_sysled_drv->get_sys_fan_led_status(buf, PAGE_SIZE);
+}
+
+static ssize_t sys_fan_led_status_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char *buf, size_t count)
+{
+    int ret, value;
+
+    check_p(g_sysled_drv);
+    check_p(g_sysled_drv->set_sys_fan_led_status);
+
+    ret = kstrtoint(buf, 0, &value);
+    if (ret != 0) {
+        SYSLED_ERR("invaild led status ret: %d, can't set sys fan led status\n", ret);
+        SYSLED_ERR("invaild led status buf: %s\n", buf);
+        return -EINVAL;
+    }
+    ret = g_sysled_drv->set_sys_fan_led_status(value);
+    if (ret < 0) {
+        SYSLED_ERR("set sys fan led status %d faield, ret: %d\n", value, ret);
+        return ret;
+    }
+    SYSLED_DBG("set sys fan led status %d success\n", value);
+    return count;
+}
+
+static ssize_t sys_psu_led_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    check_p(g_sysled_drv);
+    check_p(g_sysled_drv->get_sys_psu_led_status);
+
+    return g_sysled_drv->get_sys_psu_led_status(buf, PAGE_SIZE);
+}
+
+static ssize_t sys_psu_led_status_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char *buf, size_t count)
+{
+    int ret, value;
+
+    check_p(g_sysled_drv);
+    check_p(g_sysled_drv->set_sys_psu_led_status);
+
+    ret = kstrtoint(buf, 0, &value);
+    if (ret != 0) {
+        SYSLED_ERR("invaild led status ret: %d, can't set sys psu led status\n", ret);
+        SYSLED_ERR("invaild led status buf: %s\n", buf);
+        return -EINVAL;
+    }
+    ret = g_sysled_drv->set_sys_psu_led_status(value);
+    if (ret < 0) {
+        SYSLED_ERR("set sys psu led status %d faield, ret: %d\n", value, ret);
+        return ret;
+    }
+    SYSLED_DBG("set sys psu led status %d success\n", value);
+    return count;
+}
+
+static ssize_t id_led_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    check_p(g_sysled_drv);
+    check_p(g_sysled_drv->get_id_led_status);
+
+    return g_sysled_drv->get_id_led_status(buf, PAGE_SIZE);
+}
+
+static ssize_t id_led_status_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char *buf, size_t count)
+{
+    int ret, value;
+
+    check_p(g_sysled_drv);
+    check_p(g_sysled_drv->set_id_led_status);
+
+    ret = kstrtoint(buf, 0, &value);
+    if (ret != 0) {
+        SYSLED_ERR("invaild led status ret: %d, can't set id led status\n", ret);
+        SYSLED_ERR("invaild led status buf: %s\n", buf);
+        return -EINVAL;
+    }
+    ret = g_sysled_drv->set_id_led_status(value);
+    if (ret < 0) {
+        SYSLED_ERR("set id led status %d faield, ret: %d\n", value, ret);
+        return ret;
+    }
+    SYSLED_DBG("set id led status %d success\n", value);
+    return count;
+}
+
+/************************************syseeprom dir and attrs*******************************************/
+static struct switch_attribute sys_led_attr = __ATTR(sys_led_status, S_IRUGO | S_IWUSR, sys_led_status_show, sys_led_status_store);
+static struct switch_attribute bmc_led_attr = __ATTR(bmc_led_status, S_IRUGO | S_IWUSR, bmc_led_status_show, bmc_led_status_store);
+static struct switch_attribute fan_led_attr = __ATTR(fan_led_status, S_IRUGO | S_IWUSR, sys_fan_led_status_show, sys_fan_led_status_store);
+static struct switch_attribute psu_led_attr = __ATTR(psu_led_status, S_IRUGO | S_IWUSR, sys_psu_led_status_show, sys_psu_led_status_store);
+static struct switch_attribute id_led_attr = __ATTR(id_led_status, S_IRUGO | S_IWUSR, id_led_status_show, id_led_status_store);
+
+static struct attribute *sysled_dir_attrs[] = {
+    &sys_led_attr.attr,
+    &bmc_led_attr.attr,
+    &fan_led_attr.attr,
+    &psu_led_attr.attr,
+    &id_led_attr.attr,
+    NULL,
+};
+
+static struct attribute_group sysled_attr_group = {
+    .attrs = sysled_dir_attrs,
+};
+
+/* create syseled directory and attributes*/
+static int sysled_root_create(void)
+{
+    g_sysled_obj = switch_kobject_create("sysled", NULL);
+    if (!g_sysled_obj) {
+        SYSLED_ERR("switch_kobject_create sysled error!\n");
+        return -ENOMEM;
+    }
+
+    if (sysfs_create_group(&g_sysled_obj->kobj, &sysled_attr_group) != 0) {
+        switch_kobject_delete(&g_sysled_obj);
+        SYSLED_ERR("create sysled dir attrs error!\n");
+        return -EBADRQC;
+    }
+
+    return 0;
+}
+
+/* delete syseled directory and attributes*/
+static void sysled_root_remove(void)
+{
+    if (g_sysled_obj) {
+        sysfs_remove_group(&g_sysled_obj->kobj, &sysled_attr_group);
+        switch_kobject_delete(&g_sysled_obj);
+    }
+
+    return;
+}
+
+int s3ip_sysfs_sysled_drivers_register(struct s3ip_sysfs_sysled_drivers_s *drv)
+{
+    int ret;
+
+    SYSLED_INFO("s3ip_sysfs_sysled_drivers_register...\n");
+    if (g_sysled_drv) {
+        SYSLED_ERR("g_sysled_drv is not NULL, can't register\n");
+        return -EPERM;
+    }
+
+    check_p(drv);
+    g_sysled_drv = drv;
+
+    ret = sysled_root_create();
+    if (ret < 0) {
+        SYSLED_ERR("sysled create error.\n");
+        g_sysled_drv = NULL;
+        return ret;
+    }
+    SYSLED_INFO("s3ip_sysfs_sysled_drivers_register success\n");
+    return 0;
+}
+
+void s3ip_sysfs_sysled_drivers_unregister(void)
+{
+    if (g_sysled_drv) {
+        sysled_root_remove();
+        g_sysled_drv = NULL;
+        SYSLED_DBG("s3ip_sysfs_sysled_drivers_unregister success.\n");
+    }
+    return;
+}
+
+EXPORT_SYMBOL(s3ip_sysfs_sysled_drivers_register);
+EXPORT_SYMBOL(s3ip_sysfs_sysled_drivers_unregister);
+module_param(g_sysled_loglevel, int, 0644);
+MODULE_PARM_DESC(g_sysled_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/system_sysfs.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/system_sysfs.c
new file mode 100644
index 000000000000..dd1c3e859a1a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/system_sysfs.c
@@ -0,0 +1,218 @@
+/*
+ * An system_sysfs driver for system sysfs devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+
+#include "switch.h"
+#include "system_sysfs.h"
+#include "switch_driver.h"
+
+static int g_system_loglevel = 0;
+
+#define SYSTEM_INFO(fmt, args...) do {                                        \
+    if (g_system_loglevel & INFO) { \
+        printk(KERN_INFO "[system][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define SYSTEM_ERR(fmt, args...) do {                                        \
+    if (g_system_loglevel & ERR) { \
+        printk(KERN_ERR "[system][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define SYSTEM_DBG(fmt, args...) do {                                        \
+    if (g_system_loglevel & DBG) { \
+        printk(KERN_DEBUG "[system][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct system_obj_s {
+    struct switch_obj *obj;
+};
+
+struct system_s {
+    unsigned int api_number;
+    struct system_obj_s *temp;
+};
+
+static struct s3ip_sysfs_system_drivers_s *g_system_drv = NULL;
+static struct switch_obj *g_system_obj = NULL;
+
+static ssize_t system_value_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    int value;
+    struct switch_device_attribute  *system_attr;
+
+    check_p(g_system_drv);
+    check_p(g_system_drv->get_system_value);
+
+    system_attr = to_switch_device_attr(attr);
+    check_p(system_attr);
+    SYSTEM_DBG("system_value_show type 0x%x \n", system_attr->type);
+    return g_system_drv->get_system_value(system_attr->type, &value, buf, PAGE_SIZE);
+}
+
+static ssize_t system_value_store(struct switch_obj *obj, struct switch_attribute *attr,
+                                  const char* buf, size_t count)
+{
+    int ret, value;
+    struct switch_device_attribute  *system_attr;
+
+    check_p(g_system_drv);
+    check_p(g_system_drv->set_system_value);
+
+    system_attr = to_switch_device_attr(attr);
+    check_p(system_attr);
+
+    ret = kstrtoint(buf, 0, &value);
+    if (ret) {
+        SYSTEM_ERR("system_value_store, input parameter: %s error. ret:%d\n", buf, ret);
+        return ret;
+    }
+
+    if(value > 0xff) {
+        SYSTEM_ERR("system_value_store, input parameter bigger than 0xff: %d\n", value);
+        return -EINVAL;
+    }
+    SYSTEM_DBG("system_value_store, type: 0x%x. value=%d\n", system_attr->type, value);
+    ret = g_system_drv->set_system_value(system_attr->type, value);
+    if (ret < 0) {
+        /* ret=-999 if not support */
+        SYSTEM_ERR("set system reg value: %d failed. ret:%d\n", value, ret);
+        return ret;
+    }
+    return count;
+}
+
+static ssize_t system_port_port_status_value(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    struct switch_device_attribute  *system_attr;
+
+    check_p(g_system_drv);
+    check_p(g_system_drv->get_system_port_power_status);
+
+    system_attr = to_switch_device_attr(attr);
+    check_p(system_attr);
+    SYSTEM_DBG("type 0x%x \n", system_attr->type);
+    return g_system_drv->get_system_port_power_status(system_attr->type, buf, PAGE_SIZE);
+}
+
+/************************************system dir and attrs*******************************************/
+static SWITCH_DEVICE_ATTR(bmc_ready, S_IRUGO | S_IWUSR, system_value_show, system_value_store, WB_SYSTEM_BMC_READY);
+static SWITCH_DEVICE_ATTR(sol_active, S_IRUGO | S_IWUSR, system_value_show, system_value_store, WB_SYSTEM_SOL_ACTIVE);
+static SWITCH_DEVICE_ATTR(psu_reset, S_IWUSR, NULL, system_value_store, WB_SYSTEM_PSU_RESET);
+static SWITCH_DEVICE_ATTR(cpu_board_ctrl, S_IWUSR, NULL, system_value_store, WB_SYSTEM_CPU_BOARD_CTRL);
+static SWITCH_DEVICE_ATTR(cpu_board_status, S_IRUGO , system_value_show, NULL, WB_SYSTEM_CPU_BOARD_STATUS);
+static SWITCH_DEVICE_ATTR(bios_switch, S_IWUSR, NULL, system_value_store, WB_SYSTEM_BIOS_SWITCH);
+static SWITCH_DEVICE_ATTR(bios_view, S_IRUGO, system_value_show, NULL, WB_SYSTEM_BIOS_VIEW);
+static SWITCH_DEVICE_ATTR(bios_boot_ok, S_IRUGO, system_value_show, NULL, WB_SYSTEM_BIOS_BOOT_OK);
+static SWITCH_DEVICE_ATTR(bios_fail_record, S_IRUGO, system_value_show, NULL, WB_SYSTEM_BIOS_FAIL_RECORD);
+static SWITCH_DEVICE_ATTR(bmc_reset, S_IWUSR, NULL, system_value_store, WB_SYSTEM_BMC_RESET);
+static SWITCH_DEVICE_ATTR(mac_board_reset, S_IRUGO | S_IWUSR, system_value_show, system_value_store, WB_SYSTEM_MAC_BOARD_RESET);
+static SWITCH_DEVICE_ATTR(mac_pwr_ctrl, S_IRUGO | S_IWUSR, system_value_show, system_value_store, WB_SYSTEM_MAC_PWR_CTRL);
+static SWITCH_DEVICE_ATTR(emmc_pwr_ctrl, S_IRUGO | S_IWUSR, system_value_show, system_value_store, WB_SYSTEM_EMMC_PWR_CTRL);
+static SWITCH_DEVICE_ATTR(port_pwr_ctl, S_IRUGO | S_IWUSR, system_port_port_status_value, system_value_store, WB_SYSTEM_PORT_PWR_CTL);
+static SWITCH_DEVICE_ATTR(bmc_view, S_IRUGO, system_value_show, NULL, WB_SYSTEM_BMC_VIEW);
+static SWITCH_DEVICE_ATTR(bmc_switch, S_IWUSR, NULL, system_value_store, WB_SYSTEM_BMC_SWITCH);
+
+static struct attribute *system_dir_attrs[] = {
+    &switch_dev_attr_bmc_ready.switch_attr.attr,
+    &switch_dev_attr_sol_active.switch_attr.attr,
+    &switch_dev_attr_psu_reset.switch_attr.attr,
+    &switch_dev_attr_cpu_board_ctrl.switch_attr.attr,
+    &switch_dev_attr_cpu_board_status.switch_attr.attr,
+    &switch_dev_attr_bios_switch.switch_attr.attr,
+    &switch_dev_attr_bios_view.switch_attr.attr,
+    &switch_dev_attr_bios_boot_ok.switch_attr.attr,
+    &switch_dev_attr_bios_fail_record.switch_attr.attr,
+    &switch_dev_attr_bmc_reset.switch_attr.attr,
+    &switch_dev_attr_mac_board_reset.switch_attr.attr,
+    &switch_dev_attr_mac_pwr_ctrl.switch_attr.attr,
+    &switch_dev_attr_emmc_pwr_ctrl.switch_attr.attr,
+    &switch_dev_attr_port_pwr_ctl.switch_attr.attr,
+    &switch_dev_attr_bmc_view.switch_attr.attr,
+    &switch_dev_attr_bmc_switch.switch_attr.attr,
+    NULL,
+};
+
+static struct attribute_group system_root_attr_group = {
+    .attrs = system_dir_attrs,
+};
+
+/* create system directory and number attributes */
+static int system_root_create(void)
+{
+    g_system_obj = switch_kobject_create("system", NULL);
+    if (!g_system_obj) {
+        SYSTEM_ERR("switch_kobject_create system error!\n");
+        return -ENOMEM;
+    }
+
+    if (sysfs_create_group(&g_system_obj->kobj, &system_root_attr_group) != 0) {
+        switch_kobject_delete(&g_system_obj);
+        SYSTEM_ERR("create system dir attrs error!\n");
+        return -EBADRQC;
+    }
+    return 0;
+}
+
+/* delete system directory and number attributes */
+static void system_root_remove(void)
+{
+    if (g_system_obj) {
+        sysfs_remove_group(&g_system_obj->kobj, &system_root_attr_group);
+        switch_kobject_delete(&g_system_obj);
+    }
+
+    return;
+}
+
+int s3ip_sysfs_system_drivers_register(struct s3ip_sysfs_system_drivers_s *drv)
+{
+    int ret;
+
+    SYSTEM_INFO("s3ip_sysfs_system_drivers_register...\n");
+    check_p(drv);
+    g_system_drv = drv;
+    ret = system_root_create();
+    if (ret < 0) {
+        SYSTEM_ERR("create system root dir and attrs failed, ret: %d\n", ret);
+        return ret;
+    }
+
+    SYSTEM_INFO("s3ip_sysfs_system_drivers_register success\n");
+    return ret;
+}
+
+void s3ip_sysfs_system_drivers_unregister(void)
+{
+    if (g_system_drv) {
+        system_root_remove();
+        g_system_drv = NULL;
+        SYSTEM_DBG("s3ip_sysfs_system_drivers_unregister success.\n");
+    }
+    return;
+}
+
+EXPORT_SYMBOL(s3ip_sysfs_system_drivers_register);
+EXPORT_SYMBOL(s3ip_sysfs_system_drivers_unregister);
+module_param(g_system_loglevel, int, 0644);
+MODULE_PARM_DESC(g_system_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/temp_sensor_sysfs.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/temp_sensor_sysfs.c
new file mode 100644
index 000000000000..bfda43b47973
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/temp_sensor_sysfs.c
@@ -0,0 +1,458 @@
+/*
+ * An temp_sensor_sysfs driver for temperature sysfs devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+
+#include "switch.h"
+#include "temp_sensor_sysfs.h"
+
+static int g_temp_sensor_loglevel = 0;
+
+#define TEMP_SENSOR_INFO(fmt, args...) do {                                        \
+    if (g_temp_sensor_loglevel & INFO) { \
+        printk(KERN_INFO "[TEMP_SENSOR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define TEMP_SENSOR_ERR(fmt, args...) do {                                        \
+    if (g_temp_sensor_loglevel & ERR) { \
+        printk(KERN_ERR "[TEMP_SENSOR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define TEMP_SENSOR_DBG(fmt, args...) do {                                        \
+    if (g_temp_sensor_loglevel & DBG) { \
+        printk(KERN_DEBUG "[TEMP_SENSOR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct temp_sensor_obj_s {
+    struct switch_obj *obj;
+};
+
+struct temp_sensor_s {
+    unsigned int temp_number;
+    struct temp_sensor_obj_s *temp;
+};
+
+static struct s3ip_sysfs_temp_sensor_drivers_s *g_temp_sensor_drv = NULL;
+static struct temp_sensor_s g_temp_sensor;
+static struct switch_obj *g_temp_sensor_obj = NULL;
+
+static ssize_t temp_sensor_number_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%u\n", g_temp_sensor.temp_number);
+}
+
+static ssize_t temp_sensor_value_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int temp_index;
+
+    check_p(g_temp_sensor_drv);
+    check_p(g_temp_sensor_drv->get_main_board_temp_value);
+
+    temp_index = obj->index;
+    TEMP_SENSOR_DBG("temp index: %u\n", temp_index);
+    return g_temp_sensor_drv->get_main_board_temp_value(temp_index, buf, PAGE_SIZE);
+}
+
+static ssize_t temp_sensor_alias_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int temp_index;
+
+    check_p(g_temp_sensor_drv);
+    check_p(g_temp_sensor_drv->get_main_board_temp_alias);
+
+    temp_index = obj->index;
+    TEMP_SENSOR_DBG("temp index: %u\n", temp_index);
+    return g_temp_sensor_drv->get_main_board_temp_alias(temp_index, buf, PAGE_SIZE);
+}
+
+static ssize_t temp_sensor_type_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int temp_index;
+
+    check_p(g_temp_sensor_drv);
+    check_p(g_temp_sensor_drv->get_main_board_temp_type);
+
+    temp_index = obj->index;
+    TEMP_SENSOR_DBG("temp index: %u\n", temp_index);
+    return g_temp_sensor_drv->get_main_board_temp_type(temp_index, buf, PAGE_SIZE);
+}
+
+static ssize_t temp_sensor_max_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int temp_index;
+
+    check_p(g_temp_sensor_drv);
+    check_p(g_temp_sensor_drv->get_main_board_temp_max);
+
+    temp_index = obj->index;
+    TEMP_SENSOR_DBG("temp index: %u\n", temp_index);
+    return g_temp_sensor_drv->get_main_board_temp_max(temp_index, buf, PAGE_SIZE);
+}
+
+static ssize_t temp_sensor_max_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int temp_index;
+    int ret;
+
+    check_p(g_temp_sensor_drv);
+    check_p(g_temp_sensor_drv->set_main_board_temp_max);
+
+    temp_index = obj->index;
+    TEMP_SENSOR_DBG("temp index: %u\n", temp_index);
+    ret = g_temp_sensor_drv->set_main_board_temp_max(temp_index, buf, count);
+    if (ret < 0) {
+        TEMP_SENSOR_ERR("set temp%u max threshold failed, value: %s, count: %lu, ret: %d\n",
+            temp_index, buf, count, ret);
+        return ret;
+    }
+    TEMP_SENSOR_DBG("set temp%u max threshold success, value: %s, count: %lu, ret: %d\n",
+        temp_index, buf, count, ret);
+    return count;
+}
+
+static ssize_t temp_sensor_min_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int temp_index;
+
+    check_p(g_temp_sensor_drv);
+    check_p(g_temp_sensor_drv->get_main_board_temp_min);
+
+    temp_index = obj->index;
+    TEMP_SENSOR_DBG("temp index: %u\n", temp_index);
+    return g_temp_sensor_drv->get_main_board_temp_min(temp_index, buf, PAGE_SIZE);
+}
+
+static ssize_t temp_sensor_min_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int temp_index;
+    int ret;
+
+    check_p(g_temp_sensor_drv);
+    check_p(g_temp_sensor_drv->set_main_board_temp_min);
+
+    temp_index = obj->index;
+    TEMP_SENSOR_DBG("temp index: %u\n", temp_index);
+    ret = g_temp_sensor_drv->set_main_board_temp_min(temp_index, buf, count);
+    if (ret < 0) {
+        TEMP_SENSOR_ERR("set temp%u min threshold failed, value: %s, count: %lu, ret: %d\n",
+            temp_index, buf, count, ret);
+        return ret;
+    }
+    TEMP_SENSOR_DBG("set temp%u min threshold success, value: %s, count: %lu, ret: %d\n",
+        temp_index, buf, count, ret);
+    return count;
+}
+
+static ssize_t temp_sensor_high_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int temp_index;
+
+    check_p(g_temp_sensor_drv);
+    check_p(g_temp_sensor_drv->get_main_board_temp_high);
+
+    temp_index = obj->index;
+    TEMP_SENSOR_DBG("temp index: %u\n", temp_index);
+    return g_temp_sensor_drv->get_main_board_temp_high(temp_index, buf, PAGE_SIZE);
+}
+
+static ssize_t temp_sensor_high_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int temp_index;
+    int ret;
+
+    check_p(g_temp_sensor_drv);
+    check_p(g_temp_sensor_drv->set_main_board_temp_high);
+
+    temp_index = obj->index;
+    TEMP_SENSOR_DBG("temp index: %u\n", temp_index);
+    ret = g_temp_sensor_drv->set_main_board_temp_high(temp_index, buf, count);
+    if (ret < 0) {
+        TEMP_SENSOR_ERR("set temp%u high threshold failed, value: %s, count: %lu, ret: %d\n",
+            temp_index, buf, count, ret);
+        return ret;
+    }
+    TEMP_SENSOR_DBG("set temp%u high threshold success, value: %s, count: %lu, ret: %d\n",
+        temp_index, buf, count, ret);
+    return count;
+}
+
+static ssize_t temp_sensor_low_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int temp_index;
+
+    check_p(g_temp_sensor_drv);
+    check_p(g_temp_sensor_drv->get_main_board_temp_low);
+
+    temp_index = obj->index;
+    TEMP_SENSOR_DBG("temp index: %u\n", temp_index);
+    return g_temp_sensor_drv->get_main_board_temp_low(temp_index, buf, PAGE_SIZE);
+}
+
+static ssize_t temp_sensor_low_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int temp_index;
+    int ret;
+
+    check_p(g_temp_sensor_drv);
+    check_p(g_temp_sensor_drv->set_main_board_temp_low);
+
+    temp_index = obj->index;
+    TEMP_SENSOR_DBG("temp index: %u\n", temp_index);
+    ret = g_temp_sensor_drv->set_main_board_temp_low(temp_index, buf, count);
+    if (ret < 0) {
+        TEMP_SENSOR_ERR("set temp%u low threshold failed, value: %s, count: %lu, ret: %d\n",
+            temp_index, buf, count, ret);
+        return ret;
+    }
+    TEMP_SENSOR_DBG("set temp%u low threshold success, value: %s, count: %lu, ret: %d\n",
+        temp_index, buf, count, ret);
+    return count;
+}
+
+static ssize_t temp_sensor_monitor_flag_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int temp_index;
+
+    check_p(g_temp_sensor_drv);
+    check_p(g_temp_sensor_drv->get_main_board_temp_monitor_flag);
+
+    temp_index = obj->index;
+    TEMP_SENSOR_DBG("temp index: %u\n", temp_index);
+    return g_temp_sensor_drv->get_main_board_temp_monitor_flag(temp_index, buf, PAGE_SIZE);
+}
+
+/************************************temp_sensor dir and attrs*******************************************/
+static struct switch_attribute num_temp_att = __ATTR(number, S_IRUGO, temp_sensor_number_show, NULL);
+
+static struct attribute *temp_sensor_dir_attrs[] = {
+    &num_temp_att.attr,
+    NULL,
+};
+
+static struct attribute_group temp_sensor_root_attr_group = {
+    .attrs = temp_sensor_dir_attrs,
+};
+
+/*******************************temp1 temp2 dir and attrs*******************************************/
+static struct switch_attribute temp_value_attr = __ATTR(value, S_IRUGO, temp_sensor_value_show, NULL);
+static struct switch_attribute temp_alias_attr = __ATTR(alias, S_IRUGO, temp_sensor_alias_show, NULL);
+static struct switch_attribute temp_type_attr = __ATTR(type, S_IRUGO, temp_sensor_type_show, NULL);
+static struct switch_attribute temp_max_attr = __ATTR(max, S_IRUGO | S_IWUSR, temp_sensor_max_show, temp_sensor_max_store);
+static struct switch_attribute temp_min_attr = __ATTR(min,  S_IRUGO | S_IWUSR, temp_sensor_min_show, temp_sensor_min_store);
+static struct switch_attribute temp_high_attr = __ATTR(high, S_IRUGO | S_IWUSR, temp_sensor_high_show, temp_sensor_high_store);
+static struct switch_attribute temp_low_attr = __ATTR(low,  S_IRUGO | S_IWUSR, temp_sensor_low_show, temp_sensor_low_store);
+static struct switch_attribute temp_monitor_flag_attr = __ATTR(monitor_flag,  S_IRUGO, temp_sensor_monitor_flag_show, NULL);
+
+static struct attribute *temp_sensor_attrs[] = {
+    &temp_value_attr.attr,
+    &temp_alias_attr.attr,
+    &temp_type_attr.attr,
+    &temp_max_attr.attr,
+    &temp_min_attr.attr,
+    &temp_high_attr.attr,
+    &temp_low_attr.attr,
+    &temp_monitor_flag_attr.attr,
+    NULL,
+};
+
+static struct attribute_group temp_sensor_attr_group = {
+    .attrs = temp_sensor_attrs,
+};
+
+static int temp_sensor_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct temp_sensor_obj_s *temp_sensor;
+
+    temp_sensor = &g_temp_sensor.temp[index - 1];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "temp%u", index);
+    temp_sensor->obj = switch_kobject_create(name, parent);
+    if (!temp_sensor->obj) {
+        TEMP_SENSOR_ERR("create %s object error.\n", name);
+        return -ENOMEM;
+    }
+    temp_sensor->obj->index = index;
+    if (sysfs_create_group(&temp_sensor->obj->kobj, &temp_sensor_attr_group) != 0) {
+        TEMP_SENSOR_ERR("create %s attrs error.\n", name);
+        switch_kobject_delete(&temp_sensor->obj);
+        return -EBADRQC;
+    }
+    TEMP_SENSOR_DBG("create %s dir and attrs success.\n", name);
+    return 0;
+}
+
+static void temp_sensor_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct temp_sensor_obj_s *temp_sensor;
+
+    temp_sensor = &g_temp_sensor.temp[index - 1];
+    if (temp_sensor->obj) {
+        sysfs_remove_group(&temp_sensor->obj->kobj, &temp_sensor_attr_group);
+        switch_kobject_delete(&temp_sensor->obj);
+        TEMP_SENSOR_DBG("delete temp%u dir and attrs success.\n", index);
+    }
+
+    return;
+}
+
+static int temp_sensor_sub_create_kobj_and_attrs(struct kobject *parent, int temp_num)
+{
+    unsigned int temp_index, i;
+
+    g_temp_sensor.temp = kzalloc(sizeof(struct temp_sensor_obj_s) * temp_num, GFP_KERNEL);
+    if (!g_temp_sensor.temp) {
+        TEMP_SENSOR_ERR("kzalloc g_temp_sensor.temp error, temp number: %d.\n", temp_num);
+        return -ENOMEM;
+    }
+
+    for (temp_index = 1; temp_index <= temp_num; temp_index++) {
+        if (temp_sensor_sub_single_create_kobj_and_attrs(parent, temp_index) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = temp_index; i > 0; i--) {
+        temp_sensor_sub_single_remove_kobj_and_attrs(i);
+    }
+    kfree(g_temp_sensor.temp);
+    g_temp_sensor.temp = NULL;
+    return -EBADRQC;
+}
+
+/* create temp[1-n] directory and attributes*/
+static int temp_sensor_sub_create(void)
+{
+    int ret;
+
+    ret = temp_sensor_sub_create_kobj_and_attrs(&g_temp_sensor_obj->kobj,
+              g_temp_sensor.temp_number);
+    return ret;
+}
+
+/* delete temp[1-n] directory and attributes*/
+static void temp_sensor_sub_remove(void)
+{
+    unsigned int temp_index;
+
+    if (g_temp_sensor.temp) {
+        for (temp_index = g_temp_sensor.temp_number; temp_index > 0; temp_index--) {
+            temp_sensor_sub_single_remove_kobj_and_attrs(temp_index);
+        }
+        kfree(g_temp_sensor.temp);
+        g_temp_sensor.temp = NULL;
+    }
+
+    return;
+}
+
+/* create temp_sensor directory and number attributes */
+static int temp_sensor_root_create(void)
+{
+    g_temp_sensor_obj = switch_kobject_create("temp_sensor", NULL);
+    if (!g_temp_sensor_obj) {
+        TEMP_SENSOR_ERR("switch_kobject_create temp_sensor error!\n");
+        return -ENOMEM;
+    }
+
+    if (sysfs_create_group(&g_temp_sensor_obj->kobj, &temp_sensor_root_attr_group) != 0) {
+        switch_kobject_delete(&g_temp_sensor_obj);
+        TEMP_SENSOR_ERR("create temp_sensor dir attrs error!\n");
+        return -EBADRQC;
+    }
+    return 0;
+}
+
+/* delete temp_sensor directory and number attributes */
+static void temp_sensor_root_remove(void)
+{
+    if (g_temp_sensor_obj) {
+        sysfs_remove_group(&g_temp_sensor_obj->kobj, &temp_sensor_root_attr_group);
+        switch_kobject_delete(&g_temp_sensor_obj);
+    }
+
+    return;
+}
+
+int s3ip_sysfs_temp_sensor_drivers_register(struct s3ip_sysfs_temp_sensor_drivers_s *drv)
+{
+    int ret, temp_num;
+
+    TEMP_SENSOR_INFO("s3ip_sysfs_temp_sensor_drivers_register...\n");
+    if (g_temp_sensor_drv) {
+        TEMP_SENSOR_ERR("g_temp_sensor_drv is not NULL, can't register\n");
+        return -EPERM;
+    }
+
+    check_p(drv);
+    check_p(drv->get_main_board_temp_number);
+    g_temp_sensor_drv = drv;
+
+    temp_num = g_temp_sensor_drv->get_main_board_temp_number();
+    if (temp_num <= 0) {
+        TEMP_SENSOR_ERR("temp sensor number: %d, don't need to create temp_sensor dirs and attrs.\n",
+            temp_num);
+        g_temp_sensor_drv = NULL;
+        return -EINVAL;
+    }
+    mem_clear(&g_temp_sensor, sizeof(struct temp_sensor_s));
+    g_temp_sensor.temp_number = temp_num;
+    ret = temp_sensor_root_create();
+    if (ret < 0) {
+        TEMP_SENSOR_ERR("create temp_sensor root dir and attrs failed, ret: %d\n", ret);
+        g_temp_sensor_drv = NULL;
+        return ret;
+    }
+
+    ret = temp_sensor_sub_create();
+    if (ret < 0) {
+        TEMP_SENSOR_ERR("create temp_sensor sub dir and attrs failed, ret: %d\n", ret);
+        temp_sensor_root_remove();
+        g_temp_sensor_drv = NULL;
+        return ret;
+    }
+    TEMP_SENSOR_INFO("s3ip_sysfs_temp_sensor_drivers_register success\n");
+    return ret;
+}
+
+void s3ip_sysfs_temp_sensor_drivers_unregister(void)
+{
+    if (g_temp_sensor_drv) {
+        temp_sensor_sub_remove();
+        temp_sensor_root_remove();
+        g_temp_sensor_drv = NULL;
+        TEMP_SENSOR_DBG("s3ip_sysfs_temp_sensor_drivers_unregister success.\n");
+    }
+    return;
+}
+
+EXPORT_SYMBOL(s3ip_sysfs_temp_sensor_drivers_register);
+EXPORT_SYMBOL(s3ip_sysfs_temp_sensor_drivers_unregister);
+module_param(g_temp_sensor_loglevel, int, 0644);
+MODULE_PARM_DESC(g_temp_sensor_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/transceiver_sysfs.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/transceiver_sysfs.c
new file mode 100644
index 000000000000..6384b452186c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/transceiver_sysfs.c
@@ -0,0 +1,996 @@
+/*
+ * An transceiver_sysfs driver for transceiver sysfs devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+
+#include "switch.h"
+#include "transceiver_sysfs.h"
+
+static int g_sff_loglevel = 0;
+static bool g_sff_present_debug = 0;
+
+#define WB_QSFP_TX_FAULT_OFFSET       (4)
+#define WB_QSFPDD_TX_FAULT_OFFSET     (17*128 + 135)
+#define WB_QSFP_TX_DISABLE_OFFSET     (86)
+#define WB_QSFPDD_TX_DISABLE_OFFSET   (16*128 + 130)
+#define WB_QSFP_RX_LOS_OFFSET         (3)
+#define WB_QSFPDD_RX_LOS_OFFSET       (17*128 + 147)
+#define WB_QSFP_LP_MODE_OFFSET        (93)
+#define WB_QSFPDD_LP_MODE_OFFSET      (26)
+
+#define SFF_INFO(fmt, args...) do {                                        \
+    if (g_sff_loglevel & INFO) { \
+        printk(KERN_INFO "[SFF_SYSFS][func:%s line:%d]"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define SFF_ERR(fmt, args...) do {                                        \
+    if (g_sff_loglevel & ERR) { \
+        printk(KERN_ERR "[SFF_SYSFS][func:%s line:%d]"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define SFF_DBG(fmt, args...) do {                                        \
+    if (g_sff_loglevel & DBG) { \
+        printk(KERN_DEBUG "[SFF_SYSFS][func:%s line:%d]"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct sff_obj_s {
+    struct switch_obj *sff_obj;
+    struct bin_attribute bin;
+    int sff_creat_bin_flag;
+};
+
+struct sff_s {
+    unsigned int sff_number;
+    struct sff_obj_s *sff;
+};
+
+static struct sff_s g_sff;
+static struct switch_obj *g_sff_obj = NULL;
+static struct s3ip_sysfs_transceiver_drivers_s *g_sff_drv = NULL;
+
+static ssize_t transceiver_power_on_show(struct switch_obj *obj, struct switch_attribute *attr,
+        char *buf)
+{
+    check_p(g_sff_drv);
+    check_p(g_sff_drv->get_transceiver_power_on_status);
+
+    return g_sff_drv->get_transceiver_power_on_status(buf, PAGE_SIZE);
+}
+
+static ssize_t transceiver_power_on_store(struct switch_obj *obj, struct switch_attribute *attr,
+        const char* buf, size_t count)
+{
+    unsigned int eth_index, eth_num;
+    int ret, value;
+
+    check_p(g_sff_drv);
+    check_p(g_sff_drv->set_eth_power_on_status);
+
+    sscanf(buf, "%d", &value);
+    if (value < 0 || value > 1) {
+        SFF_ERR("invalid value: %d, can't set power on status.\n", value);
+        return -EINVAL;
+    }
+
+    eth_num = g_sff.sff_number;
+    for (eth_index = 1; eth_index <= eth_num; eth_index++) {
+        SFF_DBG("eth index: %u\n", eth_index);
+        ret = g_sff_drv->set_eth_power_on_status(eth_index, value);
+        if (ret < 0) {
+            SFF_ERR("set eth%u power status failed, ret: %d\n", eth_index, ret);
+            break;
+        }
+    }
+    SFF_DBG("transceiver_power_on_store ok. sff num:%d, len:%d\n", eth_num, ret);
+    return count;
+}
+
+static ssize_t transceiver_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", g_sff.sff_number);
+}
+
+static ssize_t eth_optoe_type_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int sff_index;
+    int optoe_type;
+
+    check_p(g_sff_drv);
+    check_p(g_sff_drv->get_eth_optoe_type);
+
+    sff_index = obj->index;
+    SFF_DBG("eth_optoe_type_show, sff index:%u\n", sff_index);
+    return g_sff_drv->get_eth_optoe_type(sff_index, &optoe_type, buf, PAGE_SIZE);
+}
+
+static ssize_t eth_optoe_type_store(struct switch_obj *obj, struct switch_attribute *attr,
+                                        const char* buf, size_t count)
+{
+    unsigned int sff_index;
+    int ret;
+    int optoe_type;
+
+    check_p(g_sff_drv);
+    check_p(g_sff_drv->set_eth_optoe_type);
+
+    ret = kstrtoint(buf, 0, &optoe_type);
+    if (ret != 0) {
+        SFF_ERR("invaild optoe_type ret: %d, buf: %s.\n", ret, buf);
+        return -EINVAL;
+    }
+
+    sff_index = obj->index;
+    SFF_DBG("eth_optoe_type_store, sff index:%u, optoe_type:%d\n", sff_index, optoe_type);
+    ret = g_sff_drv->set_eth_optoe_type(sff_index, optoe_type);
+    if(ret < 0) {
+        SFF_ERR("set_eth_optoe_type error. sff index:%u, ret:%d\n", sff_index, ret);
+        return ret;
+    }
+
+    SFF_DBG("eth_optoe_type_store ok. sff index:%u, optoe_type:%d\n", sff_index, optoe_type);
+    return count;
+}
+
+
+static ssize_t transceiver_present_show(struct switch_obj *obj, struct switch_attribute *attr,
+                                        char *buf)
+{
+    check_p(g_sff_drv);
+    check_p(g_sff_drv->get_transceiver_present_status);
+
+    return g_sff_drv->get_transceiver_present_status(buf, PAGE_SIZE);
+}
+
+static ssize_t eth_power_on_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int eth_index;
+
+    check_p(g_sff_drv);
+    check_p(g_sff_drv->get_eth_power_on_status);
+
+    eth_index = obj->index;
+    SFF_DBG("eth index: %u\n", eth_index);
+    return g_sff_drv->get_eth_power_on_status(eth_index, buf, PAGE_SIZE);
+}
+
+static ssize_t eth_power_on_store(struct switch_obj *obj, struct switch_attribute *attr,
+                                  const char* buf, size_t count)
+{
+    unsigned int eth_index;
+    int ret, value;
+
+    check_p(g_sff_drv);
+    check_p(g_sff_drv->set_eth_power_on_status);
+
+    sscanf(buf, "%d", &value);
+    eth_index = obj->index;
+    if (value < 0 || value > 1) {
+        SFF_ERR("invalid value: %d, can't set eth%u power on status.\n", value, eth_index);
+        return -EINVAL;
+    }
+
+    ret = g_sff_drv->set_eth_power_on_status(eth_index, value);
+    if (ret < 0) {
+        SFF_ERR("set eth%u power on status %d failed, ret: %d\n", eth_index, value, ret);
+        return ret;
+    }
+    SFF_DBG("set eth%u power on status %d success\n", eth_index, value);
+    return count;
+}
+
+static ssize_t eth_tx_fault_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int eth_index;
+    int ret;
+    char module_type[1], value[1];
+    loff_t offset;
+    char mask;
+
+    check_p(g_sff_drv);
+    check_p(g_sff_drv->read_eth_eeprom_data);
+    check_p(g_sff_drv->get_eth_tx_fault_status);
+
+    eth_index = obj->index;
+    SFF_DBG("eth index: %u\n", eth_index);
+    mem_clear(module_type, sizeof(module_type));
+    mem_clear(value, sizeof(value));
+    ret = g_sff_drv->read_eth_eeprom_data(eth_index, module_type, 0, 1);
+    if (ret < 0) {
+        SFF_ERR("get eth%u module type failed, ret: %d\n", eth_index, ret);
+        if (ret == -WB_SYSFS_RV_UNSUPPORT) {
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+
+    if (module_type[0] == 0x03) {
+        SFF_DBG("get eth%u module type is SFP\n", eth_index);
+        return g_sff_drv->get_eth_tx_fault_status(eth_index, buf, PAGE_SIZE);
+    } else {
+        if ((module_type[0] == 0x11) || (module_type[0] == 0x0D)) {
+            SFF_DBG("get eth%u module type is QSFP\n", eth_index);
+            offset = WB_QSFP_TX_FAULT_OFFSET;
+            mask = 0xf;
+        } else if ((module_type[0] == 0x18) || (module_type[0] == 0x1e)) {
+            SFF_DBG("get eth%u module type is QSFP-DD\n", eth_index);
+            offset = WB_QSFPDD_TX_FAULT_OFFSET;
+            mask = 0xff;
+        } else {
+            SFF_ERR("eth%u module is unknown, module_type:%d\n", eth_index, module_type[0]);
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SWITCH_DEV_ERROR);
+        }
+
+        ret = g_sff_drv->read_eth_eeprom_data(eth_index, value, offset, 1);
+        if (ret < 0) {
+            SFF_ERR("get eth%u module tx fault value failed, ret: %d\n", eth_index, ret);
+            if (ret == -WB_SYSFS_RV_UNSUPPORT) {
+                return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SWITCH_DEV_NO_SUPPORT);
+            } else {
+                return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SWITCH_DEV_ERROR);
+            }
+        }
+
+        if ((value[0] & mask) != 0) {
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", 1);
+        } else {
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", 0);
+        }
+    }
+
+    return ret;
+}
+
+static ssize_t eth_tx_disable_show(struct switch_obj *obj, struct switch_attribute *attr,
+                                   char *buf)
+{
+    unsigned int eth_index;
+    int ret;
+    char module_type[1], value[1];
+    loff_t offset;
+    char mask;
+
+    check_p(g_sff_drv);
+    check_p(g_sff_drv->read_eth_eeprom_data);
+    check_p(g_sff_drv->get_eth_tx_disable_status);
+
+    eth_index = obj->index;
+    SFF_DBG("eth index: %u\n", eth_index);
+    mem_clear(module_type, sizeof(module_type));
+    mem_clear(value, sizeof(value));
+    ret = g_sff_drv->read_eth_eeprom_data(eth_index, module_type, 0, 1);
+    if (ret < 0) {
+        SFF_ERR("get eth%u module type failed, ret: %d\n", eth_index, ret);
+        if (ret == -WB_SYSFS_RV_UNSUPPORT) {
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+
+    if (module_type[0] == 0x03) {
+        SFF_DBG("get eth%u module type is SFP\n", eth_index);
+        return g_sff_drv->get_eth_tx_disable_status(eth_index, buf, PAGE_SIZE);
+    } else {
+        if ((module_type[0] == 0x11) || (module_type[0] == 0x0D)) {
+            SFF_DBG("get eth%u module type is QSFP\n", eth_index);
+            offset = WB_QSFP_TX_DISABLE_OFFSET;
+            mask = 0xf;
+        } else if ((module_type[0] == 0x18) || (module_type[0] == 0x1e)) {
+            SFF_DBG("get eth%u module type is QSFP-DD\n", eth_index);
+            offset = WB_QSFPDD_TX_DISABLE_OFFSET;
+            mask = 0xff;
+        } else {
+            SFF_ERR("eth%u module is unknown, module_type:%d\n", eth_index, module_type[0]);
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SWITCH_DEV_ERROR);
+        }
+
+        ret = g_sff_drv->read_eth_eeprom_data(eth_index, value, offset, 1);
+        if (ret < 0) {
+            SFF_ERR("get eth%u module tx disable value failed, ret: %d\n", eth_index, ret);
+            if (ret == -WB_SYSFS_RV_UNSUPPORT) {
+                return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SWITCH_DEV_NO_SUPPORT);
+            } else {
+                return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SWITCH_DEV_ERROR);
+            }
+        }
+
+        if ((value[0] & mask) != 0) {
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", 1);
+        } else {
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", 0);
+        }
+    }
+
+    return ret;
+}
+
+static ssize_t eth_tx_disable_store(struct switch_obj *obj, struct switch_attribute *attr,
+                                    const char* buf, size_t count)
+{
+    unsigned int eth_index;
+    int ret, value;
+    char module_type[1], write_buf[1];
+    loff_t offset;
+
+    check_p(g_sff_drv);
+    check_p(g_sff_drv->read_eth_eeprom_data);
+    check_p(g_sff_drv->write_eth_eeprom_data);
+    check_p(g_sff_drv->set_eth_tx_disable_status);
+
+    sscanf(buf, "%d", &value);
+    eth_index = obj->index;
+    SFF_DBG("eth index: %u, tx_disable:0x%x\n", eth_index, value);
+
+    if (value < 0 || value > 1) {
+        SFF_ERR("invalid value: %d, can't set eth%u tx disable status.\n", value, eth_index);
+    }
+
+    write_buf[0] = 0;
+    mem_clear(module_type, sizeof(module_type));
+    ret = g_sff_drv->read_eth_eeprom_data(eth_index, module_type, 0, 1);
+    if (ret < 0) {
+        SFF_ERR("get eth%u module type failed, ret: %d\n", eth_index, ret);
+        return ret;
+    }
+
+    if (module_type[0] == 0x03) {
+        SFF_DBG("get eth%u module type is SFP\n", eth_index);
+
+        ret = g_sff_drv->set_eth_tx_disable_status(eth_index, value);
+        if (ret < 0) {
+            SFF_ERR("set eth%u tx disable status %d failed, ret: %d\n", eth_index, value, ret);
+            return ret;
+        }
+    } else {
+        if ((module_type[0] == 0x11) || (module_type[0] == 0x0D)) {
+            SFF_DBG("get eth%u module type is QSFP\n", eth_index);
+            offset = WB_QSFP_TX_DISABLE_OFFSET;
+            if (value != 0) {
+                write_buf[0] = 0xf;
+            }
+        } else if ((module_type[0] == 0x18) || (module_type[0] == 0x1e)) {
+            SFF_DBG("get eth%u module type is QSFP-DD\n", eth_index);
+            offset = WB_QSFPDD_TX_DISABLE_OFFSET;
+            if (value != 0) {
+                write_buf[0] = 0xff;
+            }
+        } else {
+            SFF_ERR("eth%u module is unknown, module_type:%d\n", eth_index, module_type[0]);
+            return -EINVAL;
+        }
+
+        ret = g_sff_drv->write_eth_eeprom_data(eth_index, write_buf, offset, 1);
+        if (ret < 0) {
+            SFF_ERR("set eth%u tx disable status %d failed, ret: %d\n", eth_index, value, ret);
+            return ret;
+        }
+    }
+
+    SFF_DBG("set eth%u tx disable status %d success\n", eth_index, value);
+    return count;
+}
+
+static ssize_t eth_present_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int eth_index;
+    int ret, res;
+    char debug_file_buf[DEBUG_FILE_SIZE];
+
+    check_p(g_sff_drv);
+    check_p(g_sff_drv->get_eth_present_status);
+
+    eth_index = obj->index;
+    SFF_DBG("eth index: %u\n", eth_index);
+    ret = g_sff_drv->get_eth_present_status(eth_index, buf, PAGE_SIZE);
+    if (ret < 0) {
+        SFF_ERR("get eth%u present status failed, ret: %d\n", eth_index, ret);
+        return ret;
+    }
+
+    if (g_sff_present_debug) {
+        SFF_INFO("s3ip sysfs sff present debug is enable\n");
+        if (strcmp(buf, DEV_ABSENT_STR) == 0) {
+            SFF_DBG("eth%d absent, return act value\n", eth_index);
+            return ret;
+        }
+
+        if ((strncmp(buf, SWITCH_DEV_NO_SUPPORT, strlen(SWITCH_DEV_NO_SUPPORT)) == 0) || (strncmp(buf, SWITCH_DEV_ERROR, strlen(SWITCH_DEV_ERROR)) == 0)) {
+            SFF_DBG("eth%d status sysfs unsupport or error\n", eth_index);
+            return ret;
+        }
+
+        mem_clear(debug_file_buf, sizeof(debug_file_buf));
+        res = dev_debug_file_read(SINGLE_TRANSCEIVER_PRESENT_DEBUG_FILE, eth_index, debug_file_buf, sizeof(debug_file_buf));
+        if (res) {
+            SFF_ERR("eth%u present debug file read failed, ret: %d\n", eth_index, res);
+            return ret;
+        }
+
+        if ((strcmp(debug_file_buf, DEV_PRESEN_STR) == 0) || (strcmp(debug_file_buf, DEV_ABSENT_STR) == 0)) {
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%s", debug_file_buf);
+        } else {
+            SFF_ERR("eth%d present debug file value err, value: %s, not 0 or 1\n", eth_index, debug_file_buf);
+            return ret;
+        }
+    }
+    return ret;
+}
+
+static ssize_t eth_rx_los_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int eth_index;
+    int ret;
+    char module_type[1], value[1];
+    loff_t offset;
+    char mask;
+
+    check_p(g_sff_drv);
+    check_p(g_sff_drv->read_eth_eeprom_data);
+    check_p(g_sff_drv->get_eth_rx_los_status);
+
+    eth_index = obj->index;
+    SFF_DBG("eth index: %u\n", eth_index);
+    mem_clear(module_type, sizeof(module_type));
+    mem_clear(value, sizeof(value));
+    ret = g_sff_drv->read_eth_eeprom_data(eth_index, module_type, 0, 1);
+    if (ret < 0) {
+        SFF_ERR("get eth%u module type failed, ret: %d\n", eth_index, ret);
+        if (ret == -WB_SYSFS_RV_UNSUPPORT) {
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+
+    if (module_type[0] == 0x03) {
+        SFF_DBG("get eth%u module type is SFP\n", eth_index);
+        return g_sff_drv->get_eth_rx_los_status(eth_index, buf, PAGE_SIZE);
+    } else {
+        if ((module_type[0] == 0x11) || (module_type[0] == 0x0D)) {
+            SFF_DBG("get eth%u module type is QSFP\n", eth_index);
+            offset = WB_QSFP_RX_LOS_OFFSET;
+            mask = 0xf;
+        } else if ((module_type[0] == 0x18) || (module_type[0] == 0x1e)) {
+            SFF_DBG("get eth%u module type is QSFP-DD\n", eth_index);
+            offset = WB_QSFPDD_RX_LOS_OFFSET;
+            mask = 0xff;
+        } else {
+            SFF_ERR("eth%u module is unknown, module_type:%d\n", eth_index, module_type[0]);
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SWITCH_DEV_ERROR);
+        }
+
+        ret = g_sff_drv->read_eth_eeprom_data(eth_index, value, offset, 1);
+        if (ret < 0) {
+            SFF_ERR("get eth%u module rx los value failed, ret: %d\n", eth_index, ret);
+            if (ret == -WB_SYSFS_RV_UNSUPPORT) {
+                return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SWITCH_DEV_NO_SUPPORT);
+            } else {
+                return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SWITCH_DEV_ERROR);
+            }
+        }
+
+        if ((value[0] & mask) != 0) {
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", 1);
+        } else {
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", 0);
+        }
+    }
+
+    return ret;
+}
+
+static ssize_t eth_reset_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int eth_index;
+
+    check_p(g_sff_drv);
+    check_p(g_sff_drv->get_eth_reset_status);
+
+    eth_index = obj->index;
+    SFF_DBG("eth index: %u\n", eth_index);
+    return g_sff_drv->get_eth_reset_status(eth_index, buf, PAGE_SIZE);
+}
+
+static ssize_t eth_reset_store(struct switch_obj *obj, struct switch_attribute *attr,
+                               const char* buf, size_t count)
+{
+    unsigned int eth_index;
+    int ret, value;
+
+    check_p(g_sff_drv);
+    check_p(g_sff_drv->set_eth_reset_status);
+
+    sscanf(buf, "%d", &value);
+    eth_index = obj->index;
+    ret = g_sff_drv->set_eth_reset_status(eth_index, value);
+    if (ret < 0) {
+        SFF_ERR("set eth%u reset status %d failed, ret: %d\n", eth_index, value, ret);
+        return ret;
+    }
+    SFF_DBG("set eth%u reset status %d success\n", eth_index, value);
+    return count;
+}
+
+static ssize_t eth_low_power_mode_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int eth_index;
+    int ret;
+    char module_type[1], value[1];
+    loff_t offset;
+    char mask;
+
+    check_p(g_sff_drv);
+    check_p(g_sff_drv->read_eth_eeprom_data);
+
+    eth_index = obj->index;
+    SFF_DBG("eth index: %u\n", eth_index);
+    mem_clear(module_type, sizeof(module_type));
+    mem_clear(value, sizeof(value));
+    ret = g_sff_drv->read_eth_eeprom_data(eth_index, module_type, 0, 1);
+    if (ret < 0) {
+        SFF_ERR("get eth%u module type failed, ret: %d\n", eth_index, ret);
+        if (ret == -WB_SYSFS_RV_UNSUPPORT) {
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SWITCH_DEV_NO_SUPPORT);
+        } else {
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SWITCH_DEV_ERROR);
+        }
+    }
+
+    if (module_type[0] == 0x03) {
+        SFF_ERR("eth%u SFP module low power mode no support\n", eth_index);
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SWITCH_DEV_NO_SUPPORT);
+    } else {
+        if ((module_type[0] == 0x11) || (module_type[0] == 0x0D)) {
+            SFF_DBG("get eth%u module type is QSFP\n", eth_index);
+            offset = WB_QSFP_LP_MODE_OFFSET;
+            mask = 0x3;
+        } else if ((module_type[0] == 0x18) || (module_type[0] == 0x1e)) {
+            SFF_DBG("get eth%u module type is QSFP-DD\n", eth_index);
+            offset = WB_QSFPDD_LP_MODE_OFFSET;
+            mask = 0x10;
+        } else {
+            SFF_ERR("eth%u module is unknown, module_type:%d\n", eth_index, module_type[0]);
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SWITCH_DEV_ERROR);
+        }
+
+        ret = g_sff_drv->read_eth_eeprom_data(eth_index, value, offset, 1);
+        if (ret < 0) {
+            SFF_ERR("get eth%u module lp mode value failed, ret: %d\n", eth_index, ret);
+            if (ret == -WB_SYSFS_RV_UNSUPPORT) {
+                return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SWITCH_DEV_NO_SUPPORT);
+            } else {
+                return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", SWITCH_DEV_ERROR);
+            }
+        }
+
+        if ((value[0] & mask) == mask) {
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", 1);
+        } else {
+            return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", 0);
+        }
+    }
+
+    return ret;
+}
+
+static ssize_t eth_low_power_mode_store(struct switch_obj *obj, struct switch_attribute *attr,
+                                        const char* buf, size_t count)
+{
+    unsigned int eth_index;
+    int ret, value;
+    char module_type[1], tmp_v[1];
+    loff_t offset;
+    unsigned char mask;
+
+    check_p(g_sff_drv);
+    check_p(g_sff_drv->read_eth_eeprom_data);
+    check_p(g_sff_drv->write_eth_eeprom_data);
+
+    sscanf(buf, "%d", &value);
+    eth_index = obj->index;
+    SFF_DBG("eth index: %u\n", eth_index);
+    if (value < 0 || value > 1) {
+        SFF_ERR("invalid value: %d, can't set eth%u lp mode status.\n", value, eth_index);
+        return -EINVAL;
+    }
+
+    mask = 0;
+    mem_clear(module_type, sizeof(module_type));
+    mem_clear(tmp_v, sizeof(tmp_v));
+    ret = g_sff_drv->read_eth_eeprom_data(eth_index, module_type, 0, 1);
+    if (ret < 0) {
+        SFF_ERR("get eth%u module type failed, ret: %d\n", eth_index, ret);
+        return ret;
+    }
+    SFF_DBG("module type:0x%x\n", module_type[0]);
+
+    if (module_type[0] == 0x03) {
+        SFF_ERR("eth%u SFP module low power mode no support\n", eth_index);
+        return -WB_SYSFS_RV_UNSUPPORT;
+    } else {
+        if ((module_type[0] == 0x11) || (module_type[0] == 0x0D)) {
+            SFF_DBG("get eth%u module type is QSFP\n", eth_index);
+            offset = WB_QSFP_LP_MODE_OFFSET;
+            mask = 0x3;
+        } else if ((module_type[0] == 0x18) || (module_type[0] == 0x1e)) {
+            SFF_DBG("get eth%u module type is QSFP-DD\n", eth_index);
+            offset = WB_QSFPDD_LP_MODE_OFFSET;
+            mask = 0x10;
+        } else {
+            SFF_ERR("eth%u module is unknown, module_type:%d\n", eth_index, module_type[0]);
+            return -EINVAL;
+        }
+
+        ret = g_sff_drv->read_eth_eeprom_data(eth_index, tmp_v, offset, 1);
+        if (ret < 0) {
+            SFF_ERR("get eth%u module lp mode value failed, ret: %d\n", eth_index, ret);
+            return ret;
+        }
+
+        if (value == 1) {
+            tmp_v[0] = tmp_v[0] | mask;
+        } else {
+            tmp_v[0] = tmp_v[0] & (~mask);
+        }
+
+        ret = g_sff_drv->write_eth_eeprom_data(eth_index, tmp_v, offset, 1);
+        if (ret < 0) {
+            SFF_ERR("set eth%u module lp mode value failed, ret: %d\n", eth_index, ret);
+            return -EIO;
+        }
+    }
+
+    return count;
+}
+
+static ssize_t eth_interrupt_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int eth_index;
+
+    check_p(g_sff_drv);
+    check_p(g_sff_drv->get_eth_interrupt_status);
+
+    eth_index = obj->index;
+    SFF_DBG("eth index: %u\n", eth_index);
+    return g_sff_drv->get_eth_interrupt_status(eth_index, buf, PAGE_SIZE);
+}
+
+static ssize_t eth_eeprom_read(struct file *filp, struct kobject *kobj, struct bin_attribute *attr,
+                               char *buf, loff_t offset, size_t count)
+{
+    struct switch_obj *eth_obj;
+    ssize_t rd_len;
+    unsigned int eth_index;
+
+    check_p(g_sff_drv);
+    check_p(g_sff_drv->read_eth_eeprom_data);
+
+    eth_obj = to_switch_obj(kobj);
+    eth_index = eth_obj->index;
+    mem_clear(buf, count);
+    rd_len = g_sff_drv->read_eth_eeprom_data(eth_index, buf, offset, count);
+    if (rd_len < 0) {
+        SFF_ERR("read eth%u eeprom data error, offset: 0x%llx, read len: %lu, ret: %ld.\n",
+                eth_index, offset, count, rd_len);
+        return rd_len;
+    }
+
+    SFF_DBG("read eth%u eeprom data success, offset:0x%llx, read len:%lu, really read len:%ld.\n",
+            eth_index, offset, count, rd_len);
+
+    return rd_len;
+}
+
+static ssize_t eth_eeprom_write(struct file *filp, struct kobject *kobj, struct bin_attribute *attr,
+                                char *buf, loff_t offset, size_t count)
+{
+    struct switch_obj *eth_obj;
+    ssize_t wr_len;
+    unsigned int eth_index;
+
+    check_p(g_sff_drv);
+    check_p(g_sff_drv->write_eth_eeprom_data);
+
+    eth_obj = to_switch_obj(kobj);
+    eth_index = eth_obj->index;
+    wr_len = g_sff_drv->write_eth_eeprom_data(eth_index, buf, offset, count);
+    if (wr_len < 0) {
+        SFF_ERR("write eth%u eeprom data error, offset: 0x%llx, read len: %lu, ret: %ld.\n",
+                eth_index, offset, count, wr_len);
+        return wr_len;
+    }
+
+    SFF_DBG("write eth%u eeprom data success, offset:0x%llx, write len:%lu, really write len:%ld.\n",
+            eth_index, offset, count, wr_len);
+
+    return wr_len;
+}
+
+/************************************eth* signal attrs*******************************************/
+static struct switch_attribute eth_power_on_attr = __ATTR(power_on, S_IRUGO | S_IWUSR, eth_power_on_show, eth_power_on_store);
+static struct switch_attribute eth_tx_fault_attr = __ATTR(tx_fault, S_IRUGO, eth_tx_fault_show, NULL);
+static struct switch_attribute eth_tx_disable_attr = __ATTR(tx_disable, S_IRUGO | S_IWUSR, eth_tx_disable_show, eth_tx_disable_store);
+static struct switch_attribute eth_present_attr = __ATTR(present, S_IRUGO, eth_present_show, NULL);
+static struct switch_attribute eth_rx_los_attr = __ATTR(rx_los, S_IRUGO, eth_rx_los_show, NULL);
+static struct switch_attribute eth_reset_attr = __ATTR(reset, S_IRUGO | S_IWUSR, eth_reset_show, eth_reset_store);
+static struct switch_attribute eth_low_power_mode_attr = __ATTR(low_power_mode, S_IRUGO | S_IWUSR, eth_low_power_mode_show, eth_low_power_mode_store);
+static struct switch_attribute eth_interrupt_attr = __ATTR(interrupt, S_IRUGO, eth_interrupt_show, NULL);
+static struct switch_attribute eth_optoe_type_attr = __ATTR(optoe_type, S_IRUGO | S_IWUSR, eth_optoe_type_show, eth_optoe_type_store);
+
+static struct attribute *sff_signal_attrs[] = {
+    &eth_power_on_attr.attr,
+    &eth_tx_fault_attr.attr,
+    &eth_tx_disable_attr.attr,
+    &eth_present_attr.attr,
+    &eth_rx_los_attr.attr,
+    &eth_reset_attr.attr,
+    &eth_low_power_mode_attr.attr,
+    &eth_interrupt_attr.attr,
+    &eth_optoe_type_attr.attr,
+    NULL,
+};
+
+static struct attribute_group sff_signal_attr_group = {
+    .attrs = sff_signal_attrs,
+};
+
+/*******************************transceiver dir and attrs*******************************************/
+static struct switch_attribute transceiver_power_on_attr = __ATTR(power_on, S_IRUGO | S_IWUSR, transceiver_power_on_show, transceiver_power_on_store);
+static struct switch_attribute transceiver_number_attr = __ATTR(number, S_IRUGO, transceiver_number_show, NULL);
+static struct switch_attribute transceiver_present_attr = __ATTR(present, S_IRUGO, transceiver_present_show, NULL);
+
+static struct attribute *transceiver_dir_attrs[] = {
+    &transceiver_power_on_attr.attr,
+    &transceiver_number_attr.attr,
+    &transceiver_present_attr.attr,
+    NULL,
+};
+
+static struct attribute_group sff_transceiver_attr_group = {
+    .attrs = transceiver_dir_attrs,
+};
+
+/* create eth* eeprom attributes */
+static int sff_sub_single_create_eeprom_attrs(unsigned int index)
+{
+    int ret, eeprom_size;
+    struct sff_obj_s *curr_sff;
+
+    check_p(g_sff_drv->get_eth_eeprom_size);
+    eeprom_size = g_sff_drv->get_eth_eeprom_size(index);
+    if (eeprom_size <= 0) {
+        SFF_INFO("eth%u, eeprom_size: %d, don't need to creat eeprom attr.\n",
+                 index, eeprom_size);
+        return 0;
+    }
+
+    curr_sff = &g_sff.sff[index - 1];
+    sysfs_bin_attr_init(&curr_sff->bin);
+    curr_sff->bin.attr.name = "eeprom";
+    curr_sff->bin.attr.mode = 0644;
+    curr_sff->bin.read = eth_eeprom_read;
+    curr_sff->bin.write = eth_eeprom_write;
+    curr_sff->bin.size = eeprom_size;
+
+    ret = sysfs_create_bin_file(&curr_sff->sff_obj->kobj, &curr_sff->bin);
+    if (ret) {
+        SFF_ERR("eth%u, create eeprom bin error, ret: %d. \n", index, ret);
+        return -EBADRQC;
+    }
+
+    SFF_DBG("eth%u, create bin file success, eeprom size:%d.\n", index, eeprom_size);
+    curr_sff->sff_creat_bin_flag = 1;
+    return 0;
+}
+
+static int sff_sub_single_create_kobj(struct kobject *parent, unsigned int index)
+{
+    struct sff_obj_s *curr_sff;
+    char sff_dir_name[DIR_NAME_MAX_LEN];
+
+    curr_sff = &g_sff.sff[index - 1];
+    mem_clear(sff_dir_name, sizeof(sff_dir_name));
+    snprintf(sff_dir_name, sizeof(sff_dir_name), "eth%d", index);
+    curr_sff->sff_obj = switch_kobject_create(sff_dir_name, parent);
+    if (!curr_sff->sff_obj) {
+        SFF_ERR("create eth%d object error! \n", index);
+        return -EBADRQC;
+    }
+    curr_sff->sff_obj->index = index;
+    if (sysfs_create_group(&curr_sff->sff_obj->kobj, &sff_signal_attr_group) != 0) {
+        switch_kobject_delete(&curr_sff->sff_obj);
+        return -EBADRQC;
+    }
+
+    SFF_DBG("create eth%d dir and attrs success\n", index);
+    return 0;
+}
+
+/* remove eth directory and attributes */
+static void sff_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct sff_obj_s *curr_sff;
+
+    curr_sff = &g_sff.sff[index - 1];
+    if (curr_sff->sff_obj) {
+        if (curr_sff->sff_creat_bin_flag) {
+            sysfs_remove_bin_file(&curr_sff->sff_obj->kobj, &curr_sff->bin);
+            curr_sff->sff_creat_bin_flag = 0;
+        }
+        sysfs_remove_group(&curr_sff->sff_obj->kobj, &sff_signal_attr_group);
+        switch_kobject_delete(&curr_sff->sff_obj);
+    }
+
+    return;
+}
+
+static int sff_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
+{
+    int ret;
+
+    ret = sff_sub_single_create_kobj(parent, index);
+    if (ret < 0) {
+        SFF_ERR("create eth%d dir error.\n", index);
+        return ret;
+    }
+
+    sff_sub_single_create_eeprom_attrs(index);
+    return 0;
+}
+
+static int sff_sub_create_kobj_and_attrs(struct kobject *parent, int sff_num)
+{
+    unsigned int sff_index, i;
+
+    g_sff.sff = kzalloc(sizeof(struct sff_obj_s) * sff_num, GFP_KERNEL);
+    if (!g_sff.sff) {
+        SFF_ERR("kzalloc g_sff.sff error, sff number = %d.\n", sff_num);
+        return -ENOMEM;
+    }
+
+    for (sff_index = 1; sff_index <= sff_num; sff_index++) {
+        if (sff_sub_single_create_kobj_and_attrs(parent, sff_index) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = sff_index; i > 0; i--) {
+        sff_sub_single_remove_kobj_and_attrs(i);
+    }
+    kfree(g_sff.sff);
+    g_sff.sff = NULL;
+    return -EBADRQC;
+}
+
+/* create eth directory and attributes */
+static int sff_sub_create(void)
+{
+    int ret;
+
+    ret = sff_sub_create_kobj_and_attrs(&g_sff_obj->kobj, g_sff.sff_number);
+    return ret;
+}
+
+/* delete eth directory and attributes */
+static void sff_sub_remove(void)
+{
+    unsigned int sff_index;
+
+    if (g_sff.sff) {
+        for (sff_index = g_sff.sff_number; sff_index > 0; sff_index--) {
+            sff_sub_single_remove_kobj_and_attrs(sff_index);
+        }
+        kfree(g_sff.sff);
+        g_sff.sff = NULL;
+    }
+    g_sff.sff_number = 0;
+    return;
+}
+
+/* create transceiver directory and attributes */
+static int sff_transceiver_create(void)
+{
+    g_sff_obj = switch_kobject_create("transceiver", NULL);
+    if (!g_sff_obj) {
+        SFF_ERR("switch_kobject_create transceiver error!\n");
+        return -ENOMEM;
+    }
+    g_sff_obj->index = 0;
+    if (sysfs_create_group(&g_sff_obj->kobj, &sff_transceiver_attr_group) != 0) {
+        switch_kobject_delete(&g_sff_obj);
+        SFF_ERR("create transceiver dir attrs error!\n");
+        return -EBADRQC;
+    }
+    return 0;
+}
+
+/* delete transceiver directory and attributes */
+static void sff_transceiver_remove(void)
+{
+    if (g_sff_obj) {
+        sysfs_remove_group(&g_sff_obj->kobj, &sff_transceiver_attr_group);
+        switch_kobject_delete(&g_sff_obj);
+    }
+
+    return;
+}
+
+int s3ip_sysfs_sff_drivers_register(struct s3ip_sysfs_transceiver_drivers_s *drv)
+{
+    int ret, sff_num;
+
+    SFF_INFO("s3ip_sysfs_sff_drivers_register...\n");
+    if (g_sff_drv) {
+        SFF_ERR("g_sff_drv is not NULL, can't register\n");
+        return -EPERM;
+    }
+
+    check_p(drv);
+    check_p(drv->get_eth_number);
+    g_sff_drv = drv;
+
+    sff_num = g_sff_drv->get_eth_number();
+    if (sff_num <= 0) {
+        SFF_ERR("eth number: %d, don't need to create transceiver dirs and attrs.\n", sff_num);
+        g_sff_drv = NULL;
+        return -EINVAL;
+    }
+
+    mem_clear(&g_sff, sizeof(struct sff_s));
+    g_sff.sff_number = sff_num;
+    ret = sff_transceiver_create();
+    if (ret < 0) {
+        SFF_ERR("create transceiver root dir and attrs failed, ret: %d\n", ret);
+        g_sff_drv = NULL;
+        return ret;
+    }
+    ret = sff_sub_create();
+    if (ret < 0) {
+        SFF_ERR("create transceiver sub dir and attrs failed, ret: %d\n", ret);
+        sff_transceiver_remove();
+        g_sff_drv = NULL;
+        return ret;
+    }
+    SFF_INFO("s3ip_sysfs_sff_drivers_register success\n");
+    return ret;
+}
+
+void s3ip_sysfs_sff_drivers_unregister(void)
+{
+    if (g_sff_drv) {
+        sff_sub_remove();
+        sff_transceiver_remove();
+        g_sff_drv = NULL;
+        SFF_DBG("s3ip_sysfs_sff_drivers_unregister success.\n");
+    }
+    return;
+}
+
+EXPORT_SYMBOL(s3ip_sysfs_sff_drivers_register);
+EXPORT_SYMBOL(s3ip_sysfs_sff_drivers_unregister);
+module_param(g_sff_loglevel, int, 0644);
+MODULE_PARM_DESC(g_sff_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
+module_param(g_sff_present_debug, bool, 0644);
+MODULE_PARM_DESC(g_sff_present_debug, "the sff present debug switch(0: disable, 1:enable, defalut: 0).\n");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/vol_sensor_sysfs.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/vol_sensor_sysfs.c
new file mode 100644
index 000000000000..737aa3d94393
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/vol_sensor_sysfs.c
@@ -0,0 +1,416 @@
+/*
+ * An vol_sensor_sysfs driver for voltage sysfs devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+
+#include "switch.h"
+#include "vol_sensor_sysfs.h"
+
+static int g_vol_sensor_loglevel = 0;
+
+#define VOL_SENSOR_INFO(fmt, args...) do {                                        \
+    if (g_vol_sensor_loglevel & INFO) { \
+        printk(KERN_INFO "[VOL_SENSOR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define VOL_SENSOR_ERR(fmt, args...) do {                                        \
+    if (g_vol_sensor_loglevel & ERR) { \
+        printk(KERN_ERR "[VOL_SENSOR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define VOL_SENSOR_DBG(fmt, args...) do {                                        \
+    if (g_vol_sensor_loglevel & DBG) { \
+        printk(KERN_DEBUG "[VOL_SENSOR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct vol_sensor_obj_s {
+    struct switch_obj *obj;
+};
+
+struct vol_sensor_s {
+    unsigned int vol_number;
+    struct vol_sensor_obj_s *vol;
+};
+
+static struct s3ip_sysfs_vol_sensor_drivers_s *g_vol_sensor_drv = NULL;
+static struct vol_sensor_s g_vol_sensor;
+static struct switch_obj *g_vol_sensor_obj = NULL;
+
+static ssize_t vol_sensor_number_show(struct switch_obj *obj, struct switch_attribute *attr,
+                   char *buf)
+{
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%u\n", g_vol_sensor.vol_number);
+}
+
+static ssize_t vol_sensor_value_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int vol_index;
+
+    check_p(g_vol_sensor_drv);
+    check_p(g_vol_sensor_drv->get_main_board_vol_value);
+
+    vol_index = obj->index;
+    VOL_SENSOR_DBG("vol index: %u\n", vol_index);
+    return g_vol_sensor_drv->get_main_board_vol_value(vol_index, buf, PAGE_SIZE);
+}
+
+static ssize_t vol_sensor_alias_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int vol_index;
+
+    check_p(g_vol_sensor_drv);
+    check_p(g_vol_sensor_drv->get_main_board_vol_alias);
+
+    vol_index = obj->index;
+    VOL_SENSOR_DBG("vol index: %u\n", vol_index);
+    return g_vol_sensor_drv->get_main_board_vol_alias(vol_index, buf, PAGE_SIZE);
+}
+
+static ssize_t vol_sensor_type_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int vol_index;
+
+    check_p(g_vol_sensor_drv);
+    check_p(g_vol_sensor_drv->get_main_board_vol_type);
+
+    vol_index = obj->index;
+    VOL_SENSOR_DBG("vol index: %u\n", vol_index);
+    return g_vol_sensor_drv->get_main_board_vol_type(vol_index, buf, PAGE_SIZE);
+}
+
+static ssize_t vol_sensor_max_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int vol_index;
+
+    check_p(g_vol_sensor_drv);
+    check_p(g_vol_sensor_drv->get_main_board_vol_max);
+
+    vol_index = obj->index;
+    VOL_SENSOR_DBG("vol index: %u\n", vol_index);
+    return g_vol_sensor_drv->get_main_board_vol_max(vol_index, buf, PAGE_SIZE);
+}
+
+static ssize_t vol_sensor_max_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int vol_index;
+    int ret;
+
+    check_p(g_vol_sensor_drv);
+    check_p(g_vol_sensor_drv->set_main_board_vol_max);
+
+    vol_index = obj->index;
+    VOL_SENSOR_DBG("vol index: %u\n", vol_index);
+    ret = g_vol_sensor_drv->set_main_board_vol_max(vol_index, buf, count);
+    if (ret < 0) {
+        VOL_SENSOR_ERR("set vol%u max threshold failed, value: %s, count: %lu, ret: %d\n",
+            vol_index, buf, count, ret);
+        return ret;
+    }
+    VOL_SENSOR_DBG("set vol%u max threshold success, value: %s, count: %lu, ret: %d\n",
+        vol_index, buf, count, ret);
+    return count;
+}
+
+static ssize_t vol_sensor_min_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int vol_index;
+
+    check_p(g_vol_sensor_drv);
+    check_p(g_vol_sensor_drv->get_main_board_vol_min);
+
+    vol_index = obj->index;
+    VOL_SENSOR_DBG("vol index: %u\n", vol_index);
+    return g_vol_sensor_drv->get_main_board_vol_min(vol_index, buf, PAGE_SIZE);
+}
+
+static ssize_t vol_sensor_min_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    unsigned int vol_index;
+    int ret;
+
+    check_p(g_vol_sensor_drv);
+    check_p(g_vol_sensor_drv->set_main_board_vol_min);
+
+    vol_index = obj->index;
+    VOL_SENSOR_DBG("vol index: %u\n", vol_index);
+    ret = g_vol_sensor_drv->set_main_board_vol_min(vol_index, buf, count);
+    if (ret < 0) {
+        VOL_SENSOR_ERR("set vol%u min threshold failed, value: %s, count: %lu, ret: %d\n",
+            vol_index, buf, count, ret);
+        return ret;
+    }
+    VOL_SENSOR_DBG("set vol%u min threshold success, value: %s, count: %lu, ret: %d\n",
+        vol_index, buf, count, ret);
+    return count;
+}
+
+static ssize_t vol_sensor_range_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int vol_index;
+
+    check_p(g_vol_sensor_drv);
+    check_p(g_vol_sensor_drv->get_main_board_vol_range);
+
+    vol_index = obj->index;
+    VOL_SENSOR_DBG("vol index: %u\n", vol_index);
+    return g_vol_sensor_drv->get_main_board_vol_range(vol_index, buf, PAGE_SIZE);
+}
+
+static ssize_t vol_sensor_nominal_value_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int vol_index;
+
+    check_p(g_vol_sensor_drv);
+    check_p(g_vol_sensor_drv->get_main_board_vol_nominal_value);
+
+    vol_index = obj->index;
+    VOL_SENSOR_DBG("vol index: %u\n", vol_index);
+    return g_vol_sensor_drv->get_main_board_vol_nominal_value(vol_index, buf, PAGE_SIZE);
+}
+
+static ssize_t vol_sensor_monitor_flag_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int vol_index;
+
+    check_p(g_vol_sensor_drv);
+    check_p(g_vol_sensor_drv->get_main_board_vol_monitor_flag);
+
+    vol_index = obj->index;
+    VOL_SENSOR_DBG("vol index: %u\n", vol_index);
+    return g_vol_sensor_drv->get_main_board_vol_monitor_flag(vol_index, buf, PAGE_SIZE);
+}
+
+/************************************vol_sensor dir and attrs*******************************************/
+static struct switch_attribute num_vol_att = __ATTR(number, S_IRUGO, vol_sensor_number_show, NULL);
+
+static struct attribute *vol_sensor_dir_attrs[] = {
+    &num_vol_att.attr,
+    NULL,
+};
+
+static struct attribute_group vol_sensor_root_attr_group = {
+    .attrs = vol_sensor_dir_attrs,
+};
+
+/*******************************vol1 vol2 dir and attrs*******************************************/
+static struct switch_attribute vol_value_attr = __ATTR(value, S_IRUGO, vol_sensor_value_show, NULL);
+static struct switch_attribute vol_alias_attr = __ATTR(alias, S_IRUGO, vol_sensor_alias_show, NULL);
+static struct switch_attribute vol_type_attr = __ATTR(type, S_IRUGO, vol_sensor_type_show, NULL);
+static struct switch_attribute vol_max_attr = __ATTR(max, S_IRUGO | S_IWUSR, vol_sensor_max_show, vol_sensor_max_store);
+static struct switch_attribute vol_min_attr = __ATTR(min,  S_IRUGO | S_IWUSR, vol_sensor_min_show, vol_sensor_min_store);
+static struct switch_attribute vol_range_attr = __ATTR(range, S_IRUGO, vol_sensor_range_show, NULL);
+static struct switch_attribute vol_nominal_value_attr = __ATTR(nominal_value, S_IRUGO, vol_sensor_nominal_value_show, NULL);
+static struct switch_attribute vol_monitor_flag_attr = __ATTR(monitor_flag,  S_IRUGO, vol_sensor_monitor_flag_show, NULL);
+
+static struct attribute *vol_sensor_attrs[] = {
+    &vol_value_attr.attr,
+    &vol_alias_attr.attr,
+    &vol_type_attr.attr,
+    &vol_max_attr.attr,
+    &vol_min_attr.attr,
+    &vol_range_attr.attr,
+    &vol_nominal_value_attr.attr,
+    &vol_monitor_flag_attr.attr,
+    NULL,
+};
+
+static struct attribute_group vol_sensor_attr_group = {
+    .attrs = vol_sensor_attrs,
+};
+
+static int vol_sensor_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct vol_sensor_obj_s *vol_sensor;
+
+    vol_sensor = &g_vol_sensor.vol[index - 1];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "vol%u", index);
+    vol_sensor->obj = switch_kobject_create(name, parent);
+    if (!vol_sensor->obj) {
+        VOL_SENSOR_ERR("create %s object error.\n", name);
+        return -ENOMEM;
+    }
+
+    vol_sensor->obj->index = index;
+    if (sysfs_create_group(&vol_sensor->obj->kobj, &vol_sensor_attr_group) != 0) {
+        VOL_SENSOR_ERR("create %s attrs error.\n", name);
+        switch_kobject_delete(&vol_sensor->obj);
+        return -EBADRQC;
+    }
+    VOL_SENSOR_DBG("create %s dir and attrs success.\n", name);
+
+    return 0;
+}
+
+static void vol_sensor_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct vol_sensor_obj_s *vol_sensor;
+
+    vol_sensor = &g_vol_sensor.vol[index - 1];
+    if (vol_sensor->obj) {
+        sysfs_remove_group(&vol_sensor->obj->kobj, &vol_sensor_attr_group);
+        switch_kobject_delete(&vol_sensor->obj);
+        VOL_SENSOR_DBG("delete vol%u dir and attrs success.\n", index);
+    }
+
+    return;
+}
+
+static int vol_sensor_sub_create_kobj_and_attrs(struct kobject *parent, int vol_num)
+{
+    unsigned int vol_index, i;
+
+    g_vol_sensor.vol = kzalloc(sizeof(struct vol_sensor_obj_s) * vol_num, GFP_KERNEL);
+    if (!g_vol_sensor.vol) {
+        VOL_SENSOR_ERR("kzalloc g_vol_sensor.vol error, vol number: %d.\n", vol_num);
+        return -ENOMEM;
+    }
+
+    for (vol_index = 1; vol_index <= vol_num; vol_index++) {
+        if (vol_sensor_sub_single_create_kobj_and_attrs(parent, vol_index) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = vol_index; i > 0; i--) {
+        vol_sensor_sub_single_remove_kobj_and_attrs(i);
+    }
+    kfree(g_vol_sensor.vol);
+    g_vol_sensor.vol = NULL;
+    return -EBADRQC;
+}
+
+/* create vol[1-n] directory and attributes*/
+static int vol_sensor_sub_create(void)
+{
+    int ret;
+
+    ret = vol_sensor_sub_create_kobj_and_attrs(&g_vol_sensor_obj->kobj, g_vol_sensor.vol_number);
+    return ret;
+}
+
+/* delete vol[1-n] directory and attributes*/
+static void vol_sensor_sub_remove(void)
+{
+    unsigned int vol_index;
+
+    if (g_vol_sensor.vol) {
+        for (vol_index = g_vol_sensor.vol_number; vol_index > 0; vol_index--) {
+            vol_sensor_sub_single_remove_kobj_and_attrs(vol_index);
+        }
+        kfree(g_vol_sensor.vol);
+        g_vol_sensor.vol = NULL;
+    }
+
+    return;
+}
+
+/* create vol_sensor directory and number attributes */
+static int vol_sensor_root_create(void)
+{
+    g_vol_sensor_obj = switch_kobject_create("vol_sensor", NULL);
+    if (!g_vol_sensor_obj) {
+        VOL_SENSOR_ERR("switch_kobject_create vol_sensor error!\n");
+        return -ENOMEM;
+    }
+
+    if (sysfs_create_group(&g_vol_sensor_obj->kobj, &vol_sensor_root_attr_group) != 0) {
+        switch_kobject_delete(&g_vol_sensor_obj);
+        VOL_SENSOR_ERR("create vol_sensor dir attrs error!\n");
+        return -EBADRQC;
+    }
+
+    return 0;
+}
+
+/* delete vol_sensor directory and number attributes */
+static void vol_sensor_root_remove(void)
+{
+    if (g_vol_sensor_obj) {
+        sysfs_remove_group(&g_vol_sensor_obj->kobj, &vol_sensor_root_attr_group);
+        switch_kobject_delete(&g_vol_sensor_obj);
+    }
+
+    return;
+}
+
+int s3ip_sysfs_vol_sensor_drivers_register(struct s3ip_sysfs_vol_sensor_drivers_s *drv)
+{
+    int ret, vol_num;
+
+    VOL_SENSOR_INFO("s3ip_sysfs_vol_sensor_drivers_register...\n");
+    if (g_vol_sensor_drv) {
+        VOL_SENSOR_ERR("g_vol_sensor_drv is not NULL, can't register\n");
+        return -EPERM;
+    }
+
+    check_p(drv);
+    check_p(drv->get_main_board_vol_number);
+    g_vol_sensor_drv = drv;
+
+    vol_num = g_vol_sensor_drv->get_main_board_vol_number();
+    if (vol_num <= 0) {
+        VOL_SENSOR_ERR("vol sensor number: %d, don't need to create vol_sensor dirs and attrs.\n",
+            vol_num);
+        g_vol_sensor_drv = NULL;
+        return -EINVAL;
+    }
+    mem_clear(&g_vol_sensor, sizeof(struct vol_sensor_s));
+    g_vol_sensor.vol_number = vol_num;
+    ret = vol_sensor_root_create();
+    if (ret < 0) {
+        VOL_SENSOR_ERR("create vol_sensor root dir and attrs failed, ret: %d\n", ret);
+        g_vol_sensor_drv = NULL;
+        return ret;
+    }
+
+    ret = vol_sensor_sub_create();
+    if (ret < 0) {
+        VOL_SENSOR_ERR("create vol_sensor sub dir and attrs failed, ret: %d\n", ret);
+        vol_sensor_root_remove();
+        g_vol_sensor_drv = NULL;
+        return ret;
+    }
+    VOL_SENSOR_INFO("s3ip_sysfs_vol_sensor_drivers_register success\n");
+    return ret;
+}
+
+void s3ip_sysfs_vol_sensor_drivers_unregister(void)
+{
+    if (g_vol_sensor_drv) {
+        vol_sensor_sub_remove();
+        vol_sensor_root_remove();
+        g_vol_sensor_drv = NULL;
+        VOL_SENSOR_DBG("s3ip_sysfs_vol_sensor_drivers_unregister success.\n");
+    }
+    return;
+}
+
+EXPORT_SYMBOL(s3ip_sysfs_vol_sensor_drivers_register);
+EXPORT_SYMBOL(s3ip_sysfs_vol_sensor_drivers_unregister);
+module_param(g_vol_sensor_loglevel, int, 0644);
+MODULE_PARM_DESC(g_vol_sensor_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/watchdog_sysfs.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/watchdog_sysfs.c
new file mode 100644
index 000000000000..3188f18958f4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/watchdog_sysfs.c
@@ -0,0 +1,241 @@
+/*
+ * An watchdog_sysfs driver for watchdog sysfs devcie function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/slab.h>
+
+#include "switch.h"
+#include "watchdog_sysfs.h"
+
+static int g_wdt_loglevel = 0;
+
+#define WDT_INFO(fmt, args...) do {                                        \
+    if (g_wdt_loglevel & INFO) { \
+        printk(KERN_INFO "[WDT_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WDT_ERR(fmt, args...) do {                                        \
+    if (g_wdt_loglevel & ERR) { \
+        printk(KERN_ERR "[WDT_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WDT_DBG(fmt, args...) do {                                        \
+    if (g_wdt_loglevel & DBG) { \
+        printk(KERN_DEBUG "[WDT_SYSFS][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+typedef enum wdt_enable_status_e {
+    WDT_DISENABLE        = 0,     /* close watchdog */
+    WDT_ENABLE           = 1,     /* open watchdog */
+} wdt_enable_status_t;
+
+static struct switch_obj *g_watchdog_obj = NULL;
+static struct s3ip_sysfs_watchdog_drivers_s *g_wdt_drv = NULL;
+
+static ssize_t watchdog_identify_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    check_p(g_wdt_drv);
+    check_p(g_wdt_drv->get_watchdog_identify);
+
+    return g_wdt_drv->get_watchdog_identify(buf, PAGE_SIZE);
+}
+
+static ssize_t watchdog_timeleft_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    check_p(g_wdt_drv);
+    check_p(g_wdt_drv->get_watchdog_timeleft);
+
+    return g_wdt_drv->get_watchdog_timeleft(buf, PAGE_SIZE);
+}
+
+static ssize_t watchdog_timeout_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    check_p(g_wdt_drv);
+    check_p(g_wdt_drv->get_watchdog_timeout);
+
+    return g_wdt_drv->get_watchdog_timeout(buf, PAGE_SIZE);
+}
+
+static ssize_t watchdog_timeout_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char *buf, size_t count)
+{
+    int ret, value;
+
+    check_p(g_wdt_drv);
+    check_p(g_wdt_drv->set_watchdog_timeout);
+
+    sscanf(buf, "%d", &value);
+    if (value < 0) {
+        WDT_ERR("invaild timeout value: %d, can't set watchdog timeout\n", value);
+        return -EINVAL;
+    }
+
+    ret = g_wdt_drv->set_watchdog_timeout(value);
+    if (ret < 0) {
+        WDT_ERR("set watchdog timeout value: %d failed, ret: %d\n", value, ret);
+        return ret;
+    }
+    WDT_DBG("set watchdog timeout value: %d success\n", ret);
+    return count;
+}
+
+static ssize_t watchdog_enable_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    check_p(g_wdt_drv);
+    check_p(g_wdt_drv->get_watchdog_enable_status);
+
+    return g_wdt_drv->get_watchdog_enable_status(buf, PAGE_SIZE);
+}
+
+static ssize_t watchdog_enable_status_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char *buf, size_t count)
+{
+    int ret, value;
+
+    check_p(g_wdt_drv);
+    check_p(g_wdt_drv->set_watchdog_enable_status);
+
+    sscanf(buf, "%d", &value);
+    if ((value != WDT_DISENABLE) && (value != WDT_ENABLE)) {
+        WDT_ERR("invaild enable value: %d, can't set watchdog enable status\n", value);
+        return -EINVAL;
+    }
+
+    ret = g_wdt_drv->set_watchdog_enable_status(value);
+    if (ret < 0) {
+        WDT_ERR("set watchdog enable status %d failed, ret: %d\n", value, ret);
+        return ret;
+    }
+    WDT_DBG("set watchdog enable status %d success\n", ret);
+    return count;
+}
+
+static ssize_t watchdog_reset_store(struct switch_obj *obj, struct switch_attribute *attr,
+                   const char* buf, size_t count)
+{
+    int ret, value;
+
+    check_p(g_wdt_drv);
+    check_p(g_wdt_drv->set_watchdog_reset);
+
+    ret = kstrtoint(buf, 0, &value);
+    if (ret) {
+        WDT_ERR("invalid value: %s \n", buf);
+        return -EINVAL;
+    }
+
+    ret = g_wdt_drv->set_watchdog_reset(value);
+    if (ret < 0) {
+        WDT_ERR("set watchdog reset %d failed, ret: %d\n", value, ret);
+        return ret;
+    }
+    WDT_DBG("set watchdog reset %d success\n", ret);
+    return count;
+}
+
+/************************************watchdog*******************************************/
+static struct switch_attribute watchdog_identify_attr = __ATTR(identify, S_IRUGO, watchdog_identify_show, NULL);
+static struct switch_attribute watchdog_timeleft_attr = __ATTR(timeleft, S_IRUGO, watchdog_timeleft_show, NULL);
+static struct switch_attribute watchdog_timeout_attr = __ATTR(timeout, S_IRUGO | S_IWUSR, watchdog_timeout_show, watchdog_timeout_store);
+static struct switch_attribute watchdog_enable_attr = __ATTR(enable, S_IRUGO | S_IWUSR, watchdog_enable_status_show, watchdog_enable_status_store);
+static struct switch_attribute watchdog_reset_attr = __ATTR(reset, S_IWUSR, NULL, watchdog_reset_store);
+
+static struct attribute *watchdog_dir_attrs[] = {
+    &watchdog_identify_attr.attr,
+    &watchdog_timeleft_attr.attr,
+    &watchdog_timeout_attr.attr,
+    &watchdog_enable_attr.attr,
+    &watchdog_reset_attr.attr,
+    NULL,
+};
+
+static struct attribute_group watchdog_attr_group = {
+    .attrs = watchdog_dir_attrs,
+};
+
+/* create watchdog directory and attributes */
+static int watchdog_root_create(void)
+{
+    g_watchdog_obj = switch_kobject_create("watchdog", NULL);
+    if (!g_watchdog_obj) {
+        WDT_ERR("switch_kobject_create watchdog error!\n");
+        return -ENOMEM;
+    }
+
+    if (sysfs_create_group(&g_watchdog_obj->kobj, &watchdog_attr_group) != 0) {
+        switch_kobject_delete(&g_watchdog_obj);
+        WDT_ERR("create fan dir attrs error!\n");
+        return -EBADRQC;
+    }
+
+    return 0;
+}
+
+/* delete watchdog directory and attributes */
+static void watchdog_root_remove(void)
+{
+    if (g_watchdog_obj) {
+        sysfs_remove_group(&g_watchdog_obj->kobj, &watchdog_attr_group);
+        switch_kobject_delete(&g_watchdog_obj);
+    }
+
+    return;
+}
+
+int s3ip_sysfs_watchdog_drivers_register(struct s3ip_sysfs_watchdog_drivers_s *drv)
+{
+    int ret;
+
+    WDT_INFO("s3ip_sysfs_watchdog_drivers_register...\n");
+    if (g_wdt_drv) {
+        WDT_ERR("g_wdt_drv is not NULL, can't register\n");
+        return -EPERM;
+    }
+
+    check_p(drv);
+    g_wdt_drv = drv;
+
+    ret = watchdog_root_create();
+    if (ret < 0) {
+        WDT_ERR("watchdog create error.\n");
+        g_wdt_drv = NULL;
+        return ret;
+    }
+    WDT_INFO("s3ip_sysfs_watchdog_drivers_register success\n");
+    return 0;
+}
+
+void s3ip_sysfs_watchdog_drivers_unregister(void)
+{
+    if (g_wdt_drv) {
+        watchdog_root_remove();
+        g_wdt_drv = NULL;
+        WDT_DBG("s3ip_sysfs_watchdog_drivers_unregister success.\n");
+    }
+
+    return;
+}
+
+EXPORT_SYMBOL(s3ip_sysfs_watchdog_drivers_register);
+EXPORT_SYMBOL(s3ip_sysfs_watchdog_drivers_unregister);
+module_param(g_wdt_loglevel, int, 0644);
+MODULE_PARM_DESC(g_wdt_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_csu550.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_csu550.c
index 0b95663b9bad..55f6a529c7be 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_csu550.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_csu550.c
@@ -1,8 +1,21 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
 /*
- * Hardware monitoring driver for PMBus devices
+ * An wb_csu550 driver for psu csu550 function
  *
- * Copyright (c) 2010, 2011 Ericsson AB.
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <linux/kernel.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_i2c_bus_drv.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_i2c_bus_drv.c
index 22cd9e16de08..b237df4e36a9 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_i2c_bus_drv.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_i2c_bus_drv.c
@@ -1,7 +1,23 @@
 /*
- * fpga_i2c_bus_drv.c
- * ko to create fpga i2c adapter
+ * An wb_fpga_i2c_bus_drv driver for create fpga i2c adapter function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
+
 #include <linux/platform_device.h>
 #include <linux/interrupt.h>
 #include <linux/kernel.h>
@@ -34,6 +50,8 @@ extern int io_device_func_write(const char *path, uint32_t pos, uint8_t *val, si
 extern int io_device_func_read(const char *path, uint32_t pos, uint8_t *val, size_t size);
 extern int spi_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
 extern int spi_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int indirect_device_func_write(const char *path, uint32_t pos, uint8_t *val, size_t size);
+extern int indirect_device_func_read(const char *path, uint32_t pos, uint8_t *val, size_t size);
 
 #define FPGA_I2C_STRETCH_TIMEOUT  (0x01)
 #define FPGA_I2C_DEADLOCK_FAILED  (0x02)
@@ -53,6 +71,7 @@ extern int spi_device_func_write(const char *path, uint32_t offset, uint8_t *buf
 #define SYMBOL_PCIE_DEV_MODE      (3)
 #define SYMBOL_IO_DEV_MODE        (4)
 #define SYMBOL_SPI_DEV_MODE       (5)
+#define SYMBOL_INDIRECT_DEV_MODE  (6)
 
 int g_wb_fpga_i2c_debug = 0;
 int g_wb_fpga_i2c_error = 0;
@@ -170,6 +189,9 @@ static int fpga_device_write(fpga_i2c_dev_t *fpga_i2c, uint32_t pos, uint8_t *va
     case SYMBOL_SPI_DEV_MODE:
         ret = spi_device_func_write(fpga_i2c->dev_name, pos, val, size);
         break;
+    case SYMBOL_INDIRECT_DEV_MODE:
+        ret = indirect_device_func_write(fpga_i2c->dev_name, pos, val, size);
+        break;
     default:
         FPGA_I2C_ERROR("err func_mode %d, write failed.\n", fpga_i2c->i2c_func_mode);
         return -EINVAL;
@@ -198,6 +220,9 @@ static int fpga_device_read(fpga_i2c_dev_t *fpga_i2c, uint32_t pos, uint8_t *val
     case SYMBOL_SPI_DEV_MODE:
         ret = spi_device_func_read(fpga_i2c->dev_name, pos, val, size);
         break;
+    case SYMBOL_INDIRECT_DEV_MODE:
+        ret = indirect_device_func_read(fpga_i2c->dev_name, pos, val, size);
+        break;
     default:
         FPGA_I2C_ERROR("err func_mode %d, read failed.\n", fpga_i2c->i2c_func_mode);
         return -EINVAL;
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pca954x_drv.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pca954x_drv.c
index 25f2d60b9334..d55d0cef122f 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pca954x_drv.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pca954x_drv.c
@@ -1,3 +1,23 @@
+/*
+ * An wb_fpga_pca954x_drv driver for create fpga pca954x adapter function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/slab.h>
@@ -17,6 +37,7 @@ extern int i2c_device_func_write(const char *path, uint32_t pos, uint8_t *val, s
 extern int pcie_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
 extern int io_device_func_write(const char *path, uint32_t pos, uint8_t *val, size_t size);
 extern int spi_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int indirect_device_func_write(const char *path, uint32_t pos, uint8_t *val, size_t size);
 
 #define PCA954X_MAX_NCHANS           (8)
 #define FPGA_INTERNAL_PCA9548        (1)
@@ -29,6 +50,7 @@ extern int spi_device_func_write(const char *path, uint32_t offset, uint8_t *buf
 #define SYMBOL_PCIE_DEV_MODE         (3)
 #define SYMBOL_IO_DEV_MODE           (4)
 #define SYMBOL_SPI_DEV_MODE          (5)
+#define SYMBOL_INDIRECT_DEV_MODE     (6)
 
 int g_fpga_pca954x_debug = 0;
 int g_fpga_pca954x_error = 0;
@@ -189,6 +211,9 @@ static int fpga_device_write(fpga_i2c_dev_t *fpga_i2c, int pos, unsigned char *v
     case SYMBOL_SPI_DEV_MODE:
         ret = spi_device_func_write(fpga_i2c->dev_name, pos, val, size);
         break;
+    case SYMBOL_INDIRECT_DEV_MODE:
+        ret = indirect_device_func_write(fpga_i2c->dev_name, pos, val, size);
+        break;
     default:
         FPGA_PCA954X_ERROR("err func_mode %d, write failed.\n", fpga_i2c->i2c_func_mode);
         return -EINVAL;
@@ -416,7 +441,6 @@ static int fpga_i2c_pca954x_probe(struct i2c_client *client, const struct i2c_de
         data->type = id->driver_data;
         /* BUS ID */
         ret = of_property_read_u32(dev->of_node, "fpga_9548_flag", &data->fpga_9548_flag);
-        ret += of_property_read_u32(dev->of_node, "fpga_9548_reset_flag", &data->fpga_9548_reset_flag);
         if (ret != 0) {
             dev_err(&client->dev, "Failed to get 954x dts config, ret:%d.\n", ret);
             ret = -EINVAL;
@@ -431,7 +455,8 @@ static int fpga_i2c_pca954x_probe(struct i2c_client *client, const struct i2c_de
             FPGA_PCA954X_VERBOSE("pca9548_base_nr:%u.\n", data->pca9548_base_nr);
         }
     }
-
+    data->fpga_9548_reset_flag = 1;
+    dev_info(&client->dev, "pca9548_reset_mode is forcibly set to the hardware automatic reset mode.\n");
     if (data->fpga_9548_flag != FPGA_EXTERNAL_PCA9548 && data->fpga_9548_flag != FPGA_INTERNAL_PCA9548) {
         dev_err(&client->dev, "Error: fpga 954x flag config error, value:0x%x.\n", data->fpga_9548_flag);
         ret = -EINVAL;
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pcie.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pcie.c
index baabfb5cd4d0..43fc67419f0a 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pcie.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pcie.c
@@ -1,7 +1,23 @@
 /*
- * wb_fpga_pcie.c
- * ko to enable fpga pcie
+ * An wb_fpga_pcie driver for create fpga pcie adapter function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
+
 #include <linux/module.h>
 #include <linux/version.h>
 #include <linux/slab.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_d1500.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_d1500.c
index 7d5d5da87ea7..25fa7acc1f1f 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_d1500.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_d1500.c
@@ -1,10 +1,24 @@
 /*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
+ * An wb_gpio_d1500 driver for gpio d1500 function
  *
- * Copyright (C) 2011, 2012 Cavium Inc.
+ * Copyright (C) 2024 Micas Networks Inc.
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
+
+
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/kernel.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_device.c
index 75f883b5909d..cd1fc43da118 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_device.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_device.c
@@ -1,3 +1,23 @@
+/*
+ * An wb_gpio_device driver for gpio device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <linux/module.h>
 #include <linux/io.h>
 #include <linux/device.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c
index 59cee0b1e1c0..69b2aad0e7c8 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c
@@ -1,7 +1,23 @@
 /*
- * wb_io_dev.c
- * ko to read/write i2c client through /dev/XXX device
+ * An wb_i2c_dev driver for i2c dev function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
+
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/device.h>
@@ -27,8 +43,8 @@
 #define WIDTH_2Byte          (2)
 #define WIDTH_4Byte          (4)
 
-#define KERNEL_SPASE         (0)
-#define USER_SPASE           (1)
+#define KERNEL_SPACE         (0)
+#define USER_SPACE           (1)
 
 static int g_i2c_dev_debug = 0;
 static int g_i2c_dev_error = 0;
@@ -467,7 +483,7 @@ static ssize_t i2c_dev_read(struct file *file, char __user *buf, size_t count, l
     }
 
     /* check flag is user spase or kernel spase */
-    if (flag == USER_SPASE) {
+    if (flag == USER_SPACE) {
         I2C_DEV_DEBUG_DMESG("user space read, buf: %p, offset: %lld, read count %lu.\n",
             buf, *offset, count);
         if (copy_to_user(buf, val, read_len)) {
@@ -491,7 +507,7 @@ static ssize_t i2c_dev_read_user(struct file *file, char __user *buf, size_t cou
 
     I2C_DEV_DEBUG_DMESG("i2c_dev_read_user, file: %p, count: %lu, offset: %lld\n",
         file, count, *offset);
-    ret = i2c_dev_read(file, buf, count, offset, USER_SPASE);
+    ret = i2c_dev_read(file, buf, count, offset, USER_SPACE);
     return ret;
 }
 
@@ -501,7 +517,7 @@ static ssize_t i2c_dev_read_iter(struct kiocb *iocb, struct iov_iter *to)
 
     I2C_DEV_DEBUG_DMESG("i2c_dev_read_iter, file: %p, count: %lu, offset: %lld\n",
         iocb->ki_filp, to->count, iocb->ki_pos);
-    ret = i2c_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos, KERNEL_SPASE);
+    ret = i2c_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos, KERNEL_SPACE);
     return ret;
 }
 
@@ -530,7 +546,7 @@ static ssize_t i2c_dev_write(struct file *file, const char __user *buf, size_t c
     mem_clear(val, sizeof(val));
 
     /* check flag is user spase or kernel spase */
-    if (flag == USER_SPASE) {
+    if (flag == USER_SPACE) {
         I2C_DEV_DEBUG_DMESG("user space write, buf: %p, offset: %lld, write count %lu.\n",
             buf, *offset, count);
         if (copy_from_user(val, buf, count)) {
@@ -560,7 +576,7 @@ static ssize_t i2c_dev_write_user(struct file *file, const char __user *buf, siz
 
     I2C_DEV_DEBUG_DMESG("i2c_dev_write_user, file: %p, count: %lu, offset: %lld\n",
         file, count, *offset);
-    ret = i2c_dev_write(file, buf, count, offset, USER_SPASE);
+    ret = i2c_dev_write(file, buf, count, offset, USER_SPACE);
     return ret;
 }
 
@@ -570,7 +586,7 @@ static ssize_t i2c_dev_write_iter(struct kiocb *iocb, struct iov_iter *from)
 
     I2C_DEV_DEBUG_DMESG("i2c_dev_write_iter, file: %p, count: %lu, offset: %lld\n",
         iocb->ki_filp, from->count, iocb->ki_pos);
-    ret = i2c_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos, KERNEL_SPASE);
+    ret = i2c_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos, KERNEL_SPACE);
     return ret;
 }
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.h
index 9cc95d88e804..5d294a7ed410 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for wb_i2c_dev driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef __WB_I2C_DEV_H__
 #define __WB_I2C_DEV_H__
 #include <linux/string.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_gpio_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_gpio_device.c
index 80f18b2eab55..f884dd202e6a 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_gpio_device.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_gpio_device.c
@@ -1,3 +1,23 @@
+/*
+ * An wb_i2c_gpio_device driver for i2c gpio device adapter function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.c
index 854675d9fa99..5c7c566ed4fe 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.c
@@ -1,21 +1,7 @@
 /*
- * I2C multiplexer
+ * An wb_i2c_mux_pca954x driver for i2c pca954x multiplexer/switch function
  *
- * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
- * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
- *
- * This module supports the PCA954x series of I2C multiplexer/switch chips
- * made by Philips Semiconductors.
- * This includes the:
- *     PCA9540, PCA9542, PCA9543, PCA9544, PCA9545, PCA9546, PCA9547
- *     and PCA9548.
- *
- * These chips are all controlled via the I2C bus itself, and all have a
- * single 8-bit register. The upstream "parent" bus fans out to two,
- * four, or eight downstream busses or channels; which of these
- * are selected is determined by the chip type and register contents. A
- * mux can select only one sub-bus at a time; a switch can select any
- * combination simultaneously.
+ * Copyright (C) 2024 Micas Networks Inc.
  *
  * Based on:
  *    pca954x.c from Kumar Gala <galak@kernel.crashing.org>
@@ -30,11 +16,22 @@
  * and
  *    pca9540.c from Jean Delvare <jdelvare@suse.de>.
  *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
+
 #include <linux/version.h>
 #include <linux/device.h>
 #include <linux/gpio/consumer.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.h
index beed9b2f94ac..700b36e0236f 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for wb_i2c_mux_pca954x driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef __WB_I2C_MUX_PCA954X_H__
 #define __WB_I2C_MUX_PCA954X_H__
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.c
index a3ae9f4b2431..83b0774ec901 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.c
@@ -1,19 +1,21 @@
 /*
- * I2C multiplexer driver for PCA9541 bus master selector
+ * An wb_i2c_mux_pca9641 driver for pca9641 multiplexer/switch function
  *
- * Copyright (c) 2010 Ericsson AB.
+ * Copyright (C) 2024 Micas Networks Inc.
  *
- * Author: Guenter Roeck <linux@roeck-us.net>
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
  *
- * Derived from:
- *  pca954x.c
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
  *
- *  Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
- *  Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <linux/version.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.h
index b87f7585567b..8c8ffa3da03d 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for wb_i2c_mux_pca9641 driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef __WB_I2C_MUX_PCA9641_H__
 #define __WB_I2C_MUX_PCA9641_H__
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c
index 20f8954cce83..643fc3b605d7 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c
@@ -1,12 +1,21 @@
-// SPDX-License-Identifier: GPL-2.0
 /*
- * i2c-ocores.c: I2C bus driver for OpenCores I2C controller
- * (https://opencores.org/project/i2c/overview)
+ * An wb_i2c_ocores driver for i2c ocores function
  *
- * Peter Korsgaard <peter@korsgaard.com>
+ * Copyright (C) 2024 Micas Networks Inc.
  *
- * Support for the GRLIB port of the controller by
- * Andreas Larsson <andreas@gaisler.com>
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <linux/clk.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.h
index d413ebb3ad44..8b2cd206c084 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for wb_ocores driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef __WB_I2C_OCORES_H__
 #define __WB_I2C_OCORES_H__
 #include <linux/string.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_indirect_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_indirect_dev.c
new file mode 100644
index 000000000000..c0a730e77462
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_indirect_dev.c
@@ -0,0 +1,869 @@
+/*
+ * An wb_indirect_dev driver for indirect adapter device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <asm/io.h>
+#include <linux/slab.h>
+#include <linux/kernel.h>
+#include <linux/notifier.h>
+#include <linux/kdebug.h>
+#include <linux/kallsyms.h>
+#include <linux/fs.h>
+#include <asm/uaccess.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/of_platform.h>
+#include <linux/pci.h>
+#include <linux/preempt.h>
+#include <linux/miscdevice.h>
+#include <linux/uio.h>
+#include <linux/kprobes.h>
+
+#include "wb_indirect_dev.h"
+#define MODULE_NAME "wb-indirect-dev"
+
+#define SYMBOL_I2C_DEV_MODE       (1)
+#define FILE_MODE                 (2)
+#define SYMBOL_PCIE_DEV_MODE      (3)
+#define SYMBOL_IO_DEV_MODE        (4)
+#define SYMBOL_SPI_DEV_MODE       (5)
+
+#define KERNEL_SPACE         (0)
+#define USER_SPACE           (1)
+
+#define MAX_INDIRECT_DEV_NUM      (256)
+#define INDIRECT_ADDR_H(addr)           ((addr >> 8) & 0xff)
+#define INDIRECT_ADDR_L(addr)           ((addr) & 0xff)
+#define INDIRECT_OP_WRITE               (0x2)
+#define INDIRECT_OP_READ                (0x3)
+
+static int g_indirect_dev_debug = 0;
+static int g_indirect_dev_error = 0;
+
+module_param(g_indirect_dev_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_indirect_dev_error, int, S_IRUGO | S_IWUSR);
+
+#define INDIRECT_DEV_INFO(fmt, args...) do {                                        \
+    printk(KERN_INFO "[INDIRECT_DEV][INFO][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+} while (0)
+
+#define INDIRECT_DEV_DEBUG(fmt, args...) do {                                        \
+    if (g_indirect_dev_debug) { \
+        printk(KERN_DEBUG "[INDIRECT_DEV][DEBUG][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define INDIRECT_DEV_ERROR(fmt, args...) do {                                        \
+    if (g_indirect_dev_error) { \
+        printk(KERN_ERR "[INDIRECT_DEV][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static struct indirect_dev_info* indirect_dev_arry[MAX_INDIRECT_DEV_NUM];
+
+static int noop_pre(struct kprobe *p, struct pt_regs *regs) { return 0; }
+static struct kprobe kp = {   
+	.symbol_name = "kallsyms_lookup_name",  
+};
+unsigned long (*kallsyms_lookup_name_fun)(const char *name) = NULL;
+
+/* Call kprobe to find the address location of kallsyms_lookup_name */
+static int find_kallsyms_lookup_name(void)
+{ 
+    int ret = -1;
+
+	kp.pre_handler = noop_pre;
+	ret = register_kprobe(&kp);
+    if (ret < 0) {  
+	    INDIRECT_DEV_ERROR("register_kprobe failed, error:%d\n", ret); 
+        return ret; 
+	}
+	INDIRECT_DEV_DEBUG("kallsyms_lookup_name addr: %p\n", kp.addr); 
+	kallsyms_lookup_name_fun = (void*)kp.addr; 
+	unregister_kprobe(&kp);
+    
+	return ret;
+}
+
+struct indirect_dev_info {
+    const char *name;               /* generate dev name */
+    const char *logic_dev_name;     /* dependent dev name */
+    uint32_t indirect_len;          /* dev data len */
+    uint32_t data_bus_width;        /* dev data_bus_width */
+    uint32_t addr_bus_width;        /* dev addr_bus_width */
+    uint32_t wr_data;               /* dependent dev wr date reg */
+    uint32_t wr_data_width;         /* dependent dev wr_data_width */
+    uint32_t addr_low;              /* dependent dev w/r addr reg low */
+    uint32_t addr_high;             /* dependent dev w/r addr reg high */
+    uint32_t rd_data;               /* dependent dev rd date reg */
+    uint32_t rd_data_width;         /* dependent dev rd_data_width */
+    uint32_t opt_ctl;               /* dependent dev opt code reg */
+    uint32_t logic_func_mode;       /* 1: i2c, 2: file, 3:pcie, 4:io, 5:spi */
+    unsigned long write_intf_addr;
+    unsigned long read_intf_addr;
+    spinlock_t indirect_dev_lock;
+    struct miscdevice misc;
+    struct device *dev;
+};
+
+static int wb_dev_file_read(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
+    filp = filp_open(path, O_RDONLY, 0);
+    if (IS_ERR(filp)) {
+        INDIRECT_DEV_ERROR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+    tmp_pos = (loff_t)pos;
+    iov_iter_kvec(&iter, ITER_DEST, &iov, 1, iov.iov_len);
+    ret = vfs_iter_read(filp, &iter, &tmp_pos, 0);
+    if (ret < 0) {
+        INDIRECT_DEV_ERROR("vfs_iter_read failed, path=%s, addr=0x%x, size=%zu, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int wb_dev_file_write(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
+    filp = filp_open(path, O_RDWR, 777);
+    if (IS_ERR(filp)) {
+        INDIRECT_DEV_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    iov_iter_kvec(&iter, ITER_SOURCE, &iov, 1, iov.iov_len);
+    ret = vfs_iter_write(filp, &iter, &tmp_pos, 0);
+    if (ret < 0) {
+        INDIRECT_DEV_ERROR("vfs_iter_write failed, path=%s, addr=0x%x, size=%zu, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+    
+    vfs_fsync(filp, 1);
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int wb_logic_reg_write(struct indirect_dev_info *indirect_dev, uint32_t pos, uint8_t *val, size_t size)
+{
+    device_func_write pfunc;
+
+    pfunc = (device_func_write)indirect_dev->write_intf_addr;
+    return pfunc(indirect_dev->logic_dev_name, pos, val, size);
+}
+
+static int wb_logic_reg_read(struct indirect_dev_info *indirect_dev, uint32_t pos, uint8_t *val, size_t size)
+{
+    device_func_read pfunc;
+
+    pfunc = (device_func_read)indirect_dev->read_intf_addr;
+    return pfunc(indirect_dev->logic_dev_name, pos, val, size);
+}
+
+
+static int indirect_addressing_read(struct indirect_dev_info *indirect_dev, uint8_t *buf, uint32_t address, uint32_t rd_data_width)
+{
+    uint8_t addr_l, addr_h, op_code;
+    unsigned long flags;
+    int ret = 0;
+
+    addr_h = INDIRECT_ADDR_H(address);
+    addr_l = INDIRECT_ADDR_L(address);
+    op_code = INDIRECT_OP_READ;
+
+    spin_lock_irqsave(&indirect_dev->indirect_dev_lock, flags);
+
+    ret = wb_logic_reg_write(indirect_dev, indirect_dev->addr_low, &addr_l, WIDTH_1Byte);
+    if (ret < 0) {
+        INDIRECT_DEV_ERROR("indirect_read write reg error.offset = 0x%x, value = %u\n", indirect_dev->addr_low, addr_l);
+        goto fail;
+    }
+
+    ret = wb_logic_reg_write(indirect_dev, indirect_dev->addr_high, &addr_h, WIDTH_1Byte);
+    if (ret < 0) {
+        INDIRECT_DEV_ERROR("indirect_read write reg error.offset = 0x%x, value = %u\n", indirect_dev->addr_high, addr_h);
+        goto fail;
+    }
+
+    ret = wb_logic_reg_write(indirect_dev, indirect_dev->opt_ctl, &op_code, WIDTH_1Byte);
+    if (ret < 0) {
+        INDIRECT_DEV_ERROR("indirect_read write reg error.offset = 0x%x, value = %u\n", indirect_dev->opt_ctl, INDIRECT_OP_READ);
+        goto fail;
+    }
+
+    ret = wb_logic_reg_read(indirect_dev, indirect_dev->rd_data, buf, rd_data_width);
+    if (ret < 0) {
+        INDIRECT_DEV_ERROR("indirect_read read reg error.read offset = 0x%x\n, ret = %d", indirect_dev->rd_data, ret);
+        goto fail;
+    }
+
+    INDIRECT_DEV_DEBUG("indirect_read success, addr = 0x%x\n", address);
+    spin_unlock_irqrestore(&indirect_dev->indirect_dev_lock, flags);
+    return ret;
+fail:
+    spin_unlock_irqrestore(&indirect_dev->indirect_dev_lock, flags);
+    return ret;
+}
+
+static int device_read(struct indirect_dev_info *indirect_dev, uint32_t offset, uint8_t *buf, size_t count)
+{
+    int i, ret;
+    u32 data_width;
+    u32 tmp;
+
+    data_width = indirect_dev->data_bus_width;
+
+    if (offset % data_width) {
+        INDIRECT_DEV_ERROR("data bus width:%d, offset:0x%x, read size %zu invalid.\n",
+            data_width, offset, count);
+        return -EINVAL;
+    }
+
+    if (count > indirect_dev->indirect_len - offset) {
+        INDIRECT_DEV_DEBUG("read count out of range. input len:%zu, read len:%u.\n",
+            count, indirect_dev->indirect_len  - offset);
+        count = indirect_dev->indirect_len  - offset;
+    }
+    tmp = count;
+
+    for (i = 0; i < count; i += data_width) {
+        ret = indirect_addressing_read(indirect_dev, buf + i, offset + i, (tmp > data_width ? data_width : tmp));
+        if (ret < 0) {
+            INDIRECT_DEV_ERROR("read error.read offset = %u\n", (offset + i));
+            return -EFAULT;
+        }
+        tmp -= data_width;
+    }
+
+    return count;
+}
+
+static int indirect_addressing_write(struct indirect_dev_info *indirect_dev, uint8_t *buf, uint32_t address, uint32_t wr_data_width)
+{
+    uint8_t addr_l, addr_h, op_code;
+    unsigned long flags;
+    int ret = 0;
+
+    addr_h = INDIRECT_ADDR_H(address);
+    addr_l = INDIRECT_ADDR_L(address);
+    op_code = INDIRECT_OP_WRITE;
+
+    spin_lock_irqsave(&indirect_dev->indirect_dev_lock, flags);
+
+    ret = wb_logic_reg_write(indirect_dev, indirect_dev->wr_data, buf, wr_data_width);
+    if (ret < 0) {
+        INDIRECT_DEV_ERROR("indirect_write read reg error.read offset = 0x%x\n, ret = %d", indirect_dev->wr_data, ret);
+        goto fail;
+    }
+
+    ret = wb_logic_reg_write(indirect_dev, indirect_dev->addr_low, &addr_l, WIDTH_1Byte);
+    if (ret < 0) {
+        INDIRECT_DEV_ERROR("indirect_write write reg error.offset = 0x%x, value = %u\n", indirect_dev->addr_low, addr_l);
+        goto fail;
+    }
+
+    ret = wb_logic_reg_write(indirect_dev, indirect_dev->addr_high, &addr_h, WIDTH_1Byte);
+    if (ret < 0) {
+        INDIRECT_DEV_ERROR("indirect_write write reg error.offset = 0x%x, value = %u\n", indirect_dev->addr_high, addr_h);
+        goto fail;
+    }
+
+    ret = wb_logic_reg_write(indirect_dev, indirect_dev->opt_ctl, &op_code, WIDTH_1Byte);
+    if (ret < 0) {
+        INDIRECT_DEV_ERROR("indirect_write write reg error.offset = 0x%x, value = %u\n", indirect_dev->opt_ctl, INDIRECT_OP_READ);
+        goto fail;
+    }
+
+    INDIRECT_DEV_DEBUG("indirect_write success, addr = 0x%x\n", address);
+    spin_unlock_irqrestore(&indirect_dev->indirect_dev_lock, flags);
+    return ret;
+fail:
+    spin_unlock_irqrestore(&indirect_dev->indirect_dev_lock, flags);
+    return ret;
+}
+
+static int device_write(struct indirect_dev_info *indirect_dev, uint32_t offset, uint8_t *buf, size_t count)
+{
+    int i, ret;
+    u32 data_width;
+    u32 tmp;
+
+    if (offset > indirect_dev->indirect_len) {
+        INDIRECT_DEV_DEBUG("offset: 0x%x, spi len: 0x%x, count: %zu, EOF.\n",
+            offset, indirect_dev->indirect_len, count);
+        return 0;
+    }
+
+    data_width = indirect_dev->data_bus_width;
+    if (offset % data_width) {
+        INDIRECT_DEV_ERROR("data bus width:%d, offset:0x%x, read size %zu invalid.\n",
+            data_width, offset, count);
+        return -EINVAL;
+    }
+
+    if (count > (indirect_dev->indirect_len - offset)) {
+        INDIRECT_DEV_DEBUG("write count out of range. input len:%zu, read len:%u.\n",
+            count, indirect_dev->indirect_len - offset);
+        count = indirect_dev->indirect_len - offset;
+    }
+
+    if (count == 0) {
+        INDIRECT_DEV_DEBUG("offset: 0x%x, i2c len: 0x%x, read len: %zu, EOF.\n",
+            offset, indirect_dev->indirect_len, count);
+        return 0;
+    }
+
+    tmp = count;
+    for (i = 0; i < count; i += data_width) {
+        ret = indirect_addressing_write(indirect_dev, buf + i, offset + i, (tmp > data_width ? data_width : tmp));
+        if (ret < 0) {
+            INDIRECT_DEV_ERROR("write error.offset = %u\n", (offset + i));
+            return -EFAULT;
+        }
+        tmp -= data_width;
+    }
+    return count;
+}
+
+static ssize_t indirect_dev_read(struct file *file, char __user *buf, size_t count, loff_t *offset, int flag)
+{
+    u8 val[MAX_RW_LEN];
+    int ret, read_len;
+    struct indirect_dev_info *indirect_dev;
+
+    indirect_dev = file->private_data;
+    if (indirect_dev == NULL) {
+        INDIRECT_DEV_ERROR("can't get read private_data.\n");
+        return -EINVAL;
+    }
+
+    if (count == 0) {
+        INDIRECT_DEV_ERROR("Invalid params, read count is 0.\n");
+        return -EINVAL;
+    }
+
+    if (count > sizeof(val)) {
+        INDIRECT_DEV_DEBUG("read count %zu exceed max %zu.\n", count, sizeof(val));
+        count = sizeof(val);
+    }
+
+    mem_clear(val, sizeof(val));
+    read_len = device_read(indirect_dev, (uint32_t)*offset, val, count);
+    if (read_len < 0) {
+        INDIRECT_DEV_ERROR("indirect dev read failed, dev name:%s, offset:0x%x, len:%zu.\n",
+            indirect_dev->name, (uint32_t)*offset, count);
+        return read_len;
+    }
+
+    /* check flag is user spase or kernel spase */
+    if (flag == USER_SPACE) {
+        INDIRECT_DEV_DEBUG("user space read, buf: %p, offset: %lld, read count %zu.\n",
+            buf, *offset, count);
+        if (copy_to_user(buf, val, read_len)) {
+            INDIRECT_DEV_ERROR("copy_to_user failed.\n");
+            return -EFAULT;
+        }
+    } else {
+        INDIRECT_DEV_DEBUG("kernel space read, buf: %p, offset: %lld, read count %zu.\n",
+            buf, *offset, count);
+        memcpy(buf, val, read_len);
+    }
+
+    *offset += read_len;
+    ret = read_len;
+    return ret;
+}
+
+static ssize_t indirect_dev_read_user(struct file *file, char __user *buf, size_t count, loff_t *offset)
+{
+    int ret;
+
+    INDIRECT_DEV_DEBUG("indirect_dev_read_user, file: %p, count: %lu, offset: %lld\n",
+        file, count, *offset);
+    ret = indirect_dev_read(file, buf, count, offset, USER_SPACE);
+    return ret;
+}
+
+
+static ssize_t indirect_dev_read_iter(struct kiocb *iocb, struct iov_iter *to)
+{
+    int ret;
+
+    INDIRECT_DEV_DEBUG("indirect_dev_read_iter, file: %p, count: %zu, offset: %lld\n",
+        iocb->ki_filp, to->count, iocb->ki_pos);
+    ret = indirect_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos, KERNEL_SPACE);
+    return ret;
+}
+
+static ssize_t indirect_dev_write(struct file *file, const char __user *buf,
+                   size_t count, loff_t *offset, int flag)
+{
+    u8 val[MAX_RW_LEN];
+    int write_len;
+    struct indirect_dev_info *indirect_dev;
+
+    indirect_dev = file->private_data;
+    if (indirect_dev == NULL) {
+        INDIRECT_DEV_ERROR("get write private_data error.\n");
+        return -EINVAL;
+    }
+
+    if (count == 0) {
+        INDIRECT_DEV_ERROR("Invalid params, write count is 0.\n");
+        return -EINVAL;
+    }
+
+    if (count > sizeof(val)) {
+        INDIRECT_DEV_DEBUG("write count %zu exceed max %zu.\n", count, sizeof(val));
+        count = sizeof(val);
+    }
+
+    mem_clear(val, sizeof(val));
+    /* check flag is user spase or kernel spase */
+    if (flag == USER_SPACE) {
+        INDIRECT_DEV_DEBUG("user space write, buf: %p, offset: %lld, write count %zu.\n",
+            buf, *offset, count);
+        if (copy_from_user(val, buf, count)) {
+            INDIRECT_DEV_ERROR("copy_from_user failed.\n");
+            return -EFAULT;
+        }
+    } else {
+        INDIRECT_DEV_DEBUG("kernel space write, buf: %p, offset: %lld, write count %zu.\n",
+            buf, *offset, count);
+        memcpy(val, buf, count);
+    }
+
+    write_len = device_write(indirect_dev, (uint32_t)*offset, val, count);
+    if (write_len < 0) {
+        INDIRECT_DEV_ERROR("indirect dev write failed, dev name:%s, offset:0x%llx, len:%zu.\n",
+            indirect_dev->name, *offset, count);
+        return write_len;
+    }
+
+    *offset += write_len;
+    return write_len;
+}
+
+static ssize_t indirect_dev_write_user(struct file *file, const char __user *buf, size_t count, loff_t *offset)
+{
+    int ret;
+
+    INDIRECT_DEV_DEBUG("indirect_dev_write_user, file: %p, count: %lu, offset: %lld\n",
+        file, count, *offset);
+    ret = indirect_dev_write(file, buf, count, offset, USER_SPACE);
+    return ret;
+}
+
+static ssize_t indirect_dev_write_iter(struct kiocb *iocb, struct iov_iter *from)
+{
+    int ret;
+
+    INDIRECT_DEV_DEBUG("indirect_dev_write_iter, file: %p, count: %zu, offset: %lld\n",
+        iocb->ki_filp, from->count, iocb->ki_pos);
+    ret = indirect_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos, KERNEL_SPACE);
+    return ret;
+}
+
+static loff_t indirect_dev_llseek(struct file *file, loff_t offset, int origin)
+{
+    loff_t ret = 0;
+    struct indirect_dev_info *indirect_dev;
+
+    indirect_dev = file->private_data;
+    if (indirect_dev == NULL) {
+        INDIRECT_DEV_ERROR("indirect_dev is NULL, llseek failed.\n");
+        return -EINVAL;
+    }
+
+    switch (origin) {
+    case SEEK_SET:
+        if (offset < 0) {
+            INDIRECT_DEV_ERROR("SEEK_SET, offset:%lld, invalid.\n", offset);
+            ret = -EINVAL;
+            break;
+        }
+        if (offset > indirect_dev->indirect_len) {
+            INDIRECT_DEV_ERROR("SEEK_SET out of range, offset:%lld, i2c_len:0x%x.\n",
+                offset, indirect_dev->indirect_len);
+            ret = - EINVAL;
+            break;
+        }
+        file->f_pos = offset;
+        ret = file->f_pos;
+        break;
+    case SEEK_CUR:
+        if (((file->f_pos + offset) > indirect_dev->indirect_len) || ((file->f_pos + offset) < 0)) {
+            INDIRECT_DEV_ERROR("SEEK_CUR out of range, f_ops:%lld, offset:%lld.\n",
+                 file->f_pos, offset);
+        }
+        file->f_pos += offset;
+        ret = file->f_pos;
+        break;
+    default:
+        INDIRECT_DEV_ERROR("unsupport llseek type:%d.\n", origin);
+        ret = -EINVAL;
+        break;
+    }
+    return ret;
+}
+
+static long indirect_dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+    return 0;
+}
+
+static int indirect_dev_open(struct inode *inode, struct file *file)
+{
+    unsigned int minor = iminor(inode);
+    struct indirect_dev_info *indirect_dev;
+
+    if (minor >= MAX_INDIRECT_DEV_NUM) {
+        INDIRECT_DEV_ERROR("minor out of range, minor = %d.\n", minor);
+        return -ENODEV;
+    }
+
+    indirect_dev = indirect_dev_arry[minor];
+    if (indirect_dev == NULL) {
+        INDIRECT_DEV_ERROR("indirect_dev is NULL, open failed, minor = %d\n", minor);
+        return -ENODEV;
+    }
+
+    file->private_data = indirect_dev;
+
+    return 0;
+}
+
+static int indirect_dev_release(struct inode *inode, struct file *file)
+{
+    file->private_data = NULL;
+
+    return 0;
+}
+
+static const struct file_operations indirect_dev_fops = {
+    .owner          = THIS_MODULE,
+    .llseek         = indirect_dev_llseek,
+    .read           = indirect_dev_read_user,
+    .write          = indirect_dev_write_user,
+    .read_iter      = indirect_dev_read_iter,
+    .write_iter     = indirect_dev_write_iter,
+    .unlocked_ioctl = indirect_dev_ioctl,
+    .open           = indirect_dev_open,
+    .release        = indirect_dev_release,
+};
+
+static struct indirect_dev_info *dev_match(const char *path)
+{
+    struct indirect_dev_info *indirect_dev;
+    char dev_name[DEV_NAME_LEN];
+    int i;
+
+    for (i = 0; i < MAX_INDIRECT_DEV_NUM; i++) {
+        if (indirect_dev_arry[i] == NULL) {
+            continue;
+        }
+        indirect_dev = indirect_dev_arry[i];
+        snprintf(dev_name, DEV_NAME_LEN,"/dev/%s", indirect_dev->name);
+        if (!strcmp(path, dev_name)) {
+            INDIRECT_DEV_DEBUG("get dev_name = %s, minor = %d\n", dev_name, i);
+            return indirect_dev;
+        }
+    }
+
+    return NULL;
+}
+
+int indirect_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count)
+{
+    struct indirect_dev_info *indirect_dev;
+    int read_len;
+
+    if (path == NULL) {
+        INDIRECT_DEV_ERROR("path NULL");
+        return -EINVAL;
+    }
+
+    if (buf == NULL) {
+        INDIRECT_DEV_ERROR("buf NULL");
+        return -EINVAL;
+    }
+
+    indirect_dev = dev_match(path);
+    if (indirect_dev == NULL) {
+        INDIRECT_DEV_ERROR("indirect_dev match failed. dev path = %s", path);
+        return -EINVAL;
+    }
+
+    read_len = device_read(indirect_dev, offset, buf, count);
+    if (read_len < 0) {
+        INDIRECT_DEV_ERROR("indirect_dev_read_tmp failed, ret:%d.\n", read_len);
+    }
+    return read_len;
+}
+EXPORT_SYMBOL(indirect_device_func_read);
+
+int indirect_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count)
+{
+    struct indirect_dev_info *indirect_dev;
+    int write_len;
+
+    if (path == NULL) {
+        INDIRECT_DEV_ERROR("path NULL");
+        return -EINVAL;
+    }
+
+    if (buf == NULL) {
+        INDIRECT_DEV_ERROR("buf NULL");
+        return -EINVAL;
+    }
+
+    indirect_dev = dev_match(path);
+    if (indirect_dev == NULL) {
+        INDIRECT_DEV_ERROR("indirect_dev match failed. dev path = %s", path);
+        return -EINVAL;
+    }
+
+    write_len = device_write(indirect_dev, offset, buf, count);
+    if (write_len < 0) {
+        INDIRECT_DEV_ERROR("indirect_dev_write_tmp failed, ret:%d.\n", write_len);
+    }
+    return write_len;
+}
+EXPORT_SYMBOL(indirect_device_func_write);
+
+
+static int wb_indirect_dev_probe(struct platform_device *pdev)
+{
+    int ret;
+    struct indirect_dev_info *indirect_dev;
+    struct miscdevice *misc;
+    indirect_dev_device_t *indirect_dev_device;
+
+    INDIRECT_DEV_DEBUG("wb_indirect_dev_probe\n");
+
+    indirect_dev = devm_kzalloc(&pdev->dev, sizeof(struct indirect_dev_info), GFP_KERNEL);
+    if (!indirect_dev) {
+        dev_err(&pdev->dev, "devm_kzalloc error.\n");
+        return -ENOMEM;
+    }
+
+    platform_set_drvdata(pdev, indirect_dev);
+    indirect_dev->dev = &pdev->dev;
+
+    if (pdev->dev.of_node) {
+        ret = 0;
+        ret += of_property_read_string(pdev->dev.of_node, "dev_name", &indirect_dev->name);
+        ret += of_property_read_string(pdev->dev.of_node, "logic_dev_name", &indirect_dev->logic_dev_name);
+        ret += of_property_read_u32(pdev->dev.of_node, "addr_low", &indirect_dev->addr_low);
+        ret += of_property_read_u32(pdev->dev.of_node, "data_bus_width", &indirect_dev->data_bus_width);
+        ret += of_property_read_u32(pdev->dev.of_node, "addr_bus_width", &indirect_dev->addr_bus_width);
+        ret += of_property_read_u32(pdev->dev.of_node, "addr_high", &indirect_dev->addr_high);
+        ret += of_property_read_u32(pdev->dev.of_node, "wr_data", &indirect_dev->wr_data);
+        ret += of_property_read_u32(pdev->dev.of_node, "rd_data", &indirect_dev->rd_data);
+        ret += of_property_read_u32(pdev->dev.of_node, "opt_ctl", &indirect_dev->opt_ctl);
+        ret += of_property_read_u32(pdev->dev.of_node, "indirect_len", &indirect_dev->indirect_len);
+        ret += of_property_read_u32(pdev->dev.of_node, "logic_func_mode", &indirect_dev->logic_func_mode);
+
+        if (of_property_read_u32(pdev->dev.of_node, "wr_data_width", &indirect_dev->wr_data_width)) {
+            /* dts have no wr_data_width,set default 1 */
+            indirect_dev->wr_data_width = WIDTH_1Byte;
+        }
+        if (of_property_read_u32(pdev->dev.of_node, "rd_data_width", &indirect_dev->rd_data_width)) {
+            /* dts have no rd_data_width,set default 1 */
+            indirect_dev->rd_data_width = WIDTH_1Byte;
+        }
+        if (ret != 0) {
+            dev_err(&pdev->dev, "dts config error.ret:%d.\n", ret);
+            return -ENXIO;
+        }
+    } else {
+        if (pdev->dev.platform_data == NULL) {
+            dev_err(&pdev->dev, "Failed to get platform data config.\n");
+            return -ENXIO;
+        }
+        indirect_dev_device = pdev->dev.platform_data;
+        indirect_dev->name = indirect_dev_device->dev_name;
+        indirect_dev->logic_dev_name = indirect_dev_device->logic_dev_name;
+        indirect_dev->data_bus_width = indirect_dev_device->data_bus_width;
+        indirect_dev->addr_bus_width = indirect_dev_device->addr_bus_width;
+        indirect_dev->wr_data = indirect_dev_device->wr_data;
+        indirect_dev->wr_data_width = indirect_dev_device->wr_data_width;
+        indirect_dev->addr_low = indirect_dev_device->addr_low;
+        indirect_dev->addr_high = indirect_dev_device->addr_high;
+        indirect_dev->rd_data = indirect_dev_device->rd_data;
+        indirect_dev->rd_data_width = indirect_dev_device->rd_data_width;
+        indirect_dev->opt_ctl = indirect_dev_device->opt_ctl;
+        indirect_dev->indirect_len = indirect_dev_device->indirect_len;
+        indirect_dev->logic_func_mode = indirect_dev_device->logic_func_mode;
+    }
+
+    switch (indirect_dev->logic_func_mode) {
+    case SYMBOL_I2C_DEV_MODE:
+        indirect_dev->write_intf_addr = (unsigned long)kallsyms_lookup_name_fun("i2c_device_func_write");
+        indirect_dev->read_intf_addr = (unsigned long)kallsyms_lookup_name_fun("i2c_device_func_read");
+        break;
+    case SYMBOL_SPI_DEV_MODE:
+        indirect_dev->write_intf_addr = (unsigned long)kallsyms_lookup_name_fun("spi_device_func_write");
+        indirect_dev->read_intf_addr = (unsigned long)kallsyms_lookup_name_fun("spi_device_func_read");
+        break;
+    case SYMBOL_IO_DEV_MODE:
+        indirect_dev->write_intf_addr = (unsigned long)kallsyms_lookup_name_fun("io_device_func_write");
+        indirect_dev->read_intf_addr = (unsigned long)kallsyms_lookup_name_fun("io_device_func_read");
+        break;
+    case SYMBOL_PCIE_DEV_MODE:
+        indirect_dev->write_intf_addr = (unsigned long)kallsyms_lookup_name_fun("pcie_device_func_write");
+        indirect_dev->read_intf_addr = (unsigned long)kallsyms_lookup_name_fun("pcie_device_func_read");
+        break;
+    case FILE_MODE:
+        indirect_dev->write_intf_addr = (unsigned long)wb_dev_file_write;
+        indirect_dev->read_intf_addr = (unsigned long)wb_dev_file_read;
+        break;
+    default:
+        dev_err(&pdev->dev, "func mode %d don't support.\n", indirect_dev->logic_func_mode);
+        return -EINVAL;
+    }
+
+    if (!indirect_dev->write_intf_addr || !indirect_dev->read_intf_addr) {
+        dev_err(&pdev->dev, "Fail: func mode %u rw symbol undefined.\n", indirect_dev->logic_func_mode);
+        return -ENOSYS;
+    }
+
+    /* TODO: data_bus_width unuse now, need judge in rd or wr */
+    dev_info(&pdev->dev, "register indirect device %s success. logic_dev_name: %s, indirect_len: 0x%x, data_bus_width: 0x%x, dependent dev: 0x%x, wr_data: 0x%x, wr_data_width: %d, \
+        rd_data: 0x%x, rd_data_width: %d, addr_low: 0x%x, addr_high: 0x%x, opt_ctl: 0x%x, logic_func_mode: %d\n", indirect_dev->name, indirect_dev->logic_dev_name, indirect_dev->indirect_len, indirect_dev->data_bus_width, \
+        indirect_dev->addr_bus_width, indirect_dev->wr_data, indirect_dev->wr_data_width, indirect_dev->rd_data, indirect_dev->rd_data_width, indirect_dev->addr_low, indirect_dev->addr_high,\
+        indirect_dev->opt_ctl, indirect_dev->logic_func_mode);
+
+    misc = &indirect_dev->misc;
+    misc->minor = MISC_DYNAMIC_MINOR;
+    misc->name = indirect_dev->name;
+    misc->fops = &indirect_dev_fops;
+    misc->mode = 0666;
+    if (misc_register(misc) != 0) {
+        dev_err(&pdev->dev, "register %s faild.\n", misc->name);
+        return -ENXIO;
+    }
+
+    if (misc->minor >= MAX_INDIRECT_DEV_NUM) {
+        dev_err(&pdev->dev, "minor number beyond the limit! is %d.\n", misc->minor);
+        misc_deregister(misc);
+        return -ENXIO;
+    }
+    spin_lock_init(&indirect_dev->indirect_dev_lock);
+    indirect_dev_arry[misc->minor] = indirect_dev;
+
+    dev_info(&pdev->dev, "register indirect device %s success.\n", indirect_dev->name);
+    return 0;
+}
+
+static int wb_indirect_dev_remove(struct platform_device *pdev)
+{
+    int i;
+
+    for (i = 0; i < MAX_INDIRECT_DEV_NUM; i++) {
+        if (indirect_dev_arry[i] != NULL) {
+            if (indirect_dev_arry[i]->dev == &pdev->dev) {
+                misc_deregister(&indirect_dev_arry[i]->misc);
+                indirect_dev_arry[i] = NULL;
+                return 0;
+            }
+        }
+    }
+    return 0;
+}
+
+static const struct of_device_id wb_indirect_dev_driver_of_match[] = {
+    { .compatible = "wb-indirect-dev" },
+    { },
+};
+
+static struct platform_driver wb_indirect_dev_driver = {
+    .probe      = wb_indirect_dev_probe,
+    .remove     = wb_indirect_dev_remove,
+    .driver     = {
+        .owner  = THIS_MODULE,
+        .name   = MODULE_NAME,
+        .of_match_table = wb_indirect_dev_driver_of_match,
+    },
+};
+
+static int __init wb_indirect_dev_init(void)
+{
+    int ret;
+
+    ret = find_kallsyms_lookup_name();
+    if (ret < 0) {
+        INDIRECT_DEV_ERROR("find kallsyms_lookup_name failed\n");
+        return -ENXIO;
+    }
+    INDIRECT_DEV_DEBUG("find kallsyms_lookup_name ok\n");
+    return platform_driver_register(&wb_indirect_dev_driver);
+}
+
+static void __exit wb_indirect_dev_exit(void)
+{
+    platform_driver_unregister(&wb_indirect_dev_driver);
+}
+
+module_init(wb_indirect_dev_init);
+module_exit(wb_indirect_dev_exit);
+MODULE_DESCRIPTION("indirect device driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_indirect_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_indirect_dev.h
new file mode 100644
index 000000000000..bc2570f52794
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_indirect_dev.h
@@ -0,0 +1,54 @@
+/*
+ * A header definition for wb_indirect_dev driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __WB_INDIRECT_DEV_H__
+#define __WB_INDIRECT_DEV_H__
+
+#include <linux/kallsyms.h>
+
+#define DEV_NAME_LEN        (64)
+#define WIDTH_1Byte          (1)
+#define WIDTH_2Byte          (2)
+#define WIDTH_4Byte          (4)
+#define MAX_RW_LEN           (256)
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+typedef int (*device_func_write)(const char *, uint32_t, uint8_t *, size_t);
+typedef int (*device_func_read)(const char *, uint32_t, uint8_t *, size_t );
+
+typedef struct indirect_dev_device_s {
+    char  dev_name[DEV_NAME_LEN];
+    char  logic_dev_name[DEV_NAME_LEN];
+    uint32_t data_bus_width;
+    uint32_t addr_bus_width;
+    uint32_t indirect_len;
+    uint32_t wr_data;
+    uint32_t wr_data_width;
+    uint32_t addr_low;
+    uint32_t addr_high;
+    uint32_t rd_data;
+    uint32_t rd_data_width;
+    uint32_t opt_ctl;
+    uint32_t logic_func_mode;
+    int device_flag;
+} indirect_dev_device_t;
+
+#endif /* __WB_INDIRECT_DEV_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.c
index 03571871014b..6699397aa4b2 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.c
@@ -1,7 +1,23 @@
 /*
- * wb_io_dev.c
- * ko to read/write ioports through /dev/XXX device
+ * An wb_io_dev driver for read/write ioports device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
+
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/device.h>
@@ -27,8 +43,8 @@
 #define IO_INDIRECT_OP_WRITE               (0x2)
 #define IO_INDIRECT_OP_READ                (0X3)
 
-#define KERNEL_SPASE         (0)
-#define USER_SPASE           (1)
+#define KERNEL_SPACE         (0)
+#define USER_SPACE           (1)
 
 static int g_io_dev_debug = 0;
 static int g_io_dev_error = 0;
@@ -54,9 +70,11 @@ typedef struct wb_io_dev_s {
     uint32_t io_len;
     uint32_t indirect_addr;
     uint32_t wr_data;
+    uint32_t wr_data_width;
     uint32_t addr_low;
     uint32_t addr_high;
     uint32_t rd_data;
+    uint32_t rd_data_width;
     uint32_t opt_ctl;
     spinlock_t io_dev_lock;
     struct miscdevice misc;
@@ -90,14 +108,15 @@ static int io_dev_release(struct inode *inode, struct file *file)
     return 0;
 }
 
-uint8_t io_indirect_addressing_read(wb_io_dev_t *wb_io_dev, uint32_t address)
+u32 io_indirect_addressing_read(wb_io_dev_t *wb_io_dev, uint32_t address)
 {
-    uint8_t addr_l, addr_h, value;
+    int width;
+    uint8_t addr_l, addr_h;
     unsigned long flags;
+    u32 value;
 
     addr_h = IO_INDIRECT_ADDR_H(address);
     addr_l = IO_INDIRECT_ADDR_L(address);
-    IO_DEV_DEBUG_VERBOSE("read one count, addr = 0x%x\n", address);
 
     spin_lock_irqsave(&wb_io_dev->io_dev_lock, flags);
 
@@ -107,16 +126,32 @@ uint8_t io_indirect_addressing_read(wb_io_dev_t *wb_io_dev, uint32_t address)
 
     outb(IO_INDIRECT_OP_READ, wb_io_dev->io_base + wb_io_dev->opt_ctl);
 
-    value = inb(wb_io_dev->io_base + wb_io_dev->rd_data);
+    width = wb_io_dev->rd_data_width;
+    switch (width) {
+    case IO_DATA_WIDTH_2:
+        value = inw(wb_io_dev->io_base + wb_io_dev->rd_data);
+        break;
+    case IO_DATA_WIDTH_4:
+        value = inl(wb_io_dev->io_base + wb_io_dev->rd_data);
+        break;
+    case IO_DATA_WIDTH_1:
+    default:
+        /* default 1 byte mode */
+        value = inb(wb_io_dev->io_base + wb_io_dev->rd_data);
+        break;
+    }
 
     spin_unlock_irqrestore(&wb_io_dev->io_dev_lock, flags);
 
+    IO_DEV_DEBUG_VERBOSE("read one count, addr = 0x%x, value = 0x%x\n", address, value);
+
     return value;
 }
 
 static int io_dev_read_tmp(wb_io_dev_t *wb_io_dev, uint32_t offset, uint8_t *buf, size_t count)
 {
-    int i;
+    int width, i, j;
+    u32 val;
 
     if (offset > wb_io_dev->io_len) {
         IO_DEV_DEBUG_VERBOSE("offset:0x%x, io len:0x%x, EOF.\n", offset, wb_io_dev->io_len);
@@ -129,8 +164,19 @@ static int io_dev_read_tmp(wb_io_dev_t *wb_io_dev, uint32_t offset, uint8_t *buf
         count = wb_io_dev->io_len - offset;
     }
     if (wb_io_dev->indirect_addr) {
-        for (i = 0; i < count; i++) {
-            buf[i] = io_indirect_addressing_read(wb_io_dev, offset + i);
+        width = wb_io_dev->rd_data_width;
+
+        if (offset % width) {
+            IO_DEV_DEBUG_VERBOSE("rd_data_width:%d, offset:0x%x, size %lu invalid.\n",
+                width, offset, count);
+            return -EINVAL;
+        }
+
+        for (i = 0; i < count; i += width) {
+            val = io_indirect_addressing_read(wb_io_dev, offset + i);
+            for (j = 0; (j < width) && (i + j < count); j++) {
+                buf[i + j] = (val >> (8 * j)) & 0xff;
+            }
         }
     } else {
         for (i = 0; i < count; i++) {
@@ -171,7 +217,7 @@ static ssize_t io_dev_read(struct file *file, char __user *buf, size_t count, lo
     }
 
     /* check flag is user spase or kernel spase */
-    if (flag == USER_SPASE) {
+    if (flag == USER_SPACE) {
         IO_DEV_DEBUG_VERBOSE("user space read, buf: %p, offset: %lld, read count %lu.\n",
             buf, *offset, count);
         if (copy_to_user(buf, buf_tmp, read_len)) {
@@ -194,7 +240,7 @@ static ssize_t io_dev_read_user(struct file *file, char __user *buf, size_t coun
 
     IO_DEV_DEBUG_VERBOSE("io_dev_read_user, file: %p, count: %lu, offset: %lld\n",
         file, count, *offset);
-    ret = io_dev_read(file, buf, count, offset, USER_SPASE);
+    ret = io_dev_read(file, buf, count, offset, USER_SPACE);
     return ret;
 }
 
@@ -204,22 +250,37 @@ static ssize_t io_dev_read_iter(struct kiocb *iocb, struct iov_iter *to)
 
     IO_DEV_DEBUG_VERBOSE("io_dev_read_iter, file: %p, count: %lu, offset: %lld\n",
         iocb->ki_filp, to->count, iocb->ki_pos);
-    ret = io_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos, KERNEL_SPASE);
+    ret = io_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos, KERNEL_SPACE);
     return ret;
 }
 
-void io_indirect_addressing_write(wb_io_dev_t *wb_io_dev, uint32_t address, uint8_t reg_val)
+void io_indirect_addressing_write(wb_io_dev_t *wb_io_dev, uint32_t address, u32 reg_val)
 {
+    int width;
     uint8_t addr_l, addr_h;
     unsigned long flags;
 
     addr_h = IO_INDIRECT_ADDR_H(address);
     addr_l = IO_INDIRECT_ADDR_L(address);
-    IO_DEV_DEBUG_VERBOSE("write one count, addr = 0x%x\n", address);
+    IO_DEV_DEBUG_VERBOSE("write one count, addr = 0x%x, val = 0x%x\n", address, reg_val);
+
+    width = wb_io_dev->wr_data_width;
 
     spin_lock_irqsave(&wb_io_dev->io_dev_lock, flags);
 
-    outb(reg_val, wb_io_dev->io_base + wb_io_dev->wr_data);
+    switch (width) {
+    case IO_DATA_WIDTH_2:
+        outw(reg_val, wb_io_dev->io_base + wb_io_dev->wr_data);
+        break;
+    case IO_DATA_WIDTH_4:
+        outl(reg_val, wb_io_dev->io_base + wb_io_dev->wr_data);
+        break;
+    case IO_DATA_WIDTH_1:
+    default:
+        /* default 1 byte mode */
+        outb(reg_val, wb_io_dev->io_base + wb_io_dev->wr_data);
+        break;
+    }
 
     outb(addr_l, wb_io_dev->io_base + wb_io_dev->addr_low);
 
@@ -234,7 +295,8 @@ void io_indirect_addressing_write(wb_io_dev_t *wb_io_dev, uint32_t address, uint
 
 static int io_dev_write_tmp(wb_io_dev_t *wb_io_dev, uint32_t offset, uint8_t *buf, size_t count)
 {
-    int i;
+    int width, i, j;
+    u32 val;
 
     if (offset > wb_io_dev->io_len) {
         IO_DEV_DEBUG_VERBOSE("offset:0x%x, io len:0x%x, EOF.\n", offset, wb_io_dev->io_len);
@@ -247,8 +309,20 @@ static int io_dev_write_tmp(wb_io_dev_t *wb_io_dev, uint32_t offset, uint8_t *bu
         count = wb_io_dev->io_len - offset;
     }
     if (wb_io_dev->indirect_addr) {
-        for (i = 0; i < count; i++) {
-            io_indirect_addressing_write(wb_io_dev, offset + i, buf[i]);
+        width = wb_io_dev->wr_data_width;
+
+        if (offset % width) {
+            IO_DEV_DEBUG_VERBOSE("wr_data_width:%d, offset:0x%x, size %lu invalid.\n",
+                width, offset, count);
+            return -EINVAL;
+        }
+
+        for (i = 0; i < count; i += width) {
+            val = 0;
+            for (j = 0; (j < width) && (i + j < count); j++) {
+                val |= buf[i + j] << (8 * j);
+            }
+            io_indirect_addressing_write(wb_io_dev, i + offset, val);
         }
     } else {
         for (i = 0; i < count; i++) {
@@ -283,7 +357,7 @@ static ssize_t io_dev_write(struct file *file, const char __user *buf, size_t co
 
     mem_clear(buf_tmp, sizeof(buf_tmp));
     /* check flag is user spase or kernel spase */
-    if (flag == USER_SPASE) {
+    if (flag == USER_SPACE) {
         IO_DEV_DEBUG_VERBOSE("user space write, buf: %p, offset: %lld, write count %lu.\n",
             buf, *offset, count);
         if (copy_from_user(buf_tmp, buf, count)) {
@@ -312,7 +386,7 @@ static ssize_t io_dev_write_user(struct file *file, const char __user *buf, size
 
     IO_DEV_DEBUG_VERBOSE("io_dev_write_user, file: %p, count: %lu, offset: %lld\n",
         file, count, *offset);
-    ret = io_dev_write(file, buf, count, offset, USER_SPASE);
+    ret = io_dev_write(file, buf, count, offset, USER_SPACE);
     return ret;
 }
 
@@ -322,7 +396,7 @@ static ssize_t io_dev_write_iter(struct kiocb *iocb, struct iov_iter *from)
 
     IO_DEV_DEBUG_VERBOSE("io_dev_write_iter, file: %p, count: %lu, offset: %lld\n",
         iocb->ki_filp, from->count, iocb->ki_pos);
-    ret = io_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos, KERNEL_SPASE);
+    ret = io_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos, KERNEL_SPACE);
     return ret;
 }
 
@@ -455,7 +529,7 @@ int io_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t
 
     wb_io_dev = dev_match(path);
     if (wb_io_dev == NULL) {
-        IO_DEV_DEBUG_ERROR("i2c_dev match failed. dev path = %s", path);
+        IO_DEV_DEBUG_ERROR("io_dev match failed. dev path = %s", path);
         return -EINVAL;
     }
 
@@ -488,15 +562,22 @@ static int io_dev_probe(struct platform_device *pdev)
         ret += of_property_read_u32(pdev->dev.of_node, "io_base", &wb_io_dev->io_base);
         ret += of_property_read_u32(pdev->dev.of_node, "io_len", &wb_io_dev->io_len);
         if (of_property_read_bool(pdev->dev.of_node, "indirect_addr")) {
-
             wb_io_dev->indirect_addr = 1;
             ret += of_property_read_u32(pdev->dev.of_node, "wr_data", &wb_io_dev->wr_data);
             ret += of_property_read_u32(pdev->dev.of_node, "addr_low", &wb_io_dev->addr_low);
             ret += of_property_read_u32(pdev->dev.of_node, "addr_high", &wb_io_dev->addr_high);
             ret += of_property_read_u32(pdev->dev.of_node, "rd_data", &wb_io_dev->rd_data);
             ret += of_property_read_u32(pdev->dev.of_node, "opt_ctl", &wb_io_dev->opt_ctl);
-        } else {
 
+            if (of_property_read_u32(pdev->dev.of_node, "wr_data_width", &wb_io_dev->wr_data_width)) {
+                /* dts have no wr_data_width,set default 1 */
+                wb_io_dev->wr_data_width = IO_DATA_WIDTH_1;
+            }
+            if (of_property_read_u32(pdev->dev.of_node, "rd_data_width", &wb_io_dev->rd_data_width)) {
+                /* dts have no rd_data_width,set default 1 */
+                wb_io_dev->rd_data_width = IO_DATA_WIDTH_1;
+            }
+        } else {
             wb_io_dev->indirect_addr = 0;
         }
         if (ret != 0) {
@@ -515,10 +596,18 @@ static int io_dev_probe(struct platform_device *pdev)
         wb_io_dev->indirect_addr = io_dev_device->indirect_addr;
         if (wb_io_dev->indirect_addr == 1) {
             wb_io_dev->wr_data = io_dev_device->wr_data;
+            wb_io_dev->wr_data_width = io_dev_device->wr_data_width;
             wb_io_dev->addr_low = io_dev_device->addr_low;
             wb_io_dev->addr_high = io_dev_device->addr_high;
             wb_io_dev->rd_data = io_dev_device->rd_data;
+            wb_io_dev->rd_data_width = io_dev_device->rd_data_width;
             wb_io_dev->opt_ctl = io_dev_device->opt_ctl;
+            if (wb_io_dev->wr_data_width == 0) {
+                wb_io_dev->wr_data_width = IO_DATA_WIDTH_1;
+            }
+            if (wb_io_dev->rd_data_width == 0) {
+                wb_io_dev->rd_data_width = IO_DATA_WIDTH_1;
+            }
         }
     }
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.h
index 3a1a10f0f20c..61cba26a155c 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for wb_io_dev driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef __WB_IO_DEV_H__
 #define __WB_IO_DEV_H__
 #include <linux/string.h>
@@ -5,15 +25,21 @@
 #define mem_clear(data, size) memset((data), 0, (size))
 #define IO_DEV_NAME_MAX_LEN (64)
 
+#define IO_DATA_WIDTH_1         (1)
+#define IO_DATA_WIDTH_2         (2)
+#define IO_DATA_WIDTH_4         (4)
+
 typedef struct io_dev_device_s {
     char io_dev_name[IO_DEV_NAME_MAX_LEN];
     uint32_t io_base;
     uint32_t io_len;
     uint32_t indirect_addr;
     uint32_t wr_data;
+    uint32_t wr_data_width;
     uint32_t addr_low;
     uint32_t addr_high;
     uint32_t rd_data;
+    uint32_t rd_data_width;
     uint32_t opt_ctl;
     int device_flag;
 } io_dev_device_t;
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.c
index c079dc409696..45290ca843ea 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.c
@@ -1,7 +1,23 @@
 /*
- * wb_lpc_drv.c
- * ko to set lpc pcie config io addr and enable lpc
+ * An wb_lpc_drv driver for lpc device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
+
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/device.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.h
index 76e8c32c12e9..52c64b187bd5 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for wb_lpc_drv driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef __WB_LPC_DRV_H__
 #define __WB_LPC_DRV_H__
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c
index a94ae020a4b7..ba9cd692f8e8 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c
@@ -1,6 +1,7 @@
 /*
+ * An wb_mac_bsc driver for mac bsc function
  *
- * Copyright (c) 1998, 1999  Frodo Looijaard <frodol@dds.nl>
+ * Copyright (C) 2024 Micas Networks Inc.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mdio_gpio_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mdio_gpio_device.c
index e3198b378a20..65b8d2a42749 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mdio_gpio_device.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mdio_gpio_device.c
@@ -1,3 +1,23 @@
+/*
+ * An wb_mdio_gpio_device driver for mdio gpio device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c
index 093d070fd429..83904d7960e0 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c
@@ -1,7 +1,23 @@
 /*
- * wb_pcie_dev.c
- * ko to read/write pcie iomem and ioports through /dev/XXX device
+ * An wb_pcie_dev driver for pcie device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
+
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/device.h>
@@ -25,8 +41,14 @@
 #define PCIE_BUS_WIDTH_2         (2)
 #define PCIE_BUS_WIDTH_4         (4)
 
-#define KERNEL_SPASE         (0)
-#define USER_SPASE           (1)
+#define KERNEL_SPACE         (0)
+#define USER_SPACE           (1)
+
+#define SEARCH_DEV_DEFAULT       (0)
+#define SEARCH_DEV_BY_BRIDGE     (1)
+
+#define SECBUS                   (0x19)
+#define SUBBUS                   (0x1a)
 
 static int g_pcie_dev_debug = 0;
 static int g_pcie_dev_error = 0;
@@ -65,6 +87,10 @@ typedef struct wb_pci_dev_s {
     uint32_t bus_width;
     uint32_t check_pci_id;
     uint32_t pci_id;
+    uint32_t search_mode;
+    uint32_t bridge_bus;
+    uint32_t bridge_slot;
+    uint32_t bridge_fn;
     struct miscdevice misc;
     void (*setreg)(struct wb_pci_dev_s *wb_pci_dev, int reg, u32 value);
     u32 (*getreg)(struct wb_pci_dev_s *wb_pci_dev, int reg);
@@ -250,7 +276,7 @@ static ssize_t pci_dev_read(struct file *file, char __user *buf, size_t count, l
         return read_len;
     }
     /* check flag is user spase or kernel spase */
-    if (flag == USER_SPASE) {
+    if (flag == USER_SPACE) {
         PCIE_DEV_DEBUG_VERBOSE("user space read, buf: %p, offset: %lld, read count %lu.\n",
             buf, *offset, count);
         if (copy_to_user(buf, buf_tmp, read_len)) {
@@ -273,7 +299,7 @@ static ssize_t pci_dev_read_user(struct file *file, char __user *buf, size_t cou
 
     PCIE_DEV_DEBUG_VERBOSE("pci_dev_read_user, file: %p, count: %lu, offset: %lld\n",
         file, count, *offset);
-    ret = pci_dev_read(file, buf, count, offset, USER_SPASE);
+    ret = pci_dev_read(file, buf, count, offset, USER_SPACE);
     return ret;
 }
 
@@ -283,7 +309,7 @@ static ssize_t pci_dev_read_iter(struct kiocb *iocb, struct iov_iter *to)
 
     PCIE_DEV_DEBUG_VERBOSE("pci_dev_read_iter, file: %p, count: %lu, offset: %lld\n",
         iocb->ki_filp, to->count, iocb->ki_pos);
-    ret = pci_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos, KERNEL_SPASE);
+    ret = pci_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos, KERNEL_SPACE);
     return ret;
 }
 
@@ -347,7 +373,7 @@ static ssize_t pci_dev_write(struct file *file, const char __user *buf, size_t c
 
     mem_clear(buf_tmp, sizeof(buf_tmp));
     /* check flag is user spase or kernel spase */
-    if (flag == USER_SPASE) {
+    if (flag == USER_SPACE) {
         PCIE_DEV_DEBUG_VERBOSE("user space write, buf: %p, offset: %lld, write count %lu.\n",
             buf, *offset, count);
         if (copy_from_user(buf_tmp, buf, count)) {
@@ -376,7 +402,7 @@ static ssize_t pci_dev_write_user(struct file *file, const char __user *buf, siz
 
     PCIE_DEV_DEBUG_VERBOSE("pci_dev_write_user, file: %p, count: %lu, offset: %lld\n",
         file, count, *offset);
-    ret = pci_dev_write(file, buf, count, offset, USER_SPASE);
+    ret = pci_dev_write(file, buf, count, offset, USER_SPACE);
     return ret;
 }
 
@@ -386,7 +412,7 @@ static ssize_t pci_dev_write_iter(struct kiocb *iocb, struct iov_iter *from)
 
     PCIE_DEV_DEBUG_VERBOSE("pci_dev_write_iter, file: %p, count: %lu, offset: %lld\n",
         iocb->ki_filp, from->count, iocb->ki_pos);
-    ret = pci_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos, KERNEL_SPASE);
+    ret = pci_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos, KERNEL_SPACE);
     return ret;
 }
 
@@ -618,10 +644,11 @@ static int pci_dev_probe(struct platform_device *pdev)
     int ret, devfn;
     uint32_t pci_id;
     wb_pci_dev_t *wb_pci_dev;
-    struct pci_dev *pci_dev;
+    struct pci_dev *pci_dev, *pci_bridge_dev;
     struct miscdevice *misc;
     firmware_upg_t *firmware_upg;
     pci_dev_device_t *pci_dev_device;
+    u8 secbus_val, subbus_val;
 
     wb_pci_dev = devm_kzalloc(&pdev->dev, sizeof(wb_pci_dev_t), GFP_KERNEL);
     if (!wb_pci_dev) {
@@ -636,7 +663,6 @@ static int pci_dev_probe(struct platform_device *pdev)
         ret = 0;
         ret += of_property_read_string(pdev->dev.of_node, "pci_dev_name", &wb_pci_dev->name);
         ret += of_property_read_u32(pdev->dev.of_node, "pci_domain", &wb_pci_dev->domain);
-        ret += of_property_read_u32(pdev->dev.of_node, "pci_bus", &wb_pci_dev->bus);
         ret += of_property_read_u32(pdev->dev.of_node, "pci_slot", &wb_pci_dev->slot);
         ret += of_property_read_u32(pdev->dev.of_node, "pci_fn", &wb_pci_dev->fn);
         ret += of_property_read_u32(pdev->dev.of_node, "pci_bar", &wb_pci_dev->bar);
@@ -647,6 +673,30 @@ static int pci_dev_probe(struct platform_device *pdev)
             return -ENXIO;
         }
 
+        wb_pci_dev->search_mode = SEARCH_DEV_DEFAULT;
+        of_property_read_u32(pdev->dev.of_node, "search_mode", &wb_pci_dev->search_mode);
+        ret = 0;
+        if (wb_pci_dev->search_mode == SEARCH_DEV_BY_BRIDGE) {
+            ret += of_property_read_u32(pdev->dev.of_node, "bridge_bus", &wb_pci_dev->bridge_bus);
+            ret += of_property_read_u32(pdev->dev.of_node, "bridge_slot", &wb_pci_dev->bridge_slot);
+            ret += of_property_read_u32(pdev->dev.of_node, "bridge_fn", &wb_pci_dev->bridge_fn);
+            if (ret != 0) {
+                PCIE_DEV_DEBUG_VERBOSE("get pci bridge config fail, ret:%d.\n", ret);
+                return -ENXIO;
+            } else {
+                PCIE_DEV_DEBUG_VERBOSE("bridge_bus:0x%02x, bridge_slot:0x%02x, bridge_fn:0x%02x.\n",
+                    wb_pci_dev->bridge_bus, wb_pci_dev->bridge_slot, wb_pci_dev->bridge_fn);
+            }
+        } else {
+            ret += of_property_read_u32(pdev->dev.of_node, "pci_bus", &wb_pci_dev->bus);
+            if (ret != 0) {
+                PCIE_DEV_DEBUG_VERBOSE("get pci bus config fail, ret:%d.\n", ret);
+                return -ENXIO;
+            } else {
+                PCIE_DEV_DEBUG_VERBOSE("get pci_bus:0x%02x.\n", wb_pci_dev->bus);
+            }
+        }
+
         ret = 0;
         ret += of_property_read_u32(pdev->dev.of_node, "upg_ctrl_base", &firmware_upg->upg_ctrl_base);
         ret += of_property_read_u32(pdev->dev.of_node, "upg_flash_base", &firmware_upg->upg_flash_base);
@@ -674,31 +724,79 @@ static int pci_dev_probe(struct platform_device *pdev)
         pci_dev_device = pdev->dev.platform_data;
         wb_pci_dev->name = pci_dev_device->pci_dev_name;
         wb_pci_dev->domain = pci_dev_device->pci_domain;
-        wb_pci_dev->bus = pci_dev_device->pci_bus;
         wb_pci_dev->slot = pci_dev_device->pci_slot;
         wb_pci_dev->fn = pci_dev_device->pci_fn;
         wb_pci_dev->bar = pci_dev_device->pci_bar;
         wb_pci_dev->bus_width = pci_dev_device->bus_width;
         wb_pci_dev->check_pci_id = pci_dev_device->check_pci_id;
-        wb_pci_dev->pci_id = pci_dev_device->pci_id;
+        wb_pci_dev->search_mode = pci_dev_device->search_mode;
         firmware_upg->upg_ctrl_base = pci_dev_device->upg_ctrl_base;
         firmware_upg->upg_flash_base = pci_dev_device->upg_flash_base;
+        if (wb_pci_dev->search_mode == SEARCH_DEV_BY_BRIDGE) {
+            PCIE_DEV_DEBUG_VERBOSE("bridge_bus:0x%02x, bridge_slot:0x%02x, bridge_fn:0x%02x.\n",
+                    wb_pci_dev->bridge_bus, wb_pci_dev->bridge_slot, wb_pci_dev->bridge_fn);
+        }
         PCIE_DEV_DEBUG_VERBOSE("upg_ctrl_base:0x%04x, upg_flash_base:0x%02x.\n",
             firmware_upg->upg_ctrl_base, firmware_upg->upg_flash_base);
     }
 
-    PCIE_DEV_DEBUG_VERBOSE("name:%s, domain:0x%04x, bus:0x%02x, slot:0x%02x, fn:%u, bar:%u, bus_width:%d.\n",
+    PCIE_DEV_DEBUG_VERBOSE("name:%s, domain:0x%04x, bus:0x%02x, slot:0x%02x, fn:%u, bar:%u, bus_width:%d, search_mode:%d \n",
         wb_pci_dev->name, wb_pci_dev->domain, wb_pci_dev->bus, wb_pci_dev->slot, wb_pci_dev->fn,
-        wb_pci_dev->bar, wb_pci_dev->bus_width);
+        wb_pci_dev->bar, wb_pci_dev->bus_width, wb_pci_dev->search_mode);
 
-    devfn = PCI_DEVFN(wb_pci_dev->slot, wb_pci_dev->fn);
-    pci_dev = pci_get_domain_bus_and_slot(wb_pci_dev->domain, wb_pci_dev->bus, devfn);
-    if (pci_dev == NULL) {
-        dev_err(&pdev->dev, "Failed to find pci_dev, domain:0x%04x, bus:0x%02x, devfn:0x%x\n",
-            wb_pci_dev->domain, wb_pci_dev->bus, devfn);
-        return -ENXIO;
+    if (wb_pci_dev->search_mode != SEARCH_DEV_DEFAULT && wb_pci_dev->search_mode != SEARCH_DEV_BY_BRIDGE) {
+        dev_err(&pdev->dev, "Error: unsupported search_mode (%d).\n", wb_pci_dev->search_mode);
+        return -EINVAL;
+    }
+
+    if (wb_pci_dev->search_mode == SEARCH_DEV_DEFAULT) {
+        wb_pci_dev->bus = pci_dev_device->pci_bus;
+        devfn = PCI_DEVFN(wb_pci_dev->slot, wb_pci_dev->fn);
+        pci_dev = pci_get_domain_bus_and_slot(wb_pci_dev->domain, wb_pci_dev->bus, devfn);
+        if (pci_dev == NULL) {
+            dev_err(&pdev->dev, "Failed to find pci_dev, domain:0x%04x, bus:0x%02x, devfn:0x%x\n",
+                wb_pci_dev->domain, wb_pci_dev->bus, devfn);
+            return -ENXIO;
+        }
+    } else { /* search_mode = SEARCH_DEV_BY_BRIDGE */
+        wb_pci_dev->bridge_bus = pci_dev_device->bridge_bus;
+        wb_pci_dev->bridge_slot = pci_dev_device->bridge_slot;
+        wb_pci_dev->bridge_fn = pci_dev_device->bridge_fn;
+        devfn = PCI_DEVFN(wb_pci_dev->bridge_slot, wb_pci_dev->bridge_fn);
+        pci_bridge_dev = pci_get_domain_bus_and_slot(wb_pci_dev->domain, wb_pci_dev->bridge_bus, devfn);
+        if (pci_bridge_dev == NULL) {
+            dev_err(&pdev->dev, "Failed to find pci_bridge_dev, domain:0x%04x, bus:0x%02x, devfn:0x%x\n",
+                wb_pci_dev->domain, wb_pci_dev->bridge_bus, devfn);
+            return -ENXIO;
+        }
+
+        ret = pci_read_config_byte(pci_bridge_dev, SECBUS, &secbus_val);
+        if (ret) {
+            PCIE_DEV_DEBUG_ERROR("pci_read_config_dword failed reg:%02x ret %d.\n", SECBUS, ret);
+            return -EIO;
+        }
+        ret = pci_read_config_byte(pci_bridge_dev, SUBBUS, &subbus_val);
+        if (ret) {
+            PCIE_DEV_DEBUG_ERROR("pci_read_config_dword failed reg:%02x ret %d.\n", SUBBUS, ret);
+            return -EIO;
+        }
+        if (secbus_val != subbus_val) {
+            /* If the SECBUS register value is different from the SUBBUS register value, a multistage PCIE bridge is available*/
+            PCIE_DEV_DEBUG_ERROR("not support ,secbus_val not equal subbus_val  secbus_val:%02x secbus_val:%02x.\n", secbus_val, subbus_val);
+            return -EIO;
+        }
+        wb_pci_dev->bus = secbus_val;
+        devfn = PCI_DEVFN(wb_pci_dev->slot, wb_pci_dev->fn);
+        pci_dev = pci_get_domain_bus_and_slot(wb_pci_dev->domain, wb_pci_dev->bus, devfn);
+        if (pci_dev == NULL) {
+            dev_err(&pdev->dev, "Failed to find pci_dev, domain:0x%04x, bus:0x%02x, devfn:0x%x\n",
+                wb_pci_dev->domain, wb_pci_dev->bus, devfn);
+            return -ENXIO;
+        }
     }
+
     if (wb_pci_dev->check_pci_id == 1) {
+        wb_pci_dev->pci_id = pci_dev_device->pci_id;
         pci_id = (pci_dev->vendor << 16) | pci_dev->device;
         if (wb_pci_dev->pci_id != pci_id) {
             dev_err(&pdev->dev, "Failed to check pci id, except: 0x%x, really: 0x%x\n",
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.h
index 33da8d475f91..ef390a1585f3 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for wb_pcie_dev driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef __WB_PCIE_DEV_H__
 #define __WB_PCIE_DEV_H__
 #include <linux/string.h>
@@ -23,6 +43,10 @@ typedef struct pci_dev_device_s {
     int upg_ctrl_base;
     int upg_flash_base;
     int device_flag;
+    int search_mode;
+    int bridge_bus;
+    int bridge_slot;
+    int bridge_fn;
 } pci_dev_device_t;
 
 #endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.c
index 092c99da2ad8..678a48483bd7 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.c
@@ -1,3 +1,23 @@
+/*
+ * An wb_platform_i2c_dev driver for i2c platform device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/device.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.h
index b5158c9fec57..f40282176484 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for wb_platform_i2c_dev driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef __WB_PLATFORM_I2C_DEV_H__
 #define __WB_PLATFORM_I2C_DEV_H__
 #include <linux/string.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.c
index d70424afb0e7..dd13fe9a991b 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.c
@@ -1,6 +1,21 @@
 /*
- * wb_spi_dev.c
- * ko to read/write spi device through /dev/XXX device
+ * An wb_spi_dev driver for spi device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <linux/module.h>
@@ -32,8 +47,8 @@
 #define OP_READ             (0x3)
 #define OP_WRITE            (0x2)
 
-#define KERNEL_SPASE         (0)
-#define USER_SPASE           (1)
+#define KERNEL_SPACE         (0)
+#define USER_SPACE           (1)
 
 static int g_spi_dev_debug = 0;
 static int g_spi_dev_error = 0;
@@ -346,7 +361,7 @@ static ssize_t spi_dev_read(struct file *file, char __user *buf, size_t count, l
     }
 
     /* check flag is user spase or kernel spase */
-    if (flag == USER_SPASE) {
+    if (flag == USER_SPACE) {
         SPI_DEV_DEBUG("user space read, buf: %p, offset: %lld, read count %lu.\n",
             buf, *offset, count);
         if (copy_to_user(buf, val, read_len)) {
@@ -370,7 +385,7 @@ static ssize_t spi_dev_read_user(struct file *file, char __user *buf, size_t cou
 
     SPI_DEV_DEBUG("spi_dev_read_user, file: %p, count: %lu, offset: %lld\n",
         file, count, *offset);
-    ret = spi_dev_read(file, buf, count, offset, USER_SPASE);
+    ret = spi_dev_read(file, buf, count, offset, USER_SPACE);
     return ret;
 }
 
@@ -380,7 +395,7 @@ static ssize_t spi_dev_read_iter(struct kiocb *iocb, struct iov_iter *to)
 
     SPI_DEV_DEBUG("spi_dev_read_iter, file: %p, count: %lu, offset: %lld\n",
         iocb->ki_filp, to->count, iocb->ki_pos);
-    ret = spi_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos, KERNEL_SPASE);
+    ret = spi_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos, KERNEL_SPACE);
     return ret;
 }
 
@@ -409,7 +424,7 @@ static ssize_t spi_dev_write(struct file *file, const char __user *buf,
 
     mem_clear(val, sizeof(val));
     /* check flag is user spase or kernel spase */
-    if (flag == USER_SPASE) {
+    if (flag == USER_SPACE) {
         SPI_DEV_DEBUG("user space write, buf: %p, offset: %lld, write count %lu.\n",
             buf, *offset, count);
         if (copy_from_user(val, buf, count)) {
@@ -439,7 +454,7 @@ static ssize_t spi_dev_write_user(struct file *file, const char __user *buf, siz
 
     SPI_DEV_DEBUG("spi_dev_write_user, file: %p, count: %lu, offset: %lld\n",
         file, count, *offset);
-    ret = spi_dev_write(file, buf, count, offset, USER_SPASE);
+    ret = spi_dev_write(file, buf, count, offset, USER_SPACE);
     return ret;
 }
 
@@ -449,7 +464,7 @@ static ssize_t spi_dev_write_iter(struct kiocb *iocb, struct iov_iter *from)
 
     SPI_DEV_DEBUG("spi_dev_write_iter, file: %p, count: %lu, offset: %lld\n",
         iocb->ki_filp, from->count, iocb->ki_pos);
-    ret = spi_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos, KERNEL_SPASE);
+    ret = spi_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos, KERNEL_SPACE);
     return ret;
 }
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.h
index fed5237e3860..03ff8f42f7ec 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for wb_spi_dev driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef __WB_SPI_DEV_H__
 #define __WB_SPI_DEV_H__
 #include <linux/string.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_gpio_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_gpio_device.c
index b073dac08a8a..61551a33d3c1 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_gpio_device.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_gpio_device.c
@@ -1,3 +1,23 @@
+/*
+ * An wb_spi_gpio_device driver for spi gpio device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/gpio.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.c
index 5cf3538d88fa..f87dd63ecae4 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.c
@@ -1,6 +1,21 @@
 /*
- * wb_spi_ocores.c
- * ko to create ocores spi adapter
+ * An wb_spi_ocores driver for spi ocores adapter device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <linux/clk.h>
@@ -109,6 +124,7 @@ struct spioc {
     uint32_t num_chipselect;
     uint32_t freq;
     uint32_t big_endian;
+    uint32_t irq_flag;
     struct device *dev;
     int transfer_busy_flag;
 };
@@ -870,6 +886,11 @@ static int ocores_spi_config_init(struct spioc *spioc)
             ret = -ENXIO;
             return ret;
         }
+        ret = of_property_read_u32(dev->of_node, "irq_flag", &spioc->irq_flag);
+        if (ret != 0) {
+            spioc->irq_flag = 0;
+            ret = 0;
+        }
     } else {
         if (spioc->dev->platform_data == NULL) {
             SPI_OC_ERROR("platform data config error.\n");
@@ -886,12 +907,13 @@ static int ocores_spi_config_init(struct spioc *spioc)
         spioc->freq = spi_ocores_device->clock_frequency;
         spioc->reg_access_mode = spi_ocores_device->reg_access_mode;
         spioc->num_chipselect = spi_ocores_device->num_chipselect;
+        spioc->irq_flag = spi_ocores_device->irq_flag;
     }
 
     SPI_OC_VERBOSE("name:%s, base:0x%x, reg_shift:0x%x, io_width:0x%x, clock-frequency:0x%x.\n",
         spioc->dev_name, spioc->base_addr, spioc->reg_shift, spioc->reg_io_width, spioc->freq);
-    SPI_OC_VERBOSE("reg access mode:%u, num_chipselect:%u.\n",
-        spioc->reg_access_mode, spioc->num_chipselect);
+    SPI_OC_VERBOSE("reg access mode:%u, num_chipselect:%u, irq_flag: %u\n",
+        spioc->reg_access_mode, spioc->num_chipselect, spioc->irq_flag);
     return ret;
 }
 
@@ -921,7 +943,6 @@ static int spioc_probe(struct platform_device *pdev)
 
     if (spioc->dev->of_node) {
         if (of_property_read_u32(spioc->dev->of_node, "big_endian", &spioc->big_endian)) {
-
             be = 0;
         } else {
             be = spioc->big_endian;
@@ -974,17 +995,24 @@ static int spioc_probe(struct platform_device *pdev)
     spioc->bitbang.chipselect = spioc_chipselect;
     spioc->bitbang.txrx_bufs = spioc_spi_txrx_bufs;
 
-    /* gooooohi need revision */
-    spioc->irq = platform_get_irq(pdev, 0);
-    if (spioc->irq >= 0) {
-        SPI_OC_VERBOSE("spi oc use irq, irq number:%d.\n", spioc->irq);
-        init_completion(&spioc->done);
-        ret = devm_request_irq(&pdev->dev, spioc->irq, spioc_spi_irq, 0,
-                               pdev->name, spioc);
-        if (ret) {
-            dev_err(spioc->dev, "Failed to request irq:%d.\n", spioc->irq);
+    if (spioc->irq_flag == 1) {
+        spioc->irq = platform_get_irq(pdev, 0);
+        if (spioc->irq >= 0) {
+            SPI_OC_VERBOSE("spi oc use irq, irq number:%d.\n", spioc->irq);
+            init_completion(&spioc->done);
+            ret = devm_request_irq(&pdev->dev, spioc->irq, spioc_spi_irq, 0,
+                                   pdev->name, spioc);
+            if (ret) {
+                dev_err(spioc->dev, "Failed to request irq:%d.\n", spioc->irq);
+                goto free;
+            }
+        } else {
+            ret = spioc->irq;
+            dev_err(spioc->dev, "Failed to get irq, ret: %d.\n", ret);
             goto free;
         }
+    } else {
+        spioc->irq = -1;
     }
 
     ret = spi_bitbang_start(&spioc->bitbang);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.h
index 647ff0c5f9cf..e94a770552ec 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for wb_spi_ocores driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef __WB_SPI_OCORES_H__
 #define __WB_SPI_OCORES_H__
 #include <linux/string.h>
@@ -15,6 +35,7 @@ typedef struct spi_ocores_device_s {
     uint32_t reg_io_width;
     uint32_t clock_frequency;
     uint32_t num_chipselect;
+    uint32_t irq_flag;
     int device_flag;
 } spi_ocores_device_t;
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_ucd9081.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_ucd9081.c
new file mode 100644
index 000000000000..2fae45c72ae6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_ucd9081.c
@@ -0,0 +1,356 @@
+/*
+ * An wb_ucd9081 driver for ucd9081 adapter device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+#include <linux/delay.h>
+#include <linux/of.h>
+
+#define WB_UCD9081_RAIL1H               (0x00)    /* Channel 1 voltage address, high 8 bits */
+#define WB_UCD9081_RAIL1L               (0x01)    /* Channel 1 voltage address, low 8 bits */
+#define WB_UCD9081_RAIL2H               (0x02)    /* Channel 2 voltage address, high 8 bits */
+#define WB_UCD9081_RAIL2L               (0x03)    /* Channel 2 voltage address, low 8 bits */
+#define WB_UCD9081_RAIL3H               (0x04)    /* Channel 3 voltage address, high 8 bits */
+#define WB_UCD9081_RAIL3L               (0x05)    /* Channel 3 voltage address, low 8 bits */
+#define WB_UCD9081_RAIL4H               (0x06)    /* Channel 4 voltage address, high 8 bits */
+#define WB_UCD9081_RAIL4L               (0x07)    /* Channel 4 voltage address, low 8 bits */
+#define WB_UCD9081_RAIL5H               (0x08)    /* Channel 5 voltage address, high 8 bits */
+#define WB_UCD9081_RAIL5L               (0x09)    /* Channel 5 voltage address, low 8 bits */
+#define WB_UCD9081_RAIL6H               (0x0a)    /* Channel 6 voltage address, high 8 bits */
+#define WB_UCD9081_RAIL6L               (0x0b)    /* Channel 6 voltage address, low 8 bits */
+#define WB_UCD9081_RAIL7H               (0x0c)    /* Channel 7 voltage address, high 8 bits */
+#define WB_UCD9081_RAIL7L               (0x0d)    /* Channel 7 voltage address, low 8 bits */
+#define WB_UCD9081_WADDR1               (0x30)    /* UCD9081 High address register write address, low 8 bits */
+#define WB_UCD9081_WADDR2               (0x31)    /* UCD9081 High address register write address, low 8 bits */
+#define WB_UCD9081_WDATA1               (0x32)    /* Write WADDR data,low 8 bits */
+#define WB_UCD9081_WDATA2               (0x33)    /* Write WADDR data,low 8 bits */
+
+#define WB_UCD9081_FLASHLOCK_REG        (0x2E)
+#define WB_UCD9081_FLASHUNLOCK_VAL      (0x02)
+#define WB_UCD9081_FLASHLOCK_VAL        (0x0)
+
+#define WB_UCD9081_FLASHLOCK_REFERENCESELECT_REG_H        (0xE1)
+#define WB_UCD9081_FLASHLOCK_REFERENCESELECT_REG_L        (0x86)
+
+/* Voltage definition */
+#define WB_UCD9081_SELREF_OFFSET    (13)
+#define WB_UCD9081_SELREF_0         (0x0)   /* External reference selected (VCC 3.3V) */
+#define WB_UCD9081_SELREF_1         (0x1)   /* Internal reference selected (VCC 2.5V) */
+#define WB_UCD9081_VREF_EXTERNAL    (3300)  /* 3.3V */
+#define WB_UCD9081_VREF_INTERNAL    (2500)  /* 2.5V */
+#define WB_UCD9081_VOLTAGE_MASK     (0x3ff)
+#define WB_UCD9081_VOLTAGE_DIVIDE   (1024)
+
+#define WB_I2C_RETRY_TIME               (10)
+#define WB_I2C_RETRY_SLEEP_TIME         (10000)   /* 10ms */
+
+static int g_wb_ucd9081_debug = 0;
+static int g_wb_ucd9081_error = 0;
+
+module_param(g_wb_ucd9081_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_ucd9081_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_UCD9081_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_ucd9081_debug) { \
+        printk(KERN_INFO "[WB_UCD9081][VER][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_UCD9081_ERROR(fmt, args...) do {                                        \
+    if (g_wb_ucd9081_error) { \
+        printk(KERN_ERR "[WB_UCD9081][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct ucd9081_data {
+    struct i2c_client   *client;
+    struct device       *hwmon_dev;
+    struct mutex        update_lock;
+    u32                 vref;               /* Voltage unit */
+};
+
+static s32 wb_i2c_smbus_write_byte_data(const struct i2c_client *client, u8 command, u8 value)
+{
+    int i;
+    s32 ret;
+
+    for (i = 0; i < WB_I2C_RETRY_TIME; i++) {
+        ret = i2c_smbus_write_byte_data(client, command, value);
+        if (ret >= 0) {
+            return ret;
+        }
+        usleep_range(WB_I2C_RETRY_SLEEP_TIME, WB_I2C_RETRY_SLEEP_TIME + 1);
+    }
+    return ret;
+}
+
+static s32 wb_i2c_smbus_read_word_data(const struct i2c_client *client, u8 command)
+{
+    int i;
+    s32 ret;
+
+    for (i = 0; i < WB_I2C_RETRY_TIME; i++) {
+        ret = i2c_smbus_read_word_data(client, command);
+        if (ret >= 0) {
+            return ret;
+        }
+        usleep_range(WB_I2C_RETRY_SLEEP_TIME, WB_I2C_RETRY_SLEEP_TIME + 1);
+    }
+    return ret;
+}
+
+static s32 wb_i2c_smbus_write_word_data(const struct i2c_client *client, u8 command,
+               u16 value)
+{
+    int i;
+    s32 ret;
+
+    for (i = 0; i < WB_I2C_RETRY_TIME; i++) {
+        ret = i2c_smbus_write_word_data(client, command, value);
+        if (ret >= 0) {
+            return ret;
+        }
+        usleep_range(WB_I2C_RETRY_SLEEP_TIME, WB_I2C_RETRY_SLEEP_TIME + 1);
+    }
+    return ret;
+}
+
+/* Get 9081 voltage units */
+static int ucd9081_get_vref(struct i2c_client *client) 
+{
+    int ret;
+    uint16_t wr_val;
+    uint16_t ori_addr;
+    uint16_t reference_select_val;
+    struct ucd9081_data *data;
+
+    data = i2c_get_clientdata(client);
+    WB_UCD9081_VERBOSE("%d-%04x: enter ucd9081_get_vref\n", client->adapter->nr,
+        client->addr);
+    
+    mutex_lock(&data->update_lock);
+    /* 0.Backup original WADDR */
+    ori_addr = wb_i2c_smbus_read_word_data(client, WB_UCD9081_WADDR1);
+    if (ori_addr < 0) {
+        WB_UCD9081_ERROR("%d-%04x: read ucd9081 origin addr failed, ret: %d\n", client->adapter->nr,
+            client->addr, ori_addr);
+        ret = ori_addr;
+        goto error;
+    }
+    WB_UCD9081_VERBOSE("%d-%04x: save ucd9081 waddr success, ori_addr: 0x%x\n",
+            client->adapter->nr, client->addr, ori_addr);
+
+    /* 1.Unlock */
+    ret = wb_i2c_smbus_write_byte_data(client, WB_UCD9081_FLASHLOCK_REG, WB_UCD9081_FLASHUNLOCK_VAL);
+    if (ret) {
+        WB_UCD9081_ERROR("%d-%04x: ucd9081 unlock failed\n", client->adapter->nr,
+            client->addr);
+        goto error;
+    }
+
+    /* 2. Write Voltage configuration flash register address 0xE186 address to WADDR */
+    wr_val = (WB_UCD9081_FLASHLOCK_REFERENCESELECT_REG_H << 8) | WB_UCD9081_FLASHLOCK_REFERENCESELECT_REG_L;
+    ret = wb_i2c_smbus_write_word_data(client, WB_UCD9081_WADDR1, wr_val);
+    if (ret) {
+        WB_UCD9081_ERROR("%d-%04x: write ucd9081 waddr failed\n", client->adapter->nr,
+            client->addr);
+        goto error;
+    }
+
+    /* 3. The voltage configuration flash register value is read through WDATA*/
+    reference_select_val = wb_i2c_smbus_read_word_data(client, WB_UCD9081_WDATA1);
+    if (reference_select_val < 0) {
+        WB_UCD9081_ERROR("%d-%04x: read ucd9081 wdata failed, ret: %d\n", client->adapter->nr,
+            client->addr, ret);
+        ret = reference_select_val;
+        goto error;
+    }
+
+    /* 4.LOCK */
+    ret = wb_i2c_smbus_write_byte_data(client, WB_UCD9081_FLASHLOCK_REG, WB_UCD9081_FLASHLOCK_VAL);
+    if (ret) {
+        WB_UCD9081_ERROR("%d-%04x: ucd9081 flash lock failed\n", client->adapter->nr,
+            client->addr);
+        goto error;
+    }
+
+    /* 5.Restore the original WADDR address */
+    ret = wb_i2c_smbus_write_word_data(client, WB_UCD9081_WADDR1, ori_addr);
+    if (ret) {
+        WB_UCD9081_ERROR("%d-%04x: recover ucd9081 waddr failed\n", client->adapter->nr,
+            client->addr);
+        goto error;
+    }
+
+    /* 5.Calculated voltage unit*/
+    WB_UCD9081_VERBOSE("%d-%04x: ucd9081 reference_select_val: 0x%x\n",
+                client->adapter->nr, client->addr, reference_select_val);
+    if ((reference_select_val >> WB_UCD9081_SELREF_OFFSET) == WB_UCD9081_SELREF_0) {
+        data->vref = WB_UCD9081_VREF_EXTERNAL;
+    } else {
+        data->vref = WB_UCD9081_VREF_INTERNAL;
+    }
+    
+    mutex_unlock(&data->update_lock);
+    WB_UCD9081_VERBOSE("%d-%04x: ucd9081 use vref: %d\n",
+                client->adapter->nr, client->addr, data->vref);
+    return 0;
+
+error:
+    mutex_unlock(&data->update_lock);
+    return ret;
+}
+
+static ssize_t ucd9081_voltage_show(struct device *dev, struct device_attribute *da, char *buf)
+{
+    int ret;
+    struct ucd9081_data *data;
+    struct i2c_client *client;
+    uint32_t index, channel, value;
+    long voltage;
+
+    data = dev_get_drvdata(dev);
+    client = data->client;
+    index = to_sensor_dev_attr_2(da)->index;
+    channel = to_sensor_dev_attr_2(da)->nr;
+    ret = 0;
+
+    mutex_lock(&data->update_lock);
+    value = wb_i2c_smbus_read_word_data(client, index);
+    if (value < 0) {
+        WB_UCD9081_ERROR("%d-%04x: read ucd9081 channel%d voltage reg failed, reg: 0x%x ret: %d\n", client->adapter->nr,
+            client->addr, channel, index, ret);
+        ret = value;
+        goto error;
+    }
+    /* Terminal conversion */
+    value = ((value & 0xff00) >> 8) | ((value & 0xff) << 8);
+    WB_UCD9081_VERBOSE("%d-%04x: read ucd9081 channel%d voltage success, reg: 0x%x, value: 0x%x\n",
+            client->adapter->nr, client->addr, channel, index, value);
+
+    voltage = ((value & WB_UCD9081_VOLTAGE_MASK) * data->vref) / WB_UCD9081_VOLTAGE_DIVIDE;
+    WB_UCD9081_VERBOSE("%d-%04x: ucd9081 channel%d voltage: %ld\n", client->adapter->nr, client->addr, channel, voltage);
+    mutex_unlock(&data->update_lock);
+    return snprintf(buf, PAGE_SIZE, "%ld\n", voltage);
+error:
+    mutex_unlock(&data->update_lock);
+    return ret;
+}
+
+static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, ucd9081_voltage_show, NULL, 1, WB_UCD9081_RAIL1H);
+static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, ucd9081_voltage_show, NULL, 2, WB_UCD9081_RAIL2H);
+static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, ucd9081_voltage_show, NULL, 3, WB_UCD9081_RAIL3H);
+static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, ucd9081_voltage_show, NULL, 4, WB_UCD9081_RAIL4H);
+static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, ucd9081_voltage_show, NULL, 5, WB_UCD9081_RAIL5H);
+static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, ucd9081_voltage_show, NULL, 6, WB_UCD9081_RAIL6H);
+static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, ucd9081_voltage_show, NULL, 7, WB_UCD9081_RAIL7H);
+
+static struct attribute *ucd9081_hwmon_attrs[] = {
+    &sensor_dev_attr_in1_input.dev_attr.attr,
+    &sensor_dev_attr_in2_input.dev_attr.attr,
+    &sensor_dev_attr_in3_input.dev_attr.attr,
+    &sensor_dev_attr_in4_input.dev_attr.attr,
+    &sensor_dev_attr_in5_input.dev_attr.attr,
+    &sensor_dev_attr_in6_input.dev_attr.attr,
+    &sensor_dev_attr_in7_input.dev_attr.attr,
+    NULL
+};
+ATTRIBUTE_GROUPS(ucd9081_hwmon);
+
+static int ucd9081_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+    int ret;
+    struct ucd9081_data *data;
+
+    WB_UCD9081_VERBOSE("bus: %d, addr: 0x%02x do probe.\n", client->adapter->nr, client->addr);
+    data = devm_kzalloc(&client->dev, sizeof(struct ucd9081_data), GFP_KERNEL);
+    if (!data) {
+        dev_err(&client->dev, "devm_kzalloc failed.\n");
+        return -ENOMEM;
+    }
+
+    data->client = client;
+    i2c_set_clientdata(client, data);
+    mutex_init(&data->update_lock);
+
+    ret = ucd9081_get_vref(client);
+    if (ret != 0) {
+        dev_err(&client->dev, "get ucd9081 vref failed, ret: %d\n", ret);
+        return ret;
+    }
+
+    data->hwmon_dev = hwmon_device_register_with_groups(&client->dev, client->name, data, ucd9081_hwmon_groups);
+    if (IS_ERR(data->hwmon_dev)) {
+        ret = PTR_ERR(data->hwmon_dev);
+        dev_err(&client->dev, "Failed to register ucd9081 hwmon device, ret: %d\n", ret);
+        return ret;
+    }
+    dev_info(&client->dev, "ucd9081 (addr:0x%x, nr:%d) probe success\n", client->addr, client->adapter->nr);
+    return 0;
+}
+
+static void ucd9081_remove(struct i2c_client *client)
+{
+    struct ucd9081_data *data;
+
+    data = i2c_get_clientdata(client);
+    dev_info(&client->dev, "ucd9081 do remove\n");
+
+    hwmon_device_unregister(data->hwmon_dev);
+    return;
+}
+
+static const struct i2c_device_id ucd9081_id[] = {
+    {"wb_ucd9081", 0},
+    {}
+};
+MODULE_DEVICE_TABLE(i2c, ucd9081_id);
+
+static const struct of_device_id ucd9081_dev_of_match[] = {
+    { .compatible = "ti,wb_ucd9081" },
+    { },
+};
+MODULE_DEVICE_TABLE(of, ucd9081_dev_of_match);
+
+static struct i2c_driver ucd9081_driver = {
+    .class      = I2C_CLASS_HWMON,
+    .driver = {
+        .name   = "wb_ucd9081",
+        .of_match_table = ucd9081_dev_of_match,
+    },
+    .probe      = ucd9081_probe,
+    .remove     = ucd9081_remove,
+    .id_table = ucd9081_id,
+};
+
+module_i2c_driver(ucd9081_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("ucd9081 Driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_uio_irq.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_uio_irq.c
index da2b582443b8..835386127fb0 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_uio_irq.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_uio_irq.c
@@ -1,3 +1,23 @@
+/*
+ * An wb_uio_irq driver for uio irq device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/uio_driver.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c
index aa50ef848dde..899886a0390b 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c
@@ -1,6 +1,21 @@
 /*
- * wb_wdt.c
- * ko for watchdog function
+ * An wb_wdt driver for watchdog device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <linux/err.h>
@@ -69,8 +84,8 @@ enum {
 
 enum {
     WATCHDOG_DEVICE_TYPE    = 0,
-    HRTIMER_TYPE,
-    THREAD_TYPE,
+    HRTIMER_TYPE            = 1,
+    THREAD_TYPE             = 2,
 };
 
 typedef struct wb_wdt_priv_s {
@@ -427,8 +442,8 @@ static int wdt_thread_timer(void *data)
     wb_wdt_priv_t *priv = data;
 
     while (!kthread_should_stop()) {
-        schedule_timeout_uninterruptible(msecs_to_jiffies(priv->feed_time));
         wdt_hwping(priv);
+        schedule_timeout_uninterruptible(msecs_to_jiffies(priv->feed_time));
     }
     return 0;
 }
@@ -673,6 +688,32 @@ static const struct watchdog_ops wb_wdt_ops = {
     .get_timeleft  = wb_wdt_get_timeleft,
 };
 
+static int wb_wdt_register_device(wb_wdt_priv_t *priv)
+{
+    int ret;
+
+    watchdog_set_drvdata(&priv->wdd, priv);
+
+    priv->wdd.info         = &wb_wdt_ident;
+    priv->wdd.ops          = &wb_wdt_ops;
+    priv->wdd.bootstatus   = 0;
+    priv->wdd.timeout      = priv->hw_margin / MS_TO_S;
+    priv->wdd.min_timeout  = priv->timer_accuracy / MS_TO_S;
+    priv->wdd.max_timeout  = priv->timer_accuracy * MAX_REG_VAL / MS_TO_S;
+    priv->wdd.parent       = priv->dev;
+
+    watchdog_stop_on_reboot(&priv->wdd);
+
+    ret = devm_watchdog_register_device(priv->dev, &priv->wdd);
+    if (ret != 0) {
+        dev_err(priv->dev, "cannot register watchdog device (err=%d)\n", ret);
+        return -ENXIO;
+    }
+
+    return 0;
+}
+
+
 static int watchdog_device_cfg(wb_wdt_priv_t *priv)
 {
     int ret;
@@ -712,24 +753,6 @@ static int watchdog_device_cfg(wb_wdt_priv_t *priv)
         }
     }
 
-    watchdog_set_drvdata(&priv->wdd, priv);
-
-    priv->wdd.info         = &wb_wdt_ident;
-    priv->wdd.ops          = &wb_wdt_ops;
-    priv->wdd.bootstatus   = 0;
-    priv->wdd.timeout      = priv->hw_margin / MS_TO_S;
-    priv->wdd.min_timeout  = priv->timer_accuracy / MS_TO_S;
-    priv->wdd.max_timeout  = priv->timer_accuracy * MAX_REG_VAL / MS_TO_S;
-    priv->wdd.parent       = priv->dev;
-
-    watchdog_stop_on_reboot(&priv->wdd);
-
-    ret = devm_watchdog_register_device(priv->dev, &priv->wdd);
-    if (ret != 0) {
-        dev_err(priv->dev, "cannot register watchdog device (err=%d)\n", ret);
-        return -ENXIO;
-    }
-
     return 0;
 }
 
@@ -1085,6 +1108,12 @@ static int wb_wdt_probe(struct platform_device *pdev)
     dev_info(&pdev->dev, "register %s mode, config_mode %u, func_mode %u, %u ms overtime wdt success\n",
         algo, priv->config_mode, priv->priv_func_mode, priv->hw_margin);
 
+    ret = wb_wdt_register_device(priv);
+    if (ret < 0) {
+        dev_err(&pdev->dev, "kernel watchdog sysfs register %u failed.\n", ret);
+        return -ENODEV;
+    }
+
     if (priv->sysfs_index != SYSFS_NO_CFG) {
 
         priv->sysfs_group = wdt_get_attr_group(priv->sysfs_index);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.h
index d45904ba32ea..431464688878 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.h
@@ -1,3 +1,23 @@
+/*
+ * A header definition for wb_wdt driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #ifndef __WB_WDT_H__
 #define __WB_WDT_H__
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c
index 51c5b4143df8..3d2b2ff0bab6 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c
@@ -1,12 +1,21 @@
 /*
- * xdpe132g5c_i2c_drv.c
+ * An wb_xdpe132g5c driver for xdpe132g5c avs and hwmon device function
  *
- * This module create sysfs to set AVS and create hwmon to get out power
- * through xdpe132g5c I2C address.
+ * Copyright (C) 2024 Micas Networks Inc.
  *
- * History
- *  [Version]                [Date]                    [Description]
- *   *  v1.0                2021-09-17                  Initial version
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <linux/module.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c_pmbus.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c_pmbus.c
index d1e0fa220725..493f477a1688 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c_pmbus.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c_pmbus.c
@@ -1,3 +1,23 @@
+/*
+ * An wb_xdpe132g5c_pmbus driver for xdpe132g5c pmbus device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include <linux/err.h>
 #include <linux/i2c.h>
 #include <linux/init.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/auto_update.py b/platform/broadcom/sonic-platform-modules-micas/common/script/auto_update.py
index 838e64f6b417..e1a781420176 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/auto_update.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/auto_update.py
@@ -1,4 +1,19 @@
 #!/usr/bin/env python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 try:
     import os
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/avscontrol.py b/platform/broadcom/sonic-platform-modules-micas/common/script/avscontrol.py
index 1f367133a89b..898e528e6f01 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/avscontrol.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/avscontrol.py
@@ -1,4 +1,20 @@
 #!/usr/bin/env python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import sys
 import os
 import time
@@ -164,7 +180,7 @@ def doAvsCtrol(avs_conf):
         ret, log = doAvsCtrol_single(avs_conf)
         if ret is True:
             return True, log
-        time.sleep(10)
+        time.sleep(1)
     return False, log
 
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/cpodaemon.sh b/platform/broadcom/sonic-platform-modules-micas/common/script/cpodaemon.sh
new file mode 100755
index 000000000000..11ed62e214a6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/cpodaemon.sh
@@ -0,0 +1,99 @@
+#!/bin/bash
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# SYNCD_SOCKET_FILE=/var/run/sswsyncd/sswsyncd.socket
+
+function debug()
+{
+    /usr/bin/logger $1
+    /bin/echo `date` "- $1" >> ${DEBUGLOG}
+}
+
+wait_syncd() {
+    # while true; do
+    #     if [ -e ${SYNCD_SOCKET_FILE} ]; then
+    #         break
+    #     fi
+    #     sleep 1
+    # done
+
+    # wait until bcm sdk is ready to get a request
+    counter=0
+    while true; do
+        /usr/bin/bcmcmd -t 1 "show unit" | grep BCM >/dev/null 2>&1
+        rv=$?
+        if [ $rv -eq 0 ]; then
+            break
+        fi
+        counter=$((counter+1))
+        if [ $counter -ge 60 ]; then
+            echo "syncd is not ready to take commands after $counter re-tries; Exiting!"
+            break
+        fi
+        sleep 1
+    done
+}
+
+start() {
+    debug "Starting cpodaemon service..."
+    
+    platforms=( \
+	        "x86_64-micas_m2-w6940-128x1-fr4-r0" \
+            )
+
+    result=$(cat /host/machine.conf | grep onie_platform | cut -d = -f 2)
+    echo $result
+
+    cpo_device=0
+    for i in ${platforms[*]}; do
+        if [ $result == $i ];
+        then
+            cpo_device=1
+            break
+        fi
+    done
+
+    if [ $cpo_device -eq 1 ];
+    then
+        wait_syncd
+        cpo_daemon
+    else
+        echo "$result not support cpo"
+        exit 0
+    fi
+}
+
+wait() {
+    debug "wait cpodaemon service...  do nothing"
+}
+
+stop() {
+    debug "Stopping cpodaemon service..."
+    pkill -9 cpo_daemon
+    debug "Stopped cpodaemon service..."
+    exit 0
+}
+
+case "$1" in
+    start|wait|stop)
+        $1
+        ;;
+    *)
+        echo "Usage: $0 {start|wait|stop}"
+        exit 1
+        ;;
+esac
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/dev_monitor.py b/platform/broadcom/sonic-platform-modules-micas/common/script/dev_monitor.py
index 8ce06db061bf..23b39d3731a0 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/dev_monitor.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/dev_monitor.py
@@ -1,4 +1,20 @@
 #!/usr/bin/env python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import sys
 import os
 import time
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/drv_update.py b/platform/broadcom/sonic-platform-modules-micas/common/script/drv_update.py
index ac7c189f1b8f..aebeeee654e0 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/drv_update.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/drv_update.py
@@ -1,5 +1,20 @@
 #!/usr/bin/env python
-# -*- coding: UTF-8 -*-
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import syslog
 import os
 import shutil
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/generate_airflow.py b/platform/broadcom/sonic-platform-modules-micas/common/script/generate_airflow.py
index ff4fed46fa13..fcbebfab6757 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/generate_airflow.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/generate_airflow.py
@@ -1,5 +1,20 @@
 #!/usr/bin/env python
-# -*- coding: UTF-8 -*-
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 '''
 generate board air flow according to fan and psu air flow
 write resulet to AIRFLOW_RESULT_FILE, file format:
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py
index 5a12b88ac463..a7bfa03942a8 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py
@@ -1,4 +1,20 @@
 #!/usr/bin/env python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import os
 import subprocess
 import time
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/hal_ledctrl.py b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_ledctrl.py
index c21fd3c1f585..74fc1727ac77 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/hal_ledctrl.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_ledctrl.py
@@ -1,9 +1,26 @@
 #!/usr/bin/env python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import time
 import syslog
 import traceback
 from plat_hal.interface import interface
 from plat_hal.baseutil import baseutil
+from platform_util import get_value
 try:
     import abc
 except ImportError as error:
@@ -32,7 +49,8 @@
 COLOR_GREEN = 1
 COLOR_AMBER = 2
 COLOR_RED = 3
-LED_STATUS_DICT = {COLOR_GREEN: "green", COLOR_AMBER: "amber", COLOR_RED: "red"}
+COLOR_FLASH = 4
+LED_STATUS_DICT = {COLOR_GREEN: "green", COLOR_AMBER: "amber", COLOR_RED: "red", COLOR_FLASH: "flash"}
 
 
 def ledcontrol_debug(s):
@@ -305,6 +323,8 @@ def __init__(self):
         self.__board_air_flow = ""
         self.int_case = interface()
         self.__config = baseutil.get_monitor_config()
+        self.__dcdc_whitelist = self.__config.get('dcdc_monitor_whitelist', {})
+        self.__fw_upgrade_check = self.__config.get('fw_upgrade_check', [])
         self.__temps_threshold_config = self.__config["temps_threshold"]
         for temp_threshold in self.__temps_threshold_config.values():
             temp_threshold['temp'] = 0
@@ -320,9 +340,13 @@ def __init__(self):
         self.__board_sys_led = self.__ledcontrol_para.get("board_sys_led", [])
         self.__board_psu_led = self.__ledcontrol_para.get("board_psu_led", [])
         self.__board_fan_led = self.__ledcontrol_para.get("board_fan_led", [])
+        self.__board_smb_led = self.__ledcontrol_para.get("board_smb_led", [])
         self.__psu_air_flow_monitor = self.__ledcontrol_para.get("psu_air_flow_monitor", 0)
         self.__fan_air_flow_monitor = self.__ledcontrol_para.get("fan_air_flow_monitor", 0)
         self.__fan_mix_list = self.__ledcontrol_para.get("fan_mix_list", [])
+        self.__sysled_check_temp = self.__ledcontrol_para.get("sysled_check_temp", 1)
+        self.__sysled_check_fw_up = self.__ledcontrol_para.get("sysled_check_fw_up", 0)
+        self.__smbled_ctrl = self.__ledcontrol_para.get("smbled_ctrl", 0)
 
     @property
     def na_ret(self):
@@ -372,10 +396,26 @@ def board_psu_led(self):
     def board_fan_led(self):
         return self.__board_fan_led
 
+    @property
+    def board_smb_led(self):
+        return self.__board_smb_led
+
     @property
     def fan_mix_list(self):
         return self.__fan_mix_list
 
+    @property
+    def sysled_check_temp(self):
+        return self.__sysled_check_temp
+
+    @property
+    def sysled_check_fw_up(self):
+        return self.__sysled_check_fw_up
+
+    @property
+    def smbled_ctrl(self):
+        return self.__smbled_ctrl
+
     @property
     def interval(self):
         return self.__interval
@@ -397,6 +437,15 @@ def set_led_color(self, led_name, color):
             ret = False
         return ret
 
+    def set_smb_led(self, color):
+        for led in self.board_smb_led:
+            led_name = led.get("led_name")
+            ret = self.set_led_color(led_name, color)
+            if ret is True:
+                ledcontrol_debug("set %s success, color:%s," % (led_name, color))
+            else:
+                ledcontrol_debug("set %s failed, color:%s," % (led_name, color))
+
     def set_sys_led(self, color):
         for led in self.board_sys_led:
             led_name = led.get("led_name")
@@ -533,6 +582,97 @@ def checkTempCrit(self):
             ledcontrol_error(str(e))
         return False
 
+    def dcdc_whitelist_check(self, dcdc_name):
+        try:
+            check_item = self.__dcdc_whitelist.get(dcdc_name, {})
+            if len(check_item) == 0:
+                ledcontrol_debug("%s whitelist config is None" % dcdc_name)
+                return False
+
+            checkbit = check_item.get("checkbit", None)
+            okval = check_item.get("okval", None)
+            if checkbit is None or okval is None:
+                ledcontrol_error('%s config error, checkbit:%s, okval:%s' % (dcdc_name, checkbit, okval))
+                return False
+
+            ret, retval = get_value(check_item)
+            if ret is False:
+                ledcontrol_error("get %s whitelist value error, config: %s, msg: %s" % (dcdc_name, check_item, retval))
+                return False
+
+            val_t = retval & (1 << checkbit) >> checkbit
+            if val_t != okval:
+                return False
+            return True
+        except Exception as e:
+            ledcontrol_error('%%WHITELIST_CHECK: %s check error, msg: %s.' % (dcdc_name, str(e)))
+            return False
+
+    def get_voltage_led_status(self):
+        try:
+            led_status = COLOR_GREEN
+            dcdc_dict = self.int_case.get_dcdc_all_info()
+            for dcdc_name, item in dcdc_dict.items():
+                ret = self.dcdc_whitelist_check(dcdc_name)
+                if ret is False:
+                    if item['Value'] is None or int(item['Value']) == self.int_case.error_ret:
+                        ledcontrol_error('The value of %s read failed.' % (dcdc_name))
+                    elif float(item['Value']) > float(item['Max']):
+                        led_status = COLOR_AMBER
+                        ledcontrol_debug('%s voltage %.3f%s is larger than max threshold %.3f%s.' %
+                                           (dcdc_name, float(item['Value']), item['Unit'], float(item['Max']), item['Unit']))
+                    elif float(item['Value']) < float(item['Min']):
+                        led_status = COLOR_AMBER
+                        ledcontrol_debug('%s voltage %.3f%s is lower than min threshold %.3f%s.' %
+                                           (dcdc_name, float(item['Value']), item['Unit'], float(item['Min']), item['Unit']))
+                    else:
+                        ledcontrol_debug('%s value %s is in range [%s, %s].' % (dcdc_name, item['Value'], item['Min'], item['Max']))
+                else:
+                    ledcontrol_debug('%s is in dcdc whitelist, not monitor voltage' % dcdc_name)
+        except Exception as e:
+            ledcontrol_error('update dcdc sensors status error, msg: %s.' % (str(e)))
+        ledcontrol_debug("monitor voltage, set led: %s" % LED_STATUS_DICT.get(led_status))
+        return led_status
+
+    def monitor_point_check(self, item):
+        try:
+            gettype = item.get('gettype', None)
+            okval = item.get('okval', None)
+            compare_mode = item.get('compare_mode', "equal")
+            ret, value = get_value(item)
+            if ret is True:
+                if compare_mode == "equal":
+                    if value == okval:
+                        return True
+                elif compare_mode == "great":
+                    if value > okval:
+                        return True
+                elif compare_mode == "ignore":
+                    return True
+                else:
+                    ledcontrol_debug('compare_mode %s not match error.' % (compare_mode))
+            else:
+                ledcontrol_debug('point check failed, gettype: %s, msg: %s' % (gettype, value))
+        except Exception as e:
+            ledcontrol_error('point check error. msg: %s.' % (str(e)))
+        return False
+
+    def get_fw_up_led_status(self):
+        fw_upgrade_flag = False
+        for item in self.__fw_upgrade_check:
+            for monitor_point in item:
+                status = self.monitor_point_check(monitor_point)
+                if status is False:
+                    fw_upgrade_flag = False
+                    break
+                fw_upgrade_flag = True
+
+            if fw_upgrade_flag is True:
+                ledcontrol_debug("Firmware upgrade check: firmware upgrade in progress")
+                return COLOR_FLASH
+        ledcontrol_debug("Firmware upgrade check: firmware upgrade not in progress")
+        return COLOR_GREEN
+
     def check_board_air_flow(self):
         board_air_flow = self.board_air_flow
         air_flow_tuple = (F2B_AIR_FLOW, B2F_AIR_FLOW)
@@ -697,15 +837,15 @@ def get_monitor_psu_air_flow(self):
         ledcontrol_debug("monitor psu air flow, set psu led: %s" % LED_STATUS_DICT.get(psu_led_status))
         return psu_led_status
 
-    def get_temp_sys_led_status(self):
+    def get_temp_led_status(self):
         if self.checkTempCrit() is True:
-            sys_led_status = COLOR_RED
+            led_status = COLOR_RED
         elif self.checkTempWarning() is True:
-            sys_led_status = COLOR_AMBER
+            led_status = COLOR_AMBER
         else:
-            sys_led_status = COLOR_GREEN
-        ledcontrol_debug("monitor temperature, set sys led: %s" % LED_STATUS_DICT.get(sys_led_status))
-        return sys_led_status
+            led_status = COLOR_GREEN
+        ledcontrol_debug("monitor temperature, set led: %s" % LED_STATUS_DICT.get(led_status))
+        return led_status
 
     def get_sys_led_follow_fan_status(self):
 
@@ -728,12 +868,17 @@ def get_sys_led_follow_psu_status(self):
 
     def dealSysLedStatus(self):
         sys_led_status_list = []
-        # get_monitor_temp
-        self.get_monitor_temp()
-
-        # monitor temp get sys led status
-        sys_led_status = self.get_temp_sys_led_status()
-        sys_led_status_list.append(sys_led_status)
+        if self.sysled_check_temp == 1:
+            ledcontrol_debug("sys led check temperature status")
+            # get_monitor_temp
+            self.get_monitor_temp()
+            # monitor temp get sys led status
+            sys_led_status = self.get_temp_led_status()
+            ledcontrol_debug("monitor temperature to get sys led status: %s" %
+                LED_STATUS_DICT.get(sys_led_status))
+            sys_led_status_list.append(sys_led_status)
+        else:
+            ledcontrol_debug("sys led don't need to check temperature status")
 
         # check sys led follow fan led status
         sys_led_status = self.get_sys_led_follow_fan_status()
@@ -743,6 +888,16 @@ def dealSysLedStatus(self):
         sys_led_status = self.get_sys_led_follow_psu_status()
         sys_led_status_list.append(sys_led_status)
 
+        if self.sysled_check_fw_up == 1:
+            ledcontrol_debug("sys led check firmware upgrade")
+            # monitor firmware get sys led status
+            sys_led_status = self.get_fw_up_led_status()
+            ledcontrol_debug("monitor firmware upgrade to get sys led status: %s" %
+                LED_STATUS_DICT.get(sys_led_status))
+            sys_led_status_list.append(sys_led_status)
+        else:
+            ledcontrol_debug("sys led don't need to check firmware upgrade")
+
         sys_led_status = max(sys_led_status_list)
         sys_led_color = LED_STATUS_DICT.get(sys_led_status)
 
@@ -789,10 +944,37 @@ def dealPsuLedStatus(self):
         # set psu led
         self.set_psu_led(psu_led_color)
 
+    def dealSmbLedStatus(self):
+        if self.smbled_ctrl == 0:
+            ledcontrol_debug("Don't need to control SMB led")
+            return
+
+        ledcontrol_debug("Start to control SMB led")
+        smb_led_status_list = []
+
+        # get_monitor_temp
+        self.get_monitor_temp()
+        # monitor temp get smb led status
+        smb_led_status = self.get_temp_led_status()
+        smb_led_status_list.append(smb_led_status)
+        ledcontrol_debug("monitor temperature to get smb led status: %s" % LED_STATUS_DICT.get(smb_led_status))
+
+        # monitor volgate get smb led status
+        smb_led_status = self.get_voltage_led_status()
+        smb_led_status_list.append(smb_led_status)
+        ledcontrol_debug("monitor voltage to get smb led status: %s" % LED_STATUS_DICT.get(smb_led_status))
+
+        smb_led_status = max(smb_led_status_list)
+        smb_led_color = LED_STATUS_DICT.get(smb_led_status)
+
+        # set smb led
+        self.set_smb_led(smb_led_color)
+
     def do_ledcontrol(self):
         self.dealPsuLedStatus()
         self.dealFanLedStatus()
         self.dealSysLedStatus()
+        self.dealSmbLedStatus()
 
     def fan_obj_init(self):
         fan_num = self.get_fan_total_number()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/hal_pltfm.py b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_pltfm.py
index 11196f507ef1..aec37de3619c 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/hal_pltfm.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_pltfm.py
@@ -1,5 +1,20 @@
 #!/usr/bin/env python3
-# -*- coding: UTF-8 -*-
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import inspect
 import sys
 import json
@@ -418,7 +433,8 @@ def get_temps_sensor():
     print("=================get_temps_sensor======================")
     temp_list = int_case.get_temps()
     for temp in temp_list:
-        print("id: %s, name: %s, API name: %s, value: %s" % (temp.temp_id, temp.name, temp.api_name, temp.Value))
+        print("id: %s, name: %s, API name: %s, value: %s, Min: %s, Low: %s, High: %s, Max: %s, Invalid: %s, Error: %s" %
+            (temp.temp_id, temp.name, temp.api_name, temp.Value, temp.Min, temp.Low, temp.High, temp.Max, temp.temp_invalid, temp.temp_error))
 
 def get_cpu_reset_num():
     r'''get_cpu_reset_num'''
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor.py b/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor.py
index 33d5bfba64e6..89c6cc26c274 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor.py
@@ -1,12 +1,26 @@
 #!/usr/bin/python3
-# -*- coding: UTF-8 -*-
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 import os
 import time
 import syslog
 from plat_hal.interface import interface
 from plat_hal.baseutil import baseutil
-from platform_util import io_rd, wbi2cget
+from platform_util import get_value
 
 INTELLIGENT_MONITOR_DEBUG_FILE = "/etc/.intelligent_monitor_debug"
 
@@ -59,39 +73,20 @@ def dcdc_whitelist_check(self, dcdc_name):
             check_item = self.__dcdc_whitelist.get(dcdc_name, {})
             if len(check_item) == 0:
                 return False
-            gettype = check_item.get("gettype", None)
+
             checkbit = check_item.get("checkbit", None)
             okval = check_item.get("okval", None)
-            if gettype is None or checkbit is None or okval is None:
-                monitor_syslog('%%INTELLIGENT_MONITOR-3-DCDC_WHITELIST_FAILED: %s config error. gettype:%s, checkbit:%s, okval:%s' %
-                               (dcdc_name, gettype, checkbit, okval))
+            if checkbit is None or okval is None:
+                monitor_syslog('%%INTELLIGENT_MONITOR-3-DCDC_WHITELIST_FAILED: %s config error. checkbit:%s, okval:%s' %
+                               (dcdc_name, checkbit, okval))
                 return False
-            if gettype == "io":
-                io_addr = check_item.get('io_addr', None)
-                val = io_rd(io_addr)
-                if val is not None:
-                    retval = val
-                else:
-                    monitor_syslog(
-                        '%%INTELLIGENT_MONITOR-3-DCDC_WHITELIST_FAILED: %s io_rd error. io_addr:%s' %
-                        (dcdc_name, io_addr))
-                    return False
-            elif gettype == "i2c":
-                bus = check_item.get('bus', None)
-                addr = check_item.get('addr', None)
-                offset = check_item.get('offset', None)
-                ind, val = wbi2cget(bus, addr, offset)
-                if ind is True:
-                    retval = val
-                else:
-                    monitor_syslog('%%INTELLIGENT_MONITOR-3-DCDC_WHITELIST_FAILED: %s i2cget error. bus:%s, addr:%s, offset:%s' %
-                                   (dcdc_name, bus, addr, offset))
-                    return False
-            else:
-                monitor_syslog('%%INTELLIGENT_MONITOR-3-DCDC_WHITELIST_FAILED: %s gettype not support' % dcdc_name)
+            ret, retval = get_value(check_item)
+            if ret is False:
+                monitor_syslog(
+                    '%%INTELLIGENT_MONITOR-3-DCDC_WHITELIST_FAILED: %s get value failed, msg:%s' % (dcdc_name, retval))
                 return False
 
-            val_t = (int(retval, 16) & (1 << checkbit)) >> checkbit
+            val_t = retval & (1 << checkbit) >> checkbit
             if val_t != okval:
                 return False
             return True
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor/monitor_fan.py b/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor/monitor_fan.py
index bb596a94cc94..01fbe4046837 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor/monitor_fan.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor/monitor_fan.py
@@ -1,5 +1,19 @@
 #!/usr/bin/python3
-# -*- coding: UTF-8 -*-
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 import os
 import time
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py
index 35c16728f72c..025a22ce82cc 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py
@@ -1,4 +1,19 @@
 #!/usr/bin/python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 __all__ = [
     "BLACKLIST_DRIVERS",
@@ -15,6 +30,7 @@
     "OPTOE",
     "REBOOT_CAUSE_PARA",
     "UPGRADE_SUMMARY",
+    "FW_UPGRADE_STARTED_FLAG",
     "WARM_UPGRADE_PARAM",
     "WARM_UPG_FLAG",
     "WARM_UPGRADE_STARTED_FLAG",
@@ -67,7 +83,9 @@
     "MONITOR_DEV_STATUS",
     "MONITOR_DEV_STATUS_DECODE",
     "DEV_LEDS",
-    "fanloc"
+    "fanloc",
+    "PLATFORM_POWER_CONF",
+    "POWER_CTRL_CONF"
 ]
 
 # driver blacklist parameter
@@ -111,6 +129,7 @@
 
 # upgrade parameter
 UPGRADE_SUMMARY = {}
+FW_UPGRADE_STARTED_FLAG = "/etc/sonic/.doing_fw_upg"
 
 # warm_uprade parameter
 WARM_UPGRADE_PARAM = {}
@@ -136,6 +155,12 @@
 # driver update config
 DRVIER_UPDATE_CONF = {}
 
+# platform power config
+PLATFORM_POWER_CONF = []
+
+# power control config
+POWER_CTRL_CONF = {}
+
 ################################ fancontrol parameter###################################
 MONITOR_TEMP_MIN = 38
 MONITOR_K = 11
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py
index d6b3151e47cf..762f33dfbcf9 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py
@@ -1,4 +1,19 @@
 #!/usr/bin/python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 import sys
 import os
@@ -20,6 +35,7 @@
     "PMON_SYSLOG_STATUS",
     "REBOOT_CAUSE_PARA",
     "UPGRADE_SUMMARY",
+    "FW_UPGRADE_STARTED_FLAG",
     "WARM_UPGRADE_PARAM",
     "WARM_UPG_FLAG",
     "WARM_UPGRADE_STARTED_FLAG",
@@ -43,7 +59,9 @@
     "MONITOR_DEV_STATUS",
     "MONITOR_DEV_STATUS_DECODE",
     "DEV_LEDS",
-    "fanloc"
+    "fanloc",
+    "PLATFORM_POWER_CONF",
+    "POWER_CTRL_CONF"
 ]
 
 
@@ -115,6 +133,7 @@ def getdeviceplatform():
 
 # upgrade parameter
 UPGRADE_SUMMARY = module_product.UPGRADE_SUMMARY
+FW_UPGRADE_STARTED_FLAG = module_product.FW_UPGRADE_STARTED_FLAG
 
 # warm_uprade parameter
 WARM_UPGRADE_PARAM = module_product.WARM_UPGRADE_PARAM
@@ -140,6 +159,12 @@ def getdeviceplatform():
 # driver update config
 DRVIER_UPDATE_CONF = module_product.DRVIER_UPDATE_CONF
 
+# platform power config
+PLATFORM_POWER_CONF = module_product.PLATFORM_POWER_CONF
+
+# power control config
+POWER_CTRL_CONF = module_product.POWER_CTRL_CONF
+
 ################################ fancontrol parameter###################################
 
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_driver.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_driver.py
index e27d461bab81..290e3a93a38e 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_driver.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_driver.py
@@ -1,9 +1,25 @@
 #!/usr/bin/env python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import os
 import subprocess
 import time
 import click
-from platform_config import GLOBALCONFIG, WARM_UPGRADE_STARTED_FLAG, WARM_UPG_FLAG
+from platform_config import GLOBALCONFIG, WARM_UPGRADE_STARTED_FLAG, WARM_UPG_FLAG, FW_UPGRADE_STARTED_FLAG
 
 
 CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
@@ -40,6 +56,10 @@ def platform_process_file_check():
     if os.path.exists(WARM_UPG_FLAG):
         os.remove(WARM_UPG_FLAG)
 
+    # FW_UPGRADE_STARTED_FLAG is used as upgrade.py process start flag
+    if os.path.exists(FW_UPGRADE_STARTED_FLAG):
+        os.remove(FW_UPGRADE_STARTED_FLAG)
+
 
 def startCommon_operation():
     platform_process_file_check()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py
index 4dafde2701cb..a3b7bb7c5421 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py
@@ -1,17 +1,52 @@
 #!/usr/bin/env python3
-# -*- coding: UTF-8 -*-
-import click
-import os
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+import binascii
 import sys
+import os
+import json
+import re
+import shutil
+import click
 
-from eepromutil.fru import ipmifru
+from eepromutil.fru import ipmifru, BoardInfoArea, ProductInfoArea
 from eepromutil.cust_fru import CustFru
 from eepromutil.fantlv import fan_tlv
+from eepromutil.wedge import Wedge
+from eepromutil.wedge_v5 import WedgeV5
 import eepromutil.onietlv as ot
 from platform_config import PLATFORM_E2_CONF
-from platform_util import byteTostr, dev_file_read
+from platform_util import byteTostr, dev_file_read, exec_os_cmd
 
-CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
+PYTHON_VERSION = sys.version_info.major
+GENERATE_RAWDATA_NUM = 0
+OUTPUT_DIR = "output/"
+SUPPORT_E2_TYPE = ("onie_tlv", "fru", "fantlv", "custfru", "wedge", "wedge_v5")
+E2_NAME_CLICK_HELP = "Display eeprom information of specified name, such as "
+
+for e2_key, e2_conf_list in sorted(PLATFORM_E2_CONF.items()):
+    E2_NAME_CLICK_HELP += e2_key + ", "
+    for e2_conf in e2_conf_list:
+        e2_name = e2_conf["name"]
+        if e2_name == e2_key:
+            continue
+        E2_NAME_CLICK_HELP += e2_name + ", "
+
+E2_NAME_CLICK_HELP = E2_NAME_CLICK_HELP.rstrip(", ")
 
 
 class AliasedGroup(click.Group):
@@ -43,7 +78,6 @@ def decode_mac_number(encodedata):
             return None
         return (ord(encodedata[0]) << 8) | (ord(encodedata[1]) & 0x00ff)
 
-    @staticmethod
     @staticmethod
     def fru_decode_mac_number(params):
         ipmi_fru = params.get("fru")
@@ -52,7 +86,7 @@ def fru_decode_mac_number(params):
         area_info = getattr(ipmi_fru, area, None)
         if area_info is not None:
             raw_mac_number = getattr(area_info, field, None)
-            mac_number = decode_mac_number(raw_mac_number)
+            mac_number = ExtraFunc.decode_mac_number(raw_mac_number)
             ipmi_fru.setValue(area, field, mac_number)
 
     @staticmethod
@@ -63,7 +97,7 @@ def fru_decode_mac(params):
         area_info = getattr(ipmi_fru, area, None)
         if area_info is not None:
             raw_mac = getattr(area_info, field, None)
-            decoded_mac = decode_mac(raw_mac)
+            decoded_mac = ExtraFunc.decode_mac(raw_mac)
             ipmi_fru.setValue(area, field, decoded_mac)
 
     @staticmethod
@@ -114,20 +148,22 @@ def onie_eeprom_decode(onie, e2_decode):
             continue
 
 
-def onie_eeprom_show(eeprom, e2_decode=None):
+def onie_eeprom_show(e2_name, eeprom, e2_decode=None):
     try:
         onietlv = ot.onie_tlv()
         rets = onietlv.decode(eeprom)
         if e2_decode is not None:
             onie_eeprom_decode(rets, e2_decode)
-        print("%-20s %-5s %-5s  %-20s" % ("TLV name", "Code", "lens", "Value"))
+        print("===================%s===================" % e2_name)
+        print("%-20s %-5s %-5s  %s" % ("TLV name", "Code", "lens", "Value"))
         for item in rets:
             if item["code"] == 0xfd:
-                print("%-20s 0x%-02X   %-5s" % (item["name"], item["code"], item["lens"]))
+                print("%-20s 0x%-02X   %s" % (item["name"], item["code"], item["lens"]))
             else:
-                print("%-20s 0x%-02X   %-5s %-20s" % (item["name"], item["code"], item["lens"], item["value"]))
+                print("%-20s 0x%-02X   %-5s %s" % (item["name"], item["code"], item["lens"], item["value"]))
+        return True, ""
     except Exception as e:
-        print(str(e))
+        return False, str(e)
 
 
 def set_fantlv_value(params):
@@ -166,21 +202,21 @@ def fantlv_eeprom_decode(fantlv_dict, e2_decode):
             continue
 
 
-def fantlv_eeprom_show(eeprom, e2_decode=None):
+def fantlv_eeprom_show(e2_name, eeprom, e2_decode=None):
     try:
         tlv = fan_tlv()
         rets = tlv.decode(eeprom)
         if len(rets) == 0:
-            print("fan tlv eeprom info error.!")
-            return
+            return False, "fan tlv eeprom info error."
         if e2_decode is not None:
             fantlv_eeprom_decode(rets, e2_decode)
-        print("%-15s %-5s %-5s  %-20s" % ("TLV name", "Code", "lens", "Value"))
+        print("===================%s===================" % e2_name)
+        print("%-15s %-5s %-5s  %s" % ("TLV name", "Code", "lens", "Value"))
         for item in rets:
-            print("%-15s 0x%-02X   %-5s %-20s" % (item["name"], item["code"], item["lens"], item["value"]))
+            print("%-15s 0x%-02X   %-5s %s" % (item["name"], item["code"], item["lens"], item["value"]))
+        return True, ""
     except Exception as e:
-        print(str(e))
-    return
+        return False, str(e)
 
 
 def run_func(funcname, params):
@@ -227,51 +263,171 @@ def fru_eeprom_decode(ipmi_fru, e2_decode):
             continue
 
 
-def fru_eeprom_show(eeprom, e2_decode=None):
+def fru_eeprom_show(e2_name, eeprom, e2_decode=None):
     try:
         ipmi_fru = ipmifru()
         ipmi_fru.decodeBin(eeprom)
         if e2_decode is not None:
             fru_eeprom_decode(ipmi_fru, e2_decode)
+        print("===================%s==============" % e2_name)
         print("=================board=================")
         print(ipmi_fru.boardInfoArea)
         print("=================product=================")
         print(ipmi_fru.productInfoArea)
+        return True, ""
     except Exception as e:
-        print(str(e))
+        return False, str(e)
 
 
-def custfru_eeprom_show(eeprom, e2_decode=None):
+def custfru_eeprom_show(e2_name, eeprom, e2_decode=None):
     try:
         custfru = CustFru()
         custfru.decode(eeprom)
+        print("===================%s==============" % e2_name)
         print(custfru)
+        return True, ""
     except Exception as e:
-        print(str(e))
+        return False, str(e)
+
+
+def wedge_eeprom_show(e2_name, eeprom, e2_decode=None):
+    try:
+        wegde = Wedge()
+        wegde.decode(eeprom)
+        print("===================%s==============" % e2_name)
+        print(wegde)
+        return True, ""
+    except Exception as e:
+        return False, str(e)
+
+
+def wedge_v5_eeprom_show(e2_name, eeprom, e2_decode=None):
+    try:
+        wegdev5 = WedgeV5()
+        rets    = wegdev5.decode(eeprom)
+        print("===================%s===================" % e2_name)
+        print("%-32s %-5s %-5s  %s" % ("TLV name","Type","Length","Value"))
+        for item in rets:
+            print("%-32s %-5d   %-5s %s" % (item["name"],item["code"],item["lens"],item["value"]))
+        return True, ""
+    except Exception as e:
+        return False, str(e)
+
+
+def eeprom_parse_by_type(e2_type, name, binval, e2_decode):
+    if e2_type == "onie_tlv":
+        return onie_eeprom_show(name, binval, e2_decode)
+
+    if e2_type == "fru":
+        return fru_eeprom_show(name, binval, e2_decode)
+
+    if e2_type == "fantlv":
+        return fantlv_eeprom_show(name, binval, e2_decode)
+
+    if e2_type == "custfru":
+        return custfru_eeprom_show(name, binval, e2_decode)
+
+    if e2_type == "wedge":
+        return wedge_eeprom_show(name, binval, e2_decode)
+
+    if e2_type == "wedge_v5":
+        return wedge_v5_eeprom_show(name, binval, e2_decode)
+
+    return False, "Unsupport e2_type: %s" % e2_type
 
 
-def eeprom_parase(eeprom_conf):
+def eeprom_parse_traverse(name, binval, e2_decode=None):
+    errmsg = ""
+    support_e2_type = ("onie_tlv", "fru", "fantlv", "custfru", "wedge", "wedge_v5")
+    for e2_type in support_e2_type:
+        status, msg = eeprom_parse_by_type(e2_type, name, binval, e2_decode)
+        if status is True:
+            return True, ""
+        errmsg = "%s    %s\n" % (errmsg, msg)
+    return False, errmsg
+
+
+def eeprom_parse_file(e2_path, e2_size):
+    if e2_size is None:
+        e2_size = os.path.getsize(e2_path)
+    ret, binval_bytes = dev_file_read(e2_path, 0, e2_size)
+    if ret is False:
+        print("eeprom read error, eeprom path: %s, msg: %s" % (e2_path, binval_bytes))
+        return
+    binval = byteTostr(binval_bytes)
+    status, msg = eeprom_parse_traverse(e2_path, binval)
+    if status is not True:
+        print("===================%s===================" % e2_path)
+        print("parse [%s] eeprom failed, errmsg:" % e2_path)
+        print("%s" % msg)
+    return
+
+
+def eeprom_parse_dir(e2_path, e2_size):
+    for root, dirs, names in os.walk(e2_path):
+        # root: directory absolute path
+        # dirs: folder path collection under directory
+        # names: file path collection under directory
+        for filename in names:
+            # file_path is file absolute path
+            file_path = os.path.join(root, filename)
+            eeprom_parse_file(file_path, e2_size)
+    return
+
+
+def eeprom_parse(e2_path, e2_size):
+    if os.path.isdir(e2_path):
+        eeprom_parse_dir(e2_path, e2_size)
+    elif os.path.isfile(e2_path):
+        eeprom_parse_file(e2_path, e2_size)
+    else:
+        msg = "path: %s not found" % e2_path
+        print(msg)
+    return
+
+
+def eeprom_parse_by_config(eeprom_conf):
+    errmsg = ""
     name = eeprom_conf.get("name")
     e2_type = eeprom_conf.get("e2_type")
     e2_path = eeprom_conf.get("e2_path")
     e2_size = eeprom_conf.get("e2_size", 256)
     e2_decode = eeprom_conf.get("e2_decode")
-    print("===================%s===================" % name)
     ret, binval_bytes = dev_file_read(e2_path, 0, e2_size)
     if ret is False:
+        print("===================%s===================" % name)
         print("eeprom read error, eeprom path: %s, msg: %s" % (e2_path, binval_bytes))
         return
     binval = byteTostr(binval_bytes)
-    if e2_type == "onie_tlv":
-        onie_eeprom_show(binval, e2_decode)
-    elif e2_type == "fru":
-        fru_eeprom_show(binval, e2_decode)
-    elif e2_type == "fantlv":
-        fantlv_eeprom_show(binval, e2_decode)
-    elif e2_type == "custfru":
-        custfru_eeprom_show(binval, e2_decode)
-    else:
-        print("Unknow eeprom type: %s" % e2_type)
+
+    if e2_type is None:
+        status, msg = eeprom_parse_traverse(name, binval, e2_decode)
+        if status is not True:
+            print("===================%s===================" % name)
+            print("parse [%s] eeprom failed, errmsg:" % name)
+            print("%s" % msg)
+        return
+
+    if isinstance(e2_type, str):
+        status, msg = eeprom_parse_by_type(e2_type, name, binval, e2_decode)
+        if status is not True:
+            print("===================%s===================" % name)
+            print("parse [%s] eeprom failed, errmsg: %s" % (name, msg))
+        return
+
+    if isinstance(e2_type, list):
+        for e2_type_item in e2_type:
+            status, msg = eeprom_parse_by_type(e2_type_item, name, binval, e2_decode)
+            if status is True:
+                return
+            errmsg = "%s    %s\n" % (errmsg, msg)
+        print("===================%s===================" % name)
+        print("parse [%s] eeprom failed, errmsg:" % name)
+        print("%s" % errmsg)
+        return
+
+    print("===================%s===================" % name)
+    print("Unsupprot e2_type config: %s" % type(e2_type))
     return
 
 
@@ -283,7 +439,7 @@ def get_fans_eeprom_info(param):
         return
     if param == 'all':
         for conf in fan_eeprom_conf:
-            eeprom_parase(conf)
+            eeprom_parse_by_config(conf)
         return
     if not param.isdigit():
         print("param error, %s is not digital or 'all'" % param)
@@ -292,7 +448,7 @@ def get_fans_eeprom_info(param):
     if fan_index < 0 or fan_index >= fan_num:
         print("param error, total fan number: %d, fan index: %d" % (fan_num, fan_index + 1))
         return
-    eeprom_parase(fan_eeprom_conf[fan_index])
+    eeprom_parse_by_config(fan_eeprom_conf[fan_index])
     return
 
 
@@ -304,7 +460,7 @@ def get_psus_eeprom_info(param):
         return
     if param == 'all':
         for conf in psu_eeprom_conf:
-            eeprom_parase(conf)
+            eeprom_parse_by_config(conf)
         return
     if not param.isdigit():
         print("param error, %s is not digital or 'all'" % param)
@@ -313,7 +469,7 @@ def get_psus_eeprom_info(param):
     if psu_index < 0 or psu_index >= psu_num:
         print("param error, total psu number: %d, psu index: %d" % (psu_num, psu_index + 1))
         return
-    eeprom_parase(psu_eeprom_conf[psu_index])
+    eeprom_parse_by_config(psu_eeprom_conf[psu_index])
     return
 
 
@@ -325,7 +481,7 @@ def get_slots_eeprom_info(param):
         return
     if param == 'all':
         for conf in slot_eeprom_conf:
-            eeprom_parase(conf)
+            eeprom_parse_by_config(conf)
         return
     if not param.isdigit():
         print("param error, %s is not digital or 'all'" % param)
@@ -334,7 +490,7 @@ def get_slots_eeprom_info(param):
     if slot_index < 0 or slot_index >= slot_num:
         print("param error, total slot number: %d, slot index: %d" % (slot_num, slot_index + 1))
         return
-    eeprom_parase(slot_eeprom_conf[slot_index])
+    eeprom_parse_by_config(slot_eeprom_conf[slot_index])
     return
 
 
@@ -346,7 +502,7 @@ def get_syseeprom_info(param):
         return
     if param == 'all':
         for conf in syseeprom_conf:
-            eeprom_parase(conf)
+            eeprom_parse_by_config(conf)
         return
     if not param.isdigit():
         print("param error, %s is not digital or 'all'" % param)
@@ -355,27 +511,501 @@ def get_syseeprom_info(param):
     if syseeprom_index < 0 or syseeprom_index >= syseeprom_num:
         print("param error, total syseeprom number: %d, syseeprom index: %d" % (syseeprom_num, syseeprom_index + 1))
         return
-    eeprom_parase(syseeprom_conf[syseeprom_index])
+    eeprom_parse_by_config(syseeprom_conf[syseeprom_index])
     return
 
 
-def decode_eeprom_info(e2_type, e2_path, e2_size):
-    if not e2_size.isdigit():
-        print("param error, e2_size %s is not digital" % e2_size)
+def get_all_eeprom_info():
+    for e2_key, e2_conf in sorted(PLATFORM_E2_CONF.items()):
+        for conf in e2_conf:
+            eeprom_parse_by_config(conf)
+
+
+def get_specified_eeprom_info(e2_type):
+    if e2_type not in SUPPORT_E2_TYPE:
+        print("Unsupprot e2_type %s" % e2_type)
+        return
+
+    match_flag = 0
+    for e2_key, e2_conf in sorted(PLATFORM_E2_CONF.items()):
+        for conf in e2_conf:
+            name = conf.get("name")
+            conf_e2_type = conf.get("e2_type")
+            e2_path = conf.get("e2_path")
+            e2_size = conf.get("e2_size", 256)
+            e2_decode = conf.get("e2_decode")
+            if conf_e2_type is None or (isinstance(conf_e2_type, list) and e2_type in conf_e2_type):
+                ret, binval_bytes = dev_file_read(e2_path, 0, e2_size)
+                if ret is False:
+                    # Since it is not sure whether the E2 type matches, don't print error logs.
+                    continue
+
+                binval = byteTostr(binval_bytes)
+                status, msg = eeprom_parse_by_type(e2_type, name, binval, e2_decode)
+                if status is True:
+                    match_flag = 1
+                continue
+
+            if isinstance(conf_e2_type, str) and conf_e2_type == e2_type:
+                match_flag = 1
+                ret, binval_bytes = dev_file_read(e2_path, 0, e2_size)
+                if ret is False:
+                    print("===================%s===================" % name)
+                    print("eeprom read error, eeprom path: %s, msg: %s" % (e2_path, binval_bytes))
+                    continue
+
+                binval = byteTostr(binval_bytes)
+                status, msg = eeprom_parse_by_type(e2_type, name, binval, e2_decode)
+                if status is not True:
+                    print("===================%s===================" % name)
+                    print("parse [%s] eeprom failed, errmsg: %s" % (name, msg))
+    if match_flag == 0:
+        print("The eeprom type [%s] was not found in the machine" % e2_type)
+    return
+
+
+def traverse_eeprom_by_name(e2_name):
+    match_flag = False
+    for e2_key, e2_conf_list in sorted(PLATFORM_E2_CONF.items()):
+        for e2_conf in e2_conf_list:
+            if e2_conf["name"] == e2_name:
+                match_flag = True
+                eeprom_parse_by_config(e2_conf)
+    return match_flag
+
+
+def get_eeprom_info_by_name(e2_name):
+    e2_conf_list = PLATFORM_E2_CONF.get(e2_name)
+    if e2_conf_list is not None: # display all the eeprom information of e2_conf_list
+        for e2_conf in e2_conf_list:
+            eeprom_parse_by_config(e2_conf)
+        return
+
+    # e2_conf_list is None, traverse the configuration to display the specified name eeprom information
+    status = traverse_eeprom_by_name(e2_name)
+    if status is False:
+        print("Can't find %s eeprom information" % e2_name)
+    return
+
+
+def get_eeprom_config_by_json_file(file_path):
+    if not os.path.isfile(file_path):
+        msg = "file path: %s not exits" % file_path
+        return False, msg
+    with open(file_path, 'r') as jsonfile:
+        json_dict = json.load(jsonfile)
+    return True, json_dict
+
+
+def write_rawdata_to_file(rawdata,out_file):
+    out_file_dir = os.path.dirname(out_file)
+    if len(out_file_dir) != 0:
+        cmd = "mkdir -p %s" % out_file_dir
+        exec_os_cmd(cmd)
+    data_array = bytearray()
+    for x in rawdata:
+        data_array.append(ord(x))
+    with open(out_file, 'wb') as fd:
+        fd.write(data_array)
+    return
+
+
+def isValidMac(mac):
+    if re.match(r"^\s*([0-9a-fA-F]{2,2}:){5,5}[0-9a-fA-F]{2,2}\s*$", mac):
+        return True
+    return False
+
+
+def mac_addr_decode(origin_mac):
+    mac = origin_mac.replace("0x", "")
+    if len(mac) != 12:
+        msg = "Invalid MAC address: %s" % origin_mac
+        return False, msg
+    release_mac = ""
+    for i in range(len(mac) // 2):
+        if i == 0:
+            release_mac += mac[i * 2:i * 2 + 2]
+        else:
+            release_mac += ":" + mac[i * 2:i * 2 + 2]
+    return True, release_mac
+
+
+def json_list_value_decode(list_value):
+    u'''json file'''
+    ret = ""
+    for item in list_value:
+        value = int(item, 16)
+        ret += chr(value)
+    return ret
+
+
+def get_ext_tlv_body(tlv_type, tlv_value):
+    ret = ""
+    ret += (chr(tlv_type))
+    ret += (chr(len(tlv_value)))
+    if isinstance(tlv_value, str):
+        ret += tlv_value
+    elif isinstance(tlv_value, list):
+        ret += json_list_value_decode(tlv_value)
+    else:
+        msg = "unsupport onie tlv value type: %s, value: %s" % (type(tlv_value), tlv_value)
+        return False, msg
+    return True, ret
+
+
+def generate_ext(ext_dict):
+    ret = ""
+    iana = ext_dict.get("iana")
+    if iana is not None:
+        if isinstance(iana, str):
+            ret += iana
+        elif isinstance(iana, list):
+            ret += json_list_value_decode(iana)
+        else:
+            msg = "unsupport iana type: %s, value: %s" % (type(iana), iana)
+            return False, msg
+        del ext_dict['iana']
+
+    key_list = sorted(ext_dict.keys())
+    for key in key_list:
+        if not key.startswith("code_"):   # tlv type format msut be "code_XX"
+            continue
+        tlv_type = int(key[5:], 16)
+        tlv_value = ext_dict[key]
+        status, ret_tmp= get_ext_tlv_body(tlv_type, tlv_value)
+        if status is False:
+            return False, ret_tmp
+        ret += ret_tmp
+    return True, ret
+
+
+def check_mac_addr(mac):
+    if mac.startswith("0x"):
+        status, mac = mac_addr_decode(mac)
+        if status is False:
+            return False, mac
+
+    if isValidMac(mac) is False:
+        msg = "Invalid MAC address: %s" % mac
+        return False, msg
+    return True, mac
+
+
+def generate_onie_tlv_value(onie_tlv_dict):
+    global GENERATE_RAWDATA_NUM
+    _value = {}
+    try:
+        generate_flag = onie_tlv_dict.get("generate_flag", 0)
+        if generate_flag == 0:
+            return
+        GENERATE_RAWDATA_NUM += 1
+        e2_size = onie_tlv_dict.get("e2_size", 256)
+        e2_name = onie_tlv_dict.get("e2_name")
+        if e2_name is None:
+            print("onie tlv config error, e2_name is None, please check")
+            return
+        onietlv = ot.onie_tlv()
+        key_list = sorted(onie_tlv_dict.keys())
+        for key in key_list:
+            if not key.startswith("code_"):   # tlv type format msut be "code_XX"
+                continue
+            tlv_type = int(key[5:], 16)
+            tlv_value = onie_tlv_dict[key]
+            if tlv_type == onietlv.TLV_CODE_MAC_BASE:
+                status, ret = check_mac_addr(tlv_value)
+                if status is False:
+                    print("generate onie tlv eeprom rawdata %s failed, errmsg: %s" % (e2_name, ret))
+                    return
+                tlv_value = ret
+            elif tlv_type == onietlv.TLV_CODE_VENDOR_EXT:
+                status, ret= generate_ext(tlv_value)
+                if status is False:
+                    print("generate onie tlv eeprom rawdata %s failed, errmsg: %s" % (e2_name, ret))
+                    return
+                tlv_value = ret
+            _value[tlv_type] = tlv_value
+
+        rawdata, ret = onietlv.generate_value(_value, e2_size)
+        write_rawdata_to_file(rawdata, OUTPUT_DIR + e2_name)
+        print("generate onie tlv eeprom rawdata success, output file: %s"% (OUTPUT_DIR + e2_name))
+        return
+    except Exception as e:
+        msg = "generate onie tlv eeprom rawdata %s error, errmsg: %s" % (e2_name, str(e))
+        print(msg)
+        return
+
+
+def generate_fan_tlv_value(fan_tlv_dict):
+    global GENERATE_RAWDATA_NUM
+    _value = {}
+    try:
+        generate_flag = fan_tlv_dict.get("generate_flag", 0)
+        if generate_flag == 0:
+            return
+        GENERATE_RAWDATA_NUM += 1
+        e2_size = fan_tlv_dict.get("e2_size", 256)
+        e2_name = fan_tlv_dict.get("e2_name")
+        tlv_terminator = fan_tlv_dict.get("tlv_terminator", 0)
+        if e2_name is None:
+            print("fan tlv config error, e2_name is None, please check")
+            return
+
+        fantlv = fan_tlv()
+        fantlv.typename = fan_tlv_dict["ProductName"]
+        fantlv.typesn = fan_tlv_dict["SerialNumber"]
+        fantlv.typehwinfo = fan_tlv_dict["HardwareInfo"]
+        fantlv.typedevtype = int(fan_tlv_dict["DevType"], 16)
+        if tlv_terminator == 1:
+            fantlv.typename += "\x00"
+            fantlv.typesn += "\x00"
+            fantlv.typehwinfo += "\x00"
+        rawdata = fantlv.generate_fan_value(e2_size)
+        write_rawdata_to_file(rawdata, OUTPUT_DIR + e2_name)
+        print("generate fan tlv eeprom rawdata success, output file: %s"% (OUTPUT_DIR + e2_name))
+        return
+    except Exception as e:
+        msg = "generate fan tlv eeprom rawdata %s error, errmsg: %s" % (e2_name, str(e))
+        print(msg)
+        return
+
+
+def generate_fru_value(fru_dict):
+    global GENERATE_RAWDATA_NUM
+    try:
+        generate_flag = fru_dict.get("generate_flag", 0)
+        if generate_flag == 0:
+            return
+        GENERATE_RAWDATA_NUM += 1
+        e2_size = fru_dict.get("e2_size", 256)
+        e2_name = fru_dict.get("e2_name")
+        if e2_name is None:
+            print("fru config error, e2_name is None, please check")
+            return
+
+        boradispresent = fru_dict.get("boardinfoarea_ispresent", 0)
+        productispresent = fru_dict.get("productInfoArea_ispresent", 0)
+        if boradispresent == 0 and productispresent == 0:
+            print("fru config error, boradispresent = 0 abd productispresent = 0")
+            return
+
+        bia = None
+        pia = None
+        if boradispresent != 0:
+            boardinfoarea_conf = fru_dict.get("boardinfoarea")
+            if boardinfoarea_conf is None:
+                print("fru config error, boardinfoarea ispresent but boardinfoarea config is None")
+                return
+            bia = BoardInfoArea(name="Board Info Area", size=0)
+            bia.isPresent = True
+            bia.mfg_date =boardinfoarea_conf.get("mfg_date")
+            bia.boardManufacturer =boardinfoarea_conf["Manufacturer"]
+            bia.boardProductName = boardinfoarea_conf["ProductName"]
+            bia.boardSerialNumber = boardinfoarea_conf["SerialNumber"]
+            bia.boardPartNumber = boardinfoarea_conf["PartNumber"]
+            bia.fruFileId = boardinfoarea_conf["FRUFileID"]
+            for i in range(1,11):
+                ext_str = "extra%d" % i
+                valtmp = "boardextra%d" % i
+                val_t = boardinfoarea_conf.get(ext_str)
+                if val_t is None:
+                    break
+                if isinstance(val_t, list):
+                    val_t = json_list_value_decode(val_t)
+                setattr(bia, valtmp, val_t)
+
+        if productispresent != 0:
+            productinfoarea_conf = fru_dict.get("productInfoArea")
+            if productinfoarea_conf is None:
+                print("fru config error, productinfoarea ispresent but productinfoarea_conf config is None")
+                return
+
+            pia = ProductInfoArea(name="Product Info Area ", size=0)
+            pia.isPresent = True
+            pia.productManufacturer = productinfoarea_conf["Manufacturer"]
+            pia.productName = productinfoarea_conf["ProductName"]
+            pia.productPartModelName = productinfoarea_conf["PartModelName"]
+            pia.productVersion = productinfoarea_conf["Version"]
+            pia.productSerialNumber = productinfoarea_conf["SerialNumber"]
+            pia.productAssetTag = productinfoarea_conf.get("AssetTag")
+            pia.fruFileId = productinfoarea_conf["FRUFileID"]
+            for i in range(1,11):
+                ext_str = "extra%d" % i
+                valtmp = "productextra%d" % i
+                val_t = productinfoarea_conf.get(ext_str)
+                if val_t is None:
+                    break
+                if isinstance(val_t, list):
+                    val_t = json_list_value_decode(val_t)
+                setattr(pia, valtmp, val_t)
+
+        fru = ipmifru()
+        if bia is not None:
+            fru.boardInfoArea = bia
+        if pia is not None:
+            fru.productInfoArea = pia
+        fru.recalcute(e2_size)
+        write_rawdata_to_file(fru.bindata, OUTPUT_DIR + e2_name)
+        print("generate fru eeprom rawdata success, output file: %s"% (OUTPUT_DIR + e2_name))
+        return
+    except Exception as e:
+        msg = "generate fru eeprom rawdata %s error, errmsg: %s" % (e2_name, str(e))
+        print(msg)
         return
-    e2_size = int(e2_size, 10)
-    eeprom_conf = {}
-    eeprom_conf["name"] = e2_type
-    eeprom_conf["e2_type"] = e2_type
-    eeprom_conf["e2_path"] = e2_path
-    eeprom_conf["e2_size"] = e2_size
-    eeprom_parase(eeprom_conf)
+
+
+def generate_wedge_value(wedge_dict):
+    global GENERATE_RAWDATA_NUM
+    try:
+        generate_flag = wedge_dict.get("generate_flag", 0)
+        if generate_flag == 0:
+            return
+        GENERATE_RAWDATA_NUM += 1
+        e2_size = wedge_dict.get("e2_size", 256)
+        e2_name = wedge_dict.get("e2_name")
+        if e2_name is None:
+            print("wedge V3 config error, e2_name is None, please check")
+            return
+
+        wedge = Wedge()
+        wedge.fbw_product_name = wedge_dict.get("product_name", "")
+        wedge.fbw_product_number = wedge_dict.get("product_number", "")
+        wedge.fbw_assembly_number = wedge_dict.get("assembly_number", "")
+        wedge.fbw_facebook_pcba_number = wedge_dict.get("fb_pcba_number", "")
+        wedge.fbw_facebook_pcb_number = wedge_dict.get("fb_pcb_number", "")
+        wedge.fbw_odm_pcba_number = wedge_dict.get("odm_pcba_number", "")
+        wedge.fbw_odm_pcba_serial = wedge_dict.get("odm_pcba_serial", "")
+        wedge.fbw_production_state = wedge_dict.get("production_state", 0)
+        wedge.fbw_product_version = wedge_dict.get("product_version", 0)
+        wedge.fbw_product_subversion = wedge_dict.get("product_subversion", 0)
+        wedge.fbw_product_serial = wedge_dict.get("product_serial", "")
+        wedge.fbw_product_asset = wedge_dict.get("product_asset", "")
+        wedge.fbw_system_manufacturer = wedge_dict.get("system_manufacturer", "")
+        wedge.fbw_system_manufacturing_date = wedge_dict.get("system_manufacturing_date", "")
+        wedge.fbw_pcb_manufacturer = wedge_dict.get("pcb_manufacturer", "")
+        wedge.fbw_assembled = wedge_dict.get("assembled", "")
+        wedge.fbw_local_mac = wedge_dict.get("local_mac", "")
+        wedge.fbw_mac_base = wedge_dict.get("mac_base", "")
+        wedge.fbw_mac_size = wedge_dict.get("mac_size", 3)
+        wedge.fbw_location = wedge_dict.get("location", "")
+
+        rawdata = wedge.generate_value(e2_size)
+        write_rawdata_to_file(rawdata, OUTPUT_DIR + e2_name)
+        print("generate wedge V3 eeprom rawdata success, output file: %s"% (OUTPUT_DIR + e2_name))
+        return
+    except Exception as e:
+        msg = "generate wedge V3 eeprom rawdata %s error, errmsg: %s" % (e2_name, str(e))
+        print(msg)
+        return
+
+
+def generate_wedge_v5_value(wedge_v5_dict):
+    global GENERATE_RAWDATA_NUM
+    _value = {}
+    try:
+        generate_flag = wedge_v5_dict.get("generate_flag", 0)
+        if generate_flag == 0:
+            return
+        GENERATE_RAWDATA_NUM += 1
+        e2_size = wedge_v5_dict.get("e2_size", 256)
+        e2_name = wedge_v5_dict.get("e2_name")
+        if e2_name is None:
+            print("wedge V5 config error, e2_name is None, please check")
+            return
+        wedgetlv = WedgeV5()
+        key_list = sorted(wedge_v5_dict.keys())
+        for key in key_list:
+            if not key.startswith("code_"):   # tlv type format msut be "code_XX"
+                continue
+            tlv_type = int(key[5:], 16)
+            tlv_value = wedge_v5_dict[key]
+            if isinstance(tlv_value, list):
+                    tlv_value = json_list_value_decode(tlv_value)
+            _value[tlv_type] = tlv_value
+        rawdata = wedgetlv.generate_value(_value, e2_size)
+        write_rawdata_to_file(rawdata, OUTPUT_DIR + e2_name)
+        print("generate wedge V5 eeprom rawdata success, output file: %s"% (OUTPUT_DIR + e2_name))
+        return
+    except Exception as e:
+        msg = "generate wedge V5 eeprom rawdata %s error, errmsg: %s" % (e2_name, str(e))
+        print(msg)
+        return
+
+
+def unicode_convert(input):
+    if isinstance(input, dict):
+        return {unicode_convert(key): unicode_convert(value) for key, value in input.iteritems()}
+    if isinstance(input, list):
+        return [unicode_convert(element) for element in input]
+    if isinstance(input, unicode):
+        return input.encode('utf-8')
+    return input
+
+
+def generate_eeprom_rawdata(file):
+    status, ret = get_eeprom_config_by_json_file(file)
+    if status is False:
+        print(ret)
+        return
+    if os.path.exists(OUTPUT_DIR):
+        shutil.rmtree(OUTPUT_DIR)
+    os.mkdir(OUTPUT_DIR)
+
+    if PYTHON_VERSION == 2:
+        ret = unicode_convert(ret)
+
+    onie_tlv_conf_list = ret.get("onie_tlv", [])
+    rg_tlv_conf_list = ret.get("fan_tlv", [])
+    fru_conf_list = ret.get("fru", [])
+    wedge_conf_list = ret.get("wedge", [])
+    wedge_v5_conf_list = ret.get("wedge_v5", [])
+
+    for onie_tlv_conf in onie_tlv_conf_list:
+        generate_onie_tlv_value(onie_tlv_conf)
+
+    for fan_tlv_conf in rg_tlv_conf_list:
+        generate_fan_tlv_value(fan_tlv_conf)
+
+    for fru_conf in fru_conf_list:
+        generate_fru_value(fru_conf)
+
+    for wedge_conf in wedge_conf_list:
+        generate_wedge_value(wedge_conf)
+
+    for wedge_v5_conf in wedge_v5_conf_list:
+        generate_wedge_v5_value(wedge_v5_conf)
+
+
+    if GENERATE_RAWDATA_NUM == 0:
+        print("All generate_flag config is 0, no eeprom rawdata was generated.")
     return
 
 
-@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
-def main():
+@click.group(cls=AliasedGroup, invoke_without_command=True)
+@click.help_option('-h', '--help', help='show help info')
+@click.option('-p', '--parse', help='Parse eeprom rawdata of the specified path, support directory and file')
+@click.option('-f', '--file', help='JSON file to generate eeprom rawdata')
+@click.option('-t', '--type', help='Display eeprom information of specified type, support onie_tlv/fru/fantlv/custfru/wedge/wedge_v5')
+@click.option('-s', '--size', type=int, help='Parse eeprom rawdata of the specified path, support directory and file', hidden=True)
+@click.option('-n', '--name', help=E2_NAME_CLICK_HELP)
+@click.pass_context
+def main(ctx, parse, file, type, size, name):
     '''platform eeprom display script'''
+    if ctx.invoked_subcommand is None and parse is None and file is None and type is None and name is None:
+        cli_ctx = click.Context(main)
+        click.echo(cli_ctx.get_help())
+        return
+
+    if file is not None:
+        generate_eeprom_rawdata(file)
+
+    if parse is not None:
+        eeprom_parse(parse, size)
+
+    if type is not None:
+        get_specified_eeprom_info(type)
+
+    if name is not None:
+        get_eeprom_info_by_name(name)
 
 
 # fan eeprom info display
@@ -410,35 +1040,12 @@ def syseeprom(syseeprom_index):
     get_syseeprom_info(syseeprom_index)
 
 
-# fru eeprom info decode
-@main.command()
-@click.argument('e2_path', required=True)
-@click.argument('e2_size', required=False, default="256")
-def fru(e2_path, e2_size):
-    '''e2_path'''
-    decode_eeprom_info("fru", e2_path, e2_size)
-
-
-# fantlv eeprom info decode
-@main.command()
-@click.argument('e2_path', required=True)
-@click.argument('e2_size', required=False, default="256")
-def fantlv(e2_path, e2_size):
-    '''e2_path'''
-    decode_eeprom_info("fantlv", e2_path, e2_size)
-
-
-# onie_tlv eeprom info decode
+# all eeprom info display
 @main.command()
-@click.argument('e2_path', required=True)
-@click.argument('e2_size', required=False, default="256")
-def onie_tlv(e2_path, e2_size):
-    '''e2_path'''
-    decode_eeprom_info("onie_tlv", e2_path, e2_size)
+def all():
+    '''get all eeprom info'''
+    get_all_eeprom_info()
 
 
 if __name__ == '__main__':
-    if os.geteuid() != 0:
-        print("Root privileges are required for this operation")
-        sys.exit(1)
     main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_intf.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_intf.py
index ef27c2392eb4..9015397a5d26 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_intf.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_intf.py
@@ -1,4 +1,20 @@
 #!/usr/bin/env python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import os
 import syslog
 import glob
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_ipmi.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_ipmi.py
index c9b72c99cca9..fa3fbc6ece18 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_ipmi.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_ipmi.py
@@ -1,5 +1,20 @@
 #!/usr/bin/env python3
-# -*- coding: utf-8 -*-
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import sys
 import os
 import syslog
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_manufacturer.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_manufacturer.py
index b2643da9bce4..c9b7cd1441d8 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_manufacturer.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_manufacturer.py
@@ -1,4 +1,19 @@
 #!/usr/bin/env python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 import re
 import mmap
@@ -11,6 +26,7 @@
 import sys
 from platform_config import MANUINFO_CONF
 from monitor import status
+from platform_util import *
 
 
 INDENT = 4
@@ -171,16 +187,9 @@ def removedriver(name):
 
 def deal_itmes(item_list):
     for item in item_list:
-        dealtype = item.get("dealtype")
-        if dealtype == "shell":
-            cmd = item.get("cmd")
-            timeout = item.get("timeout", 10)
-            exec_os_cmd(cmd, timeout)
-        elif dealtype == "io_wr":
-            io_addr = item.get("io_addr")
-            wr_value = item.get("value")
-            io_wr(io_addr, wr_value)
-
+        ret, log = set_value(item)
+        if not ret:
+            print("deal items error:%s" % log)
 
 def get_func_value(funcname, params):
     func = getattr(ExtraFunc, funcname)
@@ -228,7 +237,7 @@ def devfileread(path, offset, length, bit_width):
             for j in range(0, bit_width):
                 val_str += "%02x" % val_list[i + bit_width - j - 1]
     except Exception as e:
-        return str(e)
+        return "%s-%s" % (path, str(e))
     finally:
         if fd > 0:
             os.close(fd)
@@ -495,7 +504,10 @@ def hunt(self):
                 if self.decode is not None:
                     tmp_version = self.decode.get(version)
                     if tmp_version is None:
-                        version = "ERR decode %s failed" % version
+                        if self.decode.get("default") is not None:
+                            version = self.decode.get("default")
+                        else:
+                            version = "ERR decode %s failed" % version
                     else:
                         version = tmp_version
             format_str = "{}{:<{}}{}".format(indent, self.key + ':',
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_power.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_power.py
new file mode 100755
index 000000000000..a624b2087d1c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_power.py
@@ -0,0 +1,111 @@
+#!/usr/bin/env python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+from platform_config import PLATFORM_POWER_CONF
+from platform_util import get_value, get_format_value
+
+
+class Power(object):
+    def __init__(self, conf):
+        self.name = None
+        self.format = None
+        self.unit = None
+        self.val_conf = None
+        self.value = 0
+        self.child_list = []
+        self.status = True
+        self.pre_check = None
+        self.__dict__.update(conf)
+
+    def update_value(self):
+        try:
+            if self.pre_check is not None:
+                ret, val = get_value(self.pre_check)
+                if ret is False:
+                    self.status = False
+                    self.value = "ERR: %s" % val
+                    return
+                mask = self.pre_check.get("mask")
+                if isinstance(val, str):
+                    value = int(val, 16)
+                else:
+                    value = val
+                ttt = value & mask
+                okval = self.pre_check.get("okval")
+                if ttt != okval:
+                    self.status = False
+                    self.value = "%s" % self.pre_check.get("not_ok_msg")
+                    return
+
+            val_list = []
+            for val_conf_item in self.val_conf:
+                ret, val_tmp = get_value(val_conf_item)
+                if ret is False:
+                    self.status = False
+                    self.value = "ERR: %s" % val_tmp
+                    return
+                val_list.append(val_tmp)
+            val_tuple = tuple(val_list)
+            value = get_format_value(self.format % (val_tuple))
+            self.status = True
+            self.value = round(float(value), 1)
+            return
+        except Exception as e:
+            self.status = False
+            self.value = "ERR: %s" % str(e)
+            return
+
+
+def run():
+    if len(PLATFORM_POWER_CONF) == 0:
+        print("platform_power config error, config len is 0!")
+        return
+
+    power_obj_list = []
+    for power_item in PLATFORM_POWER_CONF:
+        power_obj = Power(power_item)
+        tmp_value = 0
+        power_obj.child_list = []
+        children = power_item.get("children")
+        # get power value with children
+        if children is not None:
+            for child in children:
+                child_obj = Power(child)
+                power_obj.child_list.append(child_obj)
+                child_obj.update_value()
+                if child_obj.status is True:
+                    tmp_value += child_obj.value
+            power_obj.value = round(float(tmp_value), 1)
+        else:
+            power_obj.update_value()
+
+        if power_obj.status is False:
+            print("%-34s : %s" % (power_obj.name, power_obj.value))
+        else:
+            print("%-34s : %s %s" % (power_obj.name, power_obj.value, power_obj.unit))
+        if len(power_obj.child_list) != 0:
+            for obj in power_obj.child_list:
+                if obj.status is False:
+                    print("    %-30s : %s" % (obj.name, obj.value))
+                else:
+                    print("    %-30s : %s %s" % (obj.name, obj.value, obj.unit))
+        print("")
+    return
+
+
+if __name__ == "__main__":
+    run()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py
index 6013c5d65853..3c76dd447a7d 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py
@@ -1,4 +1,20 @@
 #!/usr/bin/env python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import os
 import subprocess
 import glob
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py
index cea20393195f..b7f5ca29d427 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py
@@ -1,9 +1,35 @@
 #!/usr/bin/python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 import os
 import sys
 import importlib.machinery
 
+try:
+    from platform_sensors_hal import Platoform_sensor_hal
+
+    platform_sensor_hal = Platoform_sensor_hal()
+    print_src = platform_sensor_hal.get_sensor_print_src()
+    if print_src == "s3ip":
+        platform_sensor_hal.getsensors()
+        sys.exit(0)
+except Exception as e:
+    pass
+        
 
 def get_machine_info():
     if not os.path.isfile('/host/machine.conf'):
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors_hal.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors_hal.py
new file mode 100755
index 000000000000..7e505b59abe9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors_hal.py
@@ -0,0 +1,280 @@
+#!/usr/bin/env python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+import os
+import sys
+from plat_hal.interface import interface, getplatform_name
+from collections import OrderedDict
+
+class Platoform_sensor_hal(object):
+
+    # status showed
+    __STATUS_OK = "OK"
+    __STATUS_ABSENT = "ABSENT"
+    __STATUS_NOT_OK = "NOT OK"
+    __STATUS_FAILED = "GET FAILED"
+
+    def __init__(self):
+        self.int_case = interface()
+
+    def print_console(self, msg):
+        print(msg)
+
+    def print_platform(self):
+        platform_info = getplatform_name()
+        self.print_console(platform_info)
+        self.print_console("")
+
+    def print_boardtemp(self):
+        try:
+            '''
+            eg: cpu temp, mac temp and others
+            Onboard Temperature Sensors:
+            BASE_air_inlet       : 17.0 C (high = 80.0 C)
+            MCU_air_inlet0       : 16.5 C (high = 80.0 C)
+            MCU_air_inlet1       : 16.5 C (high = 80.0 C)
+            '''
+            info_dict = self.int_case.get_temp_info_s3ip()
+    
+            monitor_sensor = []
+            for sensor_key, sensor_info in info_dict.items():
+                monitor_one_sensor_dict = OrderedDict()
+                monitor_one_sensor_dict['id'] = sensor_key
+                try:
+                    monitor_one_sensor_dict['temp1_input'] = float(sensor_info["Value"]) / 1000
+                    monitor_one_sensor_dict['temp1_max'] = float(sensor_info["Max"]) / 1000
+                except Exception:
+                    monitor_one_sensor_dict["status"] = self.__STATUS_FAILED
+                # monitor_one_sensor_dict['temp1_max_hyst'] = sensor_info["High"]
+                monitor_sensor.append(monitor_one_sensor_dict)
+    
+            print_info_str = ""
+            toptile = "Onboard Temperature Sensors:"
+            errformat = "    {id:<25} : {status}"
+            # formatstr = "    {id:<20} : {temp1_input} C (high = {temp1_max} C, hyst = {temp1_max_hyst} C)"
+            formatstr = "    {id:<25} : {temp1_input} C (high = {temp1_max} C)"
+    
+            if len(monitor_sensor) != 0:
+                print_info_str += toptile + '\n'
+                for item in monitor_sensor:
+                    realformat = formatstr if item.get('status', self.__STATUS_OK) == self.__STATUS_OK else errformat
+                    print_info_str += realformat.format(**item) + '\n'
+                self.print_console(print_info_str)
+        except Exception:
+            pass
+
+    def print_fan_sensor(self):
+        try:
+            '''
+            eg:
+            Onboard fan Sensors:
+            fan1 :
+                fan_type  :FAN18K8086-F
+                sn        :0000000000000
+                hw_version:00
+                Speed     :
+                    speed_front :12077 RPM
+                    speed_rear  :10231 RPM
+                status    :OK
+            '''
+            fans = self.int_case.get_fans()
+            fan_dict = self.int_case.get_fan_info_all()
+            monitor_fans = []
+            for fan in fans:
+                monitor_one_fan_dict = OrderedDict()
+                monitor_one_fan_dict["id"] = fan.name
+                present = fan_dict.get(fan.name).get("Present")
+                if present == "no":
+                    monitor_one_fan_dict["status"] = self.__STATUS_ABSENT
+                else:
+                    monitor_one_fan_dict["fan_type"] = fan_dict.get(fan.name).get("DisplayName")
+                    monitor_one_fan_dict["sn"] = fan_dict.get(fan.name).get("SN")
+                    monitor_one_fan_dict["hw_version"] = fan_dict.get(fan.name).get("HW")
+        
+                    all_rotors_ok = True
+                    rotor_speeds = {}
+                    for rotor in fan.rotor_list:
+                        rotor_info = fan_dict.get(fan.name).get(rotor.name)
+                        rotor_speeds[rotor.name] = rotor_info.get("Speed")
+                        running = rotor_info.get("Running")
+                        hw_alarm = rotor_info.get("HwAlarm")
+                        if running != "yes" or hw_alarm != "no":
+                            all_rotors_ok = False
+                    monitor_one_fan_dict.update(rotor_speeds)
+                    monitor_one_fan_dict["status"] = self.__STATUS_OK if all_rotors_ok else self.__STATUS_NOT_OK
+                monitor_one_fan_dict["rotor_num"] = len(fan.rotor_list)
+                monitor_fans.append(monitor_one_fan_dict)
+    
+            print_info_str = ""
+            toptile = "Onboard fan Sensors:"
+            errformat = "    {id} : {status}\n"  # "    {id:<20} : {status}"
+            fan_signle_rotor_format = "    {id} : \n"  \
+                "        fan_type  : {fan_type}\n"  \
+                "        sn        : {sn}\n"  \
+                "        hw_version: {hw_version}\n"  \
+                "        Speed     : {Speed} RPM\n"     \
+                "        status    : {status} \n"
+            fan_double_rotor_format = "    {id} : \n"  \
+                "        fan_type  : {fan_type}\n"  \
+                "        sn        : {sn}\n"  \
+                "        hw_version: {hw_version}\n"  \
+                "        Speed     :\n"     \
+                "            speed_front : {Rotor1:<5} RPM\n"     \
+                "            speed_rear  : {Rotor2:<5} RPM\n"     \
+                "        status    : {status} \n"
+    
+            if len(monitor_fans) != 0:
+                print_info_str += toptile + '\n'
+                for item in monitor_fans:
+                    if item.get("rotor_num", 1) == 2:
+                        realformat = fan_double_rotor_format if item.get('status', self.__STATUS_OK) == self.__STATUS_OK else errformat
+                    else:
+                        realformat = fan_signle_rotor_format if item.get('status', self.__STATUS_OK) == self.__STATUS_OK else errformat
+                    print_info_str += realformat.format(**item)
+                self.print_console(print_info_str)
+        except Exception:
+            pass
+
+    def print_psu_sensor(self):
+        try:
+            '''
+            Onboard Power Supply Unit Sensors:
+            psu1 :
+                type       :PSA2000CRPS-F
+                sn         :R693A3D100003
+                in_current :1.8 A
+                in_voltage :237.8 V
+                out_current:30.1 A
+                out_voltage:12.2 V
+                temp       :22.5 C
+                fan_speed  :26656 RPM
+                in_power   :413.0 W
+                out_power  :366.5 W
+            '''
+            psus = self.int_case.get_psus()
+            psu_dict = self.int_case.get_psu_info_all()
+            monitor_psus = []
+            for psu in psus:
+                monitor_one_psu_dict = OrderedDict()
+                monitor_one_psu_dict["id"] = psu.name
+                present = psu_dict.get(psu.name).get("Present")
+                if present == "no":
+                    monitor_one_psu_dict["status"] = self.__STATUS_ABSENT
+                else:
+                    monitor_one_psu_dict["type"] = psu_dict.get(psu.name).get("PN")
+                    monitor_one_psu_dict["sn"] = psu_dict.get(psu.name).get("SN")
+                    monitor_one_psu_dict["in_current"] = psu_dict.get(psu.name).get("Inputs").get("Current").get("Value")
+                    monitor_one_psu_dict["in_voltage"] = psu_dict.get(psu.name).get("Inputs").get("Voltage").get("Value")
+                    monitor_one_psu_dict["out_current"] = psu_dict.get(psu.name).get("Outputs").get("Current").get("Value")
+                    monitor_one_psu_dict["out_voltage"] = psu_dict.get(psu.name).get("Outputs").get("Voltage").get("Value")
+                    monitor_one_psu_dict["temp"] = psu_dict.get(psu.name).get("Temperature").get("Value")
+                    monitor_one_psu_dict["fan_speed"] = psu_dict.get(psu.name).get("FanSpeed").get("Value")
+                    monitor_one_psu_dict["in_power"] = psu_dict.get(psu.name).get("Inputs").get("Power").get("Value")
+                    monitor_one_psu_dict["out_power"] = psu_dict.get(psu.name).get("Outputs").get("Power").get("Value")
+                monitor_psus.append(monitor_one_psu_dict)
+
+            print_info_str = ""
+            toptile = "Onboard Power Supply Unit Sensors:"
+            errformat = "    {id} : {status}\n"  # "    {id:<20} : {status}"
+            psuformat = "    {id} : \n"  \
+                        "        type       : {type}\n"  \
+                        "        sn         : {sn}\n"  \
+                        "        in_current : {in_current} A\n"  \
+                        "        in_voltage : {in_voltage} V\n"     \
+                        "        out_current: {out_current} A\n"     \
+                        "        out_voltage: {out_voltage} V\n"     \
+                        "        temp       : {temp} C        \n"     \
+                        "        fan_speed  : {fan_speed} RPM\n"     \
+                        "        in_power   : {in_power} W\n"        \
+                        "        out_power  : {out_power} W\n"
+
+            if len(monitor_psus) != 0:
+                print_info_str += toptile + '\r\n'
+                for item in monitor_psus:
+                    realformat = psuformat if item.get('status', self.__STATUS_OK) == self.__STATUS_OK else errformat
+                    print_info_str += realformat.format(**item)
+                self.print_console(print_info_str)
+        except Exception:
+            pass
+
+    def print_boarddcdc(self):
+        try:
+            '''
+            eg:
+            Onboard DCDC Sensors:
+            CPU_VCCIN                        : 12.187 V (Min = 1.500  V, Max = 2.000  V)
+            CPU_P1V8                         : 1.780  V (Min = 1.710  V, Max = 1.890  V)
+            CPU_P1V05                        : 12.250 V (Min = 1.000  V, Max = 1.120  V)
+            CPU_VNN_PCH                      : 1.060  V (Min = 0.600  V, Max = 1.200  V)
+            CPU_P1V2_VDDQ                    : 12.125 V (Min = 1.140  V, Max = 1.260  V)
+            CPU_VNN_NAC                      : 12.187 V (Min = 0.600  V, Max = 1.200  V)
+            CPU_VCC_ANA                      : 0.845  V (Min = 0.950  V, Max = 1.050  V)
+            CPU_P1V05                        : 1.057  V (Min = 0.990  V, Max = 1.130  V)
+            '''
+
+            dcdc_dict = self.int_case.get_dcdc_all_info()
+            monitor_sensor = []
+            for sensor_key, sensor_info in dcdc_dict.items():
+                monitor_one_sensor_dict = OrderedDict()
+                monitor_one_sensor_dict['id'] = sensor_key
+                try:
+                    monitor_one_sensor_dict['dcdc_input'] = float(sensor_info["Value"]) / 1000
+                    monitor_one_sensor_dict['dcdc_unit'] = sensor_info["Unit"]
+                    monitor_one_sensor_dict['dcdc_min'] = float(sensor_info["Min"]) / 1000
+                    monitor_one_sensor_dict['dcdc_unit'] = sensor_info["Unit"]
+                    monitor_one_sensor_dict['dcdc_max'] = float(sensor_info["Max"]) / 1000
+                    monitor_one_sensor_dict['dcdc_unit'] = sensor_info["Unit"]
+                    monitor_one_sensor_dict["status"] = sensor_info["Status"]
+                except Exception:
+                    monitor_one_sensor_dict["status"] = self.__STATUS_FAILED
+                monitor_sensor.append(monitor_one_sensor_dict)
+
+            print_info_str = ""
+            toptile = "Onboard DCDC Sensors:"
+            errformat = "    {id:<26} : {errmsg}"
+            ok_formatstr = "    {id:<26} : {dcdc_input:<6} {dcdc_unit:<1} (Min = {dcdc_min:<6} {dcdc_unit:<1}, Max = {dcdc_max:<6} {dcdc_unit:<1})"
+            nok_formatstr = "    {id:<26} : {dcdc_input:<6} {dcdc_unit:<1} (Min = {dcdc_min:<6} {dcdc_unit:<1}, Max = {dcdc_max:<6} {dcdc_unit:<1}) ({status:<6})"
+
+            if len(monitor_sensor) != 0:
+                print_info_str += toptile + '\n'
+                for item in monitor_sensor:
+                    if item.get("status", self.__STATUS_OK) == self.__STATUS_OK:
+                        realformat = ok_formatstr
+                    elif item.get("status", self.__STATUS_OK) == self.__STATUS_NOT_OK:
+                        realformat = nok_formatstr
+                    else:
+                        realformat = errformat
+                    print_info_str += realformat.format(**item) + '\n'
+                self.print_console(print_info_str)
+        except Exception:
+            pass
+
+    def getsensors(self):
+        self.print_platform()
+        self.print_boardtemp()
+        # self.print_macpower_sensors()
+        self.print_fan_sensor()
+        self.print_psu_sensor()
+        # self.print_slot_sensor()
+        self.print_boarddcdc()
+    
+    def get_sensor_print_src(self):
+        return self.int_case.get_sensor_print_src()
+
+if __name__ == "__main__":
+    platform_sensor_hal = Platoform_sensor_hal()
+    platform_sensor_hal.getsensors()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_test.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_test.py
index da7119a9ce49..a7c39264c791 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_test.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_test.py
@@ -1,5 +1,19 @@
 #!/usr/bin/env python3
-# -*- coding: UTF-8 -*-
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 try:
     import click
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_util.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_util.py
index fe4d564ad604..2187b391a230 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_util.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_util.py
@@ -1,4 +1,19 @@
 #!/usr/bin/python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 import sys
 import os
@@ -69,6 +84,8 @@ def get_op_value(self, node):
             value = node.n
         elif isinstance(node, ast.Str):      # node is Str Constant
             value = node.s
+        elif isinstance(node, ast.List):     # node is List Constant
+            value = [element.value for element in node.elts]
         else:
             raise NotImplementedError("Unsupport operand type: %s" % type(node))
         return value
@@ -117,7 +134,7 @@ def visit_Call(self, node):
         int support one or two parameters, eg: int(xxx) or int(xxx, 16)
         xxx can be ast.Call/ast.Constant(ast.Num/ast.Str)/ast.BinOp
         '''
-        calc_tuple = ("float", "int", "str")
+        calc_tuple = ("float", "int", "str", "max", "min")
 
         if node.func.id not in calc_tuple:
             raise NotImplementedError("Unsupport function call type: %s" % node.func.id)
@@ -125,7 +142,10 @@ def visit_Call(self, node):
         args_val_list = []
         for item in node.args:
             ret = self.get_op_value(item)
-            args_val_list.append(ret)
+            if isinstance(ret, list):
+                args_val_list.extend(ret)
+            else:
+                args_val_list.append(ret)
 
         if node.func.id == "str":
             if len(args_val_list) != 1:
@@ -140,6 +160,16 @@ def visit_Call(self, node):
             value = float(args_val_list[0])
             self.value = value
             return value
+
+        if node.func.id == "max":
+            value = max(args_val_list)
+            self.value = value
+            return value
+
+        if node.func.id == "min":
+            value = min(args_val_list)
+            self.value = value
+            return value
         # int
         if len(args_val_list) == 1:
             value = int(args_val_list[0])
@@ -375,14 +405,20 @@ def dev_file_write(path, offset, buf_list):
     msg = ""
     fd = -1
 
-    if not isinstance(buf_list, list) or len(buf_list) == 0:
-        msg = "buf:%s is not list type or is NONE !" % buf_list
-        return False, msg
-
     if not os.path.exists(path):
         msg = path + " not found !"
         return False, msg
 
+    if isinstance(buf_list, list):
+        if len(buf_list) == 0:
+            msg = "buf_list:%s is NONE !" % buf_list
+            return False, msg
+    elif isinstance(buf_list, int):
+        buf_list = [buf_list]
+    else:
+        msg = "buf_list:%s is not list type or not int type !" % buf_list
+        return False, msg
+
     try:
         fd = os.open(path, os.O_WRONLY)
         os.lseek(fd, offset, os.SEEK_SET)
@@ -565,6 +601,9 @@ def get_value_once(config):
             read_len = config.get("read_len")
             ret, val_list = dev_file_read(path, offset, read_len)
             if ret is True:
+                if read_len == 1:
+                    val = val_list[0]
+                    return True, val
                 return True, val_list
             return False, ("devfile read failed. path:%s, offset:0x%x, read_len:%d" % (path, offset, read_len))
         if way == 'cmd':
@@ -578,7 +617,16 @@ def get_value_once(config):
             if os.path.exists(judge_file):
                 return True, True
             return True, False
-        return False, "not support read type"
+        if way == 'pci':
+            pcibus = config.get("pcibus")
+            slot = config.get("slot")
+            fn = config.get("fn")
+            bar = config.get("bar")
+            offset = config.get("offset")
+            data = config.get("data")
+            return wbpcird(pcibus, slot, fn, bar, offset, data)
+
+        return False, ("%s is not support read type" % way)
     except Exception as e:
         return False, ("get_value_once exception:%s happen" % str(e))
 
@@ -668,7 +716,7 @@ def set_value_once(config):
             ret, log = dev_file_write(path, offset, buf_list)
             if ret is True:
                 return True, ("devfile write path:%s, offset:0x%x, buf_list:%s success." % (path, offset, buf_list))
-            return False, ("devfile read  path:%s, offset:0x%x, buf_list:%s failed.log:%s" %
+            return False, ("devfile write  path:%s, offset:0x%x, buf_list:%s failed.log:%s" %
                            (path, offset, buf_list, log))
         if way == 'cmd':
             cmd = config.get("cmd")
@@ -703,7 +751,16 @@ def set_value_once(config):
                 return False, ("remove file %s failed, log: %s" % (file_name, log))
             exec_os_cmd("sync")
             return True, ("remove file %s success" % file_name)
-        return False, "not support write type"
+        if way == 'pci':
+            pcibus = config.get("pcibus")
+            slot = config.get("slot")
+            fn = config.get("fn")
+            bar = config.get("bar")
+            offset = config.get("offset")
+            data = config.get("data")
+            return wbpciwr(pcibus, slot, fn, bar, offset, data)
+
+        return False, ("%s not support write type" % way)
     except Exception as e:
         return False, ("set_value_once exception:%s happen" % str(e))
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/pmon_syslog.py b/platform/broadcom/sonic-platform-modules-micas/common/script/pmon_syslog.py
index 8bdceef8c1b5..95c1eebe5ab2 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/pmon_syslog.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/pmon_syslog.py
@@ -1,8 +1,20 @@
 #!/usr/bin/python3
-#   * onboard interval check
-#   * FAN trays
-#   * PSU
-#   * SFF
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import time
 import syslog
 import traceback
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/power_ctrl.py b/platform/broadcom/sonic-platform-modules-micas/common/script/power_ctrl.py
new file mode 100755
index 000000000000..bc43168c68f2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/power_ctrl.py
@@ -0,0 +1,333 @@
+#!/usr/bin/env python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+import syslog
+import click
+import os
+import fcntl
+import time
+import sys
+from platform_util import get_value, set_value
+from platform_config import POWER_CTRL_CONF
+
+
+POWERCTLDEBUG = 0
+OE_SUPPROT_OPERATE = ("status", "off", "on", "reset")
+STATUS_OFF = "off"
+STATUS_ON = "on"
+STATUS_UNKNOWN = "unknown"
+CLI_CONFIRM = True
+POWER_CTRL_DEBUG_FILE = "/etc/.power_control_debug"
+CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
+
+
+class AliasedGroup(click.Group):
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        if len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+        return None
+
+
+def debug_init():
+    global POWERCTLDEBUG
+    if os.path.exists(POWER_CTRL_DEBUG_FILE):
+        POWERCTLDEBUG = 1
+    else:
+        POWERCTLDEBUG = 0
+
+
+def powerctrldebug(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    if POWERCTLDEBUG == 1:
+        syslog.openlog("POWERCTRL", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def get_status_once(conf):
+    val_conf = conf.get("val_conf", {})
+    ret, val = get_value(val_conf)
+    if ret is False:
+        powerctrldebug("get_status_once failure, val_conf: %s, msg: %s" % (val_conf, val))
+        return STATUS_UNKNOWN
+
+    if isinstance(val, str):
+        val_tmp = int(val, 16)
+    else:
+        val_tmp = val
+
+    mask = val_conf.get("mask")
+    if mask is not None:
+        value = val_tmp & mask
+    else:
+        value = val_tmp
+
+    powerctrldebug("val_conf: %s, value: %s, val_tmp: %s, mask: %s" % (val_conf, value, val_tmp, mask))
+    off_val_list = conf.get("off", [])
+    if value in off_val_list:
+        powerctrldebug("value: %s, is in off_val_list: %s, status is off" % (value, off_val_list))
+        return STATUS_OFF
+
+    on_val_list = conf.get("on", [])
+    if value in on_val_list:
+        powerctrldebug("value: %s, is in on_val_list: %s, status is on" % (value, on_val_list))
+        return STATUS_ON
+
+    powerctrldebug("value: %s, not in off_val_list: %s, and on_val_list: %s" % (value, off_val_list, on_val_list))
+    return STATUS_UNKNOWN
+
+
+def get_status(conf):
+    status_list = []
+    for item in conf:
+        status = get_status_once(item)
+        break_status = item.get("break_status", [])
+        if status in break_status:
+            powerctrldebug("status: %s is in break status: %s, return" % (status, break_status))
+            return status
+        status_list.append(status)
+    if len(set(status_list)) == 1: # All states are consistent
+        powerctrldebug("All states are consistent, status_list: %s, return status: %s" % (status_list, status_list[0]))
+        return status_list[0]
+    # status list inconsistent
+    powerctrldebug("The status in the status list is inconsistent, status_list: %s" % status_list)
+    return STATUS_UNKNOWN
+
+
+def do_power_operation(conf):
+    for item in conf:
+        ret, msg = set_value(item)
+        if ret is False:
+            powerctrldebug("set value failed, conf: %s, msg %s" % (item, msg))
+            return ret, msg
+        powerctrldebug("set value success, conf: %s" % item)
+    return True, ""
+
+
+def do_power_off(name, conf, cli_confirm):
+    power_conf = conf.get("off")
+    if power_conf is None:
+        msg = ("power off config is none, can't do power off operation.")
+        return False, msg
+
+    if cli_confirm is True and not click.confirm("Are you sure you want to power off %s?" % name):
+        click.echo('Aborted.')
+        sys.exit(0)
+    ret, msg = do_power_operation(power_conf)
+    return ret, msg
+
+
+def do_power_on(name, conf, cli_confirm):
+    power_conf = conf.get("on")
+    if power_conf is None:
+        msg = ("power on config is none, can't do power on operation.")
+        return False, msg
+
+    if cli_confirm is True and not click.confirm("Are you sure you want to power on %s?" % name):
+        click.echo('Aborted.')
+        sys.exit(0)
+    ret, msg = do_power_operation(power_conf)
+    return ret, msg
+
+
+def do_power_cycle(name, conf, cli_confirm):
+    if cli_confirm is True and not click.confirm("Are you sure you want to power cycle %s?" % name):
+        click.echo('Aborted.')
+        sys.exit(0)
+
+    power_conf = conf.get("cycle")
+    if power_conf is not None:
+        ret, msg = do_power_operation(power_conf)
+        return ret, msg
+    # power cycle config is none, try to power off then power on
+    ret, msg = do_power_off(name, conf, False)
+    if ret is False:
+        return ret, msg
+    ret, msg = do_power_on(name, conf, False)
+    return ret, msg
+
+
+def do_power_reset(name, conf, cli_confirm):
+    power_conf = conf.get("reset")
+    if power_conf is None:
+        msg = ("power reset config is none, can't do power reset operation.")
+        return False, msg
+
+    if cli_confirm is True and not click.confirm("Are you sure you want to power on %s?" % name):
+        click.echo('Aborted.')
+        sys.exit(0)
+
+    ret, msg = do_power_operation(power_conf)
+    return ret, msg
+
+
+def do_operation(conf, command):
+    name = conf.get("name")
+
+    # First get the current status before any operation
+    curr_status = None
+    status_conf = conf.get("status")
+    if status_conf is None:
+        powerctrldebug("%s status config is None" % name)
+    else:
+        curr_status = get_status(status_conf)
+        powerctrldebug("%s get_status %s" % (name, curr_status))
+
+    # get status command
+    if command == "status":
+        if curr_status is None:
+            print("Can't get %s %s config" % (name, command))
+        else:
+            print("Power status for %s: %s" % (name, curr_status))
+        return
+
+    # power off command
+    if command == "off":
+        if curr_status == "off":
+            print("%s is already powered off..." % name)
+            return
+        ret, msg = do_power_off(name, conf, CLI_CONFIRM)
+        if ret is False:
+            print("%s powered off failure, msg: %s" % (name, msg))
+        else:
+            print("%s powered off successfully" % name)
+        return
+
+    # power on command
+    if command == "on":
+        if curr_status == "on":
+            print("%s is already powered on..." % name)
+            return
+        ret, msg =  do_power_on(name, conf, CLI_CONFIRM)
+        if ret is False:
+            print("%s powered on failure, msg: %s" % (name, msg))
+        else:
+            print("%s powered on successfully" % name)
+        return
+
+    # power cycle command
+    if command == "cycle":
+        if curr_status == "off":
+            # current status is off, do powered on to powered cycle
+            powerctrldebug("%s current status is off, try to do powered on" % name)
+            ret, msg = do_power_on(name, conf, CLI_CONFIRM)
+        else:
+            # current status is not off, do powered cycle
+            powerctrldebug("%s current status is not off, try to do powered cycle" % name)
+            ret, msg = do_power_cycle(name, conf, CLI_CONFIRM)
+
+        if ret is False:
+            print("%s powered cycle failure, msg: %s" % (name, msg))
+        else:
+            print("%s powered cycle successfully" % name)
+        return
+
+    # power reset command
+    if curr_status == "off":
+        print("%s is currently powered off. Please power it on before performing the reset operation." % name)
+        return
+    ret, msg = do_power_reset(name, conf, CLI_CONFIRM)
+    if ret is False:
+        print("%s powered reset failure, msg: %s" % (name, msg))
+    else:
+        print("%s powered reset successfully" % name)
+    return
+
+
+def do_oe_power_ctrl(oe_index, command):
+    oe_power_conf = POWER_CTRL_CONF.get("oe", [])
+    oe_num = len(oe_power_conf)
+    if oe_num == 0:
+        print("OE power control config is none, don't support oe power control.")
+        return
+
+    if oe_index < 0 or oe_index >= oe_num:
+        print("Invalid oe index: %d, oe index must [0~%d]" % (oe_index, oe_num -1))
+        return
+
+    if command not in OE_SUPPROT_OPERATE:
+        print("Unsupported operation command: %s" % command)
+        return
+
+    oe_power_conf_item = oe_power_conf[oe_index]
+
+    do_operation(oe_power_conf_item, command)
+    return
+
+
+pidfile = 0
+def ApplicationInstance():
+    global pidfile
+    pidfile = open(os.path.realpath(__file__), "r")
+    try:
+        fcntl.flock(pidfile, fcntl.LOCK_EX | fcntl.LOCK_NB)
+        return True
+    except Exception:
+        return False
+
+
+# Single-process execution only
+def cli_ready_check():
+    start_time = time.time()
+    while True:
+        ret = ApplicationInstance()
+        if ret is True:
+            break
+
+        if time.time() - start_time < 0:
+            start_time = time.time()
+
+        if time.time() - start_time > 10:
+            print("Please wait for the power_ctrl command to complete before performing further operations")
+            sys.exit(1)
+        time.sleep(0.1)
+    return
+
+
+@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
+@click.help_option('-h', '--help', help='show help info')
+@click.option('-y', '--yes', is_flag=True, help='Automatically confirm and skip the prompt.', hidden=True)
+def main(yes):
+    '''power control script'''
+    global CLI_CONFIRM
+    if yes is True:
+        CLI_CONFIRM = False
+
+
+# oe power control
+@main.command()
+@click.argument('oe_index', required=True, type=int)
+@click.argument('command', required=True)
+def oe(oe_index, command):
+    '''OE_INDEX: start from 0, COMMAND: off, on, reset, status'''
+    do_oe_power_ctrl(oe_index, command)
+
+
+if __name__ == '__main__':
+    if os.geteuid() != 0:
+        print("Root privileges are required for this operation")
+        sys.exit(1)
+    cli_ready_check()
+    debug_init()
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/reboot_cause.py b/platform/broadcom/sonic-platform-modules-micas/common/script/reboot_cause.py
index 2f125c5084c2..0020dd32b9d1 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/reboot_cause.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/reboot_cause.py
@@ -1,5 +1,20 @@
 #!/usr/bin/python3
-# -*- coding: UTF-8 -*-
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import sys
 import os
 import time
@@ -45,8 +60,12 @@ def monitor_point_check(self, item):
             ret, value = get_value(item)
             if ret is True:
                 if compare_mode == "equal":
-                    if value == okval:
-                        return True
+                    if isinstance(okval, list):
+                        if value in okval:
+                            return True
+                    else:
+                        if value == okval:
+                            return True
                 elif compare_mode == "great":
                     if value > okval:
                         return True
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/reboot_ctrl.py b/platform/broadcom/sonic-platform-modules-micas/common/script/reboot_ctrl.py
deleted file mode 100755
index 17d3f5902b9d..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/reboot_ctrl.py
+++ /dev/null
@@ -1,150 +0,0 @@
-#!/usr/bin/env python3
-# -*- coding: UTF-8 -*-
-import time
-import syslog
-import click
-from platform_util import write_sysfs, wbi2cset, io_wr, wbi2csetWord
-from platform_config import REBOOT_CTRL_PARAM
-
-
-REBOOTCTLDEBUG = 0
-
-CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
-
-
-class AliasedGroup(click.Group):
-    def get_command(self, ctx, cmd_name):
-        rv = click.Group.get_command(self, ctx, cmd_name)
-        if rv is not None:
-            return rv
-        matches = [x for x in self.list_commands(ctx)
-                   if x.startswith(cmd_name)]
-        if not matches:
-            return None
-        if len(matches) == 1:
-            return click.Group.get_command(self, ctx, matches[0])
-        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
-        return None
-
-
-def rebootctrlwarning(s):
-    # s = s.decode('utf-8').encode('gb2312')
-    syslog.openlog("REBOOTCTRL", syslog.LOG_PID)
-    syslog.syslog(syslog.LOG_WARNING, s)
-
-
-def rebootctrlcritical(s):
-    # s = s.decode('utf-8').encode('gb2312')
-    syslog.openlog("REBOOTCTRL", syslog.LOG_PID)
-    syslog.syslog(syslog.LOG_CRIT, s)
-
-
-def rebootctrlerror(s):
-    # s = s.decode('utf-8').encode('gb2312')
-    syslog.openlog("REBOOTCTRL", syslog.LOG_PID)
-    syslog.syslog(syslog.LOG_ERR, s)
-
-
-def rebootctrldebug(s):
-    # s = s.decode('utf-8').encode('gb2312')
-    if REBOOTCTLDEBUG == 1:
-        syslog.openlog("REBOOTCTRL", syslog.LOG_PID)
-        syslog.syslog(syslog.LOG_DEBUG, s)
-
-
-class RebootCtrl():
-    def __init__(self):
-        self.config = REBOOT_CTRL_PARAM.copy()
-
-    def set_value(self, config, val):
-        way = config.get("gettype")
-        if way == 'sysfs':
-            loc = config.get("loc")
-            value = config.get(val)
-            rebootctrldebug("sysfs type.loc:0x%x, value:0x%x" % (loc, value))
-            return write_sysfs(loc, "0x%02x" % value)
-        if way == "i2c":
-            bus = config.get("bus")
-            addr = config.get("loc")
-            offset = config.get("offset")
-            value = config.get(val)
-            rebootctrldebug("i2c type.bus:0x%x, addr:0x%x, offset:0x%x, value:0x%x" % (bus, addr, offset, value))
-            return wbi2cset(bus, addr, offset, value)
-        if way == "io":
-            io_addr = config.get('io_addr')
-            value = config.get(val)
-            rebootctrldebug("io type.io_addr:0x%x, value:0x%x" % (io_addr, value))
-            ret = io_wr(io_addr, value)
-            if ret is not True:
-                return False, ("write 0x%x failed" % io_addr)
-            return True, ("write 0x%x success" % io_addr)
-        if way == 'i2cword':
-            bus = config.get("bus")
-            addr = config.get("loc")
-            offset = config.get("offset")
-            value = config.get(val)
-            rebootctrldebug("i2cword type.bus:0x%x, addr:0x%x, offset:0x%x, value:0x%x" % (bus, addr, offset, value))
-            return wbi2csetWord(bus, addr, offset, value)
-        return False, "unsupport way: %s" % way
-
-    def reset_operate(self, config):
-        ret, log = self.set_value(config, "rst_val")
-        rst_delay = config.get("rst_delay", 0)
-        time.sleep(rst_delay)
-        return ret, log
-
-    def unlock_reset_operate(self, config):
-        ret, log = self.set_value(config, "unlock_rst_val")
-        unlock_rst_delay = config.get("unlock_rst_delay", 0)
-        time.sleep(unlock_rst_delay)
-        return ret, log
-
-    def do_rebootctrl(self, option):
-        if self.config is None:
-            rebootctrlerror("Reset failed, REBOOT_CTRL_PARAM cfg get failed.")
-            return
-        try:
-            name_conf = self.config.get(option, None)
-            if name_conf is None:
-                print("Reset %s not support" % option)
-                return
-            try:
-                click.confirm("Are you sure you want to reset " + option + "?",
-                              default=False, abort=True, show_default=True)
-            except Exception as e:
-                print("Aborted, msg: %s" % str(e))
-                return
-            print("Reset %s start" % option)
-            ret, log = self.reset_operate(name_conf)
-            if ret is False:
-                rebootctrlerror(log)
-                print("Reset %s failed" % option)
-                return
-            if "unlock_rst_val" in name_conf:
-                ret, log = self.unlock_reset_operate(name_conf)
-                if ret is False:
-                    rebootctrlerror(log)
-                    print("%s unlock reset failed" % option)
-                    return
-            print("Reset %s success" % option)
-        except Exception:
-            rebootctrlerror("do_rebootctrl Exception error")
-        return
-
-
-@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
-def main():
-    '''reboot_ctrl reset [option]'''
-
-
-@main.command()
-@click.argument('option', required=True)
-def reset(option):
-    '''reset device'''
-    rebootctrldebug("reboot ctrl option %s" % option)
-    rebootctrl = RebootCtrl()
-    rebootctrl.do_rebootctrl(option)
-
-
-if __name__ == '__main__':
-    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/sensors b/platform/broadcom/sonic-platform-modules-micas/common/script/sensors
index a2c72b123a43..f81cc18bfb7a 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/sensors
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/sensors
@@ -1,6 +1,21 @@
 #!/bin/bash
-#docker exec -i pmon sensors "$@"
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
+# docker exec -i pmon sensors "$@"
 
 #To probe sensors not part of lm-sensors
 if [ -r /usr/local/bin/platform_sensors.py ]; then
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/set_eth_mac.py b/platform/broadcom/sonic-platform-modules-micas/common/script/set_eth_mac.py
index f4727d802753..227bc8e00e61 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/set_eth_mac.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/set_eth_mac.py
@@ -1,5 +1,20 @@
 #!/usr/bin/env python
-# -*- coding: UTF-8 -*-
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import syslog
 import os
 import re
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/sfp_highest_temperatue.py b/platform/broadcom/sonic-platform-modules-micas/common/script/sfp_highest_temperatue.py
index 4dd98f3a36b3..21e14b048873 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/sfp_highest_temperatue.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/sfp_highest_temperatue.py
@@ -1,4 +1,20 @@
 #!/usr/bin/python3
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import os
 import importlib.machinery
 import time
@@ -13,6 +29,10 @@
 SFP_TEMP_RECORD_ERROR = 2
 debuglevel = 0
 
+# For TH5 CPO only 
+cpo_temperature_oe_file = "/etc/sonic/highest_oe_temp"
+cpo_temperature_rlm_file = "/etc/sonic/highest_rlm_temp"
+cpo_onie_platform = "x86_64-micas_m2-w6940-128x1-fr4-r0"
 
 def sfp_temp_debug(s):
     if SFP_TEMP_RECORD_DEBUG & debuglevel:
@@ -25,28 +45,21 @@ def sfp_temp_error(s):
         syslog.openlog("SFP_TEMP_ERROR", syslog.LOG_PID)
         syslog.syslog(syslog.LOG_ERR, s)
 
-
-pidfile = None
-
-
-def file_rw_lock():
-    global pidfile
-    pidfile = open(sfp_temperature_file, "r")
+def file_rw_lock(file_path):
+    pidfile = open(file_path, "r")
     try:
         fcntl.flock(pidfile, fcntl.LOCK_EX | fcntl.LOCK_NB)
         sfp_temp_debug("file lock success")
-        return True
+        return True, pidfile
     except Exception:
         if pidfile is not None:
             pidfile.close()
             pidfile = None
-        return False
+        return False, pidfile
 
 
-def file_rw_unlock():
+def file_rw_unlock(pidfile):
     try:
-        global pidfile
-
         if pidfile is not None:
             fcntl.flock(pidfile, fcntl.LOCK_UN)
             pidfile.close()
@@ -70,7 +83,7 @@ def get_sfp_highest_temperature():
             sfputil_dir = "/usr/share/sonic/platform/"
             sfputil_path = sfputil_dir + "/plugins/sfputil.py"
         else:
-            cmd = "cat /host/machine.conf | grep onie_build_platform"
+            cmd = "cat /host/machine.conf | grep onie_platform"
             ret, output = subprocess.getstatusoutput(cmd)
             if ret != 0:
                 sfp_temp_error("cmd: %s execution fail, output: %s" % (cmd, output))
@@ -86,21 +99,22 @@ def get_sfp_highest_temperature():
         highest_temperature = int(temperature) * 1000
     except Exception as e:
         sfp_temp_error("get sfp temperature error, msg:%s" % str(e))
-        highest_temperature = -9999000
+        highest_temperature = -9999000      # fix me in future, should be -99999000
 
     return highest_temperature
 
 
-def write_sfp_highest_temperature(temperature):
+def write_sfp_highest_temperature(temperature, path):
 
     loop = 1000
     ret = False
+    pidfile = None
     try:
-        if os.path.exists(sfp_temperature_file) is False:
-            with open(sfp_temperature_file, 'w') as sfp_f:
+        if os.path.exists(path) is False:
+            with open(path, 'w') as sfp_f:
                 pass
         for i in range(0, loop):
-            ret = file_rw_lock()
+            ret, pidfile = file_rw_lock(path)
             if ret is True:
                 break
             time.sleep(0.001)
@@ -109,16 +123,89 @@ def write_sfp_highest_temperature(temperature):
             sfp_temp_error("take file lock timeout")
             return
 
-        with open(sfp_temperature_file, 'w') as sfp_f:
+        with open(path, 'w') as sfp_f:
             sfp_f.write("%s\n" % str(temperature))
 
-        file_rw_unlock()
+        file_rw_unlock(pidfile)
         return
     except Exception as e:
         sfp_temp_error("write sfp temperature error, msg:%s" % str(e))
-        file_rw_unlock()
+        file_rw_unlock(pidfile)
         return
 
+def get_cpo_highest_temperature():
+
+    oe_temp = get_cpo_highest_temperature_oe()
+    rlm_temp = get_cpo_highest_temperature_rlm()
+
+    return oe_temp, rlm_temp
+
+def get_cpo_highest_temperature_oe():
+    highest_temperature = 0
+    platform_sfputil = None
+    sfputil_dir = "/usr/share/sonic/device/"
+    try:
+        if not os.path.exists(sfputil_dir):
+            sfputil_dir = "/usr/share/sonic/platform/"
+            sfputil_path = sfputil_dir + "/plugins/sfputil.py"
+        else:
+            cmd = "cat /host/machine.conf | grep onie_platform"
+            ret, output = subprocess.getstatusoutput(cmd)
+            if ret != 0:
+                sfp_temp_error("cmd: %s execution fail, output: %s" % (cmd, output))
+
+            onie_platform = output.split("=")[1]
+            sfputil_path = sfputil_dir + onie_platform + "/plugins/sfputil.py"
+        module = importlib.machinery.SourceFileLoader("sfputil", sfputil_path).load_module()
+        platform_sfputil_class = getattr(module, "SfpUtil")
+        platform_sfputil = platform_sfputil_class()
+
+        temperature = platform_sfputil.get_highest_temperature_cpo_oe()
+        highest_temperature = int(temperature) * 1000
+    except Exception as e:
+        sfp_temp_error("get sfp temperature error, msg:%s" % str(e))
+        highest_temperature = -99999000
+
+    return highest_temperature
+
+def get_cpo_highest_temperature_rlm():
+    highest_temperature = 0
+    platform_sfputil = None
+    sfputil_dir = "/usr/share/sonic/device/"
+    try:
+        if not os.path.exists(sfputil_dir):
+            sfputil_dir = "/usr/share/sonic/platform/"
+            sfputil_path = sfputil_dir + "/plugins/sfputil.py"
+        else:
+            cmd = "cat /host/machine.conf | grep onie_platform"
+            ret, output = subprocess.getstatusoutput(cmd)
+            if ret != 0:
+                sfp_temp_error("cmd: %s execution fail, output: %s" % (cmd, output))
+
+            onie_platform = output.split("=")[1]
+            sfputil_path = sfputil_dir + onie_platform + "/plugins/sfputil.py"
+
+        module = importlib.machinery.SourceFileLoader("sfputil", sfputil_path).load_module()
+        platform_sfputil_class = getattr(module, "SfpUtil")
+        platform_sfputil = platform_sfputil_class()
+
+        temperature = platform_sfputil.get_highest_temperature_cpo_rlm()
+        highest_temperature = int(temperature) * 1000
+    except Exception as e:
+        sfp_temp_error("get sfp temperature error, msg:%s" % str(e))
+        highest_temperature = -99999000
+
+    return highest_temperature
+
+def is_th5_cpo():
+    cmd = "cat /host/machine.conf | grep onie_platform"
+    ret, output = subprocess.getstatusoutput(cmd)
+    if ret != 0:
+        sfp_temp_error("cmd: %s execution fail, output: %s" % (cmd, output))
+    if output.split("=")[1] == cpo_onie_platform:
+        return True
+
+    return False
 
 def debug_init():
     global debuglevel
@@ -132,16 +219,35 @@ def debug_init():
 
 
 def main():
-    while True:
-        debug_init()
-        temperature = 0
-        try:
-            temperature = get_sfp_highest_temperature()
-            write_sfp_highest_temperature(temperature)
-        except Exception as e:
-            sfp_temp_error("get/write sfp temperature error, msg:%s" % str(e))
-            write_sfp_highest_temperature(-9999000)
-        time.sleep(5)
+    if is_th5_cpo():
+        while True:
+            debug_init()
+            temperature_oe = 0
+            try:
+                temperature_oe = get_cpo_highest_temperature_oe()
+                write_sfp_highest_temperature(temperature_oe, cpo_temperature_oe_file)
+            except Exception as e:
+                sfp_temp_error("get/write sfp temperature error, msg:%s" % str(e))
+                write_sfp_highest_temperature(-99999000, cpo_temperature_oe_file)
+            temperature_rlm = 0
+            try:
+                temperature_rlm = get_cpo_highest_temperature_rlm()
+                write_sfp_highest_temperature(temperature_rlm, cpo_temperature_rlm_file)
+            except Exception as e:
+                sfp_temp_error("get/write sfp temperature error, msg:%s" % str(e))
+                write_sfp_highest_temperature(-99999000, cpo_temperature_rlm_file)
+            time.sleep(5)
+    else:
+        while True:
+            debug_init()
+            temperature = 0
+            try:
+                temperature = get_sfp_highest_temperature()
+                write_sfp_highest_temperature(temperature, sfp_temperature_file)
+            except Exception as e:
+                sfp_temp_error("get/write sfp temperature error, msg:%s" % str(e))
+                write_sfp_highest_temperature(-9999000, sfp_temperature_file)
+            time.sleep(5)
 
 
 if __name__ == '__main__':
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/slot_monitor.py b/platform/broadcom/sonic-platform-modules-micas/common/script/slot_monitor.py
index 0385f50b6f50..633fc028964e 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/slot_monitor.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/slot_monitor.py
@@ -1,5 +1,20 @@
 #!/usr/bin/env python3
-# -*- coding: UTF-8 -*-
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import time
 import syslog
 import traceback
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/ssdmon b/platform/broadcom/sonic-platform-modules-micas/common/script/ssdmon
index 4290b0a68725..2b79aed0a276 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/ssdmon
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/ssdmon
@@ -1,9 +1,21 @@
 #!/usr/bin/env python3
 #
-# ssdmon
+# Copyright (C) 2024 Micas Networks Inc.
 #
-# Command-line utility to check SSD health and parameters
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
 #
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# Command-line utility to check SSD health and parameters
 
 try:
     import argparse
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/subnetwork.py b/platform/broadcom/sonic-platform-modules-micas/common/script/subnetwork.py
index 5f9df14c8696..376da42231be 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/subnetwork.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/subnetwork.py
@@ -1,5 +1,20 @@
 #!/usr/bin/env python3
-# -*- coding: UTF-8 -*-
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import os
 import re
 import subprocess
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/tty_console.py b/platform/broadcom/sonic-platform-modules-micas/common/script/tty_console.py
index 4fae02f5128e..793f9b5aea3e 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/tty_console.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/tty_console.py
@@ -1,5 +1,19 @@
 #!/usr/bin/python3
-# -*- coding: UTF-8 -*-
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 import logging.handlers
 import subprocess
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/upgrade.py b/platform/broadcom/sonic-platform-modules-micas/common/script/upgrade.py
index 1b2523198ed8..5e10afd85414 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/upgrade.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/upgrade.py
@@ -1,5 +1,20 @@
 #!/usr/bin/env python3
-# -*- coding: UTF-8 -*-
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import sys
 import os
 import time
@@ -7,7 +22,7 @@
 import signal
 import click
 from platform_util import get_value, set_value, exec_os_cmd, exec_os_cmd_log
-from platform_config import UPGRADE_SUMMARY, WARM_UPGRADE_STARTED_FLAG
+from platform_config import UPGRADE_SUMMARY, WARM_UPGRADE_STARTED_FLAG, FW_UPGRADE_STARTED_FLAG
 from warm_upgrade import WarmBasePlatform
 
 
@@ -679,7 +694,11 @@ def do_test(self, device, slot):
     def do_test_main(self, device, slot):
         print("+================================+")
         print("|Doing upgrade test, please wait.|")
+        exec_os_cmd("touch %s" % FW_UPGRADE_STARTED_FLAG)
+        exec_os_cmd("sync")
         ret, log = self.do_test(device, slot)
+        exec_os_cmd("rm -rf %s" % FW_UPGRADE_STARTED_FLAG)
+        exec_os_cmd("sync")
         if ret == FIRMWARE_SUCCESS:
             print("|         test succeeded!        |")
             print("+================================+")
@@ -694,8 +713,12 @@ def do_test_main(self, device, slot):
 
     def do_bmc_upgrade_main(self, file, chip_select, erase_type):
         bmc_upgrade_config = self.upgrade_param.get("BMC", {})
+        exec_os_cmd("touch %s" % FW_UPGRADE_STARTED_FLAG)
+        exec_os_cmd("sync")
         ret, log = self.upgrading(bmc_upgrade_config, file, self.devtype,
                                   self.subtype, chip_select, BMC_UPGRADE, erase_type)
+        exec_os_cmd("rm -rf %s" % FW_UPGRADE_STARTED_FLAG)
+        exec_os_cmd("sync")
         if ret is True:
             print("===========upgrade succeeded!============")
             sys.exit(0)
@@ -925,7 +948,11 @@ def do_fw_upg(self, path, slot, upg_type):
     def fw_upg(self, path, slot, upg_type):
         print("+================================+")
         print("|  Doing upgrade, please wait... |")
+        exec_os_cmd("touch %s" % FW_UPGRADE_STARTED_FLAG)
+        exec_os_cmd("sync")
         ret, log = self.do_fw_upg(path, slot, upg_type)
+        exec_os_cmd("rm -rf %s" % FW_UPGRADE_STARTED_FLAG)
+        exec_os_cmd("sync")
         if ret == FIRMWARE_SUCCESS:
             print("|       upgrade succeeded!       |")
             print("+================================+")
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/warm_upgrade.py b/platform/broadcom/sonic-platform-modules-micas/common/script/warm_upgrade.py
index 69a310faa606..919bed2ec694 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/warm_upgrade.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/warm_upgrade.py
@@ -1,5 +1,20 @@
 #!/usr/bin/env python3
-# -*- coding: UTF-8 -*-
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import sys
 import os
 import time
@@ -199,6 +214,9 @@ def do_fw_upg_finish_cmd(self, finish_cmd_list):
         return True, msg
 
     def access_test(self, config):
+        skip = config.get("skip", 0)
+        if skip == 1:
+            return True
         # polling execute command
         polling_cmd_list = config.get("polling_cmd", [])
         for polling_cmd_config in polling_cmd_list:
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/chassis.py
index b0ddc8691f2e..8f07567207a0 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/chassis.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/chassis.py
@@ -1,12 +1,19 @@
 #!/usr/bin/env python3
-
-#############################################################################
 #
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
 #
-# Module contains an implementation of SONiC Platform Base API and
-# provides the platform information
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
 #
-#############################################################################
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 try:
     import time
@@ -306,6 +313,8 @@ def get_reboot_cause(self):
             reboot_cause_type = self.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC
         elif "Thermal Overload: Other" in reboot_cause_msg:
             reboot_cause_type = self.REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER
+        elif "CPU reboot" in reboot_cause_msg:
+            reboot_cause_type = self.REBOOT_CAUSE_HARDWARE_CPU
         elif "Other" in reboot_cause_msg:
             reboot_cause_type = self.REBOOT_CAUSE_NON_HARDWARE
         else:
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/component.py
index fa674a98a6bf..6e775c3045c3 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/component.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/component.py
@@ -1,12 +1,19 @@
 #!/usr/bin/env python3
-
-########################################################################
 #
-# Module contains an implementation of SONiC Platform Base API and
-# provides the Components' (e.g., BIOS, CPLD, FPGA, etc.) available in
-# the platform
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
 #
-########################################################################
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 try:
     import time
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/dcdc.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/dcdc.py
index 494d4aa610dc..920f4c2d3f68 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/dcdc.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/dcdc.py
@@ -1,11 +1,20 @@
 #!/usr/bin/env python3
-
-########################################################################
 #
-# Module contains an implementation of SONiC Platform Base API and
-# provides the Thermals' information which are available in the platform
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
 #
-########################################################################
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
 import time
 
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/eeprom.py
index 05fcc3c25678..7987e3368781 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/eeprom.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/eeprom.py
@@ -1,16 +1,19 @@
 #!/usr/bin/env python3
-########################################################################
 #
-# Module contains platform specific implementation of SONiC Platform
-# Base API and provides the EEPROMs' information.
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
 #
-# The different EEPROMs available are as follows:
-# - System EEPROM : Contains Serial number, Service tag, Base MA
-#                   address, etc. in ONIE TlvInfo EEPROM format.
-# - PSU EEPROM : Contains Serial number, Part number, Service Tag,
-#                PSU type, Revision.
-# - Fan EEPROM : Contains Serial number, Part number, Service Tag,
-#                Fan type, Number of Fans in Fantray, Revision.
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 ########################################################################
 
 try:
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan_drawer.py
index f0b039648158..4864f435cf36 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan_drawer.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan_drawer.py
@@ -1,11 +1,19 @@
 #!/usr/bin/env python3
 #
-# fan_drawer_base.py
+# Copyright (C) 2024 Micas Networks Inc.
 #
-# Abstract base class for implementing a platform-specific class with which
-# to interact with a fan drawer module in SONiC
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
 #
-
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 try:
     import time
     from sonic_platform_base.fan_drawer_base import FanDrawerBase
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/pcie.py
index 8ea66f339e96..627a43f56a26 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/pcie.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/pcie.py
@@ -1,12 +1,19 @@
 #!/usr/bin/env python3
-# -*- coding: utf-8 -*-
-
-########################################################################
 #
-# Module contains a platform specific implementation of SONiC Platform
-# Base PCIe class
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
 #
-########################################################################
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 try:
     from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/platform.py
index 4d6fe03d93ac..6d8aaf5ce9ab 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/platform.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/platform.py
@@ -1,11 +1,19 @@
 #!/usr/bin/env python3
-
-#############################################################################
 #
-# Module contains an implementation of SONiC Platform Base API and
-# provides the platform information
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
 #
-#############################################################################
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 try:
     from sonic_platform_base.platform_base import PlatformBase
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py
index de661dacdff6..63cde88413c9 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py
@@ -1,10 +1,19 @@
 #!/usr/bin/env python3
-########################################################################
 #
-# Module contains an implementation of SONiC Platform Base API and
-# provides the PSUs' information which are available in the platform
+# Copyright (C) 2024 Micas Networks Inc.
 #
-########################################################################
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 
 try:
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py
index 3fc22b4b6618..4d789d6d4602 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py
@@ -1,5 +1,19 @@
 #!/usr/bin/python
-# -*- coding: UTF-8 -*-
+#
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 #############################################################################
 #
@@ -34,6 +48,7 @@
 #############################################################################
 import sys
 import time
+import fcntl
 import syslog
 import traceback
 from abc import abstractmethod
@@ -50,8 +65,10 @@
     raise ImportError(str(error) + "- required module not found") from error
 
 LOG_DEBUG_LEVEL = 1
-LOG_WARNING_LEVEL = 2
-LOG_ERROR_LEVEL = 3
+LOG_INFO_LEVEL = 2
+LOG_NOTICE_LEVEL = 3
+LOG_WARNING_LEVEL = 4
+LOG_ERROR_LEVEL = 5
 
 
 class Sfp(SfpOptoeBase):
@@ -75,6 +92,8 @@ def __init__(self, index):
             self._sfp_api = SfpV1(index)
         elif vers == 2:
             self._sfp_api = SfpV2(index)
+        elif vers == 3:
+            self._sfp_api = SfpV3CPO(index)
         else:
             self._sfplog(LOG_ERROR_LEVEL, "Get SfpVer Error!")
 
@@ -84,23 +103,35 @@ def get_eeprom_path(self):
     def read_eeprom(self, offset, num_bytes):
         return self._sfp_api.read_eeprom(offset, num_bytes)
 
+    def write_eeprom(self, offset, num_bytes, write_buffer):
+        return self._sfp_api.write_eeprom(offset, num_bytes, write_buffer)
+
     def get_presence(self):
         return self._sfp_api.get_presence()
 
     def get_transceiver_info(self):
-        # temporary solution for a sonic202111 bug
-        transceiver_info = super().get_transceiver_info()
-        try:
-            if transceiver_info == None:
-                return None
-            if transceiver_info['cable_type'] == None:
-                transceiver_info['cable_type'] = 'N/A'
-            if transceiver_info["vendor_rev"] is not None:
-                transceiver_info["hardware_rev"] = transceiver_info["vendor_rev"]
-        except BaseException:
-            print(traceback.format_exc())
-            return None
-        return transceiver_info
+        api_get = self._sfp_api.get_transceiver_info(SfpOptoeBase, self)
+        return api_get if api_get is not None else super().get_transceiver_info()
+
+    def get_transceiver_bulk_status(self):
+        api_get = self._sfp_api.get_transceiver_bulk_status(SfpOptoeBase, self)
+        return api_get if api_get is not None else super().get_transceiver_bulk_status()
+
+    def get_transceiver_threshold_info(self):
+        api_get = self._sfp_api.get_transceiver_threshold_info(SfpOptoeBase, self)
+        return api_get if api_get is not None else super().get_transceiver_threshold_info()
+    
+    def get_transceiver_status(self):
+        api_get = self._sfp_api.get_transceiver_status(SfpOptoeBase, self)
+        return api_get if api_get is not None else super().get_transceiver_status()
+    
+    def get_transceiver_loopback(self):
+        api_get = self._sfp_api.get_transceiver_loopback(SfpOptoeBase, self)
+        return api_get if api_get is not None else super().get_transceiver_loopback()
+    
+    def get_transceiver_pm(self):
+        api_get = self._sfp_api.get_transceiver_pm(SfpOptoeBase, self)
+        return api_get if api_get is not None else super().get_transceiver_pm()
 
     def get_reset_status(self):
         if self.get_presence() is False:
@@ -142,7 +173,7 @@ def get_lpmode(self):
         if self.sfp_type is None:
             self.refresh_xcvr_api()
 
-        if self.sfp_type == 'QSFP' or self.sfp_type == 'QSFP-DD':
+        if self.sfp_type == 'QSFP' or self.sfp_type == 'QSFP_DD':
             return SfpOptoeBase.get_lpmode(self)
 
             self._sfplog(LOG_WARNING_LEVEL, 'SFP does not support lpmode')
@@ -155,7 +186,7 @@ def set_lpmode(self, lpmode):
         if self.sfp_type is None or self._xcvr_api is None:
             self.refresh_xcvr_api()
 
-        if self.sfp_type == 'QSFP-DD' or self.sfp_type == 'QSFP':
+        if self.sfp_type == 'QSFP_DD' or self.sfp_type == 'QSFP':
             return SfpOptoeBase.set_lpmode(self, lpmode)
 
         self._sfplog(LOG_WARNING_LEVEL, 'SFP does not support lpmode')
@@ -226,7 +257,7 @@ def refresh_xcvr_api(self):
         optoe_type = None
         # set sfp_type
         if 'CmisApi' in class_name:
-            self.sfp_type = 'QSFP-DD'
+            self.sfp_type = 'QSFP_DD'
             optoe_type = self.OPTOE_DRV_TYPE3
         elif 'Sff8472Api' in class_name:
             self.sfp_type = 'SFP'
@@ -244,8 +275,12 @@ def _sfplog(self, log_level, msg):
                 syslog.openlog("Sfp")
                 if log_level == LOG_DEBUG_LEVEL:
                     syslog.syslog(syslog.LOG_DEBUG, msg)
+                if log_level == LOG_INFO_LEVEL:
+                    syslog.syslog(syslog.LOG_INFO, msg)
+                if log_level == LOG_NOTICE_LEVEL:
+                    syslog.syslog(syslog.LOG_NOTICE, msg)
                 elif log_level == LOG_WARNING_LEVEL:
-                    syslog.syslog(syslog.LOG_DEBUG, msg)
+                    syslog.syslog(syslog.LOG_WARNING, msg)
                 elif log_level == LOG_ERROR_LEVEL:
                     syslog.syslog(syslog.LOG_ERR, msg)
                 syslog.closelog()
@@ -269,10 +304,44 @@ def _init_config(self, index):
     def _get_eeprom_path(self):
         return self.eeprom_path or None
 
+    @abstractmethod
+    def _pre_get_transceiver_info(self):
+        pass
+
     @abstractmethod
     def get_presence(self):
         pass
 
+    def get_transceiver_info(self, class_optoeBase, class_sfp):
+        # temporary solution for a sonic202111 bug
+        transceiver_info = class_optoeBase.get_transceiver_info(class_sfp)
+        try:
+            if transceiver_info == None:
+                return None
+            if transceiver_info['cable_type'] == None:
+                transceiver_info['cable_type'] = 'N/A'
+            if transceiver_info["vendor_rev"] is not None:
+                transceiver_info["hardware_rev"] = transceiver_info["vendor_rev"]
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return None
+        return transceiver_info
+
+    def get_transceiver_bulk_status(self, class_optoeBase, class_sfp):
+        pass
+
+    def get_transceiver_threshold_info(self, class_optoeBase, class_sfp):
+        pass
+
+    def get_transceiver_status(self, class_optoeBase, class_sfp):
+        pass
+
+    def get_transceiver_loopback(self, class_optoeBase, class_sfp):
+        pass
+
+    def get_transceiver_pm(self, class_optoeBase, class_sfp):
+        pass
+
     def read_eeprom(self, offset, num_bytes):
         try:
             for i in range(self.eeprom_retry_times):
@@ -292,18 +361,16 @@ def read_eeprom(self, offset, num_bytes):
         return None
 
     def write_eeprom(self, offset, num_bytes, write_buffer):
-        try:
-            for i in range(self.eeprom_retry_times):
-                ret = SfpOptoeBase.write_eeprom(self, offset, num_bytes, write_buffer)
-                if ret is False:
-                    time.sleep(self.eeprom_retry_break_sec)
-                    continue
-                break
-
-            return ret
-        except BaseException:
-            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
-            return False
+        for i in range(self.eeprom_retry_times):
+            try:
+                with open(self._get_eeprom_path(), mode='r+b', buffering=0) as f:
+                    f.seek(offset)
+                    f.write(write_buffer[0:num_bytes])
+                return True
+            except (OSError, IOError):
+                time.sleep(self.eeprom_retry_break_sec)
+                pass
+        return False
 
     @abstractmethod
     def set_optoe_type(self, optoe_type):
@@ -337,8 +404,12 @@ def _sfplog(self, log_level, msg):
                 syslog.openlog("SfpCust")
                 if log_level == LOG_DEBUG_LEVEL:
                     syslog.syslog(syslog.LOG_DEBUG, msg)
+                if log_level == LOG_INFO_LEVEL:
+                    syslog.syslog(syslog.LOG_INFO, msg)
+                if log_level == LOG_NOTICE_LEVEL:
+                    syslog.syslog(syslog.LOG_NOTICE, msg)
                 elif log_level == LOG_WARNING_LEVEL:
-                    syslog.syslog(syslog.LOG_DEBUG, msg)
+                    syslog.syslog(syslog.LOG_WARNING, msg)
                 elif log_level == LOG_ERROR_LEVEL:
                     syslog.syslog(syslog.LOG_ERR, msg)
                 syslog.closelog()
@@ -382,10 +453,12 @@ def get_presence(self):
             if dev_id == -1:
                 return False
             ret, info = platform_reg_read(0, dev_id, offset, 1)
-            if (ret is False
-                    or info is None):
+            if ((ret is False) or (info is None)):
                 return False
             return info[0] & (1 << offset_bit) == self.presence_val_is_present
+        except SystemExit:
+            self._sfplog(LOG_WARNING_LEVEL, "SystemExit")
+            return False
         except BaseException:
             self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
             return False
@@ -405,6 +478,9 @@ def get_reset_status(self):
                 return False
 
             return (info[0] & (1 << offset_bit) == self.reset_val_is_reset)
+        except SystemExit:
+            self._sfplog(LOG_WARNING_LEVEL, "SystemExit")
+            return False
         except BaseException:
             self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
             return False
@@ -428,6 +504,9 @@ def get_tx_disable(self):
                 tx_disable_list.append(info[0] & (1 << offset_bit) != 0)
             else:
                 tx_disable_list.append(info[0] & (1 << offset_bit) == 0)
+        except SystemExit:
+            self._sfplog(LOG_WARNING_LEVEL, "SystemExit")
+            return None
         except BaseException:
             self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
             return None
@@ -506,7 +585,9 @@ def set_reset(self, reset):
             if ret is False:
                 self._sfplog(LOG_ERROR_LEVEL, "platform_reg_write error!")
                 return False
-
+        except SystemExit:
+            self._sfplog(LOG_WARNING_LEVEL, "SystemExit")
+            return False
         except BaseException:
             self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
             return False
@@ -543,7 +624,9 @@ def set_tx_disable(self, tx_disable):
             if ret is False:
                 self._sfplog(LOG_ERROR_LEVEL, "platform_reg_write error!")
                 return False
-
+        except SystemExit:
+            self._sfplog(LOG_WARNING_LEVEL, "SystemExit")
+            return False
         except BaseException:
             self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
             return False
@@ -632,3 +715,197 @@ def set_optoe_type(self, optoe_type):
             self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
             return False
         return True
+
+class SfpV3CPO(SfpCust):
+    def _init_config(self, index):
+        super()._init_config(index)
+        sfp_config = baseutil.get_config().get("sfps", None)
+
+        eeprom_path_config = sfp_config.get("eeprom_path", None)
+        eeprom_path_key = sfp_config.get("eeprom_path_key")[self._port_id - 1]
+        self.eeprom_path = None if eeprom_path_config is None else eeprom_path_config % (
+            eeprom_path_key, eeprom_path_key)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init eeprom path: %s" % self.eeprom_path)
+
+    # CPO always present
+    def get_presence(self):
+        return True
+
+    def read_eeprom(self, offset, num_bytes):
+        # temp solution for CPO byte0 bug, remove me when it fixed
+        if offset == 0:
+            if self._file_rw_lock() is False:
+                return None
+            self._switch_page(0)
+            result = self._read_eeprom(offset, num_bytes)
+            self._file_rw_unlock()
+            return result
+
+        if offset < 128:    # page 0L
+            return self._read_eeprom(offset, num_bytes)
+
+        if self._file_rw_lock() is False:
+            return None
+
+        # for other page, need to convert flat_mem offset to single page offset
+        result = self._convert_to_single_page_offset_read(offset, num_bytes)
+        self._file_rw_unlock()
+        return result
+
+    def write_eeprom(self, offset, num_bytes, write_buffer):
+        # temp solution for CPO byte0 bug, remove me when it fixed
+        if offset == 0:
+            if self._file_rw_lock() is False:
+                return None
+            self._switch_page(0)
+            result = self._write_eeprom(offset, num_bytes, write_buffer)
+            self._file_rw_unlock()
+            return result
+
+        if offset < 128:    # page 0L
+            return self._write_eeprom(offset, num_bytes, write_buffer)
+
+        if self._file_rw_lock() is False:
+            return None
+
+        # for other page, need to convert flat_mem offset to single page offset
+        result = self._convert_to_single_page_offset_write(offset, num_bytes, write_buffer)
+        self._file_rw_unlock()
+        return result
+
+    def set_optoe_type(self, optoe_type):
+        ret, info = platform_get_optoe_type(self._port_id)
+        if ret is True and info != optoe_type:
+            try:
+                ret, _ = platform_set_optoe_type(self._port_id, optoe_type)
+            except Exception as err:
+                self._sfplog(LOG_ERROR_LEVEL, "Set optoe err %s" % err)
+
+    def _read_eeprom(self, offset, num_bytes):    
+        try:
+            for i in range(self.eeprom_retry_times):
+                with open(self._get_eeprom_path(), mode='rb', buffering=0) as f:
+                    f.seek(offset)
+                    result = f.read(num_bytes)
+                    # temporary solution for a sonic202111 bug
+                    if len(result) < num_bytes:
+                        result = result[::-1].zfill(num_bytes)[::-1]
+                    if result is not None:
+                        return bytearray(result)
+                    time.sleep(self.eeprom_retry_break_sec)
+                    continue
+
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+        return None
+
+    def _write_eeprom(self, offset, num_bytes, write_buffer):
+        for i in range(self.eeprom_retry_times):
+            try:
+                with open(self._get_eeprom_path(), mode='r+b', buffering=0) as f:
+                    f.seek(offset)
+                    f.write(write_buffer[0:num_bytes])
+                return True
+            except BaseException:
+                print(traceback.format_exc())
+                time.sleep(self.eeprom_retry_break_sec)
+                pass
+        return False
+
+    def _switch_page(self, page):
+        page_offset = 127 #0x7f
+        num_bytes = 1
+        cur_page = self._read_eeprom(page_offset, num_bytes)[0]
+        if cur_page is None:
+            self._sfplog(LOG_ERROR_LEVEL, "CPO read PAGE ERROR!")
+            return False
+
+        if cur_page == page:
+            return True
+
+        return self._write_eeprom(page_offset, num_bytes, bytearray([page]))
+
+    def _switch_bank(self, bank):
+        bank_offset = 126 #0x7e
+        num_bytes = 1
+        cur_bank = self._read_eeprom(bank_offset, num_bytes)[0]
+        if cur_bank is None:
+            self._sfplog(LOG_ERROR_LEVEL, "CPO read BANK ERROR!")
+            return False
+    
+        if cur_bank == bank:
+            return True
+
+        return self._write_eeprom(bank_offset, num_bytes, bytearray([bank]))
+
+    def _convert_to_single_page_offset_read(self, offset, num_bytes):
+        page_list = [0, 1, 2, 16, 17, 19, 20, 159]  # page 0 1 2 10h 11h 13h 14h 9Fh
+        for p in page_list:
+            if (256 + (p - 1) * 128) <= offset < (256 + 128 * p):
+                self._switch_page(p)
+                single_page_offset = offset - 128 * p
+
+                if p in [16, 17, 19, 20]:   # need to switch Bank
+                    port_id_abs = (self._port_id - 1) % 16
+                    bank_id = port_id_abs // 2
+                    self._switch_bank(bank_id)
+
+                return self._read_eeprom(single_page_offset, num_bytes)
+
+        self._sfplog(LOG_WARNING_LEVEL, "cannot find page! offset: %d num_bytes: %d" % (offset, num_bytes))
+        return None
+
+    def _convert_to_single_page_offset_write(self, offset, num_bytes, write_buffer):
+        page_list = [0, 1, 2, 16, 17, 19, 20, 159]  # page 0 1 2 10h 11h 13h 14h 9Fh
+        for p in page_list:
+            if (256 + (p - 1) * 128) <= offset < (256 + 128 * p):
+                self._switch_page(p)
+                single_page_offset = offset - 128 * p
+
+                if p in [16, 17, 19, 20]:   # need to switch Bank
+                    port_id_abs = (self._port_id - 1) % 16
+                    bank_id = port_id_abs // 2
+                    self._switch_bank(bank_id)
+
+                return self._write_eeprom(single_page_offset, num_bytes, write_buffer)
+
+        self._sfplog(LOG_WARNING_LEVEL, "cannot find page! offset: %d num_bytes: %d" % (offset, num_bytes))
+        return None
+
+    pidfile = None
+
+    def _file_rw_lock(self):
+        global pidfile
+        pidfile = open(self._get_eeprom_path(), "r")
+        file_lock_flag = False
+        # Retry 100 times to lock file
+        for i in range(0, 100):
+            try:
+                fcntl.flock(pidfile, fcntl.LOCK_EX | fcntl.LOCK_NB)
+                file_lock_flag = True
+                self._sfplog(LOG_DEBUG_LEVEL, "file lock success")
+                return True
+            except Exception:
+                time.sleep(0.001)
+                continue
+
+        if file_lock_flag == False:
+            if pidfile is not None:
+                pidfile.close()
+                pidfile = None
+            return False
+
+    def _file_rw_unlock(self):
+        try:
+            global pidfile
+            if pidfile is not None:
+                fcntl.flock(pidfile, fcntl.LOCK_UN)
+                pidfile.close()
+                pidfile = None
+                self._sfplog(LOG_DEBUG_LEVEL, "file unlock success")
+            else:
+                self._sfplog(LOG_DEBUG_LEVEL, "pidfile is invalid, do nothing")
+            return True
+        except Exception as e:
+            self._sfplog(LOG_ERROR_LEVEL, "file unlock err, msg:%s" % (str(e)))
+            return False
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/watchdog.py
index 948337f47a9a..1326d1671e6f 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/watchdog.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/watchdog.py
@@ -1,12 +1,19 @@
 #!/usr/bin/env python3
-
-########################################################################
 #
+# Copyright (C) 2024 Micas Networks Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
 #
-# Abstract base class for implementing a platform-specific class with
-# which to interact with a hardware watchdog module in SONiC
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
 #
-########################################################################
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 import fcntl
 import os
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/control b/platform/broadcom/sonic-platform-modules-micas/debian/control
index 8a4fbd115814..819647fdbfc3 100644
--- a/platform/broadcom/sonic-platform-modules-micas/debian/control
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/control
@@ -10,4 +10,8 @@ Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-micas-m2-w6510-48gt4v
 Architecture: amd64
-Description: kernel modules for platform devices such as fan, led, sfp
\ No newline at end of file
+Description: kernel modules for platform devices such as fan, led, sfp
+
+Package: platform-modules-micas-m2-w6520-24dc8qc
+Architecture: amd64
+Description: kernel modules for platform devices such as fan, led, sfp
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.install
new file mode 100644
index 000000000000..3a94db8f4428
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.install
@@ -0,0 +1 @@
+m2-w6520-24dc8qc/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6520-24dc8qc-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.postinst
new file mode 100644
index 000000000000..a8132f4f65a9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.postinst
@@ -0,0 +1,10 @@
+#!/bin/sh
+# postinst
+
+kernel_version=$(uname -r)
+
+if [ -e /boot/System.map-${kernel_version} ]; then
+    depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
+fi
+
+#DEBHELPER#
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
index b6b2cd492660..4ed55c469bc7 100644
--- a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
@@ -2,5 +2,6 @@ currentdir = $(shell pwd)
 
 MODULE_DIRS := m2-w6510-48v8c
 MODULE_DIRS += m2-w6510-48gt4v
+MODULE_DIRS += m2-w6520-24dc8qc
 
 export MODULE_DIRS
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/Makefile
new file mode 100644
index 000000000000..052a5a6a0773
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/Makefile
@@ -0,0 +1,25 @@
+PWD		= $(shell pwd)
+DIR_KERNEL_SRC = $(PWD)/modules/driver
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+SUB_BUILD_DIR = $(PWD)/build
+INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)
+INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin
+INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages
+INSTALL_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/plat_sysfs_cfg
+
+all:
+	$(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules
+	@if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi
+	cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR)
+	@if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi
+	cp -r $(PWD)/config/*  $(INSTALL_SCRIPT_DIR)
+	@if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi
+	@if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi
+	@if [ ! -d ${INSTALL_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_SYSFS_CFG_DIR} ;fi
+	@if [ -d $(PWD)/plat_sysfs_cfg/ ]; then cp -r $(PWD)/plat_sysfs_cfg/* ${INSTALL_SYSFS_CFG_DIR} ;fi
+clean:
+	rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd
+	rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order
+	rm -rf ${DIR_KERNEL_SRC}/.tmp_versions
+	rm -rf $(SUB_BUILD_DIR)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/config/x86_64_micas_m2_w6520_24dc8qc_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/config/x86_64_micas_m2_w6520_24dc8qc_r0_config.py
new file mode 100644
index 000000000000..6cbadc907a0d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/config/x86_64_micas_m2_w6520_24dc8qc_r0_config.py
@@ -0,0 +1,1424 @@
+#!/usr/bin/python
+# -*- coding: UTF-8 -*-
+from platform_common import *
+
+STARTMODULE = {
+    "hal_fanctrl": 1,
+    "hal_ledctrl": 1,
+    "avscontrol": 0,
+    "dev_monitor": 1,
+    "tty_console": 1,
+    "reboot_cause": 1,
+    "pmon_syslog": 1,
+    "sff_temp_polling": 1,
+    "generate_airflow": 0,
+}
+
+DEV_MONITOR_PARAM = {
+    "polling_time": 10,
+    "psus": [
+        {
+            "name": "psu1",
+            "present": {"gettype": "i2c", "bus": 2, "loc": 0x1d, "offset": 0x34, "presentbit": 0, "okval": 0},
+            "device": [
+                {"id": "psu1pmbus", "name": "wb_fsp1200", "bus": 41, "loc": 0x58, "attr": "hwmon"},
+                {"id": "psu1frue2", "name": "24c02", "bus": 41, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "psu2",
+            "present": {"gettype": "i2c", "bus": 2, "loc": 0x1d, "offset": 0x34, "presentbit": 4, "okval": 0},
+            "device": [
+                {"id": "psu2pmbus", "name": "wb_fsp1200", "bus": 42, "loc": 0x58, "attr": "hwmon"},
+                {"id": "psu2frue2", "name": "24c02", "bus": 42, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+    ],
+    "fans": [
+        {
+            "name": "fan1",
+            "present": {"gettype": "i2c", "bus": 4, "loc": 0x3d, "offset": 0x37, "presentbit": 5, "okval": 0},
+            "device": [
+                {"id": "fan1frue2", "name": "24c64", "bus": 35, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan2",
+            "present": {"gettype": "i2c", "bus": 4, "loc": 0x3d, "offset": 0x37, "presentbit": 4, "okval": 0},
+            "device": [
+                {"id": "fan2frue2", "name": "24c64", "bus": 34, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan3",
+            "present": {"gettype": "i2c", "bus": 4, "loc": 0x3d, "offset": 0x37, "presentbit": 3, "okval": 0},
+            "device": [
+                {"id": "fan3frue2", "name": "24c64", "bus": 33, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan4",
+            "present": {"gettype": "i2c", "bus": 4, "loc": 0x3d, "offset": 0x37, "presentbit": 2, "okval": 0},
+            "device": [
+                {"id": "fan4frue2", "name": "24c64", "bus":32, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan5",
+            "present": {"gettype": "i2c", "bus": 4, "loc": 0x3d, "offset": 0x37, "presentbit": 1, "okval": 0},
+            "device": [
+                {"id": "fan5frue2", "name": "24c64", "bus": 31, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan6",
+            "present": {"gettype": "i2c", "bus": 4, "loc": 0x3d, "offset": 0x37, "presentbit": 0, "okval": 0},
+            "device": [
+                {"id": "fan6frue2", "name": "24c64", "bus": 30, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+    ],
+    "others": [
+        {
+            "name": "eeprom",
+            "device": [
+                {"id": "eeprom_1", "name": "24c02", "bus": 1, "loc": 0x56, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "lm75",
+            "device": [
+                {"id": "lm75_1", "name": "lm75", "bus": 36, "loc": 0x48, "attr": "hwmon"},
+                {"id": "lm75_2", "name": "lm75", "bus": 36, "loc": 0x49, "attr": "hwmon"},
+                {"id": "lm75_3", "name": "lm75", "bus": 39, "loc": 0x4b, "attr": "hwmon"},
+                {"id": "lm75_4", "name": "lm75", "bus": 40, "loc": 0x4e, "attr": "hwmon"},
+                {"id": "lm75_5", "name": "lm75", "bus": 40, "loc": 0x4f, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "mac_bsc",
+            "device": [
+                {"id": "mac_bsc_1", "name": "wb_mac_bsc_td4", "bus": 44, "loc": 0x44, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name":"tmp411",
+            "device":[
+                {"id":"tmp411_1", "name":"tmp411","bus":39, "loc":0x4c, "attr":"hwmon"},
+                {"id":"tmp411_2", "name":"tmp411","bus":40, "loc":0x4c, "attr":"hwmon"},
+            ],
+        },
+        {
+            "name": "ina3221",
+            "device": [
+                {"id": "ina3221_1", "name": "ina3221", "bus": 25, "loc": 0x43, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "tps53622",
+            "device": [
+                {"id": "tps53622_1", "name": "tps53688", "bus": 25, "loc": 0x67, "attr": "hwmon"},
+                {"id": "tps53622_2", "name": "tps53688", "bus": 25, "loc": 0x6c, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "ucd90160",
+            "device": [
+                {"id": "ucd90160_1", "name": "ucd90160", "bus": 24, "loc": 0x5b, "attr": "hwmon"},
+                {"id": "ucd90160_2", "name": "ucd90160", "bus": 45, "loc": 0x5b, "attr": "hwmon"},
+            ],
+        },
+    ],
+}
+
+MANUINFO_CONF = {
+    "bios": {
+        "key": "BIOS",
+        "head": True,
+        "next": "onie"
+    },
+    "bios_vendor": {
+        "parent": "bios",
+        "key": "Vendor",
+        "cmd": "dmidecode -t 0 |grep Vendor",
+        "pattern": r".*Vendor",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "bios_version": {
+        "parent": "bios",
+        "key": "Version",
+        "cmd": "dmidecode -t 0 |grep Version",
+        "pattern": r".*Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "bios_date": {
+        "parent": "bios",
+        "key": "Release Date",
+        "cmd": "dmidecode -t 0 |grep Release",
+        "pattern": r".*Release Date",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+    "onie": {
+        "key": "ONIE",
+        "next": "cpu"
+    },
+    "onie_date": {
+        "parent": "onie",
+        "key": "Build Date",
+        "file": "/host/machine.conf",
+        "pattern": r"^onie_build_date",
+        "separator": "=",
+        "arrt_index": 1,
+    },
+    "onie_version": {
+        "parent": "onie",
+        "key": "Version",
+        "file": "/host/machine.conf",
+        "pattern": r"^onie_version",
+        "separator": "=",
+        "arrt_index": 2,
+    },
+
+    "cpu": {
+        "key": "CPU",
+        "next": "ssd"
+    },
+    "cpu_vendor": {
+        "parent": "cpu",
+        "key": "Vendor",
+        "cmd": "dmidecode --type processor |grep Manufacturer",
+        "pattern": r".*Manufacturer",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "cpu_model": {
+        "parent": "cpu",
+        "key": "Device Model",
+        "cmd": "dmidecode --type processor | grep Version",
+        "pattern": r".*Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "cpu_core": {
+        "parent": "cpu",
+        "key": "Core Count",
+        "cmd": "dmidecode --type processor | grep \"Core Count\"",
+        "pattern": r".*Core Count",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+    "cpu_thread": {
+        "parent": "cpu",
+        "key": "Thread Count",
+        "cmd": "dmidecode --type processor | grep \"Thread Count\"",
+        "pattern": r".*Thread Count",
+        "separator": ":",
+        "arrt_index": 4,
+    },
+    "ssd": {
+        "key": "SSD",
+        "next": "cpld"
+    },
+    "ssd_model": {
+        "parent": "ssd",
+        "key": "Device Model",
+        "cmd": "smartctl -i /dev/sda |grep \"Device Model\"",
+        "pattern": r".*Device Model",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "ssd_fw": {
+        "parent": "ssd",
+        "key": "Firmware Version",
+        "cmd": "smartctl -i /dev/sda |grep \"Firmware Version\"",
+        "pattern": r".*Firmware Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "ssd_user_cap": {
+        "parent": "ssd",
+        "key": "User Capacity",
+        "cmd": "smartctl -i /dev/sda |grep \"User Capacity\"",
+        "pattern": r".*User Capacity",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+
+    "cpld": {
+        "key": "CPLD",
+        "next": "psu"
+    },
+
+    "cpld1": {
+        "key": "CPLD1",
+        "parent": "cpld",
+        "arrt_index": 1,
+    },
+    "cpld1_model": {
+        "key": "Device Model",
+        "parent": "cpld1",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld1_vender": {
+        "key": "Vendor",
+        "parent": "cpld1",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld1_desc": {
+        "key": "Description",
+        "parent": "cpld1",
+        "config": "CPU_CPLD",
+        "arrt_index": 3,
+    },
+    "cpld1_version": {
+        "key": "Firmware Version",
+        "parent": "cpld1",
+        "reg": {
+            "loc": "/dev/port",
+            "offset": 0x700,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld2": {
+        "key": "CPLD2",
+        "parent": "cpld",
+        "arrt_index": 2,
+    },
+    "cpld2_model": {
+        "key": "Device Model",
+        "parent": "cpld2",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld2_vender": {
+        "key": "Vendor",
+        "parent": "cpld2",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld2_desc": {
+        "key": "Description",
+        "parent": "cpld2",
+        "config": "CONNECT_CPLD",
+        "arrt_index": 3,
+    },
+    "cpld2_version": {
+        "key": "Firmware Version",
+        "parent": "cpld2",
+        "reg": {
+            "loc": "/dev/port",
+            "offset": 0x900,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld3": {
+        "key": "CPLD3",
+        "parent": "cpld",
+        "arrt_index": 3,
+    },
+    "cpld3_model": {
+        "key": "Device Model",
+        "parent": "cpld3",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld3_vender": {
+        "key": "Vendor",
+        "parent": "cpld3",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld3_desc": {
+        "key": "Description",
+        "parent": "cpld3",
+        "config": "MAC_CPLDA",
+        "arrt_index": 3,
+    },
+    "cpld3_version": {
+        "key": "Firmware Version",
+        "parent": "cpld3",
+        "i2c": {
+            "bus": "2",
+            "loc": "0x1d",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld4": {
+        "key": "CPLD4",
+        "parent": "cpld",
+        "arrt_index": 4,
+    },
+    "cpld4_model": {
+        "key": "Device Model",
+        "parent": "cpld4",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld4_vender": {
+        "key": "Vendor",
+        "parent": "cpld4",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld4_desc": {
+        "key": "Description",
+        "parent": "cpld4",
+        "config": "MAC_CPLDB",
+        "arrt_index": 3,
+    },
+    "cpld4_version": {
+        "key": "Firmware Version",
+        "parent": "cpld4",
+        "i2c": {
+            "bus": "2",
+            "loc": "0x2d",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld5": {
+        "key": "CPLD5",
+        "parent": "cpld",
+        "arrt_index": 5,
+    },
+    "cpld5_model": {
+        "key": "Device Model",
+        "parent": "cpld5",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld5_vender": {
+        "key": "Vendor",
+        "parent": "cpld5",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld5_desc": {
+        "key": "Description",
+        "parent": "cpld5",
+        "config": "FAN_CPLD",
+        "arrt_index": 3,
+    },
+    "cpld5_version": {
+        "key": "Firmware Version",
+        "parent": "cpld5",
+        "i2c": {
+            "bus": "4",
+            "loc": "0x3d",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "psu": {
+        "key": "PSU",
+        "next": "fan"
+    },
+
+    "psu1": {
+        "parent": "psu",
+        "key": "PSU1",
+        "arrt_index": 1,
+    },
+    "psu1_hw_version": {
+        "key": "Hardware Version",
+        "parent": "psu1",
+        "extra": {
+            "funcname": "getPsu",
+            "id": "psu1",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "psu1_fw_version": {
+        "key": "Firmware Version",
+        "parent": "psu1",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "psu2": {
+        "parent": "psu",
+        "key": "PSU2",
+        "arrt_index": 2,
+    },
+    "psu2_hw_version": {
+        "key": "Hardware Version",
+        "parent": "psu2",
+        "extra": {
+            "funcname": "getPsu",
+            "id": "psu2",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "psu2_fw_version": {
+        "key": "Firmware Version",
+        "parent": "psu2",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan": {
+        "key": "FAN",
+        "next": "i210"
+    },
+
+    "fan1": {
+        "key": "FAN1",
+        "parent": "fan",
+        "arrt_index": 1,
+    },
+    "fan1_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan1",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan1",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan1_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan1",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan2": {
+        "key": "FAN2",
+        "parent": "fan",
+        "arrt_index": 2,
+    },
+    "fan2_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan2",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan2",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan2_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan2",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan3": {
+        "key": "FAN3",
+        "parent": "fan",
+        "arrt_index": 3,
+    },
+    "fan3_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan3",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan3",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan3_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan3",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan4": {
+        "key": "FAN4",
+        "parent": "fan",
+        "arrt_index": 4,
+    },
+    "fan4_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan4",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan4",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan4_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan4",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan5": {
+        "key": "FAN5",
+        "parent": "fan",
+        "arrt_index": 5,
+    },
+    "fan5_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan5",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan5",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan5_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan5",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan6": {
+        "key": "FAN6",
+        "parent": "fan",
+        "arrt_index": 6,
+    },
+    "fan6_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan6",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan6",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan6_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan6",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "i210": {
+        "key": "NIC",
+        "next": "fpga"
+    },
+    "i210_model": {
+        "parent": "i210",
+        "config": "NA",
+        "key": "Device Model",
+        "arrt_index": 1,
+    },
+    "i210_vendor": {
+        "parent": "i210",
+        "config": "INTEL",
+        "key": "Vendor",
+        "arrt_index": 2,
+    },
+    "i210_version": {
+        "parent": "i210",
+        "cmd": "ethtool -i eth0",
+        "pattern": r"firmware-version",
+        "separator": ":",
+        "key": "Firmware Version",
+        "arrt_index": 3,
+    },
+
+    "fpga": {
+        "key": "FPGA",
+    },
+    "fpga_model": {
+        "parent": "fpga",
+        "config": "XC7A100T-2FGG484C",
+        "key": "Device Model",
+        "arrt_index": 1,
+    },
+    "fpga_vendor": {
+        "parent": "fpga",
+        "config": "XILINX",
+        "key": "Vendor",
+        "arrt_index": 2,
+    },
+    "fpga_desc": {
+        "parent": "fpga",
+        "config": "NA",
+        "key": "Description",
+        "arrt_index": 3,
+    },
+    "fpga_hw_version": {
+        "parent": "fpga",
+        "config": "NA",
+        "key": "Hardware Version",
+        "arrt_index": 4,
+    },
+    "fpga_fw_version": {
+        "parent": "fpga",
+        "pci": {
+            "bus": 8,
+            "slot": 0,
+            "fn": 0,
+            "bar": 0,
+            "offset": 0
+        },
+        "key": "Firmware Version",
+        "arrt_index": 5,
+    },
+    "fpga_date": {
+        "parent": "fpga",
+        "pci": {
+            "bus": 8,
+            "slot": 0,
+            "fn": 0,
+            "bar": 0,
+            "offset": 4
+        },
+        "key": "Build Date",
+        "arrt_index": 6,
+    },
+    "others": {
+        "key": "OTHERS",
+    },
+    "5387": {
+    "parent": "others",
+    "key": "CPU-BMC-SWITCH",
+    "arrt_index": 1,
+    },
+    "5387_model": {
+        "parent": "5387",
+        "config": "BCM5387",
+        "key": "Device Model",
+        "arrt_index": 1,
+    },
+    "5387_vendor": {
+        "parent": "5387",
+        "config": "Broadcom",
+        "key": "Vendor",
+        "arrt_index": 2,
+    },
+    "5387_hw_version": {
+        "parent": "5387",
+        "key": "Hardware Version",
+        "func": {
+            "funcname": "get_bcm5387_version",
+            "params": {
+                "before": [
+                    {"gettype": "io", "io_addr": 0x94d, "value": 0xfe},  # enable 5387 
+                    {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio"},
+                    {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio_device sck=67 miso=32 mosi=65 bus=0"},
+                    {"gettype": "cmd", "cmd": "modprobe wb_spi_93xx46 spi_bus_num=0 spi_cs_gpio=6"},
+                ],
+                "get_version": "md5sum /sys/bus/spi/devices/spi0.0/eeprom | awk '{print $1}'",
+                "after": [],
+                "finally": [
+                    {"gettype": "cmd", "cmd": "rmmod wb_spi_93xx46"},
+                    {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio_device"},
+                    {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio"},
+                    {"gettype": "io", "io_addr": 0x94d, "value": 0xff},  # disable 5387
+                ],
+            },
+        },
+        "arrt_index": 3,
+    },
+}
+
+PMON_SYSLOG_STATUS = {
+    "polling_time": 3,
+    "sffs": {
+        "present": {"path": ["/sys/wb_plat/sff/*/present"], "ABSENT": 0},
+        "nochangedmsgflag": 0,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 1,
+        "alias": {
+            "sff1": "Ethernet1",
+            "sff2": "Ethernet2",
+            "sff3": "Ethernet3",
+            "sff4": "Ethernet4",
+            "sff5": "Ethernet5",
+            "sff6": "Ethernet6",
+            "sff7": "Ethernet7",
+            "sff8": "Ethernet8",
+            "sff9": "Ethernet9",
+            "sff10": "Ethernet10",
+            "sff11": "Ethernet11",
+            "sff12": "Ethernet12",
+            "sff13": "Ethernet13",
+            "sff14": "Ethernet14",
+            "sff15": "Ethernet15",
+            "sff16": "Ethernet16",
+            "sff17": "Ethernet17",
+            "sff18": "Ethernet18",
+            "sff19": "Ethernet19",
+            "sff20": "Ethernet20",
+            "sff21": "Ethernet21",
+            "sff22": "Ethernet22",
+            "sff23": "Ethernet23",
+            "sff24": "Ethernet24",
+            "sff25": "Ethernet25",
+            "sff26": "Ethernet26",
+            "sff27": "Ethernet27",
+            "sff28": "Ethernet28",
+            "sff29": "Ethernet29",
+            "sff30": "Ethernet30",
+            "sff31": "Ethernet31",
+            "sff32": "Ethernet32",
+        }
+    },
+    "fans": {
+        "present": {"path": ["/sys/wb_plat/fan/*/present"], "ABSENT": 0},
+        "status": [
+            {"path": "/sys/wb_plat/fan/%s/motor0/status", 'okval': 1},
+            {"path": "/sys/wb_plat/fan/%s/motor1/status", 'okval': 1},
+        ],
+        "nochangedmsgflag": 1,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 0,
+        "alias": {
+            "fan1": "FAN1",
+            "fan2": "FAN2",
+            "fan3": "FAN3",
+            "fan4": "FAN4",
+            "fan5": "FAN5",
+            "fan6": "FAN6"
+        }
+    },
+    "psus": {
+        "present": {"path": ["/sys/wb_plat/psu/*/present"], "ABSENT": 0},
+        "status": [
+            {"path": "/sys/wb_plat/psu/%s/output", "okval": 1},
+            {"path": "/sys/wb_plat/psu/%s/alert", "okval": 0},
+        ],
+        "nochangedmsgflag": 1,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 0,
+        "alias": {
+            "psu1": "PSU1",
+            "psu2": "PSU2"
+        }
+    }
+}
+
+##################### MAC Voltage adjust####################################
+MAC_DEFAULT_PARAM = [
+    {
+        "name": "mac_core",              # AVS name
+        "type": 1,                       # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range
+        "default": 0x82,                 # default value, if rov value not in range
+        "sdkreg": "TOP_AVS_SEL_REG",     # SDK register name
+        "sdktype": 0,                    # 0: No shift operation required, 1: shift operation required
+        "macregloc": 24,                 # Shift right 24 bits
+        "mask": 0xff,                    # Use with macregloc
+        "rov_source": 0,                 # 0: get rov value from cpld, 1: get rov value from SDK
+        "cpld_avs": {"bus":2, "loc":0x2d, "offset":0x3f, "gettype":"i2c"},
+        "set_avs": {
+            "loc": "/sys/bus/i2c/devices/43-005b/avs_vout",
+            "gettype": "sysfs", "formula": "int((%f)*1000000)"
+        },
+        "mac_avs_param": {
+            0x72:0.90000,
+            0x73:0.89375,
+            0x74:0.88750,
+            0x75:0.88125,
+            0x76:0.87500,
+            0x77:0.86875,
+            0x78:0.86250,
+            0x79:0.85625,
+            0x7a:0.85000,
+            0x7b:0.84375,
+            0x7c:0.83750,
+            0x7d:0.83125,
+            0x7e:0.82500,
+            0x7f:0.81875,
+            0x80:0.81250,
+            0x81:0.80625,
+            0x82:0.80000,
+            0x83:0.79375,
+            0x84:0.78750,
+            0x85:0.78125,
+            0x86:0.77500,
+            0x87:0.76875,
+            0x88:0.76250,
+            0x89:0.75625,
+            0x8A:0.75000,
+            0x8B:0.74375,
+            0x8C:0.73750,
+            0x8D:0.73125,
+            0x8E:0.72500,
+        }
+    }
+]
+
+BLACKLIST_DRIVERS = [
+    {"name": "i2c_i801", "delay": 0},
+]
+
+DRIVERLISTS = [
+    {"name": "i2c_i801", "delay": 1},
+    {"name": "wb_gpio_d1500", "delay": 0},
+    {"name": "i2c_dev", "delay": 0},
+    {"name": "i2c_algo_bit", "delay": 0},
+    {"name": "i2c_gpio", "delay": 0},
+    {"name": "i2c_mux", "delay": 0},
+    {"name": "wb_gpio_device", "delay": 0},
+    {"name": "wb_i2c_gpio_device gpio_sda=17 gpio_scl=1 gpio_udelay=2", "delay": 0},
+    {"name": "platform_common dfd_my_type=0x20000056", "delay": 0},
+    {"name": "wb_fpga_pcie", "delay": 0},
+    {"name": "wb_pcie_dev", "delay": 0},
+    {"name": "wb_pcie_dev_device", "delay": 0},
+    {"name": "wb_lpc_drv", "delay": 0},
+    {"name": "wb_lpc_drv_device", "delay": 0},
+    {"name": "wb_io_dev", "delay": 0},
+    {"name": "wb_io_dev_device", "delay": 0},
+    {"name": "wb_spi_dev", "delay": 0},
+    {"name": "wb_i2c_dev", "delay": 0},
+    {"name": "wb_fpga_i2c_bus_drv", "delay": 0},
+    {"name": "wb_fpga_i2c_bus_device", "delay": 0},
+    {"name": "wb_i2c_dev_device", "delay": 0},
+    {"name": "wb_fpga_pca954x_drv", "delay": 0},
+    {"name": "wb_fpga_pca954x_device", "delay": 0},
+    {"name": "wb_wdt", "delay": 0},
+    {"name": "lm75", "delay": 0},
+    {"name": "tmp401", "delay": 0},
+    {"name": "optoe", "delay": 0},
+    {"name": "at24", "delay": 0},
+    {"name": "wb_mac_bsc", "delay": 0},
+    {"name": "pmbus_core", "delay": 0},
+    {"name": "wb_csu550", "delay": 0},
+    {"name": "ina3221", "delay": 0},
+    {"name": "tps53679", "delay": 0},
+    {"name": "ucd9000", "delay": 0},
+    {"name": "wb_xdpe132g5c", "delay": 0},
+    {"name": "plat_dfd", "delay": 0},
+    {"name": "plat_switch", "delay": 0},
+    {"name": "plat_fan", "delay": 0},
+    {"name": "plat_psu", "delay": 0},
+    {"name": "plat_sff", "delay": 0},
+]
+
+DEVICE = [
+    {"name": "24c02", "bus": 1, "loc": 0x56},
+    {"name": "wb_mac_bsc_td4", "bus": 44, "loc": 0x44},
+    # fan
+    {"name": "24c64", "bus": 30, "loc": 0x50},
+    {"name": "24c64", "bus": 31, "loc": 0x50},
+    {"name": "24c64", "bus": 32, "loc": 0x50},
+    {"name": "24c64", "bus": 33, "loc": 0x50},
+    {"name": "24c64", "bus": 34, "loc": 0x50},
+    {"name": "24c64", "bus": 35, "loc": 0x50},
+    # psu
+    {"name": "24c02", "bus": 41, "loc": 0x50},
+    {"name": "wb_fsp1200", "bus": 41, "loc": 0x58},
+    {"name": "24c02", "bus": 42, "loc": 0x50},
+    {"name": "wb_fsp1200", "bus": 42, "loc": 0x58},
+    # temp
+    {"name": "lm75", "bus": 36, "loc": 0x48},
+    {"name": "lm75", "bus": 36, "loc": 0x49},
+    {"name": "lm75", "bus": 39, "loc": 0x4b},
+    {"name": "tmp411", "bus": 39, "loc": 0x4c},
+    {"name": "tmp411", "bus": 40, "loc": 0x4c},
+    {"name": "lm75", "bus": 40, "loc": 0x4e},
+    {"name": "lm75", "bus": 40, "loc": 0x4f},
+    # dcdc
+    {"name": "ucd90160", "bus": 24, "loc": 0x5b},
+    {"name": "ucd90160", "bus": 45, "loc": 0x5b},
+    {"name": "ina3221", "bus": 25, "loc": 0x43},
+    {"name": "tps53688", "bus": 25, "loc": 0x67},
+    {"name": "tps53688", "bus": 25, "loc": 0x6c},
+    #avs
+    {"name": "wb_xdpe132g5c", "bus": 43, "loc": 0x5b},
+]
+
+OPTOE = [
+    {"name": "optoe1", "startbus": 46, "endbus": 69},
+    {"name": "optoe3", "startbus": 70, "endbus": 77},
+]
+
+REBOOT_CTRL_PARAM = {
+    "cpu": {"io_addr": 0x920, "rst_val": 0xfe, "rst_delay": 0, "gettype": "io"},
+    "mac": {"bus": 2, "loc": 0x1d, "offset": 0x20, "rst_val": 0xfd, "rst_delay": 0, "gettype": "i2c"},
+    "phy": {"io_addr": 0x923, "rst_val": 0xef, "rst_delay": 1, "unlock_rst_val": 0xff, "unlock_rst_delay": 1, "gettype": "io"},
+    "power": {"io_addr": 0x9ce, "rst_val": 0, "rst_delay": 0, "gettype": "io"},
+}
+
+# INIT_PARAM_PRE = [
+#     {"loc": "43-005b/avs_vout_max", "value": "900000"},
+#     {"loc": "43-005b/avs_vout_min", "value": "725000"},
+# ]
+
+INIT_PARAM = []
+
+INIT_COMMAND_PRE = [
+    # sfp power enable
+    "i2cset -f -y 2 0x2d 0x45 0xff",
+    "i2cset -f -y 2 0x2d 0x46 0xff",
+    "i2cset -f -y 2 0x2d 0x34 0xff",
+    "i2cset -f -y 2 0x2d 0x35 0xff",
+    "i2cset -f -y 2 0x1d 0x39 0xff",
+    "i2cset -f -y 2 0x1d 0x3a 0xff",
+    # enable tty_console monitor
+    "dfd_debug io_wr 0x956 0x01",
+]
+
+INIT_COMMAND = [
+    # led  enable
+    "i2cset -f -y 2 0x2d 0x3a 0xff",
+    "i2cset -f -y 2 0x1d 0x3b 0xff",
+
+    # port led off
+    "i2cset -f -y 2 0x2d 0x3b 0x0",
+    "i2cset -f -y 2 0x2d 0x3c 0x0",
+    "i2cset -f -y 2 0x2d 0x3d 0x0",
+    "i2cset -f -y 2 0x2d 0x3e 0x0",
+    "i2cset -f -y 2 0x1d 0x3c 0x0",
+    "i2cset -f -y 2 0x1d 0x3d 0x0",
+    "i2cset -f -y 2 0x1d 0x3e 0x0",
+    "i2cset -f -y 2 0x1d 0x3f 0x0",
+]
+
+WARM_UPGRADE_PARAM = {
+    "slot0": {
+        "VME": {
+            "chain1": [
+                {"name": "CPU_CPLD",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/refresh_cpu_cpld_header.vme",
+                    "init_cmd": [
+                        {"cmd": "echo 7 > /sys/class/gpio/export", "gettype": "cmd"},
+                        {"cmd": "echo high > /sys/class/gpio/gpio7/direction", "gettype": "cmd"},
+                        {"io_addr": 0x7cc, "value": 0, "gettype": "io"},
+                    ],
+                    "rw_recover_reg": [
+                        {"io_addr": 0x705, "value": None, "gettype": "io"},
+                        {"io_addr": 0x713, "value": None, "gettype": "io"},
+                        {"io_addr": 0x715, "value": None, "gettype": "io"},
+                        {"io_addr": 0x721, "value": None, "gettype": "io"},
+                        {"io_addr": 0x722, "value": None, "gettype": "io"},
+                        {"io_addr": 0x772, "value": None, "gettype": "io"},
+                        {"io_addr": 0x774, "value": None, "gettype": "io"},
+                        {"io_addr": 0x776, "value": None, "gettype": "io"},
+                        {"io_addr": 0x778, "value": None, "gettype": "io"},
+                        {"io_addr": 0x77a, "value": None, "gettype": "io"},
+                        {"io_addr": 0x77c, "value": None, "gettype": "io"},
+                        {"io_addr": 0x780, "value": None, "gettype": "io"},
+                    ],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 30,
+                    "access_check_reg": {"io_addr": 0x705, "value": 0x5a, "gettype": "io"},
+                    "finish_cmd": [
+                        {"io_addr": 0x7cc, "value": 0xff, "gettype": "io"},
+                        {"cmd": "echo 0 > /sys/class/gpio/gpio7/value", "gettype": "cmd"},
+                        {"cmd": "echo 7 > /sys/class/gpio/unexport", "gettype": "cmd"},
+                    ],
+                },
+                {"name": "CONNECT_CPLD",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/refresh_base_cpld_header.vme",
+                    "init_cmd": [
+                        {"bus": 2, "loc": 0x2d, "offset": 0xcd, "value": 1, "gettype": "i2c"},
+                        {"io_addr": 0x9cc, "value": 0, "gettype": "io"},
+                    ],
+                    "rw_recover_reg": [
+                        {"io_addr": 0x9aa, "value": None, "gettype": "io"},
+                        {"io_addr": 0x955, "value": None, "gettype": "io"},
+                        {"io_addr": 0x911, "value": None, "gettype": "io"},
+                        {"io_addr": 0x923, "value": None, "gettype": "io"},
+                        {"io_addr": 0x924, "value": None, "gettype": "io"},
+                        {"io_addr": 0x930, "value": None, "gettype": "io"},
+                        {"io_addr": 0x932, "value": None, "gettype": "io"},
+                        {"io_addr": 0x933, "value": None, "gettype": "io"},
+                        {"io_addr": 0x934, "value": None, "gettype": "io"},
+                        {"io_addr": 0x937, "value": None, "gettype": "io"},
+                        {"io_addr": 0x938, "value": None, "gettype": "io"},
+                        {"io_addr": 0x939, "value": None, "gettype": "io"},
+                        {"io_addr": 0x93a, "value": None, "gettype": "io"},
+                        {"io_addr": 0x941, "value": None, "gettype": "io"},
+                        {"io_addr": 0x942, "value": None, "gettype": "io"},
+                        {"io_addr": 0x947, "value": None, "gettype": "io"},
+                        {"io_addr": 0x948, "value": None, "gettype": "io"},
+                        {"io_addr": 0x949, "value": None, "gettype": "io"},
+                        {"io_addr": 0x94d, "value": None, "gettype": "io"},
+                        {"io_addr": 0x94e, "value": None, "gettype": "io"},
+                        {"io_addr": 0x94f, "value": None, "gettype": "io"},
+                        {"io_addr": 0x950, "value": None, "gettype": "io"},
+                        {"io_addr": 0x951, "value": None, "gettype": "io"},
+                        {"io_addr": 0x952, "value": None, "gettype": "io"},
+                        {"io_addr": 0x953, "value": None, "gettype": "io"},
+                    ],
+                    "after_upgrade_delay": 30,
+                    "after_upgrade_delay_timeout": 60,
+                    "refresh_finish_flag_check": {"io_addr": 0x9cb, "value": 0x5a, "gettype": "io"},
+                    "access_check_reg": {"io_addr": 0x9aa, "value": 0x5a, "gettype": "io"},
+                    "finish_cmd": [
+                        {"bus": 2, "loc": 0x2d, "offset": 0xcd, "value": 0, "gettype": "i2c"},
+                    ],
+                 },
+
+                {"name": "MACA_CPLD",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/refresh_maca_cpld_header.vme",
+                    "init_cmd": [
+                        {"cmd": "touch /etc/sonic/.warm_upg_flag", "gettype": "cmd"},
+                        {"cmd": "sync", "gettype": "cmd"},
+                        {"path": "/dev/fpga0", "offset": 0xb4, "value": [0x1], "gettype":"devfile", "delay":0.1},
+                        {"bus": 2, "loc": 0x1d, "offset": 0xcc, "value": 0, "gettype": "i2c"},
+                    ],
+                    "rw_recover_reg": [
+                        {"bus": 2, "loc": 0x1d, "offset": 0xaa, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x55, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x11, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x14, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x15, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x1a, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x1b, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x1c, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x1d, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x1f, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x21, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x22, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x35, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x36, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x37, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x38, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x39, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x3a, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x3b, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x3c, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x3d, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x3e, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x3f, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x40, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x41, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x42, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x1d, "offset": 0x44, "value": None, "gettype": "i2c"},
+                    ],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 30,
+                    "refresh_finish_flag_check": {"bus": 2, "loc": 0x1d, "offset": 0xcb, "value": 0x5a, "gettype": "i2c"},
+                    "access_check_reg": {"bus": 2, "loc": 0x1d, "offset": 0xaa, "value": 0x5a, "gettype": "i2c"},
+                    "finish_cmd": [
+                        {"path": "/dev/fpga0", "offset": 0xb4, "value": [0x0], "gettype":"devfile"},
+                        {"cmd": "rm -rf /etc/sonic/.warm_upg_flag", "gettype": "cmd"},
+                        {"cmd": "sync", "gettype": "cmd"},
+                    ],
+                 },
+
+                {"name": "MACB_CPLD",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/refresh_macb_cpld_header.vme",
+                    "init_cmd": [
+                        {"cmd": "touch /etc/sonic/.warm_upg_flag", "gettype": "cmd"},
+                        {"cmd": "sync", "gettype": "cmd"},
+                        {"path": "/dev/fpga0", "offset": 0xb0, "value": [0x1], "gettype":"devfile", "delay":0.1},
+                        {"bus": 2, "loc": 0x2d, "offset": 0xcc, "value": 0, "gettype": "i2c"},
+                    ],
+                    "rw_recover_reg": [
+                        {"bus": 2, "loc": 0x2d, "offset": 0xaa, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x55, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x11, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x14, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x15, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x1a, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x1b, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x1c, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x1d, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x1f, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x21, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x22, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x23, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x30, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x31, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x32, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x33, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x34, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x35, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x3a, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x3b, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x3c, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x3d, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x3e, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x40, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x42, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x43, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x44, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x45, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x46, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x4c, "value": None, "gettype": "i2c"},
+                        {"bus": 2, "loc": 0x2d, "offset": 0x4d, "value": None, "gettype": "i2c"},
+                    ],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 30,
+                    "refresh_finish_flag_check": {"bus": 2, "loc": 0x2d, "offset": 0xcb, "value": 0x5a, "gettype": "i2c"},
+                    "access_check_reg": {"bus": 2, "loc": 0x2d, "offset": 0xaa, "value": 0x5a, "gettype": "i2c"},
+                    "finish_cmd": [
+                        {"path": "/dev/fpga0", "offset": 0xb0, "value": [0x0], "gettype":"devfile"},
+                        {"cmd": "rm -rf /etc/sonic/.warm_upg_flag", "gettype": "cmd"},
+                        {"cmd": "sync", "gettype": "cmd"},
+                    ],
+                 },
+
+                {"name": "FAN_CPLD",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/refresh_fan_cpld_header.vme",
+                    "rw_recover_reg": [
+                        {"bus": 4, "loc": 0x3d, "offset": 0xaa, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x55, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x11, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x13, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x15, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x17, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x19, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x30, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x31, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x33, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x35, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x3a, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x3c, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x3d, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x3e, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x3f, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x40, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x41, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x60, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x61, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x62, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x63, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x64, "value": None, "gettype": "i2c"},
+                        {"bus": 4, "loc": 0x3d, "offset": 0x65, "value": None, "gettype": "i2c"},
+                    ],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 30,
+                    "access_check_reg": {"bus": 4, "loc": 0x3d, "offset": 0xaa, "value": 0x5a, "gettype": "i2c"},
+                 },
+            ],
+        },
+
+        "SPI-LOGIC-DEV": {
+            "chain1": [
+                {"name": "FPGA",
+                    "init_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+                        {"cmd": "setpci -s 00:03.2 0xA0.W=0x0050", "gettype": "cmd"}, # link_disable
+                        {"io_addr": 0x9cd, "value": 0, "gettype": "io"},
+                    ],
+                    "after_upgrade_delay": 10,
+                    "after_upgrade_delay_timeout": 180,
+                    "refresh_finish_flag_check": {"io_addr": 0x9cd, "value": 0xff, "gettype": "io"},
+                    "access_check_reg": {
+                        "path": "/dev/fpga0", "offset": 0x8, "value": [0x55, 0xaa, 0x5a, 0xa5], "read_len":4, "gettype":"devfile",
+                        "polling_cmd":[
+                            {"cmd": "setpci -s 00:03.2 0xA0.W=0x0060", "gettype": "cmd"},# retrain_link
+                            {"cmd": "rmmod wb_fpga_pcie", "gettype": "cmd"},
+                            {"cmd": "modprobe wb_fpga_pcie", "gettype": "cmd", "delay": 0.1},
+                        ],
+                        "polling_delay": 0.1
+                    },
+                    "finish_cmd": [
+                        {"cmd": "setpci -s 00:03.2 0xA0.W=0x0060", "gettype": "cmd"},# retrain_link
+                        {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+                    ],
+                 },
+            ],
+        },
+    },
+    "stop_services_cmd": [
+        "/usr/local/bin/platform_process.py stop",
+    ],
+    "start_services_cmd": [
+        "/usr/local/bin/platform_process.py start",
+    ],
+}
+
+REBOOT_CAUSE_PARA = {
+    "reboot_cause_list": [
+        {
+            "name": "cold_reboot",
+            "monitor_point": {"gettype": "io", "io_addr": 0x988, "okval": 0},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Power Loss, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Power Loss, ",
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+            ]
+        },
+        {
+            "name": "wdt_reboot",
+            "monitor_point": {"gettype": "io", "io_addr": 0x989, "okval": 1},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Watchdog, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Watchdog, ", 
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size":1*1024*1024}
+            ],
+            "finish_operation": [
+                {"gettype": "io", "io_addr": 0x987, "value": 0xfc},
+            ]
+        },
+        {
+            "name": "bmc_reboot",
+            "monitor_point": {"gettype": "io", "io_addr": 0x98a, "okval": 1},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "BMC reboot, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "BMC reboot, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+            ],
+            "finish_operation": [
+                {"gettype": "io", "io_addr": 0x987, "value": 0xfa},
+            ]
+        },
+        {
+            "name": "bmc_powerdown",
+            "monitor_point": {"gettype": "io", "io_addr": 0x98b, "okval": 1},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "BMC powerdown, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "BMC powerdown, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+            ],
+            "finish_operation": [
+                {"gettype": "io", "io_addr": 0x987, "value": 0xf6},
+            ]
+        },
+        {
+            "name": "otp_switch_reboot",
+            "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ",
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+            ],
+            "finish_operation": [
+                {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"},
+            ]
+        },
+        {
+            "name": "otp_other_reboot",
+            "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ",
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+            ],
+            "finish_operation": [
+                {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"},
+            ]
+        },
+    ],
+    "other_reboot_cause_record": [
+        {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+        {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+    ],
+}
+
+UPGRADE_SUMMARY = {
+    "devtype": 0x20000056,
+
+    "slot0": {
+        "subtype": 0,
+        "VME": {
+            "chain1": {
+                "name": "CPLD",
+                "is_support_warm_upg": 1,
+            },
+        },
+
+        "SPI-LOGIC-DEV": {
+            "chain1": {
+                "name": "FPGA",
+                "is_support_warm_upg": 1,
+            },
+        },
+
+        "SYSFS": {
+            "chain2": {
+                "name": "BCM5387",
+                "is_support_warm_upg": 0,
+                "init_cmd": [
+                    {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"},
+                    {"cmd": "modprobe wb_spi_gpio_device sck=67 miso=32 mosi=65 bus=0", "gettype": "cmd"},
+                    {"cmd": "modprobe wb_spi_93xx46 spi_bus_num=0 spi_cs_gpio=6", "gettype": "cmd", "delay": 0.1},
+                ],
+                "finish_cmd": [
+                    {"cmd": "rmmod wb_spi_93xx46", "gettype": "cmd"},
+                    {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"},
+                    {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1},
+                ],
+            },
+        },
+
+        "MTD": {
+            "chain3": {
+                "name": "BIOS",
+                "is_support_warm_upg": 0,
+                "filesizecheck": 10240,  # bios check file size, Unit: K
+                "init_cmd": [
+                    {"io_addr": 0x722, "value": 0x02, "gettype": "io"},
+                    {"cmd": "modprobe mtd", "gettype": "cmd"},
+                    {"cmd": "modprobe spi_nor", "gettype": "cmd"},
+                    {"cmd": "modprobe ofpart", "gettype": "cmd"},
+                    {"cmd": "modprobe intel_spi writeable=1", "gettype": "cmd"},
+                    {"cmd": "modprobe intel_spi_platform writeable=1", "gettype": "cmd"},
+                ],
+                "finish_cmd": [
+                    {"cmd": "rmmod intel_spi_platform", "gettype": "cmd"},
+                    {"cmd": "rmmod intel_spi", "gettype": "cmd"},
+                    {"cmd": "rmmod ofpart", "gettype": "cmd"},
+                    {"cmd": "rmmod spi_nor", "gettype": "cmd"},
+                    {"cmd": "rmmod mtd", "gettype": "cmd"},
+                ],
+            },
+        },
+
+        "TEST": {
+            "fpga": [
+                {"chain": 1, "file": "/etc/.upgrade_test/fpga_test_header.bin", "display_name": "FPGA"},
+            ],
+            "cpld": [
+                {"chain": 1, "file": "/etc/.upgrade_test/cpld_test_header.vme", "display_name": "CPLD"},
+            ],
+        },
+    },
+
+    "BMC": {
+        "name": "BMC",
+        "init_cmd": [
+            # stop BMC stack watchdog
+            {"cmd": "ipmitool raw 0x32 0x03 0x02", "gettype": "cmd", "ignore_result": 1},
+        ],
+        "finish_cmd": [],
+    },
+}
+
+PLATFORM_E2_CONF = {
+    "fan": [
+        {"name": "fan1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/35-0050/eeprom"},
+        {"name": "fan2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/34-0050/eeprom"},
+        {"name": "fan3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/33-0050/eeprom"},
+        {"name": "fan4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/32-0050/eeprom"},
+        {"name": "fan5", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/31-0050/eeprom"},
+        {"name": "fan6", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/30-0050/eeprom"},
+    ],
+    "psu": [
+        {"name": "psu1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/41-0050/eeprom"},
+        {"name": "psu2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/42-0050/eeprom"},
+    ],
+    "syseeprom": [
+        {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/1-0056/eeprom"},
+    ],
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/config/x86_64_micas_m2_w6520_24dc8qc_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/config/x86_64_micas_m2_w6520_24dc8qc_r0_port_config.py
new file mode 100644
index 000000000000..fccc59402891
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/config/x86_64_micas_m2_w6520_24dc8qc_r0_port_config.py
@@ -0,0 +1,7 @@
+#!/usr/bin/python3
+# -*- coding: UTF-8 -*-
+
+PLATFORM_INTF_OPTOE = {
+    "port_num": 32,
+    "optoe_start_bus": 46,
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/hal-config/x86_64_micas_m2_w6520_24dc8qc_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/hal-config/x86_64_micas_m2_w6520_24dc8qc_r0_device.py
new file mode 100644
index 000000000000..6adf2ef004b9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/hal-config/x86_64_micas_m2_w6520_24dc8qc_r0_device.py
@@ -0,0 +1,1190 @@
+#!/usr/bin/python3
+
+psu_fan_airflow = {
+    "intake": ['DPS-1300AB-6 S', 'GW-CRPS1300D'],
+    "exhaust": []
+}
+
+fanairflow = {
+    "intake": ['M1HFAN II-F'],
+    "exhaust": [],
+}
+
+psu_display_name = {
+    "PA1300I-F": ['GW-CRPS1300D', 'DPS-1300AB-6 S'],
+}
+
+psutypedecode = {
+    0x00: 'N/A',
+    0x01: 'AC',
+    0x02: 'DC',
+}
+
+class Unit:
+    Temperature = "C"
+    Voltage = "V"
+    Current = "A"
+    Power = "W"
+    Speed = "RPM"
+
+class threshold:
+    PSU_TEMP_MIN = -10 * 1000
+    PSU_TEMP_MAX = 60 * 1000
+
+    PSU_FAN_SPEED_MIN = 2000
+    PSU_FAN_SPEED_MAX = 28000
+
+    PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000
+    PSU_OUTPUT_VOLTAGE_MAX = 14 * 1000
+
+    PSU_AC_INPUT_VOLTAGE_MIN = 200 * 1000
+    PSU_AC_INPUT_VOLTAGE_MAX = 240 * 1000
+
+    PSU_DC_INPUT_VOLTAGE_MIN = 190 * 1000
+    PSU_DC_INPUT_VOLTAGE_MAX = 290 * 1000
+
+    ERR_VALUE = -9999999
+
+    PSU_OUTPUT_POWER_MIN = 10 * 1000 * 1000
+    PSU_OUTPUT_POWER_MAX = 1300 * 1000 * 1000
+
+    PSU_INPUT_POWER_MIN = 10 * 1000 * 1000
+    PSU_INPUT_POWER_MAX = 1444 * 1000 * 1000
+
+    PSU_OUTPUT_CURRENT_MIN = 2 * 1000
+    PSU_OUTPUT_CURRENT_MAX = 107 * 1000
+
+    PSU_INPUT_CURRENT_MIN = 0.2 * 1000
+    PSU_INPUT_CURRENT_MAX = 7 * 1000
+
+    FRONT_FAN_SPEED_MAX = 25000
+    REAR_FAN_SPEED_MAX = 22000
+    FAN_SPEED_MIN = 2000
+
+devices = {
+    "onie_e2": [
+        {
+            "name": "ONIE_E2",
+            "e2loc": {"loc": "/sys/bus/i2c/devices/1-0056/eeprom", "way": "sysfs"},
+            "airflow": "intake"
+        },
+    ],
+    "psus": [
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/41-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 41, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU1",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 41, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-41/41-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": threshold.PSU_TEMP_MIN,
+                "Max": threshold.PSU_TEMP_MAX,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 41, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-41/41-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": threshold.PSU_FAN_SPEED_MIN,
+                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus":41, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 41, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-41/41-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-41/41-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-41/41-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.ERR_VALUE,
+                    "Max": threshold.ERR_VALUE,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-41/41-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_CURRENT_MIN,
+                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-41/41-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_POWER_MIN,
+                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 41, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-41/41-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-41/41-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-41/41-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_POWER_MIN,
+                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        },
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/42-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 42, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU2",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": threshold.PSU_TEMP_MIN,
+                "Max": threshold.PSU_TEMP_MAX,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": threshold.PSU_FAN_SPEED_MIN,
+                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 42, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.ERR_VALUE,
+                    "Max": threshold.ERR_VALUE,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_CURRENT_MIN,
+                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_POWER_MIN,
+                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_POWER_MIN,
+                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        }
+    ],
+    "temps": [
+        {
+            "name": "BOARD_TEMP",
+            "temp_id": "TEMP1",
+            "api_name": "Board",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/40-004e/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 70000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "CPU_TEMP",
+            "temp_id": "TEMP2",
+            "api_name": "CPU",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": 2000,
+                "Low": 10000,
+                "High": 100000,
+                "Max": 104000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "INLET_TEMP",
+            "temp_id": "TEMP3",
+            "api_name": "Inlet",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/40-004f/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 40000,
+                "Max": 50000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "OUTLET_TEMP",
+            "temp_id": "TEMP4",
+            "api_name": "Outlet",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/36-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 70000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "SWITCH_TEMP",
+            "temp_id": "TEMP5",
+            "api_name": "ASIC_TEMP",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/44-0044/hwmon/hwmon*/temp99_input", "way": "sysfs"},
+                "Min": 2000,
+                "Low": 10000,
+                "High": 100000,
+                "Max": 105000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU1_TEMP",
+            "temp_id": "TEMP6",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-41/41-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU2_TEMP",
+            "temp_id": "TEMP7",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "SFF_TEMP",
+            "Temperature": {
+                "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"},
+                "Min": -15000,
+                "Low": 0,
+                "High": 80000,
+                "Max": 100000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "invalid": -10000,
+            "error": -9999,
+        }
+    ],
+    "leds": [
+        {
+            "name": "FRONT_SYS_LED",
+            "led_type": "SYS_LED",
+            "led": {"bus": 2, "addr": 0x2d,  "offset":0x40, "way":"i2c"},
+            "led_attrs": {
+                "off": 0x0, "green": 0x01, "red": 0x02,"default":0x01,
+                "amber": 0x03, "green_flash": 0x41, "red_flash": 0x42,
+                "amber_flash": 0x43, "mask": 0xff
+            },
+        },
+        {
+            "name": "FRONT_PSU_LED",
+            "led_type": "PSU_LED",
+            "led": {"bus": 2, "addr": 0x2d,  "offset":0x43, "way":"i2c"},
+            "led_attrs": {
+                "green":0x04, "red":0x02, "amber":0x06, "default":0x04,
+                "flash":0xff, "light":0xff, "off": 0, "mask":0x07
+            },
+        },
+        {
+            "name": "FRONT_FAN_LED",
+            "led_type": "FAN_LED",
+            "led": {"bus": 2, "addr": 0x2d,  "offset":0x42, "way":"i2c"},
+            "led_attrs": {
+                "green":0x04, "red":0x02, "amber":0x06, "default":0x04,
+                "flash":0xff, "light":0xff, "off": 0, "mask":0x07
+            },
+        },
+    ],
+    "fans": [
+        {
+            "name": "FAN1",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-35/35-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 4, "addr": 0x3d, "offset": 0x41, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 38.16,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x65, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x65, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN2",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-34/34-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 4, "addr": 0x3d, "offset": 0x40, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 38.16,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x64, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x64, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN3",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-33/33-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 4, "addr": 0x3d, "offset": 0x3f, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 38.16,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x63, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan3/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x63, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan3/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN4",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-32/32-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 4, "addr": 0x3d, "offset": 0x3e, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 38.16,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x62, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan4/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x62, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan4/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN5",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-31/31-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan5/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 4, "addr": 0x3d, "offset": 0x3d, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 38.16,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x61, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan5/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x61, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan5/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN6",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-30/30-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan6/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 4, "addr": 0x3d, "offset": 0x3c, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 38.16,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x60, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan6/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan6/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan6/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 4, "addr": 0x3d, "offset": 0x60, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan6/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+    ],
+    "cplds": [
+        {
+            "name": "CPU_CPLD",
+            "cpld_id": "CPLD1",
+            "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for system power",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "CONNECT_CPLD",
+            "cpld_id": "CPLD2",
+            "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "MAC_CPLDA",
+            "cpld_id": "CPLD3",
+            "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "MAC_CPLDB",
+            "cpld_id": "CPLD4",
+            "VersionFile": {"loc": "/dev/cpld5", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "FAN_CPLD",
+            "cpld_id": "CPLD5",
+            "VersionFile": {"loc": "/dev/cpld6", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for fan modules",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "FPGA",
+            "cpld_id": "CPLD6",
+            "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "format": "little_endian",
+            "warm": 1,
+        },
+        {
+            "name": "BIOS",
+            "cpld_id": "CPLD7",
+            "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"},
+            "desc": "Performs initialization of hardware components during booting",
+            "slot": 0,
+            "type": "str",
+            "warm": 0,
+        },
+    ],
+    "dcdc": [
+        {
+            "name": "VDD5V_CLK_MCU",
+            "dcdc_id": "DCDC1",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 4250,
+            "Max": 5750,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "VDD3.3_CLK",
+            "dcdc_id": "DCDC2",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "VDD1.0V",
+            "dcdc_id": "DCDC3",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 850,
+            "Max": 1150,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "VDD1.8V",
+            "dcdc_id": "DCDC4",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in4_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1530,
+            "Max": 2070,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_BOARD_VDD3.3V",
+            "dcdc_id": "DCDC5",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in5_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "VDD1.2V",
+            "dcdc_id": "DCDC6",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in6_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1020,
+            "Max": 1380,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "VDD_CORE",
+            "dcdc_id": "DCDC7",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in7_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 600,
+            "Max": 1100,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "ANALOG0.75V",
+            "dcdc_id": "DCDC8",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in8_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 615,
+            "Max": 1000,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD1.2V",
+            "dcdc_id": "DCDC9",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in9_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1020,
+            "Max": 1380,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "VDDO1.8V",
+            "dcdc_id": "DCDC10",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in10_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1530,
+            "Max": 2070,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_ANA1.2V",
+            "dcdc_id": "DCDC11",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in11_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1020,
+            "Max": 1380,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_ANA1.8V",
+            "dcdc_id": "DCDC12",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in12_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1530,
+            "Max": 2070,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "QSFP56_VDD3.3V_A",
+            "dcdc_id": "DCDC13",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in13_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "QSFP56_VDD3.3V_B",
+            "dcdc_id": "DCDC14",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in14_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "QSFPDD_VDD3.3V_A",
+            "dcdc_id": "DCDC15",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in15_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "QSFPDD_VDD3.3V_B",
+            "dcdc_id": "DCDC16",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/45-005b/hwmon/hwmon*/in16_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "VDD5.0V",
+            "dcdc_id": "DCDC17",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/24-005b/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 4250,
+            "Max": 5750,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "SW_VDD1.2V",
+            "dcdc_id": "DCDC18",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/24-005b/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1020,
+            "Max": 1380,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "VDD2.5V",
+            "dcdc_id": "DCDC19",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/24-005b/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2125,
+            "Max": 2875,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "CONNECT_BOARD_VDD3.3V",
+            "dcdc_id": "DCDC20",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/24-005b/hwmon/hwmon*/in4_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "VDD12V",
+            "dcdc_id": "DCDC21",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/24-005b/hwmon/hwmon*/in6_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 10200,
+            "Max": 13800,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "VDD3.3_STBY",
+            "dcdc_id": "DCDC22",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/24-005b/hwmon/hwmon*/in7_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "SSD_VDD3.3V",
+            "dcdc_id": "DCDC23",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/24-005b/hwmon/hwmon*/in8_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "VCCIN",
+            "dcdc_id": "DCDC24",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/25-0067/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1368,
+            "Max": 2244,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "P1V05",
+            "dcdc_id": "DCDC25",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/25-0067/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 882,
+            "Max": 1232,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "VCCD_V",
+            "dcdc_id": "DCDC26",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/25-006c/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 990,
+            "Max": 1452,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "VCCSCSUS_V",
+            "dcdc_id": "DCDC27",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/25-006c/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 855,
+            "Max": 1265,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "P3V3_STBY_V",
+            "dcdc_id": "DCDC28",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/25-0043/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2682,
+            "Max": 4004,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "P5V_AUX_IN",
+            "dcdc_id": "DCDC29",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/25-0043/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 3852,
+            "Max": 6347,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "P1V7_VCCSCFUSESUS_IN",
+            "dcdc_id": "DCDC30",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/25-0043/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1377,
+            "Max": 2057,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+    ],
+    "cpu": [
+        {
+            "name": "cpu",
+            "CpuResetCntReg": {"loc": "/dev/cpld1", "offset": 0x88, "len": 1, "way": "devfile_ascii"},
+            "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"
+        }
+    ],
+    "sfps": {
+        "ver": '1.0',
+        "port_index_start": 0,
+        "port_num": 32,
+        "log_level": 2,
+        "eeprom_retry_times": 5,
+        "eeprom_retry_break_sec": 0.2,
+        "presence_cpld": {
+            "dev_id": {
+                4: {
+                    "offset": {
+                        0x30: "1-8",
+                        0x31: "9-16",
+                        0x32: "17-24",
+                        0x33: "25-32"
+                    },
+                },
+            },
+        },
+        "presence_val_is_present": 0,
+        "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom",
+        "eeprom_path_key": list(range(46, 78)),
+        "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class",
+        "optoe_driver_key": list(range(46, 78)),
+        "reset_cpld": {
+            "dev_id": {
+                5: {
+                    "offset": {
+                        0x22: "1-8",
+                        0x23: "9-16"
+                    },
+                },
+                4: {
+                    "offset": {
+                        0x21: "17-24",
+                        0x22: "25-32"
+                    },
+                },
+            },
+        },
+        "reset_val_is_reset": 0,
+    }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/hal-config/x86_64_micas_m2_w6520_24dc8qc_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/hal-config/x86_64_micas_m2_w6520_24dc8qc_r0_monitor.py
new file mode 100644
index 000000000000..58388d5875f2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/hal-config/x86_64_micas_m2_w6520_24dc8qc_r0_monitor.py
@@ -0,0 +1,207 @@
+# coding:utf-8
+
+
+monitor = {
+    "openloop": {
+        "linear": {
+            "name": "linear",
+            "flag": 0,
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "K": 11,
+            "tin_min": 38,
+        },
+        "curve": {
+            "name": "curve",
+            "flag": 1,
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "a": 0.369,
+            "b": -15.657,
+            "c": 289,
+            "tin_min": 25,
+        },
+    },
+
+    "pid": {
+        "CPU_TEMP": {
+            "name": "CPU_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 1.5,
+            "Ki": 1,
+            "Kd": 0.3,
+            "target": 80,
+            "value": [None, None, None],
+        },
+        "SWITCH_TEMP": {
+            "name": "SWITCH_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 1.5,
+            "Ki": 1,
+            "Kd": 0.3,
+            "target": 90,
+            "value": [None, None, None],
+        },
+        "OUTLET_TEMP": {
+            "name": "OUTLET_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 2,
+            "Ki": 0.4,
+            "Kd": 0.3,
+            "target": 65,
+            "value": [None, None, None],
+        },
+        "BOARD_TEMP": {
+            "name": "BOARD_TEMP",
+            "flag": 0,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 2,
+            "Ki": 0.4,
+            "Kd": 0.3,
+            "target": 65,
+            "value": [None, None, None],
+        },
+        "SFF_TEMP": {
+            "name": "SFF_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 0.1,
+            "Ki": 0.4,
+            "Kd": 0,
+            "target": 60,
+            "value": [None, None, None],
+        },
+    },
+
+    "temps_threshold": {
+        "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 105, "invalid": -100000, "error": -99999},
+        "INLET_TEMP": {"name": "INLET_TEMP", "warning": 40, "critical": 50, "fix": -3},
+        "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 70, "critical": 75},
+        "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75},
+        "CPU_TEMP": {"name": "CPU_TEMP", "warning": 100, "critical": 102},
+        "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999},
+    },
+
+    "fancontrol_para": {
+        "interval": 5,
+        "fan_status_interval": 0.5,
+        "max_pwm": 0xff,
+        "min_pwm": 0x80,
+        "abnormal_pwm": 0xff,
+        "warning_pwm": 0xff,
+        "temp_invalid_pid_pwm": 0x80,
+        "temp_error_pid_pwm": 0x80,
+        "temp_fail_num": 3,
+        "check_temp_fail": [
+            {"temp_name": "INLET_TEMP"},
+            {"temp_name": "SWITCH_TEMP"},
+            {"temp_name": "CPU_TEMP"},
+        ],
+        "temp_warning_num": 3,  # temp over warning 3 times continuously
+        "temp_critical_num": 3,  # temp over critical 3 times continuously
+        "temp_warning_countdown": 60,  # 5 min warning speed after not warning
+        "temp_critical_countdown": 60,  # 5 min full speed after not critical
+        "rotor_error_count": 2,  # fan rotor error 2 times continuously
+        "inlet_mac_diff": 999,
+        "check_crit_reboot_flag": 1,
+        "check_crit_reboot_num": 3,
+        "check_crit_sleep_time": 20,
+        "psu_absent_fullspeed_num": 0xFF,
+        "fan_absent_fullspeed_num": 1,
+        "rotor_error_fullspeed_num": 1,
+        "psu_fan_control": 1,
+        "fan_plug_in_default_countdown": 0,  # no use
+        "fan_plug_in_pwm": 0x80,  # fan plug in pwd
+        "deal_fan_error": 1,
+        "deal_fan_error_conf": {
+            "countdown": 2,
+            "FAN1": [
+                {"name": "FAN1", "pwm": 0xff},
+                {"name": "FAN2", "pwm": 0x80},
+                {"name": "FAN3", "pwm": 0x80},
+                {"name": "FAN4", "pwm": 0x80},
+                {"name": "FAN5", "pwm": 0x80},
+                {"name": "FAN6", "pwm": 0x80},
+            ],
+            "FAN2": [
+                {"name": "FAN1", "pwm": 0x80},
+                {"name": "FAN2", "pwm": 0xff},
+                {"name": "FAN3", "pwm": 0x80},
+                {"name": "FAN4", "pwm": 0x80},
+                {"name": "FAN5", "pwm": 0x80},
+                {"name": "FAN6", "pwm": 0x80},
+            ],
+            "FAN3": [
+                {"name": "FAN1", "pwm": 0x80},
+                {"name": "FAN2", "pwm": 0x80},
+                {"name": "FAN3", "pwm": 0xff},
+                {"name": "FAN4", "pwm": 0x80},
+                {"name": "FAN5", "pwm": 0x80},
+                {"name": "FAN6", "pwm": 0x80},
+            ],
+            "FAN4": [
+                {"name": "FAN1", "pwm": 0x80},
+                {"name": "FAN2", "pwm": 0x80},
+                {"name": "FAN3", "pwm": 0x80},
+                {"name": "FAN4", "pwm": 0xff},
+                {"name": "FAN5", "pwm": 0x80},
+                {"name": "FAN6", "pwm": 0x80},
+            ],
+            "FAN5": [
+                {"name": "FAN1", "pwm": 0x80},
+                {"name": "FAN2", "pwm": 0x80},
+                {"name": "FAN3", "pwm": 0x80},
+                {"name": "FAN4", "pwm": 0x80},
+                {"name": "FAN5", "pwm": 0xff},
+                {"name": "FAN6", "pwm": 0x80},
+            ],
+            "FAN6": [
+                {"name": "FAN1", "pwm": 0x80},
+                {"name": "FAN2", "pwm": 0x80},
+                {"name": "FAN3", "pwm": 0x80},
+                {"name": "FAN4", "pwm": 0x80},
+                {"name": "FAN5", "pwm": 0x80},
+                {"name": "FAN6", "pwm": 0xff},
+            ],
+        },
+    },
+
+    "ledcontrol_para": {
+        "interval": 5,
+        "checkpsu": 0,  # 0: sys led don't follow psu led
+        "checkfan": 0,  # 0: sys led don't follow fan led
+        "psu_amber_num": 1,
+        "fan_amber_num": 1,
+        "board_sys_led": [
+            {"led_name": "FRONT_SYS_LED"},
+        ],
+        "board_psu_led": [
+            {"led_name": "FRONT_PSU_LED"},
+        ],
+        "board_fan_led": [
+            {"led_name": "FRONT_FAN_LED"},
+        ],
+        "psu_air_flow_monitor": 0,
+        "fan_air_flow_monitor": 0,
+        "psu_air_flow_amber_num": 0,
+        "fan_air_flow_amber_num": 0,
+    },
+
+    "otp_reboot_judge_file": {
+        "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag",
+        "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag",
+    },
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/Makefile
new file mode 100644
index 000000000000..cbb6fe83c013
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/Makefile
@@ -0,0 +1,12 @@
+MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
+MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules)
+
+EXTRA_CFLAGS+= -I$(MODULES_DIR)
+
+obj-m := wb_pcie_dev_device.o
+obj-m += wb_fpga_pca954x_device.o
+obj-m += wb_fpga_i2c_bus_device.o
+obj-m += wb_lpc_drv_device.o
+obj-m += wb_i2c_dev_device.o
+obj-m += wb_io_dev_device.o
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_fpga_i2c_bus_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_fpga_i2c_bus_device.c
new file mode 100644
index 000000000000..71bfc520e801
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_fpga_i2c_bus_device.c
@@ -0,0 +1,874 @@
+/*
+ * An wb_fpga_i2c_bus_device driver for fpga i2c device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_i2c_ocores.h>
+#include <fpga_i2c.h>
+
+static int g_wb_fpga_i2c_debug = 0;
+static int g_wb_fpga_i2c_error = 0;
+
+module_param(g_wb_fpga_i2c_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_fpga_i2c_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_FPGA_I2C_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_fpga_i2c_debug) { \
+        printk(KERN_INFO "[WB_FPGA_I2C][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_FPGA_I2C_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_fpga_i2c_error) { \
+        printk(KERN_ERR "[WB_FPGA_I2C][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data0 = {
+    .adap_nr                    = 2,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x500,
+    .i2c_filter                 = 0x504,
+    .i2c_stretch                = 0x508,
+    .i2c_ext_9548_exits_flag    = 0x50c,
+    .i2c_ext_9548_addr          = 0x510,
+    .i2c_ext_9548_chan          = 0x514,
+    .i2c_in_9548_chan           = 0x518,
+    .i2c_slave                  = 0x51c,
+    .i2c_reg                    = 0x520,
+    .i2c_reg_len                = 0x530,
+    .i2c_data_len               = 0x534,
+    .i2c_ctrl                   = 0x538,
+    .i2c_status                 = 0x53c,
+    .i2c_data_buf               = 0x580,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x80,
+    .i2c_reset_on               = 0x00000001,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data1 = {
+    .adap_nr                    = 3,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x600,
+    .i2c_filter                 = 0x604,
+    .i2c_stretch                = 0x608,
+    .i2c_ext_9548_exits_flag    = 0x60c,
+    .i2c_ext_9548_addr          = 0x610,
+    .i2c_ext_9548_chan          = 0x614,
+    .i2c_in_9548_chan           = 0x618,
+    .i2c_slave                  = 0x61c,
+    .i2c_reg                    = 0x620,
+    .i2c_reg_len                = 0x630,
+    .i2c_data_len               = 0x634,
+    .i2c_ctrl                   = 0x638,
+    .i2c_status                 = 0x63c,
+    .i2c_data_buf               = 0x680,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x84,
+    .i2c_reset_on               = 0x00000001,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data2 = {
+    .adap_nr                    = 4,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x700,
+    .i2c_filter                 = 0x704,
+    .i2c_stretch                = 0x708,
+    .i2c_ext_9548_exits_flag    = 0x70c,
+    .i2c_ext_9548_addr          = 0x710,
+    .i2c_ext_9548_chan          = 0x714,
+    .i2c_in_9548_chan           = 0x718,
+    .i2c_slave                  = 0x71c,
+    .i2c_reg                    = 0x720,
+    .i2c_reg_len                = 0x730,
+    .i2c_data_len               = 0x734,
+    .i2c_ctrl                   = 0x738,
+    .i2c_status                 = 0x73c,
+    .i2c_data_buf               = 0x780,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x88,
+    .i2c_reset_on               = 0x00000001,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data3 = {
+    .adap_nr                    = 5,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x800,
+    .i2c_filter                 = 0x804,
+    .i2c_stretch                = 0x808,
+    .i2c_ext_9548_exits_flag    = 0x80c,
+    .i2c_ext_9548_addr          = 0x810,
+    .i2c_ext_9548_chan          = 0x814,
+    .i2c_in_9548_chan           = 0x818,
+    .i2c_slave                  = 0x81c,
+    .i2c_reg                    = 0x820,
+    .i2c_reg_len                = 0x830,
+    .i2c_data_len               = 0x834,
+    .i2c_ctrl                   = 0x838,
+    .i2c_status                 = 0x83c,
+    .i2c_data_buf               = 0x880,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x8c,
+    .i2c_reset_on               = 0x00000001,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data0 = {
+    .adap_nr                    = 6,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x2c00,
+    .i2c_filter                 = 0x2c04,
+    .i2c_stretch                = 0x2c08,
+    .i2c_ext_9548_exits_flag    = 0x2c0c,
+    .i2c_ext_9548_addr          = 0x2c10,
+    .i2c_ext_9548_chan          = 0x2c14,
+    .i2c_in_9548_chan           = 0x2c18,
+    .i2c_slave                  = 0x2c1c,
+    .i2c_reg                    = 0x2c20,
+    .i2c_reg_len                = 0x2c30,
+    .i2c_data_len               = 0x2c34,
+    .i2c_ctrl                   = 0x2c38,
+    .i2c_status                 = 0x2c3c,
+    .i2c_data_buf               = 0x2c80,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000001,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data1 = {
+    .adap_nr                    = 7,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x2d00,
+    .i2c_filter                 = 0x2d04,
+    .i2c_stretch                = 0x2d08,
+    .i2c_ext_9548_exits_flag    = 0x2d0c,
+    .i2c_ext_9548_addr          = 0x2d10,
+    .i2c_ext_9548_chan          = 0x2d14,
+    .i2c_in_9548_chan           = 0x2d18,
+    .i2c_slave                  = 0x2d1c,
+    .i2c_reg                    = 0x2d20,
+    .i2c_reg_len                = 0x2d30,
+    .i2c_data_len               = 0x2d34,
+    .i2c_ctrl                   = 0x2d38,
+    .i2c_status                 = 0x2d3c,
+    .i2c_data_buf               = 0x2d80,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000002,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data2 = {
+    .adap_nr                    = 8,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x2e00,
+    .i2c_filter                 = 0x2e04,
+    .i2c_stretch                = 0x2e08,
+    .i2c_ext_9548_exits_flag    = 0x2e0c,
+    .i2c_ext_9548_addr          = 0x2e10,
+    .i2c_ext_9548_chan          = 0x2e14,
+    .i2c_in_9548_chan           = 0x2e18,
+    .i2c_slave                  = 0x2e1c,
+    .i2c_reg                    = 0x2e20,
+    .i2c_reg_len                = 0x2e30,
+    .i2c_data_len               = 0x2e34,
+    .i2c_ctrl                   = 0x2e38,
+    .i2c_status                 = 0x2e3c,
+    .i2c_data_buf               = 0x2e80,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000004,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data3 = {
+    .adap_nr                    = 9,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x2f00,
+    .i2c_filter                 = 0x2f04,
+    .i2c_stretch                = 0x2f08,
+    .i2c_ext_9548_exits_flag    = 0x2f0c,
+    .i2c_ext_9548_addr          = 0x2f10,
+    .i2c_ext_9548_chan          = 0x2f14,
+    .i2c_in_9548_chan           = 0x2f18,
+    .i2c_slave                  = 0x2f1c,
+    .i2c_reg                    = 0x2f20,
+    .i2c_reg_len                = 0x2f30,
+    .i2c_data_len               = 0x2f34,
+    .i2c_ctrl                   = 0x2f38,
+    .i2c_status                 = 0x2f3c,
+    .i2c_data_buf               = 0x2f80,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000008,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data4 = {
+    .adap_nr                    = 10,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3000,
+    .i2c_filter                 = 0x3004,
+    .i2c_stretch                = 0x3008,
+    .i2c_ext_9548_exits_flag    = 0x300c,
+    .i2c_ext_9548_addr          = 0x3010,
+    .i2c_ext_9548_chan          = 0x3014,
+    .i2c_in_9548_chan           = 0x3018,
+    .i2c_slave                  = 0x301c,
+    .i2c_reg                    = 0x3020,
+    .i2c_reg_len                = 0x3030,
+    .i2c_data_len               = 0x3034,
+    .i2c_ctrl                   = 0x3038,
+    .i2c_status                 = 0x303c,
+    .i2c_data_buf               = 0x3080,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000010,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data5 = {
+    .adap_nr                    = 11,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3100,
+    .i2c_filter                 = 0x3104,
+    .i2c_stretch                = 0x3108,
+    .i2c_ext_9548_exits_flag    = 0x310c,
+    .i2c_ext_9548_addr          = 0x3110,
+    .i2c_ext_9548_chan          = 0x3114,
+    .i2c_in_9548_chan           = 0x3118,
+    .i2c_slave                  = 0x311c,
+    .i2c_reg                    = 0x3120,
+    .i2c_reg_len                = 0x3130,
+    .i2c_data_len               = 0x3134,
+    .i2c_ctrl                   = 0x3138,
+    .i2c_status                 = 0x313c,
+    .i2c_data_buf               = 0x3180,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000020,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data6 = {
+    .adap_nr                    = 12,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3200,
+    .i2c_filter                 = 0x3204,
+    .i2c_stretch                = 0x3208,
+    .i2c_ext_9548_exits_flag    = 0x320c,
+    .i2c_ext_9548_addr          = 0x3210,
+    .i2c_ext_9548_chan          = 0x3214,
+    .i2c_in_9548_chan           = 0x3218,
+    .i2c_slave                  = 0x321c,
+    .i2c_reg                    = 0x3220,
+    .i2c_reg_len                = 0x3230,
+    .i2c_data_len               = 0x3234,
+    .i2c_ctrl                   = 0x3238,
+    .i2c_status                 = 0x323c,
+    .i2c_data_buf               = 0x3280,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000040,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data7 = {
+    .adap_nr                    = 13,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3300,
+    .i2c_filter                 = 0x3304,
+    .i2c_stretch                = 0x3308,
+    .i2c_ext_9548_exits_flag    = 0x330c,
+    .i2c_ext_9548_addr          = 0x3310,
+    .i2c_ext_9548_chan          = 0x3314,
+    .i2c_in_9548_chan           = 0x3318,
+    .i2c_slave                  = 0x331c,
+    .i2c_reg                    = 0x3320,
+    .i2c_reg_len                = 0x3330,
+    .i2c_data_len               = 0x3334,
+    .i2c_ctrl                   = 0x3338,
+    .i2c_status                 = 0x333c,
+    .i2c_data_buf               = 0x3380,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000080,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data8 = {
+    .adap_nr                    = 14,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3400,
+    .i2c_filter                 = 0x3404,
+    .i2c_stretch                = 0x3408,
+    .i2c_ext_9548_exits_flag    = 0x340c,
+    .i2c_ext_9548_addr          = 0x3410,
+    .i2c_ext_9548_chan          = 0x3414,
+    .i2c_in_9548_chan           = 0x3418,
+    .i2c_slave                  = 0x341c,
+    .i2c_reg                    = 0x3420,
+    .i2c_reg_len                = 0x3430,
+    .i2c_data_len               = 0x3434,
+    .i2c_ctrl                   = 0x3438,
+    .i2c_status                 = 0x343c,
+    .i2c_data_buf               = 0x3480,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000100,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data9 = {
+    .adap_nr                    = 15,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3500,
+    .i2c_filter                 = 0x3504,
+    .i2c_stretch                = 0x3508,
+    .i2c_ext_9548_exits_flag    = 0x350c,
+    .i2c_ext_9548_addr          = 0x3510,
+    .i2c_ext_9548_chan          = 0x3514,
+    .i2c_in_9548_chan           = 0x3518,
+    .i2c_slave                  = 0x351c,
+    .i2c_reg                    = 0x3520,
+    .i2c_reg_len                = 0x3530,
+    .i2c_data_len               = 0x3534,
+    .i2c_ctrl                   = 0x3538,
+    .i2c_status                 = 0x353c,
+    .i2c_data_buf               = 0x3580,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000200,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data10 = {
+    .adap_nr                    = 16,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3600,
+    .i2c_filter                 = 0x3604,
+    .i2c_stretch                = 0x3608,
+    .i2c_ext_9548_exits_flag    = 0x360c,
+    .i2c_ext_9548_addr          = 0x3610,
+    .i2c_ext_9548_chan          = 0x3614,
+    .i2c_in_9548_chan           = 0x3618,
+    .i2c_slave                  = 0x361c,
+    .i2c_reg                    = 0x3620,
+    .i2c_reg_len                = 0x3630,
+    .i2c_data_len               = 0x3634,
+    .i2c_ctrl                   = 0x3638,
+    .i2c_status                 = 0x363c,
+    .i2c_data_buf               = 0x3680,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000400,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data11 = {
+    .adap_nr                    = 17,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3700,
+    .i2c_filter                 = 0x3704,
+    .i2c_stretch                = 0x3708,
+    .i2c_ext_9548_exits_flag    = 0x370c,
+    .i2c_ext_9548_addr          = 0x3710,
+    .i2c_ext_9548_chan          = 0x3714,
+    .i2c_in_9548_chan           = 0x3718,
+    .i2c_slave                  = 0x371c,
+    .i2c_reg                    = 0x3720,
+    .i2c_reg_len                = 0x3730,
+    .i2c_data_len               = 0x3734,
+    .i2c_ctrl                   = 0x3738,
+    .i2c_status                 = 0x373c,
+    .i2c_data_buf               = 0x3780,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000800,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data12 = {
+    .adap_nr                    = 18,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3800,
+    .i2c_filter                 = 0x3804,
+    .i2c_stretch                = 0x3808,
+    .i2c_ext_9548_exits_flag    = 0x380c,
+    .i2c_ext_9548_addr          = 0x3810,
+    .i2c_ext_9548_chan          = 0x3814,
+    .i2c_in_9548_chan           = 0x3818,
+    .i2c_slave                  = 0x381c,
+    .i2c_reg                    = 0x3820,
+    .i2c_reg_len                = 0x3830,
+    .i2c_data_len               = 0x3834,
+    .i2c_ctrl                   = 0x3838,
+    .i2c_status                 = 0x383c,
+    .i2c_data_buf               = 0x3880,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00001000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data13 = {
+    .adap_nr                    = 19,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3900,
+    .i2c_filter                 = 0x3904,
+    .i2c_stretch                = 0x3908,
+    .i2c_ext_9548_exits_flag    = 0x390c,
+    .i2c_ext_9548_addr          = 0x3910,
+    .i2c_ext_9548_chan          = 0x3914,
+    .i2c_in_9548_chan           = 0x3918,
+    .i2c_slave                  = 0x391c,
+    .i2c_reg                    = 0x3920,
+    .i2c_reg_len                = 0x3930,
+    .i2c_data_len               = 0x3934,
+    .i2c_ctrl                   = 0x3938,
+    .i2c_status                 = 0x393c,
+    .i2c_data_buf               = 0x3980,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00002000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data14 = {
+    .adap_nr                    = 20,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3a00,
+    .i2c_filter                 = 0x3a04,
+    .i2c_stretch                = 0x3a08,
+    .i2c_ext_9548_exits_flag    = 0x3a0c,
+    .i2c_ext_9548_addr          = 0x3a10,
+    .i2c_ext_9548_chan          = 0x3a14,
+    .i2c_in_9548_chan           = 0x3a18,
+    .i2c_slave                  = 0x3a1c,
+    .i2c_reg                    = 0x3a20,
+    .i2c_reg_len                = 0x3a30,
+    .i2c_data_len               = 0x3a34,
+    .i2c_ctrl                   = 0x3a38,
+    .i2c_status                 = 0x3a3c,
+    .i2c_data_buf               = 0x3a80,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00004000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data15 = {
+    .adap_nr                    = 21,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3b00,
+    .i2c_filter                 = 0x3b04,
+    .i2c_stretch                = 0x3b08,
+    .i2c_ext_9548_exits_flag    = 0x3b0c,
+    .i2c_ext_9548_addr          = 0x3b10,
+    .i2c_ext_9548_chan          = 0x3b14,
+    .i2c_in_9548_chan           = 0x3b18,
+    .i2c_slave                  = 0x3b1c,
+    .i2c_reg                    = 0x3b20,
+    .i2c_reg_len                = 0x3b30,
+    .i2c_data_len               = 0x3b34,
+    .i2c_ctrl                   = 0x3b38,
+    .i2c_status                 = 0x3b3c,
+    .i2c_data_buf               = 0x3b80,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00008000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static void wb_fpga_i2c_bus_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device fpga_i2c_bus_device[] = {
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &fpga_i2c_bus_device_data0,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &fpga_i2c_bus_device_data1,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 3,
+        .dev    = {
+            .platform_data  = &fpga_i2c_bus_device_data2,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 4,
+        .dev    = {
+            .platform_data  = &fpga_i2c_bus_device_data3,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 5,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data0,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 6,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data1,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 7,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data2,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 8,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data3,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 9,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data4,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 10,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data5,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 11,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data6,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 12,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data7,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 13,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data8,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 14,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data9,
+            .release = wb_fpga_i2c_bus_device_release,
+        }
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 15,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data10,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 16,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data11,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 17,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data12,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 18,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data13,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 19,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data14,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 20,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data15,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+};
+
+static int __init wb_fpga_i2c_bus_device_init(void)
+{
+    int i;
+    int ret = 0;
+    fpga_i2c_bus_device_t *fpga_i2c_bus_device_data;
+
+    WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(fpga_i2c_bus_device); i++) {
+        fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data;
+        ret = platform_device_register(&fpga_i2c_bus_device[i]);
+        if (ret < 0) {
+            fpga_i2c_bus_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "rg-fpga-i2c.%d register failed!\n", i + 1);
+        } else {
+            fpga_i2c_bus_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_fpga_i2c_bus_device_exit(void)
+{
+    int i;
+    fpga_i2c_bus_device_t *fpga_i2c_bus_device_data;
+
+    WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(fpga_i2c_bus_device) - 1; i >= 0; i--) {
+        fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data;
+        if (fpga_i2c_bus_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&fpga_i2c_bus_device[i]);
+        }
+    }
+}
+
+module_init(wb_fpga_i2c_bus_device_init);
+module_exit(wb_fpga_i2c_bus_device_exit);
+MODULE_DESCRIPTION("FPGA I2C Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_fpga_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_fpga_pca954x_device.c
new file mode 100644
index 000000000000..94a4ca54e512
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_fpga_pca954x_device.c
@@ -0,0 +1,329 @@
+/*
+ * An wb_fpga_pca954x_device driver for fpga pca954x device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_i2c_mux_pca954x.h>
+#include <fpga_i2c.h>
+
+static int g_wb_fpga_pca954x_device_debug = 0;
+static int g_wb_fpga_pca954x_device_error = 0;
+
+module_param(g_wb_fpga_pca954x_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_fpga_pca954x_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_fpga_pca954x_device_debug) { \
+        printk(KERN_INFO "[WB_FPGA_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_FPGA_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_fpga_pca954x_device_error) { \
+        printk(KERN_ERR "[WB_FPGA_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static fpga_pca954x_device_t fpga_pca954x_device_data0 = {
+    .i2c_bus = 3,
+    .i2c_addr = 0x77,
+    .pca9548_base_nr = 22,
+    .fpga_9548_flag = 2,
+    .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data1 = {
+    .i2c_bus = 4,
+    .i2c_addr = 0x71,
+    .pca9548_base_nr = 30,
+    .fpga_9548_flag = 2,
+    .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data2 = {
+    .i2c_bus = 5,
+    .i2c_addr = 0x77,
+    .pca9548_base_nr = 38,
+    .fpga_9548_flag = 2,
+    .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data3 = {
+    .i2c_bus = 6,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 46,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data4 = {
+    .i2c_bus = 7,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 48,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data5 = {
+    .i2c_bus = 8,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 50,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data6 = {
+    .i2c_bus = 9,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 52,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data7 = {
+    .i2c_bus = 10,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 54,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data8 = {
+    .i2c_bus = 11,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 56,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data9 = {
+    .i2c_bus = 12,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 58,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data10 = {
+    .i2c_bus = 13,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 60,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data11 = {
+    .i2c_bus = 14,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 62,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data12 = {
+    .i2c_bus = 15,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 64,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data13 = {
+    .i2c_bus = 16,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 66,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data14 = {
+    .i2c_bus = 17,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 68,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data15 = {
+    .i2c_bus = 18,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 70,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data16 = {
+    .i2c_bus = 19,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 72,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data17 = {
+    .i2c_bus = 20,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 74,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data18 = {
+    .i2c_bus = 21,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 76,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+struct i2c_board_info fpga_pca954x_device_info[] = {
+    {
+        .type = "wb_fpga_pca9548",
+        .platform_data = &fpga_pca954x_device_data0,
+    },
+    {
+        .type = "wb_fpga_pca9548",
+        .platform_data = &fpga_pca954x_device_data1,
+    },
+    {
+        .type = "wb_fpga_pca9548",
+        .platform_data = &fpga_pca954x_device_data2,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data3,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data4,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data5,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data6,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data7,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data8,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data9,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data10,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data11,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data12,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data13,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data14,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data15,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data16,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data17,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data18,
+    },
+};
+
+static int __init wb_fpga_pca954x_device_init(void)
+{
+    int i;
+    struct i2c_adapter *adap;
+    struct i2c_client *client;
+    fpga_pca954x_device_t *fpga_pca954x_device_data;
+
+    WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(fpga_pca954x_device_info); i++) {
+        fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data;
+        fpga_pca954x_device_info[i].addr = fpga_pca954x_device_data->i2c_addr;
+        adap = i2c_get_adapter(fpga_pca954x_device_data->i2c_bus);
+        if (adap == NULL) {
+            fpga_pca954x_device_data->client = NULL;
+            printk(KERN_ERR "get i2c bus %d adapter fail.\n", fpga_pca954x_device_data->i2c_bus);
+            continue;
+        }
+        client = i2c_new_client_device(adap, &fpga_pca954x_device_info[i]);
+        if (!client) {
+            fpga_pca954x_device_data->client = NULL;
+            printk(KERN_ERR "Failed to register fpga pca954x device %d at bus %d!\n",
+                fpga_pca954x_device_data->i2c_addr, fpga_pca954x_device_data->i2c_bus);
+        } else {
+            fpga_pca954x_device_data->client = client;
+        }
+        i2c_put_adapter(adap);
+    }
+    return 0;
+}
+
+static void __exit wb_fpga_pca954x_device_exit(void)
+{
+    int i;
+    fpga_pca954x_device_t *fpga_pca954x_device_data;
+
+    WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(fpga_pca954x_device_info) - 1; i >= 0; i--) {
+        fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data;
+        if (fpga_pca954x_device_data->client) {
+            i2c_unregister_device(fpga_pca954x_device_data->client);
+            fpga_pca954x_device_data->client = NULL;
+        }
+    }
+}
+
+module_init(wb_fpga_pca954x_device_init);
+module_exit(wb_fpga_pca954x_device_exit);
+MODULE_DESCRIPTION("FPGA PCA954X Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_i2c_dev_device.c
new file mode 100644
index 000000000000..89e8f3221300
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_i2c_dev_device.c
@@ -0,0 +1,175 @@
+/*
+ * An wb_i2c_dev_device driver for i2c dev device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_i2c_dev.h>
+
+static int g_wb_i2c_dev_device_debug = 0;
+static int g_wb_i2c_dev_device_error = 0;
+
+module_param(g_wb_i2c_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_i2c_dev_device_debug) { \
+        printk(KERN_INFO "[WB_I2C_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_I2C_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_i2c_dev_device_error) { \
+        printk(KERN_ERR "[WB_I2C_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static i2c_dev_device_t i2c_dev_device_data0 = {
+    .i2c_bus = 2,
+    .i2c_addr = 0x1d,
+    .i2c_name = "cpld4",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data1 = {
+    .i2c_bus = 2,
+    .i2c_addr = 0x2d,
+    .i2c_name = "cpld5",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data2 = {
+    .i2c_bus = 2,
+    .i2c_addr = 0x1e,
+    .i2c_name = "cpld7",
+    .data_bus_width = 1,
+    .addr_bus_width = 2,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 0x2000,
+};
+
+static i2c_dev_device_t i2c_dev_device_data3 = {
+    .i2c_bus = 4,
+    .i2c_addr = 0x3d,
+    .i2c_name = "cpld6",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data4 = {
+    .i2c_bus = 4,
+    .i2c_addr = 0x3e,
+    .i2c_name = "cpld8",
+    .data_bus_width = 1,
+    .addr_bus_width = 2,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 0x2000,
+};
+
+struct i2c_board_info i2c_dev_device_info[] = {
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data0,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data1,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data2,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data3,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data4,
+    },
+};
+
+static int __init wb_i2c_dev_device_init(void)
+{
+    int i;
+    struct i2c_adapter *adap;
+    struct i2c_client *client;
+    i2c_dev_device_t *i2c_dev_device_data;
+
+    WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(i2c_dev_device_info); i++) {
+        i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+        i2c_dev_device_info[i].addr = i2c_dev_device_data->i2c_addr;
+        adap = i2c_get_adapter(i2c_dev_device_data->i2c_bus);
+        if (adap == NULL) {
+            i2c_dev_device_data->client = NULL;
+            printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_dev_device_data->i2c_bus);
+            continue;
+        }
+        client = i2c_new_client_device(adap, &i2c_dev_device_info[i]);
+        if (!client) {
+            i2c_dev_device_data->client = NULL;
+            printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n",
+                i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus);
+        } else {
+            i2c_dev_device_data->client = client;
+        }
+        i2c_put_adapter(adap);
+    }
+    return 0;
+}
+
+static void __exit wb_i2c_dev_device_exit(void)
+{
+    int i;
+    i2c_dev_device_t *i2c_dev_device_data;
+
+    WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(i2c_dev_device_info) - 1; i >= 0; i--) {
+        i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+        if (i2c_dev_device_data->client) {
+            i2c_unregister_device(i2c_dev_device_data->client);
+            i2c_dev_device_data->client = NULL;
+        }
+    }
+}
+
+module_init(wb_i2c_dev_device_init);
+module_exit(wb_i2c_dev_device_exit);
+MODULE_DESCRIPTION("I2C DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_io_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_io_dev_device.c
new file mode 100644
index 000000000000..ae7ff5523f63
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_io_dev_device.c
@@ -0,0 +1,138 @@
+/*
+ * An wb_io_dev_device driver for io device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_io_dev.h>
+
+static int g_wb_io_dev_device_debug = 0;
+static int g_wb_io_dev_device_error = 0;
+
+module_param(g_wb_io_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_io_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_IO_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_io_dev_device_debug) { \
+        printk(KERN_INFO "[WB_IO_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_IO_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_io_dev_device_error) { \
+        printk(KERN_ERR "[WB_IO_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static io_dev_device_t io_dev_device_data0 = {
+    .io_dev_name = "cpld0",
+    .io_base = 0x700,
+    .io_len = 0x100,
+    .indirect_addr = 0,
+};
+
+static io_dev_device_t io_dev_device_data1 = {
+    .io_dev_name = "cpld1",
+    .io_base = 0x900,
+    .io_len = 0x100,
+    .indirect_addr = 0,
+};
+
+static io_dev_device_t io_dev_device_data2 = {
+    .io_dev_name = "cpld2",
+    .io_base = 0xb00,
+    .io_len = 0x100,
+    .indirect_addr = 0,
+};
+
+static void wb_io_dev_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device io_dev_device[] = {
+    {
+        .name   = "wb-io-dev",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &io_dev_device_data0,
+            .release = wb_io_dev_device_release,
+        },
+    },
+    {
+        .name   = "wb-io-dev",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &io_dev_device_data1,
+            .release = wb_io_dev_device_release,
+        },
+    },
+    {
+        .name   = "wb-io-dev",
+        .id = 3,
+        .dev    = {
+            .platform_data  = &io_dev_device_data2,
+            .release = wb_io_dev_device_release,
+        },
+    },
+};
+
+static int __init wb_io_dev_device_init(void)
+{
+    int i;
+    int ret = 0;
+    io_dev_device_t *io_dev_device_data;
+
+    WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(io_dev_device); i++) {
+        io_dev_device_data = io_dev_device[i].dev.platform_data;
+        ret = platform_device_register(&io_dev_device[i]);
+        if (ret < 0) {
+            io_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-io-dev.%d register failed!\n", i + 1);
+        } else {
+            io_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_io_dev_device_exit(void)
+{
+    int i;
+    io_dev_device_t *io_dev_device_data;
+
+    WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(io_dev_device) - 1; i >= 0; i--) {
+        io_dev_device_data = io_dev_device[i].dev.platform_data;
+        if (io_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&io_dev_device[i]);
+        }
+    }
+}
+
+module_init(wb_io_dev_device_init);
+module_exit(wb_io_dev_device_exit);
+MODULE_DESCRIPTION("IO DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_lpc_drv_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_lpc_drv_device.c
new file mode 100644
index 000000000000..27dbd87d71b2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_lpc_drv_device.c
@@ -0,0 +1,150 @@
+/*
+ * An wb_lpc_drv_device driver for lpc device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_lpc_drv.h>
+
+static int g_wb_lpc_drv_device_debug = 0;
+static int g_wb_lpc_drv_device_error = 0;
+
+module_param(g_wb_lpc_drv_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_lpc_drv_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_LPC_DRV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_lpc_drv_device_debug) { \
+        printk(KERN_INFO "[WB_LPC_DRV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_LPC_DRV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_lpc_drv_device_error) { \
+        printk(KERN_ERR "[WB_LPC_DRV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static lpc_drv_device_t lpc_drv_device_data_0 = {
+    .lpc_io_name = "wb_lpc",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 0,
+    .lpc_io_base = 0x700,
+    .lpc_io_size = 0x100,
+    .lpc_gen_dec = 0x84,
+};
+
+static lpc_drv_device_t lpc_drv_device_data_1 = {
+    .lpc_io_name = "wb_lpc",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 0,
+    .lpc_io_base = 0x900,
+    .lpc_io_size = 0x100,
+    .lpc_gen_dec = 0x88,
+};
+
+static lpc_drv_device_t lpc_drv_device_data_2 = {
+    .lpc_io_name = "wb_lpc",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 0,
+    .lpc_io_base = 0xb00,
+    .lpc_io_size = 0x100,
+    .lpc_gen_dec = 0x90,
+};
+
+static void wb_lpc_drv_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device lpc_drv_device[] = {
+    {
+        .name   = "wb-lpc",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &lpc_drv_device_data_0,
+            .release = wb_lpc_drv_device_release,
+        },
+    },
+    {
+        .name   = "wb-lpc",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &lpc_drv_device_data_1,
+            .release = wb_lpc_drv_device_release,
+        },
+    },
+    {
+        .name   = "wb-lpc",
+        .id = 3,
+        .dev    = {
+            .platform_data  = &lpc_drv_device_data_2,
+            .release = wb_lpc_drv_device_release,
+        },
+    },
+};
+
+static int __init wb_lpc_drv_device_init(void)
+{
+    int i;
+    int ret = 0;
+    lpc_drv_device_t *lpc_drv_device_data;
+
+    WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(lpc_drv_device); i++) {
+        lpc_drv_device_data = lpc_drv_device[i].dev.platform_data;
+        ret = platform_device_register(&lpc_drv_device[i]);
+        if (ret < 0) {
+            lpc_drv_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-lpc.%d register failed!\n", i + 1);
+        } else {
+            lpc_drv_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_lpc_drv_device_exit(void)
+{
+    int i;
+    lpc_drv_device_t *lpc_drv_device_data;
+
+    WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(lpc_drv_device) - 1; i >= 0; i--) {
+        lpc_drv_device_data = lpc_drv_device[i].dev.platform_data;
+        if (lpc_drv_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&lpc_drv_device[i]);
+        }
+    }
+}
+
+module_init(wb_lpc_drv_device_init);
+module_exit(wb_lpc_drv_device_exit);
+MODULE_DESCRIPTION("LPC DRV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_pcie_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_pcie_dev_device.c
new file mode 100644
index 000000000000..561e64d449b4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_pcie_dev_device.c
@@ -0,0 +1,113 @@
+/*
+ * An wb_pcie_dev_device driver for pcie device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_pcie_dev.h>
+
+static int g_wb_pcie_dev_device_debug = 0;
+static int g_wb_pcie_dev_device_error = 0;
+
+module_param(g_wb_pcie_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_pcie_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_pcie_dev_device_debug) { \
+        printk(KERN_INFO "[WB_PCIE_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_PCIE_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_pcie_dev_device_error) { \
+        printk(KERN_ERR "[WB_PCIE_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static pci_dev_device_t pcie_dev_device_data0 = {
+    .pci_dev_name = "fpga0",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x08,
+    .pci_slot = 0x00,
+    .pci_fn = 0,
+    .pci_bar = 0,
+    .bus_width = 4,
+    .upg_ctrl_base = 0xa00,
+    .upg_flash_base = 0x2f0000,
+};
+
+static void wb_pcie_dev_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device pcie_dev_device[] = {
+    {
+        .name   = "wb-pci-dev",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &pcie_dev_device_data0,
+            .release = wb_pcie_dev_device_release,
+        },
+    },
+};
+
+static int __init wb_pcie_dev_device_init(void)
+{
+    int i;
+    int ret = 0;
+    pci_dev_device_t *pcie_dev_device_data;
+
+    WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(pcie_dev_device); i++) {
+        pcie_dev_device_data = pcie_dev_device[i].dev.platform_data;
+        ret = platform_device_register(&pcie_dev_device[i]);
+        if (ret < 0) {
+            pcie_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-pci-dev.%d register failed!\n", i + 1);
+        } else {
+            pcie_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_pcie_dev_device_exit(void)
+{
+    int i;
+    pci_dev_device_t *pcie_dev_device_data;
+
+    WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(pcie_dev_device) - 1; i >= 0; i--) {
+        pcie_dev_device_data = pcie_dev_device[i].dev.platform_data;
+        if (pcie_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&pcie_dev_device[i]);
+        }
+    }
+}
+
+module_init(wb_pcie_dev_device_init);
+module_exit(wb_pcie_dev_device_exit);
+MODULE_DESCRIPTION("PCIE DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
new file mode 100644
index 000000000000..54364261adbc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
@@ -0,0 +1,37 @@
+# configuration item: I2C address of CPLD
+# format: cpld_i2c_dev.bus_[cpld_slot]_[cpld_id] cpld_i2c_dev.addr_[cpld_slot]_[cpld_id]
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+# bus: I2C bus number of CPLD
+# addr: I2C address of CPLD
+cpld_i2c_dev.bus_0_2=2
+cpld_i2c_dev.addr_0_2=0x1d
+cpld_i2c_dev.bus_0_3=2
+cpld_i2c_dev.addr_0_3=0x2d
+cpld_i2c_dev.bus_0_4=4
+cpld_i2c_dev.addr_0_4=0x3d
+
+# configuration item: LPC address of CPLD
+# format: cpld_lpc_addr_[cpld_slot]_[cpld_id]
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+cpld_lpc_dev_0_0=0x700
+cpld_lpc_dev_0_1=0x900
+
+
+# configuration item: CPLD access method, lpc or i2c
+# format: mode_cpld_[cpld_slot][cpld_slot]=lpc/i2c
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+mode_cpld_0_0=lpc
+mode_cpld_0_1=lpc
+mode_cpld_0_2=i2c
+mode_cpld_0_3=i2c
+mode_cpld_0_4=i2c
+
+
+# configuration item: the number of CPLD
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: CPLD main_dev is 4
+# minor_dev: CPLD minor_dev not exist
+dev_num_4_0=5
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg
new file mode 100644
index 000000000000..bcbfa1d77bbb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg
@@ -0,0 +1,437 @@
+# configuration item: the number of fans
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: fan main_dev is 1
+# minor_dev: fan minor_dev not exist(0)
+dev_num_1_0=6
+
+
+# configuration item: the number of rotors
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: rotor main_dev is 1
+# minor_dev: rotor minor_dev is 5
+dev_num_1_5=2
+
+
+# configuration item: fan presence status
+# format: dev_present_status_[main_dev_id][fan_index]
+# main_dev_id: fan main_dev_id is 1
+# fan_index: start from 1
+dev_present_status.mode_1_1=config
+dev_present_status.src_1_1=cpld
+dev_present_status.frmt_1_1=bit
+dev_present_status.pola_1_1=negative
+dev_present_status.addr_1_1=0x00040037
+dev_present_status.len_1_1=1
+dev_present_status.bit_offset_1_1=5
+
+dev_present_status.mode_1_2=config
+dev_present_status.src_1_2=cpld
+dev_present_status.frmt_1_2=bit
+dev_present_status.pola_1_2=negative
+dev_present_status.addr_1_2=0x00040037
+dev_present_status.len_1_2=1
+dev_present_status.bit_offset_1_2=4
+
+dev_present_status.mode_1_3=config
+dev_present_status.src_1_3=cpld
+dev_present_status.frmt_1_3=bit
+dev_present_status.pola_1_3=negative
+dev_present_status.addr_1_3=0x00040037
+dev_present_status.len_1_3=1
+dev_present_status.bit_offset_1_3=3
+
+dev_present_status.mode_1_4=config
+dev_present_status.src_1_4=cpld
+dev_present_status.frmt_1_4=bit
+dev_present_status.pola_1_4=negative
+dev_present_status.addr_1_4=0x00040037
+dev_present_status.len_1_4=1
+dev_present_status.bit_offset_1_4=2
+
+dev_present_status.mode_1_5=config
+dev_present_status.src_1_5=cpld
+dev_present_status.frmt_1_5=bit
+dev_present_status.pola_1_5=negative
+dev_present_status.addr_1_5=0x00040037
+dev_present_status.len_1_5=1
+dev_present_status.bit_offset_1_5=1
+
+dev_present_status.mode_1_6=config
+dev_present_status.src_1_6=cpld
+dev_present_status.frmt_1_6=bit
+dev_present_status.pola_1_6=negative
+dev_present_status.addr_1_6=0x00040037
+dev_present_status.len_1_6=1
+dev_present_status.bit_offset_1_6=0
+
+# configuration item: fan rotor status
+# format: fan_roll_status_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_roll_status.mode_1_0=config
+fan_roll_status.int_cons_1_0=
+fan_roll_status.src_1_0=cpld
+fan_roll_status.frmt_1_0=bit
+fan_roll_status.pola_1_0=positive
+fan_roll_status.fpath_1_0=
+fan_roll_status.addr_1_0=0x00040038
+fan_roll_status.len_1_0=1
+fan_roll_status.bit_offset_1_0=5
+
+fan_roll_status.mode_1_1=config
+fan_roll_status.int_cons_1_1=
+fan_roll_status.src_1_1=cpld
+fan_roll_status.frmt_1_1=bit
+fan_roll_status.pola_1_1=positive
+fan_roll_status.fpath_1_1=
+fan_roll_status.addr_1_1=0x00040039
+fan_roll_status.len_1_1=1
+fan_roll_status.bit_offset_1_1=5
+
+fan_roll_status.mode_2_0=config
+fan_roll_status.int_cons_2_0=
+fan_roll_status.src_2_0=cpld
+fan_roll_status.frmt_2_0=bit
+fan_roll_status.pola_2_0=positive
+fan_roll_status.fpath_2_0=
+fan_roll_status.addr_2_0=0x00040038
+fan_roll_status.len_2_0=1
+fan_roll_status.bit_offset_2_0=4
+
+fan_roll_status.mode_2_1=config
+fan_roll_status.int_cons_2_1=
+fan_roll_status.src_2_1=cpld
+fan_roll_status.frmt_2_1=bit
+fan_roll_status.pola_2_1=positive
+fan_roll_status.fpath_2_1=
+fan_roll_status.addr_2_1=0x00040039
+fan_roll_status.len_2_1=1
+fan_roll_status.bit_offset_2_1=4
+
+fan_roll_status.mode_3_0=config
+fan_roll_status.int_cons_3_0=
+fan_roll_status.src_3_0=cpld
+fan_roll_status.frmt_3_0=bit
+fan_roll_status.pola_3_0=positive
+fan_roll_status.fpath_3_0=
+fan_roll_status.addr_3_0=0x00040038
+fan_roll_status.len_3_0=1
+fan_roll_status.bit_offset_3_0=3
+
+fan_roll_status.mode_3_1=config
+fan_roll_status.int_cons_3_1=
+fan_roll_status.src_3_1=cpld
+fan_roll_status.frmt_3_1=bit
+fan_roll_status.pola_3_1=positive
+fan_roll_status.fpath_3_1=
+fan_roll_status.addr_3_1=0x00040039
+fan_roll_status.len_3_1=1
+fan_roll_status.bit_offset_3_1=3
+
+fan_roll_status.mode_4_0=config
+fan_roll_status.int_cons_4_0=
+fan_roll_status.src_4_0=cpld
+fan_roll_status.frmt_4_0=bit
+fan_roll_status.pola_4_0=positive
+fan_roll_status.fpath_4_0=
+fan_roll_status.addr_4_0=0x00040038
+fan_roll_status.len_4_0=1
+fan_roll_status.bit_offset_4_0=2
+
+fan_roll_status.mode_4_1=config
+fan_roll_status.int_cons_4_1=
+fan_roll_status.src_4_1=cpld
+fan_roll_status.frmt_4_1=bit
+fan_roll_status.pola_4_1=positive
+fan_roll_status.fpath_4_1=
+fan_roll_status.addr_4_1=0x00040039
+fan_roll_status.len_4_1=1
+fan_roll_status.bit_offset_4_1=2
+
+fan_roll_status.mode_5_0=config
+fan_roll_status.int_cons_5_0=
+fan_roll_status.src_5_0=cpld
+fan_roll_status.frmt_5_0=bit
+fan_roll_status.pola_5_0=positive
+fan_roll_status.fpath_5_0=
+fan_roll_status.addr_5_0=0x00040038
+fan_roll_status.len_5_0=1
+fan_roll_status.bit_offset_5_0=1
+
+fan_roll_status.mode_5_1=config
+fan_roll_status.int_cons_5_1=
+fan_roll_status.src_5_1=cpld
+fan_roll_status.frmt_5_1=bit
+fan_roll_status.pola_5_1=positive
+fan_roll_status.fpath_5_1=
+fan_roll_status.addr_5_1=0x00040039
+fan_roll_status.len_5_1=1
+fan_roll_status.bit_offset_5_1=1
+
+fan_roll_status.mode_6_0=config
+fan_roll_status.int_cons_6_0=
+fan_roll_status.src_6_0=cpld
+fan_roll_status.frmt_6_0=bit
+fan_roll_status.pola_6_0=positive
+fan_roll_status.fpath_6_0=
+fan_roll_status.addr_6_0=0x00040038
+fan_roll_status.len_6_0=1
+fan_roll_status.bit_offset_6_0=0
+
+fan_roll_status.mode_6_1=config
+fan_roll_status.int_cons_6_1=
+fan_roll_status.src_6_1=cpld
+fan_roll_status.frmt_6_1=bit
+fan_roll_status.pola_6_1=positive
+fan_roll_status.fpath_6_1=
+fan_roll_status.addr_6_1=0x00040039
+fan_roll_status.len_6_1=1
+fan_roll_status.bit_offset_6_1=0
+
+# configuration item: fan speed
+# format: fan_speed_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_speed.mode_1_0=config
+fan_speed.int_cons_1_0=
+fan_speed.src_1_0=cpld
+fan_speed.frmt_1_0=num_bytes
+fan_speed.pola_1_0=negative
+fan_speed.fpath_1_0=
+fan_speed.addr_1_0=0x00040070
+fan_speed.len_1_0=2
+fan_speed.bit_offset_1_0=
+
+fan_speed.mode_1_1=config
+fan_speed.int_cons_1_1=
+fan_speed.src_1_1=cpld
+fan_speed.frmt_1_1=num_bytes
+fan_speed.pola_1_1=negative
+fan_speed.fpath_1_1=
+fan_speed.addr_1_1=0x0004007c
+fan_speed.len_1_1=2
+fan_speed.bit_offset_1_1=
+
+fan_speed.mode_2_0=config
+fan_speed.int_cons_2_0=
+fan_speed.src_2_0=cpld
+fan_speed.frmt_2_0=num_bytes
+fan_speed.pola_2_0=negative
+fan_speed.fpath_2_0=
+fan_speed.addr_2_0=0x0004006e
+fan_speed.len_2_0=2
+fan_speed.bit_offset_2_0=
+
+fan_speed.mode_2_1=config
+fan_speed.int_cons_2_1=
+fan_speed.src_2_1=cpld
+fan_speed.frmt_2_1=num_bytes
+fan_speed.pola_2_1=negative
+fan_speed.fpath_2_1=
+fan_speed.addr_2_1=0x0004007a
+fan_speed.len_2_1=2
+fan_speed.bit_offset_2_1=
+
+fan_speed.mode_3_0=config
+fan_speed.int_cons_3_0=
+fan_speed.src_3_0=cpld
+fan_speed.frmt_3_0=num_bytes
+fan_speed.pola_3_0=negative
+fan_speed.fpath_3_0=
+fan_speed.addr_3_0=0x0004006c
+fan_speed.len_3_0=2
+fan_speed.bit_offset_3_0=
+
+fan_speed.mode_3_1=config
+fan_speed.int_cons_3_1=
+fan_speed.src_3_1=cpld
+fan_speed.frmt_3_1=num_bytes
+fan_speed.pola_3_1=negative
+fan_speed.fpath_3_1=
+fan_speed.addr_3_1=0x00040078
+fan_speed.len_3_1=2
+fan_speed.bit_offset_3_1=
+
+fan_speed.mode_4_0=config
+fan_speed.int_cons_4_0=
+fan_speed.src_4_0=cpld
+fan_speed.frmt_4_0=num_bytes
+fan_speed.pola_4_0=negative
+fan_speed.fpath_4_0=
+fan_speed.addr_4_0=0x0004006a
+fan_speed.len_4_0=2
+fan_speed.bit_offset_4_0=
+
+fan_speed.mode_4_1=config
+fan_speed.int_cons_4_1=
+fan_speed.src_4_1=cpld
+fan_speed.frmt_4_1=num_bytes
+fan_speed.pola_4_1=negative
+fan_speed.fpath_4_1=
+fan_speed.addr_4_1=0x00040076
+fan_speed.len_4_1=2
+fan_speed.bit_offset_4_1=
+
+fan_speed.mode_5_0=config
+fan_speed.int_cons_5_0=
+fan_speed.src_5_0=cpld
+fan_speed.frmt_5_0=num_bytes
+fan_speed.pola_5_0=negative
+fan_speed.fpath_5_0=
+fan_speed.addr_5_0=0x00040068
+fan_speed.len_5_0=2
+fan_speed.bit_offset_5_0=
+
+fan_speed.mode_5_1=config
+fan_speed.int_cons_5_1=
+fan_speed.src_5_1=cpld
+fan_speed.frmt_5_1=num_bytes
+fan_speed.pola_5_1=negative
+fan_speed.fpath_5_1=
+fan_speed.addr_5_1=0x00040074
+fan_speed.len_5_1=2
+fan_speed.bit_offset_5_1=
+
+fan_speed.mode_6_0=config
+fan_speed.int_cons_6_0=
+fan_speed.src_6_0=cpld
+fan_speed.frmt_6_0=num_bytes
+fan_speed.pola_6_0=negative
+fan_speed.fpath_6_0=
+fan_speed.addr_6_0=0x00040066
+fan_speed.len_6_0=2
+fan_speed.bit_offset_6_0=
+
+fan_speed.mode_6_1=config
+fan_speed.int_cons_6_1=
+fan_speed.src_6_1=cpld
+fan_speed.frmt_6_1=num_bytes
+fan_speed.pola_6_1=negative
+fan_speed.fpath_6_1=
+fan_speed.addr_6_1=0x00040072
+fan_speed.len_6_1=2
+fan_speed.bit_offset_6_1=
+
+# configuration item: fan pwm
+# format: fan_ratio_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_ratio.mode_1_0=config
+fan_ratio.int_cons_1_0=
+fan_ratio.src_1_0=cpld
+fan_ratio.frmt_1_0=byte
+fan_ratio.pola_1_0=
+fan_ratio.fpath_1_0=
+fan_ratio.addr_1_0=0x00040065
+fan_ratio.len_1_0=1
+fan_ratio.bit_offset_1_0=
+
+fan_ratio.mode_1_1=config
+fan_ratio.int_cons_1_1=
+fan_ratio.src_1_1=cpld
+fan_ratio.frmt_1_1=byte
+fan_ratio.pola_1_1=
+fan_ratio.fpath_1_1=
+fan_ratio.addr_1_1=0x00040065
+fan_ratio.len_1_1=1
+fan_ratio.bit_offset_1_1=
+
+fan_ratio.mode_2_0=config
+fan_ratio.int_cons_2_0=
+fan_ratio.src_2_0=cpld
+fan_ratio.frmt_2_0=byte
+fan_ratio.pola_2_0=
+fan_ratio.fpath_2_0=
+fan_ratio.addr_2_0=0x00040064
+fan_ratio.len_2_0=1
+fan_ratio.bit_offset_2_0=
+
+fan_ratio.mode_2_1=config
+fan_ratio.int_cons_2_1=
+fan_ratio.src_2_1=cpld
+fan_ratio.frmt_2_1=byte
+fan_ratio.pola_2_1=
+fan_ratio.fpath_2_1=
+fan_ratio.addr_2_1=0x00040064
+fan_ratio.len_2_1=1
+fan_ratio.bit_offset_2_1=
+
+fan_ratio.mode_3_0=config
+fan_ratio.int_cons_3_0=
+fan_ratio.src_3_0=cpld
+fan_ratio.frmt_3_0=byte
+fan_ratio.pola_3_0=
+fan_ratio.fpath_3_0=
+fan_ratio.addr_3_0=0x00040063
+fan_ratio.len_3_0=1
+fan_ratio.bit_offset_3_0=
+
+fan_ratio.mode_3_1=config
+fan_ratio.int_cons_3_1=
+fan_ratio.src_3_1=cpld
+fan_ratio.frmt_3_1=byte
+fan_ratio.pola_3_1=
+fan_ratio.fpath_3_1=
+fan_ratio.addr_3_1=0x00040063
+fan_ratio.len_3_1=1
+fan_ratio.bit_offset_3_1=
+
+fan_ratio.mode_4_0=config
+fan_ratio.int_cons_4_0=
+fan_ratio.src_4_0=cpld
+fan_ratio.frmt_4_0=byte
+fan_ratio.pola_4_0=
+fan_ratio.fpath_4_0=
+fan_ratio.addr_4_0=0x00040062
+fan_ratio.len_4_0=1
+fan_ratio.bit_offset_4_0=
+
+fan_ratio.mode_4_1=config
+fan_ratio.int_cons_4_1=
+fan_ratio.src_4_1=cpld
+fan_ratio.frmt_4_1=byte
+fan_ratio.pola_4_1=
+fan_ratio.fpath_4_1=
+fan_ratio.addr_4_1=0x00040062
+fan_ratio.len_4_1=1
+fan_ratio.bit_offset_4_1=
+
+fan_ratio.mode_5_0=config
+fan_ratio.int_cons_5_0=
+fan_ratio.src_5_0=cpld
+fan_ratio.frmt_5_0=byte
+fan_ratio.pola_5_0=
+fan_ratio.fpath_5_0=
+fan_ratio.addr_5_0=0x00040061
+fan_ratio.len_5_0=1
+fan_ratio.bit_offset_5_0=
+
+fan_ratio.mode_5_1=config
+fan_ratio.int_cons_5_1=
+fan_ratio.src_5_1=cpld
+fan_ratio.frmt_5_1=byte
+fan_ratio.pola_5_1=
+fan_ratio.fpath_5_1=
+fan_ratio.addr_5_1=0x00040061
+fan_ratio.len_5_1=1
+fan_ratio.bit_offset_5_1=
+
+fan_ratio.mode_6_0=config
+fan_ratio.int_cons_6_0=
+fan_ratio.src_6_0=cpld
+fan_ratio.frmt_6_0=byte
+fan_ratio.pola_6_0=
+fan_ratio.fpath_6_0=
+fan_ratio.addr_6_0=0x00040060
+fan_ratio.len_6_0=1
+fan_ratio.bit_offset_6_0=
+
+fan_ratio.mode_6_1=config
+fan_ratio.int_cons_6_1=
+fan_ratio.src_6_1=cpld
+fan_ratio.frmt_6_1=byte
+fan_ratio.pola_6_1=
+fan_ratio.fpath_6_1=
+fan_ratio.addr_6_1=0x00040060
+fan_ratio.len_6_1=1
+fan_ratio.bit_offset_6_1=
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg
new file mode 100644
index 000000000000..26a838bfcfa5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg
@@ -0,0 +1,64 @@
+# configuration item: the number of psus
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: psu main_dev is 2
+# minor_dev: psu minor_dev not exist(0)
+dev_num_2_0=2
+
+
+# configuration item: psu status
+# format: psu_status_[psu_index]_[status_id]
+# psu_index: start from 1
+# status_id: 0: presence 1: output 2: alert
+# psu1 presence status
+psu_status.mode_1_0=config
+psu_status.src_1_0=cpld
+psu_status.frmt_1_0=bit
+psu_status.pola_1_0=negative
+psu_status.addr_1_0=0x00020034
+psu_status.len_1_0=1
+psu_status.bit_offset_1_0=0
+
+# psu1 output status
+psu_status.mode_1_1=config
+psu_status.src_1_1=cpld
+psu_status.frmt_1_1=bit
+psu_status.pola_1_1=positive
+psu_status.addr_1_1=0x00020034
+psu_status.len_1_1=1
+psu_status.bit_offset_1_1=1
+
+# psu1 alert status
+psu_status.mode_1_2=config
+psu_status.src_1_2=cpld
+psu_status.frmt_1_2=bit
+psu_status.pola_1_2=negative
+psu_status.addr_1_2=0x00020034
+psu_status.len_1_2=1
+psu_status.bit_offset_1_2=2
+
+# psu2 presence status
+psu_status.mode_2_0=config
+psu_status.src_2_0=cpld
+psu_status.frmt_2_0=bit
+psu_status.pola_2_0=negative
+psu_status.addr_2_0=0x00020034
+psu_status.len_2_0=1
+psu_status.bit_offset_2_0=4
+
+# psu2 output status
+psu_status.mode_2_1=config
+psu_status.src_2_1=cpld
+psu_status.frmt_2_1=bit
+psu_status.pola_2_1=positive
+psu_status.addr_2_1=0x00020034
+psu_status.len_2_1=1
+psu_status.bit_offset_2_1=5
+
+# psu2 alert status
+psu_status.mode_2_2=config
+psu_status.src_2_2=cpld
+psu_status.frmt_2_2=bit
+psu_status.pola_2_2=negative
+psu_status.addr_2_2=0x00020034
+psu_status.len_2_2=1
+psu_status.bit_offset_2_2=6
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg
new file mode 100644
index 000000000000..fa45f76b9323
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg
@@ -0,0 +1,383 @@
+# configuration item: the number of sffs
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: sff main_dev is 3
+# minor_dev: sff minor_dev not exist(0)
+dev_num_3_0=32
+
+
+# configuration item: The directory name of sff sysfs
+# format: sff_dir_name_[sff_index]
+# sff_index: start from 1
+sff_dir_name_1 =sff1
+sff_dir_name_2 =sff2
+sff_dir_name_3 =sff3
+sff_dir_name_4 =sff4
+sff_dir_name_5 =sff5
+sff_dir_name_6 =sff6
+sff_dir_name_7 =sff7
+sff_dir_name_8 =sff8
+sff_dir_name_9 =sff9
+sff_dir_name_10 =sff10
+sff_dir_name_11 =sff11
+sff_dir_name_12 =sff12
+sff_dir_name_13 =sff13
+sff_dir_name_14 =sff14
+sff_dir_name_15 =sff15
+sff_dir_name_16 =sff16
+sff_dir_name_17 =sff17
+sff_dir_name_18 =sff18
+sff_dir_name_19 =sff19
+sff_dir_name_20 =sff20
+sff_dir_name_21 =sff21
+sff_dir_name_22 =sff22
+sff_dir_name_23 =sff23
+sff_dir_name_24 =sff24
+sff_dir_name_25 =sff25
+sff_dir_name_26 =sff26
+sff_dir_name_27 =sff27
+sff_dir_name_28 =sff28
+sff_dir_name_29 =sff29
+sff_dir_name_30 =sff30
+sff_dir_name_31 =sff31
+sff_dir_name_32 =sff32
+
+
+# configuration item: sff cpld register status
+# format: sff_cpld_reg_[sff_index]_[cpld_reg]
+# sff_index: start from 1
+# cpld_reg: 1: power_on, 2: tx_fault, 3: tx_dis, 4:pre_n, 5:rx_los
+# 6: reset, 7: lpmode, 8: module_present, 9: interrupt
+
+# sff cpld presence status
+sff_cpld_reg.mode_1_8=config
+sff_cpld_reg.src_1_8=cpld
+sff_cpld_reg.frmt_1_8=bit
+sff_cpld_reg.pola_1_8=negative
+sff_cpld_reg.addr_1_8=0x00020030
+sff_cpld_reg.len_1_8=1
+sff_cpld_reg.bit_offset_1_8=0
+
+sff_cpld_reg.mode_2_8=config
+sff_cpld_reg.src_2_8=cpld
+sff_cpld_reg.frmt_2_8=bit
+sff_cpld_reg.pola_2_8=negative
+sff_cpld_reg.addr_2_8=0x00020030
+sff_cpld_reg.len_2_8=1
+sff_cpld_reg.bit_offset_2_8=1
+
+sff_cpld_reg.mode_3_8=config
+sff_cpld_reg.src_3_8=cpld
+sff_cpld_reg.frmt_3_8=bit
+sff_cpld_reg.pola_3_8=negative
+sff_cpld_reg.addr_3_8=0x00020030
+sff_cpld_reg.len_3_8=1
+sff_cpld_reg.bit_offset_3_8=2
+
+sff_cpld_reg.mode_4_8=config
+sff_cpld_reg.src_4_8=cpld
+sff_cpld_reg.frmt_4_8=bit
+sff_cpld_reg.pola_4_8=negative
+sff_cpld_reg.addr_4_8=0x00020030
+sff_cpld_reg.len_4_8=1
+sff_cpld_reg.bit_offset_4_8=3
+
+sff_cpld_reg.mode_5_8=config
+sff_cpld_reg.src_5_8=cpld
+sff_cpld_reg.frmt_5_8=bit
+sff_cpld_reg.pola_5_8=negative
+sff_cpld_reg.addr_5_8=0x00020030
+sff_cpld_reg.len_5_8=1
+sff_cpld_reg.bit_offset_5_8=4
+
+sff_cpld_reg.mode_6_8=config
+sff_cpld_reg.src_6_8=cpld
+sff_cpld_reg.frmt_6_8=bit
+sff_cpld_reg.pola_6_8=negative
+sff_cpld_reg.addr_6_8=0x00020030
+sff_cpld_reg.len_6_8=1
+sff_cpld_reg.bit_offset_6_8=5
+
+sff_cpld_reg.mode_7_8=config
+sff_cpld_reg.src_7_8=cpld
+sff_cpld_reg.frmt_7_8=bit
+sff_cpld_reg.pola_7_8=negative
+sff_cpld_reg.addr_7_8=0x00020030
+sff_cpld_reg.len_7_8=1
+sff_cpld_reg.bit_offset_7_8=6
+
+sff_cpld_reg.mode_8_8=config
+sff_cpld_reg.src_8_8=cpld
+sff_cpld_reg.frmt_8_8=bit
+sff_cpld_reg.pola_8_8=negative
+sff_cpld_reg.addr_8_8=0x00020030
+sff_cpld_reg.len_8_8=1
+sff_cpld_reg.bit_offset_8_8=7
+
+sff_cpld_reg.mode_9_8=config
+sff_cpld_reg.src_9_8=cpld
+sff_cpld_reg.frmt_9_8=bit
+sff_cpld_reg.pola_9_8=negative
+sff_cpld_reg.addr_9_8=0x00020031
+sff_cpld_reg.len_9_8=1
+sff_cpld_reg.bit_offset_9_8=0
+
+sff_cpld_reg.mode_10_8=config
+sff_cpld_reg.src_10_8=cpld
+sff_cpld_reg.frmt_10_8=bit
+sff_cpld_reg.pola_10_8=negative
+sff_cpld_reg.addr_10_8=0x00020031
+sff_cpld_reg.len_10_8=1
+sff_cpld_reg.bit_offset_10_8=1
+
+sff_cpld_reg.mode_11_8=config
+sff_cpld_reg.src_11_8=cpld
+sff_cpld_reg.frmt_11_8=bit
+sff_cpld_reg.pola_11_8=negative
+sff_cpld_reg.addr_11_8=0x00020031
+sff_cpld_reg.len_11_8=1
+sff_cpld_reg.bit_offset_11_8=2
+
+sff_cpld_reg.mode_12_8=config
+sff_cpld_reg.src_12_8=cpld
+sff_cpld_reg.frmt_12_8=bit
+sff_cpld_reg.pola_12_8=negative
+sff_cpld_reg.addr_12_8=0x00020031
+sff_cpld_reg.len_12_8=1
+sff_cpld_reg.bit_offset_12_8=3
+
+sff_cpld_reg.mode_13_8=config
+sff_cpld_reg.src_13_8=cpld
+sff_cpld_reg.frmt_13_8=bit
+sff_cpld_reg.pola_13_8=negative
+sff_cpld_reg.addr_13_8=0x00020031
+sff_cpld_reg.len_13_8=1
+sff_cpld_reg.bit_offset_13_8=4
+
+sff_cpld_reg.mode_14_8=config
+sff_cpld_reg.src_14_8=cpld
+sff_cpld_reg.frmt_14_8=bit
+sff_cpld_reg.pola_14_8=negative
+sff_cpld_reg.addr_14_8=0x00020031
+sff_cpld_reg.len_14_8=1
+sff_cpld_reg.bit_offset_14_8=5
+
+sff_cpld_reg.mode_15_8=config
+sff_cpld_reg.src_15_8=cpld
+sff_cpld_reg.frmt_15_8=bit
+sff_cpld_reg.pola_15_8=negative
+sff_cpld_reg.addr_15_8=0x00020031
+sff_cpld_reg.len_15_8=1
+sff_cpld_reg.bit_offset_15_8=6
+
+sff_cpld_reg.mode_16_8=config
+sff_cpld_reg.src_16_8=cpld
+sff_cpld_reg.frmt_16_8=bit
+sff_cpld_reg.pola_16_8=negative
+sff_cpld_reg.addr_16_8=0x00020031
+sff_cpld_reg.len_16_8=1
+sff_cpld_reg.bit_offset_16_8=7
+
+sff_cpld_reg.mode_17_8=config
+sff_cpld_reg.src_17_8=cpld
+sff_cpld_reg.frmt_17_8=bit
+sff_cpld_reg.pola_17_8=negative
+sff_cpld_reg.addr_17_8=0x00020032
+sff_cpld_reg.len_17_8=1
+sff_cpld_reg.bit_offset_17_8=0
+
+sff_cpld_reg.mode_18_8=config
+sff_cpld_reg.src_18_8=cpld
+sff_cpld_reg.frmt_18_8=bit
+sff_cpld_reg.pola_18_8=negative
+sff_cpld_reg.addr_18_8=0x00020032
+sff_cpld_reg.len_18_8=1
+sff_cpld_reg.bit_offset_18_8=1
+
+sff_cpld_reg.mode_19_8=config
+sff_cpld_reg.src_19_8=cpld
+sff_cpld_reg.frmt_19_8=bit
+sff_cpld_reg.pola_19_8=negative
+sff_cpld_reg.addr_19_8=0x00020032
+sff_cpld_reg.len_19_8=1
+sff_cpld_reg.bit_offset_19_8=2
+
+sff_cpld_reg.mode_20_8=config
+sff_cpld_reg.src_20_8=cpld
+sff_cpld_reg.frmt_20_8=bit
+sff_cpld_reg.pola_20_8=negative
+sff_cpld_reg.addr_20_8=0x00020032
+sff_cpld_reg.len_20_8=1
+sff_cpld_reg.bit_offset_20_8=3
+
+sff_cpld_reg.mode_21_8=config
+sff_cpld_reg.src_21_8=cpld
+sff_cpld_reg.frmt_21_8=bit
+sff_cpld_reg.pola_21_8=negative
+sff_cpld_reg.addr_21_8=0x00020032
+sff_cpld_reg.len_21_8=1
+sff_cpld_reg.bit_offset_21_8=4
+
+sff_cpld_reg.mode_22_8=config
+sff_cpld_reg.src_22_8=cpld
+sff_cpld_reg.frmt_22_8=bit
+sff_cpld_reg.pola_22_8=negative
+sff_cpld_reg.addr_22_8=0x00020032
+sff_cpld_reg.len_22_8=1
+sff_cpld_reg.bit_offset_22_8=5
+
+sff_cpld_reg.mode_23_8=config
+sff_cpld_reg.src_23_8=cpld
+sff_cpld_reg.frmt_23_8=bit
+sff_cpld_reg.pola_23_8=negative
+sff_cpld_reg.addr_23_8=0x00020032
+sff_cpld_reg.len_23_8=1
+sff_cpld_reg.bit_offset_23_8=6
+
+sff_cpld_reg.mode_24_8=config
+sff_cpld_reg.src_24_8=cpld
+sff_cpld_reg.frmt_24_8=bit
+sff_cpld_reg.pola_24_8=negative
+sff_cpld_reg.addr_24_8=0x00020032
+sff_cpld_reg.len_24_8=1
+sff_cpld_reg.bit_offset_24_8=7
+
+sff_cpld_reg.mode_25_8=config
+sff_cpld_reg.src_25_8=cpld
+sff_cpld_reg.frmt_25_8=bit
+sff_cpld_reg.pola_25_8=negative
+sff_cpld_reg.addr_25_8=0x00020033
+sff_cpld_reg.len_25_8=1
+sff_cpld_reg.bit_offset_25_8=0
+
+sff_cpld_reg.mode_26_8=config
+sff_cpld_reg.src_26_8=cpld
+sff_cpld_reg.frmt_26_8=bit
+sff_cpld_reg.pola_26_8=negative
+sff_cpld_reg.addr_26_8=0x00020033
+sff_cpld_reg.len_26_8=1
+sff_cpld_reg.bit_offset_26_8=1
+
+sff_cpld_reg.mode_27_8=config
+sff_cpld_reg.src_27_8=cpld
+sff_cpld_reg.frmt_27_8=bit
+sff_cpld_reg.pola_27_8=negative
+sff_cpld_reg.addr_27_8=0x00020033
+sff_cpld_reg.len_27_8=1
+sff_cpld_reg.bit_offset_27_8=2
+
+sff_cpld_reg.mode_28_8=config
+sff_cpld_reg.src_28_8=cpld
+sff_cpld_reg.frmt_28_8=bit
+sff_cpld_reg.pola_28_8=negative
+sff_cpld_reg.addr_28_8=0x00020033
+sff_cpld_reg.len_28_8=1
+sff_cpld_reg.bit_offset_28_8=3
+
+sff_cpld_reg.mode_29_8=config
+sff_cpld_reg.src_29_8=cpld
+sff_cpld_reg.frmt_29_8=bit
+sff_cpld_reg.pola_29_8=negative
+sff_cpld_reg.addr_29_8=0x00020033
+sff_cpld_reg.len_29_8=1
+sff_cpld_reg.bit_offset_29_8=4
+
+sff_cpld_reg.mode_30_8=config
+sff_cpld_reg.src_30_8=cpld
+sff_cpld_reg.frmt_30_8=bit
+sff_cpld_reg.pola_30_8=negative
+sff_cpld_reg.addr_30_8=0x00020033
+sff_cpld_reg.len_30_8=1
+sff_cpld_reg.bit_offset_30_8=5
+
+sff_cpld_reg.mode_31_8=config
+sff_cpld_reg.src_31_8=cpld
+sff_cpld_reg.frmt_31_8=bit
+sff_cpld_reg.pola_31_8=negative
+sff_cpld_reg.addr_31_8=0x00020033
+sff_cpld_reg.len_31_8=1
+sff_cpld_reg.bit_offset_31_8=6
+
+sff_cpld_reg.mode_32_8=config
+sff_cpld_reg.src_32_8=cpld
+sff_cpld_reg.frmt_32_8=bit
+sff_cpld_reg.pola_32_8=negative
+sff_cpld_reg.addr_32_8=0x00020033
+sff_cpld_reg.len_32_8=1
+sff_cpld_reg.bit_offset_32_8=7
+
+# configuration item: Optical module polling data size
+sff_polling_size=1024
+
+# configuration item: Optical module polling data register offset
+# sff_polling_data_base_addr_[sff_index]=value
+# sff_index: start from 1
+# value : directory name
+sff_polling_data_base_addr_1  =0x8000
+sff_polling_data_base_addr_2  =0x8400
+sff_polling_data_base_addr_3  =0x8800
+sff_polling_data_base_addr_4  =0x8c00
+sff_polling_data_base_addr_5  =0x9000
+sff_polling_data_base_addr_6  =0x9400
+sff_polling_data_base_addr_7  =0x9800
+sff_polling_data_base_addr_8  =0x9c00
+sff_polling_data_base_addr_9  =0xa000
+sff_polling_data_base_addr_10 =0xa400
+sff_polling_data_base_addr_11 =0xa800
+sff_polling_data_base_addr_12 =0xac00
+sff_polling_data_base_addr_13 =0xb000
+sff_polling_data_base_addr_14 =0xb400
+sff_polling_data_base_addr_15 =0xb800
+sff_polling_data_base_addr_16 =0xbc00
+sff_polling_data_base_addr_17 =0xc000
+sff_polling_data_base_addr_18 =0xc400
+sff_polling_data_base_addr_19 =0xc800
+sff_polling_data_base_addr_20 =0xcc00
+sff_polling_data_base_addr_21 =0xd000
+sff_polling_data_base_addr_22 =0xd400
+sff_polling_data_base_addr_23 =0xd800
+sff_polling_data_base_addr_24 =0xdc00
+sff_polling_data_base_addr_25 =0xe000
+sff_polling_data_base_addr_26 =0xe400
+sff_polling_data_base_addr_27 =0xe800
+sff_polling_data_base_addr_28 =0xec00
+sff_polling_data_base_addr_29 =0xf000
+sff_polling_data_base_addr_30 =0xf400
+sff_polling_data_base_addr_31 =0xf800
+sff_polling_data_base_addr_32 =0xfc00
+
+# configuration item: Optical module polling data device path
+# sff_polling_logic_dev_path_[sff_index]=value
+# sff_index: start from 1
+# value : directory name
+sff_polling_logic_dev_path_1  =/dev/fpga0
+sff_polling_logic_dev_path_2  =/dev/fpga0
+sff_polling_logic_dev_path_3  =/dev/fpga0
+sff_polling_logic_dev_path_4  =/dev/fpga0
+sff_polling_logic_dev_path_5  =/dev/fpga0
+sff_polling_logic_dev_path_6  =/dev/fpga0
+sff_polling_logic_dev_path_7  =/dev/fpga0
+sff_polling_logic_dev_path_8  =/dev/fpga0
+sff_polling_logic_dev_path_9  =/dev/fpga0
+sff_polling_logic_dev_path_10 =/dev/fpga0
+sff_polling_logic_dev_path_11 =/dev/fpga0
+sff_polling_logic_dev_path_12 =/dev/fpga0
+sff_polling_logic_dev_path_13 =/dev/fpga0
+sff_polling_logic_dev_path_14 =/dev/fpga0
+sff_polling_logic_dev_path_15 =/dev/fpga0
+sff_polling_logic_dev_path_16 =/dev/fpga0
+sff_polling_logic_dev_path_17 =/dev/fpga0
+sff_polling_logic_dev_path_18 =/dev/fpga0
+sff_polling_logic_dev_path_19 =/dev/fpga0
+sff_polling_logic_dev_path_20 =/dev/fpga0
+sff_polling_logic_dev_path_21 =/dev/fpga0
+sff_polling_logic_dev_path_22 =/dev/fpga0
+sff_polling_logic_dev_path_23 =/dev/fpga0
+sff_polling_logic_dev_path_24 =/dev/fpga0
+sff_polling_logic_dev_path_25 =/dev/fpga0
+sff_polling_logic_dev_path_26 =/dev/fpga0
+sff_polling_logic_dev_path_27 =/dev/fpga0
+sff_polling_logic_dev_path_28 =/dev/fpga0
+sff_polling_logic_dev_path_29 =/dev/fpga0
+sff_polling_logic_dev_path_30 =/dev/fpga0
+sff_polling_logic_dev_path_31 =/dev/fpga0
+sff_polling_logic_dev_path_32 =/dev/fpga0
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/plat_sysfs_cfg/cfg_file_name b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/plat_sysfs_cfg/cfg_file_name
new file mode 100644
index 000000000000..5f49420441a5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/plat_sysfs_cfg/cfg_file_name
@@ -0,0 +1,4 @@
+WB_PLAT_CPLD
+WB_PLAT_FAN
+WB_PLAT_PSU
+WB_PLAT_SFF
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/setup.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/setup.py
new file mode 100644
index 000000000000..6c3916921abb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/setup.py
@@ -0,0 +1,39 @@
+from setuptools import setup
+
+setup(
+    name='sonic-platform',
+    version='1.0',
+    description='SONiC platform API implementation',
+    license='Apache 2.0',
+    author='SONiC Team',
+    author_email='support',
+    url='',
+    maintainer='support',
+    maintainer_email='',
+    packages=[
+        'sonic_platform',
+        'plat_hal',
+        'wbutil',
+        'eepromutil',
+        'hal-config',
+        'config',
+    ],
+    py_modules=[
+        'hal_pltfm',
+        'platform_util',
+        'platform_intf',
+    ],
+    classifiers=[
+        'Development Status :: 3 - Alpha',
+        'Environment :: Plugins',
+        'Intended Audience :: Developers',
+        'Intended Audience :: Information Technology',
+        'Intended Audience :: System Administrators',
+        'License :: OSI Approved :: Apache Software License',
+        'Natural Language :: English',
+        'Operating System :: POSIX :: Linux',
+        'Programming Language :: Python :: 3.7',
+        'Topic :: Utilities',
+    ],
+    keywords='sonic SONiC platform PLATFORM',
+)

From 193dce03c49e733e79add7cd1f10e9925b0e80eb Mon Sep 17 00:00:00 2001
From: Vijaya Kumar Abbaraju <vijaya-kumar.abbaraju@broadcom.com>
Date: Sat, 26 Oct 2024 00:35:14 +0530
Subject: [PATCH 140/364] PAC infra utils -logging (#18641)

---
 src/sonic-pac/fpinfra/log/log.c | 66 +++++++++++++++++++++++++++++++++
 1 file changed, 66 insertions(+)
 create mode 100644 src/sonic-pac/fpinfra/log/log.c

diff --git a/src/sonic-pac/fpinfra/log/log.c b/src/sonic-pac/fpinfra/log/log.c
new file mode 100644
index 000000000000..11b9b1e6c281
--- /dev/null
+++ b/src/sonic-pac/fpinfra/log/log.c
@@ -0,0 +1,66 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+
+#include <syslog.h>
+
+/**********************************************************************
+ * @purpose Format and record a message in the in-memory log.
+ *
+ * @param  severity @b((input)} See RFC 3164 Section 4.1.1 Table 2
+ * @param  component @b((input)} Level 7 component id
+ * @param  fileName @b{(input)} file name
+ * @param  lineNum @b{(input)} line number
+ * @param  nfo @b{(input)} extra information - null terminated string
+ *
+ * @returns  None
+ *
+ * @notes  This executes on the calling task thread.
+ *
+ * @end
+ *********************************************************************/
+
+void l7_log( LOG_SEVERITY_t severity,  COMPONENT_IDS_t component,
+             char8 * fileName, uint32 lineNum,  char8 * nfo)
+{
+  syslog(severity, nfo)
+}
+
+
+/*********************************************************************
+* @purpose  Log error and reset the box.
+*
+* @param    error_code - 32-bit error code.
+* @param    file_name  - File where the error ocurred.
+* @param    line_num - Line number where the error occurred.
+*
+* @returns  none
+*
+* @notes    This function may be called from an interrupt handler.
+*
+* @end
+*********************************************************************/
+void
+log_error_code (uint32 err_code,
+                 char8 *file_name,
+                uint32 line_num)
+{
+  syslog(LOG_ERROR:q
+ 
+  return;
+}
+

From de762b8bb7287f868a7555a856b10b95138c476a Mon Sep 17 00:00:00 2001
From: Vijaya Kumar Abbaraju <vijaya-kumar.abbaraju@broadcom.com>
Date: Sat, 26 Oct 2024 00:37:28 +0530
Subject: [PATCH 141/364] PAC infra sonic interface files (#18638)

---
 src/sonic-pac/fpinfra/fpSonicUtils.cpp |  74 ++++++
 src/sonic-pac/fpinfra/fpnim.cpp        | 282 ++++++++++++++++++++++
 src/sonic-pac/fpinfra/fpnim.h          |  83 +++++++
 src/sonic-pac/fpinfra/nimsync.cpp      | 315 +++++++++++++++++++++++++
 src/sonic-pac/fpinfra/nimsync.h        |  56 +++++
 5 files changed, 810 insertions(+)
 create mode 100644 src/sonic-pac/fpinfra/fpSonicUtils.cpp
 create mode 100644 src/sonic-pac/fpinfra/fpnim.cpp
 create mode 100644 src/sonic-pac/fpinfra/fpnim.h
 create mode 100644 src/sonic-pac/fpinfra/nimsync.cpp
 create mode 100644 src/sonic-pac/fpinfra/nimsync.h

diff --git a/src/sonic-pac/fpinfra/fpSonicUtils.cpp b/src/sonic-pac/fpinfra/fpSonicUtils.cpp
new file mode 100644
index 000000000000..9311349b90b7
--- /dev/null
+++ b/src/sonic-pac/fpinfra/fpSonicUtils.cpp
@@ -0,0 +1,74 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <iostream>
+#include <cstring>
+#include <string>
+
+using namespace std;
+
+extern "C" {
+
+#include "pacinfra_common.h"
+#include "fpSonicUtils.h"
+
+}
+
+const string INTFS_PREFIX = "E";
+
+using namespace std;
+
+int fpGetIntIfNumFromHostIfName(const char *ifName, uint32 *outIntfNum)
+
+{
+    size_t pos;
+    std::string::size_type sz;
+    std::string name = (char*)ifName;
+
+    if(name.find(INTFS_PREFIX) == string::npos)
+    {
+      return -1;
+    }
+
+    if((pos = name.find("/")) == string::npos)
+    {
+        pos = name.find("_");
+    }
+
+    if(pos == string::npos)
+    {
+      pos = 7; // assume Ethernetx format
+      *outIntfNum = (std::stoi(name.substr(pos+1), &sz)) + 1;
+    }
+    else
+    {
+      *outIntfNum = std::stoi(name.substr(pos+1), &sz);
+    }
+
+    return 0;
+}
+
+
+int fpGetHostIntfName(uint32 physPort,  uchar8 *ifName)
+{
+        string tmp = "Ethernet" + to_string(physPort-1);
+        strcpy((char*)ifName, tmp.c_str());
+    return 0;
+}
+
+
+
+
diff --git a/src/sonic-pac/fpinfra/fpnim.cpp b/src/sonic-pac/fpinfra/fpnim.cpp
new file mode 100644
index 000000000000..092d2b8a2977
--- /dev/null
+++ b/src/sonic-pac/fpinfra/fpnim.cpp
@@ -0,0 +1,282 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include <vector>
+#include <iostream>
+#include <string>
+#include <swss/subscriberstatetable.h>
+#include "fpnim.h"
+#include "netdispatcher.h"
+#include "netlink.h"
+#include "nimsync.h"
+#include "fpinfra.h"
+
+extern "C" {
+#include "datatypes.h"
+#include "commdefs.h"
+#include "pacinfra_common.h"
+#include "log.h"
+#include "osapi.h"
+#include "resources.h"
+#include "nim_cnfgr.h"
+#include "sysapi.h"
+#include "sysapi_hpc.h"
+#include "nim_events.h"
+#include "nimapi.h"
+#include "osapi_priv.h"
+#include "nim_startup.h"
+}
+
+using namespace swss;
+using namespace std;
+
+extern pthread_key_t osapi_task_key;
+extern int osapi_task_key_created;
+
+/* Initialize static member*/
+FpNim *FpNim::instance = 0;
+
+FpNim::FpNim(DBConnector *applDb, DBConnector *cfgDb) :
+m_portTable(applDb, APP_PORT_TABLE_NAME),
+m_devMetaTbl(cfgDb, CFG_DEVICE_METADATA_TABLE_NAME){ }
+
+FpNim* FpNim::getInstance() {
+   return instance;
+}
+
+FpNim* FpNim::getInstance(DBConnector *applDb, DBConnector * cfgDb) {
+   if (!instance) {
+   instance = new FpNim(applDb, cfgDb);
+   instance->applDb = applDb;
+   instance->cfgDb = cfgDb;
+   }
+   return instance;
+}
+
+void FpNim::init(void) {
+  if(nimPhaseOneInit() !=  SUCCESS)
+    return;
+
+  if(nimPhaseTwoInit() !=  SUCCESS)
+    return;
+
+  if(nimPhaseThreeInit() !=  SUCCESS)
+    return;
+
+  if(nimPhaseExecInit() !=  SUCCESS)
+    return;
+}
+
+void FpNim::nimStartupInvoke(void) {
+
+  /* Wait till the component registers with NIM */
+  nimStartUpTreeData_t startupData;
+  while(nimStartUpFirstGet(&startupData) !=  SUCCESS)
+  {
+    sleep(1);
+  }
+
+  /* Now make startup callback */
+  nimStartupCallbackInvoke(NIM_INTERFACE_CREATE_STARTUP);
+  nimStartupCallbackInvoke(NIM_INTERFACE_ACTIVATE_STARTUP);
+}
+
+void FpNim::createAllPorts(NimSync & sync) {
+    int port = 0;
+    int unit = 1;
+    int slot = 0;
+    vector<string> keys;
+    m_portTable.getKeys(keys);
+    SWSS_LOG_NOTICE("m_portTable->getKeys %zd", keys.size());
+
+    SYSAPI_HPC_PORT_DESCRIPTOR_t portData =
+    {
+       IANA_GIGABIT_ETHERNET,
+       PORTCTRL_PORTSPEED_FULL_10GSX,
+       PHY_CAP_PORTSPEED_ALL,
+       /* MTRJ,*/
+       PORT_FEC_DISABLE,
+       CAP_FEC_NONE
+    };
+
+     enetMacAddr_t macAddr;
+    if (getSystemMac(macAddr.addr) != 0)
+    {
+        SWSS_LOG_ERROR("Failed to read system Mac");
+    }
+
+    for (const auto& alias: keys)
+    {
+        NimPort p(0, 0);
+        
+        if(alias.find(INTFS_PREFIX) == string::npos)
+          continue;
+
+        SWSS_LOG_NOTICE("Keys %s", alias.c_str());
+        sync.setPort(alias, p);
+
+        try
+        {
+           if(alias.length() > 8)
+           {
+               port = std::stoi(alias.substr(8)) + 1; //FP ports starts from 1 whereas SONiC has Ethernet0
+           }
+           else
+           {
+               port = std::stoi(alias.substr(5)); //FP ports starts from 1 whereas SONiC has Eth1/1
+           }
+        }
+        catch (...)
+        {
+          SWSS_LOG_NOTICE("Invalid interface %s", alias.c_str());
+          continue;
+        }
+
+        if(nimCmgrNewIntfChangeCallback(unit, slot, port, 0,  CREATE, &portData, &macAddr) !=  SUCCESS)
+        {
+          SWSS_LOG_NOTICE("Failed to add interface %s", alias.c_str());
+          continue;
+        }
+
+        uint32 intIfNum;
+        nimUSP_t  usp;
+        usp.unit = unit;
+        usp.slot = slot;
+        usp.port = port;
+        /* Set Alias in native (Ethernet0) format for applications to make use of it */
+        if(nimGetIntIfNumFromUSP(&usp, &intIfNum) !=  SUCCESS)
+        {
+          SWSS_LOG_NOTICE("Failed to get IntIfNum for interface %s", alias.c_str());
+          continue;
+        }
+        nimSetIntfifAlias(intIfNum, ( uchar8 *) alias.c_str());
+
+        NIM_EVENT_NOTIFY_INFO_t eventInfo;
+        eventInfo.component =  CARDMGR_COMPONENT_ID;
+        eventInfo.pCbFunc = NULL;
+        NIM_HANDLE_t handle;
+
+        /* Generate Attach event*/
+        eventInfo.event =  ATTACH;
+        eventInfo.intIfNum = intIfNum;
+        if (nimEventIntfNotify(eventInfo,&handle) !=  SUCCESS)
+        {
+            SWSS_LOG_NOTICE("Failed to generate Attach %s event ", alias.c_str());
+        }
+    }
+}
+
+/* To check the port init is done or not */
+bool FpNim::isPortInitDone() {
+    bool portInit = 0;
+    long cnt = 0;
+
+    while(!portInit) {
+        std::vector<FieldValueTuple> tuples;
+        portInit = m_portTable.get("PortInitDone", tuples);
+
+        if(portInit)
+            break;
+        sleep(1);
+        cnt++;
+    }
+    SWSS_LOG_NOTICE("PORT_INIT_DONE : %d %ld", portInit, cnt);
+    return portInit;
+}
+
+std::string FpNim::getSystemMac() {
+    std::string macStr;
+    m_devMetaTbl.hget("localhost", "mac", macStr);
+    SWSS_LOG_NOTICE("getSystemMac(): %s", macStr.c_str());
+    return macStr;
+}
+
+int FpNim::getSystemMac(unsigned char *addr) {
+    return macstr_to_mac(getSystemMac().c_str(), addr);
+}
+
+void pacHandleDumpError(void *cbData)
+{
+    NetLink *netlink = (NetLink *)cbData;
+    SWSS_LOG_NOTICE("Netlink dump failed with NLE_DUMP_INTR, resending dump request");
+    netlink->dumpRequest(RTM_GETLINK);
+}
+
+void* fpinfraTask(void * nimPtr) {
+
+    FpNim * nim = (FpNim *) nimPtr;
+    try {
+        nim->isPortInitDone();
+
+        NimSync sync;
+        nim->createAllPorts(sync);
+        nim->nimStartupInvoke();
+
+        //register for the table events
+        NetLink netlink;
+        netlink.registerGroup(RTNLGRP_LINK);
+        netlink.dumpRequest(RTM_GETLINK);
+        cout << "Listen to Netlink messages..." << endl;
+        NetDispatcher::getInstance().registerMessageHandler(RTM_NEWLINK, (swss::NetMsg*)&sync);
+        NetDispatcher::getInstance().registerMessageHandler(RTM_DELLINK, (swss::NetMsg*)&sync);
+
+        swss::Select s;
+        s.addSelectable(&netlink);
+
+        //wait for the events and process them
+        while (true)
+        {
+            SWSS_LOG_NOTICE("Waiting for Netlink Events");
+            swss::Selectable *sel = NULL;
+            s.select(&sel);
+        }
+    } catch (const exception &e) {
+        SWSS_LOG_ERROR("Run-Time error: %s", e.what());
+    }
+}
+
+// Glabal variable used to protect against multiple invocation of fpinfraInit()
+int fpinfraInitialized;
+
+int fpinfraInit(void) {
+
+    // Only the first call is serviced
+    if(fpinfraInitialized)
+        return 0;
+
+    fpinfraInitialized = 1;
+    //swss::Logger::linkToDbNative("fpInfra");
+    SWSS_LOG_NOTICE("-----Initializing fpInfra -----");
+
+    /* Initialize sysapi */
+    (void)sysapiSystemInit();
+
+    // connect to the databases
+    swss::DBConnector *applDb = new swss::DBConnector("APPL_DB", 0);
+    swss::DBConnector *cfgDb = new swss::DBConnector("CONFIG_DB", 0);
+
+    FpNim * nim = FpNim::getInstance(applDb, cfgDb);
+    nim->init();
+
+    if (osapiTaskCreate("nimDbThread", (void*) fpinfraTask, -1, nim,
+                                      DEFAULT_STACK_SIZE,
+                                      DEFAULT_TASK_PRIORITY,
+                                      DEFAULT_TASK_SLICE ) == NULL)
+    {
+        return -1;
+    }
+
+    return 0;
+}
diff --git a/src/sonic-pac/fpinfra/fpnim.h b/src/sonic-pac/fpinfra/fpnim.h
new file mode 100644
index 000000000000..edb25b84ef92
--- /dev/null
+++ b/src/sonic-pac/fpinfra/fpnim.h
@@ -0,0 +1,83 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef FPNIM_H
+#define FPNIM_H
+#include <vector>
+#include <swss/dbconnector.h>
+#include <swss/schema.h>
+#include <swss/table.h>
+#include <swss/macaddress.h>
+#include <swss/notificationproducer.h>
+#include <swss/producerstatetable.h>
+#include <swss/subscriberstatetable.h>
+#include <swss/table.h>
+#include <swss/select.h>
+#include <swss/timestamp.h>
+#include <swss/redisapi.h>
+#include "nimsync.h"
+
+using namespace swss;
+using namespace std;
+
+/* FpNim is singleton class and only one instance of it runs on a process*/
+class FpNim {
+public:
+    /* Delete default constructor. */
+    FpNim() = delete;
+
+    /* Delete copy constructor. */
+    FpNim(FpNim &other) = delete;
+
+    /* delete assingment operator.  */
+    void operator=(const FpNim &) = delete;
+
+    /**
+     * Static method controls the access to the singleton instance. 
+     * On the first run, it creates a singleton object and places it
+     * into the static field. On subsequent runs, it returns the client existing
+     * object stored in the static field.
+     */
+    static FpNim *getInstance(DBConnector *applDb, DBConnector *cfgDb);
+
+    /* This overloaded getInstance returns the current instance pointer.
+     * It can return NULL when called before fpinfraInt() call
+    */
+    static FpNim *getInstance();
+
+    bool processDbEvent(Selectable *source);
+    void init();
+    bool isPortInitDone();
+    void createAllPorts(NimSync & sync);
+    void nimStartupInvoke(void);
+    std::string getSystemMac();
+    int getSystemMac(unsigned char *addr);
+private:
+    static FpNim *instance;
+    DBConnector *applDb;
+    DBConnector *cfgDb;
+
+    /* tables this component listens to */
+    Table m_portTable;
+    Table m_devMetaTbl;
+
+    /* Private constructor */
+    FpNim(DBConnector *applDb, DBConnector *cfgDb);
+
+    /* DB Event handler functions */
+    bool processPortTblEvent(Selectable *tbl);
+};
+
+#endif /* FPNIM_H */
diff --git a/src/sonic-pac/fpinfra/nimsync.cpp b/src/sonic-pac/fpinfra/nimsync.cpp
new file mode 100644
index 000000000000..2479db755e04
--- /dev/null
+++ b/src/sonic-pac/fpinfra/nimsync.cpp
@@ -0,0 +1,315 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <iostream>
+#include <set>
+#include <sstream>
+#include <iomanip>
+#include "nimsync.h"
+
+#include <string.h>
+#include <linux/if.h>
+#include <swss/logger.h>
+#include <swss/dbconnector.h>
+#include <swss/producerstatetable.h>
+#include <netlink/route/link.h>
+#include <swss/netmsg.h>
+
+extern "C" {
+#include "pacinfra_common.h"
+#include "resources.h"
+#include "nim_events.h"
+#include "nimapi.h"
+}
+
+using namespace std;
+using namespace swss;
+
+#define TEAM_DRV_NAME   "team"
+
+static int hex2num(char c)
+{
+	if (c >= '0' && c <= '9')
+		return c - '0';
+	if (c >= 'a' && c <= 'f')
+		return c - 'a' + 10;
+	if (c >= 'A' && c <= 'F')
+		return c - 'A' + 10;
+	return -1;
+}
+
+/*
+ * Converts mac address in string format to array of 6 bytes
+ * macstr  - mac address in string format (example: "11:22:33:44:55:66")
+ * macarry - mac address in an char array
+*/
+int macstr_to_mac(const char *macstr, unsigned char *addr)
+{
+    for (int i = 0; i < 6; i++)
+    {
+        int a, b;
+
+        a = hex2num(*macstr++);
+        if (a < 0)
+            return -1;
+        b = hex2num(*macstr++);
+        if (b < 0)
+            return -1;
+        *addr++ = (a << 4) | b;
+        if (i < 5 && *macstr++ != ':')
+            return -1;
+    }
+    return 0;
+}
+
+NimPort::NimPort(){
+    m_adminState = 0;
+    m_operState = 0;
+}
+
+NimPort::NimPort(const int &admin, const int &oper) :
+m_adminState(admin),
+m_operState(oper){ }
+
+
+
+
+NimSync::NimSync() {}
+
+NimPort& NimSync::getPort(const string & alias)
+{
+    return m_portList[alias]; 
+}
+
+void NimSync::setPort(const string & alias, const NimPort& port)
+{
+    m_portList[alias] = port; 
+}
+
+void NimSync::delPort(const string & alias)
+{
+    m_portList.erase(alias);
+}
+
+void NimSync::onMsg(int nlmsg_type, struct nl_object *obj)
+{
+    SWSS_LOG_ENTER();
+
+    if ((nlmsg_type != RTM_NEWLINK) && (nlmsg_type != RTM_DELLINK))
+    {
+        return;
+    }
+
+    struct rtnl_link *link = (struct rtnl_link *)obj;
+    string key = rtnl_link_get_name(link);
+
+    if (key.compare(0, INTFS_PREFIX.length(), INTFS_PREFIX) &&
+        key.compare(0, LAG_PREFIX.length(), LAG_PREFIX) &&
+        key.compare(0, MGMT_PREFIX.length(), MGMT_PREFIX))
+    {
+        return;
+    }
+
+    unsigned int flags = rtnl_link_get_flags(link);
+    bool admin = flags & IFF_UP;
+    bool oper = flags & IFF_LOWER_UP;
+
+    char addrStr[MAX_ADDR_SIZE+1] = {0};
+    nl_addr2str(rtnl_link_get_addr(link), addrStr, MAX_ADDR_SIZE);
+
+    unsigned int ifindex = rtnl_link_get_ifindex(link);
+    int master = rtnl_link_get_master(link);
+    char *type = rtnl_link_get_type(link);
+
+    if (type)
+    {
+        SWSS_LOG_NOTICE("nlmsg type:%d key:%s admin:%d oper:%d addr:%s ifindex:%d master:%d type:%s",
+                       nlmsg_type, getStdIfFormat(key).c_str(), admin, oper, addrStr, ifindex, master, type);
+    }
+    else
+    {
+        SWSS_LOG_NOTICE("nlmsg type:%d key:%s admin:%d oper:%d addr:%s ifindex:%d master:%d",
+                       nlmsg_type, getStdIfFormat(key).c_str(), admin, oper, addrStr, ifindex, master);
+    }
+
+    if (!key.compare(0, MGMT_PREFIX.length(), MGMT_PREFIX))
+    {
+        return;
+    }
+
+    /* teamd instances are dealt in teamsyncd */
+    if (type && !strcmp(type, TEAM_DRV_NAME))
+    {
+        return;
+    }
+
+    if(key.find(INTFS_PREFIX) == string::npos)
+    {
+        SWSS_LOG_NOTICE("Skipping non Ethernet interface %s", key.c_str());
+        return;
+    }
+
+    uint32 intIfNum;
+    NIM_HANDLE_t handle;
+
+    nimUSP_t usp;
+    usp.unit = 1;
+    usp.slot = 0;
+
+    try
+    {
+        if(key.length() > 8)
+        {
+            usp.port = std::stoi(key.substr(8)) + 1; // FP ports start from 1 corresponds to Ethernet0 on SONiC
+        }
+        else
+        {
+            usp.port = std::stoi(key.substr(3)); // FP ports start from 1 corresponds to E1_1 on SONiC
+            // SONiC DB and netlink has different formats for the interface. Convert it into Eth1/1 format
+            string tmp = "Eth" + key.substr(1,1) + '/' + key.substr(3);
+            key = tmp;
+        }
+    }
+    catch (...)
+    {
+        SWSS_LOG_NOTICE("Skipping invalid interface %s", key.c_str());
+        return;
+    }
+
+    NIM_EVENT_NOTIFY_INFO_t eventInfo;
+    eventInfo.component =  CARDMGR_COMPONENT_ID;
+    eventInfo.pCbFunc = NULL;
+     enetMacAddr_t macAddr;
+    if (macstr_to_mac(addrStr, macAddr.addr) != 0)
+    {
+        SWSS_LOG_NOTICE("Invalid MAC address format %s", addrStr);
+    }
+
+    /* New interface handling */
+    if (m_portList.find(key) == m_portList.end())
+    {
+        int port = 0;
+        SYSAPI_HPC_PORT_DESCRIPTOR_t portData =
+        {
+           IANA_GIGABIT_ETHERNET,
+           PORTCTRL_PORTSPEED_FULL_10GSX,
+           PHY_CAP_PORTSPEED_ALL,
+           /* MTRJ,*/
+           PORT_FEC_DISABLE,
+           CAP_FEC_NONE
+        };
+
+        NimPort p(0, 0);
+
+        SWSS_LOG_NOTICE("New interface %s", key.c_str());
+        setPort(key, p);
+
+        if(key.length() > 8)
+        {
+            port = std::stoi(key.substr(8)) + 1; //FP ports starts from 1 whereas SONiC has Ethernet0
+        }
+        else
+        {
+            port = std::stoi(key.substr(5)); // Eth1/1 format after conversion
+        }
+
+        /* Generate Create followed by Attach event*/
+        if(nimCmgrNewIntfChangeCallback(1, 0, port, 0,  CREATE, &portData, &macAddr) !=  SUCCESS)
+        {
+            SWSS_LOG_NOTICE("Failed to add interface %s", key.c_str());
+            return;
+        }
+
+        /* Get internal interface number from Nim */
+        if(nimGetIntIfNumFromUSP(&usp, &intIfNum) !=  SUCCESS)
+        {
+            SWSS_LOG_NOTICE("Failed to get intIfNum for %s", key.c_str());
+        }
+
+        if(nimSetIntfifAlias(intIfNum, ( uchar8 *) key.c_str()) !=  SUCCESS)
+        {
+            SWSS_LOG_NOTICE("Failed to set alias %s for intIfNum(%d)", key.c_str(), intIfNum);
+        }
+
+        /* Generate Attach event*/
+        eventInfo.event =  ATTACH;
+        eventInfo.intIfNum = intIfNum;
+        if (nimEventIntfNotify(eventInfo,&handle) !=  SUCCESS)
+        {
+            SWSS_LOG_NOTICE("Failed to generate Attach %s event ", key.c_str());
+        }
+    }
+
+    if(nimGetIntIfNumFromUSP(&usp, &intIfNum) !=  SUCCESS)
+    {
+        SWSS_LOG_NOTICE("Failed to get intIfNum for %s", key.c_str());
+        return;
+    }
+
+    /* Interface delete handling */
+    if (nlmsg_type == RTM_DELLINK)
+    {
+        if (m_portList.find(key) == m_portList.end())
+        {
+            SWSS_LOG_NOTICE("Unknown interface %s for Delete event ", key.c_str());
+            return;
+        }
+
+        /* Generate Detach followed by Delete */
+        eventInfo.event =  DETACH;
+        eventInfo.intIfNum = intIfNum;
+        if (nimEventIntfNotify(eventInfo,&handle) !=  SUCCESS)
+        {
+            SWSS_LOG_NOTICE("Failed to generate Detach %s event ", key.c_str());
+        }
+        else if (eventInfo.event =  DELETE, nimEventIntfNotify(eventInfo,&handle) !=  SUCCESS)
+        {
+            SWSS_LOG_NOTICE("Failed to generate Delete %s event ", key.c_str());
+        }
+        else
+        {
+            SWSS_LOG_NOTICE("Delete %s event", key.c_str());
+            delPort(key);
+        }
+        return;
+    }
+
+    /* Set the admin state first*/
+    if (admin != m_portList[key].m_adminState)
+    {
+        m_portList[key].m_adminState = admin;
+        nimSetIntfAdminState(intIfNum, admin? ENABLE: DISABLE);
+    }
+
+   /* followed by the oper state */
+   if ( oper != m_portList[key].m_operState)
+    {
+        m_portList[key].m_operState = oper;
+        nimDtlIntfChangeCallback(&usp, oper? UP: DOWN, NULL);
+    }
+}
+
+string NimSync::getStdIfFormat(string key)
+{
+  if((key.find("E") == string::npos) || (key.length() > 8))
+  {
+    return key;
+  }
+  string key1("");
+  key1 = "Eth" + key.substr(1,1) + '/' + key.substr(3);
+  return key1;
+}
+
diff --git a/src/sonic-pac/fpinfra/nimsync.h b/src/sonic-pac/fpinfra/nimsync.h
new file mode 100644
index 000000000000..ff9d9ff0060e
--- /dev/null
+++ b/src/sonic-pac/fpinfra/nimsync.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef __NIMSYNC__
+#define __NIMSYNC__
+
+#include <string>
+#include <map>
+#include "dbconnector.h"
+#include "netmsg.h"
+#include "table.h"
+
+using namespace swss;
+
+const std::string MGMT_PREFIX = "eth";
+const std::string INTFS_PREFIX = "E";
+const std::string LAG_PREFIX = "PortChannel";
+
+
+int macstr_to_mac(const char *macstr, unsigned char *addr);
+
+class NimPort {
+public:
+    NimPort();
+    NimPort(const int &admin, const int &oper);
+    int m_adminState;
+    int m_operState;
+};
+
+
+class NimSync : public NetMsg {
+public:
+    enum { MAX_ADDR_SIZE = 64 };
+    NimSync();
+    virtual void onMsg(int nlmsg_type, struct nl_object *obj);
+    NimPort & getPort(const std::string & alias);
+    void setPort(const std::string & alias, const NimPort & port);
+    void delPort(const std::string & alias);
+    std::string getStdIfFormat(std::string key);
+private:
+    std::map<std::string, NimPort> m_portList;
+};
+
+#endif

From c75dc62b333d456bc2ecb3182db71b7040e8fe1a Mon Sep 17 00:00:00 2001
From: Vijaya Kumar Abbaraju <vijaya-kumar.abbaraju@broadcom.com>
Date: Sat, 26 Oct 2024 00:37:37 +0530
Subject: [PATCH 142/364] Auth mgr generic header files (#18632)

---
 .../authmgr/mapping/include/auth_mgr.h        |  98 ++
 .../mapping/include/auth_mgr_auth_method.h    |  55 ++
 .../authmgr/mapping/include/auth_mgr_cfg.h    | 130 +++
 .../authmgr/mapping/include/auth_mgr_client.h | 225 +++++
 .../mapping/include/auth_mgr_control.h        | 858 ++++++++++++++++++
 .../authmgr/mapping/include/auth_mgr_debug.h  | 146 +++
 .../authmgr/mapping/include/auth_mgr_ih.h     |  45 +
 .../mapping/include/auth_mgr_include.h        |  69 ++
 .../authmgr/mapping/include/auth_mgr_struct.h |  89 ++
 9 files changed, 1715 insertions(+)
 create mode 100755 src/sonic-pac/authmgr/mapping/include/auth_mgr.h
 create mode 100755 src/sonic-pac/authmgr/mapping/include/auth_mgr_auth_method.h
 create mode 100755 src/sonic-pac/authmgr/mapping/include/auth_mgr_cfg.h
 create mode 100755 src/sonic-pac/authmgr/mapping/include/auth_mgr_client.h
 create mode 100755 src/sonic-pac/authmgr/mapping/include/auth_mgr_control.h
 create mode 100755 src/sonic-pac/authmgr/mapping/include/auth_mgr_debug.h
 create mode 100755 src/sonic-pac/authmgr/mapping/include/auth_mgr_ih.h
 create mode 100755 src/sonic-pac/authmgr/mapping/include/auth_mgr_include.h
 create mode 100755 src/sonic-pac/authmgr/mapping/include/auth_mgr_struct.h

diff --git a/src/sonic-pac/authmgr/mapping/include/auth_mgr.h b/src/sonic-pac/authmgr/mapping/include/auth_mgr.h
new file mode 100755
index 000000000000..2c20957c1b5b
--- /dev/null
+++ b/src/sonic-pac/authmgr/mapping/include/auth_mgr.h
@@ -0,0 +1,98 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef AUTHMGR_H
+#define AUTHMGR_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Authentication Manager Timers */
+typedef enum
+{
+  AUTH_MGR_RESTART = 0,
+} auth_mgr_timer_t;
+
+/* Authentication Manager Event Message IDs */
+typedef enum
+{
+  authMgrMethodSet = 1,
+  authMgrPrioritySet,
+  authMgrOpenAccess,
+  authMgrRestartTimerSet,
+  authMgrRestartTimerExpiry,
+  authMgrNimStartup,
+  authMgrCnfgr,
+  authMgrActivateStartupDone,
+  authMgrHandleNewBackupManager
+}authMgrMessages_t;
+
+typedef enum
+{
+  AUTH_MGR_UNAUTHENTICATED = 0,
+  AUTH_MGR_AUTHENTICATED
+} authMgrAuthStatus_t;
+
+
+typedef struct authMgrIntfChangeParms_s
+{
+  uint32 event;
+  NIM_CORRELATOR_t correlator;
+} authMgrIntfChangeParms_t;
+
+typedef struct authMgrNimStartup_s
+{
+  NIM_STARTUP_PHASE_t startupPhase;
+} authMgrNimStartup_t;
+
+typedef struct authMgrTimerParams_s
+{
+  uint32 timerCBHandle;
+} authMgrTimerParams_t;
+#define AUTHMGR_TIMER_MSG_SIZE         sizeof(authMgrTimerParams_t)
+
+/* authentication manager Event Message format */
+typedef struct authMgrMgmtMsg_s
+{
+  uint32        msgId;    /* Of type snoopMgmtMessages_t */
+  uint32        intIfNum;
+  union
+  {
+     CNFGR_CMD_DATA_t          CmdData;
+    authMgrIntfChangeParms_t     authMgrIntfChangeParms;
+    authMgrNimStartup_t          authMgrNimStartup;
+    uint32                    mode;
+    authMgrTimerParams_t         authMgrParams;
+    uint32                    timerValue;
+  } u;
+} authMgrMgmtMsg_t;
+#define AUTHMGR_MSG_SIZE         sizeof(authMgrMgmtMsg_t)
+
+
+/* Start of Function Prototype */
+void authMgrNotifyRegisteredUsers(uint32 intIfNum,
+                               uint32 event);
+/* End of function prototypes */
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AUTHMGR_H */
+
diff --git a/src/sonic-pac/authmgr/mapping/include/auth_mgr_auth_method.h b/src/sonic-pac/authmgr/mapping/include/auth_mgr_auth_method.h
new file mode 100755
index 000000000000..84dcdddaa8de
--- /dev/null
+++ b/src/sonic-pac/authmgr/mapping/include/auth_mgr_auth_method.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef AUTHMGR_AUTHMETHOD_H
+#define AUTHMGR_AUTHMETHOD_H
+
+#include <stddef.h>
+#include "mab_socket.h"
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ETHERNET_PREFIX "Ethernet"
+
+typedef struct authmgrMethodEvent_s
+{
+  authmgrNotifyEvent_t event;
+   char8 eventStr[16];
+}authmgrMethodEvent_t;
+
+RC_t authmgrDot1xEventSend (uint32 intIfNum, uint32 event,  enetMacAddr_t *macAddr);
+RC_t authmgrDot1xIntfAdminModeGet (uint32 intIfNum,  BOOL *enabled);
+RC_t authmgrDot1xIntfPortControlModeSet (uint32 intIfNum,  AUTHMGR_PORT_CONTROL_t portControl);
+RC_t authmgrDot1xPortPaeCapabilitiesGet (uint32 intIfNum,  uchar8 * capabilities);
+int wpa_sync_send(char * ctrl_ifname, char * cmd, char *buf, size_t *len);
+int authmgrMabDataSend(mab_pac_cmd_t *req, char *resp, unsigned int *len);
+RC_t authmgrMabEventSend (uint32 intIfNum, uint32 event,  enetMacAddr_t *macAddr);
+RC_t authmgrMabIntfAdminModeGet (uint32 intIfNum,  BOOL *enabled);
+
+int handle_async_resp_data(int *listen_sock);
+
+/* End of function prototypes */
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AUTHMGR_AUTHMETHOD_H */
+
diff --git a/src/sonic-pac/authmgr/mapping/include/auth_mgr_cfg.h b/src/sonic-pac/authmgr/mapping/include/auth_mgr_cfg.h
new file mode 100755
index 000000000000..1026c6e98529
--- /dev/null
+++ b/src/sonic-pac/authmgr/mapping/include/auth_mgr_cfg.h
@@ -0,0 +1,130 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_AUTHMGR_CFG_H
+#define INCLUDE_AUTHMGR_CFG_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "nim_data.h"
+
+#define AUTHMGR_IS_READY (((authmgrCnfgrState == AUTHMGR_PHASE_INIT_3) || \
+                        (authmgrCnfgrState == AUTHMGR_PHASE_EXECUTE) || \
+                        (authmgrCnfgrState == AUTHMGR_PHASE_UNCONFIG_1)) ? ( TRUE) : ( FALSE))
+
+typedef enum {
+  AUTHMGR_PHASE_INIT_0 = 0,
+  AUTHMGR_PHASE_INIT_1,
+  AUTHMGR_PHASE_INIT_2,
+  AUTHMGR_PHASE_WMU,
+  AUTHMGR_PHASE_INIT_3,
+  AUTHMGR_PHASE_EXECUTE,
+  AUTHMGR_PHASE_UNCONFIG_1,
+  AUTHMGR_PHASE_UNCONFIG_2,
+} authmgrCnfgrState_t;
+
+#define AUTHMGR_LLDP_PROFILES_MAX 128
+
+typedef struct authmgrPortCfg_s
+{
+  nimConfigID_t configId;     /* NIM config ID for this interface*/
+  /* if port is operating as supplicnat, 
+     the functionality is redundant */
+  /* Authentication methods */
+   AUTHMGR_METHOD_t          methodList[ AUTHMGR_METHOD_LAST];
+   AUTHMGR_METHOD_t          priorityList[ AUTHMGR_METHOD_LAST];
+   AUTHMGR_PORT_CONTROL_t   portControlMode;     /* Current control mode setting by mgmt */
+   AUTHMGR_HOST_CONTROL_t   hostMode;     /* Current host mode setting by mgmt */
+   uint32 quietPeriod;       /* Initialization value for txWhen timer */
+   uint32 reAuthPeriod;   /* Number of seconds between periodic reauthentication */
+   BOOL   reAuthEnabled;  /* TRUE if reauthentication is enabled */
+   uint32 maxUsers;        /*Maximum no. users in Mac-Based Authentication */
+   uint32 maxAuthAttempts; /* Maximum number of times authentication may be reattempted by the user radius */
+  /* variable to hold config related to session time out is to be used
+     from radius server */
+  BOOL reAuthPeriodServer;
+  uint32 inActivityPeriod;   /* Number of seconds to wait after which clients can be cleaned up due to inactivity */
+  uint32 intfConfigMask;
+   uchar8 paeCapabilities;
+} authmgrPortCfg_t;
+
+typedef struct authmgrCfg_s
+{
+  fileHdr_t             cfgHdr;
+  uint32                adminMode;
+  uint32                authmgrLogTraceMode; /* Enable/disable log file tracing */
+  uint32                vlanAssignmentMode;/* Global mode to enable vlan assignment */
+  authmgrPortCfg_t           authmgrPortCfg[ AUTHMGR_INTF_MAX_COUNT]; /* Per-port config info */
+  AUTHMGR_PORT_CONTROL_t   portControlMode;     /* Current control mode setting by mgmt */
+  AUTHMGR_HOST_CONTROL_t   hostMode;     /* Current host mode setting by mgmt */
+} authmgrCfg_t;
+
+extern authmgrCfg_t *authmgrCfg;
+
+typedef struct authmgrDebugCfgData_s 
+{
+   BOOL authmgrDebugPacketTraceTxFlag;
+   BOOL authmgrDebugPacketTraceRxFlag;
+} authmgrDebugCfgData_t;
+
+typedef struct authmgrDebugCfg_s
+{
+  fileHdr_t          hdr;
+  authmgrDebugCfgData_t   cfg;
+  uint32             checkSum;
+} authmgrDebugCfg_t;
+
+extern RC_t authmgrSave(void);
+extern  BOOL authmgrHasDataChanged(void);
+extern void authmgrResetDataChanged(void);
+
+extern RC_t authmgrCfgDump(void);
+extern void authmgrBuildDefaultConfigData(void);
+extern void authmgrBuildDefaultIntfConfigData(nimConfigID_t *configId, authmgrPortCfg_t *pCfg);
+
+extern RC_t authmgrApplyConfigData(void);
+extern RC_t authmgrApplyPortConfigData(uint32 intIfNum);
+extern RC_t authmgrPortReset(uint32 intIfNum);
+
+extern void authmgrApiCnfgrCommand( CNFGR_CMD_DATA_t *pCmdData);
+extern RC_t authmgrInit(void);
+extern void authmgrInitUndo();
+extern RC_t authmgrCnfgrInitPhase1Process(void);
+extern RC_t authmgrCnfgrInitPhase2Process(void);
+extern RC_t authmgrCnfgrInitPhase3Process( BOOL warmRestart);
+extern void authmgrCnfgrFiniPhase1Process();
+extern void authmgrCnfgrFiniPhase2Process();
+extern void authmgrCnfgrFiniPhase3Process();
+extern RC_t authmgrCnfgrNoopProccess(  CNFGR_RESPONSE_t *pResponse,
+                                        CNFGR_ERR_RC_t   *pReason );
+extern RC_t authmgrCnfgrUconfigPhase2(  CNFGR_RESPONSE_t *pResponse,
+                                         CNFGR_ERR_RC_t   *pReason );
+extern void authmgrCnfgrParse( CNFGR_CMD_DATA_t *pCmdData);
+
+extern RC_t authmgrLogicalPortInfoSetPortInfo(authmgrLogicalPortInfo_t *logicalPortInfo);
+extern RC_t authmgrLogicalPortInfoInitialize(authmgrLogicalPortInfo_t *logicalPortInfo);
+extern RC_t authmgrLogicalPortReset(authmgrLogicalPortInfo_t *logicalPortInfo);
+extern void authmgrCnfgrTerminateProcess( CNFGR_CMD_DATA_t *pCmdData);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_AUTHMGR_CFG_H */
diff --git a/src/sonic-pac/authmgr/mapping/include/auth_mgr_client.h b/src/sonic-pac/authmgr/mapping/include/auth_mgr_client.h
new file mode 100755
index 000000000000..07ebde81ef15
--- /dev/null
+++ b/src/sonic-pac/authmgr/mapping/include/auth_mgr_client.h
@@ -0,0 +1,225 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_AUTHMGR_CLIENT_H
+#define INCLUDE_AUTHMGR_CLIENT_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "comm_mask.h"
+
+/*********************************************************************
+ * @purpose  Set the authmgr physical port authorization status
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ * @param    portStatus @b{(input)) port authorization status setting
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ * @returns   ERROR
+ *
+ * @comments none
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrIhPhysicalPortStatusSet(uint32 intIfNum, 
+                                 AUTHMGR_PORT_STATUS_t portStatus);
+
+/*********************************************************************
+ * @purpose  Set the authmgr physical port authorization status
+ *
+* @param    intIfNum   @b{(input)}  internal interface number
+* @param    macAddr    @b{(input)}  MAC address of authorized client
+* @param    vlanId     @b{(input)}  set to non-zero value to assign this client to a VLAN
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ * @returns   ERROR
+ *
+ * @comments none
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrAuthenticatedClientAdd(uint32 physPort, 
+                                     enetMacAddr_t macAddr,
+                                     ushort16 vlanId,
+                                     ushort16 blockVlanId);
+
+/*********************************************************************
+ * @purpose  Set the authmgr physical port authorization status
+ *
+* @param    intIfNum   @b{(input)}  internal interface number
+* @param    macAddr    @b{(input)}  MAC address of authorized client
+* @param    vlanId     @b{(input)}  set to non-zero value to assign this client to a VLAN
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ * @returns   ERROR
+ *
+ * @comments none
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrAuthenticatedClientDelete(uint32 physPort, 
+                                     enetMacAddr_t macAddr,
+                                     ushort16 vlanId);
+
+/*********************************************************************
+* @purpose  Cleanup the client Secure Downloadable ACL info from DB
+*
+* @param    logicalPortInfo   @b{(input)) client logical port info structure
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrRadiusSecDAclCleanupFromDb (authmgrLogicalPortInfo_t * logicalPortInfo);
+
+/*********************************************************************
+ * @purpose function to  cleanup the vlan and other settings 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrClientHwInfoCleanup(authmgrLogicalPortInfo_t *logicalPortInfo);
+
+/*********************************************************************
+ * @purpose function to  cleanup the vlan and other settings 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrClientHwInfoAdd(authmgrLogicalPortInfo_t *logicalPortInfo, 
+                              enetMacAddr_t macAddr,
+                              ushort16 vlanId,
+                              ushort16 blockVlanId); 
+
+/*********************************************************************
+ * @purpose  Set the authmgr client authorization status
+ *
+ * @param    lIntIfNum   @b{(input)) internal interface number
+ * @param    portStatus @b{(input)) port authorization status setting
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ * @returns   ERROR
+ *
+ * @comments none
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrClientStatusSet(authmgrLogicalPortInfo_t *logicalPortInfo,  AUTHMGR_PORT_STATUS_t portStatus);
+
+/*********************************************************************
+ * @purpose function to  cleanup the client 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrClientInfoCleanup(authmgrLogicalPortInfo_t *logicalPortInfo);
+
+/*********************************************************************
+ * @purpose function to  cleanup the client sw info 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrClientSwInfoCleanup(authmgrLogicalPortInfo_t *logicalPortInfo);
+
+/*********************************************************************
+ * @purpose function to  check and deAllocate the client 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrClientDisconnectAction(authmgrLogicalPortInfo_t *logicalPortInfo);
+
+
+RC_t authmgrClientInfoCleanupCheck (authmgrClientInfo_t *src,
+                                       authmgrClientInfo_t *dst);
+RC_t authmgrClientFailTimeoutAction(authmgrLogicalPortInfo_t *logicalPortInfo);
+
+/*********************************************************************
+* @purpose utility function to check if the client ckpt params modified 
+* @param src
+* @param dst
+* @return  SUCCESS/ FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrClientHwAddFailPostHwCleanup (authmgrLogicalPortInfo_t *logicalPortInfo,
+                                             uint32 mask);
+
+
+/*********************************************************************
+* @purpose function to  check and cleanup authenticated client's params
+*
+* @param    logicalPortInfo   @b{(input)) logical interface structure 
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrAuthenticatedClientCleanupAction (authmgrLogicalPortInfo_t *
+                                       logicalPortInfo);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_AUTHMGR_CLIENT_H */
diff --git a/src/sonic-pac/authmgr/mapping/include/auth_mgr_control.h b/src/sonic-pac/authmgr/mapping/include/auth_mgr_control.h
new file mode 100755
index 000000000000..56a53f886b98
--- /dev/null
+++ b/src/sonic-pac/authmgr/mapping/include/auth_mgr_control.h
@@ -0,0 +1,858 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#ifndef INCLUDE_AUTHMGR_CONTROL_H
+#define INCLUDE_AUTHMGR_CONTROL_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef AUTHMGR_MAC_MOVE_ON
+#define AUTHMGR_MAC_MOVE_ON  
+#endif
+
+typedef enum authmgrControlEvents_s
+{
+  /***************************************************************/
+  /* Events shared with all                                      */
+  /***************************************************************/
+  /*100*/authmgrControlBegin = 100,
+
+  /***************************************************************/
+  /* Events from Management commands                             */
+  /***************************************************************/
+  
+  /*101*/authmgrMgmtPortInitializeSet,
+  /*102*/authmgrMgmtLogicalPortInitializeSet,
+  /*103*/authmgrMgmtPortReauthenticateSet,
+  /*105*/authmgrMgmtPortControlModeSet,
+  /*106*/authmgrMgmtHostControlModeSet,
+  /*110*/authmgrMgmtPortQuietPeriodSet,
+  /*111*/authmgrMgmtPortReAuthPeriodSet,
+  /*112*/authmgrMgmtPortReAuthEnabledSet,
+  /*113*/authmgrMgmtPortStatsClear,
+  /*114*/authmgrMgmtApplyConfigData,
+  /*115*/authmgrMgmtApplyPortConfigData,
+  /*116*/authmgrMgmtPortMaxUsersSet,
+  /*118*/authmgrMgmtLogicalPortReauthenticateSet,
+  /*119*/authmgrMethodOrderModify,
+  /*120*/authmgrMethodPriorityModify,
+  /*123*/authmgrPaeCapabilitiesEvent,
+  /*124*/authmgrViolationModeSet,
+  /*125*/authmgrMaxAuthAttemptsSet,
+
+  /*129*/authmgrMgmtEvents, /*keep this last in sub group*/
+
+  /***************************************************************/
+  /* Events from network pdu received                            */
+  /***************************************************************/
+  /*130*/authmgrNetworkEvents,
+
+  /***************************************************************/
+  /* Events from AAA client                                      */
+  /***************************************************************/
+  /*131*/authmgrAaaInfoReceived,
+
+  /*132*/authmgrAaaEvents,
+  
+  /***************************************************************/
+  /* Events from interface state changes                         */
+  /***************************************************************/
+  /*133*/authmgrIntfChange,
+  /*134*/authmgrIntfStartup,
+
+  /*135*/authmgrIntfChangeEvents,
+
+  /***************************************************************/
+  /* Events from Vlan state changes                              */
+  /***************************************************************/
+
+  /*136*/authmgrVlanDeleteEvent,
+  /*137*/authmgrVlanAddEvent,
+  /*138*/authmgrVlanAddPortEvent,
+  /*139*/authmgrVlanDeletePortEvent,
+  /*140*/authmgrVlanPvidChangeEvent,
+  /*140*/authmgrVlanConfDeleteEvent,
+  /*140*/authmgrVlanConfPortDeleteEvent,
+  /***************************************************************/
+  /* Events from configurator                                    */
+  /***************************************************************/
+  /*141*/authmgrCnfgr,        
+
+  /*142*/authmgrCnfgrEvents,
+
+  /*143*/authmgrUnauthAddrCallBackEvent,
+  /*145*/authmgrClientTimeout,
+  /***************************************************************/
+  /*147*/authmgrDelDuplicateEntry,
+  /*148*/authmgrAddMacInMacDB,
+  /*149*/authmgrClientCleanup,
+  /***************************************************************/
+  /* Events from Radius.                                         */
+  /***************************************************************/
+  /* authmgr app  timer events */
+  /* 154*/ authmgrTimeTick,
+  /* 155*/ authmgrAuthenticationStart,
+  /* 156*/ authMgr8021xEnableDisable,
+  /* 157*/ authmgrMabEnableDisable,
+  /* 159*/ authmgrAuthMethodCallbackEvent,
+  /* 164*/ authmgrMgmtAdminModeEnable,
+  /* 165*/ authmgrMgmtAdminModeDisable,
+  /* 167*/ authmgrDynamicVlanModeEnable,
+  /* 168*/ authmgrDynamicVlanModeDisable,
+  /* 169*/ authmgrMgmtPortInactivePeriodSet,
+
+  /* 179*/ authmgrCtlPortInfoReset,
+}authmgrControlEvents_t;
+
+/* Message structure to hold responses from AAA client (i.e. RADIUS) */
+typedef struct authmgrAaaMsg_s
+{
+  uint32 status;      /* status of response (i.e. RADIUS_STATUS_SUCCESS, etc.) */
+  uint32 respLen;     /* length of data (response) being passed */
+   uchar8 *pResponse;  /* pointer to response from AAA server */
+} authmgrAaaMsg_t;
+
+typedef struct authmgrIntfChangeParms_s 
+{
+  uint32 intfEvent;
+  NIM_CORRELATOR_t nimCorrelator;
+} authmgrIntfChangeParms_t;
+
+typedef struct authmgrUnauthCallbackParms_s
+{
+   enetMacAddr_t  macAddr;
+   ushort16       vlanId;
+} authmgrUnauthCallbackParms_t;
+
+typedef struct authmgrMgmtTimePeriod_s
+{
+   BOOL reAuthPeriodServer;
+  uint32 val;
+} authmgrMgmtTimePeriod_t;
+
+typedef struct authmgrMsg_s
+{
+  uint32 event;
+  uint32 intf;
+  union
+  {
+    uint32              msgParm;
+    netBufHandle        bufHandle;
+    authmgrAaaMsg_t          authmgrAaaMsg;
+    authmgrIntfChangeParms_t authmgrIntfChangeParms;
+    NIM_STARTUP_PHASE_t    startupPhase;
+    authmgrAuthRespParams_t authParams;
+    authmgrMgmtTimePeriod_t timePeriod;
+  }data;
+} authmgrMsg_t;
+
+typedef struct authmgrBulkMsg_s
+{
+  uint32 event;
+  uint32 intf;
+  union
+  {
+    authmgrUnauthCallbackParms_t   unauthParms;
+  }data;
+} authmgrBulkMsg_t;
+
+typedef struct authmgrVlanMsg_s
+{
+  uint32 event;
+  uint32 intf;
+  union
+  {
+    dot1qNotifyData_t      vlanData;
+  }data;
+} authmgrVlanMsg_t;
+
+#define AUTHMGR_MSG_COUNT       FD_AUTHMGR_MSG_COUNT
+#define AUTHMGR_VLAN_MSG_COUNT  (16 * 1024)
+#define AUTHMGR_TIMER_TICK      1000 /*in milliseconds*/
+
+typedef RC_t(*authmgrStatusMapFn_t) (uint32 lIntIfNum, authmgrAuthRespParams_t *params);
+
+typedef struct authmgrStatusMap_s
+{
+   AUTHMGR_STATUS_t  type;
+  authmgrStatusMapFn_t  statusFn;
+}authmgrStatusMap_t;
+
+typedef RC_t(*authmgrPortControlChangeNotifyFn_t) (uint32 intIfNum,  AUTHMGR_PORT_CONTROL_t portControl);
+typedef RC_t(*authmgrHostControlChangeNotifyFn_t) (uint32 intIfNum,  AUTHMGR_HOST_CONTROL_t hostMode);
+typedef RC_t(*authmgrClientEventNotifyFn_t) (uint32 intIfNum, uint32 event,  enetMacAddr_t *macAddr);
+typedef RC_t(*authmgrMethodOperEnableGetFn_t) (uint32 intIfNum, uint32 *enable);
+
+typedef struct authmgrMethodCallbackNotifyMap_s
+{
+  AUTHMGR_METHOD_t method;
+  authmgrPortControlChangeNotifyFn_t portCtrlFn;
+  authmgrHostControlChangeNotifyFn_t hostCtrlFn;
+  authmgrClientEventNotifyFn_t  eventNotifyFn;
+  authmgrMethodOperEnableGetFn_t    enableGetFn;
+  authmgrMethodOperEnableGetFn_t    radiusEnabledGetFn;
+}authmgrMethodCallbackNotifyMap_t;
+
+extern RC_t authmgrStartTasks();
+extern RC_t authmgrFillMsg(void *data, authmgrMsg_t *msg);
+extern RC_t authmgrBulkFillMsg(void *data, authmgrBulkMsg_t *msg);
+extern RC_t authmgrVlanFillMsg (void *data, authmgrVlanMsg_t * msg);
+extern RC_t authmgrIssueCmd(uint32 event, uint32 intIfNum, void *data);
+extern RC_t authmgrDispatchCmd(authmgrMsg_t *msg);
+extern RC_t authmgrBulkDispatchCmd(authmgrBulkMsg_t *msg);
+extern RC_t authmgrVlanDispatchCmd (authmgrVlanMsg_t * msg);
+extern RC_t authmgrTimerAction();
+
+extern RC_t authmgrCtlPortInitializeSet(uint32 intIfNum,  BOOL initialize);
+extern RC_t authmgrCtlLogicalPortInitializeSet(uint32 lIntIfNum);
+extern RC_t authmgrCtlPortReauthenticateSet(uint32 intIfNum,  BOOL reauthenticate);
+extern RC_t authmgrCtlLogicalPortReauthenticateSet(uint32 lIntIfNum,  BOOL reauthenticate);
+extern RC_t authmgrCtlPortControlModeSet(uint32 intIfNum,  AUTHMGR_PORT_CONTROL_t portControl);
+extern RC_t authmgrCtlPortPaeCapabilitiesSet(uint32 intIfNum, uint32 capabilities);
+extern RC_t authmgrCtlPortPaeCapabilitiesInGlobalDisableSet(uint32 intIfNum, uint32 paeCapabilities);
+extern RC_t authmgrCtlPortQuietPeriodSet(uint32 intIfNum, uint32 quietPeriod);
+extern RC_t authmgrCtlPortTxPeriodSet(uint32 intIfNum, uint32 txPeriod);
+extern RC_t authmgrCtlPortReAuthPeriodSet(uint32 intIfNum, authmgrMgmtTimePeriod_t *params);
+extern RC_t authmgrCtlPortReAuthEnabledSet(uint32 intIfNum,  BOOL reAuthEnabled);
+extern RC_t authmgrCtlPortStatsClear(uint32 intIfNum);
+extern RC_t authmgrCtlApplyConfigData(void);
+extern RC_t authmgrCtlApplyPortConfigData(uint32 intIfNum);
+extern RC_t authmgrRadiusServerVlanAssignmentHandle(uint32 intIfNum,uint32 vlanId);
+extern RC_t authmgrRadiusServerVlanConversionHandle(const  char8 *vlanName, uint32 *vlanId);
+extern RC_t authmgrVlanAssignmentEnable(authmgrLogicalPortInfo_t *logicalPortInfo,uint32 vlanId);
+extern RC_t authmgrVlanAssignmentDisable(uint32 intIfNum,uint32 vlanId);
+extern RC_t authmgrPortVlanAssignmentDisable(uint32 intIfNum);
+extern RC_t authmgrApplyConfigCompleteCb(uint32 event);
+extern void authmgrVlanChangeProcess(uint32 event, uint32 intIfNum, dot1qNotifyData_t *vlanData);
+extern RC_t authmgrCheckMapPdu(uint32 intIfNum,  char8 *srcMac, uint32 *logicalPort, BOOL *existing_node);
+extern RC_t authmgrCtlPortMaxUsersSet(uint32 intIfNum, uint32 maxUsers);
+extern RC_t authmgrCtlApplyLogicalPortConfigData(uint32 lIntIfNum);
+extern RC_t authmgrCtlResetLogicalPortSessionData(authmgrLogicalPortInfo_t *logicalPortInfo);
+extern RC_t authmgrCtlStopLogicalPortSessionData(authmgrLogicalPortInfo_t *logicalPortInfo);
+extern RC_t authmgrPortVlanMembershipSet(uint32 intIfNum, uint32 vlanId, BOOL flag);
+extern RC_t authmgrVlanAddPortEventProcess(uint32 intIfNum,uint32 VlanId);
+extern RC_t authmgrVlanAddEventProcess(uint32 intIfNum,uint32 VlanId);
+extern RC_t authmgrVlanDeletePortEventProcess(uint32 intIfNum,uint32 VlanId);
+extern RC_t authmgrVlanPVIDChangeEventProcess(uint32 intIfNum,uint32 vlanId);
+
+extern RC_t authmgrCtlLogicalPortVlanAssignedReset(uint32 lIntIfNum);
+extern RC_t authmgrCtlLogicalPortVlanAssignmentDisable(authmgrLogicalPortInfo_t *logicalPortInfo);
+extern RC_t authmgrCtlPortUnauthAddrCallbackProcess(uint32 intIfNum, enetMacAddr_t macAddr, ushort16 vlanId);
+
+/*MAB*/
+extern RC_t authmgrCtlLogicalPortMABTimerStart(uint32 lIntIfNum);
+extern RC_t authmgrCtlPortMABEnableSet(uint32 intIfNum);
+extern RC_t authmgrCtlPortMABDisableSet(uint32 intIfNum);
+extern RC_t authmgrCtlLogicalPortMABRemove(uint32 llIntIfNum);
+extern RC_t authmgrCtlLogicalPortMABOperational(uint32 llIntIfNum);
+extern RC_t authmgrCtlLogicalPortMABAuthFailGuestVlanSet(authmgrLogicalPortInfo_t *logicalPortInfo);
+extern RC_t authmgrCtlLogicalPortMABGuestVlanReset(uint32 lIntIfNum);
+extern RC_t authmgrCtlLogicalPortMABGenResp(uint32 lIntIfNum,  BOOL generateNak);
+
+extern RC_t authmgrCtlPortReset(uint32 intIfNum,  BOOL initialize);
+
+/* Authmgr Client Timeout API */
+RC_t authmgrCtlLogicalPortClientTimeout(uint32 lIntIfNum);
+
+/*********************************************************************
+* @purpose  Disconnect the client
+*
+* @param    intIfNum       @b{(input)) internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlClientCleanup (uint32 lIntIfNum);
+
+/*********************************************************************
+ * @purpose  Used to change port admin mode. 
+ *
+ * @param    intIfNum       @b{(input)) internal interface number
+ * @param    adminMode      @b{(input)) administrative mode
+ *
+ * @returns   SUCCESS
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrCtlPortAdminMode(uint32 intIfNum, uint32 adminMode);
+
+/*********************************************************************
+ * @purpose control mode function to set the port control mode to auto 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrPortControlAutoActionSet(uint32 intIfNum);
+
+/*********************************************************************
+ * @purpose control function to set the host mode to multi host 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrControlMultiHostActionSet(uint32 intIfNum);
+
+/*********************************************************************
+ * @purpose control function to set the host mode to single host mode 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrControlSingleAuthActionSet(uint32 intIfNum);
+
+/*********************************************************************
+ * @purpose control function to set the host mode to multi auth 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrControlMultAuthActionSet(uint32 intIfNum);
+
+/*********************************************************************
+ * @purpose control function to set the to force authorized 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrPortControlForceAuthActionSet(uint32 intIfNum);
+
+/*********************************************************************
+ * @purpose control function to set the to force un-authorized 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrPortControlForceUnAuthActionSet(uint32 intIfNum);
+
+/*********************************************************************
+ * @purpose function to clean up authmgr port oper info
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrPortInfoCleanup(uint32 intIfNum);
+
+/*********************************************************************
+ * @purpose function to check policy validation based on host mode 
+ *
+ * @param    hostMode   @b{(input))  hostmode 
+ * @param    *appyPolicy  @b{(input)) bool value 
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrHostModeHwPolicyApply( AUTHMGR_HOST_CONTROL_t hostMode, uint32 intIfNum,  BOOL install);
+
+
+/*********************************************************************
+ * @purpose Set  authmgr authenticated client in specified VLAN
+ *
+ * @param    logicalPortInfo  @b{(input))  Logical Port Info node
+ * @param    reason      @b{(input)) Reason for the assignment
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrClientVlanInfoSet(authmgrLogicalPortInfo_t *logicalPortInfo,
+                               uint32 vlanId);
+
+/*********************************************************************
+ * @purpose Set  authmgr authenticated client in specified VLAN
+ *
+ * @param    logicalPortInfo  @b{(input))  Logical Port Info node
+ * @param    reason      @b{(input)) Reason for the assignment
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrClientVlanInfoReset(uint32 physPort,
+                               uint32 vlanId);
+
+
+void authmgrTimerExpiryHdlr( APP_TMR_CTRL_BLK_t timerCtrlBlk, void* ptrData);
+
+/*************************************************************************
+ * @purpose  Starts the specified timer
+ *
+ * @param    intIfNum      @b{(input)}  Interface for starting the timer
+ * @param    timerType     @b{(input)}  Interface/Timer type
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments none
+ *
+ * @end
+ *************************************************************************/
+RC_t authmgrTimerStart(authmgrLogicalPortInfo_t *logicalPortInfo, authmgrTimerType_t type);
+
+RC_t authmgrTxPeriodGet(uint32 intIfNum, uint32 *val);
+
+RC_t authmgrQuietPeriodGet(uint32 intIfNum, uint32 *val);
+
+RC_t authmgrReAuthPeriodGet(uint32 intIfNum, uint32 *val);
+
+RC_t authmgrServerTimeoutPeriodGet(uint32 intIfNum, uint32 *val);
+
+RC_t authmgrHostModeMapInfoGet( AUTHMGR_HOST_CONTROL_t type, authmgrHostModeMap_t *elem);
+/*********************************************************************
+ * @purpose control mode function to set the port host mode 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrPortCtrlHostModeSet(uint32 intIfNum,  AUTHMGR_HOST_CONTROL_t hostMode);
+
+/*********************************************************************
+ * @purpose  Control function to handle the authentication method order changes 
+ *
+ * @param    intIfNum       @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrMethodOrderChangeProcess(uint32 intIfNum);
+/*********************************************************************
+ * @purpose  authmgr task which serves the request queue
+ *
+ * @param    none
+ *
+ * @returns  void
+ *
+ * @comments User-interface writes and  all are serviced off
+ *           of the authmgrQueue
+ *
+ * @end
+ *********************************************************************/
+void authmgrTask();
+/*********************************************************************
+* @purpose  authmgr srvr task which serves the request queue
+*
+* @param    none
+*
+* @returns  void
+*
+* @comments external applications are serviced off
+*           of the authmgrQueue
+*
+* @end
+*********************************************************************/
+void authmgrSrvrTask ();
+
+/*********************************************************************
+ * @purpose  Control function to handle the events received from methods 
+ *
+ * @param    intIfNum       @b{(input)) internal interface number
+ * @param    status       @b{(input)) status from the calling applications like 
+ 802.1X/MAB/CP
+ * @param    macAddr       @b{(input)) mac addr of the client 
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrClientCallbackEventProcess(uint32 intIfNum,
+                             authmgrAuthRespParams_t *callbackParams);
+
+/*********************************************************************
+ * @purpose  Function to Update the statistics
+ *
+ * @param    intIfNum       @b{(input)) internal interface number
+ * @param    method         @b{(input)) 802.1x/mab/cp
+ * @param    mode           @b{(input))  TRUE/ FALSE
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments  TRUE will update the attempts, and  FALSE will update the
+ failed attempts
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrStatsUpdate(uint32 intIfNum,
+                            AUTHMGR_METHOD_t method,
+                           authmgrStatsUpdate_t status);
+
+/*********************************************************************
+ * @purpose  Get the next operationally enabled method on a interface 
+ *
+ * @param    intIfNum  @b{(input)) internal interface number 
+ * @param    method  @b{(input))  input method for which next method is needed. 
+ * @param    nextMethod  @b{(output)) pointer to the next method 
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+
+RC_t authmgrNextMethodGet(uint32 intIfNum,
+                              AUTHMGR_METHOD_t *nextMethod);
+
+RC_t authmgrRegisteredEntryFnMapGet( AUTHMGR_METHOD_t method, authmgrMethodCallbackNotifyMap_t *entry);
+
+RC_t authmgrAuthenticationTrigger(authmgrLogicalPortInfo_t *logicalPortInfo);
+RC_t authmgrPortEnabledMethodCountGet(uint32 physPort, uint32 *count);
+/*********************************************************************
+ * @purpose  Get the next operationally enabled method on a interface
+ *
+ * @param    intIfNum  @b{(input)) internal interface number
+ * @param    method  @b{(input))  input method for which next method is needed.
+ * @param    nextMethod  @b{(output)) pointer to the next method
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+
+RC_t authmgrEnabledMethodNextGet(uint32 intIfNum,
+     AUTHMGR_METHOD_t *nextMethod);
+
+/*********************************************************************
+ * @purpose updates the port pae capabilities
+ *
+ * @param   intIfNum
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrPaeCapabilitiesEventProcess(uint32 intIfNum, uint32 mode);
+
+/*********************************************************************
+ * @purpose updates the port violation mode 
+ *
+ * @param   intIfNum
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrViolationModeSetAction(uint32 intIfNum,  AUTHMGR_PORT_AUTH_VIOLATION_MODE_t mode);
+
+/*********************************************************************
+ * @purpose updates the port max auth retry attempts 
+ *
+ * @param   intIfNum
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrAuthFailMaxRetryCountSetAction(uint32 intIfNum, uint32  count);
+
+RC_t authmgrTimerReset(authmgrTimerType_t type);
+
+RC_t authmgrMethodModifyAction(uint32 intIfNum);
+RC_t authmgrLogicalPortReAuthPeriodGet(uint32 lIntfNum, uint32 *val);
+
+ void authmgrAllTimersStart(authmgrTimerType_t type,  BOOL flag);
+ void authmgrAuthClientsTimersRestart();
+
+/*********************************************************************
+ * @purpose updates the port max auth retry attempts 
+ *
+ * @param   intIfNum
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrAuthFailMaxRetryCountSetAction(uint32 intIfNum, uint32  count);
+
+/*********************************************************************
+ * @purpose  Set port control mode
+ *
+ * @param    intIfNum    @b{(input)) internal interface number
+ * @param    portControl @b{(input)) port control mode
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrPortCtrlModeSet(uint32 intIfNum,  AUTHMGR_PORT_CONTROL_t portControl);
+
+/*********************************************************************
+ * @purpose  Enable administrative mode setting for authmgr
+ *
+ * @param    none
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrCtlAdminModeEnable();
+
+/*********************************************************************
+ * @purpose  Disable administrative mode setting for authmgr
+ *
+ * @param    none
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrCtlAdminModeDisable();
+
+/*********************************************************************
+* @purpose  Initialize the Authmgr Port Structure with Default Values
+*
+* @param    intIfNum  @b{(input))  internal interface number
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrPortInfoInitialize(uint32 intIfNum,  BOOL flag);
+
+/*********************************************************************
+* @purpose  Set values of the Logical Authmgr Port Structure
+*           with Default Values of port it belongs to
+*
+* @param    logicalPortInfo  @b{(input))  Logical port Info
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrLogicalPortInfoInit(uint32 lIntIfNum);
+
+/*********************************************************************
+* @purpose  Populate Auth Manager Global Info structure
+*
+* @param    none
+*
+* @returns  none
+*
+* @comments
+*
+* @end
+*********************************************************************/
+void authmgrGlobalInfoPopulate();
+
+/*********************************************************************
+ * @purpose  Handle dynamic vlan enable event 
+ *
+ * @param    none
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrCtlDynamicVlanEnableProcess();
+
+/*********************************************************************
+ * @purpose  Disable administrative mode setting for authmgr
+ *
+ * @param    none
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t authmgrCtlDynamicVlanDisableProcess();
+
+/*********************************************************************
+* @purpose function to start timers on an interface
+*
+* @param phyIntf interface number
+* @param type timer type
+* @param flag start or stop
+*
+* @comments
+*
+* @end
+*********************************************************************/
+void authmgrIntfClientsTimerStart (uint32 phyIntf, authmgrTimerType_t type,
+                                    BOOL flag);
+
+/*********************************************************************
+* @purpose  Used to get client inactivity timeout 
+*
+* @param    val     @b{(input)) periodic timeout in seconds
+*
+* @returns   SUCCESS
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlPortInactivityPeriodGet (uint32 intIfNum,
+                                        uint32 * val);
+
+/*********************************************************************
+* @purpose function to start timers on an interface
+*
+* @param phyIntf interface number
+* @param type timer type
+* @param flag start or stop
+*
+* @comments
+*
+* @end
+*********************************************************************/
+void authmgrIntfClientsTimerStart (uint32 phyIntf, authmgrTimerType_t type,
+                                    BOOL flag);
+
+/*********************************************************************
+* @purpose  Used to get client inactivity timeout 
+*
+* @param    val     @b{(input)) periodic timeout in seconds
+*
+* @returns   SUCCESS
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrCtlPortInactivityPeriodGet (uint32 intIfNum,
+                                        uint32 * val);
+
+RC_t authmgrCtlPortMethodNoRespPeriodGet (uint32 intIfNum,
+                                        uint32 * val);
+
+/*********************************************************************
+* @purpose  To close the authenticated sessions gracefully.
+*
+* @returns    SUCCESS
+* @returns    FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t authmgrTerminateAuthSessions();
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+#endif /* INCLUDE_AUTHMGR_CONTROL_H */
diff --git a/src/sonic-pac/authmgr/mapping/include/auth_mgr_debug.h b/src/sonic-pac/authmgr/mapping/include/auth_mgr_debug.h
new file mode 100755
index 000000000000..80ea003926f1
--- /dev/null
+++ b/src/sonic-pac/authmgr/mapping/include/auth_mgr_debug.h
@@ -0,0 +1,146 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_AUTHMGR_DEBUG_H
+#define INCLUDE_AUTHMGR_DEBUG_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define AUTHMGR_TRACE(format,args...)                         \
+{                                                           \
+  if ( authmgrDebugLogTraceModeGet() ==  ENABLE)           \
+  {                                                        \
+     LOGF( LOG_SEVERITY_INFO,format,##args); \
+  }                                                        \
+}
+
+#define AUTHMGR_ERROR_SEVERE(format,args...)                  \
+{                                                           \
+     LOGF( LOG_SEVERITY_ERROR,format,##args); \
+}
+
+/* logical port debug info */
+typedef struct authmgrLogicalPortDebugInfo_s
+{
+ /* unique node identifier*/ 
+  authmgrLogicalNodeKey_t key;
+   char8 timers[200];
+
+  /* protocol related info */
+  authmgrProtocolInfo_t protocol;
+
+  /* client specific non protocol data */
+  authmgrClientInfo_t client;
+ 
+} authmgrLogicalPortDebugInfo_t;
+
+extern void authmgrDebugMsgQueue();
+extern void authmgrDebugTraceIdGet();
+extern void authmgrDebugSizesShow();
+extern void authmgrDebugPortCfgShow(uint32 intIfNum);
+extern void authmgrDebugPortInfoShow(uint32 intIfNum);
+extern void authmgrDebugPortStatsShow(uint32 intIfNum);
+extern RC_t authmgrDebugLogTraceModeSet(uint32 mode);
+extern uint32 authmgrDebugLogTraceModeGet();
+extern  BOOL authmgrDebugPacketTraceTxFlag;
+extern  BOOL authmgrDebugPacketTraceRxFlag;
+
+extern void authmgrBuildTestConfigData(void);
+extern RC_t authmgrDebugSave(void);
+extern void authmgrDebugBuildDefaultConfigData(uint32 ver);
+extern  BOOL authmgrDebugHasDataChanged(void);
+extern void authmgrDebugPacketTraceFlagGet( BOOL *transmitFlag, BOOL *receiveFlag);
+extern RC_t authmgrDebugPacketTraceFlagSet( BOOL transmitFlag, BOOL receiveFlag);
+extern void authmgrDebugPacketRxTrace(uint32 intIfNum,  netBufHandle bufHandle);
+extern void authmgrDebugPacketTxTrace(uint32 intIfNum,  netBufHandle bufHandle);
+extern void authmgrDebugPacketTrace(uint32 intIfNum,  netBufHandle bufHandle, BOOL rxFlag, BOOL txFlag);
+extern void authmgrDebugPacketDump(uint32 flag,uint32 physPort,uint32 intIfNum, netBufHandle bufHandle);
+extern void authmgrDebugDataDump(uint32 flag, uint32 physPort, uchar8  *data,uint32 len);
+
+extern void authmgrDebugLogicalPortInfoShow(uint32 intIfNum, uint32 lIntIfNum);
+
+#define AUTHMGR_USER_TRACE_TX(__fmt__, __args__... )                              \
+      if (authmgrDebugPacketTraceTxFlag ==  TRUE)                               \
+      {                                                                   \
+        LOG_USER_TRACE( AUTHMGR_COMPONENT_ID, __fmt__,##__args__);        \
+      }
+
+#define AUTHMGR_USER_TRACE_RX(__fmt__, __args__... )                              \
+      if (authmgrDebugPacketTraceRxFlag ==  TRUE)                               \
+      {                                                                   \
+        LOG_USER_TRACE( AUTHMGR_COMPONENT_ID, __fmt__,##__args__);        \
+      }
+
+
+
+#define AUTHMGR_TRACE_PORT_STATUS   0x0001
+#define AUTHMGR_TRACE_EVENTS        0x0002
+#define AUTHMGR_TRACE_API_CALLS     0x0004
+#define AUTHMGR_TRACE_FSM_EVENTS    0x0008
+#define AUTHMGR_TRACE_FAILURE       0x0010
+#define AUTHMGR_TRACE_RADIUS        0x0020
+#define AUTHMGR_TRACE_TIMER         0x0040
+#define AUTHMGR_TRACE_MAC_ADDR_DB   0x0080
+#define AUTHMGR_TRACE_CLIENT        0x0800
+
+extern uint32 authmgrDebugTraceFlag;
+extern uint32 authmgrDebugTraceIntf;
+
+#define AUTHMGR_EVENT_TRACE(flag,intf,__fmt__, __args__...)         \
+  /*if ((authmgrDebugTraceFlag&flag) != 0 && (intf==0 || authmgrDebugTraceIntf ==0 || intf == authmgrDebugTraceIntf))*/  \
+  {  \
+     char8  __buf1__[256];    \
+    (void)osapiSnprintf (__buf1__, 256, __fmt__, ## __args__);  \
+     LOGF(  LOG_SEVERITY_DEBUG, \
+    "[%s:%d]%s",__FUNCTION__, __LINE__, __buf1__);  \
+  }
+
+void authmgrDevshellHelpPrint();
+
+char *authmgrHostModeStringGet( AUTHMGR_HOST_CONTROL_t hostMode);
+char *authmgrNodeTypeStringGet(authmgrNodeType_t type);
+char *authmgrTimerTypeStringGet(authmgrTimerType_t type);
+char *authmgrVlanTypeStringGet(authmgrVlanType_t type);
+char *authmgrAuthStateStringGet(AUTHMGR_STATES_t state);
+char *authmgrMethodStringGet( AUTHMGR_METHOD_t method);
+char *authmgrMethodStatusStringGet( AUTHMGR_STATUS_t status);
+char *authmgrSmEventStringGet(authmgrSmEvents_t event);
+char *authmgrListTypeStringGet( AUTHMGR_METHOD_TYPE_t status);
+char *authmgrClientTypeStringGet(authmgrClientType_t type);
+char *authmgrAuthStatusStringGet( AUTHMGR_PORT_STATUS_t status);
+void authmgrSuppMacStringGet( enetMacAddr_t *suppMacAddr);
+char *authmgrAuthMethodStringGet(uint32 authMethod);
+void authmgrDebugTraceEvent(uint32 debug,uint32 intfNum);
+RC_t authmgrDebugTraceEventGet(uint32 *pDebug, uint32 *pIntfNum);
+
+void authmgrBuildTestConfigData(void);
+void authmgrDebugBuildDefaultConfigData(uint32 ver);
+BOOL authmgrDebugHasDataChanged(void);
+
+void authmgrDebugLogicalPortInfoShow(uint32 intIfNum, uint32 lIntIfNum);
+
+RC_t authmgrLportPortGet(uint32 *intIfNum, uint32 *lIntIfNum);
+void authmgrUserCountDump(uint32 intIfNum);
+RC_t authmgrDebugLogicalPortInfoNextGet (uint32 intIfNum, uint32 *lIntIfNum, 
+                                            authmgrLogicalPortDebugInfo_t *debugInfo);
+  /* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+#endif /* INCLUDE_AUTHMGR_DEBUG_H*/
diff --git a/src/sonic-pac/authmgr/mapping/include/auth_mgr_ih.h b/src/sonic-pac/authmgr/mapping/include/auth_mgr_ih.h
new file mode 100755
index 000000000000..ac623f7dea20
--- /dev/null
+++ b/src/sonic-pac/authmgr/mapping/include/auth_mgr_ih.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_AUTHMGR_IH_H
+#define INCLUDE_AUTHMGR_IH_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern RC_t authmgrIntfChangeCallback(uint32 intIfNum, uint32 intfEvent,NIM_CORRELATOR_t correlator,
+                                         NIM_EVENT_SPECIFIC_DATA_t eventData);
+
+extern RC_t authmgrIhProcessIntfChange(uint32 intIfNum, uint32 intfEvent, NIM_CORRELATOR_t correlator);
+extern RC_t authmgrIhProcessIntfStartup(NIM_STARTUP_PHASE_t startupPhase);
+extern RC_t authmgrIntfActivateStartup();
+extern void authmgrIntfStartupCallback(NIM_STARTUP_PHASE_t startupPhase);
+extern RC_t authmgrIhIntfValidate(uint32 intIfNum);
+extern  BOOL authmgrIntfIsConfigurable(uint32 intIfNum, authmgrPortCfg_t **pCfg);
+extern  BOOL authmgrIntfConfigEntryGet(uint32 intIfNum, authmgrPortCfg_t **pCfg);
+extern RC_t authmgrIntfCreate(uint32 intIfNum);
+extern RC_t authmgrIntfDetach(uint32 intIfNum);
+extern RC_t authmgrIntfDelete(uint32 intIfNum);
+extern RC_t authmgrIhPhyPortViolationCallbackSet(uint32 intIfNum,  AUTHMGR_PORT_VIOLATION_CALLBACK_t flag);
+extern RC_t authmgrAuthViolationDiagDisablePort(uint32 IntIfNum);
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*INCLUDE_AUTHMGR_IH_H*/
diff --git a/src/sonic-pac/authmgr/mapping/include/auth_mgr_include.h b/src/sonic-pac/authmgr/mapping/include/auth_mgr_include.h
new file mode 100755
index 000000000000..2008eeb4fce4
--- /dev/null
+++ b/src/sonic-pac/authmgr/mapping/include/auth_mgr_include.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_AUTHMGR_INCLUDE_H
+#define INCLUDE_AUTHMGR_INCLUDE_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+/*
+***********************************************************************
+*                           COMMON INCLUDES
+***********************************************************************
+*/
+#include "pacinfra_common.h"
+#include "osapi.h" 
+#include "nimapi.h"
+#include "log.h"
+#include <stdbool.h>
+#include "datatypes.h"
+#include "auth_mgr_api.h"
+
+/*
+**********************************************************************
+*                           STANDARD LIBRARIES
+**********************************************************************
+*/
+#include <string.h>
+#include <stdlib.h>
+#include <stdio.h>
+
+/*
+**********************************************************************
+*                   AUTHMGR HEADER FILES
+**********************************************************************
+*/
+#include "auth_mgr_exports.h"
+#include "auth_mgr_sid.h"
+#include "auth_mgr_sm.h"
+#include "auth_mgr_db.h"
+#include "auth_mgr_cfg.h"
+#include "auth_mgr_control.h"
+#include "auth_mgr_ih.h"
+#include "auth_mgr_txrx.h"
+#include "auth_mgr_debug.h"
+#include "auth_mgr_mac_db.h"
+#include "auth_mgr_client.h"
+#include "auth_mgr_radius.h"
+#include "auth_mgr_vlan.h"
+#include "auth_mgr_util.h"
+
+#ifdef __cplusplus
+}
+#endif
+#endif  /* INCLUDE_AUTHMGR_INCLUDE_H */
diff --git a/src/sonic-pac/authmgr/mapping/include/auth_mgr_struct.h b/src/sonic-pac/authmgr/mapping/include/auth_mgr_struct.h
new file mode 100755
index 000000000000..4d2770fa4f30
--- /dev/null
+++ b/src/sonic-pac/authmgr/mapping/include/auth_mgr_struct.h
@@ -0,0 +1,89 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_AUTHMGR_STRUCT_H
+#define INCLUDE_AUTHMGR_STRUCT_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "pacinfra_common.h"
+#include "osapi.h"
+#include "portevent_mask.h"
+#include "avl_api.h"
+#include "tree_api.h"
+#include "apptimer_api.h"
+#include "auth_mgr_db.h"
+#include "auth_mgr_cfg.h"
+#include "auth_mgr_api.h"
+#include "auth_mgr_debug.h"
+#include "auth_mgr_include.h"
+
+typedef struct authmgrGlobalInfo_s
+{
+  authmgrCfg_t *authmgrCfg;
+  authmgrInfo_t      authmgrInfo;
+  authmgrPortInfo_t  *authmgrPortInfo;
+  authmgrPortStats_t *authmgrPortStats;
+  uint32        *authmgrMapTbl;
+  authmgrPortSessionStats_t *authmgrPortSessionStats;
+  authmgrDebugCfg_t authmgrDebugCfg;
+
+  authmgrMethodCallbackNotifyMap_t authmgrCallbacks[ AUTHMGR_METHOD_LAST];
+  /* App timer related data */
+  APP_TMR_CTRL_BLK_t   authmgrTimerCB;
+  uint32              authmgrAppTimerBufferPoolId;
+
+  /* avl tree parameters */
+  avlTree_t                authmgrLogicalPortTreeDb;
+  avlTreeTables_t          *authmgrLogicalPortTreeHeap;
+  authmgrLogicalPortInfo_t   *authmgrLogicalPortDataHeap;
+
+  uint32     authmgrMacAddrBufferPoolId;
+  sll_t      authmgrMacAddrSLL;
+  osapiRWLock_t authmgrMacAddrDBRWLock;
+
+  VLAN_MASK_t authmgrVlanMask;
+  int32 eap_socket;
+  uint32 reservedVlan;
+}authmgrGlobalInfo_t;
+
+typedef struct authmgrCB_s
+{
+  void  *authmgrTaskSyncSema;
+  void * authmgrTaskId;
+  void  *authmgrSrvrTaskSyncSema;
+  void * authmgrSrvrTaskId;
+  int   listen_sock;
+  osapiRWLock_t       authmgrRWLock;
+  osapiRWLock_t       authmgrCfgRWLock;
+  void *authmgrQueue;      /* reference to the authmgr message queue */
+  void *authmgrBulkQueue;      /* reference to the authmgr bulk message queue */
+  void *authmgrVlanEventQueue;      /* reference to the authmgr vlan message queue */
+  authmgrGlobalInfo_t *globalInfo;
+  authmgrClientInfo_t processInfo;
+  authmgrClientInfo_t oldInfo;
+  authmgrAuthAttributeInfo_t attrInfo;
+}authmgrCB_t;
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_AUTHMGR_STRUCT_H */

From 2e55c75e38aff762b123322efb277f12e71f2561 Mon Sep 17 00:00:00 2001
From: Vijaya Kumar Abbaraju <vijaya-kumar.abbaraju@broadcom.com>
Date: Sat, 26 Oct 2024 00:37:46 +0530
Subject: [PATCH 143/364] MAB protocol related header files (#18629)

---
 src/sonic-pac/mab/protocol/include/mab_auth.h |  59 ++++
 src/sonic-pac/mab/protocol/include/mab_db.h   | 272 ++++++++++++++++++
 .../mab/protocol/include/mab_local.h          |  35 +++
 .../mab/protocol/include/mab_mac_db.h         |  43 +++
 .../mab/protocol/include/mab_radius.h         |  48 ++++
 .../mab/protocol/include/mab_timer.h          | 118 ++++++++
 src/sonic-pac/mab/protocol/include/mab_util.h |  83 ++++++
 src/sonic-pac/mab/protocol/include/mab_vlan.h |  81 ++++++
 8 files changed, 739 insertions(+)
 create mode 100755 src/sonic-pac/mab/protocol/include/mab_auth.h
 create mode 100644 src/sonic-pac/mab/protocol/include/mab_db.h
 create mode 100755 src/sonic-pac/mab/protocol/include/mab_local.h
 create mode 100755 src/sonic-pac/mab/protocol/include/mab_mac_db.h
 create mode 100644 src/sonic-pac/mab/protocol/include/mab_radius.h
 create mode 100755 src/sonic-pac/mab/protocol/include/mab_timer.h
 create mode 100755 src/sonic-pac/mab/protocol/include/mab_util.h
 create mode 100755 src/sonic-pac/mab/protocol/include/mab_vlan.h

diff --git a/src/sonic-pac/mab/protocol/include/mab_auth.h b/src/sonic-pac/mab/protocol/include/mab_auth.h
new file mode 100755
index 000000000000..66fabcac546f
--- /dev/null
+++ b/src/sonic-pac/mab/protocol/include/mab_auth.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_MAB_AUTH_H
+#define INCLUDE_MAB_AUTH_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+  extern "C" {
+#endif
+#include "comm_mask.h"
+
+/*********************************************************************
+ * @purpose  Actions to be performed when sending request to a client
+ *
+ * @param   logicalPortInfo  @b{(input))  Logical Port Info node
+ * @param   bufHandle  @b{(input))  buff handle
+ *
+ * @returns  SUCCESS
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabClientRequestAction(mabLogicalPortInfo_t *logicalPortInfo,  netBufHandle bufHandle);
+
+/*********************************************************************
+ * @purpose  Actions to be performed when sending response to AAA
+ *
+ * @param   logicalPortInfo  @b{(input))  Logical Port Info node
+ * @param   bufHandle  @b{(input))  buff handle
+ *
+ * @returns  SUCCESS
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabClientResponseAction(mabLogicalPortInfo_t *logicalPortInfo,  netBufHandle bufHandle);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_MAB_AUTH_H */
diff --git a/src/sonic-pac/mab/protocol/include/mab_db.h b/src/sonic-pac/mab/protocol/include/mab_db.h
new file mode 100644
index 000000000000..005692f8c29b
--- /dev/null
+++ b/src/sonic-pac/mab/protocol/include/mab_db.h
@@ -0,0 +1,272 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#ifndef INCLUDE_MAB_DB_H
+#define INCLUDE_MAB_DB_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+  extern "C" {
+#endif
+
+#include "comm_mask.h"
+#include "apptimer_api.h"
+#include "mab_vlan.h"
+#include "auth_mgr_exports.h"
+#include "mab_radius.h"
+#include "mab_exports.h"
+#include "mab_util.h"
+#include "avl_api.h"
+#include "radius_attr_parse.h"
+
+#define MAB_USER_INDEX_INVALID  -1
+
+#define MAB_MD5_LEN   16
+
+#define MAB_SERVER_STATE_LEN 253
+#define MAB_SERVER_CLASS_LEN 253
+
+#define MAB_FILTER_NAME_LEN 256
+
+#define MAB_LOGICAL_PORT_START    0 
+#define MAB_LOGICAL_PORT_END       MAB_MAX_USERS_PER_PORT
+
+#define MAB_LOGICAL_PORT_ITERATE  0xFFFFFFFF
+#define MAB_RADIUS_VLAN_ASSIGNED_LEN  32 /* Radius Assigned vlan length */
+
+/* switch info */
+typedef struct mabInfo_s
+{
+  uint32 traceId;
+} mabInfo_t;
+
+typedef enum mabTimerType_s
+{
+  MAB_TIMER_UNASSIGNED = 0,
+  MAB_SERVER_AWHILE,
+}mabTimerType_t;
+
+typedef enum
+{
+  MAB_UNAUTHENTICATED = 0,
+  MAB_AUTHENTICATING,
+  MAB_AUTHENTICATED
+} MAB_AUTH_STATES_t;
+
+typedef struct mabProtocolInfo_s
+{
+  MAB_AUTH_STATES_t mabAuthState;
+   BOOL authSuccess;
+   BOOL authFail;
+}mabProtocolInfo_t;
+
+typedef struct mabClientInfo_s
+{
+  /* mab Client category */
+  authmgrClientType_t clientType;
+
+  /* Re-auth and session related info */
+   uchar8               currentIdL;       /* ID of current auth session (0-255) */
+   BOOL                 reAuthenticate;  /* Set to TRUE when reAuthWhen timer expires */
+
+  /* client authentication status */
+   AUTHMGR_PORT_STATUS_t  logicalPortStatus;      /* Current authorization state of the port */
+
+  /* user Details */
+   uchar8 mabUserName[MAB_USER_NAME_LEN];
+   uint32 mabUserNameLength;
+   int32 mabUserIndex;
+
+   uchar8 mabChallenge[MAB_CHALLENGE_LEN];
+   uint32 mabChallengelen;
+
+   netBufHandle suppBufHandle;  /* Hold onto buf handle for re-transmit */
+   enetMacAddr_t suppMacAddr;   /* MAC address of Supplicant */
+
+   /* vlan related info */
+   authmgrVlanType_t  vlanType;     /* assigned vlan category */
+   uint32        vlanId;       /* Vlan Id of Supplicant */
+
+   attrInfo_t attrInfo;
+   uchar8   filterName[MAB_FILTER_NAME_LEN];
+ 
+   USER_MGR_AUTH_METHOD_t authMethod; /* Auth method for the user of this port */
+
+   AUTHMGR_PORT_MAB_AUTH_TYPE_t mabAuthType; /* Authentication type used by MAB. To be filled in only if isMABClient is  TRUE */
+
+}mabClientInfo_t;
+
+typedef struct mabLogicalNodeKey_s
+{
+  /* first 16 bits represent physical port
+     next 12 bits represent logical port
+     and remaining 3 bits represent client type.
+     last bit is always 0 */
+  uint32 keyNum;
+}mabLogicalNodeKey_t;
+
+
+typedef struct mabTimerContext_s
+{
+  mabTimerType_t   type;
+  uint32          keyNum;
+}mabTimerContext_t;
+
+
+typedef struct mabTimerHandle_s
+{
+   APP_TMR_HNDL_t         timer;
+ /* void                     *timerHandle; */
+}mabTimerHandle_t;
+
+
+typedef struct mabTimer_s
+{
+  mabTimerContext_t      cxt;
+  mabTimerHandle_t       handle;
+}mabTimer_t;
+
+
+/* logical port info */
+typedef struct mabLogicalPortInfo_s
+{
+ /* unique node identifier*/ 
+  mabLogicalNodeKey_t key;
+
+  mabTimer_t          mabTimer;
+
+  /* protocol related info */
+  mabProtocolInfo_t protocol;
+
+  /* client specific non protocol data */
+  mabClientInfo_t client;
+  
+  void         *next; /* This field must be the last one in this structure */
+} mabLogicalPortInfo_t;
+
+
+/* Per-port info */
+typedef struct mabPortInfo_s
+{
+  uint32            maxUsers;
+  uint32            numUsers;
+
+  /* Inter-state machine communication and initialization */
+   uchar8               currentId;       /* ID of current auth session (0-255) */
+   BOOL                 initialize;      /* Set to TRUE by mgmt to cause port initialization */
+   AUTHMGR_PORT_CONTROL_t portControlMode; /* Current control mode setting by mgmt */
+   AUTHMGR_HOST_CONTROL_t hostMode;      /* host mode setting by mgmt */
+   BOOL                 portEnabled;     /* TRUE if port is active */
+   uint32               authCount;       /* number of authorized clients */ 
+   uint32               serverTimeout;   /* Initialization value for aWhile timer when timing out Auth. Server */
+   USER_MGR_AUTH_METHOD_t authMethod;    /* Authentication method for the user of this port */
+   AcquiredMask            acquiredList;    /* Mask of components "acquiring" an interface */
+   uint32               mabEnabled;      /*  ENABLE if MAB has been enabled on the port and port control mode is mac-based*/
+    
+} mabPortInfo_t;
+
+typedef RC_t(*mabCtrlTimerExpiryFn_t) (mabLogicalPortInfo_t *logicalPortInfo);
+typedef RC_t(*mabCtrlTimerNodeSetFn_t) (uint32 intIfNum, uint32 val);
+typedef RC_t(*mabCtrlTimerNodeGetFn_t) (uint32 intIfNum, uint32 *val);
+
+typedef struct mabTimerMap_s
+{
+  mabTimerType_t  type;
+  mabCtrlTimerExpiryFn_t  expiryFn;
+}mabTimerMap_t;
+
+
+typedef RC_t(*mabCtrlHostModeSetFn_t) (uint32 intIfNum);
+
+typedef struct mabHostModeMap_s
+{
+   AUTHMGR_HOST_CONTROL_t  hostMode;
+  mabCtrlHostModeSetFn_t  hostModeFn;
+}mabHostModeMap_t;
+
+
+typedef RC_t(*mabPortCtrlLearnFn_t) (uint32 intIfNum);
+
+typedef struct mabPortCtrlLearnMap_s
+{
+   AUTHMGR_PORT_CONTROL_t  portControlMode;
+  mabPortCtrlLearnFn_t       learnFn;
+}mabPortCtrlLearnMap_t;
+
+
+typedef RC_t(*mabHostCtrlLearnFn_t) (uint32 intIfNum);
+
+typedef struct mabHostCtrlLearnMap_s
+{
+   AUTHMGR_HOST_CONTROL_t  hostMode;
+  mabHostCtrlLearnFn_t   learnFn;
+}mabHostCtrlLearnMap_t;
+
+typedef RC_t(*mabAuthmgrEventMapFn_t) (uint32 intIfNum,  enetMacAddr_t suppMacAddr);
+
+typedef struct mabAuthmgrEventFnMap_s
+{
+  uint32  event;
+  mabAuthmgrEventMapFn_t   eventMapFn;
+}mabAuthmgrEventFnMap_t;
+
+/* This structure is used to keep track of vlan addport/delport evetnts */
+typedef struct mabMacBasedVlanParticipation_s
+{
+   INTF_MASK_t    intfBitMask;
+   INTF_MASK_t    adminBitMask; /* Dot1q admin mode */
+}mabMacBasedVlanParticipation_t;
+
+
+typedef struct mabPortStats_s
+{
+  /* Authenticator Diagnostics */
+  uint32 authEntersAuthenticating;
+  uint32 authAuthSuccessWhileAuthenticating;
+} mabPortStats_t;
+
+extern mabInfo_t mabInfo;
+extern mabPortInfo_t *mabPortInfo;
+extern mabPortStats_t *mabPortStats;
+extern uint32 *mabMapTbl;
+
+/*********************************************************************************************/
+
+
+/* Prototypes for the mab_db.c file */
+RC_t mabLogicalPortInfoDBInit(uint32 nodeCount);
+RC_t mabLogicalPortInfoDBDeInit(void);
+
+RC_t mabLogicalPortInfoTakeLock(void);
+RC_t mabLogicalPortInfoGiveLock(void);
+
+mabLogicalPortInfo_t *mabLogicalPortInfoAlloc(uint32 intIfNum);
+RC_t mabLogicalPortInfoDeAlloc(mabLogicalPortInfo_t *node);
+
+mabLogicalPortInfo_t *mabLogicalPortInfoGet(uint32 lIntIfNum);
+mabLogicalPortInfo_t *mabLogicalPortInfoGetNext(uint32 lIntIfNum);
+
+mabLogicalPortInfo_t *mabLogicalPortInfoFirstGet(uint32 intIfNum,
+                                                    uint32 *lIntIfNum);
+mabLogicalPortInfo_t *mabLogicalPortInfoGetNextNode(uint32 intIfNum,
+                                                        uint32 *lIntIfNum);
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_MAB_DB_H */
diff --git a/src/sonic-pac/mab/protocol/include/mab_local.h b/src/sonic-pac/mab/protocol/include/mab_local.h
new file mode 100755
index 000000000000..8d83fb3e5b93
--- /dev/null
+++ b/src/sonic-pac/mab/protocol/include/mab_local.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_MAB_LOCAL_H
+#define INCLUDE_MAB_LOCAL_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern RC_t mabLocalAuthResponseProcess(mabLogicalPortInfo_t *logicalPortInfo,  netBufHandle bufHandle);
+extern RC_t mabLocalAuthMd5ResponseValidate(mabLogicalPortInfo_t *logicalPortInfo,  uchar8 *response);
+extern void mabLocalAuthChallengeGenerate( uchar8 *challenge, uint32 challengeLen);
+extern void mabLocalMd5Calc( uchar8 *inBuf, uint32 inLen,  uchar8 *outBuf);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_MAB_LOCAL_H */
diff --git a/src/sonic-pac/mab/protocol/include/mab_mac_db.h b/src/sonic-pac/mab/protocol/include/mab_mac_db.h
new file mode 100755
index 000000000000..3655343233d6
--- /dev/null
+++ b/src/sonic-pac/mab/protocol/include/mab_mac_db.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_MAB_MAC_DB_H
+#define INCLUDE_MAB_MAC_DB_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#include "sll_api.h"
+#include "buff_api.h"
+
+extern RC_t mabMacAddrDataDestroy ( sll_member_t *ll_member);
+extern  int32 mabMacAddrDataCmp(void *p, void *q, uint32 key);
+extern RC_t mabMacAddrInfoDBInit(uint32 nodeCount);
+extern RC_t mabMacAddrInfoDBDeInit(void);
+extern RC_t mabMacAddrInfoAdd( enetMacAddr_t *mac_addr,uint32 lIntIfNum);
+extern RC_t mabMacAddrInfoRemove( enetMacAddr_t *mac_addr);
+extern RC_t mabMacAddrInfoFind( enetMacAddr_t *mac_addr,uint32 *lIntIfNum);
+extern RC_t mabMacAddrInfoFindNext( enetMacAddr_t *mac_addr,uint32 *lIntIfNum);
+
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+#endif /* INCLUDE_MAB_MAC_DB_H */
diff --git a/src/sonic-pac/mab/protocol/include/mab_radius.h b/src/sonic-pac/mab/protocol/include/mab_radius.h
new file mode 100644
index 000000000000..89e5556d4b34
--- /dev/null
+++ b/src/sonic-pac/mab/protocol/include/mab_radius.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __INCLUDE_MAB_RADIUS_H__
+#define __INCLUDE_MAB_RADIUS_H__
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "radius_attr_parse.h"
+
+extern RC_t mabRadiusResponseCallback(void *msg, uint32 correlator);
+extern RC_t mabRadiusResponseProcess(unsigned int lIntIfNum, void *resp);
+extern RC_t mabRadiusAcceptProcess(uint32 intIfNum, void *payload);
+extern RC_t mabRadiusResponseHandle(void *resp, int len);
+extern RC_t mabSendRespToServer(uint32 lIntIfNum,  netBufHandle bufHandle);
+
+extern RC_t mabRadiusChallengeProcess(uint32 intIfNum, void *radiusPayload);
+extern RC_t mabRadiusAccessRequestSend(uint32 intIfNum,  uchar8 *suppEapData);
+extern RC_t mabRadiusSuppResponseProcess(uint32 intIfNum,  netBufHandle bufHandle);
+extern  void mabRadiusClearRadiusMsgsSend( enetMacAddr_t suppMacAddr);
+
+extern int radius_mab_client_register(void *data);
+
+extern RC_t mabRadiusServerTaskLockTake(void);
+extern RC_t mabRadiusServerTaskLockGive(void);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __INCLUDE_MAB_RADIUS_H__*/
diff --git a/src/sonic-pac/mab/protocol/include/mab_timer.h b/src/sonic-pac/mab/protocol/include/mab_timer.h
new file mode 100755
index 000000000000..14df030abd90
--- /dev/null
+++ b/src/sonic-pac/mab/protocol/include/mab_timer.h
@@ -0,0 +1,118 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_MAB_TIMER_H
+#define INCLUDE_MAB_TIMER_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "comm_mask.h"
+
+/*********************************************************************
+ * @purpose   This function is used to send timer events
+ *
+ * @param     timerCtrlBlk    @b{(input)}   Timer Control Block
+ * @param     ptrData         @b{(input)}   Ptr to passed data
+ *
+ * @returns   None
+ *
+ * @notes     None
+ * @end
+ *********************************************************************/
+void mabTimerExpiryHdlr( APP_TMR_CTRL_BLK_t timerCtrlBlk, void* ptrData);
+
+/*************************************************************************
+ * @purpose  Starts the specified timer
+ *
+ * @param    intIfNum      @b{(input)}  Interface for starting the timer
+ * @param    timerType     @b{(input)}  Interface/Timer type
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments none
+ *
+ * @end
+ *************************************************************************/
+RC_t mabTimerStart(mabLogicalPortInfo_t *logicalPortInfo, mabTimerType_t timerType);
+
+/*************************************************************************
+ * @purpose  Helper API to delete the specifed timer node
+ *
+ * @param    timer  @b{(input)}  Pointer to appTimer node
+ * @param    handle @b{(input)}  Pointer to appTimer handle handle
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments none
+ *
+ * @end
+ *************************************************************************/
+RC_t  mabTimerDestroy( APP_TMR_CTRL_BLK_t timerCB,
+    mabLogicalPortInfo_t *logicalPortInfo);
+
+/*************************************************************************
+  * @purpose  Process the mab timer expiry event
+  *
+  * @param    param    @b{(input)}  Pointer to added mab node identifier 
+  *
+  * @returns  void
+  *
+  * @comments none
+  *
+  * @end
+  *************************************************************************/
+void mabTimerExpiryAction(void *param);
+
+
+/*************************************************************************
+  * @purpose get the map table entry for the timer type 
+  *
+  * @param    param    @b{(input)}  Pointer to added mab node identifier 
+  *
+  * @returns  void
+  *
+  * @comments none
+  *
+  * @end
+  *************************************************************************/
+RC_t mabTimerHandlerInfoGet(mabTimerType_t type, mabTimerMap_t *handler);
+
+/*************************************************************************
+ * @purpose  function to process on expiry of server awhile timer 
+ *
+ * @param    timer  @b{(input)}  Pointer to appTimer node
+ * @param    logicalPortInfo @b{(input)}  Pointer to logicalPort Info 
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments none
+ *
+ * @end
+ *************************************************************************/
+RC_t  mabServerAwhileExpiryAction(mabLogicalPortInfo_t *logicalPortInfo);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_MAB_TIMER_H */
diff --git a/src/sonic-pac/mab/protocol/include/mab_util.h b/src/sonic-pac/mab/protocol/include/mab_util.h
new file mode 100755
index 000000000000..d5dc3470d9ae
--- /dev/null
+++ b/src/sonic-pac/mab/protocol/include/mab_util.h
@@ -0,0 +1,83 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_MAB_UTIL_H
+#define INCLUDE_MAB_UTIL_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "comm_mask.h"
+#include "apptimer_api.h"
+#include "mab_radius.h"
+#include "mab_exports.h"
+
+
+#define MAB_LPORT_KEY_PACK(_x, _y, _z, _val) \
+  do { \
+    _val |= ((_x<<16) | (_y<<4) | (_z)); \
+  } while (0);
+
+#define MAB_LPORT_KEY_UNPACK(_x, _y, _z, _val) \
+  do { \
+    _x = (_val & 0XFFFF0000)>>16; \
+    _y = (_val & 0X0000FFF0)>>4; \
+    _z = (_val & 0X0000000F); \
+  } while (0);
+
+
+#define MAB_PORT_GET(_x, _val) \
+  _x = (_val & 0XFFFF0000)>>16;
+
+
+#define MAB_LPORT_GET(_y, _val) \
+  _y = (_val & 0X0000FFF0)>>4;
+
+
+#define MAB_TYPE_GET(_z, _val) \
+  _z = (_val & 0X0000000F);
+
+
+#define MAB_IF_NULLPTR_RETURN_LOG(_p) \
+  if ( NULLPTR == _p) \
+  { \
+    MAB_EVENT_TRACE("%s is NULLPTR.", #_p); \
+    return  FAILURE; \
+  }
+
+/*********************************************************************
+ * @purpose function to check policy validation based on host mode 
+ *
+ * @param    hostMode   @b{(input))  hostmode 
+ * @param    *appyPolicy  @b{(input)) bool value 
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabHostIsDynamicNodeAllocCheck( AUTHMGR_HOST_CONTROL_t hostMode,  BOOL *valid);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_MAB_UTIL_H */
diff --git a/src/sonic-pac/mab/protocol/include/mab_vlan.h b/src/sonic-pac/mab/protocol/include/mab_vlan.h
new file mode 100755
index 000000000000..e27aca8f5080
--- /dev/null
+++ b/src/sonic-pac/mab/protocol/include/mab_vlan.h
@@ -0,0 +1,81 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_MAB_VLAN_H
+#define INCLUDE_MAB_VLAN_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "comm_mask.h"
+#include "mab_exports.h"
+
+/*********************************************************************
+ * @purpose  check if the port participation can be removed for a vlan
+ *
+ * @param    physPort    @b{(input))  Port
+ * @param    vlanId      @b{(input)) vlan Id
+ *
+ * @returns   SUCCESS/ FAILRE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabVlanPortDeletionValidate(uint32 physPort, uint32 vlanId);
+
+
+/*********************************************************************
+ * @purpose  check if the port can be aquired by mab 
+ *
+ * @param    physPort    @b{(input))  Port
+ * @param    vlanId      @b{(input)) vlan Id
+ *
+ * @returns   SUCCESS/ FAILRE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabVlanPortAcquireCheck(uint32 physPort);
+
+/*********************************************
+ * @purpose  Enable  mab vlan to a specified interface
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ * @param    guestVlanId @b{(input)} guest vlan id
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabVlanDeleteProcess(uint32 vlanId);
+
+
+RC_t mabVlanPortDeleteProcess(uint32 intIfNum,uint32 vlanId);
+RC_t mabVlanPortAddProcess(uint32 intIfNum,uint32 vlanId);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_MAB_VLAN_H */

From 3a167ad01ac93876ae31f6c86fa72c6a6b076064 Mon Sep 17 00:00:00 2001
From: Vijaya Kumar Abbaraju <vijaya-kumar.abbaraju@broadcom.com>
Date: Sat, 26 Oct 2024 00:37:55 +0530
Subject: [PATCH 144/364] PAC changs to receive config updates (#18620)

---
 src/sonic-pac/paccfg/Makefile.am         |  15 ++
 src/sonic-pac/paccfg/pac_authmgrcfg.cpp  | 199 +++++++++++++++++++
 src/sonic-pac/paccfg/pac_authmgrcfg.h    |  89 +++++++++
 src/sonic-pac/paccfg/pac_cfg_authmgr.cpp | 235 +++++++++++++++++++++++
 src/sonic-pac/paccfg/pac_cfg_authmgr.h   |  57 ++++++
 src/sonic-pac/paccfg/pac_cfg_vlan.cpp    | 158 +++++++++++++++
 src/sonic-pac/paccfg/pac_cfg_vlan.h      |  82 ++++++++
 src/sonic-pac/paccfg/pac_vlancfg.cpp     | 163 ++++++++++++++++
 src/sonic-pac/paccfg/pac_vlancfg.h       |  88 +++++++++
 9 files changed, 1086 insertions(+)
 create mode 100644 src/sonic-pac/paccfg/Makefile.am
 create mode 100644 src/sonic-pac/paccfg/pac_authmgrcfg.cpp
 create mode 100644 src/sonic-pac/paccfg/pac_authmgrcfg.h
 create mode 100644 src/sonic-pac/paccfg/pac_cfg_authmgr.cpp
 create mode 100644 src/sonic-pac/paccfg/pac_cfg_authmgr.h
 create mode 100644 src/sonic-pac/paccfg/pac_cfg_vlan.cpp
 create mode 100644 src/sonic-pac/paccfg/pac_cfg_vlan.h
 create mode 100644 src/sonic-pac/paccfg/pac_vlancfg.cpp
 create mode 100644 src/sonic-pac/paccfg/pac_vlancfg.h

diff --git a/src/sonic-pac/paccfg/Makefile.am b/src/sonic-pac/paccfg/Makefile.am
new file mode 100644
index 000000000000..c95d641067f0
--- /dev/null
+++ b/src/sonic-pac/paccfg/Makefile.am
@@ -0,0 +1,15 @@
+INCLUDES =  -I $(top_srcdir)/fpinfra/inc -I $(top_srcdir)/authmgr/common -I $(top_srcdir)/authmgr/mapping/include  -I $(top_srcdir)/authmgr/protocol/include
+
+lib_LTLIBRARIES = libpaccfg.la
+
+if DEBUG
+DBGFLAGS = -ggdb -DDEBUG
+else
+DBGFLAGS = -g -DNDEBUG
+endif
+
+AM_CPPFLAGS = $(DBGFLAGS) $(AM_CFLAGS) $(CFLAGS_COMMON) $(SONIC_COMMON_CFLAGS)
+
+libpaccfg_la_SOURCES = $(top_srcdir)/paccfg/pac_cfg_authmgr.cpp $(top_srcdir)/paccfg/pac_authmgrcfg.cpp $(top_srcdir)/paccfg/pac_cfg_vlan.cpp $(top_srcdir)/paccfg/pac_vlancfg.cpp
+
+libpaccfg_la_LIBADD = -lswsscommon -lnl-3 -lnl-route-3 -lhiredis $(SONIC_COMMON_LDFLAGS)
diff --git a/src/sonic-pac/paccfg/pac_authmgrcfg.cpp b/src/sonic-pac/paccfg/pac_authmgrcfg.cpp
new file mode 100644
index 000000000000..d5f0322cebbd
--- /dev/null
+++ b/src/sonic-pac/paccfg/pac_authmgrcfg.cpp
@@ -0,0 +1,199 @@
+/*
+ * Copyright 2019 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include <swss/logger.h>
+#include <swss/dbconnector.h>
+#include <swss/producerstatetable.h>
+#include <swss/macaddress.h>
+#include <swss/tokenize.h>
+#include "pac_authmgrcfg.h"
+
+using namespace std;
+using namespace swss;
+
+// PAC SONIC config engine 
+PacCfg::PacCfg(DBConnector *db, DBConnector *cfgDb, DBConnector *stateDb) :
+    m_cfgFdbTable(cfgDb, CFG_FDB_TABLE_NAME),
+    m_stateOperFdbTable(stateDb, STATE_OPER_FDB_TABLE_NAME),
+    m_stateOperPortTable(stateDb, STATE_OPER_PORT_TABLE_NAME)
+{
+    Logger::linkToDbNative("paccfg");
+    SWSS_LOG_NOTICE("PAC: config object");
+
+    /* FDB flush notification producer */
+    m_flushFdb = std::make_shared<swss::NotificationProducer>(db, "FLUSHFDBREQUEST");
+}
+
+PacCfg::~PacCfg()
+{
+
+}
+
+// Set learning mode for a port 
+bool PacCfg::intfLearningSet(string port, string learning)
+{
+   string key(port);
+   vector<FieldValueTuple> fvVector;
+  
+   // Configure port learning mode for FDB manager 
+   fvVector.emplace_back("learn_mode", learning);
+   m_stateOperPortTable.set(key, fvVector);
+
+   return true;    
+}
+
+// Get learning mode of a port 
+bool PacCfg::intfLearningGet(string port, string *learning)
+{
+   return true;
+}
+
+// Add a static MAC address to FDB 
+bool PacCfg::intfStaticMacAdd(string port, MacAddress mac, int vlan)
+{
+   string key = VLAN_PREFIX + to_string(vlan);
+   key += STATE_DB_SEPARATOR;
+   key += mac.to_string();
+
+   vector<FieldValueTuple> fvVector;
+
+   fvVector.push_back(FieldValueTuple("port", port));
+   fvVector.push_back(FieldValueTuple("type", "static"));
+   m_stateOperFdbTable.set(key, fvVector);
+   
+   return true;    
+}
+
+// Remove an added static MAC address. 
+bool PacCfg::intfStaticMacRemove(string port, MacAddress mac, int vlan)
+{
+   string key = VLAN_PREFIX + to_string(vlan);
+   key += STATE_DB_SEPARATOR;
+   key += mac.to_string();
+
+   m_stateOperFdbTable.del(key);
+
+   return true;    
+}
+
+// for now, blindly delete all entries.
+// Ideally we need to delete only the entries owned by PAC.
+void PacCfg::intfStaticMacCleanup(void)
+{
+   vector<string> keys;
+   m_stateOperFdbTable.getKeys(keys);
+   for (const auto key : keys)
+   {
+      m_stateOperFdbTable.del(key);
+   }
+}
+
+// Acquire/Release port. 
+bool PacCfg::intfAcquireSet(string port, bool acquire)
+{
+   vector<FieldValueTuple> fvVector;
+  
+   // Configure port acquire config for port.
+   if (acquire == true)
+   {
+       fvVector.emplace_back("acquired", "true");
+   }
+   else
+   {
+       fvVector.emplace_back("acquired", "false");
+   }
+   m_stateOperPortTable.set(port, fvVector);
+ 
+   return true;
+}
+
+// Block a client 
+bool PacCfg::intfClientBlock(string port, MacAddress mac, int vlan)
+{
+   // Add a static MAC entry with discard bits set. 
+   string key = VLAN_PREFIX + to_string(vlan);
+   key += STATE_DB_SEPARATOR;
+   key += mac.to_string();
+
+   vector<FieldValueTuple> fvVector;
+   fvVector.push_back(FieldValueTuple("discard", "true"));
+   fvVector.push_back(FieldValueTuple("port", port));
+   fvVector.push_back(FieldValueTuple("type", "static"));
+
+   m_stateOperFdbTable.set(key, fvVector);
+   
+   return true;    
+}
+
+bool PacCfg::intfFdbFlush(string port)
+{
+   vector<FieldValueTuple> values;
+
+   SWSS_LOG_DEBUG("send fdb flush by port %s notification ", port.c_str());
+
+   // Send FDB flush notification. 
+   m_flushFdb->send("PORT", port, values);
+
+   return true;
+}
+
+bool PacCfg::intfMacVlanTranslationAdd(string port, MacAddress mac, int vlan)
+{
+   // Add MAC-VLAN translation for given MAC-VLAN pair. 
+   return true;
+}
+
+bool PacCfg::intfMacVlanTranslationRemove(string port, MacAddress mac, int vlan)
+{
+   // Remove MAC-VLAN translation for given MAC-VLAN pair. 
+   return true;
+}
+
+bool PacCfg::sendFdbNotification(string op, string port)
+{
+   vector<string> keys;
+   vector<FieldValueTuple> entry;
+   const char delimiter = '|';
+
+   /* Retrieve static MAC entries configure on port and 
+    * send a notification to add/remove those entries on port.
+    */
+   m_cfgFdbTable.getKeys(keys);
+
+   for (auto id : keys)
+   {
+       m_cfgFdbTable.get(id, entry);
+       for (auto i : entry)
+       {
+           if (fvField(i) == "port")
+           {
+               if (fvValue(i) == port)
+               {
+                   vector<FieldValueTuple> values;
+
+                   /* Get MAC and VLAN from key */
+                   vector <string> tokens = tokenize(id, delimiter, 1);
+
+                   /* tokens[0] is VLAN (Vlan20) and tokens[1] is mac (00:01:02:03:04:05). */
+                   values.push_back(FieldValueTuple("mac", tokens[1]));
+                   values.push_back(FieldValueTuple("Vlan", tokens[0]));
+                   m_fdbCfgNotificationProducer->send(op, port, values);
+               } 
+           }
+       }
+   }
+
+   return true;
+}
diff --git a/src/sonic-pac/paccfg/pac_authmgrcfg.h b/src/sonic-pac/paccfg/pac_authmgrcfg.h
new file mode 100644
index 000000000000..0d58a4a5e78a
--- /dev/null
+++ b/src/sonic-pac/paccfg/pac_authmgrcfg.h
@@ -0,0 +1,89 @@
+/*
+ * Copyright 2019 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _PAC_AUTHMGR_CFG_H
+#define _PAC_AUTHMGR_CFG_H
+
+#include <string.h>
+#include <swss/dbconnector.h>
+#include <swss/schema.h>
+#include <swss/table.h>
+#include <swss/macaddress.h>
+#include <swss/notificationproducer.h>
+#include <swss/subscriberstatetable.h>
+#include <swss/producerstatetable.h>
+#include <swss/table.h>
+#include <swss/select.h>
+#include <swss/timestamp.h>
+
+using namespace std;
+
+#define STATE_DB_SEPARATOR "|"
+#define CONFIG_DB_SEPARATOR "|"
+
+namespace swss {
+
+    class PacCfg {
+        public:
+            PacCfg(DBConnector *appDb, DBConnector *cfgDb, DBConnector *stateDb);
+            ~PacCfg();
+
+            /* Update learning mode of a port. */
+            bool intfLearningSet(std::string port, std::string learning);
+
+            /* Get learning mode of a port. */
+            bool intfLearningGet(std::string port, std::string *learning);
+
+            /* Acquire/Release port. */
+            bool intfAcquireSet(std::string port, bool acquire);
+
+            /* Block a client's traffic. */
+            bool intfClientBlock(std::string port, MacAddress mac, int vlan);
+
+            /* Add a static MAC entry. */
+            bool intfStaticMacAdd(std::string port, MacAddress mac, int vlan);
+
+            /* Add a static MAC entry. */
+            bool intfStaticMacRemove(std::string port, MacAddress mac, int vlan);
+
+            /* Clean up all static MAC entries. */
+            void intfStaticMacCleanup(void);
+
+            /* Flush FDB entries on a port. */
+            bool intfFdbFlush(std::string port);
+
+            /* Add MAC-VLAN translation config. */
+            bool intfMacVlanTranslationAdd(std::string port, MacAddress mac, int vlan);
+
+            /* Remove MAC-VLAN translation config. */
+            bool intfMacVlanTranslationRemove(std::string port, MacAddress mac, int vlan);
+
+            /* Send notification to FDB mgr. */
+            bool sendFdbNotification(std::string op, std::string port);
+
+        private:
+        /* Tables for writing config */
+        Table m_cfgFdbTable;
+        Table m_stateOperFdbTable;
+        Table m_stateOperPortTable;
+
+        std::shared_ptr<swss::NotificationProducer> m_flushFdb;
+        std::shared_ptr<swss::NotificationProducer> m_fdbCfgNotificationProducer;
+
+    };
+}
+
+#endif /* _PAC_AUTHMGR_CFG_H */
diff --git a/src/sonic-pac/paccfg/pac_cfg_authmgr.cpp b/src/sonic-pac/paccfg/pac_cfg_authmgr.cpp
new file mode 100644
index 000000000000..9e3a17993672
--- /dev/null
+++ b/src/sonic-pac/paccfg/pac_cfg_authmgr.cpp
@@ -0,0 +1,235 @@
+/*
+ * Copyright 2019 Broadcom. The term "Broadcom" refers to Broadcom Inc. and/or
+ * its subsidiaries.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "pac_cfg_authmgr.h"
+#include "pac_authmgrcfg.h"
+#include "datatypes.h"
+#include "auth_mgr_exports.h"
+#include "auth_mgr_mac_db.h"
+
+using namespace std;
+using namespace swss;
+
+DBConnector db("APPL_DB", 0);
+DBConnector cfgDb("CONFIG_DB", 0);
+DBConnector stateDb("STATE_DB", 0);
+
+PacCfg cfg(&db, &cfgDb, &stateDb);
+
+extern "C" {
+
+    RC_t pacCfgIntfLearningModeSet(char *interface,  AUTHMGR_PORT_LEARNING_t learning)
+    {
+        string port(interface);
+        string learning_mode;
+        bool status = false;
+        RC_t rc =  FAILURE;
+
+        if ( AUTHMGR_PORT_LEARNING_DISABLE == learning)
+        {
+            /* Drop all unknown source MAC packets. */
+            learning_mode = "drop";
+
+        }
+        else if ( AUTHMGR_PORT_LEARNING_CPU == learning)
+        {
+            /* Trap all unknown source MAC packets to CPU. */
+            learning_mode = "cpu_trap";
+        }
+        else if ( AUTHMGR_PORT_LEARNING_ENABLE == learning)
+        {
+            /* Enable learning on port. */
+            learning_mode = "hardware";
+        }
+
+        /* Configure port learning mode */
+        status = cfg.intfLearningSet(port, learning_mode);
+        if (status != false)
+        {
+            /* Flush FDB entries on port. */
+            status = cfg.intfFdbFlush(port); 
+        }
+
+        if (status == true)
+        {
+            rc =  SUCCESS;
+        }
+
+        return rc;
+    }
+
+    RC_t pacCfgIntfLearningModeGet(char *interface,  AUTHMGR_PORT_LEARNING_t *learning)
+    {
+        string port(interface);
+        string learning_mode;
+        bool status = false;
+        RC_t rc =  FAILURE;
+
+        status = cfg.intfLearningGet(port, &learning_mode);
+
+        if (status != false)
+        {
+            if (learning_mode == "enable")
+            {
+                *learning =  AUTHMGR_PORT_LEARNING_DISABLE;
+            }
+            else 
+            {
+                *learning =  AUTHMGR_PORT_LEARNING_ENABLE;
+            }
+        }
+        return rc;
+    }
+
+    RC_t pacCfgIntfAcquireSet(char *interface, bool acquire)
+    {
+        string port(interface);
+        RC_t rc =  SUCCESS;
+        
+        /* Configure port learning mode to CPU trap */
+        if (cfg.intfAcquireSet(port, acquire) != true)
+        {
+            rc =  FAILURE; 
+        }
+
+        return rc;
+    }
+
+    bool pacCfgIntfViolationPolicySet(char *interface, bool enable)
+    {
+        string port(interface);
+        string learning_mode("cpu_trap");
+
+        /* Violation policy consists of :
+         * 1) Policy to trap unknown source MAC packets to CPU.
+         * 2) Policy to trap static MAC move packets to CPU.
+         * SONiC implements this via:
+         * 1) Set learning mode of port to CPU trap.
+         * 2) Use a CoPP system trap for trapping static MAC move packets.
+         */
+
+        /* Configure port learning mode to CPU trap */
+        return cfg.intfLearningSet(port, learning_mode);
+    }
+
+    bool pacCfgIntfClientAdd(char *interface, unsigned char *macaddr, int vlan)
+    {
+        string port(interface);
+        bool status = false;
+        MacAddress mac(macaddr);
+
+        if (vlan != 0)
+        {
+            /* Client authorized on only 1 VLAN. 
+             * Delete static MAC entries added on any other VLAN for this MAC. 
+             */
+
+            /* Add specified MAC-VLAN pair as static MAC entry. */
+            status = cfg.intfStaticMacAdd(port, mac, vlan);
+
+            /* Client timeout logic. */
+
+            /* Configure MAC-VLAN translation for client on port. */
+            status = cfg.intfMacVlanTranslationAdd(port, mac, vlan);
+        }
+        else
+        {
+            /* Client authorized on all vlans. */
+           
+            /* Indicate to FDB mgr that this MAC needs to be added 
+             * on all VLANs that this port is a member of. 
+             */
+            
+            /* Client timeout logic. */
+        }
+      
+        return status;
+    }
+
+    bool pacCfgIntfClientRemove(char *interface, unsigned char *macaddr, int vlan)
+    {
+        bool status = false;
+        string port(interface);
+        MacAddress mac(macaddr);
+
+        if (vlan != 0)
+        {
+            /* MAC authorized on 1 VLAN, remove static FDB entry. */
+            status = cfg.intfStaticMacRemove(port, mac, vlan);
+
+            /* Remove MAC-VLAN translation configuration for the client. */
+            if (status != true)
+            {
+                status = cfg.intfMacVlanTranslationRemove(port, mac, vlan);
+            }
+        }
+        else
+        {
+            /* MAC authorized on all VLANs. Remove all configured static MAC-VLAN entries. */
+        }
+
+        return status;
+    }
+
+    void pacCfgIntfClientCleanup(void)
+    {
+       return cfg.intfStaticMacCleanup();
+    }
+
+    bool pacCfgIntfClientBlock(char *interface, unsigned char *macaddr, int vlan)
+    {
+        string port(interface);
+        MacAddress mac(macaddr);
+
+        /* Add the static MAC-VLAN pair with source and destination discard bits set. */
+        return cfg.intfClientBlock(port, mac, vlan);
+    }
+
+    bool pacCfgIntfClientUnblock(char *interface, unsigned char *macaddr, int vlan)
+    {
+        string port(interface);
+        MacAddress mac(macaddr);
+
+        /* Delete the added static MAC-VLAN pair. */
+        return cfg.intfStaticMacRemove(port, mac, vlan);
+    }
+
+    RC_t pacCfgFdbSendCfgNotification(authMgrFdbCfgType_t type, char *interface)
+    {
+        RC_t status =  SUCCESS;
+        string op = "SET";
+        vector<string> keys;
+        string port(interface);
+        string key;
+        
+        if (type ==  AUTHMGR_FDB_CFG_REMOVE)
+        {
+            op = "DEL";
+        }
+
+        /* Send a notification to get all MAC entries from 
+         * CONFIG_DB and configure on port (set/del).
+         */
+        if (cfg.sendFdbNotification(op, port) != true)
+        {
+           status =  FAILURE;         
+        }
+
+        return status;
+    }
+}
+
diff --git a/src/sonic-pac/paccfg/pac_cfg_authmgr.h b/src/sonic-pac/paccfg/pac_cfg_authmgr.h
new file mode 100644
index 000000000000..82c7eb9a19ed
--- /dev/null
+++ b/src/sonic-pac/paccfg/pac_cfg_authmgr.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright 2019 Broadcom. The term "Broadcom" refers to Broadcom Inc. and/or
+ * its subsidiaries.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifdef _PAC_CFG_AUTHMGR_H
+#define _PAC_CFG_AUTHMGR_H
+
+#include "pac_cfg.h"
+#include "pacinfra_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Set port learning config */
+RC_t pacCfgIntfLearningModeSet(char *interface,  AUTHMGR_PORT_LEARNING_t learning);
+
+/* Get port learning config */
+RC_t pacCfgIntfLearningModeGet(char *interface,  AUTHMGR_PORT_LEARNING_t *learning);
+
+/* Setup port learning config */
+bool pacCfgIntfViolationPolicySet(char *interface, bool enable);
+
+/* Add dot1x client */
+bool pacCfgIntfClientAdd(char *interface, unisgned char *m_mac, int vlan);
+
+/* Delete dot1x client */
+bool pacCfgIntfClientRemove(char *interface, unsigned char *m_mac, int vlan);
+
+/* Block a client's traffic while client is getting authorized */
+bool pacCfgIntfClientBlock(char *interface, unsigned char *m_mac, int vlan);
+
+/* Unblock a client's traffic */
+bool pacCfgIntfClientUnBlock(char *interface, unsigned char *m_mac, int vlan);
+
+/* Send a notification to remove/add static MAC entries on a port. */
+RC_t pacCfgFdbSendCfgNotification(authMgrFdbCfgType_t type, char *interface);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _PAC_CFG_AUTHMGR_H */
diff --git a/src/sonic-pac/paccfg/pac_cfg_vlan.cpp b/src/sonic-pac/paccfg/pac_cfg_vlan.cpp
new file mode 100644
index 000000000000..fc0f9c4f95b9
--- /dev/null
+++ b/src/sonic-pac/paccfg/pac_cfg_vlan.cpp
@@ -0,0 +1,158 @@
+/*
+ * Copyright 2019 Broadcom. The term "Broadcom" refers to Broadcom Inc. and/or
+ * its subsidiaries.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "pac_cfg_vlan.h"
+#include "pac_vlancfg.h"
+#include "datatypes.h"
+#include "auth_mgr_exports.h"
+#include "auth_mgr_vlan_db.h"
+#include "exec.h"
+
+using namespace std;
+using namespace swss;
+
+extern DBConnector db;
+extern DBConnector cfgDb;
+extern DBConnector stateDb;
+DBConnector asicDb("ASIC_DB", 0);
+DBConnector countersDb("COUNTERS_DB", 0);
+
+PacCfgVlan vcfg(&db, &cfgDb, &stateDb, &asicDb, &countersDb);
+
+extern "C" {
+
+    RC_t pacCfgPortPVIDSet(char *interface, int pvid)
+    {
+        string port(interface);
+        RC_t rc =  SUCCESS;
+
+        /* Set port PVID */
+        if (vcfg.portPVIDset(port, pvid) != true)
+        {
+          rc =  FAILURE; 
+        }
+
+        return rc;
+    }
+
+    RC_t pacCfgPortPVIDGet(char *interface, int *pvid)
+    {
+        string port(interface);
+        RC_t rc =  FAILURE;
+        
+        if (pvid ==  NULL)
+        {
+            return  FAILURE;
+        }
+
+        if (vcfg.portPVIDGet(port, pvid) != true)
+        {
+            rc =  FAILURE;
+        }
+
+        return rc;
+    }
+
+    RC_t pacCfgVlanMemberAdd(int vlan, char *interface, dot1qTaggingMode_t mode)
+    {
+        string port(interface);
+        RC_t rc =  SUCCESS;
+        string tagging_mode = "untagged";
+
+        if (mode ==  DOT1Q_MEMBER_TAGGED)
+        {
+          tagging_mode = "tagged";
+        }
+
+        /* Set VLAN membership */
+        if (vcfg.vlanMemberAdd(vlan, port, tagging_mode) != true)
+        {
+          rc =  FAILURE; 
+        }
+
+        return rc;
+    }
+
+    RC_t pacCfgVlanMemberRemove(int vlan, char *interface)
+    {
+        string port(interface);
+        RC_t rc =  SUCCESS;
+
+        /* Set VLAN membership */
+        if (vcfg.vlanMemberRemove(port, vlan) != true)
+        {
+          rc =  FAILURE; 
+        }
+
+        return rc;
+    }
+
+    RC_t pacCfgVlanMemberClean(int vlan)
+    {
+        RC_t rc =  SUCCESS;
+
+        if (vcfg.vlanMemberClean(vlan) != true)
+        {
+          rc =  FAILURE;
+        }
+
+        return rc;
+    }
+
+    RC_t pacCfgVlanSendCfgNotification(authMgrVlanPortCfgType_t type,
+                                          char *interface, authMgrVlanPortData_t *cfg)
+    {
+        string op = "SET";
+        vector<string> keys;
+        string key, mode;
+        int i = 0;
+        string port(interface);
+
+        if (cfg ==  NULLPTR)
+        {
+            return  FAILURE;
+        }
+
+        if (type ==  AUTHMGR_INTF_CFG_REMOVE)
+        {
+            op = "DEL";
+        }
+
+        /* Iterate over config and create keys to be handled */
+        for (i = 1; i <  DOT1Q_MAX_VLAN_ID; i++)
+        {
+            if ( VLAN_ISMASKBITSET(cfg->vlanMask, i))
+            {
+                mode = "untagged";
+                if ( VLAN_ISMASKBITSET(cfg->tagging, i))
+                {
+                  mode = "tagged";  
+                }
+                key = "Vlan" + to_string(i) + STATE_DB_SEPARATOR + mode;
+                keys.push_back(key);
+            }
+        }  
+  
+        if (vcfg.sendVlanNotification(op, port, keys) != true) 
+        {
+            return  FAILURE;
+        }
+
+        return  SUCCESS;
+    }
+}
+
diff --git a/src/sonic-pac/paccfg/pac_cfg_vlan.h b/src/sonic-pac/paccfg/pac_cfg_vlan.h
new file mode 100644
index 000000000000..49880866727e
--- /dev/null
+++ b/src/sonic-pac/paccfg/pac_cfg_vlan.h
@@ -0,0 +1,82 @@
+/*
+ * Copyright 2019 Broadcom. The term "Broadcom" refers to Broadcom Inc. and/or
+ * its subsidiaries.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifdef _PAC_CFG_VLAN_H
+#define _PAC_CFG_VLAN_H
+
+#include "pac_vlancfg.h"
+#include "pacinfra_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Set port PVID */
+RC_t pacCfgPortPVIDSet(char *interface, int pvid);
+
+/* Set port PVID */
+RC_t pacCfgPortPVIDGet(char *interface, int *pvid);
+
+/* Get port PVID */
+RC_t pacCfgPortPVIDGet(char *interface, int *pvid);
+
+/* Set port VLAN membership */
+RC_t pacCfgVlanMemberAdd(int vlan, char *interface, dot1qTaggingMode_t mode);
+
+/* Remove port VLAN membership */
+RC_t pacCfgVlanMemberRemove(int vlan, char *interface);
+
+/* Remove all port VLAN membership */
+RC_t pacCfgVlanMemberClean(int vlan);
+
+/* Add a dynamic VLAN */
+RC_t pacCfgVlanAdd(int vlan);
+
+/* Remove a dynamic VLAN */
+RC_t pacCfgVlanRemove(int vlan);
+
+/* Remove all dynamic VLAN */
+void pacCfgVlanCleanup(void);
+
+/* Add a reserved dynamic VLAN */
+RC_t pacCfgReservedVlanAdd(int vlan);
+
+/* Remove a reserved dynamic VLAN */
+RC_t pacCfgReservedVlanRemove(int vlan);
+
+/* Send a VLAN config notification to VLAN mgr */
+RC_t pacCfgVlanSendCfgNotification(authMgrVlanPortCfgType_t type,
+                                      char *interface, authMgrVlanPortData_t *cfg);
+
+/* Request for a Reserved VLAN */
+void pacCfgResvVlanAllocate(void);
+
+/* Release a Reserved VLAN */
+void pacCfgResvVlanRelease(int resvVlan);
+
+/* Check if VLAN is in reserved VLAN range. */
+bool pacCfgIsReserveVlan(int resvVlan);
+
+/* Check if VLAN is an L3 interface. */
+bool pacCfgIsL3VlanInterface(int vlan);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _PAC_CFG_VLAN_H */
diff --git a/src/sonic-pac/paccfg/pac_vlancfg.cpp b/src/sonic-pac/paccfg/pac_vlancfg.cpp
new file mode 100644
index 000000000000..d6385bffedbd
--- /dev/null
+++ b/src/sonic-pac/paccfg/pac_vlancfg.cpp
@@ -0,0 +1,163 @@
+/*
+ * Copyright 2019 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include <swss/logger.h>
+#include <swss/dbconnector.h>
+#include <swss/producerstatetable.h>
+#include <swss/macaddress.h>
+#include "pac_vlancfg.h"
+
+using namespace std;
+using namespace swss;
+
+// PAC SONIC config engine 
+PacCfgVlan::PacCfgVlan(DBConnector *db, DBConnector *cfgDb, DBConnector *stateDb,
+                       DBConnector *asicDb, DBConnector *countersDb) :
+    m_appPortTable(db, APP_PORT_TABLE_NAME),
+    m_stateOperPortTable(stateDb, STATE_OPER_PORT_TABLE_NAME),
+    m_cfgVlanTable(cfgDb, CFG_VLAN_TABLE_NAME),
+    m_cfgVlanMemberTable(cfgDb, CFG_VLAN_MEMBER_TABLE_NAME),
+    m_stateOperFdbTable(stateDb, STATE_OPER_FDB_TABLE_NAME),
+    m_stateOperVlanMemberTable(stateDb, STATE_OPER_VLAN_MEMBER_TABLE_NAME),
+    m_vlanStateTable(stateDb, STATE_VLAN_TABLE_NAME),
+    m_vlanMemberStateTable(stateDb, STATE_VLAN_MEMBER_TABLE_NAME),
+    m_countersPortNameMapTable(countersDb, COUNTERS_PORT_NAME_MAP),
+    m_appPacTable(db, APP_PAC_PORT_TABLE_NAME)
+{
+//    Logger::linkToDbNative("paccfgvlan");
+    SWSS_LOG_NOTICE("PAC: VLAN config object");
+
+    m_cfgDb  = cfgDb;
+    m_asicDb = asicDb;
+
+    /* Setup notification producer for VLAN notifications. */
+    m_vlanCfgNotificationProducer = std::make_shared<swss::NotificationProducer>(stateDb, "VLANCFG");
+}
+
+PacCfgVlan::~PacCfgVlan()
+{
+
+}
+
+bool PacCfgVlan::vlanMemberAdd(int vlan, string port, string tagging_mode)
+{
+   string key = VLAN_PREFIX + to_string(vlan) + STATE_DB_SEPARATOR + port;
+   vector<FieldValueTuple> fvs;
+
+   fvs.emplace_back("tagging_mode", tagging_mode);
+   m_stateOperVlanMemberTable.set(key, fvs);
+
+   return true;
+}
+
+bool PacCfgVlan::vlanMemberRemove(string port, int vlan)
+{
+   string key = VLAN_PREFIX + to_string(vlan) + STATE_DB_SEPARATOR + port;
+
+   // Remove port from VLAN. 
+   m_stateOperVlanMemberTable.del(key);
+
+   return true;
+}
+
+bool PacCfgVlan::vlanMemberClean(int vlan)
+{
+   vector<string> keys;
+   vector<FieldValueTuple> fvVector;
+   fvVector.emplace_back("learn_mode", "drop");
+   m_stateOperVlanMemberTable.getKeys(keys);
+   for (const auto key : keys)
+   {
+      unsigned pos = key.find(STATE_DB_SEPARATOR);
+      string  vlanStr = key.substr (0, pos);
+      string intfStr  = key.substr (pos+1);
+      if((VLAN_PREFIX + to_string(vlan)) == vlanStr)
+      {
+         // Remove port from VLAN after setting PVID back to zero.
+         m_stateOperVlanMemberTable.del(key);
+         m_stateOperPortTable.hdel(intfStr ,"pvid");
+         m_stateOperPortTable.hdel(intfStr ,"acquired");
+         m_stateOperPortTable.set(intfStr, fvVector);
+      }
+   }
+
+   return true;
+}
+
+bool PacCfgVlan::portPVIDset(string port, int pvid)
+{
+   string key(port);
+   vector<FieldValueTuple> fvVector;
+
+   fvVector.emplace_back("pvid", to_string(pvid));
+  
+   m_stateOperPortTable.set(key, fvVector);
+
+   return true;
+}
+
+bool PacCfgVlan::portPVIDGet(string port, int *pvid)
+{
+    string portOid;
+    std::unordered_map<string, string>::iterator it;
+
+    if (pvid == NULL)
+    {
+        return false;
+    }
+
+    *pvid = 0;
+  
+    /* Get the port OID for COUNTERS_DB. */
+    if (m_countersPortNameMapTable.hget("", port, portOid) != true)
+    {
+        return false;
+    }
+
+    /* Port PVID from ASIC_DB */
+    auto fieldValues = m_asicDb->hgetall("ASIC_STATE:SAI_OBJECT_TYPE_PORT:"+portOid);
+    for (it = fieldValues.begin(); it != fieldValues.end(); it++)
+    {
+        if ((it->first) == "SAI_PORT_ATTR_PORT_VLAN_ID")
+        {
+            try
+            {
+                *pvid = stoi(it->second);
+            }
+            catch (...)
+            {
+                SWSS_LOG_WARN("Invalid value:%s for SAI_PORT_ATTR_PORT_VLAN_ID", (it->second).c_str());
+            }
+        }
+    }
+
+    return true;
+}
+
+bool PacCfgVlan::sendVlanNotification(string op, string port, vector<string> keys)
+{
+   vector<FieldValueTuple> values;
+
+   for (vector<string>::iterator it = keys.begin();
+                                 it != keys.end(); ++it)
+   {
+       FieldValueTuple tuple("Vlan|tagging_mode", *it);
+       values.push_back(tuple);
+   }
+
+   m_vlanCfgNotificationProducer->send(op, port, values);
+   return true;
+}
+
diff --git a/src/sonic-pac/paccfg/pac_vlancfg.h b/src/sonic-pac/paccfg/pac_vlancfg.h
new file mode 100644
index 000000000000..e5fbaec83ee4
--- /dev/null
+++ b/src/sonic-pac/paccfg/pac_vlancfg.h
@@ -0,0 +1,88 @@
+/*
+ * Copyright 2019 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _PAC_VLAN_CFG_H
+#define _PAC_VLAN_CFG_H
+
+#include <string>
+#include <swss/dbconnector.h>
+#include <swss/schema.h>
+#include <swss/table.h>
+#include <swss/macaddress.h>
+#include <swss/notificationproducer.h>
+#include <swss/subscriberstatetable.h>
+#include <swss/producerstatetable.h>
+#include <swss/table.h>
+#include <swss/select.h>
+#include <swss/timestamp.h>
+
+using namespace std;
+
+#define STATE_DB_SEPARATOR  "|"
+#define CONFIG_DB_SEPARATOR "|"
+#define PAC_INTERNAL_VLAN  4095
+
+namespace swss {
+
+    class PacCfgVlan {
+        public:
+            PacCfgVlan(DBConnector *appDb, DBConnector *cfgDb, DBConnector *stateDb,
+                       DBConnector *asicDb, DBConnector *countersDb);
+            ~PacCfgVlan();
+
+            /* Add a port to a VLAN. */
+            bool vlanMemberAdd(int vlan, std::string port, std::string tagging_mode);
+
+            /* Remove port from VLAN. */
+            bool vlanMemberRemove(std::string port, int vlan);
+
+            bool vlanMemberClean(int vlan);
+
+            /* Set port PVID. */
+            bool portPVIDset(std::string port, int pvid);
+
+            /* Get port PVID. */
+            bool portPVIDGet(std::string port, int *pvid);
+
+            /* Check if port exists */
+            bool portCheckValid(std::string port);
+
+            /* Send notification to VLAN mgr for VLAN config. */
+            bool sendVlanNotification(std::string op, std::string port, vector<std::string> keys);
+
+        private:
+        /* Tables for writing config */
+        Table m_appPortTable;
+        Table m_stateOperPortTable;
+        Table m_cfgVlanTable;
+        Table m_cfgVlanMemberTable;
+        Table m_stateOperFdbTable;
+        Table m_stateOperVlanMemberTable;
+        Table m_vlanStateTable;
+        Table m_vlanMemberStateTable;
+        Table m_countersPortNameMapTable;
+
+        ProducerStateTable m_appPacTable;
+        std::shared_ptr<swss::NotificationProducer> m_vlanCfgNotificationProducer;
+        std::shared_ptr<swss::NotificationProducer> m_resvVlanNotificationProducer;
+
+        DBConnector *m_cfgDb;
+        DBConnector *m_asicDb;
+
+    };
+}
+
+#endif /* _PAC_VLAN_CFG_ */

From dfc9b30539e328cccafb942dd32b287303b07658 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 26 Oct 2024 19:01:07 +0800
Subject: [PATCH 145/364] [submodule] Update submodule sonic-platform-common to
 the latest HEAD automatically (#20624)

#### Why I did it
src/sonic-platform-common
```
* 7268fad - (HEAD -> master, origin/master, origin/HEAD) [SmartSwitch] Add a new API for the DPU chassis to query dataplane and midplane states (#509) (7 hours ago) [Oleksandr Ivantsiv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 912ceb34c8a3..7268fad2c220 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 912ceb34c8a352b235ad77ea07778c4779a5bd4a
+Subproject commit 7268fad2c220bdcca2f22bfb080f15f078d5fa8f

From e958af1a2e28527e4c442cb75bc881f957cea3b8 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 27 Oct 2024 19:27:12 +0800
Subject: [PATCH 146/364] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#20609)

#### Why I did it
src/sonic-platform-daemons
```
* f169f86 - (HEAD -> master, origin/master, origin/HEAD) Move DomInfoUpdateTask class to a separate file (#552) (2 days ago) [mihirpat1]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 5d827af7a92e..f169f86a2cd7 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 5d827af7a92ec4bc0960cc708f7a71582122eeb4
+Subproject commit f169f86a2cd7f4f4ebf69f7b9d972824790d0080

From 40d9f7a94c0db6f9322a63e8bca83f40b22cd9b0 Mon Sep 17 00:00:00 2001
From: Tomer Shalvi <116184476+tshalvi@users.noreply.github.com>
Date: Sun, 27 Oct 2024 15:30:37 +0200
Subject: [PATCH 147/364] Module detection flow update to tag copper passive
 cables as software control (#19476)

- Why I did it
On Mellanox platforms, currently only CMIS active ports can be controlled by the SW, and all copper modules are controlled by FW.
We want to let Sonic control passive copper modules as well, for CMIS and SFF (sff8636 and sff8436).

- How I did it
I updated the module detection flow to tag CMIS and SFF passive modules as SW control.

- How to verify it
Manual tests.
---
 platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index ddaa60d2860e..e2c6d63dc7a3 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -1053,7 +1053,10 @@ def is_supported_for_software_control(self, xcvr_api):
         Returns:
             bool: True if the api object supports software control
         """
-        return self.is_cmis_api(xcvr_api) and not xcvr_api.is_flat_memory()
+        if xcvr_api.is_flat_memory():
+            return self.is_cmis_api(xcvr_api) or self.is_sff_api(xcvr_api)
+        else:
+            return self.is_cmis_api(xcvr_api)
 
     def check_power_capability(self):
         """Check module max power with cage power limit

From 47aa38c8ef31b42a7f5b8555c0ad410f52232b29 Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Sun, 27 Oct 2024 23:46:33 +0800
Subject: [PATCH 148/364] Enable runtime config log level (#19611)

HLD link: sonic-net/SONiC#1522

- Why I did it
SONiC provides two Python logger implementations: sonic_py_common.logger.Logger and sonic_py_common.syslogger.SysLogger. Both of them do not provide the ability to change log level at real time. Sometimes, in order to get more debug information, developer has to manually change the log level in code on a running switch and restart the Python daemon. This is not convenient.

SONiC also provides a C/C++ logger implementation in sonic-platform-common.common.logger.cpp. This C/C++ logger implementation is also a wrapper of Linux standard syslog which is widely used by swss/syncd. It provides the ability to set log level on fly by starting a thread to listen to CONFIG DB LOGGER table change. SONiC infrastructure also provides the Python wrapper for sonic-platform-common.common.logger.cpp which is swsscommon.Logger. However, this logger implementation also has some drawbacks:

swsscommon.Logger assumes redis DB is ready to connect. This is a valid assumption for swss/syncd. But it is not good for a Python logger implementation because some Python script may be called before redis server starting.
swsscommon.Logger wraps Linux syslog which only support single log identifier for a daemon.
So, swsscommon.Logger is not an option too.

This PR is a Python logger enhancement which allows user setting log level at run time.

- How I did it
swsscommon.Logger depends on a thread to listen to CONFIG DB LOGGER table change. It refreshes log level for each logger instances once the thread detects a DB entry change. A thread is considered heavy in a python script, especially that there are many short and simple python scripts which also use logger. To keep python logger light weight, it uses a different design than swsscommon.Logger:

A class level logger registry shall be added to SysLoggerclass
Each logger instance shall register itself to logger register if enables runtime configuration
Logger configuration shall be refreshed by CLI which send a SIGHUP signal to the daemon

- How to verify it
Manual test
New unit test cases
---
 .../sonic_py_common/daemon_base.py            |  4 +-
 .../sonic_py_common/syslogger.py              | 80 ++++++++++++++++++-
 src/sonic-py-common/tests/test_syslogger.py   | 57 +++++++++++++
 3 files changed, 135 insertions(+), 6 deletions(-)

diff --git a/src/sonic-py-common/sonic_py_common/daemon_base.py b/src/sonic-py-common/sonic_py_common/daemon_base.py
index 8bfd09cd881d..fd98a12b28e2 100644
--- a/src/sonic-py-common/sonic_py_common/daemon_base.py
+++ b/src/sonic-py-common/sonic_py_common/daemon_base.py
@@ -35,10 +35,10 @@ def db_connect(db_name, namespace=EMPTY_NAMESPACE):
 
 
 class DaemonBase(Logger):
-    def __init__(self, log_identifier, use_syslogger=True):
+    def __init__(self, log_identifier, use_syslogger=True, enable_runtime_log_config=False):
         super().__init__()
         if use_syslogger:
-            self.logger_instance = SysLogger(log_identifier)
+            self.logger_instance = SysLogger(log_identifier, enable_runtime_config=enable_runtime_log_config)
         else:
             self.logger_instance = Logger(
                 log_identifier=log_identifier,
diff --git a/src/sonic-py-common/sonic_py_common/syslogger.py b/src/sonic-py-common/sonic_py_common/syslogger.py
index c45f0cde8425..3d5449642cc4 100644
--- a/src/sonic-py-common/sonic_py_common/syslogger.py
+++ b/src/sonic-py-common/sonic_py_common/syslogger.py
@@ -4,6 +4,11 @@
 import socket
 import sys
 
+CONFIG_DB = 'CONFIG_DB'
+FIELD_LOG_LEVEL = 'LOGLEVEL'
+FIELD_REQUIRE_REFRESH = 'require_manual_refresh'
+
+
 # customize python logging to support notice logger
 logging.NOTICE = logging.INFO + 1
 logging.addLevelName(logging.NOTICE, "NOTICE")
@@ -18,12 +23,11 @@ class SysLogger:
     DEFAULT_LOG_FACILITY = SysLogHandler.LOG_USER
     DEFAULT_LOG_LEVEL = logging.NOTICE
 
-    def __init__(self, log_identifier=None, log_facility=DEFAULT_LOG_FACILITY, log_level=DEFAULT_LOG_LEVEL):
-        if log_identifier is None:
-            log_identifier = os.path.basename(sys.argv[0])
+    def __init__(self, log_identifier=None, log_facility=DEFAULT_LOG_FACILITY, log_level=DEFAULT_LOG_LEVEL, enable_runtime_config=False):
+        self.log_identifier = log_identifier if log_identifier else os.path.basename(sys.argv[0]) 
 
         # Initialize SysLogger
-        self.logger = logging.getLogger(log_identifier)
+        self.logger = logging.getLogger(self.log_identifier)
 
         # Reset all existing handlers
         for handler in self.logger.handlers[:]:
@@ -35,6 +39,74 @@ def __init__(self, log_identifier=None, log_facility=DEFAULT_LOG_FACILITY, log_l
         self.logger.addHandler(handler)
 
         self.set_min_log_priority(log_level)
+        
+        if enable_runtime_config:
+            self.update_log_level()
+                            
+    def update_log_level(self):
+        """Refresh log level.
+
+        Returns:
+            tuple: (refresh result, fail reason)
+        """        
+        from swsscommon import swsscommon
+        try:
+            config_db = swsscommon.SonicV2Connector(use_unix_socket_path=True)
+            config_db.connect(CONFIG_DB)
+            log_level_in_db = config_db.get(CONFIG_DB, f'{swsscommon.CFG_LOGGER_TABLE_NAME}|{self.log_identifier}', FIELD_LOG_LEVEL)
+            if log_level_in_db:
+                self.set_min_log_priority(self.log_priority_from_str(log_level_in_db))
+            else:
+                data = {
+                    FIELD_LOG_LEVEL: self.log_priority_to_str(self._min_log_level),
+                    FIELD_REQUIRE_REFRESH: 'true'
+                }
+                config_db.hmset(CONFIG_DB, f'{swsscommon.CFG_LOGGER_TABLE_NAME}|{self.log_identifier}', data)
+            return True, ''
+        except Exception as e:
+            return False, f'Failed to refresh log configuration - {e}'
+
+    def log_priority_to_str(self, priority):
+        """Convert log priority to string.
+        Args:
+            priority (int): log priority.
+        Returns:
+            str: log priority in string.
+        """
+        if priority == logging.INFO:
+            return 'INFO'
+        elif priority == logging.NOTICE:
+            return 'NOTICE'
+        elif priority == logging.DEBUG:
+            return 'DEBUG'
+        elif priority == logging.WARNING:
+            return 'WARN'
+        elif priority == logging.ERROR:
+            return 'ERROR'
+        else:
+            self.log_error(f'Invalid log priority: {priority}')
+            return 'WARN'
+
+    def log_priority_from_str(self, priority_in_str):
+        """Convert log priority from string.
+        Args:
+            priority_in_str (str): log priority in string.
+        Returns:
+            _type_: log priority.
+        """
+        if priority_in_str == 'DEBUG':
+            return logging.DEBUG
+        elif priority_in_str == 'INFO':
+            return logging.INFO
+        elif priority_in_str == 'NOTICE':
+            return logging.NOTICE
+        elif priority_in_str == 'WARN':
+            return logging.WARNING
+        elif priority_in_str == 'ERROR':
+            return logging.ERROR
+        else:
+            self.log_error(f'Invalid log priority string: {priority_in_str}')
+            return logging.WARNING
 
     def set_min_log_priority(self, priority):
         """
diff --git a/src/sonic-py-common/tests/test_syslogger.py b/src/sonic-py-common/tests/test_syslogger.py
index 359120163b3f..35e0fd058606 100644
--- a/src/sonic-py-common/tests/test_syslogger.py
+++ b/src/sonic-py-common/tests/test_syslogger.py
@@ -32,3 +32,60 @@ def test_notice_log(self, capsys):
         log.log_notice('this is a message')
         captured = capsys.readouterr() 
         assert 'NOTICE' in captured.out
+
+    def test_basic(self):
+        log = syslogger.SysLogger()
+        log.logger.log = mock.MagicMock()
+        log.log_error('error message')
+        log.log_warning('warning message')
+        log.log_notice('notice message')
+        log.log_info('info message')
+        log.log_debug('debug message')
+        log.log(logging.ERROR, 'error msg', also_print_to_console=True)
+
+    def test_log_priority(self):
+        log = syslogger.SysLogger()
+        log.set_min_log_priority(logging.ERROR)
+        assert log.logger.level == logging.ERROR
+
+    def test_log_priority_from_str(self):
+        log = syslogger.SysLogger()
+        assert log.log_priority_from_str('ERROR') == logging.ERROR
+        assert log.log_priority_from_str('INFO') == logging.INFO
+        assert log.log_priority_from_str('NOTICE') == logging.NOTICE
+        assert log.log_priority_from_str('WARN') == logging.WARN
+        assert log.log_priority_from_str('DEBUG') == logging.DEBUG
+        assert log.log_priority_from_str('invalid') == logging.WARN
+
+    def test_log_priority_to_str(self):
+        log = syslogger.SysLogger()
+        assert log.log_priority_to_str(logging.NOTICE) == 'NOTICE'
+        assert log.log_priority_to_str(logging.INFO) == 'INFO'
+        assert log.log_priority_to_str(logging.DEBUG) == 'DEBUG'
+        assert log.log_priority_to_str(logging.WARN) == 'WARN'
+        assert log.log_priority_to_str(logging.ERROR) == 'ERROR'
+        assert log.log_priority_to_str(-1) == 'WARN'
+
+    @mock.patch('swsscommon.swsscommon.SonicV2Connector')
+    def test_runtime_config(self, mock_connector):
+        mock_db = mock.MagicMock()
+        mock_db.get = mock.MagicMock(return_value='DEBUG')
+        mock_connector.return_value = mock_db
+        log = syslogger.SysLogger(log_identifier='log1', enable_runtime_config=True, log_level=logging.INFO)
+        assert log.logger.level == logging.DEBUG
+
+        mock_db.get.return_value = 'ERROR'
+        ret, msg = log.update_log_level()
+        assert ret
+        assert not msg
+
+    @mock.patch('swsscommon.swsscommon.SonicV2Connector')
+    def test_runtime_config_negative(self, mock_connector):
+        mock_db = mock.MagicMock()
+        mock_db.get = mock.MagicMock(side_effect=Exception(''))
+        mock_connector.return_value = mock_db
+        log = syslogger.SysLogger(log_identifier='log', enable_runtime_config=True)
+
+        ret, msg = log.update_log_level()
+        assert not ret
+        assert msg

From 186e9ac28957b6f6d3770d391a729b1ce48650c8 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Sun, 27 Oct 2024 08:47:32 -0700
Subject: [PATCH 149/364] [Nvidia-bluefield] Update SAI to SAIBuild0.0.36.0,
 SDK/FW to v24.10-RC2/v32.42.1000, BFSoC to 4.9.0 (#20565)

- Why I did it
To include latest fixes and new functionality

- How I did it
SDK_VERSION 24.7-RC4 -> 24.10-RC2
FW_VERSION 32.41.1000 -> 32.42.1000
SAI_VERSION SAIBuild0.0.32.0 -> SAIBuild0.0.36.0
BFSOC_VERSION: 4.7.0 -> 4.9.0

- How to verify it
Build an image and run tests from "sonic-mgmt".
---
 platform/nvidia-bluefield/recipes/bluefield-soc.mk | 4 ++--
 platform/nvidia-bluefield/recipes/dpu-sai.mk       | 2 +-
 platform/nvidia-bluefield/recipes/fw.mk            | 2 +-
 platform/nvidia-bluefield/recipes/sdk.mk           | 2 +-
 4 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/platform/nvidia-bluefield/recipes/bluefield-soc.mk b/platform/nvidia-bluefield/recipes/bluefield-soc.mk
index dc256b6b6c11..2b6a5c64fdc9 100644
--- a/platform/nvidia-bluefield/recipes/bluefield-soc.mk
+++ b/platform/nvidia-bluefield/recipes/bluefield-soc.mk
@@ -16,8 +16,8 @@
 #
 
 # Bluefied Software Distribution Version
-BFSOC_VERSION = 4.7.0
-BFSOC_REVISION = 13127
+BFSOC_VERSION = 4.9.0
+BFSOC_REVISION = 13347
 BFB_IMG_TYPE = prod
 BFSOC_BUILD_DATE =
 
diff --git a/platform/nvidia-bluefield/recipes/dpu-sai.mk b/platform/nvidia-bluefield/recipes/dpu-sai.mk
index 706fd6d65c4e..533a22ea8ffe 100644
--- a/platform/nvidia-bluefield/recipes/dpu-sai.mk
+++ b/platform/nvidia-bluefield/recipes/dpu-sai.mk
@@ -15,7 +15,7 @@
 # limitations under the License.
 #
 
-DPU_SAI_VERSION = SAIBuild0.0.32.0
+DPU_SAI_VERSION = SAIBuild0.0.36.0
 
 # Place here URL where SAI sources exist
 DPU_SAI_SOURCE_BASE_URL=
diff --git a/platform/nvidia-bluefield/recipes/fw.mk b/platform/nvidia-bluefield/recipes/fw.mk
index 344ed49b18b3..9d45d327fcfd 100644
--- a/platform/nvidia-bluefield/recipes/fw.mk
+++ b/platform/nvidia-bluefield/recipes/fw.mk
@@ -17,7 +17,7 @@
 
 BF3_FW_BASE_URL =
 
-BF3_FW_VERSION = 32.41.1000
+BF3_FW_VERSION = 32.42.1000
 
 BF3_FW_FILE = fw-BlueField-3-rel-$(subst .,_,$(BF3_FW_VERSION)).mfa
 
diff --git a/platform/nvidia-bluefield/recipes/sdk.mk b/platform/nvidia-bluefield/recipes/sdk.mk
index fbe53fddde64..71e3a024d9f4 100644
--- a/platform/nvidia-bluefield/recipes/sdk.mk
+++ b/platform/nvidia-bluefield/recipes/sdk.mk
@@ -19,7 +19,7 @@ SDK_BASE_PATH = $(PLATFORM_PATH)/sdk-src/sonic-bluefield-packages/bin
 
 # Place here URL where SDK sources exist
 SDK_SOURCE_BASE_URL =
-SDK_VERSION = 24.7-RC4
+SDK_VERSION = 24.10-RC2
 
 SDK_COLLECTX_URL = https://linux.mellanox.com/public/repo/doca/1.5.2/debian12/aarch64/
 

From a5a9dacad7fadd7fdd064858f2a586424ad4f766 Mon Sep 17 00:00:00 2001
From: Chris <156943338+ccroy-arista@users.noreply.github.com>
Date: Sun, 27 Oct 2024 20:57:11 -0700
Subject: [PATCH 150/364] sonic-buildimage: rename qsp 128x400g to o128s2, fix
 lane map typo (#20580)

* sonic-buildimage: rename qsp 128x400g to o128s2

In keeping with normative convention, renaming the hwsku
folders for qsp/qspr from 128x400G to O128S2.

* sonic-buildimage: fix qsp-o128s2 port_config typo

There is a typo in the lanes used for
Ethernet356 within port_config.ini, where lanes
381 and 382 appear twice instead of being
followed by the intended 383 and 384.
This change fixes that typo.

This exact typo is not present in the other
hwskus under x86_64-arista_7060x6_64pe or
x86_64-arista_7060x6_64de.
---
 .../BALANCED                                                    | 0
 .../buffer_ports.j2                                             | 0
 .../buffers.json.j2                                             | 0
 .../buffers_defaults_t0.j2                                      | 0
 .../buffers_defaults_t1.j2                                      | 0
 .../hwsku.json                                                  | 0
 .../pg_profile_lookup.ini                                       | 0
 .../port_config.ini                                             | 2 +-
 .../qos.json.j2                                                 | 0
 .../sai.profile                                                 | 0
 .../th5-a7060x6-64pe.config.bcm                                 | 0
 11 files changed, 1 insertion(+), 1 deletion(-)
 rename device/arista/x86_64-arista_7060x6_64pe/{Arista-7060X6-64PE-128x400G => Arista-7060X6-64PE-O128S2}/BALANCED (100%)
 rename device/arista/x86_64-arista_7060x6_64pe/{Arista-7060X6-64PE-128x400G => Arista-7060X6-64PE-O128S2}/buffer_ports.j2 (100%)
 rename device/arista/x86_64-arista_7060x6_64pe/{Arista-7060X6-64PE-128x400G => Arista-7060X6-64PE-O128S2}/buffers.json.j2 (100%)
 rename device/arista/x86_64-arista_7060x6_64pe/{Arista-7060X6-64PE-128x400G => Arista-7060X6-64PE-O128S2}/buffers_defaults_t0.j2 (100%)
 rename device/arista/x86_64-arista_7060x6_64pe/{Arista-7060X6-64PE-128x400G => Arista-7060X6-64PE-O128S2}/buffers_defaults_t1.j2 (100%)
 rename device/arista/x86_64-arista_7060x6_64pe/{Arista-7060X6-64PE-128x400G => Arista-7060X6-64PE-O128S2}/hwsku.json (100%)
 rename device/arista/x86_64-arista_7060x6_64pe/{Arista-7060X6-64PE-128x400G => Arista-7060X6-64PE-O128S2}/pg_profile_lookup.ini (100%)
 rename device/arista/x86_64-arista_7060x6_64pe/{Arista-7060X6-64PE-128x400G => Arista-7060X6-64PE-O128S2}/port_config.ini (99%)
 rename device/arista/x86_64-arista_7060x6_64pe/{Arista-7060X6-64PE-128x400G => Arista-7060X6-64PE-O128S2}/qos.json.j2 (100%)
 rename device/arista/x86_64-arista_7060x6_64pe/{Arista-7060X6-64PE-128x400G => Arista-7060X6-64PE-O128S2}/sai.profile (100%)
 rename device/arista/x86_64-arista_7060x6_64pe/{Arista-7060X6-64PE-128x400G => Arista-7060X6-64PE-O128S2}/th5-a7060x6-64pe.config.bcm (100%)

diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/BALANCED b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/BALANCED
similarity index 100%
rename from device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/BALANCED
rename to device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/BALANCED
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffer_ports.j2
similarity index 100%
rename from device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffer_ports.j2
rename to device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffer_ports.j2
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffers.json.j2
similarity index 100%
rename from device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffers.json.j2
rename to device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffers.json.j2
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffers_defaults_t0.j2
similarity index 100%
rename from device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffers_defaults_t0.j2
rename to device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffers_defaults_t0.j2
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffers_defaults_t1.j2
similarity index 100%
rename from device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffers_defaults_t1.j2
rename to device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/buffers_defaults_t1.j2
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/hwsku.json b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/hwsku.json
similarity index 100%
rename from device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/hwsku.json
rename to device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/hwsku.json
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/pg_profile_lookup.ini
similarity index 100%
rename from device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/pg_profile_lookup.ini
rename to device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/pg_profile_lookup.ini
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/port_config.ini
similarity index 99%
rename from device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/port_config.ini
rename to device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/port_config.ini
index 4fee0c95baef..688ae29c1261 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/port_config.ini
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/port_config.ini
@@ -88,7 +88,7 @@ Ethernet340  325,326,327,328                  Ethernet43/5  43     400000  rs
 Ethernet344  337,338,339,340                  Ethernet44/1  44     400000  rs
 Ethernet348  341,342,343,344                  Ethernet44/5  44     400000  rs
 Ethernet352  377,378,379,380                  Ethernet45/1  45     400000  rs
-Ethernet356  381,382,381,382                  Ethernet45/5  45     400000  rs
+Ethernet356  381,382,383,384                  Ethernet45/5  45     400000  rs
 Ethernet360  361,362,363,364                  Ethernet46/1  46     400000  rs
 Ethernet364  365,366,367,368                  Ethernet46/5  46     400000  rs
 Ethernet368  353,354,355,356                  Ethernet47/1  47     400000  rs
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/qos.json.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/qos.json.j2
similarity index 100%
rename from device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/qos.json.j2
rename to device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/qos.json.j2
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/sai.profile b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/sai.profile
similarity index 100%
rename from device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/sai.profile
rename to device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/sai.profile
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/th5-a7060x6-64pe.config.bcm
similarity index 100%
rename from device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm
rename to device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/th5-a7060x6-64pe.config.bcm

From d6d8c579c813bfeab7f1cdbb2ea7bc0f5a2b4042 Mon Sep 17 00:00:00 2001
From: vdahiya12 <67608553+vdahiya12@users.noreply.github.com>
Date: Tue, 29 Oct 2024 11:05:04 -0700
Subject: [PATCH 151/364] [yang] add Yang model for XCVRD_LOG|Y_CABLE (#20496)

#### Why I did it


Adding yang model for CONFIG_DB table XCVRD_LOG|Y_CABLE.
Introduced by
https://github.com/sonic-net/sonic-utilities/blob/master/config/muxcable.py#L1230-L1235

#### How I did it
Added the changes in sonic-yang-models
#### How to verify it
UT test

```
==================================================================================== test session starts ====================================================================================
platform linux -- Python 3.9.2, pytest-6.0.2, py-1.10.0, pluggy-0.13.0
rootdir: /sonic/src/sonic-yang-models
plugins: pyfakefs-5.2.3, cov-2.10.1
collected 3 items

tests/test_sonic_yang_models.py ..                                                                                                                                                    [ 66%]
tests/yang_model_tests/test_yang_model.py .                                                                                                                                           [100%]

===================================================================================== 3 passed in 2.06s =====================================================================================
```
---
 src/sonic-yang-models/doc/Configuration.md    |  1 +
 src/sonic-yang-models/setup.py                |  1 +
 .../tests/files/sample_config_db.json         |  5 +++
 .../yang_model_tests/tests/xcvrd-log.json     |  5 +++
 .../tests_config/xcvrd-log.json               | 12 ++++++
 .../yang-models/sonic-xcvrd-log.yang          | 41 +++++++++++++++++++
 6 files changed, 65 insertions(+)
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests/xcvrd-log.json
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests_config/xcvrd-log.json
 create mode 100644 src/sonic-yang-models/yang-models/sonic-xcvrd-log.yang

diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index 4d264417d509..4ebae55c3ea2 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -86,6 +86,7 @@ Table of Contents
          * [Virtual router](#virtual-router)
          * [LOGGER](#logger)
          * [WRED_PROFILE](#wred_profile)
+         * [XCVRD_LOG](#xcvrd_log)
          * [PASSWORD_HARDENING](#password_hardening)
          * [SSH_SERVER](#ssh_server)
          * [SYSTEM_DEFAULTS table](#systemdefaults-table)
diff --git a/src/sonic-yang-models/setup.py b/src/sonic-yang-models/setup.py
index 420dd36a24ca..5e130854eeba 100644
--- a/src/sonic-yang-models/setup.py
+++ b/src/sonic-yang-models/setup.py
@@ -203,6 +203,7 @@ def run(self):
                          './yang-models/sonic-macsec.yang',
                          './yang-models/sonic-bgp-sentinel.yang',
                          './yang-models/sonic-bmp.yang',
+                         './yang-models/sonic-xcvrd-log.yang',
                          './yang-models/sonic-serial-console.yang',
                          './yang-models/sonic-smart-switch.yang',]),
         ('cvlyang-models', ['./cvlyang-models/sonic-acl.yang',
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index d58849dd04eb..a9ab004008b6 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -2744,6 +2744,11 @@
                 "midplane_interface": "dpu1"
             }
         },
+	"XCVRD_LOG": {
+	    "Y_CABLE": {
+		"log_verbosity": "notice"
+	    }
+	},
         "BANNER_MESSAGE": {
             "global": {
                 "state": "enabled",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/xcvrd-log.json b/src/sonic-yang-models/tests/yang_model_tests/tests/xcvrd-log.json
new file mode 100644
index 000000000000..19b85bad5ee5
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/xcvrd-log.json
@@ -0,0 +1,5 @@
+{
+    "XCVRD_LOG_Y_CABLE_CHANGE_VERBOSITY_LEVEL": {
+        "desc": "Consume verbosity level config changes. "
+    }
+}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/xcvrd-log.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/xcvrd-log.json
new file mode 100644
index 000000000000..9135a43198b5
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/xcvrd-log.json
@@ -0,0 +1,12 @@
+{
+    "XCVRD_LOG_Y_CABLE_CHANGE_VERBOSITY_LEVEL": {
+        "sonic-xcvrd-log:sonic-xcvrd-log": {
+            "sonic-xcvrd-log:XCVRD_LOG": {
+                "sonic-xcvrd-log:Y_CABLE": 
+                    {
+                        "log_verbosity": "debug"
+                    }
+            }
+        }
+    }
+}
diff --git a/src/sonic-yang-models/yang-models/sonic-xcvrd-log.yang b/src/sonic-yang-models/yang-models/sonic-xcvrd-log.yang
new file mode 100644
index 000000000000..5d7c8866c6ed
--- /dev/null
+++ b/src/sonic-yang-models/yang-models/sonic-xcvrd-log.yang
@@ -0,0 +1,41 @@
+module sonic-xcvrd-log {
+    namespace "http://github.com/sonic-net/sonic-xcvrd-log";
+    prefix xcvrd_log;
+    yang-version 1.1;
+
+    organization
+        "SONiC";
+
+    contact
+        "SONiC";
+
+    description
+        "SONiC DualToR xcvrd logging configuration data";
+
+    revision 2024-10-14 {
+        description
+            "Initial revision";
+    }
+
+    container sonic-xcvrd-log {
+
+        container XCVRD_LOG {
+
+            container Y_CABLE {
+
+                leaf log_verbosity {
+                    type enumeration {
+                        enum info;
+                        enum notice;
+                        enum debug;
+                        enum warning;
+                        enum critical;
+                    }
+
+                    description "xcvrd log verbosity level. ";
+
+                }
+            }
+        }
+    }
+}

From cc4a40258b6624677c1f27266c8ea241cfd2b8ae Mon Sep 17 00:00:00 2001
From: Vijaya Kumar Abbaraju <vijaya-kumar.abbaraju@broadcom.com>
Date: Wed, 30 Oct 2024 00:03:49 +0530
Subject: [PATCH 152/364] MAB common header files for generic files (#18626)

* MAB common header files for genereic files

* Addressed review comments
---
 src/sonic-pac/mab/mapping/include/mab_cfg.h   |  64 +++
 .../mab/mapping/include/mab_client.h          |  92 ++++
 .../mab/mapping/include/mab_control.h         | 397 ++++++++++++++++++
 src/sonic-pac/mab/mapping/include/mab_debug.h |  48 +++
 src/sonic-pac/mab/mapping/include/mab_ih.h    |  41 ++
 .../mab/mapping/include/mab_include.h         |  66 +++
 .../mab/mapping/include/mab_socket.h          |  34 ++
 .../mab/mapping/include/mab_struct.h          |  95 +++++
 8 files changed, 837 insertions(+)
 create mode 100755 src/sonic-pac/mab/mapping/include/mab_cfg.h
 create mode 100755 src/sonic-pac/mab/mapping/include/mab_client.h
 create mode 100755 src/sonic-pac/mab/mapping/include/mab_control.h
 create mode 100755 src/sonic-pac/mab/mapping/include/mab_debug.h
 create mode 100755 src/sonic-pac/mab/mapping/include/mab_ih.h
 create mode 100755 src/sonic-pac/mab/mapping/include/mab_include.h
 create mode 100644 src/sonic-pac/mab/mapping/include/mab_socket.h
 create mode 100755 src/sonic-pac/mab/mapping/include/mab_struct.h

diff --git a/src/sonic-pac/mab/mapping/include/mab_cfg.h b/src/sonic-pac/mab/mapping/include/mab_cfg.h
new file mode 100755
index 000000000000..104462e6423c
--- /dev/null
+++ b/src/sonic-pac/mab/mapping/include/mab_cfg.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_MAB_CFG_H
+#define INCLUDE_MAB_CFG_H
+
+#include "nim_data.h"
+/* USE C Declarations */
+#ifdef __cplusplus
+  extern "C" {
+#endif
+#define  PASSWORD_SIZE      MAB_USER_NAME_LEN
+
+extern BOOL mabInitializationState;
+#define MAB_IS_READY (mabInitializationState)
+
+typedef struct mabPortCfg_s
+{
+  nimConfigID_t configId;     /* NIM config ID for this interface*/
+  uint32 maxUsers;        /*Maximum no. users in Mac-Based Authentication */
+  uint32 mabEnabled;           /*enabled if MAB is enabled for the port*/
+  AUTHMGR_PORT_MAB_AUTH_TYPE_t mabAuthType; /* Authentication type to be used by MAB */
+} mabPortCfg_t;
+
+typedef struct mabCfg_s
+{
+  mabPortCfg_t        mabPortCfg[ MAB_INTF_MAX_COUNT]; /* Per-port config info */
+} mabCfg_t;
+
+extern mabCfg_t *mabCfg;
+
+extern uint32 mabPhysPortGet(uint32 lIntIfNum);
+extern void   mabBuildDefaultConfigData();
+extern void   mabBuildDefaultIntfConfigData(nimConfigID_t *configId, mabPortCfg_t *pCfg);
+
+extern RC_t mabApplyConfigData(void);
+extern RC_t mabPortInfoInitialize(uint32 intIfNum, BOOL flag);
+extern RC_t mabPortReset(uint32 intIfNum);
+
+extern  BOOL mabIsRestartTypeWarm();
+extern RC_t mabInit(void);
+extern  void mabInitUndo();
+extern RC_t mabInitPhase1Process(void);
+extern RC_t mabInitPhase2Process(void);
+extern RC_t mabInitPhase3Process( BOOL warmRestart);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+#endif /* INCLUDE_MAB_CFG_H */
diff --git a/src/sonic-pac/mab/mapping/include/mab_client.h b/src/sonic-pac/mab/mapping/include/mab_client.h
new file mode 100755
index 000000000000..a331c5e62c61
--- /dev/null
+++ b/src/sonic-pac/mab/mapping/include/mab_client.h
@@ -0,0 +1,92 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_MAB_CLIENT_H
+#define INCLUDE_MAB_CLIENT_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+  extern "C" {
+#endif
+
+#define MAC_STR_LEN                     17
+
+#include "comm_mask.h"
+
+/*********************************************************************
+ * @purpose  Set the mab client authorization status
+ *
+ * @param    lIntIfNum   @b{(input)) internal interface number
+ * @param    portStatus @b{(input)) port authorization status setting
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ * @returns   ERROR
+ *
+ * @comments none
+ *
+ * @end
+ *********************************************************************/
+RC_t mabClientStatusSet(mabLogicalPortInfo_t *logicalPortInfo,  AUTHMGR_PORT_STATUS_t portStatus);
+
+/*********************************************************************
+ * @purpose function to  cleanup the client 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabClientInfoCleanup(mabLogicalPortInfo_t *logicalPortInfo);
+
+/*********************************************************************
+ * @purpose function to  cleanup the client sw info 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabClientSwInfoCleanup(mabLogicalPortInfo_t *logicalPortInfo);
+
+/*********************************************************************
+ * @purpose function to  check and deAllocate the client 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabClientDisconnectAction(mabLogicalPortInfo_t *logicalPortInfo);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_MAB_CLIENT_H */
diff --git a/src/sonic-pac/mab/mapping/include/mab_control.h b/src/sonic-pac/mab/mapping/include/mab_control.h
new file mode 100755
index 000000000000..251d44934fe0
--- /dev/null
+++ b/src/sonic-pac/mab/mapping/include/mab_control.h
@@ -0,0 +1,397 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_MAB_CONTROL_H
+#define INCLUDE_MAB_CONTROL_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+  extern "C" {
+#endif
+
+#include <netinet/in.h>
+#include "auth_mgr_common.h"
+
+typedef enum mabControlEvents_s
+{
+  /***************************************************************/
+  /* Events shared with all                                      */
+  /***************************************************************/
+  /*100*/mabControlBegin = 100,
+
+  /***************************************************************/
+  /* Events from Management commands                             */
+  /***************************************************************/
+  /*101*/mabMgmtPortInitializeSet,
+  /*102*/mabMgmtPortControlModeSet,
+  /*103*/mabMgmtPortHostModeSet,
+  /*104*/mabMgmtPortStatsClear,
+  /*105*/mabMgmtApplyConfigData, // No calls to API
+  /*106*/mabMgmtPortMABEnableSet,
+  /*107*/mabMgmtPortMABDisableSet,
+
+  /*120*/mabMgmtEvents = 120, /*keep this last in sub group*/
+
+  /***************************************************************/
+  /* Events from AAA client                                      */
+  /***************************************************************/
+  /*121*/mabAaaInfoReceived,
+  /*122*/mabRadiusConfigUpdate,
+  
+  /***************************************************************/
+  /* Events from interface state changes                         */
+  /***************************************************************/
+  /*123*/mabIntfChange,
+  /*124*/mabIntfStartup,
+
+  /***************************************************************/
+  /* Events from Vlan state changes                              */
+  /***************************************************************/
+  /*131*/mabVlanDeleteEvent = 131,
+  /*132*/mabVlanAddEvent,
+  /*133*/mabVlanAddPortEvent,
+  /*134*/mabVlanDeletePortEvent,
+  /*135*/mabVlanPvidChangeEvent,
+
+  /***************************************************************/
+  /* Events from authentication manager.                        */
+  /***************************************************************/
+  /*136*/mabAuthMgrEvent,
+
+  /*137*/mabAddMacInMacDB,
+
+  /***************************************************************/
+  /* App timer events.                     */
+  /***************************************************************/
+  /*138*/ mabTimeTick,
+  
+
+}mabControlEvents_t;
+
+/* Message structure to Global RADIUS config updates */
+typedef struct mabRadiusGlobal_s
+{
+  unsigned char nas_ip[64];
+  unsigned char nas_id[64];
+}mabRadiusGlobal_t;
+
+/* Message structure to RADIUS config updates */
+typedef struct mabRadiusServer_s
+{
+  unsigned int cmd;
+  union {
+    mab_radius_server_t server;
+    mabRadiusGlobal_t globalCfg;
+  }cmd_data;
+}mabRadiusServer_t;
+
+typedef struct mabIpAaddr {
+ unsigned char af; /* AF_INET / AF_INET6 */
+ union {
+         struct in_addr v4;
+         struct in6_addr v6;
+ } u;
+}mabIpAaddr_t;
+
+/* Message structure to hold responses from AAA client (i.e. RADIUS) */
+typedef struct mabAaaMsg_s
+{
+  void *resp;
+  unsigned int len;
+} mabAaaMsg_t;
+
+typedef struct mabIntfChangeParms_s 
+{
+  uint32 intfEvent;
+  NIM_CORRELATOR_t nimCorrelator;
+} mabIntfChangeParms_t;
+
+/* Message structure to hold responses from authentication manager */
+typedef struct mabAuthmgrMsg_s
+{
+  uint32 event;      /* event  */
+  enetMacAddr_t  clientMacAddr;     /* client mac addr*/
+} mabAuthmgrMsg_t;
+
+typedef struct mabMsg_s
+{
+  uint32 event;
+  uint32 intf;
+  union
+  {
+    uint32                msgParm;
+    mabAaaMsg_t           mabAaaMsg;
+    mabIntfChangeParms_t  mabIntfChangeParms;
+    dot1qNotifyData_t     vlanData;
+    NIM_STARTUP_PHASE_t   startupPhase;
+    mabAuthmgrMsg_t       mabAuthmgrMsg;
+    mabRadiusServer_t     mabRadiusCfgMsg;
+  }data;
+} mabMsg_t;
+
+
+#define MAB_MSG_COUNT   FD_MAB_MSG_COUNT
+#define MAB_TIMER_TICK  1000 /*in milliseconds*/
+
+extern RC_t mabStartTasks();
+extern void mabTask();
+extern void mabSrvrTask ();
+extern void mabEloopTask ();
+extern RC_t mabFillMsg(void *data, mabMsg_t *msg);
+extern RC_t mabIssueCmd(uint32 event, uint32 intIfNum, void *data);
+extern RC_t mabDispatchCmd(mabMsg_t *msg);
+extern RC_t mabTimerAction();
+extern RC_t mabAuthmgrEventMapFnGet(uint32 event, mabAuthmgrEventFnMap_t *elem);
+extern RC_t mabCtlPortInitializeSet(uint32 intIfNum,  BOOL initialize);
+extern RC_t mabCtlPortControlModeSet(uint32 intIfNum,  AUTHMGR_PORT_CONTROL_t portControl);
+extern RC_t mabPortCtrlModeSet(uint32 intIfNum,  AUTHMGR_PORT_CONTROL_t portControl);
+extern RC_t mabCtlPortStatsClear(uint32 intIfNum);
+extern RC_t mabCtlApplyConfigData(void);
+extern RC_t mabCtlApplyPortConfigData(uint32 intIfNum);
+extern RC_t mabRadiusServerVlanConversionHandle(const  char8 *vlanName, uint32 *vlanId);
+extern RC_t mabVlanChangeCallback(dot1qNotifyData_t *vlanData, uint32 intIfNum, uint32 event);
+extern void mabVlanChangeProcess(uint32 event, uint32 intIfNum, dot1qNotifyData_t *vlanData);
+extern RC_t mabCheckMapPdu(uint32 intIfNum,  char8 *srcMac, uint32 *logicalPort, BOOL *existing_node);
+extern RC_t mabVlanPVIDChangeEventProcess(uint32 intIfNum,uint32 vlanId);
+
+extern RC_t mabCtlPortMABEnableSet(uint32 intIfNum);
+extern RC_t mabCtlPortMABDisableSet(uint32 intIfNum);
+extern RC_t mabCtlLogicalPortMABGenResp(uint32 lIntIfNum,  BOOL generateNak);
+
+extern RC_t mabPortControlForceUnAuthActionSet(uint32 intIfNum);
+
+int mab_socket_server_handle(int *listen_sock);
+int mabPortClientAuthStatusUpdate(int intIfNum, unsigned char *addr, char *status, void *param);
+
+/*********************************************************************
+ * @purpose control mode function to set the port control mode to auto 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabPortControlAutoActionSet(uint32 intIfNum);
+
+/*********************************************************************
+ * @purpose control function to set the host mode to multi-domain-auth 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabControlMultiDomainHostAuthActionSet(uint32 intIfNum);
+
+/*********************************************************************
+ * @purpose control function to set the host mode to multi host 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabControlMultiHostActionSet(uint32 intIfNum);
+
+/*********************************************************************
+ * @purpose control function to set the host mode to single host mode 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabControlSingleAuthActionSet(uint32 intIfNum);
+
+/*********************************************************************
+ * @purpose control function to set the host mode to multi auth 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabControlMultAuthActionSet(uint32 intIfNum);
+
+/*********************************************************************
+ * @purpose control function to set the to force authorized 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabPortControlForceAuthActionSet(uint32 intIfNum);
+
+/*********************************************************************
+ * @purpose control function to set the to force un-authorized 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabPortControlForceUnAuthActionSet(uint32 intIfNum);
+
+/*********************************************************************
+ * @purpose function to clean up mab port oper info
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabPortInfoCleanup(uint32 intIfNum);
+
+RC_t mabHostModeMapInfoGet( AUTHMGR_HOST_CONTROL_t type, mabHostModeMap_t *elem);
+
+/*********************************************************************
+ * @purpose control mode function to set the port host mode 
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabPortCtrlHostModeSet(uint32 intIfNum,  AUTHMGR_HOST_CONTROL_t hostMode);
+
+/*********************************************************************
+ * @purpose  Actions to be performed in the APM state DISCONNECTED
+ *
+ * @param   logicalPortInfo  @b{(input))  Logical Port Info node
+ *
+ * @returns  SUCCESS
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabUnAuthenticatedAction(mabLogicalPortInfo_t *logicalPortInfo);
+
+/*********************************************************************
+ * @purpose  Actions to be performed in the APM state AUTHENTICATED
+ *
+ * @param   logicalPortInfo  @b{(input))  Logical Port Info node
+ *
+ * @returns  SUCCESS
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabAuthenticatedAction(mabLogicalPortInfo_t *logicalPortInfo);
+
+/*********************************************************************
+ * @purpose  Actions to be performed in the APM state AUTHENTICATING
+ *
+ * @param   logicalPortInfo  @b{(input))  Logical Port Info node
+ *
+ * @returns  SUCCESS
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabAuthenticatingAction(mabLogicalPortInfo_t *logicalPortInfo);
+
+/*********************************************************************
+ * @purpose  Add supplicant MAC in MAC database
+ *
+ * @param    lIntIfNum   @b{(input)} logical interface number that this PDU was received on
+ *
+ * @returns   SUCCESS or  FAILURE
+ * 
+ * @end
+ *********************************************************************/
+RC_t mabAddMac(uint32 lIntIfNum);
+
+RC_t mabAuthenticationInitiate(uint32 intIfNum,  enetMacAddr_t suppMacAddr);
+
+RC_t mabAuthmgrEventProcess(uint32 intIfNum, mabAuthmgrMsg_t *authmgrParams);
+
+/*********************************************************************
+* @purpose  Set values of the Logical Dot1x Port Structure
+*           with Default Values of port it belongs to
+*
+* @param    logicalPortInfo  @b{(input))  Logical port Info
+*
+* @returns   SUCCESS
+* @returns   FAILURE
+*
+* @comments
+*
+* @end
+*********************************************************************/
+RC_t mabLogicalPortInfoInit(uint32 lIntIfNum);
+
+/*********************************************************************
+ * @purpose API to check and clear appTimer Deinit 
+ *
+ * @param   none 
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabAppTimerDeInitCheck(void);
+
+RC_t mabRadiusChangeHandle(mabRadiusServer_t *info);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_MAB_CONTROL_H */
diff --git a/src/sonic-pac/mab/mapping/include/mab_debug.h b/src/sonic-pac/mab/mapping/include/mab_debug.h
new file mode 100755
index 000000000000..cf8a098619a7
--- /dev/null
+++ b/src/sonic-pac/mab/mapping/include/mab_debug.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_MAB_DEBUG_H
+#define INCLUDE_MAB_DEBUG_H
+
+  /* USE C Declarations */
+#ifdef __cplusplus
+  extern "C" {
+#endif
+
+#define MAB_ERROR_SEVERE(format,args...)                  \
+{                                                           \
+     LOGF(LOG_SEVERITY_ERROR,format,##args); \
+}
+
+#define MAB_EVENT_TRACE(__fmt__, __args__...)         \
+  {  \
+     char8  __buf1__[256] = {0};    \
+    (void)osapiSnprintf(__buf1__, 256, __fmt__, ## __args__);  \
+     LOGF(LOG_SEVERITY_DEBUG, \
+          "[%s:%d]%s",__FUNCTION__, __LINE__, (char *)__buf1__);  \
+  }
+
+char *mabHostModeStringGet( AUTHMGR_HOST_CONTROL_t hostMode);
+char *mabNodeTypeStringGet(authmgrNodeType_t type);
+char *mabTimerTypeStringGet(mabTimerType_t type);
+char *mabVlanTypeStringGet(authmgrVlanType_t type);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INCLUDE_MAB_DEBUG_H*/
diff --git a/src/sonic-pac/mab/mapping/include/mab_ih.h b/src/sonic-pac/mab/mapping/include/mab_ih.h
new file mode 100755
index 000000000000..66f6816a8765
--- /dev/null
+++ b/src/sonic-pac/mab/mapping/include/mab_ih.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_MAB_IH_H
+#define INCLUDE_MAB_IH_H
+
+  /* USE C Declarations */
+#ifdef __cplusplus
+  extern "C" {
+#endif
+
+extern RC_t mabIntfChangeCallback(uint32 intIfNum, uint32 intfEvent,NIM_CORRELATOR_t correlator,
+                                   NIM_EVENT_SPECIFIC_DATA_t eventData);
+extern RC_t mabIhProcessIntfChange(uint32 intIfNum, uint32 intfEvent, NIM_CORRELATOR_t correlator);
+extern RC_t mabIhProcessIntfStartup(NIM_STARTUP_PHASE_t startupPhase);
+extern RC_t mabIntfActivateStartup();
+extern void mabIntfStartupCallback(NIM_STARTUP_PHASE_t startupPhase);
+extern  BOOL mabIntfIsConfigurable(uint32 intIfNum, mabPortCfg_t **pCfg);
+extern RC_t mabIntfCreate(uint32 intIfNum);
+extern RC_t mabIntfDetach(uint32 intIfNum);
+extern RC_t mabIntfDelete(uint32 intIfNum);
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*INCLUDE_MAB_IH_H*/
diff --git a/src/sonic-pac/mab/mapping/include/mab_include.h b/src/sonic-pac/mab/mapping/include/mab_include.h
new file mode 100755
index 000000000000..6b3808bd98f2
--- /dev/null
+++ b/src/sonic-pac/mab/mapping/include/mab_include.h
@@ -0,0 +1,66 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+
+#ifndef INCLUDE_MAB_INCLUDE_H
+#define INCLUDE_MAB_INCLUDE_H
+
+/*
+***********************************************************************
+*                           COMMON INCLUDES
+***********************************************************************
+*/
+  /* USE C Declarations */
+#ifdef __cplusplus
+  extern "C" {
+#endif
+  
+/*
+**********************************************************************
+*                           STANDARD LIBRARIES
+**********************************************************************
+*/
+
+#include <string.h>
+#include <stdlib.h>
+#include <stdio.h>
+
+/*
+**********************************************************************
+*                   MAB HEADER FILES
+**********************************************************************
+*/
+#include "pacinfra_common.h"
+#include "osapi.h" 
+#include "nimapi.h"
+
+#include "mab_api.h"
+#include "mab_common.h"
+#include "mab_db.h"
+#include "mab_cfg.h"
+#include "mab_control.h"
+#include "mab_ih.h"
+#include "mab_local.h"
+#include "mab_debug.h"
+#include "mab_sid.h"
+#include "mab_mac_db.h"
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+#endif  /* INCLUDE_MAB_INCLUDE_H */
diff --git a/src/sonic-pac/mab/mapping/include/mab_socket.h b/src/sonic-pac/mab/mapping/include/mab_socket.h
new file mode 100644
index 000000000000..8518632a5627
--- /dev/null
+++ b/src/sonic-pac/mab/mapping/include/mab_socket.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#ifndef MAB_SOCKET_H
+#define MAB_SOCKET_H
+
+#define MAB_INTF_STR_LEN 128
+#define MAB_CMD_STR_LEN  128
+
+typedef struct mab_pac_cmd_s
+{
+  char intf[MAB_INTF_STR_LEN];
+  char cmd[MAB_CMD_STR_LEN];
+  unsigned char mac_addr[6];
+  unsigned int notif_event; 
+}mab_pac_cmd_t;
+
+int mab_radius_init_send_socket(int *sock);
+int mab_radius_init_recv_socket(int *sock);
+#endif
diff --git a/src/sonic-pac/mab/mapping/include/mab_struct.h b/src/sonic-pac/mab/mapping/include/mab_struct.h
new file mode 100755
index 000000000000..d111cfbbf18b
--- /dev/null
+++ b/src/sonic-pac/mab/mapping/include/mab_struct.h
@@ -0,0 +1,95 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef INCLUDE_MAB_STRUCT_H
+#define INCLUDE_MAB_STRUCT_H
+
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "pacinfra_common.h"
+#include "osapi.h"
+#include "avl_api.h"
+#include "apptimer_api.h"
+#include "mab_db.h"
+#include "mab_cfg.h"
+#include "mab_api.h"
+#include "mab_debug.h"
+#include "mab_include.h"
+#include "portevent_mask.h"
+#include "tree_api.h"
+
+typedef struct connection_list_e
+{
+  int socket;
+  pthread_t tid;
+}connection_list_t;
+
+
+typedef struct mabBlock_s
+{
+  void * mabTaskId;
+  void * mabSrvrTaskId;
+  void * mabEloopTaskId;
+  int  mabServerSock;
+  int  send_fd;
+  int  recv_fd;
+  connection_list_t *conn_list;
+  void *rad_cxt;
+
+  mabCfg_t *mabCfg;
+  mabInfo_t      mabInfo;
+  mabPortInfo_t  *mabPortInfo;
+  mabPortStats_t *mabPortStats;
+  uint32        *mabMapTbl;
+
+  /* App timer related data */
+   APP_TMR_CTRL_BLK_t   mabTimerCB;
+  uint32              mabAppTimerBufferPoolId;
+
+   BOOL warmRestart;
+   BOOL mabSwitchoverInProgress;
+
+  void *mabQueue;      /* reference to the mab message queue */
+  void *mabTaskSyncSema;  
+
+  void *mabRadiusSrvrTaskSyncSema;  
+
+   /* Global parameters */
+   avlTree_t                mabLogicalPortTreeDb;
+   avlTreeTables_t          *mabLogicalPortTreeHeap;
+   mabLogicalPortInfo_t   *mabLogicalPortDataHeap;
+
+   uint32     mabMacAddrBufferPoolId;
+    sll_t      mabMacAddrSLL;
+   osapiRWLock_t mabMacAddrDBRWLock;
+
+   osapiRWLock_t       mabRWLock;
+
+   mabIpAaddr_t  nas_ip;
+   unsigned char nas_id[64];
+
+}mabBlock_t;
+
+/* USE C Declarations */
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* INCLUDE_MAB_STRUCT_H */

From 49e4ee43baaa1741b32a3b152b3d352c2593baf7 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Wed, 30 Oct 2024 00:47:39 -0700
Subject: [PATCH 153/364] [Nvidia-bluefield] Add infrastructure for the DPU NIC
 FW auto upgrade (#20074)

- Why I did it
Extend Nvidia Bluefield SONiC infrastructure to support DPU NIC FW auto upgrade.

- How I did it
Extend the build system and init scripts to support the FW upgrade.

- How to verify it
Compile an image with the new FW version. Run image installation. Verify that the running FW is upgraded after the image installation.
---
 .../arm64-nvda_bf-bf3comdpu/pre_reboot_hook   |  32 ++++++
 .../build_templates/sonic_debian_extension.j2 |  12 ++-
 files/scripts/syncd.sh                        |   4 +
 .../bluefield-platform-modules/bin/bfnet.sh   |   5 +
 .../installer/create_sonic_image              | 102 +++++++-----------
 .../nvidia-bluefield/installer/install.sh.j2  | 101 ++++++++++++-----
 .../recipes/installer-image.mk                |   2 +-
 sonic-slave-bookworm/Dockerfile.j2            |   6 +-
 8 files changed, 164 insertions(+), 100 deletions(-)
 create mode 100755 device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pre_reboot_hook

diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pre_reboot_hook b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pre_reboot_hook
new file mode 100755
index 000000000000..000643bbfd09
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pre_reboot_hook
@@ -0,0 +1,32 @@
+#!/bin/bash
+
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+declare -r EXIT_SUCCESS=0
+declare -r EXIT_ERROR=1
+
+declare -r FW_UPGRADE_SCRIPT="/usr/bin/mlnx-fw-upgrade.sh"
+
+${FW_UPGRADE_SCRIPT} --upgrade --verbose
+EXIT_CODE=$?
+if [[ ${EXIT_CODE} != ${EXIT_SUCCESS} ]]; then
+    echo "Failed to burn BF3 DPU NIC FW: errno=${EXIT_CODE}"
+    exit ${EXIT_ERROR}
+fi
+
+exit ${EXIT_SUCCESS}
+
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index da7cdd8a2744..8c7bc2551166 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -1117,19 +1117,23 @@ sudo cp platform/mellanox/smartswitch/dpuctl/dpuctl.service $FILESYSTEM_ROOT_USR
 declare -rA FW_FILE_MAP=( \
     [$BF3_FW_FILE]="fw-BF3.mfa" \
 )
-sudo mkdir -p $FILESYSTEM_ROOT/$PLATFORM_DIR/fw/dpu/
-sudo mkdir -p $FILESYSTEM_ROOT/etc/bluefield/
+sudo mkdir -p $FILESYSTEM_ROOT/$PLATFORM_DIR/fw/asic/
+sudo mkdir -p $FILESYSTEM_ROOT/etc/mlnx/
 for fw_file_name in ${!FW_FILE_MAP[@]}; do
-    sudo cp $files_path/$fw_file_name $FILESYSTEM_ROOT/$PLATFORM_DIR/fw/dpu/${FW_FILE_MAP[$fw_file_name]}
-    sudo ln -s /host/image-$SONIC_IMAGE_VERSION/$PLATFORM_DIR/fw/dpu/${FW_FILE_MAP[$fw_file_name]} $FILESYSTEM_ROOT/etc/bluefield/${FW_FILE_MAP[$fw_file_name]}
+    sudo cp $files_path/$fw_file_name $FILESYSTEM_ROOT/$PLATFORM_DIR/fw/asic/${FW_FILE_MAP[$fw_file_name]}
+    sudo ln -s /host/image-$SONIC_IMAGE_VERSION/$PLATFORM_DIR/fw/asic/${FW_FILE_MAP[$fw_file_name]} $FILESYSTEM_ROOT/etc/mlnx/${FW_FILE_MAP[$fw_file_name]}
 done
 
 sudo install -m 755 platform/nvidia-bluefield/byo/sonic-byo.py $FILESYSTEM_ROOT/usr/bin/sonic-byo.py
+SONIC_PLATFORM={{sonic_asic_platform}} j2 platform/mellanox/mlnx-fw-upgrade.j2 | sudo tee $FILESYSTEM_ROOT/usr/bin/mlnx-fw-upgrade.sh
+sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/mlnx-fw-upgrade.sh
 
 SONIC_PLATFORM_PY3_WHEEL_NAME=$(basename {{platform_api_py3_wheel_path}})
 sudo cp {{platform_api_py3_wheel_path}} $FILESYSTEM_ROOT/$SONIC_PLATFORM_PY3_WHEEL_NAME
 sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install $SONIC_PLATFORM_PY3_WHEEL_NAME
 sudo rm -rf $FILESYSTEM_ROOT/$SONIC_PLATFORM_PY3_WHEEL_NAME
+
+sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install xmlstarlet
 {% endif %}
 
 {%- if SONIC_ROUTING_STACK == "frr" %}
diff --git a/files/scripts/syncd.sh b/files/scripts/syncd.sh
index 0c794ef5d9dc..562af4fd2c3f 100755
--- a/files/scripts/syncd.sh
+++ b/files/scripts/syncd.sh
@@ -72,6 +72,10 @@ function startplatform() {
 
     if [[ x"$sonic_asic_platform" == x"nvidia-bluefield" ]]; then
         /usr/bin/bfnet.sh start
+        if [[ $? != "0" ]]; then
+            debug "Failed to start Nvidia Bluefield"
+            exit 1
+        fi
     fi
 }
 
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh b/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh
index 76b785c9b536..e05761675336 100755
--- a/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh
@@ -42,6 +42,11 @@ start()
     modprobe mlx5_core
     /usr/bin/mst start
 
+    /usr/bin/mlnx-fw-upgrade.sh --dry-run -v
+    if [[ $? != "0" ]]; then
+        exit 1
+    fi
+
     hwsku=$(sonic-cfggen -d -v 'DEVICE_METADATA["localhost"]["hwsku"]')
     if [[ $hwsku == *"-C1" ]]; then
         start_cp_dhclient
diff --git a/platform/nvidia-bluefield/installer/create_sonic_image b/platform/nvidia-bluefield/installer/create_sonic_image
index 8e18f1b7fe80..a131df4c3360 100755
--- a/platform/nvidia-bluefield/installer/create_sonic_image
+++ b/platform/nvidia-bluefield/installer/create_sonic_image
@@ -16,7 +16,6 @@
 # limitations under the License.
 #
 
-set -x
 set -e
 
 WDIR=
@@ -184,34 +183,14 @@ add_sonic_to_initramfs() {
 cat > scripts/initrd-install << EOF
 #!/bin/bash
 
-printf_msg()
-{
-	echo "$@" | tee /dev/kmsg
-	return 0
-}
-
 depmod -a $KERNEL_VERSION > /dev/null 2>&1
 insmod /mlx-bootctl.ko
 insmod /sdhci-of-dwcmshc.ko
 insmod /sbsa_gwdt.ko
 /usr/sbin/watchdog
 
-printf_msg "================================="
-printf_msg "Installing SONiC. Please wait..."
-printf_msg "================================="
-
 /bin/bash /debian/install.sh
-if [ \$? -eq 0 ]; then
-	printf_msg "==================================="
-	printf_msg "Installation finished. Rebooting..."
-	printf_msg "==================================="
-	printf_msg
-	reboot -f
-else
-	printf_msg "========================"
-	printf_msg "Failed to install SONiC"
-	printf_msg "========================"
-fi
+
 EOF
     chmod +x scripts/initrd-install
     sudo rm -f conf/conf.d/debian-core*
@@ -221,63 +200,37 @@ EOF
 
 copy_bin()
 {
-    from=$(realpath $1)
-
-    if [ -e $from/$2 ]; then
-        bin=$2
+    if [ -e $1 ]; then
+        bin=$1
     else
-        bin=$(sudo chroot $from bash -c "which $2 2> /dev/null")
+        bin=$(which $1 2> /dev/null)
     fi
-
-    echo "copy from" $from file: $bin
-
-    if [ -h $from/$bin ]; then
-        if [[ $from == "/" ]]; then
-            tbin=`readlink -f $bin`
-        else
-            tbin=`readlink -f $from/$bin | sed -e "s~$from~~"`
-        fi
-
-        if [ ! -e .$tbin ]; then
-            sudo mkdir -p .`dirname $tbin`
-            sudo cp $from/$tbin .$tbin
-        fi
-
-        if [ ! -e .${bin} ]; then
-            sudo mkdir -p .`dirname $bin`
-            sudo cp -a $from/$bin .${bin}
-        fi
-    elif [ -e $from/$bin ]; then
-        sudo mkdir -p .`dirname $bin`
-        sudo cp -a $from/$bin .${bin}
-    else
-        echo "ERROR: Cannot find $2"
+    if [ -z "$bin" ]; then
+        echo "ERROR: Cannot find $1"
         exit 1
     fi
+    sudo mkdir -p .$(dirname $bin)
+    if [ ! -e .${bin} ]; then
+        sudo cp -a $bin .${bin}
+    fi
 
     # Copy dependencies
-    for lib in `ldd $from/$bin 2> /dev/null | grep '=>' | awk '{print $3}'`
+    for lib in  $(ldd $bin 2> /dev/null | grep '=>' | awk '{print $3}')
     do
         if [ -e .$lib ]; then
             continue
         fi
-
-        sudo mkdir -p .`dirname $lib`
-        sudo cp -a $from/$lib .$lib
-        echo sudo cp -a $from/$lib .$lib
-        if [ -h $from/.$lib ]; then
-            if [[ $from == "/" ]]; then
-                tlib=`readlink -f $lib`
-            else
-                tlib=`readlink -f $from/$lib | sed -e "s~$from~~"`
-            fi
+        sudo mkdir -p .$(dirname $lib)
+        sudo cp -a $lib .$lib
+        if [ -h $lib ]; then
+            tlib=$(readlink -f $lib)
             if [ ! -e .$tlib ]; then
-                sudo mkdir -p .`dirname $tlib`
-                sudo cp $from/$tlib .$tlib
+                sudo mkdir -p .$(dirname $tlib)
+                sudo cp $tlib .$tlib
             fi
         fi
     done
- }
+}
 
 create_bfb_image() {
 
@@ -336,7 +289,24 @@ create_bfb_image() {
         if [ -d $tool ]; then
             continue
         fi
-        copy_bin / $tool
+        copy_bin $tool
+    done
+
+    kernel_mft=$(dpkg -l | grep kernel-mft-dkms-modules | awk '/^ii/ {print $2}')
+    if [[ $kernel_mft == "" ]]; then
+        echo "ERROR: kernel-mft-dkms-modules package is not installed"
+        exit 1
+    fi
+
+    for tool in `dpkg -L mft` \
+            `dpkg -L mft-oem` \
+            `dpkg -L $kernel_mft` \
+            `dpkg -L xmlstarlet | grep -v share`
+    do
+        if [ -d $tool ]; then
+            continue
+        fi
+        copy_bin $tool
     done
 
     sudo depmod -a -b ./ $KERNEL_VERSION
diff --git a/platform/nvidia-bluefield/installer/install.sh.j2 b/platform/nvidia-bluefield/installer/install.sh.j2
index e8167f4ab6d0..b5a123af5b28 100755
--- a/platform/nvidia-bluefield/installer/install.sh.j2
+++ b/platform/nvidia-bluefield/installer/install.sh.j2
@@ -20,28 +20,43 @@
 # This will setup the disk, grub etc for the actual SONiC to boot from
 
 # NOTE: Replace these flag at build time
-IMAGE_VERSION="{{IMAGE_VERSION}}"
-INSTALLER_PAYLOAD="{{INSTALLER_PAYLOAD}}"
-FILESYSTEM_DOCKERFS="{{FILESYSTEM_DOCKERFS}}"
-DOCKERFS_DIR="{{DOCKERFS_DIR}}"
-FILESYSTEM_SQUASHFS="{{FILESYSTEM_SQUASHFS}}"
-KERNEL_VERSION="{{KERNEL_VERSION}}"
-BF2_GRUB_CFG="{{BF2_GRUB_CFG}}"
-BF3_GRUB_CFG="{{BF3_GRUB_CFG}}"
-
-image_dir="image-$IMAGE_VERSION"
-demo_volume_revision_label="SONiC-OS-${IMAGE_VERSION}"
-
-PATH="/usr/local/sbin:/usr/local/bin:/sbin:/bin:/usr/sbin:/usr/bin:/opt/mellanox/scripts"
-CHROOT_PATH="/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin"
-
-rshimlog=`which bfrshlog 2> /dev/null`
-distro="SONiC"
+declare -r IMAGE_VERSION="{{IMAGE_VERSION}}"
+declare -r INSTALLER_PAYLOAD="{{INSTALLER_PAYLOAD}}"
+declare -r FILESYSTEM_DOCKERFS="{{FILESYSTEM_DOCKERFS}}"
+declare -r DOCKERFS_DIR="{{DOCKERFS_DIR}}"
+declare -r FILESYSTEM_SQUASHFS="{{FILESYSTEM_SQUASHFS}}"
+declare -r KERNEL_VERSION="{{KERNEL_VERSION}}"
+declare -r BF2_GRUB_CFG="{{BF2_GRUB_CFG}}"
+declare -r BF3_GRUB_CFG="{{BF3_GRUB_CFG}}"
+
+declare -r image_dir="image-$IMAGE_VERSION"
+declare -r demo_volume_revision_label="SONiC-OS-${IMAGE_VERSION}"
+
+declare -r rshimlog=`which bfrshlog 2> /dev/null`
+declare -r distro="SONiC"
+
+declare -r device_nvmv=/dev/nvme0n1
+declare -r device_emmc=/dev/mmcblk0
+
+pn=$(dmidecode -t 4 | grep "Part Number" | awk '{split($NF,a,"-"); print tolower(a[1])}')
+declare -r platform=arm64-nvda_bf-$pn
+
+# The reboot of the DPU from the installer is required only for standalon platform.
+# In Smart Switch the reboot is triggered by the host when the DPU notifies it that the installation is finished.
+if [[ $(echo $platform | grep 9009d3b600) != "" ]]; then
+	declare -r reboot_is_needed=true
+	declare -r fw_upgrade_is_needed=false
+else
+	declare -r reboot_is_needed=false
+	declare -r fw_upgrade_is_needed=true
+fi
 
-device_nvmv=/dev/nvme0n1
-device_emmc=/dev/mmcblk0
+declare -r capsule=/lib/firmware/mellanox/boot/capsule/boot_update2.cap
 
-capsule=/lib/firmware/mellanox/boot/capsule/boot_update2.cap
+run_bash_session()
+{
+	/bin/bash </dev/ttyAMA0 >/dev/ttyAMA0 2>&1
+}
 
 rshim_log()
 {
@@ -71,7 +86,7 @@ function_exists()
 # Check auto configuration passed from boot-fifo
 #
 
-boot_fifo_path="/sys/bus/platform/devices/MLNXBF04:00/bootfifo"
+declare -r boot_fifo_path="/sys/bus/platform/devices/MLNXBF04:00/bootfifo"
 if [ -e "${boot_fifo_path}" ]; then
 	cfg_file=$(mktemp)
 	# Get 16KB assuming it's big enough to hold the config file.
@@ -203,9 +218,6 @@ unzip -op /debian/$INSTALLER_PAYLOAD "$FILESYSTEM_DOCKERFS" | tar xz --warning=n
 mkdir -p /mnt/$image_dir/platform
 unzip -op /debian/$INSTALLER_PAYLOAD "platform.tar.gz" | tar xz --warning=no-timestamp -f - -C /mnt/$image_dir/platform
 
-platform=$(dmidecode -t 4 | grep "Part Number" | awk '{split($NF,a,"-"); print tolower(a[1])}')
-platform=arm64-nvda_bf-$platform
-
 # Copy in the machine.conf file
 cat <<EOF > /mnt/machine.conf
 onie_arch=arm64
@@ -215,6 +227,33 @@ EOF
 chmod a+r /mnt/machine.conf
 
 sync
+
+if [[ $fw_upgrade_is_needed == "true" ]]; then
+	sonic_fs_path="/mnt/$image_dir/fs.squashfs"
+	sonic_fs_mountpoint="/tmp/$image_dir-fs"
+
+	ex mkdir -p $sonic_fs_mountpoint
+	ex mount -t squashfs $sonic_fs_path $sonic_fs_mountpoint
+
+	ex mkdir -p /etc/mlnx/
+
+	ex ln -s /mnt/$image_dir/platform/fw/asic/fw-BF3.mfa /etc/mlnx/fw-BF3.mfa
+
+	ex mst start
+
+	ex $sonic_fs_mountpoint/usr/bin/mlnx-fw-upgrade.sh --update -v
+	if [[ $? != 0 ]]; then
+		log "ERROR: FW update failed"
+	fi
+
+	ex umount $sonic_fs_mountpoint
+fi
+
+if function_exists bfb_post_sonic_install; then
+	log "Running bfb_post_sonic_install from bf.cfg"
+	bfb_post_sonic_install
+fi
+
 {% if SECURE_UPGRADE_MODE in ['dev', 'prod'] %}
 demo_volume_label="SONiC-OS"
 log "creating demo_volume_label=$demo_volume_label dir under EFI partition to include all boot related modules"
@@ -384,7 +423,15 @@ if function_exists bfb_post_install; then
 	ex bfb_post_install
 fi
 
+
 rshim_log "Installation finished"
-rshim_log "Rebooting..."
-# Wait for these messages to be pulled by the rshim service
-sleep 3
+
+if [[ $reboot_is_needed == "true" ]]; then
+	rshim_log "Rebooting..."
+	reboot -f
+else
+	rshim_log "Waiting for reset from the host..."
+	while true; do
+		sleep 1
+	done
+fi
diff --git a/platform/nvidia-bluefield/recipes/installer-image.mk b/platform/nvidia-bluefield/recipes/installer-image.mk
index 08592bcd30e7..d438c01cbb37 100644
--- a/platform/nvidia-bluefield/recipes/installer-image.mk
+++ b/platform/nvidia-bluefield/recipes/installer-image.mk
@@ -73,7 +73,7 @@ SONIC_BF_IMAGE_BFB = $(SONIC_BF_IMAGE_BASE).bfb
 $(SONIC_BF_IMAGE_BFB)_IMAGE_TYPE = bfb
 $(SONIC_BF_IMAGE_BFB)_MACHINE = $($(SONIC_BF_IMAGE_BASE)_MACHINE)
 $(SONIC_BF_IMAGE_BFB)_INSTALLS += $($(SONIC_BF_IMAGE_BASE)_INSTALLS)
-$(SONIC_BF_IMAGE_BFB)_DEPENDS += $($(SONIC_BF_IMAGE_BASE)_DEPENDS)
+$(SONIC_BF_IMAGE_BFB)_DEPENDS += $($(SONIC_BF_IMAGE_BASE)_DEPENDS) $(MFT) $(MFT_OEM) $(KERNEL_MFT)
 $(SONIC_BF_IMAGE_BFB)_DOCKERS += $($(SONIC_BF_IMAGE_BASE)_DOCKERS)
 $(SONIC_BF_IMAGE_BFB)_LAZY_INSTALLS += $($(SONIC_BF_IMAGE_BASE)_LAZY_INSTALLS)
 $(SONIC_BF_IMAGE_BFB)_FILES += $($(SONIC_BF_IMAGE_BASE)_FILES)
diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index 92a15eaf9972..145ba7d0a0d9 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -428,7 +428,7 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install
         libprotobuf-dev \
 # For sonic-dhcp6relay build
         libjsoncpp-dev \
-#for nvidia-blufield driver compilation
+#for nvidia-bluefield driver compilation
         pciutils \
         dh-dkms \
         rpm2cpio \
@@ -441,7 +441,9 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install
         efibootmgr \
         watchdog \
         dmidecode \
-# For nvidia-blufield sdk compilation
+        usbutils \
+        xmlstarlet \
+# For nvidia-bluefield sdk compilation
         cython3 \
         pandoc \
         valgrind \

From 6c05500c4fea95ecdeafd68f1d57b19c18b2afb5 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Wed, 30 Oct 2024 00:48:18 -0700
Subject: [PATCH 154/364] [Nvidia-bluefield] Extend BFB installer script to
 reset DPU after image installation (#19910)

- Why I did it
The DPU reset after the image installation is required to boot the DPU with the new NIC FW

- How I did it
Trigger DPU reset with the dpuctl utility after the image installation

- How to verify it
Build and install the image
---
 platform/mellanox/sonic-bfb-installer.sh | 28 +++++++++++++++++++-----
 1 file changed, 22 insertions(+), 6 deletions(-)

diff --git a/platform/mellanox/sonic-bfb-installer.sh b/platform/mellanox/sonic-bfb-installer.sh
index 8950797fed7f..68baba0a9e09 100755
--- a/platform/mellanox/sonic-bfb-installer.sh
+++ b/platform/mellanox/sonic-bfb-installer.sh
@@ -16,6 +16,12 @@
 # limitations under the License.
 #
 
+declare -A rshim2dpu
+rshim2dpu["rshim0"]="dpu0"
+rshim2dpu["rshim1"]="dpu1"
+rshim2dpu["rshim2"]="dpu2"
+rshim2dpu["rshim3"]="dpu3"
+
 command_name="sonic-bfb-installer.sh"
 usage(){
     echo "Syntax: $command_name -b|--bfb <BFB_Image_Path> --rshim|-r <rshim1,..rshimN> --verbose|-v --config|-c <Options> --help|h"
@@ -30,20 +36,30 @@ WORK_DIR=`mktemp -d -p "$DIR"`
 
 bfb_install_call(){
     #Example:sudo bfb-install -b <full path to image> -r rshim<id>
-    local result_file=$(mktemp "${WORK_DIR}/result_file.XXXXX")
-    local cmd="timeout 600s bfb-install -b $2 -r $1 $appendix"
-    echo "Installing bfb image on DPU connected to $1 using $cmd"
-    local indicator="$1:"
+    local -r rshim=$1
+    local result_file=$(mktemp "/tmp/result_file.XXXXX")
+    local cmd="timeout 600s bfb-install -b $2 -r $rshim $appendix"
+    echo "Installing bfb image on DPU connected to $rshim using $cmd"
+    local indicator="$rshim:"
     eval "$cmd" > "$result_file" 2>&1 > >(while IFS= read -r line; do echo "$indicator $line"; done > "$result_file")
     local exit_status=$?
     if [ $exit_status  -ne 0 ]; then
-        echo "$1: Error: Installation failed on connected DPU!"
+        echo "$rshim: Error: Installation failed on connected DPU!"
     else
-        echo "$1: Installation Successful"
+        echo "$rshim: Installation Successful"
     fi
     if [ $exit_status -ne 0 ] ||[ $verbose = true ]; then
         cat "$result_file"
     fi
+
+    dpu=${rshim2dpu[$rshim]}
+    echo "$rshim: Resetting DPU $dpu"
+    cmd="dpuctl dpu-reset --force $dpu"
+    if [[ $verbose == true ]]; then
+        cmd="$cmd -v"
+    fi
+
+    eval $cmd
 }
 
 file_cleanup(){

From bf1bcb2b3f9ae0823e86575c9e284bd1fbe755d5 Mon Sep 17 00:00:00 2001
From: bingwang-ms <66248323+bingwang-ms@users.noreply.github.com>
Date: Wed, 30 Oct 2024 04:42:36 -0700
Subject: [PATCH 155/364] Add a patch for scapy to fix fd leak issue in
 AsyncSniffer (#20415)

Why I did it
This PR is to add a patch to fix potential fd leak issue in AsyncSniffer in scapy python library.
There are two fd leak scenarios.

When starting worker thread _run, if an interface is down, an OSError is thrown, and the sockets that have been created will be leaked as it never got a chance to be closed.
When stopping the worker thread, same error can happen when calling close. The sockets not closed will be leaked.

How I did it
Catch OSError when creating sockets, and catch any exception when closing socket to ensure all sockets are closed.

How to verify it
Verified by the testing code above. No fd leak happened.
---
 .../0004-Fix-fd-leak-in-worker-thread.patch   | 47 +++++++++++++++++++
 src/scapy.patch/series                        |  1 +
 2 files changed, 48 insertions(+)
 create mode 100644 src/scapy.patch/0004-Fix-fd-leak-in-worker-thread.patch

diff --git a/src/scapy.patch/0004-Fix-fd-leak-in-worker-thread.patch b/src/scapy.patch/0004-Fix-fd-leak-in-worker-thread.patch
new file mode 100644
index 000000000000..41ef49a9b576
--- /dev/null
+++ b/src/scapy.patch/0004-Fix-fd-leak-in-worker-thread.patch
@@ -0,0 +1,47 @@
+diff --git a/scapy/sendrecv.py b/scapy/sendrecv.py
+index f97fc415..dbcc372f 100644
+--- a/scapy/sendrecv.py
++++ b/scapy/sendrecv.py
+@@ -1111,17 +1111,19 @@ class AsyncSniffer(object):
+             # The _RL2 function resolves the L2socket of an iface
+             _RL2 = lambda i: L2socket or resolve_iface(i).l2listen()  # type: Callable[[_GlobInterfaceType], Callable[..., SuperSocket]]  # noqa: E501
+             if isinstance(iface, list):
+-                sniff_sockets.update(
+-                    (_RL2(ifname)(type=ETH_P_ALL, iface=ifname, **karg),
+-                     ifname)
+-                    for ifname in iface
+-                )
++                for ifname in iface:
++                    try:
++                        sniff_sockets.update({_RL2(ifname)(type=ETH_P_ALL, iface=ifname, **karg): ifname})
++                    except OSError:
++                        # Ignore OSError when opening the socket
++                        # The error can happen when the port goes down during the creation of the socket
++                        pass
+             elif isinstance(iface, dict):
+-                sniff_sockets.update(
+-                    (_RL2(ifname)(type=ETH_P_ALL, iface=ifname, **karg),
+-                     iflabel)
+-                    for ifname, iflabel in six.iteritems(iface)
+-                )
++                for ifname, iflabel in six.iteritems(iface):
++                    try:
++                        sniff_sockets.update({_RL2(ifname)(type=ETH_P_ALL, iface=ifname, **karg): iflabel})
++                    except OSError:
++                        pass
+             else:
+                 iface = iface or conf.iface
+                 sniff_sockets[_RL2(iface)(type=ETH_P_ALL, iface=iface,
+@@ -1221,7 +1223,11 @@ class AsyncSniffer(object):
+         self.running = False
+         if opened_socket is None:
+             for s in sniff_sockets:
+-                s.close()
++                try:
++                    s.close()
++                except Exception:
++                    # Ignore exceptions to ensure all sockets are closed
++                    pass
+         elif close_pipe:
+             close_pipe.close()
+         self.results = session.toPacketList()
diff --git a/src/scapy.patch/series b/src/scapy.patch/series
index 7b231848ac1f..cf8d49752752 100644
--- a/src/scapy.patch/series
+++ b/src/scapy.patch/series
@@ -1,3 +1,4 @@
 0001-Fix-version-string-generation-when-scapy-is-a-submod.patch
 0002-Check-if-the-network-interface-still-exists.patch
 0003-Do-not-resolve-the-interface-name-globally.patch
+0004-Fix-fd-leak-in-worker-thread.patch

From 293a76757f005cc235411118041a2b893c6fc25f Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Wed, 30 Oct 2024 12:23:51 -0700
Subject: [PATCH 156/364] [Mellanox]Updating SAI profile with WECMP
 Normalization setting (#20623)

- Why I did it
Setting the KV attribute for WECMP normalization

- How I did it
Update common sai.profile

- How to verify it
Running basic WECMP tests.
---
 platform/mellanox/docker-syncd-mlnx/sai-common.profile | 1 +
 1 file changed, 1 insertion(+)

diff --git a/platform/mellanox/docker-syncd-mlnx/sai-common.profile b/platform/mellanox/docker-syncd-mlnx/sai-common.profile
index 6876eb876c5f..682bd8855784 100644
--- a/platform/mellanox/docker-syncd-mlnx/sai-common.profile
+++ b/platform/mellanox/docker-syncd-mlnx/sai-common.profile
@@ -5,3 +5,4 @@ SAI_KEY_SDK_SNIFFER_MODE=cyclic
 SAI_KEY_SDK_SNIFFER_LOG_NUM=10
 SAI_KEY_SDK_SNIFFER_LOG_MAX_SIZE=314572800
 SAI_KEY_SDK_SNIFFER_WRITE_INTERVAL=1000
+SAI_WCMP_NORMALIZATION_MAX_TOTAL_WEIGHT=256

From 75dc13722d1a1188bff86ca2171c26caf52010e3 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 31 Oct 2024 18:11:34 +0800
Subject: [PATCH 157/364] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#20660)

#### Why I did it
src/sonic-platform-daemons
```
* fc557a1 - (HEAD -> master, origin/master, origin/HEAD) [SmartSwitch] Add implementation for the DPU chassis daemon. (#554) (12 hours ago) [Oleksandr Ivantsiv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index f169f86a2cd7..fc557a1e2c23 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit f169f86a2cd7f4f4ebf69f7b9d972824790d0080
+Subproject commit fc557a1e2c23a8df8a860acd30a70817922ff882

From d53bf62cfd0af3c1429fa344352f1e592fd7a668 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 31 Oct 2024 18:11:49 +0800
Subject: [PATCH 158/364] [submodule] Update submodule sonic-platform-common to
 the latest HEAD automatically (#20630)

#### Why I did it
src/sonic-platform-common
```
* 4668bdc - (HEAD -> master, origin/master, origin/HEAD) Enhanced NVMe disk support, added limited eUSB disk support (#493) (3 days ago) [Ashwin Srinivasan]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 7268fad2c220..4668bdcb68c6 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 7268fad2c220bdcca2f22bfb080f15f078d5fa8f
+Subproject commit 4668bdcb68c646ff4b92f805d1b70c84647051f6

From 89c1d8152953d4aafc48d1d5ac957d29a5b316c8 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 31 Oct 2024 18:12:10 +0800
Subject: [PATCH 159/364] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#20540)

#### Why I did it
src/sonic-sairedis
```
* e394ced7 - (HEAD -> master, origin/master, origin/HEAD) Fix compilation on Buster (#1449) (11 hours ago) [Saikrishna Arcot]
* 4d504ff8 - Rename file name to fit case insensitive file system. (#1444) (2 days ago) [Liu Shilong]
* fe650bb7 - [syncd] Add workaround for port error status notification (#1430) (6 days ago) [Kamil Cudnik]
* cd2773a3 - [syncd] Fix inspect asic command (#1434) (7 days ago) [Kamil Cudnik]
* 2d873766 - [syncd] Make sure notification queue release memory when drained (#1427) (8 days ago) [Kamil Cudnik]
* b8a8856a - Fix adding flex counter to wrong context (#1421) (8 days ago) [byu343]
* 40979e0b - [fastboot] Notify SAI that fastboot is done (#1396) (8 days ago) [Junchao-Mellanox]
* 952ee406 - [codeql] Change pull_request_target to pull_request (#1442) (9 days ago) [Kamil Cudnik]
* 697d86b5 - [syncd] Create neighbor entries before next hop (#1432) (9 days ago) [Kamil Cudnik]
* fa76ca13 - [codeql] Remove git ancestry (#1441) (10 days ago) [Kamil Cudnik]
* 3838d7ee - [codeql] Show git ancestry graph (#1440) (10 days ago) [Kamil Cudnik]
* 2e7d946b - [codeql] Show gcc version before compile (#1438) (10 days ago) [Kamil Cudnik]
* a1e93f58 - [submodule] Update SAI to latest master (#1431) (2 weeks ago) [Kamil Cudnik]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index d62ac0d57efb..e394ced725fc 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit d62ac0d57efbe3b1970dae697151adc335f3f702
+Subproject commit e394ced725fc42b6a33612f4b45d1c9630d52dcf

From 8a9ff73c9339cabc9413b796157afae563df114f Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Thu, 31 Oct 2024 06:29:28 -0700
Subject: [PATCH 160/364] [Mellanox] Extend Nvidia Bluefield DPU chassis
 implementation (#20620)

- Why I did it
Implement the interface required to run DPU chassisd on the Nvidia Smart Switch.
Implement get_dpu_id API that deducts the DPU ID based on the midplane interface IP address.

- How I did it
Implement platform API

- How to verify it
The implementation is covered by the UT.
---
 .../pmon_daemon_control.json                  |  2 +-
 .../platform-api/sonic_platform/chassis.py    | 53 +++++++++++++++++++
 .../platform-api/tests/test_chassis.py        | 10 ++++
 3 files changed, 64 insertions(+), 1 deletion(-)

diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json
index 86f807221ef5..ef069d2e13de 100644
--- a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json
+++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json
@@ -2,6 +2,6 @@
     "skip_ledd": true,
     "skip_psud": true,
     "skip_fancontrol": true,
-    "skip_chassisd": true,
+    "skip_chassisd": false,
     "skip_ycabled": true
 }
diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/chassis.py b/platform/nvidia-bluefield/platform-api/sonic_platform/chassis.py
index 0d92a16a04ae..b88dca5259f9 100644
--- a/platform/nvidia-bluefield/platform-api/sonic_platform/chassis.py
+++ b/platform/nvidia-bluefield/platform-api/sonic_platform/chassis.py
@@ -22,6 +22,9 @@
     import os
     from functools import reduce
     from time import sleep
+    import psutil
+    import ipaddress
+    import socket
 
     from . import utils
     from .device_data import DeviceDataManager
@@ -53,8 +56,25 @@ def __init__(self):
         self.sfp_event = None
         self._eeprom = Eeprom()
         self._watchdog = Watchdog()
+
         logger.log_info("Chassis loaded successfully")
 
+    def _get_dpu_id(self):
+        ip = None
+        midplane_inft = psutil.net_if_addrs().get('eth0-midplane', [])
+
+        for address in midplane_inft:
+            if address.family == socket.AF_INET:
+                ip = ipaddress.IPv4Address(address.address)
+                break
+
+        if not ip:
+            raise RuntimeError("Midplane interface IP address is not available")
+
+        last_byte = int(str(ip).split('.')[-1])
+
+        return last_byte - 1
+
     def _initialize_sfp(self):
         self._sfp_list = []
 
@@ -272,3 +292,36 @@ def get_reboot_cause(self):
             to pass a description of the reboot cause.
         """
         return "N/A", "N/A"
+
+    ##############################################
+    # SmartSwitch methods
+    ##############################################
+
+    def get_dpu_id(self, **kwargs):
+        """
+        For the smart switch DPU retrieves the ID of the DPU.
+        Returns None for non-smartswitch chassis.
+
+        Returns:
+            An integer, indicating the DPU ID Ex: name:DPU0 return value 0,
+            name:DPU1 return value 1, name:DPUX return value X
+        """
+        return self._get_dpu_id()
+
+    def is_smartswitch(self):
+        """
+        Retrieves whether the sonic instance is part of smartswitch
+
+        Returns:
+            Returns:True for SmartSwitch and False for other platforms
+        """
+        return True
+
+    def is_dpu(self):
+        """
+        Retrieves whether the SONiC instance runs on the DPU
+
+        Returns:
+            True if the SONiC instance runs on the DPU else False
+        """
+        return True
diff --git a/platform/nvidia-bluefield/platform-api/tests/test_chassis.py b/platform/nvidia-bluefield/platform-api/tests/test_chassis.py
index e4a8826c4490..4e7b565e4bf9 100644
--- a/platform/nvidia-bluefield/platform-api/tests/test_chassis.py
+++ b/platform/nvidia-bluefield/platform-api/tests/test_chassis.py
@@ -17,6 +17,8 @@
 
 import os
 import sys
+import socket
+from collections import namedtuple
 
 from unittest.mock import patch
 from unittest.mock import mock_open
@@ -83,3 +85,11 @@ def test_sfp(self, *args):
         assert len(sfp_list) == 2
         assert id(sfp1) == id(sfp_list[0])
         assert id(sfp2) == id(sfp_list[1])
+
+
+    @patch('psutil.net_if_addrs', return_value={
+        'eth0-midplane': [namedtuple('snicaddr', ['family', 'address'])(family=socket.AF_INET, address='169.254.200.1')]})
+    def test_get_dpu_id(self, *args):
+        chassis = Chassis()
+
+        assert chassis.get_dpu_id() == 0

From faaa69b5f55ad023bb942c66ada59623ed54ddd9 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <zyq1512099831@gmail.com>
Date: Fri, 1 Nov 2024 08:35:37 +0800
Subject: [PATCH 161/364] [smart_switch][dhcp_server] Fix query dhcp lease get
 unknown in smart switch by Cli (#20642)

Why I did it
In smart switch, there is an issue that Cli query dhcp lease got unknow interface due to dpu fdb hasn't present in STATE_DB FDB_TABLE. Issue: #20155

How I did it
Query bridge fdb if there is no fdb record in STATE_DB

How to verify it
UT passed
---
 .../cli-plugin-tests/mock_state_db.json       |  5 ++
 .../cli-plugin-tests/pytest.ini               |  3 +-
 .../cli-plugin-tests/test_show_dhcp_server.py | 74 ++++++++++++-------
 .../cli/show/plugins/show_dhcp_server.py      |  8 +-
 4 files changed, 62 insertions(+), 28 deletions(-)

diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/mock_state_db.json b/dockers/docker-dhcp-server/cli-plugin-tests/mock_state_db.json
index 006758e2285a..47d7d6e93d35 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/mock_state_db.json
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/mock_state_db.json
@@ -14,6 +14,11 @@
         "lease_end": "1677641481",
         "ip": "192.168.0.3"
     },
+    "DHCP_SERVER_IPV4_LEASE|bridge-midplane|10:70:fd:b6:13:03": {
+        "lease_start": "1677640581",
+        "lease_end": "1677641481",
+        "ip": "192.168.0.4"
+    },
     "DHCP_SERVER_IPV4_SERVER_IP|eth0": {
         "ip": "240.127.1.2"
     },
diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/pytest.ini b/dockers/docker-dhcp-server/cli-plugin-tests/pytest.ini
index b960c46f4109..a58ccfee367a 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/pytest.ini
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/pytest.ini
@@ -1,3 +1,2 @@
 [pytest]
-addopts = --cov-config=.coveragerc --cov --cov-report html --cov-report term --cov-report xml --junitxml=test-results.xml -vv
-
+addopts = --cov=/sonic/dockers/docker-dhcp-server/cli --cov-config=.coveragerc --cov-report html --cov-report term --cov-report term-missing --cov-report xml --junitxml=test-results.xml -vv
diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
index 7dbcfc0e359d..faa067fdeea9 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
@@ -9,39 +9,41 @@
 sys.path.append('../cli/show/plugins/')
 import show_dhcp_server
 
+BRIDGE_FDB_MAC = {
+    "10:70:fd:b6:13:03": "dpu0"
+}
 
-class TestShowDHCPServer(object):
+
+class TestShowDHCPServerLease(object):
     def test_plugin_registration(self):
         cli = mock.MagicMock()
         show_dhcp_server.register(cli)
 
-    @pytest.mark.parametrize("state", ["disabled", "enabled"])
-    def test_show_dhcp_server_feature_state_checking(self, mock_db, state):
-        runner = CliRunner()
-        db = clicommon.Db()
-        db.db = mock_db
-        mock_db.set("CONFIG_DB", "FEATURE|dhcp_server", "state", state)
-        result = runner.invoke(show_dhcp_server.dhcp_server, obj=db)
-        if state == "disabled":
-            assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
-            assert "Feature dhcp_server is not enabled" in result.output
-        elif state == "enabled":
-            assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
-            assert "Usage: dhcp_server [OPTIONS] COMMAND [ARGS]" in result.output
-        else:
-            assert False
+    @pytest.fixture(scope="class", autouse=True)
+    def mock_run_cmd_fixture(self):
+        def mock_run_command(cmd, return_cmd=False, shell=False):
+            splits = cmd.split("sudo bridge fdb show | grep ")
+            if len(splits) == 2 and splits[1] in BRIDGE_FDB_MAC:
+                return ("{} dev {} master bridge-midplane".format(splits[1], BRIDGE_FDB_MAC[splits[1]]), 0)
+            else:
+                return ("", 0)
+
+        with mock.patch("utilities_common.cli.run_command", side_effect=mock_run_command):
+            yield
 
     def test_show_dhcp_server_ipv4_lease_without_dhcpintf(self, mock_db):
         expected_stdout = """\
-+---------------------+-------------------+-------------+---------------------+---------------------+
-| Interface           | MAC Address       | IP          | Lease Start         | Lease End           |
-+=====================+===================+=============+=====================+=====================+
-| Vlan1000|Ethernet10 | 10:70:fd:b6:13:00 | 192.168.0.1 | 2023-03-01 03:16:21 | 2023-03-01 03:31:21 |
-+---------------------+-------------------+-------------+---------------------+---------------------+
-| Vlan1000|Ethernet11 | 10:70:fd:b6:13:01 | 192.168.0.2 | 2023-03-01 03:16:21 | 2023-03-01 03:31:21 |
-+---------------------+-------------------+-------------+---------------------+---------------------+
-| Vlan1001|<Unknown>  | 10:70:fd:b6:13:02 | 192.168.0.3 | 2023-03-01 03:16:21 | 2023-03-01 03:31:21 |
-+---------------------+-------------------+-------------+---------------------+---------------------+
++----------------------+-------------------+-------------+---------------------+---------------------+
+| Interface            | MAC Address       | IP          | Lease Start         | Lease End           |
++======================+===================+=============+=====================+=====================+
+| Vlan1000|Ethernet10  | 10:70:fd:b6:13:00 | 192.168.0.1 | 2023-03-01 03:16:21 | 2023-03-01 03:31:21 |
++----------------------+-------------------+-------------+---------------------+---------------------+
+| Vlan1000|Ethernet11  | 10:70:fd:b6:13:01 | 192.168.0.2 | 2023-03-01 03:16:21 | 2023-03-01 03:31:21 |
++----------------------+-------------------+-------------+---------------------+---------------------+
+| Vlan1001|<Unknown>   | 10:70:fd:b6:13:02 | 192.168.0.3 | 2023-03-01 03:16:21 | 2023-03-01 03:31:21 |
++----------------------+-------------------+-------------+---------------------+---------------------+
+| bridge-midplane|dpu0 | 10:70:fd:b6:13:03 | 192.168.0.4 | 2023-03-01 03:16:21 | 2023-03-01 03:31:21 |
++----------------------+-------------------+-------------+---------------------+---------------------+
 """
         runner = CliRunner()
         db = clicommon.Db()
@@ -82,6 +84,28 @@ def test_show_dhcp_server_ipv4_lease_client_not_in_fdb(self, mock_db):
         assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
         assert result.stdout == expected_stdout
 
+
+class TestShowDHCPServer(object):
+    def test_plugin_registration(self):
+        cli = mock.MagicMock()
+        show_dhcp_server.register(cli)
+
+    @pytest.mark.parametrize("state", ["disabled", "enabled"])
+    def test_show_dhcp_server_feature_state_checking(self, mock_db, state):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        mock_db.set("CONFIG_DB", "FEATURE|dhcp_server", "state", state)
+        result = runner.invoke(show_dhcp_server.dhcp_server, obj=db)
+        if state == "disabled":
+            assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+            assert "Feature dhcp_server is not enabled" in result.output
+        elif state == "enabled":
+            assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+            assert "Usage: dhcp_server [OPTIONS] COMMAND [ARGS]" in result.output
+        else:
+            assert False
+
     def test_show_dhcp_server_ipv4_range_without_name(self, mock_db):
         expected_stdout = """\
 +---------+------------+------------+------------------------+
diff --git a/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py b/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
index 60bb64bafe4d..2e7a55a0f840 100644
--- a/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
@@ -1,4 +1,5 @@
 import click
+import re
 from tabulate import tabulate
 import utilities_common.cli as clicommon
 
@@ -6,7 +7,6 @@
 import ipaddress
 from datetime import datetime
 import fnmatch
-import re
 
 
 def ts_to_str(ts):
@@ -43,6 +43,12 @@ def lease(db, dhcp_interface):
         entry = dbconn.get_all("STATE_DB", key)
         interface, mac = key.split("|")[1:]
         port = dbconn.get("STATE_DB", "FDB_TABLE|" + interface + ":" + mac, "port")
+        if not port:
+            # Smart switch sample: aa:bb:cc:dd:ee:ff dev dpu0 master bridge-midplane
+            (out, _) = clicommon.run_command("sudo bridge fdb show | grep {}".format(mac), return_cmd=True, shell=True)
+            match = re.match(r'([0-9A-Fa-f]{2}:){5}[0-9A-Fa-f]{2} dev (.*) master (.*)', out)
+            if match and match.group(3).strip() == interface:
+                port = match.group(2).strip()
         if not port:
             port = "<Unknown>"
         table.append([interface + "|" + port, mac, entry["ip"], ts_to_str(entry["lease_start"]), ts_to_str(entry["lease_end"])])

From 25f2f3a0c79b36c988912bcc0ed78a4093ea9f10 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 1 Nov 2024 10:01:17 +0800
Subject: [PATCH 162/364] [submodule] Update submodule sonic-swss to the latest
 HEAD automatically (#20610)

#### Why I did it
src/sonic-swss
```
* 93f7c150 - (HEAD -> master, origin/master, origin/HEAD) Fix State Db LAG_MEMBER_TABLE removal not happening. (#3347) (10 hours ago) [abdosi]
* d76c34e4 - fix error in rif_rates.lua (#3218) (31 hours ago) [InspurSDN]
* a3aaa398 - Add suppport for SAI DASH appliance object (#3284) (32 hours ago) [Mukesh Moopath Velayudhan]
* 064f2e3d - Fix the tlm_teamd deleting STATE_DB LAG_TABLE entry. (6 days ago) [abdosi]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index bd945f673e0b..93f7c1508f70 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit bd945f673e0b2871debae5a951afd7de854d19f3
+Subproject commit 93f7c1508f70e9497caf0e388b8b9f726c9d8e74

From 5bd84dd584fc6963b601d4b8684e247a9c1e2be4 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 1 Nov 2024 19:02:53 +0800
Subject: [PATCH 163/364] [submodule] Update submodule sonic-swss to the latest
 HEAD automatically (#20671)

#### Why I did it
src/sonic-swss
```
* 9dd28489 - (HEAD -> master, origin/master, origin/HEAD) trap_rates.lua get value error (#3219) (3 hours ago) [InspurSDN]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 93f7c1508f70..9dd28489339f 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 93f7c1508f70e9497caf0e388b8b9f726c9d8e74
+Subproject commit 9dd28489339fb5e5c940afee74d1dfdb3c53cd46

From 4fe22ce8c85fd5cf2d2bae2dc304a7844c8feca6 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 1 Nov 2024 19:02:58 +0800
Subject: [PATCH 164/364] [submodule] Update submodule sonic-platform-common to
 the latest HEAD automatically (#20670)

#### Why I did it
src/sonic-platform-common
```
* 59babf5 - (HEAD -> master, origin/master, origin/HEAD) Add/modify VDM and Status related cmis fields for onboarding xcvr diagnostic features (#510) (3 hours ago) [mihirpat1]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 4668bdcb68c6..59babf59f9aa 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 4668bdcb68c646ff4b92f805d1b70c84647051f6
+Subproject commit 59babf59f9aa611b84082896391b01a39ffcb866

From c372a26302702d121d9f968172d21c694f0f6d22 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 1 Nov 2024 19:03:07 +0800
Subject: [PATCH 165/364] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#20668)

#### Why I did it
src/sonic-host-services
```
* 13a5419 - (HEAD -> master, origin/master, origin/HEAD) Correct real time CPU Utilization calculation (#173) (3 hours ago) [Feng-msft]
* f95b7cd - Optimize state_db update into batch way. (#176) (3 hours ago) [Feng-msft]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index 47fd12892058..13a5419eaf9e 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit 47fd1289205874a95ca2886d676e0221d62e7aab
+Subproject commit 13a5419eaf9e4f7795aa1df465bb7a1340bfa2d5

From 47a4e04307052d0fb850df98922e54be967f6414 Mon Sep 17 00:00:00 2001
From: Senthil Kumar Guruswamy <75792349+sg893052@users.noreply.github.com>
Date: Sat, 2 Nov 2024 02:28:06 +0530
Subject: [PATCH 166/364] Upgrade broadcom platform containers(syncd) to
 Bookworm (#19712)

---
 platform/broadcom/docker-saiserver-brcm.mk            |  4 ++--
 platform/broadcom/docker-saiserver-brcm/Dockerfile.j2 |  2 +-
 platform/broadcom/docker-syncd-brcm-dnx-rpc.mk        |  2 +-
 platform/broadcom/docker-syncd-brcm-dnx.mk            | 10 +++++-----
 platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2 |  2 +-
 platform/broadcom/docker-syncd-brcm-rpc.mk            |  2 +-
 platform/broadcom/docker-syncd-brcm.mk                |  2 +-
 platform/broadcom/docker-syncd-brcm/Dockerfile.j2     |  2 +-
 8 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/platform/broadcom/docker-saiserver-brcm.mk b/platform/broadcom/docker-saiserver-brcm.mk
index 6987e42faa78..389578d98b72 100644
--- a/platform/broadcom/docker-saiserver-brcm.mk
+++ b/platform/broadcom/docker-saiserver-brcm.mk
@@ -10,9 +10,9 @@ $(SYNCD_INIT_COMMON_SCRIPT)_PATH = $(SRC_PATH)/sonic-sairedis/syncd/scripts
 SONIC_COPY_FILES += $(SYNCD_INIT_COMMON_SCRIPT)
 
 $(DOCKER_SAISERVER_BRCM)_FILES += $(DSSERVE) $(BCMCMD) $(SYNCD_INIT_COMMON_SCRIPT)
-$(DOCKER_SAISERVER_BRCM)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BULLSEYE)
+$(DOCKER_SAISERVER_BRCM)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
 SONIC_DOCKER_IMAGES += $(DOCKER_SAISERVER_BRCM)
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_SAISERVER_BRCM)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_SAISERVER_BRCM)
 
 #Support two versions of saiserver
 $(DOCKER_SAISERVER_BRCM)_CONTAINER_NAME = saiserver$(SAITHRIFT_VER)
diff --git a/platform/broadcom/docker-saiserver-brcm/Dockerfile.j2 b/platform/broadcom/docker-saiserver-brcm/Dockerfile.j2
index 2e83500b7ea1..474278b224de 100644
--- a/platform/broadcom/docker-saiserver-brcm/Dockerfile.j2
+++ b/platform/broadcom/docker-saiserver-brcm/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages %}
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 
diff --git a/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk b/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk
index a7ca064b0912..0416007a2c25 100644
--- a/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk
+++ b/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk
@@ -30,4 +30,4 @@ $(DOCKER_SYNCD_BRCM_DNX_RPC)_BASE_IMAGE_FILES += bcmcmd:/usr/bin/bcmcmd
 $(DOCKER_SYNCD_BRCM_DNX_RPC)_BASE_IMAGE_FILES += bcmsh:/usr/bin/bcmsh
 $(DOCKER_SYNCD_BRCM_DNX_RPC)_MACHINE = broadcom-dnx
 
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_SYNCD_BRCM_DNX_RPC)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_SYNCD_BRCM_DNX_RPC)
diff --git a/platform/broadcom/docker-syncd-brcm-dnx.mk b/platform/broadcom/docker-syncd-brcm-dnx.mk
index 4cba4867c9ca..4276e1125445 100644
--- a/platform/broadcom/docker-syncd-brcm-dnx.mk
+++ b/platform/broadcom/docker-syncd-brcm-dnx.mk
@@ -7,9 +7,9 @@ DOCKER_SYNCD_DNX_PLATFORM_CODE = brcm-dnx
 $(DOCKER_SYNCD_DNX_BASE)_PATH = $(PLATFORM_PATH)/docker-syncd-$(DOCKER_SYNCD_DNX_PLATFORM_CODE)
 $(DOCKER_SYNCD_DNX_BASE)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
 
-$(DOCKER_SYNCD_DNX_BASE)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BULLSEYE)
-$(DOCKER_SYNCD_DNX_BASE)_DBG_DEPENDS += $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_DEPENDS)
-$(DOCKER_SYNCD_DNX_BASE)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_IMAGE_PACKAGES)
+$(DOCKER_SYNCD_DNX_BASE)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
+$(DOCKER_SYNCD_DNX_BASE)_DBG_DEPENDS += $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS)
+$(DOCKER_SYNCD_DNX_BASE)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
 SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_DNX_BASE)
 ifneq ($(ENABLE_SYNCD_RPC),y)
@@ -47,5 +47,5 @@ $(DOCKER_SYNCD_DNX_BASE)_BASE_IMAGE_FILES += bcmcmd:/usr/bin/bcmcmd
 $(DOCKER_SYNCD_DNX_BASE)_BASE_IMAGE_FILES += bcmsh:/usr/bin/bcmsh
 $(DOCKER_SYNCD_DNX_BASE)_BASE_IMAGE_FILES += bcm_common:/usr/bin/bcm_common
 
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_SYNCD_DNX_BASE)
-SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_SYNCD_DNX_BASE_DBG)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_SYNCD_DNX_BASE)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_SYNCD_DNX_BASE_DBG)
diff --git a/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2
index 8bf6a4e50289..160a1380140f 100755
--- a/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2
+++ b/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages %}
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 
diff --git a/platform/broadcom/docker-syncd-brcm-rpc.mk b/platform/broadcom/docker-syncd-brcm-rpc.mk
index 95810f1cb477..929642331598 100644
--- a/platform/broadcom/docker-syncd-brcm-rpc.mk
+++ b/platform/broadcom/docker-syncd-brcm-rpc.mk
@@ -29,4 +29,4 @@ $(DOCKER_SYNCD_BRCM_RPC)_BASE_IMAGE_FILES += bcmcmd:/usr/bin/bcmcmd
 $(DOCKER_SYNCD_BRCM_RPC)_BASE_IMAGE_FILES += bcmsh:/usr/bin/bcmsh
 $(DOCKER_SYNCD_BRCM_RPC)_MACHINE = broadcom
 
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_SYNCD_BRCM_RPC)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_SYNCD_BRCM_RPC)
diff --git a/platform/broadcom/docker-syncd-brcm.mk b/platform/broadcom/docker-syncd-brcm.mk
index 315c27a416d8..823a3707955b 100644
--- a/platform/broadcom/docker-syncd-brcm.mk
+++ b/platform/broadcom/docker-syncd-brcm.mk
@@ -1,7 +1,7 @@
 # docker image for brcm syncd
 
 DOCKER_SYNCD_PLATFORM_CODE = brcm
-include $(PLATFORM_PATH)/../template/docker-syncd-bullseye.mk
+include $(PLATFORM_PATH)/../template/docker-syncd-bookworm.mk
 
 $(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD)
 $(DOCKER_SYNCD_BASE)_DEPENDS += $(BRCM_XGS_SAI)
diff --git a/platform/broadcom/docker-syncd-brcm/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm/Dockerfile.j2
index 4037ddc6af1a..084808831245 100755
--- a/platform/broadcom/docker-syncd-brcm/Dockerfile.j2
+++ b/platform/broadcom/docker-syncd-brcm/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages %}
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 

From 9af70fe9809c038125d40beab0eed2c470bc41b1 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 2 Nov 2024 19:14:24 +0800
Subject: [PATCH 167/364] [submodule] Update submodule sonic-swss to the latest
 HEAD automatically (#20677)

#### Why I did it
src/sonic-swss
```
* 368e1d62 - (HEAD -> master, origin/master, origin/HEAD) [MultiDB]:sonic-swss replace old API with new APIs (#3292) (11 hours ago) [PanXuntao]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 9dd28489339f..368e1d62674f 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 9dd28489339fb5e5c940afee74d1dfdb3c53cd46
+Subproject commit 368e1d62674ff511b241f10ea8e0933398a357bd

From 8a805ba38039dc2bb7b6b94073fe938c7170119c Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 3 Nov 2024 19:40:30 +0800
Subject: [PATCH 168/364] [submodule] Update submodule sonic-gnmi to the latest
 HEAD automatically (#20675)

#### Why I did it
src/sonic-gnmi
```
* e844925 - (HEAD -> master, origin/master, origin/HEAD) Add support for RebootMethod_HALT for Reboot API (#286) (28 hours ago) [Vasundhara Volam]
* e5125cb - Merge pull request #316 from hdwhdw/ignore (31 hours ago) [Dawei Huang]
* c702d31 - Add build artifacts to gitignore. (2 days ago) [Dawei Huang]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 743c7afac122..e8449250bec2 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 743c7afac122d07701de9077150edd22b72a265c
+Subproject commit e8449250bec233c81cf4b6aa324c26da7fea5732

From 665c8e6f0e1ddffd4999954ccf77a0747edd8254 Mon Sep 17 00:00:00 2001
From: Yuanzhe <150663541+yuazhe@users.noreply.github.com>
Date: Mon, 4 Nov 2024 14:39:35 +0800
Subject: [PATCH 169/364] [Mellanox] updating sensors.conf and psu_sensors.json
 accordingly (#19927)

- Why I did it
Support new psu model and align to hw definition

- How I did it
Add psu model MTEF-AC-I data to psu_sensors.json
Add place holder for model MTEF-AC-G-DELTA
Fix 4700/4700a1 inverted psu designation

- How to verify it
check the sensors command output on system with the psu model MTEF-AC-I

Signed-off-by: Yuanzhe, Liu <yualiu@nvidia.com>
---
 .../x86_64-mlnx_msn2700-r0/psu_sensors.json   | 23 +++++++++++++----
 .../x86_64-mlnx_msn4700-r0/sensors.conf       | 24 +++++++++---------
 .../x86_64-mlnx_msn4700-r0/sensors.conf.a1    | 25 ++++++++++---------
 3 files changed, 43 insertions(+), 29 deletions(-)

diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json b/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json
index 73f011e29d71..abd2e8a183f1 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json
@@ -219,8 +219,8 @@
                     "i2c-1-mux (chan_id 3)"
                 ],
                 "chip": {
-                    "dps460-i2c-*-58": ["1", "L"],
-                    "dps460-i2c-*-59": ["2", "R"]
+                    "dps460-i2c-*-58": ["2", "R"],
+                    "dps460-i2c-*-59": ["1", "L"]
                 }
             },
             "a1": {
@@ -229,8 +229,8 @@
                     "i2c-1-mux (chan_id 3)"
                 ],
                 "chip": {
-                    "dps460-i2c-*-58": ["1", "L"],
-                    "dps460-i2c-*-59": ["2", "R"]
+                    "dps460-i2c-*-58": ["2", "R"],
+                    "dps460-i2c-*-59": ["1", "L"]
                 }                
             }
         },
@@ -376,8 +376,21 @@
                 "curr2 PSU 12V Rail Curr (out)"
             ]
         },
-        "MTEF-AC-I": {
+        "MTEF-AC-G-DELTA":{
 
+        },
+        "MTEF-AC-I": {
+            "label": [
+                "in1 PSU 220V Rail (in)",
+                "in2 PSU 12V Rail (out)",
+                "fan1 PSU Fan 1",
+                "temp1 PSU Temp 1",
+                "temp2 PSU Temp 2",
+                "power1 PSU 220V Rail Pwr (in)",
+                "power2 PSU 12V Rail Pwr (out)",
+                "curr1 PSU 220V Rail Curr (in)",
+                "curr2 PSU 12V Rail Curr (out)"
+            ]
         },
         "MTEF-AC-M": {
             "label": [
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf
index 280118e43ef1..6b6205cc5493 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf
@@ -188,18 +188,6 @@ bus "i2c-15" "i2c-1-mux (chan_id 6)"
 # Power supplies
 bus "i2c-4" "i2c-1-mux (chan_id 3)"
     chip "dps460-i2c-*-58"
-        label in1 "PSU-1(L) 220V Rail (in)"
-        ignore in2
-        label in3 "PSU-1(L) 12V Rail (out)"
-        label fan1 "PSU-1(L) Fan 1"
-        label temp1 "PSU-1(L) Temp 1"
-        label temp2 "PSU-1(L) Temp 2"
-        label temp3 "PSU-1(L) Temp 3"
-        label power1 "PSU-1(L) 220V Rail Pwr (in)"
-        label power2 "PSU-1(L) 12V Rail Pwr (out)"
-        label curr1 "PSU-1(L) 220V Rail Curr (in)"
-        label curr2 "PSU-1(L) 12V Rail Curr (out)"
-    chip "dps460-i2c-*-59"
         label in1 "PSU-2(R) 220V Rail (in)"
         ignore in2
         label in3 "PSU-2(R) 12V Rail (out)"
@@ -211,6 +199,18 @@ bus "i2c-4" "i2c-1-mux (chan_id 3)"
         label power2 "PSU-2(R) 12V Rail Pwr (out)"
         label curr1 "PSU-2(R) 220V Rail Curr (in)"
         label curr2 "PSU-2(R) 12V Rail Curr (out)"
+    chip "dps460-i2c-*-59"
+        label in1 "PSU-1(L) 220V Rail (in)"
+        ignore in2
+        label in3 "PSU-1(L) 12V Rail (out)"
+        label fan1 "PSU-1(L) Fan 1"
+        label temp1 "PSU-1(L) Temp 1"
+        label temp2 "PSU-1(L) Temp 2"
+        label temp3 "PSU-1(L) Temp 3"
+        label power1 "PSU-1(L) 220V Rail Pwr (in)"
+        label power2 "PSU-1(L) 12V Rail Pwr (out)"
+        label curr1 "PSU-1(L) 220V Rail Curr (in)"
+        label curr2 "PSU-1(L) 12V Rail Curr (out)"
 
 # Chassis fans
 chip "mlxreg_fan-isa-*"
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf.a1 b/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf.a1
index e85dca5aecba..af5b9c33cd4f 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf.a1
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf.a1
@@ -133,18 +133,6 @@ bus "i2c-15" "i2c-1-mux (chan_id 6)"
 # Power supplies
 bus "i2c-4" "i2c-1-mux (chan_id 3)"
     chip "dps460-i2c-*-58"
-        label in1 "PSU-1(L) 220V Rail (in)"
-        ignore in2
-        label in3 "PSU-1(L) 12V Rail (out)"
-        label fan1 "PSU-1(L) Fan 1"
-        label temp1 "PSU-1(L) Temp 1"
-        label temp2 "PSU-1(L) Temp 2"
-        label temp3 "PSU-1(L) Temp 3"
-        label power1 "PSU-1(L) 220V Rail Pwr (in)"
-        label power2 "PSU-1(L) 12V Rail Pwr (out)"
-        label curr1 "PSU-1(L) 220V Rail Curr (in)"
-        label curr2 "PSU-1(L) 12V Rail Curr (out)"
-    chip "dps460-i2c-*-59"
         label in1 "PSU-2(R) 220V Rail (in)"
         ignore in2
         label in3 "PSU-2(R) 12V Rail (out)"
@@ -156,6 +144,19 @@ bus "i2c-4" "i2c-1-mux (chan_id 3)"
         label power2 "PSU-2(R) 12V Rail Pwr (out)"
         label curr1 "PSU-2(R) 220V Rail Curr (in)"
         label curr2 "PSU-2(R) 12V Rail Curr (out)"
+    chip "dps460-i2c-*-59"
+        label in1 "PSU-1(L) 220V Rail (in)"
+        ignore in2
+        label in3 "PSU-1(L) 12V Rail (out)"
+        label fan1 "PSU-1(L) Fan 1"
+        label temp1 "PSU-1(L) Temp 1"
+        label temp2 "PSU-1(L) Temp 2"
+        label temp3 "PSU-1(L) Temp 3"
+        label power1 "PSU-1(L) 220V Rail Pwr (in)"
+        label power2 "PSU-1(L) 12V Rail Pwr (out)"
+        label curr1 "PSU-1(L) 220V Rail Curr (in)"
+        label curr2 "PSU-1(L) 12V Rail Curr (out)"
+
 
 # Chassis fans
 chip "mlxreg_fan-isa-*"

From a9ecc92dad345e99e7f374177f28179f620cd4c2 Mon Sep 17 00:00:00 2001
From: Nazarii Hnydyn <nazariig@nvidia.com>
Date: Mon, 4 Nov 2024 19:43:31 +0200
Subject: [PATCH 170/364] [Mellanox]: Clean up syncd Python development
 packages (#20556)

Resolves: #20419

Why I did it
To clean up syncd environment
How I did it
Removed python development packages from a Dockerfile template
How to verify it
make configure PLATFORM=mellanox
make target/sonic-mellanox.bin
---
 .../mellanox/docker-syncd-mlnx/Dockerfile.j2  | 22 +++++++++++--------
 1 file changed, 13 insertions(+), 9 deletions(-)

diff --git a/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 b/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2
index adb74ee4127a..62c3c6a9e1c7 100755
--- a/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2
+++ b/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2
@@ -1,5 +1,6 @@
 ##
-## Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES.
+## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+## Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 ## Apache-2.0
 ##
 ## Licensed under the Apache License, Version 2.0 (the "License");
@@ -14,6 +15,7 @@
 ## See the License for the specific language governing permissions and
 ## limitations under the License.
 ##
+
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
 FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
@@ -26,15 +28,14 @@ ENV DEBIAN_FRONTEND=noninteractive
 
 RUN apt-get update && \
     apt-get install -y \
-        libxml2     \
-        python3-pip  \
-        python3-dev \
-        python-is-python3 \
-        python3-jsonschema \
 {%- if ENABLE_ASAN == "y" %}
         libasan6 \
 {%- endif %}
-        python3-setuptools
+        libxml2 \
+        python3-pip \
+        python3-dev \
+        python3-jsonschema \
+        python-is-python3
 
 RUN pip3 install --upgrade pip
 RUN apt-get purge -y python-pip
@@ -56,8 +57,11 @@ RUN apt-get purge -y python-pip
 {% endif %}
 
 ## Clean up
-RUN apt-get clean -y && \
-    apt-get autoclean -y && \
+RUN apt-get purge -y         \
+        python3-dev          \
+        python3-pip       && \
+    apt-get clean -y      && \
+    apt-get autoclean -y  && \
     apt-get autoremove -y && \
     rm -rf /debs
 

From 33000a5201231b279d427fddbe22df2eba1b0aad Mon Sep 17 00:00:00 2001
From: Stepan Blyshchak <38952541+stepanblyschak@users.noreply.github.com>
Date: Mon, 4 Nov 2024 19:53:29 +0200
Subject: [PATCH 171/364] [finalize-warmboot.sh] reset cpufreq governor to
 default (#19634)

#### Why I did it

Set cpufreq.default_governor to *performance* for faster boot time. We observe consistent 1 sec improvement across several devices.

The change in finalize-warmboot.sh restores the default governor after fast or warm boot is finished.

**NOTE**: This will apply to upgrades starting from 202405 since this is set in shutdown path to avoid any extra scripts running at boot time. Upgrade from older versions/branches will require a runtime patch to fast-reboot and warm-reboot script.

#### How I did it

After fast or warm boot is finished restore to default governor.

#### How to verify it

Run fast-reboot or warm-reboot. Check:
```
admin@sonic:~$ cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor
performance
```

After boot is finalized check that it is reset back to default:
```
admin@sonic:~$ cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor
schedutil
```

Tested with https://github.com/sonic-net/sonic-utilities/pull/3435
---
 .../warmboot-finalizer/finalize-warmboot.sh   | 21 +++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/files/image_config/warmboot-finalizer/finalize-warmboot.sh b/files/image_config/warmboot-finalizer/finalize-warmboot.sh
index b01832a6c7b8..492ad4792e86 100755
--- a/files/image_config/warmboot-finalizer/finalize-warmboot.sh
+++ b/files/image_config/warmboot-finalizer/finalize-warmboot.sh
@@ -2,6 +2,9 @@
 
 VERBOSE=no
 
+# read SONiC immutable variables
+[ -f /etc/sonic/sonic-environment ] && . /etc/sonic/sonic-environment
+
 # Define components that needs to reconcile during warm
 # boot:
 #       The key is the name of the service that the components belong to.
@@ -101,16 +104,34 @@ function check_list()
     echo ${RET_LIST}
 }
 
+function set_cpufreq_governor() {
+    local -r governor="$1"
+    echo "$governor" | tee /sys/devices/system/cpu/cpu*/cpufreq/scaling_governor 1> /dev/null \
+        && debug "Set CPUFreq scaling governor to $governor" \
+        || debug "Failed to set CPUFreq scaling governor to $governor"
+}
+
+function finalize_common() {
+    local -r asic_type=${ASIC_TYPE:-`sonic-cfggen -y /etc/sonic/sonic_version.yml -v asic_type`}
+
+    if [[ "$asic_type" == "mellanox" ]]; then
+        # Read default governor from kernel config
+        local -r default_governor=$(cat "/boot/config-$(uname -r)" | grep -E 'CONFIG_CPU_FREQ_DEFAULT_GOV_.*=y' | sed -E 's/CONFIG_CPU_FREQ_DEFAULT_GOV_(.*)=y/\1/')
+        set_cpufreq_governor "$default_governor"
+    fi
+}
 
 function finalize_warm_boot()
 {
     debug "Finalizing warmboot..."
+    finalize_common
     sudo config warm_restart disable
 }
 
 function finalize_fast_reboot()
 {
     debug "Finalizing fast-reboot..."
+    finalize_common
     sonic-db-cli STATE_DB hset "FAST_RESTART_ENABLE_TABLE|system" "enable" "false" &>/dev/null
     sonic-db-cli CONFIG_DB DEL "WARM_RESTART|teamd" &>/dev/null
 }

From 060100725bd90f9dba7778e0e798acce74be106f Mon Sep 17 00:00:00 2001
From: Hua Liu <58683130+liuh-80@users.noreply.github.com>
Date: Tue, 5 Nov 2024 03:41:53 +0800
Subject: [PATCH 172/364] Add VRF parameter to orchagent and GNMI start script.
 (#20345)

Add VRF parameter to orchagent and GNMI start script.

Why I did it
Orchagent failed bind to ZMQ when mgmt VRF enabled: #19638

How I did it
Add VRF parameter to orchagent and GNMI start script when mgmt-vrf feature enabled.

How to verify it
Pass all UT.
---
 dockers/docker-orchagent/orchagent.sh    | 6 ++++++
 dockers/docker-sonic-gnmi/gnmi-native.sh | 6 ++++++
 2 files changed, 12 insertions(+)

diff --git a/dockers/docker-orchagent/orchagent.sh b/dockers/docker-orchagent/orchagent.sh
index 705e1ea0db5d..256def591807 100755
--- a/dockers/docker-orchagent/orchagent.sh
+++ b/dockers/docker-orchagent/orchagent.sh
@@ -97,4 +97,10 @@ if [[ x"${LOCALHOST_SUBTYPE}" == x"SmartSwitch" ]]; then
     fi
 fi
 
+# Add VRF parameter when mgmt-vrf enabled
+MGMT_VRF_ENABLED=`sonic-db-cli CONFIG_DB hget  "MGMT_VRF_CONFIG|vrf_global" "mgmtVrfEnabled"`
+if [[ x"${MGMT_VRF_ENABLED}" == x"true" ]]; then
+    ORCHAGENT_ARGS+=" -v mgmt"
+fi
+
 exec /usr/bin/orchagent ${ORCHAGENT_ARGS}
diff --git a/dockers/docker-sonic-gnmi/gnmi-native.sh b/dockers/docker-sonic-gnmi/gnmi-native.sh
index e9f15810a226..b9241dca1d6a 100755
--- a/dockers/docker-sonic-gnmi/gnmi-native.sh
+++ b/dockers/docker-sonic-gnmi/gnmi-native.sh
@@ -78,6 +78,12 @@ if [[ x"${LOCALHOST_SUBTYPE}" == x"SmartSwitch" ]]; then
     TELEMETRY_ARGS+=" -zmq_port=8100"
 fi
 
+# Add VRF parameter when mgmt-vrf enabled
+MGMT_VRF_ENABLED=`sonic-db-cli CONFIG_DB hget  "MGMT_VRF_CONFIG|vrf_global" "mgmtVrfEnabled"`
+if [[ x"${MGMT_VRF_ENABLED}" == x"true" ]]; then
+    TELEMETRY_ARGS+=" --vrf mgmt"
+fi
+
 # Server will handle threshold connections consecutively
 THRESHOLD_CONNECTIONS=$(echo $GNMI | jq -r '.threshold')
 if [[ $THRESHOLD_CONNECTIONS =~ ^[0-9]+$ ]]; then

From 11ae762deeaa47b296b5e6810a381355a16c45b2 Mon Sep 17 00:00:00 2001
From: Chris <156943338+ccroy-arista@users.noreply.github.com>
Date: Mon, 4 Nov 2024 17:20:27 -0800
Subject: [PATCH 173/364] sonic-buildimage: 7060x6-64pe c224o8 support (#20673)

Why I did it
Baseline implementation for C224O8 support in the Arista-7060X6-64PE (DCS-7060X6-64PE).

How I did it
Added the necessary files for baseline implementation of C224O8 implementation for Quicksilver OSFP.

How to verify it
Load DUT with these changes and confirm that the relevant interfaces are up.

Which release branch to backport (provide reason below if selected)
 202405
Tested branch (Please provide the tested image version)
202405

Description for the changelog
Baseline support for the Arista-7060X6-64PE-C224O8 platform variant.
---
 .../Arista-7060X6-64PE-C224O8/BALANCED        |    1 +
 .../Arista-7060X6-64PE-C224O8/buffer_ports.j2 |   40 +
 .../Arista-7060X6-64PE-C224O8/buffers.json.j2 |    2 +
 .../buffers_defaults_t0.j2                    |    1 +
 .../buffers_defaults_t1.j2                    |    1 +
 .../Arista-7060X6-64PE-C224O8/hwsku.json      |  106 +
 .../pg_profile_lookup.ini                     |    1 +
 .../Arista-7060X6-64PE-C224O8/port_config.ini |  235 +++
 .../Arista-7060X6-64PE-C224O8/qos.json.j2     |    1 +
 .../Arista-7060X6-64PE-C224O8/sai.profile     |    1 +
 .../th5-a7060x6-64pe.config.bcm               | 1850 +++++++++++++++++
 11 files changed, 2239 insertions(+)
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/BALANCED
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/buffer_ports.j2
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/buffers.json.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/buffers_defaults_t0.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/buffers_defaults_t1.j2
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/hwsku.json
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/pg_profile_lookup.ini
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/port_config.ini
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/qos.json.j2
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/sai.profile
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/th5-a7060x6-64pe.config.bcm

diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/BALANCED b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/BALANCED
new file mode 120000
index 000000000000..afd21766cc64
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/BALANCED
@@ -0,0 +1 @@
+../../../common/profiles/th5/gen/BALANCED
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/buffer_ports.j2
new file mode 100644
index 000000000000..fe42c2f9926a
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/buffer_ports.j2
@@ -0,0 +1,40 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for i in range(0, 12, 2) %}
+        {%- for j in range(0, 8) %}
+            {%- if PORT_ALL.append("Ethernet%d" % (i * 8 + j)) %}{%- endif %}
+        {%- endfor %}
+    {%- endfor %}
+
+    {%- if PORT_ALL.append("Ethernet96") %}{%- endif %}
+    {%- if PORT_ALL.append("Ethernet100") %}{%- endif %}
+
+    {%- for j in range(0, 8) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (14 * 8 + j)) %}{%- endif %}
+    {%- endfor %}
+
+    {%- if PORT_ALL.append("Ethernet128") %}{%- endif %}
+    {%- if PORT_ALL.append("Ethernet132") %}{%- endif %}
+
+    {%- for i in range(18, 44, 2) %}
+        {%- for j in range(0, 8) %}
+            {%- if PORT_ALL.append("Ethernet%d" % (i * 8 + j)) %}{%- endif %}
+        {%- endfor %}
+    {%- endfor %}
+
+    {%- if PORT_ALL.append("Ethernet352") %}{%- endif %}
+    {%- if PORT_ALL.append("Ethernet356") %}{%- endif %}
+
+    {%- for j in range(0, 8) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (46 * 8 + j)) %}{%- endif %}
+    {%- endfor %}
+
+    {%- if PORT_ALL.append("Ethernet384") %}{%- endif %}
+    {%- if PORT_ALL.append("Ethernet388") %}{%- endif %}
+
+    {%- for i in range(50, 64, 2) %}
+        {%- for j in range(0, 8) %}
+            {%- if PORT_ALL.append("Ethernet%d" % (i * 8 + j)) %}{%- endif %}
+        {%- endfor %}
+    {%- endfor %}
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/buffers.json.j2
new file mode 100644
index 000000000000..0b1cb2c541b6
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/buffers_defaults_t0.j2
new file mode 120000
index 000000000000..9524e6a476ac
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/buffers_defaults_t1.j2
new file mode 120000
index 000000000000..c25cc95d6d57
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/buffers_defaults_t1.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/hwsku.json b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/hwsku.json
new file mode 100644
index 000000000000..e4b843010f44
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/hwsku.json
@@ -0,0 +1,106 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "8x100G"
+        },
+        "Ethernet512": {
+            "default_brkout_mode": "1x10G"
+        },
+        "Ethernet513": {
+            "default_brkout_mode": "1x10G"
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/pg_profile_lookup.ini
new file mode 120000
index 000000000000..297cddb2d223
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/pg_profile_lookup.ini
@@ -0,0 +1 @@
+BALANCED/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/port_config.ini
new file mode 100644
index 000000000000..16af3bf4760b
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/port_config.ini
@@ -0,0 +1,235 @@
+# name          lanes                           alias           index   speed   fec
+Ethernet0       17                              Ethernet1/1     1       100000  rs
+Ethernet1       18                              Ethernet1/2     1       100000  rs
+Ethernet2       19                              Ethernet1/3     1       100000  rs
+Ethernet3       20                              Ethernet1/4     1       100000  rs
+Ethernet4       21                              Ethernet1/5     1       100000  rs
+Ethernet5       22                              Ethernet1/6     1       100000  rs
+Ethernet6       23                              Ethernet1/7     1       100000  rs
+Ethernet7       24                              Ethernet1/8     1       100000  rs
+Ethernet16      9                               Ethernet3/1     3       100000  rs
+Ethernet17      10                              Ethernet3/2     3       100000  rs
+Ethernet18      11                              Ethernet3/3     3       100000  rs
+Ethernet19      12                              Ethernet3/4     3       100000  rs
+Ethernet20      13                              Ethernet3/5     3       100000  rs
+Ethernet21      14                              Ethernet3/6     3       100000  rs
+Ethernet22      15                              Ethernet3/7     3       100000  rs
+Ethernet23      16                              Ethernet3/8     3       100000  rs
+Ethernet32      57                              Ethernet5/1     5       100000  rs
+Ethernet33      58                              Ethernet5/2     5       100000  rs
+Ethernet34      59                              Ethernet5/3     5       100000  rs
+Ethernet35      60                              Ethernet5/4     5       100000  rs
+Ethernet36      61                              Ethernet5/5     5       100000  rs
+Ethernet37      62                              Ethernet5/6     5       100000  rs
+Ethernet38      63                              Ethernet5/7     5       100000  rs
+Ethernet39      64                              Ethernet5/8     5       100000  rs
+Ethernet48      33                              Ethernet7/1     7       100000  rs
+Ethernet49      34                              Ethernet7/2     7       100000  rs
+Ethernet50      35                              Ethernet7/3     7       100000  rs
+Ethernet51      36                              Ethernet7/4     7       100000  rs
+Ethernet52      37                              Ethernet7/5     7       100000  rs
+Ethernet53      38                              Ethernet7/6     7       100000  rs
+Ethernet54      39                              Ethernet7/7     7       100000  rs
+Ethernet55      40                              Ethernet7/8     7       100000  rs
+Ethernet64      89                              Ethernet9/1     9       100000  rs
+Ethernet65      90                              Ethernet9/2     9       100000  rs
+Ethernet66      91                              Ethernet9/3     9       100000  rs
+Ethernet67      92                              Ethernet9/4     9       100000  rs
+Ethernet68      93                              Ethernet9/5     9       100000  rs
+Ethernet69      94                              Ethernet9/6     9       100000  rs
+Ethernet70      95                              Ethernet9/7     9       100000  rs
+Ethernet71      96                              Ethernet9/8     9       100000  rs
+Ethernet80      65                              Ethernet11/1    11      100000  rs
+Ethernet81      66                              Ethernet11/2    11      100000  rs
+Ethernet82      67                              Ethernet11/3    11      100000  rs
+Ethernet83      68                              Ethernet11/4    11      100000  rs
+Ethernet84      69                              Ethernet11/5    11      100000  rs
+Ethernet85      70                              Ethernet11/6    11      100000  rs
+Ethernet86      71                              Ethernet11/7    11      100000  rs
+Ethernet87      72                              Ethernet11/8    11      100000  rs
+Ethernet96      121,122,123,124                 Ethernet13/1    13      400000  rs
+Ethernet100     125,126,127,128                 Ethernet13/5    13      400000  rs
+Ethernet112     97                              Ethernet15/1    15      100000  rs
+Ethernet113     98                              Ethernet15/2    15      100000  rs
+Ethernet114     99                              Ethernet15/3    15      100000  rs
+Ethernet115     100                             Ethernet15/4    15      100000  rs
+Ethernet116     101                             Ethernet15/5    15      100000  rs
+Ethernet117     102                             Ethernet15/6    15      100000  rs
+Ethernet118     103                             Ethernet15/7    15      100000  rs
+Ethernet119     104                             Ethernet15/8    15      100000  rs
+Ethernet128     153,154,155,156                 Ethernet17/1    17      400000  rs
+Ethernet132     157,158,159,160                 Ethernet17/5    17      400000  rs
+Ethernet144     129                             Ethernet19/1    19      100000  rs
+Ethernet145     130                             Ethernet19/2    19      100000  rs
+Ethernet146     131                             Ethernet19/3    19      100000  rs
+Ethernet147     132                             Ethernet19/4    19      100000  rs
+Ethernet148     133                             Ethernet19/5    19      100000  rs
+Ethernet149     134                             Ethernet19/6    19      100000  rs
+Ethernet150     135                             Ethernet19/7    19      100000  rs
+Ethernet151     136                             Ethernet19/8    19      100000  rs
+Ethernet160     185                             Ethernet21/1    21      100000  rs
+Ethernet161     186                             Ethernet21/2    21      100000  rs
+Ethernet162     187                             Ethernet21/3    21      100000  rs
+Ethernet163     188                             Ethernet21/4    21      100000  rs
+Ethernet164     189                             Ethernet21/5    21      100000  rs
+Ethernet165     190                             Ethernet21/6    21      100000  rs
+Ethernet166     191                             Ethernet21/7    21      100000  rs
+Ethernet167     192                             Ethernet21/8    21      100000  rs
+Ethernet176     161                             Ethernet23/1    23      100000  rs
+Ethernet177     162                             Ethernet23/2    23      100000  rs
+Ethernet178     163                             Ethernet23/3    23      100000  rs
+Ethernet179     164                             Ethernet23/4    23      100000  rs
+Ethernet180     165                             Ethernet23/5    23      100000  rs
+Ethernet181     166                             Ethernet23/6    23      100000  rs
+Ethernet182     167                             Ethernet23/7    23      100000  rs
+Ethernet183     168                             Ethernet23/8    23      100000  rs
+Ethernet192     217                             Ethernet25/1    25      100000  rs
+Ethernet193     218                             Ethernet25/2    25      100000  rs
+Ethernet194     219                             Ethernet25/3    25      100000  rs
+Ethernet195     220                             Ethernet25/4    25      100000  rs
+Ethernet196     221                             Ethernet25/5    25      100000  rs
+Ethernet197     222                             Ethernet25/6    25      100000  rs
+Ethernet198     223                             Ethernet25/7    25      100000  rs
+Ethernet199     224                             Ethernet25/8    25      100000  rs
+Ethernet208     193                             Ethernet27/1    27      100000  rs
+Ethernet209     194                             Ethernet27/2    27      100000  rs
+Ethernet210     195                             Ethernet27/3    27      100000  rs
+Ethernet211     196                             Ethernet27/4    27      100000  rs
+Ethernet212     197                             Ethernet27/5    27      100000  rs
+Ethernet213     198                             Ethernet27/6    27      100000  rs
+Ethernet214     199                             Ethernet27/7    27      100000  rs
+Ethernet215     200                             Ethernet27/8    27      100000  rs
+Ethernet224     249                             Ethernet29/1    29      100000  rs
+Ethernet225     250                             Ethernet29/2    29      100000  rs
+Ethernet226     251                             Ethernet29/3    29      100000  rs
+Ethernet227     252                             Ethernet29/4    29      100000  rs
+Ethernet228     253                             Ethernet29/5    29      100000  rs
+Ethernet229     254                             Ethernet29/6    29      100000  rs
+Ethernet230     255                             Ethernet29/7    29      100000  rs
+Ethernet231     256                             Ethernet29/8    29      100000  rs
+Ethernet240     225                             Ethernet31/1    31      100000  rs
+Ethernet241     226                             Ethernet31/2    31      100000  rs
+Ethernet242     227                             Ethernet31/3    31      100000  rs
+Ethernet243     228                             Ethernet31/4    31      100000  rs
+Ethernet244     229                             Ethernet31/5    31      100000  rs
+Ethernet245     230                             Ethernet31/6    31      100000  rs
+Ethernet246     231                             Ethernet31/7    31      100000  rs
+Ethernet247     232                             Ethernet31/8    31      100000  rs
+Ethernet256     273                             Ethernet33/1    33      100000  rs
+Ethernet257     274                             Ethernet33/2    33      100000  rs
+Ethernet258     275                             Ethernet33/3    33      100000  rs
+Ethernet259     276                             Ethernet33/4    33      100000  rs
+Ethernet260     277                             Ethernet33/5    33      100000  rs
+Ethernet261     278                             Ethernet33/6    33      100000  rs
+Ethernet262     279                             Ethernet33/7    33      100000  rs
+Ethernet263     280                             Ethernet33/8    33      100000  rs
+Ethernet272     265                             Ethernet35/1    35      100000  rs
+Ethernet273     266                             Ethernet35/2    35      100000  rs
+Ethernet274     267                             Ethernet35/3    35      100000  rs
+Ethernet275     268                             Ethernet35/4    35      100000  rs
+Ethernet276     269                             Ethernet35/5    35      100000  rs
+Ethernet277     270                             Ethernet35/6    35      100000  rs
+Ethernet278     271                             Ethernet35/7    35      100000  rs
+Ethernet279     272                             Ethernet35/8    35      100000  rs
+Ethernet288     313                             Ethernet37/1    37      100000  rs
+Ethernet289     314                             Ethernet37/2    37      100000  rs
+Ethernet290     315                             Ethernet37/3    37      100000  rs
+Ethernet291     316                             Ethernet37/4    37      100000  rs
+Ethernet292     317                             Ethernet37/5    37      100000  rs
+Ethernet293     318                             Ethernet37/6    37      100000  rs
+Ethernet294     319                             Ethernet37/7    37      100000  rs
+Ethernet295     320                             Ethernet37/8    37      100000  rs
+Ethernet304     289                             Ethernet39/1    39      100000  rs
+Ethernet305     290                             Ethernet39/2    39      100000  rs
+Ethernet306     291                             Ethernet39/3    39      100000  rs
+Ethernet307     292                             Ethernet39/4    39      100000  rs
+Ethernet308     293                             Ethernet39/5    39      100000  rs
+Ethernet309     294                             Ethernet39/6    39      100000  rs
+Ethernet310     295                             Ethernet39/7    39      100000  rs
+Ethernet311     296                             Ethernet39/8    39      100000  rs
+Ethernet320     345                             Ethernet41/1    41      100000  rs
+Ethernet321     346                             Ethernet41/2    41      100000  rs
+Ethernet322     347                             Ethernet41/3    41      100000  rs
+Ethernet323     348                             Ethernet41/4    41      100000  rs
+Ethernet324     349                             Ethernet41/5    41      100000  rs
+Ethernet325     350                             Ethernet41/6    41      100000  rs
+Ethernet326     351                             Ethernet41/7    41      100000  rs
+Ethernet327     352                             Ethernet41/8    41      100000  rs
+Ethernet336     321                             Ethernet43/1    43      100000  rs
+Ethernet337     322                             Ethernet43/2    43      100000  rs
+Ethernet338     323                             Ethernet43/3    43      100000  rs
+Ethernet339     324                             Ethernet43/4    43      100000  rs
+Ethernet340     325                             Ethernet43/5    43      100000  rs
+Ethernet341     326                             Ethernet43/6    43      100000  rs
+Ethernet342     327                             Ethernet43/7    43      100000  rs
+Ethernet343     328                             Ethernet43/8    43      100000  rs
+Ethernet352     377,378,379,380                 Ethernet45/1    45      400000  rs
+Ethernet356     381,382,383,384                 Ethernet45/5    45      400000  rs
+Ethernet368     353                             Ethernet47/1    47      100000  rs
+Ethernet369     354                             Ethernet47/2    47      100000  rs
+Ethernet370     355                             Ethernet47/3    47      100000  rs
+Ethernet371     356                             Ethernet47/4    47      100000  rs
+Ethernet372     357                             Ethernet47/5    47      100000  rs
+Ethernet373     358                             Ethernet47/6    47      100000  rs
+Ethernet374     359                             Ethernet47/7    47      100000  rs
+Ethernet375     360                             Ethernet47/8    47      100000  rs
+Ethernet384     409,410,411,412                 Ethernet49/1    49      400000  rs
+Ethernet388     413,414,415,416                 Ethernet49/5    49      400000  rs
+Ethernet400     385                             Ethernet51/1    51      100000  rs
+Ethernet401     386                             Ethernet51/2    51      100000  rs
+Ethernet402     387                             Ethernet51/3    51      100000  rs
+Ethernet403     388                             Ethernet51/4    51      100000  rs
+Ethernet404     389                             Ethernet51/5    51      100000  rs
+Ethernet405     390                             Ethernet51/6    51      100000  rs
+Ethernet406     391                             Ethernet51/7    51      100000  rs
+Ethernet407     392                             Ethernet51/8    51      100000  rs
+Ethernet416     441                             Ethernet53/1    53      100000  rs
+Ethernet417     442                             Ethernet53/2    53      100000  rs
+Ethernet418     443                             Ethernet53/3    53      100000  rs
+Ethernet419     444                             Ethernet53/4    53      100000  rs
+Ethernet420     445                             Ethernet53/5    53      100000  rs
+Ethernet421     446                             Ethernet53/6    53      100000  rs
+Ethernet422     447                             Ethernet53/7    53      100000  rs
+Ethernet423     448                             Ethernet53/8    53      100000  rs
+Ethernet432     417                             Ethernet55/1    55      100000  rs
+Ethernet433     418                             Ethernet55/2    55      100000  rs
+Ethernet434     419                             Ethernet55/3    55      100000  rs
+Ethernet435     420                             Ethernet55/4    55      100000  rs
+Ethernet436     421                             Ethernet55/5    55      100000  rs
+Ethernet437     422                             Ethernet55/6    55      100000  rs
+Ethernet438     423                             Ethernet55/7    55      100000  rs
+Ethernet439     424                             Ethernet55/8    55      100000  rs
+Ethernet448     473                             Ethernet57/1    57      100000  rs
+Ethernet449     474                             Ethernet57/2    57      100000  rs
+Ethernet450     475                             Ethernet57/3    57      100000  rs
+Ethernet451     476                             Ethernet57/4    57      100000  rs
+Ethernet452     477                             Ethernet57/5    57      100000  rs
+Ethernet453     478                             Ethernet57/6    57      100000  rs
+Ethernet454     479                             Ethernet57/7    57      100000  rs
+Ethernet455     480                             Ethernet57/8    57      100000  rs
+Ethernet464     449                             Ethernet59/1    59      100000  rs
+Ethernet465     450                             Ethernet59/2    59      100000  rs
+Ethernet466     451                             Ethernet59/3    59      100000  rs
+Ethernet467     452                             Ethernet59/4    59      100000  rs
+Ethernet468     453                             Ethernet59/5    59      100000  rs
+Ethernet469     454                             Ethernet59/6    59      100000  rs
+Ethernet470     455                             Ethernet59/7    59      100000  rs
+Ethernet471     456                             Ethernet59/8    59      100000  rs
+Ethernet480     505                             Ethernet61/1    61      100000  rs
+Ethernet481     506                             Ethernet61/2    61      100000  rs
+Ethernet482     507                             Ethernet61/3    61      100000  rs
+Ethernet483     508                             Ethernet61/4    61      100000  rs
+Ethernet484     509                             Ethernet61/5    61      100000  rs
+Ethernet485     510                             Ethernet61/6    61      100000  rs
+Ethernet486     511                             Ethernet61/7    61      100000  rs
+Ethernet487     512                             Ethernet61/8    61      100000  rs
+Ethernet496     481                             Ethernet63/1    63      100000  rs
+Ethernet497     482                             Ethernet63/2    63      100000  rs
+Ethernet498     483                             Ethernet63/3    63      100000  rs
+Ethernet499     484                             Ethernet63/4    63      100000  rs
+Ethernet500     485                             Ethernet63/5    63      100000  rs
+Ethernet501     486                             Ethernet63/6    63      100000  rs
+Ethernet502     487                             Ethernet63/7    63      100000  rs
+Ethernet503     488                             Ethernet63/8    63      100000  rs
+Ethernet512     513                             Ethernet65      65      10000   none
+Ethernet513     515                             Ethernet66      66      10000   none
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/qos.json.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/qos.json.j2
new file mode 100644
index 000000000000..3e548325ea30
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/sai.profile b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/sai.profile
new file mode 100644
index 000000000000..50c136d97b24
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64pe.config.bcm
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/th5-a7060x6-64pe.config.bcm
new file mode 100644
index 000000000000..4a218b1d58ec
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/th5-a7060x6-64pe.config.bcm
@@ -0,0 +1,1850 @@
+#
+# $Copyright: (c) 2022 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+# BCM78900 64x800g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 2
+            mmu_init_config: "\"TH5-MSFT-PROD\""
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 12288
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x26
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x67
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 10
+            ?
+                PORT_ID: 3
+            :
+                PC_PHYS_PORT_ID: 11
+            ?
+                PORT_ID: 4
+            :
+                PC_PHYS_PORT_ID: 12
+            ?
+                PORT_ID: 5
+            :
+                PC_PHYS_PORT_ID: 13
+            ?
+                PORT_ID: 6
+            :
+                PC_PHYS_PORT_ID: 14
+            ?
+                PORT_ID: 7
+            :
+                PC_PHYS_PORT_ID: 15
+            ?
+                PORT_ID: 8
+            :
+                PC_PHYS_PORT_ID: 16
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 12
+            :
+                PC_PHYS_PORT_ID: 18
+            ?
+                PORT_ID: 13
+            :
+                PC_PHYS_PORT_ID: 19
+            ?
+                PORT_ID: 14
+            :
+                PC_PHYS_PORT_ID: 20
+            ?
+                PORT_ID: 15
+            :
+                PC_PHYS_PORT_ID: 21
+            ?
+                PORT_ID: 16
+            :
+                PC_PHYS_PORT_ID: 22
+            ?
+                PORT_ID: 17
+            :
+                PC_PHYS_PORT_ID: 23
+            ?
+                PORT_ID: 18
+            :
+                PC_PHYS_PORT_ID: 24
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 23
+            :
+                PC_PHYS_PORT_ID: 34
+            ?
+                PORT_ID: 24
+            :
+                PC_PHYS_PORT_ID: 35
+            ?
+                PORT_ID: 25
+            :
+                PC_PHYS_PORT_ID: 36
+            ?
+                PORT_ID: 26
+            :
+                PC_PHYS_PORT_ID: 37
+            ?
+                PORT_ID: 27
+            :
+                PC_PHYS_PORT_ID: 38
+            ?
+                PORT_ID: 28
+            :
+                PC_PHYS_PORT_ID: 39
+            ?
+                PORT_ID: 29
+            :
+                PC_PHYS_PORT_ID: 40
+            ?
+                PORT_ID: 33
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 58
+            ?
+                PORT_ID: 35
+            :
+                PC_PHYS_PORT_ID: 59
+            ?
+                PORT_ID: 36
+            :
+                PC_PHYS_PORT_ID: 60
+            ?
+                PORT_ID: 37
+            :
+                PC_PHYS_PORT_ID: 61
+            ?
+                PORT_ID: 38
+            :
+                PC_PHYS_PORT_ID: 62
+            ?
+                PORT_ID: 39
+            :
+                PC_PHYS_PORT_ID: 63
+            ?
+                PORT_ID: 40
+            :
+                PC_PHYS_PORT_ID: 64
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 45
+            :
+                PC_PHYS_PORT_ID: 66
+            ?
+                PORT_ID: 46
+            :
+                PC_PHYS_PORT_ID: 67
+            ?
+                PORT_ID: 47
+            :
+                PC_PHYS_PORT_ID: 68
+            ?
+                PORT_ID: 48
+            :
+                PC_PHYS_PORT_ID: 69
+            ?
+                PORT_ID: 49
+            :
+                PC_PHYS_PORT_ID: 70
+            ?
+                PORT_ID: 50
+            :
+                PC_PHYS_PORT_ID: 71
+            ?
+                PORT_ID: 51
+            :
+                PC_PHYS_PORT_ID: 72
+            ?
+                PORT_ID: 55
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 56
+            :
+                PC_PHYS_PORT_ID: 90
+            ?
+                PORT_ID: 57
+            :
+                PC_PHYS_PORT_ID: 91
+            ?
+                PORT_ID: 58
+            :
+                PC_PHYS_PORT_ID: 92
+            ?
+                PORT_ID: 59
+            :
+                PC_PHYS_PORT_ID: 93
+            ?
+                PORT_ID: 60
+            :
+                PC_PHYS_PORT_ID: 94
+            ?
+                PORT_ID: 61
+            :
+                PC_PHYS_PORT_ID: 95
+            ?
+                PORT_ID: 62
+            :
+                PC_PHYS_PORT_ID: 96
+            ?
+                PORT_ID: 66
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 67
+            :
+                PC_PHYS_PORT_ID: 101
+            ?
+                PORT_ID: 77
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 78
+            :
+                PC_PHYS_PORT_ID: 122
+            ?
+                PORT_ID: 79
+            :
+                PC_PHYS_PORT_ID: 123
+            ?
+                PORT_ID: 80
+            :
+                PC_PHYS_PORT_ID: 124
+            ?
+                PORT_ID: 81
+            :
+                PC_PHYS_PORT_ID: 125
+            ?
+                PORT_ID: 82
+            :
+                PC_PHYS_PORT_ID: 126
+            ?
+                PORT_ID: 83
+            :
+                PC_PHYS_PORT_ID: 127
+            ?
+                PORT_ID: 84
+            :
+                PC_PHYS_PORT_ID: 128
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 89
+            :
+                PC_PHYS_PORT_ID: 133
+            ?
+                PORT_ID: 99
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 100
+            :
+                PC_PHYS_PORT_ID: 154
+            ?
+                PORT_ID: 101
+            :
+                PC_PHYS_PORT_ID: 155
+            ?
+                PORT_ID: 102
+            :
+                PC_PHYS_PORT_ID: 156
+            ?
+                PORT_ID: 103
+            :
+                PC_PHYS_PORT_ID: 157
+            ?
+                PORT_ID: 104
+            :
+                PC_PHYS_PORT_ID: 158
+            ?
+                PORT_ID: 105
+            :
+                PC_PHYS_PORT_ID: 159
+            ?
+                PORT_ID: 106
+            :
+                PC_PHYS_PORT_ID: 160
+            ?
+                PORT_ID: 110
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 111
+            :
+                PC_PHYS_PORT_ID: 162
+            ?
+                PORT_ID: 112
+            :
+                PC_PHYS_PORT_ID: 163
+            ?
+                PORT_ID: 113
+            :
+                PC_PHYS_PORT_ID: 164
+            ?
+                PORT_ID: 114
+            :
+                PC_PHYS_PORT_ID: 165
+            ?
+                PORT_ID: 115
+            :
+                PC_PHYS_PORT_ID: 166
+            ?
+                PORT_ID: 116
+            :
+                PC_PHYS_PORT_ID: 167
+            ?
+                PORT_ID: 117
+            :
+                PC_PHYS_PORT_ID: 168
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 122
+            :
+                PC_PHYS_PORT_ID: 186
+            ?
+                PORT_ID: 123
+            :
+                PC_PHYS_PORT_ID: 187
+            ?
+                PORT_ID: 124
+            :
+                PC_PHYS_PORT_ID: 188
+            ?
+                PORT_ID: 125
+            :
+                PC_PHYS_PORT_ID: 189
+            ?
+                PORT_ID: 126
+            :
+                PC_PHYS_PORT_ID: 190
+            ?
+                PORT_ID: 127
+            :
+                PC_PHYS_PORT_ID: 191
+            ?
+                PORT_ID: 128
+            :
+                PC_PHYS_PORT_ID: 192
+            ?
+                PORT_ID: 132
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 133
+            :
+                PC_PHYS_PORT_ID: 194
+            ?
+                PORT_ID: 134
+            :
+                PC_PHYS_PORT_ID: 195
+            ?
+                PORT_ID: 135
+            :
+                PC_PHYS_PORT_ID: 196
+            ?
+                PORT_ID: 136
+            :
+                PC_PHYS_PORT_ID: 197
+            ?
+                PORT_ID: 137
+            :
+                PC_PHYS_PORT_ID: 198
+            ?
+                PORT_ID: 138
+            :
+                PC_PHYS_PORT_ID: 199
+            ?
+                PORT_ID: 139
+            :
+                PC_PHYS_PORT_ID: 200
+            ?
+                PORT_ID: 143
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 144
+            :
+                PC_PHYS_PORT_ID: 218
+            ?
+                PORT_ID: 145
+            :
+                PC_PHYS_PORT_ID: 219
+            ?
+                PORT_ID: 146
+            :
+                PC_PHYS_PORT_ID: 220
+            ?
+                PORT_ID: 147
+            :
+                PC_PHYS_PORT_ID: 221
+            ?
+                PORT_ID: 148
+            :
+                PC_PHYS_PORT_ID: 222
+            ?
+                PORT_ID: 149
+            :
+                PC_PHYS_PORT_ID: 223
+            ?
+                PORT_ID: 150
+            :
+                PC_PHYS_PORT_ID: 224
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 155
+            :
+                PC_PHYS_PORT_ID: 226
+            ?
+                PORT_ID: 156
+            :
+                PC_PHYS_PORT_ID: 227
+            ?
+                PORT_ID: 157
+            :
+                PC_PHYS_PORT_ID: 228
+            ?
+                PORT_ID: 158
+            :
+                PC_PHYS_PORT_ID: 229
+            ?
+                PORT_ID: 159
+            :
+                PC_PHYS_PORT_ID: 230
+            ?
+                PORT_ID: 160
+            :
+                PC_PHYS_PORT_ID: 231
+            ?
+                PORT_ID: 161
+            :
+                PC_PHYS_PORT_ID: 232
+            ?
+                PORT_ID: 165
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 166
+            :
+                PC_PHYS_PORT_ID: 250
+            ?
+                PORT_ID: 167
+            :
+                PC_PHYS_PORT_ID: 251
+            ?
+                PORT_ID: 168
+            :
+                PC_PHYS_PORT_ID: 252
+            ?
+                PORT_ID: 169
+            :
+                PC_PHYS_PORT_ID: 253
+            ?
+                PORT_ID: 170
+            :
+                PC_PHYS_PORT_ID: 254
+            ?
+                PORT_ID: 171
+            :
+                PC_PHYS_PORT_ID: 255
+            ?
+                PORT_ID: 172
+            :
+                PC_PHYS_PORT_ID: 256
+            ?
+                PORT_ID: 176
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 177
+            :
+                PC_PHYS_PORT_ID: 266
+            ?
+                PORT_ID: 178
+            :
+                PC_PHYS_PORT_ID: 267
+            ?
+                PORT_ID: 179
+            :
+                PC_PHYS_PORT_ID: 268
+            ?
+                PORT_ID: 180
+            :
+                PC_PHYS_PORT_ID: 269
+            ?
+                PORT_ID: 181
+            :
+                PC_PHYS_PORT_ID: 270
+            ?
+                PORT_ID: 182
+            :
+                PC_PHYS_PORT_ID: 271
+            ?
+                PORT_ID: 183
+            :
+                PC_PHYS_PORT_ID: 272
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 274
+            ?
+                PORT_ID: 189
+            :
+                PC_PHYS_PORT_ID: 275
+            ?
+                PORT_ID: 190
+            :
+                PC_PHYS_PORT_ID: 276
+            ?
+                PORT_ID: 191
+            :
+                PC_PHYS_PORT_ID: 277
+            ?
+                PORT_ID: 192
+            :
+                PC_PHYS_PORT_ID: 278
+            ?
+                PORT_ID: 193
+            :
+                PC_PHYS_PORT_ID: 279
+            ?
+                PORT_ID: 194
+            :
+                PC_PHYS_PORT_ID: 280
+            ?
+                PORT_ID: 198
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 199
+            :
+                PC_PHYS_PORT_ID: 290
+            ?
+                PORT_ID: 200
+            :
+                PC_PHYS_PORT_ID: 291
+            ?
+                PORT_ID: 201
+            :
+                PC_PHYS_PORT_ID: 292
+            ?
+                PORT_ID: 202
+            :
+                PC_PHYS_PORT_ID: 293
+            ?
+                PORT_ID: 203
+            :
+                PC_PHYS_PORT_ID: 294
+            ?
+                PORT_ID: 204
+            :
+                PC_PHYS_PORT_ID: 295
+            ?
+                PORT_ID: 205
+            :
+                PC_PHYS_PORT_ID: 296
+            ?
+                PORT_ID: 209
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 210
+            :
+                PC_PHYS_PORT_ID: 314
+            ?
+                PORT_ID: 211
+            :
+                PC_PHYS_PORT_ID: 315
+            ?
+                PORT_ID: 212
+            :
+                PC_PHYS_PORT_ID: 316
+            ?
+                PORT_ID: 213
+            :
+                PC_PHYS_PORT_ID: 317
+            ?
+                PORT_ID: 214
+            :
+                PC_PHYS_PORT_ID: 318
+            ?
+                PORT_ID: 215
+            :
+                PC_PHYS_PORT_ID: 319
+            ?
+                PORT_ID: 216
+            :
+                PC_PHYS_PORT_ID: 320
+            ?
+                PORT_ID: 220
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 322
+            ?
+                PORT_ID: 222
+            :
+                PC_PHYS_PORT_ID: 323
+            ?
+                PORT_ID: 223
+            :
+                PC_PHYS_PORT_ID: 324
+            ?
+                PORT_ID: 224
+            :
+                PC_PHYS_PORT_ID: 325
+            ?
+                PORT_ID: 225
+            :
+                PC_PHYS_PORT_ID: 326
+            ?
+                PORT_ID: 226
+            :
+                PC_PHYS_PORT_ID: 327
+            ?
+                PORT_ID: 227
+            :
+                PC_PHYS_PORT_ID: 328
+            ?
+                PORT_ID: 231
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 232
+            :
+                PC_PHYS_PORT_ID: 346
+            ?
+                PORT_ID: 233
+            :
+                PC_PHYS_PORT_ID: 347
+            ?
+                PORT_ID: 234
+            :
+                PC_PHYS_PORT_ID: 348
+            ?
+                PORT_ID: 235
+            :
+                PC_PHYS_PORT_ID: 349
+            ?
+                PORT_ID: 236
+            :
+                PC_PHYS_PORT_ID: 350
+            ?
+                PORT_ID: 237
+            :
+                PC_PHYS_PORT_ID: 351
+            ?
+                PORT_ID: 238
+            :
+                PC_PHYS_PORT_ID: 352
+            ?
+                PORT_ID: 242
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 243
+            :
+                PC_PHYS_PORT_ID: 357
+            ?
+                PORT_ID: 253
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 254
+            :
+                PC_PHYS_PORT_ID: 378
+            ?
+                PORT_ID: 255
+            :
+                PC_PHYS_PORT_ID: 379
+            ?
+                PORT_ID: 256
+            :
+                PC_PHYS_PORT_ID: 380
+            ?
+                PORT_ID: 257
+            :
+                PC_PHYS_PORT_ID: 381
+            ?
+                PORT_ID: 258
+            :
+                PC_PHYS_PORT_ID: 382
+            ?
+                PORT_ID: 259
+            :
+                PC_PHYS_PORT_ID: 383
+            ?
+                PORT_ID: 260
+            :
+                PC_PHYS_PORT_ID: 384
+            ?
+                PORT_ID: 264
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 265
+            :
+                PC_PHYS_PORT_ID: 389
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 276
+            :
+                PC_PHYS_PORT_ID: 410
+            ?
+                PORT_ID: 277
+            :
+                PC_PHYS_PORT_ID: 411
+            ?
+                PORT_ID: 278
+            :
+                PC_PHYS_PORT_ID: 412
+            ?
+                PORT_ID: 279
+            :
+                PC_PHYS_PORT_ID: 413
+            ?
+                PORT_ID: 280
+            :
+                PC_PHYS_PORT_ID: 414
+            ?
+                PORT_ID: 281
+            :
+                PC_PHYS_PORT_ID: 415
+            ?
+                PORT_ID: 282
+            :
+                PC_PHYS_PORT_ID: 416
+            ?
+                PORT_ID: 286
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 287
+            :
+                PC_PHYS_PORT_ID: 418
+            ?
+                PORT_ID: 288
+            :
+                PC_PHYS_PORT_ID: 419
+            ?
+                PORT_ID: 289
+            :
+                PC_PHYS_PORT_ID: 420
+            ?
+                PORT_ID: 290
+            :
+                PC_PHYS_PORT_ID: 421
+            ?
+                PORT_ID: 291
+            :
+                PC_PHYS_PORT_ID: 422
+            ?
+                PORT_ID: 292
+            :
+                PC_PHYS_PORT_ID: 423
+            ?
+                PORT_ID: 293
+            :
+                PC_PHYS_PORT_ID: 424
+            ?
+                PORT_ID: 297
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 298
+            :
+                PC_PHYS_PORT_ID: 442
+            ?
+                PORT_ID: 299
+            :
+                PC_PHYS_PORT_ID: 443
+            ?
+                PORT_ID: 300
+            :
+                PC_PHYS_PORT_ID: 444
+            ?
+                PORT_ID: 301
+            :
+                PC_PHYS_PORT_ID: 445
+            ?
+                PORT_ID: 302
+            :
+                PC_PHYS_PORT_ID: 446
+            ?
+                PORT_ID: 303
+            :
+                PC_PHYS_PORT_ID: 447
+            ?
+                PORT_ID: 304
+            :
+                PC_PHYS_PORT_ID: 448
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 450
+            ?
+                PORT_ID: 310
+            :
+                PC_PHYS_PORT_ID: 451
+            ?
+                PORT_ID: 311
+            :
+                PC_PHYS_PORT_ID: 452
+            ?
+                PORT_ID: 312
+            :
+                PC_PHYS_PORT_ID: 453
+            ?
+                PORT_ID: 313
+            :
+                PC_PHYS_PORT_ID: 454
+            ?
+                PORT_ID: 314
+            :
+                PC_PHYS_PORT_ID: 455
+            ?
+                PORT_ID: 315
+            :
+                PC_PHYS_PORT_ID: 456
+            ?
+                PORT_ID: 319
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 320
+            :
+                PC_PHYS_PORT_ID: 474
+            ?
+                PORT_ID: 321
+            :
+                PC_PHYS_PORT_ID: 475
+            ?
+                PORT_ID: 322
+            :
+                PC_PHYS_PORT_ID: 476
+            ?
+                PORT_ID: 323
+            :
+                PC_PHYS_PORT_ID: 477
+            ?
+                PORT_ID: 324
+            :
+                PC_PHYS_PORT_ID: 478
+            ?
+                PORT_ID: 325
+            :
+                PC_PHYS_PORT_ID: 479
+            ?
+                PORT_ID: 326
+            :
+                PC_PHYS_PORT_ID: 480
+            ?
+                PORT_ID: 330
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 331
+            :
+                PC_PHYS_PORT_ID: 482
+            ?
+                PORT_ID: 332
+            :
+                PC_PHYS_PORT_ID: 483
+            ?
+                PORT_ID: 333
+            :
+                PC_PHYS_PORT_ID: 484
+            ?
+                PORT_ID: 334
+            :
+                PC_PHYS_PORT_ID: 485
+            ?
+                PORT_ID: 335
+            :
+                PC_PHYS_PORT_ID: 486
+            ?
+                PORT_ID: 336
+            :
+                PC_PHYS_PORT_ID: 487
+            ?
+                PORT_ID: 337
+            :
+                PC_PHYS_PORT_ID: 488
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 505
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 506
+            ?
+                PORT_ID: 343
+            :
+                PC_PHYS_PORT_ID: 507
+            ?
+                PORT_ID: 344
+            :
+                PC_PHYS_PORT_ID: 508
+            ?
+                PORT_ID: 345
+            :
+                PC_PHYS_PORT_ID: 509
+            ?
+                PORT_ID: 346
+            :
+                PC_PHYS_PORT_ID: 510
+            ?
+                PORT_ID: 347
+            :
+                PC_PHYS_PORT_ID: 511
+            ?
+                PORT_ID: 348
+            :
+                PC_PHYS_PORT_ID: 512
+            ?
+                PORT_ID: 76
+            :
+                PC_PHYS_PORT_ID: 513
+            ?
+                PORT_ID: 274
+            :
+                PC_PHYS_PORT_ID: 515
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[1, 8],
+                          [11, 18],
+                          [22, 29],
+                          [33, 40],
+                          [44, 51],
+                          [55, 62],
+                          [77, 84],
+                          [99, 106],
+                          [110, 117],
+                          [121, 128],
+                          [132, 139],
+                          [143, 150],
+                          [154, 161],
+                          [165, 172],
+                          [176, 183],
+                          [187, 194],
+                          [198, 205],
+                          [209, 216],
+                          [220, 227],
+                          [231, 238],
+                          [253, 260],
+                          [275, 282],
+                          [286, 293],
+                          [297, 304],
+                          [308, 315],
+                          [319, 326],
+                          [330, 337],
+                          [341, 348]]
+            :
+                ENABLE: 0
+                SPEED: 100000
+                NUM_LANES: 1
+                FEC_MODE: PC_FEC_RS544
+                MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [[66, 67],
+                          [88, 89],
+                          [242, 243],
+                          [264, 265]]
+            :
+                ENABLE: 0
+                SPEED: 400000
+                NUM_LANES: 4
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [[76, 76], [274, 274]]
+            :
+                ENABLE: 0
+                MAX_FRAME_SIZE: 9416
+                SPEED: 10000
+                NUM_LANES: 1
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+            sai_stats_support_mask: 0
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...

From 8722a0d8bceb725178b5522cb625c39220dbc3d6 Mon Sep 17 00:00:00 2001
From: anamehra <54692434+anamehra@users.noreply.github.com>
Date: Tue, 5 Nov 2024 00:30:34 -0800
Subject: [PATCH 174/364] Update cisco-8000.ini to 202405.0.8 release (#20672)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Signed-off-by: Anand Mehra anamehra@cisco.com


Update cisco-8000.ini to 202405.0.8 release

Release Content
Cisco-8102, Cisco-8800

SDK HEALTH event notification causing orchagent crash disabled
Support for Multiple rconsole sessions to difference LCs from Chassis Supervisor.
Fixed FC asic init failure on Chassis Supervisor reboot
Added New CLI to display LC Back Plane port to Sup/RP port mapping. 'show platform npu bp-interface-map -n '
Fixed Log Analyzer error “counter read timeout”
Fixed Log Analyzer ERROR avago_sbm_spico_int_read
Enabled enable_mbist_repair across platforms
Syncd Rpc docker python version migrated to python3
---
 platform/checkout/cisco-8000.ini | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/checkout/cisco-8000.ini b/platform/checkout/cisco-8000.ini
index bb495d263345..fcb26512c35b 100644
--- a/platform/checkout/cisco-8000.ini
+++ b/platform/checkout/cisco-8000.ini
@@ -1,3 +1,3 @@
 [module]
 repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git
-ref=202405.0.7
+ref=202405.0.8

From 3a290c5697aafba4c0298641d6bde13e268cd18c Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Tue, 5 Nov 2024 10:02:58 -0800
Subject: [PATCH 175/364] [Mellanox] upgrade MFT tool to 4.30.0-136 (#20665)

- Why I did it
Upgrade MFT tool to 4.30.0-136

- How I did it
Change the relevant make file to pick up the new MFT version

- How to verify it
Run full sonic-mgmt regression on Mellanox platforms.
---
 platform/mellanox/mft.mk | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/platform/mellanox/mft.mk b/platform/mellanox/mft.mk
index 61e43e5823ff..808ee75987a0 100644
--- a/platform/mellanox/mft.mk
+++ b/platform/mellanox/mft.mk
@@ -1,5 +1,6 @@
 #
-# Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -16,8 +17,8 @@
 #
 # Mellanox SAI
 
-MFT_VERSION = 4.28.0
-MFT_REVISION = 96
+MFT_VERSION = 4.30.0
+MFT_REVISION = 136
 
 MLNX_MFT_INTERNAL_SOURCE_BASE_URL =
 

From f66f4a986c3c7aee31767f1e7c59b90df4bb29d7 Mon Sep 17 00:00:00 2001
From: abdosi <58047199+abdosi@users.noreply.github.com>
Date: Tue, 5 Nov 2024 16:58:05 -0800
Subject: [PATCH 176/364] [Build]: Fix the build error when building
 docker-gbsyncd-broncos.gz (#20696)

It seems after this PR #19712 dsserve might not be getting downloaded for bullseye.

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
---
 platform/components/docker-gbsyncd-broncos.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/components/docker-gbsyncd-broncos.mk b/platform/components/docker-gbsyncd-broncos.mk
index fbfd21d2ca05..100e29e5cee7 100644
--- a/platform/components/docker-gbsyncd-broncos.mk
+++ b/platform/components/docker-gbsyncd-broncos.mk
@@ -10,7 +10,7 @@ DOCKER_GBSYNCD_BRONCOS_STEM = docker-gbsyncd-broncos
 DOCKER_GBSYNCD_BRONCOS = $(DOCKER_GBSYNCD_BRONCOS_STEM).gz
 DOCKER_GBSYNCD_BRONCOS_DBG = $(DOCKER_GBSYNCD_BRONCOS_STEM)-$(DBG_IMAGE_MARK).gz
 
-$(DOCKER_GBSYNCD_BRONCOS)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
+$(DOCKER_GBSYNCD_BRONCOS)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT) $(DSSERVE)
 
 $(DOCKER_GBSYNCD_BRONCOS)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BULLSEYE)
 

From d80f35c6703eedeb7e304dadeec1692e37603b80 Mon Sep 17 00:00:00 2001
From: liamkearney-msft <liamkearney@microsoft.com>
Date: Thu, 7 Nov 2024 04:24:26 +1000
Subject: [PATCH 177/364] [macsec/config]: Handle deleting macsec if not
 configured on port (#20655)

Why I did it
Trying to remove macsec from a port without it configured would lead to a crash/backtrace of the config command

Work item tracking
issue [macsec] config crashes when deleting port with no profile #20631
How I did it
Check if macsec exists on the port before trying to delete it.

---------

Signed-off-by: Liam Kearney <liamkearney@microsoft.com>
---
 .../docker-macsec/cli-plugin-tests/test_config_macsec.py | 4 ++++
 dockers/docker-macsec/cli/config/plugins/macsec.py       | 9 +++++----
 2 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/dockers/docker-macsec/cli-plugin-tests/test_config_macsec.py b/dockers/docker-macsec/cli-plugin-tests/test_config_macsec.py
index 3a279bd61272..edc5e06822e3 100644
--- a/dockers/docker-macsec/cli-plugin-tests/test_config_macsec.py
+++ b/dockers/docker-macsec/cli-plugin-tests/test_config_macsec.py
@@ -128,6 +128,10 @@ def test_macsec_port(self, mock_cfgdb):
         assert "macsec" not in port_table or not port_table["macsec"]
         assert port_table["admin_status"] == "up"
 
+        # Test deleting on port without it enabled
+        result = runner.invoke(macsec.macsec, ["port", "del", "Ethernet0"], obj=cfgdb)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
 
     def test_macsec_invalid_operation(self, mock_cfgdb):
         cfgdb = mock_cfgdb
diff --git a/dockers/docker-macsec/cli/config/plugins/macsec.py b/dockers/docker-macsec/cli/config/plugins/macsec.py
index 9f5ac5bd7bc4..5a6a0b0795a7 100644
--- a/dockers/docker-macsec/cli/config/plugins/macsec.py
+++ b/dockers/docker-macsec/cli/config/plugins/macsec.py
@@ -84,10 +84,11 @@ def del_port(port):
     if len(port_entry) == 0:
         ctx.fail("port {} doesn't exist".format(port))
 
-    del port_entry['macsec']
-
-    config_db.set_entry("PORT", port, port_entry)
-
+    if 'macsec' in port_entry:
+        del port_entry['macsec']
+        config_db.set_entry("PORT", port, port_entry)
+    else:
+        click.echo("port {} has no configured macsec profile".format(port))
 
 #
 # 'profile' group ('config macsec profile ...')

From de4603bc87f6cedaaf83310cdc6fa45364479cab Mon Sep 17 00:00:00 2001
From: Gagan Punathil Ellath <gpunathilell@nvidia.com>
Date: Thu, 7 Nov 2024 01:58:10 -0800
Subject: [PATCH 178/364] [Mellanox][sonic-bfb-installer] Adding Debug print
 messages (#20476)

- Why I did it
Addition of debug print messages to keep the SSH connection alive and to add per-dpu configuration capability with separate config files

- How I did it

- How to verify it
sonic-bfb-installer.sh -r all -c a.conf,b.conf,c.conf,d.conf sets the configuration individually for each dpus
The rshim devices are sorted before we apply the configuration
a.conf for rshim0, b.conf for the second and so on
We can also see debug pring messages during installation to keep the ssh connection alive
---
 platform/mellanox/sonic-bfb-installer.sh | 63 +++++++++++++++++++-----
 1 file changed, 52 insertions(+), 11 deletions(-)

diff --git a/platform/mellanox/sonic-bfb-installer.sh b/platform/mellanox/sonic-bfb-installer.sh
index 68baba0a9e09..c87adb73607d 100755
--- a/platform/mellanox/sonic-bfb-installer.sh
+++ b/platform/mellanox/sonic-bfb-installer.sh
@@ -1,6 +1,7 @@
 #!/bin/bash
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -36,12 +37,32 @@ WORK_DIR=`mktemp -d -p "$DIR"`
 
 bfb_install_call(){
     #Example:sudo bfb-install -b <full path to image> -r rshim<id>
+    local appendix=$3
     local -r rshim=$1
-    local result_file=$(mktemp "/tmp/result_file.XXXXX")
-    local cmd="timeout 600s bfb-install -b $2 -r $rshim $appendix"
-    echo "Installing bfb image on DPU connected to $rshim using $cmd"
+    local result_file=$(mktemp "${WORK_DIR}/result_file.XXXXX")
+    if [ -z "$appendix" ]; then
+        local cmd="timeout 600s bfb-install -b $2 -r $1"
+    else
+        local cmd="timeout 600s bfb-install -b $2 -r $1 -c $appendix"
+    fi
+    echo "Installing bfb image on DPU connected to $1 using $cmd"
     local indicator="$rshim:"
-    eval "$cmd" > "$result_file" 2>&1 > >(while IFS= read -r line; do echo "$indicator $line"; done > "$result_file")
+    trap 'kill_ch_procs' SIGINT SIGTERM SIGHUP
+    eval "$cmd"  > >(while IFS= read -r line; do echo "$indicator $line"; done >> "$result_file") 2>&1 &
+    cmd_pid=$!
+    local total_time=600
+    local elapsed=0
+    # Interval is selected at random so all the processes can print to same line
+    local interval=$(($RANDOM%(10-3+1)+3))
+    while kill -0 $cmd_pid 2>/dev/null; do
+        sleep $interval
+        elapsed=$((elapsed + interval))
+        echo -ne "\r$indicator Installing... $elapsed/$total_time seconds elapsed"
+        if [ $elapsed -ge $total_time ]; then
+            break
+        fi
+    done
+    wait $cmd_pid
     local exit_status=$?
     if [ $exit_status  -ne 0 ]; then
         echo "$rshim: Error: Installation failed on connected DPU!"
@@ -141,10 +162,6 @@ main(){
         is_url $bfb
     fi
     trap "file_cleanup" EXIT
-    if [[ -f ${config} ]]; then
-        echo "Using ${config} file"
-        appendix="-c ${config}"
-    fi
     dev_names_det+=($(
         ls -d /dev/rshim? | awk -F'/' '{print $NF}'
     ))
@@ -166,11 +183,35 @@ main(){
             validate_rshim ${dev_names[@]}
         fi
     fi
+    # Sort list of rshim interfaces so that config is applied in a known order
+    sorted_devs=($(for i in "${dev_names[@]}"; do echo $i; done | sort))
+    if [ ! -z ${config} ]; then
+        echo "Using ${config} file/s"
+        if [[ "$config" == *","* ]]; then
+            IFS=',' read -r -a arr <<< "$config"
+        else
+            arr=()
+            for ((i=0; i<${#dev_names[@]}; i++)); do
+                arr+=("$config")
+            done
+        fi
+        if [ ${#arr[@]} -ne ${#sorted_devs[@]} ]; then
+            echo "Length of config file list does not match the devices selected: ${sorted_devs[@]} and ${arr[@]}"
+            exit 1
+        fi
+        for i in "${!arr[@]}"
+        do
+            if [ ! -f ${arr[$i]} ]; then
+                echo "Config provided ${arr[$i]} is not a file! Please check"
+                exit 1
+            fi
+        done
+    fi
     trap 'kill_ch_procs' SIGINT SIGTERM SIGHUP
-    for i in "${dev_names[@]}"
+    for i in "${!sorted_devs[@]}"
     do
         :
-        bfb_install_call $i $bfb &
+        bfb_install_call ${sorted_devs[$i]} $bfb ${arr[$i]} &
     done
     wait
 }

From beb933eb74096aa7a07bf389ff68fba2fe1754e4 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Thu, 7 Nov 2024 02:02:53 -0800
Subject: [PATCH 179/364] [Mellanox] Add SmartSwitch information to the
 platform.json (#20358)

- Why I did it
Add the mapping from the NPU side's data-plane interface to the DPU side interface.
Add the mapping from the DPU to the PCI bus ID.

- How I did it
Extend the DPUS section of the platform.json file

- How to verify it
Compile and run the image.
---
 .../x86_64-nvidia_sn4280-r0/platform.json     | 28 ++++++++++++++++---
 1 file changed, 24 insertions(+), 4 deletions(-)

diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json b/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json
index 8597bb955dd4..d2a798d25fce 100644
--- a/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json
@@ -649,16 +649,36 @@
     },
     "DPUS": {
         "dpu0": {
-            "midplane_interface":  "dpu0"
+            "midplane_interface": "dpu0",
+            "interface": {
+                "Ethernet224": "Ethernet0"
+            },
+            "rshim_info": "rshim0",
+            "bus_info": "0000:08:00.0"
         },
         "dpu1": {
-            "midplane_interface":  "dpu1"
+            "midplane_interface": "dpu1",
+            "interface": {
+                "Ethernet232": "Ethernet0"
+            },
+            "rshim_info": "rshim1",
+            "bus_info": "0000:07:00.0"
         },
         "dpu2": {
-            "midplane_interface":  "dpu2"
+            "midplane_interface": "dpu2",
+            "interface": {
+                "Ethernet240": "Ethernet0"
+            },
+            "rshim_info": "rshim2",
+            "bus_info": "0000:01:00.0"
         },
         "dpu3": {
-            "midplane_interface":  "dpu3"
+            "midplane_interface": "dpu3",
+            "interface": {
+                "Ethernet248": "Ethernet0"
+            },
+            "rshim_info": "rshim3",
+            "bus_info": "0000:02:00.0"
         }
     }
 }

From 0c99527c9755033fc695026594b3e8417f8134b8 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 7 Nov 2024 19:01:32 +0800
Subject: [PATCH 180/364] [submodule] Update submodule sonic-swss to the latest
 HEAD automatically (#20699)

#### Why I did it
src/sonic-swss
```
* ea3e76f7 - (HEAD -> master, origin/master, origin/HEAD) Use -fsanitize=address instead of -lasan for ASAN linker flags (#3344) (70 minutes ago) [Saikrishna Arcot]
* 70ade343 - test_vnet.py refactor (#3352) (2 days ago) [siqbal1986]
* 3e7b9b46 - [DASH] Add support for ENI counters (#3266) (2 days ago) [Vivek]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 368e1d62674f..ea3e76f7cf9a 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 368e1d62674ff511b241f10ea8e0933398a357bd
+Subproject commit ea3e76f7cf9af779c8a797391ede5482e0f610ea

From 482d47aed85bc9f533609a9bae682752721927e8 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 7 Nov 2024 19:01:37 +0800
Subject: [PATCH 181/364] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#20681)

#### Why I did it
src/sonic-platform-daemons
```
* 0cb3644 - (HEAD -> master, origin/master, origin/HEAD) [xcvrd] Use new logger implementation and enable runtime log level configuration (#515) (3 days ago) [Junchao-Mellanox]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index fc557a1e2c23..0cb36447ebfd 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit fc557a1e2c23a8df8a860acd30a70817922ff882
+Subproject commit 0cb36447ebfda390d999df6516beac4c17315a7b

From 9685498eb05d2501051961284cefcfbf6c3b6614 Mon Sep 17 00:00:00 2001
From: JunhongMao <134556118+JunhongMao@users.noreply.github.com>
Date: Thu, 7 Nov 2024 13:22:27 -0500
Subject: [PATCH 182/364] To fix the issue: show_techsupport & saidump errors
 during testbed testing by replacing redis-rdb-tool with rdb-cli (#19268)

* To fix the issue: show_techsupport & saidump errors during testbed testing
https://github.com/sonic-net/sonic-sairedis/issues/1387

To use the Redis-db SAVE option to save the snapshot of DB each time and recover later, instead of looping through each entry in the table and saving it.

(1) Updated sonic-buildimage repo's platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2,
 install rdb-cli into the syncd containter.
(2) Updated sonic-sairedis repo's script file: files/scripts/saidump.sh, replace rdbtools with rdb-cli.
(3) Updated sonic-sairedis repo's saidump/saidump.cpp, to process the rdb-cli's ouput json file.
---
 dockers/docker-base-bookworm/Dockerfile.j2        | 12 ------------
 dockers/docker-base-bullseye/Dockerfile.j2        | 12 ------------
 platform/broadcom/docker-syncd-brcm.mk            |  2 +-
 platform/broadcom/docker-syncd-brcm/Dockerfile.j2 |  4 ++--
 rules/rdb-cli.dep                                 |  9 +++++++++
 rules/rdb-cli.mk                                  | 14 ++++++++++++++
 src/rdb-cli/Makefile                              | 14 ++++++++++++++
 7 files changed, 40 insertions(+), 27 deletions(-)
 create mode 100644 rules/rdb-cli.dep
 create mode 100644 rules/rdb-cli.mk
 create mode 100644 src/rdb-cli/Makefile

diff --git a/dockers/docker-base-bookworm/Dockerfile.j2 b/dockers/docker-base-bookworm/Dockerfile.j2
index 2a3388d770d5..14032ed308f3 100644
--- a/dockers/docker-base-bookworm/Dockerfile.j2
+++ b/dockers/docker-base-bookworm/Dockerfile.j2
@@ -81,18 +81,6 @@ RUN pip3 install supervisord-dependent-startup==1.4.0
 
 RUN mkdir -p /var/log/supervisor /etc/supervisor/conf.d
 
-# Install gcc, libc6-dev and python3-dev for compiling python-lzf
-RUN apt-get -y install build-essential libc6-dev python3-dev
-
-# Install python-lzf
-RUN pip3 install 'python-lzf==0.2.4'
-
-# Install rdbtools
-RUN pip3 install 'rdbtools==0.1.15'
-
-# Uninstall gcc, libc6-dev and python3-dev for compiling python-lzf
-RUN apt-get -y purge build-essential libc6-dev python3-dev
-
 # Uninstall unused dependencies
 RUN apt autoremove -y --purge
 
diff --git a/dockers/docker-base-bullseye/Dockerfile.j2 b/dockers/docker-base-bullseye/Dockerfile.j2
index b31e986e770d..0ec093c90164 100644
--- a/dockers/docker-base-bullseye/Dockerfile.j2
+++ b/dockers/docker-base-bullseye/Dockerfile.j2
@@ -83,18 +83,6 @@ RUN pip3 install supervisord-dependent-startup==1.4.0
 
 RUN mkdir -p /var/log/supervisor /etc/supervisor/conf.d
 
-# Install gcc, libc6-dev and python3-dev for compiling python-lzf
-RUN apt-get -y install build-essential libc6-dev python3-dev
-
-# Install python-lzf
-RUN pip3 install 'python-lzf==0.2.4'
-
-# Install rdbtools
-RUN pip3 install 'rdbtools==0.1.15'
-
-# Uninstall gcc, libc6-dev and python3-dev for compiling python-lzf
-RUN apt-get -y purge build-essential libc6-dev python3-dev
-
 # Uninstall unused dependencies
 RUN apt autoremove -y --purge
 
diff --git a/platform/broadcom/docker-syncd-brcm.mk b/platform/broadcom/docker-syncd-brcm.mk
index 823a3707955b..24b36640f03f 100644
--- a/platform/broadcom/docker-syncd-brcm.mk
+++ b/platform/broadcom/docker-syncd-brcm.mk
@@ -5,7 +5,7 @@ include $(PLATFORM_PATH)/../template/docker-syncd-bookworm.mk
 
 $(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD)
 $(DOCKER_SYNCD_BASE)_DEPENDS += $(BRCM_XGS_SAI)
-$(DOCKER_SYNCD_BASE)_FILES += $(DSSERVE) $(BCMCMD)
+$(DOCKER_SYNCD_BASE)_FILES += $(DSSERVE) $(BCMCMD) $(RDB-CLI)
 
 $(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \
                                 $(LIBSWSSCOMMON_DBG) \
diff --git a/platform/broadcom/docker-syncd-brcm/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm/Dockerfile.j2
index 084808831245..4dd4dbc0b219 100755
--- a/platform/broadcom/docker-syncd-brcm/Dockerfile.j2
+++ b/platform/broadcom/docker-syncd-brcm/Dockerfile.j2
@@ -23,8 +23,8 @@ RUN apt-get install -yf kmod
 ## BRCM uses ethtool to set host interface speed
 RUN apt-get install -y ethtool
 
-COPY ["files/dsserve", "files/bcmcmd", "start.sh", "start_led.sh", "bcmsh", "/usr/bin/"]
-RUN chmod +x /usr/bin/dsserve /usr/bin/bcmcmd
+COPY ["files/dsserve", "files/bcmcmd", "start.sh", "start_led.sh", "bcmsh", "files/rdb-cli", "/usr/bin/"]
+RUN chmod +x /usr/bin/dsserve /usr/bin/bcmcmd /usr/bin/rdb-cli
 
 COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
 COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
diff --git a/rules/rdb-cli.dep b/rules/rdb-cli.dep
new file mode 100644
index 000000000000..4b24cf258ac9
--- /dev/null
+++ b/rules/rdb-cli.dep
@@ -0,0 +1,9 @@
+
+SPATH       := $($(RDB-CLI)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/rdb-cli.mk rules/rdb-cli.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(SPATH))
+
+$(RDB-CLI)_CACHE_MODE  := GIT_CONTENT_SHA 
+$(RDB-CLI)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(RDB-CLI)_DEP_FILES   := $(DEP_FILES)
diff --git a/rules/rdb-cli.mk b/rules/rdb-cli.mk
new file mode 100644
index 000000000000..fe9dc4e732e1
--- /dev/null
+++ b/rules/rdb-cli.mk
@@ -0,0 +1,14 @@
+# librdb package
+#
+
+
+RDB_CLI_VERSION_FULL = 0.1
+
+export RDB_CLI_VERSION_FULL
+
+RDB-CLI = rdb-cli
+
+export RDB-CLI
+
+$(RDB-CLI)_SRC_PATH = $(SRC_PATH)/rdb-cli
+SONIC_MAKE_FILES += rdb-cli
diff --git a/src/rdb-cli/Makefile b/src/rdb-cli/Makefile
new file mode 100644
index 000000000000..b9aedad6f657
--- /dev/null
+++ b/src/rdb-cli/Makefile
@@ -0,0 +1,14 @@
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -e
+
+MAIN_TARGET = rdb-cli
+
+$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
+	rm -rf ./librdb
+	git clone https://github.com/redis/librdb.git
+	pushd ./librdb/
+	git checkout 2fdfc0c2bc914d643fe3f86e6715aeb843d8966e
+	git submodule update --init --recursive	
+	make -j$(SONIC_CONFIG_MAKE_JOBS)
+	mv bin/rdb-cli $(DEST)/

From 2177af13e5dc1f9e2f9169f0df3bb098434cfdfa Mon Sep 17 00:00:00 2001
From: prabhataravind <108555774+prabhataravind@users.noreply.github.com>
Date: Thu, 7 Nov 2024 15:23:42 -0800
Subject: [PATCH 183/364] Detect and log control plane drops (#20481)

Detect and log control plane drops

Signed-off-by: Prabhat Aravind <paravind@microsoft.com>
---
 .../build_templates/sonic_debian_extension.j2 |  2 +
 files/image_config/monit/conf.d/sonic-host    |  5 +
 .../monit/control_plane_drop_check            | 92 +++++++++++++++++++
 3 files changed, 99 insertions(+)
 create mode 100755 files/image_config/monit/control_plane_drop_check

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 8c7bc2551166..aa427f6157c1 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -398,6 +398,8 @@ sudo cp $IMAGE_CONFIGS/monit/restart_service $FILESYSTEM_ROOT/usr/bin/
 sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/restart_service
 sudo cp $IMAGE_CONFIGS/monit/arp_update_checker $FILESYSTEM_ROOT/usr/bin/
 sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/arp_update_checker
+sudo cp $IMAGE_CONFIGS/monit/control_plane_drop_check $FILESYSTEM_ROOT/usr/bin/
+sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/control_plane_drop_check
 
 # Installed smartmontools version should match installed smartmontools in docker-platform-monitor Dockerfile
 # TODO: are mismatching versions fine for bookworm?
diff --git a/files/image_config/monit/conf.d/sonic-host b/files/image_config/monit/conf.d/sonic-host
index e71c082e9061..95adb4c295ba 100644
--- a/files/image_config/monit/conf.d/sonic-host
+++ b/files/image_config/monit/conf.d/sonic-host
@@ -60,3 +60,8 @@ check program memory_check with path "/usr/local/bin/memory_threshold_check.py"
 # arp_update_checker tool that verifies that arp_update script is not stuck on ping command every 10 minutes
 check program arp_update_checker with path "/usr/bin/arp_update_checker" every 10 cycles
     if status != 0 for 3 times within 3 cycles then alert repeat every 1 cycles
+
+# Check if there are control plane packet drops reported by softnet_stats
+check program controlPlaneDropCheck with path "/usr/bin/control_plane_drop_check"
+    every 5 cycles
+    if status != 0 for 3 cycle then alert repeat every 1 cycles
diff --git a/files/image_config/monit/control_plane_drop_check b/files/image_config/monit/control_plane_drop_check
new file mode 100755
index 000000000000..bd81756cac91
--- /dev/null
+++ b/files/image_config/monit/control_plane_drop_check
@@ -0,0 +1,92 @@
+#!/usr/bin/env python3
+"""
+    This scripts's job is to verify that there are no control plane
+    packet drops reported by /proc/net/sofnet_stats.
+    This is to be run periodically on a SONiC device using a monit
+    configuration file.
+"""
+import os
+import sys
+import syslog
+
+
+def write_syslog(message, *args):
+    """
+    Write a message to syslog.
+
+    Args:
+        message (str): Message string to be logged
+        args: Optional args
+
+    Returns:
+        None
+    """
+
+    if args:
+        message %= args
+    syslog.syslog(syslog.LOG_NOTICE, message)
+
+
+def get_softnet_dropped_count():
+    """
+    Get dropped count from softnet stats procfs.
+
+    Returns:
+        drop_count (int): Number of dropped packets
+    """
+    drop_count = 0
+    softnet_stats_file = "/proc/net/softnet_stat"
+
+    with open(softnet_stats_file, 'r') as f:
+        for line in f:
+            if line.strip():  # Ensure the line is not empty
+                stat = line.split()
+                # Drop count is in the second column for each CPU. Ref:
+                # https://github.com/torvalds/linux/blob/v5.10/net/core/net-procfs.c#L153
+                if len(stat) > 1:
+                    drop_count += int(stat[1], 16)
+
+    return drop_count
+
+
+def check_packet_drops():
+    """
+    The function that checks for kernel packet drops
+
+    Returns:
+        True if there are packet drops, False otherwise
+    """
+    # Path to the file to store the last drop count
+    drop_count_stash = '/tmp/softnet_dropped_count.txt'
+
+    # Read the last drop count if drop count stash file exists
+    if os.path.exists(drop_count_stash):
+        with open(drop_count_stash, 'r') as f:
+            count = f.read().strip()
+            last_drop_count = int(count) if count else 0
+    else:
+    # Initial run. Read drop count, update stash and return normally
+        last_drop_count = get_softnet_dropped_count()
+        with open(drop_count_stash, 'w') as f:
+            f.write(str(last_drop_count))
+        return False
+
+    current_drop_count = get_softnet_dropped_count()
+    with open(drop_count_stash, 'w') as f:
+        f.write(str(current_drop_count))
+
+    if current_drop_count > last_drop_count:
+        write_syslog("control_plane_drop_check: packet drops detected, current drop count: {}".format(current_drop_count))
+        return True
+    else:
+        return False
+
+
+if __name__ == "__main__":
+    res = True
+    try:
+        res = check_packet_drops()
+    except Exception as e:
+        write_syslog("control_plane_drop_check exception: {}".format(str(e)))
+
+    sys.exit(1 if res else 0)

From 54b137c61e839fa8598c0e6bc242e136eabb1d2c Mon Sep 17 00:00:00 2001
From: abdosi <58047199+abdosi@users.noreply.github.com>
Date: Thu, 7 Nov 2024 18:16:25 -0800
Subject: [PATCH 184/364] [Chassis] Added support of subtype for SpineRouter as
 UpstreamLC/DownStreamLC/Supervisor (#20566)

Added support of subtype for SpineRouter as UpstreamLC/DownStreamLC/Supervisor
It is done using MacSec Device Property. Macsec is enable on upstreamLC

---------

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
---
 src/sonic-config-engine/minigraph.py          | 26 +++++++++++++++++
 .../voq_chassis_lc_multi_asic.xml             |  4 +--
 .../voq_chassis_lc_single_asic.xml            |  2 +-
 .../tests/test_chassis_cfggen.py              | 16 +++++++---
 .../tests/device_metadata.json                | 13 +++++++--
 .../tests_config/device_metadata.json         | 29 ++++++++++++++++++-
 .../yang-models/sonic-device_metadata.yang    |  2 +-
 7 files changed, 81 insertions(+), 11 deletions(-)

diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py
index 41fbd383b9ce..e4c513498eed 100644
--- a/src/sonic-config-engine/minigraph.py
+++ b/src/sonic-config-engine/minigraph.py
@@ -158,6 +158,23 @@ def get_chassis_type_and_hostname(root, hname):
                         chassis_hostname = value
     return chassis_type, chassis_hostname
 
+def is_chassis_lc_macsec_enabled(root, hname):
+    macsec_enble = None
+    for child in root:
+        if child.tag == str(QName(ns, "MetadataDeclaration")):
+            devices = child.find(str(QName(ns, "Devices")))
+            for device_meta in devices.findall(str(QName(ns1, "DeviceMetadata"))):
+                device_name = device_meta.find(str(QName(ns1, "Name"))).text
+                if device_name != hname:
+                    continue
+                properties = device_meta.find(str(QName(ns1, "Properties")))
+                for device_property in properties.findall(str(QName(ns1, "DeviceProperty"))):
+                    name = device_property.find(str(QName(ns1, "Name"))).text
+                    value = device_property.find(str(QName(ns1, "Value"))).text
+                    if name == "MacSecEnabled":
+                        macsec_enble = value
+    return macsec_enble
+
 def is_minigraph_for_chassis(chassis_type):
     if chassis_type in [CHASSIS_CARD_VOQ, CHASSIS_CARD_PACKET]:
         return True
@@ -2028,6 +2045,7 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw
     slot_index = None
     max_num_cores = None
     card_type = None
+    macsec_enabled = None
 
     hwsku_qn = QName(ns, "HwSku")
     hostname_qn = QName(ns, "Hostname")
@@ -2041,6 +2059,7 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw
             docker_routing_config_mode = child.text
 
     hwsku, hostname, docker_routing_config_mode, chassis_type, chassis_hostname = parse_global_info(root)
+    macsec_enabled = is_chassis_lc_macsec_enabled(root, hostname)
 
     (ports, alias_map, alias_asic_map) = get_port_config(hwsku=hwsku, platform=platform, port_config_file=port_config_file, asic_name=asic_name, hwsku_config_file=hwsku_config_file)
 
@@ -2172,6 +2191,13 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw
             print("Warning: more than one peer switch was found. Only the first will be parsed: {}".format(results['PEER_SWITCH'].keys()[0]))
 
         results['DEVICE_METADATA']['localhost']['peer_switch'] = list(results['PEER_SWITCH'].keys())[0]
+    elif results['DEVICE_METADATA']['localhost']['type'] == 'SpineRouter':
+        if macsec_enabled == 'True':
+            results['DEVICE_METADATA']['localhost']['subtype'] = 'UpstreamLC'
+        elif macsec_enabled == 'False':
+            results['DEVICE_METADATA']['localhost']['subtype'] = 'DownstreamLC'
+        else:
+            results['DEVICE_METADATA']['localhost']['subtype'] = 'Supervisor'
 
     # Enable tunnel_qos_remap if downstream_redundancy_types(T1) or redundancy_type(T0) = Gemini/Libra
     enable_tunnel_qos_map = False
diff --git a/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_lc_multi_asic.xml b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_lc_multi_asic.xml
index 2bbf8868da5e..f19e6adbb716 100644
--- a/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_lc_multi_asic.xml
+++ b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_lc_multi_asic.xml
@@ -44009,7 +44009,7 @@
                     <a:DeviceProperty>
                         <a:Name>MacSecEnabled</a:Name>
                         <a:Reference i:nil="true" />
-                        <a:Value>True</a:Value>
+                        <a:Value>False</a:Value>
                     </a:DeviceProperty>
                     <a:DeviceProperty>
                         <a:Name>OsVersion</a:Name>
@@ -48335,4 +48335,4 @@
     <HwSku>Sonic-400g-lc-sku</HwSku>
     <Version>1.0.1388.35297&#xD;
 </Version>
-</DeviceMiniGraph>
\ No newline at end of file
+</DeviceMiniGraph>
diff --git a/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_lc_single_asic.xml b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_lc_single_asic.xml
index bb237ecbd79d..7e02cc781a8d 100644
--- a/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_lc_single_asic.xml
+++ b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_lc_single_asic.xml
@@ -43525,7 +43525,7 @@
           <a:DeviceProperty>
             <a:Name>MacSecEnabled</a:Name>
             <a:Reference i:nil="true"/>
-            <a:Value>False</a:Value>
+            <a:Value>True</a:Value>
           </a:DeviceProperty>
           <a:DeviceProperty>
             <a:Name>OsVersion</a:Name>
diff --git a/src/sonic-config-engine/tests/test_chassis_cfggen.py b/src/sonic-config-engine/tests/test_chassis_cfggen.py
index 83d4be6f3550..70805a9dc5e0 100644
--- a/src/sonic-config-engine/tests/test_chassis_cfggen.py
+++ b/src/sonic-config-engine/tests/test_chassis_cfggen.py
@@ -138,7 +138,8 @@ def test_device_metadata(self):
             'switch_type': 'voq',
             'switch_id': 20,
             'max_cores': 64,
-            'slice_type': 'AZNG_Production'})
+            'slice_type': 'AZNG_Production',
+            'subtype': 'UpstreamLC'})
 
     def test_port(self):
         argument = ['-m', self.sample_graph, '-p',
@@ -444,8 +445,10 @@ def test_device_metadata(self):
             'chassis_hostname': 'str-sonic',
             'deployment_id': '3',
             'cluster': 'TestbedForstr-sonic',
+            'subtype': 'DownstreamLC',
             'switch_type': 'voq',
-            'max_cores': 64})
+            'max_cores': 64,
+            })
 
     def test_device_metadata_for_namespace(self):
         argument = [
@@ -473,7 +476,8 @@ def test_device_metadata_for_namespace(self):
             'asic_name': 'asic0',
             'switch_type': 'voq',
             'switch_id': 8,
-            'max_cores': 64})
+            'max_cores': 64,
+            'subtype': 'DownstreamLC'})
 
     def test_system_port(self):
         argument = ['-m', self.sample_graph,
@@ -920,6 +924,7 @@ def test_device_metadata(self):
                 "chassis_hostname": "str-sonic",
                 "deployment_id": "3",
                 "cluster": "TestbedForstr-sonic",
+                "subtype": "Supervisor",
                 "switch_type": "fabric",
                 "sub_role": "fabric",
                 "max_cores": 64
@@ -950,7 +955,8 @@ def test_device_metadata_for_namespace(self):
                 "sub_role": "Fabric",
                 "asic_name": "asic0",
                 "switch_type": "fabric",
-                "max_cores": 64
+                "max_cores": 64,
+                "subtype": "Supervisor",
             }
         )
 
@@ -1054,6 +1060,7 @@ def test_device_metadata(self):
                 "chassis_hostname": "str-sonic",
                 "deployment_id": "3",
                 "cluster": "TestbedForstr-sonic",
+                "subtype": "Supervisor",
                 "switch_type": "chassis-packet",
                 "sub_role": "BackEnd",
                 "max_cores": 64
@@ -1082,6 +1089,7 @@ def test_device_metadata_for_namespace(self):
                 "deployment_id": "3",
                 "cluster": "TestbedForstr-sonic",
                 "sub_role": "BackEnd",
+                "subtype": "Supervisor",
                 "asic_name": "asic0",
                 "switch_type": "chassis-packet",
                 "max_cores": 64
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
index 119e5b7cec44..99310fecc6ab 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
@@ -94,8 +94,17 @@
     "DEVICE_METADATA_VALID_CLUSTER": {
         "desc": "Verifying valid cluster configuration."
     },
-    "DEVICE_METADATA_VALID_SUBTYPE": {
-        "desc": "Verifying valid subtype value"
+    "DEVICE_METADATA_VALID_SUBTYPE0": {
+        "desc": "Verifying valid subtype value dualtor"
+    },
+    "DEVICE_METADATA_VALID_SUBTYPE1": {
+        "desc": "Verifying valid subtype value supervisor"
+    },
+    "DEVICE_METADATA_VALID_SUBTYPE2": {
+        "desc": "Verifying valid subtype value upstreamLC"
+    },
+    "DEVICE_METADATA_VALID_SUBTYPE3": {
+        "desc": "Verifying valid subtype value downstreamLC"
     },
     "DEVICE_METADATA_INVALID_SUBTYPE": {
         "desc": "Verifying invalid subtype value",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
index 5d0e0201b4ff..44f0966c8b18 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
@@ -256,7 +256,7 @@
             }
         }
     },
-    "DEVICE_METADATA_VALID_SUBTYPE": {
+    "DEVICE_METADATA_VALID_SUBTYPE0": {
         "sonic-device_metadata:sonic-device_metadata": {
             "sonic-device_metadata:DEVICE_METADATA": {
                 "sonic-device_metadata:localhost": {
@@ -265,6 +265,33 @@
             }
         }
     },
+    "DEVICE_METADATA_VALID_SUBTYPE1": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "subtype": "Supervisor"
+                }
+            }
+        }
+    },
+    "DEVICE_METADATA_VALID_SUBTYPE2": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "subtype": "UpstreamLC"
+                }
+            }
+        }
+    },
+    "DEVICE_METADATA_VALID_SUBTYPE3": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "subtype": "DownstreamLC"
+                }
+            }
+        }
+    },
     "DEVICE_METADATA_INVALID_SUBTYPE": {
         "sonic-device_metadata:sonic-device_metadata": {
             "sonic-device_metadata:DEVICE_METADATA": {
diff --git a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
index c097da81a870..0d0607fd3cab 100644
--- a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
+++ b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
@@ -164,7 +164,7 @@ module sonic-device_metadata {
 
                 leaf subtype {
                     type string {
-                        pattern "DualToR|SmartSwitch";
+                        pattern "DualToR|SmartSwitch|Supervisor|UpstreamLC|DownstreamLC";
                     }
                 }
 

From 3fa98905ee5d5e8c4eaf6b523235e152f8a1f2e4 Mon Sep 17 00:00:00 2001
From: Philo <135693886+philo-micas@users.noreply.github.com>
Date: Sat, 9 Nov 2024 03:15:13 +0800
Subject: [PATCH 185/364] [Micas/Platform]platform support M2-W6510-32C
 (#20625)

* [Micas/Platform]platform support M2-W6510-32C

Signed-off-by: philo <philo@micasnetworks.com>

* Update control

* update device files

Signed-off-by: philo <philo@micasnetworks.com>

* triggle rebuild

Signed-off-by: philo <philo@micasnetworks.com>

---------

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../M2-W6510-32C/hwsku.json                   |  100 ++
 .../M2-W6510-32C/port_config.ini              |   33 +
 .../M2-W6510-32C/sai.profile                  |    1 +
 .../td3-m2-w6510-32c-32x100G.config.bcm       |  578 ++++++++
 .../custom_led.bin                            |  Bin 0 -> 492 bytes
 .../x86_64-micas_m2-w6510-32c-r0/default_sku  |    1 +
 .../x86_64-micas_m2-w6510-32c-r0/dev.xml      |  432 ++++++
 .../dev_exhaust.xml                           |  432 ++++++
 .../micas/x86_64-micas_m2-w6510-32c-r0/fru.py |  961 +++++++++++++
 .../installer.conf                            |    2 +
 .../led_proc_init.soc                         |    7 +
 .../media_settings.json                       |  708 +++++++++
 .../x86_64-micas_m2-w6510-32c-r0/monitor.py   |  402 ++++++
 .../x86_64-micas_m2-w6510-32c-r0/pcie.yaml    |  440 ++++++
 .../platform.json                             |  779 ++++++++++
 .../platform_asic                             |    1 +
 .../platform_components.json                  |   16 +
 .../plugins/sfputil.py                        |  244 ++++
 .../plugins/ssd_util.py                       |  318 +++++
 .../pmon_daemon_control.json                  |    3 +
 .../system_health_monitoring_config.json      |    0
 platform/broadcom/one-image.mk                |    3 +-
 platform/broadcom/platform-modules-micas.mk   |    8 +
 .../debian/control                            |    6 +
 ...latform-modules-micas-m2-w6510-32c.install |    1 +
 ...atform-modules-micas-m2-w6510-32c.postinst |   10 +
 .../debian/rule.mk                            |    1 +
 .../m2-w6510-32c/Makefile                     |   25 +
 .../x86_64_micas_m2_w6510_32c_r0_config.py    | 1078 ++++++++++++++
 ...86_64_micas_m2_w6510_32c_r0_port_config.py |    7 +
 .../x86_64_micas_m2_w6510_32c_r0_device.py    | 1263 +++++++++++++++++
 ...64_micas_m2_w6510_32c_r0_exhaust_device.py | 1263 +++++++++++++++++
 .../x86_64_micas_m2_w6510_32c_r0_monitor.py   |  153 ++
 .../m2-w6510-32c/modules/driver/Makefile      |   11 +
 .../modules/driver/wb_i2c_dev_device.c        |  145 ++
 .../driver/wb_i2c_mux_pca954x_device.c        |  244 ++++
 .../modules/driver/wb_i2c_ocores_device.c     |  443 ++++++
 .../modules/driver/wb_io_dev_device.c         |  123 ++
 .../modules/driver/wb_lpc_drv_device.c        |  150 ++
 .../modules/driver/wb_pcie_dev_device.c       |  113 ++
 .../plat_sysfs_cfg/WB_PLAT_CPLD.cfg           |   38 +
 .../plat_sysfs_cfg/WB_PLAT_FAN.cfg            |  372 +++++
 .../plat_sysfs_cfg/WB_PLAT_PSU.cfg            |   64 +
 .../plat_sysfs_cfg/WB_PLAT_SFF.cfg            |  306 ++++
 .../m2-w6510-32c/plat_sysfs_cfg/cfg_file_name |    4 +
 .../m2-w6510-32c/setup.py                     |   39 +
 46 files changed, 11327 insertions(+), 1 deletion(-)
 create mode 100644 device/micas/x86_64-micas_m2-w6510-32c-r0/M2-W6510-32C/hwsku.json
 create mode 100644 device/micas/x86_64-micas_m2-w6510-32c-r0/M2-W6510-32C/port_config.ini
 create mode 100644 device/micas/x86_64-micas_m2-w6510-32c-r0/M2-W6510-32C/sai.profile
 create mode 100644 device/micas/x86_64-micas_m2-w6510-32c-r0/M2-W6510-32C/td3-m2-w6510-32c-32x100G.config.bcm
 create mode 100644 device/micas/x86_64-micas_m2-w6510-32c-r0/custom_led.bin
 create mode 100644 device/micas/x86_64-micas_m2-w6510-32c-r0/default_sku
 create mode 100644 device/micas/x86_64-micas_m2-w6510-32c-r0/dev.xml
 create mode 100644 device/micas/x86_64-micas_m2-w6510-32c-r0/dev_exhaust.xml
 create mode 100644 device/micas/x86_64-micas_m2-w6510-32c-r0/fru.py
 create mode 100644 device/micas/x86_64-micas_m2-w6510-32c-r0/installer.conf
 create mode 100644 device/micas/x86_64-micas_m2-w6510-32c-r0/led_proc_init.soc
 create mode 100644 device/micas/x86_64-micas_m2-w6510-32c-r0/media_settings.json
 create mode 100644 device/micas/x86_64-micas_m2-w6510-32c-r0/monitor.py
 create mode 100644 device/micas/x86_64-micas_m2-w6510-32c-r0/pcie.yaml
 create mode 100644 device/micas/x86_64-micas_m2-w6510-32c-r0/platform.json
 create mode 100644 device/micas/x86_64-micas_m2-w6510-32c-r0/platform_asic
 create mode 100644 device/micas/x86_64-micas_m2-w6510-32c-r0/platform_components.json
 create mode 100644 device/micas/x86_64-micas_m2-w6510-32c-r0/plugins/sfputil.py
 create mode 100644 device/micas/x86_64-micas_m2-w6510-32c-r0/plugins/ssd_util.py
 create mode 100644 device/micas/x86_64-micas_m2-w6510-32c-r0/pmon_daemon_control.json
 create mode 100755 device/micas/x86_64-micas_m2-w6510-32c-r0/system_health_monitoring_config.json
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.install
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.postinst
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/Makefile
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/config/x86_64_micas_m2_w6510_32c_r0_config.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/config/x86_64_micas_m2_w6510_32c_r0_port_config.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/hal-config/x86_64_micas_m2_w6510_32c_r0_device.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/hal-config/x86_64_micas_m2_w6510_32c_r0_exhaust_device.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/hal-config/x86_64_micas_m2_w6510_32c_r0_monitor.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_i2c_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_i2c_mux_pca954x_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_i2c_ocores_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_io_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_lpc_drv_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_pcie_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/plat_sysfs_cfg/WB_PLAT_FAN.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/plat_sysfs_cfg/WB_PLAT_PSU.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/plat_sysfs_cfg/WB_PLAT_SFF.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/plat_sysfs_cfg/cfg_file_name
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/setup.py

diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/M2-W6510-32C/hwsku.json b/device/micas/x86_64-micas_m2-w6510-32c-r0/M2-W6510-32C/hwsku.json
new file mode 100644
index 000000000000..664c6740cc9e
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-32c-r0/M2-W6510-32C/hwsku.json
@@ -0,0 +1,100 @@
+{
+	"interfaces": {
+        "Ethernet1": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet5": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet9": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet13": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet17": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet21": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet25": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet29": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet33": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet37": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet41": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet45": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet49": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet53": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet57": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet61": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet65": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet69": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet73": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet77": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet81": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet85": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet89": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet93": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet97": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet101": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet105": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet109": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet113": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet117": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet121": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet125": {
+            "default_brkout_mode": "1x100G"
+        }
+	}
+}
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/M2-W6510-32C/port_config.ini b/device/micas/x86_64-micas_m2-w6510-32c-r0/M2-W6510-32C/port_config.ini
new file mode 100644
index 000000000000..4db8b2a958c0
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-32c-r0/M2-W6510-32C/port_config.ini
@@ -0,0 +1,33 @@
+# name           lanes                alias                  index      speed
+Ethernet1        5,6,7,8              hundredGigE0/1         0          100000
+Ethernet5        1,2,3,4              hundredGigE0/2         1          100000
+Ethernet9        13,14,15,16          hundredGigE0/3         2          100000
+Ethernet13       9,10,11,12           hundredGigE0/4         3          100000
+Ethernet17       21,22,23,24          hundredGigE0/5         4          100000
+Ethernet21       17,18,19,20          hundredGigE0/6         5          100000
+Ethernet25       29,30,31,32          hundredGigE0/7         6          100000
+Ethernet29       25,26,27,28          hundredGigE0/8         7          100000
+Ethernet33       37,38,39,40          hundredGigE0/9         8          100000
+Ethernet37       33,34,35,36          hundredGigE0/10        9          100000
+Ethernet41       45,46,47,48          hundredGigE0/11        10         100000
+Ethernet45       41,42,43,44          hundredGigE0/12        11         100000
+Ethernet49       53,54,55,56          hundredGigE0/13        12         100000
+Ethernet53       49,50,51,52          hundredGigE0/14        13         100000
+Ethernet57       61,62,63,64          hundredGigE0/15        14         100000
+Ethernet61       57,58,59,60          hundredGigE0/16        15         100000
+Ethernet65       69,70,71,72          hundredGigE0/17        16         100000
+Ethernet69       65,66,67,68          hundredGigE0/18        17         100000
+Ethernet73       77,78,79,80          hundredGigE0/19        18         100000
+Ethernet77       73,74,75,76          hundredGigE0/20        19         100000
+Ethernet81       85,86,87,88          hundredGigE0/21        20         100000
+Ethernet85       81,82,83,84          hundredGigE0/22        21         100000
+Ethernet89       93,94,95,96          hundredGigE0/23        22         100000
+Ethernet93       89,90,91,92          hundredGigE0/24        23         100000
+Ethernet97       101,102,103,104      hundredGigE0/25        24         100000
+Ethernet101      97,98,99,100         hundredGigE0/26        25         100000
+Ethernet105      109,110,111,112      hundredGigE0/27        26         100000
+Ethernet109      105,106,107,108      hundredGigE0/28        27         100000
+Ethernet113      117,118,119,120      hundredGigE0/29        28         100000
+Ethernet117      113,114,115,116      hundredGigE0/30        29         100000
+Ethernet121      125,126,127,128      hundredGigE0/31        30         100000
+Ethernet125      121,122,123,124      hundredGigE0/32        31         100000
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/M2-W6510-32C/sai.profile b/device/micas/x86_64-micas_m2-w6510-32c-r0/M2-W6510-32C/sai.profile
new file mode 100644
index 000000000000..f6e828c40503
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-32c-r0/M2-W6510-32C/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-m2-w6510-32c-32x100G.config.bcm
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/M2-W6510-32C/td3-m2-w6510-32c-32x100G.config.bcm b/device/micas/x86_64-micas_m2-w6510-32c-r0/M2-W6510-32C/td3-m2-w6510-32c-32x100G.config.bcm
new file mode 100644
index 000000000000..2d89ccba4e5b
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-32c-r0/M2-W6510-32C/td3-m2-w6510-32c-32x100G.config.bcm
@@ -0,0 +1,578 @@
+l2_mem_entries=32768
+l3_mem_entries=16384
+l3_alpm_enable=2
+ipv6_lpm_128b_enable=0x1
+l2xmsg_mode=0
+l3_max_ecmp_mode=1
+svi_my_station_optimization=1
+sai_nbr_bcast_ifp_optimized=2
+sai_stats_support_mask=0x1
+bcm_num_cos=8
+bcm_stat_interval=2000000
+cdma_timeout_usec=3000000
+core_clock_frequency=1525
+dpp_clock_ratio=2:3
+help_cli_enable=1
+ifp_inports_support_enable=1
+#lpm_scaling_enable=1
+max_vp_lags=256
+mem_cache_enable=0
+memlist_enable=1
+miim_intr_enable=0
+module_64ports=1
+oversubscribe_mode=1
+oversubscribe_mixed_sister_25_50_enable=1
+parity_enable=1
+parity_correction=1
+#pbmp_gport_stack.0=0x0000000000000000000000000000000000000000000000000000000000000000
+#pbmp_xport_xe.0=0x00000000000000000000000000000000888ffffffffffff9fffffffffffffffe
+pbmp_xport_xe=0xffffffffffffffffffffffffffffffffffffffffe
+phy_chain_rx_lane_map_physical{5.0}=0x0123
+phy_chain_rx_lane_map_physical{1.0}=0x0132
+phy_chain_rx_lane_map_physical{13.0}=0x0123
+phy_chain_rx_lane_map_physical{9.0}=0x0132
+phy_chain_rx_lane_map_physical{21.0}=0x0123
+phy_chain_rx_lane_map_physical{17.0}=0x0132
+phy_chain_rx_lane_map_physical{29.0}=0x0123
+phy_chain_rx_lane_map_physical{25.0}=0x0132
+phy_chain_rx_lane_map_physical{37.0}=0x0123
+phy_chain_rx_lane_map_physical{33.0}=0x0132
+phy_chain_rx_lane_map_physical{45.0}=0x0123
+phy_chain_rx_lane_map_physical{41.0}=0x0132
+phy_chain_rx_lane_map_physical{53.0}=0x0123
+phy_chain_rx_lane_map_physical{49.0}=0x0132
+phy_chain_rx_lane_map_physical{61.0}=0x0123
+phy_chain_rx_lane_map_physical{57.0}=0x0132
+phy_chain_rx_lane_map_physical{69.0}=0x2301
+phy_chain_rx_lane_map_physical{65.0}=0x2310
+phy_chain_rx_lane_map_physical{77.0}=0x2301
+phy_chain_rx_lane_map_physical{73.0}=0x2310
+phy_chain_rx_lane_map_physical{85.0}=0x2301
+phy_chain_rx_lane_map_physical{81.0}=0x2310
+phy_chain_rx_lane_map_physical{93.0}=0x2301
+phy_chain_rx_lane_map_physical{89.0}=0x2310
+phy_chain_rx_lane_map_physical{101.0}=0x2301
+phy_chain_rx_lane_map_physical{97.0}=0x2310
+phy_chain_rx_lane_map_physical{109.0}=0x2301
+phy_chain_rx_lane_map_physical{105.0}=0x2310
+phy_chain_rx_lane_map_physical{117.0}=0x2301
+phy_chain_rx_lane_map_physical{113.0}=0x2310
+phy_chain_rx_lane_map_physical{125.0}=0x2301
+phy_chain_rx_lane_map_physical{121.0}=0x2310
+
+phy_chain_tx_lane_map_physical{5.0}=0x0123
+phy_chain_tx_lane_map_physical{1.0}=0x2031
+phy_chain_tx_lane_map_physical{13.0}=0x0123
+phy_chain_tx_lane_map_physical{9.0}=0x2031
+phy_chain_tx_lane_map_physical{21.0}=0x0123
+phy_chain_tx_lane_map_physical{17.0}=0x2031
+phy_chain_tx_lane_map_physical{29.0}=0x0123
+phy_chain_tx_lane_map_physical{25.0}=0x2031
+phy_chain_tx_lane_map_physical{37.0}=0x0123
+phy_chain_tx_lane_map_physical{33.0}=0x2031
+phy_chain_tx_lane_map_physical{45.0}=0x0123
+phy_chain_tx_lane_map_physical{41.0}=0x2031
+phy_chain_tx_lane_map_physical{53.0}=0x0123
+phy_chain_tx_lane_map_physical{49.0}=0x2031
+phy_chain_tx_lane_map_physical{61.0}=0x0123
+phy_chain_tx_lane_map_physical{57.0}=0x2031
+phy_chain_tx_lane_map_physical{69.0}=0x2301
+phy_chain_tx_lane_map_physical{65.0}=0x0213
+phy_chain_tx_lane_map_physical{77.0}=0x2301
+phy_chain_tx_lane_map_physical{73.0}=0x0213
+phy_chain_tx_lane_map_physical{85.0}=0x2301
+phy_chain_tx_lane_map_physical{81.0}=0x0213
+phy_chain_tx_lane_map_physical{93.0}=0x2301
+phy_chain_tx_lane_map_physical{89.0}=0x0213
+phy_chain_tx_lane_map_physical{101.0}=0x2301
+phy_chain_tx_lane_map_physical{97.0}=0x0213
+phy_chain_tx_lane_map_physical{109.0}=0x2301
+phy_chain_tx_lane_map_physical{105.0}=0x0213
+phy_chain_tx_lane_map_physical{117.0}=0x2301
+phy_chain_tx_lane_map_physical{113.0}=0x0213
+phy_chain_tx_lane_map_physical{125.0}=0x2301
+phy_chain_tx_lane_map_physical{121.0}=0x0213
+
+phy_chain_rx_polarity_flip_physical{5.0}=0x0
+phy_chain_rx_polarity_flip_physical{6.0}=0x1
+phy_chain_rx_polarity_flip_physical{7.0}=0x1
+phy_chain_rx_polarity_flip_physical{8.0}=0x1
+phy_chain_rx_polarity_flip_physical{1.0}=0x0
+phy_chain_rx_polarity_flip_physical{2.0}=0x0
+phy_chain_rx_polarity_flip_physical{3.0}=0x1
+phy_chain_rx_polarity_flip_physical{4.0}=0x1
+phy_chain_rx_polarity_flip_physical{13.0}=0x0
+phy_chain_rx_polarity_flip_physical{14.0}=0x1
+phy_chain_rx_polarity_flip_physical{15.0}=0x1
+phy_chain_rx_polarity_flip_physical{16.0}=0x1
+phy_chain_rx_polarity_flip_physical{9.0}=0x0
+phy_chain_rx_polarity_flip_physical{10.0}=0x0
+phy_chain_rx_polarity_flip_physical{11.0}=0x1
+phy_chain_rx_polarity_flip_physical{12.0}=0x1
+phy_chain_rx_polarity_flip_physical{21.0}=0x0
+phy_chain_rx_polarity_flip_physical{22.0}=0x1
+phy_chain_rx_polarity_flip_physical{23.0}=0x1
+phy_chain_rx_polarity_flip_physical{24.0}=0x1
+phy_chain_rx_polarity_flip_physical{17.0}=0x0
+phy_chain_rx_polarity_flip_physical{18.0}=0x0
+phy_chain_rx_polarity_flip_physical{19.0}=0x1
+phy_chain_rx_polarity_flip_physical{20.0}=0x1
+phy_chain_rx_polarity_flip_physical{29.0}=0x1
+phy_chain_rx_polarity_flip_physical{30.0}=0x0
+phy_chain_rx_polarity_flip_physical{31.0}=0x0
+phy_chain_rx_polarity_flip_physical{32.0}=0x0
+phy_chain_rx_polarity_flip_physical{25.0}=0x1
+phy_chain_rx_polarity_flip_physical{26.0}=0x0
+phy_chain_rx_polarity_flip_physical{27.0}=0x0
+phy_chain_rx_polarity_flip_physical{28.0}=0x0
+phy_chain_rx_polarity_flip_physical{37.0}=0x1
+phy_chain_rx_polarity_flip_physical{38.0}=0x0
+phy_chain_rx_polarity_flip_physical{39.0}=0x0
+phy_chain_rx_polarity_flip_physical{40.0}=0x0
+phy_chain_rx_polarity_flip_physical{33.0}=0x1
+phy_chain_rx_polarity_flip_physical{34.0}=0x1
+phy_chain_rx_polarity_flip_physical{35.0}=0x0
+phy_chain_rx_polarity_flip_physical{36.0}=0x0
+phy_chain_rx_polarity_flip_physical{45.0}=0x1
+phy_chain_rx_polarity_flip_physical{46.0}=0x0
+phy_chain_rx_polarity_flip_physical{47.0}=0x0
+phy_chain_rx_polarity_flip_physical{48.0}=0x0
+phy_chain_rx_polarity_flip_physical{41.0}=0x1
+phy_chain_rx_polarity_flip_physical{42.0}=0x1
+phy_chain_rx_polarity_flip_physical{43.0}=0x0
+phy_chain_rx_polarity_flip_physical{44.0}=0x0
+phy_chain_rx_polarity_flip_physical{53.0}=0x1
+phy_chain_rx_polarity_flip_physical{54.0}=0x0
+phy_chain_rx_polarity_flip_physical{55.0}=0x0
+phy_chain_rx_polarity_flip_physical{56.0}=0x0
+phy_chain_rx_polarity_flip_physical{49.0}=0x1
+phy_chain_rx_polarity_flip_physical{50.0}=0x1
+phy_chain_rx_polarity_flip_physical{51.0}=0x0
+phy_chain_rx_polarity_flip_physical{52.0}=0x0
+phy_chain_rx_polarity_flip_physical{61.0}=0x1
+phy_chain_rx_polarity_flip_physical{62.0}=0x1
+phy_chain_rx_polarity_flip_physical{63.0}=0x0
+phy_chain_rx_polarity_flip_physical{64.0}=0x1
+phy_chain_rx_polarity_flip_physical{57.0}=0x1
+phy_chain_rx_polarity_flip_physical{58.0}=0x1
+phy_chain_rx_polarity_flip_physical{59.0}=0x0
+phy_chain_rx_polarity_flip_physical{60.0}=0x0
+phy_chain_rx_polarity_flip_physical{69.0}=0x1
+phy_chain_rx_polarity_flip_physical{70.0}=0x0
+phy_chain_rx_polarity_flip_physical{71.0}=0x0
+phy_chain_rx_polarity_flip_physical{72.0}=0x0
+phy_chain_rx_polarity_flip_physical{65.0}=0x1
+phy_chain_rx_polarity_flip_physical{66.0}=0x0
+phy_chain_rx_polarity_flip_physical{67.0}=0x0
+phy_chain_rx_polarity_flip_physical{68.0}=0x0
+phy_chain_rx_polarity_flip_physical{77.0}=0x1
+phy_chain_rx_polarity_flip_physical{78.0}=0x0
+phy_chain_rx_polarity_flip_physical{79.0}=0x0
+phy_chain_rx_polarity_flip_physical{80.0}=0x0
+phy_chain_rx_polarity_flip_physical{73.0}=0x1
+phy_chain_rx_polarity_flip_physical{74.0}=0x0
+phy_chain_rx_polarity_flip_physical{75.0}=0x0
+phy_chain_rx_polarity_flip_physical{76.0}=0x0
+phy_chain_rx_polarity_flip_physical{85.0}=0x1
+phy_chain_rx_polarity_flip_physical{86.0}=0x0
+phy_chain_rx_polarity_flip_physical{87.0}=0x0
+phy_chain_rx_polarity_flip_physical{88.0}=0x0
+phy_chain_rx_polarity_flip_physical{81.0}=0x1
+phy_chain_rx_polarity_flip_physical{82.0}=0x0
+phy_chain_rx_polarity_flip_physical{83.0}=0x0
+phy_chain_rx_polarity_flip_physical{84.0}=0x0
+phy_chain_rx_polarity_flip_physical{93.0}=0x1
+phy_chain_rx_polarity_flip_physical{94.0}=0x0
+phy_chain_rx_polarity_flip_physical{95.0}=0x0
+phy_chain_rx_polarity_flip_physical{96.0}=0x0
+phy_chain_rx_polarity_flip_physical{89.0}=0x1
+phy_chain_rx_polarity_flip_physical{90.0}=0x0
+phy_chain_rx_polarity_flip_physical{91.0}=0x0
+phy_chain_rx_polarity_flip_physical{92.0}=0x0
+phy_chain_rx_polarity_flip_physical{101.0}=0x1
+phy_chain_rx_polarity_flip_physical{102.0}=0x0
+phy_chain_rx_polarity_flip_physical{103.0}=0x0
+phy_chain_rx_polarity_flip_physical{104.0}=0x0
+phy_chain_rx_polarity_flip_physical{97.0}=0x1
+phy_chain_rx_polarity_flip_physical{98.0}=0x0
+phy_chain_rx_polarity_flip_physical{99.0}=0x0
+phy_chain_rx_polarity_flip_physical{100.0}=0x0
+phy_chain_rx_polarity_flip_physical{109.0}=0x0
+phy_chain_rx_polarity_flip_physical{110.0}=0x1
+phy_chain_rx_polarity_flip_physical{111.0}=0x1
+phy_chain_rx_polarity_flip_physical{112.0}=0x1
+phy_chain_rx_polarity_flip_physical{105.0}=0x0
+phy_chain_rx_polarity_flip_physical{106.0}=0x1
+phy_chain_rx_polarity_flip_physical{107.0}=0x1
+phy_chain_rx_polarity_flip_physical{108.0}=0x1
+phy_chain_rx_polarity_flip_physical{117.0}=0x0
+phy_chain_rx_polarity_flip_physical{118.0}=0x1
+phy_chain_rx_polarity_flip_physical{119.0}=0x1
+phy_chain_rx_polarity_flip_physical{120.0}=0x1
+phy_chain_rx_polarity_flip_physical{113.0}=0x0
+phy_chain_rx_polarity_flip_physical{114.0}=0x1
+phy_chain_rx_polarity_flip_physical{115.0}=0x1
+phy_chain_rx_polarity_flip_physical{116.0}=0x1
+phy_chain_rx_polarity_flip_physical{125.0}=0x0
+phy_chain_rx_polarity_flip_physical{126.0}=0x1
+phy_chain_rx_polarity_flip_physical{127.0}=0x1
+phy_chain_rx_polarity_flip_physical{128.0}=0x1
+phy_chain_rx_polarity_flip_physical{121.0}=0x0
+phy_chain_rx_polarity_flip_physical{122.0}=0x1
+phy_chain_rx_polarity_flip_physical{123.0}=0x1
+phy_chain_rx_polarity_flip_physical{124.0}=0x1
+
+phy_chain_tx_polarity_flip_physical{5.0}=0x1
+phy_chain_tx_polarity_flip_physical{6.0}=0x0
+phy_chain_tx_polarity_flip_physical{7.0}=0x1
+phy_chain_tx_polarity_flip_physical{8.0}=0x0
+phy_chain_tx_polarity_flip_physical{1.0}=0x0
+phy_chain_tx_polarity_flip_physical{2.0}=0x1
+phy_chain_tx_polarity_flip_physical{3.0}=0x1
+phy_chain_tx_polarity_flip_physical{4.0}=0x0
+phy_chain_tx_polarity_flip_physical{13.0}=0x1
+phy_chain_tx_polarity_flip_physical{14.0}=0x0
+phy_chain_tx_polarity_flip_physical{15.0}=0x1
+phy_chain_tx_polarity_flip_physical{16.0}=0x0
+phy_chain_tx_polarity_flip_physical{9.0}=0x0
+phy_chain_tx_polarity_flip_physical{10.0}=0x1
+phy_chain_tx_polarity_flip_physical{11.0}=0x1
+phy_chain_tx_polarity_flip_physical{12.0}=0x0
+phy_chain_tx_polarity_flip_physical{21.0}=0x1
+phy_chain_tx_polarity_flip_physical{22.0}=0x0
+phy_chain_tx_polarity_flip_physical{23.0}=0x1
+phy_chain_tx_polarity_flip_physical{24.0}=0x0
+phy_chain_tx_polarity_flip_physical{17.0}=0x0
+phy_chain_tx_polarity_flip_physical{18.0}=0x1
+phy_chain_tx_polarity_flip_physical{19.0}=0x1
+phy_chain_tx_polarity_flip_physical{20.0}=0x0
+phy_chain_tx_polarity_flip_physical{29.0}=0x1
+phy_chain_tx_polarity_flip_physical{30.0}=0x0
+phy_chain_tx_polarity_flip_physical{31.0}=0x1
+phy_chain_tx_polarity_flip_physical{32.0}=0x0
+phy_chain_tx_polarity_flip_physical{25.0}=0x0
+phy_chain_tx_polarity_flip_physical{26.0}=0x1
+phy_chain_tx_polarity_flip_physical{27.0}=0x1
+phy_chain_tx_polarity_flip_physical{28.0}=0x0
+phy_chain_tx_polarity_flip_physical{37.0}=0x1
+phy_chain_tx_polarity_flip_physical{38.0}=0x0
+phy_chain_tx_polarity_flip_physical{39.0}=0x1
+phy_chain_tx_polarity_flip_physical{40.0}=0x0
+phy_chain_tx_polarity_flip_physical{33.0}=0x0
+phy_chain_tx_polarity_flip_physical{34.0}=0x1
+phy_chain_tx_polarity_flip_physical{35.0}=0x1
+phy_chain_tx_polarity_flip_physical{36.0}=0x0
+phy_chain_tx_polarity_flip_physical{45.0}=0x1
+phy_chain_tx_polarity_flip_physical{46.0}=0x0
+phy_chain_tx_polarity_flip_physical{47.0}=0x1
+phy_chain_tx_polarity_flip_physical{48.0}=0x0
+phy_chain_tx_polarity_flip_physical{41.0}=0x0
+phy_chain_tx_polarity_flip_physical{42.0}=0x1
+phy_chain_tx_polarity_flip_physical{43.0}=0x1
+phy_chain_tx_polarity_flip_physical{44.0}=0x1
+phy_chain_tx_polarity_flip_physical{53.0}=0x0
+phy_chain_tx_polarity_flip_physical{54.0}=0x0
+phy_chain_tx_polarity_flip_physical{55.0}=0x1
+phy_chain_tx_polarity_flip_physical{56.0}=0x1
+phy_chain_tx_polarity_flip_physical{49.0}=0x0
+phy_chain_tx_polarity_flip_physical{50.0}=0x1
+phy_chain_tx_polarity_flip_physical{51.0}=0x1
+phy_chain_tx_polarity_flip_physical{52.0}=0x0
+phy_chain_tx_polarity_flip_physical{61.0}=0x1
+phy_chain_tx_polarity_flip_physical{62.0}=0x0
+phy_chain_tx_polarity_flip_physical{63.0}=0x1
+phy_chain_tx_polarity_flip_physical{64.0}=0x1
+phy_chain_tx_polarity_flip_physical{57.0}=0x0
+phy_chain_tx_polarity_flip_physical{58.0}=0x1
+phy_chain_tx_polarity_flip_physical{59.0}=0x1
+phy_chain_tx_polarity_flip_physical{60.0}=0x0
+phy_chain_tx_polarity_flip_physical{69.0}=0x0
+phy_chain_tx_polarity_flip_physical{70.0}=0x1
+phy_chain_tx_polarity_flip_physical{71.0}=0x0
+phy_chain_tx_polarity_flip_physical{72.0}=0x1
+phy_chain_tx_polarity_flip_physical{65.0}=0x1
+phy_chain_tx_polarity_flip_physical{66.0}=0x0
+phy_chain_tx_polarity_flip_physical{67.0}=0x0
+phy_chain_tx_polarity_flip_physical{68.0}=0x1
+phy_chain_tx_polarity_flip_physical{77.0}=0x0
+phy_chain_tx_polarity_flip_physical{78.0}=0x1
+phy_chain_tx_polarity_flip_physical{79.0}=0x0
+phy_chain_tx_polarity_flip_physical{80.0}=0x1
+phy_chain_tx_polarity_flip_physical{73.0}=0x1
+phy_chain_tx_polarity_flip_physical{74.0}=0x0
+phy_chain_tx_polarity_flip_physical{75.0}=0x0
+phy_chain_tx_polarity_flip_physical{76.0}=0x1
+phy_chain_tx_polarity_flip_physical{85.0}=0x0
+phy_chain_tx_polarity_flip_physical{86.0}=0x1
+phy_chain_tx_polarity_flip_physical{87.0}=0x0
+phy_chain_tx_polarity_flip_physical{88.0}=0x1
+phy_chain_tx_polarity_flip_physical{81.0}=0x1
+phy_chain_tx_polarity_flip_physical{82.0}=0x0
+phy_chain_tx_polarity_flip_physical{83.0}=0x0
+phy_chain_tx_polarity_flip_physical{84.0}=0x1
+phy_chain_tx_polarity_flip_physical{93.0}=0x0
+phy_chain_tx_polarity_flip_physical{94.0}=0x1
+phy_chain_tx_polarity_flip_physical{95.0}=0x0
+phy_chain_tx_polarity_flip_physical{96.0}=0x1
+phy_chain_tx_polarity_flip_physical{89.0}=0x1
+phy_chain_tx_polarity_flip_physical{90.0}=0x0
+phy_chain_tx_polarity_flip_physical{91.0}=0x0
+phy_chain_tx_polarity_flip_physical{92.0}=0x1
+phy_chain_tx_polarity_flip_physical{101.0}=0x0
+phy_chain_tx_polarity_flip_physical{102.0}=0x1
+phy_chain_tx_polarity_flip_physical{103.0}=0x0
+phy_chain_tx_polarity_flip_physical{104.0}=0x1
+phy_chain_tx_polarity_flip_physical{97.0}=0x1
+phy_chain_tx_polarity_flip_physical{98.0}=0x0
+phy_chain_tx_polarity_flip_physical{99.0}=0x0
+phy_chain_tx_polarity_flip_physical{100.0}=0x1
+phy_chain_tx_polarity_flip_physical{109.0}=0x0
+phy_chain_tx_polarity_flip_physical{110.0}=0x1
+phy_chain_tx_polarity_flip_physical{111.0}=0x0
+phy_chain_tx_polarity_flip_physical{112.0}=0x1
+phy_chain_tx_polarity_flip_physical{105.0}=0x1
+phy_chain_tx_polarity_flip_physical{106.0}=0x0
+phy_chain_tx_polarity_flip_physical{107.0}=0x0
+phy_chain_tx_polarity_flip_physical{108.0}=0x1
+phy_chain_tx_polarity_flip_physical{117.0}=0x0
+phy_chain_tx_polarity_flip_physical{118.0}=0x1
+phy_chain_tx_polarity_flip_physical{119.0}=0x0
+phy_chain_tx_polarity_flip_physical{120.0}=0x1
+phy_chain_tx_polarity_flip_physical{113.0}=0x1
+phy_chain_tx_polarity_flip_physical{114.0}=0x0
+phy_chain_tx_polarity_flip_physical{115.0}=0x0
+phy_chain_tx_polarity_flip_physical{116.0}=0x1
+phy_chain_tx_polarity_flip_physical{125.0}=0x0
+phy_chain_tx_polarity_flip_physical{126.0}=0x1
+phy_chain_tx_polarity_flip_physical{127.0}=0x0
+phy_chain_tx_polarity_flip_physical{128.0}=0x1
+phy_chain_tx_polarity_flip_physical{121.0}=0x1
+phy_chain_tx_polarity_flip_physical{122.0}=0x0
+phy_chain_tx_polarity_flip_physical{123.0}=0x0
+phy_chain_tx_polarity_flip_physical{124.0}=0x1
+port_flex_enable=1
+portmap_5=5:100
+portmap_1=1:100
+portmap_13=13:100
+portmap_9=9:100
+portmap_21=21:100
+portmap_17=17:100
+portmap_29=29:100
+portmap_25=25:100
+portmap_37=37:100
+portmap_33=33:100
+portmap_45=45:100
+portmap_41=41:100
+portmap_53=53:100
+portmap_49=49:100
+portmap_61=61:100
+portmap_57=57:100
+portmap_71=69:100
+portmap_67=65:100
+portmap_79=77:100
+portmap_75=73:100
+portmap_87=85:100
+portmap_83=81:100
+portmap_95=93:100
+portmap_91=89:100
+portmap_103=101:100
+portmap_99=97:100
+portmap_111=109:100
+portmap_107=105:100
+portmap_119=117:100
+portmap_115=113:100
+portmap_127=125:100
+portmap_123=121:100
+
+dport_map_port_5=1
+dport_map_port_6=2
+dport_map_port_7=3
+dport_map_port_8=4
+dport_map_port_1=5
+dport_map_port_2=6
+dport_map_port_3=7
+dport_map_port_4=8
+dport_map_port_13=9
+dport_map_port_14=10
+dport_map_port_15=11
+dport_map_port_16=12
+dport_map_port_9=13
+dport_map_port_10=14
+dport_map_port_11=15
+dport_map_port_12=16
+dport_map_port_21=17
+dport_map_port_22=18
+dport_map_port_23=19
+dport_map_port_24=20
+dport_map_port_17=21
+dport_map_port_18=22
+dport_map_port_19=23
+dport_map_port_20=24
+dport_map_port_29=25
+dport_map_port_30=26
+dport_map_port_31=27
+dport_map_port_32=28
+dport_map_port_25=29
+dport_map_port_26=30
+dport_map_port_27=31
+dport_map_port_28=32
+dport_map_port_37=33
+dport_map_port_38=34
+dport_map_port_39=35
+dport_map_port_40=36
+dport_map_port_33=37
+dport_map_port_34=38
+dport_map_port_35=39
+dport_map_port_36=40
+dport_map_port_45=41
+dport_map_port_46=42
+dport_map_port_47=43
+dport_map_port_48=44
+dport_map_port_41=45
+dport_map_port_42=46
+dport_map_port_43=47
+dport_map_port_44=48
+dport_map_port_53=49
+dport_map_port_54=50
+dport_map_port_55=51
+dport_map_port_56=52
+dport_map_port_49=53
+dport_map_port_50=54
+dport_map_port_51=55
+dport_map_port_52=56
+dport_map_port_61=57
+dport_map_port_62=58
+dport_map_port_63=59
+dport_map_port_64=60
+dport_map_port_57=61
+dport_map_port_58=62
+dport_map_port_59=63
+dport_map_port_60=64
+dport_map_port_71=65
+dport_map_port_72=66
+dport_map_port_73=67
+dport_map_port_74=68
+dport_map_port_67=69
+dport_map_port_68=70
+dport_map_port_69=71
+dport_map_port_70=72
+dport_map_port_79=73
+dport_map_port_80=74
+dport_map_port_81=75
+dport_map_port_82=76
+dport_map_port_75=77
+dport_map_port_76=78
+dport_map_port_77=79
+dport_map_port_78=80
+dport_map_port_87=81
+dport_map_port_88=82
+dport_map_port_89=83
+dport_map_port_90=84
+dport_map_port_83=85
+dport_map_port_84=86
+dport_map_port_85=87
+dport_map_port_86=88
+dport_map_port_95=89
+dport_map_port_96=90
+dport_map_port_97=91
+dport_map_port_98=92
+dport_map_port_91=93
+dport_map_port_92=94
+dport_map_port_93=95
+dport_map_port_94=96
+dport_map_port_103=97
+dport_map_port_104=98
+dport_map_port_105=99
+dport_map_port_106=100
+dport_map_port_99=101
+dport_map_port_100=102
+dport_map_port_101=103
+dport_map_port_102=104
+dport_map_port_111=105
+dport_map_port_112=106
+dport_map_port_113=107
+dport_map_port_114=108
+dport_map_port_107=109
+dport_map_port_108=110
+dport_map_port_109=111
+dport_map_port_110=112
+dport_map_port_119=113
+dport_map_port_120=114
+dport_map_port_121=115
+dport_map_port_122=116
+dport_map_port_115=117
+dport_map_port_116=118
+dport_map_port_117=119
+dport_map_port_118=120
+dport_map_port_127=121
+dport_map_port_128=122
+dport_map_port_129=123
+dport_map_port_130=124
+dport_map_port_123=125
+dport_map_port_124=126
+dport_map_port_125=127
+dport_map_port_126=128
+
+serdes_if_type_5=14
+serdes_if_type_1=14
+serdes_if_type_13=14
+serdes_if_type_9=14
+serdes_if_type_21=14
+serdes_if_type_17=14
+serdes_if_type_29=14
+serdes_if_type_25=14
+serdes_if_type_37=14
+serdes_if_type_33=14
+serdes_if_type_45=14
+serdes_if_type_41=14
+serdes_if_type_53=14
+serdes_if_type_49=14
+serdes_if_type_61=14
+serdes_if_type_57=14
+serdes_if_type_71=14
+serdes_if_type_67=14
+serdes_if_type_79=14
+serdes_if_type_75=14
+serdes_if_type_87=14
+serdes_if_type_83=14
+serdes_if_type_95=14
+serdes_if_type_91=14
+serdes_if_type_103=14
+serdes_if_type_99=14
+serdes_if_type_111=14
+serdes_if_type_107=14
+serdes_if_type_119=14
+serdes_if_type_115=14
+serdes_if_type_127=14
+serdes_if_type_123=14
+
+reglist_enable=1
+scache_filename=/var/warmboot/wbscache
+schan_intr_enable=0
+stable_size=0x55000000
+stable_location=3
+warmboot_knet_shutdown_mode=1
+tdma_timeout_usec=3000000
+
+#vxlan flex flow mode
+flow_init_mode=1
+
+riot_enable=1
+riot_overlay_l3_intf_mem_size=4096
+riot_overlay_l3_egress_mem_size=32768
+riot_overlay_ecmp_resilient_hash_size=16384
+
+l3_ecmp_levels=2
+
+use_all_splithorizon_groups=1
+sai_tunnel_support=1
+
+#This property allows to enable L2 FDB entry to discard based on Source Mac
+sai_fdb_entry_l2_discard_src_enable=1
+
+#RDMA
+sai_pfc_defaults_disable=1
+sai_optimized_mmu=1
+
+#ACL wb count
+ctr_evict_enable=0
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6510-32c-r0/custom_led.bin
new file mode 100644
index 0000000000000000000000000000000000000000..2800e7b4ee9f2fbf0652f8e4713268877653650f
GIT binary patch
literal 492
zcmY+9KWGzS7{;G3xl7yBLeD>tD6PqTNNo<0CRS}@q5ZDD&<h=|!D6n6y++|WI0O;u
zAXIc{1VP%RHU+`4DwLv|f_s+lGmALg=9;amcd<){AMf)H&+p~!etSsEv`F*R{rc+g
zC3%%y!q{dm$y>zAgR^YMrje}*jRxzZO+5AXC^@@NXVn3=v#fM}D<^ctO06TUs9DE~
zg_@<S3atdp{8Md&;0|pEOW96_l`n1#6jp!lz;-(KKTw@KQJrfYtq}^I^vI>OSe9%L
zg{oxS4I7zsvre!Q5_~wm!Cf-!egUbM;*>^>3^CJdOiNgkGG*OVdih591qUmQ%$erf
zUOy#=g(h<%_FNTx%B8$**yA?i|6R4{`w20qSl$r*$|EzrWfnw2v7#x4dj53e?~DAY
z$ghQrCn6Bx&{EK;Cip&u^V+S=>yW`;R(7bf3VzPNY%Y-FUz&d7xBd27yWW13JiPP$
z9lfWI^ohDZe$wYD;B`dtgkQH$=Xl?U*gcs#7=|!_3otN(EUqArYZ%8QCNP63+{GLg
Xv4DGU@c=bEhL0y$$1^nW0?+Xe@CAr<

literal 0
HcmV?d00001

diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/default_sku b/device/micas/x86_64-micas_m2-w6510-32c-r0/default_sku
new file mode 100644
index 000000000000..4f5ddf1f3e7e
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-32c-r0/default_sku
@@ -0,0 +1 @@
+M2-W6510-32C l2
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/dev.xml b/device/micas/x86_64-micas_m2-w6510-32c-r0/dev.xml
new file mode 100644
index 000000000000..3655aa209abe
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-32c-r0/dev.xml
@@ -0,0 +1,432 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--
+      ### type  1 result/1000
+          type  2 result/100
+          type  3 read bit
+     ### property need check must add int front
+-->
+<catalog>
+    <fans>
+        <fan id="fan1" >
+            <property name="present" location="/sys/wb_plat/fan/fan1/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan1/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan1/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/16-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan1/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan1/motor0/speed"/>
+        </fan>
+        <fan id="fan2" >
+            <property name="present" location="/sys/wb_plat/fan/fan2/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan2/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan2/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/17-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan2/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan2/motor0/speed"/>
+        </fan>
+        <fan id="fan3" >
+            <property name="present" location="/sys/wb_plat/fan/fan3/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan3/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan3/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/18-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan3/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan3/motor0/speed"/>
+        </fan>
+        <fan id="fan4" >
+            <property name="present" location="/sys/wb_plat/fan/fan4/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan4/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan4/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/19-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan4/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan4/motor0/speed"/>
+        </fan>
+        <fan id="fan5" >
+            <property name="present" location="/sys/wb_plat/fan/fan5/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan5/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan5/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/20-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan5/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan5/motor0/speed"/>
+        </fan>
+    </fans>
+    <temps>
+        <temp id="INLET_L_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-004b/hwmon/*/temp1_input" type="1" addend="-3"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-004b/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-004b/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="INLET_R_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-0048/hwmon/*/temp1_input" type="1" addend="-3"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-0048/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-0048/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="OUTLET_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="MAC_IN_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_max" type="1"/>
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="MAC_OUT_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-004a/hwmon/*/temp1_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-004a/hwmon/*/temp1_max" type="1"/>
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-004a/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+    </temps>
+    <psus>
+        <psu id="psu1" >
+            <property name="present" location="/sys/wb_plat/psu/psu1/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu1/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/24-0050/eeprom"/>
+            <property name="in_current"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/24-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/24-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/24-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/24-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/power2_input"  type="5"/>
+        </psu>
+        <psu id="psu2" >
+            <property name="present" location="/sys/wb_plat/psu/psu2/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu2/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/25-0050/eeprom"/>
+            <property name="in_current"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/25-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/25-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/25-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/25-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/power2_input"  type="5"/>
+        </psu> 
+    </psus> 
+    <dcdcs>
+        <dcdc id="Switch_1v2_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.440" />
+            <property name="dcdc_min"   gettype="config" value="0.960" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_5v0_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="6.000" />
+            <property name="dcdc_min"   gettype="config" value="4.000" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_Cpld_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_5v0_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_Cpld_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_1v2_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.200" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_QSFP2_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_QSFP1_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_QSFP2_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="25.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_QSFP1_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="25.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Con_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Con_SSD_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Con_1v2_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.440" />
+            <property name="dcdc_min"   gettype="config" value="0.960" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Con_SSD_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="4.500" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Con_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.800" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Con_1v2_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.300" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_5v_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="6.000" />
+            <property name="dcdc_min"   gettype="config" value="4.000" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v7_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.040" />
+            <property name="dcdc_min"   gettype="config" value="1.360" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v7_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.200" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_5v_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.200" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="4.686" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v05_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.260" />
+            <property name="dcdc_min"   gettype="config" value="0.840" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_CORE_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.184" />
+            <property name="dcdc_min"   gettype="config" value="1.456" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v05_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="15.400" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_CORE_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="47.300" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_CORE_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.200" />
+            <property name="dcdc_min"   gettype="config" value="0.600" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_ANALOG_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.960" />
+            <property name="dcdc_min"   gettype="config" value="0.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_CORE_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="240.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_ANALOG_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="26.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v2_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.440" />
+            <property name="dcdc_min"   gettype="config" value="0.960" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_2v23_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.676" />
+            <property name="dcdc_min"   gettype="config" value="1.784" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v2_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="9.900" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_2v23_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.200" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+    </dcdcs>
+    <mactemps>
+        <mactemp id="MAC_DIE_0" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp1_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_1" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp2_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_2" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp3_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_3" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp4_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_4" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp5_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_5" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp6_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_6" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp7_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_7" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp8_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_8" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp9_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_9" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp10_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_10" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp11_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_11" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp12_input"  type="1"/>
+        </mactemp>
+    </mactemps>
+    <cpus location="/sys/class/hwmon/hwmon0"/>
+    <decode>
+    <fanpresent>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </fanpresent>
+    <fanstatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </fanstatus>
+    <psucheck>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </psucheck>
+    <psustatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </psustatus>
+    <psutype>
+        <code key="CSU550AP-3-500" value="PA550II-F"/>
+        <code key="DPS-550AB-39 A" value="PA550II-F"/>
+        <code key="GW-CRPS550N2C" value="PA550II-F"/>
+        <code key="CSU550AP-3-300" value="PA550II-F"/>
+        <code key="DPS-550AB-39 B" value="PA550II-F"/>
+        <code key="CSU550AP-3" value="PA550II-F"/>
+        <code key="CSU550AP-3-501" value="PA550II-R"/>
+        <code key="DPS-550AB-40 A" value="PA550II-R"/>
+        <code key="GW-CRPS550N2RC" value="PA550II-R"/>
+    </psutype>
+    <fan_display_name>
+        <code key="M1HFAN III-F" value="M1HFAN III-F"/>
+        <code key="M1HFAN III-R" value="M1HFAN III-R"/>
+    </fan_display_name>
+    </decode>
+</catalog>
+
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/dev_exhaust.xml b/device/micas/x86_64-micas_m2-w6510-32c-r0/dev_exhaust.xml
new file mode 100644
index 000000000000..e084cc62dcf7
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-32c-r0/dev_exhaust.xml
@@ -0,0 +1,432 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--
+      ### type  1 result/1000
+          type  2 result/100
+          type  3 read bit
+     ### property need check must add int front
+-->
+<catalog>
+    <fans>
+        <fan id="fan1" >
+            <property name="present" location="/sys/wb_plat/fan/fan1/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan1/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan1/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/16-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan1/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan1/motor0/speed"/>
+        </fan>
+        <fan id="fan2" >
+            <property name="present" location="/sys/wb_plat/fan/fan2/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan2/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan2/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/17-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan2/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan2/motor0/speed"/>
+        </fan>
+        <fan id="fan3" >
+            <property name="present" location="/sys/wb_plat/fan/fan3/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan3/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan3/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/18-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan3/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan3/motor0/speed"/>
+        </fan>
+        <fan id="fan4" >
+            <property name="present" location="/sys/wb_plat/fan/fan4/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan4/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan4/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/19-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan4/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan4/motor0/speed"/>
+        </fan>
+        <fan id="fan5" >
+            <property name="present" location="/sys/wb_plat/fan/fan5/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan5/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan5/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/20-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan5/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan5/motor0/speed"/>
+        </fan>
+    </fans>
+    <temps>
+        <temp id="INLET_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_input" type="1" addend="-3"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="OUTLET_L_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-004b/hwmon/*/temp1_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-004b/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-004b/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="OUTLET_R_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-0048/hwmon/*/temp1_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-0048/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-0048/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="MAC_IN_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-004a/hwmon/*/temp1_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-004a/hwmon/*/temp1_max" type="1"/>
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-004a/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="MAC_OUT_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_max" type="1"/>
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+    </temps>
+    <psus>
+        <psu id="psu1" >
+            <property name="present" location="/sys/wb_plat/psu/psu1/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu1/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/24-0050/eeprom"/>
+            <property name="in_current"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/24-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/24-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/24-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/24-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/power2_input"  type="5"/>
+        </psu>
+        <psu id="psu2" >
+            <property name="present" location="/sys/wb_plat/psu/psu2/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu2/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/25-0050/eeprom"/>
+            <property name="in_current"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/25-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/25-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/25-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/25-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/power2_input"  type="5"/>
+        </psu> 
+    </psus> 
+    <dcdcs>
+        <dcdc id="Switch_1v2_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.440" />
+            <property name="dcdc_min"   gettype="config" value="0.960" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_5v0_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="6.000" />
+            <property name="dcdc_min"   gettype="config" value="4.000" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_Cpld_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_5v0_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_Cpld_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_1v2_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.200" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_QSFP2_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_QSFP1_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_QSFP2_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="25.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_QSFP1_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="25.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Con_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Con_SSD_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Con_1v2_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.440" />
+            <property name="dcdc_min"   gettype="config" value="0.960" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Con_SSD_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="4.500" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Con_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.800" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Con_1v2_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.300" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_5v_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="6.000" />
+            <property name="dcdc_min"   gettype="config" value="4.000" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v7_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.040" />
+            <property name="dcdc_min"   gettype="config" value="1.360" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v7_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.200" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_5v_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.200" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="4.686" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v05_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.260" />
+            <property name="dcdc_min"   gettype="config" value="0.840" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_CORE_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.184" />
+            <property name="dcdc_min"   gettype="config" value="1.456" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v05_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="15.400" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_CORE_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="47.300" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_CORE_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.200" />
+            <property name="dcdc_min"   gettype="config" value="0.600" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_ANALOG_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.960" />
+            <property name="dcdc_min"   gettype="config" value="0.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_CORE_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="240.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_ANALOG_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="26.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v2_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.440" />
+            <property name="dcdc_min"   gettype="config" value="0.960" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_2v23_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.676" />
+            <property name="dcdc_min"   gettype="config" value="1.784" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v2_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="9.900" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_2v23_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.200" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+    </dcdcs>
+    <mactemps>
+        <mactemp id="MAC_DIE_0" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp1_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_1" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp2_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_2" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp3_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_3" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp4_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_4" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp5_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_5" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp6_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_6" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp7_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_7" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp8_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_8" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp9_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_9" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp10_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_10" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp11_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_11" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp12_input"  type="1"/>
+        </mactemp>
+    </mactemps>
+    <cpus location="/sys/class/hwmon/hwmon0"/>
+    <decode>
+    <fanpresent>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </fanpresent>
+    <fanstatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </fanstatus>
+    <psucheck>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </psucheck>
+    <psustatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </psustatus>
+    <psutype>
+        <code key="CSU550AP-3-500" value="PA550II-F"/>
+        <code key="DPS-550AB-39 A" value="PA550II-F"/>
+        <code key="GW-CRPS550N2C" value="PA550II-F"/>
+        <code key="CSU550AP-3-300" value="PA550II-F"/>
+        <code key="DPS-550AB-39 B" value="PA550II-F"/>
+        <code key="CSU550AP-3" value="PA550II-F"/>
+        <code key="CSU550AP-3-501" value="PA550II-R"/>
+        <code key="DPS-550AB-40 A" value="PA550II-R"/>
+        <code key="GW-CRPS550N2RC" value="PA550II-R"/>
+    </psutype>
+    <fan_display_name>
+        <code key="M1HFAN III-F" value="M1HFAN III-F"/>
+        <code key="M1HFAN III-R" value="M1HFAN III-R"/>
+    </fan_display_name>
+    </decode>
+</catalog>
+
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/fru.py b/device/micas/x86_64-micas_m2-w6510-32c-r0/fru.py
new file mode 100644
index 000000000000..f95164e03601
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-32c-r0/fru.py
@@ -0,0 +1,961 @@
+#!/usr/bin/python3
+import collections
+from datetime import datetime, timedelta
+from bitarray import bitarray
+
+
+__DEBUG__ = "N"
+
+
+class FruException(Exception):
+    def __init__(self, message='fruerror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+
+def e_print(err):
+    print("ERROR: " + err)
+
+
+def d_print(debug_info):
+    if __DEBUG__ == "Y":
+        print(debug_info)
+
+
+class FruUtil():
+    @staticmethod
+    def decodeLength(value):
+        a = bitarray(8)
+        a.setall(True)
+        a[0:1] = 0
+        a[1:2] = 0
+        x = ord(a.tobytes())
+        return x & ord(value)
+
+    @staticmethod
+    def minToData():
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        endtime = datetime.now()
+        seconds = (endtime - starttime).total_seconds()
+        mins = seconds // 60
+        m = int(round(mins))
+        return m
+
+    @staticmethod
+    def getTimeFormat():
+        return datetime.now().strftime('%Y-%m-%d')
+
+    @staticmethod
+    def getTypeLength(value):
+        if value is None or len(value) == 0:
+            return 0
+        a = bitarray(8)
+        a.setall(False)
+        a[0:1] = 1
+        a[1:2] = 1
+        x = ord(a.tobytes())
+        return x | len(value)
+
+    @staticmethod
+    def checksum(b):
+        result = 0
+        for item in b:
+            result += ord(item)
+        return (0x100 - (result & 0xff)) & 0xff
+
+
+class BaseArea(object):
+    SUGGESTED_SIZE_COMMON_HEADER = 8
+    SUGGESTED_SIZE_INTERNAL_USE_AREA = 72
+    SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32
+    SUGGESTED_SIZE_BOARD_INFO_AREA = 80
+    SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80
+
+    INITVALUE = b'\x00'
+    resultvalue = INITVALUE * 256
+    COMMON_HEAD_VERSION = b'\x01'
+    __childList = None
+
+    def __init__(self, name="", size=0, offset=0):
+        self.__childList = []
+        self._offset = offset
+        self.name = name
+        self._size = size
+        self._isPresent = False
+        self._data = b'\x00' * size
+
+    @property
+    def childList(self):
+        return self.__childList
+
+    @childList.setter
+    def childList(self, value):
+        self.__childList = value
+
+    @property
+    def offset(self):
+        return self._offset
+
+    @offset.setter
+    def offset(self, value):
+        self._offset = value
+
+    @property
+    def size(self):
+        return self._size
+
+    @size.setter
+    def size(self, value):
+        self._size = value
+
+    @property
+    def data(self):
+        return self._data
+
+    @data.setter
+    def data(self, value):
+        self._data = value
+
+    @property
+    def isPresent(self):
+        return self._isPresent
+
+    @isPresent.setter
+    def isPresent(self, value):
+        self._isPresent = value
+
+
+class InternalUseArea(BaseArea):
+    pass
+
+
+class ChassisInfoArea(BaseArea):
+    pass
+
+
+class BoardInfoArea(BaseArea):
+    _boardTime = None
+    _fields = None
+    _mfg_date = None
+    areaversion = None
+    _boardversion = None
+    _language = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "mfg_date            : %s \n" \
+                    "boardManufacturer   : %s \n" \
+                    "boardProductName    : %s \n" \
+                    "boardSerialNumber   : %s \n" \
+                    "boardPartNumber     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.boardversion), self.size,
+                              self.language, self.getMfgRealData(),
+                              self.boardManufacturer, self.boardProductName,
+                              self.boardSerialNumber, self.boardPartNumber,
+                              self.fruFileId)
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "boardextra%d         : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["boardversion"] = ord(self.boardversion)
+        dic["boardlength"] = self.size
+        dic["boardlanguage"] = self.language
+        dic["boardmfg_date"] = self.getMfgRealData()
+        dic["boardManufacturer"] = self.boardManufacturer
+        dic["boardProductName"] = self.boardProductName
+        dic["boardSerialNumber"] = self.boardSerialNumber
+        dic["boardPartNumber"] = self.boardPartNumber
+        dic["boardfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]
+        index += 1
+        d_print("decode length :%d class size:%d" %
+                ((ord(self.data[index]) * 8), self.size))
+        index += 2
+
+        timetmp = self.data[index: index + 3]
+        self.mfg_date = ord(timetmp[0]) | (
+            ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16)
+        d_print("decode getMfgRealData :%s" % self.getMfgRealData())
+        index += 3
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardManufacturer:%s" % self.boardManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardProductName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardProductName:%s" % self.boardProductName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardSerialNumber:%s" % self.boardSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardPartNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardPartNumber:%s" % self.boardPartNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if self.data[index] != chr(0xc1):
+                templen = FruUtil.decodeLength(self.data[index])
+                tmpval = self.data[index + 1: index + templen + 1]
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+            else:
+                break
+
+    def fruSetValue(self, field, value):
+        tmp_field = getattr(self, field, None)
+        if tmp_field is not None:
+            setattr(self, field, value)
+
+    def recalcute(self):
+        d_print("boardInfoArea version:%x" % ord(self.boardversion))
+        d_print("boardInfoArea length:%d" % self.size)
+        d_print("boardInfoArea language:%x" % self.language)
+        self.mfg_date = FruUtil.minToData()
+        d_print("boardInfoArea mfg_date:%x" % self.mfg_date)
+
+        self.data = chr(ord(self.boardversion)) + \
+            chr(self.size // 8) + chr(self.language)
+
+        self.data += chr(self.mfg_date & 0xFF)
+        self.data += chr((self.mfg_date >> 8) & 0xFF)
+        self.data += chr((self.mfg_date >> 16) & 0xFF)
+
+        d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer)
+        typelength = FruUtil.getTypeLength(self.boardManufacturer)
+        self.data += chr(typelength)
+        self.data += self.boardManufacturer
+
+        d_print("boardInfoArea boardProductName:%s" % self.boardProductName)
+        self.data += chr(FruUtil.getTypeLength(self.boardProductName))
+        self.data += self.boardProductName
+
+        d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber))
+        self.data += self.boardSerialNumber
+
+        d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardPartNumber))
+        self.data += self.boardPartNumber
+
+        d_print("boardInfoArea fruFileId:%s" % self.fruFileId)
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is not None:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) // 8 + 1
+            self.size += incr * 8
+
+        self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+        d_print("self data:%d" % len(self.data))
+        d_print("self size:%d" % self.size)
+        d_print("adjust size:%d" % (self.size - len(self.data) - 1))
+        self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+
+        # checksum
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+    def getMfgRealData(self):
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        mactime = starttime + timedelta(minutes=self.mfg_date)
+        return mactime
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def mfg_date(self):
+        return self._mfg_date
+
+    @mfg_date.setter
+    def mfg_date(self, val):
+        self._mfg_date = val
+
+    @property
+    def boardversion(self):
+        self._boardversion = self.COMMON_HEAD_VERSION
+        return self._boardversion
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, val):
+        self._FRUFileID = val
+
+    @property
+    def boardPartNumber(self):
+        return self._boardPartNumber
+
+    @boardPartNumber.setter
+    def boardPartNumber(self, val):
+        self._boardPartNumber = val
+
+    @property
+    def boardSerialNumber(self):
+        return self._boardSerialNumber
+
+    @boardSerialNumber.setter
+    def boardSerialNumber(self, val):
+        self._boardSerialNumber = val
+
+    @property
+    def boardProductName(self):
+        return self._boradProductName
+
+    @boardProductName.setter
+    def boardProductName(self, val):
+        self._boradProductName = val
+
+    @property
+    def boardManufacturer(self):
+        return self._boardManufacturer
+
+    @boardManufacturer.setter
+    def boardManufacturer(self, val):
+        self._boardManufacturer = val
+
+    @property
+    def boardTime(self):
+        return self._boardTime
+
+    @boardTime.setter
+    def boardTime(self, val):
+        self._boardTime = val
+
+    @property
+    def fields(self):
+        return self._fields
+
+    @fields.setter
+    def fields(self, val):
+        self._fields = val
+
+
+class ProductInfoArea(BaseArea):
+    _productManufacturer = None
+    _productAssetTag = None
+    _FRUFileID = None
+    _language = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "productManufacturer : %s \n" \
+                    "productName         : %s \n" \
+                    "productPartModelName: %s \n" \
+                    "productVersion      : %s \n" \
+                    "productSerialNumber : %s \n" \
+                    "productAssetTag     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.areaversion), self.size,
+                              self.language, self.productManufacturer,
+                              self.productName, self.productPartModelName,
+                              self.productVersion, self.productSerialNumber,
+                              self.productAssetTag, self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "productextra%d       : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["productversion"] = ord(self.areaversion)
+        dic["productlength"] = self.size
+        dic["productlanguage"] = self.language
+        dic["productManufacturer"] = self.productManufacturer
+        dic["productName"] = self.productName
+        dic["productPartModelName"] = self.productPartModelName
+        dic["productVersion"] = int(self.productVersion, 16)
+        dic["productSerialNumber"] = self.productSerialNumber
+        dic["productAssetTag"] = self.productAssetTag
+        dic["productfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]  # 0
+        index += 1
+        d_print("decode length %d" % (ord(self.data[index]) * 8))
+        d_print("class size %d" % self.size)
+        index += 2
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productManufacturer:%s" % self.productManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productName:%s" % self.productName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productPartModelName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productPartModelName:%s" % self.productPartModelName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productVersion = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productVersion:%s" % self.productVersion)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productSerialNumber:%s" % self.productSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productAssetTag = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productAssetTag:%s" % self.productAssetTag)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if self.data[index] != chr(0xc1) and index < self.size - 1:
+                templen = FruUtil.decodeLength(self.data[index])
+                if templen == 0:
+                    break
+                tmpval = self.data[index + 1: index + templen + 1]
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+            else:
+                break
+
+    @property
+    def productVersion(self):
+        return self._productVersion
+
+    @productVersion.setter
+    def productVersion(self, name):
+        self._productVersion = name
+
+    @property
+    def areaversion(self):
+        self._areaversion = self.COMMON_HEAD_VERSION
+        return self._areaversion
+
+    @areaversion.setter
+    def areaversion(self, name):
+        self._areaversion = name
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def productManufacturer(self):
+        return self._productManufacturer
+
+    @productManufacturer.setter
+    def productManufacturer(self, name):
+        self._productManufacturer = name
+
+    @property
+    def productName(self):
+        return self._productName
+
+    @productName.setter
+    def productName(self, name):
+        self._productName = name
+
+    @property
+    def productPartModelName(self):
+        return self._productPartModelName
+
+    @productPartModelName.setter
+    def productPartModelName(self, name):
+        self._productPartModelName = name
+
+    @property
+    def productSerialNumber(self):
+        return self._productSerialNumber
+
+    @productSerialNumber.setter
+    def productSerialNumber(self, name):
+        self._productSerialNumber = name
+
+    @property
+    def productAssetTag(self):
+        return self._productAssetTag
+
+    @productAssetTag.setter
+    def productAssetTag(self, name):
+        self._productAssetTag = name
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, name):
+        self._FRUFileID = name
+
+    def fruSetValue(self, field, value):
+        tmp_field = getattr(self, field, None)
+        if tmp_field is not None:
+            setattr(self, field, value)
+
+    def recalcute(self):
+        d_print("product version:%x" % ord(self.areaversion))
+        d_print("product length:%d" % self.size)
+        d_print("product language:%x" % self.language)
+        self.data = chr(ord(self.areaversion)) + \
+            chr(self.size // 8) + chr(self.language)
+
+        typelength = FruUtil.getTypeLength(self.productManufacturer)
+        self.data += chr(typelength)
+        self.data += self.productManufacturer
+
+        self.data += chr(FruUtil.getTypeLength(self.productName))
+        self.data += self.productName
+
+        self.data += chr(FruUtil.getTypeLength(self.productPartModelName))
+        self.data += self.productPartModelName
+
+        self.data += chr(FruUtil.getTypeLength(self.productVersion))
+        self.data += self.productVersion
+
+        self.data += chr(FruUtil.getTypeLength(self.productSerialNumber))
+        self.data += self.productSerialNumber
+
+        self.data += chr(FruUtil.getTypeLength(self.productAssetTag))
+        if self.productAssetTag is not None:
+            self.data += self.productAssetTag
+
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea productextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is not None:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) // 8 + 1
+            self.size += incr * 8
+        d_print("self.data:%d" % len(self.data))
+        d_print("self.size:%d" % self.size)
+
+        self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+        self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+
+class MultiRecordArea(BaseArea):
+    pass
+
+
+class Field(object):
+
+    def __init__(self, fieldType="ASCII", fieldData=""):
+        self.fieldData = fieldData
+        self.fieldType = fieldType
+
+    @property
+    def fieldType(self):
+        return self.fieldType
+
+    @property
+    def fieldData(self):
+        return self.fieldData
+
+
+class ipmifru(BaseArea):
+    _BoardInfoArea = None
+    _ProductInfoArea = None
+    _InternalUseArea = None
+    _ChassisInfoArea = None
+    _multiRecordArea = None
+    _productinfoAreaOffset = BaseArea.INITVALUE
+    _boardInfoAreaOffset = BaseArea.INITVALUE
+    _internalUserAreaOffset = BaseArea.INITVALUE
+    _chassicInfoAreaOffset = BaseArea.INITVALUE
+    _multiRecordAreaOffset = BaseArea.INITVALUE
+    _bindata = None
+    _bodybin = None
+    _version = BaseArea.COMMON_HEAD_VERSION
+    _zeroCheckSum = None
+    _frusize = 256
+
+    def __str__(self):
+        tmpstr = ""
+        if self.boardInfoArea.isPresent:
+            tmpstr += "\nboardinfoarea: \n"
+            tmpstr += self.boardInfoArea.__str__()
+        if self.productInfoArea.isPresent:
+            tmpstr += "\nproductinfoarea: \n"
+            tmpstr += self.productInfoArea.__str__()
+        return tmpstr
+
+    def decodeBin(self, eeprom):
+        commonHead = eeprom[0:8]
+        d_print("decode version %x" % ord(commonHead[0]))
+        if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]):
+            raise FruException("HEAD VERSION error,not Fru format!", -10)
+        if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]):
+            strtemp = "check header checksum error [cal:%02x data:%02x]" % (
+                FruUtil.checksum(commonHead[0:7]), ord(commonHead[7]))
+            raise FruException(strtemp, -3)
+        if ord(commonHead[1]) != ord(self.INITVALUE):
+            d_print("Internal Use Area is present")
+            self.internalUseArea = InternalUseArea(
+                name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA)
+            self.internalUseArea.isPresent = True
+            self.internalUserAreaOffset = ord(commonHead[1])
+            self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: (
+                self.internalUserAreaOffset * 8 + self.internalUseArea.size)]
+        if ord(commonHead[2]) != ord(self.INITVALUE):
+            d_print("Chassis Info Area is present")
+            self.chassisInfoArea = ChassisInfoArea(
+                name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA)
+            self.chassisInfoArea.isPresent = True
+            self.chassicInfoAreaOffset = ord(commonHead[2])
+            self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: (
+                self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)]
+        if ord(commonHead[3]) != ord(self.INITVALUE):
+            self.boardInfoArea = BoardInfoArea(
+                name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA)
+            self.boardInfoArea.isPresent = True
+            self.boardInfoAreaOffset = ord(commonHead[3])
+            self.boardInfoArea.size = ord(
+                eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8
+            d_print("Board Info Area is present size:%d" %
+                    (self.boardInfoArea.size))
+            self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: (
+                self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)]
+            if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]):
+                strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" %  \
+                    (FruUtil.checksum(
+                        self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.boardInfoArea.decodedata()
+        if ord(commonHead[4]) != ord(self.INITVALUE):
+            d_print("Product Info Area is present")
+            self.productInfoArea = ProductInfoArea(
+                name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA)
+            self.productInfoArea.isPresent = True
+            self.productinfoAreaOffset = ord(commonHead[4])
+            d_print("length offset value: %02x" %
+                    ord(eeprom[self.productinfoAreaOffset * 8 + 1]))
+            self.productInfoArea.size = ord(
+                eeprom[self.productinfoAreaOffset * 8 + 1]) * 8
+            d_print("Product Info Area is present size:%d" %
+                    (self.productInfoArea.size))
+
+            self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: (
+                self.productinfoAreaOffset * 8 + self.productInfoArea.size)]
+            if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]):
+                strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % (
+                    FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.productInfoArea.decodedata()
+        if ord(commonHead[5]) != ord(self.INITVALUE):
+            self.multiRecordArea = MultiRecordArea(
+                name="MultiRecord record Area ")
+            d_print("MultiRecord record present")
+            self.multiRecordArea.isPresent = True
+            self.multiRecordAreaOffset = ord(commonHead[5])
+            self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: (
+                self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)]
+
+    def initDefault(self):
+        self.version = self.COMMON_HEAD_VERSION
+        self.internalUserAreaOffset = self.INITVALUE
+        self.chassicInfoAreaOffset = self.INITVALUE
+        self.boardInfoAreaOffset = self.INITVALUE
+        self.productinfoAreaOffset = self.INITVALUE
+        self.multiRecordAreaOffset = self.INITVALUE
+        self.zeroCheckSum = self.INITVALUE
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        self.productInfoArea = None
+        self.internalUseArea = None
+        self.boardInfoArea = None
+        self.chassisInfoArea = None
+        self.multiRecordArea = None
+        # self.recalcute()
+
+    @property
+    def version(self):
+        return self._version
+
+    @version.setter
+    def version(self, name):
+        self._version = name
+
+    @property
+    def internalUserAreaOffset(self):
+        return self._internalUserAreaOffset
+
+    @internalUserAreaOffset.setter
+    def internalUserAreaOffset(self, obj):
+        self._internalUserAreaOffset = obj
+
+    @property
+    def chassicInfoAreaOffset(self):
+        return self._chassicInfoAreaOffset
+
+    @chassicInfoAreaOffset.setter
+    def chassicInfoAreaOffset(self, obj):
+        self._chassicInfoAreaOffset = obj
+
+    @property
+    def productinfoAreaOffset(self):
+        return self._productinfoAreaOffset
+
+    @productinfoAreaOffset.setter
+    def productinfoAreaOffset(self, obj):
+        self._productinfoAreaOffset = obj
+
+    @property
+    def boardInfoAreaOffset(self):
+        return self._boardInfoAreaOffset
+
+    @boardInfoAreaOffset.setter
+    def boardInfoAreaOffset(self, obj):
+        self._boardInfoAreaOffset = obj
+
+    @property
+    def multiRecordAreaOffset(self):
+        return self._multiRecordAreaOffset
+
+    @multiRecordAreaOffset.setter
+    def multiRecordAreaOffset(self, obj):
+        self._multiRecordAreaOffset = obj
+
+    @property
+    def zeroCheckSum(self):
+        return self._zeroCheckSum
+
+    @zeroCheckSum.setter
+    def zeroCheckSum(self, obj):
+        self._zeroCheckSum = obj
+
+    @property
+    def productInfoArea(self):
+        return self._ProductInfoArea
+
+    @productInfoArea.setter
+    def productInfoArea(self, obj):
+        self._ProductInfoArea = obj
+
+    @property
+    def internalUseArea(self):
+        return self._InternalUseArea
+
+    @internalUseArea.setter
+    def internalUseArea(self, obj):
+        self.internalUseArea = obj
+
+    @property
+    def boardInfoArea(self):
+        return self._BoardInfoArea
+
+    @boardInfoArea.setter
+    def boardInfoArea(self, obj):
+        self._BoardInfoArea = obj
+
+    @property
+    def chassisInfoArea(self):
+        return self._ChassisInfoArea
+
+    @chassisInfoArea.setter
+    def chassisInfoArea(self, obj):
+        self._ChassisInfoArea = obj
+
+    @property
+    def multiRecordArea(self):
+        return self._multiRecordArea
+
+    @multiRecordArea.setter
+    def multiRecordArea(self, obj):
+        self._multiRecordArea = obj
+
+    @property
+    def bindata(self):
+        return self._bindata
+
+    @bindata.setter
+    def bindata(self, obj):
+        self._bindata = obj
+
+    @property
+    def bodybin(self):
+        return self._bodybin
+
+    @bodybin.setter
+    def bodybin(self, obj):
+        self._bodybin = obj
+
+    def recalcuteCommonHead(self):
+        self.bindata = ""
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        d_print("common Header %d" % self.offset)
+        d_print("fru eeprom size  %d" % self._frusize)
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            self.internalUserAreaOffset = self.offset // 8
+            self.offset += self.internalUseArea.size
+            d_print("internalUseArea is present offset:%d" % self.offset)
+
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            self.chassicInfoAreaOffset = self.offset // 8
+            self.offset += self.chassisInfoArea.size
+            d_print("chassisInfoArea is present offset:%d" % self.offset)
+
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            self.boardInfoAreaOffset = self.offset // 8
+            self.offset += self.boardInfoArea.size
+            d_print("boardInfoArea is present offset:%d" % self.offset)
+            d_print("boardInfoArea is present size:%d" %
+                    self.boardInfoArea.size)
+
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            self.productinfoAreaOffset = self.offset // 8
+            self.offset += self.productInfoArea.size
+            d_print("productInfoArea is present offset:%d" % self.offset)
+
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            self.multiRecordAreaOffset = self.offset // 8
+            d_print("multiRecordArea is present offset:%d" % self.offset)
+
+        if self.internalUserAreaOffset == self.INITVALUE:
+            self.internalUserAreaOffset = 0
+        if self.productinfoAreaOffset == self.INITVALUE:
+            self.productinfoAreaOffset = 0
+        if self.chassicInfoAreaOffset == self.INITVALUE:
+            self.chassicInfoAreaOffset = 0
+        if self.boardInfoAreaOffset == self.INITVALUE:
+            self.boardInfoAreaOffset = 0
+        if self.multiRecordAreaOffset == self.INITVALUE:
+            self.multiRecordAreaOffset = 0
+
+        self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset
+                             - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff
+        d_print("zerochecksum:%x" % self.zeroCheckSum)
+        self.data = ""
+        self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr(
+            self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum)
+
+        self.bindata = self.data + self.bodybin
+        totallen = len(self.bindata)
+        d_print("totallen %d" % totallen)
+        if totallen < self._frusize:
+            self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0]))
+        else:
+            raise FruException('bin data more than %d' % self._frusize, -2)
+
+    def recalcutebin(self):
+        self.bodybin = ""
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            d_print("internalUseArea present")
+            self.bodybin += self.internalUseArea.data
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            d_print("chassisInfoArea present")
+            self.bodybin += self.chassisInfoArea.data
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            d_print("boardInfoArea present")
+            self.boardInfoArea.recalcute()
+            self.bodybin += self.boardInfoArea.data
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            d_print("productInfoAreapresent")
+            self.productInfoArea.recalcute()
+            self.bodybin += self.productInfoArea.data
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            d_print("multiRecordArea present")
+            self.bodybin += self.productInfoArea.data
+
+    def recalcute(self, fru_eeprom_size=256):
+        self._frusize = fru_eeprom_size
+        self.recalcutebin()
+        self.recalcuteCommonHead()
+
+    def setValue(self, area, field, value):
+        tmp_area = getattr(self, area, None)
+        if tmp_area is not None:
+            tmp_area.fruSetValue(field, value)
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/installer.conf b/device/micas/x86_64-micas_m2-w6510-32c-r0/installer.conf
new file mode 100644
index 000000000000..7a9fec8cc99c
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-32c-r0/installer.conf
@@ -0,0 +1,2 @@
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll"
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/led_proc_init.soc b/device/micas/x86_64-micas_m2-w6510-32c-r0/led_proc_init.soc
new file mode 100644
index 000000000000..da5105b07f18
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-32c-r0/led_proc_init.soc
@@ -0,0 +1,7 @@
+m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
+
+led auto on
+
+led start
+
+linkscan spbm=all force=all interval=250000
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/media_settings.json b/device/micas/x86_64-micas_m2-w6510-32c-r0/media_settings.json
new file mode 100644
index 000000000000..e2146a246f61
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-32c-r0/media_settings.json
@@ -0,0 +1,708 @@
+{
+    "PORT_MEDIA_SETTINGS": {
+        "0": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane3": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0x00000014",
+                    "lane1": "0x00000014",
+                    "lane2": "0x00000014",
+                    "lane3": "0x00000014"
+                }
+            }
+        },
+        "1": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane3": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0x00000014",
+                    "lane1": "0x00000014",
+                    "lane2": "0x00000014",
+                    "lane3": "0x00000014"
+                }
+            }
+        },
+        "2": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "3": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane3": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "4": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "5": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "6": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "7": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "8": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "9": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "10": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "11": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "12": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "13": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "14": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "15": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "16": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "17": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "18": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "19": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "20": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "21": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "22": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "23": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "24": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "25": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "26": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "27": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000F",
+                    "lane1": "0x0000000F",
+                    "lane2": "0x0000000F",
+                    "lane3": "0x0000000F"
+                }
+            }
+        },
+        "28": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane3": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0x00000014",
+                    "lane1": "0x00000014",
+                    "lane2": "0x00000014",
+                    "lane3": "0x00000014"
+                }
+            }
+        },
+        "29": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane3": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0x00000014",
+                    "lane1": "0x00000014",
+                    "lane2": "0x00000014",
+                    "lane3": "0x00000014"
+                }
+            }
+        },
+        "30": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane3": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0x00000014",
+                    "lane1": "0x00000014",
+                    "lane2": "0x00000014",
+                    "lane3": "0x00000014"
+                }
+            }
+        },
+        "31": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000A",
+                    "lane1": "0x0000000A",
+                    "lane2": "0x0000000A",
+                    "lane3": "0x0000000A"
+                },
+                "main": {
+                    "lane0": "0x00000046",
+                    "lane1": "0x00000046",
+                    "lane2": "0x00000046",
+                    "lane3": "0x00000046"
+                },
+                "post1": {
+                    "lane0": "0x00000014",
+                    "lane1": "0x00000014",
+                    "lane2": "0x00000014",
+                    "lane3": "0x00000014"
+                }
+            }
+        }
+    }
+}
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/monitor.py b/device/micas/x86_64-micas_m2-w6510-32c-r0/monitor.py
new file mode 100644
index 000000000000..5fc287892e50
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-32c-r0/monitor.py
@@ -0,0 +1,402 @@
+#!/usr/bin/python3
+#   * onboard temperature sensors
+#   * FAN trays
+#   * PSU
+#
+import os
+from lxml import etree as ET
+import glob
+import json
+from decimal import Decimal
+from fru import ipmifru
+
+
+MAILBOX_DIR = "/sys/bus/i2c/devices/"
+BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type"
+BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow"
+
+
+CONFIG_NAME = "dev.xml"
+
+
+def byteTostr(val):
+    strtmp = ''
+    for value in val:
+        strtmp += chr(value)
+    return strtmp
+
+
+def typeTostr(val):
+    if isinstance(val, bytes):
+        strtmp = byteTostr(val)
+        return strtmp
+    return val
+
+
+def get_board_id():
+    if not os.path.exists(BOARD_ID_PATH):
+        return "NA"
+    with open(BOARD_ID_PATH) as fd:
+        id_str = fd.read().strip()
+    return "0x%x" % (int(id_str, 10))
+
+
+def getboardairflow():
+    if not os.path.exists(BOARD_AIRFLOW_PATH):
+        return "NA"
+    with open(BOARD_AIRFLOW_PATH) as fd:
+        airflow_str = fd.read().strip()
+    data = json.loads(airflow_str)
+    airflow = data.get("board", "NA")
+    return airflow
+
+
+boardid = get_board_id()
+boardairflow = getboardairflow()
+
+
+DEV_XML_FILE_LIST = [
+    "dev_" + boardid + "_" + boardairflow + ".xml",
+    "dev_" + boardid + ".xml",
+    "dev_" + boardairflow + ".xml",
+]
+
+
+def dev_file_read(path, offset, read_len):
+    retval = "ERR"
+    val_list = []
+    msg = ""
+    ret = ""
+    fd = -1
+
+    if not os.path.exists(path):
+        return False, "%s %s not found" % (retval, path)
+
+    try:
+        fd = os.open(path, os.O_RDONLY)
+        os.lseek(fd, offset, os.SEEK_SET)
+        ret = os.read(fd, read_len)
+        for item in ret:
+            val_list.append(item)
+    except Exception as e:
+        msg = str(e)
+        return False, "%s %s" % (retval, msg)
+    finally:
+        if fd > 0:
+            os.close(fd)
+    return True, val_list
+
+
+def getPMCreg(location):
+    retval = 'ERR'
+    if not os.path.isfile(location):
+        return "%s %s  notfound" % (retval, location)
+    try:
+        with open(location, 'r') as fd:
+            retval = fd.read()
+    except Exception as error:
+        return "ERR %s" % str(error)
+
+    retval = retval.rstrip('\r\n')
+    retval = retval.lstrip(" ")
+    return retval
+
+
+# Get a mailbox register
+def get_pmc_register(reg_name):
+    retval = 'ERR'
+    mb_reg_file = reg_name
+    filepath = glob.glob(mb_reg_file)
+    if len(filepath) == 0:
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    mb_reg_file = filepath[0]
+    if not os.path.isfile(mb_reg_file):
+        # print mb_reg_file,  'not found !'
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    try:
+        with open(mb_reg_file, 'rb') as fd:
+            retval = fd.read()
+        retval = typeTostr(retval)
+    except Exception as error:
+        retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error))
+
+    retval = retval.rstrip('\r\n')
+    retval = retval.lstrip(" ")
+    return retval
+
+
+class checktype():
+    def __init__(self, test1):
+        self.test1 = test1
+
+    @staticmethod
+    def getValue(location, bit, data_type, coefficient=1, addend=0):
+        try:
+            value_t = get_pmc_register(location)
+            if value_t.startswith("ERR") or value_t.startswith("NA"):
+                return value_t
+            if data_type == 1:
+                return float('%.1f' % ((float(value_t) / 1000) + addend))
+            if data_type == 2:
+                return float('%.1f' % (float(value_t) / 100))
+            if data_type == 3:
+                psu_status = int(value_t, 16)
+                return (psu_status & (1 << bit)) >> bit
+            if data_type == 4:
+                return int(value_t, 10)
+            if data_type == 5:
+                return float('%.1f' % (float(value_t) / 1000 / 1000))
+            if data_type == 6:
+                return Decimal(float(value_t) * coefficient / 1000).quantize(Decimal('0.000'))
+            return value_t
+        except Exception as e:
+            value_t = "ERR %s" % str(e)
+            return value_t
+
+    # fanFRU
+    @staticmethod
+    def decodeBinByValue(retval):
+        fru = ipmifru()
+        fru.decodeBin(retval)
+        return fru
+
+    @staticmethod
+    def getfruValue(prob_t, root, val):
+        try:
+            ret, binval_bytes = dev_file_read(val, 0, 256)
+            if ret is False:
+                return binval_bytes
+            binval = byteTostr(binval_bytes)
+            fanpro = {}
+            ret = checktype.decodeBinByValue(binval)
+            fanpro['fan_type'] = ret.productInfoArea.productName
+            fanpro['hw_version'] = ret.productInfoArea.productVersion
+            fanpro['sn'] = ret.productInfoArea.productSerialNumber
+            fan_display_name_dict = status.getDecodValue(root, "fan_display_name")
+            fan_name = fanpro['fan_type'].strip()
+            if len(fan_display_name_dict) == 0:
+                return fanpro
+            if fan_name not in fan_display_name_dict:
+                prob_t['errcode'] = -1
+                prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name)
+            else:
+                fanpro['fan_type'] = fan_display_name_dict[fan_name]
+            return fanpro
+        except Exception as error:
+            return "ERR " + str(error)
+
+    @staticmethod
+    def getslotfruValue(val):
+        try:
+            binval = checktype.getValue(val, 0, 0)
+            if binval.startswith("ERR"):
+                return binval
+            slotpro = {}
+            ret = checktype.decodeBinByValue(binval)
+            slotpro['slot_type'] = ret.boardInfoArea.boardProductName
+            slotpro['hw_version'] = ret.boardInfoArea.boardextra1
+            slotpro['sn'] = ret.boardInfoArea.boardSerialNumber
+            return slotpro
+        except Exception as error:
+            return "ERR " + str(error)
+
+    @staticmethod
+    def getpsufruValue(prob_t, root, val):
+        try:
+            psu_match = False
+            binval = checktype.getValue(val, 0, 0)
+            if binval.startswith("ERR"):
+                return binval
+            psupro = {}
+            ret = checktype.decodeBinByValue(binval)
+            psupro['type1'] = ret.productInfoArea.productPartModelName
+            psupro['sn'] = ret.productInfoArea.productSerialNumber
+            psupro['hw_version'] = ret.productInfoArea.productVersion
+            psu_dict = status.getDecodValue(root, "psutype")
+            psupro['type1'] = psupro['type1'].strip()
+            if len(psu_dict) == 0:
+                return psupro
+            for psu_name, display_name in psu_dict.items():
+                if psu_name.strip() == psupro['type1']:
+                    psupro['type1'] = display_name
+                    psu_match = True
+                    break
+            if psu_match is not True:
+                prob_t['errcode'] = -1
+                prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1'])
+            return psupro
+        except Exception as error:
+            return "ERR " + str(error)
+
+
+class status():
+    def __init__(self, productname):
+        self.productname = productname
+
+    @staticmethod
+    def getETroot(filename):
+        tree = ET.parse(filename)
+        root = tree.getroot()
+        return root
+
+    @staticmethod
+    def getDecodValue(collection, decode):
+        decodes = collection.find('decode')
+        testdecode = decodes.find(decode)
+        test = {}
+        if testdecode is None:
+            return test
+        for neighbor in testdecode.iter('code'):
+            test[neighbor.attrib["key"]] = neighbor.attrib["value"]
+        return test
+
+    @staticmethod
+    def getfileValue(location):
+        return checktype.getValue(location, " ", " ")
+
+    @staticmethod
+    def getETValue(a, filename, tagname):
+        root = status.getETroot(filename)
+        for neighbor in root.iter(tagname):
+            prob_t = {}
+            prob_t.update(neighbor.attrib)
+            prob_t['errcode'] = 0
+            prob_t['errmsg'] = ''
+            for pros in neighbor.iter("property"):
+                ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items()))
+                if ret.get('e2type') == 'fru' and ret.get("name") == "fru":
+                    fruval = checktype.getfruValue(prob_t, root, ret["location"])
+                    if isinstance(fruval, str) and fruval.startswith("ERR"):
+                        prob_t['errcode'] = -1
+                        prob_t['errmsg'] = fruval
+                        break
+                    prob_t.update(fruval)
+                    continue
+
+                if ret.get("name") == "psu" and ret.get('e2type') == 'fru':
+                    psuval = checktype.getpsufruValue(prob_t, root, ret["location"])
+                    if isinstance(psuval, str) and psuval.startswith("ERR"):
+                        prob_t['errcode'] = -1
+                        prob_t['errmsg'] = psuval
+                        break
+                    prob_t.update(psuval)
+                    continue
+
+                if ret.get("gettype") == "config":
+                    prob_t[ret["name"]] = ret["value"]
+                    continue
+
+                if 'type' not in ret.keys():
+                    val = "0"
+                else:
+                    val = ret["type"]
+                if 'bit' not in ret.keys():
+                    bit = "0"
+                else:
+                    bit = ret["bit"]
+                if 'coefficient' not in ret.keys():
+                    coefficient = 1
+                else:
+                    coefficient = float(ret["coefficient"])
+                if 'addend' not in ret.keys():
+                    addend = 0
+                else:
+                    addend = float(ret["addend"])
+
+                s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend)
+                if isinstance(s, str) and s.startswith("ERR"):
+                    prob_t['errcode'] = -1
+                    prob_t['errmsg'] = s
+                    break
+                if 'default' in ret.keys():
+                    rt = status.getDecodValue(root, ret['decode'])
+                    prob_t['errmsg'] = rt[str(s)]
+                    if str(s) != ret["default"]:
+                        prob_t['errcode'] = -1
+                        break
+                else:
+                    if 'decode' in ret.keys():
+                        rt = status.getDecodValue(root, ret['decode'])
+                        if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt):
+                            prob_t['errcode'] = -1
+                            prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" %
+                                                       (s.replace("\x00", "").rstrip()))
+                        else:
+                            s = rt[str(s).replace("\x00", "").rstrip()]
+                name = ret["name"]
+                prob_t[name] = str(s)
+            a.append(prob_t)
+
+    @staticmethod
+    def getCPUValue(a, filename, tagname):
+        root = status.getETroot(filename)
+        for neighbor in root.iter(tagname):
+            location = neighbor.attrib["location"]
+        L = []
+        for dirpath, dirnames, filenames in os.walk(location):
+            for file in filenames:
+                if file.endswith("input"):
+                    L.append(os.path.join(dirpath, file))
+            L = sorted(L, reverse=False)
+        for i in range(len(L)):
+            prob_t = {}
+            prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, i + 1))
+            prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, i + 1))) / 1000
+            prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, i + 1))) / 1000
+            prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, i + 1))) / 1000
+            prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, i + 1))) / 1000
+            a.append(prob_t)
+
+    @staticmethod
+    def getFileName():
+        fpath = os.path.dirname(os.path.realpath(__file__))
+        for file in DEV_XML_FILE_LIST:
+            xml = fpath + "/" + file
+            if os.path.exists(xml):
+                return xml
+        return fpath + "/" + CONFIG_NAME
+
+    @staticmethod
+    def checkFan(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "fan"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getTemp(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "temp"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getPsu(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "psu"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getcputemp(ret):
+        _filename = status.getFileName()
+        _tagname = "cpus"
+        status.getCPUValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getDcdc(ret):
+        _filename = status.getFileName()
+        _tagname = "dcdc"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getmactemp(ret):
+        _filename = status.getFileName()
+        _tagname = "mactemp"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getmacpower(ret):
+        _filename = status.getFileName()
+        _tagname = "macpower"
+        status.getETValue(ret, _filename, _tagname)
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6510-32c-r0/pcie.yaml
new file mode 100644
index 000000000000..ab6315b6f5e2
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-32c-r0/pcie.yaml
@@ -0,0 +1,440 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: 6f00
+  name: 'Host bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D DMI2
+    (rev 03)'
+- bus: '00'
+  dev: '01'
+  fn: '0'
+  id: 6f02
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 1 (rev 03)'
+- bus: '00'
+  dev: '01'
+  fn: '1'
+  id: 6f03
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 1 (rev 03)'
+- bus: '00'
+  dev: '02'
+  fn: '0'
+  id: 6f04
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 03)'
+- bus: '00'
+  dev: '02'
+  fn: '2'
+  id: 6f06
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 03)'
+- bus: '00'
+  dev: '03'
+  fn: '0'
+  id: 6f08
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '0'
+  id: 6f28
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Map/VTd_Misc/System Management (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '1'
+  id: 6f29
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Hot Plug (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '2'
+  id: 6f2a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO RAS/Control Status/Global Errors (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '4'
+  id: 6f2c
+  name: 'PIC: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D I/O APIC (rev
+    03)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 8c31
+  name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
+    xHCI (rev 05)'
+- bus: '00'
+  dev: '16'
+  fn: '0'
+  id: 8c3a
+  name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset
+    Family MEI Controller #1 (rev 04)'
+- bus: '00'
+  dev: '16'
+  fn: '1'
+  id: 8c3b
+  name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset
+    Family MEI Controller #2 (rev 04)'
+- bus: '00'
+  dev: 1c
+  fn: '0'
+  id: 8c10
+  name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express
+    Root Port #1 (rev d5)'
+- bus: '00'
+  dev: 1c
+  fn: '1'
+  id: 8c12
+  name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express
+    Root Port #2 (rev d5)'
+- bus: '00'
+  dev: 1d
+  fn: '0'
+  id: 8c26
+  name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
+    EHCI #1 (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: 8c54
+  name: 'ISA bridge: Intel Corporation C224 Series Chipset Family Server Standard
+    SKU LPC Controller (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '2'
+  id: 8c02
+  name: 'SATA controller: Intel Corporation 8 Series/C220 Series Chipset Family 6-port
+    SATA Controller 1 [AHCI mode] (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '3'
+  id: 8c22
+  name: 'SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller
+    (rev 05)'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: b870
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b870 (rev 01)'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: 6f50
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 0'
+- bus: '03'
+  dev: '00'
+  fn: '1'
+  id: 6f51
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 1'
+- bus: '03'
+  dev: '00'
+  fn: '2'
+  id: 6f52
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 2'
+- bus: '03'
+  dev: '00'
+  fn: '3'
+  id: 6f53
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 3'
+- bus: '04'
+  dev: '00'
+  fn: '0'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '04'
+  dev: '00'
+  fn: '1'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '07'
+  dev: '00'
+  fn: '0'
+  id: '1537'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Backplane Connection
+    (rev 03)'
+- bus: 08
+  dev: '00'
+  fn: '0'
+  id: '7022'
+  name: 'Memory controller: Xilinx Corporation Device 7022'
+- bus: ff
+  dev: 0b
+  fn: '0'
+  id: 6f81
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '1'
+  id: 6f36
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '2'
+  id: 6f37
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '3'
+  id: 6f76
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link Debug (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '0'
+  id: 6fe0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '1'
+  id: 6fe1
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '2'
+  id: 6fe2
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '3'
+  id: 6fe3
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '0'
+  id: 6ff8
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '4'
+  id: 6ffc
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '5'
+  id: 6ffd
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '6'
+  id: 6ffe
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '0'
+  id: 6f1d
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R2PCIe Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '1'
+  id: 6f34
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R2PCIe Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '5'
+  id: 6f1e
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '6'
+  id: 6f7d
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '7'
+  id: 6f1f
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '12'
+  fn: '0'
+  id: 6fa0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Home Agent 0 (rev 03)'
+- bus: ff
+  dev: '12'
+  fn: '1'
+  id: 6f30
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Home Agent 0 (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '0'
+  id: 6fa8
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '1'
+  id: 6f71
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '2'
+  id: 6faa
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '3'
+  id: 6fab
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '4'
+  id: 6fac
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '5'
+  id: 6fad
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '6'
+  id: 6fae
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Broadcast (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '7'
+  id: 6faf
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Global Broadcast (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '0'
+  id: 6fb0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 0 Thermal Control (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '1'
+  id: 6fb1
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 1 Thermal Control (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '2'
+  id: 6fb2
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 0 Error (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '3'
+  id: 6fb3
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 1 Error (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '4'
+  id: 6fbc
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '5'
+  id: 6fbd
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '6'
+  id: 6fbe
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '7'
+  id: 6fbf
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '0'
+  id: 6fb4
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 2 Thermal Control (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '1'
+  id: 6fb5
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 3 Thermal Control (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '2'
+  id: 6fb6
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 2 Error (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '3'
+  id: 6fb7
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 3 Error (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '0'
+  id: 6f98
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '1'
+  id: 6f99
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '2'
+  id: 6f9a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '3'
+  id: 6fc0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '4'
+  id: 6f9c
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1f
+  fn: '0'
+  id: 6f88
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1f
+  fn: '2'
+  id: 6f8a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/platform.json b/device/micas/x86_64-micas_m2-w6510-32c-r0/platform.json
new file mode 100644
index 000000000000..47f6740bc236
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-32c-r0/platform.json
@@ -0,0 +1,779 @@
+{
+    "chassis": {
+        "name": "M2-W6510-32C",
+        "thermal_manager": false,
+        "status_led": {
+            "controllable": false,
+            "colors": ["green", "blinking_green", "amber", "blinking_amber"]
+        },
+        "components": [
+            {
+                "name": "CPU_CPLD"
+            },
+            {
+                "name": "CONNECT_CPLD"
+            },
+            {
+                "name": "CONNECT_CPLD-FAN"
+            },
+            {
+                "name": "MAC_CPLD1"
+            },
+            {
+                "name": "MAC_CPLD2"
+            },
+            {
+                "name": "FPGA"
+            },
+            {
+                "name": "BIOS"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fantray1_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 25,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray1_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 25,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray2_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 25,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray2_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 25,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray3_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 25,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray3_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 25,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray4_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 25,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray4_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 25,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray5_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 25,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray5_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 25,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            }
+        ],
+        "fan_drawers":[
+            {
+                "name": "Fantray1",
+                "num_fans" : 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray1_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 25,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray1_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 25,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray2",
+                "num_fans" : 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray2_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 25,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray2_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 25,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray3",
+                "num_fans" : 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray3_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 25,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray3_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 25,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray4",
+                "num_fans" : 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray4_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 25,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray4_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 25,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray5",
+                "num_fans" : 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray5_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 25,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray5_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 25,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "Psu1",
+                "voltage": true,
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": true,
+                "voltage_low_threshold": true,
+                "temperature": true,
+                "fans_target_speed": true,
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "PSU1_FAN1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 25,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Psu2",
+                "voltage": true,
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": true,
+                "voltage_low_threshold": true,
+                "temperature": true,
+                "fans_target_speed": true,
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "PSU2_FAN1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 25,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "ASIC_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "CPU_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "INLET_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "OUTLET_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "MAC_OUT_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "MAC_IN_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "PSU1_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "PSU2_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            }
+        ],
+        "modules": [],
+        "sfps": []
+    },
+    "interfaces": {
+        "Ethernet1": {
+            "index": "0,0,0,0",
+            "lanes": "5,6,7,8",
+            "breakout_modes": {
+                "1x100G": ["Eth1"],
+                "2x50G": ["Eth1/1", "Eth1/2"],
+                "4x25G": ["Eth1/1", "Eth1/2", "Eth1/3", "Eth1/4"],
+                "4x10G": ["Eth1/1", "Eth1/2", "Eth1/3", "Eth1/4"]
+            }
+        },
+        "Ethernet5": {
+            "index": "1,1,1,1",
+            "lanes": "1,2,3,4",
+            "breakout_modes": {
+                "1x100G": ["Eth2"],
+                "2x50G": ["Eth2/1", "Eth2/2"],
+                "4x25G": ["Eth2/1", "Eth2/2", "Eth2/3", "Eth2/4"],
+                "4x10G": ["Eth2/1", "Eth2/2", "Eth2/3", "Eth2/4"]
+            }
+        },
+        "Ethernet9": {
+            "index": "2,2,2,2",
+            "lanes": "13,14,15,16",
+            "breakout_modes": {
+                "1x100G": ["Eth3"],
+                "2x50G": ["Eth3/1", "Eth3/2"],
+                "4x25G": ["Eth3/1", "Eth3/2", "Eth3/3", "Eth3/4"],
+                "4x10G": ["Eth3/1", "Eth3/2", "Eth3/3", "Eth3/4"]
+            }
+        },
+        "Ethernet13": {
+            "index": "3,3,3,3",
+            "lanes": "9,10,11,12",
+            "breakout_modes": {
+                "1x100G": ["Eth4"],
+                "2x50G": ["Eth4/1","Eth4/2"],
+                "4x25G": ["Eth4/1", "Eth4/2", "Eth4/3", "Eth4/4"],
+                "4x10G": ["Eth4/1", "Eth4/2", "Eth4/3", "Eth4/4"]
+            }
+        },
+        "Ethernet17": {
+            "index": "4,4,4,4",
+            "lanes": "21,22,23,24",
+            "breakout_modes": {
+                "1x100G": ["Eth5"],
+                "2x50G": ["Eth5/1", "Eth5/2"],
+                "4x25G": ["Eth5/1", "Eth5/2", "Eth5/3", "Eth5/4"],
+                "4x10G": ["Eth5/1", "Eth5/2", "Eth5/3", "Eth5/4"]
+            }
+        },
+        "Ethernet21": {
+            "index": "5,5,5,5",
+            "lanes": "17,18,19,20",
+            "breakout_modes": {
+                "1x100G": ["Eth6"],
+                "2x50G": ["Eth6/1", "Eth6/2"],
+                "4x25G": ["Eth6/1", "Eth6/2", "Eth6/3", "Eth6/4"],
+                "4x10G": ["Eth6/1", "Eth6/2", "Eth6/3", "Eth6/4"]
+            }
+        },
+        "Ethernet25": {
+            "index": "6,6,6,6",
+            "lanes": "29,30,31,32",
+            "breakout_modes": {
+                "1x100G": ["Eth7"],
+                "2x50G": ["Eth7/1", "Eth7/2"],
+                "4x25G": ["Eth7/1", "Eth7/2", "Eth7/3", "Eth7/4"],
+                "4x10G": ["Eth7/1", "Eth7/2", "Eth7/3", "Eth7/4"]
+            }
+        },
+        "Ethernet29": {
+            "index": "7,7,7,7",
+            "lanes": "25,26,27,28",
+            "breakout_modes": {
+                "1x100G": ["Eth8"],
+                "2x50G": ["Eth8/1", "Eth8/2"],
+                "4x25G": ["Eth8/1", "Eth8/2", "Eth8/3", "Eth8/4"],
+                "4x10G": ["Eth8/1", "Eth8/2", "Eth8/3", "Eth8/4"]
+            }
+        },
+        "Ethernet33": {
+            "index": "8,8,8,8",
+            "lanes": "37,38,39,40",
+            "breakout_modes": {
+                "1x100G": ["Eth9"],
+                "2x50G": ["Eth9/1", "Eth9/2"],
+                "4x25G": ["Eth9/1", "Eth9/2", "Eth9/3", "Eth9/4"],
+                "4x10G": ["Eth9/1", "Eth9/2", "Eth9/3", "Eth9/4"]
+            }
+        },
+        "Ethernet37": {
+            "index": "9,9,9,9",
+            "lanes": "33,34,35,36",
+            "breakout_modes": {
+                "1x100G": ["Eth10"],
+                "2x50G": ["Eth10/1", "Eth10/2"],
+                "4x25G": ["Eth10/1", "Eth10/2", "Eth10/3", "Eth10/4"],
+                "4x10G": ["Eth10/1", "Eth10/2", "Eth10/3", "Eth10/4"]
+            }
+        },
+        "Ethernet41": {
+            "index": "10,10,10,10",
+            "lanes": "45,46,47,48",
+            "breakout_modes": {
+                "1x100G": ["Eth11"],
+                "2x50G": ["Eth11/1", "Eth11/2"],
+                "4x25G": ["Eth11/1", "Eth11/2", "Eth11/3", "Eth11/4"],
+                "4x10G": ["Eth11/1", "Eth11/2", "Eth11/3", "Eth11/4"]
+            }
+        },
+        "Ethernet45": {
+            "index": "11,11,11,11",
+            "lanes": "41,42,43,44",
+            "breakout_modes": {
+                "1x100G": ["Eth12"],
+                "2x50G": ["Eth12/1", "Eth12/2"],
+                "4x25G": ["Eth12/1", "Eth12/2", "Eth12/3", "Eth12/4"],
+                "4x10G": ["Eth12/1", "Eth12/2", "Eth12/3", "Eth12/4"]
+            }
+        },
+        "Ethernet49": {
+            "index": "12,12,12,12",
+            "lanes": "53,54,55,56",
+            "breakout_modes": {
+                "1x100G": ["Eth13"],
+                "2x50G": ["Eth13/1", "Eth13/2"],
+                "4x25G": ["Eth13/1", "Eth13/2", "Eth13/3", "Eth13/4"],
+                "4x10G": ["Eth13/1", "Eth13/2", "Eth13/3", "Eth13/4"]
+            }
+        },
+        "Ethernet53": {
+            "index": "13,13,13,13",
+            "lanes": "49,50,51,52",
+            "breakout_modes": {
+                "1x100G": ["Eth14"],
+                "2x50G": ["Eth14/1", "Eth14/2"],
+                "4x25G": ["Eth14/1", "Eth14/2", "Eth14/3", "Eth14/4"],
+                "4x10G": ["Eth14/1", "Eth14/2", "Eth14/3", "Eth14/4"]
+            }
+        },
+        "Ethernet57": {
+            "index": "14,14,14,14",
+            "lanes": "61,62,63,64",
+            "breakout_modes": {
+                "1x100G": ["Eth15"],
+                "2x50G": ["Eth15/1", "Eth15/2"],
+                "4x25G": ["Eth15/1", "Eth15/2", "Eth15/3", "Eth15/4"],
+                "4x10G": ["Eth15/1", "Eth15/2", "Eth15/3", "Eth15/4"]
+            }
+        },
+        "Ethernet61": {
+            "index": "15,15,15,15",
+            "lanes": "57,58,59,60",
+            "breakout_modes": {
+                "1x100G": ["Eth16"],
+                "2x50G": ["Eth16/1", "Eth16/2"],
+                "4x25G": ["Eth16/1", "Eth16/2", "Eth16/3", "Eth16/4"],
+                "4x10G": ["Eth16/1", "Eth16/2", "Eth16/3", "Eth16/4"]
+            }
+        },
+        "Ethernet65": {
+            "index": "16,16,16,16",
+            "lanes": "69,70,71,72",
+            "breakout_modes": {
+                "1x100G": ["Eth17"],
+                "2x50G": ["Eth17/1", "Eth17/2"],
+                "4x25G": ["Eth17/1", "Eth17/2", "Eth17/3", "Eth17/4"],
+                "4x10G": ["Eth17/1", "Eth17/2", "Eth17/3", "Eth17/4"]
+            }
+        },
+        "Ethernet69": {
+            "index": "17,17,17,17",
+            "lanes": "65,66,67,68",
+            "breakout_modes": {
+                "1x100G": ["Eth18"],
+                "2x50G": ["Eth18/1", "Eth18/2"],
+                "4x25G": ["Eth18/1", "Eth18/2", "Eth18/3", "Eth18/4"],
+                "4x10G": ["Eth18/1", "Eth18/2", "Eth18/3", "Eth18/4"]
+            }
+        },
+        "Ethernet73": {
+            "index": "18,18,18,18",
+            "lanes": "77,78,79,80",
+            "breakout_modes": {
+                "1x100G": ["Eth19"],
+                "2x50G": ["Eth19/1", "Eth19/2"],
+                "4x25G": ["Eth19/1", "Eth19/2", "Eth19/3", "Eth19/4"],
+                "4x10G": ["Eth19/1", "Eth19/2", "Eth19/3", "Eth19/4"]
+            }
+        },
+        "Ethernet77": {
+            "index": "19,19,19,19",
+            "lanes": "73,74,75,76",
+            "breakout_modes": {
+                "1x100G": ["Eth20"],
+                "2x50G": ["Eth20/1", "Eth20/2"],
+                "4x25G": ["Eth20/1", "Eth20/2", "Eth20/3", "Eth20/4"],
+                "4x10G": ["Eth20/1", "Eth20/2", "Eth20/3", "Eth20/4"]
+            }
+        },
+        "Ethernet81": {
+            "index": "20,20,20,20",
+            "lanes": "85,86,87,88",
+            "breakout_modes": {
+                "1x100G": ["Eth21"],
+                "2x50G": ["Eth21/1", "Eth21/2"],
+                "4x25G": ["Eth21/1", "Eth21/2", "Eth21/3", "Eth21/4"],
+                "4x10G": ["Eth21/1", "Eth21/2", "Eth21/3", "Eth21/4"]
+            }
+        },
+        "Ethernet85": {
+            "index": "21,21,21,21",
+            "lanes": "81,82,83,84",
+            "breakout_modes": {
+                "1x100G": ["Eth22"],
+                "2x50G": ["Eth22/1", "Eth22/2"],
+                "4x25G": ["Eth22/1", "Eth22/2", "Eth22/3", "Eth22/4"],
+                "4x10G": ["Eth22/1", "Eth22/2", "Eth22/3", "Eth22/4"]
+            }
+        },
+        "Ethernet89": {
+            "index": "22,22,22,22",
+            "lanes": "93,94,95,96",
+            "breakout_modes": {
+                "1x100G": ["Eth23"],
+                "2x50G": ["Eth23/1", "Eth23/2"],
+                "4x25G": ["Eth23/1", "Eth23/2", "Eth23/3", "Eth23/4"],
+                "4x10G": ["Eth23/1", "Eth23/2", "Eth23/3", "Eth23/4"]
+            }
+        },
+        "Ethernet93": {
+            "index": "23,23,23,23",
+            "lanes": "89,90,91,92",
+            "breakout_modes": {
+                "1x100G": ["Eth24"],
+                "2x50G": ["Eth24/1", "Eth24/2"],
+                "4x25G": ["Eth24/1", "Eth24/2", "Eth24/3", "Eth24/4"],
+                "4x10G": ["Eth24/1", "Eth24/2", "Eth24/3", "Eth24/4"]
+            }
+        },
+        "Ethernet97": {
+            "index": "24,24,24,24",
+            "lanes": "101,102,103,104",
+            "breakout_modes": {
+                "1x100G": ["Eth25"],
+                "2x50G": ["Eth25/1", "Eth25/2"],
+                "4x25G": ["Eth25/1", "Eth25/2", "Eth25/3", "Eth25/4"],
+                "4x10G": ["Eth25/1", "Eth25/2", "Eth25/3", "Eth25/4"]
+            }
+        },
+        "Ethernet101": {
+            "index": "25,25,25,25",
+            "lanes": "97,98,99,100",
+            "breakout_modes": {
+                "1x100G": ["Eth26"],
+                "2x50G": ["Eth26/1", "Eth26/2"],
+                "4x25G": ["Eth26/1", "Eth26/2", "Eth26/3", "Eth26/4"],
+                "4x10G": ["Eth26/1", "Eth26/2", "Eth26/3", "Eth26/4"]
+            }
+        },
+        "Ethernet105": {
+            "index": "26,26,26,26",
+            "lanes": "109,110,111,112",
+            "breakout_modes": {
+                "1x100G": ["Eth27"],
+                "2x50G": ["Eth27/1", "Eth27/2"],
+                "4x25G": ["Eth27/1", "Eth27/2", "Eth27/3", "Eth27/4"],
+                "4x10G": ["Eth27/1", "Eth27/2", "Eth27/3", "Eth27/4"]
+            }
+        },
+        "Ethernet109": {
+            "index": "27,27,27,27",
+            "lanes": "105,106,107,108",
+            "breakout_modes": {
+                "1x100G": ["Eth28"],
+                "2x50G": ["Eth28/1", "Eth28/2"],
+                "4x25G": ["Eth28/1", "Eth28/2", "Eth28/3", "Eth28/4"],
+                "4x10G": ["Eth28/1", "Eth28/2", "Eth28/3", "Eth28/4"]
+            }
+        },
+        "Ethernet113": {
+            "index": "28,28,28,28",
+            "lanes": "117,118,119,120",
+            "breakout_modes": {
+                "1x100G": ["Eth29"],
+                "2x50G": ["Eth29/1", "Eth29/2"],
+                "4x25G": ["Eth29/1", "Eth29/2", "Eth29/3", "Eth29/4"],
+                "4x10G": ["Eth29/1", "Eth29/2", "Eth29/3", "Eth29/4"]
+            }
+        },
+        "Ethernet117": {
+            "index": "29,29,29,29",
+            "lanes": "113,114,115,116",
+            "breakout_modes": {
+                "1x100G": ["Eth30"],
+                "2x50G": ["Eth30/1", "Eth30/2"],
+                "4x25G": ["Eth30/1", "Eth30/2", "Eth30/3", "Eth30/4"],
+                "4x10G": ["Eth30/1", "Eth30/2", "Eth30/3", "Eth30/4"]
+            }
+        },
+        "Ethernet121": {
+            "index": "30,30,30,30",
+            "lanes": "125,126,127,128",
+            "breakout_modes": {
+                "1x100G": ["Eth31"],
+                "2x50G": ["Eth31/1", "Eth31/2"],
+                "4x25G": ["Eth31/1", "Eth31/2", "Eth31/3", "Eth31/4"],
+                "4x10G": ["Eth31/1", "Eth31/2", "Eth31/3", "Eth31/4"]
+            }
+        },
+        "Ethernet125": {
+            "index": "31,31,31,31",
+            "lanes": "121,122,123,124",
+            "breakout_modes": {
+                "1x100G": ["Eth32"],
+                "2x50G": ["Eth32/1", "Eth32/2"],
+                "4x25G": ["Eth32/1", "Eth32/2", "Eth32/3", "Eth32/4"],
+                "4x10G": ["Eth32/1", "Eth32/2", "Eth32/3", "Eth32/4"]
+            }
+        }
+    }
+}
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/platform_asic b/device/micas/x86_64-micas_m2-w6510-32c-r0/platform_asic
new file mode 100644
index 000000000000..960467652765
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-32c-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6510-32c-r0/platform_components.json
new file mode 100644
index 000000000000..4958aa5ee322
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-32c-r0/platform_components.json
@@ -0,0 +1,16 @@
+{
+    "chassis": {
+        "M2-W6510-32C": {
+            "component": {
+                "CPU_CPLD": { },
+                "CONNECT_CPLD": { },
+                "CONNECT_CPLD-FAN": { },
+                "MAC_CPLD1": { },
+                "MAC_CPLD2": { },
+                "FPGA": { },
+                "BIOS": { }
+            }
+        }
+    }
+}
+
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6510-32c-r0/plugins/sfputil.py
new file mode 100644
index 000000000000..875d99f5c17d
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-32c-r0/plugins/sfputil.py
@@ -0,0 +1,244 @@
+# sfputil.py
+#
+# Platform-specific SFP transceiver interface for SONiC
+#
+
+try:
+    import time
+    import os
+    import traceback
+    from sonic_sfp.sfputilbase import SfpUtilBase
+except ImportError as e:
+    raise ImportError("%s - required module not found" % str(e))
+
+class SfpUtil(SfpUtilBase):
+    """Platform-specific SfpUtil class"""
+
+    PORT_START = 0
+    PORT_END = 31
+    PORTS_IN_BLOCK = 32
+
+    EEPROM_OFFSET = 32
+    SFP_DEVICE_TYPE = "optoe2"
+    QSFP_DEVICE_TYPE = "optoe1"
+    I2C_MAX_ATTEMPT = 3
+
+    _port_to_eeprom_mapping = {}
+    port_to_i2cbus_mapping ={}
+
+    @property
+    def port_start(self):
+        return self.PORT_START
+
+    @property
+    def port_end(self):
+        return self.PORT_END
+
+    @property
+    def qsfp_ports(self):
+        return range(0, self.PORTS_IN_BLOCK)
+
+    @property
+    def port_to_eeprom_mapping(self):
+        return self._port_to_eeprom_mapping
+
+    def __init__(self):
+        for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+            self.port_to_i2cbus_mapping[x] = x + self.EEPROM_OFFSET
+        SfpUtilBase.__init__(self)
+
+    def _sfp_read_file_path(self, file_path, offset, num_bytes):
+        attempts = 0
+        while attempts < self.I2C_MAX_ATTEMPT:
+            try:
+                file_path.seek(offset)
+                read_buf = file_path.read(num_bytes)
+            except Exception:
+                attempts += 1
+                time.sleep(0.05)
+            return True, read_buf
+        return False, None
+
+    def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset):
+        """Tries to read the eeprom file to determine if the
+        device/sfp is present or not. If sfp present, the read returns
+        valid bytes. If not, read returns error 'Connection timed out"""
+
+        if not os.path.exists(sysfs_sfp_i2c_client_eeprompath):
+            return False
+        with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile:
+            rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1)
+            return rv
+
+    def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype):
+        try:
+            sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path
+
+            # Write device address to new_device file
+            nd_str = "%s %s" % (devtype, hex(devaddr))
+            with open(sysfs_nd_path, "w") as nd_file:
+                nd_file.write(nd_str)
+
+        except Exception as err:
+            print("Error writing to new device file: %s" % str(err))
+            return 1
+        else:
+            return 0
+
+    def _get_port_eeprom_path(self, port_num, devid):
+        sysfs_i2c_adapter_base_path = ""
+
+        if port_num in self.port_to_eeprom_mapping:
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num]
+        else:
+            sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+            i2c_adapter_id = self._get_port_i2c_adapter_id(port_num)
+            if i2c_adapter_id is None:
+                print("Error getting i2c bus num")
+                return None
+
+            # Get i2c virtual bus path for the sfp
+            sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path,
+                                                        str(i2c_adapter_id))
+
+            # If i2c bus for port does not exist
+            if not os.path.exists(sysfs_sfp_i2c_adapter_path):
+                print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path)
+                return None
+
+            sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path,
+                                                        str(i2c_adapter_id),
+                                                        hex(devid)[-2:])
+
+            # If sfp device is not present on bus, Add it
+            if not os.path.exists(sysfs_sfp_i2c_client_path):
+                if port_num in self.qsfp_ports:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE)
+                else:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE)
+                if ret != 0:
+                    print("Error adding sfp device")
+                    return None
+
+            sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path
+
+        return sysfs_sfp_i2c_client_eeprom_path
+
+    def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes):
+        eeprom_raw = []
+        for i in range(0, num_bytes):
+            eeprom_raw.append("0x00")
+
+        rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes)
+        if rv is False:
+            return None
+
+        try:
+            for n in range(0, num_bytes):
+                eeprom_raw[n] = hex(raw[n])[2:].zfill(2)
+        except Exception:
+            return None
+
+        return eeprom_raw
+
+    def get_eeprom_dom_raw(self, port_num):
+        if port_num in self.qsfp_ports:
+            # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw
+            return None
+        # Read dom eeprom at addr 0x51
+        return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256)
+
+    def get_presence(self, port_num):
+        # Check for invalid port_num
+        if port_num < self.port_start or port_num > self.port_end:
+            return False
+
+        #The sff number starts from 1
+        presence_path = "/sys/wb_plat/sff/sff%d/present" % (port_num + 1)
+
+        try:
+            with open(presence_path, "rb") as data:
+                presence_data = data.read(2)
+                if presence_data == "":
+                    return False
+                result = int(presence_data, 16)
+        except IOError:
+            return False
+
+        if result == 1:
+            return True
+        return False
+
+    def get_low_power_mode(self, port_num):
+        # Check for invalid port_num
+
+        return True
+
+    def set_low_power_mode(self, port_num, lpmode):
+        # Check for invalid port_num
+
+        return True
+
+    def reset(self, port_num):
+        # Check for invalid port_num
+        if port_num < self.port_start or port_num > self.port_end:
+            return False
+
+        return True
+
+    def get_transceiver_change_event(self, timeout=0):
+        return False, {}
+
+    def get_highest_temperature(self):
+        offset = 0
+        hightest_temperature = -9999
+
+        presence_flag = False
+        read_eeprom_flag = False
+        temperature_valid_flag = False
+
+        for port in range(0, self.PORTS_IN_BLOCK):
+            if self.get_presence(port) is False:
+                continue
+
+            presence_flag = True
+
+            if port in self.qsfp_ports:
+                offset = 22
+            else:
+                offset = 96
+
+            eeprom_path = self._get_port_eeprom_path(port, 0x50)
+            try:
+                with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+                    read_eeprom_flag = True
+                    eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2)
+                    msb = int(eeprom_raw[0], 16)
+                    lsb = int(eeprom_raw[1], 16)
+
+                    result = (msb << 8) | (lsb & 0xff)
+                    result = float(result / 256.0)
+                    if -50 <= result <= 200:
+                        temperature_valid_flag = True
+                        hightest_temperature = max(hightest_temperature, result)
+            except Exception:
+                print(traceback.format_exc())
+
+        # all port not presence
+        if presence_flag is False:
+            hightest_temperature = -10000
+
+        # all port read eeprom fail
+        elif read_eeprom_flag is False:
+            hightest_temperature = -9999
+
+        # all port temperature invalid
+        elif read_eeprom_flag is True and temperature_valid_flag is False:
+            hightest_temperature = -10000
+
+        hightest_temperature = round(hightest_temperature, 2)
+
+        return hightest_temperature
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6510-32c-r0/plugins/ssd_util.py
new file mode 100644
index 000000000000..e8cf2e1a7cbc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-32c-r0/plugins/ssd_util.py
@@ -0,0 +1,318 @@
+#
+# ssd_util.py
+#
+# Generic implementation of the SSD health API
+# SSD models supported:
+#  - InnoDisk
+#  - StorFly
+#  - Virtium
+
+try:
+    import re
+    import os
+    import subprocess
+    from sonic_platform_base.sonic_storage.storage_base import StorageBase
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+SMARTCTL = "smartctl {} -a"
+INNODISK = "iSmart -d {}"
+VIRTIUM  = "SmartCmd -m {}"
+DISK_LIST_CMD = "fdisk -l -o Device"
+DISK_FREE_CMD = "df -h"
+MOUNT_CMD = "mount"
+
+NOT_AVAILABLE = "N/A"
+PE_CYCLE = 3000
+FAIL_PERCENT = 95
+
+# Set Vendor Specific IDs
+INNODISK_HEALTH_ID = 169
+INNODISK_TEMPERATURE_ID = 194
+
+class SsdUtil(StorageBase):
+    """
+    Generic implementation of the SSD health API
+    """
+    model = NOT_AVAILABLE
+    serial = NOT_AVAILABLE
+    firmware = NOT_AVAILABLE
+    temperature = NOT_AVAILABLE
+    health = NOT_AVAILABLE
+    remaining_life = NOT_AVAILABLE
+    sata_rate = NOT_AVAILABLE
+    ssd_info = NOT_AVAILABLE
+    vendor_ssd_info = NOT_AVAILABLE
+
+    def __init__(self, diskdev):
+        self.vendor_ssd_utility = {
+            "Generic"  : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info },
+            "InnoDisk" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+            "M.2"      : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+            "StorFly"  : { "utility" : VIRTIUM,  "parser" : self.parse_virtium_info },
+            "Virtium"  : { "utility" : VIRTIUM,  "parser" : self.parse_virtium_info }
+        }
+
+        """
+        The dict model_attr keys relate the vendors
+        LITEON : "ER2-GD","AF2MA31DTDLT"
+        Intel  : "SSDSCKKB"
+        SMI    : "SM619GXC"
+        samsung: "MZNLH"
+        ADATA  : "IM2S3134N"
+        """
+        self.model_attr = {
+             "ER2-GD"       : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+             "AF2MA31DTDLT" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+             "SSDSCK"       : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n233\s+(.+?)\n" },
+             "SM619GXC"     : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n169\s+(.+?)\n" },
+             "MZNLH"        : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n245\s+(.+?)\n" },
+             "IM2S3134N"    : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n231\s+(.+?)\n" },
+             "MTFDDAV240TCB-1AR1ZABAA"    : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }
+        }
+
+        self.key_list = list(self.model_attr.keys())
+        self.attr_info_rule = "[\s\S]*SMART Attributes Data Structure revision number: 1|SMART Error Log Version[\s\S]*"
+        self.dev = diskdev
+        # Generic part
+        self.fetch_generic_ssd_info(diskdev)
+        self.parse_generic_ssd_info()
+        self.fetch_vendor_ssd_info(diskdev, "Generic")
+        
+        # Known vendor part
+        if self.model:
+            model_short = self.model.split()[0]
+            if model_short in self.vendor_ssd_utility:
+                self.fetch_vendor_ssd_info(diskdev, model_short)
+                self.parse_vendor_ssd_info(model_short)
+            else:
+                # No handler registered for this disk model
+                pass
+        else:
+            # Failed to get disk model
+            self.model = "Unknown"
+
+    def _execute_shell(self, cmd):
+        process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE)
+        output, error = process.communicate()
+        exit_code = process.returncode
+        if exit_code:
+            return None
+        return output
+
+    def _parse_re(self, pattern, buffer):
+        res_list = re.findall(pattern, str(buffer))
+        return res_list[0] if res_list else NOT_AVAILABLE
+
+    def fetch_generic_ssd_info(self, diskdev):
+        self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev))
+
+    # Health and temperature values may be overwritten with vendor specific data
+    def parse_generic_ssd_info(self):
+        if "nvme" in self.dev:
+            self.model = self._parse_re('Model Number:\s*(.+?)\n', self.ssd_info)
+
+            health_raw = self._parse_re('Percentage Used\s*(.+?)\n', self.ssd_info)
+            if health_raw == NOT_AVAILABLE:
+                self.health = NOT_AVAILABLE
+            else:
+                health_raw = health_raw.split()[-1]
+                self.health = 100 - float(health_raw.strip('%'))
+
+            temp_raw = self._parse_re('Temperature\s*(.+?)\n', self.ssd_info)
+            if temp_raw == NOT_AVAILABLE:
+                self.temperature = NOT_AVAILABLE
+            else:
+                temp_raw = temp_raw.split()[-2]
+                self.temperature = float(temp_raw)
+        else:
+            self.model = self._parse_re('Device Model:\s*(.+?)\n', self.ssd_info)
+            model_key = ""
+            for key in self.key_list:
+                if re.search(key, self.model):
+                    model_key = key
+                    break
+            if  model_key != "":
+                self.remaining_life = self._parse_re(self.model_attr[model_key]["remainingLife"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[2]
+                self.temperature = self._parse_re(self.model_attr[model_key]["temperature"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[8]
+                self.health = self.remaining_life
+            # Get the LITEON ssd health value by (PE CYCLE - AVG ERASE CYCLE )/(PE CYCLE)
+            if model_key in ["ER2-GD", "AF2MA31DTDLT"]:
+                avg_erase = int(self._parse_re('\n173\s+(.+?)\n' ,re.sub(self.attr_info_rule,"",self.ssd_info)).split()[-1])
+                self.health = int(round((PE_CYCLE - avg_erase)/PE_CYCLE*100,0))
+            if self.remaining_life != NOT_AVAILABLE and  int(self.remaining_life) < FAIL_PERCENT:
+                self.remaining_life = "Fail"
+        self.sata_rate = self._parse_re('SATA Version is:.*current: (.+?)\)\n', self.ssd_info)
+        self.serial = self._parse_re('Serial Number:\s*(.+?)\n', self.ssd_info)
+        self.firmware = self._parse_re('Firmware Version:\s*(.+?)\n', self.ssd_info)
+
+    def parse_innodisk_info(self):
+        if self.vendor_ssd_info:
+            self.health = self._parse_re('Health:\s*(.+?)%', self.vendor_ssd_info)
+            self.temperature = self._parse_re('Temperature\s*\[\s*(.+?)\]', self.vendor_ssd_info)
+        else:
+            if self.health == NOT_AVAILABLE:
+                health_raw = self.parse_id_number(INNODISK_HEALTH_ID)
+                self.health = health_raw.split()[-1]
+            if self.temperature == NOT_AVAILABLE:
+                temp_raw = self.parse_id_number(INNODISK_TEMPERATURE_ID)
+                self.temperature = temp_raw.split()[-6]
+
+    def parse_virtium_info(self):
+        if self.vendor_ssd_info:
+            self.temperature = self._parse_re('Temperature_Celsius\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            nand_endurance = self._parse_re('NAND_Endurance\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            avg_erase_count = self._parse_re('Average_Erase_Count\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            try:
+                self.health = 100 - (float(avg_erase_count) * 100 / float(nand_endurance))
+            except (ValueError, ZeroDivisionError):
+                # Invalid avg_erase_count or nand_endurance.
+                pass
+
+    def fetch_vendor_ssd_info(self, diskdev, model):
+        self.vendor_ssd_info = self._execute_shell(self.vendor_ssd_utility[model]["utility"].format(diskdev))
+
+    def parse_vendor_ssd_info(self, model):
+        self.vendor_ssd_utility[model]["parser"]()
+
+    def check_readonly2(self, partition, filesystem):
+        # parse mount cmd output info
+        mount_info = self._execute_shell(MOUNT_CMD)
+        for line in mount_info.split('\n'):
+            column_list = line.split()
+            if line == '':
+                continue
+            if column_list[0] == partition and column_list[2] == filesystem:
+                if column_list[5].split(',')[0][1:] == "ro":
+                    return partition
+                else:
+                    return NOT_AVAILABLE
+        return NOT_AVAILABLE
+
+    def check_readonly(self, partition, filesystem):
+        ret = os.access(filesystem, os.W_OK)
+        if ret == False:
+            return partition
+        else:
+            return NOT_AVAILABLE
+        
+    def get_health(self):
+        """
+        Retrieves current disk health in percentages
+
+        Returns:
+            A float number of current ssd health
+            e.g. 83.5
+        """
+        if self.health == 'N/A':
+            return "NA"
+        else:
+            return float(self.health)
+
+    def get_temperature(self):
+        """
+        Retrieves current disk temperature in Celsius
+
+        Returns:
+            A float number of current temperature in Celsius
+            e.g. 40.1
+        """
+        if self.temperature == 'N/A':
+            return 'NA'
+        else:
+            return float(self.temperature)
+
+    def get_model(self):
+        """
+        Retrieves model for the given disk device
+
+        Returns:
+            A string holding disk model as provided by the manufacturer
+        """
+        return self.model
+
+    def get_firmware(self):
+        """
+        Retrieves firmware version for the given disk device
+
+        Returns:
+            A string holding disk firmware version as provided by the manufacturer
+        """
+        return self.firmware
+
+    def get_serial(self):
+        """
+        Retrieves serial number for the given disk device
+
+        Returns:
+            A string holding disk serial number as provided by the manufacturer
+        """
+        return self.serial
+    def get_sata_rate(self):
+        """
+        Retrieves SATA rate for the given disk device
+        Returns:
+            A string holding current SATA rate as provided by the manufacturer
+        """
+        return self.sata_rate
+    def get_remaining_life(self):
+        """
+        Retrieves remaining life for the given disk device
+        Returns:
+            A string holding disk remaining life as provided by the manufacturer
+        """
+        return self.remaining_life
+    def get_vendor_output(self):
+        """
+        Retrieves vendor specific data for the given disk device
+
+        Returns:
+            A string holding some vendor specific disk information
+        """
+        return self.vendor_ssd_info
+
+    def parse_id_number(self, id):
+        return self._parse_re('{}\s*(.+?)\n'.format(id), self.ssd_info)
+
+    def get_readonly_partition(self):
+        """
+        Check the partition mount filesystem is readonly status,then output the result.
+        Returns:
+            The readonly partition list
+        """
+
+        ro_partition_list = []
+        partition_list = []
+
+        # parse fdisk cmd output info
+        disk_info = self._execute_shell(DISK_LIST_CMD)
+        begin_flag = False
+        for line in disk_info.split('\n'):
+            if line == "Device":
+                begin_flag = True
+                continue
+            if begin_flag:
+                if line != "":
+                    partition_list.append(line)
+                else:
+                    break
+
+        # parse df cmd output info
+        disk_free = self._execute_shell(DISK_FREE_CMD)
+        disk_dict = {}
+        line_num = 0
+        for line in disk_free.split('\n'):
+            line_num = line_num + 1
+            if line_num == 1 or line == "":
+                continue
+            column_list = line.split()
+            disk_dict[column_list[0]] = column_list[5]
+
+        # get partition which is readonly
+        for partition in partition_list:
+            if partition in disk_dict:
+                ret = self.check_readonly(partition, disk_dict[partition])
+                if (ret != NOT_AVAILABLE):
+                    ro_partition_list.append(ret)
+
+        return ro_partition_list
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6510-32c-r0/pmon_daemon_control.json
new file mode 100644
index 000000000000..94592fa8cebc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-32c-r0/pmon_daemon_control.json
@@ -0,0 +1,3 @@
+{
+    "skip_ledd": true
+}
diff --git a/device/micas/x86_64-micas_m2-w6510-32c-r0/system_health_monitoring_config.json b/device/micas/x86_64-micas_m2-w6510-32c-r0/system_health_monitoring_config.json
new file mode 100755
index 000000000000..e69de29bb2d1
diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk
index caac3b74f1b0..b3951f869530 100755
--- a/platform/broadcom/one-image.mk
+++ b/platform/broadcom/one-image.mk
@@ -99,7 +99,8 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \
                                $(UFISPACE_S9301_32DB_PLATFORM_MODULE) \
                                $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE) \
 			       $(MICAS_M2_W6510_48GT4V_PLATFORM_MODULE) \
-			       $(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE)
+			       $(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE) \
+			       $(MICAS_M2_W6510_32C_PLATFORM_MODULE)
 
 $(SONIC_ONE_IMAGE)_LAZY_BUILD_INSTALLS = $(BRCM_OPENNSL_KERNEL) $(BRCM_DNX_OPENNSL_KERNEL)
 ifeq ($(INSTALL_DEBUG_TOOLS),y)
diff --git a/platform/broadcom/platform-modules-micas.mk b/platform/broadcom/platform-modules-micas.mk
index fb2277921950..729674eb7517 100644
--- a/platform/broadcom/platform-modules-micas.mk
+++ b/platform/broadcom/platform-modules-micas.mk
@@ -24,3 +24,11 @@ export MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE_VERSION
 MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE = platform-modules-micas-m2-w6520-24dc8qc_$(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE_VERSION)_amd64.deb
 $(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6520-24dc8qc-r0
 $(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE)))
+
+## M2-W6510-32C
+MICAS_M2_W6510_32C_PLATFORM_MODULE_VERSION = 1.0
+export MICAS_M2_W6510_32C_PLATFORM_MODULE_VERSION
+
+MICAS_M2_W6510_32C_PLATFORM_MODULE = platform-modules-micas-m2-w6510-32c_$(MICAS_M2_W6510_32C_PLATFORM_MODULE_VERSION)_amd64.deb
+$(MICAS_M2_W6510_32C_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6510-32c-r0
+$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6510_32C_PLATFORM_MODULE)))
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/control b/platform/broadcom/sonic-platform-modules-micas/debian/control
index 819647fdbfc3..c6f9acb4a27e 100644
--- a/platform/broadcom/sonic-platform-modules-micas/debian/control
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/control
@@ -15,3 +15,9 @@ Description: kernel modules for platform devices such as fan, led, sfp
 Package: platform-modules-micas-m2-w6520-24dc8qc
 Architecture: amd64
 Description: kernel modules for platform devices such as fan, led, sfp
+
+Package: platform-modules-micas-m2-w6510-32c
+Architecture: amd64
+Description: kernel modules for platform devices such as fan, led, sfp
+
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.install
new file mode 100644
index 000000000000..ae2477cf1148
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.install
@@ -0,0 +1 @@
+m2-w6510-32c/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6510-32c-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.postinst
new file mode 100644
index 000000000000..a8132f4f65a9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.postinst
@@ -0,0 +1,10 @@
+#!/bin/sh
+# postinst
+
+kernel_version=$(uname -r)
+
+if [ -e /boot/System.map-${kernel_version} ]; then
+    depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
+fi
+
+#DEBHELPER#
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
index 4ed55c469bc7..5bd19a8ee8f1 100644
--- a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
@@ -3,5 +3,6 @@ currentdir = $(shell pwd)
 MODULE_DIRS := m2-w6510-48v8c
 MODULE_DIRS += m2-w6510-48gt4v
 MODULE_DIRS += m2-w6520-24dc8qc
+MODULE_DIRS += m2-w6510-32c
 
 export MODULE_DIRS
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/Makefile
new file mode 100644
index 000000000000..052a5a6a0773
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/Makefile
@@ -0,0 +1,25 @@
+PWD		= $(shell pwd)
+DIR_KERNEL_SRC = $(PWD)/modules/driver
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+SUB_BUILD_DIR = $(PWD)/build
+INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)
+INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin
+INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages
+INSTALL_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/plat_sysfs_cfg
+
+all:
+	$(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules
+	@if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi
+	cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR)
+	@if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi
+	cp -r $(PWD)/config/*  $(INSTALL_SCRIPT_DIR)
+	@if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi
+	@if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi
+	@if [ ! -d ${INSTALL_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_SYSFS_CFG_DIR} ;fi
+	@if [ -d $(PWD)/plat_sysfs_cfg/ ]; then cp -r $(PWD)/plat_sysfs_cfg/* ${INSTALL_SYSFS_CFG_DIR} ;fi
+clean:
+	rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd
+	rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order
+	rm -rf ${DIR_KERNEL_SRC}/.tmp_versions
+	rm -rf $(SUB_BUILD_DIR)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/config/x86_64_micas_m2_w6510_32c_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/config/x86_64_micas_m2_w6510_32c_r0_config.py
new file mode 100755
index 000000000000..4ead3a905c53
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/config/x86_64_micas_m2_w6510_32c_r0_config.py
@@ -0,0 +1,1078 @@
+#!/usr/bin/python
+# -*- coding: UTF-8 -*-
+from platform_common import *
+
+STARTMODULE = {
+    "hal_fanctrl": 1,
+    "hal_ledctrl": 1,
+    "avscontrol": 0,
+    "dev_monitor": 1,
+    "reboot_cause": 1,
+    "pmon_syslog": 1,
+    "macledreset": 1,
+    "sff_temp_polling": 1,
+    "generate_airflow": 1,
+}
+
+MAC_LED_RESET = {"pcibus": 8, "slot": 0, "fn": 0, "bar": 0, "offset": 64, "reset": 0x98}
+
+MANUINFO_CONF = {
+    "bios": {
+        "key": "BIOS",
+        "head": True,
+        "next": "onie"
+    },
+    "bios_vendor": {
+        "parent": "bios",
+        "key": "Vendor",
+        "cmd": "dmidecode -t 0 |grep Vendor",
+        "pattern": r".*Vendor",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "bios_version": {
+        "parent": "bios",
+        "key": "Version",
+        "cmd": "dmidecode -t 0 |grep Version",
+        "pattern": r".*Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "bios_date": {
+        "parent": "bios",
+        "key": "Release Date",
+        "cmd": "dmidecode -t 0 |grep Release",
+        "pattern": r".*Release Date",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+    "onie": {
+        "key": "ONIE",
+        "next": "cpu"
+    },
+    "onie_date": {
+        "parent": "onie",
+        "key": "Build Date",
+        "file": "/host/machine.conf",
+        "pattern": r"^onie_build_date",
+        "separator": "=",
+        "arrt_index": 1,
+    },
+    "onie_version": {
+        "parent": "onie",
+        "key": "Version",
+        "file": "/host/machine.conf",
+        "pattern": r"^onie_version",
+        "separator": "=",
+        "arrt_index": 2,
+    },
+
+    "cpu": {
+        "key": "CPU",
+        "next": "ssd"
+    },
+    "cpu_vendor": {
+        "parent": "cpu",
+        "key": "Vendor",
+        "cmd": "dmidecode --type processor |grep Manufacturer",
+        "pattern": r".*Manufacturer",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "cpu_model": {
+        "parent": "cpu",
+        "key": "Device Model",
+        "cmd": "dmidecode --type processor | grep Version",
+        "pattern": r".*Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "cpu_core": {
+        "parent": "cpu",
+        "key": "Core Count",
+        "cmd": "dmidecode --type processor | grep \"Core Count\"",
+        "pattern": r".*Core Count",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+    "cpu_thread": {
+        "parent": "cpu",
+        "key": "Thread Count",
+        "cmd": "dmidecode --type processor | grep \"Thread Count\"",
+        "pattern": r".*Thread Count",
+        "separator": ":",
+        "arrt_index": 4,
+    },
+    "ssd": {
+        "key": "SSD",
+        "next": "cpld"
+    },
+    "ssd_model": {
+        "parent": "ssd",
+        "key": "Device Model",
+        "cmd": "smartctl -i /dev/sda |grep \"Device Model\"",
+        "pattern": r".*Device Model",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "ssd_fw": {
+        "parent": "ssd",
+        "key": "Firmware Version",
+        "cmd": "smartctl -i /dev/sda |grep \"Firmware Version\"",
+        "pattern": r".*Firmware Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "ssd_user_cap": {
+        "parent": "ssd",
+        "key": "User Capacity",
+        "cmd": "smartctl -i /dev/sda |grep \"User Capacity\"",
+        "pattern": r".*User Capacity",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+
+    "cpld": {
+        "key": "CPLD",
+        "next": "psu"
+    },
+
+    "cpld1": {
+        "key": "CPLD1",
+        "parent": "cpld",
+        "arrt_index": 1,
+    },
+    "cpld1_model": {
+        "key": "Device Model",
+        "parent": "cpld1",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld1_vender": {
+        "key": "Vendor",
+        "parent": "cpld1",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld1_desc": {
+        "key": "Description",
+        "parent": "cpld1",
+        "config": "CPU_CPLD",
+        "arrt_index": 3,
+    },
+    "cpld1_version": {
+        "key": "Firmware Version",
+        "parent": "cpld1",
+        "reg": {
+            "loc": "/dev/port",
+            "offset": 0x700,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld2": {
+        "key": "CPLD2",
+        "parent": "cpld",
+        "arrt_index": 2,
+    },
+    "cpld2_model": {
+        "key": "Device Model",
+        "parent": "cpld2",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld2_vender": {
+        "key": "Vendor",
+        "parent": "cpld2",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld2_desc": {
+        "key": "Description",
+        "parent": "cpld2",
+        "config": "CONNECT_CPLD",
+        "arrt_index": 3,
+    },
+    "cpld2_version": {
+        "key": "Firmware Version",
+        "parent": "cpld2",
+        "reg": {
+            "loc": "/dev/port",
+            "offset": 0x900,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld3": {
+        "key": "CPLD3",
+        "parent": "cpld",
+        "arrt_index": 3,
+    },
+    "cpld3_model": {
+        "key": "Device Model",
+        "parent": "cpld3",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld3_vender": {
+        "key": "Vendor",
+        "parent": "cpld3",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld3_desc": {
+        "key": "Description",
+        "parent": "cpld3",
+        "config": "CONNECT_CPLD-FAN",
+        "arrt_index": 3,
+    },
+    "cpld3_version": {
+        "key": "Firmware Version",
+        "parent": "cpld3",
+        "i2c": {
+            "bus": "2",
+            "loc": "0x0d",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld4": {
+        "key": "CPLD4",
+        "parent": "cpld",
+        "arrt_index": 4,
+    },
+    "cpld4_model": {
+        "key": "Device Model",
+        "parent": "cpld4",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld4_vender": {
+        "key": "Vendor",
+        "parent": "cpld4",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld4_desc": {
+        "key": "Description",
+        "parent": "cpld4",
+        "config": "MAC_CPLD1",
+        "arrt_index": 3,
+    },
+    "cpld4_version": {
+        "key": "Firmware Version",
+        "parent": "cpld4",
+        "i2c": {
+            "bus": "8",
+            "loc": "0x30",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld5": {
+        "key": "CPLD5",
+        "parent": "cpld",
+        "arrt_index": 5,
+    },
+    "cpld5_model": {
+        "key": "Device Model",
+        "parent": "cpld5",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld5_vender": {
+        "key": "Vendor",
+        "parent": "cpld5",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld5_desc": {
+        "key": "Description",
+        "parent": "cpld5",
+        "config": "MAC_CPLD2",
+        "arrt_index": 3,
+    },
+    "cpld5_version": {
+        "key": "Firmware Version",
+        "parent": "cpld5",
+        "i2c": {
+            "bus": "8",
+            "loc": "0x31",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "psu": {
+        "key": "PSU",
+        "next": "fan"
+    },
+
+    "psu1": {
+        "parent": "psu",
+        "key": "PSU1",
+        "arrt_index": 1,
+    },
+    "psu1_hw_version": {
+        "key": "Hardware Version",
+        "parent": "psu1",
+        "extra": {
+            "funcname": "getPsu",
+            "id": "psu1",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "psu1_fw_version": {
+        "key": "Firmware Version",
+        "parent": "psu1",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "psu2": {
+        "parent": "psu",
+        "key": "PSU2",
+        "arrt_index": 2,
+    },
+    "psu2_hw_version": {
+        "key": "Hardware Version",
+        "parent": "psu2",
+        "extra": {
+            "funcname": "getPsu",
+            "id": "psu2",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "psu2_fw_version": {
+        "key": "Firmware Version",
+        "parent": "psu2",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan": {
+        "key": "FAN",
+        "next": "i210"
+    },
+
+    "fan1": {
+        "key": "FAN1",
+        "parent": "fan",
+        "arrt_index": 1,
+    },
+    "fan1_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan1",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan1",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan1_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan1",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan2": {
+        "key": "FAN2",
+        "parent": "fan",
+        "arrt_index": 2,
+    },
+    "fan2_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan2",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan2",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan2_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan2",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan3": {
+        "key": "FAN3",
+        "parent": "fan",
+        "arrt_index": 3,
+    },
+    "fan3_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan3",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan3",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan3_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan3",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan4": {
+        "key": "FAN4",
+        "parent": "fan",
+        "arrt_index": 4,
+    },
+    "fan4_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan4",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan4",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan4_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan4",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan5": {
+        "key": "FAN5",
+        "parent": "fan",
+        "arrt_index": 5,
+    },
+    "fan5_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan5",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan5",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan5_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan5",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "i210": {
+        "key": "NIC",
+        "next": "fpga"
+    },
+    "i210_model": {
+        "parent": "i210",
+        "config": "NA",
+        "key": "Device Model",
+        "arrt_index": 1,
+    },
+    "i210_vendor": {
+        "parent": "i210",
+        "config": "INTEL",
+        "key": "Vendor",
+        "arrt_index": 2,
+    },
+    "i210_version": {
+        "parent": "i210",
+        "cmd": "ethtool -i eth0",
+        "pattern": r"firmware-version",
+        "separator": ":",
+        "key": "Firmware Version",
+        "arrt_index": 3,
+    },
+
+    "fpga": {
+        "key": "FPGA",
+        "next": "asic"
+    },
+    "fpga_model": {
+        "parent": "fpga",
+        "config": "XC7A15T-2FGG484C",
+        "key": "Device Model",
+        "arrt_index": 1,
+    },
+    "fpga_vendor": {
+        "parent": "fpga",
+        "config": "XILINX",
+        "key": "Vendor",
+        "arrt_index": 2,
+    },
+    "fpga_desc": {
+        "parent": "fpga",
+        "config": "NA",
+        "key": "Description",
+        "arrt_index": 3,
+    },
+    "fpga_hw_version": {
+        "parent": "fpga",
+        "config": "NA",
+        "key": "Hardware Version",
+        "arrt_index": 4,
+    },
+    "fpga_fw_version": {
+        "parent": "fpga",
+        "pci": {
+            "bus": 8,
+            "slot": 0,
+            "fn": 0,
+            "bar": 0,
+            "offset": 0
+        },
+        "key": "Firmware Version",
+        "arrt_index": 5,
+    },
+    "fpga_date": {
+        "parent": "fpga",
+        "pci": {
+            "bus": 8,
+            "slot": 0,
+            "fn": 0,
+            "bar": 0,
+            "offset": 4
+        },
+        "key": "Build Date",
+        "arrt_index": 6,
+    },
+    "asic": {
+        "key": "ASIC",
+    },
+    "sdk_model": {
+        "parent": "asic",
+        "cmd": "bcmcmd -t 1 att",
+        "pattern": r"^Attach",
+        "regular": r"(?<=\()[^)]*(?=\))",
+        "key": "Device Model",
+        "arrt_index": 1,
+    },
+    "sdk_version": {
+        "parent": "asic",
+        "cmd": "bcmcmd -t 1 version | grep Release",
+        "pattern": r".*Release",
+        "separator": ":",
+        "key": "SDK Version",
+        "arrt_index": 2,
+    },
+    "pci_version": {
+        "parent": "asic",
+        "cmd": "bcmcmd -t 1 \"pciephy fw version\" |grep \"PCIe FW version\"",
+        "pattern": r".*PCIe FW version",
+        "separator": ":",
+        "key": "PCIe Firmware Version",
+        "arrt_index": 3,
+    },
+}
+
+PMON_SYSLOG_STATUS = {
+    "polling_time": 3,
+    "sffs": {
+        "present": {"path": ["/sys/wb_plat/sff/*/present"], "ABSENT": 0},
+        "nochangedmsgflag": 0,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 1,
+        "alias": {
+            "sff1": "Ethernet1",
+            "sff2": "Ethernet2",
+            "sff3": "Ethernet3",
+            "sff4": "Ethernet4",
+            "sff5": "Ethernet5",
+            "sff6": "Ethernet6",
+            "sff7": "Ethernet7",
+            "sff8": "Ethernet8",
+            "sff9": "Ethernet9",
+            "sff10": "Ethernet10",
+            "sff11": "Ethernet11",
+            "sff12": "Ethernet12",
+            "sff13": "Ethernet13",
+            "sff14": "Ethernet14",
+            "sff15": "Ethernet15",
+            "sff16": "Ethernet16",
+            "sff17": "Ethernet17",
+            "sff18": "Ethernet18",
+            "sff19": "Ethernet19",
+            "sff20": "Ethernet20",
+            "sff21": "Ethernet21",
+            "sff22": "Ethernet22",
+            "sff23": "Ethernet23",
+            "sff24": "Ethernet24",
+            "sff25": "Ethernet25",
+            "sff26": "Ethernet26",
+            "sff27": "Ethernet27",
+            "sff28": "Ethernet28",
+            "sff29": "Ethernet29",
+            "sff30": "Ethernet30",
+            "sff31": "Ethernet31",
+            "sff32": "Ethernet32",
+        }
+    },
+    "fans": {
+        "present": {"path": ["/sys/wb_plat/fan/*/present"], "ABSENT": 0},
+        "status": [
+            {"path": "/sys/wb_plat/fan/%s/motor0/status", 'okval': 1},
+            {"path": "/sys/wb_plat/fan/%s/motor1/status", 'okval': 1},
+        ],
+        "nochangedmsgflag": 1,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 0,
+        "alias": {
+            "fan1": "FAN1",
+            "fan2": "FAN2",
+            "fan3": "FAN3",
+            "fan4": "FAN4",
+            "fan5": "FAN5"
+        }
+    },
+    "psus": {
+        "present": {"path": ["/sys/wb_plat/psu/*/present"], "ABSENT": 0},
+        "status": [
+            {"path": "/sys/wb_plat/psu/%s/output", "okval": 1},
+            {"path": "/sys/wb_plat/psu/%s/alert", "okval": 0},
+        ],
+        "nochangedmsgflag": 1,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 0,
+        "alias": {
+            "psu1": "PSU1",
+            "psu2": "PSU2"
+        }
+    }
+}
+
+##################### MAC Voltage adjust####################################
+MAC_DEFAULT_PARAM = [
+    {
+        "name": "mac_core",              # AVS name
+        "type": 0,                       # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range
+        "default": 0x7a,                 # default value, if rov value not in range
+        "sdkreg": "TOP_AVS_SEL_REG",     # SDK register name
+        "sdktype": 0,                    # 0: No shift operation required, 1: shift operation required
+        "macregloc": 24,                 # Shift right 24 bits
+        "mask": 0xff,                    # Use with macregloc
+        "rov_source": 1,                 # 0: get rov value from cpld, 1: get rov value from SDK
+        "cpld_avs": {"io_addr": 0x9c3, "gettype": "io"},
+        "set_avs": {
+            "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/avs0_vout",
+            "gettype": "sysfs", "formula": "int((%f)*1000000)"
+        },
+        "mac_avs_param": {
+            0x08: 0.888,
+            0x72: 0.900,
+            0x73: 0.894,
+            0x74: 0.888,
+            0x75: 0.882,
+            0x76: 0.875,
+            0x77: 0.869,
+            0x78: 0.863,
+            0x79: 0.857,
+            0x7a: 0.850,
+            0x7b: 0.844,
+            0x7c: 0.838,
+            0x7d: 0.832,
+            0x7e: 0.825,
+            0x7f: 0.819,
+            0x80: 0.813,
+            0x81: 0.807,
+            0x82: 0.800,
+            0x83: 0.794,
+            0x84: 0.788,
+            0x85: 0.782,
+            0x86: 0.775,
+            0x87: 0.769,
+            0x88: 0.763,
+            0x89: 0.757,
+            0x8A: 0.750
+        }
+    }
+]
+
+BLACKLIST_DRIVERS = [
+    {"name": "i2c_i801", "delay": 0},
+]
+
+DRIVERLISTS = [
+    {"name": "i2c_i801", "delay": 0},
+    {"name": "wb_gpio_d1500", "delay": 0},
+    {"name": "i2c_dev", "delay": 0},
+    {"name": "i2c_algo_bit", "delay": 0},
+    {"name": "i2c_gpio", "delay": 0},
+    {"name": "i2c_mux", "delay": 0},
+    {"name": "wb_gpio_device", "delay": 0},
+    {"name": "wb_i2c_gpio_device gpio_sda=17 gpio_scl=1 gpio_udelay=2", "delay": 0},
+    {"name": "platform_common dfd_my_type=0x404a", "delay": 0},
+    {"name": "wb_lpc_drv", "delay": 0},
+    {"name": "wb_lpc_drv_device", "delay": 0},
+    {"name": "wb_io_dev", "delay": 0},
+    {"name": "wb_io_dev_device", "delay": 0},
+    {"name": "wb_fpga_pcie", "delay": 0},
+    {"name": "wb_pcie_dev", "delay": 0},
+    {"name": "wb_pcie_dev_device", "delay": 0},
+    {"name": "wb_i2c_dev", "delay": 0},
+    {"name": "wb_i2c_ocores", "delay": 0},
+    {"name": "wb_i2c_ocores_device", "delay": 0},
+    {"name": "wb_i2c_mux_pca9641", "delay": 0},
+    {"name": "wb_i2c_mux_pca954x", "delay": 0},
+    {"name": "wb_i2c_mux_pca954x_device", "delay": 0},
+    {"name": "wb_i2c_dev_device", "delay": 0},
+    {"name": "lm75", "delay": 0},
+    {"name": "optoe", "delay": 0},
+    {"name": "at24", "delay": 0},
+    {"name": "wb_mac_bsc", "delay": 0},
+    {"name": "pmbus_core", "delay": 0},
+    {"name": "isl68137", "delay": 0},
+    {"name": "wb_csu550", "delay": 0},
+    {"name": "ina3221", "delay": 0},
+    {"name": "tps53679", "delay": 0},
+    {"name": "plat_dfd", "delay": 0},
+    {"name": "plat_switch", "delay": 0},
+    {"name": "plat_fan", "delay": 0},
+    {"name": "plat_psu", "delay": 0},
+    {"name": "plat_sff", "delay": 0},
+]
+
+DEVICE = [
+    {"name": "24c02", "bus": 1, "loc": 0x56},
+    {"name": "wb_mac_bsc_td3", "bus": 3, "loc": 0x44},
+    # fan
+    {"name": "24c02", "bus": 16, "loc": 0x50},
+    {"name": "24c02", "bus": 17, "loc": 0x50},
+    {"name": "24c02", "bus": 18, "loc": 0x50},
+    {"name": "24c02", "bus": 19, "loc": 0x50},
+    {"name": "24c02", "bus": 20, "loc": 0x50},
+    # psu
+    {"name": "24c02", "bus": 24, "loc": 0x50},
+    {"name": "wb_dps550", "bus": 24, "loc": 0x58},
+    {"name": "24c02", "bus": 25, "loc": 0x50},
+    {"name": "wb_dps550", "bus": 25, "loc": 0x58},
+    # temp
+    {"name": "lm75", "bus": 3, "loc": 0x48},
+    {"name": "lm75", "bus": 3, "loc": 0x49},
+    {"name": "lm75", "bus": 3, "loc": 0x4a},
+    {"name": "lm75", "bus": 3, "loc": 0x4b},
+    {"name": "lm75", "bus": 3, "loc": 0x4c},
+    # dcdc
+    {"name": "ina3221", "bus": 7, "loc": 0x40},
+    {"name": "ina3221", "bus": 7, "loc": 0x41},
+    {"name": "ina3221", "bus": 7, "loc": 0x42},
+    {"name": "ina3221", "bus": 7, "loc": 0x43},
+    {"name": "tps53688", "bus": 7, "loc": 0x60},
+    {"name": "tps53688", "bus": 7, "loc": 0x6c},
+    {"name": "isl68137", "bus": 7, "loc": 0x64},
+]
+
+OPTOE = [
+    {"name": "optoe1", "startbus": 32, "endbus": 63},
+]
+
+DEV_MONITOR_PARAM = {
+    "polling_time": 10,
+    "psus": [
+        {
+            "name": "psu1",
+            "present": {"gettype": "io", "io_addr": 0x951, "presentbit": 0, "okval": 0},
+            "device": [
+                {"id": "psu1pmbus", "name": "wb_dps550", "bus": 24, "loc": 0x58, "attr": "hwmon"},
+                {"id": "psu1frue2", "name": "24c02", "bus": 24, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "psu2",
+            "present": {"gettype": "io", "io_addr": 0x951, "presentbit": 4, "okval": 0},
+            "device": [
+                {"id": "psu2pmbus", "name": "wb_dps550", "bus": 25, "loc": 0x58, "attr": "hwmon"},
+                {"id": "psu2frue2", "name": "24c02", "bus": 25, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+    ],
+    "fans": [
+        {
+            "name": "fan1",
+            "present": {"gettype": "i2c", "bus": 2, "loc": 0x0d, "offset": 0x30, "presentbit": 0, "okval": 0},
+            "device": [
+                {"id": "fan1frue2", "name": "24c02", "bus": 16, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan2",
+            "present": {"gettype": "i2c", "bus": 2, "loc": 0x0d, "offset": 0x30, "presentbit": 1, "okval": 0},
+            "device": [
+                {"id": "fan2frue2", "name": "24c02", "bus": 17, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan3",
+            "present": {"gettype": "i2c", "bus": 2, "loc": 0x0d, "offset": 0x30, "presentbit": 2, "okval": 0},
+            "device": [
+                {"id": "fan3frue2", "name": "24c02", "bus": 18, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan4",
+            "present": {"gettype": "i2c", "bus": 2, "loc": 0x0d, "offset": 0x30, "presentbit": 3, "okval": 0},
+            "device": [
+                {"id": "fan4frue2", "name": "24c02", "bus": 19, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan5",
+            "present": {"gettype": "i2c", "bus": 2, "loc": 0x0d, "offset": 0x30, "presentbit": 4, "okval": 0},
+            "device": [
+                {"id": "fan5frue2", "name": "24c02", "bus": 20, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+    ],
+    "others": [
+        {
+            "name": "eeprom",
+            "device": [
+                {"id": "eeprom_1", "name": "24c02", "bus": 1, "loc": 0x56, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "lm75",
+            "device": [
+                {"id": "lm75_1", "name": "lm75", "bus": 3, "loc": 0x48, "attr": "hwmon"},
+                {"id": "lm75_2", "name": "lm75", "bus": 3, "loc": 0x49, "attr": "hwmon"},
+                {"id": "lm75_3", "name": "lm75", "bus": 3, "loc": 0x4a, "attr": "hwmon"},
+                {"id": "lm75_4", "name": "lm75", "bus": 3, "loc": 0x4b, "attr": "hwmon"},
+                {"id": "lm75_5", "name": "lm75", "bus": 3, "loc": 0x4c, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "mac_bsc",
+            "device": [
+                {"id": "mac_bsc_1", "name": "wb_mac_bsc_td3", "bus": 3, "loc": 0x44, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "ina3221",
+            "device": [
+                {"id": "ina3221_1", "name": "ina3221", "bus": 7, "loc": 0x40, "attr": "hwmon"},
+                {"id": "ina3221_2", "name": "ina3221", "bus": 7, "loc": 0x41, "attr": "hwmon"},
+                {"id": "ina3221_3", "name": "ina3221", "bus": 7, "loc": 0x42, "attr": "hwmon"},
+                {"id": "ina3221_4", "name": "ina3221", "bus": 7, "loc": 0x43, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "tps53622",
+            "device": [
+                {"id": "tps53622_1", "name": "tps53688", "bus": 7, "loc": 0x60, "attr": "hwmon"},
+                {"id": "tps53622_2", "name": "tps53688", "bus": 7, "loc": 0x6c, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "isl68137",
+            "device": [
+                {"id": "isl68137_1", "name": "isl68137", "bus": 7, "loc": 0x64, "attr": "hwmon"},
+            ],
+        }
+    ],
+}
+
+# INIT_PARAM_PRE = [
+#     {"loc": "7-0064/hwmon/hwmon*/avs0_vout_max", "value": "900000"},
+#     {"loc": "7-0064/hwmon/hwmon*/avs0_vout_min", "value": "750000"},
+# ]
+INIT_COMMAND_PRE = [
+    "dfd_debug io_wr 0x994 0x01", # SFF_PWR_EN
+]
+
+INIT_PARAM = []
+
+INIT_COMMAND = []
+
+REBOOT_CAUSE_PARA = {
+    "reboot_cause_list": [
+        {
+            "name": "cold_reboot",
+            "monitor_point": {"gettype": "i2c", "bus": 8, "loc": 0x30, "offset": 0x42, "okval": 0x0},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Power Loss, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Power Loss, ",
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+            ]
+        },
+        {
+            "name": "otp_switch_reboot",
+            "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ",
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+            ],
+            "finish_operation": [
+                {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"},
+            ]
+        },
+        {
+            "name": "otp_other_reboot",
+            "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ",
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+            ],
+            "finish_operation": [
+                {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"},
+            ]
+        },
+    ],
+    "other_reboot_cause_record": [
+        {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+        {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+    ],
+}
+
+UPGRADE_SUMMARY = {
+    "devtype": 0x404b,
+
+    "slot0": {
+        "subtype": 0,
+        "VME": {
+            "chain1": {
+                "name": "VME_CPLD",
+                "is_support_warm_upg": 0,
+            },
+        },
+
+        "SPI-LOGIC-DEV": {
+            "chain3": {
+                "name": "FPGA",
+                "is_support_warm_upg": 0,
+            },
+        },
+
+        "MTD": {
+            "chain2": {
+                "name": "BIOS",
+                "is_support_warm_upg": 0,
+                "filesizecheck": 10240,  # bios check file size, Unit: K
+                "init_cmd": [
+                    {"io_addr": 0x722, "value": 0x02, "gettype": "io"},
+                    {"cmd": "modprobe mtd", "gettype": "cmd"},
+                    {"cmd": "modprobe spi_nor", "gettype": "cmd"},
+                    {"cmd": "modprobe ofpart", "gettype": "cmd"},
+                    {"cmd": "modprobe intel_spi writeable=1", "gettype": "cmd"},
+                    {"cmd": "modprobe intel_spi_platform writeable=1", "gettype": "cmd"},
+                ],
+                "finish_cmd": [
+                    {"cmd": "rmmod intel_spi_platform", "gettype": "cmd"},
+                    {"cmd": "rmmod intel_spi", "gettype": "cmd"},
+                    {"cmd": "rmmod ofpart", "gettype": "cmd"},
+                    {"cmd": "rmmod spi_nor", "gettype": "cmd"},
+                    {"cmd": "rmmod mtd", "gettype": "cmd"},
+                ],
+            },
+        },
+
+        "TEST": {
+            "cpld": [
+                {"chain": 1, "file": "/etc/.upgrade_test/cpld_test_header.vme", "display_name": "CPLD"},
+            ],
+            "fpga": [
+                {
+                    "chain": 3,
+                    "file": "/etc/.upgrade_test/fpga_test_header.bin",
+                    "display_name": "FPGA",
+                },
+            ],
+        },
+    },
+
+    "BMC": {
+        "name": "BMC",
+        "init_cmd": [
+            # stop BMC stack watchdog
+            {"cmd": "ipmitool raw 0x32 0x03 0x02", "gettype": "cmd", "ignore_result": 1},
+        ],
+        "finish_cmd": [],
+    },
+}
+
+
+PLATFORM_E2_CONF = {
+    "fan": [
+        {"name": "fan1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/16-0050/eeprom"},
+        {"name": "fan2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/17-0050/eeprom"},
+        {"name": "fan3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/18-0050/eeprom"},
+        {"name": "fan4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/19-0050/eeprom"},
+        {"name": "fan5", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/20-0050/eeprom"},
+    ],
+    "psu": [
+        {"name": "psu1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/24-0050/eeprom"},
+        {"name": "psu2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/25-0050/eeprom"},
+    ],
+    "syseeprom": [
+        {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/1-0056/eeprom"},
+    ],
+}
+
+AIR_FLOW_CONF = {
+    "psu_fan_airflow": {
+        "intake": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3'],
+        "exhaust": ['CSU550AP-3-501', 'DPS-550AB-40 A', 'GW-CRPS550N2RC']
+    },
+
+    "fanairflow": {
+        "intake": ['M1HFAN III-F'],
+        "exhaust": ['M1HFAN III-R']
+    },
+
+    "fans": [
+        {
+            "name": "FAN1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/16-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+        {
+            "name": "FAN2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/17-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+        {
+            "name": "FAN3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/18-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+        {
+            "name": "FAN4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/19-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+        {
+            "name": "FAN5", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/20-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+    ],
+
+    "psus": [
+        {
+            "name": "PSU1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/24-0050/eeprom",
+            "area": "productInfoArea", "field": "productPartModelName", "decode": "psu_fan_airflow"
+        },
+        {
+            "name": "PSU2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/25-0050/eeprom",
+            "area": "productInfoArea", "field": "productPartModelName", "decode": "psu_fan_airflow"
+        }
+    ]
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/config/x86_64_micas_m2_w6510_32c_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/config/x86_64_micas_m2_w6510_32c_r0_port_config.py
new file mode 100755
index 000000000000..e22b791e992a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/config/x86_64_micas_m2_w6510_32c_r0_port_config.py
@@ -0,0 +1,7 @@
+#!/usr/bin/python3
+# -*- coding: UTF-8 -*-
+
+PLATFORM_INTF_OPTOE = {
+    "port_num": 32,
+    "optoe_start_bus": 32,
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/hal-config/x86_64_micas_m2_w6510_32c_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/hal-config/x86_64_micas_m2_w6510_32c_r0_device.py
new file mode 100755
index 000000000000..ff5d1e71ab55
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/hal-config/x86_64_micas_m2_w6510_32c_r0_device.py
@@ -0,0 +1,1263 @@
+#!/usr/bin/python3
+
+
+psu_fan_airflow = {
+    "intake": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3'],
+    "exhaust": ['CSU550AP-3-501', 'DPS-550AB-40 A', 'GW-CRPS550N2RC']
+}
+
+fanairflow = {
+    "intake": ['M1HFAN III-F'],
+    "exhaust": ['M1HFAN III-R'],
+}
+
+psu_display_name = {
+    "PA550II-F": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3'],
+    "PA550II-R": ['CSU550AP-3-501', 'DPS-550AB-40 A', 'GW-CRPS550N2RC']
+}
+
+psutypedecode = {
+    0x00: 'N/A',
+    0x01: 'AC',
+    0x02: 'DC',
+}
+
+
+class Unit:
+    Temperature = "C"
+    Voltage = "V"
+    Current = "A"
+    Power = "W"
+    Speed = "RPM"
+
+
+class threshold:
+    PSU_TEMP_MIN = -20 * 1000
+    PSU_TEMP_MAX = 60 * 1000
+
+    PSU_FAN_SPEED_MIN = 2000
+    PSU_FAN_SPEED_MAX = 18000
+
+    PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000
+    PSU_OUTPUT_VOLTAGE_MAX = 14 * 1000
+
+    PSU_AC_INPUT_VOLTAGE_MIN = 200 * 1000
+    PSU_AC_INPUT_VOLTAGE_MAX = 240 * 1000
+
+    PSU_DC_INPUT_VOLTAGE_MIN = 190 * 1000
+    PSU_DC_INPUT_VOLTAGE_MAX = 290 * 1000
+
+    ERR_VALUE = -9999999
+
+    PSU_OUTPUT_POWER_MIN = 10 * 1000 * 1000
+    PSU_OUTPUT_POWER_MAX = 560 * 1000 * 1000
+
+    PSU_INPUT_POWER_MIN = 10 * 1000 * 1000
+    PSU_INPUT_POWER_MAX = 625 * 1000 * 1000
+
+    PSU_OUTPUT_CURRENT_MIN = 1 * 1000
+    PSU_OUTPUT_CURRENT_MAX = 45 * 1000
+
+    PSU_INPUT_CURRENT_MIN = 0 * 1000
+    PSU_INPUT_CURRENT_MAX = 7 * 1000
+
+    FRONT_FAN_SPEED_MAX = 24000
+    REAR_FAN_SPEED_MAX = 22500
+    FAN_SPEED_MIN = 5000
+
+
+class Description:
+    CPLD = "Used for managing IO modules, SFP+ modules and system LEDs"
+    BIOS = "Performs initialization of hardware components during booting"
+    FPGA = "Platform management controller for on-board temperature monitoring, in-chassis power"
+
+
+devices = {
+    "onie_e2": [
+        {
+            "name": "ONIE_E2",
+            "e2loc": {"loc": "/sys/bus/i2c/devices/1-0056/eeprom", "way": "sysfs"},
+            "airflow": "intake"
+        },
+    ],
+    "psus": [
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/24-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 24, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU1",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": threshold.PSU_TEMP_MIN,
+                "Max": threshold.PSU_TEMP_MAX,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": threshold.PSU_FAN_SPEED_MIN,
+                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 24, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.ERR_VALUE,
+                    "Max": threshold.ERR_VALUE,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_CURRENT_MIN,
+                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_POWER_MIN,
+                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_POWER_MIN,
+                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        },
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/25-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 25, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU2",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": threshold.PSU_TEMP_MIN,
+                "Max": threshold.PSU_TEMP_MAX,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": threshold.PSU_FAN_SPEED_MIN,
+                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 25, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.ERR_VALUE,
+                    "Max": threshold.ERR_VALUE,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_CURRENT_MIN,
+                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_POWER_MIN,
+                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_POWER_MIN,
+                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        }
+    ],
+    "temps": [
+        {
+            "name": "SWITCH_TEMP",
+            "temp_id": "TEMP1",
+            "api_name": "ASIC_TEMP",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp99_input", "way": "sysfs"},
+                "Min": 2000,
+                "Low": 10000,
+                "High": 100000,
+                "Max": 105000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "CPU_TEMP",
+            "temp_id": "TEMP2",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": 2000,
+                "Low": 10000,
+                "High": 100000,
+                "Max": 104000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "INLET_TEMP",
+            "temp_id": "TEMP3",
+            "Temperature": {
+                "value": [
+                    {"loc": "/sys/bus/i2c/devices/3-004b/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                    {"loc": "/sys/bus/i2c/devices/3-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                ],
+                "Min": -10000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "fix_value": {
+                "fix_type": "config",
+                "addend": -3,
+            }
+        },
+        {
+            "name": "OUTLET_TEMP",
+            "temp_id": "TEMP4",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-004c/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 75000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "BOARD_TEMP",
+            "temp_id": "TEMP5",
+            "api_name": "MAC_OUT_TEMP",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-004a/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 75000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "MAC_IN_TEMP",
+            "temp_id": "TEMP6",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 75000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU1_TEMP",
+            "temp_id": "TEMP7",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -20000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU2_TEMP",
+            "temp_id": "TEMP8",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -20000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "SFF_TEMP",
+            "Temperature": {
+                "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 90000,
+                "Max": 100000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "invalid": -10000,
+            "error": -9999,
+        }
+    ],
+    "leds": [
+        {
+            "name": "FRONT_SYS_LED",
+            "led_type": "SYS_LED",
+            "led": {"loc": "/dev/cpld1", "offset": 0x72, "len": 1, "way": "devfile"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+        },
+        {
+            "name": "FRONT_PSU_LED",
+            "led_type": "PSU_LED",
+            "led": {"loc": "/dev/cpld1", "offset": 0x73, "len": 1, "way": "devfile"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+        },
+        {
+            "name": "FRONT_FAN_LED",
+            "led_type": "FAN_LED",
+            "led": {"loc": "/dev/cpld1", "offset": 0x74, "len": 1, "way": "devfile"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+        },
+    ],
+    "fans": [
+        {
+            "name": "FAN1",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-16/16-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3b, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x14, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x14, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN2",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-17/17-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3c, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x15, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x15, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN3",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-18/18-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3d, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x16, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan3/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x16, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan3/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN4",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-19/19-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3e, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x17, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan4/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x17, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan4/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN5",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-20/20-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan5/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3f, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x18, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan5/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x18, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan5/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+    ],
+    "cplds": [
+        {
+            "name": "CPU_CPLD",
+            "cpld_id": "CPLD1",
+            "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for system power",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "CONNECT_CPLD",
+            "cpld_id": "CPLD2",
+            "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "CONNECT_CPLD-FAN",
+            "cpld_id": "CPLD3",
+            "VersionFile": {"loc": "/dev/cpld2", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for fan modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "MAC_CPLD1",
+            "cpld_id": "CPLD4",
+            "VersionFile": {"loc": "/dev/cpld3", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "MAC_CPLD2",
+            "cpld_id": "CPLD5",
+            "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "FPGA",
+            "cpld_id": "CPLD6",
+            "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "format": "little_endian",
+            "warm": 0,
+        },
+        {
+            "name": "BIOS",
+            "cpld_id": "CPLD7",
+            "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"},
+            "desc": "Performs initialization of hardware components during booting",
+            "slot": 0,
+            "type": "str",
+            "warm": 0,
+        }
+    ],
+    "dcdc": [
+        {
+            "name": "Switch_1v2_V",
+            "dcdc_id": "DCDC1",
+            "Min": 960,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1440,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_5v0_V",
+            "dcdc_id": "DCDC2",
+            "Min": 4000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 6000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_Cpld_3v3_V",
+            "dcdc_id": "DCDC3",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_5v0_C",
+            "dcdc_id": "DCDC4",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 1000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_Cpld_3v3_C",
+            "dcdc_id": "DCDC5",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_1v2_C",
+            "dcdc_id": "DCDC6",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 3200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_QSFP2_3v3_V",
+            "dcdc_id": "DCDC7",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_QSFP1_3v3_V",
+            "dcdc_id": "DCDC8",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_3v3_V",
+            "dcdc_id": "DCDC9",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_QSFP2_3v3_C",
+            "dcdc_id": "DCDC10",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 25000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_3v3_C",
+            "dcdc_id": "DCDC11",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 1000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_QSFP1_3v3_C",
+            "dcdc_id": "DCDC12",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 25000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_3v3_V",
+            "dcdc_id": "DCDC13",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_SSD_3v3_V",
+            "dcdc_id": "DCDC14",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_1v2_V",
+            "dcdc_id": "DCDC15",
+            "Min": 960,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1440,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_SSD_3v3_C",
+            "dcdc_id": "DCDC16",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 4500,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_3v3_C",
+            "dcdc_id": "DCDC17",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2800,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_1v2_C",
+            "dcdc_id": "DCDC18",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 1300,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_5v_V",
+            "dcdc_id": "DCDC19",
+            "Min": 4000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 6000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_3v3_V",
+            "dcdc_id": "DCDC20",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v7_V",
+            "dcdc_id": "DCDC21",
+            "Min": 1360,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 2040,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v7_C",
+            "dcdc_id": "DCDC22",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_5v_C",
+            "dcdc_id": "DCDC23",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_3v3_C",
+            "dcdc_id": "DCDC24",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 4686,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v05_V",
+            "dcdc_id": "DCDC25",
+            "Min": 840,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1260,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_CORE_V",
+            "dcdc_id": "DCDC26",
+            "Min": 1456,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 2184,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v05_C",
+            "dcdc_id": "DCDC27",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 15400,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_CORE_C",
+            "dcdc_id": "DCDC28",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 47300,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_CORE_V",
+            "dcdc_id": "DCDC29",
+            "Min": 600,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_ANALOG_V",
+            "dcdc_id": "DCDC30",
+            "Min": 640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_CORE_C",
+            "dcdc_id": "DCDC31",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 240000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_ANALOG_C",
+            "dcdc_id": "DCDC32",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 26000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v2_V",
+            "dcdc_id": "DCDC33",
+            "Min": 960,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1440,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_2v23_V",
+            "dcdc_id": "DCDC34",
+            "Min": 1784,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 2676,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v2_C",
+            "dcdc_id": "DCDC35",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 9900,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_2v23_C",
+            "dcdc_id": "DCDC36",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2200,
+            "format": "float(float(%s)/1000)",
+        },
+    ],
+    "cpu": [
+        {
+            "name": "cpu",
+            "CpuResetCntReg": {"bus": 8, "addr": 0x30, "offset": 0x42, "way": "i2c"},
+            "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"
+        }
+    ],
+    "sfps": {
+        "ver": '1.0',
+        "port_index_start": 0,
+        "port_num": 32,
+        "log_level": 2,
+        "eeprom_retry_times": 5,
+        "eeprom_retry_break_sec": 0.2,
+        "presence_cpld": {
+            "dev_id": {
+                3: {
+                    "offset": {
+                        0x10: "1-8",
+                        0x11: "9-16",
+                    },
+                },
+                4: {
+                    "offset": {
+                        0x10: "17-24",
+                        0x11: "25-32",
+                    },
+                },
+            },
+        },
+        "presence_val_is_present": 0,
+        "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom",
+        "eeprom_path_key": list(range(32, 64)),
+        "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class",
+        "optoe_driver_key": list(range(32, 64)),
+        "reset_cpld": {
+            "dev_id": {
+                3: {
+                    "offset": {
+                        0x14: "1-8",
+                        0x15: "9-16",
+                    },
+                },
+                4: {
+                    "offset": {
+                        0x14: "17-24",
+                        0x15: "25-32",
+                    },
+                },
+            },
+        },
+        "reset_val_is_reset": 0,
+    }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/hal-config/x86_64_micas_m2_w6510_32c_r0_exhaust_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/hal-config/x86_64_micas_m2_w6510_32c_r0_exhaust_device.py
new file mode 100755
index 000000000000..be76d2e30953
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/hal-config/x86_64_micas_m2_w6510_32c_r0_exhaust_device.py
@@ -0,0 +1,1263 @@
+#!/usr/bin/python3
+
+
+psu_fan_airflow = {
+    "intake": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3'],
+    "exhaust": ['CSU550AP-3-501', 'DPS-550AB-40 A', 'GW-CRPS550N2RC']
+}
+
+fanairflow = {
+    "intake": ['M1HFAN III-F'],
+    "exhaust": ['M1HFAN III-R'],
+}
+
+psu_display_name = {
+    "PA550II-F": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3'],
+    "PA550II-R": ['CSU550AP-3-501', 'DPS-550AB-40 A', 'GW-CRPS550N2RC']
+}
+
+psutypedecode = {
+    0x00: 'N/A',
+    0x01: 'AC',
+    0x02: 'DC',
+}
+
+
+class Unit:
+    Temperature = "C"
+    Voltage = "V"
+    Current = "A"
+    Power = "W"
+    Speed = "RPM"
+
+
+class threshold:
+    PSU_TEMP_MIN = -20 * 1000
+    PSU_TEMP_MAX = 60 * 1000
+
+    PSU_FAN_SPEED_MIN = 2000
+    PSU_FAN_SPEED_MAX = 18000
+
+    PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000
+    PSU_OUTPUT_VOLTAGE_MAX = 14 * 1000
+
+    PSU_AC_INPUT_VOLTAGE_MIN = 200 * 1000
+    PSU_AC_INPUT_VOLTAGE_MAX = 240 * 1000
+
+    PSU_DC_INPUT_VOLTAGE_MIN = 190 * 1000
+    PSU_DC_INPUT_VOLTAGE_MAX = 290 * 1000
+
+    ERR_VALUE = -9999999
+
+    PSU_OUTPUT_POWER_MIN = 10 * 1000 * 1000
+    PSU_OUTPUT_POWER_MAX = 560 * 1000 * 1000
+
+    PSU_INPUT_POWER_MIN = 10 * 1000 * 1000
+    PSU_INPUT_POWER_MAX = 625 * 1000 * 1000
+
+    PSU_OUTPUT_CURRENT_MIN = 1 * 1000
+    PSU_OUTPUT_CURRENT_MAX = 45 * 1000
+
+    PSU_INPUT_CURRENT_MIN = 0 * 1000
+    PSU_INPUT_CURRENT_MAX = 7 * 1000
+
+    FRONT_FAN_SPEED_MAX = 24000
+    REAR_FAN_SPEED_MAX = 22500
+    FAN_SPEED_MIN = 5000
+
+
+class Description:
+    CPLD = "Used for managing IO modules, SFP+ modules and system LEDs"
+    BIOS = "Performs initialization of hardware components during booting"
+    FPGA = "Platform management controller for on-board temperature monitoring, in-chassis power"
+
+
+devices = {
+    "onie_e2": [
+        {
+            "name": "ONIE_E2",
+            "e2loc": {"loc": "/sys/bus/i2c/devices/1-0056/eeprom", "way": "sysfs"},
+            "airflow": "exhaust"
+        },
+    ],
+    "psus": [
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/24-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 24, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU1",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": threshold.PSU_TEMP_MIN,
+                "Max": threshold.PSU_TEMP_MAX,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": threshold.PSU_FAN_SPEED_MIN,
+                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 24, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.ERR_VALUE,
+                    "Max": threshold.ERR_VALUE,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_CURRENT_MIN,
+                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_POWER_MIN,
+                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_POWER_MIN,
+                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        },
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/25-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 25, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU2",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": threshold.PSU_TEMP_MIN,
+                "Max": threshold.PSU_TEMP_MAX,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": threshold.PSU_FAN_SPEED_MIN,
+                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 25, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.ERR_VALUE,
+                    "Max": threshold.ERR_VALUE,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_CURRENT_MIN,
+                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_POWER_MIN,
+                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_POWER_MIN,
+                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        }
+    ],
+    "temps": [
+        {
+            "name": "SWITCH_TEMP",
+            "temp_id": "TEMP1",
+            "api_name": "ASIC_TEMP",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp99_input", "way": "sysfs"},
+                "Min": 2000,
+                "Low": 10000,
+                "High": 100000,
+                "Max": 105000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "CPU_TEMP",
+            "temp_id": "TEMP2",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": 2000,
+                "Low": 10000,
+                "High": 100000,
+                "Max": 104000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "INLET_TEMP",
+            "temp_id": "TEMP3",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-004c/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "fix_value": {
+                "fix_type": "config",
+                "addend": -3,
+            }
+        },
+        {
+            "name": "OUTLET_TEMP",
+            "temp_id": "TEMP4",
+            "Temperature": {
+                "value": [
+                    {"loc": "/sys/bus/i2c/devices/3-004b/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                    {"loc": "/sys/bus/i2c/devices/3-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                ],
+                "Min": -10000,
+                "Low": 0,
+                "High": 75000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "BOARD_TEMP",
+            "temp_id": "TEMP5",
+            "api_name": "MAC_OUT_TEMP",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 75000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "MAC_IN_TEMP",
+            "temp_id": "TEMP6",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-004a/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 75000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU1_TEMP",
+            "temp_id": "TEMP7",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -20000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU2_TEMP",
+            "temp_id": "TEMP8",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -20000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "SFF_TEMP",
+            "Temperature": {
+                "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 90000,
+                "Max": 100000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "invalid": -10000,
+            "error": -9999,
+        }
+    ],
+    "leds": [
+        {
+            "name": "FRONT_SYS_LED",
+            "led_type": "SYS_LED",
+            "led": {"loc": "/dev/cpld1", "offset": 0x72, "len": 1, "way": "devfile"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+        },
+        {
+            "name": "FRONT_PSU_LED",
+            "led_type": "PSU_LED",
+            "led": {"loc": "/dev/cpld1", "offset": 0x73, "len": 1, "way": "devfile"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+        },
+        {
+            "name": "FRONT_FAN_LED",
+            "led_type": "FAN_LED",
+            "led": {"loc": "/dev/cpld1", "offset": 0x74, "len": 1, "way": "devfile"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+        },
+    ],
+    "fans": [
+        {
+            "name": "FAN1",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-16/16-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3b, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x14, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x14, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN2",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-17/17-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3c, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x15, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x15, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN3",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-18/18-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3d, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x16, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan3/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x16, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan3/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN4",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-19/19-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3e, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x17, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan4/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x17, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan4/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN5",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-20/20-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan5/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3f, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x18, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan5/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x18, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan5/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+    ],
+    "cplds": [
+        {
+            "name": "CPU_CPLD",
+            "cpld_id": "CPLD1",
+            "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for system power",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "CONNECT_CPLD",
+            "cpld_id": "CPLD2",
+            "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "CONNECT_CPLD-FAN",
+            "cpld_id": "CPLD3",
+            "VersionFile": {"loc": "/dev/cpld2", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for fan modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "MAC_CPLD1",
+            "cpld_id": "CPLD4",
+            "VersionFile": {"loc": "/dev/cpld3", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "MAC_CPLD2",
+            "cpld_id": "CPLD5",
+            "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "FPGA",
+            "cpld_id": "CPLD6",
+            "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "format": "little_endian",
+            "warm": 0,
+        },
+        {
+            "name": "BIOS",
+            "cpld_id": "CPLD7",
+            "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"},
+            "desc": "Performs initialization of hardware components during booting",
+            "slot": 0,
+            "type": "str",
+            "warm": 0,
+        }
+    ],
+    "dcdc": [
+        {
+            "name": "Switch_1v2_V",
+            "dcdc_id": "DCDC1",
+            "Min": 960,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1440,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_5v0_V",
+            "dcdc_id": "DCDC2",
+            "Min": 4000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 6000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_Cpld_3v3_V",
+            "dcdc_id": "DCDC3",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_5v0_C",
+            "dcdc_id": "DCDC4",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 1000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_Cpld_3v3_C",
+            "dcdc_id": "DCDC5",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_1v2_C",
+            "dcdc_id": "DCDC6",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 3200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_QSFP2_3v3_V",
+            "dcdc_id": "DCDC7",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_QSFP1_3v3_V",
+            "dcdc_id": "DCDC8",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_3v3_V",
+            "dcdc_id": "DCDC9",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_QSFP2_3v3_C",
+            "dcdc_id": "DCDC10",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 25000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_3v3_C",
+            "dcdc_id": "DCDC11",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 1000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_QSFP1_3v3_C",
+            "dcdc_id": "DCDC12",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 25000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_3v3_V",
+            "dcdc_id": "DCDC13",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_SSD_3v3_V",
+            "dcdc_id": "DCDC14",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_1v2_V",
+            "dcdc_id": "DCDC15",
+            "Min": 960,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1440,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_SSD_3v3_C",
+            "dcdc_id": "DCDC16",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 4500,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_3v3_C",
+            "dcdc_id": "DCDC17",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2800,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_1v2_C",
+            "dcdc_id": "DCDC18",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 1300,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_5v_V",
+            "dcdc_id": "DCDC19",
+            "Min": 4000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 6000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_3v3_V",
+            "dcdc_id": "DCDC20",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v7_V",
+            "dcdc_id": "DCDC21",
+            "Min": 1360,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 2040,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v7_C",
+            "dcdc_id": "DCDC22",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_5v_C",
+            "dcdc_id": "DCDC23",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_3v3_C",
+            "dcdc_id": "DCDC24",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 4686,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v05_V",
+            "dcdc_id": "DCDC25",
+            "Min": 840,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1260,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_CORE_V",
+            "dcdc_id": "DCDC26",
+            "Min": 1456,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 2184,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v05_C",
+            "dcdc_id": "DCDC27",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 15400,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_CORE_C",
+            "dcdc_id": "DCDC28",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 47300,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_CORE_V",
+            "dcdc_id": "DCDC29",
+            "Min": 600,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_ANALOG_V",
+            "dcdc_id": "DCDC30",
+            "Min": 640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_CORE_C",
+            "dcdc_id": "DCDC31",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 240000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_ANALOG_C",
+            "dcdc_id": "DCDC32",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 26000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v2_V",
+            "dcdc_id": "DCDC33",
+            "Min": 960,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1440,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_2v23_V",
+            "dcdc_id": "DCDC34",
+            "Min": 1784,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 2676,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v2_C",
+            "dcdc_id": "DCDC35",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 9900,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_2v23_C",
+            "dcdc_id": "DCDC36",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2200,
+            "format": "float(float(%s)/1000)",
+        },
+    ],
+    "cpu": [
+        {
+            "name": "cpu",
+            "CpuResetCntReg": {"bus": 8, "addr": 0x30, "offset": 0x42, "way": "i2c"},
+            "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"
+        }
+    ],
+    "sfps": {
+        "ver": '1.0',
+        "port_index_start": 0,
+        "port_num": 32,
+        "log_level": 2,
+        "eeprom_retry_times": 5,
+        "eeprom_retry_break_sec": 0.2,
+        "presence_cpld": {
+            "dev_id": {
+                3: {
+                    "offset": {
+                        0x10: "1-8",
+                        0x11: "9-16",
+                    },
+                },
+                4: {
+                    "offset": {
+                        0x10: "17-24",
+                        0x11: "25-32",
+                    },
+                },
+            },
+        },
+        "presence_val_is_present": 0,
+        "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom",
+        "eeprom_path_key": list(range(32, 64)),
+        "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class",
+        "optoe_driver_key": list(range(32, 64)),
+        "reset_cpld": {
+            "dev_id": {
+                3: {
+                    "offset": {
+                        0x14: "1-8",
+                        0x15: "9-16",
+                    },
+                },
+                4: {
+                    "offset": {
+                        0x14: "17-24",
+                        0x15: "25-32",
+                    },
+                },
+            },
+        },
+        "reset_val_is_reset": 0,
+    }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/hal-config/x86_64_micas_m2_w6510_32c_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/hal-config/x86_64_micas_m2_w6510_32c_r0_monitor.py
new file mode 100755
index 000000000000..1fe73fc31ef8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/hal-config/x86_64_micas_m2_w6510_32c_r0_monitor.py
@@ -0,0 +1,153 @@
+# coding:utf-8
+
+
+monitor = {
+    "openloop": {
+        "linear": {
+            "name": "linear",
+            "flag": 0,
+            "pwm_min": 0x40,
+            "pwm_max": 0xff,
+            "K": 11,
+            "tin_min": 38,
+        },
+        "curve": {
+            "name": "curve",
+            "flag": 1,
+            "pwm_min": 0x40,
+            "pwm_max": 0xff,
+            "a": 0.183,
+            "b": -6.88,
+            "c": 120,
+            "tin_min": 23,
+        },
+    },
+
+    "pid": {
+        "CPU_TEMP": {
+            "name": "CPU_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x40,
+            "pwm_max": 0xff,
+            "Kp": 1.5,
+            "Ki": 1,
+            "Kd": 0.3,
+            "target": 90,
+            "value": [None, None, None],
+        },
+        "SWITCH_TEMP": {
+            "name": "SWITCH_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x40,
+            "pwm_max": 0xff,
+            "Kp": 1.5,
+            "Ki": 1,
+            "Kd": 0.3,
+            "target": 90,
+            "value": [None, None, None],
+        },
+        "OUTLET_TEMP": {
+            "name": "OUTLET_TEMP",
+            "flag": 0,
+            "type": "duty",
+            "pwm_min": 0x40,
+            "pwm_max": 0xff,
+            "Kp": 2,
+            "Ki": 0.4,
+            "Kd": 0.3,
+            "target": 65,
+            "value": [None, None, None],
+        },
+        "BOARD_TEMP": {
+            "name": "BOARD_TEMP",
+            "flag": 0,
+            "type": "duty",
+            "pwm_min": 0x40,
+            "pwm_max": 0xff,
+            "Kp": 2,
+            "Ki": 0.4,
+            "Kd": 0.3,
+            "target": 65,
+            "value": [None, None, None],
+        },
+        "SFF_TEMP": {
+            "name": "SFF_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x40,
+            "pwm_max": 0xff,
+            "Kp": 2,
+            "Ki": 0.5,
+            "Kd": 0.3,
+            "target": 62,
+            "value": [None, None, None],
+        },
+    },
+
+    "temps_threshold": {
+        "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 105},
+        "INLET_TEMP": {"name": "INLET_TEMP", "warning": 50, "critical": 60},
+        "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 85, "critical": 90},
+        "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 85, "critical": 90},
+        "CPU_TEMP": {"name": "CPU_TEMP", "warning": 85, "critical": 100},
+        "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999},
+    },
+
+    "fancontrol_para": {
+        "interval": 5,
+        "fan_air_flow_monitor": 1,
+        "psu_air_flow_monitor": 1,
+        "max_pwm": 0xff,
+        "min_pwm": 0x40,
+        "abnormal_pwm": 0xff,
+        "warning_pwm": 0xff,
+        "temp_invalid_pid_pwm": 0x40,
+        "temp_error_pid_pwm": 0x40,
+        "temp_fail_num": 3,
+        "check_temp_fail": [
+            {"temp_name": "INLET_TEMP"},
+            {"temp_name": "SWITCH_TEMP"},
+            {"temp_name": "CPU_TEMP"},
+        ],
+        "temp_warning_num": 3,  # temp over warning 3 times continuously
+        "temp_critical_num": 3,  # temp over critical 3 times continuously
+        "temp_warning_countdown": 60,  # 5 min warning speed after not warning
+        "temp_critical_countdown": 60,  # 5 min full speed after not critical
+        "rotor_error_count": 6,  # fan rotor error 6 times continuously
+        "inlet_mac_diff": 999,
+        "check_crit_reboot_flag": 1,
+        "check_crit_reboot_num": 3,
+        "check_crit_sleep_time": 20,
+        "psu_absent_fullspeed_num": 0xFF,
+        "fan_absent_fullspeed_num": 1,
+        "rotor_error_fullspeed_num": 1,
+    },
+
+    "ledcontrol_para": {
+        "interval": 5,
+        "checkpsu": 0,  # 0: sys led don't follow psu led
+        "checkfan": 0,  # 0: sys led don't follow fan led
+        "psu_amber_num": 1,
+        "fan_amber_num": 1,
+        "board_sys_led": [
+            {"led_name": "FRONT_SYS_LED"},
+        ],
+        "board_psu_led": [
+            {"led_name": "FRONT_PSU_LED"},
+        ],
+        "board_fan_led": [
+            {"led_name": "FRONT_FAN_LED"},
+        ],
+        "psu_air_flow_monitor": 1,
+        "fan_air_flow_monitor": 1,
+        "psu_air_flow_amber_num": 1,
+        "fan_air_flow_amber_num": 1,
+    },
+
+    "otp_reboot_judge_file": {
+        "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag",
+        "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag",
+    },
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/Makefile
new file mode 100755
index 000000000000..9b39c1998570
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/Makefile
@@ -0,0 +1,11 @@
+MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
+MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules)
+
+EXTRA_CFLAGS+= -I$(MODULES_DIR)
+
+obj-m := wb_pcie_dev_device.o
+obj-m += wb_i2c_mux_pca954x_device.o
+obj-m += wb_i2c_ocores_device.o
+obj-m += wb_lpc_drv_device.o
+obj-m += wb_i2c_dev_device.o
+obj-m += wb_io_dev_device.o
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_i2c_dev_device.c
new file mode 100644
index 000000000000..76f8911e0b67
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_i2c_dev_device.c
@@ -0,0 +1,145 @@
+/*
+ * An wb_i2c_dev_device driver for i2c dev device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_i2c_dev.h>
+
+static int g_wb_i2c_dev_device_debug = 0;
+static int g_wb_i2c_dev_device_error = 0;
+
+module_param(g_wb_i2c_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_i2c_dev_device_debug) { \
+        printk(KERN_INFO "[WB_I2C_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_I2C_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_i2c_dev_device_error) { \
+        printk(KERN_ERR "[WB_I2C_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static i2c_dev_device_t i2c_dev_device_data0 = {
+    .i2c_bus = 2,
+    .i2c_addr = 0x0d,
+    .i2c_name = "cpld2",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data1 = {
+    .i2c_bus = 8,
+    .i2c_addr = 0x30,
+    .i2c_name = "cpld3",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data2 = {
+    .i2c_bus = 8,
+    .i2c_addr = 0x31,
+    .i2c_name = "cpld4",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+struct i2c_board_info i2c_dev_device_info[] = {
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data0,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data1,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data2,
+    },
+};
+
+static int __init wb_i2c_dev_device_init(void)
+{
+    int i;
+    struct i2c_adapter *adap;
+    struct i2c_client *client;
+    i2c_dev_device_t *i2c_dev_device_data;
+
+    WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(i2c_dev_device_info); i++) {
+        i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+        i2c_dev_device_info[i].addr = i2c_dev_device_data->i2c_addr;
+        adap = i2c_get_adapter(i2c_dev_device_data->i2c_bus);
+        if (adap == NULL) {
+            i2c_dev_device_data->client = NULL;
+            printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_dev_device_data->i2c_bus);
+            continue;
+        }
+        client = i2c_new_client_device(adap, &i2c_dev_device_info[i]);
+        if (!client) {
+            i2c_dev_device_data->client = NULL;
+            printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n",
+                i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus);
+        } else {
+            i2c_dev_device_data->client = client;
+        }
+        i2c_put_adapter(adap);
+    }
+    return 0;
+}
+
+static void __exit wb_i2c_dev_device_exit(void)
+{
+    int i;
+    i2c_dev_device_t *i2c_dev_device_data;
+
+    WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(i2c_dev_device_info) - 1; i >= 0; i--) {
+        i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+        if (i2c_dev_device_data->client) {
+            i2c_unregister_device(i2c_dev_device_data->client);
+            i2c_dev_device_data->client = NULL;
+        }
+    }
+}
+
+module_init(wb_i2c_dev_device_init);
+module_exit(wb_i2c_dev_device_exit);
+MODULE_DESCRIPTION("I2C DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_i2c_mux_pca954x_device.c
new file mode 100644
index 000000000000..eb7d3294ab92
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_i2c_mux_pca954x_device.c
@@ -0,0 +1,244 @@
+/*
+ * An wb_i2c_mux_pca954x_device driver for pca954x i2c load device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_i2c_mux_pca954x.h>
+
+static int g_wb_i2c_mux_pca954x_device_debug = 0;
+static int g_wb_i2c_mux_pca954x_device_error = 0;
+
+module_param(g_wb_i2c_mux_pca954x_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_mux_pca954x_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_i2c_mux_pca954x_device_debug) { \
+        printk(KERN_INFO "[WB_I2C_MUX_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_i2c_mux_pca954x_device_error) { \
+        printk(KERN_ERR "[WB_I2C_MUX_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data0 = {
+    .i2c_bus                        = 2,
+    .i2c_addr                       = 0x77,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 16,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/cpld1",
+        .file_attr.offset           = 0x60,
+        .file_attr.mask             = 0x02,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x02,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data1 = {
+    .i2c_bus                        = 4,
+    .i2c_addr                       = 0x77,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 24,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/cpld1",
+        .file_attr.offset           = 0x60,
+        .file_attr.mask             = 0x01,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x01,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data2 = {
+    .i2c_bus                        = 12,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 1,
+    .pca9548_base_nr                = 32,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x20,
+        .file_attr.mask             = 0x01,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x01,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data3 = {
+    .i2c_bus                        = 12,
+    .i2c_addr                       = 0x71,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 1,
+    .pca9548_base_nr                = 40,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x20,
+        .file_attr.mask             = 0x01,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x01,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data4 = {
+    .i2c_bus                        = 12,
+    .i2c_addr                       = 0x72,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 1,
+    .pca9548_base_nr                = 48,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x20,
+        .file_attr.mask             = 0x01,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x01,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data5 = {
+    .i2c_bus                        = 12,
+    .i2c_addr                       = 0x73,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 1,
+    .pca9548_base_nr                = 56,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x20,
+        .file_attr.mask             = 0x01,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x01,
+    },
+};
+
+struct i2c_board_info i2c_mux_pca954x_device_info[] = {
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data0,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data1,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data2,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data3,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data4,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data5,
+    },
+};
+
+static int __init wb_i2c_mux_pca954x_device_init(void)
+{
+    int i;
+    struct i2c_adapter *adap;
+    struct i2c_client *client;
+    i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data;
+
+    WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(i2c_mux_pca954x_device_info); i++) {
+        i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data;
+        i2c_mux_pca954x_device_info[i].addr = i2c_mux_pca954x_device_data->i2c_addr;
+        adap = i2c_get_adapter(i2c_mux_pca954x_device_data->i2c_bus);
+        if (adap == NULL) {
+            i2c_mux_pca954x_device_data->client = NULL;
+            printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_mux_pca954x_device_data->i2c_bus);
+            continue;
+        }
+        client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]);
+        if (!client) {
+            i2c_mux_pca954x_device_data->client = NULL;
+            printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n",
+                i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus);
+        } else {
+            i2c_mux_pca954x_device_data->client = client;
+        }
+        i2c_put_adapter(adap);
+    }
+    return 0;
+}
+
+static void __exit wb_i2c_mux_pca954x_device_exit(void)
+{
+    int i;
+    i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data;
+
+    WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(i2c_mux_pca954x_device_info) - 1; i >= 0; i--) {
+        i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data;
+        if (i2c_mux_pca954x_device_data->client) {
+            i2c_unregister_device(i2c_mux_pca954x_device_data->client);
+            i2c_mux_pca954x_device_data->client = NULL;
+        }
+    }
+}
+
+module_init(wb_i2c_mux_pca954x_device_init);
+module_exit(wb_i2c_mux_pca954x_device_exit);
+MODULE_DESCRIPTION("I2C MUX PCA954X Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_i2c_ocores_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_i2c_ocores_device.c
new file mode 100644
index 000000000000..db6fe0cdfe46
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_i2c_ocores_device.c
@@ -0,0 +1,443 @@
+/*
+ * An wb_i2c_ocores_device driver for i2c ocores device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_i2c_ocores.h>
+
+static int g_wb_i2c_ocores_device_debug = 0;
+static int g_wb_i2c_ocores_device_error = 0;
+
+module_param(g_wb_i2c_ocores_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_ocores_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_i2c_ocores_device_debug) { \
+        printk(KERN_INFO "[WB_I2C_OCORE_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_I2C_OCORE_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_i2c_ocores_device_error) { \
+        printk(KERN_ERR "[WB_I2C_OCORE_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static i2c_ocores_device_t i2c_ocores_device_data0 = {
+    .adap_nr = 2,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0800,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 0,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data1 = {
+    .adap_nr = 3,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0820,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 1,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data2 = {
+    .adap_nr = 4,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0840,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 2,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data3 = {
+    .adap_nr = 5,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0860,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 3,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data4 = {
+    .adap_nr = 6,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0880,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 4,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data5 = {
+    .adap_nr = 7,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x08a0,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 5,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data6 = {
+    .adap_nr = 8,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x08c0,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 6,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data7 = {
+    .adap_nr = 9,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x08e0,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 7,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data8 = {
+    .adap_nr = 10,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0900,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 8,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data9 = {
+    .adap_nr = 11,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0920,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 9,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data10 = {
+    .adap_nr = 12,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0940,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 10,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data11 = {
+    .adap_nr = 13,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0960,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 11,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data12 = {
+    .adap_nr = 14,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0980,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 12,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data13 = {
+    .adap_nr = 15,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x09a0,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 13,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static void wb_i2c_ocores_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device i2c_ocores_device[] = {
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data0,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data1,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 3,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data2,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 4,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data3,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 5,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data4,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 6,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data5,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 7,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data6,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 8,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data7,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 9,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data8,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 10,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data9,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 11,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data10,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 12,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data11,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 13,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data12,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 14,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data13,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+};
+
+static int __init wb_i2c_ocores_device_init(void)
+{
+    int i;
+    int ret = 0;
+    i2c_ocores_device_t *i2c_ocores_device_data;
+
+    WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(i2c_ocores_device); i++) {
+        i2c_ocores_device_data = i2c_ocores_device[i].dev.platform_data;
+        ret = platform_device_register(&i2c_ocores_device[i]);
+        if (ret < 0) {
+            i2c_ocores_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-ocores-i2c.%d register failed!\n", i + 1);
+        } else {
+            i2c_ocores_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_i2c_ocores_device_exit(void)
+{
+    int i;
+    i2c_ocores_device_t *i2c_ocores_device_data;
+
+    WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(i2c_ocores_device) - 1; i >= 0; i--) {
+        i2c_ocores_device_data = i2c_ocores_device[i].dev.platform_data;
+        if (i2c_ocores_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&i2c_ocores_device[i]);
+        }
+    }
+}
+
+module_init(wb_i2c_ocores_device_init);
+module_exit(wb_i2c_ocores_device_exit);
+MODULE_DESCRIPTION("I2C OCORES Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_io_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_io_dev_device.c
new file mode 100644
index 000000000000..76b86a2d47ea
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_io_dev_device.c
@@ -0,0 +1,123 @@
+/*
+ * An wb_io_dev_device driver for io device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_io_dev.h>
+
+static int g_wb_io_dev_device_debug = 0;
+static int g_wb_io_dev_device_error = 0;
+
+module_param(g_wb_io_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_io_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_IO_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_io_dev_device_debug) { \
+        printk(KERN_INFO "[WB_IO_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_IO_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_io_dev_device_error) { \
+        printk(KERN_ERR "[WB_IO_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static io_dev_device_t io_dev_device_data0 = {
+    .io_dev_name = "cpld0",
+    .io_base = 0x700,
+    .io_len = 0x100,
+    .indirect_addr = 0,
+};
+
+static io_dev_device_t io_dev_device_data1 = {
+    .io_dev_name = "cpld1",
+    .io_base = 0x900,
+    .io_len = 0x100,
+    .indirect_addr = 0,
+};
+
+static void wb_io_dev_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device io_dev_device[] = {
+    {
+        .name   = "wb-io-dev",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &io_dev_device_data0,
+            .release = wb_io_dev_device_release,
+        },
+    },
+    {
+        .name   = "wb-io-dev",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &io_dev_device_data1,
+            .release = wb_io_dev_device_release,
+        },
+    },
+};
+
+static int __init wb_io_dev_device_init(void)
+{
+    int i;
+    int ret = 0;
+    io_dev_device_t *io_dev_device_data;
+
+    WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(io_dev_device); i++) {
+        io_dev_device_data = io_dev_device[i].dev.platform_data;
+        ret = platform_device_register(&io_dev_device[i]);
+        if (ret < 0) {
+            io_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-io-dev.%d register failed!\n", i + 1);
+        } else {
+            io_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_io_dev_device_exit(void)
+{
+    int i;
+    io_dev_device_t *io_dev_device_data;
+
+    WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(io_dev_device) - 1; i >= 0; i--) {
+        io_dev_device_data = io_dev_device[i].dev.platform_data;
+        if (io_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&io_dev_device[i]);
+        }
+    }
+}
+
+module_init(wb_io_dev_device_init);
+module_exit(wb_io_dev_device_exit);
+MODULE_DESCRIPTION("IO DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_lpc_drv_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_lpc_drv_device.c
new file mode 100644
index 000000000000..363d670d5a99
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_lpc_drv_device.c
@@ -0,0 +1,150 @@
+/*
+ * An wb_i2c_ocores_device driver for i2c ocore device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_lpc_drv.h>
+
+static int g_wb_lpc_drv_device_debug = 0;
+static int g_wb_lpc_drv_device_error = 0;
+
+module_param(g_wb_lpc_drv_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_lpc_drv_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_LPC_DRV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_lpc_drv_device_debug) { \
+        printk(KERN_INFO "[WB_LPC_DRV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_LPC_DRV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_lpc_drv_device_error) { \
+        printk(KERN_ERR "[WB_LPC_DRV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static lpc_drv_device_t lpc_drv_device_data_0 = {
+    .lpc_io_name = "wb_lpc",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 0,
+    .lpc_io_base = 0x700,
+    .lpc_io_size = 0x100,
+    .lpc_gen_dec = 0x84,
+};
+
+static lpc_drv_device_t lpc_drv_device_data_1 = {
+    .lpc_io_name = "wb_lpc",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 0,
+    .lpc_io_base = 0x900,
+    .lpc_io_size = 0x100,
+    .lpc_gen_dec = 0x88,
+};
+
+static lpc_drv_device_t lpc_drv_device_data_2 = {
+    .lpc_io_name = "wb_lpc",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 0,
+    .lpc_io_base = 0xb00,
+    .lpc_io_size = 0x100,
+    .lpc_gen_dec = 0x90,
+};
+
+static void wb_lpc_drv_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device lpc_drv_device[] = {
+    {
+        .name   = "wb-lpc",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &lpc_drv_device_data_0,
+            .release = wb_lpc_drv_device_release,
+        },
+    },
+    {
+        .name   = "wb-lpc",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &lpc_drv_device_data_1,
+            .release = wb_lpc_drv_device_release,
+        },
+    },
+    {
+        .name   = "wb-lpc",
+        .id = 3,
+        .dev    = {
+            .platform_data  = &lpc_drv_device_data_2,
+            .release = wb_lpc_drv_device_release,
+        },
+    },
+};
+
+static int __init wb_lpc_drv_device_init(void)
+{
+    int i;
+    int ret = 0;
+    lpc_drv_device_t *lpc_drv_device_data;
+
+    WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(lpc_drv_device); i++) {
+        lpc_drv_device_data = lpc_drv_device[i].dev.platform_data;
+        ret = platform_device_register(&lpc_drv_device[i]);
+        if (ret < 0) {
+            lpc_drv_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-lpc.%d register failed!\n", i + 1);
+        } else {
+            lpc_drv_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_lpc_drv_device_exit(void)
+{
+    int i;
+    lpc_drv_device_t *lpc_drv_device_data;
+
+    WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(lpc_drv_device) - 1; i >= 0; i--) {
+        lpc_drv_device_data = lpc_drv_device[i].dev.platform_data;
+        if (lpc_drv_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&lpc_drv_device[i]);
+        }
+    }
+}
+
+module_init(wb_lpc_drv_device_init);
+module_exit(wb_lpc_drv_device_exit);
+MODULE_DESCRIPTION("LPC DRV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_pcie_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_pcie_dev_device.c
new file mode 100644
index 000000000000..3a8afefcd947
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_pcie_dev_device.c
@@ -0,0 +1,113 @@
+/*
+ * An wb_pcie_dev_device driver for pcie device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_pcie_dev.h>
+
+static int g_wb_pcie_dev_device_debug = 0;
+static int g_wb_pcie_dev_device_error = 0;
+
+module_param(g_wb_pcie_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_pcie_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_pcie_dev_device_debug) { \
+        printk(KERN_INFO "[WB_PCIE_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_PCIE_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_pcie_dev_device_error) { \
+        printk(KERN_ERR "[WB_PCIE_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static pci_dev_device_t pcie_dev_device_data0 = {
+    .pci_dev_name = "fpga0",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x08,
+    .pci_slot = 0x00,
+    .pci_fn = 0,
+    .pci_bar = 0,
+    .bus_width = 4,
+    .upg_ctrl_base = 0xa00,
+    .upg_flash_base = 0x1a0000,
+};
+
+static void wb_pcie_dev_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device pcie_dev_device[] = {
+    {
+        .name   = "wb-pci-dev",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &pcie_dev_device_data0,
+            .release = wb_pcie_dev_device_release,
+        },
+    },
+};
+
+static int __init wb_pcie_dev_device_init(void)
+{
+    int i;
+    int ret = 0;
+    pci_dev_device_t *pcie_dev_device_data;
+
+    WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(pcie_dev_device); i++) {
+        pcie_dev_device_data = pcie_dev_device[i].dev.platform_data;
+        ret = platform_device_register(&pcie_dev_device[i]);
+        if (ret < 0) {
+            pcie_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-pci-dev.%d register failed!\n", i + 1);
+        } else {
+            pcie_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_pcie_dev_device_exit(void)
+{
+    int i;
+    pci_dev_device_t *pcie_dev_device_data;
+
+    WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(pcie_dev_device) - 1; i >= 0; i--) {
+        pcie_dev_device_data = pcie_dev_device[i].dev.platform_data;
+        if (pcie_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&pcie_dev_device[i]);
+        }
+    }
+}
+
+module_init(wb_pcie_dev_device_init);
+module_exit(wb_pcie_dev_device_exit);
+MODULE_DESCRIPTION("PCIE DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/plat_sysfs_cfg/WB_PLAT_CPLD.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
new file mode 100644
index 000000000000..927521a384ff
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
@@ -0,0 +1,38 @@
+# configuration item: I2C address of CPLD
+# format: cpld_i2c_dev.bus_[cpld_slot]_[cpld_id] cpld_i2c_dev.addr_[cpld_slot]_[cpld_id]
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+# bus: I2C bus number of CPLD
+# addr: I2C address of CPLD
+cpld_i2c_dev.bus_0_2=2
+cpld_i2c_dev.addr_0_2=0x0d
+cpld_i2c_dev.bus_0_3=8
+cpld_i2c_dev.addr_0_3=0x30
+cpld_i2c_dev.bus_0_4=8
+cpld_i2c_dev.addr_0_4=0x31
+
+
+# configuration item: LPC address of CPLD
+# format: cpld_lpc_addr_[cpld_slot]_[cpld_id]
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+cpld_lpc_dev_0_0=0x700
+cpld_lpc_dev_0_1=0x900
+
+
+# configuration item: CPLD access method, lpc or i2c
+# format: mode_cpld_[cpld_slot][cpld_slot]=lpc/i2c
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+mode_cpld_0_0=lpc
+mode_cpld_0_1=lpc
+mode_cpld_0_2=i2c
+mode_cpld_0_3=i2c
+mode_cpld_0_4=i2c
+
+
+# configuration item: the number of CPLD
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: CPLD main_dev is 4
+# minor_dev: CPLD minor_dev not exist
+dev_num_4_0=5
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/plat_sysfs_cfg/WB_PLAT_FAN.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/plat_sysfs_cfg/WB_PLAT_FAN.cfg
new file mode 100644
index 000000000000..e46f690f317a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/plat_sysfs_cfg/WB_PLAT_FAN.cfg
@@ -0,0 +1,372 @@
+# configuration item: the number of fans
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: fan main_dev is 1
+# minor_dev: fan minor_dev not exist(0)
+dev_num_1_0=5
+
+
+# configuration item: the number of rotors
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: rotor main_dev is 1
+# minor_dev: rotor minor_dev is 5
+dev_num_1_5=2
+
+
+# configuration item: fan presence status
+# format: dev_present_status_[main_dev_id][fan_index]
+# main_dev_id: fan main_dev_id is 1
+# fan_index: start from 1
+dev_present_status.mode_1_1=config
+dev_present_status.src_1_1=cpld
+dev_present_status.frmt_1_1=bit
+dev_present_status.pola_1_1=negative
+dev_present_status.addr_1_1=0x00020030
+dev_present_status.len_1_1=1
+dev_present_status.bit_offset_1_1=0
+
+dev_present_status.mode_1_2=config
+dev_present_status.src_1_2=cpld
+dev_present_status.frmt_1_2=bit
+dev_present_status.pola_1_2=negative
+dev_present_status.addr_1_2=0x00020030
+dev_present_status.len_1_2=1
+dev_present_status.bit_offset_1_2=1
+
+dev_present_status.mode_1_3=config
+dev_present_status.src_1_3=cpld
+dev_present_status.frmt_1_3=bit
+dev_present_status.pola_1_3=negative
+dev_present_status.addr_1_3=0x00020030
+dev_present_status.len_1_3=1
+dev_present_status.bit_offset_1_3=2
+
+dev_present_status.mode_1_4=config
+dev_present_status.src_1_4=cpld
+dev_present_status.frmt_1_4=bit
+dev_present_status.pola_1_4=negative
+dev_present_status.addr_1_4=0x00020030
+dev_present_status.len_1_4=1
+dev_present_status.bit_offset_1_4=3
+
+dev_present_status.mode_1_5=config
+dev_present_status.src_1_5=cpld
+dev_present_status.frmt_1_5=bit
+dev_present_status.pola_1_5=negative
+dev_present_status.addr_1_5=0x00020030
+dev_present_status.len_1_5=1
+dev_present_status.bit_offset_1_5=4
+
+
+# configuration item: fan rotor status
+# format: fan_roll_status_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_roll_status.mode_1_0=config
+fan_roll_status.int_cons_1_0=
+fan_roll_status.src_1_0=cpld
+fan_roll_status.frmt_1_0=bit
+fan_roll_status.pola_1_0=positive
+fan_roll_status.fpath_1_0=
+fan_roll_status.addr_1_0=0x00020031
+fan_roll_status.len_1_0=1
+fan_roll_status.bit_offset_1_0=0
+
+fan_roll_status.mode_1_1=config
+fan_roll_status.int_cons_1_1=
+fan_roll_status.src_1_1=cpld
+fan_roll_status.frmt_1_1=bit
+fan_roll_status.pola_1_1=positive
+fan_roll_status.fpath_1_1=
+fan_roll_status.addr_1_1=0x00020034
+fan_roll_status.len_1_1=1
+fan_roll_status.bit_offset_1_1=0
+
+fan_roll_status.mode_2_0=config
+fan_roll_status.int_cons_2_0=
+fan_roll_status.src_2_0=cpld
+fan_roll_status.frmt_2_0=bit
+fan_roll_status.pola_2_0=positive
+fan_roll_status.fpath_2_0=
+fan_roll_status.addr_2_0=0x00020031
+fan_roll_status.len_2_0=1
+fan_roll_status.bit_offset_2_0=1
+
+fan_roll_status.mode_2_1=config
+fan_roll_status.int_cons_2_1=
+fan_roll_status.src_2_1=cpld
+fan_roll_status.frmt_2_1=bit
+fan_roll_status.pola_2_1=positive
+fan_roll_status.fpath_2_1=
+fan_roll_status.addr_2_1=0x00020034
+fan_roll_status.len_2_1=1
+fan_roll_status.bit_offset_2_1=1
+
+fan_roll_status.mode_3_0=config
+fan_roll_status.int_cons_3_0=
+fan_roll_status.src_3_0=cpld
+fan_roll_status.frmt_3_0=bit
+fan_roll_status.pola_3_0=positive
+fan_roll_status.fpath_3_0=
+fan_roll_status.addr_3_0=0x00020031
+fan_roll_status.len_3_0=1
+fan_roll_status.bit_offset_3_0=2
+
+fan_roll_status.mode_3_1=config
+fan_roll_status.int_cons_3_1=
+fan_roll_status.src_3_1=cpld
+fan_roll_status.frmt_3_1=bit
+fan_roll_status.pola_3_1=positive
+fan_roll_status.fpath_3_1=
+fan_roll_status.addr_3_1=0x00020034
+fan_roll_status.len_3_1=1
+fan_roll_status.bit_offset_3_1=2
+
+fan_roll_status.mode_4_0=config
+fan_roll_status.int_cons_4_0=
+fan_roll_status.src_4_0=cpld
+fan_roll_status.frmt_4_0=bit
+fan_roll_status.pola_4_0=positive
+fan_roll_status.fpath_4_0=
+fan_roll_status.addr_4_0=0x00020031
+fan_roll_status.len_4_0=1
+fan_roll_status.bit_offset_4_0=3
+
+fan_roll_status.mode_4_1=config
+fan_roll_status.int_cons_4_1=
+fan_roll_status.src_4_1=cpld
+fan_roll_status.frmt_4_1=bit
+fan_roll_status.pola_4_1=positive
+fan_roll_status.fpath_4_1=
+fan_roll_status.addr_4_1=0x00020034
+fan_roll_status.len_4_1=1
+fan_roll_status.bit_offset_4_1=3
+
+fan_roll_status.mode_5_0=config
+fan_roll_status.int_cons_5_0=
+fan_roll_status.src_5_0=cpld
+fan_roll_status.frmt_5_0=bit
+fan_roll_status.pola_5_0=positive
+fan_roll_status.fpath_5_0=
+fan_roll_status.addr_5_0=0x00020031
+fan_roll_status.len_5_0=1
+fan_roll_status.bit_offset_5_0=4
+
+fan_roll_status.mode_5_1=config
+fan_roll_status.int_cons_5_1=
+fan_roll_status.src_5_1=cpld
+fan_roll_status.frmt_5_1=bit
+fan_roll_status.pola_5_1=positive
+fan_roll_status.fpath_5_1=
+fan_roll_status.addr_5_1=0x00020034
+fan_roll_status.len_5_1=1
+fan_roll_status.bit_offset_5_1=4
+
+
+# configuration item: fan speed
+# format: fan_speed_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_speed.mode_1_0=config
+fan_speed.int_cons_1_0=
+fan_speed.src_1_0=cpld
+fan_speed.frmt_1_0=num_bytes
+fan_speed.pola_1_0=negative
+fan_speed.fpath_1_0=
+fan_speed.addr_1_0=0x0002001b
+fan_speed.len_1_0=2
+fan_speed.bit_offset_1_0=
+
+fan_speed.mode_1_1=config
+fan_speed.int_cons_1_1=
+fan_speed.src_1_1=cpld
+fan_speed.frmt_1_1=num_bytes
+fan_speed.pola_1_1=negative
+fan_speed.fpath_1_1=
+fan_speed.addr_1_1=0x00020025
+fan_speed.len_1_1=2
+fan_speed.bit_offset_1_1=
+
+fan_speed.mode_2_0=config
+fan_speed.int_cons_2_0=
+fan_speed.src_2_0=cpld
+fan_speed.frmt_2_0=num_bytes
+fan_speed.pola_2_0=negative
+fan_speed.fpath_2_0=
+fan_speed.addr_2_0=0x0002001d
+fan_speed.len_2_0=2
+fan_speed.bit_offset_2_0=
+
+fan_speed.mode_2_1=config
+fan_speed.int_cons_2_1=
+fan_speed.src_2_1=cpld
+fan_speed.frmt_2_1=num_bytes
+fan_speed.pola_2_1=negative
+fan_speed.fpath_2_1=
+fan_speed.addr_2_1=0x00020027
+fan_speed.len_2_1=2
+fan_speed.bit_offset_2_1=
+
+fan_speed.mode_3_0=config
+fan_speed.int_cons_3_0=
+fan_speed.src_3_0=cpld
+fan_speed.frmt_3_0=num_bytes
+fan_speed.pola_3_0=negative
+fan_speed.fpath_3_0=
+fan_speed.addr_3_0=0x0002001f
+fan_speed.len_3_0=2
+fan_speed.bit_offset_3_0=
+
+fan_speed.mode_3_1=config
+fan_speed.int_cons_3_1=
+fan_speed.src_3_1=cpld
+fan_speed.frmt_3_1=num_bytes
+fan_speed.pola_3_1=negative
+fan_speed.fpath_3_1=
+fan_speed.addr_3_1=0x00020029
+fan_speed.len_3_1=2
+fan_speed.bit_offset_3_1=
+
+fan_speed.mode_4_0=config
+fan_speed.int_cons_4_0=
+fan_speed.src_4_0=cpld
+fan_speed.frmt_4_0=num_bytes
+fan_speed.pola_4_0=negative
+fan_speed.fpath_4_0=
+fan_speed.addr_4_0=0x00020021
+fan_speed.len_4_0=2
+fan_speed.bit_offset_4_0=
+
+fan_speed.mode_4_1=config
+fan_speed.int_cons_4_1=
+fan_speed.src_4_1=cpld
+fan_speed.frmt_4_1=num_bytes
+fan_speed.pola_4_1=negative
+fan_speed.fpath_4_1=
+fan_speed.addr_4_1=0x0002002b
+fan_speed.len_4_1=2
+fan_speed.bit_offset_4_1=
+
+fan_speed.mode_5_0=config
+fan_speed.int_cons_5_0=
+fan_speed.src_5_0=cpld
+fan_speed.frmt_5_0=num_bytes
+fan_speed.pola_5_0=negative
+fan_speed.fpath_5_0=
+fan_speed.addr_5_0=0x00020023
+fan_speed.len_5_0=2
+fan_speed.bit_offset_5_0=
+
+fan_speed.mode_5_1=config
+fan_speed.int_cons_5_1=
+fan_speed.src_5_1=cpld
+fan_speed.frmt_5_1=num_bytes
+fan_speed.pola_5_1=negative
+fan_speed.fpath_5_1=
+fan_speed.addr_5_1=0x0002002d
+fan_speed.len_5_1=2
+fan_speed.bit_offset_5_1=
+
+
+# configuration item: fan pwm
+# format: fan_ratio_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_ratio.mode_1_0=config
+fan_ratio.int_cons_1_0=
+fan_ratio.src_1_0=cpld
+fan_ratio.frmt_1_0=byte
+fan_ratio.pola_1_0=
+fan_ratio.fpath_1_0=
+fan_ratio.addr_1_0=0x00020014
+fan_ratio.len_1_0=1
+fan_ratio.bit_offset_1_0=
+
+fan_ratio.mode_1_1=config
+fan_ratio.int_cons_1_1=
+fan_ratio.src_1_1=cpld
+fan_ratio.frmt_1_1=byte
+fan_ratio.pola_1_1=
+fan_ratio.fpath_1_1=
+fan_ratio.addr_1_1=0x00020014
+fan_ratio.len_1_1=1
+fan_ratio.bit_offset_1_1=
+
+fan_ratio.mode_2_0=config
+fan_ratio.int_cons_2_0=
+fan_ratio.src_2_0=cpld
+fan_ratio.frmt_2_0=byte
+fan_ratio.pola_2_0=
+fan_ratio.fpath_2_0=
+fan_ratio.addr_2_0=0x00020015
+fan_ratio.len_2_0=1
+fan_ratio.bit_offset_2_0=
+
+fan_ratio.mode_2_1=config
+fan_ratio.int_cons_2_1=
+fan_ratio.src_2_1=cpld
+fan_ratio.frmt_2_1=byte
+fan_ratio.pola_2_1=
+fan_ratio.fpath_2_1=
+fan_ratio.addr_2_1=0x00020015
+fan_ratio.len_2_1=1
+fan_ratio.bit_offset_2_1=
+
+fan_ratio.mode_3_0=config
+fan_ratio.int_cons_3_0=
+fan_ratio.src_3_0=cpld
+fan_ratio.frmt_3_0=byte
+fan_ratio.pola_3_0=
+fan_ratio.fpath_3_0=
+fan_ratio.addr_3_0=0x00020016
+fan_ratio.len_3_0=1
+fan_ratio.bit_offset_3_0=
+
+fan_ratio.mode_3_1=config
+fan_ratio.int_cons_3_1=
+fan_ratio.src_3_1=cpld
+fan_ratio.frmt_3_1=byte
+fan_ratio.pola_3_1=
+fan_ratio.fpath_3_1=
+fan_ratio.addr_3_1=0x00020016
+fan_ratio.len_3_1=1
+fan_ratio.bit_offset_3_1=
+
+fan_ratio.mode_4_0=config
+fan_ratio.int_cons_4_0=
+fan_ratio.src_4_0=cpld
+fan_ratio.frmt_4_0=byte
+fan_ratio.pola_4_0=
+fan_ratio.fpath_4_0=
+fan_ratio.addr_4_0=0x00020017
+fan_ratio.len_4_0=1
+fan_ratio.bit_offset_4_0=
+
+fan_ratio.mode_4_1=config
+fan_ratio.int_cons_4_1=
+fan_ratio.src_4_1=cpld
+fan_ratio.frmt_4_1=byte
+fan_ratio.pola_4_1=
+fan_ratio.fpath_4_1=
+fan_ratio.addr_4_1=0x00020017
+fan_ratio.len_4_1=1
+fan_ratio.bit_offset_4_1=
+
+fan_ratio.mode_5_0=config
+fan_ratio.int_cons_5_0=
+fan_ratio.src_5_0=cpld
+fan_ratio.frmt_5_0=byte
+fan_ratio.pola_5_0=
+fan_ratio.fpath_5_0=
+fan_ratio.addr_5_0=0x00020018
+fan_ratio.len_5_0=1
+fan_ratio.bit_offset_5_0=
+
+fan_ratio.mode_5_1=config
+fan_ratio.int_cons_5_1=
+fan_ratio.src_5_1=cpld
+fan_ratio.frmt_5_1=byte
+fan_ratio.pola_5_1=
+fan_ratio.fpath_5_1=
+fan_ratio.addr_5_1=0x00020018
+fan_ratio.len_5_1=1
+fan_ratio.bit_offset_5_1=
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/plat_sysfs_cfg/WB_PLAT_PSU.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/plat_sysfs_cfg/WB_PLAT_PSU.cfg
new file mode 100644
index 000000000000..cc4a6dae1db3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/plat_sysfs_cfg/WB_PLAT_PSU.cfg
@@ -0,0 +1,64 @@
+# configuration item: the number of psus
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: psu main_dev is 2
+# minor_dev: psu minor_dev not exist(0)
+dev_num_2_0=2
+
+
+# configuration item: psu status
+# format: psu_status_[psu_index]_[status_id]
+# psu_index: start from 1
+# status_id: 0: presence 1: output 2: alert
+# psu1 presence status
+psu_status.mode_1_0=config
+psu_status.src_1_0=cpld
+psu_status.frmt_1_0=bit
+psu_status.pola_1_0=negative
+psu_status.addr_1_0=0x00010051
+psu_status.len_1_0=1
+psu_status.bit_offset_1_0=0
+
+# psu1 output status
+psu_status.mode_1_1=config
+psu_status.src_1_1=cpld
+psu_status.frmt_1_1=bit
+psu_status.pola_1_1=positive
+psu_status.addr_1_1=0x00010051
+psu_status.len_1_1=1
+psu_status.bit_offset_1_1=1
+
+# psu1 alert status
+psu_status.mode_1_2=config
+psu_status.src_1_2=cpld
+psu_status.frmt_1_2=bit
+psu_status.pola_1_2=negative
+psu_status.addr_1_2=0x00010051
+psu_status.len_1_2=1
+psu_status.bit_offset_1_2=2
+
+# psu2 presence status
+psu_status.mode_2_0=config
+psu_status.src_2_0=cpld
+psu_status.frmt_2_0=bit
+psu_status.pola_2_0=negative
+psu_status.addr_2_0=0x00010051
+psu_status.len_2_0=1
+psu_status.bit_offset_2_0=4
+
+# psu2 output status
+psu_status.mode_2_1=config
+psu_status.src_2_1=cpld
+psu_status.frmt_2_1=bit
+psu_status.pola_2_1=positive
+psu_status.addr_2_1=0x00010051
+psu_status.len_2_1=1
+psu_status.bit_offset_2_1=5
+
+# psu2 alert status
+psu_status.mode_2_2=config
+psu_status.src_2_2=cpld
+psu_status.frmt_2_2=bit
+psu_status.pola_2_2=negative
+psu_status.addr_2_2=0x00010051
+psu_status.len_2_2=1
+psu_status.bit_offset_2_2=6
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/plat_sysfs_cfg/WB_PLAT_SFF.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/plat_sysfs_cfg/WB_PLAT_SFF.cfg
new file mode 100644
index 000000000000..ceafe3e9c17b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/plat_sysfs_cfg/WB_PLAT_SFF.cfg
@@ -0,0 +1,306 @@
+# configuration item: the number of sffs
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: sff main_dev is 3
+# minor_dev: sff minor_dev not exist(0)
+dev_num_3_0=32
+
+
+# configuration item: The directory name of sff sysfs
+# format: sff_dir_name_[sff_index]
+# sff_index: start from 1
+sff_dir_name_1 =sff1
+sff_dir_name_2 =sff2
+sff_dir_name_3 =sff3
+sff_dir_name_4 =sff4
+sff_dir_name_5 =sff5
+sff_dir_name_6 =sff6
+sff_dir_name_7 =sff7
+sff_dir_name_8 =sff8
+sff_dir_name_9 =sff9
+sff_dir_name_10 =sff10
+sff_dir_name_11 =sff11
+sff_dir_name_12 =sff12
+sff_dir_name_13 =sff13
+sff_dir_name_14 =sff14
+sff_dir_name_15 =sff15
+sff_dir_name_16 =sff16
+sff_dir_name_17 =sff17
+sff_dir_name_18 =sff18
+sff_dir_name_19 =sff19
+sff_dir_name_20 =sff20
+sff_dir_name_21 =sff21
+sff_dir_name_22 =sff22
+sff_dir_name_23 =sff23
+sff_dir_name_24 =sff24
+sff_dir_name_25 =sff25
+sff_dir_name_26 =sff26
+sff_dir_name_27 =sff27
+sff_dir_name_28 =sff28
+sff_dir_name_29 =sff29
+sff_dir_name_30 =sff30
+sff_dir_name_31 =sff31
+sff_dir_name_32 =sff32
+
+
+# configuration item: sff cpld register status
+# format: sff_cpld_reg_[sff_index]_[cpld_reg]
+# sff_index: start from 1
+# cpld_reg: 1: power_on, 2: tx_fault, 3: tx_dis, 4:pre_n, 5:rx_los
+# 6: reset, 7: lpmode, 8: module_present, 9: interrupt
+
+# sff cpld presence status
+sff_cpld_reg.mode_1_8=config
+sff_cpld_reg.src_1_8=cpld
+sff_cpld_reg.frmt_1_8=bit
+sff_cpld_reg.pola_1_8=negative
+sff_cpld_reg.addr_1_8=0x00030010
+sff_cpld_reg.len_1_8=1
+sff_cpld_reg.bit_offset_1_8=0
+
+sff_cpld_reg.mode_2_8=config
+sff_cpld_reg.src_2_8=cpld
+sff_cpld_reg.frmt_2_8=bit
+sff_cpld_reg.pola_2_8=negative
+sff_cpld_reg.addr_2_8=0x00030010
+sff_cpld_reg.len_2_8=1
+sff_cpld_reg.bit_offset_2_8=1
+
+sff_cpld_reg.mode_3_8=config
+sff_cpld_reg.src_3_8=cpld
+sff_cpld_reg.frmt_3_8=bit
+sff_cpld_reg.pola_3_8=negative
+sff_cpld_reg.addr_3_8=0x00030010
+sff_cpld_reg.len_3_8=1
+sff_cpld_reg.bit_offset_3_8=2
+
+sff_cpld_reg.mode_4_8=config
+sff_cpld_reg.src_4_8=cpld
+sff_cpld_reg.frmt_4_8=bit
+sff_cpld_reg.pola_4_8=negative
+sff_cpld_reg.addr_4_8=0x00030010
+sff_cpld_reg.len_4_8=1
+sff_cpld_reg.bit_offset_4_8=3
+
+sff_cpld_reg.mode_5_8=config
+sff_cpld_reg.src_5_8=cpld
+sff_cpld_reg.frmt_5_8=bit
+sff_cpld_reg.pola_5_8=negative
+sff_cpld_reg.addr_5_8=0x00030010
+sff_cpld_reg.len_5_8=1
+sff_cpld_reg.bit_offset_5_8=4
+
+sff_cpld_reg.mode_6_8=config
+sff_cpld_reg.src_6_8=cpld
+sff_cpld_reg.frmt_6_8=bit
+sff_cpld_reg.pola_6_8=negative
+sff_cpld_reg.addr_6_8=0x00030010
+sff_cpld_reg.len_6_8=1
+sff_cpld_reg.bit_offset_6_8=5
+
+sff_cpld_reg.mode_7_8=config
+sff_cpld_reg.src_7_8=cpld
+sff_cpld_reg.frmt_7_8=bit
+sff_cpld_reg.pola_7_8=negative
+sff_cpld_reg.addr_7_8=0x00030010
+sff_cpld_reg.len_7_8=1
+sff_cpld_reg.bit_offset_7_8=6
+
+sff_cpld_reg.mode_8_8=config
+sff_cpld_reg.src_8_8=cpld
+sff_cpld_reg.frmt_8_8=bit
+sff_cpld_reg.pola_8_8=negative
+sff_cpld_reg.addr_8_8=0x00030010
+sff_cpld_reg.len_8_8=1
+sff_cpld_reg.bit_offset_8_8=7
+
+sff_cpld_reg.mode_9_8=config
+sff_cpld_reg.src_9_8=cpld
+sff_cpld_reg.frmt_9_8=bit
+sff_cpld_reg.pola_9_8=negative
+sff_cpld_reg.addr_9_8=0x00030011
+sff_cpld_reg.len_9_8=1
+sff_cpld_reg.bit_offset_9_8=0
+
+sff_cpld_reg.mode_10_8=config
+sff_cpld_reg.src_10_8=cpld
+sff_cpld_reg.frmt_10_8=bit
+sff_cpld_reg.pola_10_8=negative
+sff_cpld_reg.addr_10_8=0x00030011
+sff_cpld_reg.len_10_8=1
+sff_cpld_reg.bit_offset_10_8=1
+
+sff_cpld_reg.mode_11_8=config
+sff_cpld_reg.src_11_8=cpld
+sff_cpld_reg.frmt_11_8=bit
+sff_cpld_reg.pola_11_8=negative
+sff_cpld_reg.addr_11_8=0x00030011
+sff_cpld_reg.len_11_8=1
+sff_cpld_reg.bit_offset_11_8=2
+
+sff_cpld_reg.mode_12_8=config
+sff_cpld_reg.src_12_8=cpld
+sff_cpld_reg.frmt_12_8=bit
+sff_cpld_reg.pola_12_8=negative
+sff_cpld_reg.addr_12_8=0x00030011
+sff_cpld_reg.len_12_8=1
+sff_cpld_reg.bit_offset_12_8=3
+
+sff_cpld_reg.mode_13_8=config
+sff_cpld_reg.src_13_8=cpld
+sff_cpld_reg.frmt_13_8=bit
+sff_cpld_reg.pola_13_8=negative
+sff_cpld_reg.addr_13_8=0x00030011
+sff_cpld_reg.len_13_8=1
+sff_cpld_reg.bit_offset_13_8=4
+
+sff_cpld_reg.mode_14_8=config
+sff_cpld_reg.src_14_8=cpld
+sff_cpld_reg.frmt_14_8=bit
+sff_cpld_reg.pola_14_8=negative
+sff_cpld_reg.addr_14_8=0x00030011
+sff_cpld_reg.len_14_8=1
+sff_cpld_reg.bit_offset_14_8=5
+
+sff_cpld_reg.mode_15_8=config
+sff_cpld_reg.src_15_8=cpld
+sff_cpld_reg.frmt_15_8=bit
+sff_cpld_reg.pola_15_8=negative
+sff_cpld_reg.addr_15_8=0x00030011
+sff_cpld_reg.len_15_8=1
+sff_cpld_reg.bit_offset_15_8=6
+
+sff_cpld_reg.mode_16_8=config
+sff_cpld_reg.src_16_8=cpld
+sff_cpld_reg.frmt_16_8=bit
+sff_cpld_reg.pola_16_8=negative
+sff_cpld_reg.addr_16_8=0x00030011
+sff_cpld_reg.len_16_8=1
+sff_cpld_reg.bit_offset_16_8=7
+
+sff_cpld_reg.mode_17_8=config
+sff_cpld_reg.src_17_8=cpld
+sff_cpld_reg.frmt_17_8=bit
+sff_cpld_reg.pola_17_8=negative
+sff_cpld_reg.addr_17_8=0x00040010
+sff_cpld_reg.len_17_8=1
+sff_cpld_reg.bit_offset_17_8=0
+
+sff_cpld_reg.mode_18_8=config
+sff_cpld_reg.src_18_8=cpld
+sff_cpld_reg.frmt_18_8=bit
+sff_cpld_reg.pola_18_8=negative
+sff_cpld_reg.addr_18_8=0x00040010
+sff_cpld_reg.len_18_8=1
+sff_cpld_reg.bit_offset_18_8=1
+
+sff_cpld_reg.mode_19_8=config
+sff_cpld_reg.src_19_8=cpld
+sff_cpld_reg.frmt_19_8=bit
+sff_cpld_reg.pola_19_8=negative
+sff_cpld_reg.addr_19_8=0x00040010
+sff_cpld_reg.len_19_8=1
+sff_cpld_reg.bit_offset_19_8=2
+
+sff_cpld_reg.mode_20_8=config
+sff_cpld_reg.src_20_8=cpld
+sff_cpld_reg.frmt_20_8=bit
+sff_cpld_reg.pola_20_8=negative
+sff_cpld_reg.addr_20_8=0x00040010
+sff_cpld_reg.len_20_8=1
+sff_cpld_reg.bit_offset_20_8=3
+
+sff_cpld_reg.mode_21_8=config
+sff_cpld_reg.src_21_8=cpld
+sff_cpld_reg.frmt_21_8=bit
+sff_cpld_reg.pola_21_8=negative
+sff_cpld_reg.addr_21_8=0x00040010
+sff_cpld_reg.len_21_8=1
+sff_cpld_reg.bit_offset_21_8=4
+
+sff_cpld_reg.mode_22_8=config
+sff_cpld_reg.src_22_8=cpld
+sff_cpld_reg.frmt_22_8=bit
+sff_cpld_reg.pola_22_8=negative
+sff_cpld_reg.addr_22_8=0x00040010
+sff_cpld_reg.len_22_8=1
+sff_cpld_reg.bit_offset_22_8=5
+
+sff_cpld_reg.mode_23_8=config
+sff_cpld_reg.src_23_8=cpld
+sff_cpld_reg.frmt_23_8=bit
+sff_cpld_reg.pola_23_8=negative
+sff_cpld_reg.addr_23_8=0x00040010
+sff_cpld_reg.len_23_8=1
+sff_cpld_reg.bit_offset_23_8=6
+
+sff_cpld_reg.mode_24_8=config
+sff_cpld_reg.src_24_8=cpld
+sff_cpld_reg.frmt_24_8=bit
+sff_cpld_reg.pola_24_8=negative
+sff_cpld_reg.addr_24_8=0x00040010
+sff_cpld_reg.len_24_8=1
+sff_cpld_reg.bit_offset_24_8=7
+
+sff_cpld_reg.mode_25_8=config
+sff_cpld_reg.src_25_8=cpld
+sff_cpld_reg.frmt_25_8=bit
+sff_cpld_reg.pola_25_8=negative
+sff_cpld_reg.addr_25_8=0x00040011
+sff_cpld_reg.len_25_8=1
+sff_cpld_reg.bit_offset_25_8=0
+
+sff_cpld_reg.mode_26_8=config
+sff_cpld_reg.src_26_8=cpld
+sff_cpld_reg.frmt_26_8=bit
+sff_cpld_reg.pola_26_8=negative
+sff_cpld_reg.addr_26_8=0x00040011
+sff_cpld_reg.len_26_8=1
+sff_cpld_reg.bit_offset_26_8=1
+
+sff_cpld_reg.mode_27_8=config
+sff_cpld_reg.src_27_8=cpld
+sff_cpld_reg.frmt_27_8=bit
+sff_cpld_reg.pola_27_8=negative
+sff_cpld_reg.addr_27_8=0x00040011
+sff_cpld_reg.len_27_8=1
+sff_cpld_reg.bit_offset_27_8=2
+
+sff_cpld_reg.mode_28_8=config
+sff_cpld_reg.src_28_8=cpld
+sff_cpld_reg.frmt_28_8=bit
+sff_cpld_reg.pola_28_8=negative
+sff_cpld_reg.addr_28_8=0x00040011
+sff_cpld_reg.len_28_8=1
+sff_cpld_reg.bit_offset_28_8=3
+
+sff_cpld_reg.mode_29_8=config
+sff_cpld_reg.src_29_8=cpld
+sff_cpld_reg.frmt_29_8=bit
+sff_cpld_reg.pola_29_8=negative
+sff_cpld_reg.addr_29_8=0x00040011
+sff_cpld_reg.len_29_8=1
+sff_cpld_reg.bit_offset_29_8=4
+
+sff_cpld_reg.mode_30_8=config
+sff_cpld_reg.src_30_8=cpld
+sff_cpld_reg.frmt_30_8=bit
+sff_cpld_reg.pola_30_8=negative
+sff_cpld_reg.addr_30_8=0x00040011
+sff_cpld_reg.len_30_8=1
+sff_cpld_reg.bit_offset_30_8=5
+
+sff_cpld_reg.mode_31_8=config
+sff_cpld_reg.src_31_8=cpld
+sff_cpld_reg.frmt_31_8=bit
+sff_cpld_reg.pola_31_8=negative
+sff_cpld_reg.addr_31_8=0x00040011
+sff_cpld_reg.len_31_8=1
+sff_cpld_reg.bit_offset_31_8=6
+
+sff_cpld_reg.mode_32_8=config
+sff_cpld_reg.src_32_8=cpld
+sff_cpld_reg.frmt_32_8=bit
+sff_cpld_reg.pola_32_8=negative
+sff_cpld_reg.addr_32_8=0x00040011
+sff_cpld_reg.len_32_8=1
+sff_cpld_reg.bit_offset_32_8=7
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/plat_sysfs_cfg/cfg_file_name b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/plat_sysfs_cfg/cfg_file_name
new file mode 100644
index 000000000000..5f49420441a5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/plat_sysfs_cfg/cfg_file_name
@@ -0,0 +1,4 @@
+WB_PLAT_CPLD
+WB_PLAT_FAN
+WB_PLAT_PSU
+WB_PLAT_SFF
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/setup.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/setup.py
new file mode 100644
index 000000000000..6c3916921abb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/setup.py
@@ -0,0 +1,39 @@
+from setuptools import setup
+
+setup(
+    name='sonic-platform',
+    version='1.0',
+    description='SONiC platform API implementation',
+    license='Apache 2.0',
+    author='SONiC Team',
+    author_email='support',
+    url='',
+    maintainer='support',
+    maintainer_email='',
+    packages=[
+        'sonic_platform',
+        'plat_hal',
+        'wbutil',
+        'eepromutil',
+        'hal-config',
+        'config',
+    ],
+    py_modules=[
+        'hal_pltfm',
+        'platform_util',
+        'platform_intf',
+    ],
+    classifiers=[
+        'Development Status :: 3 - Alpha',
+        'Environment :: Plugins',
+        'Intended Audience :: Developers',
+        'Intended Audience :: Information Technology',
+        'Intended Audience :: System Administrators',
+        'License :: OSI Approved :: Apache Software License',
+        'Natural Language :: English',
+        'Operating System :: POSIX :: Linux',
+        'Programming Language :: Python :: 3.7',
+        'Topic :: Utilities',
+    ],
+    keywords='sonic SONiC platform PLATFORM',
+)

From 2964b71e721ce9ea88e92471b77a602cf7f7b741 Mon Sep 17 00:00:00 2001
From: Arvindsrinivasan Lakshmi Narasimhan
 <55814491+arlakshm@users.noreply.github.com>
Date: Fri, 8 Nov 2024 11:28:38 -0800
Subject: [PATCH 186/364] Skip the lanes for host config DB for multi asic VS
 (#20727)

How I did it
Skip the lanes for host config DB for multi asic VS and add UT

How to verify it
UT and compile yang_mgmt and yang_model wheel package
---
 .../tests/yang_model_tests/tests/port.json    |  6 ++
 .../yang_model_tests/tests_config/port.json   | 67 +++++++++++++++++++
 .../yang-models/sonic-port.yang               |  4 +-
 3 files changed, 76 insertions(+), 1 deletion(-)

diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/port.json b/src/sonic-yang-models/tests/yang_model_tests/tests/port.json
index f53d19f42e63..3c0d59cc247d 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/port.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/port.json
@@ -174,6 +174,12 @@
     },
     "PORT_VOQ_CHASSIS_WITH_LANES": {
         "desc": "PORT_VOQ_CHASSIS_WITH_LANES no failure."
+    },
+    "PORT_WITH_NO_LANES_ON_MULT_ASIC_VS": {
+        "desc": "PORT_WITH_NO_LANES_ON_MULT_ASIC_VS no failure."
+    },
+    "PORT_WITH_NO_LANES_ON_MULT_ASIC_VS_2": {
+        "desc": "PORT_WITH_NO_LANES_ON_MULT_ASIC_VS_2 no failure."
     }
 
 
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
index bd375b73717b..005961c1daae 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
@@ -952,5 +952,72 @@
                 ]
             }
         }
+    },
+    "PORT_FABRIC_WITH_NO_LANES": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "switch_type": "fabric"
+                }
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "name": "Ethernet0",
+                        "alias": "etp1a",
+                        "speed": 100000,
+                        "role": "Int"
+                        
+                    }
+                ]
+            }
+        }
+    },
+    "PORT_WITH_NO_LANES_ON_MULT_ASIC_VS": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "hwsku": "msft_multi_asic_vs"
+                }
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "name": "Ethernet0",
+                        "alias": "etp1a",
+                        "speed": 100000,
+                        "role": "Int"
+                        
+                    }
+                ]
+            }
+        }
+    },
+    "PORT_WITH_NO_LANES_ON_MULT_ASIC_VS_2": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "hwsku": "msft_four_asic_vs"
+                }
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "name": "Ethernet0",
+                        "alias": "etp1a",
+                        "speed": 100000,
+                        "role": "Int"
+                        
+                    }
+                ]
+            }
+        }
     }
+
 }
diff --git a/src/sonic-yang-models/yang-models/sonic-port.yang b/src/sonic-yang-models/yang-models/sonic-port.yang
index 7d315626d5cf..528f661b8fcf 100644
--- a/src/sonic-yang-models/yang-models/sonic-port.yang
+++ b/src/sonic-yang-models/yang-models/sonic-port.yang
@@ -74,7 +74,9 @@ module sonic-port{
 					when "not(not(/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:asic_name) and
 					((/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:switch_type='voq') or 
 					(/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:switch_type='chassis-packet') or
-					(/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:switch_type='fabric')))";
+					(/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:switch_type='fabric') or
+					(/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:hwsku='msft_four_asic_vs') or 
+					(/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:hwsku='msft_multi_asic_vs')))";
 
 					description "Number of hardware lanes for the port. This is mandatory for all devices except for chassis devices";
 					mandatory true;

From c8e588808075ed02a92eb81cd1507df9cc2753ce Mon Sep 17 00:00:00 2001
From: prabhataravind <108555774+prabhataravind@users.noreply.github.com>
Date: Fri, 8 Nov 2024 12:06:31 -0800
Subject: [PATCH 187/364] [image_config]: Enable Receive Packet Steering (RPS)
 (#20211)

[image_config]: Enable Receive Packet Steering (RPS)

Signed-off-by: Prabhat Aravind <paravind@microsoft.com>
---
 .../build_templates/sonic_debian_extension.j2 |   8 +-
 files/image_config/rps/rps.py                 | 109 ++++++++++++++++++
 files/image_config/udev/rules.d/99-rps.rules  |   1 +
 3 files changed, 117 insertions(+), 1 deletion(-)
 create mode 100755 files/image_config/rps/rps.py
 create mode 100644 files/image_config/udev/rules.d/99-rps.rules

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index aa427f6157c1..8d529b2ec09e 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -515,8 +515,10 @@ sudo cp $IMAGE_CONFIGS/resolv-config/update-containers $FILESYSTEM_ROOT/etc/reso
 sudo cp $IMAGE_CONFIGS/interfaces/init_interfaces $FILESYSTEM_ROOT/etc/network/interfaces
 sudo mkdir -p $FILESYSTEM_ROOT/etc/network/interfaces.d
 
-# System'd network udev rules
+# Systemd network udev rules
 sudo cp $IMAGE_CONFIGS/systemd/network/* $FILESYSTEM_ROOT_ETC/systemd/network/
+sudo mkdir -p $FILESYSTEM_ROOT_ETC/udev/rules.d
+sudo cp $IMAGE_CONFIGS/udev/rules.d/* $FILESYSTEM_ROOT_ETC/udev/rules.d/
 
 # copy core file uploader files
 sudo cp $IMAGE_CONFIGS/corefile_uploader/core_uploader.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM
@@ -725,6 +727,10 @@ sudo cp $IMAGE_CONFIGS/backend_acl/backend-acl.service $FILESYSTEM_ROOT_USR_LIB_
 sudo cp $IMAGE_CONFIGS/backend_acl/backend_acl.py $FILESYSTEM_ROOT/usr/bin/backend_acl.py
 echo "backend-acl.service" | sudo tee -a $GENERATED_SERVICE_FILE
 
+# Copy RPS script file
+sudo cp $IMAGE_CONFIGS/rps/rps.py $FILESYSTEM_ROOT/usr/bin/rps.py
+sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/rps.py
+
 # Copy SNMP configuration files
 sudo cp $IMAGE_CONFIGS/snmp/snmp.yml $FILESYSTEM_ROOT/etc/sonic/
 
diff --git a/files/image_config/rps/rps.py b/files/image_config/rps/rps.py
new file mode 100755
index 000000000000..df1dbf5a3ccd
--- /dev/null
+++ b/files/image_config/rps/rps.py
@@ -0,0 +1,109 @@
+#!/usr/bin/env python3
+"""
+    Script to enable Receive Packet Steering (RPS).
+    This script reads the number of available CPUs in the system
+    and configures RPS on all front-panel ports using sysfs.
+"""
+import os
+import sys
+import syslog
+import argparse
+
+def write_syslog(message, *args):
+    """
+    Write a message to syslog.
+
+    Args:
+        message (str): Message string to be logged
+        args: Optional args
+
+    Returns:
+        None
+    """
+
+    if args:
+        message %= args
+    syslog.syslog(syslog.LOG_NOTICE, message)
+
+
+def get_num_cpus():
+    """
+    Get number of CPUs in the system.
+
+    Returns:
+        ncpus (int): Number of CPUs
+    """
+    ncpus = 0
+    cpu_count = os.cpu_count()
+    if cpu_count is not None:
+        ncpus = cpu_count
+
+    return ncpus
+
+
+def get_cpumask(ncpus):
+    """
+    Get a hex cpumask string.
+
+    Args:
+        ncpus (int): Number of CPUs
+
+    Returns:
+        cpu_mask (str): CPU mask as hex string
+    """
+    cpu_mask = '0'
+    if isinstance(ncpus, int) and ncpus >= 0:
+        cpu_mask = hex(pow(2, ncpus) - 1)[2:]
+
+    return cpu_mask
+
+
+def configure_rps(intf):
+    """
+    Configure Receive Packet Steering (RPS)
+
+    Returns:
+        rv (int): zero for success and non-zero otherwise
+    """
+    rv = 0
+    NET_DIR_PATH = "/sys/class/net"
+
+    num_cpus = get_num_cpus()
+    if not num_cpus:
+        rv = -1
+        return rv
+
+    cpumask = get_cpumask(num_cpus)
+    if cpumask == '0':
+        # Nothing to do
+        return rv
+
+    queues_path = os.path.join(NET_DIR_PATH, intf, "queues")
+    queues = os.listdir(queues_path)
+    num_rx_queues = len([q for q in queues if q.startswith("rx")])
+    for q in range(num_rx_queues):
+        rps_cpus_path = os.path.join(queues_path, "rx-{}", "rps_cpus").format(q)
+        with open(rps_cpus_path, 'w') as file:
+            file.write(cpumask)
+
+    return rv
+
+
+def main():
+    rv = -1
+    try:
+        parser = argparse.ArgumentParser(description='Configure RPS.')
+        parser.add_argument('interface', type=str, help='Network interface')
+        args = parser.parse_args()
+        rv = configure_rps(args.interface)
+        write_syslog("configure_rps {} for interface {}".format
+                    ("failed" if rv else "successful", args.interface))
+    except Exception as e:
+        write_syslog("configure_rps exception: {}".format(str(e)))
+
+    sys.exit(rv)
+
+
+if __name__ == "__main__":
+    main()
+
diff --git a/files/image_config/udev/rules.d/99-rps.rules b/files/image_config/udev/rules.d/99-rps.rules
new file mode 100644
index 000000000000..2e98cfe7e07d
--- /dev/null
+++ b/files/image_config/udev/rules.d/99-rps.rules
@@ -0,0 +1 @@
+ACTION=="add", SUBSYSTEM=="net", KERNEL=="Ethernet*", RUN+="/usr/bin/rps.py %k"

From 045dc5f4e3479034ebdf0033cf4f120339059c6e Mon Sep 17 00:00:00 2001
From: Vijaya Kumar Abbaraju <vijaya-kumar.abbaraju@broadcom.com>
Date: Tue, 12 Nov 2024 03:14:36 +0530
Subject: [PATCH 188/364] Changes to handle PAC operational info (#18618)

---
 src/sonic-pac/pacoper/Makefile.am      |  17 ++
 src/sonic-pac/pacoper/pacoper.cpp      | 274 +++++++++++++++++++++++++
 src/sonic-pac/pacoper/pacoper.h        |  48 +++++
 src/sonic-pac/pacoper/pacoper_common.h |  64 ++++++
 4 files changed, 403 insertions(+)
 create mode 100755 src/sonic-pac/pacoper/Makefile.am
 create mode 100644 src/sonic-pac/pacoper/pacoper.cpp
 create mode 100644 src/sonic-pac/pacoper/pacoper.h
 create mode 100644 src/sonic-pac/pacoper/pacoper_common.h

diff --git a/src/sonic-pac/pacoper/Makefile.am b/src/sonic-pac/pacoper/Makefile.am
new file mode 100755
index 000000000000..9cfcb9001fa3
--- /dev/null
+++ b/src/sonic-pac/pacoper/Makefile.am
@@ -0,0 +1,17 @@
+INCLUDES =  -I $(top_srcdir)/pacoper -I $(top_srcdir)/authmgr/common -I $(top_srcdir)/authmgr/mapping/include -I $(top_srcdir)/fpinfra/inc -I $(top_srcdir)/authmgr/protocol/include 
+
+lib_LTLIBRARIES = libpacoper.la 
+
+if DEBUG
+DBGFLAGS = -ggdb -DDEBUG
+else
+DBGFLAGS = -g -DNDEBUG
+endif
+
+
+libpacoper_la_SOURCES = $(top_srcdir)/pacoper/pacoper.cpp
+
+AM_CPPFLAGS = $(DBGFLAGS) $(AM_CFLAGS) $(SONIC_COMMON_CFLAGS) $(CFLAGS_COMMON)
+#libipacoper_la_CPPFLAGS = $(DBGFLAGS) $(CFLAGS_COMMON)
+
+libpacoper_la_LIBADD = -lswsscommon -lnl-3 -lnl-route-3 -lhiredis $(SONIC_COMMON_LDFLAGS) -L$(top_srcdir)/fpinfra -lfpinfra
diff --git a/src/sonic-pac/pacoper/pacoper.cpp b/src/sonic-pac/pacoper/pacoper.cpp
new file mode 100644
index 000000000000..6babfdaaf2eb
--- /dev/null
+++ b/src/sonic-pac/pacoper/pacoper.cpp
@@ -0,0 +1,274 @@
+/*
+ * Copyright 2021 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <netinet/in.h>
+#include <arpa/inet.h>
+#include "pacoper.h"
+#include "pacoper_common.h"
+#include "nimapi.h"
+#include "resources.h"
+
+std::vector<std::string> authMgrMethod {"none", "802.1x", "mab"};
+
+std::vector<std::string> userMgrAuthMethod {"undefined", "local", 
+                                            "none", "radius"};
+                                            
+std::vector<std::string> authMgrPortStatus {"na", "authorized", "unauthorized"};
+
+std::vector<std::string> vlanType {"Unassigned", "RADIUS",
+                                   "Default", "Blocked"};
+
+FpDbAdapter::FpDbAdapter( DBConnector *stateDb, DBConnector *configDb, DBConnector *appDb) :
+                                    m_PacGlobalOperTbl(stateDb, STATE_PAC_GLOBAL_OPER_TABLE),
+                                    m_PacPortOperTbl(stateDb, STATE_PAC_PORT_OPER_TABLE),
+                                    m_PacAuthClientOperTbl(stateDb, STATE_PAC_AUTHENTICATED_CLIENT_OPER_TABLE)
+{
+}
+
+DBConnector *stateDb = new DBConnector("STATE_DB", 0);
+DBConnector *configDb = new DBConnector("CONFIG_DB", 0);
+DBConnector *appDb = new DBConnector("APPL_DB", 0);
+FpDbAdapter * Fp = new FpDbAdapter(stateDb, configDb, appDb);
+
+
+string fetch_interface_name(int intIfNum)
+{
+  string name("");
+   char8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+
+  if (nimGetIntfName(intIfNum,  ALIASNAME, ( uchar8*)ifName) !=  SUCCESS)
+  {
+	   return "FAILURE";
+  }
+  
+  name = ifName;
+  return name;
+}
+
+void PacAuthClientOperTblSet(uint32 intIfNum,  enetMacAddr_t macAddr, 
+                            pac_authenticated_clients_oper_table_t *client_info)
+{
+  vector<FieldValueTuple> fvs;
+  char c[18];
+  unsigned int i;
+  string serverState("");
+  string serverClass("");
+   enetMacAddr_t zeroMac;
+
+  SWSS_LOG_NOTICE("----- PacAuthClientOperTbl func called from AuthMgr -----");
+
+  memset (&zeroMac, 0, sizeof ( enetMacAddr_t));
+  if (0 == memcmp (zeroMac.addr, macAddr.addr,  ENET_MAC_ADDR_LEN))
+  {
+    return;
+  }
+
+  if ( AUTHMGR_PORT_STATUS_AUTHORIZED != client_info->auth_status)
+  {
+    return;
+  }
+
+  string userName(client_info->userName, 
+                  client_info->userName + 
+                  sizeof(client_info->userName)/sizeof(client_info->userName[0]));  
+
+  memset(c, 0, sizeof(c));
+
+  sprintf(c, "%02X:%02X:%02X:%02X:%02X:%02X",
+          macAddr.addr[0], macAddr.addr[1], macAddr.addr[2],
+          macAddr.addr[3], macAddr.addr[4], macAddr.addr[5]);
+
+  string macAddress(c);
+
+  string interfaceName = fetch_interface_name(intIfNum);
+
+  string key = interfaceName + "|";
+
+  key += macAddress;
+
+  fvs.emplace_back("current_id", to_string(client_info->currentIdL));
+  fvs.emplace_back("auth_status", authMgrPortStatus[client_info->auth_status]);
+  fvs.emplace_back("authenticated_method", authMgrMethod[client_info->authenticatedMethod]);
+
+  for (i = 0; i < client_info->serverStateLen; i++) 
+  {
+    memset(c, 0, sizeof(c));
+    sprintf(c, "%02X", client_info->serverState[i]);
+    serverState += c;
+  }
+
+  fvs.emplace_back("server_state", serverState);
+  fvs.emplace_back("server_state_len", to_string(client_info->serverStateLen));
+
+  for (i = 0; i < client_info->serverClassLen; i++) 
+  {
+    memset(c, 0, sizeof(c));
+    sprintf(c, "%02X", client_info->serverClass[i]);
+    serverState += c;
+  }
+
+  fvs.emplace_back("server_class", serverClass);
+  fvs.emplace_back("server_class_len", to_string(client_info->serverClassLen));
+
+  fvs.emplace_back("session_timeout_RADIUS", to_string(client_info->sessionTimeoutRcvdFromRadius));
+  fvs.emplace_back("session_timeout_oper", to_string(client_info->sessionTimeoutOper));
+  fvs.emplace_back("user_name", userName);
+  fvs.emplace_back("user_name_len", to_string(client_info->userNameLen));
+  fvs.emplace_back("termination_action", to_string(client_info->terminationAction));
+  fvs.emplace_back("vlan_id", to_string(client_info->vlanId));
+  fvs.emplace_back("vlan_type", vlanType[client_info->vlanType]);
+  fvs.emplace_back("backend_auth_method", userMgrAuthMethod[client_info->backend_auth_method]);
+  fvs.emplace_back("session_time", to_string(client_info->sessionTime));
+  fvs.emplace_back("termination_action_time_left", to_string(client_info->lastAuthTime));
+
+  Fp->m_PacAuthClientOperTbl.set(key, fvs);
+
+ }
+
+void PacAuthClientOperTblDel(uint32 intIfNum,  enetMacAddr_t macAddr)
+{
+  string interfaceName = fetch_interface_name(intIfNum);
+
+  char c[18];
+
+  sprintf(c, "%02X:%02X:%02X:%02X:%02X:%02X",
+          macAddr.addr[0], macAddr.addr[1], macAddr.addr[2],
+          macAddr.addr[3], macAddr.addr[4], macAddr.addr[5]);
+
+  string macAddress(c);
+
+  string key = interfaceName + "|";
+  key += macAddress;
+
+  Fp->m_PacAuthClientOperTbl.del(key);
+
+}
+
+void PacAuthClientOperTblCleanup(void)
+{
+   vector<string> keys;
+   Fp->m_PacAuthClientOperTbl.getKeys(keys);
+   for (const auto key : keys)
+   {
+      Fp->m_PacAuthClientOperTbl.del(key);
+   }
+}
+
+void PacGlobalOperTblSet(pac_global_oper_table_t *info)
+{
+  vector<FieldValueTuple> fvs;
+  
+  SWSS_LOG_NOTICE("----- PacOperTbl API called from AuthMgr -----");
+
+  fvs.emplace_back("num_clients_authenticated", to_string(info->authCount));
+  fvs.emplace_back("num_clients_authenticated_monitor", to_string(info->authCountMonMode));
+
+  Fp->m_PacGlobalOperTbl.set("GLOBAL", fvs);
+}
+
+void PacGlobalOperTblCleanup(void)
+{
+   vector<string> keys;
+   Fp->m_PacGlobalOperTbl.getKeys(keys);
+   for (const auto key : keys)
+   {
+      Fp->m_PacGlobalOperTbl.del(key);
+   }
+}
+
+void PacPortOperTblSet(uint32 intIfNum,  AUTHMGR_METHOD_t *enabledMethods, 
+                        AUTHMGR_METHOD_t *enabledPriority)
+{
+  vector<FieldValueTuple> fvs;
+  uint32 idx;
+  string methods("");
+  string priorities("");
+  
+  SWSS_LOG_NOTICE("----- PacPortOperTbl API called from AuthMgr -----");
+
+  string key = fetch_interface_name(intIfNum);
+
+  for (idx = 0; idx < 2; idx++)
+  {
+    if (idx != 0)
+    {
+      methods += ",";
+    }
+     
+    if (!enabledMethods[idx])
+    {
+      methods += "undefined"; 
+    }
+    else
+    {
+      if ( AUTHMGR_METHOD_8021X == enabledMethods[idx])
+      {
+        methods += "dot1x"; 
+      }
+      else if ( AUTHMGR_METHOD_MAB == enabledMethods[idx])
+      {
+        methods += "mab"; 
+      }
+    }
+  }
+
+  for (idx = 0; idx < 2; idx++)
+  {
+    if (idx != 0)
+    {
+      priorities += ",";
+    }
+    if (!enabledPriority[idx])
+    {
+      priorities += "undefined"; 
+    }
+    else
+    {
+      if ( AUTHMGR_METHOD_8021X == enabledPriority[idx])
+      {
+        priorities += "dot1x"; 
+      }
+      else if ( AUTHMGR_METHOD_MAB == enabledPriority[idx])
+      {
+        priorities += "mab"; 
+      }
+    }
+  }
+
+  fvs.emplace_back("enabled_method_list@", methods);
+  fvs.emplace_back("enabled_priority_list@", priorities);
+  
+  Fp->m_PacPortOperTbl.set(key, fvs);
+}
+
+void PacPortOperTblCleanup(void)
+{
+   vector<string> keys;
+   Fp->m_PacPortOperTbl.getKeys(keys);
+   for (const auto key : keys)
+   {
+      Fp->m_PacPortOperTbl.del(key);
+   }
+}
+
+
+void PacOperTblCleanup(void)
+{
+   PacAuthClientOperTblCleanup();
+   PacGlobalOperTblCleanup();
+}
+
+
diff --git a/src/sonic-pac/pacoper/pacoper.h b/src/sonic-pac/pacoper/pacoper.h
new file mode 100644
index 000000000000..012af49894f2
--- /dev/null
+++ b/src/sonic-pac/pacoper/pacoper.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright 2021 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef PACOPER_H
+#define PACOPER_H
+
+#include <vector>
+#include <swss/dbconnector.h>
+#include <swss/schema.h>
+#include <swss/table.h>
+#include <swss/macaddress.h>
+#include <swss/producerstatetable.h>
+#include <swss/table.h>
+#include <swss/select.h>
+#include <swss/timestamp.h>
+#include <swss/redisapi.h>
+#include <swss/tokenize.h>
+
+using namespace swss;
+using namespace std;
+
+#define AUTHMGR_MAX_HISTENT_PER_INTERFACE   48
+
+class FpDbAdapter {
+public:
+    FpDbAdapter(DBConnector *stateDb, DBConnector *configDb, DBConnector *appDb);
+    Table m_PacGlobalOperTbl;
+    Table m_PacPortOperTbl;
+    Table m_PacAuthClientOperTbl;
+
+private:
+};
+
+string fetch_interface_name(int);
+
+#endif /* PACOPER_H */
diff --git a/src/sonic-pac/pacoper/pacoper_common.h b/src/sonic-pac/pacoper/pacoper_common.h
new file mode 100644
index 000000000000..d52318372eb0
--- /dev/null
+++ b/src/sonic-pac/pacoper/pacoper_common.h
@@ -0,0 +1,64 @@
+/* USE C Declarations */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//#include "single.h"
+#include "datatypes.h"
+#include "packet.h"
+#include "auth_mgr_exports.h"
+#include "auth_mgr_common.h"
+
+typedef struct pac_global_oper_table_s
+{
+  /* number of authorized clients */
+  uint32         authCount;       
+  /* number of authorized clients in monitor mode */
+  uint32         authCountMonMode;       
+}pac_global_oper_table_t;
+
+typedef struct pac_port_oper_table_s
+{
+  /* Authentication methods */
+   AUTHMGR_METHOD_t           enabledMethods[AUTHMGR_METHOD_LAST];
+  /* Authentication priority */
+   AUTHMGR_METHOD_t           enabledPriority[AUTHMGR_METHOD_LAST];
+}pac_port_oper_table_t;
+
+typedef struct pac_authenticated_clients_oper_table_s
+{
+   uchar8                 currentIdL;       /* ID of current auth session (0-255) */
+   AUTHMGR_PORT_STATUS_t  auth_status;
+   AUTHMGR_METHOD_t       authenticatedMethod;
+   uchar8                 serverState[AUTHMGR_SERVER_STATE_LEN];
+  uint32                 serverStateLen;
+   uchar8                 serverClass[AUTHMGR_SERVER_CLASS_LEN];
+  uint32                 serverClassLen;
+  uint32                 sessionTimeoutRcvdFromRadius;
+  uint32                 sessionTimeoutOper;
+   char8                  userName[AUTHMGR_USER_NAME_LEN];
+  uint32                 userNameLen;
+  uint32                 terminationAction;
+  authmgrVlanType_t         vlanType;     /* assigned vlan category */
+  uint32                 vlanId;
+  uint32                 sessionTime;
+  uint32                 lastAuthTime;
+   USER_MGR_AUTH_METHOD_t backend_auth_method;
+
+}pac_authenticated_clients_oper_table_t;
+
+
+void PacAuthClientOperTblSet(uint32 intIfNum,  enetMacAddr_t macAddr, 
+                            pac_authenticated_clients_oper_table_t *client_info);
+void PacAuthClientOperTblDel(uint32 intIfNum,  enetMacAddr_t macAddr);
+
+void PacGlobalOperTblSet(pac_global_oper_table_t *info);
+
+void PacPortOperTblSet(uint32 intIfNum,  AUTHMGR_METHOD_t *enabledMethods, 
+                        AUTHMGR_METHOD_t *enabledPriority);
+
+void PacOperTblCleanup(void);
+
+#ifdef __cplusplus
+}
+#endif

From 3e5f024aaedd32976c527292fc04f750ca80c088 Mon Sep 17 00:00:00 2001
From: Pavan Prakash <120486223+Pavan-Nokia@users.noreply.github.com>
Date: Mon, 11 Nov 2024 20:57:48 -0500
Subject: [PATCH 189/364] [Nokia-7215-A1] Update platform to add DC support
 (#20592)

1) Add support for DC PSU
2) Enhance watchdog service
---
 .../7215-a1/service/cpu_wdt.service           |  1 +
 .../7215-a1/sonic_platform/chassis.py         |  2 +-
 .../7215-a1/sonic_platform/eeprom.py          |  4 ++--
 .../7215-a1/sonic_platform/fan.py             |  2 +-
 .../7215-a1/sonic_platform/psu.py             | 22 ++++++++++++++++---
 .../sonic-platform-nokia-7215-a1.postinst     |  1 +
 6 files changed, 25 insertions(+), 7 deletions(-)

diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/service/cpu_wdt.service b/platform/marvell/sonic-platform-nokia/7215-a1/service/cpu_wdt.service
index 761deec569cc..993070a14a2a 100644
--- a/platform/marvell/sonic-platform-nokia/7215-a1/service/cpu_wdt.service
+++ b/platform/marvell/sonic-platform-nokia/7215-a1/service/cpu_wdt.service
@@ -1,5 +1,6 @@
 [Unit]
 Description=CPU WDT
+Conflicts=watchdog-control.service
 After=nokia-7215init.service
 [Service]
 ExecStart=/usr/local/bin/cpu_wdt.py
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/chassis.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/chassis.py
index 41d600147bd9..6fdec26ec5bc 100644
--- a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/chassis.py
+++ b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/chassis.py
@@ -98,7 +98,7 @@ def __init__(self):
                 self._fan_list.append(fan)
 
         for i in range(MAX_7215_PSU):
-            psu = Psu(i)
+            psu = Psu(i, self.get_model())
             self._psu_list.append(psu)
 
         for i in range(MAX_7215_THERMAL):
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/eeprom.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/eeprom.py
index b9f770abf906..914c08cfc0cd 100644
--- a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/eeprom.py
+++ b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/eeprom.py
@@ -40,13 +40,13 @@ def __init__(self, is_psu=False, psu_index=0, is_fan=False, fan_index=0):
             if self.is_psu_eeprom:
                 self.index = psu_index
                 self.part_number = '1'
-                self.model_str = 'PJT-12V100WBBA'
+                self.model_str = 'NA'
                 self.serial_number = 'NA'               
 
             if self.is_fan_eeprom:
                 self.index = fan_index
                 self.part_number = '1'
-                self.model_str = 'FFB0412UHN-BC2EA12'
+                self.model_str = 'NA'
                 self.serial_number = 'NA'                
 
 
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/fan.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/fan.py
index a8891a51f0f0..32a9bb21d9aa 100644
--- a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/fan.py
+++ b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/fan.py
@@ -181,7 +181,7 @@ def get_direction(self):
         """
         ch_model=self.get_chassis_model()
         #compare first 8 characters of chassis molel string
-        if(ch_model[:8]=='3HE18723'):
+        if(ch_model[:8]=='3HE18723' or ch_model[:8]=='3HE20994' ):
             direction = 'intake'
         else:
             direction = 'exhaust'
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/psu.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/psu.py
index 8249954932ff..356e01500f69 100644
--- a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/psu.py
+++ b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/psu.py
@@ -25,12 +25,12 @@
 class Psu(PsuBase):
     """Nokia platform-specific PSU class for 7215 """
 
-    def __init__(self, psu_index):
+    def __init__(self, psu_index, chassis_model):
         PsuBase.__init__(self)
         # PSU is 1-based in Nokia platforms
         self.index = psu_index + 1
         self._fan_list = []
-        
+        self.chassis_model = chassis_model
 
         # PSU eeprom
         self.eeprom = Eeprom(is_psu=True, psu_index=self.index)
@@ -90,7 +90,16 @@ def _get_active_psus(self):
         active_psus = int(psu1_good) + int(psu2_good)
         
         return active_psus
+    
+    def get_chassis_model(self):
+        """
+        Retrieves the model number of the Fan
 
+        Returns:
+            string: Model number of Fan. Use part number for this.
+        """
+        return self.chassis_model
+    
     def get_name(self):
         """
         Retrieves the name of the device
@@ -118,7 +127,14 @@ def get_model(self):
         Returns:
             string: Part number of PSU
         """
-        return self.eeprom.modelstr()
+        ch_model=self.get_chassis_model()
+        #compare first 8 characters of chassis molel string
+        if(ch_model[:8]=='3HE18723' or ch_model[:8]=='3HE18724' ):
+            model = 'AC-PSU'
+        else:
+            model = 'DC-PSU'
+
+        return model
 
     def get_serial(self):
         """
diff --git a/platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215-a1.postinst b/platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215-a1.postinst
index 949cd1a289ef..e5a3c2e1697c 100644
--- a/platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215-a1.postinst
+++ b/platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215-a1.postinst
@@ -26,6 +26,7 @@ case "$1" in
         systemctl enable nokia-7215init.service
         systemctl start nokia-7215init.service
 
+        systemctl mask --now watchdog-control.service
         systemctl enable cpu_wdt.service
         systemctl start cpu_wdt.service
 

From bd6ac788eefab34e5509026456807a0259ecca39 Mon Sep 17 00:00:00 2001
From: JunhongMao <134556118+JunhongMao@users.noreply.github.com>
Date: Tue, 12 Nov 2024 12:35:28 -0500
Subject: [PATCH 190/364] To fix: redis-cli build broken on Debian/Bookworm
 (librdb use-after-free) (#20759)

Fix https://github.com/sonic-net/sonic-buildimage/issues/20757

Why I did it
To Fix the issue: redis-cli build broken on Debian/Bookworm (librdb use-after-free)
#20757

How I did it
This issue is a known open issue below:
redis/librdb#55

According to Walter Doekes's solution, currently to work around it by adding -floto=auto compiler option.

	make -j$(SONIC_CONFIG_MAKE_JOBS) WARNS='-Wall -Wextra -pedantic -flto=auto'
---
 src/rdb-cli/Makefile | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/src/rdb-cli/Makefile b/src/rdb-cli/Makefile
index b9aedad6f657..153c2bcfac22 100644
--- a/src/rdb-cli/Makefile
+++ b/src/rdb-cli/Makefile
@@ -8,7 +8,8 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	rm -rf ./librdb
 	git clone https://github.com/redis/librdb.git
 	pushd ./librdb/
-	git checkout 2fdfc0c2bc914d643fe3f86e6715aeb843d8966e
+	git checkout tags/v1.0.0
 	git submodule update --init --recursive	
-	make -j$(SONIC_CONFIG_MAKE_JOBS)
+	# Set WARNS=... to work around https://github.com/redis/librdb/issues/55
+	make -j$(SONIC_CONFIG_MAKE_JOBS) WARNS='-Wall -Wextra -pedantic -flto=auto'
 	mv bin/rdb-cli $(DEST)/

From 95e2b3bf881058fe7a6caf13f18f08df38649130 Mon Sep 17 00:00:00 2001
From: "Marty Y. Lok" <76118573+mlok-nokia@users.noreply.github.com>
Date: Tue, 12 Nov 2024 23:21:31 -0500
Subject: [PATCH 191/364] [Supervisor][fabric] Fix the error message for
 non-present fabric card during config reload on SUP (#19778)

* [Supervisor][fabric] Fix the error message for non-present fabric card during config reload on SUP

Added checking to the docker_image_ctrl.j2 stop() method. This change adds code to check if related container exists, then call container stop. Otherwise, just log a message to indicate that "No such container". Fixes #19765

---------

Signed-off-by: mlok <marty.lok@nokia.com>
---
 files/build_templates/docker_image_ctl.j2 | 17 ++++++++++++-----
 1 file changed, 12 insertions(+), 5 deletions(-)

diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index f1757f69ba42..67add27cea53 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -734,13 +734,20 @@ stop() {
     if [[ "$DEV" && $DATABASE_TYPE != "dpudb" ]]; then
         ip netns delete "$NET_NS"
     fi
-    {%- elif docker_container_name == "teamd" %}
-    # Longer timeout of 60 sec to wait for Portchannels to be cleaned.
-    /usr/local/bin/container stop -t 60 $DOCKERNAME
+    {%- else %}
+    container_id=$(docker ps --filter "name=$DOCKERNAME" --quiet)
+    if [ -z "$container_id" ]; then
+        echo "container stop $DOCKERNAME - No such container: $DOCKERNAME"
+    else
+    {%- if docker_container_name == "teamd" %}
+        # Longer timeout of 60 sec to wait for Portchannels to be cleaned.
+        /usr/local/bin/container stop -t 60 $DOCKERNAME
     {%- elif docker_container_name in ["swss", "syncd"] and enable_asan == "y" %}
-    /usr/local/bin/container stop -t 60 $DOCKERNAME
+        /usr/local/bin/container stop -t 60 $DOCKERNAME
     {%- else %}
-    /usr/local/bin/container stop $DOCKERNAME
+        /usr/local/bin/container stop $DOCKERNAME
+    {%- endif %}
+    fi
     {%- endif %}
 }
 

From 6dd2a1f22bf10ce4b194fcb416ab80404ed19422 Mon Sep 17 00:00:00 2001
From: Pavan Naregundi <92989231+pavannaregundi@users.noreply.github.com>
Date: Wed, 13 Nov 2024 12:43:32 +0530
Subject: [PATCH 192/364] [Marvell-armhf] Fix SDK DMA allocation failure
 (#20165)

Why I did it
Fix DMA memory allocation failure seen when SDK drivers where failed to find size aligned memory.
pci 0000:01:00.0: dma_alloc_coherent failed to allocate aligned size of 0x200000 for phys0xbf300000

How I did it
Fix DMA driver alloc failure by adding more retries and moving the free for unaligned allocation to the end of allocation logic.
Increase CMA memory to 32MB to allow for more retries.

How to verify it
Run SONIC PTF with fixes for armhf-nokia_ixs7215_52x-r0 platform.

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>
---
 device/nokia/armhf-nokia_ixs7215_52x-r0/installer.conf | 1 +
 platform/marvell/mrvl-prestera                         | 2 +-
 platform/marvell/platform_armhf.conf                   | 2 +-
 3 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/installer.conf b/device/nokia/armhf-nokia_ixs7215_52x-r0/installer.conf
index b138f294e1ea..115b3099d4e3 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/installer.conf
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/installer.conf
@@ -1 +1,2 @@
 VAR_LOG_SIZE=4096
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="cma=32M@0-3G"
diff --git a/platform/marvell/mrvl-prestera b/platform/marvell/mrvl-prestera
index 36fa3a3f4e31..9608c8c41e46 160000
--- a/platform/marvell/mrvl-prestera
+++ b/platform/marvell/mrvl-prestera
@@ -1 +1 @@
-Subproject commit 36fa3a3f4e317d8c0c111cc74aafffce12e1546d
+Subproject commit 9608c8c41e462998cd144ed34780e34f1b48e081
diff --git a/platform/marvell/platform_armhf.conf b/platform/marvell/platform_armhf.conf
index 9c3568957914..dd7c972b9389 100644
--- a/platform/marvell/platform_armhf.conf
+++ b/platform/marvell/platform_armhf.conf
@@ -193,7 +193,7 @@ prepare_boot_menu() {
     BORDER='echo "---------------------------------------------------";echo;'
     fw_setenv ${FW_ARG} print_menu "$BORDER $BOOT1 $BOOT2 $BOOT3 $BORDER" > /dev/null
 
-    fw_setenv ${FW_ARG} linuxargs "net.ifnames=0 loopfstype=squashfs loop=$image_dir/$FILESYSTEM_SQUASHFS systemd.unified_cgroup_hierarchy=0 varlog_size=$VAR_LOG_SIZE loglevel=4 ${extra_cmdline_linux}" > /dev/null
+    fw_setenv ${FW_ARG} linuxargs "net.ifnames=0 loopfstype=squashfs loop=$image_dir/$FILESYSTEM_SQUASHFS systemd.unified_cgroup_hierarchy=0 varlog_size=$VAR_LOG_SIZE loglevel=4 ${extra_cmdline_linux} ${ONIE_PLATFORM_EXTRA_CMDLINE_LINUX}" > /dev/null
     fw_setenv ${FW_ARG} linuxargs_old "net.ifnames=0 loopfstype=squashfs loop=$image_dir_old/$FILESYSTEM_SQUASHFS systemd.unified_cgroup_hierarchy=0 varlog_size=$VAR_LOG_SIZE loglevel=4" > /dev/null
 
     # Set boot configs

From a7a0caed00766bc5703295e5d09fee11cbf02cf8 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 13 Nov 2024 19:03:16 +0800
Subject: [PATCH 193/364] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#20746)

#### Why I did it
src/sonic-host-services
```
* ff73070 - (HEAD -> master, origin/master, origin/HEAD) Add execute_reboot dbus_interface (#164) (4 days ago) [Vasundhara Volam]
* fec6080 - DBUS API for GNOI System.SetPackage (#171) (4 days ago) [Dawei Huang]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index 13a5419eaf9e..ff73070d7def 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit 13a5419eaf9e4f7795aa1df465bb7a1340bfa2d5
+Subproject commit ff73070d7def8689bc92dd0e28d3dab5d0254450

From e684523fc702d2d9147a0328fd53b684705402f7 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 13 Nov 2024 19:03:34 +0800
Subject: [PATCH 194/364] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#20707)

#### Why I did it
src/sonic-sairedis
```
* 866985fa - (HEAD -> master, origin/master, origin/HEAD) [DASH] Add meter rule bulk support and test to syncd (#1456) (35 hours ago) [Mukesh Moopath Velayudhan]
* c4aea50e - Do not poll counters in bulk mode during initialization for objects that support bulk per CLI option (#1437) (6 days ago) [Stephen Sun]
* 3428ffdd - Adding vpp platform (#1424) (6 days ago) [yue-fred-gao]
* 0317b16e - Do not enter vendor SAI critical section for counter polling/clearing operations (#1450) (7 days ago) [Stephen Sun]
* 90c79c77 - [azpipeline] Fix gcovr nested directory (#1451) (8 days ago) [Kamil Cudnik]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index e394ced725fc..866985fad6bc 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit e394ced725fc42b6a33612f4b45d1c9630d52dcf
+Subproject commit 866985fad6bc4f7c7291c19d6655489695a313f3

From 8dd1d98d2c7a524b37664b817bea51247b459e3f Mon Sep 17 00:00:00 2001
From: mihirpat1 <112018033+mihirpat1@users.noreply.github.com>
Date: Wed, 13 Nov 2024 10:16:41 -0800
Subject: [PATCH 195/364] [Mellanox] Enable get_rx_los API support in CMIS
 cable host mgmt mode (#20743)

- Why I did it
The show int transceiver status PORT CLI always displays Rx LOS as False for all the lanes.

- How I did it
The current platform implementation assigns Rx LOS as False for all the lanes (irrespective of the actual status on the module) which in turn causes the show int transceiver status PORT CLI to display the Rx LOS as False for all the lanes.

Hence, removing the overriding part to ensure that the API is not overridden by the platform.

- How to verify it
Verified the CLI on first 2 lanes which are in admin disabled state from the peer side.

---------
Signed-off-by: Mihir Patel <patelmi@microsoft.com>
---
 platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index e2c6d63dc7a3..aa3e188ae5f7 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -815,6 +815,11 @@ def get_rx_los(self):
             list: [False] * channels
         """
         api = self.get_xcvr_api()
+        try:
+            if self.is_sw_control():
+                return api.get_rx_los() if api else None
+        except Exception as e:
+            print(e)
         return [False] * api.NUM_CHANNELS if api else None
 
     def get_tx_fault(self):
@@ -927,8 +932,6 @@ def get_xcvr_api(self):
         """
         if self._xcvr_api is None:
             self.refresh_xcvr_api()
-            if self._xcvr_api is not None:
-                self._xcvr_api.get_rx_los = self.get_rx_los
         return self._xcvr_api
 
     def is_sw_control(self):

From a9445cb321dbfc15a025b7b40d63299a3e0957a0 Mon Sep 17 00:00:00 2001
From: Stepan Blyshchak <38952541+stepanblyschak@users.noreply.github.com>
Date: Wed, 13 Nov 2024 21:21:21 +0200
Subject: [PATCH 196/364] [FC] Put default counters in init_cfg.json (#20506)

Why I did it
Simplify approach to delaying counters on warm boot and fast boot. Removed FLEX_COUNTER_DELAY_STATUS_FIELD and instead postpone all FC processing to happen after apply view to not delay data plane configuration.

The CONFIG_DB should not be updated in runtime anymore for counters to be delayed.

To address #20302.
---
 dockers/docker-orchagent/enable_counters.py | 11 ---------
 files/build_templates/init_cfg.json.j2      | 27 +++++++++++++++++++++
 2 files changed, 27 insertions(+), 11 deletions(-)

diff --git a/dockers/docker-orchagent/enable_counters.py b/dockers/docker-orchagent/enable_counters.py
index 53b9568cf9ec..5867787e0aa7 100755
--- a/dockers/docker-orchagent/enable_counters.py
+++ b/dockers/docker-orchagent/enable_counters.py
@@ -39,24 +39,13 @@ def enable_rates():
 def enable_counters():
     db = swsscommon.ConfigDBConnector()
     db.connect()
-    default_enabled_counters = ['PORT', 'RIF', 'QUEUE', 'PFCWD', 'PG_WATERMARK', 'PG_DROP', 
-                                'QUEUE_WATERMARK', 'BUFFER_POOL_WATERMARK', 'PORT_BUFFER_DROP', 'ACL']
     dpu_counters = ["ENI"]
 
-    # Enable those default counters
-    for key in default_enabled_counters:
-        enable_counter_group(db, key)
-
     platform_info = device_info.get_platform_info(db)
     if platform_info.get('switch_type') == 'dpu':
         for key in dpu_counters:
             enable_counter_group(db, key)
 
-    # Set FLEX_COUNTER_DELAY_STATUS to false for those non-default counters
-    keys = db.get_keys('FLEX_COUNTER_TABLE')
-    for key in keys:
-        if key not in default_enabled_counters:
-            enable_counter_group(db, key)
     enable_rates()
 
 
diff --git a/files/build_templates/init_cfg.json.j2 b/files/build_templates/init_cfg.json.j2
index f8083f040541..622087a5521d 100644
--- a/files/build_templates/init_cfg.json.j2
+++ b/files/build_templates/init_cfg.json.j2
@@ -26,6 +26,33 @@
             "FLEX_COUNTER_STATUS": "enable",
             "FLEX_COUNTER_DELAY_STATUS": "true",
             "POLL_INTERVAL": "10000"
+        },
+        "PORT": {
+            "FLEX_COUNTER_STATUS": "enable"
+        },
+        "RIF": {
+            "FLEX_COUNTER_STATUS": "enable"
+        },
+        "QUEUE": {
+            "FLEX_COUNTER_STATUS": "enable"
+        },
+        "PFCWD": {
+            "FLEX_COUNTER_STATUS": "enable"
+        },
+        "PG_WATERMARK": {
+            "FLEX_COUNTER_STATUS": "enable"
+        },
+        "PG_DROP": {
+            "FLEX_COUNTER_STATUS": "enable"
+        },
+        "QUEUE_WATERMARK": {
+            "FLEX_COUNTER_STATUS": "enable"
+        },
+        "BUFFER_POOL_WATERMARK": {
+            "FLEX_COUNTER_STATUS": "enable"
+        },
+        "PORT_BUFFER_DROP": {
+            "FLEX_COUNTER_STATUS": "enable"
         }
     },
     "BGP_DEVICE_GLOBAL": {

From f3cf9b93ee8b155df9af0f1966210f2855065a8b Mon Sep 17 00:00:00 2001
From: jingwenxie <jingwenxie@microsoft.com>
Date: Thu, 14 Nov 2024 03:22:24 +0800
Subject: [PATCH 197/364] [YANG] Add DPU support in chassis module (#20733)

Why I did it
Add DPU support in CHASSIS_MODULE
Check HLD: https://github.com/sonic-net/SONiC/blob/master/doc/smart-switch/pmon/smartswitch-pmon.md?plain=1#L93-L105
---
 .../tests/files/sample_config_db.json               |  3 +++
 .../tests_config/chassis_module.json                | 13 +++++++++++++
 .../yang-models/sonic-chassis-module.yang           |  4 ++--
 3 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index a9ab004008b6..93283acee587 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -1895,6 +1895,9 @@
             },
             "FABRIC-CARD1": {
                 "admin_status": "down"
+            },
+            "DPU2": {
+                "admin_status": "down"
             }
         },
         "COPP_GROUP": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/chassis_module.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/chassis_module.json
index a742f91ef54e..b64367bb3cd2 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/chassis_module.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/chassis_module.json
@@ -18,6 +18,15 @@
                     {
                         "name": "FABRIC-CARD1",
                         "admin_status": "up"
+                    },
+                    {
+                        "name": "DPU0",
+                        "admin_status": "up"
+                    },
+                    {
+                        "name": "DPU1",
+                        "admin_status": "up"
+                     
                     }
                 ]
             }
@@ -34,6 +43,10 @@
                     {
                         "name": "FABRIC-CARD1",
                         "admin_status": "down"
+                    },
+                    {
+                        "name": "DPU2",
+                        "admin_status": "down"
                     }
                 ]
             }
diff --git a/src/sonic-yang-models/yang-models/sonic-chassis-module.yang b/src/sonic-yang-models/yang-models/sonic-chassis-module.yang
index e31c252d8a9d..34cc3b2d9906 100644
--- a/src/sonic-yang-models/yang-models/sonic-chassis-module.yang
+++ b/src/sonic-yang-models/yang-models/sonic-chassis-module.yang
@@ -20,9 +20,9 @@ module sonic-chassis-module {
                 key "name";
                 leaf name {
                     type string {
-                        pattern "LINE-CARD[0-9]+|FABRIC-CARD[0-9]+";
+                        pattern "LINE-CARD[0-9]+|FABRIC-CARD[0-9]+|DPU[0-9]+";
                     }
-                    description "Line-card or fabric-card module name";
+                    description "Line-card or fabric-card or dpu module name";
                 }
 
                 leaf admin_status {

From 5681eb9db40fc28a3fbd3bec758b5546736b9305 Mon Sep 17 00:00:00 2001
From: saksarav-nokia <sakthivadivu.saravanaraj@nokia.com>
Date: Wed, 13 Nov 2024 16:26:29 -0500
Subject: [PATCH 198/364] Start startup_tsa_tsb.service only if services.conf
 file exists (#20315)

Fix https://github.com/sonic-net/sonic-buildimage/issues/20049

Currently, the startup_tsa_tsb.service is started for all the platforms and the service exists if startup-tsa-tsb.conf doesn't exist for the platform.

Signed-off-by: saksarav <sakthivadivu.saravanaraj@nokia.com>
---
 device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/services.conf | 1 +
 files/build_templates/sonic_debian_extension.j2             | 1 -
 files/build_templates/startup_tsa_tsb.service               | 1 -
 3 files changed, 1 insertion(+), 2 deletions(-)
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/services.conf

diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/services.conf b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/services.conf
new file mode 100644
index 000000000000..2a0a236a8afe
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/services.conf
@@ -0,0 +1 @@
+startup_tsa_tsb.service
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 8d529b2ec09e..a4fddc83958b 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -1039,7 +1039,6 @@ sudo LANG=C cp $SCRIPTS_DIR/write_standby.py $FILESYSTEM_ROOT/usr/local/bin/writ
 sudo LANG=C cp $SCRIPTS_DIR/mark_dhcp_packet.py $FILESYSTEM_ROOT/usr/local/bin/mark_dhcp_packet.py
 
 sudo cp files/build_templates/startup_tsa_tsb.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/
-echo "startup_tsa_tsb.service" | sudo tee -a $GENERATED_SERVICE_FILE
 
 sudo cp $BUILD_TEMPLATES/sonic.target $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM
 sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable sonic.target
diff --git a/files/build_templates/startup_tsa_tsb.service b/files/build_templates/startup_tsa_tsb.service
index 0557f4fc5e04..c13979fd1165 100644
--- a/files/build_templates/startup_tsa_tsb.service
+++ b/files/build_templates/startup_tsa_tsb.service
@@ -3,7 +3,6 @@ Description= STARTUP TSA-TSB SERVICE
 Requires=config-setup.service database.service
 After=config-setup.service database.service
 Before=bgp.service
-ConditionPathExists=!/etc/sonic/chassisdb.conf
 
 [Service]
 Environment="STARTED_BY_TSA_TSB_SERVICE=1"

From 03c5b8ad2f9f2583dee79e4953cc46ad3ebf5ec1 Mon Sep 17 00:00:00 2001
From: abdosi <58047199+abdosi@users.noreply.github.com>
Date: Wed, 13 Nov 2024 19:53:54 -0800
Subject: [PATCH 199/364] [Chassis] [BGP templates] Enhancement for not to send
 given route to APP_DB and also fallback to default route (#20224)

What I did:

Enhancement of [VOQ Chassis i-BGP Templates]
On Upstream LC deny routes that are ok to fallback to Default Routes and have community of DEVICE_INTERNAL_COMMUNITY (Routes learnt from AZNG neighbors: https://github.com/sonic-net/sonic-mgmt/blob/e4ad13a90450c930d272b13a8b1e49a66284b036/ansible/templates/minigraph_png.j2#L212)
On Downstream LC allow routes that are ok to fallback to Default Routes and have community of DEVICE_INTERNAL_COMMUNITY set a special tag for those.
Enhancement of [Packet Chassis i-BGP internal Templates]
On Upstream LC allow routes that are ok to fallback to Default Routes and have community of DEVICE_INTERNAL_COMMUNITY (Routes learnt from AZNG neighbors: https://github.com/sonic-net/sonic-mgmt/blob/e4ad13a90450c930d272b13a8b1e49a66284b036/ansible/templates/minigraph_png.j2#L212)
On Downstream LC deny routes that are ok to fallback to Default Routes and have community of DEVICE_INTERNAL_COMMUNITY set a special tag for those.
Enhancement of general templates for Chassis when running on Upstream LC
Allow Default Route always
Any other route mark
a. On chassis-packet set tag as eligible for default fallback and set community of DEVICE_INTERNAL_COMMUNITY
b. On Voq chassis set tag as eligible for not to send to app db and set community of DEVICE_INTERNAL_COMMUNITY
How I verify:
Update UT.
Manual Verification.
---
 .../bgpd/templates/general/policies.conf.j2   | 33 +++++++++
 .../bgpd/templates/internal/policies.conf.j2  | 23 +++++++
 .../templates/voq_chassis/policies.conf.j2    | 24 ++++++-
 files/image_config/constants/constants.yml    |  5 +-
 .../policies.conf/param_all_chassis_pkt.json  | 22 ++++++
 .../param_all_chassis_pkt_down.json           | 22 ++++++
 .../general/policies.conf/param_all_voq.json  | 22 ++++++
 .../policies.conf/param_all_voq_down.json     | 22 ++++++
 .../general/policies.conf/result_all.conf     |  3 +
 .../policies.conf/result_all_chassis_pkt.conf | 67 +++++++++++++++++++
 .../result_all_chassis_pkt_down.conf          | 51 ++++++++++++++
 .../general/policies.conf/result_all_voq.conf | 67 +++++++++++++++++++
 .../policies.conf/result_all_voq_down.conf    | 51 ++++++++++++++
 .../general/policies.conf/result_base.conf    |  3 +
 .../general/policies.conf/result_deny.conf    |  3 +
 .../policies.conf/param_chasiss_packet.json   |  7 +-
 .../policies.conf/result_chasiss_packet.conf  |  9 +++
 .../voq_chassis/policies.conf/param_base.json |  9 ++-
 .../policies.conf/result_base.conf            | 13 ++++
 19 files changed, 450 insertions(+), 6 deletions(-)
 create mode 100644 src/sonic-bgpcfgd/tests/data/general/policies.conf/param_all_chassis_pkt.json
 create mode 100644 src/sonic-bgpcfgd/tests/data/general/policies.conf/param_all_chassis_pkt_down.json
 create mode 100644 src/sonic-bgpcfgd/tests/data/general/policies.conf/param_all_voq.json
 create mode 100644 src/sonic-bgpcfgd/tests/data/general/policies.conf/param_all_voq_down.json
 create mode 100644 src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_chassis_pkt.conf
 create mode 100644 src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_chassis_pkt_down.conf
 create mode 100644 src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_voq.conf
 create mode 100644 src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_voq_down.conf

diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2
index 3dc9447f75bb..8db76a69f848 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2
@@ -2,6 +2,8 @@
 ! template: bgpd/templates/general/policies.conf.j2
 !
 !
+ip prefix-list DEFAULT_IPV4 permit 0.0.0.0/0
+ipv6 prefix-list DEFAULT_IPV6 permit ::/0
 !
 {% if constants.bgp.allow_list is defined and constants.bgp.allow_list.enabled is defined and constants.bgp.allow_list.enabled and constants.bgp.allow_list.drop_community is defined %}
 !
@@ -35,6 +37,22 @@ route-map FROM_BGP_PEER_V4 permit 10
 !
 route-map FROM_BGP_PEER_V4 permit 11
   match community allow_list_default_community
+{% if CONFIG_DB__DEVICE_METADATA and 'localhost' in CONFIG_DB__DEVICE_METADATA and 'type' in CONFIG_DB__DEVICE_METADATA['localhost'] and 'subtype' in CONFIG_DB__DEVICE_METADATA['localhost'] %}
+{% if CONFIG_DB__DEVICE_METADATA['localhost']['type'] == 'SpineRouter' and CONFIG_DB__DEVICE_METADATA['localhost']['subtype'] == 'UpstreamLC' %}
+  on-match next
+!
+route-map FROM_BGP_PEER_V4 permit 12
+  match ip address prefix-list DEFAULT_IPV4
+!
+route-map FROM_BGP_PEER_V4 permit 13
+{% if CONFIG_DB__DEVICE_METADATA['localhost']['switch_type'] != 'chassis-packet' %}
+  set tag {{ constants.bgp.route_do_not_send_appdb_tag }}
+{% else %}
+  set tag {{ constants.bgp.route_eligible_for_fallback_to_default_tag }}
+{% endif %}
+  set community {{ constants.bgp.internal_fallback_community }} additive
+{% endif %}
+{% endif %}
 !
 route-map FROM_BGP_PEER_V6 permit 10
   call ALLOW_LIST_DEPLOYMENT_ID_0_V6
@@ -42,6 +60,21 @@ route-map FROM_BGP_PEER_V6 permit 10
 !
 route-map FROM_BGP_PEER_V6 permit 11
   match community allow_list_default_community
+{% if CONFIG_DB__DEVICE_METADATA and 'localhost' in CONFIG_DB__DEVICE_METADATA and 'type' in CONFIG_DB__DEVICE_METADATA['localhost'] and 'subtype' in CONFIG_DB__DEVICE_METADATA['localhost'] %}
+{% if CONFIG_DB__DEVICE_METADATA['localhost']['type'] == 'SpineRouter' and CONFIG_DB__DEVICE_METADATA['localhost']['subtype'] == 'UpstreamLC' %}
+  on-match next
+!
+route-map FROM_BGP_PEER_V6 permit 12
+  match ipv6 address prefix-list DEFAULT_IPV6
+!
+route-map FROM_BGP_PEER_V6 permit 13
+{% if CONFIG_DB__DEVICE_METADATA['localhost']['switch_type'] != 'chassis-packet' %}
+  set tag {{ constants.bgp.route_do_not_send_appdb_tag }}
+{% else %}
+  set tag {{ constants.bgp.route_eligible_for_fallback_to_default_tag }}
+{% endif %}
+  set community {{ constants.bgp.internal_fallback_community }} additive                                                                                                                                         {% endif %}
+{% endif %}
 !
 {% endif %}
 !
diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/internal/policies.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/internal/policies.conf.j2
index bd341e70d7f4..e6eccc75fae4 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/templates/internal/policies.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/templates/internal/policies.conf.j2
@@ -25,6 +25,7 @@ route-map FROM_BGP_INTERNAL_PEER_V6 permit 2
  {% endif %}
 {% elif CONFIG_DB__DEVICE_METADATA['localhost']['switch_type'] == 'chassis-packet' %}
 bgp community-list standard DEVICE_INTERNAL_COMMUNITY permit {{ constants.bgp.internal_community }}
+bgp community-list standard DEVICE_INTERNAL_FALLBACK_COMMUNITY permit {{ constants.bgp.internal_fallback_community }}
 bgp community-list standard NO_EXPORT permit no-export
 !
 route-map FROM_BGP_INTERNAL_PEER_V4 permit 1
@@ -35,6 +36,17 @@ route-map FROM_BGP_INTERNAL_PEER_V4 permit 1
 route-map FROM_BGP_INTERNAL_PEER_V4 permit 2
   match community NO_EXPORT
   set local-preference 80
+  on-match next
+!
+{% if CONFIG_DB__DEVICE_METADATA['localhost']['subtype'] == 'DownstreamLC' %}
+route-map FROM_BGP_INTERNAL_PEER_V4 deny 3
+  match community DEVICE_INTERNAL_FALLBACK_COMMUNITY
+{% else %}
+route-map FROM_BGP_INTERNAL_PEER_V4 permit 3
+  match community DEVICE_INTERNAL_FALLBACK_COMMUNITY
+  set comm-list DEVICE_INTERNAL_FALLBACK_COMMUNITY delete
+  set tag {{ constants.bgp.route_eligible_for_fallback_to_default_tag }}
+{% endif %}
 !
 route-map FROM_BGP_INTERNAL_PEER_V6 permit 1
  set ipv6 next-hop prefer-global
@@ -48,6 +60,17 @@ route-map FROM_BGP_INTERNAL_PEER_V6 permit 2
 route-map FROM_BGP_INTERNAL_PEER_V6 permit 3
   match community NO_EXPORT
   set local-preference 80
+  on-match next
+!
+{% if CONFIG_DB__DEVICE_METADATA['localhost']['subtype'] == 'DownstreamLC' %}
+route-map FROM_BGP_INTERNAL_PEER_V6 deny 4
+  match community DEVICE_INTERNAL_FALLBACK_COMMUNITY
+{% else %}
+route-map FROM_BGP_INTERNAL_PEER_V6 permit 4
+  match community DEVICE_INTERNAL_FALLBACK_COMMUNITY
+  set comm-list DEVICE_INTERNAL_FALLBACK_COMMUNITY delete
+  set tag {{ constants.bgp.route_eligible_for_fallback_to_default_tag }}
+{% endif %}
 !
 route-map TO_BGP_INTERNAL_PEER_V4 permit 1
   match ip address prefix-list PL_LoopbackV4
diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/policies.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/policies.conf.j2
index 7002a0ac1a41..961587c6ebb7 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/policies.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/policies.conf.j2
@@ -2,6 +2,7 @@
 ! template: bgpd/templates/voq_chassis/policies.conf.j2
 !
 bgp community-list standard DEVICE_INTERNAL_COMMUNITY permit {{ constants.bgp.internal_community }}
+bgp community-list standard DEVICE_INTERNAL_FALLBACK_COMMUNITY permit {{ constants.bgp.internal_fallback_community }}
 bgp community-list standard NO_EXPORT permit no-export
 !
 route-map FROM_VOQ_CHASSIS_V4_PEER permit 1
@@ -12,6 +13,17 @@ route-map FROM_VOQ_CHASSIS_V4_PEER permit 1
 route-map FROM_VOQ_CHASSIS_V4_PEER permit 2
   match community NO_EXPORT
   set local-preference 80
+  on-match next
+!
+{% if CONFIG_DB__DEVICE_METADATA['localhost']['subtype'] == 'UpstreamLC' %}
+route-map FROM_VOQ_CHASSIS_V4_PEER deny 3
+  match community DEVICE_INTERNAL_FALLBACK_COMMUNITY
+{% else %}
+route-map FROM_VOQ_CHASSIS_V4_PEER permit 3
+  match community DEVICE_INTERNAL_FALLBACK_COMMUNITY
+  set comm-list DEVICE_INTERNAL_FALLBACK_COMMUNITY delete
+  set tag {{ constants.bgp.route_eligible_for_fallback_to_default_tag }}
+{% endif %}
 !
 route-map FROM_VOQ_CHASSIS_V4_PEER permit 100
 !
@@ -21,7 +33,6 @@ route-map TO_VOQ_CHASSIS_V4_PEER permit 1
 !
 route-map TO_VOQ_CHASSIS_V4_PEER permit 100
 !
-!
 route-map FROM_VOQ_CHASSIS_V6_PEER permit 1
  set ipv6 next-hop prefer-global
  on-match next
@@ -34,6 +45,17 @@ route-map FROM_VOQ_CHASSIS_V6_PEER permit 2
 route-map FROM_VOQ_CHASSIS_V6_PEER permit 3
   match community NO_EXPORT
   set local-preference 80
+  on-match next
+!
+{% if CONFIG_DB__DEVICE_METADATA['localhost']['subtype'] == 'UpstreamLC' %}
+route-map FROM_VOQ_CHASSIS_V6_PEER deny 4
+  match community DEVICE_INTERNAL_FALLBACK_COMMUNITY
+{% else %}
+route-map FROM_VOQ_CHASSIS_V6_PEER permit 4
+  match community DEVICE_INTERNAL_FALLBACK_COMMUNITY
+  set comm-list DEVICE_INTERNAL_FALLBACK_COMMUNITY delete
+  set tag {{ constants.bgp.route_eligible_for_fallback_to_default_tag }}
+{% endif %}
 !
 route-map FROM_VOQ_CHASSIS_V6_PEER permit 100
 !
diff --git a/files/image_config/constants/constants.yml b/files/image_config/constants/constants.yml
index bb4aeb62ab92..01fb02deadf4 100644
--- a/files/image_config/constants/constants.yml
+++ b/files/image_config/constants/constants.yml
@@ -5,8 +5,11 @@ constants:
   bgp:
     traffic_shift_community: 12345:12345
     internal_community: 11111:11111
-    internal_community_match_tag: 1002
+    internal_fallback_community: 22222:22222
     sentinel_community: 12345:12346
+    internal_community_match_tag: 201
+    route_do_not_send_appdb_tag: 202
+    route_eligible_for_fallback_to_default_tag: 203
     families:
       - ipv4
       - ipv6
diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/param_all_chassis_pkt.json b/src/sonic-bgpcfgd/tests/data/general/policies.conf/param_all_chassis_pkt.json
new file mode 100644
index 000000000000..0a96a1cacfd6
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/param_all_chassis_pkt.json
@@ -0,0 +1,22 @@
+{
+    "loopback0_ipv4": "10.10.10.10/32",
+    "constants": {
+        "bgp": {
+            "allow_list": {
+                "enabled": true,
+                "drop_community": "12345:12345"
+	    },
+             "route_eligible_for_fallback_to_default_tag": "203",
+             "route_do_not_send_appdb_tag" : "202",
+	     "internal_fallback_community": "1111:2222"
+        }
+    },
+    "allow_list_default_action": "permit",
+    "CONFIG_DB__DEVICE_METADATA": {
+        "localhost": {
+            "type": "SpineRouter",
+            "subtype": "UpstreamLC",
+            "switch_type": "chassis-packet"
+        }
+    }
+}
diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/param_all_chassis_pkt_down.json b/src/sonic-bgpcfgd/tests/data/general/policies.conf/param_all_chassis_pkt_down.json
new file mode 100644
index 000000000000..103e5a1fdcac
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/param_all_chassis_pkt_down.json
@@ -0,0 +1,22 @@
+{
+    "loopback0_ipv4": "10.10.10.10/32",
+    "constants": {
+        "bgp": {
+            "allow_list": {
+                "enabled": true,
+                "drop_community": "12345:12345"
+	    },
+             "route_eligible_for_fallback_to_default_tag": "203",
+             "route_do_not_send_appdb_tag" : "202",
+	     "internal_fallback_community": "1111:2222"
+        }
+    },
+    "allow_list_default_action": "permit",
+    "CONFIG_DB__DEVICE_METADATA": {
+        "localhost": {
+            "type": "SpineRouter",
+            "subtype": "DownstreamLC",
+            "switch_type": "chassis-packet"
+        }
+    }
+}
diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/param_all_voq.json b/src/sonic-bgpcfgd/tests/data/general/policies.conf/param_all_voq.json
new file mode 100644
index 000000000000..a940effc8463
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/param_all_voq.json
@@ -0,0 +1,22 @@
+{
+    "loopback0_ipv4": "10.10.10.10/32",
+    "constants": {
+        "bgp": {
+            "allow_list": {
+                "enabled": true,
+                "drop_community": "12345:12345"
+	    },
+             "route_eligible_for_fallback_to_default_tag": "203",
+             "route_do_not_send_appdb_tag" : "202",
+	     "internal_fallback_community": "1111:2222"
+        }
+    },
+    "allow_list_default_action": "permit",
+    "CONFIG_DB__DEVICE_METADATA": {
+        "localhost": {
+            "type": "SpineRouter",
+            "subtype": "UpstreamLC",
+            "switch_type": "voq"
+        }
+    }
+}
diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/param_all_voq_down.json b/src/sonic-bgpcfgd/tests/data/general/policies.conf/param_all_voq_down.json
new file mode 100644
index 000000000000..9671b7fcf25c
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/param_all_voq_down.json
@@ -0,0 +1,22 @@
+{
+    "loopback0_ipv4": "10.10.10.10/32",
+    "constants": {
+        "bgp": {
+            "allow_list": {
+                "enabled": true,
+                "drop_community": "12345:12345"
+	    },
+             "route_eligible_for_fallback_to_default_tag": "203",
+             "route_do_not_send_appdb_tag" : "202",
+	     "internal_fallback_community": "1111:2222"
+        }
+    },
+    "allow_list_default_action": "permit",
+    "CONFIG_DB__DEVICE_METADATA": {
+        "localhost": {
+            "type": "SpineRouter",
+            "subtype": "DownstreamLC",
+            "switch_type": "voq"
+        }
+    }
+}
diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all.conf b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all.conf
index f19b98a859c8..fb51eadeb01f 100644
--- a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all.conf
+++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all.conf
@@ -1,6 +1,9 @@
 !
 ! template: bgpd/templates/general/policies.conf.j2
 !
+ip prefix-list DEFAULT_IPV4 permit 0.0.0.0/0
+ipv6 prefix-list DEFAULT_IPV6 permit ::/0
+!
 ! please don't remove. 65535 entries are default rules
 ! which works when allow_list is enabled, but new configuration
 ! is not applied
diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_chassis_pkt.conf b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_chassis_pkt.conf
new file mode 100644
index 000000000000..7262a0c857d1
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_chassis_pkt.conf
@@ -0,0 +1,67 @@
+!
+! template: bgpd/templates/general/policies.conf.j2
+!
+ip prefix-list DEFAULT_IPV4 permit 0.0.0.0/0
+ipv6 prefix-list DEFAULT_IPV6 permit ::/0
+!
+! please don't remove. 65535 entries are default rules
+! which works when allow_list is enabled, but new configuration
+! is not applied
+!
+route-map ALLOW_LIST_DEPLOYMENT_ID_0_V4 permit 65535
+  set community 12345:12345 additive
+!
+route-map ALLOW_LIST_DEPLOYMENT_ID_0_V6 permit 65535
+  set community 12345:12345 additive
+!
+bgp community-list standard allow_list_default_community permit no-export
+bgp community-list standard allow_list_default_community permit 12345:12345
+!
+route-map FROM_BGP_PEER_V4 permit 10
+  call ALLOW_LIST_DEPLOYMENT_ID_0_V4
+  on-match next
+!
+route-map FROM_BGP_PEER_V4 permit 11
+  match community allow_list_default_community
+  on-match next
+!
+route-map FROM_BGP_PEER_V4 permit 12
+  match ip address prefix-list DEFAULT_IPV4
+!
+route-map FROM_BGP_PEER_V4 permit 13
+  set tag 203
+  set community 1111:2222 additive
+!
+route-map FROM_BGP_PEER_V6 permit 10
+  call ALLOW_LIST_DEPLOYMENT_ID_0_V6
+  on-match next
+!
+route-map FROM_BGP_PEER_V6 permit 11
+  match community allow_list_default_community
+  on-match next
+!
+route-map FROM_BGP_PEER_V6 permit 12
+  match ipv6 address prefix-list DEFAULT_IPV6
+!
+route-map FROM_BGP_PEER_V6 permit 13
+  set tag 203
+  set community 1111:2222 additive                                                                                                                                         
+!
+route-map FROM_BGP_PEER_V4 permit 100
+!
+route-map TO_BGP_PEER_V4 permit 100
+  call CHECK_IDF_ISOLATION
+!
+route-map FROM_BGP_PEER_V6 permit 1
+ on-match next
+ set ipv6 next-hop prefer-global
+!
+route-map FROM_BGP_PEER_V6 permit 100
+!
+route-map TO_BGP_PEER_V6 permit 100
+  call CHECK_IDF_ISOLATION
+!
+route-map CHECK_IDF_ISOLATION permit 10
+!
+! end of template: bgpd/templates/general/policies.conf.j2
+!
diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_chassis_pkt_down.conf b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_chassis_pkt_down.conf
new file mode 100644
index 000000000000..fb51eadeb01f
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_chassis_pkt_down.conf
@@ -0,0 +1,51 @@
+!
+! template: bgpd/templates/general/policies.conf.j2
+!
+ip prefix-list DEFAULT_IPV4 permit 0.0.0.0/0
+ipv6 prefix-list DEFAULT_IPV6 permit ::/0
+!
+! please don't remove. 65535 entries are default rules
+! which works when allow_list is enabled, but new configuration
+! is not applied
+!
+route-map ALLOW_LIST_DEPLOYMENT_ID_0_V4 permit 65535
+  set community 12345:12345 additive
+!
+route-map ALLOW_LIST_DEPLOYMENT_ID_0_V6 permit 65535
+  set community 12345:12345 additive
+!
+bgp community-list standard allow_list_default_community permit no-export
+bgp community-list standard allow_list_default_community permit 12345:12345
+!
+route-map FROM_BGP_PEER_V4 permit 10
+  call ALLOW_LIST_DEPLOYMENT_ID_0_V4
+  on-match next
+!
+route-map FROM_BGP_PEER_V4 permit 11
+  match community allow_list_default_community
+!
+route-map FROM_BGP_PEER_V6 permit 10
+  call ALLOW_LIST_DEPLOYMENT_ID_0_V6
+  on-match next
+!
+route-map FROM_BGP_PEER_V6 permit 11
+  match community allow_list_default_community
+!
+route-map FROM_BGP_PEER_V4 permit 100
+!
+route-map TO_BGP_PEER_V4 permit 100
+  call CHECK_IDF_ISOLATION
+!
+route-map FROM_BGP_PEER_V6 permit 1
+ on-match next
+ set ipv6 next-hop prefer-global
+!
+route-map FROM_BGP_PEER_V6 permit 100
+!
+route-map TO_BGP_PEER_V6 permit 100
+  call CHECK_IDF_ISOLATION
+!
+route-map CHECK_IDF_ISOLATION permit 10
+!
+! end of template: bgpd/templates/general/policies.conf.j2
+!
diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_voq.conf b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_voq.conf
new file mode 100644
index 000000000000..9c6b1fc28422
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_voq.conf
@@ -0,0 +1,67 @@
+!
+! template: bgpd/templates/general/policies.conf.j2
+!
+ip prefix-list DEFAULT_IPV4 permit 0.0.0.0/0
+ipv6 prefix-list DEFAULT_IPV6 permit ::/0
+!
+! please don't remove. 65535 entries are default rules
+! which works when allow_list is enabled, but new configuration
+! is not applied
+!
+route-map ALLOW_LIST_DEPLOYMENT_ID_0_V4 permit 65535
+  set community 12345:12345 additive
+!
+route-map ALLOW_LIST_DEPLOYMENT_ID_0_V6 permit 65535
+  set community 12345:12345 additive
+!
+bgp community-list standard allow_list_default_community permit no-export
+bgp community-list standard allow_list_default_community permit 12345:12345
+!
+route-map FROM_BGP_PEER_V4 permit 10
+  call ALLOW_LIST_DEPLOYMENT_ID_0_V4
+  on-match next
+!
+route-map FROM_BGP_PEER_V4 permit 11
+  match community allow_list_default_community
+  on-match next
+!
+route-map FROM_BGP_PEER_V4 permit 12
+  match ip address prefix-list DEFAULT_IPV4
+!
+route-map FROM_BGP_PEER_V4 permit 13
+  set tag 202
+  set community 1111:2222 additive
+!
+route-map FROM_BGP_PEER_V6 permit 10
+  call ALLOW_LIST_DEPLOYMENT_ID_0_V6
+  on-match next
+!
+route-map FROM_BGP_PEER_V6 permit 11
+  match community allow_list_default_community
+  on-match next
+!
+route-map FROM_BGP_PEER_V6 permit 12
+  match ipv6 address prefix-list DEFAULT_IPV6
+!
+route-map FROM_BGP_PEER_V6 permit 13
+  set tag 202
+  set community 1111:2222 additive                                                                                                                                         
+!
+route-map FROM_BGP_PEER_V4 permit 100
+!
+route-map TO_BGP_PEER_V4 permit 100
+  call CHECK_IDF_ISOLATION
+!
+route-map FROM_BGP_PEER_V6 permit 1
+ on-match next
+ set ipv6 next-hop prefer-global
+!
+route-map FROM_BGP_PEER_V6 permit 100
+!
+route-map TO_BGP_PEER_V6 permit 100
+  call CHECK_IDF_ISOLATION
+!
+route-map CHECK_IDF_ISOLATION permit 10
+!
+! end of template: bgpd/templates/general/policies.conf.j2
+!
diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_voq_down.conf b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_voq_down.conf
new file mode 100644
index 000000000000..fb51eadeb01f
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_voq_down.conf
@@ -0,0 +1,51 @@
+!
+! template: bgpd/templates/general/policies.conf.j2
+!
+ip prefix-list DEFAULT_IPV4 permit 0.0.0.0/0
+ipv6 prefix-list DEFAULT_IPV6 permit ::/0
+!
+! please don't remove. 65535 entries are default rules
+! which works when allow_list is enabled, but new configuration
+! is not applied
+!
+route-map ALLOW_LIST_DEPLOYMENT_ID_0_V4 permit 65535
+  set community 12345:12345 additive
+!
+route-map ALLOW_LIST_DEPLOYMENT_ID_0_V6 permit 65535
+  set community 12345:12345 additive
+!
+bgp community-list standard allow_list_default_community permit no-export
+bgp community-list standard allow_list_default_community permit 12345:12345
+!
+route-map FROM_BGP_PEER_V4 permit 10
+  call ALLOW_LIST_DEPLOYMENT_ID_0_V4
+  on-match next
+!
+route-map FROM_BGP_PEER_V4 permit 11
+  match community allow_list_default_community
+!
+route-map FROM_BGP_PEER_V6 permit 10
+  call ALLOW_LIST_DEPLOYMENT_ID_0_V6
+  on-match next
+!
+route-map FROM_BGP_PEER_V6 permit 11
+  match community allow_list_default_community
+!
+route-map FROM_BGP_PEER_V4 permit 100
+!
+route-map TO_BGP_PEER_V4 permit 100
+  call CHECK_IDF_ISOLATION
+!
+route-map FROM_BGP_PEER_V6 permit 1
+ on-match next
+ set ipv6 next-hop prefer-global
+!
+route-map FROM_BGP_PEER_V6 permit 100
+!
+route-map TO_BGP_PEER_V6 permit 100
+  call CHECK_IDF_ISOLATION
+!
+route-map CHECK_IDF_ISOLATION permit 10
+!
+! end of template: bgpd/templates/general/policies.conf.j2
+!
diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_base.conf b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_base.conf
index 671eea007cf9..b7fa74f98b5c 100644
--- a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_base.conf
+++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_base.conf
@@ -1,6 +1,9 @@
 !
 ! template: bgpd/templates/general/policies.conf.j2
 !
+ip prefix-list DEFAULT_IPV4 permit 0.0.0.0/0
+ipv6 prefix-list DEFAULT_IPV6 permit ::/0
+!
 route-map FROM_BGP_PEER_V4 permit 100
 !
 route-map TO_BGP_PEER_V4 permit 100
diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_deny.conf b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_deny.conf
index fdc10b84bf8f..08d768fd41e3 100644
--- a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_deny.conf
+++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_deny.conf
@@ -1,6 +1,9 @@
 !
 ! template: bgpd/templates/general/policies.conf.j2
 !
+ip prefix-list DEFAULT_IPV4 permit 0.0.0.0/0
+ipv6 prefix-list DEFAULT_IPV6 permit ::/0
+!
 ! please don't remove. 65535 entries are default rules
 ! which works when allow_list is enabled, but new configuration
 ! is not applied
diff --git a/src/sonic-bgpcfgd/tests/data/internal/policies.conf/param_chasiss_packet.json b/src/sonic-bgpcfgd/tests/data/internal/policies.conf/param_chasiss_packet.json
index 1e600cc9d72b..c0031457c05c 100644
--- a/src/sonic-bgpcfgd/tests/data/internal/policies.conf/param_chasiss_packet.json
+++ b/src/sonic-bgpcfgd/tests/data/internal/policies.conf/param_chasiss_packet.json
@@ -3,13 +3,16 @@
         "localhost": {
             "type": "SpineRouter",
 	    "sub_role": "FrontEnd",
-            "switch_type": "chassis-packet"
+            "switch_type": "chassis-packet",
+	    "subtype": "DownstreamLC"
         }
     },
     "constants": {
         "bgp": {
             "internal_community": "12345:556",
-	    "internal_community_match_tag": "101"
+	    "internal_community_match_tag": "101",
+	    "route_eligible_for_fallback_to_default_tag": "203",
+	    "internal_fallback_community": "1111:2222"
         }
     },
     "loopback0_ipv4": "10.10.10.10/32"
diff --git a/src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_chasiss_packet.conf b/src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_chasiss_packet.conf
index 4b346d635975..5569f3a5d392 100644
--- a/src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_chasiss_packet.conf
+++ b/src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_chasiss_packet.conf
@@ -2,6 +2,7 @@
 ! template: bgpd/templates/internal/policies.conf.j2
 !
 bgp community-list standard DEVICE_INTERNAL_COMMUNITY permit 12345:556
+bgp community-list standard DEVICE_INTERNAL_FALLBACK_COMMUNITY permit 1111:2222
 bgp community-list standard NO_EXPORT permit no-export
 !
 route-map FROM_BGP_INTERNAL_PEER_V4 permit 1
@@ -12,6 +13,10 @@ route-map FROM_BGP_INTERNAL_PEER_V4 permit 1
 route-map FROM_BGP_INTERNAL_PEER_V4 permit 2
   match community NO_EXPORT
   set local-preference 80
+  on-match next
+!
+route-map FROM_BGP_INTERNAL_PEER_V4 deny 3
+  match community DEVICE_INTERNAL_FALLBACK_COMMUNITY
 !
 route-map FROM_BGP_INTERNAL_PEER_V6 permit 1
  set ipv6 next-hop prefer-global
@@ -25,6 +30,10 @@ route-map FROM_BGP_INTERNAL_PEER_V6 permit 2
 route-map FROM_BGP_INTERNAL_PEER_V6 permit 3
   match community NO_EXPORT
   set local-preference 80
+  on-match next
+!
+route-map FROM_BGP_INTERNAL_PEER_V6 deny 4
+  match community DEVICE_INTERNAL_FALLBACK_COMMUNITY
 !
 route-map TO_BGP_INTERNAL_PEER_V4 permit 1
   match ip address prefix-list PL_LoopbackV4
diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/policies.conf/param_base.json b/src/sonic-bgpcfgd/tests/data/voq_chassis/policies.conf/param_base.json
index 483cc938c59d..1d2f80eed337 100644
--- a/src/sonic-bgpcfgd/tests/data/voq_chassis/policies.conf/param_base.json
+++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/policies.conf/param_base.json
@@ -1,11 +1,16 @@
 {
     "CONFIG_DB__DEVICE_METADATA": {
-        "localhost": {}
+        "localhost": {
+            "type": "SpineRouter",
+            "subtype": "DownstreamLC"
+	}
     },
     "constants": {
         "bgp": {
             "internal_community": "12345:556",
-	    "internal_community_match_tag": "101"
+	    "internal_community_match_tag": "101",
+            "route_eligible_for_fallback_to_default_tag": "203",
+	    "internal_fallback_community": "1111:2222"
         }
     }
 }
diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/policies.conf/result_base.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/policies.conf/result_base.conf
index f0e3771d1a39..10fe3c832655 100644
--- a/src/sonic-bgpcfgd/tests/data/voq_chassis/policies.conf/result_base.conf
+++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/policies.conf/result_base.conf
@@ -2,6 +2,7 @@
 ! template: bgpd/templates/voq_chassis/policies.conf.j2
 !
 bgp community-list standard DEVICE_INTERNAL_COMMUNITY permit 12345:556
+bgp community-list standard DEVICE_INTERNAL_FALLBACK_COMMUNITY permit 1111:2222
 bgp community-list standard NO_EXPORT permit no-export
 !
 route-map FROM_VOQ_CHASSIS_V4_PEER permit 1
@@ -12,6 +13,12 @@ route-map FROM_VOQ_CHASSIS_V4_PEER permit 1
 route-map FROM_VOQ_CHASSIS_V4_PEER permit 2
   match community NO_EXPORT
   set local-preference 80
+  on-match next
+!
+route-map FROM_VOQ_CHASSIS_V4_PEER permit 3
+  match community DEVICE_INTERNAL_FALLBACK_COMMUNITY
+  set comm-list DEVICE_INTERNAL_FALLBACK_COMMUNITY delete
+  set tag 203
 !
 route-map FROM_VOQ_CHASSIS_V4_PEER permit 100
 !
@@ -33,6 +40,12 @@ route-map FROM_VOQ_CHASSIS_V6_PEER permit 2
 route-map FROM_VOQ_CHASSIS_V6_PEER permit 3
   match community NO_EXPORT
   set local-preference 80
+  on-match next
+!
+route-map FROM_VOQ_CHASSIS_V6_PEER permit 4
+  match community DEVICE_INTERNAL_FALLBACK_COMMUNITY
+  set comm-list DEVICE_INTERNAL_FALLBACK_COMMUNITY delete
+  set tag 203
 !
 route-map FROM_VOQ_CHASSIS_V6_PEER permit 100
 !

From 249dfa9f7256937f2a6d0d8d48a5b0f4a4476fef Mon Sep 17 00:00:00 2001
From: Fei Zhou <156348280+fzhou-nokia@users.noreply.github.com>
Date: Wed, 13 Nov 2024 23:02:24 -0500
Subject: [PATCH 200/364] [Nokia-7220 IXR]Update device files for NOKIA 7220
 H4-32D (#20559)

Why I did it
Update for NOKIA 7220 H4-32D and NOKIA 7220 H4 to achieve 100% pass in OC for T0/T1 topology

How I did it
Added files under ../device/nokia/x86_64-nokia_ixr7220_h4_32d-r0 directory.
Added files under ../device/nokia/x86_64-nokia_ixr7220_h4-r0 directory.

How to verify it
Make sure the sonic-buildimage is successful
Run this image on x86_64-nokia_ixr7220_h4_32d-r0 and x86_64-nokia_ixr7220_h4-r0 and verify all dockers are up and test basic commands
---
 .../buffers_defaults_t0.j2                    |   19 +-
 .../buffers_defaults_t1.j2                    |   19 +-
 .../Nokia-IXR7220-H4-64D/ixr7220_h4_64d.bcm   |   20 +-
 .../Nokia-IXR7220-H4-64D/media_settings.json  | 4144 +++++++++++++++++
 .../pg_profile_lookup.ini                     |   41 +-
 .../plugins/led_control.py                    |    2 +-
 .../plugins/ssd_util.py                       |  139 +
 .../Nokia-IXR7220-H4-32D/buffers.json.j2      |    2 +
 .../buffers_defaults_t0.j2                    |   41 +
 .../buffers_defaults_t1.j2                    |   41 +
 .../Nokia-IXR7220-H4-32D/ixr7220_h4_32d.bcm   | 2306 +++------
 .../Nokia-IXR7220-H4-32D/media_settings.json  | 2394 ++++++++++
 .../pg_profile_lookup.ini                     |   20 +
 .../Nokia-IXR7220-H4-32D/port_config.ini      |   33 +-
 .../Nokia-IXR7220-H4-32D/qos.json.j2          |    1 +
 .../custom_led.bin                            |  Bin 0 -> 416 bytes
 .../led_proc_init.soc                         |    4 +
 .../platform.json                             |   13 +-
 .../platform_env.conf                         |    3 +
 .../platform_reboot                           |    7 +
 .../plugins/led_control.py                    |   29 +-
 .../thermal_policy.json                       |   10 +-
 22 files changed, 7561 insertions(+), 1727 deletions(-)
 create mode 100755 device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/media_settings.json
 create mode 100755 device/nokia/x86_64-nokia_ixr7220_h4-r0/plugins/ssd_util.py
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/buffers.json.j2
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/buffers_defaults_t0.j2
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/buffers_defaults_t1.j2
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/media_settings.json
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/pg_profile_lookup.ini
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/qos.json.j2
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/custom_led.bin
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/led_proc_init.soc
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform_env.conf
 create mode 100755 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform_reboot

diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers_defaults_t0.j2 b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers_defaults_t0.j2
index 31ae10e0c86c..cfc4ff0afd84 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers_defaults_t0.j2
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers_defaults_t0.j2
@@ -10,33 +10,32 @@
 {%- macro generate_buffer_pool_and_profiles() %}
   "BUFFER_POOL": {
         "ingress_lossless_pool": {
-            "size": "57000140",
+            "size": "113143792",
             "type": "ingress",
             "mode": "dynamic",
-            "xoff": "19247104"
+            "xoff": "48404780"
         },
-    	"egress_lossless_pool": {
-            "size": "57000140",
+        "egress_lossless_pool": {
+            "size": "56571896",
             "type": "egress",
             "mode": "dynamic"
-        } 
+        }
     },
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"58787284"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"egress_lossless_pool",
-            "size":"1778",
-            "dynamic_th":"0"
+            "size":"0",
+            "dynamic_th":"-4"
         },
         "egress_lossless_profile": {
             "pool":"egress_lossless_pool",
             "size":"0",
-            "static_th":"58787284"
+            "dynamic_th":"3"
         }
     },
 {%- endmacro %}
-
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers_defaults_t1.j2 b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers_defaults_t1.j2
index 31ae10e0c86c..cfc4ff0afd84 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers_defaults_t1.j2
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/buffers_defaults_t1.j2
@@ -10,33 +10,32 @@
 {%- macro generate_buffer_pool_and_profiles() %}
   "BUFFER_POOL": {
         "ingress_lossless_pool": {
-            "size": "57000140",
+            "size": "113143792",
             "type": "ingress",
             "mode": "dynamic",
-            "xoff": "19247104"
+            "xoff": "48404780"
         },
-    	"egress_lossless_pool": {
-            "size": "57000140",
+        "egress_lossless_pool": {
+            "size": "56571896",
             "type": "egress",
             "mode": "dynamic"
-        } 
+        }
     },
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"58787284"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"egress_lossless_pool",
-            "size":"1778",
-            "dynamic_th":"0"
+            "size":"0",
+            "dynamic_th":"-4"
         },
         "egress_lossless_profile": {
             "pool":"egress_lossless_pool",
             "size":"0",
-            "static_th":"58787284"
+            "dynamic_th":"3"
         }
     },
 {%- endmacro %}
-
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/ixr7220_h4_64d.bcm b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/ixr7220_h4_64d.bcm
index c916ad785f9e..04defc64cebf 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/ixr7220_h4_64d.bcm
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/ixr7220_h4_64d.bcm
@@ -1129,11 +1129,23 @@ device:
         #    FLEX_STATE_ING_OPERMODE_PIPEUNIQUE: 0
         #    FLEX_STATE_EGR_OPERMODE_PIPEUNIQUE: 1
 
-        # Lossy vs Lossless mode
-        TM_THD_CONFIG:
-            THRESHOLD_MODE: LOSSLESS
-
         # IFP mode
         FP_CONFIG:
             FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
 ...
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+...
+---
+device:
+    0:
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [1, 5, 9, 13, 17, 21, 25, 29, 34, 38, 42, 46, 50, 51, 55, 59, 63, 68, 72, 76, 80, 85, 89, 93, 97, 102, 106, 110, 114, 119, 123, 127, 131, 136, 140, 144, 148, 150, 153, 157, 161, 165, 170, 174, 178, 182, 187, 191, 195, 199, 204, 208, 212, 216, 221, 225, 229, 233, 238, 242, 246, 250, 255, 259, 263, 267]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/media_settings.json b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/media_settings.json
new file mode 100755
index 000000000000..066777abff2c
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/media_settings.json
@@ -0,0 +1,4144 @@
+{
+    "PORT_MEDIA_SETTINGS": {
+        "1": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9C",
+                    "lane1": "0x9C",
+                    "lane2": "0x9C",
+                    "lane3": "0x98",
+                    "lane4": "0x8C",
+                    "lane5": "0x8C",
+                    "lane6": "0x90",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFFC",
+                    "lane1": "0xFFFFFFFC",
+                    "lane2": "0xFFFFFFFC",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFEC",
+                    "lane6": "0xFFFFFFF0",
+                    "lane7": "0xFFFFFFF0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "2": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x90",
+                    "lane3": "0x90",
+                    "lane4": "0x8C",
+                    "lane5": "0x90",
+                    "lane6": "0x90",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFF0",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "3": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x94",
+                    "lane3": "0x90",
+                    "lane4": "0x8C",
+                    "lane5": "0x94",
+                    "lane6": "0x8C",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFEC",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFEC",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "4": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x90",
+                    "lane3": "0x94",
+                    "lane4": "0x90",
+                    "lane5": "0x94",
+                    "lane6": "0x8C",
+                    "lane7": "0x8C"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF0",
+                    "lane7": "0xFFFFFFF0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "5": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x94",
+                    "lane3": "0x94",
+                    "lane4": "0x94",
+                    "lane5": "0x90",
+                    "lane6": "0x8C",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFEC",
+                    "lane7": "0xFFFFFFF0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "6": {
+            "Default": {
+                "main": {
+                    "lane0": "0x90",
+                    "lane1": "0x90",
+                    "lane2": "0x94",
+                    "lane3": "0x90",
+                    "lane4": "0x90",
+                    "lane5": "0x90",
+                    "lane6": "0x90",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF0",
+                    "lane1": "0xFFFFFFF0",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "7": {
+            "Default": {
+                "main": {
+                    "lane0": "0x98",
+                    "lane1": "0x94",
+                    "lane2": "0x98",
+                    "lane3": "0x8C",
+                    "lane4": "0x8C",
+                    "lane5": "0x8C",
+                    "lane6": "0x94",
+                    "lane7": "0x8C"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFFC",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFEC",
+                    "lane4": "0xFFFFFFEC",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFEC"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "8": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x98",
+                    "lane2": "0x90",
+                    "lane3": "0x98",
+                    "lane4": "0x90",
+                    "lane5": "0x90",
+                    "lane6": "0x94",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "9": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x98",
+                    "lane2": "0x94",
+                    "lane3": "0x98",
+                    "lane4": "0x90",
+                    "lane5": "0x94",
+                    "lane6": "0x90",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF0",
+                    "lane7": "0xFFFFFFF0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "10": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x94",
+                    "lane3": "0x98",
+                    "lane4": "0x90",
+                    "lane5": "0x8C",
+                    "lane6": "0x90",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFEC",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF0",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "11": {
+            "Default": {
+                "main": {
+                    "lane0": "0x98",
+                    "lane1": "0x94",
+                    "lane2": "0x90",
+                    "lane3": "0x8C",
+                    "lane4": "0x94",
+                    "lane5": "0x90",
+                    "lane6": "0x90",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFEC",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFF0",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "12": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x9C",
+                    "lane2": "0x94",
+                    "lane3": "0x94",
+                    "lane4": "0x90",
+                    "lane5": "0x90",
+                    "lane6": "0x90",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFFC",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "13": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8C",
+                    "lane1": "0x94",
+                    "lane2": "0x98",
+                    "lane3": "0x8C",
+                    "lane4": "0x90",
+                    "lane5": "0x8C",
+                    "lane6": "0x94",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFEC",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "14": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9C",
+                    "lane1": "0x98",
+                    "lane2": "0x98",
+                    "lane3": "0x98",
+                    "lane4": "0x94",
+                    "lane5": "0x94",
+                    "lane6": "0x94",
+                    "lane7": "0x98"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFFC",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "15": {
+            "Default": {
+                "main": {
+                    "lane0": "0x98",
+                    "lane1": "0x94",
+                    "lane2": "0x90",
+                    "lane3": "0x94",
+                    "lane4": "0x94",
+                    "lane5": "0x94",
+                    "lane6": "0x94",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "16": {
+            "Default": {
+                "main": {
+                    "lane0": "0x90",
+                    "lane1": "0x94",
+                    "lane2": "0x98",
+                    "lane3": "0x90",
+                    "lane4": "0x8C",
+                    "lane5": "0x8C",
+                    "lane6": "0x8C",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF0",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFEC",
+                    "lane5": "0xFFFFFFEC",
+                    "lane6": "0xFFFFFFF0",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "17": {
+            "Default": {
+                "main": {
+                    "lane0": "0x98",
+                    "lane1": "0x94",
+                    "lane2": "0x90",
+                    "lane3": "0x90",
+                    "lane4": "0x90",
+                    "lane5": "0x90",
+                    "lane6": "0x90",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "18": {
+            "Default": {
+                "main": {
+                    "lane0": "0x98",
+                    "lane1": "0x98",
+                    "lane2": "0x94",
+                    "lane3": "0x94",
+                    "lane4": "0x94",
+                    "lane5": "0x90",
+                    "lane6": "0x90",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "19": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x90",
+                    "lane3": "0x98",
+                    "lane4": "0x8C",
+                    "lane5": "0x94",
+                    "lane6": "0x94",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFFC",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "20": {
+            "Default": {
+                "main": {
+                    "lane0": "0x98",
+                    "lane1": "0x98",
+                    "lane2": "0x9C",
+                    "lane3": "0x94",
+                    "lane4": "0x94",
+                    "lane5": "0x90",
+                    "lane6": "0x90",
+                    "lane7": "0x98"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFFC",
+                    "lane2": "0xFFFFFFFC",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFFC"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "21": {
+            "Default": {
+                "main": {
+                    "lane0": "0x90",
+                    "lane1": "0x98",
+                    "lane2": "0x90",
+                    "lane3": "0x94",
+                    "lane4": "0x90",
+                    "lane5": "0x9C",
+                    "lane6": "0x94",
+                    "lane7": "0x98"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFFC",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "22": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x94",
+                    "lane3": "0x94",
+                    "lane4": "0x90",
+                    "lane5": "0x94",
+                    "lane6": "0x9C",
+                    "lane7": "0x9C"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFFC",
+                    "lane7": "0xFFFFFFFC"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "23": {
+            "Default": {
+                "main": {
+                    "lane0": "0x90",
+                    "lane1": "0x94",
+                    "lane2": "0x90",
+                    "lane3": "0x94",
+                    "lane4": "0x8C",
+                    "lane5": "0x90",
+                    "lane6": "0x90",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF0",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "24": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x94",
+                    "lane3": "0x98",
+                    "lane4": "0x90",
+                    "lane5": "0x94",
+                    "lane6": "0x94",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "25": {
+            "Default": {
+                "main": {
+                    "lane0": "0x90",
+                    "lane1": "0x94",
+                    "lane2": "0x90",
+                    "lane3": "0x90",
+                    "lane4": "0x90",
+                    "lane5": "0x90",
+                    "lane6": "0x88",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFEC",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "26": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x90",
+                    "lane2": "0x94",
+                    "lane3": "0x90",
+                    "lane4": "0x90",
+                    "lane5": "0x8C",
+                    "lane6": "0x90",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFF0",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "27": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x8C",
+                    "lane3": "0x8C",
+                    "lane4": "0x90",
+                    "lane5": "0x90",
+                    "lane6": "0x8C",
+                    "lane7": "0x8C"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFEC",
+                    "lane7": "0xFFFFFFEC"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "28": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x94",
+                    "lane3": "0x90",
+                    "lane4": "0x94",
+                    "lane5": "0x94",
+                    "lane6": "0x90",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF0",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "29": {
+            "Default": {
+                "main": {
+                    "lane0": "0x90",
+                    "lane1": "0x94",
+                    "lane2": "0x90",
+                    "lane3": "0x8C",
+                    "lane4": "0x90",
+                    "lane5": "0x94",
+                    "lane6": "0x90",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "30": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x90",
+                    "lane2": "0x90",
+                    "lane3": "0x94",
+                    "lane4": "0x8C",
+                    "lane5": "0x90",
+                    "lane6": "0x8C",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF0",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFEC",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "31": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x90",
+                    "lane3": "0x90",
+                    "lane4": "0x90",
+                    "lane5": "0x90",
+                    "lane6": "0x8C",
+                    "lane7": "0x8C"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFEC",
+                    "lane7": "0xFFFFFFEC"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "32": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x90",
+                    "lane2": "0x90",
+                    "lane3": "0x90",
+                    "lane4": "0x8C",
+                    "lane5": "0x8C",
+                    "lane6": "0x8C",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF0",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFEC",
+                    "lane5": "0xFFFFFFEC",
+                    "lane6": "0xFFFFFFEC",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "33": {
+            "Default": {
+                "main": {
+                    "lane0": "0x90",
+                    "lane1": "0x94",
+                    "lane2": "0x90",
+                    "lane3": "0x8C",
+                    "lane4": "0x8C",
+                    "lane5": "0x94",
+                    "lane6": "0x90",
+                    "lane7": "0x8C"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFEC",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF0",
+                    "lane7": "0xFFFFFFF0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "34": {
+            "Default": {
+                "main": {
+                    "lane0": "0x98",
+                    "lane1": "0x90",
+                    "lane2": "0x90",
+                    "lane3": "0x94",
+                    "lane4": "0x90",
+                    "lane5": "0x90",
+                    "lane6": "0x90",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFF0",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "35": {
+            "Default": {
+                "main": {
+                    "lane0": "0x98",
+                    "lane1": "0x94",
+                    "lane2": "0x90",
+                    "lane3": "0x90",
+                    "lane4": "0x90",
+                    "lane5": "0x90",
+                    "lane6": "0x90",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "36": {
+            "Default": {
+                "main": {
+                    "lane0": "0x90",
+                    "lane1": "0x98",
+                    "lane2": "0x90",
+                    "lane3": "0x98",
+                    "lane4": "0x98",
+                    "lane5": "0x94",
+                    "lane6": "0x8C",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFEC",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "37": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x90",
+                    "lane2": "0x8C",
+                    "lane3": "0x90",
+                    "lane4": "0x8C",
+                    "lane5": "0x90",
+                    "lane6": "0x8C",
+                    "lane7": "0x8C"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF0",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFEC",
+                    "lane7": "0xFFFFFFEC"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "38": {
+            "Default": {
+                "main": {
+                    "lane0": "0x90",
+                    "lane1": "0x98",
+                    "lane2": "0x94",
+                    "lane3": "0x94",
+                    "lane4": "0x94",
+                    "lane5": "0x90",
+                    "lane6": "0x8C",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFF0",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "39": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x90",
+                    "lane2": "0x90",
+                    "lane3": "0x90",
+                    "lane4": "0x90",
+                    "lane5": "0x8C",
+                    "lane6": "0x8C",
+                    "lane7": "0x8C"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFF0",
+                    "lane7": "0xFFFFFFEC"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "40": {
+            "Default": {
+                "main": {
+                    "lane0": "0x90",
+                    "lane1": "0x98",
+                    "lane2": "0x90",
+                    "lane3": "0x94",
+                    "lane4": "0x90",
+                    "lane5": "0x90",
+                    "lane6": "0x94",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "41": {
+            "Default": {
+                "main": {
+                    "lane0": "0x90",
+                    "lane1": "0x90",
+                    "lane2": "0x90",
+                    "lane3": "0x90",
+                    "lane4": "0x90",
+                    "lane5": "0x8C",
+                    "lane6": "0x88",
+                    "lane7": "0x8C"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFEC",
+                    "lane7": "0xFFFFFFEC"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "42": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x98",
+                    "lane2": "0x90",
+                    "lane3": "0x98",
+                    "lane4": "0x94",
+                    "lane5": "0x94",
+                    "lane6": "0x90",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF0",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "43": {
+            "Default": {
+                "main": {
+                    "lane0": "0x98",
+                    "lane1": "0x90",
+                    "lane2": "0x90",
+                    "lane3": "0x94",
+                    "lane4": "0x8C",
+                    "lane5": "0x8C",
+                    "lane6": "0x90",
+                    "lane7": "0x88"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFEC",
+                    "lane5": "0xFFFFFFEC",
+                    "lane6": "0xFFFFFFF0",
+                    "lane7": "0xFFFFFFEC"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "44": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x98",
+                    "lane3": "0x94",
+                    "lane4": "0x90",
+                    "lane5": "0x98",
+                    "lane6": "0x94",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "45": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x90",
+                    "lane3": "0x94",
+                    "lane4": "0x94",
+                    "lane5": "0x90",
+                    "lane6": "0x94",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "46": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x98",
+                    "lane2": "0x98",
+                    "lane3": "0x94",
+                    "lane4": "0x94",
+                    "lane5": "0x90",
+                    "lane6": "0x94",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "47": {
+            "Default": {
+                "main": {
+                    "lane0": "0x98",
+                    "lane1": "0x98",
+                    "lane2": "0x94",
+                    "lane3": "0x98",
+                    "lane4": "0x94",
+                    "lane5": "0x94",
+                    "lane6": "0x94",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "48": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x98",
+                    "lane3": "0x98",
+                    "lane4": "0x90",
+                    "lane5": "0x94",
+                    "lane6": "0x90",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "49": {
+            "Default": {
+                "main": {
+                    "lane0": "0x98",
+                    "lane1": "0x94",
+                    "lane2": "0x94",
+                    "lane3": "0x98",
+                    "lane4": "0x90",
+                    "lane5": "0x94",
+                    "lane6": "0x94",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "50": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x94",
+                    "lane3": "0x98",
+                    "lane4": "0x94",
+                    "lane5": "0x94",
+                    "lane6": "0x94",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "51": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x90",
+                    "lane2": "0x94",
+                    "lane3": "0x94",
+                    "lane4": "0x94",
+                    "lane5": "0x90",
+                    "lane6": "0x94",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "52": {
+            "Default": {
+                "main": {
+                    "lane0": "0x98",
+                    "lane1": "0x98",
+                    "lane2": "0x94",
+                    "lane3": "0x94",
+                    "lane4": "0x90",
+                    "lane5": "0x90",
+                    "lane6": "0x90",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "53": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x90",
+                    "lane2": "0x8C",
+                    "lane3": "0x94",
+                    "lane4": "0x90",
+                    "lane5": "0x90",
+                    "lane6": "0x8C",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFEC",
+                    "lane7": "0xFFFFFFF0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "54": {
+            "Default": {
+                "main": {
+                    "lane0": "0x98",
+                    "lane1": "0x9C",
+                    "lane2": "0x98",
+                    "lane3": "0x98",
+                    "lane4": "0x94",
+                    "lane5": "0x94",
+                    "lane6": "0x98",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFFC",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "55": {
+            "Default": {
+                "main": {
+                    "lane0": "0x90",
+                    "lane1": "0x94",
+                    "lane2": "0x90",
+                    "lane3": "0x8C",
+                    "lane4": "0x90",
+                    "lane5": "0x8C",
+                    "lane6": "0x8C",
+                    "lane7": "0x8C"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF0",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFEC",
+                    "lane7": "0xFFFFFFF0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "56": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9C",
+                    "lane1": "0x98",
+                    "lane2": "0x98",
+                    "lane3": "0x94",
+                    "lane4": "0x94",
+                    "lane5": "0x94",
+                    "lane6": "0x94",
+                    "lane7": "0x98"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFFC",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFFC",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "57": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x90",
+                    "lane2": "0x8C",
+                    "lane3": "0x8C",
+                    "lane4": "0x90",
+                    "lane5": "0x90",
+                    "lane6": "0x8C",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFEC",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFF0",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "58": {
+            "Default": {
+                "main": {
+                    "lane0": "0x98",
+                    "lane1": "0x94",
+                    "lane2": "0x98",
+                    "lane3": "0x94",
+                    "lane4": "0x90",
+                    "lane5": "0x8C",
+                    "lane6": "0x90",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFF0",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "59": {
+            "Default": {
+                "main": {
+                    "lane0": "0x90",
+                    "lane1": "0x90",
+                    "lane2": "0x8C",
+                    "lane3": "0x98",
+                    "lane4": "0x8C",
+                    "lane5": "0x90",
+                    "lane6": "0x8C",
+                    "lane7": "0x88"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFEC",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF0",
+                    "lane7": "0xFFFFFFEC"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "60": {
+            "Default": {
+                "main": {
+                    "lane0": "0x90",
+                    "lane1": "0x88",
+                    "lane2": "0x90",
+                    "lane3": "0x90",
+                    "lane4": "0x94",
+                    "lane5": "0x90",
+                    "lane6": "0x94",
+                    "lane7": "0x88"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF0",
+                    "lane1": "0xFFFFFFEC",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFEC"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "61": {
+            "Default": {
+                "main": {
+                    "lane0": "0x98",
+                    "lane1": "0x94",
+                    "lane2": "0x90",
+                    "lane3": "0x98",
+                    "lane4": "0x94",
+                    "lane5": "0x94",
+                    "lane6": "0x94",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF4",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "62": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x98",
+                    "lane2": "0x98",
+                    "lane3": "0x90",
+                    "lane4": "0x8C",
+                    "lane5": "0x98",
+                    "lane6": "0x98",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "63": {
+            "Default": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x90",
+                    "lane3": "0x94",
+                    "lane4": "0x8C",
+                    "lane5": "0x90",
+                    "lane6": "0x8C",
+                    "lane7": "0x8C"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF4",
+                    "lane4": "0xFFFFFFEC",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFEC",
+                    "lane7": "0xFFFFFFF0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "64": {
+            "Default": {
+                "main": {
+                    "lane0": "0x90",
+                    "lane1": "0x8C",
+                    "lane2": "0x90",
+                    "lane3": "0x98",
+                    "lane4": "0x8C",
+                    "lane5": "0x90",
+                    "lane6": "0x90",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF0",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF0",
+                    "lane1": "0xFFFFFFF4",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF4",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF4",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "65": {
+            "Default": {
+                "main": {
+                    "lane0": "0x1A"
+                },
+                "post1": {
+                    "lane0": "0x1"
+                },
+                "post2": {
+                    "lane0": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0x2"
+                },
+                "pre2": {
+                    "lane0": "0x0"
+                }
+            }
+        },
+        "66": {
+            "Default": {
+                "main": {
+                    "lane0": "0x1A"
+                },
+                "post1": {
+                    "lane0": "0x1"
+                },
+                "post2": {
+                    "lane0": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0x1"
+                },
+                "pre2": {
+                    "lane0": "0x0"
+                }
+            }
+        }
+    }
+}
\ No newline at end of file
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/pg_profile_lookup.ini b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/pg_profile_lookup.ini
index 92d4f78ef3a8..7330b5320af2 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/pg_profile_lookup.ini
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/Nokia-IXR7220-H4-64D/pg_profile_lookup.ini
@@ -1,23 +1,20 @@
 # PG lossless profiles.
-# speed cable size    xon  xoff    threshold xon_offset
-  10000  5m   1248    2288 35776   0         2288
-  25000  5m   1248    2288 53248   0         2288
-  40000  5m   1248    2288 66560   0         2288
-  50000  5m   1248    2288 90272   0         2288
- 100000  5m   18796   3556 150368  -2        3556
- 200000  5m   18796   3556 150368  -2        3556
- 400000  5m   18796   3556 150368  -2        3556
-  10000  40m  1248    2288 37024   0         2288
-  25000  40m  1248    2288 53248   0         2288
-  40000  40m  1248    2288 71552   0         2288
-  50000  40m  1248    2288 96096   0         2288
- 100000  40m  18796   3556 150368  -2        3556
- 200000  40m  18796   3556 150368  -2        3556
- 400000  40m  18796   3556 150368  -2        3556
-  10000  300m 1248    2288 46176   0         2288
-  25000  300m 1248    2288 79040   0         2288
-  40000  300m 1248    2288 108160  0         2288
-  50000  300m 1248    2288 141856  0         2288
- 100000  300m 18796   3556 150368  -2        3556
- 200000  300m 18796   3556 150368  -2        3556
- 400000  300m 18796   3556 150368  -2        3556
+# speed cable size    xon  xoff threshold xon_offset
+  10000  5m   1248    2288 35776   0        2288
+  25000  5m   1248    2288 53248   0        2288
+  40000  5m   1248    2288 66560   0        2288
+  50000  5m   1248    2288 90272   0        2288
+ 100000  5m   1248    2288 165568  0        2288
+ 400000  5m   1248    2288 307848  0        2288
+  10000  40m  1248    2288 37024   0        2288
+  25000  40m  1248    2288 53248   0        2288
+  40000  40m  1248    2288 71552   0        2288
+  50000  40m  1248    2288 96096   0        2288
+ 100000  40m  1248    2288 177632  0        2288
+ 400000  40m  1248    2288 330200  0        2288
+  10000  300m 1248    2288 46176   0        2288
+  25000  300m 1248    2288 79040   0        2288
+  40000  300m 1248    2288 108160  0        2288
+  50000  300m 1248    2288 141856  0        2288
+ 100000  300m 1248    2288 268736  0        2288
+ 400000  300m 1248    2288 499618  0        2288
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/plugins/led_control.py b/device/nokia/x86_64-nokia_ixr7220_h4-r0/plugins/led_control.py
index ee11694ab003..991c81442649 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h4-r0/plugins/led_control.py
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/plugins/led_control.py
@@ -55,4 +55,4 @@ def _write_sysfs_file(self, sysfs_file, value):
     
     def _initSystemLed(self):
         # Write sys led
-        status = self._write_sysfs_file(SYS_LED_PATH, "8")
+        status = self._write_sysfs_file(SYS_LED_PATH, "4")
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/plugins/ssd_util.py b/device/nokia/x86_64-nokia_ixr7220_h4-r0/plugins/ssd_util.py
new file mode 100755
index 000000000000..8fd82d32e2ed
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/plugins/ssd_util.py
@@ -0,0 +1,139 @@
+#
+# ssd_util.py
+#
+
+try:
+    import re
+    import subprocess
+    from sonic_platform_base.sonic_storage.storage_base import StorageBase
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+NOT_AVAILABLE = "N/A"
+SMARTCTL = "smartctl {} -a"
+GENERIC_HEALTH_ID = 169
+PHISON_HEALTH_ID = 231
+
+class SsdUtil(StorageBase):
+    """
+    Generic implementation of the SSD health API
+    """
+    model = NOT_AVAILABLE
+    serial = NOT_AVAILABLE
+    firmware = NOT_AVAILABLE
+    temperature = NOT_AVAILABLE
+    health = NOT_AVAILABLE
+    ssd_info = NOT_AVAILABLE
+    vendor_ssd_info = NOT_AVAILABLE
+
+    def __init__(self, diskdev):
+
+        self.vendor_ssd_utility = {
+            "Generic"  : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info }
+        }
+
+        self.dev = diskdev
+        self.fetch_parse_info(diskdev)
+
+    def fetch_parse_info(self, diskdev):
+        self.fetch_generic_ssd_info(diskdev)
+        self.parse_generic_ssd_info()
+
+    def _execute_shell(self, cmd):
+        process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE)
+        output, error = process.communicate()
+        return output
+
+    def _parse_re(self, pattern, buffer):
+        res_list = re.findall(pattern, buffer)
+        return res_list[0] if res_list else NOT_AVAILABLE
+
+    def fetch_generic_ssd_info(self, diskdev):
+        self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev))
+
+    def parse_generic_ssd_info(self):
+        self.model = self._parse_re('Device Model:\s*(.+?)\n', self.ssd_info)
+        if self.model.startswith('SM'):
+            health_id = PHISON_HEALTH_ID
+        else:
+            health_id = GENERIC_HEALTH_ID
+
+        health_raw = self.parse_id_number(health_id, self.ssd_info)
+        if health_raw == NOT_AVAILABLE:
+            self.health = NOT_AVAILABLE
+        else: self.health = health_raw.split()[-1]
+
+        temp_raw = self._parse_re('Temperature_Celsius\s*(.+?)\n', self.ssd_info)
+        if temp_raw == NOT_AVAILABLE:
+            self.temperature = NOT_AVAILABLE
+        else:
+            self.temperature = temp_raw.split()[7].split()[0]
+
+        self.serial = self._parse_re('Serial Number:\s*(.+?)\n', self.ssd_info)
+        self.firmware = self._parse_re('Firmware Version:\s*(.+?)\n', self.ssd_info)
+
+
+    def get_health(self):
+        """
+        Retrieves current disk health in percentages
+
+        Returns:
+            A float number of current ssd health
+            e.g. 83.5
+        """
+        return self.health
+
+    def get_temperature(self):
+        """
+        Retrieves current disk temperature in Celsius
+
+        Returns:
+            A float number of current temperature in Celsius
+            e.g. 40.1
+        """
+        return self.temperature
+
+    def get_model(self):
+        """
+        Retrieves model for the given disk device
+
+        Returns:
+            A string holding disk model as provided by the manufacturer
+        """
+        return self.model
+
+    def get_firmware(self):
+        """
+        Retrieves firmware version for the given disk device
+
+        Returns:
+            A string holding disk firmware version as provided by the manufacturer
+        """
+        return self.firmware
+
+    def get_serial(self):
+        """
+        Retrieves serial number for the given disk device
+
+        Returns:
+            A string holding disk serial number as provided by the manufacturer
+        """
+        return self.serial
+
+    def get_vendor_output(self):
+        """
+        Retrieves vendor specific data for the given disk device
+
+        Returns:
+            A string holding some vendor specific disk information
+        """
+        return self.vendor_ssd_info
+
+    def parse_id_number(self, id, buffer):
+        if buffer:
+            buffer_lines = buffer.split('\n')
+            for line in buffer_lines:
+                if line.strip().startswith(str(id)):
+                    return line[len(str(id)):]
+
+        return NOT_AVAILABLE
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/buffers.json.j2 b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/buffers.json.j2
new file mode 100644
index 000000000000..0b1cb2c541b6
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/buffers_defaults_t0.j2 b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/buffers_defaults_t0.j2
new file mode 100644
index 000000000000..4f04d24906ae
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/buffers_defaults_t0.j2
@@ -0,0 +1,41 @@
+{%- set default_cable = '5m' %}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0,128,4) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+  "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "57482232",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "25326848"
+        },
+        "egress_lossless_pool": {
+            "size": "57482232",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"-1"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"-4"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/buffers_defaults_t1.j2 b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/buffers_defaults_t1.j2
new file mode 100644
index 000000000000..4f04d24906ae
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/buffers_defaults_t1.j2
@@ -0,0 +1,41 @@
+{%- set default_cable = '5m' %}
+
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0,128,4) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+  "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "57482232",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "25326848"
+        },
+        "egress_lossless_pool": {
+            "size": "57482232",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"-1"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"-4"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/ixr7220_h4_32d.bcm b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/ixr7220_h4_32d.bcm
index bf354d4526e4..12c81719a1bd 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/ixr7220_h4_32d.bcm
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/ixr7220_h4_32d.bcm
@@ -1,1645 +1,661 @@
-# $Copyright: Broadcom Ltd.$
-# $Copyright: Nokia
-#
-# BCM56993 32x400g port configuration.
-# Support pipe numbers: 0, 1, 2, 3, 12, 13, 14, 15
-#
-# configuration yaml file
-#   device:
-#       <unit>:
-#           <table>:
-#               ?
-#                   <key_fld_1>: <value>
-#                   <key_fld_2>: <value>
-#                   ...
-#                   <key_fld_n>: <value>
-#               :
-#                   <data_fld_1>: <value>
-#                   <data_fld_2>: <value>
-#                   ...
-#                   <data_fld_n>: <value>
-#
-
----
-bcm_device:
-    0:
-        global:
-            pktio_mode: 1
-            vlan_flooding_l2mc_num_reserved: 0
-            ipv6_lpm_128b_enable: 1
-            shared_block_mask_section: uc_bc
-            skip_protocol_default_entries: 1
-            # LTSW uses value 1 for ALPM combined mode
-            l3_alpm_template: 1
-            l3_alpm_hit_skip: 1
-            sai_feat_tail_timestamp : 1
-            sai_field_group_auto_prioritize: 1
-            #l3_intf_vlan_split_egress for MTU at L3IF
-            l3_intf_vlan_split_egress : 1
-
-            # vxlan
-            l3_alpm_template: 1
-            riot_overlay_l3_egress_mem_size: 16384
-            riot_overlay_l3_intf_mem_size: 4096
-            l3_ecmp_member_first_lkup_mem_size: 12288
-            bcm_tunnel_term_compatible_mode: 1
-            shared_l2_tunnel: 1
-            sai_tunnel_support: 10
-            sai_tunnel_underlay_route_mode: 2
-            sai_tunnel_ecmp_sharing_mode: 0 # change to 2 if SAI_NEXT_HOP_GROUP_ATTR_LEVEL_1 used
-
-            # bfd
-            #bfd_enable: 1
-            #bfd_sha1_keys: 5
-            #bfd_num_sessions: 2048
-            #bfd_simple_password_keys: 5
-            #num_queues_pci: 47
-            #num_queues_uc0: 1
-            #bfd_feature_enable: 1
-            #bfd_use_endpoint_id_as_discriminator: 1
-            #bfd_tx_raw_ingress_enable: 1
-            #sai_eapp_config_file: "/usr/share/sonic/device/x86_64-broadcom_common/eapps/eapp_config.json"
----
-device:
-    0:
-        PC_SERDES_CONFIG:
-            PKG_SWAP_BYPASS: 1
-
-        PC_PM_CORE:
-            ?
-                PC_PM_ID: 1
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x72306451
-                TX_LANE_MAP: 0x14670235
-                RX_POLARITY_FLIP: 0xff
-                TX_POLARITY_FLIP: 0xab
-            ?
-                PC_PM_ID: 2
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x20635471
-                TX_LANE_MAP: 0x26134705
-                RX_POLARITY_FLIP: 0x00
-                TX_POLARITY_FLIP: 0xfc
-            ?
-                PC_PM_ID: 3
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x46217035
-                TX_LANE_MAP: 0x40536172
-                RX_POLARITY_FLIP: 0xf3
-                TX_POLARITY_FLIP: 0x80
-            ?
-                PC_PM_ID: 4
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x25643170
-                TX_LANE_MAP: 0x20751364
-                RX_POLARITY_FLIP: 0xfb
-                TX_POLARITY_FLIP: 0x66
-            ?
-                PC_PM_ID: 5
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x07623415
-                TX_LANE_MAP: 0x02746153
-                RX_POLARITY_FLIP: 0xeb
-                TX_POLARITY_FLIP: 0x68
-            ?
-                PC_PM_ID: 6
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x37640215
-                TX_LANE_MAP: 0x67130524
-                RX_POLARITY_FLIP: 0x40
-                TX_POLARITY_FLIP: 0x45
-            ?
-                PC_PM_ID: 7
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x17320645
-                TX_LANE_MAP: 0x71536240
-                RX_POLARITY_FLIP: 0x55
-                TX_POLARITY_FLIP: 0x28
-            ?
-                PC_PM_ID: 8
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x30716245
-                TX_LANE_MAP: 0x64107523
-                RX_POLARITY_FLIP: 0x7e
-                TX_POLARITY_FLIP: 0x14
-            ?
-                PC_PM_ID: 9
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x46712350
-                TX_LANE_MAP: 0x74031526
-                RX_POLARITY_FLIP: 0x9d
-                TX_POLARITY_FLIP: 0x08
-            ?
-                PC_PM_ID: 10
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x76125340
-                TX_LANE_MAP: 0x13645072
-                RX_POLARITY_FLIP: 0x40
-                TX_POLARITY_FLIP: 0xd9
-            ?
-                PC_PM_ID: 11
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x43601275
-                TX_LANE_MAP: 0x36251407
-                RX_POLARITY_FLIP: 0xdF
-                TX_POLARITY_FLIP: 0x29
-            ?
-                PC_PM_ID: 12
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x65423170
-                TX_LANE_MAP: 0x23170465
-                RX_POLARITY_FLIP: 0xfe
-                TX_POLARITY_FLIP: 0x54
-            ?
-                PC_PM_ID: 13
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x71306245
-                TX_LANE_MAP: 0x45721630
-                RX_POLARITY_FLIP: 0x00
-                TX_POLARITY_FLIP: 0xec
-            ?
-                PC_PM_ID: 14
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x62514370
-                TX_LANE_MAP: 0x31745260
-                RX_POLARITY_FLIP: 0x00
-                TX_POLARITY_FLIP: 0x74
-            ?
-                PC_PM_ID: 15
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x20574136
-                TX_LANE_MAP: 0x17352406
-                RX_POLARITY_FLIP: 0x45
-                TX_POLARITY_FLIP: 0x10
-            ?
-                PC_PM_ID: 16
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x07561423
-                TX_LANE_MAP: 0x56137402
-                RX_POLARITY_FLIP: 0xfb
-                TX_POLARITY_FLIP: 0x33
-            ?
-                PC_PM_ID: 49
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x13240576
-                TX_LANE_MAP: 0x31524706
-                RX_POLARITY_FLIP: 0xaa
-                TX_POLARITY_FLIP: 0x95
-            ?
-                PC_PM_ID: 50
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x32450716
-                TX_LANE_MAP: 0x42610573
-                RX_POLARITY_FLIP: 0x05
-                TX_POLARITY_FLIP: 0xcc
-            ?
-                PC_PM_ID: 51
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x74632150
-                TX_LANE_MAP: 0x12704365
-                RX_POLARITY_FLIP: 0x3a
-                TX_POLARITY_FLIP: 0xd8
-            ?
-                PC_PM_ID: 52
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x23564107
-                TX_LANE_MAP: 0x76023514
-                RX_POLARITY_FLIP: 0xcc
-                TX_POLARITY_FLIP: 0x7e
-            ?
-                PC_PM_ID: 53
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x35726041
-                TX_LANE_MAP: 0x40156273
-                RX_POLARITY_FLIP: 0x28
-                TX_POLARITY_FLIP: 0x7e
-            ?
-                PC_PM_ID: 54
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x34016257
-                TX_LANE_MAP: 0x76534012
-                RX_POLARITY_FLIP: 0x80
-                TX_POLARITY_FLIP: 0x22
-            ?
-                PC_PM_ID: 55
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x16743520
-                TX_LANE_MAP: 0x23416075
-                RX_POLARITY_FLIP: 0x00
-                TX_POLARITY_FLIP: 0x26
-            ?
-                PC_PM_ID: 56
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x64037152
-                TX_LANE_MAP: 0x64732150
-                RX_POLARITY_FLIP: 0x77
-                TX_POLARITY_FLIP: 0x6a
-            ?
-                PC_PM_ID: 57
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x42537061
-                TX_LANE_MAP: 0x50246173
-                RX_POLARITY_FLIP: 0x32
-                TX_POLARITY_FLIP: 0x5e
-            ?
-                PC_PM_ID: 58
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x31207564
-                TX_LANE_MAP: 0x01734562
-                RX_POLARITY_FLIP: 0x08
-                TX_POLARITY_FLIP: 0x23
-            ?
-                PC_PM_ID: 59
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x51473062
-                TX_LANE_MAP: 0x62705341
-                RX_POLARITY_FLIP: 0x00
-                TX_POLARITY_FLIP: 0x63
-            ?
-                PC_PM_ID: 60
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x62471305
-                TX_LANE_MAP: 0x43506172
-                RX_POLARITY_FLIP: 0x7f
-                TX_POLARITY_FLIP: 0x07
-            ?
-                PC_PM_ID: 61
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x53024617
-                TX_LANE_MAP: 0x50627143
-                RX_POLARITY_FLIP: 0x8f
-                TX_POLARITY_FLIP: 0x6b
-            ?
-                PC_PM_ID: 62
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x62537041
-                TX_LANE_MAP: 0x02761345
-                RX_POLARITY_FLIP: 0x7c
-                TX_POLARITY_FLIP: 0xa2
-            ?
-                PC_PM_ID: 63
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x20653174
-                TX_LANE_MAP: 0x06714523
-                RX_POLARITY_FLIP: 0x26
-                TX_POLARITY_FLIP: 0x20
-            ?
-                PC_PM_ID: 64
-                CORE_INDEX: 0
-            :
-                RX_LANE_MAP_AUTO: 0
-                TX_LANE_MAP_AUTO: 0
-                RX_POLARITY_FLIP_AUTO: 0
-                TX_POLARITY_FLIP_AUTO: 0
-                RX_LANE_MAP: 0x74516320
-                TX_LANE_MAP: 0x53170426
-                RX_POLARITY_FLIP: 0xef
-                TX_POLARITY_FLIP: 0xef
-...
----
-device:
-    0:
-        PC_PORT_PHYS_MAP:
-            ?
-                # CPU port
-                PORT_ID: 0
-            :
-                PC_PHYS_PORT_ID: 0
-            ?
-                PORT_ID: 1
-            :
-                PC_PHYS_PORT_ID: 1
-            ?
-                PORT_ID: 2
-            :
-                PC_PHYS_PORT_ID: 5
-            ?
-                PORT_ID: 3
-            :
-                PC_PHYS_PORT_ID: 9
-            ?
-                PORT_ID: 4
-            :
-                PC_PHYS_PORT_ID: 13
-            ?
-                PORT_ID: 17
-            :
-                PC_PHYS_PORT_ID: 17
-            ?
-                PORT_ID: 18
-            :
-                PC_PHYS_PORT_ID: 21
-            ?
-                PORT_ID: 19
-            :
-                PC_PHYS_PORT_ID: 25
-            ?
-                PORT_ID: 20
-            :
-                PC_PHYS_PORT_ID: 29
-            ?
-                PORT_ID: 34
-            :
-                PC_PHYS_PORT_ID: 33
-            ?
-                PORT_ID: 35
-            :
-                PC_PHYS_PORT_ID: 37
-            ?
-                PORT_ID: 36
-            :
-                PC_PHYS_PORT_ID: 41
-            ?
-                PORT_ID: 37
-            :
-                PC_PHYS_PORT_ID: 45
-            ?
-                PORT_ID: 51
-            :
-                PC_PHYS_PORT_ID: 49
-            ?
-                PORT_ID: 52
-            :
-                PC_PHYS_PORT_ID: 53
-            ?
-                PORT_ID: 53
-            :
-                PC_PHYS_PORT_ID: 57
-            ?
-                PORT_ID: 54
-            :
-                PC_PHYS_PORT_ID: 61
-            ?
-                PORT_ID: 204
-            :
-                PC_PHYS_PORT_ID: 193
-            ?
-                PORT_ID: 205
-            :
-                PC_PHYS_PORT_ID: 197
-            ?
-                PORT_ID: 206
-            :
-                PC_PHYS_PORT_ID: 201
-            ?
-                PORT_ID: 207
-            :
-                PC_PHYS_PORT_ID: 205
-            ?
-                PORT_ID: 221
-            :
-                PC_PHYS_PORT_ID: 209
-            ?
-                PORT_ID: 222
-            :
-                PC_PHYS_PORT_ID: 213
-            ?
-                PORT_ID: 223
-            :
-                PC_PHYS_PORT_ID: 217
-            ?
-                PORT_ID: 224
-            :
-                PC_PHYS_PORT_ID: 221
-            ?
-                PORT_ID: 238
-            :
-                PC_PHYS_PORT_ID: 225
-            ?
-                PORT_ID: 239
-            :
-                PC_PHYS_PORT_ID: 229
-            ?
-                PORT_ID: 240
-            :
-                PC_PHYS_PORT_ID: 233
-            ?
-                PORT_ID: 241
-            :
-                PC_PHYS_PORT_ID: 237
-            ?
-                PORT_ID: 255
-            :
-                PC_PHYS_PORT_ID: 241
-            ?
-                PORT_ID: 256
-            :
-                PC_PHYS_PORT_ID: 245
-            ?
-                PORT_ID: 257
-            :
-                PC_PHYS_PORT_ID: 249
-            ?
-                PORT_ID: 258
-            :
-                PC_PHYS_PORT_ID: 253
-            ?
-                PORT_ID: 50
-            :
-                PC_PHYS_PORT_ID: 258
-...
----
-device:
-    0:
-        PC_PORT:
-            ?
-                PORT_ID: 0
-            :
-                &port_mode_10g
-                ENABLE: 1
-                SPEED: 10000
-                NUM_LANES: 1
-            ?
-                PORT_ID: [[50, 50]]
-            :
-                ENABLE: 0
-                MAX_FRAME_SIZE: 9416
-                SPEED: 10000
-                NUM_LANES: 1
-            ?
-               PORT_ID: [[1, 4],
-                         [17, 20],
-                         [34, 37],
-                         [51, 54],
-                         [204, 207],
-                         [221, 224],
-                         [238, 241],
-                         [255, 258]]
-            :
-                ENABLE: 0
-                SPEED: 400000
-                NUM_LANES: 8
-                FEC_MODE: PC_FEC_RS544_2XN
-                MAX_FRAME_SIZE: 9416
-...
----
-device:
-    0:
-        # Per pipe flex counter configuration
-        CTR_EFLEX_CONFIG:
-            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0
-            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0
-
-        # Per pipe flex state configuration
-        #FLEX_STATE_CONFIG:
-        #    FLEX_STATE_ING_OPERMODE_PIPEUNIQUE: 0
-        #    FLEX_STATE_EGR_OPERMODE_PIPEUNIQUE: 1
-
-        # Lossy vs Lossless mode
-        TM_THD_CONFIG:
-            THRESHOLD_MODE: LOSSLESS
-
-        # IFP mode
-        FP_CONFIG:
-            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
-...
----
-device:
-    0:
-        TM_THD_CONFIG:
-            SKIP_BUFFER_RESERVATION: 1
-            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
-
-        TM_SCHEDULER_CONFIG:
-            NUM_MC_Q: NUM_MC_Q_2
-...
----
-device:
-    0:
-        TM_ING_THD_PORT_PRI_GRP:
-            ?
-                PORT_ID: [[0,67], [204,219], [221,253],[255,271]]
-                TM_PRI_GRP_ID: [[0,7]]
-            :
-                MIN_GUARANTEE_CELLS: 0
-                DYNAMIC_SHARED_LIMITS: 0
-                SHARED_LIMIT_CELLS_STATIC: 0
-                HEADROOM_LIMIT_CELLS: 0
-
-        TM_ING_THD_PORT_SERVICE_POOL:
-            ?
-                PORT_ID: [[0,67], [204,219], [221,253],[255,271]]
-                TM_ING_SERVICE_POOL_ID: [[0,3]]
-            :
-                MIN_GUARANTEE_CELLS: 0
-                SHARED_LIMIT_CELLS: 0
-
-        TM_ING_THD_HEADROOM_POOL:
-            ?
-                BUFFER_POOL: 0
-                TM_HEADROOM_POOL_ID: [[0,3]]
-            :
-                LIMIT_CELLS: 0
-
-        TM_THD_UC_Q:
-            ?
-                PORT_ID: [[1,67], [204,219], [221,253],[255,271]]
-                TM_UC_Q_ID: [[0,11]]
-            :
-                MIN_GUARANTEE_CELLS: 0
-                SHARED_LIMITS: 1
-                DYNAMIC_SHARED_LIMITS: 0
-                SHARED_LIMIT_CELLS_STATIC: 0
-
-        TM_THD_MC_Q:
-            ?
-                PORT_ID: 0
-                TM_MC_Q_ID: [[0,47]]
-            :
-                MIN_GUARANTEE_CELLS: 0
-            ?
-                PORT_ID: [[1,67], [204,219], [221,253],[255,271]]
-                TM_MC_Q_ID: [[0,5]]
-            :
-                MIN_GUARANTEE_CELLS: 0
-                SHARED_LIMITS: 1
-                DYNAMIC_SHARED_LIMITS: 0
-                SHARED_LIMIT_CELLS_STATIC: 0
-
-        TM_THD_Q_GRP:
-            ?
-                PORT_ID: [[0,67], [204,219], [221,253],[255,271]]
-            :
-                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
-                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
-...
----
-device:
-    0:
-        TM_ING_PORT:
-            ?
-                PORT_ID: [[0,67], [204,219], [221,253],[255,271]]
-            :
-                PAUSE: 0
-
-        TM_ING_PORT_PRI_GRP:
-            ?
-                PORT_ID: [[0,67], [204,219], [221,253],[255,271]]
-                TM_PRI_GRP_ID: [[0,7]]
-            :
-                PFC: 0
-                LOSSLESS: 0
-                ING_MIN_MODE: USE_PRI_GRP_MIN
-
-        TM_PORT_UC_Q_TO_SERVICE_POOL:
-            ?
-                PORT_ID: [[1,67], [204,219], [221,253],[255,271]]
-                TM_UC_Q_ID: [[0,11]]
-            :
-                USE_QGROUP_MIN: 0
-
-        TM_PORT_MC_Q_TO_SERVICE_POOL:
-            ?
-                PORT_ID: 0
-                TM_MC_Q_ID: [[0,47]]
-            :
-                USE_QGROUP_MIN: 0
-            ?
-                PORT_ID: [[1,67], [204,219], [221,253],[255,271]]
-                TM_MC_Q_ID: [[0,5]]
-            :
-                USE_QGROUP_MIN: 0
-...
----
-device:
-    0:
-        TM_ING_THD_HEADROOM_POOL:
-            ?
-                BUFFER_POOL: 0
-                TM_HEADROOM_POOL_ID: [[0,3]]
-            :
-                LIMIT_CELLS: 0
-
-        TM_ING_THD_SERVICE_POOL:
-            ?
-                BUFFER_POOL: 0
-                TM_ING_SERVICE_POOL_ID: [[0,3]]
-            :
-                SHARED_LIMIT_CELLS: 0
-                SHARED_RESUME_OFFSET_CELLS: 0
-                COLOR_SPECIFIC_LIMITS: 0
-
-        TM_EGR_THD_SERVICE_POOL:
-            ?
-                BUFFER_POOL: 0
-                TM_EGR_SERVICE_POOL_ID: [[0,3]]
-            :
-                SHARED_LIMIT_CELLS: 0
-                SHARED_RESUME_LIMIT_CELLS: 0
-                COLOR_SPECIFIC_LIMITS: 0
-                YELLOW_SHARED_LIMIT_CELLS: 0
-                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
-                RED_SHARED_LIMIT_CELLS: 0
-                RED_SHARED_RESUME_LIMIT_CELLS: 0
-
-        TM_THD_MC_EGR_SERVICE_POOL:
-            ?
-                BUFFER_POOL: 0
-                TM_EGR_SERVICE_POOL_ID: [[0,3]]
-            :
-                SHARED_LIMIT_CELLS: 0
-                SHARED_RESUME_LIMIT_CELLS: 0
-                COLOR_SPECIFIC_LIMITS: 0
-                YELLOW_SHARED_LIMIT_CELLS: 0
-                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
-                RED_SHARED_LIMIT_CELLS: 0
-                RED_SHARED_RESUME_LIMIT_CELLS: 0
-...
-
-### Mapping
----
-device:
-    0:
-        TM_ING_UC_ING_PRI_MAP:
-            ?
-                # Profile 1
-                TM_ING_UC_ING_PRI_MAP_ID: 1
-                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
-            :
-                TM_PRI_GRP_ID: 0
-            ?
-                TM_ING_UC_ING_PRI_MAP_ID: 1
-                ING_PRI: 3
-            :
-                TM_PRI_GRP_ID: 3
-            ?
-                TM_ING_UC_ING_PRI_MAP_ID: 1
-                ING_PRI: 4
-            :
-                TM_PRI_GRP_ID: 4
-            ?
-                TM_ING_UC_ING_PRI_MAP_ID: 1
-                ING_PRI: 7
-            :
-                TM_PRI_GRP_ID: 7
-            ?
-                # Profile 2
-                TM_ING_UC_ING_PRI_MAP_ID: 1
-                ING_PRI: [0, 1, 5, [8,15]]
-            :
-                TM_PRI_GRP_ID: 0
-            ?
-                TM_ING_UC_ING_PRI_MAP_ID: 2
-                ING_PRI: 2
-            :
-                TM_PRI_GRP_ID: 2
-            ?
-                TM_ING_UC_ING_PRI_MAP_ID: 2
-                ING_PRI: 3
-            :
-                TM_PRI_GRP_ID: 3
-            ?
-                TM_ING_UC_ING_PRI_MAP_ID: 2
-                ING_PRI: 4
-            :
-                TM_PRI_GRP_ID: 4
-            ?
-                TM_ING_UC_ING_PRI_MAP_ID: 2
-                ING_PRI: 6
-            :
-                TM_PRI_GRP_ID: 6
-            ?
-                TM_ING_UC_ING_PRI_MAP_ID: 2
-                ING_PRI: 7
-            :
-                TM_PRI_GRP_ID: 7
-            ?
-                # Profile 3
-                TM_ING_UC_ING_PRI_MAP_ID: 3
-                ING_PRI: [[0,15]]
-            :
-                TM_PRI_GRP_ID: 7
-
-        TM_ING_NONUC_ING_PRI_MAP:
-            ?
-                # Profile 1
-                TM_ING_NONUC_ING_PRI_MAP_ID: 1
-                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
-            :
-                TM_PRI_GRP_ID: 0
-            ?
-                TM_ING_NONUC_ING_PRI_MAP_ID: 1
-                ING_PRI: 3
-            :
-                TM_PRI_GRP_ID: 3
-            ?
-                TM_ING_NONUC_ING_PRI_MAP_ID: 1
-                ING_PRI: 4
-            :
-                TM_PRI_GRP_ID: 4
-            ?
-                TM_ING_NONUC_ING_PRI_MAP_ID: 1
-                ING_PRI: 7
-            :
-                TM_PRI_GRP_ID: 7
-            ?
-                # Profile 2
-                TM_ING_NONUC_ING_PRI_MAP_ID: 1
-                ING_PRI: [0, 1, 5, [8,15]]
-            :
-                TM_PRI_GRP_ID: 0
-            ?
-                TM_ING_NONUC_ING_PRI_MAP_ID: 2
-                ING_PRI: 2
-            :
-                TM_PRI_GRP_ID: 2
-            ?
-                TM_ING_NONUC_ING_PRI_MAP_ID: 2
-                ING_PRI: 3
-            :
-                TM_PRI_GRP_ID: 3
-            ?
-                TM_ING_NONUC_ING_PRI_MAP_ID: 2
-                ING_PRI: 4
-            :
-                TM_PRI_GRP_ID: 4
-            ?
-                TM_ING_NONUC_ING_PRI_MAP_ID: 2
-                ING_PRI: 6
-            :
-                TM_PRI_GRP_ID: 6
-            ?
-                TM_ING_NONUC_ING_PRI_MAP_ID: 2
-                ING_PRI: 7
-            :
-                TM_PRI_GRP_ID: 7
-            ?
-                # Profile 3
-                TM_ING_NONUC_ING_PRI_MAP_ID: 3
-                ING_PRI: [[0,15]]
-            :
-                TM_PRI_GRP_ID: 7
-
-        TM_PRI_GRP_POOL_MAP:
-            ?
-                TM_PRI_GRP_POOL_MAP_ID: 1
-                TM_PRI_GRP_ID: [[0,6]]
-            :
-                TM_ING_SERVICE_POOL_ID: 0
-                TM_HEADROOM_POOL_ID: 0
-            ?
-                TM_PRI_GRP_POOL_MAP_ID: 1
-                TM_PRI_GRP_ID: 7
-            :
-                TM_ING_SERVICE_POOL_ID: 1
-                TM_HEADROOM_POOL_ID: 1
-
-        TM_ING_PORT:
-            ?
-                PORT_ID: [0]
-            :
-                ING_PRI_MAP_ID: 3
-                PRI_GRP_MAP_ID: 1
-            ?
-                PORT_ID: [[1,4], [204,207]]
-            :
-                ING_PRI_MAP_ID: 1
-                PRI_GRP_MAP_ID: 1
-            ?
-                PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]]
-            :
-                ING_PRI_MAP_ID: 2
-                PRI_GRP_MAP_ID: 1
-            ?
-                PORT_ID: [50]
-            :
-                ING_PRI_MAP_ID: 1
-                PRI_GRP_MAP_ID: 1
-            ?
-                PORT_ID: [33, 67, 237, 271]
-            :
-                ING_PRI_MAP_ID: 1
-                PRI_GRP_MAP_ID: 1
-
-        TM_PORT_UC_Q_TO_SERVICE_POOL:
-            ?
-                PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
-                TM_UC_Q_ID: [[0,6], [8,9]]
-            :
-                TM_EGR_SERVICE_POOL_ID: 0
-            ?
-                PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
-                TM_UC_Q_ID: 7
-            :
-                TM_EGR_SERVICE_POOL_ID: 1
-
-        TM_PORT_MC_Q_TO_SERVICE_POOL:
-            ?
-                PORT_ID: [0]
-                TM_MC_Q_ID: [[0,47]]
-            :
-                TM_EGR_SERVICE_POOL_ID: 1
-            ?
-                PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
-                TM_MC_Q_ID: [[0,1]]
-            :
-                TM_EGR_SERVICE_POOL_ID: 0
-...
-
-### Scheduler
----
-device:
-    0:
-        TM_SCHEDULER_PROFILE:
-            ?
-                TM_SCHEDULER_PROFILE_ID: 1
-                TM_SCHEDULER_NODE_ID: [0, 1]
-            :
-                NUM_UC_Q: 1
-                NUM_MC_Q: 1
-                FLOW_CTRL_UC: 0
-            ?
-                TM_SCHEDULER_PROFILE_ID: 1
-                TM_SCHEDULER_NODE_ID: [2, 5, 6, 7, 8, 9]
-            :
-                NUM_UC_Q: 1
-                NUM_MC_Q: 0
-                FLOW_CTRL_UC: 0
-            ?
-                TM_SCHEDULER_PROFILE_ID: 1
-                TM_SCHEDULER_NODE_ID: [3, 4]
-            :
-                NUM_UC_Q: 1
-                NUM_MC_Q: 0
-                FLOW_CTRL_UC: 1
-            ?
-                TM_SCHEDULER_PROFILE_ID: 1
-                TM_SCHEDULER_NODE_ID: [10, 11]
-            :
-                NUM_UC_Q: 0
-                NUM_MC_Q: 0
-                FLOW_CTRL_UC: 0
-
-        TM_SCHEDULER_PROFILE:
-            ?
-                TM_SCHEDULER_PROFILE_ID: 2
-                TM_SCHEDULER_NODE_ID: [0, 1]
-            :
-                NUM_UC_Q: 1
-                NUM_MC_Q: 1
-                FLOW_CTRL_UC: 0
-            ?
-                TM_SCHEDULER_PROFILE_ID: 2
-                TM_SCHEDULER_NODE_ID: [5, 7, 8, 9]
-            :
-                NUM_UC_Q: 1
-                NUM_MC_Q: 0
-                FLOW_CTRL_UC: 0
-            ?
-                TM_SCHEDULER_PROFILE_ID: 2
-                TM_SCHEDULER_NODE_ID: [2, 3, 4, 6]
-            :
-                NUM_UC_Q: 1
-                NUM_MC_Q: 0
-                FLOW_CTRL_UC: 1
-            ?
-                TM_SCHEDULER_PROFILE_ID: 2
-                TM_SCHEDULER_NODE_ID: [10, 11]
-            :
-                NUM_UC_Q: 0
-                NUM_MC_Q: 0
-                FLOW_CTRL_UC: 0
-...
----
-device:
-    0:
-        TM_SCHEDULER_PORT_PROFILE:
-            ?
-                PORT_ID: [[1,4], [204,207]]
-            :
-                TM_SCHEDULER_PROFILE_ID: 1
-                WRR: 0
-        TM_SCHEDULER_PORT_PROFILE:
-            ?
-                PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]]
-            :
-                TM_SCHEDULER_PROFILE_ID: 2
-                WRR: 0
-...
-
-### Pools
-### hard code service pool size for TH4 per architecture requirement.
----
-device:
-    0:
-        TM_ING_THD_HEADROOM_POOL:
-            ?
-                BUFFER_POOL: 0
-                TM_HEADROOM_POOL_ID: 0
-            :
-                LIMIT_CELLS: 45696
-
-        TM_ING_THD_SERVICE_POOL:
-            ?
-                BUFFER_POOL: 0
-                TM_ING_SERVICE_POOL_ID: 0
-            :
-                SHARED_LIMIT_CELLS: 173222
-                SHARED_RESUME_OFFSET_CELLS: 74
-                COLOR_SPECIFIC_LIMITS: 0
-            ?
-                BUFFER_POOL: 0
-                TM_ING_SERVICE_POOL_ID: 1
-            :
-                SHARED_LIMIT_CELLS: 605
-                SHARED_RESUME_OFFSET_CELLS: 74
-                COLOR_SPECIFIC_LIMITS: 0
-
-        TM_EGR_THD_SERVICE_POOL:
-            ?
-                BUFFER_POOL: 0
-                TM_EGR_SERVICE_POOL_ID: 0
-            :
-                SHARED_LIMIT_CELLS: 173222
-                SHARED_RESUME_LIMIT_CELLS: 21643
-                COLOR_SPECIFIC_LIMITS: 1
-                YELLOW_SHARED_LIMIT_CELLS: 16240
-                YELLOW_SHARED_RESUME_LIMIT_CELLS: 16230
-                RED_SHARED_LIMIT_CELLS: 13533
-                RED_SHARED_RESUME_LIMIT_CELLS: 13523
-            ?
-                BUFFER_POOL: 0
-                TM_EGR_SERVICE_POOL_ID: 1
-            :
-                SHARED_LIMIT_CELLS: 605
-                SHARED_RESUME_LIMIT_CELLS: 73
-                COLOR_SPECIFIC_LIMITS: 1
-                YELLOW_SHARED_LIMIT_CELLS: 57
-                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
-                RED_SHARED_LIMIT_CELLS: 48
-                RED_SHARED_RESUME_LIMIT_CELLS: 46
-
-        TM_THD_MC_EGR_SERVICE_POOL:
-            ?
-                BUFFER_POOL: 0
-                TM_EGR_SERVICE_POOL_ID: 0
-            :
-                SHARED_LIMIT_CELLS: 15779
-                SHARED_RESUME_LIMIT_CELLS: 1962
-                COLOR_SPECIFIC_LIMITS: 1
-                YELLOW_SHARED_LIMIT_CELLS: 1480
-                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1470
-                RED_SHARED_LIMIT_CELLS: 1233
-                RED_SHARED_RESUME_LIMIT_CELLS: 1223
-            ?
-                BUFFER_POOL: 0
-                TM_EGR_SERVICE_POOL_ID: 1
-            :
-                SHARED_LIMIT_CELLS: 605
-                SHARED_RESUME_LIMIT_CELLS: 73
-                COLOR_SPECIFIC_LIMITS: 1
-                YELLOW_SHARED_LIMIT_CELLS: 57
-                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
-                RED_SHARED_LIMIT_CELLS: 46
-                RED_SHARED_RESUME_LIMIT_CELLS: 46
-...
-
-### Thresholds
-######################################
----
-device:
-    0:
-        TM_ING_THD_PORT_PRI_GRP:
-            ?
-                PORT_ID: [[0,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
-                TM_PRI_GRP_ID: [0, 1, 5, 7]
-            :
-                SHARED_LIMIT_CELLS_STATIC: 227317
-                MIN_GUARANTEE_CELLS: 0
-                DYNAMIC_SHARED_LIMITS: 0
-                RESUME_OFFSET_CELLS: 0
-                RESUME_FLOOR_CELLS: 0
-                HEADROOM_LIMIT_AUTO: 0
-                HEADROOM_LIMIT_CELLS: 0
-            ?
-                PORT_ID: [[1,4], [204,207]]
-                TM_PRI_GRP_ID: [2, 3, 4, 6]
-            :
-                MIN_GUARANTEE_CELLS: 18
-                DYNAMIC_SHARED_LIMITS: 1
-                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
-                RESUME_OFFSET_CELLS: 18
-                RESUME_FLOOR_CELLS: 0
-                HEADROOM_LIMIT_AUTO: 0
-                HEADROOM_LIMIT_CELLS: 2874
-            ?
-                PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]]
-                TM_PRI_GRP_ID: [2, 3, 4, 6]
-            :
-                MIN_GUARANTEE_CELLS: 18
-                DYNAMIC_SHARED_LIMITS: 1
-                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
-                RESUME_OFFSET_CELLS: 18
-                RESUME_FLOOR_CELLS: 0
-                HEADROOM_LIMIT_AUTO: 0
-                HEADROOM_LIMIT_CELLS: 675
-            ?
-                PORT_ID: [50]
-                TM_PRI_GRP_ID: [2, 3, 4, 6]
-            :
-                MIN_GUARANTEE_CELLS: 0
-                DYNAMIC_SHARED_LIMITS: 1
-                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
-                RESUME_OFFSET_CELLS: 0
-                RESUME_FLOOR_CELLS: 0
-                HEADROOM_LIMIT_AUTO: 0
-            ?
-                PORT_ID: [33, 67, 237, 271]
-                TM_PRI_GRP_ID: [2, 3, 4, 6]
-            :
-                MIN_GUARANTEE_CELLS: 0
-                DYNAMIC_SHARED_LIMITS: 1
-                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
-                RESUME_OFFSET_CELLS: 0
-                RESUME_FLOOR_CELLS: 0
-                HEADROOM_LIMIT_AUTO: 0
-            ?
-                PORT_ID: [0]
-                TM_PRI_GRP_ID: [2, 3, 4, 6]
-            :
-                MIN_GUARANTEE_CELLS: 0
-                DYNAMIC_SHARED_LIMITS: 1
-                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
-                RESUME_OFFSET_CELLS: 0
-                RESUME_FLOOR_CELLS: 0
-                HEADROOM_LIMIT_AUTO: 0
-
-        TM_ING_THD_PORT_SERVICE_POOL:
-            ?
-                PORT_ID: [[0,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
-                TM_ING_SERVICE_POOL_ID: [0, 1]
-            :
-                MIN_GUARANTEE_CELLS: 0
-                SHARED_LIMIT_CELLS: 227317
-                RESUME_LIMIT_CELLS: 227317
-
-        TM_THD_UC_Q:
-            ?
-                PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
-                TM_UC_Q_ID: [0, 1, 5, 7, 8, 9]
-            :
-                SHARED_LIMITS: 1
-                COLOR_SPECIFIC_LIMITS: 1
-                RED_LIMIT_DYNAMIC: PERCENTAGE_675
-                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
-                COLOR_SPECIFIC_DYNAMIC_LIMITS: 1
-                MIN_GUARANTEE_CELLS: 7
-                DYNAMIC_SHARED_LIMITS: 1
-                SHARED_LIMIT_DYNAMIC: ALPHA_1
-                RESUME_OFFSET_CELLS: 2
-            ?
-                PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
-                TM_UC_Q_ID: [2, 3, 4, 6]
-            :
-                SHARED_LIMITS: 0
-                COLOR_SPECIFIC_LIMITS: 0
-                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
-                MIN_GUARANTEE_CELLS: 0
-                DYNAMIC_SHARED_LIMITS: 0
-                SHARED_LIMIT_CELLS_STATIC: 227317
-                RESUME_OFFSET_CELLS: 2
-
-        TM_THD_MC_Q:
-            ?
-                PORT_ID: [0]
-                TM_MC_Q_ID: [0, 1, 2, 3]
-            :
-                MIN_GUARANTEE_CELLS: 37
-                DYNAMIC_SHARED_LIMITS: 1
-                SHARED_LIMIT_DYNAMIC: ALPHA_2
-                COLOR_SPECIFIC_LIMITS: 1
-                COLOR_SPECIFIC_DYNAMIC_LIMITS: 1
-                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
-                RED_LIMIT_DYNAMIC: PERCENTAGE_675
-                RESUME_OFFSET_CELLS: 2
-            ?
-                PORT_ID: [0]
-                TM_MC_Q_ID: [4, 5, 6, 7, 8, 9]
-            :
-                MIN_GUARANTEE_CELLS: 7
-                SHARED_LIMITS: 1
-                DYNAMIC_SHARED_LIMITS: 1
-                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
-                COLOR_SPECIFIC_LIMITS: 1
-                COLOR_SPECIFIC_DYNAMIC_LIMITS: 1
-                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
-                RED_LIMIT_DYNAMIC: PERCENTAGE_675
-                RESUME_OFFSET_CELLS: 2
-            ?
-                PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
-                TM_MC_Q_ID: [0, 1]
-            :
-                SHARED_LIMITS: 1
-                DYNAMIC_SHARED_LIMITS: 1
-                SHARED_LIMIT_DYNAMIC: ALPHA_1
-                COLOR_SPECIFIC_LIMITS: 1
-                COLOR_SPECIFIC_DYNAMIC_LIMITS: 1
-                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
-                RED_LIMIT_DYNAMIC: PERCENTAGE_675
-                RESUME_OFFSET_CELLS: 2
-
-        TM_EGR_THD_UC_PORT_SERVICE_POOL:
-            ?
-                PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
-                TM_EGR_SERVICE_POOL_ID: 0
-            :
-                SHARED_LIMIT_CELLS: 173222
-                SHARED_RESUME_LIMIT_CELLS: 21651
-                COLOR_SPECIFIC_LIMITS: 1
-                YELLOW_SHARED_LIMIT_CELLS: 16239
-                YELLOW_SHARED_RESUME_LIMIT_CELLS: 16237
-                RED_SHARED_LIMIT_CELLS: 13532
-                RED_SHARED_RESUME_LIMIT_CELLS: 13530
-            ?
-                PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
-                TM_EGR_SERVICE_POOL_ID: 1
-            :
-                SHARED_LIMIT_CELLS: 605
-                SHARED_RESUME_LIMIT_CELLS: 73
-                COLOR_SPECIFIC_LIMITS: 1
-                YELLOW_SHARED_LIMIT_CELLS: 56
-                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
-                RED_SHARED_LIMIT_CELLS: 47
-                RED_SHARED_RESUME_LIMIT_CELLS: 45
-
-        TM_EGR_THD_MC_PORT_SERVICE_POOL:
-            ?
-                PORT_ID: [[0,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
-                TM_EGR_SERVICE_POOL_ID: 0
-            :
-                COLOR_SPECIFIC_LIMITS: 1
-                RED_SHARED_LIMIT_CELLS: 1232
-                YELLOW_SHARED_LIMIT_CELLS: 1479
-                SHARED_LIMIT_CELLS: 15779
-                RED_SHARED_RESUME_LIMIT_CELLS: 1230
-                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1477
-                SHARED_RESUME_LIMIT_CELLS: 1970
-            ?
-                PORT_ID: [[0,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
-                TM_EGR_SERVICE_POOL_ID: 1
-            :
-                COLOR_SPECIFIC_LIMITS: 1
-                RED_SHARED_LIMIT_CELLS: 47
-                YELLOW_SHARED_LIMIT_CELLS: 56
-                SHARED_LIMIT_CELLS: 605
-                RED_SHARED_RESUME_LIMIT_CELLS: 45
-                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
-                SHARED_RESUME_LIMIT_CELLS: 73
-
-
-...
-### THDR Limits
----
-device:
-    0:
-        TM_THD_REPL_SERVICE_POOL:
-                COLOR_SPECIFIC_LIMITS: 1
-                SHARED_LIMIT_CELLS: 2961
-                SHARED_RESUME_LIMIT_CELLS: 2947
-                YELLOW_SHARED_LIMIT_CELLS: 2220
-                YELLOW_SHARED_RESUME_LIMIT_CELLS: 2206
-                RED_SHARED_LIMIT_CELLS: 1850
-                RED_SHARED_RESUME_LIMIT_CELLS: 1836
-
-        TM_THD_REPL_Q:
-            ?
-                REPL_Q_NUM: [0,8]
-            :
-                COLOR_SPECIFIC_LIMITS: 1
-                COLOR_SPECIFIC_DYNAMIC_LIMITS: 1
-                SHARED_LIMITS: 1
-                DYNAMIC_SHARED_LIMITS: 1
-                RESUME_OFFSET_CELLS: 14
-                SHARED_LIMIT_DYNAMIC: ALPHA_1
-                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
-                RED_LIMIT_DYNAMIC: PERCENTAGE_675
-                RESUME_OFFSET_YELLOW_CELLS: 14
-                RESUME_OFFSET_RED_CELLS: 14
-
-        TM_THD_REPL_Q:
-            ?
-                REPL_Q_NUM: [0,5]
-            :
-                MIN_GUARANTEE_CELLS: 0
-            ?
-                REPL_Q_NUM: [6,8]
-            :
-                MIN_GUARANTEE_CELLS: 37
-
-...
-### Mirror-on-drop
----
-device:
-    0:
-        TM_MIRROR_ON_DROP_CONTROL:
-            RESERVED_LIMIT_CELLS: 2580
-
-        TM_MIRROR_ON_DROP_PROFILE:
-            ?
-                TM_MIRROR_ON_DROP_PROFILE_ID: 0
-            :
-                PERCENTAGE_0_25: 65535
-                PERCENTAGE_25_50: 65535
-                PERCENTAGE_50_75: 65535
-                PERCENTAGE_75_100: 65535
-
-        TM_MIRROR_ON_DROP_DESTINATION:
-            ?
-                TM_MIRROR_ON_DROP_DESTINATION_ID: 0
-            :
-                TM_MC_Q_ID: 1
-                PORT_ID: 1
-...
-
-### OBM
----
-device:
-    0:
-        TM_OBM_PORT_PKT_PARSE:
-            ?
-                PORT_ID: [[1,4], [204,207]]
-            :
-                DSCP_MAP: 1
-                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
-                DEFAULT_PKT_PRI: 0
-
-        TM_OBM_PORT_PKT_PARSE:
-            ?
-                PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]]
-            :
-                DSCP_MAP: 1
-                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
-                DEFAULT_PKT_PRI: 0
-
-        TM_OBM_PORT_PKT_PRI_TC_MAP:
-            ?
-                PORT_ID: [[1,4], [204,207]]
-                PKT_PRI_TYPE: PKT_PRI_TYPE_DSCP
-                PKT_PRI: [3, 4]
-            :
-                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
-
-        TM_OBM_PORT_PKT_PRI_TC_MAP:
-            ?
-                PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]]
-                PKT_PRI_TYPE: PKT_PRI_TYPE_DSCP
-                PKT_PRI: [2, 3, 4, 6]
-            :
-                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
-
-        TM_OBM_THD_PORT:
-            ?
-                PORT_ID: [[1,4], [204,207]]
-            :
-                THD_AUTO: 0
-                LOSSY_LOW_MAX_BYTES: 37376
-                LOSSLESS0_MAX_BYTES: 235264
-                MAX_BYTES: 235264
-
-        TM_OBM_THD_PORT:
-            ?
-                PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]]
-            :
-                THD_AUTO: 0
-                LOSSY_LOW_MAX_BYTES: 37376
-                LOSSLESS0_MAX_BYTES: 235264
-                MAX_BYTES: 235264
-
-        TM_OBM_THD_PORT_FLOW_CTRL:
-            ?
-                PORT_ID: [[1,4], [204,207]]
-            :
-                THD_AUTO: 0
-                LOSSLESS0_XOFF_BYTES: 5184
-                LOSSLESS0_XON_BYTES: 4672
-                XOFF_BYTES: 5184
-                XON_BYTES: 4672
-
-        TM_OBM_THD_PORT_FLOW_CTRL:
-            ?
-                PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]]
-            :
-                THD_AUTO: 0
-                LOSSLESS0_XOFF_BYTES: 5184
-                LOSSLESS0_XON_BYTES: 4672
-                XOFF_BYTES: 5184
-                XON_BYTES: 4672
-
-        TM_OBM_PORT_FLOW_CTRL:
-            ?
-                PORT_ID: [[1,4], [204,207]]
-            :
-                FLOW_CTRL: 1
-                FLOW_CTRL_TYPE: PFC
-                LOSSLESS0_FLOW_CTRL: 1
-
-        TM_OBM_PORT_FLOW_CTRL:
-            ?
-                PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]]
-            :
-                FLOW_CTRL: 1
-                FLOW_CTRL_TYPE: PFC
-                LOSSLESS0_FLOW_CTRL: 1
-...
-
-### PFC
----
-device:
-    0:
-        PC_MAC_CONTROL:
-            ?
-                PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
-            :
-                PAUSE_TX: 0
-                PAUSE_RX: 0
-
-        TM_PFC_EGR:
-            ?
-                PORT_ID: [[1,4], [204,207]]
-            :
-                TM_PFC_PRI_PROFILE_ID: 1
-
-        TM_PFC_EGR:
-            ?
-                PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]]
-            :
-                TM_PFC_PRI_PROFILE_ID: 2
-...
----
-device:
-    0:
-        TM_PFC_PRI_TO_PRI_GRP_MAP:
-            ?
-                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 1
-                PFC_PRI: 3
-            :
-                TM_PRI_GRP_ID: 3
-
-        TM_PFC_PRI_TO_PRI_GRP_MAP:
-            ?
-                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 1
-                PFC_PRI: 4
-            :
-                TM_PRI_GRP_ID: 4
-
-        TM_PFC_PRI_TO_PRI_GRP_MAP:
-            ?
-                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 2
-                PFC_PRI: 2
-            :
-                TM_PRI_GRP_ID: 2
-
-        TM_PFC_PRI_TO_PRI_GRP_MAP:
-            ?
-                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 2
-                PFC_PRI: 3
-            :
-                TM_PRI_GRP_ID: 3
-
-        TM_PFC_PRI_TO_PRI_GRP_MAP:
-            ?
-                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 2
-                PFC_PRI: 4
-            :
-                TM_PRI_GRP_ID: 4
-
-        TM_PFC_PRI_TO_PRI_GRP_MAP:
-            ?
-                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 2
-                PFC_PRI: 6
-            :
-                TM_PRI_GRP_ID: 6
-
-        TM_PFC_PRI_PROFILE:
-            ?
-                TM_PFC_PRI_PROFILE_ID: 1
-                PFC_PRI: 3
-            :
-                PFC: 1
-                COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0]
-
-        TM_PFC_PRI_PROFILE:
-            ?
-                TM_PFC_PRI_PROFILE_ID: 1
-                PFC_PRI: 4
-            :
-                PFC: 1
-                COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0]
-
-        TM_PFC_PRI_PROFILE:
-            ?
-                TM_PFC_PRI_PROFILE_ID: 2
-                PFC_PRI: 2
-            :
-                PFC: 1
-                COS_LIST: [0, 0, 1, 0, 0, 0, 0, 0, 0, 0]
-
-        TM_PFC_PRI_PROFILE:
-            ?
-                TM_PFC_PRI_PROFILE_ID: 2
-                PFC_PRI: 3
-            :
-                PFC: 1
-                COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0]
-
-        TM_PFC_PRI_PROFILE:
-            ?
-                TM_PFC_PRI_PROFILE_ID: 2
-                PFC_PRI: 4
-            :
-                PFC: 1
-                COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0]
-
-        TM_PFC_PRI_PROFILE:
-            ?
-                TM_PFC_PRI_PROFILE_ID: 2
-                PFC_PRI: 6
-            :
-                PFC: 1
-                COS_LIST: [0, 0, 0, 0, 0, 0, 1, 0, 0, 0]
-
-        TM_ING_PORT_PRI_GRP:
-            ?
-                PORT_ID: [[1,4], [204,207]]
-                TM_PRI_GRP_ID: [3, 4]
-            :
-                PFC: 1
-                LOSSLESS: 1
-
-        TM_ING_PORT_PRI_GRP:
-            ?
-                PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]]
-                TM_PRI_GRP_ID: [2, 3, 4, 6]
-            :
-                PFC: 1
-                LOSSLESS: 1
-
-        PC_PFC:
-            ?
-                PORT_ID: [[1,4], [204,207]]
-            :
-                ENABLE_RX: 1
-                ENABLE_TX: 1
-
-        PC_PFC:
-            ?
-                PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]]
-            :
-                ENABLE_RX: 1
-                ENABLE_TX: 1
-...
+# $Copyright: Broadcom Ltd.$
+#
+# BCM56993 32x400g port configuration.
+# Support pipe numbers: 0, 1, 2, 3, 12, 13, 14, 15
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress: 1
+            pfc_deadlock_seq_control: 1
+            sai_tunnel_support: 2
+            sai_port_phy_time_sync_en: 1
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 12288
+            fpem_mem_entries: 64000
+            default_cpu_tx_queue: 7
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x72306451
+                TX_LANE_MAP: 0x14670235
+                RX_POLARITY_FLIP: 0xFF
+                TX_POLARITY_FLIP: 0xAB
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x20635471
+                TX_LANE_MAP: 0x26134705
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0xFC
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x46217035
+                TX_LANE_MAP: 0x40536172
+                RX_POLARITY_FLIP: 0xF3
+                TX_POLARITY_FLIP: 0x80
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x25643170
+                TX_LANE_MAP: 0x20751364
+                RX_POLARITY_FLIP: 0xFB
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x07623415
+                TX_LANE_MAP: 0x02746153
+                RX_POLARITY_FLIP: 0xEB
+                TX_POLARITY_FLIP: 0x68
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x37640215
+                TX_LANE_MAP: 0x67130524
+                RX_POLARITY_FLIP: 0x40
+                TX_POLARITY_FLIP: 0x45
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17320645
+                TX_LANE_MAP: 0x71536240
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x28
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x30716245
+                TX_LANE_MAP: 0x64107523
+                RX_POLARITY_FLIP: 0x7E
+                TX_POLARITY_FLIP: 0x14
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x46712350
+                TX_LANE_MAP: 0x74031526
+                RX_POLARITY_FLIP: 0x9D
+                TX_POLARITY_FLIP: 0x08
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76125340
+                TX_LANE_MAP: 0x13645072
+                RX_POLARITY_FLIP: 0x40
+                TX_POLARITY_FLIP: 0xD9
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x43601275
+                TX_LANE_MAP: 0x36251407
+                RX_POLARITY_FLIP: 0xDF
+                TX_POLARITY_FLIP: 0x29
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x65423170
+                TX_LANE_MAP: 0x23170465
+                RX_POLARITY_FLIP: 0xFE
+                TX_POLARITY_FLIP: 0x54
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71306245
+                TX_LANE_MAP: 0x45721630
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0xEC
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x62514370
+                TX_LANE_MAP: 0x31745260
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0x74
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x20574136
+                TX_LANE_MAP: 0x17352406
+                RX_POLARITY_FLIP: 0x45
+                TX_POLARITY_FLIP: 0x10
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x07561423
+                TX_LANE_MAP: 0x56137402
+                RX_POLARITY_FLIP: 0xFB
+                TX_POLARITY_FLIP: 0x33
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13240576
+                TX_LANE_MAP: 0x31524706
+                RX_POLARITY_FLIP: 0xAA
+                TX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32450716
+                TX_LANE_MAP: 0x42610573
+                RX_POLARITY_FLIP: 0x05
+                TX_POLARITY_FLIP: 0xCC
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x74632150
+                TX_LANE_MAP: 0x12704365
+                RX_POLARITY_FLIP: 0x3A
+                TX_POLARITY_FLIP: 0xD8
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23564107
+                TX_LANE_MAP: 0x76023514
+                RX_POLARITY_FLIP: 0xCC
+                TX_POLARITY_FLIP: 0x7E
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x35726041
+                TX_LANE_MAP: 0x40156273
+                RX_POLARITY_FLIP: 0x28
+                TX_POLARITY_FLIP: 0x7E
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x34016257
+                TX_LANE_MAP: 0x76534012
+                RX_POLARITY_FLIP: 0x80
+                TX_POLARITY_FLIP: 0x22
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x16743520
+                TX_LANE_MAP: 0x23416075
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0x26
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x64037152
+                TX_LANE_MAP: 0x64732150
+                RX_POLARITY_FLIP: 0x77
+                TX_POLARITY_FLIP: 0x6A
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x42537061
+                TX_LANE_MAP: 0x50246173
+                RX_POLARITY_FLIP: 0x32
+                TX_POLARITY_FLIP: 0x5E
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31207564
+                TX_LANE_MAP: 0x01734562
+                RX_POLARITY_FLIP: 0x08
+                TX_POLARITY_FLIP: 0x23
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26304715
+                TX_LANE_MAP: 0x62705341
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x62471305
+                TX_LANE_MAP: 0x43506172
+                RX_POLARITY_FLIP: 0x7F
+                TX_POLARITY_FLIP: 0x07
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x53024617
+                TX_LANE_MAP: 0x50627143
+                RX_POLARITY_FLIP: 0x8F
+                TX_POLARITY_FLIP: 0x6B
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x62537041
+                TX_LANE_MAP: 0x02761345
+                RX_POLARITY_FLIP: 0x7C
+                TX_POLARITY_FLIP: 0xA2
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x20653174
+                TX_LANE_MAP: 0x06714523
+                RX_POLARITY_FLIP: 0x26
+                TX_POLARITY_FLIP: 0x20
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x74516320
+                TX_LANE_MAP: 0x53170426
+                RX_POLARITY_FLIP: 0xEF
+                TX_POLARITY_FLIP: 0xEF
+...
+---
+device:
+    0:
+        PC_SERDES_CONFIG:
+            ?
+                PKG_SWAP_BYPASS: 1
+...
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                # CPU port
+                PORT_ID: 0
+            :
+                PC_PHYS_PORT_ID: 0
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 13
+            ?
+                PORT_ID: 3
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 4
+            :
+                PC_PHYS_PORT_ID: 5
+            ?
+                PORT_ID: 17
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 18
+            :
+                PC_PHYS_PORT_ID: 29
+            ?
+                PORT_ID: 19
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 20
+            :
+                PC_PHYS_PORT_ID: 21
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 35
+            :
+                PC_PHYS_PORT_ID: 45
+            ?
+                PORT_ID: 36
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 37
+            :
+                PC_PHYS_PORT_ID: 37
+            ?
+                PORT_ID: 51
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 52
+            :
+                PC_PHYS_PORT_ID: 61
+            ?
+                PORT_ID: 53
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 54
+            :
+                PC_PHYS_PORT_ID: 53
+            ?
+                PORT_ID: 204
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 205
+            :
+                PC_PHYS_PORT_ID: 197
+            ?
+                PORT_ID: 206
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 207
+            :
+                PC_PHYS_PORT_ID: 205
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 222
+            :
+                PC_PHYS_PORT_ID: 213
+            ?
+                PORT_ID: 223
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 224
+            :
+                PC_PHYS_PORT_ID: 221
+            ?
+                PORT_ID: 238
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 239
+            :
+                PC_PHYS_PORT_ID: 229
+            ?
+                PORT_ID: 240
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 241
+            :
+                PC_PHYS_PORT_ID: 237
+            ?
+                PORT_ID: 255
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 256
+            :
+                PC_PHYS_PORT_ID: 245
+            ?
+                PORT_ID: 257
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 258
+            :
+                PC_PHYS_PORT_ID: 253
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[1, 4],
+                          [17, 20],
+                          [34, 37],
+                          [51, 54],
+                          [204, 207],
+                          [221, 224],
+                          [238, 241],
+                          [255, 258]]
+            :
+                ENABLE: 0
+                SPEED: 400000
+                NUM_LANES: 8
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+...
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 50
+            :
+                PC_PHYS_PORT_ID: 258
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: 50
+            :
+                ENABLE: 0
+                SPEED: 10000
+                NUM_LANES: 1
+                MAX_FRAME_SIZE: 9416
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0
+
+        # Per pipe flex state configuration
+        #FLEX_STATE_CONFIG:
+        #    FLEX_STATE_ING_OPERMODE_PIPEUNIQUE: 0
+        #    FLEX_STATE_EGR_OPERMODE_PIPEUNIQUE: 1
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+...
+---
+device:
+    0:
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1, 4],
+                          [17, 20],
+                          [34, 37],
+                          50,
+                          [51, 54],
+                          [204, 207],
+                          [221, 224],
+                          [238, 241],
+                          [255, 258]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+...
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/media_settings.json b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/media_settings.json
new file mode 100644
index 000000000000..3e6dc7bb8e60
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/media_settings.json
@@ -0,0 +1,2394 @@
+{
+    "PORT_MEDIA_SETTINGS": {
+        "1": {
+            "Default": {
+                "main": {
+                    "lane0": "0x80",
+                    "lane1": "0x80",
+                    "lane2": "0x80",
+                    "lane3": "0x7C",
+                    "lane4": "0x7C",
+                    "lane5": "0x7C",
+                    "lane6": "0x7C",
+                    "lane7": "0x7C"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFE8",
+                    "lane1": "0xFFFFFFE8",
+                    "lane2": "0xFFFFFFE8",
+                    "lane3": "0xFFFFFFE0",
+                    "lane4": "0xFFFFFFE0",
+                    "lane5": "0xFFFFFFE0",
+                    "lane6": "0xFFFFFFE0",
+                    "lane7": "0xFFFFFFE0"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFFC",
+                    "lane4": "0xFFFFFFFC",
+                    "lane5": "0xFFFFFFFC",
+                    "lane6": "0xFFFFFFFC",
+                    "lane7": "0xFFFFFFFC"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "2": {
+            "Default": {
+                "main": {
+                    "lane0": "0x80",
+                    "lane1": "0x80",
+                    "lane2": "0x80",
+                    "lane3": "0x80",
+                    "lane4": "0x80",
+                    "lane5": "0x80",
+                    "lane6": "0x80",
+                    "lane7": "0x7C"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFE8",
+                    "lane1": "0xFFFFFFE8",
+                    "lane2": "0xFFFFFFE8",
+                    "lane3": "0xFFFFFFE8",
+                    "lane4": "0xFFFFFFE8",
+                    "lane5": "0xFFFFFFE8",
+                    "lane6": "0xFFFFFFE4",
+                    "lane7": "0xFFFFFFE0"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFFC",
+                    "lane7": "0xFFFFFFFC"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "3": {
+            "Default": {
+                "main": {
+                    "lane0": "0x80",
+                    "lane1": "0x80",
+                    "lane2": "0x80",
+                    "lane3": "0x80",
+                    "lane4": "0x80",
+                    "lane5": "0x80",
+                    "lane6": "0x80",
+                    "lane7": "0x80"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFE8",
+                    "lane1": "0xFFFFFFE8",
+                    "lane2": "0xFFFFFFE8",
+                    "lane3": "0xFFFFFFE8",
+                    "lane4": "0xFFFFFFE8",
+                    "lane5": "0xFFFFFFE8",
+                    "lane6": "0xFFFFFFE8",
+                    "lane7": "0xFFFFFFE8"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "4": {
+            "Default": {
+                "main": {
+                    "lane0": "0x80",
+                    "lane1": "0x80",
+                    "lane2": "0x80",
+                    "lane3": "0x80",
+                    "lane4": "0x80",
+                    "lane5": "0x80",
+                    "lane6": "0x80",
+                    "lane7": "0x80"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFE8",
+                    "lane1": "0xFFFFFFE8",
+                    "lane2": "0xFFFFFFE8",
+                    "lane3": "0xFFFFFFE8",
+                    "lane4": "0xFFFFFFE8",
+                    "lane5": "0xFFFFFFE8",
+                    "lane6": "0xFFFFFFE4",
+                    "lane7": "0xFFFFFFE4"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFFC",
+                    "lane7": "0xFFFFFFFC"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "5": {
+            "Default": {
+                "main": {
+                    "lane0": "0x80",
+                    "lane1": "0x80",
+                    "lane2": "0x80",
+                    "lane3": "0x80",
+                    "lane4": "0x80",
+                    "lane5": "0x80",
+                    "lane6": "0x80",
+                    "lane7": "0x80"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFE8",
+                    "lane1": "0xFFFFFFE8",
+                    "lane2": "0xFFFFFFE8",
+                    "lane3": "0xFFFFFFE8",
+                    "lane4": "0xFFFFFFE8",
+                    "lane5": "0xFFFFFFE8",
+                    "lane6": "0xFFFFFFE8",
+                    "lane7": "0xFFFFFFE8"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "6": {
+            "Default": {
+                "main": {
+                    "lane0": "0x80",
+                    "lane1": "0x80",
+                    "lane2": "0x80",
+                    "lane3": "0x80",
+                    "lane4": "0x80",
+                    "lane5": "0x80",
+                    "lane6": "0x80",
+                    "lane7": "0x80"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFE8",
+                    "lane1": "0xFFFFFFE8",
+                    "lane2": "0xFFFFFFE8",
+                    "lane3": "0xFFFFFFE8",
+                    "lane4": "0xFFFFFFE8",
+                    "lane5": "0xFFFFFFE8",
+                    "lane6": "0xFFFFFFE8",
+                    "lane7": "0xFFFFFFE8"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "7": {
+            "Default": {
+                "main": {
+                    "lane0": "0x80",
+                    "lane1": "0x80",
+                    "lane2": "0x80",
+                    "lane3": "0x80",
+                    "lane4": "0x80",
+                    "lane5": "0x80",
+                    "lane6": "0x80",
+                    "lane7": "0x80"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFE8",
+                    "lane1": "0xFFFFFFE8",
+                    "lane2": "0xFFFFFFE8",
+                    "lane3": "0xFFFFFFE8",
+                    "lane4": "0xFFFFFFE8",
+                    "lane5": "0xFFFFFFE8",
+                    "lane6": "0xFFFFFFE8",
+                    "lane7": "0xFFFFFFE8"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "8": {
+            "Default": {
+                "main": {
+                    "lane0": "0x80",
+                    "lane1": "0x80",
+                    "lane2": "0x80",
+                    "lane3": "0x80",
+                    "lane4": "0x80",
+                    "lane5": "0x80",
+                    "lane6": "0x80",
+                    "lane7": "0x80"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFE8",
+                    "lane1": "0xFFFFFFE8",
+                    "lane2": "0xFFFFFFE8",
+                    "lane3": "0xFFFFFFE8",
+                    "lane4": "0xFFFFFFE8",
+                    "lane5": "0xFFFFFFE8",
+                    "lane6": "0xFFFFFFE8",
+                    "lane7": "0xFFFFFFE8"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "9": {
+            "Default": {
+                "main": {
+                    "lane0": "0x80",
+                    "lane1": "0x80",
+                    "lane2": "0x80",
+                    "lane3": "0x80",
+                    "lane4": "0x80",
+                    "lane5": "0x80",
+                    "lane6": "0x80",
+                    "lane7": "0x80"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFE8",
+                    "lane1": "0xFFFFFFE8",
+                    "lane2": "0xFFFFFFE8",
+                    "lane3": "0xFFFFFFE8",
+                    "lane4": "0xFFFFFFE8",
+                    "lane5": "0xFFFFFFE8",
+                    "lane6": "0xFFFFFFE8",
+                    "lane7": "0xFFFFFFE8"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "10": {
+            "Default": {
+                "main": {
+                    "lane0": "0x80",
+                    "lane1": "0x80",
+                    "lane2": "0x80",
+                    "lane3": "0x80",
+                    "lane4": "0x80",
+                    "lane5": "0x80",
+                    "lane6": "0x80",
+                    "lane7": "0x80"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFE8",
+                    "lane1": "0xFFFFFFE8",
+                    "lane2": "0xFFFFFFE8",
+                    "lane3": "0xFFFFFFE8",
+                    "lane4": "0xFFFFFFE8",
+                    "lane5": "0xFFFFFFE8",
+                    "lane6": "0xFFFFFFE8",
+                    "lane7": "0xFFFFFFE8"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "11": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8C",
+                    "lane1": "0x84",
+                    "lane2": "0x8C",
+                    "lane3": "0x88",
+                    "lane4": "0x84",
+                    "lane5": "0x80",
+                    "lane6": "0x88",
+                    "lane7": "0x88"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF4",
+                    "lane1": "0xFFFFFFEC",
+                    "lane2": "0xFFFFFFF4",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFEC",
+                    "lane5": "0xFFFFFFE8",
+                    "lane6": "0xFFFFFFF0",
+                    "lane7": "0xFFFFFFF0"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "12": {
+            "Default": {
+                "main": {
+                    "lane0": "0x88",
+                    "lane1": "0x88",
+                    "lane2": "0x88",
+                    "lane3": "0x88",
+                    "lane4": "0x88",
+                    "lane5": "0x88",
+                    "lane6": "0x88",
+                    "lane7": "0x88"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF0",
+                    "lane1": "0xFFFFFFF0",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFF0",
+                    "lane7": "0xFFFFFFF0"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "13": {
+            "Default": {
+                "main": {
+                    "lane0": "0x88",
+                    "lane1": "0x80",
+                    "lane2": "0x88",
+                    "lane3": "0x88",
+                    "lane4": "0x84",
+                    "lane5": "0x80",
+                    "lane6": "0x84",
+                    "lane7": "0x84"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF0",
+                    "lane1": "0xFFFFFFE4",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFEC",
+                    "lane5": "0xFFFFFFE4",
+                    "lane6": "0xFFFFFFEC",
+                    "lane7": "0xFFFFFFEC"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFFC",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFFC",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "14": {
+            "Default": {
+                "main": {
+                    "lane0": "0x88",
+                    "lane1": "0x88",
+                    "lane2": "0x88",
+                    "lane3": "0x88",
+                    "lane4": "0x80",
+                    "lane5": "0x84",
+                    "lane6": "0x80",
+                    "lane7": "0x80"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF0",
+                    "lane1": "0xFFFFFFF0",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFE4",
+                    "lane5": "0xFFFFFFEC",
+                    "lane6": "0xFFFFFFE8",
+                    "lane7": "0xFFFFFFE8"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFFC",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "15": {
+            "Default": {
+                "main": {
+                    "lane0": "0x88",
+                    "lane1": "0x88",
+                    "lane2": "0x88",
+                    "lane3": "0x88",
+                    "lane4": "0x80",
+                    "lane5": "0x80",
+                    "lane6": "0x80",
+                    "lane7": "0x80"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF0",
+                    "lane1": "0xFFFFFFF0",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFE8",
+                    "lane5": "0xFFFFFFE8",
+                    "lane6": "0xFFFFFFE8",
+                    "lane7": "0xFFFFFFE8"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "16": {
+            "Default": {
+                "main": {
+                    "lane0": "0x88",
+                    "lane1": "0x88",
+                    "lane2": "0x88",
+                    "lane3": "0x88",
+                    "lane4": "0x88",
+                    "lane5": "0x88",
+                    "lane6": "0x80",
+                    "lane7": "0x80"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF0",
+                    "lane1": "0xFFFFFFF0",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFF0",
+                    "lane5": "0xFFFFFFF0",
+                    "lane6": "0xFFFFFFE8",
+                    "lane7": "0xFFFFFFE8"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "17": {
+            "Default": {
+                "main": {
+                    "lane0": "0x88",
+                    "lane1": "0x84",
+                    "lane2": "0x84",
+                    "lane3": "0x80",
+                    "lane4": "0x80",
+                    "lane5": "0x80",
+                    "lane6": "0x80",
+                    "lane7": "0x80"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF0",
+                    "lane1": "0xFFFFFFEC",
+                    "lane2": "0xFFFFFFEC",
+                    "lane3": "0xFFFFFFE8",
+                    "lane4": "0xFFFFFFE8",
+                    "lane5": "0xFFFFFFE8",
+                    "lane6": "0xFFFFFFE8",
+                    "lane7": "0xFFFFFFE8"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "18": {
+            "Default": {
+                "main": {
+                    "lane0": "0x88",
+                    "lane1": "0x88",
+                    "lane2": "0x88",
+                    "lane3": "0x88",
+                    "lane4": "0x84",
+                    "lane5": "0x80",
+                    "lane6": "0x80",
+                    "lane7": "0x80"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF0",
+                    "lane1": "0xFFFFFFF0",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFEC",
+                    "lane5": "0xFFFFFFE8",
+                    "lane6": "0xFFFFFFE8",
+                    "lane7": "0xFFFFFFE8"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "19": {
+            "Default": {
+                "main": {
+                    "lane0": "0x88",
+                    "lane1": "0x88",
+                    "lane2": "0x88",
+                    "lane3": "0x88",
+                    "lane4": "0x80",
+                    "lane5": "0x80",
+                    "lane6": "0x80",
+                    "lane7": "0x80"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF0",
+                    "lane1": "0xFFFFFFF0",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFE8",
+                    "lane5": "0xFFFFFFE8",
+                    "lane6": "0xFFFFFFE8",
+                    "lane7": "0xFFFFFFE8"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "20": {
+            "Default": {
+                "main": {
+                    "lane0": "0x84",
+                    "lane1": "0x84",
+                    "lane2": "0x84",
+                    "lane3": "0x84",
+                    "lane4": "0x7C",
+                    "lane5": "0x80",
+                    "lane6": "0x80",
+                    "lane7": "0x80"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFEC",
+                    "lane1": "0xFFFFFFEC",
+                    "lane2": "0xFFFFFFEC",
+                    "lane3": "0xFFFFFFEC",
+                    "lane4": "0xFFFFFFE4",
+                    "lane5": "0xFFFFFFE4",
+                    "lane6": "0xFFFFFFE8",
+                    "lane7": "0xFFFFFFE8"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFFC",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "21": {
+            "Default": {
+                "main": {
+                    "lane0": "0x84",
+                    "lane1": "0x80",
+                    "lane2": "0x80",
+                    "lane3": "0x80",
+                    "lane4": "0x80",
+                    "lane5": "0x7C",
+                    "lane6": "0x7C",
+                    "lane7": "0x84"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFEC",
+                    "lane1": "0xFFFFFFE8",
+                    "lane2": "0xFFFFFFE8",
+                    "lane3": "0xFFFFFFE8",
+                    "lane4": "0xFFFFFFE4",
+                    "lane5": "0xFFFFFFE0",
+                    "lane6": "0xFFFFFFE0",
+                    "lane7": "0xFFFFFFEC"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFFC",
+                    "lane5": "0xFFFFFFFC",
+                    "lane6": "0xFFFFFFFC",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "22": {
+            "Default": {
+                "main": {
+                    "lane0": "0x88",
+                    "lane1": "0x88",
+                    "lane2": "0x88",
+                    "lane3": "0x88",
+                    "lane4": "0x80",
+                    "lane5": "0x80",
+                    "lane6": "0x80",
+                    "lane7": "0x88"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF0",
+                    "lane1": "0xFFFFFFF0",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFE8",
+                    "lane5": "0xFFFFFFE8",
+                    "lane6": "0xFFFFFFE8",
+                    "lane7": "0xFFFFFFF0"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "23": {
+            "Default": {
+                "main": {
+                    "lane0": "0x88",
+                    "lane1": "0x88",
+                    "lane2": "0x88",
+                    "lane3": "0x88",
+                    "lane4": "0x84",
+                    "lane5": "0x84",
+                    "lane6": "0x84",
+                    "lane7": "0x80"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF0",
+                    "lane1": "0xFFFFFFF0",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFEC",
+                    "lane5": "0xFFFFFFEC",
+                    "lane6": "0xFFFFFFEC",
+                    "lane7": "0xFFFFFFE8"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "24": {
+            "Default": {
+                "main": {
+                    "lane0": "0x88",
+                    "lane1": "0x88",
+                    "lane2": "0x88",
+                    "lane3": "0x84",
+                    "lane4": "0x84",
+                    "lane5": "0x80",
+                    "lane6": "0x84",
+                    "lane7": "0x84"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF0",
+                    "lane1": "0xFFFFFFF0",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFEC",
+                    "lane4": "0xFFFFFFEC",
+                    "lane5": "0xFFFFFFE8",
+                    "lane6": "0xFFFFFFEC",
+                    "lane7": "0xFFFFFFEC"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "25": {
+            "Default": {
+                "main": {
+                    "lane0": "0x88",
+                    "lane1": "0x84",
+                    "lane2": "0x88",
+                    "lane3": "0x88",
+                    "lane4": "0x84",
+                    "lane5": "0x80",
+                    "lane6": "0x80",
+                    "lane7": "0x88"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF0",
+                    "lane1": "0xFFFFFFEC",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFEC",
+                    "lane5": "0xFFFFFFE8",
+                    "lane6": "0xFFFFFFE8",
+                    "lane7": "0xFFFFFFF0"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "26": {
+            "Default": {
+                "main": {
+                    "lane0": "0x88",
+                    "lane1": "0x88",
+                    "lane2": "0x88",
+                    "lane3": "0x88",
+                    "lane4": "0x84",
+                    "lane5": "0x80",
+                    "lane6": "0x84",
+                    "lane7": "0x84"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF0",
+                    "lane1": "0xFFFFFFF0",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFEC",
+                    "lane5": "0xFFFFFFE8",
+                    "lane6": "0xFFFFFFEC",
+                    "lane7": "0xFFFFFFEC"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "27": {
+            "Default": {
+                "main": {
+                    "lane0": "0x88",
+                    "lane1": "0x88",
+                    "lane2": "0x88",
+                    "lane3": "0x88",
+                    "lane4": "0x84",
+                    "lane5": "0x84",
+                    "lane6": "0x84",
+                    "lane7": "0x84"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFF0",
+                    "lane1": "0xFFFFFFF0",
+                    "lane2": "0xFFFFFFF0",
+                    "lane3": "0xFFFFFFF0",
+                    "lane4": "0xFFFFFFEC",
+                    "lane5": "0xFFFFFFEC",
+                    "lane6": "0xFFFFFFEC",
+                    "lane7": "0xFFFFFFEC"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "28": {
+            "Default": {
+                "main": {
+                    "lane0": "0x84",
+                    "lane1": "0x84",
+                    "lane2": "0x84",
+                    "lane3": "0x84",
+                    "lane4": "0x80",
+                    "lane5": "0x80",
+                    "lane6": "0x80",
+                    "lane7": "0x80"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFEC",
+                    "lane1": "0xFFFFFFEC",
+                    "lane2": "0xFFFFFFEC",
+                    "lane3": "0xFFFFFFEC",
+                    "lane4": "0xFFFFFFE8",
+                    "lane5": "0xFFFFFFE8",
+                    "lane6": "0xFFFFFFE8",
+                    "lane7": "0xFFFFFFE8"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "29": {
+            "Default": {
+                "main": {
+                    "lane0": "0x80",
+                    "lane1": "0x80",
+                    "lane2": "0x80",
+                    "lane3": "0x80",
+                    "lane4": "0x80",
+                    "lane5": "0x80",
+                    "lane6": "0x7C",
+                    "lane7": "0x80"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFE8",
+                    "lane1": "0xFFFFFFE8",
+                    "lane2": "0xFFFFFFE8",
+                    "lane3": "0xFFFFFFE8",
+                    "lane4": "0xFFFFFFE8",
+                    "lane5": "0xFFFFFFE8",
+                    "lane6": "0xFFFFFFE4",
+                    "lane7": "0xFFFFFFE8"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "30": {
+            "Default": {
+                "main": {
+                    "lane0": "0x80",
+                    "lane1": "0x7C",
+                    "lane2": "0x80",
+                    "lane3": "0x80",
+                    "lane4": "0x80",
+                    "lane5": "0x7C",
+                    "lane6": "0x80",
+                    "lane7": "0x80"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFE8",
+                    "lane1": "0xFFFFFFE4",
+                    "lane2": "0xFFFFFFE8",
+                    "lane3": "0xFFFFFFE8",
+                    "lane4": "0xFFFFFFE4",
+                    "lane5": "0xFFFFFFE4",
+                    "lane6": "0xFFFFFFE8",
+                    "lane7": "0xFFFFFFE8"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFFC",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "31": {
+            "Default": {
+                "main": {
+                    "lane0": "0x80",
+                    "lane1": "0x80",
+                    "lane2": "0x80",
+                    "lane3": "0x80",
+                    "lane4": "0x80",
+                    "lane5": "0x80",
+                    "lane6": "0x80",
+                    "lane7": "0x80"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFE8",
+                    "lane1": "0xFFFFFFE8",
+                    "lane2": "0xFFFFFFE8",
+                    "lane3": "0xFFFFFFE8",
+                    "lane4": "0xFFFFFFE4",
+                    "lane5": "0xFFFFFFE4",
+                    "lane6": "0xFFFFFFE4",
+                    "lane7": "0xFFFFFFE8"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFFC",
+                    "lane5": "0xFFFFFFFC",
+                    "lane6": "0xFFFFFFFC",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "32": {
+            "Default": {
+                "main": {
+                    "lane0": "0x84",
+                    "lane1": "0x80",
+                    "lane2": "0x80",
+                    "lane3": "0x80",
+                    "lane4": "0x7C",
+                    "lane5": "0x7C",
+                    "lane6": "0x80",
+                    "lane7": "0x84"
+                },
+                "post1": {
+                    "lane0": "0xFFFFFFEC",
+                    "lane1": "0xFFFFFFE8",
+                    "lane2": "0xFFFFFFE8",
+                    "lane3": "0xFFFFFFE8",
+                    "lane4": "0xFFFFFFE4",
+                    "lane5": "0xFFFFFFE4",
+                    "lane6": "0xFFFFFFE8",
+                    "lane7": "0xFFFFFFEC"
+                },
+                "post2": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xFFFFFFF8",
+                    "lane1": "0xFFFFFFF8",
+                    "lane2": "0xFFFFFFF8",
+                    "lane3": "0xFFFFFFF8",
+                    "lane4": "0xFFFFFFF8",
+                    "lane5": "0xFFFFFFF8",
+                    "lane6": "0xFFFFFFF8",
+                    "lane7": "0xFFFFFFF8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+		},
+        "33": {
+            "Default": {
+                "main": {
+                    "lane0": "0x30"
+                },
+                "post1": {
+                    "lane0": "0xC"
+                },
+                "post2": {
+                    "lane0": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0x0"
+                },
+                "pre2": {
+                    "lane0": "0x0"
+                }
+            }
+        }
+    }
+}
\ No newline at end of file
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/pg_profile_lookup.ini b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/pg_profile_lookup.ini
new file mode 100644
index 000000000000..7330b5320af2
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/pg_profile_lookup.ini
@@ -0,0 +1,20 @@
+# PG lossless profiles.
+# speed cable size    xon  xoff threshold xon_offset
+  10000  5m   1248    2288 35776   0        2288
+  25000  5m   1248    2288 53248   0        2288
+  40000  5m   1248    2288 66560   0        2288
+  50000  5m   1248    2288 90272   0        2288
+ 100000  5m   1248    2288 165568  0        2288
+ 400000  5m   1248    2288 307848  0        2288
+  10000  40m  1248    2288 37024   0        2288
+  25000  40m  1248    2288 53248   0        2288
+  40000  40m  1248    2288 71552   0        2288
+  50000  40m  1248    2288 96096   0        2288
+ 100000  40m  1248    2288 177632  0        2288
+ 400000  40m  1248    2288 330200  0        2288
+  10000  300m 1248    2288 46176   0        2288
+  25000  300m 1248    2288 79040   0        2288
+  40000  300m 1248    2288 108160  0        2288
+  50000  300m 1248    2288 141856  0        2288
+ 100000  300m 1248    2288 268736  0        2288
+ 400000  300m 1248    2288 499618  0        2288
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/port_config.ini b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/port_config.ini
index 98a2de236a84..9430d33642f0 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/port_config.ini
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/port_config.ini
@@ -1,20 +1,20 @@
 # name          lanes                             alias               index     speed
-Ethernet0       1,2,3,4,5,6,7,8                   fourhundredGigE1/1  1         400000
-Ethernet4       9,10,11,12,13,14,15,16            fourhundredGigE1/2  2         400000
-Ethernet8       17,18,19,20,21,22,23,24           fourhundredGigE1/3  3         400000
-Ethernet12      25,26,27,28,29,30,31,32           fourhundredGigE1/4  4         400000
-Ethernet16      33,34,35,36,37,38,39,40           fourhundredGigE1/5  5         400000
-Ethernet20      41,42,43,44,45,46,47,48           fourhundredGigE1/6  6         400000
-Ethernet24      49,50,51,52,53,54,55,56           fourhundredGigE1/7  7         400000
-Ethernet28      57,58,59,60,61,62,63,64           fourhundredGigE1/8  8         400000
-Ethernet32      65,66,67,68,69,70,71,72           fourhundredGigE1/9  9         400000
-Ethernet36      73,74,75,76,77,78,79,80           fourhundredGigE1/10 10        400000
-Ethernet40      81,82,83,84,85,86,87,88           fourhundredGigE1/11 11        400000
-Ethernet44      89,90,91,92,93,94,95,96           fourhundredGigE1/12 12        400000
-Ethernet48      97,98,99,100,101,102,103,104      fourhundredGigE1/13 13        400000
-Ethernet52      105,106,107,108,109,110,111,112   fourhundredGigE1/14 14        400000
-Ethernet56      113,114,115,116,117,118,119,120   fourhundredGigE1/15 15        400000
-Ethernet60      121,122,123,124,125,126,127,128   fourhundredGigE1/16 16        400000
+Ethernet0       17,18,19,20,21,22,23,24           fourhundredGigE1/1  1         400000
+Ethernet4       25,26,27,28,29,30,31,32           fourhundredGigE1/2  2         400000
+Ethernet8       1,2,3,4,5,6,7,8                   fourhundredGigE1/3  3         400000
+Ethernet12      9,10,11,12,13,14,15,16            fourhundredGigE1/4  4         400000
+Ethernet16      49,50,51,52,53,54,55,56           fourhundredGigE1/5  5         400000
+Ethernet20      57,58,59,60,61,62,63,64           fourhundredGigE1/6  6         400000
+Ethernet24      33,34,35,36,37,38,39,40           fourhundredGigE1/7  7         400000
+Ethernet28      41,42,43,44,45,46,47,48           fourhundredGigE1/8  8         400000
+Ethernet32      81,82,83,84,85,86,87,88           fourhundredGigE1/9  9         400000
+Ethernet36      89,90,91,92,93,94,95,96           fourhundredGigE1/10 10        400000
+Ethernet40      65,66,67,68,69,70,71,72           fourhundredGigE1/11 11        400000
+Ethernet44      73,74,75,76,77,78,79,80           fourhundredGigE1/12 12        400000
+Ethernet48      113,114,115,116,117,118,119,120   fourhundredGigE1/13 13        400000
+Ethernet52      121,122,123,124,125,126,127,128   fourhundredGigE1/14 14        400000
+Ethernet56      97,98,99,100,101,102,103,104      fourhundredGigE1/15 15        400000
+Ethernet60      105,106,107,108,109,110,111,112   fourhundredGigE1/16 16        400000
 Ethernet64      385,386,387,388,389,390,391,392   fourhundredGigE1/17 17        400000
 Ethernet68      393,394,395,396,397,398,399,400   fourhundredGigE1/18 18        400000
 Ethernet72      401,402,403,404,405,406,407,408   fourhundredGigE1/19 19        400000
@@ -32,3 +32,4 @@ Ethernet116     489,490,491,492,493,494,495,496   fourhundredGigE1/30 30
 Ethernet120     497,498,499,500,501,502,503,504   fourhundredGigE1/31 31        400000
 Ethernet124     505,506,507,508,509,510,511,512   fourhundredGigE1/32 32        400000
 Ethernet128     513                               tenGigE1/33         33        10000
+
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/qos.json.j2 b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/qos.json.j2
new file mode 100644
index 000000000000..3e548325ea30
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/custom_led.bin b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/custom_led.bin
new file mode 100644
index 0000000000000000000000000000000000000000..9b1f31fb66dca36d62413fe91febcb43e7de13c2
GIT binary patch
literal 416
zcmWN}PbfnH90%~<Z<}WMpAeyW&&bve+w&($E#r4tDHLG`Z*PZpU+&6<T(lfEBv&_k
z;(~*NgM)gKBGD6ClG>DmgYrFm>ig~2?^`;4mN}V}32}~B4|$UUu|!_j@9uS}Icafb
z=_uA7f3rC1iFkrOdq#GW?pW>G&{)|P(c+KRSCMxX&E$+{U?p5@CuDJczH^;;FKTXy
zK28dC^T>&5$@aKY3?|x4&aImHB&$`iEU`JgkoB_dQX1nc3h(OX#xyDHuUGTp)pAnV
z)kD>TLxc@&SNwrG#~o5`c&}s_qNSJ9g>;33w$!hC)r?-yIeKfkLO%QRo<iR?E_x(Y
zr)E-xRJn+jN{D8}C1Vtfk76^QO|kZ9c|)%c?!(gAsaSF#`%*gh4->V6i-~+hR0D`q
v0j<yh4bTLA5QZ)Y0N!X6A}|0Ka0yp%4L5KH5AXyp@D3mF1!eewU-*N6Vc~R|

literal 0
HcmV?d00001

diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/led_proc_init.soc b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/led_proc_init.soc
new file mode 100644
index 000000000000..eda09a0dd1f2
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/led_proc_init.soc
@@ -0,0 +1,4 @@
+led stop
+led load /usr/share/sonic/platform/custom_led.bin
+led auto on
+led start
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform.json b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform.json
index 915b83c2ea5b..b40c5fe9498d 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform.json
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform.json
@@ -2,6 +2,9 @@
     "chassis": {
         "name": "7220 IXR-H4-32D",
         "components": [
+            {
+                "name": "BIOS"
+            },
             {
                 "name": "CPUPLD"
             },
@@ -318,7 +321,15 @@
                 "high-crit-threshold": true
             },
             {
-                "name": "Mac Front",
+                "name": "MAC Front",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "CPU",
                 "controllable": false,
                 "low-threshold": false,
                 "high-threshold": true,
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform_env.conf b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform_env.conf
new file mode 100644
index 000000000000..b4f7155e6b1d
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform_env.conf
@@ -0,0 +1,3 @@
+SYNCD_SHM_SIZE=512m
+is_ltsw_chip=1
+
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform_reboot b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform_reboot
new file mode 100755
index 000000000000..284545653864
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform_reboot
@@ -0,0 +1,7 @@
+#!/bin/bash
+
+if [ -c "/dev/rtc1" ]; then
+    sudo hwclock -w -f /dev/rtc1
+fi
+
+exec /sbin/reboot
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/plugins/led_control.py b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/plugins/led_control.py
index 88acf9f119d2..aab21c313db1 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/plugins/led_control.py
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/plugins/led_control.py
@@ -53,6 +53,7 @@ def _read_sysfs_file(self, sysfs_file):
         try:
             with open(sysfs_file, 'r') as fd:
                 rv = fd.read()
+                fd.close()
         except Exception as e:
             rv = 'ERR'
 
@@ -70,27 +71,28 @@ def _write_sysfs_file(self, sysfs_file, value):
         try:
             with open(sysfs_file, 'w') as fd:
                 rv = fd.write(str(value))
+                fd.close()
         except Exception as e:
             rv = 'ERR'
 
         return rv
     
     def _pci_set_value(self, resource, data, offset):
-        fd = open(resource, O_RDWR)
+        fd = os.open(resource, os.O_RDWR)
         mm = mmap(fd, 0)
         mm.seek(offset)
         mm.write(struct.pack('I', data))
         mm.close()
-        close(fd)
+        os.close(fd)
 
     def _pci_get_value(self, resource, offset):
-        fd = open(resource, O_RDWR)
+        fd = os.open(resource, os.O_RDWR)
         mm = mmap(fd, 0)
         mm.seek(offset)
         read_data_stream = mm.read(4)
         reg_val = struct.unpack('I', read_data_stream)
         mm.close()
-        close(fd)
+        os.close(fd)
         return reg_val
     
     def _initSystemLed(self):
@@ -99,27 +101,28 @@ def _initSystemLed(self):
         oldpsu = 0xf    # 0=amber, 1=green
 
         # Write sys led
-        self._pci_set_value(RESOURCE, 1, REG_FRONT_SYSLED)
+        self._pci_set_value(RESOURCE, 3, REG_FRONT_SYSLED)
         
         # Timer loop to monitor and set front panel Status, Fan, and PSU LEDs
         while True:
             # Front Panel FAN Panel LED setting
-            good_fan = 0
-            for fan in self.chassis._fan_list:
-                if fan.get_status() == True:
-                    good_fan = good_fan + 1
+            good_fan_drawer = 0
+            for fan_drawer in self.chassis._fan_drawer_list:
+                if fan_drawer.get_status() == True:                    
+                    good_fan_drawer = good_fan_drawer + 1
+                    fan_drawer.set_status_led('green')
+                else:
+                    fan_drawer.set_status_led('amber')
             
-            if (good_fan == H4_32D_FAN_DRAWERS * H4_32D_FANS_PER_DRAWER):                
+            if (good_fan_drawer == H4_32D_FAN_DRAWERS):                
                 if oldfan != 0x1:
                     self._pci_set_value(RESOURCE, 1, REG_FRONT_FANLED)
                     oldfan = 0x1
                 
             else:                
                 if oldfan != 0x0:
-                    self._pci_set_value(RESOURCE, 0, REG_FRONT_FANLED)
+                    self._pci_set_value(RESOURCE, 2, REG_FRONT_FANLED)
                     oldfan = 0x0
-                
-
             
             time.sleep(6)
 
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/thermal_policy.json b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/thermal_policy.json
index 667d82dac0a3..fe9940a3840b 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/thermal_policy.json
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/thermal_policy.json
@@ -1,7 +1,7 @@
 {   
     "thermal_control_algorithm": {
         "run_at_boot_up": "false",
-        "fan_speed_when_suspend": "65"
+        "fan_speed_when_suspend": "55"
     },
     "info_types": [
         {
@@ -29,7 +29,7 @@
                 },
                 {
                     "type": "fan.all.set_speed",
-                    "speed": "100"
+                    "speed": "90"
                 }
             ]
         },
@@ -43,10 +43,10 @@
             "actions": [
                 {
                     "type": "thermal.temp_check_and_set_all_fan_speed",
-                    "default_speed": "40",
+                    "default_speed": "50",
                     "threshold1_speed": "55",
-                    "threshold2_speed": "80",
-                    "hightemp_speed": "100"
+                    "threshold2_speed": "70",
+                    "hightemp_speed": "90"
                 }
             ]
         },

From c5fd5fbb7978379cd1a7fb310fb3aff38c223bed Mon Sep 17 00:00:00 2001
From: noaOrMlnx <58519608+noaOrMlnx@users.noreply.github.com>
Date: Thu, 14 Nov 2024 11:20:31 +0200
Subject: [PATCH 201/364] [Mellanox] Update Mellanox-SN5600-C256S1 SKU name and
 update buffers files (#20703)

---
 .../buffers.json.j2                           |  0
 .../buffers_defaults_objects.j2               |  0
 .../buffers_defaults_t0.j2                    |  9 ++--
 .../buffers_defaults_t1.j2                    |  3 +-
 .../buffers_dynamic.json.j2                   |  3 +-
 .../create_only_config_db_buffers.json        |  0
 .../media_settings.json                       |  0
 .../optics_si_settings.json                   |  0
 .../pg_profile_lookup.ini                     | 51 +++++++++++++++++++
 .../pmon_daemon_control.json                  |  0
 .../port_config.ini                           |  5 +-
 .../qos.json.j2                               |  0
 .../sai.profile                               |  0
 .../sai_5600_256x100g.xml                     |  3 +-
 .../supporting_bulk_counter_groups            |  1 +
 .../pg_profile_lookup.ini                     | 42 ---------------
 16 files changed, 66 insertions(+), 51 deletions(-)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256X1 => Mellanox-SN5600-C256S1}/buffers.json.j2 (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256X1 => Mellanox-SN5600-C256S1}/buffers_defaults_objects.j2 (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256X1 => Mellanox-SN5600-C256S1}/buffers_defaults_t0.j2 (87%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256X1 => Mellanox-SN5600-C256S1}/buffers_defaults_t1.j2 (94%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256X1 => Mellanox-SN5600-C256S1}/buffers_dynamic.json.j2 (83%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256X1 => Mellanox-SN5600-C256S1}/create_only_config_db_buffers.json (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256X1 => Mellanox-SN5600-C256S1}/media_settings.json (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256X1 => Mellanox-SN5600-C256S1}/optics_si_settings.json (100%)
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/pg_profile_lookup.ini
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256X1 => Mellanox-SN5600-C256S1}/pmon_daemon_control.json (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256X1 => Mellanox-SN5600-C256S1}/port_config.ini (99%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256X1 => Mellanox-SN5600-C256S1}/qos.json.j2 (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256X1 => Mellanox-SN5600-C256S1}/sai.profile (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256X1 => Mellanox-SN5600-C256S1}/sai_5600_256x100g.xml (99%)
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/supporting_bulk_counter_groups
 delete mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/pg_profile_lookup.ini

diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers.json.j2
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers.json.j2
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers.json.j2
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_objects.j2
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_objects.j2
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_objects.j2
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t0.j2
similarity index 87%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_t0.j2
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t0.j2
index 664f3a7a61d4..b39eb626078a 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_t0.j2
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t0.j2
@@ -1,5 +1,6 @@
 {#
-    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
     Apache-2.0
 
     Licensed under the Apache License, Version 2.0 (the "License");
@@ -15,10 +16,10 @@
     limitations under the License.
 #}
 {% set default_cable = '40m' %}
-{% set ingress_lossless_pool_size =  '118249472' %}
-{% set ingress_lossless_pool_xoff =  '15728640' %}
+{% set ingress_lossless_pool_size =  '115245056' %}
+{% set ingress_lossless_pool_xoff =  '14826496' %}
 {% set egress_lossless_pool_size =  '158229504' %}
-{% set egress_lossy_pool_size =  '118249472' %}
+{% set egress_lossy_pool_size =  '115245056' %}
 
 {% import 'buffers_defaults_objects.j2' as defs with context %}
 
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t1.j2
similarity index 94%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_t1.j2
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t1.j2
index 6a576b70d2f0..517c37f876fc 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_t1.j2
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t1.j2
@@ -1,5 +1,6 @@
 {#
-    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
     Apache-2.0
 
     Licensed under the Apache License, Version 2.0 (the "License");
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_dynamic.json.j2
similarity index 83%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_dynamic.json.j2
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_dynamic.json.j2
index b2cc958b7c45..17a598d4c7bd 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_dynamic.json.j2
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_dynamic.json.j2
@@ -1,5 +1,6 @@
 {#
-    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
     Apache-2.0
     Licensed under the Apache License, Version 2.0 (the "License");
     you may not use this file except in compliance with the License.
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/create_only_config_db_buffers.json
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/create_only_config_db_buffers.json
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/create_only_config_db_buffers.json
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/media_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/media_settings.json
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/media_settings.json
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/media_settings.json
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/optics_si_settings.json
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/optics_si_settings.json
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/optics_si_settings.json
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/pg_profile_lookup.ini
new file mode 100644
index 000000000000..c2e2f3394472
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/pg_profile_lookup.ini
@@ -0,0 +1,51 @@
+##
+## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+#  PG lossless profiles.
+# speed cable  size   xon    xoff   threshold
+  10000    5m 19456   19456  20480         0
+  25000    5m 19456   19456  21504         0
+  40000    5m 19456   19456  24576         0
+  50000    5m 19456   19456  26624         0
+ 100000    5m 19456   19456  44032         0
+ 200000    5m 19456   19456  50176         0
+ 400000    5m 19456   19456  86016         0
+ 800000    5m 38912   38912  95232         0
+  10000   40m 19456   19456  20480         0
+  25000   40m 19456   19456  22528         0
+  40000   40m 19456   19456  25600         0
+  50000   40m 19456   19456  28672         0
+ 100000   40m 19456   19456  49152         0
+ 200000   40m 19456   19456  60416         0
+ 400000   40m 19456   19456  104448        0
+ 800000   40m 38912   38912  132096        0
+  10000  250m 43008   19456  23552         0
+  25000  250m 19456   19456  29696         0
+  40000  250m 19456   19456  36864         0
+  50000  250m 19456   19456  43008         0
+ 100000  250m 19456   19456  76800         0
+ 200000  250m 19456   19456  116736        0
+ 400000  250m 19456   19456  217088        0
+ 800000  250m 38912   38912  357376        0
+  10000  300m 19456   19456  23552         0
+  25000  300m 19456   19456  30720         0
+  40000  300m 19456   19456  39936         0
+  50000  300m 19456   19456  46080         0
+ 100000  300m 19456   19456  83968         0
+ 200000  300m 19456   19456  130048        0
+ 400000  300m 19456   19456  243712        0
+ 800000  300m 38912   38912  411648        0
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/pmon_daemon_control.json
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/pmon_daemon_control.json
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/pmon_daemon_control.json
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/port_config.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/port_config.ini
similarity index 99%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/port_config.ini
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/port_config.ini
index ab734780f602..e8638e9a44e3 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/port_config.ini
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/port_config.ini
@@ -1,5 +1,6 @@
 ##
-## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 ## Apache-2.0
 ##
 ## Licensed under the Apache License, Version 2.0 (the "License");
@@ -272,4 +273,4 @@ Ethernet500    500                                    etp63e    63       100000
 Ethernet501    501                                    etp63f    63       100000   rs    off     6
 Ethernet502    502                                    etp63g    63       100000   rs    off     7
 Ethernet503    503                                    etp63h    63       100000   rs    off     8
-Ethernet512    512                                    etp65     65        25000   rs
+Ethernet512    512                                    etp65     65        10000   rs
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/qos.json.j2
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/qos.json.j2
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/qos.json.j2
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/sai.profile
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/sai.profile
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/sai.profile
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/sai_5600_256x100g.xml b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/sai_5600_256x100g.xml
similarity index 99%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/sai_5600_256x100g.xml
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/sai_5600_256x100g.xml
index f45f28da357b..8a97aefdc615 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/sai_5600_256x100g.xml
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/sai_5600_256x100g.xml
@@ -1,6 +1,7 @@
 <?xml version="1.0"?>
 <!--
-  Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+  SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+  Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
   Apache-2.0
 
   Licensed under the Apache License, Version 2.0 (the "License");
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/supporting_bulk_counter_groups b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/supporting_bulk_counter_groups
new file mode 100644
index 000000000000..178f0575d049
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/supporting_bulk_counter_groups
@@ -0,0 +1 @@
+QUEUE_WATERMARK_STAT_COUNTER,PG_WATERMARK_STAT_COUNTER,PFC_WD
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/pg_profile_lookup.ini
deleted file mode 100644
index 54a46fff3bf7..000000000000
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/pg_profile_lookup.ini
+++ /dev/null
@@ -1,42 +0,0 @@
-##
-## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
-## Apache-2.0
-##
-## Licensed under the Apache License, Version 2.0 (the "License");
-## you may not use this file except in compliance with the License.
-## You may obtain a copy of the License at
-##
-## http://www.apache.org/licenses/LICENSE-2.0
-##
-## Unless required by applicable law or agreed to in writing, software
-## distributed under the License is distributed on an "AS IS" BASIS,
-## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-## See the License for the specific language governing permissions and
-## limitations under the License.
-##
-#  PG lossless profiles.
-# speed cable  size   xon    xoff   threshold
-  10000    5m 39936   19456  20480         0
-  25000    5m 40960   19456  21504         0
-  40000    5m 44032   19456  24576         0
-  50000    5m 46080   19456  26624         0
- 100000    5m 63488   19456  44032         0
- 200000    5m 69632   19456  50176         0
- 400000    5m 105472  19456  86016         0
- 800000    5m 134144  38912  95232         0
-  10000   40m 39936   19456  20480         0
-  25000   40m 41984   19456  22528         0
-  40000   40m 45056   19456  25600         0
-  50000   40m 48128   19456  28672         0
- 100000   40m 68608   19456  49152         0
- 200000   40m 79872   19456  60416         0
- 400000   40m 123904  19456  104448        0
- 800000   40m 171008  38912  132096        0
-  10000  300m 43008   19456  23552         0
-  25000  300m 50176   19456  30720         0
-  40000  300m 59392   19456  39936         0
-  50000  300m 65536   19456  46080         0
- 100000  300m 103424  19456  83968         0
- 200000  300m 149504  19456  130048        0
- 400000  300m 263168  19456  243712        0
- 800000  300m 450560  38912  411648        0

From 85a6dd85f5bd5ebeb222adec037b5082d0fb8de4 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 14 Nov 2024 17:26:37 +0800
Subject: [PATCH 202/364] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#20797)

#### Why I did it
src/sonic-platform-daemons
```
* e772183 - (HEAD -> master, origin/master, origin/HEAD) [chassis][pmon] Fix the traceback issue while chassis is rebooting (#558) (23 hours ago) [Marty Y. Lok]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 0cb36447ebfd..e77218381d4d 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 0cb36447ebfda390d999df6516beac4c17315a7b
+Subproject commit e77218381d4d67c2ac89873e0ce47f32a186c121

From 8248ac470dc590fdebbd1fb75279e87174931d71 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 14 Nov 2024 17:27:00 +0800
Subject: [PATCH 203/364] [submodule] Update submodule sonic-platform-common to
 the latest HEAD automatically (#20747)

#### Why I did it
src/sonic-platform-common
```
* bad49e2 - (HEAD -> master, origin/master, origin/HEAD) Implement get/set_lpmode API for SFF8472 (#512) (2 days ago) [byu343]
* e79279b - Add negative case for pci_detach() and pci_reattach() (#504) (5 days ago) [Vasundhara Volam]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 59babf59f9aa..bad49e295d72 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 59babf59f9aa611b84082896391b01a39ffcb866
+Subproject commit bad49e295d72ca749e6cfde299ed73d9e5302bbe

From fc2087f6eb5eb064e3ad0396ae5cc97787900708 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 14 Nov 2024 19:08:42 +0800
Subject: [PATCH 204/364] [submodule] Update submodule sonic-swss-common to the
 latest HEAD automatically (#20646)

#### Why I did it
src/sonic-swss-common
```
* 11e4055 - (HEAD -> master, origin/master, origin/HEAD) Add LOGGING table (#783) (2 days ago) [Yevhen Fastiuk]
* f6c1614 - Add function ActionSchemaByNameAndObjectType to allow different ActionSchema formats. (#909) (5 days ago) [divyagayathri-hcl]
* 1408db8 - Add more information when connect redis fail (#882) (5 days ago) [Junchao-Mellanox]
* b686bb0 - Add helper function to validate interface name length (#931) (5 days ago) [Stepan Blyshchak]
* dc75f23 - C-api: refine interface on Selectable classes (#945) (5 days ago) [erer1243]
* acc4805 - Fix the ZMQ producer/consumer table does not update changes to the database issue. (#942) (6 days ago) [Hua Liu]
* e812954 - Adding VRRP_TABLE name in APPL_DB (#927) (8 days ago) [vvbrcm]
* bd0f2eb - Added new PORT_OPERR_TABLE table in STATE_DB (#941) (10 days ago) [Prince George]
* ace2080 - Fix goext ut for bookworm (#940) (12 days ago) [ganglv]
* c6364d1 - [common] add PerformanceTimer (#893) (12 days ago) [Yijiao Qin]
* deee7d6 - add PIC_CONTEXT_TABLE to shcema.h (#919) (13 days ago) [Shuai Shang]
* 0b5d994 - Fix unit test for goext (#938) (13 days ago) [ganglv]
* 45d7cb0 - Initial implementation of C api (#915) (2 weeks ago) [erer1243]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 352234ae773d..11e4055ae3fc 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 352234ae773dc6010ea2fd3b3446ced48f33ee0a
+Subproject commit 11e4055ae3fcb8872253b5e9df7d75e74cbe6cd1

From dbb4ffb8c3e18c81c8cbea275b033fe0df602c6c Mon Sep 17 00:00:00 2001
From: Gagan Punathil Ellath <gpunathilell@nvidia.com>
Date: Thu, 14 Nov 2024 10:05:00 -0800
Subject: [PATCH 205/364] [Nvidia-BF] Enable CHASSIS_DB on DPU (#20534)

- Why I did it
To enable CHASSIS_DB support on DPU, This is required to communicate health/ operation status information to the switch from the DPU

- How I did it
By adding chassisdb.conf file in the platform folder, This creates a link to the DB hosted on the Smartswitch platform

- How to verify it
Execute the following command on DPU:
sonic-db-cli CHASSIS_STATE_DB HSET DPU_TABLE_1 KEY_1 VALUE_1" sonic-db-cli DPU_APPL_DB HGETALL DPU_TABLE_1
and check if the data is available in the Switch
docker exec -it database-chassis bash -c "sonic-db-cli CHASSIS_STATE_DB HGETALL DPU_TABLE_1"
---
 device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/chassisdb.conf | 1 +
 1 file changed, 1 insertion(+)
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/chassisdb.conf

diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/chassisdb.conf b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/chassisdb.conf
new file mode 100644
index 000000000000..abe83afd6ec4
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/chassisdb.conf
@@ -0,0 +1 @@
+chassis_db_address=169.254.200.254

From 77078179b8c8d5abcac90c454dcecb364faca675 Mon Sep 17 00:00:00 2001
From: Gagan Punathil Ellath <gpunathilell@nvidia.com>
Date: Thu, 14 Nov 2024 10:05:44 -0800
Subject: [PATCH 206/364] [Mellanox][Smartswitch] Enable CHASSIS_DB (#20533)

- Why I did it
CHASSIS_DB is required for smartswitch platforms for communication between DPU and switch about DPU health and state information. Hence we need to enable it on the smartsiwtch

- How I did it
By adding chassis_db.conf in the platform folder, The configuration in thsi file enables chassis_db

- How to verify it
Check if it the database-chassis docker is running or not
---
 device/mellanox/x86_64-nvidia_sn4280-r0/chassisdb.conf | 2 ++
 1 file changed, 2 insertions(+)
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/chassisdb.conf

diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/chassisdb.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/chassisdb.conf
new file mode 100644
index 000000000000..5dc9e319043c
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/chassisdb.conf
@@ -0,0 +1,2 @@
+start_chassis_db=1
+chassis_db_address=169.254.200.254

From d4f646b9f8c55e2443acef45b67b46fbc17c953c Mon Sep 17 00:00:00 2001
From: Feng-msft <fenpan@microsoft.com>
Date: Fri, 15 Nov 2024 07:05:38 +0800
Subject: [PATCH 207/364] Add sonic-bmp submodule (#20780)

#### Why I did it
Add sonic-bmp into build-image flow.

#### How I did it
update submodule file

#### How to verify it
build
---
 .gitmodules   | 3 +++
 src/sonic-bmp | 1 +
 2 files changed, 4 insertions(+)
 create mode 160000 src/sonic-bmp

diff --git a/.gitmodules b/.gitmodules
index 9013bdb67021..487cf6d8a4a8 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -106,6 +106,9 @@
 [submodule "src/sonic-gnmi"]
 	path = src/sonic-gnmi
 	url = https://github.com/sonic-net/sonic-gnmi.git
+[submodule "src/sonic-bmp"]
+	path = src/sonic-bmp
+	url = https://github.com/sonic-net/sonic-bmp.git
 [submodule "src/sonic-genl-packet"]
 	path = src/sonic-genl-packet
 	url = https://github.com/sonic-net/sonic-genl-packet
diff --git a/src/sonic-bmp b/src/sonic-bmp
new file mode 160000
index 000000000000..6b5f200f2518
--- /dev/null
+++ b/src/sonic-bmp
@@ -0,0 +1 @@
+Subproject commit 6b5f200f25187dc448c60f99e64c214a9460208f

From 3ad2b5ab45362703a8d52f0a60f7b3b8d2e8c8fc Mon Sep 17 00:00:00 2001
From: arista-nwolfe <94405414+arista-nwolfe@users.noreply.github.com>
Date: Thu, 14 Nov 2024 20:50:25 -0500
Subject: [PATCH 208/364] [Arista]: Adding tuning for other xcvrs for wolverine
 (#20774)

Copied tuning values for sm_media_interface to nm_850_media_interface and active_cable_media_interface

This should fix issues like aristanetworks/sonic#108

Will ask MSFT to confirm this works with their cables which use active_cable_media_interface.
---
 .../media_settings.json                       | 6140 ++++++++++++++---
 1 file changed, 5302 insertions(+), 838 deletions(-)

diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/media_settings.json b/device/arista/x86_64-arista_7800r3a_36d2_lc/media_settings.json
index e9f452042347..12db12302e6f 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/media_settings.json
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/media_settings.json
@@ -63,6 +63,130 @@
                     "lane7": "0x2"
                 }
             },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x8d",
+                    "lane2": "0x8b",
+                    "lane3": "0x90",
+                    "lane4": "0x89",
+                    "lane5": "0x8d",
+                    "lane6": "0x94",
+                    "lane7": "0x88"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffff2"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xfffffffc"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xffffffef",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x3",
+                    "lane2": "0x3",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x8d",
+                    "lane2": "0x8b",
+                    "lane3": "0x90",
+                    "lane4": "0x89",
+                    "lane5": "0x8d",
+                    "lane6": "0x94",
+                    "lane7": "0x88"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffff2"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xfffffffc"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xffffffef",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x3",
+                    "lane2": "0x3",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x2"
+                }
+            },
             "Default": {
                 "main": {
                     "lane0": "0x59",
@@ -165,6 +289,130 @@
                     "lane7": "0x2"
                 }
             },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x8d",
+                    "lane1": "0x8d",
+                    "lane2": "0x89",
+                    "lane3": "0x8d",
+                    "lane4": "0x8d",
+                    "lane5": "0x84",
+                    "lane6": "0x8d",
+                    "lane7": "0x8d"
+                },
+                "post1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff6",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff1",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff1"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x8d",
+                    "lane1": "0x8d",
+                    "lane2": "0x89",
+                    "lane3": "0x8d",
+                    "lane4": "0x8d",
+                    "lane5": "0x84",
+                    "lane6": "0x8d",
+                    "lane7": "0x8d"
+                },
+                "post1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff6",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff1",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff1"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
             "Default": {
                 "main": {
                     "lane0": "0x4b",
@@ -267,19 +515,143 @@
                     "lane7": "0x2"
                 }
             },
-            "Default": {
+            "QSFP-DD-nm_850_media_interface": {
                 "main": {
-                    "lane0": "0x50",
-                    "lane1": "0x50",
-                    "lane2": "0x55",
-                    "lane3": "0x55"
-                },
-                "post1": {
-                    "lane0": "0xffffffe9",
-                    "lane1": "0xffffffe9",
-                    "lane2": "0xffffffe7",
-                    "lane3": "0xffffffe7"
-                },
+                    "lane0": "0x89",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8b",
+                    "lane4": "0x94",
+                    "lane5": "0x88",
+                    "lane6": "0x8b",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x89",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8b",
+                    "lane4": "0x94",
+                    "lane5": "0x88",
+                    "lane6": "0x8b",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "Default": {
+                "main": {
+                    "lane0": "0x50",
+                    "lane1": "0x50",
+                    "lane2": "0x55",
+                    "lane3": "0x55"
+                },
+                "post1": {
+                    "lane0": "0xffffffe9",
+                    "lane1": "0xffffffe9",
+                    "lane2": "0xffffffe7",
+                    "lane3": "0xffffffe7"
+                },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
@@ -369,6 +741,130 @@
                     "lane7": "0x3"
                 }
             },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x89",
+                    "lane1": "0x8d",
+                    "lane2": "0x8d",
+                    "lane3": "0x8d",
+                    "lane4": "0x89",
+                    "lane5": "0x8d",
+                    "lane6": "0x8d",
+                    "lane7": "0x8d"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffffb"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff1",
+                    "lane6": "0xfffffff1",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x3",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x2",
+                    "lane7": "0x3"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x89",
+                    "lane1": "0x8d",
+                    "lane2": "0x8d",
+                    "lane3": "0x8d",
+                    "lane4": "0x89",
+                    "lane5": "0x8d",
+                    "lane6": "0x8d",
+                    "lane7": "0x8d"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffffb"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff1",
+                    "lane6": "0xfffffff1",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x3",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x2",
+                    "lane7": "0x3"
+                }
+            },
             "Default": {
                 "main": {
                     "lane0": "0x59",
@@ -471,6 +967,130 @@
                     "lane7": "0x2"
                 }
             },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x89",
+                    "lane2": "0x88",
+                    "lane3": "0x8b",
+                    "lane4": "0x88",
+                    "lane5": "0x8b",
+                    "lane6": "0x88",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x89",
+                    "lane2": "0x88",
+                    "lane3": "0x8b",
+                    "lane4": "0x88",
+                    "lane5": "0x8b",
+                    "lane6": "0x88",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x2"
+                }
+            },
             "Default": {
                 "main": {
                     "lane0": "0x59",
@@ -573,74 +1193,96 @@
                     "lane7": "0x2"
                 }
             },
-            "Default": {
+            "QSFP-DD-nm_850_media_interface": {
                 "main": {
-                    "lane0": "0x59",
-                    "lane1": "0x59",
-                    "lane2": "0x59",
-                    "lane3": "0x59"
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8b",
+                    "lane4": "0x94",
+                    "lane5": "0x88",
+                    "lane6": "0x8b",
+                    "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "0xffffffe3",
-                    "lane1": "0xffffffe3",
-                    "lane2": "0xffffffe3",
-                    "lane3": "0xffffffe3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff8",
-                    "lane1": "0xfffffff8",
-                    "lane2": "0xfffffff8",
-                    "lane3": "0xfffffff8"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
                 }
-            }
-        },
-        "7": {
-            "QSFP-DD-sm_media_interface": {
+            },
+            "QSFP-DD-active_cable_media_interface": {
                 "main": {
                     "lane0": "0x94",
                     "lane1": "0x88",
                     "lane2": "0x8b",
-                    "lane3": "0x88",
+                    "lane3": "0x8b",
                     "lane4": "0x94",
-                    "lane5": "0x8b",
+                    "lane5": "0x88",
                     "lane6": "0x8b",
-                    "lane7": "0x88"
+                    "lane7": "0x94"
                 },
                 "post1": {
                     "lane0": "0xfffffffd",
                     "lane1": "0xfffffff2",
                     "lane2": "0xfffffff9",
-                    "lane3": "0xfffffff2",
+                    "lane3": "0xfffffff9",
                     "lane4": "0xfffffffd",
-                    "lane5": "0xfffffff9",
+                    "lane5": "0xfffffff2",
                     "lane6": "0xfffffff9",
-                    "lane7": "0xfffffff2"
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
                     "lane2": "0xfffffffe",
-                    "lane3": "0x0",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "0xfffffffe",
+                    "lane5": "0x0",
                     "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
@@ -648,29 +1290,29 @@
                     "lane0": "0xffffffff",
                     "lane1": "0xfffffffc",
                     "lane2": "0xfffffffd",
-                    "lane3": "0xfffffffc",
+                    "lane3": "0xfffffffd",
                     "lane4": "0xffffffff",
-                    "lane5": "0xfffffffd",
+                    "lane5": "0xfffffffc",
                     "lane6": "0xfffffffd",
-                    "lane7": "0xfffffffc"
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
                     "lane0": "0xfffffff0",
                     "lane1": "0xfffffff2",
                     "lane2": "0xfffffff0",
-                    "lane3": "0xfffffff2",
+                    "lane3": "0xfffffff0",
                     "lane4": "0xfffffff0",
-                    "lane5": "0xfffffff0",
+                    "lane5": "0xfffffff2",
                     "lane6": "0xfffffff0",
-                    "lane7": "0xfffffff2"
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
                     "lane1": "0x2",
                     "lane2": "0x3",
-                    "lane3": "0x2",
+                    "lane3": "0x3",
                     "lane4": "0x2",
-                    "lane5": "0x3",
+                    "lane5": "0x2",
                     "lane6": "0x3",
                     "lane7": "0x2"
                 }
@@ -714,137 +1356,159 @@
                 }
             }
         },
-        "8": {
+        "7": {
             "QSFP-DD-sm_media_interface": {
                 "main": {
                     "lane0": "0x94",
-                    "lane1": "0x94",
-                    "lane2": "0x88",
-                    "lane3": "0x8b",
-                    "lane4": "0x88",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x88",
+                    "lane4": "0x94",
                     "lane5": "0x8b",
-                    "lane6": "0x88",
-                    "lane7": "0x94"
+                    "lane6": "0x8b",
+                    "lane7": "0x88"
                 },
                 "post1": {
                     "lane0": "0xfffffffd",
-                    "lane1": "0xfffffffd",
-                    "lane2": "0xfffffff2",
-                    "lane3": "0xfffffff9",
-                    "lane4": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
                     "lane5": "0xfffffff9",
-                    "lane6": "0xfffffff2",
-                    "lane7": "0xfffffffd"
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0x0",
                     "lane4": "0x0",
                     "lane5": "0xfffffffe",
-                    "lane6": "0x0",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
                 "post3": {
                     "lane0": "0xffffffff",
-                    "lane1": "0xffffffff",
-                    "lane2": "0xfffffffc",
-                    "lane3": "0xfffffffd",
-                    "lane4": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
                     "lane5": "0xfffffffd",
-                    "lane6": "0xfffffffc",
-                    "lane7": "0xffffffff"
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
                 },
                 "pre1": {
                     "lane0": "0xfffffff0",
-                    "lane1": "0xfffffff0",
-                    "lane2": "0xfffffff2",
-                    "lane3": "0xfffffff0",
-                    "lane4": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
                     "lane5": "0xfffffff0",
-                    "lane6": "0xfffffff2",
-                    "lane7": "0xfffffff0"
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
                 },
                 "pre2": {
                     "lane0": "0x2",
                     "lane1": "0x2",
-                    "lane2": "0x2",
-                    "lane3": "0x3",
+                    "lane2": "0x3",
+                    "lane3": "0x2",
                     "lane4": "0x2",
                     "lane5": "0x3",
-                    "lane6": "0x2",
+                    "lane6": "0x3",
                     "lane7": "0x2"
                 }
             },
-            "Default": {
+            "QSFP-DD-nm_850_media_interface": {
                 "main": {
-                    "lane0": "0x59",
-                    "lane1": "0x59",
-                    "lane2": "0x59",
-                    "lane3": "0x59"
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x88",
+                    "lane4": "0x94",
+                    "lane5": "0x8b",
+                    "lane6": "0x8b",
+                    "lane7": "0x88"
                 },
                 "post1": {
-                    "lane0": "0xffffffe3",
-                    "lane1": "0xffffffe3",
-                    "lane2": "0xffffffe3",
-                    "lane3": "0xffffffe3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
+                    "lane2": "0xfffffffe",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff8",
-                    "lane1": "0xfffffff8",
-                    "lane2": "0xfffffff8",
-                    "lane3": "0xfffffff8"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
                 },
                 "pre2": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
                 }
-            }
-        },
-        "9": {
-            "QSFP-DD-sm_media_interface": {
+            },
+            "QSFP-DD-active_cable_media_interface": {
                 "main": {
                     "lane0": "0x94",
                     "lane1": "0x88",
                     "lane2": "0x8b",
-                    "lane3": "0x8b",
+                    "lane3": "0x88",
                     "lane4": "0x94",
-                    "lane5": "0x88",
+                    "lane5": "0x8b",
                     "lane6": "0x8b",
-                    "lane7": "0x94"
+                    "lane7": "0x88"
                 },
                 "post1": {
                     "lane0": "0xfffffffd",
                     "lane1": "0xfffffff2",
                     "lane2": "0xfffffff9",
-                    "lane3": "0xfffffff9",
+                    "lane3": "0xfffffff2",
                     "lane4": "0xfffffffd",
-                    "lane5": "0xfffffff2",
+                    "lane5": "0xfffffff9",
                     "lane6": "0xfffffff9",
-                    "lane7": "0xfffffffd"
+                    "lane7": "0xfffffff2"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
                     "lane2": "0xfffffffe",
-                    "lane3": "0xfffffffe",
+                    "lane3": "0x0",
                     "lane4": "0x0",
-                    "lane5": "0x0",
+                    "lane5": "0xfffffffe",
                     "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
@@ -852,29 +1516,29 @@
                     "lane0": "0xffffffff",
                     "lane1": "0xfffffffc",
                     "lane2": "0xfffffffd",
-                    "lane3": "0xfffffffd",
+                    "lane3": "0xfffffffc",
                     "lane4": "0xffffffff",
-                    "lane5": "0xfffffffc",
+                    "lane5": "0xfffffffd",
                     "lane6": "0xfffffffd",
-                    "lane7": "0xffffffff"
+                    "lane7": "0xfffffffc"
                 },
                 "pre1": {
                     "lane0": "0xfffffff0",
                     "lane1": "0xfffffff2",
                     "lane2": "0xfffffff0",
-                    "lane3": "0xfffffff0",
+                    "lane3": "0xfffffff2",
                     "lane4": "0xfffffff0",
-                    "lane5": "0xfffffff2",
+                    "lane5": "0xfffffff0",
                     "lane6": "0xfffffff0",
-                    "lane7": "0xfffffff0"
+                    "lane7": "0xfffffff2"
                 },
                 "pre2": {
                     "lane0": "0x2",
                     "lane1": "0x2",
                     "lane2": "0x3",
-                    "lane3": "0x3",
+                    "lane3": "0x2",
                     "lane4": "0x2",
-                    "lane5": "0x2",
+                    "lane5": "0x3",
                     "lane6": "0x3",
                     "lane7": "0x2"
                 }
@@ -918,110 +1582,70 @@
                 }
             }
         },
-        "10": {
+        "8": {
             "QSFP-DD-sm_media_interface": {
                 "main": {
                     "lane0": "0x94",
-                    "lane1": "0x88",
-                    "lane2": "0x8b",
+                    "lane1": "0x94",
+                    "lane2": "0x88",
                     "lane3": "0x8b",
-                    "lane4": "0x94",
-                    "lane5": "0x88",
-                    "lane6": "0x8b",
+                    "lane4": "0x88",
+                    "lane5": "0x8b",
+                    "lane6": "0x88",
                     "lane7": "0x94"
                 },
                 "post1": {
                     "lane0": "0xfffffffd",
-                    "lane1": "0xfffffff2",
-                    "lane2": "0xfffffff9",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
                     "lane3": "0xfffffff9",
-                    "lane4": "0xfffffffd",
-                    "lane5": "0xfffffff2",
-                    "lane6": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
                     "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "0xfffffffe",
+                    "lane2": "0x0",
                     "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "0x0",
-                    "lane6": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
                     "lane7": "0x0"
                 },
                 "post3": {
                     "lane0": "0xffffffff",
-                    "lane1": "0xfffffffc",
-                    "lane2": "0xfffffffd",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
                     "lane3": "0xfffffffd",
-                    "lane4": "0xffffffff",
-                    "lane5": "0xfffffffc",
-                    "lane6": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
                     "lane7": "0xffffffff"
                 },
                 "pre1": {
                     "lane0": "0xfffffff0",
-                    "lane1": "0xfffffff2",
-                    "lane2": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
                     "lane3": "0xfffffff0",
-                    "lane4": "0xfffffff0",
-                    "lane5": "0xfffffff2",
-                    "lane6": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
                     "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
                     "lane1": "0x2",
-                    "lane2": "0x3",
+                    "lane2": "0x2",
                     "lane3": "0x3",
                     "lane4": "0x2",
-                    "lane5": "0x2",
-                    "lane6": "0x3",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
                     "lane7": "0x2"
                 }
             },
-            "Default": {
-                "main": {
-                    "lane0": "0x55",
-                    "lane1": "0x4e",
-                    "lane2": "0x4b",
-                    "lane3": "0x53"
-                },
-                "post1": {
-                    "lane0": "0xffffffeb",
-                    "lane1": "0xffffffea",
-                    "lane2": "0xffffffec",
-                    "lane3": "0xffffffea"
-                },
-                "post2": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
-                },
-                "post3": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
-                },
-                "pre1": {
-                    "lane0": "0xfffffffa",
-                    "lane1": "0xfffffffb",
-                    "lane2": "0xfffffffb",
-                    "lane3": "0xfffffffb"
-                },
-                "pre2": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
-                }
-            }
-        },
-        "11": {
-            "QSFP-DD-sm_media_interface": {
+            "QSFP-DD-nm_850_media_interface": {
                 "main": {
                     "lane0": "0x94",
                     "lane1": "0x94",
@@ -1083,22 +1707,84 @@
                     "lane7": "0x2"
                 }
             },
-            "Default": {
+            "QSFP-DD-active_cable_media_interface": {
                 "main": {
-                    "lane0": "0x4b",
-                    "lane1": "0x4b",
-                    "lane2": "0x59",
-                    "lane3": "0x59"
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x88",
+                    "lane3": "0x8b",
+                    "lane4": "0x88",
+                    "lane5": "0x8b",
+                    "lane6": "0x88",
+                    "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "0xffffffeb",
-                    "lane1": "0xffffffeb",
-                    "lane2": "0xffffffe3",
-                    "lane3": "0xffffffe3"
-                },
-                "post2": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x2"
+                }
+            },
+            "Default": {
+                "main": {
+                    "lane0": "0x59",
+                    "lane1": "0x59",
+                    "lane2": "0x59",
+                    "lane3": "0x59"
+                },
+                "post1": {
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
                     "lane2": "0x0",
                     "lane3": "0x0"
                 },
@@ -1109,8 +1795,8 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "0xfffffffc",
-                    "lane1": "0xfffffffc",
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
                     "lane2": "0xfffffff8",
                     "lane3": "0xfffffff8"
                 },
@@ -1122,35 +1808,35 @@
                 }
             }
         },
-        "12": {
+        "9": {
             "QSFP-DD-sm_media_interface": {
                 "main": {
                     "lane0": "0x94",
                     "lane1": "0x88",
                     "lane2": "0x8b",
-                    "lane3": "0x88",
+                    "lane3": "0x8b",
                     "lane4": "0x94",
-                    "lane5": "0x8b",
+                    "lane5": "0x88",
                     "lane6": "0x8b",
-                    "lane7": "0x88"
+                    "lane7": "0x94"
                 },
                 "post1": {
                     "lane0": "0xfffffffd",
                     "lane1": "0xfffffff2",
                     "lane2": "0xfffffff9",
-                    "lane3": "0xfffffff2",
+                    "lane3": "0xfffffff9",
                     "lane4": "0xfffffffd",
-                    "lane5": "0xfffffff9",
+                    "lane5": "0xfffffff2",
                     "lane6": "0xfffffff9",
-                    "lane7": "0xfffffff2"
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
                     "lane2": "0xfffffffe",
-                    "lane3": "0x0",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "0xfffffffe",
+                    "lane5": "0x0",
                     "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
@@ -1158,74 +1844,96 @@
                     "lane0": "0xffffffff",
                     "lane1": "0xfffffffc",
                     "lane2": "0xfffffffd",
-                    "lane3": "0xfffffffc",
+                    "lane3": "0xfffffffd",
                     "lane4": "0xffffffff",
-                    "lane5": "0xfffffffd",
+                    "lane5": "0xfffffffc",
                     "lane6": "0xfffffffd",
-                    "lane7": "0xfffffffc"
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
                     "lane0": "0xfffffff0",
                     "lane1": "0xfffffff2",
                     "lane2": "0xfffffff0",
-                    "lane3": "0xfffffff2",
+                    "lane3": "0xfffffff0",
                     "lane4": "0xfffffff0",
-                    "lane5": "0xfffffff0",
+                    "lane5": "0xfffffff2",
                     "lane6": "0xfffffff0",
-                    "lane7": "0xfffffff2"
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
                     "lane1": "0x2",
                     "lane2": "0x3",
-                    "lane3": "0x2",
+                    "lane3": "0x3",
                     "lane4": "0x2",
-                    "lane5": "0x3",
+                    "lane5": "0x2",
                     "lane6": "0x3",
                     "lane7": "0x2"
                 }
             },
-            "Default": {
+            "QSFP-DD-nm_850_media_interface": {
                 "main": {
-                    "lane0": "0x55",
-                    "lane1": "0x53",
-                    "lane2": "0x55",
-                    "lane3": "0x53"
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8b",
+                    "lane4": "0x94",
+                    "lane5": "0x88",
+                    "lane6": "0x8b",
+                    "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "0xffffffeb",
-                    "lane1": "0xffffffea",
-                    "lane2": "0xffffffeb",
-                    "lane3": "0xffffffea"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "0xfffffffa",
-                    "lane1": "0xfffffffb",
-                    "lane2": "0xfffffffa",
-                    "lane3": "0xfffffffb"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
                 }
-            }
-        },
-        "13": {
-            "QSFP-DD-sm_media_interface": {
+            },
+            "QSFP-DD-active_cable_media_interface": {
                 "main": {
                     "lane0": "0x94",
                     "lane1": "0x88",
@@ -1289,16 +1997,16 @@
             },
             "Default": {
                 "main": {
-                    "lane0": "0x4e",
-                    "lane1": "0x4e",
-                    "lane2": "0x53",
-                    "lane3": "0x4b"
+                    "lane0": "0x59",
+                    "lane1": "0x59",
+                    "lane2": "0x59",
+                    "lane3": "0x59"
                 },
                 "post1": {
-                    "lane0": "0xffffffea",
-                    "lane1": "0xffffffea",
-                    "lane2": "0xffffffea",
-                    "lane3": "0xffffffec"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -1313,10 +2021,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "0xfffffffb",
-                    "lane1": "0xfffffffb",
-                    "lane2": "0xfffffffb",
-                    "lane3": "0xfffffffb"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -1326,129 +2034,89 @@
                 }
             }
         },
-        "14": {
+        "10": {
             "QSFP-DD-sm_media_interface": {
                 "main": {
                     "lane0": "0x94",
-                    "lane1": "0x94",
-                    "lane2": "0x88",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
                     "lane3": "0x8b",
-                    "lane4": "0x88",
-                    "lane5": "0x8b",
-                    "lane6": "0x88",
+                    "lane4": "0x94",
+                    "lane5": "0x88",
+                    "lane6": "0x8b",
                     "lane7": "0x94"
                 },
                 "post1": {
                     "lane0": "0xfffffffd",
-                    "lane1": "0xfffffffd",
-                    "lane2": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
                     "lane3": "0xfffffff9",
-                    "lane4": "0xfffffff2",
-                    "lane5": "0xfffffff9",
-                    "lane6": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
                     "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "0x0",
+                    "lane2": "0xfffffffe",
                     "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "0xfffffffe",
-                    "lane6": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
                 "post3": {
                     "lane0": "0xffffffff",
-                    "lane1": "0xffffffff",
-                    "lane2": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
                     "lane3": "0xfffffffd",
-                    "lane4": "0xfffffffc",
-                    "lane5": "0xfffffffd",
-                    "lane6": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
                     "lane7": "0xffffffff"
                 },
                 "pre1": {
                     "lane0": "0xfffffff0",
-                    "lane1": "0xfffffff0",
-                    "lane2": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
                     "lane3": "0xfffffff0",
-                    "lane4": "0xfffffff2",
-                    "lane5": "0xfffffff0",
-                    "lane6": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
                     "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
                     "lane1": "0x2",
-                    "lane2": "0x2",
+                    "lane2": "0x3",
                     "lane3": "0x3",
                     "lane4": "0x2",
-                    "lane5": "0x3",
-                    "lane6": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
                     "lane7": "0x2"
                 }
             },
-            "Default": {
-                "main": {
-                    "lane0": "0x55",
-                    "lane1": "0x55",
-                    "lane2": "0x4b",
-                    "lane3": "0x50"
-                },
-                "post1": {
-                    "lane0": "0xffffffe7",
-                    "lane1": "0xffffffe7",
-                    "lane2": "0xffffffeb",
-                    "lane3": "0xffffffe9"
-                },
-                "post2": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
-                },
-                "post3": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
-                },
-                "pre1": {
-                    "lane0": "0xfffffff9",
-                    "lane1": "0xfffffff9",
-                    "lane2": "0xfffffffc",
-                    "lane3": "0xfffffffb"
-                },
-                "pre2": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
-                }
-            }
-        },
-        "15": {
-            "QSFP-DD-sm_media_interface": {
+            "QSFP-DD-nm_850_media_interface": {
                 "main": {
-                    "lane0": "0x86",
+                    "lane0": "0x94",
                     "lane1": "0x88",
                     "lane2": "0x8b",
-                    "lane3": "0x8d",
+                    "lane3": "0x8b",
                     "lane4": "0x94",
-                    "lane5": "0x8b",
+                    "lane5": "0x88",
                     "lane6": "0x8b",
-                    "lane7": "0x88"
+                    "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "0xfffffff4",
+                    "lane0": "0xfffffffd",
                     "lane1": "0xfffffff2",
                     "lane2": "0xfffffff9",
-                    "lane3": "0xfffffffb",
+                    "lane3": "0xfffffff9",
                     "lane4": "0xfffffffd",
-                    "lane5": "0xfffffff9",
+                    "lane5": "0xfffffff2",
                     "lane6": "0xfffffff9",
-                    "lane7": "0xfffffff2"
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -1456,19 +2124,19 @@
                     "lane2": "0xfffffffe",
                     "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "0xfffffffe",
+                    "lane5": "0x0",
                     "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "0xfffffffb",
+                    "lane0": "0xffffffff",
                     "lane1": "0xfffffffc",
                     "lane2": "0xfffffffd",
                     "lane3": "0xfffffffd",
                     "lane4": "0xffffffff",
-                    "lane5": "0xfffffffd",
+                    "lane5": "0xfffffffc",
                     "lane6": "0xfffffffd",
-                    "lane7": "0xfffffffc"
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
                     "lane0": "0xfffffff0",
@@ -1476,62 +2144,22 @@
                     "lane2": "0xfffffff0",
                     "lane3": "0xfffffff0",
                     "lane4": "0xfffffff0",
-                    "lane5": "0xfffffff0",
+                    "lane5": "0xfffffff2",
                     "lane6": "0xfffffff0",
-                    "lane7": "0xfffffff2"
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
-                    "lane0": "0x3",
+                    "lane0": "0x2",
                     "lane1": "0x2",
                     "lane2": "0x3",
                     "lane3": "0x3",
                     "lane4": "0x2",
-                    "lane5": "0x3",
+                    "lane5": "0x2",
                     "lane6": "0x3",
                     "lane7": "0x2"
                 }
             },
-            "Default": {
-                "main": {
-                    "lane0": "0x4e",
-                    "lane1": "0x53",
-                    "lane2": "0x55",
-                    "lane3": "0x53"
-                },
-                "post1": {
-                    "lane0": "0xffffffea",
-                    "lane1": "0xffffffea",
-                    "lane2": "0xffffffeb",
-                    "lane3": "0xffffffea"
-                },
-                "post2": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
-                },
-                "post3": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
-                },
-                "pre1": {
-                    "lane0": "0xfffffffb",
-                    "lane1": "0xfffffffb",
-                    "lane2": "0xfffffffa",
-                    "lane3": "0xfffffffb"
-                },
-                "pre2": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
-                }
-            }
-        },
-        "16": {
-            "QSFP-DD-sm_media_interface": {
+            "QSFP-DD-active_cable_media_interface": {
                 "main": {
                     "lane0": "0x94",
                     "lane1": "0x88",
@@ -1596,15 +2224,15 @@
             "Default": {
                 "main": {
                     "lane0": "0x55",
-                    "lane1": "0x4b",
-                    "lane2": "0x59",
-                    "lane3": "0x50"
+                    "lane1": "0x4e",
+                    "lane2": "0x4b",
+                    "lane3": "0x53"
                 },
                 "post1": {
-                    "lane0": "0xffffffe7",
-                    "lane1": "0xffffffeb",
-                    "lane2": "0xffffffe3",
-                    "lane3": "0xffffffe9"
+                    "lane0": "0xffffffeb",
+                    "lane1": "0xffffffea",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffea"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -1619,9 +2247,9 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff9",
-                    "lane1": "0xfffffffc",
-                    "lane2": "0xfffffff8",
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
                     "lane3": "0xfffffffb"
                 },
                 "pre2": {
@@ -1632,99 +2260,2709 @@
                 }
             }
         },
-        "17": {
+        "11": {
             "QSFP-DD-sm_media_interface": {
                 "main": {
-                    "lane0": "0x8d",
-                    "lane1": "0x90",
-                    "lane2": "0x89",
-                    "lane3": "0x88",
-                    "lane4": "0x8b",
-                    "lane5": "0x89",
-                    "lane6": "0x8d",
-                    "lane7": "0x90"
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x88",
+                    "lane3": "0x8b",
+                    "lane4": "0x88",
+                    "lane5": "0x8b",
+                    "lane6": "0x88",
+                    "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "0xfffffffb",
-                    "lane1": "0xffffffff",
-                    "lane2": "0xfffffff4",
-                    "lane3": "0xfffffff2",
-                    "lane4": "0xfffffff9",
-                    "lane5": "0xfffffff4",
-                    "lane6": "0xfffffffb",
-                    "lane7": "0xffffffff"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
-                    "lane0": "0xfffffffe",
-                    "lane1": "0xfffffffd",
+                    "lane0": "0x0",
+                    "lane1": "0x0",
                     "lane2": "0x0",
-                    "lane3": "0x0",
-                    "lane4": "0xfffffffe",
-                    "lane5": "0x0",
-                    "lane6": "0xfffffffe",
-                    "lane7": "0xfffffffd"
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "0xfffffffd",
-                    "lane1": "0xfffffffd",
-                    "lane2": "0xfffffffd",
-                    "lane3": "0xfffffffc",
-                    "lane4": "0xfffffffd",
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
                     "lane5": "0xfffffffd",
-                    "lane6": "0xfffffffd",
-                    "lane7": "0xfffffffd"
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
                     "lane0": "0xfffffff0",
-                    "lane1": "0xffffffef",
-                    "lane2": "0xfffffff0",
-                    "lane3": "0xfffffff2",
-                    "lane4": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
                     "lane5": "0xfffffff0",
-                    "lane6": "0xfffffff0",
-                    "lane7": "0xffffffef"
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
-                    "lane0": "0x3",
+                    "lane0": "0x2",
                     "lane1": "0x2",
                     "lane2": "0x2",
-                    "lane3": "0x2",
-                    "lane4": "0x3",
-                    "lane5": "0x2",
-                    "lane6": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
                     "lane7": "0x2"
                 }
             },
-            "Default": {
+            "QSFP-DD-nm_850_media_interface": {
                 "main": {
-                    "lane0": "0x53",
-                    "lane1": "0x53",
-                    "lane2": "0x55",
-                    "lane3": "0x55"
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x88",
+                    "lane3": "0x8b",
+                    "lane4": "0x88",
+                    "lane5": "0x8b",
+                    "lane6": "0x88",
+                    "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "0xffffffea",
-                    "lane1": "0xffffffea",
-                    "lane2": "0xffffffeb",
-                    "lane3": "0xffffffeb"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
                     "lane2": "0x0",
-                    "lane3": "0x0"
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
-                },
-                "pre1": {
-                    "lane0": "0xfffffffb",
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x88",
+                    "lane3": "0x8b",
+                    "lane4": "0x88",
+                    "lane5": "0x8b",
+                    "lane6": "0x88",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x2"
+                }
+            },
+            "Default": {
+                "main": {
+                    "lane0": "0x4b",
+                    "lane1": "0x4b",
+                    "lane2": "0x59",
+                    "lane3": "0x59"
+                },
+                "post1": {
+                    "lane0": "0xffffffeb",
+                    "lane1": "0xffffffeb",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                }
+            }
+        },
+        "12": {
+            "QSFP-DD-sm_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x88",
+                    "lane4": "0x94",
+                    "lane5": "0x8b",
+                    "lane6": "0x8b",
+                    "lane7": "0x88"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x88",
+                    "lane4": "0x94",
+                    "lane5": "0x8b",
+                    "lane6": "0x8b",
+                    "lane7": "0x88"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x88",
+                    "lane4": "0x94",
+                    "lane5": "0x8b",
+                    "lane6": "0x8b",
+                    "lane7": "0x88"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "Default": {
+                "main": {
+                    "lane0": "0x55",
+                    "lane1": "0x53",
+                    "lane2": "0x55",
+                    "lane3": "0x53"
+                },
+                "post1": {
+                    "lane0": "0xffffffeb",
+                    "lane1": "0xffffffea",
+                    "lane2": "0xffffffeb",
+                    "lane3": "0xffffffea"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffb"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                }
+            }
+        },
+        "13": {
+            "QSFP-DD-sm_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8b",
+                    "lane4": "0x94",
+                    "lane5": "0x88",
+                    "lane6": "0x8b",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8b",
+                    "lane4": "0x94",
+                    "lane5": "0x88",
+                    "lane6": "0x8b",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8b",
+                    "lane4": "0x94",
+                    "lane5": "0x88",
+                    "lane6": "0x8b",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "Default": {
+                "main": {
+                    "lane0": "0x4e",
+                    "lane1": "0x4e",
+                    "lane2": "0x53",
+                    "lane3": "0x4b"
+                },
+                "post1": {
+                    "lane0": "0xffffffea",
+                    "lane1": "0xffffffea",
+                    "lane2": "0xffffffea",
+                    "lane3": "0xffffffec"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                }
+            }
+        },
+        "14": {
+            "QSFP-DD-sm_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x88",
+                    "lane3": "0x8b",
+                    "lane4": "0x88",
+                    "lane5": "0x8b",
+                    "lane6": "0x88",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x88",
+                    "lane3": "0x8b",
+                    "lane4": "0x88",
+                    "lane5": "0x8b",
+                    "lane6": "0x88",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x88",
+                    "lane3": "0x8b",
+                    "lane4": "0x88",
+                    "lane5": "0x8b",
+                    "lane6": "0x88",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x2"
+                }
+            },
+            "Default": {
+                "main": {
+                    "lane0": "0x55",
+                    "lane1": "0x55",
+                    "lane2": "0x4b",
+                    "lane3": "0x50"
+                },
+                "post1": {
+                    "lane0": "0xffffffe7",
+                    "lane1": "0xffffffe7",
+                    "lane2": "0xffffffeb",
+                    "lane3": "0xffffffe9"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffb"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                }
+            }
+        },
+        "15": {
+            "QSFP-DD-sm_media_interface": {
+                "main": {
+                    "lane0": "0x86",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8d",
+                    "lane4": "0x94",
+                    "lane5": "0x8b",
+                    "lane6": "0x8b",
+                    "lane7": "0x88"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x86",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8d",
+                    "lane4": "0x94",
+                    "lane5": "0x8b",
+                    "lane6": "0x8b",
+                    "lane7": "0x88"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x86",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8d",
+                    "lane4": "0x94",
+                    "lane5": "0x8b",
+                    "lane6": "0x8b",
+                    "lane7": "0x88"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "Default": {
+                "main": {
+                    "lane0": "0x4e",
+                    "lane1": "0x53",
+                    "lane2": "0x55",
+                    "lane3": "0x53"
+                },
+                "post1": {
+                    "lane0": "0xffffffea",
+                    "lane1": "0xffffffea",
+                    "lane2": "0xffffffeb",
+                    "lane3": "0xffffffea"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffb"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                }
+            }
+        },
+        "16": {
+            "QSFP-DD-sm_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8b",
+                    "lane4": "0x94",
+                    "lane5": "0x88",
+                    "lane6": "0x8b",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8b",
+                    "lane4": "0x94",
+                    "lane5": "0x88",
+                    "lane6": "0x8b",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8b",
+                    "lane4": "0x94",
+                    "lane5": "0x88",
+                    "lane6": "0x8b",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "Default": {
+                "main": {
+                    "lane0": "0x55",
+                    "lane1": "0x4b",
+                    "lane2": "0x59",
+                    "lane3": "0x50"
+                },
+                "post1": {
+                    "lane0": "0xffffffe7",
+                    "lane1": "0xffffffeb",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe9"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffffb"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                }
+            }
+        },
+        "17": {
+            "QSFP-DD-sm_media_interface": {
+                "main": {
+                    "lane0": "0x8d",
+                    "lane1": "0x90",
+                    "lane2": "0x89",
+                    "lane3": "0x88",
+                    "lane4": "0x8b",
+                    "lane5": "0x89",
+                    "lane6": "0x8d",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xffffffff"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xffffffef",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xffffffef"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x2",
+                    "lane4": "0x3",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x8d",
+                    "lane1": "0x90",
+                    "lane2": "0x89",
+                    "lane3": "0x88",
+                    "lane4": "0x8b",
+                    "lane5": "0x89",
+                    "lane6": "0x8d",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xffffffff"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xffffffef",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xffffffef"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x2",
+                    "lane4": "0x3",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x8d",
+                    "lane1": "0x90",
+                    "lane2": "0x89",
+                    "lane3": "0x88",
+                    "lane4": "0x8b",
+                    "lane5": "0x89",
+                    "lane6": "0x8d",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xffffffff"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xffffffef",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xffffffef"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x2",
+                    "lane4": "0x3",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "Default": {
+                "main": {
+                    "lane0": "0x53",
+                    "lane1": "0x53",
+                    "lane2": "0x55",
+                    "lane3": "0x55"
+                },
+                "post1": {
+                    "lane0": "0xffffffea",
+                    "lane1": "0xffffffea",
+                    "lane2": "0xffffffeb",
+                    "lane3": "0xffffffeb"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                }
+            }
+        },
+        "18": {
+            "QSFP-DD-sm_media_interface": {
+                "main": {
+                    "lane0": "0x89",
+                    "lane1": "0x8d",
+                    "lane2": "0x8d",
+                    "lane3": "0x8d",
+                    "lane4": "0x89",
+                    "lane5": "0x8d",
+                    "lane6": "0x89",
+                    "lane7": "0x8d"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffffb"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x3",
+                    "lane2": "0x2",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x3"
+                }
+            },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x89",
+                    "lane1": "0x8d",
+                    "lane2": "0x8d",
+                    "lane3": "0x8d",
+                    "lane4": "0x89",
+                    "lane5": "0x8d",
+                    "lane6": "0x89",
+                    "lane7": "0x8d"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffffb"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x3",
+                    "lane2": "0x2",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x3"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x89",
+                    "lane1": "0x8d",
+                    "lane2": "0x8d",
+                    "lane3": "0x8d",
+                    "lane4": "0x89",
+                    "lane5": "0x8d",
+                    "lane6": "0x89",
+                    "lane7": "0x8d"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffffb"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x3",
+                    "lane2": "0x2",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x3"
+                }
+            },
+            "Default": {
+                "main": {
+                    "lane0": "0x4b",
+                    "lane1": "0x59",
+                    "lane2": "0x59",
+                    "lane3": "0x4b"
+                },
+                "post1": {
+                    "lane0": "0xffffffeb",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffeb"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffffc"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                }
+            }
+        },
+        "19": {
+            "QSFP-DD-sm_media_interface": {
+                "main": {
+                    "lane0": "0x89",
+                    "lane1": "0x8d",
+                    "lane2": "0x90",
+                    "lane3": "0x90",
+                    "lane4": "0x89",
+                    "lane5": "0x8d",
+                    "lane6": "0x89",
+                    "lane7": "0x8d"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffffb"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xffffffef",
+                    "lane3": "0xffffffef",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x3",
+                    "lane2": "0x2",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x3"
+                }
+            },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x89",
+                    "lane1": "0x8d",
+                    "lane2": "0x90",
+                    "lane3": "0x90",
+                    "lane4": "0x89",
+                    "lane5": "0x8d",
+                    "lane6": "0x89",
+                    "lane7": "0x8d"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffffb"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xffffffef",
+                    "lane3": "0xffffffef",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x3",
+                    "lane2": "0x2",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x3"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x89",
+                    "lane1": "0x8d",
+                    "lane2": "0x90",
+                    "lane3": "0x90",
+                    "lane4": "0x89",
+                    "lane5": "0x8d",
+                    "lane6": "0x89",
+                    "lane7": "0x8d"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffffb"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xffffffef",
+                    "lane3": "0xffffffef",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x3",
+                    "lane2": "0x2",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x3"
+                }
+            },
+            "Default": {
+                "main": {
+                    "lane0": "0x55",
+                    "lane1": "0x55",
+                    "lane2": "0x50",
+                    "lane3": "0x50"
+                },
+                "post1": {
+                    "lane0": "0xffffffe7",
+                    "lane1": "0xffffffe7",
+                    "lane2": "0xffffffe9",
+                    "lane3": "0xffffffe9"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                }
+            }
+        },
+        "20": {
+            "QSFP-DD-sm_media_interface": {
+                "main": {
+                    "lane0": "0x8d",
+                    "lane1": "0x8d",
+                    "lane2": "0x89",
+                    "lane3": "0x8d",
+                    "lane4": "0x8d",
+                    "lane5": "0x89",
+                    "lane6": "0x8d",
+                    "lane7": "0x8d"
+                },
+                "post1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff1",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff1"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x8d",
+                    "lane1": "0x8d",
+                    "lane2": "0x89",
+                    "lane3": "0x8d",
+                    "lane4": "0x8d",
+                    "lane5": "0x89",
+                    "lane6": "0x8d",
+                    "lane7": "0x8d"
+                },
+                "post1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff1",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff1"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x8d",
+                    "lane1": "0x8d",
+                    "lane2": "0x89",
+                    "lane3": "0x8d",
+                    "lane4": "0x8d",
+                    "lane5": "0x89",
+                    "lane6": "0x8d",
+                    "lane7": "0x8d"
+                },
+                "post1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff1",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff1"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "Default": {
+                "main": {
+                    "lane0": "0x4b",
+                    "lane1": "0x4b",
+                    "lane2": "0x4e",
+                    "lane3": "0x4e"
+                },
+                "post1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffea",
+                    "lane3": "0xffffffea"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                }
+            }
+        },
+        "21": {
+            "QSFP-DD-sm_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8b",
+                    "lane4": "0x94",
+                    "lane5": "0x88",
+                    "lane6": "0x8b",
+                    "lane7": "0x89"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8b",
+                    "lane4": "0x94",
+                    "lane5": "0x88",
+                    "lane6": "0x8b",
+                    "lane7": "0x89"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8b",
+                    "lane4": "0x94",
+                    "lane5": "0x88",
+                    "lane6": "0x8b",
+                    "lane7": "0x89"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "Default": {
+                "main": {
+                    "lane0": "0x50",
+                    "lane1": "0x50",
+                    "lane2": "0x55",
+                    "lane3": "0x55"
+                },
+                "post1": {
+                    "lane0": "0xffffffe9",
+                    "lane1": "0xffffffe9",
+                    "lane2": "0xffffffe7",
+                    "lane3": "0xffffffe7"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffb",
                     "lane1": "0xfffffffb",
-                    "lane2": "0xfffffffa",
-                    "lane3": "0xfffffffa"
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                }
+            }
+        },
+        "22": {
+            "QSFP-DD-sm_media_interface": {
+                "main": {
+                    "lane0": "0x89",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x88",
+                    "lane4": "0x94",
+                    "lane5": "0x8b",
+                    "lane6": "0x8b",
+                    "lane7": "0x88"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x89",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x88",
+                    "lane4": "0x94",
+                    "lane5": "0x8b",
+                    "lane6": "0x8b",
+                    "lane7": "0x88"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x89",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x88",
+                    "lane4": "0x94",
+                    "lane5": "0x8b",
+                    "lane6": "0x8b",
+                    "lane7": "0x88"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "Default": {
+                "main": {
+                    "lane0": "0x59",
+                    "lane1": "0x59",
+                    "lane2": "0x59",
+                    "lane3": "0x59"
+                },
+                "post1": {
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -1734,81 +4972,205 @@
                 }
             }
         },
-        "18": {
+        "23": {
             "QSFP-DD-sm_media_interface": {
                 "main": {
-                    "lane0": "0x89",
-                    "lane1": "0x8d",
-                    "lane2": "0x8d",
-                    "lane3": "0x8d",
-                    "lane4": "0x89",
-                    "lane5": "0x8d",
-                    "lane6": "0x89",
-                    "lane7": "0x8d"
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x88",
+                    "lane3": "0x8b",
+                    "lane4": "0x88",
+                    "lane5": "0x8b",
+                    "lane6": "0x88",
+                    "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "0xfffffff4",
-                    "lane1": "0xfffffffb",
-                    "lane2": "0xfffffff8",
-                    "lane3": "0xfffffff8",
-                    "lane4": "0xfffffff4",
-                    "lane5": "0xfffffffb",
-                    "lane6": "0xfffffff4",
-                    "lane7": "0xfffffffb"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x88",
+                    "lane3": "0x8b",
+                    "lane4": "0x88",
+                    "lane5": "0x8b",
+                    "lane6": "0x88",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x88",
+                    "lane3": "0x8b",
+                    "lane4": "0x88",
+                    "lane5": "0x8b",
+                    "lane6": "0x88",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
-                    "lane1": "0xfffffffe",
-                    "lane2": "0xfffffffd",
-                    "lane3": "0xfffffffd",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
                     "lane5": "0xfffffffe",
                     "lane6": "0x0",
-                    "lane7": "0xfffffffe"
+                    "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "0xfffffffd",
-                    "lane1": "0xfffffffd",
-                    "lane2": "0xffffffff",
-                    "lane3": "0xffffffff",
-                    "lane4": "0xfffffffd",
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
                     "lane5": "0xfffffffd",
-                    "lane6": "0xfffffffd",
-                    "lane7": "0xfffffffd"
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
                     "lane0": "0xfffffff0",
                     "lane1": "0xfffffff0",
-                    "lane2": "0xfffffff1",
-                    "lane3": "0xfffffff1",
-                    "lane4": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
                     "lane5": "0xfffffff0",
-                    "lane6": "0xfffffff0",
+                    "lane6": "0xfffffff2",
                     "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
-                    "lane1": "0x3",
+                    "lane1": "0x2",
                     "lane2": "0x2",
-                    "lane3": "0x2",
+                    "lane3": "0x3",
                     "lane4": "0x2",
                     "lane5": "0x3",
                     "lane6": "0x2",
-                    "lane7": "0x3"
+                    "lane7": "0x2"
                 }
             },
             "Default": {
                 "main": {
-                    "lane0": "0x4b",
+                    "lane0": "0x59",
                     "lane1": "0x59",
                     "lane2": "0x59",
-                    "lane3": "0x4b"
+                    "lane3": "0x59"
                 },
                 "post1": {
-                    "lane0": "0xffffffeb",
+                    "lane0": "0xffffffe3",
                     "lane1": "0xffffffe3",
                     "lane2": "0xffffffe3",
-                    "lane3": "0xffffffeb"
+                    "lane3": "0xffffffe3"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -1823,10 +5185,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "0xfffffffc",
+                    "lane0": "0xfffffff8",
                     "lane1": "0xfffffff8",
                     "lane2": "0xfffffff8",
-                    "lane3": "0xfffffffc"
+                    "lane3": "0xfffffff8"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -1836,164 +5198,186 @@
                 }
             }
         },
-        "19": {
+        "24": {
             "QSFP-DD-sm_media_interface": {
                 "main": {
-                    "lane0": "0x89",
-                    "lane1": "0x8d",
-                    "lane2": "0x90",
-                    "lane3": "0x90",
-                    "lane4": "0x89",
-                    "lane5": "0x8d",
-                    "lane6": "0x89",
-                    "lane7": "0x8d"
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8b",
+                    "lane4": "0x94",
+                    "lane5": "0x88",
+                    "lane6": "0x8b",
+                    "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "0xfffffff4",
-                    "lane1": "0xfffffffb",
-                    "lane2": "0xffffffff",
-                    "lane3": "0xffffffff",
-                    "lane4": "0xfffffff4",
-                    "lane5": "0xfffffffb",
-                    "lane6": "0xfffffff4",
-                    "lane7": "0xfffffffb"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
-                    "lane1": "0xfffffffe",
-                    "lane2": "0xfffffffd",
-                    "lane3": "0xfffffffd",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "0xfffffffe",
-                    "lane6": "0x0",
-                    "lane7": "0xfffffffe"
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "0xfffffffd",
-                    "lane1": "0xfffffffd",
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
                     "lane2": "0xfffffffd",
                     "lane3": "0xfffffffd",
-                    "lane4": "0xfffffffd",
-                    "lane5": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
                     "lane6": "0xfffffffd",
-                    "lane7": "0xfffffffd"
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
                     "lane0": "0xfffffff0",
-                    "lane1": "0xfffffff0",
-                    "lane2": "0xffffffef",
-                    "lane3": "0xffffffef",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
                     "lane4": "0xfffffff0",
-                    "lane5": "0xfffffff0",
+                    "lane5": "0xfffffff2",
                     "lane6": "0xfffffff0",
                     "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
-                    "lane1": "0x3",
-                    "lane2": "0x2",
-                    "lane3": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
                     "lane4": "0x2",
-                    "lane5": "0x3",
-                    "lane6": "0x2",
-                    "lane7": "0x3"
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
                 }
             },
-            "Default": {
+            "QSFP-DD-nm_850_media_interface": {
                 "main": {
-                    "lane0": "0x55",
-                    "lane1": "0x55",
-                    "lane2": "0x50",
-                    "lane3": "0x50"
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8b",
+                    "lane4": "0x94",
+                    "lane5": "0x88",
+                    "lane6": "0x8b",
+                    "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "0xffffffe7",
-                    "lane1": "0xffffffe7",
-                    "lane2": "0xffffffe9",
-                    "lane3": "0xffffffe9"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff9",
-                    "lane1": "0xfffffff9",
-                    "lane2": "0xfffffffb",
-                    "lane3": "0xfffffffb"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
                 }
-            }
-        },
-        "20": {
-            "QSFP-DD-sm_media_interface": {
+            },
+            "QSFP-DD-active_cable_media_interface": {
                 "main": {
-                    "lane0": "0x8d",
-                    "lane1": "0x8d",
-                    "lane2": "0x89",
-                    "lane3": "0x8d",
-                    "lane4": "0x8d",
-                    "lane5": "0x89",
-                    "lane6": "0x8d",
-                    "lane7": "0x8d"
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8b",
+                    "lane4": "0x94",
+                    "lane5": "0x88",
+                    "lane6": "0x8b",
+                    "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "0xfffffffb",
-                    "lane1": "0xfffffff8",
-                    "lane2": "0xfffffff4",
-                    "lane3": "0xfffffffb",
-                    "lane4": "0xfffffff8",
-                    "lane5": "0xfffffff4",
-                    "lane6": "0xfffffffb",
-                    "lane7": "0xfffffff8"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
-                    "lane0": "0xfffffffe",
-                    "lane1": "0xfffffffd",
-                    "lane2": "0x0",
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
                     "lane3": "0xfffffffe",
-                    "lane4": "0xfffffffd",
+                    "lane4": "0x0",
                     "lane5": "0x0",
                     "lane6": "0xfffffffe",
-                    "lane7": "0xfffffffd"
+                    "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "0xfffffffd",
-                    "lane1": "0xffffffff",
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
                     "lane2": "0xfffffffd",
                     "lane3": "0xfffffffd",
                     "lane4": "0xffffffff",
-                    "lane5": "0xfffffffd",
+                    "lane5": "0xfffffffc",
                     "lane6": "0xfffffffd",
                     "lane7": "0xffffffff"
                 },
                 "pre1": {
                     "lane0": "0xfffffff0",
-                    "lane1": "0xfffffff1",
+                    "lane1": "0xfffffff2",
                     "lane2": "0xfffffff0",
                     "lane3": "0xfffffff0",
-                    "lane4": "0xfffffff1",
-                    "lane5": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
                     "lane6": "0xfffffff0",
-                    "lane7": "0xfffffff1"
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
-                    "lane0": "0x3",
+                    "lane0": "0x2",
                     "lane1": "0x2",
-                    "lane2": "0x2",
+                    "lane2": "0x3",
                     "lane3": "0x3",
                     "lane4": "0x2",
                     "lane5": "0x2",
@@ -2003,16 +5387,16 @@
             },
             "Default": {
                 "main": {
-                    "lane0": "0x4b",
-                    "lane1": "0x4b",
-                    "lane2": "0x4e",
-                    "lane3": "0x4e"
+                    "lane0": "0x59",
+                    "lane1": "0x59",
+                    "lane2": "0x59",
+                    "lane3": "0x59"
                 },
                 "post1": {
-                    "lane0": "0xffffffec",
-                    "lane1": "0xffffffec",
-                    "lane2": "0xffffffea",
-                    "lane3": "0xffffffea"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -2027,10 +5411,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "0xfffffffb",
-                    "lane1": "0xfffffffb",
-                    "lane2": "0xfffffffb",
-                    "lane3": "0xfffffffb"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -2040,35 +5424,35 @@
                 }
             }
         },
-        "21": {
+        "25": {
             "QSFP-DD-sm_media_interface": {
                 "main": {
                     "lane0": "0x94",
                     "lane1": "0x88",
                     "lane2": "0x8b",
-                    "lane3": "0x8b",
+                    "lane3": "0x88",
                     "lane4": "0x94",
-                    "lane5": "0x88",
+                    "lane5": "0x8b",
                     "lane6": "0x8b",
-                    "lane7": "0x89"
+                    "lane7": "0x88"
                 },
                 "post1": {
                     "lane0": "0xfffffffd",
                     "lane1": "0xfffffff2",
                     "lane2": "0xfffffff9",
-                    "lane3": "0xfffffff9",
+                    "lane3": "0xfffffff2",
                     "lane4": "0xfffffffd",
-                    "lane5": "0xfffffff2",
+                    "lane5": "0xfffffff9",
                     "lane6": "0xfffffff9",
-                    "lane7": "0xfffffff4"
+                    "lane7": "0xfffffff2"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
                     "lane2": "0xfffffffe",
-                    "lane3": "0xfffffffe",
+                    "lane3": "0x0",
                     "lane4": "0x0",
-                    "lane5": "0x0",
+                    "lane5": "0xfffffffe",
                     "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
@@ -2076,76 +5460,98 @@
                     "lane0": "0xffffffff",
                     "lane1": "0xfffffffc",
                     "lane2": "0xfffffffd",
-                    "lane3": "0xfffffffd",
+                    "lane3": "0xfffffffc",
                     "lane4": "0xffffffff",
-                    "lane5": "0xfffffffc",
+                    "lane5": "0xfffffffd",
                     "lane6": "0xfffffffd",
-                    "lane7": "0xfffffffd"
+                    "lane7": "0xfffffffc"
                 },
                 "pre1": {
                     "lane0": "0xfffffff0",
                     "lane1": "0xfffffff2",
                     "lane2": "0xfffffff0",
-                    "lane3": "0xfffffff0",
+                    "lane3": "0xfffffff2",
                     "lane4": "0xfffffff0",
-                    "lane5": "0xfffffff2",
+                    "lane5": "0xfffffff0",
                     "lane6": "0xfffffff0",
-                    "lane7": "0xfffffff0"
+                    "lane7": "0xfffffff2"
                 },
                 "pre2": {
                     "lane0": "0x2",
                     "lane1": "0x2",
                     "lane2": "0x3",
-                    "lane3": "0x3",
+                    "lane3": "0x2",
                     "lane4": "0x2",
-                    "lane5": "0x2",
+                    "lane5": "0x3",
                     "lane6": "0x3",
                     "lane7": "0x2"
                 }
             },
-            "Default": {
+            "QSFP-DD-nm_850_media_interface": {
                 "main": {
-                    "lane0": "0x50",
-                    "lane1": "0x50",
-                    "lane2": "0x55",
-                    "lane3": "0x55"
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x88",
+                    "lane4": "0x94",
+                    "lane5": "0x8b",
+                    "lane6": "0x8b",
+                    "lane7": "0x88"
                 },
                 "post1": {
-                    "lane0": "0xffffffe9",
-                    "lane1": "0xffffffe9",
-                    "lane2": "0xffffffe7",
-                    "lane3": "0xffffffe7"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
+                    "lane2": "0xfffffffe",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
                 },
                 "pre1": {
-                    "lane0": "0xfffffffb",
-                    "lane1": "0xfffffffb",
-                    "lane2": "0xfffffff9",
-                    "lane3": "0xfffffff9"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
                 },
                 "pre2": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
                 }
-            }
-        },
-        "22": {
-            "QSFP-DD-sm_media_interface": {
+            },
+            "QSFP-DD-active_cable_media_interface": {
                 "main": {
-                    "lane0": "0x89",
+                    "lane0": "0x94",
                     "lane1": "0x88",
                     "lane2": "0x8b",
                     "lane3": "0x88",
@@ -2155,7 +5561,7 @@
                     "lane7": "0x88"
                 },
                 "post1": {
-                    "lane0": "0xfffffff4",
+                    "lane0": "0xfffffffd",
                     "lane1": "0xfffffff2",
                     "lane2": "0xfffffff9",
                     "lane3": "0xfffffff2",
@@ -2175,7 +5581,7 @@
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "0xfffffffd",
+                    "lane0": "0xffffffff",
                     "lane1": "0xfffffffc",
                     "lane2": "0xfffffffd",
                     "lane3": "0xfffffffc",
@@ -2237,15 +5643,139 @@
                     "lane3": "0xfffffff8"
                 },
                 "pre2": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                }
+            }
+        },
+        "26": {
+            "QSFP-DD-sm_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x88",
+                    "lane3": "0x8b",
+                    "lane4": "0x88",
+                    "lane5": "0x8b",
+                    "lane6": "0x88",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x88",
+                    "lane3": "0x8b",
+                    "lane4": "0x88",
+                    "lane5": "0x8b",
+                    "lane6": "0x88",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x2"
                 }
-            }
-        },
-        "23": {
-            "QSFP-DD-sm_media_interface": {
+            },
+            "QSFP-DD-active_cable_media_interface": {
                 "main": {
                     "lane0": "0x94",
                     "lane1": "0x94",
@@ -2346,7 +5876,7 @@
                 }
             }
         },
-        "24": {
+        "27": {
             "QSFP-DD-sm_media_interface": {
                 "main": {
                     "lane0": "0x94",
@@ -2409,74 +5939,34 @@
                     "lane7": "0x2"
                 }
             },
-            "Default": {
-                "main": {
-                    "lane0": "0x59",
-                    "lane1": "0x59",
-                    "lane2": "0x59",
-                    "lane3": "0x59"
-                },
-                "post1": {
-                    "lane0": "0xffffffe3",
-                    "lane1": "0xffffffe3",
-                    "lane2": "0xffffffe3",
-                    "lane3": "0xffffffe3"
-                },
-                "post2": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
-                },
-                "post3": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
-                },
-                "pre1": {
-                    "lane0": "0xfffffff8",
-                    "lane1": "0xfffffff8",
-                    "lane2": "0xfffffff8",
-                    "lane3": "0xfffffff8"
-                },
-                "pre2": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
-                }
-            }
-        },
-        "25": {
-            "QSFP-DD-sm_media_interface": {
+            "QSFP-DD-nm_850_media_interface": {
                 "main": {
                     "lane0": "0x94",
                     "lane1": "0x88",
                     "lane2": "0x8b",
-                    "lane3": "0x88",
+                    "lane3": "0x8b",
                     "lane4": "0x94",
-                    "lane5": "0x8b",
+                    "lane5": "0x88",
                     "lane6": "0x8b",
-                    "lane7": "0x88"
+                    "lane7": "0x94"
                 },
                 "post1": {
                     "lane0": "0xfffffffd",
                     "lane1": "0xfffffff2",
                     "lane2": "0xfffffff9",
-                    "lane3": "0xfffffff2",
+                    "lane3": "0xfffffff9",
                     "lane4": "0xfffffffd",
-                    "lane5": "0xfffffff9",
+                    "lane5": "0xfffffff2",
                     "lane6": "0xfffffff9",
-                    "lane7": "0xfffffff2"
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
                     "lane2": "0xfffffffe",
-                    "lane3": "0x0",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "0xfffffffe",
+                    "lane5": "0x0",
                     "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
@@ -2484,132 +5974,92 @@
                     "lane0": "0xffffffff",
                     "lane1": "0xfffffffc",
                     "lane2": "0xfffffffd",
-                    "lane3": "0xfffffffc",
+                    "lane3": "0xfffffffd",
                     "lane4": "0xffffffff",
-                    "lane5": "0xfffffffd",
+                    "lane5": "0xfffffffc",
                     "lane6": "0xfffffffd",
-                    "lane7": "0xfffffffc"
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
                     "lane0": "0xfffffff0",
                     "lane1": "0xfffffff2",
                     "lane2": "0xfffffff0",
-                    "lane3": "0xfffffff2",
+                    "lane3": "0xfffffff0",
                     "lane4": "0xfffffff0",
-                    "lane5": "0xfffffff0",
+                    "lane5": "0xfffffff2",
                     "lane6": "0xfffffff0",
-                    "lane7": "0xfffffff2"
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
                     "lane1": "0x2",
                     "lane2": "0x3",
-                    "lane3": "0x2",
+                    "lane3": "0x3",
                     "lane4": "0x2",
-                    "lane5": "0x3",
+                    "lane5": "0x2",
                     "lane6": "0x3",
                     "lane7": "0x2"
                 }
             },
-            "Default": {
-                "main": {
-                    "lane0": "0x59",
-                    "lane1": "0x59",
-                    "lane2": "0x59",
-                    "lane3": "0x59"
-                },
-                "post1": {
-                    "lane0": "0xffffffe3",
-                    "lane1": "0xffffffe3",
-                    "lane2": "0xffffffe3",
-                    "lane3": "0xffffffe3"
-                },
-                "post2": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
-                },
-                "post3": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
-                },
-                "pre1": {
-                    "lane0": "0xfffffff8",
-                    "lane1": "0xfffffff8",
-                    "lane2": "0xfffffff8",
-                    "lane3": "0xfffffff8"
-                },
-                "pre2": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
-                }
-            }
-        },
-        "26": {
-            "QSFP-DD-sm_media_interface": {
+            "QSFP-DD-active_cable_media_interface": {
                 "main": {
                     "lane0": "0x94",
-                    "lane1": "0x94",
-                    "lane2": "0x88",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
                     "lane3": "0x8b",
-                    "lane4": "0x88",
-                    "lane5": "0x8b",
-                    "lane6": "0x88",
+                    "lane4": "0x94",
+                    "lane5": "0x88",
+                    "lane6": "0x8b",
                     "lane7": "0x94"
                 },
                 "post1": {
                     "lane0": "0xfffffffd",
-                    "lane1": "0xfffffffd",
-                    "lane2": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
                     "lane3": "0xfffffff9",
-                    "lane4": "0xfffffff2",
-                    "lane5": "0xfffffff9",
-                    "lane6": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
                     "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "0x0",
+                    "lane2": "0xfffffffe",
                     "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "0xfffffffe",
-                    "lane6": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
                 },
                 "post3": {
                     "lane0": "0xffffffff",
-                    "lane1": "0xffffffff",
-                    "lane2": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
                     "lane3": "0xfffffffd",
-                    "lane4": "0xfffffffc",
-                    "lane5": "0xfffffffd",
-                    "lane6": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
                     "lane7": "0xffffffff"
                 },
                 "pre1": {
                     "lane0": "0xfffffff0",
-                    "lane1": "0xfffffff0",
-                    "lane2": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
                     "lane3": "0xfffffff0",
-                    "lane4": "0xfffffff2",
-                    "lane5": "0xfffffff0",
-                    "lane6": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
                     "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
                     "lane1": "0x2",
-                    "lane2": "0x2",
+                    "lane2": "0x3",
                     "lane3": "0x3",
                     "lane4": "0x2",
-                    "lane5": "0x3",
-                    "lane6": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
                     "lane7": "0x2"
                 }
             },
@@ -2652,7 +6102,7 @@
                 }
             }
         },
-        "27": {
+        "28": {
             "QSFP-DD-sm_media_interface": {
                 "main": {
                     "lane0": "0x94",
@@ -2715,47 +6165,69 @@
                     "lane7": "0x2"
                 }
             },
-            "Default": {
+            "QSFP-DD-nm_850_media_interface": {
                 "main": {
-                    "lane0": "0x59",
-                    "lane1": "0x59",
-                    "lane2": "0x59",
-                    "lane3": "0x59"
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8b",
+                    "lane4": "0x94",
+                    "lane5": "0x88",
+                    "lane6": "0x8b",
+                    "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "0xffffffe3",
-                    "lane1": "0xffffffe3",
-                    "lane2": "0xffffffe3",
-                    "lane3": "0xffffffe3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
                 },
                 "pre1": {
-                    "lane0": "0xfffffff8",
-                    "lane1": "0xfffffff8",
-                    "lane2": "0xfffffff8",
-                    "lane3": "0xfffffff8"
-                },
-                "pre2": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
                 }
-            }
-        },
-        "28": {
-            "QSFP-DD-sm_media_interface": {
+            },
+            "QSFP-DD-active_cable_media_interface": {
                 "main": {
                     "lane0": "0x94",
                     "lane1": "0x88",
@@ -2919,6 +6391,130 @@
                     "lane7": "0x2"
                 }
             },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x88",
+                    "lane3": "0x8b",
+                    "lane4": "0x88",
+                    "lane5": "0x8b",
+                    "lane6": "0x88",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x88",
+                    "lane3": "0x8b",
+                    "lane4": "0x88",
+                    "lane5": "0x8b",
+                    "lane6": "0x88",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x2"
+                }
+            },
             "Default": {
                 "main": {
                     "lane0": "0x4b",
@@ -2951,15 +6547,139 @@
                     "lane3": "0xfffffff8"
                 },
                 "pre2": {
-                    "lane0": "0x0",
-                    "lane1": "0x0",
-                    "lane2": "0x0",
-                    "lane3": "0x0"
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0"
+                }
+            }
+        },
+        "30": {
+            "QSFP-DD-sm_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x88",
+                    "lane4": "0x94",
+                    "lane5": "0x8b",
+                    "lane6": "0x8b",
+                    "lane7": "0x88"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x88",
+                    "lane4": "0x94",
+                    "lane5": "0x8b",
+                    "lane6": "0x8b",
+                    "lane7": "0x88"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
                 }
-            }
-        },
-        "30": {
-            "QSFP-DD-sm_media_interface": {
+            },
+            "QSFP-DD-active_cable_media_interface": {
                 "main": {
                     "lane0": "0x94",
                     "lane1": "0x88",
@@ -3123,6 +6843,130 @@
                     "lane7": "0x2"
                 }
             },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8b",
+                    "lane4": "0x94",
+                    "lane5": "0x88",
+                    "lane6": "0x8b",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8b",
+                    "lane4": "0x94",
+                    "lane5": "0x88",
+                    "lane6": "0x8b",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
             "Default": {
                 "main": {
                     "lane0": "0x4e",
@@ -3160,10 +7004,134 @@
                     "lane2": "0x0",
                     "lane3": "0x0"
                 }
-            }
-        },
-        "32": {
-            "QSFP-DD-sm_media_interface": {
+            }
+        },
+        "32": {
+            "QSFP-DD-sm_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x88",
+                    "lane3": "0x8b",
+                    "lane4": "0x88",
+                    "lane5": "0x8b",
+                    "lane6": "0x88",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x94",
+                    "lane2": "0x88",
+                    "lane3": "0x8b",
+                    "lane4": "0x88",
+                    "lane5": "0x8b",
+                    "lane6": "0x88",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
                 "main": {
                     "lane0": "0x94",
                     "lane1": "0x94",
@@ -3327,6 +7295,130 @@
                     "lane7": "0x2"
                 }
             },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x88",
+                    "lane4": "0x94",
+                    "lane5": "0x8b",
+                    "lane6": "0x8b",
+                    "lane7": "0x88"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x94",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x88",
+                    "lane4": "0x94",
+                    "lane5": "0x8b",
+                    "lane6": "0x8b",
+                    "lane7": "0x88"
+                },
+                "post1": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
             "Default": {
                 "main": {
                     "lane0": "0x4e",
@@ -3364,10 +7456,134 @@
                     "lane2": "0x0",
                     "lane3": "0x0"
                 }
-            }
-        },
-        "34": {
-            "QSFP-DD-sm_media_interface": {
+            }
+        },
+        "34": {
+            "QSFP-DD-sm_media_interface": {
+                "main": {
+                    "lane0": "0x89",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8d",
+                    "lane4": "0x94",
+                    "lane5": "0x8d",
+                    "lane6": "0x81",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffff1",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xffffffee",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x89",
+                    "lane1": "0x88",
+                    "lane2": "0x8b",
+                    "lane3": "0x8d",
+                    "lane4": "0x94",
+                    "lane5": "0x8d",
+                    "lane6": "0x81",
+                    "lane7": "0x94"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffff1",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xffffffee",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
                 "main": {
                     "lane0": "0x89",
                     "lane1": "0x88",
@@ -3531,6 +7747,130 @@
                     "lane7": "0x2"
                 }
             },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x8d",
+                    "lane1": "0x90",
+                    "lane2": "0x89",
+                    "lane3": "0x8d",
+                    "lane4": "0x90",
+                    "lane5": "0x89",
+                    "lane6": "0x8d",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xffffffff"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xffffffef",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xffffffef",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xffffffef"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x8d",
+                    "lane1": "0x90",
+                    "lane2": "0x89",
+                    "lane3": "0x8d",
+                    "lane4": "0x90",
+                    "lane5": "0x89",
+                    "lane6": "0x8d",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xffffffff"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xffffffef",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xffffffef",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xffffffef"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x3",
+                    "lane7": "0x2"
+                }
+            },
             "Default": {
                 "main": {
                     "lane0": "0x4b",
@@ -3633,6 +7973,130 @@
                     "lane7": "0x3"
                 }
             },
+            "QSFP-DD-nm_850_media_interface": {
+                "main": {
+                    "lane0": "0x89",
+                    "lane1": "0x8d",
+                    "lane2": "0x8d",
+                    "lane3": "0x8d",
+                    "lane4": "0x89",
+                    "lane5": "0x8d",
+                    "lane6": "0x89",
+                    "lane7": "0x8d"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffffb"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x3",
+                    "lane2": "0x2",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x3"
+                }
+            },
+            "QSFP-DD-active_cable_media_interface": {
+                "main": {
+                    "lane0": "0x89",
+                    "lane1": "0x8d",
+                    "lane2": "0x8d",
+                    "lane3": "0x8d",
+                    "lane4": "0x89",
+                    "lane5": "0x8d",
+                    "lane6": "0x89",
+                    "lane7": "0x8d"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffffb"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0x0",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x3",
+                    "lane2": "0x2",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x3"
+                }
+            },
             "Default": {
                 "main": {
                     "lane0": "0x50",

From 35d2ba4783ec80bec3e1f21bc2179aeb4f106644 Mon Sep 17 00:00:00 2001
From: Aaron Payment <aaronpayment@users.noreply.github.com>
Date: Thu, 14 Nov 2024 21:58:13 -0800
Subject: [PATCH 209/364] sonic-buildimage: Remove disable-pcie-firmware-check
 brcm config on PikeZ (#20619)

Remove the check as the platform is strapped to load the pcie firmware
and we should be able to keep the SDK check to ack the firmware was
loaded instead of skipping the verification.

Signed-off-by: Aaron Payment <aaronp@arista.com>
---
 .../x86_64-arista_720dt_48s/td3x2-a720dt-48s-flex.config.bcm     | 1 -
 1 file changed, 1 deletion(-)

diff --git a/device/arista/x86_64-arista_720dt_48s/td3x2-a720dt-48s-flex.config.bcm b/device/arista/x86_64-arista_720dt_48s/td3x2-a720dt-48s-flex.config.bcm
index 5c49982b9631..0c29388a6f06 100644
--- a/device/arista/x86_64-arista_720dt_48s/td3x2-a720dt-48s-flex.config.bcm
+++ b/device/arista/x86_64-arista_720dt_48s/td3x2-a720dt-48s-flex.config.bcm
@@ -5,7 +5,6 @@ bcm_num_cos.0=9
 bcm_stat_flags=1
 bcm_stat_jumbo.0=9236
 cdma_timeout_usec.0=15000000
-disable_pcie_firmware_check.0=1
 dma_desc_timeout_usec.0=15000000
 fpem_mem_entries.0=0
 higig2_hdr_mode.0=1

From f7ba2c2d0590940aaf2d4360ed895ebdac425378 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 15 Nov 2024 19:03:22 +0800
Subject: [PATCH 210/364] [submodule] Update submodule sonic-platform-common to
 the latest HEAD automatically (#20813)

#### Why I did it
src/sonic-platform-common
```
* 9fc9c85 - (HEAD -> master, origin/master, origin/HEAD) Add diagnostic monitoring APIs for DOM, VDM and status access for CMIS modules (#515) (2 hours ago) [mihirpat1]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index bad49e295d72..9fc9c855e230 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit bad49e295d72ca749e6cfde299ed73d9e5302bbe
+Subproject commit 9fc9c855e230098ad24791b5368574357a8711ab

From 2c8172d45e1c3b8f873183b60af4313466b050e3 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 15 Nov 2024 19:03:27 +0800
Subject: [PATCH 211/364] [submodule] Update submodule sonic-bmp to the latest
 HEAD automatically (#20812)

#### Why I did it
src/sonic-bmp
```
* 8c4311d - (HEAD -> master, origin/master, origin/HEAD) Merge pull request #14 from FengPan-Frank/deb_change (3 hours ago) [Feng-msft]
* 298c07b - Merge branch 'deb_change' of https://github.com/FengPan-Frank/sonic-bmp into deb_change (4 hours ago) [Feng Pan]
|\
| failure_prs.log 906765d - test debian (15 hours ago) [Feng Pan]
* 857b751 - test debian (4 hours ago) [Feng Pan]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-bmp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-bmp b/src/sonic-bmp
index 6b5f200f2518..8c4311d054f9 160000
--- a/src/sonic-bmp
+++ b/src/sonic-bmp
@@ -1 +1 @@
-Subproject commit 6b5f200f25187dc448c60f99e64c214a9460208f
+Subproject commit 8c4311d054f9b7a9d8edb887546da153e3310034

From 5025dff79306232bf2ce6757cf84748119657cf8 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 15 Nov 2024 19:03:44 +0800
Subject: [PATCH 212/364] [submodule] Update submodule linkmgrd to the latest
 HEAD automatically (#20795)

#### Why I did it
src/linkmgrd
```
* f3fbf09 - (HEAD -> master, origin/master, origin/HEAD) [active-active] Fix extra toggle after default route N/A (#279) (2 days ago) [Longxiang Lyu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/linkmgrd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/linkmgrd b/src/linkmgrd
index 287dbd70298c..f3fbf091ae64 160000
--- a/src/linkmgrd
+++ b/src/linkmgrd
@@ -1 +1 @@
-Subproject commit 287dbd70298c1743668182913644d2bbe3cdcd5b
+Subproject commit f3fbf091ae644549675e68818f0dc8680483aff5

From df14fa81f24a7ae0aa292a32ee3673ab801eb396 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 15 Nov 2024 19:03:54 +0800
Subject: [PATCH 213/364] [submodule] Update submodule sonic-gnmi to the latest
 HEAD automatically (#20764)

#### Why I did it
src/sonic-gnmi
```
* 883d617 - (HEAD -> master, origin/master, origin/HEAD) Update dbus timeout to 10 minutes (#326) (3 days ago) [ganglv]
* e784b6f - Fix Wildcard entries to return empty data instead of invalid path (#299) (3 days ago) [Zain Budhwani]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index e8449250bec2..883d617a9338 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit e8449250bec233c81cf4b6aa324c26da7fea5732
+Subproject commit 883d617a9338fb10210990682116be13e96407c0

From 1177fc003b5c1f2ce93405451f7237b5d60ab655 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 15 Nov 2024 19:04:00 +0800
Subject: [PATCH 214/364] [submodule] Update submodule sonic-swss to the latest
 HEAD automatically (#20748)

#### Why I did it
src/sonic-swss
```
* f650a3bd - (HEAD -> master, origin/master, origin/HEAD) [ACL] Add support to match on Tunnel Termination (#3320) (2 days ago) [Vivek]
* 7db69c1b - VOQ: Set the ECMP group size to 128. (#3351) (3 days ago) [Deepak Singhal]
* 956ebd60 - Handler Port oper down error status notification (#3350) (6 days ago) [Prince George]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index ea3e76f7cf9a..f650a3bdbf30 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit ea3e76f7cf9af779c8a797391ede5482e0f610ea
+Subproject commit f650a3bdbf308c0718b9fa6714a9d7058e590584

From 174d7261bf97c60dfb2e7b516e74c53f330b9b53 Mon Sep 17 00:00:00 2001
From: Yubin-Li <yubin.lee@alibaba-inc.com>
Date: Sat, 16 Nov 2024 01:27:13 +0800
Subject: [PATCH 215/364] [frrcfgd]: add locator func to frrcfgd (#20330)

Signed-off-by: ysj17861081006 <1686637505@qq.com>
---
 .../frrcfgd/frrcfgd.py                        | 60 ++++++++++++++++++-
 1 file changed, 58 insertions(+), 2 deletions(-)

diff --git a/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py b/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py
index c2a9f0c142ad..bca005817371 100755
--- a/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py
+++ b/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py
@@ -118,6 +118,7 @@ class BgpdClientMgr(threading.Thread):
             'PIM_INTERFACE': ['pimd'],
             'IGMP_INTERFACE': ['pimd'],
             'IGMP_INTERFACE_QUERY': ['pimd'],
+            'SRV6_LOCATOR': ['zebra']
     }
     VTYSH_CMD_DAEMON = [(r'show (ip|ipv6) route($|\s+\S+)', ['zebra']),
                         (r'show ip mroute($|\s+\S+)', ['pimd']),
@@ -401,6 +402,47 @@ def get_command_cmn(daemon, cmd_str, op, st_idx, vals, bool_values):
         cmd_args.append(CommandArgument(daemon, cmd_enable, vals[idx]))
     return [cmd_str.format(*cmd_args, no = CommandArgument(daemon, cmd_enable))]
 
+def hdl_srv6_locator(daemon, cmd_str, op, st_idx, vals, bool_values):
+    chk_val = None
+    if op == CachedDataWithOp.OP_DELETE:
+        if bool_values is not None and len(bool_values) >= 3:
+            # set to default if given
+            cmd_enable = bool_values[2]
+        else:
+            cmd_enable = False
+    else:
+        cmd_enable = True
+        if bool_values is not None:
+            if len(vals) <= st_idx:
+                return None
+            chk_val = vals[st_idx]
+            if type(chk_val) is dict:
+                cmd_enable = False
+                for _, v in chk_val.items():
+                    if not v[1]:
+                        continue
+                    if v[0] == bool_values[0]:
+                        cmd_enable = True
+                        break
+            else:
+                if chk_val == bool_values[0]:
+                    cmd_enable = True
+                elif chk_val == bool_values[1]:
+                    cmd_enable = False
+                else:
+                    return None
+        else:
+            cmd_enable = True
+    cmd_list = []
+    for num in range(len(vals[0])):
+        cmd_args = []
+        for idx in range(len(vals)):
+            if bool_values is not None and idx == st_idx:
+                continue
+            cmd_args.append(CommandArgument(daemon, cmd_enable, vals[idx][num]))
+        cmd_list.append(cmd_str.format(*cmd_args, no = CommandArgument(daemon, cmd_enable)))
+    return cmd_list
+
 def hdl_set_extcomm(daemon, cmd_str, op, st_idx, args, is_inline):
     if is_inline:
         if type(args[0]) is list:
@@ -2036,6 +2078,7 @@ class BGPConfigDaemon:
                              ('icmo_ttl', 'ttl {}', handle_ip_sla_common),
                              ('icmp_tos', 'tos {}', handle_ip_sla_common),
                            ]
+    srv6_locator_key_map = [(['opcode_prefix', 'opcode_act', 'opcode_vrf'], '{no:no-prefix}opcode {} {} vrf {}', hdl_srv6_locator)]
 
 
     tbl_to_key_map = {'BGP_GLOBALS':                    global_key_map,
@@ -2065,7 +2108,8 @@ class BGPConfigDaemon:
                       'PIM_GLOBALS':                    pim_global_key_map,
                       'PIM_INTERFACE':                  pim_interface_key_map,
                       'IGMP_INTERFACE':                 igmp_mcast_grp_key_map,
-                      'IGMP_INTERFACE_QUERY':           igmp_interface_config_key_map
+                      'IGMP_INTERFACE_QUERY':           igmp_interface_config_key_map,
+                      'SRV6_LOCATOR':                   srv6_locator_key_map,
     }
 
     vrf_tables = {'BGP_GLOBALS', 'BGP_GLOBALS_AF',
@@ -2262,7 +2306,8 @@ def __init__(self):
             ('PIM_GLOBALS', self.bgp_table_handler_common),
             ('PIM_INTERFACE', self.bgp_table_handler_common),
             ('IGMP_INTERFACE', self.bgp_table_handler_common),
-            ('IGMP_INTERFACE_QUERY', self.bgp_table_handler_common)
+            ('IGMP_INTERFACE_QUERY', self.bgp_table_handler_common),
+            ('SRV6_LOCATOR', self.bgp_table_handler_common),
         ]
         self.bgp_message = queue.Queue(0)
         self.table_data_cache = self.config_db.get_table_data([tbl for tbl, _ in self.table_handler_list])
@@ -2650,6 +2695,17 @@ def __update_bgp(self, data_list):
                         self.bgp_confed_peers[vrf] = copy.copy(self.upd_confed_peers)
                 else:
                     self.__delete_vrf_asn(vrf, table, data)
+            elif table == 'SRV6_LOCATOR':
+                key = prefix
+                prefix = data['prefix']
+                cmd_prefix = ['configure terminal', 'segment-routing', 'srv6', 'locators', 
+                              'locator {}'.format(key), 
+                              'prefix {} block-len {} node-len {} func-bits {}'.format(prefix.data, data['block_len'].data, data['node_len'].data, data['func_len'].data)]
+                
+                if not key_map.run_command(self, table, data, cmd_prefix):
+                    syslog.syslog(syslog.LOG_ERR, 'failed running SRV6 LOCATOR config command')
+                    continue
+            
             elif table == 'BGP_GLOBALS_AF':
                 af, ip_type = key.lower().split('_')
                 #this is to temporarily make table cache key accessible to key_map handler function

From 37b0be474287697743273710d179f4dd84138bc0 Mon Sep 17 00:00:00 2001
From: Kebo Liu <kebol@nvidia.com>
Date: Sat, 16 Nov 2024 02:25:47 +0800
Subject: [PATCH 216/364] [Mellanox] Add a new reset cause for SN2201 platform
 (#20363)

Why I did it
Add a new reset cause "reset_aux_pwr_or_fu" which was added starting from kernel 5.19 for the SN2201 platform.

How I did it
Add a new reset cause "reset_aux_pwr_or_fu" in chassis.reboot_major_cause_dict.

How to verify it
Test the SN2201 platform by triggering a reboot through power-off and verify that the reboot cause is correctly recognized.

Signed-off-by: Kebo Liu <kebol@nvidia.com>
---
 platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
index cc140ac9935f..bb7eb6a43288 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
@@ -1,5 +1,6 @@
 #
-# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -955,6 +956,7 @@ def initialize_reboot_cause(self):
         self.reboot_major_cause_dict = {
             'reset_main_pwr_fail'       :   self.REBOOT_CAUSE_POWER_LOSS,
             'reset_aux_pwr_or_ref'      :   self.REBOOT_CAUSE_POWER_LOSS,
+            'reset_aux_pwr_or_fu'       :   self.REBOOT_CAUSE_POWER_LOSS,
             'reset_comex_pwr_fail'      :   self.REBOOT_CAUSE_POWER_LOSS,
             'reset_asic_thermal'        :   self.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC,
             'reset_comex_thermal'       :   self.REBOOT_CAUSE_THERMAL_OVERLOAD_CPU,

From bfedd7dfd4fc9734cbd35c39deb3ea3c338976c9 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 16 Nov 2024 19:01:30 +0800
Subject: [PATCH 217/364] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#20830)

#### Why I did it
src/sonic-sairedis
```
* 137b538e - (HEAD -> master, origin/master, origin/HEAD) Use a different letter to represent counter polling in sairedis.rec to avoid saiplayer crash (#1443) (19 hours ago) [Stephen Sun]
* 95b3b353 - Support SAI_QUEUE_ATTR_TYPE on vs platform simulating MLNX2700 (#1459) (20 hours ago) [Stephen Sun]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 866985fad6bc..137b538e4125 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 866985fad6bc4f7c7291c19d6655489695a313f3
+Subproject commit 137b538e412552ca090badc7470ee7cb1157b4f8

From 722c45bfb6dd56a0c9bd12e02c07ee8dea5926e6 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 16 Nov 2024 22:01:20 +0800
Subject: [PATCH 218/364] [submodule] Update submodule sonic-swss-common to the
 latest HEAD automatically (#20814)

#### Why I did it
src/sonic-swss-common
```
* 378e828 - (HEAD -> master, origin/master, origin/HEAD) C API: improve performance by not memcpy-ing string DB values across ffi boundary (#935) (2 days ago) [erer1243]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 11e4055ae3fc..378e82818165 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 11e4055ae3fcb8872253b5e9df7d75e74cbe6cd1
+Subproject commit 378e82818165d75aa2fdc66961e72c4852eae69b

From a167c67952b7252521696217e543322b9139ece0 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 17 Nov 2024 19:01:08 +0800
Subject: [PATCH 219/364] [submodule] Update submodule sonic-swss to the latest
 HEAD automatically (#20832)

#### Why I did it
src/sonic-swss
```
* 2e2d4e59 - (HEAD -> master, origin/master, origin/HEAD) [fpmsyncd]: Add support for SRv6 (#3123) (32 hours ago) [Carmine Scarpitta]
* e8d81b44 - [ci] Fix reportgenerator installation error #3369 (2 days ago) [Xin Wang]
* 52992e62 - [ci] Fix reportgenerator installation error (3 days ago) [Liu Shilong]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index f650a3bdbf30..2e2d4e59315c 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit f650a3bdbf308c0718b9fa6714a9d7058e590584
+Subproject commit 2e2d4e59315c377100e73fd07da378663ed74bd9

From 2f94443c68d8ffde1e54157f3f9f6ddfa267cd51 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 17 Nov 2024 19:01:18 +0800
Subject: [PATCH 220/364] [submodule] Update submodule sonic-mgmt-common to the
 latest HEAD automatically (#20828)

#### Why I did it
src/sonic-mgmt-common
```
* f33ab34 - (HEAD -> master, origin/master, origin/HEAD) Fix OnChange subscriptions for paths that depend on multiple fields (#150) (31 hours ago) [Lucas Rodriguez]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common
index b91a4df3bd0e..f33ab34df006 160000
--- a/src/sonic-mgmt-common
+++ b/src/sonic-mgmt-common
@@ -1 +1 @@
-Subproject commit b91a4df3bd0e4be97e67ab3f27b1826b1713afc5
+Subproject commit f33ab34df0061cabfddbe5d72bf18d148c868dfe

From 8b5166dcb08ae7904f267718a978f2a30b3358f2 Mon Sep 17 00:00:00 2001
From: abdosi <58047199+abdosi@users.noreply.github.com>
Date: Sun, 17 Nov 2024 18:59:23 -0800
Subject: [PATCH 221/364] Added package to compile and link yaml parser in C++
 (#20698)

* Added package to compile and link yaml parser in C++

* Update Dockerfile.j2

To compile and link changes done in PR: sonic-net/sonic-swss#3353
---------

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
---
 sonic-slave-bookworm/Dockerfile.j2 | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index 145ba7d0a0d9..e2fc37801217 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -117,6 +117,7 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install
         libswitch-perl \
         libzmq5 \
         libzmq3-dev \
+        libyaml-cpp-dev \
         uuid-dev \
         jq \
         cron \
@@ -752,4 +753,4 @@ RUN mkdir -p /.cargo && $RUST_ROOT/bin/rustup target add armv7-unknown-linux-gnu
 RUN mkdir -p /.cargo && $RUST_ROOT/bin/rustup target add aarch64-unknown-linux-gnu && echo "[target.aarch64-unknown-linux-gnu]\nlinker = \"aarch64-linux-gnu-gcc\"" >> /.cargo/config.toml
 {% endif -%}
 ENV RUSTUP_HOME $RUST_ROOT
-ENV PATH $PATH:$RUST_ROOT/bin
\ No newline at end of file
+ENV PATH $PATH:$RUST_ROOT/bin

From ba48f43526f10a046823236178038ffb099f3839 Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Mon, 18 Nov 2024 10:00:02 -0800
Subject: [PATCH 222/364] Revert "Ipmitool bookworm: Fix and patch
 enterprise-numbers URL (#17878)" (#20349)

The latest version of ipmitool in Debian has the enterprise-numbers.txt
file. Don't compile this package locally anymore.

This reverts commit 4753953ed01e65d1cb519f83e5cc4f1177b16ac4.
---
 build_debian.sh                               |   1 +
 .../build_templates/sonic_debian_extension.j2 |   4 -
 rules/ipmitool.dep                            |  11 --
 rules/ipmitool.mk                             |  17 ---
 slave.mk                                      |   1 -
 src/ipmitool/Makefile                         |  28 -----
 ...ges-needed-to-install-enterprise.txt.patch | 113 ------------------
 src/ipmitool/patch/series                     |   1 -
 8 files changed, 1 insertion(+), 175 deletions(-)
 delete mode 100644 rules/ipmitool.dep
 delete mode 100644 rules/ipmitool.mk
 delete mode 100644 src/ipmitool/Makefile
 delete mode 100644 src/ipmitool/patch/0001-Changes-needed-to-install-enterprise.txt.patch
 delete mode 100644 src/ipmitool/patch/series

diff --git a/build_debian.sh b/build_debian.sh
index 8c767d619196..7fe04902fb2b 100755
--- a/build_debian.sh
+++ b/build_debian.sh
@@ -364,6 +364,7 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in
     mtr-tiny                \
     locales                 \
     cgroup-tools            \
+    ipmitool                \
     ndisc6                  \
     makedumpfile            \
     conntrack               \
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index a4fddc83958b..891a9afdc06b 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -108,10 +108,6 @@ sudo setcap 'cap_net_raw=+ep' $FILESYSTEM_ROOT/usr/bin/wol
 sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/ifupdown2_*.deb || \
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
 
-# Install a patched version of ipmitool  (and its dependencies via 'apt-get -y install -f')
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/ipmitool_*.deb || \
-    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
-
 # Install a patched version of ntp  (and its dependencies via 'apt-get -y install -f')
 sudo dpkg --root=$FILESYSTEM_ROOT --force-confdef --force-confold -i $debs_path/ntp_*.deb || \
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y \
diff --git a/rules/ipmitool.dep b/rules/ipmitool.dep
deleted file mode 100644
index 7643d2477b59..000000000000
--- a/rules/ipmitool.dep
+++ /dev/null
@@ -1,11 +0,0 @@
-
-SPATH       := $($(IPMITOOL)_SRC_PATH)
-DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/ipmitool.mk rules/ipmitool.dep   
-DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES   += $(shell git ls-files $(SPATH))
-
-$(IPMITOOL)_CACHE_MODE  := GIT_CONTENT_SHA 
-$(IPMITOOL)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
-$(IPMITOOL)_DEP_FILES   := $(DEP_FILES)
-
-
diff --git a/rules/ipmitool.mk b/rules/ipmitool.mk
deleted file mode 100644
index a3d08452473f..000000000000
--- a/rules/ipmitool.mk
+++ /dev/null
@@ -1,17 +0,0 @@
-# ipmitool packages
-IPMITOOL_VERSION = 1.8.19
-IPMITOOL_VERSION_SUFFIX = 4+deb12u1
-IPMITOOL_VERSION_FULL = $(IPMITOOL_VERSION)-$(IPMITOOL_VERSION_SUFFIX)
-IPMITOOL = ipmitool_$(IPMITOOL_VERSION_FULL)_$(CONFIGURED_ARCH).deb
-$(IPMITOOL)_SRC_PATH = $(SRC_PATH)/ipmitool
-SONIC_MAKE_DEBS += $(IPMITOOL)
-IPMITOOL_DBG = ipmitool-dbgsym_$(IPMITOOL_VERSION_FULL)_$(CONFIGURED_ARCH).deb
-$(eval $(call add_derived_package,$(IPMITOOL),$(IPMITOOL_DBG)))
-DBG_SRC_ARCHIVE += ipmitool 
-# The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list}
-# are archived into debug one image to facilitate debugging.
-# Export these variables so they can be used in a sub-make
-export IPMITOOL_VERSION
-export IPMITOOL_VERSION_FULL 
-export IPMITOOL
-export IPMITOOL_DBG
diff --git a/slave.mk b/slave.mk
index 15abbc7259d9..22b13a5ad452 100644
--- a/slave.mk
+++ b/slave.mk
@@ -1366,7 +1366,6 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \
                 $(LINUX_KERNEL) \
                 $(SONIC_DEVICE_DATA) \
                 $(IFUPDOWN2) \
-                $(IPMITOOL) \
                 $(KDUMP_TOOLS) \
                 $(LIBPAM_RADIUS) \
                 $(LIBNSS_RADIUS) \
diff --git a/src/ipmitool/Makefile b/src/ipmitool/Makefile
deleted file mode 100644
index dc8b9c05ca53..000000000000
--- a/src/ipmitool/Makefile
+++ /dev/null
@@ -1,28 +0,0 @@
-.ONESHELL:
-SHELL = /bin/bash
-.SHELLFLAGS += -e
-
-MAIN_TARGET = $(IPMITOOL)
-DERIVED_TARGETS = $(IPMITOOL_DBG)
-
-$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
-	# Remove any stale files
-	rm -rf ./ipmitool-$(IPMITOOL_VERSION) ./ipmitool*.{deb,udeb,dsc,gz,xz}
-	# Obtain ipmitool
-	dget https://deb.debian.org/debian/pool/main/i/ipmitool/ipmitool_$(IPMITOOL_VERSION_FULL).dsc
-	# Build source and Debian packages
-	pushd ipmitool-$(IPMITOOL_VERSION)
-
-	git init
-	git add -f *
-	git commit -m "unmodified ipmitool source"
-
-	# Apply patches
-	stg init
-	stg import -s ../patch/series
-	dpkg-buildpackage -rfakeroot -d -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
-	popd
-	mv $* $(DERIVED_TARGETS) $(DEST)/
-
-$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
-
diff --git a/src/ipmitool/patch/0001-Changes-needed-to-install-enterprise.txt.patch b/src/ipmitool/patch/0001-Changes-needed-to-install-enterprise.txt.patch
deleted file mode 100644
index dcaab247a9a1..000000000000
--- a/src/ipmitool/patch/0001-Changes-needed-to-install-enterprise.txt.patch
+++ /dev/null
@@ -1,113 +0,0 @@
-From 719292c4800054ead278affc2972d8f77babd227 Mon Sep 17 00:00:00 2001
-From: rajib-dutta1 <rajib.dutta@dell.com>
-Date: Wed, 10 Jan 2024 20:51:03 -0800
-Subject: [PATCH] Changes needed to install enterprise.txt
-
----
- Makefile.am  | 40 ++++++++++++++++++++--------------------
- configure.ac | 30 +++++++++++++++---------------
- 2 files changed, 35 insertions(+), 35 deletions(-)
-
-diff --git a/Makefile.am b/Makefile.am
-index 355d3f0..ec9605c 100644
---- a/Makefile.am
-+++ b/Makefile.am
-@@ -49,25 +49,25 @@ dist-hook:
- .PHONY: install-pen-database uninstall-pen-database
- .INTERMEDIATE: %.o %.la enterprise-numbers
- 
--#if DOWNLOAD
--
--#enterprise-numbers:
--#	@echo Downloading IANA PEN database...
--#	@$(DOWNLOAD) "$(IANA_PEN)" > tmpfile.$$PPID || {\
--#		echo "FAILED to download the IANA PEN database"; \
--#		rm tmpfile.$$PPID; \
--#		false; \
--#	}
--#	@mv tmpfile.$$PPID $@
--#
--#install-pen-database: enterprise-numbers
--#	mkdir -m 755 -p $(DESTDIR)$(IANADIR)
--#	$(INSTALL_DATA) $< $(DESTDIR)$(IANADIR)/
--#
--#uninstall-pen-database:
--#	-rm -rf $(DESTDIR)$(IANADIR)/enterprise-numbers
--#
--#else
-+if DOWNLOAD
-+
-+enterprise-numbers.txt:
-+	@echo Downloading IANA PEN database...
-+	@$(DOWNLOAD) "$(IANA_PEN)" > tmpfile.$$PPID || {\
-+		echo "FAILED to download the IANA PEN database"; \
-+		rm tmpfile.$$PPID; \
-+		false; \
-+	}
-+	@mv tmpfile.$$PPID $@
-+
-+install-pen-database: enterprise-numbers.txt
-+	mkdir -m 755 -p $(DESTDIR)$(IANADIR)
-+	$(INSTALL_DATA) $< $(DESTDIR)$(IANADIR)/
-+
-+uninstall-pen-database:
-+	-rm -rf $(DESTDIR)$(IANADIR)/enterprise-numbers.txt
-+
-+else
- 
- install-pen-database:
- 	@echo "*** NOT installing the IANA PEN database."
-@@ -77,7 +77,7 @@ uninstall-pen-database:
- 	@echo "*** NOT uninstalling the IANA PEN database."
- 	@echo "*** It was installed manually (if ever)."
- 
--#endif
-+endif
- 
- install-data-local: install-pen-database
- 	mkdir -p $(DESTDIR)$(DOCDIR)
-diff --git a/configure.ac b/configure.ac
-index b4321c6..d6ba62b 100644
---- a/configure.ac
-+++ b/configure.ac
-@@ -56,22 +56,22 @@ if test "x$exec_prefix" = "xNONE"; then
- 	exec_prefix="$prefix"
- fi
- 
--#if test "x$WGET" = "x"; then
--#	if test "x$CURL" = "x"; then
--#		AC_MSG_WARN([** Neither wget nor curl could be found.])
--#		AC_MSG_WARN([** IANA PEN database will not be installed by `make install` !])
--#	else
--#		DOWNLOAD="$CURL --location --progress-bar"
--#		AM_CONDITIONAL([DOWNLOAD], [true])
--#	fi
--#else
--#	DOWNLOAD="$WGET -c -nd -O -"
--#	AM_CONDITIONAL([DOWNLOAD], [true])
--#fi
-+if test "x$WGET" = "x"; then
-+	if test "x$CURL" = "x"; then
-+		AC_MSG_WARN([** Neither wget nor curl could be found.])
-+		AC_MSG_WARN([** IANA PEN database will not be installed by `make install` !])
-+	else
-+		DOWNLOAD="$CURL --location --progress-bar"
-+		AM_CONDITIONAL([DOWNLOAD], [true])
-+	fi
-+else
-+	DOWNLOAD="$WGET -c -nd -O -"
-+	AM_CONDITIONAL([DOWNLOAD], [true])
-+fi
- 
--#AC_MSG_WARN([** Download is:])
--#AC_MSG_WARN($DOWNLOAD)
--#AC_SUBST(DOWNLOAD, $DOWNLOAD)
-+AC_MSG_WARN([** Download is:])
-+AC_MSG_WARN($DOWNLOAD)
-+AC_SUBST(DOWNLOAD, $DOWNLOAD)
- 
- dnl
- dnl set default option values
--- 
-2.25.1
-
diff --git a/src/ipmitool/patch/series b/src/ipmitool/patch/series
deleted file mode 100644
index df9c99f748fa..000000000000
--- a/src/ipmitool/patch/series
+++ /dev/null
@@ -1 +0,0 @@
-0001-Changes-needed-to-install-enterprise.txt.patch

From daa5b03fadffaca7ce40021d721f806f7a7350f1 Mon Sep 17 00:00:00 2001
From: spilkey-cisco <110940806+spilkey-cisco@users.noreply.github.com>
Date: Mon, 18 Nov 2024 11:44:06 -0800
Subject: [PATCH 223/364] Add quotes to tr constructs to fix command syntax
 (#20464)

---
 dockers/docker-fpm-frr/base_image_files/TSA | 2 +-
 dockers/docker-fpm-frr/base_image_files/TSB | 2 +-
 dockers/docker-fpm-frr/base_image_files/TSC | 2 +-
 files/scripts/arp_update                    | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/dockers/docker-fpm-frr/base_image_files/TSA b/dockers/docker-fpm-frr/base_image_files/TSA
index 68ee72337b70..b2c2ebbb5640 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSA
+++ b/dockers/docker-fpm-frr/base_image_files/TSA
@@ -30,7 +30,7 @@ if [ -f /etc/sonic/chassisdb.conf ] && [ "$SMARTSWITCH" = false ] ; then
 fi
 # toggle the mux to standby if dualtor and any mux active
 if
-[[ "$(sonic-cfggen -d -v DEVICE_METADATA.localhost.subtype | tr [:upper:] [:lower:])" == *"dualtor"* ]] &&
+[[ "$(sonic-cfggen -d -v DEVICE_METADATA.localhost.subtype | tr '[:upper:]' '[:lower:]')" == *"dualtor"* ]] &&
 [[ $(show mux status | grep active | wc -l) > 0 ]];
 then
   logger -t TSA -p user.info "Toggle all mux mode to standby"
diff --git a/dockers/docker-fpm-frr/base_image_files/TSB b/dockers/docker-fpm-frr/base_image_files/TSB
index f6f6d4044286..0eb2a5bb7648 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSB
+++ b/dockers/docker-fpm-frr/base_image_files/TSB
@@ -30,7 +30,7 @@ if [ -f /etc/sonic/chassisdb.conf ] && [ "$SMARTSWITCH" = false ] ; then
 fi
 
 # toggle the mux to auto if dualtor
-if [[ "$(sonic-cfggen -d -v DEVICE_METADATA.localhost.subtype | tr [:upper:] [:lower:])" == *"dualtor"* ]];
+if [[ "$(sonic-cfggen -d -v DEVICE_METADATA.localhost.subtype | tr '[:upper:]' '[:lower:]')" == *"dualtor"* ]];
 then
   logger -t TSB -p user.info "Toggle all mux mode to auto"
   sudo config mux mode auto all
diff --git a/dockers/docker-fpm-frr/base_image_files/TSC b/dockers/docker-fpm-frr/base_image_files/TSC
index f991d0eec396..2796e34679f1 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSC
+++ b/dockers/docker-fpm-frr/base_image_files/TSC
@@ -23,7 +23,7 @@ fi
 /usr/bin/TS TSC
 [[ $1 != "no-stats" ]] && portstat -p 5
 
-if [[ "$(sonic-cfggen -d -v DEVICE_METADATA.localhost.subtype | tr [:upper:] [:lower:])" == *"dualtor"* ]]
+if [[ "$(sonic-cfggen -d -v DEVICE_METADATA.localhost.subtype | tr '[:upper:]' '[:lower:]')" == *"dualtor"* ]]
 then
   echo
   show mux status
diff --git a/files/scripts/arp_update b/files/scripts/arp_update
index 73a454ea2acd..ced805d5ace6 100755
--- a/files/scripts/arp_update
+++ b/files/scripts/arp_update
@@ -76,7 +76,7 @@ while /bin/true; do
   done
 
   # find neighbor entries with aged MAC and flush/relearn them
-  STALE_NEIGHS=$(ip neigh show | grep -v "fe80" | grep "STALE" | awk '{print $1 "," $5}' | tr [:lower:] [:upper:])
+  STALE_NEIGHS=$(ip neigh show | grep -v "fe80" | grep "STALE" | awk '{print $1 "," $5}' | tr '[:lower:]' '[:upper:]')
   for neigh in $STALE_NEIGHS; do
         ip="$( cut -d ',' -f 1 <<< "$neigh" )"
         mac="$( cut -d ',' -f 2 <<< "$neigh" )"

From 59f39d40b3b19564f6cbfb03d8ef5c64a12a756a Mon Sep 17 00:00:00 2001
From: ganglv <88995770+ganglyu@users.noreply.github.com>
Date: Tue, 19 Nov 2024 08:20:14 +0800
Subject: [PATCH 224/364] Enable GRPC log for GNMI (#20798)

#### Why I did it
Currently, we don't have GRPC logs for the GNMI server, making it difficult to debug GRPC-level issues such as invalid certificates.

#### How I did it
Update gnmi-native.sh to enable GRPC_GO_LOG.

#### How to verify it
Send gnmi request and check gnmi log, for example:
2024 Nov 13 07:35:03.454423 str3 INFO gnmi#supervisord: gnmi-native WARNING: 2024/11/13 07:35:03 [core] grpc: Server.Serve failed to complete security handshake from "127.0.0.1:43530": tls: failed to verify client certificate: x509: certificate signed by unknown authority
---
 dockers/docker-sonic-gnmi/gnmi-native.sh | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/dockers/docker-sonic-gnmi/gnmi-native.sh b/dockers/docker-sonic-gnmi/gnmi-native.sh
index b9241dca1d6a..1756ea1dba53 100755
--- a/dockers/docker-sonic-gnmi/gnmi-native.sh
+++ b/dockers/docker-sonic-gnmi/gnmi-native.sh
@@ -17,6 +17,10 @@ X509=$(echo $TELEMETRY_VARS | jq -r '.x509')
 GNMI=$(echo $TELEMETRY_VARS | jq -r '.gnmi')
 CERTS=$(echo $TELEMETRY_VARS | jq -r '.certs')
 
+# Enable GRPC GO LOG
+export GRPC_GO_LOG_VERBOSITY_LEVEL=99
+export GRPC_GO_LOG_SEVERITY_LEVEL=info
+
 TELEMETRY_ARGS=" -logtostderr"
 export CVL_SCHEMA_PATH=/usr/sbin/schema
 

From 6d7702c8c4772dde2b5594cea292629ae764eb7d Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Mon, 18 Nov 2024 22:49:32 -0800
Subject: [PATCH 225/364] [ci] Build nvidia bluefield bfb dpu image (#20846)

Build Nvidia Bluefield BFB DPU image in the nvidia-bluefield pipeline.
The BFB image allows recovery of the DPU from any SW failure state. The image can be installed from the Smart Switch host without requiring copying an image to the DPU.
---
 .azure-pipelines/azure-pipelines-build.yml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/.azure-pipelines/azure-pipelines-build.yml b/.azure-pipelines/azure-pipelines-build.yml
index 941c30ecbea2..46372e51a45d 100644
--- a/.azure-pipelines/azure-pipelines-build.yml
+++ b/.azure-pipelines/azure-pipelines-build.yml
@@ -182,6 +182,9 @@ jobs:
               make $BUILD_OPTIONS ENABLE_SYNCD_RPC=y target/sonic-$(GROUP_NAME).bin
               mv target/sonic-mellanox.bin target/sonic-$(GROUP_NAME)-rpc.bin
             fi
+            if [ $(GROUP_NAME) == nvidia-bluefield ]; then
+              make $BUILD_OPTIONS target/sonic-$(GROUP_NAME).bfb
+            fi
             make $BUILD_OPTIONS target/sonic-$(GROUP_NAME).bin
           fi
         displayName: "Build sonic image"

From 1c88808e06cbdaca81ce2504f3c4479b6eda5254 Mon Sep 17 00:00:00 2001
From: Parthiv Shah <33715584+marvellparthiv@users.noreply.github.com>
Date: Tue, 19 Nov 2024 12:57:23 +0530
Subject: [PATCH 226/364] [Marvell][ARM64]: Remove redundant boot arguments
 (#20767)

Removed unused bootargs ( mtdparts & otherbootargs ) from platform.conf for marvell arm64.
Sonic already provides a way to pass extra command line arguments through "ONIE_PLATFORM_EXTRA_CMDLINE_LINUX".

Signed-off-by: Parthiv Shah <parthiv@marvell.com>
---
 platform/marvell/platform_arm64.conf | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/marvell/platform_arm64.conf b/platform/marvell/platform_arm64.conf
index 4c55dd3ae78c..ee417e9cd3ac 100644
--- a/platform/marvell/platform_arm64.conf
+++ b/platform/marvell/platform_arm64.conf
@@ -222,7 +222,7 @@ prepare_boot_menu() {
     fw_setenv ${FW_ARG} print_menu "$BORDER $BOOT1 $BOOT2 $BOOT3 $BORDER" > /dev/null
 
     fw_setenv ${FW_ARG} linuxargs "net.ifnames=0 loopfstype=squashfs loop=$image_dir/$FILESYSTEM_SQUASHFS systemd.unified_cgroup_hierarchy=0 varlog_size=$VAR_LOG ${ONIE_PLATFORM_EXTRA_CMDLINE_LINUX}" > /dev/null
-    sonic_bootargs_old='setenv bootargs root='$demo_dev' rw rootwait panic=1 console=ttyS0,${baudrate} ${othbootargs} ${mtdparts} ${linuxargs_old}'
+    sonic_bootargs_old='setenv bootargs root='$demo_dev' rw rootwait panic=1 console=ttyS0,${baudrate} ${linuxargs_old}'
     fw_setenv ${FW_ARG} sonic_bootargs_old "$sonic_bootargs_old" > /dev/null || true
     sonic_boot_load_old=$(fw_printenv -n sonic_boot_load || true)
     old_str="_old"
@@ -237,7 +237,7 @@ prepare_boot_menu() {
     fw_setenv ${FW_ARG} sonic_boot_load "$MMC_LOAD" > /dev/null
     SONIC_BOOT_CMD='run sonic_bootargs; run sonic_boot_load; bootm $fit_addr${fit_conf_name}'
     SONIC_BOOT_CMD_OLD='run sonic_bootargs_old; run sonic_boot_load_old; bootm $fit_addr${fit_conf_name}'
-    BOOTARGS='setenv bootargs root='$demo_dev' rw rootwait panic=1 console=ttyS0,${baudrate} ${othbootargs} ${mtdparts} ${linuxargs}'
+    BOOTARGS='setenv bootargs root='$demo_dev' rw rootwait panic=1 console=ttyS0,${baudrate} ${linuxargs}'
     fw_setenv ${FW_ARG} sonic_bootargs "$BOOTARGS" > /dev/null
     fw_setenv ${FW_ARG} sonic_image_2 "$SONIC_BOOT_CMD_OLD" > /dev/null
     fw_setenv ${FW_ARG} sonic_image_1 "$SONIC_BOOT_CMD" > /dev/null

From aa9a13b28dfe264062b5d60702089e2b3d28188f Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Mon, 18 Nov 2024 23:28:13 -0800
Subject: [PATCH 227/364] [build]: Enable caching of p4lang packages (#20761)

This saves about an hour from the VS build.

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 rules/p4lang.dep | 18 ++++++++++++++++++
 rules/p4lang.mk  | 11 ++++-------
 2 files changed, 22 insertions(+), 7 deletions(-)

diff --git a/rules/p4lang.dep b/rules/p4lang.dep
index 01effeb6f078..a44106642f54 100644
--- a/rules/p4lang.dep
+++ b/rules/p4lang.dep
@@ -7,3 +7,21 @@ DEP_FILES   += $(shell git ls-files $(SPATH))
 $(P4LANG_PI)_CACHE_MODE  := GIT_CONTENT_SHA 
 $(P4LANG_PI)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
 $(P4LANG_PI)_DEP_FILES   := $(DEP_FILES)
+
+SPATH       := $($(P4LANG_BMV2)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/p4lang.mk rules/p4lang.dep   
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(SPATH))
+
+$(P4LANG_BMV2)_CACHE_MODE  := GIT_CONTENT_SHA 
+$(P4LANG_BMV2)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(P4LANG_BMV2)_DEP_FILES   := $(DEP_FILES)
+
+SPATH       := $($(P4LANG_P4C)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/p4lang.mk rules/p4lang.dep   
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(SPATH))
+
+$(P4LANG_P4C)_CACHE_MODE  := GIT_CONTENT_SHA 
+$(P4LANG_P4C)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(P4LANG_P4C)_DEP_FILES   := $(DEP_FILES)
diff --git a/rules/p4lang.mk b/rules/p4lang.mk
index 2bca4e1f50bd..69bde5693e8a 100644
--- a/rules/p4lang.mk
+++ b/rules/p4lang.mk
@@ -8,13 +8,10 @@ export P4LANG_PI_VERSION
 export P4LANG_PI_VERSION_FULL
 
 P4LANG_PI = p4lang-pi_$(P4LANG_PI_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+$(P4LANG_PI)_SRC_PATH = $(SRC_PATH)/p4lang
 $(P4LANG_PI)_DEPENDS = $(PROTOBUF) $(PROTOBUF_LITE) $(PROTOC32) $(PYTHON3_PROTOBUF) $(GRPC) $(GRPC_CPP) $(PYTHON3_GRPC) $(PROTOBUF_DEV) $(PROTOC_DEV) $(PROTOBUF_COMPILER) $(GRPC_DEV) $(GRPC_CPP_DEV) $(GRPC_COMPILER)
 $(P4LANG_PI)_RDEPENDS = $(PROTOBUF) $(PROTOBUF_LITE) $(PROTOC32) $(PYTHON3_PROTOBUF) $(GRPC) $(GRPC_CPP) $(PYTHON3_GRPC) $(PROTOBUF_DEV) $(PROTOC_DEV) $(PROTOBUF_COMPILER) $(GRPC_DEV) $(GRPC_CPP_DEV) $(GRPC_COMPILER)
-
-
-P4LANG = $(P4LANG_PI)
-$(P4LANG)_SRC_PATH = $(SRC_PATH)/p4lang
-SONIC_MAKE_DEBS += $(P4LANG)
+SONIC_MAKE_DEBS += $(P4LANG_PI)
 
 # p4lang-bmv2
 
@@ -25,7 +22,7 @@ export P4LANG_BMV2_VERSION
 export P4LANG_BMV2_VERSION_FULL
 
 P4LANG_BMV2 = p4lang-bmv2_$(P4LANG_BMV2_VERSION_FULL)_$(CONFIGURED_ARCH).deb
-$(P4LANG_BMV2)_SRC_PATH = $(SRC_PATH)/p4lang
+$(P4LANG_BMV2)_SRC_PATH = $($(P4LANG_PI)_SRC_PATH)
 $(P4LANG_BMV2)_DEPENDS = $(P4LANG_PI)
 $(P4LANG_BMV2)_RDEPENDS = $(P4LANG_PI)
 SONIC_MAKE_DEBS += $(P4LANG_BMV2)
@@ -39,7 +36,7 @@ export P4LANG_P4C_VERSION
 export P4LANG_P4C_VERSION_FULL
 
 P4LANG_P4C = p4lang-p4c_$(P4LANG_P4C_VERSION_FULL)_$(CONFIGURED_ARCH).deb
-$(P4LANG_P4C)_SRC_PATH = $(SRC_PATH)/p4lang
+$(P4LANG_P4C)_SRC_PATH = $($(P4LANG_PI)_SRC_PATH)
 $(P4LANG_P4C)_DEPENDS = $(P4LANG_BMV2)
 $(P4LANG_P4C)_RDEPENDS = $(P4LANG_BMV2)
 SONIC_MAKE_DEBS += $(P4LANG_P4C)

From 3cb17c0abadf3ac9a0dee669bfdfe0f1cfeb23a2 Mon Sep 17 00:00:00 2001
From: liamkearney-msft <liamkearney@microsoft.com>
Date: Tue, 19 Nov 2024 17:32:49 +1000
Subject: [PATCH 228/364] [macsec/show_macsec]: Only cache macsec stats
 (#20654)

Existing implementation would also cache XPN / SAI_MACSEC_ATTR values, which
should not be reset on a sonic-clear macsec command. Change the show
command to only look at SAI_MACSEC_SA_STAT values when accounting for
the cache

Signed-off-by: Liam Kearney <liamkearney@microsoft.com>
---
 dockers/docker-macsec/cli/show/plugins/show_macsec.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/dockers/docker-macsec/cli/show/plugins/show_macsec.py b/dockers/docker-macsec/cli/show/plugins/show_macsec.py
index f8a1265b07e9..a1c58cd34bb1 100644
--- a/dockers/docker-macsec/cli/show/plugins/show_macsec.py
+++ b/dockers/docker-macsec/cli/show/plugins/show_macsec.py
@@ -63,7 +63,7 @@ def dump_str(self, cache = None) -> str:
         counters = copy.deepcopy(self.counters)
         if cache:
             for k, v in counters.items():
-                if k in cache.counters:
+                if k in cache.counters and k.startswith("SAI_MACSEC_SA_STAT"):
                     counters[k] = int(counters[k]) - int(cache.counters[k])
         counters = sorted(counters.items(), key=lambda x: x[0])
         buffer += tabulate(meta + counters)

From bcb0328b348949b65e80e2e730a5e58632a37d97 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 19 Nov 2024 19:46:40 +0800
Subject: [PATCH 229/364] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#20850)

#### Why I did it
src/sonic-host-services
```
* c05d43e - (HEAD -> master, origin/master, origin/HEAD) featured: use run() to run cli commands in place of check_call() (#177) (6 hours ago) [anamehra]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index ff73070d7def..c05d43e24dca 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit ff73070d7def8689bc92dd0e28d3dab5d0254450
+Subproject commit c05d43e24dca74fd2cae83dad9936232c1011cb3

From 91802426749ee3db1349c853ceda0bea9a0e0ccb Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 19 Nov 2024 19:46:45 +0800
Subject: [PATCH 230/364] [submodule] Update submodule sonic-gnmi to the latest
 HEAD automatically (#20848)

#### Why I did it
src/sonic-gnmi
```
* e0f0924 - (HEAD -> master, origin/master, origin/HEAD) Install advancetls package to support crl. (#318) (32 minutes ago) [Hua Liu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 883d617a9338..e0f09241f7ac 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 883d617a9338fb10210990682116be13e96407c0
+Subproject commit e0f09241f7ac15135cdc3ea0f16e7f217d1dd4b7

From 6c30a144f18f741290acd0a98a58ef86c5281ec5 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 19 Nov 2024 19:46:54 +0800
Subject: [PATCH 231/364] [submodule] Update submodule sonic-bmp to the latest
 HEAD automatically (#20847)

#### Why I did it
src/sonic-bmp
```
* bfbd47b - (HEAD -> master, origin/master, origin/HEAD) Merge pull request #15 from FengPan-Frank/makefile (13 hours ago) [Feng-msft]
* ad31f5b - Create makefile for build image flow (17 hours ago) [Feng Pan]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-bmp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-bmp b/src/sonic-bmp
index 8c4311d054f9..bfbd47bdcc28 160000
--- a/src/sonic-bmp
+++ b/src/sonic-bmp
@@ -1 +1 @@
-Subproject commit 8c4311d054f9b7a9d8edb887546da153e3310034
+Subproject commit bfbd47bdcc287b0bfbbad4b227e5d1b739185954

From d8a7ff53717bda1cbb5f614b450a5e21519eeb54 Mon Sep 17 00:00:00 2001
From: nipunjoy <98303305+nipunjoy@users.noreply.github.com>
Date: Tue, 19 Nov 2024 22:10:48 +0530
Subject: [PATCH 232/364] [iccpd]: fix ICCPD make option (#20493)

To optionally include "INCLUDE_ICCPD=y" in make command.
Add the missing "INCLUDE_ICCPD" option in makefile.work

Signed-off-by: nipunjoy <njoy@marvell.com>
---
 Makefile.work | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Makefile.work b/Makefile.work
index 6079906a1005..e6cddad289b9 100644
--- a/Makefile.work
+++ b/Makefile.work
@@ -536,6 +536,7 @@ SONIC_BUILD_INSTRUCTION :=  $(MAKE) \
                            INCLUDE_DHCP_RELAY=$(INCLUDE_DHCP_RELAY) \
                            INCLUDE_DHCP_SERVER=$(INCLUDE_DHCP_SERVER) \
                            INCLUDE_MACSEC=$(INCLUDE_MACSEC) \
+                           INCLUDE_ICCPD=$(INCLUDE_ICCPD) \
                            SONIC_INCLUDE_RESTAPI=$(INCLUDE_RESTAPI) \
                            SONIC_INCLUDE_MUX=$(INCLUDE_MUX) \
                            ENABLE_TRANSLIB_WRITE=$(ENABLE_TRANSLIB_WRITE) \

From 9eeae96b57de4143328ce34902d8e4221ae3a36c Mon Sep 17 00:00:00 2001
From: Julian Chang <puffc@users.noreply.github.com>
Date: Wed, 20 Nov 2024 00:42:01 +0800
Subject: [PATCH 233/364] [iccpd] Add nft-based ebtables utilities. (#19324)

Fix a problem (fixes #19323) where ebtables command cannot be executed by iccpd. This cause the trapped BUM packets (ipv6 neighbor discovery) looping back to the MCLAG port channel.

How I did it
Replacing the legacy ebtables with the nft-based ebtables command suite by adding iptables package into the iccpd docker container.

How to verify it
Verified the ebtables command can be executed from the iccpd docker. When the MCLAG reaches operational state the isolation rules can be added.

Signed-off-by: Julian Chang - TW <julianc@supermicro.com.tw>
---
 dockers/docker-iccpd/Dockerfile.j2 | 2 +-
 rules/docker-iccpd.mk              | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/dockers/docker-iccpd/Dockerfile.j2 b/dockers/docker-iccpd/Dockerfile.j2
index 72d2d3d20883..78f2648847ce 100644
--- a/dockers/docker-iccpd/Dockerfile.j2
+++ b/dockers/docker-iccpd/Dockerfile.j2
@@ -7,7 +7,7 @@ ARG docker_container_name
 ENV DEBIAN_FRONTEND=noninteractive
 
 RUN apt-get update && \
-    apt-get install -y ebtables
+    apt-get install -y iptables
 
 COPY \
 {% for deb in docker_iccpd_debs.split(' ') -%}
diff --git a/rules/docker-iccpd.mk b/rules/docker-iccpd.mk
index 39be9f5a53d4..a83f93642e98 100644
--- a/rules/docker-iccpd.mk
+++ b/rules/docker-iccpd.mk
@@ -21,7 +21,7 @@ SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_ICCPD_DBG)
 endif
 
 $(DOCKER_ICCPD)_CONTAINER_NAME = iccpd
-$(DOCKER_ICCPD)_RUN_OPT += -t
+$(DOCKER_ICCPD)_RUN_OPT += -t --cap-add=NET_ADMIN
 $(DOCKER_ICCPD)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
 $(DOCKER_ICCPD)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro 
 

From 309f0dcb8c2277673675e057c02309a07d8af216 Mon Sep 17 00:00:00 2001
From: nipunjoy <98303305+nipunjoy@users.noreply.github.com>
Date: Tue, 19 Nov 2024 22:12:46 +0530
Subject: [PATCH 234/364] [marvell]: remove marvell from pfc_to_pg_map
 supported asic list (#20753)

SONIC warm-reboot command is not working due to unsupported qos configs.

Signed-off-by: Nipun Joy <njoy@marvell.com>
---
 files/build_templates/qos_config.j2 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/files/build_templates/qos_config.j2 b/files/build_templates/qos_config.j2
index bf5007471a48..70ebf9e238ef 100644
--- a/files/build_templates/qos_config.j2
+++ b/files/build_templates/qos_config.j2
@@ -77,7 +77,7 @@
 {% endif %}
 {%- endfor %}
 
-{%- set pfc_to_pg_map_supported_asics = ['mellanox', 'barefoot', 'marvell'] -%}
+{%- set pfc_to_pg_map_supported_asics = ['mellanox', 'barefoot'] -%}
 {%- set backend_device_types = ['BackEndToRRouter', 'BackEndLeafRouter'] -%}
 {%- set apollo_resource_types = ['DL-NPU-Apollo'] -%}
 

From 521175888fd05a3161c09f1888194ab999e020fa Mon Sep 17 00:00:00 2001
From: Ze Gan <ganze718@gmail.com>
Date: Wed, 20 Nov 2024 01:55:38 +0800
Subject: [PATCH 235/364] [Arista]: Change the TH5 Yaml settings to use 8 UC
 and 4 MC queues (#19912)

[Arista] Change the Yaml settings to use 8 UC and 4 MC queues, as SONIC only uses 8 UC queues.

Signed-off-by: Ze Gan <zegan@microsoft.com>
---
 .../th5-a7060x6-64pe.config.bcm               | 46 +++----------------
 1 file changed, 6 insertions(+), 40 deletions(-)

diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
index eecb986fdb45..f9dc4cea1df0 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
@@ -1947,7 +1947,7 @@ device:
             THRESHOLD_MODE: LOSSY_AND_LOSSLESS
 
         TM_SCHEDULER_CONFIG:
-            NUM_MC_Q: NUM_MC_Q_2
+            NUM_MC_Q: NUM_MC_Q_4
 
 ...
 
@@ -2144,7 +2144,7 @@ device:
         TM_PORT_MC_Q_TO_SERVICE_POOL:
             ?
                 PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
-                TM_MC_Q_ID: [[0,1]]
+                TM_MC_Q_ID: [[0,3]]
             :
                 USE_QGROUP_MIN: 0
 
@@ -2161,7 +2161,7 @@ device:
             ?
                 # uplink, downlink and loopback ports, 2 MC queues
                 PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
-                TM_MC_Q_ID: [[0,1]]
+                TM_MC_Q_ID: [[0,3]]
             :
                 MIN_GUARANTEE_CELLS: 0
                 SHARED_LIMITS: 1
@@ -2622,7 +2622,7 @@ device:
         TM_PORT_UC_Q_TO_SERVICE_POOL:
             ?
                 PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
-                TM_UC_Q_ID: [0,1,2,5,6,8,9]
+                TM_UC_Q_ID: [0,1,2,5,6]
             :
                 USE_QGROUP_MIN: 0
                 TM_EGR_SERVICE_POOL_ID: 0
@@ -2648,7 +2648,7 @@ device:
                 TM_EGR_SERVICE_POOL_ID: 1
             ?
                 PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
-                TM_MC_Q_ID: [[0,1]]
+                TM_MC_Q_ID: [[0,3]]
             :
                 USE_QGROUP_MIN: 0
                 TM_EGR_SERVICE_POOL_ID: 0
@@ -2676,23 +2676,6 @@ device:
                 YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
                 RED_LIMIT_CELLS_STATIC: 0
                 RED_LIMIT_DYNAMIC: PERCENTAGE_625
-            ?
-                PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]]
-                TM_UC_Q_ID: [8,9]
-            :
-                MIN_GUARANTEE_CELLS: 0
-                SHARED_LIMITS: 1
-                DYNAMIC_SHARED_LIMITS: 1
-                SHARED_LIMIT_CELLS_STATIC: 0
-                SHARED_LIMIT_DYNAMIC: ALPHA_1
-                DYNAMIC_GROUP: MID_PRI_GROUP
-                RESUME_OFFSET_CELLS: 2
-                COLOR_SPECIFIC_LIMITS: 0
-                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
-                YELLOW_LIMIT_CELLS_STATIC: 0
-                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
-                RED_LIMIT_CELLS_STATIC: 0
-                RED_LIMIT_DYNAMIC: PERCENTAGE_625
             ?
                 PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]]
                 TM_UC_Q_ID: [3,4]
@@ -2724,23 +2707,6 @@ device:
                 YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
                 RED_LIMIT_CELLS_STATIC: 0
                 RED_LIMIT_DYNAMIC: PERCENTAGE_625
-            ?
-                PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]]
-                TM_UC_Q_ID: [8,9]
-            :
-                MIN_GUARANTEE_CELLS: 0
-                SHARED_LIMITS: 1
-                DYNAMIC_SHARED_LIMITS: 1
-                SHARED_LIMIT_CELLS_STATIC: 0
-                SHARED_LIMIT_DYNAMIC: ALPHA_1
-                DYNAMIC_GROUP: MID_PRI_GROUP
-                RESUME_OFFSET_CELLS: 2
-                COLOR_SPECIFIC_LIMITS: 0
-                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
-                YELLOW_LIMIT_CELLS_STATIC: 0
-                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
-                RED_LIMIT_CELLS_STATIC: 0
-                RED_LIMIT_DYNAMIC: PERCENTAGE_625
             ?
                 PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]]
                 TM_UC_Q_ID: [3,4]
@@ -2778,7 +2744,7 @@ device:
                 RESUME_OFFSET_CELLS: 2
             ?
                 PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
-                TM_MC_Q_ID: [0,1]
+                TM_MC_Q_ID: [0,3]
                 SHARED_LIMIT_DYNAMIC: ALPHA_2
             :
                 SHARED_LIMITS: 1

From a54df37755fc96de8dc0c8295d69ce09d91c2240 Mon Sep 17 00:00:00 2001
From: prabhataravind <108555774+prabhataravind@users.noreply.github.com>
Date: Tue, 19 Nov 2024 15:20:38 -0800
Subject: [PATCH 236/364] Add new build pipeline for smartswitch (#20855)

Add new build pipeline for Nvidia smartswitch

Signed-off-by: Prabhat Aravind <paravind@microsoft.com>
---
 .azure-pipelines/azure-pipelines-build.yml | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/.azure-pipelines/azure-pipelines-build.yml b/.azure-pipelines/azure-pipelines-build.yml
index 46372e51a45d..fd6c805cf350 100644
--- a/.azure-pipelines/azure-pipelines-build.yml
+++ b/.azure-pipelines/azure-pipelines-build.yml
@@ -38,6 +38,7 @@ jobs:
       docker_syncd_rpc_image: no
       syncd_rpc_image: no
       platform_rpc: no
+      ss_image: no
       ${{ if parameters.qemuOrCrossBuild }}:
         SONIC_SLAVE_DOCKER_DRIVER: 'vfs'
         CACHE_MODE: 'none'
@@ -106,6 +107,7 @@ jobs:
         - name: mellanox
           variables:
             dbg_image: yes
+            ss_image: yes
             docker_syncd_rpc_image: yes
             syncd_rpc_image: yes
             platform_rpc: mlnx
@@ -161,6 +163,9 @@ jobs:
             if [ $(dbg_image) == yes ]; then
               make  $BUILD_OPTIONS INSTALL_DEBUG_TOOLS=y target/sonic-$(GROUP_NAME).bin
               mv target/sonic-$(GROUP_NAME).bin target/sonic-$(GROUP_NAME)-dbg.bin
+            elif [ $(ss_image) == yes ]; then
+              make $BUILD_OPTIONS SMARTSWITCH=1 INCLUDE_DHCP_SERVER=y target/sonic-$(GROUP_NAME).bin
+              mv target/sonic-$(GROUP_NAME).bin target/sonic-$(GROUP_NAME)-smartswitch.bin
             fi
             if [ $(swi_image) == yes ]; then
               make $BUILD_OPTIONS ENABLE_IMAGE_SIGNATURE=y target/sonic-aboot-$(GROUP_NAME).swi

From 71fd069e492963f37a0afc1cb0c50c9dfa725f7e Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 20 Nov 2024 16:02:12 +0800
Subject: [PATCH 237/364] [submodule] Update submodule sonic-swss to the latest
 HEAD automatically (#20853)

#### Why I did it
src/sonic-swss
```
* 1843de47 - (HEAD -> master, origin/master, origin/HEAD) Ensure second route group OID is correct (#3380) (2 hours ago) [Lawrence Lee]
* c86efa18 - Added support for "UNDERLAY_SET_DSCP" and "UNDERLAY_SET_DSCPV6" tables (#3307) (2 hours ago) [siqbal1986]
* 0b331f0d - platform/innovium renaming to platform/marvell-teralynx (#3252) (10 hours ago) [krismarvell]
* c865803e - [mirror] erspan ipv6 underlay (see PR #1817) (#3317) (30 hours ago) [mramezani95]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 2e2d4e59315c..1843de47c7c7 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 2e2d4e59315c377100e73fd07da378663ed74bd9
+Subproject commit 1843de47c7c71e6587a97c8c6ba6d94c76061687

From 99eaa849d6770b85e851c11059b8e7ba1bc3aca1 Mon Sep 17 00:00:00 2001
From: Yuanzhe <150663541+yuazhe@users.noreply.github.com>
Date: Wed, 20 Nov 2024 20:00:33 +0800
Subject: [PATCH 238/364] Delay pmon non-critical daemon (#18907)

- Why I did it
After this pull request #19190 , the pmon has been added to the start list in fast/warm reboot scenarios. However, certain non-critical daemons of pmon could be delayed, resulting in a saving of approximately 1 second in the reboot process. For performance considerations, especially as the current time usage of fast reboot is closer to 30 seconds limitation, this change could ease the pressure.

- How I did it
add a script as fast/warm reboot monitor and relative supervisord rlues.
once the script exited means the reboot process has ended, other delayed daemon would then initialize.

- How to verify it
check the fast/warm reboot time usage

Signed-off-by: Yuanzhe, Liu <yualiu@nvidia.com>
---
 .../pmon_daemon_control.json                  |  3 ++-
 dockers/docker-platform-monitor/delay.py      |  7 ++++++
 .../docker-pmon.supervisord.conf.j2           | 22 ++++++++++++++-----
 3 files changed, 25 insertions(+), 7 deletions(-)
 create mode 100644 dockers/docker-platform-monitor/delay.py

diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn2700-r0/pmon_daemon_control.json
index dbc19c9baabf..8ffea7b92f8e 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/pmon_daemon_control.json
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/pmon_daemon_control.json
@@ -2,6 +2,7 @@
     "skip_ledd": true,
     "skip_fancontrol": true,
     "delay_xcvrd": true,
-    "skip_xcvrd_cmis_mgr": true
+    "skip_xcvrd_cmis_mgr": true,
+    "delay_non_critical_daemon": true
 }
 
diff --git a/dockers/docker-platform-monitor/delay.py b/dockers/docker-platform-monitor/delay.py
new file mode 100644
index 000000000000..986412b25038
--- /dev/null
+++ b/dockers/docker-platform-monitor/delay.py
@@ -0,0 +1,7 @@
+#!/usr/bin/env python3
+
+# This file serves as a monitor for advanced reboot. 
+# Once it exits, the delayed daemon will initiate.
+
+from swsscommon.swsscommon import RestartWaiter
+RestartWaiter.waitAdvancedBootDone()
diff --git a/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2 b/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2
index b023a8f2b0e7..fd2d07296379 100644
--- a/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2
+++ b/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2
@@ -28,6 +28,16 @@ stdout_logfile=syslog
 stderr_logfile=syslog
 dependent_startup=true
 
+
+{% if delay_non_critical_daemon %}
+[program:delay]
+command=python3 /usr/bin/delay.py
+autostart=false
+autorestart=false
+startsecs=0
+dependent_startup=true
+{% endif %}
+
 {% if not skip_chassisd and (IS_MODULAR_CHASSIS == 1 or is_smartswitch) %}
 [program:chassisd]
 command=/usr/local/bin/chassisd
@@ -64,7 +74,7 @@ stdout_logfile=syslog
 stderr_logfile=syslog
 startsecs=0
 dependent_startup=true
-dependent_startup_wait_for=rsyslogd:running
+dependent_startup_wait_for=rsyslogd:running {% if delay_non_critical_daemon %}delay:exited{% endif %}
 {% endif %}
 
 {% if not skip_fancontrol and HAVE_FANCONTROL_CONF == 1 %}
@@ -151,7 +161,7 @@ stdout_logfile=syslog
 stderr_logfile=syslog
 startsecs=10
 dependent_startup=true
-dependent_startup_wait_for=rsyslogd:running
+dependent_startup_wait_for=rsyslogd:running {% if delay_non_critical_daemon %}delay:exited{% endif %}
 {% endif %}
 
 {% if not skip_syseepromd %}
@@ -164,7 +174,7 @@ stdout_logfile=syslog
 stderr_logfile=syslog
 startsecs=10
 dependent_startup=true
-dependent_startup_wait_for=rsyslogd:running
+dependent_startup_wait_for=rsyslogd:running {% if delay_non_critical_daemon %}delay:exited{% endif %}
 {% endif %}
 
 {% if not skip_thermalctld %}
@@ -178,7 +188,7 @@ stderr_logfile=syslog
 startsecs=10
 startretries=50
 dependent_startup=true
-dependent_startup_wait_for=rsyslogd:running
+dependent_startup_wait_for=rsyslogd:running {% if delay_non_critical_daemon %}delay:exited{% endif %}
 {% endif %}
 
 {% if not skip_pcied %}
@@ -191,7 +201,7 @@ stdout_logfile=syslog
 stderr_logfile=syslog
 startsecs=10
 dependent_startup=true
-dependent_startup_wait_for=rsyslogd:running
+dependent_startup_wait_for=rsyslogd:running {% if delay_non_critical_daemon %}delay:exited{% endif %}
 {% endif %}
 
 {% if include_sensormond %}
@@ -204,7 +214,7 @@ stdout_logfile=syslog
 stderr_logfile=syslog
 startsecs=10
 dependent_startup=true
-dependent_startup_wait_for=rsyslogd:running
+dependent_startup_wait_for=rsyslogd:running {% if delay_non_critical_daemon %}delay:exited{% endif %}
 {% endif %}
 
 {% if not skip_stormond %}

From 4c0ef5e0396642d162a2c128314e0c2c097d237e Mon Sep 17 00:00:00 2001
From: Divya Kumaran Chandralekha
 <66686927+divyachandralekha@users.noreply.github.com>
Date: Thu, 21 Nov 2024 01:31:31 +0530
Subject: [PATCH 239/364] Add stp submodule (#20865)

---
 .gitmodules   | 3 +++
 src/sonic-stp | 1 +
 2 files changed, 4 insertions(+)
 create mode 160000 src/sonic-stp

diff --git a/.gitmodules b/.gitmodules
index 487cf6d8a4a8..b833cadbb408 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -127,3 +127,6 @@
 [submodule "platform/innovium/sonic-platform-marvell"]
 	path = platform/innovium/sonic-platform-marvell
 	url = https://github.com/Marvell-switching/sonic-platform-marvell
+[submodule "src/sonic-stp"]
+	path = src/sonic-stp
+	url = https://github.com/Azure/sonic-stp
diff --git a/src/sonic-stp b/src/sonic-stp
new file mode 160000
index 000000000000..69b241d76881
--- /dev/null
+++ b/src/sonic-stp
@@ -0,0 +1 @@
+Subproject commit 69b241d768816507960142e494edfd5bdf5fbe04

From 21388946517268224d1b7f28353d668ae0775575 Mon Sep 17 00:00:00 2001
From: Philo <135693886+philo-micas@users.noreply.github.com>
Date: Thu, 21 Nov 2024 08:16:28 +0800
Subject: [PATCH 240/364] [Micas/Platform]platform support M2-W6920-32QC2X
 (#20626)

* [Micas/Platform]platform support M2-W6920-32QC2X

Signed-off-by: philo <philo@micasnetworks.com>

* update device files

Signed-off-by: philo <philo@micasnetworks.com>

* triggle rebuild

* rebuild

* rebuild

* rebuild

* triggle rebuild

* triggle rebuild

* triggle rebuild

---------

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../M2-W6920-32QC2X/hwsku.json                |  106 +
 .../M2-W6920-32QC2X/port_config.ini           |   35 +
 .../M2-W6920-32QC2X/sai.profile               |    1 +
 .../th3-m2-w6920-32qc2x-32x400G.config.bcm    |  350 +++
 .../x86_64-micas_m2-w6920-32qc2x-r0/cpu.cint  |   85 +
 .../cpu_destroy.cint                          |    2 +
 .../cust_fru.py                               |  135 ++
 .../custom_led.bin                            |  Bin 0 -> 660 bytes
 .../default_sku                               |    1 +
 .../x86_64-micas_m2-w6920-32qc2x-r0/dev.xml   |  459 ++++
 .../dev_exhaust.xml                           |  459 ++++
 .../x86_64-micas_m2-w6920-32qc2x-r0/fru.py    |  961 ++++++++
 .../installer.conf                            |    4 +
 .../media_settings.json                       | 2078 +++++++++++++++++
 .../monitor.py                                |  457 ++++
 .../x86_64-micas_m2-w6920-32qc2x-r0/pcie.yaml |  159 ++
 .../platform.json                             |  501 ++++
 .../platform_asic                             |    1 +
 .../platform_components.json                  |   16 +
 .../platform_env.conf                         |    1 +
 .../plugins/sfputil.py                        |  313 +++
 .../plugins/ssd_util.py                       |  318 +++
 .../pmon_daemon_control.json                  |    3 +
 .../postinit_cmd_file.soc                     |    5 +
 .../system_health_monitoring_config.json      |    0
 platform/broadcom/one-image.mk                |    1 +
 platform/broadcom/platform-modules-micas.mk   |    8 +
 .../debian/control                            |    5 +-
 ...form-modules-micas-m2-w6920-32qc2x.install |    1 +
 ...orm-modules-micas-m2-w6920-32qc2x.postinst |   10 +
 .../debian/rule.mk                            |    1 +
 .../m2-w6920-32qc2x/Makefile                  |   28 +
 .../x86_64_micas_m2_w6920_32qc2x_r0_config.py | 1443 ++++++++++++
 ...64_micas_m2_w6920_32qc2x_r0_port_config.py |   42 +
 .../x86_64_micas_m2_w6920_32qc2x_r0_device.py | 1333 +++++++++++
 ...micas_m2_w6920_32qc2x_r0_exhaust_device.py | 1333 +++++++++++
 ...icas_m2_w6920_32qc2x_r0_exhaust_monitor.py |  213 ++
 ...x86_64_micas_m2_w6920_32qc2x_r0_monitor.py |  213 ++
 .../m2-w6920-32qc2x/modules/driver/Makefile   |   13 +
 .../modules/driver/wb_fpga_i2c_bus_device.c   |  993 ++++++++
 .../modules/driver/wb_fpga_pca954x_device.c   |  413 ++++
 .../modules/driver/wb_i2c_dev_device.c        |  146 ++
 .../modules/driver/wb_io_dev_device.c         |  123 +
 .../modules/driver/wb_lpc_drv_device.c        |  150 ++
 .../modules/driver/wb_pcie_dev_device.c       |  113 +
 .../modules/driver/wb_wdt_device.c            |  155 ++
 .../plat_sysfs_cfg/WB_PLAT_CPLD.cfg           |   35 +
 .../plat_sysfs_cfg/WB_PLAT_FAN.cfg            |  435 ++++
 .../plat_sysfs_cfg/WB_PLAT_PSU.cfg            |   63 +
 .../plat_sysfs_cfg/WB_PLAT_SENSOR.cfg         |  295 +++
 .../plat_sysfs_cfg/WB_PLAT_SFF.cfg            |  323 +++
 .../plat_sysfs_cfg/cfg_file_name              |    5 +
 .../service/set-eth-mac.service               |   14 +
 .../m2-w6920-32qc2x/setup.py                  |   39 +
 54 files changed, 14395 insertions(+), 1 deletion(-)
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/hwsku.json
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/port_config.ini
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/sai.profile
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/th3-m2-w6920-32qc2x-32x400G.config.bcm
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cpu.cint
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cpu_destroy.cint
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cust_fru.py
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/custom_led.bin
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/default_sku
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/dev.xml
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/dev_exhaust.xml
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/fru.py
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/installer.conf
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/media_settings.json
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/monitor.py
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pcie.yaml
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform.json
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_asic
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_components.json
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_env.conf
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/plugins/sfputil.py
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/plugins/ssd_util.py
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pmon_daemon_control.json
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/postinit_cmd_file.soc
 create mode 100644 device/micas/x86_64-micas_m2-w6920-32qc2x-r0/system_health_monitoring_config.json
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-32qc2x.install
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-32qc2x.postinst
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_config.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_port_config.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_device.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_exhaust_device.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_exhaust_monitor.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_monitor.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_i2c_bus_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_pca954x_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_i2c_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_io_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_lpc_drv_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_pcie_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_wdt_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_FAN.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_PSU.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_SENSOR.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_SFF.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/cfg_file_name
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/service/set-eth-mac.service
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/setup.py

diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/hwsku.json b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/hwsku.json
new file mode 100644
index 000000000000..5401dfda99fd
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/hwsku.json
@@ -0,0 +1,106 @@
+{
+	"interfaces": {
+		"Ethernet1": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet9": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet17": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet25": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet33": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet41": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet49": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet57": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet65": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet73": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet81": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet89": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet97": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet105": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet113": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet121": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet129": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet137": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet145": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet153": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet161": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet169": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet177": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet185": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet193": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet201": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet209": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet217": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet225": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet233": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet241": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet249": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet257": {
+			"default_brkout_mode": "1x10G"
+		},
+		"Ethernet258": {
+			"default_brkout_mode": "1x10G"
+		}
+	}
+}
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/port_config.ini b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/port_config.ini
new file mode 100644
index 000000000000..8d631e7cb034
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/port_config.ini
@@ -0,0 +1,35 @@
+# name           lanes                                  alias                     index     speed
+Ethernet1        1,2,3,4,5,6,7,8                        fourHundredGigE0/1        0         400000
+Ethernet9        9,10,11,12,13,14,15,16                 fourHundredGigE0/2        1         400000
+Ethernet17       17,18,19,20,21,22,23,24                fourHundredGigE0/3        2         400000
+Ethernet25       25,26,27,28,29,30,31,32                fourHundredGigE0/4        3         400000
+Ethernet33       33,34,35,36,37,38,39,40                fourHundredGigE0/5        4         400000
+Ethernet41       41,42,43,44,45,46,47,48                fourHundredGigE0/6        5         400000
+Ethernet49       49,50,51,52,53,54,55,56                fourHundredGigE0/7        6         400000
+Ethernet57       57,58,59,60,61,62,63,64                fourHundredGigE0/8        7         400000
+Ethernet65       65,66,67,68,69,70,71,72                fourHundredGigE0/9        8         400000
+Ethernet73       73,74,75,76,77,78,79,80                fourHundredGigE0/10       9         400000
+Ethernet81       81,82,83,84,85,86,87,88                fourHundredGigE0/11       10        400000
+Ethernet89       89,90,91,92,93,94,95,96                fourHundredGigE0/12       11        400000
+Ethernet97       97,98,99,100,101,102,103,104           fourHundredGigE0/13       12        400000
+Ethernet105      105,106,107,108,109,110,111,112        fourHundredGigE0/14       13        400000
+Ethernet113      113,114,115,116,117,118,119,120        fourHundredGigE0/15       14        400000
+Ethernet121      121,122,123,124,125,126,127,128        fourHundredGigE0/16       15        400000
+Ethernet129      129,130,131,132,133,134,135,136        fourHundredGigE0/17       16        400000
+Ethernet137      137,138,139,140,141,142,143,144        fourHundredGigE0/18       17        400000
+Ethernet145      145,146,147,148,149,150,151,152        fourHundredGigE0/19       18        400000
+Ethernet153      153,154,155,156,157,158,159,160        fourHundredGigE0/20       19        400000
+Ethernet161      161,162,163,164,165,166,167,168        fourHundredGigE0/21       20        400000
+Ethernet169      169,170,171,172,173,174,175,176        fourHundredGigE0/22       21        400000
+Ethernet177      177,178,179,180,181,182,183,184        fourHundredGigE0/23       22        400000
+Ethernet185      185,186,187,188,189,190,191,192        fourHundredGigE0/24       23        400000
+Ethernet193      193,194,195,196,197,198,199,200        fourHundredGigE0/25       24        400000
+Ethernet201      201,202,203,204,205,206,207,208        fourHundredGigE0/26       25        400000
+Ethernet209      209,210,211,212,213,214,215,216        fourHundredGigE0/27       26        400000
+Ethernet217      217,218,219,220,221,222,223,224        fourHundredGigE0/28       27        400000
+Ethernet225      225,226,227,228,229,230,231,232        fourHundredGigE0/29       28        400000
+Ethernet233      233,234,235,236,237,238,239,240        fourHundredGigE0/30       29        400000
+Ethernet241      241,242,243,244,245,246,247,248        fourHundredGigE0/31       30        400000
+Ethernet249      249,250,251,252,253,254,255,256        fourHundredGigE0/32       31        400000
+Ethernet257      258                                    tenGigE0/33               32        10000
+Ethernet258      257                                    tenGigE0/34               33        10000
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/sai.profile b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/sai.profile
new file mode 100644
index 000000000000..3f83ed12fa57
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th3-m2-w6920-32qc2x-32x400G.config.bcm
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/th3-m2-w6920-32qc2x-32x400G.config.bcm b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/th3-m2-w6920-32qc2x-32x400G.config.bcm
new file mode 100644
index 000000000000..2fa4334222ca
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/M2-W6920-32QC2X/th3-m2-w6920-32qc2x-32x400G.config.bcm
@@ -0,0 +1,350 @@
+#rate_ext_mdio_divisor=100
+scache_filename=/var/warmboot/wbscache
+stable_size=0x55000000
+stable_location=3
+warmboot_knet_shutdown_mode=1
+sai_postinit_cmd_file=/usr/share/sonic/platform/postinit_cmd_file.soc
+
+pcie_file=/usr/share/sonic/platform/pcie.cint
+capi_level=1
+#port_fec=3
+cfg_int_phy_ctrl.0=1
+mmu_port_num_mc_queue=2
+bcm_tunnel_term_compatible_mode=1
+pbmp_xport_xe.0=0x8ffff8ffffcffff8ffff8ffff8ffffcffff9fffe
+#serdes_tx_taps_ce=pam4:0:140:0:0:0:0
+ccm_dma_enable=0
+ccmdma_intr_enable=0
+ctr_evict_enable=0
+mem_cache_enable=0
+parity_correction=1
+parity_enable=1
+memlist_enable=1
+reglist_enable=1
+fpem_mem_entries=65536
+pll_bypass=1
+init_all_modules=0
+l3_mem_entries=16384
+l3_alpm_enable=2
+ipv6_lpm_128b_enable=0x1
+l3_max_ecmp_mode=1
+svi_my_station_optimization=1
+
+#mgmt
+portmap_38=257:10
+portmap_118=258:10
+
+portmap_1=1:400
+portmap_5=9:400
+portmap_9=17:400
+portmap_13=25:400
+
+portmap_20=33:400
+portmap_24=41:400
+portmap_28=49:400
+portmap_32=57:400
+
+portmap_40=65:400
+portmap_44=73:400
+portmap_48=81:400
+portmap_52=89:400
+
+portmap_60=97:400
+portmap_64=105:400
+portmap_68=113:400
+portmap_72=121:400
+
+portmap_80=129:400
+portmap_84=137:400
+portmap_88=145:400
+portmap_92=153:400
+
+portmap_100=161:400
+portmap_104=169:400
+portmap_108=177:400
+portmap_112=185:400
+
+portmap_120=193:400
+portmap_124=201:400
+portmap_128=209:400
+portmap_132=217:400
+
+portmap_140=225:400
+portmap_144=233:400
+portmap_148=241:400
+portmap_152=249:400
+
+phy_chain_rx_lane_map_physical{1.0}=0x67214530
+phy_chain_tx_lane_map_physical{1.0}=0x53762140
+phy_chain_rx_lane_map_physical{9.0}=0x43712650
+phy_chain_tx_lane_map_physical{9.0}=0x56327014
+phy_chain_rx_lane_map_physical{17.0}=0x40357216
+phy_chain_tx_lane_map_physical{17.0}=0x65320147
+phy_chain_rx_lane_map_physical{25.0}=0x50264137
+phy_chain_tx_lane_map_physical{25.0}=0x62107435
+phy_chain_rx_lane_map_physical{33.0}=0x26470153
+phy_chain_tx_lane_map_physical{33.0}=0x45216730
+phy_chain_rx_lane_map_physical{41.0}=0x21743056
+phy_chain_tx_lane_map_physical{41.0}=0x75036124
+phy_chain_rx_lane_map_physical{49.0}=0x25431760
+phy_chain_tx_lane_map_physical{49.0}=0x56320471
+phy_chain_rx_lane_map_physical{57.0}=0x71460235
+phy_chain_tx_lane_map_physical{57.0}=0x72314650
+phy_chain_rx_lane_map_physical{65.0}=0x64317520
+phy_chain_tx_lane_map_physical{65.0}=0x67304512
+phy_chain_rx_lane_map_physical{73.0}=0x15407236
+phy_chain_tx_lane_map_physical{73.0}=0x16245730
+phy_chain_rx_lane_map_physical{81.0}=0x04735261
+phy_chain_tx_lane_map_physical{81.0}=0x27365401
+phy_chain_rx_lane_map_physical{89.0}=0x61450372
+phy_chain_tx_lane_map_physical{89.0}=0x27514630
+phy_chain_rx_lane_map_physical{97.0}=0x05741362
+phy_chain_tx_lane_map_physical{97.0}=0x13624705
+phy_chain_rx_lane_map_physical{105.0}=0x10426735
+phy_chain_tx_lane_map_physical{105.0}=0x70124635
+phy_chain_rx_lane_map_physical{113.0}=0x34072651
+phy_chain_tx_lane_map_physical{113.0}=0x05712463
+phy_chain_rx_lane_map_physical{121.0}=0x34026517
+phy_chain_tx_lane_map_physical{121.0}=0x14052367
+phy_chain_rx_lane_map_physical{129.0}=0x76413205
+phy_chain_tx_lane_map_physical{129.0}=0x41720365
+phy_chain_rx_lane_map_physical{137.0}=0x72530146
+phy_chain_tx_lane_map_physical{137.0}=0x15437026
+phy_chain_rx_lane_map_physical{145.0}=0x02567413
+phy_chain_tx_lane_map_physical{145.0}=0x45217630
+phy_chain_rx_lane_map_physical{153.0}=0x14265370
+phy_chain_tx_lane_map_physical{153.0}=0x75106432
+phy_chain_rx_lane_map_physical{161.0}=0x53017462
+phy_chain_tx_lane_map_physical{161.0}=0x56104732
+phy_chain_rx_lane_map_physical{169.0}=0x50761243
+phy_chain_tx_lane_map_physical{169.0}=0x65237014
+phy_chain_rx_lane_map_physical{177.0}=0x37612450
+phy_chain_tx_lane_map_physical{177.0}=0x07124563
+phy_chain_rx_lane_map_physical{185.0}=0x31476205
+phy_chain_tx_lane_map_physical{185.0}=0x54236710
+phy_chain_rx_lane_map_physical{193.0}=0x52104763
+phy_chain_tx_lane_map_physical{193.0}=0x06137524
+phy_chain_rx_lane_map_physical{201.0}=0x01543762
+phy_chain_tx_lane_map_physical{201.0}=0x76512043
+phy_chain_rx_lane_map_physical{209.0}=0x10526743
+phy_chain_tx_lane_map_physical{209.0}=0x57204613
+phy_chain_rx_lane_map_physical{217.0}=0x30465172
+phy_chain_tx_lane_map_physical{217.0}=0x07315624
+phy_chain_rx_lane_map_physical{225.0}=0x05176324
+phy_chain_tx_lane_map_physical{225.0}=0x46213507
+phy_chain_rx_lane_map_physical{233.0}=0x23506147
+phy_chain_tx_lane_map_physical{233.0}=0x54376102
+phy_chain_rx_lane_map_physical{241.0}=0x34750612
+phy_chain_tx_lane_map_physical{241.0}=0x56214730
+phy_chain_rx_lane_map_physical{249.0}=0x74125603
+phy_chain_tx_lane_map_physical{249.0}=0x21053467
+
+
+serdes_core_rx_polarity_flip_physical{1}=0x6F
+serdes_core_tx_polarity_flip_physical{1}=0xCD
+serdes_core_rx_polarity_flip_physical{9}=0x36
+serdes_core_tx_polarity_flip_physical{9}=0x7C
+serdes_core_rx_polarity_flip_physical{17}=0x2D
+serdes_core_tx_polarity_flip_physical{17}=0xEB
+serdes_core_rx_polarity_flip_physical{25}=0x0B
+serdes_core_tx_polarity_flip_physical{25}=0xEE
+serdes_core_rx_polarity_flip_physical{33}=0xEB
+serdes_core_tx_polarity_flip_physical{33}=0x7C
+serdes_core_rx_polarity_flip_physical{41}=0x1B
+serdes_core_tx_polarity_flip_physical{41}=0x57
+serdes_core_rx_polarity_flip_physical{49}=0xA4
+serdes_core_tx_polarity_flip_physical{49}=0x0
+serdes_core_rx_polarity_flip_physical{57}=0x74
+serdes_core_tx_polarity_flip_physical{57}=0x54
+serdes_core_rx_polarity_flip_physical{65}=0x3C
+serdes_core_tx_polarity_flip_physical{65}=0xF4
+serdes_core_rx_polarity_flip_physical{73}=0xC7
+serdes_core_tx_polarity_flip_physical{73}=0x40
+serdes_core_rx_polarity_flip_physical{81}=0xD9
+serdes_core_tx_polarity_flip_physical{81}=0x51
+serdes_core_rx_polarity_flip_physical{89}=0xB6
+serdes_core_tx_polarity_flip_physical{89}=0x9C
+serdes_core_rx_polarity_flip_physical{97}=0x80
+serdes_core_tx_polarity_flip_physical{97}=0x84
+serdes_core_rx_polarity_flip_physical{105}=0xE8
+serdes_core_tx_polarity_flip_physical{105}=0x22
+serdes_core_rx_polarity_flip_physical{113}=0xCF
+serdes_core_tx_polarity_flip_physical{113}=0xF7
+serdes_core_rx_polarity_flip_physical{121}=0x73
+serdes_core_tx_polarity_flip_physical{121}=0x7B
+serdes_core_rx_polarity_flip_physical{129}=0x03
+serdes_core_tx_polarity_flip_physical{129}=0x45
+serdes_core_rx_polarity_flip_physical{137}=0x73
+serdes_core_tx_polarity_flip_physical{137}=0x3D
+serdes_core_rx_polarity_flip_physical{145}=0xBD
+serdes_core_tx_polarity_flip_physical{145}=0x72
+serdes_core_rx_polarity_flip_physical{153}=0xD2
+serdes_core_tx_polarity_flip_physical{153}=0xAE
+serdes_core_rx_polarity_flip_physical{161}=0x58
+serdes_core_tx_polarity_flip_physical{161}=0x0C
+serdes_core_rx_polarity_flip_physical{169}=0x75
+serdes_core_tx_polarity_flip_physical{169}=0x13
+serdes_core_rx_polarity_flip_physical{177}=0xAA
+serdes_core_tx_polarity_flip_physical{177}=0x4F
+serdes_core_rx_polarity_flip_physical{185}=0xA8
+serdes_core_tx_polarity_flip_physical{185}=0x96
+serdes_core_rx_polarity_flip_physical{193}=0x87
+serdes_core_tx_polarity_flip_physical{193}=0x17
+serdes_core_rx_polarity_flip_physical{201}=0x18
+serdes_core_tx_polarity_flip_physical{201}=0x13
+serdes_core_rx_polarity_flip_physical{209}=0x11
+serdes_core_tx_polarity_flip_physical{209}=0xB3
+serdes_core_rx_polarity_flip_physical{217}=0xF2
+serdes_core_tx_polarity_flip_physical{217}=0xB7
+serdes_core_rx_polarity_flip_physical{225}=0x78
+serdes_core_tx_polarity_flip_physical{225}=0xB6
+serdes_core_rx_polarity_flip_physical{233}=0x38
+serdes_core_tx_polarity_flip_physical{233}=0x6E
+serdes_core_rx_polarity_flip_physical{241}=0x60
+serdes_core_tx_polarity_flip_physical{241}=0x3C
+serdes_core_rx_polarity_flip_physical{249}=0x1A
+serdes_core_tx_polarity_flip_physical{249}=0xB1
+
+dport_map_port_1=1
+dport_map_port_2=2  
+dport_map_port_3=3  
+dport_map_port_4=4  
+dport_map_port_5=5  
+dport_map_port_6=6  
+dport_map_port_7=7  
+dport_map_port_8=8  
+dport_map_port_9=9  
+dport_map_port_10=10
+dport_map_port_11=11
+dport_map_port_12=12
+dport_map_port_13=13
+dport_map_port_14=14
+dport_map_port_15=15
+dport_map_port_16=16
+dport_map_port_20=17
+dport_map_port_21=18
+dport_map_port_22=19
+dport_map_port_23=20
+dport_map_port_24=21
+dport_map_port_25=22
+dport_map_port_26=23
+dport_map_port_27=24
+dport_map_port_28=25
+dport_map_port_29=26
+dport_map_port_30=27
+dport_map_port_31=28
+dport_map_port_32=29
+dport_map_port_33=30
+dport_map_port_34=31
+dport_map_port_35=32
+dport_map_port_40=33
+dport_map_port_41=34
+dport_map_port_42=35
+dport_map_port_43=36
+dport_map_port_44=37
+dport_map_port_45=38
+dport_map_port_46=39
+dport_map_port_47=40
+dport_map_port_48=41
+dport_map_port_49=42
+dport_map_port_50=43
+dport_map_port_51=44
+dport_map_port_52=45
+dport_map_port_53=46
+dport_map_port_54=47
+dport_map_port_55=48
+dport_map_port_60=49
+dport_map_port_61=50
+dport_map_port_62=51
+dport_map_port_63=52
+dport_map_port_64=53
+dport_map_port_65=54
+dport_map_port_66=55
+dport_map_port_67=56
+dport_map_port_68=57
+dport_map_port_69=58
+dport_map_port_70=59
+dport_map_port_71=60
+dport_map_port_72=61
+dport_map_port_73=62
+dport_map_port_74=63
+dport_map_port_75=64
+dport_map_port_80=65
+dport_map_port_81=66
+dport_map_port_82=67
+dport_map_port_83=68
+dport_map_port_84=69
+dport_map_port_85=70
+dport_map_port_86=71
+dport_map_port_87=72
+dport_map_port_88=73
+dport_map_port_89=74
+dport_map_port_90=75
+dport_map_port_91=76
+dport_map_port_92=77
+dport_map_port_93=78
+dport_map_port_94=79
+dport_map_port_95=80
+dport_map_port_100=81
+dport_map_port_101=82
+dport_map_port_102=83
+dport_map_port_103=84
+dport_map_port_104=85
+dport_map_port_105=86
+dport_map_port_106=87
+dport_map_port_107=88
+dport_map_port_108=89
+dport_map_port_109=90
+dport_map_port_110=91
+dport_map_port_111=92
+dport_map_port_112=93
+dport_map_port_113=94
+dport_map_port_114=95
+dport_map_port_115=96
+dport_map_port_120=97
+dport_map_port_121=98
+dport_map_port_122=99
+dport_map_port_123=100
+dport_map_port_124=101
+dport_map_port_125=102
+dport_map_port_126=103
+dport_map_port_127=104
+dport_map_port_128=105
+dport_map_port_129=106
+dport_map_port_130=107
+dport_map_port_131=108
+dport_map_port_132=109
+dport_map_port_133=110
+dport_map_port_134=111
+dport_map_port_135=112
+dport_map_port_140=113
+dport_map_port_141=114
+dport_map_port_142=115
+dport_map_port_143=116
+dport_map_port_144=117
+dport_map_port_145=118
+dport_map_port_146=119
+dport_map_port_147=120
+dport_map_port_148=121
+dport_map_port_149=122
+dport_map_port_150=123
+dport_map_port_151=124
+dport_map_port_152=125
+dport_map_port_153=126
+dport_map_port_154=127
+dport_map_port_155=128
+
+dport_map_port_118=129
+dport_map_port_38=130
+
+#firmware load, use fast load
+#load_firmware=0x2
+
+core_clock_frequency=1325
+dpr_clock_frequency=1000
+device_clock_frequency=1325
+port_flex_enable=1
+
+#RDMA
+sai_pfc_defaults_disable=1
+sai_optimized_mmu=1
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cpu.cint b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cpu.cint
new file mode 100644
index 000000000000..e286d3cf42a6
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cpu.cint
@@ -0,0 +1,85 @@
+cint_reset();
+
+int cint_field_group_create(int unit, bcm_field_group_t grp)
+{
+    int rv;
+
+    bcm_field_qset_t    qset;
+    bcm_field_aset_t    aset;
+
+    BCM_FIELD_QSET_INIT(qset);
+    BCM_FIELD_QSET_ADD(qset,bcmFieldQualifyDstMac);
+    BCM_FIELD_QSET_ADD(qset, bcmFieldQualifyStageIngress);
+
+    BCM_FIELD_ASET_INIT(aset);
+    BCM_FIELD_ASET_ADD(aset, bcmFieldActionCopyToCpu); 
+
+    rv = bcm_field_group_create_mode_id(unit, qset, 103, bcmFieldGroupModeAuto, grp);
+    if (rv != BCM_E_NONE) {
+        printf("bcm_field_group_create_mode_id failed, rv = %d\r\n", rv);
+        return -1;
+    }
+    printf("cint_field_group_create success!!!, rv = %d\r\n", rv);
+
+    bcm_field_group_dump(unit,grp);   
+    return 0;
+}
+
+int cint_field_entry_create1(int unit, bcm_field_group_t grp,bcm_field_entry_t entry)
+{
+    int rv;
+    bcm_mac_t dst_mac = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+    bcm_mac_t mac_mask = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+	
+    rv = bcm_field_entry_create_id(unit, grp, entry);    
+    if (rv != BCM_E_NONE) {
+        printf("bcm_field_entry_create_id failed, rv = %d\r\n", rv);
+        return -1;
+    }
+
+
+    rv =bcm_field_qualify_DstMac(unit, entry, dst_mac, mac_mask);
+    if (rv != BCM_E_NONE) {
+        printf("bcm_field_qualify_DstMac failed,ret = %d\r\n", rv);
+        bcm_field_entry_destroy(unit, entry);
+        return -1;
+    }
+
+    rv = bcm_field_action_add(unit, entry, bcmFieldActionCopyToCpu, 1, 0);
+    if (rv != BCM_E_NONE) {
+        printf("bcm_field_action_add failed, rv = %d \r\n", rv);
+        bcm_field_entry_destroy(unit, entry);
+        return -1;
+    }
+
+    rv = bcm_field_action_add(unit, entry, bcmFieldActionDrop, 1, 0);
+    if (rv != BCM_E_NONE) {
+        printf("bcm_field_action_add failed, rv = %d \r\n", rv);
+        bcm_field_entry_destroy(unit, entry);
+        return -1;
+    }
+	
+    rv = bcm_field_entry_install(unit, entry);
+    if (rv != BCM_E_NONE) {
+        printf("bcm_field_entry_install failed,ret = %d\r\n", rv);
+        bcm_field_entry_destroy(unit, entry);
+        return -1;
+    }  
+
+    printf("********************* BEGIN ****************************\r\n");
+    bcm_field_entry_dump(unit, entry);
+    printf("*********************** END ****************************\r\n");
+
+    return 0;
+}
+
+cint_field_group_create(0,5);
+cint_field_entry_create1(0,5,2048);
+
+//bcm_field_entry_destroy(0, 2048);
+//bcm_field_group_destroy(0, 5);
+
+
+
+
+
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cpu_destroy.cint b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cpu_destroy.cint
new file mode 100644
index 000000000000..33c8b64b83d2
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cpu_destroy.cint
@@ -0,0 +1,2 @@
+bcm_field_entry_destroy(0, 2048);
+bcm_field_group_destroy(0, 5);
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cust_fru.py b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cust_fru.py
new file mode 100644
index 000000000000..940c722ce467
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/cust_fru.py
@@ -0,0 +1,135 @@
+#!/usr/bin/python
+# -*- coding: utf-8 -*-
+import sys
+import os
+
+
+class CustFruException(Exception):
+    def __init__(self, message='custfrueerror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+
+class CustFru():
+    MAGIC_HEAD_INFO = 0x7a
+
+    _CUST_MAGIC_OFFSET = 0
+    _CUST_MAGIC_LEN = 1
+    _CUST_VERSION_OFFSET = 1
+    _CUST_VERSION_LEN = 6
+    _CUST_CRC_OFFSET = 7
+    _CUST_CRC_LEN = 1
+    _CUST_PRODUCT_NAME_OFFSET = 10
+    _CUST_PRODUCT_NAME_LEN = 17
+    _CUST_MANUFACTURER_OFFSET = 27
+    _CUST_MANUFACTURER_LEN = 7
+    _CUST_SERIAL_NUMBER_OFFSET = 34
+    _CUST_SERIAL_NUMBER_LEN = 25
+    _CUST_INPUT_TYPE_OFFSET = 78
+    _CUST_INPUT_TYPE_LEN = 2
+    _CUST_INPUT_OFFSET = 86
+    _CUST_INPUT_LEN = 15
+    _CUST_OUTPUT_OFFSET = 108
+    _CUST_OUTPUT_LEN = 11
+    _CUST_POWER_OFFSET = 200
+    _CUST_POWER_LEN = 10
+    _CUST_MANUFACTURER_DATE_OFFSET = 210
+    _CUST_MANUFACTURER_DATE_LEN = 3
+
+    def __init__(self):
+        self.magic = ""
+        self.version = ""
+        self.crc = ""
+        self.product_name = ""
+        self.manufacturer = ""
+        self.serial_number = ""
+        self.input_type = ""
+        self.input = ""
+        self.output = ""
+        self.power = ""
+        self.manufacturer_date = ""
+
+    def checksum(self, v):
+        result = 0
+        for item in v:
+            result += ord(item)
+        return (result & 0xff)
+
+    def decode(self, e2):
+        # header
+        e2_index = 0
+        head = ord(e2[0])
+        if head != self.MAGIC_HEAD_INFO:
+            raise CustFruException("Customization fru eeprom head info error, head:0x%x" % head, -10)
+        self.magic = "0x%02x" % self.MAGIC_HEAD_INFO
+
+        # version
+        version = "%s" % (e2[self._CUST_VERSION_OFFSET:self._CUST_VERSION_OFFSET + self._CUST_VERSION_LEN])
+        self.version = version.replace("\xff", "").strip()
+
+        # crc
+        crc_calc = self.checksum(e2[0:self._CUST_CRC_OFFSET])
+        if crc_calc != ord(e2[self._CUST_CRC_OFFSET]):
+            raise CustFruException("Customization fru eeprom crc check error, calc: 0x%x, read: 0x%x" % (crc_calc, ord(e2[self._CUST_CRC_OFFSET])), -10)
+        self.crc = crc_calc
+
+        # Product Name
+        product_name = "%s" % (e2[self._CUST_PRODUCT_NAME_OFFSET:self._CUST_PRODUCT_NAME_OFFSET + self._CUST_PRODUCT_NAME_LEN])
+        self.product_name = product_name.replace("\xff", "").strip()
+
+        # manufacturer
+        manufacturer = "%s" % (e2[self._CUST_MANUFACTURER_OFFSET:self._CUST_MANUFACTURER_OFFSET + self._CUST_MANUFACTURER_LEN])
+        self.manufacturer = manufacturer.strip()
+
+        # serial_number
+        serial_number = "%s" % (e2[self._CUST_SERIAL_NUMBER_OFFSET:self._CUST_SERIAL_NUMBER_OFFSET + self._CUST_SERIAL_NUMBER_LEN])
+        self.serial_number = serial_number.strip()
+
+        # input_type
+        input_type = "%s" % (e2[self._CUST_INPUT_TYPE_OFFSET:self._CUST_INPUT_TYPE_OFFSET + self._CUST_INPUT_TYPE_LEN])
+        self.input_type = input_type.strip()
+
+        # input
+        input = "%s" % (e2[self._CUST_INPUT_OFFSET:self._CUST_INPUT_OFFSET + self._CUST_INPUT_LEN])
+        self.input = input.strip()
+
+        # output
+        output = "%s" % (e2[self._CUST_OUTPUT_OFFSET:self._CUST_OUTPUT_OFFSET + self._CUST_OUTPUT_LEN])
+        self.output = output.strip()
+
+        # power
+        power = "%s" % (e2[self._CUST_POWER_OFFSET:self._CUST_POWER_OFFSET + self._CUST_POWER_LEN])
+        self.power = power.replace("\xff", "").strip()
+
+        # manufacturer_date
+        manufacturer_year = ord(e2[self._CUST_MANUFACTURER_DATE_OFFSET]) + 2000
+        manufacturer_month = ord(e2[self._CUST_MANUFACTURER_DATE_OFFSET + 1])
+        manufacturer_day = ord(e2[self._CUST_MANUFACTURER_DATE_OFFSET + 2])
+        self.manufacturer_date = "%04d-%02d-%02d" % (manufacturer_year, manufacturer_month, manufacturer_day)
+
+        return
+
+
+    def __str__(self):
+        formatstr = "Version            : %s      \n" \
+                    "Product Name       : %s      \n" \
+                    "Manufacturer       : %s      \n" \
+                    "Serial Number      : %s      \n" \
+                    "AC/DC Power Module : %s      \n" \
+                    "INPUT              : %s      \n" \
+                    "OUTPUT             : %s      \n" \
+                    "POWER              : %s      \n" \
+                    "Manufacturer Date  : %s      \n"
+        str_tmp = formatstr % (self.version,
+                            self.product_name,
+                            self.manufacturer,
+                            self.serial_number,
+                            self.input_type,
+                            self.input,
+                            self.output,
+                            self.power,
+                            self.manufacturer_date)
+        return str_tmp.replace("\x00","")
+
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/custom_led.bin
new file mode 100644
index 0000000000000000000000000000000000000000..ef5163140274836cb5fd3f93637f4ae59f4ef028
GIT binary patch
literal 660
zcma(~J!lgF7=3q_TrLgL1`&Ev)VpiI^as3T(AI*NOZw4TiZxKtON%BEIS0Y&Vg`k5
zO;N~?La(tD-K0x<>L9IX#}2|>T?}zZN1YM^f|EuE-K@iV-^Y93dtdYQRk}pel%VFT
z!Um5n_)0gXEP}F3Og|evs`2Fs+9BT}bMBq3np-f8t-dNg7~GTH-ax@q2`qUlFU{Kg
zL#m6`y+smpY-ueQCq=80f`GQt;j<c3$x@%rIVph)4QNaQGL(73u-_S{Tf#b}5_Ovk
zaaLHH?fq)cb{xTBt!W`8)@{!!Cmqs~;-1Z{V%X>0|E+res2JcJ$h?K{VYh#f`&7m0
z^B*s-5hn*4F=DG?JWGN2@i^o$optyK8oYehoFpU3p7JP9X+JSEwX8pKPbeoZ<mDvF
zl$ZBVA|}L2zLhSm(rGHvgUFA_W16EX8E{hiv9dig&bg{NL4v_Hicn3>*ff{sj_8~V
zDMLNF;P4WLypB#iny%}yq#o1^D&w{pOfpe<u;wyS>l&13x?8@J4vgCAR=QhNGeLDB
zV`ti#cD8-pzcIF5B#WNYIyK+Er<qY;dju$UX5-9XeD3W3!nXtbU)le;Ip_xiKY|b;
sAq*8Gh+z^JaRq7I!~$~2qks}DJi`lY;th7N3l}x);|p5&4whk<pGTy|DF6Tf

literal 0
HcmV?d00001

diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/default_sku b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/default_sku
new file mode 100644
index 000000000000..b756112ae670
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/default_sku
@@ -0,0 +1 @@
+M2-W6920-32QC2X l2
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/dev.xml b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/dev.xml
new file mode 100644
index 000000000000..665fb3342357
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/dev.xml
@@ -0,0 +1,459 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--
+      ### type  1 result/1000
+          type  2 result/100
+          type  3 read bit
+     ### property need check must add int front
+-->
+<catalog>
+    <fans>
+        <fan id="fan1" >
+            <property name="present" location="/sys/wb_plat/fan/fan1/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan1/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan1/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/52-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan1/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan1/motor1/speed"/>
+        </fan>
+        <fan id="fan2" >
+            <property name="present" location="/sys/wb_plat/fan/fan2/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan2/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan2/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/51-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan2/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan2/motor1/speed"/>
+        </fan>
+        <fan id="fan3" >
+            <property name="present" location="/sys/wb_plat/fan/fan3/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan3/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan3/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/50-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan3/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan3/motor1/speed"/>
+        </fan>
+        <fan id="fan4" >
+            <property name="present" location="/sys/wb_plat/fan/fan4/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan4/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan4/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/49-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan4/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan4/motor1/speed"/>
+        </fan>
+        <fan id="fan5" >
+            <property name="present" location="/sys/wb_plat/fan/fan5/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan5/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan5/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/48-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan5/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan5/motor1/speed"/>
+        </fan>
+        <fan id="fan6" >
+            <property name="present" location="/sys/wb_plat/fan/fan6/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan6/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan6/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/47-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan6/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan6/motor1/speed"/>
+        </fan>
+    </fans>
+    <temps>
+        <temp id="INLET_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/56-004b/hwmon/*/temp1_input" type="1" addend="-3"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/56-004b/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/56-004b/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="OUTLET_TEMP1" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/53-0048/hwmon/*/temp1_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/53-0048/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/53-0048/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="OUTLET_TEMP2" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/53-0049/hwmon/*/temp1_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/53-0049/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/53-0049/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="MAC_TEMP1" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/56-004c/hwmon/*/temp2_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/56-004c/hwmon/*/temp2_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/56-004c/hwmon/*/temp2_crit_hyst" type="1" />
+        </temp>
+        <temp id="MAC_TEMP2" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/57-004c/hwmon/*/temp2_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/57-004c/hwmon/*/temp2_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/57-004c/hwmon/*/temp2_crit_hyst" type="1" />
+        </temp>
+    </temps>
+    <psus>
+        <psu id="psu1" >
+            <property name="present" location="/sys/wb_plat/psu/psu1/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu1/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/59-0050/eeprom"/>
+            <property name="in_current"    location="/sys/bus/i2c/devices/59-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"    location="/sys/bus/i2c/devices/59-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/59-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/59-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/59-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/59-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/59-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/59-0058/hwmon/*/power2_input"  type="5"/>
+        </psu>
+        <psu id="psu2" >
+            <property name="present" location="/sys/wb_plat/psu/psu2/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu2/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/58-0050/eeprom"/>
+            <property name="in_current"    location="/sys/bus/i2c/devices/58-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"    location="/sys/bus/i2c/devices/58-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/58-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/58-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/58-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/58-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/58-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/58-0058/hwmon/*/power2_input"  type="5"/>
+        </psu>
+    </psus>
+    <dcdcs>
+        <dcdc id="MAC_VCC12V_CON" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="12.600" />
+            <property name="dcdc_min"   gettype="config" value="11.400" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD1.0V_FPGA" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.050" />
+            <property name="dcdc_min"   gettype="config" value="0.950" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD1.8V_FPGA" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.890" />
+            <property name="dcdc_min"   gettype="config" value="1.710" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD1.2V_FPGA" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.280" />
+            <property name="dcdc_min"   gettype="config" value="1.130" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD3.3V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in5_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.465" />
+            <property name="dcdc_min"   gettype="config" value="3.135" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_DVDD3.3V_1.8V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in6_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.465" />
+            <property name="dcdc_min"   gettype="config" value="3.135" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_AVDD1.8V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in7_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.890" />
+            <property name="dcdc_min"   gettype="config" value="1.710" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_DVDD1.2V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in8_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.280" />
+            <property name="dcdc_min"   gettype="config" value="1.130" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_AVDD1.2V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in9_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.280" />
+            <property name="dcdc_min"   gettype="config" value="1.130" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD3.3V_SFP+" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in10_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.465" />
+            <property name="dcdc_min"   gettype="config" value="3.135" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD3.3V_CLK" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in11_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.465" />
+            <property name="dcdc_min"   gettype="config" value="3.135" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD5V_VR" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in13_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="5.500" />
+            <property name="dcdc_min"   gettype="config" value="4.500" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD_CORE" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in14_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.980" />
+            <property name="dcdc_min"   gettype="config" value="0.700" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD_ANALOG" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in15_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.920" />
+            <property name="dcdc_min"   gettype="config" value="0.760" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD_ANALOG1" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in16_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.920" />
+            <property name="dcdc_min"   gettype="config" value="0.760" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="BASE_VDD3.3V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.465" />
+            <property name="dcdc_min"   gettype="config" value="3.135" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="BASE_VDD12V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="12.600" />
+            <property name="dcdc_min"   gettype="config" value="11.400" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="BASE_VDD3.3_STBY" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.465" />
+            <property name="dcdc_min"   gettype="config" value="3.135" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="BASE_SSD1_VDD3.3V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in5_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.465" />
+            <property name="dcdc_min"   gettype="config" value="3.135" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="BASE_PHY_VDD1V0" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in6_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.100" />
+            <property name="dcdc_min"   gettype="config" value="0.950" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="BASE_OVDD_PHY_M" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in7_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.465" />
+            <property name="dcdc_min"   gettype="config" value="3.135" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="CPU_VCCP" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/42-0068/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.364" />
+            <property name="dcdc_min"   gettype="config" value="0.468" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="CPU_VNN" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/42-0068/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.364" />
+            <property name="dcdc_min"   gettype="config" value="0.585" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="CPU_P1V05" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/42-006e/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.155" />
+            <property name="dcdc_min"   gettype="config" value="0.945" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="CPU_VCCRAM" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/42-006e/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.320" />
+            <property name="dcdc_min"   gettype="config" value="0.675" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="CPU_P1V2_VDDQ" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/42-005e/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.320" />
+            <property name="dcdc_min"   gettype="config" value="1.080" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD3.3_MON" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in3/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.560" />
+            <property name="dcdc_min"   gettype="config" value="3.040" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_QSFPDD_VDD3.3V_A" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in1/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.560" />
+            <property name="dcdc_min"   gettype="config" value="3.040" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_QSFPDD_VDD3.3V_B" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in2/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.560" />
+            <property name="dcdc_min"   gettype="config" value="3.040" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD3.7V_CLK" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in4/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="4.000" />
+            <property name="dcdc_min"   gettype="config" value="3.500" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD5V_USB" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in5/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="5.500" />
+            <property name="dcdc_min"   gettype="config" value="4.500" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="FAN6_VDD12V" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in11/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="12.600" />
+            <property name="dcdc_min"   gettype="config" value="11.400" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="FAN5_VDD12V" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in10/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="12.600" />
+            <property name="dcdc_min"   gettype="config" value="11.400" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="FAN4_VDD12V" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in9/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="12.600" />
+            <property name="dcdc_min"   gettype="config" value="11.400" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="FAN3_VDD12V" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in8/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="12.600" />
+            <property name="dcdc_min"   gettype="config" value="11.400" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="FAN2_VDD12V" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in7/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="12.600" />
+            <property name="dcdc_min"   gettype="config" value="11.400" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="FAN1_VDD12V" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in6/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="12.600" />
+            <property name="dcdc_min"   gettype="config" value="11.400" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="FAN_VDD3.3V" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in12/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.560" />
+            <property name="dcdc_min"   gettype="config" value="3.040" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+    </dcdcs>
+    <mactemps>
+        <mactemp id="MAC_DIE_0" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp1_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_1" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp2_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_2" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp3_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_3" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp4_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_4" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp5_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_5" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp6_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_6" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp7_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_7" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp8_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_8" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp9_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_9" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp10_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_10" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp11_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_11" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp12_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_12" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp13_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_13" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp14_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_14" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp15_input"  type="1"/>
+        </mactemp>
+    </mactemps>
+    <cpus location="/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*"/>
+    <decode>
+    <fanpresent>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </fanpresent>
+    <fanstatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </fanstatus>
+    <psucheck>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </psucheck>
+    <psustatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </psustatus>
+    <psutype>
+        <code key="GW-CRPS1300D" value="PA1300I-F"/>
+        <code key="DPS-1300AB-6 F" value="PA1300I-F"/>
+        <code key="DPS-1300AB-6 S" value="PA1300I-F"/>
+        <code key="CRPS1300D3R" value="PA1300I-R"/>
+        <code key="DPS-1300AB-11 C" value="PA1300I-R"/>
+    </psutype>
+    <fan_display_name>
+        <code key="M1HFAN IV-F" value="M1HFAN IV-F"/>
+        <code key="M1HFAN IV-R" value="M1HFAN IV-R"/>
+    </fan_display_name>
+    </decode>
+</catalog>
+
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/dev_exhaust.xml b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/dev_exhaust.xml
new file mode 100644
index 000000000000..2a4708da7a92
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/dev_exhaust.xml
@@ -0,0 +1,459 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--
+      ### type  1 result/1000
+          type  2 result/100
+          type  3 read bit
+     ### property need check must add int front
+-->
+<catalog>
+    <fans>
+        <fan id="fan1" >
+            <property name="present" location="/sys/wb_plat/fan/fan1/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan1/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan1/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/52-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan1/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan1/motor1/speed"/>
+        </fan>
+        <fan id="fan2" >
+            <property name="present" location="/sys/wb_plat/fan/fan2/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan2/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan2/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/51-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan2/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan2/motor1/speed"/>
+        </fan>
+        <fan id="fan3" >
+            <property name="present" location="/sys/wb_plat/fan/fan3/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan3/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan3/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/50-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan3/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan3/motor1/speed"/>
+        </fan>
+        <fan id="fan4" >
+            <property name="present" location="/sys/wb_plat/fan/fan4/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan4/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan4/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/49-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan4/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan4/motor1/speed"/>
+        </fan>
+        <fan id="fan5" >
+            <property name="present" location="/sys/wb_plat/fan/fan5/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan5/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan5/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/48-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan5/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan5/motor1/speed"/>
+        </fan>
+        <fan id="fan6" >
+            <property name="present" location="/sys/wb_plat/fan/fan6/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan6/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan6/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/47-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan6/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan6/motor1/speed"/>
+        </fan>
+    </fans>
+    <temps>
+        <temp id="INLET_TEMP1" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/53-0048/hwmon/*/temp1_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/53-0048/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/53-0048/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="INLET_TEMP2" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/53-0049/hwmon/*/temp1_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/53-0049/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/53-0049/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="OUTLET_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/56-004b/hwmon/*/temp1_input" type="1" addend="-3"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/56-004b/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/56-004b/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="MAC_TEMP1" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/56-004c/hwmon/*/temp2_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/56-004c/hwmon/*/temp2_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/56-004c/hwmon/*/temp2_crit_hyst" type="1" />
+        </temp>
+        <temp id="MAC_TEMP2" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/57-004c/hwmon/*/temp2_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/57-004c/hwmon/*/temp2_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/57-004c/hwmon/*/temp2_crit_hyst" type="1" />
+        </temp>
+    </temps>
+    <psus>
+        <psu id="psu1" >
+            <property name="present" location="/sys/wb_plat/psu/psu1/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu1/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/59-0050/eeprom"/>
+            <property name="in_current"    location="/sys/bus/i2c/devices/59-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"    location="/sys/bus/i2c/devices/59-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/59-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/59-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/59-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/59-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/59-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/59-0058/hwmon/*/power2_input"  type="5"/>
+        </psu>
+        <psu id="psu2" >
+            <property name="present" location="/sys/wb_plat/psu/psu2/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu2/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/58-0050/eeprom"/>
+            <property name="in_current"    location="/sys/bus/i2c/devices/58-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"    location="/sys/bus/i2c/devices/58-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/58-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/58-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/58-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/58-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/58-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/58-0058/hwmon/*/power2_input"  type="5"/>
+        </psu>
+    </psus>
+    <dcdcs>
+        <dcdc id="MAC_VCC12V_CON" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="12.600" />
+            <property name="dcdc_min"   gettype="config" value="11.400" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD1.0V_FPGA" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.050" />
+            <property name="dcdc_min"   gettype="config" value="0.950" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD1.8V_FPGA" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.890" />
+            <property name="dcdc_min"   gettype="config" value="1.710" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD1.2V_FPGA" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.280" />
+            <property name="dcdc_min"   gettype="config" value="1.130" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD3.3V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in5_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.465" />
+            <property name="dcdc_min"   gettype="config" value="3.135" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_DVDD3.3V_1.8V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in6_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.465" />
+            <property name="dcdc_min"   gettype="config" value="3.135" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_AVDD1.8V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in7_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.890" />
+            <property name="dcdc_min"   gettype="config" value="1.710" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_DVDD1.2V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in8_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.280" />
+            <property name="dcdc_min"   gettype="config" value="1.130" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_AVDD1.2V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in9_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.280" />
+            <property name="dcdc_min"   gettype="config" value="1.130" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD3.3V_SFP+" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in10_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.465" />
+            <property name="dcdc_min"   gettype="config" value="3.135" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD3.3V_CLK" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in11_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.465" />
+            <property name="dcdc_min"   gettype="config" value="3.135" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD5V_VR" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in13_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="5.500" />
+            <property name="dcdc_min"   gettype="config" value="4.500" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD_CORE" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in14_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.980" />
+            <property name="dcdc_min"   gettype="config" value="0.700" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD_ANALOG" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in15_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.920" />
+            <property name="dcdc_min"   gettype="config" value="0.760" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD_ANALOG1" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in16_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.920" />
+            <property name="dcdc_min"   gettype="config" value="0.760" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="BASE_VDD3.3V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.465" />
+            <property name="dcdc_min"   gettype="config" value="3.135" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="BASE_VDD12V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="12.600" />
+            <property name="dcdc_min"   gettype="config" value="11.400" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="BASE_VDD3.3_STBY" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.465" />
+            <property name="dcdc_min"   gettype="config" value="3.135" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="BASE_SSD1_VDD3.3V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in5_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.465" />
+            <property name="dcdc_min"   gettype="config" value="3.135" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="BASE_PHY_VDD1V0" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in6_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.100" />
+            <property name="dcdc_min"   gettype="config" value="0.950" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="BASE_OVDD_PHY_M" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in7_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.465" />
+            <property name="dcdc_min"   gettype="config" value="3.135" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="CPU_VCCP" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/42-0068/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.364" />
+            <property name="dcdc_min"   gettype="config" value="0.468" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="CPU_VNN" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/42-0068/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.364" />
+            <property name="dcdc_min"   gettype="config" value="0.585" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="CPU_P1V05" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/42-006e/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.155" />
+            <property name="dcdc_min"   gettype="config" value="0.945" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="CPU_VCCRAM" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/42-006e/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.320" />
+            <property name="dcdc_min"   gettype="config" value="0.675" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="CPU_P1V2_VDDQ" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/42-005e/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.320" />
+            <property name="dcdc_min"   gettype="config" value="1.080" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD3.3_MON" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in3/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.560" />
+            <property name="dcdc_min"   gettype="config" value="3.040" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_QSFPDD_VDD3.3V_A" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in1/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.560" />
+            <property name="dcdc_min"   gettype="config" value="3.040" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_QSFPDD_VDD3.3V_B" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in2/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.560" />
+            <property name="dcdc_min"   gettype="config" value="3.040" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD3.7V_CLK" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in4/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="4.000" />
+            <property name="dcdc_min"   gettype="config" value="3.500" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD5V_USB" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in5/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="5.500" />
+            <property name="dcdc_min"   gettype="config" value="4.500" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="FAN6_VDD12V" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in11/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="12.600" />
+            <property name="dcdc_min"   gettype="config" value="11.400" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="FAN5_VDD12V" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in10/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="12.600" />
+            <property name="dcdc_min"   gettype="config" value="11.400" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="FAN4_VDD12V" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in9/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="12.600" />
+            <property name="dcdc_min"   gettype="config" value="11.400" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="FAN3_VDD12V" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in8/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="12.600" />
+            <property name="dcdc_min"   gettype="config" value="11.400" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="FAN2_VDD12V" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in7/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="12.600" />
+            <property name="dcdc_min"   gettype="config" value="11.400" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="FAN1_VDD12V" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in6/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="12.600" />
+            <property name="dcdc_min"   gettype="config" value="11.400" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="FAN_VDD3.3V" >
+            <property name="dcdc_input" location="/sys/wb_plat/sensor/in12/in_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.560" />
+            <property name="dcdc_min"   gettype="config" value="3.040" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+    </dcdcs>
+    <mactemps>
+        <mactemp id="MAC_DIE_0" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp1_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_1" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp2_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_2" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp3_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_3" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp4_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_4" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp5_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_5" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp6_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_6" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp7_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_7" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp8_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_8" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp9_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_9" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp10_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_10" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp11_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_11" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp12_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_12" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp13_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_13" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp14_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_14" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/62-0044/hwmon/hwmon*/temp15_input"  type="1"/>
+        </mactemp>
+    </mactemps>
+    <cpus location="/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*"/>
+    <decode>
+    <fanpresent>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </fanpresent>
+    <fanstatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </fanstatus>
+    <psucheck>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </psucheck>
+    <psustatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </psustatus>
+    <psutype>
+        <code key="GW-CRPS1300D" value="PA1300I-F"/>
+        <code key="DPS-1300AB-6 F" value="PA1300I-F"/>
+        <code key="DPS-1300AB-6 S" value="PA1300I-F"/>
+        <code key="CRPS1300D3R" value="PA1300I-R"/>
+        <code key="DPS-1300AB-11 C" value="PA1300I-R"/>
+    </psutype>
+    <fan_display_name>
+        <code key="M1HFAN IV-F" value="M1HFAN IV-F"/>
+        <code key="M1HFAN IV-R" value="M1HFAN IV-R"/>
+    </fan_display_name>
+    </decode>
+</catalog>
+
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/fru.py b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/fru.py
new file mode 100644
index 000000000000..f95164e03601
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/fru.py
@@ -0,0 +1,961 @@
+#!/usr/bin/python3
+import collections
+from datetime import datetime, timedelta
+from bitarray import bitarray
+
+
+__DEBUG__ = "N"
+
+
+class FruException(Exception):
+    def __init__(self, message='fruerror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+
+def e_print(err):
+    print("ERROR: " + err)
+
+
+def d_print(debug_info):
+    if __DEBUG__ == "Y":
+        print(debug_info)
+
+
+class FruUtil():
+    @staticmethod
+    def decodeLength(value):
+        a = bitarray(8)
+        a.setall(True)
+        a[0:1] = 0
+        a[1:2] = 0
+        x = ord(a.tobytes())
+        return x & ord(value)
+
+    @staticmethod
+    def minToData():
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        endtime = datetime.now()
+        seconds = (endtime - starttime).total_seconds()
+        mins = seconds // 60
+        m = int(round(mins))
+        return m
+
+    @staticmethod
+    def getTimeFormat():
+        return datetime.now().strftime('%Y-%m-%d')
+
+    @staticmethod
+    def getTypeLength(value):
+        if value is None or len(value) == 0:
+            return 0
+        a = bitarray(8)
+        a.setall(False)
+        a[0:1] = 1
+        a[1:2] = 1
+        x = ord(a.tobytes())
+        return x | len(value)
+
+    @staticmethod
+    def checksum(b):
+        result = 0
+        for item in b:
+            result += ord(item)
+        return (0x100 - (result & 0xff)) & 0xff
+
+
+class BaseArea(object):
+    SUGGESTED_SIZE_COMMON_HEADER = 8
+    SUGGESTED_SIZE_INTERNAL_USE_AREA = 72
+    SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32
+    SUGGESTED_SIZE_BOARD_INFO_AREA = 80
+    SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80
+
+    INITVALUE = b'\x00'
+    resultvalue = INITVALUE * 256
+    COMMON_HEAD_VERSION = b'\x01'
+    __childList = None
+
+    def __init__(self, name="", size=0, offset=0):
+        self.__childList = []
+        self._offset = offset
+        self.name = name
+        self._size = size
+        self._isPresent = False
+        self._data = b'\x00' * size
+
+    @property
+    def childList(self):
+        return self.__childList
+
+    @childList.setter
+    def childList(self, value):
+        self.__childList = value
+
+    @property
+    def offset(self):
+        return self._offset
+
+    @offset.setter
+    def offset(self, value):
+        self._offset = value
+
+    @property
+    def size(self):
+        return self._size
+
+    @size.setter
+    def size(self, value):
+        self._size = value
+
+    @property
+    def data(self):
+        return self._data
+
+    @data.setter
+    def data(self, value):
+        self._data = value
+
+    @property
+    def isPresent(self):
+        return self._isPresent
+
+    @isPresent.setter
+    def isPresent(self, value):
+        self._isPresent = value
+
+
+class InternalUseArea(BaseArea):
+    pass
+
+
+class ChassisInfoArea(BaseArea):
+    pass
+
+
+class BoardInfoArea(BaseArea):
+    _boardTime = None
+    _fields = None
+    _mfg_date = None
+    areaversion = None
+    _boardversion = None
+    _language = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "mfg_date            : %s \n" \
+                    "boardManufacturer   : %s \n" \
+                    "boardProductName    : %s \n" \
+                    "boardSerialNumber   : %s \n" \
+                    "boardPartNumber     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.boardversion), self.size,
+                              self.language, self.getMfgRealData(),
+                              self.boardManufacturer, self.boardProductName,
+                              self.boardSerialNumber, self.boardPartNumber,
+                              self.fruFileId)
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "boardextra%d         : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["boardversion"] = ord(self.boardversion)
+        dic["boardlength"] = self.size
+        dic["boardlanguage"] = self.language
+        dic["boardmfg_date"] = self.getMfgRealData()
+        dic["boardManufacturer"] = self.boardManufacturer
+        dic["boardProductName"] = self.boardProductName
+        dic["boardSerialNumber"] = self.boardSerialNumber
+        dic["boardPartNumber"] = self.boardPartNumber
+        dic["boardfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]
+        index += 1
+        d_print("decode length :%d class size:%d" %
+                ((ord(self.data[index]) * 8), self.size))
+        index += 2
+
+        timetmp = self.data[index: index + 3]
+        self.mfg_date = ord(timetmp[0]) | (
+            ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16)
+        d_print("decode getMfgRealData :%s" % self.getMfgRealData())
+        index += 3
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardManufacturer:%s" % self.boardManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardProductName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardProductName:%s" % self.boardProductName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardSerialNumber:%s" % self.boardSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardPartNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardPartNumber:%s" % self.boardPartNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if self.data[index] != chr(0xc1):
+                templen = FruUtil.decodeLength(self.data[index])
+                tmpval = self.data[index + 1: index + templen + 1]
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+            else:
+                break
+
+    def fruSetValue(self, field, value):
+        tmp_field = getattr(self, field, None)
+        if tmp_field is not None:
+            setattr(self, field, value)
+
+    def recalcute(self):
+        d_print("boardInfoArea version:%x" % ord(self.boardversion))
+        d_print("boardInfoArea length:%d" % self.size)
+        d_print("boardInfoArea language:%x" % self.language)
+        self.mfg_date = FruUtil.minToData()
+        d_print("boardInfoArea mfg_date:%x" % self.mfg_date)
+
+        self.data = chr(ord(self.boardversion)) + \
+            chr(self.size // 8) + chr(self.language)
+
+        self.data += chr(self.mfg_date & 0xFF)
+        self.data += chr((self.mfg_date >> 8) & 0xFF)
+        self.data += chr((self.mfg_date >> 16) & 0xFF)
+
+        d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer)
+        typelength = FruUtil.getTypeLength(self.boardManufacturer)
+        self.data += chr(typelength)
+        self.data += self.boardManufacturer
+
+        d_print("boardInfoArea boardProductName:%s" % self.boardProductName)
+        self.data += chr(FruUtil.getTypeLength(self.boardProductName))
+        self.data += self.boardProductName
+
+        d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber))
+        self.data += self.boardSerialNumber
+
+        d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardPartNumber))
+        self.data += self.boardPartNumber
+
+        d_print("boardInfoArea fruFileId:%s" % self.fruFileId)
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is not None:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) // 8 + 1
+            self.size += incr * 8
+
+        self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+        d_print("self data:%d" % len(self.data))
+        d_print("self size:%d" % self.size)
+        d_print("adjust size:%d" % (self.size - len(self.data) - 1))
+        self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+
+        # checksum
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+    def getMfgRealData(self):
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        mactime = starttime + timedelta(minutes=self.mfg_date)
+        return mactime
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def mfg_date(self):
+        return self._mfg_date
+
+    @mfg_date.setter
+    def mfg_date(self, val):
+        self._mfg_date = val
+
+    @property
+    def boardversion(self):
+        self._boardversion = self.COMMON_HEAD_VERSION
+        return self._boardversion
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, val):
+        self._FRUFileID = val
+
+    @property
+    def boardPartNumber(self):
+        return self._boardPartNumber
+
+    @boardPartNumber.setter
+    def boardPartNumber(self, val):
+        self._boardPartNumber = val
+
+    @property
+    def boardSerialNumber(self):
+        return self._boardSerialNumber
+
+    @boardSerialNumber.setter
+    def boardSerialNumber(self, val):
+        self._boardSerialNumber = val
+
+    @property
+    def boardProductName(self):
+        return self._boradProductName
+
+    @boardProductName.setter
+    def boardProductName(self, val):
+        self._boradProductName = val
+
+    @property
+    def boardManufacturer(self):
+        return self._boardManufacturer
+
+    @boardManufacturer.setter
+    def boardManufacturer(self, val):
+        self._boardManufacturer = val
+
+    @property
+    def boardTime(self):
+        return self._boardTime
+
+    @boardTime.setter
+    def boardTime(self, val):
+        self._boardTime = val
+
+    @property
+    def fields(self):
+        return self._fields
+
+    @fields.setter
+    def fields(self, val):
+        self._fields = val
+
+
+class ProductInfoArea(BaseArea):
+    _productManufacturer = None
+    _productAssetTag = None
+    _FRUFileID = None
+    _language = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "productManufacturer : %s \n" \
+                    "productName         : %s \n" \
+                    "productPartModelName: %s \n" \
+                    "productVersion      : %s \n" \
+                    "productSerialNumber : %s \n" \
+                    "productAssetTag     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.areaversion), self.size,
+                              self.language, self.productManufacturer,
+                              self.productName, self.productPartModelName,
+                              self.productVersion, self.productSerialNumber,
+                              self.productAssetTag, self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "productextra%d       : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["productversion"] = ord(self.areaversion)
+        dic["productlength"] = self.size
+        dic["productlanguage"] = self.language
+        dic["productManufacturer"] = self.productManufacturer
+        dic["productName"] = self.productName
+        dic["productPartModelName"] = self.productPartModelName
+        dic["productVersion"] = int(self.productVersion, 16)
+        dic["productSerialNumber"] = self.productSerialNumber
+        dic["productAssetTag"] = self.productAssetTag
+        dic["productfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]  # 0
+        index += 1
+        d_print("decode length %d" % (ord(self.data[index]) * 8))
+        d_print("class size %d" % self.size)
+        index += 2
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productManufacturer:%s" % self.productManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productName:%s" % self.productName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productPartModelName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productPartModelName:%s" % self.productPartModelName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productVersion = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productVersion:%s" % self.productVersion)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productSerialNumber:%s" % self.productSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productAssetTag = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productAssetTag:%s" % self.productAssetTag)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if self.data[index] != chr(0xc1) and index < self.size - 1:
+                templen = FruUtil.decodeLength(self.data[index])
+                if templen == 0:
+                    break
+                tmpval = self.data[index + 1: index + templen + 1]
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+            else:
+                break
+
+    @property
+    def productVersion(self):
+        return self._productVersion
+
+    @productVersion.setter
+    def productVersion(self, name):
+        self._productVersion = name
+
+    @property
+    def areaversion(self):
+        self._areaversion = self.COMMON_HEAD_VERSION
+        return self._areaversion
+
+    @areaversion.setter
+    def areaversion(self, name):
+        self._areaversion = name
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def productManufacturer(self):
+        return self._productManufacturer
+
+    @productManufacturer.setter
+    def productManufacturer(self, name):
+        self._productManufacturer = name
+
+    @property
+    def productName(self):
+        return self._productName
+
+    @productName.setter
+    def productName(self, name):
+        self._productName = name
+
+    @property
+    def productPartModelName(self):
+        return self._productPartModelName
+
+    @productPartModelName.setter
+    def productPartModelName(self, name):
+        self._productPartModelName = name
+
+    @property
+    def productSerialNumber(self):
+        return self._productSerialNumber
+
+    @productSerialNumber.setter
+    def productSerialNumber(self, name):
+        self._productSerialNumber = name
+
+    @property
+    def productAssetTag(self):
+        return self._productAssetTag
+
+    @productAssetTag.setter
+    def productAssetTag(self, name):
+        self._productAssetTag = name
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, name):
+        self._FRUFileID = name
+
+    def fruSetValue(self, field, value):
+        tmp_field = getattr(self, field, None)
+        if tmp_field is not None:
+            setattr(self, field, value)
+
+    def recalcute(self):
+        d_print("product version:%x" % ord(self.areaversion))
+        d_print("product length:%d" % self.size)
+        d_print("product language:%x" % self.language)
+        self.data = chr(ord(self.areaversion)) + \
+            chr(self.size // 8) + chr(self.language)
+
+        typelength = FruUtil.getTypeLength(self.productManufacturer)
+        self.data += chr(typelength)
+        self.data += self.productManufacturer
+
+        self.data += chr(FruUtil.getTypeLength(self.productName))
+        self.data += self.productName
+
+        self.data += chr(FruUtil.getTypeLength(self.productPartModelName))
+        self.data += self.productPartModelName
+
+        self.data += chr(FruUtil.getTypeLength(self.productVersion))
+        self.data += self.productVersion
+
+        self.data += chr(FruUtil.getTypeLength(self.productSerialNumber))
+        self.data += self.productSerialNumber
+
+        self.data += chr(FruUtil.getTypeLength(self.productAssetTag))
+        if self.productAssetTag is not None:
+            self.data += self.productAssetTag
+
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea productextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is not None:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) // 8 + 1
+            self.size += incr * 8
+        d_print("self.data:%d" % len(self.data))
+        d_print("self.size:%d" % self.size)
+
+        self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+        self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+
+class MultiRecordArea(BaseArea):
+    pass
+
+
+class Field(object):
+
+    def __init__(self, fieldType="ASCII", fieldData=""):
+        self.fieldData = fieldData
+        self.fieldType = fieldType
+
+    @property
+    def fieldType(self):
+        return self.fieldType
+
+    @property
+    def fieldData(self):
+        return self.fieldData
+
+
+class ipmifru(BaseArea):
+    _BoardInfoArea = None
+    _ProductInfoArea = None
+    _InternalUseArea = None
+    _ChassisInfoArea = None
+    _multiRecordArea = None
+    _productinfoAreaOffset = BaseArea.INITVALUE
+    _boardInfoAreaOffset = BaseArea.INITVALUE
+    _internalUserAreaOffset = BaseArea.INITVALUE
+    _chassicInfoAreaOffset = BaseArea.INITVALUE
+    _multiRecordAreaOffset = BaseArea.INITVALUE
+    _bindata = None
+    _bodybin = None
+    _version = BaseArea.COMMON_HEAD_VERSION
+    _zeroCheckSum = None
+    _frusize = 256
+
+    def __str__(self):
+        tmpstr = ""
+        if self.boardInfoArea.isPresent:
+            tmpstr += "\nboardinfoarea: \n"
+            tmpstr += self.boardInfoArea.__str__()
+        if self.productInfoArea.isPresent:
+            tmpstr += "\nproductinfoarea: \n"
+            tmpstr += self.productInfoArea.__str__()
+        return tmpstr
+
+    def decodeBin(self, eeprom):
+        commonHead = eeprom[0:8]
+        d_print("decode version %x" % ord(commonHead[0]))
+        if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]):
+            raise FruException("HEAD VERSION error,not Fru format!", -10)
+        if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]):
+            strtemp = "check header checksum error [cal:%02x data:%02x]" % (
+                FruUtil.checksum(commonHead[0:7]), ord(commonHead[7]))
+            raise FruException(strtemp, -3)
+        if ord(commonHead[1]) != ord(self.INITVALUE):
+            d_print("Internal Use Area is present")
+            self.internalUseArea = InternalUseArea(
+                name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA)
+            self.internalUseArea.isPresent = True
+            self.internalUserAreaOffset = ord(commonHead[1])
+            self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: (
+                self.internalUserAreaOffset * 8 + self.internalUseArea.size)]
+        if ord(commonHead[2]) != ord(self.INITVALUE):
+            d_print("Chassis Info Area is present")
+            self.chassisInfoArea = ChassisInfoArea(
+                name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA)
+            self.chassisInfoArea.isPresent = True
+            self.chassicInfoAreaOffset = ord(commonHead[2])
+            self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: (
+                self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)]
+        if ord(commonHead[3]) != ord(self.INITVALUE):
+            self.boardInfoArea = BoardInfoArea(
+                name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA)
+            self.boardInfoArea.isPresent = True
+            self.boardInfoAreaOffset = ord(commonHead[3])
+            self.boardInfoArea.size = ord(
+                eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8
+            d_print("Board Info Area is present size:%d" %
+                    (self.boardInfoArea.size))
+            self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: (
+                self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)]
+            if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]):
+                strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" %  \
+                    (FruUtil.checksum(
+                        self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.boardInfoArea.decodedata()
+        if ord(commonHead[4]) != ord(self.INITVALUE):
+            d_print("Product Info Area is present")
+            self.productInfoArea = ProductInfoArea(
+                name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA)
+            self.productInfoArea.isPresent = True
+            self.productinfoAreaOffset = ord(commonHead[4])
+            d_print("length offset value: %02x" %
+                    ord(eeprom[self.productinfoAreaOffset * 8 + 1]))
+            self.productInfoArea.size = ord(
+                eeprom[self.productinfoAreaOffset * 8 + 1]) * 8
+            d_print("Product Info Area is present size:%d" %
+                    (self.productInfoArea.size))
+
+            self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: (
+                self.productinfoAreaOffset * 8 + self.productInfoArea.size)]
+            if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]):
+                strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % (
+                    FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.productInfoArea.decodedata()
+        if ord(commonHead[5]) != ord(self.INITVALUE):
+            self.multiRecordArea = MultiRecordArea(
+                name="MultiRecord record Area ")
+            d_print("MultiRecord record present")
+            self.multiRecordArea.isPresent = True
+            self.multiRecordAreaOffset = ord(commonHead[5])
+            self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: (
+                self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)]
+
+    def initDefault(self):
+        self.version = self.COMMON_HEAD_VERSION
+        self.internalUserAreaOffset = self.INITVALUE
+        self.chassicInfoAreaOffset = self.INITVALUE
+        self.boardInfoAreaOffset = self.INITVALUE
+        self.productinfoAreaOffset = self.INITVALUE
+        self.multiRecordAreaOffset = self.INITVALUE
+        self.zeroCheckSum = self.INITVALUE
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        self.productInfoArea = None
+        self.internalUseArea = None
+        self.boardInfoArea = None
+        self.chassisInfoArea = None
+        self.multiRecordArea = None
+        # self.recalcute()
+
+    @property
+    def version(self):
+        return self._version
+
+    @version.setter
+    def version(self, name):
+        self._version = name
+
+    @property
+    def internalUserAreaOffset(self):
+        return self._internalUserAreaOffset
+
+    @internalUserAreaOffset.setter
+    def internalUserAreaOffset(self, obj):
+        self._internalUserAreaOffset = obj
+
+    @property
+    def chassicInfoAreaOffset(self):
+        return self._chassicInfoAreaOffset
+
+    @chassicInfoAreaOffset.setter
+    def chassicInfoAreaOffset(self, obj):
+        self._chassicInfoAreaOffset = obj
+
+    @property
+    def productinfoAreaOffset(self):
+        return self._productinfoAreaOffset
+
+    @productinfoAreaOffset.setter
+    def productinfoAreaOffset(self, obj):
+        self._productinfoAreaOffset = obj
+
+    @property
+    def boardInfoAreaOffset(self):
+        return self._boardInfoAreaOffset
+
+    @boardInfoAreaOffset.setter
+    def boardInfoAreaOffset(self, obj):
+        self._boardInfoAreaOffset = obj
+
+    @property
+    def multiRecordAreaOffset(self):
+        return self._multiRecordAreaOffset
+
+    @multiRecordAreaOffset.setter
+    def multiRecordAreaOffset(self, obj):
+        self._multiRecordAreaOffset = obj
+
+    @property
+    def zeroCheckSum(self):
+        return self._zeroCheckSum
+
+    @zeroCheckSum.setter
+    def zeroCheckSum(self, obj):
+        self._zeroCheckSum = obj
+
+    @property
+    def productInfoArea(self):
+        return self._ProductInfoArea
+
+    @productInfoArea.setter
+    def productInfoArea(self, obj):
+        self._ProductInfoArea = obj
+
+    @property
+    def internalUseArea(self):
+        return self._InternalUseArea
+
+    @internalUseArea.setter
+    def internalUseArea(self, obj):
+        self.internalUseArea = obj
+
+    @property
+    def boardInfoArea(self):
+        return self._BoardInfoArea
+
+    @boardInfoArea.setter
+    def boardInfoArea(self, obj):
+        self._BoardInfoArea = obj
+
+    @property
+    def chassisInfoArea(self):
+        return self._ChassisInfoArea
+
+    @chassisInfoArea.setter
+    def chassisInfoArea(self, obj):
+        self._ChassisInfoArea = obj
+
+    @property
+    def multiRecordArea(self):
+        return self._multiRecordArea
+
+    @multiRecordArea.setter
+    def multiRecordArea(self, obj):
+        self._multiRecordArea = obj
+
+    @property
+    def bindata(self):
+        return self._bindata
+
+    @bindata.setter
+    def bindata(self, obj):
+        self._bindata = obj
+
+    @property
+    def bodybin(self):
+        return self._bodybin
+
+    @bodybin.setter
+    def bodybin(self, obj):
+        self._bodybin = obj
+
+    def recalcuteCommonHead(self):
+        self.bindata = ""
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        d_print("common Header %d" % self.offset)
+        d_print("fru eeprom size  %d" % self._frusize)
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            self.internalUserAreaOffset = self.offset // 8
+            self.offset += self.internalUseArea.size
+            d_print("internalUseArea is present offset:%d" % self.offset)
+
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            self.chassicInfoAreaOffset = self.offset // 8
+            self.offset += self.chassisInfoArea.size
+            d_print("chassisInfoArea is present offset:%d" % self.offset)
+
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            self.boardInfoAreaOffset = self.offset // 8
+            self.offset += self.boardInfoArea.size
+            d_print("boardInfoArea is present offset:%d" % self.offset)
+            d_print("boardInfoArea is present size:%d" %
+                    self.boardInfoArea.size)
+
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            self.productinfoAreaOffset = self.offset // 8
+            self.offset += self.productInfoArea.size
+            d_print("productInfoArea is present offset:%d" % self.offset)
+
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            self.multiRecordAreaOffset = self.offset // 8
+            d_print("multiRecordArea is present offset:%d" % self.offset)
+
+        if self.internalUserAreaOffset == self.INITVALUE:
+            self.internalUserAreaOffset = 0
+        if self.productinfoAreaOffset == self.INITVALUE:
+            self.productinfoAreaOffset = 0
+        if self.chassicInfoAreaOffset == self.INITVALUE:
+            self.chassicInfoAreaOffset = 0
+        if self.boardInfoAreaOffset == self.INITVALUE:
+            self.boardInfoAreaOffset = 0
+        if self.multiRecordAreaOffset == self.INITVALUE:
+            self.multiRecordAreaOffset = 0
+
+        self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset
+                             - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff
+        d_print("zerochecksum:%x" % self.zeroCheckSum)
+        self.data = ""
+        self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr(
+            self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum)
+
+        self.bindata = self.data + self.bodybin
+        totallen = len(self.bindata)
+        d_print("totallen %d" % totallen)
+        if totallen < self._frusize:
+            self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0]))
+        else:
+            raise FruException('bin data more than %d' % self._frusize, -2)
+
+    def recalcutebin(self):
+        self.bodybin = ""
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            d_print("internalUseArea present")
+            self.bodybin += self.internalUseArea.data
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            d_print("chassisInfoArea present")
+            self.bodybin += self.chassisInfoArea.data
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            d_print("boardInfoArea present")
+            self.boardInfoArea.recalcute()
+            self.bodybin += self.boardInfoArea.data
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            d_print("productInfoAreapresent")
+            self.productInfoArea.recalcute()
+            self.bodybin += self.productInfoArea.data
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            d_print("multiRecordArea present")
+            self.bodybin += self.productInfoArea.data
+
+    def recalcute(self, fru_eeprom_size=256):
+        self._frusize = fru_eeprom_size
+        self.recalcutebin()
+        self.recalcuteCommonHead()
+
+    def setValue(self, area, field, value):
+        tmp_area = getattr(self, area, None)
+        if tmp_area is not None:
+            tmp_area.fruSetValue(field, value)
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/installer.conf b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/installer.conf
new file mode 100644
index 000000000000..60549859fca5
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/installer.conf
@@ -0,0 +1,4 @@
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll intel_iommu=on iommu=pt modprobe.blacklist=i2c_ismt,i2c_i801,r8169,r8168,intel_spi_pci,sdhci_pci"
+CONSOLE_PORT=0xf060
+CONSOLE_DEV=0
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/media_settings.json b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/media_settings.json
new file mode 100644
index 000000000000..865acd01a595
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/media_settings.json
@@ -0,0 +1,2078 @@
+{
+    "PORT_MEDIA_SETTINGS": {
+        "32": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x00000030"
+                },
+                "post1": {
+                    "lane0": "0x00000005"
+                }
+            }
+        },
+        "33": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x00000034"
+                },
+                "post1": {
+                    "lane0": "0x00000008"
+                }
+            }
+        },
+        "0": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x0000008C",
+                    "lane5": "0x0000008C",
+                    "lane6": "0x0000008C",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "1": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x00000078",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x00000088",
+                    "lane4": "0x0000008C",
+                    "lane5": "0x00000084",
+                    "lane6": "0x0000008C",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "2": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xffffffe8",
+                    "lane1": "0xffffffe8",
+                    "lane2": "0xffffffe8",
+                    "lane3": "0xffffffe8",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe8",
+                    "lane6": "0xffffffe8",
+                    "lane7": "0xffffffe8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "3": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "4": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "5": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000078",
+                    "lane1": "0x00000078",
+                    "lane2": "0x00000078",
+                    "lane3": "0x00000078",
+                    "lane4": "0x00000074",
+                    "lane5": "0x00000078",
+                    "lane6": "0x00000088",
+                    "lane7": "0x0000007C"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "6": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x0000007C",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x00000078",
+                    "lane3": "0x00000074",
+                    "lane4": "0x0000007C",
+                    "lane5": "0x0000007C",
+                    "lane6": "0x0000007C",
+                    "lane7": "0x00000078"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "7": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "8": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000078",
+                    "lane1": "0x00000078",
+                    "lane2": "0x00000078",
+                    "lane3": "0x00000078",
+                    "lane4": "0x00000078",
+                    "lane5": "0x00000074",
+                    "lane6": "0x00000078",
+                    "lane7": "0x00000078"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "9": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000078",
+                    "lane1": "0x00000078",
+                    "lane2": "0x00000078",
+                    "lane3": "0x00000078",
+                    "lane4": "0x00000078",
+                    "lane5": "0x00000078",
+                    "lane6": "0x00000078",
+                    "lane7": "0x00000078"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "10": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x0000007C",
+                    "lane2": "0x0000007C",
+                    "lane3": "0x00000078",
+                    "lane4": "0x00000078",
+                    "lane5": "0x0000007C",
+                    "lane6": "0x0000007C",
+                    "lane7": "0x00000078"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "11": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000078",
+                    "lane1": "0x00000078",
+                    "lane2": "0x00000078",
+                    "lane3": "0x00000078",
+                    "lane4": "0x0000007C",
+                    "lane5": "0x0000007C",
+                    "lane6": "0x0000007C",
+                    "lane7": "0x00000074"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "12": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x0000007C",
+                    "lane2": "0x00000088",
+                    "lane3": "0x0000007C",
+                    "lane4": "0x00000078",
+                    "lane5": "0x00000078",
+                    "lane6": "0x00000080",
+                    "lane7": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "13": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000078",
+                    "lane2": "0x00000080",
+                    "lane3": "0x00000080",
+                    "lane4": "0x0000007C",
+                    "lane5": "0x00000074",
+                    "lane6": "0x00000074",
+                    "lane7": "0x0000007C"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "14": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "15": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000074",
+                    "lane1": "0x00000078",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000080",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000078",
+                    "lane6": "0x00000078",
+                    "lane7": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "16": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000078",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "17": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x0000007C",
+                    "lane1": "0x00000078",
+                    "lane2": "0x0000007C",
+                    "lane3": "0x0000007C",
+                    "lane4": "0x00000078",
+                    "lane5": "0x00000074",
+                    "lane6": "0x00000078",
+                    "lane7": "0x00000078"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "18": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x0000007C",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000078",
+                    "lane3": "0x0000007C",
+                    "lane4": "0x0000007C",
+                    "lane5": "0x00000078",
+                    "lane6": "0x00000078",
+                    "lane7": "0x00000078"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "19": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000074",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000078",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "20": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000080",
+                    "lane3": "0x00000074",
+                    "lane4": "0x0000007C",
+                    "lane5": "0x00000084",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000074"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "21": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000078",
+                    "lane1": "0x00000078",
+                    "lane2": "0x00000078",
+                    "lane3": "0x00000074",
+                    "lane4": "0x00000078",
+                    "lane5": "0x00000078",
+                    "lane6": "0x00000078",
+                    "lane7": "0x00000074"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "22": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x0000007C",
+                    "lane1": "0x00000074",
+                    "lane2": "0x0000007C",
+                    "lane3": "0x00000078",
+                    "lane4": "0x0000007C",
+                    "lane5": "0x00000078",
+                    "lane6": "0x00000078",
+                    "lane7": "0x00000078"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "23": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000078",
+                    "lane1": "0x00000074",
+                    "lane2": "0x0000007C",
+                    "lane3": "0x00000078",
+                    "lane4": "0x00000078",
+                    "lane5": "0x00000074",
+                    "lane6": "0x00000074",
+                    "lane7": "0x00000078"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "24": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000078",
+                    "lane1": "0x0000007C",
+                    "lane2": "0x00000078",
+                    "lane3": "0x00000074",
+                    "lane4": "0x00000078",
+                    "lane5": "0x00000074",
+                    "lane6": "0x00000078",
+                    "lane7": "0x00000078"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "25": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000078",
+                    "lane1": "0x00000078",
+                    "lane2": "0x00000078",
+                    "lane3": "0x00000080",
+                    "lane4": "0x00000078",
+                    "lane5": "0x00000074",
+                    "lane6": "0x0000007C",
+                    "lane7": "0x00000078"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "26": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x0000007C",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000078",
+                    "lane4": "0x00000074",
+                    "lane5": "0x00000078",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000078"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "27": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x0000007C",
+                    "lane3": "0x00000074",
+                    "lane4": "0x00000084",
+                    "lane5": "0x0000007C",
+                    "lane6": "0x0000008C",
+                    "lane7": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "28": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "29": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x0000008C",
+                    "lane5": "0x0000008C",
+                    "lane6": "0x0000008C",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffec",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xffffffec"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "30": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000078",
+                    "lane1": "0x00000074",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000007C",
+                    "lane4": "0x0000007C",
+                    "lane5": "0x00000078",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000078"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "31": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        }
+    }
+}
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/monitor.py b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/monitor.py
new file mode 100644
index 000000000000..37ed2168e611
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/monitor.py
@@ -0,0 +1,457 @@
+#!/usr/bin/python3
+#   * onboard temperature sensors
+#   * FAN trays
+#   * PSU
+#
+import os
+import re
+from lxml import etree as ET
+import glob
+import json
+from decimal import Decimal
+from fru import ipmifru
+from cust_fru import CustFru
+
+
+MAILBOX_DIR = "/sys/bus/i2c/devices/"
+BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type"
+BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow"
+
+
+CONFIG_NAME = "dev.xml"
+
+
+def byteTostr(val):
+    strtmp = ''
+    for value in val:
+        strtmp += chr(value)
+    return strtmp
+
+
+def typeTostr(val):
+    if isinstance(val, bytes):
+        strtmp = byteTostr(val)
+        return strtmp
+    return val
+
+
+def get_board_id():
+    if not os.path.exists(BOARD_ID_PATH):
+        return "NA"
+    with open(BOARD_ID_PATH) as fd:
+        id_str = fd.read().strip()
+    return "0x%x" % (int(id_str, 10))
+
+
+def getboardairflow():
+    if not os.path.exists(BOARD_AIRFLOW_PATH):
+        return "NA"
+    with open(BOARD_AIRFLOW_PATH) as fd:
+        airflow_str = fd.read().strip()
+    data = json.loads(airflow_str)
+    airflow = data.get("board", "NA")
+    return airflow
+
+
+boardid = get_board_id()
+boardairflow = getboardairflow()
+
+
+DEV_XML_FILE_LIST = [
+    "dev_" + boardid + "_" + boardairflow + ".xml",
+    "dev_" + boardid + ".xml",
+    "dev_" + boardairflow + ".xml",
+]
+
+
+def dev_file_read(path, offset, read_len):
+    retval = "ERR"
+    val_list = []
+    msg = ""
+    ret = ""
+    fd = -1
+
+    if not os.path.exists(path):
+        return False, "%s %s not found" % (retval, path)
+
+    try:
+        fd = os.open(path, os.O_RDONLY)
+        os.lseek(fd, offset, os.SEEK_SET)
+        ret = os.read(fd, read_len)
+        for item in ret:
+            val_list.append(item)
+    except Exception as e:
+        msg = str(e)
+        return False, "%s %s" % (retval, msg)
+    finally:
+        if fd > 0:
+            os.close(fd)
+    return True, val_list
+
+
+def getPMCreg(location):
+    retval = 'ERR'
+    if not os.path.isfile(location):
+        return "%s %s  notfound" % (retval, location)
+    try:
+        with open(location, 'r') as fd:
+            retval = fd.read()
+    except Exception as error:
+        return "ERR %s" % str(error)
+
+    retval = retval.rstrip('\r\n')
+    retval = retval.lstrip(" ")
+    return retval
+
+
+# Get a mailbox register
+def get_pmc_register(reg_name):
+    retval = 'ERR'
+    mb_reg_file = reg_name
+    filepath = glob.glob(mb_reg_file)
+    if len(filepath) == 0:
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    mb_reg_file = filepath[0]
+    if not os.path.isfile(mb_reg_file):
+        # print mb_reg_file,  'not found !'
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    try:
+        with open(mb_reg_file, 'rb') as fd:
+            retval = fd.read()
+        retval = typeTostr(retval)
+    except Exception as error:
+        retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error))
+
+    retval = retval.rstrip('\r\n')
+    retval = retval.lstrip(" ")
+    return retval
+
+
+class checktype():
+    def __init__(self, test1):
+        self.test1 = test1
+
+    @staticmethod
+    def getValue(location, bit, data_type, coefficient=1, addend=0):
+        try:
+            value_t = get_pmc_register(location)
+            if value_t.startswith("ERR") or value_t.startswith("NA"):
+                return value_t
+            if data_type == 1:
+                return float('%.1f' % ((float(value_t) / 1000) + addend))
+            if data_type == 2:
+                return float('%.1f' % (float(value_t) / 100))
+            if data_type == 3:
+                psu_status = int(value_t, 16)
+                return (psu_status & (1 << bit)) >> bit
+            if data_type == 4:
+                return int(value_t, 10)
+            if data_type == 5:
+                return float('%.1f' % (float(value_t) / 1000 / 1000))
+            if data_type == 6:
+                return Decimal(float(value_t) * coefficient / 1000).quantize(Decimal('0.000'))
+            return value_t
+        except Exception as e:
+            value_t = "ERR %s" % str(e)
+            return value_t
+
+    # fanFRU
+    @staticmethod
+    def decodeBinByValue(retval):
+        fru = ipmifru()
+        fru.decodeBin(retval)
+        return fru
+
+    @staticmethod
+    def getfruValue(prob_t, root, val):
+        try:
+            ret, binval_bytes = dev_file_read(val, 0, 256)
+            if ret is False:
+                return binval_bytes
+            binval = byteTostr(binval_bytes)
+            fanpro = {}
+            ret = checktype.decodeBinByValue(binval)
+            fanpro['fan_type'] = ret.productInfoArea.productName
+            fanpro['hw_version'] = ret.productInfoArea.productVersion
+            fanpro['sn'] = ret.productInfoArea.productSerialNumber
+            fan_display_name_dict = status.getDecodValue(root, "fan_display_name")
+            fan_name = fanpro['fan_type'].strip()
+            if len(fan_display_name_dict) == 0:
+                return fanpro
+            if fan_name not in fan_display_name_dict:
+                prob_t['errcode'] = -1
+                prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name)
+            else:
+                fanpro['fan_type'] = fan_display_name_dict[fan_name]
+            return fanpro
+        except Exception as error:
+            return "ERR " + str(error)
+
+    @staticmethod
+    def getslotfruValue(val):
+        try:
+            binval = checktype.getValue(val, 0, 0)
+            if binval.startswith("ERR"):
+                return binval
+            slotpro = {}
+            ret = checktype.decodeBinByValue(binval)
+            slotpro['slot_type'] = ret.boardInfoArea.boardProductName
+            slotpro['hw_version'] = ret.boardInfoArea.boardextra1
+            slotpro['sn'] = ret.boardInfoArea.boardSerialNumber
+            return slotpro
+        except Exception as error:
+            return "ERR " + str(error)
+
+    @staticmethod
+    def getpsufruValue(prob_t, root, val):
+        try:
+            psu_match = False
+            binval = checktype.getValue(val, 0, 0)
+            if binval.startswith("ERR"):
+                return binval
+            psupro = {}
+            ret = checktype.decodeBinByValue(binval)
+            psupro['type1'] = ret.productInfoArea.productPartModelName
+            psupro['sn'] = ret.productInfoArea.productSerialNumber
+            psupro['hw_version'] = ret.productInfoArea.productVersion
+            psu_dict = status.getDecodValue(root, "psutype")
+            psupro['type1'] = psupro['type1'].strip()
+            if len(psu_dict) == 0:
+                return psupro
+            for psu_name, display_name in psu_dict.items():
+                if psu_name.strip() == psupro['type1']:
+                    psupro['type1'] = display_name
+                    psu_match = True
+                    break
+            if psu_match is not True:
+                prob_t['errcode'] = -1
+                prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1'])
+            return psupro
+        except Exception as error:
+            return "ERR " + str(error)
+
+    @staticmethod
+    def getpsucustfruValue(prob_t, root, val):
+        try:
+            psu_match = False
+            binval = checktype.getValue(val, 0, 0)
+            if binval.startswith("ERR"):
+                return binval
+            psupro = {}
+            custfru = CustFru()
+            custfru.decode(binval)
+            psupro['type1'] = custfru.product_name.strip()
+            psupro['sn'] = custfru.serial_number.strip().replace(chr(0), "")
+            psupro['hw_version'] = custfru.version.strip()
+            psu_dict = status.getDecodValue(root, "psutype")
+            psupro['type1'] = psupro['type1'].strip()
+            if len(psu_dict) == 0:
+                return psupro
+            for psu_name, display_name in psu_dict.items():
+                if psu_name.strip() == psupro['type1']:
+                    psupro['type1'] = display_name
+                    psu_match = True
+                    break
+            if psu_match is not True:
+                prob_t['errcode'] = -1
+                prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1'])
+            return psupro
+        except Exception as error:
+            return "ERR " + str(error)
+
+
+class status():
+    def __init__(self, productname):
+        self.productname = productname
+
+    @staticmethod
+    def getETroot(filename):
+        tree = ET.parse(filename)
+        root = tree.getroot()
+        return root
+
+    @staticmethod
+    def getDecodValue(collection, decode):
+        decodes = collection.find('decode')
+        testdecode = decodes.find(decode)
+        test = {}
+        if testdecode is None:
+            return test
+        for neighbor in testdecode.iter('code'):
+            test[neighbor.attrib["key"]] = neighbor.attrib["value"]
+        return test
+
+    @staticmethod
+    def getfileValue(location):
+        return checktype.getValue(location, " ", " ")
+
+    @staticmethod
+    def getETValue(a, filename, tagname):
+        root = status.getETroot(filename)
+        for neighbor in root.iter(tagname):
+            prob_t = {}
+            prob_t.update(neighbor.attrib)
+            prob_t['errcode'] = 0
+            prob_t['errmsg'] = ''
+            for pros in neighbor.iter("property"):
+                ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items()))
+                if ret.get('e2type') == 'fru' and ret.get("name") == "fru":
+                    fruval = checktype.getfruValue(prob_t, root, ret["location"])
+                    if isinstance(fruval, str) and fruval.startswith("ERR"):
+                        prob_t['errcode'] = -1
+                        prob_t['errmsg'] = fruval
+                        break
+                    prob_t.update(fruval)
+                    continue
+
+                if ret.get("name") == "psu" and ret.get('e2type') == 'fru':
+                    psuval = checktype.getpsufruValue(prob_t, root, ret["location"])
+                    if isinstance(psuval, str) and psuval.startswith("ERR"):
+                        prob_t['errcode'] = -1
+                        prob_t['errmsg'] = psuval
+                        break
+                    prob_t.update(psuval)
+                    continue
+
+                if ret.get("name") == "psu" and ret.get('e2type') == 'custfru':
+                    psuval = checktype.getpsucustfruValue(prob_t, root, ret["location"])
+                    if isinstance(psuval, str) and psuval.startswith("ERR"):
+                        prob_t['errcode'] = -1
+                        prob_t['errmsg'] = psuval
+                        break
+                    prob_t.update(psuval)
+                    continue
+
+                if ret.get("gettype") == "config":
+                    prob_t[ret["name"]] = ret["value"]
+                    continue
+
+                if 'type' not in ret.keys():
+                    val = "0"
+                else:
+                    val = ret["type"]
+                if 'bit' not in ret.keys():
+                    bit = "0"
+                else:
+                    bit = ret["bit"]
+                if 'coefficient' not in ret.keys():
+                    coefficient = 1
+                else:
+                    coefficient = float(ret["coefficient"])
+                if 'addend' not in ret.keys():
+                    addend = 0
+                else:
+                    addend = float(ret["addend"])
+
+                s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend)
+                if isinstance(s, str) and s.startswith("ERR"):
+                    prob_t['errcode'] = -1
+                    prob_t['errmsg'] = s
+                    break
+                if 'default' in ret.keys():
+                    rt = status.getDecodValue(root, ret['decode'])
+                    prob_t['errmsg'] = rt[str(s)]
+                    if str(s) != ret["default"]:
+                        prob_t['errcode'] = -1
+                        break
+                else:
+                    if 'decode' in ret.keys():
+                        rt = status.getDecodValue(root, ret['decode'])
+                        if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt):
+                            prob_t['errcode'] = -1
+                            prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" %
+                                                       (s.replace("\x00", "").rstrip()))
+                        else:
+                            s = rt[str(s).replace("\x00", "").rstrip()]
+                name = ret["name"]
+                prob_t[name] = str(s)
+            a.append(prob_t)
+
+    @staticmethod
+    def getCPUValue(a, filename, tagname):
+        root = status.getETroot(filename)
+        for neighbor in root.iter(tagname):
+            location = neighbor.attrib["location"]
+
+        filepath = glob.glob(location)
+        if len(filepath) == 0:
+            return
+        location = filepath[0]
+        L = []
+        for dirpath, dirnames, filenames in os.walk(location):
+            for file in filenames:
+                if file.endswith("_input"):
+                    b = re.findall(r'temp(\d+)_input', file)
+                    idx = int(b[0])
+                    L.append(idx)
+            L = sorted(L)
+        for idx in L:
+            prob_t = {}
+            prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, idx))
+            prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, idx))) / 1000
+            prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, idx))) / 1000
+            prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, idx))) / 1000
+            prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, idx))) / 1000
+            a.append(prob_t)
+
+    @staticmethod
+    def getFileName():
+        fpath = os.path.dirname(os.path.realpath(__file__))
+        for file in DEV_XML_FILE_LIST:
+            xml = fpath + "/" + file
+            if os.path.exists(xml):
+                return xml
+        return fpath + "/" + CONFIG_NAME
+
+    @staticmethod
+    def checkFan(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "fan"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getTemp(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "temp"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getPsu(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "psu"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getCustPsu(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "custpsu"
+        status.getETValue(ret, _filename, _tagname)
+
+
+    @staticmethod
+    def getcputemp(ret):
+        _filename = status.getFileName()
+        _tagname = "cpus"
+        status.getCPUValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getDcdc(ret):
+        _filename = status.getFileName()
+        _tagname = "dcdc"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getmactemp(ret):
+        _filename = status.getFileName()
+        _tagname = "mactemp"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getmacpower(ret):
+        _filename = status.getFileName()
+        _tagname = "macpower"
+        status.getETValue(ret, _filename, _tagname)
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pcie.yaml
new file mode 100644
index 000000000000..e419f4032579
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pcie.yaml
@@ -0,0 +1,159 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: '1980'
+  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev
+    11)'
+- bus: '00'
+  dev: '04'
+  fn: '0'
+  id: 19a1
+  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers
+    (rev 11)'
+- bus: '00'
+  dev: '05'
+  fn: '0'
+  id: 19a2
+  name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000
+    Series Root Complex Event Collector (rev 11)'
+- bus: '00'
+  dev: '06'
+  fn: '0'
+  id: 19a3
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT
+    Root Port (rev 11)'
+- bus: '00'
+  dev: 09
+  fn: '0'
+  id: 19a4
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #0 (rev 11)'
+- bus: '00'
+  dev: 0b
+  fn: '0'
+  id: 19a6
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #2 (rev 11)'
+- bus: '00'
+  dev: 0e
+  fn: '0'
+  id: 19a8
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #4 (rev 11)'
+- bus: '00'
+  dev: '10'
+  fn: '0'
+  id: 19aa
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #6 (rev 11)'
+- bus: '00'
+  dev: '12'
+  fn: '0'
+  id: 19ac
+  name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller
+    - Host (rev 11)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 19c2
+  name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller
+    1 (rev 11)'
+- bus: '00'
+  dev: '15'
+  fn: '0'
+  id: 19d0
+  name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI
+    Controller (rev 11)'
+- bus: '00'
+  dev: '17'
+  fn: '0'
+  id: 19d2
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
+    Root Port #1 (rev 11)'
+- bus: '00'
+  dev: '18'
+  fn: '0'
+  id: 19d3
+  name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME
+    HECI 1 (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '0'
+  id: 19d8
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+    (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '1'
+  id: 19d8
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+    (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '2'
+  id: 19d8
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+    (rev 11)'
+- bus: '00'
+  dev: 1c
+  fn: '0'
+  id: 19db
+  name: 'SD Host controller: Intel Corporation Device 19db (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: 19dc
+  name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev
+    11)'
+- bus: '00'
+  dev: 1f
+  fn: '1'
+  id: 19dd
+  name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Primary
+    to Side Band (P2SB) Bridge (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '2'
+  id: 19de
+  name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management
+    Controller (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '4'
+  id: 19df
+  name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev
+    11)'
+- bus: '00'
+  dev: 1f
+  fn: '5'
+  id: 19e0
+  name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series
+    SPI Controller (rev 11)'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: 19e2
+  name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology
+    (rev 11)'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: b980
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b980 (rev 11)'
+- bus: '04'
+  dev: '00'
+  fn: '0'
+  id: '7011'
+  name: 'Memory controller: Xilinx Corporation Device 7011'
+- bus: '07'
+  dev: '00'
+  fn: '0'
+  id: 15c6
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 1GbE (rev
+    11)'
+- bus: '07'
+  dev: '00'
+  fn: '1'
+  id: 15c6
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 1GbE (rev
+    11)'
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform.json b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform.json
new file mode 100644
index 000000000000..3d426398748e
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform.json
@@ -0,0 +1,501 @@
+{
+    "chassis": {
+        "name": "M2-W6920-32QC2X",
+        "thermal_manager": false,
+        "status_led": {
+            "controllable": false,
+            "colors": ["green", "blinking_green", "amber", "blinking_amber"]
+        },
+        "components": [
+            {
+                "name": "CPU_CPLD"
+            },
+            {
+                "name": "MAC_CPLD"
+            },
+            {
+                "name": "FAN_CPLD"
+            },
+            {
+                "name": "BASE_CPLD"
+            },
+            {
+                "name": "BIOS"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fantray1_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 40,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray2_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 40,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            }
+        ],
+        "fan_drawers":[
+            {
+                "name": "Fantray1",
+                "num_fans" : 1,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "FanTray1_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 40,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray2",
+                "num_fans" : 1,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "FanTray2_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 40,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "Psu1",
+                "voltage": false,
+                "current": false,
+                "power": false,
+                "max_power": false,
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "temperature": false,
+                "fans_target_speed": false,
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "PSU1_FAN1",
+                        "speed": {
+                            "controllable": false,
+                            "minimum": 40,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Psu2",
+                "voltage": false,
+                "current": false,
+                "power": false,
+                "max_power": false,
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "temperature": false,
+                "fans_target_speed": false,
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "PSU2_FAN1",
+                        "speed": {
+                            "controllable": false,
+                            "minimum": 40,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "ASIC_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "CPU_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "INLET_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "OUTLET_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            }
+        ],
+        "modules": [],
+        "sfps": []
+    },
+    "interfaces": {
+        "Ethernet1": {
+            "index": "0,0,0,0,0,0,0,0",
+            "lanes": "1,2,3,4,5,6,7,8",
+            "breakout_modes": {
+                "1x400G": ["Eth1"],
+                "2x200G[100G]": ["Eth1/1", "Eth1/2"],
+                "4x100G": ["Eth1/1", "Eth1/2","Eth1/3", "Eth1/4"]
+            }
+        },
+        "Ethernet9": {
+            "index": "1,1,1,1,1,1,1,1",
+            "lanes": "9,10,11,12,13,14,15,16",
+            "breakout_modes": {
+                "1x400G": ["Eth2"],
+                "2x200G[100G]": ["Eth2/1", "Eth2/2"],
+                "4x100G": ["Eth2/1", "Eth2/2","Eth2/3", "Eth2/4"]
+            }
+        },
+        "Ethernet17": {
+            "index": "2,2,2,2,2,2,2,2",
+            "lanes": "17,18,19,20,21,22,23,24",
+            "breakout_modes": {
+                "1x400G": ["Eth3"],
+                "2x200G[100G]": ["Eth3/1", "Eth3/2"],
+                "4x100G": ["Eth3/1", "Eth3/2","Eth3/3", "Eth3/4"]
+            }
+        },
+        "Ethernet25": {
+            "index": "3,3,3,3,3,3,3,3",
+            "lanes": "25,26,27,28,29,30,31,32",
+            "breakout_modes": {
+                "1x400G": ["Eth4"],
+                "2x200G[100G]": ["Eth4/1", "Eth4/2"],
+                "4x100G": ["Eth4/1", "Eth4/2","Eth4/3", "Eth4/4"]
+            }
+        },
+        "Ethernet33": {
+            "index": "4,4,4,4,4,4,4,4",
+            "lanes": "33,34,35,36,37,38,39,40",
+            "breakout_modes": {
+                "1x400G": ["Eth5"],
+                "2x200G[100G]": ["Eth5/1", "Eth5/2"],
+                "4x100G": ["Eth5/1", "Eth5/2","Eth5/3", "Eth5/4"]
+            }
+        },
+        "Ethernet41": {
+            "index": "5,5,5,5,5,5,5,5",
+            "lanes": "41,42,43,44,45,46,47,48",
+            "breakout_modes": {
+                "1x400G": ["Eth6"],
+                "2x200G[100G]": ["Eth6/1", "Eth6/2"],
+                "4x100G": ["Eth6/1", "Eth6/2","Eth6/3", "Eth6/4"]
+            }
+        },
+        "Ethernet49": {
+            "index": "6,6,6,6,6,6,6,6",
+            "lanes": "49,50,51,52,53,54,55,56",
+            "breakout_modes": {
+                "1x400G": ["Eth7"],
+                "2x200G[100G]": ["Eth7/1", "Eth7/2"],
+                "4x100G": ["Eth7/1", "Eth7/2","Eth7/3", "Eth7/4"]
+            }
+        },
+        "Ethernet57": {
+            "index": "7,7,7,7,7,7,7,7",
+            "lanes": "57,58,59,60,61,62,63,64",
+            "breakout_modes": {
+                "1x400G": ["Eth8"],
+                "2x200G[100G]": ["Eth8/1", "Eth8/2"],
+                "4x100G": ["Eth8/1", "Eth8/2","Eth8/3", "Eth8/4"]
+            }
+        },
+        "Ethernet65": {
+            "index": "8,8,8,8,8,8,8,8",
+            "lanes": "65,66,67,68,69,70,71,72",
+            "breakout_modes": {
+                "1x400G": ["Eth9"],
+                "2x200G[100G]": ["Eth9/1", "Eth9/2"],
+                "4x100G": ["Eth9/1", "Eth9/2","Eth9/3", "Eth9/4"]
+            }
+        },
+        "Ethernet73": {
+            "index": "9,9,9,9,9,9,9,9",
+            "lanes": "73,74,75,76,77,78,79,80",
+            "breakout_modes": {
+                "1x400G": ["Eth10"],
+                "2x200G[100G]": ["Eth10/1", "Eth10/2"],
+                "4x100G": ["Eth10/1", "Eth10/2","Eth10/3", "Eth10/4"]
+            }
+        },
+        "Ethernet81": {
+            "index": "10,10,10,10,10,10,10,10",
+            "lanes": "81,82,83,84,85,86,87,88",
+            "breakout_modes": {
+                "1x400G": ["Eth11"],
+                "2x200G[100G]": ["Eth11/1", "Eth11/2"],
+                "4x100G": ["Eth11/1", "Eth11/2","Eth11/3", "Eth11/4"]
+            }
+        },
+        "Ethernet89": {
+            "index": "11,11,11,11,11,11,11,11",
+            "lanes": "89,90,91,92,93,94,95,96",
+            "breakout_modes": {
+                "1x400G": ["Eth12"],
+                "2x200G[100G]": ["Eth12/1", "Eth12/2"],
+                "4x100G": ["Eth12/1", "Eth12/2","Eth12/3", "Eth12/4"]
+            }
+        },
+        "Ethernet97": {
+            "index": "12,12,12,12,12,12,12,12",
+            "lanes": "97,98,99,100,101,102,103,104",
+            "breakout_modes": {
+                "1x400G": ["Eth13"],
+                "2x200G[100G]": ["Eth13/1", "Eth13/2"],
+                "4x100G": ["Eth13/1", "Eth13/2","Eth13/3", "Eth13/4"]
+            }
+        },
+        "Ethernet105": {
+            "index": "13,13,13,13,13,13,13,13",
+            "lanes": "105,106,107,108,109,110,111,112",
+            "breakout_modes": {
+                "1x400G": ["Eth14"],
+                "2x200G[100G]": ["Eth14/1", "Eth14/2"],
+                "4x100G": ["Eth14/1", "Eth14/2","Eth14/3", "Eth14/4"]
+            }
+        },
+        "Ethernet113": {
+            "index": "14,14,14,14,14,14,14,14",
+            "lanes": "113,114,115,116,117,118,119,120",
+            "breakout_modes": {
+                "1x400G": ["Eth15"],
+                "2x200G[100G]": ["Eth15/1", "Eth15/2"],
+                "4x100G": ["Eth15/1", "Eth15/2","Eth15/3", "Eth15/4"]
+            }
+        },
+        "Ethernet121": {
+            "index": "15,15,15,15,15,15,15,15",
+            "lanes": "121,122,123,124,125,126,127,128",
+            "breakout_modes": {
+                "1x400G": ["Eth16"],
+                "2x200G[100G]": ["Eth16/1", "Eth16/2"],
+                "4x100G": ["Eth16/1", "Eth16/2","Eth16/3", "Eth16/4"]
+            }
+        },
+        "Ethernet129": {
+            "index": "16,16,16,16,16,16,16,16",
+            "lanes": "129,130,131,132,133,134,135,136",
+            "breakout_modes": {
+                "1x400G": ["Eth17"],
+                "2x200G[100G]": ["Eth17/1", "Eth17/2"],
+                "4x100G": ["Eth17/1", "Eth17/2","Eth17/3", "Eth17/4"]
+            }
+        },
+        "Ethernet137": {
+            "index": "17,17,17,17,17,17,17,17",
+            "lanes": "137,138,139,140,141,142,143,144",
+            "breakout_modes": {
+                "1x400G": ["Eth18"],
+                "2x200G[100G]": ["Eth18/1", "Eth18/2"],
+                "4x100G": ["Eth18/1", "Eth18/2","Eth18/3", "Eth18/4"]
+            }
+        },
+        "Ethernet145": {
+            "index": "18,18,18,18,18,18,18,18",
+            "lanes": "145,146,147,148,149,150,151,152",
+            "breakout_modes": {
+                "1x400G": ["Eth19"],
+                "2x200G[100G]": ["Eth19/1", "Eth19/2"],
+                "4x100G": ["Eth19/1", "Eth19/2","Eth19/3", "Eth19/4"]
+            }
+        },
+        "Ethernet153": {
+            "index": "19,19,19,19,19,19,19,19",
+            "lanes": "153,154,155,156,157,158,159,160",
+            "breakout_modes": {
+                "1x400G": ["Eth20"],
+                "2x200G[100G]": ["Eth20/1", "Eth20/2"],
+                "4x100G": ["Eth20/1", "Eth20/2","Eth20/3", "Eth20/4"]
+            }
+        },
+        "Ethernet161": {
+            "index": "20,20,20,20,20,20,20,20",
+            "lanes": "161,162,163,164,165,166,167,168",
+            "breakout_modes": {
+                "1x400G": ["Eth21"],
+                "2x200G[100G]": ["Eth21/1", "Eth21/2"],
+                "4x100G": ["Eth21/1", "Eth21/2","Eth21/3", "Eth21/4"]
+            }
+        },
+        "Ethernet169": {
+            "index": "21,21,21,21,21,21,21,21",
+            "lanes": "169,170,171,172,173,174,175,176",
+            "breakout_modes": {
+                "1x400G": ["Eth22"],
+                "2x200G[100G]": ["Eth22/1", "Eth22/2"],
+                "4x100G": ["Eth22/1", "Eth22/2","Eth22/3", "Eth22/4"]
+            }
+        },
+        "Ethernet177": {
+            "index": "22,22,22,22,22,22,22,22",
+            "lanes": "177,178,179,180,181,182,183,184",
+            "breakout_modes": {
+                "1x400G": ["Eth23"],
+                "2x200G[100G]": ["Eth23/1", "Eth23/2"],
+                "4x100G": ["Eth23/1", "Eth23/2","Eth23/3", "Eth23/4"]
+            }
+        },
+        "Ethernet185": {
+            "index": "23,23,23,23,23,23,23,23",
+            "lanes": "185,186,187,188,189,190,191,192",
+            "breakout_modes": {
+                "1x400G": ["Eth24"],
+                "2x200G[100G]": ["Eth24/1", "Eth24/2"],
+                "4x100G": ["Eth24/1", "Eth24/2","Eth24/3", "Eth24/4"]
+            }
+        },
+        "Ethernet193": {
+            "index": "24,24,24,24,24,24,24,24",
+            "lanes": "193,194,195,196,197,198,199,200",
+            "breakout_modes": {
+                "1x400G": ["Eth25"],
+                "2x200G[100G]": ["Eth25/1", "Eth25/2"],
+                "4x100G": ["Eth25/1", "Eth25/2","Eth25/3", "Eth25/4"]
+            }
+        },
+        "Ethernet201": {
+            "index": "25,25,25,25,25,25,25,25",
+            "lanes": "201,202,203,204,205,206,207,208",
+            "breakout_modes": {
+                "1x400G": ["Eth26"],
+                "2x200G[100G]": ["Eth26/1", "Eth26/2"],
+                "4x100G": ["Eth26/1", "Eth26/2","Eth26/3", "Eth26/4"]
+            }
+        },
+        "Ethernet209": {
+            "index": "26,26,26,26,26,26,26,26",
+            "lanes": "209,210,211,212,213,214,215,216",
+            "breakout_modes": {
+                "1x400G": ["Eth27"],
+                "2x200G[100G]": ["Eth27/1", "Eth27/2"],
+                "4x100G": ["Eth27/1", "Eth27/2","Eth27/3", "Eth27/4"]
+            }
+        },
+        "Ethernet217": {
+            "index": "27,27,27,27,27,27,27,27",
+            "lanes": "217,218,219,220,221,222,223,224",
+            "breakout_modes": {
+                "1x400G": ["Eth28"],
+                "2x200G[100G]": ["Eth28/1", "Eth28/2"],
+                "4x100G": ["Eth28/1", "Eth28/2","Eth28/3", "Eth28/4"]
+            }
+        },
+        "Ethernet225": {
+            "index": "28,28,28,28,28,28,28,28",
+            "lanes": "225,226,227,228,229,230,231,232",
+            "breakout_modes": {
+                "1x400G": ["Eth29"],
+                "2x200G[100G]": ["Eth29/1", "Eth29/2"],
+                "4x100G": ["Eth29/1", "Eth29/2","Eth29/3", "Eth29/4"]
+            }
+        },
+        "Ethernet233": {
+            "index": "29,29,29,29,29,29,29,29",
+            "lanes": "233,234,235,236,237,238,239,240",
+            "breakout_modes": {
+                "1x400G": ["Eth30"],
+                "2x200G[100G]": ["Eth30/1", "Eth30/2"],
+                "4x100G": ["Eth30/1", "Eth30/2","Eth30/3", "Eth30/4"]
+            }
+        },
+        "Ethernet241": {
+            "index": "30,30,30,30,30,30,30,30",
+            "lanes": "241,242,243,244,245,246,247,248",
+            "breakout_modes": {
+                "1x400G": ["Eth31"],
+                "2x200G[100G]": ["Eth31/1", "Eth31/2"],
+                "4x100G": ["Eth31/1", "Eth31/2","Eth31/3", "Eth31/4"]
+            }
+        },
+        "Ethernet249": {
+            "index": "31,31,31,31,31,31,31,31",
+            "lanes": "249,250,251,252,253,254,255,256",
+            "breakout_modes": {
+                "1x400G": ["Eth32"],
+                "2x200G[100G]": ["Eth32/1", "Eth32/2"],
+                "4x100G": ["Eth32/1", "Eth32/2","Eth32/3", "Eth32/4"]
+            }
+        },
+        "Ethernet257": {
+            "index": "32",
+            "lanes": "258",
+            "breakout_modes": {
+                "1x10G": ["Eth33"]
+            }
+        },
+        "Ethernet258": {
+            "index": "33",
+            "lanes": "257",
+            "breakout_modes": {
+                "1x10G": ["Eth34"]
+            }
+        }
+    }
+}
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_asic b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_asic
new file mode 100644
index 000000000000..960467652765
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_components.json
new file mode 100644
index 000000000000..eb08e2563dea
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_components.json
@@ -0,0 +1,16 @@
+{
+    "chassis": {
+        "M2-W6920-32QC2X": {
+            "component": {
+                "CPU_CPLD": { },
+                "CTRL_CPLD": { },
+                "MAC_CPLDA": { },
+                "MAC_CPLDB": { },
+                "FAN_CPLD": { },
+                "MAC_FPGA": { },
+                "BIOS": { }
+            }
+        }
+    }
+}
+
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_env.conf b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_env.conf
new file mode 100644
index 000000000000..283e1c0ce710
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/platform_env.conf
@@ -0,0 +1 @@
+usemsi=1
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/plugins/sfputil.py
new file mode 100644
index 000000000000..60d7298a6627
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/plugins/sfputil.py
@@ -0,0 +1,313 @@
+# sfputil.py
+#
+# Platform-specific SFP transceiver interface for SONiC
+#
+
+try:
+    import time
+    import subprocess
+    import re
+    import os
+    import threading
+    import traceback
+    from sonic_sfp.sfputilbase import SfpUtilBase
+except ImportError as e:
+    raise ImportError("%s - required module not found" % str(e))
+
+class SfpUtil(SfpUtilBase):
+    """Platform-specific SfpUtil class"""
+
+    PORT_START = 0
+    PORT_END = 33
+    PORTS_IN_BLOCK = 34
+
+    EEPROM_OFFSET = 63
+    SFP_DEVICE_TYPE = "optoe2"
+    QSFP_DEVICE_TYPE = "optoe1"
+    QSFPDD_DEVICE_TYPE = "optoe3"
+    I2C_MAX_ATTEMPT = 3
+
+    _port_to_eeprom_mapping = {}
+    port_to_i2cbus_mapping ={}
+
+    sfp_ports_list = []
+    qsfp_ports_list = []
+    osfp_ports_list = []
+
+    @property
+    def port_start(self):
+        return self.PORT_START
+
+    @property
+    def port_end(self):
+        return self.PORT_END
+
+    @property
+    def qsfp_ports(self):
+        return self.qsfp_ports_list
+
+    @property
+    def osfp_ports(self):
+        return self.osfp_ports_list
+
+    @property
+    def port_to_eeprom_mapping(self):
+        return self._port_to_eeprom_mapping
+
+    def __init__(self):
+        self.sfp_ports_list = []
+        self.qsfp_ports_list = []
+        self.osfp_ports_list = []
+        for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+            self.port_to_i2cbus_mapping[x] = (x + self.EEPROM_OFFSET)
+
+        self.port_to_i2cbus_mapping[0] = 65
+        self.port_to_i2cbus_mapping[1] = 66
+        self.port_to_i2cbus_mapping[2] = 63
+        self.port_to_i2cbus_mapping[3] = 64
+        self.port_to_i2cbus_mapping[28] = 93
+        self.port_to_i2cbus_mapping[29] = 94
+        self.port_to_i2cbus_mapping[30] = 91
+        self.port_to_i2cbus_mapping[31] = 92
+        self.port_to_i2cbus_mapping[32] = 96
+        self.port_to_i2cbus_mapping[33] = 95
+        
+        for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+            ret, sfp_type = self._get_sfp_type(x)
+            if (ret == True):
+                if sfp_type == "qsfp_dd":
+                    self.osfp_ports_list.append(x)
+                elif sfp_type == "qsfp":
+                    self.qsfp_ports_list.append(x)
+                elif sfp_type == "sfp":
+                    self.sfp_ports_list.append(x)
+        SfpUtilBase.__init__(self)
+
+    def _sfp_read_file_path(self, file_path, offset, num_bytes):
+        attempts = 0
+        while attempts < self.I2C_MAX_ATTEMPT:
+            try:
+                file_path.seek(offset)
+                read_buf = file_path.read(num_bytes)
+            except:
+                attempts += 1
+                time.sleep(0.05)
+            else:
+                return True, read_buf
+        return False, None
+
+    def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset):
+        """Tries to read the eeprom file to determine if the
+        device/sfp is present or not. If sfp present, the read returns
+        valid bytes. If not, read returns error 'Connection timed out"""
+
+        if not os.path.exists(sysfs_sfp_i2c_client_eeprompath):
+            return False
+        else:
+            with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile:
+                rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1)
+                return rv
+
+    def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype):
+        try:
+            sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path
+
+            # Write device address to new_device file
+            nd_file = open(sysfs_nd_path, "w")
+            nd_str = "%s %s" % (devtype, hex(devaddr))
+            nd_file.write(nd_str)
+            nd_file.close()
+
+        except Exception as err:
+            print("Error writing to new device file: %s" % str(err))
+            return 1
+        else:
+            return 0
+
+    def _get_port_eeprom_path(self, port_num, devid):
+        sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+        if port_num in self.port_to_eeprom_mapping.keys():
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num]
+        else:
+            sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+            i2c_adapter_id = self._get_port_i2c_adapter_id(port_num)
+            if i2c_adapter_id is None:
+                print("Error getting i2c bus num")
+                return None
+
+            # Get i2c virtual bus path for the sfp
+            sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path,
+                                                        str(i2c_adapter_id))
+
+            # If i2c bus for port does not exist
+            if not os.path.exists(sysfs_sfp_i2c_adapter_path):
+                print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path)
+                return None
+
+            sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path,
+                                                        str(i2c_adapter_id),
+                                                        hex(devid)[-2:])
+
+            # If sfp device is not present on bus, Add it
+            if not os.path.exists(sysfs_sfp_i2c_client_path):
+                if port_num in self.qsfp_ports:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE)
+                elif port_num in self.osfp_ports:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.QSFPDD_DEVICE_TYPE)
+                else:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE)
+                if ret != 0:
+                    print("Error adding sfp device")
+                    return None
+
+            sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path
+
+        return sysfs_sfp_i2c_client_eeprom_path
+
+    def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes):
+        eeprom_raw = []
+        for i in range(0, num_bytes):
+            eeprom_raw.append("0x00")
+
+        rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes)
+        if rv == False:
+            return None
+
+        try:
+            for n in range(0, num_bytes):
+                if isinstance(raw[n], str):
+                    eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2)
+                elif isinstance(raw[n], int):
+                    eeprom_raw[n] = hex(raw[n])[2:].zfill(2)
+        except Exception as e:
+            return None
+
+        return eeprom_raw
+
+    def get_eeprom_dom_raw(self, port_num):
+        if port_num in self.qsfp_ports:
+            # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw
+            return None
+        else:
+            # Read dom eeprom at addr 0x51
+            return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256)
+
+    def get_presence(self, port_num):
+        # Check for invalid port_num
+        if port_num < self.port_start or port_num > self.port_end:
+            return False
+        cmd = "cat /sys/wb_plat/sff/sff{}/present".format(str(port_num+1))
+        ret, output = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            return False
+        if output == "1":
+            return True
+        return False
+
+    def get_low_power_mode(self, port_num):
+        # Check for invalid port_num
+
+        return True
+
+    def set_low_power_mode(self, port_num, lpmode):
+        # Check for invalid port_num
+
+        return True
+
+    def reset(self, port_num):
+        # Check for invalid port_num
+        if port_num < self.port_start or port_num > self.port_end:
+            return False
+
+        return True
+
+    def get_transceiver_change_event(self):
+        return False, {}
+
+    def _get_sfp_type(self, port_num):
+        try:
+            if self.get_presence(port_num) == False:
+                return False, None
+
+            eeprom_path = self._get_port_eeprom_path(port_num, 0x50)
+            with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+                eeprom_raw = self._read_eeprom_specific_bytes(eeprom, 0, 1)
+                if (eeprom_raw[0] == '1e' or eeprom_raw[0] == '18'):
+                    return True, "qsfp_dd"
+                elif (eeprom_raw[0] == '11' or eeprom_raw[0] == '0D'):
+                    return True, "qsfp"
+                elif (eeprom_raw[0] == '03'):
+                    return True, "sfp"
+        except Exception as e:
+            print(traceback.format_exc())
+
+        return False, None
+
+    def twos_comp(self, num, bits):
+        try:
+            if ((num & (1 << (bits - 1))) != 0):
+                num = num - (1 << bits)
+            return num
+        except Exception:
+            return 0
+
+    def get_highest_temperature(self):
+        offset = 0
+        hightest_temperature = -9999
+
+        presence_flag = False
+        read_eeprom_flag = False
+        temperature_valid_flag = False
+
+        for port in range(self.PORT_START, self.PORTS_IN_BLOCK):
+            if self.get_presence(port) == False:
+                continue
+
+            presence_flag = True
+
+            if port in self.osfp_ports:
+                offset = 14
+            elif port in self.qsfp_ports:
+                offset = 22
+            else:
+                offset = 96
+
+            eeprom_path = self._get_port_eeprom_path(port, 0x50)
+            try:
+                with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+                    read_eeprom_flag = True
+                    eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2)
+                    msb = int(eeprom_raw[0], 16)
+                    lsb = int(eeprom_raw[1], 16)
+
+                    result = (msb << 8) | (lsb & 0xff)
+                    result = self.twos_comp(result, 16)
+                    result = float(result / 256.0)
+                    if -50 <= result <= 200:
+                        temperature_valid_flag = True
+                        if hightest_temperature < result:
+                            hightest_temperature = result
+            except Exception as e:
+                ##print(traceback.format_exc())
+                pass
+
+        # all port not presence
+        if presence_flag == False:
+            hightest_temperature = -10000
+
+        # all port read eeprom fail
+        elif read_eeprom_flag == False:
+            hightest_temperature = -9999
+
+        # all port temperature invalid
+        elif read_eeprom_flag == True and temperature_valid_flag == False:
+            hightest_temperature = -10000
+
+        hightest_temperature = round(hightest_temperature, 2)
+
+        return hightest_temperature
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/plugins/ssd_util.py
new file mode 100644
index 000000000000..e8cf2e1a7cbc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/plugins/ssd_util.py
@@ -0,0 +1,318 @@
+#
+# ssd_util.py
+#
+# Generic implementation of the SSD health API
+# SSD models supported:
+#  - InnoDisk
+#  - StorFly
+#  - Virtium
+
+try:
+    import re
+    import os
+    import subprocess
+    from sonic_platform_base.sonic_storage.storage_base import StorageBase
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+SMARTCTL = "smartctl {} -a"
+INNODISK = "iSmart -d {}"
+VIRTIUM  = "SmartCmd -m {}"
+DISK_LIST_CMD = "fdisk -l -o Device"
+DISK_FREE_CMD = "df -h"
+MOUNT_CMD = "mount"
+
+NOT_AVAILABLE = "N/A"
+PE_CYCLE = 3000
+FAIL_PERCENT = 95
+
+# Set Vendor Specific IDs
+INNODISK_HEALTH_ID = 169
+INNODISK_TEMPERATURE_ID = 194
+
+class SsdUtil(StorageBase):
+    """
+    Generic implementation of the SSD health API
+    """
+    model = NOT_AVAILABLE
+    serial = NOT_AVAILABLE
+    firmware = NOT_AVAILABLE
+    temperature = NOT_AVAILABLE
+    health = NOT_AVAILABLE
+    remaining_life = NOT_AVAILABLE
+    sata_rate = NOT_AVAILABLE
+    ssd_info = NOT_AVAILABLE
+    vendor_ssd_info = NOT_AVAILABLE
+
+    def __init__(self, diskdev):
+        self.vendor_ssd_utility = {
+            "Generic"  : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info },
+            "InnoDisk" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+            "M.2"      : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+            "StorFly"  : { "utility" : VIRTIUM,  "parser" : self.parse_virtium_info },
+            "Virtium"  : { "utility" : VIRTIUM,  "parser" : self.parse_virtium_info }
+        }
+
+        """
+        The dict model_attr keys relate the vendors
+        LITEON : "ER2-GD","AF2MA31DTDLT"
+        Intel  : "SSDSCKKB"
+        SMI    : "SM619GXC"
+        samsung: "MZNLH"
+        ADATA  : "IM2S3134N"
+        """
+        self.model_attr = {
+             "ER2-GD"       : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+             "AF2MA31DTDLT" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+             "SSDSCK"       : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n233\s+(.+?)\n" },
+             "SM619GXC"     : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n169\s+(.+?)\n" },
+             "MZNLH"        : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n245\s+(.+?)\n" },
+             "IM2S3134N"    : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n231\s+(.+?)\n" },
+             "MTFDDAV240TCB-1AR1ZABAA"    : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }
+        }
+
+        self.key_list = list(self.model_attr.keys())
+        self.attr_info_rule = "[\s\S]*SMART Attributes Data Structure revision number: 1|SMART Error Log Version[\s\S]*"
+        self.dev = diskdev
+        # Generic part
+        self.fetch_generic_ssd_info(diskdev)
+        self.parse_generic_ssd_info()
+        self.fetch_vendor_ssd_info(diskdev, "Generic")
+        
+        # Known vendor part
+        if self.model:
+            model_short = self.model.split()[0]
+            if model_short in self.vendor_ssd_utility:
+                self.fetch_vendor_ssd_info(diskdev, model_short)
+                self.parse_vendor_ssd_info(model_short)
+            else:
+                # No handler registered for this disk model
+                pass
+        else:
+            # Failed to get disk model
+            self.model = "Unknown"
+
+    def _execute_shell(self, cmd):
+        process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE)
+        output, error = process.communicate()
+        exit_code = process.returncode
+        if exit_code:
+            return None
+        return output
+
+    def _parse_re(self, pattern, buffer):
+        res_list = re.findall(pattern, str(buffer))
+        return res_list[0] if res_list else NOT_AVAILABLE
+
+    def fetch_generic_ssd_info(self, diskdev):
+        self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev))
+
+    # Health and temperature values may be overwritten with vendor specific data
+    def parse_generic_ssd_info(self):
+        if "nvme" in self.dev:
+            self.model = self._parse_re('Model Number:\s*(.+?)\n', self.ssd_info)
+
+            health_raw = self._parse_re('Percentage Used\s*(.+?)\n', self.ssd_info)
+            if health_raw == NOT_AVAILABLE:
+                self.health = NOT_AVAILABLE
+            else:
+                health_raw = health_raw.split()[-1]
+                self.health = 100 - float(health_raw.strip('%'))
+
+            temp_raw = self._parse_re('Temperature\s*(.+?)\n', self.ssd_info)
+            if temp_raw == NOT_AVAILABLE:
+                self.temperature = NOT_AVAILABLE
+            else:
+                temp_raw = temp_raw.split()[-2]
+                self.temperature = float(temp_raw)
+        else:
+            self.model = self._parse_re('Device Model:\s*(.+?)\n', self.ssd_info)
+            model_key = ""
+            for key in self.key_list:
+                if re.search(key, self.model):
+                    model_key = key
+                    break
+            if  model_key != "":
+                self.remaining_life = self._parse_re(self.model_attr[model_key]["remainingLife"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[2]
+                self.temperature = self._parse_re(self.model_attr[model_key]["temperature"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[8]
+                self.health = self.remaining_life
+            # Get the LITEON ssd health value by (PE CYCLE - AVG ERASE CYCLE )/(PE CYCLE)
+            if model_key in ["ER2-GD", "AF2MA31DTDLT"]:
+                avg_erase = int(self._parse_re('\n173\s+(.+?)\n' ,re.sub(self.attr_info_rule,"",self.ssd_info)).split()[-1])
+                self.health = int(round((PE_CYCLE - avg_erase)/PE_CYCLE*100,0))
+            if self.remaining_life != NOT_AVAILABLE and  int(self.remaining_life) < FAIL_PERCENT:
+                self.remaining_life = "Fail"
+        self.sata_rate = self._parse_re('SATA Version is:.*current: (.+?)\)\n', self.ssd_info)
+        self.serial = self._parse_re('Serial Number:\s*(.+?)\n', self.ssd_info)
+        self.firmware = self._parse_re('Firmware Version:\s*(.+?)\n', self.ssd_info)
+
+    def parse_innodisk_info(self):
+        if self.vendor_ssd_info:
+            self.health = self._parse_re('Health:\s*(.+?)%', self.vendor_ssd_info)
+            self.temperature = self._parse_re('Temperature\s*\[\s*(.+?)\]', self.vendor_ssd_info)
+        else:
+            if self.health == NOT_AVAILABLE:
+                health_raw = self.parse_id_number(INNODISK_HEALTH_ID)
+                self.health = health_raw.split()[-1]
+            if self.temperature == NOT_AVAILABLE:
+                temp_raw = self.parse_id_number(INNODISK_TEMPERATURE_ID)
+                self.temperature = temp_raw.split()[-6]
+
+    def parse_virtium_info(self):
+        if self.vendor_ssd_info:
+            self.temperature = self._parse_re('Temperature_Celsius\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            nand_endurance = self._parse_re('NAND_Endurance\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            avg_erase_count = self._parse_re('Average_Erase_Count\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            try:
+                self.health = 100 - (float(avg_erase_count) * 100 / float(nand_endurance))
+            except (ValueError, ZeroDivisionError):
+                # Invalid avg_erase_count or nand_endurance.
+                pass
+
+    def fetch_vendor_ssd_info(self, diskdev, model):
+        self.vendor_ssd_info = self._execute_shell(self.vendor_ssd_utility[model]["utility"].format(diskdev))
+
+    def parse_vendor_ssd_info(self, model):
+        self.vendor_ssd_utility[model]["parser"]()
+
+    def check_readonly2(self, partition, filesystem):
+        # parse mount cmd output info
+        mount_info = self._execute_shell(MOUNT_CMD)
+        for line in mount_info.split('\n'):
+            column_list = line.split()
+            if line == '':
+                continue
+            if column_list[0] == partition and column_list[2] == filesystem:
+                if column_list[5].split(',')[0][1:] == "ro":
+                    return partition
+                else:
+                    return NOT_AVAILABLE
+        return NOT_AVAILABLE
+
+    def check_readonly(self, partition, filesystem):
+        ret = os.access(filesystem, os.W_OK)
+        if ret == False:
+            return partition
+        else:
+            return NOT_AVAILABLE
+        
+    def get_health(self):
+        """
+        Retrieves current disk health in percentages
+
+        Returns:
+            A float number of current ssd health
+            e.g. 83.5
+        """
+        if self.health == 'N/A':
+            return "NA"
+        else:
+            return float(self.health)
+
+    def get_temperature(self):
+        """
+        Retrieves current disk temperature in Celsius
+
+        Returns:
+            A float number of current temperature in Celsius
+            e.g. 40.1
+        """
+        if self.temperature == 'N/A':
+            return 'NA'
+        else:
+            return float(self.temperature)
+
+    def get_model(self):
+        """
+        Retrieves model for the given disk device
+
+        Returns:
+            A string holding disk model as provided by the manufacturer
+        """
+        return self.model
+
+    def get_firmware(self):
+        """
+        Retrieves firmware version for the given disk device
+
+        Returns:
+            A string holding disk firmware version as provided by the manufacturer
+        """
+        return self.firmware
+
+    def get_serial(self):
+        """
+        Retrieves serial number for the given disk device
+
+        Returns:
+            A string holding disk serial number as provided by the manufacturer
+        """
+        return self.serial
+    def get_sata_rate(self):
+        """
+        Retrieves SATA rate for the given disk device
+        Returns:
+            A string holding current SATA rate as provided by the manufacturer
+        """
+        return self.sata_rate
+    def get_remaining_life(self):
+        """
+        Retrieves remaining life for the given disk device
+        Returns:
+            A string holding disk remaining life as provided by the manufacturer
+        """
+        return self.remaining_life
+    def get_vendor_output(self):
+        """
+        Retrieves vendor specific data for the given disk device
+
+        Returns:
+            A string holding some vendor specific disk information
+        """
+        return self.vendor_ssd_info
+
+    def parse_id_number(self, id):
+        return self._parse_re('{}\s*(.+?)\n'.format(id), self.ssd_info)
+
+    def get_readonly_partition(self):
+        """
+        Check the partition mount filesystem is readonly status,then output the result.
+        Returns:
+            The readonly partition list
+        """
+
+        ro_partition_list = []
+        partition_list = []
+
+        # parse fdisk cmd output info
+        disk_info = self._execute_shell(DISK_LIST_CMD)
+        begin_flag = False
+        for line in disk_info.split('\n'):
+            if line == "Device":
+                begin_flag = True
+                continue
+            if begin_flag:
+                if line != "":
+                    partition_list.append(line)
+                else:
+                    break
+
+        # parse df cmd output info
+        disk_free = self._execute_shell(DISK_FREE_CMD)
+        disk_dict = {}
+        line_num = 0
+        for line in disk_free.split('\n'):
+            line_num = line_num + 1
+            if line_num == 1 or line == "":
+                continue
+            column_list = line.split()
+            disk_dict[column_list[0]] = column_list[5]
+
+        # get partition which is readonly
+        for partition in partition_list:
+            if partition in disk_dict:
+                ret = self.check_readonly(partition, disk_dict[partition])
+                if (ret != NOT_AVAILABLE):
+                    ro_partition_list.append(ret)
+
+        return ro_partition_list
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pmon_daemon_control.json
new file mode 100644
index 000000000000..94592fa8cebc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/pmon_daemon_control.json
@@ -0,0 +1,3 @@
+{
+    "skip_ledd": true
+}
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/postinit_cmd_file.soc b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/postinit_cmd_file.soc
new file mode 100644
index 000000000000..fb86ee0a8e85
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/postinit_cmd_file.soc
@@ -0,0 +1,5 @@
+m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
+led auto on
+led start
+linkscan SwPortBitMap=cd,xe
+
diff --git a/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/system_health_monitoring_config.json b/device/micas/x86_64-micas_m2-w6920-32qc2x-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000000..e69de29bb2d1
diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk
index b3951f869530..c3763ab0c284 100755
--- a/platform/broadcom/one-image.mk
+++ b/platform/broadcom/one-image.mk
@@ -100,6 +100,7 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \
                                $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE) \
 			       $(MICAS_M2_W6510_48GT4V_PLATFORM_MODULE) \
 			       $(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE) \
+			       $(MICAS_M2_W6920_32QC2X_PLATFORM_MODULE) \
 			       $(MICAS_M2_W6510_32C_PLATFORM_MODULE)
 
 $(SONIC_ONE_IMAGE)_LAZY_BUILD_INSTALLS = $(BRCM_OPENNSL_KERNEL) $(BRCM_DNX_OPENNSL_KERNEL)
diff --git a/platform/broadcom/platform-modules-micas.mk b/platform/broadcom/platform-modules-micas.mk
index 729674eb7517..0b08c9a20822 100644
--- a/platform/broadcom/platform-modules-micas.mk
+++ b/platform/broadcom/platform-modules-micas.mk
@@ -25,6 +25,14 @@ MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE = platform-modules-micas-m2-w6520-24dc8qc
 $(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6520-24dc8qc-r0
 $(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE)))
 
+## M2-W6920-32QC2X
+MICAS_M2_W6920_32QC2X_PLATFORM_MODULE_VERSION = 1.0
+export MICAS_M2_W6920_32QC2X_PLATFORM_MODULE_VERSION
+
+MICAS_M2_W6920_32QC2X_PLATFORM_MODULE = platform-modules-micas-m2-w6920-32qc2x_$(MICAS_M2_W6920_32QC2X_PLATFORM_MODULE_VERSION)_amd64.deb
+$(MICAS_M2_W6920_32QC2X_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6920-32qc2x-r0
+$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6920_32QC2X_PLATFORM_MODULE)))
+
 ## M2-W6510-32C
 MICAS_M2_W6510_32C_PLATFORM_MODULE_VERSION = 1.0
 export MICAS_M2_W6510_32C_PLATFORM_MODULE_VERSION
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/control b/platform/broadcom/sonic-platform-modules-micas/debian/control
index c6f9acb4a27e..b4f166a75aca 100644
--- a/platform/broadcom/sonic-platform-modules-micas/debian/control
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/control
@@ -16,8 +16,11 @@ Package: platform-modules-micas-m2-w6520-24dc8qc
 Architecture: amd64
 Description: kernel modules for platform devices such as fan, led, sfp
 
-Package: platform-modules-micas-m2-w6510-32c
+Package: platform-modules-micas-m2-w6920-32qc2x
 Architecture: amd64
 Description: kernel modules for platform devices such as fan, led, sfp
 
+Package: platform-modules-micas-m2-w6510-32c
+Architecture: amd64
+Description: kernel modules for platform devices such as fan, led, sfp
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-32qc2x.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-32qc2x.install
new file mode 100644
index 000000000000..a719c1aecba0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-32qc2x.install
@@ -0,0 +1 @@
+m2-w6920-32qc2x/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6920-32qc2x-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-32qc2x.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-32qc2x.postinst
new file mode 100644
index 000000000000..a8132f4f65a9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-32qc2x.postinst
@@ -0,0 +1,10 @@
+#!/bin/sh
+# postinst
+
+kernel_version=$(uname -r)
+
+if [ -e /boot/System.map-${kernel_version} ]; then
+    depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
+fi
+
+#DEBHELPER#
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
index 5bd19a8ee8f1..ed2b043c3b5c 100644
--- a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
@@ -3,6 +3,7 @@ currentdir = $(shell pwd)
 MODULE_DIRS := m2-w6510-48v8c
 MODULE_DIRS += m2-w6510-48gt4v
 MODULE_DIRS += m2-w6520-24dc8qc
+MODULE_DIRS += m2-w6920-32qc2x
 MODULE_DIRS += m2-w6510-32c
 
 export MODULE_DIRS
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/Makefile
new file mode 100755
index 000000000000..a0c262841c51
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/Makefile
@@ -0,0 +1,28 @@
+PWD		= $(shell pwd)
+DIR_KERNEL_SRC = $(PWD)/modules/driver
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+SUB_BUILD_DIR = $(PWD)/build
+INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)
+INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin
+INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages
+INSTALL_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/plat_sysfs_cfg
+INSTALL_SERVICE_DIR = $(SUB_BUILD_DIR)/lib/systemd/system
+
+all:
+	$(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules
+	@if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi
+	cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR)
+	@if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi
+	cp -r $(PWD)/config/*  $(INSTALL_SCRIPT_DIR)
+	@if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi
+	@if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi
+	@if [ ! -d ${INSTALL_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_SYSFS_CFG_DIR} ;fi
+	@if [ -d $(PWD)/plat_sysfs_cfg/ ]; then cp -r $(PWD)/plat_sysfs_cfg/* ${INSTALL_SYSFS_CFG_DIR} ;fi
+	@if [ ! -d ${INSTALL_SERVICE_DIR} ]; then mkdir -p ${INSTALL_SERVICE_DIR} ;fi
+	@if [ -d $(PWD)/service/ ]; then cp -r $(PWD)/service/* ${INSTALL_SERVICE_DIR} ;fi
+clean:
+	rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd
+	rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order
+	rm -rf ${DIR_KERNEL_SRC}/.tmp_versions
+	rm -rf $(SUB_BUILD_DIR)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_config.py
new file mode 100644
index 000000000000..6eee7b5df129
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_config.py
@@ -0,0 +1,1443 @@
+
+#!/usr/bin/python
+# -*- coding: UTF-8 -*-
+from platform_common import *
+
+STARTMODULE = {
+    "hal_fanctrl": 1,
+    "hal_ledctrl": 1,
+    "avscontrol": 0,
+    "dev_monitor": 1,
+    "reboot_cause": 1,
+    "pmon_syslog": 1,
+    "sff_temp_polling": 1,
+    "generate_airflow": 1,
+    "set_eth_mac": 1,
+    "drv_update": 1,
+}
+
+MANUINFO_CONF = {
+    "bios": {
+        "key": "BIOS",
+        "head": True,
+        "next": "onie"
+    },
+    "bios_vendor": {
+        "parent": "bios",
+        "key": "Vendor",
+        "cmd": "dmidecode -t 0 |grep Vendor",
+        "pattern": r".*Vendor",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "bios_version": {
+        "parent": "bios",
+        "key": "Version",
+        "cmd": "dmidecode -t 0 |grep Version",
+        "pattern": r".*Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "bios_date": {
+        "parent": "bios",
+        "key": "Release Date",
+        "cmd": "dmidecode -t 0 |grep Release",
+        "pattern": r".*Release Date",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+    "onie": {
+        "key": "ONIE",
+        "next": "cpu"
+    },
+    "onie_date": {
+        "parent": "onie",
+        "key": "Build Date",
+        "file": "/host/machine.conf",
+        "pattern": r"^onie_build_date",
+        "separator": "=",
+        "arrt_index": 1,
+    },
+    "onie_version": {
+        "parent": "onie",
+        "key": "Version",
+        "file": "/host/machine.conf",
+        "pattern": r"^onie_version",
+        "separator": "=",
+        "arrt_index": 2,
+    },
+
+    "cpu": {
+        "key": "CPU",
+        "next": "cpld"
+    },
+    "cpu_vendor": {
+        "parent": "cpu",
+        "key": "Vendor",
+        "cmd": "dmidecode --type processor |grep Manufacturer",
+        "pattern": r".*Manufacturer",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "cpu_model": {
+        "parent": "cpu",
+        "key": "Device Model",
+        "cmd": "dmidecode --type processor | grep Version",
+        "pattern": r".*Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "cpu_core": {
+        "parent": "cpu",
+        "key": "Core Count",
+        "cmd": "dmidecode --type processor | grep \"Core Count\"",
+        "pattern": r".*Core Count",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+    "cpu_thread": {
+        "parent": "cpu",
+        "key": "Thread Count",
+        "cmd": "dmidecode --type processor | grep \"Thread Count\"",
+        "pattern": r".*Thread Count",
+        "separator": ":",
+        "arrt_index": 4,
+    },
+    "cpld": {
+        "key": "CPLD",
+        "next": "psu"
+    },
+
+    "cpld1": {
+        "key": "CPLD1",
+        "parent": "cpld",
+        "arrt_index": 1,
+    },
+    "cpld1_model": {
+        "key": "Device Model",
+        "parent": "cpld1",
+        "config": "LCMXO3LF-1300C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld1_vender": {
+        "key": "Vendor",
+        "parent": "cpld1",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld1_desc": {
+        "key": "Description",
+        "parent": "cpld1",
+        "config": "CPU_CPLD",
+        "arrt_index": 3,
+    },
+    "cpld1_version": {
+        "key": "Firmware Version",
+        "parent": "cpld1",
+        "reg": {
+            "loc": "/dev/port",
+            "offset": 0x700,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld2": {
+        "key": "CPLD2",
+        "parent": "cpld",
+        "arrt_index": 2,
+    },
+    "cpld2_model": {
+        "key": "Device Model",
+        "parent": "cpld2",
+        "config": "LCMXO3LF-2100C-5BG324C",
+        "arrt_index": 1,
+    },
+    "cpld2_vender": {
+        "key": "Vendor",
+        "parent": "cpld2",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld2_desc": {
+        "key": "Description",
+        "parent": "cpld2",
+        "config": "CTRL_CPLD",
+        "arrt_index": 3,
+    },
+    "cpld2_version": {
+        "key": "Firmware Version",
+        "parent": "cpld2",
+        "reg": {
+            "loc": "/dev/port",
+            "offset": 0x900,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld3": {
+        "key": "CPLD3",
+        "parent": "cpld",
+        "arrt_index": 3,
+    },
+    "cpld3_model": {
+        "key": "Device Model",
+        "parent": "cpld3",
+        "config": "LCMXO3LF_2100C_5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld3_vender": {
+        "key": "Vendor",
+        "parent": "cpld3",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld3_desc": {
+        "key": "Description",
+        "parent": "cpld3",
+        "config": "MAC_CPLDA",
+        "arrt_index": 3,
+    },
+    "cpld3_version": {
+        "key": "Firmware Version",
+        "parent": "cpld3",
+        "i2c": {
+            "bus": "26",
+            "loc": "0x1d",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld4": {
+        "key": "CPLD4",
+        "parent": "cpld",
+        "arrt_index": 4,
+    },
+    "cpld4_model": {
+        "key": "Device Model",
+        "parent": "cpld4",
+        "config": "LCMXO3LF_1300C_5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld4_vender": {
+        "key": "Vendor",
+        "parent": "cpld4",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld4_desc": {
+        "key": "Description",
+        "parent": "cpld4",
+        "config": "MAC_CPLDB",
+        "arrt_index": 3,
+    },
+    "cpld4_version": {
+        "key": "Firmware Version",
+        "parent": "cpld4",
+        "i2c": {
+            "bus": "26",
+            "loc": "0x2d",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld5": {
+        "key": "CPLD5",
+        "parent": "cpld",
+        "arrt_index": 5,
+    },
+    "cpld5_model": {
+        "key": "Device Model",
+        "parent": "cpld5",
+        "config": "LCMXO3LF_1300C_5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld5_vender": {
+        "key": "Vendor",
+        "parent": "cpld5",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld5_desc": {
+        "key": "Description",
+        "parent": "cpld5",
+        "config": "FAN_CPLD",
+        "arrt_index": 3,
+    },
+    "cpld5_version": {
+        "key": "Firmware Version",
+        "parent": "cpld5",
+        "i2c": {
+            "bus": "28",
+            "loc": "0x3d",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "psu": {
+        "key": "PSU",
+        "next": "fan"
+    },
+
+    "psu1": {
+        "parent": "psu",
+        "key": "PSU1",
+        "arrt_index": 1,
+    },
+    "psu1_hw_version": {
+        "key": "Hardware Version",
+        "parent": "psu1",
+        "extra": {
+            "funcname": "getPsu",
+            "id": "psu1",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "psu1_fw_version": {
+        "key": "Firmware Version",
+        "parent": "psu1",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "psu2": {
+        "parent": "psu",
+        "key": "PSU2",
+        "arrt_index": 2,
+    },
+    "psu2_hw_version": {
+        "key": "Hardware Version",
+        "parent": "psu2",
+        "extra": {
+            "funcname": "getPsu",
+            "id": "psu2",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "psu2_fw_version": {
+        "key": "Firmware Version",
+        "parent": "psu2",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan": {
+        "key": "FAN",
+        "next": "fpga"
+    },
+
+    "fan1": {
+        "key": "FAN1",
+        "parent": "fan",
+        "arrt_index": 1,
+    },
+    "fan1_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan1",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan1",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan1_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan1",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan2": {
+        "key": "FAN2",
+        "parent": "fan",
+        "arrt_index": 2,
+    },
+    "fan2_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan2",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan2",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan2_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan2",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan3": {
+        "key": "FAN3",
+        "parent": "fan",
+        "arrt_index": 3,
+    },
+    "fan3_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan3",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan3",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan3_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan3",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan4": {
+        "key": "FAN4",
+        "parent": "fan",
+        "arrt_index": 4,
+    },
+    "fan4_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan4",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan4",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan4_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan4",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan5": {
+        "key": "FAN5",
+        "parent": "fan",
+        "arrt_index": 5,
+    },
+    "fan5_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan5",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan5",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan5_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan5",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan6": {
+        "key": "FAN6",
+        "parent": "fan",
+        "arrt_index": 6,
+    },
+    "fan6_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan6",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan6",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan6_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan6",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fpga": {
+        "key": "FPGA",
+    },
+
+    "fpga1": {
+        "key": "FPGA1",
+        "parent": "fpga",
+        "arrt_index": 1,
+    },
+    "fpga1_model": {
+        "parent": "fpga1",
+        "config": "XC7A50T-2FGG484C",
+        "key": "Device Model",
+        "arrt_index": 1,
+    },
+    "fpga1_vender": {
+        "parent": "fpga1",
+        "config": "XILINX",
+        "key": "Vendor",
+        "arrt_index": 2,
+    },
+    "fpga1_desc": {
+        "key": "Description",
+        "parent": "fpga1",
+        "config": "MAC_FPGA",
+        "arrt_index": 3,
+    },
+    "fpga1_hw_version": {
+        "parent": "fpga1",
+        "config": "NA",
+        "key": "Hardware Version",
+        "arrt_index": 4,
+    },
+    "fpga1_fw_version": {
+        "parent": "fpga1",
+        "devfile": {
+            "loc": "/dev/fpga0",
+            "offset": 0,
+            "len": 4,
+            "bit_width": 4
+        },
+        "key": "Firmware Version",
+        "arrt_index": 5,
+    },
+    "fpga1_date": {
+        "parent": "fpga1",
+        "pci": {
+            "bus": 4,
+            "slot": 0,
+            "fn": 0,
+            "bar": 0,
+            "offset": 4
+        },
+        "key": "Build Date",
+        "arrt_index": 6,
+    },
+
+    "others": {
+        "key": "OTHERS",
+    },
+    "5387": {
+        "parent": "others",
+        "key": "CPU-BMC-SWITCH",
+        "arrt_index" : 1,
+    },
+    "5387_model": {
+        "parent": "5387",
+        "config": "BCM53134O",
+        "key": "Device Model",
+        "arrt_index" : 1,
+    },
+    "5387_vendor": {
+        "parent": "5387",
+        "config": "Broadcom",
+        "key": "Vendor",
+        "arrt_index" : 2,
+    },
+    "5387_hw_version": {
+        "parent": "5387",
+        "key": "Hardware Version",
+        "func": {
+            "funcname": "get_bcm5387_version",
+            "params" : {
+                "before": [
+                    {"gettype": "cmd", "cmd": "echo 99 > /sys/class/gpio/export"},
+                    {"gettype": "cmd", "cmd": "echo out > /sys/class/gpio/gpio99/direction"},
+                    {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio99/value"},
+                    # select update 5387
+                    {"gettype": "io", "io_addr": 0x991, "value": 0x6},
+                    {"gettype": "io", "io_addr": 0x990, "value": 0x1},
+                    {"gettype": "io", "io_addr": 0x9a6, "value": 0x2},
+                    {"gettype": "io", "io_addr": 0x9d4, "value": 0x0},
+                    {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio"},
+                    {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio_device sck=139 miso=88 mosi=89 cs=87 bus=0 gpio_chip_name=wb_gpio_c3000"},
+                    {"gettype": "cmd", "cmd": "modprobe wb_spi_93xx46 spi_bus_num=0"},
+                ],
+                "get_version": "md5sum /sys/bus/spi/devices/spi0.0/eeprom | awk '{print $1}'",
+                "after": [
+                    {"gettype": "cmd", "cmd": "echo 1 > /sys/class/gpio/gpio99/value"},
+                    {"gettype": "cmd", "cmd": "echo 99 > /sys/class/gpio/unexport"},
+                ],
+                "finally": [
+                    {"gettype": "cmd", "cmd": "rmmod wb_spi_93xx46"},
+                    {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio_device"},
+                    {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio"},
+                    {"gettype": "io", "io_addr": 0x9d4, "value": 0xff},
+                    {"gettype": "io", "io_addr": 0x9a6, "value": 0xff},
+                    {"gettype": "io", "io_addr": 0x990, "value": 0xfc},
+                    {"gettype": "io", "io_addr": 0x991, "value": 0xf8},
+                ],
+            },
+        },
+        "arrt_index" : 3,
+    },
+}
+
+PMON_SYSLOG_STATUS = {
+    "polling_time": 3,
+    "sffs": {
+        "present": {"path": ["/sys/wb_plat/sff/*/present"], "ABSENT": 0},
+        "nochangedmsgflag": 0,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 1,
+        "alias": {
+            "sff1": "Ethernet1",
+            "sff2": "Ethernet2",
+            "sff3": "Ethernet3",
+            "sff4": "Ethernet4",
+            "sff5": "Ethernet5",
+            "sff6": "Ethernet6",
+            "sff7": "Ethernet7",
+            "sff8": "Ethernet8",
+            "sff9": "Ethernet9",
+            "sff10": "Ethernet10",
+            "sff11": "Ethernet11",
+            "sff12": "Ethernet12",
+            "sff13": "Ethernet13",
+            "sff14": "Ethernet14",
+            "sff15": "Ethernet15",
+            "sff16": "Ethernet16",
+            "sff17": "Ethernet17",
+            "sff18": "Ethernet18",
+            "sff19": "Ethernet19",
+            "sff20": "Ethernet20",
+            "sff21": "Ethernet21",
+            "sff22": "Ethernet22",
+            "sff23": "Ethernet23",
+            "sff24": "Ethernet24",
+            "sff25": "Ethernet25",
+            "sff26": "Ethernet26",
+            "sff27": "Ethernet27",
+            "sff28": "Ethernet28",
+            "sff29": "Ethernet29",
+            "sff30": "Ethernet30",
+            "sff31": "Ethernet31",
+            "sff32": "Ethernet32",
+        }
+    },
+    "fans": {
+        "present": {"path": ["/sys/wb_plat/fan/*/present"], "ABSENT": 0},
+        "status": [
+            {"path": "/sys/wb_plat/fan/%s/motor0/status", 'okval': 1},
+            {"path": "/sys/wb_plat/fan/%s/motor1/status", 'okval': 1},
+        ],
+        "nochangedmsgflag": 1,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 0,
+        "alias": {
+            "fan1": "FAN1",
+            "fan2": "FAN2",
+            "fan3": "FAN3",
+            "fan4": "FAN4",
+            "fan5": "FAN5",
+            "fan6": "FAN6"
+        }
+    },
+    "psus": {
+        "present": {"path": ["/sys/wb_plat/psu/*/present"], "ABSENT": 0},
+        "status": [
+            {"path": "/sys/wb_plat/psu/%s/output", "okval": 1},
+            {"path": "/sys/wb_plat/psu/%s/alert", "okval": 0},
+        ],
+        "nochangedmsgflag": 1,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 0,
+        "alias": {
+            "psu1": "PSU1",
+            "psu2": "PSU2"
+        }
+    }
+}
+
+##################### MAC Voltage adjust####################################
+
+MAC_DEFAULT_PARAM = [
+    {
+        "name": "mac_core",              # AVS name
+        "type": 0,                       # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range
+        "default": 0x73,                 # default value, if rov value not in range
+        "rov_source": 0,                 # 0: get rov value from cpld, 1: get rov value from SDK
+        "cpld_avs": {"bus":26, "loc":0x2d, "offset":0x3f, "gettype":"i2c"},
+        "set_avs": {
+            "loc": "/sys/bus/i2c/devices/30-0040/avs0_vout_command","gettype": "sysfs","formula": None},
+        "mac_avs_param": {
+            0x72:0x0e66 ,
+            0x73:0x0e4c ,
+            0x74:0x0e33 ,
+            0x75:0x0e19 ,
+            0x76:0x0e00 ,
+            0x77:0x0de6 ,
+            0x78:0x0dcc ,
+            0x79:0x0db3 ,
+            0x7a:0x0d99 ,
+            0x7b:0x0d80 ,
+            0x7c:0x0d66 ,
+            0x7d:0x0d4c ,
+            0x7e:0x0d33 ,
+            0x7f:0x0d19 ,
+            0x80:0x0d00 ,
+            0x81:0x0ce6 ,
+            0x82:0x0ccc ,
+            0x83:0x0cb3 ,
+            0x84:0x0c99 ,
+            0x85:0x0c80 ,
+            0x86:0x0c66 ,
+            0x87:0x0c4c ,
+            0x88:0x0c33 ,
+            0x89:0x0c19 ,
+            0x8A:0x0c00
+        }
+    }
+]
+
+
+DRIVERLISTS = [
+    {"name": "wb_gpio_c3000", "delay": 30},
+    {"name": "wb_gpio_c3000_device", "delay": 0},
+    {"name": "i2c_ismt", "delay": 0},
+    {"name": "i2c_i801", "delay": 0},
+    {"name": "i2c_dev", "delay": 0},
+    {"name": "i2c_algo_bit", "delay": 0},
+    {"name": "i2c_gpio", "delay": 0},
+    {"name": "i2c_mux", "delay": 0},
+    {"name": "wb_i2c_gpio_device gpio_sda=31 gpio_scl=32 gpio_chip_name=wb_gpio_c3000", "delay": 0},
+    {"name": "mdio_bitbang", "delay": 0},
+    {"name": "mdio_gpio", "delay": 0},
+    {"name": "wb_mdio_gpio_device gpio_mdc=33 gpio_mdio=34 gpio_chip_name=wb_gpio_c3000", "delay": 0},
+    {"name": "platform_common dfd_my_type=0x40c1", "delay":0},
+    {"name": "wb_fpga_pcie", "delay": 0},
+    {"name": "wb_pcie_dev", "delay": 0},
+    {"name": "wb_pcie_dev_device", "delay": 0},
+    {"name": "wb_lpc_drv", "delay": 0},
+    {"name": "wb_lpc_drv_device", "delay": 0},
+    {"name": "wb_io_dev", "delay": 0},
+    {"name": "wb_io_dev_device", "delay": 0},
+    {"name": "wb_i2c_dev", "delay": 0},
+    {"name": "wb_fpga_i2c_bus_drv", "delay": 0},
+    {"name": "wb_fpga_i2c_bus_device", "delay": 0},
+    {"name": "wb_fpga_pca954x_drv", "delay": 0},
+    {"name": "wb_fpga_pca954x_device", "delay": 0},
+    {"name": "wb_i2c_dev_device", "delay": 0},
+    {"name": "lm75", "delay":0},
+    {"name": "tmp401", "delay":0},
+    {"name": "optoe", "delay":0},
+    {"name": "at24", "delay":0},
+    {"name": "wb_mac_bsc", "delay": 0},
+    {"name": "pmbus_core", "delay": 0},
+    {"name": "ucd9000", "delay": 0},
+    {"name": "wb_xdpe132g5c_pmbus", "delay":0},
+    {"name": "xdpe12284", "delay": 0},
+    {"name": "wb_csu550", "delay":0},
+    {"name": "tps53679", "delay": 0},
+    {"name": "wb_wdt", "delay": 0},
+    {"name": "wb_wdt_device", "delay": 0},
+    {"name": "plat_dfd", "delay":0},
+    {"name": "plat_switch", "delay":0},
+    {"name": "plat_fan", "delay":0},
+    {"name": "plat_psu", "delay":0},
+    {"name": "plat_sff", "delay":0},
+    {"name": "plat_sensor", "delay":0},
+    {"name": "hw_test", "delay": 0},
+]
+
+
+DEVICE = [
+    {"name":"24c02", "bus": 2, "loc": 0x56},
+    {"name": "wb_mac_bsc_th3", "bus": 62, "loc": 0x44},
+    {"name": "tps53688", "bus": 42, "loc": 0x68},
+    {"name": "tps53688", "bus": 42, "loc": 0x6e},
+    # fan
+    {"name":"24c64", "bus": 47, "loc": 0x50},#fan6
+    {"name":"24c64", "bus": 48, "loc": 0x50},#fan5
+    {"name":"24c64", "bus": 49, "loc": 0x50},#fan4
+    {"name":"24c64", "bus": 50, "loc": 0x50},#fan3
+    {"name":"24c64", "bus": 51, "loc": 0x50},#fan2
+    {"name":"24c64", "bus": 52, "loc": 0x50},#fan1
+    # psu
+    {"name":"24c02", "bus": 58, "loc": 0x50},
+    {"name":"wb_fsp1200","bus":58, "loc":0x58},
+    {"name":"24c02", "bus": 59, "loc": 0x50},
+    {"name":"wb_fsp1200","bus":59, "loc":0x58},
+
+    {"name":"24c02", "bus": 54, "loc": 0x56}, #fan eeprom
+    {"name":"24c02", "bus": 55, "loc": 0x57}, #mac eeprom
+    #temp
+    {"name":"tmp411", "bus": 56, "loc":0x4c},
+    {"name":"tmp411", "bus": 57, "loc":0x4c},
+    {"name":"lm75", "bus":53, "loc":0x48},
+    {"name":"lm75", "bus":53, "loc":0x49},
+    {"name":"lm75", "bus":56, "loc":0x4b},
+    {"name":"lm75", "bus":57, "loc":0x4f},
+    {"name":"lm75", "bus":57, "loc":0x4e},
+    # dcdc
+    {"name":"ucd90160", "bus": 41, "loc": 0x5b},
+    {"name":"ucd90160", "bus": 60, "loc": 0x5b},
+    {"name":"wb_xdpe132g5c_pmbus", "bus": 30, "loc": 0x40},
+    {"name":"xdpe12284", "bus": 31, "loc": 0x66},
+    {"name":"xdpe12284", "bus": 32, "loc": 0x70},
+    {"name":"xdpe12284", "bus": 32, "loc": 0x6e},
+    {"name":"xdpe12284", "bus": 42, "loc": 0x5e},
+    {"name":"xdpe12284", "bus": 42, "loc": 0x68},
+    {"name":"xdpe12284", "bus": 42, "loc": 0x6e},
+]
+
+OPTOE = [
+    {"name": "optoe3", "startbus": 63, "endbus": 94},
+    {"name": "optoe2", "startbus": 95, "endbus": 96},
+]
+
+REBOOT_CTRL_PARAM = {
+    "cpu": {"io_addr": 0x920, "rst_val": 0xfe, "rst_delay": 0, "gettype": "io"},
+    "mac": {"io_addr": 0x921, "rst_val": 0xfe, "rst_delay": 1, "unlock_rst_val": 0xff, "unlock_rst_delay": 1, "gettype": "io"},
+    "phy": {"io_addr": 0x923, "rst_val": 0xef, "rst_delay": 1, "unlock_rst_val": 0xff, "unlock_rst_delay": 1, "gettype": "io"},
+}
+
+REBOOT_CAUSE_PARA = {
+    "reboot_cause_list": [
+        {
+            "name": "cold_reboot",
+            "monitor_point": {"gettype": "io", "io_addr": 0x988, "okval": 0},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Power Loss, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Power Loss, ",
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size":1*1024*1024}
+            ]
+        },
+        {
+            "name": "wdt_reboot",
+            "monitor_point": {"gettype": "io", "io_addr": 0x989, "okval": 1},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Watchdog, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Watchdog, ", 
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size":1*1024*1024}
+            ],
+            "finish_operation": [
+                {"gettype": "io", "io_addr": 0x987, "value": 0xfc},
+            ]
+        },
+        {
+            "name": "otp_switch_reboot",
+            "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ",
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+            ],
+            "finish_operation": [
+                {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"},
+            ]
+        },
+        {
+            "name": "otp_other_reboot",
+            "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ",
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+            ],
+            "finish_operation": [
+                {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"},
+            ]
+        },
+    ],
+        "other_reboot_cause_record": [
+        {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+        {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+    ],
+}
+
+DEV_MONITOR_PARAM = {
+    "polling_time": 10,
+    "psus": [
+        {
+            "name": "psu1",
+            "present": {"gettype": "i2c", "bus": 26, "loc": 0x1d, "offset": 0x34, "presentbit": 4, "okval": 0},
+            "device": [
+                {"id": "psu1pmbus", "name": "wb_fsp1200", "bus": 59, "loc": 0x58, "attr": "hwmon"},
+                {"id": "psu1frue2", "name": "24c02", "bus": 59, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "psu2",
+            "present": {"gettype": "i2c", "bus": 26, "loc": 0x1d, "offset": 0x34, "presentbit": 0, "okval": 0},
+            "device": [
+                {"id": "psu2pmbus", "name": "wb_fsp1200", "bus": 58, "loc": 0x58, "attr": "hwmon"},
+                {"id": "psu2frue2", "name": "24c02", "bus": 58, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+    ],
+    "fans": [
+        {
+            "name": "fan1",
+            "present": {"gettype": "i2c", "bus": 28, "loc": 0x3d, "offset": 0x37, "presentbit": 5, "okval": 0},
+            "device": [
+                {"id": "fan1frue2", "name": "24c64", "bus": 52, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan2",
+            "present": {"gettype": "i2c", "bus": 28, "loc": 0x3d, "offset": 0x37, "presentbit": 4, "okval": 0},
+            "device": [
+                {"id": "fan2frue2", "name": "24c64", "bus": 51, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan3",
+            "present": {"gettype": "i2c", "bus": 28, "loc": 0x3d, "offset": 0x37, "presentbit": 3, "okval": 0},
+            "device": [
+                {"id": "fan3frue2", "name": "24c64", "bus": 50, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan4",
+            "present": {"gettype": "i2c", "bus": 28, "loc": 0x3d, "offset": 0x37, "presentbit": 2, "okval": 0},
+            "device": [
+                {"id": "fan4frue2", "name": "24c64", "bus": 49, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan5",
+            "present": {"gettype": "i2c", "bus": 28, "loc": 0x3d, "offset": 0x37, "presentbit": 1, "okval": 0},
+            "device": [
+                {"id": "fan5frue2", "name": "24c64", "bus": 48, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan6",
+            "present": {"gettype": "i2c", "bus": 28, "loc": 0x3d, "offset": 0x37, "presentbit": 0, "okval": 0},
+            "device": [
+                {"id": "fan6frue2", "name": "24c64", "bus": 47, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+    ],
+    "others": [
+        {
+            "name": "eeprom",
+            "device": [
+                {"id": "eeprom_1", "name": "24c02", "bus": 2, "loc": 0x56, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "lm75",
+            "device": [
+                {"id": "lm75_1", "name": "lm75", "bus": 53, "loc": 0x48, "attr": "hwmon"},
+                {"id": "lm75_2", "name": "lm75", "bus": 53, "loc": 0x49, "attr": "hwmon"},
+                {"id": "lm75_3", "name": "lm75", "bus": 56, "loc": 0x4b, "attr": "hwmon"},
+                {"id": "lm75_4", "name": "lm75", "bus": 57, "loc": 0x4f, "attr": "hwmon"},
+                {"id": "lm75_5", "name": "lm75", "bus": 57, "loc": 0x4e, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "tmp411",
+            "device": [
+                {"id": "tmp411_1", "name": "tmp411", "bus": 56, "loc": 0x4c, "attr": "hwmon"},
+                {"id": "tmp411_2", "name": "tmp411", "bus": 57, "loc": 0x4c, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "xdpe12284",
+            "device": [
+                {"id": "xdpe12284_1", "name": "xdpe12284", "bus": 31, "loc": 0x66, "attr": "hwmon"},
+                {"id": "xdpe12284_2", "name": "xdpe12284", "bus": 32, "loc": 0x70, "attr": "hwmon"},
+                {"id": "xdpe12284_3", "name": "xdpe12284", "bus": 32, "loc": 0x6e, "attr": "hwmon"},
+                {"id": "xdpe12284_4", "name": "xdpe12284", "bus": 42, "loc": 0x5e, "attr": "hwmon"},
+                {"id": "xdpe12284_5", "name": "xdpe12284", "bus": 42, "loc": 0x68, "attr": "hwmon"},
+                {"id": "xdpe12284_6", "name": "xdpe12284", "bus": 42, "loc": 0x6e, "attr": "hwmon"},
+            ],
+        },
+    ],
+}
+
+INIT_PARAM_PRE = []
+INIT_COMMAND_PRE = [
+    "i2cset -y -f 26 0x1d 0x51 0x03",
+    "i2cset -y -f 26 0x1d 0x54 0x03",
+]
+
+INIT_PARAM = []
+
+INIT_COMMAND = []
+
+
+WARM_UPGRADE_PARAM = {
+    "slot0": {
+        "VME": {
+            "chain1": [
+                {"name": "BASE_CPLD",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/base_cpld_transf_header.vme",
+                    "init_cmd": [
+                        {"cmd": "echo 63 > /sys/class/gpio/export", "gettype": "cmd"},
+                        {"cmd": "echo out > /sys/class/gpio/gpio63/direction", "gettype": "cmd"},
+                        {"cmd": "echo 0 > /sys/class/gpio/gpio63/value", "gettype": "cmd"},
+                        {"io_addr": 0x9cc, "value": 0x0, "gettype": "io"},
+                    ],
+                    "rw_recover_reg": [
+                        {"io_addr": 0x932, "value": None, "gettype": "io"},
+                        {"io_addr": 0x933, "value": None, "gettype": "io"},
+                        {"io_addr": 0x937, "value": None, "gettype": "io"},
+                        {"io_addr": 0x938, "value": None, "gettype": "io"},
+                        {"io_addr": 0x939, "value": None, "gettype": "io"},
+                        {"io_addr": 0x93a, "value": None, "gettype": "io"},
+                        {"io_addr": 0x941, "value": None, "gettype": "io"},
+                        {"io_addr": 0x942, "value": None, "gettype": "io"},
+                        {"io_addr": 0x947, "value": None, "gettype": "io"},
+                        {"io_addr": 0x948, "value": None, "gettype": "io"},
+                        {"io_addr": 0x949, "value": None, "gettype": "io"},
+                        {"io_addr": 0x94d, "value": None, "gettype": "io"},
+                        {"io_addr": 0x94e, "value": None, "gettype": "io"},
+                        {"io_addr": 0x94f, "value": None, "gettype": "io"},
+                        {"io_addr": 0x950, "value": None, "gettype": "io"},
+                        {"io_addr": 0x951, "value": None, "gettype": "io"},
+                        {"io_addr": 0x952, "value": None, "gettype": "io"},
+                        {"io_addr": 0x953, "value": None, "gettype": "io"},
+                        {"io_addr": 0x990, "value": None, "gettype": "io"},
+                        {"io_addr": 0x991, "value": None, "gettype": "io"},
+                        {"io_addr": 0x9a3, "value": None, "gettype": "io"},
+                        {"io_addr": 0x9a4, "value": None, "gettype": "io"},
+                        {"io_addr": 0x9a5, "value": None, "gettype": "io"},
+                        {"io_addr": 0x9a6, "value": None, "gettype": "io"},
+                        {"io_addr": 0x9a7, "value": None, "gettype": "io"},
+                        {"io_addr": 0x9ad, "value": None, "gettype": "io"},
+                        {"io_addr": 0x9d2, "value": None, "gettype": "io"},
+                        {"io_addr": 0x9d3, "value": None, "gettype": "io"},
+                        {"io_addr": 0x9d4, "value": None, "gettype": "io"},
+                        {"io_addr": 0x9d5, "value": None, "gettype": "io"},
+                        {"io_addr": 0x9d6, "value": None, "gettype": "io"},
+                        {"io_addr": 0x9d7, "value": None, "gettype": "io"},
+                        {"io_addr": 0x9d8, "value": None, "gettype": "io"},
+                    ],
+                    "after_upgrade_delay": 30,
+                    "after_upgrade_delay_timeout": 60,
+                    "refresh_finish_flag_check": {"io_addr": 0x9cb, "value": 0x5a, "gettype": "io"},
+                    "access_check_reg": {"io_addr": 0x955, "value": 0xaa, "gettype": "io"},
+                    "finish_cmd": [
+                        {"io_addr": 0x9cc, "value": 0xff, "gettype": "io"},
+                        {"cmd": "echo 1 > /sys/class/gpio/gpio63/value", "gettype": "cmd"},
+                        {"cmd": "echo 63 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1},
+                    ],
+                 },
+            ],
+
+            "chain2": [
+                {"name": "MAC_CPLDA",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/mac_cplda_transf_header.vme",
+                    "init_cmd": [
+                        {"io_addr": 0x9a7, "value": 0x1, "gettype": "io"},
+                        {"io_addr": 0x9cc, "value": 0x0, "gettype": "io"},
+                    ],
+                    "rw_recover_reg": [
+                        {"bus": 26, "loc": 0x1d, "offset": 0x11, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x14, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x15, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x1c, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x1d, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x1f, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x20, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x21, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x22, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x35, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x36, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x37, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x38, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x39, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x3a, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x4c, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x4d, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x4e, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x4f, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x50, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x51, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x53, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x54, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x55, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x1d, "offset": 0x5f, "value": None, "gettype": "i2c"},
+                    ],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 30,
+                    "refresh_finish_flag_check": {"bus": 26, "loc": 0x1d, "offset": 0xcb, "value": 0x5a, "gettype": "i2c"},
+                    "access_check_reg": {"bus": 26, "loc": 0x1d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"},
+                    "finish_cmd": [
+                        {"io_addr": 0x9cc, "value": 0xff, "gettype": "io"},
+                        {"io_addr": 0x9a7, "value": 0x0, "gettype": "io"},
+                    ],
+                 },
+
+                {"name": "MAC_CPLDB",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/mac_cpldb_transf_header.vme",
+                    "init_cmd": [
+                        {"io_addr": 0x9a7, "value": 0x2, "gettype": "io"},
+                        {"io_addr": 0x9cc, "value": 0x0, "gettype": "io"},
+                    ],
+                    "rw_recover_reg": [
+                        {"bus": 26, "loc": 0x2d, "offset": 0x11, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0x14, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0x15, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0x22, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0x23, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0x30, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0x31, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0x32, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0x3a, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0x42, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0x43, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0x44, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0x4a, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0x4d, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0x50, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0x54, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0x55, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0x60, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0x61, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0x62, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0x63, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0x64, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0x65, "value": None, "gettype": "i2c"},
+                        {"bus": 26, "loc": 0x2d, "offset": 0xf3, "value": None, "gettype": "i2c"},
+                    ],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 30,
+                    "refresh_finish_flag_check": {"bus": 26, "loc": 0x2d, "offset": 0xcb, "value": 0x5a, "gettype": "i2c"},
+                    "access_check_reg": {"bus": 26, "loc": 0x2d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"},
+                    "finish_cmd": [
+                        {"io_addr": 0x9cc, "value": 0xff, "gettype": "io"},
+                        {"io_addr": 0x9a7, "value": 0x0, "gettype": "io"},
+                    ],
+                },
+            ],
+
+            "chain3": [
+                {"name": "FAN_CPLD",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/fan_cpld_transf_header.vme",
+                    "init_cmd": [],
+                    "rw_recover_reg": [
+                        {"bus": 28, "loc": 0x3d, "offset": 0x11, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x12, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x13, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x14, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x15, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x16, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x17, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x18, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x19, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x20, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x21, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x30, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x31, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x33, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x35, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x3a, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x3c, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x3d, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x3e, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x3f, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x40, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x41, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x60, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x61, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x62, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x63, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x64, "value": None, "gettype": "i2c"},
+                        {"bus": 28, "loc": 0x3d, "offset": 0x65, "value": None, "gettype": "i2c"},
+                    ],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 30,
+                    "access_check_reg": {"bus": 28, "loc": 0x3d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"},
+                    "finish_cmd": [],
+                 },
+            ],
+
+
+            "chain4": [
+                {"name": "CPU_CPLD",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/cpu_cpld_transf_header.vme",
+                    "init_cmd": [
+                        {"cmd": "echo 114 > /sys/class/gpio/export", "gettype": "cmd"},
+                        {"cmd": "echo high > /sys/class/gpio/gpio114/direction", "gettype": "cmd"},
+                        {"io_addr": 0x7a5, "value": 0x0, "gettype": "io"},
+                    ],
+                    "rw_recover_reg": [
+                        {"io_addr": 0x705, "value": None, "gettype": "io"},
+                        {"io_addr": 0x713, "value": None, "gettype": "io"},
+                        {"io_addr": 0x715, "value": None, "gettype": "io"},
+                        {"io_addr": 0x721, "value": None, "gettype": "io"},
+                        {"io_addr": 0x722, "value": None, "gettype": "io"},
+                        {"io_addr": 0x772, "value": None, "gettype": "io"},
+                        {"io_addr": 0x774, "value": None, "gettype": "io"},
+                        {"io_addr": 0x776, "value": None, "gettype": "io"},
+                        {"io_addr": 0x778, "value": None, "gettype": "io"},
+                        {"io_addr": 0x77a, "value": None, "gettype": "io"},
+                        {"io_addr": 0x77c, "value": None, "gettype": "io"},
+                        {"io_addr": 0x780, "value": None, "gettype": "io"},
+                    ],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 30,
+                    "access_check_reg": {"io_addr": 0x705, "value": 0x5a, "gettype": "io"},
+                    "finish_cmd": [
+                        {"io_addr": 0x7a5, "value": 0x1, "gettype": "io"},
+                        {"cmd": "echo 0 > /sys/class/gpio/gpio114/value", "gettype": "cmd"},
+                        {"cmd": "echo 114 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1},
+                    ],
+                 },
+            ],
+
+        },
+
+        "MTD": {
+            "chain1": [
+                {"name": "MAC_FPGA",
+                    "init_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+                        {"cmd": "setpci -s 00:0e.0 0xA0.W=0x0050", "gettype": "cmd"}, # link_disable
+                        {"io_addr": 0x9b0, "value": 0x3, "gettype": "io"},
+                    ],
+                    "after_upgrade_delay": 10,
+                    "after_upgrade_delay_timeout": 180,
+                    "access_check_reg": {
+                        "path": "/dev/fpga0", "offset": 0x8, "value": [0x55, 0xaa, 0x5a, 0xa5], "read_len":4, "gettype":"devfile",
+                        "polling_cmd":[
+                            {"cmd": "setpci -s 00:0e.0 0xA0.W=0x0060", "gettype": "cmd"}, # retrain_link
+                            {"cmd": "rmmod wb_fpga_pcie", "gettype": "cmd"},
+                            {"cmd": "modprobe wb_fpga_pcie", "gettype": "cmd", "delay": 0.1},
+                        ],
+                        "polling_delay": 0.1
+                    },
+                    "finish_cmd": [
+                        {"cmd": "setpci -s  00:0e.0 0xA0.W=0x0060", "gettype": "cmd"}, # retrain_link
+                        {"io_addr": 0x9b0, "value": 0x2, "gettype": "io"},
+                        {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+                    ],
+                },
+            ],
+        },
+    },
+    "stop_services_cmd": [
+        "/usr/local/bin/platform_process.py stop",
+    ],
+    "start_services_cmd": [
+        "/usr/local/bin/platform_process.py start",
+    ],
+}
+
+UPGRADE_SUMMARY = {
+    "devtype": 0x40c1,
+
+    "slot0": {
+        "subtype": 0,
+        "VME": {
+            "chain1": {
+                "name": "BASE_CPLD",
+                "is_support_warm_upg": 1,
+            },
+            "chain2": {
+                "name": "MAC_CPLD",
+                "is_support_warm_upg": 1,
+            },
+            "chain3": {
+                "name": "FAN_CPLD",
+                "is_support_warm_upg": 1,
+            },
+            "chain4": {
+                "name": "CPU_CPLD",
+                "is_support_warm_upg": 1,
+            },
+        },
+
+        "MTD": {
+            "chain1": {
+                "name": "MAC_FPGA",
+                "is_support_warm_upg": 1,
+                "init_cmd": [
+                    {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"},
+                    {"cmd": "modprobe wb_spi_gpio_device sck=139 miso=88 mosi=89 cs=87 bus=0 gpio_chip_name=wb_gpio_c3000", "gettype": "cmd"},
+                    {"cmd": "echo 99 > /sys/class/gpio/export", "gettype": "cmd"},
+                    {"cmd": "echo out > /sys/class/gpio/gpio99/direction", "gettype": "cmd", "delay": 0.1},
+                    {"cmd": "echo 0 > /sys/class/gpio/gpio99/value", "gettype": "cmd", "delay": 0.1},
+                    {"io_addr": 0x991, "value": 0xfa, "gettype": "io"},
+                    {"io_addr": 0x990, "value": 0xfd, "gettype": "io"},
+                    {"io_addr": 0x9a6, "value": 0xfe, "gettype": "io"},
+                    {"io_addr": 0x9d8, "value": 0xfd, "gettype": "io"},
+                    {"cmd": "modprobe wb_spi_nor_device spi_bus_num=0", "gettype": "cmd", "delay": 0.1},
+                ],
+                "finish_cmd": [
+                    {"cmd": "rmmod wb_spi_nor_device", "gettype": "cmd"},
+                    {"io_addr": 0x9d8, "value": 0xff, "gettype": "io"},
+                    {"io_addr": 0x9a6, "value": 0xff, "gettype": "io"},
+                    {"io_addr": 0x990, "value": 0xfc, "gettype": "io"},
+                    {"io_addr": 0x991, "value": 0xf8, "gettype": "io"},
+                    {"cmd": "echo 1 > /sys/class/gpio/gpio99/value", "gettype": "cmd"},
+                    {"cmd": "echo 99 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1},
+                    {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"},
+                    {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1},
+                ],
+            },
+
+            "chain3": {
+                "name": "BIOS",
+                "is_support_warm_upg": 0,
+                "filesizecheck": 10240,  # bios check file size, Unit: K
+                "init_cmd": [
+                    {"io_addr": 0x722, "value": 0x02, "gettype": "io"},
+                    {"cmd": "modprobe mtd", "gettype": "cmd"},
+                    {"cmd": "modprobe spi_nor", "gettype": "cmd"},
+                    {"cmd": "modprobe ofpart", "gettype": "cmd"},
+                    {"cmd": "modprobe intel_spi writeable=1", "gettype": "cmd"},
+                    {"cmd": "modprobe intel_spi_pci", "gettype": "cmd"},
+                ],
+                "finish_cmd": [
+                    {"cmd": "rmmod intel_spi_pci", "gettype": "cmd"},
+                    {"cmd": "rmmod intel_spi", "gettype": "cmd"},
+                    {"cmd": "rmmod ofpart", "gettype": "cmd"},
+                    {"cmd": "rmmod spi_nor", "gettype": "cmd"},
+                    {"cmd": "rmmod mtd", "gettype": "cmd"},
+                ],
+            },
+        },
+
+        "SYSFS": {
+            "chain2": {
+                "name": "BCM53134O",
+                "is_support_warm_upg": 0,
+                "init_cmd": [
+                    {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"},
+                    {"cmd": "modprobe wb_spi_gpio_device sck=139 miso=88 mosi=89 cs=87 bus=0 gpio_chip_name=wb_gpio_c3000", "gettype": "cmd"},
+                    {"cmd": "modprobe wb_spi_93xx46 spi_bus_num=0", "gettype": "cmd", "delay": 0.1},
+                ],
+                "finish_cmd": [
+
+                    {"cmd": "rmmod wb_spi_93xx46", "gettype": "cmd"},
+                    {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"},
+                    {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1},
+                ],
+            },
+        },
+
+        "TEST": {
+            "cpld": [
+                {"chain": 1, "file": "/etc/.upgrade_test/base_cpld_test_header.vme", "display_name": "BASE_CPLD"},
+                {"chain": 2, "file": "/etc/.upgrade_test/mac_cpld_test_header.vme", "display_name": "MAC_CPLD"},
+                {"chain": 3, "file": "/etc/.upgrade_test/fan_cpld_test_header.vme", "display_name": "FAN_CPLD"},
+                {"chain": 4, "file": "/etc/.upgrade_test/cpu_cpld_test_header.vme", "display_name": "CPU_CPLD"},
+            ],
+            "fpga": [
+                {"chain": 1,"file": "/etc/.upgrade_test/fpga_test_header.bin","display_name": "FPGA",},
+            ],
+        },
+    },
+}
+
+
+PLATFORM_E2_CONF = {
+    "fan": [
+        {"name": "fan1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/52-0050/eeprom"},
+        {"name": "fan2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/51-0050/eeprom"},
+        {"name": "fan3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/50-0050/eeprom"},
+        {"name": "fan4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/49-0050/eeprom"},
+        {"name": "fan5", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/48-0050/eeprom"},
+        {"name": "fan6", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/47-0050/eeprom"},
+    ],
+    "psu": [
+        {"name": "psu1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/59-0050/eeprom"},
+        {"name": "psu2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/58-0050/eeprom"},
+    ],
+    "syseeprom": [
+        {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/2-0056/eeprom"},
+    ],
+}
+
+AIR_FLOW_CONF = {
+    "psu_fan_airflow": {
+        "intake": ['GW-CRPS1300D', 'DPS-1300AB-6 F', 'DPS-1300AB-6 S'],
+        "exhaust": ['CRPS1300D3R', 'DPS-1300AB-11 C']
+    },
+
+    "fanairflow": {
+        "intake": ['M1HFAN IV-F'],
+        "exhaust": ['M1HFAN IV-R']
+    },
+
+    "fans": [
+        {
+            "name": "FAN1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/52-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+        {
+            "name": "FAN2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/51-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+        {
+            "name": "FAN3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/50-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+        {
+            "name": "FAN4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/49-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+        {
+            "name": "FAN5", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/48-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+        {
+            "name": "FAN6", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/47-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+    ],
+
+    "psus": [
+        {
+            "name": "PSU1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/59-0050/eeprom",
+            "area": "productInfoArea", "field": "productPartModelName", "decode": "psu_fan_airflow"
+        },
+        {
+            "name": "PSU2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/58-0050/eeprom",
+            "area": "productInfoArea", "field": "productPartModelName", "decode": "psu_fan_airflow"
+        }
+    ]
+}
+
+SET_MAC_CONF = [
+    {
+        "eth_name": "eth0",
+        "e2_name": "syseeprom",
+        "e2_type": "onie_tlv",
+        "e2_path": "/sys/bus/i2c/devices/2-0056/eeprom",
+        "mac_location": {"field": "Base MAC Address"},
+        "ifcfg": {
+            "ifcfg_file_path": "/etc/network/interfaces.d/ifcfg-eth0-mac", "file_mode": "add",
+        }
+    }
+]
+
+DRVIER_UPDATE_CONF = {
+    "reboot_flag": 1,
+    "drv_list": [
+        {
+            "source": "extra/sdhci_pci.ko",
+            "target": "kernel/drivers/mmc/host/sdhci-pci.ko",
+            "judge_flag": "/sys/module/sdhci_pci/parameters/wb_sdhci_pci"
+        },
+    ]
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_port_config.py
new file mode 100644
index 000000000000..3395be3e48e9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/config/x86_64_micas_m2_w6920_32qc2x_r0_port_config.py
@@ -0,0 +1,42 @@
+#!/usr/bin/python
+# -*- coding: UTF-8 -*-
+
+PLATFORM_INTF_OPTOE = {
+    "port_num": 34,
+    "port_bus_map": {
+        1: 65,
+        2: 66,
+        3: 63,
+        4: 64,
+        5: 67,
+        6: 68,
+        7: 69,
+        8: 70,
+        9: 71,
+        10: 72,
+        11: 73,
+        12: 74,
+        13: 75,
+        14: 76,
+        15: 77,
+        16: 78,
+        17: 79,
+        18: 80,
+        19: 81,
+        20: 82,
+        21: 83,
+        22: 84,
+        23: 85,
+        24: 86,
+        25: 87,
+        26: 88,
+        27: 89,
+        28: 90,
+        29: 93,
+        30: 94,
+        31: 91,
+        32: 92,
+        33: 96,
+        34: 95
+    }
+}
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_device.py
new file mode 100644
index 000000000000..edbc3624c5d9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_device.py
@@ -0,0 +1,1333 @@
+# coding:utf-8
+
+psu_fan_airflow = {
+    "intake": ['GW-CRPS1300D', 'DPS-1300AB-6 F', 'DPS-1300AB-6 S'],
+    "exhaust": ['CRPS1300D3R', 'DPS-1300AB-11 C']
+}
+
+fanairflow = {
+    "intake": ['M1HFAN IV-F'],
+    "exhaust": ['M1HFAN IV-R']
+}
+
+psu_display_name = {
+    "PA1300I-F": ['GW-CRPS1300D', 'DPS-1300AB-6 F', 'DPS-1300AB-6 S'],
+    "PA1300I-R": ['CRPS1300D3R', 'DPS-1300AB-11 C']
+}
+
+psutypedecode = {
+    0x00: 'N/A',
+    0x01: 'AC',
+    0x02: 'DC',
+}
+
+
+class Unit:
+    Temperature = "C"
+    Voltage = "V"
+    Current = "A"
+    Power = "W"
+    Speed = "RPM"
+
+
+class threshold:
+    PSU_TEMP_MIN = -20 * 1000
+    PSU_TEMP_MAX = 60 * 1000
+
+    PSU_FAN_SPEED_MIN = 3000
+    PSU_FAN_SPEED_MAX = 30000
+
+    PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000
+    PSU_OUTPUT_VOLTAGE_MAX = 13 * 1000
+
+    PSU_AC_INPUT_VOLTAGE_MIN = 200 * 1000
+    PSU_AC_INPUT_VOLTAGE_MAX = 240 * 1000
+
+    PSU_DC_INPUT_VOLTAGE_MIN = 190 * 1000
+    PSU_DC_INPUT_VOLTAGE_MAX = 290 * 1000
+
+    ERR_VALUE = -9999999
+
+    PSU_OUTPUT_POWER_MIN = 5 * 1000 * 1000
+    PSU_OUTPUT_POWER_MAX = 1300 * 1000 * 1000
+
+    PSU_INPUT_POWER_MIN = 5 * 1000 * 1000
+    PSU_INPUT_POWER_MAX = 1400* 1000 * 1000
+
+    PSU_OUTPUT_CURRENT_MIN = 1 * 1000
+    PSU_OUTPUT_CURRENT_MAX = 107 * 1000
+
+    PSU_INPUT_CURRENT_MIN = 0.05 * 1000
+    PSU_INPUT_CURRENT_MAX = 12 * 1000
+
+    FRONT_FAN_SPEED_MAX = 32500
+    REAR_FAN_SPEED_MAX = 30500
+    FAN_SPEED_MIN = 7248
+
+
+class Description:
+    CPLD = "Used for managing IO modules, SFP+ modules and system LEDs"
+    BIOS = "Performs initialization of hardware components during booting"
+    FPGA = "Platform management controller for on-board temperature monitoring, in-chassis power"
+
+
+devices = {
+    "onie_e2": [
+        {
+            "name": "ONIE_E2",
+            "e2loc": {"loc": "/sys/bus/i2c/devices/2-0056/eeprom", "way": "sysfs"},
+            "airflow": "intake"
+        },
+    ],
+    "psus": [
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/59-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 59, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU1",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": threshold.PSU_TEMP_MIN,
+                "Max": threshold.PSU_TEMP_MAX,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": threshold.PSU_FAN_SPEED_MIN,
+                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 59, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.ERR_VALUE,
+                    "Max": threshold.ERR_VALUE,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_CURRENT_MIN,
+                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_POWER_MIN,
+                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_POWER_MIN,
+                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        },
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/58-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 58, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU2",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": threshold.PSU_TEMP_MIN,
+                "Max": threshold.PSU_TEMP_MAX,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": threshold.PSU_FAN_SPEED_MIN,
+                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Unit": Unit.Speed
+            },
+            "InputsStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 58, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.ERR_VALUE,
+                    "Max": threshold.ERR_VALUE,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent":
+            {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_CURRENT_MIN,
+                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower":
+            {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_POWER_MIN,
+                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage":
+            {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent":
+            {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower":
+            {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_POWER_MIN,
+                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        },
+    ],
+    "temps": [
+        {
+            "name": "BOARD_TEMP",
+            "temp_id": "TEMP1",
+            "Temperature": {
+                "value": [
+                    {"loc": "/sys/bus/i2c/devices/57-004f/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                    {"loc": "/sys/bus/i2c/devices/57-004e/hwmon/hwmon*/temp1_input", "way": "sysfs"}
+                ],
+                "Min": -10000,
+                "Low": 0,
+                "High": 85000,
+                "Max": 90000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "CPU_TEMP",
+            "temp_id": "TEMP2",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": 2000,
+                "Low": 10000,
+                "High": 85000,
+                "Max": 100000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "INLET_TEMP",
+            "temp_id": "TEMP3",
+            "Temperature": {
+                "value": [
+                    {"loc": "/sys/bus/i2c/devices/56-004b/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                ],
+                "Min": -10000,
+                "Low": 0,
+                "High": 50000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "OUTLET_TEMP",
+            "temp_id": "TEMP4",
+            "Temperature": {
+                "value": [
+                    {"loc": "/sys/bus/i2c/devices/53-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                    {"loc": "/sys/bus/i2c/devices/53-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}
+                ],
+                "Min": -10000,
+                "Low": 0,
+                "High": 85000,
+                "Max": 90000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "SWITCH_TEMP",
+            "temp_id": "TEMP5",
+            "api_name": "ASIC_TEMP",
+            "Temperature": {
+                "value": [
+                    {"loc": "/sys/bus/i2c/devices/56-004c/hwmon/hwmon*/temp2_input", "way": "sysfs"},
+                    {"loc": "/sys/bus/i2c/devices/57-004c/hwmon/hwmon*/temp2_input", "way": "sysfs"}
+                ],
+                "Min": 2000,
+                "Low": 10000,
+                "High": 100000,
+                "Max": 105000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU1_TEMP",
+            "temp_id": "TEMP6",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/59-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -20000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU2_TEMP",
+            "temp_id": "TEMP7",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/58-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -20000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "SFF_TEMP",
+            "Temperature": {
+                "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"},
+                "Min": -15000,
+                "Low": 0,
+                "High": 80000,
+                "Max": 100000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+    ],
+    "leds": [
+        {
+            "name": "BOARD_SYS_LED",
+            "led_type": "SYS_LED",
+            "led": {"bus": 26, "addr": 0x2d, "offset": 0x40, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x06, "red": 0x05, "amber": 0x03, "default": 0x06,
+                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x0f
+            },
+        },
+        {
+            "name": "BOARD_FAN_LED",
+            "led_type": "FAN_LED",
+            "led": {"bus": 26, "addr": 0x2d, "offset": 0x42, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x06, "red": 0x05, "amber": 0x03, "default": 0x06,
+                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x0f
+            },
+        },
+        {
+            "name": "BOARD_PSU_LED",
+            "led_type": "PSU_LED",
+            "led": {"bus": 26, "addr": 0x2d, "offset": 0x43, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x06, "red": 0x05, "amber": 0x03, "default": 0x06,
+                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x0f
+            },
+        },
+    ],
+    "fans": [
+        {
+            "name": "FAN1",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/52-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/wb_plat/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 28, "addr": 0x3d, "offset": 0x41, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+            },
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x65, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x65, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                     "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN2",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/51-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/wb_plat/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 28, "addr": 0x3d, "offset": 0x40, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+            },
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x64, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x64, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN3",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/50-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/wb_plat/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 28, "addr": 0x3d, "offset": 0x3f, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+            },
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x63, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan3/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x63, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan3/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN4",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/49-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/wb_plat/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 28, "addr": 0x3d, "offset": 0x3e, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+            },
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x62, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan4/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x62, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan4/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN5",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/48-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/wb_plat/fan/fan5/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 28, "addr": 0x3d, "offset": 0x3d, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+            },
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x61, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan5/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x61, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan5/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN6",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/47-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/wb_plat/fan/fan6/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 28, "addr": 0x3d, "offset": 0x3c, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+            },
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x60, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan6/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan6/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan6/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x60, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan6/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+    ],
+    "cplds": [
+        {
+            "name": "CPU_CPLD",
+            "cpld_id": "CPLD1",
+            "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for system power",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "CTRL_CPLD",
+            "cpld_id": "CPLD2",
+            "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "MAC_CPLDA",
+            "cpld_id": "CPLD3",
+            "VersionFile": {"loc": "/dev/cpld2", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for SFP+ modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "MAC_CPLDB",
+            "cpld_id": "CPLD4",
+            "VersionFile": {"loc": "/dev/cpld3", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for SFP+ modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "FAN_CPLD",
+            "cpld_id": "CPLD5",
+            "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for fan modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "MAC_FPGA",
+            "cpld_id": "CPLD6",
+            "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "format": "little_endian",
+            "warm": 1,
+        },
+        {
+            "name": "BIOS",
+            "cpld_id": "CPLD7",
+            "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"},
+            "desc": "Performs initialization of hardware components during booting",
+            "slot": 0,
+            "type": "str",
+            "warm": 0,
+        },
+    ],
+    "dcdc": [
+        {
+            "name": "MAC_VCC12V_CON",
+            "dcdc_id": "DCDC1",
+            "Min": 11400,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 12600,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD1.0V_FPGA",
+            "dcdc_id": "DCDC2",
+            "Min": 950,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1050,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD1.8V_FPGA",
+            "dcdc_id": "DCDC3",
+            "Min": 1710,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1890,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD1.2V_FPGA",
+            "dcdc_id": "DCDC4",
+            "Min": 1130,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in4_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1280,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD3.3V",
+            "dcdc_id": "DCDC5",
+            "Min": 3135,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in5_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3465,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_DVDD3.3V_1.8V",
+            "dcdc_id": "DCDC6",
+            "Min": 3135,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in6_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3465,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_AVDD1.8V",
+            "dcdc_id": "DCDC7",
+            "Min": 1710,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in7_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1890,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_DVDD1.2V",
+            "dcdc_id": "DCDC8",
+            "Min": 1130,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in8_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1280,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_AVDD1.2V",
+            "dcdc_id": "DCDC9",
+            "Min": 1130,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in9_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1280,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD3.3V_SFP+",
+            "dcdc_id": "DCDC10",
+            "Min": 3135,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in10_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3465,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD3.3V_CLK",
+            "dcdc_id": "DCDC11",
+            "Min": 3135,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in11_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3465,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD5V_VR",
+            "dcdc_id": "DCDC12",
+            "Min": 4500,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in13_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 5500,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD_CORE",
+            "dcdc_id": "DCDC13",
+            "Min": 700,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in14_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 980,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD_ANALOG",
+            "dcdc_id": "DCDC14",
+            "Min": 760,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in15_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 920,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD_ANALOG1",
+            "dcdc_id": "DCDC15",
+            "Min": 760,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in16_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 920,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "BASE_VDD3.3V",
+            "dcdc_id": "DCDC16",
+            "Min": 3135,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3465,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "BASE_VDD12V",
+            "dcdc_id": "DCDC17",
+            "Min": 11400,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 12600,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "BASE_VDD3.3_STBY",
+            "dcdc_id": "DCDC18",
+            "Min": 3135,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in4_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3465,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "BASE_SSD1_VDD3.3V",
+            "dcdc_id": "DCDC19",
+            "Min": 3135,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in5_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3465,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "BASE_PHY_VDD1V0",
+            "dcdc_id": "DCDC20",
+            "Min": 950,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in6_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1100,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "BASE_OVDD_PHY_M",
+            "dcdc_id": "DCDC21",
+            "Min": 3135,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in7_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3465,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "CPU_VCCP",
+            "dcdc_id": "DCDC22",
+            "Min": 468,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/42-0068/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1364,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "CPU_VNN",
+            "dcdc_id": "DCDC23",
+            "Min": 585,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/42-0068/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1364,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "CPU_P1V05",
+            "dcdc_id": "DCDC24",
+            "Min": 945,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/42-006e/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1155,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "CPU_VCCRAM",
+            "dcdc_id": "DCDC25",
+            "Min": 675,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/42-006e/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1320,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "CPU_P1V2_VDDQ",
+            "dcdc_id": "DCDC26",
+            "Min": 1080,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/42-005e/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1320,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD3.3_MON",
+            "dcdc_id": "DCDC27",
+            "Min": 3040,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in3/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3560,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_QSFPDD_VDD3.3V_A",
+            "dcdc_id": "DCDC28",
+            "Min": 3040,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in1/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3560,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_QSFPDD_VDD3.3V_B",
+            "dcdc_id": "DCDC29",
+            "Min": 3040,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in2/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3560,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD3.7V_CLK",
+            "dcdc_id": "DCDC30",
+            "Min": 3500,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in4/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 4000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD5V_USB",
+            "dcdc_id": "DCDC31",
+            "Min": 4500,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in5/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 5500,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "FAN6_VDD12V",
+            "dcdc_id": "DCDC32",
+            "Min": 11400,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in11/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 12600,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "FAN5_VDD12V",
+            "dcdc_id": "DCDC33",
+            "Min": 11400,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in10/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 12600,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "FAN4_VDD12V",
+            "dcdc_id": "DCDC34",
+            "Min": 11400,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in9/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 12600,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "FAN3_VDD12V",
+            "dcdc_id": "DCDC35",
+            "Min": 11400,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in8/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 12600,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "FAN2_VDD12V",
+            "dcdc_id": "DCDC36",
+            "Min": 11400,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in7/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 12600,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "FAN1_VDD12V",
+            "dcdc_id": "DCDC37",
+            "Min": 11400,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in6/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 12600,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "FAN_VDD3.3V",
+            "dcdc_id": "DCDC38",
+            "Min": 3040,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in12/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3560,
+            "format": "float(float(%s)/1000)",
+        },
+    ],
+    "cpu": [
+        {
+            "name": "cpu",
+            "CpuResetCntReg": {"loc": "/dev/cpld1", "offset": 0x88, "len": 1, "way": "devfile_ascii"},
+            "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"
+        }
+    ],
+    "cards": [
+        {
+            "name": "psu1",
+            "sn": "123"
+        },
+        {
+            "name": "psu2",
+            "sn": "456"
+        },
+    ],
+    "sfps": {
+        "ver": '1.0',
+        "port_index_start": 0,
+        "port_num": 34,
+        "log_level": 2,
+        "eeprom_retry_times": 5,
+        "eeprom_retry_break_sec": 0.2,
+        "presence_cpld": {
+            "dev_id": {
+                2: {
+                    "offset": {
+                        0x32: "17-24",
+                        0x33: "25-28,31,32,29,30",
+                        0x46: "34,33",
+                    },
+                },
+                3: {
+                    "offset": {
+                        0x4E: "3,4,1,2,5-8",
+                        0x4F: "9-16",
+                    },
+                },
+            },
+        },
+        "presence_val_is_present": 0,
+        "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom",
+        "eeprom_path_key": [65,66,63,64] + list(range(67, 91)) + [93,94,91,92,96,95],
+        "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class",
+        "optoe_driver_key": [65,66,63,64] + list(range(67, 91)) + [93,94,91,92,96,95],
+        "reset_cpld": {
+            "dev_id": {
+                2: {
+                    "offset": {
+                        0x21: "17-24",
+                        0x22: "25-28,31,32,29,30",
+                    },
+                },
+                3: {
+                    "offset": {
+                        0x22: "3,4,1,2,5-8",
+                        0x23: "9-16",
+                    },
+                },
+            },
+        },
+        "reset_val_is_reset": 0,
+        "txdis_cpld": {
+            "dev_id": {
+                2: {
+                    "offset": {
+                        0x50: "34,33",
+                    },
+                },
+            },
+        },
+        "txdisable_val_is_on": 1,
+    }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_exhaust_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_exhaust_device.py
new file mode 100644
index 000000000000..ceea936bd5cd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_exhaust_device.py
@@ -0,0 +1,1333 @@
+# coding:utf-8
+
+psu_fan_airflow = {
+    "intake": ['GW-CRPS1300D', 'DPS-1300AB-6 F', 'DPS-1300AB-6 S'],
+    "exhaust": ['CRPS1300D3R', 'DPS-1300AB-11 C']
+}
+
+fanairflow = {
+    "intake": ['M1HFAN IV-F'],
+    "exhaust": ['M1HFAN IV-R']
+}
+
+psu_display_name = {
+    "PA1300I-F": ['GW-CRPS1300D', 'DPS-1300AB-6 F', 'DPS-1300AB-6 S'],
+    "PA1300I-R": ['CRPS1300D3R', 'DPS-1300AB-11 C']
+}
+
+psutypedecode = {
+    0x00: 'N/A',
+    0x01: 'AC',
+    0x02: 'DC',
+}
+
+
+class Unit:
+    Temperature = "C"
+    Voltage = "V"
+    Current = "A"
+    Power = "W"
+    Speed = "RPM"
+
+
+class threshold:
+    PSU_TEMP_MIN = -20 * 1000
+    PSU_TEMP_MAX = 60 * 1000
+
+    PSU_FAN_SPEED_MIN = 3000
+    PSU_FAN_SPEED_MAX = 30000
+
+    PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000
+    PSU_OUTPUT_VOLTAGE_MAX = 13 * 1000
+
+    PSU_AC_INPUT_VOLTAGE_MIN = 200 * 1000
+    PSU_AC_INPUT_VOLTAGE_MAX = 240 * 1000
+
+    PSU_DC_INPUT_VOLTAGE_MIN = 190 * 1000
+    PSU_DC_INPUT_VOLTAGE_MAX = 290 * 1000
+
+    ERR_VALUE = -9999999
+
+    PSU_OUTPUT_POWER_MIN = 5 * 1000 * 1000
+    PSU_OUTPUT_POWER_MAX = 1300 * 1000 * 1000
+
+    PSU_INPUT_POWER_MIN = 5 * 1000 * 1000
+    PSU_INPUT_POWER_MAX = 1400* 1000 * 1000
+
+    PSU_OUTPUT_CURRENT_MIN = 1 * 1000
+    PSU_OUTPUT_CURRENT_MAX = 107 * 1000
+
+    PSU_INPUT_CURRENT_MIN = 0.05 * 1000
+    PSU_INPUT_CURRENT_MAX = 12 * 1000
+
+    FRONT_FAN_SPEED_MAX = 32500
+    REAR_FAN_SPEED_MAX = 30500
+    FAN_SPEED_MIN = 7248
+
+
+class Description:
+    CPLD = "Used for managing IO modules, SFP+ modules and system LEDs"
+    BIOS = "Performs initialization of hardware components during booting"
+    FPGA = "Platform management controller for on-board temperature monitoring, in-chassis power"
+
+
+devices = {
+    "onie_e2": [
+        {
+            "name": "ONIE_E2",
+            "e2loc": {"loc": "/sys/bus/i2c/devices/2-0056/eeprom", "way": "sysfs"},
+            "airflow": "exhaust"
+        },
+    ],
+    "psus": [
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/59-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 59, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU1",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": threshold.PSU_TEMP_MIN,
+                "Max": threshold.PSU_TEMP_MAX,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": threshold.PSU_FAN_SPEED_MIN,
+                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 59, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.ERR_VALUE,
+                    "Max": threshold.ERR_VALUE,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_CURRENT_MIN,
+                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_POWER_MIN,
+                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 59, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-59/59-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_POWER_MIN,
+                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        },
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/58-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 58, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU2",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": threshold.PSU_TEMP_MIN,
+                "Max": threshold.PSU_TEMP_MAX,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": threshold.PSU_FAN_SPEED_MIN,
+                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Unit": Unit.Speed
+            },
+            "InputsStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 58, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.ERR_VALUE,
+                    "Max": threshold.ERR_VALUE,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent":
+            {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_CURRENT_MIN,
+                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower":
+            {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_POWER_MIN,
+                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 58, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage":
+            {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent":
+            {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower":
+            {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-58/58-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_POWER_MIN,
+                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        },
+    ],
+    "temps": [
+        {
+            "name": "BOARD_TEMP",
+            "temp_id": "TEMP1",
+            "Temperature": {
+                "value": [
+                    {"loc": "/sys/bus/i2c/devices/57-004f/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                    {"loc": "/sys/bus/i2c/devices/57-004e/hwmon/hwmon*/temp1_input", "way": "sysfs"}
+                ],
+                "Min": -10000,
+                "Low": 0,
+                "High": 85000,
+                "Max": 90000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "CPU_TEMP",
+            "temp_id": "TEMP2",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": 2000,
+                "Low": 10000,
+                "High": 85000,
+                "Max": 100000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "INLET_TEMP",
+            "temp_id": "TEMP3",
+            "Temperature": {
+                "value": [
+                    {"loc": "/sys/bus/i2c/devices/53-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                    {"loc": "/sys/bus/i2c/devices/53-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}
+                ],
+                "Min": -10000,
+                "Low": 0,
+                "High": 50000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "OUTLET_TEMP",
+            "temp_id": "TEMP4",
+            "Temperature": {
+                "value": [
+                    {"loc": "/sys/bus/i2c/devices/56-004b/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                ],
+                "Min": -10000,
+                "Low": 0,
+                "High": 85000,
+                "Max": 90000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "SWITCH_TEMP",
+            "temp_id": "TEMP5",
+            "api_name": "ASIC_TEMP",
+            "Temperature": {
+                "value": [
+                    {"loc": "/sys/bus/i2c/devices/56-004c/hwmon/hwmon*/temp2_input", "way": "sysfs"},
+                    {"loc": "/sys/bus/i2c/devices/57-004c/hwmon/hwmon*/temp2_input", "way": "sysfs"}
+                ],
+                "Min": 2000,
+                "Low": 10000,
+                "High": 100000,
+                "Max": 105000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU1_TEMP",
+            "temp_id": "TEMP6",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/59-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -20000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU2_TEMP",
+            "temp_id": "TEMP7",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/58-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -20000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "SFF_TEMP",
+            "Temperature": {
+                "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"},
+                "Min": -15000,
+                "Low": 0,
+                "High": 80000,
+                "Max": 100000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+    ],
+    "leds": [
+        {
+            "name": "BOARD_SYS_LED",
+            "led_type": "SYS_LED",
+            "led": {"bus": 26, "addr": 0x2d, "offset": 0x40, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x06, "red": 0x05, "amber": 0x03, "default": 0x06,
+                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x0f
+            },
+        },
+        {
+            "name": "BOARD_FAN_LED",
+            "led_type": "FAN_LED",
+            "led": {"bus": 26, "addr": 0x2d, "offset": 0x42, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x06, "red": 0x05, "amber": 0x03, "default": 0x06,
+                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x0f
+            },
+        },
+        {
+            "name": "BOARD_PSU_LED",
+            "led_type": "PSU_LED",
+            "led": {"bus": 26, "addr": 0x2d, "offset": 0x43, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x06, "red": 0x05, "amber": 0x03, "default": 0x06,
+                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x0f
+            },
+        },
+    ],
+    "fans": [
+        {
+            "name": "FAN1",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/52-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/wb_plat/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 28, "addr": 0x3d, "offset": 0x41, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+            },
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x65, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x65, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                     "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN2",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/51-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/wb_plat/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 28, "addr": 0x3d, "offset": 0x40, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+            },
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x64, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x64, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN3",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/50-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/wb_plat/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 28, "addr": 0x3d, "offset": 0x3f, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+            },
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x63, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan3/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x63, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan3/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN4",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/49-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/wb_plat/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 28, "addr": 0x3d, "offset": 0x3e, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+            },
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x62, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan4/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x62, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan4/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN5",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/48-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/wb_plat/fan/fan5/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 28, "addr": 0x3d, "offset": 0x3d, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+            },
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x61, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan5/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x61, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan5/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN6",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/47-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/wb_plat/fan/fan6/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 28, "addr": 0x3d, "offset": 0x3c, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+            },
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x60, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan6/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan6/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan6/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Set_speed": {"bus": 28, "addr": 0x3d, "offset": 0x60, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan6/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+    ],
+    "cplds": [
+        {
+            "name": "CPU_CPLD",
+            "cpld_id": "CPLD1",
+            "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for system power",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "CTRL_CPLD",
+            "cpld_id": "CPLD2",
+            "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "MAC_CPLDA",
+            "cpld_id": "CPLD3",
+            "VersionFile": {"loc": "/dev/cpld2", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for SFP+ modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "MAC_CPLDB",
+            "cpld_id": "CPLD4",
+            "VersionFile": {"loc": "/dev/cpld3", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for SFP+ modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "FAN_CPLD",
+            "cpld_id": "CPLD5",
+            "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for fan modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "MAC_FPGA",
+            "cpld_id": "CPLD6",
+            "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "format": "little_endian",
+            "warm": 1,
+        },
+        {
+            "name": "BIOS",
+            "cpld_id": "CPLD7",
+            "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"},
+            "desc": "Performs initialization of hardware components during booting",
+            "slot": 0,
+            "type": "str",
+            "warm": 0,
+        },
+    ],
+    "dcdc": [
+        {
+            "name": "MAC_VCC12V_CON",
+            "dcdc_id": "DCDC1",
+            "Min": 11400,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 12600,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD1.0V_FPGA",
+            "dcdc_id": "DCDC2",
+            "Min": 950,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1050,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD1.8V_FPGA",
+            "dcdc_id": "DCDC3",
+            "Min": 1710,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1890,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD1.2V_FPGA",
+            "dcdc_id": "DCDC4",
+            "Min": 1130,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in4_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1280,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD3.3V",
+            "dcdc_id": "DCDC5",
+            "Min": 3135,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in5_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3465,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_DVDD3.3V_1.8V",
+            "dcdc_id": "DCDC6",
+            "Min": 3135,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in6_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3465,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_AVDD1.8V",
+            "dcdc_id": "DCDC7",
+            "Min": 1710,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in7_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1890,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_DVDD1.2V",
+            "dcdc_id": "DCDC8",
+            "Min": 1130,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in8_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1280,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_AVDD1.2V",
+            "dcdc_id": "DCDC9",
+            "Min": 1130,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in9_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1280,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD3.3V_SFP+",
+            "dcdc_id": "DCDC10",
+            "Min": 3135,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in10_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3465,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD3.3V_CLK",
+            "dcdc_id": "DCDC11",
+            "Min": 3135,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in11_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3465,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD5V_VR",
+            "dcdc_id": "DCDC12",
+            "Min": 4500,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in13_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 5500,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD_CORE",
+            "dcdc_id": "DCDC13",
+            "Min": 700,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in14_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 980,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD_ANALOG",
+            "dcdc_id": "DCDC14",
+            "Min": 760,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in15_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 920,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD_ANALOG1",
+            "dcdc_id": "DCDC15",
+            "Min": 760,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/60-005b/hwmon/hwmon*/in16_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 920,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "BASE_VDD3.3V",
+            "dcdc_id": "DCDC16",
+            "Min": 3135,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3465,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "BASE_VDD12V",
+            "dcdc_id": "DCDC17",
+            "Min": 11400,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 12600,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "BASE_VDD3.3_STBY",
+            "dcdc_id": "DCDC18",
+            "Min": 3135,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in4_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3465,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "BASE_SSD1_VDD3.3V",
+            "dcdc_id": "DCDC19",
+            "Min": 3135,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in5_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3465,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "BASE_PHY_VDD1V0",
+            "dcdc_id": "DCDC20",
+            "Min": 950,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in6_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1100,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "BASE_OVDD_PHY_M",
+            "dcdc_id": "DCDC21",
+            "Min": 3135,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/41-005b/hwmon/hwmon*/in7_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3465,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "CPU_VCCP",
+            "dcdc_id": "DCDC22",
+            "Min": 468,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/42-0068/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1364,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "CPU_VNN",
+            "dcdc_id": "DCDC23",
+            "Min": 585,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/42-0068/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1364,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "CPU_P1V05",
+            "dcdc_id": "DCDC24",
+            "Min": 945,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/42-006e/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1155,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "CPU_VCCRAM",
+            "dcdc_id": "DCDC25",
+            "Min": 675,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/42-006e/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1320,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "CPU_P1V2_VDDQ",
+            "dcdc_id": "DCDC26",
+            "Min": 1080,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/42-005e/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1320,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD3.3_MON",
+            "dcdc_id": "DCDC27",
+            "Min": 3040,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in3/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3560,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_QSFPDD_VDD3.3V_A",
+            "dcdc_id": "DCDC28",
+            "Min": 3040,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in1/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3560,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_QSFPDD_VDD3.3V_B",
+            "dcdc_id": "DCDC29",
+            "Min": 3040,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in2/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3560,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD3.7V_CLK",
+            "dcdc_id": "DCDC30",
+            "Min": 3500,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in4/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 4000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "MAC_VDD5V_USB",
+            "dcdc_id": "DCDC31",
+            "Min": 4500,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in5/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 5500,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "FAN6_VDD12V",
+            "dcdc_id": "DCDC32",
+            "Min": 11400,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in11/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 12600,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "FAN5_VDD12V",
+            "dcdc_id": "DCDC33",
+            "Min": 11400,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in10/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 12600,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "FAN4_VDD12V",
+            "dcdc_id": "DCDC34",
+            "Min": 11400,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in9/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 12600,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "FAN3_VDD12V",
+            "dcdc_id": "DCDC35",
+            "Min": 11400,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in8/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 12600,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "FAN2_VDD12V",
+            "dcdc_id": "DCDC36",
+            "Min": 11400,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in7/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 12600,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "FAN1_VDD12V",
+            "dcdc_id": "DCDC37",
+            "Min": 11400,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in6/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 12600,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "FAN_VDD3.3V",
+            "dcdc_id": "DCDC38",
+            "Min": 3040,
+            "value": {
+                "loc": "/sys/wb_plat/sensor/in12/in_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3560,
+            "format": "float(float(%s)/1000)",
+        },
+    ],
+    "cpu": [
+        {
+            "name": "cpu",
+            "CpuResetCntReg": {"loc": "/dev/cpld1", "offset": 0x88, "len": 1, "way": "devfile_ascii"},
+            "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"
+        }
+    ],
+    "cards": [
+        {
+            "name": "psu1",
+            "sn": "123"
+        },
+        {
+            "name": "psu2",
+            "sn": "456"
+        },
+    ],
+    "sfps": {
+        "ver": '1.0',
+        "port_index_start": 0,
+        "port_num": 34,
+        "log_level": 2,
+        "eeprom_retry_times": 5,
+        "eeprom_retry_break_sec": 0.2,
+        "presence_cpld": {
+            "dev_id": {
+                2: {
+                    "offset": {
+                        0x32: "17-24",
+                        0x33: "25-28,31,32,29,30",
+                        0x46: "34,33",
+                    },
+                },
+                3: {
+                    "offset": {
+                        0x4E: "3,4,1,2,5-8",
+                        0x4F: "9-16",
+                    },
+                },
+            },
+        },
+        "presence_val_is_present": 0,
+        "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom",
+        "eeprom_path_key": [65,66,63,64] + list(range(67, 91)) + [93,94,91,92,96,95],
+        "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class",
+        "optoe_driver_key": [65,66,63,64] + list(range(67, 91)) + [93,94,91,92,96,95],
+        "reset_cpld": {
+            "dev_id": {
+                2: {
+                    "offset": {
+                        0x21: "17-24",
+                        0x22: "25-28,31,32,29,30",
+                    },
+                },
+                3: {
+                    "offset": {
+                        0x22: "3,4,1,2,5-8",
+                        0x23: "9-16",
+                    },
+                },
+            },
+        },
+        "reset_val_is_reset": 0,
+        "txdis_cpld": {
+            "dev_id": {
+                2: {
+                    "offset": {
+                        0x50: "34,33",
+                    },
+                },
+            },
+        },
+        "txdisable_val_is_on": 1,
+    }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_exhaust_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_exhaust_monitor.py
new file mode 100644
index 000000000000..5bd96813eb2b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_exhaust_monitor.py
@@ -0,0 +1,213 @@
+# coding:utf-8
+
+
+monitor = {
+    "openloop": {
+        "linear": {
+            "name": "linear",
+            "flag": 0,
+            "pwm_min": 0x8d,
+            "pwm_max": 0xff,
+            "K": 11,
+            "tin_min": 28,
+        },
+        "curve": {
+            "name": "curve",
+            "flag": 1,
+            "pwm_min": 0x8d,
+            "pwm_max": 0xff,
+            "a": 0.1255,
+            "b": -1.2036,
+            "c": 76,
+            "tin_min": 25,
+        },
+    },
+
+    "pid": {
+        "CPU_TEMP": {
+            "name": "CPU_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x8d,
+            "pwm_max": 0xff,
+            "Kp": 1.5,
+            "Ki": 0.2,
+            "Kd": 0.3,
+            "target": 80,
+            "value": [None, None, None],
+        },
+        "SWITCH_TEMP": {
+            "name": "SWITCH_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x8d,
+            "pwm_max": 0xff,
+            "Kp": 1.5,
+            "Ki": 0.3,
+            "Kd": 0.3,
+            "target": 78,
+            "value": [None, None, None],
+        },
+        "OUTLET_TEMP": {
+            "name": "OUTLET_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x8d,
+            "pwm_max": 0xff,
+            "Kp": 2,
+            "Ki": 0.4,
+            "Kd": 0.3,
+            "target": 65,
+            "value": [None, None, None],
+        },
+        "BOARD_TEMP": {
+            "name": "BOARD_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x8d,
+            "pwm_max": 0xff,
+            "Kp": 2,
+            "Ki": 0.4,
+            "Kd": 0.3,
+            "target": 83,
+            "value": [None, None, None],
+        },
+        "SFF_TEMP": {
+            "name": "SFF_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x8d,
+            "pwm_max": 0xff,
+            "Kp": 0.3,
+            "Ki": 0.2,
+            "Kd": 0,
+            "target": 65,
+            "value": [None, None, None],
+        },
+    },
+
+    "temps_threshold": {
+        "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 110},
+        "INLET_TEMP": {"name": "INLET_TEMP", "warning": 45, "critical": 50, "fix": -2},
+        "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 90, "critical": 95},
+        "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75},
+        "CPU_TEMP": {"name": "CPU_TEMP", "warning": 87, "critical": 93},
+        "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999},
+    },
+
+    "fancontrol_para": {
+        "interval": 5,
+        "fan_status_interval": 0.5,
+        "max_pwm": 0xff,
+        "min_pwm": 0x8d,
+        "abnormal_pwm": 0xff,
+        "warning_pwm": 0xff,
+        "temp_invalid_pid_pwm": 0x8d,
+        "temp_error_pid_pwm": 0x8d,
+        "temp_fail_num": 3,
+        "check_temp_fail": [
+            {"temp_name": "INLET_TEMP"},
+            {"temp_name": "SWITCH_TEMP"},
+            {"temp_name": "CPU_TEMP"},
+        ],
+        "temp_warning_num": 3,  # temp over warning 3 times continuously
+        "temp_critical_num": 3,  # temp over critical 3 times continuously
+        "temp_warning_countdown": 60,  # 5 min warning speed after not warning
+        "temp_critical_countdown": 60,  # 5 min full speed after not critical
+        "rotor_error_count": 6,  # fan rotor error 6 times continuously
+        "inlet_mac_diff": 999,
+        "check_crit_reboot_flag": 1,
+        "check_crit_reboot_num": 3,
+        "check_crit_sleep_time": 20,
+
+        "deal_all_fan_error_method_flag": 1,
+        "all_fan_error_switch_temp_critical_temp": 95,
+        "all_fan_error_recover_log": "Power off base and mac board.",
+        "all_fan_error_recover_cmd": "dfd_debug io_wr 0x947 0xfa",
+        "all_fan_error_check_crit_reboot_num": 3,
+        "all_fan_error_check_crit_sleep_time": 2,
+
+        "psu_absent_fullspeed_num": 0xFF,  #Full-speed switchover - Number of Psus absent - Disables the full-speed switchover of Psus absent
+        "fan_absent_fullspeed_num": 2,  # Full speed rotation of the system -fan Indicates the number of absent bits
+        "rotor_error_fullspeed_num": 3,  # System full speed - Number of motor failures
+        "psu_fan_control": 1,  # Enable the psu fan control function
+        "deal_fan_error": 1,  # Handling Fan anomalies
+        "deal_fan_error_conf": {
+            "countdown": 2,     # max time:(2-1)*Speed regulation period
+            "FAN1": [
+                {"name": "FAN1", "pwm": 0xff},
+                {"name": "FAN2", "pwm": 0x99},
+                {"name": "FAN3", "pwm": 0x99},
+                {"name": "FAN4", "pwm": 0x99},
+                {"name": "FAN5", "pwm": 0x99},
+                {"name": "FAN6", "pwm": 0x99},
+            ],
+            "FAN2": [
+                {"name": "FAN1", "pwm": 0x99},
+                {"name": "FAN2", "pwm": 0xff},
+                {"name": "FAN3", "pwm": 0x99},
+                {"name": "FAN4", "pwm": 0x99},
+                {"name": "FAN5", "pwm": 0x99},
+                {"name": "FAN6", "pwm": 0x99},
+            ],
+            "FAN3": [
+                {"name": "FAN1", "pwm": 0x99},
+                {"name": "FAN2", "pwm": 0x99},
+                {"name": "FAN3", "pwm": 0xff},
+                {"name": "FAN4", "pwm": 0x99},
+                {"name": "FAN5", "pwm": 0x99},
+                {"name": "FAN6", "pwm": 0x99},
+            ],
+            "FAN4": [
+                {"name": "FAN1", "pwm": 0x99},
+                {"name": "FAN2", "pwm": 0x99},
+                {"name": "FAN3", "pwm": 0x99},
+                {"name": "FAN4", "pwm": 0xff},
+                {"name": "FAN5", "pwm": 0x99},
+                {"name": "FAN6", "pwm": 0x99},
+            ],
+            "FAN5": [
+                {"name": "FAN1", "pwm": 0x99},
+                {"name": "FAN2", "pwm": 0x99},
+                {"name": "FAN3", "pwm": 0x99},
+                {"name": "FAN4", "pwm": 0x99},
+                {"name": "FAN5", "pwm": 0xff},
+                {"name": "FAN6", "pwm": 0x99},
+            ],
+            "FAN6": [
+                {"name": "FAN1", "pwm": 0x99},
+                {"name": "FAN2", "pwm": 0x99},
+                {"name": "FAN3", "pwm": 0x99},
+                {"name": "FAN4", "pwm": 0x99},
+                {"name": "FAN5", "pwm": 0x99},
+                {"name": "FAN6", "pwm": 0xff},
+            ],
+        },
+    },
+
+    "ledcontrol_para": {
+        "interval": 5,
+        "checkpsu": 0,  # 0: sys led don't follow psu led
+        "checkfan": 0,  # 0: sys led don't follow fan led
+        "psu_amber_num": 1,
+        "fan_amber_num": 1,
+        "board_sys_led": [
+            {"led_name": "BOARD_SYS_LED"},
+        ],
+        "board_psu_led": [
+            {"led_name": "BOARD_PSU_LED"},
+        ],
+        "board_fan_led": [
+            {"led_name": "BOARD_FAN_LED"},
+        ],
+        "psu_air_flow_monitor": 1,
+        "fan_air_flow_monitor": 1,
+        "psu_air_flow_amber_num": 1,
+        "fan_air_flow_amber_num": 1,
+    },
+
+    "otp_reboot_judge_file": {
+        "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag",
+        "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag",
+    },
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_monitor.py
new file mode 100644
index 000000000000..d6b5c2b5aa0c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/hal-config/x86_64_micas_m2_w6920_32qc2x_r0_monitor.py
@@ -0,0 +1,213 @@
+# coding:utf-8
+
+
+monitor = {
+    "openloop": {
+        "linear": {
+            "name": "linear",
+            "flag": 0,
+            "pwm_min": 0x8d,
+            "pwm_max": 0xff,
+            "K": 11,
+            "tin_min": 28,
+        },
+        "curve": {
+            "name": "curve",
+            "flag": 1,
+            "pwm_min": 0x8d,
+            "pwm_max": 0xff,
+            "a": 0.1255,
+            "b": -1.2036,
+            "c": 76,
+            "tin_min": 25,
+        },
+    },
+
+    "pid": {
+        "CPU_TEMP": {
+            "name": "CPU_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x8d,
+            "pwm_max": 0xff,
+            "Kp": 1.5,
+            "Ki": 1,
+            "Kd": 0.3,
+            "target": 80,
+            "value": [None, None, None],
+        },
+        "SWITCH_TEMP": {
+            "name": "SWITCH_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x8d,
+            "pwm_max": 0xff,
+            "Kp": 1.5,
+            "Ki": 0.5,
+            "Kd": 0.3,
+            "target": 78,
+            "value": [None, None, None],
+        },
+        "OUTLET_TEMP": {
+            "name": "OUTLET_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x8d,
+            "pwm_max": 0xff,
+            "Kp": 2,
+            "Ki": 0.4,
+            "Kd": 0.3,
+            "target": 65,
+            "value": [None, None, None],
+        },
+        "BOARD_TEMP": {
+            "name": "BOARD_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x8d,
+            "pwm_max": 0xff,
+            "Kp": 2,
+            "Ki": 0.4,
+            "Kd": 0.3,
+            "target": 83,
+            "value": [None, None, None],
+        },
+        "SFF_TEMP": {
+            "name": "SFF_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x8d,
+            "pwm_max": 0xff,
+            "Kp": 0.3,
+            "Ki": 0.4,
+            "Kd": 0,
+            "target": 65,
+            "value": [None, None, None],
+        },
+    },
+
+    "temps_threshold": {
+        "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 110},
+        "INLET_TEMP": {"name": "INLET_TEMP", "warning": 45, "critical": 50, "fix": -4},
+        "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 90, "critical": 95},
+        "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75},
+        "CPU_TEMP": {"name": "CPU_TEMP", "warning": 87, "critical": 93},
+        "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999},
+    },
+
+    "fancontrol_para": {
+        "interval": 5,
+        "fan_status_interval": 0.5,
+        "max_pwm": 0xff,
+        "min_pwm": 0x8d,
+        "abnormal_pwm": 0xff,
+        "warning_pwm": 0xff,
+        "temp_invalid_pid_pwm": 0x8d,
+        "temp_error_pid_pwm": 0x8d,
+        "temp_fail_num": 3,
+        "check_temp_fail": [
+            {"temp_name": "INLET_TEMP"},
+            {"temp_name": "SWITCH_TEMP"},
+            {"temp_name": "CPU_TEMP"},
+        ],
+        "temp_warning_num": 3,  # temp over warning 3 times continuously
+        "temp_critical_num": 3,  # temp over critical 3 times continuously
+        "temp_warning_countdown": 60,  # 5 min warning speed after not warning
+        "temp_critical_countdown": 60,  # 5 min full speed after not critical
+        "rotor_error_count": 6,  # fan rotor error 6 times continuously
+        "inlet_mac_diff": 999,
+        "check_crit_reboot_flag": 1,
+        "check_crit_reboot_num": 3,
+        "check_crit_sleep_time": 20,
+
+        "deal_all_fan_error_method_flag": 1,
+        "all_fan_error_switch_temp_critical_temp": 95,
+        "all_fan_error_recover_log": "Power off base and mac board.",
+        "all_fan_error_recover_cmd": "dfd_debug io_wr 0x947 0xfa",
+        "all_fan_error_check_crit_reboot_num": 3,
+        "all_fan_error_check_crit_sleep_time": 2,
+
+        "psu_absent_fullspeed_num": 0xFF,  #Full-speed switchover - Number of Psus absent - Disables the full-speed switchover of Psus absent
+        "fan_absent_fullspeed_num": 2,  # Full speed rotation of the system -fan Indicates the number of absent bits
+        "rotor_error_fullspeed_num": 3,  # System full speed - Number of motor failures
+        "psu_fan_control": 1,  # Enable the psu fan control function
+        "deal_fan_error": 1,  # Handling Fan anomalies
+        "deal_fan_error_conf": {
+            "countdown": 2,     # max time:(2-1)*Speed regulation period
+            "FAN1": [
+                {"name": "FAN1", "pwm": 0xff},
+                {"name": "FAN2", "pwm": 0x99},
+                {"name": "FAN3", "pwm": 0x99},
+                {"name": "FAN4", "pwm": 0x99},
+                {"name": "FAN5", "pwm": 0x99},
+                {"name": "FAN6", "pwm": 0x99},
+            ],
+            "FAN2": [
+                {"name": "FAN1", "pwm": 0x99},
+                {"name": "FAN2", "pwm": 0xff},
+                {"name": "FAN3", "pwm": 0x99},
+                {"name": "FAN4", "pwm": 0x99},
+                {"name": "FAN5", "pwm": 0x99},
+                {"name": "FAN6", "pwm": 0x99},
+            ],
+            "FAN3": [
+                {"name": "FAN1", "pwm": 0x99},
+                {"name": "FAN2", "pwm": 0x99},
+                {"name": "FAN3", "pwm": 0xff},
+                {"name": "FAN4", "pwm": 0x99},
+                {"name": "FAN5", "pwm": 0x99},
+                {"name": "FAN6", "pwm": 0x99},
+            ],
+            "FAN4": [
+                {"name": "FAN1", "pwm": 0x99},
+                {"name": "FAN2", "pwm": 0x99},
+                {"name": "FAN3", "pwm": 0x99},
+                {"name": "FAN4", "pwm": 0xff},
+                {"name": "FAN5", "pwm": 0x99},
+                {"name": "FAN6", "pwm": 0x99},
+            ],
+            "FAN5": [
+                {"name": "FAN1", "pwm": 0x99},
+                {"name": "FAN2", "pwm": 0x99},
+                {"name": "FAN3", "pwm": 0x99},
+                {"name": "FAN4", "pwm": 0x99},
+                {"name": "FAN5", "pwm": 0xff},
+                {"name": "FAN6", "pwm": 0x99},
+            ],
+            "FAN6": [
+                {"name": "FAN1", "pwm": 0x99},
+                {"name": "FAN2", "pwm": 0x99},
+                {"name": "FAN3", "pwm": 0x99},
+                {"name": "FAN4", "pwm": 0x99},
+                {"name": "FAN5", "pwm": 0x99},
+                {"name": "FAN6", "pwm": 0xff},
+            ],
+        },
+    },
+
+    "ledcontrol_para": {
+        "interval": 5,
+        "checkpsu": 0,  # 0: sys led don't follow psu led
+        "checkfan": 0,  # 0: sys led don't follow fan led
+        "psu_amber_num": 1,
+        "fan_amber_num": 1,
+        "board_sys_led": [
+            {"led_name": "BOARD_SYS_LED"},
+        ],
+        "board_psu_led": [
+            {"led_name": "BOARD_PSU_LED"},
+        ],
+        "board_fan_led": [
+            {"led_name": "BOARD_FAN_LED"},
+        ],
+        "psu_air_flow_monitor": 1,
+        "fan_air_flow_monitor": 1,
+        "psu_air_flow_amber_num": 1,
+        "fan_air_flow_amber_num": 1,
+    },
+
+    "otp_reboot_judge_file": {
+        "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag",
+        "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag",
+    },
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/Makefile
new file mode 100644
index 000000000000..0a1798579e1c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/Makefile
@@ -0,0 +1,13 @@
+MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
+MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules)
+
+EXTRA_CFLAGS+= -I$(MODULES_DIR)
+
+
+obj-m += wb_pcie_dev_device.o
+obj-m += wb_lpc_drv_device.o
+obj-m += wb_io_dev_device.o
+obj-m += wb_fpga_i2c_bus_device.o
+obj-m += wb_fpga_pca954x_device.o
+obj-m += wb_i2c_dev_device.o
+obj-m += wb_wdt_device.o
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_i2c_bus_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_i2c_bus_device.c
new file mode 100644
index 000000000000..4b8f3f53788f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_i2c_bus_device.c
@@ -0,0 +1,993 @@
+/*
+ * An wb_fpga_i2c_bus_device driver for fpga i2c device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <fpga_i2c.h>
+
+static int g_wb_fpga_i2c_debug = 0;
+static int g_wb_fpga_i2c_error = 0;
+
+module_param(g_wb_fpga_i2c_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_fpga_i2c_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_FPGA_I2C_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_fpga_i2c_debug) { \
+        printk(KERN_INFO "[WB_FPGA_I2C][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_FPGA_I2C_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_fpga_i2c_error) { \
+        printk(KERN_ERR "[WB_FPGA_I2C][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data0 = {
+    .adap_nr                    = 3,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x500,
+    .i2c_filter                 = 0x504,
+    .i2c_stretch                = 0x508,
+    .i2c_ext_9548_exits_flag    = 0x50c,
+    .i2c_ext_9548_addr          = 0x510,
+    .i2c_ext_9548_chan          = 0x514,
+    .i2c_in_9548_chan           = 0x518,
+    .i2c_slave                  = 0x51c,
+    .i2c_reg                    = 0x520,
+    .i2c_reg_len                = 0x530,
+    .i2c_data_len               = 0x534,
+    .i2c_ctrl                   = 0x538,
+    .i2c_status                 = 0x53c,
+    .i2c_data_buf               = 0x580,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x80,
+    .i2c_reset_on               = 0x00000001,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data1 = {
+    .adap_nr                    = 4,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x600,
+    .i2c_filter                 = 0x604,
+    .i2c_stretch                = 0x608,
+    .i2c_ext_9548_exits_flag    = 0x60c,
+    .i2c_ext_9548_addr          = 0x610,
+    .i2c_ext_9548_chan          = 0x614,
+    .i2c_in_9548_chan           = 0x618,
+    .i2c_slave                  = 0x61c,
+    .i2c_reg                    = 0x620,
+    .i2c_reg_len                = 0x630,
+    .i2c_data_len               = 0x634,
+    .i2c_ctrl                   = 0x638,
+    .i2c_status                 = 0x63c,
+    .i2c_data_buf               = 0x680,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x84,
+    .i2c_reset_on               = 0x00000001,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data2 = {
+    .adap_nr                    = 5,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x700,
+    .i2c_filter                 = 0x704,
+    .i2c_stretch                = 0x708,
+    .i2c_ext_9548_exits_flag    = 0x70c,
+    .i2c_ext_9548_addr          = 0x710,
+    .i2c_ext_9548_chan          = 0x714,
+    .i2c_in_9548_chan           = 0x718,
+    .i2c_slave                  = 0x71c,
+    .i2c_reg                    = 0x720,
+    .i2c_reg_len                = 0x730,
+    .i2c_data_len               = 0x734,
+    .i2c_ctrl                   = 0x738,
+    .i2c_status                 = 0x73c,
+    .i2c_data_buf               = 0x780,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x88,
+    .i2c_reset_on               = 0x00000001,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data3 = {
+    .adap_nr                    = 6,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x16800,
+    .i2c_filter                 = 0x16804,
+    .i2c_stretch                = 0x16808,
+    .i2c_ext_9548_exits_flag    = 0x1680c,
+    .i2c_ext_9548_addr          = 0x16810,
+    .i2c_ext_9548_chan          = 0x16814,
+    .i2c_in_9548_chan           = 0x16818,
+    .i2c_slave                  = 0x1681c,
+    .i2c_reg                    = 0x16820,
+    .i2c_reg_len                = 0x16830,
+    .i2c_data_len               = 0x16834,
+    .i2c_ctrl                   = 0x16838,
+    .i2c_status                 = 0x1683c,
+    .i2c_data_buf               = 0x16900,
+    .i2c_data_buf_len           = 256,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x8c,
+    .i2c_reset_on               = 0x0000001,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data4 = {
+    .adap_nr                    = 7,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x900,
+    .i2c_filter                 = 0x904,
+    .i2c_stretch                = 0x908,
+    .i2c_ext_9548_exits_flag    = 0x90c,
+    .i2c_ext_9548_addr          = 0x910,
+    .i2c_ext_9548_chan          = 0x914,
+    .i2c_in_9548_chan           = 0x918,
+    .i2c_slave                  = 0x91c,
+    .i2c_reg                    = 0x920,
+    .i2c_reg_len                = 0x930,
+    .i2c_data_len               = 0x934,
+    .i2c_ctrl                   = 0x938,
+    .i2c_status                 = 0x93c,
+    .i2c_data_buf               = 0x980,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0xac,
+    .i2c_reset_on               = 0x00000001,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data5 = {
+    .adap_nr                    = 8,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0xf00,
+    .i2c_filter                 = 0xf04,
+    .i2c_stretch                = 0xf08,
+    .i2c_ext_9548_exits_flag    = 0xf0c,
+    .i2c_ext_9548_addr          = 0xf10,
+    .i2c_ext_9548_chan          = 0xf14,
+    .i2c_in_9548_chan           = 0xf18,
+    .i2c_slave                  = 0xf1c,
+    .i2c_reg                    = 0xf20,
+    .i2c_reg_len                = 0xf30,
+    .i2c_data_len               = 0xf34,
+    .i2c_ctrl                   = 0xf38,
+    .i2c_status                 = 0xf3c,
+    .i2c_data_buf               = 0xf80,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0xac,
+    .i2c_reset_on               = 0x00000002,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data0 = {
+    .adap_nr                    = 9,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x2c00,
+    .i2c_filter                 = 0x2c04,
+    .i2c_stretch                = 0x2c08,
+    .i2c_ext_9548_exits_flag    = 0x2c0c,
+    .i2c_ext_9548_addr          = 0x2c10,
+    .i2c_ext_9548_chan          = 0x2c14,
+    .i2c_in_9548_chan           = 0x2c18,
+    .i2c_slave                  = 0x2c1c,
+    .i2c_reg                    = 0x2c20,
+    .i2c_reg_len                = 0x2c30,
+    .i2c_data_len               = 0x2c34,
+    .i2c_ctrl                   = 0x2c38,
+    .i2c_status                 = 0x2c3c,
+    .i2c_data_buf               = 0x2c80,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000001,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data1 = {
+    .adap_nr                    = 10,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x2d00,
+    .i2c_filter                 = 0x2d04,
+    .i2c_stretch                = 0x2d08,
+    .i2c_ext_9548_exits_flag    = 0x2d0c,
+    .i2c_ext_9548_addr          = 0x2d10,
+    .i2c_ext_9548_chan          = 0x2d14,
+    .i2c_in_9548_chan           = 0x2d18,
+    .i2c_slave                  = 0x2d1c,
+    .i2c_reg                    = 0x2d20,
+    .i2c_reg_len                = 0x2d30,
+    .i2c_data_len               = 0x2d34,
+    .i2c_ctrl                   = 0x2d38,
+    .i2c_status                 = 0x2d3c,
+    .i2c_data_buf               = 0x2d80,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000002,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data2 = {
+    .adap_nr                    = 11,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x2e00,
+    .i2c_filter                 = 0x2e04,
+    .i2c_stretch                = 0x2e08,
+    .i2c_ext_9548_exits_flag    = 0x2e0c,
+    .i2c_ext_9548_addr          = 0x2e10,
+    .i2c_ext_9548_chan          = 0x2e14,
+    .i2c_in_9548_chan           = 0x2e18,
+    .i2c_slave                  = 0x2e1c,
+    .i2c_reg                    = 0x2e20,
+    .i2c_reg_len                = 0x2e30,
+    .i2c_data_len               = 0x2e34,
+    .i2c_ctrl                   = 0x2e38,
+    .i2c_status                 = 0x2e3c,
+    .i2c_data_buf               = 0x2e80,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000004,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data3 = {
+    .adap_nr                    = 12,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x2f00,
+    .i2c_filter                 = 0x2f04,
+    .i2c_stretch                = 0x2f08,
+    .i2c_ext_9548_exits_flag    = 0x2f0c,
+    .i2c_ext_9548_addr          = 0x2f10,
+    .i2c_ext_9548_chan          = 0x2f14,
+    .i2c_in_9548_chan           = 0x2f18,
+    .i2c_slave                  = 0x2f1c,
+    .i2c_reg                    = 0x2f20,
+    .i2c_reg_len                = 0x2f30,
+    .i2c_data_len               = 0x2f34,
+    .i2c_ctrl                   = 0x2f38,
+    .i2c_status                 = 0x2f3c,
+    .i2c_data_buf               = 0x2f80,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000008,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data4 = {
+    .adap_nr                    = 13,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3000,
+    .i2c_filter                 = 0x3004,
+    .i2c_stretch                = 0x3008,
+    .i2c_ext_9548_exits_flag    = 0x300c,
+    .i2c_ext_9548_addr          = 0x3010,
+    .i2c_ext_9548_chan          = 0x3014,
+    .i2c_in_9548_chan           = 0x3018,
+    .i2c_slave                  = 0x301c,
+    .i2c_reg                    = 0x3020,
+    .i2c_reg_len                = 0x3030,
+    .i2c_data_len               = 0x3034,
+    .i2c_ctrl                   = 0x3038,
+    .i2c_status                 = 0x303c,
+    .i2c_data_buf               = 0x3080,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000010,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data5 = {
+    .adap_nr                    = 14,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3100,
+    .i2c_filter                 = 0x3104,
+    .i2c_stretch                = 0x3108,
+    .i2c_ext_9548_exits_flag    = 0x310c,
+    .i2c_ext_9548_addr          = 0x3110,
+    .i2c_ext_9548_chan          = 0x3114,
+    .i2c_in_9548_chan           = 0x3118,
+    .i2c_slave                  = 0x311c,
+    .i2c_reg                    = 0x3120,
+    .i2c_reg_len                = 0x3130,
+    .i2c_data_len               = 0x3134,
+    .i2c_ctrl                   = 0x3138,
+    .i2c_status                 = 0x313c,
+    .i2c_data_buf               = 0x3180,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000020,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data6 = {
+    .adap_nr                    = 15,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3200,
+    .i2c_filter                 = 0x3204,
+    .i2c_stretch                = 0x3208,
+    .i2c_ext_9548_exits_flag    = 0x320c,
+    .i2c_ext_9548_addr          = 0x3210,
+    .i2c_ext_9548_chan          = 0x3214,
+    .i2c_in_9548_chan           = 0x3218,
+    .i2c_slave                  = 0x321c,
+    .i2c_reg                    = 0x3220,
+    .i2c_reg_len                = 0x3230,
+    .i2c_data_len               = 0x3234,
+    .i2c_ctrl                   = 0x3238,
+    .i2c_status                 = 0x323c,
+    .i2c_data_buf               = 0x3280,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000040,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data7 = {
+    .adap_nr                    = 16,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3300,
+    .i2c_filter                 = 0x3304,
+    .i2c_stretch                = 0x3308,
+    .i2c_ext_9548_exits_flag    = 0x330c,
+    .i2c_ext_9548_addr          = 0x3310,
+    .i2c_ext_9548_chan          = 0x3314,
+    .i2c_in_9548_chan           = 0x3318,
+    .i2c_slave                  = 0x331c,
+    .i2c_reg                    = 0x3320,
+    .i2c_reg_len                = 0x3330,
+    .i2c_data_len               = 0x3334,
+    .i2c_ctrl                   = 0x3338,
+    .i2c_status                 = 0x333c,
+    .i2c_data_buf               = 0x3380,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000080,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data8 = {
+    .adap_nr                    = 17,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3400,
+    .i2c_filter                 = 0x3404,
+    .i2c_stretch                = 0x3408,
+    .i2c_ext_9548_exits_flag    = 0x340c,
+    .i2c_ext_9548_addr          = 0x3410,
+    .i2c_ext_9548_chan          = 0x3414,
+    .i2c_in_9548_chan           = 0x3418,
+    .i2c_slave                  = 0x341c,
+    .i2c_reg                    = 0x3420,
+    .i2c_reg_len                = 0x3430,
+    .i2c_data_len               = 0x3434,
+    .i2c_ctrl                   = 0x3438,
+    .i2c_status                 = 0x343c,
+    .i2c_data_buf               = 0x3480,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000100,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data9 = {
+    .adap_nr                    = 18,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3500,
+    .i2c_filter                 = 0x3504,
+    .i2c_stretch                = 0x3508,
+    .i2c_ext_9548_exits_flag    = 0x350c,
+    .i2c_ext_9548_addr          = 0x3510,
+    .i2c_ext_9548_chan          = 0x3514,
+    .i2c_in_9548_chan           = 0x3518,
+    .i2c_slave                  = 0x351c,
+    .i2c_reg                    = 0x3520,
+    .i2c_reg_len                = 0x3530,
+    .i2c_data_len               = 0x3534,
+    .i2c_ctrl                   = 0x3538,
+    .i2c_status                 = 0x353c,
+    .i2c_data_buf               = 0x3580,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000200,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data10 = {
+    .adap_nr                    = 19,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3600,
+    .i2c_filter                 = 0x3604,
+    .i2c_stretch                = 0x3608,
+    .i2c_ext_9548_exits_flag    = 0x360c,
+    .i2c_ext_9548_addr          = 0x3610,
+    .i2c_ext_9548_chan          = 0x3614,
+    .i2c_in_9548_chan           = 0x3618,
+    .i2c_slave                  = 0x361c,
+    .i2c_reg                    = 0x3620,
+    .i2c_reg_len                = 0x3630,
+    .i2c_data_len               = 0x3634,
+    .i2c_ctrl                   = 0x3638,
+    .i2c_status                 = 0x363c,
+    .i2c_data_buf               = 0x3680,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000400,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data11 = {
+    .adap_nr                    = 20,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3700,
+    .i2c_filter                 = 0x3704,
+    .i2c_stretch                = 0x3708,
+    .i2c_ext_9548_exits_flag    = 0x370c,
+    .i2c_ext_9548_addr          = 0x3710,
+    .i2c_ext_9548_chan          = 0x3714,
+    .i2c_in_9548_chan           = 0x3718,
+    .i2c_slave                  = 0x371c,
+    .i2c_reg                    = 0x3720,
+    .i2c_reg_len                = 0x3730,
+    .i2c_data_len               = 0x3734,
+    .i2c_ctrl                   = 0x3738,
+    .i2c_status                 = 0x373c,
+    .i2c_data_buf               = 0x3780,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00000800,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data12 = {
+    .adap_nr                    = 21,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3800,
+    .i2c_filter                 = 0x3804,
+    .i2c_stretch                = 0x3808,
+    .i2c_ext_9548_exits_flag    = 0x380c,
+    .i2c_ext_9548_addr          = 0x3810,
+    .i2c_ext_9548_chan          = 0x3814,
+    .i2c_in_9548_chan           = 0x3818,
+    .i2c_slave                  = 0x381c,
+    .i2c_reg                    = 0x3820,
+    .i2c_reg_len                = 0x3830,
+    .i2c_data_len               = 0x3834,
+    .i2c_ctrl                   = 0x3838,
+    .i2c_status                 = 0x383c,
+    .i2c_data_buf               = 0x3880,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00001000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data13 = {
+    .adap_nr                    = 22,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3900,
+    .i2c_filter                 = 0x3904,
+    .i2c_stretch                = 0x3908,
+    .i2c_ext_9548_exits_flag    = 0x390c,
+    .i2c_ext_9548_addr          = 0x3910,
+    .i2c_ext_9548_chan          = 0x3914,
+    .i2c_in_9548_chan           = 0x3918,
+    .i2c_slave                  = 0x391c,
+    .i2c_reg                    = 0x3920,
+    .i2c_reg_len                = 0x3930,
+    .i2c_data_len               = 0x3934,
+    .i2c_ctrl                   = 0x3938,
+    .i2c_status                 = 0x393c,
+    .i2c_data_buf               = 0x3980,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00002000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data14 = {
+    .adap_nr                    = 23,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3a00,
+    .i2c_filter                 = 0x3a04,
+    .i2c_stretch                = 0x3a08,
+    .i2c_ext_9548_exits_flag    = 0x3a0c,
+    .i2c_ext_9548_addr          = 0x3a10,
+    .i2c_ext_9548_chan          = 0x3a14,
+    .i2c_in_9548_chan           = 0x3a18,
+    .i2c_slave                  = 0x3a1c,
+    .i2c_reg                    = 0x3a20,
+    .i2c_reg_len                = 0x3a30,
+    .i2c_data_len               = 0x3a34,
+    .i2c_ctrl                   = 0x3a38,
+    .i2c_status                 = 0x3a3c,
+    .i2c_data_buf               = 0x3a80,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00004000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data15 = {
+    .adap_nr                    = 24,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3b00,
+    .i2c_filter                 = 0x3b04,
+    .i2c_stretch                = 0x3b08,
+    .i2c_ext_9548_exits_flag    = 0x3b0c,
+    .i2c_ext_9548_addr          = 0x3b10,
+    .i2c_ext_9548_chan          = 0x3b14,
+    .i2c_in_9548_chan           = 0x3b18,
+    .i2c_slave                  = 0x3b1c,
+    .i2c_reg                    = 0x3b20,
+    .i2c_reg_len                = 0x3b30,
+    .i2c_data_len               = 0x3b34,
+    .i2c_ctrl                   = 0x3b38,
+    .i2c_status                 = 0x3b3c,
+    .i2c_data_buf               = 0x3b80,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00008000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_mac_dom_device_data16 = {
+    .adap_nr                    = 25,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x3c00,
+    .i2c_filter                 = 0x3c04,
+    .i2c_stretch                = 0x3c08,
+    .i2c_ext_9548_exits_flag    = 0x3c0c,
+    .i2c_ext_9548_addr          = 0x3c10,
+    .i2c_ext_9548_chan          = 0x3c14,
+    .i2c_in_9548_chan           = 0x3c18,
+    .i2c_slave                  = 0x3c1c,
+    .i2c_reg                    = 0x3c20,
+    .i2c_reg_len                = 0x3c30,
+    .i2c_data_len               = 0x3c34,
+    .i2c_ctrl                   = 0x3c38,
+    .i2c_status                 = 0x3c3c,
+    .i2c_data_buf               = 0x3c80,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 2,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x7c,
+    .i2c_reset_on               = 0x00010000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+
+static void wb_fpga_i2c_bus_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device fpga_i2c_bus_device[] = {
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &fpga_i2c_bus_device_data0,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &fpga_i2c_bus_device_data1,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 3,
+        .dev    = {
+            .platform_data  = &fpga_i2c_bus_device_data2,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 4,
+        .dev    = {
+            .platform_data  = &fpga_i2c_bus_device_data3,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 5,
+        .dev    = {
+            .platform_data  = &fpga_i2c_bus_device_data4,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 6,
+        .dev    = {
+            .platform_data  = &fpga_i2c_bus_device_data5,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 7,
+        .dev    = {
+            .platform_data  = &fpga_mac_dom_device_data0,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 8,
+        .dev    = {
+            .platform_data  = &fpga_mac_dom_device_data1,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 9,
+        .dev    = {
+            .platform_data  = &fpga_mac_dom_device_data2,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 10,
+        .dev    = {
+            .platform_data  = &fpga_mac_dom_device_data3,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 11,
+        .dev    = {
+            .platform_data  = &fpga_mac_dom_device_data4,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 12,
+        .dev    = {
+            .platform_data  = &fpga_mac_dom_device_data5,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 13,
+        .dev    = {
+            .platform_data  = &fpga_mac_dom_device_data6,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 14,
+        .dev    = {
+            .platform_data  = &fpga_mac_dom_device_data7,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 15,
+        .dev    = {
+            .platform_data  = &fpga_mac_dom_device_data8,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 16,
+        .dev    = {
+            .platform_data  = &fpga_mac_dom_device_data9,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 17,
+        .dev    = {
+            .platform_data  = &fpga_mac_dom_device_data10,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 18,
+        .dev    = {
+            .platform_data  = &fpga_mac_dom_device_data11,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 19,
+        .dev    = {
+            .platform_data  = &fpga_mac_dom_device_data12,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 20,
+        .dev    = {
+            .platform_data  = &fpga_mac_dom_device_data13,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 21,
+        .dev    = {
+            .platform_data  = &fpga_mac_dom_device_data14,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 22,
+        .dev    = {
+            .platform_data  = &fpga_mac_dom_device_data15,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 23,
+        .dev    = {
+            .platform_data  = &fpga_mac_dom_device_data16,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+};
+
+static int __init wb_fpga_i2c_bus_device_init(void)
+{
+    int i;
+    int ret = 0;
+    fpga_i2c_bus_device_t *fpga_i2c_bus_device_data;
+
+    WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(fpga_i2c_bus_device); i++) {
+        fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data;
+        ret = platform_device_register(&fpga_i2c_bus_device[i]);
+        if (ret < 0) {
+            fpga_i2c_bus_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-fpga-i2c.%d register failed!\n", i + 1);
+        } else {
+            fpga_i2c_bus_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_fpga_i2c_bus_device_exit(void)
+{
+    int i;
+    fpga_i2c_bus_device_t *fpga_i2c_bus_device_data;
+
+    WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(fpga_i2c_bus_device) - 1; i >= 0; i--) {
+        fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data;
+        if (fpga_i2c_bus_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&fpga_i2c_bus_device[i]);
+        }
+    }
+}
+
+module_init(wb_fpga_i2c_bus_device_init);
+module_exit(wb_fpga_i2c_bus_device_exit);
+MODULE_DESCRIPTION("FPGA I2C Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_pca954x_device.c
new file mode 100644
index 000000000000..4e442d85440a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_pca954x_device.c
@@ -0,0 +1,413 @@
+/*
+ * An wb_fpga_pca954x_device driver for fpga pca954x device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <fpga_i2c.h>
+
+static int g_wb_fpga_pca954x_device_debug = 0;
+static int g_wb_fpga_pca954x_device_error = 0;
+
+module_param(g_wb_fpga_pca954x_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_fpga_pca954x_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_fpga_pca954x_device_debug) { \
+        printk(KERN_INFO "[WB_FPGA_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_FPGA_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_fpga_pca954x_device_error) { \
+        printk(KERN_ERR "[WB_FPGA_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+
+static fpga_pca954x_device_t fpga_pca954x_device_data1 = {
+    .i2c_bus = 3,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 26,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data2 = {
+    .i2c_bus = 4,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 27,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data3 = {
+    .i2c_bus = 27,
+    .i2c_addr = 0x77,
+    .pca9548_base_nr = 39,
+    .fpga_9548_flag = 2,
+    .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data4 = {
+    .i2c_bus =5,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 28,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data5 = {
+    .i2c_bus = 28,
+    .i2c_addr = 0x71,
+    .pca9548_base_nr = 47,
+    .fpga_9548_flag = 2,
+    .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data6 = {
+    .i2c_bus = 6,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 29,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data7 = {
+    .i2c_bus = 29,
+    .i2c_addr = 0x77,
+    .pca9548_base_nr = 55,
+    .fpga_9548_flag = 2,
+    .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data8 = {
+    .i2c_bus = 7,
+    .i2c_addr = 0x71,
+    .pca9548_base_nr = 30,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data9 = {
+    .i2c_bus = 8,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr =38,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data10 = {
+    .i2c_bus = 9,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 63,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data11 = {
+    .i2c_bus = 10,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 65,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data12 = {
+    .i2c_bus = 11,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 67,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data13 = {
+    .i2c_bus = 12,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 69,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data14 = {
+    .i2c_bus = 13,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 71,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data15 = {
+    .i2c_bus = 14,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 73,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data16 = {
+    .i2c_bus = 15,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 75,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data17 = {
+    .i2c_bus = 16,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 77,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data18 = {
+    .i2c_bus = 17,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 79,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data19 = {
+    .i2c_bus = 18,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 81,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data20 = {
+    .i2c_bus = 19,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 83,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data21 = {
+    .i2c_bus = 20,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 85,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data22 = {
+    .i2c_bus = 21,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 87,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data23 = {
+    .i2c_bus = 22,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 89,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data24 = {
+    .i2c_bus = 23,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 91,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data25 = {
+    .i2c_bus = 24,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 93,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data26 = {
+    .i2c_bus = 25,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 95,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+struct i2c_board_info fpga_pca954x_device_info[] = {
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data1,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data2,
+    },
+    {
+        .type = "wb_fpga_pca9548",
+        .platform_data = &fpga_pca954x_device_data3,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data4,
+    },
+    {
+        .type = "wb_fpga_pca9548",
+        .platform_data = &fpga_pca954x_device_data5,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data6,
+    },
+    {
+        .type = "wb_fpga_pca9548",
+        .platform_data = &fpga_pca954x_device_data7,
+    },
+    {
+        .type = "wb_fpga_pca9548",
+        .platform_data = &fpga_pca954x_device_data8,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data9,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data10,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data11,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data12,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data13,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data14,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data15,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data16,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data17,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data18,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data19,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data20,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data21,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data22,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data23,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data24,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data25,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data26,
+    },
+};
+
+static int __init wb_fpga_pca954x_device_init(void)
+{
+    int i;
+    struct i2c_adapter *adap;
+    struct i2c_client *client;
+    fpga_pca954x_device_t *fpga_pca954x_device_data;
+
+    WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(fpga_pca954x_device_info); i++) {
+        fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data;
+        fpga_pca954x_device_info[i].addr = fpga_pca954x_device_data->i2c_addr;
+        adap = i2c_get_adapter(fpga_pca954x_device_data->i2c_bus);
+        if (adap == NULL) {
+            fpga_pca954x_device_data->client = NULL;
+            printk(KERN_ERR "get i2c bus %d adapter fail.\n", fpga_pca954x_device_data->i2c_bus);
+            continue;
+        }
+        client = i2c_new_client_device(adap, &fpga_pca954x_device_info[i]);
+        if (!client) {
+            fpga_pca954x_device_data->client = NULL;
+            printk(KERN_ERR "Failed to register fpga pca954x device %d at bus %d!\n",
+                fpga_pca954x_device_data->i2c_addr, fpga_pca954x_device_data->i2c_bus);
+        } else {
+            fpga_pca954x_device_data->client = client;
+        }
+        i2c_put_adapter(adap);
+    }
+    return 0;
+}
+
+static void __exit wb_fpga_pca954x_device_exit(void)
+{
+    int i;
+    fpga_pca954x_device_t *fpga_pca954x_device_data;
+
+    WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(fpga_pca954x_device_info) - 1; i >= 0; i--) {
+        fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data;
+        if (fpga_pca954x_device_data->client) {
+            i2c_unregister_device(fpga_pca954x_device_data->client);
+            fpga_pca954x_device_data->client = NULL;
+        }
+    }
+}
+
+module_init(wb_fpga_pca954x_device_init);
+module_exit(wb_fpga_pca954x_device_exit);
+MODULE_DESCRIPTION("FPGA PCA954X Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_i2c_dev_device.c
new file mode 100644
index 000000000000..9a3aef32977b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_i2c_dev_device.c
@@ -0,0 +1,146 @@
+/*
+ * An wb_i2c_dev_device driver for i2c dev device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_i2c_dev.h>
+
+static int g_wb_i2c_dev_device_debug = 0;
+static int g_wb_i2c_dev_device_error = 0;
+
+module_param(g_wb_i2c_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_i2c_dev_device_debug) { \
+        printk(KERN_INFO "[WB_I2C_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_I2C_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_i2c_dev_device_error) { \
+        printk(KERN_ERR "[WB_I2C_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static i2c_dev_device_t i2c_dev_device_data0 = {
+    .i2c_bus = 26,
+    .i2c_addr = 0x1d,
+    .i2c_name = "cpld2",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data1 = {
+    .i2c_bus = 26,
+    .i2c_addr = 0x2d,
+    .i2c_name = "cpld3",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data2 = {
+    .i2c_bus = 28,
+    .i2c_addr = 0x3d,
+    .i2c_name = "cpld4",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+
+struct i2c_board_info i2c_dev_device_info[] = {
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data0,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data1,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data2,
+    },
+};
+
+static int __init wb_i2c_dev_device_init(void)
+{
+    int i;
+    struct i2c_adapter *adap;
+    struct i2c_client *client;
+    i2c_dev_device_t *i2c_dev_device_data;
+
+    WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(i2c_dev_device_info); i++) {
+        i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+        i2c_dev_device_info[i].addr = i2c_dev_device_data->i2c_addr;
+        adap = i2c_get_adapter(i2c_dev_device_data->i2c_bus);
+        if (adap == NULL) {
+            i2c_dev_device_data->client = NULL;
+            printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_dev_device_data->i2c_bus);
+            continue;
+        }
+        client = i2c_new_client_device(adap, &i2c_dev_device_info[i]);
+        if (!client) {
+            i2c_dev_device_data->client = NULL;
+            printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n",
+                i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus);
+        } else {
+            i2c_dev_device_data->client = client;
+        }
+        i2c_put_adapter(adap);
+    }
+    return 0;
+}
+
+static void __exit wb_i2c_dev_device_exit(void)
+{
+    int i;
+    i2c_dev_device_t *i2c_dev_device_data;
+
+    WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(i2c_dev_device_info) - 1; i >= 0; i--) {
+        i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+        if (i2c_dev_device_data->client) {
+            i2c_unregister_device(i2c_dev_device_data->client);
+            i2c_dev_device_data->client = NULL;
+        }
+    }
+}
+
+module_init(wb_i2c_dev_device_init);
+module_exit(wb_i2c_dev_device_exit);
+MODULE_DESCRIPTION("I2C DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_io_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_io_dev_device.c
new file mode 100644
index 000000000000..76b86a2d47ea
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_io_dev_device.c
@@ -0,0 +1,123 @@
+/*
+ * An wb_io_dev_device driver for io device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_io_dev.h>
+
+static int g_wb_io_dev_device_debug = 0;
+static int g_wb_io_dev_device_error = 0;
+
+module_param(g_wb_io_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_io_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_IO_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_io_dev_device_debug) { \
+        printk(KERN_INFO "[WB_IO_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_IO_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_io_dev_device_error) { \
+        printk(KERN_ERR "[WB_IO_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static io_dev_device_t io_dev_device_data0 = {
+    .io_dev_name = "cpld0",
+    .io_base = 0x700,
+    .io_len = 0x100,
+    .indirect_addr = 0,
+};
+
+static io_dev_device_t io_dev_device_data1 = {
+    .io_dev_name = "cpld1",
+    .io_base = 0x900,
+    .io_len = 0x100,
+    .indirect_addr = 0,
+};
+
+static void wb_io_dev_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device io_dev_device[] = {
+    {
+        .name   = "wb-io-dev",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &io_dev_device_data0,
+            .release = wb_io_dev_device_release,
+        },
+    },
+    {
+        .name   = "wb-io-dev",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &io_dev_device_data1,
+            .release = wb_io_dev_device_release,
+        },
+    },
+};
+
+static int __init wb_io_dev_device_init(void)
+{
+    int i;
+    int ret = 0;
+    io_dev_device_t *io_dev_device_data;
+
+    WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(io_dev_device); i++) {
+        io_dev_device_data = io_dev_device[i].dev.platform_data;
+        ret = platform_device_register(&io_dev_device[i]);
+        if (ret < 0) {
+            io_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-io-dev.%d register failed!\n", i + 1);
+        } else {
+            io_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_io_dev_device_exit(void)
+{
+    int i;
+    io_dev_device_t *io_dev_device_data;
+
+    WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(io_dev_device) - 1; i >= 0; i--) {
+        io_dev_device_data = io_dev_device[i].dev.platform_data;
+        if (io_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&io_dev_device[i]);
+        }
+    }
+}
+
+module_init(wb_io_dev_device_init);
+module_exit(wb_io_dev_device_exit);
+MODULE_DESCRIPTION("IO DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_lpc_drv_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_lpc_drv_device.c
new file mode 100644
index 000000000000..27dbd87d71b2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_lpc_drv_device.c
@@ -0,0 +1,150 @@
+/*
+ * An wb_lpc_drv_device driver for lpc device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_lpc_drv.h>
+
+static int g_wb_lpc_drv_device_debug = 0;
+static int g_wb_lpc_drv_device_error = 0;
+
+module_param(g_wb_lpc_drv_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_lpc_drv_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_LPC_DRV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_lpc_drv_device_debug) { \
+        printk(KERN_INFO "[WB_LPC_DRV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_LPC_DRV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_lpc_drv_device_error) { \
+        printk(KERN_ERR "[WB_LPC_DRV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static lpc_drv_device_t lpc_drv_device_data_0 = {
+    .lpc_io_name = "wb_lpc",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 0,
+    .lpc_io_base = 0x700,
+    .lpc_io_size = 0x100,
+    .lpc_gen_dec = 0x84,
+};
+
+static lpc_drv_device_t lpc_drv_device_data_1 = {
+    .lpc_io_name = "wb_lpc",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 0,
+    .lpc_io_base = 0x900,
+    .lpc_io_size = 0x100,
+    .lpc_gen_dec = 0x88,
+};
+
+static lpc_drv_device_t lpc_drv_device_data_2 = {
+    .lpc_io_name = "wb_lpc",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 0,
+    .lpc_io_base = 0xb00,
+    .lpc_io_size = 0x100,
+    .lpc_gen_dec = 0x90,
+};
+
+static void wb_lpc_drv_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device lpc_drv_device[] = {
+    {
+        .name   = "wb-lpc",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &lpc_drv_device_data_0,
+            .release = wb_lpc_drv_device_release,
+        },
+    },
+    {
+        .name   = "wb-lpc",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &lpc_drv_device_data_1,
+            .release = wb_lpc_drv_device_release,
+        },
+    },
+    {
+        .name   = "wb-lpc",
+        .id = 3,
+        .dev    = {
+            .platform_data  = &lpc_drv_device_data_2,
+            .release = wb_lpc_drv_device_release,
+        },
+    },
+};
+
+static int __init wb_lpc_drv_device_init(void)
+{
+    int i;
+    int ret = 0;
+    lpc_drv_device_t *lpc_drv_device_data;
+
+    WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(lpc_drv_device); i++) {
+        lpc_drv_device_data = lpc_drv_device[i].dev.platform_data;
+        ret = platform_device_register(&lpc_drv_device[i]);
+        if (ret < 0) {
+            lpc_drv_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-lpc.%d register failed!\n", i + 1);
+        } else {
+            lpc_drv_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_lpc_drv_device_exit(void)
+{
+    int i;
+    lpc_drv_device_t *lpc_drv_device_data;
+
+    WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(lpc_drv_device) - 1; i >= 0; i--) {
+        lpc_drv_device_data = lpc_drv_device[i].dev.platform_data;
+        if (lpc_drv_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&lpc_drv_device[i]);
+        }
+    }
+}
+
+module_init(wb_lpc_drv_device_init);
+module_exit(wb_lpc_drv_device_exit);
+MODULE_DESCRIPTION("LPC DRV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_pcie_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_pcie_dev_device.c
new file mode 100644
index 000000000000..4523c9f33c13
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_pcie_dev_device.c
@@ -0,0 +1,113 @@
+/*
+ * An wb_pcie_dev_device driver for pcie device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_pcie_dev.h>
+
+static int g_wb_pcie_dev_device_debug = 0;
+static int g_wb_pcie_dev_device_error = 0;
+
+module_param(g_wb_pcie_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_pcie_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_pcie_dev_device_debug) { \
+        printk(KERN_INFO "[WB_PCIE_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_PCIE_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_pcie_dev_device_error) { \
+        printk(KERN_ERR "[WB_PCIE_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static pci_dev_device_t pcie_dev_device_data0 = {
+    .pci_dev_name = "fpga0",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x04,
+    .pci_slot = 0x00,
+    .pci_fn = 0,
+    .pci_bar = 0,
+    .bus_width = 4,
+    .upg_ctrl_base = 0xa00,
+    .upg_flash_base = 0x2f0000,
+};
+
+static void wb_pcie_dev_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device pcie_dev_device[] = {
+    {
+        .name   = "wb-pci-dev",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &pcie_dev_device_data0,
+            .release = wb_pcie_dev_device_release,
+        },
+    },
+};
+
+static int __init wb_pcie_dev_device_init(void)
+{
+    int i;
+    int ret = 0;
+    pci_dev_device_t *pcie_dev_device_data;
+
+    WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(pcie_dev_device); i++) {
+        pcie_dev_device_data = pcie_dev_device[i].dev.platform_data;
+        ret = platform_device_register(&pcie_dev_device[i]);
+        if (ret < 0) {
+            pcie_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-pci-dev.%d register failed!\n", i + 1);
+        } else {
+            pcie_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_pcie_dev_device_exit(void)
+{
+    int i;
+    pci_dev_device_t *pcie_dev_device_data;
+
+    WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(pcie_dev_device) - 1; i >= 0; i--) {
+        pcie_dev_device_data = pcie_dev_device[i].dev.platform_data;
+        if (pcie_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&pcie_dev_device[i]);
+        }
+    }
+}
+
+module_init(wb_pcie_dev_device_init);
+module_exit(wb_pcie_dev_device_exit);
+MODULE_DESCRIPTION("PCIE DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_wdt_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_wdt_device.c
new file mode 100644
index 000000000000..e29610c906e8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_wdt_device.c
@@ -0,0 +1,155 @@
+/*
+ * An wb_wdt_device driver for watchdog device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_wdt.h>
+
+static int g_wb_wdt_device_debug = 0;
+static int g_wb_wdt_device_error = 0;
+
+module_param(g_wb_wdt_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_wdt_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_WDT_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_wdt_device_debug) { \
+        printk(KERN_INFO "[WB_WDT_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_WDT_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_wdt_device_error) { \
+        printk(KERN_ERR "[WB_WDT_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static wb_wdt_device_t wb_wdt_device_data_0 = {
+    .feed_wdt_type = 2,
+    .hw_margin = 180000,
+    .feed_time = 30000,
+    .config_dev_name = "/dev/cpld3",
+    .config_mode = 2,
+    .priv_func_mode = 4,
+    .enable_reg = 0xf2,
+    .enable_val = 0x1,
+    .disable_val = 0x0,
+    .enable_mask = 0x1,
+    .timeout_cfg_reg = 0xf3,
+    .hw_algo = "toggle",
+    .wdt_config_mode.logic_wdt = {
+        .feed_dev_name = "/dev/cpld3",
+        .feed_reg = 0xf2,
+        .active_val = 0x1,
+        .logic_func_mode = 0x1,
+    },
+    .timer_accuracy = 6000,          /* 6s */
+    .sysfs_index = SYSFS_NO_CFG,
+};
+
+static wb_wdt_device_t wb_wdt_device_data_1 = {
+    .feed_wdt_type = 1,
+    .hw_margin = 90000,
+    .feed_time = 9000,
+    .config_dev_name = "/dev/cpld1",
+    .config_mode = 2,
+    .priv_func_mode = 3,
+    .enable_reg = 0x4f,
+    .enable_val = 0x1,
+    .disable_val = 0x0,
+    .enable_mask = 0x1,
+    .timeout_cfg_reg = 0x50,
+    .hw_algo = "level",
+    .wdt_config_mode.logic_wdt = {
+        .feed_dev_name = "/dev/cpld1",
+        .feed_reg = 0xac,
+        .active_val = 0x0,
+        .logic_func_mode = 0x3,
+    },
+    .timer_accuracy = 1600,          /* 1.6s */
+    .sysfs_index = SYSFS_NO_CFG,
+};
+
+static void wb_wdt_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device wb_wdt_device[] = {
+    {
+        .name   = "wb_wdt",
+        .id = 0,
+        .dev    = {
+            .platform_data  = &wb_wdt_device_data_0,
+            .release = wb_wdt_device_release,
+        },
+    },
+    {
+        .name   = "wb_wdt",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &wb_wdt_device_data_1,
+            .release = wb_wdt_device_release,
+        },
+    },
+};
+
+static int __init wb_wdt_device_init(void)
+{
+    int i;
+    int ret = 0;
+    wb_wdt_device_t *wb_wdt_device_data;
+
+    WB_WDT_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(wb_wdt_device); i++) {
+        wb_wdt_device_data = wb_wdt_device[i].dev.platform_data;
+        ret = platform_device_register(&wb_wdt_device[i]);
+        if (ret < 0) {
+            wb_wdt_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "rg-wdt.%d register failed!\n", i + 1);
+        } else {
+            wb_wdt_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_wdt_device_exit(void)
+{
+    int i;
+    wb_wdt_device_t *wb_wdt_device_data;
+
+    WB_WDT_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(wb_wdt_device) - 1; i >= 0; i--) {
+        wb_wdt_device_data = wb_wdt_device[i].dev.platform_data;
+        if (wb_wdt_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&wb_wdt_device[i]);
+        }
+    }
+}
+
+module_init(wb_wdt_device_init);
+module_exit(wb_wdt_device_exit);
+MODULE_DESCRIPTION("WB WDT Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_CPLD.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
new file mode 100644
index 000000000000..67412066e392
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
@@ -0,0 +1,35 @@
+# configuration item: I2C address of CPLD
+# format: cpld_i2c_dev.bus_[cpld_slot]_[cpld_id] cpld_i2c_dev.addr_[cpld_slot]_[cpld_id]
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+# bus: I2C bus number of CPLD
+# addr: I2C address of CPLD
+cpld_i2c_dev.bus_0_2=26
+cpld_i2c_dev.addr_0_2=0x1d
+cpld_i2c_dev.bus_0_3=26
+cpld_i2c_dev.addr_0_3=0x2d
+cpld_i2c_dev.bus_0_4=28
+cpld_i2c_dev.addr_0_4=0x3d
+
+# configuration item: LPC address of CPLD
+# format: cpld_lpc_addr_[cpld_slot]_[cpld_id]
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+cpld_lpc_dev_0_0=0x700
+cpld_lpc_dev_0_1=0x900
+
+# configuration item: CPLD access method, lpc or i2c
+# format: mode_cpld_[cpld_slot][cpld_slot]=lpc/i2c
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+mode_cpld_0_0=lpc
+mode_cpld_0_1=lpc
+mode_cpld_0_2=i2c
+mode_cpld_0_3=i2c
+mode_cpld_0_4=i2c
+
+# configuration item: the number of CPLD
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: CPLD main_dev is 4
+# minor_dev: CPLD minor_dev not exist
+dev_num_4_0=12
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_FAN.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_FAN.cfg
new file mode 100644
index 000000000000..7ac4aa4195a4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_FAN.cfg
@@ -0,0 +1,435 @@
+# configuration item: the number of fans
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: fan main_dev is 1
+# minor_dev: fan minor_dev not exist(0)
+dev_num_1_0=6
+
+# configuration item: the number of rotors
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: rotor main_dev is 1
+# minor_dev: rotor minor_dev is 5
+dev_num_1_5=2
+
+# configuration item: fan presence status
+# format: dev_present_status_[main_dev_id][fan_index]
+# main_dev_id: fan main_dev_id is 1
+# fan_index: start from 1
+dev_present_status.mode_1_1=config
+dev_present_status.src_1_1=cpld
+dev_present_status.frmt_1_1=bit
+dev_present_status.pola_1_1=negative
+dev_present_status.addr_1_1=0x00040037
+dev_present_status.len_1_1=1
+dev_present_status.bit_offset_1_1=5
+
+dev_present_status.mode_1_2=config
+dev_present_status.src_1_2=cpld
+dev_present_status.frmt_1_2=bit
+dev_present_status.pola_1_2=negative
+dev_present_status.addr_1_2=0x00040037
+dev_present_status.len_1_2=1
+dev_present_status.bit_offset_1_2=4
+
+dev_present_status.mode_1_3=config
+dev_present_status.src_1_3=cpld
+dev_present_status.frmt_1_3=bit
+dev_present_status.pola_1_3=negative
+dev_present_status.addr_1_3=0x00040037
+dev_present_status.len_1_3=1
+dev_present_status.bit_offset_1_3=3
+
+dev_present_status.mode_1_4=config
+dev_present_status.src_1_4=cpld
+dev_present_status.frmt_1_4=bit
+dev_present_status.pola_1_4=negative
+dev_present_status.addr_1_4=0x00040037
+dev_present_status.len_1_4=1
+dev_present_status.bit_offset_1_4=2
+
+dev_present_status.mode_1_5=config
+dev_present_status.src_1_5=cpld
+dev_present_status.frmt_1_5=bit
+dev_present_status.pola_1_5=negative
+dev_present_status.addr_1_5=0x00040037
+dev_present_status.len_1_5=1
+dev_present_status.bit_offset_1_5=1
+
+dev_present_status.mode_1_6=config
+dev_present_status.src_1_6=cpld
+dev_present_status.frmt_1_6=bit
+dev_present_status.pola_1_6=negative
+dev_present_status.addr_1_6=0x00040037
+dev_present_status.len_1_6=1
+dev_present_status.bit_offset_1_6=0
+
+# configuration item: fan pwm
+# format: fan_ratio_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_ratio.mode_1_0=config
+fan_ratio.int_cons_1_0=
+fan_ratio.src_1_0=cpld
+fan_ratio.frmt_1_0=byte
+fan_ratio.pola_1_0=
+fan_ratio.fpath_1_0=
+fan_ratio.addr_1_0=0x00040065
+fan_ratio.len_1_0=1
+fan_ratio.bit_offset_1_0=
+
+fan_ratio.mode_1_1=config
+fan_ratio.int_cons_1_1=
+fan_ratio.src_1_1=cpld
+fan_ratio.frmt_1_1=byte
+fan_ratio.pola_1_1=
+fan_ratio.fpath_1_1=
+fan_ratio.addr_1_1=0x00040065
+fan_ratio.len_1_1=1
+fan_ratio.bit_offset_1_1=
+
+fan_ratio.mode_2_0=config
+fan_ratio.int_cons_2_0=
+fan_ratio.src_2_0=cpld
+fan_ratio.frmt_2_0=byte
+fan_ratio.pola_2_0=
+fan_ratio.fpath_2_0=
+fan_ratio.addr_2_0=0x00040064
+fan_ratio.len_2_0=1
+fan_ratio.bit_offset_2_0=
+
+fan_ratio.mode_2_1=config
+fan_ratio.int_cons_2_1=
+fan_ratio.src_2_1=cpld
+fan_ratio.frmt_2_1=byte
+fan_ratio.pola_2_1=
+fan_ratio.fpath_2_1=
+fan_ratio.addr_2_1=0x00040064
+fan_ratio.len_2_1=1
+fan_ratio.bit_offset_2_1=
+
+fan_ratio.mode_3_0=config
+fan_ratio.int_cons_3_0=
+fan_ratio.src_3_0=cpld
+fan_ratio.frmt_3_0=byte
+fan_ratio.pola_3_0=
+fan_ratio.fpath_3_0=
+fan_ratio.addr_3_0=0x00040063
+fan_ratio.len_3_0=1
+fan_ratio.bit_offset_3_0=
+
+fan_ratio.mode_3_1=config
+fan_ratio.int_cons_3_1=
+fan_ratio.src_3_1=cpld
+fan_ratio.frmt_3_1=byte
+fan_ratio.pola_3_1=
+fan_ratio.fpath_3_1=
+fan_ratio.addr_3_1=0x00040063
+fan_ratio.len_3_1=1
+fan_ratio.bit_offset_3_1=
+
+fan_ratio.mode_4_0=config
+fan_ratio.int_cons_4_0=
+fan_ratio.src_4_0=cpld
+fan_ratio.frmt_4_0=byte
+fan_ratio.pola_4_0=
+fan_ratio.fpath_4_0=
+fan_ratio.addr_4_0=0x00040062
+fan_ratio.len_4_0=1
+fan_ratio.bit_offset_4_0=
+
+fan_ratio.mode_4_1=config
+fan_ratio.int_cons_4_1=
+fan_ratio.src_4_1=cpld
+fan_ratio.frmt_4_1=byte
+fan_ratio.pola_4_1=
+fan_ratio.fpath_4_1=
+fan_ratio.addr_4_1=0x00040062
+fan_ratio.len_4_1=1
+fan_ratio.bit_offset_4_1=
+
+fan_ratio.mode_5_0=config
+fan_ratio.int_cons_5_0=
+fan_ratio.src_5_0=cpld
+fan_ratio.frmt_5_0=byte
+fan_ratio.pola_5_0=
+fan_ratio.fpath_5_0=
+fan_ratio.addr_5_0=0x00040061
+fan_ratio.len_5_0=1
+fan_ratio.bit_offset_5_0=
+
+fan_ratio.mode_5_1=config
+fan_ratio.int_cons_5_1=
+fan_ratio.src_5_1=cpld
+fan_ratio.frmt_5_1=byte
+fan_ratio.pola_5_1=
+fan_ratio.fpath_5_1=
+fan_ratio.addr_5_1=0x00040061
+fan_ratio.len_5_1=1
+fan_ratio.bit_offset_5_1=
+
+fan_ratio.mode_6_0=config
+fan_ratio.int_cons_6_0=
+fan_ratio.src_6_0=cpld
+fan_ratio.frmt_6_0=byte
+fan_ratio.pola_6_0=
+fan_ratio.fpath_6_0=
+fan_ratio.addr_6_0=0x00040060
+fan_ratio.len_6_0=1
+fan_ratio.bit_offset_6_0=
+
+fan_ratio.mode_6_1=config
+fan_ratio.int_cons_6_1=
+fan_ratio.src_6_1=cpld
+fan_ratio.frmt_6_1=byte
+fan_ratio.pola_6_1=
+fan_ratio.fpath_6_1=
+fan_ratio.addr_6_1=0x00040060
+fan_ratio.len_6_1=1
+fan_ratio.bit_offset_6_1=
+
+# configuration item: fan rotor status
+# format: fan_roll_status_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_roll_status.mode_1_0=config
+fan_roll_status.int_cons_1_0=
+fan_roll_status.src_1_0=cpld
+fan_roll_status.frmt_1_0=bit
+fan_roll_status.pola_1_0=positive
+fan_roll_status.fpath_1_0=
+fan_roll_status.addr_1_0=0x00040038
+fan_roll_status.len_1_0=1
+fan_roll_status.bit_offset_1_0=5
+
+fan_roll_status.mode_1_1=config
+fan_roll_status.int_cons_1_1=
+fan_roll_status.src_1_1=cpld
+fan_roll_status.frmt_1_1=bit
+fan_roll_status.pola_1_1=positive
+fan_roll_status.fpath_1_1=
+fan_roll_status.addr_1_1=0x00040039
+fan_roll_status.len_1_1=1
+fan_roll_status.bit_offset_1_1=5
+
+fan_roll_status.mode_2_0=config
+fan_roll_status.int_cons_2_0=
+fan_roll_status.src_2_0=cpld
+fan_roll_status.frmt_2_0=bit
+fan_roll_status.pola_2_0=positive
+fan_roll_status.fpath_2_0=
+fan_roll_status.addr_2_0=0x00040038
+fan_roll_status.len_2_0=1
+fan_roll_status.bit_offset_2_0=4
+
+fan_roll_status.mode_2_1=config
+fan_roll_status.int_cons_2_1=
+fan_roll_status.src_2_1=cpld
+fan_roll_status.frmt_2_1=bit
+fan_roll_status.pola_2_1=positive
+fan_roll_status.fpath_2_1=
+fan_roll_status.addr_2_1=0x00040039
+fan_roll_status.len_2_1=1
+fan_roll_status.bit_offset_2_1=4
+
+fan_roll_status.mode_3_0=config
+fan_roll_status.int_cons_3_0=
+fan_roll_status.src_3_0=cpld
+fan_roll_status.frmt_3_0=bit
+fan_roll_status.pola_3_0=positive
+fan_roll_status.fpath_3_0=
+fan_roll_status.addr_3_0=0x00040038
+fan_roll_status.len_3_0=1
+fan_roll_status.bit_offset_3_0=3
+
+fan_roll_status.mode_3_1=config
+fan_roll_status.int_cons_3_1=
+fan_roll_status.src_3_1=cpld
+fan_roll_status.frmt_3_1=bit
+fan_roll_status.pola_3_1=positive
+fan_roll_status.fpath_3_1=
+fan_roll_status.addr_3_1=0x00040039
+fan_roll_status.len_3_1=1
+fan_roll_status.bit_offset_3_1=3
+
+fan_roll_status.mode_4_0=config
+fan_roll_status.int_cons_4_0=
+fan_roll_status.src_4_0=cpld
+fan_roll_status.frmt_4_0=bit
+fan_roll_status.pola_4_0=positive
+fan_roll_status.fpath_4_0=
+fan_roll_status.addr_4_0=0x00040038
+fan_roll_status.len_4_0=1
+fan_roll_status.bit_offset_4_0=2
+
+fan_roll_status.mode_4_1=config
+fan_roll_status.int_cons_4_1=
+fan_roll_status.src_4_1=cpld
+fan_roll_status.frmt_4_1=bit
+fan_roll_status.pola_4_1=positive
+fan_roll_status.fpath_4_1=
+fan_roll_status.addr_4_1=0x00040039
+fan_roll_status.len_4_1=1
+fan_roll_status.bit_offset_4_1=2
+
+fan_roll_status.mode_5_0=config
+fan_roll_status.int_cons_5_0=
+fan_roll_status.src_5_0=cpld
+fan_roll_status.frmt_5_0=bit
+fan_roll_status.pola_5_0=positive
+fan_roll_status.fpath_5_0=
+fan_roll_status.addr_5_0=0x00040038
+fan_roll_status.len_5_0=1
+fan_roll_status.bit_offset_5_0=1
+
+fan_roll_status.mode_5_1=config
+fan_roll_status.int_cons_5_1=
+fan_roll_status.src_5_1=cpld
+fan_roll_status.frmt_5_1=bit
+fan_roll_status.pola_5_1=positive
+fan_roll_status.fpath_5_1=
+fan_roll_status.addr_5_1=0x00040039
+fan_roll_status.len_5_1=1
+fan_roll_status.bit_offset_5_1=1
+
+fan_roll_status.mode_6_0=config
+fan_roll_status.int_cons_6_0=
+fan_roll_status.src_6_0=cpld
+fan_roll_status.frmt_6_0=bit
+fan_roll_status.pola_6_0=positive
+fan_roll_status.fpath_6_0=
+fan_roll_status.addr_6_0=0x00040038
+fan_roll_status.len_6_0=1
+fan_roll_status.bit_offset_6_0=0
+
+fan_roll_status.mode_6_1=config
+fan_roll_status.int_cons_6_1=
+fan_roll_status.src_6_1=cpld
+fan_roll_status.frmt_6_1=bit
+fan_roll_status.pola_6_1=positive
+fan_roll_status.fpath_6_1=
+fan_roll_status.addr_6_1=0x00040039
+fan_roll_status.len_6_1=1
+fan_roll_status.bit_offset_6_1=0
+
+# configuration item: fan speed
+# format: fan_speed_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_speed.mode_1_0=config
+fan_speed.int_cons_1_0=
+fan_speed.src_1_0=cpld
+fan_speed.frmt_1_0=num_bytes
+fan_speed.pola_1_0=negative
+fan_speed.fpath_1_0=
+fan_speed.addr_1_0=0x00040070
+fan_speed.len_1_0=2
+fan_speed.bit_offset_1_0=
+
+fan_speed.mode_1_1=config
+fan_speed.int_cons_1_1=
+fan_speed.src_1_1=cpld
+fan_speed.frmt_1_1=num_bytes
+fan_speed.pola_1_1=negative
+fan_speed.fpath_1_1=
+fan_speed.addr_1_1=0x0004007c
+fan_speed.len_1_1=2
+fan_speed.bit_offset_1_1=
+
+fan_speed.mode_2_0=config
+fan_speed.int_cons_2_0=
+fan_speed.src_2_0=cpld
+fan_speed.frmt_2_0=num_bytes
+fan_speed.pola_2_0=negative
+fan_speed.fpath_2_0=
+fan_speed.addr_2_0=0x0004006e
+fan_speed.len_2_0=2
+fan_speed.bit_offset_2_0=
+
+fan_speed.mode_2_1=config
+fan_speed.int_cons_2_1=
+fan_speed.src_2_1=cpld
+fan_speed.frmt_2_1=num_bytes
+fan_speed.pola_2_1=negative
+fan_speed.fpath_2_1=
+fan_speed.addr_2_1=0x0004007a
+fan_speed.len_2_1=2
+fan_speed.bit_offset_2_1=
+
+fan_speed.mode_3_0=config
+fan_speed.int_cons_3_0=
+fan_speed.src_3_0=cpld
+fan_speed.frmt_3_0=num_bytes
+fan_speed.pola_3_0=negative
+fan_speed.fpath_3_0=
+fan_speed.addr_3_0=0x0004006c
+fan_speed.len_3_0=2
+fan_speed.bit_offset_3_0=
+
+fan_speed.mode_3_1=config
+fan_speed.int_cons_3_1=
+fan_speed.src_3_1=cpld
+fan_speed.frmt_3_1=num_bytes
+fan_speed.pola_3_1=negative
+fan_speed.fpath_3_1=
+fan_speed.addr_3_1=0x00040078
+fan_speed.len_3_1=2
+fan_speed.bit_offset_3_1=
+
+fan_speed.mode_4_0=config
+fan_speed.int_cons_4_0=
+fan_speed.src_4_0=cpld
+fan_speed.frmt_4_0=num_bytes
+fan_speed.pola_4_0=negative
+fan_speed.fpath_4_0=
+fan_speed.addr_4_0=0x0004006a
+fan_speed.len_4_0=2
+fan_speed.bit_offset_4_0=
+
+fan_speed.mode_4_1=config
+fan_speed.int_cons_4_1=
+fan_speed.src_4_1=cpld
+fan_speed.frmt_4_1=num_bytes
+fan_speed.pola_4_1=negative
+fan_speed.fpath_4_1=
+fan_speed.addr_4_1=0x00040076
+fan_speed.len_4_1=2
+fan_speed.bit_offset_4_1=
+
+fan_speed.mode_5_0=config
+fan_speed.int_cons_5_0=
+fan_speed.src_5_0=cpld
+fan_speed.frmt_5_0=num_bytes
+fan_speed.pola_5_0=negative
+fan_speed.fpath_5_0=
+fan_speed.addr_5_0=0x00040068
+fan_speed.len_5_0=2
+fan_speed.bit_offset_5_0=
+
+fan_speed.mode_5_1=config
+fan_speed.int_cons_5_1=
+fan_speed.src_5_1=cpld
+fan_speed.frmt_5_1=num_bytes
+fan_speed.pola_5_1=negative
+fan_speed.fpath_5_1=
+fan_speed.addr_5_1=0x00040074
+fan_speed.len_5_1=2
+fan_speed.bit_offset_5_1=
+
+fan_speed.mode_6_0=config
+fan_speed.int_cons_6_0=
+fan_speed.src_6_0=cpld
+fan_speed.frmt_6_0=num_bytes
+fan_speed.pola_6_0=negative
+fan_speed.fpath_6_0=
+fan_speed.addr_6_0=0x00040066
+fan_speed.len_6_0=2
+fan_speed.bit_offset_6_0=
+
+fan_speed.mode_6_1=config
+fan_speed.int_cons_6_1=
+fan_speed.src_6_1=cpld
+fan_speed.frmt_6_1=num_bytes
+fan_speed.pola_6_1=negative
+fan_speed.fpath_6_1=
+fan_speed.addr_6_1=0x00040072
+fan_speed.len_6_1=2
+fan_speed.bit_offset_6_1=
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_PSU.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_PSU.cfg
new file mode 100644
index 000000000000..1ba326d51d7c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_PSU.cfg
@@ -0,0 +1,63 @@
+# configuration item: the number of psus
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: psu main_dev is 2
+# minor_dev: psu minor_dev not exist(0)
+dev_num_2_0=2
+
+# configuration item: psu status
+# format: psu_status_[psu_index]_[status_id]
+# psu_index: start from 1
+# status_id: 0: presence 1: output 2: alert
+# psu1 presence status
+psu_status.mode_1_0=config
+psu_status.src_1_0=cpld
+psu_status.frmt_1_0=bit
+psu_status.pola_1_0=negative
+psu_status.addr_1_0=0x00020034
+psu_status.len_1_0=1
+psu_status.bit_offset_1_0=4
+
+# psu1 output status
+psu_status.mode_1_1=config
+psu_status.src_1_1=cpld
+psu_status.frmt_1_1=bit
+psu_status.pola_1_1=positive
+psu_status.addr_1_1=0x00020034
+psu_status.len_1_1=1
+psu_status.bit_offset_1_1=5
+
+# psu1 alert status
+psu_status.mode_1_2=config
+psu_status.src_1_2=cpld
+psu_status.frmt_1_2=bit
+psu_status.pola_1_2=negative
+psu_status.addr_1_2=0x00020034
+psu_status.len_1_2=1
+psu_status.bit_offset_1_2=6
+
+# psu2 presence status
+psu_status.mode_2_0=config
+psu_status.src_2_0=cpld
+psu_status.frmt_2_0=bit
+psu_status.pola_2_0=negative
+psu_status.addr_2_0=0x00020034
+psu_status.len_2_0=1
+psu_status.bit_offset_2_0=0
+
+# psu2 output status
+psu_status.mode_2_1=config
+psu_status.src_2_1=cpld
+psu_status.frmt_2_1=bit
+psu_status.pola_2_1=positive
+psu_status.addr_2_1=0x00020034
+psu_status.len_2_1=1
+psu_status.bit_offset_2_1=1
+
+# psu2 alert status
+psu_status.mode_2_2=config
+psu_status.src_2_2=cpld
+psu_status.frmt_2_2=bit
+psu_status.pola_2_2=negative
+psu_status.addr_2_2=0x00020034
+psu_status.len_2_2=1
+psu_status.bit_offset_2_2=2
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_SENSOR.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_SENSOR.cfg
new file mode 100644
index 000000000000..07d9fdf6948d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_SENSOR.cfg
@@ -0,0 +1,295 @@
+
+# Number of temperature sensors on the mainboard
+dev_num_0_1=0
+
+# Number of voltage sensors on the mainboard
+dev_num_0_2=12
+
+
+# in1 MAC_QSFPDD_VDD3.3V_A
+hwmon_in.mode_0x0001_0x00=config
+hwmon_in.int_cons_0x0001_0x00=0
+hwmon_in.src_0x0001_0x00=cpld
+hwmon_in.frmt_0x0001_0x00=num_bytes
+hwmon_in.pola_0x0001_0x00=negative
+hwmon_in.addr_0x0001_0x00=0x00020060
+hwmon_in.len_0x0001_0x00=2
+hwmon_in.int_extra1_0x0001_0x00=0x00020060
+hwmon_in.int_extra2_0x0001_0x00=2000
+hwmon_in.int_extra3_0x0001_0x00=1
+
+hwmon_in.mode_0x0001_0x01=str_constant
+hwmon_in.str_cons_0x0001_0x01=MAC_QSFPDD_VDD3.3V_A
+
+hwmon_in.mode_0x0001_0x02=str_constant
+hwmon_in.str_cons_0x0001_0x02=cpld
+
+hwmon_in.mode_0x0001_0x03=str_constant
+hwmon_in.str_cons_0x0001_0x03=3560
+
+hwmon_in.mode_0x0001_0x05=str_constant
+hwmon_in.str_cons_0x0001_0x05=3040
+
+# in2 MAC_QSFPDD_VDD3.3V_B
+hwmon_in.mode_0x0002_0x00=config
+hwmon_in.int_cons_0x0002_0x00=0
+hwmon_in.src_0x0002_0x00=cpld
+hwmon_in.frmt_0x0002_0x00=num_bytes
+hwmon_in.pola_0x0002_0x00=negative
+hwmon_in.addr_0x0002_0x00=0x00020062
+hwmon_in.len_0x0002_0x00=2
+hwmon_in.int_extra1_0x0002_0x00=0x00020062
+hwmon_in.int_extra2_0x0002_0x00=2000
+hwmon_in.int_extra3_0x0002_0x00=1
+
+hwmon_in.mode_0x0002_0x01=str_constant
+hwmon_in.str_cons_0x0002_0x01=MAC_QSFPDD_VDD3.3V_B
+
+hwmon_in.mode_0x0002_0x02=str_constant
+hwmon_in.str_cons_0x0002_0x02=cpld
+
+hwmon_in.mode_0x0002_0x03=str_constant
+hwmon_in.str_cons_0x0002_0x03=3560
+
+hwmon_in.mode_0x0002_0x05=str_constant
+hwmon_in.str_cons_0x0002_0x05=3040
+
+# in3 MAC_VDD3.3_MON
+hwmon_in.mode_0x0003_0x00=config
+hwmon_in.int_cons_0x0003_0x00=0
+hwmon_in.src_0x0003_0x00=cpld
+hwmon_in.frmt_0x0003_0x00=num_bytes
+hwmon_in.pola_0x0003_0x00=negative
+hwmon_in.addr_0x0003_0x00=0x00020066
+hwmon_in.len_0x0003_0x00=2
+hwmon_in.int_extra1_0x0003_0x00=0x00020066
+hwmon_in.int_extra2_0x0003_0x00=2000
+hwmon_in.int_extra3_0x0003_0x00=1
+
+hwmon_in.mode_0x0003_0x01=str_constant
+hwmon_in.str_cons_0x0003_0x01=MAC_VDD3.3_MON
+
+hwmon_in.mode_0x0003_0x02=str_constant
+hwmon_in.str_cons_0x0003_0x02=cpld
+
+hwmon_in.mode_0x0003_0x03=str_constant
+hwmon_in.str_cons_0x0003_0x03=3465
+
+hwmon_in.mode_0x0003_0x05=str_constant
+hwmon_in.str_cons_0x0003_0x05=3040
+
+# in4 MAC_VDD3.7V_CLK
+hwmon_in.mode_0x0004_0x00=config
+hwmon_in.int_cons_0x0004_0x00=0
+hwmon_in.src_0x0004_0x00=cpld
+hwmon_in.frmt_0x0004_0x00=num_bytes
+hwmon_in.pola_0x0004_0x00=negative
+hwmon_in.addr_0x0004_0x00=0x00020068
+hwmon_in.len_0x0004_0x00=2
+hwmon_in.int_extra1_0x0004_0x00=0x00020068
+hwmon_in.int_extra2_0x0004_0x00=2000
+hwmon_in.int_extra3_0x0004_0x00=1
+
+hwmon_in.mode_0x0004_0x01=str_constant
+hwmon_in.str_cons_0x0004_0x01=MAC_VDD3.7V_CLK
+
+hwmon_in.mode_0x0004_0x02=str_constant
+hwmon_in.str_cons_0x0004_0x02=cpld
+
+hwmon_in.mode_0x0004_0x03=str_constant
+hwmon_in.str_cons_0x0004_0x03=4000
+
+hwmon_in.mode_0x0004_0x05=str_constant
+hwmon_in.str_cons_0x0004_0x05=3500
+
+# in5 MAC_VDD5V_USB
+hwmon_in.mode_0x0005_0x00=config
+hwmon_in.int_cons_0x0005_0x00=0
+hwmon_in.src_0x0005_0x00=cpld
+hwmon_in.frmt_0x0005_0x00=num_bytes
+hwmon_in.pola_0x0005_0x00=negative
+hwmon_in.addr_0x0005_0x00=0x0002006a
+hwmon_in.len_0x0005_0x00=2
+hwmon_in.int_extra1_0x0005_0x00=0x0002006a
+hwmon_in.int_extra2_0x0005_0x00=3000
+hwmon_in.int_extra3_0x0005_0x00=1
+
+hwmon_in.mode_0x0005_0x01=str_constant
+hwmon_in.str_cons_0x0005_0x01=MAC_VDD5V_USB
+
+hwmon_in.mode_0x0005_0x02=str_constant
+hwmon_in.str_cons_0x0005_0x02=cpld
+
+hwmon_in.mode_0x0005_0x03=str_constant
+hwmon_in.str_cons_0x0005_0x03=5500
+
+hwmon_in.mode_0x0005_0x05=str_constant
+hwmon_in.str_cons_0x0005_0x05=4500
+
+# in6 FAN1_VDD12V
+hwmon_in.mode_0x0006_0x00=config
+hwmon_in.int_cons_0x0006_0x00=0
+hwmon_in.src_0x0006_0x00=cpld
+hwmon_in.frmt_0x0006_0x00=num_bytes
+hwmon_in.pola_0x0006_0x00=negative
+hwmon_in.addr_0x0006_0x00=0x00040082
+hwmon_in.len_0x0006_0x00=2
+hwmon_in.int_extra1_0x0006_0x00=0x00040082
+hwmon_in.int_extra2_0x0006_0x00=6000
+hwmon_in.int_extra3_0x0006_0x00=1
+
+hwmon_in.mode_0x0006_0x01=str_constant
+hwmon_in.str_cons_0x0006_0x01=FAN1_VDD12V
+
+hwmon_in.mode_0x0006_0x02=str_constant
+hwmon_in.str_cons_0x0006_0x02=cpld
+
+hwmon_in.mode_0x0006_0x03=str_constant
+hwmon_in.str_cons_0x0006_0x03=12600
+
+hwmon_in.mode_0x0006_0x05=str_constant
+hwmon_in.str_cons_0x0006_0x05=11400
+
+# in7 FAN2_VDD12V
+hwmon_in.mode_0x0007_0x00=config
+hwmon_in.int_cons_0x0007_0x00=0
+hwmon_in.src_0x0007_0x00=cpld
+hwmon_in.frmt_0x0007_0x00=num_bytes
+hwmon_in.pola_0x0007_0x00=negative
+hwmon_in.addr_0x0007_0x00=0x00040080
+hwmon_in.len_0x0007_0x00=2
+hwmon_in.int_extra1_0x0007_0x00=0x00040080
+hwmon_in.int_extra2_0x0007_0x00=6000
+hwmon_in.int_extra3_0x0007_0x00=1
+
+hwmon_in.mode_0x0007_0x01=str_constant
+hwmon_in.str_cons_0x0007_0x01=FAN2_VDD12V
+
+hwmon_in.mode_0x0007_0x02=str_constant
+hwmon_in.str_cons_0x0007_0x02=cpld
+
+hwmon_in.mode_0x0007_0x03=str_constant
+hwmon_in.str_cons_0x0007_0x03=12600
+
+hwmon_in.mode_0x0007_0x05=str_constant
+hwmon_in.str_cons_0x0007_0x05=11400
+
+# in8 FAN3_VDD12V
+hwmon_in.mode_0x0008_0x00=config
+hwmon_in.int_cons_0x0008_0x00=0
+hwmon_in.src_0x0008_0x00=cpld
+hwmon_in.frmt_0x0008_0x00=num_bytes
+hwmon_in.pola_0x0008_0x00=negative
+hwmon_in.addr_0x0008_0x00=0x00040088
+hwmon_in.len_0x0008_0x00=2
+hwmon_in.int_extra1_0x0008_0x00=0x00040088
+hwmon_in.int_extra2_0x0008_0x00=6000
+hwmon_in.int_extra3_0x0008_0x00=1
+
+hwmon_in.mode_0x0008_0x01=str_constant
+hwmon_in.str_cons_0x0008_0x01=FAN3_VDD12V
+
+hwmon_in.mode_0x0008_0x02=str_constant
+hwmon_in.str_cons_0x0008_0x02=cpld
+
+hwmon_in.mode_0x0008_0x03=str_constant
+hwmon_in.str_cons_0x0008_0x03=12600
+
+hwmon_in.mode_0x0008_0x05=str_constant
+hwmon_in.str_cons_0x0008_0x05=11400
+
+# in9 FAN4_VDD12V
+hwmon_in.mode_0x0009_0x00=config
+hwmon_in.int_cons_0x0009_0x00=0
+hwmon_in.src_0x0009_0x00=cpld
+hwmon_in.frmt_0x0009_0x00=num_bytes
+hwmon_in.pola_0x0009_0x00=negative
+hwmon_in.addr_0x0009_0x00=0x0004008a
+hwmon_in.len_0x0009_0x00=2
+hwmon_in.int_extra1_0x0009_0x00=0x0004008a
+hwmon_in.int_extra2_0x0009_0x00=6000
+hwmon_in.int_extra3_0x0009_0x00=1
+
+hwmon_in.mode_0x0009_0x01=str_constant
+hwmon_in.str_cons_0x0009_0x01=FAN4_VDD12V
+
+hwmon_in.mode_0x0009_0x02=str_constant
+hwmon_in.str_cons_0x0009_0x02=cpld
+
+hwmon_in.mode_0x0009_0x03=str_constant
+hwmon_in.str_cons_0x0009_0x03=12600
+
+hwmon_in.mode_0x0009_0x05=str_constant
+hwmon_in.str_cons_0x0009_0x05=11400
+
+# in10 FAN5_VDD12V
+hwmon_in.mode_0x000a_0x00=config
+hwmon_in.int_cons_0x000a_0x00=0
+hwmon_in.src_0x000a_0x00=cpld
+hwmon_in.frmt_0x000a_0x00=num_bytes
+hwmon_in.pola_0x000a_0x00=negative
+hwmon_in.addr_0x000a_0x00=0x00040086
+hwmon_in.len_0x000a_0x00=2
+hwmon_in.int_extra1_0x000a_0x00=0x00040086
+hwmon_in.int_extra2_0x000a_0x00=6000
+hwmon_in.int_extra3_0x000a_0x00=1
+
+hwmon_in.mode_0x000a_0x01=str_constant
+hwmon_in.str_cons_0x000a_0x01=FAN5_VDD12V
+
+hwmon_in.mode_0x000a_0x02=str_constant
+hwmon_in.str_cons_0x000a_0x02=cpld
+
+hwmon_in.mode_0x000a_0x03=str_constant
+hwmon_in.str_cons_0x000a_0x03=12600
+
+hwmon_in.mode_0x000a_0x05=str_constant
+hwmon_in.str_cons_0x000a_0x05=11400
+
+# in11 FAN6_VDD12V
+hwmon_in.mode_0x000b_0x00=config
+hwmon_in.int_cons_0x000b_0x00=0
+hwmon_in.src_0x000b_0x00=cpld
+hwmon_in.frmt_0x000b_0x00=num_bytes
+hwmon_in.pola_0x000b_0x00=negative
+hwmon_in.addr_0x000b_0x00=0x0004008c
+hwmon_in.len_0x000b_0x00=2
+hwmon_in.int_extra1_0x000b_0x00=0x0004008c
+hwmon_in.int_extra2_0x000b_0x00=6000
+hwmon_in.int_extra3_0x000b_0x00=1
+
+hwmon_in.mode_0x000b_0x01=str_constant
+hwmon_in.str_cons_0x000b_0x01=FAN6_VDD12V
+
+hwmon_in.mode_0x000b_0x02=str_constant
+hwmon_in.str_cons_0x000b_0x02=cpld
+
+hwmon_in.mode_0x000b_0x03=str_constant
+hwmon_in.str_cons_0x000b_0x03=12600
+
+hwmon_in.mode_0x000b_0x05=str_constant
+hwmon_in.str_cons_0x000b_0x05=11400
+
+# in12 FAN_VDD3.3V
+hwmon_in.mode_0x000c_0x00=config
+hwmon_in.int_cons_0x000c_0x00=0
+hwmon_in.src_0x000c_0x00=cpld
+hwmon_in.frmt_0x000c_0x00=num_bytes
+hwmon_in.pola_0x000c_0x00=negative
+hwmon_in.addr_0x000c_0x00=0x00040084
+hwmon_in.len_0x000c_0x00=2
+hwmon_in.int_extra1_0x000c_0x00=0x00040084
+hwmon_in.int_extra2_0x000c_0x00=2000
+hwmon_in.int_extra3_0x000c_0x00=1
+
+hwmon_in.mode_0x000c_0x01=str_constant
+hwmon_in.str_cons_0x000c_0x01=FAN_VDD3.3V
+
+hwmon_in.mode_0x000c_0x02=str_constant
+hwmon_in.str_cons_0x000c_0x02=cpld
+
+hwmon_in.mode_0x000c_0x03=str_constant
+hwmon_in.str_cons_0x000c_0x03=3560
+
+hwmon_in.mode_0x000c_0x05=str_constant
+hwmon_in.str_cons_0x000c_0x05=3040
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_SFF.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_SFF.cfg
new file mode 100644
index 000000000000..4876a92c007b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/WB_PLAT_SFF.cfg
@@ -0,0 +1,323 @@
+# configuration item: the number of sffs
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: sff main_dev is 3
+# minor_dev: sff minor_dev not exist(0)
+dev_num_3_0=34
+
+# configuration item: The directory name of sff sysfs
+# format: sff_dir_name_[sff_index]
+# sff_index: start from 1
+sff_dir_name_1 =sff1
+sff_dir_name_2 =sff2
+sff_dir_name_3 =sff3
+sff_dir_name_4 =sff4
+sff_dir_name_5 =sff5
+sff_dir_name_6 =sff6
+sff_dir_name_7 =sff7
+sff_dir_name_8 =sff8
+sff_dir_name_9 =sff9
+sff_dir_name_10 =sff10
+sff_dir_name_11 =sff11
+sff_dir_name_12 =sff12
+sff_dir_name_13 =sff13
+sff_dir_name_14 =sff14
+sff_dir_name_15 =sff15
+sff_dir_name_16 =sff16
+sff_dir_name_17 =sff17
+sff_dir_name_18 =sff18
+sff_dir_name_19 =sff19
+sff_dir_name_20 =sff20
+sff_dir_name_21 =sff21
+sff_dir_name_22 =sff22
+sff_dir_name_23 =sff23
+sff_dir_name_24 =sff24
+sff_dir_name_25 =sff25
+sff_dir_name_26 =sff26
+sff_dir_name_27 =sff27
+sff_dir_name_28 =sff28
+sff_dir_name_29 =sff29
+sff_dir_name_30 =sff30
+sff_dir_name_31 =sff31
+sff_dir_name_32 =sff32
+sff_dir_name_33 =sff33
+sff_dir_name_34 =sff34
+
+# configuration item: sff cpld register status
+# format: sff_cpld_reg_[sff_index]_[cpld_reg]
+# sff_index: start from 1
+# cpld_reg: 1: power_on, 2: tx_fault, 3: tx_dis, 4:pre_n, 5:rx_los
+# 6: reset, 7: lpmode, 8: module_present, 9: interrupt
+
+# sff cpld presence status
+sff_cpld_reg.mode_1_8=config
+sff_cpld_reg.src_1_8=cpld
+sff_cpld_reg.frmt_1_8=bit
+sff_cpld_reg.pola_1_8=negative
+sff_cpld_reg.addr_1_8=0x0003004e
+sff_cpld_reg.len_1_8=1
+sff_cpld_reg.bit_offset_1_8=2
+
+sff_cpld_reg.mode_2_8=config
+sff_cpld_reg.src_2_8=cpld
+sff_cpld_reg.frmt_2_8=bit
+sff_cpld_reg.pola_2_8=negative
+sff_cpld_reg.addr_2_8=0x0003004e
+sff_cpld_reg.len_2_8=1
+sff_cpld_reg.bit_offset_2_8=3
+
+sff_cpld_reg.mode_3_8=config
+sff_cpld_reg.src_3_8=cpld
+sff_cpld_reg.frmt_3_8=bit
+sff_cpld_reg.pola_3_8=negative
+sff_cpld_reg.addr_3_8=0x0003004e
+sff_cpld_reg.len_3_8=1
+sff_cpld_reg.bit_offset_3_8=0
+
+sff_cpld_reg.mode_4_8=config
+sff_cpld_reg.src_4_8=cpld
+sff_cpld_reg.frmt_4_8=bit
+sff_cpld_reg.pola_4_8=negative
+sff_cpld_reg.addr_4_8=0x0003004e
+sff_cpld_reg.len_4_8=1
+sff_cpld_reg.bit_offset_4_8=1
+
+sff_cpld_reg.mode_5_8=config
+sff_cpld_reg.src_5_8=cpld
+sff_cpld_reg.frmt_5_8=bit
+sff_cpld_reg.pola_5_8=negative
+sff_cpld_reg.addr_5_8=0x0003004e
+sff_cpld_reg.len_5_8=1
+sff_cpld_reg.bit_offset_5_8=4
+
+sff_cpld_reg.mode_6_8=config
+sff_cpld_reg.src_6_8=cpld
+sff_cpld_reg.frmt_6_8=bit
+sff_cpld_reg.pola_6_8=negative
+sff_cpld_reg.addr_6_8=0x0003004e
+sff_cpld_reg.len_6_8=1
+sff_cpld_reg.bit_offset_6_8=5
+
+sff_cpld_reg.mode_7_8=config
+sff_cpld_reg.src_7_8=cpld
+sff_cpld_reg.frmt_7_8=bit
+sff_cpld_reg.pola_7_8=negative
+sff_cpld_reg.addr_7_8=0x0003004e
+sff_cpld_reg.len_7_8=1
+sff_cpld_reg.bit_offset_7_8=6
+
+sff_cpld_reg.mode_8_8=config
+sff_cpld_reg.src_8_8=cpld
+sff_cpld_reg.frmt_8_8=bit
+sff_cpld_reg.pola_8_8=negative
+sff_cpld_reg.addr_8_8=0x0003004e
+sff_cpld_reg.len_8_8=1
+sff_cpld_reg.bit_offset_8_8=7
+
+sff_cpld_reg.mode_9_8=config
+sff_cpld_reg.src_9_8=cpld
+sff_cpld_reg.frmt_9_8=bit
+sff_cpld_reg.pola_9_8=negative
+sff_cpld_reg.addr_9_8=0x0003004f
+sff_cpld_reg.len_9_8=1
+sff_cpld_reg.bit_offset_9_8=0
+
+sff_cpld_reg.mode_10_8=config
+sff_cpld_reg.src_10_8=cpld
+sff_cpld_reg.frmt_10_8=bit
+sff_cpld_reg.pola_10_8=negative
+sff_cpld_reg.addr_10_8=0x0003004f
+sff_cpld_reg.len_10_8=1
+sff_cpld_reg.bit_offset_10_8=1
+
+sff_cpld_reg.mode_11_8=config
+sff_cpld_reg.src_11_8=cpld
+sff_cpld_reg.frmt_11_8=bit
+sff_cpld_reg.pola_11_8=negative
+sff_cpld_reg.addr_11_8=0x0003004f
+sff_cpld_reg.len_11_8=1
+sff_cpld_reg.bit_offset_11_8=2
+
+sff_cpld_reg.mode_12_8=config
+sff_cpld_reg.src_12_8=cpld
+sff_cpld_reg.frmt_12_8=bit
+sff_cpld_reg.pola_12_8=negative
+sff_cpld_reg.addr_12_8=0x0003004f
+sff_cpld_reg.len_12_8=1
+sff_cpld_reg.bit_offset_12_8=3
+
+sff_cpld_reg.mode_13_8=config
+sff_cpld_reg.src_13_8=cpld
+sff_cpld_reg.frmt_13_8=bit
+sff_cpld_reg.pola_13_8=negative
+sff_cpld_reg.addr_13_8=0x0003004f
+sff_cpld_reg.len_13_8=1
+sff_cpld_reg.bit_offset_13_8=4
+
+sff_cpld_reg.mode_14_8=config
+sff_cpld_reg.src_14_8=cpld
+sff_cpld_reg.frmt_14_8=bit
+sff_cpld_reg.pola_14_8=negative
+sff_cpld_reg.addr_14_8=0x0003004f
+sff_cpld_reg.len_14_8=1
+sff_cpld_reg.bit_offset_14_8=5
+
+sff_cpld_reg.mode_15_8=config
+sff_cpld_reg.src_15_8=cpld
+sff_cpld_reg.frmt_15_8=bit
+sff_cpld_reg.pola_15_8=negative
+sff_cpld_reg.addr_15_8=0x0003004f
+sff_cpld_reg.len_15_8=1
+sff_cpld_reg.bit_offset_15_8=6
+
+sff_cpld_reg.mode_16_8=config
+sff_cpld_reg.src_16_8=cpld
+sff_cpld_reg.frmt_16_8=bit
+sff_cpld_reg.pola_16_8=negative
+sff_cpld_reg.addr_16_8=0x0003004f
+sff_cpld_reg.len_16_8=1
+sff_cpld_reg.bit_offset_16_8=7
+
+sff_cpld_reg.mode_17_8=config
+sff_cpld_reg.src_17_8=cpld
+sff_cpld_reg.frmt_17_8=bit
+sff_cpld_reg.pola_17_8=negative
+sff_cpld_reg.addr_17_8=0x00020032
+sff_cpld_reg.len_17_8=1
+sff_cpld_reg.bit_offset_17_8=0
+
+sff_cpld_reg.mode_18_8=config
+sff_cpld_reg.src_18_8=cpld
+sff_cpld_reg.frmt_18_8=bit
+sff_cpld_reg.pola_18_8=negative
+sff_cpld_reg.addr_18_8=0x00020032
+sff_cpld_reg.len_18_8=1
+sff_cpld_reg.bit_offset_18_8=1
+
+sff_cpld_reg.mode_19_8=config
+sff_cpld_reg.src_19_8=cpld
+sff_cpld_reg.frmt_19_8=bit
+sff_cpld_reg.pola_19_8=negative
+sff_cpld_reg.addr_19_8=0x00020032
+sff_cpld_reg.len_19_8=1
+sff_cpld_reg.bit_offset_19_8=2
+
+sff_cpld_reg.mode_20_8=config
+sff_cpld_reg.src_20_8=cpld
+sff_cpld_reg.frmt_20_8=bit
+sff_cpld_reg.pola_20_8=negative
+sff_cpld_reg.addr_20_8=0x00020032
+sff_cpld_reg.len_20_8=1
+sff_cpld_reg.bit_offset_20_8=3
+
+sff_cpld_reg.mode_21_8=config
+sff_cpld_reg.src_21_8=cpld
+sff_cpld_reg.frmt_21_8=bit
+sff_cpld_reg.pola_21_8=negative
+sff_cpld_reg.addr_21_8=0x00020032
+sff_cpld_reg.len_21_8=1
+sff_cpld_reg.bit_offset_21_8=4
+
+sff_cpld_reg.mode_22_8=config
+sff_cpld_reg.src_22_8=cpld
+sff_cpld_reg.frmt_22_8=bit
+sff_cpld_reg.pola_22_8=negative
+sff_cpld_reg.addr_22_8=0x00020032
+sff_cpld_reg.len_22_8=1
+sff_cpld_reg.bit_offset_22_8=5
+
+sff_cpld_reg.mode_23_8=config
+sff_cpld_reg.src_23_8=cpld
+sff_cpld_reg.frmt_23_8=bit
+sff_cpld_reg.pola_23_8=negative
+sff_cpld_reg.addr_23_8=0x00020032
+sff_cpld_reg.len_23_8=1
+sff_cpld_reg.bit_offset_23_8=6
+
+sff_cpld_reg.mode_24_8=config
+sff_cpld_reg.src_24_8=cpld
+sff_cpld_reg.frmt_24_8=bit
+sff_cpld_reg.pola_24_8=negative
+sff_cpld_reg.addr_24_8=0x00020032
+sff_cpld_reg.len_24_8=1
+sff_cpld_reg.bit_offset_24_8=7
+
+sff_cpld_reg.mode_25_8=config
+sff_cpld_reg.src_25_8=cpld
+sff_cpld_reg.frmt_25_8=bit
+sff_cpld_reg.pola_25_8=negative
+sff_cpld_reg.addr_25_8=0x00020033
+sff_cpld_reg.len_25_8=1
+sff_cpld_reg.bit_offset_25_8=0
+
+sff_cpld_reg.mode_26_8=config
+sff_cpld_reg.src_26_8=cpld
+sff_cpld_reg.frmt_26_8=bit
+sff_cpld_reg.pola_26_8=negative
+sff_cpld_reg.addr_26_8=0x00020033
+sff_cpld_reg.len_26_8=1
+sff_cpld_reg.bit_offset_26_8=1
+
+sff_cpld_reg.mode_27_8=config
+sff_cpld_reg.src_27_8=cpld
+sff_cpld_reg.frmt_27_8=bit
+sff_cpld_reg.pola_27_8=negative
+sff_cpld_reg.addr_27_8=0x00020033
+sff_cpld_reg.len_27_8=1
+sff_cpld_reg.bit_offset_27_8=2
+
+sff_cpld_reg.mode_28_8=config
+sff_cpld_reg.src_28_8=cpld
+sff_cpld_reg.frmt_28_8=bit
+sff_cpld_reg.pola_28_8=negative
+sff_cpld_reg.addr_28_8=0x00020033
+sff_cpld_reg.len_28_8=1
+sff_cpld_reg.bit_offset_28_8=3
+
+sff_cpld_reg.mode_29_8=config
+sff_cpld_reg.src_29_8=cpld
+sff_cpld_reg.frmt_29_8=bit
+sff_cpld_reg.pola_29_8=negative
+sff_cpld_reg.addr_29_8=0x00020033
+sff_cpld_reg.len_29_8=1
+sff_cpld_reg.bit_offset_29_8=6
+
+sff_cpld_reg.mode_30_8=config
+sff_cpld_reg.src_30_8=cpld
+sff_cpld_reg.frmt_30_8=bit
+sff_cpld_reg.pola_30_8=negative
+sff_cpld_reg.addr_30_8=0x00020033
+sff_cpld_reg.len_30_8=1
+sff_cpld_reg.bit_offset_30_8=7
+
+sff_cpld_reg.mode_31_8=config
+sff_cpld_reg.src_31_8=cpld
+sff_cpld_reg.frmt_31_8=bit
+sff_cpld_reg.pola_31_8=negative
+sff_cpld_reg.addr_31_8=0x00020033
+sff_cpld_reg.len_31_8=1
+sff_cpld_reg.bit_offset_31_8=4
+
+sff_cpld_reg.mode_32_8=config
+sff_cpld_reg.src_32_8=cpld
+sff_cpld_reg.frmt_32_8=bit
+sff_cpld_reg.pola_32_8=negative
+sff_cpld_reg.addr_32_8=0x00020033
+sff_cpld_reg.len_32_8=1
+sff_cpld_reg.bit_offset_32_8=5
+
+sff_cpld_reg.mode_33_8=config
+sff_cpld_reg.src_33_8=cpld
+sff_cpld_reg.frmt_33_8=bit
+sff_cpld_reg.pola_33_8=negative
+sff_cpld_reg.addr_33_8=0x00020046
+sff_cpld_reg.len_33_8=1
+sff_cpld_reg.bit_offset_33_8=1
+
+sff_cpld_reg.mode_34_8=config
+sff_cpld_reg.src_34_8=cpld
+sff_cpld_reg.frmt_34_8=bit
+sff_cpld_reg.pola_34_8=negative
+sff_cpld_reg.addr_34_8=0x00020046
+sff_cpld_reg.len_34_8=1
+sff_cpld_reg.bit_offset_34_8=0
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/cfg_file_name b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/cfg_file_name
new file mode 100644
index 000000000000..c3ea65365c78
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/plat_sysfs_cfg/cfg_file_name
@@ -0,0 +1,5 @@
+WB_PLAT_CPLD
+WB_PLAT_FAN
+WB_PLAT_PSU
+WB_PLAT_SFF
+WB_PLAT_SENSOR
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/service/set-eth-mac.service b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/service/set-eth-mac.service
new file mode 100644
index 000000000000..4b74632c21cf
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/service/set-eth-mac.service
@@ -0,0 +1,14 @@
+[Unit]
+Description=Set eth mac address
+Before=interfaces-config.service
+Requires=platform_driver.service
+After=platform_driver.service
+#DefaultDependencies=no
+
+[Service]
+Type=oneshot
+ExecStart=/usr/local/bin/set_eth_mac.py
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/setup.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/setup.py
new file mode 100755
index 000000000000..6c3916921abb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/setup.py
@@ -0,0 +1,39 @@
+from setuptools import setup
+
+setup(
+    name='sonic-platform',
+    version='1.0',
+    description='SONiC platform API implementation',
+    license='Apache 2.0',
+    author='SONiC Team',
+    author_email='support',
+    url='',
+    maintainer='support',
+    maintainer_email='',
+    packages=[
+        'sonic_platform',
+        'plat_hal',
+        'wbutil',
+        'eepromutil',
+        'hal-config',
+        'config',
+    ],
+    py_modules=[
+        'hal_pltfm',
+        'platform_util',
+        'platform_intf',
+    ],
+    classifiers=[
+        'Development Status :: 3 - Alpha',
+        'Environment :: Plugins',
+        'Intended Audience :: Developers',
+        'Intended Audience :: Information Technology',
+        'Intended Audience :: System Administrators',
+        'License :: OSI Approved :: Apache Software License',
+        'Natural Language :: English',
+        'Operating System :: POSIX :: Linux',
+        'Programming Language :: Python :: 3.7',
+        'Topic :: Utilities',
+    ],
+    keywords='sonic SONiC platform PLATFORM',
+)

From 4807ac5109c2f5f20d92b33041ac45b9b9b11c89 Mon Sep 17 00:00:00 2001
From: Walter Doekes <walter+github@wjd.nu>
Date: Thu, 21 Nov 2024 04:08:37 +0100
Subject: [PATCH 241/364] [database]: Fix "program:redisprogram:redis_bmp" ERR
 from supervisor (#20726)

== Why I did it ==

Commit 06c469e added an extra redis instance. This resulted in a
two item string without linefeeds in /etc/supervisor/critical_processes:

  program:redisprogram:redis_bmp

That resulted in an error in syslog and docker-database failing.

== Work item tracking ==

ERR database#supervisor-proc-exit-listener: Syntax of the line
  program:redisprogram:redis_bmp#012 in processes file is incorrect.
  Exiting... (#20636)

ossobv/sonic-buildimage#17

== How I did it ==

Replace the jinja2 whitespace eating hyphens from BOL to EOL.

Note that j2 and the jinja2 parser in sonig-cfggen do not behave the
same. The sonig-cfggen is the relevant one.

Before:

  $ j2 ./dockers/docker-database/critical_processes.j2.old -f json \
      <<< '{"INSTANCES":{"foo":"bar","baz":"..."}}'
  |
  |
  program:foo
  program:baz

  # docker exec database sonic-cfggen \
      -j /var/run/redis/sonic-db/database_config.json \
      -t /usr/share/sonic/templates/critical_processes.j2.old
  program:redisprogram:redis_bmp

After:

  $ j2 ./dockers/docker-database/critical_processes.j2 -f json \
      <<< '{"INSTANCES":{"foo":"bar","baz":"..."}}'
  program:foo
  program:baz

  # docker exec database sonic-cfggen \
      -j /var/run/redis/sonic-db/database_config.json \
      -t /usr/share/sonic/templates/critical_processes.j2
  program:redis
  program:redis_bmp
  |

After this fix, the output in /etc/supervisor/critical_processes is
correct and the error from docker-database is gone.
---
 dockers/docker-database/critical_processes.j2 | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/dockers/docker-database/critical_processes.j2 b/dockers/docker-database/critical_processes.j2
index 1f524132e938..5bf4dbce47c6 100644
--- a/dockers/docker-database/critical_processes.j2
+++ b/dockers/docker-database/critical_processes.j2
@@ -1,5 +1,5 @@
-{% if INSTANCES %}
-{%     for redis_inst, redis_items in INSTANCES.items() %}
+{% if INSTANCES -%}
+{%     for redis_inst, redis_items in INSTANCES.items() -%}
 program:{{ redis_inst }}
-{%-     endfor %}
-{%- endif %}
+{%     endfor -%}
+{% endif -%}

From ce914e1312f97ab9fcd0e97cbaeb9170e0ce8d13 Mon Sep 17 00:00:00 2001
From: Zhijian Li <zhijianli@microsoft.com>
Date: Thu, 21 Nov 2024 00:39:43 -0800
Subject: [PATCH 242/364] [Yang] Fix Yang model of BGP Allowed Prefix (#20550)

Why I did it
Bugfix for Yang model of BGP Allowed Prefix.

Support optional NEIGHBOR_TYPE in key.
Support optional le and ge in prefixes_v4/prefixes_v6 list (e.g., 10.20.30.0/24 le 30).
Work item tracking
Microsoft ADO (number only): 30001113
How I did it
Updated sonic-bgp-allowed-prefix.yang.

Define optional value NEIGHBOR_TYPE in key.
Define type bgp-allowed-ipv4-prefix and bgp-allowed-ipv6-prefix to support the optional suffix in prefixes_v4/prefixes_v6 list.
How to verify it
Verified by UT:
---
 .../tests/yang_model_tests/tests/bgp.json     |  33 +--
 .../yang_model_tests/tests_config/bgp.json    | 277 ++++++++++++++----
 .../yang-models/sonic-bgp-allowed-prefix.yang | 146 ++++++++-
 3 files changed, 363 insertions(+), 93 deletions(-)

diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/bgp.json b/src/sonic-yang-models/tests/yang_model_tests/tests/bgp.json
index 543a985670f3..d8ab57f61074 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/bgp.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/bgp.json
@@ -158,43 +158,32 @@
     "BGP_PEERRANGE_ALL_VALID": {
         "desc": "Configure BGP peer range table."
     },
-    "BGP_ALLOWED_PREFIXES_COM_LIST_ALL_VALID": {
+    "BGP_ALLOWED_PREFIXES_ALL_VALID": {
         "desc": "Configue BGP allowed prefix list."
     },
-    "BGP_ALLOWED_PREFIXES_COM_LIST_INVALID_DEPLOYMENT": {
-        "desc": "Invalid default action.",
+    "BGP_ALLOWED_PREFIXES_INVALID_DEPLOYMENT": {
+        "desc": "Invalid deployment.",
         "eStrKey" : "Pattern"
     },
-    "BGP_ALLOWED_PREFIXES_COM_LIST_INVALID_DEFAULT_ACTION": {
-        "desc": "Invalid default action.",
+    "BGP_ALLOWED_PREFIXES_INVALID_ID": {
+        "desc": "Invalid id.",
         "eStrKey" : "InvalidValue",
-        "eStr" : ["default_action"]
-    },
-    "BGP_ALLOWED_PREFIXES_COM_LIST_INVALID_PREFIXES_IPV4": {
-        "desc": "Invalid IPv4 prefix.",
-        "eStrKey" : "Pattern"
+        "eStr" : ["id"]
     },
-    "BGP_ALLOWED_PREFIXES_COM_LIST_INVALID_PREFIXES_IPV6": {
-        "desc": "Invalid IPv6 prefix.",
-        "eStrKey" : "Pattern"
-    },
-    "BGP_ALLOWED_PREFIXES_LIST_ALL_VALID": {
-        "desc": "Configue BGP allowed prefix list."
-    },
-    "BGP_ALLOWED_PREFIXES_LIST_INVALID_DEPLOYMENT": {
-        "desc": "Invalid default action.",
+    "BGP_ALLOWED_PREFIXES_INVALID_NEIGHBOR": {
+        "desc": "Invalid neighbor.",
         "eStrKey" : "Pattern"
     },
-    "BGP_ALLOWED_PREFIXES_LIST_INVALID_DEFAULT_ACTION": {
+    "BGP_ALLOWED_PREFIXES_INVALID_DEFAULT_ACTION": {
         "desc": "Invalid default action.",
         "eStrKey" : "InvalidValue",
         "eStr" : ["default_action"]
     },
-    "BGP_ALLOWED_PREFIXES_LIST_INVALID_PREFIXES_IPV4": {
+    "BGP_ALLOWED_PREFIXES_INVALID_PREFIXES_IPV4": {
         "desc": "Invalid IPv4 prefix.",
         "eStrKey" : "Pattern"
     },
-    "BGP_ALLOWED_PREFIXES_LIST_INVALID_PREFIXES_IPV6": {
+    "BGP_ALLOWED_PREFIXES_INVALID_PREFIXES_IPV6": {
         "desc": "Invalid IPv6 prefix.",
         "eStrKey" : "Pattern"
     },
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp.json
index 6ecc90c38699..4c06316deede 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp.json
@@ -1422,95 +1422,228 @@
         }
     },
 
-    "BGP_ALLOWED_PREFIXES_COM_LIST_ALL_VALID": {
+    "BGP_ALLOWED_PREFIXES_ALL_VALID": {
         "sonic-bgp-allowed-prefix:sonic-bgp-allowed-prefix": {
             "sonic-bgp-allowed-prefix:BGP_ALLOWED_PREFIXES": {
+                "BGP_ALLOWED_PREFIXES_LIST": [
+                    {
+                        "deployment": "DEPLOYMENT_ID",
+                        "id": "4",
+                        "default_action": "permit",
+                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"],
+                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"]
+                    }
+                ],
+                "BGP_ALLOWED_PREFIXES_NEIGH_LIST": [
+                    {
+                        "deployment": "DEPLOYMENT_ID",
+                        "id": "4",
+                        "neighbor": "NEIGHBOR_TYPE",
+                        "neighbor_type": "DUMMY_NEIGHBOR_TYPE",
+                        "default_action": "permit",
+                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"],
+                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"]
+                    }
+                ],
                 "BGP_ALLOWED_PREFIXES_COM_LIST": [
                     {
                         "deployment": "DEPLOYMENT_ID",
                         "id": "4",
                         "community": "123:123",
                         "default_action": "permit",
-                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24"],
-                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64"]
-                    },
+                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"],
+                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"]
+                    }
+                ],
+                "BGP_ALLOWED_PREFIXES_NEIGH_COM_LIST": [
                     {
                         "deployment": "DEPLOYMENT_ID",
-                        "id": "5",
-                        "community": "456:456",
+                        "id": "4",
+                        "neighbor": "NEIGHBOR_TYPE",
+                        "neighbor_type": "DUMMY_NEIGHBOR_TYPE",
+                        "community": "123:123",
                         "default_action": "permit",
-                        "prefixes_v4": ["10.10.0.0/24", "10.11.0.0/24"],
-                        "prefixes_v6": ["fc00:f1::/64", "fc00:a1::/64"]
+                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"],
+                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"]
                     }
                 ]
             }
         }
     },
-    "BGP_ALLOWED_PREFIXES_COM_LIST_INVALID_DEPLOYMENT": {
+    "BGP_ALLOWED_PREFIXES_INVALID_DEPLOYMENT": {
         "sonic-bgp-allowed-prefix:sonic-bgp-allowed-prefix": {
             "sonic-bgp-allowed-prefix:BGP_ALLOWED_PREFIXES": {
+                "BGP_ALLOWED_PREFIXES_LIST": [
+                    {
+                        "deployment": "INVALID_DEPLOYMENT",
+                        "id": "4",
+                        "default_action": "permit",
+                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"],
+                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"]
+                    }
+                ],
+                "BGP_ALLOWED_PREFIXES_NEIGH_LIST": [
+                    {
+                        "deployment": "INVALID_DEPLOYMENT",
+                        "id": "4",
+                        "neighbor": "NEIGHBOR_TYPE",
+                        "neighbor_type": "DUMMY_NEIGHBOR_TYPE",
+                        "default_action": "permit",
+                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"],
+                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"]
+                    }
+                ],
                 "BGP_ALLOWED_PREFIXES_COM_LIST": [
                     {
-                        "deployment": "DEPLOYMENTID",
+                        "deployment": "INVALID_DEPLOYMENT",
                         "id": "4",
                         "community": "123:123",
-                        "default_action": "permitall",
+                        "default_action": "permit",
                         "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24"],
                         "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64"]
                     }
+                ],
+                "BGP_ALLOWED_PREFIXES_NEIGH_COM_LIST": [
+                    {
+                        "deployment": "INVALID_DEPLOYMENT",
+                        "id": "4",
+                        "neighbor": "NEIGHBOR_TYPE",
+                        "neighbor_type": "DUMMY_NEIGHBOR_TYPE",
+                        "community": "123:123",
+                        "default_action": "permit",
+                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"],
+                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"]
+                    }
                 ]
             }
         }
     },
-    "BGP_ALLOWED_PREFIXES_COM_LIST_INVALID_DEFAULT_ACTION": {
+    "BGP_ALLOWED_PREFIXES_INVALID_ID": {
         "sonic-bgp-allowed-prefix:sonic-bgp-allowed-prefix": {
             "sonic-bgp-allowed-prefix:BGP_ALLOWED_PREFIXES": {
+                "BGP_ALLOWED_PREFIXES_LIST": [
+                    {
+                        "deployment": "DEPLOYMENT_ID",
+                        "id": "INVALID_ID",
+                        "default_action": "permit",
+                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"],
+                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"]
+                    }
+                ],
+                "BGP_ALLOWED_PREFIXES_NEIGH_LIST": [
+                    {
+                        "deployment": "DEPLOYMENT_ID",
+                        "id": "INVALID_ID",
+                        "neighbor": "NEIGHBOR_TYPE",
+                        "neighbor_type": "DUMMY_NEIGHBOR_TYPE",
+                        "default_action": "permit",
+                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"],
+                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"]
+                    }
+                ],
                 "BGP_ALLOWED_PREFIXES_COM_LIST": [
                     {
                         "deployment": "DEPLOYMENT_ID",
-                        "id": "4",
+                        "id": "INVALID_ID",
                         "community": "123:123",
-                        "default_action": "permitall",
+                        "default_action": "permit",
                         "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24"],
                         "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64"]
                     }
+                ],
+                "BGP_ALLOWED_PREFIXES_NEIGH_COM_LIST": [
+                    {
+                        "deployment": "DEPLOYMENT_ID",
+                        "id": "INVALID_ID",
+                        "neighbor": "NEIGHBOR_TYPE",
+                        "neighbor_type": "DUMMY_NEIGHBOR_TYPE",
+                        "community": "123:123",
+                        "default_action": "permit",
+                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"],
+                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"]
+                    }
                 ]
             }
         }
     },
-    "BGP_ALLOWED_PREFIXES_COM_LIST_INVALID_PREFIXES_IPV4": {
+    "BGP_ALLOWED_PREFIXES_INVALID_NEIGHBOR": {
         "sonic-bgp-allowed-prefix:sonic-bgp-allowed-prefix": {
             "sonic-bgp-allowed-prefix:BGP_ALLOWED_PREFIXES": {
-                "BGP_ALLOWED_PREFIXES_COM_LIST": [
+                "BGP_ALLOWED_PREFIXES_NEIGH_LIST": [
                     {
                         "deployment": "DEPLOYMENT_ID",
                         "id": "4",
+                        "neighbor": "INVALID_NEIGHBOR_TYPE",
+                        "neighbor_type": "DUMMY_NEIGHBOR_TYPE",
+                        "default_action": "permit",
+                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"],
+                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"]
+                    }
+                ],
+                "BGP_ALLOWED_PREFIXES_NEIGH_COM_LIST": [
+                    {
+                        "deployment": "DEPLOYMENT_ID",
+                        "id": "4",
+                        "neighbor": "INVALID_NEIGHBOR_TYPE",
+                        "neighbor_type": "DUMMY_NEIGHBOR_TYPE",
                         "community": "123:123",
                         "default_action": "permit",
-                        "prefixes_v4": ["10.0.0.0/48", "10.1.0.0/24"],
-                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64"]
+                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"],
+                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"]
                     }
                 ]
             }
         }
     },
-    "BGP_ALLOWED_PREFIXES_COM_LIST_INVALID_PREFIXES_IPV6": {
+    "BGP_ALLOWED_PREFIXES_INVALID_DEFAULT_ACTION": {
         "sonic-bgp-allowed-prefix:sonic-bgp-allowed-prefix": {
             "sonic-bgp-allowed-prefix:BGP_ALLOWED_PREFIXES": {
+                "BGP_ALLOWED_PREFIXES_LIST": [
+                    {
+                        "deployment": "DEPLOYMENT_ID",
+                        "id": "4",
+                        "default_action": "INVALID_DEFAULT_ACTION",
+                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"],
+                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"]
+                    }
+                ],
+                "BGP_ALLOWED_PREFIXES_NEIGH_LIST": [
+                    {
+                        "deployment": "DEPLOYMENT_ID",
+                        "id": "4",
+                        "neighbor": "NEIGHBOR_TYPE",
+                        "neighbor_type": "DUMMY_NEIGHBOR_TYPE",
+                        "default_action": "INVALID_DEFAULT_ACTION",
+                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"],
+                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"]
+                    }
+                ],
                 "BGP_ALLOWED_PREFIXES_COM_LIST": [
                     {
                         "deployment": "DEPLOYMENT_ID",
                         "id": "4",
                         "community": "123:123",
-                        "default_action": "permit",
-                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0./24"],
-                        "prefixes_v6": ["fc00:f0::/129", "fc00:a0::/64"]
+                        "default_action": "INVALID_DEFAULT_ACTION",
+                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"],
+                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"]
+                    }
+                ],
+                "BGP_ALLOWED_PREFIXES_NEIGH_COM_LIST": [
+                    {
+                        "deployment": "DEPLOYMENT_ID",
+                        "id": "4",
+                        "neighbor": "NEIGHBOR_TYPE",
+                        "neighbor_type": "DUMMY_NEIGHBOR_TYPE",
+                        "community": "123:123",
+                        "default_action": "INVALID_DEFAULT_ACTION",
+                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"],
+                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"]
                     }
                 ]
             }
         }
     },
-    "BGP_ALLOWED_PREFIXES_LIST_ALL_VALID": {
+    "BGP_ALLOWED_PREFIXES_INVALID_PREFIXES_IPV4": {
         "sonic-bgp-allowed-prefix:sonic-bgp-allowed-prefix": {
             "sonic-bgp-allowed-prefix:BGP_ALLOWED_PREFIXES": {
                 "BGP_ALLOWED_PREFIXES_LIST": [
@@ -1518,51 +1651,47 @@
                         "deployment": "DEPLOYMENT_ID",
                         "id": "4",
                         "default_action": "permit",
-                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24"],
-                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64"]
-                    },
+                        "prefixes_v4": ["10.0.0.0/100"],
+                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"]
+                    }
+                ],
+                "BGP_ALLOWED_PREFIXES_NEIGH_LIST": [
                     {
                         "deployment": "DEPLOYMENT_ID",
-                        "id": "5",
+                        "id": "4",
+                        "neighbor": "NEIGHBOR_TYPE",
+                        "neighbor_type": "DUMMY_NEIGHBOR_TYPE",
                         "default_action": "permit",
-                        "prefixes_v4": ["10.10.0.0/24", "10.11.0.0/24"],
-                        "prefixes_v6": ["fc00:f1::/64", "fc00:a1::/64"]
+                        "prefixes_v4": ["10.1.0.0/24 ge 100"],
+                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"]
                     }
-                ]
-            }
-        }
-    },
-    "BGP_ALLOWED_PREFIXES_LIST_INVALID_DEPLOYMENT": {
-        "sonic-bgp-allowed-prefix:sonic-bgp-allowed-prefix": {
-            "sonic-bgp-allowed-prefix:BGP_ALLOWED_PREFIXES": {
-                "BGP_ALLOWED_PREFIXES_LIST": [
+                ],
+                "BGP_ALLOWED_PREFIXES_COM_LIST": [
                     {
-                        "deployment": "DEPLOYMENTID",
+                        "deployment": "DEPLOYMENT_ID",
                         "id": "4",
-                        "default_action": "permitall",
-                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24"],
-                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64"]
+                        "community": "123:123",
+                        "default_action": "permit",
+                        "prefixes_v4": ["10.2.0.0/24 le 100"],
+                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"]
                     }
-                ]
-            }
-        }
-    },
-    "BGP_ALLOWED_PREFIXES_LIST_INVALID_DEFAULT_ACTION": {
-        "sonic-bgp-allowed-prefix:sonic-bgp-allowed-prefix": {
-            "sonic-bgp-allowed-prefix:BGP_ALLOWED_PREFIXES": {
-                "BGP_ALLOWED_PREFIXES_LIST": [
+                ],
+                "BGP_ALLOWED_PREFIXES_NEIGH_COM_LIST": [
                     {
                         "deployment": "DEPLOYMENT_ID",
                         "id": "4",
-                        "default_action": "permitall",
-                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24"],
-                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64"]
+                        "neighbor": "NEIGHBOR_TYPE",
+                        "neighbor_type": "DUMMY_NEIGHBOR_TYPE",
+                        "community": "123:123",
+                        "default_action": "permit",
+                        "prefixes_v4": ["10.2.0.0/24 eq 28"],
+                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64 ge 96", "fc00:b0::/64 le 96"]
                     }
                 ]
             }
         }
     },
-    "BGP_ALLOWED_PREFIXES_LIST_INVALID_PREFIXES_IPV4": {
+    "BGP_ALLOWED_PREFIXES_INVALID_PREFIXES_IPV6": {
         "sonic-bgp-allowed-prefix:sonic-bgp-allowed-prefix": {
             "sonic-bgp-allowed-prefix:BGP_ALLOWED_PREFIXES": {
                 "BGP_ALLOWED_PREFIXES_LIST": [
@@ -1570,23 +1699,41 @@
                         "deployment": "DEPLOYMENT_ID",
                         "id": "4",
                         "default_action": "permit",
-                        "prefixes_v4": ["10.0.0.0/48", "10.1.0.0/24"],
-                        "prefixes_v6": ["fc00:f0::/64", "fc00:a0::/64"]
+                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"],
+                        "prefixes_v6": ["fc00:f0::/200"]
                     }
-                ]
-            }
-        }
-    },
-    "BGP_ALLOWED_PREFIXES_LIST_INVALID_PREFIXES_IPV6": {
-        "sonic-bgp-allowed-prefix:sonic-bgp-allowed-prefix": {
-            "sonic-bgp-allowed-prefix:BGP_ALLOWED_PREFIXES": {
-                "BGP_ALLOWED_PREFIXES_LIST": [
+                ],
+                "BGP_ALLOWED_PREFIXES_NEIGH_LIST": [
+                    {
+                        "deployment": "DEPLOYMENT_ID",
+                        "id": "4",
+                        "neighbor": "NEIGHBOR_TYPE",
+                        "neighbor_type": "DUMMY_NEIGHBOR_TYPE",
+                        "default_action": "permit",
+                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"],
+                        "prefixes_v6": ["fc00:a0::/64 ge 200", "fc00:b0::/64 le 96"]
+                    }
+                ],
+                "BGP_ALLOWED_PREFIXES_COM_LIST": [
                     {
                         "deployment": "DEPLOYMENT_ID",
                         "id": "4",
+                        "community": "123:123",
+                        "default_action": "permit",
+                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"],
+                        "prefixes_v6": ["fc00:b0::/64 le 200"]
+                    }
+                ],
+                "BGP_ALLOWED_PREFIXES_NEIGH_COM_LIST": [
+                    {
+                        "deployment": "DEPLOYMENT_ID",
+                        "id": "4",
+                        "neighbor": "NEIGHBOR_TYPE",
+                        "neighbor_type": "DUMMY_NEIGHBOR_TYPE",
+                        "community": "123:123",
                         "default_action": "permit",
-                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0./24"],
-                        "prefixes_v6": ["fc00:f0::/129", "fc00:a0::/64"]
+                        "prefixes_v4": ["10.0.0.0/24", "10.1.0.0/24 ge 28", "10.2.0.0/24 le 28"],
+                        "prefixes_v6": ["fc00:b0::/64 eq 96"]
                     }
                 ]
             }
diff --git a/src/sonic-yang-models/yang-models/sonic-bgp-allowed-prefix.yang b/src/sonic-yang-models/yang-models/sonic-bgp-allowed-prefix.yang
index 65f5dab74733..ace3ddc2f1d0 100644
--- a/src/sonic-yang-models/yang-models/sonic-bgp-allowed-prefix.yang
+++ b/src/sonic-yang-models/yang-models/sonic-bgp-allowed-prefix.yang
@@ -29,8 +29,125 @@ module sonic-bgp-allowed-prefix {
             "Initial revision.";
     }
 
+    typedef bgp-allowed-ipv4-prefix {
+       type string {
+         pattern
+            '(([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])\.){3}'
+          +  '([0-9]|[1-9][0-9]|1[0-9][0-9]|2[0-4][0-9]|25[0-5])'
+          + '/(([0-9])|([1-2][0-9])|(3[0-2]))'
+          + '( (le|ge) (([0-9])|([1-2][0-9])|(3[0-2])))?';
+       }
+       description
+        "The bgp-allowed-ipv4-prefix type represents an IPv4 address prefix
+         in BGP allowed prefix format.
+
+         The string format is an inet:ipv4-prefix (defined in RFC 6991) value
+         appended with an optional suffix.
+
+         The optional suffix consists of a string 'le' or 'ge' followed by a
+         number which is less than or equal to 32.";
+    }
+
+    typedef bgp-allowed-ipv6-prefix {
+       type string {
+         pattern '((:|[0-9a-fA-F]{0,4}):)([0-9a-fA-F]{0,4}:){0,5}'
+               + '((([0-9a-fA-F]{0,4}:)?(:|[0-9a-fA-F]{0,4}))|'
+               + '(((25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])\.){3}'
+               + '(25[0-5]|2[0-4][0-9]|[01]?[0-9]?[0-9])))'
+               + '(/(([0-9])|([0-9]{2})|(1[0-1][0-9])|(12[0-8])))'
+               + '( (le|ge) (([0-9])|([0-9]{2})|(1[0-1][0-9])|(12[0-8])))?';
+         pattern '(([^:]+:){6}(([^:]+:[^:]+)|(.*\..*)))|'
+               + '((([^:]+:)*[^:]+)?::(([^:]+:)*[^:]+)?)'
+               + '(/.+)'
+               + '( (le|ge) (([0-9])|([0-9]{2})|(1[0-1][0-9])|(12[0-8])))?';
+       }
+       description
+        "The bgp-allowed-ipv6-prefix type represents an IPv6 address prefix
+         in BGP allowed prefix format.
+
+         The string format is an inet:ipv6-prefix (defined in RFC 6991) value
+         appended with an optional suffix.
+
+         The optional suffix consists of a string 'le' or 'ge' followed by a
+         number which is less than or equal to 128.";
+    }
+
     container sonic-bgp-allowed-prefix {
         container BGP_ALLOWED_PREFIXES {
+            list BGP_ALLOWED_PREFIXES_LIST {
+                key "deployment id";
+
+                leaf deployment {
+                    type string {
+                        pattern "DEPLOYMENT_ID";
+                    }
+                    description "BGP allowed prefix list key type";
+                }
+
+                leaf id {
+                    type uint32;
+                    description "BGP allowed prefix list deployment id";
+                }
+
+                leaf default_action {
+                    type rpolsets:routing-policy-action-type;
+                    description "Permit/Deny action for BGP allow prefix list";
+                }
+
+                leaf-list prefixes_v4 {
+                    type bgp-allowed-ipv4-prefix;
+                    description "BGP V4 allowed prefix list";
+                }
+
+                leaf-list prefixes_v6 {
+                    type bgp-allowed-ipv6-prefix;
+                    description "BGP V6 allowed prefix list";
+                }
+            }
+
+            list BGP_ALLOWED_PREFIXES_NEIGH_LIST {
+                key "deployment id neighbor neighbor_type";
+
+                leaf deployment {
+                    type string {
+                        pattern "DEPLOYMENT_ID";
+                    }
+                    description "BGP allowed prefix list key type";
+                }
+
+                leaf id {
+                    type uint32;
+                    description "BGP allowed prefix list deployment id";
+                }
+
+                leaf neighbor {
+                    type string {
+                        pattern "NEIGHBOR_TYPE";
+                    }
+                    description "BGP allowed prefix list neighbor";
+                }
+
+                leaf neighbor_type {
+                    type string;
+                    description "BGP allowed prefix list neighbor type";
+                }
+
+                leaf default_action {
+                    type rpolsets:routing-policy-action-type;
+                    description "Permit/Deny action for BGP allow prefix list";
+                }
+
+                leaf-list prefixes_v4 {
+                    type bgp-allowed-ipv4-prefix;
+                    description "BGP V4 allowed prefix list";
+                }
+
+                leaf-list prefixes_v6 {
+                    type bgp-allowed-ipv6-prefix;
+                    description "BGP V6 allowed prefix list";
+                }
+            }
+
             list BGP_ALLOWED_PREFIXES_COM_LIST {
                 key "deployment id community";
 
@@ -57,18 +174,18 @@ module sonic-bgp-allowed-prefix {
                 }
 
                 leaf-list prefixes_v4 {
-                    type inet:ipv4-prefix;
+                    type bgp-allowed-ipv4-prefix;
                     description "BGP V4 allowed prefix list";
                 }
 
                 leaf-list prefixes_v6 {
-                    type inet:ipv6-prefix;
+                    type bgp-allowed-ipv6-prefix;
                     description "BGP V6 allowed prefix list";
                 }
             }
 
-            list BGP_ALLOWED_PREFIXES_LIST {
-                key "deployment id";
+            list BGP_ALLOWED_PREFIXES_NEIGH_COM_LIST {
+                key "deployment id neighbor neighbor_type community";
 
                 leaf deployment {
                     type string {
@@ -82,18 +199,35 @@ module sonic-bgp-allowed-prefix {
                     description "BGP allowed prefix list deployment id";
                 }
 
+                leaf neighbor {
+                    type string {
+                        pattern "NEIGHBOR_TYPE";
+                    }
+                    description "BGP allowed prefix list neighbor";
+                }
+
+                leaf neighbor_type {
+                    type string;
+                    description "BGP allowed prefix list neighbor type";
+                }
+
+                leaf community {
+                    type string;
+                    description "BGP allowed prefix list deployment community";
+                }
+
                 leaf default_action {
                     type rpolsets:routing-policy-action-type;
                     description "Permit/Deny action for BGP allow prefix list";
                 }
 
                 leaf-list prefixes_v4 {
-                    type inet:ipv4-prefix;
+                    type bgp-allowed-ipv4-prefix;
                     description "BGP V4 allowed prefix list";
                 }
 
                 leaf-list prefixes_v6 {
-                    type inet:ipv6-prefix;
+                    type bgp-allowed-ipv6-prefix;
                     description "BGP V6 allowed prefix list";
                 }
             }

From 482fcc0a1e1c39306665a3f1699fe6ce7f0d84c8 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 21 Nov 2024 19:01:00 +0800
Subject: [PATCH 243/364] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#20878)

#### Why I did it
src/sonic-platform-daemons
```
* b276e41 - (HEAD -> master, origin/master, origin/HEAD) [SmartSwitch] Extend implementation of the DPU chassis daemon. (#563) (9 hours ago) [Oleksandr Ivantsiv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index e77218381d4d..b276e415d85f 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit e77218381d4d67c2ac89873e0ce47f32a186c121
+Subproject commit b276e415d85f3e8a7c64532d95821c9000c9418d

From 290316ff1022b87cfb624c4be09de7eac0b5ac0e Mon Sep 17 00:00:00 2001
From: Pavan Prakash <120486223+Pavan-Nokia@users.noreply.github.com>
Date: Thu, 21 Nov 2024 12:19:44 -0500
Subject: [PATCH 244/364] [Nokia-7215][Nokia-7215-A1] Update EZB files (#20838)

Update EZB files to version 1.09 to support SAI 1.14.0.2 for ac3x(armhf)
Update EZB files to version 1.09 to support SAI 1.14.0.3 for ac5x(arm64)
---
 .../Nokia-7215-A1/ASK-Board-AC5X-xb.md5       |   2 +-
 .../Nokia-7215-A1/ASK-Board-AC5X-xb.xml       | 106 +++++---------
 .../Nokia-7215-A1/ASK-L1-AC5X-xb.md5          |   2 +-
 .../Nokia-7215-A1/ASK-L1-AC5X-xb.xml          | 131 +++++++++++++++++-
 .../Nokia-7215-A1/ASK-PP-AC5X-xb.md5          |   2 +-
 .../Nokia-7215-A1/ASK-PP-AC5X-xb.xml          |   2 +-
 .../Nokia-7215-A1/SAI-AC5X-xb.md5             |   2 +-
 .../Nokia-7215-A1/SAI-AC5X-xb.xml             |   6 +-
 .../Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5   |   2 +-
 .../Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml   | 100 ++++---------
 .../Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5   |   2 +-
 .../Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml   |  43 +++++-
 .../Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5   |   2 +-
 .../Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml   |  43 +++++-
 .../Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5      |   2 +-
 .../Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml      |   2 +-
 .../Nokia-7215/SAI-M0-48x1G-4x10G.md5         |   2 +-
 .../Nokia-7215/SAI-M0-48x1G-4x10G.xml         |   2 +-
 18 files changed, 289 insertions(+), 164 deletions(-)

diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5
index d38f07fac66d..118ea62d5a49 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5
@@ -1 +1 @@
-f3d3345bef9c6ac4eea19c6170e92970
\ No newline at end of file
+7333f3669bbbd18bcc3890028d7afb39
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml
index 6f615816bf42..580801234732 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-06-05-1.08" profile="Askboard" sid="9396a3c9-f447-4460-bd9f-7d0c21ca4d16">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-09-24-1.09" profile="Askboard" sid="f5800f14-68b6-4eed-bd32-d93056a9feef">
   <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
     <askboardplt:typedefs>
       <askboardplt:typedef>
@@ -148,96 +148,40 @@
           <askboardplt:description>No Phy</askboardplt:description>
           <askboardplt:value>0</askboardplt:value>
         </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E1543</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E1543, used for Combo ports.</askboardplt:description>
-          <askboardplt:value>1</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E1545</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E1545, used for Copper GE with MAC on PHY support.</askboardplt:description>
-          <askboardplt:value>2</askboardplt:value>
-        </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E1680</askboardplt:name>
           <askboardplt:description>Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
-          <askboardplt:value>3</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E151X</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E151X, used for Copper (HW supports combo and fiber).</askboardplt:description>
-          <askboardplt:value>4</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E3140</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G.
-Uses with FW SolarFlare next generation.</askboardplt:description>
-          <askboardplt:value>5</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E3240</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G.
-Uses with FW, SolarFlare next generation.</askboardplt:description>
-          <askboardplt:value>6</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E3680</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E3680, used for Octal Copper 100M.</askboardplt:description>
-          <askboardplt:value>7</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E3220</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G.
-Uses FW, SolarFlare next generation.</askboardplt:description>
-          <askboardplt:value>8</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E1680L</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E1680L, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
-          <askboardplt:value>9</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E33X0</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E33X0, used for MGIG Combo.</askboardplt:description>
-          <askboardplt:value>10</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E1548</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E1548, used for Fiber GE.</askboardplt:description>
-          <askboardplt:value>11</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E20X0</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E20X0, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
-          <askboardplt:value>12</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E1512</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E1512, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
-          <askboardplt:value>13</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E2180</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E2180, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
-          <askboardplt:value>14</askboardplt:value>
+          <askboardplt:value>1</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E1780</askboardplt:name>
           <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
 Efficient Ethernet Transceiver</askboardplt:description>
-          <askboardplt:value>15</askboardplt:value>
+          <askboardplt:value>2</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E2540</askboardplt:name>
           <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
 Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
-          <askboardplt:value>16</askboardplt:value>
+          <askboardplt:value>3</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E2580</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+          <askboardplt:description>Specifies PHY identifier 88E2580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
 with IEEE 1588v2 PTP Support</askboardplt:description>
-          <askboardplt:value>17</askboardplt:value>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2780</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2780, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-MVCUE1786</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier alaska V MV-CUE 1786, Octal 100/1000BASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
         </askboardplt:enum>
       </askboardplt:typedef>
       <askboardplt:typedef>
@@ -699,6 +643,20 @@ lowercase characters.</askboardplt:description>
           <askboardplt:value>2</askboardplt:value>
         </askboardplt:enum>
       </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>mpp-num-type</askboardplt:name>
+        <askboardplt:type>uint8</askboardplt:type>
+        <askboardplt:description>Specifies the MPP pin number.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>63</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>mpp-select-type</askboardplt:name>
+        <askboardplt:type>uint8</askboardplt:type>
+        <askboardplt:description>Specifies the MPP pin value.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>15</askboardplt:max>
+      </askboardplt:typedef>
     </askboardplt:typedefs>
     <askboardplt:ASIC_Type askboardplt:type="asic-type">ASIC_AC5X</askboardplt:ASIC_Type>
     <askboardplt:boardName askboardplt:type="std-string">AC5X-xb</askboardplt:boardName>
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5
index 1d7a5566018a..40176ed8e3f3 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5
@@ -1 +1 @@
-4ad719e69b522db7ee969da2894cb04a
\ No newline at end of file
+1f97e3150eec3a7ee6f56f51f9229db3
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml
index 7789d25115e7..9e377e9cfb1e 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml
@@ -1,7 +1,27 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-06-05-1.08" profile="Askl1" sid="d7694ab8-0eab-47cd-82ce-10074030f449">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-09-24-1.09" profile="Askl1" sid="46b72b06-f2b0-4910-a4a3-b77166e84219">
   <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
     <ASKL1plt:typedefs>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>asic-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>ASIC Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ASIC_AC3X</ASKL1plt:name>
+          <ASKL1plt:description>AC3X</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ASIC_AC5X</ASKL1plt:name>
+          <ASKL1plt:description>AC5X</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ASIC_Falcon</ASKL1plt:name>
+          <ASKL1plt:description>FALCON</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
       <ASKL1plt:typedef>
         <ASKL1plt:name>interface-mode-type</ASKL1plt:name>
         <ASKL1plt:type>enumeration</ASKL1plt:type>
@@ -479,6 +499,26 @@
           <ASKL1plt:value>5</ASKL1plt:value>
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>phy-serdes-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Phy Serdes Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>No serdes</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C28G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C28G</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
       <ASKL1plt:typedef>
         <ASKL1plt:name>port-interconnect-profile-type</ASKL1plt:name>
         <ASKL1plt:type>enumeration</ASKL1plt:type>
@@ -500,6 +540,7 @@
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
     </ASKL1plt:typedefs>
+    <ASKL1plt:ASIC_Type ASKL1plt:type="asic-type">ASIC_AC5X</ASKL1plt:ASIC_Type>
     <ASKL1plt:IfModeName>
       <ASKL1plt:ifModeNameList>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
@@ -549,6 +590,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">0</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">COMPHY</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -566,11 +608,18 @@
             <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
             <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">1</ASKL1plt:tx-param-uint32-value>
           </ASKL1plt:txParams-list>
+          <ASKL1plt:phySysSideTxParams-comphy>
+            <ASKL1plt:enableTxParams ASKL1plt:type="boolean-type">true</ASKL1plt:enableTxParams>
+            <ASKL1plt:pre ASKL1plt:type="uint8">0</ASKL1plt:pre>
+            <ASKL1plt:main ASKL1plt:type="uint8">25</ASKL1plt:main>
+            <ASKL1plt:post ASKL1plt:type="uint8">0</ASKL1plt:post>
+          </ASKL1plt:phySysSideTxParams-comphy>
         </ASKL1plt:laneList-list>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">1</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -578,6 +627,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">2</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -585,6 +635,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">3</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -592,6 +643,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">4</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -599,6 +651,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">5</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -606,6 +659,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">6</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -613,6 +667,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">7</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -620,6 +675,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">8</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">COMPHY</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -637,11 +693,18 @@
             <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
             <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">5</ASKL1plt:tx-param-uint32-value>
           </ASKL1plt:txParams-list>
+          <ASKL1plt:phySysSideTxParams-comphy>
+            <ASKL1plt:enableTxParams ASKL1plt:type="boolean-type">true</ASKL1plt:enableTxParams>
+            <ASKL1plt:pre ASKL1plt:type="uint8">0</ASKL1plt:pre>
+            <ASKL1plt:main ASKL1plt:type="uint8">24</ASKL1plt:main>
+            <ASKL1plt:post ASKL1plt:type="uint8">0</ASKL1plt:post>
+          </ASKL1plt:phySysSideTxParams-comphy>
         </ASKL1plt:laneList-list>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">9</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -649,6 +712,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">10</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -656,6 +720,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">11</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -663,6 +728,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">12</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -670,6 +736,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">13</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -677,6 +744,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">14</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -684,6 +752,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">15</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -691,6 +760,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">16</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">COMPHY</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -708,11 +778,18 @@
             <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
             <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">9</ASKL1plt:tx-param-uint32-value>
           </ASKL1plt:txParams-list>
+          <ASKL1plt:phySysSideTxParams-comphy>
+            <ASKL1plt:enableTxParams ASKL1plt:type="boolean-type">true</ASKL1plt:enableTxParams>
+            <ASKL1plt:pre ASKL1plt:type="uint8">0</ASKL1plt:pre>
+            <ASKL1plt:main ASKL1plt:type="uint8">24</ASKL1plt:main>
+            <ASKL1plt:post ASKL1plt:type="uint8">0</ASKL1plt:post>
+          </ASKL1plt:phySysSideTxParams-comphy>
         </ASKL1plt:laneList-list>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">17</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -720,6 +797,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">18</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -727,6 +805,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">19</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -734,6 +813,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">20</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -741,6 +821,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">21</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -748,6 +829,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">22</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -755,6 +837,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">23</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -762,6 +845,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">24</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">COMPHY</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -779,11 +863,18 @@
             <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
             <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">10</ASKL1plt:tx-param-uint32-value>
           </ASKL1plt:txParams-list>
+          <ASKL1plt:phySysSideTxParams-comphy>
+            <ASKL1plt:enableTxParams ASKL1plt:type="boolean-type">true</ASKL1plt:enableTxParams>
+            <ASKL1plt:pre ASKL1plt:type="uint8">0</ASKL1plt:pre>
+            <ASKL1plt:main ASKL1plt:type="uint8">24</ASKL1plt:main>
+            <ASKL1plt:post ASKL1plt:type="uint8">0</ASKL1plt:post>
+          </ASKL1plt:phySysSideTxParams-comphy>
         </ASKL1plt:laneList-list>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">25</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -791,6 +882,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">26</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -798,6 +890,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">27</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -805,6 +898,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">28</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -812,6 +906,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">29</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -819,6 +914,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">30</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -826,6 +922,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">31</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -833,6 +930,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">32</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">COMPHY</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -850,11 +948,18 @@
             <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
             <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">14</ASKL1plt:tx-param-uint32-value>
           </ASKL1plt:txParams-list>
+          <ASKL1plt:phySysSideTxParams-comphy>
+            <ASKL1plt:enableTxParams ASKL1plt:type="boolean-type">true</ASKL1plt:enableTxParams>
+            <ASKL1plt:pre ASKL1plt:type="uint8">0</ASKL1plt:pre>
+            <ASKL1plt:main ASKL1plt:type="uint8">23</ASKL1plt:main>
+            <ASKL1plt:post ASKL1plt:type="uint8">0</ASKL1plt:post>
+          </ASKL1plt:phySysSideTxParams-comphy>
         </ASKL1plt:laneList-list>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">33</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -862,6 +967,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">34</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -869,6 +975,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">35</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -876,6 +983,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">36</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -883,6 +991,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">37</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -890,6 +999,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">38</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -897,6 +1007,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">39</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -904,6 +1015,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">40</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">COMPHY</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -921,11 +1033,18 @@
             <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
             <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">11</ASKL1plt:tx-param-uint32-value>
           </ASKL1plt:txParams-list>
+          <ASKL1plt:phySysSideTxParams-comphy>
+            <ASKL1plt:enableTxParams ASKL1plt:type="boolean-type">true</ASKL1plt:enableTxParams>
+            <ASKL1plt:pre ASKL1plt:type="uint8">0</ASKL1plt:pre>
+            <ASKL1plt:main ASKL1plt:type="uint8">23</ASKL1plt:main>
+            <ASKL1plt:post ASKL1plt:type="uint8">0</ASKL1plt:post>
+          </ASKL1plt:phySysSideTxParams-comphy>
         </ASKL1plt:laneList-list>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">41</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -933,6 +1052,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">42</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -940,6 +1060,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">43</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -947,6 +1068,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">44</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -954,6 +1076,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">45</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -961,6 +1084,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">46</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -968,6 +1092,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">47</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -975,6 +1100,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">48</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -997,6 +1123,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">49</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -1019,6 +1146,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">50</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
@@ -1041,6 +1169,7 @@
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">51</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
+        <ASKL1plt:phySysSideSerdes ASKL1plt:type="phy-serdes-type">NA</ASKL1plt:phySysSideSerdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
         <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5
index 5c1c480ebb3e..fc68f9ae33ba 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5
@@ -1 +1 @@
-7ca6eaf67da8ee4c5b2a4f480db8919f
\ No newline at end of file
+306e882317520250db0161d1cf4c8a3b
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml
index 13b344d6b964..f15449bd5e26 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-06-05-1.08" profile="Askpp" dsig="md5" sid="4cd9a9b8-0123-48b5-a955-6a5c64917f70">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-09-24-1.09" profile="Askpp" sid="6abefd8a-3345-40a7-b180-4e9375f341df">
   <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
     <askppplt:typedefs>
       <askppplt:typedef>
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5
index 7d2cfc524b98..3d57599d00fc 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5
@@ -1 +1 @@
-751d5fb74a0861240aa86afad8ad13ef
\ No newline at end of file
+05614f693742dfda5c7140c186516f0c
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml
index 91246fc35848..be2b470f78cc 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-06-05-1.08" profile="SAI" dsig="md5" sid="daa51f10-6b7d-424f-ab07-3c51ae064e20">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-09-24-1.09" profile="SAI" sid="b48431f8-351b-4524-babb-1ce99b72cd68">
   <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
     <SAIplt:typedefs>
       <SAIplt:typedef>
@@ -444,6 +444,10 @@
     <SAIplt:Counters>
       <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
       <SAIplt:router-in-drop-counter SAIplt:type="InDropCounter-type">ROUTE_BLACKHOLE</SAIplt:router-in-drop-counter>
+      <SAIplt:Queue-counter>
+        <SAIplt:queue-pass-drop-counter SAIplt:type="Feature-enable">Disabled</SAIplt:queue-pass-drop-counter>
+        <SAIplt:queue-watermark-counter SAIplt:type="Feature-enable">Disabled</SAIplt:queue-watermark-counter>
+      </SAIplt:Queue-counter>
     </SAIplt:Counters>
     <SAIplt:Logging>
       <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5
index 5422b86a598d..06fdcf8c4669 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5
@@ -1 +1 @@
-d7069397e7466efe2bd6cf4a952b56db
\ No newline at end of file
+7b9a2fb849b5bd8caa70e2e7cc5aca02
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml
index efb1432c65de..ee9245c49aa8 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-05-22-1.08" profile="Askboard" sid="9396a3c9-f447-4460-bd9f-7d0c21ca4d16">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-09-04-1.09" profile="Askboard" sid="f5800f14-68b6-4eed-bd32-d93056a9feef">
   <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
     <askboardplt:typedefs>
       <askboardplt:typedef>
@@ -148,96 +148,34 @@
           <askboardplt:description>No Phy</askboardplt:description>
           <askboardplt:value>0</askboardplt:value>
         </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E1543</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E1543, used for Combo ports.</askboardplt:description>
-          <askboardplt:value>1</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E1545</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E1545, used for Copper GE with MAC on PHY support.</askboardplt:description>
-          <askboardplt:value>2</askboardplt:value>
-        </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E1680</askboardplt:name>
           <askboardplt:description>Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
-          <askboardplt:value>3</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E151X</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E151X, used for Copper (HW supports combo and fiber).</askboardplt:description>
-          <askboardplt:value>4</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E3140</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G.
-Uses with FW SolarFlare next generation.</askboardplt:description>
-          <askboardplt:value>5</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E3240</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G.
-Uses with FW, SolarFlare next generation.</askboardplt:description>
-          <askboardplt:value>6</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E3680</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E3680, used for Octal Copper 100M.</askboardplt:description>
-          <askboardplt:value>7</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E3220</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G.
-Uses FW, SolarFlare next generation.</askboardplt:description>
-          <askboardplt:value>8</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E1680L</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E1680L, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
-          <askboardplt:value>9</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E33X0</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E33X0, used for MGIG Combo.</askboardplt:description>
-          <askboardplt:value>10</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E1548</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E1548, used for Fiber GE.</askboardplt:description>
-          <askboardplt:value>11</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E20X0</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E20X0, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
-          <askboardplt:value>12</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E1512</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E1512, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
-          <askboardplt:value>13</askboardplt:value>
-        </askboardplt:enum>
-        <askboardplt:enum>
-          <askboardplt:name>alaska-88E2180</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E2180, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
-          <askboardplt:value>14</askboardplt:value>
+          <askboardplt:value>1</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E1780</askboardplt:name>
           <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
 Efficient Ethernet Transceiver</askboardplt:description>
-          <askboardplt:value>15</askboardplt:value>
+          <askboardplt:value>2</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E2540</askboardplt:name>
           <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
 Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
-          <askboardplt:value>16</askboardplt:value>
+          <askboardplt:value>3</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E2580</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+          <askboardplt:description>Specifies PHY identifier 88E2580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
 with IEEE 1588v2 PTP Support</askboardplt:description>
-          <askboardplt:value>17</askboardplt:value>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2780</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2780, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
         </askboardplt:enum>
       </askboardplt:typedef>
       <askboardplt:typedef>
@@ -699,6 +637,20 @@ lowercase characters.</askboardplt:description>
           <askboardplt:value>2</askboardplt:value>
         </askboardplt:enum>
       </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>mpp-num-type</askboardplt:name>
+        <askboardplt:type>uint8</askboardplt:type>
+        <askboardplt:description>Specifies the MPP pin number.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>63</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>mpp-select-type</askboardplt:name>
+        <askboardplt:type>uint8</askboardplt:type>
+        <askboardplt:description>Specifies the MPP pin value.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>15</askboardplt:max>
+      </askboardplt:typedef>
     </askboardplt:typedefs>
     <askboardplt:ASIC_Type askboardplt:type="asic-type">ASIC_AC3X</askboardplt:ASIC_Type>
     <askboardplt:boardName askboardplt:type="std-string">M0-48x1G-4x10G</askboardplt:boardName>
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5
index a232c8381527..ad15b12a8670 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5
@@ -1 +1 @@
-bf932ba262c96acdfe677bd5078a21d7
\ No newline at end of file
+feeec405a324a0c99f1078bfad4ca512
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml
index f1cc5989dddb..4dd22e0b3cdc 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml
@@ -1,7 +1,27 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-05-22-1.08" profile="Askl1" sid="d7694ab8-0eab-47cd-82ce-10074030f449">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-09-04-1.09" profile="Askl1" sid="46b72b06-f2b0-4910-a4a3-b77166e84219">
   <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
     <ASKL1plt:typedefs>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>asic-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>ASIC Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ASIC_AC3X</ASKL1plt:name>
+          <ASKL1plt:description>AC3X</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ASIC_AC5X</ASKL1plt:name>
+          <ASKL1plt:description>AC5X</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ASIC_Falcon</ASKL1plt:name>
+          <ASKL1plt:description>FALCON</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
       <ASKL1plt:typedef>
         <ASKL1plt:name>interface-mode-type</ASKL1plt:name>
         <ASKL1plt:type>enumeration</ASKL1plt:type>
@@ -479,6 +499,26 @@
           <ASKL1plt:value>5</ASKL1plt:value>
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>phy-serdes-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Phy Serdes Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>No serdes</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C28G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C28G</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
       <ASKL1plt:typedef>
         <ASKL1plt:name>port-interconnect-profile-type</ASKL1plt:name>
         <ASKL1plt:type>enumeration</ASKL1plt:type>
@@ -500,6 +540,7 @@
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
     </ASKL1plt:typedefs>
+    <ASKL1plt:ASIC_Type ASKL1plt:type="asic-type">ASIC_AC3X</ASKL1plt:ASIC_Type>
     <ASKL1plt:IfModeName>
       <ASKL1plt:ifModeNameList>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5
index 2e3f0e0342dd..74bca52a8a86 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5
@@ -1 +1 @@
-bb2f27ac93e33103554948dee6f3a1f1
\ No newline at end of file
+07f3a60faed5eda425dec39f7198aaaa
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml
index 30c2712f2a37..adaa9ebc0b70 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml
@@ -1,7 +1,27 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-05-22-1.08" profile="Askl1" sid="d7694ab8-0eab-47cd-82ce-10074030f449">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-09-04-1.09" profile="Askl1" sid="46b72b06-f2b0-4910-a4a3-b77166e84219">
   <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
     <ASKL1plt:typedefs>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>asic-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>ASIC Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ASIC_AC3X</ASKL1plt:name>
+          <ASKL1plt:description>AC3X</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ASIC_AC5X</ASKL1plt:name>
+          <ASKL1plt:description>AC5X</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ASIC_Falcon</ASKL1plt:name>
+          <ASKL1plt:description>FALCON</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
       <ASKL1plt:typedef>
         <ASKL1plt:name>interface-mode-type</ASKL1plt:name>
         <ASKL1plt:type>enumeration</ASKL1plt:type>
@@ -479,6 +499,26 @@
           <ASKL1plt:value>5</ASKL1plt:value>
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>phy-serdes-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Phy Serdes Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>No serdes</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C28G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C28G</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
       <ASKL1plt:typedef>
         <ASKL1plt:name>port-interconnect-profile-type</ASKL1plt:name>
         <ASKL1plt:type>enumeration</ASKL1plt:type>
@@ -500,6 +540,7 @@
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
     </ASKL1plt:typedefs>
+    <ASKL1plt:ASIC_Type ASKL1plt:type="asic-type">ASIC_AC3X</ASKL1plt:ASIC_Type>
     <ASKL1plt:IfModeName>
       <ASKL1plt:ifModeNameList>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5
index 410763693907..4e2aeb92348d 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5
@@ -1 +1 @@
-411f788b1a253e5ad2e0e9026d0bb1aa
\ No newline at end of file
+da1aa11a8d24bf8e2d3eae6fb57958a9
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml
index fe782eb5ce97..05996a7be9d9 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-05-22-1.08" profile="Askpp" sid="4cd9a9b8-0123-48b5-a955-6a5c64917f70">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-09-04-1.09" profile="Askpp" sid="6abefd8a-3345-40a7-b180-4e9375f341df">
   <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
     <askppplt:typedefs>
       <askppplt:typedef>
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5
index 97def7a90484..1b371a8aceeb 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5
@@ -1 +1 @@
-e56672c96f9a00b3652bdbe8a4ec4a23
\ No newline at end of file
+70389c5db569f7a77c09393a4df21603
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml
index 43dde6b94705..686612b88db2 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-05-22-1.08" profile="SAI" sid="daa51f10-6b7d-424f-ab07-3c51ae064e20">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-09-04-1.09" profile="SAI" sid="b48431f8-351b-4524-babb-1ce99b72cd68">
   <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
     <SAIplt:typedefs>
       <SAIplt:typedef>

From 47dc2950caf4c9ed525f418a828151a4a110a15f Mon Sep 17 00:00:00 2001
From: Divya Kumaran Chandralekha
 <66686927+divyachandralekha@users.noreply.github.com>
Date: Thu, 21 Nov 2024 23:12:15 +0530
Subject: [PATCH 245/364] sonic-stp repo url modified in .gitmodules (#20884)

* Add stp submodule

* Changing the sonic-stp repo url
---
 .gitmodules | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.gitmodules b/.gitmodules
index b833cadbb408..050d14baf3aa 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -129,4 +129,4 @@
 	url = https://github.com/Marvell-switching/sonic-platform-marvell
 [submodule "src/sonic-stp"]
 	path = src/sonic-stp
-	url = https://github.com/Azure/sonic-stp
+	url = https://github.com/sonic-net/sonic-stp

From 4a7e64048268a794242b7142049a68fdeb548da0 Mon Sep 17 00:00:00 2001
From: Rajkumar-Marvell <54936542+rajkumar38@users.noreply.github.com>
Date: Thu, 21 Nov 2024 23:30:17 +0530
Subject: [PATCH 246/364] [Marvell] Falcon 3.2T device support (#20601)

* [Marvell] Falcon 3.2T HwSku support

Signed-off-by: Rajkumar P R <rpennadamram@marvell.com>
---
 .../FC128x25G/ASK-Board-F3_2T-128x25G.md5     |    1 +
 .../FC128x25G/ASK-Board-F3_2T-128x25G.xml     | 3990 +++++++++++++++++
 .../FC128x25G/ASK-L1-F3_2T-128x25G.md5        |    1 +
 .../FC128x25G/ASK-L1-F3_2T-128x25G.xml        | 1891 ++++++++
 .../FC128x25G/ASK-PP-F3_2T-128x25G.md5        |    1 +
 .../FC128x25G/ASK-PP-F3_2T-128x25G.xml        | 1180 +++++
 .../FC128x25G/SAI-F3_2T-128x25G.md5           |    1 +
 .../FC128x25G/SAI-F3_2T-128x25G.xml           |  900 ++++
 .../FC128x25G/buffers_defaults_t0.j2          |   49 +
 .../FC128x25G/buffers_defaults_t1.j2          |   49 +
 .../create_only_config_db_buffers.json        |    7 +
 .../FC128x25G/hwsku.json                      |  204 +
 .../FC128x25G/port_config.ini                 |  131 +
 .../FC128x25G/profile.ini                     |    1 +
 .../FC128x25G/sai.profile                     |    4 +
 .../ASK-Board-F3_2T-128x25G.md5               |    1 +
 .../ASK-Board-F3_2T-128x25G.xml               | 3990 +++++++++++++++++
 .../db98cx8522_10cc/ASK-L1-F3_2T-128x25G.md5  |    1 +
 .../db98cx8522_10cc/ASK-L1-F3_2T-128x25G.xml  | 1891 ++++++++
 .../db98cx8522_10cc/ASK-PP-F3_2T-128x25G.md5  |    1 +
 .../db98cx8522_10cc/ASK-PP-F3_2T-128x25G.xml  | 1180 +++++
 .../db98cx8522_10cc/SAI-F3_2T-128x25G.md5     |    1 +
 .../db98cx8522_10cc/SAI-F3_2T-128x25G.xml     |  900 ++++
 .../db98cx8522_10cc/buffers.json.j2           |    2 +
 .../db98cx8522_10cc/buffers_defaults_t0.j2    |   49 +
 .../db98cx8522_10cc/buffers_defaults_t1.j2    |   49 +
 .../create_only_config_db_buffers.json        |    7 +
 .../db98cx8522_10cc/hwsku.json                |  204 +
 .../db98cx8522_10cc/port_config.ini           |  131 +
 .../db98cx8522_10cc/profile.ini               |    1 +
 .../db98cx8522_10cc/qos.json.j2               |    1 +
 .../db98cx8522_10cc/sai.profile               |    4 +
 .../default_sku                               |    1 +
 .../platform.json                             |  146 +
 .../platform_asic                             |    1 +
 .../pmon_daemon_control.json                  |    8 +
 .../system_health_monitoring_config.json      |   10 +
 platform/marvell/mrvl-prestera                |    2 +-
 platform/marvell/one-image.mk                 |    1 +
 platform/marvell/platform-marvell.mk          |    3 +
 platform/marvell/sonic-platform-marvell       |    2 +-
 41 files changed, 16995 insertions(+), 2 deletions(-)
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-Board-F3_2T-128x25G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-Board-F3_2T-128x25G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-L1-F3_2T-128x25G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-L1-F3_2T-128x25G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-PP-F3_2T-128x25G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-PP-F3_2T-128x25G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/SAI-F3_2T-128x25G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/SAI-F3_2T-128x25G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/buffers_defaults_t0.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/buffers_defaults_t1.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/create_only_config_db_buffers.json
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/hwsku.json
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/port_config.ini
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/profile.ini
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/sai.profile
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-Board-F3_2T-128x25G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-Board-F3_2T-128x25G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-L1-F3_2T-128x25G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-L1-F3_2T-128x25G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-PP-F3_2T-128x25G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-PP-F3_2T-128x25G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/SAI-F3_2T-128x25G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/SAI-F3_2T-128x25G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers.json.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers_defaults_t0.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers_defaults_t1.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/create_only_config_db_buffers.json
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/hwsku.json
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/port_config.ini
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/profile.ini
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/qos.json.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/sai.profile
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/default_sku
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform.json
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform_asic
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/pmon_daemon_control.json
 create mode 100644 device/marvell/x86_64-marvell_db98cx8522_10cc-r0/system_health_monitoring_config.json

diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-Board-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-Board-F3_2T-128x25G.md5
new file mode 100644
index 000000000000..b9aabeb8706b
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-Board-F3_2T-128x25G.md5
@@ -0,0 +1 @@
+e48527ad3f7bc5db09ec1fe078eba9a1
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-Board-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-Board-F3_2T-128x25G.xml
new file mode 100644
index 000000000000..80434c00be65
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-Board-F3_2T-128x25G.xml
@@ -0,0 +1,3990 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-09-24-1.09" profile="Askboard" sid="f5800f14-68b6-4eed-bd32-d93056a9feef">
+  <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
+    <askboardplt:typedefs>
+      <askboardplt:typedef>
+        <askboardplt:name>std-string</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>standard string.</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>100</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-callback-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies os/ext drv callback types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>linux-static</askboardplt:name>
+          <askboardplt:description>Linux Static</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>linux-shared</askboardplt:name>
+          <askboardplt:description>Linux Shared Lib mode</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>External Os</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>freeBsd</askboardplt:name>
+          <askboardplt:description>Free BSD</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-map-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies pci info types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>fixed</askboardplt:name>
+          <askboardplt:description>Fixed</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>autoscan</askboardplt:name>
+          <askboardplt:description>Auto scan</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-interface-channel-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies channel interface type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pci</askboardplt:name>
+          <askboardplt:description>PCI</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>smi</askboardplt:name>
+          <askboardplt:description>SMI</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>twsi</askboardplt:name>
+          <askboardplt:description>TWSI</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-as-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies Address space type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>4_regions</askboardplt:name>
+          <askboardplt:description>address-space 4 regions</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>8_regions</askboardplt:name>
+          <askboardplt:description>address-space 8 regions</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>atu</askboardplt:name>
+          <askboardplt:description>address translation unit</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>device-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Device ID 0..1</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-mapping-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies port map type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ethernet_mac</askboardplt:name>
+          <askboardplt:description>ETHERNET_MAC</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cpu_sdma</askboardplt:name>
+          <askboardplt:description>CPU_SDMA</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>interface-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Interface number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>txq-port-number-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>TXq port number </askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>99</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-smi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy SMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>3</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-xsmi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy XSMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>15</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the PHY Part Identifier.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>NA</askboardplt:name>
+          <askboardplt:description>No Phy</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1780</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
+Efficient Ethernet Transceiver</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2540</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
+Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2580</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2780</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2780, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>physical-port-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>PHYSICAL PORT NUM</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-port-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the ledstream port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_TRI_SPEED</askboardplt:name>
+          <askboardplt:description>tri-speed port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_XG</askboardplt:name>
+          <askboardplt:description>XG port.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink select type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_0</askboardplt:name>
+          <askboardplt:description>Blink 0 signal.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_1</askboardplt:name>
+          <askboardplt:description>Blink 1 signal</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-order-mode-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream ordering mode.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_PORT</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_CLASS</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by class.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duty-cycle-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_0</askboardplt:name>
+          <askboardplt:description>25% on, 75% off.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_1</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_2</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_3</askboardplt:name>
+          <askboardplt:description>75% on, 25% off.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duration-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink period type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_0</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_0.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_1</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_2</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_3</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_4</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_5</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: xCat3; AC5; Lion2; Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe) .</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_7</askboardplt:name>
+          <askboardplt:description>APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-pulse-stretch-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream length of stretching for dynamic signals.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_0_NO</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_0_NO.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_1</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_2</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_3</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_4</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_5</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_7</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-out-frequency-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>_CLOCK_OUT_FREQUENCY_500</askboardplt:name>
+          <askboardplt:description>500 KHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_1000</askboardplt:name>
+          <askboardplt:description>1 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_2000</askboardplt:name>
+          <askboardplt:description>2 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_3000</askboardplt:name>
+          <askboardplt:description>3 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class5-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class5 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_HALF_DUPLEX</askboardplt:name>
+          <askboardplt:description>Half Duplex is displayed on class5.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_FIBER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Fiber Link Up is displayed on class5.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class13-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class13 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_LINK_DOWN</askboardplt:name>
+          <askboardplt:description>Link Down is displayed on class13.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_COPPER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Copper Link Up is displayed on class13.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-class-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Class number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>boolean-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Boolean 32 bits , due to bing endian</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>false</askboardplt:name>
+          <askboardplt:description>False</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>true</askboardplt:name>
+          <askboardplt:description>True</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bus-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bus Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>function-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Function Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>domain-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Domain, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led interface</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-position-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led position</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>63</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>serdes-lane-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>serdes lane</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>7</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>cpu-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The CPU Internal/External</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>Extrenal connected CPU</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>internal</askboardplt:name>
+          <askboardplt:description>Internal CPU</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-frequency-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Clock Frequency Sip6</askboardplt:description>
+        <askboardplt:min>500</askboardplt:min>
+        <askboardplt:max>80000</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-or-no-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units, 0 for no Unit</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-group-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Group</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-force-data-type</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>A hexadecimal string with octets represented as hex digits
+separated by colons.  The canonical representation uses
+lowercase characters.</askboardplt:description>
+        <askboardplt:min>3</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit range 0..31</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>31</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-size-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit leng 1..32</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>32</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-sip-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The LED scehme</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>na</askboardplt:name>
+          <askboardplt:description>NA</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip5</askboardplt:name>
+          <askboardplt:description>SIP5: AC3x</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip6</askboardplt:name>
+          <askboardplt:description>SIP6: Falcon, AC5x</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_1_WORD</askboardplt:name>
+          <askboardplt:description>DSA Regular</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_2_WORDS</askboardplt:name>
+          <askboardplt:description>DSA Extended</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>NETWORK</askboardplt:name>
+          <askboardplt:description>Network.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_3_WORDS</askboardplt:name>
+          <askboardplt:description>DSA 3 Words</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_4_WORD</askboardplt:name>
+          <askboardplt:description>DSA 4 Words</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Specifies the Cascade Trunk id.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>127</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>cscdPort</askboardplt:name>
+          <askboardplt:description>Cascade port</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cscdTrunk</askboardplt:name>
+          <askboardplt:description>Csacde trunk</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>hash-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the hash used by cascade trunk.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pkt</askboardplt:name>
+          <askboardplt:description>Hash based on packet</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>srcPort</askboardplt:name>
+          <askboardplt:description>Hash based on source port</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>asic-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>ASIC Type</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC3X</askboardplt:name>
+          <askboardplt:description>AC3X</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC5X</askboardplt:name>
+          <askboardplt:description>AC5X</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_Falcon</askboardplt:name>
+          <askboardplt:description>FALCON</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>mpp-num-type</askboardplt:name>
+        <askboardplt:type>uint8</askboardplt:type>
+        <askboardplt:description>Specifies the MPP pin number.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>63</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>mpp-select-type</askboardplt:name>
+        <askboardplt:type>uint8</askboardplt:type>
+        <askboardplt:description>Specifies the MPP pin value.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>15</askboardplt:max>
+      </askboardplt:typedef>
+    </askboardplt:typedefs>
+    <askboardplt:ASIC_Type askboardplt:type="asic-type">ASIC_Falcon</askboardplt:ASIC_Type>
+    <askboardplt:boardName askboardplt:type="std-string">Falcon-3.2T-128x25G</askboardplt:boardName>
+    <askboardplt:osCallType askboardplt:type="board-callback-type">linux-static</askboardplt:osCallType>
+    <askboardplt:extDrvCallType askboardplt:type="board-callback-type">linux-static</askboardplt:extDrvCallType>
+    <askboardplt:mapType askboardplt:type="board-pp-map-type">autoscan</askboardplt:mapType>
+    <askboardplt:cpuType askboardplt:type="cpu-type">external</askboardplt:cpuType>
+    <askboardplt:mngInterfaceType askboardplt:type="board-pp-interface-channel-type">pci</askboardplt:mngInterfaceType>
+    <askboardplt:adressSpaceType askboardplt:type="board-pp-as-type">atu</askboardplt:adressSpaceType>
+    <askboardplt:device-list>
+      <askboardplt:devNum askboardplt:type="device-id-type">0</askboardplt:devNum>
+      <askboardplt:deviceId askboardplt:type="device-id-type">0</askboardplt:deviceId>
+      <askboardplt:pp-profile-name askboardplt:type="std-string">ASK-PP-F3_2T-128x25G.xml</askboardplt:pp-profile-name>
+      <askboardplt:L1-profile-name askboardplt:type="std-string">ASK-L1-F3_2T-128x25G.xml</askboardplt:L1-profile-name>
+      <askboardplt:ledStreamType askboardplt:type="led-sip-type">sip6</askboardplt:ledStreamType>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">0</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">0</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">1</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">1</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">2</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">2</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">3</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">3</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">4</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">4</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">5</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">5</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">6</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">6</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">7</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">7</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">8</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">8</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">9</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">9</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">10</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">10</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">11</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">11</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">12</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">12</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">13</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">13</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">14</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">14</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">15</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">15</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">16</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">16</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">17</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">17</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">18</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">18</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">19</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">19</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">20</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">20</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">21</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">21</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">22</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">22</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">23</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">23</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">24</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">24</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">25</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">25</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">26</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">26</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">27</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">27</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">28</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">28</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">29</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">29</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">30</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">30</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">31</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">31</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">32</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">32</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">33</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">33</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">34</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">34</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">35</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">35</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">36</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">36</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">37</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">37</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">38</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">38</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">39</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">39</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">40</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">40</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">41</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">41</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">42</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">42</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">43</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">43</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">44</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">44</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">45</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">45</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">46</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">46</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">47</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">47</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">48</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">48</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">49</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">49</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">50</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">50</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">51</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">51</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">52</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">52</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">53</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">53</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">54</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">54</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">55</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">55</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">56</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">56</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">57</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">57</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">58</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">58</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">59</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">59</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">60</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">60</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">64</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">61</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">65</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">62</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">66</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">63</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">67</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">64</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">68</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">65</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">69</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">66</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">70</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">67</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">130</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">127</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">129</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">126</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">128</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">125</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">127</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">124</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">126</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">123</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">125</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">122</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">124</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">121</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">123</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">120</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">122</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">119</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">121</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">118</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">120</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">117</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">119</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">116</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">118</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">115</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">117</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">114</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">116</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">113</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">115</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">112</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">114</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">111</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">113</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">110</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">112</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">109</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">111</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">108</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">110</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">107</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">109</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">106</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">108</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">105</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">107</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">104</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">106</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">103</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">105</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">102</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">104</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">101</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">103</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">100</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">102</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">99</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">101</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">98</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">100</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">97</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">99</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">96</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">98</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">95</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">97</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">94</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">96</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">93</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">95</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">92</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">94</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">91</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">93</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">90</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">92</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">89</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">91</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">88</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">90</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">87</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">89</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">86</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">88</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">85</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">87</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">84</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">86</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">83</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">85</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">82</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">84</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">81</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">83</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">80</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">82</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">79</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">81</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">78</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">80</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">77</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">79</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">76</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">78</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">75</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">77</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">74</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">76</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">73</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">75</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">72</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">74</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">71</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">73</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">70</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">72</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">69</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">71</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">68</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">131</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">128</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">132</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">135</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">63</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">136</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">133</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">137</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">134</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">138</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">135</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">139</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">7</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">1</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">6</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">0</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">5</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">3</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">4</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">2</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">8</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">14</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">9</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">15</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">10</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">12</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">11</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">13</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">23</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">17</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">22</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">16</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">21</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">19</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">20</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">18</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">24</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">30</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">25</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">31</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">26</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">28</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">27</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">29</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">39</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">33</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">38</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">32</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">37</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">35</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">36</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">34</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">40</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">41</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">46</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">47</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">42</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">44</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">43</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">45</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">55</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">49</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">54</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">48</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">53</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">51</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">52</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">50</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">56</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">62</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">57</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">63</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">58</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">60</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">59</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">61</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">71</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">65</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">70</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">64</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">69</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">67</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">68</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">66</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">72</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">78</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">73</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">79</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">74</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">76</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">75</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">77</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">87</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">81</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">86</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">80</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">85</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">83</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">84</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">82</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">88</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">94</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">89</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">95</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">90</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">92</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">91</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">93</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">103</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">97</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">102</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">96</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">101</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">99</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">100</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">98</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">104</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">110</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">105</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">111</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">106</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">108</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">107</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">109</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">119</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">113</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">118</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">112</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">117</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">115</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">116</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">114</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">120</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">126</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">121</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">127</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">122</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">124</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">123</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">125</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">128</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">135</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:Ledstream-interface-list>
+        <askboardplt:ledstream-interface-number askboardplt:type="led-interface-type">0</askboardplt:ledstream-interface-number>
+        <askboardplt:ledstream-configSet>
+          <askboardplt:ledOrganize askboardplt:type="led-stream-order-mode-type">ORDER_MODE_BY_CLASS</askboardplt:ledOrganize>
+          <askboardplt:blink0DutyCycle askboardplt:type="led-stream-blink-duty-cycle-type">BLINK_DUTY_CYCLE_0</askboardplt:blink0DutyCycle>
+          <askboardplt:blink0Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_0</askboardplt:blink0Duration>
+          <askboardplt:blink1DutyCycle askboardplt:type="led-stream-blink-duty-cycle-type">BLINK_DUTY_CYCLE_0</askboardplt:blink1DutyCycle>
+          <askboardplt:blink1Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_1</askboardplt:blink1Duration>
+          <askboardplt:pulseStretch askboardplt:type="led-stream-pulse-stretch-type">PULSE_STRETCH_1</askboardplt:pulseStretch>
+          <askboardplt:invertEnable askboardplt:type="boolean-type">false</askboardplt:invertEnable>
+          <askboardplt:SIP6ledClockFrequency askboardplt:type="led-stream-clock-frequency-type">1627</askboardplt:SIP6ledClockFrequency>
+          <askboardplt:ledClockPosEdgeModeEnable askboardplt:type="boolean-type">false</askboardplt:ledClockPosEdgeModeEnable>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">1</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">2</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">3</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">4</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">5</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">6</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">7</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">8</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+        </askboardplt:ledstream-configSet>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">0</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">1</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">2</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">true</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">true</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">3</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">4</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">5</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+      </askboardplt:Ledstream-interface-list>
+    </askboardplt:device-list>
+    <askboardplt:UDSFilePath askboardplt:type="std-string">/tmp/cpss_uds</askboardplt:UDSFilePath>
+    <askboardplt:serdesMux>
+      <askboardplt:serdesMuxSchemePortMod askboardplt:type="uint32">8</askboardplt:serdesMuxSchemePortMod>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+    </askboardplt:serdesMux>
+  </askboardplt:ASK-Board>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-L1-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-L1-F3_2T-128x25G.md5
new file mode 100644
index 000000000000..084f63926d4c
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-L1-F3_2T-128x25G.md5
@@ -0,0 +1 @@
+baf77e7f450def2266516782d159cbb4
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-L1-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-L1-F3_2T-128x25G.xml
new file mode 100644
index 000000000000..7a2208bf90ec
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-L1-F3_2T-128x25G.xml
@@ -0,0 +1,1891 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-09-24-1.09" profile="Askl1" sid="46b72b06-f2b0-4910-a4a3-b77166e84219">
+  <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
+    <ASKL1plt:typedefs>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>asic-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>ASIC Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ASIC_AC3X</ASKL1plt:name>
+          <ASKL1plt:description>AC3X</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ASIC_AC5X</ASKL1plt:name>
+          <ASKL1plt:description>AC5X</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ASIC_Falcon</ASKL1plt:name>
+          <ASKL1plt:description>FALCON</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>interface-mode-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported Interface modes</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1000BASE_X</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G , 2.5G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>QSGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR</ASKL1plt:name>
+          <ASKL1plt:description>10G, 12G, 20G, 40G, 100G</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR</ASKL1plt:name>
+          <ASKL1plt:description>5G, 10G, 12G, 20G, 40G</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>28</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>29</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR4</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>30</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>32</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>33</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>34</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_10G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_OUSGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_OXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-speed-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported speeds</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1G</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>10G</ASKL1plt:name>
+          <ASKL1plt:description>10G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>2500M</ASKL1plt:name>
+          <ASKL1plt:description>2.5G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>5G</ASKL1plt:name>
+          <ASKL1plt:description>5G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>25G</ASKL1plt:name>
+          <ASKL1plt:description>25G, used in combination with CPSS_PORT_INTERFACE_MODE_KR_E, CPSS_PORT_INTERFACE_MODE_KR2_E</ASKL1plt:description>
+          <ASKL1plt:value>21</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>40G</ASKL1plt:name>
+          <ASKL1plt:description>40G</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>50G</ASKL1plt:name>
+          <ASKL1plt:description>50G</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>100G</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>200G</ASKL1plt:name>
+          <ASKL1plt:description>200G</ASKL1plt:description>
+          <ASKL1plt:value>24</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>400G</ASKL1plt:name>
+          <ASKL1plt:description>400G</ASKL1plt:description>
+          <ASKL1plt:value>25</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>NA</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>fec-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enabled</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>disabled</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>both_enabled</ASKL1plt:name>
+          <ASKL1plt:description>Both enabled</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_544_514_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC 544 and 514</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>physical-port-num-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>PHYSICAL PORT NUM</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>1023</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>tx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Tx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre</ASKL1plt:name>
+          <ASKL1plt:description>pre</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post</ASKL1plt:name>
+          <ASKL1plt:description>post</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>peak</ASKL1plt:name>
+          <ASKL1plt:description>peak</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>rx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dataRate</ASKL1plt:name>
+          <ASKL1plt:description>dataRate</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res1Sel</ASKL1plt:name>
+          <ASKL1plt:description>res1Sel</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res2Sel</ASKL1plt:name>
+          <ASKL1plt:description>res2Sel</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minCap</ASKL1plt:name>
+          <ASKL1plt:description>minCap</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minCapN</ASKL1plt:name>
+          <ASKL1plt:description>minCapN</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sumfBoostTargetC0</ASKL1plt:name>
+          <ASKL1plt:description>sumfBoostTargetC0</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sumfBoostTargetC1</ASKL1plt:name>
+          <ASKL1plt:description>sumfBoostTargetC1</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sumfBoostTargetC2</ASKL1plt:name>
+          <ASKL1plt:description>sumfBoostTargetC2</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointPhaseOs0</ASKL1plt:name>
+          <ASKL1plt:description>midpointPhaseOs0</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointPhaseOs1</ASKL1plt:name>
+          <ASKL1plt:description>midpointPhaseOs1</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointPhaseOs2</ASKL1plt:name>
+          <ASKL1plt:description>midpointPhaseOs2</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmufi</ASKL1plt:name>
+          <ASKL1plt:description>selmufi</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmuff</ASKL1plt:name>
+          <ASKL1plt:description>selmuff</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupi</ASKL1plt:name>
+          <ASKL1plt:description>selmupi</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupf</ASKL1plt:name>
+          <ASKL1plt:description>selmupf</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>17</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>18</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>19</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>inxSumfMidpointAdatptiveEnLane</ASKL1plt:name>
+          <ASKL1plt:description>inxSumfMidpointAdatptiveEnLane</ASKL1plt:description>
+          <ASKL1plt:value>21</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresInitLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresInitLane</ASKL1plt:description>
+          <ASKL1plt:value>22</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresEndLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresEndLane</ASKL1plt:description>
+          <ASKL1plt:value>23</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>squelch</ASKL1plt:name>
+          <ASKL1plt:description>squelch</ASKL1plt:description>
+          <ASKL1plt:value>24</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>align90</ASKL1plt:name>
+          <ASKL1plt:description>align90</ASKL1plt:description>
+          <ASKL1plt:value>25</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sampler</ASKL1plt:name>
+          <ASKL1plt:description>sampler</ASKL1plt:description>
+          <ASKL1plt:value>26</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
+          <ASKL1plt:value>28</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>EO</ASKL1plt:name>
+          <ASKL1plt:description>EO</ASKL1plt:description>
+          <ASKL1plt:value>29</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minCap1</ASKL1plt:name>
+          <ASKL1plt:description>minCap1</ASKL1plt:description>
+          <ASKL1plt:value>30</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxCap1</ASKL1plt:name>
+          <ASKL1plt:description>maxCap1</ASKL1plt:description>
+          <ASKL1plt:value>31</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minRes1</ASKL1plt:name>
+          <ASKL1plt:description>minRes1</ASKL1plt:description>
+          <ASKL1plt:value>32</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxRes1</ASKL1plt:name>
+          <ASKL1plt:description>maxRes1</ASKL1plt:description>
+          <ASKL1plt:value>33</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>boolean-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Boolean 32 bits , due to big endian</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>false</ASKL1plt:name>
+          <ASKL1plt:description>False</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>true</ASKL1plt:name>
+          <ASKL1plt:description>True</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Serdes Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>No serdes</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>AVAGO</ASKL1plt:name>
+          <ASKL1plt:description>AVAGO</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C12G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C12G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C28G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C28G</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C112G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C112G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>phy-serdes-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Phy Serdes Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>No serdes</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C28G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C28G</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-interconnect-profile-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Enumerator of interconnect profile.</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_default</ASKL1plt:name>
+          <ASKL1plt:description>Profile Default</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_1</ASKL1plt:name>
+          <ASKL1plt:description>Profile 1</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_2</ASKL1plt:name>
+          <ASKL1plt:description>Profile 2</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+    </ASKL1plt:typedefs>
+    <ASKL1plt:ASIC_Type ASKL1plt:type="asic-type">ASIC_Falcon</ASKL1plt:ASIC_Type>
+    <ASKL1plt:IfModeName>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR2</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR2</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR2</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">50G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR2</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">50G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">10G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">disabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">200GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">200G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">200G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">200G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">200G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">200G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">10G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">400GR8</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR8</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">400G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR8</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">400G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR8</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">400G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR8</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">400G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR8</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">400G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">50G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">50G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">10G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+    </ASKL1plt:IfModeName>
+    <ASKL1plt:Port>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">0</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">0</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">1</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">2</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">3</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">4</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">5</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">6</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">7</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">8</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">8</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">9</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">10</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">11</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">12</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">13</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">14</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">15</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">16</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">16</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">17</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">18</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">19</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">20</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">21</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">22</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">23</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">24</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">24</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">25</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">26</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">27</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">28</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">29</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">30</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">31</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">32</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">32</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">33</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">34</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">35</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">36</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">37</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">38</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">39</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">40</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">40</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">41</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">42</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">43</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">44</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">45</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">46</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">47</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">48</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">48</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">49</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">50</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">51</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">52</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">53</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">54</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">55</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">56</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">56</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">57</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">58</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">59</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">60</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">64</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">65</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">66</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">67</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">67</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">68</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">69</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">70</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">71</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">72</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">73</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">74</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">75</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">75</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">76</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">77</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">78</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">79</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">80</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">81</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">82</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">83</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">83</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">84</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">85</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">86</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">87</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">88</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">89</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">90</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">91</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">91</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">92</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">93</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">94</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">95</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">96</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">97</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">98</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">99</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">99</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">100</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">101</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">102</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">103</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">104</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">105</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">106</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">107</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">107</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">108</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">109</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">110</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">111</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">112</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">113</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">114</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">115</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">115</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">116</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">117</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">118</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">119</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">120</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">121</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">122</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">123</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">123</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">124</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">125</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">126</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">127</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">128</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">129</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">130</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">131</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">132</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+      </ASKL1plt:port-list>
+    </ASKL1plt:Port>
+  </ASKL1plt:ASK-L1>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-PP-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-PP-F3_2T-128x25G.md5
new file mode 100644
index 000000000000..4c6962b96910
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-PP-F3_2T-128x25G.md5
@@ -0,0 +1 @@
+9699d7ac6395ccab96dec333c782dc1d
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-PP-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-PP-F3_2T-128x25G.xml
new file mode 100644
index 000000000000..7cd85e016983
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/ASK-PP-F3_2T-128x25G.xml
@@ -0,0 +1,1180 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-09-24-1.09" profile="Askpp" sid="6abefd8a-3345-40a7-b180-4e9375f341df">
+  <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
+    <askppplt:typedefs>
+      <askppplt:typedef>
+        <askppplt:name>std-string</askppplt:name>
+        <askppplt:type>string</askppplt:type>
+        <askppplt:description>standard string.</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>queue-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Queue id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>precent-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Precent</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>phaThreadId-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Thread id</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>255</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>routing-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies routing mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>POLICY_BASED_ROUTING_ONLY</askppplt:name>
+          <askppplt:description>PBR only</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>TCAM_ROUTER_BASED</askppplt:name>
+          <askppplt:description>Router engine or PBR</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>shared-table-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies table sharing modes for L3 (LPM), L2 (FDB), EM (Exact Match)</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_NO_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_NO_EM</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_MIN_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_MIN_EM</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:name>
+          <askppplt:description>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MAX_L3_MIN_L2_NO_EM</askppplt:name>
+          <askppplt:description>MAX_L3_MIN_L2_NO_EM</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-image-id-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>DEFAULT</askppplt:name>
+          <askppplt:description>Default PHA firmware image ID</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>01</askppplt:name>
+          <askppplt:description>01 firmware image ID</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>02</askppplt:name>
+          <askppplt:description>02 PHA firmware image ID</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-thread-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha thread type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_MIRRORING</askppplt:name>
+          <askppplt:description>INT_IOAM_MIRRORING</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_EGRESS_SWITCH</askppplt:name>
+          <askppplt:description>INT_IOAM_EGRESS_SWITCH</askppplt:description>
+          <askppplt:value>6</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_NO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_NO_EL</askppplt:description>
+          <askppplt:value>7</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_ONE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_ONE_EL</askppplt:description>
+          <askppplt:value>8</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_TWO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_TWO_EL</askppplt:description>
+          <askppplt:value>9</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_THREE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_THREE_EL</askppplt:description>
+          <askppplt:value>10</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>UNIFIED_SR</askppplt:name>
+          <askppplt:description>UNIFIED_SR</askppplt:description>
+          <askppplt:value>11</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:description>
+          <askppplt:value>12</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:description>
+          <askppplt:value>13</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:name>
+          <askppplt:description>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:description>
+          <askppplt:value>14</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:name>
+          <askppplt:description>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:description>
+          <askppplt:value>15</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_EGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_EGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>16</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_END_NODE</askppplt:description>
+          <askppplt:value>17</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_PENULTIMATE_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_PENULTIMATE_END_NODE</askppplt:description>
+          <askppplt:value>18</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_SEGMENT</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_SEGMENT</askppplt:description>
+          <askppplt:value>19</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:description>
+          <askppplt:value>20</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:description>
+          <askppplt:value>21</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:description>
+          <askppplt:value>22</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_ADD_MSB</askppplt:name>
+          <askppplt:description>SGT_NETWORK_ADD_MSB</askppplt:description>
+          <askppplt:value>23</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_FIX</askppplt:name>
+          <askppplt:description>SGT_NETWORK_FIX</askppplt:description>
+          <askppplt:value>24</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_REMOVE</askppplt:name>
+          <askppplt:description>SGT_NETWORK_REMOVE</askppplt:description>
+          <askppplt:value>25</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_FIX</askppplt:name>
+          <askppplt:description>SGT_EDSA_FIX</askppplt:description>
+          <askppplt:value>26</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_REMOVE</askppplt:name>
+          <askppplt:description>SGT_EDSA_REMOVE</askppplt:description>
+          <askppplt:value>27</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV4</askppplt:description>
+          <askppplt:value>28</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV6</askppplt:description>
+          <askppplt:value>29</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV4</askppplt:description>
+          <askppplt:value>30</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV6</askppplt:description>
+          <askppplt:value>31</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>PTP_PHY_1_STEP</askppplt:name>
+          <askppplt:description>PTP_PHY_1_STEP</askppplt:description>
+          <askppplt:value>32</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>EGRESS_MIRRORING_METADATA</askppplt:name>
+          <askppplt:description>EGRESS_MIRRORING_METADATA</askppplt:description>
+          <askppplt:value>33</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:description>
+          <askppplt:value>34</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:description>
+          <askppplt:value>35</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:description>
+          <askppplt:value>36</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:description>
+          <askppplt:value>37</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:description>
+          <askppplt:value>38</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:name>
+          <askppplt:description>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:description>
+          <askppplt:value>39</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_BEST_EFFORT</askppplt:name>
+          <askppplt:description>SRV6_BEST_EFFORT</askppplt:description>
+          <askppplt:value>40</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_CONTAINER</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_CONTAINER</askppplt:description>
+          <askppplt:value>41</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:description>
+          <askppplt:value>42</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:description>
+          <askppplt:value>43</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:description>
+          <askppplt:value>44</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE_COC32_GSID</askppplt:name>
+          <askppplt:description>SRV6_END_NODE_COC32_GSID</askppplt:description>
+          <askppplt:value>45</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV4_TTL_INCREMENT</askppplt:name>
+          <askppplt:description>IPV4_TTL_INCREMENT</askppplt:description>
+          <askppplt:value>46</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV6_HOP_LIMIT_INCREMENT</askppplt:name>
+          <askppplt:description>IPV6_HOP_LIMIT_INCREMENT</askppplt:description>
+          <askppplt:value>47</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:name>
+          <askppplt:description>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:description>
+          <askppplt:value>48</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV4</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV4</askppplt:description>
+          <askppplt:value>49</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV6</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV6</askppplt:description>
+          <askppplt:value>50</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SLS</askppplt:name>
+          <askppplt:description>SLS</askppplt:description>
+          <askppplt:value>51</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>trunk-member-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>NATIVE</askppplt:name>
+          <askppplt:description>NATIVE
+*  the trunk members are filled
+*  according to the order given by application.
+*  Regular trunk may hold max of 8 members.
+*  Cascade trunk may hold :
+*  max of 64 members</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>FLEX</askppplt:name>
+          <askppplt:description>FLEX
+*  A mode to allows flexibility for
+*  each Regular trunk to state it's max number of members (before starting to add members).
+*  (this mode not effect 'cascade trunk' members)
+*  Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
+*  Cascade trunk may hold : max of 64 members.</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>number-physical-port-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>AC3X/AC5X 128, falcon 64, 128, 256, 512, 1024</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>no-ports</askppplt:name>
+          <askppplt:description>no-ports</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>64-ports</askppplt:name>
+          <askppplt:description>64-ports</askppplt:description>
+          <askppplt:value>64</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>128-ports</askppplt:name>
+          <askppplt:description>128-ports</askppplt:description>
+          <askppplt:value>128</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>256-ports</askppplt:name>
+          <askppplt:description>256-ports</askppplt:description>
+          <askppplt:value>256</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>512-ports</askppplt:name>
+          <askppplt:description>512-ports</askppplt:description>
+          <askppplt:value>512</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>1024-ports</askppplt:name>
+          <askppplt:description>1024-ports</askppplt:description>
+          <askppplt:value>1024</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>serdes-ref-clock-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies serdes refernce clock.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>external_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_125_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_125_DIFF</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_DIFF</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>internal_125</askppplt:name>
+          <askppplt:description>INTERNAL_125</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>cpu-port-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>CPU port id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>rx-buffer-size-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Rx Buffer size</askppplt:description>
+        <askppplt:min>64</askppplt:min>
+        <askppplt:max>10240</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>tx-sdma-queue-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies TX queue mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Normal</askppplt:name>
+          <askppplt:description>Application</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Packet_Generator</askppplt:name>
+          <askppplt:description>Traffic generator</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>alloc-method-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Dynamic_Alloc</askppplt:name>
+          <askppplt:description>Dynamic</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Static_Alloc</askppplt:name>
+          <askppplt:description>Static</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>au_mesage_lenght-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>4_words</askppplt:name>
+          <askppplt:description>4 Words</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>8_words</askppplt:name>
+          <askppplt:description>8 Words</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>boolean-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Boolean 32 bits , due to bing endian</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>false</askppplt:name>
+          <askppplt:description>False</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>true</askppplt:name>
+          <askppplt:description>True</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>asic-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>ASIC Type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC3X</askppplt:name>
+          <askppplt:description>AC3X</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC5X</askppplt:name>
+          <askppplt:description>AC5X</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_Falcon</askppplt:name>
+          <askppplt:description>FALCON</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+    </askppplt:typedefs>
+    <askppplt:ASIC_Type askppplt:type="asic-type">ASIC_Falcon</askppplt:ASIC_Type>
+    <askppplt:PPInit>
+      <askppplt:PP-name askppplt:type="std-string">Falcon-3.2</askppplt:PP-name>
+      <askppplt:Phase1>
+        <askppplt:coreClock askppplt:type="uint32">4294967295</askppplt:coreClock>
+        <askppplt:serdesRefClock askppplt:type="serdes-ref-clock-type">external_25_single_ended</askppplt:serdesRefClock>
+        <askppplt:isrAddrCompletionRegionsBmp askppplt:type="uint32">2</askppplt:isrAddrCompletionRegionsBmp>
+        <askppplt:appAddrCompletionRegionsBmp askppplt:type="uint32">60</askppplt:appAddrCompletionRegionsBmp>
+        <askppplt:maxNumOfPhyPortsToUse askppplt:type="number-physical-port-type">256-ports</askppplt:maxNumOfPhyPortsToUse>
+        <askppplt:tcamParityCalcEnable askppplt:type="boolean-type">false</askppplt:tcamParityCalcEnable>
+        <askppplt:apEnable askppplt:type="boolean-type">true</askppplt:apEnable>
+        <askppplt:numOfDataIntegrityElements askppplt:type="uint32">0</askppplt:numOfDataIntegrityElements>
+      </askppplt:Phase1>
+      <askppplt:Phase2>
+        <askppplt:useMultiNetIfSdma askppplt:type="boolean-type">true</askppplt:useMultiNetIfSdma>
+        <askppplt:auqCfg>
+          <askppplt:auDescNum askppplt:type="uint32">4096</askppplt:auDescNum>
+        </askppplt:auqCfg>
+        <askppplt:fuqCfg>
+          <askppplt:fuDescNum askppplt:type="uint32">2048</askppplt:fuDescNum>
+        </askppplt:fuqCfg>
+        <askppplt:multiNetIfCfg>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">256</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">256</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">144</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">1</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">1</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">3032</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+        </askppplt:multiNetIfCfg>
+        <askppplt:internal>
+          <askppplt:fuqUseSeparate askppplt:type="boolean-type">false</askppplt:fuqUseSeparate>
+          <askppplt:useSecondaryAuq askppplt:type="boolean-type">false</askppplt:useSecondaryAuq>
+          <askppplt:noTraffic2CPU askppplt:type="boolean-type">false</askppplt:noTraffic2CPU>
+          <askppplt:netifSdmaPortGroupId askppplt:type="uint32">0</askppplt:netifSdmaPortGroupId>
+          <askppplt:auMessageLength askppplt:type="au_mesage_lenght-type">8_words</askppplt:auMessageLength>
+          <askppplt:useDoubleAuq askppplt:type="boolean-type">false</askppplt:useDoubleAuq>
+        </askppplt:internal>
+      </askppplt:Phase2>
+      <askppplt:LogicalInit>
+        <askppplt:routingMode askppplt:type="routing-mode-type">TCAM_ROUTER_BASED</askppplt:routingMode>
+        <askppplt:maxNumOfPbrEntries askppplt:type="uint32">0</askppplt:maxNumOfPbrEntries>
+        <askppplt:sharedTableMode askppplt:type="shared-table-mode-type">MID_L3_MID_L2_NO_EM</askppplt:sharedTableMode>
+        <askppplt:ingressDropEnable askppplt:type="boolean-type">false</askppplt:ingressDropEnable>
+      </askppplt:LogicalInit>
+      <askppplt:LibInit>
+        <askppplt:initBridge askppplt:type="boolean-type">true</askppplt:initBridge>
+        <askppplt:initMirror askppplt:type="boolean-type">true</askppplt:initMirror>
+        <askppplt:initNetIf askppplt:type="boolean-type">true</askppplt:initNetIf>
+        <askppplt:initPhy askppplt:type="boolean-type">true</askppplt:initPhy>
+        <askppplt:initPort askppplt:type="boolean-type">true</askppplt:initPort>
+        <askppplt:initTrunk askppplt:type="boolean-type">true</askppplt:initTrunk>
+        <askppplt:Trunk-params>
+          <askppplt:maxNumberOfTrunks askppplt:type="uint32">1023</askppplt:maxNumberOfTrunks>
+          <askppplt:trunkMembersMode askppplt:type="trunk-member-mode-type">FLEX</askppplt:trunkMembersMode>
+        </askppplt:Trunk-params>
+        <askppplt:initPcl askppplt:type="boolean-type">true</askppplt:initPcl>
+        <askppplt:initTcam askppplt:type="boolean-type">true</askppplt:initTcam>
+        <askppplt:initPolicer askppplt:type="boolean-type">true</askppplt:initPolicer>
+        <askppplt:initPha askppplt:type="boolean-type">true</askppplt:initPha>
+        <askppplt:Pha-params>
+          <askppplt:packetOrderChangeEnable askppplt:type="boolean-type">false</askppplt:packetOrderChangeEnable>
+          <askppplt:phaFwImageId askppplt:type="pha-firmware-image-id-type">02</askppplt:phaFwImageId>
+          <askppplt:phaFwImageIdVersion askppplt:type="uint32">0</askppplt:phaFwImageIdVersion>
+        </askppplt:Pha-params>
+      </askppplt:LibInit>
+    </askppplt:PPInit>
+  </askppplt:ASK-PP>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/SAI-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/SAI-F3_2T-128x25G.md5
new file mode 100644
index 000000000000..cfa1a375d83b
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/SAI-F3_2T-128x25G.md5
@@ -0,0 +1 @@
+88cbf08802a5d41b605a8dd83f2c5139
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/SAI-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/SAI-F3_2T-128x25G.xml
new file mode 100644
index 000000000000..635a099a35aa
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/SAI-F3_2T-128x25G.xml
@@ -0,0 +1,900 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-09-24-1.09" profile="SAI" sid="b48431f8-351b-4524-babb-1ce99b72cd68">
+  <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
+    <SAIplt:typedefs>
+      <SAIplt:typedef>
+        <SAIplt:name>device-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Device ID 0..1</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>port-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Interface number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1023</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>logDest-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Logging Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_SYSLOG</SAIplt:name>
+          <SAIplt:description>SYSLOG  {Syslog service should be running to use this option}</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_CONSOLE</SAIplt:name>
+          <SAIplt:description>CONSOLE</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_FILE</SAIplt:name>
+          <SAIplt:description>FILE  {Warning !!! Use with caution. Can cause disk full issues}</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>InDropCounter-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Router In Drop Reason Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>TTL_HOPLIMIT_EXCEEDED</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track TTL &amp; Hop Limit Exceeded Packets</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ROUTE_BLACKHOLE</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>Feature-enable</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Feature Enabled/Disabled</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>Disabled</SAIplt:name>
+          <SAIplt:description>Disabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>Enabled</SAIplt:name>
+          <SAIplt:description>Enabled</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>log-dest-file-path-type</SAIplt:name>
+        <SAIplt:type>string</SAIplt:type>
+        <SAIplt:description>A string with path to file for logging feature</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>30</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>acl-feature-name-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>port-sFlow</SAIplt:name>
+          <SAIplt:description>SFlow over Port</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>port-counters-ipv4-ipv6</SAIplt:name>
+          <SAIplt:description>Port ipv4/ipv6 counters</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>control-acl</SAIplt:name>
+          <SAIplt:description>ACLs for control packet handling</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>debug-counter-acl</SAIplt:name>
+          <SAIplt:description>ACLs for Debug Counters</SAIplt:description>
+          <SAIplt:value>3</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>ingress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL0</SAIplt:name>
+          <SAIplt:description>Stage IPCL0</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL1</SAIplt:name>
+          <SAIplt:description>Stage IPCL1</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>egress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>EPCL0</SAIplt:name>
+          <SAIplt:description>Stage EPCL0</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>feature-priority-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Feature priority</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>15</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>hit-number-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Hit/lookup number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>3</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>asic-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>ASIC Type</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC3X</SAIplt:name>
+          <SAIplt:description>AC3X</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC5X</SAIplt:name>
+          <SAIplt:description>AC5X</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_Falcon</SAIplt:name>
+          <SAIplt:description>FALCON</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+    </SAIplt:typedefs>
+    <SAIplt:ASIC_Type SAIplt:type="asic-type">ASIC_Falcon</SAIplt:ASIC_Type>
+    <SAIplt:ASK-BOARD-Profile-Name SAIplt:type="string">ASK-Board-F3_2T-128x25G.xml</SAIplt:ASK-BOARD-Profile-Name>
+    <SAIplt:Ports>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">0</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">0</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">1</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">1</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">2</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">2</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">3</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">3</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">4</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">4</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">5</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">5</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">6</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">6</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">7</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">7</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">8</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">8</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">9</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">9</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">10</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">10</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">11</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">11</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">12</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">12</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">13</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">13</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">14</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">14</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">15</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">15</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">16</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">16</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">17</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">17</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">18</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">18</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">19</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">19</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">20</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">20</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">21</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">21</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">22</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">22</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">23</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">23</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">24</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">24</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">25</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">25</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">26</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">26</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">27</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">27</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">28</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">28</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">29</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">29</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">30</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">30</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">31</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">31</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">32</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">32</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">33</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">33</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">34</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">34</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">35</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">35</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">36</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">36</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">37</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">37</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">38</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">38</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">39</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">39</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">40</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">40</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">41</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">41</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">42</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">42</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">43</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">43</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">44</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">44</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">45</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">45</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">46</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">46</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">47</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">47</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">48</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">48</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">49</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">49</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">50</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">50</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">51</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">51</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">52</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">52</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">53</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">53</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">54</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">54</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">55</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">55</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">56</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">56</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">57</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">57</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">58</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">58</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">59</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">59</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">60</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">60</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">61</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">64</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">62</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">65</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">63</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">66</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">64</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">67</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">65</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">68</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">66</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">69</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">67</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">70</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">68</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">71</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">69</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">72</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">70</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">73</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">71</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">74</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">72</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">75</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">73</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">76</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">74</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">77</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">75</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">78</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">76</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">79</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">77</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">80</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">78</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">81</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">79</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">82</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">80</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">83</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">81</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">84</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">82</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">85</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">83</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">86</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">84</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">87</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">85</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">88</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">86</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">89</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">87</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">90</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">88</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">91</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">89</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">92</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">90</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">93</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">91</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">94</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">92</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">95</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">93</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">96</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">94</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">97</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">95</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">98</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">96</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">99</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">97</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">100</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">98</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">101</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">99</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">102</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">100</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">103</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">101</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">104</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">102</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">105</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">103</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">106</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">104</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">107</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">105</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">108</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">106</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">109</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">107</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">110</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">108</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">111</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">109</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">112</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">110</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">113</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">111</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">114</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">112</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">115</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">113</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">116</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">114</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">117</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">115</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">118</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">116</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">119</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">117</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">120</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">118</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">121</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">119</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">122</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">120</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">123</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">121</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">124</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">122</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">125</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">123</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">126</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">124</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">127</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">125</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">128</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">126</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">129</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">127</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">130</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">128</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">131</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">129</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">132</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+    </SAIplt:Ports>
+    <SAIplt:scalingFalcon>
+      <SAIplt:max_lag_members SAIplt:type="uint32">8</SAIplt:max_lag_members>
+      <SAIplt:max_route_ipv4 SAIplt:type="uint32">0</SAIplt:max_route_ipv4>
+      <SAIplt:max_route_ipv6 SAIplt:type="uint32">0</SAIplt:max_route_ipv6>
+      <SAIplt:max_Nh_Ecmp_Mbr_Per_Grp SAIplt:type="uint32">64</SAIplt:max_Nh_Ecmp_Mbr_Per_Grp>
+      <SAIplt:max_ipv4_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv4_tunnel>
+      <SAIplt:max_ipv6_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv6_tunnel>
+      <SAIplt:max_tti SAIplt:type="uint32">1024</SAIplt:max_tti>
+      <SAIplt:wred_size SAIplt:type="uint32">0</SAIplt:wred_size>
+      <SAIplt:max_nat SAIplt:type="uint32">0</SAIplt:max_nat>
+    </SAIplt:scalingFalcon>
+    <SAIplt:Counters>
+      <SAIplt:cnc-base-list>
+        <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
+      </SAIplt:cnc-base-list>
+      <SAIplt:Queue-counter>
+        <SAIplt:queue-pass-drop-counter SAIplt:type="Feature-enable">Enabled</SAIplt:queue-pass-drop-counter>
+        <SAIplt:queue-watermark-counter SAIplt:type="Feature-enable">Enabled</SAIplt:queue-watermark-counter>
+      </SAIplt:Queue-counter>
+      <SAIplt:Port-counter>
+        <SAIplt:port-in-discard-counter SAIplt:type="Feature-enable">Enabled</SAIplt:port-in-discard-counter>
+      </SAIplt:Port-counter>
+    </SAIplt:Counters>
+    <SAIplt:Logging>
+      <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>
+    </SAIplt:Logging>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">control-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">3</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-sFlow</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">4</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-counters-ipv4-ipv6</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">5</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">3</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">debug-counter-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">2</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+  </SAIplt:SAI>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/buffers_defaults_t0.j2 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/buffers_defaults_t0.j2
new file mode 100644
index 000000000000..28e30dee8cc3
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/buffers_defaults_t0.j2
@@ -0,0 +1,49 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_pool1": {
+            "mode": "dynamic",
+            "size": "10500000",
+            "type": "ingress"
+        },
+        "ingress_pool2": {
+            "mode": "dynamic",
+            "size": "1000000",
+            "type": "ingress"
+        },
+        "egress_pool1": {
+            "mode": "dynamic",
+            "size": "10500000",
+            "type": "egress"
+        },
+        "egress_pool2": {
+            "mode": "dynamic",
+            "size": "1000000",
+            "type": "egress"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "egress_lossless_profile": {
+            "pool": "egress_pool1",
+            "size": "0",
+            "dynamic_th": "1"
+        },
+        "egress_lossy_profile": {
+            "pool": "egress_pool2",
+            "size": "0",
+            "dynamic_th": "1"
+        },
+        "ingress_lossless_profile": {
+            "pool": "ingress_pool1",
+            "size": "0",
+            "dynamic_th": "-3"
+        },
+        "ingress_lossy_profile": {
+            "pool": "ingress_pool2",
+            "size": "0",
+            "dynamic_th": "-3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/buffers_defaults_t1.j2 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/buffers_defaults_t1.j2
new file mode 100644
index 000000000000..28e30dee8cc3
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/buffers_defaults_t1.j2
@@ -0,0 +1,49 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_pool1": {
+            "mode": "dynamic",
+            "size": "10500000",
+            "type": "ingress"
+        },
+        "ingress_pool2": {
+            "mode": "dynamic",
+            "size": "1000000",
+            "type": "ingress"
+        },
+        "egress_pool1": {
+            "mode": "dynamic",
+            "size": "10500000",
+            "type": "egress"
+        },
+        "egress_pool2": {
+            "mode": "dynamic",
+            "size": "1000000",
+            "type": "egress"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "egress_lossless_profile": {
+            "pool": "egress_pool1",
+            "size": "0",
+            "dynamic_th": "1"
+        },
+        "egress_lossy_profile": {
+            "pool": "egress_pool2",
+            "size": "0",
+            "dynamic_th": "1"
+        },
+        "ingress_lossless_profile": {
+            "pool": "ingress_pool1",
+            "size": "0",
+            "dynamic_th": "-3"
+        },
+        "ingress_lossy_profile": {
+            "pool": "ingress_pool2",
+            "size": "0",
+            "dynamic_th": "-3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/create_only_config_db_buffers.json b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/create_only_config_db_buffers.json
new file mode 100644
index 000000000000..8bea3894c083
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/create_only_config_db_buffers.json
@@ -0,0 +1,7 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "create_only_config_db_buffers": "true"
+        }
+    }
+}
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/hwsku.json b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/hwsku.json
new file mode 100644
index 000000000000..f6745e836052
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/hwsku.json
@@ -0,0 +1,204 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet4": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet12": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet20": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet28": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet36": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet44": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet52": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet60": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet68": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet76": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet84": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet92": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet100": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet108": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet116": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet124": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x10G",
+            "autoneg": "off"
+        },
+        "Ethernet129": {
+            "default_brkout_mode": "1x10G",
+            "autoneg": "off"
+        }
+    }
+}
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/port_config.ini b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/port_config.ini
new file mode 100644
index 000000000000..85d256856fb8
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/port_config.ini
@@ -0,0 +1,131 @@
+#  name                               lanes      alias       speed  autoneg   fec    index
+Ethernet0                                0       Eth1/1       25000    on     none     1
+Ethernet1                                1       Eth1/2       25000    on     none     1
+Ethernet2                                2       Eth1/3       25000    on     none     1
+Ethernet3                                3       Eth1/4       25000    on     none     1
+Ethernet4                                4       Eth1/5       25000    on     none     1
+Ethernet5                                5       Eth1/6       25000    on     none     1
+Ethernet6                                6       Eth1/7       25000    on     none     1
+Ethernet7                                7       Eth1/8       25000    on     none     1
+Ethernet8                                8       Eth2/1       25000    on     none     2
+Ethernet9                                9       Eth2/2       25000    on     none     2
+Ethernet10                              10       Eth2/3       25000    on     none     2
+Ethernet11                              11       Eth2/4       25000    on     none     2
+Ethernet12                              12       Eth2/5       25000    on     none     2
+Ethernet13                              13       Eth2/6       25000    on     none     2
+Ethernet14                              14       Eth2/7       25000    on     none     2
+Ethernet15                              15       Eth2/8       25000    on     none     2
+Ethernet16                              16       Eth3/1       25000    on     none     3
+Ethernet17                              17       Eth3/2       25000    on     none     3
+Ethernet18                              18       Eth3/3       25000    on     none     3
+Ethernet19                              19       Eth3/4       25000    on     none     3
+Ethernet20                              20       Eth3/5       25000    on     none     3
+Ethernet21                              21       Eth3/6       25000    on     none     3
+Ethernet22                              22       Eth3/7       25000    on     none     3
+Ethernet23                              23       Eth3/8       25000    on     none     3
+Ethernet24                              24       Eth4/1       25000    on     none     4
+Ethernet25                              25       Eth4/2       25000    on     none     4
+Ethernet26                              26       Eth4/3       25000    on     none     4
+Ethernet27                              27       Eth4/4       25000    on     none     4
+Ethernet28                              28       Eth4/5       25000    on     none     4
+Ethernet29                              29       Eth4/6       25000    on     none     4
+Ethernet30                              30       Eth4/7       25000    on     none     4
+Ethernet31                              31       Eth4/8       25000    on     none     4
+Ethernet32                              32       Eth5/1       25000    on     none     5
+Ethernet33                              33       Eth5/2       25000    on     none     5
+Ethernet34                              34       Eth5/3       25000    on     none     5
+Ethernet35                              35       Eth5/4       25000    on     none     5
+Ethernet36                              36       Eth5/5       25000    on     none     5
+Ethernet37                              37       Eth5/6       25000    on     none     5
+Ethernet38                              38       Eth5/7       25000    on     none     5
+Ethernet39                              39       Eth5/8       25000    on     none     5
+Ethernet40                              40       Eth6/1       25000    on     none     6
+Ethernet41                              41       Eth6/2       25000    on     none     6
+Ethernet42                              42       Eth6/3       25000    on     none     6
+Ethernet43                              43       Eth6/4       25000    on     none     6
+Ethernet44                              44       Eth6/5       25000    on     none     6
+Ethernet45                              45       Eth6/6       25000    on     none     6
+Ethernet46                              46       Eth6/7       25000    on     none     6
+Ethernet47                              47       Eth6/8       25000    on     none     6
+Ethernet48                              48       Eth7/1       25000    on     none     7
+Ethernet49                              49       Eth7/2       25000    on     none     7
+Ethernet50                              50       Eth7/3       25000    on     none     7
+Ethernet51                              51       Eth7/4       25000    on     none     7
+Ethernet52                              52       Eth7/5       25000    on     none     7
+Ethernet53                              53       Eth7/6       25000    on     none     7
+Ethernet54                              54       Eth7/7       25000    on     none     7
+Ethernet55                              55       Eth7/8       25000    on     none     7
+Ethernet56                              56       Eth8/1       25000    on     none     8
+Ethernet57                              57       Eth8/2       25000    on     none     8
+Ethernet58                              58       Eth8/3       25000    on     none     8
+Ethernet59                              59       Eth8/4       25000    on     none     8
+Ethernet60                              60       Eth8/5       25000    on     none     8
+Ethernet61                              61       Eth8/6       25000    on     none     8
+Ethernet62                              62       Eth8/7       25000    on     none     8
+Ethernet63                              63       Eth8/8       25000    on     none     8
+Ethernet64                              64       Eth9/1       25000    on     none     9
+Ethernet65                              65       Eth9/2       25000    on     none     9
+Ethernet66                              66       Eth9/3       25000    on     none     9
+Ethernet67                              67       Eth9/4       25000    on     none     9
+Ethernet68                              68       Eth9/5       25000    on     none     9
+Ethernet69                              69       Eth9/6       25000    on     none     9
+Ethernet70                              70       Eth9/7       25000    on     none     9
+Ethernet71                              71       Eth9/8       25000    on     none     9
+Ethernet72                              72      Eth10/1       25000    on     none    10
+Ethernet73                              73      Eth10/2       25000    on     none    10
+Ethernet74                              74      Eth10/3       25000    on     none    10
+Ethernet75                              75      Eth10/4       25000    on     none    10
+Ethernet76                              76      Eth10/5       25000    on     none    10
+Ethernet77                              77      Eth10/6       25000    on     none    10
+Ethernet78                              78      Eth10/7       25000    on     none    10
+Ethernet79                              79      Eth10/8       25000    on     none    10
+Ethernet80                              80      Eth11/1       25000    on     none    11
+Ethernet81                              81      Eth11/2       25000    on     none    11
+Ethernet82                              82      Eth11/3       25000    on     none    11
+Ethernet83                              83      Eth11/4       25000    on     none    11
+Ethernet84                              84      Eth11/5       25000    on     none    11
+Ethernet85                              85      Eth11/6       25000    on     none    11
+Ethernet86                              86      Eth11/7       25000    on     none    11
+Ethernet87                              87      Eth11/8       25000    on     none    11
+Ethernet88                              88      Eth12/1       25000    on     none    12
+Ethernet89                              89      Eth12/2       25000    on     none    12
+Ethernet90                              90      Eth12/3       25000    on     none    12
+Ethernet91                              91      Eth12/4       25000    on     none    12
+Ethernet92                              92      Eth12/5       25000    on     none    12
+Ethernet93                              93      Eth12/6       25000    on     none    12
+Ethernet94                              94      Eth12/7       25000    on     none    12
+Ethernet95                              95      Eth12/8       25000    on     none    12
+Ethernet96                              96      Eth13/1       25000    on     none    13
+Ethernet97                              97      Eth13/2       25000    on     none    13
+Ethernet98                              98      Eth13/3       25000    on     none    13
+Ethernet99                              99      Eth13/4       25000    on     none    13
+Ethernet100                            100      Eth13/5       25000    on     none    13
+Ethernet101                            101      Eth13/6       25000    on     none    13
+Ethernet102                            102      Eth13/7       25000    on     none    13
+Ethernet103                            103      Eth13/8       25000    on     none    13
+Ethernet104                            104      Eth14/1       25000    on     none    14
+Ethernet105                            105      Eth14/2       25000    on     none    14
+Ethernet106                            106      Eth14/3       25000    on     none    14
+Ethernet107                            107      Eth14/4       25000    on     none    14
+Ethernet108                            108      Eth14/5       25000    on     none    14
+Ethernet109                            109      Eth14/6       25000    on     none    14
+Ethernet110                            110      Eth14/7       25000    on     none    14
+Ethernet111                            111      Eth14/8       25000    on     none    14
+Ethernet112                            112      Eth15/1       25000    on     none    15
+Ethernet113                            113      Eth15/2       25000    on     none    15
+Ethernet114                            114      Eth15/3       25000    on     none    15
+Ethernet115                            115      Eth15/4       25000    on     none    15
+Ethernet116                            116      Eth15/5       25000    on     none    15
+Ethernet117                            117      Eth15/6       25000    on     none    15
+Ethernet118                            118      Eth15/7       25000    on     none    15
+Ethernet119                            119      Eth15/8       25000    on     none    15
+Ethernet120                            120      Eth16/1       25000    on     none    16
+Ethernet121                            121      Eth16/2       25000    on     none    16
+Ethernet122                            122      Eth16/3       25000    on     none    16
+Ethernet123                            123      Eth16/4       25000    on     none    16
+Ethernet124                            124      Eth16/5       25000    on     none    16
+Ethernet125                            125      Eth16/6       25000    on     none    16
+Ethernet126                            126      Eth16/7       25000    on     none    16
+Ethernet127                            127      Eth16/8       25000    on     none    16
+Ethernet128                            128        Eth17       10000   off     none   129
+Ethernet129                            129        Eth17       10000   off     none   130
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/profile.ini b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/profile.ini
new file mode 100644
index 000000000000..c2f77685ad0a
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/profile.ini
@@ -0,0 +1 @@
+switchMacAddress=00:01:02:03:04:05
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/sai.profile b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/sai.profile
new file mode 100644
index 000000000000..2477a839e09e
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/FC128x25G/sai.profile
@@ -0,0 +1,4 @@
+mode=1
+hwId=FC128x25G
+switchProfile=/usr/share/sonic/hwsku/SAI-F3_2T-128x25G.xml
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/profile.ini
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-Board-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-Board-F3_2T-128x25G.md5
new file mode 100644
index 000000000000..b9aabeb8706b
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-Board-F3_2T-128x25G.md5
@@ -0,0 +1 @@
+e48527ad3f7bc5db09ec1fe078eba9a1
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-Board-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-Board-F3_2T-128x25G.xml
new file mode 100644
index 000000000000..80434c00be65
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-Board-F3_2T-128x25G.xml
@@ -0,0 +1,3990 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-09-24-1.09" profile="Askboard" sid="f5800f14-68b6-4eed-bd32-d93056a9feef">
+  <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
+    <askboardplt:typedefs>
+      <askboardplt:typedef>
+        <askboardplt:name>std-string</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>standard string.</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>100</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-callback-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies os/ext drv callback types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>linux-static</askboardplt:name>
+          <askboardplt:description>Linux Static</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>linux-shared</askboardplt:name>
+          <askboardplt:description>Linux Shared Lib mode</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>External Os</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>freeBsd</askboardplt:name>
+          <askboardplt:description>Free BSD</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-map-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies pci info types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>fixed</askboardplt:name>
+          <askboardplt:description>Fixed</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>autoscan</askboardplt:name>
+          <askboardplt:description>Auto scan</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-interface-channel-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies channel interface type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pci</askboardplt:name>
+          <askboardplt:description>PCI</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>smi</askboardplt:name>
+          <askboardplt:description>SMI</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>twsi</askboardplt:name>
+          <askboardplt:description>TWSI</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-as-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies Address space type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>4_regions</askboardplt:name>
+          <askboardplt:description>address-space 4 regions</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>8_regions</askboardplt:name>
+          <askboardplt:description>address-space 8 regions</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>atu</askboardplt:name>
+          <askboardplt:description>address translation unit</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>device-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Device ID 0..1</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-mapping-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies port map type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ethernet_mac</askboardplt:name>
+          <askboardplt:description>ETHERNET_MAC</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cpu_sdma</askboardplt:name>
+          <askboardplt:description>CPU_SDMA</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>interface-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Interface number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>txq-port-number-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>TXq port number </askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>99</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-smi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy SMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>3</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-xsmi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy XSMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>15</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the PHY Part Identifier.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>NA</askboardplt:name>
+          <askboardplt:description>No Phy</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1780</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
+Efficient Ethernet Transceiver</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2540</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
+Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2580</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2780</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2780, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>physical-port-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>PHYSICAL PORT NUM</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-port-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the ledstream port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_TRI_SPEED</askboardplt:name>
+          <askboardplt:description>tri-speed port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_XG</askboardplt:name>
+          <askboardplt:description>XG port.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink select type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_0</askboardplt:name>
+          <askboardplt:description>Blink 0 signal.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_1</askboardplt:name>
+          <askboardplt:description>Blink 1 signal</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-order-mode-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream ordering mode.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_PORT</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_CLASS</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by class.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duty-cycle-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_0</askboardplt:name>
+          <askboardplt:description>25% on, 75% off.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_1</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_2</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_3</askboardplt:name>
+          <askboardplt:description>75% on, 25% off.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duration-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink period type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_0</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_0.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_1</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_2</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_3</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_4</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_5</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: xCat3; AC5; Lion2; Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe) .</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_7</askboardplt:name>
+          <askboardplt:description>APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-pulse-stretch-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream length of stretching for dynamic signals.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_0_NO</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_0_NO.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_1</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_2</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_3</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_4</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_5</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_7</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-out-frequency-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>_CLOCK_OUT_FREQUENCY_500</askboardplt:name>
+          <askboardplt:description>500 KHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_1000</askboardplt:name>
+          <askboardplt:description>1 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_2000</askboardplt:name>
+          <askboardplt:description>2 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_3000</askboardplt:name>
+          <askboardplt:description>3 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class5-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class5 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_HALF_DUPLEX</askboardplt:name>
+          <askboardplt:description>Half Duplex is displayed on class5.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_FIBER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Fiber Link Up is displayed on class5.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class13-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class13 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_LINK_DOWN</askboardplt:name>
+          <askboardplt:description>Link Down is displayed on class13.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_COPPER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Copper Link Up is displayed on class13.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-class-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Class number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>boolean-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Boolean 32 bits , due to bing endian</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>false</askboardplt:name>
+          <askboardplt:description>False</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>true</askboardplt:name>
+          <askboardplt:description>True</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bus-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bus Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>function-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Function Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>domain-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Domain, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led interface</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-position-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led position</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>63</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>serdes-lane-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>serdes lane</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>7</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>cpu-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The CPU Internal/External</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>Extrenal connected CPU</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>internal</askboardplt:name>
+          <askboardplt:description>Internal CPU</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-frequency-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Clock Frequency Sip6</askboardplt:description>
+        <askboardplt:min>500</askboardplt:min>
+        <askboardplt:max>80000</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-or-no-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units, 0 for no Unit</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-group-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Group</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-force-data-type</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>A hexadecimal string with octets represented as hex digits
+separated by colons.  The canonical representation uses
+lowercase characters.</askboardplt:description>
+        <askboardplt:min>3</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit range 0..31</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>31</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-size-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit leng 1..32</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>32</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-sip-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The LED scehme</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>na</askboardplt:name>
+          <askboardplt:description>NA</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip5</askboardplt:name>
+          <askboardplt:description>SIP5: AC3x</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip6</askboardplt:name>
+          <askboardplt:description>SIP6: Falcon, AC5x</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_1_WORD</askboardplt:name>
+          <askboardplt:description>DSA Regular</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_2_WORDS</askboardplt:name>
+          <askboardplt:description>DSA Extended</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>NETWORK</askboardplt:name>
+          <askboardplt:description>Network.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_3_WORDS</askboardplt:name>
+          <askboardplt:description>DSA 3 Words</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_4_WORD</askboardplt:name>
+          <askboardplt:description>DSA 4 Words</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Specifies the Cascade Trunk id.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>127</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>cscdPort</askboardplt:name>
+          <askboardplt:description>Cascade port</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cscdTrunk</askboardplt:name>
+          <askboardplt:description>Csacde trunk</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>hash-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the hash used by cascade trunk.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pkt</askboardplt:name>
+          <askboardplt:description>Hash based on packet</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>srcPort</askboardplt:name>
+          <askboardplt:description>Hash based on source port</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>asic-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>ASIC Type</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC3X</askboardplt:name>
+          <askboardplt:description>AC3X</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC5X</askboardplt:name>
+          <askboardplt:description>AC5X</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_Falcon</askboardplt:name>
+          <askboardplt:description>FALCON</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>mpp-num-type</askboardplt:name>
+        <askboardplt:type>uint8</askboardplt:type>
+        <askboardplt:description>Specifies the MPP pin number.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>63</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>mpp-select-type</askboardplt:name>
+        <askboardplt:type>uint8</askboardplt:type>
+        <askboardplt:description>Specifies the MPP pin value.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>15</askboardplt:max>
+      </askboardplt:typedef>
+    </askboardplt:typedefs>
+    <askboardplt:ASIC_Type askboardplt:type="asic-type">ASIC_Falcon</askboardplt:ASIC_Type>
+    <askboardplt:boardName askboardplt:type="std-string">Falcon-3.2T-128x25G</askboardplt:boardName>
+    <askboardplt:osCallType askboardplt:type="board-callback-type">linux-static</askboardplt:osCallType>
+    <askboardplt:extDrvCallType askboardplt:type="board-callback-type">linux-static</askboardplt:extDrvCallType>
+    <askboardplt:mapType askboardplt:type="board-pp-map-type">autoscan</askboardplt:mapType>
+    <askboardplt:cpuType askboardplt:type="cpu-type">external</askboardplt:cpuType>
+    <askboardplt:mngInterfaceType askboardplt:type="board-pp-interface-channel-type">pci</askboardplt:mngInterfaceType>
+    <askboardplt:adressSpaceType askboardplt:type="board-pp-as-type">atu</askboardplt:adressSpaceType>
+    <askboardplt:device-list>
+      <askboardplt:devNum askboardplt:type="device-id-type">0</askboardplt:devNum>
+      <askboardplt:deviceId askboardplt:type="device-id-type">0</askboardplt:deviceId>
+      <askboardplt:pp-profile-name askboardplt:type="std-string">ASK-PP-F3_2T-128x25G.xml</askboardplt:pp-profile-name>
+      <askboardplt:L1-profile-name askboardplt:type="std-string">ASK-L1-F3_2T-128x25G.xml</askboardplt:L1-profile-name>
+      <askboardplt:ledStreamType askboardplt:type="led-sip-type">sip6</askboardplt:ledStreamType>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">0</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">0</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">1</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">1</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">2</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">2</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">3</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">3</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">4</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">4</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">5</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">5</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">6</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">6</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">7</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">7</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">8</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">8</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">9</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">9</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">10</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">10</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">11</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">11</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">12</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">12</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">13</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">13</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">14</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">14</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">15</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">15</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">16</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">16</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">17</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">17</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">18</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">18</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">19</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">19</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">20</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">20</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">21</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">21</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">22</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">22</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">23</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">23</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">24</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">24</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">25</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">25</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">26</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">26</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">27</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">27</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">28</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">28</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">29</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">29</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">30</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">30</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">31</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">31</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">32</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">32</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">33</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">33</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">34</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">34</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">35</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">35</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">36</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">36</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">37</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">37</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">38</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">38</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">39</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">39</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">40</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">40</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">41</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">41</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">42</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">42</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">43</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">43</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">44</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">44</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">45</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">45</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">46</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">46</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">47</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">47</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">48</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">48</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">49</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">49</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">50</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">50</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">51</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">51</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">52</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">52</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">53</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">53</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">54</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">54</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">55</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">55</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">56</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">56</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">57</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">57</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">58</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">58</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">59</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">59</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">60</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">60</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">64</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">61</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">65</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">62</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">66</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">63</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">67</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">64</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">68</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">65</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">69</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">66</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">70</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">67</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">130</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">127</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">129</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">126</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">128</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">125</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">127</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">124</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">126</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">123</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">125</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">122</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">124</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">121</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">123</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">120</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">122</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">119</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">121</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">118</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">120</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">117</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">119</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">116</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">118</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">115</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">117</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">114</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">116</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">113</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">115</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">112</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">114</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">111</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">113</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">110</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">112</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">109</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">111</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">108</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">110</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">107</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">109</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">106</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">108</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">105</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">107</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">104</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">106</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">103</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">105</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">102</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">104</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">101</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">103</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">100</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">102</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">99</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">101</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">98</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">100</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">97</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">99</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">96</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">98</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">95</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">97</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">94</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">96</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">93</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">95</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">92</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">94</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">91</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">93</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">90</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">92</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">89</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">91</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">88</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">90</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">87</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">89</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">86</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">88</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">85</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">87</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">84</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">86</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">83</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">85</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">82</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">84</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">81</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">83</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">80</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">82</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">79</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">81</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">78</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">80</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">77</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">79</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">76</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">78</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">75</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">77</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">74</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">76</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">73</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">75</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">72</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">74</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">71</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">73</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">70</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">72</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">69</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">71</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">68</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">131</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">128</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">132</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">135</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">63</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">136</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">133</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">137</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">134</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">138</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">135</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">139</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">7</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">1</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">6</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">0</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">5</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">3</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">4</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">2</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">8</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">14</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">9</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">15</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">10</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">12</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">11</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">13</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">23</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">17</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">22</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">16</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">21</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">19</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">20</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">18</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">24</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">30</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">25</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">31</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">26</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">28</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">27</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">29</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">39</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">33</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">38</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">32</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">37</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">35</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">36</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">34</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">40</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">41</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">46</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">47</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">42</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">44</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">43</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">45</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">55</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">49</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">54</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">48</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">53</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">51</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">52</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">50</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">56</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">62</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">57</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">63</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">58</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">60</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">59</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">61</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">71</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">65</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">70</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">64</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">69</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">67</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">68</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">66</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">72</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">78</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">73</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">79</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">74</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">76</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">75</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">77</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">87</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">81</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">86</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">80</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">85</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">83</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">84</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">82</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">88</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">94</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">89</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">95</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">90</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">92</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">91</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">93</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">103</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">97</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">102</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">96</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">101</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">99</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">100</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">98</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">104</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">110</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">105</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">111</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">106</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">108</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">107</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">109</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">119</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">113</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">118</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">112</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">117</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">115</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">116</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">114</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">120</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">126</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">121</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">127</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">122</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">124</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">123</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">125</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">128</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">135</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:Ledstream-interface-list>
+        <askboardplt:ledstream-interface-number askboardplt:type="led-interface-type">0</askboardplt:ledstream-interface-number>
+        <askboardplt:ledstream-configSet>
+          <askboardplt:ledOrganize askboardplt:type="led-stream-order-mode-type">ORDER_MODE_BY_CLASS</askboardplt:ledOrganize>
+          <askboardplt:blink0DutyCycle askboardplt:type="led-stream-blink-duty-cycle-type">BLINK_DUTY_CYCLE_0</askboardplt:blink0DutyCycle>
+          <askboardplt:blink0Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_0</askboardplt:blink0Duration>
+          <askboardplt:blink1DutyCycle askboardplt:type="led-stream-blink-duty-cycle-type">BLINK_DUTY_CYCLE_0</askboardplt:blink1DutyCycle>
+          <askboardplt:blink1Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_1</askboardplt:blink1Duration>
+          <askboardplt:pulseStretch askboardplt:type="led-stream-pulse-stretch-type">PULSE_STRETCH_1</askboardplt:pulseStretch>
+          <askboardplt:invertEnable askboardplt:type="boolean-type">false</askboardplt:invertEnable>
+          <askboardplt:SIP6ledClockFrequency askboardplt:type="led-stream-clock-frequency-type">1627</askboardplt:SIP6ledClockFrequency>
+          <askboardplt:ledClockPosEdgeModeEnable askboardplt:type="boolean-type">false</askboardplt:ledClockPosEdgeModeEnable>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">1</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">2</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">3</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">4</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">5</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">6</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">7</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">8</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+        </askboardplt:ledstream-configSet>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">0</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">1</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">2</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">true</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">true</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">3</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">4</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">5</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+      </askboardplt:Ledstream-interface-list>
+    </askboardplt:device-list>
+    <askboardplt:UDSFilePath askboardplt:type="std-string">/tmp/cpss_uds</askboardplt:UDSFilePath>
+    <askboardplt:serdesMux>
+      <askboardplt:serdesMuxSchemePortMod askboardplt:type="uint32">8</askboardplt:serdesMuxSchemePortMod>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+    </askboardplt:serdesMux>
+  </askboardplt:ASK-Board>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-L1-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-L1-F3_2T-128x25G.md5
new file mode 100644
index 000000000000..084f63926d4c
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-L1-F3_2T-128x25G.md5
@@ -0,0 +1 @@
+baf77e7f450def2266516782d159cbb4
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-L1-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-L1-F3_2T-128x25G.xml
new file mode 100644
index 000000000000..7a2208bf90ec
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-L1-F3_2T-128x25G.xml
@@ -0,0 +1,1891 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-09-24-1.09" profile="Askl1" sid="46b72b06-f2b0-4910-a4a3-b77166e84219">
+  <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
+    <ASKL1plt:typedefs>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>asic-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>ASIC Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ASIC_AC3X</ASKL1plt:name>
+          <ASKL1plt:description>AC3X</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ASIC_AC5X</ASKL1plt:name>
+          <ASKL1plt:description>AC5X</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ASIC_Falcon</ASKL1plt:name>
+          <ASKL1plt:description>FALCON</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>interface-mode-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported Interface modes</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1000BASE_X</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G , 2.5G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>QSGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR</ASKL1plt:name>
+          <ASKL1plt:description>10G, 12G, 20G, 40G, 100G</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR</ASKL1plt:name>
+          <ASKL1plt:description>5G, 10G, 12G, 20G, 40G</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>28</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>29</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR4</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>30</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>32</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>33</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>34</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_10G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_OUSGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_OXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-speed-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported speeds</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1G</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>10G</ASKL1plt:name>
+          <ASKL1plt:description>10G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>2500M</ASKL1plt:name>
+          <ASKL1plt:description>2.5G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>5G</ASKL1plt:name>
+          <ASKL1plt:description>5G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>25G</ASKL1plt:name>
+          <ASKL1plt:description>25G, used in combination with CPSS_PORT_INTERFACE_MODE_KR_E, CPSS_PORT_INTERFACE_MODE_KR2_E</ASKL1plt:description>
+          <ASKL1plt:value>21</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>40G</ASKL1plt:name>
+          <ASKL1plt:description>40G</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>50G</ASKL1plt:name>
+          <ASKL1plt:description>50G</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>100G</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>200G</ASKL1plt:name>
+          <ASKL1plt:description>200G</ASKL1plt:description>
+          <ASKL1plt:value>24</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>400G</ASKL1plt:name>
+          <ASKL1plt:description>400G</ASKL1plt:description>
+          <ASKL1plt:value>25</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>NA</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>fec-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enabled</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>disabled</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>both_enabled</ASKL1plt:name>
+          <ASKL1plt:description>Both enabled</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_544_514_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC 544 and 514</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>physical-port-num-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>PHYSICAL PORT NUM</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>1023</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>tx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Tx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre</ASKL1plt:name>
+          <ASKL1plt:description>pre</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post</ASKL1plt:name>
+          <ASKL1plt:description>post</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>peak</ASKL1plt:name>
+          <ASKL1plt:description>peak</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>rx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dataRate</ASKL1plt:name>
+          <ASKL1plt:description>dataRate</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res1Sel</ASKL1plt:name>
+          <ASKL1plt:description>res1Sel</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res2Sel</ASKL1plt:name>
+          <ASKL1plt:description>res2Sel</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minCap</ASKL1plt:name>
+          <ASKL1plt:description>minCap</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minCapN</ASKL1plt:name>
+          <ASKL1plt:description>minCapN</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sumfBoostTargetC0</ASKL1plt:name>
+          <ASKL1plt:description>sumfBoostTargetC0</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sumfBoostTargetC1</ASKL1plt:name>
+          <ASKL1plt:description>sumfBoostTargetC1</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sumfBoostTargetC2</ASKL1plt:name>
+          <ASKL1plt:description>sumfBoostTargetC2</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointPhaseOs0</ASKL1plt:name>
+          <ASKL1plt:description>midpointPhaseOs0</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointPhaseOs1</ASKL1plt:name>
+          <ASKL1plt:description>midpointPhaseOs1</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointPhaseOs2</ASKL1plt:name>
+          <ASKL1plt:description>midpointPhaseOs2</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmufi</ASKL1plt:name>
+          <ASKL1plt:description>selmufi</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmuff</ASKL1plt:name>
+          <ASKL1plt:description>selmuff</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupi</ASKL1plt:name>
+          <ASKL1plt:description>selmupi</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupf</ASKL1plt:name>
+          <ASKL1plt:description>selmupf</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>17</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>18</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>19</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>inxSumfMidpointAdatptiveEnLane</ASKL1plt:name>
+          <ASKL1plt:description>inxSumfMidpointAdatptiveEnLane</ASKL1plt:description>
+          <ASKL1plt:value>21</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresInitLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresInitLane</ASKL1plt:description>
+          <ASKL1plt:value>22</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresEndLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresEndLane</ASKL1plt:description>
+          <ASKL1plt:value>23</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>squelch</ASKL1plt:name>
+          <ASKL1plt:description>squelch</ASKL1plt:description>
+          <ASKL1plt:value>24</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>align90</ASKL1plt:name>
+          <ASKL1plt:description>align90</ASKL1plt:description>
+          <ASKL1plt:value>25</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sampler</ASKL1plt:name>
+          <ASKL1plt:description>sampler</ASKL1plt:description>
+          <ASKL1plt:value>26</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
+          <ASKL1plt:value>28</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>EO</ASKL1plt:name>
+          <ASKL1plt:description>EO</ASKL1plt:description>
+          <ASKL1plt:value>29</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minCap1</ASKL1plt:name>
+          <ASKL1plt:description>minCap1</ASKL1plt:description>
+          <ASKL1plt:value>30</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxCap1</ASKL1plt:name>
+          <ASKL1plt:description>maxCap1</ASKL1plt:description>
+          <ASKL1plt:value>31</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minRes1</ASKL1plt:name>
+          <ASKL1plt:description>minRes1</ASKL1plt:description>
+          <ASKL1plt:value>32</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxRes1</ASKL1plt:name>
+          <ASKL1plt:description>maxRes1</ASKL1plt:description>
+          <ASKL1plt:value>33</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>boolean-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Boolean 32 bits , due to big endian</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>false</ASKL1plt:name>
+          <ASKL1plt:description>False</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>true</ASKL1plt:name>
+          <ASKL1plt:description>True</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Serdes Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>No serdes</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>AVAGO</ASKL1plt:name>
+          <ASKL1plt:description>AVAGO</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C12G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C12G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C28G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C28G</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C112G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C112G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>phy-serdes-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Phy Serdes Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>No serdes</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C28G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C28G</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-interconnect-profile-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Enumerator of interconnect profile.</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_default</ASKL1plt:name>
+          <ASKL1plt:description>Profile Default</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_1</ASKL1plt:name>
+          <ASKL1plt:description>Profile 1</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_2</ASKL1plt:name>
+          <ASKL1plt:description>Profile 2</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+    </ASKL1plt:typedefs>
+    <ASKL1plt:ASIC_Type ASKL1plt:type="asic-type">ASIC_Falcon</ASKL1plt:ASIC_Type>
+    <ASKL1plt:IfModeName>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR2</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR2</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR2</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">50G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR2</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">50G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">10G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">disabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">200GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">200G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">200G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">200G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">200G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">200G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">10G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">400GR8</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR8</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">400G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR8</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">400G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR8</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">400G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR8</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">400G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR8</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">400G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">50G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">50G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">10G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+    </ASKL1plt:IfModeName>
+    <ASKL1plt:Port>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">0</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">0</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">1</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">2</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">3</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">4</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">5</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">6</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">7</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">8</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">8</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">9</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">10</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">11</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">12</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">13</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">14</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">15</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">16</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">16</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">17</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">18</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">19</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">20</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">21</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">22</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">23</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">24</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">24</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">25</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">26</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">27</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">28</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">29</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">30</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">31</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">32</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">32</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">33</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">34</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">35</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">36</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">37</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">38</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">39</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">40</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">40</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">41</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">42</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">43</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">44</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">45</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">46</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">47</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">48</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">48</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">49</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">50</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">51</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">52</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">53</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">54</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">55</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">56</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">56</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">57</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">58</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">59</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">60</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">64</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">65</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">66</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">67</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">67</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">68</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">69</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">70</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">71</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">72</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">73</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">74</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">75</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">75</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">76</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">77</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">78</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">79</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">80</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">81</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">82</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">83</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">83</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">84</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">85</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">86</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">87</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">88</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">89</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">90</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">91</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">91</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">92</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">93</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">94</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">95</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">96</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">97</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">98</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">99</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">99</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">100</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">101</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">102</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">103</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">104</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">105</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">106</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">107</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">107</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">108</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">109</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">110</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">111</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">112</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">113</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">114</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">115</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">115</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">116</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">117</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">118</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">119</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">120</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">121</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">122</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">123</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">true</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">123</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">124</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">125</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">126</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">127</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:X4_ifModeName>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">128</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">129</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+        <ASKL1plt:breakout-port-list>
+          <ASKL1plt:breakoutPortNumber ASKL1plt:type="physical-port-num-type">130</ASKL1plt:breakoutPortNumber>
+          <ASKL1plt:X1_ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:X1_ifModeName>
+          <ASKL1plt:X2_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X4_ifModeName ASKL1plt:type="string"/>
+          <ASKL1plt:X8_ifModeName ASKL1plt:type="string"/>
+        </ASKL1plt:breakout-port-list>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">131</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">132</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+      </ASKL1plt:port-list>
+    </ASKL1plt:Port>
+  </ASKL1plt:ASK-L1>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-PP-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-PP-F3_2T-128x25G.md5
new file mode 100644
index 000000000000..4c6962b96910
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-PP-F3_2T-128x25G.md5
@@ -0,0 +1 @@
+9699d7ac6395ccab96dec333c782dc1d
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-PP-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-PP-F3_2T-128x25G.xml
new file mode 100644
index 000000000000..7cd85e016983
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/ASK-PP-F3_2T-128x25G.xml
@@ -0,0 +1,1180 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-09-24-1.09" profile="Askpp" sid="6abefd8a-3345-40a7-b180-4e9375f341df">
+  <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
+    <askppplt:typedefs>
+      <askppplt:typedef>
+        <askppplt:name>std-string</askppplt:name>
+        <askppplt:type>string</askppplt:type>
+        <askppplt:description>standard string.</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>queue-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Queue id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>precent-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Precent</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>phaThreadId-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Thread id</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>255</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>routing-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies routing mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>POLICY_BASED_ROUTING_ONLY</askppplt:name>
+          <askppplt:description>PBR only</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>TCAM_ROUTER_BASED</askppplt:name>
+          <askppplt:description>Router engine or PBR</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>shared-table-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies table sharing modes for L3 (LPM), L2 (FDB), EM (Exact Match)</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_NO_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_NO_EM</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_MIN_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_MIN_EM</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:name>
+          <askppplt:description>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MAX_L3_MIN_L2_NO_EM</askppplt:name>
+          <askppplt:description>MAX_L3_MIN_L2_NO_EM</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-image-id-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>DEFAULT</askppplt:name>
+          <askppplt:description>Default PHA firmware image ID</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>01</askppplt:name>
+          <askppplt:description>01 firmware image ID</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>02</askppplt:name>
+          <askppplt:description>02 PHA firmware image ID</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-thread-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha thread type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_MIRRORING</askppplt:name>
+          <askppplt:description>INT_IOAM_MIRRORING</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_EGRESS_SWITCH</askppplt:name>
+          <askppplt:description>INT_IOAM_EGRESS_SWITCH</askppplt:description>
+          <askppplt:value>6</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_NO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_NO_EL</askppplt:description>
+          <askppplt:value>7</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_ONE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_ONE_EL</askppplt:description>
+          <askppplt:value>8</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_TWO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_TWO_EL</askppplt:description>
+          <askppplt:value>9</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_THREE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_THREE_EL</askppplt:description>
+          <askppplt:value>10</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>UNIFIED_SR</askppplt:name>
+          <askppplt:description>UNIFIED_SR</askppplt:description>
+          <askppplt:value>11</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:description>
+          <askppplt:value>12</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:description>
+          <askppplt:value>13</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:name>
+          <askppplt:description>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:description>
+          <askppplt:value>14</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:name>
+          <askppplt:description>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:description>
+          <askppplt:value>15</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_EGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_EGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>16</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_END_NODE</askppplt:description>
+          <askppplt:value>17</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_PENULTIMATE_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_PENULTIMATE_END_NODE</askppplt:description>
+          <askppplt:value>18</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_SEGMENT</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_SEGMENT</askppplt:description>
+          <askppplt:value>19</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:description>
+          <askppplt:value>20</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:description>
+          <askppplt:value>21</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:description>
+          <askppplt:value>22</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_ADD_MSB</askppplt:name>
+          <askppplt:description>SGT_NETWORK_ADD_MSB</askppplt:description>
+          <askppplt:value>23</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_FIX</askppplt:name>
+          <askppplt:description>SGT_NETWORK_FIX</askppplt:description>
+          <askppplt:value>24</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_REMOVE</askppplt:name>
+          <askppplt:description>SGT_NETWORK_REMOVE</askppplt:description>
+          <askppplt:value>25</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_FIX</askppplt:name>
+          <askppplt:description>SGT_EDSA_FIX</askppplt:description>
+          <askppplt:value>26</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_REMOVE</askppplt:name>
+          <askppplt:description>SGT_EDSA_REMOVE</askppplt:description>
+          <askppplt:value>27</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV4</askppplt:description>
+          <askppplt:value>28</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV6</askppplt:description>
+          <askppplt:value>29</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV4</askppplt:description>
+          <askppplt:value>30</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV6</askppplt:description>
+          <askppplt:value>31</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>PTP_PHY_1_STEP</askppplt:name>
+          <askppplt:description>PTP_PHY_1_STEP</askppplt:description>
+          <askppplt:value>32</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>EGRESS_MIRRORING_METADATA</askppplt:name>
+          <askppplt:description>EGRESS_MIRRORING_METADATA</askppplt:description>
+          <askppplt:value>33</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:description>
+          <askppplt:value>34</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:description>
+          <askppplt:value>35</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:description>
+          <askppplt:value>36</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:description>
+          <askppplt:value>37</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:description>
+          <askppplt:value>38</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:name>
+          <askppplt:description>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:description>
+          <askppplt:value>39</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_BEST_EFFORT</askppplt:name>
+          <askppplt:description>SRV6_BEST_EFFORT</askppplt:description>
+          <askppplt:value>40</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_CONTAINER</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_CONTAINER</askppplt:description>
+          <askppplt:value>41</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:description>
+          <askppplt:value>42</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:description>
+          <askppplt:value>43</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:description>
+          <askppplt:value>44</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE_COC32_GSID</askppplt:name>
+          <askppplt:description>SRV6_END_NODE_COC32_GSID</askppplt:description>
+          <askppplt:value>45</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV4_TTL_INCREMENT</askppplt:name>
+          <askppplt:description>IPV4_TTL_INCREMENT</askppplt:description>
+          <askppplt:value>46</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV6_HOP_LIMIT_INCREMENT</askppplt:name>
+          <askppplt:description>IPV6_HOP_LIMIT_INCREMENT</askppplt:description>
+          <askppplt:value>47</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:name>
+          <askppplt:description>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:description>
+          <askppplt:value>48</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV4</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV4</askppplt:description>
+          <askppplt:value>49</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV6</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV6</askppplt:description>
+          <askppplt:value>50</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SLS</askppplt:name>
+          <askppplt:description>SLS</askppplt:description>
+          <askppplt:value>51</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>trunk-member-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>NATIVE</askppplt:name>
+          <askppplt:description>NATIVE
+*  the trunk members are filled
+*  according to the order given by application.
+*  Regular trunk may hold max of 8 members.
+*  Cascade trunk may hold :
+*  max of 64 members</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>FLEX</askppplt:name>
+          <askppplt:description>FLEX
+*  A mode to allows flexibility for
+*  each Regular trunk to state it's max number of members (before starting to add members).
+*  (this mode not effect 'cascade trunk' members)
+*  Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
+*  Cascade trunk may hold : max of 64 members.</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>number-physical-port-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>AC3X/AC5X 128, falcon 64, 128, 256, 512, 1024</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>no-ports</askppplt:name>
+          <askppplt:description>no-ports</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>64-ports</askppplt:name>
+          <askppplt:description>64-ports</askppplt:description>
+          <askppplt:value>64</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>128-ports</askppplt:name>
+          <askppplt:description>128-ports</askppplt:description>
+          <askppplt:value>128</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>256-ports</askppplt:name>
+          <askppplt:description>256-ports</askppplt:description>
+          <askppplt:value>256</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>512-ports</askppplt:name>
+          <askppplt:description>512-ports</askppplt:description>
+          <askppplt:value>512</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>1024-ports</askppplt:name>
+          <askppplt:description>1024-ports</askppplt:description>
+          <askppplt:value>1024</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>serdes-ref-clock-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies serdes refernce clock.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>external_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_125_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_125_DIFF</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_DIFF</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>internal_125</askppplt:name>
+          <askppplt:description>INTERNAL_125</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>cpu-port-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>CPU port id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>rx-buffer-size-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Rx Buffer size</askppplt:description>
+        <askppplt:min>64</askppplt:min>
+        <askppplt:max>10240</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>tx-sdma-queue-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies TX queue mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Normal</askppplt:name>
+          <askppplt:description>Application</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Packet_Generator</askppplt:name>
+          <askppplt:description>Traffic generator</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>alloc-method-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Dynamic_Alloc</askppplt:name>
+          <askppplt:description>Dynamic</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Static_Alloc</askppplt:name>
+          <askppplt:description>Static</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>au_mesage_lenght-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>4_words</askppplt:name>
+          <askppplt:description>4 Words</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>8_words</askppplt:name>
+          <askppplt:description>8 Words</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>boolean-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Boolean 32 bits , due to bing endian</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>false</askppplt:name>
+          <askppplt:description>False</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>true</askppplt:name>
+          <askppplt:description>True</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>asic-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>ASIC Type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC3X</askppplt:name>
+          <askppplt:description>AC3X</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC5X</askppplt:name>
+          <askppplt:description>AC5X</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_Falcon</askppplt:name>
+          <askppplt:description>FALCON</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+    </askppplt:typedefs>
+    <askppplt:ASIC_Type askppplt:type="asic-type">ASIC_Falcon</askppplt:ASIC_Type>
+    <askppplt:PPInit>
+      <askppplt:PP-name askppplt:type="std-string">Falcon-3.2</askppplt:PP-name>
+      <askppplt:Phase1>
+        <askppplt:coreClock askppplt:type="uint32">4294967295</askppplt:coreClock>
+        <askppplt:serdesRefClock askppplt:type="serdes-ref-clock-type">external_25_single_ended</askppplt:serdesRefClock>
+        <askppplt:isrAddrCompletionRegionsBmp askppplt:type="uint32">2</askppplt:isrAddrCompletionRegionsBmp>
+        <askppplt:appAddrCompletionRegionsBmp askppplt:type="uint32">60</askppplt:appAddrCompletionRegionsBmp>
+        <askppplt:maxNumOfPhyPortsToUse askppplt:type="number-physical-port-type">256-ports</askppplt:maxNumOfPhyPortsToUse>
+        <askppplt:tcamParityCalcEnable askppplt:type="boolean-type">false</askppplt:tcamParityCalcEnable>
+        <askppplt:apEnable askppplt:type="boolean-type">true</askppplt:apEnable>
+        <askppplt:numOfDataIntegrityElements askppplt:type="uint32">0</askppplt:numOfDataIntegrityElements>
+      </askppplt:Phase1>
+      <askppplt:Phase2>
+        <askppplt:useMultiNetIfSdma askppplt:type="boolean-type">true</askppplt:useMultiNetIfSdma>
+        <askppplt:auqCfg>
+          <askppplt:auDescNum askppplt:type="uint32">4096</askppplt:auDescNum>
+        </askppplt:auqCfg>
+        <askppplt:fuqCfg>
+          <askppplt:fuDescNum askppplt:type="uint32">2048</askppplt:fuDescNum>
+        </askppplt:fuqCfg>
+        <askppplt:multiNetIfCfg>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">256</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">256</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">144</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">1</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">1</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">3032</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+        </askppplt:multiNetIfCfg>
+        <askppplt:internal>
+          <askppplt:fuqUseSeparate askppplt:type="boolean-type">false</askppplt:fuqUseSeparate>
+          <askppplt:useSecondaryAuq askppplt:type="boolean-type">false</askppplt:useSecondaryAuq>
+          <askppplt:noTraffic2CPU askppplt:type="boolean-type">false</askppplt:noTraffic2CPU>
+          <askppplt:netifSdmaPortGroupId askppplt:type="uint32">0</askppplt:netifSdmaPortGroupId>
+          <askppplt:auMessageLength askppplt:type="au_mesage_lenght-type">8_words</askppplt:auMessageLength>
+          <askppplt:useDoubleAuq askppplt:type="boolean-type">false</askppplt:useDoubleAuq>
+        </askppplt:internal>
+      </askppplt:Phase2>
+      <askppplt:LogicalInit>
+        <askppplt:routingMode askppplt:type="routing-mode-type">TCAM_ROUTER_BASED</askppplt:routingMode>
+        <askppplt:maxNumOfPbrEntries askppplt:type="uint32">0</askppplt:maxNumOfPbrEntries>
+        <askppplt:sharedTableMode askppplt:type="shared-table-mode-type">MID_L3_MID_L2_NO_EM</askppplt:sharedTableMode>
+        <askppplt:ingressDropEnable askppplt:type="boolean-type">false</askppplt:ingressDropEnable>
+      </askppplt:LogicalInit>
+      <askppplt:LibInit>
+        <askppplt:initBridge askppplt:type="boolean-type">true</askppplt:initBridge>
+        <askppplt:initMirror askppplt:type="boolean-type">true</askppplt:initMirror>
+        <askppplt:initNetIf askppplt:type="boolean-type">true</askppplt:initNetIf>
+        <askppplt:initPhy askppplt:type="boolean-type">true</askppplt:initPhy>
+        <askppplt:initPort askppplt:type="boolean-type">true</askppplt:initPort>
+        <askppplt:initTrunk askppplt:type="boolean-type">true</askppplt:initTrunk>
+        <askppplt:Trunk-params>
+          <askppplt:maxNumberOfTrunks askppplt:type="uint32">1023</askppplt:maxNumberOfTrunks>
+          <askppplt:trunkMembersMode askppplt:type="trunk-member-mode-type">FLEX</askppplt:trunkMembersMode>
+        </askppplt:Trunk-params>
+        <askppplt:initPcl askppplt:type="boolean-type">true</askppplt:initPcl>
+        <askppplt:initTcam askppplt:type="boolean-type">true</askppplt:initTcam>
+        <askppplt:initPolicer askppplt:type="boolean-type">true</askppplt:initPolicer>
+        <askppplt:initPha askppplt:type="boolean-type">true</askppplt:initPha>
+        <askppplt:Pha-params>
+          <askppplt:packetOrderChangeEnable askppplt:type="boolean-type">false</askppplt:packetOrderChangeEnable>
+          <askppplt:phaFwImageId askppplt:type="pha-firmware-image-id-type">02</askppplt:phaFwImageId>
+          <askppplt:phaFwImageIdVersion askppplt:type="uint32">0</askppplt:phaFwImageIdVersion>
+        </askppplt:Pha-params>
+      </askppplt:LibInit>
+    </askppplt:PPInit>
+  </askppplt:ASK-PP>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/SAI-F3_2T-128x25G.md5 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/SAI-F3_2T-128x25G.md5
new file mode 100644
index 000000000000..cfa1a375d83b
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/SAI-F3_2T-128x25G.md5
@@ -0,0 +1 @@
+88cbf08802a5d41b605a8dd83f2c5139
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/SAI-F3_2T-128x25G.xml b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/SAI-F3_2T-128x25G.xml
new file mode 100644
index 000000000000..635a099a35aa
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/SAI-F3_2T-128x25G.xml
@@ -0,0 +1,900 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-09-24-1.09" profile="SAI" sid="b48431f8-351b-4524-babb-1ce99b72cd68">
+  <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
+    <SAIplt:typedefs>
+      <SAIplt:typedef>
+        <SAIplt:name>device-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Device ID 0..1</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>port-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Interface number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1023</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>logDest-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Logging Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_SYSLOG</SAIplt:name>
+          <SAIplt:description>SYSLOG  {Syslog service should be running to use this option}</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_CONSOLE</SAIplt:name>
+          <SAIplt:description>CONSOLE</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_FILE</SAIplt:name>
+          <SAIplt:description>FILE  {Warning !!! Use with caution. Can cause disk full issues}</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>InDropCounter-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Router In Drop Reason Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>TTL_HOPLIMIT_EXCEEDED</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track TTL &amp; Hop Limit Exceeded Packets</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ROUTE_BLACKHOLE</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>Feature-enable</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Feature Enabled/Disabled</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>Disabled</SAIplt:name>
+          <SAIplt:description>Disabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>Enabled</SAIplt:name>
+          <SAIplt:description>Enabled</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>log-dest-file-path-type</SAIplt:name>
+        <SAIplt:type>string</SAIplt:type>
+        <SAIplt:description>A string with path to file for logging feature</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>30</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>acl-feature-name-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>port-sFlow</SAIplt:name>
+          <SAIplt:description>SFlow over Port</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>port-counters-ipv4-ipv6</SAIplt:name>
+          <SAIplt:description>Port ipv4/ipv6 counters</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>control-acl</SAIplt:name>
+          <SAIplt:description>ACLs for control packet handling</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>debug-counter-acl</SAIplt:name>
+          <SAIplt:description>ACLs for Debug Counters</SAIplt:description>
+          <SAIplt:value>3</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>ingress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL0</SAIplt:name>
+          <SAIplt:description>Stage IPCL0</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL1</SAIplt:name>
+          <SAIplt:description>Stage IPCL1</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>egress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>EPCL0</SAIplt:name>
+          <SAIplt:description>Stage EPCL0</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>feature-priority-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Feature priority</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>15</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>hit-number-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Hit/lookup number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>3</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>asic-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>ASIC Type</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC3X</SAIplt:name>
+          <SAIplt:description>AC3X</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC5X</SAIplt:name>
+          <SAIplt:description>AC5X</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_Falcon</SAIplt:name>
+          <SAIplt:description>FALCON</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+    </SAIplt:typedefs>
+    <SAIplt:ASIC_Type SAIplt:type="asic-type">ASIC_Falcon</SAIplt:ASIC_Type>
+    <SAIplt:ASK-BOARD-Profile-Name SAIplt:type="string">ASK-Board-F3_2T-128x25G.xml</SAIplt:ASK-BOARD-Profile-Name>
+    <SAIplt:Ports>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">0</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">0</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">1</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">1</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">2</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">2</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">3</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">3</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">4</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">4</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">5</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">5</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">6</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">6</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">7</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">7</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">8</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">8</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">9</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">9</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">10</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">10</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">11</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">11</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">12</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">12</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">13</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">13</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">14</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">14</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">15</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">15</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">16</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">16</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">17</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">17</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">18</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">18</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">19</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">19</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">20</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">20</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">21</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">21</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">22</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">22</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">23</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">23</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">24</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">24</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">25</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">25</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">26</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">26</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">27</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">27</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">28</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">28</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">29</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">29</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">30</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">30</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">31</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">31</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">32</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">32</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">33</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">33</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">34</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">34</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">35</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">35</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">36</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">36</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">37</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">37</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">38</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">38</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">39</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">39</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">40</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">40</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">41</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">41</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">42</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">42</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">43</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">43</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">44</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">44</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">45</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">45</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">46</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">46</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">47</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">47</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">48</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">48</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">49</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">49</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">50</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">50</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">51</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">51</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">52</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">52</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">53</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">53</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">54</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">54</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">55</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">55</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">56</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">56</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">57</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">57</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">58</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">58</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">59</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">59</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">60</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">60</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">61</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">64</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">62</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">65</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">63</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">66</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">64</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">67</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">65</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">68</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">66</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">69</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">67</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">70</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">68</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">71</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">69</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">72</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">70</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">73</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">71</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">74</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">72</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">75</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">73</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">76</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">74</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">77</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">75</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">78</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">76</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">79</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">77</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">80</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">78</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">81</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">79</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">82</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">80</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">83</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">81</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">84</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">82</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">85</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">83</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">86</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">84</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">87</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">85</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">88</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">86</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">89</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">87</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">90</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">88</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">91</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">89</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">92</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">90</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">93</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">91</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">94</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">92</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">95</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">93</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">96</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">94</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">97</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">95</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">98</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">96</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">99</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">97</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">100</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">98</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">101</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">99</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">102</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">100</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">103</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">101</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">104</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">102</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">105</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">103</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">106</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">104</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">107</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">105</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">108</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">106</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">109</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">107</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">110</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">108</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">111</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">109</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">112</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">110</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">113</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">111</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">114</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">112</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">115</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">113</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">116</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">114</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">117</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">115</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">118</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">116</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">119</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">117</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">120</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">118</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">121</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">119</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">122</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">120</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">123</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">121</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">124</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">122</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">125</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">123</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">126</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">124</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">127</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">125</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">128</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">126</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">129</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">127</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">130</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">128</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">131</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">129</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">132</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+    </SAIplt:Ports>
+    <SAIplt:scalingFalcon>
+      <SAIplt:max_lag_members SAIplt:type="uint32">8</SAIplt:max_lag_members>
+      <SAIplt:max_route_ipv4 SAIplt:type="uint32">0</SAIplt:max_route_ipv4>
+      <SAIplt:max_route_ipv6 SAIplt:type="uint32">0</SAIplt:max_route_ipv6>
+      <SAIplt:max_Nh_Ecmp_Mbr_Per_Grp SAIplt:type="uint32">64</SAIplt:max_Nh_Ecmp_Mbr_Per_Grp>
+      <SAIplt:max_ipv4_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv4_tunnel>
+      <SAIplt:max_ipv6_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv6_tunnel>
+      <SAIplt:max_tti SAIplt:type="uint32">1024</SAIplt:max_tti>
+      <SAIplt:wred_size SAIplt:type="uint32">0</SAIplt:wred_size>
+      <SAIplt:max_nat SAIplt:type="uint32">0</SAIplt:max_nat>
+    </SAIplt:scalingFalcon>
+    <SAIplt:Counters>
+      <SAIplt:cnc-base-list>
+        <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
+      </SAIplt:cnc-base-list>
+      <SAIplt:Queue-counter>
+        <SAIplt:queue-pass-drop-counter SAIplt:type="Feature-enable">Enabled</SAIplt:queue-pass-drop-counter>
+        <SAIplt:queue-watermark-counter SAIplt:type="Feature-enable">Enabled</SAIplt:queue-watermark-counter>
+      </SAIplt:Queue-counter>
+      <SAIplt:Port-counter>
+        <SAIplt:port-in-discard-counter SAIplt:type="Feature-enable">Enabled</SAIplt:port-in-discard-counter>
+      </SAIplt:Port-counter>
+    </SAIplt:Counters>
+    <SAIplt:Logging>
+      <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>
+    </SAIplt:Logging>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">control-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">3</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-sFlow</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">4</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-counters-ipv4-ipv6</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">5</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">3</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">debug-counter-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">2</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+  </SAIplt:SAI>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers.json.j2 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers.json.j2
new file mode 100644
index 000000000000..0b1cb2c541b6
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers_defaults_t0.j2 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers_defaults_t0.j2
new file mode 100644
index 000000000000..28e30dee8cc3
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers_defaults_t0.j2
@@ -0,0 +1,49 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_pool1": {
+            "mode": "dynamic",
+            "size": "10500000",
+            "type": "ingress"
+        },
+        "ingress_pool2": {
+            "mode": "dynamic",
+            "size": "1000000",
+            "type": "ingress"
+        },
+        "egress_pool1": {
+            "mode": "dynamic",
+            "size": "10500000",
+            "type": "egress"
+        },
+        "egress_pool2": {
+            "mode": "dynamic",
+            "size": "1000000",
+            "type": "egress"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "egress_lossless_profile": {
+            "pool": "egress_pool1",
+            "size": "0",
+            "dynamic_th": "1"
+        },
+        "egress_lossy_profile": {
+            "pool": "egress_pool2",
+            "size": "0",
+            "dynamic_th": "1"
+        },
+        "ingress_lossless_profile": {
+            "pool": "ingress_pool1",
+            "size": "0",
+            "dynamic_th": "-3"
+        },
+        "ingress_lossy_profile": {
+            "pool": "ingress_pool2",
+            "size": "0",
+            "dynamic_th": "-3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers_defaults_t1.j2 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers_defaults_t1.j2
new file mode 100644
index 000000000000..28e30dee8cc3
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/buffers_defaults_t1.j2
@@ -0,0 +1,49 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_pool1": {
+            "mode": "dynamic",
+            "size": "10500000",
+            "type": "ingress"
+        },
+        "ingress_pool2": {
+            "mode": "dynamic",
+            "size": "1000000",
+            "type": "ingress"
+        },
+        "egress_pool1": {
+            "mode": "dynamic",
+            "size": "10500000",
+            "type": "egress"
+        },
+        "egress_pool2": {
+            "mode": "dynamic",
+            "size": "1000000",
+            "type": "egress"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "egress_lossless_profile": {
+            "pool": "egress_pool1",
+            "size": "0",
+            "dynamic_th": "1"
+        },
+        "egress_lossy_profile": {
+            "pool": "egress_pool2",
+            "size": "0",
+            "dynamic_th": "1"
+        },
+        "ingress_lossless_profile": {
+            "pool": "ingress_pool1",
+            "size": "0",
+            "dynamic_th": "-3"
+        },
+        "ingress_lossy_profile": {
+            "pool": "ingress_pool2",
+            "size": "0",
+            "dynamic_th": "-3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/create_only_config_db_buffers.json b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/create_only_config_db_buffers.json
new file mode 100644
index 000000000000..8bea3894c083
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/create_only_config_db_buffers.json
@@ -0,0 +1,7 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "create_only_config_db_buffers": "true"
+        }
+    }
+}
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/hwsku.json b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/hwsku.json
new file mode 100644
index 000000000000..f6745e836052
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/hwsku.json
@@ -0,0 +1,204 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet4": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet12": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet20": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet28": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet36": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet44": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet52": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet60": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet68": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet76": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet84": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet92": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet100": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet108": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet116": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "2x100G",
+            "subport": "1",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet124": {
+            "default_brkout_mode": "2x100G",
+            "subport": "2",
+            "autoneg": "on",
+            "fec": "none"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x10G",
+            "autoneg": "off"
+        },
+        "Ethernet129": {
+            "default_brkout_mode": "1x10G",
+            "autoneg": "off"
+        }
+    }
+}
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/port_config.ini b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/port_config.ini
new file mode 100644
index 000000000000..85d256856fb8
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/port_config.ini
@@ -0,0 +1,131 @@
+#  name                               lanes      alias       speed  autoneg   fec    index
+Ethernet0                                0       Eth1/1       25000    on     none     1
+Ethernet1                                1       Eth1/2       25000    on     none     1
+Ethernet2                                2       Eth1/3       25000    on     none     1
+Ethernet3                                3       Eth1/4       25000    on     none     1
+Ethernet4                                4       Eth1/5       25000    on     none     1
+Ethernet5                                5       Eth1/6       25000    on     none     1
+Ethernet6                                6       Eth1/7       25000    on     none     1
+Ethernet7                                7       Eth1/8       25000    on     none     1
+Ethernet8                                8       Eth2/1       25000    on     none     2
+Ethernet9                                9       Eth2/2       25000    on     none     2
+Ethernet10                              10       Eth2/3       25000    on     none     2
+Ethernet11                              11       Eth2/4       25000    on     none     2
+Ethernet12                              12       Eth2/5       25000    on     none     2
+Ethernet13                              13       Eth2/6       25000    on     none     2
+Ethernet14                              14       Eth2/7       25000    on     none     2
+Ethernet15                              15       Eth2/8       25000    on     none     2
+Ethernet16                              16       Eth3/1       25000    on     none     3
+Ethernet17                              17       Eth3/2       25000    on     none     3
+Ethernet18                              18       Eth3/3       25000    on     none     3
+Ethernet19                              19       Eth3/4       25000    on     none     3
+Ethernet20                              20       Eth3/5       25000    on     none     3
+Ethernet21                              21       Eth3/6       25000    on     none     3
+Ethernet22                              22       Eth3/7       25000    on     none     3
+Ethernet23                              23       Eth3/8       25000    on     none     3
+Ethernet24                              24       Eth4/1       25000    on     none     4
+Ethernet25                              25       Eth4/2       25000    on     none     4
+Ethernet26                              26       Eth4/3       25000    on     none     4
+Ethernet27                              27       Eth4/4       25000    on     none     4
+Ethernet28                              28       Eth4/5       25000    on     none     4
+Ethernet29                              29       Eth4/6       25000    on     none     4
+Ethernet30                              30       Eth4/7       25000    on     none     4
+Ethernet31                              31       Eth4/8       25000    on     none     4
+Ethernet32                              32       Eth5/1       25000    on     none     5
+Ethernet33                              33       Eth5/2       25000    on     none     5
+Ethernet34                              34       Eth5/3       25000    on     none     5
+Ethernet35                              35       Eth5/4       25000    on     none     5
+Ethernet36                              36       Eth5/5       25000    on     none     5
+Ethernet37                              37       Eth5/6       25000    on     none     5
+Ethernet38                              38       Eth5/7       25000    on     none     5
+Ethernet39                              39       Eth5/8       25000    on     none     5
+Ethernet40                              40       Eth6/1       25000    on     none     6
+Ethernet41                              41       Eth6/2       25000    on     none     6
+Ethernet42                              42       Eth6/3       25000    on     none     6
+Ethernet43                              43       Eth6/4       25000    on     none     6
+Ethernet44                              44       Eth6/5       25000    on     none     6
+Ethernet45                              45       Eth6/6       25000    on     none     6
+Ethernet46                              46       Eth6/7       25000    on     none     6
+Ethernet47                              47       Eth6/8       25000    on     none     6
+Ethernet48                              48       Eth7/1       25000    on     none     7
+Ethernet49                              49       Eth7/2       25000    on     none     7
+Ethernet50                              50       Eth7/3       25000    on     none     7
+Ethernet51                              51       Eth7/4       25000    on     none     7
+Ethernet52                              52       Eth7/5       25000    on     none     7
+Ethernet53                              53       Eth7/6       25000    on     none     7
+Ethernet54                              54       Eth7/7       25000    on     none     7
+Ethernet55                              55       Eth7/8       25000    on     none     7
+Ethernet56                              56       Eth8/1       25000    on     none     8
+Ethernet57                              57       Eth8/2       25000    on     none     8
+Ethernet58                              58       Eth8/3       25000    on     none     8
+Ethernet59                              59       Eth8/4       25000    on     none     8
+Ethernet60                              60       Eth8/5       25000    on     none     8
+Ethernet61                              61       Eth8/6       25000    on     none     8
+Ethernet62                              62       Eth8/7       25000    on     none     8
+Ethernet63                              63       Eth8/8       25000    on     none     8
+Ethernet64                              64       Eth9/1       25000    on     none     9
+Ethernet65                              65       Eth9/2       25000    on     none     9
+Ethernet66                              66       Eth9/3       25000    on     none     9
+Ethernet67                              67       Eth9/4       25000    on     none     9
+Ethernet68                              68       Eth9/5       25000    on     none     9
+Ethernet69                              69       Eth9/6       25000    on     none     9
+Ethernet70                              70       Eth9/7       25000    on     none     9
+Ethernet71                              71       Eth9/8       25000    on     none     9
+Ethernet72                              72      Eth10/1       25000    on     none    10
+Ethernet73                              73      Eth10/2       25000    on     none    10
+Ethernet74                              74      Eth10/3       25000    on     none    10
+Ethernet75                              75      Eth10/4       25000    on     none    10
+Ethernet76                              76      Eth10/5       25000    on     none    10
+Ethernet77                              77      Eth10/6       25000    on     none    10
+Ethernet78                              78      Eth10/7       25000    on     none    10
+Ethernet79                              79      Eth10/8       25000    on     none    10
+Ethernet80                              80      Eth11/1       25000    on     none    11
+Ethernet81                              81      Eth11/2       25000    on     none    11
+Ethernet82                              82      Eth11/3       25000    on     none    11
+Ethernet83                              83      Eth11/4       25000    on     none    11
+Ethernet84                              84      Eth11/5       25000    on     none    11
+Ethernet85                              85      Eth11/6       25000    on     none    11
+Ethernet86                              86      Eth11/7       25000    on     none    11
+Ethernet87                              87      Eth11/8       25000    on     none    11
+Ethernet88                              88      Eth12/1       25000    on     none    12
+Ethernet89                              89      Eth12/2       25000    on     none    12
+Ethernet90                              90      Eth12/3       25000    on     none    12
+Ethernet91                              91      Eth12/4       25000    on     none    12
+Ethernet92                              92      Eth12/5       25000    on     none    12
+Ethernet93                              93      Eth12/6       25000    on     none    12
+Ethernet94                              94      Eth12/7       25000    on     none    12
+Ethernet95                              95      Eth12/8       25000    on     none    12
+Ethernet96                              96      Eth13/1       25000    on     none    13
+Ethernet97                              97      Eth13/2       25000    on     none    13
+Ethernet98                              98      Eth13/3       25000    on     none    13
+Ethernet99                              99      Eth13/4       25000    on     none    13
+Ethernet100                            100      Eth13/5       25000    on     none    13
+Ethernet101                            101      Eth13/6       25000    on     none    13
+Ethernet102                            102      Eth13/7       25000    on     none    13
+Ethernet103                            103      Eth13/8       25000    on     none    13
+Ethernet104                            104      Eth14/1       25000    on     none    14
+Ethernet105                            105      Eth14/2       25000    on     none    14
+Ethernet106                            106      Eth14/3       25000    on     none    14
+Ethernet107                            107      Eth14/4       25000    on     none    14
+Ethernet108                            108      Eth14/5       25000    on     none    14
+Ethernet109                            109      Eth14/6       25000    on     none    14
+Ethernet110                            110      Eth14/7       25000    on     none    14
+Ethernet111                            111      Eth14/8       25000    on     none    14
+Ethernet112                            112      Eth15/1       25000    on     none    15
+Ethernet113                            113      Eth15/2       25000    on     none    15
+Ethernet114                            114      Eth15/3       25000    on     none    15
+Ethernet115                            115      Eth15/4       25000    on     none    15
+Ethernet116                            116      Eth15/5       25000    on     none    15
+Ethernet117                            117      Eth15/6       25000    on     none    15
+Ethernet118                            118      Eth15/7       25000    on     none    15
+Ethernet119                            119      Eth15/8       25000    on     none    15
+Ethernet120                            120      Eth16/1       25000    on     none    16
+Ethernet121                            121      Eth16/2       25000    on     none    16
+Ethernet122                            122      Eth16/3       25000    on     none    16
+Ethernet123                            123      Eth16/4       25000    on     none    16
+Ethernet124                            124      Eth16/5       25000    on     none    16
+Ethernet125                            125      Eth16/6       25000    on     none    16
+Ethernet126                            126      Eth16/7       25000    on     none    16
+Ethernet127                            127      Eth16/8       25000    on     none    16
+Ethernet128                            128        Eth17       10000   off     none   129
+Ethernet129                            129        Eth17       10000   off     none   130
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/profile.ini b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/profile.ini
new file mode 100644
index 000000000000..c2f77685ad0a
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/profile.ini
@@ -0,0 +1 @@
+switchMacAddress=00:01:02:03:04:05
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/qos.json.j2 b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/qos.json.j2
new file mode 100644
index 000000000000..3e548325ea30
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/sai.profile b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/sai.profile
new file mode 100644
index 000000000000..2477a839e09e
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/db98cx8522_10cc/sai.profile
@@ -0,0 +1,4 @@
+mode=1
+hwId=FC128x25G
+switchProfile=/usr/share/sonic/hwsku/SAI-F3_2T-128x25G.xml
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/profile.ini
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/default_sku b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/default_sku
new file mode 100644
index 000000000000..a88ea359eef8
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/default_sku
@@ -0,0 +1 @@
+db98cx8522_10cc t1
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform.json b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform.json
new file mode 100644
index 000000000000..205de6cf42f1
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform.json
@@ -0,0 +1,146 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "breakout_modes": {
+                "2x100G": ["Eth1/1", "Eth1/2"],
+                "8x25G[10G]": ["Eth1/1", "Eth1/2", "Eth1/3", "Eth1/4", "Eth1/5", "Eth1/6", "Eth1/7", "Eth1/8"]
+            },
+            "index": "1,1,1,1,1,1,1,1",
+            "lanes": "0,1,2,3,4,5,6,7"
+        },
+        "Ethernet8": {
+            "breakout_modes": {
+                "2x100G": ["Eth2/1", "Eth2/2"],
+                "8x50G[10G]": ["Eth2/1", "Eth2/2", "Eth2/3", "Eth2/4", "Eth2/5", "Eth2/6", "Eth2/7", "Eth2/8"]
+            },
+            "index": "2,2,2,2,2,2,2,2",
+            "lanes": "8,9,10,11,12,13,14,15"
+        },
+        "Ethernet16": {
+            "breakout_modes": {
+                "2x100G": ["Eth3/1", "Eth3/2"],
+                "8x50G[10G]": ["Eth3/1", "Eth3/2", "Eth3/3", "Eth3/4", "Eth3/5", "Eth3/6", "Eth3/7", "Eth3/8"]
+            },
+            "index": "3,3,3,3,3,3,3,3",
+            "lanes": "16,17,18,19,20,21,22,23"
+        },
+        "Ethernet24": {
+            "breakout_modes": {
+                "2x100G": ["Eth4/1", "Eth4/2"],
+                "8x50G[10G]": ["Eth4/1", "Eth4/2", "Eth4/3", "Eth4/4", "Eth4/5", "Eth4/6", "Eth4/7", "Eth4/8"]
+            },
+            "index": "4,4,4,4,4,4,4,4",
+            "lanes": "24,25,26,27,28,29,30,31"
+        },
+        "Ethernet32": {
+            "breakout_modes": {
+                "2x100G": ["Eth5/1", "Eth5/2"],
+                "8x50G[10G]": ["Eth5/1", "Eth5/2", "Eth5/3", "Eth5/4", "Eth5/5", "Eth5/6", "Eth5/7", "Eth5/8"]
+            },
+            "index": "5,5,5,5,5,5,5,5",
+            "lanes": "32,33,34,35,36,37,38,39"
+        },
+        "Ethernet40": {
+            "breakout_modes": {
+                "2x100G": ["Eth6/1", "Eth6/2"],
+                "8x50G[10G]": ["Eth6/1", "Eth6/2", "Eth6/3", "Eth6/4", "Eth6/5", "Eth6/6", "Eth6/7", "Eth6/8"]
+            },
+            "index": "6,6,6,6,6,6,6,6",
+            "lanes": "40,41,42,43,44,45,46,47"
+        },
+        "Ethernet48": {
+            "breakout_modes": {
+                "2x100G": ["Eth7/1", "Eth7/2"],
+                "8x50G[10G]": ["Eth7/1", "Eth7/2", "Eth7/3", "Eth7/4", "Eth7/5", "Eth7/6", "Eth7/7", "Eth7/8"]
+            },
+            "index": "7,7,7,7,7,7,7,7",
+            "lanes": "48,49,50,51,52,53,54,55"
+        },
+        "Ethernet56": {
+            "breakout_modes": {
+                "2x100G": ["Eth8/1", "Eth8/2"],
+                "8x50G[10G]": ["Eth8/1", "Eth8/2", "Eth8/3", "Eth8/4", "Eth8/5", "Eth8/6", "Eth8/7", "Eth8/8"]
+            },
+            "index": "8,8,8,8,8,8,8,8",
+            "lanes": "56,57,58,59,60,61,62,63"
+        },
+        "Ethernet64": {
+            "breakout_modes": {
+                "2x100G": ["Eth9/1", "Eth9/2"],
+                "8x50G[10G]": ["Eth9/1", "Eth9/2", "Eth9/3", "Eth9/4", "Eth9/5", "Eth9/6", "Eth9/7", "Eth9/8"]
+            },
+            "index": "9,9,9,9,9,9,9,9",
+            "lanes": "64,65,66,67,68,69,70,71"
+        },
+        "Ethernet72": {
+            "breakout_modes": {
+                "2x100G": ["Eth10/1", "Eth10/2"],
+                "8x50G[10G]": ["Eth10/1", "Eth10/2", "Eth10/3", "Eth10/4", "Eth10/5", "Eth10/6", "Eth10/7", "Eth10/8"]
+            },
+            "index": "10,10,10,10,10,10,10,10",
+            "lanes": "72,73,74,75,76,77,78,79"
+        },
+        "Ethernet80": {
+            "breakout_modes": {
+                "2x100G": ["Eth11/1", "Eth11/2"],
+                "8x50G[10G]": ["Eth11/1", "Eth11/2", "Eth11/3", "Eth11/4", "Eth11/5", "Eth11/6", "Eth11/7", "Eth11/8"]
+            },
+            "index": "11,11,11,11,11,11,11,11",
+            "lanes": "80,81,82,83,84,85,86,87"
+        },
+        "Ethernet88": {
+            "breakout_modes": {
+                "2x100G": ["Eth12/1", "Eth12/2"],
+                "8x50G[10G]": ["Eth12/1", "Eth12/2", "Eth12/3", "Eth12/4", "Eth12/5", "Eth12/6", "Eth12/7", "Eth12/8"]
+            },
+            "index": "12,12,12,12,12,12,12,12",
+            "lanes": "88,89,90,91,92,93,94,95"
+        },
+        "Ethernet96": {
+            "breakout_modes": {
+                "2x100G": ["Eth13/1", "Eth13/2"],
+                "8x50G[10G]": ["Eth13/1", "Eth13/2", "Eth13/3", "Eth13/4", "Eth13/5", "Eth13/6", "Eth13/7", "Eth13/8"]
+            },
+            "index": "13,13,13,13,13,13,13,13",
+            "lanes": "96,97,98,99,100,101,102,103"
+        },
+        "Ethernet104": {
+            "breakout_modes": {
+                "2x100G": ["Eth14/1", "Eth14/2"],
+                "8x50G[10G]": ["Eth14/1", "Eth14/2", "Eth14/3", "Eth14/4", "Eth14/5", "Eth14/6", "Eth14/7", "Eth14/8"]
+            },
+            "index": "14,14,14,14,14,14,14,14",
+            "lanes": "104,105,106,107,108,109,110,111"
+        },
+        "Ethernet112": {
+            "breakout_modes": {
+                "2x100G": ["Eth15/1", "Eth15/2"],
+                "8x50G[10G]": ["Eth15/1", "Eth15/2", "Eth15/3", "Eth15/4", "Eth15/5", "Eth15/6", "Eth15/7", "Eth15/8"]
+            },
+            "index": "15,15,15,15,15,15,15,15",
+            "lanes": "112,113,114,115,116,117,118,119"
+        },
+        "Ethernet120": {
+            "breakout_modes": {
+                "2x100G": ["Eth16/1", "Eth16/2"],
+                "8x50G[10G]": ["Eth16/1", "Eth16/2", "Eth16/3", "Eth16/4", "Eth16/5", "Eth16/6", "Eth16/7", "Eth16/8"]
+            },
+            "index": "16,16,16,16,16,16,16,16",
+            "lanes": "120,121,122,123,124,125,126,127"
+        },
+        "Ethernet128":{
+            "breakout_modes": {
+                "1x10G": ["Eth17"]
+            },
+            "index": "17",
+            "lanes": "128"
+        },
+        "Ethernet129":{
+            "breakout_modes": {
+                "1x10G": ["Eth18"]
+            },
+            "index": "18",
+            "lanes": "129"
+        }
+    }
+}
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform_asic b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform_asic
new file mode 100644
index 000000000000..a554752878b7
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/platform_asic
@@ -0,0 +1 @@
+marvell
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/pmon_daemon_control.json b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/pmon_daemon_control.json
new file mode 100644
index 000000000000..39deb88be078
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/pmon_daemon_control.json
@@ -0,0 +1,8 @@
+{
+    "skip_ledd": true,
+    "skip_pcied": true,
+    "skip_thermalctld": true,
+    "skip_psud": true,
+    "skip_xcvrd": true,
+    "skip_syseepromd": true
+}
diff --git a/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/system_health_monitoring_config.json b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000000..79c17103bf76
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8522_10cc-r0/system_health_monitoring_config.json
@@ -0,0 +1,10 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu.temperature",
+        "fan",
+        "psu"
+    ],
+    "user_defined_checkers": []
+}
diff --git a/platform/marvell/mrvl-prestera b/platform/marvell/mrvl-prestera
index 9608c8c41e46..f3735bec489c 160000
--- a/platform/marvell/mrvl-prestera
+++ b/platform/marvell/mrvl-prestera
@@ -1 +1 @@
-Subproject commit 9608c8c41e462998cd144ed34780e34f1b48e081
+Subproject commit f3735bec489c8475d2dcc0b0b5d5a810a6ee919e
diff --git a/platform/marvell/one-image.mk b/platform/marvell/one-image.mk
index b58a6179c255..be282e921abb 100644
--- a/platform/marvell/one-image.mk
+++ b/platform/marvell/one-image.mk
@@ -21,6 +21,7 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(AC5X_RD98DX35xx_PLATFORM)
 $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(FALCON_DB98CX8580_32CD_PLATFORM)
 $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(FALCON_DB98CX8540_16CD_PLATFORM)
 $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(FALCON_DB98CX8514_10CC_PLATFORM)
+$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(FALCON_DB98CX8522_10CC_PLATFORM)
 endif
 ifeq ($(INSTALL_DEBUG_TOOLS),y)
 $(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES)
diff --git a/platform/marvell/platform-marvell.mk b/platform/marvell/platform-marvell.mk
index c4f237757c95..eec94d18a11c 100644
--- a/platform/marvell/platform-marvell.mk
+++ b/platform/marvell/platform-marvell.mk
@@ -36,4 +36,7 @@ FALCON_DB98CX8514_10CC_PLATFORM = sonic-platform-db98cx8514-10cc_$(FALCON_PLATFO
 $(FALCON_DB98CX8514_10CC_PLATFORM)_PLATFORM = x86_64-marvell_db98cx8514_10cc-r0
 $(eval $(call add_extra_package,$(AC5X_RD98DX35xx_PLATFORM),$(FALCON_DB98CX8514_10CC_PLATFORM)))
 
+FALCON_DB98CX8522_10CC_PLATFORM = sonic-platform-db98cx8522-10cc_$(FALCON_PLATFORM_MODULE_VERSION)_$(CONFIGURED_ARCH).deb
+$(FALCON_DB98CX8522_10CC_PLATFORM)_PLATFORM = x86_64-marvell_db98cx8522_10cc-r0
+$(eval $(call add_extra_package,$(AC5X_RD98DX35xx_PLATFORM),$(FALCON_DB98CX8522_10CC_PLATFORM)))
 endif
diff --git a/platform/marvell/sonic-platform-marvell b/platform/marvell/sonic-platform-marvell
index be63e9c4b330..f6224ee910e4 160000
--- a/platform/marvell/sonic-platform-marvell
+++ b/platform/marvell/sonic-platform-marvell
@@ -1 +1 @@
-Subproject commit be63e9c4b330fd5eabfc5c694fe0231cf25b4425
+Subproject commit f6224ee910e4a7cdb2cc7c245480ec4e21817a27

From a31ca820005f571c12070a96818631c52c2d4e30 Mon Sep 17 00:00:00 2001
From: Gagan Punathil Ellath <gpunathilell@nvidia.com>
Date: Thu, 21 Nov 2024 11:30:10 -0800
Subject: [PATCH 247/364] [SmartSwitch] Added inbound traffic capability for
 DPU management traffic script (#20635)

[SmartSwitch] Added inbound traffic capability for DPU management traffic script
---
 files/scripts/sonic-dpu-mgmt-traffic.sh | 237 ++++++++++++++++++++++--
 1 file changed, 220 insertions(+), 17 deletions(-)

diff --git a/files/scripts/sonic-dpu-mgmt-traffic.sh b/files/scripts/sonic-dpu-mgmt-traffic.sh
index 71e6ed29b32b..014d722537f1 100755
--- a/files/scripts/sonic-dpu-mgmt-traffic.sh
+++ b/files/scripts/sonic-dpu-mgmt-traffic.sh
@@ -4,12 +4,22 @@
 command_name=$0
 
 usage(){
-    echo "Syntax: $command_name -e|--enable -d|--disable"
+    echo "Syntax: $command_name inbound/outbound -e|--enable -d|--disable [--dpus,--ports,--nofwctrl]"
     echo "Arguments:"
-    echo "-e			Enable dpu management traffic forwarding"
-    echo "-d			Disable dpu management traffic forwarding"
+    echo "inbound		Control DPU Inbound traffic forwarding"
+    echo "outbound		Control DPU Outbound traffic forwarding"
+    echo "-e			Enable dpu management traffic forwarding in a specific direction"
+    echo "-d			Disable dpu management traffic forwarding in a specific direction"
+    echo "--dpus		Selection of dpus for which the inbound traffic has to be controlled (all can be specified)"
+    echo "--ports		Selection of ports for which the inbound traffic has to be controlled"
+    echo "--nofwctrl	Disable changing the general ipv4 forwarding (Could be useful if inbound is enabled and outbound is disabled)"
 }
 
+dpu_l=()
+declare -A midplane_dict
+declare -A midplane_ip_dict
+fw_change="enable"
+
 add_rem_valid_iptable(){
     local op=$1
     local table=$2
@@ -39,20 +49,148 @@ control_forwarding(){
     if [ "$op" = "enable" ]; then
         value=1
     fi
-    echo $value > /proc/sys/net/ipv4/ip_forward
-    echo $value > /proc/sys/net/ipv4/conf/eth0/forwarding
+    if [ "$fw_change" = "enable" ]; then
+        echo $value > /proc/sys/net/ipv4/ip_forward
+        echo $value > /proc/sys/net/ipv4/conf/eth0/forwarding
+    fi
+}
+
+validate_dpus(){
+    local provided_list=("$@")
+    for item1 in "${provided_list[@]}"; do
+        local found=0
+        for item2 in "${dpu_l[@]}"; do
+            if [[ "$item1" = "$item2" ]]; then
+                found=1
+                break
+            fi
+        done
+        if [[ $found -eq 0 ]]; then
+            echo "$item1 is not detected! Please provide proper dpu names list!"
+            exit 1
+        fi
+    done
+}
+
+general_validation(){
+    if [ -z "$direction" ]; then
+        echo "Please provide the direction argument (inbound or outboud)"
+        usage
+        exit 1
+    fi
+
+    if [ -z "$operation" ]; then
+        echo "Please provide the operation option (-e or -d)"
+        usage
+        exit 1
+    fi
+}
+
+port_use_validation(){
+	local port_l=("$@")
+	for port in "${port_l[@]}"; do
+		if (( port >= 0 && port <= 1023 )); then
+			echo "Provided port $port in range 0-1023, Please execute with a different port"
+			exit 1
+		fi
+		if netstat -tuln | awk '{print $4}' | grep -q ":$port\$"; then
+			echo "Provided port $port is in use by another process, Please execute with a different port"
+			exit 1
+		fi
+	done
+}
+
+
+
+
+inbound_validation(){
+    #DPU Validation
+    while IFS= read -r line; do
+        dpu_name=$( echo "$line" | sed 's/.*|//;s/"//g')
+        dpu_l+=("$dpu_name")
+    done < <(redis-cli -n 4 keys DPUS*)
+    len1=${#dpu_name[@]}
+    if [ "$len1" -eq 0 ]; then
+        echo "No dpus detected on device!"
+        exit 1
+    fi
+    sorted_dpu_l=($(for item in "${dpu_l[@]}"; do
+        echo "$item"
+    done | sort))
+    if [ -z "$arg_dpu_names" ]; then
+            echo "No DPUs provided!"
+            usage
+            exit 1
+        else
+            if [ "$arg_dpu_names" = "all" ]; then
+                sel_dpu_names=("${sorted_dpu_l[@]}")
+                echo "${#sorted_dpu_l[@]} DPUs detected:"
+                echo "${sorted_dpu_l[@]}"
+            else
+                IFS=',' read -ra sel_dpu_names <<< "$arg_dpu_names"
+                validate_dpus ${sel_dpu_names[@]}
+            fi
+    fi
+    #Port validation
+    IFS=',' read -ra provided_ports <<< "$arg_port_list"
+    len1=${#sel_dpu_names[@]}
+    len2=${#provided_ports[@]}
+    if [ "$len1" -ne "$len2" ]; then
+        echo "Length of ${sel_dpu_names[@]} does not match provided port length ${provided_ports[@]}"
+        usage
+        exit 1
+    fi
+    port_use_validation ${provided_ports[@]}
+    for dpu in "${sel_dpu_names[@]}"; do
+        midplane_int_name=$(redis-cli -n 4 hget "DPUS|$dpu" "midplane_interface")
+        if [ -z "$midplane_int_name" ]; then
+            echo "Cannot obtain midplane interface for $dpu"
+            exit 1
+        fi
+        midplane_dict["$dpu"]="$midplane_int_name"
+    done
+
+    for dpu in "${!midplane_dict[@]}"; do
+        midplane_ip=$(redis-cli -n 4 hget "DHCP_SERVER_IPV4_PORT|$midplane_iface|${midplane_dict[$dpu]}" "ips@")
+        if [ -z "$midplane_ip" ]; then
+            echo "Cannot obtain midplane ip for $dpu"
+            exit 1
+        fi
+        midplane_ip_dict["$dpu"]="$midplane_ip"
+    done
 }
 
-ctrl_dpu_forwarding(){
+# Outbound Traffice forwarding control function
+ctrl_dpu_ob_forwarding(){
     local op=$1
     control_forwarding $op
     add_rem_valid_iptable $op nat POSTROUTING -o ${mgmt_iface}  -j MASQUERADE
     add_rem_valid_iptable $op filter FORWARD -i ${mgmt_iface} -o ${midplane_iface} -m conntrack --ctstate RELATED,ESTABLISHED -j ACCEPT
     add_rem_valid_iptable $op filter FORWARD -i ${midplane_iface} -o ${mgmt_iface} -j ACCEPT
     if [ "$op" = "enable" ]; then
-        echo "Enabled DPU management traffic Forwarding"
+        echo "Enabled DPU management outbound traffic Forwarding"
+    else
+        echo "Disabled DPU management outbound traffic Forwarding"
+    fi
+}
+
+ctrl_dpu_ib_forwarding(){
+    local op=$1
+    local dest_port=22
+    control_forwarding $op
+    add_rem_valid_iptable $op filter FORWARD -i ${midplane_iface} -o ${mgmt_iface} -p tcp -m conntrack --ctstate RELATED,ESTABLISHED -j ACCEPT
+    add_rem_valid_iptable $op filter FORWARD -i ${mgmt_iface} -o ${midplane_iface} -p tcp --dport $dest_port -j ACCEPT
+    for index in ${!sel_dpu_names[@]}; do
+        dpu_name="${sel_dpu_names[$index]}"
+        dpu_midplane_ip="${midplane_ip_dict[$dpu_name]}"
+        switch_port="${provided_ports[$index]}"
+        add_rem_valid_iptable $op nat POSTROUTING -p tcp -d $dpu_midplane_ip --dport $dest_port -j MASQUERADE
+        add_rem_valid_iptable $op nat PREROUTING -i ${mgmt_iface}  -p tcp --dport $switch_port -j DNAT --to-destination $dpu_midplane_ip:$dest_port
+    done
+    if [ "$op" = "enable" ]; then
+        echo "Enabled DPU management inbound traffic Forwarding"
     else
-        echo "Disabled DPU management traffic Forwarding"
+        echo "Disabled DPU management inbound traffic Forwarding"
     fi
 }
 
@@ -70,16 +208,81 @@ if ! ifconfig "$midplane_iface" > /dev/null 2>&1; then
     exit 1
 fi
 
+operation=""
+direction=""
+
+invalid_arg(){
+    echo "Invalid arguments $1"
+    usage
+    exit 1
+}
+
+
 case $1 in
-    -e|--enable)
-        ctrl_dpu_forwarding enable
-        ;;
-    -d|--disable)
-        ctrl_dpu_forwarding disable
-        ;;
+    inbound)
+        direction="inbound"
+        shift
+        while [ "$1" != "--" ]  && [ -n "$1" ]; do
+            case $1 in
+                -e|--enable)
+                    operation="enable"
+                ;;
+                -d|--disable)
+                    operation="disable"
+                ;;
+                --dpus)
+                    shift;
+                    arg_dpu_names=$1
+                ;;
+                --ports)
+                    shift;
+                    arg_port_list=$1
+                ;;
+                --nofwctrl)
+                    fw_change="disable"
+                ;;
+                *)
+                    invalid_arg $1
+                ;;
+            esac
+        shift
+        done
+    ;;
+    outbound)
+        direction="outbound"
+        shift
+        while [ "$1" != "--" ]  && [ -n "$1" ]; do
+            case $1 in
+                -e|--enable)
+                    operation="enable"
+                ;;
+                -d|--disable)
+                    operation="disable"
+                ;;
+                --nofwctrl)
+                    fw_change="disable"
+                ;;
+                *)
+                    invalid_arg $1
+                ;;
+            esac
+        shift
+        done
+    ;;
     *)
-        echo "Incorrect Usage!"
-        usage
-        exit 1
+        invalid_arg $1
+    ;;
+esac
+
+general_validation
+
+
+case $direction in
+    outbound)
+        ctrl_dpu_ob_forwarding $operation
+        ;;
+    inbound)
+        inbound_validation
+        ctrl_dpu_ib_forwarding $operation
         ;;
 esac

From 0abd29f82fa6a665dee659c1a4e9f4fe3a5f7f0d Mon Sep 17 00:00:00 2001
From: prabhataravind <108555774+prabhataravind@users.noreply.github.com>
Date: Thu, 21 Nov 2024 13:50:25 -0800
Subject: [PATCH 248/364] Fix nvidia smartswitch build pipeline (#20881)

Fix nvidia smartswitch build pipeline

Signed-off-by: Prabhat Aravind <paravind@microsoft.com>
---
 .azure-pipelines/azure-pipelines-build.yml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/.azure-pipelines/azure-pipelines-build.yml b/.azure-pipelines/azure-pipelines-build.yml
index fd6c805cf350..642f356083bc 100644
--- a/.azure-pipelines/azure-pipelines-build.yml
+++ b/.azure-pipelines/azure-pipelines-build.yml
@@ -163,7 +163,8 @@ jobs:
             if [ $(dbg_image) == yes ]; then
               make  $BUILD_OPTIONS INSTALL_DEBUG_TOOLS=y target/sonic-$(GROUP_NAME).bin
               mv target/sonic-$(GROUP_NAME).bin target/sonic-$(GROUP_NAME)-dbg.bin
-            elif [ $(ss_image) == yes ]; then
+            fi
+            if [ $(ss_image) == yes ]; then
               make $BUILD_OPTIONS SMARTSWITCH=1 INCLUDE_DHCP_SERVER=y target/sonic-$(GROUP_NAME).bin
               mv target/sonic-$(GROUP_NAME).bin target/sonic-$(GROUP_NAME)-smartswitch.bin
             fi

From a6e0d2d2b0adb40826210061f2d3e8ec422de57e Mon Sep 17 00:00:00 2001
From: Feng-msft <fenpan@microsoft.com>
Date: Fri, 22 Nov 2024 07:07:30 +0800
Subject: [PATCH 249/364] Fix bmp instance on DPU database issue (#20863)

Why I did it
BMP instance should not be launched on DPU database.

Work item tracking
Microsoft ADO (number only):
How I did it
Added some condition check to avoid bmp instance from being instantiated on DPU database instances.

How to verify it
local verified on KVM NPU platform.
---
 dockers/docker-database/database_config.json.j2 | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/dockers/docker-database/database_config.json.j2 b/dockers/docker-database/database_config.json.j2
index f37b64ee9665..b97589d3733d 100644
--- a/dockers/docker-database/database_config.json.j2
+++ b/dockers/docker-database/database_config.json.j2
@@ -23,13 +23,17 @@
             "unix_socket_path": "",
             "persistence_for_warm_boot" : "yes"
         }
-{% endif %},
+{% endif %}
+{% if DATABASE_TYPE is defined and DATABASE_TYPE == "dpudb" %}
+{% else %}
+        ,
         "redis_bmp":{
             "hostname" : "{{HOST_IP}}",
             "port" : {{BMP_DB_PORT}},
             "unix_socket_path" : "/var/run/redis{{DEV}}/redis_bmp.sock",
             "persistence_for_warm_boot" : "yes"
         }
+{% endif %}
     },
     "DATABASES" : {
         "APPL_DB" : {
@@ -135,12 +139,14 @@
             "separator": ":",
             "instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %}
         }
-{% endif %},
-         "BMP_STATE_DB" : {
+{% else %}
+        ,
+        "BMP_STATE_DB" : {
             "id" : 20,
             "separator": "|",
             "instance" : "redis_bmp"
         }
+{% endif %}
     },
     "VERSION" : "1.0"
 }

From 36895fbc9c5c87752905753fe9849a7ad7d9bbe0 Mon Sep 17 00:00:00 2001
From: "Marty Y. Lok" <76118573+mlok-nokia@users.noreply.github.com>
Date: Thu, 21 Nov 2024 22:11:55 -0500
Subject: [PATCH 250/364] [database-chassis][lagid] Initialize
 SYSTEM_LAG_IDS_FREE_LIST in CHASSIS_APP_DB (#20369)

Modify database.sh to create a initial SYSTEM_LAG_IDS_FREE_LIST in the CHASSIS_APP_DB on SUP during database-chassis startup
Modify the database consistency check in swss.sh to append the lagid to the end of SYSTEM_LAG_IDS_FREE_LIST when lagid is released.
Modify the lag_id_end=1023 (not 1024) in chassisdb.conf since BCM supports the large lagid is 1023

Signed-off-by: mlok <marty.lok@nokia.com>
---
 device/nokia/x86_64-nokia_ixr7250e_sup-r0/chassisdb.conf | 2 +-
 files/build_templates/docker_image_ctl.j2                | 6 ++++++
 files/scripts/swss.sh                                    | 1 +
 3 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/chassisdb.conf b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/chassisdb.conf
index 220e262f68e8..1ee5a0239d63 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/chassisdb.conf
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/chassisdb.conf
@@ -1,4 +1,4 @@
 start_chassis_db=1
 chassis_db_address=10.6.0.100
 lag_id_start=1
-lag_id_end=1024
+lag_id_end=1023
diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 67add27cea53..2fdf60a525a2 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -121,6 +121,12 @@ function setPlatformLagIdBoundaries()
 {
     docker exec -i ${DOCKERNAME} $SONIC_DB_CLI CHASSIS_APP_DB SET "SYSTEM_LAG_ID_START" "$lag_id_start"
     docker exec -i ${DOCKERNAME} $SONIC_DB_CLI CHASSIS_APP_DB SET "SYSTEM_LAG_ID_END" "$lag_id_end"
+    docker exec -i ${DOCKERNAME} $SONIC_DB_CLI CHASSIS_APP_DB EVAL "
+    local start_id = tonumber(ARGV[1])
+    local end_id = tonumber(ARGV[2])
+    for id = start_id,end_id do
+        redis.call('rpush','SYSTEM_LAG_IDS_FREE_LIST', tostring(id))
+    end" 0 $lag_id_start $lag_id_end
 }
 function waitForAllInstanceDatabaseConfigJsonFilesReady()
 {
diff --git a/files/scripts/swss.sh b/files/scripts/swss.sh
index 35815fe4dfb9..f081cf6de8e4 100755
--- a/files/scripts/swss.sh
+++ b/files/scripts/swss.sh
@@ -233,6 +233,7 @@ function clean_up_chassis_db_tables()
             local lagid = redis.call('HGET', 'SYSTEM_LAG_ID_TABLE', lagname)
             redis.call('SREM', 'SYSTEM_LAG_ID_SET', lagid)
             redis.call('HDEL', 'SYSTEM_LAG_ID_TABLE', lagname)
+            redis.call('rpush', 'SYSTEM_LAG_IDS_FREE_LIST', lagid)
             nsl = nsl + 1
         end
     end

From 9e888d4cdf4e3db07a978d7d3dd82b7c331380b0 Mon Sep 17 00:00:00 2001
From: PanXuntao <46553235+Pan-XT@users.noreply.github.com>
Date: Fri, 22 Nov 2024 13:00:27 +0800
Subject: [PATCH 251/364] Enable Multi DB (#20305)

Enable Multi DB
---
 Makefile.work                                 |   4 +
 dockers/docker-database/Dockerfile.j2         |   1 +
 .../docker-database/docker-database-init.sh   |   8 +-
 .../multi_database_config.json.j2             | 192 ++++++++++++++++++
 .../build_templates/sonic_debian_extension.j2 |   5 +
 slave.mk                                      |   2 +
 6 files changed, 211 insertions(+), 1 deletion(-)
 create mode 100644 dockers/docker-database/multi_database_config.json.j2

diff --git a/Makefile.work b/Makefile.work
index e6cddad289b9..2d52f16e1fd1 100644
--- a/Makefile.work
+++ b/Makefile.work
@@ -61,6 +61,9 @@
 #  * SONIC_PTF_ENV_PY_VER: Python version for PTF image
 #  *                       Default: mixed
 #  *                       Values: mixed,py3
+#  * ENABLE_MULTIDB: Enable multiple redis database instances.
+#  *                 Default: unset
+#  *                 Values: y
 ###############################################################################
 
 SHELL = /bin/bash
@@ -571,6 +574,7 @@ SONIC_BUILD_INSTRUCTION :=  $(MAKE) \
                            BUILD_PROCESS_TIMEOUT=$(BUILD_PROCESS_TIMEOUT) \
                            LEGACY_SONIC_MGMT_DOCKER=$(LEGACY_SONIC_MGMT_DOCKER) \
                            SONIC_PTF_ENV_PY_VER=$(SONIC_PTF_ENV_PY_VER) \
+						   ENABLE_MULTIDB=$(ENABLE_MULTIDB) \
                            $(SONIC_OVERRIDE_BUILD_VARS)
 
 .PHONY: sonic-slave-build sonic-slave-bash init reset
diff --git a/dockers/docker-database/Dockerfile.j2 b/dockers/docker-database/Dockerfile.j2
index 6f39d0ac5f58..d9ba01360b30 100644
--- a/dockers/docker-database/Dockerfile.j2
+++ b/dockers/docker-database/Dockerfile.j2
@@ -48,5 +48,6 @@ COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
 COPY ["files/sysctl-net.conf", "/etc/sysctl.d/"]
 COPY ["files/update_chassisdb_config", "/usr/local/bin/"]
 COPY ["flush_unused_database", "/usr/local/bin/"]
+COPY ["multi_database_config.json.j2", "/usr/share/sonic/templates/"]
 
 ENTRYPOINT ["/usr/local/bin/docker-database-init.sh"]
diff --git a/dockers/docker-database/docker-database-init.sh b/dockers/docker-database/docker-database-init.sh
index c50add1a7698..076e06396447 100755
--- a/dockers/docker-database/docker-database-init.sh
+++ b/dockers/docker-database/docker-database-init.sh
@@ -50,7 +50,11 @@ mkdir -p /etc/supervisor/conf.d/
 if [ -f /etc/sonic/database_config$NAMESPACE_ID.json ]; then
     cp /etc/sonic/database_config$NAMESPACE_ID.json $REDIS_DIR/sonic-db/database_config.json
 else
-    HOST_IP=$host_ip REDIS_PORT=$redis_port DATABASE_TYPE=$DATABASE_TYPE BMP_DB_PORT=$BMP_DB_PORT j2 /usr/share/sonic/templates/database_config.json.j2 > $REDIS_DIR/sonic-db/database_config.json
+    if [ -f /etc/sonic/enable_multidb ]; then
+        HOST_IP=$host_ip REDIS_PORT=$redis_port DATABASE_TYPE=$DATABASE_TYPE BMP_DB_PORT=$BMP_DB_PORT j2 /usr/share/sonic/templates/multi_database_config.json.j2 > $REDIS_DIR/sonic-db/database_config.json
+    else
+        HOST_IP=$host_ip REDIS_PORT=$redis_port DATABASE_TYPE=$DATABASE_TYPE BMP_DB_PORT=$BMP_DB_PORT j2 /usr/share/sonic/templates/database_config.json.j2 > $REDIS_DIR/sonic-db/database_config.json
+    fi
 fi
 
 # on VoQ system, we only publish redis_chassis instance and CHASSIS_APP_DB when
@@ -125,6 +129,8 @@ do
     else
         echo -n > /var/lib/$inst/dump.rdb
     fi
+    # the Redis process is operating under the 'redis' user in supervisord and make redis user own /var/lib/$inst inside db container.
+    chown -R redis:redis /var/lib/$inst
 done
 
 TZ=$(cat /etc/timezone)
diff --git a/dockers/docker-database/multi_database_config.json.j2 b/dockers/docker-database/multi_database_config.json.j2
new file mode 100644
index 000000000000..26ddb006b83d
--- /dev/null
+++ b/dockers/docker-database/multi_database_config.json.j2
@@ -0,0 +1,192 @@
+{% set include_remote_db = (REMOTE_DB_IP is defined and REMOTE_DB_PORT is defined) %}
+{
+    "INSTANCES": {
+        "redis":{
+            "hostname" : "{{HOST_IP}}",
+            "port" : {{REDIS_PORT}},
+            "unix_socket_path" : "/var/run/redis{{DEV}}/redis.sock",
+            "persistence_for_warm_boot" : "yes"
+            {% if DATABASE_TYPE is defined and DATABASE_TYPE != "" %}
+            ,"database_type": "{{DATABASE_TYPE}}"
+            {% endif %}
+        },
+        "redis1": {
+           "hostname" : "{{HOST_IP}}",
+            "port" : 6378,
+            "unix_socket_path" : "/var/run/redis{{DEV}}/redis1.sock",
+            "persistence_for_warm_boot" : "yes"
+            {% if DATABASE_TYPE is defined and DATABASE_TYPE != "" %}
+            ,"database_type": "{{DATABASE_TYPE}}"
+            {% endif %}
+        },
+        "redis2": {
+            "hostname" : "{{HOST_IP}}",
+            "port" : 6377,
+            "unix_socket_path" : "/var/run/redis{{DEV}}/redis2.sock",
+            "persistence_for_warm_boot" : "yes"
+            {% if DATABASE_TYPE is defined and DATABASE_TYPE != "" %}
+            ,"database_type": "{{DATABASE_TYPE}}"
+            {% endif %}
+        },
+        "redis3": {
+           "hostname" : "{{HOST_IP}}",
+            "port" : 6376,
+            "unix_socket_path" : "/var/run/redis{{DEV}}/redis3.sock",
+            "persistence_for_warm_boot" : "yes"
+            {% if DATABASE_TYPE is defined and DATABASE_TYPE != "" %}
+            ,"database_type": "{{DATABASE_TYPE}}"
+            {% endif %}
+        },
+        "redis4": {
+            "hostname" : "{{HOST_IP}}",
+            "port" : 6375,
+            "unix_socket_path" : "/var/run/redis{{DEV}}/redis4.sock",
+            "persistence_for_warm_boot" : "yes"
+            {% if DATABASE_TYPE is defined and DATABASE_TYPE != "" %}
+            ,"database_type": "{{DATABASE_TYPE}}"
+            {% endif %}
+        },
+        "redis_chassis":{
+            "hostname" : "redis_chassis.server",
+            "port": 6380,
+            "unix_socket_path": "/var/run/redis-chassis/redis_chassis.sock",
+            "persistence_for_warm_boot" : "yes"
+        }
+{% if include_remote_db %}
+        ,"remote_redis":{
+            "hostname" : "{{REMOTE_DB_IP}}",
+            "port" : {{REMOTE_DB_PORT}},
+            "unix_socket_path": "",
+            "persistence_for_warm_boot" : "yes"
+        }
+{% endif %},
+        "redis_bmp":{
+            "hostname" : "{{HOST_IP}}",
+            "port" : {{BMP_DB_PORT}},
+            "unix_socket_path" : "/var/run/redis{{DEV}}/redis_bmp.sock",
+            "persistence_for_warm_boot" : "yes"
+        }
+    },
+    "DATABASES" : {
+       "APPL_DB": {
+            "id": 0,
+            "separator": ":",
+            "instance": "redis1"
+        },
+        "ASIC_DB": {
+            "id": 1,
+            "separator": ":",
+            "instance": "redis2"
+        },
+        "COUNTERS_DB": {
+            "id": 2,
+            "separator": ":",
+            "instance": "redis3"
+        },
+        "LOGLEVEL_DB": {
+            "id": 3,
+            "separator": ":",
+            "instance": "redis"
+        },
+        "CONFIG_DB": {
+            "id": 4,
+            "separator": "|",
+            "instance": "redis"
+        },
+        "PFC_WD_DB": {
+            "id": 5,
+            "separator": ":",
+            "instance": "redis3"
+        },
+        "FLEX_COUNTER_DB": {
+            "id": 5,
+            "separator": ":",
+            "instance": "redis3"
+        },
+        "STATE_DB": {
+            "id": 6,
+            "separator": "|",
+            "instance": "redis"
+        },
+        "SNMP_OVERLAY_DB": {
+            "id": 7,
+            "separator": "|",
+            "instance": "redis"
+        },
+        "SYSMON_DB": {
+            "id": 10,
+            "separator": "|",
+            "instance": "redis"
+        },
+        "BMC_DB": {
+            "id": 12,
+            "separator": ":",
+            "instance": "redis4"
+        },
+        "RESTAPI_DB": {
+            "id": 8,
+            "separator": "|",
+            "instance": "redis"
+        },
+        "GB_ASIC_DB": {
+            "id": 9,
+            "separator": ":",
+            "instance": "redis"
+        },
+        "GB_COUNTERS_DB": {
+            "id": 10,
+            "separator": ":",
+            "instance": "redis"
+        },
+        "GB_FLEX_COUNTER_DB": {
+            "id": 11,
+            "separator": ":",
+            "instance": "redis"
+        },
+        "APPL_STATE_DB": {
+            "id": 14,
+            "separator": ":",
+            "instance": "redis"
+        },
+        "CHASSIS_APP_DB" : {
+            "id" : 12,
+            "separator": "|",
+            "instance" : "redis_chassis"
+        },
+        "CHASSIS_STATE_DB" : {
+            "id" : 13,
+            "separator": "|",
+            "instance" : "redis_chassis"
+        }
+{% if DATABASE_TYPE is defined and DATABASE_TYPE == "dpudb" %}
+        ,
+        "DPU_APPL_DB" : {
+            "id" : 15,
+            "separator": ":",
+            "instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %},
+            "format": "proto"
+        },
+        "DPU_APPL_STATE_DB" : {
+            "id" : 16,
+            "separator": "|",
+            "instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %}
+        },
+        "DPU_STATE_DB" : {
+            "id" : 17,
+            "separator": "|",
+            "instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %}
+        },
+        "DPU_COUNTERS_DB" : {
+            "id" : 18,
+            "separator": ":",
+            "instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %}
+        }
+{% endif %},
+         "BMP_STATE_DB" : {
+            "id" : 20,
+            "separator": "|",
+            "instance" : "redis_bmp"
+        }
+    },
+    "VERSION" : "1.0"
+}
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 891a9afdc06b..1d8a4c78fddc 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -1156,3 +1156,8 @@ sudo rm -rf $FILESYSTEM_ROOT/tmp/mask_disabled_services.py
 
 
 sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install python3-dbus
+
+## Enable MULTIDB
+{% if ENABLE_MULTIDB == "y" %}
+sudo touch $FILESYSTEM_ROOT_ETC_SONIC/enable_multidb
+{% endif %}
diff --git a/slave.mk b/slave.mk
index 22b13a5ad452..17d46e056b3f 100644
--- a/slave.mk
+++ b/slave.mk
@@ -472,6 +472,7 @@ $(info "CROSS_BUILD_ENVIRON"             : "$(CROSS_BUILD_ENVIRON)")
 $(info "LEGACY_SONIC_MGMT_DOCKER"        : "$(LEGACY_SONIC_MGMT_DOCKER)")
 $(info "INCLUDE_EXTERNAL_PATCHES"        : "$(INCLUDE_EXTERNAL_PATCHES)")
 $(info "PTF_ENV_PY_VER"                  : "$(PTF_ENV_PY_VER)")
+$(info "ENABLE_MULTIDB"                  : "$(ENABLE_MULTIDB)")
 $(info )
 else
 $(info SONiC Build System for $(CONFIGURED_PLATFORM):$(CONFIGURED_ARCH))
@@ -1491,6 +1492,7 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \
 	export include_mux="$(INCLUDE_MUX)"
 	export include_bootchart="$(INCLUDE_BOOTCHART)"
 	export enable_bootchart="$(ENABLE_BOOTCHART)"
+	export enable_multidb="$(ENABLE_MULTIDB)"
 	$(foreach docker, $($*_DOCKERS),\
 		export docker_image="$(docker)"
 		export docker_image_name="$(basename $(docker))"

From f8a78c17c18b4615a95d847d44bec7c80f48f7dc Mon Sep 17 00:00:00 2001
From: Feng-msft <fenpan@microsoft.com>
Date: Fri, 22 Nov 2024 14:12:17 +0800
Subject: [PATCH 252/364] Build bmp container into sonic-buildimage (#18946)

Why I did it
Build bmp container into sonic-buildimage, and added relevant daemon/file handling.

Work item tracking
Microsoft ADO (number only):27588893
How I did it
Build bmp container into sonic-buildimage, and added relevant daemon/file handling.

How to verify it
Local build successfully and verified in lab DUT.
---
 Makefile.work                                 |   1 +
 dockers/docker-sonic-bmp/Dockerfile.j2        |  50 +++++++++
 .../base_image_files/monit_bmp                |   5 +
 dockers/docker-sonic-bmp/bmp.sh               |  13 +++
 dockers/docker-sonic-bmp/critical_processes   |   3 +
 dockers/docker-sonic-bmp/supervisord.conf     |  61 ++++++++++
 files/build_templates/bmp.service.j2          |  16 +++
 files/build_templates/docker_image_ctl.j2     |   4 +-
 .../build_templates/sonic_debian_extension.j2 |   1 +
 files/image_config/logrotate/rsyslog.j2       |   1 +
 .../rsyslog/rsyslog.d/00-sonic.conf.j2        |   6 +
 files/scripts/bmp.sh                          | 105 ++++++++++++++++++
 rules/config                                  |   3 +
 rules/docker-bmp.dep                          |  10 ++
 rules/docker-bmp.mk                           |  47 ++++++++
 rules/sonic-bmp.dep                           |  10 ++
 rules/sonic-bmp.mk                            |   6 +
 rules/sonic_bmpcfgd.dep                       |  13 +++
 rules/sonic_bmpcfgd.mk                        |  10 ++
 slave.mk                                      |   6 +
 sonic-slave-bookworm/Dockerfile.j2            |   4 +
 .../sonic-services-data.bmpcfgd.service       |  14 ---
 src/sonic-bmpcfgd/{ => scripts}/__init__.py   |   0
 src/sonic-bmpcfgd/scripts/bmpcfgd             |  22 +---
 src/sonic-bmpcfgd/setup.py                    |  25 ++---
 src/sonic-bmpcfgd/tests/bmpcfgd_test.py       |  65 +++--------
 .../tests/common/mock_bootloader.py           |  13 +++
 27 files changed, 413 insertions(+), 101 deletions(-)
 create mode 100755 dockers/docker-sonic-bmp/Dockerfile.j2
 create mode 100644 dockers/docker-sonic-bmp/base_image_files/monit_bmp
 create mode 100644 dockers/docker-sonic-bmp/bmp.sh
 create mode 100644 dockers/docker-sonic-bmp/critical_processes
 create mode 100644 dockers/docker-sonic-bmp/supervisord.conf
 create mode 100644 files/build_templates/bmp.service.j2
 create mode 100755 files/scripts/bmp.sh
 create mode 100644 rules/docker-bmp.dep
 create mode 100644 rules/docker-bmp.mk
 create mode 100644 rules/sonic-bmp.dep
 create mode 100644 rules/sonic-bmp.mk
 create mode 100644 rules/sonic_bmpcfgd.dep
 create mode 100644 rules/sonic_bmpcfgd.mk
 delete mode 100644 src/sonic-bmpcfgd/data/debian/sonic-services-data.bmpcfgd.service
 rename src/sonic-bmpcfgd/{ => scripts}/__init__.py (100%)
 create mode 100644 src/sonic-bmpcfgd/tests/common/mock_bootloader.py

diff --git a/Makefile.work b/Makefile.work
index 2d52f16e1fd1..fe14eebaedc7 100644
--- a/Makefile.work
+++ b/Makefile.work
@@ -535,6 +535,7 @@ SONIC_BUILD_INSTRUCTION :=  $(MAKE) \
                            SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD=$(SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD) \
                            SONIC_INCLUDE_SYSTEM_TELEMETRY=$(INCLUDE_SYSTEM_TELEMETRY) \
                            SONIC_INCLUDE_SYSTEM_GNMI=$(INCLUDE_SYSTEM_GNMI) \
+                           SONIC_INCLUDE_SYSTEM_BMP=$(INCLUDE_SYSTEM_BMP) \
                            SONIC_INCLUDE_SYSTEM_EVENTD=$(INCLUDE_SYSTEM_EVENTD) \
                            INCLUDE_DHCP_RELAY=$(INCLUDE_DHCP_RELAY) \
                            INCLUDE_DHCP_SERVER=$(INCLUDE_DHCP_SERVER) \
diff --git a/dockers/docker-sonic-bmp/Dockerfile.j2 b/dockers/docker-sonic-bmp/Dockerfile.j2
new file mode 100755
index 000000000000..2e79001dbf92
--- /dev/null
+++ b/dockers/docker-sonic-bmp/Dockerfile.j2
@@ -0,0 +1,50 @@
+{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+
+ARG docker_container_name
+ARG image_version
+
+## Make apt-get non-interactive
+ENV DEBIAN_FRONTEND=noninteractive
+
+# Pass the image_version to container
+ENV IMAGE_VERSION=$image_version
+
+RUN apt-get update
+
+{% if docker_sonic_bmp_debs.strip() -%}
+# Copy locally-built Debian package dependencies
+{{ copy_files("debs/", docker_sonic_bmp_debs.split(' '), "/debs/") }}
+
+# Install locally-built Debian packages and implicitly install their dependencies
+{{ install_debian_packages(docker_sonic_bmp_debs.split(' ')) }}
+{%- endif %}
+
+{% if docker_sonic_bmp_whls.strip() %}
+# Copy locally-built Python wheel dependencies
+{{ copy_files("python-wheels/", docker_sonic_bmp_whls.split(' '), "/python-wheels/") }}
+
+# Install locally-built Python wheel dependencies
+{{ install_python_wheels(docker_sonic_bmp_whls.split(' ')) }}
+{% endif %}
+
+RUN apt-get clean -y      && \
+    apt-get autoclean -   && \
+    apt-get autoremove -y && \
+    rm -rf /debs && \
+    mkdir -p /etc/bmp
+
+COPY ["bmp.sh", "/usr/bin/"]
+COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
+COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
+COPY ["critical_processes", "/etc/supervisor/"]
+
+RUN chmod +x /usr/bin/bmp.sh
+RUN touch /var/log/openbmpd.log
+
+RUN apt-get clean -y      && \
+    apt-get autoclean -y  && \
+    apt-get autoremove -y && \
+    rm -rf /debs
+
+ENTRYPOINT ["/usr/local/bin/supervisord"]
\ No newline at end of file
diff --git a/dockers/docker-sonic-bmp/base_image_files/monit_bmp b/dockers/docker-sonic-bmp/base_image_files/monit_bmp
new file mode 100644
index 000000000000..353a716455d9
--- /dev/null
+++ b/dockers/docker-sonic-bmp/base_image_files/monit_bmp
@@ -0,0 +1,5 @@
+###############################################################################
+## Monit configuration for bmp container
+###############################################################################
+check program container_memory_bmp with path "/usr/bin/memory_checker bmp 419430400"
+    if status == 3 for 10 times within 20 cycles then exec "/usr/bin/docker exec bmp supervisorctl restart openbmpd"
diff --git a/dockers/docker-sonic-bmp/bmp.sh b/dockers/docker-sonic-bmp/bmp.sh
new file mode 100644
index 000000000000..eb3d186fb548
--- /dev/null
+++ b/dockers/docker-sonic-bmp/bmp.sh
@@ -0,0 +1,13 @@
+#!/usr/bin/env bash
+
+
+if [ "${RUNTIME_OWNER}" == "" ]; then
+    RUNTIME_OWNER="kube"
+fi
+
+CTR_SCRIPT="/usr/share/sonic/scripts/container_startup.py"
+if test -f ${CTR_SCRIPT}
+then
+    ${CTR_SCRIPT} -f bmp -o ${RUNTIME_OWNER} -v ${IMAGE_VERSION}
+fi
+
diff --git a/dockers/docker-sonic-bmp/critical_processes b/dockers/docker-sonic-bmp/critical_processes
new file mode 100644
index 000000000000..10621f0de87f
--- /dev/null
+++ b/dockers/docker-sonic-bmp/critical_processes
@@ -0,0 +1,3 @@
+group:sonic-bmp
+program:openbmpd
+program:bmpcfgd
\ No newline at end of file
diff --git a/dockers/docker-sonic-bmp/supervisord.conf b/dockers/docker-sonic-bmp/supervisord.conf
new file mode 100644
index 000000000000..7a751c7cfce1
--- /dev/null
+++ b/dockers/docker-sonic-bmp/supervisord.conf
@@ -0,0 +1,61 @@
+[supervisord]
+logfile_maxbytes=1MB
+logfile_backups=2
+nodaemon=true
+
+[eventlistener:dependent-startup]
+command=python3 -m supervisord_dependent_startup
+autostart=true
+autorestart=unexpected
+startretries=0
+exitcodes=0,3
+events=PROCESS_STATE
+buffer_size=1024
+
+[eventlistener:supervisor-proc-exit-listener]
+command=/usr/bin/supervisor-proc-exit-listener --container-name bmp
+events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING
+autostart=true
+autorestart=false
+buffer_size=1024
+
+[program:rsyslogd]
+command=/usr/sbin/rsyslogd -n -iNONE
+priority=1
+autostart=false
+autorestart=true
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+
+[program:bmp]
+command=/usr/bin/bmp.sh
+priority=2
+autostart=false
+autorestart=false
+startsecs=0
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=rsyslogd:running
+
+[group:sonic-bmp]
+programs=openbmpd,bmpcfgd
+
+[program:bmpcfgd]
+command=python3 /usr/local/bin/bmpcfgd
+priority=3
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+
+[program:openbmpd]
+command=/usr/bin/openbmpd -f -l /var/log/openbmpd.log -c /etc/bmp/openbmpd.conf
+priority=3
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
diff --git a/files/build_templates/bmp.service.j2 b/files/build_templates/bmp.service.j2
new file mode 100644
index 000000000000..72ab295d04d5
--- /dev/null
+++ b/files/build_templates/bmp.service.j2
@@ -0,0 +1,16 @@
+[Unit]
+Description=BMP container
+Requires=database.service
+After=database.service
+Before=ntp-config.service
+BindsTo=sonic.target
+After=sonic.target
+StartLimitIntervalSec=1200
+StartLimitBurst=3
+
+[Service]
+User={{ sonicadmin_user }}
+ExecStartPre=/usr/local/bin/{{docker_container_name}}.sh start
+ExecStart=/usr/local/bin/{{docker_container_name}}.sh wait
+ExecStop=/usr/local/bin/{{docker_container_name}}.sh stop
+RestartSec=30
diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 2fdf60a525a2..294dd46ce1e7 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -292,6 +292,8 @@ function postStartAction()
         fi
 
         # Add redis UDS to the redis group and give read/write access to the group
+        REDIS_BMP_SOCK="/var/run/redis/redis_bmp.sock"
+        chgrp -f redis $REDIS_BMP_SOCK && chmod -f 0760 $REDIS_BMP_SOCK
         REDIS_SOCK="/var/run/redis${DEV}/redis.sock"
     else
         until [[ ($(docker exec -i ${DOCKERNAME} pgrep -x -c supervisord) -gt 0) &&
@@ -303,9 +305,7 @@ function postStartAction()
         fi
         REDIS_SOCK="/var/run/redis-chassis/redis_chassis.sock"
     fi
-    REDIS_BMP_SOCK="/var/run/redis/redis_bmp.sock"
     chgrp -f redis $REDIS_SOCK && chmod -f 0760 $REDIS_SOCK
-    chgrp -f redis $REDIS_BMP_SOCK && chmod -f 0760 $REDIS_BMP_SOCK
 {%- elif docker_container_name == "swss" %}
     # Wait until swss container state is Running
     until [[ ($(docker inspect -f {{"'{{.State.Running}}'"}} swss$DEV) == "true") ]]; do
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 1d8a4c78fddc..e0ede21e5490 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -1019,6 +1019,7 @@ sudo LANG=C cp $SCRIPTS_DIR/database.sh $FILESYSTEM_ROOT/usr/local/bin/database.
 sudo LANG=C cp $SCRIPTS_DIR/snmp.sh $FILESYSTEM_ROOT/usr/local/bin/snmp.sh
 sudo LANG=C cp $SCRIPTS_DIR/telemetry.sh $FILESYSTEM_ROOT/usr/local/bin/telemetry.sh
 sudo LANG=C cp $SCRIPTS_DIR/gnmi.sh $FILESYSTEM_ROOT/usr/local/bin/gnmi.sh
+sudo LANG=C cp $SCRIPTS_DIR/bmp.sh $FILESYSTEM_ROOT/usr/local/bin/bmp.sh
 sudo LANG=C cp $SCRIPTS_DIR/mgmt-framework.sh $FILESYSTEM_ROOT/usr/local/bin/mgmt-framework.sh
 sudo LANG=C cp $SCRIPTS_DIR/asic_status.sh $FILESYSTEM_ROOT/usr/local/bin/asic_status.sh
 sudo LANG=C cp $SCRIPTS_DIR/asic_status.py $FILESYSTEM_ROOT/usr/local/bin/asic_status.py
diff --git a/files/image_config/logrotate/rsyslog.j2 b/files/image_config/logrotate/rsyslog.j2
index b0a7ff7e7002..318d22a94814 100644
--- a/files/image_config/logrotate/rsyslog.j2
+++ b/files/image_config/logrotate/rsyslog.j2
@@ -31,6 +31,7 @@
 /var/log/teamd.log
 /var/log/telemetry.log
 /var/log/gnmi.log
+/var/log/bmp.log
 /var/log/frr/bgpd.log
 /var/log/frr/zebra.log
 /var/log/swss/sairedis*.rec
diff --git a/files/image_config/rsyslog/rsyslog.d/00-sonic.conf.j2 b/files/image_config/rsyslog/rsyslog.d/00-sonic.conf.j2
index a5b4689741dc..19fe35b1001e 100644
--- a/files/image_config/rsyslog/rsyslog.d/00-sonic.conf.j2
+++ b/files/image_config/rsyslog/rsyslog.d/00-sonic.conf.j2
@@ -47,6 +47,12 @@ if $msg startswith " gnmi-native" then {
     stop
 }
 
+## bmp rules
+if $msg startswith " bmp" then {
+    /var/log/bmp.log
+    stop
+}
+
 ## telemetry rules
 if $msg startswith  " telemetry" or ($msg startswith  " dialout" )then {
     /var/log/telemetry.log
diff --git a/files/scripts/bmp.sh b/files/scripts/bmp.sh
new file mode 100755
index 000000000000..8229fd8ece26
--- /dev/null
+++ b/files/scripts/bmp.sh
@@ -0,0 +1,105 @@
+#!/bin/bash
+
+function debug()
+{
+    /usr/bin/logger $1
+}
+
+function check_warm_boot()
+{
+    SYSTEM_WARM_START=`$SONIC_DB_CLI STATE_DB hget "WARM_RESTART_ENABLE_TABLE|system" enable`
+    SERVICE_WARM_START=`$SONIC_DB_CLI STATE_DB hget "WARM_RESTART_ENABLE_TABLE|${SERVICE}" enable`
+    if [[ x"$SYSTEM_WARM_START" == x"true" ]] || [[ x"$SERVICE_WARM_START" == x"true" ]]; then
+        WARM_BOOT="true"
+    else
+        WARM_BOOT="false"
+    fi
+}
+
+function check_fast_boot ()
+{
+    SYSTEM_FAST_REBOOT=`sonic-db-cli STATE_DB hget "FAST_RESTART_ENABLE_TABLE|system" enable`
+    if [[ x"${SYSTEM_FAST_REBOOT}" == x"true" ]]; then
+        FAST_BOOT="true"
+    else
+        FAST_BOOT="false"
+    fi
+}
+
+function check_redundant_type()
+{
+    DEVICE_SUBTYPE=`$SONIC_DB_CLI CONFIG_DB hget "DEVICE_METADATA|localhost" subtype`
+    if [[ x"$DEVICE_SUBTYPE" == x"DualToR" ]]; then
+        MUX_CONFIG=`show muxcable config`
+        if [[ $MUX_CONFIG =~ .*active-active.* ]]; then 
+            ACTIVE_ACTIVE="true"
+        else
+            ACTIVE_ACTIVE="false"
+        fi
+    else
+        ACTIVE_ACTIVE="false"
+    fi
+    CONFIG_KNOB=`$SONIC_DB_CLI CONFIG_DB hget "MUX_LINKMGR|SERVICE_MGMT" kill_radv`
+    if [[ x"$CONFIG_KNOB" == x"False" ]]; then
+        ACTIVE_ACTIVE='false'
+    fi 
+    debug "DEVICE_SUBTYPE: ${DEVICE_SUBTYPE}, CONFIG_KNOB: ${CONFIG_KNOB}"
+}
+
+start() {
+    debug "Starting ${SERVICE}$DEV service..."
+
+    # start service docker
+    /usr/bin/${SERVICE}.sh start $DEV
+    debug "Started ${SERVICE}$DEV service..."
+}
+
+wait() {
+    /usr/bin/${SERVICE}.sh wait $DEV
+}
+
+stop() {
+    debug "Stopping ${SERVICE}$DEV service..."
+
+    check_warm_boot
+    check_fast_boot
+    check_redundant_type
+    debug "Warm boot flag: ${SERVICE}$DEV ${WARM_BOOT}."
+    debug "Fast boot flag: ${SERVICE}$DEV ${FAST_BOOT}."
+
+    # For WARM/FAST boot do not perform service stop
+    if [[ x"$WARM_BOOT" != x"true" ]] && [[ x"$FAST_BOOT" != x"true" ]]; then
+        if [[ x"$SERVICE" == x"radv" ]] && [[ x"$ACTIVE_ACTIVE" == x"true" ]]; then
+            debug "Killing Docker ${SERVICE}${DEV} for active-active dualtor device..."
+            /usr/bin/${SERVICE}.sh kill $DEV
+        else
+            /usr/bin/${SERVICE}.sh stop $DEV
+            debug "Stopped ${SERVICE}$DEV service..."
+        fi
+    else
+        debug "Killing Docker ${SERVICE}${DEV}..."
+        /usr/bin/${SERVICE}.sh kill $DEV
+    fi
+}
+
+DEV=$2
+
+SCRIPT_NAME=$(basename -- "$0")
+SERVICE="${SCRIPT_NAME%.*}"
+NAMESPACE_PREFIX="asic"
+if [[ "$DEV" && "$DEV" != *"dpu"* ]]; then
+    NET_NS="$NAMESPACE_PREFIX$DEV" #name of the network namespace
+    SONIC_DB_CLI="sonic-db-cli -n $NET_NS"
+else
+    SONIC_DB_CLI="sonic-db-cli"
+fi
+
+case "$1" in
+    start|wait|stop)
+        $1
+        ;;
+    *)
+        echo "Usage: $0 {start|wait|stop}"
+        exit 1
+        ;;
+esac
diff --git a/rules/config b/rules/config
index 8229160b0d78..3d3a81ce60f2 100644
--- a/rules/config
+++ b/rules/config
@@ -124,6 +124,9 @@ DEFAULT_VS_PREPARE_MEM = yes
 # INCLUDE_SYSTEM_GNMI - build docker-sonic-gnmi for system gnmi support
 INCLUDE_SYSTEM_GNMI = y
 
+# INCLUDE_SYSTEM_BMP - build docker-sonic-bmp for system bmp support
+INCLUDE_SYSTEM_BMP = y
+
 # INCLUDE_SYSTEM_EVENTD - build docker-eventd for system eventd support
 INCLUDE_SYSTEM_EVENTD = y
 
diff --git a/rules/docker-bmp.dep b/rules/docker-bmp.dep
new file mode 100644
index 000000000000..09bd14d0dfc1
--- /dev/null
+++ b/rules/docker-bmp.dep
@@ -0,0 +1,10 @@
+DPATH       := $($(DOCKER_BMP)_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/docker-bmp.mk rules/docker-bmp.dep   
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(DPATH))
+
+$(DOCKER_BMP)_CACHE_MODE  := GIT_CONTENT_SHA 
+$(DOCKER_BMP)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_BMP)_DEP_FILES   := $(DEP_FILES)
+
+$(eval $(call add_dbg_docker,$(DOCKER_BMP),$(DOCKER_BMP_DBG)))
\ No newline at end of file
diff --git a/rules/docker-bmp.mk b/rules/docker-bmp.mk
new file mode 100644
index 000000000000..419f1ed2eccd
--- /dev/null
+++ b/rules/docker-bmp.mk
@@ -0,0 +1,47 @@
+# docker image for BMP agent
+
+DOCKER_BMP_STEM = docker-sonic-bmp
+DOCKER_BMP = $(DOCKER_BMP_STEM).gz
+DOCKER_BMP_DBG = $(DOCKER_BMP_STEM)-$(DBG_IMAGE_MARK).gz
+
+$(DOCKER_BMP)_PATH = $(DOCKERS_PATH)/$(DOCKER_BMP_STEM)
+
+$(DOCKER_BMP)_DEPENDS += $(LIBSWSSCOMMON) \
+                         $(SONIC_BMPD)
+
+$(DOCKER_BMP)_INSTALL_PYTHON_WHEELS = $(SONIC_BMPCFGD) \
+                                      $(SONIC_UTILITIES_PY3)
+$(DOCKER_BMP)_INSTALL_DEBS = $(LIBSWSSCOMMON) \
+                             $(SONIC_BMPD) \
+                             $(PYTHON3_SWSSCOMMON) \
+                             $(LIBYANG_PY3)
+
+$(DOCKER_BMP)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS)
+
+$(DOCKER_BMP)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
+
+$(DOCKER_BMP)_VERSION = 1.0.0
+$(DOCKER_BMP)_PACKAGE_NAME = bmp
+
+$(DOCKER_BMP)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
+
+SONIC_DOCKER_IMAGES += $(DOCKER_BMP)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_BMP)
+ifeq ($(INCLUDE_SYSTEM_BMP), y)
+SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_BMP)
+endif
+
+SONIC_DOCKER_DBG_IMAGES += $(DOCKER_BMP_DBG)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_BMP_DBG)
+ifeq ($(INCLUDE_SYSTEM_BMP), y)
+SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_BMP_DBG)
+endif
+
+$(DOCKER_BMP)_CONTAINER_NAME = bmp
+$(DOCKER_BMP)_RUN_OPT += -t
+$(DOCKER_BMP)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
+$(DOCKER_BMP)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro
+$(DOCKER_BMP)_RUN_OPT += -v /var/run/dbus:/var/run/dbus:rw
+
+$(DOCKER_BMP)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
+$(DOCKER_BMP)_BASE_IMAGE_FILES += monit_bmp:/etc/monit/conf.d
\ No newline at end of file
diff --git a/rules/sonic-bmp.dep b/rules/sonic-bmp.dep
new file mode 100644
index 000000000000..ff0a10222be3
--- /dev/null
+++ b/rules/sonic-bmp.dep
@@ -0,0 +1,10 @@
+SPATH       := $($(SONIC_BMPD)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/sonic-bmp.mk rules/sonic-bmp.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+SMDEP_FILES := $(addprefix $(SPATH)/,$(shell cd $(SPATH) && git ls-files))
+
+$(SONIC_BMPD)_CACHE_MODE  := GIT_CONTENT_SHA
+$(SONIC_BMPD)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(SONIC_BMPD)_DEP_FILES   := $(DEP_FILES)
+$(SONIC_BMPD)_SMDEP_FILES := $(SMDEP_FILES)
+$(SONIC_BMPD)_SMDEP_PATHS := $(SPATH)
\ No newline at end of file
diff --git a/rules/sonic-bmp.mk b/rules/sonic-bmp.mk
new file mode 100644
index 000000000000..1d9f6b1a00c4
--- /dev/null
+++ b/rules/sonic-bmp.mk
@@ -0,0 +1,6 @@
+# sonic-bmp package
+SONIC_BMPD = sonic-bmp_0.1_$(CONFIGURED_ARCH).deb
+$(SONIC_BMPD)_SRC_PATH = $(SRC_PATH)/sonic-bmp
+$(SONIC_BMPD)_DEPENDS  =  $(LIBSWSSCOMMON_DEV) $(LIBSWSSCOMMON)
+$(SONIC_BMPD)_RDEPENDS = $(LIBSWSSCOMMON)
+SONIC_DPKG_DEBS += $(SONIC_BMPD)
\ No newline at end of file
diff --git a/rules/sonic_bmpcfgd.dep b/rules/sonic_bmpcfgd.dep
new file mode 100644
index 000000000000..b5360b7ad05f
--- /dev/null
+++ b/rules/sonic_bmpcfgd.dep
@@ -0,0 +1,13 @@
+
+SPATH       := $($(SONIC_BMPCFGD)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/sonic_bmpcfgd.mk rules/sonic_bmpcfgd.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(SPATH))
+SMDEP_FILES := $(addprefix $(SPATH)/,$(shell cd $(SPATH) && git ls-files))
+
+$(SONIC_BMPCFGD)_CACHE_MODE  := GIT_CONTENT_SHA 
+$(SONIC_BMPCFGD)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(SONIC_BMPCFGD)_DEP_FILES   := $(DEP_FILES)
+$(SONIC_BMPCFGD)_SMDEP_FILES := $(SMDEP_FILES)
+$(SONIC_BMPCFGD)_SMDEP_PATHS := $(SPATH)
+
diff --git a/rules/sonic_bmpcfgd.mk b/rules/sonic_bmpcfgd.mk
new file mode 100644
index 000000000000..ac39175773da
--- /dev/null
+++ b/rules/sonic_bmpcfgd.mk
@@ -0,0 +1,10 @@
+# sonic-bmpcfgd package
+
+SONIC_BMPCFGD = sonic_bmpcfgd_services-1.0-py3-none-any.whl
+$(SONIC_BMPCFGD)_SRC_PATH = $(SRC_PATH)/sonic-bmpcfgd
+$(SONIC_BMPCFGD)_PYTHON_VERSION = 3
+$(SONIC_BMPCFGD)_DEPENDS += $(SONIC_PY_COMMON_PY3) \
+                            $(SONIC_UTILITIES_PY3)
+$(SONIC_BMPCFGD)_DEBS_DEPENDS = $(LIBSWSSCOMMON) \
+                                $(PYTHON3_SWSSCOMMON)
+SONIC_PYTHON_WHEELS += $(SONIC_BMPCFGD)
\ No newline at end of file
diff --git a/slave.mk b/slave.mk
index 17d46e056b3f..f3d9ad3e237e 100644
--- a/slave.mk
+++ b/slave.mk
@@ -170,6 +170,10 @@ ifeq ($(SONIC_INCLUDE_SYSTEM_GNMI),y)
 INCLUDE_SYSTEM_GNMI = y
 endif
 
+ifeq ($(SONIC_INCLUDE_SYSTEM_BMP),y)
+INCLUDE_SYSTEM_BMP = y
+endif
+
 ifeq ($(SONIC_INCLUDE_SYSTEM_EVENTD),y)
 INCLUDE_SYSTEM_EVENTD = y
 endif
@@ -439,6 +443,7 @@ $(info "INCLUDE_MGMT_FRAMEWORK"          : "$(INCLUDE_MGMT_FRAMEWORK)")
 $(info "INCLUDE_ICCPD"                   : "$(INCLUDE_ICCPD)")
 $(info "INCLUDE_SYSTEM_TELEMETRY"        : "$(INCLUDE_SYSTEM_TELEMETRY)")
 $(info "INCLUDE_SYSTEM_GNMI"             : "$(INCLUDE_SYSTEM_GNMI)")
+$(info "INCLUDE_SYSTEM_BMP"              : "$(INCLUDE_SYSTEM_BMP)")
 $(info "INCLUDE_SYSTEM_EVENTD"           : "$(INCLUDE_SYSTEM_EVENTD)")
 $(info "ENABLE_HOST_SERVICE_ON_START"    : "$(ENABLE_HOST_SERVICE_ON_START)")
 $(info "INCLUDE_RESTAPI"                 : "$(INCLUDE_RESTAPI)")
@@ -1433,6 +1438,7 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \
 	export sonic_su_prod_signing_tool="/sonic/scripts/$(shell basename -- $(SECURE_UPGRADE_PROD_SIGNING_TOOL))"
 	export include_system_telemetry="$(INCLUDE_SYSTEM_TELEMETRY)"
 	export include_system_gnmi="$(INCLUDE_SYSTEM_GNMI)"
+	export include_system_bmp="$(INCLUDE_SYSTEM_BMP)"
 	export include_system_eventd="$(INCLUDE_SYSTEM_EVENTD)"
 	export build_reduce_image_size="$(BUILD_REDUCE_IMAGE_SIZE)"
 	export include_restapi="$(INCLUDE_RESTAPI)"
diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index e2fc37801217..8416c3166fe0 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -281,6 +281,10 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install
         libbsd-dev \
         pkg-config \
         check \
+# For bmp
+        librdkafka-dev \
+        libyaml-cpp-dev \
+        libsasl2-dev \
 # For mpdecimal
         docutils-common \
         libjs-sphinxdoc \
diff --git a/src/sonic-bmpcfgd/data/debian/sonic-services-data.bmpcfgd.service b/src/sonic-bmpcfgd/data/debian/sonic-services-data.bmpcfgd.service
deleted file mode 100644
index 0a16edf77fe1..000000000000
--- a/src/sonic-bmpcfgd/data/debian/sonic-services-data.bmpcfgd.service
+++ /dev/null
@@ -1,14 +0,0 @@
-[Unit]
-Description=Process which monitors config_db and manage openbmpd daemon
-Requires=database.service config-setup.service
-After=database.service config-setup.service
-BindsTo=sonic.target
-After=sonic.target
-
-[Service]
-Type=simple
-ExecStart=/usr/local/bin/bmpcfgd
-Restart=always
-
-[Install]
-WantedBy=sonic.target
diff --git a/src/sonic-bmpcfgd/__init__.py b/src/sonic-bmpcfgd/scripts/__init__.py
similarity index 100%
rename from src/sonic-bmpcfgd/__init__.py
rename to src/sonic-bmpcfgd/scripts/__init__.py
diff --git a/src/sonic-bmpcfgd/scripts/bmpcfgd b/src/sonic-bmpcfgd/scripts/bmpcfgd
index 448ca5b24617..d6dd296b81bf 100644
--- a/src/sonic-bmpcfgd/scripts/bmpcfgd
+++ b/src/sonic-bmpcfgd/scripts/bmpcfgd
@@ -21,6 +21,7 @@ CFG_DB = "CONFIG_DB"
 BMP_STATE_DB = "BMP_STATE_DB"
 REDIS_HOSTIP = "127.0.0.1"
 BMP_TABLE = "BMP"
+SYSLOG_IDENTIFIER = "bmpcfgd"
 
 def is_true(val):
     return str(val).lower() == 'true'
@@ -36,7 +37,6 @@ class BMPCfg(DaemonBase):
 
     def load(self, data={}):
         common_config = data.get('table', {})
-
         self.bgp_neighbor_table = is_true(common_config.get('bgp_neighbor_table', 'false'))
         self.bgp_rib_in_table = is_true(common_config.get('bgp_rib_in_table', 'false'))
         self.bgp_rib_out_table = is_true(common_config.get('bgp_rib_out_table', 'false'))
@@ -54,7 +54,7 @@ class BMPCfg(DaemonBase):
 
     def stop_bmp(self):
         self.log_info('BMPCfg: stop bmp daemon')
-        subprocess.call(["service", "openbmpd", "stop"])
+        subprocess.call(["supervisorctl", "stop", "openbmpd"])
 
 
     def reset_bmp_table(self):
@@ -66,7 +66,7 @@ class BMPCfg(DaemonBase):
 
     def start_bmp(self):
         self.log_info('BMPCfg: start bmp daemon')
-        subprocess.call(["service", "openbmpd", "start"])
+        subprocess.call(["supervisorctl", "start", "openbmpd"])
 
 
 class BMPCfgDaemon:
@@ -86,23 +86,7 @@ class BMPCfgDaemon:
                                  lambda table, key, data:
                                      self.bmp_handler(key, op, data))
 
-def signal_handler(sig, frame):
-    if sig == signal.SIGHUP:
-        self.log_info("bmpcfgd: signal 'SIGHUP' is caught and ignoring..")
-    elif sig == signal.SIGINT:
-        self.log_info("bmpcfgd: signal 'SIGINT' is caught and exiting...")
-        sys.exit(128 + sig)
-    elif sig == signal.SIGTERM:
-        self.log_info("bmpcfgd: signal 'SIGTERM' is caught and exiting...")
-        sys.exit(128 + sig)
-    else:
-        self.log_info("bmpcfgd: invalid signal - ignoring..")
-
-
 def main():
-    signal.signal(signal.SIGTERM, signal_handler)
-    signal.signal(signal.SIGINT, signal_handler)
-    signal.signal(signal.SIGHUP, signal_handler)
     daemon = BMPCfgDaemon()
     daemon.register_callbacks()
 
diff --git a/src/sonic-bmpcfgd/setup.py b/src/sonic-bmpcfgd/setup.py
index 33c3fd9803e7..7c76da07e2dd 100644
--- a/src/sonic-bmpcfgd/setup.py
+++ b/src/sonic-bmpcfgd/setup.py
@@ -4,21 +4,6 @@
 import pkg_resources
 from packaging import version
 
-# sonic_dependencies, version requirement only supports '>='
-sonic_dependencies = ['sonic-py-common', 'sonic-utilities']
-for package in sonic_dependencies:
-    try:
-        package_dist = pkg_resources.get_distribution(package.split(">=")[0])
-    except pkg_resources.DistributionNotFound:
-        print(package + " is not found!", file=sys.stderr)
-        print("Please build and install SONiC python wheels dependencies from sonic-buildimage", file=sys.stderr)
-        exit(1)
-    if ">=" in package:
-        if version.parse(package_dist.version) >= version.parse(package.split(">=")[1]):
-            continue
-        print(package + " version not match!", file=sys.stderr)
-        exit(1)
-
 setup(
     name = 'sonic-bmpcfgd-services',
     version = '1.0',
@@ -29,7 +14,6 @@
     url = 'https://github.com/Azure/sonic-buildimage',
     maintainer = 'Feng Pan',
     maintainer_email = 'fenpan@microsoft.com',
-    packages = setuptools.find_packages(),
     scripts = [
         'scripts/bmpcfgd'
     ],
@@ -38,7 +22,12 @@
         'netaddr==0.8.0',
         'pyyaml==6.0.1',
         'ipaddress==1.0.23'
-    ] + sonic_dependencies,
+    ],
+    entry_points={
+        'console_scripts': [
+            'bmpcfgd = scripts.bmpcfgd:main',
+        ]
+    },
     setup_requires = [
         'pytest-runner',
         'wheel'
@@ -70,6 +59,6 @@
         'Programming Language :: Python :: 3.7',
         'Topic :: System',
     ],
-    keywords = 'sonic SONiC bmp services',
+    keywords = 'SONiC bmp config daemon',
     test_suite = 'setup.get_test_suite'
 )
diff --git a/src/sonic-bmpcfgd/tests/bmpcfgd_test.py b/src/sonic-bmpcfgd/tests/bmpcfgd_test.py
index a6abc6c3b703..ce6fbcf2a02f 100644
--- a/src/sonic-bmpcfgd/tests/bmpcfgd_test.py
+++ b/src/sonic-bmpcfgd/tests/bmpcfgd_test.py
@@ -27,8 +27,6 @@
 bmpcfgd = load_module_from_source('bmpcfgd', bmpcfgd_path)
 
 
-from bmpcfgd import signal_handler
-
 original_syslog = bmpcfgd.syslog
 
 # Mock swsscommon classes
@@ -46,71 +44,42 @@ def setUp(self):
         self.test_data['BMP'] = {}
         self.test_data['BMP']['table'] = {'bgp_neighbor_table': 'false', 'bgp_rib_in_table': 'false', 'bgp_rib_out_table': 'false'}
 
-    @mock.patch('sonic_installer.bootloader.get_bootloader', side_effect=[MockBootloader()])
-    @mock.patch('syslog.syslog')
     @mock.patch('subprocess.call')
-    def test_bmpcfgd_neighbor_enable(self, mock_check_call, mock_syslog, mock_get_bootloader):
+    @mock.patch('bmpcfgd.BMPCfg.log_info')
+    def test_bmpcfgd_neighbor_enable(self, mock_call, mock_log_info):
         self.test_data['BMP']['table']['bgp_neighbor_table'] = 'true'
         MockConfigDb.set_config_db(self.test_data)
         bmp_config_daemon = bmpcfgd.BMPCfgDaemon()
         bmp_config_daemon.register_callbacks()
         bmp_config_daemon.bmp_handler("BMP", '', self.test_data)
         expected_calls = [
-            mock.call(original_syslog.LOG_INFO, 'BMPCfg: update : True, False, False'),
-            mock.call(original_syslog.LOG_INFO, 'BMPCfg: stop bmp daemon'),
-            mock.call(original_syslog.LOG_INFO, 'BMPCfg: Reset bmp table from state_db'),
-            mock.call(original_syslog.LOG_INFO, 'BMPCfg: start bmp daemon'),
+            mock.call(["supervisorctl", "stop", "openbmpd"]),
+            mock.call(["supervisorctl", "start", "openbmpd"])
         ]
-        mock_syslog.assert_has_calls(expected_calls)
+        mock_log_info.assert_has_calls(expected_calls)
 
-    @mock.patch('sonic_installer.bootloader.get_bootloader', side_effect=[MockBootloader()])
-    @mock.patch('syslog.syslog')
-    @mock.patch('subprocess.check_call')
-    def test_bmpcfgd_bgp_rib_in_enable(self, mock_check_call, mock_syslog, mock_get_bootloader):
+    @mock.patch('subprocess.call')
+    @mock.patch('bmpcfgd.BMPCfg.log_info')
+    def test_bmpcfgd_bgp_rib_in_enable(self, mock_call, mock_log_info):
         self.test_data['BMP']['table']['bgp_rib_in_table'] = 'true'
         MockConfigDb.set_config_db(self.test_data)
         bmp_config_daemon = bmpcfgd.BMPCfgDaemon()
         bmp_config_daemon.bmp_handler("BMP", '', self.test_data)
         expected_calls = [
-            mock.call(original_syslog.LOG_INFO, 'BMPCfg: update : False, True, False'),
-            mock.call(original_syslog.LOG_INFO, 'BMPCfg: stop bmp daemon'),
-            mock.call(original_syslog.LOG_INFO, 'BMPCfg: Reset bmp table from state_db'),
-            mock.call(original_syslog.LOG_INFO, 'BMPCfg: start bmp daemon'),
+            mock.call(["supervisorctl", "stop", "openbmpd"]),
+            mock.call(["supervisorctl", "start", "openbmpd"])
         ]
-        mock_syslog.assert_has_calls(expected_calls)
+        mock_log_info.assert_has_calls(expected_calls)
 
-    @mock.patch('sonic_installer.bootloader.get_bootloader', side_effect=[MockBootloader()])
-    @mock.patch('syslog.syslog')
-    @mock.patch('subprocess.check_call')
-    def test_bmpcfgd_bgp_rib_out_enable(self, mock_check_call, mock_syslog, mock_get_bootloader):
+    @mock.patch('subprocess.call')
+    @mock.patch('bmpcfgd.BMPCfg.log_info')
+    def test_bmpcfgd_bgp_rib_out_enable(self, mock_call, mock_log_info):
         self.test_data['BMP']['table']['bgp_rib_out_table'] = 'true'
         MockConfigDb.set_config_db(self.test_data)
         bmp_config_daemon = bmpcfgd.BMPCfgDaemon()
         bmp_config_daemon.bmp_handler("BMP", '', self.test_data)
         expected_calls = [
-            mock.call(original_syslog.LOG_INFO, 'BMPCfg: update : False, False, True'),
-            mock.call(original_syslog.LOG_INFO, 'BMPCfg: stop bmp daemon'),
-            mock.call(original_syslog.LOG_INFO, 'BMPCfg: Reset bmp table from state_db'),
-            mock.call(original_syslog.LOG_INFO, 'BMPCfg: start bmp daemon'),
+            mock.call(["supervisorctl", "stop", "openbmpd"]),
+            mock.call(["supervisorctl", "start", "openbmpd"])
         ]
-        mock_syslog.assert_has_calls(expected_calls)
-
-
-    @mock.patch('syslog.syslog')
-    @mock.patch.object(sys, 'exit')
-    def test_signal_handler(self, mock_exit, mock_syslog):
-        # Test SIGHUP signal
-        signal_handler(signal.SIGHUP, None)
-        mock_syslog.assert_called_with(original_syslog.LOG_INFO, "bmpcfgd: signal 'SIGHUP' is caught and ignoring..")
-        mock_exit.assert_not_called()
-        # Test SIGINT signal
-        signal_handler(signal.SIGINT, None)
-        mock_syslog.assert_called_with(original_syslog.LOG_INFO, "bmpcfgd: signal 'SIGINT' is caught and exiting...")
-        mock_exit.assert_called_once_with(128 + signal.SIGINT)
-        # Test SIGTERM signal
-        signal_handler(signal.SIGTERM, None)
-        mock_syslog.assert_called_with(original_syslog.LOG_INFO, "bmpcfgd: signal 'SIGTERM' is caught and exiting...")
-        mock_exit.assert_called_with(128 + signal.SIGTERM)
-        # Test invalid signal
-        signal_handler(999, None)
-        mock_syslog.assert_called_with(original_syslog.LOG_INFO, "bmpcfgd: invalid signal - ignoring..")
+        mock_log_info.assert_has_calls(expected_calls)
\ No newline at end of file
diff --git a/src/sonic-bmpcfgd/tests/common/mock_bootloader.py b/src/sonic-bmpcfgd/tests/common/mock_bootloader.py
new file mode 100644
index 000000000000..37781ad14833
--- /dev/null
+++ b/src/sonic-bmpcfgd/tests/common/mock_bootloader.py
@@ -0,0 +1,13 @@
+class MockBootloader(object):
+
+    def __init__(self, enforce=False):
+        self.enforce = enforce
+
+    def get_next_image(self):
+        return ""
+
+    def set_fips(self, image, enable):
+        self.enforce = enable
+
+    def get_fips(self, image):
+        return self.enforce

From 14ed54b0f25a4610bee3d3169542e199157cc59e Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 22 Nov 2024 16:01:49 +0800
Subject: [PATCH 253/364] [submodule] Update submodule sonic-bmp to the latest
 HEAD automatically (#20892)

#### Why I did it
src/sonic-bmp
```
* a2d576b - (HEAD -> master, origin/master, origin/HEAD) Update README.md to add azure pipeline status link (12 hours ago) [Feng-msft]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-bmp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-bmp b/src/sonic-bmp
index bfbd47bdcc28..a2d576b22acc 160000
--- a/src/sonic-bmp
+++ b/src/sonic-bmp
@@ -1 +1 @@
-Subproject commit bfbd47bdcc287b0bfbbad4b227e5d1b739185954
+Subproject commit a2d576b22accd83505b0081068c34be0a2c49264

From b46bd4e7e69e52826018e916cfef7d37cec0da55 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 22 Nov 2024 18:15:41 +0800
Subject: [PATCH 254/364] [submodule] Update submodule sonic-swss to the latest
 HEAD automatically (#20894)

#### Why I did it
src/sonic-swss
```
* eda63a9b - (HEAD -> master, origin/master, origin/HEAD) Vlanmgrd handling of portchannel does not exist more gracefully. (#3367) (6 hours ago) [abdosi]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 1843de47c7c7..eda63a9b25ab 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 1843de47c7c71e6587a97c8c6ba6d94c76061687
+Subproject commit eda63a9b25abea80638322b5d28d9acc82d1e1b5

From 4cbce69676e3e0e13693117fe7b01a370e45ab76 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 22 Nov 2024 18:15:59 +0800
Subject: [PATCH 255/364] [submodule] Update submodule sonic-swss-common to the
 latest HEAD automatically (#20854)

#### Why I did it
src/sonic-swss-common
```
* ebd2afb - (HEAD -> master, origin/master, origin/HEAD) Supports FRR-VRRP configuration (#813) (25 hours ago) [Philo]
* fe30ccd - [DASH] Add DASH Meter Policy , Rule , Counter table definitions (#949) (2 days ago) [Sundara Gurunathan]
* 901f3b4 - [common] enable redispipeline to only publish after flush (#895) (3 days ago) [Yijiao Qin]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 378e82818165..ebd2afb0a294 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 378e82818165d75aa2fdc66961e72c4852eae69b
+Subproject commit ebd2afb0a2946420f6a42ba1f54f8b2c971781be

From 4a99808cbdd319dfe0a79a4b8592f2c15dfedb34 Mon Sep 17 00:00:00 2001
From: wenyiz2021 <91497961+wenyiz2021@users.noreply.github.com>
Date: Fri, 22 Nov 2024 11:05:55 -0800
Subject: [PATCH 256/364] [master] DNX SAI update to 11.2.13.1 (#20839)

Run pipeline all mgmt tests with this SAI version on a T2 testbed.
---
 platform/broadcom/sai-modules.mk | 2 +-
 platform/broadcom/sai.mk         | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/broadcom/sai-modules.mk b/platform/broadcom/sai-modules.mk
index 05ca22e7319d..53f0768a15e2 100644
--- a/platform/broadcom/sai-modules.mk
+++ b/platform/broadcom/sai-modules.mk
@@ -10,7 +10,7 @@ $(BRCM_OPENNSL_KERNEL)_MACHINE = broadcom
 SONIC_DPKG_DEBS += $(BRCM_OPENNSL_KERNEL)
 
 # SAI bcm modules for DNX family ASIC
-BRCM_DNX_OPENNSL_KERNEL_VERSION = 11.2.9.1
+BRCM_DNX_OPENNSL_KERNEL_VERSION = 11.2.13.1-1
 
 BRCM_DNX_OPENNSL_KERNEL = opennsl-modules-dnx_$(BRCM_DNX_OPENNSL_KERNEL_VERSION)_amd64.deb
 $(BRCM_DNX_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules-dnx
diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index 85cdd54e5622..5fb3667a883d 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,5 +1,5 @@
 LIBSAIBCM_XGS_VERSION = 11.2.13.1
-LIBSAIBCM_DNX_VERSION = 11.2.9.1
+LIBSAIBCM_DNX_VERSION = 11.2.13.1-1
 LIBSAIBCM_XGS_BRANCH_NAME = SAI_11.2.0_GA
 LIBSAIBCM_DNX_BRANCH_NAME = SAI_11.2.0_GA
 LIBSAIBCM_XGS_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_XGS_BRANCH_NAME)/$(LIBSAIBCM_XGS_VERSION)/xgs"

From cf618446dc0c93824dd935ffe692ed9711a3a537 Mon Sep 17 00:00:00 2001
From: Feng-msft <fenpan@microsoft.com>
Date: Sat, 23 Nov 2024 06:17:17 +0800
Subject: [PATCH 257/364] Keep using syslog for bmp since no large output.
 (#20896)

Why I did it
Keep using syslog for bmp since no large output.

How I did it
Revert previous bmp log change

How to verify it
revert change, pending verification pass.
---
 files/image_config/logrotate/rsyslog.j2               | 1 -
 files/image_config/rsyslog/rsyslog.d/00-sonic.conf.j2 | 6 ------
 2 files changed, 7 deletions(-)

diff --git a/files/image_config/logrotate/rsyslog.j2 b/files/image_config/logrotate/rsyslog.j2
index 318d22a94814..b0a7ff7e7002 100644
--- a/files/image_config/logrotate/rsyslog.j2
+++ b/files/image_config/logrotate/rsyslog.j2
@@ -31,7 +31,6 @@
 /var/log/teamd.log
 /var/log/telemetry.log
 /var/log/gnmi.log
-/var/log/bmp.log
 /var/log/frr/bgpd.log
 /var/log/frr/zebra.log
 /var/log/swss/sairedis*.rec
diff --git a/files/image_config/rsyslog/rsyslog.d/00-sonic.conf.j2 b/files/image_config/rsyslog/rsyslog.d/00-sonic.conf.j2
index 19fe35b1001e..a5b4689741dc 100644
--- a/files/image_config/rsyslog/rsyslog.d/00-sonic.conf.j2
+++ b/files/image_config/rsyslog/rsyslog.d/00-sonic.conf.j2
@@ -47,12 +47,6 @@ if $msg startswith " gnmi-native" then {
     stop
 }
 
-## bmp rules
-if $msg startswith " bmp" then {
-    /var/log/bmp.log
-    stop
-}
-
 ## telemetry rules
 if $msg startswith  " telemetry" or ($msg startswith  " dialout" )then {
     /var/log/telemetry.log

From 886500ac784543921840423ae9ab5d3df3f106e0 Mon Sep 17 00:00:00 2001
From: Hua Liu <58683130+liuh-80@users.noreply.github.com>
Date: Sat, 23 Nov 2024 06:24:15 +0800
Subject: [PATCH 258/364] Add cert revocation list support to GNMI service.
 (#19536)

Add GNMI CRL support.

Why I did it
Allow gnmi service revoke client cert with CRL

How I did it
Add GNMI CRL config to yang model.

How to verify it
Pass all UT.
Verified with new sonic-mgmt test case.
---
 dockers/docker-sonic-gnmi/gnmi-native.sh      | 12 +++++++++++
 dockers/docker-sonic-telemetry/telemetry.sh   | 12 +++++++++++
 .../tests/files/sample_config_db.json         |  8 ++++++--
 .../yang_model_tests/tests_config/gnmi.json   | 20 ++++++++++++++-----
 .../tests_config/telemetry.json               | 20 ++++++++++++++-----
 .../yang-models/sonic-gnmi.yang               |  9 +++++++++
 .../yang-models/sonic-telemetry.yang          |  9 +++++++++
 7 files changed, 78 insertions(+), 12 deletions(-)

diff --git a/dockers/docker-sonic-gnmi/gnmi-native.sh b/dockers/docker-sonic-gnmi/gnmi-native.sh
index 1756ea1dba53..8dae895d89df 100755
--- a/dockers/docker-sonic-gnmi/gnmi-native.sh
+++ b/dockers/docker-sonic-gnmi/gnmi-native.sh
@@ -76,6 +76,18 @@ else
     TELEMETRY_ARGS+=" -v=2"
 fi
 
+if [ -nz "$GNMI" ]; then
+    ENABLE_CRL=$(echo $GNMI | jq -r '.enable_crl')
+    if [ $ENABLE_CRL == "true" ]; then
+        TELEMETRY_ARGS+=" --enable_crl"
+    fi
+
+    CRL_EXPIRE_DURATION=$(echo $GNMI | jq -r '.crl_expire_duration')
+    if [ -n $CRL_EXPIRE_DURATION ]; then
+        TELEMETRY_ARGS+=" --crl_expire_duration $CRL_EXPIRE_DURATION"
+    fi
+fi
+
 # Enable ZMQ for SmartSwitch
 LOCALHOST_SUBTYPE=`sonic-db-cli CONFIG_DB hget "DEVICE_METADATA|localhost" "subtype"`
 if [[ x"${LOCALHOST_SUBTYPE}" == x"SmartSwitch" ]]; then
diff --git a/dockers/docker-sonic-telemetry/telemetry.sh b/dockers/docker-sonic-telemetry/telemetry.sh
index d1c9216d4195..29ea00ea5ce0 100755
--- a/dockers/docker-sonic-telemetry/telemetry.sh
+++ b/dockers/docker-sonic-telemetry/telemetry.sh
@@ -74,6 +74,18 @@ else
     TELEMETRY_ARGS+=" -v=2"
 fi
 
+if [ -nz "$GNMI" ]; then
+    ENABLE_CRL=$(echo $GNMI | jq -r '.enable_crl')
+    if [ $ENABLE_CRL == "true" ]; then
+        TELEMETRY_ARGS+=" --enable_crl"
+    fi
+
+    CRL_EXPIRE_DURATION=$(echo $GNMI | jq -r '.crl_expire_duration')
+    if [ -n $CRL_EXPIRE_DURATION ]; then
+        TELEMETRY_ARGS+=" --crl_expire_duration $CRL_EXPIRE_DURATION"
+    fi
+fi
+
 # gNMI save-on-set behavior is disabled by default.
 # Save-on-set can be turned on by setting the "TELEMETRY|gnmi|save_on_set"
 # to "true".
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 93283acee587..cc446ab378e8 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -1331,7 +1331,9 @@
             "gnmi": {
                 "client_auth": "true",
                 "log_level": "2",
-                "port": "50051"
+                "port": "50051",
+                "enable_crl": "false",
+                "crl_expire_duration": "86400"
             }
         },
         "TELEMETRY_CLIENT": {
@@ -1368,7 +1370,9 @@
             "gnmi": {
                 "client_auth": "true",
                 "log_level": "2",
-                "port": "50052"
+                "port": "50052",
+                "enable_crl": "false",
+                "crl_expire_duration": "86400"
             }
         },
         "GNMI_CLIENT_CERT": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json
index cdad6fe31f53..0c8327a8991a 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json
@@ -10,7 +10,9 @@
                 "gnmi": {
                     "client_auth": "true",
                     "log_level": "2",
-                    "port": "50052"
+                    "port": "50052",
+                    "enable_crl": "true",
+                    "crl_expire_duration": "86400"
                 }
             }
         }
@@ -26,7 +28,9 @@
                 "gnmi": {
                     "client_auth": "up",
                     "log_level": "2",
-                    "port": "50052"
+                    "port": "50052",
+                    "enable_crl": "true",
+                    "crl_expire_duration": "86400"
                 }
             }
         }
@@ -42,7 +46,9 @@
                 "gnmi": {
                     "client_auth": "true",
                     "log_level": "2",
-                    "port": "abc"
+                    "port": "abc",
+                    "enable_crl": "true",
+                    "crl_expire_duration": "86400"
                 }
             }
         }
@@ -59,7 +65,9 @@
                     "client_auth": "true",
                     "log_level": "2",
                     "port": "50051",
-                    "save_on_set": "wrong"
+                    "save_on_set": "wrong",
+                    "enable_crl": "true",
+                    "crl_expire_duration": "86400"
                 }
             }
         }
@@ -76,7 +84,9 @@
                     "client_auth": "true",
                     "log_level": "2",
                     "port": "50052",
-                    "save_on_set": "false"
+                    "save_on_set": "false",
+                    "enable_crl": "true",
+                    "crl_expire_duration": "86400"
                 }
             }
         }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/telemetry.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/telemetry.json
index 18e708262e74..2d3bd08f5d20 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/telemetry.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/telemetry.json
@@ -10,7 +10,9 @@
                 "gnmi": {
                     "client_auth": "true",
                     "log_level": "2",
-                    "port": "50051"
+                    "port": "50051",
+                    "enable_crl": "true",
+                    "crl_expire_duration": "86400"
                 }
             }
         }
@@ -26,7 +28,9 @@
                 "gnmi": {
                     "client_auth": "up",
                     "log_level": "2",
-                    "port": "50051"
+                    "port": "50051",
+                    "enable_crl": "true",
+                    "crl_expire_duration": "86400"
                 }
             }
         }
@@ -42,7 +46,9 @@
                 "gnmi": {
                     "client_auth": "true",
                     "log_level": "2",
-                    "port": "abc"
+                    "port": "abc",
+                    "enable_crl": "true",
+                    "crl_expire_duration": "86400"
                 }
             }
         }
@@ -59,7 +65,9 @@
                     "client_auth": "true",
                     "log_level": "2",
                     "port": "50051",
-                    "save_on_set": "wrong"
+                    "save_on_set": "wrong",
+                    "enable_crl": "true",
+                    "crl_expire_duration": "86400"
                 }
             }
         }
@@ -76,7 +84,9 @@
                     "client_auth": "true",
                     "log_level": "2",
                     "port": "50051",
-                    "save_on_set": "false"
+                    "save_on_set": "false",
+                    "enable_crl": "true",
+                    "crl_expire_duration": "86400"
                 }
             }
         }
diff --git a/src/sonic-yang-models/yang-models/sonic-gnmi.yang b/src/sonic-yang-models/yang-models/sonic-gnmi.yang
index f7c4fef33c53..d33ea35083dd 100644
--- a/src/sonic-yang-models/yang-models/sonic-gnmi.yang
+++ b/src/sonic-yang-models/yang-models/sonic-gnmi.yang
@@ -76,6 +76,15 @@ module sonic-gnmi {
                     description "Flag for enabling save on set.";
                 }
 
+                leaf enable_crl {
+                    type boolean;
+                    description "Flag for enable certificate revocation list.";
+                }
+
+                leaf crl_expire_duration {
+                    type uint32;
+                    description "Certificate revocation list cache expire duration.";
+                }
             }
         }
 
diff --git a/src/sonic-yang-models/yang-models/sonic-telemetry.yang b/src/sonic-yang-models/yang-models/sonic-telemetry.yang
index 5cbdf2bd9330..239f23666dda 100644
--- a/src/sonic-yang-models/yang-models/sonic-telemetry.yang
+++ b/src/sonic-yang-models/yang-models/sonic-telemetry.yang
@@ -76,6 +76,15 @@ module sonic-telemetry {
                     description "Flag for enabling save on set.";
                 }
 
+                leaf enable_crl {
+                    type boolean;
+                    description "Flag for enable certificate revocation list.";
+                }
+
+                leaf crl_expire_duration {
+                    type uint32;
+                    description "Certificate revocation list cache expire duration.";
+                }
             }
 
         }

From 8f1227581f1171c7f421d67fe1c3086478708b2c Mon Sep 17 00:00:00 2001
From: Vivek <vivekreddykarri98@gmail.com>
Date: Fri, 22 Nov 2024 15:28:56 -0800
Subject: [PATCH 259/364] [Yang] Add TUNNEL_TERM field to ACL_RULE table
 (#20454)

Why I did it
Add support for user to match on TUNNEL_TERM flag in ACL_RULE table.
---
 src/sonic-yang-models/doc/Configuration.md    |  4 +-
 .../tests/files/sample_config_db.json         |  6 +++
 .../tests/yang_model_tests/tests/acl.json     |  7 +++
 .../yang_model_tests/tests_config/acl.json    | 50 +++++++++++++++++++
 .../yang-templates/sonic-acl.yang.j2          |  5 ++
 5 files changed, 71 insertions(+), 1 deletion(-)

diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index 4ebae55c3ea2..02108310f4f0 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -342,7 +342,8 @@ and migration plan
             "MATCHES": [
                 "IN_PORTS",
                 "OUT_PORTS",
-                "SRC_IP"
+                "SRC_IP",
+                "TUNNEL_TERM"
             ],
             "ACTIONS": [
                 "PACKET_ACTION",
@@ -369,6 +370,7 @@ and migration plan
             "PRIORITY": "999",
             "PACKET_ACTION": "DROP",
             "SRC_IP": "1.1.1.1/32",
+            "TUNNEL_TERM": "true"
         }
     }
 }
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index cc446ab378e8..7298cdec9c22 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -328,6 +328,12 @@
                 "SRC_IP": "1.1.1.1/32",
                 "BTH_OPCODE": "0x11/0xbf",
                 "AETH_SYNDROME": "0x60/0x60"
+            },
+            "DATAACL|RULE0": {
+                "PRIORITY": "999",
+                "PACKET_ACTION": "FORWARD",
+                "TUNNEL_TERM": "true",
+                "DST_IP": "1.1.1.1/32"
             }
         },
         "SWITCH_HASH": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json b/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json
index 309b64bb06a5..0454700233d8 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json
@@ -174,5 +174,12 @@
     },
     "ACL_TABLE_L3V4V6_TABLE_TYPE": {
         "desc": "ACL_TABLE Validate type L3V4V6."
+    },
+    "ACL_RULE_WITH_TUNNEL_TERMINATION_WRONG_TYPE": {
+        "desc": "ACL Rule with Tunnel Termination",
+        "eStrKey" : "InvalidValue"
+    },
+    "ACL_RULE_WITH_TUNNEL_TERMINATION": {
+        "desc": "ACL Rule with Tunnel Termination"
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json
index c50fd8c71a6a..75692f1a2dd5 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json
@@ -1698,5 +1698,55 @@
                 ]
             }
         }
+    },
+    "ACL_RULE_WITH_TUNNEL_TERMINATION_WRONG_TYPE": {
+        "sonic-acl:sonic-acl": {
+            "sonic-acl:ACL_RULE": {
+                "ACL_RULE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "TUNNEL_TERM_TABLE",
+                        "PRIORITY": 9981,
+                        "TUNNEL_TERM": "whatever",
+                        "RULE_NAME": "Rule_1"
+                    }
+                ]
+            },
+            "sonic-acl:ACL_TABLE": {
+                "ACL_TABLE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "TUNNEL_TERM_TABLE",
+                        "policy_desc": "TUNNEL_TERM_TABLE",
+                        "ports": [ "" ],
+                        "stage": "INGRESS",
+                        "type": "L3"
+                    }
+                ]
+            }
+        }
+    },
+    "ACL_RULE_WITH_TUNNEL_TERMINATION": {
+        "sonic-acl:sonic-acl": {
+            "sonic-acl:ACL_RULE": {
+                "ACL_RULE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "TUNNEL_TERM_TABLE",
+                        "PRIORITY": 9981,
+                        "TUNNEL_TERM": "true",
+                        "RULE_NAME": "Rule_1"
+                    }
+                ]
+            },
+            "sonic-acl:ACL_TABLE": {
+                "ACL_TABLE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "TUNNEL_TERM_TABLE",
+                        "policy_desc": "TUNNEL_TERM_TABLE",
+                        "ports": [ "" ],
+                        "stage": "INGRESS",
+                        "type": "L3"
+                    }
+                ]
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2 b/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2
index ebaffe96e8d9..f1a0629f3222 100644
--- a/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2
+++ b/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2
@@ -282,6 +282,11 @@ module sonic-acl {
 						pattern '0[xX][0-9a-fA-F]{1,2}/0[xX][0-9a-fA-F]{1,2}';
 					}
 				}
+
+				leaf TUNNEL_TERM {
+					description "Tunnel Termination Flag";
+					type boolean;
+				}
 			}
 			/* end of ACL_RULE_LIST */
 		}

From cdbe3a35f3791d6e41469e9b5ddbaa0b45ea4a5f Mon Sep 17 00:00:00 2001
From: Aryeh Feigin <101218333+arfeigin@users.noreply.github.com>
Date: Sat, 23 Nov 2024 01:43:26 +0200
Subject: [PATCH 260/364] Yang-models interface name length validation (#20108)

This PR is accompanied by sonic-net/sonic-swss-common#889 and sonic-net/sonic-utilities#3397

Why I did it
Validate interface name length does not exceed the limitation of IFNAMSIZ to align to kernel restrictions.

How I did it
Add validation checks in the relevant yang-model definitions for the following interface types:

vxlan
vlan
vrf
loopback
subinterface
portchannel

How to verify it
UT added
---
 .../yang_model_tests/tests/loopback.json      |  4 +++
 .../tests/yang_model_tests/tests/vlan.json    |  6 +++-
 .../tests/yang_model_tests/tests/vrf.json     |  4 +++
 .../tests/yang_model_tests/tests/vxlan.json   | 11 +++++--
 .../tests_config/loopback.json                | 20 ++++++++++++
 .../yang_model_tests/tests_config/vlan.json   | 19 +++++++++++-
 .../yang_model_tests/tests_config/vrf.json    | 10 ++++++
 .../yang_model_tests/tests_config/vxlan.json  | 31 +++++++++++++++++++
 .../yang-models/sonic-loopback-interface.yang |  2 +-
 .../yang-models/sonic-portchannel.yang        |  3 +-
 .../yang-models/sonic-vlan.yang               |  2 +-
 .../yang-models/sonic-vrf.yang                |  6 +++-
 .../yang-models/sonic-vxlan.yang              |  3 +-
 .../yang-templates/sonic-types.yang.j2        | 10 ++++++
 14 files changed, 119 insertions(+), 12 deletions(-)

diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/loopback.json b/src/sonic-yang-models/tests/yang_model_tests/tests/loopback.json
index 9fdbb0a5e352..e71ae255bd74 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/loopback.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/loopback.json
@@ -9,5 +9,9 @@
     },
     "LOOPBACK_INTERFACE_VALID_NAT_ZONE_RANGE": {
         "desc": "Configure valid value for nat zone."
+    },
+    "LOOPBACK_INVALID_INTERFACE_NAME_LENGTH": {
+        "desc": "Configure invalid value for loopback interface name length.",
+        "eStr" : "Invalid interface name length, it must not exceed 16 characters."
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/vlan.json b/src/sonic-yang-models/tests/yang_model_tests/tests/vlan.json
index a795a7e3b3c2..9ca18040e228 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/vlan.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/vlan.json
@@ -11,6 +11,10 @@
         "eStrKey" : "Pattern",
         "eStr": ["Vlan"]
     },
+    "INVALID_LONG_VLAN_NAME": {
+        "desc": "INVALID VLAN_NAME FIELD IN VLAN TABLE.",
+        "eStrKey" : "Pattern"
+    },
     "WRONG_FAMILY_WITH_IP_PREFIX": {
         "desc": "Configure Wrong family with ip-prefix for VLAN_Interface Table",
         "eStrKey" : "Must"
@@ -93,7 +97,7 @@
     },
     "VLAN_CREATE_VLAN_WITH_MISSMATCHING_NAME": {
         "desc": "Create Vlan so that name doesn't match id",
-        "eStr": "The vlanid must correspond to the VLAN name"        
+        "eStr": "The vlanid must correspond to the VLAN name"
     },
     "IP_PREFIX_WITHOUT_CREATNG_VLAN": {
         "desc": "Create IP on not created Vlan",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/vrf.json b/src/sonic-yang-models/tests/yang_model_tests/tests/vrf.json
index 73e31ee109cc..fb0bdc85a2c1 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/vrf.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/vrf.json
@@ -6,6 +6,10 @@
         "desc": "Configure wrong value for vrf name.",
         "eStr" : ["Invalid", "VRF name"]
     },
+    "VRF_TEST_INVALID_LONG__NAME": {
+        "desc": "Configure invalid length value for vrf name.",
+        "eStr" : "Invalid interface name length, it must not exceed 16 characters."
+    },
     "VRF_TEST_WITH_FALLBACK": {
         "desc": "Configure VRF with fallback in VRF table."
     },
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/vxlan.json b/src/sonic-yang-models/tests/yang_model_tests/tests/vxlan.json
index 778ab68a644f..c064500fbfa5 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/vxlan.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/vxlan.json
@@ -18,14 +18,19 @@
         "eStrKey": "Range"
     },
     "VXLAN_TUNNEL_NAME_VALID_TEST": {
-        "desc": "Tunnel Name string length 30 is valid"
+        "desc": "Tunnel Name string length 15 is valid"
+    },
+    "VXLAN_TUNNEL_NAME_INVALID_LENGTH_TEST": {
+        "desc": "Tunnel Name string length exceeding 16 is invalid",
+        "eStr" : "Invalid interface name length, it must not exceed 16 characters."
     },
     "VXLAN_TUNNEL_NAME_INVALID_TEST": {
         "desc": "Tunnel Name string length 0 is invalid",
-        "eStrKey": "Must"
+        "eStr" : "Invalid interface name length, it must not exceed 16 characters."
     },
     "VXLAN_TUNNEL_NAME_VALID_DST_IPV4_TEST": {
-        "desc": "Valid IPv4 Destination Address"
+        "desc": "Valid IPv4 Destination Address",
+        "eStr" : "Invalid interface name length, it must not exceed 16 characters."
     },
     "VXLAN_TUNNEL_NAME_VALID_DST_IPV6_TEST": {
         "desc": "Valid IPv6 Destination Address"
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/loopback.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/loopback.json
index 9ebb48556256..274b52548461 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/loopback.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/loopback.json
@@ -52,5 +52,25 @@
                 ]
             }
         }
+    },
+    "LOOPBACK_INVALID_INTERFACE_NAME_LENGTH": {
+        "sonic-loopback-interface:sonic-loopback-interface": {
+            "sonic-loopback-interface:LOOPBACK_INTERFACE": {
+                "LOOPBACK_INTERFACE_IPPREFIX_LIST": [
+                    {
+                        "family": "IPv4",
+                        "ip-prefix": "10.0.0.1/30",
+                        "name": "lo1lo1lo1lo1lo1lo1",
+                        "scope": "global"
+                    }
+                ],
+                "LOOPBACK_INTERFACE_LIST": [
+                    {
+                        "name": "lo1lo1lo1lo1lo1lo1",
+                        "nat_zone": "2"
+                    }
+                ]
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan.json
index b4288472cfa3..762287c82cd5 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan.json
@@ -45,6 +45,23 @@
             }
         }
     },
+    "INVALID_LONG_VLAN_NAME": {
+        "sonic-vlan:sonic-vlan": {
+            "sonic-vlan:VLAN": {
+                "VLAN_LIST": [
+                    {
+                        "admin_status": "up",
+                        "description": "server_vlan",
+                        "dhcp_servers": [
+                            "10.186.72.56"
+                        ],
+                        "mtu": "9100",
+                        "name": "Vlan123456789012"
+                    }
+                ]
+            }
+        }
+    },
     "DHCP_SERVER_INCORRECT_FORMAT": {
         "sonic-vlan:sonic-vlan": {
             "sonic-vlan:VLAN": {
@@ -827,7 +844,7 @@
                     "type": "SPAN",
                     "src_port": "Ethernet1",
                     "dst_port": "Ethernet2"
-                }]   
+                }]
             }
         }
     },
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vrf.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vrf.json
index 082ec022f81b..09ca521fe82d 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vrf.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vrf.json
@@ -19,6 +19,16 @@
         }
     },
 
+    "VRF_TEST_INVALID_LONG__NAME": {
+        "sonic-vrf:sonic-vrf": {
+            "sonic-vrf:VRF": {
+                "VRF_LIST": [{
+                        "name": "VrfNameTooLong!!!"
+                }]
+            }
+        }
+    },
+
     "VRF_TEST_WITH_FALLBACK": {
         "sonic-vrf:sonic-vrf": {
             "sonic-vrf:VRF": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vxlan.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vxlan.json
index 64c26d3e9ef7..79046b116724 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vxlan.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vxlan.json
@@ -166,6 +166,37 @@
         }
     },
     "VXLAN_TUNNEL_NAME_VALID_TEST": {
+        "sonic-vlan:sonic-vlan": {
+            "sonic-vlan:VLAN": {
+                "VLAN_LIST": [
+                    {
+                        "name": "Vlan100"
+                    }
+                ]
+            }
+        },
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "15CharsLongName",
+                        "src_ip": "1.2.3.4"
+                    }
+                ]
+            },
+            "sonic-vxlan:VXLAN_TUNNEL_MAP": {
+                "VXLAN_TUNNEL_MAP_LIST": [
+                    {
+                        "name": "15CharsLongName",
+                        "mapname": "map_100_Vlan100",
+                        "vlan": "Vlan100",
+                        "vni": "16777214"
+                    }
+                ]
+            }
+        }
+    },
+    "VXLAN_TUNNEL_NAME_INVALID_LENGTH_TEST": {
         "sonic-vlan:sonic-vlan": {
             "sonic-vlan:VLAN": {
                 "VLAN_LIST": [
diff --git a/src/sonic-yang-models/yang-models/sonic-loopback-interface.yang b/src/sonic-yang-models/yang-models/sonic-loopback-interface.yang
index 5d64b61c59c5..4a012b894333 100644
--- a/src/sonic-yang-models/yang-models/sonic-loopback-interface.yang
+++ b/src/sonic-yang-models/yang-models/sonic-loopback-interface.yang
@@ -36,7 +36,7 @@ module sonic-loopback-interface {
                 key "name";
 
                 leaf name{
-                    type string;
+                    type stypes:interface_name;
                 }
 
                 leaf vrf_name {
diff --git a/src/sonic-yang-models/yang-models/sonic-portchannel.yang b/src/sonic-yang-models/yang-models/sonic-portchannel.yang
index 2c61f4eb54ad..2694abb544e9 100644
--- a/src/sonic-yang-models/yang-models/sonic-portchannel.yang
+++ b/src/sonic-yang-models/yang-models/sonic-portchannel.yang
@@ -53,7 +53,6 @@ module sonic-portchannel {
 
                 leaf name {
                     type string {
-                        length 1..128;
                         pattern 'PortChannel[0-9]{1,4}';
                     }
                 }
@@ -63,7 +62,7 @@ module sonic-portchannel {
                         range 1..1024;
                     }
                 }
-               
+
                leaf mode {
                    description "PortChannel SwitchPort Mode possible values are routed|access|trunk. Default value for mode is routed.";
                    type stypes:switchport_mode;
diff --git a/src/sonic-yang-models/yang-models/sonic-vlan.yang b/src/sonic-yang-models/yang-models/sonic-vlan.yang
index ff3a1f2f64af..5d6f898c768c 100644
--- a/src/sonic-yang-models/yang-models/sonic-vlan.yang
+++ b/src/sonic-yang-models/yang-models/sonic-vlan.yang
@@ -266,7 +266,7 @@ module sonic-vlan {
 							path "/lag:sonic-portchannel/lag:PORTCHANNEL/lag:PORTCHANNEL_LIST/lag:name";
 						}
 					}
-					must "not(/sms:sonic-mirror-session/sms:MIRROR_SESSION/sms:MIRROR_SESSION_LIST[sms:dst_port=current()])" 
+					must "not(/sms:sonic-mirror-session/sms:MIRROR_SESSION/sms:MIRROR_SESSION_LIST[sms:dst_port=current()])"
 					{
 						error-message "Port is used as a destination port in a mirror session.";
 					}
diff --git a/src/sonic-yang-models/yang-models/sonic-vrf.yang b/src/sonic-yang-models/yang-models/sonic-vrf.yang
index 83836a81c1c5..33fe100097fc 100644
--- a/src/sonic-yang-models/yang-models/sonic-vrf.yang
+++ b/src/sonic-yang-models/yang-models/sonic-vrf.yang
@@ -6,6 +6,10 @@ module sonic-vrf {
         prefix sonic-ext;
     }
 
+    import sonic-types {
+        prefix stypes;
+    }
+
     organization
         "SONiC";
 
@@ -28,7 +32,7 @@ module sonic-vrf {
                 key "name";
 
                 leaf name {
-                    type string {
+                    type stypes:interface_name {
                         pattern "Vrf[a-zA-Z0-9_-]+" {
                             error-message "Invalid VRF name";
                             error-app-tag vrf-name-invalid;
diff --git a/src/sonic-yang-models/yang-models/sonic-vxlan.yang b/src/sonic-yang-models/yang-models/sonic-vxlan.yang
index 7e0b0339561c..75ae6dc83eca 100644
--- a/src/sonic-yang-models/yang-models/sonic-vxlan.yang
+++ b/src/sonic-yang-models/yang-models/sonic-vxlan.yang
@@ -49,9 +49,8 @@ module sonic-vxlan {
                 max-elements 1;
 
                 leaf name {
-                    type string;
+                    type stypes:interface_name;
                 }
-                must "string-length(name) != 0";
 
                 leaf src_ip {
                     type inet:ip-address;
diff --git a/src/sonic-yang-models/yang-templates/sonic-types.yang.j2 b/src/sonic-yang-models/yang-templates/sonic-types.yang.j2
index df9b3c91dd8f..7a5b0b5a03e3 100644
--- a/src/sonic-yang-models/yang-templates/sonic-types.yang.j2
+++ b/src/sonic-yang-models/yang-templates/sonic-types.yang.j2
@@ -316,6 +316,16 @@ module sonic-types {
         }
     }
 
+    typedef interface_name {
+        description "Represents IFNAMSIZ defined in <net/if.h>";
+        type string {
+            length 1..15 {
+                error-message "Invalid interface name length, it must not exceed 16 characters.";
+                error-app-tag invalid-interface-name-length;
+            }
+        }
+    }
+
     typedef hash-field {
         description "Represents native hash field";
         type enumeration {

From fcdd82311255be4a8ffd94a2bd1b45e88163127f Mon Sep 17 00:00:00 2001
From: Philo <135693886+philo-micas@users.noreply.github.com>
Date: Sat, 23 Nov 2024 09:26:53 +0800
Subject: [PATCH 261/364] [Micas/Platform]platform support M2-W6940-64OC
 (#20628)

* [Micas/Platform]platform support M2-W6940-64OC

Signed-off-by: philo <philo@micasnetworks.com>

* update device files

Signed-off-by: philo <philo@micasnetworks.com>

* Update th5-m2-w6940-64oc-64x800G.config.yml

* support TH5 chip

Signed-off-by: philo <philo@micasnetworks.com>

* triggle rebuild

---------

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../M2-W6940-64OC/hwsku.json                  |   203 +
 .../M2-W6940-64OC/port_config.ini             |    67 +
 .../M2-W6940-64OC/sai.profile                 |     1 +
 .../th5-m2-w6940-64oc-64x800G.config.yml      | 14985 ++++++++++++++++
 .../custom_led.bin                            |   Bin 0 -> 648 bytes
 .../x86_64-micas_m2-w6940-64oc-r0/default_sku |     1 +
 .../x86_64-micas_m2-w6940-64oc-r0/dev.xml     |  1153 ++
 .../x86_64-micas_m2-w6940-64oc-r0/fru.py      |   961 +
 .../installer.conf                            |     4 +
 .../led_proc_init.soc                         |     2 +
 .../media_settings.json                       |  4100 +++++
 .../x86_64-micas_m2-w6940-64oc-r0/monitor.py  |   402 +
 .../x86_64-micas_m2-w6940-64oc-r0/pcie.yaml   |   478 +
 .../platform.json                             |  1653 ++
 .../platform_asic                             |     1 +
 .../platform_components.json                  |    18 +
 .../platform_env.conf                         |     2 +
 .../plugins/sfputil.py                        |   376 +
 .../plugins/ssd_util.py                       |   318 +
 .../pmon_daemon_control.json                  |     3 +
 .../postinit_cmd_file.soc                     |     4 +
 .../system_health_monitoring_config.json      |     0
 platform/broadcom/one-image.mk                |     1 +
 platform/broadcom/platform-modules-micas.mk   |     8 +
 .../debian/control                            |     5 +-
 ...atform-modules-micas-m2-w6940-64oc.install |     1 +
 ...tform-modules-micas-m2-w6940-64oc.postinst |    10 +
 .../debian/rule.mk                            |     1 +
 .../m2-w6940-64oc/Makefile                    |    28 +
 .../x86_64_micas_m2_w6940_64oc_r0_config.py   |  1644 ++
 ...6_64_micas_m2_w6940_64oc_r0_port_config.py |    74 +
 .../x86_64_micas_m2_w6940_64oc_r0_device.py   |   756 +
 .../x86_64_micas_m2_w6940_64oc_r0_monitor.py  |   158 +
 .../m2-w6940-64oc/modules/driver/Makefile     |    13 +
 .../modules/driver/wb_fpga_i2c_bus_device.c   |  1101 ++
 .../modules/driver/wb_fpga_pca954x_device.c   |   489 +
 .../modules/driver/wb_i2c_dev_device.c        |   181 +
 .../driver/wb_i2c_mux_pca954x_device.c        |   122 +
 .../modules/driver/wb_indirect_dev_device.c   |   193 +
 .../modules/driver/wb_io_dev_device.c         |   123 +
 .../modules/driver/wb_pcie_dev_device.c       |   116 +
 .../modules/driver/wb_wdt_device.c            |   155 +
 .../s3ip_sysfs_cfg/cfg_file/CPLD.cfg          |   321 +
 .../s3ip_sysfs_cfg/cfg_file/FAN.cfg           |   358 +
 .../s3ip_sysfs_cfg/cfg_file/FPGA.cfg          |    64 +
 .../s3ip_sysfs_cfg/cfg_file/LED.cfg           |   128 +
 .../s3ip_sysfs_cfg/cfg_file/PSU.cfg           |   657 +
 .../s3ip_sysfs_cfg/cfg_file/SENSOR.cfg        |  3463 ++++
 .../s3ip_sysfs_cfg/cfg_file/SFF.cfg           |  2682 +++
 .../s3ip_sysfs_cfg/cfg_file/WATCHDOG.cfg      |    20 +
 .../s3ip_sysfs_cfg/file_name/0x40d7           |     8 +
 .../m2-w6940-64oc/setup.py                    |    39 +
 52 files changed, 37650 insertions(+), 1 deletion(-)
 create mode 100644 device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/hwsku.json
 create mode 100644 device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/port_config.ini
 create mode 100644 device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/sai.profile
 create mode 100644 device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/th5-m2-w6940-64oc-64x800G.config.yml
 create mode 100644 device/micas/x86_64-micas_m2-w6940-64oc-r0/custom_led.bin
 create mode 100644 device/micas/x86_64-micas_m2-w6940-64oc-r0/default_sku
 create mode 100644 device/micas/x86_64-micas_m2-w6940-64oc-r0/dev.xml
 create mode 100644 device/micas/x86_64-micas_m2-w6940-64oc-r0/fru.py
 create mode 100644 device/micas/x86_64-micas_m2-w6940-64oc-r0/installer.conf
 create mode 100644 device/micas/x86_64-micas_m2-w6940-64oc-r0/led_proc_init.soc
 create mode 100644 device/micas/x86_64-micas_m2-w6940-64oc-r0/media_settings.json
 create mode 100644 device/micas/x86_64-micas_m2-w6940-64oc-r0/monitor.py
 create mode 100644 device/micas/x86_64-micas_m2-w6940-64oc-r0/pcie.yaml
 create mode 100644 device/micas/x86_64-micas_m2-w6940-64oc-r0/platform.json
 create mode 100644 device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_asic
 create mode 100644 device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_components.json
 create mode 100644 device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_env.conf
 create mode 100644 device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/sfputil.py
 create mode 100644 device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/ssd_util.py
 create mode 100644 device/micas/x86_64-micas_m2-w6940-64oc-r0/pmon_daemon_control.json
 create mode 100644 device/micas/x86_64-micas_m2-w6940-64oc-r0/postinit_cmd_file.soc
 create mode 100755 device/micas/x86_64-micas_m2-w6940-64oc-r0/system_health_monitoring_config.json
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.install
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.postinst
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_config.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_port_config.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_device.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_monitor.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_i2c_bus_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_pca954x_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_mux_pca954x_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_indirect_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_io_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_pcie_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_wdt_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/CPLD.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/FAN.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/FPGA.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/LED.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/PSU.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SFF.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/WATCHDOG.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/file_name/0x40d7
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/setup.py

diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/hwsku.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/hwsku.json
new file mode 100644
index 000000000000..56d71ff48119
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/hwsku.json
@@ -0,0 +1,203 @@
+{
+	"interfaces": {
+		"Ethernet1": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet9": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet17": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet25": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet33": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet41": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet49": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet57": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet65": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet73": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet81": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet89": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet97": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet105": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet113": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet121": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet129": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet137": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet145": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet153": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet161": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet169": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet177": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet185": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet193": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet201": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet209": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet217": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet225": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet233": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet241": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet249": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet257": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet265": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet273": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet281": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet289": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet297": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet305": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet313": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet321": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet329": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet337": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet345": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet353": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet361": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet369": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet377": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet385": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet393": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet401": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet409": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet417": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet425": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet433": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet441": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet449": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet457": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet465": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet473": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet481": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet489": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet497": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet505": {
+			"default_brkout_mode": "1x800G"
+		},
+		"Ethernet513": {
+			"default_brkout_mode": "1x25G"
+		},
+		"Ethernet515": {
+			"default_brkout_mode": "1x25G"
+		}
+	}
+}
+
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/port_config.ini b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/port_config.ini
new file mode 100644
index 000000000000..02e760ad87bb
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/port_config.ini
@@ -0,0 +1,67 @@
+# name          lanes                                alias                     index      speed
+Ethernet1       41,42,43,44,45,46,47,48              eightHundredGigE0/1       0          800000
+Ethernet9       33,34,35,36,37,38,39,40              eightHundredGigE0/2       1          800000
+Ethernet17      57,58,59,60,61,62,63,64              eightHundredGigE0/3       2          800000
+Ethernet25      49,50,51,52,53,54,55,56              eightHundredGigE0/4       3          800000
+Ethernet33      73,74,75,76,77,78,79,80              eightHundredGigE0/5       4          800000
+Ethernet41      65,66,67,68,69,70,71,72              eightHundredGigE0/6       5          800000
+Ethernet49      89,90,91,92,93,94,95,96              eightHundredGigE0/7       6          800000
+Ethernet57      81,82,83,84,85,86,87,88              eightHundredGigE0/8       7          800000
+Ethernet65      105,106,107,108,109,110,111,112      eightHundredGigE0/9       8          800000
+Ethernet73      97,98,99,100,101,102,103,104         eightHundredGigE0/10      9          800000
+Ethernet81      121,122,123,124,125,126,127,128      eightHundredGigE0/11      10         800000
+Ethernet89      113,114,115,116,117,118,119,120      eightHundredGigE0/12      11         800000
+Ethernet97      137,138,139,140,141,142,143,144      eightHundredGigE0/13      12         800000
+Ethernet105     129,130,131,132,133,134,135,136      eightHundredGigE0/14      13         800000
+Ethernet113     153,154,155,156,157,158,159,160      eightHundredGigE0/15      14         800000
+Ethernet121     145,146,147,148,149,150,151,152      eightHundredGigE0/16      15         800000
+Ethernet129     169,170,171,172,173,174,175,176      eightHundredGigE0/17      16         800000
+Ethernet137     161,162,163,164,165,166,167,168      eightHundredGigE0/18      17         800000
+Ethernet145     185,186,187,188,189,190,191,192      eightHundredGigE0/19      18         800000
+Ethernet153     177,178,179,180,181,182,183,184      eightHundredGigE0/20      19         800000
+Ethernet161     201,202,203,204,205,206,207,208      eightHundredGigE0/21      20         800000
+Ethernet169     193,194,195,196,197,198,199,200      eightHundredGigE0/22      21         800000
+Ethernet177     217,218,219,220,221,222,223,224      eightHundredGigE0/23      22         800000
+Ethernet185     209,210,211,212,213,214,215,216      eightHundredGigE0/24      23         800000
+Ethernet193     1,2,3,4,5,6,7,8                      eightHundredGigE0/25      24         800000
+Ethernet201     9,10,11,12,13,14,15,16               eightHundredGigE0/26      25         800000
+Ethernet209     17,18,19,20,21,22,23,24              eightHundredGigE0/27      26         800000
+Ethernet217     25,26,27,28,29,30,31,32              eightHundredGigE0/28      27         800000
+Ethernet225     249,250,251,252,253,254,255,256      eightHundredGigE0/29      28         800000
+Ethernet233     241,242,243,244,245,246,247,248      eightHundredGigE0/30      29         800000
+Ethernet241     233,234,235,236,237,238,239,240      eightHundredGigE0/31      30         800000
+Ethernet249     225,226,227,228,229,230,231,232      eightHundredGigE0/32      31         800000
+Ethernet257     257,258,259,260,261,262,263,264      eightHundredGigE0/33      32         800000
+Ethernet265     265,266,267,268,269,270,271,272      eightHundredGigE0/34      33         800000
+Ethernet273     273,274,275,276,277,278,279,280      eightHundredGigE0/35      34         800000
+Ethernet281     281,282,283,284,285,286,287,288      eightHundredGigE0/36      35         800000
+Ethernet289     505,506,507,508,509,510,511,512      eightHundredGigE0/37      36         800000
+Ethernet297     497,498,499,500,501,502,503,504      eightHundredGigE0/38      37         800000
+Ethernet305     489,490,491,492,493,494,495,496      eightHundredGigE0/39      38         800000
+Ethernet313     481,482,483,484,485,486,487,488      eightHundredGigE0/40      39         800000
+Ethernet321     297,298,299,300,301,302,303,304      eightHundredGigE0/41      40         800000
+Ethernet329     289,290,291,292,293,294,295,296      eightHundredGigE0/42      41         800000
+Ethernet337     313,314,315,316,317,318,319,320      eightHundredGigE0/43      42         800000
+Ethernet345     305,306,307,308,309,310,311,312      eightHundredGigE0/44      43         800000
+Ethernet353     329,330,331,332,333,334,335,336      eightHundredGigE0/45      44         800000
+Ethernet361     321,322,323,324,325,326,327,328      eightHundredGigE0/46      45         800000
+Ethernet369     345,346,347,348,349,350,351,352      eightHundredGigE0/47      46         800000
+Ethernet377     337,338,339,340,341,342,343,344      eightHundredGigE0/48      47         800000
+Ethernet385     361,362,363,364,365,366,367,368      eightHundredGigE0/49      48         800000
+Ethernet393     353,354,355,356,357,358,359,360      eightHundredGigE0/50      49         800000
+Ethernet401     377,378,379,380,381,382,383,384      eightHundredGigE0/51      50         800000
+Ethernet409     369,370,371,372,373,374,375,376      eightHundredGigE0/52      51         800000
+Ethernet417     393,394,395,396,397,398,399,400      eightHundredGigE0/53      52         800000
+Ethernet425     385,386,387,388,389,390,391,392      eightHundredGigE0/54      53         800000
+Ethernet433     409,410,411,412,413,414,415,416      eightHundredGigE0/55      54         800000
+Ethernet441     401,402,403,404,405,406,407,408      eightHundredGigE0/56      55         800000
+Ethernet449     425,426,427,428,429,430,431,432      eightHundredGigE0/57      56         800000
+Ethernet457     417,418,419,420,421,422,423,424      eightHundredGigE0/58      57         800000
+Ethernet465     441,442,443,444,445,446,447,448      eightHundredGigE0/59      58         800000
+Ethernet473     433,434,435,436,437,438,439,440      eightHundredGigE0/60      59         800000
+Ethernet481     457,458,459,460,461,462,463,464      eightHundredGigE0/61      60         800000
+Ethernet489     449,450,451,452,453,454,455,456      eightHundredGigE0/62      61         800000
+Ethernet497     473,474,475,476,477,478,479,480      eightHundredGigE0/63      62         800000
+Ethernet505     465,466,467,468,469,470,471,472      eightHundredGigE0/64      63         800000
+Ethernet513                                 513        twentyfiveGigE0/65      64          25000
+Ethernet515                                 515        twentyfiveGigE0/66      65          25000
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/sai.profile b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/sai.profile
new file mode 100644
index 000000000000..ad2e534f2e58
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-m2-w6940-64oc-64x800G.config.yml
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/th5-m2-w6940-64oc-64x800G.config.yml b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/th5-m2-w6940-64oc-64x800G.config.yml
new file mode 100644
index 000000000000..33f2781d7b97
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/th5-m2-w6940-64oc-64x800G.config.yml
@@ -0,0 +1,14985 @@
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x02714356
+                RX_LANE_MAP: 0x27506431
+                TX_POLARITY_FLIP: 0x59
+                RX_POLARITY_FLIP: 0x76
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x27360514
+                RX_LANE_MAP: 0x46731520
+                TX_POLARITY_FLIP: 0x8d
+                RX_POLARITY_FLIP: 0xd5
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x50234716
+                RX_LANE_MAP: 0x31642750
+                TX_POLARITY_FLIP: 0x5a
+                RX_POLARITY_FLIP: 0x0b
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x17250436
+                RX_LANE_MAP: 0x30764215
+                TX_POLARITY_FLIP: 0xf5
+                RX_POLARITY_FLIP: 0xbc
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x60427153
+                RX_LANE_MAP: 0x15370426
+                TX_POLARITY_FLIP: 0x16
+                RX_POLARITY_FLIP: 0xb0
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x73524016
+                RX_LANE_MAP: 0x36241705
+                TX_POLARITY_FLIP: 0xb0
+                RX_POLARITY_FLIP: 0xa0
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x61042537
+                RX_LANE_MAP: 0x05172436
+                TX_POLARITY_FLIP: 0xd2
+                RX_POLARITY_FLIP: 0x0b
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x16042537
+                RX_LANE_MAP: 0x05172436
+                TX_POLARITY_FLIP: 0x52
+                RX_POLARITY_FLIP: 0x0a
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x63250471
+                RX_LANE_MAP: 0x63427150
+                TX_POLARITY_FLIP: 0x3a
+                RX_POLARITY_FLIP: 0x51
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x73524016
+                RX_LANE_MAP: 0x63427150
+                TX_POLARITY_FLIP: 0xb4
+                RX_POLARITY_FLIP: 0x50
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x61042537
+                RX_LANE_MAP: 0x05172436
+                TX_POLARITY_FLIP: 0xd2
+                RX_POLARITY_FLIP: 0x0b
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x16042537
+                RX_LANE_MAP: 0x05172436
+                TX_POLARITY_FLIP: 0x52
+                RX_POLARITY_FLIP: 0x0a
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x63250471
+                RX_LANE_MAP: 0x63427150
+                TX_POLARITY_FLIP: 0x3a
+                RX_POLARITY_FLIP: 0x51
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x73524016
+                RX_LANE_MAP: 0x63427150
+                TX_POLARITY_FLIP: 0xb4
+                RX_POLARITY_FLIP: 0x50
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x61042537
+                RX_LANE_MAP: 0x05172436
+                TX_POLARITY_FLIP: 0xd2
+                RX_POLARITY_FLIP: 0x0b
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x16042537
+                RX_LANE_MAP: 0x05172436
+                TX_POLARITY_FLIP: 0x52
+                RX_POLARITY_FLIP: 0x0a
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x17526034
+                RX_LANE_MAP: 0x34261507
+                TX_POLARITY_FLIP: 0xc1
+                RX_POLARITY_FLIP: 0x94
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x37250641
+                RX_LANE_MAP: 0x34261507
+                TX_POLARITY_FLIP: 0x43
+                RX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x14605273
+                RX_LANE_MAP: 0x70516243
+                TX_POLARITY_FLIP: 0x3d
+                RX_POLARITY_FLIP: 0xa8
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x41605273
+                RX_LANE_MAP: 0x70516243
+                TX_POLARITY_FLIP: 0xbd
+                RX_POLARITY_FLIP: 0xa9
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x17250634
+                RX_LANE_MAP: 0x34261507
+                TX_POLARITY_FLIP: 0xc1
+                RX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x37250641
+                RX_LANE_MAP: 0x34261507
+                TX_POLARITY_FLIP: 0x43
+                RX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x14605273
+                RX_LANE_MAP: 0x70516243
+                TX_POLARITY_FLIP: 0x3f
+                RX_POLARITY_FLIP: 0xa8
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x41605273
+                RX_LANE_MAP: 0x70516243
+                TX_POLARITY_FLIP: 0xb4
+                RX_POLARITY_FLIP: 0xa9
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x17526034
+                RX_LANE_MAP: 0x34261507
+                TX_POLARITY_FLIP: 0xc1
+                RX_POLARITY_FLIP: 0xb7
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x37250641
+                RX_LANE_MAP: 0x34261507
+                TX_POLARITY_FLIP: 0x43
+                RX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x14305267
+                RX_LANE_MAP: 0x70516243
+                TX_POLARITY_FLIP: 0x0e
+                RX_POLARITY_FLIP: 0xa9
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x72634150
+                RX_LANE_MAP: 0x27340516
+                TX_POLARITY_FLIP: 0x11
+                RX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x31647025
+                RX_LANE_MAP: 0x64531072
+                TX_POLARITY_FLIP: 0xab
+                RX_POLARITY_FLIP: 0xaf
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x15602743
+                RX_LANE_MAP: 0x52137604
+                TX_POLARITY_FLIP: 0x46
+                RX_POLARITY_FLIP: 0xe7
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x73564012
+                RX_LANE_MAP: 0x34107625
+                TX_POLARITY_FLIP: 0x9f
+                RX_POLARITY_FLIP: 0x69
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x76243501
+                RX_LANE_MAP: 0x35162470
+                TX_POLARITY_FLIP: 0xa6
+                RX_POLARITY_FLIP: 0xc8
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x07546321
+                RX_LANE_MAP: 0x25176430
+                TX_POLARITY_FLIP: 0x65
+                RX_POLARITY_FLIP: 0x9e
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x37164250
+                RX_LANE_MAP: 0x75032614
+                TX_POLARITY_FLIP: 0x32
+                RX_POLARITY_FLIP: 0x3e
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x73402516
+                RX_LANE_MAP: 0x60347215
+                TX_POLARITY_FLIP: 0x7a
+                RX_POLARITY_FLIP: 0xd9
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x71345062
+                RX_LANE_MAP: 0x42173056
+                TX_POLARITY_FLIP: 0xa1
+                RX_POLARITY_FLIP: 0x60
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x70416352
+                RX_LANE_MAP: 0x16053427
+                TX_POLARITY_FLIP: 0x18
+                RX_POLARITY_FLIP: 0xa8
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x73526014
+                RX_LANE_MAP: 0x43625170
+                TX_POLARITY_FLIP: 0x78
+                RX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x41062537
+                RX_LANE_MAP: 0x07152634
+                TX_POLARITY_FLIP: 0xc3
+                RX_POLARITY_FLIP: 0x98
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x14062537
+                RX_LANE_MAP: 0x07152634
+                TX_POLARITY_FLIP: 0x41
+                RX_POLARITY_FLIP: 0x89
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x43526071
+                RX_LANE_MAP: 0x43625170
+                TX_POLARITY_FLIP: 0x7c
+                RX_POLARITY_FLIP: 0x94
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x73526014
+                RX_LANE_MAP: 0x43625170
+                TX_POLARITY_FLIP: 0x7c
+                RX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x41062537
+                RX_LANE_MAP: 0x07152634
+                TX_POLARITY_FLIP: 0xc1
+                RX_POLARITY_FLIP: 0x56
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x14062537
+                RX_LANE_MAP: 0x07152634
+                TX_POLARITY_FLIP: 0x41
+                RX_POLARITY_FLIP: 0x01
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x43526071
+                RX_LANE_MAP: 0x43625170
+                TX_POLARITY_FLIP: 0xfe
+                RX_POLARITY_FLIP: 0x94
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x73526014
+                RX_LANE_MAP: 0x43625170
+                TX_POLARITY_FLIP: 0x7c
+                RX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x41062537
+                RX_LANE_MAP: 0x07152634
+                TX_POLARITY_FLIP: 0xc1
+                RX_POLARITY_FLIP: 0x56
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x14062537
+                RX_LANE_MAP: 0x07152634
+                TX_POLARITY_FLIP: 0x41
+                RX_POLARITY_FLIP: 0x01
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x67524031
+                RX_LANE_MAP: 0x36241705
+                TX_POLARITY_FLIP: 0x8b
+                RX_POLARITY_FLIP: 0x5e
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x37250461
+                RX_LANE_MAP: 0x36241705
+                TX_POLARITY_FLIP: 0x87
+                RX_POLARITY_FLIP: 0x5f
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x16405273
+                RX_LANE_MAP: 0x50714263
+                TX_POLARITY_FLIP: 0x1e
+                RX_POLARITY_FLIP: 0xcb
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x61405273
+                RX_LANE_MAP: 0x50714263
+                TX_POLARITY_FLIP: 0x9e
+                RX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x17524036
+                RX_LANE_MAP: 0x36241705
+                TX_POLARITY_FLIP: 0x8b
+                RX_POLARITY_FLIP: 0x5e
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x37250461
+                RX_LANE_MAP: 0x36241705
+                TX_POLARITY_FLIP: 0x87
+                RX_POLARITY_FLIP: 0x5f
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x16405273
+                RX_LANE_MAP: 0x50714263
+                TX_POLARITY_FLIP: 0x1e
+                RX_POLARITY_FLIP: 0xcb
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x61405273
+                RX_LANE_MAP: 0x50714263
+                TX_POLARITY_FLIP: 0x9e
+                RX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x17250436
+                RX_LANE_MAP: 0x36241705
+                TX_POLARITY_FLIP: 0x4d
+                RX_POLARITY_FLIP: 0x5f
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x37250461
+                RX_LANE_MAP: 0x36241705
+                TX_POLARITY_FLIP: 0x87
+                RX_POLARITY_FLIP: 0x5f
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x61405273
+                RX_LANE_MAP: 0x50314267
+                TX_POLARITY_FLIP: 0x0e
+                RX_POLARITY_FLIP: 0xc7
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x37146250
+                RX_LANE_MAP: 0x35062714
+                TX_POLARITY_FLIP: 0xfe
+                RX_POLARITY_FLIP: 0xd3
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x27165304
+                RX_LANE_MAP: 0x75340126
+                TX_POLARITY_FLIP: 0x62
+                RX_POLARITY_FLIP: 0x45
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x10527634
+                RX_LANE_MAP: 0x53702614
+                TX_POLARITY_FLIP: 0xa0
+                RX_POLARITY_FLIP: 0x89
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x04561237
+                RX_LANE_MAP: 0x05643217
+                TX_POLARITY_FLIP: 0x31
+                RX_POLARITY_FLIP: 0xf0
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x76540123
+                RX_LANE_MAP: 0x13056472
+                TX_POLARITY_FLIP: 0xe8
+                RX_POLARITY_FLIP: 0x5d
+            ?
+                PC_PM_ID: 65
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x3012
+                TX_POLARITY_FLIP: 0
+                RX_LANE_MAP: 0x3012
+                RX_POLARITY_FLIP: 0
+...
+
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                # CPU port
+                PORT_ID: 0
+            :
+                PC_PHYS_PORT_ID: 0
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 5
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 15
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 26
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 33
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 37
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 48
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 55
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 59
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 66
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 70
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 77
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 81
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 92
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 99
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 103
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 110
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 114
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 125
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 132
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 136
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 143
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 147
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 158
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 165
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 169
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 176
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 180
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 191
+            :
+                PC_PHYS_PORT_ID: 281
+            ?
+                PORT_ID: 198
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 202
+            :
+                PC_PHYS_PORT_ID: 297
+            ?
+                PORT_ID: 209
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 213
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 220
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 224
+            :
+                PC_PHYS_PORT_ID: 329
+            ?
+                PORT_ID: 231
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 235
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 242
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 246
+            :
+                PC_PHYS_PORT_ID: 361
+            ?
+                PORT_ID: 253
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 257
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 264
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 268
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 279
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 286
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 290
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 297
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 301
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 312
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 319
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 323
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 330
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 334
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 345
+            :
+                PC_PHYS_PORT_ID: 505
+            ?
+                PORT_ID: 76
+            :
+                PC_PHYS_PORT_ID: 513
+            ?
+                PORT_ID: 274
+            :
+                PC_PHYS_PORT_ID: 515
+...
+
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: 0
+            :
+                ENABLE: 1
+                SPEED: 10000
+                NUM_LANES: 1
+            ?
+                PORT_ID: [1, 5, 11, 15, 22, 26, 33, 37, 44, 48, 55, 59, 66, 70, 77, 81, 88, 92, 99, 103, 110, 114, 121, 125, 132, 136, 143, 147, 154, 158, 165, 169, 176, 180, 187, 191, 198, 202, 209, 213, 220, 224, 231, 235, 242, 246, 253, 257, 264, 268, 275, 279, 286, 290, 297, 301, 308, 312, 319, 323, 330, 334, 341, 345]
+            :
+                ENABLE: 0
+                SPEED: 800000
+                NUM_LANES: 8
+                FEC_MODE: PC_FEC_RS544_2XN
+                LINK_TRAINING: 0
+                MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [76, 274]
+            :
+                ENABLE: 0
+                SPEED: 25000
+                NUM_LANES: 1
+                MAX_FRAME_SIZE: 9416
+...
+
+---
+device:
+    0:
+        PC_PMD_FIRMWARE:
+            ?
+                PORT_ID: [1, 5, 11, 15, 22, 26, 33, 37, 44, 48, 55, 59, 66, 70, 77, 81, 88, 92, 99, 103, 110, 114, 121, 125, 132, 136, 143, 147, 154, 158, 165, 169, 176, 180, 187, 191, 198, 202, 209, 213, 220, 224, 231, 235, 242, 246, 253, 257, 264, 268, 275, 279, 286, 290, 297, 301, 308, 312, 319, 323, 330, 334, 341, 345]
+            :
+                MEDIUM_TYPE_AUTO: 0
+                MEDIUM_TYPE: PC_PHY_MEDIUM_BACKPLANE
+...
+
+---
+device:
+    0:
+        TM_SCHEDULER_CONFIG:
+            NUM_MC_Q: NUM_MC_Q_4
+...
+
+---
+device:
+    0:
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+
+---
+bcm_device:
+    0:
+        global:
+            bcm_tunnel_term_compatible_mode: 1
+            vlan_flooding_l2mc_num_reserved: 2048
+            l3_alpm_template: 2
+            l3_alpm2_bnk_threshold: 100
+            uft_mode: 1
+            l3_enable: 1
+            l2_hitbit_enable: 0
+            pktio_mode: 1
+            sai_pfc_defaults_disable: 1
+            sai_optimized_mmu: 1
+            sai_postinit_cmd_file: /usr/share/sonic/platform/postinit_cmd_file.soc
+...
+
+---
+bcm_device:
+    0:
+        port:
+            "*":
+                encap_mode: IEEE
+                dport_map_enable: 1
+            26:
+                dport_map_port: 1
+            27:
+                dport_map_port: 2
+            28:
+                dport_map_port: 3
+            29:
+                dport_map_port: 4
+            22:
+                dport_map_port: 5
+            23:
+                dport_map_port: 6
+            24:
+                dport_map_port: 7
+            25:
+                dport_map_port: 8
+            37:
+                dport_map_port: 9
+            38:
+                dport_map_port: 10
+            39:
+                dport_map_port: 11
+            40:
+                dport_map_port: 12
+            33:
+                dport_map_port: 13
+            34:
+                dport_map_port: 14
+            35:
+                dport_map_port: 15
+            36:
+                dport_map_port: 16
+            48:
+                dport_map_port: 17
+            49:
+                dport_map_port: 18
+            50:
+                dport_map_port: 19
+            51:
+                dport_map_port: 20
+            44:
+                dport_map_port: 21
+            45:
+                dport_map_port: 22
+            46:
+                dport_map_port: 23
+            47:
+                dport_map_port: 24
+            59:
+                dport_map_port: 25
+            60:
+                dport_map_port: 26
+            61:
+                dport_map_port: 27
+            62:
+                dport_map_port: 28
+            55:
+                dport_map_port: 29
+            56:
+                dport_map_port: 30
+            57:
+                dport_map_port: 31
+            58:
+                dport_map_port: 32
+            70:
+                dport_map_port: 33
+            71:
+                dport_map_port: 34
+            72:
+                dport_map_port: 35
+            73:
+                dport_map_port: 36
+            66:
+                dport_map_port: 37
+            67:
+                dport_map_port: 38
+            68:
+                dport_map_port: 39
+            69:
+                dport_map_port: 40
+            81:
+                dport_map_port: 41
+            82:
+                dport_map_port: 42
+            83:
+                dport_map_port: 43
+            84:
+                dport_map_port: 44
+            77:
+                dport_map_port: 45
+            78:
+                dport_map_port: 46
+            79:
+                dport_map_port: 47
+            80:
+                dport_map_port: 48
+            92:
+                dport_map_port: 49
+            93:
+                dport_map_port: 50
+            94:
+                dport_map_port: 51
+            95:
+                dport_map_port: 52
+            88:
+                dport_map_port: 53
+            89:
+                dport_map_port: 54
+            90:
+                dport_map_port: 55
+            91:
+                dport_map_port: 56
+            103:
+                dport_map_port: 57
+            104:
+                dport_map_port: 58
+            105:
+                dport_map_port: 59
+            106:
+                dport_map_port: 60
+            99:
+                dport_map_port: 61
+            100:
+                dport_map_port: 62
+            101:
+                dport_map_port: 63
+            102:
+                dport_map_port: 64
+            114:
+                dport_map_port: 65
+            115:
+                dport_map_port: 66
+            116:
+                dport_map_port: 67
+            117:
+                dport_map_port: 68
+            110:
+                dport_map_port: 69
+            111:
+                dport_map_port: 70
+            112:
+                dport_map_port: 71
+            113:
+                dport_map_port: 72
+            125:
+                dport_map_port: 73
+            126:
+                dport_map_port: 74
+            127:
+                dport_map_port: 75
+            128:
+                dport_map_port: 76
+            121:
+                dport_map_port: 77
+            122:
+                dport_map_port: 78
+            123:
+                dport_map_port: 79
+            124:
+                dport_map_port: 80
+            136:
+                dport_map_port: 81
+            137:
+                dport_map_port: 82
+            138:
+                dport_map_port: 83
+            139:
+                dport_map_port: 84
+            132:
+                dport_map_port: 85
+            133:
+                dport_map_port: 86
+            134:
+                dport_map_port: 87
+            135:
+                dport_map_port: 88
+            147:
+                dport_map_port: 89
+            148:
+                dport_map_port: 90
+            149:
+                dport_map_port: 91
+            150:
+                dport_map_port: 92
+            143:
+                dport_map_port: 93
+            144:
+                dport_map_port: 94
+            145:
+                dport_map_port: 95
+            146:
+                dport_map_port: 96
+            1:
+                dport_map_port: 97
+            2:
+                dport_map_port: 98
+            3:
+                dport_map_port: 99
+            4:
+                dport_map_port: 100
+            5:
+                dport_map_port: 101
+            6:
+                dport_map_port: 102
+            7:
+                dport_map_port: 103
+            8:
+                dport_map_port: 104
+            11:
+                dport_map_port: 105
+            12:
+                dport_map_port: 106
+            13:
+                dport_map_port: 107
+            14:
+                dport_map_port: 108
+            15:
+                dport_map_port: 109
+            16:
+                dport_map_port: 110
+            17:
+                dport_map_port: 111
+            18:
+                dport_map_port: 112
+            169:
+                dport_map_port: 113
+            170:
+                dport_map_port: 114
+            171:
+                dport_map_port: 115
+            172:
+                dport_map_port: 116
+            165:
+                dport_map_port: 117
+            166:
+                dport_map_port: 118
+            167:
+                dport_map_port: 119
+            168:
+                dport_map_port: 120
+            158:
+                dport_map_port: 121
+            159:
+                dport_map_port: 122
+            160:
+                dport_map_port: 123
+            161:
+                dport_map_port: 124
+            154:
+                dport_map_port: 125
+            155:
+                dport_map_port: 126
+            156:
+                dport_map_port: 127
+            157:
+                dport_map_port: 128
+            176:
+                dport_map_port: 129
+            177:
+                dport_map_port: 130
+            178:
+                dport_map_port: 131
+            179:
+                dport_map_port: 132
+            180:
+                dport_map_port: 133
+            181:
+                dport_map_port: 134
+            182:
+                dport_map_port: 135
+            183:
+                dport_map_port: 136
+            187:
+                dport_map_port: 137
+            188:
+                dport_map_port: 138
+            189:
+                dport_map_port: 139
+            190:
+                dport_map_port: 140
+            191:
+                dport_map_port: 141
+            192:
+                dport_map_port: 142
+            193:
+                dport_map_port: 143
+            194:
+                dport_map_port: 144
+            345:
+                dport_map_port: 145
+            346:
+                dport_map_port: 146
+            347:
+                dport_map_port: 147
+            348:
+                dport_map_port: 148
+            341:
+                dport_map_port: 149
+            342:
+                dport_map_port: 150
+            343:
+                dport_map_port: 151
+            344:
+                dport_map_port: 152
+            334:
+                dport_map_port: 153
+            335:
+                dport_map_port: 154
+            336:
+                dport_map_port: 155
+            337:
+                dport_map_port: 156
+            330:
+                dport_map_port: 157
+            331:
+                dport_map_port: 158
+            332:
+                dport_map_port: 159
+            333:
+                dport_map_port: 160
+            202:
+                dport_map_port: 161
+            203:
+                dport_map_port: 162
+            204:
+                dport_map_port: 163
+            205:
+                dport_map_port: 164
+            198:
+                dport_map_port: 165
+            199:
+                dport_map_port: 166
+            200:
+                dport_map_port: 167
+            201:
+                dport_map_port: 168
+            213:
+                dport_map_port: 169
+            214:
+                dport_map_port: 170
+            215:
+                dport_map_port: 171
+            216:
+                dport_map_port: 172
+            209:
+                dport_map_port: 173
+            210:
+                dport_map_port: 174
+            211:
+                dport_map_port: 175
+            212:
+                dport_map_port: 176
+            224:
+                dport_map_port: 177
+            225:
+                dport_map_port: 178
+            226:
+                dport_map_port: 179
+            227:
+                dport_map_port: 180
+            220:
+                dport_map_port: 181
+            221:
+                dport_map_port: 182
+            222:
+                dport_map_port: 183
+            223:
+                dport_map_port: 184
+            235:
+                dport_map_port: 185
+            236:
+                dport_map_port: 186
+            237:
+                dport_map_port: 187
+            238:
+                dport_map_port: 188
+            231:
+                dport_map_port: 189
+            232:
+                dport_map_port: 190
+            233:
+                dport_map_port: 191
+            234:
+                dport_map_port: 192
+            246:
+                dport_map_port: 193
+            247:
+                dport_map_port: 194
+            248:
+                dport_map_port: 195
+            249:
+                dport_map_port: 196
+            242:
+                dport_map_port: 197
+            243:
+                dport_map_port: 198
+            244:
+                dport_map_port: 199
+            245:
+                dport_map_port: 200
+            257:
+                dport_map_port: 201
+            258:
+                dport_map_port: 202
+            259:
+                dport_map_port: 203
+            260:
+                dport_map_port: 204
+            253:
+                dport_map_port: 205
+            254:
+                dport_map_port: 206
+            255:
+                dport_map_port: 207
+            256:
+                dport_map_port: 208
+            268:
+                dport_map_port: 209
+            269:
+                dport_map_port: 210
+            270:
+                dport_map_port: 211
+            271:
+                dport_map_port: 212
+            264:
+                dport_map_port: 213
+            265:
+                dport_map_port: 214
+            266:
+                dport_map_port: 215
+            267:
+                dport_map_port: 216
+            279:
+                dport_map_port: 217
+            280:
+                dport_map_port: 218
+            281:
+                dport_map_port: 219
+            282:
+                dport_map_port: 220
+            275:
+                dport_map_port: 221
+            276:
+                dport_map_port: 222
+            277:
+                dport_map_port: 223
+            278:
+                dport_map_port: 224
+            290:
+                dport_map_port: 225
+            291:
+                dport_map_port: 226
+            292:
+                dport_map_port: 227
+            293:
+                dport_map_port: 228
+            286:
+                dport_map_port: 229
+            287:
+                dport_map_port: 230
+            288:
+                dport_map_port: 231
+            289:
+                dport_map_port: 232
+            301:
+                dport_map_port: 233
+            302:
+                dport_map_port: 234
+            303:
+                dport_map_port: 235
+            304:
+                dport_map_port: 236
+            297:
+                dport_map_port: 237
+            298:
+                dport_map_port: 238
+            299:
+                dport_map_port: 239
+            300:
+                dport_map_port: 240
+            312:
+                dport_map_port: 241
+            313:
+                dport_map_port: 242
+            314:
+                dport_map_port: 243
+            315:
+                dport_map_port: 244
+            308:
+                dport_map_port: 245
+            309:
+                dport_map_port: 246
+            310:
+                dport_map_port: 247
+            311:
+                dport_map_port: 248
+            323:
+                dport_map_port: 249
+            324:
+                dport_map_port: 250
+            325:
+                dport_map_port: 251
+            326:
+                dport_map_port: 252
+            319:
+                dport_map_port: 253
+            320:
+                dport_map_port: 254
+            321:
+                dport_map_port: 255
+            322:
+                dport_map_port: 256
+            76:
+                dport_map_port: 257
+            274:
+                dport_map_port: 258
+...
+
+---
+device:
+    0:
+        PC_TX_TAPS:
+            ?
+                PORT_ID: 26
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 26
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 26
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 26
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 26
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 26
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 26
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 26
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 22
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 22
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 22
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 22
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 22
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 22
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 22
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 22
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 37
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 37
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 37
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 37
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 37
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 37
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 37
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 37
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 33
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 33
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 33
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 33
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 33
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 33
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 33
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 33
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 48
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 48
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 48
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 48
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 48
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 48
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 48
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 48
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 44
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 44
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 44
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 44
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 44
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 44
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 44
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 44
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 59
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 59
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 59
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 59
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 59
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 59
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 59
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 59
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 55
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 55
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 55
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 55
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 55
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 55
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 55
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 55
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 70
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 70
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 70
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 70
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 70
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 70
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 70
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 70
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 66
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 66
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 66
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 66
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 66
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 66
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 66
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 66
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 81
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 81
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 81
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 81
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 81
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 81
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 81
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 81
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 77
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 77
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 77
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 77
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 77
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 77
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 77
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 77
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 92
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 92
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 92
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 92
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 92
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 92
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 92
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 92
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 88
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 88
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 88
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 88
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 88
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 88
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 88
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 88
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 103
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 103
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 103
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 103
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 103
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 103
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 103
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 103
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 99
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 99
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 99
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 99
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 99
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 99
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 99
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 99
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 114
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 114
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 114
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 114
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 114
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 114
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 114
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 114
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 110
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 110
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 110
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 110
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 110
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 110
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 110
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 110
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 125
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 125
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 125
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 125
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 125
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 125
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 125
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 125
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 121
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 121
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 121
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 121
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 121
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 121
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 121
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 121
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 136
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 136
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 136
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 136
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 136
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 136
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 136
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 136
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 132
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 132
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 132
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 132
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 132
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 132
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 132
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 132
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 147
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 147
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 147
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 147
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 147
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 147
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 147
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 147
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 143
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 143
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 143
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 143
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 143
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 143
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 143
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 143
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 11
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 11
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 11
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 11
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 11
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 11
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 11
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 11
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 15
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 15
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 15
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 15
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 15
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 15
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 15
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 15
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 169
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 169
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 169
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 169
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 169
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 169
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 169
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 169
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 16
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 140
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 2
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 165
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 165
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 165
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 165
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 165
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 165
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 165
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 165
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 16
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 140
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 2
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 158
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 158
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 158
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 158
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 158
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 158
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 158
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 158
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 154
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 154
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 154
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 154
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 154
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 154
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 154
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 154
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 176
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 176
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 176
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 176
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 176
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 176
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 176
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 176
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 180
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 180
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 180
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 180
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 180
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 180
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 180
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 180
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 187
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 187
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 187
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 187
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 187
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 187
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 187
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 187
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 191
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 191
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 191
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 191
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 191
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 191
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 191
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 191
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 345
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 345
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 345
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 345
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 345
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 345
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 345
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 345
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 341
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 341
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 341
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 341
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 341
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 24
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 140
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 341
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 341
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 341
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 334
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 334
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 334
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 334
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 334
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 334
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 334
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 334
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 330
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 330
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 330
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 330
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 330
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 330
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 330
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 330
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 202
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 202
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 202
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 202
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 202
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 202
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 202
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 202
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 198
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 198
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 198
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 198
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 198
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 198
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 198
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 198
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 213
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 213
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 213
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 213
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 213
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 213
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 213
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 213
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 209
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 209
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 209
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 209
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 209
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 209
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 209
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 209
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 224
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 224
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 224
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 224
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 224
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 224
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 224
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 224
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 220
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 220
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 220
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 220
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 220
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 220
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 220
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 220
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 235
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 235
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 235
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 235
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 235
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 235
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 235
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 235
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 231
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 231
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 231
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 231
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 231
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 231
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 231
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 231
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 246
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 246
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 246
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 246
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 246
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 246
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 246
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 246
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 242
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 242
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 242
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 242
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 242
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 242
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 242
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 242
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 257
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 257
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 257
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 257
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 257
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 257
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 257
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 257
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 253
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 253
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 253
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 253
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 253
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 253
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 253
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 253
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 268
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 268
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 268
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 268
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 268
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 268
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 268
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 268
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 264
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 264
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 264
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 264
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 264
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 264
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 264
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 264
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 279
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 279
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 279
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 279
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 279
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 279
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 279
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 279
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 275
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 275
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 275
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 275
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 275
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 275
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 275
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 275
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 290
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 290
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 290
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 290
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 290
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 290
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 290
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 290
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 286
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 286
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 286
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 286
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 286
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 286
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 286
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 286
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 301
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 301
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 301
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 301
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 301
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 301
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 301
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 301
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 297
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 297
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 297
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 297
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 297
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 297
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 297
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 297
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 312
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 312
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 312
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 312
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 312
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 312
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 312
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 312
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 308
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 308
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 308
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 308
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 308
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 308
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 308
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 308
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 323
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 323
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 323
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 323
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 323
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 323
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 323
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 323
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 319
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 319
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 319
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 319
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 319
+                LANE_INDEX: 4
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 319
+                LANE_INDEX: 5
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 319
+                LANE_INDEX: 6
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+            ?
+                PORT_ID: 319
+                LANE_INDEX: 7
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_PRE3_SIGN: 0
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+...
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6940-64oc-r0/custom_led.bin
new file mode 100644
index 0000000000000000000000000000000000000000..04807432077f5d14d3b6f90e68b4398d0776126f
GIT binary patch
literal 648
zcmX}oPe_w-7zgn0^S+zgnt~>nZ;JZ55zR@YZxOnvcYk_7EKDbb&dg!R?B=aShXfB!
zJT%t9*A2oti4giy2eBxRVu#<n)L4hji-?zb^i*#vIy?_wKF{g-Rz5!F2YinsT=|gN
zw8N2pKDf&87)+NW&8=TVG!zYzR+G8Ujzzlt#q=e1Fh0K1n#H$q`So72J7vqbm+YC1
zMB&jg7Zu~#A}dKL{U#Y^P0z9hx4vrafKHidZVSmG=9ImiI+f4~&jh2}B_jO9`Ho|e
zqA7c2L)Ax{56w~Q;uMl`*V&>JO<PV@YxVQWfk`=ZJH(5s+W%{<zez|x;J1qlr6zy9
zxa@Dt*Oh`SWtH$WyTk2a4YxvdLh_*NoT$k<OMjBxN^&*9N>395937Fa+B`WfNBRa=
zLJ$i_dgt|_c~1;hBi>(u6_!*-R?(NZ9#IrygLg<!AZr@9l1Rmtc|EZ|;n7J8@(lM_
zzYa5e5FWh5Y$7~Dy`iqde6XK7I;@7<wH(`2csl}FR<%_oZH1{sy$5Ert!R?JPQWh-
z$=@hiOKtRCsZ3pqYnbH8xDh`&`YS_x!?KyGmH*kps&Uo6AGOd)^Uo<;*FnLxdGpgN
zHux=XaOLw?w)F!G*7%^J4?P$_5Mvm|EaFIF4k^sTKpN{<!#1|Chg}qq2f>8~C^*9@
zj!_1YiyBCwGdiVXDwB^?>Z2YSpdgLWFwIh&k~BvtnkR$Ov`%ZZO<S}_yHub&kt9pM
E0V15m_W%F@

literal 0
HcmV?d00001

diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/default_sku b/device/micas/x86_64-micas_m2-w6940-64oc-r0/default_sku
new file mode 100644
index 000000000000..76806884effd
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/default_sku
@@ -0,0 +1 @@
+M2-W6940-64OC l2
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/dev.xml b/device/micas/x86_64-micas_m2-w6940-64oc-r0/dev.xml
new file mode 100644
index 000000000000..99d4cec634e4
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/dev.xml
@@ -0,0 +1,1153 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--
+      ### type    1 result/4300
+          type    2 result/430
+          type    3 read bit
+     ### property need check must add int front
+-->
+<catalog>
+    <fans>
+        <fan id="fan1" >
+            <property name="present" location="/sys/s3ip/fan/fan1/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/s3ip/fan/fan1/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/s3ip/fan/fan1/motor2/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/52-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/s3ip/fan/fan1/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/s3ip/fan/fan1/motor2/speed"/>
+        </fan>
+        <fan id="fan2" >
+            <property name="present" location="/sys/s3ip/fan/fan2/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/s3ip/fan/fan2/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/s3ip/fan/fan2/motor2/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/53-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/s3ip/fan/fan2/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/s3ip/fan/fan2/motor2/speed"/>
+        </fan>
+        <fan id="fan3" >
+            <property name="present" location="/sys/s3ip/fan/fan3/present"       type="4" decode="fanpresent" default="1" />
+            <property name="status"  location="/sys/s3ip/fan/fan3/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/s3ip/fan/fan3/motor2/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/54-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/s3ip/fan/fan3/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/s3ip/fan/fan3/motor2/speed"/>
+        </fan>
+        <fan id="fan4" >
+            <property name="present" location="/sys/s3ip/fan/fan4/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/s3ip/fan/fan4/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/s3ip/fan/fan4/motor2/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/55-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/s3ip/fan/fan4/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/s3ip/fan/fan4/motor2/speed"/>
+        </fan>
+    </fans>
+    <temps>
+        <temp id="SCM_1_TMEP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/34-004c/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/34-004c/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/34-004c/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="SCM_2_TMEP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/35-004d/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/35-004d/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/35-004d/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="SMB_1_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/14-0048/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/14-0048/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/14-0048/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="SMB_2_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/14-0049/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/14-0049/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/14-0049/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="SMB_3_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/14-004b/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/14-004b/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/14-004b/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="FCB_T_1_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/8-0048/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/8-0048/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/8-0048/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="FCB_T_2_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/8-0049/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/8-0049/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/8-0049/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="FCB_B_1_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/9-0048/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/9-0048/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/9-0048/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="FCB_B_2_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/9-0049/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/9-0049/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/9-0049/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="ASIC_TEMP" >
+            <property name="temp1_input" location="/sys/s3ip/temp_sensor/temp17/value" type="1" />
+            <property name="temp1_max" gettype="config" value="435.0" />
+            <property name="temp1_max_hyst" gettype="config" value="99.0" />
+        </temp>
+    </temps>
+    <psus>
+        <psu id="psu1" >
+            <property name="present" location="/sys/s3ip/psu/psu1/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/s3ip/psu/psu1/out_status"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/42-0050/eeprom"/>
+            <property name="in_current"    location="/sys/bus/i2c/devices/42-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"    location="/sys/bus/i2c/devices/42-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/42-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/42-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/42-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/42-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/42-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/42-0058/hwmon/*/power2_input"  type="5"/>
+        </psu>
+        <psu id="psu2" >
+            <property name="present" location="/sys/s3ip/psu/psu2/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/s3ip/psu/psu2/out_status"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/43-0050/eeprom"/>
+            <property name="in_current"    location="/sys/bus/i2c/devices/43-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"    location="/sys/bus/i2c/devices/43-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/43-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/43-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/43-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/43-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/43-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/43-0058/hwmon/*/power2_input"  type="5"/>
+        </psu>
+    </psus>
+    <dcdcs>
+        <dcdc id="SCM_53134O_V1.0_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.430" />
+            <property name="dcdc_min"   gettype="config" value="0.900" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="SCM_53134O_V1.0_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.550" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="SCM_I243_V3.3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.630" />
+            <property name="dcdc_min"   gettype="config" value="2.970" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="SCM_I243_V3.3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.550" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="SCM_VDD3.3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.630" />
+            <property name="dcdc_min"   gettype="config" value="2.970" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="SCM_VDD3.3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.200" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="SCM_VDD12.0_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="13.200" />
+            <property name="dcdc_min"   gettype="config" value="43.800" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="SCM_VDD12.0_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="8.800" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="SCM_OCM_V12.0_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="13.200" />
+            <property name="dcdc_min"   gettype="config" value="43.800" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="SCM_OCM_V12.0_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="7.700" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="SCM_SSD_V3.3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.630" />
+            <property name="dcdc_min"   gettype="config" value="2.970" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="SCM_SSD_V3.3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.650" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="SCM_BMC_V3.3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.630" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="SCM_BMC_V3.3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.750" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="SCM_VDD5.0_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="5.500" />
+            <property name="dcdc_min"   gettype="config" value="4.500" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="SCM_VDD5.0_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.550" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="MAC_CORE_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.858" />
+            <property name="dcdc_min"   gettype="config" value="0.630" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_CORE_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/curr3_input" type="6" coefficient="2"/>
+            <property name="dcdc_max"   gettype="config" value="909.700" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="MAC_ANALOG0 V0.9_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.990" />
+            <property name="dcdc_min"   gettype="config" value="0.843" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_ANALOG0 V0.9_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="77.737" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="MAC_ANALOG0 V0.75_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.825" />
+            <property name="dcdc_min"   gettype="config" value="0.675" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_ANALOG0 V0.75_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/curr4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="38.826" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="MAC_ANALOG1 V0.9_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.990" />
+            <property name="dcdc_min"   gettype="config" value="0.843" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_ANALOG1 V0.9_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="77.737" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="MAC_ANALOG1 V0.75_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.825" />
+            <property name="dcdc_min"   gettype="config" value="0.675" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_ANALOG1 V0.75_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/curr4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="38.826" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="MAC_PLL0_VDD0.9_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.990" />
+            <property name="dcdc_min"   gettype="config" value="0.843" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_PLL0_VDD0.9_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.570" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="MAC_PLL1_VDD0.9_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.990" />
+            <property name="dcdc_min"   gettype="config" value="0.843" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_PLL1_VDD0.9_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.570" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="MAC_PLL2_VDD0.9_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.990" />
+            <property name="dcdc_min"   gettype="config" value="0.843" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_PLL2_VDD0.9_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.570" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="MAC_PLL3_VDD0.9_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.990" />
+            <property name="dcdc_min"   gettype="config" value="0.843" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_PLL3_VDD0.9_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.570" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD_0.8_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.880" />
+            <property name="dcdc_min"   gettype="config" value="0.720" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD_0.8_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.500" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD_1.8_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.980" />
+            <property name="dcdc_min"   gettype="config" value="1.620" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD_1.8_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.570" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD_1.5_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.650" />
+            <property name="dcdc_min"   gettype="config" value="1.350" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD_1.5_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.485" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD_1.2_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.320" />
+            <property name="dcdc_min"   gettype="config" value="1.080" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MAC_VDD_1.2_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.600" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="OE_AVDD_0.75_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/69-0040/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.825" />
+            <property name="dcdc_min"   gettype="config" value="0.675" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OE_AVDD_0.75_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/69-0040/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="88.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="OE_AVDD_1.2_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/69-0040/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.320" />
+            <property name="dcdc_min"   gettype="config" value="1.080" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OE_AVDD_1.2_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/69-0040/hwmon/hwmon*/curr4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="430.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="OE_AVDD_TX_1.8_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/70-0068/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.980" />
+            <property name="dcdc_min"   gettype="config" value="1.620" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OE_AVDD_TX_1.8_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/70-0068/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="60.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="OE_AVDD_RX_1.8_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/70-0068/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.980" />
+            <property name="dcdc_min"   gettype="config" value="1.620" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OE_AVDD_RX_1.8_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/70-0068/hwmon/hwmon*/curr4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="43.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="OE_HCSL_PLL_VDD0_0.75_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.825" />
+            <property name="dcdc_min"   gettype="config" value="0.675" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OE_HCSL_PLL_VDD0_0.75_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.550" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="OE_HCSL_PLL_VDD1_0.75_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/57-0040/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.825" />
+            <property name="dcdc_min"   gettype="config" value="0.675" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OE_HCSL_PLL_VDD1_0.75_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/57-0040/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.550" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="OE_AVDD_3.3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.630" />
+            <property name="dcdc_min"   gettype="config" value="2.970" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OE_AVDD_3.3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.430" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="OE_VDD_HCSL_PLL_1.8_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.980" />
+            <property name="dcdc_min"   gettype="config" value="1.620" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OE_VDD_HCSL_PLL_1.8_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.550" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="OE_VDD_1.8_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.980" />
+            <property name="dcdc_min"   gettype="config" value="1.620" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OE_VDD_1.8_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.550" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="RLML_VDD V3.3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/in3_input" type="6" coefficient="1.5"/>
+            <property name="dcdc_max"   gettype="config" value="3.630" />
+            <property name="dcdc_min"   gettype="config" value="2.970" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="RLML_VDD V3.3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="30.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="RLMH_VDD V3.3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/in4_input" type="6" coefficient="1.5"/>
+            <property name="dcdc_max"   gettype="config" value="3.630" />
+            <property name="dcdc_min"   gettype="config" value="2.970" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="RLMH_VDD V3.3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/curr4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="30.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="SMB_CLK_VDD3.3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/56-0041/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.630" />
+            <property name="dcdc_min"   gettype="config" value="2.970" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="SMB_CLK_VDD3.3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/56-0041/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.430" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="SMB_CLK2_VDD1.8_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/56-0041/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.980" />
+            <property name="dcdc_min"   gettype="config" value="1.620" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="SMB_CLK2_VDD1.8_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/56-0041/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.430" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="SMB_CLK_VDD1.8_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/56-0041/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.980" />
+            <property name="dcdc_min"   gettype="config" value="1.620" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="SMB_CLK_VDD1.8_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/56-0041/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.430" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="SMB_FPGA_VDD1.8_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/57-0040/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.980" />
+            <property name="dcdc_min"   gettype="config" value="1.620" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="SMB_FPGA_VDD1.8_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/57-0040/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.550" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="SMB_VDD_5.0_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="5.500" />
+            <property name="dcdc_min"   gettype="config" value="4.500" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="SMB_VDD_5.0_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.300" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="SMB_FPGA_V3.3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/62-0040/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.630" />
+            <property name="dcdc_min"   gettype="config" value="2.970" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="SMB_FPGA_V3.3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/62-0040/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.550" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="SMB_FPGA_V1.0_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/62-0040/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.430" />
+            <property name="dcdc_min"   gettype="config" value="0.900" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="SMB_FPGA_V1.0_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/62-0040/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.188" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="SMB_FPGA_V1.2_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/62-0040/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.320" />
+            <property name="dcdc_min"   gettype="config" value="1.080" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="SMB_FPGA_V1.2_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/62-0040/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.550" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="SMB_VDD_3.3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/63-0040/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.630" />
+            <property name="dcdc_min"   gettype="config" value="2.970" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="SMB_VDD_3.3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/63-0040/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.550" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="SMB_CPLD_VDD_1.8_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/63-0040/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.980" />
+            <property name="dcdc_min"   gettype="config" value="1.620" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="SMB_CPLD_VDD_1.8_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/63-0040/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.330" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="SMB_CPLD_VDD_3.3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/63-0040/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.630" />
+            <property name="dcdc_min"   gettype="config" value="2.970" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="SMB_CPLD_VDD_3.3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/63-0040/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.550" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="MCB_FPGA_VDD1.0_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.430" />
+            <property name="dcdc_min"   gettype="config" value="0.900" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MCB_FPGA_VDD1.0_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.188" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="MCB_FPGA_VDD1.8_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.980" />
+            <property name="dcdc_min"   gettype="config" value="1.620" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MCB_FPGA_VDD1.8_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.550" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="MCB_FPGA_VDD1.2_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.320" />
+            <property name="dcdc_min"   gettype="config" value="1.080" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MCB_FPGA_VDD1.2_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.550" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="MCB_CPLD_VDD3.3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.630" />
+            <property name="dcdc_min"   gettype="config" value="2.970" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MCB_CPLD_VDD3.3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.550" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="MCB_VDD3.3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.630" />
+            <property name="dcdc_min"   gettype="config" value="2.970" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MCB_VDD3.3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.550" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="MCB_FPGA_VDD3.3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.630" />
+            <property name="dcdc_min"   gettype="config" value="2.970" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="MCB_FPGA_VDD3.3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.550" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="OCM_P1V05_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.160" />
+            <property name="dcdc_min"   gettype="config" value="0.954" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OCM_VCCIN_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.200" />
+            <property name="dcdc_min"   gettype="config" value="1.350" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OCM_P1V2_VDDQ_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.280" />
+            <property name="dcdc_min"   gettype="config" value="1.120" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OCM_P1V8_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.943" />
+            <property name="dcdc_min"   gettype="config" value="1.690" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OCM_P0V6_VTT_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in5_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.682" />
+            <property name="dcdc_min"   gettype="config" value="0.558" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OCM_VNN_PCH_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in6_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.320" />
+            <property name="dcdc_min"   gettype="config" value="0.540" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OCM_VNN_NAC_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in7_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.320" />
+            <property name="dcdc_min"   gettype="config" value="0.540" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OCM_P2V5_VPP_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in8_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.750" />
+            <property name="dcdc_min"   gettype="config" value="2.250" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OCM_VCC_ANA_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in9_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.430" />
+            <property name="dcdc_min"   gettype="config" value="0.900" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OCM_P3V3_STBY_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in43_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.630" />
+            <property name="dcdc_min"   gettype="config" value="2.970" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OCM_P5V_AUX_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in42_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="5.750" />
+            <property name="dcdc_min"   gettype="config" value="4.000" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OCM_P1V8_AUX_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in12_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.943" />
+            <property name="dcdc_min"   gettype="config" value="1.690" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OCM_P3V3_AUX_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in13_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.630" />
+            <property name="dcdc_min"   gettype="config" value="2.970" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OCM_V1P80_EMMC_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in14_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.943" />
+            <property name="dcdc_min"   gettype="config" value="1.690" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OCM_V3P3_EMMC_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in15_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.500" />
+            <property name="dcdc_min"   gettype="config" value="3.430" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OCM_XDPE_VCCIN_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-0070/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.200" />
+            <property name="dcdc_min"   gettype="config" value="1.350" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OCM_XDPE_VCCIN_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-0070/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="147.000" />
+            <property name="dcdc_min"   gettype="config" value="-3.430" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="OCM_XDPE_P1V8_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-0070/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.943" />
+            <property name="dcdc_min"   gettype="config" value="1.690" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OCM_XDPE_P1V8_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-0070/hwmon/hwmon*/curr4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.3000" />
+            <property name="dcdc_min"   gettype="config" value="-3.430" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="OCM_XDPE_P1V05_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-006e/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.160" />
+            <property name="dcdc_min"   gettype="config" value="0.954" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OCM_XDPE_P1V05_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-006e/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="14.300" />
+            <property name="dcdc_min"   gettype="config" value="-3.430" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="OCM_XDPE_VNN_PCH_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-006e/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.320" />
+            <property name="dcdc_min"   gettype="config" value="0.540" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OCM_XDPE_VNN_PCH_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-006e/hwmon/hwmon*/curr4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="7.4000" />
+            <property name="dcdc_min"   gettype="config" value="-3.430" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="OCM_XDPE_VNN_NAC_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-0068/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.320" />
+            <property name="dcdc_min"   gettype="config" value="0.540" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OCM_XDPE_VNN_NAC_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-0068/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="22.000" />
+            <property name="dcdc_min"   gettype="config" value="-3.430" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="OCM_XDPE_VCC_ANA_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-0068/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.4300" />
+            <property name="dcdc_min"   gettype="config" value="0.900" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OCM_XDPE_VCC_ANA_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-0068/hwmon/hwmon*/curr4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.243" />
+            <property name="dcdc_min"   gettype="config" value="-3.430" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="OCM_XDPE_P1V2_VDDQ_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-005e/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.280" />
+            <property name="dcdc_min"   gettype="config" value="1.120" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="OCM_XDPE_P1V2_VDDQ_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/5-005e/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="19.000" />
+            <property name="dcdc_min"   gettype="config" value="-3.430" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="FAN1_VDD12_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="13.200" />
+            <property name="dcdc_min"   gettype="config" value="7.000" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="FAN1_VDD12_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="43.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="FAN2_VDD12_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="13.200" />
+            <property name="dcdc_min"   gettype="config" value="7.000" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="FAN2_VDD12_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="43.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="FAN3_VDD12_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="13.200" />
+            <property name="dcdc_min"   gettype="config" value="7.000" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="FAN3_VDD12_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="43.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="FAN4_VDD12_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="13.200" />
+            <property name="dcdc_min"   gettype="config" value="7.000" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="FAN4_VDD12_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="43.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="FAN5_VDD12_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="13.200" />
+            <property name="dcdc_min"   gettype="config" value="7.000" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="FAN5_VDD12_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="43.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="FAN6_VDD12_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="13.200" />
+            <property name="dcdc_min"   gettype="config" value="7.000" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="FAN6_VDD12_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="43.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="FAN7_VDD12_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="13.200" />
+            <property name="dcdc_min"   gettype="config" value="7.000" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="FAN7_VDD12_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="43.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="FAN8_VDD12_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="13.200" />
+            <property name="dcdc_min"   gettype="config" value="7.000" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="FAN8_VDD12_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="43.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+    </dcdcs>
+    <cpus location="/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*"/>
+    <decode>
+    <fanpresent>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </fanpresent>
+    <fanstatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </fanstatus>
+    <psucheck>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </psucheck>
+    <psustatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </psustatus>
+    <psutype>
+        <code key="ECDL3000123" value="PA3000I-F"/>
+        <code key="CRPS3000CL" value="PA3000I-F"/>
+    </psutype>
+    <fan_display_name>
+        <code key="FAN80-02-F" value="FAN80-02-F"/>
+    </fan_display_name>
+    </decode>
+</catalog>
+
+
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/fru.py b/device/micas/x86_64-micas_m2-w6940-64oc-r0/fru.py
new file mode 100644
index 000000000000..f95164e03601
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/fru.py
@@ -0,0 +1,961 @@
+#!/usr/bin/python3
+import collections
+from datetime import datetime, timedelta
+from bitarray import bitarray
+
+
+__DEBUG__ = "N"
+
+
+class FruException(Exception):
+    def __init__(self, message='fruerror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+
+def e_print(err):
+    print("ERROR: " + err)
+
+
+def d_print(debug_info):
+    if __DEBUG__ == "Y":
+        print(debug_info)
+
+
+class FruUtil():
+    @staticmethod
+    def decodeLength(value):
+        a = bitarray(8)
+        a.setall(True)
+        a[0:1] = 0
+        a[1:2] = 0
+        x = ord(a.tobytes())
+        return x & ord(value)
+
+    @staticmethod
+    def minToData():
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        endtime = datetime.now()
+        seconds = (endtime - starttime).total_seconds()
+        mins = seconds // 60
+        m = int(round(mins))
+        return m
+
+    @staticmethod
+    def getTimeFormat():
+        return datetime.now().strftime('%Y-%m-%d')
+
+    @staticmethod
+    def getTypeLength(value):
+        if value is None or len(value) == 0:
+            return 0
+        a = bitarray(8)
+        a.setall(False)
+        a[0:1] = 1
+        a[1:2] = 1
+        x = ord(a.tobytes())
+        return x | len(value)
+
+    @staticmethod
+    def checksum(b):
+        result = 0
+        for item in b:
+            result += ord(item)
+        return (0x100 - (result & 0xff)) & 0xff
+
+
+class BaseArea(object):
+    SUGGESTED_SIZE_COMMON_HEADER = 8
+    SUGGESTED_SIZE_INTERNAL_USE_AREA = 72
+    SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32
+    SUGGESTED_SIZE_BOARD_INFO_AREA = 80
+    SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80
+
+    INITVALUE = b'\x00'
+    resultvalue = INITVALUE * 256
+    COMMON_HEAD_VERSION = b'\x01'
+    __childList = None
+
+    def __init__(self, name="", size=0, offset=0):
+        self.__childList = []
+        self._offset = offset
+        self.name = name
+        self._size = size
+        self._isPresent = False
+        self._data = b'\x00' * size
+
+    @property
+    def childList(self):
+        return self.__childList
+
+    @childList.setter
+    def childList(self, value):
+        self.__childList = value
+
+    @property
+    def offset(self):
+        return self._offset
+
+    @offset.setter
+    def offset(self, value):
+        self._offset = value
+
+    @property
+    def size(self):
+        return self._size
+
+    @size.setter
+    def size(self, value):
+        self._size = value
+
+    @property
+    def data(self):
+        return self._data
+
+    @data.setter
+    def data(self, value):
+        self._data = value
+
+    @property
+    def isPresent(self):
+        return self._isPresent
+
+    @isPresent.setter
+    def isPresent(self, value):
+        self._isPresent = value
+
+
+class InternalUseArea(BaseArea):
+    pass
+
+
+class ChassisInfoArea(BaseArea):
+    pass
+
+
+class BoardInfoArea(BaseArea):
+    _boardTime = None
+    _fields = None
+    _mfg_date = None
+    areaversion = None
+    _boardversion = None
+    _language = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "mfg_date            : %s \n" \
+                    "boardManufacturer   : %s \n" \
+                    "boardProductName    : %s \n" \
+                    "boardSerialNumber   : %s \n" \
+                    "boardPartNumber     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.boardversion), self.size,
+                              self.language, self.getMfgRealData(),
+                              self.boardManufacturer, self.boardProductName,
+                              self.boardSerialNumber, self.boardPartNumber,
+                              self.fruFileId)
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "boardextra%d         : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["boardversion"] = ord(self.boardversion)
+        dic["boardlength"] = self.size
+        dic["boardlanguage"] = self.language
+        dic["boardmfg_date"] = self.getMfgRealData()
+        dic["boardManufacturer"] = self.boardManufacturer
+        dic["boardProductName"] = self.boardProductName
+        dic["boardSerialNumber"] = self.boardSerialNumber
+        dic["boardPartNumber"] = self.boardPartNumber
+        dic["boardfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]
+        index += 1
+        d_print("decode length :%d class size:%d" %
+                ((ord(self.data[index]) * 8), self.size))
+        index += 2
+
+        timetmp = self.data[index: index + 3]
+        self.mfg_date = ord(timetmp[0]) | (
+            ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16)
+        d_print("decode getMfgRealData :%s" % self.getMfgRealData())
+        index += 3
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardManufacturer:%s" % self.boardManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardProductName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardProductName:%s" % self.boardProductName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardSerialNumber:%s" % self.boardSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardPartNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardPartNumber:%s" % self.boardPartNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if self.data[index] != chr(0xc1):
+                templen = FruUtil.decodeLength(self.data[index])
+                tmpval = self.data[index + 1: index + templen + 1]
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+            else:
+                break
+
+    def fruSetValue(self, field, value):
+        tmp_field = getattr(self, field, None)
+        if tmp_field is not None:
+            setattr(self, field, value)
+
+    def recalcute(self):
+        d_print("boardInfoArea version:%x" % ord(self.boardversion))
+        d_print("boardInfoArea length:%d" % self.size)
+        d_print("boardInfoArea language:%x" % self.language)
+        self.mfg_date = FruUtil.minToData()
+        d_print("boardInfoArea mfg_date:%x" % self.mfg_date)
+
+        self.data = chr(ord(self.boardversion)) + \
+            chr(self.size // 8) + chr(self.language)
+
+        self.data += chr(self.mfg_date & 0xFF)
+        self.data += chr((self.mfg_date >> 8) & 0xFF)
+        self.data += chr((self.mfg_date >> 16) & 0xFF)
+
+        d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer)
+        typelength = FruUtil.getTypeLength(self.boardManufacturer)
+        self.data += chr(typelength)
+        self.data += self.boardManufacturer
+
+        d_print("boardInfoArea boardProductName:%s" % self.boardProductName)
+        self.data += chr(FruUtil.getTypeLength(self.boardProductName))
+        self.data += self.boardProductName
+
+        d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber))
+        self.data += self.boardSerialNumber
+
+        d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardPartNumber))
+        self.data += self.boardPartNumber
+
+        d_print("boardInfoArea fruFileId:%s" % self.fruFileId)
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is not None:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) // 8 + 1
+            self.size += incr * 8
+
+        self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+        d_print("self data:%d" % len(self.data))
+        d_print("self size:%d" % self.size)
+        d_print("adjust size:%d" % (self.size - len(self.data) - 1))
+        self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+
+        # checksum
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+    def getMfgRealData(self):
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        mactime = starttime + timedelta(minutes=self.mfg_date)
+        return mactime
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def mfg_date(self):
+        return self._mfg_date
+
+    @mfg_date.setter
+    def mfg_date(self, val):
+        self._mfg_date = val
+
+    @property
+    def boardversion(self):
+        self._boardversion = self.COMMON_HEAD_VERSION
+        return self._boardversion
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, val):
+        self._FRUFileID = val
+
+    @property
+    def boardPartNumber(self):
+        return self._boardPartNumber
+
+    @boardPartNumber.setter
+    def boardPartNumber(self, val):
+        self._boardPartNumber = val
+
+    @property
+    def boardSerialNumber(self):
+        return self._boardSerialNumber
+
+    @boardSerialNumber.setter
+    def boardSerialNumber(self, val):
+        self._boardSerialNumber = val
+
+    @property
+    def boardProductName(self):
+        return self._boradProductName
+
+    @boardProductName.setter
+    def boardProductName(self, val):
+        self._boradProductName = val
+
+    @property
+    def boardManufacturer(self):
+        return self._boardManufacturer
+
+    @boardManufacturer.setter
+    def boardManufacturer(self, val):
+        self._boardManufacturer = val
+
+    @property
+    def boardTime(self):
+        return self._boardTime
+
+    @boardTime.setter
+    def boardTime(self, val):
+        self._boardTime = val
+
+    @property
+    def fields(self):
+        return self._fields
+
+    @fields.setter
+    def fields(self, val):
+        self._fields = val
+
+
+class ProductInfoArea(BaseArea):
+    _productManufacturer = None
+    _productAssetTag = None
+    _FRUFileID = None
+    _language = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "productManufacturer : %s \n" \
+                    "productName         : %s \n" \
+                    "productPartModelName: %s \n" \
+                    "productVersion      : %s \n" \
+                    "productSerialNumber : %s \n" \
+                    "productAssetTag     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.areaversion), self.size,
+                              self.language, self.productManufacturer,
+                              self.productName, self.productPartModelName,
+                              self.productVersion, self.productSerialNumber,
+                              self.productAssetTag, self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "productextra%d       : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["productversion"] = ord(self.areaversion)
+        dic["productlength"] = self.size
+        dic["productlanguage"] = self.language
+        dic["productManufacturer"] = self.productManufacturer
+        dic["productName"] = self.productName
+        dic["productPartModelName"] = self.productPartModelName
+        dic["productVersion"] = int(self.productVersion, 16)
+        dic["productSerialNumber"] = self.productSerialNumber
+        dic["productAssetTag"] = self.productAssetTag
+        dic["productfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]  # 0
+        index += 1
+        d_print("decode length %d" % (ord(self.data[index]) * 8))
+        d_print("class size %d" % self.size)
+        index += 2
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productManufacturer:%s" % self.productManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productName:%s" % self.productName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productPartModelName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productPartModelName:%s" % self.productPartModelName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productVersion = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productVersion:%s" % self.productVersion)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productSerialNumber:%s" % self.productSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productAssetTag = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productAssetTag:%s" % self.productAssetTag)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if self.data[index] != chr(0xc1) and index < self.size - 1:
+                templen = FruUtil.decodeLength(self.data[index])
+                if templen == 0:
+                    break
+                tmpval = self.data[index + 1: index + templen + 1]
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+            else:
+                break
+
+    @property
+    def productVersion(self):
+        return self._productVersion
+
+    @productVersion.setter
+    def productVersion(self, name):
+        self._productVersion = name
+
+    @property
+    def areaversion(self):
+        self._areaversion = self.COMMON_HEAD_VERSION
+        return self._areaversion
+
+    @areaversion.setter
+    def areaversion(self, name):
+        self._areaversion = name
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def productManufacturer(self):
+        return self._productManufacturer
+
+    @productManufacturer.setter
+    def productManufacturer(self, name):
+        self._productManufacturer = name
+
+    @property
+    def productName(self):
+        return self._productName
+
+    @productName.setter
+    def productName(self, name):
+        self._productName = name
+
+    @property
+    def productPartModelName(self):
+        return self._productPartModelName
+
+    @productPartModelName.setter
+    def productPartModelName(self, name):
+        self._productPartModelName = name
+
+    @property
+    def productSerialNumber(self):
+        return self._productSerialNumber
+
+    @productSerialNumber.setter
+    def productSerialNumber(self, name):
+        self._productSerialNumber = name
+
+    @property
+    def productAssetTag(self):
+        return self._productAssetTag
+
+    @productAssetTag.setter
+    def productAssetTag(self, name):
+        self._productAssetTag = name
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, name):
+        self._FRUFileID = name
+
+    def fruSetValue(self, field, value):
+        tmp_field = getattr(self, field, None)
+        if tmp_field is not None:
+            setattr(self, field, value)
+
+    def recalcute(self):
+        d_print("product version:%x" % ord(self.areaversion))
+        d_print("product length:%d" % self.size)
+        d_print("product language:%x" % self.language)
+        self.data = chr(ord(self.areaversion)) + \
+            chr(self.size // 8) + chr(self.language)
+
+        typelength = FruUtil.getTypeLength(self.productManufacturer)
+        self.data += chr(typelength)
+        self.data += self.productManufacturer
+
+        self.data += chr(FruUtil.getTypeLength(self.productName))
+        self.data += self.productName
+
+        self.data += chr(FruUtil.getTypeLength(self.productPartModelName))
+        self.data += self.productPartModelName
+
+        self.data += chr(FruUtil.getTypeLength(self.productVersion))
+        self.data += self.productVersion
+
+        self.data += chr(FruUtil.getTypeLength(self.productSerialNumber))
+        self.data += self.productSerialNumber
+
+        self.data += chr(FruUtil.getTypeLength(self.productAssetTag))
+        if self.productAssetTag is not None:
+            self.data += self.productAssetTag
+
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea productextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is not None:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) // 8 + 1
+            self.size += incr * 8
+        d_print("self.data:%d" % len(self.data))
+        d_print("self.size:%d" % self.size)
+
+        self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+        self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+
+class MultiRecordArea(BaseArea):
+    pass
+
+
+class Field(object):
+
+    def __init__(self, fieldType="ASCII", fieldData=""):
+        self.fieldData = fieldData
+        self.fieldType = fieldType
+
+    @property
+    def fieldType(self):
+        return self.fieldType
+
+    @property
+    def fieldData(self):
+        return self.fieldData
+
+
+class ipmifru(BaseArea):
+    _BoardInfoArea = None
+    _ProductInfoArea = None
+    _InternalUseArea = None
+    _ChassisInfoArea = None
+    _multiRecordArea = None
+    _productinfoAreaOffset = BaseArea.INITVALUE
+    _boardInfoAreaOffset = BaseArea.INITVALUE
+    _internalUserAreaOffset = BaseArea.INITVALUE
+    _chassicInfoAreaOffset = BaseArea.INITVALUE
+    _multiRecordAreaOffset = BaseArea.INITVALUE
+    _bindata = None
+    _bodybin = None
+    _version = BaseArea.COMMON_HEAD_VERSION
+    _zeroCheckSum = None
+    _frusize = 256
+
+    def __str__(self):
+        tmpstr = ""
+        if self.boardInfoArea.isPresent:
+            tmpstr += "\nboardinfoarea: \n"
+            tmpstr += self.boardInfoArea.__str__()
+        if self.productInfoArea.isPresent:
+            tmpstr += "\nproductinfoarea: \n"
+            tmpstr += self.productInfoArea.__str__()
+        return tmpstr
+
+    def decodeBin(self, eeprom):
+        commonHead = eeprom[0:8]
+        d_print("decode version %x" % ord(commonHead[0]))
+        if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]):
+            raise FruException("HEAD VERSION error,not Fru format!", -10)
+        if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]):
+            strtemp = "check header checksum error [cal:%02x data:%02x]" % (
+                FruUtil.checksum(commonHead[0:7]), ord(commonHead[7]))
+            raise FruException(strtemp, -3)
+        if ord(commonHead[1]) != ord(self.INITVALUE):
+            d_print("Internal Use Area is present")
+            self.internalUseArea = InternalUseArea(
+                name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA)
+            self.internalUseArea.isPresent = True
+            self.internalUserAreaOffset = ord(commonHead[1])
+            self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: (
+                self.internalUserAreaOffset * 8 + self.internalUseArea.size)]
+        if ord(commonHead[2]) != ord(self.INITVALUE):
+            d_print("Chassis Info Area is present")
+            self.chassisInfoArea = ChassisInfoArea(
+                name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA)
+            self.chassisInfoArea.isPresent = True
+            self.chassicInfoAreaOffset = ord(commonHead[2])
+            self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: (
+                self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)]
+        if ord(commonHead[3]) != ord(self.INITVALUE):
+            self.boardInfoArea = BoardInfoArea(
+                name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA)
+            self.boardInfoArea.isPresent = True
+            self.boardInfoAreaOffset = ord(commonHead[3])
+            self.boardInfoArea.size = ord(
+                eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8
+            d_print("Board Info Area is present size:%d" %
+                    (self.boardInfoArea.size))
+            self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: (
+                self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)]
+            if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]):
+                strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" %  \
+                    (FruUtil.checksum(
+                        self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.boardInfoArea.decodedata()
+        if ord(commonHead[4]) != ord(self.INITVALUE):
+            d_print("Product Info Area is present")
+            self.productInfoArea = ProductInfoArea(
+                name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA)
+            self.productInfoArea.isPresent = True
+            self.productinfoAreaOffset = ord(commonHead[4])
+            d_print("length offset value: %02x" %
+                    ord(eeprom[self.productinfoAreaOffset * 8 + 1]))
+            self.productInfoArea.size = ord(
+                eeprom[self.productinfoAreaOffset * 8 + 1]) * 8
+            d_print("Product Info Area is present size:%d" %
+                    (self.productInfoArea.size))
+
+            self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: (
+                self.productinfoAreaOffset * 8 + self.productInfoArea.size)]
+            if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]):
+                strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % (
+                    FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.productInfoArea.decodedata()
+        if ord(commonHead[5]) != ord(self.INITVALUE):
+            self.multiRecordArea = MultiRecordArea(
+                name="MultiRecord record Area ")
+            d_print("MultiRecord record present")
+            self.multiRecordArea.isPresent = True
+            self.multiRecordAreaOffset = ord(commonHead[5])
+            self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: (
+                self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)]
+
+    def initDefault(self):
+        self.version = self.COMMON_HEAD_VERSION
+        self.internalUserAreaOffset = self.INITVALUE
+        self.chassicInfoAreaOffset = self.INITVALUE
+        self.boardInfoAreaOffset = self.INITVALUE
+        self.productinfoAreaOffset = self.INITVALUE
+        self.multiRecordAreaOffset = self.INITVALUE
+        self.zeroCheckSum = self.INITVALUE
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        self.productInfoArea = None
+        self.internalUseArea = None
+        self.boardInfoArea = None
+        self.chassisInfoArea = None
+        self.multiRecordArea = None
+        # self.recalcute()
+
+    @property
+    def version(self):
+        return self._version
+
+    @version.setter
+    def version(self, name):
+        self._version = name
+
+    @property
+    def internalUserAreaOffset(self):
+        return self._internalUserAreaOffset
+
+    @internalUserAreaOffset.setter
+    def internalUserAreaOffset(self, obj):
+        self._internalUserAreaOffset = obj
+
+    @property
+    def chassicInfoAreaOffset(self):
+        return self._chassicInfoAreaOffset
+
+    @chassicInfoAreaOffset.setter
+    def chassicInfoAreaOffset(self, obj):
+        self._chassicInfoAreaOffset = obj
+
+    @property
+    def productinfoAreaOffset(self):
+        return self._productinfoAreaOffset
+
+    @productinfoAreaOffset.setter
+    def productinfoAreaOffset(self, obj):
+        self._productinfoAreaOffset = obj
+
+    @property
+    def boardInfoAreaOffset(self):
+        return self._boardInfoAreaOffset
+
+    @boardInfoAreaOffset.setter
+    def boardInfoAreaOffset(self, obj):
+        self._boardInfoAreaOffset = obj
+
+    @property
+    def multiRecordAreaOffset(self):
+        return self._multiRecordAreaOffset
+
+    @multiRecordAreaOffset.setter
+    def multiRecordAreaOffset(self, obj):
+        self._multiRecordAreaOffset = obj
+
+    @property
+    def zeroCheckSum(self):
+        return self._zeroCheckSum
+
+    @zeroCheckSum.setter
+    def zeroCheckSum(self, obj):
+        self._zeroCheckSum = obj
+
+    @property
+    def productInfoArea(self):
+        return self._ProductInfoArea
+
+    @productInfoArea.setter
+    def productInfoArea(self, obj):
+        self._ProductInfoArea = obj
+
+    @property
+    def internalUseArea(self):
+        return self._InternalUseArea
+
+    @internalUseArea.setter
+    def internalUseArea(self, obj):
+        self.internalUseArea = obj
+
+    @property
+    def boardInfoArea(self):
+        return self._BoardInfoArea
+
+    @boardInfoArea.setter
+    def boardInfoArea(self, obj):
+        self._BoardInfoArea = obj
+
+    @property
+    def chassisInfoArea(self):
+        return self._ChassisInfoArea
+
+    @chassisInfoArea.setter
+    def chassisInfoArea(self, obj):
+        self._ChassisInfoArea = obj
+
+    @property
+    def multiRecordArea(self):
+        return self._multiRecordArea
+
+    @multiRecordArea.setter
+    def multiRecordArea(self, obj):
+        self._multiRecordArea = obj
+
+    @property
+    def bindata(self):
+        return self._bindata
+
+    @bindata.setter
+    def bindata(self, obj):
+        self._bindata = obj
+
+    @property
+    def bodybin(self):
+        return self._bodybin
+
+    @bodybin.setter
+    def bodybin(self, obj):
+        self._bodybin = obj
+
+    def recalcuteCommonHead(self):
+        self.bindata = ""
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        d_print("common Header %d" % self.offset)
+        d_print("fru eeprom size  %d" % self._frusize)
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            self.internalUserAreaOffset = self.offset // 8
+            self.offset += self.internalUseArea.size
+            d_print("internalUseArea is present offset:%d" % self.offset)
+
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            self.chassicInfoAreaOffset = self.offset // 8
+            self.offset += self.chassisInfoArea.size
+            d_print("chassisInfoArea is present offset:%d" % self.offset)
+
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            self.boardInfoAreaOffset = self.offset // 8
+            self.offset += self.boardInfoArea.size
+            d_print("boardInfoArea is present offset:%d" % self.offset)
+            d_print("boardInfoArea is present size:%d" %
+                    self.boardInfoArea.size)
+
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            self.productinfoAreaOffset = self.offset // 8
+            self.offset += self.productInfoArea.size
+            d_print("productInfoArea is present offset:%d" % self.offset)
+
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            self.multiRecordAreaOffset = self.offset // 8
+            d_print("multiRecordArea is present offset:%d" % self.offset)
+
+        if self.internalUserAreaOffset == self.INITVALUE:
+            self.internalUserAreaOffset = 0
+        if self.productinfoAreaOffset == self.INITVALUE:
+            self.productinfoAreaOffset = 0
+        if self.chassicInfoAreaOffset == self.INITVALUE:
+            self.chassicInfoAreaOffset = 0
+        if self.boardInfoAreaOffset == self.INITVALUE:
+            self.boardInfoAreaOffset = 0
+        if self.multiRecordAreaOffset == self.INITVALUE:
+            self.multiRecordAreaOffset = 0
+
+        self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset
+                             - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff
+        d_print("zerochecksum:%x" % self.zeroCheckSum)
+        self.data = ""
+        self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr(
+            self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum)
+
+        self.bindata = self.data + self.bodybin
+        totallen = len(self.bindata)
+        d_print("totallen %d" % totallen)
+        if totallen < self._frusize:
+            self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0]))
+        else:
+            raise FruException('bin data more than %d' % self._frusize, -2)
+
+    def recalcutebin(self):
+        self.bodybin = ""
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            d_print("internalUseArea present")
+            self.bodybin += self.internalUseArea.data
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            d_print("chassisInfoArea present")
+            self.bodybin += self.chassisInfoArea.data
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            d_print("boardInfoArea present")
+            self.boardInfoArea.recalcute()
+            self.bodybin += self.boardInfoArea.data
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            d_print("productInfoAreapresent")
+            self.productInfoArea.recalcute()
+            self.bodybin += self.productInfoArea.data
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            d_print("multiRecordArea present")
+            self.bodybin += self.productInfoArea.data
+
+    def recalcute(self, fru_eeprom_size=256):
+        self._frusize = fru_eeprom_size
+        self.recalcutebin()
+        self.recalcuteCommonHead()
+
+    def setValue(self, area, field, value):
+        tmp_area = getattr(self, area, None)
+        if tmp_area is not None:
+            tmp_area.fruSetValue(field, value)
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/installer.conf b/device/micas/x86_64-micas_m2-w6940-64oc-r0/installer.conf
new file mode 100644
index 000000000000..deb97654ad43
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/installer.conf
@@ -0,0 +1,4 @@
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll intel_iommu=on iommu=pt modprobe.blacklist=ice,mei_me,i2c_i801,i2c_ismt,iTCO_wdt"
+CONSOLE_PORT=0x5060
+CONSOLE_DEV=0
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/led_proc_init.soc b/device/micas/x86_64-micas_m2-w6940-64oc-r0/led_proc_init.soc
new file mode 100644
index 000000000000..5124ab75ab92
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/led_proc_init.soc
@@ -0,0 +1,2 @@
+led load /usr/share/sonic/platform/custom_led.bin
+
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/media_settings.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/media_settings.json
new file mode 100644
index 000000000000..d609404c2e73
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/media_settings.json
@@ -0,0 +1,4100 @@
+{
+    "PORT_MEDIA_SETTINGS": {
+        "0": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "1": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "2": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "3": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "4": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "5": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "6": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "7": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "8": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "9": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "10": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "11": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "12": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "13": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "14": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "15": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "16": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "17": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "18": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "19": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "20": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe0",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "21": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe0",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000084",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "22": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "23": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "24": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "25": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe0",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "26": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "27": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "28": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "29": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "30": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "31": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "32": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "33": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "34": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "35": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "36": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "37": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe0",
+                    "lane4": "0xffffffe8",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000084",
+                    "lane4": "0x0000008C",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "38": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe0",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "39": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "40": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "41": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "42": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "43": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "44": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "45": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "46": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "47": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "48": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "49": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "50": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "51": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "52": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "53": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "54": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "55": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "56": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "57": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "58": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "59": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "60": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe0",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000084",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "61": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "62": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "63": {
+            "Default": {
+                "pre3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004",
+                    "lane4": "0x00000004",
+                    "lane5": "0x00000004",
+                    "lane6": "0x00000004",
+                    "lane7": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4",
+                    "lane4": "0xffffffe4",
+                    "lane5": "0xffffffe4",
+                    "lane6": "0xffffffe4",
+                    "lane7": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        }
+    }
+}
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/monitor.py b/device/micas/x86_64-micas_m2-w6940-64oc-r0/monitor.py
new file mode 100644
index 000000000000..5fc287892e50
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/monitor.py
@@ -0,0 +1,402 @@
+#!/usr/bin/python3
+#   * onboard temperature sensors
+#   * FAN trays
+#   * PSU
+#
+import os
+from lxml import etree as ET
+import glob
+import json
+from decimal import Decimal
+from fru import ipmifru
+
+
+MAILBOX_DIR = "/sys/bus/i2c/devices/"
+BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type"
+BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow"
+
+
+CONFIG_NAME = "dev.xml"
+
+
+def byteTostr(val):
+    strtmp = ''
+    for value in val:
+        strtmp += chr(value)
+    return strtmp
+
+
+def typeTostr(val):
+    if isinstance(val, bytes):
+        strtmp = byteTostr(val)
+        return strtmp
+    return val
+
+
+def get_board_id():
+    if not os.path.exists(BOARD_ID_PATH):
+        return "NA"
+    with open(BOARD_ID_PATH) as fd:
+        id_str = fd.read().strip()
+    return "0x%x" % (int(id_str, 10))
+
+
+def getboardairflow():
+    if not os.path.exists(BOARD_AIRFLOW_PATH):
+        return "NA"
+    with open(BOARD_AIRFLOW_PATH) as fd:
+        airflow_str = fd.read().strip()
+    data = json.loads(airflow_str)
+    airflow = data.get("board", "NA")
+    return airflow
+
+
+boardid = get_board_id()
+boardairflow = getboardairflow()
+
+
+DEV_XML_FILE_LIST = [
+    "dev_" + boardid + "_" + boardairflow + ".xml",
+    "dev_" + boardid + ".xml",
+    "dev_" + boardairflow + ".xml",
+]
+
+
+def dev_file_read(path, offset, read_len):
+    retval = "ERR"
+    val_list = []
+    msg = ""
+    ret = ""
+    fd = -1
+
+    if not os.path.exists(path):
+        return False, "%s %s not found" % (retval, path)
+
+    try:
+        fd = os.open(path, os.O_RDONLY)
+        os.lseek(fd, offset, os.SEEK_SET)
+        ret = os.read(fd, read_len)
+        for item in ret:
+            val_list.append(item)
+    except Exception as e:
+        msg = str(e)
+        return False, "%s %s" % (retval, msg)
+    finally:
+        if fd > 0:
+            os.close(fd)
+    return True, val_list
+
+
+def getPMCreg(location):
+    retval = 'ERR'
+    if not os.path.isfile(location):
+        return "%s %s  notfound" % (retval, location)
+    try:
+        with open(location, 'r') as fd:
+            retval = fd.read()
+    except Exception as error:
+        return "ERR %s" % str(error)
+
+    retval = retval.rstrip('\r\n')
+    retval = retval.lstrip(" ")
+    return retval
+
+
+# Get a mailbox register
+def get_pmc_register(reg_name):
+    retval = 'ERR'
+    mb_reg_file = reg_name
+    filepath = glob.glob(mb_reg_file)
+    if len(filepath) == 0:
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    mb_reg_file = filepath[0]
+    if not os.path.isfile(mb_reg_file):
+        # print mb_reg_file,  'not found !'
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    try:
+        with open(mb_reg_file, 'rb') as fd:
+            retval = fd.read()
+        retval = typeTostr(retval)
+    except Exception as error:
+        retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error))
+
+    retval = retval.rstrip('\r\n')
+    retval = retval.lstrip(" ")
+    return retval
+
+
+class checktype():
+    def __init__(self, test1):
+        self.test1 = test1
+
+    @staticmethod
+    def getValue(location, bit, data_type, coefficient=1, addend=0):
+        try:
+            value_t = get_pmc_register(location)
+            if value_t.startswith("ERR") or value_t.startswith("NA"):
+                return value_t
+            if data_type == 1:
+                return float('%.1f' % ((float(value_t) / 1000) + addend))
+            if data_type == 2:
+                return float('%.1f' % (float(value_t) / 100))
+            if data_type == 3:
+                psu_status = int(value_t, 16)
+                return (psu_status & (1 << bit)) >> bit
+            if data_type == 4:
+                return int(value_t, 10)
+            if data_type == 5:
+                return float('%.1f' % (float(value_t) / 1000 / 1000))
+            if data_type == 6:
+                return Decimal(float(value_t) * coefficient / 1000).quantize(Decimal('0.000'))
+            return value_t
+        except Exception as e:
+            value_t = "ERR %s" % str(e)
+            return value_t
+
+    # fanFRU
+    @staticmethod
+    def decodeBinByValue(retval):
+        fru = ipmifru()
+        fru.decodeBin(retval)
+        return fru
+
+    @staticmethod
+    def getfruValue(prob_t, root, val):
+        try:
+            ret, binval_bytes = dev_file_read(val, 0, 256)
+            if ret is False:
+                return binval_bytes
+            binval = byteTostr(binval_bytes)
+            fanpro = {}
+            ret = checktype.decodeBinByValue(binval)
+            fanpro['fan_type'] = ret.productInfoArea.productName
+            fanpro['hw_version'] = ret.productInfoArea.productVersion
+            fanpro['sn'] = ret.productInfoArea.productSerialNumber
+            fan_display_name_dict = status.getDecodValue(root, "fan_display_name")
+            fan_name = fanpro['fan_type'].strip()
+            if len(fan_display_name_dict) == 0:
+                return fanpro
+            if fan_name not in fan_display_name_dict:
+                prob_t['errcode'] = -1
+                prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name)
+            else:
+                fanpro['fan_type'] = fan_display_name_dict[fan_name]
+            return fanpro
+        except Exception as error:
+            return "ERR " + str(error)
+
+    @staticmethod
+    def getslotfruValue(val):
+        try:
+            binval = checktype.getValue(val, 0, 0)
+            if binval.startswith("ERR"):
+                return binval
+            slotpro = {}
+            ret = checktype.decodeBinByValue(binval)
+            slotpro['slot_type'] = ret.boardInfoArea.boardProductName
+            slotpro['hw_version'] = ret.boardInfoArea.boardextra1
+            slotpro['sn'] = ret.boardInfoArea.boardSerialNumber
+            return slotpro
+        except Exception as error:
+            return "ERR " + str(error)
+
+    @staticmethod
+    def getpsufruValue(prob_t, root, val):
+        try:
+            psu_match = False
+            binval = checktype.getValue(val, 0, 0)
+            if binval.startswith("ERR"):
+                return binval
+            psupro = {}
+            ret = checktype.decodeBinByValue(binval)
+            psupro['type1'] = ret.productInfoArea.productPartModelName
+            psupro['sn'] = ret.productInfoArea.productSerialNumber
+            psupro['hw_version'] = ret.productInfoArea.productVersion
+            psu_dict = status.getDecodValue(root, "psutype")
+            psupro['type1'] = psupro['type1'].strip()
+            if len(psu_dict) == 0:
+                return psupro
+            for psu_name, display_name in psu_dict.items():
+                if psu_name.strip() == psupro['type1']:
+                    psupro['type1'] = display_name
+                    psu_match = True
+                    break
+            if psu_match is not True:
+                prob_t['errcode'] = -1
+                prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1'])
+            return psupro
+        except Exception as error:
+            return "ERR " + str(error)
+
+
+class status():
+    def __init__(self, productname):
+        self.productname = productname
+
+    @staticmethod
+    def getETroot(filename):
+        tree = ET.parse(filename)
+        root = tree.getroot()
+        return root
+
+    @staticmethod
+    def getDecodValue(collection, decode):
+        decodes = collection.find('decode')
+        testdecode = decodes.find(decode)
+        test = {}
+        if testdecode is None:
+            return test
+        for neighbor in testdecode.iter('code'):
+            test[neighbor.attrib["key"]] = neighbor.attrib["value"]
+        return test
+
+    @staticmethod
+    def getfileValue(location):
+        return checktype.getValue(location, " ", " ")
+
+    @staticmethod
+    def getETValue(a, filename, tagname):
+        root = status.getETroot(filename)
+        for neighbor in root.iter(tagname):
+            prob_t = {}
+            prob_t.update(neighbor.attrib)
+            prob_t['errcode'] = 0
+            prob_t['errmsg'] = ''
+            for pros in neighbor.iter("property"):
+                ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items()))
+                if ret.get('e2type') == 'fru' and ret.get("name") == "fru":
+                    fruval = checktype.getfruValue(prob_t, root, ret["location"])
+                    if isinstance(fruval, str) and fruval.startswith("ERR"):
+                        prob_t['errcode'] = -1
+                        prob_t['errmsg'] = fruval
+                        break
+                    prob_t.update(fruval)
+                    continue
+
+                if ret.get("name") == "psu" and ret.get('e2type') == 'fru':
+                    psuval = checktype.getpsufruValue(prob_t, root, ret["location"])
+                    if isinstance(psuval, str) and psuval.startswith("ERR"):
+                        prob_t['errcode'] = -1
+                        prob_t['errmsg'] = psuval
+                        break
+                    prob_t.update(psuval)
+                    continue
+
+                if ret.get("gettype") == "config":
+                    prob_t[ret["name"]] = ret["value"]
+                    continue
+
+                if 'type' not in ret.keys():
+                    val = "0"
+                else:
+                    val = ret["type"]
+                if 'bit' not in ret.keys():
+                    bit = "0"
+                else:
+                    bit = ret["bit"]
+                if 'coefficient' not in ret.keys():
+                    coefficient = 1
+                else:
+                    coefficient = float(ret["coefficient"])
+                if 'addend' not in ret.keys():
+                    addend = 0
+                else:
+                    addend = float(ret["addend"])
+
+                s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend)
+                if isinstance(s, str) and s.startswith("ERR"):
+                    prob_t['errcode'] = -1
+                    prob_t['errmsg'] = s
+                    break
+                if 'default' in ret.keys():
+                    rt = status.getDecodValue(root, ret['decode'])
+                    prob_t['errmsg'] = rt[str(s)]
+                    if str(s) != ret["default"]:
+                        prob_t['errcode'] = -1
+                        break
+                else:
+                    if 'decode' in ret.keys():
+                        rt = status.getDecodValue(root, ret['decode'])
+                        if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt):
+                            prob_t['errcode'] = -1
+                            prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" %
+                                                       (s.replace("\x00", "").rstrip()))
+                        else:
+                            s = rt[str(s).replace("\x00", "").rstrip()]
+                name = ret["name"]
+                prob_t[name] = str(s)
+            a.append(prob_t)
+
+    @staticmethod
+    def getCPUValue(a, filename, tagname):
+        root = status.getETroot(filename)
+        for neighbor in root.iter(tagname):
+            location = neighbor.attrib["location"]
+        L = []
+        for dirpath, dirnames, filenames in os.walk(location):
+            for file in filenames:
+                if file.endswith("input"):
+                    L.append(os.path.join(dirpath, file))
+            L = sorted(L, reverse=False)
+        for i in range(len(L)):
+            prob_t = {}
+            prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, i + 1))
+            prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, i + 1))) / 1000
+            prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, i + 1))) / 1000
+            prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, i + 1))) / 1000
+            prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, i + 1))) / 1000
+            a.append(prob_t)
+
+    @staticmethod
+    def getFileName():
+        fpath = os.path.dirname(os.path.realpath(__file__))
+        for file in DEV_XML_FILE_LIST:
+            xml = fpath + "/" + file
+            if os.path.exists(xml):
+                return xml
+        return fpath + "/" + CONFIG_NAME
+
+    @staticmethod
+    def checkFan(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "fan"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getTemp(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "temp"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getPsu(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "psu"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getcputemp(ret):
+        _filename = status.getFileName()
+        _tagname = "cpus"
+        status.getCPUValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getDcdc(ret):
+        _filename = status.getFileName()
+        _tagname = "dcdc"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getmactemp(ret):
+        _filename = status.getFileName()
+        _tagname = "mactemp"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getmacpower(ret):
+        _filename = status.getFileName()
+        _tagname = "macpower"
+        status.getETValue(ret, _filename, _tagname)
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6940-64oc-r0/pcie.yaml
new file mode 100644
index 000000000000..cce5d873a802
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/pcie.yaml
@@ -0,0 +1,478 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: 09a2
+  name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)'
+- bus: '00'
+  dev: '00'
+  fn: '1'
+  id: 09a4
+  name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)'
+- bus: '00'
+  dev: '00'
+  fn: '2'
+  id: 09a3
+  name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)'
+- bus: '00'
+  dev: '00'
+  fn: '3'
+  id: 09a5
+  name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)'
+- bus: '00'
+  dev: '00'
+  fn: '4'
+  id: 0998
+  name: 'Host bridge: Intel Corporation Device 0998'
+- bus: '00'
+  dev: '01'
+  fn: '0'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+  dev: '01'
+  fn: '1'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+  dev: '01'
+  fn: '2'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+  dev: '01'
+  fn: '3'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+  dev: '01'
+  fn: '4'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+  dev: '01'
+  fn: '5'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+  dev: '01'
+  fn: '6'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+  dev: '01'
+  fn: '7'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+  dev: '02'
+  fn: '0'
+  id: 09a6
+  name: 'System peripheral: Intel Corporation Device 09a6'
+- bus: '00'
+  dev: '02'
+  fn: '1'
+  id: 09a7
+  name: 'System peripheral: Intel Corporation Device 09a7'
+- bus: '00'
+  dev: '02'
+  fn: '4'
+  id: '3456'
+  name: 'Non-Essential Instrumentation [1300]: Intel Corporation Device 3456 (rev
+    01)'
+- bus: '00'
+  dev: '06'
+  fn: '0'
+  id: 18da
+  name: 'PCI bridge: Intel Corporation Device 18da (rev 11)'
+- bus: '00'
+  dev: 09
+  fn: '0'
+  id: 18a4
+  name: 'PCI bridge: Intel Corporation Device 18a4 (rev 11)'
+- bus: '00'
+  dev: 0b
+  fn: '0'
+  id: 18a6
+  name: 'PCI bridge: Intel Corporation Device 18a6 (rev 11)'
+- bus: '00'
+  dev: 0e
+  fn: '0'
+  id: 18f2
+  name: 'SATA controller: Intel Corporation Device 18f2 (rev 11)'
+- bus: '00'
+  dev: 0f
+  fn: '0'
+  id: 18ac
+  name: 'System peripheral: Intel Corporation Device 18ac (rev 11)'
+- bus: '00'
+  dev: '10'
+  fn: '0'
+  id: 18a8
+  name: 'PCI bridge: Intel Corporation Device 18a8 (rev 11)'
+- bus: '00'
+  dev: '11'
+  fn: '0'
+  id: 18a9
+  name: 'PCI bridge: Intel Corporation Device 18a9 (rev 11)'
+- bus: '00'
+  dev: '12'
+  fn: '0'
+  id: 18aa
+  name: 'PCI bridge: Intel Corporation Device 18aa (rev 11)'
+- bus: '00'
+  dev: '13'
+  fn: '0'
+  id: 18ab
+  name: 'PCI bridge: Intel Corporation Device 18ab (rev 11)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 18ad
+  name: 'PCI bridge: Intel Corporation Device 18ad (rev 11)'
+- bus: '00'
+  dev: '15'
+  fn: '0'
+  id: 18ae
+  name: 'PCI bridge: Intel Corporation Device 18ae (rev 11)'
+- bus: '00'
+  dev: '18'
+  fn: '0'
+  id: 18d3
+  name: 'Communication controller: Intel Corporation Device 18d3 (rev 11)'
+- bus: '00'
+  dev: '18'
+  fn: '1'
+  id: 18d4
+  name: 'Communication controller: Intel Corporation Device 18d4 (rev 11)'
+- bus: '00'
+  dev: '18'
+  fn: '4'
+  id: 18d6
+  name: 'Communication controller: Intel Corporation Device 18d6 (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '0'
+  id: 18d8
+  name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '1'
+  id: 18d8
+  name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '2'
+  id: 18d8
+  name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '3'
+  id: 18d9
+  name: 'Unassigned class [ff00]: Intel Corporation Device 18d9 (rev 11)'
+- bus: '00'
+  dev: 1d
+  fn: '0'
+  id: 0998
+  name: 'Host bridge: Intel Corporation Device 0998'
+- bus: '00'
+  dev: 1e
+  fn: '0'
+  id: 18d0
+  name: 'USB controller: Intel Corporation Device 18d0 (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: 18dc
+  name: 'ISA bridge: Intel Corporation Device 18dc (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '4'
+  id: 18df
+  name: 'SMBus: Intel Corporation Device 18df (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '5'
+  id: 18e0
+  name: 'Serial bus controller [0c80]: Intel Corporation Device 18e0 (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '7'
+  id: 18e1
+  name: 'Non-Essential Instrumentation [1300]: Intel Corporation Device 18e1 (rev
+    11)'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: 18ee
+  name: 'Co-processor: Intel Corporation Device 18ee (rev 11)'
+- bus: '06'
+  dev: '00'
+  fn: '0'
+  id: '7011'
+  name: 'Memory controller: Xilinx Corporation Device 7011'
+- bus: 08
+  dev: '00'
+  fn: '0'
+  id: '1533'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
+    03)'
+- bus: '14'
+  dev: '00'
+  fn: '0'
+  id: 09a2
+  name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)'
+- bus: '14'
+  dev: '00'
+  fn: '1'
+  id: 09a4
+  name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)'
+- bus: '14'
+  dev: '00'
+  fn: '2'
+  id: 09a3
+  name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)'
+- bus: '14'
+  dev: '00'
+  fn: '3'
+  id: 09a5
+  name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)'
+- bus: '14'
+  dev: '00'
+  fn: '4'
+  id: 0998
+  name: 'Host bridge: Intel Corporation Device 0998'
+- bus: '14'
+  dev: '02'
+  fn: '0'
+  id: 347a
+  name: 'PCI bridge: Intel Corporation Device 347a (rev 06)'
+- bus: '14'
+  dev: '03'
+  fn: '0'
+  id: 347b
+  name: 'PCI bridge: Intel Corporation Device 347b (rev 06)'
+- bus: '14'
+  dev: '04'
+  fn: '0'
+  id: 347c
+  name: 'PCI bridge: Intel Corporation Device 347c (rev 06)'
+- bus: '14'
+  dev: '05'
+  fn: '0'
+  id: 347d
+  name: 'PCI bridge: Intel Corporation Device 347d (rev 06)'
+- bus: '15'
+  dev: '00'
+  fn: '0'
+  id: f900
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device f900 (rev 11)'
+- bus: f3
+  dev: '00'
+  fn: '0'
+  id: 09a2
+  name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)'
+- bus: f3
+  dev: '00'
+  fn: '1'
+  id: 09a4
+  name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)'
+- bus: f3
+  dev: '00'
+  fn: '2'
+  id: 09a3
+  name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)'
+- bus: f3
+  dev: '00'
+  fn: '3'
+  id: 09a5
+  name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)'
+- bus: f3
+  dev: '00'
+  fn: '4'
+  id: 0998
+  name: 'Host bridge: Intel Corporation Device 0998'
+- bus: f3
+  dev: '04'
+  fn: '0'
+  id: 18d1
+  name: 'PCI bridge: Intel Corporation Device 18d1'
+- bus: f4
+  dev: '00'
+  fn: '0'
+  id: 124c
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane'
+- bus: f4
+  dev: '00'
+  fn: '1'
+  id: 124c
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane'
+- bus: f4
+  dev: '00'
+  fn: '2'
+  id: 124c
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane'
+- bus: f4
+  dev: '00'
+  fn: '3'
+  id: 124c
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane'
+- bus: fe
+  dev: '00'
+  fn: '0'
+  id: '3450'
+  name: 'System peripheral: Intel Corporation Device 3450'
+- bus: fe
+  dev: '00'
+  fn: '1'
+  id: '3451'
+  name: 'System peripheral: Intel Corporation Device 3451'
+- bus: fe
+  dev: '00'
+  fn: '2'
+  id: '3452'
+  name: 'System peripheral: Intel Corporation Device 3452'
+- bus: fe
+  dev: '00'
+  fn: '3'
+  id: 0998
+  name: 'Host bridge: Intel Corporation Device 0998'
+- bus: fe
+  dev: '00'
+  fn: '5'
+  id: '3455'
+  name: 'System peripheral: Intel Corporation Device 3455'
+- bus: fe
+  dev: 0b
+  fn: '0'
+  id: '3448'
+  name: 'System peripheral: Intel Corporation Device 3448'
+- bus: fe
+  dev: 0b
+  fn: '1'
+  id: '3448'
+  name: 'System peripheral: Intel Corporation Device 3448'
+- bus: fe
+  dev: 0b
+  fn: '2'
+  id: 344b
+  name: 'System peripheral: Intel Corporation Device 344b'
+- bus: fe
+  dev: 0c
+  fn: '0'
+  id: 344a
+  name: 'Performance counters: Intel Corporation Device 344a'
+- bus: fe
+  dev: 1a
+  fn: '0'
+  id: '2880'
+  name: 'Performance counters: Intel Corporation Device 2880'
+- bus: ff
+  dev: '00'
+  fn: '0'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: '00'
+  fn: '1'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: '00'
+  fn: '2'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: '00'
+  fn: '3'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: '00'
+  fn: '4'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: '00'
+  fn: '5'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: 0a
+  fn: '0'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 0a
+  fn: '1'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 0a
+  fn: '2'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 0a
+  fn: '3'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 0a
+  fn: '4'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 0a
+  fn: '5'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 1d
+  fn: '0'
+  id: 344f
+  name: 'System peripheral: Intel Corporation Device 344f'
+- bus: ff
+  dev: 1d
+  fn: '1'
+  id: '3457'
+  name: 'System peripheral: Intel Corporation Device 3457'
+- bus: ff
+  dev: 1e
+  fn: '0'
+  id: '3458'
+  name: 'System peripheral: Intel Corporation Device 3458 (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '1'
+  id: '3459'
+  name: 'System peripheral: Intel Corporation Device 3459 (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '2'
+  id: 345a
+  name: 'System peripheral: Intel Corporation Device 345a (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '3'
+  id: 345b
+  name: 'System peripheral: Intel Corporation Device 345b (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '4'
+  id: 345c
+  name: 'System peripheral: Intel Corporation Device 345c (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '5'
+  id: 345d
+  name: 'System peripheral: Intel Corporation Device 345d (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '6'
+  id: 345e
+  name: 'System peripheral: Intel Corporation Device 345e (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '7'
+  id: 345f
+  name: 'System peripheral: Intel Corporation Device 345f (rev 01)'
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform.json
new file mode 100644
index 000000000000..154b1abe6ffc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform.json
@@ -0,0 +1,1653 @@
+{
+    "chassis": {
+        "name": "M2-W6940-64OC",
+        "thermal_manager": false,
+        "status_led": {
+            "controllable": false,
+            "colors": ["green", "blinking_green", "amber", "blinking_amber"]
+        },
+        "components": [
+            {
+                "name": "CPU_CPLD"
+            },
+            {
+                "name": "CONNECT_CPLD"
+            },
+            {
+                "name": "MAC_CPLDA"
+            },
+            {
+                "name": "MAC_CPLDB"
+            },
+            {
+                "name": "MAC_CPLDC"
+            },
+            {
+                "name": "FAN_CPLD"
+            },
+            {
+                "name": "MGMT_CPLD"
+            },
+            {
+                "name": "MAC_FPGA"
+            },
+            {
+                "name": "BIOS"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fantray1_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray1_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray2_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray2_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray3_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray3_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray4_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray4_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            }
+        ],
+        "fan_drawers":[
+            {
+                "name": "Fantray1",
+                "num_fans" : 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray1_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray1_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray2",
+                "num_fans" : 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray2_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray2_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray3",
+                "num_fans" : 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray3_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray3_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray4",
+                "num_fans" : 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray4_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray4_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "Psu1",
+                "voltage": true,
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": true,
+                "voltage_low_threshold": true,
+                "temperature": true,
+                "fans_target_speed": true,
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "PSU1_FAN1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Psu2",
+                "voltage": true,
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": true,
+                "voltage_low_threshold": true,
+                "temperature": true,
+                "fans_target_speed": true,
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "PSU2_FAN1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "BOARD_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "CPU_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "INLET_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "OUTLET_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "ASIC_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "PSU1_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "PSU2_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "PSU3_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "PSU4_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            }
+        ],
+        "modules": [],
+        "sfps": []
+    },
+    "interfaces": {
+        "Ethernet1": {
+            "index": "0,0,0,0,0,0,0,0",
+            "lanes": "41,42,43,44,45,46,47,48",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth1"
+                ],
+                "2x400G": [
+                    "Eth1/1",
+                    "Eth1/2"
+                ],
+                "4x200G": [
+                    "Eth1/1",
+                    "Eth1/2",
+                    "Eth1/3",
+                    "Eth1/4"
+                ]
+            }
+        },
+        "Ethernet9": {
+            "index": "1,1,1,1,1,1,1,1",
+            "lanes": "33,34,35,36,37,38,39,40",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth2"
+                ],
+                "2x400G": [
+                    "Eth2/1",
+                    "Eth2/2"
+                ],
+                "4x200G": [
+                    "Eth2/1",
+                    "Eth2/2",
+                    "Eth2/3",
+                    "Eth2/4"
+                ]
+            }
+        },
+        "Ethernet17": {
+            "index": "2,2,2,2,2,2,2,2",
+            "lanes": "57,58,59,60,61,62,63,64",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth3"
+                ],
+                "2x400G": [
+                    "Eth3/1",
+                    "Eth3/2"
+                ],
+                "4x200G": [
+                    "Eth3/1",
+                    "Eth3/2",
+                    "Eth3/3",
+                    "Eth3/4"
+                ]
+            }
+        },
+        "Ethernet25": {
+            "index": "3,3,3,3,3,3,3,3",
+            "lanes": "49,50,51,52,53,54,55,56",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth4"
+                ],
+                "2x400G": [
+                    "Eth4/1",
+                    "Eth4/2"
+                ],
+                "4x200G": [
+                    "Eth4/1",
+                    "Eth4/2",
+                    "Eth4/3",
+                    "Eth4/4"
+                ]
+            }
+        },
+        "Ethernet33": {
+            "index": "4,4,4,4,4,4,4,4",
+            "lanes": "73,74,75,76,77,78,79,80",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth5"
+                ],
+                "2x400G": [
+                    "Eth5/1",
+                    "Eth5/2"
+                ],
+                "4x200G": [
+                    "Eth5/1",
+                    "Eth5/2",
+                    "Eth5/3",
+                    "Eth5/4"
+                ]
+            }
+        },
+        "Ethernet41": {
+            "index": "5,5,5,5,5,5,5,5",
+            "lanes": "65,66,67,68,69,70,71,72",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth6"
+                ],
+                "2x400G": [
+                    "Eth6/1",
+                    "Eth6/2"
+                ],
+                "4x200G": [
+                    "Eth6/1",
+                    "Eth6/2",
+                    "Eth6/3",
+                    "Eth6/4"
+                ]
+            }
+        },
+        "Ethernet49": {
+            "index": "6,6,6,6,6,6,6,6",
+            "lanes": "89,90,91,92,93,94,95,96",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth7"
+                ],
+                "2x400G": [
+                    "Eth7/1",
+                    "Eth7/2"
+                ],
+                "4x200G": [
+                    "Eth7/1",
+                    "Eth7/2",
+                    "Eth7/3",
+                    "Eth7/4"
+                ]
+            }
+        },
+        "Ethernet57": {
+            "index": "7,7,7,7,7,7,7,7",
+            "lanes": "81,82,83,84,85,86,87,88",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth8"
+                ],
+                "2x400G": [
+                    "Eth8/1",
+                    "Eth8/2"
+                ],
+                "4x200G": [
+                    "Eth8/1",
+                    "Eth8/2",
+                    "Eth8/3",
+                    "Eth8/4"
+                ]
+            }
+        },
+        "Ethernet65": {
+            "index": "8,8,8,8,8,8,8,8",
+            "lanes": "105,106,107,108,109,110,111,112",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth9"
+                ],
+                "2x400G": [
+                    "Eth9/1",
+                    "Eth9/2"
+                ],
+                "4x200G": [
+                    "Eth9/1",
+                    "Eth9/2",
+                    "Eth9/3",
+                    "Eth9/4"
+                ]
+            }
+        },
+        "Ethernet73": {
+            "index": "9,9,9,9,9,9,9,9",
+            "lanes": "97,98,99,100,101,102,103,104",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth10"
+                ],
+                "2x400G": [
+                    "Eth10/1",
+                    "Eth10/2"
+                ],
+                "4x200G": [
+                    "Eth10/1",
+                    "Eth10/2",
+                    "Eth10/3",
+                    "Eth10/4"
+                ]
+            }
+        },
+        "Ethernet81": {
+            "index": "10,10,10,10,10,10,10,10",
+            "lanes": "121,122,123,124,125,126,127,128",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth11"
+                ],
+                "2x400G": [
+                    "Eth11/1",
+                    "Eth11/2"
+                ],
+                "4x200G": [
+                    "Eth11/1",
+                    "Eth11/2",
+                    "Eth11/3",
+                    "Eth11/4"
+                ]
+            }
+        },
+        "Ethernet89": {
+            "index": "11,11,11,11,11,11,11,11",
+            "lanes": "113,114,115,116,117,118,119,120",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth12"
+                ],
+                "2x400G": [
+                    "Eth12/1",
+                    "Eth12/2"
+                ],
+                "4x200G": [
+                    "Eth12/1",
+                    "Eth12/2",
+                    "Eth12/3",
+                    "Eth12/4"
+                ]
+            }
+        },
+        "Ethernet97": {
+            "index": "12,12,12,12,12,12,12,12",
+            "lanes": "137,138,139,140,141,142,143,144",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth13"
+                ],
+                "2x400G": [
+                    "Eth13/1",
+                    "Eth13/2"
+                ],
+                "4x200G": [
+                    "Eth13/1",
+                    "Eth13/2",
+                    "Eth13/3",
+                    "Eth13/4"
+                ]
+            }
+        },
+        "Ethernet105": {
+            "index": "13,13,13,13,13,13,13,13",
+            "lanes": "129,130,131,132,133,134,135,136",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth14"
+                ],
+                "2x400G": [
+                    "Eth14/1",
+                    "Eth14/2"
+                ],
+                "4x200G": [
+                    "Eth14/1",
+                    "Eth14/2",
+                    "Eth14/3",
+                    "Eth14/4"
+                ]
+            }
+        },
+        "Ethernet113": {
+            "index": "14,14,14,14,14,14,14,14",
+            "lanes": "153,154,155,156,157,158,159,160",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth15"
+                ],
+                "2x400G": [
+                    "Eth15/1",
+                    "Eth15/2"
+                ],
+                "4x200G": [
+                    "Eth15/1",
+                    "Eth15/2",
+                    "Eth15/3",
+                    "Eth15/4"
+                ]
+            }
+        },
+        "Ethernet121": {
+            "index": "15,15,15,15,15,15,15,15",
+            "lanes": "145,146,147,148,149,150,151,152",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth16"
+                ],
+                "2x400G": [
+                    "Eth16/1",
+                    "Eth16/2"
+                ],
+                "4x200G": [
+                    "Eth16/1",
+                    "Eth16/2",
+                    "Eth16/3",
+                    "Eth16/4"
+                ]
+            }
+        },
+        "Ethernet129": {
+            "index": "16,16,16,16,16,16,16,16",
+            "lanes": "169,170,171,172,173,174,175,176",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth17"
+                ],
+                "2x400G": [
+                    "Eth17/1",
+                    "Eth17/2"
+                ],
+                "4x200G": [
+                    "Eth17/1",
+                    "Eth17/2",
+                    "Eth17/3",
+                    "Eth17/4"
+                ]
+            }
+        },
+        "Ethernet137": {
+            "index": "17,17,17,17,17,17,17,17",
+            "lanes": "161,162,163,164,165,166,167,168",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth18"
+                ],
+                "2x400G": [
+                    "Eth18/1",
+                    "Eth18/2"
+                ],
+                "4x200G": [
+                    "Eth18/1",
+                    "Eth18/2",
+                    "Eth18/3",
+                    "Eth18/4"
+                ]
+            }
+        },
+        "Ethernet145": {
+            "index": "18,18,18,18,18,18,18,18",
+            "lanes": "185,186,187,188,189,190,191,192",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth19"
+                ],
+                "2x400G": [
+                    "Eth19/1",
+                    "Eth19/2"
+                ],
+                "4x200G": [
+                    "Eth19/1",
+                    "Eth19/2",
+                    "Eth19/3",
+                    "Eth19/4"
+                ]
+            }
+        },
+        "Ethernet153": {
+            "index": "19,19,19,19,19,19,19,19",
+            "lanes": "177,178,179,180,181,182,183,184",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth20"
+                ],
+                "2x400G": [
+                    "Eth20/1",
+                    "Eth20/2"
+                ],
+                "4x200G": [
+                    "Eth20/1",
+                    "Eth20/2",
+                    "Eth20/3",
+                    "Eth20/4"
+                ]
+            }
+        },
+        "Ethernet161": {
+            "index": "20,20,20,20,20,20,20,20",
+            "lanes": "201,202,203,204,205,206,207,208",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth21"
+                ],
+                "2x400G": [
+                    "Eth21/1",
+                    "Eth21/2"
+                ],
+                "4x200G": [
+                    "Eth21/1",
+                    "Eth21/2",
+                    "Eth21/3",
+                    "Eth21/4"
+                ]
+            }
+        },
+        "Ethernet169": {
+            "index": "21,21,21,21,21,21,21,21",
+            "lanes": "193,194,195,196,197,198,199,200",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth22"
+                ],
+                "2x400G": [
+                    "Eth22/1",
+                    "Eth22/2"
+                ],
+                "4x200G": [
+                    "Eth22/1",
+                    "Eth22/2",
+                    "Eth22/3",
+                    "Eth22/4"
+                ]
+            }
+        },
+        "Ethernet177": {
+            "index": "22,22,22,22,22,22,22,22",
+            "lanes": "217,218,219,220,221,222,223,224",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth23"
+                ],
+                "2x400G": [
+                    "Eth23/1",
+                    "Eth23/2"
+                ],
+                "4x200G": [
+                    "Eth23/1",
+                    "Eth23/2",
+                    "Eth23/3",
+                    "Eth23/4"
+                ]
+            }
+        },
+        "Ethernet185": {
+            "index": "23,23,23,23,23,23,23,23",
+            "lanes": "209,210,211,212,213,214,215,216",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth24"
+                ],
+                "2x400G": [
+                    "Eth24/1",
+                    "Eth24/2"
+                ],
+                "4x200G": [
+                    "Eth24/1",
+                    "Eth24/2",
+                    "Eth24/3",
+                    "Eth24/4"
+                ]
+            }
+        },
+        "Ethernet193": {
+            "index": "24,24,24,24,24,24,24,24",
+            "lanes": "1,2,3,4,5,6,7,8",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth25"
+                ],
+                "2x400G": [
+                    "Eth25/1",
+                    "Eth25/2"
+                ],
+                "4x200G": [
+                    "Eth25/1",
+                    "Eth25/2",
+                    "Eth25/3",
+                    "Eth25/4"
+                ]
+            }
+        },
+        "Ethernet201": {
+            "index": "25,25,25,25,25,25,25,25",
+            "lanes": "9,10,11,12,13,14,15,16",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth26"
+                ],
+                "2x400G": [
+                    "Eth26/1",
+                    "Eth26/2"
+                ],
+                "4x200G": [
+                    "Eth26/1",
+                    "Eth26/2",
+                    "Eth26/3",
+                    "Eth26/4"
+                ]
+            }
+        },
+        "Ethernet209": {
+            "index": "26,26,26,26,26,26,26,26",
+            "lanes": "17,18,19,20,21,22,23,24",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth27"
+                ],
+                "2x400G": [
+                    "Eth27/1",
+                    "Eth27/2"
+                ],
+                "4x200G": [
+                    "Eth27/1",
+                    "Eth27/2",
+                    "Eth27/3",
+                    "Eth27/4"
+                ]
+            }
+        },
+        "Ethernet217": {
+            "index": "27,27,27,27,27,27,27,27",
+            "lanes": "25,26,27,28,29,30,31,32",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth28"
+                ],
+                "2x400G": [
+                    "Eth28/1",
+                    "Eth28/2"
+                ],
+                "4x200G": [
+                    "Eth28/1",
+                    "Eth28/2",
+                    "Eth28/3",
+                    "Eth28/4"
+                ]
+            }
+        },
+        "Ethernet225": {
+            "index": "28,28,28,28,28,28,28,28",
+            "lanes": "249,250,251,252,253,254,255,256",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth29"
+                ],
+                "2x400G": [
+                    "Eth29/1",
+                    "Eth29/2"
+                ],
+                "4x200G": [
+                    "Eth29/1",
+                    "Eth29/2",
+                    "Eth29/3",
+                    "Eth29/4"
+                ]
+            }
+        },
+        "Ethernet233": {
+            "index": "29,29,29,29,29,29,29,29",
+            "lanes": "241,242,243,244,245,246,247,248",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth30"
+                ],
+                "2x400G": [
+                    "Eth30/1",
+                    "Eth30/2"
+                ],
+                "4x200G": [
+                    "Eth30/1",
+                    "Eth30/2",
+                    "Eth30/3",
+                    "Eth30/4"
+                ]
+            }
+        },
+        "Ethernet241": {
+            "index": "30,30,30,30,30,30,30,30",
+            "lanes": "233,234,235,236,237,238,239,240",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth31"
+                ],
+                "2x400G": [
+                    "Eth31/1",
+                    "Eth31/2"
+                ],
+                "4x200G": [
+                    "Eth31/1",
+                    "Eth31/2",
+                    "Eth31/3",
+                    "Eth31/4"
+                ]
+            }
+        },
+        "Ethernet249": {
+            "index": "31,31,31,31,31,31,31,31",
+            "lanes": "225,226,227,228,229,230,231,232",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth32"
+                ],
+                "2x400G": [
+                    "Eth32/1",
+                    "Eth32/2"
+                ],
+                "4x200G": [
+                    "Eth32/1",
+                    "Eth32/2",
+                    "Eth32/3",
+                    "Eth32/4"
+                ]
+            }
+        },
+        "Ethernet257": {
+            "index": "32,32,32,32,32,32,32,32",
+            "lanes": "257,258,259,260,261,262,263,264",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth33"
+                ],
+                "2x400G": [
+                    "Eth33/1",
+                    "Eth33/2"
+                ],
+                "4x200G": [
+                    "Eth33/1",
+                    "Eth33/2",
+                    "Eth33/3",
+                    "Eth33/4"
+                ]
+            }
+        },
+        "Ethernet265": {
+            "index": "33,33,33,33,33,33,33,33",
+            "lanes": "265,266,267,268,269,270,271,272",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth34"
+                ],
+                "2x400G": [
+                    "Eth34/1",
+                    "Eth34/2"
+                ],
+                "4x200G": [
+                    "Eth34/1",
+                    "Eth34/2",
+                    "Eth34/3",
+                    "Eth34/4"
+                ]
+            }
+        },
+        "Ethernet273": {
+            "index": "34,34,34,34,34,34,34,34",
+            "lanes": "273,274,275,276,277,278,279,280",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth35"
+                ],
+                "2x400G": [
+                    "Eth35/1",
+                    "Eth35/2"
+                ],
+                "4x200G": [
+                    "Eth35/1",
+                    "Eth35/2",
+                    "Eth35/3",
+                    "Eth35/4"
+                ]
+            }
+        },
+        "Ethernet281": {
+            "index": "35,35,35,35,35,35,35,35",
+            "lanes": "281,282,283,284,285,286,287,288",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth36"
+                ],
+                "2x400G": [
+                    "Eth36/1",
+                    "Eth36/2"
+                ],
+                "4x200G": [
+                    "Eth36/1",
+                    "Eth36/2",
+                    "Eth36/3",
+                    "Eth36/4"
+                ]
+            }
+        },
+        "Ethernet289": {
+            "index": "36,36,36,36,36,36,36,36",
+            "lanes": "505,506,507,508,509,510,511,512",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth37"
+                ],
+                "2x400G": [
+                    "Eth37/1",
+                    "Eth37/2"
+                ],
+                "4x200G": [
+                    "Eth37/1",
+                    "Eth37/2",
+                    "Eth37/3",
+                    "Eth37/4"
+                ]
+            }
+        },
+        "Ethernet297": {
+            "index": "37,37,37,37,37,37,37,37",
+            "lanes": "497,498,499,500,501,502,503,504",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth38"
+                ],
+                "2x400G": [
+                    "Eth38/1",
+                    "Eth38/2"
+                ],
+                "4x200G": [
+                    "Eth38/1",
+                    "Eth38/2",
+                    "Eth38/3",
+                    "Eth38/4"
+                ]
+            }
+        },
+        "Ethernet305": {
+            "index": "38,38,38,38,38,38,38,38",
+            "lanes": "489,490,491,492,493,494,495,496",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth39"
+                ],
+                "2x400G": [
+                    "Eth39/1",
+                    "Eth39/2"
+                ],
+                "4x200G": [
+                    "Eth39/1",
+                    "Eth39/2",
+                    "Eth39/3",
+                    "Eth39/4"
+                ]
+            }
+        },
+        "Ethernet313": {
+            "index": "39,39,39,39,39,39,39,39",
+            "lanes": "481,482,483,484,485,486,487,488",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth40"
+                ],
+                "2x400G": [
+                    "Eth40/1",
+                    "Eth40/2"
+                ],
+                "4x200G": [
+                    "Eth40/1",
+                    "Eth40/2",
+                    "Eth40/3",
+                    "Eth40/4"
+                ]
+            }
+        },
+        "Ethernet321": {
+            "index": "40,40,40,40,40,40,40,40",
+            "lanes": "297,298,299,300,301,302,303,304",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth41"
+                ],
+                "2x400G": [
+                    "Eth41/1",
+                    "Eth41/2"
+                ],
+                "4x200G": [
+                    "Eth41/1",
+                    "Eth41/2",
+                    "Eth41/3",
+                    "Eth41/4"
+                ]
+            }
+        },
+        "Ethernet329": {
+            "index": "41,41,41,41,41,41,41,41",
+            "lanes": "289,290,291,292,293,294,295,296",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth42"
+                ],
+                "2x400G": [
+                    "Eth42/1",
+                    "Eth42/2"
+                ],
+                "4x200G": [
+                    "Eth42/1",
+                    "Eth42/2",
+                    "Eth42/3",
+                    "Eth42/4"
+                ]
+            }
+        },
+        "Ethernet337": {
+            "index": "42,42,42,42,42,42,42,42",
+            "lanes": "313,314,315,316,317,318,319,320",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth43"
+                ],
+                "2x400G": [
+                    "Eth43/1",
+                    "Eth43/2"
+                ],
+                "4x200G": [
+                    "Eth43/1",
+                    "Eth43/2",
+                    "Eth43/3",
+                    "Eth43/4"
+                ]
+            }
+        },
+        "Ethernet345": {
+            "index": "43,43,43,43,43,43,43,43",
+            "lanes": "305,306,307,308,309,310,311,312",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth44"
+                ],
+                "2x400G": [
+                    "Eth44/1",
+                    "Eth44/2"
+                ],
+                "4x200G": [
+                    "Eth44/1",
+                    "Eth44/2",
+                    "Eth44/3",
+                    "Eth44/4"
+                ]
+            }
+        },
+        "Ethernet353": {
+            "index": "44,44,44,44,44,44,44,44",
+            "lanes": "329,330,331,332,333,334,335,336",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth45"
+                ],
+                "2x400G": [
+                    "Eth45/1",
+                    "Eth45/2"
+                ],
+                "4x200G": [
+                    "Eth45/1",
+                    "Eth45/2",
+                    "Eth45/3",
+                    "Eth45/4"
+                ]
+            }
+        },
+        "Ethernet361": {
+            "index": "45,45,45,45,45,45,45,45",
+            "lanes": "321,322,323,324,325,326,327,328",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth46"
+                ],
+                "2x400G": [
+                    "Eth46/1",
+                    "Eth46/2"
+                ],
+                "4x200G": [
+                    "Eth46/1",
+                    "Eth46/2",
+                    "Eth46/3",
+                    "Eth46/4"
+                ]
+            }
+        },
+        "Ethernet369": {
+            "index": "46,46,46,46,46,46,46,46",
+            "lanes": "345,346,347,348,349,350,351,352",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth47"
+                ],
+                "2x400G": [
+                    "Eth47/1",
+                    "Eth47/2"
+                ],
+                "4x200G": [
+                    "Eth47/1",
+                    "Eth47/2",
+                    "Eth47/3",
+                    "Eth47/4"
+                ]
+            }
+        },
+        "Ethernet377": {
+            "index": "47,47,47,47,47,47,47,47",
+            "lanes": "337,338,339,340,341,342,343,344",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth48"
+                ],
+                "2x400G": [
+                    "Eth48/1",
+                    "Eth48/2"
+                ],
+                "4x200G": [
+                    "Eth48/1",
+                    "Eth48/2",
+                    "Eth48/3",
+                    "Eth48/4"
+                ]
+            }
+        },
+        "Ethernet385": {
+            "index": "48,48,48,48,48,48,48,48",
+            "lanes": "361,362,363,364,365,366,367,368",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth49"
+                ],
+                "2x400G": [
+                    "Eth49/1",
+                    "Eth49/2"
+                ],
+                "4x200G": [
+                    "Eth49/1",
+                    "Eth49/2",
+                    "Eth49/3",
+                    "Eth49/4"
+                ]
+            }
+        },
+        "Ethernet393": {
+            "index": "49,49,49,49,49,49,49,49",
+            "lanes": "353,354,355,356,357,358,359,360",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth50"
+                ],
+                "2x400G": [
+                    "Eth50/1",
+                    "Eth50/2"
+                ],
+                "4x200G": [
+                    "Eth50/1",
+                    "Eth50/2",
+                    "Eth50/3",
+                    "Eth50/4"
+                ]
+            }
+        },
+        "Ethernet401": {
+            "index": "50,50,50,50,50,50,50,50",
+            "lanes": "377,378,379,380,381,382,383,384",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth51"
+                ],
+                "2x400G": [
+                    "Eth51/1",
+                    "Eth51/2"
+                ],
+                "4x200G": [
+                    "Eth51/1",
+                    "Eth51/2",
+                    "Eth51/3",
+                    "Eth51/4"
+                ]
+            }
+        },
+        "Ethernet409": {
+            "index": "51,51,51,51,51,51,51,51",
+            "lanes": "369,370,371,372,373,374,375,376",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth52"
+                ],
+                "2x400G": [
+                    "Eth52/1",
+                    "Eth52/2"
+                ],
+                "4x200G": [
+                    "Eth52/1",
+                    "Eth52/2",
+                    "Eth52/3",
+                    "Eth52/4"
+                ]
+            }
+        },
+        "Ethernet417": {
+            "index": "52,52,52,52,52,52,52,52",
+            "lanes": "393,394,395,396,397,398,399,400",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth53"
+                ],
+                "2x400G": [
+                    "Eth53/1",
+                    "Eth53/2"
+                ],
+                "4x200G": [
+                    "Eth53/1",
+                    "Eth53/2",
+                    "Eth53/3",
+                    "Eth53/4"
+                ]
+            }
+        },
+        "Ethernet425": {
+            "index": "53,53,53,53,53,53,53,53",
+            "lanes": "385,386,387,388,389,390,391,392",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth54"
+                ],
+                "2x400G": [
+                    "Eth54/1",
+                    "Eth54/2"
+                ],
+                "4x200G": [
+                    "Eth54/1",
+                    "Eth54/2",
+                    "Eth54/3",
+                    "Eth54/4"
+                ]
+            }
+        },
+        "Ethernet433": {
+            "index": "54,54,54,54,54,54,54,54",
+            "lanes": "409,410,411,412,413,414,415,416",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth55"
+                ],
+                "2x400G": [
+                    "Eth55/1",
+                    "Eth55/2"
+                ],
+                "4x200G": [
+                    "Eth55/1",
+                    "Eth55/2",
+                    "Eth55/3",
+                    "Eth55/4"
+                ]
+            }
+        },
+        "Ethernet441": {
+            "index": "55,55,55,55,55,55,55,55",
+            "lanes": "401,402,403,404,405,406,407,408",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth56"
+                ],
+                "2x400G": [
+                    "Eth56/1",
+                    "Eth56/2"
+                ],
+                "4x200G": [
+                    "Eth56/1",
+                    "Eth56/2",
+                    "Eth56/3",
+                    "Eth56/4"
+                ]
+            }
+        },
+        "Ethernet449": {
+            "index": "56,56,56,56,56,56,56,56",
+            "lanes": "425,426,427,428,429,430,431,432",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth57"
+                ],
+                "2x400G": [
+                    "Eth57/1",
+                    "Eth57/2"
+                ],
+                "4x200G": [
+                    "Eth57/1",
+                    "Eth57/2",
+                    "Eth57/3",
+                    "Eth57/4"
+                ]
+            }
+        },
+        "Ethernet457": {
+            "index": "57,57,57,57,57,57,57,57",
+            "lanes": "417,418,419,420,421,422,423,424",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth58"
+                ],
+                "2x400G": [
+                    "Eth58/1",
+                    "Eth58/2"
+                ],
+                "4x200G": [
+                    "Eth58/1",
+                    "Eth58/2",
+                    "Eth58/3",
+                    "Eth58/4"
+                ]
+            }
+        },
+        "Ethernet465": {
+            "index": "58,58,58,58,58,58,58,58",
+            "lanes": "441,442,443,444,445,446,447,448",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth59"
+                ],
+                "2x400G": [
+                    "Eth59/1",
+                    "Eth59/2"
+                ],
+                "4x200G": [
+                    "Eth59/1",
+                    "Eth59/2",
+                    "Eth59/3",
+                    "Eth59/4"
+                ]
+            }
+        },
+        "Ethernet473": {
+            "index": "59,59,59,59,59,59,59,59",
+            "lanes": "433,434,435,436,437,438,439,440",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth60"
+                ],
+                "2x400G": [
+                    "Eth60/1",
+                    "Eth60/2"
+                ],
+                "4x200G": [
+                    "Eth60/1",
+                    "Eth60/2",
+                    "Eth60/3",
+                    "Eth60/4"
+                ]
+            }
+        },
+        "Ethernet481": {
+            "index": "60,60,60,60,60,60,60,60",
+            "lanes": "457,458,459,460,461,462,463,464",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth61"
+                ],
+                "2x400G": [
+                    "Eth61/1",
+                    "Eth61/2"
+                ],
+                "4x200G": [
+                    "Eth61/1",
+                    "Eth61/2",
+                    "Eth61/3",
+                    "Eth61/4"
+                ]
+            }
+        },
+        "Ethernet489": {
+            "index": "61,61,61,61,61,61,61,61",
+            "lanes": "449,450,451,452,453,454,455,456",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth62"
+                ],
+                "2x400G": [
+                    "Eth62/1",
+                    "Eth62/2"
+                ],
+                "4x200G": [
+                    "Eth62/1",
+                    "Eth62/2",
+                    "Eth62/3",
+                    "Eth62/4"
+                ]
+            }
+        },
+        "Ethernet497": {
+            "index": "62,62,62,62,62,62,62,62",
+            "lanes": "473,474,475,476,477,478,479,480",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth63"
+                ],
+                "2x400G": [
+                    "Eth63/1",
+                    "Eth63/2"
+                ],
+                "4x200G": [
+                    "Eth63/1",
+                    "Eth63/2",
+                    "Eth63/3",
+                    "Eth63/4"
+                ]
+            }
+        },
+        "Ethernet505": {
+            "index": "63,63,63,63,63,63,63,63",
+            "lanes": "465,466,467,468,469,470,471,472",
+            "breakout_modes": {
+                "1x800G": [
+                    "Eth64"
+                ],
+                "2x400G": [
+                    "Eth64/1",
+                    "Eth64/2"
+                ],
+                "4x200G": [
+                    "Eth64/1",
+                    "Eth64/2",
+                    "Eth64/3",
+                    "Eth64/4"
+                ]
+            }
+        },
+        "Ethernet513": {
+            "index": "64",
+            "lanes": "513",
+            "breakout_modes": {
+                "1x25G": [
+                    "Eth65"
+                ]
+            }
+        },
+        "Ethernet515": {
+            "index": "65",
+            "lanes": "515",
+            "breakout_modes": {
+                "1x25G": [
+                    "Eth66"
+                ]
+            }
+        }
+    }
+}
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_asic b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_asic
new file mode 100644
index 000000000000..960467652765
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_components.json
new file mode 100644
index 000000000000..fa01608f8972
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_components.json
@@ -0,0 +1,18 @@
+{
+    "chassis": {
+        "M2-W6940-64OC": {
+            "component": {
+                "CPU_CPLD": { },
+                "CONNECT_CPLD": { },
+                "MAC_CPLDA": { },
+                "MAC_CPLDB": { },
+                "MAC_CPLDC": { },
+                "MGMT_CPLD": { },
+                "FAN_CPLD": { },
+                "MAC_FPGA": { },
+                "BIOS": { }
+            }
+        }
+    }
+}
+
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_env.conf b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_env.conf
new file mode 100644
index 000000000000..fc119184d5c1
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/platform_env.conf
@@ -0,0 +1,2 @@
+is_ltsw_chip=1
+SYNCD_SHM_SIZE=1g
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/sfputil.py
new file mode 100644
index 000000000000..c26bc0c53f61
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/sfputil.py
@@ -0,0 +1,376 @@
+# sfputil.py
+#
+# Platform-specific SFP transceiver interface for SONiC
+#
+
+try:
+    import time
+    import os
+    import traceback
+    import subprocess
+    from ctypes import create_string_buffer
+    from sonic_sfp.sfputilbase import SfpUtilBase
+    from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom
+except ImportError as e:
+    raise ImportError("%s - required module not found" % str(e))
+
+class SfpUtil(SfpUtilBase):
+    """Platform-specific SfpUtil class"""
+
+    PORT_START = 0
+    PORT_END = 65
+    PORTS_IN_BLOCK = 66
+
+    EEPROM_OFFSET = 106
+    SFP_DEVICE_TYPE = "optoe2"
+    QSFP_DEVICE_TYPE = "optoe1"
+    QSFP_DD_DEVICE_TYPE = "optoe3"
+    I2C_MAX_ATTEMPT = 3
+
+    OPTOE_TYPE1 = 1
+    OPTOE_TYPE2 = 2
+    OPTOE_TYPE3 = 3
+
+    SFP_STATUS_INSERTED = '1'
+    SFP_STATUS_REMOVED = '0'
+
+    _port_to_eeprom_mapping = {}
+    port_to_i2cbus_mapping ={}
+    port_dict = {}
+
+    qsfp_ports_list = []
+    qsfp_dd_ports_list = []
+
+    @property
+    def port_start(self):
+        return self.PORT_START
+
+    @property
+    def port_end(self):
+        return self.PORT_END
+
+    @property
+    def qsfp_ports(self):
+        return self.qsfp_ports_list
+
+    @property
+    def qsfp_dd_ports(self):
+        return self.qsfp_dd_ports_list
+
+    @property
+    def port_to_eeprom_mapping(self):
+        return self._port_to_eeprom_mapping
+
+    def __init__(self):
+        for x in range(self.PORT_START, self.PORTS_IN_BLOCK-2):
+            self.port_to_i2cbus_mapping[x] = (x + self.EEPROM_OFFSET)
+        self.port_to_i2cbus_mapping[64] = 59
+        self.port_to_i2cbus_mapping[65] = 60
+        self.update_ports_list()
+
+        SfpUtilBase.__init__(self)
+
+    def _sfp_read_file_path(self, file_path, offset, num_bytes):
+        attempts = 0
+        while attempts < self.I2C_MAX_ATTEMPT:
+            try:
+                file_path.seek(offset)
+                read_buf = file_path.read(num_bytes)
+            except:
+                attempts += 1
+                time.sleep(0.05)
+            else:
+                return True, read_buf
+        return False, None
+
+    def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset):
+        """Tries to read the eeprom file to determine if the
+        device/sfp is present or not. If sfp present, the read returns
+        valid bytes. If not, read returns error 'Connection timed out"""
+
+        if not os.path.exists(sysfs_sfp_i2c_client_eeprompath):
+            return False
+        else:
+            with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile:
+                rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1)
+                return rv
+
+    def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype):
+        try:
+            sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path
+
+            # Write device address to new_device file
+            nd_file = open(sysfs_nd_path, "w")
+            nd_str = "%s %s" % (devtype, hex(devaddr))
+            nd_file.write(nd_str)
+            nd_file.close()
+
+        except Exception as err:
+            print("Error writing to new device file: %s" % str(err))
+            return 1
+        else:
+            return 0
+
+    def _get_port_eeprom_path(self, port_num, devid):
+        sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+        if port_num in self.port_to_eeprom_mapping.keys():
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num]
+        else:
+            sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+            i2c_adapter_id = self._get_port_i2c_adapter_id(port_num)
+            if i2c_adapter_id is None:
+                print("Error getting i2c bus num")
+                return None
+
+            # Get i2c virtual bus path for the sfp
+            sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path,
+                                                        str(i2c_adapter_id))
+
+            # If i2c bus for port does not exist
+            if not os.path.exists(sysfs_sfp_i2c_adapter_path):
+                print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path)
+                return None
+
+            sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path,
+                                                        str(i2c_adapter_id),
+                                                        hex(devid)[-2:])
+
+            # If sfp device is not present on bus, Add it
+            if not os.path.exists(sysfs_sfp_i2c_client_path):
+                if port_num in self.qsfp_dd_ports:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DD_DEVICE_TYPE)
+                elif port_num in self.qsfp_ports:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE)
+                else:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE)
+                if ret != 0:
+                    print("Error adding sfp device")
+                    return None
+
+            sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path
+
+        return sysfs_sfp_i2c_client_eeprom_path
+
+    def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes):
+        eeprom_raw = []
+        for i in range(0, num_bytes):
+            eeprom_raw.append("0x00")
+
+        rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes)
+        if rv == False:
+            return None
+
+        try:
+            if len(raw) == 0:
+                return None
+            for n in range(0, num_bytes):
+                eeprom_raw[n] = hex(raw[n])[2:].zfill(2)
+        except:
+            return None
+
+        return eeprom_raw
+
+    def get_eeprom_dom_raw(self, port_num):
+        if port_num in self.qsfp_ports:
+            # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw
+            return None
+        else:
+            # Read dom eeprom at addr 0x51
+            return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256)
+
+    def get_presence(self, port_num):
+        # Check for invalid port_num
+        if port_num < self.port_start or port_num > self.port_end:
+            return False
+        cmd = "cat /sys/s3ip/transceiver/eth{}/present".format(str(port_num + 1))
+        ret, output = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            return False
+        if output == "1":
+            return True
+        return False
+
+    def check_is_qsfpdd(self, port_num):
+        try:
+            if self.get_presence(port_num) == False:
+                return False
+
+            eeprom_path = self._get_port_eeprom_path(port_num, 0x50)
+            with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+                eeprom_raw = self._read_eeprom_specific_bytes(eeprom, 0, 1)
+                if eeprom_raw is None:
+                    return False
+                # according to sff-8024 A0h Byte 0 is '1e','18' or '19' means the transceiver is qsfpdd,
+                if (eeprom_raw[0] == '1e' or eeprom_raw[0] == '18' or eeprom_raw[0] == '19'):
+                    return True
+        except Exception as e:
+            print(traceback.format_exc())
+
+        return False
+
+    def check_optoe_type(self, port_num, optoe_type):
+        if self.get_presence(port_num) == False:
+            return True
+        try:
+            eeprom_path = self._get_port_eeprom_path(port_num, 0x50)
+            dev_class_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/dev_class'
+            i2c_path = dev_class_path.format(str(self.port_to_i2cbus_mapping[port_num]))
+            cmd = "cat " + i2c_path
+            ret, output = subprocess.getstatusoutput(cmd)
+            if ret != 0:
+                print("cmd: %s execution fail, output:%s" % (cmd, output))
+                return False
+            if int(output) != optoe_type:
+                cmd = "echo " + str(optoe_type) + " > " + i2c_path
+                ret, output = subprocess.getstatusoutput(cmd)
+                if ret != 0:
+                    print("cmd: %s execution fail, output:%s" % (cmd, output))
+                    return False
+            return True
+
+        except Exception as e:
+            print(traceback.format_exc())
+            return False
+
+    def update_ports_list(self):
+        self.qsfp_ports_list = []
+        self.qsfp_dd_ports_list = []
+        for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+            if (self.check_is_qsfpdd(x)):
+                self.qsfp_dd_ports_list.append(x)
+            else:
+                self.qsfp_ports_list.append(x)
+
+    def get_low_power_mode(self, port_num):
+        # Check for invalid port_num
+
+        return True
+
+    def set_low_power_mode(self, port_num, lpmode):
+        # Check for invalid port_num
+
+        return True
+
+    def reset(self, port_num):
+        # Check for invalid port_num
+        if port_num < self.port_start or port_num > self.port_end:
+            return False
+
+        return True
+
+    def get_transceiver_change_event(self, timeout=0):
+
+        start_time = time.time()
+        current_port_dict = {}
+        forever = False
+
+        if timeout == 0:
+            forever = True
+        elif timeout > 0:
+            timeout = timeout / float(1000) # Convert to secs
+        else:
+            print ("get_transceiver_change_event:Invalid timeout value", timeout)
+            return False, {}
+
+        end_time = start_time + timeout
+        if start_time > end_time:
+            print ('get_transceiver_change_event:' \
+                       'time wrap / invalid timeout value', timeout)
+
+            return False, {} # Time wrap or possibly incorrect timeout
+
+        while timeout >= 0:
+            # Check for OIR events and return updated port_dict
+            for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+                if self.get_presence(x):
+                    current_port_dict[x] = self.SFP_STATUS_INSERTED
+                else:
+                    current_port_dict[x] = self.SFP_STATUS_REMOVED
+            if (current_port_dict == self.port_dict):
+                if forever:
+                    time.sleep(1)
+                else:
+                    timeout = end_time - time.time()
+                    if timeout >= 1:
+                        time.sleep(1) # We poll at 1 second granularity
+                    else:
+                        if timeout > 0:
+                            time.sleep(timeout)
+                        self.update_ports_list()
+                        return True, {}
+            else:
+                # Update reg value
+                self.update_ports_list()
+                self.port_dict = current_port_dict
+                return True, self.port_dict
+        print ("get_transceiver_change_event: Should not reach here.")
+        return False, {}
+
+    def _twos_comp(self, num, bits):
+        try:
+            if ((num & (1 << (bits - 1))) != 0):
+                num = num - (1 << bits)
+            return num
+        except:
+            return 0
+
+    def get_highest_temperature(self):
+        offset = 0
+        hightest_temperature = -9999
+
+        presence_flag = False
+        read_eeprom_flag = False
+        temperature_valid_flag = False
+
+        for port in range(self.PORT_START, self.PORTS_IN_BLOCK):
+            if self.get_presence(port) == False:
+                continue
+
+            presence_flag = True
+
+            if port in self.qsfp_dd_ports:
+                offset = 14
+            elif port in self.qsfp_ports:
+                offset = 22
+            else:
+                offset = 96
+
+            eeprom_path = self._get_port_eeprom_path(port, 0x50)
+            try:
+                with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+                    read_eeprom_flag = True
+                    eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2)
+                    if len(eeprom_raw) != 0:
+                        msb = int(eeprom_raw[0], 16)
+                        lsb = int(eeprom_raw[1], 16)
+
+                        result = (msb << 8) | (lsb & 0xff)
+                        result = self._twos_comp(result, 16)
+                        result = float(result / 256.0)
+                        if -50 <= result <= 200:
+                            temperature_valid_flag = True
+                            if hightest_temperature < result:
+                                hightest_temperature = result
+            except Exception as e:
+                pass
+
+        # all port not presence
+        if presence_flag == False:
+            hightest_temperature = -10000
+
+        # all port read eeprom fail
+        elif read_eeprom_flag == False:
+            hightest_temperature = -9999
+
+        # all port temperature invalid
+        elif read_eeprom_flag == True and temperature_valid_flag == False:
+            hightest_temperature = -10000
+
+        hightest_temperature = round(hightest_temperature, 2)
+
+        return hightest_temperature
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/ssd_util.py
new file mode 100644
index 000000000000..e8cf2e1a7cbc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/plugins/ssd_util.py
@@ -0,0 +1,318 @@
+#
+# ssd_util.py
+#
+# Generic implementation of the SSD health API
+# SSD models supported:
+#  - InnoDisk
+#  - StorFly
+#  - Virtium
+
+try:
+    import re
+    import os
+    import subprocess
+    from sonic_platform_base.sonic_storage.storage_base import StorageBase
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+SMARTCTL = "smartctl {} -a"
+INNODISK = "iSmart -d {}"
+VIRTIUM  = "SmartCmd -m {}"
+DISK_LIST_CMD = "fdisk -l -o Device"
+DISK_FREE_CMD = "df -h"
+MOUNT_CMD = "mount"
+
+NOT_AVAILABLE = "N/A"
+PE_CYCLE = 3000
+FAIL_PERCENT = 95
+
+# Set Vendor Specific IDs
+INNODISK_HEALTH_ID = 169
+INNODISK_TEMPERATURE_ID = 194
+
+class SsdUtil(StorageBase):
+    """
+    Generic implementation of the SSD health API
+    """
+    model = NOT_AVAILABLE
+    serial = NOT_AVAILABLE
+    firmware = NOT_AVAILABLE
+    temperature = NOT_AVAILABLE
+    health = NOT_AVAILABLE
+    remaining_life = NOT_AVAILABLE
+    sata_rate = NOT_AVAILABLE
+    ssd_info = NOT_AVAILABLE
+    vendor_ssd_info = NOT_AVAILABLE
+
+    def __init__(self, diskdev):
+        self.vendor_ssd_utility = {
+            "Generic"  : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info },
+            "InnoDisk" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+            "M.2"      : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+            "StorFly"  : { "utility" : VIRTIUM,  "parser" : self.parse_virtium_info },
+            "Virtium"  : { "utility" : VIRTIUM,  "parser" : self.parse_virtium_info }
+        }
+
+        """
+        The dict model_attr keys relate the vendors
+        LITEON : "ER2-GD","AF2MA31DTDLT"
+        Intel  : "SSDSCKKB"
+        SMI    : "SM619GXC"
+        samsung: "MZNLH"
+        ADATA  : "IM2S3134N"
+        """
+        self.model_attr = {
+             "ER2-GD"       : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+             "AF2MA31DTDLT" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+             "SSDSCK"       : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n233\s+(.+?)\n" },
+             "SM619GXC"     : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n169\s+(.+?)\n" },
+             "MZNLH"        : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n245\s+(.+?)\n" },
+             "IM2S3134N"    : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n231\s+(.+?)\n" },
+             "MTFDDAV240TCB-1AR1ZABAA"    : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }
+        }
+
+        self.key_list = list(self.model_attr.keys())
+        self.attr_info_rule = "[\s\S]*SMART Attributes Data Structure revision number: 1|SMART Error Log Version[\s\S]*"
+        self.dev = diskdev
+        # Generic part
+        self.fetch_generic_ssd_info(diskdev)
+        self.parse_generic_ssd_info()
+        self.fetch_vendor_ssd_info(diskdev, "Generic")
+        
+        # Known vendor part
+        if self.model:
+            model_short = self.model.split()[0]
+            if model_short in self.vendor_ssd_utility:
+                self.fetch_vendor_ssd_info(diskdev, model_short)
+                self.parse_vendor_ssd_info(model_short)
+            else:
+                # No handler registered for this disk model
+                pass
+        else:
+            # Failed to get disk model
+            self.model = "Unknown"
+
+    def _execute_shell(self, cmd):
+        process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE)
+        output, error = process.communicate()
+        exit_code = process.returncode
+        if exit_code:
+            return None
+        return output
+
+    def _parse_re(self, pattern, buffer):
+        res_list = re.findall(pattern, str(buffer))
+        return res_list[0] if res_list else NOT_AVAILABLE
+
+    def fetch_generic_ssd_info(self, diskdev):
+        self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev))
+
+    # Health and temperature values may be overwritten with vendor specific data
+    def parse_generic_ssd_info(self):
+        if "nvme" in self.dev:
+            self.model = self._parse_re('Model Number:\s*(.+?)\n', self.ssd_info)
+
+            health_raw = self._parse_re('Percentage Used\s*(.+?)\n', self.ssd_info)
+            if health_raw == NOT_AVAILABLE:
+                self.health = NOT_AVAILABLE
+            else:
+                health_raw = health_raw.split()[-1]
+                self.health = 100 - float(health_raw.strip('%'))
+
+            temp_raw = self._parse_re('Temperature\s*(.+?)\n', self.ssd_info)
+            if temp_raw == NOT_AVAILABLE:
+                self.temperature = NOT_AVAILABLE
+            else:
+                temp_raw = temp_raw.split()[-2]
+                self.temperature = float(temp_raw)
+        else:
+            self.model = self._parse_re('Device Model:\s*(.+?)\n', self.ssd_info)
+            model_key = ""
+            for key in self.key_list:
+                if re.search(key, self.model):
+                    model_key = key
+                    break
+            if  model_key != "":
+                self.remaining_life = self._parse_re(self.model_attr[model_key]["remainingLife"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[2]
+                self.temperature = self._parse_re(self.model_attr[model_key]["temperature"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[8]
+                self.health = self.remaining_life
+            # Get the LITEON ssd health value by (PE CYCLE - AVG ERASE CYCLE )/(PE CYCLE)
+            if model_key in ["ER2-GD", "AF2MA31DTDLT"]:
+                avg_erase = int(self._parse_re('\n173\s+(.+?)\n' ,re.sub(self.attr_info_rule,"",self.ssd_info)).split()[-1])
+                self.health = int(round((PE_CYCLE - avg_erase)/PE_CYCLE*100,0))
+            if self.remaining_life != NOT_AVAILABLE and  int(self.remaining_life) < FAIL_PERCENT:
+                self.remaining_life = "Fail"
+        self.sata_rate = self._parse_re('SATA Version is:.*current: (.+?)\)\n', self.ssd_info)
+        self.serial = self._parse_re('Serial Number:\s*(.+?)\n', self.ssd_info)
+        self.firmware = self._parse_re('Firmware Version:\s*(.+?)\n', self.ssd_info)
+
+    def parse_innodisk_info(self):
+        if self.vendor_ssd_info:
+            self.health = self._parse_re('Health:\s*(.+?)%', self.vendor_ssd_info)
+            self.temperature = self._parse_re('Temperature\s*\[\s*(.+?)\]', self.vendor_ssd_info)
+        else:
+            if self.health == NOT_AVAILABLE:
+                health_raw = self.parse_id_number(INNODISK_HEALTH_ID)
+                self.health = health_raw.split()[-1]
+            if self.temperature == NOT_AVAILABLE:
+                temp_raw = self.parse_id_number(INNODISK_TEMPERATURE_ID)
+                self.temperature = temp_raw.split()[-6]
+
+    def parse_virtium_info(self):
+        if self.vendor_ssd_info:
+            self.temperature = self._parse_re('Temperature_Celsius\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            nand_endurance = self._parse_re('NAND_Endurance\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            avg_erase_count = self._parse_re('Average_Erase_Count\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            try:
+                self.health = 100 - (float(avg_erase_count) * 100 / float(nand_endurance))
+            except (ValueError, ZeroDivisionError):
+                # Invalid avg_erase_count or nand_endurance.
+                pass
+
+    def fetch_vendor_ssd_info(self, diskdev, model):
+        self.vendor_ssd_info = self._execute_shell(self.vendor_ssd_utility[model]["utility"].format(diskdev))
+
+    def parse_vendor_ssd_info(self, model):
+        self.vendor_ssd_utility[model]["parser"]()
+
+    def check_readonly2(self, partition, filesystem):
+        # parse mount cmd output info
+        mount_info = self._execute_shell(MOUNT_CMD)
+        for line in mount_info.split('\n'):
+            column_list = line.split()
+            if line == '':
+                continue
+            if column_list[0] == partition and column_list[2] == filesystem:
+                if column_list[5].split(',')[0][1:] == "ro":
+                    return partition
+                else:
+                    return NOT_AVAILABLE
+        return NOT_AVAILABLE
+
+    def check_readonly(self, partition, filesystem):
+        ret = os.access(filesystem, os.W_OK)
+        if ret == False:
+            return partition
+        else:
+            return NOT_AVAILABLE
+        
+    def get_health(self):
+        """
+        Retrieves current disk health in percentages
+
+        Returns:
+            A float number of current ssd health
+            e.g. 83.5
+        """
+        if self.health == 'N/A':
+            return "NA"
+        else:
+            return float(self.health)
+
+    def get_temperature(self):
+        """
+        Retrieves current disk temperature in Celsius
+
+        Returns:
+            A float number of current temperature in Celsius
+            e.g. 40.1
+        """
+        if self.temperature == 'N/A':
+            return 'NA'
+        else:
+            return float(self.temperature)
+
+    def get_model(self):
+        """
+        Retrieves model for the given disk device
+
+        Returns:
+            A string holding disk model as provided by the manufacturer
+        """
+        return self.model
+
+    def get_firmware(self):
+        """
+        Retrieves firmware version for the given disk device
+
+        Returns:
+            A string holding disk firmware version as provided by the manufacturer
+        """
+        return self.firmware
+
+    def get_serial(self):
+        """
+        Retrieves serial number for the given disk device
+
+        Returns:
+            A string holding disk serial number as provided by the manufacturer
+        """
+        return self.serial
+    def get_sata_rate(self):
+        """
+        Retrieves SATA rate for the given disk device
+        Returns:
+            A string holding current SATA rate as provided by the manufacturer
+        """
+        return self.sata_rate
+    def get_remaining_life(self):
+        """
+        Retrieves remaining life for the given disk device
+        Returns:
+            A string holding disk remaining life as provided by the manufacturer
+        """
+        return self.remaining_life
+    def get_vendor_output(self):
+        """
+        Retrieves vendor specific data for the given disk device
+
+        Returns:
+            A string holding some vendor specific disk information
+        """
+        return self.vendor_ssd_info
+
+    def parse_id_number(self, id):
+        return self._parse_re('{}\s*(.+?)\n'.format(id), self.ssd_info)
+
+    def get_readonly_partition(self):
+        """
+        Check the partition mount filesystem is readonly status,then output the result.
+        Returns:
+            The readonly partition list
+        """
+
+        ro_partition_list = []
+        partition_list = []
+
+        # parse fdisk cmd output info
+        disk_info = self._execute_shell(DISK_LIST_CMD)
+        begin_flag = False
+        for line in disk_info.split('\n'):
+            if line == "Device":
+                begin_flag = True
+                continue
+            if begin_flag:
+                if line != "":
+                    partition_list.append(line)
+                else:
+                    break
+
+        # parse df cmd output info
+        disk_free = self._execute_shell(DISK_FREE_CMD)
+        disk_dict = {}
+        line_num = 0
+        for line in disk_free.split('\n'):
+            line_num = line_num + 1
+            if line_num == 1 or line == "":
+                continue
+            column_list = line.split()
+            disk_dict[column_list[0]] = column_list[5]
+
+        # get partition which is readonly
+        for partition in partition_list:
+            if partition in disk_dict:
+                ret = self.check_readonly(partition, disk_dict[partition])
+                if (ret != NOT_AVAILABLE):
+                    ro_partition_list.append(ret)
+
+        return ro_partition_list
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/pmon_daemon_control.json
new file mode 100644
index 000000000000..94592fa8cebc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/pmon_daemon_control.json
@@ -0,0 +1,3 @@
+{
+    "skip_ledd": true
+}
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/postinit_cmd_file.soc b/device/micas/x86_64-micas_m2-w6940-64oc-r0/postinit_cmd_file.soc
new file mode 100644
index 000000000000..0f7f6bfea0c5
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/postinit_cmd_file.soc
@@ -0,0 +1,4 @@
+led load /usr/share/sonic/platform/custom_led.bin
+led auto on
+led start
+linkscan SwPortBitMap=xe,ce,cd,d3c
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/system_health_monitoring_config.json b/device/micas/x86_64-micas_m2-w6940-64oc-r0/system_health_monitoring_config.json
new file mode 100755
index 000000000000..e69de29bb2d1
diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk
index c3763ab0c284..ac5b44f1c721 100755
--- a/platform/broadcom/one-image.mk
+++ b/platform/broadcom/one-image.mk
@@ -100,6 +100,7 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \
                                $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE) \
 			       $(MICAS_M2_W6510_48GT4V_PLATFORM_MODULE) \
 			       $(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE) \
+			       $(MICAS_M2_W6940_64OC_PLATFORM_MODULE) \
 			       $(MICAS_M2_W6920_32QC2X_PLATFORM_MODULE) \
 			       $(MICAS_M2_W6510_32C_PLATFORM_MODULE)
 
diff --git a/platform/broadcom/platform-modules-micas.mk b/platform/broadcom/platform-modules-micas.mk
index 0b08c9a20822..ea55ae8d4998 100644
--- a/platform/broadcom/platform-modules-micas.mk
+++ b/platform/broadcom/platform-modules-micas.mk
@@ -25,6 +25,14 @@ MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE = platform-modules-micas-m2-w6520-24dc8qc
 $(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6520-24dc8qc-r0
 $(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE)))
 
+## M2-W6940-64OC
+MICAS_M2_W6940_64OC_PLATFORM_MODULE_VERSION = 1.0
+export MICAS_M2_W6940_64OC_PLATFORM_MODULE_VERSION
+
+MICAS_M2_W6940_64OC_PLATFORM_MODULE = platform-modules-micas-m2-w6940-64oc_$(MICAS_M2_W6940_64OC_PLATFORM_MODULE_VERSION)_amd64.deb
+$(MICAS_M2_W6940_64OC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6940-64oc-r0
+$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6940_64OC_PLATFORM_MODULE)))
+
 ## M2-W6920-32QC2X
 MICAS_M2_W6920_32QC2X_PLATFORM_MODULE_VERSION = 1.0
 export MICAS_M2_W6920_32QC2X_PLATFORM_MODULE_VERSION
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/control b/platform/broadcom/sonic-platform-modules-micas/debian/control
index b4f166a75aca..76a23f057c13 100644
--- a/platform/broadcom/sonic-platform-modules-micas/debian/control
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/control
@@ -16,6 +16,10 @@ Package: platform-modules-micas-m2-w6520-24dc8qc
 Architecture: amd64
 Description: kernel modules for platform devices such as fan, led, sfp
 
+Package: platform-modules-micas-m2-w6940-64oc
+Architecture: amd64
+Description: kernel modules for platform devices such as fan, led, sfp
+
 Package: platform-modules-micas-m2-w6920-32qc2x
 Architecture: amd64
 Description: kernel modules for platform devices such as fan, led, sfp
@@ -23,4 +27,3 @@ Description: kernel modules for platform devices such as fan, led, sfp
 Package: platform-modules-micas-m2-w6510-32c
 Architecture: amd64
 Description: kernel modules for platform devices such as fan, led, sfp
-
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.install
new file mode 100644
index 000000000000..49a8fe1026f3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.install
@@ -0,0 +1 @@
+m2-w6940-64oc/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6940-64oc-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.postinst
new file mode 100644
index 000000000000..a8132f4f65a9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-64oc.postinst
@@ -0,0 +1,10 @@
+#!/bin/sh
+# postinst
+
+kernel_version=$(uname -r)
+
+if [ -e /boot/System.map-${kernel_version} ]; then
+    depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
+fi
+
+#DEBHELPER#
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
index ed2b043c3b5c..6be3c6f0563d 100644
--- a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
@@ -3,6 +3,7 @@ currentdir = $(shell pwd)
 MODULE_DIRS := m2-w6510-48v8c
 MODULE_DIRS += m2-w6510-48gt4v
 MODULE_DIRS += m2-w6520-24dc8qc
+MODULE_DIRS += m2-w6940-64oc
 MODULE_DIRS += m2-w6920-32qc2x
 MODULE_DIRS += m2-w6510-32c
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/Makefile
new file mode 100755
index 000000000000..3039a7f85903
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/Makefile
@@ -0,0 +1,28 @@
+PWD		= $(shell pwd)
+DIR_KERNEL_SRC = $(PWD)/modules/driver
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+SUB_BUILD_DIR = $(PWD)/build
+INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)
+INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin
+INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages
+INSTALL_S3IP_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/s3ip_sysfs_cfg
+INSTALL_S3IP_CONFIG_DIR = $(SUB_BUILD_DIR)/etc/s3ip
+
+all:
+	$(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules
+	@if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi
+	cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR)
+	@if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi
+	cp -r $(PWD)/config/*  $(INSTALL_SCRIPT_DIR)
+	@if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi
+	@if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi
+	@if [ ! -d ${INSTALL_S3IP_CONFIG_DIR} ]; then mkdir -p ${INSTALL_S3IP_CONFIG_DIR} ;fi
+	@if [ -d $(PWD)/s3ip_config/ ]; then cp -r $(PWD)/s3ip_config/* ${INSTALL_S3IP_CONFIG_DIR} ;fi
+	@if [ ! -d ${INSTALL_S3IP_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_S3IP_SYSFS_CFG_DIR} ;fi
+	@if [ -d $(PWD)/s3ip_sysfs_cfg/ ]; then cp -r $(PWD)/s3ip_sysfs_cfg/* ${INSTALL_S3IP_SYSFS_CFG_DIR} ;fi
+clean:
+	rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd ${DIR_KERNEL_SRC}/*.mod
+	rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order
+	rm -rf ${DIR_KERNEL_SRC}/.tmp_versions
+	rm -rf $(SUB_BUILD_DIR)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_config.py
new file mode 100644
index 000000000000..0f2b3bb581e7
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_config.py
@@ -0,0 +1,1644 @@
+#!/usr/bin/python3
+# -*- coding: UTF-8 -*-
+from platform_common import *
+
+STARTMODULE = {
+    "hal_fanctrl": 1,
+    "hal_ledctrl": 1,
+    "avscontrol": 0,
+    "tty_console": 1,
+    "dev_monitor": 1,
+    "pmon_syslog": 1,
+    "sff_temp_polling": 1,
+    "reboot_cause": 1,
+}
+
+DEV_MONITOR_PARAM = {
+    "polling_time": 10,
+    "psus": [
+        {
+            "name": "psu1",
+            "present": {"gettype": "io", "io_addr": 0x958, "presentbit": 2, "okval": 0},
+             "device": [
+                {"id": "psu1pmbus", "name": "wb_fsp1200", "bus": 42, "loc": 0x58, "attr": "hwmon"},
+                {"id": "psu1frue2", "name": "24c02", "bus": 42, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "psu2",
+            "present": {"gettype": "io", "io_addr": 0x958, "presentbit": 6, "okval": 0},
+            "device": [
+                {"id": "psu2pmbus", "name": "wb_fsp1200", "bus": 43, "loc": 0x58, "attr": "hwmon"},
+                {"id": "psu2frue2", "name": "24c02", "bus": 43, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+    ],
+    "fans": [
+        {
+            "name": "fan1",
+            "present": {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x5b, "read_len":1, "presentbit": 0, "okval": 0},
+            "device": [
+                {"id": "fan1frue2", "name": "24c64", "bus": 52, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan2",
+            "present": {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x5b, "read_len":1, "presentbit": 1, "okval": 0},
+            "device": [
+                {"id": "fan2frue2", "name": "24c64", "bus": 53, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan3",
+            "present": {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x5b, "read_len":1, "presentbit": 2, "okval": 0},
+            "device": [
+                {"id": "fan3frue2", "name": "24c64", "bus": 54, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan4",
+            "present": {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x5b, "read_len":1, "presentbit": 3, "okval": 0},
+            "device": [
+                {"id": "fan4frue2", "name": "24c64", "bus": 55, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+    ],
+    "others": [
+        {
+            "name": "eeprom",
+            "device": [
+                {"id": "eeprom_1", "name": "24c02", "bus": 1, "loc": 0x56, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "lm75",
+            "device": [
+                {"id": "lm75_1", "name": "lm75", "bus": 51, "loc": 0x4b, "attr": "hwmon"},
+                {"id": "lm75_2", "name": "lm75", "bus": 56, "loc": 0x4e, "attr": "hwmon"},
+                {"id": "lm75_3", "name": "lm75", "bus": 58, "loc": 0x4b, "attr": "hwmon"},
+                {"id": "lm75_4", "name": "lm75", "bus": 75, "loc": 0x4b, "attr": "hwmon"},
+                {"id": "lm75_5", "name": "lm75", "bus": 76, "loc": 0x4f, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name":"ct7318",
+            "device":[
+                {"id":"ct7318_1", "name":"ct7318","bus":77, "loc":0x4c, "attr":"hwmon"},
+                {"id":"ct7318_2", "name":"ct7318","bus":78, "loc":0x4c, "attr":"hwmon"},
+            ],
+        },
+        {
+            "name": "ucd90160",
+            "device": [
+                {"id": "ucd90160_1", "name": "ucd90160", "bus": 68, "loc": 0x5b, "attr": "hwmon"},
+                {"id": "ucd90160_2", "name": "ucd90160", "bus": 69, "loc": 0x5f, "attr": "hwmon"},
+                {"id": "ucd90160_3", "name": "ucd90160", "bus": 82, "loc": 0x5b, "attr": "hwmon"},
+                {"id": "ucd90160_4", "name": "ucd90160", "bus": 83, "loc": 0x5b, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "ucd9081",
+            "device": [
+                {"id": "wb_ucd9081_1", "name": "wb_ucd9081", "bus": 72, "loc": 0x68, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "xdpe12284",
+            "device": [
+                {"id": "xdpe12284_1", "name": "xdpe12284", "bus": 90, "loc": 0x70, "attr": "hwmon"},
+                {"id": "xdpe12284_2", "name": "xdpe12284", "bus": 91, "loc": 0x70, "attr": "hwmon"},
+                {"id": "xdpe12284_3", "name": "xdpe12284", "bus": 92, "loc": 0x70, "attr": "hwmon"},
+                {"id": "xdpe12284_4", "name": "xdpe12284", "bus": 93, "loc": 0x70, "attr": "hwmon"},
+                {"id": "xdpe12284_5", "name": "xdpe12284", "bus": 94, "loc": 0x70, "attr": "hwmon"},
+                {"id": "xdpe12284_6", "name": "xdpe12284", "bus": 95, "loc": 0x70, "attr": "hwmon"},
+                {"id": "xdpe12284_7", "name": "xdpe12284", "bus": 96, "loc": 0x70, "attr": "hwmon"},
+                {"id": "xdpe12284_8", "name": "xdpe12284", "bus": 97, "loc": 0x70, "attr": "hwmon"},
+                {"id": "xdpe12284_9", "name": "xdpe12284", "bus": 69, "loc": 0x70, "attr": "hwmon"},
+                {"id": "xdpe12284_10", "name": "xdpe12284", "bus": 69, "loc": 0x6e, "attr": "hwmon"},
+                {"id": "xdpe12284_11", "name": "xdpe12284", "bus": 69, "loc": 0x5e, "attr": "hwmon"},
+                {"id": "xdpe12284_12", "name": "xdpe12284", "bus": 69, "loc": 0x68, "attr": "hwmon"},
+            ],
+        },
+    ],
+}
+
+MANUINFO_CONF = {
+    "bios": {
+        "key": "BIOS",
+        "head": True,
+        "next": "onie"
+    },
+    "bios_vendor": {
+        "parent": "bios",
+        "key": "Vendor",
+        "cmd": "dmidecode -t 0 |grep Vendor",
+        "pattern": r".*Vendor",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "bios_version": {
+        "parent": "bios",
+        "key": "Version",
+        "cmd": "dmidecode -t 0 |grep Version",
+        "pattern": r".*Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "bios_date": {
+        "parent": "bios",
+        "key": "Release Date",
+        "cmd": "dmidecode -t 0 |grep Release",
+        "pattern": r".*Release Date",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+    "onie": {
+        "key": "ONIE",
+        "next": "cpu"
+    },
+    "onie_date": {
+        "parent": "onie",
+        "key": "Build Date",
+        "file": "/host/machine.conf",
+        "pattern": r"^onie_build_date",
+        "separator": "=",
+        "arrt_index": 1,
+    },
+    "onie_version": {
+        "parent": "onie",
+        "key": "Version",
+        "file": "/host/machine.conf",
+        "pattern": r"^onie_version",
+        "separator": "=",
+        "arrt_index": 2,
+    },
+
+    "cpu": {
+        "key": "CPU",
+        "next": "ssd"
+    },
+    "cpu_vendor": {
+        "parent": "cpu",
+        "key": "Vendor",
+        "cmd": "dmidecode --type processor |grep Manufacturer",
+        "pattern": r".*Manufacturer",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "cpu_model": {
+        "parent": "cpu",
+        "key": "Device Model",
+        "cmd": "dmidecode --type processor | grep Version",
+        "pattern": r".*Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "cpu_core": {
+        "parent": "cpu",
+        "key": "Core Count",
+        "cmd": "dmidecode --type processor | grep \"Core Count\"",
+        "pattern": r".*Core Count",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+    "cpu_thread": {
+        "parent": "cpu",
+        "key": "Thread Count",
+        "cmd": "dmidecode --type processor | grep \"Thread Count\"",
+        "pattern": r".*Thread Count",
+        "separator": ":",
+        "arrt_index": 4,
+    },
+    "ssd": {
+        "key": "SSD",
+        "next": "cpld"
+    },
+    "ssd_model": {
+        "parent": "ssd",
+        "key": "Device Model",
+        "cmd": "smartctl -i /dev/sda |grep \"Device Model\"",
+        "pattern": r".*Device Model",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "ssd_fw": {
+        "parent": "ssd",
+        "key": "Firmware Version",
+        "cmd": "smartctl -i /dev/sda |grep \"Firmware Version\"",
+        "pattern": r".*Firmware Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "ssd_user_cap": {
+        "parent": "ssd",
+        "key": "User Capacity",
+        "cmd": "smartctl -i /dev/sda |grep \"User Capacity\"",
+        "pattern": r".*User Capacity",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+
+    "cpld": {
+        "key": "CPLD",
+        "next": "psu"
+    },
+
+    "cpld1": {
+        "key": "CPLD1",
+        "parent": "cpld",
+        "arrt_index": 1,
+    },
+    "cpld1_model": {
+        "key": "Device Model",
+        "parent": "cpld1",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld1_vender": {
+        "key": "Vendor",
+        "parent": "cpld1",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld1_desc": {
+        "key": "Description",
+        "parent": "cpld1",
+        "config": "CPU_CPLD",
+        "arrt_index": 3,
+    },
+    "cpld1_version": {
+        "key": "Firmware Version",
+        "parent": "cpld1",
+        "devfile": {
+            "loc": "/dev/cpld0",
+            "offset":0,
+            "len":4,
+            "bit_width":1
+        },
+        "arrt_index": 4,
+    },
+    "cpld2": {
+        "key": "CPLD2",
+        "parent": "cpld",
+        "arrt_index": 2,
+    },
+    "cpld2_model": {
+        "key": "Device Model",
+        "parent": "cpld2",
+        "config": "LCMXO3LF-4300C-6BG324I",
+        "arrt_index": 1,
+    },
+    "cpld2_vender": {
+        "key": "Vendor",
+        "parent": "cpld2",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld2_desc": {
+        "key": "Description",
+        "parent": "cpld2",
+        "config": "CONNECT_CPLD",
+        "arrt_index": 3,
+    },
+    "cpld2_version": {
+        "key": "Firmware Version",
+        "parent": "cpld2",
+         "devfile": {
+            "loc": "/dev/cpld1",
+            "offset":0,
+            "len":4,
+            "bit_width":1
+        },
+        "arrt_index": 4,
+    },
+
+    "cpld3": {
+        "key": "CPLD3",
+        "parent": "cpld",
+        "arrt_index": 3,
+    },
+    "cpld3_model": {
+        "key": "Device Model",
+        "parent": "cpld3",
+        "config": "LCMXO3LF-4300C-6BG256C",
+        "arrt_index": 1,
+    },
+    "cpld3_vender": {
+        "key": "Vendor",
+        "parent": "cpld3",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld3_desc": {
+        "key": "Description",
+        "parent": "cpld3",
+        "config": "MAC_CPLDA",
+        "arrt_index": 3,
+    },
+    "cpld3_version": {
+        "key": "Firmware Version",
+        "parent": "cpld3",
+        "devfile": {
+            "loc": "/dev/cpld6",
+            "offset":0,
+            "len":4,
+            "bit_width":1
+        },
+        "arrt_index": 4,
+    },
+
+    "cpld4": {
+        "key": "CPLD4",
+        "parent": "cpld",
+        "arrt_index": 4,
+    },
+    "cpld4_model": {
+        "key": "Device Model",
+        "parent": "cpld4",
+        "config": "LCMXO3LF-4300C-6BG324I",
+        "arrt_index": 1,
+    },
+    "cpld4_vender": {
+        "key": "Vendor",
+        "parent": "cpld4",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld4_desc": {
+        "key": "Description",
+        "parent": "cpld4",
+        "config": "MAC_CPLDB",
+        "arrt_index": 3,
+    },
+    "cpld4_version": {
+        "key": "Firmware Version",
+        "parent": "cpld4",
+        "devfile": {
+            "loc": "/dev/cpld7",
+            "offset":0,
+            "len":4,
+            "bit_width":1
+        },
+        "arrt_index": 4,
+    },
+
+    "cpld5": {
+        "key": "CPLD5",
+        "parent": "cpld",
+        "arrt_index": 5,
+    },
+    "cpld5_model": {
+        "key": "Device Model",
+        "parent": "cpld5",
+        "config": "LCMXO3LF-4300C-6BG324I",
+        "arrt_index": 1,
+    },
+    "cpld5_vender": {
+        "key": "Vendor",
+        "parent": "cpld5",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld5_desc": {
+        "key": "Description",
+        "parent": "cpld5",
+        "config": "MAC_CPLDC",
+        "arrt_index": 3,
+    },
+    "cpld5_version": {
+        "key": "Firmware Version",
+        "parent": "cpld5",
+        "devfile": {
+            "loc": "/dev/cpld8",
+            "offset":0,
+            "len":4,
+            "bit_width":1
+        },
+        "arrt_index": 4,
+    },
+
+    "cpld6": {
+        "key": "CPLD6",
+        "parent": "cpld",
+        "arrt_index": 6,
+    },
+    "cpld6_model": {
+        "key": "Device Model",
+        "parent": "cpld6",
+        "config": "LCMXO3LF-4300C-6BG324I",
+        "arrt_index": 1,
+    },
+    "cpld6_vender": {
+        "key": "Vendor",
+        "parent": "cpld6",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld6_desc": {
+        "key": "Description",
+        "parent": "cpld6",
+        "config": "MGMT_CPLD",
+        "arrt_index": 3,
+    },
+    "cpld6_version": {
+        "key": "Firmware Version",
+        "parent": "cpld6",
+        "devfile": {
+            "loc": "/dev/cpld9",
+            "offset":0,
+            "len":4,
+            "bit_width":1
+        },
+        "arrt_index": 4,
+    },
+
+    "cpld7": {
+        "key": "CPLD7",
+        "parent": "cpld",
+        "arrt_index": 7,
+    },
+    "cpld7_model": {
+        "key": "Device Model",
+        "parent": "cpld7",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld7_vender": {
+        "key": "Vendor",
+        "parent": "cpld7",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld7_desc": {
+        "key": "Description",
+        "parent": "cpld7",
+        "config": "FAN_CPLD",
+        "arrt_index": 3,
+    },
+    "cpld7_version": {
+        "key": "Firmware Version",
+        "parent": "cpld7",
+        "devfile": {
+            "loc": "/dev/cpld10",
+            "offset":0,
+            "len":4,
+            "bit_width":1
+        },
+        "arrt_index": 4,
+    },
+
+    "psu": {
+        "key": "PSU",
+        "next": "fan"
+    },
+
+    "psu1": {
+        "parent": "psu",
+        "key": "PSU1",
+        "arrt_index": 1,
+    },
+    "psu1_hw_version": {
+        "key": "Hardware Version",
+        "parent": "psu1",
+        "extra": {
+            "funcname": "getPsu",
+            "id": "psu1",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "psu1_fw_version": {
+        "key": "Firmware Version",
+        "parent": "psu1",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "psu2": {
+        "parent": "psu",
+        "key": "PSU2",
+        "arrt_index": 2,
+    },
+    "psu2_hw_version": {
+        "key": "Hardware Version",
+        "parent": "psu2",
+        "extra": {
+            "funcname": "getPsu",
+            "id": "psu2",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "psu2_fw_version": {
+        "key": "Firmware Version",
+        "parent": "psu2",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan": {
+        "key": "FAN",
+        "next": "i210"
+    },
+    "fan1": {
+        "key": "FAN1",
+        "parent": "fan",
+        "arrt_index": 1,
+    },
+    "fan1_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan1",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan1",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan1_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan1",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan2": {
+        "key": "FAN2",
+        "parent": "fan",
+        "arrt_index": 2,
+    },
+    "fan2_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan2",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan2",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan2_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan2",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan3": {
+        "key": "FAN3",
+        "parent": "fan",
+        "arrt_index": 3,
+    },
+    "fan3_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan3",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan3",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan3_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan3",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan4": {
+        "key": "FAN4",
+        "parent": "fan",
+        "arrt_index": 4,
+    },
+    "fan4_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan4",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan4",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan4_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan4",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "i210": {
+        "key": "NIC",
+        "next": "fpga"
+    },
+    "i210_model": {
+        "parent": "i210",
+        "config": "NA",
+        "key": "Device Model",
+        "arrt_index": 1,
+    },
+    "i210_vendor": {
+        "parent": "i210",
+        "config": "INTEL",
+        "key": "Vendor",
+        "arrt_index": 2,
+    },
+    "i210_version": {
+        "parent": "i210",
+        "cmd": "ethtool -i eth0",
+        "pattern": r"firmware-version",
+        "separator": ":",
+        "key": "Firmware Version",
+        "arrt_index": 3,
+    },
+
+    "fpga": {
+        "key": "FPGA",
+    },
+
+    "fpga1": {
+        "key": "FPGA1",
+        "parent": "fpga",
+        "arrt_index": 1,
+    },
+    "fpga1_model": {
+        "parent": "fpga1",
+        "config": "XC7A50T-2FGG484I",
+        "key": "Device Model",
+        "arrt_index": 1,
+    },
+    "fpga1_vender": {
+        "parent": "fpga1",
+        "config": "XILINX",
+        "key": "Vendor",
+        "arrt_index": 2,
+    },
+    "fpga1_desc": {
+        "key": "Description",
+        "parent": "fpga1",
+        "config": "MAC_FPGA",
+        "arrt_index": 3,
+    },
+    "fpga1_hw_version": {
+        "parent": "fpga1",
+        "config": "NA",
+        "key": "Hardware Version",
+        "arrt_index": 4,
+    },
+    "fpga1_fw_version": {
+        "parent": "fpga1",
+        "pci": {
+            "bus": 6,
+            "slot": 0,
+            "fn": 0,
+            "bar": 0,
+            "offset": 0
+        },
+        "key": "Firmware Version",
+        "arrt_index": 5,
+    },
+    "fpga1_date": {
+        "parent": "fpga1",
+        "pci": {
+            "bus": 6,
+            "slot": 0,
+            "fn": 0,
+            "bar": 0,
+            "offset": 4
+        },
+        "key": "Build Date",
+        "arrt_index": 6,
+    },
+
+    "others": {
+        "key": "OTHERS",
+    },
+    "53134": {
+        "parent": "others",
+        "key": "CPU-BMC-SWITCH",
+        "arrt_index": 1,
+    },
+    "53134_model": {
+        "parent": "53134",
+        "config": "BCM53134O",
+        "key": "Device Model",
+        "arrt_index": 1,
+    },
+    "53134_vendor": {
+        "parent": "53134",
+        "config": "Broadcom",
+        "key": "Vendor",
+        "arrt_index": 2,
+    },
+    "53134_hw_version": {
+        "parent": "53134",
+        "key": "Hardware Version",
+        "func": {
+            "funcname": "get_bcm5387_version",
+            "params": {
+                "before": [
+                    # OE high
+                    {"gettype": "cmd", "cmd": "echo 323 > /sys/class/gpio/export"},
+                    {"gettype": "cmd", "cmd": "echo high > /sys/class/gpio/gpio323/direction"},
+                    # SEL1 high
+                    {"gettype": "cmd", "cmd": "echo 324 > /sys/class/gpio/export"},
+                    {"gettype": "cmd", "cmd": "echo high > /sys/class/gpio/gpio324/direction"},
+                    #enable 53134 update
+                    {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3d, "value": 0x00},
+                    {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x45, "value": 0x01},
+                    {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x46, "value": 0x06},
+                    {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio"},
+                    {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio_device sck=55  mosi=54 miso=52 cs=53 bus=0 gpio_chip_name=INTC3001:00"},
+                    {"gettype": "cmd", "cmd": "modprobe wb_spi_93xx46"},
+                ],
+                "get_version": "md5sum /sys/bus/spi/devices/spi0.0/eeprom | awk '{print $1}'",
+                "after": [
+                    {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio324/value"},
+                    {"gettype": "cmd", "cmd": "echo 324 > /sys/class/gpio/unexport"},
+                    {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio323/value"},
+                    {"gettype": "cmd", "cmd": "echo 323 > /sys/class/gpio/unexport"},
+                ],
+                "finally": [
+                    {"gettype": "cmd", "cmd": "rmmod wb_spi_93xx46"},
+                    {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio_device"},
+                    {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio"},
+                    {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x46, "value": 0x00},
+                    {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x45, "value": 0x00},
+                    {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3d, "value": 0x01},
+                ],
+            },
+        },
+        "arrt_index": 3,
+    },
+}
+
+PMON_SYSLOG_STATUS = {
+    "polling_time": 3,
+    "sffs": {
+        "present": {"path": ["/sys/s3ip/transceiver/*/present"], "ABSENT": 0},
+        "nochangedmsgflag": 0,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 1,
+        "alias": {
+            "sff1": "Ethernet1",
+            "sff2": "Ethernet2",
+            "sff3": "Ethernet3",
+            "sff4": "Ethernet4",
+            "sff5": "Ethernet5",
+            "sff6": "Ethernet6",
+            "sff7": "Ethernet7",
+            "sff8": "Ethernet8",
+            "sff9": "Ethernet9",
+            "sff10": "Ethernet10",
+            "sff11": "Ethernet11",
+            "sff12": "Ethernet12",
+            "sff13": "Ethernet13",
+            "sff14": "Ethernet14",
+            "sff15": "Ethernet15",
+            "sff16": "Ethernet16",
+            "sff17": "Ethernet17",
+            "sff18": "Ethernet18",
+            "sff19": "Ethernet19",
+            "sff20": "Ethernet20",
+            "sff21": "Ethernet21",
+            "sff22": "Ethernet22",
+            "sff23": "Ethernet23",
+            "sff24": "Ethernet24",
+            "sff25": "Ethernet25",
+            "sff26": "Ethernet26",
+            "sff27": "Ethernet27",
+            "sff28": "Ethernet28",
+            "sff29": "Ethernet29",
+            "sff30": "Ethernet30",
+            "sff31": "Ethernet31",
+            "sff32": "Ethernet32",
+            "sff33": "Ethernet33",
+            "sff34": "Ethernet34",
+            "sff35": "Ethernet35",
+            "sff36": "Ethernet36",
+            "sff37": "Ethernet37",
+            "sff38": "Ethernet38",
+            "sff39": "Ethernet39",
+            "sff40": "Ethernet40",
+            "sff41": "Ethernet41",
+            "sff42": "Ethernet42",
+            "sff43": "Ethernet43",
+            "sff44": "Ethernet44",
+            "sff45": "Ethernet45",
+            "sff46": "Ethernet46",
+            "sff47": "Ethernet47",
+            "sff48": "Ethernet48",
+            "sff49": "Ethernet49",
+            "sff50": "Ethernet50",
+            "sff51": "Ethernet51",
+            "sff52": "Ethernet52",
+            "sff53": "Ethernet53",
+            "sff54": "Ethernet54",
+            "sff55": "Ethernet55",
+            "sff56": "Ethernet56",
+            "sff57": "Ethernet57",
+            "sff58": "Ethernet58",
+            "sff59": "Ethernet59",
+            "sff60": "Ethernet60",
+            "sff61": "Ethernet61",
+            "sff62": "Ethernet62",
+            "sff63": "Ethernet63",
+            "sff64": "Ethernet64",
+            "sff65": "Ethernet65",
+            "sff66": "Ethernet66",
+        }
+    },
+    "fans": {
+        "present": {"path": ["/sys/s3ip/fan/*/status"], "ABSENT": 0},
+        "status": [
+            {"path": "/sys/s3ip/fan/%s/status", 'okval': 1},
+        ],
+        "nochangedmsgflag": 1,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 0,
+        "alias": {
+            "fan1": "FAN1",
+            "fan2": "FAN2",
+            "fan3": "FAN3",
+            "fan4": "FAN4"
+        }
+    },
+    "psus": {
+        "present": {"path": ["/sys/s3ip/psu/*/present"], "ABSENT": 0},
+        "status": [
+            {"path": "/sys/s3ip/psu/%s/out_status", "okval":1},
+        ],
+        "nochangedmsgflag": 1,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 0,
+        "alias": {
+            "psu1": "PSU1",
+            "psu2": "PSU2"
+        }
+    }
+}
+
+REBOOT_CTRL_PARAM = {
+    "cpu": {"path":"/dev/cpld1", "offset":0x17, "rst_val":0xfd, "rst_delay":0, "gettype":"devfile"},
+    "mac": [
+        {"gettype": "cmd", "cmd": "setpci -s 14:02.0 0x50.W=0x0050", "rst_delay":0.1},
+        {"path":"/dev/cpld6", "offset":0x16, "rst_val":0x00, "rst_delay":1, "gettype": "devfile"},
+        {"path":"/dev/cpld6", "offset":0x16, "rst_val":0x01, "rst_delay":0, "gettype": "devfile"},
+        {"gettype": "cmd", "cmd": "setpci -s 14:02.0 0x50.W=0x0060", "rst_delay":0.1},
+    ],
+    "phy": {"path":"/dev/cpld1", "offset":0x18, "rst_val":0x1e, "rst_delay":0, "gettype":"devfile"},
+    "power": [
+        {"bus": 42, "loc": 0x58, "offset": 0x02, "rst_val": 0x48, "rst_delay":0.1, "gettype": "i2c"},
+        {"bus": 42, "loc": 0x58, "offset": 0x01, "rst_val": 0x40, "rst_delay":0.1, "gettype": "i2c"},
+        {"bus": 43, "loc": 0x58, "offset": 0x02, "rst_val": 0x48, "rst_delay":0.1, "gettype": "i2c"},
+        {"bus": 43, "loc": 0x58, "offset": 0x01, "rst_val": 0x40, "rst_delay":0.1, "gettype": "i2c"},
+    ],
+
+}
+
+REBOOT_CAUSE_PARA = {
+    "reboot_cause_list": [
+        {
+            "name": "cold_reboot",
+            "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":0x09},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Power Loss, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Power Loss, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+            ]
+        },
+        {
+            "name": "wdt_reboot",
+            "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":0x05},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Watchdog, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Watchdog, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+            ],
+        },
+        {
+            "name": "bmc_reboot",
+            "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":0x06},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "BMC reboot, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "BMC reboot, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+            ],
+        },
+        {
+            "name": "cpu_reboot",
+            "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":[0x03, 0x04]},
+            "record": [
+                {"record_type":"file", "mode":"cover", "log":"CPU reboot, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "CPU reboot, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+            ],
+        },
+        {
+            "name": "bmc_powerdown",
+            "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":[0x02, 0x07, 0x0a]},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "BMC powerdown, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "BMC powerdown, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+            ],
+        },
+        {
+            "name": "otp_switch_reboot",
+            "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+            ],
+            "finish_operation": [
+                {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"},
+            ]
+        },
+        {
+            "name": "otp_other_reboot",
+            "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+            ],
+            "finish_operation": [
+                {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"},
+            ]
+        },
+    ],
+    "other_reboot_cause_record": [
+        {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+        {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+    ],
+}
+
+##################### MAC Voltage adjust####################################
+MAC_DEFAULT_PARAM = [
+    {
+        "name": "mac_core",              # AVS name
+        "type": 0,                       # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range
+        "default": 0x82,                 # default value, if rov value not in range
+        "rov_source": 0,                 # 0: get rov value from cpld, 1: get rov value from SDK
+        "cpld_avs": {"path": "/dev/cpld6", "offset": 0x30, "read_len": 1, "gettype": "devfile"},
+        "set_avs": {
+            "loc": "/sys/bus/i2c/devices/84-0040/avs0_vout_command", "gettype": "sysfs", "formula": None},
+        "mac_avs_param": {
+            0x92: 0xBF4,
+            0x90: 0xC29,
+            0x8e: 0xC56,
+            0x8c: 0xC8B,
+            0x8a: 0xCBD,
+            0x88: 0xCEA,
+            0x86: 0xD14,
+            0x84: 0xD44,
+            0x82: 0xD71
+        }
+    }
+]
+
+DRIVERLISTS = [
+    {"name": "i2c_i801", "delay": 1},
+    {"name": "i2c_dev", "delay": 0},
+    {"name": "i2c_algo_bit", "delay": 0},
+    {"name": "i2c_gpio", "delay": 0},
+    {"name": "i2c_mux", "delay": 0},
+    {"name": "wb_i2c_gpio_device gpio_sda=181 gpio_scl=180 gpio_chip_name=INTC3001:00 bus_num=1", "delay": 0},
+    {"name": "platform_common dfd_my_type=0x40d7", "delay": 0},
+    {"name": "wb_fpga_pcie", "delay": 0},
+    {"name": "wb_pcie_dev", "delay": 0},
+    {"name": "wb_pcie_dev_device", "delay": 0},
+    {"name": "wb_io_dev", "delay": 0},
+    {"name": "wb_io_dev_device", "delay": 0},
+    {"name": "wb_indirect_dev", "delay": 0},
+    {"name": "wb_indirect_dev_device", "delay": 0},
+    {"name": "wb_i2c_dev", "delay": 0},
+    {"name": "wb_spi_dev", "delay": 0},
+    {"name": "wb_fpga_i2c_bus_drv", "delay": 0},
+    {"name": "wb_fpga_i2c_bus_device", "delay": 0},
+    {"name": "wb_i2c_mux_pca9641", "delay": 0},
+    {"name": "wb_i2c_mux_pca954x", "delay": 0},
+    {"name": "wb_i2c_mux_pca954x_device", "delay": 0},
+    {"name": "wb_fpga_pca954x_drv", "delay": 0},
+    {"name": "wb_fpga_pca954x_device", "delay": 0},
+    {"name": "wb_i2c_dev_device", "delay": 0},
+    {"name": "mdio_bitbang", "delay": 0},
+    {"name": "mdio_gpio", "delay": 0},
+    {"name": "wb_mdio_gpio_device gpio_mdc=69 gpio_mdio=70 gpio_chip_name=INTC3001:00", "delay": 0},
+    {"name": "wb_wdt", "delay": 0},
+    {"name": "wb_wdt_device", "delay": 0},
+    {"name": "lm75", "delay": 0},
+    {"name": "tmp401", "delay": 0},
+    {"name": "ct7148", "delay": 0},
+    {"name": "optoe", "delay": 0},
+    {"name": "at24", "delay": 0},
+    {"name": "pmbus_core", "delay": 0},
+    {"name": "wb_csu550", "delay": 0},
+    {"name": "ina3221", "delay": 0},
+    {"name": "tps53679", "delay": 0},
+    {"name": "ucd9000", "delay": 0},
+    {"name": "wb_ucd9081", "delay": 0}, 
+    {"name": "xdpe12284", "delay": 0},
+    {"name": "wb_xdpe132g5c_pmbus", "delay":0},
+    {"name": "wb_xdpe132g5c", "delay": 0},
+    {"name": "plat_dfd", "delay": 0},
+    {"name": "plat_switch", "delay": 0},
+    {"name": "plat_fan", "delay": 0},
+    {"name": "plat_psu", "delay": 0},
+    {"name": "plat_sff", "delay": 0},
+    {"name": "hw_test", "delay": 0},
+
+    {"name": "s3ip_sysfs", "delay": 0},
+    {"name": "wb_switch_driver", "delay": 0},
+    {"name": "syseeprom_device_driver", "delay": 0},
+    {"name": "fan_device_driver", "delay": 0},
+    {"name": "cpld_device_driver", "delay": 0},
+    {"name": "sysled_device_driver", "delay": 0},
+    {"name": "psu_device_driver", "delay": 0},
+    {"name": "transceiver_device_driver", "delay": 0},
+    {"name": "temp_sensor_device_driver", "delay": 0},
+    {"name": "vol_sensor_device_driver", "delay": 0},
+    {"name": "curr_sensor_device_driver", "delay": 0},
+    {"name": "fpga_device_driver", "delay": 0},
+    {"name": "watchdog_device_driver", "delay": 0},
+]
+
+DEVICE = [
+    {"name": "24c02", "bus": 1, "loc": 0x56},
+    {"name": "24c02", "bus": 57, "loc": 0x57},
+    {"name": "24c02", "bus": 61, "loc": 0x57},
+    {"name": "24c02", "bus": 66, "loc": 0x57},
+    # fan
+    {"name": "24c64", "bus": 52, "loc": 0x50},
+    {"name": "24c64", "bus": 53, "loc": 0x50},
+    {"name": "24c64", "bus": 54, "loc": 0x50},
+    {"name": "24c64", "bus": 55, "loc": 0x50},
+    # psu
+    {"name": "24c02", "bus": 42, "loc": 0x50},
+    {"name": "wb_fsp1200", "bus": 42, "loc": 0x58},
+    {"name": "24c02", "bus": 43, "loc": 0x50},
+    {"name": "wb_fsp1200", "bus": 43, "loc": 0x58},
+    # temp
+    {"name": "lm75", "bus": 51, "loc": 0x4b},
+    {"name": "lm75", "bus": 56, "loc": 0x4e},
+    {"name": "lm75", "bus": 58, "loc": 0x4b},
+    {"name": "lm75", "bus": 75, "loc": 0x4b},
+    {"name": "lm75", "bus": 76, "loc": 0x4f},
+    {"name": "ct7318", "bus": 77, "loc": 0x4c},
+    {"name": "ct7318", "bus": 78, "loc": 0x4c},
+    #dcdc
+    {"name": "ucd90160", "bus": 68, "loc": 0x5b},
+    {"name": "ucd90160", "bus": 69, "loc": 0x5f},
+    {"name": "xdpe12284", "bus": 69, "loc": 0x70},
+    {"name": "xdpe12284", "bus": 69, "loc": 0x6e},
+    {"name": "xdpe12284", "bus": 69, "loc": 0x5e},
+    {"name": "xdpe12284", "bus": 69, "loc": 0x68},
+    {"name": "wb_ucd9081", "bus": 72, "loc": 0x68},
+    {"name": "wb_ucd90160", "bus": 82, "loc": 0x5b},
+    {"name": "wb_ucd90160", "bus": 83, "loc": 0x5b},
+    {"name": "xdpe12284", "bus": 90, "loc": 0x70},
+    {"name": "xdpe12284", "bus": 91, "loc": 0x70},
+    {"name": "xdpe12284", "bus": 92, "loc": 0x70},
+    {"name": "xdpe12284", "bus": 93, "loc": 0x70},
+    {"name": "xdpe12284", "bus": 94, "loc": 0x70},
+    {"name": "xdpe12284", "bus": 95, "loc": 0x70},
+    {"name": "xdpe12284", "bus": 96, "loc": 0x70},
+    {"name": "xdpe12284", "bus": 97, "loc": 0x70},
+    #avs
+    {"name": "wb_xdpe132g5c_pmbus", "bus": 84, "loc": 0x40},
+    {"name": "wb_xdpe132g5c", "bus": 84, "loc": 0x10},
+    {"name": "wb_xdpe132g5c_pmbus", "bus": 85, "loc": 0x4d},
+    {"name": "wb_xdpe132g5c", "bus": 85, "loc": 0x1d},
+    {"name": "wb_xdpe132g5c_pmbus", "bus": 86, "loc": 0x4d},
+    {"name": "wb_xdpe132g5c", "bus": 86, "loc": 0x1d},
+]
+
+OPTOE = [
+    {"name": "optoe2", "startbus": 59, "endbus": 60},
+    {"name": "optoe3", "startbus": 106, "endbus": 169},
+]
+
+
+INIT_PARAM = []
+
+INIT_COMMAND_PRE = []
+
+INIT_COMMAND = [
+    # open X86 BMC Serial port
+    "dfd_debug sysfs_data_wr /dev/cpld1 0x41 0x01",
+    # enable stream light
+    "dfd_debug sysfs_data_wr /dev/cpld6 0xef 0x01",
+    "dfd_debug sysfs_data_wr /dev/cpld7 0xef 0x01",
+    "dfd_debug sysfs_data_wr /dev/cpld8 0x80 0xff",
+    "dfd_debug sysfs_data_wr /dev/cpld8 0x81 0xff",
+    # KR power_on
+    "dfd_debug sysfs_data_wr /dev/cpld9 0x80 0x03",
+    # KR tx-disable enable
+    "dfd_debug sysfs_data_wr /dev/cpld9 0x58 0x00",
+    ]
+
+WARM_UPGRADE_PARAM = {
+    "slot0": {
+        "VME": {
+            "chain1": [
+                {
+                    "name": "BASE_CPLD",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/base_cpld_refresh_header.vme",
+                    "init_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0xcb, "value": 0x01, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3b, "value": 0x00, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x36, "value": 0x2c, "delay": 0.1}, #bmc_ready
+                    ],
+                    "rw_recover_reg": [
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x17, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x19, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x1b, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x1c, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x21, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x23, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x25, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x2b, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x2c, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x2d, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x31, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x32, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x33, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x36, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x38, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3d, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3e, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3f, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x40, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x41, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x43, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x44, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x45, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x57, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x5a, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x65, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x66, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x67, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x70, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x71, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x72, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x73, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x74, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x75, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb0, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb1, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb2, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb3, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb4, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb5, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x90, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x91, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x92, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x93, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x94, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x95, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa0, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa1, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa2, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa3, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa4, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xa5, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb0, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb1, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb3, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb4, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb6, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb7, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xb8, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xba, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xbb, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xbc, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc3, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc5, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc6, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc7, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xd2, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xd3, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xd4, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xd5, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xd8, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe0, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe2, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe3, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe4, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe5, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe6, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe7, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe8, "read_len": 1, "value": None, "delay": 0.1},
+                    ],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 180,
+                    "access_check_reg": {"skip": 1},
+                    "finish_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3b, "value": 0x03,"delay": 20}, #after bmc_ready delay time
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0xcb, "value": 0x00, "delay": 0.1},
+                    ],
+                },
+            ],
+            "chain2": [
+                {
+                    "name": "MAC_CPLD_A",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/mac_cplda_refresh_header.vme",
+                    "init_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x01, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x28, "value": 0x00, "delay": 0.1},
+                    ],
+                    "rw_recover_reg": [
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x24, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x25, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x70, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x71, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x72, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x76, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x77, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x78, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd0, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd1, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd2, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd3, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd4, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd5, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd6, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd7, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd8, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xd9, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xda, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xdb, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xe0, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xe1, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0xef, "read_len": 1, "value": None, "delay": 0.1},
+                    ],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 30,
+                    "access_check_reg": {"skip": 1},
+                    "finish_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+                        {"gettype": "devfile", "path": "/dev/cpld6", "offset": 0x28, "value": 0x01, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x00, "delay": 0.1},
+                    ],
+                },
+                {
+                    "name": "MAC_CPLD_B",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/mac_cpldb_refresh_header.vme",
+                    "init_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x02, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x28, "value": 0x00, "delay": 0.1},
+                    ],
+                    "rw_recover_reg": [
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x70, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x71, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x72, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x73, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x74, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x80, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x81, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x82, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x83, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x84, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd0, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd1, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd2, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd3, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd4, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd5, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd6, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd7, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd8, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xd9, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xda, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xdb, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xdc, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xde, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xdf, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xe0, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xe1, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xe2, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xe3, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0xef, "read_len": 1, "value": None, "delay": 0.1},
+                    ],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 30,
+                    "access_check_reg": {"skip": 1},
+                    "finish_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+                        {"gettype": "devfile", "path": "/dev/cpld7", "offset": 0x28, "value": 0x01, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x00, "delay": 0.1},
+                    ],
+                }
+            ],
+            "chain3": [
+                {
+                    "name": "MAC_CPLD_C",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/mac_cpldc_refresh_header.vme",
+                    "init_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x04, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x46, "value": 0x00, "delay": 0.1},
+                    ],
+                    "rw_recover_reg": [
+                        {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x13, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x14, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x15, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x16, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x17, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x1a, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x20, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x21, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x32, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x33, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x4a, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x4b, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x52, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x59, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x62, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x63, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x80, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x81, "read_len": 1, "value": None, "delay": 0.1},
+                    ],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 30,
+                    "access_check_reg": {"skip": 1},
+                    "finish_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+                        {"gettype": "devfile", "path": "/dev/cpld8", "offset": 0x46, "value": 0x01, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x00, "delay": 0.1},
+                    ],
+                }
+            ],
+            "chain4": [
+                {
+                    "name": "FAN_CPLD",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/fan_cpld_refresh_header.vme",
+                    "init_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x08, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x40, "value": 0x00, "delay": 0.1},
+                    ],
+                    "rw_recover_reg": [
+                        {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x20, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x22, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x31, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x53, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x56, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x58, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x90, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x91, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x92, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x93, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0xd0, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0xd1, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0xd2, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0xd3, "read_len": 1, "value": None, "delay": 0.1},
+                    ],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 30,
+                    "access_check_reg": {"skip": 1},
+                    "finish_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+                        {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0x40, "value": 0x00, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x00, "delay": 0.1},
+                    ],
+                }
+            ],
+            "chain5": [
+                {
+                    "name": "MGMT_CPLD",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/mgmt_cpld_refresh_header.vme",
+                    "init_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x10, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x1c, "value": 0x00, "delay": 0.1},
+                    ],
+                    "rw_recover_reg": [
+                        {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x21, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x24, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x30, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x40, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x58, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x70, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x71, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x80, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0xa8, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0xba, "read_len": 1, "value": None, "delay": 0.1},
+                    ],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 30,
+                    "access_check_reg": {"skip": 1},
+                    "finish_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+                        {"gettype": "devfile", "path": "/dev/cpld9", "offset": 0x1c, "value": 0x01, "delay": 1},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0x00, "delay": 0.1},
+                    ],
+                }
+            ],
+            "chain6": [
+                {
+                    "name": "CPU_CPLD",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/cpu_cpld_refresh_header.vme",
+                    "init_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+                        {"cmd": "echo 497 > /sys/class/gpio/export", "gettype": "cmd"},
+                        {"cmd": "echo out > /sys/class/gpio/gpio497/direction", "gettype": "cmd"},
+                        {"cmd": "echo 1 > /sys/class/gpio/gpio497/value", "gettype": "cmd"},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0xcc, "value": 0x01, "delay": 0.1},
+                    ],
+                    "rw_recover_reg": [
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x17, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x21, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x41, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x51, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x52, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x53, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x54, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x60, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x61, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x62, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x74, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x81, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x82, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x83, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x84, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x85, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x86, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x87, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x88, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x89, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x8a, "read_len": 1, "value": None, "delay": 0.1},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0xcb, "read_len": 1, "value": None, "delay": 0.1},
+                    ],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 180,
+                    "access_check_reg": {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x10, "read_len": 1, "value": 0x36, "okval": 0xff},
+                    "finish_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+                        {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0xcc, "value": 0x00, "delay": 0.1},
+                        {"cmd": "echo 0 > /sys/class/gpio/gpio497/value", "gettype": "cmd"},
+                        {"cmd": "echo 497 > /sys/class/gpio/unexport", "gettype": "cmd"},
+                    ],
+                },
+            ],
+        },
+        "SPI-LOGIC-DEV": {
+            "chain1": [
+                {"name": "MAC_FPGA",
+                    "init_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+                        {"cmd": "setpci -s 00:12.0 0x114.W=0xffff", "gettype": "cmd"},
+                        {"cmd": "setpci -s 00:12.0 0x50.W=0x0050", "gettype": "cmd"},  # link_disable
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc6, "value": 0x00},
+                        {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xc6, "value": 0x01, "delay": 1},
+                    ],
+                    "after_upgrade_delay": 10,
+                    "after_upgrade_delay_timeout": 10,
+                    "refresh_finish_flag_check": {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x63, "value": 0x01, "read_len": 1},
+                    "access_check_reg": {
+                        "path": "/dev/fpga0", "offset": 0x8, "value": [0x55, 0xaa, 0x5a, 0xa5], "read_len": 4, "gettype": "devfile",
+                        "polling_cmd": [
+                            {"cmd": "setpci -s 00:12.0 0x50.W=0x0060", "gettype": "cmd", "delay": 1},  # retrain_link
+                            {"cmd": "setpci -s 00:12.0 0x52.w", "gettype": "cmd", "okval": 0x12,
+                                "timeout": 10, "mask": 0xff},  # check link status
+                            {"cmd": "rmmod wb_fpga_pcie", "gettype": "cmd", "delay": 0.1},
+                            {"cmd": "modprobe wb_fpga_pcie", "gettype": "cmd", "delay": 2},
+                        ],
+                        "polling_delay": 0.1
+                    },
+                    "finish_cmd": [
+                        {"cmd": "setpci -s 00:12.0 0x50.W=0x0060", "gettype": "cmd"},  # retrain_link
+                        {"cmd": "setpci -s 00:12.0 0x110.W=0xffff", "gettype": "cmd"},
+                        {"cmd": "setpci -s 00:12.0 0x114.W=0x0000", "gettype": "cmd"},
+                        {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+                    ],
+                 },
+            ]
+        },
+    },
+    "stop_services_cmd": [
+        "/usr/local/bin/platform_process.py stop",
+    ],
+    "start_services_cmd": [
+        "/usr/local/bin/platform_process.py start",
+    ],
+}
+
+UPGRADE_SUMMARY = {
+    "devtype": 0x40d7,
+
+    "slot0": {
+        "subtype": 0,
+        "VME": {
+            "chain1": {
+                "name": "BASE_CPLD",
+                "is_support_warm_upg": 1,
+            },
+            "chain2": {
+                "name": "MAC_CPLDAB",
+                "is_support_warm_upg": 1,
+            },
+            "chain3": {
+                "name": "MAC_CPLDC",
+                "is_support_warm_upg": 1,
+            },
+            "chain4": {
+                "name": "FAN_CPLD",
+                "is_support_warm_upg": 1,
+            },
+            "chain5": {
+                "name": "MGMT_CPLD",
+                "is_support_warm_upg": 1,
+            },
+            "chain6": {
+                "name": "CPU_CPLD",
+                "is_support_warm_upg": 1,
+            },
+        },
+
+        "SPI-LOGIC-DEV": {
+            "chain1": {
+                "name": "MAC_FPGA",
+                "is_support_warm_upg": 1,
+            }
+        },
+
+        "SYSFS": {
+            "chain2": {
+                "name": "BCM53134",
+                "is_support_warm_upg": 0,
+                "init_cmd": [
+                    {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3d, "value": 0x00, "delay": 0.1},
+                    {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"},
+                    {"cmd": "modprobe wb_spi_gpio_device sck=55  mosi=54 miso=52 cs=53 bus=0 gpio_chip_name=INTC3001:00", "gettype": "cmd"},
+                    {"cmd": "modprobe wb_spi_93xx46", "gettype": "cmd", "delay": 0.1},
+                ],
+                "finish_cmd": [
+                    {"cmd": "rmmod wb_spi_93xx46", "gettype": "cmd"},
+                    {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"},
+                    {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1},
+                    {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x3d, "value": 0x01, "delay": 0.1},
+                ],
+            },
+        },
+
+        "MTD": {
+            "chain4": {
+                "name": "BIOS",
+                "filesizecheck": 20480,  # bios check file size, Unit: K
+                "is_support_warm_upg": 0,
+                "init_cmd": [
+                    {"cmd": "modprobe mtd", "gettype": "cmd"},
+                    {"cmd": "modprobe spi_nor", "gettype": "cmd"},
+                    {"cmd": "modprobe ofpart", "gettype": "cmd"},
+                    {"cmd": "modprobe intel_spi writeable=1", "gettype": "cmd"},
+                    {"cmd": "modprobe intel_spi_pci", "gettype": "cmd"},
+                ],
+                "finish_cmd": [
+                    {"cmd": "rmmod intel_spi_pci", "gettype": "cmd"},
+                    {"cmd": "rmmod intel_spi", "gettype": "cmd"},
+                    {"cmd": "rmmod ofpart", "gettype": "cmd"},
+                    {"cmd": "rmmod spi_nor", "gettype": "cmd"},
+                    {"cmd": "rmmod mtd", "gettype": "cmd"},
+                ],
+            },
+        },
+
+        "TEST": {
+            "fpga": [
+                {"chain": 1, "file": "/etc/.upgrade_test/fpga_test_header.bin", "display_name": "MAC_FPGA"},
+            ],
+            "cpld": [
+                {"chain": 1, "file": "/etc/.upgrade_test/cpld_test_0_1_header.vme", "display_name": "BASE_CPLD"},
+                {"chain": 2, "file": "/etc/.upgrade_test/cpld_test_0_2_header.vme", "display_name": "MAC_CPLDAB"},
+                {"chain": 3, "file": "/etc/.upgrade_test/cpld_test_0_3_header.vme", "display_name": "MAC_CPLDC"},
+                {"chain": 4, "file": "/etc/.upgrade_test/cpld_test_0_4_header.vme", "display_name": "FAN_CPLD"},
+                {"chain": 5, "file": "/etc/.upgrade_test/cpld_test_0_5_header.vme", "display_name": "MGMT_CPLD"},
+                {"chain": 6, "file": "/etc/.upgrade_test/cpld_test_0_6_header.vme", "display_name": "CPU_CPLD"},
+            ],
+        },
+    },
+}
+
+PLATFORM_E2_CONF = {
+    "fan": [
+        {"name": "fan1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/52-0050/eeprom"},
+        {"name": "fan2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/53-0050/eeprom"},
+        {"name": "fan3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/54-0050/eeprom"},
+        {"name": "fan4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/55-0050/eeprom"},
+    ],
+    "psu": [
+        {"name": "psu1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/42-0050/eeprom"},
+        {"name": "psu2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/43-0050/eeprom"},
+    ],
+    "syseeprom": [
+        {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/1-0056/eeprom"},
+    ],
+}
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_port_config.py
new file mode 100644
index 000000000000..bb88ae1a5fae
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_port_config.py
@@ -0,0 +1,74 @@
+#!/usr/bin/python3
+# -*- coding: UTF-8 -*-
+
+PLATFORM_INTF_OPTOE = {
+    "port_num": 66,
+    "port_bus_map": {
+        1: 106,
+        2: 107,
+        3: 108,
+        4: 109,
+        5: 110,
+        6: 111,
+        7: 112,
+        8: 113,
+        9: 114,
+        10: 115,
+        11: 116,
+        12: 117,
+        13: 118,
+        14: 119,
+        15: 120,
+        16: 121,
+        17: 122,
+        18: 123,
+        19: 124,
+        20: 125,
+        21: 126,
+        22: 127,
+        23: 128,
+        24: 129,
+        25: 130,
+        26: 131,
+        27: 132,
+        28: 133,
+        29: 134,
+        30: 135,
+        31: 136,
+        32: 137,
+        33: 138,
+        34: 139,
+        35: 140,
+        36: 141,
+        37: 142,
+        38: 143,
+        39: 144,
+        40: 145,
+        41: 146,
+        42: 147,
+        43: 148,
+        44: 149,
+        45: 150,
+        46: 151,
+        47: 152,
+        48: 153,
+        49: 154,
+        50: 155,
+        51: 156,
+        52: 157,
+        53: 158,
+        54: 159,
+        55: 160,
+        56: 161,
+        57: 162,
+        58: 163,
+        59: 164,
+        60: 165,
+        61: 166,
+        62: 167,
+        63: 168,
+        64: 169,
+        65: 59,
+        66: 60,
+    }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_device.py
new file mode 100644
index 000000000000..81a53b11f6f2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_device.py
@@ -0,0 +1,756 @@
+#!/usr/bin/python3
+
+psu_fan_airflow = {
+    "intake": ['CRPS3000CL', 'ECDL3000123'],
+    "exhaust": []
+}
+
+fanairflow = {
+    "intake": ['FAN80-02-F'],
+    "exhaust": [],
+}
+
+psu_display_name = {
+    "PA3000I-F": ['CRPS3000CL', 'ECDL3000123'],
+}
+
+psutypedecode = {
+    0x00: 'N/A',
+    0x01: 'AC',
+    0x02: 'DC',
+}
+
+class Unit:
+    Temperature = "C"
+    Voltage = "V"
+    Current = "A"
+    Power = "W"
+    Speed = "RPM"
+
+
+class threshold:
+    PSU_TEMP_MIN = -20 * 1000
+    PSU_TEMP_MAX = 65 * 1000
+
+    PSU_FAN_SPEED_MIN = 3500
+    PSU_FAN_SPEED_MAX = 23500
+    PSU_A_FAN_SPEED_MAX = 39000
+
+    PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000
+    PSU_OUTPUT_VOLTAGE_MAX = 13 * 1000
+
+    PSU_AC_INPUT_VOLTAGE_MIN = 90 * 1000
+    PSU_AC_INPUT_VOLTAGE_MAX = 264 * 1000
+
+    PSU_DC_INPUT_VOLTAGE_MIN = 180 * 1000
+    PSU_DC_INPUT_VOLTAGE_MAX = 320 * 1000
+
+    ERR_VALUE = -9999999
+
+    PSU_OUTPUT_POWER_MIN = 0* 1000 * 1000
+    PSU_OUTPUT_POWER_MAX = 3000 * 1000 * 1000
+
+    PSU_INPUT_POWER_MIN = 0 * 1000 * 1000
+    PSU_INPUT_POWER_MAX = 3100* 1000 * 1000
+
+    PSU_OUTPUT_CURRENT_MIN = 0 * 1000
+    PSU_OUTPUT_CURRENT_MAX = 246 * 1000
+
+    PSU_INPUT_CURRENT_MIN = 0 * 1000
+    PSU_INPUT_CURRENT_MAX = 20 * 1000
+
+    FRONT_FAN_SPEED_MAX = 18000
+    REAR_FAN_SPEED_MAX = 16000
+    FAN_SPEED_MIN = 3200
+
+
+devices = {
+    "sensor_print_src": "s3ip",
+
+    "dcdc_data_source": [
+        {
+            "path": "/sys/s3ip/vol_sensor",
+            "type": "vol",
+            "Unit": Unit.Voltage,
+            "read_times": 3,
+        },
+        {
+            "path": "/sys/s3ip/curr_sensor",
+            "type": "curr",
+            "Unit": Unit.Current,
+            "read_times": 3,
+        },
+    ],
+    "temp_data_source": [
+        {
+            "path": "/sys/s3ip/temp_sensor",
+            "type": "temp",
+            "Unit": Unit.Temperature,
+        },
+    ],
+
+    "onie_e2": [
+        {
+            "name": "ONIE_E2",
+            "e2loc": {"loc": "/sys/bus/i2c/devices/1-0056/eeprom", "way": "sysfs"},
+            "airflow": "intake"
+        },
+    ],
+    "psus": [
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/42-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 42, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/s3ip/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU1",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": threshold.PSU_TEMP_MIN,
+                "Max": threshold.PSU_TEMP_MAX,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": threshold.PSU_FAN_SPEED_MIN,
+                "Max": {
+                    "ECDL3000123": threshold.PSU_FAN_SPEED_MAX,
+                    "CRPS3000CL": threshold.PSU_A_FAN_SPEED_MAX,
+                },
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 42, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.ERR_VALUE,
+                    "Max": threshold.ERR_VALUE,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_CURRENT_MIN,
+                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_POWER_MIN,
+                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_POWER_MIN,
+                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        },
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/43-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 43, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/s3ip/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU2",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 43, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": threshold.PSU_TEMP_MIN,
+                "Max": threshold.PSU_TEMP_MAX,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 43, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": threshold.PSU_FAN_SPEED_MIN,
+                "Max": {
+                    "ECDL3000123": threshold.PSU_FAN_SPEED_MAX,
+                    "CRPS3000CL": threshold.PSU_A_FAN_SPEED_MAX,
+                },
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 43, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 43, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.ERR_VALUE,
+                    "Max": threshold.ERR_VALUE,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_CURRENT_MIN,
+                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_POWER_MIN,
+                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 43, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_POWER_MIN,
+                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        }
+    ],
+    "temps": [
+        {
+            "name": "BOARD_TEMP",
+            "temp_id": "TEMP1",
+            "Temperature": {
+                "value": [
+                    {"loc": "/sys/s3ip/temp_sensor/temp13/value", "way": "sysfs"},
+                    {"loc": "/sys/s3ip/temp_sensor/temp14/value", "way": "sysfs"},
+                    {"loc": "/sys/s3ip/temp_sensor/temp15/value", "way": "sysfs"},
+                ],
+                "Min": -10000,
+                "Low": 0,
+                "High": 70000,
+                "Max": 75000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "CPU_TEMP",
+            "temp_id": "TEMP2",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -15000,
+                "Low": 10000,
+                "High": 98000,
+                "Max": 100000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "INLET_TEMP",
+            "temp_id": "TEMP3",
+            "Temperature": {
+                "value": [
+                    {"loc": "/sys/s3ip/temp_sensor/temp10/value", "way": "sysfs"},
+                ],
+                "Min": -30000,
+                "Low": 0,
+                "High": 40000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "OUTLET_TEMP",
+            "temp_id": "TEMP4",
+            "Temperature": {
+                "value": [
+                    {"loc": "/sys/s3ip/temp_sensor/temp11/value", "way": "sysfs"},
+                    {"loc": "/sys/s3ip/temp_sensor/temp12/value", "way": "sysfs"},
+                ],
+                "Min": -30000,
+                "Low": 0,
+                "High": 70000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "SWITCH_TEMP",
+            "temp_id": "TEMP5",
+            "api_name": "ASIC_TEMP",
+            "Temperature": {
+                "value": {"loc": "/sys/s3ip/temp_sensor/temp17/value", "way": "sysfs"},
+                "Min": -30000,
+                "Low": 10000,
+                "High": 100000,
+                "Max": 105000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU1_TEMP",
+            "temp_id": "TEMP6",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU2_TEMP",
+            "temp_id": "TEMP7",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "MOS_TEMP",
+            "temp_id": "TEMP8",
+            "Temperature": {
+                "value": [
+                    {"loc": "/sys/s3ip/temp_sensor/temp18/value", "way": "sysfs"},
+                    {"loc": "/sys/s3ip/temp_sensor/temp19/value", "way": "sysfs"},
+                    {"loc": "/sys/s3ip/temp_sensor/temp20/value", "way": "sysfs"},
+                ],
+                "Min": -30000,
+                "Low": 10000,
+                "High": 100000,
+                "Max":125000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "SFF_TEMP",
+            "Temperature": {
+                "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"},
+                "Min": -15000,
+                "Low": 0,
+                "High": 80000,
+                "Max": 100000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+    ],
+    "leds": [
+        {
+            "name": "FRONT_SYS_LED",
+            "led_type": "SYS_LED",
+            "led": {"loc": "/dev/cpld1", "offset": 0xd2, "len": 1, "way": "devfile"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x07
+            },
+        },
+        {
+            "name": "FRONT_PSU_LED",
+            "led_type": "PSU_LED",
+            "led": {"loc": "/dev/cpld1", "offset": 0xd3, "len": 1, "way": "devfile"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x07
+            },
+        },
+        {
+            "name": "FRONT_FAN_LED",
+            "led_type": "FAN_LED",
+            "led": {"loc": "/dev/cpld1", "offset": 0xd4, "len": 1, "way": "devfile"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x07
+            },
+        },
+    ],
+    "fans": [
+        {
+            "name": "FAN1",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-52/52-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/s3ip/fan/fan1/status", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"loc": "/dev/cpld10", "offset":0xd0, "len": 1,  "way":"devfile"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+            },
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"loc": "/dev/cpld10", "offset":0x90, "len": 1,  "way":"devfile"},
+                    "Running": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/s3ip/fan/fan1/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"loc": "/dev/cpld10", "offset":0x90, "len": 1,  "way":"devfile"},
+                    "Running": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/s3ip/fan/fan1/motor2/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN2",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-53/53-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/s3ip/fan/fan2/status", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"loc": "/dev/cpld10", "offset":0xd1, "len": 1,  "way":"devfile"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+            },
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"loc": "/dev/cpld10", "offset":0x91, "len": 1,  "way":"devfile"},
+                    "Running": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/s3ip/fan/fan2/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"loc": "/dev/cpld10", "offset":0x91, "len": 1,  "way":"devfile"},
+                    "Running": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/s3ip/fan/fan2/motor2/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN3",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-54/54-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/s3ip/fan/fan3/status", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"loc": "/dev/cpld10", "offset":0xd2, "len": 1,  "way":"devfile"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+            },
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"loc": "/dev/cpld10", "offset":0x92, "len": 1,  "way":"devfile"},
+                    "Running": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/s3ip/fan/fan3/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"loc": "/dev/cpld10", "offset":0x92, "len": 1,  "way":"devfile"},
+                    "Running": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/s3ip/fan/fan3/motor2/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN4",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-55/55-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/s3ip/fan/fan4/status", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"loc": "/dev/cpld10", "offset":0xd3, "len": 1,  "way":"devfile"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07
+            },
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"loc": "/dev/cpld10", "offset":0x93, "len": 1,  "way":"devfile"},
+                    "Running": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                     "Speed": {
+                        "value": {"loc": "/sys/s3ip/fan/fan4/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"loc": "/dev/cpld10", "offset":0x93, "len": 1,  "way":"devfile"},
+                    "Running": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/s3ip/fan/fan4/motor2/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+    ],
+    "cplds": [
+        {
+            "name": "CPU_CPLD",
+            "cpld_id": "CPLD1",
+            "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for system power",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "CONNECT_CPLD",
+            "cpld_id": "CPLD2",
+            "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "MAC_CPLDA",
+            "cpld_id": "CPLD3",
+            "VersionFile": {"loc": "/dev/cpld6", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "MAC_CPLDB",
+            "cpld_id": "CPLD4",
+            "VersionFile": {"loc": "/dev/cpld7", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "MAC_CPLDC",
+            "cpld_id": "CPLD5",
+            "VersionFile": {"loc": "/dev/cpld8", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "MGMT_CPLD",
+            "cpld_id": "CPLD6",
+            "VersionFile": {"loc": "/dev/cpld9", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "FAN_CPLD",
+            "cpld_id": "CPLD7",
+            "VersionFile": {"loc": "/dev/cpld10", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for fan modules",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "MAC_FPGA",
+            "cpld_id": "CPLD8",
+            "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "format": "little_endian",
+            "warm": 1,
+        },
+        {
+            "name": "BIOS",
+            "cpld_id": "CPLD9",
+            "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"},
+            "desc": "Performs initialization of hardware components during booting",
+            "slot": 0,
+            "type": "str",
+            "warm": 0,
+        },
+    ],
+    "cpu": [
+        {
+            "name": "cpu",
+            "CpuResetCntReg": {"loc": "/dev/cpld1", "offset": 0x10, "len": 1, "way": "devfile_ascii"},
+            "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"
+        }
+    ],
+    "sfps": {
+        "ver": '1.0',
+        "port_index_start": 0,
+        "port_num": 66,
+        "log_level": 2,
+        "eeprom_retry_times": 5,
+        "eeprom_retry_break_sec": 0.2,
+        "presence_cpld": {
+            "dev_id": {
+                6: {
+                    "offset": {
+                        0x73: "17-24",
+                        0x74: "9-16",
+                        0x75: "1-8",
+                    },
+                },
+                7: {
+                    "offset": {
+                        0x76: "57-64",
+                        0x77: "49-56",
+                        0x78: "41-48",
+                        0x79: "33-40",
+                        0x7a: "25-32",
+                    },
+                },
+                9: {
+                    "offset": {
+                        0x69: "65-66",
+                    },
+                },
+            },
+        },
+        "presence_val_is_present": 0,
+        "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom",
+        "eeprom_path_key": list(range(106, 170)) + [59, 60],
+        "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class",
+        "optoe_driver_key": list(range(106, 170)) + [59, 60],
+        "reset_cpld": {
+            "dev_id": {
+                6: {
+                    "offset": {
+                        0x70: "17-24",
+                        0x71: "9-16",
+                        0x72: "1-8",
+                    },
+                },
+                7: {
+                    "offset": {
+                        0x70: "57-64",
+                        0x71: "49-56",
+                        0x72: "41-48",
+                        0x73: "33-40",
+                        0x74: "25-32",
+                    },
+                },
+            },
+        },
+        "reset_val_is_reset": 0,
+    }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_monitor.py
new file mode 100644
index 000000000000..4e95787950f6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_monitor.py
@@ -0,0 +1,158 @@
+# coding:utf-8
+
+
+monitor = {
+    "openloop": {
+        "linear": {
+            "name": "linear",
+            "flag": 0,
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "K": 11,
+            "tin_min": 38,
+        },
+        "curve": {
+            "name": "curve",
+            "flag": 1,
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "a": -0.38,
+            "b": 33.68,
+            "c": -476,
+            "tin_min": 27,
+        },
+    },
+
+    "pid": {
+        "CPU_TEMP": {
+            "name": "CPU_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 1.5,
+            "Ki": 0.3,
+            "Kd": 0.3,
+            "target": 80,
+            "value": [None, None, None],
+        },
+        "SWITCH_TEMP": {
+            "name": "SWITCH_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 1.5,
+            "Ki": 1,
+            "Kd": 0.3,
+            "target": 90,
+            "value": [None, None, None],
+        },
+        "OUTLET_TEMP": {
+            "name": "OUTLET_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 2,
+            "Ki": 0.4,
+            "Kd": 0.3,
+            "target": 65,
+            "value": [None, None, None],
+        },
+        "MOS_TEMP": {
+            "name": "MOS_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 1,
+            "Ki": 0.1,
+            "Kd": 0.3,
+            "target": 97,
+            "value": [None, None, None],
+        },
+        "SFF_TEMP": {
+            "name": "SFF_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 2,
+            "Ki": 0.3,
+            "Kd": 0,
+            "target": 65,
+            "value": [None, None, None],
+        },
+    },
+
+    "temps_threshold": {
+        "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 105, "invalid": -100000, "error": -99999},
+        "INLET_TEMP": {"name": "INLET_TEMP", "warning": 50, "critical": 55, "fix": -2},
+        "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75},
+        "CPU_TEMP": {"name": "CPU_TEMP", "warning": 90, "critical": 95},
+        "MOS_TEMP": {"name": "MOS_TEMP", "warning": 100, "critical": 125},
+        "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 95, "critical": 100},
+        "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999},
+    },
+
+    "fancontrol_para": {
+        "interval": 5,
+        "max_pwm": 0xff,
+        "min_pwm": 0x80,
+        "abnormal_pwm": 0xff,
+        "warning_pwm": 0xff,
+        "temp_invalid_pid_pwm": 0x80,
+        "temp_error_pid_pwm": 0x80,
+        "temp_fail_num": 3,
+        "check_temp_fail": [
+            {"temp_name": "INLET_TEMP"},
+            {"temp_name": "SWITCH_TEMP"},
+            {"temp_name": "CPU_TEMP"},
+            {"temp_name": "MOS_TEMP"},
+            {"temp_name": "OUTLET_TEMP"},
+            {"temp_name": "BOARD_TEMP"},
+        ],
+        "temp_warning_num": 3,  # temp over warning 3 times continuously
+        "temp_critical_num": 3,  # temp over critical 3 times continuously
+        "temp_warning_countdown": 60,  # 5 min warning speed after not warning
+        "temp_critical_countdown": 60,  # 5 min full speed after not critical
+        "rotor_error_count": 6,  # fan rotor error 6 times continuously
+        "inlet_mac_diff": 999,
+        "check_crit_reboot_flag": 1,
+        "check_crit_reboot_num": 3,
+        "check_crit_sleep_time": 20,
+        "psu_fan_control": 1,
+        "psu_absent_fullspeed_num": 0xFF,
+        "fan_absent_fullspeed_num": 1,
+        "rotor_error_fullspeed_num": 1,
+        "deal_all_fan_error_method_flag": 1,
+        "all_fan_error_switch_temp_critical_temp": 80,
+        "all_fan_error_recover_log": "Power off base and mac board.",
+        "all_fan_error_recover_cmd": "dfd_debug io_wr 0x93a 0x01",
+        "all_fan_error_check_crit_reboot_num": 3,
+        "all_fan_error_check_crit_sleep_time": 2,
+    },
+
+    "ledcontrol_para": {
+        "interval":5,
+        "checkpsu": 0,  # 0: sys led don't follow psu led
+        "checkfan": 0,  # 0: sys led don't follow fan led
+        "psu_amber_num": 1,
+        "fan_amber_num": 1,
+        "board_sys_led": [
+            {"led_name": "FRONT_SYS_LED"},
+        ],
+        "board_psu_led": [
+            {"led_name": "FRONT_PSU_LED"},
+        ],
+        "board_fan_led": [
+            {"led_name": "FRONT_FAN_LED"},
+        ],
+    },
+
+    "otp_reboot_judge_file": {
+        "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag",
+        "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag",
+    },
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/Makefile
new file mode 100644
index 000000000000..8c39927af73d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/Makefile
@@ -0,0 +1,13 @@
+MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
+MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules)
+
+EXTRA_CFLAGS+= -I$(MODULES_DIR)
+
+obj-m += wb_pcie_dev_device.o
+obj-m += wb_io_dev_device.o
+obj-m += wb_fpga_i2c_bus_device.o
+obj-m += wb_i2c_mux_pca954x_device.o
+obj-m += wb_fpga_pca954x_device.o
+obj-m += wb_i2c_dev_device.o
+obj-m += wb_wdt_device.o
+obj-m += wb_indirect_dev_device.o
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_i2c_bus_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_i2c_bus_device.c
new file mode 100644
index 000000000000..60fde91c5102
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_i2c_bus_device.c
@@ -0,0 +1,1101 @@
+/*
+ * An wb_fpga_i2c_bus_device driver for fpga i2c device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <fpga_i2c.h>
+
+static int g_wb_fpga_i2c_debug = 0;
+static int g_wb_fpga_i2c_error = 0;
+
+module_param(g_wb_fpga_i2c_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_fpga_i2c_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_FPGA_I2C_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_fpga_i2c_debug) { \
+        printk(KERN_INFO "[WB_FPGA_I2C][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_FPGA_I2C_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_fpga_i2c_error) { \
+        printk(KERN_ERR "[WB_FPGA_I2C][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+/* CPLD-I2C-MASTER-1 */
+static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data0 = {
+    .adap_nr                 = 2,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x00,
+    .i2c_filter              = 0x04,
+    .i2c_stretch             = 0x08,
+    .i2c_ext_9548_exits_flag = 0x0c,
+    .i2c_ext_9548_addr       = 0x10,
+    .i2c_ext_9548_chan       = 0x14,
+    .i2c_in_9548_chan        = 0x18,
+    .i2c_slave               = 0x1c,
+    .i2c_reg                 = 0x20,
+    .i2c_reg_len             = 0x30,
+    .i2c_data_len            = 0x34,
+    .i2c_ctrl                = 0x38,
+    .i2c_status              = 0x3c,
+    .i2c_err_vec             = 0x48,
+    .i2c_data_buf            = 0x100,
+    .i2c_data_buf_len        = 256,
+    .dev_name                = "/dev/cpld2",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 6,
+    .i2c_adap_reset_flag     = 0,
+    .i2c_reset_addr          = 0x7c,
+    .i2c_reset_on            = 0x00000001,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+/* CPLD-I2C-MASTER-4 */
+static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data1 = {
+    .adap_nr                 = 3,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x00,
+    .i2c_filter              = 0x04,
+    .i2c_stretch             = 0x08,
+    .i2c_ext_9548_exits_flag = 0x0c,
+    .i2c_ext_9548_addr       = 0x10,
+    .i2c_ext_9548_chan       = 0x14,
+    .i2c_in_9548_chan        = 0x18,
+    .i2c_slave               = 0x1c,
+    .i2c_reg                 = 0x20,
+    .i2c_reg_len             = 0x30,
+    .i2c_data_len            = 0x34,
+    .i2c_ctrl                = 0x38,
+    .i2c_status              = 0x3c,
+    .i2c_err_vec             = 0x48,
+    .i2c_data_buf            = 0x100,
+    .i2c_data_buf_len        = 256,
+    .dev_name                = "/dev/cpld5",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 6,
+    .i2c_adap_reset_flag     = 0,
+    .i2c_reset_addr          = 0x7c,
+    .i2c_reset_on            = 0x00000001,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+/* CPLD-I2C-MASTER-2 */
+static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data2 = {
+    .adap_nr                 = 4,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x00,
+    .i2c_filter              = 0x04,
+    .i2c_stretch             = 0x08,
+    .i2c_ext_9548_exits_flag = 0x0c,
+    .i2c_ext_9548_addr       = 0x10,
+    .i2c_ext_9548_chan       = 0x14,
+    .i2c_in_9548_chan        = 0x18,
+    .i2c_slave               = 0x1c,
+    .i2c_reg                 = 0x20,
+    .i2c_reg_len             = 0x30,
+    .i2c_data_len            = 0x34,
+    .i2c_ctrl                = 0x38,
+    .i2c_status              = 0x3c,
+    .i2c_err_vec             = 0x48,
+    .i2c_data_buf            = 0x100,
+    .i2c_data_buf_len        = 256,
+    .dev_name                = "/dev/cpld3",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 6,
+    .i2c_adap_reset_flag     = 0,
+    .i2c_reset_addr          = 0x7c,
+    .i2c_reset_on            = 0x00000001,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+/* CPLD-I2C-MASTER-3 */
+static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data3 = {
+    .adap_nr                 = 5,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x00,
+    .i2c_filter              = 0x04,
+    .i2c_stretch             = 0x08,
+    .i2c_ext_9548_exits_flag = 0x0c,
+    .i2c_ext_9548_addr       = 0x10,
+    .i2c_ext_9548_chan       = 0x14,
+    .i2c_in_9548_chan        = 0x18,
+    .i2c_slave               = 0x1c,
+    .i2c_reg                 = 0x20,
+    .i2c_reg_len             = 0x30,
+    .i2c_data_len            = 0x34,
+    .i2c_ctrl                = 0x38,
+    .i2c_status              = 0x3c,
+    .i2c_err_vec             = 0x48,
+    .i2c_data_buf            = 0x100,
+    .i2c_data_buf_len        = 256,
+    .dev_name                = "/dev/cpld4",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 6,
+    .i2c_adap_reset_flag     = 0,
+    .i2c_reset_addr          = 0x7c,
+    .i2c_reset_on            = 0x00000001,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data4 = {
+    .adap_nr                 = 6,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x1400,
+    .i2c_filter              = 0x1404,
+    .i2c_stretch             = 0x1408,
+    .i2c_ext_9548_exits_flag = 0x140c,
+    .i2c_ext_9548_addr       = 0x1410,
+    .i2c_ext_9548_chan       = 0x1414,
+    .i2c_in_9548_chan        = 0x1418,
+    .i2c_slave               = 0x141c,
+    .i2c_reg                 = 0x1420,
+    .i2c_reg_len             = 0x1430,
+    .i2c_data_len            = 0x1434,
+    .i2c_ctrl                = 0x1438,
+    .i2c_status              = 0x143c,
+    .i2c_err_vec             = 0x1448,
+    .i2c_data_buf            = 0x1480,
+    .dev_name                = "/dev/fpga0",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 3,
+    .i2c_adap_reset_flag     = 1,
+    .i2c_reset_addr          = 0x4c,
+    .i2c_reset_on            = 0x00000001,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data5 = {
+    .adap_nr                 = 7,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x1500,
+    .i2c_filter              = 0x1504,
+    .i2c_stretch             = 0x1508,
+    .i2c_ext_9548_exits_flag = 0x150c,
+    .i2c_ext_9548_addr       = 0x1510,
+    .i2c_ext_9548_chan       = 0x1514,
+    .i2c_in_9548_chan        = 0x1518,
+    .i2c_slave               = 0x151c,
+    .i2c_reg                 = 0x1520,
+    .i2c_reg_len             = 0x1530,
+    .i2c_data_len            = 0x1534,
+    .i2c_ctrl                = 0x1538,
+    .i2c_status              = 0x153c,
+    .i2c_err_vec             = 0x1548,
+    .i2c_data_buf            = 0x1580,
+    .dev_name                = "/dev/fpga0",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 3,
+    .i2c_adap_reset_flag     = 1,
+    .i2c_reset_addr          = 0x50,
+    .i2c_reset_on            = 0x00000001,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data6 = {
+    .adap_nr                 = 8,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x1800,
+    .i2c_filter              = 0x1804,
+    .i2c_stretch             = 0x1808,
+    .i2c_ext_9548_exits_flag = 0x180c,
+    .i2c_ext_9548_addr       = 0x1810,
+    .i2c_ext_9548_chan       = 0x1814,
+    .i2c_in_9548_chan        = 0x1818,
+    .i2c_slave               = 0x181c,
+    .i2c_reg                 = 0x1820,
+    .i2c_reg_len             = 0x1830,
+    .i2c_data_len            = 0x1834,
+    .i2c_ctrl                = 0x1838,
+    .i2c_status              = 0x183c,
+    .i2c_err_vec             = 0x1848,
+    .i2c_data_buf            = 0x1880,
+    .dev_name                = "/dev/fpga0",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 3,
+    .i2c_adap_reset_flag     = 1,
+    .i2c_reset_addr          = 0x54,
+    .i2c_reset_on            = 0x00000001,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data7 = {
+    .adap_nr                 = 9,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x1900,
+    .i2c_filter              = 0x1904,
+    .i2c_stretch             = 0x1908,
+    .i2c_ext_9548_exits_flag = 0x190c,
+    .i2c_ext_9548_addr       = 0x1910,
+    .i2c_ext_9548_chan       = 0x1914,
+    .i2c_in_9548_chan        = 0x1918,
+    .i2c_slave               = 0x191c,
+    .i2c_reg                 = 0x1920,
+    .i2c_reg_len             = 0x1930,
+    .i2c_data_len            = 0x1934,
+    .i2c_ctrl                = 0x1938,
+    .i2c_status              = 0x193c,
+    .i2c_err_vec             = 0x1948,
+    .i2c_data_buf            = 0x1980,
+    .dev_name                = "/dev/fpga0",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 3,
+    .i2c_adap_reset_flag     = 1,
+    .i2c_reset_addr          = 0x58,
+    .i2c_reset_on            = 0x00000001,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data8 = {
+    .adap_nr                 = 10,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x1a00,
+    .i2c_filter              = 0x1a04,
+    .i2c_stretch             = 0x1a08,
+    .i2c_ext_9548_exits_flag = 0x1a0c,
+    .i2c_ext_9548_addr       = 0x1a10,
+    .i2c_ext_9548_chan       = 0x1a14,
+    .i2c_in_9548_chan        = 0x1a18,
+    .i2c_slave               = 0x1a1c,
+    .i2c_reg                 = 0x1a20,
+    .i2c_reg_len             = 0x1a30,
+    .i2c_data_len            = 0x1a34,
+    .i2c_ctrl                = 0x1a38,
+    .i2c_status              = 0x1a3c,
+    .i2c_err_vec             = 0x1a48,
+    .i2c_data_buf            = 0x1a80,
+    .dev_name                = "/dev/fpga0",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 3,
+    .i2c_adap_reset_flag     = 1,
+    .i2c_reset_addr          = 0x7c,
+    .i2c_reset_on            = 0x00000001,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data0 = {
+    .adap_nr                 = 11,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x2000,
+    .i2c_filter              = 0x2004,
+    .i2c_stretch             = 0x2008,
+    .i2c_ext_9548_exits_flag = 0x200c,
+    .i2c_ext_9548_addr       = 0x2010,
+    .i2c_ext_9548_chan       = 0x2014,
+    .i2c_in_9548_chan        = 0x2018,
+    .i2c_slave               = 0x201c,
+    .i2c_reg                 = 0x2020,
+    .i2c_reg_len             = 0x2030,
+    .i2c_data_len            = 0x2034,
+    .i2c_ctrl                = 0x2038,
+    .i2c_status              = 0x203c,
+    .i2c_err_vec             = 0x2048,
+    .i2c_data_buf            = 0x2080,
+    .dev_name                = "/dev/fpga0",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 3,
+    .i2c_adap_reset_flag     = 1,
+    .i2c_reset_addr          = 0x7c,
+    .i2c_reset_on            = 0x00000002,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data1 = {
+    .adap_nr                 = 12,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x2100,
+    .i2c_filter              = 0x2104,
+    .i2c_stretch             = 0x2108,
+    .i2c_ext_9548_exits_flag = 0x210c,
+    .i2c_ext_9548_addr       = 0x2110,
+    .i2c_ext_9548_chan       = 0x2114,
+    .i2c_in_9548_chan        = 0x2118,
+    .i2c_slave               = 0x211c,
+    .i2c_reg                 = 0x2120,
+    .i2c_reg_len             = 0x2130,
+    .i2c_data_len            = 0x2134,
+    .i2c_ctrl                = 0x2138,
+    .i2c_status              = 0x213c,
+    .i2c_err_vec             = 0x2148,
+    .i2c_data_buf            = 0x2180,
+    .dev_name                = "/dev/fpga0",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 3,
+    .i2c_adap_reset_flag     = 1,
+    .i2c_reset_addr          = 0x7c,
+    .i2c_reset_on            = 0x0000004,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data2 = {
+    .adap_nr                 = 13,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x2200,
+    .i2c_filter              = 0x2204,
+    .i2c_stretch             = 0x2208,
+    .i2c_ext_9548_exits_flag = 0x220c,
+    .i2c_ext_9548_addr       = 0x2210,
+    .i2c_ext_9548_chan       = 0x2214,
+    .i2c_in_9548_chan        = 0x2218,
+    .i2c_slave               = 0x221c,
+    .i2c_reg                 = 0x2220,
+    .i2c_reg_len             = 0x2230,
+    .i2c_data_len            = 0x2234,
+    .i2c_ctrl                = 0x2238,
+    .i2c_status              = 0x223c,
+    .i2c_err_vec             = 0x2248,
+    .i2c_data_buf            = 0x2280,
+    .dev_name                = "/dev/fpga0",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 3,
+    .i2c_adap_reset_flag     = 1,
+    .i2c_reset_addr          = 0x7c,
+    .i2c_reset_on            = 0x00000008,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data3 = {
+    .adap_nr                 = 14,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x2300,
+    .i2c_filter              = 0x2304,
+    .i2c_stretch             = 0x2308,
+    .i2c_ext_9548_exits_flag = 0x230c,
+    .i2c_ext_9548_addr       = 0x2310,
+    .i2c_ext_9548_chan       = 0x2314,
+    .i2c_in_9548_chan        = 0x2318,
+    .i2c_slave               = 0x231c,
+    .i2c_reg                 = 0x2320,
+    .i2c_reg_len             = 0x2330,
+    .i2c_data_len            = 0x2334,
+    .i2c_ctrl                = 0x2338,
+    .i2c_status              = 0x233c,
+    .i2c_err_vec             = 0x2348,
+    .i2c_data_buf            = 0x2380,
+    .dev_name                = "/dev/fpga0",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 3,
+    .i2c_adap_reset_flag     = 1,
+    .i2c_reset_addr          = 0x7c,
+    .i2c_reset_on            = 0x00000010,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data4 = {
+    .adap_nr                 = 15,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x2400,
+    .i2c_filter              = 0x2404,
+    .i2c_stretch             = 0x2408,
+    .i2c_ext_9548_exits_flag = 0x240c,
+    .i2c_ext_9548_addr       = 0x2410,
+    .i2c_ext_9548_chan       = 0x2414,
+    .i2c_in_9548_chan        = 0x2418,
+    .i2c_slave               = 0x241c,
+    .i2c_reg                 = 0x2420,
+    .i2c_reg_len             = 0x2430,
+    .i2c_data_len            = 0x2434,
+    .i2c_ctrl                = 0x2438,
+    .i2c_status              = 0x243c,
+    .i2c_err_vec             = 0x2448,
+    .i2c_data_buf            = 0x2480,
+    .dev_name                = "/dev/fpga0",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 3,
+    .i2c_adap_reset_flag     = 1,
+    .i2c_reset_addr          = 0x7c,
+    .i2c_reset_on            = 0x00000020,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data5 = {
+    .adap_nr                 = 16,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x2500,
+    .i2c_filter              = 0x2504,
+    .i2c_stretch             = 0x2508,
+    .i2c_ext_9548_exits_flag = 0x250c,
+    .i2c_ext_9548_addr       = 0x2510,
+    .i2c_ext_9548_chan       = 0x2514,
+    .i2c_in_9548_chan        = 0x2518,
+    .i2c_slave               = 0x251c,
+    .i2c_reg                 = 0x2520,
+    .i2c_reg_len             = 0x2530,
+    .i2c_data_len            = 0x2534,
+    .i2c_ctrl                = 0x2538,
+    .i2c_status              = 0x253c,
+    .i2c_err_vec             = 0x2548,
+    .i2c_data_buf            = 0x2580,
+    .dev_name                = "/dev/fpga0",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 3,
+    .i2c_adap_reset_flag     = 1,
+    .i2c_reset_addr          = 0x7c,
+    .i2c_reset_on            = 0x00000040,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data6 = {
+    .adap_nr                 = 17,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x2600,
+    .i2c_filter              = 0x2604,
+    .i2c_stretch             = 0x2608,
+    .i2c_ext_9548_exits_flag = 0x260c,
+    .i2c_ext_9548_addr       = 0x2610,
+    .i2c_ext_9548_chan       = 0x2614,
+    .i2c_in_9548_chan        = 0x2618,
+    .i2c_slave               = 0x261c,
+    .i2c_reg                 = 0x2620,
+    .i2c_reg_len             = 0x2630,
+    .i2c_data_len            = 0x2634,
+    .i2c_ctrl                = 0x2638,
+    .i2c_status              = 0x263c,
+    .i2c_err_vec             = 0x2648,
+    .i2c_data_buf            = 0x2680,
+    .dev_name                = "/dev/fpga0",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 3,
+    .i2c_adap_reset_flag     = 1,
+    .i2c_reset_addr          = 0x7c,
+    .i2c_reset_on            = 0x00000080,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data7 = {
+    .adap_nr                 = 18,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x2700,
+    .i2c_filter              = 0x2704,
+    .i2c_stretch             = 0x2708,
+    .i2c_ext_9548_exits_flag = 0x270c,
+    .i2c_ext_9548_addr       = 0x2710,
+    .i2c_ext_9548_chan       = 0x2714,
+    .i2c_in_9548_chan        = 0x2718,
+    .i2c_slave               = 0x271c,
+    .i2c_reg                 = 0x2720,
+    .i2c_reg_len             = 0x2730,
+    .i2c_data_len            = 0x2734,
+    .i2c_ctrl                = 0x2738,
+    .i2c_status              = 0x273c,
+    .i2c_err_vec             = 0x2748,
+    .i2c_data_buf            = 0x2780,
+    .dev_name                = "/dev/fpga0",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 3,
+    .i2c_adap_reset_flag     = 1,
+    .i2c_reset_addr          = 0x7c,
+    .i2c_reset_on            = 0x00000100,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data8 = {
+    .adap_nr                 = 19,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x2800,
+    .i2c_filter              = 0x2804,
+    .i2c_stretch             = 0x2808,
+    .i2c_ext_9548_exits_flag = 0x280c,
+    .i2c_ext_9548_addr       = 0x2810,
+    .i2c_ext_9548_chan       = 0x2814,
+    .i2c_in_9548_chan        = 0x2818,
+    .i2c_slave               = 0x281c,
+    .i2c_reg                 = 0x2820,
+    .i2c_reg_len             = 0x2830,
+    .i2c_data_len            = 0x2834,
+    .i2c_ctrl                = 0x2838,
+    .i2c_status              = 0x283c,
+    .i2c_err_vec             = 0x2848,
+    .i2c_data_buf            = 0x2880,
+    .dev_name                = "/dev/fpga0",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 3,
+    .i2c_adap_reset_flag     = 1,
+    .i2c_reset_addr          = 0x7c,
+    .i2c_reset_on            = 0x00000200,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data9 = {
+    .adap_nr                 = 20,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x2900,
+    .i2c_filter              = 0x2904,
+    .i2c_stretch             = 0x2908,
+    .i2c_ext_9548_exits_flag = 0x290c,
+    .i2c_ext_9548_addr       = 0x2910,
+    .i2c_ext_9548_chan       = 0x2914,
+    .i2c_in_9548_chan        = 0x2918,
+    .i2c_slave               = 0x291c,
+    .i2c_reg                 = 0x2920,
+    .i2c_reg_len             = 0x2930,
+    .i2c_data_len            = 0x2934,
+    .i2c_ctrl                = 0x2938,
+    .i2c_status              = 0x293c,
+    .i2c_err_vec             = 0x2948,
+    .i2c_data_buf            = 0x2980,
+    .dev_name                = "/dev/fpga0",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 3,
+    .i2c_adap_reset_flag     = 1,
+    .i2c_reset_addr          = 0x7c,
+    .i2c_reset_on            = 0x00000400,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data10 = {
+    .adap_nr                 = 21,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x2a00,
+    .i2c_filter              = 0x2a04,
+    .i2c_stretch             = 0x2a08,
+    .i2c_ext_9548_exits_flag = 0x2a0c,
+    .i2c_ext_9548_addr       = 0x2a10,
+    .i2c_ext_9548_chan       = 0x2a14,
+    .i2c_in_9548_chan        = 0x2a18,
+    .i2c_slave               = 0x2a1c,
+    .i2c_reg                 = 0x2a20,
+    .i2c_reg_len             = 0x2a30,
+    .i2c_data_len            = 0x2a34,
+    .i2c_ctrl                = 0x2a38,
+    .i2c_status              = 0x2a3c,
+    .i2c_err_vec             = 0x2a48,
+    .i2c_data_buf            = 0x2a80,
+    .dev_name                = "/dev/fpga0",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 3,
+    .i2c_adap_reset_flag     = 1,
+    .i2c_reset_addr          = 0x7c,
+    .i2c_reset_on            = 0x00000800,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data11 = {
+    .adap_nr                 = 22,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x2b00,
+    .i2c_filter              = 0x2b04,
+    .i2c_stretch             = 0x2b08,
+    .i2c_ext_9548_exits_flag = 0x2b0c,
+    .i2c_ext_9548_addr       = 0x2b10,
+    .i2c_ext_9548_chan       = 0x2b14,
+    .i2c_in_9548_chan        = 0x2b18,
+    .i2c_slave               = 0x2b1c,
+    .i2c_reg                 = 0x2b20,
+    .i2c_reg_len             = 0x2b30,
+    .i2c_data_len            = 0x2b34,
+    .i2c_ctrl                = 0x2b38,
+    .i2c_status              = 0x2b3c,
+    .i2c_err_vec             = 0x2b48,
+    .i2c_data_buf            = 0x2b80,
+    .dev_name                = "/dev/fpga0",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 3,
+    .i2c_adap_reset_flag     = 1,
+    .i2c_reset_addr          = 0x7c,
+    .i2c_reset_on            = 0x00001000,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data12 = {
+    .adap_nr                 = 23,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x2c00,
+    .i2c_filter              = 0x2c04,
+    .i2c_stretch             = 0x2c08,
+    .i2c_ext_9548_exits_flag = 0x2c0c,
+    .i2c_ext_9548_addr       = 0x2c10,
+    .i2c_ext_9548_chan       = 0x2c14,
+    .i2c_in_9548_chan        = 0x2c18,
+    .i2c_slave               = 0x2c1c,
+    .i2c_reg                 = 0x2c20,
+    .i2c_reg_len             = 0x2c30,
+    .i2c_data_len            = 0x2c34,
+    .i2c_ctrl                = 0x2c38,
+    .i2c_status              = 0x2c3c,
+    .i2c_err_vec             = 0x2c48,
+    .i2c_data_buf            = 0x2c80,
+    .dev_name                = "/dev/fpga0",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 3,
+    .i2c_adap_reset_flag     = 1,
+    .i2c_reset_addr          = 0x7c,
+    .i2c_reset_on            = 0x00002000,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data13 = {
+    .adap_nr                 = 24,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x2d00,
+    .i2c_filter              = 0x2d04,
+    .i2c_stretch             = 0x2d08,
+    .i2c_ext_9548_exits_flag = 0x2d0c,
+    .i2c_ext_9548_addr       = 0x2d10,
+    .i2c_ext_9548_chan       = 0x2d14,
+    .i2c_in_9548_chan        = 0x2d18,
+    .i2c_slave               = 0x2d1c,
+    .i2c_reg                 = 0x2d20,
+    .i2c_reg_len             = 0x2d30,
+    .i2c_data_len            = 0x2d34,
+    .i2c_ctrl                = 0x2d38,
+    .i2c_status              = 0x2d3c,
+    .i2c_err_vec             = 0x2d48,
+    .i2c_data_buf            = 0x2d80,
+    .dev_name                = "/dev/fpga0",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 3,
+    .i2c_adap_reset_flag     = 1,
+    .i2c_reset_addr          = 0x7c,
+    .i2c_reset_on            = 0x00004000,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data14 = {
+    .adap_nr                 = 25,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x2e00,
+    .i2c_filter              = 0x2e04,
+    .i2c_stretch             = 0x2e08,
+    .i2c_ext_9548_exits_flag = 0x2e0c,
+    .i2c_ext_9548_addr       = 0x2e10,
+    .i2c_ext_9548_chan       = 0x2e14,
+    .i2c_in_9548_chan        = 0x2e18,
+    .i2c_slave               = 0x2e1c,
+    .i2c_reg                 = 0x2e20,
+    .i2c_reg_len             = 0x2e30,
+    .i2c_data_len            = 0x2e34,
+    .i2c_ctrl                = 0x2e38,
+    .i2c_status              = 0x2e3c,
+    .i2c_err_vec             = 0x2e48,
+    .i2c_data_buf            = 0x2e80,
+    .dev_name                = "/dev/fpga0",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 3,
+    .i2c_adap_reset_flag     = 1,
+    .i2c_reset_addr          = 0x7c,
+    .i2c_reset_on            = 0x00008000,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data15 = {
+    .adap_nr                 = 26,
+    .i2c_timeout             = 3000,
+    .i2c_scale               = 0x2f00,
+    .i2c_filter              = 0x2f04,
+    .i2c_stretch             = 0x2f08,
+    .i2c_ext_9548_exits_flag = 0x2f0c,
+    .i2c_ext_9548_addr       = 0x2f10,
+    .i2c_ext_9548_chan       = 0x2f14,
+    .i2c_in_9548_chan        = 0x2f18,
+    .i2c_slave               = 0x2f1c,
+    .i2c_reg                 = 0x2f20,
+    .i2c_reg_len             = 0x2f30,
+    .i2c_data_len            = 0x2f34,
+    .i2c_ctrl                = 0x2f38,
+    .i2c_status              = 0x2f3c,
+    .i2c_err_vec             = 0x2f48,
+    .i2c_data_buf            = 0x2f80,
+    .dev_name                = "/dev/fpga0",
+    .i2c_scale_value         = 0x4e,
+    .i2c_filter_value        = 0x7c,
+    .i2c_stretch_value       = 0x7c,
+    .i2c_func_mode           = 3,
+    .i2c_adap_reset_flag     = 1,
+    .i2c_reset_addr          = 0x7c,
+    .i2c_reset_on            = 0x00010000,
+    .i2c_reset_off           = 0x00000000,
+    .i2c_rst_delay_b         = 0, /* delay time before reset(us) */
+    .i2c_rst_delay           = 1, /* reset time(us) */
+    .i2c_rst_delay_a         = 1, /* delay time after reset(us) */
+};
+
+static void wb_fpga_i2c_bus_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device fpga_i2c_bus_device[] = {
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &fpga0_i2c_bus_device_data0,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &fpga0_i2c_bus_device_data1,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 3,
+        .dev    = {
+            .platform_data  = &fpga0_i2c_bus_device_data2,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 4,
+        .dev    = {
+            .platform_data  = &fpga0_i2c_bus_device_data3,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 5,
+        .dev    = {
+            .platform_data  = &fpga0_i2c_bus_device_data4,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 6,
+        .dev    = {
+            .platform_data  = &fpga0_i2c_bus_device_data5,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 7,
+        .dev    = {
+            .platform_data  = &fpga0_i2c_bus_device_data6,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 8,
+        .dev    = {
+            .platform_data  = &fpga0_i2c_bus_device_data7,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 9,
+        .dev    = {
+            .platform_data  = &fpga0_i2c_bus_device_data8,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 10,
+        .dev    = {
+            .platform_data  = &fpga0_dom_i2c_bus_device_data0,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 11,
+        .dev    = {
+            .platform_data  = &fpga0_dom_i2c_bus_device_data1,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 12,
+        .dev    = {
+            .platform_data  = &fpga0_dom_i2c_bus_device_data2,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 13,
+        .dev    = {
+            .platform_data  = &fpga0_dom_i2c_bus_device_data3,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 14,
+        .dev    = {
+            .platform_data  = &fpga0_dom_i2c_bus_device_data4,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 15,
+        .dev    = {
+            .platform_data  = &fpga0_dom_i2c_bus_device_data5,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 16,
+        .dev    = {
+            .platform_data  = &fpga0_dom_i2c_bus_device_data6,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 17,
+        .dev    = {
+            .platform_data  = &fpga0_dom_i2c_bus_device_data7,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 18,
+        .dev    = {
+            .platform_data  = &fpga0_dom_i2c_bus_device_data8,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 19,
+        .dev    = {
+            .platform_data  = &fpga0_dom_i2c_bus_device_data9,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 20,
+        .dev    = {
+            .platform_data  = &fpga0_dom_i2c_bus_device_data10,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 21,
+        .dev    = {
+            .platform_data  = &fpga0_dom_i2c_bus_device_data11,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 22,
+        .dev    = {
+            .platform_data  = &fpga0_dom_i2c_bus_device_data12,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 23,
+        .dev    = {
+            .platform_data  = &fpga0_dom_i2c_bus_device_data13,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 24,
+        .dev    = {
+            .platform_data  = &fpga0_dom_i2c_bus_device_data14,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 25,
+        .dev    = {
+            .platform_data  = &fpga0_dom_i2c_bus_device_data15,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+};
+
+static int __init wb_fpga_i2c_bus_device_init(void)
+{
+    int i;
+    int ret = 0;
+    fpga_i2c_bus_device_t *fpga_i2c_bus_device_data;
+
+    WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(fpga_i2c_bus_device); i++) {
+        fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data;
+        ret = platform_device_register(&fpga_i2c_bus_device[i]);
+        if (ret < 0) {
+            fpga_i2c_bus_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-fpga-i2c.%d register failed!\n", i + 1);
+        } else {
+            fpga_i2c_bus_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_fpga_i2c_bus_device_exit(void)
+{
+    int i;
+    fpga_i2c_bus_device_t *fpga_i2c_bus_device_data;
+
+    WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(fpga_i2c_bus_device) - 1; i >= 0; i--) {
+        fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data;
+        if (fpga_i2c_bus_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&fpga_i2c_bus_device[i]);
+        }
+    }
+}
+
+module_init(wb_fpga_i2c_bus_device_init);
+module_exit(wb_fpga_i2c_bus_device_exit);
+MODULE_DESCRIPTION("FPGA I2C Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_pca954x_device.c
new file mode 100644
index 000000000000..043ec82366ec
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_pca954x_device.c
@@ -0,0 +1,489 @@
+/*
+ * An wb_fpga_pca954x_device driver for fpga pca954x device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <fpga_i2c.h>
+
+static int g_wb_fpga_pca954x_device_debug = 0;
+static int g_wb_fpga_pca954x_device_error = 0;
+
+module_param(g_wb_fpga_pca954x_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_fpga_pca954x_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_fpga_pca954x_device_debug) { \
+        printk(KERN_INFO "[WB_FPGA_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_FPGA_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_fpga_pca954x_device_error) { \
+        printk(KERN_ERR "[WB_FPGA_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+/* CPLD-I2C-MASTER-1 */
+static fpga_pca954x_device_t fpga_pca954x_device_data0 = {
+    .i2c_bus = 2,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 27,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data1 = {
+    .i2c_bus = 27,
+    .i2c_addr = 0x76,
+    .pca9548_base_nr = 42,
+    .fpga_9548_flag = 2,
+    .fpga_9548_reset_flag = 1,
+};
+
+/* CPLD-I2C-MASTER-4 */
+static fpga_pca954x_device_t fpga_pca954x_device_data2 = {
+    .i2c_bus = 3,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 28,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data3 = {
+    .i2c_bus = 28,
+    .i2c_addr = 0x77,
+    .pca9548_base_nr = 50,
+    .fpga_9548_flag = 2,
+    .fpga_9548_reset_flag = 1,
+};
+
+/* CPLD-I2C-MASTER-2 */
+static fpga_pca954x_device_t fpga_pca954x_device_data4 = {
+    .i2c_bus = 4,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 29,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data5 = {
+    .i2c_bus =29,
+    .i2c_addr = 0x77,
+    .pca9548_base_nr = 58,
+    .fpga_9548_flag = 2,
+    .fpga_9548_reset_flag = 1,
+};
+
+/* CPLD-I2C-MASTER-3 */
+static fpga_pca954x_device_t fpga_pca954x_device_data6 = {
+    .i2c_bus = 5,
+    .i2c_addr = 0x71,
+    .pca9548_base_nr = 30,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data7 = {
+    .i2c_bus = 30,
+    .i2c_addr = 0x77,
+    .pca9548_base_nr = 66,
+    .fpga_9548_flag = 2,
+    .fpga_9548_reset_flag = 1,
+};
+
+/* fpga-i2c-1 */
+static fpga_pca954x_device_t fpga_pca954x_device_data8 = {
+    .i2c_bus = 6,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 31,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data9 = {
+    .i2c_bus = 31,
+    .i2c_addr = 0x76,
+    .pca9548_base_nr = 74,
+    .fpga_9548_flag = 2,
+    .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data10 = {
+    .i2c_bus = 7,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 32,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data11 = {
+    .i2c_bus = 32,
+    .i2c_addr = 0x76,
+    .pca9548_base_nr = 82,
+    .fpga_9548_flag = 2,
+    .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data12 = {
+    .i2c_bus = 8,
+    .i2c_addr = 0x71,
+    .pca9548_base_nr = 33,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data13 = {
+    .i2c_bus = 33,
+    .i2c_addr = 0x76,
+    .pca9548_base_nr = 90,
+    .fpga_9548_flag = 2,
+    .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data14 = {
+    .i2c_bus = 9,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 98,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data15 = {
+    .i2c_bus = 10,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 102,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data16 = {
+    .i2c_bus = 11,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 106,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data17 = {
+    .i2c_bus = 12,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 110,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data18 = {
+    .i2c_bus = 13,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 114,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data19 = {
+    .i2c_bus = 14,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 118,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data20 = {
+    .i2c_bus = 15,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 122,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data21 = {
+    .i2c_bus = 16,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 126,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data22 = {
+    .i2c_bus = 17,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 130,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data23 = {
+    .i2c_bus = 18,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 134,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data24 = {
+    .i2c_bus = 19,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 138,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data25 = {
+    .i2c_bus = 20,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 142,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data26 = {
+    .i2c_bus = 21,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 146,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data27 = {
+    .i2c_bus = 22,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 150,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data28 = {
+    .i2c_bus = 23,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 154,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data29 = {
+    .i2c_bus = 24,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 158,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data30 = {
+    .i2c_bus = 25,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 162,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data31 = {
+    .i2c_bus = 26,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 166,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+struct i2c_board_info fpga_pca954x_device_info[] = {
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data0,
+    },
+    {
+        .type = "wb_fpga_pca9548",
+        .platform_data = &fpga_pca954x_device_data1,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data2,
+    },
+    {
+        .type = "wb_fpga_pca9548",
+        .platform_data = &fpga_pca954x_device_data3,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data4,
+    },
+    {
+        .type = "wb_fpga_pca9548",
+        .platform_data = &fpga_pca954x_device_data5,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data6,
+    },
+    {
+        .type = "wb_fpga_pca9548",
+        .platform_data = &fpga_pca954x_device_data7,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data8,
+    },
+    {
+        .type = "wb_fpga_pca9548",
+        .platform_data = &fpga_pca954x_device_data9,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data10,
+    },
+    {
+        .type = "wb_fpga_pca9548",
+        .platform_data = &fpga_pca954x_device_data11,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data12,
+    },
+    {
+        .type = "wb_fpga_pca9548",
+        .platform_data = &fpga_pca954x_device_data13,
+    },
+    {
+        .type = "wb_fpga_pca9544",
+        .platform_data = &fpga_pca954x_device_data14,
+    },
+    {
+        .type = "wb_fpga_pca9544",
+        .platform_data = &fpga_pca954x_device_data15,
+    },
+    {
+        .type = "wb_fpga_pca9544",
+        .platform_data = &fpga_pca954x_device_data16,
+    },
+    {
+        .type = "wb_fpga_pca9544",
+        .platform_data = &fpga_pca954x_device_data17,
+    },
+    {
+        .type = "wb_fpga_pca9544",
+        .platform_data = &fpga_pca954x_device_data18,
+    },
+    {
+        .type = "wb_fpga_pca9544",
+        .platform_data = &fpga_pca954x_device_data19,
+    },
+    {
+        .type = "wb_fpga_pca9544",
+        .platform_data = &fpga_pca954x_device_data20,
+    },
+    {
+        .type = "wb_fpga_pca9544",
+        .platform_data = &fpga_pca954x_device_data21,
+    },
+    {
+        .type = "wb_fpga_pca9544",
+        .platform_data = &fpga_pca954x_device_data22,
+    },
+    {
+        .type = "wb_fpga_pca9544",
+        .platform_data = &fpga_pca954x_device_data23,
+    },
+    {
+        .type = "wb_fpga_pca9544",
+        .platform_data = &fpga_pca954x_device_data24,
+    },
+    {
+        .type = "wb_fpga_pca9544",
+        .platform_data = &fpga_pca954x_device_data25,
+    },
+    {
+        .type = "wb_fpga_pca9544",
+        .platform_data = &fpga_pca954x_device_data26,
+    },
+    {
+        .type = "wb_fpga_pca9544",
+        .platform_data = &fpga_pca954x_device_data27,
+    },
+    {
+        .type = "wb_fpga_pca9544",
+        .platform_data = &fpga_pca954x_device_data28,
+    },
+    {
+        .type = "wb_fpga_pca9544",
+        .platform_data = &fpga_pca954x_device_data29,
+    },
+    {
+        .type = "wb_fpga_pca9544",
+        .platform_data = &fpga_pca954x_device_data30,
+    },
+    {
+        .type = "wb_fpga_pca9544",
+        .platform_data = &fpga_pca954x_device_data31,
+    },
+};
+
+static int __init wb_fpga_pca954x_device_init(void)
+{
+    int i;
+    struct i2c_adapter *adap;
+    struct i2c_client *client;
+    fpga_pca954x_device_t *fpga_pca954x_device_data;
+
+    WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(fpga_pca954x_device_info); i++) {
+        fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data;
+        fpga_pca954x_device_info[i].addr = fpga_pca954x_device_data->i2c_addr;
+        adap = i2c_get_adapter(fpga_pca954x_device_data->i2c_bus);
+        if (adap == NULL) {
+            fpga_pca954x_device_data->client = NULL;
+            printk(KERN_ERR "get i2c bus %d adapter fail.\n", fpga_pca954x_device_data->i2c_bus);
+            continue;
+        }
+        client = i2c_new_client_device(adap, &fpga_pca954x_device_info[i]);
+        if (!client) {
+            fpga_pca954x_device_data->client = NULL;
+            printk(KERN_ERR "Failed to register fpga pca954x device %d at bus %d!\n",
+                fpga_pca954x_device_data->i2c_addr, fpga_pca954x_device_data->i2c_bus);
+        } else {
+            fpga_pca954x_device_data->client = client;
+        }
+        i2c_put_adapter(adap);
+    }
+    return 0;
+}
+
+static void __exit wb_fpga_pca954x_device_exit(void)
+{
+    int i;
+    fpga_pca954x_device_t *fpga_pca954x_device_data;
+
+    WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(fpga_pca954x_device_info) - 1; i >= 0; i--) {
+        fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data;
+        if (fpga_pca954x_device_data->client) {
+            i2c_unregister_device(fpga_pca954x_device_data->client);
+            fpga_pca954x_device_data->client = NULL;
+        }
+    }
+}
+
+module_init(wb_fpga_pca954x_device_init);
+module_exit(wb_fpga_pca954x_device_exit);
+MODULE_DESCRIPTION("FPGA PCA954X Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_dev_device.c
new file mode 100644
index 000000000000..92bced35580d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_dev_device.c
@@ -0,0 +1,181 @@
+/*
+ * An wb_io_dev_device driver for io device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_i2c_dev.h>
+
+static int g_wb_i2c_dev_device_debug = 0;
+static int g_wb_i2c_dev_device_error = 0;
+
+module_param(g_wb_i2c_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_i2c_dev_device_debug) { \
+        printk(KERN_INFO "[WB_I2C_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_I2C_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_i2c_dev_device_error) { \
+        printk(KERN_ERR "[WB_I2C_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+/* mac cplda */
+static i2c_dev_device_t i2c_dev_device_data0 = {
+    .i2c_bus = 98,
+    .i2c_addr = 0x1d,
+    .i2c_name = "cpld6",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+/* mac cpldb */
+static i2c_dev_device_t i2c_dev_device_data1 = {
+    .i2c_bus = 99,
+    .i2c_addr = 0x2d,
+    .i2c_name = "cpld7",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+/* mac cpldc */
+static i2c_dev_device_t i2c_dev_device_data2 = {
+    .i2c_bus = 100,
+    .i2c_addr = 0x3d,
+    .i2c_name = "cpld8",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+/* mgmt cpld */
+static i2c_dev_device_t i2c_dev_device_data3 = {
+    .i2c_bus = 5,
+    .i2c_addr = 0x1a,
+    .i2c_name = "cpld9",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+/* fan cpld */
+static i2c_dev_device_t i2c_dev_device_data4 = {
+    .i2c_bus = 50,
+    .i2c_addr = 0x0d,
+    .i2c_name = "cpld10",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+
+struct i2c_board_info i2c_dev_device_info[] = {
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data0,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data1,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data2,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data3,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data4,
+    },
+};
+
+static int __init wb_i2c_dev_device_init(void)
+{
+    int i;
+    struct i2c_adapter *adap;
+    struct i2c_client *client;
+    i2c_dev_device_t *i2c_dev_device_data;
+
+    WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(i2c_dev_device_info); i++) {
+        i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+        i2c_dev_device_info[i].addr = i2c_dev_device_data->i2c_addr;
+        adap = i2c_get_adapter(i2c_dev_device_data->i2c_bus);
+        if (adap == NULL) {
+            i2c_dev_device_data->client = NULL;
+            printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_dev_device_data->i2c_bus);
+            continue;
+        }
+        client = i2c_new_client_device(adap, &i2c_dev_device_info[i]);
+        if (!client) {
+            i2c_dev_device_data->client = NULL;
+            printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n",
+                i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus);
+        } else {
+            i2c_dev_device_data->client = client;
+        }
+        i2c_put_adapter(adap);
+    }
+    return 0;
+}
+
+static void __exit wb_i2c_dev_device_exit(void)
+{
+    int i;
+    i2c_dev_device_t *i2c_dev_device_data;
+
+    WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(i2c_dev_device_info) - 1; i >= 0; i--) {
+        i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+        if (i2c_dev_device_data->client) {
+            i2c_unregister_device(i2c_dev_device_data->client);
+            i2c_dev_device_data->client = NULL;
+        }
+    }
+}
+
+module_init(wb_i2c_dev_device_init);
+module_exit(wb_i2c_dev_device_exit);
+MODULE_DESCRIPTION("I2C DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_mux_pca954x_device.c
new file mode 100644
index 000000000000..1bc2aafed2a9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_mux_pca954x_device.c
@@ -0,0 +1,122 @@
+/*
+ * An wb_i2c_mux_pca954x_device driver for pca954x i2c load device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_i2c_mux_pca954x.h>
+
+static int g_wb_i2c_mux_pca954x_device_debug = 0;
+static int g_wb_i2c_mux_pca954x_device_error = 0;
+
+module_param(g_wb_i2c_mux_pca954x_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_mux_pca954x_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_i2c_mux_pca954x_device_debug) { \
+        printk(KERN_INFO "[WB_I2C_MUX_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_i2c_mux_pca954x_device_error) { \
+        printk(KERN_ERR "[WB_I2C_MUX_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data0 = {
+    .i2c_bus                        = 1,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 1,
+    .close_chan_force_reset         = 1,
+    .pca9548_base_nr                = 34,
+    .pca9548_reset_type             = PCA9548_RESET_IO,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .io_attr.io_addr            = 0x91e,
+        .io_attr.mask               = 0x01,
+        .io_attr.reset_on           = 0,
+        .io_attr.reset_off          = 0x01,
+    },
+};
+
+struct i2c_board_info i2c_mux_pca954x_device_info[] = {
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data0,
+    },
+};
+
+static int __init wb_i2c_mux_pca954x_device_init(void)
+{
+    int i;
+    struct i2c_adapter *adap;
+    struct i2c_client *client;
+    i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data;
+    WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(i2c_mux_pca954x_device_info); i++) {
+        i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data;
+        i2c_mux_pca954x_device_info[i].addr = i2c_mux_pca954x_device_data->i2c_addr;
+        adap = i2c_get_adapter(i2c_mux_pca954x_device_data->i2c_bus);
+        if (adap == NULL) {
+            i2c_mux_pca954x_device_data->client = NULL;
+            printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_mux_pca954x_device_data->i2c_bus);
+            continue;
+        }
+        client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]);
+        if (!client) {
+            i2c_mux_pca954x_device_data->client = NULL;
+            printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n",
+                i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus);
+        } else {
+            i2c_mux_pca954x_device_data->client = client;
+        }
+        i2c_put_adapter(adap);
+    }
+    return 0;
+}
+
+static void __exit wb_i2c_mux_pca954x_device_exit(void)
+{
+    int i;
+    i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data;
+
+    WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(i2c_mux_pca954x_device_info) - 1; i >= 0; i--) {
+        i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data;
+        if (i2c_mux_pca954x_device_data->client) {
+            i2c_unregister_device(i2c_mux_pca954x_device_data->client);
+            i2c_mux_pca954x_device_data->client = NULL;
+        }
+    }
+}
+
+module_init(wb_i2c_mux_pca954x_device_init);
+module_exit(wb_i2c_mux_pca954x_device_exit);
+MODULE_DESCRIPTION("WB I2C MUX PCA954X Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_indirect_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_indirect_dev_device.c
new file mode 100644
index 000000000000..82b692e414cc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_indirect_dev_device.c
@@ -0,0 +1,193 @@
+/*
+ * An wb_indirect_dev_device driver for indirect load device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_indirect_dev.h>
+
+static int g_indirect_dev_device_debug = 0;
+static int g_indirect_dev_device_error = 0;
+
+module_param(g_indirect_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_indirect_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define INDIRECT_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_indirect_dev_device_debug) { \
+        printk(KERN_INFO "[INDIRECT_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define INDIRECT_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_indirect_dev_device_error) { \
+        printk(KERN_ERR "[INDIRECT_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+/* CPLD-I2C-MASTER-0 */
+static indirect_dev_device_t indirect_dev_device_data0 = {
+    .logic_func_mode = 4,
+    .dev_name = "cpld2",
+    .logic_dev_name = "/dev/cpld1",
+    .data_bus_width    = 4,
+    .addr_bus_width    = 1,
+    .wr_data        = 0x70,
+    .wr_data_width     = 4,
+    .addr_low       = 0x74,
+    .addr_high      = 0x75,
+    .rd_data        = 0x76,
+    .rd_data_width     = 4,
+    .opt_ctl        = 0x7a,
+    .indirect_len   = 0x230,
+};
+
+/* CPLD-I2C-MASTER-1 */
+static indirect_dev_device_t indirect_dev_device_data1 = {
+    .logic_func_mode = 4,
+    .dev_name = "cpld3",
+    .logic_dev_name = "/dev/cpld1",
+    .data_bus_width    = 4,
+    .addr_bus_width    = 1,
+    .wr_data        = 0x80,
+    .wr_data_width     = 4,
+    .addr_low       = 0x84,
+    .addr_high      = 0x85,
+    .rd_data        = 0x86,
+    .rd_data_width     = 4,
+    .opt_ctl        = 0x8a,
+    .indirect_len   = 0x230,
+};
+
+/* CPLD-I2C-MASTER-2 */
+static indirect_dev_device_t indirect_dev_device_data2 = {
+    .logic_func_mode = 4,
+    .dev_name = "cpld4",
+    .logic_dev_name = "/dev/cpld1",
+    .data_bus_width    = 4,
+    .addr_bus_width    = 1,
+    .wr_data        = 0x90,
+    .wr_data_width     = 4,
+    .addr_low       = 0x94,
+    .addr_high      = 0x95,
+    .rd_data        = 0x96,
+    .rd_data_width     = 4,
+    .opt_ctl        = 0x9a,
+    .indirect_len   = 0x230,
+};
+
+/* CPLD-I2C-MASTER-3 */
+static indirect_dev_device_t indirect_dev_device_data3 = {
+    .logic_func_mode = 4,
+    .dev_name = "cpld5",
+    .logic_dev_name = "/dev/cpld1",
+    .data_bus_width    = 4,
+    .addr_bus_width    = 1,
+    .wr_data        = 0xa0,
+    .wr_data_width     = 4,
+    .addr_low       = 0xa4,
+    .addr_high      = 0xa5,
+    .rd_data        = 0xa6,
+    .rd_data_width     = 4,
+    .opt_ctl        = 0xaa,
+    .indirect_len   = 0x230,
+};
+
+static void indirect_dev_device_bus_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device indirect_dev_device[] = {
+    {
+        .name   = "wb-indirect-dev",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &indirect_dev_device_data0,
+            .release = indirect_dev_device_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-indirect-dev",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &indirect_dev_device_data1,
+            .release = indirect_dev_device_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-indirect-dev",
+        .id = 3,
+        .dev    = {
+            .platform_data  = &indirect_dev_device_data2,
+            .release = indirect_dev_device_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-indirect-dev",
+        .id = 4,
+        .dev    = {
+            .platform_data  = &indirect_dev_device_data3,
+            .release = indirect_dev_device_bus_device_release,
+        },
+    },
+};
+
+static int __init indirect_dev_device_bus_device_init(void)
+{
+    int i;
+    int ret = 0;
+    indirect_dev_device_t *indirect_dev_device_data;
+
+    INDIRECT_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(indirect_dev_device); i++) {
+        indirect_dev_device_data = indirect_dev_device[i].dev.platform_data;
+        ret = platform_device_register(&indirect_dev_device[i]);
+        if (ret < 0) {
+            indirect_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-indirect-dev.%d register failed!\n", i + 1);
+        } else {
+            indirect_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit indirect_dev_device_bus_device_exit(void)
+{
+    int i;
+    indirect_dev_device_t *indirect_dev_device_data;
+
+    INDIRECT_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(indirect_dev_device) - 1; i >= 0; i--) {
+        indirect_dev_device_data = indirect_dev_device[i].dev.platform_data;
+        if (indirect_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&indirect_dev_device[i]);
+        }
+    }
+}
+
+module_init(indirect_dev_device_bus_device_init);
+module_exit(indirect_dev_device_bus_device_exit);
+MODULE_DESCRIPTION("INDIRECT DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_io_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_io_dev_device.c
new file mode 100644
index 000000000000..91767b2fdff0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_io_dev_device.c
@@ -0,0 +1,123 @@
+/*
+ * An wb_io_dev_device driver for io device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_io_dev.h>
+
+static int g_wb_io_dev_device_debug = 0;
+static int g_wb_io_dev_device_error = 0;
+
+module_param(g_wb_io_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_io_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_IO_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_io_dev_device_debug) { \
+        printk(KERN_INFO "[WB_IO_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_IO_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_io_dev_device_error) { \
+        printk(KERN_ERR "[WB_IO_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static io_dev_device_t io_dev_device_data0 = {
+    .io_dev_name = "cpld0",
+    .io_base = 0xa00,
+    .io_len = 0x100,
+    .indirect_addr = 0,
+};
+
+static io_dev_device_t io_dev_device_data1 = {
+    .io_dev_name = "cpld1",
+    .io_base = 0x900,
+    .io_len = 0x100,
+    .indirect_addr = 0,
+};
+
+static void wb_io_dev_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device io_dev_device[] = {
+    {
+        .name   = "wb-io-dev",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &io_dev_device_data0,
+            .release = wb_io_dev_device_release,
+        },
+    },
+    {
+        .name   = "wb-io-dev",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &io_dev_device_data1,
+            .release = wb_io_dev_device_release,
+        },
+    },
+};
+
+static int __init wb_io_dev_device_init(void)
+{
+    int i;
+    int ret = 0;
+    io_dev_device_t *io_dev_device_data;
+
+    WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(io_dev_device); i++) {
+        io_dev_device_data = io_dev_device[i].dev.platform_data;
+        ret = platform_device_register(&io_dev_device[i]);
+        if (ret < 0) {
+            io_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-io-dev.%d register failed!\n", i + 1);
+        } else {
+            io_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_io_dev_device_exit(void)
+{
+    int i;
+    io_dev_device_t *io_dev_device_data;
+
+    WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(io_dev_device) - 1; i >= 0; i--) {
+        io_dev_device_data = io_dev_device[i].dev.platform_data;
+        if (io_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&io_dev_device[i]);
+        }
+    }
+}
+
+module_init(wb_io_dev_device_init);
+module_exit(wb_io_dev_device_exit);
+MODULE_DESCRIPTION("IO DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_pcie_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_pcie_dev_device.c
new file mode 100644
index 000000000000..c76daa348e0a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_pcie_dev_device.c
@@ -0,0 +1,116 @@
+/*
+ * An wb_pcie_dev_device driver for pcie device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_pcie_dev.h>
+
+static int g_wb_pcie_dev_device_debug = 0;
+static int g_wb_pcie_dev_device_error = 0;
+
+module_param(g_wb_pcie_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_pcie_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_pcie_dev_device_debug) { \
+        printk(KERN_INFO "[WB_PCIE_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_PCIE_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_pcie_dev_device_error) { \
+        printk(KERN_ERR "[WB_PCIE_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static pci_dev_device_t pcie_dev_device_data0 = {
+    .pci_dev_name = "fpga0",
+    .pci_domain = 0x0000,
+    .pci_slot = 0x00,
+    .pci_fn = 0,
+    .pci_bar = 0,
+    .bus_width = 4,
+    .search_mode = 1,
+    .bridge_bus = 0,
+    .bridge_slot = 0x12,
+    .bridge_fn = 0,
+    .upg_ctrl_base = 0xa00,
+    .upg_flash_base = 0x2f0000,
+};
+
+static void wb_pcie_dev_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device pcie_dev_device[] = {
+    {
+        .name   = "wb-pci-dev",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &pcie_dev_device_data0,
+            .release = wb_pcie_dev_device_release,
+        },
+    },
+};
+
+static int __init wb_pcie_dev_device_init(void)
+{
+    int i;
+    int ret = 0;
+    pci_dev_device_t *pcie_dev_device_data;
+
+    WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(pcie_dev_device); i++) {
+        pcie_dev_device_data = pcie_dev_device[i].dev.platform_data;
+        ret = platform_device_register(&pcie_dev_device[i]);
+        if (ret < 0) {
+            pcie_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-pci-dev.%d register failed!\n", i + 1);
+        } else {
+            pcie_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_pcie_dev_device_exit(void)
+{
+    int i;
+    pci_dev_device_t *pcie_dev_device_data;
+
+    WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(pcie_dev_device) - 1; i >= 0; i--) {
+        pcie_dev_device_data = pcie_dev_device[i].dev.platform_data;
+        if (pcie_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&pcie_dev_device[i]);
+        }
+    }
+}
+
+module_init(wb_pcie_dev_device_init);
+module_exit(wb_pcie_dev_device_exit);
+MODULE_DESCRIPTION("PCIE DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_wdt_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_wdt_device.c
new file mode 100644
index 000000000000..e40ed10639f9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_wdt_device.c
@@ -0,0 +1,155 @@
+/*
+ * An wb_wdt_device driver for watchdog device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_wdt.h>
+
+static int g_wb_wdt_device_debug = 0;
+static int g_wb_wdt_device_error = 0;
+
+module_param(g_wb_wdt_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_wdt_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_WDT_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_wdt_device_debug) { \
+        printk(KERN_INFO "[WB_WDT_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_WDT_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_wdt_device_error) { \
+        printk(KERN_ERR "[WB_WDT_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static wb_wdt_device_t wb_wdt_device_data_0 = {
+    .feed_wdt_type = 1,
+    .hw_margin = 408000,
+    .feed_time = 9000,
+    .config_dev_name = "/dev/cpld1",
+    .config_mode = 1,
+    .priv_func_mode = 3,
+    .enable_reg = 0xb0,
+    .enable_val = 0x1,
+    .disable_val = 0x0,
+    .enable_mask = 0x1,
+    .timeout_cfg_reg = 0xb1,
+    .timeleft_cfg_reg = 0xb2,
+    .hw_algo = "toggle",
+    .wdt_config_mode.gpio_wdt = {
+        .gpio = 346,
+        .flags = 1
+    },
+    .timer_accuracy = 1600,          /* 1.6s */
+    .sysfs_index = SYSFS_NO_CFG,
+};
+
+/* sys led */
+static wb_wdt_device_t wb_wdt_device_data_1 = {
+    .feed_wdt_type = 2,
+    .hw_margin = 180000,
+    .feed_time = 30000,
+    .config_dev_name = "/dev/cpld1",
+    .config_mode = 2,
+    .priv_func_mode = 3,
+    .enable_reg = 0xba,
+    .enable_val = 0x1,
+    .disable_val = 0x0,
+    .enable_mask = 0x1,
+    .timeout_cfg_reg = 0xbc,
+    .timeleft_cfg_reg = 0xbd,
+    .hw_algo = "toggle",
+    .wdt_config_mode.logic_wdt = {
+        .feed_dev_name = "/dev/cpld1",
+        .feed_reg = 0xbb,
+        .active_val = 0x01,
+        .logic_func_mode = 4,
+    },
+    .timer_accuracy = 6000,          /* 6s */
+    .sysfs_index = SYSFS_NO_CFG,
+};
+
+static void wb_wdt_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device wb_wdt_device[] = {
+    {
+        .name   = "wb_wdt",
+        .id = 0,
+        .dev    = {
+            .platform_data  = &wb_wdt_device_data_0,
+            .release = wb_wdt_device_release,
+        },
+    },
+    {
+        .name   = "wb_wdt",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &wb_wdt_device_data_1,
+            .release = wb_wdt_device_release,
+        },
+    },
+};
+
+static int __init wb_wdt_device_init(void)
+{
+    int i;
+    int ret = 0;
+    wb_wdt_device_t *wb_wdt_device_data;
+
+    WB_WDT_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(wb_wdt_device); i++) {
+        wb_wdt_device_data = wb_wdt_device[i].dev.platform_data;
+        ret = platform_device_register(&wb_wdt_device[i]);
+        if (ret < 0) {
+            wb_wdt_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "rg-wdt.%d register failed!\n", i + 1);
+        } else {
+            wb_wdt_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_wdt_device_exit(void)
+{
+    int i;
+    wb_wdt_device_t *wb_wdt_device_data;
+
+    WB_WDT_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(wb_wdt_device) - 1; i >= 0; i--) {
+        wb_wdt_device_data = wb_wdt_device[i].dev.platform_data;
+        if (wb_wdt_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&wb_wdt_device[i]);
+        }
+    }
+}
+
+module_init(wb_wdt_device_init);
+module_exit(wb_wdt_device_exit);
+MODULE_DESCRIPTION("WB WDT Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/CPLD.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/CPLD.cfg
new file mode 100644
index 000000000000..f08fd5866a8a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/CPLD.cfg
@@ -0,0 +1,321 @@
+#
+# @Fill in the agreement
+# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of
+# configuration items and invalid Spaces must not be added between configuration items
+# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x"
+# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and
+# fill in the configuration items, do not delete them
+# 4. Configuration item
+
+# Set item: System E2 i2c bus address
+# Description: Format other_i2c_dev.bus_[main_dev]_[minor_dev] other_i2c_dev.addr_[main_dev]_[minor_dev],
+#			.bus is configuration item corresponds to the bus number (/dev/i2c-bus)
+#			.addr is address of the device corresponding to the configuration item on the bus
+# Note: 	main_dev look rg_main_dev_type_t definition, main board is 0, minor_dev is 0
+other_i2c_dev.bus_0_0=1
+other_i2c_dev.addr_0_0=0x56
+
+# Configuration item: System E2 path
+eeprom_path_0_0=/sys/bus/i2c/devices/1-0056/eeprom
+
+# Configuration item: System E2 size
+eeprom_size_0_0=256
+
+# Configuration item: watchdog number
+# Description: Format watchdog_id_[index]
+watchdog_id_0=0
+
+# Configuration item: watchdog device name
+# Description: Format watchdog_name_[index]_[type]
+watchdog_name_0_0=identity
+watchdog_name_0_1=state
+watchdog_name_0_2=timeleft
+
+# Configuration item: i2c bus address of the cpld
+# Description: Format cpld_i2c_dev.bus_[cpld_slot]_[cpld_id] cpld_i2c_dev.addr_[cpld_slot]_[cpld_id]
+#			All cpld numbers of each product are customized and do not have to be repeated.
+#			The numbers are reflected in the upper eight digits of the offset address of the cpld device
+#			cpld_slot: 1: cable card 1, 2: cable card 2, 3: cable card 3, 4: cable card 4,5: fan adapter board
+#			cpld_id: 0:CPLD_A 1:CPLD_B
+#			.bus is configuration item corresponds to the bus number(/dev/i2c-bus)
+#			.addr is address of the device corresponding to the configuration item on the bus
+# Note: This field is optional. This field is not required for a cpld that does not have I2C access
+cpld_i2c_dev.bus_0_2=98
+cpld_i2c_dev.addr_0_2=0x1d
+cpld_i2c_dev.bus_0_3=99
+cpld_i2c_dev.addr_0_3=0x2d
+cpld_i2c_dev.bus_0_4=100
+cpld_i2c_dev.addr_0_4=0x3d
+cpld_i2c_dev.bus_0_5=5
+cpld_i2c_dev.addr_0_5=0x1a
+cpld_i2c_dev.bus_0_6=50
+cpld_i2c_dev.addr_0_6=0x0d
+
+# Configuration item: cpld lpc address
+# Description: Format cpld_lpc_addr_[cpld_slot]_[cpld_id]
+#			All cpld numbers of each product are customized and do not have to be repeated.
+#			The numbers are reflected in the upper eight digits of the offset address of the cpld device
+#			cpld_id: 0:X86_CPLD, 1:MAC_CPLDA, 2:MAC_CPLDB
+# Note: This field is optional. This field is not required for CPLDS that are not accessed by LPCS
+cpld_lpc_dev_0_0=0xa00
+cpld_lpc_dev_0_1=0x900
+
+# Configuration item: Access mode of each cpld(LPC/I2C)
+# Description: Format mode_cpld_[cpld_slot][cpld_slot]=lpc/i2c, cpld_id is cpld number,Start at 0
+# Note: This field is required
+mode_cpld_0_0=lpc
+mode_cpld_0_1=lpc
+mode_cpld_0_2=i2c
+mode_cpld_0_3=i2c
+mode_cpld_0_4=i2c
+mode_cpld_0_5=i2c
+mode_cpld_0_6=i2c
+
+# Configuration item: the number of CPLD
+# Description: Format  dev_num_[main_dev]_[minor_dev]
+# Note: main_dev: indicates that the mainboard is 0, the subPLD is 5, and the minor_dev: CPLD is 8
+dev_num_0_8=7
+
+# Configuration item: Name of each cpld
+# Description: Format  cpld_name_[cpld_id] cpld_id is cpld number,start with 1
+# Note: This field is required
+cpld_name_0_0=CPU_CPLD
+cpld_name_0_1=BASE_CPLD
+cpld_name_0_2=MAC_CPLDA
+cpld_name_0_3=MAC_CPLDB
+cpld_name_0_4=MAC_CPLDC
+cpld_name_0_5=MGMT_CPLD
+cpld_name_0_6=FAN_CPLD
+
+
+# Configuration item: Model of each cpld
+# Description: Format  cpld_type_[cpld_id] cpld_idis cpld number,start with 1
+# Note: This field is required
+cpld_type_0_0=LATTICE/LCMXO3LF-2100C-5BG256C
+cpld_type_0_1=LATTICE/LCMXO3LF-4300C-6BG324I
+cpld_type_0_2=LATTICE/LCMXO3LF-4300C-6BG256C
+cpld_type_0_3=LATTICE/LCMXO3LF-4300C-6BG324I
+cpld_type_0_4=LATTICE/LCMXO3LF-4300C-6BG324I
+cpld_type_0_5=LATTICE/LCMXO3LF-4300C-6BG324I
+cpld_type_0_6=LATTICE/LCMXO3LF-2100C-5BG256C
+
+
+# Configuration item: Version register of each CPLD
+# Description: Format  cpld_version_[cpld_id] cpld_id is cpld number,start with 1
+# Note: This field is required
+cpld_version.mode_0_0=config
+cpld_version.int_cons_0_0=
+cpld_version.src_0_0=cpld
+cpld_version.frmt_0_0=num_bytes
+cpld_version.pola_0_0=
+cpld_version.fpath_0_0=
+cpld_version.addr_0_0=0x00000000
+cpld_version.len_0_0=4
+cpld_version.bit_offset_0_0=
+
+cpld_version.mode_0_1=config
+cpld_version.int_cons_0_1=
+cpld_version.src_0_1=cpld
+cpld_version.frmt_0_1=num_bytes
+cpld_version.pola_0_1=
+cpld_version.fpath_0_1=
+cpld_version.addr_0_1=0x00010000
+cpld_version.len_0_1=4
+cpld_version.bit_offset_0_1=
+
+cpld_version.mode_0_2=config
+cpld_version.int_cons_0_2=
+cpld_version.src_0_2=cpld
+cpld_version.frmt_0_2=num_bytes
+cpld_version.pola_0_2=
+cpld_version.fpath_0_2=
+cpld_version.addr_0_2=0x00020000
+cpld_version.len_0_2=4
+cpld_version.bit_offset_0_2=
+
+cpld_version.mode_0_3=config
+cpld_version.int_cons_0_3=
+cpld_version.src_0_3=cpld
+cpld_version.frmt_0_3=num_bytes
+cpld_version.pola_0_3=
+cpld_version.fpath_0_3=
+cpld_version.addr_0_3=0x00030000
+cpld_version.len_0_3=4
+cpld_version.bit_offset_0_3=
+
+cpld_version.mode_0_4=config
+cpld_version.int_cons_0_4=
+cpld_version.src_0_4=cpld
+cpld_version.frmt_0_4=num_bytes
+cpld_version.pola_0_4=
+cpld_version.fpath_0_4=
+cpld_version.addr_0_4=0x00040000
+cpld_version.len_0_4=4
+cpld_version.bit_offset_0_4=
+
+cpld_version.mode_0_5=config
+cpld_version.int_cons_0_5=
+cpld_version.src_0_5=cpld
+cpld_version.frmt_0_5=num_bytes
+cpld_version.pola_0_5=
+cpld_version.fpath_0_5=
+cpld_version.addr_0_5=0x00050000
+cpld_version.len_0_5=4
+cpld_version.bit_offset_0_5=
+
+cpld_version.mode_0_6=config
+cpld_version.int_cons_0_6=
+cpld_version.src_0_6=cpld
+cpld_version.frmt_0_6=num_bytes
+cpld_version.pola_0_6=
+cpld_version.fpath_0_6=
+cpld_version.addr_0_6=0x00060000
+cpld_version.len_0_6=4
+cpld_version.bit_offset_0_6=
+
+# Configuration item: Test register for each CPLD
+# Description: Format  cpld_test_reg_[cpld_id] cpld_id is cpld number,start with 1
+# Note: This field is required
+cpld_test_reg.mode_0_0=config
+cpld_test_reg.int_cons_0_0=
+cpld_test_reg.src_0_0=cpld
+cpld_test_reg.frmt_0_0=byte
+cpld_test_reg.pola_0_0=
+cpld_test_reg.fpath_0_0=
+cpld_test_reg.addr_0_0=0x00000005
+cpld_test_reg.len_0_0=1
+cpld_test_reg.bit_offset_0_0=
+
+cpld_test_reg.mode_0_1=config
+cpld_test_reg.int_cons_0_1=
+cpld_test_reg.src_0_1=cpld
+cpld_test_reg.frmt_0_1=byte
+cpld_test_reg.pola_0_1=
+cpld_test_reg.fpath_0_1=
+cpld_test_reg.addr_0_1=0x00010055
+cpld_test_reg.len_0_1=1
+cpld_test_reg.bit_offset_0_1=
+
+cpld_test_reg.mode_0_2=config
+cpld_test_reg.int_cons_0_2=
+cpld_test_reg.src_0_2=cpld
+cpld_test_reg.frmt_0_2=byte
+cpld_test_reg.pola_0_2=
+cpld_test_reg.fpath_0_2=
+cpld_test_reg.addr_0_2=0x00020055
+cpld_test_reg.len_0_2=1
+cpld_test_reg.bit_offset_0_2=
+
+cpld_test_reg.mode_0_3=config
+cpld_test_reg.int_cons_0_3=
+cpld_test_reg.src_0_3=cpld
+cpld_test_reg.frmt_0_3=byte
+cpld_test_reg.pola_0_3=
+cpld_test_reg.fpath_0_3=
+cpld_test_reg.addr_0_3=0x00030055
+cpld_test_reg.len_0_3=1
+cpld_test_reg.bit_offset_0_3=
+
+cpld_test_reg.mode_0_4=config
+cpld_test_reg.int_cons_0_4=
+cpld_test_reg.src_0_4=cpld
+cpld_test_reg.frmt_0_4=byte
+cpld_test_reg.pola_0_4=
+cpld_test_reg.fpath_0_4=
+cpld_test_reg.addr_0_4=0x00040055
+cpld_test_reg.len_0_4=1
+cpld_test_reg.bit_offset_0_4=
+
+cpld_test_reg.mode_0_5=config
+cpld_test_reg.int_cons_0_5=
+cpld_test_reg.src_0_5=cpld
+cpld_test_reg.frmt_0_5=byte
+cpld_test_reg.pola_0_5=
+cpld_test_reg.fpath_0_5=
+cpld_test_reg.addr_0_5=0x00050055
+cpld_test_reg.len_0_5=1
+cpld_test_reg.bit_offset_0_5=
+
+cpld_test_reg.mode_0_6=config
+cpld_test_reg.int_cons_0_6=
+cpld_test_reg.src_0_6=cpld
+cpld_test_reg.frmt_0_6=byte
+cpld_test_reg.pola_0_6=
+cpld_test_reg.fpath_0_6=
+cpld_test_reg.addr_0_6=0x00060055
+cpld_test_reg.len_0_6=1
+cpld_test_reg.bit_offset_0_6=
+
+# Configuration item: Hardware version register of each CPLD
+# Description: Format  cpld_hw_version_[cpld_id] cpld_id is cpld number,start with 1
+# Note: Optional
+cpld_hw_version.mode_0_0=config
+cpld_hw_version.int_cons_0_0=
+cpld_hw_version.src_0_0=cpld
+cpld_hw_version.frmt_0_0=byte
+cpld_hw_version.pola_0_0=
+cpld_hw_version.fpath_0_0=
+cpld_hw_version.addr_0_0=0x00000009
+cpld_hw_version.len_0_0=1
+cpld_hw_version.bit_offset_0_0=
+
+cpld_hw_version.mode_0_1=config
+cpld_hw_version.int_cons_0_1=
+cpld_hw_version.src_0_1=cpld
+cpld_hw_version.frmt_0_1=byte
+cpld_hw_version.pola_0_1=
+cpld_hw_version.fpath_0_1=
+cpld_hw_version.addr_0_1=0x00010009
+cpld_hw_version.len_0_1=1
+cpld_hw_version.bit_offset_0_1=
+
+cpld_hw_version.mode_0_2=config
+cpld_hw_version.int_cons_0_2=
+cpld_hw_version.src_0_2=cpld
+cpld_hw_version.frmt_0_2=byte
+cpld_hw_version.pola_0_2=
+cpld_hw_version.fpath_0_2=
+cpld_hw_version.addr_0_2=0x00020009
+cpld_hw_version.len_0_2=1
+cpld_hw_version.bit_offset_0_2=
+
+cpld_hw_version.mode_0_3=config
+cpld_hw_version.int_cons_0_3=
+cpld_hw_version.src_0_3=cpld
+cpld_hw_version.frmt_0_3=byte
+cpld_hw_version.pola_0_3=
+cpld_hw_version.fpath_0_3=
+cpld_hw_version.addr_0_3=0x00030009
+cpld_hw_version.len_0_3=1
+cpld_hw_version.bit_offset_0_3=
+
+cpld_hw_version.mode_0_4=config
+cpld_hw_version.int_cons_0_4=
+cpld_hw_version.src_0_4=cpld
+cpld_hw_version.frmt_0_4=byte
+cpld_hw_version.pola_0_4=
+cpld_hw_version.fpath_0_4=
+cpld_hw_version.addr_0_4=0x00040009
+cpld_hw_version.len_0_4=1
+cpld_hw_version.bit_offset_0_4=
+
+cpld_hw_version.mode_0_5=config
+cpld_hw_version.int_cons_0_5=
+cpld_hw_version.src_0_5=cpld
+cpld_hw_version.frmt_0_5=byte
+cpld_hw_version.pola_0_5=
+cpld_hw_version.fpath_0_5=
+cpld_hw_version.addr_0_5=0x00050009
+cpld_hw_version.len_0_5=1
+cpld_hw_version.bit_offset_0_5=
+
+cpld_hw_version.mode_0_6=config
+cpld_hw_version.int_cons_0_6=
+cpld_hw_version.src_0_6=cpld
+cpld_hw_version.frmt_0_6=byte
+cpld_hw_version.pola_0_6=
+cpld_hw_version.fpath_0_6=
+cpld_hw_version.addr_0_6=0x00060009
+cpld_hw_version.len_0_6=1
+cpld_hw_version.bit_offset_0_6=
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/FAN.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/FAN.cfg
new file mode 100644
index 000000000000..86fb3b13a106
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/FAN.cfg
@@ -0,0 +1,358 @@
+#
+# @Fill in the agreement
+# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of
+# configuration items and invalid Spaces must not be added between configuration items
+# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x"
+# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and
+# fill in the configuration items, do not delete them
+# 4. Configuration item
+
+# Configuration items:	E2 i2c bus address
+# Description: Format other_i2c_dev.bus_[main_dev]_[minor_dev] other_i2c_dev.addr_[main_dev]_[minor_dev],
+#			.bus is configuration item corresponds to the bus number (/dev/i2c-bus)
+#			.addr is address of the device corresponding to the configuration item on the bus
+# Note:	main_dev is defined in rg_main_dev_type_t. mainboard is 0, fan is 1, dev_index is device index
+other_i2c_dev.bus_1_1=52
+other_i2c_dev.addr_1_1=0x50
+other_i2c_dev.bus_1_2=53
+other_i2c_dev.addr_1_2=0x50
+other_i2c_dev.bus_1_3=54
+other_i2c_dev.addr_1_3=0x50
+other_i2c_dev.bus_1_4=55
+other_i2c_dev.addr_1_4=0x50
+
+# Configuration items:	Fan dependent constant
+# Description: Format dev_num_[main_dev]_[minor_dev]
+# Note:	main_dev,Fan is 1 minor_dev, 0: does not exist, 5: motor
+
+# Number of fans
+dev_num_1_0=4
+
+# Number of motors
+dev_num_1_5=2
+
+# Configuration items:	Product fan E2 format
+# Description: Format fan_e2_mode
+# Note:	required
+fan_e2_mode=fru
+
+# Configuration items:	Mode of reading fan E2
+# Description: Format fan_sysfs_name
+# Note:	If not configured, it is read by i2c, otherwise it is read by sysfs
+fan_sysfs_name=eeprom
+
+# Configuration items:	Fan air duct type
+# Filling instructions: fan_direction_[direction]_[index]
+# direction is  air duct 0:F2B 1:B2F, indexstart with 1
+# Note:	required
+fan_direction_0_1=FAN80-02-F
+# Configuration items:	Fan status CPLD register address
+# Description: Format dev_present_status_[main_dev_id][fan_index] fan_indexstart with 1
+# Note:	fan main_dev_id is 1
+dev_present_status.mode_1_1=config
+dev_present_status.src_1_1=cpld
+dev_present_status.frmt_1_1=bit
+dev_present_status.pola_1_1=negative
+dev_present_status.addr_1_1=0x0006005b
+dev_present_status.len_1_1=1
+dev_present_status.bit_offset_1_1=0
+
+dev_present_status.mode_1_2=config
+dev_present_status.src_1_2=cpld
+dev_present_status.frmt_1_2=bit
+dev_present_status.pola_1_2=negative
+dev_present_status.addr_1_2=0x0006005b
+dev_present_status.len_1_2=1
+dev_present_status.bit_offset_1_2=1
+
+dev_present_status.mode_1_3=config
+dev_present_status.src_1_3=cpld
+dev_present_status.frmt_1_3=bit
+dev_present_status.pola_1_3=negative
+dev_present_status.addr_1_3=0x0006005b
+dev_present_status.len_1_3=1
+dev_present_status.bit_offset_1_3=2
+
+dev_present_status.mode_1_4=config
+dev_present_status.src_1_4=cpld
+dev_present_status.frmt_1_4=bit
+dev_present_status.pola_1_4=negative
+dev_present_status.addr_1_4=0x0006005b
+dev_present_status.len_1_4=1
+dev_present_status.bit_offset_1_4=3
+
+# Configuration items:	Fan rotation status CPLD register address
+# Description: Format fan_roll_status_[fan_id]_[motor_id] fan_idstart with 1, motor_idstart with 1
+# Note:	required
+fan_roll_status.mode_1_1=config
+fan_roll_status.int_cons_1_1=
+fan_roll_status.src_1_1=cpld
+fan_roll_status.frmt_1_1=bit
+fan_roll_status.pola_1_1=positive
+fan_roll_status.fpath_1_1=
+fan_roll_status.addr_1_1=0x0006005c
+fan_roll_status.len_1_1=1
+fan_roll_status.bit_offset_1_1=0
+
+fan_roll_status.mode_1_2=config
+fan_roll_status.int_cons_1_2=
+fan_roll_status.src_1_2=cpld
+fan_roll_status.frmt_1_2=bit
+fan_roll_status.pola_1_2=positive
+fan_roll_status.fpath_1_2=
+fan_roll_status.addr_1_2=0x0006005d
+fan_roll_status.len_1_2=1
+fan_roll_status.bit_offset_1_2=0
+
+fan_roll_status.mode_2_1=config
+fan_roll_status.int_cons_2_1=
+fan_roll_status.src_2_1=cpld
+fan_roll_status.frmt_2_1=bit
+fan_roll_status.pola_2_1=positive
+fan_roll_status.fpath_2_1=
+fan_roll_status.addr_2_1=0x0006005c
+fan_roll_status.len_2_1=1
+fan_roll_status.bit_offset_2_1=1
+
+fan_roll_status.mode_2_2=config
+fan_roll_status.int_cons_2_2=
+fan_roll_status.src_2_2=cpld
+fan_roll_status.frmt_2_2=bit
+fan_roll_status.pola_2_2=positive
+fan_roll_status.fpath_2_2=
+fan_roll_status.addr_2_2=0x0006005d
+fan_roll_status.len_2_2=1
+fan_roll_status.bit_offset_2_2=1
+
+fan_roll_status.mode_3_1=config
+fan_roll_status.int_cons_3_1=
+fan_roll_status.src_3_1=cpld
+fan_roll_status.frmt_3_1=bit
+fan_roll_status.pola_3_1=positive
+fan_roll_status.fpath_3_1=
+fan_roll_status.addr_3_1=0x0006005c
+fan_roll_status.len_3_1=1
+fan_roll_status.bit_offset_3_1=2
+
+fan_roll_status.mode_3_2=config
+fan_roll_status.int_cons_3_2=
+fan_roll_status.src_3_2=cpld
+fan_roll_status.frmt_3_2=bit
+fan_roll_status.pola_3_2=positive
+fan_roll_status.fpath_3_2=
+fan_roll_status.addr_3_2=0x0006005d
+fan_roll_status.len_3_2=1
+fan_roll_status.bit_offset_3_2=2
+
+fan_roll_status.mode_4_1=config
+fan_roll_status.int_cons_4_1=
+fan_roll_status.src_4_1=cpld
+fan_roll_status.frmt_4_1=bit
+fan_roll_status.pola_4_1=positive
+fan_roll_status.fpath_4_1=
+fan_roll_status.addr_4_1=0x0006005c
+fan_roll_status.len_4_1=1
+fan_roll_status.bit_offset_4_1=3
+
+fan_roll_status.mode_4_2=config
+fan_roll_status.int_cons_4_2=
+fan_roll_status.src_4_2=cpld
+fan_roll_status.frmt_4_2=bit
+fan_roll_status.pola_4_2=positive
+fan_roll_status.fpath_4_2=
+fan_roll_status.addr_4_2=0x0006005d
+fan_roll_status.len_4_2=1
+fan_roll_status.bit_offset_4_2=3
+
+# Configuration items:	Fan speed CPLD register address
+# Description: Format fan_speed_[fan_id]_[motor_id] fan_idstart with 1, motor_idstart with 1
+# Note:	required
+fan_speed.mode_1_1=config
+fan_speed.int_cons_1_1=
+fan_speed.src_1_1=cpld
+fan_speed.frmt_1_1=num_bytes
+fan_speed.pola_1_1=negative
+fan_speed.fpath_1_1=
+fan_speed.addr_1_1=0x00060094
+fan_speed.len_1_1=2
+fan_speed.bit_offset_1_1=
+
+fan_speed.mode_1_2=config
+fan_speed.int_cons_1_2=
+fan_speed.src_1_2=cpld
+fan_speed.frmt_1_2=num_bytes
+fan_speed.pola_1_2=negative
+fan_speed.fpath_1_2=
+fan_speed.addr_1_2=0x000600a0
+fan_speed.len_1_2=2
+fan_speed.bit_offset_1_2=
+
+fan_speed.mode_2_1=config
+fan_speed.int_cons_2_1=
+fan_speed.src_2_1=cpld
+fan_speed.frmt_2_1=num_bytes
+fan_speed.pola_2_1=negative
+fan_speed.fpath_2_1=
+fan_speed.addr_2_1=0x00060096
+fan_speed.len_2_1=2
+fan_speed.bit_offset_2_1=
+
+fan_speed.mode_2_2=config
+fan_speed.int_cons_2_2=
+fan_speed.src_2_2=cpld
+fan_speed.frmt_2_2=num_bytes
+fan_speed.pola_2_2=negative
+fan_speed.fpath_2_2=
+fan_speed.addr_2_2=0x000600a2
+fan_speed.len_2_2=2
+fan_speed.bit_offset_2_2=
+
+fan_speed.mode_3_1=config
+fan_speed.int_cons_3_1=
+fan_speed.src_3_1=cpld
+fan_speed.frmt_3_1=num_bytes
+fan_speed.pola_3_1=negative
+fan_speed.fpath_3_1=
+fan_speed.addr_3_1=0x00060098
+fan_speed.len_3_1=2
+fan_speed.bit_offset_3_1=
+
+fan_speed.mode_3_2=config
+fan_speed.int_cons_3_2=
+fan_speed.src_3_2=cpld
+fan_speed.frmt_3_2=num_bytes
+fan_speed.pola_3_2=negative
+fan_speed.fpath_3_2=
+fan_speed.addr_3_2=0x000600a4
+fan_speed.len_3_2=2
+fan_speed.bit_offset_3_2=
+
+fan_speed.mode_4_1=config
+fan_speed.int_cons_4_1=
+fan_speed.src_4_1=cpld
+fan_speed.frmt_4_1=num_bytes
+fan_speed.pola_4_1=negative
+fan_speed.fpath_4_1=
+fan_speed.addr_4_1=0x0006009a
+fan_speed.len_4_1=2
+fan_speed.bit_offset_4_1=
+
+fan_speed.mode_4_2=config
+fan_speed.int_cons_4_2=
+fan_speed.src_4_2=cpld
+fan_speed.frmt_4_2=num_bytes
+fan_speed.pola_4_2=negative
+fan_speed.fpath_4_2=
+fan_speed.addr_4_2=0x000600a6
+fan_speed.len_4_2=2
+fan_speed.bit_offset_4_2=
+
+# Configuration items:	Fan speed level CPLD register address
+# Description: Format fan_ratio_[fan_id]_[motor_id] fan_idstart with 1, motor_idstart with 1
+# Note:	required
+fan_ratio.mode_1=config
+fan_ratio.int_cons_1=
+fan_ratio.src_1=cpld
+fan_ratio.frmt_1=byte
+fan_ratio.pola_1=
+fan_ratio.fpath_1=
+fan_ratio.addr_1=0x00060090
+fan_ratio.len_1=1
+fan_ratio.bit_offset_1=
+
+fan_ratio.mode_2=config
+fan_ratio.int_cons_2=
+fan_ratio.src_2=cpld
+fan_ratio.frmt_2=byte
+fan_ratio.pola_2=
+fan_ratio.fpath_2=
+fan_ratio.addr_2=0x00060091
+fan_ratio.len_2=1
+fan_ratio.bit_offset_2=
+
+fan_ratio.mode_3=config
+fan_ratio.int_cons_3=
+fan_ratio.src_3=cpld
+fan_ratio.frmt_3=byte
+fan_ratio.pola_3=
+fan_ratio.fpath_3=
+fan_ratio.addr_3=0x00060092
+fan_ratio.len_3=1
+fan_ratio.bit_offset_3=
+
+fan_ratio.mode_4=config
+fan_ratio.int_cons_4=
+fan_ratio.src_4=cpld
+fan_ratio.frmt_4=byte
+fan_ratio.pola_4=
+fan_ratio.fpath_4=
+fan_ratio.addr_4=0x00060093
+fan_ratio.len_4=1
+fan_ratio.bit_offset_4=
+
+# Fan speed tolerance
+fan_threshold_0x0301_0x01=30
+fan_threshold_0x0301_0x02=30
+
+# Maximum fan speed
+fan_threshold_0x0201_0x01=18000
+fan_threshold_0x0201_0x02=16000
+
+# Minimum fan speed
+fan_threshold_0x0101_0x01=3600
+fan_threshold_0x0101_0x02=3200
+
+# Rated fan speed
+fan_threshold_0x1001_0x01=0
+fan_threshold_0x1001_0x02=0
+
+fan_threshold_0x1101_0x01=0
+fan_threshold_0x1101_0x02=0
+
+fan_threshold_0x1201_0x01=3600
+fan_threshold_0x1201_0x02=3200
+
+fan_threshold_0x1301_0x01=5400
+fan_threshold_0x1301_0x02=4800
+
+fan_threshold_0x1401_0x01=7200
+fan_threshold_0x1401_0x02=6400
+
+fan_threshold_0x1501_0x01=9000
+fan_threshold_0x1501_0x02=8000
+
+fan_threshold_0x1601_0x01=10800
+fan_threshold_0x1601_0x02=9600
+
+fan_threshold_0x1701_0x01=12600
+fan_threshold_0x1701_0x02=11200
+
+fan_threshold_0x1801_0x01=14400
+fan_threshold_0x1801_0x02=12800
+
+fan_threshold_0x1901_0x01=16200
+fan_threshold_0x1901_0x02=14400
+
+fan_threshold_0x1a01_0x01=18000
+fan_threshold_0x1a01_0x02=16000
+
+# Configuration items:	the number of fan names displayed in the product
+# Description: Format dev_num_[main_dev]_[minor_dev]
+# Note:	main_dev,FAN is 1, minor_dev, 7: The number of fan names displayed
+dev_num_1_7=1
+
+# Configuration items:	number of fan types supported by each fan name
+# Description: Format fan_type_num_[fan_id]
+# Note:	fan_id start with 1
+fan_type_num_1=1
+
+# Configuration items: product Fan type Name
+# Description: Format fan_name_[index1]_[index2]
+# Note:	index1 indicates the ID of the fan that is displayed, start with 1, 
+# index2 Indicates different fan names with the same ID, start with 1
+fan_name_0_1=FAN80-02-F
+
+# Configuration items:	fan name is displayed
+# Description: Format decode_fan_name_[index]
+# Note:	index  indicates the ID of the fan that is displayed
+decode_fan_name_1=FAN80-02-F
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/FPGA.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/FPGA.cfg
new file mode 100644
index 000000000000..c5dff6c6d0cc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/FPGA.cfg
@@ -0,0 +1,64 @@
+#
+# @Fill in the agreement
+# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of
+# configuration items and invalid Spaces must not be added between configuration items
+# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x"
+# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and
+# fill in the configuration items, do not delete them
+# 4. Configuration item
+
+
+# Configuration item:	motherboard  FPGA number
+# Description: Format dev_num_[main_dev]_[minor_dev]
+# Note: 	main_dev: motherboard is 0,daughter card is 5, minor_dev: FPGA is 8
+dev_num_0_9=1
+
+# Configuration item: name of each fpga
+# Description: Format fpga_name_[fpga_id] fpga_id is fpga number,Start at 0
+#  Note: required
+fpga_name_0_0=MAC_FPGA
+
+# Configuration item: Version register for each FPGA
+# Description: Format fpga_version_[fpga_id] fpga_id  is fpga number,Start at 0
+# Note: required
+fpga_version.mode_0_0=config
+fpga_version.int_cons_0_0=
+fpga_version.src_0_0=file
+fpga_version.frmt_0_0=num_bytes
+fpga_version.pola_0_0=negative
+fpga_version.fpath_0_0=/dev/fpga0
+fpga_version.addr_0_0=0x0
+fpga_version.len_0_0=4
+fpga_version.bit_offset_0_0=
+
+# Configuration item: Test registers for each FPGA
+# Description: Format fpga_test_reg_[fpga_id] fpga_id  is fpga number,Start at 0
+# Note: required
+fpga_test_reg.mode_0_0=config
+fpga_test_reg.int_cons_0_0=
+fpga_test_reg.src_0_0=file
+fpga_test_reg.frmt_0_0=num_bytes
+fpga_test_reg.pola_0_0=negative
+fpga_test_reg.fpath_0_0=/dev/fpga0
+fpga_test_reg.addr_0_0=0x08
+fpga_test_reg.len_0_0=4
+fpga_test_reg.bit_offset_0_0=
+
+# Configuration item: Device type register for each FPGA
+# Description: Format fpga_model_reg_[main_dev]_[fpga_id]
+# Note: main_dev: motherboard is 0, daughter card is 5, fpga_id  is fpga number,Start at 0
+fpga_model_reg.mode_0_0=config
+fpga_model_reg.int_cons_0_0=
+fpga_model_reg.src_0_0=file
+fpga_model_reg.frmt_0_0=num_bytes
+fpga_model_reg.pola_0_0=negative
+fpga_model_reg.fpath_0_0=/dev/fpga0
+fpga_model_reg.addr_0_0=0x98
+fpga_model_reg.len_0_0=4
+fpga_model_reg.bit_offset_0_0=
+
+
+# Configuration item: Device conversion configuration for each FPGA
+# Description: Format fpga_model_decode_[origin_value]
+# Note: origin_value is the value read from the FPGA device model register cannot exceed 0xffff
+fpga_model_decode_0x0=XC7A150T-2FGG484I
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/LED.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/LED.cfg
new file mode 100644
index 000000000000..049d2af1aaa2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/LED.cfg
@@ -0,0 +1,128 @@
+#
+# @Fill in the agreement
+# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of
+# configuration items and invalid Spaces must not be added between configuration items
+# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x"
+# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and
+# fill in the configuration items, do not delete them
+# 4. Configuration item
+
+# Configuration item:	LED CPLD register address
+# Description: Formatled_status_[led_id]_[led_index]
+# Note:	led_id By definition wb_led_t
+# led_index:If there is no index, fill in 0. If there is an index (such as a fan light), the number starts from 1
+
+# Front panel SYS light
+led_status.mode_0_0=config
+led_status.src_0_0=cpld
+led_status.frmt_0_0=bit
+led_status.addr_0_0=0x000100d2
+led_status.len_0_0=3
+
+# Configuration item: LED indicator CPLD register value converted to standard value
+# Description: Format led_status_decode_[led_id]_[origin_value] origin_value:Original CPLD value
+# led_id Same LED light type defined, 0- Front panel SYS light
+led_status_decode_0_0=0
+led_status_decode_0_1=7
+led_status_decode_0_2=3
+led_status_decode_0_3=5
+led_status_decode_0_4=1
+led_status_decode_0_5=6
+led_status_decode_0_6=2
+led_status_decode_0_7=0
+
+# Front panel BMC light
+led_status.mode_2_0=config
+led_status.src_2_0=cpld
+led_status.frmt_2_0=bit
+led_status.addr_2_0=0x000100d5
+led_status.len_2_0=3
+
+led_status_decode_2_0=0
+led_status_decode_2_1=7
+led_status_decode_2_2=3
+led_status_decode_2_3=5
+led_status_decode_2_4=1
+led_status_decode_2_5=6
+led_status_decode_2_6=2
+led_status_decode_2_7=0
+
+# Front panel FAN light
+led_status.mode_4_0=config
+led_status.src_4_0=cpld
+led_status.frmt_4_0=bit
+led_status.addr_4_0=0x000100d4
+led_status.len_4_0=3
+
+# Configuration item: LED indicator CPLD register value converted to standard value
+# Description: Format led_status_decode_[led_id]_[origin_value] origin_value:Original CPLD value
+# led_id Same LED light type defined, 4-Front panel FAN light
+led_status_decode_4_0=0
+led_status_decode_4_1=7
+led_status_decode_4_2=3
+led_status_decode_4_3=5
+led_status_decode_4_4=1
+led_status_decode_4_5=6
+led_status_decode_4_6=2
+led_status_decode_4_7=0
+
+# Front panel PSU light
+led_status.mode_6_0=config
+led_status.src_6_0=cpld
+led_status.frmt_6_0=bit
+led_status.addr_6_0=0x000100d3
+led_status.len_6_0=3
+
+# Configuration item: LED indicator CPLD register value converted to standard value
+# Description: Format led_status_decode_[led_id]_[origin_value] origin_value:Original CPLD value
+# led_id Same LED light type defined, 6-Front panel PSU light
+led_status_decode_6_0=0
+led_status_decode_6_1=7
+led_status_decode_6_2=3
+led_status_decode_6_3=5
+led_status_decode_6_4=1
+led_status_decode_6_5=6
+led_status_decode_6_6=2
+led_status_decode_6_7=0
+
+# Fan body lamp1
+led_status.mode_10_1=config
+led_status.src_10_1=cpld
+led_status.frmt_10_1=bit
+led_status.addr_10_1=0x000600d0
+led_status.len_10_1=3
+
+# Fan body lamp2
+led_status.mode_10_2=config
+led_status.src_10_2=cpld
+led_status.frmt_10_2=bit
+led_status.addr_10_2=0x000600d1
+led_status.len_10_2=3
+
+# Fan body lamp3
+led_status.mode_10_3=config
+led_status.src_10_3=cpld
+led_status.frmt_10_3=bit
+led_status.addr_10_3=0x000600d2
+led_status.len_10_3=3
+
+# Fan body lamp4
+led_status.mode_10_4=config
+led_status.src_10_4=cpld
+led_status.frmt_10_4=bit
+led_status.addr_10_4=0x000600d3
+led_status.len_10_4=3
+
+
+# Configuration item: LED indicator CPLD register value converted to standard value
+# Description: Format led_status_decode_[led_id]_[origin_value] origin_value:Original CPLD value
+# led_id Same LED light type defined, 10-Fan body lamp
+led_status_decode_10_0=0
+led_status_decode_10_1=7
+led_status_decode_10_2=3
+led_status_decode_10_3=5
+led_status_decode_10_4=1
+led_status_decode_10_5=6
+led_status_decode_10_6=2
+led_status_decode_10_7=0
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/PSU.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/PSU.cfg
new file mode 100644
index 000000000000..a344173b362e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/PSU.cfg
@@ -0,0 +1,657 @@
+#
+# @Fill in the agreement
+# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of
+# configuration items and invalid Spaces must not be added between configuration items
+# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x"
+# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and
+# fill in the configuration items, do not delete them
+# 4. Configuration item
+
+# Configuration items:	PSU number
+# Description: Format dev_num_[main_dev]_[minor_dev]
+# Note:	main_dev,PSU is 2, minor_dev,0 indicates the obtained number
+dev_num_2_0=2
+
+# Configuration items:	PSU temperature sensors number
+# Description: Format dev_num_[main_dev]_[minor_dev]
+# Note:	main_dev,PSU is 2, minor_dev, 1:temperature
+dev_num_2_1=3
+
+# Configuration items:	PSU E2 information
+# Description: Format other_i2c_dev_[main_dev]_[psu_index]
+# Note:	main_dev,PSU is 2, psu_index:Power supply number, start with 1
+other_i2c_dev.bus_2_1=42
+other_i2c_dev.addr_2_1=0x50
+other_i2c_dev.bus_2_2=43
+other_i2c_dev.addr_2_2=0x50
+
+# Configuration items:	Mode of reading power supply E2
+# Description: Format psu_sysfs_name
+# Note: If not configured, it is read by i2c, otherwise it is read by sysfs
+psu_sysfs_name=eeprom
+
+other_i2c_dev.bus_2_5=42
+other_i2c_dev.addr_2_5=0x58
+other_i2c_dev.bus_2_6=43
+other_i2c_dev.addr_2_6=0x58
+
+# Configuration items: PMBUS register address of the power supply
+# Description: Format psu_status_[psu_index]_[reg_id]
+# Note:psu_index:Power supply number,start with 1 reg_id, 9:Power Output Status (0x79)
+psu_pmbus_reg.mode_1_9=config
+psu_pmbus_reg.src_1_9=other_i2c
+psu_pmbus_reg.frmt_1_9=byte
+psu_pmbus_reg.pola_1_9=negative
+psu_pmbus_reg.addr_1_9=0x02050079
+psu_pmbus_reg.len_1_9=2
+psu_pmbus_reg.bit_offset_1_9=
+
+psu_pmbus_reg.mode_2_9=config
+psu_pmbus_reg.src_2_9=other_i2c
+psu_pmbus_reg.frmt_2_9=byte
+psu_pmbus_reg.pola_2_9=negative
+psu_pmbus_reg.addr_2_9=0x02060079
+psu_pmbus_reg.len_2_9=2
+psu_pmbus_reg.bit_offset_2_9=
+
+# Configuration items:PMBUS register address of the power supply
+# Description: Format psu_status_[psu_index]_[reg_id]
+# Note:psu_index:Power supply number,start with 1 reg_id, 10:Power input Status (0x79)
+psu_pmbus_reg.mode_1_10=config
+psu_pmbus_reg.src_1_10=other_i2c
+psu_pmbus_reg.frmt_1_10=byte
+psu_pmbus_reg.pola_1_10=negative
+psu_pmbus_reg.addr_1_10=0x02050079
+psu_pmbus_reg.len_1_10=2
+psu_pmbus_reg.bit_offset_1_10=
+
+psu_pmbus_reg.mode_2_10=config
+psu_pmbus_reg.src_2_10=other_i2c
+psu_pmbus_reg.frmt_2_10=byte
+psu_pmbus_reg.pola_2_10=negative
+psu_pmbus_reg.addr_2_10=0x02060079
+psu_pmbus_reg.len_2_10=2
+psu_pmbus_reg.bit_offset_2_10=
+
+# Configuration items:PMBUS register address of the power supply
+# Description: Format psu_status_[psu_index]_[reg_id]
+# Note:psu_index:Power supply number,,start with 1 reg_id 11:Power Input type (0x80)
+psu_pmbus_reg.mode_1_11=config
+psu_pmbus_reg.src_1_11=other_i2c
+psu_pmbus_reg.frmt_1_11=byte
+psu_pmbus_reg.pola_1_11=positive
+psu_pmbus_reg.addr_1_11=0x02050080
+psu_pmbus_reg.len_1_11=1
+psu_pmbus_reg.bit_offset_1_11=
+
+psu_pmbus_reg.mode_2_11=config
+psu_pmbus_reg.src_2_11=other_i2c
+psu_pmbus_reg.frmt_2_11=byte
+psu_pmbus_reg.pola_2_11=positive
+psu_pmbus_reg.addr_2_11=0x02060080
+psu_pmbus_reg.len_2_11=1
+psu_pmbus_reg.bit_offset_2_11=
+
+
+psu_pmbus_reg.mode_1_12=config
+psu_pmbus_reg.src_1_12=other_i2c
+psu_pmbus_reg.frmt_1_12=byte
+psu_pmbus_reg.pola_1_12=positive
+psu_pmbus_reg.addr_1_12=0x0205003b
+psu_pmbus_reg.len_1_12=1
+psu_pmbus_reg.bit_offset_1_12=
+
+psu_pmbus_reg.mode_2_12=config
+psu_pmbus_reg.src_2_12=other_i2c
+psu_pmbus_reg.frmt_2_12=byte
+psu_pmbus_reg.pola_2_12=positive
+psu_pmbus_reg.addr_2_12=0x0206003b
+psu_pmbus_reg.len_2_12=1
+psu_pmbus_reg.bit_offset_2_12=
+
+# Configuration items:	Input status of the power module
+# Description: Format psu_pmbus_id_[psu_index]_[psu_sensor_type]=value
+# Note:	psu_index is Power supply number,start with 1, psu_sensor_type is PMBUS type,Input stateis 10
+# value value:bus[8]_addr[16]_offset[8]
+psu_pmbus_id_1_11=0x5F005880
+psu_pmbus_id_2_11=0x60005880
+
+
+# Configuration items:	Address of the power status register
+# Description: Format psu_status_[psu_index]_[status_id]
+# Note:	psu_index:Power supply number,start with 1 status_id 0:present 1:status 2:Alarm status
+psu_status.mode_1_0=config
+psu_status.src_1_0=cpld
+psu_status.frmt_1_0=bit
+psu_status.pola_1_0=negative
+psu_status.addr_1_0=0x00010058
+psu_status.len_1_0=1
+psu_status.bit_offset_1_0=2
+
+psu_status.mode_1_1=config
+psu_status.src_1_1=cpld
+psu_status.frmt_1_1=bit
+psu_status.pola_1_1=positive
+psu_status.addr_1_1=0x00010058
+psu_status.len_1_1=1
+psu_status.bit_offset_1_1=1
+
+psu_status.mode_1_2=config
+psu_status.src_1_2=cpld
+psu_status.frmt_1_2=bit
+psu_status.pola_1_2=positive
+psu_status.addr_1_2=0x00010058
+psu_status.len_1_2=1
+psu_status.bit_offset_1_2=0
+
+psu_status.mode_2_0=config
+psu_status.src_2_0=cpld
+psu_status.frmt_2_0=bit
+psu_status.pola_2_0=negative
+psu_status.addr_2_0=0x00010058
+psu_status.len_2_0=1
+psu_status.bit_offset_2_0=6
+
+psu_status.mode_2_1=config
+psu_status.src_2_1=cpld
+psu_status.frmt_2_1=bit
+psu_status.pola_2_1=positive
+psu_status.addr_2_1=0x00010058
+psu_status.len_2_1=1
+psu_status.bit_offset_2_1=5
+
+psu_status.mode_2_2=config
+psu_status.src_2_2=cpld
+psu_status.frmt_2_2=bit
+psu_status.pola_2_2=positive
+psu_status.addr_2_2=0x00010058
+psu_status.len_2_2=1
+psu_status.bit_offset_2_2=4
+
+# Configuration items:PSU PMBUS information
+# Description: Format hwmon_psu_[psu_index]_[sensor_type]
+# Note:	psu_index:Power supply number,start with 1 sensor_type definition is as follows:
+# 0:None 1:in_vol 2:in_curr 3:in_power 4:out_vol 5:out_curr 6:out_power 7:fan
+# psu1 in_vol
+hwmon_psu.mode_1_1=config
+hwmon_psu.int_cons_1_1=0
+hwmon_psu.src_1_1=file
+hwmon_psu.frmt_1_1=buf
+hwmon_psu.fpath_1_1=/sys/bus/i2c/devices/42-0058/hwmon/
+hwmon_psu.addr_1_1=0
+hwmon_psu.len_1_1=8
+hwmon_psu.bit_offset_1_1=
+hwmon_psu.str_cons_1_1=in1_input
+
+# psu1 in_curr
+hwmon_psu.mode_1_2=config
+hwmon_psu.int_cons_1_2=0
+hwmon_psu.src_1_2=file
+hwmon_psu.frmt_1_2=buf
+hwmon_psu.fpath_1_2=/sys/bus/i2c/devices/42-0058/hwmon/
+hwmon_psu.addr_1_2=0
+hwmon_psu.len_1_2=8
+hwmon_psu.bit_offset_1_2=
+hwmon_psu.str_cons_1_2=curr1_input
+
+# psu1 in_power
+hwmon_psu.mode_1_3=config
+hwmon_psu.int_cons_1_3=0
+hwmon_psu.src_1_3=file
+hwmon_psu.frmt_1_3=buf
+hwmon_psu.fpath_1_3=/sys/bus/i2c/devices/42-0058/hwmon/
+hwmon_psu.addr_1_3=0
+hwmon_psu.len_1_3=16
+hwmon_psu.bit_offset_1_3=0
+hwmon_psu.str_cons_1_3=power1_input
+
+# psu1 out_vol
+hwmon_psu.mode_1_4=config
+hwmon_psu.int_cons_1_4=0
+hwmon_psu.src_1_4=file
+hwmon_psu.frmt_1_4=buf
+hwmon_psu.fpath_1_4=/sys/bus/i2c/devices/42-0058/hwmon/
+hwmon_psu.addr_1_4=0
+hwmon_psu.len_1_4=8
+hwmon_psu.bit_offset_1_4=
+hwmon_psu.str_cons_1_4=in2_input
+
+# psu1 out_curr
+hwmon_psu.mode_1_5=config
+hwmon_psu.int_cons_1_5=0
+hwmon_psu.src_1_5=file
+hwmon_psu.frmt_1_5=buf
+hwmon_psu.fpath_1_5=/sys/bus/i2c/devices/42-0058/hwmon/
+hwmon_psu.addr_1_5=0
+hwmon_psu.len_1_5=8
+hwmon_psu.bit_offset_1_5=
+hwmon_psu.str_cons_1_5=curr2_input
+
+# psu1 out_power
+hwmon_psu.mode_1_6=config
+hwmon_psu.int_cons_1_6=0
+hwmon_psu.src_1_6=file
+hwmon_psu.frmt_1_6=buf
+hwmon_psu.fpath_1_6=/sys/bus/i2c/devices/42-0058/hwmon/
+hwmon_psu.addr_1_6=0
+hwmon_psu.len_1_6=16
+hwmon_psu.bit_offset_1_6=0
+hwmon_psu.str_cons_1_6=power2_input
+
+# psu1 fan
+hwmon_psu.mode_1_7=config
+hwmon_psu.int_cons_1_7=
+hwmon_psu.src_1_7=file
+hwmon_psu.frmt_1_7=buf
+hwmon_psu.fpath_1_7=/sys/bus/i2c/devices/42-0058/hwmon/
+hwmon_psu.addr_1_7=0
+hwmon_psu.len_1_7=8
+hwmon_psu.bit_offset_1_7=
+hwmon_psu.str_cons_1_7=fan1_input
+
+# psu2 in_vol
+hwmon_psu.mode_2_1=config
+hwmon_psu.int_cons_2_1=0
+hwmon_psu.src_2_1=file
+hwmon_psu.frmt_2_1=buf
+hwmon_psu.fpath_2_1=/sys/bus/i2c/devices/43-0058/hwmon/
+hwmon_psu.addr_2_1=0
+hwmon_psu.len_2_1=8
+hwmon_psu.bit_offset_2_1=
+hwmon_psu.str_cons_2_1=in1_input
+
+# psu2 in_curr
+hwmon_psu.mode_2_2=config
+hwmon_psu.int_cons_2_2=0
+hwmon_psu.src_2_2=file
+hwmon_psu.frmt_2_2=buf
+hwmon_psu.fpath_2_2=/sys/bus/i2c/devices/43-0058/hwmon/
+hwmon_psu.addr_2_2=0
+hwmon_psu.len_2_2=8
+hwmon_psu.bit_offset_2_2=
+hwmon_psu.str_cons_2_2=curr1_input
+
+# psu2 in_power
+hwmon_psu.mode_2_3=config
+hwmon_psu.int_cons_2_3=0
+hwmon_psu.src_2_3=file
+hwmon_psu.frmt_2_3=buf
+hwmon_psu.fpath_2_3=/sys/bus/i2c/devices/43-0058/hwmon/
+hwmon_psu.addr_2_3=0
+hwmon_psu.len_2_3=16
+hwmon_psu.bit_offset_2_3=0
+hwmon_psu.str_cons_2_3=power1_input
+
+# psu2 out_vol
+hwmon_psu.mode_2_4=config
+hwmon_psu.int_cons_2_4=0
+hwmon_psu.src_2_4=file
+hwmon_psu.frmt_2_4=buf
+hwmon_psu.fpath_2_4=/sys/bus/i2c/devices/43-0058/hwmon/
+hwmon_psu.addr_2_4=0
+hwmon_psu.len_2_4=8
+hwmon_psu.bit_offset_2_4=
+hwmon_psu.str_cons_2_4=in2_input
+
+# psu2 out_curr
+hwmon_psu.mode_2_5=config
+hwmon_psu.int_cons_2_5=0
+hwmon_psu.src_2_5=file
+hwmon_psu.frmt_2_5=buf
+hwmon_psu.fpath_2_5=/sys/bus/i2c/devices/43-0058/hwmon/
+hwmon_psu.addr_2_5=0
+hwmon_psu.len_2_5=8
+hwmon_psu.bit_offset_2_5=
+hwmon_psu.str_cons_2_5=curr2_input
+
+# psu2 out_power
+hwmon_psu.mode_2_6=config
+hwmon_psu.int_cons_2_6=0
+hwmon_psu.src_2_6=file
+hwmon_psu.frmt_2_6=buf
+hwmon_psu.fpath_2_6=/sys/bus/i2c/devices/43-0058/hwmon/
+hwmon_psu.addr_2_6=0
+hwmon_psu.len_2_6=16
+hwmon_psu.bit_offset_2_6=0
+hwmon_psu.str_cons_2_6=power2_input
+
+# psu2 fan
+hwmon_psu.mode_2_7=config
+hwmon_psu.int_cons_2_7=
+hwmon_psu.src_2_7=file
+hwmon_psu.frmt_2_7=buf
+hwmon_psu.fpath_2_7=/sys/bus/i2c/devices/43-0058/hwmon/
+hwmon_psu.addr_2_7=0
+hwmon_psu.len_2_7=8
+hwmon_psu.bit_offset_2_7=
+hwmon_psu.str_cons_2_7=fan1_input
+
+
+# Configuration items:	Temperature hwmon path
+# Description: Format hwmon_temp[key1]_[key2]
+# Note:	key1: high 8bit indicates the index of the device (start with 1), and the low 8bit indicates the temperature index,start with 1
+# key2: high 4bit indicates the main device type, the power supply is 5, and the low 4bit indicates the temperature type
+# 0:input 1:alias 2:type 3:max 4:max_hyst 5:min 6:crit
+# mode: str_constant takes the value of str_cons directly, and config reads it in the way specified by src
+# int_cons:N raw value/(10^N)
+# fpath:hwmon first half of the path
+# bit_offset: Number of decimal places, retain original precision if not configured
+# str_cons:if mode is str_constant,the value is result of read,if read from file the value is read file name.
+
+# psu1 temp1 input
+hwmon_temp.mode_0x0101_0x20=config
+hwmon_temp.int_cons_0x0101_0x20=0
+hwmon_temp.src_0x0101_0x20=file
+hwmon_temp.frmt_0x0101_0x20=buf
+hwmon_temp.fpath_0x0101_0x20=/sys/bus/i2c/devices/42-0058/hwmon/
+hwmon_temp.addr_0x0101_0x20=0
+hwmon_temp.len_0x0101_0x20=8
+hwmon_temp.bit_offset_0x0101_0x20=
+hwmon_temp.str_cons_0x0101_0x20=temp1_input
+
+# psu1 temp1 alias
+hwmon_temp.mode_0x0101_0x21=str_constant
+hwmon_temp.str_cons_0x0101_0x21=temp1
+# psu1 temp1 max
+hwmon_temp.mode_0x0101_0x23=str_constant
+hwmon_temp.str_cons_0x0101_0x23=60000
+# psu1 temp1 min
+hwmon_temp.mode_0x0101_0x25=str_constant
+hwmon_temp.str_cons_0x0101_0x25=-10000
+# psu1 temp1 type
+hwmon_temp.mode_0x0101_0x22=str_constant
+hwmon_temp.str_cons_0x0101_0x22=psu_pmbus
+
+# psu1 temp2 input
+hwmon_temp.mode_0x0102_0x20=config
+hwmon_temp.int_cons_0x0102_0x20=0
+hwmon_temp.src_0x0102_0x20=file
+hwmon_temp.frmt_0x0102_0x20=buf
+hwmon_temp.fpath_0x0102_0x20=/sys/bus/i2c/devices/42-0058/hwmon/
+hwmon_temp.addr_0x0102_0x20=0
+hwmon_temp.len_0x0102_0x20=8
+hwmon_temp.bit_offset_0x0102_0x20=
+hwmon_temp.str_cons_0x0102_0x20=temp2_input
+
+# psu1 temp2 alias
+hwmon_temp.mode_0x0102_0x21=str_constant
+hwmon_temp.str_cons_0x0102_0x21=temp2
+# psu1 temp2 max
+hwmon_temp.mode_0x0102_0x23=str_constant
+hwmon_temp.str_cons_0x0102_0x23=60000
+# psu1 temp2 min
+hwmon_temp.mode_0x0102_0x25=str_constant
+hwmon_temp.str_cons_0x0102_0x25=-10000
+# psu1 temp2 type
+hwmon_temp.mode_0x0102_0x22=str_constant
+hwmon_temp.str_cons_0x0102_0x22=psu_pmbus
+
+# psu1 temp3 input
+hwmon_temp.mode_0x0103_0x20=config
+hwmon_temp.int_cons_0x0103_0x20=0
+hwmon_temp.src_0x0103_0x20=file
+hwmon_temp.frmt_0x0103_0x20=buf
+hwmon_temp.fpath_0x0103_0x20=/sys/bus/i2c/devices/42-0058/hwmon/
+hwmon_temp.addr_0x0103_0x20=0
+hwmon_temp.len_0x0103_0x20=8
+hwmon_temp.bit_offset_0x0103_0x20=
+hwmon_temp.str_cons_0x0103_0x20=temp3_input
+
+# psu1 temp3 alias
+hwmon_temp.mode_0x0103_0x21=str_constant
+hwmon_temp.str_cons_0x0103_0x21=temp3
+# psu1 temp3 max
+hwmon_temp.mode_0x0103_0x23=str_constant
+hwmon_temp.str_cons_0x0103_0x23=60000
+# psu1 temp3 min
+hwmon_temp.mode_0x0103_0x25=str_constant
+hwmon_temp.str_cons_0x0103_0x25=-10000
+# psu1 temp1 type
+hwmon_temp.mode_0x0103_0x22=str_constant
+hwmon_temp.str_cons_0x0103_0x22=psu_pmbus
+
+# psu2 temp1 input
+hwmon_temp.mode_0x0201_0x20=config
+hwmon_temp.int_cons_0x0201_0x20=0
+hwmon_temp.src_0x0201_0x20=file
+hwmon_temp.frmt_0x0201_0x20=buf
+hwmon_temp.fpath_0x0201_0x20=/sys/bus/i2c/devices/43-0058/hwmon/
+hwmon_temp.addr_0x0201_0x20=0
+hwmon_temp.len_0x0201_0x20=8
+hwmon_temp.bit_offset_0x0201_0x20=
+hwmon_temp.str_cons_0x0201_0x20=temp1_input
+
+# psu2 temp1 alias
+hwmon_temp.mode_0x0201_0x21=str_constant
+hwmon_temp.str_cons_0x0201_0x21=temp1
+# psu2 temp1 max
+hwmon_temp.mode_0x0201_0x23=str_constant
+hwmon_temp.str_cons_0x0201_0x23=60000
+# psu2 temp1 min
+hwmon_temp.mode_0x0201_0x25=str_constant
+hwmon_temp.str_cons_0x0201_0x25=-10000
+# psu2 temp1 type
+hwmon_temp.mode_0x0201_0x22=str_constant
+hwmon_temp.str_cons_0x0201_0x22=psu_pmbus
+
+# psu2 temp2 input
+hwmon_temp.mode_0x0202_0x20=config
+hwmon_temp.int_cons_0x0202_0x20=0
+hwmon_temp.src_0x0202_0x20=file
+hwmon_temp.frmt_0x0202_0x20=buf
+hwmon_temp.fpath_0x0202_0x20=/sys/bus/i2c/devices/43-0058/hwmon/
+hwmon_temp.addr_0x0202_0x20=0
+hwmon_temp.len_0x0202_0x20=8
+hwmon_temp.bit_offset_0x0202_0x20=
+hwmon_temp.str_cons_0x0202_0x20=temp2_input
+
+# psu2 temp2 alias
+hwmon_temp.mode_0x0202_0x21=str_constant
+hwmon_temp.str_cons_0x0202_0x21=temp2
+# psu2 temp2 max
+hwmon_temp.mode_0x0202_0x23=str_constant
+hwmon_temp.str_cons_0x0202_0x23=60000
+# psu2 temp2 min
+hwmon_temp.mode_0x0202_0x25=str_constant
+hwmon_temp.str_cons_0x0202_0x25=-10000
+# psu2 temp2 type
+hwmon_temp.mode_0x0202_0x22=str_constant
+hwmon_temp.str_cons_0x0202_0x22=psu_pmbus
+
+# psu2 temp3 input
+hwmon_temp.mode_0x0203_0x20=config
+hwmon_temp.int_cons_0x0203_0x20=0
+hwmon_temp.src_0x0203_0x20=file
+hwmon_temp.frmt_0x0203_0x20=buf
+hwmon_temp.fpath_0x0203_0x20=/sys/bus/i2c/devices/43-0058/hwmon/
+hwmon_temp.addr_0x0203_0x20=0
+hwmon_temp.len_0x0203_0x20=8
+hwmon_temp.bit_offset_0x0203_0x20=
+hwmon_temp.str_cons_0x0203_0x20=temp3_input
+
+# psu2 temp3 alias
+hwmon_temp.mode_0x0203_0x21=str_constant
+hwmon_temp.str_cons_0x0203_0x21=temp3
+# psu2 temp3 max
+hwmon_temp.mode_0x0203_0x23=str_constant
+hwmon_temp.str_cons_0x0203_0x23=60000
+# psu2 temp3 min
+hwmon_temp.mode_0x0203_0x25=str_constant
+hwmon_temp.str_cons_0x0203_0x25=-10000
+# psu2 temp3 type
+hwmon_temp.mode_0x0203_0x22=str_constant
+hwmon_temp.str_cons_0x0203_0x22=psu_pmbus
+
+# psu3 temp1 input
+hwmon_temp.mode_0x0301_0x20=config
+hwmon_temp.int_cons_0x0301_0x20=0
+hwmon_temp.src_0x0301_0x20=file
+hwmon_temp.frmt_0x0301_0x20=buf
+hwmon_temp.fpath_0x0301_0x20=/sys/bus/i2c/devices/97-0058/hwmon/
+hwmon_temp.addr_0x0301_0x20=0
+hwmon_temp.len_0x0301_0x20=8
+hwmon_temp.bit_offset_0x0301_0x20=
+hwmon_temp.str_cons_0x0301_0x20=temp1_input
+
+# psu3 temp1 alias
+hwmon_temp.mode_0x0301_0x21=str_constant
+hwmon_temp.str_cons_0x0301_0x21=temp1
+# psu3 temp1 max
+hwmon_temp.mode_0x0301_0x23=str_constant
+hwmon_temp.str_cons_0x0301_0x23=60000
+# psu3 temp1 min
+hwmon_temp.mode_0x0301_0x25=str_constant
+hwmon_temp.str_cons_0x0301_0x25=-10000
+# psu3 temp1 type
+hwmon_temp.mode_0x0301_0x22=str_constant
+hwmon_temp.str_cons_0x0301_0x22=psu_pmbus
+
+# psu3 temp2 input
+hwmon_temp.mode_0x0302_0x20=config
+hwmon_temp.int_cons_0x0302_0x20=0
+hwmon_temp.src_0x0302_0x20=file
+hwmon_temp.frmt_0x0302_0x20=buf
+hwmon_temp.fpath_0x0302_0x20=/sys/bus/i2c/devices/97-0058/hwmon/
+hwmon_temp.addr_0x0302_0x20=0
+hwmon_temp.len_0x0302_0x20=8
+hwmon_temp.bit_offset_0x0302_0x20=
+hwmon_temp.str_cons_0x0302_0x20=temp2_input
+
+# psu3 temp2 alias
+hwmon_temp.mode_0x0302_0x21=str_constant
+hwmon_temp.str_cons_0x0302_0x21=temp2
+# psu3 temp2 max
+hwmon_temp.mode_0x0302_0x23=str_constant
+hwmon_temp.str_cons_0x0302_0x23=60000
+# psu3 temp2 min
+hwmon_temp.mode_0x0302_0x25=str_constant
+hwmon_temp.str_cons_0x0302_0x25=-10000
+# psu3 temp2 type
+hwmon_temp.mode_0x0302_0x22=str_constant
+hwmon_temp.str_cons_0x0302_0x22=psu_pmbus
+
+# psu3 temp3 input
+hwmon_temp.mode_0x0303_0x20=config
+hwmon_temp.int_cons_0x0303_0x20=0
+hwmon_temp.src_0x0303_0x20=file
+hwmon_temp.frmt_0x0303_0x20=buf
+hwmon_temp.fpath_0x0303_0x20=/sys/bus/i2c/devices/97-0058/hwmon/
+hwmon_temp.addr_0x0303_0x20=0
+hwmon_temp.len_0x0303_0x20=8
+hwmon_temp.bit_offset_0x0303_0x20=
+hwmon_temp.str_cons_0x0303_0x20=temp3_input
+
+# psu3 temp3 alias
+hwmon_temp.mode_0x0303_0x21=str_constant
+hwmon_temp.str_cons_0x0303_0x21=temp3
+# psu3 temp3 max
+hwmon_temp.mode_0x0303_0x23=str_constant
+hwmon_temp.str_cons_0x0303_0x23=60000
+# psu3 temp3 min
+hwmon_temp.mode_0x0303_0x25=str_constant
+hwmon_temp.str_cons_0x0303_0x25=-10000
+# psu3 temp3 type
+hwmon_temp.mode_0x0303_0x22=str_constant
+hwmon_temp.str_cons_0x0303_0x22=psu_pmbus
+
+# psu4 temp1 input
+hwmon_temp.mode_0x0401_0x20=config
+hwmon_temp.int_cons_0x0401_0x20=0
+hwmon_temp.src_0x0401_0x20=file
+hwmon_temp.frmt_0x0401_0x20=buf
+hwmon_temp.fpath_0x0401_0x20=/sys/bus/i2c/devices/98-0058/hwmon/
+hwmon_temp.addr_0x0401_0x20=0
+hwmon_temp.len_0x0401_0x20=8
+hwmon_temp.bit_offset_0x0401_0x20=
+hwmon_temp.str_cons_0x0401_0x20=temp1_input
+
+# psu4 temp1 alias
+hwmon_temp.mode_0x0401_0x21=str_constant
+hwmon_temp.str_cons_0x0401_0x21=temp1
+# psu4 temp1 max
+hwmon_temp.mode_0x0401_0x23=str_constant
+hwmon_temp.str_cons_0x0401_0x23=60000
+# psu4 temp1 min
+hwmon_temp.mode_0x0401_0x25=str_constant
+hwmon_temp.str_cons_0x0401_0x25=-10000
+# psu4 temp1 type
+hwmon_temp.mode_0x0401_0x22=str_constant
+hwmon_temp.str_cons_0x0401_0x22=psu_pmbus
+
+# psu4 temp2 input
+hwmon_temp.mode_0x0402_0x20=config
+hwmon_temp.int_cons_0x0402_0x20=0
+hwmon_temp.src_0x0402_0x20=file
+hwmon_temp.frmt_0x0402_0x20=buf
+hwmon_temp.fpath_0x0402_0x20=/sys/bus/i2c/devices/98-0058/hwmon/
+hwmon_temp.addr_0x0402_0x20=0
+hwmon_temp.len_0x0402_0x20=8
+hwmon_temp.bit_offset_0x0402_0x20=
+hwmon_temp.str_cons_0x0402_0x20=temp2_input
+
+# psu4 temp2 alias
+hwmon_temp.mode_0x0402_0x21=str_constant
+hwmon_temp.str_cons_0x0402_0x21=temp2
+# psu4 temp2 max
+hwmon_temp.mode_0x0402_0x23=str_constant
+hwmon_temp.str_cons_0x0402_0x23=60000
+# psu4 temp2 min
+hwmon_temp.mode_0x0402_0x25=str_constant
+hwmon_temp.str_cons_0x0402_0x25=-10000
+# psu4 temp2 type
+hwmon_temp.mode_0x0402_0x22=str_constant
+hwmon_temp.str_cons_0x0402_0x22=psu_pmbus
+
+# psu4 temp3 input
+hwmon_temp.mode_0x0403_0x20=config
+hwmon_temp.int_cons_0x0403_0x20=0
+hwmon_temp.src_0x0403_0x20=file
+hwmon_temp.frmt_0x0403_0x20=buf
+hwmon_temp.fpath_0x0403_0x20=/sys/bus/i2c/devices/98-0058/hwmon/
+hwmon_temp.addr_0x0403_0x20=0
+hwmon_temp.len_0x0403_0x20=8
+hwmon_temp.bit_offset_0x0403_0x20=
+hwmon_temp.str_cons_0x0403_0x20=temp3_input
+
+# psu4 temp3 alias
+hwmon_temp.mode_0x0403_0x21=str_constant
+hwmon_temp.str_cons_0x0403_0x21=temp3
+# psu4 temp3 max
+hwmon_temp.mode_0x0403_0x23=str_constant
+hwmon_temp.str_cons_0x0403_0x23=60000
+# psu4 temp3 min
+hwmon_temp.mode_0x0403_0x25=str_constant
+hwmon_temp.str_cons_0x0403_0x25=-10000
+# psu4 temp3 type
+hwmon_temp.mode_0x0403_0x22=str_constant
+hwmon_temp.str_cons_0x0403_0x22=psu_pmbus
+
+# Configuration items:	The number of power supply names displayed by the product
+# Description: Format dev_num_[main_dev]_[minor_dev]
+# Note:	main_dev,PSU is 2, minor_dev, 6:The number of power supply names displayed
+dev_num_2_6=2
+
+# Configuration items:	Product power supply type name
+# Description: Format power_name_[index1]_[index2]
+# Note:	index1 Indicates the power supply displayed ID, start with 1,
+# index2 Indicates different power supplies with the same ID, start with 1
+power_name_1_1=ECDL3000123
+power_name_1_2=CRPS3000CL
+
+# Configuration items:	The power supply name is displayed
+# Description: Format decode_power_name_[index]
+# Note:	index Indicates the power supply displayed ID
+decode_power_name_1=PA3000I-F
+
+
+# Configuration items:	Rated power of supply
+# Description: Format power_rate_supply_[index]
+# Note:	index Indicates the power supply displayed ID
+power_rate_supply_1=1300000000
+
+# Configuration items:	Displays the type of power duct
+# Description: Format decode_power_fan_dir_[index]
+# Note:	index Indicates the power supply displayed ID,attr 0 indicates -F and 1 indicates -R
+decode_power_fan_dir_1=0
+decode_power_fan_dir_2=1
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg
new file mode 100644
index 000000000000..7bdfdcd9369c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg
@@ -0,0 +1,3463 @@
+#
+# @Fill in the agreement
+# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of
+# configuration items and invalid Spaces must not be added between configuration items
+# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x"
+# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and
+# fill in the configuration items, do not delete them
+# 4. Configuration item
+
+# Configuration item: Temperature hwmon path
+# Description: Format hwmon_temp[key1]_[key2]
+# Note: key1: A high 8bit indicates the device index starting from 1. A low 8bit indicates the temperature index starting from 1
+# key2:The high 4bit indicates the main device type, the sub-card is 5, and the low 4bit indicates the temperature type 0:input 1:alias
+# 2:type 3:max 4:max_hyst 5:min 6:crit
+# mode: str_constant takes the value of str_cons directly, and config reads it in the way specified by src
+# int_cons:N raw value/(10^N)
+# fpath:hwmon first half of the path
+# bit_offset: Number of decimal places, retain original precision if not configured
+# str_cons:if mode is str_constant,the value is result of read,if read from file the value is read file name.
+
+# temperature sensor number
+dev_num_0_1=20
+
+# voltage sensors number
+dev_num_0_2=112
+
+# current sensors number
+dev_num_0_3=7
+
+# value :           0
+# alias :           1
+# type :            2
+# max :             3
+# hyst :            4
+# min :             5
+# crit :            6
+# range :           7
+# nominal_value :   8
+# high :            9
+# low :             10
+
+# sensor temp1 input
+hwmon_temp.mode_0x0001_0x00=config
+hwmon_temp.int_cons_0x0001_0x00=0
+hwmon_temp.src_0x0001_0x00=file
+hwmon_temp.frmt_0x0001_0x00=buf
+hwmon_temp.fpath_0x0001_0x00=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0001_0x00=0
+hwmon_temp.len_0x0001_0x00=8
+hwmon_temp.bit_offset_0x0001_0x00=
+hwmon_temp.str_cons_0x0001_0x00=temp1_input
+
+# sensor temp1 alias
+hwmon_temp.mode_0x0001_0x01=config
+hwmon_temp.int_cons_0x0001_0x01=
+hwmon_temp.src_0x0001_0x01=file
+hwmon_temp.frmt_0x0001_0x01=buf
+hwmon_temp.fpath_0x0001_0x01=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0001_0x01=0
+hwmon_temp.len_0x0001_0x01=16
+hwmon_temp.bit_offset_0x0001_0x01=
+hwmon_temp.str_cons_0x0001_0x01=temp1_label
+# sensor temp1 type
+hwmon_temp.mode_0x0001_0x02=str_constant
+hwmon_temp.str_cons_0x0001_0x02=cpu
+
+# sensor temp1 max
+hwmon_temp.mode_0x0001_0x03=config
+hwmon_temp.int_cons_0x0001_0x03=0
+hwmon_temp.src_0x0001_0x03=file
+hwmon_temp.frmt_0x0001_0x03=buf
+hwmon_temp.fpath_0x0001_0x03=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0001_0x03=0
+hwmon_temp.len_0x0001_0x03=8
+hwmon_temp.bit_offset_0x0001_0x03=
+hwmon_temp.str_cons_0x0001_0x03=temp1_max
+# sensor temp1 min
+hwmon_temp.mode_0x0001_0x05=str_constant
+hwmon_temp.str_cons_0x0001_0x05=-30000
+
+# sensor temp2 input
+hwmon_temp.mode_0x0002_0x00=config
+hwmon_temp.int_cons_0x0002_0x00=0
+hwmon_temp.src_0x0002_0x00=file
+hwmon_temp.frmt_0x0002_0x00=buf
+hwmon_temp.fpath_0x0002_0x00=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0002_0x00=0
+hwmon_temp.len_0x0002_0x00=8
+hwmon_temp.bit_offset_0x0002_0x00=
+hwmon_temp.str_cons_0x0002_0x00=temp2_input
+
+# sensor temp2 alias
+hwmon_temp.mode_0x0002_0x01=config
+hwmon_temp.int_cons_0x0002_0x01=
+hwmon_temp.src_0x0002_0x01=file
+hwmon_temp.frmt_0x0002_0x01=buf
+hwmon_temp.fpath_0x0002_0x01=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0002_0x01=0
+hwmon_temp.len_0x0002_0x01=16
+hwmon_temp.bit_offset_0x0002_0x01=
+hwmon_temp.str_cons_0x0002_0x01=temp2_label
+
+hwmon_temp.mode_0x0002_0x02=str_constant
+hwmon_temp.str_cons_0x0002_0x02=cpu
+
+# sensor temp2 max
+hwmon_temp.mode_0x0002_0x03=config
+hwmon_temp.int_cons_0x0002_0x03=0
+hwmon_temp.src_0x0002_0x03=file
+hwmon_temp.frmt_0x0002_0x03=buf
+hwmon_temp.fpath_0x0002_0x03=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0002_0x03=0
+hwmon_temp.len_0x0002_0x03=8
+hwmon_temp.bit_offset_0x0002_0x03=
+hwmon_temp.str_cons_0x0002_0x03=temp2_max
+# sensor temp2 min
+hwmon_temp.mode_0x0002_0x05=str_constant
+hwmon_temp.str_cons_0x0002_0x05=-30000
+
+# sensor temp3 input
+hwmon_temp.mode_0x0003_0x00=config
+hwmon_temp.int_cons_0x0003_0x00=0
+hwmon_temp.src_0x0003_0x00=file
+hwmon_temp.frmt_0x0003_0x00=buf
+hwmon_temp.fpath_0x0003_0x00=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0003_0x00=0
+hwmon_temp.len_0x0003_0x00=8
+hwmon_temp.bit_offset_0x0003_0x00=
+hwmon_temp.str_cons_0x0003_0x00=temp3_input
+
+# sensor temp3 alias
+hwmon_temp.mode_0x0003_0x01=config
+hwmon_temp.int_cons_0x0003_0x01=
+hwmon_temp.src_0x0003_0x01=file
+hwmon_temp.frmt_0x0003_0x01=buf
+hwmon_temp.fpath_0x0003_0x01=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0003_0x01=0
+hwmon_temp.len_0x0003_0x01=16
+hwmon_temp.bit_offset_0x0003_0x01=
+hwmon_temp.str_cons_0x0003_0x01=temp3_label
+
+hwmon_temp.mode_0x0003_0x02=str_constant
+hwmon_temp.str_cons_0x0003_0x02=cpu
+
+# sensor temp3 max
+hwmon_temp.mode_0x0003_0x03=config
+hwmon_temp.int_cons_0x0003_0x03=0
+hwmon_temp.src_0x0003_0x03=file
+hwmon_temp.frmt_0x0003_0x03=buf
+hwmon_temp.fpath_0x0003_0x03=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0003_0x03=0
+hwmon_temp.len_0x0003_0x03=8
+hwmon_temp.bit_offset_0x0003_0x03=
+hwmon_temp.str_cons_0x0003_0x03=temp3_max
+# sensor temp3 min
+hwmon_temp.mode_0x0003_0x05=str_constant
+hwmon_temp.str_cons_0x0003_0x05=-30000
+
+# sensor temp4 input
+hwmon_temp.mode_0x0004_0x00=config
+hwmon_temp.int_cons_0x0004_0x00=0
+hwmon_temp.src_0x0004_0x00=file
+hwmon_temp.frmt_0x0004_0x00=buf
+hwmon_temp.fpath_0x0004_0x00=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0004_0x00=0
+hwmon_temp.len_0x0004_0x00=8
+hwmon_temp.bit_offset_0x0004_0x00=
+hwmon_temp.str_cons_0x0004_0x00=temp4_input
+
+# sensor temp4 alias
+hwmon_temp.mode_0x0004_0x01=config
+hwmon_temp.int_cons_0x0004_0x01=
+hwmon_temp.src_0x0004_0x01=file
+hwmon_temp.frmt_0x0004_0x01=buf
+hwmon_temp.fpath_0x0004_0x01=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0004_0x01=0
+hwmon_temp.len_0x0004_0x01=16
+hwmon_temp.bit_offset_0x0004_0x01=
+hwmon_temp.str_cons_0x0004_0x01=temp4_label
+
+hwmon_temp.mode_0x0004_0x02=str_constant
+hwmon_temp.str_cons_0x0004_0x02=cpu
+
+# sensor temp4 max
+hwmon_temp.mode_0x0004_0x03=config
+hwmon_temp.int_cons_0x0004_0x03=0
+hwmon_temp.src_0x0004_0x03=file
+hwmon_temp.frmt_0x0004_0x03=buf
+hwmon_temp.fpath_0x0004_0x03=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0004_0x03=0
+hwmon_temp.len_0x0004_0x03=8
+hwmon_temp.bit_offset_0x0004_0x03=
+hwmon_temp.str_cons_0x0004_0x03=temp4_max
+# sensor temp4 min
+hwmon_temp.mode_0x0004_0x05=str_constant
+hwmon_temp.str_cons_0x0004_0x05=-30000
+
+# sensor temp5 input
+hwmon_temp.mode_0x0005_0x00=config
+hwmon_temp.int_cons_0x0005_0x00=0
+hwmon_temp.src_0x0005_0x00=file
+hwmon_temp.frmt_0x0005_0x00=buf
+hwmon_temp.fpath_0x0005_0x00=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0005_0x00=0
+hwmon_temp.len_0x0005_0x00=8
+hwmon_temp.bit_offset_0x0005_0x00=
+hwmon_temp.str_cons_0x0005_0x00=temp5_input
+
+# sensor temp5 alias
+hwmon_temp.mode_0x0005_0x01=config
+hwmon_temp.int_cons_0x0005_0x01=
+hwmon_temp.src_0x0005_0x01=file
+hwmon_temp.frmt_0x0005_0x01=buf
+hwmon_temp.fpath_0x0005_0x01=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0005_0x01=0
+hwmon_temp.len_0x0005_0x01=16
+hwmon_temp.bit_offset_0x0005_0x01=
+hwmon_temp.str_cons_0x0005_0x01=temp5_label
+
+hwmon_temp.mode_0x0005_0x02=str_constant
+hwmon_temp.str_cons_0x0005_0x02=cpu
+
+# sensor temp5 max
+hwmon_temp.mode_0x0005_0x03=config
+hwmon_temp.int_cons_0x0005_0x03=0
+hwmon_temp.src_0x0005_0x03=file
+hwmon_temp.frmt_0x0005_0x03=buf
+hwmon_temp.fpath_0x0005_0x03=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0005_0x03=0
+hwmon_temp.len_0x0005_0x03=8
+hwmon_temp.bit_offset_0x0005_0x03=
+hwmon_temp.str_cons_0x0005_0x03=temp5_max
+# sensor temp5 min
+hwmon_temp.mode_0x0005_0x05=str_constant
+hwmon_temp.str_cons_0x0005_0x05=-30000
+
+# sensor temp6 input
+hwmon_temp.mode_0x0006_0x00=config
+hwmon_temp.int_cons_0x0006_0x00=0
+hwmon_temp.src_0x0006_0x00=file
+hwmon_temp.frmt_0x0006_0x00=buf
+hwmon_temp.fpath_0x0006_0x00=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0006_0x00=0
+hwmon_temp.len_0x0006_0x00=8
+hwmon_temp.bit_offset_0x0006_0x00=
+hwmon_temp.str_cons_0x0006_0x00=temp6_input
+
+# sensor temp6 alias
+hwmon_temp.mode_0x0006_0x01=config
+hwmon_temp.int_cons_0x0006_0x01=
+hwmon_temp.src_0x0006_0x01=file
+hwmon_temp.frmt_0x0006_0x01=buf
+hwmon_temp.fpath_0x0006_0x01=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0006_0x01=0
+hwmon_temp.len_0x0006_0x01=16
+hwmon_temp.bit_offset_0x0006_0x01=
+hwmon_temp.str_cons_0x0006_0x01=temp6_label
+
+hwmon_temp.mode_0x0006_0x02=str_constant
+hwmon_temp.str_cons_0x0006_0x02=cpu
+
+# sensor temp6 max
+hwmon_temp.mode_0x0006_0x03=config
+hwmon_temp.int_cons_0x0006_0x03=0
+hwmon_temp.src_0x0006_0x03=file
+hwmon_temp.frmt_0x0006_0x03=buf
+hwmon_temp.fpath_0x0006_0x03=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0006_0x03=0
+hwmon_temp.len_0x0006_0x03=8
+hwmon_temp.bit_offset_0x0006_0x03=
+hwmon_temp.str_cons_0x0006_0x03=temp6_max
+# sensor temp6 min
+hwmon_temp.mode_0x0006_0x05=str_constant
+hwmon_temp.str_cons_0x0006_0x05=-30000
+
+# sensor temp7 input
+hwmon_temp.mode_0x0007_0x00=config
+hwmon_temp.int_cons_0x0007_0x00=0
+hwmon_temp.src_0x0007_0x00=file
+hwmon_temp.frmt_0x0007_0x00=buf
+hwmon_temp.fpath_0x0007_0x00=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0007_0x00=0
+hwmon_temp.len_0x0007_0x00=8
+hwmon_temp.bit_offset_0x0007_0x00=
+hwmon_temp.str_cons_0x0007_0x00=temp7_input
+
+# sensor temp7 alias
+hwmon_temp.mode_0x0007_0x01=config
+hwmon_temp.int_cons_0x0007_0x01=
+hwmon_temp.src_0x0007_0x01=file
+hwmon_temp.frmt_0x0007_0x01=buf
+hwmon_temp.fpath_0x0007_0x01=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0007_0x01=0
+hwmon_temp.len_0x0007_0x01=16
+hwmon_temp.bit_offset_0x0007_0x01=
+hwmon_temp.str_cons_0x0007_0x01=temp7_label
+
+hwmon_temp.mode_0x0007_0x02=str_constant
+hwmon_temp.str_cons_0x0007_0x02=cpu
+
+# sensor temp7 max
+hwmon_temp.mode_0x0007_0x03=config
+hwmon_temp.int_cons_0x0007_0x03=0
+hwmon_temp.src_0x0007_0x03=file
+hwmon_temp.frmt_0x0007_0x03=buf
+hwmon_temp.fpath_0x0007_0x03=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0007_0x03=0
+hwmon_temp.len_0x0007_0x03=8
+hwmon_temp.bit_offset_0x0007_0x03=
+hwmon_temp.str_cons_0x0007_0x03=temp7_max
+# sensor temp7 min
+hwmon_temp.mode_0x0007_0x05=str_constant
+hwmon_temp.str_cons_0x0007_0x05=-30000
+
+# sensor temp8 input
+hwmon_temp.mode_0x0008_0x00=config
+hwmon_temp.int_cons_0x0008_0x00=0
+hwmon_temp.src_0x0008_0x00=file
+hwmon_temp.frmt_0x0008_0x00=buf
+hwmon_temp.fpath_0x0008_0x00=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0008_0x00=0
+hwmon_temp.len_0x0008_0x00=8
+hwmon_temp.bit_offset_0x0008_0x00=
+hwmon_temp.str_cons_0x0008_0x00=temp8_input
+
+# sensor temp8 alias
+hwmon_temp.mode_0x0008_0x01=config
+hwmon_temp.int_cons_0x0008_0x01=
+hwmon_temp.src_0x0008_0x01=file
+hwmon_temp.frmt_0x0008_0x01=buf
+hwmon_temp.fpath_0x0008_0x01=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0008_0x01=0
+hwmon_temp.len_0x0008_0x01=16
+hwmon_temp.bit_offset_0x0008_0x01=
+hwmon_temp.str_cons_0x0008_0x01=temp8_label
+
+hwmon_temp.mode_0x0008_0x02=str_constant
+hwmon_temp.str_cons_0x0008_0x02=cpu
+
+# sensor temp8 max
+hwmon_temp.mode_0x0008_0x03=config
+hwmon_temp.int_cons_0x0008_0x03=0
+hwmon_temp.src_0x0008_0x03=file
+hwmon_temp.frmt_0x0008_0x03=buf
+hwmon_temp.fpath_0x0008_0x03=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0008_0x03=0
+hwmon_temp.len_0x0008_0x03=8
+hwmon_temp.bit_offset_0x0008_0x03=
+hwmon_temp.str_cons_0x0008_0x03=temp8_max
+# sensor temp8 min
+hwmon_temp.mode_0x0008_0x05=str_constant
+hwmon_temp.str_cons_0x0008_0x05=-30000
+
+# sensor temp9 input
+hwmon_temp.mode_0x0009_0x00=config
+hwmon_temp.int_cons_0x0009_0x00=0
+hwmon_temp.src_0x0009_0x00=file
+hwmon_temp.frmt_0x0009_0x00=buf
+hwmon_temp.fpath_0x0009_0x00=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0009_0x00=0
+hwmon_temp.len_0x0009_0x00=8
+hwmon_temp.bit_offset_0x0009_0x00=
+hwmon_temp.str_cons_0x0009_0x00=temp9_input
+
+# sensor temp9 alias
+hwmon_temp.mode_0x0009_0x01=config
+hwmon_temp.int_cons_0x0009_0x01=
+hwmon_temp.src_0x0009_0x01=file
+hwmon_temp.frmt_0x0009_0x01=buf
+hwmon_temp.fpath_0x0009_0x01=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0009_0x01=0
+hwmon_temp.len_0x0009_0x01=16
+hwmon_temp.bit_offset_0x0009_0x01=
+hwmon_temp.str_cons_0x0009_0x01=temp9_label
+
+hwmon_temp.mode_0x0009_0x02=str_constant
+hwmon_temp.str_cons_0x0009_0x02=cpu
+
+# sensor temp9 max
+hwmon_temp.mode_0x0009_0x03=config
+hwmon_temp.int_cons_0x0009_0x03=0
+hwmon_temp.src_0x0009_0x03=file
+hwmon_temp.frmt_0x0009_0x03=buf
+hwmon_temp.fpath_0x0009_0x03=/sys/devices/platform/coretemp.0/hwmon/
+hwmon_temp.addr_0x0009_0x03=0
+hwmon_temp.len_0x0009_0x03=8
+hwmon_temp.bit_offset_0x0009_0x03=
+hwmon_temp.str_cons_0x0009_0x03=temp9_max
+# sensor temp9 min
+hwmon_temp.mode_0x0009_0x05=str_constant
+hwmon_temp.str_cons_0x0009_0x05=-30000
+
+# sensor temp10 input
+hwmon_temp.mode_0x000a_0x00=config
+hwmon_temp.int_cons_0x000a_0x00=0
+hwmon_temp.src_0x000a_0x00=file
+hwmon_temp.frmt_0x000a_0x00=buf
+hwmon_temp.fpath_0x000a_0x00=/sys/bus/i2c/devices/58-004b/hwmon/
+hwmon_temp.addr_0x000a_0x00=0
+hwmon_temp.len_0x000a_0x00=8
+hwmon_temp.bit_offset_0x000a_0x00=
+hwmon_temp.str_cons_0x000a_0x00=temp1_input
+
+hwmon_temp.mode_0x000a_0x01=str_constant
+hwmon_temp.str_cons_0x000a_0x01=MGMT_INLET_TEMP_01
+
+hwmon_temp.mode_0x000a_0x02=str_constant
+hwmon_temp.str_cons_0x000a_0x02=lm75
+
+# sensor temp10 max
+hwmon_temp.mode_0x000a_0x03=config
+hwmon_temp.int_cons_0x000a_0x03=0
+hwmon_temp.src_0x000a_0x03=file
+hwmon_temp.frmt_0x000a_0x03=buf
+hwmon_temp.fpath_0x000a_0x03=/sys/bus/i2c/devices/58-004b/hwmon/
+hwmon_temp.addr_0x000a_0x03=0
+hwmon_temp.len_0x000a_0x03=8
+hwmon_temp.bit_offset_0x000a_0x03=
+hwmon_temp.str_cons_0x000a_0x03=temp1_max
+
+hwmon_temp.mode_0x000a_0x04=config
+hwmon_temp.int_cons_0x000a_0x04=0
+hwmon_temp.src_0x000a_0x04=file
+hwmon_temp.frmt_0x000a_0x04=buf
+hwmon_temp.fpath_0x000a_0x04=/sys/bus/i2c/devices/58-004b/hwmon/
+hwmon_temp.addr_0x000a_0x04=0
+hwmon_temp.len_0x000a_0x04=8
+hwmon_temp.bit_offset_0x000a_0x04=
+hwmon_temp.str_cons_0x000a_0x04=temp1_max_hyst
+# sensor temp10 min
+hwmon_temp.mode_0x000a_0x05=str_constant
+hwmon_temp.str_cons_0x000a_0x05=-30000
+
+hwmon_temp.mode_0x000b_0x00=config
+hwmon_temp.int_cons_0x000b_0x00=0
+hwmon_temp.src_0x000b_0x00=file
+hwmon_temp.frmt_0x000b_0x00=buf
+hwmon_temp.fpath_0x000b_0x00=/sys/bus/i2c/devices/56-004e/hwmon/
+hwmon_temp.addr_0x000b_0x00=0
+hwmon_temp.len_0x000b_0x00=8
+hwmon_temp.bit_offset_0x000b_0x00=
+hwmon_temp.str_cons_0x000b_0x00=temp1_input
+
+hwmon_temp.mode_0x000b_0x01=str_constant
+hwmon_temp.str_cons_0x000b_0x01=FCB_TEMP_02
+
+hwmon_temp.mode_0x000b_0x02=str_constant
+hwmon_temp.str_cons_0x000b_0x02=lm75
+
+hwmon_temp.mode_0x000b_0x03=config
+hwmon_temp.int_cons_0x000b_0x03=0
+hwmon_temp.src_0x000b_0x03=file
+hwmon_temp.frmt_0x000b_0x03=buf
+hwmon_temp.fpath_0x000b_0x03=/sys/bus/i2c/devices/56-004e/hwmon/
+hwmon_temp.addr_0x000b_0x03=0
+hwmon_temp.len_0x000b_0x03=8
+hwmon_temp.bit_offset_0x000b_0x03=
+hwmon_temp.str_cons_0x000b_0x03=temp1_max
+
+hwmon_temp.mode_0x000b_0x04=config
+hwmon_temp.int_cons_0x000b_0x04=0
+hwmon_temp.src_0x000b_0x04=file
+hwmon_temp.frmt_0x000b_0x04=buf
+hwmon_temp.fpath_0x000b_0x04=/sys/bus/i2c/devices/56-004e/hwmon/
+hwmon_temp.addr_0x000b_0x04=0
+hwmon_temp.len_0x000b_0x04=8
+hwmon_temp.bit_offset_0x000b_0x04=
+hwmon_temp.str_cons_0x000b_0x04=temp1_max_hyst
+# sensor temp11 min
+hwmon_temp.mode_0x000b_0x05=str_constant
+hwmon_temp.str_cons_0x000b_0x05=-30000
+
+hwmon_temp.mode_0x000c_0x00=config
+hwmon_temp.int_cons_0x000c_0x00=0
+hwmon_temp.src_0x000c_0x00=file
+hwmon_temp.frmt_0x000c_0x00=buf
+hwmon_temp.fpath_0x000c_0x00=/sys/bus/i2c/devices/51-004b/hwmon/
+hwmon_temp.addr_0x000c_0x00=0
+hwmon_temp.len_0x000c_0x00=8
+hwmon_temp.bit_offset_0x000c_0x00=
+hwmon_temp.str_cons_0x000c_0x00=temp1_input
+
+hwmon_temp.mode_0x000c_0x01=str_constant
+hwmon_temp.str_cons_0x000c_0x01=FCB_TEMP_03
+
+hwmon_temp.mode_0x000c_0x02=str_constant
+hwmon_temp.str_cons_0x000c_0x02=lm75
+
+hwmon_temp.mode_0x000c_0x03=config
+hwmon_temp.int_cons_0x000c_0x03=0
+hwmon_temp.src_0x000c_0x03=file
+hwmon_temp.frmt_0x000c_0x03=buf
+hwmon_temp.fpath_0x000c_0x03=/sys/bus/i2c/devices/51-004b/hwmon/
+hwmon_temp.addr_0x000c_0x03=0
+hwmon_temp.len_0x000c_0x03=8
+hwmon_temp.bit_offset_0x000c_0x03=
+hwmon_temp.str_cons_0x000c_0x03=temp1_max
+
+hwmon_temp.mode_0x000c_0x04=config
+hwmon_temp.int_cons_0x000c_0x04=0
+hwmon_temp.src_0x000c_0x04=file
+hwmon_temp.frmt_0x000c_0x04=buf
+hwmon_temp.fpath_0x000c_0x04=/sys/bus/i2c/devices/51-004b/hwmon/
+hwmon_temp.addr_0x000c_0x04=0
+hwmon_temp.len_0x000c_0x04=8
+hwmon_temp.bit_offset_0x000c_0x04=
+hwmon_temp.str_cons_0x000c_0x04=temp1_max_hyst
+# sensor temp12 min
+hwmon_temp.mode_0x000c_0x05=str_constant
+hwmon_temp.str_cons_0x000c_0x05=-30000
+
+#temp13 MAC_Tboard_TEMP_05
+hwmon_temp.mode_0x000d_0x00=config
+hwmon_temp.int_cons_0x000d_0x00=0
+hwmon_temp.src_0x000d_0x00=file
+hwmon_temp.frmt_0x000d_0x00=buf
+hwmon_temp.fpath_0x000d_0x00=/sys/bus/i2c/devices/77-004c/hwmon/
+hwmon_temp.addr_0x000d_0x00=0
+hwmon_temp.len_0x000d_0x00=8
+hwmon_temp.bit_offset_0x000d_0x00=
+hwmon_temp.str_cons_0x000d_0x00=temp1_input
+
+hwmon_temp.mode_0x000d_0x01=str_constant
+hwmon_temp.str_cons_0x000d_0x01=MAC_Tboard_TEMP_05
+
+hwmon_temp.mode_0x000d_0x02=str_constant
+hwmon_temp.str_cons_0x000d_0x02=ct7318
+
+# sensor temp13 min
+hwmon_temp.mode_0x000d_0x05=str_constant
+hwmon_temp.str_cons_0x000d_0x05=-30000
+
+# sensor temp13 max
+hwmon_temp.mode_0x000d_0x03=str_constant
+hwmon_temp.str_cons_0x000d_0x03=105000
+
+#temp14 MAC_Tboard_TEMP_06
+hwmon_temp.mode_0x000e_0x00=config
+hwmon_temp.int_cons_0x000e_0x00=0
+hwmon_temp.src_0x000e_0x00=file
+hwmon_temp.frmt_0x000e_0x00=buf
+hwmon_temp.fpath_0x000e_0x00=/sys/bus/i2c/devices/78-004c/hwmon/
+hwmon_temp.addr_0x000e_0x00=0
+hwmon_temp.len_0x000e_0x00=8
+hwmon_temp.bit_offset_0x000e_0x00=
+hwmon_temp.str_cons_0x000e_0x00=temp1_input
+
+hwmon_temp.mode_0x000e_0x01=str_constant
+hwmon_temp.str_cons_0x000e_0x01=MAC_Tboard_TEMP_06
+
+hwmon_temp.mode_0x000e_0x02=str_constant
+hwmon_temp.str_cons_0x000e_0x02=ct7318
+
+# sensor temp14 min
+hwmon_temp.mode_0x000e_0x05=str_constant
+hwmon_temp.str_cons_0x000e_0x05=-30000
+
+# sensor temp14 ax
+hwmon_temp.mode_0x000e_0x03=str_constant
+hwmon_temp.str_cons_0x000e_0x03=105000
+
+#temp15 MAC_Tboard_TEMP_07
+hwmon_temp.mode_0x000f_0x00=config
+hwmon_temp.int_cons_0x000f_0x00=0
+hwmon_temp.src_0x000f_0x00=file
+hwmon_temp.frmt_0x000f_0x00=buf
+hwmon_temp.fpath_0x000f_0x00=/sys/bus/i2c/devices/76-004f/hwmon/
+hwmon_temp.addr_0x000f_0x00=0
+hwmon_temp.len_0x000f_0x00=8
+hwmon_temp.bit_offset_0x000f_0x00=
+hwmon_temp.str_cons_0x000f_0x00=temp1_input
+
+hwmon_temp.mode_0x000f_0x01=str_constant
+hwmon_temp.str_cons_0x000f_0x01=MAC_Tboard_TEMP_07
+
+hwmon_temp.mode_0x000f_0x02=str_constant
+hwmon_temp.str_cons_0x000f_0x02=lm75
+
+hwmon_temp.mode_0x000f_0x03=config
+hwmon_temp.int_cons_0x000f_0x03=0
+hwmon_temp.src_0x000f_0x03=file
+hwmon_temp.frmt_0x000f_0x03=buf
+hwmon_temp.fpath_0x000f_0x03=/sys/bus/i2c/devices/76-004f/hwmon/
+hwmon_temp.addr_0x000f_0x03=0
+hwmon_temp.len_0x000f_0x03=8
+hwmon_temp.bit_offset_0x000f_0x03=
+hwmon_temp.str_cons_0x000f_0x03=temp1_max
+
+hwmon_temp.mode_0x000f_0x04=config
+hwmon_temp.int_cons_0x000f_0x04=0
+hwmon_temp.src_0x000f_0x04=file
+hwmon_temp.frmt_0x000f_0x04=buf
+hwmon_temp.fpath_0x000f_0x04=/sys/bus/i2c/devices/76-004f/hwmon/
+hwmon_temp.addr_0x000f_0x04=0
+hwmon_temp.len_0x000f_0x04=8
+hwmon_temp.bit_offset_0x000f_0x04=
+hwmon_temp.str_cons_0x000f_0x04=temp1_max_hyst
+# sensor temp15 min
+hwmon_temp.mode_0x000f_0x05=str_constant
+hwmon_temp.str_cons_0x000f_0x05=-30000
+
+# temp16 mac_temp_min
+hwmon_temp.mode_0x0010_0x00=config
+hwmon_temp.src_0x0010_0x00=cpld
+hwmon_temp.addr_0x0010_0x00=0x00020080
+hwmon_temp.frmt_0x0010_0x00=num_bytes
+hwmon_temp.len_0x00010_0x00=2
+hwmon_temp.pola_0x0010_0x00=positive
+hwmon_temp.str_cons_0x0010_0x00=temp0_input
+hwmon_temp.int_extra1_0x0010_0x00=4
+
+hwmon_temp.mode_0x0010_0x01=str_constant
+hwmon_temp.str_cons_0x0010_0x01=MAC_TEMP_MIN
+
+hwmon_temp.mode_0x0010_0x02=str_constant
+hwmon_temp.str_cons_0x0010_0x02=CPLD
+
+hwmon_temp.mode_0x0010_0x03=constant
+hwmon_temp.int_cons_0x0010_0x03=105000
+
+hwmon_temp.mode_0x0010_0x05=constant
+hwmon_temp.int_cons_0x0010_0x05=-30000
+
+#temp17 mac_temp_max
+hwmon_temp.mode_0x0011_0x00=config
+hwmon_temp.src_0x0011_0x00=cpld
+hwmon_temp.addr_0x0011_0x00=0x00020082
+hwmon_temp.frmt_0x0011_0x00=num_bytes
+hwmon_temp.len_0x0011_0x00=2
+hwmon_temp.pola_0x0011_0x00=positive
+hwmon_temp.str_cons_0x0011_0x00=temp1_input
+hwmon_temp.int_extra1_0x0011_0x00=4
+
+hwmon_temp.mode_0x0011_0x01=str_constant
+hwmon_temp.str_cons_0x0011_0x01=MAC_TEMP_MAX
+
+hwmon_temp.mode_0x0011_0x02=str_constant
+hwmon_temp.str_cons_0x0011_0x02=CPLD
+
+hwmon_temp.mode_0x0011_0x03=constant
+hwmon_temp.int_cons_0x0011_0x03=105000
+
+hwmon_temp.mode_0x0011_0x05=constant
+hwmon_temp.int_cons_0x0011_0x05=-30000
+
+#temp18 TMOS_CORE_TEMP_01
+hwmon_temp.mode_0x0012_0x00=config
+hwmon_temp.int_cons_0x0012_0x00=0
+hwmon_temp.src_0x0012_0x00=file
+hwmon_temp.frmt_0x0012_0x00=buf
+hwmon_temp.fpath_0x0012_0x00=/sys/bus/i2c/devices/84-0040/hwmon/
+hwmon_temp.addr_0x0012_0x00=0
+hwmon_temp.len_0x0012_0x00=8
+hwmon_temp.bit_offset_0x0012_0x00=
+hwmon_temp.str_cons_0x0012_0x00=temp1_input
+
+hwmon_temp.mode_0x0012_0x01=str_constant
+hwmon_temp.str_cons_0x0012_0x01=TMOS_CORE_TEMP_01
+
+hwmon_temp.mode_0x0012_0x02=str_constant
+hwmon_temp.str_cons_0x0012_0x02=xdpe132g5c
+
+hwmon_temp.mode_0x0012_0x03=str_constant
+hwmon_temp.str_cons_0x0012_0x03=125000
+
+# sensor temp18 min
+hwmon_temp.mode_0x0012_0x05=str_constant
+hwmon_temp.str_cons_0x0012_0x05=-30000
+
+#temp19 TMOS_ANALOG0_TEMP
+hwmon_temp.mode_0x0013_0x00=config
+hwmon_temp.int_cons_0x0013_0x00=0
+hwmon_temp.src_0x0013_0x00=file
+hwmon_temp.frmt_0x0013_0x00=buf
+hwmon_temp.fpath_0x0013_0x00=/sys/bus/i2c/devices/85-004d/hwmon/
+hwmon_temp.addr_0x0013_0x00=0
+hwmon_temp.len_0x0013_0x00=8
+hwmon_temp.bit_offset_0x0013_0x00=
+hwmon_temp.str_cons_0x0013_0x00=temp1_input
+
+hwmon_temp.mode_0x0013_0x01=str_constant
+hwmon_temp.str_cons_0x0013_0x01=TMOS_ANALOG0_TEMP
+
+hwmon_temp.mode_0x0013_0x02=str_constant
+hwmon_temp.str_cons_0x0013_0x02=xdpe132g5c
+
+hwmon_temp.mode_0x0013_0x03=str_constant
+hwmon_temp.str_cons_0x0013_0x03=125000
+
+# sensor temp19 min
+hwmon_temp.mode_0x0013_0x05=str_constant
+hwmon_temp.str_cons_0x0013_0x05=-30000
+
+#temp20 TMOS_ANALOG1_TEMP
+hwmon_temp.mode_0x0014_0x00=config
+hwmon_temp.int_cons_0x0014_0x00=0
+hwmon_temp.src_0x0014_0x00=file
+hwmon_temp.frmt_0x0014_0x00=buf
+hwmon_temp.fpath_0x0014_0x00=/sys/bus/i2c/devices/86-004d/hwmon/
+hwmon_temp.addr_0x0014_0x00=0
+hwmon_temp.len_0x0014_0x00=8
+hwmon_temp.bit_offset_0x0014_0x00=
+hwmon_temp.str_cons_0x0014_0x00=temp1_input
+
+hwmon_temp.mode_0x0014_0x01=str_constant
+hwmon_temp.str_cons_0x0014_0x01=TMOS_ANALOG1_TEMP
+
+hwmon_temp.mode_0x0014_0x02=str_constant
+hwmon_temp.str_cons_0x0014_0x02=xdpe132g5c
+
+hwmon_temp.mode_0x0014_0x03=str_constant
+hwmon_temp.str_cons_0x0014_0x03=125000
+
+# sensor temp20 min
+hwmon_temp.mode_0x0014_0x05=str_constant
+hwmon_temp.str_cons_0x0014_0x05=-30000
+
+# sensor vol
+# value :           0
+# alias :           1
+# type :            2
+# max :             3
+# hyst :            4
+# min :             5
+# crit :            6
+# range :           7
+# nominal_value :   8
+# high :            9
+# low :             10
+
+# vol1
+hwmon_in.mode_0x0001_0x00=config
+hwmon_in.int_cons_0x0001_0x00=0
+hwmon_in.src_0x0001_0x00=file
+hwmon_in.frmt_0x0001_0x00=buf
+hwmon_in.fpath_0x0001_0x00=/sys/bus/i2c/devices/68-005b/hwmon/
+hwmon_in.addr_0x0001_0x00=0
+hwmon_in.len_0x0001_0x00=8
+hwmon_in.bit_offset_0x0001_0x00=
+hwmon_in.str_cons_0x0001_0x00=in1_input
+hwmon_in.mode_0x0001_0x01=str_constant
+hwmon_in.str_cons_0x0001_0x01=VDD12V_BASE
+hwmon_in.mode_0x0001_0x02=str_constant
+hwmon_in.str_cons_0x0001_0x02=ucd90160
+hwmon_in.mode_0x0001_0x03=constant
+hwmon_in.int_cons_0x0001_0x03=13200
+hwmon_in.mode_0x0001_0x05=constant
+hwmon_in.int_cons_0x0001_0x05=10800
+hwmon_in.mode_0x0001_0x08=constant
+hwmon_in.int_cons_0x0001_0x08=12000
+hwmon_in.mode_0x0001_0x07=constant
+hwmon_in.int_cons_0x0001_0x07=60
+
+# vol2
+hwmon_in.mode_0x0002_0x00=config
+hwmon_in.int_cons_0x0002_0x00=0
+hwmon_in.src_0x0002_0x00=file
+hwmon_in.frmt_0x0002_0x00=buf
+hwmon_in.fpath_0x0002_0x00=/sys/bus/i2c/devices/68-005b/hwmon/
+hwmon_in.addr_0x0002_0x00=0
+hwmon_in.len_0x0002_0x00=8
+hwmon_in.bit_offset_0x0002_0x00=
+hwmon_in.str_cons_0x0002_0x00=in2_input
+hwmon_in.mode_0x0002_0x01=str_constant
+hwmon_in.str_cons_0x0002_0x01=VDD3.3_STBY
+hwmon_in.mode_0x0002_0x02=str_constant
+hwmon_in.str_cons_0x0002_0x02=ucd90160
+hwmon_in.mode_0x0002_0x03=constant
+hwmon_in.int_cons_0x0002_0x03=3630
+hwmon_in.mode_0x0002_0x05=constant
+hwmon_in.int_cons_0x0002_0x05=2970
+hwmon_in.mode_0x0002_0x08=constant
+hwmon_in.int_cons_0x0002_0x08=3300
+hwmon_in.mode_0x0002_0x07=constant
+hwmon_in.int_cons_0x0002_0x07=16
+
+# vol3
+hwmon_in.mode_0x0003_0x00=config
+hwmon_in.int_cons_0x0003_0x00=0
+hwmon_in.src_0x0003_0x00=file
+hwmon_in.frmt_0x0003_0x00=buf
+hwmon_in.fpath_0x0003_0x00=/sys/bus/i2c/devices/68-005b/hwmon/
+hwmon_in.addr_0x0003_0x00=0
+hwmon_in.len_0x0003_0x00=8
+hwmon_in.bit_offset_0x0003_0x00=
+hwmon_in.str_cons_0x0003_0x00=in3_input
+hwmon_in.mode_0x0003_0x01=str_constant
+hwmon_in.str_cons_0x0003_0x01=VDD5V_USB
+hwmon_in.mode_0x0003_0x02=str_constant
+hwmon_in.str_cons_0x0003_0x02=ucd90160
+hwmon_in.mode_0x0003_0x03=constant
+hwmon_in.int_cons_0x0003_0x03=5500
+hwmon_in.mode_0x0003_0x05=constant
+hwmon_in.int_cons_0x0003_0x05=4500
+hwmon_in.mode_0x0003_0x08=constant
+hwmon_in.int_cons_0x0003_0x08=5000
+hwmon_in.mode_0x0003_0x07=constant
+hwmon_in.int_cons_0x0003_0x07=25
+
+# vol4
+hwmon_in.mode_0x0004_0x00=config
+hwmon_in.int_cons_0x0004_0x00=0
+hwmon_in.src_0x0004_0x00=file
+hwmon_in.frmt_0x0004_0x00=buf
+hwmon_in.fpath_0x0004_0x00=/sys/bus/i2c/devices/68-005b/hwmon/
+hwmon_in.addr_0x0004_0x00=0
+hwmon_in.len_0x0004_0x00=8
+hwmon_in.bit_offset_0x0004_0x00=
+hwmon_in.str_cons_0x0004_0x00=in4_input
+hwmon_in.mode_0x0004_0x01=str_constant
+hwmon_in.str_cons_0x0004_0x01=PHY_VDD1V0
+hwmon_in.mode_0x0004_0x02=str_constant
+hwmon_in.str_cons_0x0004_0x02=ucd90160
+hwmon_in.mode_0x0004_0x03=constant
+hwmon_in.int_cons_0x0004_0x03=1100
+hwmon_in.mode_0x0004_0x05=constant
+hwmon_in.int_cons_0x0004_0x05=900
+hwmon_in.mode_0x0004_0x08=constant
+hwmon_in.int_cons_0x0004_0x08=1000
+hwmon_in.mode_0x0004_0x07=constant
+hwmon_in.int_cons_0x0004_0x07=5
+
+# vol5
+hwmon_in.mode_0x0005_0x00=config
+hwmon_in.int_cons_0x0005_0x00=0
+hwmon_in.src_0x0005_0x00=file
+hwmon_in.frmt_0x0005_0x00=buf
+hwmon_in.fpath_0x0005_0x00=/sys/bus/i2c/devices/68-005b/hwmon/
+hwmon_in.addr_0x0005_0x00=0
+hwmon_in.len_0x0005_0x00=8
+hwmon_in.bit_offset_0x0005_0x00=
+hwmon_in.str_cons_0x0005_0x00=in5_input
+hwmon_in.mode_0x0005_0x01=str_constant
+hwmon_in.str_cons_0x0005_0x01=VDD3.3V_BASE
+hwmon_in.mode_0x0005_0x02=str_constant
+hwmon_in.str_cons_0x0005_0x02=ucd90160
+hwmon_in.mode_0x0005_0x03=constant
+hwmon_in.int_cons_0x0005_0x03=3630
+hwmon_in.mode_0x0005_0x05=constant
+hwmon_in.int_cons_0x0005_0x05=2970
+hwmon_in.mode_0x0005_0x08=constant
+hwmon_in.int_cons_0x0005_0x08=3300
+hwmon_in.mode_0x0005_0x07=constant
+hwmon_in.int_cons_0x0005_0x07=16
+
+# vol6
+hwmon_in.mode_0x0006_0x00=config
+hwmon_in.int_cons_0x0006_0x00=0
+hwmon_in.src_0x0006_0x00=file
+hwmon_in.frmt_0x0006_0x00=buf
+hwmon_in.fpath_0x0006_0x00=/sys/bus/i2c/devices/68-005b/hwmon/
+hwmon_in.addr_0x0006_0x00=0
+hwmon_in.len_0x0006_0x00=8
+hwmon_in.bit_offset_0x0006_0x00=
+hwmon_in.str_cons_0x0006_0x00=in6_input
+hwmon_in.mode_0x0006_0x01=str_constant
+hwmon_in.str_cons_0x0006_0x01=VDD3.3_CLK_BASE
+hwmon_in.mode_0x0006_0x02=str_constant
+hwmon_in.str_cons_0x0006_0x02=ucd90160
+hwmon_in.mode_0x0006_0x03=constant
+hwmon_in.int_cons_0x0006_0x03=3630
+hwmon_in.mode_0x0006_0x05=constant
+hwmon_in.int_cons_0x0006_0x05=2970
+hwmon_in.mode_0x0006_0x08=constant
+hwmon_in.int_cons_0x0006_0x08=3300
+hwmon_in.mode_0x0006_0x07=constant
+hwmon_in.int_cons_0x0006_0x07=16
+
+# vol7
+hwmon_in.mode_0x0007_0x00=config
+hwmon_in.int_cons_0x0007_0x00=0
+hwmon_in.src_0x0007_0x00=file
+hwmon_in.frmt_0x0007_0x00=buf
+hwmon_in.fpath_0x0007_0x00=/sys/bus/i2c/devices/68-005b/hwmon/
+hwmon_in.addr_0x0007_0x00=0
+hwmon_in.len_0x0007_0x00=8
+hwmon_in.bit_offset_0x0007_0x00=
+hwmon_in.str_cons_0x0007_0x00=in7_input
+hwmon_in.mode_0x0007_0x01=str_constant
+hwmon_in.str_cons_0x0007_0x01=BMC_VCC3.3V_OUT
+hwmon_in.mode_0x0007_0x02=str_constant
+hwmon_in.str_cons_0x0007_0x02=ucd90160
+hwmon_in.mode_0x0007_0x03=constant
+hwmon_in.int_cons_0x0007_0x03=3630
+hwmon_in.mode_0x0007_0x05=constant
+hwmon_in.int_cons_0x0007_0x05=2970
+hwmon_in.mode_0x0007_0x08=constant
+hwmon_in.int_cons_0x0007_0x08=3300
+hwmon_in.mode_0x0007_0x07=constant
+hwmon_in.int_cons_0x0007_0x07=16
+
+# vol8
+hwmon_in.mode_0x0008_0x00=config
+hwmon_in.int_cons_0x0008_0x00=0
+hwmon_in.src_0x0008_0x00=file
+hwmon_in.frmt_0x0008_0x00=buf
+hwmon_in.fpath_0x0008_0x00=/sys/bus/i2c/devices/68-005b/hwmon/
+hwmon_in.addr_0x0008_0x00=0
+hwmon_in.len_0x0008_0x00=8
+hwmon_in.bit_offset_0x0008_0x00=
+hwmon_in.str_cons_0x0008_0x00=in8_input
+hwmon_in.mode_0x0008_0x01=str_constant
+hwmon_in.str_cons_0x0008_0x01=SSD_VDD3.3V
+hwmon_in.mode_0x0008_0x02=str_constant
+hwmon_in.str_cons_0x0008_0x02=ucd90160
+hwmon_in.mode_0x0008_0x03=constant
+hwmon_in.int_cons_0x0008_0x03=3630
+hwmon_in.mode_0x0008_0x05=constant
+hwmon_in.int_cons_0x0008_0x05=2970
+hwmon_in.mode_0x0008_0x08=constant
+hwmon_in.int_cons_0x0008_0x08=3300
+hwmon_in.mode_0x0008_0x07=constant
+hwmon_in.int_cons_0x0008_0x07=16
+
+# vol9
+hwmon_in.mode_0x0009_0x00=config
+hwmon_in.int_cons_0x0009_0x00=0
+hwmon_in.src_0x0009_0x00=file
+hwmon_in.frmt_0x0009_0x00=buf
+hwmon_in.fpath_0x0009_0x00=/sys/bus/i2c/devices/68-005b/hwmon/
+hwmon_in.addr_0x0009_0x00=0
+hwmon_in.len_0x0009_0x00=8
+hwmon_in.bit_offset_0x0009_0x00=
+hwmon_in.str_cons_0x0009_0x00=in9_input
+hwmon_in.mode_0x0009_0x01=str_constant
+hwmon_in.str_cons_0x0009_0x01=VDD3V8_CLK_BASE
+hwmon_in.mode_0x0009_0x02=str_constant
+hwmon_in.str_cons_0x0009_0x02=ucd90160
+hwmon_in.mode_0x0009_0x03=constant
+hwmon_in.int_cons_0x0009_0x03=4180
+hwmon_in.mode_0x0009_0x05=constant
+hwmon_in.int_cons_0x0009_0x05=3420
+hwmon_in.mode_0x0009_0x08=constant
+hwmon_in.int_cons_0x0009_0x08=3800
+hwmon_in.mode_0x0009_0x07=constant
+hwmon_in.int_cons_0x0009_0x07=19
+
+# vol10
+hwmon_in.mode_0x000a_0x00=config
+hwmon_in.int_cons_0x000a_0x00=0
+hwmon_in.src_0x000a_0x00=file
+hwmon_in.frmt_0x000a_0x00=buf
+hwmon_in.fpath_0x000a_0x00=/sys/bus/i2c/devices/82-005b/hwmon/
+hwmon_in.addr_0x000a_0x00=0
+hwmon_in.len_0x000a_0x00=8
+hwmon_in.bit_offset_0x000a_0x00=
+hwmon_in.str_cons_0x000a_0x00=in1_input
+hwmon_in.mode_0x000a_0x01=str_constant
+hwmon_in.str_cons_0x000a_0x01=VDD12V_MAC1
+hwmon_in.mode_0x000a_0x02=str_constant
+hwmon_in.str_cons_0x000a_0x02=ucd90160
+hwmon_in.mode_0x000a_0x03=constant
+hwmon_in.int_cons_0x000a_0x03=13200
+hwmon_in.mode_0x000a_0x05=constant
+hwmon_in.int_cons_0x000a_0x05=10800
+hwmon_in.mode_0x000a_0x08=constant
+hwmon_in.int_cons_0x000a_0x08=12000
+hwmon_in.mode_0x000a_0x07=constant
+hwmon_in.int_cons_0x000a_0x07=60
+
+# vol11
+hwmon_in.mode_0x000b_0x00=config
+hwmon_in.int_cons_0x000b_0x00=0
+hwmon_in.src_0x000b_0x00=file
+hwmon_in.frmt_0x000b_0x00=buf
+hwmon_in.fpath_0x000b_0x00=/sys/bus/i2c/devices/82-005b/hwmon/
+hwmon_in.addr_0x000b_0x00=0
+hwmon_in.len_0x000b_0x00=8
+hwmon_in.bit_offset_0x000b_0x00=
+hwmon_in.str_cons_0x000b_0x00=in2_input
+hwmon_in.mode_0x000b_0x01=str_constant
+hwmon_in.str_cons_0x000b_0x01=VDD1.8_CLK
+hwmon_in.mode_0x000b_0x02=str_constant
+hwmon_in.str_cons_0x000b_0x02=ucd90160
+hwmon_in.mode_0x000b_0x03=constant
+hwmon_in.int_cons_0x000b_0x03=1980
+hwmon_in.mode_0x000b_0x05=constant
+hwmon_in.int_cons_0x000b_0x05=1620
+hwmon_in.mode_0x000b_0x08=constant
+hwmon_in.int_cons_0x000b_0x08=1800
+hwmon_in.mode_0x000b_0x07=constant
+hwmon_in.int_cons_0x000b_0x07=9
+
+# vol12
+hwmon_in.mode_0x000c_0x00=config
+hwmon_in.int_cons_0x000c_0x00=0
+hwmon_in.src_0x000c_0x00=file
+hwmon_in.frmt_0x000c_0x00=buf
+hwmon_in.fpath_0x000c_0x00=/sys/bus/i2c/devices/82-005b/hwmon/
+hwmon_in.addr_0x000c_0x00=0
+hwmon_in.len_0x000c_0x00=8
+hwmon_in.bit_offset_0x000c_0x00=
+hwmon_in.str_cons_0x000c_0x00=in3_input
+hwmon_in.mode_0x000c_0x01=str_constant
+hwmon_in.str_cons_0x000c_0x01=VDD3.3_CLK_MAC
+hwmon_in.mode_0x000c_0x02=str_constant
+hwmon_in.str_cons_0x000c_0x02=ucd90160
+hwmon_in.mode_0x000c_0x03=constant
+hwmon_in.int_cons_0x000c_0x03=3630
+hwmon_in.mode_0x000c_0x05=constant
+hwmon_in.int_cons_0x000c_0x05=2970
+hwmon_in.mode_0x000c_0x08=constant
+hwmon_in.int_cons_0x000c_0x08=3300
+hwmon_in.mode_0x000c_0x07=constant
+hwmon_in.int_cons_0x000c_0x07=16
+
+# vol13
+hwmon_in.mode_0x000d_0x00=config
+hwmon_in.int_cons_0x000d_0x00=0
+hwmon_in.src_0x000d_0x00=file
+hwmon_in.frmt_0x000d_0x00=buf
+hwmon_in.fpath_0x000d_0x00=/sys/bus/i2c/devices/82-005b/hwmon/
+hwmon_in.addr_0x000d_0x00=0
+hwmon_in.len_0x000d_0x00=8
+hwmon_in.bit_offset_0x000d_0x00=
+hwmon_in.str_cons_0x000d_0x00=in4_input
+hwmon_in.mode_0x000d_0x01=str_constant
+hwmon_in.str_cons_0x000d_0x01=VDD1.0V_FPGA
+hwmon_in.mode_0x000d_0x02=str_constant
+hwmon_in.str_cons_0x000d_0x02=ucd90160
+hwmon_in.mode_0x000d_0x03=constant
+hwmon_in.int_cons_0x000d_0x03=1100
+hwmon_in.mode_0x000d_0x05=constant
+hwmon_in.int_cons_0x000d_0x05=900
+hwmon_in.mode_0x000d_0x08=constant
+hwmon_in.int_cons_0x000d_0x08=1000
+hwmon_in.mode_0x000d_0x07=constant
+hwmon_in.int_cons_0x000d_0x07=5
+
+# vol14
+hwmon_in.mode_0x000e_0x00=config
+hwmon_in.int_cons_0x000e_0x00=0
+hwmon_in.src_0x000e_0x00=file
+hwmon_in.frmt_0x000e_0x00=buf
+hwmon_in.fpath_0x000e_0x00=/sys/bus/i2c/devices/82-005b/hwmon/
+hwmon_in.addr_0x000e_0x00=0
+hwmon_in.len_0x000e_0x00=8
+hwmon_in.bit_offset_0x000e_0x00=
+hwmon_in.str_cons_0x000e_0x00=in5_input
+hwmon_in.mode_0x000e_0x01=str_constant
+hwmon_in.str_cons_0x000e_0x01=VDD1.8V_FPGA
+hwmon_in.mode_0x000e_0x02=str_constant
+hwmon_in.str_cons_0x000e_0x02=ucd90160
+hwmon_in.mode_0x000e_0x03=constant
+hwmon_in.int_cons_0x000e_0x03=1980
+hwmon_in.mode_0x000e_0x05=constant
+hwmon_in.int_cons_0x000e_0x05=1620
+hwmon_in.mode_0x000e_0x08=constant
+hwmon_in.int_cons_0x000e_0x08=1800
+hwmon_in.mode_0x000e_0x07=constant
+hwmon_in.int_cons_0x000e_0x07=9
+
+# vol15
+hwmon_in.mode_0x000f_0x00=config
+hwmon_in.int_cons_0x000f_0x00=0
+hwmon_in.src_0x000f_0x00=file
+hwmon_in.frmt_0x000f_0x00=buf
+hwmon_in.fpath_0x000f_0x00=/sys/bus/i2c/devices/82-005b/hwmon/
+hwmon_in.addr_0x000f_0x00=0
+hwmon_in.len_0x000f_0x00=8
+hwmon_in.bit_offset_0x000f_0x00=
+hwmon_in.str_cons_0x000f_0x00=in6_input
+hwmon_in.mode_0x000f_0x01=str_constant
+hwmon_in.str_cons_0x000f_0x01=VDD1.2V_FPGA
+hwmon_in.mode_0x000f_0x02=str_constant
+hwmon_in.str_cons_0x000f_0x02=ucd90160
+hwmon_in.mode_0x000f_0x03=constant
+hwmon_in.int_cons_0x000f_0x03=1320
+hwmon_in.mode_0x000f_0x05=constant
+hwmon_in.int_cons_0x000f_0x05=1080
+hwmon_in.mode_0x000f_0x08=constant
+hwmon_in.int_cons_0x000f_0x08=1200
+hwmon_in.mode_0x000f_0x07=constant
+hwmon_in.int_cons_0x000f_0x07=6
+
+# vol16
+hwmon_in.mode_0x0010_0x00=config
+hwmon_in.int_cons_0x0010_0x00=0
+hwmon_in.src_0x0010_0x00=file
+hwmon_in.frmt_0x0010_0x00=buf
+hwmon_in.fpath_0x0010_0x00=/sys/bus/i2c/devices/82-005b/hwmon/
+hwmon_in.addr_0x0010_0x00=0
+hwmon_in.len_0x0010_0x00=8
+hwmon_in.bit_offset_0x0010_0x00=
+hwmon_in.str_cons_0x0010_0x00=in7_input
+hwmon_in.mode_0x0010_0x01=str_constant
+hwmon_in.str_cons_0x0010_0x01=VDD3.3V_MAC
+hwmon_in.mode_0x0010_0x02=str_constant
+hwmon_in.str_cons_0x0010_0x02=ucd90160
+hwmon_in.mode_0x0010_0x03=constant
+hwmon_in.int_cons_0x0010_0x03=3630
+hwmon_in.mode_0x0010_0x05=constant
+hwmon_in.int_cons_0x0010_0x05=2970
+hwmon_in.mode_0x0010_0x08=constant
+hwmon_in.int_cons_0x0010_0x08=3300
+hwmon_in.mode_0x0010_0x07=constant
+hwmon_in.int_cons_0x0010_0x07=16
+
+# vol17
+hwmon_in.mode_0x0011_0x00=config
+hwmon_in.int_cons_0x0011_0x00=0
+hwmon_in.src_0x0011_0x00=file
+hwmon_in.frmt_0x0011_0x00=buf
+hwmon_in.fpath_0x0011_0x00=/sys/bus/i2c/devices/82-005b/hwmon/
+hwmon_in.addr_0x0011_0x00=0
+hwmon_in.len_0x0011_0x00=8
+hwmon_in.bit_offset_0x0011_0x00=
+hwmon_in.str_cons_0x0011_0x00=in8_input
+hwmon_in.mode_0x0011_0x01=str_constant
+hwmon_in.str_cons_0x0011_0x01=VDDO1.2V
+hwmon_in.mode_0x0011_0x02=str_constant
+hwmon_in.str_cons_0x0011_0x02=ucd90160
+hwmon_in.mode_0x0011_0x03=constant
+hwmon_in.int_cons_0x0011_0x03=1320
+hwmon_in.mode_0x0011_0x05=constant
+hwmon_in.int_cons_0x0011_0x05=1080
+hwmon_in.mode_0x0011_0x08=constant
+hwmon_in.int_cons_0x0011_0x08=1200
+hwmon_in.mode_0x0011_0x07=constant
+hwmon_in.int_cons_0x0011_0x07=6
+
+# vol18
+hwmon_in.mode_0x0012_0x00=config
+hwmon_in.int_cons_0x0012_0x00=0
+hwmon_in.src_0x0012_0x00=file
+hwmon_in.frmt_0x0012_0x00=buf
+hwmon_in.fpath_0x0012_0x00=/sys/bus/i2c/devices/82-005b/hwmon/
+hwmon_in.addr_0x0012_0x00=0
+hwmon_in.len_0x0012_0x00=8
+hwmon_in.bit_offset_0x0012_0x00=
+hwmon_in.str_cons_0x0012_0x00=in9_input
+hwmon_in.mode_0x0012_0x01=str_constant
+hwmon_in.str_cons_0x0012_0x01=VDDO1.8V
+hwmon_in.mode_0x0012_0x02=str_constant
+hwmon_in.str_cons_0x0012_0x02=ucd90160
+hwmon_in.mode_0x0012_0x03=constant
+hwmon_in.int_cons_0x0012_0x03=1980
+hwmon_in.mode_0x0012_0x05=constant
+hwmon_in.int_cons_0x0012_0x05=1620
+hwmon_in.mode_0x0012_0x08=constant
+hwmon_in.int_cons_0x0012_0x08=1800
+hwmon_in.mode_0x0012_0x07=constant
+hwmon_in.int_cons_0x0012_0x07=9
+
+# vol19
+hwmon_in.mode_0x0013_0x00=config
+hwmon_in.int_cons_0x0013_0x00=0
+hwmon_in.src_0x0013_0x00=file
+hwmon_in.frmt_0x0013_0x00=buf
+hwmon_in.fpath_0x0013_0x00=/sys/bus/i2c/devices/82-005b/hwmon/
+hwmon_in.addr_0x0013_0x00=0
+hwmon_in.len_0x0013_0x00=8
+hwmon_in.bit_offset_0x0013_0x00=
+hwmon_in.str_cons_0x0013_0x00=in10_input
+hwmon_in.mode_0x0013_0x01=str_constant
+hwmon_in.str_cons_0x0013_0x01=VDD_CORE
+hwmon_in.mode_0x0013_0x02=str_constant
+hwmon_in.str_cons_0x0013_0x02=ucd90160
+hwmon_in.mode_0x0013_0x03=constant
+hwmon_in.int_cons_0x0013_0x03=900
+hwmon_in.mode_0x0013_0x05=constant
+hwmon_in.int_cons_0x0013_0x05=630
+hwmon_in.mode_0x0013_0x08=constant
+hwmon_in.int_cons_0x0013_0x08=800
+hwmon_in.mode_0x0013_0x07=constant
+hwmon_in.int_cons_0x0013_0x07=4
+
+# vol20
+hwmon_in.mode_0x0014_0x00=config
+hwmon_in.int_cons_0x0014_0x00=0
+hwmon_in.src_0x0014_0x00=file
+hwmon_in.frmt_0x0014_0x00=buf
+hwmon_in.fpath_0x0014_0x00=/sys/bus/i2c/devices/82-005b/hwmon/
+hwmon_in.addr_0x0014_0x00=0
+hwmon_in.len_0x0014_0x00=8
+hwmon_in.bit_offset_0x0014_0x00=
+hwmon_in.str_cons_0x0014_0x00=in11_input
+hwmon_in.mode_0x0014_0x01=str_constant
+hwmon_in.str_cons_0x0014_0x01=VDDA1.5V
+hwmon_in.mode_0x0014_0x02=str_constant
+hwmon_in.str_cons_0x0014_0x02=ucd90160
+hwmon_in.mode_0x0014_0x03=constant
+hwmon_in.int_cons_0x0014_0x03=1650
+hwmon_in.mode_0x0014_0x05=constant
+hwmon_in.int_cons_0x0014_0x05=1350
+hwmon_in.mode_0x0014_0x08=constant
+hwmon_in.int_cons_0x0014_0x08=1500
+hwmon_in.mode_0x0014_0x07=constant
+hwmon_in.int_cons_0x0014_0x07=7
+
+# vol21
+hwmon_in.mode_0x0015_0x00=config
+hwmon_in.int_cons_0x0015_0x00=0
+hwmon_in.src_0x0015_0x00=file
+hwmon_in.frmt_0x0015_0x00=buf
+hwmon_in.fpath_0x0015_0x00=/sys/bus/i2c/devices/82-005b/hwmon/
+hwmon_in.addr_0x0015_0x00=0
+hwmon_in.len_0x0015_0x00=8
+hwmon_in.bit_offset_0x0015_0x00=0
+hwmon_in.str_cons_0x0015_0x00=in12_input
+hwmon_in.mode_0x0015_0x01=str_constant
+hwmon_in.str_cons_0x0015_0x01=VDD0_9V_ANLG0
+hwmon_in.mode_0x0015_0x02=str_constant
+hwmon_in.str_cons_0x0015_0x02=ucd90160
+hwmon_in.mode_0x0015_0x03=constant
+hwmon_in.int_cons_0x0015_0x03=990
+hwmon_in.mode_0x0015_0x05=constant
+hwmon_in.int_cons_0x0015_0x05=810
+hwmon_in.mode_0x0015_0x08=constant
+hwmon_in.int_cons_0x0015_0x08=900
+hwmon_in.mode_0x0015_0x07=constant
+hwmon_in.int_cons_0x0015_0x07=4
+
+
+# vol22
+hwmon_in.mode_0x0016_0x00=config
+hwmon_in.int_cons_0x0016_0x00=0
+hwmon_in.src_0x0016_0x00=file
+hwmon_in.frmt_0x0016_0x00=buf
+hwmon_in.fpath_0x0016_0x00=/sys/bus/i2c/devices/82-005b/hwmon/
+hwmon_in.addr_0x0016_0x00=0
+hwmon_in.len_0x0016_0x00=8
+hwmon_in.bit_offset_0x0016_0x00=0
+hwmon_in.str_cons_0x0016_0x00=in13_input
+hwmon_in.mode_0x0016_0x01=str_constant
+hwmon_in.str_cons_0x0016_0x01=VDD0_9V_ANLG1
+hwmon_in.mode_0x0016_0x02=str_constant
+hwmon_in.str_cons_0x0016_0x02=ucd90160
+hwmon_in.mode_0x0016_0x03=constant
+hwmon_in.int_cons_0x0016_0x03=990
+hwmon_in.mode_0x0016_0x05=constant
+hwmon_in.int_cons_0x0016_0x05=810
+hwmon_in.mode_0x0016_0x08=constant
+hwmon_in.int_cons_0x0016_0x08=900
+hwmon_in.mode_0x0016_0x07=constant
+hwmon_in.int_cons_0x0016_0x07=4
+
+
+# vol23
+hwmon_in.mode_0x0017_0x00=config
+hwmon_in.int_cons_0x0017_0x00=0
+hwmon_in.src_0x0017_0x00=file
+hwmon_in.frmt_0x0017_0x00=buf
+hwmon_in.fpath_0x0017_0x00=/sys/bus/i2c/devices/82-005b/hwmon/
+hwmon_in.addr_0x0017_0x00=0
+hwmon_in.len_0x0017_0x00=8
+hwmon_in.bit_offset_0x0017_0x00=
+hwmon_in.str_cons_0x0017_0x00=in14_input
+hwmon_in.mode_0x0017_0x01=str_constant
+hwmon_in.str_cons_0x0017_0x01=VDD0_75V_ANLG0
+hwmon_in.mode_0x0017_0x02=str_constant
+hwmon_in.str_cons_0x0017_0x02=ucd90160
+hwmon_in.mode_0x0017_0x03=constant
+hwmon_in.int_cons_0x0017_0x03=825
+hwmon_in.mode_0x0017_0x05=constant
+hwmon_in.int_cons_0x0017_0x05=675
+hwmon_in.mode_0x0017_0x08=constant
+hwmon_in.int_cons_0x0017_0x08=750
+hwmon_in.mode_0x0017_0x07=constant
+hwmon_in.int_cons_0x0017_0x07=3
+
+# vol24
+hwmon_in.mode_0x0018_0x00=config
+hwmon_in.int_cons_0x0018_0x00=0
+hwmon_in.src_0x0018_0x00=file
+hwmon_in.frmt_0x0018_0x00=buf
+hwmon_in.fpath_0x0018_0x00=/sys/bus/i2c/devices/82-005b/hwmon/
+hwmon_in.addr_0x0018_0x00=0
+hwmon_in.len_0x0018_0x00=8
+hwmon_in.bit_offset_0x0018_0x00=
+hwmon_in.str_cons_0x0018_0x00=in15_input
+hwmon_in.mode_0x0018_0x01=str_constant
+hwmon_in.str_cons_0x0018_0x01=VDD0_75V_ANLG1
+hwmon_in.mode_0x0018_0x02=str_constant
+hwmon_in.str_cons_0x0018_0x02=ucd90160
+hwmon_in.mode_0x0018_0x03=constant
+hwmon_in.int_cons_0x0018_0x03=825
+hwmon_in.mode_0x0018_0x05=constant
+hwmon_in.int_cons_0x0018_0x05=675
+hwmon_in.mode_0x0018_0x08=constant
+hwmon_in.int_cons_0x0018_0x08=750
+hwmon_in.mode_0x0018_0x07=constant
+hwmon_in.int_cons_0x0018_0x07=3
+
+# vol25
+hwmon_in.mode_0x0019_0x00=config
+hwmon_in.int_cons_0x0019_0x00=0
+hwmon_in.src_0x0019_0x00=file
+hwmon_in.frmt_0x0019_0x00=buf
+hwmon_in.fpath_0x0019_0x00=/sys/bus/i2c/devices/82-005b/hwmon/
+hwmon_in.addr_0x0019_0x00=0
+hwmon_in.len_0x0019_0x00=8
+hwmon_in.bit_offset_0x0019_0x00=
+hwmon_in.str_cons_0x0019_0x00=in16_input
+hwmon_in.mode_0x0019_0x01=str_constant
+hwmon_in.str_cons_0x0019_0x01=VDD0.8V
+hwmon_in.mode_0x0019_0x02=str_constant
+hwmon_in.str_cons_0x0019_0x02=ucd90160
+hwmon_in.mode_0x0019_0x03=constant
+hwmon_in.int_cons_0x0019_0x03=880
+hwmon_in.mode_0x0019_0x05=constant
+hwmon_in.int_cons_0x0019_0x05=720
+hwmon_in.mode_0x0019_0x08=constant
+hwmon_in.int_cons_0x0019_0x08=750
+hwmon_in.mode_0x0019_0x07=constant
+hwmon_in.int_cons_0x0019_0x07=3
+
+# vol26
+hwmon_in.mode_0x001a_0x00=config
+hwmon_in.int_cons_0x001a_0x00=0
+hwmon_in.src_0x001a_0x00=file
+hwmon_in.frmt_0x001a_0x00=buf
+hwmon_in.fpath_0x001a_0x00=/sys/bus/i2c/devices/83-005b/hwmon/
+hwmon_in.addr_0x001a_0x00=0
+hwmon_in.len_0x001a_0x00=8
+hwmon_in.bit_offset_0x001a_0x00=
+hwmon_in.str_cons_0x001a_0x00=in1_input
+hwmon_in.mode_0x001a_0x01=str_constant
+hwmon_in.str_cons_0x001a_0x01=VDD12V_MAC2
+hwmon_in.mode_0x001a_0x02=str_constant
+hwmon_in.str_cons_0x001a_0x02=ucd90160
+hwmon_in.mode_0x001a_0x03=constant
+hwmon_in.int_cons_0x001a_0x03=13200
+hwmon_in.mode_0x001a_0x05=constant
+hwmon_in.int_cons_0x001a_0x05=10800
+hwmon_in.mode_0x001a_0x08=constant
+hwmon_in.int_cons_0x001a_0x08=12000
+hwmon_in.mode_0x001a_0x07=constant
+hwmon_in.int_cons_0x001a_0x07=60
+
+# vol27
+hwmon_in.mode_0x001b_0x00=config
+hwmon_in.int_cons_0x001b_0x00=0
+hwmon_in.src_0x001b_0x00=file
+hwmon_in.frmt_0x001b_0x00=buf
+hwmon_in.fpath_0x001b_0x00=/sys/bus/i2c/devices/83-005b/hwmon/
+hwmon_in.addr_0x001b_0x00=0
+hwmon_in.len_0x001b_0x00=8
+hwmon_in.bit_offset_0x001b_0x00=
+hwmon_in.str_cons_0x001b_0x00=in2_input
+hwmon_in.mode_0x001b_0x01=str_constant
+hwmon_in.str_cons_0x001b_0x01=VDD3.3V_STANDBY
+hwmon_in.mode_0x001b_0x02=str_constant
+hwmon_in.str_cons_0x001b_0x02=ucd90160
+hwmon_in.mode_0x001b_0x03=constant
+hwmon_in.int_cons_0x001b_0x03=3630
+hwmon_in.mode_0x001b_0x05=constant
+hwmon_in.int_cons_0x001b_0x05=2970
+hwmon_in.mode_0x001b_0x08=constant
+hwmon_in.int_cons_0x001b_0x08=3300
+hwmon_in.mode_0x001b_0x07=constant
+hwmon_in.int_cons_0x001b_0x07=16
+
+# vol28
+hwmon_in.mode_0x001c_0x00=config
+hwmon_in.int_cons_0x001c_0x00=0
+hwmon_in.src_0x001c_0x00=file
+hwmon_in.frmt_0x001c_0x00=buf
+hwmon_in.fpath_0x001c_0x00=/sys/bus/i2c/devices/83-005b/hwmon/
+hwmon_in.addr_0x001c_0x00=0
+hwmon_in.len_0x001c_0x00=8
+hwmon_in.bit_offset_0x001c_0x00=0
+hwmon_in.str_cons_0x001c_0x00=in3_input
+hwmon_in.mode_0x001c_0x01=str_constant
+hwmon_in.str_cons_0x001c_0x01=VDD3V8_CLK
+hwmon_in.mode_0x001c_0x02=str_constant
+hwmon_in.str_cons_0x001c_0x02=ucd90160
+hwmon_in.mode_0x001c_0x03=constant
+hwmon_in.int_cons_0x001c_0x03=4180
+hwmon_in.mode_0x001c_0x05=constant
+hwmon_in.int_cons_0x001c_0x05=3420
+hwmon_in.mode_0x001c_0x08=constant
+hwmon_in.int_cons_0x001c_0x08=3800
+hwmon_in.mode_0x001c_0x07=constant
+hwmon_in.int_cons_0x001c_0x07=19
+
+# vol29
+hwmon_in.mode_0x001d_0x00=config
+hwmon_in.int_cons_0x001d_0x00=0
+hwmon_in.src_0x001d_0x00=file
+hwmon_in.frmt_0x001d_0x00=buf
+hwmon_in.fpath_0x001d_0x00=/sys/bus/i2c/devices/83-005b/hwmon/
+hwmon_in.addr_0x001d_0x00=0
+hwmon_in.len_0x001d_0x00=8
+hwmon_in.bit_offset_0x001d_0x00=0
+hwmon_in.str_cons_0x001d_0x00=in4_input
+hwmon_in.mode_0x001d_0x01=str_constant
+hwmon_in.str_cons_0x001d_0x01=VDD5V_VR
+hwmon_in.mode_0x001d_0x02=str_constant
+hwmon_in.str_cons_0x001d_0x02=ucd90160
+hwmon_in.mode_0x001d_0x03=constant
+hwmon_in.int_cons_0x001d_0x03=5500
+hwmon_in.mode_0x001d_0x05=constant
+hwmon_in.int_cons_0x001d_0x05=4500
+hwmon_in.mode_0x001d_0x08=constant
+hwmon_in.int_cons_0x001d_0x08=5000
+hwmon_in.mode_0x001d_0x07=constant
+hwmon_in.int_cons_0x001d_0x07=25
+
+# vol30
+hwmon_in.mode_0x001e_0x00=config
+hwmon_in.int_cons_0x001e_0x00=0
+hwmon_in.src_0x001e_0x00=file
+hwmon_in.frmt_0x001e_0x00=buf
+hwmon_in.fpath_0x001e_0x00=/sys/bus/i2c/devices/83-005b/hwmon/
+hwmon_in.addr_0x001e_0x00=0
+hwmon_in.len_0x001e_0x00=8
+hwmon_in.bit_offset_0x001e_0x00=0
+hwmon_in.str_cons_0x001e_0x00=in5_input
+hwmon_in.mode_0x001e_0x01=str_constant
+hwmon_in.str_cons_0x001e_0x01=VDD1.5V
+hwmon_in.mode_0x001e_0x02=str_constant
+hwmon_in.str_cons_0x001e_0x02=ucd90160
+hwmon_in.mode_0x001e_0x03=constant
+hwmon_in.int_cons_0x001e_0x03=1650
+hwmon_in.mode_0x001e_0x05=constant
+hwmon_in.int_cons_0x001e_0x05=1350
+hwmon_in.mode_0x001e_0x08=constant
+hwmon_in.int_cons_0x001e_0x08=1500
+hwmon_in.mode_0x001e_0x07=constant
+hwmon_in.int_cons_0x001e_0x07=7
+
+# vol31
+hwmon_in.mode_0x001f_0x00=config
+hwmon_in.int_cons_0x001f_0x00=0
+hwmon_in.src_0x001f_0x00=file
+hwmon_in.frmt_0x001f_0x00=buf
+hwmon_in.fpath_0x001f_0x00=/sys/bus/i2c/devices/83-005b/hwmon/
+hwmon_in.addr_0x001f_0x00=0
+hwmon_in.len_0x001f_0x00=8
+hwmon_in.bit_offset_0x001f_0x00=0
+hwmon_in.str_cons_0x001f_0x00=in6_input
+hwmon_in.mode_0x001f_0x01=str_constant
+hwmon_in.str_cons_0x001f_0x01=VDD1_2V
+hwmon_in.mode_0x001f_0x02=str_constant
+hwmon_in.str_cons_0x001f_0x02=ucd90160
+hwmon_in.mode_0x001f_0x03=constant
+hwmon_in.int_cons_0x001f_0x03=1320
+hwmon_in.mode_0x001f_0x05=constant
+hwmon_in.int_cons_0x001f_0x05=1080
+hwmon_in.mode_0x001f_0x08=constant
+hwmon_in.int_cons_0x001f_0x08=1200
+hwmon_in.mode_0x001f_0x07=constant
+hwmon_in.int_cons_0x001f_0x07=6
+
+# vol32
+hwmon_in.mode_0x0020_0x00=config
+hwmon_in.int_cons_0x0020_0x00=0
+hwmon_in.src_0x0020_0x00=file
+hwmon_in.frmt_0x0020_0x00=buf
+hwmon_in.fpath_0x0020_0x00=/sys/bus/i2c/devices/83-005b/hwmon/
+hwmon_in.addr_0x0020_0x00=0
+hwmon_in.len_0x0020_0x00=8
+hwmon_in.bit_offset_0x0020_0x00=
+hwmon_in.str_cons_0x0020_0x00=in7_input
+hwmon_in.mode_0x0020_0x01=str_constant
+hwmon_in.str_cons_0x0020_0x01=VDD_PLL0
+hwmon_in.mode_0x0020_0x02=str_constant
+hwmon_in.str_cons_0x0020_0x02=ucd90160
+hwmon_in.mode_0x0020_0x03=constant
+hwmon_in.int_cons_0x0020_0x03=990
+hwmon_in.mode_0x0020_0x05=constant
+hwmon_in.int_cons_0x0020_0x05=810
+hwmon_in.mode_0x0020_0x08=constant
+hwmon_in.int_cons_0x0020_0x08=900
+hwmon_in.mode_0x0020_0x07=constant
+hwmon_in.int_cons_0x0020_0x07=4
+
+# vol33
+hwmon_in.mode_0x0021_0x00=config
+hwmon_in.int_cons_0x0021_0x00=0
+hwmon_in.src_0x0021_0x00=file
+hwmon_in.frmt_0x0021_0x00=buf
+hwmon_in.fpath_0x0021_0x00=/sys/bus/i2c/devices/83-005b/hwmon/
+hwmon_in.addr_0x0021_0x00=0
+hwmon_in.len_0x0021_0x00=8
+hwmon_in.bit_offset_0x0021_0x00=
+hwmon_in.str_cons_0x0021_0x00=in8_input
+hwmon_in.mode_0x0021_0x01=str_constant
+hwmon_in.str_cons_0x0021_0x01=VDD_PLL1
+hwmon_in.mode_0x0021_0x02=str_constant
+hwmon_in.str_cons_0x0021_0x02=ucd90160
+hwmon_in.mode_0x0021_0x03=constant
+hwmon_in.int_cons_0x0021_0x03=990
+hwmon_in.mode_0x0021_0x05=constant
+hwmon_in.int_cons_0x0021_0x05=810
+hwmon_in.mode_0x0021_0x08=constant
+hwmon_in.int_cons_0x0021_0x08=900
+hwmon_in.mode_0x0021_0x07=constant
+hwmon_in.int_cons_0x0021_0x07=4
+
+# vol34
+hwmon_in.mode_0x0022_0x00=config
+hwmon_in.int_cons_0x0022_0x00=0
+hwmon_in.src_0x0022_0x00=file
+hwmon_in.frmt_0x0022_0x00=buf
+hwmon_in.fpath_0x0022_0x00=/sys/bus/i2c/devices/83-005b/hwmon/
+hwmon_in.addr_0x0022_0x00=0
+hwmon_in.len_0x0022_0x00=8
+hwmon_in.bit_offset_0x0022_0x00=
+hwmon_in.str_cons_0x0022_0x00=in9_input
+hwmon_in.mode_0x0022_0x01=str_constant
+hwmon_in.str_cons_0x0022_0x01=VDD_PLL2
+hwmon_in.mode_0x0022_0x02=str_constant
+hwmon_in.str_cons_0x0022_0x02=ucd90160
+hwmon_in.mode_0x0022_0x03=constant
+hwmon_in.int_cons_0x0022_0x03=990
+hwmon_in.mode_0x0022_0x05=constant
+hwmon_in.int_cons_0x0022_0x05=810
+hwmon_in.mode_0x0022_0x08=constant
+hwmon_in.int_cons_0x0022_0x08=900
+hwmon_in.mode_0x0022_0x07=constant
+hwmon_in.int_cons_0x0022_0x07=4
+
+# vol35
+hwmon_in.mode_0x0023_0x00=config
+hwmon_in.int_cons_0x0023_0x00=0
+hwmon_in.src_0x0023_0x00=file
+hwmon_in.frmt_0x0023_0x00=buf
+hwmon_in.fpath_0x0023_0x00=/sys/bus/i2c/devices/83-005b/hwmon/
+hwmon_in.addr_0x0023_0x00=0
+hwmon_in.len_0x0023_0x00=8
+hwmon_in.bit_offset_0x0023_0x00=
+hwmon_in.str_cons_0x0023_0x00=in10_input
+hwmon_in.mode_0x0023_0x01=str_constant
+hwmon_in.str_cons_0x0023_0x01=VDD_PLL3
+hwmon_in.mode_0x0023_0x02=str_constant
+hwmon_in.str_cons_0x0023_0x02=ucd90160
+hwmon_in.mode_0x0023_0x03=constant
+hwmon_in.int_cons_0x0023_0x03=990
+hwmon_in.mode_0x0023_0x05=constant
+hwmon_in.int_cons_0x0023_0x05=810
+hwmon_in.mode_0x0023_0x08=constant
+hwmon_in.int_cons_0x0023_0x08=900
+hwmon_in.mode_0x0023_0x07=constant
+hwmon_in.int_cons_0x0023_0x07=4
+
+# vol36
+hwmon_in.mode_0x0024_0x00=config
+hwmon_in.int_cons_0x0024_0x00=0
+hwmon_in.src_0x0024_0x00=file
+hwmon_in.frmt_0x0024_0x00=buf
+hwmon_in.fpath_0x0024_0x00=/sys/bus/i2c/devices/84-0040/hwmon/
+hwmon_in.addr_0x0024_0x00=0
+hwmon_in.len_0x0024_0x00=8
+hwmon_in.bit_offset_0x0024_0x00=
+hwmon_in.str_cons_0x0024_0x00=in3_input
+hwmon_in.mode_0x0024_0x01=str_constant
+hwmon_in.str_cons_0x0024_0x01=XDPE_VDD_CORE
+hwmon_in.mode_0x0024_0x02=str_constant
+hwmon_in.str_cons_0x0024_0x02=xdpe132g5c
+hwmon_in.mode_0x0024_0x03=constant
+hwmon_in.int_cons_0x0024_0x03=900
+hwmon_in.mode_0x0024_0x05=constant
+hwmon_in.int_cons_0x0024_0x05=630
+hwmon_in.mode_0x0024_0x08=constant
+hwmon_in.int_cons_0x0024_0x08=800
+hwmon_in.mode_0x0024_0x07=constant
+hwmon_in.int_cons_0x0024_0x07=12
+
+# vol37
+hwmon_in.mode_0x0025_0x00=config
+hwmon_in.int_cons_0x0025_0x00=0
+hwmon_in.src_0x0025_0x00=file
+hwmon_in.frmt_0x0025_0x00=buf
+hwmon_in.fpath_0x0025_0x00=/sys/bus/i2c/devices/85-004d/hwmon/
+hwmon_in.addr_0x0025_0x00=0
+hwmon_in.len_0x0025_0x00=8
+hwmon_in.bit_offset_0x0025_0x00=
+hwmon_in.str_cons_0x0025_0x00=in3_input
+hwmon_in.mode_0x0025_0x01=str_constant
+hwmon_in.str_cons_0x0025_0x01=XDPE_VDD0_9V_ANLG0
+hwmon_in.mode_0x0025_0x02=str_constant
+hwmon_in.str_cons_0x0025_0x02=xdpe132g5c
+hwmon_in.mode_0x0025_0x03=constant
+hwmon_in.int_cons_0x0025_0x03=990
+hwmon_in.mode_0x0025_0x05=constant
+hwmon_in.int_cons_0x0025_0x05=810
+hwmon_in.mode_0x0025_0x08=constant
+hwmon_in.int_cons_0x0025_0x08=900
+hwmon_in.mode_0x0025_0x07=constant
+hwmon_in.int_cons_0x0025_0x07=12
+
+# vol38
+hwmon_in.mode_0x0026_0x00=config
+hwmon_in.int_cons_0x0026_0x00=0
+hwmon_in.src_0x0026_0x00=file
+hwmon_in.frmt_0x0026_0x00=buf
+hwmon_in.fpath_0x0026_0x00=/sys/bus/i2c/devices/85-004d/hwmon/
+hwmon_in.addr_0x0026_0x00=0
+hwmon_in.len_0x0026_0x00=8
+hwmon_in.bit_offset_0x0026_0x00=
+hwmon_in.str_cons_0x0026_0x00=in4_input
+hwmon_in.mode_0x0026_0x01=str_constant
+hwmon_in.str_cons_0x0026_0x01=XDPE_VDD0_75V_ANLG0
+hwmon_in.mode_0x0026_0x02=str_constant
+hwmon_in.str_cons_0x0026_0x02=xdpe132g5c
+hwmon_in.mode_0x0026_0x03=constant
+hwmon_in.int_cons_0x0026_0x03=825
+hwmon_in.mode_0x0026_0x05=constant
+hwmon_in.int_cons_0x0026_0x05=675
+hwmon_in.mode_0x0026_0x08=constant
+hwmon_in.int_cons_0x0026_0x08=750
+hwmon_in.mode_0x0026_0x07=constant
+hwmon_in.int_cons_0x0026_0x07=12
+
+# vol39
+hwmon_in.mode_0x0027_0x00=config
+hwmon_in.int_cons_0x0027_0x00=0
+hwmon_in.src_0x0027_0x00=file
+hwmon_in.frmt_0x0027_0x00=buf
+hwmon_in.fpath_0x0027_0x00=/sys/bus/i2c/devices/86-004d/hwmon/
+hwmon_in.addr_0x0027_0x00=0
+hwmon_in.len_0x0027_0x00=8
+hwmon_in.bit_offset_0x0027_0x00=
+hwmon_in.str_cons_0x0027_0x00=in3_input
+hwmon_in.mode_0x0027_0x01=str_constant
+hwmon_in.str_cons_0x0027_0x01=XDPE_VDD0_9V_ANLG1
+hwmon_in.mode_0x0027_0x02=str_constant
+hwmon_in.str_cons_0x0027_0x02=xdpe132g5c
+hwmon_in.mode_0x0027_0x03=constant
+hwmon_in.int_cons_0x0027_0x03=990
+hwmon_in.mode_0x0027_0x05=constant
+hwmon_in.int_cons_0x0027_0x05=810
+hwmon_in.mode_0x0027_0x08=constant
+hwmon_in.int_cons_0x0027_0x08=900
+hwmon_in.mode_0x0027_0x07=constant
+hwmon_in.int_cons_0x0027_0x07=12
+
+# vol40
+hwmon_in.mode_0x0028_0x00=config
+hwmon_in.int_cons_0x0028_0x00=0
+hwmon_in.src_0x0028_0x00=file
+hwmon_in.frmt_0x0028_0x00=buf
+hwmon_in.fpath_0x0028_0x00=/sys/bus/i2c/devices/86-004d/hwmon/
+hwmon_in.addr_0x0028_0x00=0
+hwmon_in.len_0x0028_0x00=8
+hwmon_in.bit_offset_0x0028_0x00=
+hwmon_in.str_cons_0x0028_0x00=in4_input
+hwmon_in.mode_0x0028_0x01=str_constant
+hwmon_in.str_cons_0x0028_0x01=XDPE_VDD0_75V_ANLG1
+hwmon_in.mode_0x0028_0x02=str_constant
+hwmon_in.str_cons_0x0028_0x02=xdpe132g5c
+hwmon_in.mode_0x0028_0x03=constant
+hwmon_in.int_cons_0x0028_0x03=825
+hwmon_in.mode_0x0028_0x05=constant
+hwmon_in.int_cons_0x0028_0x05=675
+hwmon_in.mode_0x0028_0x08=constant
+hwmon_in.int_cons_0x0028_0x08=750
+hwmon_in.mode_0x0028_0x07=constant
+hwmon_in.int_cons_0x0028_0x07=12
+
+# vol41
+hwmon_in.mode_0x0029_0x00=config
+hwmon_in.int_cons_0x0029_0x00=3
+hwmon_in.src_0x0029_0x00=file
+hwmon_in.frmt_0x0029_0x00=buf
+hwmon_in.fpath_0x0029_0x00=/sys/bus/i2c/devices/90-0070/hwmon/
+hwmon_in.addr_0x0029_0x00=0
+hwmon_in.len_0x0029_0x00=8
+hwmon_in.bit_offset_0x0029_0x00=0
+hwmon_in.str_cons_0x0029_0x00=in3_input
+hwmon_in.mode_0x0029_0x01=str_constant
+hwmon_in.str_cons_0x0029_0x01=OSFP_VDD3.3V_A1
+hwmon_in.mode_0x0029_0x02=str_constant
+hwmon_in.str_cons_0x0029_0x02=xdpe12284c
+hwmon_in.mode_0x0029_0x03=constant
+hwmon_in.int_cons_0x0029_0x03=3630
+hwmon_in.mode_0x0029_0x05=constant
+hwmon_in.int_cons_0x0029_0x05=2970
+hwmon_in.mode_0x0029_0x08=constant
+hwmon_in.int_cons_0x0029_0x08=3300
+hwmon_in.mode_0x0029_0x07=constant
+hwmon_in.int_cons_0x0029_0x07=12
+hwmon_in.int_extra1_0x0029_0x00=1500
+
+# vol42
+hwmon_in.mode_0x002a_0x00=config
+hwmon_in.int_cons_0x002a_0x00=3
+hwmon_in.src_0x002a_0x00=file
+hwmon_in.frmt_0x002a_0x00=buf
+hwmon_in.fpath_0x002a_0x00=/sys/bus/i2c/devices/90-0070/hwmon/
+hwmon_in.addr_0x002a_0x00=0
+hwmon_in.len_0x002a_0x00=8
+hwmon_in.bit_offset_0x002a_0x00=0
+hwmon_in.str_cons_0x002a_0x00=in4_input
+hwmon_in.mode_0x002a_0x01=str_constant
+hwmon_in.str_cons_0x002a_0x01=OSFP_VDD3.3V_B1
+hwmon_in.mode_0x002a_0x02=str_constant
+hwmon_in.str_cons_0x002a_0x02=xdpe12284c
+hwmon_in.mode_0x002a_0x03=constant
+hwmon_in.int_cons_0x002a_0x03=3630
+hwmon_in.mode_0x002a_0x05=constant
+hwmon_in.int_cons_0x002a_0x05=2970
+hwmon_in.mode_0x002a_0x08=constant
+hwmon_in.int_cons_0x002a_0x08=3300
+hwmon_in.mode_0x002a_0x07=constant
+hwmon_in.int_cons_0x002a_0x07=12
+hwmon_in.int_extra1_0x002a_0x00=1500
+
+# vol43
+hwmon_in.mode_0x002b_0x00=config
+hwmon_in.int_cons_0x002b_0x00=3
+hwmon_in.src_0x002b_0x00=file
+hwmon_in.frmt_0x002b_0x00=buf
+hwmon_in.fpath_0x002b_0x00=/sys/bus/i2c/devices/91-0070/hwmon/
+hwmon_in.addr_0x002b_0x00=0
+hwmon_in.len_0x002b_0x00=8
+hwmon_in.bit_offset_0x002b_0x00=0
+hwmon_in.str_cons_0x002b_0x00=in3_input
+hwmon_in.mode_0x002b_0x01=str_constant
+hwmon_in.str_cons_0x002b_0x01=OSFP_VDD3.3V_A2
+hwmon_in.mode_0x002b_0x02=str_constant
+hwmon_in.str_cons_0x002b_0x02=xdpe12284c
+hwmon_in.mode_0x002b_0x03=constant
+hwmon_in.int_cons_0x002b_0x03=3630
+hwmon_in.mode_0x002b_0x05=constant
+hwmon_in.int_cons_0x002b_0x05=2970
+hwmon_in.mode_0x002b_0x08=constant
+hwmon_in.int_cons_0x002b_0x08=3300
+hwmon_in.mode_0x002b_0x07=constant
+hwmon_in.int_cons_0x002b_0x07=12
+hwmon_in.int_extra1_0x002b_0x00=1500
+
+# vol44
+hwmon_in.mode_0x002c_0x00=config
+hwmon_in.int_cons_0x002c_0x00=3
+hwmon_in.src_0x002c_0x00=file
+hwmon_in.frmt_0x002c_0x00=buf
+hwmon_in.fpath_0x002c_0x00=/sys/bus/i2c/devices/91-0070/hwmon/
+hwmon_in.addr_0x002c_0x00=0
+hwmon_in.len_0x002c_0x00=8
+hwmon_in.bit_offset_0x002c_0x00=0
+hwmon_in.str_cons_0x002c_0x00=in4_input
+hwmon_in.mode_0x002c_0x01=str_constant
+hwmon_in.str_cons_0x002c_0x01=OSFP_VDD3.3V_B2
+hwmon_in.mode_0x002c_0x02=str_constant
+hwmon_in.str_cons_0x002c_0x02=xdpe12284c
+hwmon_in.mode_0x002c_0x03=constant
+hwmon_in.int_cons_0x002c_0x03=3630
+hwmon_in.mode_0x002c_0x05=constant
+hwmon_in.int_cons_0x002c_0x05=2970
+hwmon_in.mode_0x002c_0x08=constant
+hwmon_in.int_cons_0x002c_0x08=3300
+hwmon_in.mode_0x002c_0x07=constant
+hwmon_in.int_cons_0x002c_0x07=12
+hwmon_in.int_extra1_0x002c_0x00=1500
+
+# vol45
+hwmon_in.mode_0x002d_0x00=config
+hwmon_in.int_cons_0x002d_0x00=3
+hwmon_in.src_0x002d_0x00=file
+hwmon_in.frmt_0x002d_0x00=buf
+hwmon_in.fpath_0x002d_0x00=/sys/bus/i2c/devices/92-0070/hwmon/
+hwmon_in.addr_0x002d_0x00=0
+hwmon_in.len_0x002d_0x00=8
+hwmon_in.bit_offset_0x002d_0x00=0
+hwmon_in.str_cons_0x002d_0x00=in3_input
+hwmon_in.mode_0x002d_0x01=str_constant
+hwmon_in.str_cons_0x002d_0x01=OSFP_VDD3.3V_A3
+hwmon_in.mode_0x002d_0x02=str_constant
+hwmon_in.str_cons_0x002d_0x02=xdpe12284c
+hwmon_in.mode_0x002d_0x03=constant
+hwmon_in.int_cons_0x002d_0x03=3630
+hwmon_in.mode_0x002d_0x05=constant
+hwmon_in.int_cons_0x002d_0x05=2970
+hwmon_in.mode_0x002d_0x08=constant
+hwmon_in.int_cons_0x002d_0x08=3300
+hwmon_in.mode_0x002d_0x07=constant
+hwmon_in.int_cons_0x002d_0x07=12
+hwmon_in.int_extra1_0x002d_0x00=1500
+
+# vol46
+hwmon_in.mode_0x002e_0x00=config
+hwmon_in.int_cons_0x002e_0x00=3
+hwmon_in.src_0x002e_0x00=file
+hwmon_in.frmt_0x002e_0x00=buf
+hwmon_in.fpath_0x002e_0x00=/sys/bus/i2c/devices/92-0070/hwmon/
+hwmon_in.addr_0x002e_0x00=0
+hwmon_in.len_0x002e_0x00=8
+hwmon_in.bit_offset_0x002e_0x00=0
+hwmon_in.str_cons_0x002e_0x00=in4_input
+hwmon_in.mode_0x002e_0x01=str_constant
+hwmon_in.str_cons_0x002e_0x01=OSFP_VDD3.3V_B3
+hwmon_in.mode_0x002e_0x02=str_constant
+hwmon_in.str_cons_0x002e_0x02=xdpe12284c
+hwmon_in.mode_0x002e_0x03=constant
+hwmon_in.int_cons_0x002e_0x03=3630
+hwmon_in.mode_0x002e_0x05=constant
+hwmon_in.int_cons_0x002e_0x05=2970
+hwmon_in.mode_0x002e_0x08=constant
+hwmon_in.int_cons_0x002e_0x08=3300
+hwmon_in.mode_0x002e_0x07=constant
+hwmon_in.int_cons_0x002e_0x07=12
+hwmon_in.int_extra1_0x002e_0x00=1500
+
+# vol47
+hwmon_in.mode_0x002f_0x00=config
+hwmon_in.int_cons_0x002f_0x00=3
+hwmon_in.src_0x002f_0x00=file
+hwmon_in.frmt_0x002f_0x00=buf
+hwmon_in.fpath_0x002f_0x00=/sys/bus/i2c/devices/93-0070/hwmon/
+hwmon_in.addr_0x002f_0x00=0
+hwmon_in.len_0x002f_0x00=8
+hwmon_in.bit_offset_0x002f_0x00=0
+hwmon_in.str_cons_0x002f_0x00=in3_input
+hwmon_in.mode_0x002f_0x01=str_constant
+hwmon_in.str_cons_0x002f_0x01=OSFP_VDD3.3V_A4
+hwmon_in.mode_0x002f_0x02=str_constant
+hwmon_in.str_cons_0x002f_0x02=xdpe12284c
+hwmon_in.mode_0x002f_0x03=constant
+hwmon_in.int_cons_0x002f_0x03=3630
+hwmon_in.mode_0x002f_0x05=constant
+hwmon_in.int_cons_0x002f_0x05=2970
+hwmon_in.mode_0x002f_0x08=constant
+hwmon_in.int_cons_0x002f_0x08=3300
+hwmon_in.mode_0x002f_0x07=constant
+hwmon_in.int_cons_0x002f_0x07=12
+hwmon_in.int_extra1_0x002f_0x00=1500
+
+# vol48
+hwmon_in.mode_0x0030_0x00=config
+hwmon_in.int_cons_0x0030_0x00=3
+hwmon_in.src_0x0030_0x00=file
+hwmon_in.frmt_0x0030_0x00=buf
+hwmon_in.fpath_0x0030_0x00=/sys/bus/i2c/devices/93-0070/hwmon/
+hwmon_in.addr_0x0030_0x00=0
+hwmon_in.len_0x0030_0x00=8
+hwmon_in.bit_offset_0x0030_0x00=0
+hwmon_in.str_cons_0x0030_0x00=in4_input
+hwmon_in.mode_0x0030_0x01=str_constant
+hwmon_in.str_cons_0x0030_0x01=OSFP_VDD3.3V_B4
+hwmon_in.mode_0x0030_0x02=str_constant
+hwmon_in.str_cons_0x0030_0x02=xdpe12284c
+hwmon_in.mode_0x0030_0x03=constant
+hwmon_in.int_cons_0x0030_0x03=3630
+hwmon_in.mode_0x0030_0x05=constant
+hwmon_in.int_cons_0x0030_0x05=2970
+hwmon_in.mode_0x0030_0x08=constant
+hwmon_in.int_cons_0x0030_0x08=3300
+hwmon_in.mode_0x0030_0x07=constant
+hwmon_in.int_cons_0x0030_0x07=12
+hwmon_in.int_extra1_0x0030_0x00=1500
+
+# vol49
+hwmon_in.mode_0x0031_0x00=config
+hwmon_in.int_cons_0x0031_0x00=3
+hwmon_in.src_0x0031_0x00=file
+hwmon_in.frmt_0x0031_0x00=buf
+hwmon_in.fpath_0x0031_0x00=/sys/bus/i2c/devices/94-0070/hwmon/
+hwmon_in.addr_0x0031_0x00=0
+hwmon_in.len_0x0031_0x00=8
+hwmon_in.bit_offset_0x0031_0x00=0
+hwmon_in.str_cons_0x0031_0x00=in3_input
+hwmon_in.mode_0x0031_0x01=str_constant
+hwmon_in.str_cons_0x0031_0x01=OSFP_VDD3.3V_A5
+hwmon_in.mode_0x0031_0x02=str_constant
+hwmon_in.str_cons_0x0031_0x02=xdpe12284c
+hwmon_in.mode_0x0031_0x03=constant
+hwmon_in.int_cons_0x0031_0x03=3630
+hwmon_in.mode_0x0031_0x05=constant
+hwmon_in.int_cons_0x0031_0x05=2970
+hwmon_in.mode_0x0031_0x08=constant
+hwmon_in.int_cons_0x0031_0x08=3300
+hwmon_in.mode_0x0031_0x07=constant
+hwmon_in.int_cons_0x0031_0x07=12
+hwmon_in.int_extra1_0x0031_0x00=1500
+
+# vol50
+hwmon_in.mode_0x0032_0x00=config
+hwmon_in.int_cons_0x0032_0x00=3
+hwmon_in.src_0x0032_0x00=file
+hwmon_in.frmt_0x0032_0x00=buf
+hwmon_in.fpath_0x0032_0x00=/sys/bus/i2c/devices/94-0070/hwmon/
+hwmon_in.addr_0x0032_0x00=0
+hwmon_in.len_0x0032_0x00=8
+hwmon_in.bit_offset_0x0032_0x00=0
+hwmon_in.str_cons_0x0032_0x00=in4_input
+hwmon_in.mode_0x0032_0x01=str_constant
+hwmon_in.str_cons_0x0032_0x01=OSFP_VDD3.3V_B5
+hwmon_in.mode_0x0032_0x02=str_constant
+hwmon_in.str_cons_0x0032_0x02=xdpe12284c
+hwmon_in.mode_0x0032_0x03=constant
+hwmon_in.int_cons_0x0032_0x03=3630
+hwmon_in.mode_0x0032_0x05=constant
+hwmon_in.int_cons_0x0032_0x05=2970
+hwmon_in.mode_0x0032_0x08=constant
+hwmon_in.int_cons_0x0032_0x08=3300
+hwmon_in.mode_0x0032_0x07=constant
+hwmon_in.int_cons_0x0032_0x07=12
+hwmon_in.int_extra1_0x0032_0x00=1500
+
+# vol51
+hwmon_in.mode_0x0033_0x00=config
+hwmon_in.int_cons_0x0033_0x00=3
+hwmon_in.src_0x0033_0x00=file
+hwmon_in.frmt_0x0033_0x00=buf
+hwmon_in.fpath_0x0033_0x00=/sys/bus/i2c/devices/95-0070/hwmon/
+hwmon_in.addr_0x0033_0x00=0
+hwmon_in.len_0x0033_0x00=8
+hwmon_in.bit_offset_0x0033_0x00=0
+hwmon_in.str_cons_0x0033_0x00=in3_input
+hwmon_in.mode_0x0033_0x01=str_constant
+hwmon_in.str_cons_0x0033_0x01=OSFP_VDD3.3V_A6
+hwmon_in.mode_0x0033_0x02=str_constant
+hwmon_in.str_cons_0x0033_0x02=xdpe12284c
+hwmon_in.mode_0x0033_0x03=constant
+hwmon_in.int_cons_0x0033_0x03=3630
+hwmon_in.mode_0x0033_0x05=constant
+hwmon_in.int_cons_0x0033_0x05=2970
+hwmon_in.mode_0x0033_0x08=constant
+hwmon_in.int_cons_0x0033_0x08=3300
+hwmon_in.mode_0x0033_0x07=constant
+hwmon_in.int_cons_0x0033_0x07=12
+hwmon_in.int_extra1_0x0033_0x00=1500
+
+# vol52
+hwmon_in.mode_0x0034_0x00=config
+hwmon_in.int_cons_0x0034_0x00=3
+hwmon_in.src_0x0034_0x00=file
+hwmon_in.frmt_0x0034_0x00=buf
+hwmon_in.fpath_0x0034_0x00=/sys/bus/i2c/devices/95-0070/hwmon/
+hwmon_in.addr_0x0034_0x00=0
+hwmon_in.len_0x0034_0x00=8
+hwmon_in.bit_offset_0x0034_0x00=0
+hwmon_in.str_cons_0x0034_0x00=in4_input
+hwmon_in.mode_0x0034_0x01=str_constant
+hwmon_in.str_cons_0x0034_0x01=OSFP_VDD3.3V_B6
+hwmon_in.mode_0x0034_0x02=str_constant
+hwmon_in.str_cons_0x0034_0x02=xdpe12284c
+hwmon_in.mode_0x0034_0x03=constant
+hwmon_in.int_cons_0x0034_0x03=3630
+hwmon_in.mode_0x0034_0x05=constant
+hwmon_in.int_cons_0x0034_0x05=2970
+hwmon_in.mode_0x0034_0x08=constant
+hwmon_in.int_cons_0x0034_0x08=3300
+hwmon_in.mode_0x0034_0x07=constant
+hwmon_in.int_cons_0x0034_0x07=12
+hwmon_in.int_extra1_0x0034_0x00=1500
+
+# vol53
+hwmon_in.mode_0x0035_0x00=config
+hwmon_in.int_cons_0x0035_0x00=3
+hwmon_in.src_0x0035_0x00=file
+hwmon_in.frmt_0x0035_0x00=buf
+hwmon_in.fpath_0x0035_0x00=/sys/bus/i2c/devices/96-0070/hwmon/
+hwmon_in.addr_0x0035_0x00=0
+hwmon_in.len_0x0035_0x00=8
+hwmon_in.bit_offset_0x0035_0x00=0
+hwmon_in.str_cons_0x0035_0x00=in3_input
+hwmon_in.mode_0x0035_0x01=str_constant
+hwmon_in.str_cons_0x0035_0x01=OSFP_VDD3.3V_A7
+hwmon_in.mode_0x0035_0x02=str_constant
+hwmon_in.str_cons_0x0035_0x02=xdpe12284c
+hwmon_in.mode_0x0035_0x03=constant
+hwmon_in.int_cons_0x0035_0x03=3630
+hwmon_in.mode_0x0035_0x05=constant
+hwmon_in.int_cons_0x0035_0x05=2970
+hwmon_in.mode_0x0035_0x08=constant
+hwmon_in.int_cons_0x0035_0x08=3300
+hwmon_in.mode_0x0035_0x07=constant
+hwmon_in.int_cons_0x0035_0x07=12
+hwmon_in.int_extra1_0x0035_0x00=1500
+
+# vol54
+hwmon_in.mode_0x0036_0x00=config
+hwmon_in.int_cons_0x0036_0x00=3
+hwmon_in.src_0x0036_0x00=file
+hwmon_in.frmt_0x0036_0x00=buf
+hwmon_in.fpath_0x0036_0x00=/sys/bus/i2c/devices/96-0070/hwmon/
+hwmon_in.addr_0x0036_0x00=0
+hwmon_in.len_0x0036_0x00=8
+hwmon_in.bit_offset_0x0036_0x00=0
+hwmon_in.str_cons_0x0036_0x00=in4_input
+hwmon_in.mode_0x0036_0x01=str_constant
+hwmon_in.str_cons_0x0036_0x01=OSFP_VDD3.3V_B7
+hwmon_in.mode_0x0036_0x02=str_constant
+hwmon_in.str_cons_0x0036_0x02=xdpe12284c
+hwmon_in.mode_0x0036_0x03=constant
+hwmon_in.int_cons_0x0036_0x03=3630
+hwmon_in.mode_0x0036_0x05=constant
+hwmon_in.int_cons_0x0036_0x05=2970
+hwmon_in.mode_0x0036_0x08=constant
+hwmon_in.int_cons_0x0036_0x08=3300
+hwmon_in.mode_0x0036_0x07=constant
+hwmon_in.int_cons_0x0036_0x07=12
+hwmon_in.int_extra1_0x0036_0x00=1500
+
+# vol55
+hwmon_in.mode_0x0037_0x00=config
+hwmon_in.int_cons_0x0037_0x00=3
+hwmon_in.src_0x0037_0x00=file
+hwmon_in.frmt_0x0037_0x00=buf
+hwmon_in.fpath_0x0037_0x00=/sys/bus/i2c/devices/97-0070/hwmon/
+hwmon_in.addr_0x0037_0x00=0
+hwmon_in.len_0x0037_0x00=8
+hwmon_in.bit_offset_0x0037_0x00=0
+hwmon_in.str_cons_0x0037_0x00=in3_input
+hwmon_in.mode_0x0037_0x01=str_constant
+hwmon_in.str_cons_0x0037_0x01=OSFP_VDD3.3V_A8
+hwmon_in.mode_0x0037_0x02=str_constant
+hwmon_in.str_cons_0x0037_0x02=xdpe12284c
+hwmon_in.mode_0x0037_0x03=constant
+hwmon_in.int_cons_0x0037_0x03=3630
+hwmon_in.mode_0x0037_0x05=constant
+hwmon_in.int_cons_0x0037_0x05=2970
+hwmon_in.mode_0x0037_0x08=constant
+hwmon_in.int_cons_0x0037_0x08=3300
+hwmon_in.mode_0x0037_0x07=constant
+hwmon_in.int_cons_0x0037_0x07=12
+hwmon_in.int_extra1_0x0037_0x00=1500
+
+# vol56
+hwmon_in.mode_0x0038_0x00=config
+hwmon_in.int_cons_0x0038_0x00=3
+hwmon_in.src_0x0038_0x00=file
+hwmon_in.frmt_0x0038_0x00=buf
+hwmon_in.fpath_0x0038_0x00=/sys/bus/i2c/devices/97-0070/hwmon/
+hwmon_in.addr_0x0038_0x00=0
+hwmon_in.len_0x0038_0x00=8
+hwmon_in.bit_offset_0x0038_0x00=0
+hwmon_in.str_cons_0x0038_0x00=in3_input
+hwmon_in.mode_0x0038_0x01=str_constant
+hwmon_in.str_cons_0x0038_0x01=OSFP_VDD3.3V_B8
+hwmon_in.mode_0x0038_0x02=str_constant
+hwmon_in.str_cons_0x0038_0x02=xdpe12284c
+hwmon_in.mode_0x0038_0x03=constant
+hwmon_in.int_cons_0x0038_0x03=3630
+hwmon_in.mode_0x0038_0x05=constant
+hwmon_in.int_cons_0x0038_0x05=2970
+hwmon_in.mode_0x0038_0x08=constant
+hwmon_in.int_cons_0x0038_0x08=3300
+hwmon_in.mode_0x0038_0x07=constant
+hwmon_in.int_cons_0x0038_0x07=12
+hwmon_in.int_extra1_0x0038_0x00=1500
+
+# vol57
+hwmon_in.mode_0x0039_0x00=config
+hwmon_in.int_cons_0x0039_0x00=0
+hwmon_in.src_0x0039_0x00=file
+hwmon_in.frmt_0x0039_0x00=buf
+hwmon_in.fpath_0x0039_0x00=/sys/bus/i2c/devices/69-0070/hwmon/
+hwmon_in.addr_0x0039_0x00=0
+hwmon_in.len_0x0039_0x00=8
+hwmon_in.bit_offset_0x0039_0x00=
+hwmon_in.str_cons_0x0039_0x00=in3_input
+hwmon_in.mode_0x0039_0x01=str_constant
+hwmon_in.str_cons_0x0039_0x01=CPU_XDPE_VCCIN_V
+hwmon_in.mode_0x0039_0x02=str_constant
+hwmon_in.str_cons_0x0039_0x02=xdpe12284c
+hwmon_in.mode_0x0039_0x03=constant
+hwmon_in.int_cons_0x0039_0x03=2200
+hwmon_in.mode_0x0039_0x05=constant
+hwmon_in.int_cons_0x0039_0x05=1350
+hwmon_in.mode_0x0039_0x08=constant
+hwmon_in.int_cons_0x0039_0x08=1800
+hwmon_in.mode_0x0039_0x07=constant
+hwmon_in.int_cons_0x0039_0x07=12
+
+# vol58
+hwmon_in.mode_0x003a_0x00=config
+hwmon_in.int_cons_0x003a_0x00=0
+hwmon_in.src_0x003a_0x00=file
+hwmon_in.frmt_0x003a_0x00=buf
+hwmon_in.fpath_0x003a_0x00=/sys/bus/i2c/devices/69-0070/hwmon/
+hwmon_in.addr_0x003a_0x00=0
+hwmon_in.len_0x003a_0x00=8
+hwmon_in.bit_offset_0x003a_0x00=
+hwmon_in.str_cons_0x003a_0x00=in4_input
+hwmon_in.mode_0x003a_0x01=str_constant
+hwmon_in.str_cons_0x003a_0x01=CPU_XDPE_P1V8_V
+hwmon_in.mode_0x003a_0x02=str_constant
+hwmon_in.str_cons_0x003a_0x02=xdpe12284c
+hwmon_in.mode_0x003a_0x03=constant
+hwmon_in.int_cons_0x003a_0x03=1910
+hwmon_in.mode_0x003a_0x05=constant
+hwmon_in.int_cons_0x003a_0x05=1690
+hwmon_in.mode_0x003a_0x08=constant
+hwmon_in.int_cons_0x003a_0x08=1800
+hwmon_in.mode_0x003a_0x07=constant
+hwmon_in.int_cons_0x003a_0x07=12
+
+# vol59
+hwmon_in.mode_0x003b_0x00=config
+hwmon_in.int_cons_0x003b_0x00=0
+hwmon_in.src_0x003b_0x00=file
+hwmon_in.frmt_0x003b_0x00=buf
+hwmon_in.fpath_0x003b_0x00=/sys/bus/i2c/devices/69-006e/hwmon/
+hwmon_in.addr_0x003b_0x00=0
+hwmon_in.len_0x003b_0x00=8
+hwmon_in.bit_offset_0x003b_0x00=
+hwmon_in.str_cons_0x003b_0x00=in3_input
+hwmon_in.mode_0x003b_0x01=str_constant
+hwmon_in.str_cons_0x003b_0x01=CPU_XDPE_P1V05_V
+hwmon_in.mode_0x003b_0x02=str_constant
+hwmon_in.str_cons_0x003b_0x02=xdpe12284c
+hwmon_in.mode_0x003b_0x03=constant
+hwmon_in.int_cons_0x003b_0x03=1160
+hwmon_in.mode_0x003b_0x05=constant
+hwmon_in.int_cons_0x003b_0x05=954
+hwmon_in.mode_0x003b_0x08=constant
+hwmon_in.int_cons_0x003b_0x08=1060
+hwmon_in.mode_0x003b_0x07=constant
+hwmon_in.int_cons_0x003b_0x07=12
+
+# vol60
+hwmon_in.mode_0x003c_0x00=config
+hwmon_in.int_cons_0x003c_0x00=0
+hwmon_in.src_0x003c_0x00=file
+hwmon_in.frmt_0x003c_0x00=buf
+hwmon_in.fpath_0x003c_0x00=/sys/bus/i2c/devices/69-006e/hwmon/
+hwmon_in.addr_0x003c_0x00=0
+hwmon_in.len_0x003c_0x00=8
+hwmon_in.bit_offset_0x003c_0x00=
+hwmon_in.str_cons_0x003c_0x00=in4_input
+hwmon_in.mode_0x003c_0x01=str_constant
+hwmon_in.str_cons_0x003c_0x01=CPU_XDPE_VNN_PCH_V
+hwmon_in.mode_0x003c_0x02=str_constant
+hwmon_in.str_cons_0x003c_0x02=xdpe12284c
+hwmon_in.mode_0x003c_0x03=constant
+hwmon_in.int_cons_0x003c_0x03=1320
+hwmon_in.mode_0x003c_0x05=constant
+hwmon_in.int_cons_0x003c_0x05=540
+hwmon_in.mode_0x003c_0x08=constant
+hwmon_in.int_cons_0x003c_0x08=1000
+hwmon_in.mode_0x003c_0x07=constant
+hwmon_in.int_cons_0x003c_0x07=12
+
+# vol61
+hwmon_in.mode_0x003d_0x00=config
+hwmon_in.int_cons_0x003d_0x00=0
+hwmon_in.src_0x003d_0x00=file
+hwmon_in.frmt_0x003d_0x00=buf
+hwmon_in.fpath_0x003d_0x00=/sys/bus/i2c/devices/69-0068/hwmon/
+hwmon_in.addr_0x003d_0x00=0
+hwmon_in.len_0x003d_0x00=8
+hwmon_in.bit_offset_0x003d_0x00=
+hwmon_in.str_cons_0x003d_0x00=in3_input
+hwmon_in.mode_0x003d_0x01=str_constant
+hwmon_in.str_cons_0x003d_0x01=CPU_XDPE_VNN_NAC_V
+hwmon_in.mode_0x003d_0x02=str_constant
+hwmon_in.str_cons_0x003d_0x02=xdpe12284c
+hwmon_in.mode_0x003d_0x03=constant
+hwmon_in.int_cons_0x003d_0x03=1320
+hwmon_in.mode_0x003d_0x05=constant
+hwmon_in.int_cons_0x003d_0x05=540
+hwmon_in.mode_0x003d_0x08=constant
+hwmon_in.int_cons_0x003d_0x08=1000
+hwmon_in.mode_0x003d_0x07=constant
+hwmon_in.int_cons_0x003d_0x07=12
+
+# vol62
+hwmon_in.mode_0x003e_0x00=config
+hwmon_in.int_cons_0x003e_0x00=0
+hwmon_in.src_0x003e_0x00=file
+hwmon_in.frmt_0x003e_0x00=buf
+hwmon_in.fpath_0x003e_0x00=/sys/bus/i2c/devices/69-0068/hwmon/
+hwmon_in.addr_0x003e_0x00=0
+hwmon_in.len_0x003e_0x00=8
+hwmon_in.bit_offset_0x003e_0x00=0
+hwmon_in.str_cons_0x003e_0x00=in4_input
+hwmon_in.mode_0x003e_0x01=str_constant
+hwmon_in.str_cons_0x003e_0x01=CPU_XDPE_VCC_ANA_V
+hwmon_in.mode_0x003e_0x02=str_constant
+hwmon_in.str_cons_0x003e_0x02=xdpe12284c
+hwmon_in.mode_0x003e_0x03=constant
+hwmon_in.int_cons_0x003e_0x03=1100
+hwmon_in.mode_0x003e_0x05=constant
+hwmon_in.int_cons_0x003e_0x05=900
+hwmon_in.mode_0x003e_0x08=constant
+hwmon_in.int_cons_0x003e_0x08=1000
+hwmon_in.mode_0x003e_0x07=constant
+hwmon_in.int_cons_0x003e_0x07=12
+
+# vol63
+hwmon_in.mode_0x003f_0x00=config
+hwmon_in.int_cons_0x003f_0x00=0
+hwmon_in.src_0x003f_0x00=file
+hwmon_in.frmt_0x003f_0x00=buf
+hwmon_in.fpath_0x003f_0x00=/sys/bus/i2c/devices/69-005e/hwmon/
+hwmon_in.addr_0x003f_0x00=0
+hwmon_in.len_0x003f_0x00=8
+hwmon_in.bit_offset_0x003f_0x00=0
+hwmon_in.str_cons_0x003f_0x00=in3_input
+hwmon_in.mode_0x003f_0x01=str_constant
+hwmon_in.str_cons_0x003f_0x01=CPU_XDPE_P1V2_VDDQ_V
+hwmon_in.mode_0x003f_0x02=str_constant
+hwmon_in.str_cons_0x003f_0x02=xdpe12284c
+hwmon_in.mode_0x003f_0x03=constant
+hwmon_in.int_cons_0x003f_0x03=1280
+hwmon_in.mode_0x003f_0x05=constant
+hwmon_in.int_cons_0x003f_0x05=1120
+hwmon_in.mode_0x003f_0x08=constant
+hwmon_in.int_cons_0x003f_0x08=1200
+hwmon_in.mode_0x003f_0x07=constant
+hwmon_in.int_cons_0x003f_0x07=12
+
+# vol64
+hwmon_in.mode_0x0040_0x00=config
+hwmon_in.int_cons_0x0040_0x00=0
+hwmon_in.src_0x0040_0x00=file
+hwmon_in.frmt_0x0040_0x00=buf
+hwmon_in.fpath_0x0040_0x00=/sys/bus/i2c/devices/69-005f/hwmon/
+hwmon_in.addr_0x0040_0x00=0
+hwmon_in.len_0x0040_0x00=8
+hwmon_in.bit_offset_0x0040_0x00=
+hwmon_in.str_cons_0x0040_0x00=in1_input
+hwmon_in.mode_0x0040_0x01=str_constant
+hwmon_in.str_cons_0x0040_0x01=CPU_P1V05_V
+hwmon_in.mode_0x0040_0x02=str_constant
+hwmon_in.str_cons_0x0040_0x02=ucd90160
+hwmon_in.mode_0x0040_0x03=constant
+hwmon_in.int_cons_0x0040_0x03=1160
+hwmon_in.mode_0x0040_0x05=constant
+hwmon_in.int_cons_0x0040_0x05=954
+hwmon_in.mode_0x0040_0x08=constant
+hwmon_in.int_cons_0x0040_0x08=1060
+hwmon_in.mode_0x0040_0x07=constant
+hwmon_in.int_cons_0x0040_0x07=5
+
+# vol65
+hwmon_in.mode_0x0041_0x00=config
+hwmon_in.int_cons_0x0041_0x00=0
+hwmon_in.src_0x0041_0x00=file
+hwmon_in.frmt_0x0041_0x00=buf
+hwmon_in.fpath_0x0041_0x00=/sys/bus/i2c/devices/69-005f/hwmon/
+hwmon_in.addr_0x0041_0x00=0
+hwmon_in.len_0x0041_0x00=8
+hwmon_in.bit_offset_0x0041_0x00=
+hwmon_in.str_cons_0x0041_0x00=in2_input
+hwmon_in.mode_0x0041_0x01=str_constant
+hwmon_in.str_cons_0x0041_0x01=CPU_VCCIN_V
+hwmon_in.mode_0x0041_0x02=str_constant
+hwmon_in.str_cons_0x0041_0x02=ucd90160
+hwmon_in.mode_0x0041_0x03=constant
+hwmon_in.int_cons_0x0041_0x03=2200
+hwmon_in.mode_0x0041_0x05=constant
+hwmon_in.int_cons_0x0041_0x05=1350
+hwmon_in.mode_0x0041_0x08=constant
+hwmon_in.int_cons_0x0041_0x08=1800
+hwmon_in.mode_0x0041_0x07=constant
+hwmon_in.int_cons_0x0041_0x07=9
+
+# vol66
+hwmon_in.mode_0x0042_0x00=config
+hwmon_in.int_cons_0x0042_0x00=0
+hwmon_in.src_0x0042_0x00=file
+hwmon_in.frmt_0x0042_0x00=buf
+hwmon_in.fpath_0x0042_0x00=/sys/bus/i2c/devices/69-005f/hwmon/
+hwmon_in.addr_0x0042_0x00=0
+hwmon_in.len_0x0042_0x00=8
+hwmon_in.bit_offset_0x0042_0x00=
+hwmon_in.str_cons_0x0042_0x00=in3_input
+hwmon_in.mode_0x0042_0x01=str_constant
+hwmon_in.str_cons_0x0042_0x01=CPU_P1V2_VDDQ_V
+hwmon_in.mode_0x0042_0x02=str_constant
+hwmon_in.str_cons_0x0042_0x02=ucd90160
+hwmon_in.mode_0x0042_0x03=constant
+hwmon_in.int_cons_0x0042_0x03=1280
+hwmon_in.mode_0x0042_0x05=constant
+hwmon_in.int_cons_0x0042_0x05=1100
+hwmon_in.mode_0x0042_0x08=constant
+hwmon_in.int_cons_0x0042_0x08=1210
+hwmon_in.mode_0x0042_0x07=constant
+hwmon_in.int_cons_0x0042_0x07=6
+
+# vol67
+hwmon_in.mode_0x0043_0x00=config
+hwmon_in.int_cons_0x0043_0x00=0
+hwmon_in.src_0x0043_0x00=file
+hwmon_in.frmt_0x0043_0x00=buf
+hwmon_in.fpath_0x0043_0x00=/sys/bus/i2c/devices/69-005f/hwmon/
+hwmon_in.addr_0x0043_0x00=0
+hwmon_in.len_0x0043_0x00=8
+hwmon_in.bit_offset_0x0043_0x00=
+hwmon_in.str_cons_0x0043_0x00=in4_input
+hwmon_in.mode_0x0043_0x01=str_constant
+hwmon_in.str_cons_0x0043_0x01=CPU_P1V8_V
+hwmon_in.mode_0x0043_0x02=str_constant
+hwmon_in.str_cons_0x0043_0x02=ucd90160
+hwmon_in.mode_0x0043_0x03=constant
+hwmon_in.int_cons_0x0043_0x03=1910
+hwmon_in.mode_0x0043_0x05=constant
+hwmon_in.int_cons_0x0043_0x05=169-
+hwmon_in.mode_0x0043_0x08=constant
+hwmon_in.int_cons_0x0043_0x08=1800
+hwmon_in.mode_0x0043_0x07=constant
+hwmon_in.int_cons_0x0043_0x07=9
+
+# vol68
+hwmon_in.mode_0x0044_0x00=config
+hwmon_in.int_cons_0x0044_0x00=0
+hwmon_in.src_0x0044_0x00=file
+hwmon_in.frmt_0x0044_0x00=buf
+hwmon_in.fpath_0x0044_0x00=/sys/bus/i2c/devices/69-005f/hwmon/
+hwmon_in.addr_0x0044_0x00=0
+hwmon_in.len_0x0044_0x00=8
+hwmon_in.bit_offset_0x0044_0x00=
+hwmon_in.str_cons_0x0044_0x00=in5_input
+hwmon_in.mode_0x0044_0x01=str_constant
+hwmon_in.str_cons_0x0044_0x01=CPU_P0V6_VTT_V
+hwmon_in.mode_0x0044_0x02=str_constant
+hwmon_in.str_cons_0x0044_0x02=ucd90160
+hwmon_in.mode_0x0044_0x03=constant
+hwmon_in.int_cons_0x0044_0x03=682
+hwmon_in.mode_0x0044_0x05=constant
+hwmon_in.int_cons_0x0044_0x05=558
+hwmon_in.mode_0x0044_0x08=constant
+hwmon_in.int_cons_0x0044_0x08=615
+hwmon_in.mode_0x0044_0x07=constant
+hwmon_in.int_cons_0x0044_0x07=3
+
+# vol69
+hwmon_in.mode_0x0045_0x00=config
+hwmon_in.int_cons_0x0045_0x00=0
+hwmon_in.src_0x0045_0x00=file
+hwmon_in.frmt_0x0045_0x00=buf
+hwmon_in.fpath_0x0045_0x00=/sys/bus/i2c/devices/69-005f/hwmon/
+hwmon_in.addr_0x0045_0x00=0
+hwmon_in.len_0x0045_0x00=8
+hwmon_in.bit_offset_0x0045_0x00=
+hwmon_in.str_cons_0x0045_0x00=in6_input
+hwmon_in.mode_0x0045_0x01=str_constant
+hwmon_in.str_cons_0x0045_0x01=CPU_VNN_PCH_V
+hwmon_in.mode_0x0045_0x02=str_constant
+hwmon_in.str_cons_0x0045_0x02=ucd90160
+hwmon_in.mode_0x0045_0x03=constant
+hwmon_in.int_cons_0x0045_0x03=1320
+hwmon_in.mode_0x0045_0x05=constant
+hwmon_in.int_cons_0x0045_0x05=540
+hwmon_in.mode_0x0045_0x08=constant
+hwmon_in.int_cons_0x0045_0x08=1000
+hwmon_in.mode_0x0045_0x07=constant
+hwmon_in.int_cons_0x0045_0x07=5
+
+# vol70
+hwmon_in.mode_0x0046_0x00=config
+hwmon_in.int_cons_0x0046_0x00=0
+hwmon_in.src_0x0046_0x00=file
+hwmon_in.frmt_0x0046_0x00=buf
+hwmon_in.fpath_0x0046_0x00=/sys/bus/i2c/devices/69-005f/hwmon/
+hwmon_in.addr_0x0046_0x00=0
+hwmon_in.len_0x0046_0x00=8
+hwmon_in.bit_offset_0x0046_0x00=
+hwmon_in.str_cons_0x0046_0x00=in7_input
+hwmon_in.mode_0x0046_0x01=str_constant
+hwmon_in.str_cons_0x0046_0x01=CPU_VNN_NAC_V
+hwmon_in.mode_0x0046_0x02=str_constant
+hwmon_in.str_cons_0x0046_0x02=ucd90160
+hwmon_in.mode_0x0046_0x03=constant
+hwmon_in.int_cons_0x0046_0x03=1320
+hwmon_in.mode_0x0046_0x05=constant
+hwmon_in.int_cons_0x0046_0x05=540
+hwmon_in.mode_0x0046_0x08=constant
+hwmon_in.int_cons_0x0046_0x08=1000
+hwmon_in.mode_0x0046_0x07=constant
+hwmon_in.int_cons_0x0046_0x07=5
+
+# vol71
+hwmon_in.mode_0x0047_0x00=config
+hwmon_in.int_cons_0x0047_0x00=0
+hwmon_in.src_0x0047_0x00=file
+hwmon_in.frmt_0x0047_0x00=buf
+hwmon_in.fpath_0x0047_0x00=/sys/bus/i2c/devices/69-005f/hwmon/
+hwmon_in.addr_0x0047_0x00=0
+hwmon_in.len_0x0047_0x00=8
+hwmon_in.bit_offset_0x0047_0x00=
+hwmon_in.str_cons_0x0047_0x00=in8_input
+hwmon_in.mode_0x0047_0x01=str_constant
+hwmon_in.str_cons_0x0047_0x01=CPU_P2V5_VPP_V
+hwmon_in.mode_0x0047_0x02=str_constant
+hwmon_in.str_cons_0x0047_0x02=ucd90160
+hwmon_in.mode_0x0047_0x03=constant
+hwmon_in.int_cons_0x0047_0x03=2750
+hwmon_in.mode_0x0047_0x05=constant
+hwmon_in.int_cons_0x0047_0x05=2250
+hwmon_in.mode_0x0047_0x08=constant
+hwmon_in.int_cons_0x0047_0x08=2500
+hwmon_in.mode_0x0047_0x07=constant
+hwmon_in.int_cons_0x0047_0x07=12
+
+# vol72
+hwmon_in.mode_0x0048_0x00=config
+hwmon_in.int_cons_0x0048_0x00=0
+hwmon_in.src_0x0048_0x00=file
+hwmon_in.frmt_0x0048_0x00=buf
+hwmon_in.fpath_0x0048_0x00=/sys/bus/i2c/devices/69-005f/hwmon/
+hwmon_in.addr_0x0048_0x00=0
+hwmon_in.len_0x0048_0x00=8
+hwmon_in.bit_offset_0x0048_0x00=
+hwmon_in.str_cons_0x0048_0x00=in9_input
+hwmon_in.mode_0x0048_0x01=str_constant
+hwmon_in.str_cons_0x0048_0x01=CPU_VCC_ANA_V
+hwmon_in.mode_0x0048_0x02=str_constant
+hwmon_in.str_cons_0x0048_0x02=ucd90160
+hwmon_in.mode_0x0048_0x03=constant
+hwmon_in.int_cons_0x0048_0x03=1100
+hwmon_in.mode_0x0048_0x05=constant
+hwmon_in.int_cons_0x0048_0x05=900
+hwmon_in.mode_0x0048_0x08=constant
+hwmon_in.int_cons_0x0048_0x08=1000
+hwmon_in.mode_0x0048_0x07=constant
+hwmon_in.int_cons_0x0048_0x07=5
+
+# vol73
+hwmon_in.mode_0x0049_0x00=config
+hwmon_in.int_cons_0x0049_0x00=0
+hwmon_in.src_0x0049_0x00=file
+hwmon_in.frmt_0x0049_0x00=buf
+hwmon_in.fpath_0x0049_0x00=/sys/bus/i2c/devices/69-005f/hwmon/
+hwmon_in.addr_0x0049_0x00=0
+hwmon_in.len_0x0049_0x00=8
+hwmon_in.bit_offset_0x0049_0x00=
+hwmon_in.str_cons_0x0049_0x00=in10_input
+hwmon_in.mode_0x0049_0x01=str_constant
+hwmon_in.str_cons_0x0049_0x01=CPU_P3V3_STBY_V
+hwmon_in.mode_0x0049_0x02=str_constant
+hwmon_in.str_cons_0x0049_0x02=ucd90160
+hwmon_in.mode_0x0049_0x03=constant
+hwmon_in.int_cons_0x0049_0x03=3630
+hwmon_in.mode_0x0049_0x05=constant
+hwmon_in.int_cons_0x0049_0x05=2970
+hwmon_in.mode_0x0049_0x08=constant
+hwmon_in.int_cons_0x0049_0x08=3300
+hwmon_in.mode_0x0049_0x07=constant
+hwmon_in.int_cons_0x0049_0x07=16
+
+# vol74
+hwmon_in.mode_0x004a_0x00=config
+hwmon_in.int_cons_0x004a_0x00=0
+hwmon_in.src_0x004a_0x00=file
+hwmon_in.frmt_0x004a_0x00=buf
+hwmon_in.fpath_0x004a_0x00=/sys/bus/i2c/devices/69-005f/hwmon/
+hwmon_in.addr_0x004a_0x00=0
+hwmon_in.len_0x004a_0x00=8
+hwmon_in.bit_offset_0x004a_0x00=
+hwmon_in.str_cons_0x004a_0x00=in11_input
+hwmon_in.mode_0x004a_0x01=str_constant
+hwmon_in.str_cons_0x004a_0x01=CPU_P5V_AUX_V
+hwmon_in.mode_0x004a_0x02=str_constant
+hwmon_in.str_cons_0x004a_0x02=ucd90160
+hwmon_in.mode_0x004a_0x03=constant
+hwmon_in.int_cons_0x004a_0x03=5750
+hwmon_in.mode_0x004a_0x05=constant
+hwmon_in.int_cons_0x004a_0x05=4000
+hwmon_in.mode_0x004a_0x08=constant
+hwmon_in.int_cons_0x004a_0x08=5000
+hwmon_in.mode_0x004a_0x07=constant
+hwmon_in.int_cons_0x004a_0x07=25
+
+# vol75
+hwmon_in.mode_0x004b_0x00=config
+hwmon_in.int_cons_0x004b_0x00=0
+hwmon_in.src_0x004b_0x00=file
+hwmon_in.frmt_0x004b_0x00=buf
+hwmon_in.fpath_0x004b_0x00=/sys/bus/i2c/devices/69-005f/hwmon/
+hwmon_in.addr_0x004b_0x00=0
+hwmon_in.len_0x004b_0x00=8
+hwmon_in.bit_offset_0x004b_0x00=
+hwmon_in.str_cons_0x004b_0x00=in12_input
+hwmon_in.mode_0x004b_0x01=str_constant
+hwmon_in.str_cons_0x004b_0x01=CPU_P1V8_AUX_NAC_V
+hwmon_in.mode_0x004b_0x02=str_constant
+hwmon_in.str_cons_0x004b_0x02=ucd90160
+hwmon_in.mode_0x004b_0x03=constant
+hwmon_in.int_cons_0x004b_0x03=1910
+hwmon_in.mode_0x004b_0x05=constant
+hwmon_in.int_cons_0x004b_0x05=1690
+hwmon_in.mode_0x004b_0x08=constant
+hwmon_in.int_cons_0x004b_0x08=1800
+hwmon_in.mode_0x004b_0x07=constant
+hwmon_in.int_cons_0x004b_0x07=9
+
+# vol76
+hwmon_in.mode_0x004c_0x00=config
+hwmon_in.int_cons_0x004c_0x00=0
+hwmon_in.src_0x004c_0x00=file
+hwmon_in.frmt_0x004c_0x00=buf
+hwmon_in.fpath_0x004c_0x00=/sys/bus/i2c/devices/69-005f/hwmon/
+hwmon_in.addr_0x004c_0x00=0
+hwmon_in.len_0x004c_0x00=8
+hwmon_in.bit_offset_0x004c_0x00=
+hwmon_in.str_cons_0x004c_0x00=in13_input
+hwmon_in.mode_0x004c_0x01=str_constant
+hwmon_in.str_cons_0x004c_0x01=CPU_P3V3_AUX_V
+hwmon_in.mode_0x004c_0x02=str_constant
+hwmon_in.str_cons_0x004c_0x02=ucd90160
+hwmon_in.mode_0x004c_0x03=constant
+hwmon_in.int_cons_0x004c_0x03=3630
+hwmon_in.mode_0x004c_0x05=constant
+hwmon_in.int_cons_0x004c_0x05=2970
+hwmon_in.mode_0x004c_0x08=constant
+hwmon_in.int_cons_0x004c_0x08=3300
+hwmon_in.mode_0x004c_0x07=constant
+hwmon_in.int_cons_0x004c_0x07=16
+
+# vol77  FANA_VDD3.3V
+hwmon_in.mode_0x004d_0x00=config
+hwmon_in.int_cons_0x004d_0x00=0
+hwmon_in.src_0x004d_0x00=cpld
+hwmon_in.frmt_0x004d_0x00=num_bytes
+hwmon_in.addr_0x004d_0x00=0x000600e8
+hwmon_in.len_0x004d_0x00=2
+hwmon_in.int_extra1_0x004d_0x00=0x000600e8
+hwmon_in.int_extra2_0x004d_0x00=2000
+hwmon_in.int_extra3_0x004d_0x00=1
+
+hwmon_in.mode_0x004d_0x01=str_constant
+hwmon_in.str_cons_0x004d_0x01=FANA_VDD3.3V
+
+hwmon_in.mode_0x004d_0x02=str_constant
+hwmon_in.str_cons_0x004d_0x02=cpld
+
+hwmon_in.mode_0x004d_0x03=str_constant
+hwmon_in.str_cons_0x004d_0x03=3630
+
+hwmon_in.mode_0x004d_0x05=str_constant
+hwmon_in.str_cons_0x004d_0x05=2970
+
+# vol78 FANB_VDD3.3V
+hwmon_in.mode_0x004e_0x00=config
+hwmon_in.int_cons_0x004e_0x00=0
+hwmon_in.src_0x004e_0x00=cpld
+hwmon_in.frmt_0x004e_0x00=num_bytes
+hwmon_in.addr_0x004e_0x00=0x000600ea
+hwmon_in.len_0x004e_0x00=2
+hwmon_in.int_extra1_0x004e_0x00=0x000600ea
+hwmon_in.int_extra2_0x004e_0x00=2000
+hwmon_in.int_extra3_0x004e_0x00=1
+
+hwmon_in.mode_0x004e_0x01=str_constant
+hwmon_in.str_cons_0x004e_0x01=FANB_VDD3.3V
+
+hwmon_in.mode_0x004e_0x02=str_constant
+hwmon_in.str_cons_0x004e_0x02=cpld
+
+hwmon_in.mode_0x004e_0x03=str_constant
+hwmon_in.str_cons_0x004e_0x03=3630
+
+hwmon_in.mode_0x004e_0x05=str_constant
+hwmon_in.str_cons_0x004e_0x05=2970
+
+# vol79 FANC_VDD3.3V
+hwmon_in.mode_0x004f_0x00=config
+hwmon_in.int_cons_0x004f_0x00=0
+hwmon_in.src_0x004f_0x00=cpld
+hwmon_in.frmt_0x004f_0x00=num_bytes
+hwmon_in.addr_0x004f_0x00=0x000600ec
+hwmon_in.len_0x004f_0x00=2
+hwmon_in.int_extra1_0x004f_0x00=0x000600ec
+hwmon_in.int_extra2_0x004f_0x00=2000
+hwmon_in.int_extra3_0x004f_0x00=1
+
+hwmon_in.mode_0x004f_0x01=str_constant
+hwmon_in.str_cons_0x004f_0x01=FANC_VDD3.3V
+
+hwmon_in.mode_0x004f_0x02=str_constant
+hwmon_in.str_cons_0x004f_0x02=cpld
+
+hwmon_in.mode_0x004f_0x03=str_constant
+hwmon_in.str_cons_0x004f_0x03=3630
+
+hwmon_in.mode_0x004f_0x05=str_constant
+hwmon_in.str_cons_0x004f_0x05=2970
+
+# vol80 FAND_VDD3.3V
+hwmon_in.mode_0x0050_0x00=config
+hwmon_in.int_cons_0x0050_0x00=0
+hwmon_in.src_0x0050_0x00=cpld
+hwmon_in.frmt_0x0050_0x00=num_bytes
+hwmon_in.addr_0x0050_0x00=0x000600ee
+hwmon_in.len_0x0050_0x00=2
+hwmon_in.int_extra1_0x0050_0x00=0x000600ee
+hwmon_in.int_extra2_0x0050_0x00=2000
+hwmon_in.int_extra3_0x0050_0x00=1
+
+hwmon_in.mode_0x0050_0x01=str_constant
+hwmon_in.str_cons_0x0050_0x01=FAND_VDD3.3V
+
+hwmon_in.mode_0x0050_0x02=str_constant
+hwmon_in.str_cons_0x0050_0x02=cpld
+
+hwmon_in.mode_0x0050_0x03=str_constant
+hwmon_in.str_cons_0x0050_0x03=3630
+
+hwmon_in.mode_0x0050_0x05=str_constant
+hwmon_in.str_cons_0x0050_0x05=2970
+
+# vol81 FAN_VDD12V_1
+hwmon_in.mode_0x0051_0x00=config
+hwmon_in.int_cons_0x0051_0x00=0
+hwmon_in.src_0x0051_0x00=cpld
+hwmon_in.frmt_0x0051_0x00=num_bytes
+hwmon_in.addr_0x0051_0x00=0x000600e0
+hwmon_in.len_0x0051_0x00=2
+hwmon_in.int_extra1_0x0051_0x00=0x000600e0
+hwmon_in.int_extra2_0x0051_0x00=7070
+hwmon_in.int_extra3_0x0051_0x00=1
+
+hwmon_in.mode_0x0051_0x01=str_constant
+hwmon_in.str_cons_0x0051_0x01=FAN_VDD12V_1
+
+hwmon_in.mode_0x0051_0x02=str_constant
+hwmon_in.str_cons_0x0051_0x02=cpld
+
+hwmon_in.mode_0x0051_0x03=str_constant
+hwmon_in.str_cons_0x0051_0x03=13200
+
+hwmon_in.mode_0x0051_0x05=str_constant
+hwmon_in.str_cons_0x0051_0x05=10800
+
+# vol82 FAN_VDD12V_2
+hwmon_in.mode_0x0052_0x00=config
+hwmon_in.int_cons_0x0052_0x00=0
+hwmon_in.src_0x0052_0x00=cpld
+hwmon_in.frmt_0x0052_0x00=num_bytes
+hwmon_in.addr_0x0052_0x00=0x000600e2
+hwmon_in.len_0x0052_0x00=2
+hwmon_in.int_extra1_0x0052_0x00=0x000600e2
+hwmon_in.int_extra2_0x0052_0x00=7070
+hwmon_in.int_extra3_0x0052_0x00=1
+
+hwmon_in.mode_0x0052_0x01=str_constant
+hwmon_in.str_cons_0x0052_0x01=FAN_VDD12V_2
+
+hwmon_in.mode_0x0052_0x02=str_constant
+hwmon_in.str_cons_0x0052_0x02=cpld
+
+hwmon_in.mode_0x0052_0x03=str_constant
+hwmon_in.str_cons_0x0052_0x03=13200
+
+hwmon_in.mode_0x0052_0x05=str_constant
+hwmon_in.str_cons_0x0052_0x05=10800
+
+# vol83 FAN_VDD12V_3
+hwmon_in.mode_0x0053_0x00=config
+hwmon_in.int_cons_0x0053_0x00=0
+hwmon_in.src_0x0053_0x00=cpld
+hwmon_in.frmt_0x0053_0x00=num_bytes
+hwmon_in.addr_0x0053_0x00=0x000600e4
+hwmon_in.len_0x0053_0x00=2
+hwmon_in.int_extra1_0x0053_0x00=0x000600e4
+hwmon_in.int_extra2_0x0053_0x00=7070
+hwmon_in.int_extra3_0x0053_0x00=1
+
+hwmon_in.mode_0x0053_0x01=str_constant
+hwmon_in.str_cons_0x0053_0x01=FAN_VDD12V_3
+
+hwmon_in.mode_0x0053_0x02=str_constant
+hwmon_in.str_cons_0x0053_0x02=cpld
+
+hwmon_in.mode_0x0053_0x03=str_constant
+hwmon_in.str_cons_0x0053_0x03=13200
+
+hwmon_in.mode_0x0053_0x05=str_constant
+hwmon_in.str_cons_0x0053_0x05=10800
+
+# vol84 FAN_VDD12V_4
+hwmon_in.mode_0x0054_0x00=config
+hwmon_in.int_cons_0x0054_0x00=0
+hwmon_in.src_0x0054_0x00=cpld
+hwmon_in.frmt_0x0054_0x00=num_bytes
+hwmon_in.addr_0x0054_0x00=0x000600e6
+hwmon_in.len_0x0054_0x00=2
+hwmon_in.int_extra1_0x0054_0x00=0x000600e6
+hwmon_in.int_extra2_0x0054_0x00=7070
+hwmon_in.int_extra3_0x0054_0x00=1
+
+hwmon_in.mode_0x0054_0x01=str_constant
+hwmon_in.str_cons_0x0054_0x01=FAN_VDD12V_4
+
+hwmon_in.mode_0x0054_0x02=str_constant
+hwmon_in.str_cons_0x0054_0x02=cpld
+
+hwmon_in.mode_0x0054_0x03=str_constant
+hwmon_in.str_cons_0x0054_0x03=13200
+
+hwmon_in.mode_0x0054_0x05=str_constant
+hwmon_in.str_cons_0x0054_0x05=10800
+
+# vol85
+hwmon_in.mode_0x0055_0x00=config
+hwmon_in.int_cons_0x0055_0x00=0
+hwmon_in.src_0x0055_0x00=cpld
+hwmon_in.frmt_0x0055_0x00=num_bytes
+hwmon_in.addr_0x0055_0x00=0x00040092
+hwmon_in.len_0x0055_0x00=2
+hwmon_in.int_extra1_0x0055_0x00=0x00040092
+hwmon_in.int_extra2_0x0055_0x00=2000
+hwmon_in.int_extra3_0x0055_0x00=1
+
+hwmon_in.mode_0x0055_0x01=str_constant
+hwmon_in.str_cons_0x0055_0x01=OSFP_CPLD_VDD3.3V_A1
+
+hwmon_in.mode_0x0055_0x02=str_constant
+hwmon_in.str_cons_0x0055_0x02=cpld
+
+hwmon_in.mode_0x0055_0x03=str_constant
+hwmon_in.str_cons_0x0055_0x03=3630
+
+hwmon_in.mode_0x0055_0x05=str_constant
+hwmon_in.str_cons_0x0055_0x05=2970
+
+# vol86
+hwmon_in.mode_0x0056_0x00=config
+hwmon_in.int_cons_0x0056_0x00=0
+hwmon_in.src_0x0056_0x00=cpld
+hwmon_in.frmt_0x0056_0x00=num_bytes
+hwmon_in.addr_0x0056_0x00=0x00040094
+hwmon_in.len_0x0056_0x00=2
+hwmon_in.int_extra1_0x0056_0x00=0x00040094
+hwmon_in.int_extra2_0x0056_0x00=2000
+hwmon_in.int_extra3_0x0056_0x00=1
+
+hwmon_in.mode_0x0056_0x01=str_constant
+hwmon_in.str_cons_0x0056_0x01=OSFP_CPLD_VDD3.3V_A2
+
+hwmon_in.mode_0x0056_0x02=str_constant
+hwmon_in.str_cons_0x0056_0x02=cpld
+
+hwmon_in.mode_0x0056_0x03=str_constant
+hwmon_in.str_cons_0x0056_0x03=3630
+
+hwmon_in.mode_0x0056_0x05=str_constant
+hwmon_in.str_cons_0x0056_0x05=2970
+
+# vol87
+hwmon_in.mode_0x0057_0x00=config
+hwmon_in.int_cons_0x0057_0x00=0
+hwmon_in.src_0x0057_0x00=cpld
+hwmon_in.frmt_0x0057_0x00=num_bytes
+hwmon_in.addr_0x0057_0x00=0x00040096
+hwmon_in.len_0x0057_0x00=2
+hwmon_in.int_extra1_0x0057_0x00=0x00040096
+hwmon_in.int_extra2_0x0057_0x00=2000
+hwmon_in.int_extra3_0x0057_0x00=1
+
+hwmon_in.mode_0x0057_0x01=str_constant
+hwmon_in.str_cons_0x0057_0x01=OSFP_CPLD_VDD3.3V_A3
+
+hwmon_in.mode_0x0057_0x02=str_constant
+hwmon_in.str_cons_0x0057_0x02=cpld
+
+hwmon_in.mode_0x0057_0x03=str_constant
+hwmon_in.str_cons_0x0057_0x03=3630
+
+hwmon_in.mode_0x0057_0x05=str_constant
+hwmon_in.str_cons_0x0057_0x05=2970
+
+# vol88
+hwmon_in.mode_0x0058_0x00=config
+hwmon_in.int_cons_0x0058_0x00=0
+hwmon_in.src_0x0058_0x00=cpld
+hwmon_in.frmt_0x0058_0x00=num_bytes
+hwmon_in.addr_0x0058_0x00=0x00040098
+hwmon_in.len_0x0058_0x00=2
+hwmon_in.int_extra1_0x0058_0x00=0x00040098
+hwmon_in.int_extra2_0x0058_0x00=2000
+hwmon_in.int_extra3_0x0058_0x00=1
+
+hwmon_in.mode_0x0058_0x01=str_constant
+hwmon_in.str_cons_0x0058_0x01=OSFP_CPLD_VDD3.3V_A4
+
+hwmon_in.mode_0x0058_0x02=str_constant
+hwmon_in.str_cons_0x0058_0x02=cpld
+
+hwmon_in.mode_0x0058_0x03=str_constant
+hwmon_in.str_cons_0x0058_0x03=3630
+
+hwmon_in.mode_0x0058_0x05=str_constant
+hwmon_in.str_cons_0x0058_0x05=2970
+
+# vol89
+hwmon_in.mode_0x0059_0x00=config
+hwmon_in.int_cons_0x0059_0x00=0
+hwmon_in.src_0x0059_0x00=cpld
+hwmon_in.frmt_0x0059_0x00=num_bytes
+hwmon_in.addr_0x0059_0x00=0x0004009a
+hwmon_in.len_0x0059_0x00=2
+hwmon_in.int_extra1_0x0059_0x00=0x0004009a
+hwmon_in.int_extra2_0x0059_0x00=2000
+hwmon_in.int_extra3_0x0059_0x00=1
+
+hwmon_in.mode_0x0059_0x01=str_constant
+hwmon_in.str_cons_0x0059_0x01=OSFP_CPLD_VDD3.3V_A5
+
+hwmon_in.mode_0x0059_0x02=str_constant
+hwmon_in.str_cons_0x0059_0x02=cpld
+
+hwmon_in.mode_0x0059_0x03=str_constant
+hwmon_in.str_cons_0x0059_0x03=3630
+
+hwmon_in.mode_0x0059_0x05=str_constant
+hwmon_in.str_cons_0x0059_0x05=2970
+
+# vol90
+hwmon_in.mode_0x005a_0x00=config
+hwmon_in.int_cons_0x005a_0x00=0
+hwmon_in.src_0x005a_0x00=cpld
+hwmon_in.frmt_0x005a_0x00=num_bytes
+hwmon_in.addr_0x005a_0x00=0x0004009c
+hwmon_in.len_0x005a_0x00=2
+hwmon_in.int_extra1_0x005a_0x00=0x0004009c
+hwmon_in.int_extra2_0x005a_0x00=2000
+hwmon_in.int_extra3_0x005a_0x00=1
+
+hwmon_in.mode_0x005a_0x01=str_constant
+hwmon_in.str_cons_0x005a_0x01=OSFP_CPLD_VDD3.3V_A6
+
+hwmon_in.mode_0x005a_0x02=str_constant
+hwmon_in.str_cons_0x005a_0x02=cpld
+
+hwmon_in.mode_0x005a_0x03=str_constant
+hwmon_in.str_cons_0x005a_0x03=3630
+
+hwmon_in.mode_0x005a_0x05=str_constant
+hwmon_in.str_cons_0x005a_0x05=2970
+
+# vol91
+hwmon_in.mode_0x005b_0x00=config
+hwmon_in.int_cons_0x005b_0x00=0
+hwmon_in.src_0x005b_0x00=cpld
+hwmon_in.frmt_0x005b_0x00=num_bytes
+hwmon_in.addr_0x005b_0x00=0x0004009e
+hwmon_in.len_0x005b_0x00=2
+hwmon_in.int_extra1_0x005b_0x00=0x0004009e
+hwmon_in.int_extra2_0x005b_0x00=2000
+hwmon_in.int_extra3_0x005b_0x00=1
+
+hwmon_in.mode_0x005b_0x01=str_constant
+hwmon_in.str_cons_0x005b_0x01=OSFP_CPLD_VDD3.3V_A7
+
+hwmon_in.mode_0x005b_0x02=str_constant
+hwmon_in.str_cons_0x005b_0x02=cpld
+
+hwmon_in.mode_0x005b_0x03=str_constant
+hwmon_in.str_cons_0x005b_0x03=3630
+
+hwmon_in.mode_0x005b_0x05=str_constant
+hwmon_in.str_cons_0x005b_0x05=2970
+
+# vol92
+hwmon_in.mode_0x005c_0x00=config
+hwmon_in.int_cons_0x005c_0x00=0
+hwmon_in.src_0x005c_0x00=cpld
+hwmon_in.frmt_0x005c_0x00=num_bytes
+hwmon_in.addr_0x005c_0x00=0x000400a0
+hwmon_in.len_0x005c_0x00=2
+hwmon_in.int_extra1_0x005c_0x00=0x000400a0
+hwmon_in.int_extra2_0x005c_0x00=2000
+hwmon_in.int_extra3_0x005c_0x00=1
+
+hwmon_in.mode_0x005c_0x01=str_constant
+hwmon_in.str_cons_0x005c_0x01=OSFP_CPLD_VDD3.3V_A8
+
+hwmon_in.mode_0x005c_0x02=str_constant
+hwmon_in.str_cons_0x005c_0x02=cpld
+
+hwmon_in.mode_0x005c_0x03=str_constant
+hwmon_in.str_cons_0x005c_0x03=3630
+
+hwmon_in.mode_0x005c_0x05=str_constant
+hwmon_in.str_cons_0x005c_0x05=2970
+
+# vol93
+hwmon_in.mode_0x005d_0x00=config
+hwmon_in.int_cons_0x005d_0x00=0
+hwmon_in.src_0x005d_0x00=cpld
+hwmon_in.frmt_0x005d_0x00=num_bytes
+hwmon_in.addr_0x005d_0x00=0x000400a2
+hwmon_in.len_0x005d_0x00=2
+hwmon_in.int_extra1_0x005d_0x00=0x000400a2
+hwmon_in.int_extra2_0x005d_0x00=2000
+hwmon_in.int_extra3_0x005d_0x00=1
+
+hwmon_in.mode_0x005d_0x01=str_constant
+hwmon_in.str_cons_0x005d_0x01=OSFP_CPLD_VDD3.3V_B1
+
+hwmon_in.mode_0x005d_0x02=str_constant
+hwmon_in.str_cons_0x005d_0x02=cpld
+
+hwmon_in.mode_0x005d_0x03=str_constant
+hwmon_in.str_cons_0x005d_0x03=3630
+
+hwmon_in.mode_0x005d_0x05=str_constant
+hwmon_in.str_cons_0x005d_0x05=2970
+
+# vol94
+hwmon_in.mode_0x005e_0x00=config
+hwmon_in.int_cons_0x005e_0x00=0
+hwmon_in.src_0x005e_0x00=cpld
+hwmon_in.frmt_0x005e_0x00=num_bytes
+hwmon_in.addr_0x005e_0x00=0x000400a4
+hwmon_in.len_0x005e_0x00=2
+hwmon_in.int_extra1_0x005e_0x00=0x000400a4
+hwmon_in.int_extra2_0x005e_0x00=2000
+hwmon_in.int_extra3_0x005e_0x00=1
+
+hwmon_in.mode_0x005e_0x01=str_constant
+hwmon_in.str_cons_0x005e_0x01=OSFP_CPLD_VDD3.3V_B2
+
+hwmon_in.mode_0x005e_0x02=str_constant
+hwmon_in.str_cons_0x005e_0x02=cpld
+
+hwmon_in.mode_0x005e_0x03=str_constant
+hwmon_in.str_cons_0x005e_0x03=3630
+
+hwmon_in.mode_0x005e_0x05=str_constant
+hwmon_in.str_cons_0x005e_0x05=2970
+
+# vol95
+hwmon_in.mode_0x005f_0x00=config
+hwmon_in.int_cons_0x005f_0x00=0
+hwmon_in.src_0x005f_0x00=cpld
+hwmon_in.frmt_0x005f_0x00=num_bytes
+hwmon_in.addr_0x005f_0x00=0x000400a6
+hwmon_in.len_0x005f_0x00=2
+hwmon_in.int_extra1_0x005f_0x00=0x000400a6
+hwmon_in.int_extra2_0x005f_0x00=2000
+hwmon_in.int_extra3_0x005f_0x00=1
+
+hwmon_in.mode_0x005f_0x01=str_constant
+hwmon_in.str_cons_0x005f_0x01=OSFP_CPLD_VDD3.3V_B3
+
+hwmon_in.mode_0x005f_0x02=str_constant
+hwmon_in.str_cons_0x005f_0x02=cpld
+
+hwmon_in.mode_0x005f_0x03=str_constant
+hwmon_in.str_cons_0x005f_0x03=3630
+
+hwmon_in.mode_0x005f_0x05=str_constant
+hwmon_in.str_cons_0x005f_0x05=2970
+
+# vol96
+hwmon_in.mode_0x0060_0x00=config
+hwmon_in.int_cons_0x0060_0x00=0
+hwmon_in.src_0x0060_0x00=cpld
+hwmon_in.frmt_0x0060_0x00=num_bytes
+hwmon_in.addr_0x0060_0x00=0x000400a8
+hwmon_in.len_0x0060_0x00=2
+hwmon_in.int_extra1_0x0060_0x00=0x000400a8
+hwmon_in.int_extra2_0x0060_0x00=2000
+hwmon_in.int_extra3_0x0060_0x00=1
+
+hwmon_in.mode_0x0060_0x01=str_constant
+hwmon_in.str_cons_0x0060_0x01=OSFP_CPLD_VDD3.3V_B4
+
+hwmon_in.mode_0x0060_0x02=str_constant
+hwmon_in.str_cons_0x0060_0x02=cpld
+
+hwmon_in.mode_0x0060_0x03=str_constant
+hwmon_in.str_cons_0x0060_0x03=3630
+
+hwmon_in.mode_0x0060_0x05=str_constant
+hwmon_in.str_cons_0x0060_0x05=2970
+
+# vol97
+hwmon_in.mode_0x0061_0x00=config
+hwmon_in.int_cons_0x0061_0x00=0
+hwmon_in.src_0x0061_0x00=cpld
+hwmon_in.frmt_0x0061_0x00=num_bytes
+hwmon_in.addr_0x0061_0x00=0x000400aa
+hwmon_in.len_0x0061_0x00=2
+hwmon_in.int_extra1_0x0061_0x00=0x000400aa
+hwmon_in.int_extra2_0x0061_0x00=2000
+hwmon_in.int_extra3_0x0061_0x00=1
+
+hwmon_in.mode_0x0061_0x01=str_constant
+hwmon_in.str_cons_0x0061_0x01=OSFP_CPLD_VDD3.3V_B5
+
+hwmon_in.mode_0x0061_0x02=str_constant
+hwmon_in.str_cons_0x0061_0x02=cpld
+
+hwmon_in.mode_0x0061_0x03=str_constant
+hwmon_in.str_cons_0x0061_0x03=3630
+
+hwmon_in.mode_0x0061_0x05=str_constant
+hwmon_in.str_cons_0x0061_0x05=2970
+
+# vol98
+hwmon_in.mode_0x0062_0x00=config
+hwmon_in.int_cons_0x0062_0x00=0
+hwmon_in.src_0x0062_0x00=cpld
+hwmon_in.frmt_0x0062_0x00=num_bytes
+hwmon_in.addr_0x0062_0x00=0x000400ac
+hwmon_in.len_0x0062_0x00=2
+hwmon_in.int_extra1_0x0062_0x00=0x000400ac
+hwmon_in.int_extra2_0x0062_0x00=2000
+hwmon_in.int_extra3_0x0062_0x00=1
+
+hwmon_in.mode_0x0062_0x01=str_constant
+hwmon_in.str_cons_0x0062_0x01=OSFP_CPLD_VDD3.3V_B6
+
+hwmon_in.mode_0x0062_0x02=str_constant
+hwmon_in.str_cons_0x0062_0x02=cpld
+
+hwmon_in.mode_0x0062_0x03=str_constant
+hwmon_in.str_cons_0x0062_0x03=3630
+
+hwmon_in.mode_0x0062_0x05=str_constant
+hwmon_in.str_cons_0x0062_0x05=2970
+
+# vol99
+hwmon_in.mode_0x0063_0x00=config
+hwmon_in.int_cons_0x0063_0x00=0
+hwmon_in.src_0x0063_0x00=cpld
+hwmon_in.frmt_0x0063_0x00=num_bytes
+hwmon_in.addr_0x0063_0x00=0x000400ae
+hwmon_in.len_0x0063_0x00=2
+hwmon_in.int_extra1_0x0063_0x00=0x000400ae
+hwmon_in.int_extra2_0x0063_0x00=2000
+hwmon_in.int_extra3_0x0063_0x00=1
+
+hwmon_in.mode_0x0063_0x01=str_constant
+hwmon_in.str_cons_0x0063_0x01=OSFP_CPLD_VDD3.3V_B7
+
+hwmon_in.mode_0x0063_0x02=str_constant
+hwmon_in.str_cons_0x0063_0x02=cpld
+
+hwmon_in.mode_0x0063_0x03=str_constant
+hwmon_in.str_cons_0x0063_0x03=3630
+
+hwmon_in.mode_0x0063_0x05=str_constant
+hwmon_in.str_cons_0x0063_0x05=2970
+
+# vol100
+hwmon_in.mode_0x0064_0x00=config
+hwmon_in.int_cons_0x0064_0x00=0
+hwmon_in.src_0x0064_0x00=cpld
+hwmon_in.frmt_0x0064_0x00=num_bytes
+hwmon_in.addr_0x0064_0x00=0x000400b0
+hwmon_in.len_0x0064_0x00=2
+hwmon_in.int_extra1_0x0064_0x00=0x000400b0
+hwmon_in.int_extra2_0x0064_0x00=2000
+hwmon_in.int_extra3_0x0064_0x00=1
+
+hwmon_in.mode_0x0064_0x01=str_constant
+hwmon_in.str_cons_0x0064_0x01=OSFP_CPLD_VDD3.3V_B8
+
+hwmon_in.mode_0x0064_0x02=str_constant
+hwmon_in.str_cons_0x0064_0x02=cpld
+
+hwmon_in.mode_0x0064_0x03=str_constant
+hwmon_in.str_cons_0x0064_0x03=3630
+
+hwmon_in.mode_0x0064_0x05=str_constant
+hwmon_in.str_cons_0x0064_0x05=2970
+
+
+# vol101
+hwmon_in.mode_0x0065_0x00=config
+hwmon_in.int_cons_0x0065_0x00=3
+hwmon_in.src_0x0065_0x00=file
+hwmon_in.frmt_0x0065_0x00=buf
+hwmon_in.fpath_0x0065_0x00=/sys/bus/i2c/devices/72-0068/hwmon/
+hwmon_in.addr_0x0065_0x00=0
+hwmon_in.len_0x0065_0x00=8
+hwmon_in.bit_offset_0x0065_0x00=0
+hwmon_in.str_cons_0x0065_0x00=in1_input
+hwmon_in.mode_0x0065_0x01=str_constant
+hwmon_in.str_cons_0x0065_0x01=VCC_3V3_BMC
+hwmon_in.mode_0x0065_0x02=str_constant
+hwmon_in.str_cons_0x0065_0x02=ucd9081
+hwmon_in.mode_0x0065_0x03=constant
+hwmon_in.int_cons_0x0065_0x03=3630
+hwmon_in.mode_0x0065_0x05=constant
+hwmon_in.int_cons_0x0065_0x05=2970
+hwmon_in.mode_0x0065_0x08=constant
+hwmon_in.int_cons_0x0065_0x08=3300
+hwmon_in.mode_0x0065_0x07=constant
+hwmon_in.int_cons_0x0065_0x07=5
+hwmon_in.int_extra1_0x0065_0x00=1500
+
+# vol102
+hwmon_in.mode_0x0066_0x00=config
+hwmon_in.int_cons_0x0066_0x00=3
+hwmon_in.src_0x0066_0x00=file
+hwmon_in.frmt_0x0066_0x00=buf
+hwmon_in.fpath_0x0066_0x00=/sys/bus/i2c/devices/72-0068/hwmon/
+hwmon_in.addr_0x0066_0x00=0
+hwmon_in.len_0x0066_0x00=8
+hwmon_in.bit_offset_0x0066_0x00=0
+hwmon_in.str_cons_0x0066_0x00=in2_input
+hwmon_in.mode_0x0066_0x01=str_constant
+hwmon_in.str_cons_0x0066_0x01=VCC_2V5_BMC
+hwmon_in.mode_0x0066_0x02=str_constant
+hwmon_in.str_cons_0x0066_0x02=ucd9081
+hwmon_in.mode_0x0066_0x03=constant
+hwmon_in.int_cons_0x0066_0x03=2750
+hwmon_in.mode_0x0066_0x05=constant
+hwmon_in.int_cons_0x0066_0x05=2250
+hwmon_in.mode_0x0066_0x08=constant
+hwmon_in.int_cons_0x0066_0x08=2500
+hwmon_in.mode_0x0066_0x07=constant
+hwmon_in.int_cons_0x0066_0x07=5
+hwmon_in.int_extra1_0x0066_0x00=1500
+
+
+# vol103
+hwmon_in.mode_0x0067_0x00=config
+hwmon_in.int_cons_0x0067_0x00=0
+hwmon_in.src_0x0067_0x00=file
+hwmon_in.frmt_0x0067_0x00=buf
+hwmon_in.fpath_0x0067_0x00=/sys/bus/i2c/devices/72-0068/hwmon/
+hwmon_in.addr_0x0067_0x00=0
+hwmon_in.len_0x0067_0x00=8
+hwmon_in.bit_offset_0x0067_0x00=
+hwmon_in.str_cons_0x0067_0x00=in3_input
+hwmon_in.mode_0x0067_0x01=str_constant
+hwmon_in.str_cons_0x0067_0x01=VCC_1V8_BMC
+hwmon_in.mode_0x0067_0x02=str_constant
+hwmon_in.str_cons_0x0067_0x02=ucd9081
+hwmon_in.mode_0x0067_0x03=constant
+hwmon_in.int_cons_0x0067_0x03=1980
+hwmon_in.mode_0x0067_0x05=constant
+hwmon_in.int_cons_0x0067_0x05=1620
+hwmon_in.mode_0x0067_0x08=constant
+hwmon_in.int_cons_0x0067_0x08=1800
+hwmon_in.mode_0x0067_0x07=constant
+hwmon_in.int_cons_0x0067_0x07=5
+
+# vol104
+hwmon_in.mode_0x0068_0x00=config
+hwmon_in.int_cons_0x0068_0x00=3
+hwmon_in.src_0x0068_0x00=file
+hwmon_in.frmt_0x0068_0x00=buf
+hwmon_in.fpath_0x0068_0x00=/sys/bus/i2c/devices/72-0068/hwmon/
+hwmon_in.addr_0x0068_0x00=0
+hwmon_in.len_0x0068_0x00=8
+hwmon_in.bit_offset_0x0068_0x00=0
+hwmon_in.str_cons_0x0068_0x00=in4_input
+hwmon_in.mode_0x0068_0x01=str_constant
+hwmon_in.str_cons_0x0068_0x01=VCC_3V3_RGM_BMC
+hwmon_in.mode_0x0068_0x02=str_constant
+hwmon_in.str_cons_0x0068_0x02=ucd9081
+hwmon_in.mode_0x0068_0x03=constant
+hwmon_in.int_cons_0x0068_0x03=3630
+hwmon_in.mode_0x0068_0x05=constant
+hwmon_in.int_cons_0x0068_0x05=2970
+hwmon_in.mode_0x0068_0x08=constant
+hwmon_in.int_cons_0x0068_0x08=3300
+hwmon_in.mode_0x0068_0x07=constant
+hwmon_in.int_cons_0x0068_0x07=5
+hwmon_in.int_extra1_0x0068_0x00=1500
+
+# vol105
+hwmon_in.mode_0x0069_0x00=config
+hwmon_in.int_cons_0x0069_0x00=0
+hwmon_in.src_0x0069_0x00=file
+hwmon_in.frmt_0x0069_0x00=buf
+hwmon_in.fpath_0x0069_0x00=/sys/bus/i2c/devices/72-0068/hwmon/
+hwmon_in.addr_0x0069_0x00=0
+hwmon_in.len_0x0069_0x00=8
+hwmon_in.bit_offset_0x0069_0x00=
+hwmon_in.str_cons_0x0069_0x00=in5_input
+hwmon_in.mode_0x0069_0x01=str_constant
+hwmon_in.str_cons_0x0069_0x01=VCC_DDRVDDQ_BMC
+hwmon_in.mode_0x0069_0x02=str_constant
+hwmon_in.str_cons_0x0069_0x02=ucd9081
+hwmon_in.mode_0x0069_0x03=constant
+hwmon_in.int_cons_0x0069_0x03=1320
+hwmon_in.mode_0x0069_0x05=constant
+hwmon_in.int_cons_0x0069_0x05=1080
+hwmon_in.mode_0x0069_0x08=constant
+hwmon_in.int_cons_0x0069_0x08=1200
+hwmon_in.mode_0x0069_0x07=constant
+hwmon_in.int_cons_0x0069_0x07=5
+
+# vol106
+hwmon_in.mode_0x006a_0x00=config
+hwmon_in.int_cons_0x006a_0x00=0
+hwmon_in.src_0x006a_0x00=file
+hwmon_in.frmt_0x006a_0x00=buf
+hwmon_in.fpath_0x006a_0x00=/sys/bus/i2c/devices/72-0068/hwmon/
+hwmon_in.addr_0x006a_0x00=0
+hwmon_in.len_0x006a_0x00=8
+hwmon_in.bit_offset_0x006a_0x00=
+hwmon_in.str_cons_0x006a_0x00=in6_input
+hwmon_in.mode_0x006a_0x01=str_constant
+hwmon_in.str_cons_0x006a_0x01=VCC_1V0_BMC
+hwmon_in.mode_0x006a_0x02=str_constant
+hwmon_in.str_cons_0x006a_0x02=ucd9081
+hwmon_in.mode_0x006a_0x03=constant
+hwmon_in.int_cons_0x006a_0x03=1100
+hwmon_in.mode_0x006a_0x05=constant
+hwmon_in.int_cons_0x006a_0x05=900
+hwmon_in.mode_0x006a_0x08=constant
+hwmon_in.int_cons_0x006a_0x08=1000
+hwmon_in.mode_0x006a_0x07=constant
+hwmon_in.int_cons_0x006a_0x07=5
+
+# vol107
+hwmon_in.mode_0x006b_0x00=config
+hwmon_in.int_cons_0x006b_0x00=0
+hwmon_in.src_0x006b_0x00=file
+hwmon_in.frmt_0x006b_0x00=buf
+hwmon_in.fpath_0x006b_0x00=/sys/bus/i2c/devices/72-0068/hwmon/
+hwmon_in.addr_0x006b_0x00=0
+hwmon_in.len_0x006b_0x00=8
+hwmon_in.bit_offset_0x006b_0x00=
+hwmon_in.str_cons_0x006b_0x00=in7_input
+hwmon_in.mode_0x006b_0x01=str_constant
+hwmon_in.str_cons_0x006b_0x01=PE_RC_VCC18A_BMC
+hwmon_in.mode_0x006b_0x02=str_constant
+hwmon_in.str_cons_0x006b_0x02=ucd9081
+hwmon_in.mode_0x006b_0x03=constant
+hwmon_in.int_cons_0x006b_0x03=1980
+hwmon_in.mode_0x006b_0x05=constant
+hwmon_in.int_cons_0x006b_0x05=1620
+hwmon_in.mode_0x006b_0x08=constant
+hwmon_in.int_cons_0x006b_0x08=1800
+hwmon_in.mode_0x006b_0x07=constant
+hwmon_in.int_cons_0x006b_0x07=5
+
+# vol108
+hwmon_in.mode_0x006c_0x00=config
+hwmon_in.int_cons_0x006c_0x00=0
+hwmon_in.src_0x006c_0x00=cpld
+hwmon_in.frmt_0x006c_0x00=num_bytes
+hwmon_in.addr_0x006c_0x00=0x0005009a
+hwmon_in.len_0x006c_0x00=2
+hwmon_in.int_extra1_0x006c_0x00=0x0005009a
+hwmon_in.int_extra2_0x006c_0x00=2000
+hwmon_in.int_extra3_0x006c_0x00=1
+
+hwmon_in.mode_0x006c_0x01=str_constant
+hwmon_in.str_cons_0x006c_0x01=MGMT_VDD3.3V
+
+hwmon_in.mode_0x006c_0x02=str_constant
+hwmon_in.str_cons_0x006c_0x02=cpld
+
+hwmon_in.mode_0x006c_0x03=str_constant
+hwmon_in.str_cons_0x006c_0x03=3630
+
+hwmon_in.mode_0x006c_0x05=str_constant
+hwmon_in.str_cons_0x006c_0x05=2970
+
+# vol109
+hwmon_in.mode_0x006d_0x00=config
+hwmon_in.int_cons_0x006d_0x00=0
+hwmon_in.src_0x006d_0x00=cpld
+hwmon_in.frmt_0x006d_0x00=num_bytes
+hwmon_in.addr_0x006d_0x00=0x00050090
+hwmon_in.len_0x006d_0x00=2
+hwmon_in.int_extra1_0x006d_0x00=0x00050090
+hwmon_in.int_extra2_0x006d_0x00=2000
+hwmon_in.int_extra3_0x006d_0x00=1
+
+hwmon_in.mode_0x006d_0x01=str_constant
+hwmon_in.str_cons_0x006d_0x01=MGMT_VDD3.3V_PHY
+
+hwmon_in.mode_0x006d_0x02=str_constant
+hwmon_in.str_cons_0x006d_0x02=cpld
+
+hwmon_in.mode_0x006d_0x03=str_constant
+hwmon_in.str_cons_0x006d_0x03=3630
+
+hwmon_in.mode_0x006d_0x05=str_constant
+hwmon_in.str_cons_0x006d_0x05=2970
+
+# vol110
+hwmon_in.mode_0x006e_0x00=config
+hwmon_in.int_cons_0x006e_0x00=0
+hwmon_in.src_0x006e_0x00=cpld
+hwmon_in.frmt_0x006e_0x00=num_bytes
+hwmon_in.addr_0x006e_0x00=0x00050092
+hwmon_in.len_0x006e_0x00=2
+hwmon_in.int_extra1_0x006e_0x00=0x00050092
+hwmon_in.int_extra2_0x006e_0x00=1000
+hwmon_in.int_extra3_0x006e_0x00=1
+
+hwmon_in.mode_0x006e_0x01=str_constant
+hwmon_in.str_cons_0x006e_0x01=MGMT_PHY_VDD1_8V
+
+hwmon_in.mode_0x006e_0x02=str_constant
+hwmon_in.str_cons_0x006e_0x02=cpld
+
+hwmon_in.mode_0x006e_0x03=str_constant
+hwmon_in.str_cons_0x006e_0x03=1910
+
+hwmon_in.mode_0x006e_0x05=str_constant
+hwmon_in.str_cons_0x006e_0x05=1690
+
+# vol111
+hwmon_in.mode_0x006f_0x00=config
+hwmon_in.int_cons_0x006f_0x00=0
+hwmon_in.src_0x006f_0x00=cpld
+hwmon_in.frmt_0x006f_0x00=num_bytes
+hwmon_in.addr_0x006f_0x00=0x00050094
+hwmon_in.len_0x006f_0x00=2
+hwmon_in.int_extra1_0x006f_0x00=0x00050094
+hwmon_in.int_extra2_0x006f_0x00=1000
+hwmon_in.int_extra3_0x006f_0x00=1
+
+hwmon_in.mode_0x006f_0x01=str_constant
+hwmon_in.str_cons_0x006f_0x01=MGMT_PHY_VDD1_25V
+
+hwmon_in.mode_0x006f_0x02=str_constant
+hwmon_in.str_cons_0x006f_0x02=cpld
+
+hwmon_in.mode_0x006f_0x03=str_constant
+hwmon_in.str_cons_0x006f_0x03=1375
+
+hwmon_in.mode_0x006f_0x05=str_constant
+hwmon_in.str_cons_0x006f_0x05=1125
+
+# vol112
+hwmon_in.mode_0x0070_0x00=config
+hwmon_in.int_cons_0x0070_0x00=0
+hwmon_in.src_0x0070_0x00=cpld
+hwmon_in.frmt_0x0070_0x00=num_bytes
+hwmon_in.addr_0x0070_0x00=0x00050098
+hwmon_in.len_0x0070_0x00=2
+hwmon_in.int_extra1_0x0070_0x00=0x00050098
+hwmon_in.int_extra2_0x0070_0x00=1000
+hwmon_in.int_extra3_0x0070_0x00=1
+
+hwmon_in.mode_0x0070_0x01=str_constant
+hwmon_in.str_cons_0x0070_0x01=MGMT_PHY_VDD0_8V
+
+hwmon_in.mode_0x0070_0x02=str_constant
+hwmon_in.str_cons_0x0070_0x02=cpld
+
+hwmon_in.mode_0x0070_0x03=str_constant
+hwmon_in.str_cons_0x0070_0x03=880
+
+hwmon_in.mode_0x0070_0x05=str_constant
+hwmon_in.str_cons_0x0070_0x05=720
+
+
+# curr1
+hwmon_curr.mode_0x0001_0x00=config
+hwmon_curr.int_cons_0x0001_0x00=0
+hwmon_curr.src_0x0001_0x00=file
+hwmon_curr.frmt_0x0001_0x00=buf
+hwmon_curr.fpath_0x0001_0x00=/sys/bus/i2c/devices/69-0070/hwmon/
+hwmon_curr.addr_0x0001_0x00=0
+hwmon_curr.len_0x0001_0x00=8
+hwmon_curr.bit_offset_0x0001_0x00=
+hwmon_curr.str_cons_0x0001_0x00=curr3_input
+hwmon_curr.mode_0x0001_0x01=str_constant
+hwmon_curr.str_cons_0x0001_0x01=CPU_XDPE_VCCIN_C
+hwmon_curr.mode_0x0001_0x02=str_constant
+hwmon_curr.str_cons_0x0001_0x02=xdpe12284c
+hwmon_curr.mode_0x0001_0x03=constant
+hwmon_curr.int_cons_0x0001_0x03=14700
+hwmon_curr.mode_0x0001_0x05=constant
+hwmon_curr.int_cons_0x0001_0x05=-3100
+
+# curr2
+hwmon_curr.mode_0x0002_0x00=config
+hwmon_curr.int_cons_0x0002_0x00=0
+hwmon_curr.src_0x0002_0x00=file
+hwmon_curr.frmt_0x0002_0x00=buf
+hwmon_curr.fpath_0x0002_0x00=/sys/bus/i2c/devices/69-0070/hwmon/
+hwmon_curr.addr_0x0002_0x00=0
+hwmon_curr.len_0x0002_0x00=8
+hwmon_curr.bit_offset_0x0002_0x00=
+hwmon_curr.str_cons_0x0002_0x00=curr4_input
+hwmon_curr.mode_0x0002_0x01=str_constant
+hwmon_curr.str_cons_0x0002_0x01=CPU_XDPE_P1V8_C
+hwmon_curr.mode_0x0002_0x02=str_constant
+hwmon_curr.str_cons_0x0002_0x02=xdpe12284c
+hwmon_curr.mode_0x0002_0x03=constant
+hwmon_curr.int_cons_0x0002_0x03=4100
+hwmon_curr.mode_0x0002_0x05=constant
+hwmon_curr.int_cons_0x0002_0x05=-3100
+
+# curr3
+hwmon_curr.mode_0x0003_0x00=config
+hwmon_curr.int_cons_0x0003_0x00=0
+hwmon_curr.src_0x0003_0x00=file
+hwmon_curr.frmt_0x0003_0x00=buf
+hwmon_curr.fpath_0x0003_0x00=/sys/bus/i2c/devices/69-006e/hwmon/
+hwmon_curr.addr_0x0003_0x00=0
+hwmon_curr.len_0x0003_0x00=8
+hwmon_curr.bit_offset_0x0003_0x00=
+hwmon_curr.str_cons_0x0003_0x00=curr3_input
+hwmon_curr.mode_0x0003_0x01=str_constant
+hwmon_curr.str_cons_0x0003_0x01=CPU_XDPE_P1V05_C
+hwmon_curr.mode_0x0003_0x02=str_constant
+hwmon_curr.str_cons_0x0003_0x02=xdpe12284c
+hwmon_curr.mode_0x0003_0x03=constant
+hwmon_curr.int_cons_0x0003_0x03=14300
+hwmon_curr.mode_0x0003_0x05=constant
+hwmon_curr.int_cons_0x0003_0x05=-3100
+
+# curr4
+hwmon_curr.mode_0x0004_0x00=config
+hwmon_curr.int_cons_0x0004_0x00=0
+hwmon_curr.src_0x0004_0x00=file
+hwmon_curr.frmt_0x0004_0x00=buf
+hwmon_curr.fpath_0x0004_0x00=/sys/bus/i2c/devices/69-006e/hwmon/
+hwmon_curr.addr_0x0004_0x00=0
+hwmon_curr.len_0x0004_0x00=8
+hwmon_curr.bit_offset_0x0004_0x00=
+hwmon_curr.str_cons_0x0004_0x00=curr4_input
+hwmon_curr.mode_0x0004_0x01=str_constant
+hwmon_curr.str_cons_0x0004_0x01=CPU_XDPE_VNN_PCH_C
+hwmon_curr.mode_0x0004_0x02=str_constant
+hwmon_curr.str_cons_0x0004_0x02=xdpe12284c
+hwmon_curr.mode_0x0004_0x03=constant
+hwmon_curr.int_cons_0x0004_0x03=9100
+hwmon_curr.mode_0x0004_0x05=constant
+hwmon_curr.int_cons_0x0004_0x05=-3100
+
+# curr5
+hwmon_curr.mode_0x0005_0x00=config
+hwmon_curr.int_cons_0x0005_0x00=0
+hwmon_curr.src_0x0005_0x00=file
+hwmon_curr.frmt_0x0005_0x00=buf
+hwmon_curr.fpath_0x0005_0x00=/sys/bus/i2c/devices/69-0068/hwmon/
+hwmon_curr.addr_0x0005_0x00=0
+hwmon_curr.len_0x0005_0x00=8
+hwmon_curr.bit_offset_0x0005_0x00=
+hwmon_curr.str_cons_0x0005_0x00=curr3_input
+hwmon_curr.mode_0x0005_0x01=str_constant
+hwmon_curr.str_cons_0x0005_0x01=CPU_XDPE_VNN_NAC_C
+hwmon_curr.mode_0x0005_0x02=str_constant
+hwmon_curr.str_cons_0x0005_0x02=xdpe12284c
+hwmon_curr.mode_0x0005_0x03=constant
+hwmon_curr.int_cons_0x0005_0x03=22000
+hwmon_curr.mode_0x0005_0x05=constant
+hwmon_curr.int_cons_0x0005_0x05=-3100
+
+# curr6
+hwmon_curr.mode_0x0006_0x00=config
+hwmon_curr.int_cons_0x0006_0x00=0
+hwmon_curr.src_0x0006_0x00=file
+hwmon_curr.frmt_0x0006_0x00=buf
+hwmon_curr.fpath_0x0006_0x00=/sys/bus/i2c/devices/69-0068/hwmon/
+hwmon_curr.addr_0x0006_0x00=0
+hwmon_curr.len_0x0006_0x00=8
+hwmon_curr.bit_offset_0x0006_0x00=
+hwmon_curr.str_cons_0x0006_0x00=curr4_input
+hwmon_curr.mode_0x0006_0x01=str_constant
+hwmon_curr.str_cons_0x0006_0x01=CPU_XDPE_VCC_ANA_C
+hwmon_curr.mode_0x0006_0x02=str_constant
+hwmon_curr.str_cons_0x0006_0x02=xdpe12284c
+hwmon_curr.mode_0x0006_0x03=constant
+hwmon_curr.int_cons_0x0006_0x03=4100
+hwmon_curr.mode_0x0006_0x05=constant
+hwmon_curr.int_cons_0x0006_0x05=-3100
+
+# curr7
+hwmon_curr.mode_0x0007_0x00=config
+hwmon_curr.int_cons_0x0007_0x00=0
+hwmon_curr.src_0x0007_0x00=file
+hwmon_curr.frmt_0x0007_0x00=buf
+hwmon_curr.fpath_0x0007_0x00=/sys/bus/i2c/devices/69-005e/hwmon/
+hwmon_curr.addr_0x0007_0x00=0
+hwmon_curr.len_0x0007_0x00=8
+hwmon_curr.bit_offset_0x0007_0x00=
+hwmon_curr.str_cons_0x0007_0x00=curr3_input
+hwmon_curr.mode_0x0007_0x01=str_constant
+hwmon_curr.str_cons_0x0007_0x01=CPU_XDPE_P1V2_VDDQ_C
+hwmon_curr.mode_0x0007_0x02=str_constant
+hwmon_curr.str_cons_0x0007_0x02=xdpe12284c
+hwmon_curr.mode_0x0007_0x03=constant
+hwmon_curr.int_cons_0x0007_0x03=19000
+hwmon_curr.mode_0x0007_0x05=constant
+hwmon_curr.int_cons_0x0007_0x05=-3100
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SFF.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SFF.cfg
new file mode 100644
index 000000000000..78acfeb999f6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SFF.cfg
@@ -0,0 +1,2682 @@
+#
+# @Fill in the agreement
+# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of
+# configuration items and invalid Spaces must not be added between configuration items
+# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x"
+# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and
+# fill in the configuration items, do not delete them
+# 4. Configuration item
+
+# Configuration item: Number of optical modules
+# Description: Format dev_num_[main_dev]_[minor_dev]
+# Note:	main_dev,optical module is 3, minor_dev, 0:does not exist
+dev_num_3_0=66
+
+# Configuration items::	optical module EEPROM size
+# Description: Format eeprom_size_[main_dev]_[index]
+# Note:	main_dev,optical module is 3, index, Optical module index, starting from 1
+eeprom_size_3_1=0x8180
+eeprom_size_3_2=0x8180
+eeprom_size_3_3=0x8180
+eeprom_size_3_4=0x8180
+eeprom_size_3_5=0x8180
+eeprom_size_3_6=0x8180
+eeprom_size_3_7=0x8180
+eeprom_size_3_8=0x8180
+eeprom_size_3_9=0x8180
+eeprom_size_3_10=0x8180
+eeprom_size_3_11=0x8180
+eeprom_size_3_12=0x8180
+eeprom_size_3_13=0x8180
+eeprom_size_3_14=0x8180
+eeprom_size_3_15=0x8180
+eeprom_size_3_16=0x8180
+eeprom_size_3_17=0x8180
+eeprom_size_3_18=0x8180
+eeprom_size_3_19=0x8180
+eeprom_size_3_20=0x8180
+eeprom_size_3_21=0x8180
+eeprom_size_3_22=0x8180
+eeprom_size_3_23=0x8180
+eeprom_size_3_24=0x8180
+eeprom_size_3_25=0x8180
+eeprom_size_3_26=0x8180
+eeprom_size_3_27=0x8180
+eeprom_size_3_28=0x8180
+eeprom_size_3_29=0x8180
+eeprom_size_3_30=0x8180
+eeprom_size_3_31=0x8180
+eeprom_size_3_32=0x8180
+eeprom_size_3_33=0x8180
+eeprom_size_3_34=0x8180
+eeprom_size_3_35=0x8180
+eeprom_size_3_36=0x8180
+eeprom_size_3_37=0x8180
+eeprom_size_3_38=0x8180
+eeprom_size_3_39=0x8180
+eeprom_size_3_40=0x8180
+eeprom_size_3_41=0x8180
+eeprom_size_3_42=0x8180
+eeprom_size_3_43=0x8180
+eeprom_size_3_44=0x8180
+eeprom_size_3_45=0x8180
+eeprom_size_3_46=0x8180
+eeprom_size_3_47=0x8180
+eeprom_size_3_48=0x8180
+eeprom_size_3_49=0x8180
+eeprom_size_3_50=0x8180
+eeprom_size_3_51=0x8180
+eeprom_size_3_52=0x8180
+eeprom_size_3_53=0x8180
+eeprom_size_3_54=0x8180
+eeprom_size_3_55=0x8180
+eeprom_size_3_56=0x8180
+eeprom_size_3_57=0x8180
+eeprom_size_3_58=0x8180
+eeprom_size_3_59=0x8180
+eeprom_size_3_60=0x8180
+eeprom_size_3_61=0x8180
+eeprom_size_3_62=0x8180
+eeprom_size_3_63=0x8180
+eeprom_size_3_64=0x8180
+eeprom_size_3_65=0x8180
+eeprom_size_3_66=0x8180
+
+# Configuration items:	optical module EEPROM sysfs path
+# Description: Format eeprom_size_[main_dev]_[index]
+# Note:	main_dev,optical module is 3, index, Optical module index, starting from 1
+eeprom_path_3_1=/sys/bus/i2c/devices/106-0050/eeprom
+eeprom_path_3_2=/sys/bus/i2c/devices/107-0050/eeprom
+eeprom_path_3_3=/sys/bus/i2c/devices/108-0050/eeprom
+eeprom_path_3_4=/sys/bus/i2c/devices/109-0050/eeprom
+eeprom_path_3_5=/sys/bus/i2c/devices/110-0050/eeprom
+eeprom_path_3_6=/sys/bus/i2c/devices/111-0050/eeprom
+eeprom_path_3_7=/sys/bus/i2c/devices/112-0050/eeprom
+eeprom_path_3_8=/sys/bus/i2c/devices/113-0050/eeprom
+eeprom_path_3_9=/sys/bus/i2c/devices/114-0050/eeprom
+eeprom_path_3_10=/sys/bus/i2c/devices/115-0050/eeprom
+eeprom_path_3_11=/sys/bus/i2c/devices/116-0050/eeprom
+eeprom_path_3_12=/sys/bus/i2c/devices/117-0050/eeprom
+eeprom_path_3_13=/sys/bus/i2c/devices/118-0050/eeprom
+eeprom_path_3_14=/sys/bus/i2c/devices/119-0050/eeprom
+eeprom_path_3_15=/sys/bus/i2c/devices/120-0050/eeprom
+eeprom_path_3_16=/sys/bus/i2c/devices/121-0050/eeprom
+eeprom_path_3_17=/sys/bus/i2c/devices/122-0050/eeprom
+eeprom_path_3_18=/sys/bus/i2c/devices/123-0050/eeprom
+eeprom_path_3_19=/sys/bus/i2c/devices/124-0050/eeprom
+eeprom_path_3_20=/sys/bus/i2c/devices/125-0050/eeprom
+eeprom_path_3_21=/sys/bus/i2c/devices/126-0050/eeprom
+eeprom_path_3_22=/sys/bus/i2c/devices/127-0050/eeprom
+eeprom_path_3_23=/sys/bus/i2c/devices/128-0050/eeprom
+eeprom_path_3_24=/sys/bus/i2c/devices/129-0050/eeprom
+eeprom_path_3_25=/sys/bus/i2c/devices/130-0050/eeprom
+eeprom_path_3_26=/sys/bus/i2c/devices/131-0050/eeprom
+eeprom_path_3_27=/sys/bus/i2c/devices/132-0050/eeprom
+eeprom_path_3_28=/sys/bus/i2c/devices/133-0050/eeprom
+eeprom_path_3_29=/sys/bus/i2c/devices/134-0050/eeprom
+eeprom_path_3_30=/sys/bus/i2c/devices/135-0050/eeprom
+eeprom_path_3_31=/sys/bus/i2c/devices/136-0050/eeprom
+eeprom_path_3_32=/sys/bus/i2c/devices/137-0050/eeprom
+eeprom_path_3_33=/sys/bus/i2c/devices/138-0050/eeprom
+eeprom_path_3_34=/sys/bus/i2c/devices/139-0050/eeprom
+eeprom_path_3_35=/sys/bus/i2c/devices/140-0050/eeprom
+eeprom_path_3_36=/sys/bus/i2c/devices/141-0050/eeprom
+eeprom_path_3_37=/sys/bus/i2c/devices/142-0050/eeprom
+eeprom_path_3_38=/sys/bus/i2c/devices/143-0050/eeprom
+eeprom_path_3_39=/sys/bus/i2c/devices/144-0050/eeprom
+eeprom_path_3_40=/sys/bus/i2c/devices/145-0050/eeprom
+eeprom_path_3_41=/sys/bus/i2c/devices/146-0050/eeprom
+eeprom_path_3_42=/sys/bus/i2c/devices/147-0050/eeprom
+eeprom_path_3_43=/sys/bus/i2c/devices/148-0050/eeprom
+eeprom_path_3_44=/sys/bus/i2c/devices/149-0050/eeprom
+eeprom_path_3_45=/sys/bus/i2c/devices/150-0050/eeprom
+eeprom_path_3_46=/sys/bus/i2c/devices/151-0050/eeprom
+eeprom_path_3_47=/sys/bus/i2c/devices/152-0050/eeprom
+eeprom_path_3_48=/sys/bus/i2c/devices/153-0050/eeprom
+eeprom_path_3_49=/sys/bus/i2c/devices/154-0050/eeprom
+eeprom_path_3_50=/sys/bus/i2c/devices/155-0050/eeprom
+eeprom_path_3_51=/sys/bus/i2c/devices/156-0050/eeprom
+eeprom_path_3_52=/sys/bus/i2c/devices/157-0050/eeprom
+eeprom_path_3_53=/sys/bus/i2c/devices/158-0050/eeprom
+eeprom_path_3_54=/sys/bus/i2c/devices/159-0050/eeprom
+eeprom_path_3_55=/sys/bus/i2c/devices/160-0050/eeprom
+eeprom_path_3_56=/sys/bus/i2c/devices/161-0050/eeprom
+eeprom_path_3_57=/sys/bus/i2c/devices/162-0050/eeprom
+eeprom_path_3_58=/sys/bus/i2c/devices/163-0050/eeprom
+eeprom_path_3_59=/sys/bus/i2c/devices/164-0050/eeprom
+eeprom_path_3_60=/sys/bus/i2c/devices/165-0050/eeprom
+eeprom_path_3_61=/sys/bus/i2c/devices/166-0050/eeprom
+eeprom_path_3_62=/sys/bus/i2c/devices/167-0050/eeprom
+eeprom_path_3_63=/sys/bus/i2c/devices/168-0050/eeprom
+eeprom_path_3_64=/sys/bus/i2c/devices/169-0050/eeprom
+eeprom_path_3_65=/sys/bus/i2c/devices/59-0050/eeprom
+eeprom_path_3_66=/sys/bus/i2c/devices/60-0050/eeprom
+
+
+# Configuration items:	Optical module CPLD register
+# Description: Format sff_cpld_reg_[sff_index]_[cpld_reg]
+# Note:	sff_index indicates the optical module number, starting from 1. 0 indicates that the power_on register is useful
+# cpld_reg 1:power_on 2:tx_fault, 3:tx_dis 4:reserve 5:rx_los
+# 6:reset 7:lpmode 8:module_present 9:interrupt
+
+
+# 800G module reset signal 
+sff_cpld_reg.mode_1_6=config
+sff_cpld_reg.src_1_6=cpld
+sff_cpld_reg.frmt_1_6=bit
+sff_cpld_reg.pola_1_6=negative
+sff_cpld_reg.addr_1_6=0x00020072
+sff_cpld_reg.len_1_6=1
+sff_cpld_reg.bit_offset_1_6=0
+
+sff_cpld_reg.mode_2_6=config
+sff_cpld_reg.src_2_6=cpld
+sff_cpld_reg.frmt_2_6=bit
+sff_cpld_reg.pola_2_6=negative
+sff_cpld_reg.addr_2_6=0x00020072
+sff_cpld_reg.len_2_6=1
+sff_cpld_reg.bit_offset_2_6=1
+
+sff_cpld_reg.mode_3_6=config
+sff_cpld_reg.src_3_6=cpld
+sff_cpld_reg.frmt_3_6=bit
+sff_cpld_reg.pola_3_6=negative
+sff_cpld_reg.addr_3_6=0x00020072
+sff_cpld_reg.len_3_6=1
+sff_cpld_reg.bit_offset_3_6=2
+
+sff_cpld_reg.mode_4_6=config
+sff_cpld_reg.src_4_6=cpld
+sff_cpld_reg.frmt_4_6=bit
+sff_cpld_reg.pola_4_6=negative
+sff_cpld_reg.addr_4_6=0x00020072
+sff_cpld_reg.len_4_6=1
+sff_cpld_reg.bit_offset_4_6=3
+
+sff_cpld_reg.mode_5_6=config
+sff_cpld_reg.src_5_6=cpld
+sff_cpld_reg.frmt_5_6=bit
+sff_cpld_reg.pola_5_6=negative
+sff_cpld_reg.addr_5_6=0x00020072
+sff_cpld_reg.len_5_6=1
+sff_cpld_reg.bit_offset_5_6=4
+
+sff_cpld_reg.mode_6_6=config
+sff_cpld_reg.src_6_6=cpld
+sff_cpld_reg.frmt_6_6=bit
+sff_cpld_reg.pola_6_6=negative
+sff_cpld_reg.addr_6_6=0x00020072
+sff_cpld_reg.len_6_6=1
+sff_cpld_reg.bit_offset_6_6=5
+
+sff_cpld_reg.mode_7_6=config
+sff_cpld_reg.src_7_6=cpld
+sff_cpld_reg.frmt_7_6=bit
+sff_cpld_reg.pola_7_6=negative
+sff_cpld_reg.addr_7_6=0x00020072
+sff_cpld_reg.len_7_6=1
+sff_cpld_reg.bit_offset_7_6=6
+
+sff_cpld_reg.mode_8_6=config
+sff_cpld_reg.src_8_6=cpld
+sff_cpld_reg.frmt_8_6=bit
+sff_cpld_reg.pola_8_6=negative
+sff_cpld_reg.addr_8_6=0x00020072
+sff_cpld_reg.len_8_6=1
+sff_cpld_reg.bit_offset_8_6=7
+
+sff_cpld_reg.mode_9_6=config
+sff_cpld_reg.src_9_6=cpld
+sff_cpld_reg.frmt_9_6=bit
+sff_cpld_reg.pola_9_6=negative
+sff_cpld_reg.addr_9_6=0x00020071
+sff_cpld_reg.len_9_6=1
+sff_cpld_reg.bit_offset_9_6=0
+
+sff_cpld_reg.mode_10_6=config
+sff_cpld_reg.src_10_6=cpld
+sff_cpld_reg.frmt_10_6=bit
+sff_cpld_reg.pola_10_6=negative
+sff_cpld_reg.addr_10_6=0x00020071
+sff_cpld_reg.len_10_6=1
+sff_cpld_reg.bit_offset_10_6=1
+
+sff_cpld_reg.mode_11_6=config
+sff_cpld_reg.src_11_6=cpld
+sff_cpld_reg.frmt_11_6=bit
+sff_cpld_reg.pola_11_6=negative
+sff_cpld_reg.addr_11_6=0x00020071
+sff_cpld_reg.len_11_6=1
+sff_cpld_reg.bit_offset_11_6=2
+
+sff_cpld_reg.mode_12_6=config
+sff_cpld_reg.src_12_6=cpld
+sff_cpld_reg.frmt_12_6=bit
+sff_cpld_reg.pola_12_6=negative
+sff_cpld_reg.addr_12_6=0x00020071
+sff_cpld_reg.len_12_6=1
+sff_cpld_reg.bit_offset_12_6=3
+
+sff_cpld_reg.mode_13_6=config
+sff_cpld_reg.src_13_6=cpld
+sff_cpld_reg.frmt_13_6=bit
+sff_cpld_reg.pola_13_6=negative
+sff_cpld_reg.addr_13_6=0x00020071
+sff_cpld_reg.len_13_6=1
+sff_cpld_reg.bit_offset_13_6=4
+
+sff_cpld_reg.mode_14_6=config
+sff_cpld_reg.src_14_6=cpld
+sff_cpld_reg.frmt_14_6=bit
+sff_cpld_reg.pola_14_6=negative
+sff_cpld_reg.addr_14_6=0x00020071
+sff_cpld_reg.len_14_6=1
+sff_cpld_reg.bit_offset_14_6=5
+
+sff_cpld_reg.mode_15_6=config
+sff_cpld_reg.src_15_6=cpld
+sff_cpld_reg.frmt_15_6=bit
+sff_cpld_reg.pola_15_6=negative
+sff_cpld_reg.addr_15_6=0x00020071
+sff_cpld_reg.len_15_6=1
+sff_cpld_reg.bit_offset_15_6=6
+
+sff_cpld_reg.mode_16_6=config
+sff_cpld_reg.src_16_6=cpld
+sff_cpld_reg.frmt_16_6=bit
+sff_cpld_reg.pola_16_6=negative
+sff_cpld_reg.addr_16_6=0x00020071
+sff_cpld_reg.len_16_6=1
+sff_cpld_reg.bit_offset_16_6=7
+
+sff_cpld_reg.mode_17_6=config
+sff_cpld_reg.src_17_6=cpld
+sff_cpld_reg.frmt_17_6=bit
+sff_cpld_reg.pola_17_6=negative
+sff_cpld_reg.addr_17_6=0x00020070
+sff_cpld_reg.len_17_6=1
+sff_cpld_reg.bit_offset_17_6=0
+
+sff_cpld_reg.mode_18_6=config
+sff_cpld_reg.src_18_6=cpld
+sff_cpld_reg.frmt_18_6=bit
+sff_cpld_reg.pola_18_6=negative
+sff_cpld_reg.addr_18_6=0x00020070
+sff_cpld_reg.len_18_6=1
+sff_cpld_reg.bit_offset_18_6=1
+
+sff_cpld_reg.mode_19_6=config
+sff_cpld_reg.src_19_6=cpld
+sff_cpld_reg.frmt_19_6=bit
+sff_cpld_reg.pola_19_6=negative
+sff_cpld_reg.addr_19_6=0x00020070
+sff_cpld_reg.len_19_6=1
+sff_cpld_reg.bit_offset_19_6=2
+
+sff_cpld_reg.mode_20_6=config
+sff_cpld_reg.src_20_6=cpld
+sff_cpld_reg.frmt_20_6=bit
+sff_cpld_reg.pola_20_6=negative
+sff_cpld_reg.addr_20_6=0x00020070
+sff_cpld_reg.len_20_6=1
+sff_cpld_reg.bit_offset_20_6=3
+
+sff_cpld_reg.mode_21_6=config
+sff_cpld_reg.src_21_6=cpld
+sff_cpld_reg.frmt_21_6=bit
+sff_cpld_reg.pola_21_6=negative
+sff_cpld_reg.addr_21_6=0x00020070
+sff_cpld_reg.len_21_6=1
+sff_cpld_reg.bit_offset_21_6=4
+
+sff_cpld_reg.mode_22_6=config
+sff_cpld_reg.src_22_6=cpld
+sff_cpld_reg.frmt_22_6=bit
+sff_cpld_reg.pola_22_6=negative
+sff_cpld_reg.addr_22_6=0x00020070
+sff_cpld_reg.len_22_6=1
+sff_cpld_reg.bit_offset_22_6=5
+
+sff_cpld_reg.mode_23_6=config
+sff_cpld_reg.src_23_6=cpld
+sff_cpld_reg.frmt_23_6=bit
+sff_cpld_reg.pola_23_6=negative
+sff_cpld_reg.addr_23_6=0x00020070
+sff_cpld_reg.len_23_6=1
+sff_cpld_reg.bit_offset_23_6=6
+
+sff_cpld_reg.mode_24_6=config
+sff_cpld_reg.src_24_6=cpld
+sff_cpld_reg.frmt_24_6=bit
+sff_cpld_reg.pola_24_6=negative
+sff_cpld_reg.addr_24_6=0x00020070
+sff_cpld_reg.len_24_6=1
+sff_cpld_reg.bit_offset_24_6=7
+
+sff_cpld_reg.mode_25_6=config
+sff_cpld_reg.src_25_6=cpld
+sff_cpld_reg.frmt_25_6=bit
+sff_cpld_reg.pola_25_6=negative
+sff_cpld_reg.addr_25_6=0x00030074
+sff_cpld_reg.len_25_6=1
+sff_cpld_reg.bit_offset_25_6=0
+
+sff_cpld_reg.mode_26_6=config
+sff_cpld_reg.src_26_6=cpld
+sff_cpld_reg.frmt_26_6=bit
+sff_cpld_reg.pola_26_6=negative
+sff_cpld_reg.addr_26_6=0x00030074
+sff_cpld_reg.len_26_6=1
+sff_cpld_reg.bit_offset_26_6=1
+
+sff_cpld_reg.mode_27_6=config
+sff_cpld_reg.src_27_6=cpld
+sff_cpld_reg.frmt_27_6=bit
+sff_cpld_reg.pola_27_6=negative
+sff_cpld_reg.addr_27_6=0x00030074
+sff_cpld_reg.len_27_6=1
+sff_cpld_reg.bit_offset_27_6=2
+
+sff_cpld_reg.mode_28_6=config
+sff_cpld_reg.src_28_6=cpld
+sff_cpld_reg.frmt_28_6=bit
+sff_cpld_reg.pola_28_6=negative
+sff_cpld_reg.addr_28_6=0x00030074
+sff_cpld_reg.len_28_6=1
+sff_cpld_reg.bit_offset_28_6=3
+
+sff_cpld_reg.mode_29_6=config
+sff_cpld_reg.src_29_6=cpld
+sff_cpld_reg.frmt_29_6=bit
+sff_cpld_reg.pola_29_6=negative
+sff_cpld_reg.addr_29_6=0x00030074
+sff_cpld_reg.len_29_6=1
+sff_cpld_reg.bit_offset_29_6=4
+
+sff_cpld_reg.mode_30_6=config
+sff_cpld_reg.src_30_6=cpld
+sff_cpld_reg.frmt_30_6=bit
+sff_cpld_reg.pola_30_6=negative
+sff_cpld_reg.addr_30_6=0x00030074
+sff_cpld_reg.len_30_6=1
+sff_cpld_reg.bit_offset_30_6=5
+
+sff_cpld_reg.mode_31_6=config
+sff_cpld_reg.src_31_6=cpld
+sff_cpld_reg.frmt_31_6=bit
+sff_cpld_reg.pola_31_6=negative
+sff_cpld_reg.addr_31_6=0x00030074
+sff_cpld_reg.len_31_6=1
+sff_cpld_reg.bit_offset_31_6=6
+
+sff_cpld_reg.mode_32_6=config
+sff_cpld_reg.src_32_6=cpld
+sff_cpld_reg.frmt_32_6=bit
+sff_cpld_reg.pola_32_6=negative
+sff_cpld_reg.addr_32_6=0x00030074
+sff_cpld_reg.len_32_6=1
+sff_cpld_reg.bit_offset_32_6=7
+
+sff_cpld_reg.mode_33_6=config
+sff_cpld_reg.src_33_6=cpld
+sff_cpld_reg.frmt_33_6=bit
+sff_cpld_reg.pola_33_6=negative
+sff_cpld_reg.addr_33_6=0x00030073
+sff_cpld_reg.len_33_6=1
+sff_cpld_reg.bit_offset_33_6=0
+
+sff_cpld_reg.mode_34_6=config
+sff_cpld_reg.src_34_6=cpld
+sff_cpld_reg.frmt_34_6=bit
+sff_cpld_reg.pola_34_6=negative
+sff_cpld_reg.addr_34_6=0x00030073
+sff_cpld_reg.len_34_6=1
+sff_cpld_reg.bit_offset_34_6=1
+
+sff_cpld_reg.mode_35_6=config
+sff_cpld_reg.src_35_6=cpld
+sff_cpld_reg.frmt_35_6=bit
+sff_cpld_reg.pola_35_6=negative
+sff_cpld_reg.addr_35_6=0x00030073
+sff_cpld_reg.len_35_6=1
+sff_cpld_reg.bit_offset_35_6=2
+
+sff_cpld_reg.mode_36_6=config
+sff_cpld_reg.src_36_6=cpld
+sff_cpld_reg.frmt_36_6=bit
+sff_cpld_reg.pola_36_6=negative
+sff_cpld_reg.addr_36_6=0x00030073
+sff_cpld_reg.len_36_6=1
+sff_cpld_reg.bit_offset_36_6=3
+
+sff_cpld_reg.mode_37_6=config
+sff_cpld_reg.src_37_6=cpld
+sff_cpld_reg.frmt_37_6=bit
+sff_cpld_reg.pola_37_6=negative
+sff_cpld_reg.addr_37_6=0x00030073
+sff_cpld_reg.len_37_6=1
+sff_cpld_reg.bit_offset_37_6=4
+
+sff_cpld_reg.mode_38_6=config
+sff_cpld_reg.src_38_6=cpld
+sff_cpld_reg.frmt_38_6=bit
+sff_cpld_reg.pola_38_6=negative
+sff_cpld_reg.addr_38_6=0x00030073
+sff_cpld_reg.len_38_6=1
+sff_cpld_reg.bit_offset_38_6=5
+
+sff_cpld_reg.mode_39_6=config
+sff_cpld_reg.src_39_6=cpld
+sff_cpld_reg.frmt_39_6=bit
+sff_cpld_reg.pola_39_6=negative
+sff_cpld_reg.addr_39_6=0x00030073
+sff_cpld_reg.len_39_6=1
+sff_cpld_reg.bit_offset_39_6=6
+
+sff_cpld_reg.mode_40_6=config
+sff_cpld_reg.src_40_6=cpld
+sff_cpld_reg.frmt_40_6=bit
+sff_cpld_reg.pola_40_6=negative
+sff_cpld_reg.addr_40_6=0x00030073
+sff_cpld_reg.len_40_6=1
+sff_cpld_reg.bit_offset_40_6=7
+
+sff_cpld_reg.mode_41_6=config
+sff_cpld_reg.src_41_6=cpld
+sff_cpld_reg.frmt_41_6=bit
+sff_cpld_reg.pola_41_6=negative
+sff_cpld_reg.addr_41_6=0x00030072
+sff_cpld_reg.len_41_6=1
+sff_cpld_reg.bit_offset_41_6=0
+
+sff_cpld_reg.mode_42_6=config
+sff_cpld_reg.src_42_6=cpld
+sff_cpld_reg.frmt_42_6=bit
+sff_cpld_reg.pola_42_6=negative
+sff_cpld_reg.addr_42_6=0x00030072
+sff_cpld_reg.len_42_6=1
+sff_cpld_reg.bit_offset_42_6=1
+
+sff_cpld_reg.mode_43_6=config
+sff_cpld_reg.src_43_6=cpld
+sff_cpld_reg.frmt_43_6=bit
+sff_cpld_reg.pola_43_6=negative
+sff_cpld_reg.addr_43_6=0x00030072
+sff_cpld_reg.len_43_6=1
+sff_cpld_reg.bit_offset_43_6=2
+
+sff_cpld_reg.mode_44_6=config
+sff_cpld_reg.src_44_6=cpld
+sff_cpld_reg.frmt_44_6=bit
+sff_cpld_reg.pola_44_6=negative
+sff_cpld_reg.addr_44_6=0x00030072
+sff_cpld_reg.len_44_6=1
+sff_cpld_reg.bit_offset_44_6=3
+
+sff_cpld_reg.mode_45_6=config
+sff_cpld_reg.src_45_6=cpld
+sff_cpld_reg.frmt_45_6=bit
+sff_cpld_reg.pola_45_6=negative
+sff_cpld_reg.addr_45_6=0x00030072
+sff_cpld_reg.len_45_6=1
+sff_cpld_reg.bit_offset_45_6=4
+
+sff_cpld_reg.mode_46_6=config
+sff_cpld_reg.src_46_6=cpld
+sff_cpld_reg.frmt_46_6=bit
+sff_cpld_reg.pola_46_6=negative
+sff_cpld_reg.addr_46_6=0x00030072
+sff_cpld_reg.len_46_6=1
+sff_cpld_reg.bit_offset_46_6=5
+
+sff_cpld_reg.mode_47_6=config
+sff_cpld_reg.src_47_6=cpld
+sff_cpld_reg.frmt_47_6=bit
+sff_cpld_reg.pola_47_6=negative
+sff_cpld_reg.addr_47_6=0x00030072
+sff_cpld_reg.len_47_6=1
+sff_cpld_reg.bit_offset_47_6=6
+
+sff_cpld_reg.mode_48_6=config
+sff_cpld_reg.src_48_6=cpld
+sff_cpld_reg.frmt_48_6=bit
+sff_cpld_reg.pola_48_6=negative
+sff_cpld_reg.addr_48_6=0x00030072
+sff_cpld_reg.len_48_6=1
+sff_cpld_reg.bit_offset_48_6=7
+
+sff_cpld_reg.mode_49_6=config
+sff_cpld_reg.src_49_6=cpld
+sff_cpld_reg.frmt_49_6=bit
+sff_cpld_reg.pola_49_6=negative
+sff_cpld_reg.addr_49_6=0x00030071
+sff_cpld_reg.len_49_6=1
+sff_cpld_reg.bit_offset_49_6=0
+
+sff_cpld_reg.mode_50_6=config
+sff_cpld_reg.src_50_6=cpld
+sff_cpld_reg.frmt_50_6=bit
+sff_cpld_reg.pola_50_6=negative
+sff_cpld_reg.addr_50_6=0x00030071
+sff_cpld_reg.len_50_6=1
+sff_cpld_reg.bit_offset_50_6=1
+
+sff_cpld_reg.mode_51_6=config
+sff_cpld_reg.src_51_6=cpld
+sff_cpld_reg.frmt_51_6=bit
+sff_cpld_reg.pola_51_6=negative
+sff_cpld_reg.addr_51_6=0x00030071
+sff_cpld_reg.len_51_6=1
+sff_cpld_reg.bit_offset_51_6=2
+
+sff_cpld_reg.mode_52_6=config
+sff_cpld_reg.src_52_6=cpld
+sff_cpld_reg.frmt_52_6=bit
+sff_cpld_reg.pola_52_6=negative
+sff_cpld_reg.addr_52_6=0x00030071
+sff_cpld_reg.len_52_6=1
+sff_cpld_reg.bit_offset_52_6=3
+
+sff_cpld_reg.mode_53_6=config
+sff_cpld_reg.src_53_6=cpld
+sff_cpld_reg.frmt_53_6=bit
+sff_cpld_reg.pola_53_6=negative
+sff_cpld_reg.addr_53_6=0x00030071
+sff_cpld_reg.len_53_6=1
+sff_cpld_reg.bit_offset_53_6=4
+
+sff_cpld_reg.mode_54_6=config
+sff_cpld_reg.src_54_6=cpld
+sff_cpld_reg.frmt_54_6=bit
+sff_cpld_reg.pola_54_6=negative
+sff_cpld_reg.addr_54_6=0x00030071
+sff_cpld_reg.len_54_6=1
+sff_cpld_reg.bit_offset_54_6=5
+
+sff_cpld_reg.mode_55_6=config
+sff_cpld_reg.src_55_6=cpld
+sff_cpld_reg.frmt_55_6=bit
+sff_cpld_reg.pola_55_6=negative
+sff_cpld_reg.addr_55_6=0x00030071
+sff_cpld_reg.len_55_6=1
+sff_cpld_reg.bit_offset_55_6=6
+
+sff_cpld_reg.mode_56_6=config
+sff_cpld_reg.src_56_6=cpld
+sff_cpld_reg.frmt_56_6=bit
+sff_cpld_reg.pola_56_6=negative
+sff_cpld_reg.addr_56_6=0x00030071
+sff_cpld_reg.len_56_6=1
+sff_cpld_reg.bit_offset_56_6=7
+
+sff_cpld_reg.mode_57_6=config
+sff_cpld_reg.src_57_6=cpld
+sff_cpld_reg.frmt_57_6=bit
+sff_cpld_reg.pola_57_6=negative
+sff_cpld_reg.addr_57_6=0x00030070
+sff_cpld_reg.len_57_6=1
+sff_cpld_reg.bit_offset_57_6=0
+
+sff_cpld_reg.mode_58_6=config
+sff_cpld_reg.src_58_6=cpld
+sff_cpld_reg.frmt_58_6=bit
+sff_cpld_reg.pola_58_6=negative
+sff_cpld_reg.addr_58_6=0x00030070
+sff_cpld_reg.len_58_6=1
+sff_cpld_reg.bit_offset_58_6=1
+
+sff_cpld_reg.mode_59_6=config
+sff_cpld_reg.src_59_6=cpld
+sff_cpld_reg.frmt_59_6=bit
+sff_cpld_reg.pola_59_6=negative
+sff_cpld_reg.addr_59_6=0x00030070
+sff_cpld_reg.len_59_6=1
+sff_cpld_reg.bit_offset_59_6=2
+
+sff_cpld_reg.mode_60_6=config
+sff_cpld_reg.src_60_6=cpld
+sff_cpld_reg.frmt_60_6=bit
+sff_cpld_reg.pola_60_6=negative
+sff_cpld_reg.addr_60_6=0x00030070
+sff_cpld_reg.len_60_6=1
+sff_cpld_reg.bit_offset_60_6=3
+
+sff_cpld_reg.mode_61_6=config
+sff_cpld_reg.src_61_6=cpld
+sff_cpld_reg.frmt_61_6=bit
+sff_cpld_reg.pola_61_6=negative
+sff_cpld_reg.addr_61_6=0x00030070
+sff_cpld_reg.len_61_6=1
+sff_cpld_reg.bit_offset_61_6=4
+
+sff_cpld_reg.mode_62_6=config
+sff_cpld_reg.src_62_6=cpld
+sff_cpld_reg.frmt_62_6=bit
+sff_cpld_reg.pola_62_6=negative
+sff_cpld_reg.addr_62_6=0x00030070
+sff_cpld_reg.len_62_6=1
+sff_cpld_reg.bit_offset_62_6=5
+
+sff_cpld_reg.mode_63_6=config
+sff_cpld_reg.src_63_6=cpld
+sff_cpld_reg.frmt_63_6=bit
+sff_cpld_reg.pola_63_6=negative
+sff_cpld_reg.addr_63_6=0x00030070
+sff_cpld_reg.len_63_6=1
+sff_cpld_reg.bit_offset_63_6=6
+
+sff_cpld_reg.mode_64_6=config
+sff_cpld_reg.src_64_6=cpld
+sff_cpld_reg.frmt_64_6=bit
+sff_cpld_reg.pola_64_6=negative
+sff_cpld_reg.addr_64_6=0x00030070
+sff_cpld_reg.len_64_6=1
+sff_cpld_reg.bit_offset_64_6=7
+
+# 800G module lpmode signal 
+sff_cpld_reg.mode_1_7=config
+sff_cpld_reg.src_1_7=cpld
+sff_cpld_reg.frmt_1_7=bit
+sff_cpld_reg.pola_1_7=positive
+sff_cpld_reg.addr_1_7=0x00020078
+sff_cpld_reg.len_1_7=1
+sff_cpld_reg.bit_offset_1_7=0
+
+sff_cpld_reg.mode_2_7=config
+sff_cpld_reg.src_2_7=cpld
+sff_cpld_reg.frmt_2_7=bit
+sff_cpld_reg.pola_2_7=positive
+sff_cpld_reg.addr_2_7=0x00020078
+sff_cpld_reg.len_2_7=1
+sff_cpld_reg.bit_offset_2_7=1
+
+sff_cpld_reg.mode_3_7=config
+sff_cpld_reg.src_3_7=cpld
+sff_cpld_reg.frmt_3_7=bit
+sff_cpld_reg.pola_3_7=positive
+sff_cpld_reg.addr_3_7=0x00020078
+sff_cpld_reg.len_3_7=1
+sff_cpld_reg.bit_offset_3_7=2
+
+sff_cpld_reg.mode_4_7=config
+sff_cpld_reg.src_4_7=cpld
+sff_cpld_reg.frmt_4_7=bit
+sff_cpld_reg.pola_4_7=positive
+sff_cpld_reg.addr_4_7=0x00020078
+sff_cpld_reg.len_4_7=1
+sff_cpld_reg.bit_offset_4_7=3
+
+sff_cpld_reg.mode_5_7=config
+sff_cpld_reg.src_5_7=cpld
+sff_cpld_reg.frmt_5_7=bit
+sff_cpld_reg.pola_5_7=positive
+sff_cpld_reg.addr_5_7=0x00020078
+sff_cpld_reg.len_5_7=1
+sff_cpld_reg.bit_offset_5_7=4
+
+sff_cpld_reg.mode_6_7=config
+sff_cpld_reg.src_6_7=cpld
+sff_cpld_reg.frmt_6_7=bit
+sff_cpld_reg.pola_6_7=positive
+sff_cpld_reg.addr_6_7=0x00020078
+sff_cpld_reg.len_6_7=1
+sff_cpld_reg.bit_offset_6_7=5
+
+sff_cpld_reg.mode_7_7=config
+sff_cpld_reg.src_7_7=cpld
+sff_cpld_reg.frmt_7_7=bit
+sff_cpld_reg.pola_7_7=positive
+sff_cpld_reg.addr_7_7=0x00020078
+sff_cpld_reg.len_7_7=1
+sff_cpld_reg.bit_offset_7_7=6
+
+sff_cpld_reg.mode_8_7=config
+sff_cpld_reg.src_8_7=cpld
+sff_cpld_reg.frmt_8_7=bit
+sff_cpld_reg.pola_8_7=positive
+sff_cpld_reg.addr_8_7=0x00020078
+sff_cpld_reg.len_8_7=1
+sff_cpld_reg.bit_offset_8_7=7
+
+sff_cpld_reg.mode_9_7=config
+sff_cpld_reg.src_9_7=cpld
+sff_cpld_reg.frmt_9_7=bit
+sff_cpld_reg.pola_9_7=positive
+sff_cpld_reg.addr_9_7=0x00020077
+sff_cpld_reg.len_9_7=1
+sff_cpld_reg.bit_offset_9_7=0
+
+sff_cpld_reg.mode_10_7=config
+sff_cpld_reg.src_10_7=cpld
+sff_cpld_reg.frmt_10_7=bit
+sff_cpld_reg.pola_10_7=positive
+sff_cpld_reg.addr_10_7=0x00020077
+sff_cpld_reg.len_10_7=1
+sff_cpld_reg.bit_offset_10_7=1
+
+sff_cpld_reg.mode_11_7=config
+sff_cpld_reg.src_11_7=cpld
+sff_cpld_reg.frmt_11_7=bit
+sff_cpld_reg.pola_11_7=positive
+sff_cpld_reg.addr_11_7=0x00020077
+sff_cpld_reg.len_11_7=1
+sff_cpld_reg.bit_offset_11_7=2
+
+sff_cpld_reg.mode_12_7=config
+sff_cpld_reg.src_12_7=cpld
+sff_cpld_reg.frmt_12_7=bit
+sff_cpld_reg.pola_12_7=positive
+sff_cpld_reg.addr_12_7=0x00020077
+sff_cpld_reg.len_12_7=1
+sff_cpld_reg.bit_offset_12_7=3
+
+sff_cpld_reg.mode_13_7=config
+sff_cpld_reg.src_13_7=cpld
+sff_cpld_reg.frmt_13_7=bit
+sff_cpld_reg.pola_13_7=positive
+sff_cpld_reg.addr_13_7=0x00020077
+sff_cpld_reg.len_13_7=1
+sff_cpld_reg.bit_offset_13_7=4
+
+sff_cpld_reg.mode_14_7=config
+sff_cpld_reg.src_14_7=cpld
+sff_cpld_reg.frmt_14_7=bit
+sff_cpld_reg.pola_14_7=positive
+sff_cpld_reg.addr_14_7=0x00020077
+sff_cpld_reg.len_14_7=1
+sff_cpld_reg.bit_offset_14_7=5
+
+sff_cpld_reg.mode_15_7=config
+sff_cpld_reg.src_15_7=cpld
+sff_cpld_reg.frmt_15_7=bit
+sff_cpld_reg.pola_15_7=positive
+sff_cpld_reg.addr_15_7=0x00020077
+sff_cpld_reg.len_15_7=1
+sff_cpld_reg.bit_offset_15_7=6
+
+sff_cpld_reg.mode_16_7=config
+sff_cpld_reg.src_16_7=cpld
+sff_cpld_reg.frmt_16_7=bit
+sff_cpld_reg.pola_16_7=positive
+sff_cpld_reg.addr_16_7=0x00020077
+sff_cpld_reg.len_16_7=1
+sff_cpld_reg.bit_offset_16_7=7
+
+sff_cpld_reg.mode_17_7=config
+sff_cpld_reg.src_17_7=cpld
+sff_cpld_reg.frmt_17_7=bit
+sff_cpld_reg.pola_17_7=positive
+sff_cpld_reg.addr_17_7=0x00020076
+sff_cpld_reg.len_17_7=1
+sff_cpld_reg.bit_offset_17_7=0
+
+sff_cpld_reg.mode_18_7=config
+sff_cpld_reg.src_18_7=cpld
+sff_cpld_reg.frmt_18_7=bit
+sff_cpld_reg.pola_18_7=positive
+sff_cpld_reg.addr_18_7=0x00020076
+sff_cpld_reg.len_18_7=1
+sff_cpld_reg.bit_offset_18_7=1
+
+sff_cpld_reg.mode_19_7=config
+sff_cpld_reg.src_19_7=cpld
+sff_cpld_reg.frmt_19_7=bit
+sff_cpld_reg.pola_19_7=positive
+sff_cpld_reg.addr_19_7=0x00020076
+sff_cpld_reg.len_19_7=1
+sff_cpld_reg.bit_offset_19_7=2
+
+sff_cpld_reg.mode_20_7=config
+sff_cpld_reg.src_20_7=cpld
+sff_cpld_reg.frmt_20_7=bit
+sff_cpld_reg.pola_20_7=positive
+sff_cpld_reg.addr_20_7=0x00020076
+sff_cpld_reg.len_20_7=1
+sff_cpld_reg.bit_offset_20_7=3
+
+sff_cpld_reg.mode_21_7=config
+sff_cpld_reg.src_21_7=cpld
+sff_cpld_reg.frmt_21_7=bit
+sff_cpld_reg.pola_21_7=positive
+sff_cpld_reg.addr_21_7=0x00020076
+sff_cpld_reg.len_21_7=1
+sff_cpld_reg.bit_offset_21_7=4
+
+sff_cpld_reg.mode_22_7=config
+sff_cpld_reg.src_22_7=cpld
+sff_cpld_reg.frmt_22_7=bit
+sff_cpld_reg.pola_22_7=positive
+sff_cpld_reg.addr_22_7=0x00020076
+sff_cpld_reg.len_22_7=1
+sff_cpld_reg.bit_offset_22_7=5
+
+sff_cpld_reg.mode_23_7=config
+sff_cpld_reg.src_23_7=cpld
+sff_cpld_reg.frmt_23_7=bit
+sff_cpld_reg.pola_23_7=positive
+sff_cpld_reg.addr_23_7=0x00020076
+sff_cpld_reg.len_23_7=1
+sff_cpld_reg.bit_offset_23_7=6
+
+sff_cpld_reg.mode_24_7=config
+sff_cpld_reg.src_24_7=cpld
+sff_cpld_reg.frmt_24_7=bit
+sff_cpld_reg.pola_24_7=positive
+sff_cpld_reg.addr_24_7=0x00020076
+sff_cpld_reg.len_24_7=1
+sff_cpld_reg.bit_offset_24_7=7
+
+sff_cpld_reg.mode_25_7=config
+sff_cpld_reg.src_25_7=cpld
+sff_cpld_reg.frmt_25_7=bit
+sff_cpld_reg.pola_25_7=positive
+sff_cpld_reg.addr_25_7=0x00030084
+sff_cpld_reg.len_25_7=1
+sff_cpld_reg.bit_offset_25_7=0
+
+sff_cpld_reg.mode_26_7=config
+sff_cpld_reg.src_26_7=cpld
+sff_cpld_reg.frmt_26_7=bit
+sff_cpld_reg.pola_26_7=positive
+sff_cpld_reg.addr_26_7=0x00030084
+sff_cpld_reg.len_26_7=1
+sff_cpld_reg.bit_offset_26_7=1
+
+sff_cpld_reg.mode_27_7=config
+sff_cpld_reg.src_27_7=cpld
+sff_cpld_reg.frmt_27_7=bit
+sff_cpld_reg.pola_27_7=positive
+sff_cpld_reg.addr_27_7=0x00030084
+sff_cpld_reg.len_27_7=1
+sff_cpld_reg.bit_offset_27_7=2
+
+sff_cpld_reg.mode_28_7=config
+sff_cpld_reg.src_28_7=cpld
+sff_cpld_reg.frmt_28_7=bit
+sff_cpld_reg.pola_28_7=positive
+sff_cpld_reg.addr_28_7=0x00030084
+sff_cpld_reg.len_28_7=1
+sff_cpld_reg.bit_offset_28_7=3
+
+sff_cpld_reg.mode_29_7=config
+sff_cpld_reg.src_29_7=cpld
+sff_cpld_reg.frmt_29_7=bit
+sff_cpld_reg.pola_29_7=positive
+sff_cpld_reg.addr_29_7=0x00030084
+sff_cpld_reg.len_29_7=1
+sff_cpld_reg.bit_offset_29_7=4
+
+sff_cpld_reg.mode_30_7=config
+sff_cpld_reg.src_30_7=cpld
+sff_cpld_reg.frmt_30_7=bit
+sff_cpld_reg.pola_30_7=positive
+sff_cpld_reg.addr_30_7=0x00030084
+sff_cpld_reg.len_30_7=1
+sff_cpld_reg.bit_offset_30_7=5
+
+sff_cpld_reg.mode_31_7=config
+sff_cpld_reg.src_31_7=cpld
+sff_cpld_reg.frmt_31_7=bit
+sff_cpld_reg.pola_31_7=positive
+sff_cpld_reg.addr_31_7=0x00030084
+sff_cpld_reg.len_31_7=1
+sff_cpld_reg.bit_offset_31_7=6
+
+sff_cpld_reg.mode_32_7=config
+sff_cpld_reg.src_32_7=cpld
+sff_cpld_reg.frmt_32_7=bit
+sff_cpld_reg.pola_32_7=positive
+sff_cpld_reg.addr_32_7=0x00030084
+sff_cpld_reg.len_32_7=1
+sff_cpld_reg.bit_offset_32_7=7
+
+sff_cpld_reg.mode_33_7=config
+sff_cpld_reg.src_33_7=cpld
+sff_cpld_reg.frmt_33_7=bit
+sff_cpld_reg.pola_33_7=positive
+sff_cpld_reg.addr_33_7=0x00030083
+sff_cpld_reg.len_33_7=1
+sff_cpld_reg.bit_offset_33_7=0
+
+sff_cpld_reg.mode_34_7=config
+sff_cpld_reg.src_34_7=cpld
+sff_cpld_reg.frmt_34_7=bit
+sff_cpld_reg.pola_34_7=positive
+sff_cpld_reg.addr_34_7=0x00030083
+sff_cpld_reg.len_34_7=1
+sff_cpld_reg.bit_offset_34_7=1
+
+sff_cpld_reg.mode_35_7=config
+sff_cpld_reg.src_35_7=cpld
+sff_cpld_reg.frmt_35_7=bit
+sff_cpld_reg.pola_35_7=positive
+sff_cpld_reg.addr_35_7=0x00030083
+sff_cpld_reg.len_35_7=1
+sff_cpld_reg.bit_offset_35_7=2
+
+sff_cpld_reg.mode_36_7=config
+sff_cpld_reg.src_36_7=cpld
+sff_cpld_reg.frmt_36_7=bit
+sff_cpld_reg.pola_36_7=positive
+sff_cpld_reg.addr_36_7=0x00030083
+sff_cpld_reg.len_36_7=1
+sff_cpld_reg.bit_offset_36_7=3
+
+sff_cpld_reg.mode_37_7=config
+sff_cpld_reg.src_37_7=cpld
+sff_cpld_reg.frmt_37_7=bit
+sff_cpld_reg.pola_37_7=positive
+sff_cpld_reg.addr_37_7=0x00030083
+sff_cpld_reg.len_37_7=1
+sff_cpld_reg.bit_offset_37_7=4
+
+sff_cpld_reg.mode_38_7=config
+sff_cpld_reg.src_38_7=cpld
+sff_cpld_reg.frmt_38_7=bit
+sff_cpld_reg.pola_38_7=positive
+sff_cpld_reg.addr_38_7=0x00030083
+sff_cpld_reg.len_38_7=1
+sff_cpld_reg.bit_offset_38_7=5
+
+sff_cpld_reg.mode_39_7=config
+sff_cpld_reg.src_39_7=cpld
+sff_cpld_reg.frmt_39_7=bit
+sff_cpld_reg.pola_39_7=positive
+sff_cpld_reg.addr_39_7=0x00030083
+sff_cpld_reg.len_39_7=1
+sff_cpld_reg.bit_offset_39_7=6
+
+sff_cpld_reg.mode_40_7=config
+sff_cpld_reg.src_40_7=cpld
+sff_cpld_reg.frmt_40_7=bit
+sff_cpld_reg.pola_40_7=positive
+sff_cpld_reg.addr_40_7=0x00030083
+sff_cpld_reg.len_40_7=1
+sff_cpld_reg.bit_offset_40_7=7
+
+sff_cpld_reg.mode_41_7=config
+sff_cpld_reg.src_41_7=cpld
+sff_cpld_reg.frmt_41_7=bit
+sff_cpld_reg.pola_41_7=positive
+sff_cpld_reg.addr_41_7=0x00030082
+sff_cpld_reg.len_41_7=1
+sff_cpld_reg.bit_offset_41_7=0
+
+sff_cpld_reg.mode_42_7=config
+sff_cpld_reg.src_42_7=cpld
+sff_cpld_reg.frmt_42_7=bit
+sff_cpld_reg.pola_42_7=positive
+sff_cpld_reg.addr_42_7=0x00030082
+sff_cpld_reg.len_42_7=1
+sff_cpld_reg.bit_offset_42_7=1
+
+sff_cpld_reg.mode_43_7=config
+sff_cpld_reg.src_43_7=cpld
+sff_cpld_reg.frmt_43_7=bit
+sff_cpld_reg.pola_43_7=positive
+sff_cpld_reg.addr_43_7=0x00030082
+sff_cpld_reg.len_43_7=1
+sff_cpld_reg.bit_offset_43_7=2
+
+sff_cpld_reg.mode_44_7=config
+sff_cpld_reg.src_44_7=cpld
+sff_cpld_reg.frmt_44_7=bit
+sff_cpld_reg.pola_44_7=positive
+sff_cpld_reg.addr_44_7=0x00030082
+sff_cpld_reg.len_44_7=1
+sff_cpld_reg.bit_offset_44_7=3
+
+sff_cpld_reg.mode_45_7=config
+sff_cpld_reg.src_45_7=cpld
+sff_cpld_reg.frmt_45_7=bit
+sff_cpld_reg.pola_45_7=positive
+sff_cpld_reg.addr_45_7=0x00030082
+sff_cpld_reg.len_45_7=1
+sff_cpld_reg.bit_offset_45_7=4
+
+sff_cpld_reg.mode_46_7=config
+sff_cpld_reg.src_46_7=cpld
+sff_cpld_reg.frmt_46_7=bit
+sff_cpld_reg.pola_46_7=positive
+sff_cpld_reg.addr_46_7=0x00030082
+sff_cpld_reg.len_46_7=1
+sff_cpld_reg.bit_offset_46_7=5
+
+sff_cpld_reg.mode_47_7=config
+sff_cpld_reg.src_47_7=cpld
+sff_cpld_reg.frmt_47_7=bit
+sff_cpld_reg.pola_47_7=positive
+sff_cpld_reg.addr_47_7=0x00030082
+sff_cpld_reg.len_47_7=1
+sff_cpld_reg.bit_offset_47_7=6
+
+sff_cpld_reg.mode_48_7=config
+sff_cpld_reg.src_48_7=cpld
+sff_cpld_reg.frmt_48_7=bit
+sff_cpld_reg.pola_48_7=positive
+sff_cpld_reg.addr_48_7=0x00030082
+sff_cpld_reg.len_48_7=1
+sff_cpld_reg.bit_offset_48_7=7
+
+sff_cpld_reg.mode_49_7=config
+sff_cpld_reg.src_49_7=cpld
+sff_cpld_reg.frmt_49_7=bit
+sff_cpld_reg.pola_49_7=positive
+sff_cpld_reg.addr_49_7=0x00030081
+sff_cpld_reg.len_49_7=1
+sff_cpld_reg.bit_offset_49_7=0
+
+sff_cpld_reg.mode_50_7=config
+sff_cpld_reg.src_50_7=cpld
+sff_cpld_reg.frmt_50_7=bit
+sff_cpld_reg.pola_50_7=positive
+sff_cpld_reg.addr_50_7=0x00030081
+sff_cpld_reg.len_50_7=1
+sff_cpld_reg.bit_offset_50_7=1
+
+sff_cpld_reg.mode_51_7=config
+sff_cpld_reg.src_51_7=cpld
+sff_cpld_reg.frmt_51_7=bit
+sff_cpld_reg.pola_51_7=positive
+sff_cpld_reg.addr_51_7=0x00030081
+sff_cpld_reg.len_51_7=1
+sff_cpld_reg.bit_offset_51_7=2
+
+sff_cpld_reg.mode_52_7=config
+sff_cpld_reg.src_52_7=cpld
+sff_cpld_reg.frmt_52_7=bit
+sff_cpld_reg.pola_52_7=positive
+sff_cpld_reg.addr_52_7=0x00030081
+sff_cpld_reg.len_52_7=1
+sff_cpld_reg.bit_offset_52_7=3
+
+sff_cpld_reg.mode_53_7=config
+sff_cpld_reg.src_53_7=cpld
+sff_cpld_reg.frmt_53_7=bit
+sff_cpld_reg.pola_53_7=positive
+sff_cpld_reg.addr_53_7=0x00030081
+sff_cpld_reg.len_53_7=1
+sff_cpld_reg.bit_offset_53_7=4
+
+sff_cpld_reg.mode_54_7=config
+sff_cpld_reg.src_54_7=cpld
+sff_cpld_reg.frmt_54_7=bit
+sff_cpld_reg.pola_54_7=positive
+sff_cpld_reg.addr_54_7=0x00030081
+sff_cpld_reg.len_54_7=1
+sff_cpld_reg.bit_offset_54_7=5
+
+sff_cpld_reg.mode_55_7=config
+sff_cpld_reg.src_55_7=cpld
+sff_cpld_reg.frmt_55_7=bit
+sff_cpld_reg.pola_55_7=positive
+sff_cpld_reg.addr_55_7=0x00030081
+sff_cpld_reg.len_55_7=1
+sff_cpld_reg.bit_offset_55_7=6
+
+sff_cpld_reg.mode_56_7=config
+sff_cpld_reg.src_56_7=cpld
+sff_cpld_reg.frmt_56_7=bit
+sff_cpld_reg.pola_56_7=positive
+sff_cpld_reg.addr_56_7=0x00030081
+sff_cpld_reg.len_56_7=1
+sff_cpld_reg.bit_offset_56_7=7
+
+sff_cpld_reg.mode_57_7=config
+sff_cpld_reg.src_57_7=cpld
+sff_cpld_reg.frmt_57_7=bit
+sff_cpld_reg.pola_57_7=positive
+sff_cpld_reg.addr_57_7=0x00030080
+sff_cpld_reg.len_57_7=1
+sff_cpld_reg.bit_offset_57_7=0
+
+sff_cpld_reg.mode_58_7=config
+sff_cpld_reg.src_58_7=cpld
+sff_cpld_reg.frmt_58_7=bit
+sff_cpld_reg.pola_58_7=positive
+sff_cpld_reg.addr_58_7=0x00030080
+sff_cpld_reg.len_58_7=1
+sff_cpld_reg.bit_offset_58_7=1
+
+sff_cpld_reg.mode_59_7=config
+sff_cpld_reg.src_59_7=cpld
+sff_cpld_reg.frmt_59_7=bit
+sff_cpld_reg.pola_59_7=positive
+sff_cpld_reg.addr_59_7=0x00030080
+sff_cpld_reg.len_59_7=1
+sff_cpld_reg.bit_offset_59_7=2
+
+sff_cpld_reg.mode_60_7=config
+sff_cpld_reg.src_60_7=cpld
+sff_cpld_reg.frmt_60_7=bit
+sff_cpld_reg.pola_60_7=positive
+sff_cpld_reg.addr_60_7=0x00030080
+sff_cpld_reg.len_60_7=1
+sff_cpld_reg.bit_offset_60_7=3
+
+sff_cpld_reg.mode_61_7=config
+sff_cpld_reg.src_61_7=cpld
+sff_cpld_reg.frmt_61_7=bit
+sff_cpld_reg.pola_61_7=positive
+sff_cpld_reg.addr_61_7=0x00030080
+sff_cpld_reg.len_61_7=1
+sff_cpld_reg.bit_offset_61_7=4
+
+sff_cpld_reg.mode_62_7=config
+sff_cpld_reg.src_62_7=cpld
+sff_cpld_reg.frmt_62_7=bit
+sff_cpld_reg.pola_62_7=positive
+sff_cpld_reg.addr_62_7=0x00030080
+sff_cpld_reg.len_62_7=1
+sff_cpld_reg.bit_offset_62_7=5
+
+sff_cpld_reg.mode_63_7=config
+sff_cpld_reg.src_63_7=cpld
+sff_cpld_reg.frmt_63_7=bit
+sff_cpld_reg.pola_63_7=positive
+sff_cpld_reg.addr_63_7=0x00030080
+sff_cpld_reg.len_63_7=1
+sff_cpld_reg.bit_offset_63_7=6
+
+sff_cpld_reg.mode_64_7=config
+sff_cpld_reg.src_64_7=cpld
+sff_cpld_reg.frmt_64_7=bit
+sff_cpld_reg.pola_64_7=positive
+sff_cpld_reg.addr_64_7=0x00030080
+sff_cpld_reg.len_64_7=1
+sff_cpld_reg.bit_offset_64_7=7
+
+
+# 800G module module_present signal 
+sff_cpld_reg.mode_1_8=config
+sff_cpld_reg.src_1_8=cpld
+sff_cpld_reg.frmt_1_8=bit
+sff_cpld_reg.pola_1_8=negative
+sff_cpld_reg.addr_1_8=0x00020075
+sff_cpld_reg.len_1_8=1
+sff_cpld_reg.bit_offset_1_8=0
+
+sff_cpld_reg.mode_2_8=config
+sff_cpld_reg.src_2_8=cpld
+sff_cpld_reg.frmt_2_8=bit
+sff_cpld_reg.pola_2_8=negative
+sff_cpld_reg.addr_2_8=0x00020075
+sff_cpld_reg.len_2_8=1
+sff_cpld_reg.bit_offset_2_8=1
+
+sff_cpld_reg.mode_3_8=config
+sff_cpld_reg.src_3_8=cpld
+sff_cpld_reg.frmt_3_8=bit
+sff_cpld_reg.pola_3_8=negative
+sff_cpld_reg.addr_3_8=0x00020075
+sff_cpld_reg.len_3_8=1
+sff_cpld_reg.bit_offset_3_8=2
+
+sff_cpld_reg.mode_4_8=config
+sff_cpld_reg.src_4_8=cpld
+sff_cpld_reg.frmt_4_8=bit
+sff_cpld_reg.pola_4_8=negative
+sff_cpld_reg.addr_4_8=0x00020075
+sff_cpld_reg.len_4_8=1
+sff_cpld_reg.bit_offset_4_8=3
+
+sff_cpld_reg.mode_5_8=config
+sff_cpld_reg.src_5_8=cpld
+sff_cpld_reg.frmt_5_8=bit
+sff_cpld_reg.pola_5_8=negative
+sff_cpld_reg.addr_5_8=0x00020075
+sff_cpld_reg.len_5_8=1
+sff_cpld_reg.bit_offset_5_8=4
+
+sff_cpld_reg.mode_6_8=config
+sff_cpld_reg.src_6_8=cpld
+sff_cpld_reg.frmt_6_8=bit
+sff_cpld_reg.pola_6_8=negative
+sff_cpld_reg.addr_6_8=0x00020075
+sff_cpld_reg.len_6_8=1
+sff_cpld_reg.bit_offset_6_8=5
+
+sff_cpld_reg.mode_7_8=config
+sff_cpld_reg.src_7_8=cpld
+sff_cpld_reg.frmt_7_8=bit
+sff_cpld_reg.pola_7_8=negative
+sff_cpld_reg.addr_7_8=0x00020075
+sff_cpld_reg.len_7_8=1
+sff_cpld_reg.bit_offset_7_8=6
+
+sff_cpld_reg.mode_8_8=config
+sff_cpld_reg.src_8_8=cpld
+sff_cpld_reg.frmt_8_8=bit
+sff_cpld_reg.pola_8_8=negative
+sff_cpld_reg.addr_8_8=0x00020075
+sff_cpld_reg.len_8_8=1
+sff_cpld_reg.bit_offset_8_8=7
+
+sff_cpld_reg.mode_9_8=config
+sff_cpld_reg.src_9_8=cpld
+sff_cpld_reg.frmt_9_8=bit
+sff_cpld_reg.pola_9_8=negative
+sff_cpld_reg.addr_9_8=0x00020074
+sff_cpld_reg.len_9_8=1
+sff_cpld_reg.bit_offset_9_8=0
+
+sff_cpld_reg.mode_10_8=config
+sff_cpld_reg.src_10_8=cpld
+sff_cpld_reg.frmt_10_8=bit
+sff_cpld_reg.pola_10_8=negative
+sff_cpld_reg.addr_10_8=0x00020074
+sff_cpld_reg.len_10_8=1
+sff_cpld_reg.bit_offset_10_8=1
+
+sff_cpld_reg.mode_11_8=config
+sff_cpld_reg.src_11_8=cpld
+sff_cpld_reg.frmt_11_8=bit
+sff_cpld_reg.pola_11_8=negative
+sff_cpld_reg.addr_11_8=0x00020074
+sff_cpld_reg.len_11_8=1
+sff_cpld_reg.bit_offset_11_8=2
+
+sff_cpld_reg.mode_12_8=config
+sff_cpld_reg.src_12_8=cpld
+sff_cpld_reg.frmt_12_8=bit
+sff_cpld_reg.pola_12_8=negative
+sff_cpld_reg.addr_12_8=0x00020074
+sff_cpld_reg.len_12_8=1
+sff_cpld_reg.bit_offset_12_8=3
+
+sff_cpld_reg.mode_13_8=config
+sff_cpld_reg.src_13_8=cpld
+sff_cpld_reg.frmt_13_8=bit
+sff_cpld_reg.pola_13_8=negative
+sff_cpld_reg.addr_13_8=0x00020074
+sff_cpld_reg.len_13_8=1
+sff_cpld_reg.bit_offset_13_8=4
+
+sff_cpld_reg.mode_14_8=config
+sff_cpld_reg.src_14_8=cpld
+sff_cpld_reg.frmt_14_8=bit
+sff_cpld_reg.pola_14_8=negative
+sff_cpld_reg.addr_14_8=0x00020074
+sff_cpld_reg.len_14_8=1
+sff_cpld_reg.bit_offset_14_8=5
+
+sff_cpld_reg.mode_15_8=config
+sff_cpld_reg.src_15_8=cpld
+sff_cpld_reg.frmt_15_8=bit
+sff_cpld_reg.pola_15_8=negative
+sff_cpld_reg.addr_15_8=0x00020074
+sff_cpld_reg.len_15_8=1
+sff_cpld_reg.bit_offset_15_8=6
+
+sff_cpld_reg.mode_16_8=config
+sff_cpld_reg.src_16_8=cpld
+sff_cpld_reg.frmt_16_8=bit
+sff_cpld_reg.pola_16_8=negative
+sff_cpld_reg.addr_16_8=0x00020074
+sff_cpld_reg.len_16_8=1
+sff_cpld_reg.bit_offset_16_8=7
+
+sff_cpld_reg.mode_17_8=config
+sff_cpld_reg.src_17_8=cpld
+sff_cpld_reg.frmt_17_8=bit
+sff_cpld_reg.pola_17_8=negative
+sff_cpld_reg.addr_17_8=0x00020073
+sff_cpld_reg.len_17_8=1
+sff_cpld_reg.bit_offset_17_8=0
+
+sff_cpld_reg.mode_18_8=config
+sff_cpld_reg.src_18_8=cpld
+sff_cpld_reg.frmt_18_8=bit
+sff_cpld_reg.pola_18_8=negative
+sff_cpld_reg.addr_18_8=0x00020073
+sff_cpld_reg.len_18_8=1
+sff_cpld_reg.bit_offset_18_8=1
+
+sff_cpld_reg.mode_19_8=config
+sff_cpld_reg.src_19_8=cpld
+sff_cpld_reg.frmt_19_8=bit
+sff_cpld_reg.pola_19_8=negative
+sff_cpld_reg.addr_19_8=0x00020073
+sff_cpld_reg.len_19_8=1
+sff_cpld_reg.bit_offset_19_8=2
+
+sff_cpld_reg.mode_20_8=config
+sff_cpld_reg.src_20_8=cpld
+sff_cpld_reg.frmt_20_8=bit
+sff_cpld_reg.pola_20_8=negative
+sff_cpld_reg.addr_20_8=0x00020073
+sff_cpld_reg.len_20_8=1
+sff_cpld_reg.bit_offset_20_8=3
+
+sff_cpld_reg.mode_21_8=config
+sff_cpld_reg.src_21_8=cpld
+sff_cpld_reg.frmt_21_8=bit
+sff_cpld_reg.pola_21_8=negative
+sff_cpld_reg.addr_21_8=0x00020073
+sff_cpld_reg.len_21_8=1
+sff_cpld_reg.bit_offset_21_8=4
+
+sff_cpld_reg.mode_22_8=config
+sff_cpld_reg.src_22_8=cpld
+sff_cpld_reg.frmt_22_8=bit
+sff_cpld_reg.pola_22_8=negative
+sff_cpld_reg.addr_22_8=0x00020073
+sff_cpld_reg.len_22_8=1
+sff_cpld_reg.bit_offset_22_8=5
+
+sff_cpld_reg.mode_23_8=config
+sff_cpld_reg.src_23_8=cpld
+sff_cpld_reg.frmt_23_8=bit
+sff_cpld_reg.pola_23_8=negative
+sff_cpld_reg.addr_23_8=0x00020073
+sff_cpld_reg.len_23_8=1
+sff_cpld_reg.bit_offset_23_8=6
+
+sff_cpld_reg.mode_24_8=config
+sff_cpld_reg.src_24_8=cpld
+sff_cpld_reg.frmt_24_8=bit
+sff_cpld_reg.pola_24_8=negative
+sff_cpld_reg.addr_24_8=0x00020073
+sff_cpld_reg.len_24_8=1
+sff_cpld_reg.bit_offset_24_8=7
+
+sff_cpld_reg.mode_25_8=config
+sff_cpld_reg.src_25_8=cpld
+sff_cpld_reg.frmt_25_8=bit
+sff_cpld_reg.pola_25_8=negative
+sff_cpld_reg.addr_25_8=0x0003007a
+sff_cpld_reg.len_25_8=1
+sff_cpld_reg.bit_offset_25_8=0
+
+sff_cpld_reg.mode_26_8=config
+sff_cpld_reg.src_26_8=cpld
+sff_cpld_reg.frmt_26_8=bit
+sff_cpld_reg.pola_26_8=negative
+sff_cpld_reg.addr_26_8=0x0003007a
+sff_cpld_reg.len_26_8=1
+sff_cpld_reg.bit_offset_26_8=1
+
+sff_cpld_reg.mode_27_8=config
+sff_cpld_reg.src_27_8=cpld
+sff_cpld_reg.frmt_27_8=bit
+sff_cpld_reg.pola_27_8=negative
+sff_cpld_reg.addr_27_8=0x0003007a
+sff_cpld_reg.len_27_8=1
+sff_cpld_reg.bit_offset_27_8=2
+
+sff_cpld_reg.mode_28_8=config
+sff_cpld_reg.src_28_8=cpld
+sff_cpld_reg.frmt_28_8=bit
+sff_cpld_reg.pola_28_8=negative
+sff_cpld_reg.addr_28_8=0x0003007a
+sff_cpld_reg.len_28_8=1
+sff_cpld_reg.bit_offset_28_8=3
+
+sff_cpld_reg.mode_29_8=config
+sff_cpld_reg.src_29_8=cpld
+sff_cpld_reg.frmt_29_8=bit
+sff_cpld_reg.pola_29_8=negative
+sff_cpld_reg.addr_29_8=0x0003007a
+sff_cpld_reg.len_29_8=1
+sff_cpld_reg.bit_offset_29_8=4
+
+sff_cpld_reg.mode_30_8=config
+sff_cpld_reg.src_30_8=cpld
+sff_cpld_reg.frmt_30_8=bit
+sff_cpld_reg.pola_30_8=negative
+sff_cpld_reg.addr_30_8=0x0003007a
+sff_cpld_reg.len_30_8=1
+sff_cpld_reg.bit_offset_30_8=5
+
+sff_cpld_reg.mode_31_8=config
+sff_cpld_reg.src_31_8=cpld
+sff_cpld_reg.frmt_31_8=bit
+sff_cpld_reg.pola_31_8=negative
+sff_cpld_reg.addr_31_8=0x0003007a
+sff_cpld_reg.len_31_8=1
+sff_cpld_reg.bit_offset_31_8=6
+
+sff_cpld_reg.mode_32_8=config
+sff_cpld_reg.src_32_8=cpld
+sff_cpld_reg.frmt_32_8=bit
+sff_cpld_reg.pola_32_8=negative
+sff_cpld_reg.addr_32_8=0x0003007a
+sff_cpld_reg.len_32_8=1
+sff_cpld_reg.bit_offset_32_8=7
+
+sff_cpld_reg.mode_33_8=config
+sff_cpld_reg.src_33_8=cpld
+sff_cpld_reg.frmt_33_8=bit
+sff_cpld_reg.pola_33_8=negative
+sff_cpld_reg.addr_33_8=0x00030079
+sff_cpld_reg.len_33_8=1
+sff_cpld_reg.bit_offset_33_8=0
+
+sff_cpld_reg.mode_34_8=config
+sff_cpld_reg.src_34_8=cpld
+sff_cpld_reg.frmt_34_8=bit
+sff_cpld_reg.pola_34_8=negative
+sff_cpld_reg.addr_34_8=0x00030079
+sff_cpld_reg.len_34_8=1
+sff_cpld_reg.bit_offset_34_8=1
+
+sff_cpld_reg.mode_35_8=config
+sff_cpld_reg.src_35_8=cpld
+sff_cpld_reg.frmt_35_8=bit
+sff_cpld_reg.pola_35_8=negative
+sff_cpld_reg.addr_35_8=0x00030079
+sff_cpld_reg.len_35_8=1
+sff_cpld_reg.bit_offset_35_8=2
+
+sff_cpld_reg.mode_36_8=config
+sff_cpld_reg.src_36_8=cpld
+sff_cpld_reg.frmt_36_8=bit
+sff_cpld_reg.pola_36_8=negative
+sff_cpld_reg.addr_36_8=0x00030079
+sff_cpld_reg.len_36_8=1
+sff_cpld_reg.bit_offset_36_8=3
+
+sff_cpld_reg.mode_37_8=config
+sff_cpld_reg.src_37_8=cpld
+sff_cpld_reg.frmt_37_8=bit
+sff_cpld_reg.pola_37_8=negative
+sff_cpld_reg.addr_37_8=0x00030079
+sff_cpld_reg.len_37_8=1
+sff_cpld_reg.bit_offset_37_8=4
+
+sff_cpld_reg.mode_38_8=config
+sff_cpld_reg.src_38_8=cpld
+sff_cpld_reg.frmt_38_8=bit
+sff_cpld_reg.pola_38_8=negative
+sff_cpld_reg.addr_38_8=0x00030079
+sff_cpld_reg.len_38_8=1
+sff_cpld_reg.bit_offset_38_8=5
+
+sff_cpld_reg.mode_39_8=config
+sff_cpld_reg.src_39_8=cpld
+sff_cpld_reg.frmt_39_8=bit
+sff_cpld_reg.pola_39_8=negative
+sff_cpld_reg.addr_39_8=0x00030079
+sff_cpld_reg.len_39_8=1
+sff_cpld_reg.bit_offset_39_8=6
+
+sff_cpld_reg.mode_40_8=config
+sff_cpld_reg.src_40_8=cpld
+sff_cpld_reg.frmt_40_8=bit
+sff_cpld_reg.pola_40_8=negative
+sff_cpld_reg.addr_40_8=0x00030079
+sff_cpld_reg.len_40_8=1
+sff_cpld_reg.bit_offset_40_8=7
+
+sff_cpld_reg.mode_41_8=config
+sff_cpld_reg.src_41_8=cpld
+sff_cpld_reg.frmt_41_8=bit
+sff_cpld_reg.pola_41_8=negative
+sff_cpld_reg.addr_41_8=0x00030078
+sff_cpld_reg.len_41_8=1
+sff_cpld_reg.bit_offset_41_8=0
+
+sff_cpld_reg.mode_42_8=config
+sff_cpld_reg.src_42_8=cpld
+sff_cpld_reg.frmt_42_8=bit
+sff_cpld_reg.pola_42_8=negative
+sff_cpld_reg.addr_42_8=0x00030078
+sff_cpld_reg.len_42_8=1
+sff_cpld_reg.bit_offset_42_8=1
+
+sff_cpld_reg.mode_43_8=config
+sff_cpld_reg.src_43_8=cpld
+sff_cpld_reg.frmt_43_8=bit
+sff_cpld_reg.pola_43_8=negative
+sff_cpld_reg.addr_43_8=0x00030078
+sff_cpld_reg.len_43_8=1
+sff_cpld_reg.bit_offset_43_8=2
+
+sff_cpld_reg.mode_44_8=config
+sff_cpld_reg.src_44_8=cpld
+sff_cpld_reg.frmt_44_8=bit
+sff_cpld_reg.pola_44_8=negative
+sff_cpld_reg.addr_44_8=0x00030078
+sff_cpld_reg.len_44_8=1
+sff_cpld_reg.bit_offset_44_8=3
+
+sff_cpld_reg.mode_45_8=config
+sff_cpld_reg.src_45_8=cpld
+sff_cpld_reg.frmt_45_8=bit
+sff_cpld_reg.pola_45_8=negative
+sff_cpld_reg.addr_45_8=0x00030078
+sff_cpld_reg.len_45_8=1
+sff_cpld_reg.bit_offset_45_8=4
+
+sff_cpld_reg.mode_46_8=config
+sff_cpld_reg.src_46_8=cpld
+sff_cpld_reg.frmt_46_8=bit
+sff_cpld_reg.pola_46_8=negative
+sff_cpld_reg.addr_46_8=0x00030078
+sff_cpld_reg.len_46_8=1
+sff_cpld_reg.bit_offset_46_8=5
+
+sff_cpld_reg.mode_47_8=config
+sff_cpld_reg.src_47_8=cpld
+sff_cpld_reg.frmt_47_8=bit
+sff_cpld_reg.pola_47_8=negative
+sff_cpld_reg.addr_47_8=0x00030078
+sff_cpld_reg.len_47_8=1
+sff_cpld_reg.bit_offset_47_8=6
+
+sff_cpld_reg.mode_48_8=config
+sff_cpld_reg.src_48_8=cpld
+sff_cpld_reg.frmt_48_8=bit
+sff_cpld_reg.pola_48_8=negative
+sff_cpld_reg.addr_48_8=0x00030078
+sff_cpld_reg.len_48_8=1
+sff_cpld_reg.bit_offset_48_8=7
+
+sff_cpld_reg.mode_49_8=config
+sff_cpld_reg.src_49_8=cpld
+sff_cpld_reg.frmt_49_8=bit
+sff_cpld_reg.pola_49_8=negative
+sff_cpld_reg.addr_49_8=0x00030077
+sff_cpld_reg.len_49_8=1
+sff_cpld_reg.bit_offset_49_8=0
+
+sff_cpld_reg.mode_50_8=config
+sff_cpld_reg.src_50_8=cpld
+sff_cpld_reg.frmt_50_8=bit
+sff_cpld_reg.pola_50_8=negative
+sff_cpld_reg.addr_50_8=0x00030077
+sff_cpld_reg.len_50_8=1
+sff_cpld_reg.bit_offset_50_8=1
+
+sff_cpld_reg.mode_51_8=config
+sff_cpld_reg.src_51_8=cpld
+sff_cpld_reg.frmt_51_8=bit
+sff_cpld_reg.pola_51_8=negative
+sff_cpld_reg.addr_51_8=0x00030077
+sff_cpld_reg.len_51_8=1
+sff_cpld_reg.bit_offset_51_8=2
+
+sff_cpld_reg.mode_52_8=config
+sff_cpld_reg.src_52_8=cpld
+sff_cpld_reg.frmt_52_8=bit
+sff_cpld_reg.pola_52_8=negative
+sff_cpld_reg.addr_52_8=0x00030077
+sff_cpld_reg.len_52_8=1
+sff_cpld_reg.bit_offset_52_8=3
+
+sff_cpld_reg.mode_53_8=config
+sff_cpld_reg.src_53_8=cpld
+sff_cpld_reg.frmt_53_8=bit
+sff_cpld_reg.pola_53_8=negative
+sff_cpld_reg.addr_53_8=0x00030077
+sff_cpld_reg.len_53_8=1
+sff_cpld_reg.bit_offset_53_8=4
+
+sff_cpld_reg.mode_54_8=config
+sff_cpld_reg.src_54_8=cpld
+sff_cpld_reg.frmt_54_8=bit
+sff_cpld_reg.pola_54_8=negative
+sff_cpld_reg.addr_54_8=0x00030077
+sff_cpld_reg.len_54_8=1
+sff_cpld_reg.bit_offset_54_8=5
+
+sff_cpld_reg.mode_55_8=config
+sff_cpld_reg.src_55_8=cpld
+sff_cpld_reg.frmt_55_8=bit
+sff_cpld_reg.pola_55_8=negative
+sff_cpld_reg.addr_55_8=0x00030077
+sff_cpld_reg.len_55_8=1
+sff_cpld_reg.bit_offset_55_8=6
+
+sff_cpld_reg.mode_56_8=config
+sff_cpld_reg.src_56_8=cpld
+sff_cpld_reg.frmt_56_8=bit
+sff_cpld_reg.pola_56_8=negative
+sff_cpld_reg.addr_56_8=0x00030077
+sff_cpld_reg.len_56_8=1
+sff_cpld_reg.bit_offset_56_8=7
+
+sff_cpld_reg.mode_57_8=config
+sff_cpld_reg.src_57_8=cpld
+sff_cpld_reg.frmt_57_8=bit
+sff_cpld_reg.pola_57_8=negative
+sff_cpld_reg.addr_57_8=0x00030076
+sff_cpld_reg.len_57_8=1
+sff_cpld_reg.bit_offset_57_8=0
+
+sff_cpld_reg.mode_58_8=config
+sff_cpld_reg.src_58_8=cpld
+sff_cpld_reg.frmt_58_8=bit
+sff_cpld_reg.pola_58_8=negative
+sff_cpld_reg.addr_58_8=0x00030076
+sff_cpld_reg.len_58_8=1
+sff_cpld_reg.bit_offset_58_8=1
+
+sff_cpld_reg.mode_59_8=config
+sff_cpld_reg.src_59_8=cpld
+sff_cpld_reg.frmt_59_8=bit
+sff_cpld_reg.pola_59_8=negative
+sff_cpld_reg.addr_59_8=0x00030076
+sff_cpld_reg.len_59_8=1
+sff_cpld_reg.bit_offset_59_8=2
+
+sff_cpld_reg.mode_60_8=config
+sff_cpld_reg.src_60_8=cpld
+sff_cpld_reg.frmt_60_8=bit
+sff_cpld_reg.pola_60_8=negative
+sff_cpld_reg.addr_60_8=0x00030076
+sff_cpld_reg.len_60_8=1
+sff_cpld_reg.bit_offset_60_8=3
+
+sff_cpld_reg.mode_61_8=config
+sff_cpld_reg.src_61_8=cpld
+sff_cpld_reg.frmt_61_8=bit
+sff_cpld_reg.pola_61_8=negative
+sff_cpld_reg.addr_61_8=0x00030076
+sff_cpld_reg.len_61_8=1
+sff_cpld_reg.bit_offset_61_8=4
+
+sff_cpld_reg.mode_62_8=config
+sff_cpld_reg.src_62_8=cpld
+sff_cpld_reg.frmt_62_8=bit
+sff_cpld_reg.pola_62_8=negative
+sff_cpld_reg.addr_62_8=0x00030076
+sff_cpld_reg.len_62_8=1
+sff_cpld_reg.bit_offset_62_8=5
+
+sff_cpld_reg.mode_63_8=config
+sff_cpld_reg.src_63_8=cpld
+sff_cpld_reg.frmt_63_8=bit
+sff_cpld_reg.pola_63_8=negative
+sff_cpld_reg.addr_63_8=0x00030076
+sff_cpld_reg.len_63_8=1
+sff_cpld_reg.bit_offset_63_8=6
+
+sff_cpld_reg.mode_64_8=config
+sff_cpld_reg.src_64_8=cpld
+sff_cpld_reg.frmt_64_8=bit
+sff_cpld_reg.pola_64_8=negative
+sff_cpld_reg.addr_64_8=0x00030076
+sff_cpld_reg.len_64_8=1
+sff_cpld_reg.bit_offset_64_8=7
+
+sff_cpld_reg.mode_65_8=config
+sff_cpld_reg.src_65_8=cpld
+sff_cpld_reg.frmt_65_8=bit
+sff_cpld_reg.pola_65_8=negative
+sff_cpld_reg.addr_65_8=0x00050069
+sff_cpld_reg.len_65_8=1
+sff_cpld_reg.bit_offset_65_8=0
+
+sff_cpld_reg.mode_66_8=config
+sff_cpld_reg.src_66_8=cpld
+sff_cpld_reg.frmt_66_8=bit
+sff_cpld_reg.pola_66_8=negative
+sff_cpld_reg.addr_66_8=0x00050069
+sff_cpld_reg.len_66_8=1
+sff_cpld_reg.bit_offset_66_8=1
+
+
+# 800G module power_on signal 
+sff_cpld_reg.mode_1_1=config
+sff_cpld_reg.src_1_1=cpld
+sff_cpld_reg.frmt_1_1=bit
+sff_cpld_reg.addr_1_1=0x00040080
+sff_cpld_reg.len_1_1=1
+sff_cpld_reg.bit_offset_1_1=0
+
+sff_cpld_reg.mode_2_1=config
+sff_cpld_reg.src_2_1=cpld
+sff_cpld_reg.frmt_2_1=bit
+sff_cpld_reg.addr_2_1=0x00040080
+sff_cpld_reg.len_2_1=1
+sff_cpld_reg.bit_offset_2_1=0
+
+sff_cpld_reg.mode_3_1=config
+sff_cpld_reg.src_3_1=cpld
+sff_cpld_reg.frmt_3_1=bit
+sff_cpld_reg.addr_3_1=0x00040080
+sff_cpld_reg.len_3_1=1
+sff_cpld_reg.bit_offset_3_1=0
+
+sff_cpld_reg.mode_4_1=config
+sff_cpld_reg.src_4_1=cpld
+sff_cpld_reg.frmt_4_1=bit
+sff_cpld_reg.addr_4_1=0x00040080
+sff_cpld_reg.len_4_1=1
+sff_cpld_reg.bit_offset_4_1=0
+
+sff_cpld_reg.mode_5_1=config
+sff_cpld_reg.src_5_1=cpld
+sff_cpld_reg.frmt_5_1=bit
+sff_cpld_reg.addr_5_1=0x00040081
+sff_cpld_reg.len_5_1=1
+sff_cpld_reg.bit_offset_5_1=0
+
+sff_cpld_reg.mode_6_1=config
+sff_cpld_reg.src_6_1=cpld
+sff_cpld_reg.frmt_6_1=bit
+sff_cpld_reg.addr_6_1=0x00040081
+sff_cpld_reg.len_6_1=1
+sff_cpld_reg.bit_offset_6_1=0
+
+sff_cpld_reg.mode_7_1=config
+sff_cpld_reg.src_7_1=cpld
+sff_cpld_reg.frmt_7_1=bit
+sff_cpld_reg.addr_7_1=0x00040081
+sff_cpld_reg.len_7_1=1
+sff_cpld_reg.bit_offset_7_1=0
+
+sff_cpld_reg.mode_8_1=config
+sff_cpld_reg.src_8_1=cpld
+sff_cpld_reg.frmt_8_1=bit
+sff_cpld_reg.addr_8_1=0x00040081
+sff_cpld_reg.len_8_1=1
+sff_cpld_reg.bit_offset_8_1=0
+
+sff_cpld_reg.mode_9_1=config
+sff_cpld_reg.src_9_1=cpld
+sff_cpld_reg.frmt_9_1=bit
+sff_cpld_reg.addr_9_1=0x00040080
+sff_cpld_reg.len_9_1=1
+sff_cpld_reg.bit_offset_9_1=1
+
+sff_cpld_reg.mode_10_1=config
+sff_cpld_reg.src_10_1=cpld
+sff_cpld_reg.frmt_10_1=bit
+sff_cpld_reg.addr_10_1=0x00040080
+sff_cpld_reg.len_10_1=1
+sff_cpld_reg.bit_offset_10_1=1
+
+sff_cpld_reg.mode_11_1=config
+sff_cpld_reg.src_11_1=cpld
+sff_cpld_reg.frmt_11_1=bit
+sff_cpld_reg.addr_11_1=0x00040080
+sff_cpld_reg.len_11_1=1
+sff_cpld_reg.bit_offset_11_1=1
+
+sff_cpld_reg.mode_12_1=config
+sff_cpld_reg.src_12_1=cpld
+sff_cpld_reg.frmt_12_1=bit
+sff_cpld_reg.addr_12_1=0x00040080
+sff_cpld_reg.len_12_1=1
+sff_cpld_reg.bit_offset_12_1=1
+
+sff_cpld_reg.mode_13_1=config
+sff_cpld_reg.src_13_1=cpld
+sff_cpld_reg.frmt_13_1=bit
+sff_cpld_reg.addr_13_1=0x00040081
+sff_cpld_reg.len_13_1=1
+sff_cpld_reg.bit_offset_13_1=1
+
+sff_cpld_reg.mode_14_1=config
+sff_cpld_reg.src_14_1=cpld
+sff_cpld_reg.frmt_14_1=bit
+sff_cpld_reg.addr_14_1=0x00040081
+sff_cpld_reg.len_14_1=1
+sff_cpld_reg.bit_offset_14_1=1
+
+sff_cpld_reg.mode_15_1=config
+sff_cpld_reg.src_15_1=cpld
+sff_cpld_reg.frmt_15_1=bit
+sff_cpld_reg.addr_15_1=0x00040081
+sff_cpld_reg.len_15_1=1
+sff_cpld_reg.bit_offset_15_1=1
+
+sff_cpld_reg.mode_16_1=config
+sff_cpld_reg.src_16_1=cpld
+sff_cpld_reg.frmt_16_1=bit
+sff_cpld_reg.addr_16_1=0x00040081
+sff_cpld_reg.len_16_1=1
+sff_cpld_reg.bit_offset_16_1=1
+
+sff_cpld_reg.mode_17_1=config
+sff_cpld_reg.src_17_1=cpld
+sff_cpld_reg.frmt_17_1=bit
+sff_cpld_reg.addr_17_1=0x00040080
+sff_cpld_reg.len_17_1=1
+sff_cpld_reg.bit_offset_17_1=2
+
+sff_cpld_reg.mode_18_1=config
+sff_cpld_reg.src_18_1=cpld
+sff_cpld_reg.frmt_18_1=bit
+sff_cpld_reg.addr_18_1=0x00040080
+sff_cpld_reg.len_18_1=1
+sff_cpld_reg.bit_offset_18_1=2
+
+sff_cpld_reg.mode_19_1=config
+sff_cpld_reg.src_19_1=cpld
+sff_cpld_reg.frmt_19_1=bit
+sff_cpld_reg.addr_19_1=0x00040080
+sff_cpld_reg.len_19_1=1
+sff_cpld_reg.bit_offset_19_1=2
+
+sff_cpld_reg.mode_20_1=config
+sff_cpld_reg.src_20_1=cpld
+sff_cpld_reg.frmt_20_1=bit
+sff_cpld_reg.addr_20_1=0x00040080
+sff_cpld_reg.len_20_1=1
+sff_cpld_reg.bit_offset_20_1=2
+
+sff_cpld_reg.mode_21_1=config
+sff_cpld_reg.src_21_1=cpld
+sff_cpld_reg.frmt_21_1=bit
+sff_cpld_reg.addr_21_1=0x00040081
+sff_cpld_reg.len_21_1=1
+sff_cpld_reg.bit_offset_21_1=2
+
+sff_cpld_reg.mode_22_1=config
+sff_cpld_reg.src_22_1=cpld
+sff_cpld_reg.frmt_22_1=bit
+sff_cpld_reg.addr_22_1=0x00040081
+sff_cpld_reg.len_22_1=1
+sff_cpld_reg.bit_offset_22_1=2
+
+sff_cpld_reg.mode_23_1=config
+sff_cpld_reg.src_23_1=cpld
+sff_cpld_reg.frmt_23_1=bit
+sff_cpld_reg.addr_23_1=0x00040081
+sff_cpld_reg.len_23_1=1
+sff_cpld_reg.bit_offset_23_1=2
+
+sff_cpld_reg.mode_24_1=config
+sff_cpld_reg.src_24_1=cpld
+sff_cpld_reg.frmt_24_1=bit
+sff_cpld_reg.addr_24_1=0x00040081
+sff_cpld_reg.len_24_1=1
+sff_cpld_reg.bit_offset_24_1=2
+
+sff_cpld_reg.mode_25_1=config
+sff_cpld_reg.src_25_1=cpld
+sff_cpld_reg.frmt_25_1=bit
+sff_cpld_reg.addr_25_1=0x00040080
+sff_cpld_reg.len_25_1=1
+sff_cpld_reg.bit_offset_25_1=3
+
+sff_cpld_reg.mode_26_1=config
+sff_cpld_reg.src_26_1=cpld
+sff_cpld_reg.frmt_26_1=bit
+sff_cpld_reg.addr_26_1=0x00040080
+sff_cpld_reg.len_26_1=1
+sff_cpld_reg.bit_offset_26_1=3
+
+sff_cpld_reg.mode_27_1=config
+sff_cpld_reg.src_27_1=cpld
+sff_cpld_reg.frmt_27_1=bit
+sff_cpld_reg.addr_27_1=0x00040080
+sff_cpld_reg.len_27_1=1
+sff_cpld_reg.bit_offset_27_1=3
+
+sff_cpld_reg.mode_28_1=config
+sff_cpld_reg.src_28_1=cpld
+sff_cpld_reg.frmt_28_1=bit
+sff_cpld_reg.addr_28_1=0x00040080
+sff_cpld_reg.len_28_1=1
+sff_cpld_reg.bit_offset_28_1=3
+
+sff_cpld_reg.mode_29_1=config
+sff_cpld_reg.src_29_1=cpld
+sff_cpld_reg.frmt_29_1=bit
+sff_cpld_reg.addr_29_1=0x00040081
+sff_cpld_reg.len_29_1=1
+sff_cpld_reg.bit_offset_29_1=3
+
+sff_cpld_reg.mode_30_1=config
+sff_cpld_reg.src_30_1=cpld
+sff_cpld_reg.frmt_30_1=bit
+sff_cpld_reg.addr_30_1=0x00040081
+sff_cpld_reg.len_30_1=1
+sff_cpld_reg.bit_offset_30_1=3
+
+sff_cpld_reg.mode_31_1=config
+sff_cpld_reg.src_31_1=cpld
+sff_cpld_reg.frmt_31_1=bit
+sff_cpld_reg.addr_31_1=0x00040081
+sff_cpld_reg.len_31_1=1
+sff_cpld_reg.bit_offset_31_1=3
+
+sff_cpld_reg.mode_32_1=config
+sff_cpld_reg.src_32_1=cpld
+sff_cpld_reg.frmt_32_1=bit
+sff_cpld_reg.addr_32_1=0x00040081
+sff_cpld_reg.len_32_1=1
+sff_cpld_reg.bit_offset_32_1=3
+
+sff_cpld_reg.mode_33_1=config
+sff_cpld_reg.src_33_1=cpld
+sff_cpld_reg.frmt_33_1=bit
+sff_cpld_reg.addr_33_1=0x00040080
+sff_cpld_reg.len_33_1=1
+sff_cpld_reg.bit_offset_33_1=4
+
+sff_cpld_reg.mode_34_1=config
+sff_cpld_reg.src_34_1=cpld
+sff_cpld_reg.frmt_34_1=bit
+sff_cpld_reg.addr_34_1=0x00040080
+sff_cpld_reg.len_34_1=1
+sff_cpld_reg.bit_offset_34_1=4
+
+sff_cpld_reg.mode_35_1=config
+sff_cpld_reg.src_35_1=cpld
+sff_cpld_reg.frmt_35_1=bit
+sff_cpld_reg.addr_35_1=0x00040080
+sff_cpld_reg.len_35_1=1
+sff_cpld_reg.bit_offset_35_1=4
+
+sff_cpld_reg.mode_36_1=config
+sff_cpld_reg.src_36_1=cpld
+sff_cpld_reg.frmt_36_1=bit
+sff_cpld_reg.addr_36_1=0x00040080
+sff_cpld_reg.len_36_1=1
+sff_cpld_reg.bit_offset_36_1=4
+
+sff_cpld_reg.mode_37_1=config
+sff_cpld_reg.src_37_1=cpld
+sff_cpld_reg.frmt_37_1=bit
+sff_cpld_reg.addr_37_1=0x00040081
+sff_cpld_reg.len_37_1=1
+sff_cpld_reg.bit_offset_37_1=4
+
+sff_cpld_reg.mode_38_1=config
+sff_cpld_reg.src_38_1=cpld
+sff_cpld_reg.frmt_38_1=bit
+sff_cpld_reg.addr_38_1=0x00040081
+sff_cpld_reg.len_38_1=1
+sff_cpld_reg.bit_offset_38_1=4
+
+sff_cpld_reg.mode_39_1=config
+sff_cpld_reg.src_39_1=cpld
+sff_cpld_reg.frmt_39_1=bit
+sff_cpld_reg.addr_39_1=0x00040081
+sff_cpld_reg.len_39_1=1
+sff_cpld_reg.bit_offset_39_1=4
+
+sff_cpld_reg.mode_40_1=config
+sff_cpld_reg.src_40_1=cpld
+sff_cpld_reg.frmt_40_1=bit
+sff_cpld_reg.addr_40_1=0x00040081
+sff_cpld_reg.len_40_1=1
+sff_cpld_reg.bit_offset_40_1=4
+
+sff_cpld_reg.mode_41_1=config
+sff_cpld_reg.src_41_1=cpld
+sff_cpld_reg.frmt_41_1=bit
+sff_cpld_reg.addr_41_1=0x00040080
+sff_cpld_reg.len_41_1=1
+sff_cpld_reg.bit_offset_41_1=5
+
+sff_cpld_reg.mode_42_1=config
+sff_cpld_reg.src_42_1=cpld
+sff_cpld_reg.frmt_42_1=bit
+sff_cpld_reg.addr_42_1=0x00040080
+sff_cpld_reg.len_42_1=1
+sff_cpld_reg.bit_offset_42_1=5
+
+sff_cpld_reg.mode_43_1=config
+sff_cpld_reg.src_43_1=cpld
+sff_cpld_reg.frmt_43_1=bit
+sff_cpld_reg.addr_43_1=0x00040080
+sff_cpld_reg.len_43_1=1
+sff_cpld_reg.bit_offset_43_1=5
+
+sff_cpld_reg.mode_44_1=config
+sff_cpld_reg.src_44_1=cpld
+sff_cpld_reg.frmt_44_1=bit
+sff_cpld_reg.addr_44_1=0x00040080
+sff_cpld_reg.len_44_1=1
+sff_cpld_reg.bit_offset_44_1=5
+
+sff_cpld_reg.mode_45_1=config
+sff_cpld_reg.src_45_1=cpld
+sff_cpld_reg.frmt_45_1=bit
+sff_cpld_reg.addr_45_1=0x00040081
+sff_cpld_reg.len_45_1=1
+sff_cpld_reg.bit_offset_45_1=5
+
+sff_cpld_reg.mode_46_1=config
+sff_cpld_reg.src_46_1=cpld
+sff_cpld_reg.frmt_46_1=bit
+sff_cpld_reg.addr_46_1=0x00040081
+sff_cpld_reg.len_46_1=1
+sff_cpld_reg.bit_offset_46_1=5
+
+sff_cpld_reg.mode_47_1=config
+sff_cpld_reg.src_47_1=cpld
+sff_cpld_reg.frmt_47_1=bit
+sff_cpld_reg.addr_47_1=0x00040081
+sff_cpld_reg.len_47_1=1
+sff_cpld_reg.bit_offset_47_1=5
+
+sff_cpld_reg.mode_48_1=config
+sff_cpld_reg.src_48_1=cpld
+sff_cpld_reg.frmt_48_1=bit
+sff_cpld_reg.addr_48_1=0x00040081
+sff_cpld_reg.len_48_1=1
+sff_cpld_reg.bit_offset_48_1=5
+
+sff_cpld_reg.mode_49_1=config
+sff_cpld_reg.src_49_1=cpld
+sff_cpld_reg.frmt_49_1=bit
+sff_cpld_reg.addr_49_1=0x00040080
+sff_cpld_reg.len_49_1=1
+sff_cpld_reg.bit_offset_49_1=6
+
+sff_cpld_reg.mode_50_1=config
+sff_cpld_reg.src_50_1=cpld
+sff_cpld_reg.frmt_50_1=bit
+sff_cpld_reg.addr_50_1=0x00040080
+sff_cpld_reg.len_50_1=1
+sff_cpld_reg.bit_offset_50_1=6
+
+sff_cpld_reg.mode_51_1=config
+sff_cpld_reg.src_51_1=cpld
+sff_cpld_reg.frmt_51_1=bit
+sff_cpld_reg.addr_51_1=0x00040080
+sff_cpld_reg.len_51_1=1
+sff_cpld_reg.bit_offset_51_1=6
+
+sff_cpld_reg.mode_52_1=config
+sff_cpld_reg.src_52_1=cpld
+sff_cpld_reg.frmt_52_1=bit
+sff_cpld_reg.addr_52_1=0x00040080
+sff_cpld_reg.len_52_1=1
+sff_cpld_reg.bit_offset_52_1=6
+
+sff_cpld_reg.mode_53_1=config
+sff_cpld_reg.src_53_1=cpld
+sff_cpld_reg.frmt_53_1=bit
+sff_cpld_reg.addr_53_1=0x00040081
+sff_cpld_reg.len_53_1=1
+sff_cpld_reg.bit_offset_53_1=6
+
+sff_cpld_reg.mode_54_1=config
+sff_cpld_reg.src_54_1=cpld
+sff_cpld_reg.frmt_54_1=bit
+sff_cpld_reg.addr_54_1=0x00040081
+sff_cpld_reg.len_54_1=1
+sff_cpld_reg.bit_offset_54_1=6
+
+sff_cpld_reg.mode_55_1=config
+sff_cpld_reg.src_55_1=cpld
+sff_cpld_reg.frmt_55_1=bit
+sff_cpld_reg.addr_55_1=0x00040081
+sff_cpld_reg.len_55_1=1
+sff_cpld_reg.bit_offset_55_1=6
+
+sff_cpld_reg.mode_56_1=config
+sff_cpld_reg.src_56_1=cpld
+sff_cpld_reg.frmt_56_1=bit
+sff_cpld_reg.addr_56_1=0x00040081
+sff_cpld_reg.len_56_1=1
+sff_cpld_reg.bit_offset_56_1=6
+
+sff_cpld_reg.mode_57_1=config
+sff_cpld_reg.src_57_1=cpld
+sff_cpld_reg.frmt_57_1=bit
+sff_cpld_reg.addr_57_1=0x00040080
+sff_cpld_reg.len_57_1=1
+sff_cpld_reg.bit_offset_57_1=7
+
+sff_cpld_reg.mode_58_1=config
+sff_cpld_reg.src_58_1=cpld
+sff_cpld_reg.frmt_58_1=bit
+sff_cpld_reg.addr_58_1=0x00040080
+sff_cpld_reg.len_58_1=1
+sff_cpld_reg.bit_offset_58_1=7
+
+sff_cpld_reg.mode_59_1=config
+sff_cpld_reg.src_59_1=cpld
+sff_cpld_reg.frmt_59_1=bit
+sff_cpld_reg.addr_59_1=0x00040080
+sff_cpld_reg.len_59_1=1
+sff_cpld_reg.bit_offset_59_1=7
+
+sff_cpld_reg.mode_60_1=config
+sff_cpld_reg.src_60_1=cpld
+sff_cpld_reg.frmt_60_1=bit
+sff_cpld_reg.addr_60_1=0x00040080
+sff_cpld_reg.len_60_1=1
+sff_cpld_reg.bit_offset_60_1=7
+
+sff_cpld_reg.mode_61_1=config
+sff_cpld_reg.src_61_1=cpld
+sff_cpld_reg.frmt_61_1=bit
+sff_cpld_reg.addr_61_1=0x00040081
+sff_cpld_reg.len_61_1=1
+sff_cpld_reg.bit_offset_61_1=7
+
+sff_cpld_reg.mode_62_1=config
+sff_cpld_reg.src_62_1=cpld
+sff_cpld_reg.frmt_62_1=bit
+sff_cpld_reg.addr_62_1=0x00040081
+sff_cpld_reg.len_62_1=1
+sff_cpld_reg.bit_offset_62_1=7
+
+sff_cpld_reg.mode_63_1=config
+sff_cpld_reg.src_63_1=cpld
+sff_cpld_reg.frmt_63_1=bit
+sff_cpld_reg.addr_63_1=0x00040081
+sff_cpld_reg.len_63_1=1
+sff_cpld_reg.bit_offset_63_1=7
+
+sff_cpld_reg.mode_64_1=config
+sff_cpld_reg.src_64_1=cpld
+sff_cpld_reg.frmt_64_1=bit
+sff_cpld_reg.addr_64_1=0x00040081
+sff_cpld_reg.len_64_1=1
+sff_cpld_reg.bit_offset_64_1=7
+
+
+# interrupt
+sff_cpld_reg.mode_1_9=config
+sff_cpld_reg.src_1_9=cpld
+sff_cpld_reg.frmt_1_9=bit
+sff_cpld_reg.pola_1_9=negative
+sff_cpld_reg.addr_1_9=0x00020062
+sff_cpld_reg.len_1_9=1
+sff_cpld_reg.bit_offset_1_9=0
+
+sff_cpld_reg.mode_2_9=config
+sff_cpld_reg.src_2_9=cpld
+sff_cpld_reg.frmt_2_9=bit
+sff_cpld_reg.pola_2_9=negative
+sff_cpld_reg.addr_2_9=0x00020062
+sff_cpld_reg.len_2_9=1
+sff_cpld_reg.bit_offset_2_9=1
+
+sff_cpld_reg.mode_3_9=config
+sff_cpld_reg.src_3_9=cpld
+sff_cpld_reg.frmt_3_9=bit
+sff_cpld_reg.pola_3_9=negative
+sff_cpld_reg.addr_3_9=0x00020062
+sff_cpld_reg.len_3_9=1
+sff_cpld_reg.bit_offset_3_9=2
+
+sff_cpld_reg.mode_4_9=config
+sff_cpld_reg.src_4_9=cpld
+sff_cpld_reg.frmt_4_9=bit
+sff_cpld_reg.pola_4_9=negative
+sff_cpld_reg.addr_4_9=0x00020062
+sff_cpld_reg.len_4_9=1
+sff_cpld_reg.bit_offset_4_9=3
+
+sff_cpld_reg.mode_5_9=config
+sff_cpld_reg.src_5_9=cpld
+sff_cpld_reg.frmt_5_9=bit
+sff_cpld_reg.pola_5_9=negative
+sff_cpld_reg.addr_5_9=0x00020062
+sff_cpld_reg.len_5_9=1
+sff_cpld_reg.bit_offset_5_9=4
+
+sff_cpld_reg.mode_6_9=config
+sff_cpld_reg.src_6_9=cpld
+sff_cpld_reg.frmt_6_9=bit
+sff_cpld_reg.pola_6_9=negative
+sff_cpld_reg.addr_6_9=0x00020062
+sff_cpld_reg.len_6_9=1
+sff_cpld_reg.bit_offset_6_9=5
+
+sff_cpld_reg.mode_7_9=config
+sff_cpld_reg.src_7_9=cpld
+sff_cpld_reg.frmt_7_9=bit
+sff_cpld_reg.pola_7_9=negative
+sff_cpld_reg.addr_7_9=0x00020062
+sff_cpld_reg.len_7_9=1
+sff_cpld_reg.bit_offset_7_9=6
+
+sff_cpld_reg.mode_8_9=config
+sff_cpld_reg.src_8_9=cpld
+sff_cpld_reg.frmt_8_9=bit
+sff_cpld_reg.pola_8_9=negative
+sff_cpld_reg.addr_8_9=0x00020062
+sff_cpld_reg.len_8_9=1
+sff_cpld_reg.bit_offset_8_9=7
+
+sff_cpld_reg.mode_9_9=config
+sff_cpld_reg.src_9_9=cpld
+sff_cpld_reg.frmt_9_9=bit
+sff_cpld_reg.pola_9_9=negative
+sff_cpld_reg.addr_9_9=0x00020061
+sff_cpld_reg.len_9_9=1
+sff_cpld_reg.bit_offset_9_9=0
+
+sff_cpld_reg.mode_10_9=config
+sff_cpld_reg.src_10_9=cpld
+sff_cpld_reg.frmt_10_9=bit
+sff_cpld_reg.pola_10_9=negative
+sff_cpld_reg.addr_10_9=0x00020061
+sff_cpld_reg.len_10_9=1
+sff_cpld_reg.bit_offset_10_9=1
+
+sff_cpld_reg.mode_11_9=config
+sff_cpld_reg.src_11_9=cpld
+sff_cpld_reg.frmt_11_9=bit
+sff_cpld_reg.pola_11_9=negative
+sff_cpld_reg.addr_11_9=0x00020061
+sff_cpld_reg.len_11_9=1
+sff_cpld_reg.bit_offset_11_9=2
+
+sff_cpld_reg.mode_12_9=config
+sff_cpld_reg.src_12_9=cpld
+sff_cpld_reg.frmt_12_9=bit
+sff_cpld_reg.pola_12_9=negative
+sff_cpld_reg.addr_12_9=0x00020061
+sff_cpld_reg.len_12_9=1
+sff_cpld_reg.bit_offset_12_9=3
+
+sff_cpld_reg.mode_13_9=config
+sff_cpld_reg.src_13_9=cpld
+sff_cpld_reg.frmt_13_9=bit
+sff_cpld_reg.pola_13_9=negative
+sff_cpld_reg.addr_13_9=0x00020061
+sff_cpld_reg.len_13_9=1
+sff_cpld_reg.bit_offset_13_9=4
+
+sff_cpld_reg.mode_14_9=config
+sff_cpld_reg.src_14_9=cpld
+sff_cpld_reg.frmt_14_9=bit
+sff_cpld_reg.pola_14_9=negative
+sff_cpld_reg.addr_14_9=0x00020061
+sff_cpld_reg.len_14_9=1
+sff_cpld_reg.bit_offset_14_9=5
+
+sff_cpld_reg.mode_15_9=config
+sff_cpld_reg.src_15_9=cpld
+sff_cpld_reg.frmt_15_9=bit
+sff_cpld_reg.pola_15_9=negative
+sff_cpld_reg.addr_15_9=0x00020061
+sff_cpld_reg.len_15_9=1
+sff_cpld_reg.bit_offset_15_9=6
+
+sff_cpld_reg.mode_16_9=config
+sff_cpld_reg.src_16_9=cpld
+sff_cpld_reg.frmt_16_9=bit
+sff_cpld_reg.pola_16_9=negative
+sff_cpld_reg.addr_16_9=0x00020061
+sff_cpld_reg.len_16_9=1
+sff_cpld_reg.bit_offset_16_9=7
+
+sff_cpld_reg.mode_17_9=config
+sff_cpld_reg.src_17_9=cpld
+sff_cpld_reg.frmt_17_9=bit
+sff_cpld_reg.pola_17_9=negative
+sff_cpld_reg.addr_17_9=0x00020060
+sff_cpld_reg.len_17_9=1
+sff_cpld_reg.bit_offset_17_9=0
+
+sff_cpld_reg.mode_18_9=config
+sff_cpld_reg.src_18_9=cpld
+sff_cpld_reg.frmt_18_9=bit
+sff_cpld_reg.pola_18_9=negative
+sff_cpld_reg.addr_18_9=0x00020060
+sff_cpld_reg.len_18_9=1
+sff_cpld_reg.bit_offset_18_9=1
+
+sff_cpld_reg.mode_19_9=config
+sff_cpld_reg.src_19_9=cpld
+sff_cpld_reg.frmt_19_9=bit
+sff_cpld_reg.pola_19_9=negative
+sff_cpld_reg.addr_19_9=0x00020060
+sff_cpld_reg.len_19_9=1
+sff_cpld_reg.bit_offset_19_9=2
+
+sff_cpld_reg.mode_20_9=config
+sff_cpld_reg.src_20_9=cpld
+sff_cpld_reg.frmt_20_9=bit
+sff_cpld_reg.pola_20_9=negative
+sff_cpld_reg.addr_20_9=0x00020060
+sff_cpld_reg.len_20_9=1
+sff_cpld_reg.bit_offset_20_9=3
+
+sff_cpld_reg.mode_21_9=config
+sff_cpld_reg.src_21_9=cpld
+sff_cpld_reg.frmt_21_9=bit
+sff_cpld_reg.pola_21_9=negative
+sff_cpld_reg.addr_21_9=0x00020060
+sff_cpld_reg.len_21_9=1
+sff_cpld_reg.bit_offset_21_9=4
+
+sff_cpld_reg.mode_22_9=config
+sff_cpld_reg.src_22_9=cpld
+sff_cpld_reg.frmt_22_9=bit
+sff_cpld_reg.pola_22_9=negative
+sff_cpld_reg.addr_22_9=0x00020060
+sff_cpld_reg.len_22_9=1
+sff_cpld_reg.bit_offset_22_9=5
+
+sff_cpld_reg.mode_23_9=config
+sff_cpld_reg.src_23_9=cpld
+sff_cpld_reg.frmt_23_9=bit
+sff_cpld_reg.pola_23_9=negative
+sff_cpld_reg.addr_23_9=0x00020060
+sff_cpld_reg.len_23_9=1
+sff_cpld_reg.bit_offset_23_9=6
+
+sff_cpld_reg.mode_24_9=config
+sff_cpld_reg.src_24_9=cpld
+sff_cpld_reg.frmt_24_9=bit
+sff_cpld_reg.pola_24_9=negative
+sff_cpld_reg.addr_24_9=0x00020060
+sff_cpld_reg.len_24_9=1
+sff_cpld_reg.bit_offset_24_9=7
+
+sff_cpld_reg.mode_25_9=config
+sff_cpld_reg.src_25_9=cpld
+sff_cpld_reg.frmt_25_9=bit
+sff_cpld_reg.pola_25_9=negative
+sff_cpld_reg.addr_25_9=0x00030064
+sff_cpld_reg.len_25_9=1
+sff_cpld_reg.bit_offset_25_9=0
+
+sff_cpld_reg.mode_26_9=config
+sff_cpld_reg.src_26_9=cpld
+sff_cpld_reg.frmt_26_9=bit
+sff_cpld_reg.pola_26_9=negative
+sff_cpld_reg.addr_26_9=0x00030064
+sff_cpld_reg.len_26_9=1
+sff_cpld_reg.bit_offset_26_9=1
+
+sff_cpld_reg.mode_27_9=config
+sff_cpld_reg.src_27_9=cpld
+sff_cpld_reg.frmt_27_9=bit
+sff_cpld_reg.pola_27_9=negative
+sff_cpld_reg.addr_27_9=0x00030064
+sff_cpld_reg.len_27_9=1
+sff_cpld_reg.bit_offset_27_9=2
+
+sff_cpld_reg.mode_28_9=config
+sff_cpld_reg.src_28_9=cpld
+sff_cpld_reg.frmt_28_9=bit
+sff_cpld_reg.pola_28_9=negative
+sff_cpld_reg.addr_28_9=0x00030064
+sff_cpld_reg.len_28_9=1
+sff_cpld_reg.bit_offset_28_9=3
+
+sff_cpld_reg.mode_29_9=config
+sff_cpld_reg.src_29_9=cpld
+sff_cpld_reg.frmt_29_9=bit
+sff_cpld_reg.pola_29_9=negative
+sff_cpld_reg.addr_29_9=0x00030064
+sff_cpld_reg.len_29_9=1
+sff_cpld_reg.bit_offset_29_9=4
+
+sff_cpld_reg.mode_30_9=config
+sff_cpld_reg.src_30_9=cpld
+sff_cpld_reg.frmt_30_9=bit
+sff_cpld_reg.pola_30_9=negative
+sff_cpld_reg.addr_30_9=0x00030064
+sff_cpld_reg.len_30_9=1
+sff_cpld_reg.bit_offset_30_9=5
+
+sff_cpld_reg.mode_31_9=config
+sff_cpld_reg.src_31_9=cpld
+sff_cpld_reg.frmt_31_9=bit
+sff_cpld_reg.pola_31_9=negative
+sff_cpld_reg.addr_31_9=0x00030064
+sff_cpld_reg.len_31_9=1
+sff_cpld_reg.bit_offset_31_9=6
+
+sff_cpld_reg.mode_32_9=config
+sff_cpld_reg.src_32_9=cpld
+sff_cpld_reg.frmt_32_9=bit
+sff_cpld_reg.pola_32_9=negative
+sff_cpld_reg.addr_32_9=0x00030064
+sff_cpld_reg.len_32_9=1
+sff_cpld_reg.bit_offset_32_9=7
+
+sff_cpld_reg.mode_33_9=config
+sff_cpld_reg.src_33_9=cpld
+sff_cpld_reg.frmt_33_9=bit
+sff_cpld_reg.pola_33_9=negative
+sff_cpld_reg.addr_33_9=0x00030063
+sff_cpld_reg.len_33_9=1
+sff_cpld_reg.bit_offset_33_9=0
+
+sff_cpld_reg.mode_34_9=config
+sff_cpld_reg.src_34_9=cpld
+sff_cpld_reg.frmt_34_9=bit
+sff_cpld_reg.pola_34_9=negative
+sff_cpld_reg.addr_34_9=0x00030063
+sff_cpld_reg.len_34_9=1
+sff_cpld_reg.bit_offset_34_9=1
+
+sff_cpld_reg.mode_35_9=config
+sff_cpld_reg.src_35_9=cpld
+sff_cpld_reg.frmt_35_9=bit
+sff_cpld_reg.pola_35_9=negative
+sff_cpld_reg.addr_35_9=0x00030063
+sff_cpld_reg.len_35_9=1
+sff_cpld_reg.bit_offset_35_9=2
+
+sff_cpld_reg.mode_36_9=config
+sff_cpld_reg.src_36_9=cpld
+sff_cpld_reg.frmt_36_9=bit
+sff_cpld_reg.pola_36_9=negative
+sff_cpld_reg.addr_36_9=0x00030063
+sff_cpld_reg.len_36_9=1
+sff_cpld_reg.bit_offset_36_9=3
+
+sff_cpld_reg.mode_37_9=config
+sff_cpld_reg.src_37_9=cpld
+sff_cpld_reg.frmt_37_9=bit
+sff_cpld_reg.pola_37_9=negative
+sff_cpld_reg.addr_37_9=0x00030063
+sff_cpld_reg.len_37_9=1
+sff_cpld_reg.bit_offset_37_9=4
+
+sff_cpld_reg.mode_38_9=config
+sff_cpld_reg.src_38_9=cpld
+sff_cpld_reg.frmt_38_9=bit
+sff_cpld_reg.pola_38_9=negative
+sff_cpld_reg.addr_38_9=0x00030063
+sff_cpld_reg.len_38_9=1
+sff_cpld_reg.bit_offset_38_9=5
+
+sff_cpld_reg.mode_39_9=config
+sff_cpld_reg.src_39_9=cpld
+sff_cpld_reg.frmt_39_9=bit
+sff_cpld_reg.pola_39_9=negative
+sff_cpld_reg.addr_39_9=0x00030063
+sff_cpld_reg.len_39_9=1
+sff_cpld_reg.bit_offset_39_9=6
+
+sff_cpld_reg.mode_40_9=config
+sff_cpld_reg.src_40_9=cpld
+sff_cpld_reg.frmt_40_9=bit
+sff_cpld_reg.pola_40_9=negative
+sff_cpld_reg.addr_40_9=0x00030063
+sff_cpld_reg.len_40_9=1
+sff_cpld_reg.bit_offset_40_9=7
+
+sff_cpld_reg.mode_41_9=config
+sff_cpld_reg.src_41_9=cpld
+sff_cpld_reg.frmt_41_9=bit
+sff_cpld_reg.pola_41_9=negative
+sff_cpld_reg.addr_41_9=0x00030062
+sff_cpld_reg.len_41_9=1
+sff_cpld_reg.bit_offset_41_9=0
+
+sff_cpld_reg.mode_42_9=config
+sff_cpld_reg.src_42_9=cpld
+sff_cpld_reg.frmt_42_9=bit
+sff_cpld_reg.pola_42_9=negative
+sff_cpld_reg.addr_42_9=0x00030062
+sff_cpld_reg.len_42_9=1
+sff_cpld_reg.bit_offset_42_9=1
+
+sff_cpld_reg.mode_43_9=config
+sff_cpld_reg.src_43_9=cpld
+sff_cpld_reg.frmt_43_9=bit
+sff_cpld_reg.pola_43_9=negative
+sff_cpld_reg.addr_43_9=0x00030062
+sff_cpld_reg.len_43_9=1
+sff_cpld_reg.bit_offset_43_9=2
+
+sff_cpld_reg.mode_44_9=config
+sff_cpld_reg.src_44_9=cpld
+sff_cpld_reg.frmt_44_9=bit
+sff_cpld_reg.pola_44_9=negative
+sff_cpld_reg.addr_44_9=0x00030062
+sff_cpld_reg.len_44_9=1
+sff_cpld_reg.bit_offset_44_9=3
+
+sff_cpld_reg.mode_45_9=config
+sff_cpld_reg.src_45_9=cpld
+sff_cpld_reg.frmt_45_9=bit
+sff_cpld_reg.pola_45_9=negative
+sff_cpld_reg.addr_45_9=0x00030062
+sff_cpld_reg.len_45_9=1
+sff_cpld_reg.bit_offset_45_9=4
+
+sff_cpld_reg.mode_46_9=config
+sff_cpld_reg.src_46_9=cpld
+sff_cpld_reg.frmt_46_9=bit
+sff_cpld_reg.pola_46_9=negative
+sff_cpld_reg.addr_46_9=0x00030062
+sff_cpld_reg.len_46_9=1
+sff_cpld_reg.bit_offset_46_9=5
+
+sff_cpld_reg.mode_47_9=config
+sff_cpld_reg.src_47_9=cpld
+sff_cpld_reg.frmt_47_9=bit
+sff_cpld_reg.pola_47_9=negative
+sff_cpld_reg.addr_47_9=0x00030062
+sff_cpld_reg.len_47_9=1
+sff_cpld_reg.bit_offset_47_9=6
+
+sff_cpld_reg.mode_48_9=config
+sff_cpld_reg.src_48_9=cpld
+sff_cpld_reg.frmt_48_9=bit
+sff_cpld_reg.pola_48_9=negative
+sff_cpld_reg.addr_48_9=0x00030062
+sff_cpld_reg.len_48_9=1
+sff_cpld_reg.bit_offset_48_9=7
+
+sff_cpld_reg.mode_49_9=config
+sff_cpld_reg.src_49_9=cpld
+sff_cpld_reg.frmt_49_9=bit
+sff_cpld_reg.pola_49_9=negative
+sff_cpld_reg.addr_49_9=0x00030061
+sff_cpld_reg.len_49_9=1
+sff_cpld_reg.bit_offset_49_9=0
+
+sff_cpld_reg.mode_50_9=config
+sff_cpld_reg.src_50_9=cpld
+sff_cpld_reg.frmt_50_9=bit
+sff_cpld_reg.pola_50_9=negative
+sff_cpld_reg.addr_50_9=0x00030061
+sff_cpld_reg.len_50_9=1
+sff_cpld_reg.bit_offset_50_9=1
+
+sff_cpld_reg.mode_51_9=config
+sff_cpld_reg.src_51_9=cpld
+sff_cpld_reg.frmt_51_9=bit
+sff_cpld_reg.pola_51_9=negative
+sff_cpld_reg.addr_51_9=0x00030061
+sff_cpld_reg.len_51_9=1
+sff_cpld_reg.bit_offset_51_9=2
+
+sff_cpld_reg.mode_52_9=config
+sff_cpld_reg.src_52_9=cpld
+sff_cpld_reg.frmt_52_9=bit
+sff_cpld_reg.pola_52_9=negative
+sff_cpld_reg.addr_52_9=0x00030061
+sff_cpld_reg.len_52_9=1
+sff_cpld_reg.bit_offset_52_9=3
+
+sff_cpld_reg.mode_53_9=config
+sff_cpld_reg.src_53_9=cpld
+sff_cpld_reg.frmt_53_9=bit
+sff_cpld_reg.pola_53_9=negative
+sff_cpld_reg.addr_53_9=0x00030061
+sff_cpld_reg.len_53_9=1
+sff_cpld_reg.bit_offset_53_9=4
+
+sff_cpld_reg.mode_54_9=config
+sff_cpld_reg.src_54_9=cpld
+sff_cpld_reg.frmt_54_9=bit
+sff_cpld_reg.pola_54_9=negative
+sff_cpld_reg.addr_54_9=0x00030061
+sff_cpld_reg.len_54_9=1
+sff_cpld_reg.bit_offset_54_9=5
+
+sff_cpld_reg.mode_55_9=config
+sff_cpld_reg.src_55_9=cpld
+sff_cpld_reg.frmt_55_9=bit
+sff_cpld_reg.pola_55_9=negative
+sff_cpld_reg.addr_55_9=0x00030061
+sff_cpld_reg.len_55_9=1
+sff_cpld_reg.bit_offset_55_9=6
+
+sff_cpld_reg.mode_56_9=config
+sff_cpld_reg.src_56_9=cpld
+sff_cpld_reg.frmt_56_9=bit
+sff_cpld_reg.pola_56_9=negative
+sff_cpld_reg.addr_56_9=0x00030061
+sff_cpld_reg.len_56_9=1
+sff_cpld_reg.bit_offset_56_9=7
+
+sff_cpld_reg.mode_57_9=config
+sff_cpld_reg.src_57_9=cpld
+sff_cpld_reg.frmt_57_9=bit
+sff_cpld_reg.pola_57_9=negative
+sff_cpld_reg.addr_57_9=0x00030060
+sff_cpld_reg.len_57_9=1
+sff_cpld_reg.bit_offset_57_9=0
+
+sff_cpld_reg.mode_58_9=config
+sff_cpld_reg.src_58_9=cpld
+sff_cpld_reg.frmt_58_9=bit
+sff_cpld_reg.pola_58_9=negative
+sff_cpld_reg.addr_58_9=0x00030060
+sff_cpld_reg.len_58_9=1
+sff_cpld_reg.bit_offset_58_9=1
+
+sff_cpld_reg.mode_59_9=config
+sff_cpld_reg.src_59_9=cpld
+sff_cpld_reg.frmt_59_9=bit
+sff_cpld_reg.pola_59_9=negative
+sff_cpld_reg.addr_59_9=0x00030060
+sff_cpld_reg.len_59_9=1
+sff_cpld_reg.bit_offset_59_9=2
+
+sff_cpld_reg.mode_60_9=config
+sff_cpld_reg.src_60_9=cpld
+sff_cpld_reg.frmt_60_9=bit
+sff_cpld_reg.pola_60_9=negative
+sff_cpld_reg.addr_60_9=0x00030060
+sff_cpld_reg.len_60_9=1
+sff_cpld_reg.bit_offset_60_9=3
+
+sff_cpld_reg.mode_61_9=config
+sff_cpld_reg.src_61_9=cpld
+sff_cpld_reg.frmt_61_9=bit
+sff_cpld_reg.pola_61_9=negative
+sff_cpld_reg.addr_61_9=0x00030060
+sff_cpld_reg.len_61_9=1
+sff_cpld_reg.bit_offset_61_9=4
+
+sff_cpld_reg.mode_62_9=config
+sff_cpld_reg.src_62_9=cpld
+sff_cpld_reg.frmt_62_9=bit
+sff_cpld_reg.pola_62_9=negative
+sff_cpld_reg.addr_62_9=0x00030060
+sff_cpld_reg.len_62_9=1
+sff_cpld_reg.bit_offset_62_9=5
+
+sff_cpld_reg.mode_63_9=config
+sff_cpld_reg.src_63_9=cpld
+sff_cpld_reg.frmt_63_9=bit
+sff_cpld_reg.pola_63_9=negative
+sff_cpld_reg.addr_63_9=0x00030060
+sff_cpld_reg.len_63_9=1
+sff_cpld_reg.bit_offset_63_9=6
+
+sff_cpld_reg.mode_64_9=config
+sff_cpld_reg.src_64_9=cpld
+sff_cpld_reg.frmt_64_9=bit
+sff_cpld_reg.pola_64_9=negative
+sff_cpld_reg.addr_64_9=0x00030060
+sff_cpld_reg.len_64_9=1
+sff_cpld_reg.bit_offset_64_9=7
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/WATCHDOG.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/WATCHDOG.cfg
new file mode 100644
index 000000000000..e087fee62045
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/WATCHDOG.cfg
@@ -0,0 +1,20 @@
+
+watchdog_dev.mode_0_4=config
+watchdog_dev.src_0_4=cpld
+watchdog_dev.frmt_0_4=bit
+watchdog_dev.addr_0_4=0x000100b0
+watchdog_dev.len_0_4=1
+watchdog_dev.bit_offset_0_4=0
+
+watchdog_dev.mode_0_3=config
+watchdog_dev.src_0_3=cpld
+watchdog_dev.frmt_0_3=byte
+watchdog_dev.addr_0_3=0x000100b1
+watchdog_dev.len_0_3=1
+
+watchdog_dev.mode_0_5=config
+watchdog_dev.src_0_5=cpld
+watchdog_dev.frmt_0_5=bit
+watchdog_dev.addr_0_5=0x000100b0
+watchdog_dev.len_0_5=1
+watchdog_dev.bit_offset_0_5=0
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/file_name/0x40d7 b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/file_name/0x40d7
new file mode 100644
index 000000000000..3944674a473a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/file_name/0x40d7
@@ -0,0 +1,8 @@
+CPLD
+FAN
+LED
+PSU
+SENSOR
+SFF
+FPGA
+WATCHDOG
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/setup.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/setup.py
new file mode 100755
index 000000000000..6c3916921abb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/setup.py
@@ -0,0 +1,39 @@
+from setuptools import setup
+
+setup(
+    name='sonic-platform',
+    version='1.0',
+    description='SONiC platform API implementation',
+    license='Apache 2.0',
+    author='SONiC Team',
+    author_email='support',
+    url='',
+    maintainer='support',
+    maintainer_email='',
+    packages=[
+        'sonic_platform',
+        'plat_hal',
+        'wbutil',
+        'eepromutil',
+        'hal-config',
+        'config',
+    ],
+    py_modules=[
+        'hal_pltfm',
+        'platform_util',
+        'platform_intf',
+    ],
+    classifiers=[
+        'Development Status :: 3 - Alpha',
+        'Environment :: Plugins',
+        'Intended Audience :: Developers',
+        'Intended Audience :: Information Technology',
+        'Intended Audience :: System Administrators',
+        'License :: OSI Approved :: Apache Software License',
+        'Natural Language :: English',
+        'Operating System :: POSIX :: Linux',
+        'Programming Language :: Python :: 3.7',
+        'Topic :: Utilities',
+    ],
+    keywords='sonic SONiC platform PLATFORM',
+)

From 18d64e1654d2c32411944eb897a74436fdf300cc Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 23 Nov 2024 16:05:08 +0800
Subject: [PATCH 262/364] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#20877)

#### Why I did it
src/sonic-host-services
```
* 89aead2 - (HEAD -> master, origin/master, origin/HEAD) DBUS API for Containerz.StopContainer (#179) (5 hours ago) [Dawei Huang]
* c15aebc - [cisco|express-boot]: Add support for cisco express boot in sonic-host-services (#90) (2 days ago) [jhli-cisco]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index c05d43e24dca..89aead2c34eb 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit c05d43e24dca74fd2cae83dad9936232c1011cb3
+Subproject commit 89aead2c34eb95102328c4730fce534190ee5dac

From d193489c36f2fa6b1b9b4f6b8487ea45ce75142f Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 23 Nov 2024 16:05:13 +0800
Subject: [PATCH 263/364] [submodule] Update submodule sonic-gnmi to the latest
 HEAD automatically (#20864)

#### Why I did it
src/sonic-gnmi
```
* 2c4b9c8 - (HEAD -> master, origin/master, origin/HEAD) Add swss-common log level support to gnmi (#330) (21 hours ago) [Hua Liu]
* d77883d - Merge pull request #309 from wumiaont/master (24 hours ago) [Rita Hui]
|\
| failure_prs.log 80067ec - Fix a panic by gnmi subscribe with invalid xpath (5 weeks ago) [wumiao]
* e6bc0e7 - Add cert CRL support. (#269) (3 days ago) [Hua Liu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index e0f09241f7ac..2c4b9c85833b 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit e0f09241f7ac15135cdc3ea0f16e7f217d1dd4b7
+Subproject commit 2c4b9c85833b4b71b35fd1099271bd67aaa3b3b3

From 5167d41e9767c2427aa92d6ab0248f84fa7ff28d Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 23 Nov 2024 19:01:06 +0800
Subject: [PATCH 264/364] [submodule] Update submodule sonic-swss to the latest
 HEAD automatically (#20905)

#### Why I did it
src/sonic-swss
```
* 1847195c - (HEAD -> master, origin/master, origin/HEAD) Add port FEC BER feature swss, HLD#1829 (#3363) (9 hours ago) [vincentpcng]
* 3d5ac540 - Create counter for the queue to which the host CPU traffic is sent when create_only_config_db_buffers is enabled (#3334) (10 hours ago) [Stephen Sun]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index eda63a9b25ab..1847195cf02a 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit eda63a9b25abea80638322b5d28d9acc82d1e1b5
+Subproject commit 1847195cf02a2baa478a664a671adc95c704a810

From b013243a0016ca7342e046b2728998e647daffed Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 23 Nov 2024 19:01:25 +0800
Subject: [PATCH 265/364] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#20835)

#### Why I did it
src/sonic-sairedis
```
* e6ec1424 - (HEAD -> master, origin/master, origin/HEAD) [syncd] Add attribute version check feature (#1470) (14 hours ago) [Kamil Cudnik]
* 29a8f86b - [meta] Use metadata to check port notification port_id type (#1469) (2 days ago) [Kamil Cudnik]
* d772864e - innovium rename to marvell-teralynx (#1408) (2 days ago) [krismarvell]
* 526bca31 - [submodule] Update SAI to lates origin master (#1466) (2 days ago) [Kamil Cudnik]
* fc376d50 - [test] Add more testing for NotificationSwitchAsicSdkHealthEvent (#1463) (4 days ago) [Kamil Cudnik]
* ed222eca - [submodule] Update SAI to v1.15.1 (#1462) (5 days ago) [Kamil Cudnik]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 137b538e4125..e6ec1424788b 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 137b538e412552ca090badc7470ee7cb1157b4f8
+Subproject commit e6ec1424788b887bcb04947486e16a1d770dc2c3

From 068ca87bc01ab21e00a26d22593b2c99372cf892 Mon Sep 17 00:00:00 2001
From: Volodymyr Samotiy <volodymyrs@nvidia.com>
Date: Sat, 23 Nov 2024 15:28:42 +0200
Subject: [PATCH 266/364] [Mellanox] Update SAI/SDK/FW to
 SAIBuild2405.30.0.0/4.7.2092/2014.2092 (#20867)

- Why I did it
Update SAI/SDK/FW to SAIBuild2405.30.0.0/4.7.2092/2014.2092

- How I did it
Change versions in relevant make files.

- How to verify it
Run full regression on Mellanox platforms

Signed-off-by: Volodymyr Samotiy <volodymyrs@nvidia.com>
---
 platform/mellanox/fw.mk       | 12 ++++++------
 platform/mellanox/mlnx-sai.mk |  2 +-
 platform/mellanox/sdk.mk      |  2 +-
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/platform/mellanox/fw.mk b/platform/mellanox/fw.mk
index 8a3f45c0350a..72e837b767fa 100644
--- a/platform/mellanox/fw.mk
+++ b/platform/mellanox/fw.mk
@@ -21,33 +21,33 @@ MLNX_FW_BASE_PATH = $(MLNX_SDK_BASE_PATH)
 # Place an URL here to FW if you want to download FW instead
 MLNX_FW_BASE_URL =
 
-SIMX_VERSION = 24.7-1154
+SIMX_VERSION = 24.10-1100
 
 FW_FROM_URL = y
 
-MLNX_FW_ASSETS_RELEASE_TAG = fw-2014.1150
+MLNX_FW_ASSETS_RELEASE_TAG = fw-2014.2092
 MLNX_FW_ASSETS_URL = $(MLNX_ASSETS_GITHUB_URL)/releases/download/$(MLNX_FW_ASSETS_RELEASE_TAG)
 
 ifeq ($(MLNX_FW_BASE_URL), )
 MLNX_FW_BASE_URL = $(MLNX_FW_ASSETS_URL)
 endif
 
-MLNX_SPC_FW_VERSION = 13.2014.1150
+MLNX_SPC_FW_VERSION = 13.2014.2092
 MLNX_SPC_FW_FILE = fw-SPC-rel-$(subst .,_,$(MLNX_SPC_FW_VERSION))-EVB.mfa
 $(MLNX_SPC_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC_FW_FILE)
 
-MLNX_SPC2_FW_VERSION = 29.2014.1150
+MLNX_SPC2_FW_VERSION = 29.2014.2092
 MLNX_SPC2_FW_FILE = fw-SPC2-rel-$(subst .,_,$(MLNX_SPC2_FW_VERSION))-EVB.mfa
 $(MLNX_SPC2_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC2_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC2_FW_FILE)
 
-MLNX_SPC3_FW_VERSION = 30.2014.1150
+MLNX_SPC3_FW_VERSION = 30.2014.2092
 MLNX_SPC3_FW_FILE = fw-SPC3-rel-$(subst .,_,$(MLNX_SPC3_FW_VERSION))-EVB.mfa
 $(MLNX_SPC3_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC3_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC3_FW_FILE)
 
-MLNX_SPC4_FW_VERSION = 34.2014.1150
+MLNX_SPC4_FW_VERSION = 34.2014.2092
 MLNX_SPC4_FW_FILE = fw-SPC4-rel-$(subst .,_,$(MLNX_SPC4_FW_VERSION))-EVB.mfa
 $(MLNX_SPC4_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC4_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC4_FW_FILE)
diff --git a/platform/mellanox/mlnx-sai.mk b/platform/mellanox/mlnx-sai.mk
index 6e184f670328..96cf4019f23a 100644
--- a/platform/mellanox/mlnx-sai.mk
+++ b/platform/mellanox/mlnx-sai.mk
@@ -1,6 +1,6 @@
 # Mellanox SAI
 
-MLNX_SAI_VERSION = SAIBuild2405.28.0.33
+MLNX_SAI_VERSION = SAIBuild2405.30.0.0
 MLNX_SAI_ASSETS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins
 MLNX_SAI_ASSETS_RELEASE_TAG = sai-$(MLNX_SAI_VERSION)-$(BLDENV)-$(CONFIGURED_ARCH)
 MLNX_SAI_ASSETS_URL = $(MLNX_SAI_ASSETS_GITHUB_URL)/releases/download/$(MLNX_SAI_ASSETS_RELEASE_TAG)
diff --git a/platform/mellanox/sdk.mk b/platform/mellanox/sdk.mk
index 5346e8a44589..3c9c3181a964 100644
--- a/platform/mellanox/sdk.mk
+++ b/platform/mellanox/sdk.mk
@@ -14,7 +14,7 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 #
-MLNX_SDK_VERSION = 4.7.1150
+MLNX_SDK_VERSION = 4.7.2092
 MLNX_SDK_ISSU_VERSION = 101
 
 MLNX_SDK_DRIVERS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers

From 412202e4f7b591340d54cb7b6a47ab454e8dc5de Mon Sep 17 00:00:00 2001
From: Zain Budhwani <99770260+zbud-msft@users.noreply.github.com>
Date: Sun, 24 Nov 2024 10:51:55 -0800
Subject: [PATCH 267/364] Enable GRPC logs for telemetry process in telemetry
 docker (#20889)

---
 dockers/docker-sonic-telemetry/telemetry.sh | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/dockers/docker-sonic-telemetry/telemetry.sh b/dockers/docker-sonic-telemetry/telemetry.sh
index 29ea00ea5ce0..2428922b57f6 100755
--- a/dockers/docker-sonic-telemetry/telemetry.sh
+++ b/dockers/docker-sonic-telemetry/telemetry.sh
@@ -17,6 +17,9 @@ X509=$(echo $TELEMETRY_VARS | jq -r '.x509')
 GNMI=$(echo $TELEMETRY_VARS | jq -r '.gnmi')
 CERTS=$(echo $TELEMETRY_VARS | jq -r '.certs')
 
+export GRPC_GO_LOG_VERBOSITY_LEVEL=99
+export GRPC_GO_LOG_SEVERITY_LEVEL=info
+
 TELEMETRY_ARGS=" -logtostderr"
 export CVL_SCHEMA_PATH=/usr/sbin/schema
 export GOTRACEBACK=crash

From b97413bd8017a1ac658e523455f782b99e1f3835 Mon Sep 17 00:00:00 2001
From: Philo <135693886+philo-micas@users.noreply.github.com>
Date: Mon, 25 Nov 2024 08:18:16 +0800
Subject: [PATCH 268/364] [Micas/Platform]platform support M2-W6930-64QC
 (#20627)

* [Micas/Platform]platform support M2-W6930-64QC

Signed-off-by: philo <philo@micasnetworks.com>

* Update control

* triggle rebuild

* triggle rebuild

* Update control

* Update th4-m2-w6930-64qc-64x400G.config.yml

* triggle rebuild

---------

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../M2-W6930-64QC/hwsku.json                  |   197 +
 .../M2-W6930-64QC/port_config.ini             |    65 +
 .../M2-W6930-64QC/sai.profile                 |     1 +
 .../th4-m2-w6930-64qc-64x400G.config.yml      | 12951 ++++++++++++++++
 .../custom_led.bin                            |   Bin 0 -> 576 bytes
 .../x86_64-micas_m2-w6930-64qc-r0/default_sku |     1 +
 .../x86_64-micas_m2-w6930-64qc-r0/dev.xml     |   562 +
 .../x86_64-micas_m2-w6930-64qc-r0/fru.py      |   961 ++
 .../installer.conf                            |     2 +
 .../media_settings.json                       |  4100 +++++
 .../x86_64-micas_m2-w6930-64qc-r0/monitor.py  |   402 +
 .../x86_64-micas_m2-w6930-64qc-r0/pcie.yaml   |   582 +
 .../platform.json                             |  2036 +++
 .../platform_asic                             |     1 +
 .../platform_components.json                  |    20 +
 .../platform_env.conf                         |     2 +
 .../plugins/sfputil.py                        |   363 +
 .../plugins/ssd_util.py                       |   318 +
 .../pmon_daemon_control.json                  |     3 +
 .../postinit_cmd_file.soc                     |     4 +
 .../system_health_monitoring_config.json      |     0
 platform/broadcom/one-image.mk                |     1 +
 platform/broadcom/platform-modules-micas.mk   |     8 +
 .../debian/control                            |     4 +
 ...atform-modules-micas-m2-w6930-64qc.install |     1 +
 ...tform-modules-micas-m2-w6930-64qc.postinst |    10 +
 .../debian/rule.mk                            |     1 +
 .../m2-w6930-64qc/Makefile                    |    26 +
 .../x86_64_micas_m2_w6930_64qc_r0_config.py   |  2036 +++
 ...6_64_micas_m2_w6930_64qc_r0_port_config.py |     7 +
 .../x86_64_micas_m2_w6930_64qc_r0_device.py   |  1758 +++
 .../x86_64_micas_m2_w6930_64qc_r0_monitor.py  |   135 +
 .../m2-w6930-64qc/modules/driver/Makefile     |    16 +
 .../modules/driver/wb_fpga_i2c_bus_device.c   |  2317 +++
 .../modules/driver/wb_fpga_pca954x_device.c   |   832 +
 .../modules/driver/wb_i2c_dev_device.c        |   190 +
 .../driver/wb_i2c_mux_pca954x_device.c        |   146 +
 .../modules/driver/wb_io_dev_device.c         |   138 +
 .../modules/driver/wb_lpc_drv_device.c        |   150 +
 .../modules/driver/wb_pcie_dev_device.c       |   113 +
 .../modules/driver/wb_spi_dev_device.c        |   126 +
 .../driver/wb_spi_dev_platform_device.c       |    74 +
 .../modules/driver/wb_spi_master.c            |   129 +
 .../modules/driver/wb_spi_master.h            |    36 +
 .../modules/driver/wb_spi_ocores_device.c     |   114 +
 .../plat_sysfs_cfg/WB_PLAT_CPLD.cfg           |    47 +
 .../plat_sysfs_cfg/WB_PLAT_FAN.cfg            |   574 +
 .../plat_sysfs_cfg/WB_PLAT_PSU.cfg            |   107 +
 .../plat_sysfs_cfg/WB_PLAT_SFF.cfg            |   593 +
 .../plat_sysfs_cfg/cfg_file_name              |     4 +
 .../m2-w6930-64qc/setup.py                    |    39 +
 51 files changed, 32303 insertions(+)
 create mode 100644 device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/hwsku.json
 create mode 100644 device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/port_config.ini
 create mode 100644 device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/sai.profile
 create mode 100644 device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/th4-m2-w6930-64qc-64x400G.config.yml
 create mode 100644 device/micas/x86_64-micas_m2-w6930-64qc-r0/custom_led.bin
 create mode 100644 device/micas/x86_64-micas_m2-w6930-64qc-r0/default_sku
 create mode 100644 device/micas/x86_64-micas_m2-w6930-64qc-r0/dev.xml
 create mode 100644 device/micas/x86_64-micas_m2-w6930-64qc-r0/fru.py
 create mode 100644 device/micas/x86_64-micas_m2-w6930-64qc-r0/installer.conf
 create mode 100644 device/micas/x86_64-micas_m2-w6930-64qc-r0/media_settings.json
 create mode 100644 device/micas/x86_64-micas_m2-w6930-64qc-r0/monitor.py
 create mode 100644 device/micas/x86_64-micas_m2-w6930-64qc-r0/pcie.yaml
 create mode 100644 device/micas/x86_64-micas_m2-w6930-64qc-r0/platform.json
 create mode 100644 device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_asic
 create mode 100644 device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_components.json
 create mode 100644 device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_env.conf
 create mode 100644 device/micas/x86_64-micas_m2-w6930-64qc-r0/plugins/sfputil.py
 create mode 100644 device/micas/x86_64-micas_m2-w6930-64qc-r0/plugins/ssd_util.py
 create mode 100644 device/micas/x86_64-micas_m2-w6930-64qc-r0/pmon_daemon_control.json
 create mode 100644 device/micas/x86_64-micas_m2-w6930-64qc-r0/postinit_cmd_file.soc
 create mode 100755 device/micas/x86_64-micas_m2-w6930-64qc-r0/system_health_monitoring_config.json
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.install
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.postinst
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/Makefile
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/config/x86_64_micas_m2_w6930_64qc_r0_config.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/config/x86_64_micas_m2_w6930_64qc_r0_port_config.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_device.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_monitor.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_i2c_bus_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_pca954x_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_mux_pca954x_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_io_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_lpc_drv_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_pcie_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_platform_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_master.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_master.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_ocores_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/cfg_file_name
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/setup.py

diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/hwsku.json b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/hwsku.json
new file mode 100644
index 000000000000..b958c147ecc7
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/hwsku.json
@@ -0,0 +1,197 @@
+{
+	"interfaces": {
+		"Ethernet1": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet9": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet17": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet25": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet33": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet41": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet49": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet57": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet65": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet73": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet81": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet89": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet97": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet105": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet113": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet121": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet129": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet137": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet145": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet153": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet161": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet169": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet177": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet185": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet193": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet201": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet209": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet217": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet225": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet233": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet241": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet249": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet257": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet265": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet273": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet281": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet289": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet297": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet305": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet313": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet321": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet329": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet337": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet345": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet353": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet361": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet369": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet377": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet385": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet393": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet401": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet409": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet417": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet425": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet433": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet441": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet449": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet457": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet465": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet473": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet481": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet489": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet497": {
+			"default_brkout_mode": "1x400G"
+		},
+		"Ethernet505": {
+			"default_brkout_mode": "1x400G"
+		}
+	}
+}
+
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/port_config.ini b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/port_config.ini
new file mode 100644
index 000000000000..d6bdd4bf54dc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/port_config.ini
@@ -0,0 +1,65 @@
+# name            lanes                                  alias                     index     speed
+Ethernet1         65,66,67,68,69,70,71,72                fourHundredGigE0/1        0         400000
+Ethernet9         69,70,71,72,73,74,75,76                fourHundredGigE0/2        1         400000
+Ethernet17        25,26,27,28,29,30,31,32                fourHundredGigE0/3        2         400000
+Ethernet25        21,22,23,24,25,26,27,28                fourHundredGigE0/4        3         400000
+Ethernet33        73,74,75,76,77,78,79,80                fourHundredGigE0/5        4         400000
+Ethernet41        77,78,79,80,81,82,83,84                fourHundredGigE0/6        5         400000
+Ethernet49        33,34,35,36,37,38,39,40                fourHundredGigE0/7        6         400000
+Ethernet57        29,30,31,32,33,34,35,36                fourHundredGigE0/8        7         400000
+Ethernet65        81,82,83,84,85,86,87,88                fourHundredGigE0/9        8         400000
+Ethernet73        85,86,87,88,89,90,91,92                fourHundredGigE0/10       9         400000
+Ethernet81        41,42,43,44,45,46,47,48                fourHundredGigE0/11       10        400000
+Ethernet89        37,38,39,40,41,42,43,44                fourHundredGigE0/12       11        400000
+Ethernet97        89,90,91,92,93,94,95,96                fourHundredGigE0/13       12        400000
+Ethernet105       93,94,95,96,97,98,99,100               fourHundredGigE0/14       13        400000
+Ethernet113       49,50,51,52,53,54,55,56                fourHundredGigE0/15       14        400000
+Ethernet121       45,46,47,48,49,50,51,52                fourHundredGigE0/16       15        400000
+Ethernet129       97,98,99,100,101,102,103,104           fourHundredGigE0/17       16        400000
+Ethernet137       101,102,103,104,105,106,107,108        fourHundredGigE0/18       17        400000
+Ethernet145       57,58,59,60,61,62,63,64                fourHundredGigE0/19       18        400000
+Ethernet153       53,54,55,56,57,58,59,60                fourHundredGigE0/20       19        400000
+Ethernet161       105,106,107,108,109,110,111,112        fourHundredGigE0/21       20        400000
+Ethernet169       109,110,111,112,113,114,115,116        fourHundredGigE0/22       21        400000
+Ethernet177       17,18,19,20,21,22,23,24                fourHundredGigE0/23       22        400000
+Ethernet185       61,62,63,64,65,66,67,68                fourHundredGigE0/24       23        400000
+Ethernet193       113,114,115,116,117,118,119,120        fourHundredGigE0/25       24        400000
+Ethernet201       117,118,119,120,121,122,123,124        fourHundredGigE0/26       25        400000
+Ethernet209       9,10,11,12,13,14,15,16                 fourHundredGigE0/27       26        400000
+Ethernet217       13,14,15,16,17,18,19,20                fourHundredGigE0/28       27        400000
+Ethernet225       121,122,123,124,125,126,127,128        fourHundredGigE0/29       28        400000
+Ethernet233       125,126,127,128,129,130,131,132        fourHundredGigE0/30       29        400000
+Ethernet241       1,2,3,4,5,6,7,8                        fourHundredGigE0/31       30        400000
+Ethernet249       5,6,7,8,9,10,11,12                     fourHundredGigE0/32       31        400000
+Ethernet257       133,134,135,136,137,138,139,140        fourHundredGigE0/33       32        400000
+Ethernet265       129,130,131,132,133,134,135,136        fourHundredGigE0/34       33        400000
+Ethernet273       249,250,251,252,253,254,255,256        fourHundredGigE0/35       34        400000
+Ethernet281       253,254,255,256,257,258,259,260        fourHundredGigE0/36       35        400000
+Ethernet289       141,142,143,144,145,146,147,148        fourHundredGigE0/37       36        400000
+Ethernet297       137,138,139,140,141,142,143,144        fourHundredGigE0/38       37        400000
+Ethernet305       241,242,243,244,245,246,247,248        fourHundredGigE0/39       38        400000
+Ethernet313       245,246,247,248,249,250,251,252        fourHundredGigE0/40       39        400000
+Ethernet321       149,150,151,152,153,154,155,156        fourHundredGigE0/41       40        400000
+Ethernet329       145,146,147,148,149,150,151,152        fourHundredGigE0/42       41        400000
+Ethernet337       237,238,239,240,241,242,243,244        fourHundredGigE0/43       42        400000
+Ethernet345       197,198,199,200,201,202,203,204        fourHundredGigE0/44       43        400000
+Ethernet353       157,158,159,160,161,162,163,164        fourHundredGigE0/45       44        400000
+Ethernet361       153,154,155,156,157,158,159,160        fourHundredGigE0/46       45        400000
+Ethernet369       193,194,195,196,197,198,199,200        fourHundredGigE0/47       46        400000
+Ethernet377       205,206,207,208,209,210,211,212        fourHundredGigE0/48       47        400000
+Ethernet385       165,166,167,168,169,170,171,172        fourHundredGigE0/49       48        400000
+Ethernet393       161,162,163,164,165,166,167,168        fourHundredGigE0/50       49        400000
+Ethernet401       201,202,203,204,205,206,207,208        fourHundredGigE0/51       50        400000
+Ethernet409       213,214,215,216,217,218,219,220        fourHundredGigE0/52       51        400000
+Ethernet417       173,174,175,176,177,178,179,180        fourHundredGigE0/53       52        400000
+Ethernet425       169,170,171,172,173,174,175,176        fourHundredGigE0/54       53        400000
+Ethernet433       209,210,211,212,213,214,215,216        fourHundredGigE0/55       54        400000
+Ethernet441       221,222,223,224,225,226,227,228        fourHundredGigE0/56       55        400000
+Ethernet449       181,182,183,184,185,186,187,188        fourHundredGigE0/57       56        400000
+Ethernet457       177,178,179,180,181,182,183,184        fourHundredGigE0/58       57        400000
+Ethernet465       217,218,219,220,221,222,223,224        fourHundredGigE0/59       58        400000
+Ethernet473       229,230,231,232,233,234,235,236        fourHundredGigE0/60       59        400000
+Ethernet481       189,190,191,192,193,194,195,196        fourHundredGigE0/61       60        400000
+Ethernet489       185,186,187,188,189,190,191,192        fourHundredGigE0/62       61        400000
+Ethernet497       225,226,227,228,229,230,231,232        fourHundredGigE0/63       62        400000
+Ethernet505       233,234,235,236,237,238,239,240        fourHundredGigE0/64       63        400000
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/sai.profile b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/sai.profile
new file mode 100644
index 000000000000..f5e660abcfd1
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th4-m2-w6930-64qc-64x400G.config.yml
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/th4-m2-w6930-64qc-64x400G.config.yml b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/th4-m2-w6930-64qc-64x400G.config.yml
new file mode 100644
index 000000000000..d2b24e2cb1a4
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/M2-W6930-64QC/th4-m2-w6930-64qc-64x400G.config.yml
@@ -0,0 +1,12951 @@
+---
+bcm_device:
+    0:
+        global:
+            bcm_tunnel_term_compatible_mode: 1
+            vlan_flooding_l2mc_num_reserved: 2048
+            l3_alpm_template: 2
+            l3_alpm2_bnk_threshold: 100
+            svi_my_station_optimization: 1
+            sai_nbr_bcast_ifp_optimized: 2
+            uft_mode: 1
+            l3_enable: 1
+            l2_hitbit_enable: 0
+            pktio_mode: 1
+            warmboot_knet_shutdown_mode: 1
+            sai_pfc_defaults_disable: 1
+            sai_optimized_mmu: 1
+            sai_postinit_cmd_file: /usr/share/sonic/platform/postinit_cmd_file.soc
+            sai_port_pmap_phy_lanes: 1
+...
+
+---
+device:
+    0:
+        FP_CONFIG:
+            #FP_ING_OPERMODE: PIPE_UNIQUE
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+
+---
+bcm_device:
+    0:
+        port:
+            68:
+                dport_map_port: 1
+            69:
+                dport_map_port: 2
+            70:
+                dport_map_port: 3
+            71:
+                dport_map_port: 4
+            72:
+                dport_map_port: 5
+            73:
+                dport_map_port: 6
+            74:
+                dport_map_port: 7
+            75:
+                dport_map_port: 8
+            25:
+                dport_map_port: 9
+            26:
+                dport_map_port: 10
+            27:
+                dport_map_port: 11
+            28:
+                dport_map_port: 12
+            21:
+                dport_map_port: 13
+            22:
+                dport_map_port: 14
+            23:
+                dport_map_port: 15
+            24:
+                dport_map_port: 16
+            76:
+                dport_map_port: 17
+            77:
+                dport_map_port: 18
+            78:
+                dport_map_port: 19
+            79:
+                dport_map_port: 20
+            80:
+                dport_map_port: 21
+            81:
+                dport_map_port: 22
+            82:
+                dport_map_port: 23
+            83:
+                dport_map_port: 24
+            34:
+                dport_map_port: 25
+            35:
+                dport_map_port: 26
+            36:
+                dport_map_port: 27
+            37:
+                dport_map_port: 28
+            29:
+                dport_map_port: 29
+            30:
+                dport_map_port: 30
+            31:
+                dport_map_port: 31
+            32:
+                dport_map_port: 32
+            85:
+                dport_map_port: 33
+            86:
+                dport_map_port: 34
+            87:
+                dport_map_port: 35
+            88:
+                dport_map_port: 36
+            89:
+                dport_map_port: 37
+            90:
+                dport_map_port: 38
+            91:
+                dport_map_port: 39
+            92:
+                dport_map_port: 40
+            42:
+                dport_map_port: 41
+            43:
+                dport_map_port: 42
+            44:
+                dport_map_port: 43
+            45:
+                dport_map_port: 44
+            38:
+                dport_map_port: 45
+            39:
+                dport_map_port: 46
+            40:
+                dport_map_port: 47
+            41:
+                dport_map_port: 48
+            93:
+                dport_map_port: 49
+            94:
+                dport_map_port: 50
+            95:
+                dport_map_port: 51
+            96:
+                dport_map_port: 52
+            97:
+                dport_map_port: 53
+            98:
+                dport_map_port: 54
+            99:
+                dport_map_port: 55
+            100:
+                dport_map_port: 56
+            51:
+                dport_map_port: 57
+            52:
+                dport_map_port: 58
+            53:
+                dport_map_port: 59
+            54:
+                dport_map_port: 60
+            46:
+                dport_map_port: 61
+            47:
+                dport_map_port: 62
+            48:
+                dport_map_port: 63
+            49:
+                dport_map_port: 64
+            102:
+                dport_map_port: 65
+            103:
+                dport_map_port: 66
+            104:
+                dport_map_port: 67
+            105:
+                dport_map_port: 68
+            106:
+                dport_map_port: 69
+            107:
+                dport_map_port: 70
+            108:
+                dport_map_port: 71
+            109:
+                dport_map_port: 72
+            59:
+                dport_map_port: 73
+            60:
+                dport_map_port: 74
+            61:
+                dport_map_port: 75
+            62:
+                dport_map_port: 76
+            55:
+                dport_map_port: 77
+            56:
+                dport_map_port: 78
+            57:
+                dport_map_port: 79
+            58:
+                dport_map_port: 80
+            110:
+                dport_map_port: 81
+            111:
+                dport_map_port: 82
+            112:
+                dport_map_port: 83
+            113:
+                dport_map_port: 84
+            114:
+                dport_map_port: 85
+            115:
+                dport_map_port: 86
+            116:
+                dport_map_port: 87
+            117:
+                dport_map_port: 88
+            17:
+                dport_map_port: 89
+            18:
+                dport_map_port: 90
+            19:
+                dport_map_port: 91
+            20:
+                dport_map_port: 92
+            63:
+                dport_map_port: 93
+            64:
+                dport_map_port: 94
+            65:
+                dport_map_port: 95
+            66:
+                dport_map_port: 96
+            119:
+                dport_map_port: 97
+            120:
+                dport_map_port: 98
+            121:
+                dport_map_port: 99
+            122:
+                dport_map_port: 100
+            123:
+                dport_map_port: 101
+            124:
+                dport_map_port: 102
+            125:
+                dport_map_port: 103
+            126:
+                dport_map_port: 104
+            9:
+                dport_map_port: 105
+            10:
+                dport_map_port: 106
+            11:
+                dport_map_port: 107
+            12:
+                dport_map_port: 108
+            13:
+                dport_map_port: 109
+            14:
+                dport_map_port: 110
+            15:
+                dport_map_port: 111
+            16:
+                dport_map_port: 112
+            127:
+                dport_map_port: 113
+            128:
+                dport_map_port: 114
+            129:
+                dport_map_port: 115
+            130:
+                dport_map_port: 116
+            131:
+                dport_map_port: 117
+            132:
+                dport_map_port: 118
+            133:
+                dport_map_port: 119
+            134:
+                dport_map_port: 120
+            1:
+                dport_map_port: 121
+            2:
+                dport_map_port: 122
+            3:
+                dport_map_port: 123
+            4:
+                dport_map_port: 124
+            5:
+                dport_map_port: 125
+            6:
+                dport_map_port: 126
+            7:
+                dport_map_port: 127
+            8:
+                dport_map_port: 128
+            140:
+                dport_map_port: 129
+            141:
+                dport_map_port: 130
+            142:
+                dport_map_port: 131
+            143:
+                dport_map_port: 132
+            136:
+                dport_map_port: 133
+            137:
+                dport_map_port: 134
+            138:
+                dport_map_port: 135
+            139:
+                dport_map_port: 136
+            263:
+                dport_map_port: 137
+            264:
+                dport_map_port: 138
+            265:
+                dport_map_port: 139
+            266:
+                dport_map_port: 140
+            267:
+                dport_map_port: 141
+            268:
+                dport_map_port: 142
+            269:
+                dport_map_port: 143
+            270:
+                dport_map_port: 144
+            148:
+                dport_map_port: 145
+            149:
+                dport_map_port: 146
+            150:
+                dport_map_port: 147
+            151:
+                dport_map_port: 148
+            144:
+                dport_map_port: 149
+            145:
+                dport_map_port: 150
+            146:
+                dport_map_port: 151
+            147:
+                dport_map_port: 152
+            255:
+                dport_map_port: 153
+            256:
+                dport_map_port: 154
+            257:
+                dport_map_port: 155
+            258:
+                dport_map_port: 156
+            259:
+                dport_map_port: 157
+            260:
+                dport_map_port: 158
+            261:
+                dport_map_port: 159
+            262:
+                dport_map_port: 160
+            157:
+                dport_map_port: 161
+            158:
+                dport_map_port: 162
+            159:
+                dport_map_port: 163
+            160:
+                dport_map_port: 164
+            153:
+                dport_map_port: 165
+            154:
+                dport_map_port: 166
+            155:
+                dport_map_port: 167
+            156:
+                dport_map_port: 168
+            250:
+                dport_map_port: 169
+            251:
+                dport_map_port: 170
+            252:
+                dport_map_port: 171
+            253:
+                dport_map_port: 172
+            208:
+                dport_map_port: 173
+            209:
+                dport_map_port: 174
+            210:
+                dport_map_port: 175
+            211:
+                dport_map_port: 176
+            165:
+                dport_map_port: 177
+            166:
+                dport_map_port: 178
+            167:
+                dport_map_port: 179
+            168:
+                dport_map_port: 180
+            161:
+                dport_map_port: 181
+            162:
+                dport_map_port: 182
+            163:
+                dport_map_port: 183
+            164:
+                dport_map_port: 184
+            204:
+                dport_map_port: 185
+            205:
+                dport_map_port: 186
+            206:
+                dport_map_port: 187
+            207:
+                dport_map_port: 188
+            216:
+                dport_map_port: 189
+            217:
+                dport_map_port: 190
+            218:
+                dport_map_port: 191
+            219:
+                dport_map_port: 192
+            174:
+                dport_map_port: 193
+            175:
+                dport_map_port: 194
+            176:
+                dport_map_port: 195
+            177:
+                dport_map_port: 196
+            170:
+                dport_map_port: 197
+            171:
+                dport_map_port: 198
+            172:
+                dport_map_port: 199
+            173:
+                dport_map_port: 200
+            212:
+                dport_map_port: 201
+            213:
+                dport_map_port: 202
+            214:
+                dport_map_port: 203
+            215:
+                dport_map_port: 204
+            225:
+                dport_map_port: 205
+            226:
+                dport_map_port: 206
+            227:
+                dport_map_port: 207
+            228:
+                dport_map_port: 208
+            182:
+                dport_map_port: 209
+            183:
+                dport_map_port: 210
+            184:
+                dport_map_port: 211
+            185:
+                dport_map_port: 212
+            178:
+                dport_map_port: 213
+            179:
+                dport_map_port: 214
+            180:
+                dport_map_port: 215
+            181:
+                dport_map_port: 216
+            221:
+                dport_map_port: 217
+            222:
+                dport_map_port: 218
+            223:
+                dport_map_port: 219
+            224:
+                dport_map_port: 220
+            233:
+                dport_map_port: 221
+            234:
+                dport_map_port: 222
+            235:
+                dport_map_port: 223
+            236:
+                dport_map_port: 224
+            191:
+                dport_map_port: 225
+            192:
+                dport_map_port: 226
+            193:
+                dport_map_port: 227
+            194:
+                dport_map_port: 228
+            187:
+                dport_map_port: 229
+            188:
+                dport_map_port: 230
+            189:
+                dport_map_port: 231
+            190:
+                dport_map_port: 232
+            229:
+                dport_map_port: 233
+            230:
+                dport_map_port: 234
+            231:
+                dport_map_port: 235
+            232:
+                dport_map_port: 236
+            242:
+                dport_map_port: 237
+            243:
+                dport_map_port: 238
+            244:
+                dport_map_port: 239
+            245:
+                dport_map_port: 240
+            199:
+                dport_map_port: 241
+            200:
+                dport_map_port: 242
+            201:
+                dport_map_port: 243
+            202:
+                dport_map_port: 244
+            195:
+                dport_map_port: 245
+            196:
+                dport_map_port: 246
+            197:
+                dport_map_port: 247
+            198:
+                dport_map_port: 248
+            238:
+                dport_map_port: 249
+            239:
+                dport_map_port: 250
+            240:
+                dport_map_port: 251
+            241:
+                dport_map_port: 252
+            246:
+                dport_map_port: 253
+            247:
+                dport_map_port: 254
+            248:
+                dport_map_port: 255
+            249:
+                dport_map_port: 256
+...
+
+---
+device:
+    0:
+        PORT_CONFIG:
+            PORT_SYSTEM_PROFILE_OPERMODE_PIPEUNIQUE: 1
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x65214703
+                    TX_POLARITY_FLIP: 0x33
+                    RX_LANE_MAP: 0x02463175
+                    RX_POLARITY_FLIP: 0xc8
+
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x13472065
+                    TX_POLARITY_FLIP: 0x4c
+                    RX_LANE_MAP: 0x13572064
+                    RX_POLARITY_FLIP: 0xc8
+
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x65214703
+                    TX_POLARITY_FLIP: 0x33
+                    RX_LANE_MAP: 0x02463175
+                    RX_POLARITY_FLIP: 0xc8
+
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                    TX_LANE_MAP_AUTO: 0
+                    RX_LANE_MAP_AUTO: 0
+                    TX_POLARITY_FLIP_AUTO: 0
+                    RX_POLARITY_FLIP_AUTO: 0
+                    TX_LANE_MAP: 0x57036421
+                    TX_POLARITY_FLIP: 0x4c
+                    RX_LANE_MAP: 0x20641357
+                    RX_POLARITY_FLIP: 0x37
+
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x16524307
+                TX_POLARITY_FLIP: 0x1b
+                RX_LANE_MAP: 0x03425617
+                RX_POLARITY_FLIP: 0x62
+
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x12437560
+                TX_POLARITY_FLIP: 0x32
+                RX_LANE_MAP: 0x05243617
+                RX_POLARITY_FLIP: 0x37
+
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x56204731
+                TX_POLARITY_FLIP: 0xaa
+                RX_LANE_MAP: 0x31642075
+                RX_POLARITY_FLIP: 0x26
+
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x23740165
+                TX_POLARITY_FLIP: 0xb3
+                RX_LANE_MAP: 0x46135702
+                RX_POLARITY_FLIP: 0x26
+
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x56204731
+                TX_POLARITY_FLIP: 0xbb
+                RX_LANE_MAP: 0x31642075
+                RX_POLARITY_FLIP: 0xae
+
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x23740165
+                TX_POLARITY_FLIP: 0xae
+                RX_LANE_MAP: 0x26135704
+                RX_POLARITY_FLIP: 0xbf
+
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x56204731
+                TX_POLARITY_FLIP: 0x33
+                RX_LANE_MAP: 0x31624075
+                RX_POLARITY_FLIP: 0xbf
+
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x23740165
+                TX_POLARITY_FLIP: 0xa2
+                RX_LANE_MAP: 0x46135702
+                RX_POLARITY_FLIP: 0xae
+
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x56204731
+                TX_POLARITY_FLIP: 0xaa
+                RX_LANE_MAP: 0x31652074
+                RX_POLARITY_FLIP: 0x26
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x23740165
+                TX_POLARITY_FLIP: 0xb3
+                RX_LANE_MAP: 0x56234701
+                RX_POLARITY_FLIP: 0x26
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x54260137
+                TX_POLARITY_FLIP: 0x40
+                RX_LANE_MAP: 0x56234701
+                RX_POLARITY_FLIP: 0x8e
+
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x23740165
+                TX_POLARITY_FLIP: 0x8f
+                RX_LANE_MAP: 0x43265107
+                RX_POLARITY_FLIP: 0x40
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x50742361
+                TX_POLARITY_FLIP: 0xbb
+                RX_LANE_MAP: 0x43207651
+                RX_POLARITY_FLIP: 0x1b
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x76241530
+                TX_POLARITY_FLIP: 0x8e
+                RX_LANE_MAP: 0x21364075
+                RX_POLARITY_FLIP: 0xb
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x50742361
+                TX_POLARITY_FLIP: 0x6a
+                RX_LANE_MAP: 0x62317540
+                RX_POLARITY_FLIP: 0xf9
+
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x76241530
+                TX_POLARITY_FLIP: 0xa2
+                RX_LANE_MAP: 0x53471026
+                RX_POLARITY_FLIP: 0xf3
+
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x50742361
+                TX_POLARITY_FLIP: 0xfa
+                RX_LANE_MAP: 0x43206751
+                RX_POLARITY_FLIP: 0x7b
+
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x76241530
+                TX_POLARITY_FLIP: 0x9a
+                RX_LANE_MAP: 0x12364075
+                RX_POLARITY_FLIP: 0x12
+
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x50742361
+                TX_POLARITY_FLIP: 0xbb
+                RX_LANE_MAP: 0x62317540
+                RX_POLARITY_FLIP: 0x9f
+
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x76241530
+                TX_POLARITY_FLIP: 0x2b
+                RX_LANE_MAP: 0x53471026
+                RX_POLARITY_FLIP: 0xb1
+
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x27045361
+                TX_POLARITY_FLIP: 0xa
+                RX_LANE_MAP: 0x43206751
+                RX_POLARITY_FLIP: 0xf9
+
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x76241530
+                TX_POLARITY_FLIP: 0x87
+                RX_LANE_MAP: 0x21564073
+                RX_POLARITY_FLIP: 0xbb
+
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x50742361
+                TX_POLARITY_FLIP: 0xb2
+                RX_LANE_MAP: 0x62317540
+                RX_POLARITY_FLIP: 0xff
+
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x76142503
+                TX_POLARITY_FLIP: 0xb1
+                RX_LANE_MAP: 0x53472016
+                RX_POLARITY_FLIP: 0x11
+
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x63742051
+                TX_POLARITY_FLIP: 0xd4
+                RX_LANE_MAP: 0x70214653
+                RX_POLARITY_FLIP: 0x99
+
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x02536174
+                TX_POLARITY_FLIP: 0x93
+                RX_LANE_MAP: 0x54730612
+                RX_POLARITY_FLIP: 0x4d
+
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x27306415
+                TX_POLARITY_FLIP: 0xd4
+                RX_LANE_MAP: 0x61205347
+                RX_POLARITY_FLIP: 0xc2
+
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x02536174
+                TX_POLARITY_FLIP: 0x93
+                RX_LANE_MAP: 0x27014653
+                RX_POLARITY_FLIP: 0xac
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x46172530
+                TX_POLARITY_FLIP: 0x17
+                RX_LANE_MAP: 0x01265347
+                RX_POLARITY_FLIP: 0x4d
+
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x63742051
+                TX_POLARITY_FLIP: 0xd4
+                RX_LANE_MAP: 0x16472035
+                RX_POLARITY_FLIP: 0x66
+
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x56172430
+                TX_POLARITY_FLIP: 0x36
+                RX_LANE_MAP: 0x23541706
+                RX_POLARITY_FLIP: 0x6c
+
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x27306415
+                TX_POLARITY_FLIP: 0xd4
+                RX_LANE_MAP: 0x07463521
+                RX_POLARITY_FLIP: 0x39
+
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x14760325
+                TX_POLARITY_FLIP: 0x9e
+                RX_LANE_MAP: 0x47531620
+                RX_POLARITY_FLIP: 0xab
+
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x05217634
+                TX_POLARITY_FLIP: 0xfa
+                RX_LANE_MAP: 0x25460137
+                RX_POLARITY_FLIP: 0xde
+
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x24563017
+                TX_POLARITY_FLIP: 0xd3
+                RX_LANE_MAP: 0x35217640
+                RX_POLARITY_FLIP: 0x91
+
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x05217634
+                TX_POLARITY_FLIP: 0xbb
+                RX_LANE_MAP: 0x04571326
+                RX_POLARITY_FLIP: 0x9f
+
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x21743065
+                TX_POLARITY_FLIP: 0x33
+                RX_LANE_MAP: 0x47532610
+                RX_POLARITY_FLIP: 0x2b
+
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x05217634
+                TX_POLARITY_FLIP: 0x22
+                RX_LANE_MAP: 0x25460137
+                RX_POLARITY_FLIP: 0x56
+
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x23714065
+                TX_POLARITY_FLIP: 0x87
+                RX_LANE_MAP: 0x35127640
+                RX_POLARITY_FLIP: 0x33
+
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x05217634
+                TX_POLARITY_FLIP: 0xfa
+                RX_LANE_MAP: 0x04571326
+                RX_POLARITY_FLIP: 0xff
+
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x23714065
+                TX_POLARITY_FLIP: 0x3f
+                RX_LANE_MAP: 0x47532610
+                RX_POLARITY_FLIP: 0x33
+
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x05217634
+                TX_POLARITY_FLIP: 0xf3
+                RX_LANE_MAP: 0x25460137
+                RX_POLARITY_FLIP: 0xb4
+
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x23714065
+                TX_POLARITY_FLIP: 0x8e
+                RX_LANE_MAP: 0x35217640
+                RX_POLARITY_FLIP: 0x71
+
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x05217634
+                TX_POLARITY_FLIP: 0x6a
+                RX_LANE_MAP: 0x03561427
+                RX_POLARITY_FLIP: 0xf9
+
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x13540267
+                TX_POLARITY_FLIP: 0x2b
+                RX_LANE_MAP: 0x10753264
+                RX_POLARITY_FLIP: 0x26
+
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x14706235
+                TX_POLARITY_FLIP: 0x62
+                RX_LANE_MAP: 0x56234701
+                RX_POLARITY_FLIP: 0x8f
+
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x13740265
+                TX_POLARITY_FLIP: 0x33
+                RX_LANE_MAP: 0x56234701
+                RX_POLARITY_FLIP: 0x62
+
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x56204731
+                TX_POLARITY_FLIP: 0xab
+                RX_LANE_MAP: 0x31652074
+                RX_POLARITY_FLIP: 0x26
+
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x13740265
+                TX_POLARITY_FLIP: 0x22
+                RX_LANE_MAP: 0x46135702
+                RX_POLARITY_FLIP: 0xae
+
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x76204531
+                TX_POLARITY_FLIP: 0xb3
+                RX_LANE_MAP: 0x31624075
+                RX_POLARITY_FLIP: 0xbf
+
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x13740265
+                TX_POLARITY_FLIP: 0xaa
+                RX_LANE_MAP: 0x26135704
+                RX_POLARITY_FLIP: 0xbf
+
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x76204531
+                TX_POLARITY_FLIP: 0xbf
+                RX_LANE_MAP: 0x31642075
+                RX_POLARITY_FLIP: 0xae
+
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x13740265
+                TX_POLARITY_FLIP: 0x33
+                RX_LANE_MAP: 0x46135702
+                RX_POLARITY_FLIP: 0x26
+
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x76204531
+                TX_POLARITY_FLIP: 0xae
+                RX_LANE_MAP: 0x31642075
+                RX_POLARITY_FLIP: 0x26
+
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x46237015
+                TX_POLARITY_FLIP: 0xad
+                RX_LANE_MAP: 0x71634250
+                RX_POLARITY_FLIP: 0x37
+
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x20347561
+                TX_POLARITY_FLIP: 0x27
+                RX_LANE_MAP: 0x04625137
+                RX_POLARITY_FLIP: 0x9d
+
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x56127430
+                TX_POLARITY_FLIP: 0xcc
+                RX_LANE_MAP: 0x21650347
+                RX_POLARITY_FLIP: 0x37
+
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x64305712
+                TX_POLARITY_FLIP: 0xb3
+                RX_LANE_MAP: 0x03472165
+                RX_POLARITY_FLIP: 0xc8
+
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x12563074
+                TX_POLARITY_FLIP: 0xcc
+                RX_LANE_MAP: 0x12563074
+                RX_POLARITY_FLIP: 0xc8
+
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x64305712
+                TX_POLARITY_FLIP: 0xb3
+                RX_LANE_MAP: 0x03472165
+                RX_POLARITY_FLIP: 0xc8
+
+...
+
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 5
+            :
+                PC_PHYS_PORT_ID: 5
+            ?
+                PORT_ID: 9
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 13
+            :
+                PC_PHYS_PORT_ID: 13
+            ?
+                PORT_ID: 17
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 21
+            :
+                PC_PHYS_PORT_ID: 21
+            ?
+                PORT_ID: 25
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 29
+            :
+                PC_PHYS_PORT_ID: 29
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 38
+            :
+                PC_PHYS_PORT_ID: 37
+            ?
+                PORT_ID: 42
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 46
+            :
+                PC_PHYS_PORT_ID: 45
+            ?
+                PORT_ID: 51
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 55
+            :
+                PC_PHYS_PORT_ID: 53
+            ?
+                PORT_ID: 59
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 63
+            :
+                PC_PHYS_PORT_ID: 61
+            ?
+                PORT_ID: 68
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 72
+            :
+                PC_PHYS_PORT_ID: 69
+            ?
+                PORT_ID: 76
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 80
+            :
+                PC_PHYS_PORT_ID: 77
+            ?
+                PORT_ID: 85
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 89
+            :
+                PC_PHYS_PORT_ID: 85
+            ?
+                PORT_ID: 93
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 97
+            :
+                PC_PHYS_PORT_ID: 93
+            ?
+                PORT_ID: 102
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 106
+            :
+                PC_PHYS_PORT_ID: 101
+            ?
+                PORT_ID: 110
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 114
+            :
+                PC_PHYS_PORT_ID: 109
+            ?
+                PORT_ID: 119
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 123
+            :
+                PC_PHYS_PORT_ID: 117
+            ?
+                PORT_ID: 127
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 131
+            :
+                PC_PHYS_PORT_ID: 125
+            ?
+                PORT_ID: 136
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 140
+            :
+                PC_PHYS_PORT_ID: 133
+            ?
+                PORT_ID: 144
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 148
+            :
+                PC_PHYS_PORT_ID: 141
+            ?
+                PORT_ID: 153
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 157
+            :
+                PC_PHYS_PORT_ID: 149
+            ?
+                PORT_ID: 161
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 165
+            :
+                PC_PHYS_PORT_ID: 157
+            ?
+                PORT_ID: 170
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 174
+            :
+                PC_PHYS_PORT_ID: 165
+            ?
+                PORT_ID: 178
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 182
+            :
+                PC_PHYS_PORT_ID: 173
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 191
+            :
+                PC_PHYS_PORT_ID: 181
+            ?
+                PORT_ID: 195
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 199
+            :
+                PC_PHYS_PORT_ID: 189
+            ?
+                PORT_ID: 204
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 208
+            :
+                PC_PHYS_PORT_ID: 197
+            ?
+                PORT_ID: 212
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 216
+            :
+                PC_PHYS_PORT_ID: 205
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 225
+            :
+                PC_PHYS_PORT_ID: 213
+            ?
+                PORT_ID: 229
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 233
+            :
+                PC_PHYS_PORT_ID: 221
+            ?
+                PORT_ID: 238
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 242
+            :
+                PC_PHYS_PORT_ID: 229
+            ?
+                PORT_ID: 246
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 250
+            :
+                PC_PHYS_PORT_ID: 237
+            ?
+                PORT_ID: 255
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 259
+            :
+                PC_PHYS_PORT_ID: 245
+            ?
+                PORT_ID: 263
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 267
+            :
+                PC_PHYS_PORT_ID: 253
+...
+
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [1, 5, 9, 13,
+                          17, 21, 25, 29,
+                          34, 38, 42, 46,
+                          51, 55, 59, 63,
+                          68, 72, 76, 80,
+                          85, 89, 93, 97,
+                          102, 106, 110, 114,
+                          119, 123, 127, 131,
+                          136, 140, 144, 148,
+                          153, 157, 161, 165,
+                          170, 174, 178, 182,
+                          187, 191, 195, 199,
+                          204, 208, 212, 216,
+                          221, 225, 229, 233,
+                          238, 242, 246, 250,
+                          255, 259, 263, 267]
+            :
+                ENABLE: 0
+                SPEED: 400000
+                NUM_LANES: 8
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+                LINK_TRAINING: 0
+...
+
+---
+device:
+    0:
+        TM_SCHEDULER_CONFIG:
+            NUM_MC_Q: NUM_MC_Q_4
+
+...
+
+
+---
+device:
+    0:
+        PC_TX_TAPS:
+            ?
+                PORT_ID: 68
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 68
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 68
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 68
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 68
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 68
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 68
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 68
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 72
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 72
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 72
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 72
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 72
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 72
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 72
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 72
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 25
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 25
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 25
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 25
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 25
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 25
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 25
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 25
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 21
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 21
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 21
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 21
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 21
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 21
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 21
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 21
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 76
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 76
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 76
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 76
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 76
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 76
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 76
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 76
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 80
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 80
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 80
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 80
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 80
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 80
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 80
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 80
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 10
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 10
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 34
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 10
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 29
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 29
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 29
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 29
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 29
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 10
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 29
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 10
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 29
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 10
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 29
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 85
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 85
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 85
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 85
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 85
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 85
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 85
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 85
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 89
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 89
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 89
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 89
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 89
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 89
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 89
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 89
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 42
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 42
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 42
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 42
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 42
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 42
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 42
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 42
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 38
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 38
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 38
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 38
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 38
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 138
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 38
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 38
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 38
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 93
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 93
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 93
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 93
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 93
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 93
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 93
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 93
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 97
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 97
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 97
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 97
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 97
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 97
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 97
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 97
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 51
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 51
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 51
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 51
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 51
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 51
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 51
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 51
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 46
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 46
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 46
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 138
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 46
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 138
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 46
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 46
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 46
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 46
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 102
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 102
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 102
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 102
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 102
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 102
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 102
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 102
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 106
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 106
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 14
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 106
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 106
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 106
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 106
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 106
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 106
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 59
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 59
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 2
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 59
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 2
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 59
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 59
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 59
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 59
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 59
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 55
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 138
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 55
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 55
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 55
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 55
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 55
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 55
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 55
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 110
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 110
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 110
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 110
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 110
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 110
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 110
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 110
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 114
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 114
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 114
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 114
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 114
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 114
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 114
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 114
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 17
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 17
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 17
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 17
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 17
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 17
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 17
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 17
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 138
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 63
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 63
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 63
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 63
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 63
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 63
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 63
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 63
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 119
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 119
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 119
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 119
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 119
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 119
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 119
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 119
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 123
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 123
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 123
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 123
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 123
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 123
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 123
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 123
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 9
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 9
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 9
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 9
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 9
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 9
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 9
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 20
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 9
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 13
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 13
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 6
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 13
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 13
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 13
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 13
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 13
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 13
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 127
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 127
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 127
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 127
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 127
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 127
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 127
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 127
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 131
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 131
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 131
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 131
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 131
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 131
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 131
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 131
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 1
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 20
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 5
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 140
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 140
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 140
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 140
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 140
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 140
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 140
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 140
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 136
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 136
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 136
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 136
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 136
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 136
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 136
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 136
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 263
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 263
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 263
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 263
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 263
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 263
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 263
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 263
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 267
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 267
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 267
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 267
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 267
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 267
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 267
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 267
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 148
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 148
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 148
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 148
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 148
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 148
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 148
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 148
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 144
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 144
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 144
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 144
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 144
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 144
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 144
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 144
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 255
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 138
+                TX_POST: 6
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 255
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 255
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 138
+                TX_POST: 6
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 255
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 10
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 255
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 138
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 255
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 255
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 255
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 10
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 259
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 259
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 259
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 259
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 259
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 259
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 259
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 259
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 134
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 157
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 157
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 157
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 157
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 157
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 157
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 157
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 157
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 153
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 153
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 153
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 153
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 153
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 153
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 153
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 153
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 250
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 250
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 250
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 250
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 250
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 250
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 132
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 250
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 2
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 250
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 208
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 208
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 208
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 208
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 208
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 208
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 208
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 208
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 165
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 165
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 165
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 165
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 165
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 165
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 165
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 165
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 161
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 161
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 161
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 161
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 161
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 161
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 161
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 161
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 204
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 204
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 204
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 204
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 204
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 0
+                TX_POST_SIGN: 0
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 204
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 204
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 204
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 216
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 216
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 216
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 216
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 216
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 138
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 216
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 138
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 216
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 138
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 216
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 138
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 174
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 174
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 174
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 174
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 174
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 174
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 174
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 174
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 170
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 170
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 170
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 170
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 170
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 170
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 170
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 170
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 212
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 212
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 212
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 212
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 212
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 212
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 212
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 212
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 225
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 138
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 225
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 225
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 225
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 225
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 225
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 225
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 138
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 225
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 138
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 182
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 182
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 182
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 182
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 182
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 182
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 182
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 182
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 178
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 178
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 178
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 178
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 178
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 178
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 178
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 178
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 221
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 221
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 221
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 221
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 138
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 221
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 221
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 221
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 221
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 233
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 233
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 233
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 138
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 233
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 233
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 233
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 233
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 233
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 138
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 191
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 191
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 191
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 191
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 191
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 191
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 191
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 191
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 187
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 187
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 187
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 187
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 187
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 187
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 187
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 12
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 187
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 144
+                TX_POST: 2
+                TX_POST_SIGN: 1
+                TX_POST2: 0
+                TX_POST2_SIGN: 0
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 4
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 229
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 229
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 229
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 229
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 229
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 229
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 229
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 229
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 242
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 242
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 242
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 242
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 242
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 242
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 242
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 8
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 242
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 199
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 199
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 199
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 199
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 199
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 199
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 199
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 199
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 195
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 195
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 195
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 195
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 195
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 195
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 195
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 195
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 16
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 0
+                TX_POST3_SIGN: 0
+                TX_PRE: 8
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 238
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 238
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 238
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 238
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 12
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 238
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 238
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 238
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 238
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 246
+                LANE_INDEX: [0]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 246
+                LANE_INDEX: [1]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 138
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 246
+                LANE_INDEX: [2]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 246
+                LANE_INDEX: [3]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 140
+                TX_POST: 4
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 246
+                LANE_INDEX: [4]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 246
+                LANE_INDEX: [5]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+            ?
+                PORT_ID: 246
+                LANE_INDEX: [6]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 136
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 2
+            ?
+                PORT_ID: 246
+                LANE_INDEX: [7]
+            :
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TX_POST_AUTO: 0
+                TX_MAIN_AUTO: 0
+                TX_PRE_AUTO: 0
+                TX_PRE2_AUTO: 0
+                TX_POST2_AUTO: 0
+                TX_POST3_AUTO: 0
+                TX_AMP_AUTO: 0
+                TX_MAIN: 138
+                TX_POST: 8
+                TX_POST_SIGN: 1
+                TX_POST2: 4
+                TX_POST2_SIGN: 1
+                TX_POST3: 4
+                TX_POST3_SIGN: 1
+                TX_PRE: 16
+                TX_PRE_SIGN: 1
+                TX_PRE2: 0
+...
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6930-64qc-r0/custom_led.bin
new file mode 100644
index 0000000000000000000000000000000000000000..70920dd922cfa27f582da228b4626d288c196333
GIT binary patch
literal 576
zcmYk(Pe_w-7zgn0?|t9>H$q9=(1!C}$~L8RMYzgdxAlOSl&*x9rt2Rw=+Hk{hYlU0
ztqj_0fp4utMTd;QUNeXi)}cd(=r^HAR`5#1hzQo9Lx-Tbi(a0?=gafJm!~{GM#D5f
zQ7S*bI%~p2{~dy?5o;5I4#hOJpUi32^FsF}=WsZFwn@cgT)35SUQ3IrJtL_z$?WJP
zsjk6PnzAXD{get*NSUG#?21~MT?*8r)DRZ=kX7``3Ns+1WrWaf<54<peMs@>qAq#`
z&7+Jszv%}miIp>LueHuq@to+XQ5s!E9XYgH`1z_zs~Qmb4wy9f>I)8k9Tz^sZ|0)0
z!C%9@emghIHlvr=U0387IU?>zk8-XFh9I9x_EBs|*doa}T8?(~PlvA;SPN^mR+={i
zb0m4-T_2n#X0WbBJ?1XzEKti4khl<VaWNqCPQ%S~nu!imd3<XkMwZqi2`y17t?EA7
zUh$K(;>9)I+_vIW^$%-&bL(8?6Jyn_-PLRPQX~86{4y^2UoBZ?cfP(!8a<#VR9?ta
zz8g?Nz$4tpQ#{5zo?!tm(ThFk!vF?x5Qi{|1WsTAr*Q@sa1obq1($IH8Qew|_n^Ur
wdU&uAK5RlKI<O73*aaKbfx(1s{KY@~#vlB`TfD)0yu(Kn@D)q=j%ED7e=P#E_y7O^

literal 0
HcmV?d00001

diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/default_sku b/device/micas/x86_64-micas_m2-w6930-64qc-r0/default_sku
new file mode 100644
index 000000000000..1adddd2977c0
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/default_sku
@@ -0,0 +1 @@
+M2-W6930-64QC l2
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/dev.xml b/device/micas/x86_64-micas_m2-w6930-64qc-r0/dev.xml
new file mode 100644
index 000000000000..5b1654e2bb90
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/dev.xml
@@ -0,0 +1,562 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--
+      ### type    1 result/1000
+          type    2 result/100
+          type    3 read bit
+     ### property need check must add int front
+-->
+<catalog>
+    <fans>
+        <fan id="fan1" >
+            <property name="present" location="/sys/wb_plat/fan/fan1/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan1/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan1/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/95-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan1/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan1/motor1/speed"/>
+        </fan>
+        <fan id="fan2" >
+            <property name="present" location="/sys/wb_plat/fan/fan2/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan2/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan2/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/104-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan2/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan2/motor1/speed"/>
+        </fan>
+        <fan id="fan3" >
+            <property name="present" location="/sys/wb_plat/fan/fan3/present"       type="4" decode="fanpresent" default="1" />
+            <property name="status"  location="/sys/wb_plat/fan/fan3/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan3/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/96-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan3/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan3/motor1/speed"/>
+        </fan>
+        <fan id="fan4" >
+            <property name="present" location="/sys/wb_plat/fan/fan4/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan4/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan4/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/105-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan4/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan4/motor1/speed"/>
+        </fan>
+        <fan id="fan5" >
+            <property name="present" location="/sys/wb_plat/fan/fan5/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan5/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan5/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/97-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan5/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan5/motor1/speed"/>
+        </fan>
+        <fan id="fan6" >
+            <property name="present" location="/sys/wb_plat/fan/fan6/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan6/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan6/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/106-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan6/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan6/motor1/speed"/>
+        </fan>
+        <fan id="fan7" >
+            <property name="present" location="/sys/wb_plat/fan/fan7/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan7/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan7/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/98-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan7/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan7/motor1/speed"/>
+        </fan>
+        <fan id="fan8" >
+            <property name="present" location="/sys/wb_plat/fan/fan8/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan8/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan8/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/107-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan8/motor0/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan8/motor1/speed"/>
+        </fan>
+    </fans>
+    <temps>
+        <temp id="air_inlet_tem" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/79-004b/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/79-004b/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/79-004b/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="fan1_air_TR" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/93-0048/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/93-0048/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/93-0048/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="fan1_air_TL" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/94-0049/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/94-0049/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/94-0049/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="fan2_air_BR" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/102-0048/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/102-0048/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/102-0048/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="fan2_air_BL" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/103-0049/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/103-0049/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/103-0049/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="air_out_TR" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/117-004b/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/117-004b/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/117-004b/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="air_out_TL" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/118-004f/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/118-004f/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/118-004f/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+        <temp id="air_local_tmp_TL" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/119-004c/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/119-004c/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/119-004c/hwmon/*/temp1_crit_hyst" type="1"/>
+        </temp>
+        <temp id="air_remote_tmp_TL" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/119-004c/hwmon/*/temp2_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/119-004c/hwmon/*/temp2_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/119-004c/hwmon/*/temp2_crit_hyst" type="1"/>
+        </temp>
+        <temp id="air_local_tmp_TR" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/120-004c/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/120-004c/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/120-004c/hwmon/*/temp1_crit_hyst" type="1"/>
+        </temp>
+        <temp id="air_remote_tmp_TR" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/120-004c/hwmon/*/temp2_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/120-004c/hwmon/*/temp2_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/120-004c/hwmon/*/temp2_crit_hyst" type="1"/>
+        </temp>
+        <temp id="air_outlet_B" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/198-004b/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"     location="/sys/bus/i2c/devices/198-004b/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"       location="/sys/bus/i2c/devices/198-004b/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+    </temps>
+    <psus>
+        <psu id="psu1" >
+            <property name="present" location="/sys/wb_plat/psu/psu1/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu1/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/83-0050/eeprom"/>
+            <property name="in_current"    location="/sys/bus/i2c/devices/83-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"    location="/sys/bus/i2c/devices/83-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/83-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/83-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/83-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/83-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/83-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/83-0058/hwmon/*/power2_input"  type="5"/>
+        </psu>
+        <psu id="psu2" >
+            <property name="present" location="/sys/wb_plat/psu/psu2/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu2/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/84-0050/eeprom"/>
+            <property name="in_current"    location="/sys/bus/i2c/devices/84-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"    location="/sys/bus/i2c/devices/84-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/84-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/84-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/84-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/84-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/84-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/84-0058/hwmon/*/power2_input"  type="5"/>
+        </psu>
+        <psu id="psu3" >
+            <property name="present" location="/sys/wb_plat/psu/psu3/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu3/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/86-0050/eeprom"/>
+            <property name="in_current"    location="/sys/bus/i2c/devices/86-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"    location="/sys/bus/i2c/devices/86-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/86-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/86-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/86-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/86-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/86-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/86-0058/hwmon/*/power2_input"  type="5"/>
+        </psu>
+        <psu id="psu4" >
+            <property name="present" location="/sys/wb_plat/psu/psu4/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu4/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/85-0050/eeprom"/>
+            <property name="in_current"    location="/sys/bus/i2c/devices/85-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"    location="/sys/bus/i2c/devices/85-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/85-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/85-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/85-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/85-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/85-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/85-0058/hwmon/*/power2_input"  type="5"/>
+        </psu>
+    </psus>
+    <dcdcs>
+       <dcdc id="MAC_VDD3.3V_standby" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_VDD12V_A" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="13.800" />
+            <property name="dcdc_min"   gettype="config" value="10.200" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_VDD1.0V_FPGA" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.150" />
+            <property name="dcdc_min"   gettype="config" value="0.850" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_VDD1.8V_FPGA" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.070" />
+            <property name="dcdc_min"   gettype="config" value="1.530" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_VDD1.2V_FPGA" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in5_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.380" />
+            <property name="dcdc_min"   gettype="config" value="1.020" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_VDD3.3V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in6_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_VDD5V_CLK_MCU" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in7_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="5.750" />
+            <property name="dcdc_min"   gettype="config" value="4.250" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_VDD3.3V_MAC" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in8_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_VDDO1.8V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in9_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.070" />
+            <property name="dcdc_min"   gettype="config" value="1.530" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_VDDO1.2V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in10_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.380" />
+            <property name="dcdc_min"   gettype="config" value="1.020" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_VDD_CORE" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in11_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.980" />
+            <property name="dcdc_min"   gettype="config" value="0.680" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_VDD3.3_CLK" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in12_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_VDD_ANALOG" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in13_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.885" />
+            <property name="dcdc_min"   gettype="config" value="0.655" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_VDD1.2V_MAC_A" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in14_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.380" />
+            <property name="dcdc_min"   gettype="config" value="1.020" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_AVDD1.8V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in15_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.070" />
+            <property name="dcdc_min"   gettype="config" value="1.530" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_VDD_ANALOG2" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in16_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.885" />
+            <property name="dcdc_min"   gettype="config" value="0.655" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_VDD12V_B" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="13.800" />
+            <property name="dcdc_min"   gettype="config" value="10.200" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_VDD5.0V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="5.750" />
+            <property name="dcdc_min"   gettype="config" value="4.250" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_QSFPDD_VDD3.3V_A" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_QSFPDD_VDD3.3V_B" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_QSFPDD_VDD3.3V_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in5_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_QSFPDD_VDD3.3V_D" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in6_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_QSFPDD_VDD3.3V_E" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in7_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_QSFPDD_VDD3.3V_F" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in8_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="PORT_VDD1.0V_FPGA" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.150" />
+            <property name="dcdc_min"   gettype="config" value="0.850" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="PORT_VDD1.8V_FPGA" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.070" />
+            <property name="dcdc_min"   gettype="config" value="1.530" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="PORT_VDD1.2V_FPGA" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.380" />
+            <property name="dcdc_min"   gettype="config" value="1.020" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="PORT_VDD3.3V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="PORT_VDD12V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in5_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="13.800" />
+            <property name="dcdc_min"   gettype="config" value="10.200" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="PORT_VDD3.3V_standby" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in6_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="PORT_QSFPDD_VDD3.3V_A" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in7_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="PORT_QSFPDD_VDD3.3V_B" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in8_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="PORT_QSFPDD_VDD3.3V_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in9_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="PORT_QSFPDD_VDD3.3V_D" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in10_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="PORT_QSFPDD_VDD3.3V_E" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in11_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="PORT_QSFPDD_VDD3.3V_F" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in12_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.795" />
+            <property name="dcdc_min"   gettype="config" value="2.805" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="MAC_VDD1.2V_MAC_B" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/131-0067/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.380" />
+            <property name="dcdc_min"   gettype="config" value="1.020" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="BASE_VDD12V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/77-005b/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="13.23" />
+            <property name="dcdc_min"   gettype="config" value="10.83" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="BASE_SW_VDD1.2V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/77-005b/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.323" />
+            <property name="dcdc_min"   gettype="config" value="1.083" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="BASE_VDD2.5V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/77-005b/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.745" />
+            <property name="dcdc_min"   gettype="config" value="2.247" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="BASE_VDD3.3V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/77-005b/hwmon/hwmon*/in4_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.616" />
+            <property name="dcdc_min"   gettype="config" value="2.960" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="BASE_SSD_VDD3.3V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/77-005b/hwmon/hwmon*/in5_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.638" />
+            <property name="dcdc_min"   gettype="config" value="2.978" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="CPU_P1V05_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/78-0067/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.232" />
+            <property name="dcdc_min"   gettype="config" value="0.882" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="CPU_VCCIN_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/78-0067/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.244" />
+            <property name="dcdc_min"   gettype="config" value="1.368" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="CPU_VCCD_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/78-006c/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.452" />
+            <property name="dcdc_min"   gettype="config" value="0.990" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="CPU_VCCSCSUS_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/78-006c/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.265" />
+            <property name="dcdc_min"   gettype="config" value="0.855" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="CPU_P5V_AUX_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/78-0043/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="6.347" />
+            <property name="dcdc_min"   gettype="config" value="3.852" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="CPU_P3V3_STBY_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/78-0043/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="4.004" />
+            <property name="dcdc_min"   gettype="config" value="2.682" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+        <dcdc id="CPU_P1V7_VCCSCFUSESUS_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/78-0043/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.057" />
+            <property name="dcdc_min"   gettype="config" value="1.377" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+    </dcdcs>
+    <mactemps>
+        <mactemp id="MAC_DIE_0" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/122-0044/hwmon/hwmon*/temp1_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_1" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/122-0044/hwmon/hwmon*/temp2_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_2" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/122-0044/hwmon/hwmon*/temp3_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_3" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/122-0044/hwmon/hwmon*/temp4_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_4" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/122-0044/hwmon/hwmon*/temp5_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_5" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/122-0044/hwmon/hwmon*/temp6_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_6" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/122-0044/hwmon/hwmon*/temp7_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_7" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/122-0044/hwmon/hwmon*/temp8_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_8" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/122-0044/hwmon/hwmon*/temp9_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_9" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/122-0044/hwmon/hwmon*/temp10_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_10" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/122-0044/hwmon/hwmon*/temp11_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_11" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/122-0044/hwmon/hwmon*/temp12_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_12" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/122-0044/hwmon/hwmon*/temp13_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_13" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/122-0044/hwmon/hwmon*/temp14_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_14" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/122-0044/hwmon/hwmon*/temp15_input"  type="1"/>
+        </mactemp>
+    </mactemps>
+    <cpus location="/sys/class/hwmon/hwmon0"/>
+    <decode>
+    <fanpresent>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </fanpresent>
+    <fanstatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </fanstatus>
+    <psucheck>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </psucheck>
+    <psustatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </psustatus>
+    <psutype>
+        <code key="DPS-1300AB-6 S" value="PA1300I-F"/>
+        <code key="GW-CRPS1300D" value="PA1300I-F"/>
+    </psutype>
+    <fan_display_name>
+        <code key="M2EFAN II-F" value="M2EFAN II-F"/>
+    </fan_display_name>
+    </decode>
+</catalog>
+
+
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/fru.py b/device/micas/x86_64-micas_m2-w6930-64qc-r0/fru.py
new file mode 100644
index 000000000000..f95164e03601
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/fru.py
@@ -0,0 +1,961 @@
+#!/usr/bin/python3
+import collections
+from datetime import datetime, timedelta
+from bitarray import bitarray
+
+
+__DEBUG__ = "N"
+
+
+class FruException(Exception):
+    def __init__(self, message='fruerror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+
+def e_print(err):
+    print("ERROR: " + err)
+
+
+def d_print(debug_info):
+    if __DEBUG__ == "Y":
+        print(debug_info)
+
+
+class FruUtil():
+    @staticmethod
+    def decodeLength(value):
+        a = bitarray(8)
+        a.setall(True)
+        a[0:1] = 0
+        a[1:2] = 0
+        x = ord(a.tobytes())
+        return x & ord(value)
+
+    @staticmethod
+    def minToData():
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        endtime = datetime.now()
+        seconds = (endtime - starttime).total_seconds()
+        mins = seconds // 60
+        m = int(round(mins))
+        return m
+
+    @staticmethod
+    def getTimeFormat():
+        return datetime.now().strftime('%Y-%m-%d')
+
+    @staticmethod
+    def getTypeLength(value):
+        if value is None or len(value) == 0:
+            return 0
+        a = bitarray(8)
+        a.setall(False)
+        a[0:1] = 1
+        a[1:2] = 1
+        x = ord(a.tobytes())
+        return x | len(value)
+
+    @staticmethod
+    def checksum(b):
+        result = 0
+        for item in b:
+            result += ord(item)
+        return (0x100 - (result & 0xff)) & 0xff
+
+
+class BaseArea(object):
+    SUGGESTED_SIZE_COMMON_HEADER = 8
+    SUGGESTED_SIZE_INTERNAL_USE_AREA = 72
+    SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32
+    SUGGESTED_SIZE_BOARD_INFO_AREA = 80
+    SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80
+
+    INITVALUE = b'\x00'
+    resultvalue = INITVALUE * 256
+    COMMON_HEAD_VERSION = b'\x01'
+    __childList = None
+
+    def __init__(self, name="", size=0, offset=0):
+        self.__childList = []
+        self._offset = offset
+        self.name = name
+        self._size = size
+        self._isPresent = False
+        self._data = b'\x00' * size
+
+    @property
+    def childList(self):
+        return self.__childList
+
+    @childList.setter
+    def childList(self, value):
+        self.__childList = value
+
+    @property
+    def offset(self):
+        return self._offset
+
+    @offset.setter
+    def offset(self, value):
+        self._offset = value
+
+    @property
+    def size(self):
+        return self._size
+
+    @size.setter
+    def size(self, value):
+        self._size = value
+
+    @property
+    def data(self):
+        return self._data
+
+    @data.setter
+    def data(self, value):
+        self._data = value
+
+    @property
+    def isPresent(self):
+        return self._isPresent
+
+    @isPresent.setter
+    def isPresent(self, value):
+        self._isPresent = value
+
+
+class InternalUseArea(BaseArea):
+    pass
+
+
+class ChassisInfoArea(BaseArea):
+    pass
+
+
+class BoardInfoArea(BaseArea):
+    _boardTime = None
+    _fields = None
+    _mfg_date = None
+    areaversion = None
+    _boardversion = None
+    _language = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "mfg_date            : %s \n" \
+                    "boardManufacturer   : %s \n" \
+                    "boardProductName    : %s \n" \
+                    "boardSerialNumber   : %s \n" \
+                    "boardPartNumber     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.boardversion), self.size,
+                              self.language, self.getMfgRealData(),
+                              self.boardManufacturer, self.boardProductName,
+                              self.boardSerialNumber, self.boardPartNumber,
+                              self.fruFileId)
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "boardextra%d         : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["boardversion"] = ord(self.boardversion)
+        dic["boardlength"] = self.size
+        dic["boardlanguage"] = self.language
+        dic["boardmfg_date"] = self.getMfgRealData()
+        dic["boardManufacturer"] = self.boardManufacturer
+        dic["boardProductName"] = self.boardProductName
+        dic["boardSerialNumber"] = self.boardSerialNumber
+        dic["boardPartNumber"] = self.boardPartNumber
+        dic["boardfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]
+        index += 1
+        d_print("decode length :%d class size:%d" %
+                ((ord(self.data[index]) * 8), self.size))
+        index += 2
+
+        timetmp = self.data[index: index + 3]
+        self.mfg_date = ord(timetmp[0]) | (
+            ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16)
+        d_print("decode getMfgRealData :%s" % self.getMfgRealData())
+        index += 3
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardManufacturer:%s" % self.boardManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardProductName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardProductName:%s" % self.boardProductName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardSerialNumber:%s" % self.boardSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardPartNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardPartNumber:%s" % self.boardPartNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if self.data[index] != chr(0xc1):
+                templen = FruUtil.decodeLength(self.data[index])
+                tmpval = self.data[index + 1: index + templen + 1]
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+            else:
+                break
+
+    def fruSetValue(self, field, value):
+        tmp_field = getattr(self, field, None)
+        if tmp_field is not None:
+            setattr(self, field, value)
+
+    def recalcute(self):
+        d_print("boardInfoArea version:%x" % ord(self.boardversion))
+        d_print("boardInfoArea length:%d" % self.size)
+        d_print("boardInfoArea language:%x" % self.language)
+        self.mfg_date = FruUtil.minToData()
+        d_print("boardInfoArea mfg_date:%x" % self.mfg_date)
+
+        self.data = chr(ord(self.boardversion)) + \
+            chr(self.size // 8) + chr(self.language)
+
+        self.data += chr(self.mfg_date & 0xFF)
+        self.data += chr((self.mfg_date >> 8) & 0xFF)
+        self.data += chr((self.mfg_date >> 16) & 0xFF)
+
+        d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer)
+        typelength = FruUtil.getTypeLength(self.boardManufacturer)
+        self.data += chr(typelength)
+        self.data += self.boardManufacturer
+
+        d_print("boardInfoArea boardProductName:%s" % self.boardProductName)
+        self.data += chr(FruUtil.getTypeLength(self.boardProductName))
+        self.data += self.boardProductName
+
+        d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber))
+        self.data += self.boardSerialNumber
+
+        d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardPartNumber))
+        self.data += self.boardPartNumber
+
+        d_print("boardInfoArea fruFileId:%s" % self.fruFileId)
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is not None:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) // 8 + 1
+            self.size += incr * 8
+
+        self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+        d_print("self data:%d" % len(self.data))
+        d_print("self size:%d" % self.size)
+        d_print("adjust size:%d" % (self.size - len(self.data) - 1))
+        self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+
+        # checksum
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+    def getMfgRealData(self):
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        mactime = starttime + timedelta(minutes=self.mfg_date)
+        return mactime
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def mfg_date(self):
+        return self._mfg_date
+
+    @mfg_date.setter
+    def mfg_date(self, val):
+        self._mfg_date = val
+
+    @property
+    def boardversion(self):
+        self._boardversion = self.COMMON_HEAD_VERSION
+        return self._boardversion
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, val):
+        self._FRUFileID = val
+
+    @property
+    def boardPartNumber(self):
+        return self._boardPartNumber
+
+    @boardPartNumber.setter
+    def boardPartNumber(self, val):
+        self._boardPartNumber = val
+
+    @property
+    def boardSerialNumber(self):
+        return self._boardSerialNumber
+
+    @boardSerialNumber.setter
+    def boardSerialNumber(self, val):
+        self._boardSerialNumber = val
+
+    @property
+    def boardProductName(self):
+        return self._boradProductName
+
+    @boardProductName.setter
+    def boardProductName(self, val):
+        self._boradProductName = val
+
+    @property
+    def boardManufacturer(self):
+        return self._boardManufacturer
+
+    @boardManufacturer.setter
+    def boardManufacturer(self, val):
+        self._boardManufacturer = val
+
+    @property
+    def boardTime(self):
+        return self._boardTime
+
+    @boardTime.setter
+    def boardTime(self, val):
+        self._boardTime = val
+
+    @property
+    def fields(self):
+        return self._fields
+
+    @fields.setter
+    def fields(self, val):
+        self._fields = val
+
+
+class ProductInfoArea(BaseArea):
+    _productManufacturer = None
+    _productAssetTag = None
+    _FRUFileID = None
+    _language = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "productManufacturer : %s \n" \
+                    "productName         : %s \n" \
+                    "productPartModelName: %s \n" \
+                    "productVersion      : %s \n" \
+                    "productSerialNumber : %s \n" \
+                    "productAssetTag     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.areaversion), self.size,
+                              self.language, self.productManufacturer,
+                              self.productName, self.productPartModelName,
+                              self.productVersion, self.productSerialNumber,
+                              self.productAssetTag, self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "productextra%d       : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["productversion"] = ord(self.areaversion)
+        dic["productlength"] = self.size
+        dic["productlanguage"] = self.language
+        dic["productManufacturer"] = self.productManufacturer
+        dic["productName"] = self.productName
+        dic["productPartModelName"] = self.productPartModelName
+        dic["productVersion"] = int(self.productVersion, 16)
+        dic["productSerialNumber"] = self.productSerialNumber
+        dic["productAssetTag"] = self.productAssetTag
+        dic["productfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]  # 0
+        index += 1
+        d_print("decode length %d" % (ord(self.data[index]) * 8))
+        d_print("class size %d" % self.size)
+        index += 2
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productManufacturer:%s" % self.productManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productName:%s" % self.productName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productPartModelName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productPartModelName:%s" % self.productPartModelName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productVersion = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productVersion:%s" % self.productVersion)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productSerialNumber:%s" % self.productSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productAssetTag = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productAssetTag:%s" % self.productAssetTag)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if self.data[index] != chr(0xc1) and index < self.size - 1:
+                templen = FruUtil.decodeLength(self.data[index])
+                if templen == 0:
+                    break
+                tmpval = self.data[index + 1: index + templen + 1]
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+            else:
+                break
+
+    @property
+    def productVersion(self):
+        return self._productVersion
+
+    @productVersion.setter
+    def productVersion(self, name):
+        self._productVersion = name
+
+    @property
+    def areaversion(self):
+        self._areaversion = self.COMMON_HEAD_VERSION
+        return self._areaversion
+
+    @areaversion.setter
+    def areaversion(self, name):
+        self._areaversion = name
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def productManufacturer(self):
+        return self._productManufacturer
+
+    @productManufacturer.setter
+    def productManufacturer(self, name):
+        self._productManufacturer = name
+
+    @property
+    def productName(self):
+        return self._productName
+
+    @productName.setter
+    def productName(self, name):
+        self._productName = name
+
+    @property
+    def productPartModelName(self):
+        return self._productPartModelName
+
+    @productPartModelName.setter
+    def productPartModelName(self, name):
+        self._productPartModelName = name
+
+    @property
+    def productSerialNumber(self):
+        return self._productSerialNumber
+
+    @productSerialNumber.setter
+    def productSerialNumber(self, name):
+        self._productSerialNumber = name
+
+    @property
+    def productAssetTag(self):
+        return self._productAssetTag
+
+    @productAssetTag.setter
+    def productAssetTag(self, name):
+        self._productAssetTag = name
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, name):
+        self._FRUFileID = name
+
+    def fruSetValue(self, field, value):
+        tmp_field = getattr(self, field, None)
+        if tmp_field is not None:
+            setattr(self, field, value)
+
+    def recalcute(self):
+        d_print("product version:%x" % ord(self.areaversion))
+        d_print("product length:%d" % self.size)
+        d_print("product language:%x" % self.language)
+        self.data = chr(ord(self.areaversion)) + \
+            chr(self.size // 8) + chr(self.language)
+
+        typelength = FruUtil.getTypeLength(self.productManufacturer)
+        self.data += chr(typelength)
+        self.data += self.productManufacturer
+
+        self.data += chr(FruUtil.getTypeLength(self.productName))
+        self.data += self.productName
+
+        self.data += chr(FruUtil.getTypeLength(self.productPartModelName))
+        self.data += self.productPartModelName
+
+        self.data += chr(FruUtil.getTypeLength(self.productVersion))
+        self.data += self.productVersion
+
+        self.data += chr(FruUtil.getTypeLength(self.productSerialNumber))
+        self.data += self.productSerialNumber
+
+        self.data += chr(FruUtil.getTypeLength(self.productAssetTag))
+        if self.productAssetTag is not None:
+            self.data += self.productAssetTag
+
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea productextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is not None:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) // 8 + 1
+            self.size += incr * 8
+        d_print("self.data:%d" % len(self.data))
+        d_print("self.size:%d" % self.size)
+
+        self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+        self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+
+class MultiRecordArea(BaseArea):
+    pass
+
+
+class Field(object):
+
+    def __init__(self, fieldType="ASCII", fieldData=""):
+        self.fieldData = fieldData
+        self.fieldType = fieldType
+
+    @property
+    def fieldType(self):
+        return self.fieldType
+
+    @property
+    def fieldData(self):
+        return self.fieldData
+
+
+class ipmifru(BaseArea):
+    _BoardInfoArea = None
+    _ProductInfoArea = None
+    _InternalUseArea = None
+    _ChassisInfoArea = None
+    _multiRecordArea = None
+    _productinfoAreaOffset = BaseArea.INITVALUE
+    _boardInfoAreaOffset = BaseArea.INITVALUE
+    _internalUserAreaOffset = BaseArea.INITVALUE
+    _chassicInfoAreaOffset = BaseArea.INITVALUE
+    _multiRecordAreaOffset = BaseArea.INITVALUE
+    _bindata = None
+    _bodybin = None
+    _version = BaseArea.COMMON_HEAD_VERSION
+    _zeroCheckSum = None
+    _frusize = 256
+
+    def __str__(self):
+        tmpstr = ""
+        if self.boardInfoArea.isPresent:
+            tmpstr += "\nboardinfoarea: \n"
+            tmpstr += self.boardInfoArea.__str__()
+        if self.productInfoArea.isPresent:
+            tmpstr += "\nproductinfoarea: \n"
+            tmpstr += self.productInfoArea.__str__()
+        return tmpstr
+
+    def decodeBin(self, eeprom):
+        commonHead = eeprom[0:8]
+        d_print("decode version %x" % ord(commonHead[0]))
+        if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]):
+            raise FruException("HEAD VERSION error,not Fru format!", -10)
+        if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]):
+            strtemp = "check header checksum error [cal:%02x data:%02x]" % (
+                FruUtil.checksum(commonHead[0:7]), ord(commonHead[7]))
+            raise FruException(strtemp, -3)
+        if ord(commonHead[1]) != ord(self.INITVALUE):
+            d_print("Internal Use Area is present")
+            self.internalUseArea = InternalUseArea(
+                name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA)
+            self.internalUseArea.isPresent = True
+            self.internalUserAreaOffset = ord(commonHead[1])
+            self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: (
+                self.internalUserAreaOffset * 8 + self.internalUseArea.size)]
+        if ord(commonHead[2]) != ord(self.INITVALUE):
+            d_print("Chassis Info Area is present")
+            self.chassisInfoArea = ChassisInfoArea(
+                name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA)
+            self.chassisInfoArea.isPresent = True
+            self.chassicInfoAreaOffset = ord(commonHead[2])
+            self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: (
+                self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)]
+        if ord(commonHead[3]) != ord(self.INITVALUE):
+            self.boardInfoArea = BoardInfoArea(
+                name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA)
+            self.boardInfoArea.isPresent = True
+            self.boardInfoAreaOffset = ord(commonHead[3])
+            self.boardInfoArea.size = ord(
+                eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8
+            d_print("Board Info Area is present size:%d" %
+                    (self.boardInfoArea.size))
+            self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: (
+                self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)]
+            if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]):
+                strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" %  \
+                    (FruUtil.checksum(
+                        self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.boardInfoArea.decodedata()
+        if ord(commonHead[4]) != ord(self.INITVALUE):
+            d_print("Product Info Area is present")
+            self.productInfoArea = ProductInfoArea(
+                name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA)
+            self.productInfoArea.isPresent = True
+            self.productinfoAreaOffset = ord(commonHead[4])
+            d_print("length offset value: %02x" %
+                    ord(eeprom[self.productinfoAreaOffset * 8 + 1]))
+            self.productInfoArea.size = ord(
+                eeprom[self.productinfoAreaOffset * 8 + 1]) * 8
+            d_print("Product Info Area is present size:%d" %
+                    (self.productInfoArea.size))
+
+            self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: (
+                self.productinfoAreaOffset * 8 + self.productInfoArea.size)]
+            if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]):
+                strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % (
+                    FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.productInfoArea.decodedata()
+        if ord(commonHead[5]) != ord(self.INITVALUE):
+            self.multiRecordArea = MultiRecordArea(
+                name="MultiRecord record Area ")
+            d_print("MultiRecord record present")
+            self.multiRecordArea.isPresent = True
+            self.multiRecordAreaOffset = ord(commonHead[5])
+            self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: (
+                self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)]
+
+    def initDefault(self):
+        self.version = self.COMMON_HEAD_VERSION
+        self.internalUserAreaOffset = self.INITVALUE
+        self.chassicInfoAreaOffset = self.INITVALUE
+        self.boardInfoAreaOffset = self.INITVALUE
+        self.productinfoAreaOffset = self.INITVALUE
+        self.multiRecordAreaOffset = self.INITVALUE
+        self.zeroCheckSum = self.INITVALUE
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        self.productInfoArea = None
+        self.internalUseArea = None
+        self.boardInfoArea = None
+        self.chassisInfoArea = None
+        self.multiRecordArea = None
+        # self.recalcute()
+
+    @property
+    def version(self):
+        return self._version
+
+    @version.setter
+    def version(self, name):
+        self._version = name
+
+    @property
+    def internalUserAreaOffset(self):
+        return self._internalUserAreaOffset
+
+    @internalUserAreaOffset.setter
+    def internalUserAreaOffset(self, obj):
+        self._internalUserAreaOffset = obj
+
+    @property
+    def chassicInfoAreaOffset(self):
+        return self._chassicInfoAreaOffset
+
+    @chassicInfoAreaOffset.setter
+    def chassicInfoAreaOffset(self, obj):
+        self._chassicInfoAreaOffset = obj
+
+    @property
+    def productinfoAreaOffset(self):
+        return self._productinfoAreaOffset
+
+    @productinfoAreaOffset.setter
+    def productinfoAreaOffset(self, obj):
+        self._productinfoAreaOffset = obj
+
+    @property
+    def boardInfoAreaOffset(self):
+        return self._boardInfoAreaOffset
+
+    @boardInfoAreaOffset.setter
+    def boardInfoAreaOffset(self, obj):
+        self._boardInfoAreaOffset = obj
+
+    @property
+    def multiRecordAreaOffset(self):
+        return self._multiRecordAreaOffset
+
+    @multiRecordAreaOffset.setter
+    def multiRecordAreaOffset(self, obj):
+        self._multiRecordAreaOffset = obj
+
+    @property
+    def zeroCheckSum(self):
+        return self._zeroCheckSum
+
+    @zeroCheckSum.setter
+    def zeroCheckSum(self, obj):
+        self._zeroCheckSum = obj
+
+    @property
+    def productInfoArea(self):
+        return self._ProductInfoArea
+
+    @productInfoArea.setter
+    def productInfoArea(self, obj):
+        self._ProductInfoArea = obj
+
+    @property
+    def internalUseArea(self):
+        return self._InternalUseArea
+
+    @internalUseArea.setter
+    def internalUseArea(self, obj):
+        self.internalUseArea = obj
+
+    @property
+    def boardInfoArea(self):
+        return self._BoardInfoArea
+
+    @boardInfoArea.setter
+    def boardInfoArea(self, obj):
+        self._BoardInfoArea = obj
+
+    @property
+    def chassisInfoArea(self):
+        return self._ChassisInfoArea
+
+    @chassisInfoArea.setter
+    def chassisInfoArea(self, obj):
+        self._ChassisInfoArea = obj
+
+    @property
+    def multiRecordArea(self):
+        return self._multiRecordArea
+
+    @multiRecordArea.setter
+    def multiRecordArea(self, obj):
+        self._multiRecordArea = obj
+
+    @property
+    def bindata(self):
+        return self._bindata
+
+    @bindata.setter
+    def bindata(self, obj):
+        self._bindata = obj
+
+    @property
+    def bodybin(self):
+        return self._bodybin
+
+    @bodybin.setter
+    def bodybin(self, obj):
+        self._bodybin = obj
+
+    def recalcuteCommonHead(self):
+        self.bindata = ""
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        d_print("common Header %d" % self.offset)
+        d_print("fru eeprom size  %d" % self._frusize)
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            self.internalUserAreaOffset = self.offset // 8
+            self.offset += self.internalUseArea.size
+            d_print("internalUseArea is present offset:%d" % self.offset)
+
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            self.chassicInfoAreaOffset = self.offset // 8
+            self.offset += self.chassisInfoArea.size
+            d_print("chassisInfoArea is present offset:%d" % self.offset)
+
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            self.boardInfoAreaOffset = self.offset // 8
+            self.offset += self.boardInfoArea.size
+            d_print("boardInfoArea is present offset:%d" % self.offset)
+            d_print("boardInfoArea is present size:%d" %
+                    self.boardInfoArea.size)
+
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            self.productinfoAreaOffset = self.offset // 8
+            self.offset += self.productInfoArea.size
+            d_print("productInfoArea is present offset:%d" % self.offset)
+
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            self.multiRecordAreaOffset = self.offset // 8
+            d_print("multiRecordArea is present offset:%d" % self.offset)
+
+        if self.internalUserAreaOffset == self.INITVALUE:
+            self.internalUserAreaOffset = 0
+        if self.productinfoAreaOffset == self.INITVALUE:
+            self.productinfoAreaOffset = 0
+        if self.chassicInfoAreaOffset == self.INITVALUE:
+            self.chassicInfoAreaOffset = 0
+        if self.boardInfoAreaOffset == self.INITVALUE:
+            self.boardInfoAreaOffset = 0
+        if self.multiRecordAreaOffset == self.INITVALUE:
+            self.multiRecordAreaOffset = 0
+
+        self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset
+                             - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff
+        d_print("zerochecksum:%x" % self.zeroCheckSum)
+        self.data = ""
+        self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr(
+            self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum)
+
+        self.bindata = self.data + self.bodybin
+        totallen = len(self.bindata)
+        d_print("totallen %d" % totallen)
+        if totallen < self._frusize:
+            self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0]))
+        else:
+            raise FruException('bin data more than %d' % self._frusize, -2)
+
+    def recalcutebin(self):
+        self.bodybin = ""
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            d_print("internalUseArea present")
+            self.bodybin += self.internalUseArea.data
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            d_print("chassisInfoArea present")
+            self.bodybin += self.chassisInfoArea.data
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            d_print("boardInfoArea present")
+            self.boardInfoArea.recalcute()
+            self.bodybin += self.boardInfoArea.data
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            d_print("productInfoAreapresent")
+            self.productInfoArea.recalcute()
+            self.bodybin += self.productInfoArea.data
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            d_print("multiRecordArea present")
+            self.bodybin += self.productInfoArea.data
+
+    def recalcute(self, fru_eeprom_size=256):
+        self._frusize = fru_eeprom_size
+        self.recalcutebin()
+        self.recalcuteCommonHead()
+
+    def setValue(self, area, field, value):
+        tmp_area = getattr(self, area, None)
+        if tmp_area is not None:
+            tmp_area.fruSetValue(field, value)
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/installer.conf b/device/micas/x86_64-micas_m2-w6930-64qc-r0/installer.conf
new file mode 100644
index 000000000000..7a9fec8cc99c
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/installer.conf
@@ -0,0 +1,2 @@
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll"
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/media_settings.json b/device/micas/x86_64-micas_m2-w6930-64qc-r0/media_settings.json
new file mode 100644
index 000000000000..ae086bd70d54
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/media_settings.json
@@ -0,0 +1,4100 @@
+{
+    "PORT_MEDIA_SETTINGS": {
+        "0": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "1": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "2": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000002",
+                    "lane3": "0x00000002",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000084",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "3": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x00000088",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000084",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "4": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "5": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "6": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000002",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x00000088",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x0000008C",
+                    "lane5": "0x0000008C",
+                    "lane6": "0x00000088",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffff6",
+                    "lane5": "0xfffffff6",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff6"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "7": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff6",
+                    "lane5": "0xfffffff6",
+                    "lane6": "0xfffffff6",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "8": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "9": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "10": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x00000088",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x0000008C",
+                    "lane5": "0x00000088",
+                    "lane6": "0x0000008C",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "11": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000002",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x0000008A",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "12": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "13": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "14": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000002",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "15": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000002",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008A",
+                    "lane3": "0x0000008A",
+                    "lane4": "0x0000008C",
+                    "lane5": "0x0000008C",
+                    "lane6": "0x0000008C",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "16": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "17": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "18": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000002",
+                    "lane3": "0x00000002",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "19": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x0000008A",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "20": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "21": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "22": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000002",
+                    "lane3": "0x00000002",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x0000008C",
+                    "lane7": "0x0000008A"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "23": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x0000008C",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "24": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "25": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "26": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000002",
+                    "lane3": "0x00000002",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xffffffec",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "27": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000002",
+                    "lane3": "0x00000002",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffffa",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "28": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "29": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "30": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "31": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xffffffec",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "32": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "33": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "34": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000002",
+                    "lane3": "0x00000002",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "35": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "36": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "37": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x00000090",
+                    "lane1": "0x00000090",
+                    "lane2": "0x00000090",
+                    "lane3": "0x00000090",
+                    "lane4": "0x00000090",
+                    "lane5": "0x00000090",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "38": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x0000008A",
+                    "lane1": "0x00000088",
+                    "lane2": "0x0000008A",
+                    "lane3": "0x00000088",
+                    "lane4": "0x0000008A",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffff6",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff6"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "39": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000086"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "40": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x0000008C",
+                    "lane5": "0x0000008C",
+                    "lane6": "0x0000008C",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "41": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x0000008C",
+                    "lane5": "0x0000008C",
+                    "lane6": "0x0000008C",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "42": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000002",
+                    "lane3": "0x00000002",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000084",
+                    "lane5": "0x00000084",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "43": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000002",
+                    "lane3": "0x00000002",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x00000088",
+                    "lane5": "0x0000008C",
+                    "lane6": "0x0000008C",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "44": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x0000008C",
+                    "lane5": "0x0000008C",
+                    "lane6": "0x0000008C",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "45": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x0000008C",
+                    "lane5": "0x0000008C",
+                    "lane6": "0x0000008C",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "46": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000002",
+                    "lane3": "0x00000002",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0x00000000",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "47": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000002",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x00000088",
+                    "lane4": "0x0000008A",
+                    "lane5": "0x0000008A",
+                    "lane6": "0x0000008A",
+                    "lane7": "0x0000008A"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "48": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x0000008C",
+                    "lane5": "0x0000008C",
+                    "lane6": "0x0000008C",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "49": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x0000008C",
+                    "lane5": "0x0000008C",
+                    "lane6": "0x0000008C",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "50": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000002",
+                    "lane3": "0x00000002",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff4"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x00000088",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x00000088",
+                    "lane5": "0x0000008C",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "51": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000002",
+                    "lane3": "0x00000002",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x0000008A",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x0000008C",
+                    "lane5": "0x0000008C",
+                    "lane6": "0x0000008A",
+                    "lane7": "0x0000008A"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "52": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x0000008C",
+                    "lane5": "0x0000008C",
+                    "lane6": "0x0000008C",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "53": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x00000090",
+                    "lane5": "0x0000008C",
+                    "lane6": "0x0000008C",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "54": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008A",
+                    "lane4": "0x0000008C",
+                    "lane5": "0x0000008C",
+                    "lane6": "0x00000088",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "55": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000002",
+                    "lane3": "0x00000002",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008A",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x00000088",
+                    "lane5": "0x0000008C",
+                    "lane6": "0x0000008C",
+                    "lane7": "0x0000008A"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "56": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x0000008C",
+                    "lane5": "0x0000008C",
+                    "lane6": "0x0000008C",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "57": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000002",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffffc"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x00000088",
+                    "lane5": "0x0000008C",
+                    "lane6": "0x00000090",
+                    "lane7": "0x00000090"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffffe"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "58": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000002",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x00000088",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "59": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000002",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "60": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x0000008C",
+                    "lane5": "0x0000008C",
+                    "lane6": "0x0000008C",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "61": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000002",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x0000008C",
+                    "lane2": "0x0000008C",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x0000008C",
+                    "lane5": "0x0000008C",
+                    "lane6": "0x0000008C",
+                    "lane7": "0x0000008C"
+                },
+                "post1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000000"
+                }
+            }
+        },
+        "62": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000002",
+                    "lane2": "0x00000002",
+                    "lane3": "0x00000002",
+                    "lane4": "0x00000002",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000000",
+                    "lane7": "0x00000002"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        },
+        "63": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000002",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000002",
+                    "lane3": "0x00000002",
+                    "lane4": "0x00000000",
+                    "lane5": "0x00000000",
+                    "lane6": "0x00000002",
+                    "lane7": "0x00000000"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "main": {
+                    "lane0": "0x0000008C",
+                    "lane1": "0x0000008A",
+                    "lane2": "0x00000088",
+                    "lane3": "0x0000008C",
+                    "lane4": "0x00000088",
+                    "lane5": "0x00000088",
+                    "lane6": "0x00000088",
+                    "lane7": "0x0000008A"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post3": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                }
+            }
+        }
+    }
+}
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/monitor.py b/device/micas/x86_64-micas_m2-w6930-64qc-r0/monitor.py
new file mode 100644
index 000000000000..5fc287892e50
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/monitor.py
@@ -0,0 +1,402 @@
+#!/usr/bin/python3
+#   * onboard temperature sensors
+#   * FAN trays
+#   * PSU
+#
+import os
+from lxml import etree as ET
+import glob
+import json
+from decimal import Decimal
+from fru import ipmifru
+
+
+MAILBOX_DIR = "/sys/bus/i2c/devices/"
+BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type"
+BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow"
+
+
+CONFIG_NAME = "dev.xml"
+
+
+def byteTostr(val):
+    strtmp = ''
+    for value in val:
+        strtmp += chr(value)
+    return strtmp
+
+
+def typeTostr(val):
+    if isinstance(val, bytes):
+        strtmp = byteTostr(val)
+        return strtmp
+    return val
+
+
+def get_board_id():
+    if not os.path.exists(BOARD_ID_PATH):
+        return "NA"
+    with open(BOARD_ID_PATH) as fd:
+        id_str = fd.read().strip()
+    return "0x%x" % (int(id_str, 10))
+
+
+def getboardairflow():
+    if not os.path.exists(BOARD_AIRFLOW_PATH):
+        return "NA"
+    with open(BOARD_AIRFLOW_PATH) as fd:
+        airflow_str = fd.read().strip()
+    data = json.loads(airflow_str)
+    airflow = data.get("board", "NA")
+    return airflow
+
+
+boardid = get_board_id()
+boardairflow = getboardairflow()
+
+
+DEV_XML_FILE_LIST = [
+    "dev_" + boardid + "_" + boardairflow + ".xml",
+    "dev_" + boardid + ".xml",
+    "dev_" + boardairflow + ".xml",
+]
+
+
+def dev_file_read(path, offset, read_len):
+    retval = "ERR"
+    val_list = []
+    msg = ""
+    ret = ""
+    fd = -1
+
+    if not os.path.exists(path):
+        return False, "%s %s not found" % (retval, path)
+
+    try:
+        fd = os.open(path, os.O_RDONLY)
+        os.lseek(fd, offset, os.SEEK_SET)
+        ret = os.read(fd, read_len)
+        for item in ret:
+            val_list.append(item)
+    except Exception as e:
+        msg = str(e)
+        return False, "%s %s" % (retval, msg)
+    finally:
+        if fd > 0:
+            os.close(fd)
+    return True, val_list
+
+
+def getPMCreg(location):
+    retval = 'ERR'
+    if not os.path.isfile(location):
+        return "%s %s  notfound" % (retval, location)
+    try:
+        with open(location, 'r') as fd:
+            retval = fd.read()
+    except Exception as error:
+        return "ERR %s" % str(error)
+
+    retval = retval.rstrip('\r\n')
+    retval = retval.lstrip(" ")
+    return retval
+
+
+# Get a mailbox register
+def get_pmc_register(reg_name):
+    retval = 'ERR'
+    mb_reg_file = reg_name
+    filepath = glob.glob(mb_reg_file)
+    if len(filepath) == 0:
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    mb_reg_file = filepath[0]
+    if not os.path.isfile(mb_reg_file):
+        # print mb_reg_file,  'not found !'
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    try:
+        with open(mb_reg_file, 'rb') as fd:
+            retval = fd.read()
+        retval = typeTostr(retval)
+    except Exception as error:
+        retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error))
+
+    retval = retval.rstrip('\r\n')
+    retval = retval.lstrip(" ")
+    return retval
+
+
+class checktype():
+    def __init__(self, test1):
+        self.test1 = test1
+
+    @staticmethod
+    def getValue(location, bit, data_type, coefficient=1, addend=0):
+        try:
+            value_t = get_pmc_register(location)
+            if value_t.startswith("ERR") or value_t.startswith("NA"):
+                return value_t
+            if data_type == 1:
+                return float('%.1f' % ((float(value_t) / 1000) + addend))
+            if data_type == 2:
+                return float('%.1f' % (float(value_t) / 100))
+            if data_type == 3:
+                psu_status = int(value_t, 16)
+                return (psu_status & (1 << bit)) >> bit
+            if data_type == 4:
+                return int(value_t, 10)
+            if data_type == 5:
+                return float('%.1f' % (float(value_t) / 1000 / 1000))
+            if data_type == 6:
+                return Decimal(float(value_t) * coefficient / 1000).quantize(Decimal('0.000'))
+            return value_t
+        except Exception as e:
+            value_t = "ERR %s" % str(e)
+            return value_t
+
+    # fanFRU
+    @staticmethod
+    def decodeBinByValue(retval):
+        fru = ipmifru()
+        fru.decodeBin(retval)
+        return fru
+
+    @staticmethod
+    def getfruValue(prob_t, root, val):
+        try:
+            ret, binval_bytes = dev_file_read(val, 0, 256)
+            if ret is False:
+                return binval_bytes
+            binval = byteTostr(binval_bytes)
+            fanpro = {}
+            ret = checktype.decodeBinByValue(binval)
+            fanpro['fan_type'] = ret.productInfoArea.productName
+            fanpro['hw_version'] = ret.productInfoArea.productVersion
+            fanpro['sn'] = ret.productInfoArea.productSerialNumber
+            fan_display_name_dict = status.getDecodValue(root, "fan_display_name")
+            fan_name = fanpro['fan_type'].strip()
+            if len(fan_display_name_dict) == 0:
+                return fanpro
+            if fan_name not in fan_display_name_dict:
+                prob_t['errcode'] = -1
+                prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name)
+            else:
+                fanpro['fan_type'] = fan_display_name_dict[fan_name]
+            return fanpro
+        except Exception as error:
+            return "ERR " + str(error)
+
+    @staticmethod
+    def getslotfruValue(val):
+        try:
+            binval = checktype.getValue(val, 0, 0)
+            if binval.startswith("ERR"):
+                return binval
+            slotpro = {}
+            ret = checktype.decodeBinByValue(binval)
+            slotpro['slot_type'] = ret.boardInfoArea.boardProductName
+            slotpro['hw_version'] = ret.boardInfoArea.boardextra1
+            slotpro['sn'] = ret.boardInfoArea.boardSerialNumber
+            return slotpro
+        except Exception as error:
+            return "ERR " + str(error)
+
+    @staticmethod
+    def getpsufruValue(prob_t, root, val):
+        try:
+            psu_match = False
+            binval = checktype.getValue(val, 0, 0)
+            if binval.startswith("ERR"):
+                return binval
+            psupro = {}
+            ret = checktype.decodeBinByValue(binval)
+            psupro['type1'] = ret.productInfoArea.productPartModelName
+            psupro['sn'] = ret.productInfoArea.productSerialNumber
+            psupro['hw_version'] = ret.productInfoArea.productVersion
+            psu_dict = status.getDecodValue(root, "psutype")
+            psupro['type1'] = psupro['type1'].strip()
+            if len(psu_dict) == 0:
+                return psupro
+            for psu_name, display_name in psu_dict.items():
+                if psu_name.strip() == psupro['type1']:
+                    psupro['type1'] = display_name
+                    psu_match = True
+                    break
+            if psu_match is not True:
+                prob_t['errcode'] = -1
+                prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1'])
+            return psupro
+        except Exception as error:
+            return "ERR " + str(error)
+
+
+class status():
+    def __init__(self, productname):
+        self.productname = productname
+
+    @staticmethod
+    def getETroot(filename):
+        tree = ET.parse(filename)
+        root = tree.getroot()
+        return root
+
+    @staticmethod
+    def getDecodValue(collection, decode):
+        decodes = collection.find('decode')
+        testdecode = decodes.find(decode)
+        test = {}
+        if testdecode is None:
+            return test
+        for neighbor in testdecode.iter('code'):
+            test[neighbor.attrib["key"]] = neighbor.attrib["value"]
+        return test
+
+    @staticmethod
+    def getfileValue(location):
+        return checktype.getValue(location, " ", " ")
+
+    @staticmethod
+    def getETValue(a, filename, tagname):
+        root = status.getETroot(filename)
+        for neighbor in root.iter(tagname):
+            prob_t = {}
+            prob_t.update(neighbor.attrib)
+            prob_t['errcode'] = 0
+            prob_t['errmsg'] = ''
+            for pros in neighbor.iter("property"):
+                ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items()))
+                if ret.get('e2type') == 'fru' and ret.get("name") == "fru":
+                    fruval = checktype.getfruValue(prob_t, root, ret["location"])
+                    if isinstance(fruval, str) and fruval.startswith("ERR"):
+                        prob_t['errcode'] = -1
+                        prob_t['errmsg'] = fruval
+                        break
+                    prob_t.update(fruval)
+                    continue
+
+                if ret.get("name") == "psu" and ret.get('e2type') == 'fru':
+                    psuval = checktype.getpsufruValue(prob_t, root, ret["location"])
+                    if isinstance(psuval, str) and psuval.startswith("ERR"):
+                        prob_t['errcode'] = -1
+                        prob_t['errmsg'] = psuval
+                        break
+                    prob_t.update(psuval)
+                    continue
+
+                if ret.get("gettype") == "config":
+                    prob_t[ret["name"]] = ret["value"]
+                    continue
+
+                if 'type' not in ret.keys():
+                    val = "0"
+                else:
+                    val = ret["type"]
+                if 'bit' not in ret.keys():
+                    bit = "0"
+                else:
+                    bit = ret["bit"]
+                if 'coefficient' not in ret.keys():
+                    coefficient = 1
+                else:
+                    coefficient = float(ret["coefficient"])
+                if 'addend' not in ret.keys():
+                    addend = 0
+                else:
+                    addend = float(ret["addend"])
+
+                s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend)
+                if isinstance(s, str) and s.startswith("ERR"):
+                    prob_t['errcode'] = -1
+                    prob_t['errmsg'] = s
+                    break
+                if 'default' in ret.keys():
+                    rt = status.getDecodValue(root, ret['decode'])
+                    prob_t['errmsg'] = rt[str(s)]
+                    if str(s) != ret["default"]:
+                        prob_t['errcode'] = -1
+                        break
+                else:
+                    if 'decode' in ret.keys():
+                        rt = status.getDecodValue(root, ret['decode'])
+                        if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt):
+                            prob_t['errcode'] = -1
+                            prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" %
+                                                       (s.replace("\x00", "").rstrip()))
+                        else:
+                            s = rt[str(s).replace("\x00", "").rstrip()]
+                name = ret["name"]
+                prob_t[name] = str(s)
+            a.append(prob_t)
+
+    @staticmethod
+    def getCPUValue(a, filename, tagname):
+        root = status.getETroot(filename)
+        for neighbor in root.iter(tagname):
+            location = neighbor.attrib["location"]
+        L = []
+        for dirpath, dirnames, filenames in os.walk(location):
+            for file in filenames:
+                if file.endswith("input"):
+                    L.append(os.path.join(dirpath, file))
+            L = sorted(L, reverse=False)
+        for i in range(len(L)):
+            prob_t = {}
+            prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, i + 1))
+            prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, i + 1))) / 1000
+            prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, i + 1))) / 1000
+            prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, i + 1))) / 1000
+            prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, i + 1))) / 1000
+            a.append(prob_t)
+
+    @staticmethod
+    def getFileName():
+        fpath = os.path.dirname(os.path.realpath(__file__))
+        for file in DEV_XML_FILE_LIST:
+            xml = fpath + "/" + file
+            if os.path.exists(xml):
+                return xml
+        return fpath + "/" + CONFIG_NAME
+
+    @staticmethod
+    def checkFan(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "fan"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getTemp(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "temp"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getPsu(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "psu"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getcputemp(ret):
+        _filename = status.getFileName()
+        _tagname = "cpus"
+        status.getCPUValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getDcdc(ret):
+        _filename = status.getFileName()
+        _tagname = "dcdc"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getmactemp(ret):
+        _filename = status.getFileName()
+        _tagname = "mactemp"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getmacpower(ret):
+        _filename = status.getFileName()
+        _tagname = "macpower"
+        status.getETValue(ret, _filename, _tagname)
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6930-64qc-r0/pcie.yaml
new file mode 100644
index 000000000000..1c3911a2cd62
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/pcie.yaml
@@ -0,0 +1,582 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: 6f00
+  name: 'Host bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D DMI2
+    (rev 05)'
+- bus: '00'
+  dev: '01'
+  fn: '0'
+  id: 6f02
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 1 (rev 05)'
+- bus: '00'
+  dev: '01'
+  fn: '1'
+  id: 6f03
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 1 (rev 05)'
+- bus: '00'
+  dev: '02'
+  fn: '0'
+  id: 6f04
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 05)'
+- bus: '00'
+  dev: '02'
+  fn: '2'
+  id: 6f06
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 05)'
+- bus: '00'
+  dev: '02'
+  fn: '3'
+  id: 6f07
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 05)'
+- bus: '00'
+  dev: '03'
+  fn: '0'
+  id: 6f08
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 05)'
+- bus: '00'
+  dev: '03'
+  fn: '1'
+  id: 6f09
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 05)'
+- bus: '00'
+  dev: '03'
+  fn: '2'
+  id: 6f0a
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 05)'
+- bus: '00'
+  dev: '03'
+  fn: '3'
+  id: 6f0b
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 05)'
+- bus: '00'
+  dev: '04'
+  fn: '0'
+  id: 6f20
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Crystal Beach DMA Channel 0 (rev 05)'
+- bus: '00'
+  dev: '04'
+  fn: '1'
+  id: 6f21
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Crystal Beach DMA Channel 1 (rev 05)'
+- bus: '00'
+  dev: '04'
+  fn: '2'
+  id: 6f22
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Crystal Beach DMA Channel 2 (rev 05)'
+- bus: '00'
+  dev: '04'
+  fn: '3'
+  id: 6f23
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Crystal Beach DMA Channel 3 (rev 05)'
+- bus: '00'
+  dev: '04'
+  fn: '4'
+  id: 6f24
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Crystal Beach DMA Channel 4 (rev 05)'
+- bus: '00'
+  dev: '04'
+  fn: '5'
+  id: 6f25
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Crystal Beach DMA Channel 5 (rev 05)'
+- bus: '00'
+  dev: '04'
+  fn: '6'
+  id: 6f26
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Crystal Beach DMA Channel 6 (rev 05)'
+- bus: '00'
+  dev: '04'
+  fn: '7'
+  id: 6f27
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Crystal Beach DMA Channel 7 (rev 05)'
+- bus: '00'
+  dev: '05'
+  fn: '0'
+  id: 6f28
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Map/VTd_Misc/System Management (rev 05)'
+- bus: '00'
+  dev: '05'
+  fn: '1'
+  id: 6f29
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Hot Plug (rev 05)'
+- bus: '00'
+  dev: '05'
+  fn: '2'
+  id: 6f2a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO RAS/Control Status/Global Errors (rev 05)'
+- bus: '00'
+  dev: '05'
+  fn: '4'
+  id: 6f2c
+  name: 'PIC: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D I/O APIC (rev
+    05)'
+- bus: '00'
+  dev: '05'
+  fn: '6'
+  id: 6f39
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IO Performance Monitoring (rev 05)'
+- bus: '00'
+  dev: '06'
+  fn: '0'
+  id: 6f10
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '06'
+  fn: '1'
+  id: 6f11
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '06'
+  fn: '2'
+  id: 6f12
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '06'
+  fn: '3'
+  id: 6f13
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '06'
+  fn: '4'
+  id: 6f14
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '06'
+  fn: '5'
+  id: 6f15
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '06'
+  fn: '6'
+  id: 6f16
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '06'
+  fn: '7'
+  id: 6f17
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '07'
+  fn: '0'
+  id: 6f18
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '07'
+  fn: '1'
+  id: 6f19
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '07'
+  fn: '2'
+  id: 6f1a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '07'
+  fn: '3'
+  id: 6f1b
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '07'
+  fn: '4'
+  id: 6f1c
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Debug (rev 05)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 8c31
+  name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
+    xHCI (rev 05)'
+- bus: '00'
+  dev: '16'
+  fn: '0'
+  id: 8c3a
+  name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset
+    Family MEI Controller #1 (rev 04)'
+- bus: '00'
+  dev: '16'
+  fn: '1'
+  id: 8c3b
+  name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset
+    Family MEI Controller #2 (rev 04)'
+- bus: '00'
+  dev: 1d
+  fn: '0'
+  id: 8c26
+  name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
+    EHCI #1 (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: 8c54
+  name: 'ISA bridge: Intel Corporation C224 Series Chipset Family Server Standard
+    SKU LPC Controller (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '2'
+  id: 8c02
+  name: 'SATA controller: Intel Corporation 8 Series/C220 Series Chipset Family 6-port
+    SATA Controller 1 [AHCI mode] (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '3'
+  id: 8c22
+  name: 'SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller
+    (rev 05)'
+- bus: '04'
+  dev: '00'
+  fn: '0'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '04'
+  dev: '00'
+  fn: '1'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '05'
+  dev: '00'
+  fn: '0'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '05'
+  dev: '00'
+  fn: '1'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '06'
+  dev: '00'
+  fn: '0'
+  id: b990
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries BCM56990 Switch ASIC
+    (rev 11)'
+- bus: '07'
+  dev: '00'
+  fn: '0'
+  id: '1537'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Backplane Connection
+    (rev 03)'
+- bus: 08
+  dev: '00'
+  fn: '0'
+  id: '7011'
+  name: 'Memory controller: Xilinx Corporation Device 7011'
+- bus: ff
+  dev: 0b
+  fn: '0'
+  id: 6f81
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 05)'
+- bus: ff
+  dev: 0b
+  fn: '1'
+  id: 6f36
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 05)'
+- bus: ff
+  dev: 0b
+  fn: '2'
+  id: 6f37
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 05)'
+- bus: ff
+  dev: 0b
+  fn: '3'
+  id: 6f76
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link Debug (rev 05)'
+- bus: ff
+  dev: 0c
+  fn: '0'
+  id: 6fe0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 05)'
+- bus: ff
+  dev: 0c
+  fn: '1'
+  id: 6fe1
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 05)'
+- bus: ff
+  dev: 0c
+  fn: '2'
+  id: 6fe2
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 05)'
+- bus: ff
+  dev: 0c
+  fn: '3'
+  id: 6fe3
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 05)'
+- bus: ff
+  dev: 0f
+  fn: '0'
+  id: 6ff8
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 05)'
+- bus: ff
+  dev: 0f
+  fn: '4'
+  id: 6ffc
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 05)'
+- bus: ff
+  dev: 0f
+  fn: '5'
+  id: 6ffd
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 05)'
+- bus: ff
+  dev: 0f
+  fn: '6'
+  id: 6ffe
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 05)'
+- bus: ff
+  dev: '10'
+  fn: '0'
+  id: 6f1d
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R2PCIe Agent (rev 05)'
+- bus: ff
+  dev: '10'
+  fn: '1'
+  id: 6f34
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R2PCIe Agent (rev 05)'
+- bus: ff
+  dev: '10'
+  fn: '5'
+  id: 6f1e
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 05)'
+- bus: ff
+  dev: '10'
+  fn: '6'
+  id: 6f7d
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 05)'
+- bus: ff
+  dev: '10'
+  fn: '7'
+  id: 6f1f
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 05)'
+- bus: ff
+  dev: '12'
+  fn: '0'
+  id: 6fa0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Home Agent 0 (rev 05)'
+- bus: ff
+  dev: '12'
+  fn: '1'
+  id: 6f30
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Home Agent 0 (rev 05)'
+- bus: ff
+  dev: '12'
+  fn: '2'
+  id: 6f70
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Home Agent 0 Debug (rev 05)'
+- bus: ff
+  dev: '13'
+  fn: '0'
+  id: 6fa8
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Target Address/Thermal/RAS (rev 05)'
+- bus: ff
+  dev: '13'
+  fn: '1'
+  id: 6f71
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Target Address/Thermal/RAS (rev 05)'
+- bus: ff
+  dev: '13'
+  fn: '2'
+  id: 6faa
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 05)'
+- bus: ff
+  dev: '13'
+  fn: '3'
+  id: 6fab
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 05)'
+- bus: ff
+  dev: '13'
+  fn: '4'
+  id: 6fac
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 05)'
+- bus: ff
+  dev: '13'
+  fn: '5'
+  id: 6fad
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 05)'
+- bus: ff
+  dev: '13'
+  fn: '6'
+  id: 6fae
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Broadcast (rev 05)'
+- bus: ff
+  dev: '13'
+  fn: '7'
+  id: 6faf
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Global Broadcast (rev 05)'
+- bus: ff
+  dev: '14'
+  fn: '0'
+  id: 6fb0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 0 Thermal Control (rev 05)'
+- bus: ff
+  dev: '14'
+  fn: '1'
+  id: 6fb1
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 1 Thermal Control (rev 05)'
+- bus: ff
+  dev: '14'
+  fn: '2'
+  id: 6fb2
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 0 Error (rev 05)'
+- bus: ff
+  dev: '14'
+  fn: '3'
+  id: 6fb3
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 1 Error (rev 05)'
+- bus: ff
+  dev: '14'
+  fn: '4'
+  id: 6fbc
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 05)'
+- bus: ff
+  dev: '14'
+  fn: '5'
+  id: 6fbd
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 05)'
+- bus: ff
+  dev: '14'
+  fn: '6'
+  id: 6fbe
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 05)'
+- bus: ff
+  dev: '14'
+  fn: '7'
+  id: 6fbf
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 05)'
+- bus: ff
+  dev: '15'
+  fn: '0'
+  id: 6fb4
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 2 Thermal Control (rev 05)'
+- bus: ff
+  dev: '15'
+  fn: '1'
+  id: 6fb5
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 3 Thermal Control (rev 05)'
+- bus: ff
+  dev: '15'
+  fn: '2'
+  id: 6fb6
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 2 Error (rev 05)'
+- bus: ff
+  dev: '15'
+  fn: '3'
+  id: 6fb7
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 3 Error (rev 05)'
+- bus: ff
+  dev: 1e
+  fn: '0'
+  id: 6f98
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 05)'
+- bus: ff
+  dev: 1e
+  fn: '1'
+  id: 6f99
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 05)'
+- bus: ff
+  dev: 1e
+  fn: '2'
+  id: 6f9a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 05)'
+- bus: ff
+  dev: 1e
+  fn: '3'
+  id: 6fc0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 05)'
+- bus: ff
+  dev: 1e
+  fn: '4'
+  id: 6f9c
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 05)'
+- bus: ff
+  dev: 1e
+  fn: '7'
+  id: 6f9f
+  name: 'System peripheral: Intel Corporation Device 6f9f (rev 05)'
+- bus: ff
+  dev: 1f
+  fn: '0'
+  id: 6f88
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 05)'
+- bus: ff
+  dev: 1f
+  fn: '2'
+  id: 6f8a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 05)'
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform.json b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform.json
new file mode 100644
index 000000000000..208b81383eca
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform.json
@@ -0,0 +1,2036 @@
+{
+    "chassis": {
+        "name": "M2-W6930-64QC",
+        "thermal_manager": false,
+        "status_led": {
+            "controllable": false,
+            "colors": [
+                "green",
+                "blinking_green",
+                "amber",
+                "blinking_amber"
+            ]
+        },
+        "components": [
+            {
+                "name": "CPU_CPLD"
+            },
+            {
+                "name": "CONNECT_CPLD"
+            },
+            {
+                "name": "MAC_CPLDA"
+            },
+            {
+                "name": "MAC_CPLDB"
+            },
+            {
+                "name": "PORT_CPLDA"
+            },
+            {
+                "name": "PORT_CPLDB"
+            },
+            {
+                "name": "FAN_CPLDA"
+            },
+            {
+                "name": "FAN_CPLDB"
+            },
+            {
+                "name": "MAC_FPGA"
+            },
+            {
+                "name": "PORT_FPGA"
+            },
+            {
+                "name": "BIOS"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fantray1_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray1_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray2_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray2_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray3_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray3_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray4_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray4_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray5_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray5_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray6_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray6_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray7_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray7_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray8_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            },
+            {
+                "name": "Fantray8_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": [
+                        "off",
+                        "red",
+                        "amber",
+                        "green"
+                    ]
+                }
+            }
+        ],
+        "fan_drawers": [
+            {
+                "name": "Fantray1",
+                "num_fans": 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": [
+                        "amber",
+                        "green",
+                        "off"
+                    ]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray1_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray1_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray2",
+                "num_fans": 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": [
+                        "amber",
+                        "green",
+                        "off"
+                    ]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray2_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray2_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray3",
+                "num_fans": 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": [
+                        "amber",
+                        "green",
+                        "off"
+                    ]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray3_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray3_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray4",
+                "num_fans": 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": [
+                        "amber",
+                        "green",
+                        "off"
+                    ]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray4_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray4_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray5",
+                "num_fans": 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": [
+                        "amber",
+                        "green",
+                        "off"
+                    ]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray5_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray5_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray6",
+                "num_fans": 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": [
+                        "amber",
+                        "green",
+                        "off"
+                    ]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray6_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray6_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray7",
+                "num_fans": 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": [
+                        "amber",
+                        "green",
+                        "off"
+                    ]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray7_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray7_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray8",
+                "num_fans": 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": [
+                        "amber",
+                        "green",
+                        "off"
+                    ]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray8_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray8_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "Psu1",
+                "voltage": true,
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": true,
+                "voltage_low_threshold": true,
+                "temperature": true,
+                "fans_target_speed": true,
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "PSU1_FAN1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Psu2",
+                "voltage": true,
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": true,
+                "voltage_low_threshold": true,
+                "temperature": true,
+                "fans_target_speed": true,
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "PSU2_FAN1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Psu3",
+                "voltage": true,
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": true,
+                "voltage_low_threshold": true,
+                "temperature": true,
+                "fans_target_speed": true,
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "PSU3_FAN1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Psu4",
+                "voltage": true,
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": true,
+                "voltage_low_threshold": true,
+                "temperature": true,
+                "fans_target_speed": true,
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "PSU4_FAN1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "BOARD_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "CPU_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "INLET_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "OUTLET_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "ASIC_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "PSU1_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "PSU2_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "PSU3_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "PSU4_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            }
+        ],
+        "modules": [],
+        "sfps": []
+    },
+    "interfaces": {
+        "Ethernet1": {
+            "index": "0,0,0,0,0,0,0,0",
+            "lanes": "65,66,67,68",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth1"
+                ],
+                "4x100G": [
+                    "Eth1/1",
+                    "Eth1/2",
+                    "Eth1/3",
+                    "Eth1/4"
+                ],
+                "2x200G": [
+                    "Eth1/1",
+                    "Eth1/2"
+                ]
+            }
+        },
+        "Ethernet9": {
+            "index": "1,1,1,1,1,1,1,1",
+            "lanes": "69,70,71,72",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth2"
+                ],
+                "4x100G": [
+                    "Eth2/1",
+                    "Eth2/2",
+                    "Eth2/3",
+                    "Eth2/4"
+                ],
+                "2x200G": [
+                    "Eth2/1",
+                    "Eth2/2"
+                ]
+            }
+        },
+        "Ethernet17": {
+            "index": "2,2,2,2,2,2,2,2",
+            "lanes": "25,26,27,28",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth3"
+                ],
+                "4x100G": [
+                    "Eth3/1",
+                    "Eth3/2",
+                    "Eth3/3",
+                    "Eth3/4"
+                ],
+                "2x200G": [
+                    "Eth3/1",
+                    "Eth3/2"
+                ]
+            }
+        },
+        "Ethernet25": {
+            "index": "3,3,3,3,3,3,3,3",
+            "lanes": "21,22,23,24",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth4"
+                ],
+                "4x100G": [
+                    "Eth4/1",
+                    "Eth4/2",
+                    "Eth4/3",
+                    "Eth4/4"
+                ],
+                "2x200G": [
+                    "Eth4/1",
+                    "Eth4/2"
+                ]
+            }
+        },
+        "Ethernet33": {
+            "index": "4,4,4,4,4,4,4,4",
+            "lanes": "73,74,75,76",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth5"
+                ],
+                "4x100G": [
+                    "Eth5/1",
+                    "Eth5/2",
+                    "Eth5/3",
+                    "Eth5/4"
+                ],
+                "2x200G": [
+                    "Eth5/1",
+                    "Eth5/2"
+                ]
+            }
+        },
+        "Ethernet41": {
+            "index": "5,5,5,5,5,5,5,5",
+            "lanes": "77,78,79,80",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth6"
+                ],
+                "4x100G": [
+                    "Eth6/1",
+                    "Eth6/2",
+                    "Eth6/3",
+                    "Eth6/4"
+                ],
+                "2x200G": [
+                    "Eth6/1",
+                    "Eth6/2"
+                ]
+            }
+        },
+        "Ethernet49": {
+            "index": "6,6,6,6,6,6,6,6",
+            "lanes": "33,34,35,36",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth7"
+                ],
+                "4x100G": [
+                    "Eth7/1",
+                    "Eth7/2",
+                    "Eth7/3",
+                    "Eth7/4"
+                ],
+                "2x200G": [
+                    "Eth7/1",
+                    "Eth7/2"
+                ]
+            }
+        },
+        "Ethernet57": {
+            "index": "7,7,7,7,7,7,7,7",
+            "lanes": "29,30,31,32",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth8"
+                ],
+                "4x100G": [
+                    "Eth8/1",
+                    "Eth8/2",
+                    "Eth8/3",
+                    "Eth8/4"
+                ],
+                "2x200G": [
+                    "Eth8/1",
+                    "Eth8/2"
+                ]
+            }
+        },
+        "Ethernet65": {
+            "index": "8,8,8,8,8,8,8,8",
+            "lanes": "81,82,83,84",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth9"
+                ],
+                "4x100G": [
+                    "Eth9/1",
+                    "Eth9/2",
+                    "Eth9/3",
+                    "Eth9/4"
+                ],
+                "2x200G": [
+                    "Eth9/1",
+                    "Eth9/2"
+                ]
+            }
+        },
+        "Ethernet73": {
+            "index": "9,9,9,9,9,9,9,9",
+            "lanes": "85,86,87,88",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth10"
+                ],
+                "4x100G": [
+                    "Eth10/1",
+                    "Eth10/2",
+                    "Eth10/3",
+                    "Eth10/4"
+                ],
+                "2x200G": [
+                    "Eth10/1",
+                    "Eth10/2"
+                ]
+            }
+        },
+        "Ethernet81": {
+            "index": "10,10,10,10,10,10,10,10",
+            "lanes": "41,42,43,44",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth11"
+                ],
+                "4x100G": [
+                    "Eth11/1",
+                    "Eth11/2",
+                    "Eth11/3",
+                    "Eth11/4"
+                ],
+                "2x200G": [
+                    "Eth11/1",
+                    "Eth11/2"
+                ]
+            }
+        },
+        "Ethernet89": {
+            "index": "11,11,11,11,11,11,11,11",
+            "lanes": "37,38,39,40",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth12"
+                ],
+                "4x100G": [
+                    "Eth12/1",
+                    "Eth12/2",
+                    "Eth12/3",
+                    "Eth12/4"
+                ],
+                "2x200G": [
+                    "Eth12/1",
+                    "Eth12/2"
+                ]
+            }
+        },
+        "Ethernet97": {
+            "index": "12,12,12,12,12,12,12,12",
+            "lanes": "89,90,91,92",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth13"
+                ],
+                "4x100G": [
+                    "Eth13/1",
+                    "Eth13/2",
+                    "Eth13/3",
+                    "Eth13/4"
+                ],
+                "2x200G": [
+                    "Eth13/1",
+                    "Eth13/2"
+                ]
+            }
+        },
+        "Ethernet105": {
+            "index": "13,13,13,13,13,13,13,13",
+            "lanes": "93,94,95,96",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth14"
+                ],
+                "4x100G": [
+                    "Eth14/1",
+                    "Eth14/2",
+                    "Eth14/3",
+                    "Eth14/4"
+                ],
+                "2x200G": [
+                    "Eth14/1",
+                    "Eth14/2"
+                ]
+            }
+        },
+        "Ethernet113": {
+            "index": "14,14,14,14,14,14,14,14",
+            "lanes": "49,50,51,52",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth15"
+                ],
+                "4x100G": [
+                    "Eth15/1",
+                    "Eth15/2",
+                    "Eth15/3",
+                    "Eth15/4"
+                ],
+                "2x200G": [
+                    "Eth15/1",
+                    "Eth15/2"
+                ]
+            }
+        },
+        "Ethernet121": {
+            "index": "15,15,15,15,15,15,15,15",
+            "lanes": "45,46,47,48",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth16"
+                ],
+                "4x100G": [
+                    "Eth16/1",
+                    "Eth16/2",
+                    "Eth16/3",
+                    "Eth16/4"
+                ],
+                "2x200G": [
+                    "Eth16/1",
+                    "Eth16/2"
+                ]
+            }
+        },
+        "Ethernet129": {
+            "index": "16,16,16,16,16,16,16,16",
+            "lanes": "97,98,99,100",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth17"
+                ],
+                "4x100G": [
+                    "Eth17/1",
+                    "Eth17/2",
+                    "Eth17/3",
+                    "Eth17/4"
+                ],
+                "2x200G": [
+                    "Eth17/1",
+                    "Eth17/2"
+                ]
+            }
+        },
+        "Ethernet137": {
+            "index": "17,17,17,17,17,17,17,17",
+            "lanes": "101,102,103,104",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth18"
+                ],
+                "4x100G": [
+                    "Eth18/1",
+                    "Eth18/2",
+                    "Eth18/3",
+                    "Eth18/4"
+                ],
+                "2x200G": [
+                    "Eth18/1",
+                    "Eth18/2"
+                ]
+            }
+        },
+        "Ethernet145": {
+            "index": "18,18,18,18,18,18,18,18",
+            "lanes": "57,58,59,60",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth19"
+                ],
+                "4x100G": [
+                    "Eth19/1",
+                    "Eth19/2",
+                    "Eth19/3",
+                    "Eth19/4"
+                ],
+                "2x200G": [
+                    "Eth19/1",
+                    "Eth19/2"
+                ]
+            }
+        },
+        "Ethernet153": {
+            "index": "19,19,19,19,19,19,19,19",
+            "lanes": "53,54,55,56",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth20"
+                ],
+                "4x100G": [
+                    "Eth20/1",
+                    "Eth20/2",
+                    "Eth20/3",
+                    "Eth20/4"
+                ],
+                "2x200G": [
+                    "Eth20/1",
+                    "Eth20/2"
+                ]
+            }
+        },
+        "Ethernet161": {
+            "index": "20,20,20,20,20,20,20,20",
+            "lanes": "105,106,107,108",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth21"
+                ],
+                "4x100G": [
+                    "Eth21/1",
+                    "Eth21/2",
+                    "Eth21/3",
+                    "Eth21/4"
+                ],
+                "2x200G": [
+                    "Eth21/1",
+                    "Eth21/2"
+                ]
+            }
+        },
+        "Ethernet169": {
+            "index": "21,21,21,21,21,21,21,21",
+            "lanes": "109,110,111,112",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth22"
+                ],
+                "4x100G": [
+                    "Eth22/1",
+                    "Eth22/2",
+                    "Eth22/3",
+                    "Eth22/4"
+                ],
+                "2x200G": [
+                    "Eth22/1",
+                    "Eth22/2"
+                ]
+            }
+        },
+        "Ethernet177": {
+            "index": "22,22,22,22,22,22,22,22",
+            "lanes": "17,18,19,20",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth23"
+                ],
+                "4x100G": [
+                    "Eth23/1",
+                    "Eth23/2",
+                    "Eth23/3",
+                    "Eth23/4"
+                ],
+                "2x200G": [
+                    "Eth23/1",
+                    "Eth23/2"
+                ]
+            }
+        },
+        "Ethernet185": {
+            "index": "23,23,23,23,23,23,23,23",
+            "lanes": "61,62,63,64",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth24"
+                ],
+                "4x100G": [
+                    "Eth24/1",
+                    "Eth24/2",
+                    "Eth24/3",
+                    "Eth24/4"
+                ],
+                "2x200G": [
+                    "Eth24/1",
+                    "Eth24/2"
+                ]
+            }
+        },
+        "Ethernet193": {
+            "index": "24,24,24,24,24,24,24,24",
+            "lanes": "113,114,115,116",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth25"
+                ],
+                "4x100G": [
+                    "Eth25/1",
+                    "Eth25/2",
+                    "Eth25/3",
+                    "Eth25/4"
+                ],
+                "2x200G": [
+                    "Eth25/1",
+                    "Eth25/2"
+                ]
+            }
+        },
+        "Ethernet201": {
+            "index": "25,25,25,25,25,25,25,25",
+            "lanes": "117,118,119,120",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth26"
+                ],
+                "4x100G": [
+                    "Eth26/1",
+                    "Eth26/2",
+                    "Eth26/3",
+                    "Eth26/4"
+                ],
+                "2x200G": [
+                    "Eth26/1",
+                    "Eth26/2"
+                ]
+            }
+        },
+        "Ethernet209": {
+            "index": "26,26,26,26,26,26,26,26",
+            "lanes": "9,10,11,12",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth27"
+                ],
+                "4x100G": [
+                    "Eth27/1",
+                    "Eth27/2",
+                    "Eth27/3",
+                    "Eth27/4"
+                ],
+                "2x200G": [
+                    "Eth27/1",
+                    "Eth27/2"
+                ]
+            }
+        },
+        "Ethernet217": {
+            "index": "27,27,27,27,27,27,27,27",
+            "lanes": "13,14,15,16",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth28"
+                ],
+                "4x100G": [
+                    "Eth28/1",
+                    "Eth28/2",
+                    "Eth28/3",
+                    "Eth28/4"
+                ],
+                "2x200G": [
+                    "Eth28/1",
+                    "Eth28/2"
+                ]
+            }
+        },
+        "Ethernet225": {
+            "index": "28,28,28,28,28,28,28,28",
+            "lanes": "121,122,123,124",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth29"
+                ],
+                "4x100G": [
+                    "Eth29/1",
+                    "Eth29/2",
+                    "Eth29/3",
+                    "Eth29/4"
+                ],
+                "2x200G": [
+                    "Eth29/1",
+                    "Eth29/2"
+                ]
+            }
+        },
+        "Ethernet233": {
+            "index": "29,29,29,29,29,29,29,29",
+            "lanes": "125,126,127,128",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth30"
+                ],
+                "4x100G": [
+                    "Eth30/1",
+                    "Eth30/2",
+                    "Eth30/3",
+                    "Eth30/4"
+                ],
+                "2x200G": [
+                    "Eth30/1",
+                    "Eth30/2"
+                ]
+            }
+        },
+        "Ethernet241": {
+            "index": "30,30,30,30,30,30,30,30",
+            "lanes": "1,2,3,4",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth31"
+                ],
+                "4x100G": [
+                    "Eth31/1",
+                    "Eth31/2",
+                    "Eth31/3",
+                    "Eth31/4"
+                ],
+                "2x200G": [
+                    "Eth31/1",
+                    "Eth31/2"
+                ]
+            }
+        },
+        "Ethernet249": {
+            "index": "31,31,31,31,31,31,31,31",
+            "lanes": "5,6,7,8",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth32"
+                ],
+                "4x100G": [
+                    "Eth32/1",
+                    "Eth32/2",
+                    "Eth32/3",
+                    "Eth32/4"
+                ],
+                "2x200G": [
+                    "Eth32/1",
+                    "Eth32/2"
+                ]
+            }
+        },
+        "Ethernet257": {
+            "index": "32,32,32,32,32,32,32,32",
+            "lanes": "133,134,135,136",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth33"
+                ],
+                "4x100G": [
+                    "Eth33/1",
+                    "Eth33/2",
+                    "Eth33/3",
+                    "Eth33/4"
+                ],
+                "2x200G": [
+                    "Eth33/1",
+                    "Eth33/2"
+                ]
+            }
+        },
+        "Ethernet265": {
+            "index": "33,33,33,33,33,33,33,33",
+            "lanes": "129,130,131,132",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth34"
+                ],
+                "4x100G": [
+                    "Eth34/1",
+                    "Eth34/2",
+                    "Eth34/3",
+                    "Eth34/4"
+                ],
+                "2x200G": [
+                    "Eth34/1",
+                    "Eth34/2"
+                ]
+            }
+        },
+        "Ethernet273": {
+            "index": "34,34,34,34,34,34,34,34",
+            "lanes": "249,250,251,252",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth35"
+                ],
+                "4x100G": [
+                    "Eth35/1",
+                    "Eth35/2",
+                    "Eth35/3",
+                    "Eth35/4"
+                ],
+                "2x200G": [
+                    "Eth35/1",
+                    "Eth35/2"
+                ]
+            }
+        },
+        "Ethernet281": {
+            "index": "35,35,35,35,35,35,35,35",
+            "lanes": "253,254,255,256",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth36"
+                ],
+                "4x100G": [
+                    "Eth36/1",
+                    "Eth36/2",
+                    "Eth36/3",
+                    "Eth36/4"
+                ],
+                "2x200G": [
+                    "Eth36/1",
+                    "Eth36/2"
+                ]
+            }
+        },
+        "Ethernet289": {
+            "index": "36,36,36,36,36,36,36,36",
+            "lanes": "141,142,143,144",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth37"
+                ],
+                "4x100G": [
+                    "Eth37/1",
+                    "Eth37/2",
+                    "Eth37/3",
+                    "Eth37/4"
+                ],
+                "2x200G": [
+                    "Eth37/1",
+                    "Eth37/2"
+                ]
+            }
+        },
+        "Ethernet297": {
+            "index": "37,37,37,37,37,37,37,37",
+            "lanes": "137,138,139,140",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth38"
+                ],
+                "4x100G": [
+                    "Eth38/1",
+                    "Eth38/2",
+                    "Eth38/3",
+                    "Eth38/4"
+                ],
+                "2x200G": [
+                    "Eth38/1",
+                    "Eth38/2"
+                ]
+            }
+        },
+        "Ethernet305": {
+            "index": "38,38,38,38,38,38,38,38",
+            "lanes": "241,242,243,244",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth39"
+                ],
+                "4x100G": [
+                    "Eth39/1",
+                    "Eth39/2",
+                    "Eth39/3",
+                    "Eth39/4"
+                ],
+                "2x200G": [
+                    "Eth39/1",
+                    "Eth39/2"
+                ]
+            }
+        },
+        "Ethernet313": {
+            "index": "39,39,39,39,39,39,39,39",
+            "lanes": "245,246,247,248",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth40"
+                ],
+                "4x100G": [
+                    "Eth40/1",
+                    "Eth40/2",
+                    "Eth40/3",
+                    "Eth40/4"
+                ],
+                "2x200G": [
+                    "Eth40/1",
+                    "Eth40/2"
+                ]
+            }
+        },
+        "Ethernet321": {
+            "index": "40,40,40,40,40,40,40,40",
+            "lanes": "149,150,151,152",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth41"
+                ],
+                "4x100G": [
+                    "Eth41/1",
+                    "Eth41/2",
+                    "Eth41/3",
+                    "Eth41/4"
+                ],
+                "2x200G": [
+                    "Eth41/1",
+                    "Eth41/2"
+                ]
+            }
+        },
+        "Ethernet329": {
+            "index": "41,41,41,41,41,41,41,41",
+            "lanes": "145,146,147,148",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth42"
+                ],
+                "4x100G": [
+                    "Eth42/1",
+                    "Eth42/2",
+                    "Eth42/3",
+                    "Eth42/4"
+                ],
+                "2x200G": [
+                    "Eth42/1",
+                    "Eth42/2"
+                ]
+            }
+        },
+        "Ethernet337": {
+            "index": "42,42,42,42,42,42,42,42",
+            "lanes": "237,238,239,240",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth43"
+                ],
+                "4x100G": [
+                    "Eth43/1",
+                    "Eth43/2",
+                    "Eth43/3",
+                    "Eth43/4"
+                ],
+                "2x200G": [
+                    "Eth43/1",
+                    "Eth43/2"
+                ]
+            }
+        },
+        "Ethernet345": {
+            "index": "43,43,43,43,43,43,43,43",
+            "lanes": "197,198,199,200",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth44"
+                ],
+                "4x100G": [
+                    "Eth44/1",
+                    "Eth44/2",
+                    "Eth44/3",
+                    "Eth44/4"
+                ],
+                "2x200G": [
+                    "Eth44/1",
+                    "Eth44/2"
+                ]
+            }
+        },
+        "Ethernet353": {
+            "index": "44,44,44,44,44,44,44,44",
+            "lanes": "157,158,159,160",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth45"
+                ],
+                "4x100G": [
+                    "Eth45/1",
+                    "Eth45/2",
+                    "Eth45/3",
+                    "Eth45/4"
+                ],
+                "2x200G": [
+                    "Eth45/1",
+                    "Eth45/2"
+                ]
+            }
+        },
+        "Ethernet361": {
+            "index": "45,45,45,45,45,45,45,45",
+            "lanes": "153,154,155,156",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth46"
+                ],
+                "4x100G": [
+                    "Eth46/1",
+                    "Eth46/2",
+                    "Eth46/3",
+                    "Eth46/4"
+                ],
+                "2x200G": [
+                    "Eth46/1",
+                    "Eth46/2"
+                ]
+            }
+        },
+        "Ethernet369": {
+            "index": "46,46,46,46,46,46,46,46",
+            "lanes": "193,194,195,196",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth47"
+                ],
+                "4x100G": [
+                    "Eth47/1",
+                    "Eth47/2",
+                    "Eth47/3",
+                    "Eth47/4"
+                ],
+                "2x200G": [
+                    "Eth47/1",
+                    "Eth47/2"
+                ]
+            }
+        },
+        "Ethernet377": {
+            "index": "47,47,47,47,47,47,47,47",
+            "lanes": "205,206,207,208",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth48"
+                ],
+                "4x100G": [
+                    "Eth48/1",
+                    "Eth48/2",
+                    "Eth48/3",
+                    "Eth48/4"
+                ],
+                "2x200G": [
+                    "Eth48/1",
+                    "Eth48/2"
+                ]
+            }
+        },
+        "Ethernet385": {
+            "index": "48,48,48,48,48,48,48,48",
+            "lanes": "165,166,167,168",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth49"
+                ],
+                "4x100G": [
+                    "Eth49/1",
+                    "Eth49/2",
+                    "Eth49/3",
+                    "Eth49/4"
+                ],
+                "2x200G": [
+                    "Eth49/1",
+                    "Eth49/2"
+                ]
+            }
+        },
+        "Ethernet393": {
+            "index": "49,49,49,49,49,49,49,49",
+            "lanes": "161,162,163,164",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth50"
+                ],
+                "4x100G": [
+                    "Eth50/1",
+                    "Eth50/2",
+                    "Eth50/3",
+                    "Eth50/4"
+                ],
+                "2x200G": [
+                    "Eth50/1",
+                    "Eth50/2"
+                ]
+            }
+        },
+        "Ethernet401": {
+            "index": "50,50,50,50,50,50,50,50",
+            "lanes": "201,202,203,204",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth51"
+                ],
+                "4x100G": [
+                    "Eth51/1",
+                    "Eth51/2",
+                    "Eth51/3",
+                    "Eth51/4"
+                ],
+                "2x200G": [
+                    "Eth51/1",
+                    "Eth51/2"
+                ]
+            }
+        },
+        "Ethernet409": {
+            "index": "51,51,51,51,51,51,51,51",
+            "lanes": "213,214,215,216",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth52"
+                ],
+                "4x100G": [
+                    "Eth52/1",
+                    "Eth52/2",
+                    "Eth52/3",
+                    "Eth52/4"
+                ],
+                "2x200G": [
+                    "Eth52/1",
+                    "Eth52/2"
+                ]
+            }
+        },
+        "Ethernet417": {
+            "index": "52,52,52,52,52,52,52,52",
+            "lanes": "173,174,175,176",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth53"
+                ],
+                "4x100G": [
+                    "Eth53/1",
+                    "Eth53/2",
+                    "Eth53/3",
+                    "Eth53/4"
+                ],
+                "2x200G": [
+                    "Eth53/1",
+                    "Eth53/2"
+                ]
+            }
+        },
+        "Ethernet425": {
+            "index": "53,53,53,53,53,53,53,53",
+            "lanes": "169,170,171,172",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth54"
+                ],
+                "4x100G": [
+                    "Eth54/1",
+                    "Eth54/2",
+                    "Eth54/3",
+                    "Eth54/4"
+                ],
+                "2x200G": [
+                    "Eth54/1",
+                    "Eth54/2"
+                ]
+            }
+        },
+        "Ethernet433": {
+            "index": "54,54,54,54,54,54,54,54",
+            "lanes": "209,210,211,212",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth55"
+                ],
+                "4x100G": [
+                    "Eth55/1",
+                    "Eth55/2",
+                    "Eth55/3",
+                    "Eth55/4"
+                ],
+                "2x200G": [
+                    "Eth55/1",
+                    "Eth55/2"
+                ]
+            }
+        },
+        "Ethernet441": {
+            "index": "55,55,55,55,55,55,55,55",
+            "lanes": "221,222,223,224",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth56"
+                ],
+                "4x100G": [
+                    "Eth56/1",
+                    "Eth56/2",
+                    "Eth56/3",
+                    "Eth56/4"
+                ],
+                "2x200G": [
+                    "Eth56/1",
+                    "Eth56/2"
+                ]
+            }
+        },
+        "Ethernet449": {
+            "index": "56,56,56,56,56,56,56,56",
+            "lanes": "181,182,183,184",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth57"
+                ],
+                "4x100G": [
+                    "Eth57/1",
+                    "Eth57/2",
+                    "Eth57/3",
+                    "Eth57/4"
+                ],
+                "2x200G": [
+                    "Eth57/1",
+                    "Eth57/2"
+                ]
+            }
+        },
+        "Ethernet457": {
+            "index": "57,57,57,57,57,57,57,57",
+            "lanes": "177,178,179,180",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth58"
+                ],
+                "4x100G": [
+                    "Eth58/1",
+                    "Eth58/2",
+                    "Eth58/3",
+                    "Eth58/4"
+                ],
+                "2x200G": [
+                    "Eth58/1",
+                    "Eth58/2"
+                ]
+            }
+        },
+        "Ethernet465": {
+            "index": "58,58,58,58,58,58,58,58",
+            "lanes": "217,218,219,220",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth59"
+                ],
+                "4x100G": [
+                    "Eth59/1",
+                    "Eth59/2",
+                    "Eth59/3",
+                    "Eth59/4"
+                ],
+                "2x200G": [
+                    "Eth59/1",
+                    "Eth59/2"
+                ]
+            }
+        },
+        "Ethernet473": {
+            "index": "59,59,59,59,59,59,59,59",
+            "lanes": "229,230,231,232",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth60"
+                ],
+                "4x100G": [
+                    "Eth60/1",
+                    "Eth60/2",
+                    "Eth60/3",
+                    "Eth60/4"
+                ],
+                "2x200G": [
+                    "Eth60/1",
+                    "Eth60/2"
+                ]
+            }
+        },
+        "Ethernet481": {
+            "index": "60,60,60,60,60,60,60,60",
+            "lanes": "189,190,191,192",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth61"
+                ],
+                "4x100G": [
+                    "Eth61/1",
+                    "Eth61/2",
+                    "Eth61/3",
+                    "Eth61/4"
+                ],
+                "2x200G": [
+                    "Eth61/1",
+                    "Eth61/2"
+                ]
+            }
+        },
+        "Ethernet489": {
+            "index": "61,61,61,61,61,61,61,61",
+            "lanes": "185,186,187,188",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth62"
+                ],
+                "4x100G": [
+                    "Eth62/1",
+                    "Eth62/2",
+                    "Eth62/3",
+                    "Eth62/4"
+                ],
+                "2x200G": [
+                    "Eth62/1",
+                    "Eth62/2"
+                ]
+            }
+        },
+        "Ethernet497": {
+            "index": "62,62,62,62,62,62,62,62",
+            "lanes": "225,226,227,228",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth63"
+                ],
+                "4x100G": [
+                    "Eth63/1",
+                    "Eth63/2",
+                    "Eth63/3",
+                    "Eth63/4"
+                ],
+                "2x200G": [
+                    "Eth63/1",
+                    "Eth63/2"
+                ]
+            }
+        },
+        "Ethernet505": {
+            "index": "63,63,63,63,63,63,63,63",
+            "lanes": "233,234,235,236",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth64"
+                ],
+                "4x100G": [
+                    "Eth64/1",
+                    "Eth64/2",
+                    "Eth64/3",
+                    "Eth64/4"
+                ],
+                "2x200G": [
+                    "Eth64/1",
+                    "Eth64/2"
+                ]
+            }
+        }
+    }
+}
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_asic b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_asic
new file mode 100644
index 000000000000..960467652765
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_components.json
new file mode 100644
index 000000000000..221114c461b9
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_components.json
@@ -0,0 +1,20 @@
+{
+    "chassis": {
+        "M2-W6930-64QC": {
+            "component": {
+                "CPU_CPLD": { },
+                "CONNECT_CPLD": { },
+                "FAN_CPLDA": { },
+                "FAN_CPLDB": { },
+                "MAC_CPLDA": { },
+                "MAC_CPLDB": { },
+                "PORT_CPLDA": { },
+                "PORT_CPLDB": { },
+                "MAC_FPGA": { },
+                "PORT_FPGA": { },
+                "BIOS": { }
+            }
+        }
+    }
+}
+
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_env.conf b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_env.conf
new file mode 100644
index 000000000000..fc119184d5c1
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/platform_env.conf
@@ -0,0 +1,2 @@
+is_ltsw_chip=1
+SYNCD_SHM_SIZE=1g
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6930-64qc-r0/plugins/sfputil.py
new file mode 100644
index 000000000000..f52a788085e9
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/plugins/sfputil.py
@@ -0,0 +1,363 @@
+# sfputil.py
+#
+# Platform-specific SFP transceiver interface for SONiC
+#
+
+try:
+    import time
+    import re
+    import os
+    import threading
+    import traceback
+    import subprocess
+    from ctypes import create_string_buffer
+    from sonic_sfp.sfputilbase import SfpUtilBase
+    from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom
+except ImportError as e:
+    raise ImportError("%s - required module not found" % str(e))
+
+class SfpUtil(SfpUtilBase):
+    """Platform-specific SfpUtil class"""
+
+    PORT_START = 0
+    PORT_END = 63
+    PORTS_IN_BLOCK = 64
+
+    EEPROM_OFFSET = 133
+    SFP_DEVICE_TYPE = "optoe2"
+    QSFP_DEVICE_TYPE = "optoe1"
+    QSFP_DD_DEVICE_TYPE = "optoe3"
+    I2C_MAX_ATTEMPT = 3
+
+    OPTOE_TYPE1 = 1
+    OPTOE_TYPE2 = 2
+    OPTOE_TYPE3 = 3
+
+    SFP_STATUS_INSERTED = '1'
+    SFP_STATUS_REMOVED = '0'
+
+    _port_to_eeprom_mapping = {}
+    port_to_i2cbus_mapping ={}
+    port_dict = {}
+
+    qsfp_ports_list = []
+    qsfp_dd_ports_list = []
+
+    @property
+    def port_start(self):
+        return self.PORT_START
+
+    @property
+    def port_end(self):
+        return self.PORT_END
+
+    @property
+    def qsfp_ports(self):
+        return self.qsfp_ports_list
+
+    @property
+    def qsfp_dd_ports(self):
+        return self.qsfp_dd_ports_list
+
+    @property
+    def port_to_eeprom_mapping(self):
+        return self._port_to_eeprom_mapping
+
+    def __init__(self):
+        self.qsfp_ports_list = []
+        self.qsfp_dd_ports_list = []
+        for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+            self.port_to_i2cbus_mapping[x] = (x + self.EEPROM_OFFSET)
+            if self.get_presence(x):
+                self.port_dict[x] = self.SFP_STATUS_INSERTED
+            else:
+                self.port_dict[x] = self.SFP_STATUS_REMOVED
+
+            if (self.check_is_qsfpdd(x)):
+                self.qsfp_dd_ports_list.append(x)
+                self.check_optoe_type(x, self.OPTOE_TYPE3)
+            else:
+                self.qsfp_ports_list.append(x)
+                self.check_optoe_type(x, self.OPTOE_TYPE1)
+        SfpUtilBase.__init__(self)
+
+    def _sfp_read_file_path(self, file_path, offset, num_bytes):
+        attempts = 0
+        while attempts < self.I2C_MAX_ATTEMPT:
+            try:
+                file_path.seek(offset)
+                read_buf = file_path.read(num_bytes)
+            except:
+                attempts += 1
+                time.sleep(0.05)
+            else:
+                return True, read_buf
+        return False, None
+
+    def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset):
+        """Tries to read the eeprom file to determine if the
+        device/sfp is present or not. If sfp present, the read returns
+        valid bytes. If not, read returns error 'Connection timed out"""
+
+        if not os.path.exists(sysfs_sfp_i2c_client_eeprompath):
+            return False
+        else:
+            with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile:
+                rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1)
+                return rv
+
+    def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype):
+        try:
+            sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path
+
+            # Write device address to new_device file
+            nd_file = open(sysfs_nd_path, "w")
+            nd_str = "%s %s" % (devtype, hex(devaddr))
+            nd_file.write(nd_str)
+            nd_file.close()
+
+        except Exception as err:
+            print("Error writing to new device file: %s" % str(err))
+            return 1
+        else:
+            return 0
+
+    def _get_port_eeprom_path(self, port_num, devid):
+        sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+        if port_num in self.port_to_eeprom_mapping.keys():
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num]
+        else:
+            sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+            i2c_adapter_id = self._get_port_i2c_adapter_id(port_num)
+            if i2c_adapter_id is None:
+                print("Error getting i2c bus num")
+                return None
+
+            # Get i2c virtual bus path for the sfp
+            sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path,
+                                                        str(i2c_adapter_id))
+
+            # If i2c bus for port does not exist
+            if not os.path.exists(sysfs_sfp_i2c_adapter_path):
+                print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path)
+                return None
+
+            sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path,
+                                                        str(i2c_adapter_id),
+                                                        hex(devid)[-2:])
+
+            # If sfp device is not present on bus, Add it
+            if not os.path.exists(sysfs_sfp_i2c_client_path):
+                if port_num in self.qsfp_dd_ports:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DD_DEVICE_TYPE)
+                elif  port_num in self.qsfp_ports:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE)
+                else:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE)
+                if ret != 0:
+                    print("Error adding sfp device")
+                    return None
+
+            sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path
+
+        return sysfs_sfp_i2c_client_eeprom_path
+
+    def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes):
+        eeprom_raw = []
+        for i in range(0, num_bytes):
+            eeprom_raw.append("0x00")
+
+        rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes)
+        if rv == False:
+            return None
+
+        try:
+            for n in range(0, num_bytes):
+                eeprom_raw[n] = hex(raw[n])[2:].zfill(2)
+        except:
+            return None
+
+        return eeprom_raw
+
+    def get_eeprom_dom_raw(self, port_num):
+        if port_num in self.qsfp_ports:
+            # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw
+            return None
+        else:
+            # Read dom eeprom at addr 0x51
+            return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256)
+
+    def get_presence(self, port_num):
+        # Check for invalid port_num
+        if port_num < self.port_start or port_num > self.port_end:
+            return False
+        cmd = "cat /sys/wb_plat/sff/sff{}/present".format(str(port_num+1))
+        ret, output = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            return False
+        if output == "1":
+            return True
+        return False
+
+    def check_is_qsfpdd(self, port_num):
+        try:
+            if self.get_presence(port_num) == False:
+                return False
+
+            eeprom_path = self._get_port_eeprom_path(port_num, 0x50)
+            with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+                eeprom_raw = self._read_eeprom_specific_bytes(eeprom, 0, 1)
+                # according to sff-8024 A0h Byte 0 is '1e' or '18' means the transceiver is qsfpdd
+                if (eeprom_raw[0] == '1e' or eeprom_raw[0] == '18'):
+                    return True
+        except Exception as e:
+            print(traceback.format_exc())
+
+        return False
+
+    def check_optoe_type(self, port_num, optoe_type):
+        if self.get_presence(port_num) == False:
+            return True
+        try:
+            eeprom_path = self._get_port_eeprom_path(port_num, 0x50)
+            dev_class_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/dev_class'
+            i2c_path = dev_class_path.format(str(self.port_to_i2cbus_mapping[port_num]))
+            cmd = "cat " + i2c_path
+            ret, output = subprocess.getstatusoutput(cmd)
+            if ret != 0:
+                print("cmd: %s execution fail, output:%s" % (cmd, output))
+                return False
+            if int(output) != optoe_type:
+                cmd = "echo " + str(optoe_type) + " > " + i2c_path
+                ret, output = subprocess.getstatusoutput(cmd)
+                if ret != 0:
+                    print("cmd: %s execution fail, output:%s" % (cmd, output))
+                    return False
+            return True
+
+        except Exception as e:
+            print(traceback.format_exc())
+            return False
+
+    def get_low_power_mode(self, port_num):
+        # Check for invalid port_num
+
+        return True
+
+    def set_low_power_mode(self, port_num, lpmode):
+        # Check for invalid port_num
+
+        return True
+
+    def reset(self, port_num):
+        # Check for invalid port_num
+        if port_num < self.port_start or port_num > self.port_end:
+            return False
+
+        return True
+
+    def get_transceiver_change_event(self, timeout=0):
+
+        start_time = time.time()
+        current_port_dict = {}
+        forever = False
+
+        if timeout == 0:
+            forever = True
+        elif timeout > 0:
+            timeout = timeout / float(1000) # Convert to secs
+        else:
+            print ("get_transceiver_change_event:Invalid timeout value", timeout)
+            return False, {}
+
+        end_time = start_time + timeout
+        if start_time > end_time:
+            print ('get_transceiver_change_event:' \
+                       'time wrap / invalid timeout value', timeout)
+
+            return False, {} # Time wrap or possibly incorrect timeout
+
+        while timeout >= 0:
+            # Check for OIR events and return updated port_dict
+            for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+                if self.get_presence(x):
+                    current_port_dict[x] = self.SFP_STATUS_INSERTED
+                else:
+                    current_port_dict[x] = self.SFP_STATUS_REMOVED
+            if (current_port_dict == self.port_dict):
+                if forever:
+                    time.sleep(1)
+                else:
+                    timeout = end_time - time.time()
+                    if timeout >= 1:
+                        time.sleep(1) # We poll at 1 second granularity
+                    else:
+                        if timeout > 0:
+                            time.sleep(timeout)
+                        return True, {}
+            else:
+                # Update reg value
+                self.port_dict = current_port_dict
+                return True, self.port_dict
+        print ("get_transceiver_change_event: Should not reach here.")
+        return False, {}
+
+    def get_highest_temperature(self):
+        offset = 0
+        hightest_temperature = -9999
+
+        presence_flag = False
+        read_eeprom_flag = False
+        temperature_valid_flag = False
+
+        for port in range(self.PORT_START, self.PORTS_IN_BLOCK):
+            if self.get_presence(port) == False:
+                continue
+
+            presence_flag = True
+
+            if port in self.qsfp_dd_ports:
+                offset = 14
+            elif port in self.qsfp_ports:
+                offset = 22
+            else:
+                offset = 96
+
+            eeprom_path = self._get_port_eeprom_path(port, 0x50)
+            try:
+                with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+                    read_eeprom_flag = True
+                    eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2)
+                    if len(eeprom_raw) != 0:
+                        msb = int(eeprom_raw[0], 16)
+                        lsb = int(eeprom_raw[1], 16)
+
+                        result = (msb << 8) | (lsb & 0xff)
+                        result = float(result / 256.0)
+                        if -50 <= result <= 200:
+                            temperature_valid_flag = True
+                            if hightest_temperature < result:
+                                hightest_temperature = result
+            except Exception as e:
+                pass
+
+        # all port not presence
+        if presence_flag == False:
+            hightest_temperature = -10000
+
+        # all port read eeprom fail
+        elif read_eeprom_flag == False:
+            hightest_temperature = -9999
+
+        # all port temperature invalid
+        elif read_eeprom_flag == True and temperature_valid_flag == False:
+            hightest_temperature = -10000
+
+        hightest_temperature = round(hightest_temperature, 2)
+
+        return hightest_temperature
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6930-64qc-r0/plugins/ssd_util.py
new file mode 100644
index 000000000000..e8cf2e1a7cbc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/plugins/ssd_util.py
@@ -0,0 +1,318 @@
+#
+# ssd_util.py
+#
+# Generic implementation of the SSD health API
+# SSD models supported:
+#  - InnoDisk
+#  - StorFly
+#  - Virtium
+
+try:
+    import re
+    import os
+    import subprocess
+    from sonic_platform_base.sonic_storage.storage_base import StorageBase
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+SMARTCTL = "smartctl {} -a"
+INNODISK = "iSmart -d {}"
+VIRTIUM  = "SmartCmd -m {}"
+DISK_LIST_CMD = "fdisk -l -o Device"
+DISK_FREE_CMD = "df -h"
+MOUNT_CMD = "mount"
+
+NOT_AVAILABLE = "N/A"
+PE_CYCLE = 3000
+FAIL_PERCENT = 95
+
+# Set Vendor Specific IDs
+INNODISK_HEALTH_ID = 169
+INNODISK_TEMPERATURE_ID = 194
+
+class SsdUtil(StorageBase):
+    """
+    Generic implementation of the SSD health API
+    """
+    model = NOT_AVAILABLE
+    serial = NOT_AVAILABLE
+    firmware = NOT_AVAILABLE
+    temperature = NOT_AVAILABLE
+    health = NOT_AVAILABLE
+    remaining_life = NOT_AVAILABLE
+    sata_rate = NOT_AVAILABLE
+    ssd_info = NOT_AVAILABLE
+    vendor_ssd_info = NOT_AVAILABLE
+
+    def __init__(self, diskdev):
+        self.vendor_ssd_utility = {
+            "Generic"  : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info },
+            "InnoDisk" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+            "M.2"      : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+            "StorFly"  : { "utility" : VIRTIUM,  "parser" : self.parse_virtium_info },
+            "Virtium"  : { "utility" : VIRTIUM,  "parser" : self.parse_virtium_info }
+        }
+
+        """
+        The dict model_attr keys relate the vendors
+        LITEON : "ER2-GD","AF2MA31DTDLT"
+        Intel  : "SSDSCKKB"
+        SMI    : "SM619GXC"
+        samsung: "MZNLH"
+        ADATA  : "IM2S3134N"
+        """
+        self.model_attr = {
+             "ER2-GD"       : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+             "AF2MA31DTDLT" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+             "SSDSCK"       : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n233\s+(.+?)\n" },
+             "SM619GXC"     : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n169\s+(.+?)\n" },
+             "MZNLH"        : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n245\s+(.+?)\n" },
+             "IM2S3134N"    : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n231\s+(.+?)\n" },
+             "MTFDDAV240TCB-1AR1ZABAA"    : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }
+        }
+
+        self.key_list = list(self.model_attr.keys())
+        self.attr_info_rule = "[\s\S]*SMART Attributes Data Structure revision number: 1|SMART Error Log Version[\s\S]*"
+        self.dev = diskdev
+        # Generic part
+        self.fetch_generic_ssd_info(diskdev)
+        self.parse_generic_ssd_info()
+        self.fetch_vendor_ssd_info(diskdev, "Generic")
+        
+        # Known vendor part
+        if self.model:
+            model_short = self.model.split()[0]
+            if model_short in self.vendor_ssd_utility:
+                self.fetch_vendor_ssd_info(diskdev, model_short)
+                self.parse_vendor_ssd_info(model_short)
+            else:
+                # No handler registered for this disk model
+                pass
+        else:
+            # Failed to get disk model
+            self.model = "Unknown"
+
+    def _execute_shell(self, cmd):
+        process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE)
+        output, error = process.communicate()
+        exit_code = process.returncode
+        if exit_code:
+            return None
+        return output
+
+    def _parse_re(self, pattern, buffer):
+        res_list = re.findall(pattern, str(buffer))
+        return res_list[0] if res_list else NOT_AVAILABLE
+
+    def fetch_generic_ssd_info(self, diskdev):
+        self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev))
+
+    # Health and temperature values may be overwritten with vendor specific data
+    def parse_generic_ssd_info(self):
+        if "nvme" in self.dev:
+            self.model = self._parse_re('Model Number:\s*(.+?)\n', self.ssd_info)
+
+            health_raw = self._parse_re('Percentage Used\s*(.+?)\n', self.ssd_info)
+            if health_raw == NOT_AVAILABLE:
+                self.health = NOT_AVAILABLE
+            else:
+                health_raw = health_raw.split()[-1]
+                self.health = 100 - float(health_raw.strip('%'))
+
+            temp_raw = self._parse_re('Temperature\s*(.+?)\n', self.ssd_info)
+            if temp_raw == NOT_AVAILABLE:
+                self.temperature = NOT_AVAILABLE
+            else:
+                temp_raw = temp_raw.split()[-2]
+                self.temperature = float(temp_raw)
+        else:
+            self.model = self._parse_re('Device Model:\s*(.+?)\n', self.ssd_info)
+            model_key = ""
+            for key in self.key_list:
+                if re.search(key, self.model):
+                    model_key = key
+                    break
+            if  model_key != "":
+                self.remaining_life = self._parse_re(self.model_attr[model_key]["remainingLife"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[2]
+                self.temperature = self._parse_re(self.model_attr[model_key]["temperature"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[8]
+                self.health = self.remaining_life
+            # Get the LITEON ssd health value by (PE CYCLE - AVG ERASE CYCLE )/(PE CYCLE)
+            if model_key in ["ER2-GD", "AF2MA31DTDLT"]:
+                avg_erase = int(self._parse_re('\n173\s+(.+?)\n' ,re.sub(self.attr_info_rule,"",self.ssd_info)).split()[-1])
+                self.health = int(round((PE_CYCLE - avg_erase)/PE_CYCLE*100,0))
+            if self.remaining_life != NOT_AVAILABLE and  int(self.remaining_life) < FAIL_PERCENT:
+                self.remaining_life = "Fail"
+        self.sata_rate = self._parse_re('SATA Version is:.*current: (.+?)\)\n', self.ssd_info)
+        self.serial = self._parse_re('Serial Number:\s*(.+?)\n', self.ssd_info)
+        self.firmware = self._parse_re('Firmware Version:\s*(.+?)\n', self.ssd_info)
+
+    def parse_innodisk_info(self):
+        if self.vendor_ssd_info:
+            self.health = self._parse_re('Health:\s*(.+?)%', self.vendor_ssd_info)
+            self.temperature = self._parse_re('Temperature\s*\[\s*(.+?)\]', self.vendor_ssd_info)
+        else:
+            if self.health == NOT_AVAILABLE:
+                health_raw = self.parse_id_number(INNODISK_HEALTH_ID)
+                self.health = health_raw.split()[-1]
+            if self.temperature == NOT_AVAILABLE:
+                temp_raw = self.parse_id_number(INNODISK_TEMPERATURE_ID)
+                self.temperature = temp_raw.split()[-6]
+
+    def parse_virtium_info(self):
+        if self.vendor_ssd_info:
+            self.temperature = self._parse_re('Temperature_Celsius\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            nand_endurance = self._parse_re('NAND_Endurance\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            avg_erase_count = self._parse_re('Average_Erase_Count\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            try:
+                self.health = 100 - (float(avg_erase_count) * 100 / float(nand_endurance))
+            except (ValueError, ZeroDivisionError):
+                # Invalid avg_erase_count or nand_endurance.
+                pass
+
+    def fetch_vendor_ssd_info(self, diskdev, model):
+        self.vendor_ssd_info = self._execute_shell(self.vendor_ssd_utility[model]["utility"].format(diskdev))
+
+    def parse_vendor_ssd_info(self, model):
+        self.vendor_ssd_utility[model]["parser"]()
+
+    def check_readonly2(self, partition, filesystem):
+        # parse mount cmd output info
+        mount_info = self._execute_shell(MOUNT_CMD)
+        for line in mount_info.split('\n'):
+            column_list = line.split()
+            if line == '':
+                continue
+            if column_list[0] == partition and column_list[2] == filesystem:
+                if column_list[5].split(',')[0][1:] == "ro":
+                    return partition
+                else:
+                    return NOT_AVAILABLE
+        return NOT_AVAILABLE
+
+    def check_readonly(self, partition, filesystem):
+        ret = os.access(filesystem, os.W_OK)
+        if ret == False:
+            return partition
+        else:
+            return NOT_AVAILABLE
+        
+    def get_health(self):
+        """
+        Retrieves current disk health in percentages
+
+        Returns:
+            A float number of current ssd health
+            e.g. 83.5
+        """
+        if self.health == 'N/A':
+            return "NA"
+        else:
+            return float(self.health)
+
+    def get_temperature(self):
+        """
+        Retrieves current disk temperature in Celsius
+
+        Returns:
+            A float number of current temperature in Celsius
+            e.g. 40.1
+        """
+        if self.temperature == 'N/A':
+            return 'NA'
+        else:
+            return float(self.temperature)
+
+    def get_model(self):
+        """
+        Retrieves model for the given disk device
+
+        Returns:
+            A string holding disk model as provided by the manufacturer
+        """
+        return self.model
+
+    def get_firmware(self):
+        """
+        Retrieves firmware version for the given disk device
+
+        Returns:
+            A string holding disk firmware version as provided by the manufacturer
+        """
+        return self.firmware
+
+    def get_serial(self):
+        """
+        Retrieves serial number for the given disk device
+
+        Returns:
+            A string holding disk serial number as provided by the manufacturer
+        """
+        return self.serial
+    def get_sata_rate(self):
+        """
+        Retrieves SATA rate for the given disk device
+        Returns:
+            A string holding current SATA rate as provided by the manufacturer
+        """
+        return self.sata_rate
+    def get_remaining_life(self):
+        """
+        Retrieves remaining life for the given disk device
+        Returns:
+            A string holding disk remaining life as provided by the manufacturer
+        """
+        return self.remaining_life
+    def get_vendor_output(self):
+        """
+        Retrieves vendor specific data for the given disk device
+
+        Returns:
+            A string holding some vendor specific disk information
+        """
+        return self.vendor_ssd_info
+
+    def parse_id_number(self, id):
+        return self._parse_re('{}\s*(.+?)\n'.format(id), self.ssd_info)
+
+    def get_readonly_partition(self):
+        """
+        Check the partition mount filesystem is readonly status,then output the result.
+        Returns:
+            The readonly partition list
+        """
+
+        ro_partition_list = []
+        partition_list = []
+
+        # parse fdisk cmd output info
+        disk_info = self._execute_shell(DISK_LIST_CMD)
+        begin_flag = False
+        for line in disk_info.split('\n'):
+            if line == "Device":
+                begin_flag = True
+                continue
+            if begin_flag:
+                if line != "":
+                    partition_list.append(line)
+                else:
+                    break
+
+        # parse df cmd output info
+        disk_free = self._execute_shell(DISK_FREE_CMD)
+        disk_dict = {}
+        line_num = 0
+        for line in disk_free.split('\n'):
+            line_num = line_num + 1
+            if line_num == 1 or line == "":
+                continue
+            column_list = line.split()
+            disk_dict[column_list[0]] = column_list[5]
+
+        # get partition which is readonly
+        for partition in partition_list:
+            if partition in disk_dict:
+                ret = self.check_readonly(partition, disk_dict[partition])
+                if (ret != NOT_AVAILABLE):
+                    ro_partition_list.append(ret)
+
+        return ro_partition_list
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6930-64qc-r0/pmon_daemon_control.json
new file mode 100644
index 000000000000..94592fa8cebc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/pmon_daemon_control.json
@@ -0,0 +1,3 @@
+{
+    "skip_ledd": true
+}
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/postinit_cmd_file.soc b/device/micas/x86_64-micas_m2-w6930-64qc-r0/postinit_cmd_file.soc
new file mode 100644
index 000000000000..fa28dafe16cb
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6930-64qc-r0/postinit_cmd_file.soc
@@ -0,0 +1,4 @@
+led load /usr/share/sonic/platform/custom_led.bin
+led auto on
+led start
+linkscan SwPortBitMap=xe,ce,cd
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6930-64qc-r0/system_health_monitoring_config.json b/device/micas/x86_64-micas_m2-w6930-64qc-r0/system_health_monitoring_config.json
new file mode 100755
index 000000000000..e69de29bb2d1
diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk
index ac5b44f1c721..51e7b6a56cfe 100755
--- a/platform/broadcom/one-image.mk
+++ b/platform/broadcom/one-image.mk
@@ -100,6 +100,7 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \
                                $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE) \
 			       $(MICAS_M2_W6510_48GT4V_PLATFORM_MODULE) \
 			       $(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE) \
+			       $(MICAS_M2_W6930_64QC_PLATFORM_MODULE) \
 			       $(MICAS_M2_W6940_64OC_PLATFORM_MODULE) \
 			       $(MICAS_M2_W6920_32QC2X_PLATFORM_MODULE) \
 			       $(MICAS_M2_W6510_32C_PLATFORM_MODULE)
diff --git a/platform/broadcom/platform-modules-micas.mk b/platform/broadcom/platform-modules-micas.mk
index ea55ae8d4998..a2121ba55e2b 100644
--- a/platform/broadcom/platform-modules-micas.mk
+++ b/platform/broadcom/platform-modules-micas.mk
@@ -25,6 +25,14 @@ MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE = platform-modules-micas-m2-w6520-24dc8qc
 $(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6520-24dc8qc-r0
 $(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE)))
 
+## M2-W6930-64QC
+MICAS_M2_W6930_64QC_PLATFORM_MODULE_VERSION = 1.0
+export MICAS_M2_W6930_64QC_PLATFORM_MODULE_VERSION
+
+MICAS_M2_W6930_64QC_PLATFORM_MODULE = platform-modules-micas-m2-w6930-64qc_$(MICAS_M2_W6930_64QC_PLATFORM_MODULE_VERSION)_amd64.deb
+$(MICAS_M2_W6930_64QC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6930-64qc-r0
+$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6930_64QC_PLATFORM_MODULE)))
+
 ## M2-W6940-64OC
 MICAS_M2_W6940_64OC_PLATFORM_MODULE_VERSION = 1.0
 export MICAS_M2_W6940_64OC_PLATFORM_MODULE_VERSION
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/control b/platform/broadcom/sonic-platform-modules-micas/debian/control
index 76a23f057c13..5e7c9c5bed52 100644
--- a/platform/broadcom/sonic-platform-modules-micas/debian/control
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/control
@@ -16,6 +16,10 @@ Package: platform-modules-micas-m2-w6520-24dc8qc
 Architecture: amd64
 Description: kernel modules for platform devices such as fan, led, sfp
 
+Package: platform-modules-micas-m2-w6930-64qc
+Architecture: amd64
+Description: kernel modules for platform devices such as fan, led, sfp
+
 Package: platform-modules-micas-m2-w6940-64oc
 Architecture: amd64
 Description: kernel modules for platform devices such as fan, led, sfp
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.install
new file mode 100644
index 000000000000..f6e2060d2d11
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.install
@@ -0,0 +1 @@
+m2-w6930-64qc/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6930-64qc-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.postinst
new file mode 100644
index 000000000000..a8132f4f65a9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.postinst
@@ -0,0 +1,10 @@
+#!/bin/sh
+# postinst
+
+kernel_version=$(uname -r)
+
+if [ -e /boot/System.map-${kernel_version} ]; then
+    depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
+fi
+
+#DEBHELPER#
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
index 6be3c6f0563d..a6b04f7443a6 100644
--- a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
@@ -3,6 +3,7 @@ currentdir = $(shell pwd)
 MODULE_DIRS := m2-w6510-48v8c
 MODULE_DIRS += m2-w6510-48gt4v
 MODULE_DIRS += m2-w6520-24dc8qc
+MODULE_DIRS += m2-w6930-64qc
 MODULE_DIRS += m2-w6940-64oc
 MODULE_DIRS += m2-w6920-32qc2x
 MODULE_DIRS += m2-w6510-32c
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/Makefile
new file mode 100644
index 000000000000..ffcf6320f6cd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/Makefile
@@ -0,0 +1,26 @@
+PWD		= $(shell pwd)
+DIR_KERNEL_SRC = $(PWD)/modules/driver
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+SUB_BUILD_DIR = $(PWD)/build
+INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)
+INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin
+INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages
+INSTALL_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/plat_sysfs_cfg
+
+all:
+	$(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules
+	@if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi
+	cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR)
+	@if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi
+	cp -r $(PWD)/config/*  $(INSTALL_SCRIPT_DIR)
+	@if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi
+	@if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi
+	@if [ ! -d ${INSTALL_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_SYSFS_CFG_DIR} ;fi
+	@if [ -d $(PWD)/plat_sysfs_cfg/ ]; then cp -r $(PWD)/plat_sysfs_cfg/* ${INSTALL_SYSFS_CFG_DIR} ;fi
+	@if [ ! -d ${INSTALL_UPGRADE_TEST_DIR} ]; then mkdir -p ${INSTALL_UPGRADE_TEST_DIR} ;fi
+clean:
+	rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd
+	rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order
+	rm -rf ${DIR_KERNEL_SRC}/.tmp_versions
+	rm -rf $(SUB_BUILD_DIR)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/config/x86_64_micas_m2_w6930_64qc_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/config/x86_64_micas_m2_w6930_64qc_r0_config.py
new file mode 100755
index 000000000000..100f8603d982
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/config/x86_64_micas_m2_w6930_64qc_r0_config.py
@@ -0,0 +1,2036 @@
+#!/usr/bin/python3
+# -*- coding: UTF-8 -*-
+from platform_common import *
+
+STARTMODULE = {
+    "fancontrol": 0,
+    "hal_fanctrl": 1,
+    "hal_ledctrl": 1,
+    "avscontrol": 0,
+    "tty_console": 1,
+    "dev_monitor": 1,
+    "pmon_syslog": 1,
+    "sff_temp_polling": 1,
+    "reboot_cause": 1,
+}
+
+DEV_MONITOR_PARAM = {
+    "polling_time": 10,
+    "psus": [
+        {"name": "psu1",
+         "present": {"gettype": "io", "io_addr": 0x964, "presentbit": 0, "okval": 0},
+         "device": [
+             {"id": "psu1pmbus", "name": "wb_fsp1200", "bus": 83, "loc": 0x58, "attr": "hwmon"},
+             {"id": "psu1frue2", "name": "24c02", "bus": 83, "loc": 0x50, "attr": "eeprom"},
+         ],
+         },
+        {"name": "psu2",
+         "present": {"gettype": "io", "io_addr": 0x964, "presentbit": 4, "okval": 0},
+         "device": [
+             {"id": "psu2pmbus", "name": "wb_fsp1200", "bus": 84, "loc": 0x58, "attr": "hwmon"},
+             {"id": "psu2frue2", "name": "24c02", "bus": 84, "loc": 0x50, "attr": "eeprom"},
+         ],
+         },
+        {"name": "psu3",
+         "present": {"gettype": "io", "io_addr": 0x965, "presentbit": 4, "okval": 0},
+         "device": [
+             {"id": "psu3pmbus", "name": "wb_fsp1200", "bus": 86, "loc": 0x58, "attr": "hwmon"},
+             {"id": "psu3frue2", "name": "24c02", "bus": 86, "loc": 0x50, "attr": "eeprom"},
+         ],
+         },
+        {"name": "psu4",
+         "present": {"gettype": "io", "io_addr": 0x965, "presentbit": 0, "okval": 0},
+         "device": [
+             {"id": "psu4pmbus", "name": "wb_fsp1200", "bus": 85, "loc": 0x58, "attr": "hwmon"},
+             {"id": "psu4frue2", "name": "24c02", "bus": 85, "loc": 0x50, "attr": "eeprom"},
+         ],
+         },
+    ],
+    "fans": [
+        {"name": "fan1",
+         "present": {"gettype": "i2c", "bus": 92, "loc": 0x0d, "offset": 0x30, "presentbit": 0, "okval": 0},
+         "device": [
+             {"id": "fan1frue2", "name": "24c64", "bus": 95, "loc": 0x50, "attr": "eeprom"},
+         ],
+         },
+        {"name": "fan2",
+         "present": {"gettype": "i2c", "bus": 101, "loc": 0x0d, "offset": 0x30, "presentbit": 0, "okval": 0},
+         "device": [
+             {"id": "fan5frue2", "name": "24c64", "bus": 104, "loc": 0x50, "attr": "eeprom"},
+         ],
+         },
+        {"name": "fan3",
+         "present": {"gettype": "i2c", "bus": 92, "loc": 0x0d, "offset": 0x30, "presentbit": 1, "okval": 0},
+         "device": [
+             {"id": "fan2frue2", "name": "24c64", "bus": 96, "loc": 0x50, "attr": "eeprom"},
+         ],
+         },
+        {"name": "fan4",
+         "present": {"gettype": "i2c", "bus": 101, "loc": 0x0d, "offset": 0x30, "presentbit": 1, "okval": 0},
+         "device": [
+             {"id": "fan6frue2", "name": "24c64", "bus": 105, "loc": 0x50, "attr": "eeprom"},
+         ],
+         },
+        {"name": "fan5",
+         "present": {"gettype": "i2c", "bus": 92, "loc": 0x0d, "offset": 0x30, "presentbit": 2, "okval": 0},
+         "device": [
+             {"id": "fan3frue2", "name": "24c64", "bus": 97, "loc": 0x50, "attr": "eeprom"},
+         ],
+         },
+        {"name": "fan6",
+         "present": {"gettype": "i2c", "bus": 101, "loc": 0x0d, "offset": 0x30, "presentbit": 2, "okval": 0},
+         "device": [
+             {"id": "fan7frue2", "name": "24c64", "bus": 106, "loc": 0x50, "attr": "eeprom"},
+         ],
+         },
+        {"name": "fan7",
+         "present": {"gettype": "i2c", "bus": 92, "loc": 0x0d, "offset": 0x30, "presentbit": 3, "okval": 0},
+         "device": [
+             {"id": "fan4frue2", "name": "24c64", "bus": 98, "loc": 0x50, "attr": "eeprom"},
+         ],
+         },
+        {"name": "fan8",
+         "present": {"gettype": "i2c", "bus": 101, "loc": 0x0d, "offset": 0x30, "presentbit": 3, "okval": 0},
+         "device": [
+             {"id": "fan8frue2", "name": "24c64", "bus": 107, "loc": 0x50, "attr": "eeprom"},
+         ],
+         },
+    ],
+    "others": [
+        {
+            "name": "eeprom",
+            "device": [
+                {"id": "eeprom_1", "name": "24c02", "bus": 1, "loc": 0x56, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "lm75",
+            "device": [
+                {"id": "lm75_1", "name": "lm75", "bus": 79, "loc": 0x4b, "attr": "hwmon"},
+                {"id": "lm75_2", "name": "lm75", "bus": 93, "loc": 0x48, "attr": "hwmon"},
+                {"id": "lm75_3", "name": "lm75", "bus": 94, "loc": 0x49, "attr": "hwmon"},
+                {"id": "lm75_4", "name": "lm75", "bus": 102, "loc": 0x48, "attr": "hwmon"},
+                {"id": "lm75_5", "name": "lm75", "bus": 117, "loc": 0x4b, "attr": "hwmon"},
+                {"id": "lm75_6", "name": "lm75", "bus": 118, "loc": 0x4f, "attr": "hwmon"},
+                {"id": "lm75_7", "name": "lm75", "bus": 198, "loc": 0x4b, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "mac_bsc",
+            "device": [
+                {"id": "mac_bsc_1", "name": "wb_mac_bsc_th4", "bus": 122, "loc": 0x44, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name":"tmp411",
+            "device":[
+                {"id":"tmp411_1", "name":"tmp411","bus":119, "loc":0x4c, "attr":"hwmon"},
+                {"id":"tmp411_2", "name":"tmp411","bus":120, "loc":0x4c, "attr":"hwmon"},
+            ],
+        },
+        {
+            "name": "ina3221",
+            "device": [
+                {"id": "ina3221_1", "name": "ina3221", "bus": 78, "loc": 0x43, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "tps53622",
+            "device": [
+                {"id": "tps53622_1", "name": "tps53688", "bus": 78, "loc": 0x67, "attr": "hwmon"},
+                {"id": "tps53622_2", "name": "tps53688", "bus": 78, "loc": 0x6c, "attr": "hwmon"},
+                {"id": "tps53622_3", "name": "tps53688", "bus": 131, "loc": 0x67, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "ucd90160",
+            "device": [
+                {"id": "ucd90160_1", "name": "ucd90160", "bus": 77, "loc": 0x5b, "attr": "hwmon"},
+                {"id": "ucd90160_2", "name": "ucd90160", "bus": 128, "loc": 0x5b, "attr": "hwmon"},
+                {"id": "ucd90160_3", "name": "ucd90160", "bus": 129, "loc": 0x5b, "attr": "hwmon"},
+                {"id": "ucd90160_4", "name": "ucd90160", "bus": 130, "loc": 0x5b, "attr": "hwmon"},
+            ],
+        },
+    ],
+}
+
+MANUINFO_CONF = {
+    "bios": {
+        "key": "BIOS",
+        "head": True,
+        "next": "onie"
+    },
+    "bios_vendor": {
+        "parent": "bios",
+        "key": "Vendor",
+        "cmd": "dmidecode -t 0 |grep Vendor",
+        "pattern": r".*Vendor",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "bios_version": {
+        "parent": "bios",
+        "key": "Version",
+        "cmd": "dmidecode -t 0 |grep Version",
+        "pattern": r".*Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "bios_date": {
+        "parent": "bios",
+        "key": "Release Date",
+        "cmd": "dmidecode -t 0 |grep Release",
+        "pattern": r".*Release Date",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+    "onie": {
+        "key": "ONIE",
+        "next": "cpu"
+    },
+    "onie_date": {
+        "parent": "onie",
+        "key": "Build Date",
+        "file": "/host/machine.conf",
+        "pattern": r"^onie_build_date",
+        "separator": "=",
+        "arrt_index": 1,
+    },
+    "onie_version": {
+        "parent": "onie",
+        "key": "Version",
+        "file": "/host/machine.conf",
+        "pattern": r"^onie_version",
+        "separator": "=",
+        "arrt_index": 2,
+    },
+
+    "cpu": {
+        "key": "CPU",
+        "next": "ssd"
+    },
+    "cpu_vendor": {
+        "parent": "cpu",
+        "key": "Vendor",
+        "cmd": "dmidecode --type processor |grep Manufacturer",
+        "pattern": r".*Manufacturer",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "cpu_model": {
+        "parent": "cpu",
+        "key": "Device Model",
+        "cmd": "dmidecode --type processor | grep Version",
+        "pattern": r".*Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "cpu_core": {
+        "parent": "cpu",
+        "key": "Core Count",
+        "cmd": "dmidecode --type processor | grep \"Core Count\"",
+        "pattern": r".*Core Count",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+    "cpu_thread": {
+        "parent": "cpu",
+        "key": "Thread Count",
+        "cmd": "dmidecode --type processor | grep \"Thread Count\"",
+        "pattern": r".*Thread Count",
+        "separator": ":",
+        "arrt_index": 4,
+    },
+    "ssd": {
+        "key": "SSD",
+        "next": "cpld"
+    },
+    "ssd_model": {
+        "parent": "ssd",
+        "key": "Device Model",
+        "cmd": "smartctl -i /dev/sda |grep \"Device Model\"",
+        "pattern": r".*Device Model",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "ssd_fw": {
+        "parent": "ssd",
+        "key": "Firmware Version",
+        "cmd": "smartctl -i /dev/sda |grep \"Firmware Version\"",
+        "pattern": r".*Firmware Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "ssd_user_cap": {
+        "parent": "ssd",
+        "key": "User Capacity",
+        "cmd": "smartctl -i /dev/sda |grep \"User Capacity\"",
+        "pattern": r".*User Capacity",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+
+    "cpld": {
+        "key": "CPLD",
+        "next": "psu"
+    },
+
+    "cpld1": {
+        "key": "CPLD1",
+        "parent": "cpld",
+        "arrt_index": 1,
+    },
+    "cpld1_model": {
+        "key": "Device Model",
+        "parent": "cpld1",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld1_vender": {
+        "key": "Vendor",
+        "parent": "cpld1",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld1_desc": {
+        "key": "Description",
+        "parent": "cpld1",
+        "config": "CPU_CPLD",
+        "arrt_index": 3,
+    },
+    "cpld1_version": {
+        "key": "Firmware Version",
+        "parent": "cpld1",
+        "reg": {
+            "loc": "/dev/port",
+            "offset": 0x700,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+    "cpld2": {
+        "key": "CPLD2",
+        "parent": "cpld",
+        "arrt_index": 2,
+    },
+    "cpld2_model": {
+        "key": "Device Model",
+        "parent": "cpld2",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld2_vender": {
+        "key": "Vendor",
+        "parent": "cpld2",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld2_desc": {
+        "key": "Description",
+        "parent": "cpld2",
+        "config": "CONNECT_CPLD",
+        "arrt_index": 3,
+    },
+    "cpld2_version": {
+        "key": "Firmware Version",
+        "parent": "cpld2",
+        "reg": {
+            "loc": "/dev/port",
+            "offset": 0x900,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld3": {
+        "key": "CPLD3",
+        "parent": "cpld",
+        "arrt_index": 3,
+    },
+    "cpld3_model": {
+        "key": "Device Model",
+        "parent": "cpld3",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld3_vender": {
+        "key": "Vendor",
+        "parent": "cpld3",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld3_desc": {
+        "key": "Description",
+        "parent": "cpld3",
+        "config": "MAC_CPLDA",
+        "arrt_index": 3,
+    },
+    "cpld3_version": {
+        "key": "Firmware Version",
+        "parent": "cpld3",
+        "i2c": {
+            "bus": "109",
+            "loc": "0x1d",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld4": {
+        "key": "CPLD4",
+        "parent": "cpld",
+        "arrt_index": 4,
+    },
+    "cpld4_model": {
+        "key": "Device Model",
+        "parent": "cpld4",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld4_vender": {
+        "key": "Vendor",
+        "parent": "cpld4",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld4_desc": {
+        "key": "Description",
+        "parent": "cpld4",
+        "config": "MAC_CPLDB",
+        "arrt_index": 3,
+    },
+    "cpld4_version": {
+        "key": "Firmware Version",
+        "parent": "cpld4",
+        "i2c": {
+            "bus": "110",
+            "loc": "0x2d",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld5": {
+        "key": "CPLD5",
+        "parent": "cpld",
+        "arrt_index": 5,
+    },
+    "cpld5_model": {
+        "key": "Device Model",
+        "parent": "cpld5",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld5_vender": {
+        "key": "Vendor",
+        "parent": "cpld5",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld5_desc": {
+        "key": "Description",
+        "parent": "cpld5",
+        "config": "PORT_CPLDA",
+        "arrt_index": 3,
+    },
+    "cpld5_version": {
+        "key": "Firmware Version",
+        "parent": "cpld5",
+        "i2c": {
+            "bus": "111",
+            "loc": "0x3d",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld6": {
+        "key": "CPLD6",
+        "parent": "cpld",
+        "arrt_index": 6,
+    },
+    "cpld6_model": {
+        "key": "Device Model",
+        "parent": "cpld6",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld6_vender": {
+        "key": "Vendor",
+        "parent": "cpld6",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld6_desc": {
+        "key": "Description",
+        "parent": "cpld6",
+        "config": "PORT_CPLDB",
+        "arrt_index": 3,
+    },
+    "cpld6_version": {
+        "key": "Firmware Version",
+        "parent": "cpld6",
+        "i2c": {
+            "bus": "112",
+            "loc": "0x4d",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld7": {
+        "key": "CPLD7",
+        "parent": "cpld",
+        "arrt_index": 7,
+    },
+    "cpld7_model": {
+        "key": "Device Model",
+        "parent": "cpld7",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld7_vender": {
+        "key": "Vendor",
+        "parent": "cpld7",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld7_desc": {
+        "key": "Description",
+        "parent": "cpld7",
+        "config": "FAN_CPLDA",
+        "arrt_index": 3,
+    },
+    "cpld7_version": {
+        "key": "Firmware Version",
+        "parent": "cpld7",
+        "i2c": {
+            "bus": "92",
+            "loc": "0x0d",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld8": {
+        "key": "CPLD8",
+        "parent": "cpld",
+        "arrt_index": 8,
+    },
+    "cpld8_model": {
+        "key": "Device Model",
+        "parent": "cpld8",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld8_vender": {
+        "key": "Vendor",
+        "parent": "cpld8",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld8_desc": {
+        "key": "Description",
+        "parent": "cpld8",
+        "config": "FAN_CPLDB",
+        "arrt_index": 3,
+    },
+    "cpld8_version": {
+        "key": "Firmware Version",
+        "parent": "cpld8",
+        "i2c": {
+            "bus": "101",
+            "loc": "0x0d",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "psu": {
+        "key": "PSU",
+        "next": "fan"
+    },
+
+    "psu1": {
+        "parent": "psu",
+        "key": "PSU1",
+        "arrt_index": 1,
+    },
+    "psu1_hw_version": {
+        "key": "Hardware Version",
+        "parent": "psu1",
+        "extra": {
+            "funcname": "getPsu",
+            "id": "psu1",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "psu1_fw_version": {
+        "key": "Firmware Version",
+        "parent": "psu1",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "psu2": {
+        "parent": "psu",
+        "key": "PSU2",
+        "arrt_index": 2,
+    },
+    "psu2_hw_version": {
+        "key": "Hardware Version",
+        "parent": "psu2",
+        "extra": {
+            "funcname": "getPsu",
+            "id": "psu2",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "psu2_fw_version": {
+        "key": "Firmware Version",
+        "parent": "psu2",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+    "psu3": {
+        "parent": "psu",
+        "key": "PSU3",
+        "arrt_index": 3,
+    },
+    "psu3_hw_version": {
+        "key": "Hardware Version",
+        "parent": "psu3",
+        "extra": {
+            "funcname": "getPsu",
+            "id": "psu3",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "psu3_fw_version": {
+        "key": "Firmware Version",
+        "parent": "psu3",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "psu4": {
+        "parent": "psu",
+        "key": "PSU4",
+        "arrt_index": 4,
+    },
+    "psu4_hw_version": {
+        "key": "Hardware Version",
+        "parent": "psu4",
+        "extra": {
+            "funcname": "getPsu",
+            "id": "psu4",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "psu4_fw_version": {
+        "key": "Firmware Version",
+        "parent": "psu4",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan": {
+        "key": "FAN",
+        "next": "i210"
+    },
+    "fan1": {
+        "key": "FAN1",
+        "parent": "fan",
+        "arrt_index": 1,
+    },
+    "fan1_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan1",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan1",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan1_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan1",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan2": {
+        "key": "FAN2",
+        "parent": "fan",
+        "arrt_index": 2,
+    },
+    "fan2_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan2",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan2",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan2_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan2",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan3": {
+        "key": "FAN3",
+        "parent": "fan",
+        "arrt_index": 3,
+    },
+    "fan3_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan3",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan3",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan3_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan3",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan4": {
+        "key": "FAN4",
+        "parent": "fan",
+        "arrt_index": 4,
+    },
+    "fan4_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan4",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan4",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan4_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan4",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan5": {
+        "key": "FAN5",
+        "parent": "fan",
+        "arrt_index": 5,
+    },
+    "fan5_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan5",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan5",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan5_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan5",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan6": {
+        "key": "FAN6",
+        "parent": "fan",
+        "arrt_index": 6,
+    },
+    "fan6_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan6",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan6",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan6_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan6",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan7": {
+        "key": "FAN7",
+        "parent": "fan",
+        "arrt_index": 7,
+    },
+    "fan7_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan7",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan7",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan7_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan7",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan8": {
+        "key": "FAN8",
+        "parent": "fan",
+        "arrt_index": 8,
+    },
+    "fan8_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan8",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan8",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan8_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan8",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "i210": {
+        "key": "NIC",
+        "next": "fpga"
+    },
+    "i210_model": {
+        "parent": "i210",
+        "config": "NA",
+        "key": "Device Model",
+        "arrt_index": 1,
+    },
+    "i210_vendor": {
+        "parent": "i210",
+        "config": "INTEL",
+        "key": "Vendor",
+        "arrt_index": 2,
+    },
+    "i210_version": {
+        "parent": "i210",
+        "cmd": "ethtool -i eth0",
+        "pattern": r"firmware-version",
+        "separator": ":",
+        "key": "Firmware Version",
+        "arrt_index": 3,
+    },
+
+    "fpga": {
+        "key": "FPGA",
+    },
+
+    "fpga1": {
+        "key": "FPGA1",
+        "parent": "fpga",
+        "arrt_index": 1,
+    },
+    "fpga1_model": {
+        "parent": "fpga1",
+        "config": "XC7A100T-2FGG484C",
+        "key": "Device Model",
+        "arrt_index": 1,
+    },
+    "fpga1_vender": {
+        "parent": "fpga1",
+        "config": "XILINX",
+        "key": "Vendor",
+        "arrt_index": 2,
+    },
+    "fpga1_desc": {
+        "key": "Description",
+        "parent": "fpga1",
+        "config": "MAC_FPGA",
+        "arrt_index": 3,
+    },
+    "fpga1_hw_version": {
+        "parent": "fpga1",
+        "config": "NA",
+        "key": "Hardware Version",
+        "arrt_index": 4,
+    },
+    "fpga1_fw_version": {
+        "parent": "fpga1",
+        "pci": {
+            "bus": 8,
+            "slot": 0,
+            "fn": 0,
+            "bar": 0,
+            "offset": 0
+        },
+        "key": "Firmware Version",
+        "arrt_index": 5,
+    },
+    "fpga1_date": {
+        "parent": "fpga1",
+        "pci": {
+            "bus": 8,
+            "slot": 0,
+            "fn": 0,
+            "bar": 0,
+            "offset": 4
+        },
+        "key": "Build Date",
+        "arrt_index": 6,
+    },
+    "fpga2": {
+        "key": "FPGA2",
+        "parent": "fpga",
+        "arrt_index": 2,
+    },
+    "fpga2_model": {
+        "parent": "fpga2",
+        "config": "XC7A100T-2FGG484C",
+        "key": "Device Model",
+        "arrt_index": 1,
+    },
+    "fpga2_vender": {
+        "parent": "fpga2",
+        "config": "XILINX",
+        "key": "Vendor",
+        "arrt_index": 2,
+    },
+    "fpga2_desc": {
+        "key": "Description",
+        "parent": "fpga2",
+        "config": "PORT_FPGA",
+        "arrt_index": 3,
+    },
+    "fpga2_hw_version": {
+        "parent": "fpga2",
+        "config": "NA",
+        "key": "Hardware Version",
+        "arrt_index": 4,
+    },
+    "fpga2_fw_version": {
+        "parent": "fpga2",
+        "devfile": {
+            "loc": "/dev/fpga1",
+            "offset": 0,
+            "len": 4,
+            "bit_width": 4
+        },
+        "key": "Firmware Version",
+        "arrt_index": 5,
+    },
+    "fpga2_date": {
+        "parent": "fpga2",
+        "devfile": {
+            "loc": "/dev/fpga1",
+            "offset": 4,
+            "len": 4,
+            "bit_width": 4
+        },
+        "key": "Build Date",
+        "arrt_index": 6,
+    },
+    "others": {
+        "key": "OTHERS",
+    },
+    "5387": {
+        "parent": "others",
+        "key": "CPU-BMC-SWITCH",
+        "arrt_index": 1,
+    },
+    "5387_model": {
+        "parent": "5387",
+        "config": "BCM5387",
+        "key": "Device Model",
+        "arrt_index": 1,
+    },
+    "5387_vendor": {
+        "parent": "5387",
+        "config": "Broadcom",
+        "key": "Vendor",
+        "arrt_index": 2,
+    },
+    "5387_hw_version": {
+        "parent": "5387",
+        "key": "Hardware Version",
+        "func": {
+            "funcname": "get_bcm5387_version",
+            "params": {
+                "before": [
+                    # OE pull high
+                    {"gettype": "cmd", "cmd": "echo 50 > /sys/class/gpio/export"},
+                    {"gettype": "cmd", "cmd": "echo high > /sys/class/gpio/gpio50/direction"},
+                    # SEL1 set high
+                    {"gettype": "cmd", "cmd": "echo 48 > /sys/class/gpio/export"},
+                    {"gettype": "cmd", "cmd": "echo high > /sys/class/gpio/gpio48/direction"},
+                    # select update 5387
+                    {"gettype": "io", "io_addr": 0x918, "value": 0x06},
+                    # enable 5387
+                    {"gettype": "io", "io_addr": 0x943, "value": 0x00},
+                    {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio"},
+                    {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio_device sck=65 miso=32 mosi=67 bus=0"},
+                    {"gettype": "cmd", "cmd": "modprobe wb_spi_93xx46 spi_bus_num=0 spi_cs_gpio=6"},
+                ],
+                "get_version": "md5sum /sys/bus/spi/devices/spi0.0/eeprom | awk '{print $1}'",
+                "after": [
+                    {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio48/value"},
+                    {"gettype": "cmd", "cmd": "echo 48 > /sys/class/gpio/unexport"},
+                    {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio50/value"},
+                    {"gettype": "cmd", "cmd": "echo 50 > /sys/class/gpio/unexport"},
+                ],
+                "finally": [
+                    {"gettype": "cmd", "cmd": "rmmod wb_spi_93xx46"},
+                    {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio_device"},
+                    {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio"},
+                    {"gettype": "io", "io_addr": 0x943, "value": 0x01},
+                    {"gettype": "io", "io_addr": 0x918, "value": 0x00},
+                ],
+            },
+        },
+        "arrt_index": 3,
+    },
+}
+
+PMON_SYSLOG_STATUS = {
+    "polling_time": 3,
+    "sffs": {
+        "present": {"path": ["/sys/wb_plat/sff/*/present"], "ABSENT": 0},
+        "nochangedmsgflag": 0,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 1,
+        "alias": {
+            "sff1": "Ethernet1",
+            "sff2": "Ethernet2",
+            "sff3": "Ethernet3",
+            "sff4": "Ethernet4",
+            "sff5": "Ethernet5",
+            "sff6": "Ethernet6",
+            "sff7": "Ethernet7",
+            "sff8": "Ethernet8",
+            "sff9": "Ethernet9",
+            "sff10": "Ethernet10",
+            "sff11": "Ethernet11",
+            "sff12": "Ethernet12",
+            "sff13": "Ethernet13",
+            "sff14": "Ethernet14",
+            "sff15": "Ethernet15",
+            "sff16": "Ethernet16",
+            "sff17": "Ethernet17",
+            "sff18": "Ethernet18",
+            "sff19": "Ethernet19",
+            "sff20": "Ethernet20",
+            "sff21": "Ethernet21",
+            "sff22": "Ethernet22",
+            "sff23": "Ethernet23",
+            "sff24": "Ethernet24",
+            "sff25": "Ethernet25",
+            "sff26": "Ethernet26",
+            "sff27": "Ethernet27",
+            "sff28": "Ethernet28",
+            "sff29": "Ethernet29",
+            "sff30": "Ethernet30",
+            "sff31": "Ethernet31",
+            "sff32": "Ethernet32",
+            "sff33": "Ethernet33",
+            "sff34": "Ethernet34",
+            "sff35": "Ethernet35",
+            "sff36": "Ethernet36",
+            "sff37": "Ethernet37",
+            "sff38": "Ethernet38",
+            "sff39": "Ethernet39",
+            "sff40": "Ethernet40",
+            "sff41": "Ethernet41",
+            "sff42": "Ethernet42",
+            "sff43": "Ethernet43",
+            "sff44": "Ethernet44",
+            "sff45": "Ethernet45",
+            "sff46": "Ethernet46",
+            "sff47": "Ethernet47",
+            "sff48": "Ethernet48",
+            "sff49": "Ethernet49",
+            "sff50": "Ethernet50",
+            "sff51": "Ethernet51",
+            "sff52": "Ethernet52",
+            "sff53": "Ethernet53",
+            "sff54": "Ethernet54",
+            "sff55": "Ethernet55",
+            "sff56": "Ethernet56",
+            "sff57": "Ethernet57",
+            "sff58": "Ethernet58",
+            "sff59": "Ethernet59",
+            "sff60": "Ethernet60",
+            "sff61": "Ethernet61",
+            "sff62": "Ethernet62",
+            "sff63": "Ethernet63",
+            "sff64": "Ethernet64",
+        }
+    },
+    "fans": {
+        "present": {"path": ["/sys/wb_plat/fan/*/present"], "ABSENT": 0},
+        "status": [
+            {"path": "/sys/wb_plat/fan/%s/motor0/status", 'okval': 1},
+        ],
+        "nochangedmsgflag": 1,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 0,
+        "alias": {
+            "fan1": "FAN1",
+            "fan2": "FAN2",
+            "fan3": "FAN3",
+            "fan4": "FAN4",
+            "fan5": "FAN5",
+            "fan6": "FAN6",
+            "fan7": "FAN7",
+            "fan8": "FAN8",
+        }
+    },
+    "psus": {
+        "present": {"path": ["/sys/wb_plat/psu/*/present"], "ABSENT": 0},
+        "status": [
+            {"path": "/sys/wb_plat/psu/%s/output", "okval": 1},
+            {"path": "/sys/wb_plat/psu/%s/alert", "okval": 0},
+        ],
+        "nochangedmsgflag": 1,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 0,
+        "alias": {
+            "psu1": "PSU1",
+            "psu2": "PSU2",
+            "psu3": "PSU3",
+            "psu4": "PSU4"
+        }
+    }
+}
+
+REBOOT_CAUSE_PARA = {
+    "reboot_cause_list": [
+        {
+            "name": "cold_reboot",
+            "monitor_point": {"gettype": "io", "io_addr": 0x910, "okval": 0},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Power Loss, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Power Loss, ",
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+            ]
+        },
+        {
+            "name": "wdt_reboot",
+            "monitor_point": {"gettype": "io", "io_addr": 0x91a, "okval": 1},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Watchdog, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Watchdog, ", 
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size":1*1024*1024}
+            ],
+            "finish_operation": [
+                {"gettype": "io", "io_addr": 0x919, "value": 0xfc},
+            ]
+        },
+        {
+            "name": "bmc_reboot",
+            "monitor_point": {"gettype": "io", "io_addr": 0x91b, "okval": 1},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "BMC reboot, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "BMC reboot, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+            ],
+            "finish_operation": [
+                {"gettype": "io", "io_addr": 0x919, "value": 0xfa},
+            ]
+        },
+        {
+            "name": "bmc_powerdown",
+            "monitor_point": {"gettype": "io", "io_addr": 0x91c, "okval": 1},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "BMC powerdown, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "BMC powerdown, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+            ],
+            "finish_operation": [
+                {"gettype": "io", "io_addr": 0x919, "value": 0xf6},
+            ]
+        },
+        {
+            "name": "otp_switch_reboot",
+            "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ",
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+            ],
+            "finish_operation": [
+                {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"},
+            ]
+        },
+        {
+            "name": "otp_other_reboot",
+            "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ",
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+            ],
+            "finish_operation": [
+                {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"},
+            ]
+        },
+    ],
+    "other_reboot_cause_record": [
+        {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+        {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+    ],
+}
+
+##################### MAC Voltage adjust####################################
+MAC_DEFAULT_PARAM = [
+    {
+        "name": "mac_core",              # AVS name
+        "type": 0,                       # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range
+        "default": 0x82,                 # default value, if rov value not in range
+        "sdkreg": "TOP_AVS_SEL_REG",     # SDK register name
+        "sdktype": 0,                    # 0: No shift operation required, 1: shift operation required
+        "macregloc": 24,                 # Shift right 24 bits
+        "mask": 0xff,                    # Use with macregloc
+        "rov_source": 0,                 # 0: get rov value from cpld, 1: get rov value from SDK
+        "cpld_avs": {"bus": 109, "loc": 0x1d, "offset": 0x24, "gettype": "i2c"},
+        "set_avs": {
+            "loc": "/sys/bus/i2c/devices/126-0010/avs_vout",
+            "gettype": "sysfs", "formula": "int((%f)*1000000)"
+        },
+        "mac_avs_param": {
+            0x7e: 0.90090,
+            0x82: 0.87820,
+            0x86: 0.85640,
+            0x8A: 0.83370,
+            0x8E: 0.80960,
+        }
+    }
+]
+
+BLACKLIST_DRIVERS = [
+    {"name": "i2c_i801", "delay": 0},
+]
+
+DRIVERLISTS = [
+    {"name": "i2c_i801", "delay": 1},
+    {"name": "wb_gpio_d1500", "delay": 0},
+    {"name": "i2c_dev", "delay": 0},
+    {"name": "i2c_algo_bit", "delay": 0},
+    {"name": "i2c_gpio", "delay": 0},
+    {"name": "i2c_mux", "delay": 0},
+    {"name": "wb_gpio_device", "delay": 0},
+    {"name": "wb_i2c_gpio_device gpio_sda=17 gpio_scl=1 gpio_udelay=2", "delay": 0},
+    {"name": "platform_common dfd_my_type=0x20000055", "delay": 0},
+    {"name": "wb_fpga_pcie", "delay": 0},
+    {"name": "wb_pcie_dev", "delay": 0},
+    {"name": "wb_pcie_dev_device", "delay": 0},
+    {"name": "wb_io_dev", "delay": 0},
+    {"name": "wb_i2c_dev", "delay": 0},
+    {"name": "wb_spi_ocores", "delay": 0},
+    {"name": "wb_spi_ocores_device", "delay": 0},
+    {"name": "wb_spi_dev", "delay": 0},
+    {"name": "wb_spi_dev_device", "delay": 0},
+    {"name": "wb_spi_dev_platform_device", "delay": 0},
+    {"name": "wb_lpc_drv", "delay": 0},
+    {"name": "wb_lpc_drv_device", "delay": 0},
+    {"name": "wb_io_dev_device", "delay": 0},
+    {"name": "wb_fpga_i2c_bus_drv", "delay": 0},
+    {"name": "wb_fpga_i2c_bus_device", "delay": 0},
+    {"name": "wb_i2c_mux_pca9641", "delay": 0},
+    {"name": "wb_i2c_mux_pca954x", "delay": 0},
+    {"name": "wb_i2c_mux_pca954x_device", "delay": 0},
+    {"name": "wb_fpga_pca954x_drv", "delay": 0},
+    {"name": "wb_fpga_pca954x_device", "delay": 0},
+    {"name": "wb_i2c_dev_device", "delay": 0},
+    {"name": "wb_wdt", "delay": 0},
+    {"name": "lm75", "delay": 0},
+    {"name": "tmp401", "delay": 0},
+    {"name": "optoe", "delay": 0},
+    {"name": "at24", "delay": 0},
+    {"name": "wb_mac_bsc", "delay": 0},
+    {"name": "pmbus_core", "delay": 0},
+    {"name": "wb_csu550", "delay": 0},
+    {"name": "ina3221", "delay": 0},
+    {"name": "tps53679", "delay": 0},
+    {"name": "ucd9000", "delay": 0},
+    {"name": "wb_xdpe132g5c", "delay": 0},
+    {"name": "plat_dfd", "delay": 0},
+    {"name": "plat_switch", "delay": 0},
+    {"name": "plat_fan", "delay": 0},
+    {"name": "plat_psu", "delay": 0},
+    {"name": "plat_sff", "delay": 0},
+    {"name": "wb_spi_master", "delay": 0},
+]
+
+DEVICE = [
+    {"name": "24c02", "bus": 1, "loc": 0x56},
+    {"name": "wb_mac_bsc_th4", "bus": 122, "loc": 0x44},
+    # fan
+    {"name": "24c64", "bus": 95, "loc": 0x50},
+    {"name": "24c64", "bus": 96, "loc": 0x50},
+    {"name": "24c64", "bus": 97, "loc": 0x50},
+    {"name": "24c64", "bus": 98, "loc": 0x50},
+    {"name": "24c64", "bus": 104, "loc": 0x50},
+    {"name": "24c64", "bus": 105, "loc": 0x50},
+    {"name": "24c64", "bus": 106, "loc": 0x50},
+    {"name": "24c64", "bus": 107, "loc": 0x50},
+    # psu
+    {"name": "24c02", "bus": 83, "loc": 0x50},
+    {"name": "wb_fsp1200", "bus": 83, "loc": 0x58},
+    {"name": "24c02", "bus": 84, "loc": 0x50},
+    {"name": "wb_fsp1200", "bus": 84, "loc": 0x58},
+    {"name": "24c02", "bus": 86, "loc": 0x50},
+    {"name": "wb_fsp1200", "bus": 86, "loc": 0x58},
+    {"name": "24c02", "bus": 85, "loc": 0x50},
+    {"name": "wb_fsp1200", "bus": 85, "loc": 0x58},
+    # temp
+    {"name": "lm75", "bus": 79, "loc": 0x4b},
+    {"name": "lm75", "bus": 93, "loc": 0x48},
+    {"name": "lm75", "bus": 94, "loc": 0x49},
+    {"name": "lm75", "bus": 102, "loc": 0x48},
+    {"name": "lm75", "bus": 103, "loc": 0x49},
+    {"name": "lm75", "bus": 117, "loc": 0x4b},
+    {"name": "lm75", "bus": 118, "loc": 0x4f},
+    {"name": "tmp411", "bus": 119, "loc": 0x4c},
+    {"name": "tmp411", "bus": 120, "loc": 0x4c},
+    {"name": "lm75", "bus": 198, "loc": 0x4b},
+    #dcdc
+    {"name": "ucd90160", "bus": 77, "loc": 0x5b},
+    {"name": "tps53688", "bus": 78, "loc": 0x67},
+    {"name": "tps53688", "bus": 78, "loc": 0x6c},
+    {"name": "ina3221", "bus": 78, "loc": 0x43},
+    {"name": "ucd90160", "bus": 128, "loc": 0x5b},
+    {"name": "ucd90160", "bus": 129, "loc": 0x5b},
+    {"name": "ucd90160", "bus": 130, "loc": 0x5b},
+    {"name": "tps53688", "bus": 131, "loc": 0x67},
+    #avs
+    {"name": "wb_xdpe132g5c", "bus": 126, "loc": 0x10},
+]
+
+OPTOE = [
+    {"name": "optoe3", "startbus": 133, "endbus": 196},
+]
+
+REBOOT_CTRL_PARAM = {
+    "cpu": {"io_addr": 0x920, "rst_val": 0xfe, "rst_delay": 0, "gettype": "io"},
+    "mac": {"bus": 109, "loc": 0x1d, "offset": 0x11, "rst_val": 0xfd, "rst_delay": 0, "gettype": "i2c"},
+    "phy": {"io_addr": 0x921, "rst_val": 0xef, "rst_delay": 1, "unlock_rst_val": 0xff, "unlock_rst_delay": 1, "gettype": "io"},
+    "power": {"io_addr": 0x923, "rst_val": 0x01, "rst_delay": 0, "gettype": "io"},
+}
+
+# INIT_PARAM_PRE = [
+#     {"loc": "126-0010/avs_vout_max", "value": "900900"},
+#     {"loc": "126-0010/avs_vout_min", "value": "809600"},
+# ]
+
+INIT_PARAM = []
+
+INIT_COMMAND_PRE = [
+    # sfp power enable
+    "dfd_debug io_wr 0x939 0x01",
+    "i2cset -f -y 109 0x1d 0x73 0xff",
+    "i2cset -f -y 110 0x2d 0x79 0xff",
+    "i2cset -f -y 110 0x2d 0x7a 0xff",
+    "i2cset -f -y 110 0x2d 0x7b 0xff",
+    "i2cset -f -y 111 0x3d 0x76 0xff",
+    "i2cset -f -y 111 0x3d 0x77 0xff",
+    "i2cset -f -y 112 0x4d 0x79 0xff",
+    "i2cset -f -y 112 0x4d 0x7a 0xff",
+    "i2cset -f -y 112 0x4d 0x7b 0xff",
+    # enable tty_console monitor
+    "dfd_debug io_wr 0x966 0x01",
+]
+
+INIT_COMMAND = [
+    # enable led
+    "i2cset -f -y 109 0x1d 0xc4 0x1",
+    "i2cset -f -y 110 0x2d 0xcc 0x1",
+    "i2cset -f -y 111 0x3d 0xc8 0x1",
+    "i2cset -f -y 112 0x4d 0xc9 0x1",
+
+    # port led off
+    #MAC CPLD_U14 register: 
+    #port 50, 49, 54, 53, 58, 57, 62, 61
+    "i2cset -f -y 109 0x1d 0xc0 0xff",
+    "i2cset -f -y 109 0x1d 0xc1 0xff",
+    "i2cset -f -y 109 0x1d 0xc2 0xff",
+    "i2cset -f -y 109 0x1d 0xc3 0xff",
+
+    #MAC CPLD_U14 register:
+    #port 2, 1, 6, 5, 10, 9, 14, 13, 18, 17, 22, 21, 26, 25, 30, 29, 34, 33, 37, 38, 42, 41, 46, 45
+    "i2cset -f -y 110 0x2d 0xc0 0xff",
+    "i2cset -f -y 110 0x2d 0xc1 0xff",
+    "i2cset -f -y 110 0x2d 0xc2 0xff",
+    "i2cset -f -y 110 0x2d 0xc3 0xff",
+    "i2cset -f -y 110 0x2d 0xc4 0xff",
+    "i2cset -f -y 110 0x2d 0xc5 0xff",
+    "i2cset -f -y 110 0x2d 0xc6 0xff",
+    "i2cset -f -y 110 0x2d 0xc7 0xff",
+    "i2cset -f -y 110 0x2d 0xc8 0xff",
+    "i2cset -f -y 110 0x2d 0xc9 0xff",
+    "i2cset -f -y 110 0x2d 0xca 0xff",
+    "i2cset -f -y 110 0x2d 0xcb 0xff",
+    
+    #PORT CPLD_U5 register:
+    #port:4, 3, 8, 7, 12, 11, 16, 15, 23, 20, 27, 24, 31, 28, 32
+    "i2cset -f -y 111 0x3d 0xc0 0xff",
+    "i2cset -f -y 111 0x3d 0xc1 0xff",
+    "i2cset -f -y 111 0x3d 0xc2 0xff",
+    "i2cset -f -y 111 0x3d 0xc3 0xff",
+    "i2cset -f -y 111 0x3d 0xc4 0xff",
+    "i2cset -f -y 111 0x3d 0xc5 0xff",
+    "i2cset -f -y 111 0x3d 0xc6 0xff",
+    "i2cset -f -y 111 0x3d 0xc7 0xff",
+    
+    #PORT CPLD_U9 register
+    #port: 35, 19, 39, 36, 43, 40, 47, 44, 51, 48, 55, 52, 59, 56, 63, 60, 64
+    "i2cset -f -y 112 0x4d 0xc0 0xff",
+    "i2cset -f -y 112 0x4d 0xc1 0xff",
+    "i2cset -f -y 112 0x4d 0xc2 0xff",
+    "i2cset -f -y 112 0x4d 0xc3 0xff",
+    "i2cset -f -y 112 0x4d 0xc4 0xff",
+    "i2cset -f -y 112 0x4d 0xc5 0xff",
+    "i2cset -f -y 112 0x4d 0xc6 0xff",
+    "i2cset -f -y 112 0x4d 0xc7 0xff",
+    "i2cset -f -y 112 0x4d 0xc8 0xff",
+    "sleep 0.5",
+    
+    #MAC CPLD_U14 register: 
+    #port 50, 49, 54, 53, 58, 57, 62, 61
+    "i2cset -f -y 109 0x1d 0xc0 0x0",
+    "i2cset -f -y 109 0x1d 0xc1 0x0",
+    "i2cset -f -y 109 0x1d 0xc2 0x0",
+    "i2cset -f -y 109 0x1d 0xc3 0x0",
+    
+    #MAC CPLD_U14 register:
+    #port 2, 1, 6, 5, 10, 9, 14, 13, 18, 17, 22, 21, 26, 25, 30, 29, 34, 33, 37, 38, 42, 41, 46, 45
+    "i2cset -f -y 110 0x2d 0xc0 0x0",
+    "i2cset -f -y 110 0x2d 0xc1 0x0",
+    "i2cset -f -y 110 0x2d 0xc2 0x0",
+    "i2cset -f -y 110 0x2d 0xc3 0x0",
+    "i2cset -f -y 110 0x2d 0xc4 0x0",
+    "i2cset -f -y 110 0x2d 0xc5 0x0",
+    "i2cset -f -y 110 0x2d 0xc6 0x0",
+    "i2cset -f -y 110 0x2d 0xc7 0x0",
+    "i2cset -f -y 110 0x2d 0xc8 0x0",
+    "i2cset -f -y 110 0x2d 0xc9 0x0",
+    "i2cset -f -y 110 0x2d 0xca 0x0",
+    "i2cset -f -y 110 0x2d 0xcb 0x0",
+    
+    #PORT CPLD_U5 register
+    #port:4, 3, 8, 7, 12, 11, 16, 15, 23, 20, 27, 24, 31, 28, 32
+    "i2cset -f -y 111 0x3d 0xc0 0x0",
+    "i2cset -f -y 111 0x3d 0xc1 0x0",
+    "i2cset -f -y 111 0x3d 0xc2 0x0",
+    "i2cset -f -y 111 0x3d 0xc3 0x0",
+    "i2cset -f -y 111 0x3d 0xc4 0x0",
+    "i2cset -f -y 111 0x3d 0xc5 0x0",
+    "i2cset -f -y 111 0x3d 0xc6 0x0",
+    "i2cset -f -y 111 0x3d 0xc7 0x0",
+    
+    #PORT CPLD_U9 register
+    #port: 35, 19, 39, 36, 43, 40, 47, 44, 51, 48, 55, 52, 59, 56, 63, 60, 64
+    "i2cset -f -y 112 0x4d 0xc0 0x0",
+    "i2cset -f -y 112 0x4d 0xc1 0x0",
+    "i2cset -f -y 112 0x4d 0xc2 0x0",
+    "i2cset -f -y 112 0x4d 0xc3 0x0",
+    "i2cset -f -y 112 0x4d 0xc4 0x0",
+    "i2cset -f -y 112 0x4d 0xc5 0x0",
+    "i2cset -f -y 112 0x4d 0xc6 0x0",
+    "i2cset -f -y 112 0x4d 0xc7 0x0",
+    "i2cset -f -y 112 0x4d 0xc8 0x0",
+    ]
+
+WARM_UPGRADE_PARAM = {
+    "slot0": {
+        "VME": {
+            "chain1": [
+                {"name": "BASE_CPLD",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/base_cpld_u55_transf_header.vme",
+                    "init_cmd": [
+                        {"bus": 109, "loc": 0x1d, "offset": 0x1c, "value": 0xff, "gettype": "i2c"},
+                        {"io_addr": 0x916, "value": 0, "gettype": "io"},
+                    ],
+                    "rw_recover_reg": [
+                        {"io_addr": 0x918, "value": None, "gettype": "io"},
+                        {"io_addr": 0x929, "value": None, "gettype": "io"},
+                        {"io_addr": 0x940, "value": None, "gettype": "io"},
+                        {"io_addr": 0x941, "value": None, "gettype": "io"},
+                        {"io_addr": 0x942, "value": None, "gettype": "io"},
+                        {"io_addr": 0x943, "value": None, "gettype": "io"},
+                        {"io_addr": 0x944, "value": None, "gettype": "io"},
+                        {"io_addr": 0x945, "value": None, "gettype": "io"},
+                        {"io_addr": 0x946, "value": None, "gettype": "io"},
+                        {"io_addr": 0x948, "value": None, "gettype": "io"},
+                        {"io_addr": 0x949, "value": None, "gettype": "io"},
+                        {"io_addr": 0x94a, "value": None, "gettype": "io"},
+                        {"io_addr": 0x953, "value": None, "gettype": "io"},
+                        {"io_addr": 0x954, "value": None, "gettype": "io"},
+                        {"io_addr": 0x955, "value": None, "gettype": "io"},
+                        {"io_addr": 0x958, "value": None, "gettype": "io"},
+                        {"io_addr": 0x959, "value": None, "gettype": "io"},
+                        {"io_addr": 0x960, "value": None, "gettype": "io"},
+                        {"io_addr": 0x961, "value": None, "gettype": "io"},
+                        {"io_addr": 0x962, "value": None, "gettype": "io"},
+                        {"io_addr": 0x963, "value": None, "gettype": "io"},
+                    ],
+                    "after_upgrade_delay": 30,
+                    "after_upgrade_delay_timeout": 60,
+                    "refresh_finish_flag_check": {"io_addr": 0x91d, "value": 0x5a, "gettype": "io"},
+                    "access_check_reg": {"io_addr": 0x955, "value": 0xaa, "gettype": "io"},
+                    "finish_cmd": [
+                        {"bus": 109, "loc": 0x1d, "offset": 0x1c, "value": 0, "gettype": "i2c"},
+                    ],
+                 },
+            ],
+
+            "chain2": [
+                {"name": "FAN_CPLD_1",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/ufan_cpld_u13_transf_header.vme",
+                    "rw_recover_reg": [],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 30,
+                    "access_check_reg": {"bus": 92, "loc": 0x0d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"},
+                 },
+            ],
+
+            "chain3": [
+                {"name": "FAN_CPLD_2",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/dfan_cpld_u13_transf_header.vme",
+                    "rw_recover_reg": [],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 30,
+                    "access_check_reg": {"bus": 101, "loc": 0x0d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"},
+                 },
+            ],
+
+            "chain4": [
+                {"name": "MAC_CPLD_1",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/mac_cpld_u14_transf_header.vme",
+                    "init_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x13, "value": 0xff, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0x18, "value": 0x00, "gettype": "i2c"},
+                    ],
+                    "rw_recover_reg": [
+                        {"bus": 109, "loc": 0x1d, "offset": 0x11, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0x12, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0x13, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0x16, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0x18, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0x1a, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0x1b, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0x1c, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0x21, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0x23, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0x51, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0x52, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0x54, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0x56, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0x57, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0x58, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0x59, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0x5a, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0x70, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0x72, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0x73, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0xaa, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0xc0, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0xc1, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0xc2, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0xc3, "value": None, "gettype": "i2c"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0xc4, "value": None, "gettype": "i2c"},
+                    ],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 30,
+                    "refresh_finish_flag_check": {"bus": 109, "loc": 0x1d, "offset": 0x18, "value": 0x01, "gettype": "i2c"},
+                    "access_check_reg": {"bus": 109, "loc": 0x1d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"},
+                    "finish_cmd": [
+                        {"bus": 110, "loc": 0x2d, "offset": 0x13, "value": 0, "gettype": "i2c"},
+                        {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+                    ],
+                 },
+
+                {"name": "MAC_CPLD_2",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/mac_cpld_u30_transf_header.vme",
+                    "init_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+                        {"bus": 109, "loc": 0x1d, "offset": 0x1b, "value": 0xff, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x11, "value": 0x00, "gettype": "i2c"},
+                    ],
+                    "rw_recover_reg": [
+                        {"bus": 110, "loc": 0x2d, "offset": 0x11, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x13, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x52, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x53, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x54, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x56, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x57, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x58, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x59, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x5a, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x5b, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x5c, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x5d, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x5e, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x70, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x71, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x72, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x76, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x77, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x78, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x79, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x7a, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0x7b, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0xaa, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0xc0, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0xc1, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0xc2, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0xc3, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0xc4, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0xc5, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0xc6, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0xc7, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0xc8, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0xc9, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0xca, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0xcb, "value": None, "gettype": "i2c"},
+                        {"bus": 110, "loc": 0x2d, "offset": 0xcc, "value": None, "gettype": "i2c"},
+                    ],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 30,
+                    "refresh_finish_flag_check": {"bus": 110, "loc": 0x2d, "offset": 0x11, "value": 0x01, "gettype": "i2c"},
+                    "access_check_reg": {"bus": 110, "loc": 0x2d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"},
+                    "finish_cmd": [
+                        {"bus": 109, "loc": 0x1d, "offset": 0x1b, "value": 0, "gettype": "i2c"},
+                        {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+                    ],
+                 },
+            ],
+
+            "chain5": [
+                {"name": "PORT_CPLD_1",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/port_cpld_u5_transf_header.vme",
+                    "init_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x13, "value": 0xff, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x18, "value": 0x00, "gettype": "i2c"},
+                    ],
+                    "rw_recover_reg": [
+                        {"bus": 111, "loc": 0x3d, "offset": 0x11, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x13, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x14, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x15, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x16, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x18, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x1a, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x1b, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x21, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x51, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x53, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x54, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x56, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x57, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x58, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x59, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x5a, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x5b, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x5c, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x70, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x71, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x74, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x75, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x76, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x77, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0xaa, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0xc0, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0xc1, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0xc2, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0xc3, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0xc4, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0xc5, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0xc6, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0xc7, "value": None, "gettype": "i2c"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0xc8, "value": None, "gettype": "i2c"},
+                    ],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 30,
+                    "refresh_finish_flag_check": {"bus": 111, "loc": 0x3d, "offset": 0x18, "value": 0x01, "gettype": "i2c"},
+                    "access_check_reg": {"bus": 111, "loc": 0x3d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"},
+                    "finish_cmd": [
+                        {"bus": 112, "loc": 0x4d, "offset": 0x13, "value": 0, "gettype": "i2c"},
+                        {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+                    ],
+                 },
+
+                {"name": "PORT_CPLD_2",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/port_cpld_u9_transf_header.vme",
+                    "init_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+                        {"bus": 111, "loc": 0x3d, "offset": 0x1b, "value": 0xff, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x11, "value": 0x00, "gettype": "i2c"},
+                    ],
+                    "rw_recover_reg": [
+                        {"bus": 112, "loc": 0x4d, "offset": 0x11, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x13, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x50, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x52, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x53, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x54, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x55, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x56, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x57, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x58, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x59, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x5a, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x5b, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x5c, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x5d, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x5e, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x70, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x71, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x72, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x76, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x77, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x78, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x79, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x7a, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0x7b, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0xaa, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0xc0, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0xc1, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0xc2, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0xc3, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0xc4, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0xc5, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0xc6, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0xc7, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0xc8, "value": None, "gettype": "i2c"},
+                        {"bus": 112, "loc": 0x4d, "offset": 0xc9, "value": None, "gettype": "i2c"},
+
+                    ],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 30,
+                    "refresh_finish_flag_check": {"bus": 112, "loc": 0x4d, "offset": 0x11, "value": 0x01, "gettype": "i2c"},
+                    "access_check_reg": {"bus": 112, "loc": 0x4d, "offset": 0xaa, "value": 0x55, "gettype": "i2c"},
+                    "finish_cmd": [
+                        {"bus": 111, "loc": 0x3d, "offset": 0x1b, "value": 0, "gettype": "i2c"},
+                        {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+                    ],
+                 },
+            ],
+
+            "chain6": [
+                {"name": "CPU_CPLD",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/refresh_cpu_cpld_header.vme",
+                    "init_cmd": [
+                        {"cmd": "echo 7 > /sys/class/gpio/export", "gettype": "cmd"},
+                        {"cmd": "echo high > /sys/class/gpio/gpio7/direction", "gettype": "cmd"},
+                        {"io_addr": 0x7cc, "value": 0, "gettype": "io"},
+                    ],
+                    "rw_recover_reg": [
+                        {"io_addr": 0x705, "value": None, "gettype": "io"},
+                        {"io_addr": 0x713, "value": None, "gettype": "io"},
+                        {"io_addr": 0x715, "value": None, "gettype": "io"},
+                        {"io_addr": 0x721, "value": None, "gettype": "io"},
+                        {"io_addr": 0x722, "value": None, "gettype": "io"},
+                        {"io_addr": 0x772, "value": None, "gettype": "io"},
+                        {"io_addr": 0x774, "value": None, "gettype": "io"},
+                        {"io_addr": 0x776, "value": None, "gettype": "io"},
+                        {"io_addr": 0x778, "value": None, "gettype": "io"},
+                        {"io_addr": 0x77a, "value": None, "gettype": "io"},
+                        {"io_addr": 0x77c, "value": None, "gettype": "io"},
+                        {"io_addr": 0x780, "value": None, "gettype": "io"},
+                    ],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 30,
+                    "access_check_reg": {"io_addr": 0x705, "value": 0x5a, "gettype": "io"},
+                    "finish_cmd": [
+                        {"io_addr": 0x7cc, "value": 0xff, "gettype": "io"},
+                        {"cmd": "echo 0 > /sys/class/gpio/gpio7/value", "gettype": "cmd"},
+                        {"cmd": "echo 7 > /sys/class/gpio/unexport", "gettype": "cmd"},
+                    ],
+                },
+            ],
+        },
+
+        "MTD": {
+            "chain1": [
+                {"name": "MAC_FPGA",
+                    "init_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+                        {"cmd": "setpci -s 00:03.2 0xA0.W=0x0050", "gettype": "cmd"}, # link_disable
+                        {"io_addr": 0x948, "value": 0x0, "gettype": "io"},
+                        {"bus": 58, "loc": 0x1c, "offset": 0x23, "value": 0x00, "gettype": "i2c"},
+                        {"bus": 58, "loc": 0x1c, "offset": 0x23, "value": 0x01, "gettype": "i2c", "delay": 0.1},
+                    ],
+                    "after_upgrade_delay": 10,
+                    "after_upgrade_delay_timeout": 180,
+                    "refresh_finish_flag_check": {"bus": 58, "loc": 0x1c, "offset": 0x23, "value": 0x07, "gettype": "i2c"},
+                    "access_check_reg": {
+                        "path": "/dev/fpga0", "offset": 0x8, "value": [0x55, 0xaa, 0x5a, 0xa5], "read_len":4, "gettype":"devfile",
+                        "polling_cmd":[
+                            {"cmd": "setpci -s 00:03.2 0xA0.W=0x0060", "gettype": "cmd"}, # retrain_link
+                            {"cmd": "rmmod wb_fpga_pcie", "gettype": "cmd"},
+                            {"cmd": "modprobe wb_fpga_pcie", "gettype": "cmd", "delay": 0.1},
+                        ],
+                        "polling_delay": 0.1
+                    },
+                    "finish_cmd": [
+                        {"cmd": "setpci -s 00:03.2 0xA0.W=0x0060", "gettype": "cmd"}, # retrain_link
+                        {"io_addr": 0x948, "value": 0x1, "gettype": "io"},
+                        {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+                    ],
+                 },
+            ],
+            "chain2": [
+                {"name": "PORT_FPGA",
+                    "init_cmd": [
+                        {"file": WARM_UPG_FLAG, "gettype": "creat_file"},
+                        {"io_addr": 0x948, "value": 0x0, "gettype": "io"},
+                        {"bus": 66, "loc": 0x3c, "offset": 0x21, "value": 0x00, "gettype": "i2c"},
+                        {"bus": 66, "loc": 0x3c, "offset": 0x21, "value": 0x01, "gettype": "i2c", "delay": 0.1},
+                    ],
+                    "after_upgrade_delay": 10,
+                    "after_upgrade_delay_timeout": 180,
+                    "refresh_finish_flag_check": {"bus": 66, "loc": 0x3c, "offset": 0x21, "value": 0x07, "gettype": "i2c"},
+                    "access_check_reg": {
+                        "path": "/dev/fpga1", "offset": 0x8, "value": [0x55, 0xaa, 0x5a, 0xa5], "read_len":4, "gettype":"devfile",
+                        "polling_cmd":[
+                            {"cmd": "rmmod wb_fpga_pcie", "gettype": "cmd"},
+                            {"cmd": "modprobe wb_fpga_pcie", "gettype": "cmd", "delay": 0.1},
+                        ],
+                        "polling_delay": 0.1
+                    },
+                    "finish_cmd": [
+                        {"io_addr": 0x948, "value": 0x1, "gettype": "io"},
+                        {"file": WARM_UPG_FLAG, "gettype": "remove_file"},
+                    ],
+                 },
+            ],
+        },
+    },
+    "stop_services_cmd": [
+        "/usr/local/bin/platform_process.py stop",
+    ],
+    "start_services_cmd": [
+        "/usr/local/bin/platform_process.py start",
+    ],
+}
+
+UPGRADE_SUMMARY = {
+    "devtype": 0x20000055,
+
+    "slot0": {
+        "subtype": 0,
+        "VME": {
+            "chain1": {
+                "name": "BASE_CPLD",
+                "is_support_warm_upg": 1,
+            },
+            "chain2": {
+                "name": "FANA_CPLD",
+                "is_support_warm_upg": 1,
+            },
+            "chain3": {
+                "name": "FANB_CPLD",
+                "is_support_warm_upg": 1,
+            },
+            "chain4": {
+                "name": "MAC_CPLD",
+                "is_support_warm_upg": 1,
+            },
+            "chain5": {
+                "name": "PORT_CPLD",
+                "is_support_warm_upg": 1,
+            },
+            "chain6": {
+                "name": "CPU_CPLD",
+                "is_support_warm_upg": 1,
+            },
+        },
+
+        "MTD": {
+            "chain1": {
+                "name": "MAC_FPGA",
+                "is_support_warm_upg": 1,
+                "init_cmd": [
+                    {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"},
+                    {"cmd": "modprobe wb_spi_gpio_device sck=65 miso=32 mosi=67 bus=0", "gettype": "cmd"},
+                    {"cmd": "echo 50 > /sys/class/gpio/export", "gettype": "cmd"},
+                    {"cmd": "echo high > /sys/class/gpio/gpio50/direction", "gettype": "cmd", "delay": 0.1},
+                    {"cmd": "echo 48 > /sys/class/gpio/export", "gettype": "cmd"},
+                    {"cmd": "echo high > /sys/class/gpio/gpio48/direction", "gettype": "cmd", "delay": 0.1},
+                    {"io_addr": 0x918, "value": 0x2, "gettype": "io"},
+                    {"io_addr": 0x946, "value": 0xfe, "gettype": "io"},
+                    {"cmd": "modprobe wb_spi_nor_device spi_bus_num=0", "gettype": "cmd", "delay": 0.1},
+                ],
+                "finish_cmd": [
+                    {"cmd": "rmmod wb_spi_nor_device", "gettype": "cmd"},
+                    {"io_addr": 0x946, "value": 0xff, "gettype": "io"},
+                    {"io_addr": 0x918, "value": 0x0, "gettype": "io"},
+                    {"cmd": "echo 0 > /sys/class/gpio/gpio48/value", "gettype": "cmd"},
+                    {"cmd": "echo 48 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1},
+                    {"cmd": "echo 0 > /sys/class/gpio/gpio50/value", "gettype": "cmd"},
+                    {"cmd": "echo 50 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1},
+                    {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"},
+                    {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1},
+                ],
+            },
+            "chain2": {
+                "name": "PORT_FPGA",
+                "is_support_warm_upg": 1,
+                "init_cmd": [
+                    {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"},
+                    {"cmd": "modprobe wb_spi_gpio_device sck=65 miso=32 mosi=67 bus=0", "gettype": "cmd"},
+                    {"cmd": "echo 50 > /sys/class/gpio/export", "gettype": "cmd"},
+                    {"cmd": "echo high > /sys/class/gpio/gpio50/direction", "gettype": "cmd", "delay": 0.1},
+                    {"cmd": "echo 48 > /sys/class/gpio/export", "gettype": "cmd"},
+                    {"cmd": "echo high > /sys/class/gpio/gpio48/direction", "gettype": "cmd", "delay": 0.1},
+                    {"io_addr": 0x918, "value": 0x3, "gettype": "io"},
+                    {"io_addr": 0x946, "value": 0xfb, "gettype": "io"},
+                    {"cmd": "modprobe wb_spi_nor_device spi_bus_num=0", "gettype": "cmd", "delay": 0.1},
+                ],
+                "finish_cmd": [
+                    {"cmd": "rmmod wb_spi_nor_device", "gettype": "cmd"},
+                    {"io_addr": 0x946, "value": 0xff, "gettype": "io"},
+                    {"io_addr": 0x918, "value": 0x0, "gettype": "io"},
+                    {"cmd": "echo 0 > /sys/class/gpio/gpio48/value", "gettype": "cmd"},
+                    {"cmd": "echo 48 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1},
+                    {"cmd": "echo 0 > /sys/class/gpio/gpio50/value", "gettype": "cmd"},
+                    {"cmd": "echo 50 > /sys/class/gpio/unexport", "gettype": "cmd", "delay": 0.1},
+                    {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"},
+                    {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1},
+                ],
+            },
+            "chain4": {
+                "name": "BIOS",
+                "is_support_warm_upg": 0,
+                "filesizecheck": 10240,  # bios check file size, Unit: K
+                "init_cmd": [
+                    {"io_addr": 0x722, "value": 0x02, "gettype": "io"},
+                    {"cmd": "modprobe mtd", "gettype": "cmd"},
+                    {"cmd": "modprobe spi_nor", "gettype": "cmd"},
+                    {"cmd": "modprobe ofpart", "gettype": "cmd"},
+                    {"cmd": "modprobe intel_spi writeable=1", "gettype": "cmd"},
+                    {"cmd": "modprobe intel_spi_platform writeable=1", "gettype": "cmd"},
+                ],
+                "finish_cmd": [
+                    {"cmd": "rmmod intel_spi_platform", "gettype": "cmd"},
+                    {"cmd": "rmmod intel_spi", "gettype": "cmd"},
+                    {"cmd": "rmmod ofpart", "gettype": "cmd"},
+                    {"cmd": "rmmod spi_nor", "gettype": "cmd"},
+                    {"cmd": "rmmod mtd", "gettype": "cmd"},
+                ],
+            },
+        },
+        
+        "SYSFS": {
+            "chain3": {
+                "name": "BCM5387",
+                "is_support_warm_upg": 0,
+                "init_cmd": [
+                    {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"},
+                    {"cmd": "modprobe wb_spi_gpio_device sck=65 miso=32 mosi=67 bus=0", "gettype": "cmd"},
+                    {"cmd": "modprobe wb_spi_93xx46 spi_bus_num=0 spi_cs_gpio=6", "gettype": "cmd", "delay": 0.1},
+                ],
+                "finish_cmd": [
+                    {"cmd": "rmmod wb_spi_93xx46", "gettype": "cmd"},
+                    {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"},
+                    {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1},
+                ],
+            },
+        },
+        
+        "TEST": {
+            "fpga": [
+                {"chain": 1, "file": "/etc/.upgrade_test/fpga_test_0_1_header.bin", "display_name": "MAC_FPGA"},
+                {"chain": 2, "file": "/etc/.upgrade_test/fpga_test_0_2_header.bin", "display_name": "PORT_FPGA"},
+            ],
+            "cpld": [
+                {"chain": 1, "file": "/etc/.upgrade_test/cpld_test_0_1_header.vme", "display_name": "BASE_CPLD"},
+                {"chain": 2, "file": "/etc/.upgrade_test/cpld_test_0_2_header.vme", "display_name": "FANA_CPLD"},
+                {"chain": 3, "file": "/etc/.upgrade_test/cpld_test_0_3_header.vme", "display_name": "FANB_CPLD"},
+                {"chain": 4, "file": "/etc/.upgrade_test/cpld_test_0_4_header.vme", "display_name": "MAC_CPLD"},
+                {"chain": 5, "file": "/etc/.upgrade_test/cpld_test_0_5_header.vme", "display_name": "PORT_CPLD"},
+                {"chain": 6, "file": "/etc/.upgrade_test/cpld_test_0_6_header.vme", "display_name": "CPU_CPLD"},
+            ],
+        },
+    },
+
+    "BMC": {
+        "name": "BMC",
+        "init_cmd": [
+            {"cmd": "ipmitool raw 0x32 0x03 0x02", "gettype": "cmd", "ignore_result": 1},
+        ],
+        "finish_cmd": [],
+    },
+}
+
+PLATFORM_E2_CONF = {
+    "fan": [
+        {"name": "fan1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/95-0050/eeprom"},
+        {"name": "fan2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/104-0050/eeprom"},
+        {"name": "fan3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/96-0050/eeprom"},
+        {"name": "fan4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/105-0050/eeprom"},
+        {"name": "fan5", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/97-0050/eeprom"},
+        {"name": "fan6", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/106-0050/eeprom"},
+        {"name": "fan7", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/98-0050/eeprom"},
+        {"name": "fan8", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/107-0050/eeprom"},
+    ],
+    "psu": [
+        {"name": "psu1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/83-0050/eeprom"},
+        {"name": "psu2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/84-0050/eeprom"},
+        {"name": "psu3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/86-0050/eeprom"},
+        {"name": "psu4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/85-0050/eeprom"},
+    ],
+    "syseeprom": [
+        {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/1-0056/eeprom"},
+    ],
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/config/x86_64_micas_m2_w6930_64qc_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/config/x86_64_micas_m2_w6930_64qc_r0_port_config.py
new file mode 100755
index 000000000000..5ed9537f3c16
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/config/x86_64_micas_m2_w6930_64qc_r0_port_config.py
@@ -0,0 +1,7 @@
+#!/usr/bin/python3
+# -*- coding: UTF-8 -*-
+
+PLATFORM_INTF_OPTOE = {
+    "port_num": 64,
+    "optoe_start_bus": 133,
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_device.py
new file mode 100755
index 000000000000..36d6cbd0f109
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_device.py
@@ -0,0 +1,1758 @@
+#!/usr/bin/python3
+
+psu_fan_airflow = {
+    "intake": ['DPS-1300AB-6 S', 'GW-CRPS1300D'],
+    "exhaust": []
+}
+
+fanairflow = {
+    "intake": ['M2EFAN II-F'],
+    "exhaust": [],
+}
+
+psu_display_name = {
+    "PA1300I-F": ['GW-CRPS1300D', 'DPS-1300AB-6 S'],
+}
+
+psutypedecode = {
+    0x00: 'N/A',
+    0x01: 'AC',
+    0x02: 'DC',
+}
+
+
+class Unit:
+    Temperature = "C"
+    Voltage = "V"
+    Current = "A"
+    Power = "W"
+    Speed = "RPM"
+
+
+class threshold:
+    PSU_TEMP_MIN = -10 * 1000
+    PSU_TEMP_MAX = 60 * 1000
+
+    PSU_FAN_SPEED_MIN = 2000
+    PSU_FAN_SPEED_MAX = 28000
+
+    PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000
+    PSU_OUTPUT_VOLTAGE_MAX = 14 * 1000
+
+    PSU_AC_INPUT_VOLTAGE_MIN = 200 * 1000
+    PSU_AC_INPUT_VOLTAGE_MAX = 240 * 1000
+
+    PSU_DC_INPUT_VOLTAGE_MIN = 190 * 1000
+    PSU_DC_INPUT_VOLTAGE_MAX = 290 * 1000
+
+    ERR_VALUE = -9999999
+
+    PSU_OUTPUT_POWER_MIN = 10 * 1000 * 1000
+    PSU_OUTPUT_POWER_MAX = 1300 * 1000 * 1000
+
+    PSU_INPUT_POWER_MIN = 10 * 1000 * 1000
+    PSU_INPUT_POWER_MAX = 1444 * 1000 * 1000
+
+    PSU_OUTPUT_CURRENT_MIN = 2 * 1000
+    PSU_OUTPUT_CURRENT_MAX = 107 * 1000
+
+    PSU_INPUT_CURRENT_MIN = 0.2 * 1000
+    PSU_INPUT_CURRENT_MAX = 7 * 1000
+
+    FRONT_FAN_SPEED_MAX = 14200
+    REAR_FAN_SPEED_MAX = 11200
+    FAN_SPEED_MIN = 2000
+
+
+devices = {
+    "onie_e2": [
+        {
+            "name": "ONIE_E2",
+            "e2loc": {"loc": "/sys/bus/i2c/devices/1-0056/eeprom", "way": "sysfs"},
+            "airflow": "intake"
+        },
+    ],
+    "psus": [
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/83-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 83, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU1",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 83, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": threshold.PSU_TEMP_MIN,
+                "Max": threshold.PSU_TEMP_MAX,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 83, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": threshold.PSU_FAN_SPEED_MIN,
+                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 83, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 83, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.ERR_VALUE,
+                    "Max": threshold.ERR_VALUE,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_CURRENT_MIN,
+                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_POWER_MIN,
+                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 83, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_POWER_MIN,
+                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        },
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/84-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 84, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU2",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 84, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": threshold.PSU_TEMP_MIN,
+                "Max": threshold.PSU_TEMP_MAX,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 84, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": threshold.PSU_FAN_SPEED_MIN,
+                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 84, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 84, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.ERR_VALUE,
+                    "Max": threshold.ERR_VALUE,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_CURRENT_MIN,
+                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_POWER_MIN,
+                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 84, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_POWER_MIN,
+                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        },
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/86-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 86, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu3/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU3",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 86, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": threshold.PSU_TEMP_MIN,
+                "Max": threshold.PSU_TEMP_MAX,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 86, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": threshold.PSU_FAN_SPEED_MIN,
+                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 86, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 86, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.ERR_VALUE,
+                    "Max": threshold.ERR_VALUE,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_CURRENT_MIN,
+                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_POWER_MIN,
+                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 86, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_POWER_MIN,
+                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        },
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/85-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 85, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu4/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU4",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 85, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": threshold.PSU_TEMP_MIN,
+                "Max": threshold.PSU_TEMP_MAX,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 85, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": threshold.PSU_FAN_SPEED_MIN,
+                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 85, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 85, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.ERR_VALUE,
+                    "Max": threshold.ERR_VALUE,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_CURRENT_MIN,
+                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_POWER_MIN,
+                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 85, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_POWER_MIN,
+                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        }
+    ],
+    "temps": [
+        {
+            "name": "BOARD_TEMP",
+            "temp_id": "TEMP1",
+            "api_name": "Board",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/118-004f/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 70000,
+                "Max": 75000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "CPU_TEMP",
+            "temp_id": "TEMP2",
+            "api_name": "CPU",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -15000,
+                "Low": 10000,
+                "High": 98000,
+                "Max": 100000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "INLET_TEMP",
+            "temp_id": "TEMP3",
+            "api_name": "Inlet",
+            "Temperature": {
+                "value": [
+                    {"loc": "/sys/bus/i2c/devices/79-004b/hwmon/*/temp1_input", "way": "sysfs"},
+                ],
+                "Min": -30000,
+                "Low": 0,
+                "High": 40000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "OUTLET_TEMP",
+            "temp_id": "TEMP4",
+            "api_name": "Outlet",
+            "Temperature": {
+                "value": [
+                    {"loc": "/sys/bus/i2c/devices/93-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                    {"loc": "/sys/bus/i2c/devices/94-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                    {"loc": "/sys/bus/i2c/devices/102-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                    {"loc": "/sys/bus/i2c/devices/103-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                ],
+                "Min": -30000,
+                "Low": 0,
+                "High": 70000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "SWITCH_TEMP",
+            "temp_id": "TEMP5",
+            "api_name": "ASIC_TEMP",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/122-0044/hwmon/hwmon*/temp99_input", "way": "sysfs"},
+                "Min": -30000,
+                "Low": 10000,
+                "High": 100000,
+                "Max": 105000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU1_TEMP",
+            "temp_id": "TEMP6",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-83/83-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU2_TEMP",
+            "temp_id": "TEMP7",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-84/84-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU3_TEMP",
+            "temp_id": "TEMP8",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-86/86-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU4_TEMP",
+            "temp_id": "TEMP9",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-85/85-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -10000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "SFF_TEMP",
+            "Temperature": {
+                "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"},
+                "Min": -15000,
+                "Low": 0,
+                "High": 80000,
+                "Max": 100000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+    ],
+    "leds": [
+        {
+            "name": "FRONT_SYS_LED",
+            "led_type": "SYS_LED",
+            "led": {"loc": "/dev/cpld4", "offset": 0x08, "len": 1, "way": "devfile"},
+            "led_attrs": {
+                "green": 0x01, "red": 0x02, "amber": 0x03, "default": 0x01,
+                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+            },
+        },
+        {
+            "name": "FRONT_PSU_LED",
+            "led_type": "PSU_LED",
+            "led": {"loc": "/dev/cpld4", "offset": 0x09, "len": 1, "way": "devfile"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+            },
+        },
+        {
+            "name": "FRONT_FAN_LED",
+            "led_type": "FAN_LED",
+            "led": {"loc": "/dev/cpld4", "offset": 0x0a, "len": 1, "way": "devfile"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+            },
+        },
+    ],
+    "fans": [
+        {
+            "name": "FAN1",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-95/95-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/wb_plat/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 92, "addr": 0x0d, "offset": 0x3b, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+            },
+            "PowerMax": 80.64,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x14, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x14, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN2",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-104/104-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/wb_plat/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 101, "addr": 0x0d, "offset": 0x3b, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+            },
+            "PowerMax": 80.64,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x14, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x14, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN3",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-96/96-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/wb_plat/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 92, "addr": 0x0d, "offset": 0x3c, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+            },
+            "PowerMax": 80.64,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x15, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan3/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x15, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan3/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN4",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-105/105-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/wb_plat/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 101, "addr": 0x0d, "offset": 0x3c, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+            },
+            "PowerMax": 80.64,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x15, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                     "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan4/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x15, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan4/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN5",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-97/97-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/wb_plat/fan/fan5/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 92, "addr": 0x0d, "offset": 0x3d, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+            },
+            "PowerMax": 80.64,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x16, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan5/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x16, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan5/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN6",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-106/106-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/wb_plat/fan/fan6/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 101, "addr": 0x0d, "offset": 0x3d, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+            },
+            "PowerMax": 80.64,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x16, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan6/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan6/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan6/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x16, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan6/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN7",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-98/98-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/wb_plat/fan/fan7/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 92, "addr": 0x0d, "offset": 0x3e, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+            },
+            "PowerMax": 80.64,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x17, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan7/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan7/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan7/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 92, "addr": 0x0d, "offset": 0x17, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan7/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN8",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-107/107-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'},
+            "present": {"loc": "/sys/wb_plat/fan/fan8/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 101, "addr": 0x0d, "offset": 0x3e, "way": "i2c"},
+            "led_attrs": {
+                "green": 0x04, "red": 0x02, "yellow": 0x06, "default": 0x04,
+                "flash": 0xff, "light": 0xff, "off": 0, "mask": 0xff
+            },
+            "PowerMax": 80.64,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x17, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan8/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan8/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan8/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 101, "addr": 0x0d, "offset": 0x17, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan8/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+    ],
+    "cplds": [
+        {
+            "name": "CPU_CPLD",
+            "cpld_id": "CPLD1",
+            "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for system power",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "CONNECT_CPLD",
+            "cpld_id": "CPLD2",
+            "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "MAC_CPLDA",
+            "cpld_id": "CPLD3",
+            "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "MAC_CPLDB",
+            "cpld_id": "CPLD4",
+            "VersionFile": {"loc": "/dev/cpld5", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "PORT_CPLDA",
+            "cpld_id": "CPLD5",
+            "VersionFile": {"loc": "/dev/cpld6", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "PORT_CPLDB",
+            "cpld_id": "CPLD6",
+            "VersionFile": {"loc": "/dev/cpld7", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "FAN_CPLDA",
+            "cpld_id": "CPLD7",
+            "VersionFile": {"loc": "/dev/cpld8", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for fan modules",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "FAN_CPLDB",
+            "cpld_id": "CPLD8",
+            "VersionFile": {"loc": "/dev/cpld9", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for fan modules",
+            "slot": 0,
+            "warm": 1,
+        },
+        {
+            "name": "MAC_FPGA",
+            "cpld_id": "CPLD9",
+            "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "format": "little_endian",
+            "warm": 1,
+        },
+        {
+            "name": "PORT_FPGA",
+            "cpld_id": "CPLD10",
+            "VersionFile": {"loc": "/dev/fpga1", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "format": "little_endian",
+            "warm": 1,
+        },
+        {
+            "name": "BIOS",
+            "cpld_id": "CPLD11",
+            "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"},
+            "desc": "Performs initialization of hardware components during booting",
+            "slot": 0,
+            "type": "str",
+            "warm": 0,
+        },
+    ],
+     "dcdc": [
+        {
+            "name": "MAC_VDD3.3V_standby",
+            "dcdc_id": "DCDC1",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_VDD12V_A",
+            "dcdc_id": "DCDC2",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 10200,
+            "Max": 13800,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_VDD1.0V_FPGA",
+            "dcdc_id": "DCDC3",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 850,
+            "Max": 1150,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_VDD1.8V_FPGA",
+            "dcdc_id": "DCDC4",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in4_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1530,
+            "Max": 2070,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_VDD1.2V_FPGA",
+            "dcdc_id": "DCDC5",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in5_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1020,
+            "Max": 1380,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_VDD3.3V",
+            "dcdc_id": "DCDC6",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in6_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_VDD5V_CLK_MCU",
+            "dcdc_id": "DCDC7",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in7_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 4250,
+            "Max": 5750,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_VDD3.3V_MAC",
+            "dcdc_id": "DCDC8",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in8_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_VDDO1.8V",
+            "dcdc_id": "DCDC9",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in9_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1530,
+            "Max": 2070,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_VDDO1.2V",
+            "dcdc_id": "DCDC10",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in10_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1020,
+            "Max": 1380,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_VDD_CORE",
+            "dcdc_id": "DCDC11",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in11_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 680,
+            "Max": 980,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_VDD3.3_CLK",
+            "dcdc_id": "DCDC12",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in12_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_VDD_ANALOG",
+            "dcdc_id": "DCDC13",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in13_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 655,
+            "Max": 885,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_VDD1.2V_MAC_A",
+            "dcdc_id": "DCDC14",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in14_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1020,
+            "Max": 1380,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_AVDD1.8V",
+            "dcdc_id": "DCDC15",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in15_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1530,
+            "Max": 2070,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_VDD_ANALOG2",
+            "dcdc_id": "DCDC16",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/128-005b/hwmon/hwmon*/in16_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 655,
+            "Max": 885,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_VDD12V_B",
+            "dcdc_id": "DCDC17",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 10200,
+            "Max": 13800,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_VDD5.0V",
+            "dcdc_id": "DCDC18",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 4250,
+            "Max": 5750,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_QSFPDD_VDD3.3V_A",
+            "dcdc_id": "DCDC19",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_QSFPDD_VDD3.3V_B",
+            "dcdc_id": "DCDC20",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in4_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_QSFPDD_VDD3.3V_C",
+            "dcdc_id": "DCDC21",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in5_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_QSFPDD_VDD3.3V_D",
+            "dcdc_id": "DCDC22",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in6_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_QSFPDD_VDD3.3V_E",
+            "dcdc_id": "DCDC23",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in7_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_QSFPDD_VDD3.3V_F",
+            "dcdc_id": "DCDC24",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/129-005b/hwmon/hwmon*/in8_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "PORT_VDD1.0V_FPGA",
+            "dcdc_id": "DCDC25",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 850,
+            "Max": 1150,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "PORT_VDD1.8V_FPGA",
+            "dcdc_id": "DCDC26",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1530,
+            "Max": 2070,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "PORT_VDD1.2V_FPGA",
+            "dcdc_id": "DCDC27",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1020,
+            "Max": 1380,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "PORT_VDD3.3V",
+            "dcdc_id": "DCDC28",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in4_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "PORT_VDD12V",
+            "dcdc_id": "DCDC29",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in5_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 10200,
+            "Max": 13800,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "PORT_VDD3.3V_standby",
+            "dcdc_id": "DCDC30",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in6_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "PORT_QSFPDD_VDD3.3V_A",
+            "dcdc_id": "DCDC31",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in7_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "PORT_QSFPDD_VDD3.3V_B",
+            "dcdc_id": "DCDC32",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in8_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "PORT_QSFPDD_VDD3.3V_C",
+            "dcdc_id": "DCDC33",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in9_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "PORT_QSFPDD_VDD3.3V_D",
+            "dcdc_id": "DCDC34",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in10_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "PORT_QSFPDD_VDD3.3V_E",
+            "dcdc_id": "DCDC35",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in11_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "PORT_QSFPDD_VDD3.3V_F",
+            "dcdc_id": "DCDC36",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/130-005b/hwmon/hwmon*/in12_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2805,
+            "Max": 3795,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "MAC_VDD1.2V_MAC_B",
+            "dcdc_id": "DCDC37",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/131-0067/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1020,
+            "Max": 1380,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "BASE_VDD12V",
+            "dcdc_id": "DCDC38",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/77-005b/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 10830,
+            "Max": 13230,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "BASE_SW_VDD1.2V",
+            "dcdc_id": "DCDC39",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/77-005b/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1083,
+            "Max": 1323,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "BASE_VDD2.5V",
+            "dcdc_id": "DCDC40",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/77-005b/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2247,
+            "Max": 2745,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "BASE_VDD3.3V",
+            "dcdc_id": "DCDC41",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/77-005b/hwmon/hwmon*/in4_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2960,
+            "Max": 3616,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "BASE_SSD_VDD3.3V",
+            "dcdc_id": "DCDC42",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/77-005b/hwmon/hwmon*/in5_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2978,
+            "Max": 3638,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "CPU_P1V05_V",
+            "dcdc_id": "DCDC43",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/78-0067/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 882,
+            "Max": 1232,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "CPU_VCCIN_V",
+            "dcdc_id": "DCDC44",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/78-0067/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1368,
+            "Max": 2244,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "CPU_VCCD_V",
+            "dcdc_id": "DCDC45",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/78-006c/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 990,
+            "Max": 1452,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "CPU_VCCSCSUS_V",
+            "dcdc_id": "DCDC46",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/78-006c/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 855,
+            "Max": 1265,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "CPU_P5V_AUX_V",
+            "dcdc_id": "DCDC47",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/78-0043/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 3852,
+            "Max": 6347,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "CPU_P3V3_STBY_V",
+            "dcdc_id": "DCDC48",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/78-0043/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 2682,
+            "Max": 4004,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+        {
+            "name": "CPU_P1V7_VCCSCFUSESUS_V",
+            "dcdc_id": "DCDC49",
+            "value": {
+                "loc": "/sys/bus/i2c/devices/78-0043/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 1,
+            "Min": 1377,
+            "Max": 2057,
+            "Unit": "V",
+            "format": "float(float(%s)/1000)",
+        },
+    ],
+    "cpu": [
+        {
+            "name": "cpu",
+            "CpuResetCntReg": {"loc": "/dev/cpld1", "offset": 0x10, "len": 1, "way": "devfile_ascii"},
+            "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"
+        }
+    ],
+    "sfps": {
+        "ver": '1.0',
+        "port_index_start": 0,
+        "port_num": 64,
+        "log_level": 2,
+        "eeprom_retry_times": 5,
+        "eeprom_retry_break_sec": 0.2,
+        "presence_cpld": {
+            "dev_id": {
+                4: {
+                    "offset": {
+                        0x71: "49-50, 53-54, 57-58, 61-62",
+                    },
+                },
+                5: {
+                    "offset": {
+                        0x73: "1-2, 5-6, 9-10, 13-14",
+                        0x74: "17-18, 21-22, 25-26, 29-30",
+                        0x75: "33-34, 37-38, 41-42, 45-46",
+                    },
+                },
+                6: {
+                    "offset": {
+                        0x72: "3-4, 7-8, 11-12, 15-16",
+                        0x73: "20, 23-24, 27-28, 31-32",
+                    },
+                },
+                7: {
+                    "offset": {
+                        0x73: "19, 35-36, 39-40, 43-44, 47",
+                        0x74: "48, 51-52, 55-56, 59-60, 63",
+                        0x75: "64",
+                    },
+                },
+            },
+        },
+        "presence_val_is_present": 0,
+        "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom",
+        "eeprom_path_key": list(range(133, 197)),
+        "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class",
+        "optoe_driver_key": list(range(133, 197)),
+        "reset_cpld": {
+            "dev_id": {
+                4: {
+                    "offset": {
+                        0x70: "49-50, 53-54, 57-58, 61-62",
+                    },
+                },
+                5: {
+                    "offset": {
+                        0x70: "1-2, 5-6, 9-10, 13-14",
+                        0x71: "17-18, 21-22, 25-26, 29-30",
+                        0x72: "33-34, 37-38, 41-42, 45-46",
+                    },
+                },
+                6: {
+                    "offset": {
+                        0x70: "3-4, 7-8, 11-12, 15-16",
+                        0x71: "20, 23-24, 27-28, 31-32",
+                    },
+                },
+                7: {
+                    "offset": {
+                        0x70: "19, 35-36, 39-40, 43-44, 47",
+                        0x71: "48, 51-52, 55-56, 59-60, 63",
+                        0x72: "64",
+                    },
+                },
+            },
+        },
+        "reset_val_is_reset": 0,
+    }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_monitor.py
new file mode 100755
index 000000000000..69abf0da3fbd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/hal-config/x86_64_micas_m2_w6930_64qc_r0_monitor.py
@@ -0,0 +1,135 @@
+# coding:utf-8
+
+
+monitor = {
+    "openloop": {
+        "linear": {
+            "name": "linear",
+            "flag": 0,
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "K": 11,
+            "tin_min": 38,
+        },
+        "curve": {
+            "name": "curve",
+            "flag": 1,
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "a": 0.369,
+            "b": -15.657,
+            "c": 289,
+            "tin_min": 25,
+        },
+    },
+
+    "pid": {
+        "CPU_TEMP": {
+            "name": "CPU_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 1.5,
+            "Ki": 1,
+            "Kd": 0.3,
+            "target": 80,
+            "value": [None, None, None],
+        },
+        "SWITCH_TEMP": {
+            "name": "SWITCH_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 1.5,
+            "Ki": 1,
+            "Kd": 0.3,
+            "target": 90,
+            "value": [None, None, None],
+        },
+        "OUTLET_TEMP": {
+            "name": "OUTLET_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 2,
+            "Ki": 0.4,
+            "Kd": 0.3,
+            "target": 65,
+            "value": [None, None, None],
+        },
+        "SFF_TEMP": {
+            "name": "SFF_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 0.1,
+            "Ki": 0.4,
+            "Kd": 0,
+            "target": 60,
+            "value": [None, None, None],
+        },
+    },
+
+    "temps_threshold": {
+        "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 105, "invalid": -100000, "error": -99999},
+        "INLET_TEMP": {"name": "INLET_TEMP", "warning": 40, "critical": 50, "fix": -3},
+        "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75},
+        "CPU_TEMP": {"name": "CPU_TEMP", "warning": 100, "critical": 102},
+        "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999},
+    },
+
+    "fancontrol_para": {
+        "interval": 5,
+        "max_pwm": 0xff,
+        "min_pwm": 0x80,
+        "abnormal_pwm": 0xff,
+        "warning_pwm": 0xff,
+        "temp_invalid_pid_pwm": 0x80,
+        "temp_error_pid_pwm": 0x80,
+        "temp_fail_num": 3,
+        "check_temp_fail": [
+            {"temp_name": "INLET_TEMP"},
+            {"temp_name": "SWITCH_TEMP"},
+            {"temp_name": "CPU_TEMP"},
+        ],
+        "temp_warning_num": 3,  # temp over warning 3 times continuously
+        "temp_critical_num": 3,  # temp over critical 3 times continuously
+        "temp_warning_countdown": 60,  # 5 min warning speed after not warning
+        "temp_critical_countdown": 60,  # 5 min full speed after not critical
+        "rotor_error_count": 6,  # fan rotor error 6 times continuously
+        "inlet_mac_diff": 999,
+        "check_crit_reboot_flag": 1,
+        "check_crit_reboot_num": 3,
+        "check_crit_sleep_time": 20,
+        "psu_fan_control": 1,
+        "psu_absent_fullspeed_num": 0xFF,
+        "fan_absent_fullspeed_num": 1,
+        "rotor_error_fullspeed_num": 1,
+    },
+
+    "ledcontrol_para": {
+        "interval":5,
+        "checkpsu": 0,  # 0: sys led don't follow psu led
+        "checkfan": 0,  # 0: sys led don't follow fan led
+        "psu_amber_num": 1,
+        "fan_amber_num": 1,
+        "board_sys_led": [
+            {"led_name": "FRONT_SYS_LED"},
+        ],
+        "board_psu_led": [
+            {"led_name": "FRONT_PSU_LED"},
+        ],
+        "board_fan_led": [
+            {"led_name": "FRONT_FAN_LED"},
+        ],
+    },
+
+    "otp_reboot_judge_file": {
+        "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag",
+        "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag",
+    },
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/Makefile
new file mode 100755
index 000000000000..1541b91bdf7d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/Makefile
@@ -0,0 +1,16 @@
+MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
+MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules)
+
+EXTRA_CFLAGS+= -I$(MODULES_DIR)
+
+obj-m += wb_pcie_dev_device.o
+obj-m += wb_spi_ocores_device.o
+obj-m += wb_spi_dev_device.o
+obj-m += wb_lpc_drv_device.o
+obj-m += wb_io_dev_device.o
+obj-m += wb_fpga_i2c_bus_device.o
+obj-m += wb_i2c_mux_pca954x_device.o
+obj-m += wb_fpga_pca954x_device.o
+obj-m += wb_spi_master.o
+obj-m += wb_i2c_dev_device.o
+obj-m += wb_spi_dev_platform_device.o
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_i2c_bus_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_i2c_bus_device.c
new file mode 100644
index 000000000000..d0650a29b1bf
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_i2c_bus_device.c
@@ -0,0 +1,2317 @@
+/*
+ * An wb_fpga_i2c_bus_device driver for fpga i2c device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <fpga_i2c.h>
+
+static int g_wb_fpga_i2c_debug = 0;
+static int g_wb_fpga_i2c_error = 0;
+
+module_param(g_wb_fpga_i2c_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_fpga_i2c_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_FPGA_I2C_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_fpga_i2c_debug) { \
+        printk(KERN_INFO "[WB_FPGA_I2C][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_FPGA_I2C_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_fpga_i2c_error) { \
+        printk(KERN_ERR "[WB_FPGA_I2C][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data0 = {
+    .adap_nr                    = 2,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x100,
+    .i2c_filter                 = 0x104,
+    .i2c_stretch                = 0x108,
+    .i2c_ext_9548_exits_flag    = 0x10c,
+    .i2c_ext_9548_addr          = 0x110,
+    .i2c_ext_9548_chan          = 0x114,
+    .i2c_in_9548_chan           = 0x118,
+    .i2c_slave                  = 0x11c,
+    .i2c_reg                    = 0x120,
+    .i2c_reg_len                = 0x130,
+    .i2c_data_len               = 0x134,
+    .i2c_ctrl                   = 0x138,
+    .i2c_status                 = 0x13c,
+    .i2c_data_buf               = 0x180,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x28,
+    .i2c_reset_on               = 0x00000001,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data1 = {
+    .adap_nr                    = 3,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x200,
+    .i2c_filter                 = 0x204,
+    .i2c_stretch                = 0x208,
+    .i2c_ext_9548_exits_flag    = 0x20c,
+    .i2c_ext_9548_addr          = 0x210,
+    .i2c_ext_9548_chan          = 0x214,
+    .i2c_in_9548_chan           = 0x218,
+    .i2c_slave                  = 0x21c,
+    .i2c_reg                    = 0x220,
+    .i2c_reg_len                = 0x230,
+    .i2c_data_len               = 0x234,
+    .i2c_ctrl                   = 0x238,
+    .i2c_status                 = 0x23c,
+    .i2c_data_buf               = 0x280,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x28,
+    .i2c_reset_on               = 0x00000002,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data2 = {
+    .adap_nr                    = 4,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x300,
+    .i2c_filter                 = 0x304,
+    .i2c_stretch                = 0x308,
+    .i2c_ext_9548_exits_flag    = 0x30c,
+    .i2c_ext_9548_addr          = 0x310,
+    .i2c_ext_9548_chan          = 0x314,
+    .i2c_in_9548_chan           = 0x318,
+    .i2c_slave                  = 0x31c,
+    .i2c_reg                    = 0x320,
+    .i2c_reg_len                = 0x330,
+    .i2c_data_len               = 0x334,
+    .i2c_ctrl                   = 0x338,
+    .i2c_status                 = 0x33c,
+    .i2c_data_buf               = 0x380,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x28,
+    .i2c_reset_on               = 0x00000004,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data3 = {
+    .adap_nr                    = 5,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x400,
+    .i2c_filter                 = 0x404,
+    .i2c_stretch                = 0x408,
+    .i2c_ext_9548_exits_flag    = 0x40c,
+    .i2c_ext_9548_addr          = 0x410,
+    .i2c_ext_9548_chan          = 0x414,
+    .i2c_in_9548_chan           = 0x418,
+    .i2c_slave                  = 0x41c,
+    .i2c_reg                    = 0x420,
+    .i2c_reg_len                = 0x430,
+    .i2c_data_len               = 0x434,
+    .i2c_ctrl                   = 0x438,
+    .i2c_status                 = 0x43c,
+    .i2c_data_buf               = 0x480,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x28,
+    .i2c_reset_on               = 0x00000008,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data4 = {
+    .adap_nr                    = 6,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x500,
+    .i2c_filter                 = 0x504,
+    .i2c_stretch                = 0x508,
+    .i2c_ext_9548_exits_flag    = 0x50c,
+    .i2c_ext_9548_addr          = 0x510,
+    .i2c_ext_9548_chan          = 0x514,
+    .i2c_in_9548_chan           = 0x518,
+    .i2c_slave                  = 0x51c,
+    .i2c_reg                    = 0x520,
+    .i2c_reg_len                = 0x530,
+    .i2c_data_len               = 0x534,
+    .i2c_ctrl                   = 0x538,
+    .i2c_status                 = 0x53c,
+    .i2c_data_buf               = 0x580,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x28,
+    .i2c_reset_on               = 0x00000010,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data5 = {
+    .adap_nr                    = 7,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x600,
+    .i2c_filter                 = 0x604,
+    .i2c_stretch                = 0x608,
+    .i2c_ext_9548_exits_flag    = 0x60c,
+    .i2c_ext_9548_addr          = 0x610,
+    .i2c_ext_9548_chan          = 0x614,
+    .i2c_in_9548_chan           = 0x618,
+    .i2c_slave                  = 0x61c,
+    .i2c_reg                    = 0x620,
+    .i2c_reg_len                = 0x630,
+    .i2c_data_len               = 0x634,
+    .i2c_ctrl                   = 0x638,
+    .i2c_status                 = 0x63c,
+    .i2c_data_buf               = 0x680,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x28,
+    .i2c_reset_on               = 0x00000020,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_i2c_bus_device_data6 = {
+    .adap_nr                    = 199,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1a00,
+    .i2c_filter                 = 0x1a04,
+    .i2c_stretch                = 0x1a08,
+    .i2c_ext_9548_exits_flag    = 0x1a0c,
+    .i2c_ext_9548_addr          = 0x1a10,
+    .i2c_ext_9548_chan          = 0x1a14,
+    .i2c_in_9548_chan           = 0x1a18,
+    .i2c_slave                  = 0x1a1c,
+    .i2c_reg                    = 0x1a20,
+    .i2c_reg_len                = 0x1a30,
+    .i2c_data_len               = 0x1a34,
+    .i2c_ctrl                   = 0x1a38,
+    .i2c_status                 = 0x1a3c,
+    .i2c_data_buf               = 0x1b00,
+    .i2c_data_buf_len           = 0x100,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x28,
+    .i2c_reset_on               = 0x00000040,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data0 = {
+    .adap_nr                    = 8,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x800,
+    .i2c_filter                 = 0x804,
+    .i2c_stretch                = 0x808,
+    .i2c_ext_9548_exits_flag    = 0x80c,
+    .i2c_ext_9548_addr          = 0x810,
+    .i2c_ext_9548_chan          = 0x814,
+    .i2c_in_9548_chan           = 0x818,
+    .i2c_slave                  = 0x81c,
+    .i2c_reg                    = 0x820,
+    .i2c_reg_len                = 0x830,
+    .i2c_data_len               = 0x834,
+    .i2c_ctrl                   = 0x838,
+    .i2c_status                 = 0x83c,
+    .i2c_data_buf               = 0x880,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x2c,
+    .i2c_reset_on               = 0x00000001,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data1 = {
+    .adap_nr                    = 9,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x900,
+    .i2c_filter                 = 0x904,
+    .i2c_stretch                = 0x908,
+    .i2c_ext_9548_exits_flag    = 0x90c,
+    .i2c_ext_9548_addr          = 0x910,
+    .i2c_ext_9548_chan          = 0x914,
+    .i2c_in_9548_chan           = 0x918,
+    .i2c_slave                  = 0x91c,
+    .i2c_reg                    = 0x920,
+    .i2c_reg_len                = 0x930,
+    .i2c_data_len               = 0x934,
+    .i2c_ctrl                   = 0x938,
+    .i2c_status                 = 0x93c,
+    .i2c_data_buf               = 0x980,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x2c,
+    .i2c_reset_on               = 0x00000002,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data2 = {
+    .adap_nr                    = 10,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0xa00,
+    .i2c_filter                 = 0xa04,
+    .i2c_stretch                = 0xa08,
+    .i2c_ext_9548_exits_flag    = 0xa0c,
+    .i2c_ext_9548_addr          = 0xa10,
+    .i2c_ext_9548_chan          = 0xa14,
+    .i2c_in_9548_chan           = 0xa18,
+    .i2c_slave                  = 0xa1c,
+    .i2c_reg                    = 0xa20,
+    .i2c_reg_len                = 0xa30,
+    .i2c_data_len               = 0xa34,
+    .i2c_ctrl                   = 0xa38,
+    .i2c_status                 = 0xa3c,
+    .i2c_data_buf               = 0xa80,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x2c,
+    .i2c_reset_on               = 0x00000004,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data3 = {
+    .adap_nr                    = 11,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0xb00,
+    .i2c_filter                 = 0xb04,
+    .i2c_stretch                = 0xb08,
+    .i2c_ext_9548_exits_flag    = 0xb0c,
+    .i2c_ext_9548_addr          = 0xb10,
+    .i2c_ext_9548_chan          = 0xb14,
+    .i2c_in_9548_chan           = 0xb18,
+    .i2c_slave                  = 0xb1c,
+    .i2c_reg                    = 0xb20,
+    .i2c_reg_len                = 0xb30,
+    .i2c_data_len               = 0xb34,
+    .i2c_ctrl                   = 0xb38,
+    .i2c_status                 = 0xb3c,
+    .i2c_data_buf               = 0xb80,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x2c,
+    .i2c_reset_on               = 0x00000008,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data4 = {
+    .adap_nr                    = 12,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0xc00,
+    .i2c_filter                 = 0xc04,
+    .i2c_stretch                = 0xc08,
+    .i2c_ext_9548_exits_flag    = 0xc0c,
+    .i2c_ext_9548_addr          = 0xc10,
+    .i2c_ext_9548_chan          = 0xc14,
+    .i2c_in_9548_chan           = 0xc18,
+    .i2c_slave                  = 0xc1c,
+    .i2c_reg                    = 0xc20,
+    .i2c_reg_len                = 0xc30,
+    .i2c_data_len               = 0xc34,
+    .i2c_ctrl                   = 0xc38,
+    .i2c_status                 = 0xc3c,
+    .i2c_data_buf               = 0xc80,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x2c,
+    .i2c_reset_on               = 0x00000010,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data5 = {
+    .adap_nr                    = 13,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0xd00,
+    .i2c_filter                 = 0xd04,
+    .i2c_stretch                = 0xd08,
+    .i2c_ext_9548_exits_flag    = 0xd0c,
+    .i2c_ext_9548_addr          = 0xd10,
+    .i2c_ext_9548_chan          = 0xd14,
+    .i2c_in_9548_chan           = 0xd18,
+    .i2c_slave                  = 0xd1c,
+    .i2c_reg                    = 0xd20,
+    .i2c_reg_len                = 0xd30,
+    .i2c_data_len               = 0xd34,
+    .i2c_ctrl                   = 0xd38,
+    .i2c_status                 = 0xd3c,
+    .i2c_data_buf               = 0xd80,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x2c,
+    .i2c_reset_on               = 0x00000020,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data6 = {
+    .adap_nr                    = 14,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0xe00,
+    .i2c_filter                 = 0xe04,
+    .i2c_stretch                = 0xe08,
+    .i2c_ext_9548_exits_flag    = 0xe0c,
+    .i2c_ext_9548_addr          = 0xe10,
+    .i2c_ext_9548_chan          = 0xe14,
+    .i2c_in_9548_chan           = 0xe18,
+    .i2c_slave                  = 0xe1c,
+    .i2c_reg                    = 0xe20,
+    .i2c_reg_len                = 0xe30,
+    .i2c_data_len               = 0xe34,
+    .i2c_ctrl                   = 0xe38,
+    .i2c_status                 = 0xe3c,
+    .i2c_data_buf               = 0xe80,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x2c,
+    .i2c_reset_on               = 0x00000040,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data7 = {
+    .adap_nr                    = 15,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0xf00,
+    .i2c_filter                 = 0xf04,
+    .i2c_stretch                = 0xf08,
+    .i2c_ext_9548_exits_flag    = 0xf0c,
+    .i2c_ext_9548_addr          = 0xf10,
+    .i2c_ext_9548_chan          = 0xf14,
+    .i2c_in_9548_chan           = 0xf18,
+    .i2c_slave                  = 0xf1c,
+    .i2c_reg                    = 0xf20,
+    .i2c_reg_len                = 0xf30,
+    .i2c_data_len               = 0xf34,
+    .i2c_ctrl                   = 0xf38,
+    .i2c_status                 = 0xf3c,
+    .i2c_data_buf               = 0xf80,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x2c,
+    .i2c_reset_on               = 0x00000080,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data8 = {
+    .adap_nr                    = 16,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1000,
+    .i2c_filter                 = 0x1004,
+    .i2c_stretch                = 0x1008,
+    .i2c_ext_9548_exits_flag    = 0x100c,
+    .i2c_ext_9548_addr          = 0x1010,
+    .i2c_ext_9548_chan          = 0x1014,
+    .i2c_in_9548_chan           = 0x1018,
+    .i2c_slave                  = 0x101c,
+    .i2c_reg                    = 0x1020,
+    .i2c_reg_len                = 0x1030,
+    .i2c_data_len               = 0x1034,
+    .i2c_ctrl                   = 0x1038,
+    .i2c_status                 = 0x103c,
+    .i2c_data_buf               = 0x1080,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x2c,
+    .i2c_reset_on               = 0x00000100,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data9 = {
+    .adap_nr                    = 17,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1100,
+    .i2c_filter                 = 0x1104,
+    .i2c_stretch                = 0x1108,
+    .i2c_ext_9548_exits_flag    = 0x110c,
+    .i2c_ext_9548_addr          = 0x1110,
+    .i2c_ext_9548_chan          = 0x1114,
+    .i2c_in_9548_chan           = 0x1118,
+    .i2c_slave                  = 0x111c,
+    .i2c_reg                    = 0x1120,
+    .i2c_reg_len                = 0x1130,
+    .i2c_data_len               = 0x1134,
+    .i2c_ctrl                   = 0x1138,
+    .i2c_status                 = 0x113c,
+    .i2c_data_buf               = 0x1180,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x2c,
+    .i2c_reset_on               = 0x00000200,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data10 = {
+    .adap_nr                    = 18,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1200,
+    .i2c_filter                 = 0x1204,
+    .i2c_stretch                = 0x1208,
+    .i2c_ext_9548_exits_flag    = 0x120c,
+    .i2c_ext_9548_addr          = 0x1210,
+    .i2c_ext_9548_chan          = 0x1214,
+    .i2c_in_9548_chan           = 0x1218,
+    .i2c_slave                  = 0x121c,
+    .i2c_reg                    = 0x1220,
+    .i2c_reg_len                = 0x1230,
+    .i2c_data_len               = 0x1234,
+    .i2c_ctrl                   = 0x1238,
+    .i2c_status                 = 0x123c,
+    .i2c_data_buf               = 0x1280,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x2c,
+    .i2c_reset_on               = 0x00000400,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data11 = {
+    .adap_nr                    = 19,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1300,
+    .i2c_filter                 = 0x1304,
+    .i2c_stretch                = 0x1308,
+    .i2c_ext_9548_exits_flag    = 0x130c,
+    .i2c_ext_9548_addr          = 0x1310,
+    .i2c_ext_9548_chan          = 0x1314,
+    .i2c_in_9548_chan           = 0x1318,
+    .i2c_slave                  = 0x131c,
+    .i2c_reg                    = 0x1320,
+    .i2c_reg_len                = 0x1330,
+    .i2c_data_len               = 0x1334,
+    .i2c_ctrl                   = 0x1338,
+    .i2c_status                 = 0x133c,
+    .i2c_data_buf               = 0x1380,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x2c,
+    .i2c_reset_on               = 0x00000800,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data12 = {
+    .adap_nr                    = 20,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1400,
+    .i2c_filter                 = 0x1404,
+    .i2c_stretch                = 0x1408,
+    .i2c_ext_9548_exits_flag    = 0x140c,
+    .i2c_ext_9548_addr          = 0x1410,
+    .i2c_ext_9548_chan          = 0x1414,
+    .i2c_in_9548_chan           = 0x1418,
+    .i2c_slave                  = 0x141c,
+    .i2c_reg                    = 0x1420,
+    .i2c_reg_len                = 0x1430,
+    .i2c_data_len               = 0x1434,
+    .i2c_ctrl                   = 0x1438,
+    .i2c_status                 = 0x143c,
+    .i2c_data_buf               = 0x1480,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x2c,
+    .i2c_reset_on               = 0x00001000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data13 = {
+    .adap_nr                    = 21,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1500,
+    .i2c_filter                 = 0x1504,
+    .i2c_stretch                = 0x1508,
+    .i2c_ext_9548_exits_flag    = 0x150c,
+    .i2c_ext_9548_addr          = 0x1510,
+    .i2c_ext_9548_chan          = 0x1514,
+    .i2c_in_9548_chan           = 0x1518,
+    .i2c_slave                  = 0x151c,
+    .i2c_reg                    = 0x1520,
+    .i2c_reg_len                = 0x1530,
+    .i2c_data_len               = 0x1534,
+    .i2c_ctrl                   = 0x1538,
+    .i2c_status                 = 0x153c,
+    .i2c_data_buf               = 0x1580,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x2c,
+    .i2c_reset_on               = 0x00002000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data14 = {
+    .adap_nr                    = 22,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1600,
+    .i2c_filter                 = 0x1604,
+    .i2c_stretch                = 0x1608,
+    .i2c_ext_9548_exits_flag    = 0x160c,
+    .i2c_ext_9548_addr          = 0x1610,
+    .i2c_ext_9548_chan          = 0x1614,
+    .i2c_in_9548_chan           = 0x1618,
+    .i2c_slave                  = 0x161c,
+    .i2c_reg                    = 0x1620,
+    .i2c_reg_len                = 0x1630,
+    .i2c_data_len               = 0x1634,
+    .i2c_ctrl                   = 0x1638,
+    .i2c_status                 = 0x163c,
+    .i2c_data_buf               = 0x1680,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x2c,
+    .i2c_reset_on               = 0x00004000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga_dom_i2c_bus_device_data15 = {
+    .adap_nr                    = 23,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1700,
+    .i2c_filter                 = 0x1704,
+    .i2c_stretch                = 0x1708,
+    .i2c_ext_9548_exits_flag    = 0x170c,
+    .i2c_ext_9548_addr          = 0x1710,
+    .i2c_ext_9548_chan          = 0x1714,
+    .i2c_in_9548_chan           = 0x1718,
+    .i2c_slave                  = 0x171c,
+    .i2c_reg                    = 0x1720,
+    .i2c_reg_len                = 0x1730,
+    .i2c_data_len               = 0x1734,
+    .i2c_ctrl                   = 0x1738,
+    .i2c_status                 = 0x173c,
+    .i2c_data_buf               = 0x1780,
+    .dev_name                   = "/dev/fpga0",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 3,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x2c,
+    .i2c_reset_on               = 0x00008000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data0 = {
+    .adap_nr                    = 24,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x100,
+    .i2c_filter                 = 0x104,
+    .i2c_stretch                = 0x108,
+    .i2c_ext_9548_exits_flag    = 0x10c,
+    .i2c_ext_9548_addr          = 0x110,
+    .i2c_ext_9548_chan          = 0x114,
+    .i2c_in_9548_chan           = 0x118,
+    .i2c_slave                  = 0x11c,
+    .i2c_reg                    = 0x120,
+    .i2c_reg_len                = 0x130,
+    .i2c_data_len               = 0x134,
+    .i2c_ctrl                   = 0x138,
+    .i2c_status                 = 0x13c,
+    .i2c_data_buf               = 0x180,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00000001,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data1 = {
+    .adap_nr                    = 25,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x200,
+    .i2c_filter                 = 0x204,
+    .i2c_stretch                = 0x208,
+    .i2c_ext_9548_exits_flag    = 0x20c,
+    .i2c_ext_9548_addr          = 0x210,
+    .i2c_ext_9548_chan          = 0x214,
+    .i2c_in_9548_chan           = 0x218,
+    .i2c_slave                  = 0x21c,
+    .i2c_reg                    = 0x220,
+    .i2c_reg_len                = 0x230,
+    .i2c_data_len               = 0x234,
+    .i2c_ctrl                   = 0x238,
+    .i2c_status                 = 0x23c,
+    .i2c_data_buf               = 0x280,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00000002,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data2 = {
+    .adap_nr                    = 26,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x300,
+    .i2c_filter                 = 0x304,
+    .i2c_stretch                = 0x308,
+    .i2c_ext_9548_exits_flag    = 0x30c,
+    .i2c_ext_9548_addr          = 0x310,
+    .i2c_ext_9548_chan          = 0x314,
+    .i2c_in_9548_chan           = 0x318,
+    .i2c_slave                  = 0x31c,
+    .i2c_reg                    = 0x320,
+    .i2c_reg_len                = 0x330,
+    .i2c_data_len               = 0x334,
+    .i2c_ctrl                   = 0x338,
+    .i2c_status                 = 0x33c,
+    .i2c_data_buf               = 0x380,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00000004,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data3 = {
+    .adap_nr                    = 27,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x400,
+    .i2c_filter                 = 0x404,
+    .i2c_stretch                = 0x408,
+    .i2c_ext_9548_exits_flag    = 0x40c,
+    .i2c_ext_9548_addr          = 0x410,
+    .i2c_ext_9548_chan          = 0x414,
+    .i2c_in_9548_chan           = 0x418,
+    .i2c_slave                  = 0x41c,
+    .i2c_reg                    = 0x420,
+    .i2c_reg_len                = 0x430,
+    .i2c_data_len               = 0x434,
+    .i2c_ctrl                   = 0x438,
+    .i2c_status                 = 0x43c,
+    .i2c_data_buf               = 0x480,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00000008,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data4 = {
+    .adap_nr                    = 28,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x500,
+    .i2c_filter                 = 0x504,
+    .i2c_stretch                = 0x508,
+    .i2c_ext_9548_exits_flag    = 0x50c,
+    .i2c_ext_9548_addr          = 0x510,
+    .i2c_ext_9548_chan          = 0x514,
+    .i2c_in_9548_chan           = 0x518,
+    .i2c_slave                  = 0x51c,
+    .i2c_reg                    = 0x520,
+    .i2c_reg_len                = 0x530,
+    .i2c_data_len               = 0x534,
+    .i2c_ctrl                   = 0x538,
+    .i2c_status                 = 0x53c,
+    .i2c_data_buf               = 0x580,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00000010,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data5 = {
+    .adap_nr                    = 29,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x600,
+    .i2c_filter                 = 0x604,
+    .i2c_stretch                = 0x608,
+    .i2c_ext_9548_exits_flag    = 0x60c,
+    .i2c_ext_9548_addr          = 0x610,
+    .i2c_ext_9548_chan          = 0x614,
+    .i2c_in_9548_chan           = 0x618,
+    .i2c_slave                  = 0x61c,
+    .i2c_reg                    = 0x620,
+    .i2c_reg_len                = 0x630,
+    .i2c_data_len               = 0x634,
+    .i2c_ctrl                   = 0x638,
+    .i2c_status                 = 0x63c,
+    .i2c_data_buf               = 0x680,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00000020,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data6 = {
+    .adap_nr                    = 30,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x700,
+    .i2c_filter                 = 0x704,
+    .i2c_stretch                = 0x708,
+    .i2c_ext_9548_exits_flag    = 0x70c,
+    .i2c_ext_9548_addr          = 0x710,
+    .i2c_ext_9548_chan          = 0x714,
+    .i2c_in_9548_chan           = 0x718,
+    .i2c_slave                  = 0x71c,
+    .i2c_reg                    = 0x720,
+    .i2c_reg_len                = 0x730,
+    .i2c_data_len               = 0x734,
+    .i2c_ctrl                   = 0x738,
+    .i2c_status                 = 0x73c,
+    .i2c_data_buf               = 0x780,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00000040,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data7 = {
+    .adap_nr                    = 31,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x800,
+    .i2c_filter                 = 0x804,
+    .i2c_stretch                = 0x808,
+    .i2c_ext_9548_exits_flag    = 0x80c,
+    .i2c_ext_9548_addr          = 0x810,
+    .i2c_ext_9548_chan          = 0x814,
+    .i2c_in_9548_chan           = 0x818,
+    .i2c_slave                  = 0x81c,
+    .i2c_reg                    = 0x820,
+    .i2c_reg_len                = 0x830,
+    .i2c_data_len               = 0x834,
+    .i2c_ctrl                   = 0x838,
+    .i2c_status                 = 0x83c,
+    .i2c_data_buf               = 0x880,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00000080,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data8 = {
+    .adap_nr                    = 32,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x900,
+    .i2c_filter                 = 0x904,
+    .i2c_stretch                = 0x908,
+    .i2c_ext_9548_exits_flag    = 0x90c,
+    .i2c_ext_9548_addr          = 0x910,
+    .i2c_ext_9548_chan          = 0x914,
+    .i2c_in_9548_chan           = 0x918,
+    .i2c_slave                  = 0x91c,
+    .i2c_reg                    = 0x920,
+    .i2c_reg_len                = 0x930,
+    .i2c_data_len               = 0x934,
+    .i2c_ctrl                   = 0x938,
+    .i2c_status                 = 0x93c,
+    .i2c_data_buf               = 0x980,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00000100,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data9 = {
+    .adap_nr                    = 33,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0xa00,
+    .i2c_filter                 = 0xa04,
+    .i2c_stretch                = 0xa08,
+    .i2c_ext_9548_exits_flag    = 0xa0c,
+    .i2c_ext_9548_addr          = 0xa10,
+    .i2c_ext_9548_chan          = 0xa14,
+    .i2c_in_9548_chan           = 0xa18,
+    .i2c_slave                  = 0xa1c,
+    .i2c_reg                    = 0xa20,
+    .i2c_reg_len                = 0xa30,
+    .i2c_data_len               = 0xa34,
+    .i2c_ctrl                   = 0xa38,
+    .i2c_status                 = 0xa3c,
+    .i2c_data_buf               = 0xa80,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00000200,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data10 = {
+    .adap_nr                    = 34,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0xb00,
+    .i2c_filter                 = 0xb04,
+    .i2c_stretch                = 0xb08,
+    .i2c_ext_9548_exits_flag    = 0xb0c,
+    .i2c_ext_9548_addr          = 0xb10,
+    .i2c_ext_9548_chan          = 0xb14,
+    .i2c_in_9548_chan           = 0xb18,
+    .i2c_slave                  = 0xb1c,
+    .i2c_reg                    = 0xb20,
+    .i2c_reg_len                = 0xb30,
+    .i2c_data_len               = 0xb34,
+    .i2c_ctrl                   = 0xb38,
+    .i2c_status                 = 0xb3c,
+    .i2c_data_buf               = 0xb80,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00000400,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data11 = {
+    .adap_nr                    = 35,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0xc00,
+    .i2c_filter                 = 0xc04,
+    .i2c_stretch                = 0xc08,
+    .i2c_ext_9548_exits_flag    = 0xc0c,
+    .i2c_ext_9548_addr          = 0xc10,
+    .i2c_ext_9548_chan          = 0xc14,
+    .i2c_in_9548_chan           = 0xc18,
+    .i2c_slave                  = 0xc1c,
+    .i2c_reg                    = 0xc20,
+    .i2c_reg_len                = 0xc30,
+    .i2c_data_len               = 0xc34,
+    .i2c_ctrl                   = 0xc38,
+    .i2c_status                 = 0xc3c,
+    .i2c_data_buf               = 0xc80,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00000800,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data12 = {
+    .adap_nr                    = 36,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0xd00,
+    .i2c_filter                 = 0xd04,
+    .i2c_stretch                = 0xd08,
+    .i2c_ext_9548_exits_flag    = 0xd0c,
+    .i2c_ext_9548_addr          = 0xd10,
+    .i2c_ext_9548_chan          = 0xd14,
+    .i2c_in_9548_chan           = 0xd18,
+    .i2c_slave                  = 0xd1c,
+    .i2c_reg                    = 0xd20,
+    .i2c_reg_len                = 0xd30,
+    .i2c_data_len               = 0xd34,
+    .i2c_ctrl                   = 0xd38,
+    .i2c_status                 = 0xd3c,
+    .i2c_data_buf               = 0xd80,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00001000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data13 = {
+    .adap_nr                    = 37,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0xe00,
+    .i2c_filter                 = 0xe04,
+    .i2c_stretch                = 0xe08,
+    .i2c_ext_9548_exits_flag    = 0xe0c,
+    .i2c_ext_9548_addr          = 0xe10,
+    .i2c_ext_9548_chan          = 0xe14,
+    .i2c_in_9548_chan           = 0xe18,
+    .i2c_slave                  = 0xe1c,
+    .i2c_reg                    = 0xe20,
+    .i2c_reg_len                = 0xe30,
+    .i2c_data_len               = 0xe34,
+    .i2c_ctrl                   = 0xe38,
+    .i2c_status                 = 0xe3c,
+    .i2c_data_buf               = 0xe80,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00002000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data14 = {
+    .adap_nr                    = 38,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0xf00,
+    .i2c_filter                 = 0xf04,
+    .i2c_stretch                = 0xf08,
+    .i2c_ext_9548_exits_flag    = 0xf0c,
+    .i2c_ext_9548_addr          = 0xf10,
+    .i2c_ext_9548_chan          = 0xf14,
+    .i2c_in_9548_chan           = 0xf18,
+    .i2c_slave                  = 0xf1c,
+    .i2c_reg                    = 0xf20,
+    .i2c_reg_len                = 0xf30,
+    .i2c_data_len               = 0xf34,
+    .i2c_ctrl                   = 0xf38,
+    .i2c_status                 = 0xf3c,
+    .i2c_data_buf               = 0xf80,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00004000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data15 = {
+    .adap_nr                    = 39,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1000,
+    .i2c_filter                 = 0x1004,
+    .i2c_stretch                = 0x1008,
+    .i2c_ext_9548_exits_flag    = 0x100c,
+    .i2c_ext_9548_addr          = 0x1010,
+    .i2c_ext_9548_chan          = 0x1014,
+    .i2c_in_9548_chan           = 0x1018,
+    .i2c_slave                  = 0x101c,
+    .i2c_reg                    = 0x1020,
+    .i2c_reg_len                = 0x1030,
+    .i2c_data_len               = 0x1034,
+    .i2c_ctrl                   = 0x1038,
+    .i2c_status                 = 0x103c,
+    .i2c_data_buf               = 0x1080,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00008000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data16 = {
+    .adap_nr                    = 40,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1100,
+    .i2c_filter                 = 0x1104,
+    .i2c_stretch                = 0x1108,
+    .i2c_ext_9548_exits_flag    = 0x110c,
+    .i2c_ext_9548_addr          = 0x1110,
+    .i2c_ext_9548_chan          = 0x1114,
+    .i2c_in_9548_chan           = 0x1118,
+    .i2c_slave                  = 0x111c,
+    .i2c_reg                    = 0x1120,
+    .i2c_reg_len                = 0x1130,
+    .i2c_data_len               = 0x1134,
+    .i2c_ctrl                   = 0x1138,
+    .i2c_status                 = 0x113c,
+    .i2c_data_buf               = 0x1180,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00010000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data17 = {
+    .adap_nr                    = 41,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1200,
+    .i2c_filter                 = 0x1204,
+    .i2c_stretch                = 0x1208,
+    .i2c_ext_9548_exits_flag    = 0x120c,
+    .i2c_ext_9548_addr          = 0x1210,
+    .i2c_ext_9548_chan          = 0x1214,
+    .i2c_in_9548_chan           = 0x1218,
+    .i2c_slave                  = 0x121c,
+    .i2c_reg                    = 0x1220,
+    .i2c_reg_len                = 0x1230,
+    .i2c_data_len               = 0x1234,
+    .i2c_ctrl                   = 0x1238,
+    .i2c_status                 = 0x123c,
+    .i2c_data_buf               = 0x1280,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00020000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data18 = {
+    .adap_nr                    = 42,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1300,
+    .i2c_filter                 = 0x1304,
+    .i2c_stretch                = 0x1308,
+    .i2c_ext_9548_exits_flag    = 0x130c,
+    .i2c_ext_9548_addr          = 0x1310,
+    .i2c_ext_9548_chan          = 0x1314,
+    .i2c_in_9548_chan           = 0x1318,
+    .i2c_slave                  = 0x131c,
+    .i2c_reg                    = 0x1320,
+    .i2c_reg_len                = 0x1330,
+    .i2c_data_len               = 0x1334,
+    .i2c_ctrl                   = 0x1338,
+    .i2c_status                 = 0x133c,
+    .i2c_data_buf               = 0x1380,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00040000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data19 = {
+    .adap_nr                    = 43,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1400,
+    .i2c_filter                 = 0x1404,
+    .i2c_stretch                = 0x1408,
+    .i2c_ext_9548_exits_flag    = 0x140c,
+    .i2c_ext_9548_addr          = 0x1410,
+    .i2c_ext_9548_chan          = 0x1414,
+    .i2c_in_9548_chan           = 0x1418,
+    .i2c_slave                  = 0x141c,
+    .i2c_reg                    = 0x1420,
+    .i2c_reg_len                = 0x1430,
+    .i2c_data_len               = 0x1434,
+    .i2c_ctrl                   = 0x1438,
+    .i2c_status                 = 0x143c,
+    .i2c_data_buf               = 0x1480,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00080000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data20 = {
+    .adap_nr                    = 44,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1500,
+    .i2c_filter                 = 0x1504,
+    .i2c_stretch                = 0x1508,
+    .i2c_ext_9548_exits_flag    = 0x150c,
+    .i2c_ext_9548_addr          = 0x1510,
+    .i2c_ext_9548_chan          = 0x1514,
+    .i2c_in_9548_chan           = 0x1518,
+    .i2c_slave                  = 0x151c,
+    .i2c_reg                    = 0x1520,
+    .i2c_reg_len                = 0x1530,
+    .i2c_data_len               = 0x1534,
+    .i2c_ctrl                   = 0x1538,
+    .i2c_status                 = 0x153c,
+    .i2c_data_buf               = 0x1580,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00100000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data21 = {
+    .adap_nr                    = 45,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1600,
+    .i2c_filter                 = 0x1604,
+    .i2c_stretch                = 0x1608,
+    .i2c_ext_9548_exits_flag    = 0x160c,
+    .i2c_ext_9548_addr          = 0x1610,
+    .i2c_ext_9548_chan          = 0x1614,
+    .i2c_in_9548_chan           = 0x1618,
+    .i2c_slave                  = 0x161c,
+    .i2c_reg                    = 0x1620,
+    .i2c_reg_len                = 0x1630,
+    .i2c_data_len               = 0x1634,
+    .i2c_ctrl                   = 0x1638,
+    .i2c_status                 = 0x163c,
+    .i2c_data_buf               = 0x1680,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00200000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data22 = {
+    .adap_nr                    = 46,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1700,
+    .i2c_filter                 = 0x1704,
+    .i2c_stretch                = 0x1708,
+    .i2c_ext_9548_exits_flag    = 0x170c,
+    .i2c_ext_9548_addr          = 0x1710,
+    .i2c_ext_9548_chan          = 0x1714,
+    .i2c_in_9548_chan           = 0x1718,
+    .i2c_slave                  = 0x171c,
+    .i2c_reg                    = 0x1720,
+    .i2c_reg_len                = 0x1730,
+    .i2c_data_len               = 0x1734,
+    .i2c_ctrl                   = 0x1738,
+    .i2c_status                 = 0x173c,
+    .i2c_data_buf               = 0x1780,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00400000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data23 = {
+    .adap_nr                    = 47,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1800,
+    .i2c_filter                 = 0x1804,
+    .i2c_stretch                = 0x1808,
+    .i2c_ext_9548_exits_flag    = 0x180c,
+    .i2c_ext_9548_addr          = 0x1810,
+    .i2c_ext_9548_chan          = 0x1814,
+    .i2c_in_9548_chan           = 0x1818,
+    .i2c_slave                  = 0x181c,
+    .i2c_reg                    = 0x1820,
+    .i2c_reg_len                = 0x1830,
+    .i2c_data_len               = 0x1834,
+    .i2c_ctrl                   = 0x1838,
+    .i2c_status                 = 0x183c,
+    .i2c_data_buf               = 0x1880,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x00800000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data24 = {
+    .adap_nr                    = 48,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1900,
+    .i2c_filter                 = 0x1904,
+    .i2c_stretch                = 0x1908,
+    .i2c_ext_9548_exits_flag    = 0x190c,
+    .i2c_ext_9548_addr          = 0x1910,
+    .i2c_ext_9548_chan          = 0x1914,
+    .i2c_in_9548_chan           = 0x1918,
+    .i2c_slave                  = 0x191c,
+    .i2c_reg                    = 0x1920,
+    .i2c_reg_len                = 0x1930,
+    .i2c_data_len               = 0x1934,
+    .i2c_ctrl                   = 0x1938,
+    .i2c_status                 = 0x193c,
+    .i2c_data_buf               = 0x1980,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x01000000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data25 = {
+    .adap_nr                    = 49,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1a00,
+    .i2c_filter                 = 0x1a04,
+    .i2c_stretch                = 0x1a08,
+    .i2c_ext_9548_exits_flag    = 0x1a0c,
+    .i2c_ext_9548_addr          = 0x1a10,
+    .i2c_ext_9548_chan          = 0x1a14,
+    .i2c_in_9548_chan           = 0x1a18,
+    .i2c_slave                  = 0x1a1c,
+    .i2c_reg                    = 0x1a20,
+    .i2c_reg_len                = 0x1a30,
+    .i2c_data_len               = 0x1a34,
+    .i2c_ctrl                   = 0x1a38,
+    .i2c_status                 = 0x1a3c,
+    .i2c_data_buf               = 0x1a80,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x02000000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data26 = {
+    .adap_nr                    = 50,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1b00,
+    .i2c_filter                 = 0x1b04,
+    .i2c_stretch                = 0x1b08,
+    .i2c_ext_9548_exits_flag    = 0x1b0c,
+    .i2c_ext_9548_addr          = 0x1b10,
+    .i2c_ext_9548_chan          = 0x1b14,
+    .i2c_in_9548_chan           = 0x1b18,
+    .i2c_slave                  = 0x1b1c,
+    .i2c_reg                    = 0x1b20,
+    .i2c_reg_len                = 0x1b30,
+    .i2c_data_len               = 0x1b34,
+    .i2c_ctrl                   = 0x1b38,
+    .i2c_status                 = 0x1b3c,
+    .i2c_data_buf               = 0x1b80,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x04000000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data27 = {
+    .adap_nr                    = 51,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1c00,
+    .i2c_filter                 = 0x1c04,
+    .i2c_stretch                = 0x1c08,
+    .i2c_ext_9548_exits_flag    = 0x1c0c,
+    .i2c_ext_9548_addr          = 0x1c10,
+    .i2c_ext_9548_chan          = 0x1c14,
+    .i2c_in_9548_chan           = 0x1c18,
+    .i2c_slave                  = 0x1c1c,
+    .i2c_reg                    = 0x1c20,
+    .i2c_reg_len                = 0x1c30,
+    .i2c_data_len               = 0x1c34,
+    .i2c_ctrl                   = 0x1c38,
+    .i2c_status                 = 0x1c3c,
+    .i2c_data_buf               = 0x1c80,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x08000000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data28 = {
+    .adap_nr                    = 52,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1d00,
+    .i2c_filter                 = 0x1d04,
+    .i2c_stretch                = 0x1d08,
+    .i2c_ext_9548_exits_flag    = 0x1d0c,
+    .i2c_ext_9548_addr          = 0x1d10,
+    .i2c_ext_9548_chan          = 0x1d14,
+    .i2c_in_9548_chan           = 0x1d18,
+    .i2c_slave                  = 0x1d1c,
+    .i2c_reg                    = 0x1d20,
+    .i2c_reg_len                = 0x1d30,
+    .i2c_data_len               = 0x1d34,
+    .i2c_ctrl                   = 0x1d38,
+    .i2c_status                 = 0x1d3c,
+    .i2c_data_buf               = 0x1d80,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x10000000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data29 = {
+    .adap_nr                    = 53,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1e00,
+    .i2c_filter                 = 0x1e04,
+    .i2c_stretch                = 0x1e08,
+    .i2c_ext_9548_exits_flag    = 0x1e0c,
+    .i2c_ext_9548_addr          = 0x1e10,
+    .i2c_ext_9548_chan          = 0x1e14,
+    .i2c_in_9548_chan           = 0x1e18,
+    .i2c_slave                  = 0x1e1c,
+    .i2c_reg                    = 0x1e20,
+    .i2c_reg_len                = 0x1e30,
+    .i2c_data_len               = 0x1e34,
+    .i2c_ctrl                   = 0x1e38,
+    .i2c_status                 = 0x1e3c,
+    .i2c_data_buf               = 0x1e80,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x20000000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data30 = {
+    .adap_nr                    = 54,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x1f00,
+    .i2c_filter                 = 0x1f04,
+    .i2c_stretch                = 0x1f08,
+    .i2c_ext_9548_exits_flag    = 0x1f0c,
+    .i2c_ext_9548_addr          = 0x1f10,
+    .i2c_ext_9548_chan          = 0x1f14,
+    .i2c_in_9548_chan           = 0x1f18,
+    .i2c_slave                  = 0x1f1c,
+    .i2c_reg                    = 0x1f20,
+    .i2c_reg_len                = 0x1f30,
+    .i2c_data_len               = 0x1f34,
+    .i2c_ctrl                   = 0x1f38,
+    .i2c_status                 = 0x1f3c,
+    .i2c_data_buf               = 0x1f80,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x40000000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data31 = {
+    .adap_nr                    = 55,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x2000,
+    .i2c_filter                 = 0x2004,
+    .i2c_stretch                = 0x2008,
+    .i2c_ext_9548_exits_flag    = 0x200c,
+    .i2c_ext_9548_addr          = 0x2010,
+    .i2c_ext_9548_chan          = 0x2014,
+    .i2c_in_9548_chan           = 0x2018,
+    .i2c_slave                  = 0x201c,
+    .i2c_reg                    = 0x2020,
+    .i2c_reg_len                = 0x2030,
+    .i2c_data_len               = 0x2034,
+    .i2c_ctrl                   = 0x2038,
+    .i2c_status                 = 0x203c,
+    .i2c_data_buf               = 0x2080,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x1c,
+    .i2c_reset_on               = 0x80000000,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_i2c_bus_device_data0 = {
+    .adap_nr                    = 56,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x2100,
+    .i2c_filter                 = 0x2104,
+    .i2c_stretch                = 0x2108,
+    .i2c_ext_9548_exits_flag    = 0x210c,
+    .i2c_ext_9548_addr          = 0x2110,
+    .i2c_ext_9548_chan          = 0x2114,
+    .i2c_in_9548_chan           = 0x2118,
+    .i2c_slave                  = 0x211c,
+    .i2c_reg                    = 0x2120,
+    .i2c_reg_len                = 0x2130,
+    .i2c_data_len               = 0x2134,
+    .i2c_ctrl                   = 0x2138,
+    .i2c_status                 = 0x213c,
+    .i2c_data_buf               = 0x2180,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x3c,
+    .i2c_reset_on               = 0x00000001,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static fpga_i2c_bus_device_t fpga1_i2c_bus_device_data1 = {
+    .adap_nr                    = 57,
+    .i2c_timeout                = 3000,
+    .i2c_scale                  = 0x2200,
+    .i2c_filter                 = 0x2204,
+    .i2c_stretch                = 0x2208,
+    .i2c_ext_9548_exits_flag    = 0x220c,
+    .i2c_ext_9548_addr          = 0x2210,
+    .i2c_ext_9548_chan          = 0x2214,
+    .i2c_in_9548_chan           = 0x2218,
+    .i2c_slave                  = 0x221c,
+    .i2c_reg                    = 0x2220,
+    .i2c_reg_len                = 0x2230,
+    .i2c_data_len               = 0x2234,
+    .i2c_ctrl                   = 0x2238,
+    .i2c_status                 = 0x223c,
+    .i2c_data_buf               = 0x2280,
+    .dev_name                   = "/dev/fpga1",
+    .i2c_scale_value            = 0x4e,
+    .i2c_filter_value           = 0x7c,
+    .i2c_stretch_value          = 0x7c,
+    .i2c_func_mode              = 5,
+    .i2c_adap_reset_flag        = 1,
+    .i2c_reset_addr             = 0x3c,
+    .i2c_reset_on               = 0x00000002,
+    .i2c_reset_off              = 0x00000000,
+    .i2c_rst_delay_b            = 0,
+    .i2c_rst_delay              = 1,
+    .i2c_rst_delay_a            = 1,
+};
+
+static void wb_fpga_i2c_bus_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device fpga_i2c_bus_device[] = {
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &fpga_i2c_bus_device_data0,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &fpga_i2c_bus_device_data1,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 3,
+        .dev    = {
+            .platform_data  = &fpga_i2c_bus_device_data2,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 4,
+        .dev    = {
+            .platform_data  = &fpga_i2c_bus_device_data3,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 5,
+        .dev    = {
+            .platform_data  = &fpga_i2c_bus_device_data4,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 6,
+        .dev    = {
+            .platform_data  = &fpga_i2c_bus_device_data5,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 7,
+        .dev    = {
+            .platform_data  = &fpga_i2c_bus_device_data6,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 8,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data0,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 9,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data1,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 10,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data2,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 11,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data3,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 12,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data4,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 13,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data5,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 14,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data6,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 15,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data7,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 16,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data8,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 17,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data9,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 18,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data10,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 19,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data11,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 20,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data12,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 21,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data13,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 22,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data14,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 23,
+        .dev    = {
+            .platform_data  = &fpga_dom_i2c_bus_device_data15,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 24,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data0,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 25,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data1,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 26,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data2,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 27,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data3,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 28,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data4,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 29,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data5,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 30,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data6,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 31,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data7,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 32,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data8,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 33,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data9,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 34,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data10,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 35,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data11,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 36,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data12,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 37,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data13,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 38,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data14,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 39,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data15,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 40,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data16,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 41,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data17,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 42,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data18,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 43,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data19,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 44,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data20,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 45,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data21,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 46,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data22,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 47,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data23,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 48,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data24,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 49,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data25,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 50,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data26,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 51,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data27,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 52,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data28,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 53,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data29,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 54,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data30,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 55,
+        .dev    = {
+            .platform_data  = &fpga1_dom_i2c_bus_device_data31,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 56,
+        .dev    = {
+            .platform_data  = &fpga1_i2c_bus_device_data0,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+    {
+        .name   = "wb-fpga-i2c",
+        .id = 57,
+        .dev    = {
+            .platform_data  = &fpga1_i2c_bus_device_data1,
+            .release = wb_fpga_i2c_bus_device_release,
+        },
+    },
+};
+
+static int __init wb_fpga_i2c_bus_device_init(void)
+{
+    int i;
+    int ret = 0;
+    fpga_i2c_bus_device_t *fpga_i2c_bus_device_data;
+
+    WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(fpga_i2c_bus_device); i++) {
+        fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data;
+        ret = platform_device_register(&fpga_i2c_bus_device[i]);
+        if (ret < 0) {
+            fpga_i2c_bus_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-fpga-i2c.%d register failed!\n", i + 1);
+        } else {
+            fpga_i2c_bus_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_fpga_i2c_bus_device_exit(void)
+{
+    int i;
+    fpga_i2c_bus_device_t *fpga_i2c_bus_device_data;
+
+    WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(fpga_i2c_bus_device) - 1; i >= 0; i--) {
+        fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data;
+        if (fpga_i2c_bus_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&fpga_i2c_bus_device[i]);
+        }
+    }
+}
+
+module_init(wb_fpga_i2c_bus_device_init);
+module_exit(wb_fpga_i2c_bus_device_exit);
+MODULE_DESCRIPTION("FPGA I2C Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_pca954x_device.c
new file mode 100644
index 000000000000..ecb846047676
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_pca954x_device.c
@@ -0,0 +1,832 @@
+/*
+ * An wb_fpga_pca954x_device driver for fpga pca954x device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <fpga_i2c.h>
+
+static int g_wb_fpga_pca954x_device_debug = 0;
+static int g_wb_fpga_pca954x_device_error = 0;
+
+module_param(g_wb_fpga_pca954x_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_fpga_pca954x_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_fpga_pca954x_device_debug) { \
+        printk(KERN_INFO "[WB_FPGA_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_FPGA_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_fpga_pca954x_device_error) { \
+        printk(KERN_ERR "[WB_FPGA_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static fpga_pca954x_device_t fpga_pca954x_device_data0 = {
+    .i2c_bus = 2,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 74,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data1 = {
+    .i2c_bus = 74,
+    .i2c_addr = 0x77,
+    .pca9548_base_nr = 75,
+    .fpga_9548_flag = 2,
+    .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data2 = {
+    .i2c_bus = 199,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 200,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data3 = {
+    .i2c_bus = 200,
+    .i2c_addr = 0x76,
+    .pca9548_base_nr = 83,
+    .fpga_9548_flag = 2,
+    .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data4 = {
+    .i2c_bus = 3,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 91,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data5 = {
+    .i2c_bus = 91,
+    .i2c_addr = 0x77,
+    .pca9548_base_nr = 92,
+    .fpga_9548_flag = 2,
+    .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data6 = {
+    .i2c_bus = 4,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 100,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data7 = {
+    .i2c_bus = 100,
+    .i2c_addr = 0x77,
+    .pca9548_base_nr = 101,
+    .fpga_9548_flag = 2,
+    .fpga_9548_reset_flag = 1,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data8 = {
+    .i2c_bus = 5,
+    .i2c_addr = 0x77,
+    .pca9548_base_nr = 109,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data9 = {
+    .i2c_bus = 6,
+    .i2c_addr = 0x77,
+    .pca9548_base_nr = 117,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data10 = {
+    .i2c_bus = 7,
+    .i2c_addr = 0x77,
+    .pca9548_base_nr = 125,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data11 = {
+    .i2c_bus = 8,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 133,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data12 = {
+    .i2c_bus = 9,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 137,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data13 = {
+    .i2c_bus = 10,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 141,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data14 = {
+    .i2c_bus = 11,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 145,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data15 = {
+    .i2c_bus = 12,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 149,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data16 = {
+    .i2c_bus = 13,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 153,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data17 = {
+    .i2c_bus = 14,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 157,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data18 = {
+    .i2c_bus = 15,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 161,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data19 = {
+    .i2c_bus = 16,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 165,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data20 = {
+    .i2c_bus = 17,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 169,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data21 = {
+    .i2c_bus = 18,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 173,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data22 = {
+    .i2c_bus = 19,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 177,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data23 = {
+    .i2c_bus = 20,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 181,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data24 = {
+    .i2c_bus = 21,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 185,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data25 = {
+    .i2c_bus = 22,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 189,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data26 = {
+    .i2c_bus = 23,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 193,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data27 = {
+    .i2c_bus = 24,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 135,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data28 = {
+    .i2c_bus = 25,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 136,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data29 = {
+    .i2c_bus = 26,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 139,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data30 = {
+    .i2c_bus = 27,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 140,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data31 = {
+    .i2c_bus = 28,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 143,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data32 = {
+    .i2c_bus = 29,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 144,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data33 = {
+    .i2c_bus = 30,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 147,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data34 = {
+    .i2c_bus = 31,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 148,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data35 = {
+    .i2c_bus = 32,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 151,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data36 = {
+    .i2c_bus = 33,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 152,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data37 = {
+    .i2c_bus = 34,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 155,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data38 = {
+    .i2c_bus = 35,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 156,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data39 = {
+    .i2c_bus = 36,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 159,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data40 = {
+    .i2c_bus = 37,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 160,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data41 = {
+    .i2c_bus = 38,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 163,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data42 = {
+    .i2c_bus = 39,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 164,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data43 = {
+    .i2c_bus = 40,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 167,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data44 = {
+    .i2c_bus = 41,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 168,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data45 = {
+    .i2c_bus = 42,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 171,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data46 = {
+    .i2c_bus = 43,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 172,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data47 = {
+    .i2c_bus = 44,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 175,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data48 = {
+    .i2c_bus = 45,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 176,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data49 = {
+    .i2c_bus = 46,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 179,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data50 = {
+    .i2c_bus = 47,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 180,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data51 = {
+    .i2c_bus = 48,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 183,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data52 = {
+    .i2c_bus = 49,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 184,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data53 = {
+    .i2c_bus = 50,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 187,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data54 = {
+    .i2c_bus = 51,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 188,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data55 = {
+    .i2c_bus = 52,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 191,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data56 = {
+    .i2c_bus = 53,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 192,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data57 = {
+    .i2c_bus = 54,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 195,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data58 = {
+    .i2c_bus = 55,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 196,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data59 = {
+    .i2c_bus = 56,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 197,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+static fpga_pca954x_device_t fpga_pca954x_device_data60 = {
+    .i2c_bus = 57,
+    .i2c_addr = 0x70,
+    .pca9548_base_nr = 198,
+    .fpga_9548_flag = 1,
+    .fpga_9548_reset_flag = 0,
+};
+
+struct i2c_board_info fpga_pca954x_device_info[] = {
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data0,
+    },
+    {
+        .type = "wb_fpga_pca9548",
+        .platform_data = &fpga_pca954x_device_data1,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data2,
+    },
+    {
+        .type = "wb_fpga_pca9548",
+        .platform_data = &fpga_pca954x_device_data3,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data4,
+    },
+    {
+        .type = "wb_fpga_pca9548",
+        .platform_data = &fpga_pca954x_device_data5,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data6,
+    },
+    {
+        .type = "wb_fpga_pca9548",
+        .platform_data = &fpga_pca954x_device_data7,
+    },
+    {
+        .type = "wb_fpga_pca9548",
+        .platform_data = &fpga_pca954x_device_data8,
+    },
+    {
+        .type = "wb_fpga_pca9548",
+        .platform_data = &fpga_pca954x_device_data9,
+    },
+    {
+        .type = "wb_fpga_pca9548",
+        .platform_data = &fpga_pca954x_device_data10,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data11,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data12,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data13,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data14,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data15,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data16,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data17,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data18,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data19,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data20,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data21,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data22,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data23,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data24,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data25,
+    },
+    {
+        .type = "wb_fpga_pca9542",
+        .platform_data = &fpga_pca954x_device_data26,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data27,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data28,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data29,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data30,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data31,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data32,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data33,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data34,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data35,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data36,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data37,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data38,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data39,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data40,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data41,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data42,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data43,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data44,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data45,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data46,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data47,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data48,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data49,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data50,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data51,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data52,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data53,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data54,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data55,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data56,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data57,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data58,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data59,
+    },
+    {
+        .type = "wb_fpga_pca9541",
+        .platform_data = &fpga_pca954x_device_data60,
+    },
+};
+
+static int __init wb_fpga_pca954x_device_init(void)
+{
+    int i;
+    struct i2c_adapter *adap;
+    struct i2c_client *client;
+    fpga_pca954x_device_t *fpga_pca954x_device_data;
+
+    WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(fpga_pca954x_device_info); i++) {
+        fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data;
+        fpga_pca954x_device_info[i].addr = fpga_pca954x_device_data->i2c_addr;
+        adap = i2c_get_adapter(fpga_pca954x_device_data->i2c_bus);
+        if (adap == NULL) {
+            fpga_pca954x_device_data->client = NULL;
+            printk(KERN_ERR "get i2c bus %d adapter fail.\n", fpga_pca954x_device_data->i2c_bus);
+            continue;
+        }
+        client = i2c_new_client_device(adap, &fpga_pca954x_device_info[i]);
+        if (!client) {
+            fpga_pca954x_device_data->client = NULL;
+            printk(KERN_ERR "Failed to register fpga pca954x device %d at bus %d!\n",
+                fpga_pca954x_device_data->i2c_addr, fpga_pca954x_device_data->i2c_bus);
+        } else {
+            fpga_pca954x_device_data->client = client;
+        }
+        i2c_put_adapter(adap);
+    }
+    return 0;
+}
+
+static void __exit wb_fpga_pca954x_device_exit(void)
+{
+    int i;
+    fpga_pca954x_device_t *fpga_pca954x_device_data;
+
+    WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(fpga_pca954x_device_info) - 1; i >= 0; i--) {
+        fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data;
+        if (fpga_pca954x_device_data->client) {
+            i2c_unregister_device(fpga_pca954x_device_data->client);
+            fpga_pca954x_device_data->client = NULL;
+        }
+    }
+}
+
+module_init(wb_fpga_pca954x_device_init);
+module_exit(wb_fpga_pca954x_device_exit);
+MODULE_DESCRIPTION("FPGA PCA954X Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_dev_device.c
new file mode 100644
index 000000000000..0f97f8f5e040
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_dev_device.c
@@ -0,0 +1,190 @@
+/*
+ * An wb_io_dev_device driver for io device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_i2c_dev.h>
+
+static int g_wb_i2c_dev_device_debug = 0;
+static int g_wb_i2c_dev_device_error = 0;
+
+module_param(g_wb_i2c_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_i2c_dev_device_debug) { \
+        printk(KERN_INFO "[WB_I2C_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_I2C_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_i2c_dev_device_error) { \
+        printk(KERN_ERR "[WB_I2C_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static i2c_dev_device_t i2c_dev_device_data0 = {
+    .i2c_bus = 109,
+    .i2c_addr = 0x1d,
+    .i2c_name = "cpld4",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data1 = {
+    .i2c_bus = 110,
+    .i2c_addr = 0x2d,
+    .i2c_name = "cpld5",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data2 = {
+    .i2c_bus = 111,
+    .i2c_addr = 0x3d,
+    .i2c_name = "cpld6",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data3 = {
+    .i2c_bus = 112,
+    .i2c_addr = 0x4d,
+    .i2c_name = "cpld7",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data4 = {
+    .i2c_bus = 92,
+    .i2c_addr = 0x0d,
+    .i2c_name = "cpld8",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data5 = {
+    .i2c_bus = 101,
+    .i2c_addr = 0x0d,
+    .i2c_name = "cpld9",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+struct i2c_board_info i2c_dev_device_info[] = {
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data0,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data1,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data2,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data3,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data4,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data5,
+    },
+};
+
+static int __init wb_i2c_dev_device_init(void)
+{
+    int i;
+    struct i2c_adapter *adap;
+    struct i2c_client *client;
+    i2c_dev_device_t *i2c_dev_device_data;
+
+    WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(i2c_dev_device_info); i++) {
+        i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+        i2c_dev_device_info[i].addr = i2c_dev_device_data->i2c_addr;
+        adap = i2c_get_adapter(i2c_dev_device_data->i2c_bus);
+        if (adap == NULL) {
+            i2c_dev_device_data->client = NULL;
+            printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_dev_device_data->i2c_bus);
+            continue;
+        }
+        client = i2c_new_client_device(adap, &i2c_dev_device_info[i]);
+        if (!client) {
+            i2c_dev_device_data->client = NULL;
+            printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n",
+                i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus);
+        } else {
+            i2c_dev_device_data->client = client;
+        }
+        i2c_put_adapter(adap);
+    }
+    return 0;
+}
+
+static void __exit wb_i2c_dev_device_exit(void)
+{
+    int i;
+    i2c_dev_device_t *i2c_dev_device_data;
+
+    WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(i2c_dev_device_info) - 1; i >= 0; i--) {
+        i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+        if (i2c_dev_device_data->client) {
+            i2c_unregister_device(i2c_dev_device_data->client);
+            i2c_dev_device_data->client = NULL;
+        }
+    }
+}
+
+module_init(wb_i2c_dev_device_init);
+module_exit(wb_i2c_dev_device_exit);
+MODULE_DESCRIPTION("I2C DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_mux_pca954x_device.c
new file mode 100644
index 000000000000..dc54dee29fce
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_mux_pca954x_device.c
@@ -0,0 +1,146 @@
+/*
+ * An wb_i2c_mux_pca954x_device driver for pca954x i2c load device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_i2c_mux_pca954x.h>
+
+static int g_wb_i2c_mux_pca954x_device_debug = 0;
+static int g_wb_i2c_mux_pca954x_device_error = 0;
+
+module_param(g_wb_i2c_mux_pca954x_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_mux_pca954x_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_i2c_mux_pca954x_device_debug) { \
+        printk(KERN_INFO "[WB_I2C_MUX_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_i2c_mux_pca954x_device_error) { \
+        printk(KERN_ERR "[WB_I2C_MUX_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data0 = {
+    .i2c_bus                        = 1,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 1,
+    .close_chan_force_reset         = 1,
+    .pca9548_base_nr                = 58,
+    .pca9548_reset_type             = PCA9548_RESET_IO,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .io_attr.io_addr            = 0x915,
+        .io_attr.mask               = 0x20,
+        .io_attr.reset_on           = 0,
+        .io_attr.reset_off          = 0x20,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data1 = {
+    .i2c_bus                        = 1,
+    .i2c_addr                       = 0x73,
+    .probe_disable                  = 1,
+    .select_chan_check              = 1,
+    .close_chan_force_reset         = 1,
+    .pca9548_base_nr                = 66,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga1",
+        .file_attr.offset           = 0x40,
+        .file_attr.mask             = 0x1,
+        .file_attr.reset_on         = 0x0,
+        .file_attr.reset_off        = 0x1,
+    },
+};
+
+struct i2c_board_info i2c_mux_pca954x_device_info[] = {
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data0,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data1,
+    },
+};
+
+static int __init wb_i2c_mux_pca954x_device_init(void)
+{
+    int i;
+    struct i2c_adapter *adap;
+    struct i2c_client *client;
+    i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data;
+    WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(i2c_mux_pca954x_device_info); i++) {
+        i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data;
+        i2c_mux_pca954x_device_info[i].addr = i2c_mux_pca954x_device_data->i2c_addr;
+        adap = i2c_get_adapter(i2c_mux_pca954x_device_data->i2c_bus);
+        if (adap == NULL) {
+            i2c_mux_pca954x_device_data->client = NULL;
+            printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_mux_pca954x_device_data->i2c_bus);
+            continue;
+        }
+        client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]);
+        if (!client) {
+            i2c_mux_pca954x_device_data->client = NULL;
+            printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n",
+                i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus);
+        } else {
+            i2c_mux_pca954x_device_data->client = client;
+        }
+        i2c_put_adapter(adap);
+    }
+    return 0;
+}
+
+static void __exit wb_i2c_mux_pca954x_device_exit(void)
+{
+    int i;
+    i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data;
+
+    WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(i2c_mux_pca954x_device_info) - 1; i >= 0; i--) {
+        i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data;
+        if (i2c_mux_pca954x_device_data->client) {
+            i2c_unregister_device(i2c_mux_pca954x_device_data->client);
+            i2c_mux_pca954x_device_data->client = NULL;
+        }
+    }
+}
+
+module_init(wb_i2c_mux_pca954x_device_init);
+module_exit(wb_i2c_mux_pca954x_device_exit);
+MODULE_DESCRIPTION("WB I2C MUX PCA954X Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_io_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_io_dev_device.c
new file mode 100644
index 000000000000..ae7ff5523f63
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_io_dev_device.c
@@ -0,0 +1,138 @@
+/*
+ * An wb_io_dev_device driver for io device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_io_dev.h>
+
+static int g_wb_io_dev_device_debug = 0;
+static int g_wb_io_dev_device_error = 0;
+
+module_param(g_wb_io_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_io_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_IO_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_io_dev_device_debug) { \
+        printk(KERN_INFO "[WB_IO_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_IO_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_io_dev_device_error) { \
+        printk(KERN_ERR "[WB_IO_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static io_dev_device_t io_dev_device_data0 = {
+    .io_dev_name = "cpld0",
+    .io_base = 0x700,
+    .io_len = 0x100,
+    .indirect_addr = 0,
+};
+
+static io_dev_device_t io_dev_device_data1 = {
+    .io_dev_name = "cpld1",
+    .io_base = 0x900,
+    .io_len = 0x100,
+    .indirect_addr = 0,
+};
+
+static io_dev_device_t io_dev_device_data2 = {
+    .io_dev_name = "cpld2",
+    .io_base = 0xb00,
+    .io_len = 0x100,
+    .indirect_addr = 0,
+};
+
+static void wb_io_dev_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device io_dev_device[] = {
+    {
+        .name   = "wb-io-dev",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &io_dev_device_data0,
+            .release = wb_io_dev_device_release,
+        },
+    },
+    {
+        .name   = "wb-io-dev",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &io_dev_device_data1,
+            .release = wb_io_dev_device_release,
+        },
+    },
+    {
+        .name   = "wb-io-dev",
+        .id = 3,
+        .dev    = {
+            .platform_data  = &io_dev_device_data2,
+            .release = wb_io_dev_device_release,
+        },
+    },
+};
+
+static int __init wb_io_dev_device_init(void)
+{
+    int i;
+    int ret = 0;
+    io_dev_device_t *io_dev_device_data;
+
+    WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(io_dev_device); i++) {
+        io_dev_device_data = io_dev_device[i].dev.platform_data;
+        ret = platform_device_register(&io_dev_device[i]);
+        if (ret < 0) {
+            io_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-io-dev.%d register failed!\n", i + 1);
+        } else {
+            io_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_io_dev_device_exit(void)
+{
+    int i;
+    io_dev_device_t *io_dev_device_data;
+
+    WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(io_dev_device) - 1; i >= 0; i--) {
+        io_dev_device_data = io_dev_device[i].dev.platform_data;
+        if (io_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&io_dev_device[i]);
+        }
+    }
+}
+
+module_init(wb_io_dev_device_init);
+module_exit(wb_io_dev_device_exit);
+MODULE_DESCRIPTION("IO DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_lpc_drv_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_lpc_drv_device.c
new file mode 100644
index 000000000000..363d670d5a99
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_lpc_drv_device.c
@@ -0,0 +1,150 @@
+/*
+ * An wb_i2c_ocores_device driver for i2c ocore device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_lpc_drv.h>
+
+static int g_wb_lpc_drv_device_debug = 0;
+static int g_wb_lpc_drv_device_error = 0;
+
+module_param(g_wb_lpc_drv_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_lpc_drv_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_LPC_DRV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_lpc_drv_device_debug) { \
+        printk(KERN_INFO "[WB_LPC_DRV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_LPC_DRV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_lpc_drv_device_error) { \
+        printk(KERN_ERR "[WB_LPC_DRV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static lpc_drv_device_t lpc_drv_device_data_0 = {
+    .lpc_io_name = "wb_lpc",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 0,
+    .lpc_io_base = 0x700,
+    .lpc_io_size = 0x100,
+    .lpc_gen_dec = 0x84,
+};
+
+static lpc_drv_device_t lpc_drv_device_data_1 = {
+    .lpc_io_name = "wb_lpc",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 0,
+    .lpc_io_base = 0x900,
+    .lpc_io_size = 0x100,
+    .lpc_gen_dec = 0x88,
+};
+
+static lpc_drv_device_t lpc_drv_device_data_2 = {
+    .lpc_io_name = "wb_lpc",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 0,
+    .lpc_io_base = 0xb00,
+    .lpc_io_size = 0x100,
+    .lpc_gen_dec = 0x90,
+};
+
+static void wb_lpc_drv_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device lpc_drv_device[] = {
+    {
+        .name   = "wb-lpc",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &lpc_drv_device_data_0,
+            .release = wb_lpc_drv_device_release,
+        },
+    },
+    {
+        .name   = "wb-lpc",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &lpc_drv_device_data_1,
+            .release = wb_lpc_drv_device_release,
+        },
+    },
+    {
+        .name   = "wb-lpc",
+        .id = 3,
+        .dev    = {
+            .platform_data  = &lpc_drv_device_data_2,
+            .release = wb_lpc_drv_device_release,
+        },
+    },
+};
+
+static int __init wb_lpc_drv_device_init(void)
+{
+    int i;
+    int ret = 0;
+    lpc_drv_device_t *lpc_drv_device_data;
+
+    WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(lpc_drv_device); i++) {
+        lpc_drv_device_data = lpc_drv_device[i].dev.platform_data;
+        ret = platform_device_register(&lpc_drv_device[i]);
+        if (ret < 0) {
+            lpc_drv_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-lpc.%d register failed!\n", i + 1);
+        } else {
+            lpc_drv_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_lpc_drv_device_exit(void)
+{
+    int i;
+    lpc_drv_device_t *lpc_drv_device_data;
+
+    WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(lpc_drv_device) - 1; i >= 0; i--) {
+        lpc_drv_device_data = lpc_drv_device[i].dev.platform_data;
+        if (lpc_drv_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&lpc_drv_device[i]);
+        }
+    }
+}
+
+module_init(wb_lpc_drv_device_init);
+module_exit(wb_lpc_drv_device_exit);
+MODULE_DESCRIPTION("LPC DRV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_pcie_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_pcie_dev_device.c
new file mode 100644
index 000000000000..561e64d449b4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_pcie_dev_device.c
@@ -0,0 +1,113 @@
+/*
+ * An wb_pcie_dev_device driver for pcie device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_pcie_dev.h>
+
+static int g_wb_pcie_dev_device_debug = 0;
+static int g_wb_pcie_dev_device_error = 0;
+
+module_param(g_wb_pcie_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_pcie_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_pcie_dev_device_debug) { \
+        printk(KERN_INFO "[WB_PCIE_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_PCIE_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_pcie_dev_device_error) { \
+        printk(KERN_ERR "[WB_PCIE_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static pci_dev_device_t pcie_dev_device_data0 = {
+    .pci_dev_name = "fpga0",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x08,
+    .pci_slot = 0x00,
+    .pci_fn = 0,
+    .pci_bar = 0,
+    .bus_width = 4,
+    .upg_ctrl_base = 0xa00,
+    .upg_flash_base = 0x2f0000,
+};
+
+static void wb_pcie_dev_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device pcie_dev_device[] = {
+    {
+        .name   = "wb-pci-dev",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &pcie_dev_device_data0,
+            .release = wb_pcie_dev_device_release,
+        },
+    },
+};
+
+static int __init wb_pcie_dev_device_init(void)
+{
+    int i;
+    int ret = 0;
+    pci_dev_device_t *pcie_dev_device_data;
+
+    WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(pcie_dev_device); i++) {
+        pcie_dev_device_data = pcie_dev_device[i].dev.platform_data;
+        ret = platform_device_register(&pcie_dev_device[i]);
+        if (ret < 0) {
+            pcie_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-pci-dev.%d register failed!\n", i + 1);
+        } else {
+            pcie_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_pcie_dev_device_exit(void)
+{
+    int i;
+    pci_dev_device_t *pcie_dev_device_data;
+
+    WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(pcie_dev_device) - 1; i >= 0; i--) {
+        pcie_dev_device_data = pcie_dev_device[i].dev.platform_data;
+        if (pcie_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&pcie_dev_device[i]);
+        }
+    }
+}
+
+module_init(wb_pcie_dev_device_init);
+module_exit(wb_pcie_dev_device_exit);
+MODULE_DESCRIPTION("PCIE DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_device.c
new file mode 100644
index 000000000000..45f6038596b3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_device.c
@@ -0,0 +1,126 @@
+/*
+ * An wb_spi_dev_device driver for spi device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/spi/spi.h>
+
+#include <wb_spi_dev.h>
+#include "wb_spi_master.h"
+
+#define SPI_DEVICE_MAX_NUM (64)
+
+static int g_wb_spi_dev_device_debug = 0;
+static int g_wb_spi_dev_device_error = 0;
+
+module_param(g_wb_spi_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_spi_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_SPI_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_spi_dev_device_debug) { \
+        printk(KERN_INFO "[WB_SPI_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_SPI_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_spi_dev_device_error) { \
+        printk(KERN_ERR "[WB_SPI_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static spi_dev_device_t spi_dev_device_data0 = {
+    .spi_dev_name = "fpga1",
+    .data_bus_width = 4,
+    .addr_bus_width = 2,
+    .per_rd_len = 4,
+    .per_wr_len = 4,
+    .spi_len = 0xe000,
+};
+
+static struct spi_device *g_spi_device[SPI_DEVICE_MAX_NUM];
+
+struct spi_board_info spi_dev_device_info[] = {
+    {
+        .modalias           = "wb-spi-dev",
+        .max_speed_hz       = 6250000,
+        .bus_num            = 1,
+        .chip_select        = 0,
+        .mode               = SPI_MODE_3,
+        .platform_data      = &spi_dev_device_data0,
+    },
+};
+
+static int __init wb_spi_dev_device_init(void)
+{
+    int i;
+    struct spi_master *master;
+    struct spi_device *spi;
+    int spi_dev_num;
+
+    WB_SPI_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+
+    spi_dev_num = ARRAY_SIZE(spi_dev_device_info);
+    if (spi_dev_num > SPI_DEVICE_MAX_NUM) {
+        printk(KERN_ERR "spi_dev_num[%d] is bigger than max_num[%d].\n",
+            spi_dev_num, SPI_DEVICE_MAX_NUM);
+        return -EINVAL;
+    }
+
+    for (i = 0; i < ARRAY_SIZE(spi_dev_device_info); i++) {
+        master = wb_spi_master_busnum_to_master(spi_dev_device_info[i].bus_num);
+        if (!master) {
+            printk(KERN_ERR "get bus_num %u spi master failed.\n",
+                spi_dev_device_info[i].bus_num);
+            continue;
+        }
+        spi = spi_new_device(master, &spi_dev_device_info[i]);
+        put_device(&master->dev);
+        if (spi) {
+            g_spi_device[i] = spi;
+        } else {
+            g_spi_device[i] = NULL;
+            printk(KERN_ERR "Failed to register spi dev device %s at bus %d!\n",
+                spi_dev_device_info[i].modalias, spi_dev_device_info[i].bus_num);
+            continue;
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_spi_dev_device_exit(void)
+{
+    int i;
+
+    WB_SPI_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(spi_dev_device_info) - 1; i >= 0; i--) {
+        if (g_spi_device[i]) {
+            spi_unregister_device(g_spi_device[i]);
+            g_spi_device[i] = NULL;
+        }
+    }
+}
+
+module_init(wb_spi_dev_device_init);
+module_exit(wb_spi_dev_device_exit);
+MODULE_DESCRIPTION("SPI DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_platform_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_platform_device.c
new file mode 100644
index 000000000000..9c4981321b64
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_platform_device.c
@@ -0,0 +1,74 @@
+/*
+ * An wb_spi_dev_platform_device driver for spi platform device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+static int g_wb_spi_dev_platform_device_debug = 0;
+static int g_wb_spi_dev_platform_device_error = 0;
+
+module_param(g_wb_spi_dev_platform_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_spi_dev_platform_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_SPI_DEV_PLATFORM_DEVICE_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_spi_dev_platform_device_debug) { \
+        printk(KERN_INFO "[WB_SPI_DEV_PLATFORM_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_SPI_DEV_PLATFORM_DEVICE_ERROR(fmt, args...) do {                                        \
+    if (g_wb_spi_dev_platform_device_error) { \
+        printk(KERN_ERR "[WB_SPI_DEV_PLATFORM_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static void wb_spi_dev_platform_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device wb_spi_dev_platform_device = {
+    .name   = "wb-spi-dev-device",
+    .id = 1,
+    .dev    = {
+        .release = wb_spi_dev_platform_device_release,
+    },
+};
+
+static int __init wb_spi_dev_platform_device_init(void)
+{
+    WB_SPI_DEV_PLATFORM_DEVICE_VERBOSE("wb_spi_dev_platform_device_init enter!\n");
+    return platform_device_register(&wb_spi_dev_platform_device);
+}
+
+static void __exit wb_spi_dev_platform_device_exit(void)
+{
+    WB_SPI_DEV_PLATFORM_DEVICE_VERBOSE("wb_spi_dev_platform_device_exit enter!\n");
+    return platform_device_unregister(&wb_spi_dev_platform_device);
+}
+
+module_init(wb_spi_dev_platform_device_init);
+module_exit(wb_spi_dev_platform_device_exit);
+MODULE_DESCRIPTION("SPI Dev Platform Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_master.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_master.c
new file mode 100644
index 000000000000..5c9cdbe1599f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_master.c
@@ -0,0 +1,129 @@
+/*
+ * An wb_spi_master driver for spi master device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/device/bus.h>
+
+#include "wb_spi_master.h"
+
+static int g_wb_spi_master_debug = 0;
+static int g_wb_spi_master_error = 0;
+
+module_param(g_wb_spi_master_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_spi_master_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_SPI_MASTER_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_spi_master_debug) { \
+        printk(KERN_INFO "[WB_SPI_MASTER][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_SPI_MASTER_ERROR(fmt, args...) do {                                        \
+    if (g_wb_spi_master_error) { \
+        printk(KERN_ERR "[WB_SPI_MASTER][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static struct device g_wb_spi_device;
+/* point to spi_master_class in drivers/spi/spi.c */
+static struct class  *g_wb_spi_master_class = NULL;
+static struct spi_controller *g_wb_spi_controller = NULL;
+
+static int __spi_controller_match(struct device *dev, const void *data)
+{
+    struct spi_controller *ctlr;
+    const u16 *bus_num = data;
+
+    ctlr = container_of(dev, struct spi_controller, dev);
+    return ctlr->bus_num == *bus_num;
+}
+
+/**
+ * wb_spi_master_busnum_to_master - look up master associated with bus_num
+ * @bus_num: the master's bus number
+ * Context: can sleep
+ *
+ * Return: the SPI master structure on success, else NULL.
+ */
+struct spi_controller *wb_spi_master_busnum_to_master(u16 bus_num)
+{
+    struct device *dev;
+	struct spi_controller *ctlr = NULL;
+    
+    WB_SPI_MASTER_VERBOSE("Enter.\n");
+
+    if (g_wb_spi_master_class == NULL) {
+        WB_SPI_MASTER_ERROR("get g_wb_spi_master_class fail.\n");
+        return NULL;
+    }
+    
+    dev = class_find_device(g_wb_spi_master_class, NULL, &bus_num, __spi_controller_match);
+    if (dev) {
+        ctlr = container_of(dev, struct spi_controller, dev);
+    }
+    /* reference got in class_find_device */
+    return ctlr;
+}
+EXPORT_SYMBOL_GPL(wb_spi_master_busnum_to_master);
+
+static int __init wb_spi_master_init(void)
+{
+    struct device *dev;
+    struct spi_board_info chip;
+
+    WB_SPI_MASTER_VERBOSE("Enter!\n");
+
+    device_initialize(&g_wb_spi_device);
+
+    g_wb_spi_controller = spi_alloc_master(&g_wb_spi_device, sizeof(struct spi_board_info));
+    if (g_wb_spi_controller == NULL) {
+        WB_SPI_MASTER_ERROR("spi_alloc_master failed.\n");
+        return -ENOMEM;
+    }
+
+    g_wb_spi_master_class = g_wb_spi_controller->dev.class;
+    if (g_wb_spi_master_class == NULL) {
+        WB_SPI_MASTER_ERROR("get class_spi_master failed.\n");
+        kfree(g_wb_spi_controller);
+        g_wb_spi_controller = NULL;
+        return -EINVAL;
+    }
+    printk(KERN_INFO "WB spi master init success.");
+
+    return 0;
+}
+
+static void __exit wb_spi_master_exit(void)
+{
+    WB_SPI_MASTER_VERBOSE("Enter!\n");
+    if (g_wb_spi_controller != NULL) {
+        kfree(g_wb_spi_controller);
+    }
+
+    return;
+}
+
+module_init(wb_spi_master_init);
+module_exit(wb_spi_master_exit);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("create spi device");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_master.h b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_master.h
new file mode 100644
index 000000000000..502ac68b5850
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_master.h
@@ -0,0 +1,36 @@
+/*
+ * A header definition for wb_spi_master driver
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __WB_SPI_MASTER_H__
+#define __WB_SPI_MASTER_H__
+
+#include <linux/types.h>
+#include <linux/spi/spi.h>
+
+/**
+ * wb_spi_master_busnum_to_master - look up master associated with bus_num
+ * @bus_num: the master's bus number
+ * Context: can sleep
+ *
+ * Return: the SPI master structure on success, else NULL.
+ */
+struct spi_controller *wb_spi_master_busnum_to_master(u16 bus_num);
+
+#endif  /* #ifndef __WB_SPI_MASTER_H__ */
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_ocores_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_ocores_device.c
new file mode 100644
index 000000000000..86073dc12f30
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_ocores_device.c
@@ -0,0 +1,114 @@
+/*
+ * An wb_spi_ocores_device driver for spi ocores device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_spi_ocores.h>
+
+static int g_wb_spi_ocores_device_debug = 0;
+static int g_wb_spi_ocores_device_error = 0;
+
+module_param(g_wb_spi_ocores_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_spi_ocores_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_SPI_OCORE_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_spi_ocores_device_debug) { \
+        printk(KERN_INFO "[WB_SPI_OCORE_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_SPI_OCORE_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_spi_ocores_device_error) { \
+        printk(KERN_ERR "[WB_SPI_OCORE_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static spi_ocores_device_t spi_ocores_device_data0 = {
+    .bus_num = 1,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 2,
+    .dev_base = 0x1900,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .clock_frequency = 125000000,
+    .irq_flag = 0,
+    .num_chipselect = 8,
+};
+
+static void wb_spi_ocores_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device spi_ocores_device[] = {
+    {
+        .name   = "wb-spioc",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &spi_ocores_device_data0,
+            .release = wb_spi_ocores_device_release,
+        },
+    },
+};
+
+static int __init wb_spi_ocores_device_init(void)
+{
+    int i;
+    int ret = 0;
+    spi_ocores_device_t *spi_ocores_device_data;
+
+    WB_SPI_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(spi_ocores_device); i++) {
+        spi_ocores_device_data = spi_ocores_device[i].dev.platform_data;
+        ret = platform_device_register(&spi_ocores_device[i]);
+        if (ret < 0) {
+            spi_ocores_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-spi-oc.%d register failed!\n", i + 1);
+        } else {
+            spi_ocores_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_spi_ocores_device_exit(void)
+{
+    int i;
+    spi_ocores_device_t *spi_ocores_device_data;
+
+    WB_SPI_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(spi_ocores_device) - 1; i >= 0; i--) {
+        spi_ocores_device_data = spi_ocores_device[i].dev.platform_data;
+        if (spi_ocores_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&spi_ocores_device[i]);
+        }
+    }
+}
+
+module_init(wb_spi_ocores_device_init);
+module_exit(wb_spi_ocores_device_exit);
+MODULE_DESCRIPTION("SPI OCORES Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
new file mode 100644
index 000000000000..53aa2be2aaea
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
@@ -0,0 +1,47 @@
+# configuration item: I2C address of CPLD
+# format: cpld_i2c_dev.bus_[cpld_slot]_[cpld_id] cpld_i2c_dev.addr_[cpld_slot]_[cpld_id]
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+# bus: I2C bus number of CPLD
+# addr: I2C address of CPLD
+cpld_i2c_dev.bus_0_2=109
+cpld_i2c_dev.addr_0_2=0x1d
+cpld_i2c_dev.bus_0_3=110
+cpld_i2c_dev.addr_0_3=0x2d
+cpld_i2c_dev.bus_0_4=111
+cpld_i2c_dev.addr_0_4=0x3d
+cpld_i2c_dev.bus_0_5=112
+cpld_i2c_dev.addr_0_5=0x4d
+cpld_i2c_dev.bus_0_6=92
+cpld_i2c_dev.addr_0_6=0x0d
+cpld_i2c_dev.bus_0_7=101
+cpld_i2c_dev.addr_0_7=0x0d
+
+
+# configuration item: LPC address of CPLD
+# format: cpld_lpc_addr_[cpld_slot]_[cpld_id]
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+cpld_lpc_dev_0_0=0x700
+cpld_lpc_dev_0_1=0x900
+
+
+# configuration item: CPLD access method, lpc or i2c
+# format: mode_cpld_[cpld_slot][cpld_slot]=lpc/i2c
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+mode_cpld_0_0=lpc
+mode_cpld_0_1=lpc
+mode_cpld_0_2=i2c
+mode_cpld_0_3=i2c
+mode_cpld_0_4=i2c
+mode_cpld_0_5=i2c
+mode_cpld_0_6=i2c
+mode_cpld_0_7=i2c
+
+
+# configuration item: the number of CPLD
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: CPLD main_dev is 4
+# minor_dev: CPLD minor_dev not exist
+dev_num_4_0=8
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg
new file mode 100644
index 000000000000..c7f4b9de5594
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg
@@ -0,0 +1,574 @@
+# configuration item: the number of fans
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: fan main_dev is 1
+# minor_dev: fan minor_dev not exist(0)
+dev_num_1_0=8
+
+# configuration item: the number of rotors
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: rotor main_dev is 1
+# minor_dev: rotor minor_dev is 5
+dev_num_1_5=2
+
+# configuration item: fan presence status
+# format: dev_present_status_[main_dev_id][fan_index]
+# main_dev_id: fan main_dev_id is 1
+# fan_index: start from 1
+dev_present_status.mode_1_1=config
+dev_present_status.src_1_1=cpld
+dev_present_status.frmt_1_1=bit
+dev_present_status.pola_1_1=negative
+dev_present_status.addr_1_1=0x00060030
+dev_present_status.len_1_1=1
+dev_present_status.bit_offset_1_1=0
+
+dev_present_status.mode_1_2=config
+dev_present_status.src_1_2=cpld
+dev_present_status.frmt_1_2=bit
+dev_present_status.pola_1_2=negative
+dev_present_status.addr_1_2=0x00070030
+dev_present_status.len_1_2=1
+dev_present_status.bit_offset_1_2=0
+
+dev_present_status.mode_1_3=config
+dev_present_status.src_1_3=cpld
+dev_present_status.frmt_1_3=bit
+dev_present_status.pola_1_3=negative
+dev_present_status.addr_1_3=0x00060030
+dev_present_status.len_1_3=1
+dev_present_status.bit_offset_1_3=1
+
+dev_present_status.mode_1_4=config
+dev_present_status.src_1_4=cpld
+dev_present_status.frmt_1_4=bit
+dev_present_status.pola_1_4=negative
+dev_present_status.addr_1_4=0x00070030
+dev_present_status.len_1_4=1
+dev_present_status.bit_offset_1_4=1
+
+dev_present_status.mode_1_5=config
+dev_present_status.src_1_5=cpld
+dev_present_status.frmt_1_5=bit
+dev_present_status.pola_1_5=negative
+dev_present_status.addr_1_5=0x00060030
+dev_present_status.len_1_5=1
+dev_present_status.bit_offset_1_5=2
+
+dev_present_status.mode_1_6=config
+dev_present_status.src_1_6=cpld
+dev_present_status.frmt_1_6=bit
+dev_present_status.pola_1_6=negative
+dev_present_status.addr_1_6=0x00070030
+dev_present_status.len_1_6=1
+dev_present_status.bit_offset_1_6=2
+
+dev_present_status.mode_1_7=config
+dev_present_status.src_1_7=cpld
+dev_present_status.frmt_1_7=bit
+dev_present_status.pola_1_7=negative
+dev_present_status.addr_1_7=0x00060030
+dev_present_status.len_1_7=1
+dev_present_status.bit_offset_1_7=3
+
+dev_present_status.mode_1_8=config
+dev_present_status.src_1_8=cpld
+dev_present_status.frmt_1_8=bit
+dev_present_status.pola_1_8=negative
+dev_present_status.addr_1_8=0x00070030
+dev_present_status.len_1_8=1
+dev_present_status.bit_offset_1_8=3
+
+
+# configuration item: fan rotor status
+# format: fan_roll_status_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_roll_status.mode_1_0=config
+fan_roll_status.int_cons_1_0=
+fan_roll_status.src_1_0=cpld
+fan_roll_status.frmt_1_0=bit
+fan_roll_status.pola_1_0=positive
+fan_roll_status.fpath_1_0=
+fan_roll_status.addr_1_0=0x00060031
+fan_roll_status.len_1_0=1
+fan_roll_status.bit_offset_1_0=0
+
+fan_roll_status.mode_1_1=config
+fan_roll_status.int_cons_1_1=
+fan_roll_status.src_1_1=cpld
+fan_roll_status.frmt_1_1=bit
+fan_roll_status.pola_1_1=positive
+fan_roll_status.fpath_1_1=
+fan_roll_status.addr_1_1=0x00060034
+fan_roll_status.len_1_1=1
+fan_roll_status.bit_offset_1_1=0
+
+fan_roll_status.mode_2_0=config
+fan_roll_status.int_cons_2_0=
+fan_roll_status.src_2_0=cpld
+fan_roll_status.frmt_2_0=bit
+fan_roll_status.pola_2_0=positive
+fan_roll_status.fpath_2_0=
+fan_roll_status.addr_2_0=0x00070031
+fan_roll_status.len_2_0=1
+fan_roll_status.bit_offset_2_0=0
+
+fan_roll_status.mode_2_1=config
+fan_roll_status.int_cons_2_1=
+fan_roll_status.src_2_1=cpld
+fan_roll_status.frmt_2_1=bit
+fan_roll_status.pola_2_1=positive
+fan_roll_status.fpath_2_1=
+fan_roll_status.addr_2_1=0x00070034
+fan_roll_status.len_2_1=1
+fan_roll_status.bit_offset_2_1=0
+
+fan_roll_status.mode_3_0=config
+fan_roll_status.int_cons_3_0=
+fan_roll_status.src_3_0=cpld
+fan_roll_status.frmt_3_0=bit
+fan_roll_status.pola_3_0=positive
+fan_roll_status.fpath_3_0=
+fan_roll_status.addr_3_0=0x00060031
+fan_roll_status.len_3_0=1
+fan_roll_status.bit_offset_3_0=1
+
+fan_roll_status.mode_3_1=config
+fan_roll_status.int_cons_3_1=
+fan_roll_status.src_3_1=cpld
+fan_roll_status.frmt_3_1=bit
+fan_roll_status.pola_3_1=positive
+fan_roll_status.fpath_3_1=
+fan_roll_status.addr_3_1=0x00060034
+fan_roll_status.len_3_1=1
+fan_roll_status.bit_offset_3_1=1
+
+fan_roll_status.mode_4_0=config
+fan_roll_status.int_cons_4_0=
+fan_roll_status.src_4_0=cpld
+fan_roll_status.frmt_4_0=bit
+fan_roll_status.pola_4_0=positive
+fan_roll_status.fpath_4_0=
+fan_roll_status.addr_4_0=0x00070031
+fan_roll_status.len_4_0=1
+fan_roll_status.bit_offset_4_0=1
+
+fan_roll_status.mode_4_1=config
+fan_roll_status.int_cons_4_1=
+fan_roll_status.src_4_1=cpld
+fan_roll_status.frmt_4_1=bit
+fan_roll_status.pola_4_1=positive
+fan_roll_status.fpath_4_1=
+fan_roll_status.addr_4_1=0x00070034
+fan_roll_status.len_4_1=1
+fan_roll_status.bit_offset_4_1=1
+
+fan_roll_status.mode_5_0=config
+fan_roll_status.int_cons_5_0=
+fan_roll_status.src_5_0=cpld
+fan_roll_status.frmt_5_0=bit
+fan_roll_status.pola_5_0=positive
+fan_roll_status.fpath_5_0=
+fan_roll_status.addr_5_0=0x00060031
+fan_roll_status.len_5_0=1
+fan_roll_status.bit_offset_5_0=2
+
+fan_roll_status.mode_5_1=config
+fan_roll_status.int_cons_5_1=
+fan_roll_status.src_5_1=cpld
+fan_roll_status.frmt_5_1=bit
+fan_roll_status.pola_5_1=positive
+fan_roll_status.fpath_5_1=
+fan_roll_status.addr_5_1=0x00060034
+fan_roll_status.len_5_1=1
+fan_roll_status.bit_offset_5_1=2
+
+fan_roll_status.mode_6_0=config
+fan_roll_status.int_cons_6_0=
+fan_roll_status.src_6_0=cpld
+fan_roll_status.frmt_6_0=bit
+fan_roll_status.pola_6_0=positive
+fan_roll_status.fpath_6_0=
+fan_roll_status.addr_6_0=0x00070031
+fan_roll_status.len_6_0=1
+fan_roll_status.bit_offset_6_0=2
+
+fan_roll_status.mode_6_1=config
+fan_roll_status.int_cons_6_1=
+fan_roll_status.src_6_1=cpld
+fan_roll_status.frmt_6_1=bit
+fan_roll_status.pola_6_1=positive
+fan_roll_status.fpath_6_1=
+fan_roll_status.addr_6_1=0x00070034
+fan_roll_status.len_6_1=1
+fan_roll_status.bit_offset_6_1=2
+
+fan_roll_status.mode_7_0=config
+fan_roll_status.int_cons_7_0=
+fan_roll_status.src_7_0=cpld
+fan_roll_status.frmt_7_0=bit
+fan_roll_status.pola_7_0=positive
+fan_roll_status.fpath_7_0=
+fan_roll_status.addr_7_0=0x00060031
+fan_roll_status.len_7_0=1
+fan_roll_status.bit_offset_7_0=3
+
+fan_roll_status.mode_7_1=config
+fan_roll_status.int_cons_7_1=
+fan_roll_status.src_7_1=cpld
+fan_roll_status.frmt_7_1=bit
+fan_roll_status.pola_7_1=positive
+fan_roll_status.fpath_7_1=
+fan_roll_status.addr_7_1=0x00060034
+fan_roll_status.len_7_1=1
+fan_roll_status.bit_offset_7_1=3
+
+fan_roll_status.mode_8_0=config
+fan_roll_status.int_cons_8_0=
+fan_roll_status.src_8_0=cpld
+fan_roll_status.frmt_8_0=bit
+fan_roll_status.pola_8_0=positive
+fan_roll_status.fpath_8_0=
+fan_roll_status.addr_8_0=0x00070031
+fan_roll_status.len_8_0=1
+fan_roll_status.bit_offset_8_0=3
+
+fan_roll_status.mode_8_1=config
+fan_roll_status.int_cons_8_1=
+fan_roll_status.src_8_1=cpld
+fan_roll_status.frmt_8_1=bit
+fan_roll_status.pola_8_1=positive
+fan_roll_status.fpath_8_1=
+fan_roll_status.addr_8_1=0x00070034
+fan_roll_status.len_8_1=1
+fan_roll_status.bit_offset_8_1=3
+
+
+# configuration item: fan speed
+# format: fan_speed_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_speed.mode_1_0=config
+fan_speed.int_cons_1_0=
+fan_speed.src_1_0=cpld
+fan_speed.frmt_1_0=num_bytes
+fan_speed.pola_1_0=negative
+fan_speed.fpath_1_0=
+fan_speed.addr_1_0=0x0006001b
+fan_speed.len_1_0=2
+fan_speed.bit_offset_1_0=
+
+fan_speed.mode_1_1=config
+fan_speed.int_cons_1_1=
+fan_speed.src_1_1=cpld
+fan_speed.frmt_1_1=num_bytes
+fan_speed.pola_1_1=negative
+fan_speed.fpath_1_1=
+fan_speed.addr_1_1=0x00060025
+fan_speed.len_1_1=2
+fan_speed.bit_offset_1_1=
+
+fan_speed.mode_2_0=config
+fan_speed.int_cons_2_0=
+fan_speed.src_2_0=cpld
+fan_speed.frmt_2_0=num_bytes
+fan_speed.pola_2_0=negative
+fan_speed.fpath_2_0=
+fan_speed.addr_2_0=0x0007001b
+fan_speed.len_2_0=2
+fan_speed.bit_offset_2_0=
+
+fan_speed.mode_2_1=config
+fan_speed.int_cons_2_1=
+fan_speed.src_2_1=cpld
+fan_speed.frmt_2_1=num_bytes
+fan_speed.pola_2_1=negative
+fan_speed.fpath_2_1=
+fan_speed.addr_2_1=0x00070025
+fan_speed.len_2_1=2
+fan_speed.bit_offset_2_1=
+
+fan_speed.mode_3_0=config
+fan_speed.int_cons_3_0=
+fan_speed.src_3_0=cpld
+fan_speed.frmt_3_0=num_bytes
+fan_speed.pola_3_0=negative
+fan_speed.fpath_3_0=
+fan_speed.addr_3_0=0x0006001d
+fan_speed.len_3_0=2
+fan_speed.bit_offset_3_0=
+
+fan_speed.mode_3_1=config
+fan_speed.int_cons_3_1=
+fan_speed.src_3_1=cpld
+fan_speed.frmt_3_1=num_bytes
+fan_speed.pola_3_1=negative
+fan_speed.fpath_3_1=
+fan_speed.addr_3_1=0x00060027
+fan_speed.len_3_1=2
+fan_speed.bit_offset_3_1=
+
+fan_speed.mode_4_0=config
+fan_speed.int_cons_4_0=
+fan_speed.src_4_0=cpld
+fan_speed.frmt_4_0=num_bytes
+fan_speed.pola_4_0=negative
+fan_speed.fpath_4_0=
+fan_speed.addr_4_0=0x0007001d
+fan_speed.len_4_0=2
+fan_speed.bit_offset_4_0=
+
+fan_speed.mode_4_1=config
+fan_speed.int_cons_4_1=
+fan_speed.src_4_1=cpld
+fan_speed.frmt_4_1=num_bytes
+fan_speed.pola_4_1=negative
+fan_speed.fpath_4_1=
+fan_speed.addr_4_1=0x00070027
+fan_speed.len_4_1=2
+fan_speed.bit_offset_4_1=
+
+fan_speed.mode_5_0=config
+fan_speed.int_cons_5_0=
+fan_speed.src_5_0=cpld
+fan_speed.frmt_5_0=num_bytes
+fan_speed.pola_5_0=negative
+fan_speed.fpath_5_0=
+fan_speed.addr_5_0=0x0006001f
+fan_speed.len_5_0=2
+fan_speed.bit_offset_5_0=
+
+fan_speed.mode_5_1=config
+fan_speed.int_cons_5_1=
+fan_speed.src_5_1=cpld
+fan_speed.frmt_5_1=num_bytes
+fan_speed.pola_5_1=negative
+fan_speed.fpath_5_1=
+fan_speed.addr_5_1=0x00060029
+fan_speed.len_5_1=2
+fan_speed.bit_offset_5_1=
+
+fan_speed.mode_6_0=config
+fan_speed.int_cons_6_0=
+fan_speed.src_6_0=cpld
+fan_speed.frmt_6_0=num_bytes
+fan_speed.pola_6_0=negative
+fan_speed.fpath_6_0=
+fan_speed.addr_6_0=0x0007001f
+fan_speed.len_6_0=2
+fan_speed.bit_offset_6_0=
+
+fan_speed.mode_6_1=config
+fan_speed.int_cons_6_1=
+fan_speed.src_6_1=cpld
+fan_speed.frmt_6_1=num_bytes
+fan_speed.pola_6_1=negative
+fan_speed.fpath_6_1=
+fan_speed.addr_6_1=0x00070029
+fan_speed.len_6_1=2
+fan_speed.bit_offset_6_1=
+
+fan_speed.mode_7_0=config
+fan_speed.int_cons_7_0=
+fan_speed.src_7_0=cpld
+fan_speed.frmt_7_0=num_bytes
+fan_speed.pola_7_0=negative
+fan_speed.fpath_7_0=
+fan_speed.addr_7_0=0x00060021
+fan_speed.len_7_0=2
+fan_speed.bit_offset_7_0=
+
+fan_speed.mode_7_1=config
+fan_speed.int_cons_7_1=
+fan_speed.src_7_1=cpld
+fan_speed.frmt_7_1=num_bytes
+fan_speed.pola_7_1=negative
+fan_speed.fpath_7_1=
+fan_speed.addr_7_1=0x0006002b
+fan_speed.len_7_1=2
+fan_speed.bit_offset_7_1=
+
+fan_speed.mode_8_0=config
+fan_speed.int_cons_8_0=
+fan_speed.src_8_0=cpld
+fan_speed.frmt_8_0=num_bytes
+fan_speed.pola_8_0=negative
+fan_speed.fpath_8_0=
+fan_speed.addr_8_0=0x00070021
+fan_speed.len_8_0=2
+fan_speed.bit_offset_8_0=
+
+fan_speed.mode_8_1=config
+fan_speed.int_cons_8_1=
+fan_speed.src_8_1=cpld
+fan_speed.frmt_8_1=num_bytes
+fan_speed.pola_8_1=negative
+fan_speed.fpath_8_1=
+fan_speed.addr_8_1=0x0007002b
+fan_speed.len_8_1=2
+fan_speed.bit_offset_8_1=
+
+
+# configuration item: fan pwm
+# format: fan_ratio_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_ratio.mode_1_0=config
+fan_ratio.int_cons_1_0=
+fan_ratio.src_1_0=cpld
+fan_ratio.frmt_1_0=byte
+fan_ratio.pola_1_0=
+fan_ratio.fpath_1_0=
+fan_ratio.addr_1_0=0x00060014
+fan_ratio.len_1_0=1
+fan_ratio.bit_offset_1_0=
+
+fan_ratio.mode_1_1=config
+fan_ratio.int_cons_1_1=
+fan_ratio.src_1_1=cpld
+fan_ratio.frmt_1_1=byte
+fan_ratio.pola_1_1=
+fan_ratio.fpath_1_1=
+fan_ratio.addr_1_1=0x00060014
+fan_ratio.len_1_1=1
+fan_ratio.bit_offset_1_1=
+
+fan_ratio.mode_2_0=config
+fan_ratio.int_cons_2_0=
+fan_ratio.src_2_0=cpld
+fan_ratio.frmt_2_0=byte
+fan_ratio.pola_2_0=
+fan_ratio.fpath_2_0=
+fan_ratio.addr_2_0=0x00070014
+fan_ratio.len_2_0=1
+fan_ratio.bit_offset_2_0=
+
+fan_ratio.mode_2_1=config
+fan_ratio.int_cons_2_1=
+fan_ratio.src_2_1=cpld
+fan_ratio.frmt_2_1=byte
+fan_ratio.pola_2_1=
+fan_ratio.fpath_2_1=
+fan_ratio.addr_2_1=0x00070014
+fan_ratio.len_2_1=1
+fan_ratio.bit_offset_2_1=
+
+fan_ratio.mode_3_0=config
+fan_ratio.int_cons_3_0=
+fan_ratio.src_3_0=cpld
+fan_ratio.frmt_3_0=byte
+fan_ratio.pola_3_0=
+fan_ratio.fpath_3_0=
+fan_ratio.addr_3_0=0x00060015
+fan_ratio.len_3_0=1
+fan_ratio.bit_offset_3_0=
+
+fan_ratio.mode_3_1=config
+fan_ratio.int_cons_3_1=
+fan_ratio.src_3_1=cpld
+fan_ratio.frmt_3_1=byte
+fan_ratio.pola_3_1=
+fan_ratio.fpath_3_1=
+fan_ratio.addr_3_1=0x00060015
+fan_ratio.len_3_1=1
+fan_ratio.bit_offset_3_1=
+
+fan_ratio.mode_4_0=config
+fan_ratio.int_cons_4_0=
+fan_ratio.src_4_0=cpld
+fan_ratio.frmt_4_0=byte
+fan_ratio.pola_4_0=
+fan_ratio.fpath_4_0=
+fan_ratio.addr_4_0=0x00070015
+fan_ratio.len_4_0=1
+fan_ratio.bit_offset_4_0=
+
+fan_ratio.mode_4_1=config
+fan_ratio.int_cons_4_1=
+fan_ratio.src_4_1=cpld
+fan_ratio.frmt_4_1=byte
+fan_ratio.pola_4_1=
+fan_ratio.fpath_4_1=
+fan_ratio.addr_4_1=0x00070015
+fan_ratio.len_4_1=1
+fan_ratio.bit_offset_4_1=
+
+fan_ratio.mode_5_0=config
+fan_ratio.int_cons_5_0=
+fan_ratio.src_5_0=cpld
+fan_ratio.frmt_5_0=byte
+fan_ratio.pola_5_0=
+fan_ratio.fpath_5_0=
+fan_ratio.addr_5_0=0x00060016
+fan_ratio.len_5_0=1
+fan_ratio.bit_offset_5_0=
+
+fan_ratio.mode_5_1=config
+fan_ratio.int_cons_5_1=
+fan_ratio.src_5_1=cpld
+fan_ratio.frmt_5_1=byte
+fan_ratio.pola_5_1=
+fan_ratio.fpath_5_1=
+fan_ratio.addr_5_1=0x00060016
+fan_ratio.len_5_1=1
+fan_ratio.bit_offset_5_1=
+
+fan_ratio.mode_6_0=config
+fan_ratio.int_cons_6_0=
+fan_ratio.src_6_0=cpld
+fan_ratio.frmt_6_0=byte
+fan_ratio.pola_6_0=
+fan_ratio.fpath_6_0=
+fan_ratio.addr_6_0=0x00070016
+fan_ratio.len_6_0=1
+fan_ratio.bit_offset_6_0=
+
+fan_ratio.mode_6_1=config
+fan_ratio.int_cons_6_1=
+fan_ratio.src_6_1=cpld
+fan_ratio.frmt_6_1=byte
+fan_ratio.pola_6_1=
+fan_ratio.fpath_6_1=
+fan_ratio.addr_6_1=0x00070016
+fan_ratio.len_6_1=1
+fan_ratio.bit_offset_6_1=
+
+fan_ratio.mode_7_0=config
+fan_ratio.int_cons_7_0=
+fan_ratio.src_7_0=cpld
+fan_ratio.frmt_7_0=byte
+fan_ratio.pola_7_0=
+fan_ratio.fpath_7_0=
+fan_ratio.addr_7_0=0x00060017
+fan_ratio.len_7_0=1
+fan_ratio.bit_offset_7_0=
+
+fan_ratio.mode_7_1=config
+fan_ratio.int_cons_7_1=
+fan_ratio.src_7_1=cpld
+fan_ratio.frmt_7_1=byte
+fan_ratio.pola_7_1=
+fan_ratio.fpath_7_1=
+fan_ratio.addr_7_1=0x00060017
+fan_ratio.len_7_1=1
+fan_ratio.bit_offset_7_1=
+
+fan_ratio.mode_8_0=config
+fan_ratio.int_cons_8_0=
+fan_ratio.src_8_0=cpld
+fan_ratio.frmt_8_0=byte
+fan_ratio.pola_8_0=
+fan_ratio.fpath_8_0=
+fan_ratio.addr_8_0=0x00070017
+fan_ratio.len_8_0=1
+fan_ratio.bit_offset_8_0=
+
+fan_ratio.mode_8_1=config
+fan_ratio.int_cons_8_1=
+fan_ratio.src_8_1=cpld
+fan_ratio.frmt_8_1=byte
+fan_ratio.pola_8_1=
+fan_ratio.fpath_8_1=
+fan_ratio.addr_8_1=0x00070017
+fan_ratio.len_8_1=1
+fan_ratio.bit_offset_8_1=
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg
new file mode 100644
index 000000000000..a04af1e63db8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg
@@ -0,0 +1,107 @@
+# configuration item: the number of psus
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: psu main_dev is 2
+# minor_dev: psu minor_dev not exist(0)
+dev_num_2_0=4
+
+
+# configuration item: psu status
+# format: psu_status_[psu_index]_[status_id]
+# psu_index: start from 1
+# status_id: 0: presence 1: output 2: alert
+# psu1 presence status
+psu_status.mode_1_0=config
+psu_status.src_1_0=cpld
+psu_status.frmt_1_0=bit
+psu_status.pola_1_0=negative
+psu_status.addr_1_0=0x00010064
+psu_status.len_1_0=1
+psu_status.bit_offset_1_0=0
+
+psu_status.mode_1_1=config
+psu_status.src_1_1=cpld
+psu_status.frmt_1_1=bit
+psu_status.pola_1_1=positive
+psu_status.addr_1_1=0x00010064
+psu_status.len_1_1=1
+psu_status.bit_offset_1_1=1
+
+psu_status.mode_1_2=config
+psu_status.src_1_2=cpld
+psu_status.frmt_1_2=bit
+psu_status.pola_1_2=negative
+psu_status.addr_1_2=0x00010064
+psu_status.len_1_2=1
+psu_status.bit_offset_1_2=2
+
+psu_status.mode_2_0=config
+psu_status.src_2_0=cpld
+psu_status.frmt_2_0=bit
+psu_status.pola_2_0=negative
+psu_status.addr_2_0=0x00010064
+psu_status.len_2_0=1
+psu_status.bit_offset_2_0=4
+
+psu_status.mode_2_1=config
+psu_status.src_2_1=cpld
+psu_status.frmt_2_1=bit
+psu_status.pola_2_1=positive
+psu_status.addr_2_1=0x00010064
+psu_status.len_2_1=1
+psu_status.bit_offset_2_1=5
+
+psu_status.mode_2_2=config
+psu_status.src_2_2=cpld
+psu_status.frmt_2_2=bit
+psu_status.pola_2_2=negative
+psu_status.addr_2_2=0x00010064
+psu_status.len_2_2=1
+psu_status.bit_offset_2_2=6
+
+psu_status.mode_3_0=config
+psu_status.src_3_0=cpld
+psu_status.frmt_3_0=bit
+psu_status.pola_3_0=negative
+psu_status.addr_3_0=0x00010065
+psu_status.len_3_0=1
+psu_status.bit_offset_3_0=4
+
+psu_status.mode_3_1=config
+psu_status.src_3_1=cpld
+psu_status.frmt_3_1=bit
+psu_status.pola_3_1=positive
+psu_status.addr_3_1=0x00010065
+psu_status.len_3_1=1
+psu_status.bit_offset_3_1=5
+
+psu_status.mode_3_2=config
+psu_status.src_3_2=cpld
+psu_status.frmt_3_2=bit
+psu_status.pola_3_2=negative
+psu_status.addr_3_2=0x00010065
+psu_status.len_3_2=1
+psu_status.bit_offset_3_2=6
+
+psu_status.mode_4_0=config
+psu_status.src_4_0=cpld
+psu_status.frmt_4_0=bit
+psu_status.pola_4_0=negative
+psu_status.addr_4_0=0x00010065
+psu_status.len_4_0=1
+psu_status.bit_offset_4_0=0
+
+psu_status.mode_4_1=config
+psu_status.src_4_1=cpld
+psu_status.frmt_4_1=bit
+psu_status.pola_4_1=positive
+psu_status.addr_4_1=0x00010065
+psu_status.len_4_1=1
+psu_status.bit_offset_4_1=1
+
+psu_status.mode_4_2=config
+psu_status.src_4_2=cpld
+psu_status.frmt_4_2=bit
+psu_status.pola_4_2=negative
+psu_status.addr_4_2=0x00010065
+psu_status.len_4_2=1
+psu_status.bit_offset_4_2=2
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg
new file mode 100644
index 000000000000..075073962a2e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg
@@ -0,0 +1,593 @@
+# configuration item: the number of sffs
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: sff main_dev is 3
+# minor_dev: sff minor_dev not exist(0)
+dev_num_3_0=64
+
+
+# configuration item: The directory name of sff sysfs
+# format: sff_dir_name_[sff_index]
+# sff_index: start from 1
+sff_dir_name_1  =sff1
+sff_dir_name_2  =sff2
+sff_dir_name_3  =sff3
+sff_dir_name_4  =sff4
+sff_dir_name_5  =sff5
+sff_dir_name_6  =sff6
+sff_dir_name_7  =sff7
+sff_dir_name_8  =sff8
+sff_dir_name_9  =sff9
+sff_dir_name_10 =sff10
+sff_dir_name_11 =sff11
+sff_dir_name_12 =sff12
+sff_dir_name_13 =sff13
+sff_dir_name_14 =sff14
+sff_dir_name_15 =sff15
+sff_dir_name_16 =sff16
+sff_dir_name_17 =sff17
+sff_dir_name_18 =sff18
+sff_dir_name_19 =sff19
+sff_dir_name_20 =sff20
+sff_dir_name_21 =sff21
+sff_dir_name_22 =sff22
+sff_dir_name_23 =sff23
+sff_dir_name_24 =sff24
+sff_dir_name_25 =sff25
+sff_dir_name_26 =sff26
+sff_dir_name_27 =sff27
+sff_dir_name_28 =sff28
+sff_dir_name_29 =sff29
+sff_dir_name_30 =sff30
+sff_dir_name_31 =sff31
+sff_dir_name_32 =sff32
+sff_dir_name_33 =sff33
+sff_dir_name_34 =sff34
+sff_dir_name_35 =sff35
+sff_dir_name_36 =sff36
+sff_dir_name_37 =sff37
+sff_dir_name_38 =sff38
+sff_dir_name_39 =sff39
+sff_dir_name_40 =sff40
+sff_dir_name_41 =sff41
+sff_dir_name_42 =sff42
+sff_dir_name_43 =sff43
+sff_dir_name_44 =sff44
+sff_dir_name_45 =sff45
+sff_dir_name_46 =sff46
+sff_dir_name_47 =sff47
+sff_dir_name_48 =sff48
+sff_dir_name_49 =sff49
+sff_dir_name_50 =sff50
+sff_dir_name_51 =sff51
+sff_dir_name_52 =sff52
+sff_dir_name_53 =sff53
+sff_dir_name_54 =sff54
+sff_dir_name_55 =sff55
+sff_dir_name_56 =sff56
+sff_dir_name_57 =sff57
+sff_dir_name_58 =sff58
+sff_dir_name_59 =sff59
+sff_dir_name_60 =sff60
+sff_dir_name_61 =sff61
+sff_dir_name_62 =sff62
+sff_dir_name_63 =sff63
+sff_dir_name_64 =sff64
+
+# configuration item: sff cpld register status
+# format: sff_cpld_reg_[sff_index]_[cpld_reg]
+# sff_index: start from 1
+# cpld_reg: 1: power_on, 2: tx_fault, 3: tx_dis, 4:pre_n, 5:rx_los
+# 6: reset, 7: lpmode, 8: module_present, 9: interrupt
+
+# sff cpld presence status
+sff_cpld_reg.mode_1_8=config
+sff_cpld_reg.src_1_8=cpld
+sff_cpld_reg.frmt_1_8=bit
+sff_cpld_reg.pola_1_8=negative
+sff_cpld_reg.addr_1_8=0x00030073
+sff_cpld_reg.len_1_8=1
+sff_cpld_reg.bit_offset_1_8=0
+
+sff_cpld_reg.mode_2_8=config
+sff_cpld_reg.src_2_8=cpld
+sff_cpld_reg.frmt_2_8=bit
+sff_cpld_reg.pola_2_8=negative
+sff_cpld_reg.addr_2_8=0x00030073
+sff_cpld_reg.len_2_8=1
+sff_cpld_reg.bit_offset_2_8=1
+
+sff_cpld_reg.mode_3_8=config
+sff_cpld_reg.src_3_8=cpld
+sff_cpld_reg.frmt_3_8=bit
+sff_cpld_reg.pola_3_8=negative
+sff_cpld_reg.addr_3_8=0x00040072
+sff_cpld_reg.len_3_8=1
+sff_cpld_reg.bit_offset_3_8=0
+
+sff_cpld_reg.mode_4_8=config
+sff_cpld_reg.src_4_8=cpld
+sff_cpld_reg.frmt_4_8=bit
+sff_cpld_reg.pola_4_8=negative
+sff_cpld_reg.addr_4_8=0x00040072
+sff_cpld_reg.len_4_8=1
+sff_cpld_reg.bit_offset_4_8=1
+
+sff_cpld_reg.mode_5_8=config
+sff_cpld_reg.src_5_8=cpld
+sff_cpld_reg.frmt_5_8=bit
+sff_cpld_reg.pola_5_8=negative
+sff_cpld_reg.addr_5_8=0x00030073
+sff_cpld_reg.len_5_8=1
+sff_cpld_reg.bit_offset_5_8=2
+
+sff_cpld_reg.mode_6_8=config
+sff_cpld_reg.src_6_8=cpld
+sff_cpld_reg.frmt_6_8=bit
+sff_cpld_reg.pola_6_8=negative
+sff_cpld_reg.addr_6_8=0x00030073
+sff_cpld_reg.len_6_8=1
+sff_cpld_reg.bit_offset_6_8=3
+
+sff_cpld_reg.mode_7_8=config
+sff_cpld_reg.src_7_8=cpld
+sff_cpld_reg.frmt_7_8=bit
+sff_cpld_reg.pola_7_8=negative
+sff_cpld_reg.addr_7_8=0x00040072
+sff_cpld_reg.len_7_8=1
+sff_cpld_reg.bit_offset_7_8=2
+
+sff_cpld_reg.mode_8_8=config
+sff_cpld_reg.src_8_8=cpld
+sff_cpld_reg.frmt_8_8=bit
+sff_cpld_reg.pola_8_8=negative
+sff_cpld_reg.addr_8_8=0x00040072
+sff_cpld_reg.len_8_8=1
+sff_cpld_reg.bit_offset_8_8=3
+
+sff_cpld_reg.mode_9_8=config
+sff_cpld_reg.src_9_8=cpld
+sff_cpld_reg.frmt_9_8=bit
+sff_cpld_reg.pola_9_8=negative
+sff_cpld_reg.addr_9_8=0x00030073
+sff_cpld_reg.len_9_8=1
+sff_cpld_reg.bit_offset_9_8=4
+
+sff_cpld_reg.mode_10_8=config
+sff_cpld_reg.src_10_8=cpld
+sff_cpld_reg.frmt_10_8=bit
+sff_cpld_reg.pola_10_8=negative
+sff_cpld_reg.addr_10_8=0x00030073
+sff_cpld_reg.len_10_8=1
+sff_cpld_reg.bit_offset_10_8=5
+
+sff_cpld_reg.mode_11_8=config
+sff_cpld_reg.src_11_8=cpld
+sff_cpld_reg.frmt_11_8=bit
+sff_cpld_reg.pola_11_8=negative
+sff_cpld_reg.addr_11_8=0x00040072
+sff_cpld_reg.len_11_8=1
+sff_cpld_reg.bit_offset_11_8=4
+
+sff_cpld_reg.mode_12_8=config
+sff_cpld_reg.src_12_8=cpld
+sff_cpld_reg.frmt_12_8=bit
+sff_cpld_reg.pola_12_8=negative
+sff_cpld_reg.addr_12_8=0x00040072
+sff_cpld_reg.len_12_8=1
+sff_cpld_reg.bit_offset_12_8=5
+
+sff_cpld_reg.mode_13_8=config
+sff_cpld_reg.src_13_8=cpld
+sff_cpld_reg.frmt_13_8=bit
+sff_cpld_reg.pola_13_8=negative
+sff_cpld_reg.addr_13_8=0x00030073
+sff_cpld_reg.len_13_8=1
+sff_cpld_reg.bit_offset_13_8=6
+
+sff_cpld_reg.mode_14_8=config
+sff_cpld_reg.src_14_8=cpld
+sff_cpld_reg.frmt_14_8=bit
+sff_cpld_reg.pola_14_8=negative
+sff_cpld_reg.addr_14_8=0x00030073
+sff_cpld_reg.len_14_8=1
+sff_cpld_reg.bit_offset_14_8=7
+
+sff_cpld_reg.mode_15_8=config
+sff_cpld_reg.src_15_8=cpld
+sff_cpld_reg.frmt_15_8=bit
+sff_cpld_reg.pola_15_8=negative
+sff_cpld_reg.addr_15_8=0x00040072
+sff_cpld_reg.len_15_8=1
+sff_cpld_reg.bit_offset_15_8=6
+
+sff_cpld_reg.mode_16_8=config
+sff_cpld_reg.src_16_8=cpld
+sff_cpld_reg.frmt_16_8=bit
+sff_cpld_reg.pola_16_8=negative
+sff_cpld_reg.addr_16_8=0x00040072
+sff_cpld_reg.len_16_8=1
+sff_cpld_reg.bit_offset_16_8=7
+
+sff_cpld_reg.mode_17_8=config
+sff_cpld_reg.src_17_8=cpld
+sff_cpld_reg.frmt_17_8=bit
+sff_cpld_reg.pola_17_8=negative
+sff_cpld_reg.addr_17_8=0x00030074
+sff_cpld_reg.len_17_8=1
+sff_cpld_reg.bit_offset_17_8=0
+
+sff_cpld_reg.mode_18_8=config
+sff_cpld_reg.src_18_8=cpld
+sff_cpld_reg.frmt_18_8=bit
+sff_cpld_reg.pola_18_8=negative
+sff_cpld_reg.addr_18_8=0x00030074
+sff_cpld_reg.len_18_8=1
+sff_cpld_reg.bit_offset_18_8=1
+
+sff_cpld_reg.mode_19_8=config
+sff_cpld_reg.src_19_8=cpld
+sff_cpld_reg.frmt_19_8=bit
+sff_cpld_reg.pola_19_8=negative
+sff_cpld_reg.addr_19_8=0x00050073
+sff_cpld_reg.len_19_8=1
+sff_cpld_reg.bit_offset_19_8=0
+
+sff_cpld_reg.mode_20_8=config
+sff_cpld_reg.src_20_8=cpld
+sff_cpld_reg.frmt_20_8=bit
+sff_cpld_reg.pola_20_8=negative
+sff_cpld_reg.addr_20_8=0x00040073
+sff_cpld_reg.len_20_8=1
+sff_cpld_reg.bit_offset_20_8=0
+
+sff_cpld_reg.mode_21_8=config
+sff_cpld_reg.src_21_8=cpld
+sff_cpld_reg.frmt_21_8=bit
+sff_cpld_reg.pola_21_8=negative
+sff_cpld_reg.addr_21_8=0x00030074
+sff_cpld_reg.len_21_8=1
+sff_cpld_reg.bit_offset_21_8=2
+
+sff_cpld_reg.mode_22_8=config
+sff_cpld_reg.src_22_8=cpld
+sff_cpld_reg.frmt_22_8=bit
+sff_cpld_reg.pola_22_8=negative
+sff_cpld_reg.addr_22_8=0x00030074
+sff_cpld_reg.len_22_8=1
+sff_cpld_reg.bit_offset_22_8=3
+
+sff_cpld_reg.mode_23_8=config
+sff_cpld_reg.src_23_8=cpld
+sff_cpld_reg.frmt_23_8=bit
+sff_cpld_reg.pola_23_8=negative
+sff_cpld_reg.addr_23_8=0x00040073
+sff_cpld_reg.len_23_8=1
+sff_cpld_reg.bit_offset_23_8=1
+
+sff_cpld_reg.mode_24_8=config
+sff_cpld_reg.src_24_8=cpld
+sff_cpld_reg.frmt_24_8=bit
+sff_cpld_reg.pola_24_8=negative
+sff_cpld_reg.addr_24_8=0x00040073
+sff_cpld_reg.len_24_8=1
+sff_cpld_reg.bit_offset_24_8=2
+
+sff_cpld_reg.mode_25_8=config
+sff_cpld_reg.src_25_8=cpld
+sff_cpld_reg.frmt_25_8=bit
+sff_cpld_reg.pola_25_8=negative
+sff_cpld_reg.addr_25_8=0x00030074
+sff_cpld_reg.len_25_8=1
+sff_cpld_reg.bit_offset_25_8=4
+
+sff_cpld_reg.mode_26_8=config
+sff_cpld_reg.src_26_8=cpld
+sff_cpld_reg.frmt_26_8=bit
+sff_cpld_reg.pola_26_8=negative
+sff_cpld_reg.addr_26_8=0x00030074
+sff_cpld_reg.len_26_8=1
+sff_cpld_reg.bit_offset_26_8=5
+
+sff_cpld_reg.mode_27_8=config
+sff_cpld_reg.src_27_8=cpld
+sff_cpld_reg.frmt_27_8=bit
+sff_cpld_reg.pola_27_8=negative
+sff_cpld_reg.addr_27_8=0x00040073
+sff_cpld_reg.len_27_8=1
+sff_cpld_reg.bit_offset_27_8=3
+
+sff_cpld_reg.mode_28_8=config
+sff_cpld_reg.src_28_8=cpld
+sff_cpld_reg.frmt_28_8=bit
+sff_cpld_reg.pola_28_8=negative
+sff_cpld_reg.addr_28_8=0x00040073
+sff_cpld_reg.len_28_8=1
+sff_cpld_reg.bit_offset_28_8=4
+
+sff_cpld_reg.mode_29_8=config
+sff_cpld_reg.src_29_8=cpld
+sff_cpld_reg.frmt_29_8=bit
+sff_cpld_reg.pola_29_8=negative
+sff_cpld_reg.addr_29_8=0x00030074
+sff_cpld_reg.len_29_8=1
+sff_cpld_reg.bit_offset_29_8=6
+
+sff_cpld_reg.mode_30_8=config
+sff_cpld_reg.src_30_8=cpld
+sff_cpld_reg.frmt_30_8=bit
+sff_cpld_reg.pola_30_8=negative
+sff_cpld_reg.addr_30_8=0x00030074
+sff_cpld_reg.len_30_8=1
+sff_cpld_reg.bit_offset_30_8=7
+
+sff_cpld_reg.mode_31_8=config
+sff_cpld_reg.src_31_8=cpld
+sff_cpld_reg.frmt_31_8=bit
+sff_cpld_reg.pola_31_8=negative
+sff_cpld_reg.addr_31_8=0x00040073
+sff_cpld_reg.len_31_8=1
+sff_cpld_reg.bit_offset_31_8=5
+
+sff_cpld_reg.mode_32_8=config
+sff_cpld_reg.src_32_8=cpld
+sff_cpld_reg.frmt_32_8=bit
+sff_cpld_reg.pola_32_8=negative
+sff_cpld_reg.addr_32_8=0x00040073
+sff_cpld_reg.len_32_8=1
+sff_cpld_reg.bit_offset_32_8=6
+
+sff_cpld_reg.mode_33_8=config
+sff_cpld_reg.src_33_8=cpld
+sff_cpld_reg.frmt_33_8=bit
+sff_cpld_reg.pola_33_8=negative
+sff_cpld_reg.addr_33_8=0x00030075
+sff_cpld_reg.len_33_8=1
+sff_cpld_reg.bit_offset_33_8=0
+
+sff_cpld_reg.mode_34_8=config
+sff_cpld_reg.src_34_8=cpld
+sff_cpld_reg.frmt_34_8=bit
+sff_cpld_reg.pola_34_8=negative
+sff_cpld_reg.addr_34_8=0x00030075
+sff_cpld_reg.len_34_8=1
+sff_cpld_reg.bit_offset_34_8=1
+
+sff_cpld_reg.mode_35_8=config
+sff_cpld_reg.src_35_8=cpld
+sff_cpld_reg.frmt_35_8=bit
+sff_cpld_reg.pola_35_8=negative
+sff_cpld_reg.addr_35_8=0x00050073
+sff_cpld_reg.len_35_8=1
+sff_cpld_reg.bit_offset_35_8=1
+
+sff_cpld_reg.mode_36_8=config
+sff_cpld_reg.src_36_8=cpld
+sff_cpld_reg.frmt_36_8=bit
+sff_cpld_reg.pola_36_8=negative
+sff_cpld_reg.addr_36_8=0x00050073
+sff_cpld_reg.len_36_8=1
+sff_cpld_reg.bit_offset_36_8=2
+
+sff_cpld_reg.mode_37_8=config
+sff_cpld_reg.src_37_8=cpld
+sff_cpld_reg.frmt_37_8=bit
+sff_cpld_reg.pola_37_8=negative
+sff_cpld_reg.addr_37_8=0x00030075
+sff_cpld_reg.len_37_8=1
+sff_cpld_reg.bit_offset_37_8=2
+
+sff_cpld_reg.mode_38_8=config
+sff_cpld_reg.src_38_8=cpld
+sff_cpld_reg.frmt_38_8=bit
+sff_cpld_reg.pola_38_8=negative
+sff_cpld_reg.addr_38_8=0x00030075
+sff_cpld_reg.len_38_8=1
+sff_cpld_reg.bit_offset_38_8=3
+
+sff_cpld_reg.mode_39_8=config
+sff_cpld_reg.src_39_8=cpld
+sff_cpld_reg.frmt_39_8=bit
+sff_cpld_reg.pola_39_8=negative
+sff_cpld_reg.addr_39_8=0x00050073
+sff_cpld_reg.len_39_8=1
+sff_cpld_reg.bit_offset_39_8=3
+
+sff_cpld_reg.mode_40_8=config
+sff_cpld_reg.src_40_8=cpld
+sff_cpld_reg.frmt_40_8=bit
+sff_cpld_reg.pola_40_8=negative
+sff_cpld_reg.addr_40_8=0x00050073
+sff_cpld_reg.len_40_8=1
+sff_cpld_reg.bit_offset_40_8=4
+
+sff_cpld_reg.mode_41_8=config
+sff_cpld_reg.src_41_8=cpld
+sff_cpld_reg.frmt_41_8=bit
+sff_cpld_reg.pola_41_8=negative
+sff_cpld_reg.addr_41_8=0x00030075
+sff_cpld_reg.len_41_8=1
+sff_cpld_reg.bit_offset_41_8=4
+
+sff_cpld_reg.mode_42_8=config
+sff_cpld_reg.src_42_8=cpld
+sff_cpld_reg.frmt_42_8=bit
+sff_cpld_reg.pola_42_8=negative
+sff_cpld_reg.addr_42_8=0x00030075
+sff_cpld_reg.len_42_8=1
+sff_cpld_reg.bit_offset_42_8=5
+
+sff_cpld_reg.mode_43_8=config
+sff_cpld_reg.src_43_8=cpld
+sff_cpld_reg.frmt_43_8=bit
+sff_cpld_reg.pola_43_8=negative
+sff_cpld_reg.addr_43_8=0x00050073
+sff_cpld_reg.len_43_8=1
+sff_cpld_reg.bit_offset_43_8=5
+
+sff_cpld_reg.mode_44_8=config
+sff_cpld_reg.src_44_8=cpld
+sff_cpld_reg.frmt_44_8=bit
+sff_cpld_reg.pola_44_8=negative
+sff_cpld_reg.addr_44_8=0x00050073
+sff_cpld_reg.len_44_8=1
+sff_cpld_reg.bit_offset_44_8=6
+
+sff_cpld_reg.mode_45_8=config
+sff_cpld_reg.src_45_8=cpld
+sff_cpld_reg.frmt_45_8=bit
+sff_cpld_reg.pola_45_8=negative
+sff_cpld_reg.addr_45_8=0x00030075
+sff_cpld_reg.len_45_8=1
+sff_cpld_reg.bit_offset_45_8=6
+
+sff_cpld_reg.mode_46_8=config
+sff_cpld_reg.src_46_8=cpld
+sff_cpld_reg.frmt_46_8=bit
+sff_cpld_reg.pola_46_8=negative
+sff_cpld_reg.addr_46_8=0x00030075
+sff_cpld_reg.len_46_8=1
+sff_cpld_reg.bit_offset_46_8=7
+
+sff_cpld_reg.mode_47_8=config
+sff_cpld_reg.src_47_8=cpld
+sff_cpld_reg.frmt_47_8=bit
+sff_cpld_reg.pola_47_8=negative
+sff_cpld_reg.addr_47_8=0x00050073
+sff_cpld_reg.len_47_8=1
+sff_cpld_reg.bit_offset_47_8=7
+
+sff_cpld_reg.mode_48_8=config
+sff_cpld_reg.src_48_8=cpld
+sff_cpld_reg.frmt_48_8=bit
+sff_cpld_reg.pola_48_8=negative
+sff_cpld_reg.addr_48_8=0x00050074
+sff_cpld_reg.len_48_8=1
+sff_cpld_reg.bit_offset_48_8=0
+
+sff_cpld_reg.mode_49_8=config
+sff_cpld_reg.src_49_8=cpld
+sff_cpld_reg.frmt_49_8=bit
+sff_cpld_reg.pola_49_8=negative
+sff_cpld_reg.addr_49_8=0x00020071
+sff_cpld_reg.len_49_8=1
+sff_cpld_reg.bit_offset_49_8=0
+
+sff_cpld_reg.mode_50_8=config
+sff_cpld_reg.src_50_8=cpld
+sff_cpld_reg.frmt_50_8=bit
+sff_cpld_reg.pola_50_8=negative
+sff_cpld_reg.addr_50_8=0x00020071
+sff_cpld_reg.len_50_8=1
+sff_cpld_reg.bit_offset_50_8=1
+
+sff_cpld_reg.mode_51_8=config
+sff_cpld_reg.src_51_8=cpld
+sff_cpld_reg.frmt_51_8=bit
+sff_cpld_reg.pola_51_8=negative
+sff_cpld_reg.addr_51_8=0x00050074
+sff_cpld_reg.len_51_8=1
+sff_cpld_reg.bit_offset_51_8=1
+
+sff_cpld_reg.mode_52_8=config
+sff_cpld_reg.src_52_8=cpld
+sff_cpld_reg.frmt_52_8=bit
+sff_cpld_reg.pola_52_8=negative
+sff_cpld_reg.addr_52_8=0x00050074
+sff_cpld_reg.len_52_8=1
+sff_cpld_reg.bit_offset_52_8=2
+
+sff_cpld_reg.mode_53_8=config
+sff_cpld_reg.src_53_8=cpld
+sff_cpld_reg.frmt_53_8=bit
+sff_cpld_reg.pola_53_8=negative
+sff_cpld_reg.addr_53_8=0x00020071
+sff_cpld_reg.len_53_8=1
+sff_cpld_reg.bit_offset_53_8=2
+
+sff_cpld_reg.mode_54_8=config
+sff_cpld_reg.src_54_8=cpld
+sff_cpld_reg.frmt_54_8=bit
+sff_cpld_reg.pola_54_8=negative
+sff_cpld_reg.addr_54_8=0x00020071
+sff_cpld_reg.len_54_8=1
+sff_cpld_reg.bit_offset_54_8=3
+
+sff_cpld_reg.mode_55_8=config
+sff_cpld_reg.src_55_8=cpld
+sff_cpld_reg.frmt_55_8=bit
+sff_cpld_reg.pola_55_8=negative
+sff_cpld_reg.addr_55_8=0x00050074
+sff_cpld_reg.len_55_8=1
+sff_cpld_reg.bit_offset_55_8=3
+
+sff_cpld_reg.mode_56_8=config
+sff_cpld_reg.src_56_8=cpld
+sff_cpld_reg.frmt_56_8=bit
+sff_cpld_reg.pola_56_8=negative
+sff_cpld_reg.addr_56_8=0x00050074
+sff_cpld_reg.len_56_8=1
+sff_cpld_reg.bit_offset_56_8=4
+
+sff_cpld_reg.mode_57_8=config
+sff_cpld_reg.src_57_8=cpld
+sff_cpld_reg.frmt_57_8=bit
+sff_cpld_reg.pola_57_8=negative
+sff_cpld_reg.addr_57_8=0x00020071
+sff_cpld_reg.len_57_8=1
+sff_cpld_reg.bit_offset_57_8=4
+
+sff_cpld_reg.mode_58_8=config
+sff_cpld_reg.src_58_8=cpld
+sff_cpld_reg.frmt_58_8=bit
+sff_cpld_reg.pola_58_8=negative
+sff_cpld_reg.addr_58_8=0x00020071
+sff_cpld_reg.len_58_8=1
+sff_cpld_reg.bit_offset_58_8=5
+
+sff_cpld_reg.mode_59_8=config
+sff_cpld_reg.src_59_8=cpld
+sff_cpld_reg.frmt_59_8=bit
+sff_cpld_reg.pola_59_8=negative
+sff_cpld_reg.addr_59_8=0x00050074
+sff_cpld_reg.len_59_8=1
+sff_cpld_reg.bit_offset_59_8=5
+
+sff_cpld_reg.mode_60_8=config
+sff_cpld_reg.src_60_8=cpld
+sff_cpld_reg.frmt_60_8=bit
+sff_cpld_reg.pola_60_8=negative
+sff_cpld_reg.addr_60_8=0x00050074
+sff_cpld_reg.len_60_8=1
+sff_cpld_reg.bit_offset_60_8=6
+
+sff_cpld_reg.mode_61_8=config
+sff_cpld_reg.src_61_8=cpld
+sff_cpld_reg.frmt_61_8=bit
+sff_cpld_reg.pola_61_8=negative
+sff_cpld_reg.addr_61_8=0x00020071
+sff_cpld_reg.len_61_8=1
+sff_cpld_reg.bit_offset_61_8=6
+
+sff_cpld_reg.mode_62_8=config
+sff_cpld_reg.src_62_8=cpld
+sff_cpld_reg.frmt_62_8=bit
+sff_cpld_reg.pola_62_8=negative
+sff_cpld_reg.addr_62_8=0x00020071
+sff_cpld_reg.len_62_8=1
+sff_cpld_reg.bit_offset_62_8=7
+
+sff_cpld_reg.mode_63_8=config
+sff_cpld_reg.src_63_8=cpld
+sff_cpld_reg.frmt_63_8=bit
+sff_cpld_reg.pola_63_8=negative
+sff_cpld_reg.addr_63_8=0x00050074
+sff_cpld_reg.len_63_8=1
+sff_cpld_reg.bit_offset_63_8=7
+
+sff_cpld_reg.mode_64_8=config
+sff_cpld_reg.src_64_8=cpld
+sff_cpld_reg.frmt_64_8=bit
+sff_cpld_reg.pola_64_8=negative
+sff_cpld_reg.addr_64_8=0x00050075
+sff_cpld_reg.len_64_8=1
+sff_cpld_reg.bit_offset_64_8=0
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/cfg_file_name b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/cfg_file_name
new file mode 100644
index 000000000000..5f49420441a5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/plat_sysfs_cfg/cfg_file_name
@@ -0,0 +1,4 @@
+WB_PLAT_CPLD
+WB_PLAT_FAN
+WB_PLAT_PSU
+WB_PLAT_SFF
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/setup.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/setup.py
new file mode 100644
index 000000000000..6c3916921abb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/setup.py
@@ -0,0 +1,39 @@
+from setuptools import setup
+
+setup(
+    name='sonic-platform',
+    version='1.0',
+    description='SONiC platform API implementation',
+    license='Apache 2.0',
+    author='SONiC Team',
+    author_email='support',
+    url='',
+    maintainer='support',
+    maintainer_email='',
+    packages=[
+        'sonic_platform',
+        'plat_hal',
+        'wbutil',
+        'eepromutil',
+        'hal-config',
+        'config',
+    ],
+    py_modules=[
+        'hal_pltfm',
+        'platform_util',
+        'platform_intf',
+    ],
+    classifiers=[
+        'Development Status :: 3 - Alpha',
+        'Environment :: Plugins',
+        'Intended Audience :: Developers',
+        'Intended Audience :: Information Technology',
+        'Intended Audience :: System Administrators',
+        'License :: OSI Approved :: Apache Software License',
+        'Natural Language :: English',
+        'Operating System :: POSIX :: Linux',
+        'Programming Language :: Python :: 3.7',
+        'Topic :: Utilities',
+    ],
+    keywords='sonic SONiC platform PLATFORM',
+)

From ed1ee478b9f32fea730371e8ab6a61dd5fd85018 Mon Sep 17 00:00:00 2001
From: anamehra <54692434+anamehra@users.noreply.github.com>
Date: Sun, 24 Nov 2024 16:44:12 -0800
Subject: [PATCH 269/364] Update cisco-8000.ini to 202405.0.9 release (#20909)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Why I did it
Release Content
Chassis: Added services.conf for startup_tsa_tsb.service
Fixed incorrect acpi log level (MIGSMSFT-723)
Fixed rconsole unresponsive issue (MIGSMSFT-759)
Add sensor offset and scaling factor to fan control sensor block
Fix for platform_tests.api.test_thermal.TestThermalApi failure (MIGSMSFT-674)
Fix for TestPfcwdFunc.test_pfcwd_no_traffic - syslog error (MIGSMSFT-672)
Fixed “[8101] Fail to create switch as SAI_COMMON_API_BULK_CREATE failed with 100G uplink” (MIGSMSFT-680)
Disabled sensord which is replaced by sensormond. Added sensormond test configurations
Increase ACL Table limit from 16 to 32
Various SAI loganalyzer error fixes
---
 platform/checkout/cisco-8000.ini | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/checkout/cisco-8000.ini b/platform/checkout/cisco-8000.ini
index fcb26512c35b..ff86bdc5e57d 100644
--- a/platform/checkout/cisco-8000.ini
+++ b/platform/checkout/cisco-8000.ini
@@ -1,3 +1,3 @@
 [module]
 repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git
-ref=202405.0.8
+ref=202405.0.9

From 1427013ff7cd255112ba04c7baa8d6f25da96fdf Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 25 Nov 2024 19:01:21 +0800
Subject: [PATCH 270/364] [submodule] Update submodule sonic-swss-common to the
 latest HEAD automatically (#20910)

#### Why I did it
src/sonic-swss-common
```
* 6bac82b - (HEAD -> master, origin/master, origin/HEAD) Improve memory usage by move ZMQ serialize buffer from ZmqProducerStateTable to ZmqClient (#955) (69 minutes ago) [Hua Liu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index ebd2afb0a294..6bac82be1884 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit ebd2afb0a2946420f6a42ba1f54f8b2c971781be
+Subproject commit 6bac82be1884f8e2c7e43aef2c8a9e6ee20c440f

From b2113a58198d49c5553efa37264ff2660bf34414 Mon Sep 17 00:00:00 2001
From: krismarvell <108510436+krismarvell@users.noreply.github.com>
Date: Mon, 25 Nov 2024 21:47:38 +0530
Subject: [PATCH 271/364] Rename platform/innovium to platform/marvell-teralynx
 (#19829)

renamed platform folder names and asic types as below
platform/innovium renamed to platform/marvell-teralynx
---
 .gitmodules                                   |  6 +--
 README.md                                     |  8 +--
 .../x86_64-cel_midstone-r0/platform_asic      |  2 +-
 .../x86_64-delta_agc032-r0/platform_asic      |  2 +-
 .../platform_asic                             |  2 +-
 .../platform_asic                             |  2 +-
 .../platform_asic                             |  2 +-
 .../x86_64-wistron_6512_32r-r0/platform_asic  |  2 +-
 .../platform_asic                             |  2 +-
 dockers/docker-orchagent/orchagent.sh         |  2 +-
 dockers/docker-pde/syncd_init_common.sh       |  8 +--
 platform/innovium/docker-saiserver-invm.dep   |  8 ---
 platform/innovium/docker-saiserver-invm.mk    | 14 -----
 platform/innovium/docker-syncd-invm-rpc.mk    | 22 --------
 platform/innovium/invm-sai.mk                 | 17 ------
 platform/innovium/python-saithrift.mk         |  6 ---
 platform/innovium/rules.mk                    | 28 ----------
 platform/innovium/sonic-platform-marvell      |  1 -
 .../platform-modules-midstone-200i.init       | 52 -------------------
 .../debian/platform-modules-et-c032if.init    | 39 --------------
 .../debian/netberg_platform_version.sh        | 14 -----
 .../docker-saiserver-mrvl-teralynx.dep        |  8 +++
 .../docker-saiserver-mrvl-teralynx.mk         | 14 +++++
 .../Dockerfile.j2                             |  4 +-
 .../docker-saiserver-mrvl-teralynx}/start.sh  |  0
 .../supervisord.conf                          |  0
 .../docker-syncd-mrvl-teralynx-rpc.mk         | 22 ++++++++
 .../Dockerfile.j2                             | 12 ++---
 .../ptf_nn_agent.conf                         |  0
 .../docker-syncd-mrvl-teralynx.mk}            |  8 +--
 .../docker-syncd-mrvl-teralynx}/Dockerfile.j2 |  6 +--
 .../critical_processes                        |  0
 .../docker-syncd-mrvl-teralynx}/ivm_start.sh  |  0
 .../docker-syncd-mrvl-teralynx}/start.sh      |  0
 .../supervisord.conf                          |  0
 .../libsaithrift-dev.dep                      |  2 +-
 .../libsaithrift-dev.mk                       | 12 ++---
 .../one-image.mk                              |  8 +--
 .../platform-modules-cel.mk                   |  0
 .../platform-modules-delta.mk                 |  0
 .../platform-modules-marvell.mk               |  2 +-
 .../platform-modules-netberg.mk               |  0
 .../platform-modules-supermicro.mk            |  0
 .../platform-modules-wistron.mk               |  0
 .../platform.conf                             |  0
 platform/marvell-teralynx/python-saithrift.mk |  6 +++
 platform/marvell-teralynx/rules.mk            | 28 ++++++++++
 platform/marvell-teralynx/sai.mk              | 17 ++++++
 .../sonic-platform-marvell-teralynx           |  1 +
 .../sonic-platform-modules-cel/.gitignore     |  0
 .../sonic-platform-modules-cel/LICENSE        |  0
 .../sonic-platform-modules-cel/README.md      |  0
 .../debian/changelog                          |  0
 .../sonic-platform-modules-cel/debian/compat  |  0
 .../sonic-platform-modules-cel/debian/control |  0
 .../platform-modules-midstone-200i.install    |  0
 .../platform-modules-midstone-200i.postinst   |  0
 .../sonic-platform-modules-cel/debian/rules   |  0
 .../cfg/midstone-200i-modules.conf            |  0
 .../midstone-200i/modules/200i_cpld.c         |  0
 .../midstone-200i/modules/200i_wdt.c          |  0
 .../midstone-200i/modules/Makefile            |  0
 .../midstone-200i/modules/mc24lc64t.c         |  0
 .../platform-modules-midstone-200i.service    |  0
 .../sonic-platform-modules-delta/LICENSE      |  0
 .../common/modules/dni_emc2305.c              |  0
 .../debian/changelog                          |  0
 .../debian/compat                             |  0
 .../debian/control                            |  0
 .../debian/platform-modules-et-c032if.install |  0
 .../sonic-platform-modules-delta/debian/rules |  0
 .../et-c032if/cfg/et-c032if-modules.conf      |  0
 .../et-c032if/modules/Makefile                |  0
 .../modules/delta_et-c032if_platform.c        |  0
 .../scripts/et-c032if_platform_init.sh        |  0
 .../platform-modules-et-c032if.service        |  0
 .../aurora-715/modules/Makefile               |  0
 .../x86-64-netberg-aurora-715-common.c        |  2 +-
 .../x86-64-netberg-aurora-715-common.h        |  0
 .../modules/x86-64-netberg-aurora-715-fan.c   |  2 +-
 .../modules/x86-64-netberg-aurora-715-fan.h   |  0
 .../modules/x86-64-netberg-aurora-715-led.c   |  2 +-
 .../modules/x86-64-netberg-aurora-715-led.h   |  0
 .../modules/x86-64-netberg-aurora-715-power.c |  2 +-
 .../modules/x86-64-netberg-aurora-715-power.h |  0
 .../modules/x86-64-netberg-aurora-715-qsfp.c  |  2 +-
 .../modules/x86-64-netberg-aurora-715-qsfp.h  |  0
 .../modules/x86-64-netberg-aurora-715-sys.c   |  2 +-
 .../modules/x86-64-netberg-aurora-715-sys.h   |  0
 .../x86-64-netberg-aurora-715-thermal.c       |  2 +-
 .../x86-64-netberg-aurora-715-thermal.h       |  0
 .../modules/x86-64-netberg-aurora-715.h       |  0
 .../aurora-715/scripts/sensors                |  0
 .../service/nba715-platform-init.service      |  2 +-
 .../aurora-715/setup.py                       |  0
 .../aurora-715/sonic_platform/__init__.py     |  0
 .../aurora-715/sonic_platform/chassis.py      |  0
 .../aurora-715/sonic_platform/component.py    |  0
 .../aurora-715/sonic_platform/eeprom.py       |  0
 .../aurora-715/sonic_platform/fan.py          |  0
 .../aurora-715/sonic_platform/platDev.py      |  0
 .../aurora-715/sonic_platform/platform.py     |  0
 .../aurora-715/sonic_platform/psu.py          |  0
 .../aurora-715/sonic_platform/sfp.py          |  0
 .../aurora-715/sonic_platform/thermal.py      |  0
 .../templates/netberg_aurora-715_util.py.j2   |  0
 .../aurora-715/utils/halt                     |  0
 .../utils/netberg_nba715_platform.sh          |  0
 .../utils/netberg_nba715_sensors.py           |  0
 .../aurora-715/utils/netberg_nba715_startup   |  0
 .../aurora-715/utils/poweroff                 |  0
 .../aurora-715/utils/shutdown                 |  0
 .../debian/changelog                          |  0
 .../debian/compat                             |  0
 .../debian/control                            |  0
 .../debian/rules                              |  0
 .../sonic-platform-netberg-aurora-715.install |  0
 ...sonic-platform-netberg-aurora-715.postinst |  0
 .../debian/changelog                          |  0
 .../debian/compat                             |  0
 .../debian/control                            |  0
 .../platform-modules-sse-t7132s.install       |  0
 .../platform-modules-sse-t7132s.postinst      |  0
 .../debian/rules                              |  0
 .../sse-t7132s/cfg/iTCO_wdt.conf              |  0
 .../sse-t7132s/cfg/t7132s-modules.conf        |  0
 .../sse-t7132s/modules/Makefile               |  0
 .../sse-t7132s/modules/t7132s.c               |  0
 .../scripts/health_checker_thermal.py         |  0
 .../sse-t7132s/scripts/platform.sh            |  0
 .../sse-t7132s/scripts/sysledctl.py           |  0
 .../sse-t7132s/scripts/test_cpld.py           |  0
 .../sse-t7132s/setup.py                       |  0
 .../sse-t7132s/sonic_platform/__init__.py     |  0
 .../sse-t7132s/sonic_platform/chassis.py      |  0
 .../sse-t7132s/sonic_platform/component.py    |  0
 .../sse-t7132s/sonic_platform/eeprom.py       |  0
 .../sse-t7132s/sonic_platform/fan.py          |  0
 .../sse-t7132s/sonic_platform/fan_drawer.py   |  0
 .../sse-t7132s/sonic_platform/helper.py       |  0
 .../sse-t7132s/sonic_platform/pcie.py         |  0
 .../sse-t7132s/sonic_platform/platform.py     |  0
 .../sse-t7132s/sonic_platform/psu.py          |  0
 .../sse-t7132s/sonic_platform/sfp.py          |  0
 .../sse-t7132s/sonic_platform/thermal.py      |  0
 .../sse-t7132s/sonic_platform/watchdog.py     |  0
 .../platform-modules-sse-t7132s.service       |  0
 .../sse-t7132s/systemd/sysled.service         |  0
 .../6512-32r/modules/Makefile                 |  0
 .../6512-32r/modules/i2c-imc.c                |  0
 .../6512-32r/modules/oldjc42.c                |  0
 .../6512-32r/modules/wistron_6512_32r_cpld.c  |  0
 .../6512-32r/modules/wistron_6512_32r_fan.c   |  0
 .../6512-32r/modules/wistron_6512_32r_leds.c  |  0
 .../6512-32r/modules/wistron_6512_32r_oom.c   |  0
 .../6512-32r/modules/wistron_6512_32r_psu.c   |  0
 .../modules/wistron_6512_32r_syseeprom.c      |  0
 .../modules/wistron_6512_32r_thermal.c        |  0
 .../service/6512-32r-firmware_ver.service     |  0
 .../service/6512-32r-platform.service         |  0
 .../service/6512-32r-syseeprom.service        |  0
 .../service/platform-modules-6512-32r.service |  0
 .../6512-32r/setup.py                         |  0
 .../6512-32r/sonic_platform/__init__.py       |  0
 .../6512-32r/sonic_platform/chassis.py        |  0
 .../6512-32r/sonic_platform/component.py      |  0
 .../6512-32r/sonic_platform/eeprom.py         |  0
 .../6512-32r/sonic_platform/fan.py            |  0
 .../6512-32r/sonic_platform/fan_drawer.py     |  0
 .../6512-32r/sonic_platform/platform.py       |  0
 .../6512-32r/sonic_platform/psu.py            |  0
 .../6512-32r/sonic_platform/sfp.py            |  0
 .../6512-32r/sonic_platform/thermal.py        |  0
 .../6512-32r/sonic_platform/watchdog.py       |  0
 .../6512-32r/utils/platform_firmware_version  |  0
 .../6512-32r/utils/platform_sync              |  0
 .../6512-32r/utils/platform_syseeprom         |  0
 .../6512-32r/utils/sonic-fanthrml-monitor     |  0
 .../6512-32r/utils/sonic-led-monitor          |  0
 .../6512-32r/utils/sonic-psu-monitor          |  0
 .../6512-32r/utils/sonic-qsfp-eeprom-monitor  |  0
 .../6512-32r/utils/sonic-qsfp-monitor         |  0
 .../6512-32r/utils/sonic-send-temp-to-bmc     |  0
 .../6512-32r/utils/wistron_6512_32r_util.py   |  0
 .../sonic-platform-modules-wistron/LICENSE    |  0
 .../debian/changelog                          |  0
 .../debian/compat                             |  0
 .../debian/control                            |  0
 .../debian/rules                              |  0
 .../sonic-platform-wistron-6512-32r.install   |  0
 .../sonic-platform-wistron-6512-32r.postinst  |  0
 .../sonic-platform-wistron-sw-to3200k.install |  0
 ...sonic-platform-wistron-sw-to3200k.postinst |  0
 .../sw-to3200k/cfg/sw-to3200k-modules.conf    |  0
 .../sw-to3200k/classes/__init__.py            |  0
 .../sw-to3200k/modules/Makefile               |  0
 .../sw-to3200k/modules/wistron_i2c_psu.c      |  0
 .../modules/wistron_sw_to3200k_cpld.c         |  0
 .../modules/wistron_sw_to3200k_fan.c          |  0
 .../modules/wistron_sw_to3200k_leds.c         |  0
 .../modules/wistron_sw_to3200k_oom.c          |  0
 .../modules/wistron_sw_to3200k_psu.c          |  0
 .../modules/wistron_sw_to3200k_thermal.c      |  0
 .../platform-modules-sw-to3200k.service       |  0
 .../service/sw-to3200k-firmware_ver.service   |  0
 .../sw-to3200k/service/to3200k-led.service    |  0
 .../service/to3200k-platform.service          |  0
 .../sw-to3200k/service/to3200k-pld.service    |  0
 .../sw-to3200k/setup.py                       |  0
 .../sw-to3200k/sonic_platform/__init__.py     |  0
 .../sw-to3200k/sonic_platform/chassis.py      |  0
 .../sw-to3200k/sonic_platform/component.py    |  0
 .../sw-to3200k/sonic_platform/eeprom.py       |  0
 .../sw-to3200k/sonic_platform/fan.py          |  0
 .../sw-to3200k/sonic_platform/fan_drawer.py   |  0
 .../sw-to3200k/sonic_platform/platform.py     |  0
 .../sw-to3200k/sonic_platform/psu.py          |  0
 .../sw-to3200k/sonic_platform/sfp.py          |  0
 .../sw-to3200k/sonic_platform/thermal.py      |  0
 .../sw-to3200k/sonic_platform/watchdog.py     |  0
 .../utils/platform_firmware_version           |  0
 .../sw-to3200k/utils/platform_led             |  0
 .../sw-to3200k/utils/platform_pld             |  0
 .../sw-to3200k/utils/platform_sync            |  0
 .../sw-to3200k/utils/sonic-fanthrml-monitor   |  0
 .../sw-to3200k/utils/sonic-led-monitor        |  0
 .../sw-to3200k/utils/sonic-psu-monitor        |  0
 .../sw-to3200k/utils/sonic-qsfp-monitor       |  0
 .../sw-to3200k/utils/sw_to3200k_watchdog.sh   |  0
 .../utils/wistron_sw_to3200k_util.py          |  0
 230 files changed, 149 insertions(+), 256 deletions(-)
 delete mode 100644 platform/innovium/docker-saiserver-invm.dep
 delete mode 100644 platform/innovium/docker-saiserver-invm.mk
 delete mode 100755 platform/innovium/docker-syncd-invm-rpc.mk
 delete mode 100755 platform/innovium/invm-sai.mk
 delete mode 100755 platform/innovium/python-saithrift.mk
 delete mode 100755 platform/innovium/rules.mk
 delete mode 160000 platform/innovium/sonic-platform-marvell
 delete mode 100755 platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.init
 delete mode 100755 platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.init
 delete mode 100755 platform/innovium/sonic-platform-modules-netberg/debian/netberg_platform_version.sh
 create mode 100644 platform/marvell-teralynx/docker-saiserver-mrvl-teralynx.dep
 create mode 100644 platform/marvell-teralynx/docker-saiserver-mrvl-teralynx.mk
 rename platform/{innovium/docker-saiserver-invm => marvell-teralynx/docker-saiserver-mrvl-teralynx}/Dockerfile.j2 (88%)
 rename platform/{innovium/docker-saiserver-invm => marvell-teralynx/docker-saiserver-mrvl-teralynx}/start.sh (100%)
 rename platform/{innovium/docker-saiserver-invm => marvell-teralynx/docker-saiserver-mrvl-teralynx}/supervisord.conf (100%)
 create mode 100755 platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc.mk
 rename platform/{innovium/docker-syncd-invm-rpc => marvell-teralynx/docker-syncd-mrvl-teralynx-rpc}/Dockerfile.j2 (77%)
 rename platform/{innovium/docker-syncd-invm-rpc => marvell-teralynx/docker-syncd-mrvl-teralynx-rpc}/ptf_nn_agent.conf (100%)
 rename platform/{innovium/docker-syncd-invm.mk => marvell-teralynx/docker-syncd-mrvl-teralynx.mk} (63%)
 rename platform/{innovium/docker-syncd-invm => marvell-teralynx/docker-syncd-mrvl-teralynx}/Dockerfile.j2 (84%)
 rename platform/{innovium/docker-syncd-invm => marvell-teralynx/docker-syncd-mrvl-teralynx}/critical_processes (100%)
 rename platform/{innovium/docker-syncd-invm => marvell-teralynx/docker-syncd-mrvl-teralynx}/ivm_start.sh (100%)
 rename platform/{innovium/docker-syncd-invm => marvell-teralynx/docker-syncd-mrvl-teralynx}/start.sh (100%)
 rename platform/{innovium/docker-syncd-invm => marvell-teralynx/docker-syncd-mrvl-teralynx}/supervisord.conf (100%)
 rename platform/{innovium => marvell-teralynx}/libsaithrift-dev.dep (82%)
 rename platform/{innovium => marvell-teralynx}/libsaithrift-dev.mk (59%)
 rename platform/{innovium => marvell-teralynx}/one-image.mk (76%)
 rename platform/{innovium => marvell-teralynx}/platform-modules-cel.mk (100%)
 rename platform/{innovium => marvell-teralynx}/platform-modules-delta.mk (100%)
 rename platform/{innovium => marvell-teralynx}/platform-modules-marvell.mk (95%)
 rename platform/{innovium => marvell-teralynx}/platform-modules-netberg.mk (100%)
 rename platform/{innovium => marvell-teralynx}/platform-modules-supermicro.mk (100%)
 rename platform/{innovium => marvell-teralynx}/platform-modules-wistron.mk (100%)
 rename platform/{innovium => marvell-teralynx}/platform.conf (100%)
 create mode 100755 platform/marvell-teralynx/python-saithrift.mk
 create mode 100755 platform/marvell-teralynx/rules.mk
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 rename platform/{innovium => marvell-teralynx}/sonic-platform-modules-wistron/debian/sonic-platform-wistron-sw-to3200k.install (100%)
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 rename platform/{innovium => marvell-teralynx}/sonic-platform-modules-wistron/sw-to3200k/service/platform-modules-sw-to3200k.service (100%)
 rename platform/{innovium => marvell-teralynx}/sonic-platform-modules-wistron/sw-to3200k/service/sw-to3200k-firmware_ver.service (100%)
 rename platform/{innovium => marvell-teralynx}/sonic-platform-modules-wistron/sw-to3200k/service/to3200k-led.service (100%)
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 rename platform/{innovium => marvell-teralynx}/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/fan_drawer.py (100%)
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 rename platform/{innovium => marvell-teralynx}/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/thermal.py (100%)
 rename platform/{innovium => marvell-teralynx}/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/watchdog.py (100%)
 rename platform/{innovium => marvell-teralynx}/sonic-platform-modules-wistron/sw-to3200k/utils/platform_firmware_version (100%)
 rename platform/{innovium => marvell-teralynx}/sonic-platform-modules-wistron/sw-to3200k/utils/platform_led (100%)
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 rename platform/{innovium => marvell-teralynx}/sonic-platform-modules-wistron/sw-to3200k/utils/platform_sync (100%)
 rename platform/{innovium => marvell-teralynx}/sonic-platform-modules-wistron/sw-to3200k/utils/sonic-fanthrml-monitor (100%)
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 rename platform/{innovium => marvell-teralynx}/sonic-platform-modules-wistron/sw-to3200k/utils/sonic-psu-monitor (100%)
 rename platform/{innovium => marvell-teralynx}/sonic-platform-modules-wistron/sw-to3200k/utils/sonic-qsfp-monitor (100%)
 rename platform/{innovium => marvell-teralynx}/sonic-platform-modules-wistron/sw-to3200k/utils/sw_to3200k_watchdog.sh (100%)
 rename platform/{innovium => marvell-teralynx}/sonic-platform-modules-wistron/sw-to3200k/utils/wistron_sw_to3200k_util.py (100%)

diff --git a/.gitmodules b/.gitmodules
index 050d14baf3aa..1b7aed9f145f 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -124,9 +124,9 @@
 [submodule "platform/marvell/sonic-platform-marvell"]
 	path = platform/marvell/sonic-platform-marvell
 	url = https://github.com/Marvell-switching/sonic-platform-arm64.git
-[submodule "platform/innovium/sonic-platform-marvell"]
-	path = platform/innovium/sonic-platform-marvell
-	url = https://github.com/Marvell-switching/sonic-platform-marvell
 [submodule "src/sonic-stp"]
 	path = src/sonic-stp
 	url = https://github.com/sonic-net/sonic-stp
+[submodule "platform/marvell-teralynx/sonic-platform-marvell-teralynx"]
+	path = platform/marvell-teralynx/sonic-platform-marvell-teralynx
+	url = https://github.com/Marvell-switching/sonic-platform-marvell.git
diff --git a/README.md b/README.md
index 2488f972df41..5799352af345 100644
--- a/README.md
+++ b/README.md
@@ -3,7 +3,7 @@
 [![Broadcom](https://dev.azure.com/mssonic/build/_apis/build/status/broadcom/Azure.sonic-buildimage.official.broadcom?branchName=master&label=Broadcom)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=138&branchName=master)
 [![Centec](https://dev.azure.com/mssonic/build/_apis/build/status/centec/Azure.sonic-buildimage.official.centec?branchName=master&label=Centec)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=143&branchName=master)
 [![Centec(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/centec/Azure.sonic-buildimage.official.centec-arm64?branchName=master&label=Centec-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=140&branchName=master)
-[![Innovium](https://dev.azure.com/mssonic/build/_apis/build/status/innovium/Azure.sonic-buildimage.official.innovium?branchName=master&label=Innovium)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=148&branchName=master)
+[![Marvell-Teralynx](https://dev.azure.com/mssonic/build/_apis/build/status/marvell-teralynx/Azure.sonic-buildimage.official.innovium?branchName=master&label=Marvell-Teralynx)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=148&branchName=master)
 [![Mellanox](https://dev.azure.com/mssonic/build/_apis/build/status/mellanox/Azure.sonic-buildimage.official.mellanox?branchName=master&label=Mellanox)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=139&branchName=master)
 [![Marvell(armhf)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-armhf?branchName=master&label=Marvell-armhf)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=141&branchName=master)
 [![Marvell(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-arm64?branchName=master&label=Marvell-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=999&branchName=master)
@@ -215,7 +215,7 @@ The supported ASIC vendors are:
 * PLATFORM=centec
 * PLATFORM=nephos
 * PLATFORM=nvidia-bluefield
-* PLATFORM=innovium
+* PLATFORM=marvell-teralynx
 * PLATFORM=vs
 
 ## Usage for ARM Architecture
@@ -373,8 +373,8 @@ on the SAI version for each SONiC release.
     and Mellanox switch ASIC (gzip tar archive)
   * docker-syncd-nephos.gz: docker image for the daemon to sync database
     and Nephos switch ASIC (gzip tar archive)
-  * docker-syncd-invm.gz: docker image for the daemon to sync database
-    and Innovium switch ASIC (gzip tar archive)
+  * docker-syncd-mrvl-teralynx.gz: docker image for the daemon to sync database
+    and Marvell-Teralynx switch ASIC (gzip tar archive)
   * docker-sonic-p4.gz: docker image for all-in-one for p4 software switch
     (gzip tar archive)
   * docker-sonic-vs.gz: docker image for all-in-one for software virtual switch
diff --git a/device/celestica/x86_64-cel_midstone-r0/platform_asic b/device/celestica/x86_64-cel_midstone-r0/platform_asic
index 84083a7415d9..a657472d7ad2 100644
--- a/device/celestica/x86_64-cel_midstone-r0/platform_asic
+++ b/device/celestica/x86_64-cel_midstone-r0/platform_asic
@@ -1 +1 @@
-innovium
+marvell-teralynx
diff --git a/device/delta/x86_64-delta_agc032-r0/platform_asic b/device/delta/x86_64-delta_agc032-r0/platform_asic
index 84083a7415d9..a657472d7ad2 100644
--- a/device/delta/x86_64-delta_agc032-r0/platform_asic
+++ b/device/delta/x86_64-delta_agc032-r0/platform_asic
@@ -1 +1 @@
-innovium
+marvell-teralynx
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/platform_asic b/device/marvell/x86_64-marvell_dbmvtx9180-r0/platform_asic
index 84083a7415d9..a657472d7ad2 100644
--- a/device/marvell/x86_64-marvell_dbmvtx9180-r0/platform_asic
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/platform_asic
@@ -1 +1 @@
-innovium
+marvell-teralynx
diff --git a/device/netberg/x86_64-netberg_aurora_715-r0/platform_asic b/device/netberg/x86_64-netberg_aurora_715-r0/platform_asic
index 84083a7415d9..a657472d7ad2 100644
--- a/device/netberg/x86_64-netberg_aurora_715-r0/platform_asic
+++ b/device/netberg/x86_64-netberg_aurora_715-r0/platform_asic
@@ -1 +1 @@
-innovium
+marvell-teralynx
diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/platform_asic b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/platform_asic
index 84083a7415d9..a657472d7ad2 100644
--- a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/platform_asic
+++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/platform_asic
@@ -1 +1 @@
-innovium
+marvell-teralynx
diff --git a/device/wistron/x86_64-wistron_6512_32r-r0/platform_asic b/device/wistron/x86_64-wistron_6512_32r-r0/platform_asic
index 84083a7415d9..a657472d7ad2 100644
--- a/device/wistron/x86_64-wistron_6512_32r-r0/platform_asic
+++ b/device/wistron/x86_64-wistron_6512_32r-r0/platform_asic
@@ -1 +1 @@
-innovium
+marvell-teralynx
diff --git a/device/wistron/x86_64-wistron_sw_to3200k-r0/platform_asic b/device/wistron/x86_64-wistron_sw_to3200k-r0/platform_asic
index 84083a7415d9..a657472d7ad2 100644
--- a/device/wistron/x86_64-wistron_sw_to3200k-r0/platform_asic
+++ b/device/wistron/x86_64-wistron_sw_to3200k-r0/platform_asic
@@ -1 +1 @@
-innovium
+marvell-teralynx
diff --git a/dockers/docker-orchagent/orchagent.sh b/dockers/docker-orchagent/orchagent.sh
index 256def591807..4889597dd703 100755
--- a/dockers/docker-orchagent/orchagent.sh
+++ b/dockers/docker-orchagent/orchagent.sh
@@ -63,7 +63,7 @@ elif [ "$platform" == "vs" ]; then
     ORCHAGENT_ARGS+="-m $MAC_ADDRESS"
 elif [ "$platform" == "mellanox" ]; then
     ORCHAGENT_ARGS+=""
-elif [ "$platform" == "innovium" ]; then
+elif [ "$platform" == "marvell-teralynx" ]; then
     ORCHAGENT_ARGS+="-m $MAC_ADDRESS"
 elif [ "$platform" == "nvidia-bluefield" ]; then
     ORCHAGENT_ARGS+="-m $MAC_ADDRESS"
diff --git a/dockers/docker-pde/syncd_init_common.sh b/dockers/docker-pde/syncd_init_common.sh
index 0212f842329a..7a28d7208f01 100755
--- a/dockers/docker-pde/syncd_init_common.sh
+++ b/dockers/docker-pde/syncd_init_common.sh
@@ -207,11 +207,11 @@ config_syncd_vs()
     CMD_ARGS+=" -p $HWSKU_DIR/sai.profile"
 }
 
-config_syncd_innovium()
+config_syncd_marvell_teralynx()
 {
     CMD_ARGS+=" -p $HWSKU_DIR/sai.profile"
     ulimit -s 65536
-    export II_ROOT="/var/log/invm"
+    export II_ROOT="/var/log/mrvl_teralynx"
     export II_APPEND_LOG=1
     mkdir -p $II_ROOT
 }
@@ -236,8 +236,8 @@ config_syncd()
         config_syncd_nephos
     elif [ "$SONIC_ASIC_TYPE" == "vs" ]; then
         config_syncd_vs
-    elif [ "$SONIC_ASIC_TYPE" == "innovium" ]; then
-        config_syncd_innovium
+    elif [ "$SONIC_ASIC_TYPE" == "marvell-teralynx" ]; then
+        config_syncd_marvell_teralynx
     else
         echo "Unknown ASIC type $SONIC_ASIC_TYPE"
         exit 1
diff --git a/platform/innovium/docker-saiserver-invm.dep b/platform/innovium/docker-saiserver-invm.dep
deleted file mode 100644
index cf8cc4b6b0f8..000000000000
--- a/platform/innovium/docker-saiserver-invm.dep
+++ /dev/null
@@ -1,8 +0,0 @@
-DPATH       := $($(DOCKER_SAISERVER_INVM)_PATH)
-DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/innovium/docker-saiserver-invm.mk platform/innovium/docker-saiserver-invm.dep
-DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES   += $(shell git ls-files $(DPATH))
-
-$(DOCKER_SAISERVER_INVM)_CACHE_MODE  := GIT_CONTENT_SHA
-$(DOCKER_SAISERVER_INVM)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
-$(DOCKER_SAISERVER_INVM)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/innovium/docker-saiserver-invm.mk b/platform/innovium/docker-saiserver-invm.mk
deleted file mode 100644
index 1f30efc6b1c8..000000000000
--- a/platform/innovium/docker-saiserver-invm.mk
+++ /dev/null
@@ -1,14 +0,0 @@
-# docker image for invm saiserver
-
-DOCKER_SAISERVER_INVM = docker-saiserver$(SAITHRIFT_VER)-invm.gz
-$(DOCKER_SAISERVER_INVM)_PATH = $(PLATFORM_PATH)/docker-saiserver-invm
-$(DOCKER_SAISERVER_INVM)_DEPENDS += $(SAISERVER)
-$(DOCKER_SAISERVER_INVM)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
-SONIC_DOCKER_IMAGES += $(DOCKER_SAISERVER_INVM)
-
-$(DOCKER_SAISERVER_INVM)_CONTAINER_NAME = saiserver$(SAITHRIFT_VER)
-$(DOCKER_SAISERVER_INVM)_RUN_OPT += --privileged -t
-$(DOCKER_SAISERVER_INVM)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf
-$(DOCKER_SAISERVER_INVM)_RUN_OPT += -v /var/run/docker-saiserver:/var/run/sswsyncd
-$(DOCKER_SAISERVER_INVM)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
-$(DOCKER_SAISERVER_INVM)_RUN_OPT += -v /host/warmboot:/var/warmboot
diff --git a/platform/innovium/docker-syncd-invm-rpc.mk b/platform/innovium/docker-syncd-invm-rpc.mk
deleted file mode 100755
index c4e1c8762876..000000000000
--- a/platform/innovium/docker-syncd-invm-rpc.mk
+++ /dev/null
@@ -1,22 +0,0 @@
-# docker image for innovium syncd with rpc
-
-DOCKER_SYNCD_INVM_RPC = docker-syncd-invm-rpc.gz
-$(DOCKER_SYNCD_INVM_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-invm-rpc
-$(DOCKER_SYNCD_INVM_RPC)_DEPENDS += $(SYNCD_RPC) $(INVM_LIBSAI) $(INVM_SHELL)
-$(DOCKER_SYNCD_INVM_RPC)_PYTHON_WHEELS += $(PTF_PY3)
-$(DOCKER_SYNCD_INVM_RPC)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
-$(DOCKER_SYNCD_INVM_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE)
-SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_INVM_RPC)
-SONIC_BOOKWORM_DOCKERS += $(DOCKER_SYNCD_INVM_RPC)
-ifeq ($(ENABLE_SYNCD_RPC),y)
-SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_INVM_RPC)
-endif
-
-$(DOCKER_SYNCD_INVM_RPC)_CONTAINER_NAME = syncd
-$(DOCKER_SYNCD_INVM_RPC)_VERSION = 1.0.0-rpc
-$(DOCKER_SYNCD_INVM_RPC)_PACKAGE_NAME = syncd
-$(DOCKER_SYNCD_INVM_RPC)_RUN_OPT += --privileged -t
-$(DOCKER_SYNCD_INVM_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf
-$(DOCKER_SYNCD_INVM_RPC)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd
-$(DOCKER_SYNCD_INVM_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
-$(DOCKER_SYNCD_INVM_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot
diff --git a/platform/innovium/invm-sai.mk b/platform/innovium/invm-sai.mk
deleted file mode 100755
index fa3e8abad9ad..000000000000
--- a/platform/innovium/invm-sai.mk
+++ /dev/null
@@ -1,17 +0,0 @@
-# INVM SAI
-
-INVM_SAI_ONLINE = https://github.com/Innovium/SONiC/raw/master/debian/master
-
-INVM_LIBSAI = isai.deb
-INVM_HSAI   = saihdr.deb
-INVM_DRV    = ipd.deb
-INVM_SHELL  = ishell.deb
-
-$(INVM_LIBSAI)_URL = $(INVM_SAI_ONLINE)/$(INVM_LIBSAI)
-$(INVM_HSAI)_URL   =  $(INVM_SAI_ONLINE)/$(INVM_HSAI)
-$(INVM_DRV)_URL    =  $(INVM_SAI_ONLINE)/$(INVM_DRV)
-$(INVM_SHELL)_URL  =  $(INVM_SAI_ONLINE)/$(INVM_SHELL)
-
-$(eval $(call add_conflict_package,$(INVM_HSAI),$(LIBSAIVS_DEV)))
-
-SONIC_ONLINE_DEBS  += $(INVM_LIBSAI) $(INVM_HSAI) $(INVM_DRV) $(INVM_SHELL)
diff --git a/platform/innovium/python-saithrift.mk b/platform/innovium/python-saithrift.mk
deleted file mode 100755
index 23d7df188346..000000000000
--- a/platform/innovium/python-saithrift.mk
+++ /dev/null
@@ -1,6 +0,0 @@
-# python-saithrift package
-
-PYTHON_SAITHRIFT_INVM = python-saithrift_1.2.1_$(CONFIGURED_ARCH).deb
-$(PYTHON_SAITHRIFT_INVM)_SRC_PATH = $(SRC_PATH)/SAI
-$(PYTHON_SAITHRIFT_INVM)_DEPENDS += $(INVM_LIBSAI) $(INVM_HSAI) $(THRIFT_COMPILER) $(PYTHON_THRIFT) $(LIBTHRIFT_DEV)
-SONIC_DPKG_DEBS += $(PYTHON_SAITHRIFT_INVM)
diff --git a/platform/innovium/rules.mk b/platform/innovium/rules.mk
deleted file mode 100755
index 906d0619d5f5..000000000000
--- a/platform/innovium/rules.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-include $(PLATFORM_PATH)/invm-sai.mk
-include $(PLATFORM_PATH)/platform-modules-cel.mk
-include $(PLATFORM_PATH)/platform-modules-supermicro.mk
-include $(PLATFORM_PATH)/platform-modules-wistron.mk
-include $(PLATFORM_PATH)/platform-modules-marvell.mk
-include $(PLATFORM_PATH)/docker-syncd-invm.mk
-include $(PLATFORM_PATH)/docker-syncd-invm-rpc.mk
-include $(PLATFORM_PATH)/one-image.mk
-include $(PLATFORM_PATH)/docker-saiserver-invm.mk
-include $(PLATFORM_PATH)/libsaithrift-dev.mk
-include $(PLATFORM_PATH)/python-saithrift.mk
-
-SONIC_ALL += $(SONIC_INVM_ONE_IMAGE) \
-             $(DOCKER_FPM) \
-             $(DOCKER_PTF_INVM) \
-             $(DOCKER_SYNCD_INVM_RPC)
-
-# Inject invm sai into syncd
-$(SYNCD)_DEPENDS += $(INVM_HSAI) $(INVM_LIBSAI) $(INVM_SHELL)
-$(SYNCD)_UNINSTALLS += $(INVM_HSAI)
-
-ifeq ($(ENABLE_SYNCD_RPC),y)
-$(SYNCD)_DEPENDS := $(filter-out $(LIBTHRIFT_DEV),$($(SYNCD)_DEPENDS))
-$(SYNCD)_DEPENDS += $(LIBSAITHRIFT_DEV)
-endif
-
-# Runtime dependency on invm sai is set only for syncd
-$(SYNCD)_RDEPENDS += $(INVM_HSAI)
diff --git a/platform/innovium/sonic-platform-marvell b/platform/innovium/sonic-platform-marvell
deleted file mode 160000
index a6e250959b4e..000000000000
--- a/platform/innovium/sonic-platform-marvell
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit a6e250959b4e98f443e759179ac25f93cc891c9a
diff --git a/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.init b/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.init
deleted file mode 100755
index 7074d2b58125..000000000000
--- a/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.init
+++ /dev/null
@@ -1,52 +0,0 @@
-#!/bin/bash
-
-### BEGIN INIT INFO
-# Provides:          setup-board
-# Required-Start:    $portmap
-# Required-Stop:
-# Should-Start:
-# Should-Stop:
-# Default-Start:     S
-# Default-Stop:      0 6
-# Short-Description: Setup 200i board.
-### END INIT INFO
-
-case "$1" in
-start)
-        echo -n "Setting up board... "
-
-        # Attach TLV 0x56 eeprom
-        echo 24lc64t 0x56 > /sys/bus/i2c/devices/i2c-0/new_device
-        sleep 2
-
-        modprobe 200i-cpld
-        sleep 2
-
-        # Turn off/down lpmod by defult (0 - Normal, 1 - Low Pow)
-        echo 0x00 > /sys/devices/platform/ms200i_cpld/qsfp_lpmode
-
-        # Attach 64 instances of EEPROM driver QSFP ports
-        for ((n=1;n<=66;n++));
-        do
-                echo sff8436 0x50 > /sys/bus/i2c/devices/i2c-$n/new_device
-        sleep 0.1
-        done
-
-        echo "done."
-        ;;
-
-stop)
-        echo "done."
-        ;;
-
-force-reload|restart)
-        echo "Not supported"
-        ;;
-
-*)
-        echo "Usage: /etc/init.d/platform-modules-200i.init {start|stop}"
-        exit 1
-        ;;
-esac
-
-exit 0
diff --git a/platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.init b/platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.init
deleted file mode 100755
index f2d24b04a0d4..000000000000
--- a/platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.init
+++ /dev/null
@@ -1,39 +0,0 @@
-#!/bin/bash
-
-### BEGIN INIT INFO
-# Provides:          setup-board
-# Required-Start:
-# Required-Stop:
-# Should-Start:
-# Should-Stop:
-# Default-Start:     S
-# Default-Stop:      0 6
-# Short-Description: Setup et-c032if board.
-### END INIT INFO
-
-case "$1" in
-start)
-    echo -n "Setting up board... "
-    modprobe optoe
-    modprobe delta_et-c032if_platform
-
-    /usr/local/bin/et-c032if_platform_init.sh
-    echo "done."
-    ;;
-
-stop)
-    echo "done."
-
-    ;;
-
-force-reload|restart)
-    echo "Not supported"
-    ;;
-
-*)
-    echo "Usage: /etc/init.d/platform-modules-et-c032if.init {start|stop}"
-    exit 1
-    ;;
-esac
-
-exit 0
diff --git a/platform/innovium/sonic-platform-modules-netberg/debian/netberg_platform_version.sh b/platform/innovium/sonic-platform-modules-netberg/debian/netberg_platform_version.sh
deleted file mode 100755
index 17c6ff4cdd76..000000000000
--- a/platform/innovium/sonic-platform-modules-netberg/debian/netberg_platform_version.sh
+++ /dev/null
@@ -1,14 +0,0 @@
-#! /bin/sh
-# driver version
-
-PLATFROM=$1
-PLATFROM_PATH=$2
-
-export PLATFORM_DRIVER_VER='"0.3.16"'
-
-echo "PLATFORM_DRIVER_VER = $PLATFORM_DRIVER_VER"
-
-util_name=$(echo $PLATFROM)
-
-j2 $PLATFROM_PATH/templates/netberg_${util_name}_util.py.j2 -o $PLATFROM_PATH/utils/netberg_${util_name}_util.py
-chmod 775 $PLATFROM_PATH/utils/netberg_${util_name}_util.py
diff --git a/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx.dep b/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx.dep
new file mode 100644
index 000000000000..5fa3dd443899
--- /dev/null
+++ b/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx.dep
@@ -0,0 +1,8 @@
+DPATH       := $($(DOCKER_SAISERVER_MRVL_TERALYNX)_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/marvell-teralynx/docker-saiserver-mrvl-teralynx.mk platform/marvell-teralynx/docker-saiserver-mrvl-teralynx.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(DPATH))
+
+$(DOCKER_SAISERVER_MRVL_TERALYNX)_CACHE_MODE  := GIT_CONTENT_SHA
+$(DOCKER_SAISERVER_MRVL_TERALYNX)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_SAISERVER_MRVL_TERALYNX)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx.mk b/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx.mk
new file mode 100644
index 000000000000..3c01455d4c67
--- /dev/null
+++ b/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx.mk
@@ -0,0 +1,14 @@
+# docker image for mrvl-teralynx saiserver
+
+DOCKER_SAISERVER_MRVL_TERALYNX = docker-saiserver$(SAITHRIFT_VER)-mrvl-teralynx.gz
+$(DOCKER_SAISERVER_MRVL_TERALYNX)_PATH = $(PLATFORM_PATH)/docker-saiserver-mrvl-teralynx
+$(DOCKER_SAISERVER_MRVL_TERALYNX)_DEPENDS += $(SAISERVER)
+$(DOCKER_SAISERVER_MRVL_TERALYNX)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
+SONIC_DOCKER_IMAGES += $(DOCKER_SAISERVER_MRVL_TERALYNX)
+
+$(DOCKER_SAISERVER_MRVL_TERALYNX)_CONTAINER_NAME = saiserver$(SAITHRIFT_VER)
+$(DOCKER_SAISERVER_MRVL_TERALYNX)_RUN_OPT += --privileged -t
+$(DOCKER_SAISERVER_MRVL_TERALYNX)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf
+$(DOCKER_SAISERVER_MRVL_TERALYNX)_RUN_OPT += -v /var/run/docker-saiserver:/var/run/sswsyncd
+$(DOCKER_SAISERVER_MRVL_TERALYNX)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
+$(DOCKER_SAISERVER_MRVL_TERALYNX)_RUN_OPT += -v /host/warmboot:/var/warmboot
diff --git a/platform/innovium/docker-saiserver-invm/Dockerfile.j2 b/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx/Dockerfile.j2
similarity index 88%
rename from platform/innovium/docker-saiserver-invm/Dockerfile.j2
rename to platform/marvell-teralynx/docker-saiserver-mrvl-teralynx/Dockerfile.j2
index c6d0ada17e36..2dd04f57f4e7 100644
--- a/platform/innovium/docker-saiserver-invm/Dockerfile.j2
+++ b/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx/Dockerfile.j2
@@ -21,13 +21,13 @@ RUN pip3 install numpy
 RUN pip3 install yamlordereddictloader
 
 COPY \
-{% for deb in docker_saiserver_invm_debs.split(' ') -%}
+{% for deb in docker_saiserver_mrvl_teralynx_debs.split(' ') -%}
 debs/{{ deb }}{{' '}}
 {%- endfor -%}
 debs/
 
 RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \
-{% for deb in docker_saiserver_invm_debs.split(' ') -%}
+{% for deb in docker_saiserver_mrvl_teralynx_debs.split(' ') -%}
 dpkg_apt debs/{{ deb }}{{'; '}}
 {%- endfor %}
 
diff --git a/platform/innovium/docker-saiserver-invm/start.sh b/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx/start.sh
similarity index 100%
rename from platform/innovium/docker-saiserver-invm/start.sh
rename to platform/marvell-teralynx/docker-saiserver-mrvl-teralynx/start.sh
diff --git a/platform/innovium/docker-saiserver-invm/supervisord.conf b/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx/supervisord.conf
similarity index 100%
rename from platform/innovium/docker-saiserver-invm/supervisord.conf
rename to platform/marvell-teralynx/docker-saiserver-mrvl-teralynx/supervisord.conf
diff --git a/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc.mk b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc.mk
new file mode 100755
index 000000000000..c0ba78183dcf
--- /dev/null
+++ b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc.mk
@@ -0,0 +1,22 @@
+# docker image for marvell-teralynx syncd with rpc
+
+DOCKER_SYNCD_MRVL_TERALYNX_RPC = docker-syncd-mrvl-teralynx-rpc.gz
+$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-mrvl-teralynx-rpc
+$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_DEPENDS += $(SYNCD_RPC) $(MRVL_TERALYNX_LIBSAI) $(MRVL_TERALYNX_SHELL)
+$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_PYTHON_WHEELS += $(PTF_PY3)
+$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
+$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE)
+SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_MRVL_TERALYNX_RPC)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_SYNCD_MRVL_TERALYNX_RPC)
+ifeq ($(ENABLE_SYNCD_RPC),y)
+SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_MRVL_TERALYNX_RPC)
+endif
+
+$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_CONTAINER_NAME = syncd
+$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_VERSION = 1.0.0-rpc
+$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_PACKAGE_NAME = syncd
+$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_RUN_OPT += --privileged -t
+$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf
+$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd
+$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
+$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot
diff --git a/platform/innovium/docker-syncd-invm-rpc/Dockerfile.j2 b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc/Dockerfile.j2
similarity index 77%
rename from platform/innovium/docker-syncd-invm-rpc/Dockerfile.j2
rename to platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc/Dockerfile.j2
index b5e00c0a8118..39fe5a21e2ed 100755
--- a/platform/innovium/docker-syncd-invm-rpc/Dockerfile.j2
+++ b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc/Dockerfile.j2
@@ -1,11 +1,11 @@
-FROM docker-syncd-invm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-syncd-mrvl-teralynx-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 {% from "dockers/dockerfile-macros.j2" import install_python_wheels, copy_files %}
 
 ## Make apt-get non-interactive
 ENV DEBIAN_FRONTEND=noninteractive
 
 COPY \
-{% for deb in docker_syncd_invm_rpc_debs.split(' ') -%}
+{% for deb in docker_syncd_mrvl_teralynx_rpc_debs.split(' ') -%}
 debs/{{ deb }}{{' '}}
 {%- endfor -%}
 debs/
@@ -34,7 +34,7 @@ RUN apt-get update \
     libnanomsg-dev
 
 RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \
-{% for deb in docker_syncd_invm_rpc_debs.split(' ') -%}
+{% for deb in docker_syncd_mrvl_teralynx_rpc_debs.split(' ') -%}
 dpkg_apt debs/{{ deb }}{{'; '}}
 {%- endfor %}
 
@@ -46,12 +46,12 @@ RUN pip3 install cffi \
 
 COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"]
 
-{% if docker_syncd_invm_rpc_whls.strip() -%}
+{% if docker_syncd_mrvl_teralynx_rpc_whls.strip() -%}
 # Copy locally-built Python wheel dependencies
-{{ copy_files("python-wheels/", docker_syncd_invm_rpc_whls.split(' '), "/python-wheels/") }}
+{{ copy_files("python-wheels/", docker_syncd_mrvl_teralynx_rpc_whls.split(' '), "/python-wheels/") }}
 
 # Install locally-built Python wheel dependencies
-{{ install_python_wheels(docker_syncd_invm_rpc_whls.split(' ')) }}
+{{ install_python_wheels(docker_syncd_mrvl_teralynx_rpc_whls.split(' ')) }}
 {% endif %}
 
 
diff --git a/platform/innovium/docker-syncd-invm-rpc/ptf_nn_agent.conf b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc/ptf_nn_agent.conf
similarity index 100%
rename from platform/innovium/docker-syncd-invm-rpc/ptf_nn_agent.conf
rename to platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc/ptf_nn_agent.conf
diff --git a/platform/innovium/docker-syncd-invm.mk b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx.mk
similarity index 63%
rename from platform/innovium/docker-syncd-invm.mk
rename to platform/marvell-teralynx/docker-syncd-mrvl-teralynx.mk
index 572680721f07..d95e2efbf766 100755
--- a/platform/innovium/docker-syncd-invm.mk
+++ b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx.mk
@@ -1,9 +1,9 @@
-# docker image for innovium syncd
+# docker image for marvell-teralynx syncd
 
-DOCKER_SYNCD_PLATFORM_CODE = invm
+DOCKER_SYNCD_PLATFORM_CODE = mrvl-teralynx
 include $(PLATFORM_PATH)/../template/docker-syncd-bookworm.mk
 
-$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) $(PYTHON_SDK_API) $(INVM_LIBSAI) $(INVM_SHELL)
+$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) $(PYTHON_SDK_API) $(MRVL_TERALYNX_LIBSAI) $(MRVL_TERALYNX_SHELL)
 
 $(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \
                                 $(LIBSWSSCOMMON_DBG) \
@@ -12,6 +12,6 @@ $(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \
 
 $(DOCKER_SYNCD_BASE)_VERSION = 1.0.0
 $(DOCKER_SYNCD_BASE)_PACKAGE_NAME = syncd
-$(DOCKER_SYNCD_BASE)_MACHINE = innovium
+$(DOCKER_SYNCD_BASE)_MACHINE = marvell-teralynx
 
 $(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot
diff --git a/platform/innovium/docker-syncd-invm/Dockerfile.j2 b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx/Dockerfile.j2
similarity index 84%
rename from platform/innovium/docker-syncd-invm/Dockerfile.j2
rename to platform/marvell-teralynx/docker-syncd-mrvl-teralynx/Dockerfile.j2
index 3abe009d0afa..0e93cab95b3b 100755
--- a/platform/innovium/docker-syncd-invm/Dockerfile.j2
+++ b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx/Dockerfile.j2
@@ -9,12 +9,12 @@ ENV DEBIAN_FRONTEND=noninteractive
 RUN apt-get update
 
 COPY \
-{% for deb in docker_syncd_invm_debs.split(' ') -%}
+{% for deb in docker_syncd_mrvl_teralynx_debs.split(' ') -%}
 debs/{{ deb }}{{' '}}
 {%- endfor -%}
 debs/
 
-# Needed for Innovium Debug Shell
+# Needed for Marvell Teralynx Debug Shell
 RUN apt-get install -y net-tools
 RUN apt-get install -y libjansson4
 RUN apt-get install -y libyaml-dev
@@ -23,7 +23,7 @@ RUN pip3 install numpy
 RUN pip3 install yamlordereddictloader
 
 RUN dpkg -i \
-{% for deb in docker_syncd_invm_debs.split(' ') -%}
+{% for deb in docker_syncd_mrvl_teralynx_debs.split(' ') -%}
 debs/{{ deb }}{{' '}}
 {%- endfor %}
 
diff --git a/platform/innovium/docker-syncd-invm/critical_processes b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx/critical_processes
similarity index 100%
rename from platform/innovium/docker-syncd-invm/critical_processes
rename to platform/marvell-teralynx/docker-syncd-mrvl-teralynx/critical_processes
diff --git a/platform/innovium/docker-syncd-invm/ivm_start.sh b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx/ivm_start.sh
similarity index 100%
rename from platform/innovium/docker-syncd-invm/ivm_start.sh
rename to platform/marvell-teralynx/docker-syncd-mrvl-teralynx/ivm_start.sh
diff --git a/platform/innovium/docker-syncd-invm/start.sh b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx/start.sh
similarity index 100%
rename from platform/innovium/docker-syncd-invm/start.sh
rename to platform/marvell-teralynx/docker-syncd-mrvl-teralynx/start.sh
diff --git a/platform/innovium/docker-syncd-invm/supervisord.conf b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx/supervisord.conf
similarity index 100%
rename from platform/innovium/docker-syncd-invm/supervisord.conf
rename to platform/marvell-teralynx/docker-syncd-mrvl-teralynx/supervisord.conf
diff --git a/platform/innovium/libsaithrift-dev.dep b/platform/marvell-teralynx/libsaithrift-dev.dep
similarity index 82%
rename from platform/innovium/libsaithrift-dev.dep
rename to platform/marvell-teralynx/libsaithrift-dev.dep
index eee628b5f235..6655bf6d0b4d 100644
--- a/platform/innovium/libsaithrift-dev.dep
+++ b/platform/marvell-teralynx/libsaithrift-dev.dep
@@ -1,6 +1,6 @@
 #DPKG FRK
 SPATH       := $($(LIBSAITHRIFT_DEV)_SRC_PATH)
-DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/innovium/libsaithrift-dev.mk platform/innovium/libsaithrift-dev.dep
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/marvell-teralynx/libsaithrift-dev.mk platform/marvell-teralynx/libsaithrift-dev.dep
 DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
 SMDEP_PATHS := $(SPATH)  $(SPATH)/test/ptf  $(SPATH)/test/saithrift/ctypesgen
 $(foreach path, $(SMDEP_PATHS), $(eval $(path) :=$(filter-out $(SMDEP_PATHS),$(addprefix $(path)/, $(shell cd $(path) &&  git ls-files | grep -Ev " " )))))
diff --git a/platform/innovium/libsaithrift-dev.mk b/platform/marvell-teralynx/libsaithrift-dev.mk
similarity index 59%
rename from platform/innovium/libsaithrift-dev.mk
rename to platform/marvell-teralynx/libsaithrift-dev.mk
index 2a8b6bf137c4..17972dd7e851 100755
--- a/platform/innovium/libsaithrift-dev.mk
+++ b/platform/marvell-teralynx/libsaithrift-dev.mk
@@ -4,22 +4,20 @@ SAI_VER = 0.9.4
 LIBSAITHRIFT_DEV = libsaithrift$(SAITHRIFT_VER)-dev_$(SAI_VER)_$(CONFIGURED_ARCH).deb
 $(LIBSAITHRIFT_DEV)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI
 ifeq ($(SAITHRIFT_V2),y)
-$(LIBSAITHRIFT_DEV)_DEPENDS += $(INVM_LIBSAI) $(INVM_HSAI) $(LIBSAIMETADATA) $(LIBSAIMETADATA_DEV)
-$(LIBSAITHRIFT_DEV)_RDEPENDS += $(INVM_HSAI) $(LIBSAIMETADATA)
+$(LIBSAITHRIFT_DEV)_DEPENDS += $(MRVL_TERALYNX_LIBSAI) $(MRVL_TERALYNX_HSAI) $(MRVL_TERALYNX_SHELL) $(LIBSAIMETADATA) $(LIBSAIMETADATA_DEV)
+$(LIBSAITHRIFT_DEV)_RDEPENDS += $(MRVL_TERALYNX_LIBSAI) $(MRVL_TERALYNX_HSAI) $(MRVL_TERALYNX_SHELL) $(LIBSAIMETADATA)
 $(LIBSAITHRIFT_DEV)_BUILD_ENV = SAITHRIFTV2=true SAITHRIFT_VER=v2
 else
-$(LIBSAITHRIFT_DEV)_DEPENDS += $(INVM_LIBSAI) $(INVM_HSAI)
-$(LIBSAITHRIFT_DEV)_RDEPENDS += $(INVM_HSAI)
+$(LIBSAITHRIFT_DEV)_DEPENDS += $(MRVL_TERALYNX_LIBSAI) $(MRVL_TERALYNX_HSAI) $(MRVL_TERALYNX_SHELL)
+$(LIBSAITHRIFT_DEV)_RDEPENDS += $(MRVL_TERALYNX_LIBSAI) $(MRVL_TERALYNX_HSAI) $(MRVL_TERALYNX_SHELL)
 endif
-$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBSAIMETADATA) $(LIBSAIMETADATA_DEV)
-$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBSAIMETADATA) $(INVM_LIBSAI) $(INVM_SHELL)
 SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV)
 
 PYTHON_SAITHRIFT = python-saithrift$(SAITHRIFT_VER)_$(SAI_VER)_$(CONFIGURED_ARCH).deb
 $(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(PYTHON_SAITHRIFT)))
 
 SAISERVER = saiserver$(SAITHRIFT_VER)_$(SAI_VER)_$(CONFIGURED_ARCH).deb
-$(SAISERVER)_RDEPENDS += $(LIBSAITHRIFT_DEV) $(INVM_LIBSAI) $(INVM_HSAI) $(INVM_SHELL)
+$(SAISERVER)_RDEPENDS += $(LIBSAITHRIFT_DEV) $(MRVL_TERALYNX_LIBSAI) $(MRVL_TERALYNX_HSAI) $(MRVL_TERALYNX_SHELL)
 $(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER)))
 
 SAISERVER_DBG = saiserver$(SAITHRIFT_VER)-dbg_$(SAI_VER)_$(CONFIGURED_ARCH).deb
diff --git a/platform/innovium/one-image.mk b/platform/marvell-teralynx/one-image.mk
similarity index 76%
rename from platform/innovium/one-image.mk
rename to platform/marvell-teralynx/one-image.mk
index b1abcf613aa4..f62c9aecec31 100755
--- a/platform/innovium/one-image.mk
+++ b/platform/marvell-teralynx/one-image.mk
@@ -1,7 +1,7 @@
-# sonic innovium ONE image installer
+# sonic marvell-teralynx ONE image installer
 
-SONIC_ONE_IMAGE = sonic-innovium.bin
-$(SONIC_ONE_IMAGE)_MACHINE = innovium
+SONIC_ONE_IMAGE = sonic-marvell-teralynx.bin
+$(SONIC_ONE_IMAGE)_MACHINE = marvell-teralynx
 $(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR)
 $(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie
 $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(CEL_MIDSTONE_200I_PLATFORM_MODULE)
@@ -10,6 +10,6 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(NETBERG_AURORA_715_PLATFORM_MODULE)
 $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(SMCI_SSE_T7132S_PLATFORM_MODULE)
 $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(WISTRON_PLATFORM_MODULE)
 $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(TL10_DBMVTX9180_PLATFORM)
-$(SONIC_ONE_IMAGE)_INSTALLS += $(INVM_DRV)
+$(SONIC_ONE_IMAGE)_INSTALLS += $(MRVL_TERALYNX_DRV)
 $(SONIC_ONE_IMAGE)_DOCKERS  += $(SONIC_INSTALL_DOCKER_IMAGES)
 SONIC_INSTALLERS += $(SONIC_ONE_IMAGE)
diff --git a/platform/innovium/platform-modules-cel.mk b/platform/marvell-teralynx/platform-modules-cel.mk
similarity index 100%
rename from platform/innovium/platform-modules-cel.mk
rename to platform/marvell-teralynx/platform-modules-cel.mk
diff --git a/platform/innovium/platform-modules-delta.mk b/platform/marvell-teralynx/platform-modules-delta.mk
similarity index 100%
rename from platform/innovium/platform-modules-delta.mk
rename to platform/marvell-teralynx/platform-modules-delta.mk
diff --git a/platform/innovium/platform-modules-marvell.mk b/platform/marvell-teralynx/platform-modules-marvell.mk
similarity index 95%
rename from platform/innovium/platform-modules-marvell.mk
rename to platform/marvell-teralynx/platform-modules-marvell.mk
index b3d720e64dde..eadd190deb11 100644
--- a/platform/innovium/platform-modules-marvell.mk
+++ b/platform/marvell-teralynx/platform-modules-marvell.mk
@@ -5,7 +5,7 @@ TL10_DBMVTX9180_VERSION = 1.0
 export TL10_DBMVTX9180_VERSION
 
 TL10_DBMVTX9180_PLATFORM = sonic-platform-marvell-dbmvtx9180_$(TL10_DBMVTX9180_VERSION)_$(CONFIGURED_ARCH).deb
-$(TL10_DBMVTX9180_PLATFORM)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-marvell
+$(TL10_DBMVTX9180_PLATFORM)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-marvell-teralynx
 $(TL10_DBMVTX9180_PLATFORM)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
 $(TL10_DBMVTX9180_PLATFORM)_PLATFORM = x86_64-marvell_dbmvtx9180-r0
 
diff --git a/platform/innovium/platform-modules-netberg.mk b/platform/marvell-teralynx/platform-modules-netberg.mk
similarity index 100%
rename from platform/innovium/platform-modules-netberg.mk
rename to platform/marvell-teralynx/platform-modules-netberg.mk
diff --git a/platform/innovium/platform-modules-supermicro.mk b/platform/marvell-teralynx/platform-modules-supermicro.mk
similarity index 100%
rename from platform/innovium/platform-modules-supermicro.mk
rename to platform/marvell-teralynx/platform-modules-supermicro.mk
diff --git a/platform/innovium/platform-modules-wistron.mk b/platform/marvell-teralynx/platform-modules-wistron.mk
similarity index 100%
rename from platform/innovium/platform-modules-wistron.mk
rename to platform/marvell-teralynx/platform-modules-wistron.mk
diff --git a/platform/innovium/platform.conf b/platform/marvell-teralynx/platform.conf
similarity index 100%
rename from platform/innovium/platform.conf
rename to platform/marvell-teralynx/platform.conf
diff --git a/platform/marvell-teralynx/python-saithrift.mk b/platform/marvell-teralynx/python-saithrift.mk
new file mode 100755
index 000000000000..f220ebc2bae8
--- /dev/null
+++ b/platform/marvell-teralynx/python-saithrift.mk
@@ -0,0 +1,6 @@
+# python-saithrift package
+
+PYTHON_SAITHRIFT_MRVL_TERALYNX = python-saithrift_1.2.1_$(CONFIGURED_ARCH).deb
+$(PYTHON_SAITHRIFT_MRVL_TERALYNX)_SRC_PATH = $(SRC_PATH)/SAI
+$(PYTHON_SAITHRIFT_MRVL_TERALYNX)_DEPENDS += $(MRVL_TERALYNX_LIBSAI) $(MRVL_TERALYNX_HSAI) $(THRIFT_COMPILER) $(PYTHON_THRIFT) $(LIBTHRIFT_DEV)
+SONIC_DPKG_DEBS += $(PYTHON_SAITHRIFT_MRVL_TERALYNX)
diff --git a/platform/marvell-teralynx/rules.mk b/platform/marvell-teralynx/rules.mk
new file mode 100755
index 000000000000..3ba96af2f66b
--- /dev/null
+++ b/platform/marvell-teralynx/rules.mk
@@ -0,0 +1,28 @@
+include $(PLATFORM_PATH)/sai.mk
+include $(PLATFORM_PATH)/platform-modules-cel.mk
+include $(PLATFORM_PATH)/platform-modules-supermicro.mk
+include $(PLATFORM_PATH)/platform-modules-wistron.mk
+include $(PLATFORM_PATH)/platform-modules-marvell.mk
+include $(PLATFORM_PATH)/docker-syncd-mrvl-teralynx.mk
+include $(PLATFORM_PATH)/docker-syncd-mrvl-teralynx-rpc.mk
+include $(PLATFORM_PATH)/one-image.mk
+include $(PLATFORM_PATH)/docker-saiserver-mrvl-teralynx.mk
+include $(PLATFORM_PATH)/libsaithrift-dev.mk
+include $(PLATFORM_PATH)/python-saithrift.mk
+
+SONIC_ALL += $(SONIC_MRVL_TERALYNX_ONE_IMAGE) \
+             $(DOCKER_FPM) \
+             $(DOCKER_PTF_MRVL_TERALYNX) \
+             $(DOCKER_SYNCD_MRVL_TERALYNX_RPC)
+
+# Inject mrvl-teralynx sai into syncd
+$(SYNCD)_DEPENDS += $(MRVL_TERALYNX_HSAI) $(MRVL_TERALYNX_LIBSAI) $(MRVL_TERALYNX_SHELL)
+$(SYNCD)_UNINSTALLS += $(MRVL_TERALYNX_HSAI)
+
+ifeq ($(ENABLE_SYNCD_RPC),y)
+$(SYNCD)_DEPENDS := $(filter-out $(LIBTHRIFT_DEV),$($(SYNCD)_DEPENDS))
+$(SYNCD)_DEPENDS += $(LIBSAITHRIFT_DEV)
+endif
+
+# Runtime dependency on mrvl-teralynx sai is set only for syncd
+$(SYNCD)_RDEPENDS += $(MRVL_TERALYNX_HSAI)
diff --git a/platform/marvell-teralynx/sai.mk b/platform/marvell-teralynx/sai.mk
new file mode 100755
index 000000000000..272ddc269a39
--- /dev/null
+++ b/platform/marvell-teralynx/sai.mk
@@ -0,0 +1,17 @@
+# MRVL_TERALYNX SAI
+
+MRVL_TERALYNX_SAI_ONLINE = https://github.com/Marvell-switching/sonic-marvell-teralynx-binaries/raw/main/debian/master
+
+MRVL_TERALYNX_LIBSAI = isai.deb
+MRVL_TERALYNX_HSAI   = saihdr.deb
+MRVL_TERALYNX_DRV    = ipd.deb
+MRVL_TERALYNX_SHELL  = ishell.deb
+
+$(MRVL_TERALYNX_LIBSAI)_URL = $(MRVL_TERALYNX_SAI_ONLINE)/$(MRVL_TERALYNX_LIBSAI)
+$(MRVL_TERALYNX_HSAI)_URL   =  $(MRVL_TERALYNX_SAI_ONLINE)/$(MRVL_TERALYNX_HSAI)
+$(MRVL_TERALYNX_DRV)_URL    =  $(MRVL_TERALYNX_SAI_ONLINE)/$(MRVL_TERALYNX_DRV)
+$(MRVL_TERALYNX_SHELL)_URL  =  $(MRVL_TERALYNX_SAI_ONLINE)/$(MRVL_TERALYNX_SHELL)
+
+$(eval $(call add_conflict_package,$(MRVL_TERALYNX_HSAI),$(LIBSAIVS_DEV)))
+
+SONIC_ONLINE_DEBS  += $(MRVL_TERALYNX_LIBSAI) $(MRVL_TERALYNX_HSAI) $(MRVL_TERALYNX_DRV) $(MRVL_TERALYNX_SHELL)
diff --git a/platform/marvell-teralynx/sonic-platform-marvell-teralynx b/platform/marvell-teralynx/sonic-platform-marvell-teralynx
new file mode 160000
index 000000000000..dafbe124ef14
--- /dev/null
+++ b/platform/marvell-teralynx/sonic-platform-marvell-teralynx
@@ -0,0 +1 @@
+Subproject commit dafbe124ef14e7b9f1e0a52076ce8b8d14c88d6b
diff --git a/platform/innovium/sonic-platform-modules-cel/.gitignore b/platform/marvell-teralynx/sonic-platform-modules-cel/.gitignore
similarity index 100%
rename from platform/innovium/sonic-platform-modules-cel/.gitignore
rename to platform/marvell-teralynx/sonic-platform-modules-cel/.gitignore
diff --git a/platform/innovium/sonic-platform-modules-cel/LICENSE b/platform/marvell-teralynx/sonic-platform-modules-cel/LICENSE
similarity index 100%
rename from platform/innovium/sonic-platform-modules-cel/LICENSE
rename to platform/marvell-teralynx/sonic-platform-modules-cel/LICENSE
diff --git a/platform/innovium/sonic-platform-modules-cel/README.md b/platform/marvell-teralynx/sonic-platform-modules-cel/README.md
similarity index 100%
rename from platform/innovium/sonic-platform-modules-cel/README.md
rename to platform/marvell-teralynx/sonic-platform-modules-cel/README.md
diff --git a/platform/innovium/sonic-platform-modules-cel/debian/changelog b/platform/marvell-teralynx/sonic-platform-modules-cel/debian/changelog
similarity index 100%
rename from platform/innovium/sonic-platform-modules-cel/debian/changelog
rename to platform/marvell-teralynx/sonic-platform-modules-cel/debian/changelog
diff --git a/platform/innovium/sonic-platform-modules-cel/debian/compat b/platform/marvell-teralynx/sonic-platform-modules-cel/debian/compat
similarity index 100%
rename from platform/innovium/sonic-platform-modules-cel/debian/compat
rename to platform/marvell-teralynx/sonic-platform-modules-cel/debian/compat
diff --git a/platform/innovium/sonic-platform-modules-cel/debian/control b/platform/marvell-teralynx/sonic-platform-modules-cel/debian/control
similarity index 100%
rename from platform/innovium/sonic-platform-modules-cel/debian/control
rename to platform/marvell-teralynx/sonic-platform-modules-cel/debian/control
diff --git a/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.install b/platform/marvell-teralynx/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.install
similarity index 100%
rename from platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.install
rename to platform/marvell-teralynx/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.install
diff --git a/platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.postinst b/platform/marvell-teralynx/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.postinst
similarity index 100%
rename from platform/innovium/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.postinst
rename to platform/marvell-teralynx/sonic-platform-modules-cel/debian/platform-modules-midstone-200i.postinst
diff --git a/platform/innovium/sonic-platform-modules-cel/debian/rules b/platform/marvell-teralynx/sonic-platform-modules-cel/debian/rules
similarity index 100%
rename from platform/innovium/sonic-platform-modules-cel/debian/rules
rename to platform/marvell-teralynx/sonic-platform-modules-cel/debian/rules
diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/cfg/midstone-200i-modules.conf b/platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/cfg/midstone-200i-modules.conf
similarity index 100%
rename from platform/innovium/sonic-platform-modules-cel/midstone-200i/cfg/midstone-200i-modules.conf
rename to platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/cfg/midstone-200i-modules.conf
diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/200i_cpld.c b/platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/modules/200i_cpld.c
similarity index 100%
rename from platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/200i_cpld.c
rename to platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/modules/200i_cpld.c
diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/200i_wdt.c b/platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/modules/200i_wdt.c
similarity index 100%
rename from platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/200i_wdt.c
rename to platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/modules/200i_wdt.c
diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/Makefile b/platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/modules/Makefile
similarity index 100%
rename from platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/Makefile
rename to platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/modules/Makefile
diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/mc24lc64t.c b/platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/modules/mc24lc64t.c
similarity index 100%
rename from platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/mc24lc64t.c
rename to platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/modules/mc24lc64t.c
diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/systemd/platform-modules-midstone-200i.service b/platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/systemd/platform-modules-midstone-200i.service
similarity index 100%
rename from platform/innovium/sonic-platform-modules-cel/midstone-200i/systemd/platform-modules-midstone-200i.service
rename to platform/marvell-teralynx/sonic-platform-modules-cel/midstone-200i/systemd/platform-modules-midstone-200i.service
diff --git a/platform/innovium/sonic-platform-modules-delta/LICENSE b/platform/marvell-teralynx/sonic-platform-modules-delta/LICENSE
similarity index 100%
rename from platform/innovium/sonic-platform-modules-delta/LICENSE
rename to platform/marvell-teralynx/sonic-platform-modules-delta/LICENSE
diff --git a/platform/innovium/sonic-platform-modules-delta/common/modules/dni_emc2305.c b/platform/marvell-teralynx/sonic-platform-modules-delta/common/modules/dni_emc2305.c
similarity index 100%
rename from platform/innovium/sonic-platform-modules-delta/common/modules/dni_emc2305.c
rename to platform/marvell-teralynx/sonic-platform-modules-delta/common/modules/dni_emc2305.c
diff --git a/platform/innovium/sonic-platform-modules-delta/debian/changelog b/platform/marvell-teralynx/sonic-platform-modules-delta/debian/changelog
similarity index 100%
rename from platform/innovium/sonic-platform-modules-delta/debian/changelog
rename to platform/marvell-teralynx/sonic-platform-modules-delta/debian/changelog
diff --git a/platform/innovium/sonic-platform-modules-delta/debian/compat b/platform/marvell-teralynx/sonic-platform-modules-delta/debian/compat
similarity index 100%
rename from platform/innovium/sonic-platform-modules-delta/debian/compat
rename to platform/marvell-teralynx/sonic-platform-modules-delta/debian/compat
diff --git a/platform/innovium/sonic-platform-modules-delta/debian/control b/platform/marvell-teralynx/sonic-platform-modules-delta/debian/control
similarity index 100%
rename from platform/innovium/sonic-platform-modules-delta/debian/control
rename to platform/marvell-teralynx/sonic-platform-modules-delta/debian/control
diff --git a/platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.install b/platform/marvell-teralynx/sonic-platform-modules-delta/debian/platform-modules-et-c032if.install
similarity index 100%
rename from platform/innovium/sonic-platform-modules-delta/debian/platform-modules-et-c032if.install
rename to platform/marvell-teralynx/sonic-platform-modules-delta/debian/platform-modules-et-c032if.install
diff --git a/platform/innovium/sonic-platform-modules-delta/debian/rules b/platform/marvell-teralynx/sonic-platform-modules-delta/debian/rules
similarity index 100%
rename from platform/innovium/sonic-platform-modules-delta/debian/rules
rename to platform/marvell-teralynx/sonic-platform-modules-delta/debian/rules
diff --git a/platform/innovium/sonic-platform-modules-delta/et-c032if/cfg/et-c032if-modules.conf b/platform/marvell-teralynx/sonic-platform-modules-delta/et-c032if/cfg/et-c032if-modules.conf
similarity index 100%
rename from platform/innovium/sonic-platform-modules-delta/et-c032if/cfg/et-c032if-modules.conf
rename to platform/marvell-teralynx/sonic-platform-modules-delta/et-c032if/cfg/et-c032if-modules.conf
diff --git a/platform/innovium/sonic-platform-modules-delta/et-c032if/modules/Makefile b/platform/marvell-teralynx/sonic-platform-modules-delta/et-c032if/modules/Makefile
similarity index 100%
rename from platform/innovium/sonic-platform-modules-delta/et-c032if/modules/Makefile
rename to platform/marvell-teralynx/sonic-platform-modules-delta/et-c032if/modules/Makefile
diff --git a/platform/innovium/sonic-platform-modules-delta/et-c032if/modules/delta_et-c032if_platform.c b/platform/marvell-teralynx/sonic-platform-modules-delta/et-c032if/modules/delta_et-c032if_platform.c
similarity index 100%
rename from platform/innovium/sonic-platform-modules-delta/et-c032if/modules/delta_et-c032if_platform.c
rename to platform/marvell-teralynx/sonic-platform-modules-delta/et-c032if/modules/delta_et-c032if_platform.c
diff --git a/platform/innovium/sonic-platform-modules-delta/et-c032if/scripts/et-c032if_platform_init.sh b/platform/marvell-teralynx/sonic-platform-modules-delta/et-c032if/scripts/et-c032if_platform_init.sh
similarity index 100%
rename from platform/innovium/sonic-platform-modules-delta/et-c032if/scripts/et-c032if_platform_init.sh
rename to platform/marvell-teralynx/sonic-platform-modules-delta/et-c032if/scripts/et-c032if_platform_init.sh
diff --git a/platform/innovium/sonic-platform-modules-delta/systemd/platform-modules-et-c032if.service b/platform/marvell-teralynx/sonic-platform-modules-delta/systemd/platform-modules-et-c032if.service
similarity index 100%
rename from platform/innovium/sonic-platform-modules-delta/systemd/platform-modules-et-c032if.service
rename to platform/marvell-teralynx/sonic-platform-modules-delta/systemd/platform-modules-et-c032if.service
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/Makefile b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/Makefile
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/Makefile
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/Makefile
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-common.c b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-common.c
similarity index 99%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-common.c
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-common.c
index f73295f832bf..466968c92449 100644
--- a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-common.c
+++ b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-common.c
@@ -1,4 +1,4 @@
-/* An hwmon driver for Netberg Aurora 715 Innovium i2c Module */
+/* An hwmon driver for Netberg Aurora 715 Marvell Teralynx i2c Module */
 #pragma GCC diagnostic ignored "-Wformat-zero-length"
 #include "x86-64-netberg-aurora-715.h"
 #include "x86-64-netberg-aurora-715-common.h"
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-common.h b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-common.h
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-common.h
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-common.h
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-fan.c b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-fan.c
similarity index 99%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-fan.c
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-fan.c
index 4cb4d7ebfa55..12d82161ac7e 100644
--- a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-fan.c
+++ b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-fan.c
@@ -1,4 +1,4 @@
-/* An hwmon driver for Netberg Aurora 715 Innovium i2c Module */
+/* An hwmon driver for Netberg Aurora 715 Marvell Teralynx i2c Module */
 #pragma GCC diagnostic ignored "-Wformat-zero-length"
 #include "x86-64-netberg-aurora-715.h"
 #include "x86-64-netberg-aurora-715-common.h"
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-fan.h b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-fan.h
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-fan.h
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-fan.h
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-led.c b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-led.c
similarity index 98%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-led.c
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-led.c
index df4957212d1d..940f9e0aaec1 100644
--- a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-led.c
+++ b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-led.c
@@ -1,4 +1,4 @@
-/* An hwmon driver for Netberg Aurora 715 Innovium i2c Module */
+/* An hwmon driver for Netberg Aurora 715 Marvell Teralynx i2c Module */
 #pragma GCC diagnostic ignored "-Wformat-zero-length"
 #include "x86-64-netberg-aurora-715.h"
 #include "x86-64-netberg-aurora-715-common.h"
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-led.h b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-led.h
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-led.h
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-led.h
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-power.c b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-power.c
similarity index 99%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-power.c
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-power.c
index 1913d1716bbe..1b5c24431141 100644
--- a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-power.c
+++ b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-power.c
@@ -1,4 +1,4 @@
-/* An hwmon driver for Netberg Aurora 715 Innovium i2c Module */
+/* An hwmon driver for Netberg Aurora 715 Marvell Teralynx i2c Module */
 #pragma GCC diagnostic ignored "-Wformat-zero-length"
 #include "x86-64-netberg-aurora-715.h"
 #include "x86-64-netberg-aurora-715-common.h"
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-power.h b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-power.h
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-power.h
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-power.h
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-qsfp.c b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-qsfp.c
similarity index 99%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-qsfp.c
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-qsfp.c
index 97525e629842..e66d8677f35c 100644
--- a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-qsfp.c
+++ b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-qsfp.c
@@ -1,4 +1,4 @@
-/* An hwmon driver for Netberg Aurora 715 Innovium i2c Module */
+/* An hwmon driver for Netberg Aurora 715 Marvell Teralynx i2c Module */
 #pragma GCC diagnostic ignored "-Wformat-zero-length"
 #include "x86-64-netberg-aurora-715.h"
 #include "x86-64-netberg-aurora-715-common.h"
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-qsfp.h b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-qsfp.h
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-qsfp.h
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-qsfp.h
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-sys.c b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-sys.c
similarity index 99%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-sys.c
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-sys.c
index 6ee287b9ef6e..1e9169398b83 100644
--- a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-sys.c
+++ b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-sys.c
@@ -1,4 +1,4 @@
-/* An hwmon driver for Netberg Aurora 715 Innovium i2c Module */
+/* An hwmon driver for Netberg Aurora 715 Marvell Teralynx i2c Module */
 #pragma GCC diagnostic ignored "-Wformat-zero-length"
 #include "x86-64-netberg-aurora-715.h"
 #include "x86-64-netberg-aurora-715-common.h"
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-sys.h b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-sys.h
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-sys.h
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-sys.h
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-thermal.c b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-thermal.c
similarity index 99%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-thermal.c
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-thermal.c
index 8e288f4aa329..e35c3eb221e3 100644
--- a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-thermal.c
+++ b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-thermal.c
@@ -1,4 +1,4 @@
-/* An hwmon driver for Netberg Aurora 715 Innovium i2c Module */
+/* An hwmon driver for Netberg Aurora 715 Marvell Teralynx i2c Module */
 #pragma GCC diagnostic ignored "-Wformat-zero-length"
 #include "x86-64-netberg-aurora-715.h"
 #include "x86-64-netberg-aurora-715-common.h"
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-thermal.h b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-thermal.h
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-thermal.h
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715-thermal.h
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715.h b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715.h
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715.h
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/modules/x86-64-netberg-aurora-715.h
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/scripts/sensors b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/scripts/sensors
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/scripts/sensors
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/scripts/sensors
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/service/nba715-platform-init.service b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/service/nba715-platform-init.service
similarity index 83%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/service/nba715-platform-init.service
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/service/nba715-platform-init.service
index 6f019485ee82..339ca7a8ea0a 100644
--- a/platform/innovium/sonic-platform-modules-netberg/aurora-715/service/nba715-platform-init.service
+++ b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/service/nba715-platform-init.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Netberg Aurora 715 Platform initialization service
-After=local-fs.target innovium_platform_driver.service
+After=local-fs.target teralynx_platform_driver.service
 Before=pmon.service
 
 
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/setup.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/setup.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/setup.py
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/setup.py
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/__init__.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/__init__.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/__init__.py
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/__init__.py
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/chassis.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/chassis.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/chassis.py
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/chassis.py
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/component.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/component.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/component.py
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/component.py
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/eeprom.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/eeprom.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/eeprom.py
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/eeprom.py
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/fan.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/fan.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/fan.py
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/fan.py
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/platDev.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/platDev.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/platDev.py
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/platDev.py
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/platform.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/platform.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/platform.py
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/platform.py
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/psu.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/psu.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/psu.py
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/psu.py
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/sfp.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/sfp.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/sfp.py
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/sfp.py
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/thermal.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/thermal.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/sonic_platform/thermal.py
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/sonic_platform/thermal.py
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/templates/netberg_aurora-715_util.py.j2 b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/templates/netberg_aurora-715_util.py.j2
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/templates/netberg_aurora-715_util.py.j2
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/templates/netberg_aurora-715_util.py.j2
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/halt b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/halt
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/halt
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/halt
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_platform.sh b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_platform.sh
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_platform.sh
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_platform.sh
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_sensors.py b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_sensors.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_sensors.py
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_sensors.py
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_startup b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_startup
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_startup
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/netberg_nba715_startup
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/poweroff b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/poweroff
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/poweroff
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/poweroff
diff --git a/platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/shutdown b/platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/shutdown
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/aurora-715/utils/shutdown
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/aurora-715/utils/shutdown
diff --git a/platform/innovium/sonic-platform-modules-netberg/debian/changelog b/platform/marvell-teralynx/sonic-platform-modules-netberg/debian/changelog
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/debian/changelog
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/debian/changelog
diff --git a/platform/innovium/sonic-platform-modules-netberg/debian/compat b/platform/marvell-teralynx/sonic-platform-modules-netberg/debian/compat
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/debian/compat
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/debian/compat
diff --git a/platform/innovium/sonic-platform-modules-netberg/debian/control b/platform/marvell-teralynx/sonic-platform-modules-netberg/debian/control
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/debian/control
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/debian/control
diff --git a/platform/innovium/sonic-platform-modules-netberg/debian/rules b/platform/marvell-teralynx/sonic-platform-modules-netberg/debian/rules
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/debian/rules
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/debian/rules
diff --git a/platform/innovium/sonic-platform-modules-netberg/debian/sonic-platform-netberg-aurora-715.install b/platform/marvell-teralynx/sonic-platform-modules-netberg/debian/sonic-platform-netberg-aurora-715.install
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/debian/sonic-platform-netberg-aurora-715.install
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/debian/sonic-platform-netberg-aurora-715.install
diff --git a/platform/innovium/sonic-platform-modules-netberg/debian/sonic-platform-netberg-aurora-715.postinst b/platform/marvell-teralynx/sonic-platform-modules-netberg/debian/sonic-platform-netberg-aurora-715.postinst
similarity index 100%
rename from platform/innovium/sonic-platform-modules-netberg/debian/sonic-platform-netberg-aurora-715.postinst
rename to platform/marvell-teralynx/sonic-platform-modules-netberg/debian/sonic-platform-netberg-aurora-715.postinst
diff --git a/platform/innovium/sonic-platform-modules-supermicro/debian/changelog b/platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/changelog
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/debian/changelog
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/changelog
diff --git a/platform/innovium/sonic-platform-modules-supermicro/debian/compat b/platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/compat
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/debian/compat
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/compat
diff --git a/platform/innovium/sonic-platform-modules-supermicro/debian/control b/platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/control
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/debian/control
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/control
diff --git a/platform/innovium/sonic-platform-modules-supermicro/debian/platform-modules-sse-t7132s.install b/platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/platform-modules-sse-t7132s.install
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/debian/platform-modules-sse-t7132s.install
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/platform-modules-sse-t7132s.install
diff --git a/platform/innovium/sonic-platform-modules-supermicro/debian/platform-modules-sse-t7132s.postinst b/platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/platform-modules-sse-t7132s.postinst
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/debian/platform-modules-sse-t7132s.postinst
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/platform-modules-sse-t7132s.postinst
diff --git a/platform/innovium/sonic-platform-modules-supermicro/debian/rules b/platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/rules
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/debian/rules
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/debian/rules
diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/cfg/iTCO_wdt.conf b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/cfg/iTCO_wdt.conf
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/cfg/iTCO_wdt.conf
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/cfg/iTCO_wdt.conf
diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/cfg/t7132s-modules.conf b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/cfg/t7132s-modules.conf
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/cfg/t7132s-modules.conf
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/cfg/t7132s-modules.conf
diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/modules/Makefile b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/modules/Makefile
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/modules/Makefile
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/modules/Makefile
diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/modules/t7132s.c b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/modules/t7132s.c
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/modules/t7132s.c
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/modules/t7132s.c
diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/health_checker_thermal.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/scripts/health_checker_thermal.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/health_checker_thermal.py
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/scripts/health_checker_thermal.py
diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/platform.sh b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/scripts/platform.sh
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/platform.sh
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/scripts/platform.sh
diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/sysledctl.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/scripts/sysledctl.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/sysledctl.py
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/scripts/sysledctl.py
diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/test_cpld.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/scripts/test_cpld.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/scripts/test_cpld.py
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/scripts/test_cpld.py
diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/setup.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/setup.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/setup.py
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/setup.py
diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/__init__.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/__init__.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/__init__.py
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/__init__.py
diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/chassis.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/chassis.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/chassis.py
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/chassis.py
diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/component.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/component.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/component.py
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/component.py
diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/eeprom.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/eeprom.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/eeprom.py
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/eeprom.py
diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/fan.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/fan.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/fan.py
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/fan.py
diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/fan_drawer.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/fan_drawer.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/fan_drawer.py
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/fan_drawer.py
diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/helper.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/helper.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/helper.py
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/helper.py
diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/pcie.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/pcie.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/pcie.py
rename to platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/pcie.py
diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/platform.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/platform.py
similarity index 100%
rename from platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/platform.py
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diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/psu.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/psu.py
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diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/sfp.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/sfp.py
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diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/thermal.py b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/sonic_platform/thermal.py
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diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/systemd/platform-modules-sse-t7132s.service b/platform/marvell-teralynx/sonic-platform-modules-supermicro/sse-t7132s/systemd/platform-modules-sse-t7132s.service
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/Makefile b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/Makefile
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_fan.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_fan.c
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_leds.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_leds.c
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_oom.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_oom.c
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_psu.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_psu.c
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_syseeprom.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_syseeprom.c
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_thermal.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_thermal.c
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/service/6512-32r-firmware_ver.service b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/service/6512-32r-firmware_ver.service
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/service/6512-32r-platform.service b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/service/6512-32r-platform.service
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/service/6512-32r-syseeprom.service b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/service/6512-32r-syseeprom.service
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/service/platform-modules-6512-32r.service b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/service/platform-modules-6512-32r.service
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/setup.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/setup.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/__init__.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/__init__.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/chassis.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/chassis.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/component.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/component.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/eeprom.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/eeprom.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/fan.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/fan.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/fan_drawer.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/fan_drawer.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/platform.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/platform.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/psu.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/psu.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/sfp.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/sfp.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/thermal.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/thermal.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/watchdog.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/sonic_platform/watchdog.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/platform_firmware_version b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/platform_firmware_version
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/platform_sync b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/platform_sync
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/platform_syseeprom b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/platform_syseeprom
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/sonic-fanthrml-monitor b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/sonic-fanthrml-monitor
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/sonic-led-monitor b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/sonic-led-monitor
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/sonic-psu-monitor b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/sonic-psu-monitor
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/sonic-qsfp-eeprom-monitor b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/sonic-qsfp-eeprom-monitor
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/sonic-qsfp-monitor b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/sonic-qsfp-monitor
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/sonic-send-temp-to-bmc b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/sonic-send-temp-to-bmc
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diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/utils/wistron_6512_32r_util.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/6512-32r/utils/wistron_6512_32r_util.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/debian/sonic-platform-wistron-6512-32r.postinst b/platform/marvell-teralynx/sonic-platform-modules-wistron/debian/sonic-platform-wistron-6512-32r.postinst
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diff --git a/platform/innovium/sonic-platform-modules-wistron/debian/sonic-platform-wistron-sw-to3200k.install b/platform/marvell-teralynx/sonic-platform-modules-wistron/debian/sonic-platform-wistron-sw-to3200k.install
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diff --git a/platform/innovium/sonic-platform-modules-wistron/debian/sonic-platform-wistron-sw-to3200k.postinst b/platform/marvell-teralynx/sonic-platform-modules-wistron/debian/sonic-platform-wistron-sw-to3200k.postinst
similarity index 100%
rename from platform/innovium/sonic-platform-modules-wistron/debian/sonic-platform-wistron-sw-to3200k.postinst
rename to platform/marvell-teralynx/sonic-platform-modules-wistron/debian/sonic-platform-wistron-sw-to3200k.postinst
diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/cfg/sw-to3200k-modules.conf b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/cfg/sw-to3200k-modules.conf
similarity index 100%
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rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/cfg/sw-to3200k-modules.conf
diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/classes/__init__.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/classes/__init__.py
similarity index 100%
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/Makefile b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/Makefile
similarity index 100%
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_i2c_psu.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_i2c_psu.c
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_cpld.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_cpld.c
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_fan.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_fan.c
similarity index 100%
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rename to platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_fan.c
diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_leds.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_leds.c
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_oom.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_oom.c
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_psu.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_psu.c
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_thermal.c b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_thermal.c
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/service/platform-modules-sw-to3200k.service b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/service/platform-modules-sw-to3200k.service
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/service/sw-to3200k-firmware_ver.service b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/service/sw-to3200k-firmware_ver.service
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/service/to3200k-led.service b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/service/to3200k-led.service
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/service/to3200k-platform.service b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/service/to3200k-platform.service
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/service/to3200k-pld.service b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/service/to3200k-pld.service
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/setup.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/setup.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/__init__.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/__init__.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/chassis.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/chassis.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/component.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/component.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/eeprom.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/eeprom.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/fan.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/fan.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/fan_drawer.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/fan_drawer.py
similarity index 100%
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/platform.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/platform.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/psu.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/psu.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/sfp.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/sfp.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/thermal.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/thermal.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/watchdog.py b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/watchdog.py
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/platform_firmware_version b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/platform_firmware_version
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/platform_led b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/platform_led
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/platform_pld b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/platform_pld
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/platform_sync b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/platform_sync
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diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/utils/sonic-fanthrml-monitor b/platform/marvell-teralynx/sonic-platform-modules-wistron/sw-to3200k/utils/sonic-fanthrml-monitor
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From 4c76da22ba49b245c69f5687311bc36dd21d03c4 Mon Sep 17 00:00:00 2001
From: Philo <135693886+philo-micas@users.noreply.github.com>
Date: Tue, 26 Nov 2024 08:20:12 +0800
Subject: [PATCH 272/364] [Micas/Platform]platform support M2-W6940-128QC
 (#20629)

* [Micas/Platform]platform support M2-W6940-128QC

Signed-off-by: philo <philo@micasnetworks.com>

* Update control

* support TH5 chip

Signed-off-by: philo <philo@micasnetworks.com>

---------

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../M2-W6940-128QC/hwsku.json                 |   388 +
 .../M2-W6940-128QC/port_config.ini            |   129 +
 .../M2-W6940-128QC/sai.profile                |     1 +
 .../th5-m2-w6940-128qc-128x400g-config.yml    | 16226 ++++++++++++++++
 .../custom_led.bin                            |   Bin 0 -> 588 bytes
 .../default_sku                               |     1 +
 .../x86_64-micas_m2-w6940-128qc-r0/dev.xml    |    11 +
 .../x86_64-micas_m2-w6940-128qc-r0/fru.py     |   961 +
 .../installer.conf                            |     4 +
 .../media_settings.json                       |  5118 +++++
 .../x86_64-micas_m2-w6940-128qc-r0/monitor.py |   410 +
 .../x86_64-micas_m2-w6940-128qc-r0/pcie.yaml  |   443 +
 .../platform.json                             |  1668 ++
 .../platform_asic                             |     1 +
 .../platform_components.json                  |    20 +
 .../platform_env.conf                         |     2 +
 .../plugins/sfputil.py                        |   363 +
 .../plugins/ssd_util.py                       |   318 +
 .../pmon_daemon_control.json                  |     3 +
 .../postinit_cmd_file.soc                     |     4 +
 .../system_health_monitoring_config.json      |     0
 platform/broadcom/one-image.mk                |     1 +
 platform/broadcom/platform-modules-micas.mk   |     8 +
 .../debian/control                            |     4 +
 ...tform-modules-micas-m2-w6940-128qc.install |     1 +
 ...form-modules-micas-m2-w6940-128qc.postinst |    10 +
 .../debian/rule.mk                            |     1 +
 .../m2-w6940-128qc/Makefile                   |    30 +
 .../x86_64_micas_m2_w6940_128qc_r0_config.py  |   779 +
 ..._64_micas_m2_w6940_128qc_r0_port_config.py |   136 +
 .../x86_64_micas_m2_w6940_128qc_r0_device.py  |   186 +
 .../x86_64_micas_m2_w6940_128qc_r0_monitor.py |   141 +
 .../m2-w6940-128qc/modules/driver/Makefile    |    10 +
 .../modules/driver/wb_i2c_dev_device.c        |   161 +
 .../driver/wb_i2c_mux_pca954x_device.c        |   539 +
 .../modules/driver/wb_i2c_ocores_device.c     |   717 +
 .../modules/driver/wb_io_dev_device.c         |   125 +
 .../modules/driver/wb_pcie_dev_device.c       |   111 +
 .../plat_sysfs_cfg/WB_PLAT_CPLD.cfg           |    40 +
 .../plat_sysfs_cfg/WB_PLAT_FAN.cfg            |   112 +
 .../plat_sysfs_cfg/WB_PLAT_PSU.cfg            |    64 +
 .../plat_sysfs_cfg/WB_PLAT_SFF.cfg            |    54 +
 .../plat_sysfs_cfg/cfg_file_name              |     4 +
 .../m2-w6940-128qc/service/subnetwork.service |    13 +
 .../m2-w6940-128qc/setup.py                   |    40 +
 .../m2-w6940-128qc/sonic_platform/__init__.py |     2 +
 .../m2-w6940-128qc/sonic_platform/chassis.py  |   480 +
 .../sonic_platform/component.py               |   173 +
 .../m2-w6940-128qc/sonic_platform/eeprom.py   |    92 +
 .../m2-w6940-128qc/sonic_platform/fan.py      |   324 +
 .../sonic_platform/fan_drawer.py              |   184 +
 .../m2-w6940-128qc/sonic_platform/pcie.py     |    21 +
 .../m2-w6940-128qc/sonic_platform/platform.py |    24 +
 .../m2-w6940-128qc/sonic_platform/psu.py      |   615 +
 .../sonic_platform/restful_interface.py       |   459 +
 .../m2-w6940-128qc/sonic_platform/sfp.py      |   634 +
 .../m2-w6940-128qc/sonic_platform/thermal.py  |   282 +
 .../m2-w6940-128qc/sonic_platform/watchdog.py |   236 +
 58 files changed, 32884 insertions(+)
 create mode 100644 device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/hwsku.json
 create mode 100644 device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/port_config.ini
 create mode 100644 device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/sai.profile
 create mode 100644 device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/th5-m2-w6940-128qc-128x400g-config.yml
 create mode 100644 device/micas/x86_64-micas_m2-w6940-128qc-r0/custom_led.bin
 create mode 100644 device/micas/x86_64-micas_m2-w6940-128qc-r0/default_sku
 create mode 100644 device/micas/x86_64-micas_m2-w6940-128qc-r0/dev.xml
 create mode 100755 device/micas/x86_64-micas_m2-w6940-128qc-r0/fru.py
 create mode 100644 device/micas/x86_64-micas_m2-w6940-128qc-r0/installer.conf
 create mode 100644 device/micas/x86_64-micas_m2-w6940-128qc-r0/media_settings.json
 create mode 100755 device/micas/x86_64-micas_m2-w6940-128qc-r0/monitor.py
 create mode 100644 device/micas/x86_64-micas_m2-w6940-128qc-r0/pcie.yaml
 create mode 100644 device/micas/x86_64-micas_m2-w6940-128qc-r0/platform.json
 create mode 100644 device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_asic
 create mode 100644 device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_components.json
 create mode 100644 device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_env.conf
 create mode 100644 device/micas/x86_64-micas_m2-w6940-128qc-r0/plugins/sfputil.py
 create mode 100755 device/micas/x86_64-micas_m2-w6940-128qc-r0/plugins/ssd_util.py
 create mode 100644 device/micas/x86_64-micas_m2-w6940-128qc-r0/pmon_daemon_control.json
 create mode 100644 device/micas/x86_64-micas_m2-w6940-128qc-r0/postinit_cmd_file.soc
 create mode 100644 device/micas/x86_64-micas_m2-w6940-128qc-r0/system_health_monitoring_config.json
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128qc.install
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128qc.postinst
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/Makefile
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/config/x86_64_micas_m2_w6940_128qc_r0_config.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/config/x86_64_micas_m2_w6940_128qc_r0_port_config.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/hal-config/x86_64_micas_m2_w6940_128qc_r0_device.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/hal-config/x86_64_micas_m2_w6940_128qc_r0_monitor.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_mux_pca954x_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_ocores_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_io_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_pcie_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/cfg_file_name
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/service/subnetwork.service
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/setup.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/__init__.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/chassis.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/component.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/eeprom.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/fan.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/fan_drawer.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/pcie.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/platform.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/psu.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/restful_interface.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/sfp.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/thermal.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/watchdog.py

diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/hwsku.json b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/hwsku.json
new file mode 100644
index 000000000000..bb061f71ec60
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/hwsku.json
@@ -0,0 +1,388 @@
+{
+    "interfaces": {
+        "Ethernet1": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet5": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet9": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet13": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet17": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet21": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet25": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet29": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet33": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet37": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet41": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet45": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet49": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet53": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet57": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet61": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet65": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet69": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet73": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet77": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet81": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet85": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet89": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet93": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet97": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet101": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet105": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet109": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet113": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet117": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet121": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet125": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet129": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet133": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet137": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet141": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet145": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet149": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet153": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet157": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet161": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet165": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet169": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet173": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet177": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet181": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet185": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet189": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet193": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet197": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet201": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet205": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet209": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet213": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet217": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet221": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet225": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet229": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet233": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet237": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet241": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet245": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet249": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet253": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet257": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet261": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet265": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet269": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet273": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet277": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet281": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet285": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet289": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet293": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet297": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet301": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet305": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet309": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet313": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet317": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet321": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet325": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet329": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet333": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet337": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet341": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet345": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet349": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet353": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet357": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet361": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet365": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet369": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet373": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet377": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet381": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet385": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet389": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet393": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet397": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet401": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet405": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet409": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet413": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet417": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet421": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet425": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet429": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet433": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet437": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet441": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet445": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet449": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet453": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet457": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet461": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet465": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet469": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet473": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet477": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet481": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet485": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet489": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet493": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet497": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet501": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet505": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet509": {
+            "default_brkout_mode": "1x400G"
+        }
+    }
+}
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/port_config.ini b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/port_config.ini
new file mode 100644
index 000000000000..b54cae009e49
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/port_config.ini
@@ -0,0 +1,129 @@
+# name          lanes                                alias                 index      speed   
+Ethernet1       17,18,19,20                          fourhundredGigE0/1    0          400000
+Ethernet5       21,22,23,24                          fourhundredGigE0/2    1          400000
+Ethernet9       25,26,27,28                          fourhundredGigE0/3    2          400000
+Ethernet13      29,30,31,32                          fourhundredGigE0/4    3          400000
+Ethernet17      129,130,131,132                      fourhundredGigE0/5    4          400000
+Ethernet21      133,134,135,136                      fourhundredGigE0/6    5          400000
+Ethernet25      41,42,43,44                          fourhundredGigE0/7    6          400000
+Ethernet29      45,46,47,48                          fourhundredGigE0/8    7          400000
+Ethernet33      57,58,59,60                          fourhundredGigE0/9    8          400000
+Ethernet37      61,62,63,64                          fourhundredGigE0/10   9          400000
+Ethernet41      145,146,147,148                      fourhundredGigE0/11   10         400000
+Ethernet45      149,150,151,152                      fourhundredGigE0/12   11         400000
+Ethernet49      137,138,139,140                      fourhundredGigE0/13   12         400000
+Ethernet53      141,142,143,144                      fourhundredGigE0/14   13         400000
+Ethernet57      33,34,35,36                          fourhundredGigE0/15   14         400000
+Ethernet61      37,38,39,40                          fourhundredGigE0/16   15         400000
+Ethernet65      161,162,163,164                      fourhundredGigE0/17   16         400000
+Ethernet69      165,166,167,168                      fourhundredGigE0/18   17         400000
+Ethernet73      153,154,155,156                      fourhundredGigE0/19   18         400000
+Ethernet77      157,158,159,160                      fourhundredGigE0/20   19         400000
+Ethernet81      49,50,51,52                          fourhundredGigE0/21   20         400000
+Ethernet85      53,54,55,56                          fourhundredGigE0/22   21         400000
+Ethernet89      177,178,179,180                      fourhundredGigE0/23   22         400000
+Ethernet93      181,182,183,184                      fourhundredGigE0/24   23         400000
+Ethernet97      169,170,171,172                      fourhundredGigE0/25   24         400000
+Ethernet101     173,174,175,176                      fourhundredGigE0/26   25         400000
+Ethernet105     65,66,67,68                          fourhundredGigE0/27   26         400000
+Ethernet109     69,70,71,72                          fourhundredGigE0/28   27         400000
+Ethernet113     209,210,211,212                      fourhundredGigE0/29   28         400000
+Ethernet117     213,214,215,216                      fourhundredGigE0/30   29         400000
+Ethernet121     185,186,187,188                      fourhundredGigE0/31   30         400000
+Ethernet125     189,190,191,192                      fourhundredGigE0/32   31         400000
+Ethernet129     81,82,83,84                          fourhundredGigE0/33   32         400000
+Ethernet133     85,86,87,88                          fourhundredGigE0/34   33         400000
+Ethernet137     193,194,195,196                      fourhundredGigE0/35   34         400000
+Ethernet141     197,198,199,200                      fourhundredGigE0/36   35         400000
+Ethernet145     201,202,203,204                      fourhundredGigE0/37   36         400000
+Ethernet149     205,206,207,208                      fourhundredGigE0/38   37         400000
+Ethernet153     97,98,99,100                         fourhundredGigE0/39   38         400000
+Ethernet157     101,102,103,104                      fourhundredGigE0/40   39         400000
+Ethernet161     121,122,123,124                      fourhundredGigE0/41   40         400000
+Ethernet165     125,126,127,128                      fourhundredGigE0/42   41         400000
+Ethernet169     217,218,219,220                      fourhundredGigE0/43   42         400000
+Ethernet173     221,222,223,224                      fourhundredGigE0/44   43         400000
+Ethernet177     113,114,115,116                      fourhundredGigE0/45   44         400000
+Ethernet181     117,118,119,120                      fourhundredGigE0/46   45         400000
+Ethernet185     105,106,107,108                      fourhundredGigE0/47   46         400000
+Ethernet189     109,110,111,112                      fourhundredGigE0/48   47         400000
+Ethernet193     225,226,227,228                      fourhundredGigE0/49   48         400000
+Ethernet197     229,230,231,232                      fourhundredGigE0/50   49         400000
+Ethernet201     233,234,235,236                      fourhundredGigE0/51   50         400000
+Ethernet205     237,238,239,240                      fourhundredGigE0/52   51         400000
+Ethernet209     89,90,91,92                          fourhundredGigE0/53   52         400000
+Ethernet213     93,94,95,96                          fourhundredGigE0/54   53         400000
+Ethernet217     241,242,243,244                      fourhundredGigE0/55   54         400000
+Ethernet221     245,246,247,248                      fourhundredGigE0/56   55         400000
+Ethernet225     249,250,251,252                      fourhundredGigE0/57   56         400000
+Ethernet229     253,254,255,256                      fourhundredGigE0/58   57         400000
+Ethernet233     73,74,75,76                          fourhundredGigE0/59   58         400000
+Ethernet237     77,78,79,80                          fourhundredGigE0/60   59         400000
+Ethernet241     257,258,259,260                      fourhundredGigE0/61   60         400000
+Ethernet245     261,262,263,264                      fourhundredGigE0/62   61         400000
+Ethernet249     265,266,267,268                      fourhundredGigE0/63   62         400000
+Ethernet253     269,270,271,272                      fourhundredGigE0/64   63         400000
+Ethernet257     433,434,435,436                      fourhundredGigE0/65   64         400000
+Ethernet261     437,438,439,440                      fourhundredGigE0/66   65         400000
+Ethernet265     273,274,275,276                      fourhundredGigE0/67   66         400000
+Ethernet269     277,278,279,280                      fourhundredGigE0/68   67         400000
+Ethernet273     281,282,283,284                      fourhundredGigE0/69   68         400000
+Ethernet277     285,286,287,288                      fourhundredGigE0/70   69         400000
+Ethernet281     417,418,419,420                      fourhundredGigE0/71   70         400000
+Ethernet285     421,422,423,424                      fourhundredGigE0/72   71         400000
+Ethernet289     393,394,395,396                      fourhundredGigE0/73   72         400000
+Ethernet293     397,398,399,400                      fourhundredGigE0/74   73         400000
+Ethernet297     289,290,291,292                      fourhundredGigE0/75   74         400000
+Ethernet301     293,294,295,296                      fourhundredGigE0/76   75         400000
+Ethernet305     401,402,403,404                      fourhundredGigE0/77   76         400000
+Ethernet309     405,406,407,408                      fourhundredGigE0/78   77         400000
+Ethernet313     409,410,411,412                      fourhundredGigE0/79   78         400000
+Ethernet317     413,414,415,416                      fourhundredGigE0/80   79         400000
+Ethernet321     305,306,307,308                      fourhundredGigE0/81   80         400000
+Ethernet325     309,310,311,312                      fourhundredGigE0/82   81         400000
+Ethernet329     385,386,387,388                      fourhundredGigE0/83   82         400000
+Ethernet333     389,390,391,392                      fourhundredGigE0/84   83         400000
+Ethernet337     425,426,427,428                      fourhundredGigE0/85   84         400000
+Ethernet341     429,430,431,432                      fourhundredGigE0/86   85         400000
+Ethernet345     321,322,323,324                      fourhundredGigE0/87   86         400000
+Ethernet349     325,326,327,328                      fourhundredGigE0/88   87         400000
+Ethernet353     313,314,315,316                      fourhundredGigE0/89   88         400000
+Ethernet357     317,318,319,320                      fourhundredGigE0/90   89         400000
+Ethernet361     441,442,443,444                      fourhundredGigE0/91   90         400000
+Ethernet365     445,446,447,448                      fourhundredGigE0/92   91         400000
+Ethernet369     337,338,339,340                      fourhundredGigE0/93   92         400000
+Ethernet373     341,342,343,344                      fourhundredGigE0/94   93         400000
+Ethernet377     297,298,299,300                      fourhundredGigE0/95   94         400000
+Ethernet381     301,302,303,304                      fourhundredGigE0/96   95         400000
+Ethernet385     457,458,459,460                      fourhundredGigE0/97   96         400000
+Ethernet389     461,462,463,464                      fourhundredGigE0/98   97         400000
+Ethernet393     353,354,355,356                      fourhundredGigE0/99   98         400000
+Ethernet397     357,358,359,360                      fourhundredGigE0/100  99         400000
+Ethernet401     329,330,331,332                      fourhundredGigE0/101  100        400000
+Ethernet405     333,334,335,336                      fourhundredGigE0/102  101        400000
+Ethernet409     473,474,475,476                      fourhundredGigE0/103  102        400000
+Ethernet413     477,478,479,480                      fourhundredGigE0/104  103        400000
+Ethernet417     369,370,371,372                      fourhundredGigE0/105  104        400000
+Ethernet421     373,374,375,376                      fourhundredGigE0/106  105        400000
+Ethernet425     345,346,347,348                      fourhundredGigE0/107  106        400000
+Ethernet429     349,350,351,352                      fourhundredGigE0/108  107        400000
+Ethernet433     449,450,451,452                      fourhundredGigE0/109  108        400000
+Ethernet437     453,454,455,456                      fourhundredGigE0/110  109        400000
+Ethernet441     465,466,467,468                      fourhundredGigE0/111  110        400000
+Ethernet445     469,470,471,472                      fourhundredGigE0/112  111        400000
+Ethernet449     361,362,363,364                      fourhundredGigE0/113  112        400000
+Ethernet453     365,366,367,368                      fourhundredGigE0/114  113        400000
+Ethernet457     489,490,491,492                      fourhundredGigE0/115  114        400000
+Ethernet461     493,494,495,496                      fourhundredGigE0/116  115        400000
+Ethernet465     481,482,483,484                      fourhundredGigE0/117  116        400000
+Ethernet469     485,486,487,488                      fourhundredGigE0/118  117        400000
+Ethernet473     377,378,379,380                      fourhundredGigE0/119  118        400000
+Ethernet477     381,382,383,384                      fourhundredGigE0/120  119        400000
+Ethernet481     505,506,507,508                      fourhundredGigE0/121  120        400000
+Ethernet485     509,510,511,512                      fourhundredGigE0/122  121        400000
+Ethernet489     497,498,499,500                      fourhundredGigE0/123  122        400000
+Ethernet493     501,502,503,504                      fourhundredGigE0/124  123        400000
+Ethernet497     9,10,11,12                           fourhundredGigE0/125  124        400000
+Ethernet501     13,14,15,16                          fourhundredGigE0/126  125        400000
+Ethernet505     1,2,3,4                              fourhundredGigE0/127  126        400000
+Ethernet509     5,6,7,8                              fourhundredGigE0/128  127        400000
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/sai.profile b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/sai.profile
new file mode 100644
index 000000000000..7bb477ebfafb
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-m2-w6940-128qc-128x400g-config.yml
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/th5-m2-w6940-128qc-128x400g-config.yml b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/th5-m2-w6940-128qc-128x400g-config.yml
new file mode 100644
index 000000000000..cba00ec82fc7
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/th5-m2-w6940-128qc-128x400g-config.yml
@@ -0,0 +1,16226 @@
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x46205173
+                RX_LANE_MAP: 0x46205173
+                TX_POLARITY_FLIP: 0xf
+                RX_POLARITY_FLIP: 0x2
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x37152046
+                RX_LANE_MAP: 0x37152046
+                TX_POLARITY_FLIP: 0xc9
+                RX_POLARITY_FLIP: 0x1e
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x26043157
+                RX_LANE_MAP: 0x26043157
+                TX_POLARITY_FLIP: 0xf0
+                RX_POLARITY_FLIP: 0xd7
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x57314062
+                RX_LANE_MAP: 0x57314062
+                TX_POLARITY_FLIP: 0x9c
+                RX_POLARITY_FLIP: 0xe1
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x47315062
+                RX_LANE_MAP: 0x47315062
+                TX_POLARITY_FLIP: 0x8d
+                RX_POLARITY_FLIP: 0x37
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x25371046
+                RX_LANE_MAP: 0x25371046
+                TX_POLARITY_FLIP: 0x4a
+                RX_POLARITY_FLIP: 0xca
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x46107352
+                RX_LANE_MAP: 0x46107352
+                TX_POLARITY_FLIP: 0x4d
+                RX_POLARITY_FLIP: 0x4f
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x46103572
+                RX_LANE_MAP: 0x10462537
+                TX_POLARITY_FLIP: 0x49
+                RX_POLARITY_FLIP: 0x43
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x46107352
+                RX_LANE_MAP: 0x46107352
+                TX_POLARITY_FLIP: 0x4d
+                RX_POLARITY_FLIP: 0x4f
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x10462375
+                RX_LANE_MAP: 0x10462375
+                TX_POLARITY_FLIP: 0xe1
+                RX_POLARITY_FLIP: 0xa8
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x46107352
+                RX_LANE_MAP: 0x46107352
+                TX_POLARITY_FLIP: 0x4d
+                RX_POLARITY_FLIP: 0x4f
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x10462375
+                RX_LANE_MAP: 0x10462375
+                TX_POLARITY_FLIP: 0xe1
+                RX_POLARITY_FLIP: 0xa8
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x46107352
+                RX_LANE_MAP: 0x46107352
+                TX_POLARITY_FLIP: 0x4d
+                RX_POLARITY_FLIP: 0x5f
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x10462375
+                RX_LANE_MAP: 0x10462375
+                TX_POLARITY_FLIP: 0xe1
+                RX_POLARITY_FLIP: 0xa8
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x46107352
+                RX_LANE_MAP: 0x46107352
+                TX_POLARITY_FLIP: 0x4d
+                RX_POLARITY_FLIP: 0x4f
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x10462375
+                RX_LANE_MAP: 0x10462375
+                TX_POLARITY_FLIP: 0xe1
+                RX_POLARITY_FLIP: 0xa8
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x01463257
+                RX_LANE_MAP: 0x01463257
+                TX_POLARITY_FLIP: 0xcb
+                RX_POLARITY_FLIP: 0xa9
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x52734601
+                RX_LANE_MAP: 0x52734601
+                TX_POLARITY_FLIP: 0xb3
+                RX_POLARITY_FLIP: 0x6e
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x01463257
+                RX_LANE_MAP: 0x01463257
+                TX_POLARITY_FLIP: 0xcb
+                RX_POLARITY_FLIP: 0xa9
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x52734601
+                RX_LANE_MAP: 0x52734601
+                TX_POLARITY_FLIP: 0xb3
+                RX_POLARITY_FLIP: 0x6e
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x01463257
+                RX_LANE_MAP: 0x01463257
+                TX_POLARITY_FLIP: 0xcb
+                RX_POLARITY_FLIP: 0xa9
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x52734601
+                RX_LANE_MAP: 0x52734601
+                TX_POLARITY_FLIP: 0xb3
+                RX_POLARITY_FLIP: 0x6e
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x01463257
+                RX_LANE_MAP: 0x01463257
+                TX_POLARITY_FLIP: 0xcb
+                RX_POLARITY_FLIP: 0xa9
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x52734601
+                RX_LANE_MAP: 0x52734601
+                TX_POLARITY_FLIP: 0xb3
+                RX_POLARITY_FLIP: 0x6e
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x46015732
+                RX_LANE_MAP: 0x46015732
+                TX_POLARITY_FLIP: 0x3e
+                RX_POLARITY_FLIP: 0xf3
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x52734601
+                RX_LANE_MAP: 0x52734601
+                TX_POLARITY_FLIP: 0xb3
+                RX_POLARITY_FLIP: 0x6e
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x57324601
+                RX_LANE_MAP: 0x57324601
+                TX_POLARITY_FLIP: 0xe1
+                RX_POLARITY_FLIP: 0x7f
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x41507632
+                RX_LANE_MAP: 0x41507632
+                TX_POLARITY_FLIP: 0x8d
+                RX_POLARITY_FLIP: 0xcf
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x51734620
+                RX_LANE_MAP: 0x51734620
+                TX_POLARITY_FLIP: 0xc9
+                RX_POLARITY_FLIP: 0xd1
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x20463715
+                RX_LANE_MAP: 0x20463715
+                TX_POLARITY_FLIP: 0xff
+                RX_POLARITY_FLIP: 0x72
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x51734620
+                RX_LANE_MAP: 0x51734620
+                TX_POLARITY_FLIP: 0xc9
+                RX_POLARITY_FLIP: 0x51
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x20463715
+                RX_LANE_MAP: 0x20463715
+                TX_POLARITY_FLIP: 0xff
+                RX_POLARITY_FLIP: 0x72
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x26043157
+                RX_LANE_MAP: 0x26043157
+                TX_POLARITY_FLIP: 0xff
+                RX_POLARITY_FLIP: 0x7
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x57314062
+                RX_LANE_MAP: 0x57314062
+                TX_POLARITY_FLIP: 0x9c
+                RX_POLARITY_FLIP: 0x81
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x26043157
+                RX_LANE_MAP: 0x26043157
+                TX_POLARITY_FLIP: 0xff
+                RX_POLARITY_FLIP: 0xa7
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x57314062
+                RX_LANE_MAP: 0x57314062
+                TX_POLARITY_FLIP: 0x9c
+                RX_POLARITY_FLIP: 0x81
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x45017263
+                RX_LANE_MAP: 0x45017263
+                TX_POLARITY_FLIP: 0x8e
+                RX_POLARITY_FLIP: 0x9e
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x01463257
+                RX_LANE_MAP: 0x01463257
+                TX_POLARITY_FLIP: 0xb4
+                RX_POLARITY_FLIP: 0x43
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x57324160
+                RX_LANE_MAP: 0x57324160
+                TX_POLARITY_FLIP: 0xe5
+                RX_POLARITY_FLIP: 0x7b
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x32570146
+                RX_LANE_MAP: 0x32570146
+                TX_POLARITY_FLIP: 0x43
+                RX_POLARITY_FLIP: 0x30
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x57324160
+                RX_LANE_MAP: 0x57324160
+                TX_POLARITY_FLIP: 0xe5
+                RX_POLARITY_FLIP: 0x7b
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x57324601
+                RX_LANE_MAP: 0x57324601
+                TX_POLARITY_FLIP: 0x1c
+                RX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x57324160
+                RX_LANE_MAP: 0x57324160
+                TX_POLARITY_FLIP: 0xe5
+                RX_POLARITY_FLIP: 0x7b
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x57324601
+                RX_LANE_MAP: 0x57324601
+                TX_POLARITY_FLIP: 0x1c
+                RX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x57324160
+                RX_LANE_MAP: 0x57324160
+                TX_POLARITY_FLIP: 0xe5
+                RX_POLARITY_FLIP: 0x7b
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x57324601
+                RX_LANE_MAP: 0x57324601
+                TX_POLARITY_FLIP: 0x1c
+                RX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x57324160
+                RX_LANE_MAP: 0x57324160
+                TX_POLARITY_FLIP: 0xe5
+                RX_POLARITY_FLIP: 0x7b
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x57324601
+                RX_LANE_MAP: 0x57324601
+                TX_POLARITY_FLIP: 0x1c
+                RX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x75234610
+                RX_LANE_MAP: 0x75234610
+                TX_POLARITY_FLIP: 0xb4
+                RX_POLARITY_FLIP: 0x94
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x40617523
+                RX_LANE_MAP: 0x40617523
+                TX_POLARITY_FLIP: 0x2b
+                RX_POLARITY_FLIP: 0x69
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x75234610
+                RX_LANE_MAP: 0x75234610
+                TX_POLARITY_FLIP: 0xb4
+                RX_POLARITY_FLIP: 0x94
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x40617523
+                RX_LANE_MAP: 0x40617523
+                TX_POLARITY_FLIP: 0x2b
+                RX_POLARITY_FLIP: 0x69
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x75234610
+                RX_LANE_MAP: 0x75234610
+                TX_POLARITY_FLIP: 0xb4
+                RX_POLARITY_FLIP: 0x94
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x40617523
+                RX_LANE_MAP: 0x40617523
+                TX_POLARITY_FLIP: 0x2b
+                RX_POLARITY_FLIP: 0x69
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x75234610
+                RX_LANE_MAP: 0x75234610
+                TX_POLARITY_FLIP: 0xb4
+                RX_POLARITY_FLIP: 0x94
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x40617523
+                RX_LANE_MAP: 0x40617523
+                TX_POLARITY_FLIP: 0x2b
+                RX_POLARITY_FLIP: 0x69
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x73524610
+                RX_LANE_MAP: 0x73524610
+                TX_POLARITY_FLIP: 0xd4
+                RX_POLARITY_FLIP: 0xed
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x40617523
+                RX_LANE_MAP: 0x40617523
+                TX_POLARITY_FLIP: 0x2b
+                RX_POLARITY_FLIP: 0x69
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x23751604
+                RX_LANE_MAP: 0x23751604
+                TX_POLARITY_FLIP: 0x19
+                RX_POLARITY_FLIP: 0x99
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x41735620
+                RX_LANE_MAP: 0x41735620
+                TX_POLARITY_FLIP: 0x8b
+                RX_POLARITY_FLIP: 0xc
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x20463715
+                RX_LANE_MAP: 0x20463715
+                TX_POLARITY_FLIP: 0x9c
+                RX_POLARITY_FLIP: 0xe1
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x51734620
+                RX_LANE_MAP: 0x51734620
+                TX_POLARITY_FLIP: 0xf0
+                RX_POLARITY_FLIP: 0xa8
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x20463715
+                RX_LANE_MAP: 0x20463715
+                TX_POLARITY_FLIP: 0x9c
+                RX_POLARITY_FLIP: 0xe9
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                TX_LANE_MAP_AUTO: 0
+                RX_LANE_MAP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_LANE_MAP: 0x51734620
+                RX_LANE_MAP: 0x51734620
+                TX_POLARITY_FLIP: 0xf0
+                RX_POLARITY_FLIP: 0x20
+...
+
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                # CPU port
+                PORT_ID: 0
+            :
+                PC_PHYS_PORT_ID: 0
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 3
+            :
+                PC_PHYS_PORT_ID: 5
+            ?
+                PORT_ID: 5
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 7
+            :
+                PC_PHYS_PORT_ID: 13
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 13
+            :
+                PC_PHYS_PORT_ID: 21
+            ?
+                PORT_ID: 15
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 17
+            :
+                PC_PHYS_PORT_ID: 29
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 24
+            :
+                PC_PHYS_PORT_ID: 37
+            ?
+                PORT_ID: 26
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 28
+            :
+                PC_PHYS_PORT_ID: 45
+            ?
+                PORT_ID: 33
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 35
+            :
+                PC_PHYS_PORT_ID: 53
+            ?
+                PORT_ID: 37
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 39
+            :
+                PC_PHYS_PORT_ID: 61
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 46
+            :
+                PC_PHYS_PORT_ID: 69
+            ?
+                PORT_ID: 48
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 50
+            :
+                PC_PHYS_PORT_ID: 77
+            ?
+                PORT_ID: 55
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 57
+            :
+                PC_PHYS_PORT_ID: 85
+            ?
+                PORT_ID: 59
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 61
+            :
+                PC_PHYS_PORT_ID: 93
+            ?
+                PORT_ID: 66
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 68
+            :
+                PC_PHYS_PORT_ID: 101
+            ?
+                PORT_ID: 70
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 72
+            :
+                PC_PHYS_PORT_ID: 109
+            ?
+                PORT_ID: 77
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 79
+            :
+                PC_PHYS_PORT_ID: 117
+            ?
+                PORT_ID: 81
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 83
+            :
+                PC_PHYS_PORT_ID: 125
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 90
+            :
+                PC_PHYS_PORT_ID: 133
+            ?
+                PORT_ID: 92
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 94
+            :
+                PC_PHYS_PORT_ID: 141
+            ?
+                PORT_ID: 99
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 101
+            :
+                PC_PHYS_PORT_ID: 149
+            ?
+                PORT_ID: 103
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 105
+            :
+                PC_PHYS_PORT_ID: 157
+            ?
+                PORT_ID: 110
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 112
+            :
+                PC_PHYS_PORT_ID: 165
+            ?
+                PORT_ID: 114
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 116
+            :
+                PC_PHYS_PORT_ID: 173
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 123
+            :
+                PC_PHYS_PORT_ID: 181
+            ?
+                PORT_ID: 125
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 127
+            :
+                PC_PHYS_PORT_ID: 189
+            ?
+                PORT_ID: 132
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 134
+            :
+                PC_PHYS_PORT_ID: 197
+            ?
+                PORT_ID: 136
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 138
+            :
+                PC_PHYS_PORT_ID: 205
+            ?
+                PORT_ID: 143
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 145
+            :
+                PC_PHYS_PORT_ID: 213
+            ?
+                PORT_ID: 147
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 149
+            :
+                PC_PHYS_PORT_ID: 221
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 156
+            :
+                PC_PHYS_PORT_ID: 229
+            ?
+                PORT_ID: 158
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 160
+            :
+                PC_PHYS_PORT_ID: 237
+            ?
+                PORT_ID: 165
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 167
+            :
+                PC_PHYS_PORT_ID: 245
+            ?
+                PORT_ID: 169
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 171
+            :
+                PC_PHYS_PORT_ID: 253
+            ?
+                PORT_ID: 176
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 178
+            :
+                PC_PHYS_PORT_ID: 261
+            ?
+                PORT_ID: 180
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 182
+            :
+                PC_PHYS_PORT_ID: 269
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 189
+            :
+                PC_PHYS_PORT_ID: 277
+            ?
+                PORT_ID: 191
+            :
+                PC_PHYS_PORT_ID: 281
+            ?
+                PORT_ID: 193
+            :
+                PC_PHYS_PORT_ID: 285
+            ?
+                PORT_ID: 198
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 200
+            :
+                PC_PHYS_PORT_ID: 293
+            ?
+                PORT_ID: 202
+            :
+                PC_PHYS_PORT_ID: 297
+            ?
+                PORT_ID: 204
+            :
+                PC_PHYS_PORT_ID: 301
+            ?
+                PORT_ID: 209
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 211
+            :
+                PC_PHYS_PORT_ID: 309
+            ?
+                PORT_ID: 213
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 215
+            :
+                PC_PHYS_PORT_ID: 317
+            ?
+                PORT_ID: 220
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 222
+            :
+                PC_PHYS_PORT_ID: 325
+            ?
+                PORT_ID: 224
+            :
+                PC_PHYS_PORT_ID: 329
+            ?
+                PORT_ID: 226
+            :
+                PC_PHYS_PORT_ID: 333
+            ?
+                PORT_ID: 231
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 233
+            :
+                PC_PHYS_PORT_ID: 341
+            ?
+                PORT_ID: 235
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 237
+            :
+                PC_PHYS_PORT_ID: 349
+            ?
+                PORT_ID: 242
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 244
+            :
+                PC_PHYS_PORT_ID: 357
+            ?
+                PORT_ID: 246
+            :
+                PC_PHYS_PORT_ID: 361
+            ?
+                PORT_ID: 248
+            :
+                PC_PHYS_PORT_ID: 365
+            ?
+                PORT_ID: 253
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 255
+            :
+                PC_PHYS_PORT_ID: 373
+            ?
+                PORT_ID: 257
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 259
+            :
+                PC_PHYS_PORT_ID: 381
+            ?
+                PORT_ID: 264
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 266
+            :
+                PC_PHYS_PORT_ID: 389
+            ?
+                PORT_ID: 268
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 270
+            :
+                PC_PHYS_PORT_ID: 397
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 277
+            :
+                PC_PHYS_PORT_ID: 405
+            ?
+                PORT_ID: 279
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 281
+            :
+                PC_PHYS_PORT_ID: 413
+            ?
+                PORT_ID: 286
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 288
+            :
+                PC_PHYS_PORT_ID: 421
+            ?
+                PORT_ID: 290
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 292
+            :
+                PC_PHYS_PORT_ID: 429
+            ?
+                PORT_ID: 297
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 299
+            :
+                PC_PHYS_PORT_ID: 437
+            ?
+                PORT_ID: 301
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 303
+            :
+                PC_PHYS_PORT_ID: 445
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 310
+            :
+                PC_PHYS_PORT_ID: 453
+            ?
+                PORT_ID: 312
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 314
+            :
+                PC_PHYS_PORT_ID: 461
+            ?
+                PORT_ID: 319
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 321
+            :
+                PC_PHYS_PORT_ID: 469
+            ?
+                PORT_ID: 323
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 325
+            :
+                PC_PHYS_PORT_ID: 477
+            ?
+                PORT_ID: 330
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 332
+            :
+                PC_PHYS_PORT_ID: 485
+            ?
+                PORT_ID: 334
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 336
+            :
+                PC_PHYS_PORT_ID: 493
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 343
+            :
+                PC_PHYS_PORT_ID: 501
+            ?
+                PORT_ID: 345
+            :
+                PC_PHYS_PORT_ID: 505
+            ?
+                PORT_ID: 347
+            :
+                PC_PHYS_PORT_ID: 509
+...
+
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: 0
+            :
+                ENABLE: 1
+                SPEED: 10000
+                NUM_LANES: 1
+            ?
+                PORT_ID: [1, 3, 5, 7, 11, 13, 15, 17, 22, 24, 26, 28, 33, 35, 37, 39, 44, 46, 48, 50, 55, 57, 59, 61, 66, 68, 70, 72, 77, 79, 81, 83, 88, 90, 92, 94, 99, 101, 103, 105, 110, 112, 114, 116, 121, 123, 125, 127, 132, 134, 136, 138, 143, 145, 147, 149, 154, 156, 158, 160, 165, 167, 169, 171, 176, 178, 180, 182, 187, 189, 191, 193, 198, 200, 202, 204, 209, 211, 213, 215, 220, 222, 224, 226, 231, 233, 235, 237, 242, 244, 246, 248, 253, 255, 257, 259, 264, 266, 268, 270, 275, 277, 279, 281, 286, 288, 290, 292, 297, 299, 301, 303, 308, 310, 312, 314, 319, 321, 323, 325, 330, 332, 334, 336, 341, 343, 345, 347]
+            :
+                ENABLE: 1
+                SPEED: 400000
+                NUM_LANES: 4
+                FEC_MODE: PC_FEC_RS544_2XN
+                LINK_TRAINING: 0
+                MAX_FRAME_SIZE: 9416
+...
+
+---
+device:
+    0:
+        PC_PMD_FIRMWARE:
+            ?
+                PORT_ID: [1, 3, 5, 7, 11, 13, 15, 17, 22, 24, 26, 28, 33, 35, 37, 39, 44, 46, 48, 50, 55, 57, 59, 61, 66, 68, 70, 72, 77, 79, 81, 83, 88, 90, 92, 94, 99, 101, 103, 105, 110, 112, 114, 116, 121, 123, 125, 127, 132, 134, 136, 138, 143, 145, 147, 149, 154, 156, 158, 160, 165, 167, 169, 171, 176, 178, 180, 182, 187, 189, 191, 193, 198, 200, 202, 204, 209, 211, 213, 215, 220, 222, 224, 226, 231, 233, 235, 237, 242, 244, 246, 248, 253, 255, 257, 259, 264, 266, 268, 270, 275, 277, 279, 281, 286, 288, 290, 292, 297, 299, 301, 303, 308, 310, 312, 314, 319, 321, 323, 325, 330, 332, 334, 336, 341, 343, 345, 347]
+            :
+                MEDIUM_TYPE_AUTO: 0
+                MEDIUM_TYPE: PC_PHY_MEDIUM_BACKPLANE
+...
+
+---
+device:
+    0:
+        TM_SCHEDULER_CONFIG:
+            NUM_MC_Q: NUM_MC_Q_4
+...
+---
+device:
+    0:
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+bcm_device:
+    0:
+        global:
+            bcm_tunnel_term_compatible_mode: 1
+            vlan_flooding_l2mc_num_reserved: 2048
+            l3_alpm_template: 2
+            l3_alpm2_bnk_threshold: 100
+            uft_mode: 1
+            l3_enable: 1
+            l2_hitbit_enable: 0
+            pktio_mode: 1
+            sai_pfc_defaults_disable: 1
+            sai_optimized_mmu: 1
+            sai_postinit_cmd_file: /usr/share/sonic/platform/postinit_cmd_file.soc
+...
+
+---
+bcm_device:
+    0:
+        port:
+            "*":
+                encap_mode: IEEE
+                dport_map_enable: 1
+            11:
+                dport_map_port: 1
+            12:
+                dport_map_port: 2
+            13:
+                dport_map_port: 3
+            14:
+                dport_map_port: 4
+            15:
+                dport_map_port: 5
+            16:
+                dport_map_port: 6
+            17:
+                dport_map_port: 7
+            18:
+                dport_map_port: 8
+            88:
+                dport_map_port: 9
+            89:
+                dport_map_port: 10
+            90:
+                dport_map_port: 11
+            91:
+                dport_map_port: 12
+            26:
+                dport_map_port: 13
+            27:
+                dport_map_port: 14
+            28:
+                dport_map_port: 15
+            29:
+                dport_map_port: 16
+            37:
+                dport_map_port: 17
+            38:
+                dport_map_port: 18
+            39:
+                dport_map_port: 19
+            40:
+                dport_map_port: 20
+            99:
+                dport_map_port: 21
+            100:
+                dport_map_port: 22
+            101:
+                dport_map_port: 23
+            102:
+                dport_map_port: 24
+            92:
+                dport_map_port: 25
+            93:
+                dport_map_port: 26
+            94:
+                dport_map_port: 27
+            95:
+                dport_map_port: 28
+            22:
+                dport_map_port: 29
+            23:
+                dport_map_port: 30
+            24:
+                dport_map_port: 31
+            25:
+                dport_map_port: 32
+            110:
+                dport_map_port: 33
+            111:
+                dport_map_port: 34
+            112:
+                dport_map_port: 35
+            113:
+                dport_map_port: 36
+            103:
+                dport_map_port: 37
+            104:
+                dport_map_port: 38
+            105:
+                dport_map_port: 39
+            106:
+                dport_map_port: 40
+            33:
+                dport_map_port: 41
+            34:
+                dport_map_port: 42
+            35:
+                dport_map_port: 43
+            36:
+                dport_map_port: 44
+            121:
+                dport_map_port: 45
+            122:
+                dport_map_port: 46
+            123:
+                dport_map_port: 47
+            124:
+                dport_map_port: 48
+            114:
+                dport_map_port: 49
+            115:
+                dport_map_port: 50
+            116:
+                dport_map_port: 51
+            117:
+                dport_map_port: 52
+            44:
+                dport_map_port: 53
+            45:
+                dport_map_port: 54
+            46:
+                dport_map_port: 55
+            47:
+                dport_map_port: 56
+            143:
+                dport_map_port: 57
+            144:
+                dport_map_port: 58
+            145:
+                dport_map_port: 59
+            146:
+                dport_map_port: 60
+            125:
+                dport_map_port: 61
+            126:
+                dport_map_port: 62
+            127:
+                dport_map_port: 63
+            128:
+                dport_map_port: 64
+            55:
+                dport_map_port: 65
+            56:
+                dport_map_port: 66
+            57:
+                dport_map_port: 67
+            58:
+                dport_map_port: 68
+            132:
+                dport_map_port: 69
+            133:
+                dport_map_port: 70
+            134:
+                dport_map_port: 71
+            135:
+                dport_map_port: 72
+            136:
+                dport_map_port: 73
+            137:
+                dport_map_port: 74
+            138:
+                dport_map_port: 75
+            139:
+                dport_map_port: 76
+            66:
+                dport_map_port: 77
+            67:
+                dport_map_port: 78
+            68:
+                dport_map_port: 79
+            69:
+                dport_map_port: 80
+            81:
+                dport_map_port: 81
+            82:
+                dport_map_port: 82
+            83:
+                dport_map_port: 83
+            84:
+                dport_map_port: 84
+            147:
+                dport_map_port: 85
+            148:
+                dport_map_port: 86
+            149:
+                dport_map_port: 87
+            150:
+                dport_map_port: 88
+            77:
+                dport_map_port: 89
+            78:
+                dport_map_port: 90
+            79:
+                dport_map_port: 91
+            80:
+                dport_map_port: 92
+            70:
+                dport_map_port: 93
+            71:
+                dport_map_port: 94
+            72:
+                dport_map_port: 95
+            73:
+                dport_map_port: 96
+            154:
+                dport_map_port: 97
+            155:
+                dport_map_port: 98
+            156:
+                dport_map_port: 99
+            157:
+                dport_map_port: 100
+            158:
+                dport_map_port: 101
+            159:
+                dport_map_port: 102
+            160:
+                dport_map_port: 103
+            161:
+                dport_map_port: 104
+            59:
+                dport_map_port: 105
+            60:
+                dport_map_port: 106
+            61:
+                dport_map_port: 107
+            62:
+                dport_map_port: 108
+            165:
+                dport_map_port: 109
+            166:
+                dport_map_port: 110
+            167:
+                dport_map_port: 111
+            168:
+                dport_map_port: 112
+            169:
+                dport_map_port: 113
+            170:
+                dport_map_port: 114
+            171:
+                dport_map_port: 115
+            172:
+                dport_map_port: 116
+            48:
+                dport_map_port: 117
+            49:
+                dport_map_port: 118
+            50:
+                dport_map_port: 119
+            51:
+                dport_map_port: 120
+            176:
+                dport_map_port: 121
+            177:
+                dport_map_port: 122
+            178:
+                dport_map_port: 123
+            179:
+                dport_map_port: 124
+            180:
+                dport_map_port: 125
+            181:
+                dport_map_port: 126
+            182:
+                dport_map_port: 127
+            183:
+                dport_map_port: 128
+            297:
+                dport_map_port: 129
+            298:
+                dport_map_port: 130
+            299:
+                dport_map_port: 131
+            300:
+                dport_map_port: 132
+            187:
+                dport_map_port: 133
+            188:
+                dport_map_port: 134
+            189:
+                dport_map_port: 135
+            190:
+                dport_map_port: 136
+            191:
+                dport_map_port: 137
+            192:
+                dport_map_port: 138
+            193:
+                dport_map_port: 139
+            194:
+                dport_map_port: 140
+            286:
+                dport_map_port: 141
+            287:
+                dport_map_port: 142
+            288:
+                dport_map_port: 143
+            289:
+                dport_map_port: 144
+            268:
+                dport_map_port: 145
+            269:
+                dport_map_port: 146
+            270:
+                dport_map_port: 147
+            271:
+                dport_map_port: 148
+            198:
+                dport_map_port: 149
+            199:
+                dport_map_port: 150
+            200:
+                dport_map_port: 151
+            201:
+                dport_map_port: 152
+            275:
+                dport_map_port: 153
+            276:
+                dport_map_port: 154
+            277:
+                dport_map_port: 155
+            278:
+                dport_map_port: 156
+            279:
+                dport_map_port: 157
+            280:
+                dport_map_port: 158
+            281:
+                dport_map_port: 159
+            282:
+                dport_map_port: 160
+            209:
+                dport_map_port: 161
+            210:
+                dport_map_port: 162
+            211:
+                dport_map_port: 163
+            212:
+                dport_map_port: 164
+            264:
+                dport_map_port: 165
+            265:
+                dport_map_port: 166
+            266:
+                dport_map_port: 167
+            267:
+                dport_map_port: 168
+            290:
+                dport_map_port: 169
+            291:
+                dport_map_port: 170
+            292:
+                dport_map_port: 171
+            293:
+                dport_map_port: 172
+            220:
+                dport_map_port: 173
+            221:
+                dport_map_port: 174
+            222:
+                dport_map_port: 175
+            223:
+                dport_map_port: 176
+            213:
+                dport_map_port: 177
+            214:
+                dport_map_port: 178
+            215:
+                dport_map_port: 179
+            216:
+                dport_map_port: 180
+            301:
+                dport_map_port: 181
+            302:
+                dport_map_port: 182
+            303:
+                dport_map_port: 183
+            304:
+                dport_map_port: 184
+            231:
+                dport_map_port: 185
+            232:
+                dport_map_port: 186
+            233:
+                dport_map_port: 187
+            234:
+                dport_map_port: 188
+            202:
+                dport_map_port: 189
+            203:
+                dport_map_port: 190
+            204:
+                dport_map_port: 191
+            205:
+                dport_map_port: 192
+            312:
+                dport_map_port: 193
+            313:
+                dport_map_port: 194
+            314:
+                dport_map_port: 195
+            315:
+                dport_map_port: 196
+            242:
+                dport_map_port: 197
+            243:
+                dport_map_port: 198
+            244:
+                dport_map_port: 199
+            245:
+                dport_map_port: 200
+            224:
+                dport_map_port: 201
+            225:
+                dport_map_port: 202
+            226:
+                dport_map_port: 203
+            227:
+                dport_map_port: 204
+            323:
+                dport_map_port: 205
+            324:
+                dport_map_port: 206
+            325:
+                dport_map_port: 207
+            326:
+                dport_map_port: 208
+            253:
+                dport_map_port: 209
+            254:
+                dport_map_port: 210
+            255:
+                dport_map_port: 211
+            256:
+                dport_map_port: 212
+            235:
+                dport_map_port: 213
+            236:
+                dport_map_port: 214
+            237:
+                dport_map_port: 215
+            238:
+                dport_map_port: 216
+            308:
+                dport_map_port: 217
+            309:
+                dport_map_port: 218
+            310:
+                dport_map_port: 219
+            311:
+                dport_map_port: 220
+            319:
+                dport_map_port: 221
+            320:
+                dport_map_port: 222
+            321:
+                dport_map_port: 223
+            322:
+                dport_map_port: 224
+            246:
+                dport_map_port: 225
+            247:
+                dport_map_port: 226
+            248:
+                dport_map_port: 227
+            249:
+                dport_map_port: 228
+            334:
+                dport_map_port: 229
+            335:
+                dport_map_port: 230
+            336:
+                dport_map_port: 231
+            337:
+                dport_map_port: 232
+            330:
+                dport_map_port: 233
+            331:
+                dport_map_port: 234
+            332:
+                dport_map_port: 235
+            333:
+                dport_map_port: 236
+            257:
+                dport_map_port: 237
+            258:
+                dport_map_port: 238
+            259:
+                dport_map_port: 239
+            260:
+                dport_map_port: 240
+            345:
+                dport_map_port: 241
+            346:
+                dport_map_port: 242
+            347:
+                dport_map_port: 243
+            348:
+                dport_map_port: 244
+            341:
+                dport_map_port: 245
+            342:
+                dport_map_port: 246
+            343:
+                dport_map_port: 247
+            344:
+                dport_map_port: 248
+            5:
+                dport_map_port: 249
+            6:
+                dport_map_port: 250
+            7:
+                dport_map_port: 251
+            8:
+                dport_map_port: 252
+            1:
+                dport_map_port: 253
+            2:
+                dport_map_port: 254
+            3:
+                dport_map_port: 255
+            4:
+                dport_map_port: 256
+...
+
+---
+device:
+    0:
+        PC_TX_TAPS:
+            ?
+                PORT_ID: 88
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 124
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 6
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 88
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 88
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 88
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 90
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 90
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 90
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 90
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 99
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 99
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 99
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 99
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 101
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 101
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 101
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 101
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 110
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 110
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 110
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 110
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 6
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 112
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 112
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 112
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 112
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 121
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 121
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 121
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 121
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 123
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 123
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 123
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 123
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 143
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 143
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 143
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 143
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 145
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 145
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 145
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 145
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 132
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 132
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 132
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 132
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 134
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 134
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 134
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 134
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 81
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 81
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 6
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 81
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 81
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 6
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 83
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 83
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 83
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 83
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 70
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 70
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 70
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 70
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 72
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 72
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 72
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 72
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 59
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 59
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 59
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 59
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 61
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 61
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 61
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 61
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 48
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 48
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 48
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 48
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 50
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 50
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 50
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 50
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 297
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 297
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 297
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 297
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 299
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 299
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 299
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 299
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 286
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 286
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 286
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 286
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 6
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 288
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 288
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 288
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 288
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 275
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 6
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 275
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 275
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 275
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 277
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 277
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 277
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 277
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 264
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 264
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 264
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 264
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 266
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 266
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 266
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 266
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 213
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 213
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 213
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 213
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 215
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 215
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 215
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 215
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 202
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 202
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 202
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 202
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 204
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 204
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 204
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 204
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 224
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 224
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 224
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 224
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 226
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 226
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 226
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 226
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 235
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 235
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 235
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 235
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 237
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 237
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 237
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 237
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 246
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 246
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 246
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 246
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 248
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 248
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 248
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 248
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 257
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 257
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 257
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 257
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 259
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 259
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 259
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 259
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 11
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 11
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 11
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 11
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 13
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 13
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 13
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 13
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 15
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 15
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 15
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 15
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 17
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 17
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 17
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 17
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 26
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 26
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 26
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 26
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 28
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 28
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 28
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 28
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 37
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 37
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 37
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 37
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 39
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 39
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 39
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 39
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 92
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 92
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 92
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 92
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 94
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 94
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 94
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 94
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 22
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 22
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 22
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 22
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 24
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 24
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 24
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 24
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 103
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 103
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 103
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 103
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 105
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 105
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 105
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 105
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 33
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 33
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 33
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 33
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 35
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 35
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 35
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 35
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 114
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 114
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 114
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 114
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 116
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 116
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 116
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 116
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 44
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 44
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 44
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 44
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 46
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 46
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 46
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 46
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 125
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 125
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 125
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 125
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 127
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 127
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 127
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 127
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 55
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 55
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 55
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 55
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 57
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 57
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 57
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 57
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 136
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 136
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 136
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 136
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 138
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 138
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 138
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 138
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 66
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 66
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 66
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 66
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 68
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 68
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 68
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 68
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 147
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 147
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 147
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 147
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 149
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 149
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 149
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 149
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 77
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 77
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 77
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 77
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 79
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 79
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 79
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 79
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 154
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 154
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 154
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 154
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 156
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 156
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 156
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 156
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 158
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 158
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 158
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 158
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 160
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 160
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 160
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 160
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 165
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 165
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 165
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 165
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 167
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 167
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 167
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 167
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 169
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 169
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 169
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 169
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 171
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 171
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 171
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 171
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 176
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 176
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 176
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 176
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 178
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 178
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 178
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 178
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 180
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 180
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 180
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 180
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 182
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 182
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 182
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 182
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 187
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 187
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 187
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 187
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 189
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 189
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 189
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 189
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 191
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 191
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 191
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 191
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 193
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 193
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 193
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 193
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 268
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 268
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 268
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 268
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 270
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 270
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 270
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 270
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 198
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 198
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 198
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 198
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 200
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 200
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 200
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 200
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 279
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 279
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 279
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 279
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 281
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 281
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 281
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 281
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 209
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 209
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 209
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 209
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 211
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 211
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 211
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 211
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 290
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 290
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 290
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 290
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 292
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 292
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 292
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 292
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 220
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 220
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 220
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 220
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 222
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 222
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 222
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 222
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 301
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 301
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 301
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 301
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 303
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 303
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 303
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 303
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 231
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 231
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 231
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 231
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 233
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 233
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 233
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 233
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 312
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 312
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 312
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 312
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 314
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 314
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 314
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 314
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 242
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 242
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 242
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 242
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 244
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 244
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 244
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 244
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 28
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 136
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 323
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 323
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 323
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 323
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 325
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 325
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 325
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 325
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 253
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 253
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 253
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 253
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 255
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 255
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 255
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 255
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 308
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 308
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 308
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 308
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 310
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 310
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 310
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 310
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 319
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 319
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 319
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 319
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 321
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 321
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 321
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 321
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 334
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 334
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 334
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 334
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 336
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 336
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 336
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 336
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 330
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 330
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 330
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 330
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 332
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 332
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 332
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 332
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 32
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 132
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 345
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 345
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 345
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 345
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 347
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 347
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 347
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 347
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 341
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 341
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 341
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 341
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 343
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 343
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 343
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 343
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 5
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 7
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 7
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 7
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 7
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 1
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 3
+                LANE_INDEX: 0
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 3
+                LANE_INDEX: 1
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 3
+                LANE_INDEX: 2
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+            ?
+                PORT_ID: 3
+                LANE_INDEX: 3
+            :
+                TX_SIG_MODE_AUTO: 0
+                TX_SIG_MODE: PC_SIG_MODE_PAM4
+                TXFIR_TAP_MODE_AUTO: 0
+                TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6
+                TX_PRE3_AUTO: 0
+                TX_PRE3: 0
+                TX_PRE_SIGN: 1
+                TX_PRE_AUTO: 0
+                TX_PRE: 36
+                TX_MAIN_SIGN: 0
+                TX_MAIN_AUTO: 0
+                TX_MAIN: 128
+                TX_POST_SIGN: 0
+                TX_POST_AUTO: 0
+                TX_POST: 0
+                TX_PRE2_SIGN: 0
+                TX_PRE2_AUTO: 0
+                TX_PRE2: 4
+                TX_POST2_SIGN: 0
+                TX_POST2_AUTO: 0
+                TX_POST2: 0
+                TX_POST3_SIGN: 0
+                TX_POST3_AUTO: 0
+                TX_POST3: 0
+...
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6940-128qc-r0/custom_led.bin
new file mode 100644
index 0000000000000000000000000000000000000000..c6bb453fff800fe8bd2c8f13ce522736a5d03f34
GIT binary patch
literal 588
zcmXZXK}b^p90u_3dv7aDg*-@;@UZD99UgROOc3T9{>kPl3kxm5?IFyA2M>ZCga!$l
z;K5AjwTwIn?I7u32T2dYJnSI6hj<ueOhSeSVFo*R5Srla`|(}Auax;CujQ%qNg*@8
z847+DG#SEX#ar!vCC}u&B&E7AB4~x#gowO|9==q%Y>xuLui6t+m;2F<IJ-ZjmyjEY
zOVVM)7o;JPkYqw#*2Rb}zHNfXuPnzM{u#KrV$*2S%a3u#yNYd^Qqixp8w(C=2CkYL
zyD+Q;dy{F!K#OXsPQOswv3R5B6=f{6T{n*_`G<wpEmL)=#vN_L{9YUrxY+!#^26i(
zBsM3#Un(gnw@}jsx4n=Zvxgse1L0Vh9fxUp?wX3H-h}6$d5`76>pizU7kT?;Y3HY;
zB_-daw3`hFMU4a`5Q#<p7PApuRQ-(v^qBs;IN$>Yx&aGE*uy?%F^36EVi=?7M+jTY
zaE<F+;tFG&r;j~sVH^7y;xI=!!AZ_?jxo$*2`gB`I<}BO9qQ45Mzo*}KJ*}gML6Mx
zfmO7l6De$<7k${qE(S4#91al1IPy5g6sB>4Q=H)(7bxQrS0L@IVlC@f&jvO!!9_ah
zromOVvy&-qu$O(@<}L?0#2gP8<~Z{_<`k#7$9-Bn;u+6*!c$)IiWe-i3bi2Y_z#M^
Bu$}+_

literal 0
HcmV?d00001

diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/default_sku b/device/micas/x86_64-micas_m2-w6940-128qc-r0/default_sku
new file mode 100644
index 000000000000..cfa928b0da06
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/default_sku
@@ -0,0 +1 @@
+M2-W6940-128QC l2
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/dev.xml b/device/micas/x86_64-micas_m2-w6940-128qc-r0/dev.xml
new file mode 100644
index 000000000000..b5267e84b154
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/dev.xml
@@ -0,0 +1,11 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--
+      ### type  1 result/1000
+          type  2 result/100
+          type  3 read bit
+     ### property need check must add int front
+-->
+<catalog>
+    <cpus location="/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*"/>
+</catalog>
+
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/fru.py b/device/micas/x86_64-micas_m2-w6940-128qc-r0/fru.py
new file mode 100755
index 000000000000..f95164e03601
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/fru.py
@@ -0,0 +1,961 @@
+#!/usr/bin/python3
+import collections
+from datetime import datetime, timedelta
+from bitarray import bitarray
+
+
+__DEBUG__ = "N"
+
+
+class FruException(Exception):
+    def __init__(self, message='fruerror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+
+def e_print(err):
+    print("ERROR: " + err)
+
+
+def d_print(debug_info):
+    if __DEBUG__ == "Y":
+        print(debug_info)
+
+
+class FruUtil():
+    @staticmethod
+    def decodeLength(value):
+        a = bitarray(8)
+        a.setall(True)
+        a[0:1] = 0
+        a[1:2] = 0
+        x = ord(a.tobytes())
+        return x & ord(value)
+
+    @staticmethod
+    def minToData():
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        endtime = datetime.now()
+        seconds = (endtime - starttime).total_seconds()
+        mins = seconds // 60
+        m = int(round(mins))
+        return m
+
+    @staticmethod
+    def getTimeFormat():
+        return datetime.now().strftime('%Y-%m-%d')
+
+    @staticmethod
+    def getTypeLength(value):
+        if value is None or len(value) == 0:
+            return 0
+        a = bitarray(8)
+        a.setall(False)
+        a[0:1] = 1
+        a[1:2] = 1
+        x = ord(a.tobytes())
+        return x | len(value)
+
+    @staticmethod
+    def checksum(b):
+        result = 0
+        for item in b:
+            result += ord(item)
+        return (0x100 - (result & 0xff)) & 0xff
+
+
+class BaseArea(object):
+    SUGGESTED_SIZE_COMMON_HEADER = 8
+    SUGGESTED_SIZE_INTERNAL_USE_AREA = 72
+    SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32
+    SUGGESTED_SIZE_BOARD_INFO_AREA = 80
+    SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80
+
+    INITVALUE = b'\x00'
+    resultvalue = INITVALUE * 256
+    COMMON_HEAD_VERSION = b'\x01'
+    __childList = None
+
+    def __init__(self, name="", size=0, offset=0):
+        self.__childList = []
+        self._offset = offset
+        self.name = name
+        self._size = size
+        self._isPresent = False
+        self._data = b'\x00' * size
+
+    @property
+    def childList(self):
+        return self.__childList
+
+    @childList.setter
+    def childList(self, value):
+        self.__childList = value
+
+    @property
+    def offset(self):
+        return self._offset
+
+    @offset.setter
+    def offset(self, value):
+        self._offset = value
+
+    @property
+    def size(self):
+        return self._size
+
+    @size.setter
+    def size(self, value):
+        self._size = value
+
+    @property
+    def data(self):
+        return self._data
+
+    @data.setter
+    def data(self, value):
+        self._data = value
+
+    @property
+    def isPresent(self):
+        return self._isPresent
+
+    @isPresent.setter
+    def isPresent(self, value):
+        self._isPresent = value
+
+
+class InternalUseArea(BaseArea):
+    pass
+
+
+class ChassisInfoArea(BaseArea):
+    pass
+
+
+class BoardInfoArea(BaseArea):
+    _boardTime = None
+    _fields = None
+    _mfg_date = None
+    areaversion = None
+    _boardversion = None
+    _language = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "mfg_date            : %s \n" \
+                    "boardManufacturer   : %s \n" \
+                    "boardProductName    : %s \n" \
+                    "boardSerialNumber   : %s \n" \
+                    "boardPartNumber     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.boardversion), self.size,
+                              self.language, self.getMfgRealData(),
+                              self.boardManufacturer, self.boardProductName,
+                              self.boardSerialNumber, self.boardPartNumber,
+                              self.fruFileId)
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "boardextra%d         : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["boardversion"] = ord(self.boardversion)
+        dic["boardlength"] = self.size
+        dic["boardlanguage"] = self.language
+        dic["boardmfg_date"] = self.getMfgRealData()
+        dic["boardManufacturer"] = self.boardManufacturer
+        dic["boardProductName"] = self.boardProductName
+        dic["boardSerialNumber"] = self.boardSerialNumber
+        dic["boardPartNumber"] = self.boardPartNumber
+        dic["boardfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]
+        index += 1
+        d_print("decode length :%d class size:%d" %
+                ((ord(self.data[index]) * 8), self.size))
+        index += 2
+
+        timetmp = self.data[index: index + 3]
+        self.mfg_date = ord(timetmp[0]) | (
+            ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16)
+        d_print("decode getMfgRealData :%s" % self.getMfgRealData())
+        index += 3
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardManufacturer:%s" % self.boardManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardProductName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardProductName:%s" % self.boardProductName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardSerialNumber:%s" % self.boardSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardPartNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardPartNumber:%s" % self.boardPartNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if self.data[index] != chr(0xc1):
+                templen = FruUtil.decodeLength(self.data[index])
+                tmpval = self.data[index + 1: index + templen + 1]
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+            else:
+                break
+
+    def fruSetValue(self, field, value):
+        tmp_field = getattr(self, field, None)
+        if tmp_field is not None:
+            setattr(self, field, value)
+
+    def recalcute(self):
+        d_print("boardInfoArea version:%x" % ord(self.boardversion))
+        d_print("boardInfoArea length:%d" % self.size)
+        d_print("boardInfoArea language:%x" % self.language)
+        self.mfg_date = FruUtil.minToData()
+        d_print("boardInfoArea mfg_date:%x" % self.mfg_date)
+
+        self.data = chr(ord(self.boardversion)) + \
+            chr(self.size // 8) + chr(self.language)
+
+        self.data += chr(self.mfg_date & 0xFF)
+        self.data += chr((self.mfg_date >> 8) & 0xFF)
+        self.data += chr((self.mfg_date >> 16) & 0xFF)
+
+        d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer)
+        typelength = FruUtil.getTypeLength(self.boardManufacturer)
+        self.data += chr(typelength)
+        self.data += self.boardManufacturer
+
+        d_print("boardInfoArea boardProductName:%s" % self.boardProductName)
+        self.data += chr(FruUtil.getTypeLength(self.boardProductName))
+        self.data += self.boardProductName
+
+        d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber))
+        self.data += self.boardSerialNumber
+
+        d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardPartNumber))
+        self.data += self.boardPartNumber
+
+        d_print("boardInfoArea fruFileId:%s" % self.fruFileId)
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is not None:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) // 8 + 1
+            self.size += incr * 8
+
+        self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+        d_print("self data:%d" % len(self.data))
+        d_print("self size:%d" % self.size)
+        d_print("adjust size:%d" % (self.size - len(self.data) - 1))
+        self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+
+        # checksum
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+    def getMfgRealData(self):
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        mactime = starttime + timedelta(minutes=self.mfg_date)
+        return mactime
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def mfg_date(self):
+        return self._mfg_date
+
+    @mfg_date.setter
+    def mfg_date(self, val):
+        self._mfg_date = val
+
+    @property
+    def boardversion(self):
+        self._boardversion = self.COMMON_HEAD_VERSION
+        return self._boardversion
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, val):
+        self._FRUFileID = val
+
+    @property
+    def boardPartNumber(self):
+        return self._boardPartNumber
+
+    @boardPartNumber.setter
+    def boardPartNumber(self, val):
+        self._boardPartNumber = val
+
+    @property
+    def boardSerialNumber(self):
+        return self._boardSerialNumber
+
+    @boardSerialNumber.setter
+    def boardSerialNumber(self, val):
+        self._boardSerialNumber = val
+
+    @property
+    def boardProductName(self):
+        return self._boradProductName
+
+    @boardProductName.setter
+    def boardProductName(self, val):
+        self._boradProductName = val
+
+    @property
+    def boardManufacturer(self):
+        return self._boardManufacturer
+
+    @boardManufacturer.setter
+    def boardManufacturer(self, val):
+        self._boardManufacturer = val
+
+    @property
+    def boardTime(self):
+        return self._boardTime
+
+    @boardTime.setter
+    def boardTime(self, val):
+        self._boardTime = val
+
+    @property
+    def fields(self):
+        return self._fields
+
+    @fields.setter
+    def fields(self, val):
+        self._fields = val
+
+
+class ProductInfoArea(BaseArea):
+    _productManufacturer = None
+    _productAssetTag = None
+    _FRUFileID = None
+    _language = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "productManufacturer : %s \n" \
+                    "productName         : %s \n" \
+                    "productPartModelName: %s \n" \
+                    "productVersion      : %s \n" \
+                    "productSerialNumber : %s \n" \
+                    "productAssetTag     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.areaversion), self.size,
+                              self.language, self.productManufacturer,
+                              self.productName, self.productPartModelName,
+                              self.productVersion, self.productSerialNumber,
+                              self.productAssetTag, self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "productextra%d       : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["productversion"] = ord(self.areaversion)
+        dic["productlength"] = self.size
+        dic["productlanguage"] = self.language
+        dic["productManufacturer"] = self.productManufacturer
+        dic["productName"] = self.productName
+        dic["productPartModelName"] = self.productPartModelName
+        dic["productVersion"] = int(self.productVersion, 16)
+        dic["productSerialNumber"] = self.productSerialNumber
+        dic["productAssetTag"] = self.productAssetTag
+        dic["productfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]  # 0
+        index += 1
+        d_print("decode length %d" % (ord(self.data[index]) * 8))
+        d_print("class size %d" % self.size)
+        index += 2
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productManufacturer:%s" % self.productManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productName:%s" % self.productName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productPartModelName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productPartModelName:%s" % self.productPartModelName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productVersion = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productVersion:%s" % self.productVersion)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productSerialNumber:%s" % self.productSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productAssetTag = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productAssetTag:%s" % self.productAssetTag)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if self.data[index] != chr(0xc1) and index < self.size - 1:
+                templen = FruUtil.decodeLength(self.data[index])
+                if templen == 0:
+                    break
+                tmpval = self.data[index + 1: index + templen + 1]
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+            else:
+                break
+
+    @property
+    def productVersion(self):
+        return self._productVersion
+
+    @productVersion.setter
+    def productVersion(self, name):
+        self._productVersion = name
+
+    @property
+    def areaversion(self):
+        self._areaversion = self.COMMON_HEAD_VERSION
+        return self._areaversion
+
+    @areaversion.setter
+    def areaversion(self, name):
+        self._areaversion = name
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def productManufacturer(self):
+        return self._productManufacturer
+
+    @productManufacturer.setter
+    def productManufacturer(self, name):
+        self._productManufacturer = name
+
+    @property
+    def productName(self):
+        return self._productName
+
+    @productName.setter
+    def productName(self, name):
+        self._productName = name
+
+    @property
+    def productPartModelName(self):
+        return self._productPartModelName
+
+    @productPartModelName.setter
+    def productPartModelName(self, name):
+        self._productPartModelName = name
+
+    @property
+    def productSerialNumber(self):
+        return self._productSerialNumber
+
+    @productSerialNumber.setter
+    def productSerialNumber(self, name):
+        self._productSerialNumber = name
+
+    @property
+    def productAssetTag(self):
+        return self._productAssetTag
+
+    @productAssetTag.setter
+    def productAssetTag(self, name):
+        self._productAssetTag = name
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, name):
+        self._FRUFileID = name
+
+    def fruSetValue(self, field, value):
+        tmp_field = getattr(self, field, None)
+        if tmp_field is not None:
+            setattr(self, field, value)
+
+    def recalcute(self):
+        d_print("product version:%x" % ord(self.areaversion))
+        d_print("product length:%d" % self.size)
+        d_print("product language:%x" % self.language)
+        self.data = chr(ord(self.areaversion)) + \
+            chr(self.size // 8) + chr(self.language)
+
+        typelength = FruUtil.getTypeLength(self.productManufacturer)
+        self.data += chr(typelength)
+        self.data += self.productManufacturer
+
+        self.data += chr(FruUtil.getTypeLength(self.productName))
+        self.data += self.productName
+
+        self.data += chr(FruUtil.getTypeLength(self.productPartModelName))
+        self.data += self.productPartModelName
+
+        self.data += chr(FruUtil.getTypeLength(self.productVersion))
+        self.data += self.productVersion
+
+        self.data += chr(FruUtil.getTypeLength(self.productSerialNumber))
+        self.data += self.productSerialNumber
+
+        self.data += chr(FruUtil.getTypeLength(self.productAssetTag))
+        if self.productAssetTag is not None:
+            self.data += self.productAssetTag
+
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea productextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is not None:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) // 8 + 1
+            self.size += incr * 8
+        d_print("self.data:%d" % len(self.data))
+        d_print("self.size:%d" % self.size)
+
+        self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+        self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+
+class MultiRecordArea(BaseArea):
+    pass
+
+
+class Field(object):
+
+    def __init__(self, fieldType="ASCII", fieldData=""):
+        self.fieldData = fieldData
+        self.fieldType = fieldType
+
+    @property
+    def fieldType(self):
+        return self.fieldType
+
+    @property
+    def fieldData(self):
+        return self.fieldData
+
+
+class ipmifru(BaseArea):
+    _BoardInfoArea = None
+    _ProductInfoArea = None
+    _InternalUseArea = None
+    _ChassisInfoArea = None
+    _multiRecordArea = None
+    _productinfoAreaOffset = BaseArea.INITVALUE
+    _boardInfoAreaOffset = BaseArea.INITVALUE
+    _internalUserAreaOffset = BaseArea.INITVALUE
+    _chassicInfoAreaOffset = BaseArea.INITVALUE
+    _multiRecordAreaOffset = BaseArea.INITVALUE
+    _bindata = None
+    _bodybin = None
+    _version = BaseArea.COMMON_HEAD_VERSION
+    _zeroCheckSum = None
+    _frusize = 256
+
+    def __str__(self):
+        tmpstr = ""
+        if self.boardInfoArea.isPresent:
+            tmpstr += "\nboardinfoarea: \n"
+            tmpstr += self.boardInfoArea.__str__()
+        if self.productInfoArea.isPresent:
+            tmpstr += "\nproductinfoarea: \n"
+            tmpstr += self.productInfoArea.__str__()
+        return tmpstr
+
+    def decodeBin(self, eeprom):
+        commonHead = eeprom[0:8]
+        d_print("decode version %x" % ord(commonHead[0]))
+        if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]):
+            raise FruException("HEAD VERSION error,not Fru format!", -10)
+        if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]):
+            strtemp = "check header checksum error [cal:%02x data:%02x]" % (
+                FruUtil.checksum(commonHead[0:7]), ord(commonHead[7]))
+            raise FruException(strtemp, -3)
+        if ord(commonHead[1]) != ord(self.INITVALUE):
+            d_print("Internal Use Area is present")
+            self.internalUseArea = InternalUseArea(
+                name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA)
+            self.internalUseArea.isPresent = True
+            self.internalUserAreaOffset = ord(commonHead[1])
+            self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: (
+                self.internalUserAreaOffset * 8 + self.internalUseArea.size)]
+        if ord(commonHead[2]) != ord(self.INITVALUE):
+            d_print("Chassis Info Area is present")
+            self.chassisInfoArea = ChassisInfoArea(
+                name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA)
+            self.chassisInfoArea.isPresent = True
+            self.chassicInfoAreaOffset = ord(commonHead[2])
+            self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: (
+                self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)]
+        if ord(commonHead[3]) != ord(self.INITVALUE):
+            self.boardInfoArea = BoardInfoArea(
+                name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA)
+            self.boardInfoArea.isPresent = True
+            self.boardInfoAreaOffset = ord(commonHead[3])
+            self.boardInfoArea.size = ord(
+                eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8
+            d_print("Board Info Area is present size:%d" %
+                    (self.boardInfoArea.size))
+            self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: (
+                self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)]
+            if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]):
+                strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" %  \
+                    (FruUtil.checksum(
+                        self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.boardInfoArea.decodedata()
+        if ord(commonHead[4]) != ord(self.INITVALUE):
+            d_print("Product Info Area is present")
+            self.productInfoArea = ProductInfoArea(
+                name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA)
+            self.productInfoArea.isPresent = True
+            self.productinfoAreaOffset = ord(commonHead[4])
+            d_print("length offset value: %02x" %
+                    ord(eeprom[self.productinfoAreaOffset * 8 + 1]))
+            self.productInfoArea.size = ord(
+                eeprom[self.productinfoAreaOffset * 8 + 1]) * 8
+            d_print("Product Info Area is present size:%d" %
+                    (self.productInfoArea.size))
+
+            self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: (
+                self.productinfoAreaOffset * 8 + self.productInfoArea.size)]
+            if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]):
+                strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % (
+                    FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.productInfoArea.decodedata()
+        if ord(commonHead[5]) != ord(self.INITVALUE):
+            self.multiRecordArea = MultiRecordArea(
+                name="MultiRecord record Area ")
+            d_print("MultiRecord record present")
+            self.multiRecordArea.isPresent = True
+            self.multiRecordAreaOffset = ord(commonHead[5])
+            self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: (
+                self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)]
+
+    def initDefault(self):
+        self.version = self.COMMON_HEAD_VERSION
+        self.internalUserAreaOffset = self.INITVALUE
+        self.chassicInfoAreaOffset = self.INITVALUE
+        self.boardInfoAreaOffset = self.INITVALUE
+        self.productinfoAreaOffset = self.INITVALUE
+        self.multiRecordAreaOffset = self.INITVALUE
+        self.zeroCheckSum = self.INITVALUE
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        self.productInfoArea = None
+        self.internalUseArea = None
+        self.boardInfoArea = None
+        self.chassisInfoArea = None
+        self.multiRecordArea = None
+        # self.recalcute()
+
+    @property
+    def version(self):
+        return self._version
+
+    @version.setter
+    def version(self, name):
+        self._version = name
+
+    @property
+    def internalUserAreaOffset(self):
+        return self._internalUserAreaOffset
+
+    @internalUserAreaOffset.setter
+    def internalUserAreaOffset(self, obj):
+        self._internalUserAreaOffset = obj
+
+    @property
+    def chassicInfoAreaOffset(self):
+        return self._chassicInfoAreaOffset
+
+    @chassicInfoAreaOffset.setter
+    def chassicInfoAreaOffset(self, obj):
+        self._chassicInfoAreaOffset = obj
+
+    @property
+    def productinfoAreaOffset(self):
+        return self._productinfoAreaOffset
+
+    @productinfoAreaOffset.setter
+    def productinfoAreaOffset(self, obj):
+        self._productinfoAreaOffset = obj
+
+    @property
+    def boardInfoAreaOffset(self):
+        return self._boardInfoAreaOffset
+
+    @boardInfoAreaOffset.setter
+    def boardInfoAreaOffset(self, obj):
+        self._boardInfoAreaOffset = obj
+
+    @property
+    def multiRecordAreaOffset(self):
+        return self._multiRecordAreaOffset
+
+    @multiRecordAreaOffset.setter
+    def multiRecordAreaOffset(self, obj):
+        self._multiRecordAreaOffset = obj
+
+    @property
+    def zeroCheckSum(self):
+        return self._zeroCheckSum
+
+    @zeroCheckSum.setter
+    def zeroCheckSum(self, obj):
+        self._zeroCheckSum = obj
+
+    @property
+    def productInfoArea(self):
+        return self._ProductInfoArea
+
+    @productInfoArea.setter
+    def productInfoArea(self, obj):
+        self._ProductInfoArea = obj
+
+    @property
+    def internalUseArea(self):
+        return self._InternalUseArea
+
+    @internalUseArea.setter
+    def internalUseArea(self, obj):
+        self.internalUseArea = obj
+
+    @property
+    def boardInfoArea(self):
+        return self._BoardInfoArea
+
+    @boardInfoArea.setter
+    def boardInfoArea(self, obj):
+        self._BoardInfoArea = obj
+
+    @property
+    def chassisInfoArea(self):
+        return self._ChassisInfoArea
+
+    @chassisInfoArea.setter
+    def chassisInfoArea(self, obj):
+        self._ChassisInfoArea = obj
+
+    @property
+    def multiRecordArea(self):
+        return self._multiRecordArea
+
+    @multiRecordArea.setter
+    def multiRecordArea(self, obj):
+        self._multiRecordArea = obj
+
+    @property
+    def bindata(self):
+        return self._bindata
+
+    @bindata.setter
+    def bindata(self, obj):
+        self._bindata = obj
+
+    @property
+    def bodybin(self):
+        return self._bodybin
+
+    @bodybin.setter
+    def bodybin(self, obj):
+        self._bodybin = obj
+
+    def recalcuteCommonHead(self):
+        self.bindata = ""
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        d_print("common Header %d" % self.offset)
+        d_print("fru eeprom size  %d" % self._frusize)
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            self.internalUserAreaOffset = self.offset // 8
+            self.offset += self.internalUseArea.size
+            d_print("internalUseArea is present offset:%d" % self.offset)
+
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            self.chassicInfoAreaOffset = self.offset // 8
+            self.offset += self.chassisInfoArea.size
+            d_print("chassisInfoArea is present offset:%d" % self.offset)
+
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            self.boardInfoAreaOffset = self.offset // 8
+            self.offset += self.boardInfoArea.size
+            d_print("boardInfoArea is present offset:%d" % self.offset)
+            d_print("boardInfoArea is present size:%d" %
+                    self.boardInfoArea.size)
+
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            self.productinfoAreaOffset = self.offset // 8
+            self.offset += self.productInfoArea.size
+            d_print("productInfoArea is present offset:%d" % self.offset)
+
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            self.multiRecordAreaOffset = self.offset // 8
+            d_print("multiRecordArea is present offset:%d" % self.offset)
+
+        if self.internalUserAreaOffset == self.INITVALUE:
+            self.internalUserAreaOffset = 0
+        if self.productinfoAreaOffset == self.INITVALUE:
+            self.productinfoAreaOffset = 0
+        if self.chassicInfoAreaOffset == self.INITVALUE:
+            self.chassicInfoAreaOffset = 0
+        if self.boardInfoAreaOffset == self.INITVALUE:
+            self.boardInfoAreaOffset = 0
+        if self.multiRecordAreaOffset == self.INITVALUE:
+            self.multiRecordAreaOffset = 0
+
+        self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset
+                             - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff
+        d_print("zerochecksum:%x" % self.zeroCheckSum)
+        self.data = ""
+        self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr(
+            self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum)
+
+        self.bindata = self.data + self.bodybin
+        totallen = len(self.bindata)
+        d_print("totallen %d" % totallen)
+        if totallen < self._frusize:
+            self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0]))
+        else:
+            raise FruException('bin data more than %d' % self._frusize, -2)
+
+    def recalcutebin(self):
+        self.bodybin = ""
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            d_print("internalUseArea present")
+            self.bodybin += self.internalUseArea.data
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            d_print("chassisInfoArea present")
+            self.bodybin += self.chassisInfoArea.data
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            d_print("boardInfoArea present")
+            self.boardInfoArea.recalcute()
+            self.bodybin += self.boardInfoArea.data
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            d_print("productInfoAreapresent")
+            self.productInfoArea.recalcute()
+            self.bodybin += self.productInfoArea.data
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            d_print("multiRecordArea present")
+            self.bodybin += self.productInfoArea.data
+
+    def recalcute(self, fru_eeprom_size=256):
+        self._frusize = fru_eeprom_size
+        self.recalcutebin()
+        self.recalcuteCommonHead()
+
+    def setValue(self, area, field, value):
+        tmp_area = getattr(self, area, None)
+        if tmp_area is not None:
+            tmp_area.fruSetValue(field, value)
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/installer.conf b/device/micas/x86_64-micas_m2-w6940-128qc-r0/installer.conf
new file mode 100644
index 000000000000..7dfbba766f34
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/installer.conf
@@ -0,0 +1,4 @@
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll intel_iommu=on iommu=pt modprobe.blacklist=r8168,r8169,ice,mei_me,i2c_i801,i2c_ismt"
+CONSOLE_PORT=0x5060
+CONSOLE_DEV=0
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/media_settings.json b/device/micas/x86_64-micas_m2-w6940-128qc-r0/media_settings.json
new file mode 100644
index 000000000000..567e84e9c7e0
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/media_settings.json
@@ -0,0 +1,5118 @@
+{
+    "PORT_MEDIA_SETTINGS": {
+        "0": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffdc",
+                    "lane1": "0xffffffdc",
+                    "lane2": "0xffffffdc",
+                    "lane3": "0xffffffdc"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000080",
+                    "lane3": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "1": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffdc",
+                    "lane1": "0xffffffdc",
+                    "lane2": "0xffffffdc",
+                    "lane3": "0xffffffdc"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000080",
+                    "lane3": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "2": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffdc",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "3": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffdc",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "4": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000006",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffdc",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x0000007C",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "5": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "6": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "7": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffdc",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffdc"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "8": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "9": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "10": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "11": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "12": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "13": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "14": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffdc",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffdc"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "15": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffdc",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "16": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000006"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "17": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "18": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "19": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "20": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "21": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "22": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffdc"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "23": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "24": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "25": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "26": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "27": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "28": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "29": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "30": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "31": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "32": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "33": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "34": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "35": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "36": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "37": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "38": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "39": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "40": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000006",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000006"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "41": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "42": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "43": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "44": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "45": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "46": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "47": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "48": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "49": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "50": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "51": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "52": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "53": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "54": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "55": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "56": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "57": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "58": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "59": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "60": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "61": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "62": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "63": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "64": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "65": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "66": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "67": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "68": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "69": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "70": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000006"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "71": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "72": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "73": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "74": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "75": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "76": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000006",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "77": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "78": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "79": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "80": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "81": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "82": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "83": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "84": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "85": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "86": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "87": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "88": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "89": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "90": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "91": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "92": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "93": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "94": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "95": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "96": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "97": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "98": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "99": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe4",
+                    "lane1": "0xffffffe4",
+                    "lane2": "0xffffffe4",
+                    "lane3": "0xffffffe4"
+                },
+                "main": {
+                    "lane0": "0x00000088",
+                    "lane1": "0x00000088",
+                    "lane2": "0x00000088",
+                    "lane3": "0x00000088"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "100": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "101": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "102": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "103": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "104": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "105": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "106": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "107": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "108": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "109": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "110": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "111": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "112": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "113": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "114": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "115": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "116": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "117": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "118": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "119": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0"
+                },
+                "main": {
+                    "lane0": "0x00000084",
+                    "lane1": "0x00000084",
+                    "lane2": "0x00000084",
+                    "lane3": "0x00000084"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "120": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffdc",
+                    "lane1": "0xffffffdc",
+                    "lane2": "0xffffffdc",
+                    "lane3": "0xffffffdc"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000080",
+                    "lane3": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "121": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffdc",
+                    "lane1": "0xffffffdc",
+                    "lane2": "0xffffffdc",
+                    "lane3": "0xffffffdc"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000080",
+                    "lane3": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "122": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffdc",
+                    "lane1": "0xffffffdc",
+                    "lane2": "0xffffffdc",
+                    "lane3": "0xffffffdc"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000080",
+                    "lane3": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "123": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffdc",
+                    "lane1": "0xffffffdc",
+                    "lane2": "0xffffffdc",
+                    "lane3": "0xffffffdc"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000080",
+                    "lane3": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "124": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffdc",
+                    "lane1": "0xffffffdc",
+                    "lane2": "0xffffffdc",
+                    "lane3": "0xffffffdc"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000080",
+                    "lane3": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "125": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffdc",
+                    "lane1": "0xffffffdc",
+                    "lane2": "0xffffffdc",
+                    "lane3": "0xffffffdc"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000080",
+                    "lane3": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "126": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffdc",
+                    "lane1": "0xffffffdc",
+                    "lane2": "0xffffffdc",
+                    "lane3": "0xffffffdc"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000080",
+                    "lane3": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                }
+            }
+        },
+        "127": {
+            "Default": {
+                "pre2": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004"
+                },
+                "pre1": {
+                    "lane0": "0xffffffdc",
+                    "lane1": "0xffffffdc",
+                    "lane2": "0xffffffdc"
+                },
+                "main": {
+                    "lane0": "0x00000080",
+                    "lane1": "0x00000080",
+                    "lane2": "0x00000080"
+                },
+                "post1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000"
+                },
+                "post2": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000"
+                },
+                "post3": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000"
+                }
+            }
+        }
+    }
+}
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/monitor.py b/device/micas/x86_64-micas_m2-w6940-128qc-r0/monitor.py
new file mode 100755
index 000000000000..44b05bbcfe83
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/monitor.py
@@ -0,0 +1,410 @@
+#!/usr/bin/python3
+#   * onboard temperature sensors
+#   * FAN trays
+#   * PSU
+#
+import os
+import re
+from lxml import etree as ET
+import glob
+import json
+from decimal import Decimal
+from fru import ipmifru
+
+
+MAILBOX_DIR = "/sys/bus/i2c/devices/"
+BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type"
+BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow"
+
+
+CONFIG_NAME = "dev.xml"
+
+
+def byteTostr(val):
+    strtmp = ''
+    for value in val:
+        strtmp += chr(value)
+    return strtmp
+
+
+def typeTostr(val):
+    if isinstance(val, bytes):
+        strtmp = byteTostr(val)
+        return strtmp
+    return val
+
+
+def get_board_id():
+    if not os.path.exists(BOARD_ID_PATH):
+        return "NA"
+    with open(BOARD_ID_PATH) as fd:
+        id_str = fd.read().strip()
+    return "0x%x" % (int(id_str, 10))
+
+
+def getboardairflow():
+    if not os.path.exists(BOARD_AIRFLOW_PATH):
+        return "NA"
+    with open(BOARD_AIRFLOW_PATH) as fd:
+        airflow_str = fd.read().strip()
+    data = json.loads(airflow_str)
+    airflow = data.get("board", "NA")
+    return airflow
+
+
+boardid = get_board_id()
+boardairflow = getboardairflow()
+
+
+DEV_XML_FILE_LIST = [
+    "dev_" + boardid + "_" + boardairflow + ".xml",
+    "dev_" + boardid + ".xml",
+    "dev_" + boardairflow + ".xml",
+]
+
+
+def dev_file_read(path, offset, read_len):
+    retval = "ERR"
+    val_list = []
+    msg = ""
+    ret = ""
+    fd = -1
+
+    if not os.path.exists(path):
+        return False, "%s %s not found" % (retval, path)
+
+    try:
+        fd = os.open(path, os.O_RDONLY)
+        os.lseek(fd, offset, os.SEEK_SET)
+        ret = os.read(fd, read_len)
+        for item in ret:
+            val_list.append(item)
+    except Exception as e:
+        msg = str(e)
+        return False, "%s %s" % (retval, msg)
+    finally:
+        if fd > 0:
+            os.close(fd)
+    return True, val_list
+
+
+def getPMCreg(location):
+    retval = 'ERR'
+    if not os.path.isfile(location):
+        return "%s %s  notfound" % (retval, location)
+    try:
+        with open(location, 'r') as fd:
+            retval = fd.read()
+    except Exception as error:
+        return "ERR %s" % str(error)
+
+    retval = retval.rstrip('\r\n')
+    retval = retval.lstrip(" ")
+    return retval
+
+
+# Get a mailbox register
+def get_pmc_register(reg_name):
+    retval = 'ERR'
+    mb_reg_file = reg_name
+    filepath = glob.glob(mb_reg_file)
+    if len(filepath) == 0:
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    mb_reg_file = filepath[0]
+    if not os.path.isfile(mb_reg_file):
+        # print mb_reg_file,  'not found !'
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    try:
+        with open(mb_reg_file, 'rb') as fd:
+            retval = fd.read()
+        retval = typeTostr(retval)
+    except Exception as error:
+        retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error))
+
+    retval = retval.rstrip('\r\n')
+    retval = retval.lstrip(" ")
+    return retval
+
+
+class checktype():
+    def __init__(self, test1):
+        self.test1 = test1
+
+    @staticmethod
+    def getValue(location, bit, data_type, coefficient=1, addend=0):
+        try:
+            value_t = get_pmc_register(location)
+            if value_t.startswith("ERR") or value_t.startswith("NA"):
+                return value_t
+            if data_type == 1:
+                return float('%.1f' % ((float(value_t) / 1000) + addend))
+            if data_type == 2:
+                return float('%.1f' % (float(value_t) / 100))
+            if data_type == 3:
+                psu_status = int(value_t, 16)
+                return (psu_status & (1 << bit)) >> bit
+            if data_type == 4:
+                return int(value_t, 10)
+            if data_type == 5:
+                return float('%.1f' % (float(value_t) / 1000 / 1000))
+            if data_type == 6:
+                return Decimal(float(value_t) * coefficient / 1000).quantize(Decimal('0.000'))
+            return value_t
+        except Exception as e:
+            value_t = "ERR %s" % str(e)
+            return value_t
+
+    # fanFRU
+    @staticmethod
+    def decodeBinByValue(retval):
+        fru = ipmifru()
+        fru.decodeBin(retval)
+        return fru
+
+    @staticmethod
+    def getfruValue(prob_t, root, val):
+        try:
+            ret, binval_bytes = dev_file_read(val, 0, 256)
+            if ret is False:
+                return binval_bytes
+            binval = byteTostr(binval_bytes)
+            fanpro = {}
+            ret = checktype.decodeBinByValue(binval)
+            fanpro['fan_type'] = ret.productInfoArea.productName
+            fanpro['hw_version'] = ret.productInfoArea.productVersion
+            fanpro['sn'] = ret.productInfoArea.productSerialNumber
+            fan_display_name_dict = status.getDecodValue(root, "fan_display_name")
+            fan_name = fanpro['fan_type'].strip()
+            if len(fan_display_name_dict) == 0:
+                return fanpro
+            if fan_name not in fan_display_name_dict:
+                prob_t['errcode'] = -1
+                prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name)
+            else:
+                fanpro['fan_type'] = fan_display_name_dict[fan_name]
+            return fanpro
+        except Exception as error:
+            return "ERR " + str(error)
+
+    @staticmethod
+    def getslotfruValue(val):
+        try:
+            binval = checktype.getValue(val, 0, 0)
+            if binval.startswith("ERR"):
+                return binval
+            slotpro = {}
+            ret = checktype.decodeBinByValue(binval)
+            slotpro['slot_type'] = ret.boardInfoArea.boardProductName
+            slotpro['hw_version'] = ret.boardInfoArea.boardextra1
+            slotpro['sn'] = ret.boardInfoArea.boardSerialNumber
+            return slotpro
+        except Exception as error:
+            return "ERR " + str(error)
+
+    @staticmethod
+    def getpsufruValue(prob_t, root, val):
+        try:
+            psu_match = False
+            binval = checktype.getValue(val, 0, 0)
+            if binval.startswith("ERR"):
+                return binval
+            psupro = {}
+            ret = checktype.decodeBinByValue(binval)
+            psupro['type1'] = ret.productInfoArea.productPartModelName
+            psupro['sn'] = ret.productInfoArea.productSerialNumber
+            psupro['hw_version'] = ret.productInfoArea.productVersion
+            psu_dict = status.getDecodValue(root, "psutype")
+            psupro['type1'] = psupro['type1'].strip()
+            if len(psu_dict) == 0:
+                return psupro
+            for psu_name, display_name in psu_dict.items():
+                if psu_name.strip() == psupro['type1']:
+                    psupro['type1'] = display_name
+                    psu_match = True
+                    break
+            if psu_match is not True:
+                prob_t['errcode'] = -1
+                prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1'])
+            return psupro
+        except Exception as error:
+            return "ERR " + str(error)
+
+
+class status():
+    def __init__(self, productname):
+        self.productname = productname
+
+    @staticmethod
+    def getETroot(filename):
+        tree = ET.parse(filename)
+        root = tree.getroot()
+        return root
+
+    @staticmethod
+    def getDecodValue(collection, decode):
+        decodes = collection.find('decode')
+        testdecode = decodes.find(decode)
+        test = {}
+        if testdecode is None:
+            return test
+        for neighbor in testdecode.iter('code'):
+            test[neighbor.attrib["key"]] = neighbor.attrib["value"]
+        return test
+
+    @staticmethod
+    def getfileValue(location):
+        return checktype.getValue(location, " ", " ")
+
+    @staticmethod
+    def getETValue(a, filename, tagname):
+        root = status.getETroot(filename)
+        for neighbor in root.iter(tagname):
+            prob_t = {}
+            prob_t.update(neighbor.attrib)
+            prob_t['errcode'] = 0
+            prob_t['errmsg'] = ''
+            for pros in neighbor.iter("property"):
+                ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items()))
+                if ret.get('e2type') == 'fru' and ret.get("name") == "fru":
+                    fruval = checktype.getfruValue(prob_t, root, ret["location"])
+                    if isinstance(fruval, str) and fruval.startswith("ERR"):
+                        prob_t['errcode'] = -1
+                        prob_t['errmsg'] = fruval
+                        break
+                    prob_t.update(fruval)
+                    continue
+
+                if ret.get("name") == "psu" and ret.get('e2type') == 'fru':
+                    psuval = checktype.getpsufruValue(prob_t, root, ret["location"])
+                    if isinstance(psuval, str) and psuval.startswith("ERR"):
+                        prob_t['errcode'] = -1
+                        prob_t['errmsg'] = psuval
+                        break
+                    prob_t.update(psuval)
+                    continue
+
+                if ret.get("gettype") == "config":
+                    prob_t[ret["name"]] = ret["value"]
+                    continue
+
+                if 'type' not in ret.keys():
+                    val = "0"
+                else:
+                    val = ret["type"]
+                if 'bit' not in ret.keys():
+                    bit = "0"
+                else:
+                    bit = ret["bit"]
+                if 'coefficient' not in ret.keys():
+                    coefficient = 1
+                else:
+                    coefficient = float(ret["coefficient"])
+                if 'addend' not in ret.keys():
+                    addend = 0
+                else:
+                    addend = float(ret["addend"])
+
+                s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend)
+                if isinstance(s, str) and s.startswith("ERR"):
+                    prob_t['errcode'] = -1
+                    prob_t['errmsg'] = s
+                    break
+                if 'default' in ret.keys():
+                    rt = status.getDecodValue(root, ret['decode'])
+                    prob_t['errmsg'] = rt[str(s)]
+                    if str(s) != ret["default"]:
+                        prob_t['errcode'] = -1
+                        break
+                else:
+                    if 'decode' in ret.keys():
+                        rt = status.getDecodValue(root, ret['decode'])
+                        if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt):
+                            prob_t['errcode'] = -1
+                            prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" %
+                                                       (s.replace("\x00", "").rstrip()))
+                        else:
+                            s = rt[str(s).replace("\x00", "").rstrip()]
+                name = ret["name"]
+                prob_t[name] = str(s)
+            a.append(prob_t)
+
+    @staticmethod
+    def getCPUValue(a, filename, tagname):
+        root = status.getETroot(filename)
+        for neighbor in root.iter(tagname):
+            location = neighbor.attrib["location"]
+
+        filepath = glob.glob(location)
+        if len(filepath) == 0:
+            return
+        location = filepath[0]
+        L = []
+        for dirpath, dirnames, filenames in os.walk(location):
+            for file in filenames:
+                if file.endswith("_input"):
+                    b = re.findall(r'temp(\d+)_input', file)
+                    idx = int(b[0])
+                    L.append(idx)
+            L = sorted(L)
+        for idx in L:
+            prob_t = {}
+            prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, idx))
+            prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, idx))) / 1000
+            prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, idx))) / 1000
+            prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, idx))) / 1000
+            prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, idx))) / 1000
+            a.append(prob_t)
+
+    @staticmethod
+    def getFileName():
+        fpath = os.path.dirname(os.path.realpath(__file__))
+        for file in DEV_XML_FILE_LIST:
+            xml = fpath + "/" + file
+            if os.path.exists(xml):
+                return xml
+        return fpath + "/" + CONFIG_NAME
+
+    @staticmethod
+    def checkFan(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "fan"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getTemp(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "temp"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getPsu(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "psu"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getcputemp(ret):
+        _filename = status.getFileName()
+        _tagname = "cpus"
+        status.getCPUValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getDcdc(ret):
+        _filename = status.getFileName()
+        _tagname = "dcdc"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getmactemp(ret):
+        _filename = status.getFileName()
+        _tagname = "mactemp"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getmacpower(ret):
+        _filename = status.getFileName()
+        _tagname = "macpower"
+        status.getETValue(ret, _filename, _tagname)
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6940-128qc-r0/pcie.yaml
new file mode 100644
index 000000000000..94f5320cb10a
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/pcie.yaml
@@ -0,0 +1,443 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: 09a2
+  name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)'
+- bus: '00'
+  dev: '00'
+  fn: '1'
+  id: 09a4
+  name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)'
+- bus: '00'
+  dev: '00'
+  fn: '2'
+  id: 09a3
+  name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)'
+- bus: '00'
+  dev: '00'
+  fn: '3'
+  id: 09a5
+  name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)'
+- bus: '00'
+  dev: '00'
+  fn: '4'
+  id: 0998
+  name: 'Host bridge: Intel Corporation Device 0998'
+- bus: '00'
+  dev: '01'
+  fn: '0'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+  dev: '01'
+  fn: '1'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+  dev: '01'
+  fn: '2'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+  dev: '01'
+  fn: '3'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+  dev: '01'
+  fn: '4'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+  dev: '01'
+  fn: '5'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+  dev: '01'
+  fn: '6'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+  dev: '01'
+  fn: '7'
+  id: '0b00'
+  name: 'System peripheral: Intel Corporation Device 0b00'
+- bus: '00'
+  dev: '02'
+  fn: '0'
+  id: 09a6
+  name: 'System peripheral: Intel Corporation Device 09a6'
+- bus: '00'
+  dev: '02'
+  fn: '1'
+  id: 09a7
+  name: 'System peripheral: Intel Corporation Device 09a7'
+- bus: '00'
+  dev: '02'
+  fn: '4'
+  id: '3456'
+  name: 'Non-Essential Instrumentation [1300]: Intel Corporation Device 3456 (rev
+    01)'
+- bus: '00'
+  dev: '06'
+  fn: '0'
+  id: 18da
+  name: 'PCI bridge: Intel Corporation Device 18da (rev 11)'
+- bus: '00'
+  dev: 0e
+  fn: '0'
+  id: 18f2
+  name: 'SATA controller: Intel Corporation Device 18f2 (rev 11)'
+- bus: '00'
+  dev: 0f
+  fn: '0'
+  id: 18ac
+  name: 'System peripheral: Intel Corporation Device 18ac (rev 11)'
+- bus: '00'
+  dev: '10'
+  fn: '0'
+  id: 18a8
+  name: 'PCI bridge: Intel Corporation Device 18a8 (rev 11)'
+- bus: '00'
+  dev: '12'
+  fn: '0'
+  id: 18aa
+  name: 'PCI bridge: Intel Corporation Device 18aa (rev 11)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 18ad
+  name: 'PCI bridge: Intel Corporation Device 18ad (rev 11)'
+- bus: '00'
+  dev: '18'
+  fn: '0'
+  id: 18d3
+  name: 'Communication controller: Intel Corporation Device 18d3 (rev 11)'
+- bus: '00'
+  dev: '18'
+  fn: '1'
+  id: 18d4
+  name: 'Communication controller: Intel Corporation Device 18d4 (rev 11)'
+- bus: '00'
+  dev: '18'
+  fn: '4'
+  id: 18d6
+  name: 'Communication controller: Intel Corporation Device 18d6 (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '0'
+  id: 18d8
+  name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '1'
+  id: 18d8
+  name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '2'
+  id: 18d8
+  name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)'
+- bus: '00'
+  dev: 1a
+  fn: '3'
+  id: 18d9
+  name: 'Unassigned class [ff00]: Intel Corporation Device 18d9 (rev 11)'
+- bus: '00'
+  dev: 1c
+  fn: '0'
+  id: 18db
+  name: 'SD Host controller: Intel Corporation Device 18db (rev 11)'
+- bus: '00'
+  dev: 1d
+  fn: '0'
+  id: 0998
+  name: 'Host bridge: Intel Corporation Device 0998'
+- bus: '00'
+  dev: 1e
+  fn: '0'
+  id: 18d0
+  name: 'USB controller: Intel Corporation Device 18d0 (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: 18dc
+  name: 'ISA bridge: Intel Corporation Device 18dc (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '4'
+  id: 18df
+  name: 'SMBus: Intel Corporation Device 18df (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '5'
+  id: 18e0
+  name: 'Serial bus controller [0c80]: Intel Corporation Device 18e0 (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '7'
+  id: 18e1
+  name: 'Non-Essential Instrumentation [1300]: Intel Corporation Device 18e1 (rev
+    11)'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: 18ee
+  name: 'Co-processor: Intel Corporation Device 18ee (rev 11)'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: f900
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device f900 (rev 11)'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: '5220'
+  name: 'SMBus: Device 1ded:5220'
+- bus: '04'
+  dev: '00'
+  fn: '0'
+  id: '8168'
+  name: 'Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI
+    Express Gigabit Ethernet Controller (rev 15)'
+- bus: '14'
+  dev: '00'
+  fn: '0'
+  id: 09a2
+  name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)'
+- bus: '14'
+  dev: '00'
+  fn: '1'
+  id: 09a4
+  name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)'
+- bus: '14'
+  dev: '00'
+  fn: '2'
+  id: 09a3
+  name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)'
+- bus: '14'
+  dev: '00'
+  fn: '3'
+  id: 09a5
+  name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)'
+- bus: '14'
+  dev: '00'
+  fn: '4'
+  id: 0998
+  name: 'Host bridge: Intel Corporation Device 0998'
+- bus: f3
+  dev: '00'
+  fn: '0'
+  id: 09a2
+  name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)'
+- bus: f3
+  dev: '00'
+  fn: '1'
+  id: 09a4
+  name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)'
+- bus: f3
+  dev: '00'
+  fn: '2'
+  id: 09a3
+  name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)'
+- bus: f3
+  dev: '00'
+  fn: '3'
+  id: 09a5
+  name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)'
+- bus: f3
+  dev: '00'
+  fn: '4'
+  id: 0998
+  name: 'Host bridge: Intel Corporation Device 0998'
+- bus: f3
+  dev: '04'
+  fn: '0'
+  id: 18d1
+  name: 'PCI bridge: Intel Corporation Device 18d1'
+- bus: f4
+  dev: '00'
+  fn: '0'
+  id: 124c
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane'
+- bus: f4
+  dev: '00'
+  fn: '1'
+  id: 124c
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane'
+- bus: f4
+  dev: '00'
+  fn: '2'
+  id: 124c
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane'
+- bus: f4
+  dev: '00'
+  fn: '3'
+  id: 124c
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane'
+- bus: f4
+  dev: '00'
+  fn: '4'
+  id: 124c
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane'
+- bus: fe
+  dev: '00'
+  fn: '0'
+  id: '3450'
+  name: 'System peripheral: Intel Corporation Device 3450'
+- bus: fe
+  dev: '00'
+  fn: '1'
+  id: '3451'
+  name: 'System peripheral: Intel Corporation Device 3451'
+- bus: fe
+  dev: '00'
+  fn: '2'
+  id: '3452'
+  name: 'System peripheral: Intel Corporation Device 3452'
+- bus: fe
+  dev: '00'
+  fn: '3'
+  id: 0998
+  name: 'Host bridge: Intel Corporation Device 0998'
+- bus: fe
+  dev: '00'
+  fn: '5'
+  id: '3455'
+  name: 'System peripheral: Intel Corporation Device 3455'
+- bus: fe
+  dev: 0b
+  fn: '0'
+  id: '3448'
+  name: 'System peripheral: Intel Corporation Device 3448'
+- bus: fe
+  dev: 0b
+  fn: '1'
+  id: '3448'
+  name: 'System peripheral: Intel Corporation Device 3448'
+- bus: fe
+  dev: 0b
+  fn: '2'
+  id: 344b
+  name: 'System peripheral: Intel Corporation Device 344b'
+- bus: fe
+  dev: 0c
+  fn: '0'
+  id: 344a
+  name: 'Performance counters: Intel Corporation Device 344a'
+- bus: fe
+  dev: 1a
+  fn: '0'
+  id: '2880'
+  name: 'Performance counters: Intel Corporation Device 2880'
+- bus: ff
+  dev: '00'
+  fn: '0'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: '00'
+  fn: '1'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: '00'
+  fn: '2'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: '00'
+  fn: '3'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: '00'
+  fn: '4'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: '00'
+  fn: '5'
+  id: 344c
+  name: 'System peripheral: Intel Corporation Device 344c'
+- bus: ff
+  dev: 0a
+  fn: '0'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 0a
+  fn: '1'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 0a
+  fn: '2'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 0a
+  fn: '3'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 0a
+  fn: '4'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 0a
+  fn: '5'
+  id: 344d
+  name: 'System peripheral: Intel Corporation Device 344d'
+- bus: ff
+  dev: 1d
+  fn: '0'
+  id: 344f
+  name: 'System peripheral: Intel Corporation Device 344f'
+- bus: ff
+  dev: 1d
+  fn: '1'
+  id: '3457'
+  name: 'System peripheral: Intel Corporation Device 3457'
+- bus: ff
+  dev: 1e
+  fn: '0'
+  id: '3458'
+  name: 'System peripheral: Intel Corporation Device 3458 (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '1'
+  id: '3459'
+  name: 'System peripheral: Intel Corporation Device 3459 (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '2'
+  id: 345a
+  name: 'System peripheral: Intel Corporation Device 345a (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '3'
+  id: 345b
+  name: 'System peripheral: Intel Corporation Device 345b (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '4'
+  id: 345c
+  name: 'System peripheral: Intel Corporation Device 345c (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '5'
+  id: 345d
+  name: 'System peripheral: Intel Corporation Device 345d (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '6'
+  id: 345e
+  name: 'System peripheral: Intel Corporation Device 345e (rev 01)'
+- bus: ff
+  dev: 1e
+  fn: '7'
+  id: 345f
+  name: 'System peripheral: Intel Corporation Device 345f (rev 01)'
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform.json b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform.json
new file mode 100644
index 000000000000..a0ceb34e9fb4
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform.json
@@ -0,0 +1,1668 @@
+{
+    "interfaces": {
+        "Ethernet1": {
+            "index": "0,0,0,0",
+            "lanes": "17,18,19,20",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth1"
+                ],
+                "2x200G[100G]": [
+                    "Eth1/1",
+                    "Eth1/2"
+                ]
+            }
+        },
+        "Ethernet5": {
+            "index": "1,1,1,1",
+            "lanes": "21,22,23,24",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth2"
+                ],
+                "2x200G[100G]": [
+                    "Eth2/1",
+                    "Eth2/2"
+                ]
+            }
+        },
+        "Ethernet9": {
+            "index": "2,2,2,2",
+            "lanes": "25,26,27,28",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth3"
+                ],
+                "2x200G[100G]": [
+                    "Eth3/1",
+                    "Eth3/2"
+                ]
+            }
+        },
+        "Ethernet13": {
+            "index": "3,3,3,3",
+            "lanes": "29,30,31,32",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth4"
+                ],
+                "2x200G[100G]": [
+                    "Eth4/1",
+                    "Eth4/2"
+                ]
+            }
+        },
+        "Ethernet17": {
+            "index": "4,4,4,4",
+            "lanes": "129,130,131,132",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth5"
+                ],
+                "2x200G[100G]": [
+                    "Eth5/1",
+                    "Eth5/2"
+                ]
+            }
+        },
+        "Ethernet21": {
+            "index": "5,5,5,5",
+            "lanes": "133,134,135,136",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth6"
+                ],
+                "2x200G[100G]": [
+                    "Eth6/1",
+                    "Eth6/2"
+                ]
+            }
+        },
+        "Ethernet25": {
+            "index": "6,6,6,6",
+            "lanes": "41,42,43,44",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth7"
+                ],
+                "2x200G[100G]": [
+                    "Eth7/1",
+                    "Eth7/2"
+                ]
+            }
+        },
+        "Ethernet29": {
+            "index": "7,7,7,7",
+            "lanes": "45,46,47,48",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth8"
+                ],
+                "2x200G[100G]": [
+                    "Eth8/1",
+                    "Eth8/2"
+                ]
+            }
+        },
+        "Ethernet33": {
+            "index": "8,8,8,8",
+            "lanes": "57,58,59,60",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth9"
+                ],
+                "2x200G[100G]": [
+                    "Eth9/1",
+                    "Eth9/2"
+                ]
+            }
+        },
+        "Ethernet37": {
+            "index": "9,9,9,9",
+            "lanes": "61,62,63,64",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth10"
+                ],
+                "2x200G[100G]": [
+                    "Eth10/1",
+                    "Eth10/2"
+                ]
+            }
+        },
+        "Ethernet41": {
+            "index": "10,10,10,10",
+            "lanes": "145,146,147,148",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth11"
+                ],
+                "2x200G[100G]": [
+                    "Eth11/1",
+                    "Eth11/2"
+                ]
+            }
+        },
+        "Ethernet45": {
+            "index": "11,11,11,11",
+            "lanes": "149,150,151,152",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth12"
+                ],
+                "2x200G[100G]": [
+                    "Eth12/1",
+                    "Eth12/2"
+                ]
+            }
+        },
+        "Ethernet49": {
+            "index": "12,12,12,12",
+            "lanes": "137,138,139,140",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth13"
+                ],
+                "2x200G[100G]": [
+                    "Eth13/1",
+                    "Eth13/2"
+                ]
+            }
+        },
+        "Ethernet53": {
+            "index": "13,13,13,13",
+            "lanes": "141,142,143,144",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth14"
+                ],
+                "2x200G[100G]": [
+                    "Eth14/1",
+                    "Eth14/2"
+                ]
+            }
+        },
+        "Ethernet57": {
+            "index": "14,14,14,14",
+            "lanes": "33,34,35,36",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth15"
+                ],
+                "2x200G[100G]": [
+                    "Eth15/1",
+                    "Eth15/2"
+                ]
+            }
+        },
+        "Ethernet61": {
+            "index": "15,15,15,15",
+            "lanes": "37,38,39,40",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth16"
+                ],
+                "2x200G[100G]": [
+                    "Eth16/1",
+                    "Eth16/2"
+                ]
+            }
+        },
+        "Ethernet65": {
+            "index": "16,16,16,16",
+            "lanes": "161,162,163,164",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth17"
+                ],
+                "2x200G[100G]": [
+                    "Eth17/1",
+                    "Eth17/2"
+                ]
+            }
+        },
+        "Ethernet69": {
+            "index": "17,17,17,17",
+            "lanes": "165,166,167,168",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth18"
+                ],
+                "2x200G[100G]": [
+                    "Eth18/1",
+                    "Eth18/2"
+                ]
+            }
+        },
+        "Ethernet73": {
+            "index": "18,18,18,18",
+            "lanes": "153,154,155,156",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth19"
+                ],
+                "2x200G[100G]": [
+                    "Eth19/1",
+                    "Eth19/2"
+                ]
+            }
+        },
+        "Ethernet77": {
+            "index": "19,19,19,19",
+            "lanes": "157,158,159,160",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth20"
+                ],
+                "2x200G[100G]": [
+                    "Eth20/1",
+                    "Eth20/2"
+                ]
+            }
+        },
+        "Ethernet81": {
+            "index": "20,20,20,20",
+            "lanes": "49,50,51,52",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth21"
+                ],
+                "2x200G[100G]": [
+                    "Eth21/1",
+                    "Eth21/2"
+                ]
+            }
+        },
+        "Ethernet85": {
+            "index": "21,21,21,21",
+            "lanes": "53,54,55,56",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth22"
+                ],
+                "2x200G[100G]": [
+                    "Eth22/1",
+                    "Eth22/2"
+                ]
+            }
+        },
+        "Ethernet89": {
+            "index": "22,22,22,22",
+            "lanes": "177,178,179,180",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth23"
+                ],
+                "2x200G[100G]": [
+                    "Eth23/1",
+                    "Eth23/2"
+                ]
+            }
+        },
+        "Ethernet93": {
+            "index": "23,23,23,23",
+            "lanes": "181,182,183,184",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth24"
+                ],
+                "2x200G[100G]": [
+                    "Eth24/1",
+                    "Eth24/2"
+                ]
+            }
+        },
+        "Ethernet97": {
+            "index": "24,24,24,24",
+            "lanes": "169,170,171,172",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth25"
+                ],
+                "2x200G[100G]": [
+                    "Eth25/1",
+                    "Eth25/2"
+                ]
+            }
+        },
+        "Ethernet101": {
+            "index": "25,25,25,25",
+            "lanes": "173,174,175,176",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth26"
+                ],
+                "2x200G[100G]": [
+                    "Eth26/1",
+                    "Eth26/2"
+                ]
+            }
+        },
+        "Ethernet105": {
+            "index": "26,26,26,26",
+            "lanes": "65,66,67,68",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth27"
+                ],
+                "2x200G[100G]": [
+                    "Eth27/1",
+                    "Eth27/2"
+                ]
+            }
+        },
+        "Ethernet109": {
+            "index": "27,27,27,27",
+            "lanes": "69,70,71,72",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth28"
+                ],
+                "2x200G[100G]": [
+                    "Eth28/1",
+                    "Eth28/2"
+                ]
+            }
+        },
+        "Ethernet113": {
+            "index": "28,28,28,28",
+            "lanes": "209,210,211,212",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth29"
+                ],
+                "2x200G[100G]": [
+                    "Eth29/1",
+                    "Eth29/2"
+                ]
+            }
+        },
+        "Ethernet117": {
+            "index": "29,29,29,29",
+            "lanes": "213,214,215,216",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth30"
+                ],
+                "2x200G[100G]": [
+                    "Eth30/1",
+                    "Eth30/2"
+                ]
+            }
+        },
+        "Ethernet121": {
+            "index": "30,30,30,30",
+            "lanes": "185,186,187,188",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth31"
+                ],
+                "2x200G[100G]": [
+                    "Eth31/1",
+                    "Eth31/2"
+                ]
+            }
+        },
+        "Ethernet125": {
+            "index": "31,31,31,31",
+            "lanes": "189,190,191,192",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth32"
+                ],
+                "2x200G[100G]": [
+                    "Eth32/1",
+                    "Eth32/2"
+                ]
+            }
+        },
+        "Ethernet129": {
+            "index": "32,32,32,32",
+            "lanes": "81,82,83,84",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth33"
+                ],
+                "2x200G[100G]": [
+                    "Eth33/1",
+                    "Eth33/2"
+                ]
+            }
+        },
+        "Ethernet133": {
+            "index": "33,33,33,33",
+            "lanes": "85,86,87,88",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth34"
+                ],
+                "2x200G[100G]": [
+                    "Eth34/1",
+                    "Eth34/2"
+                ]
+            }
+        },
+        "Ethernet137": {
+            "index": "34,34,34,34",
+            "lanes": "193,194,195,196",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth35"
+                ],
+                "2x200G[100G]": [
+                    "Eth35/1",
+                    "Eth35/2"
+                ]
+            }
+        },
+        "Ethernet141": {
+            "index": "35,35,35,35",
+            "lanes": "197,198,199,200",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth36"
+                ],
+                "2x200G[100G]": [
+                    "Eth36/1",
+                    "Eth36/2"
+                ]
+            }
+        },
+        "Ethernet145": {
+            "index": "36,36,36,36",
+            "lanes": "201,202,203,204",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth37"
+                ],
+                "2x200G[100G]": [
+                    "Eth37/1",
+                    "Eth37/2"
+                ]
+            }
+        },
+        "Ethernet149": {
+            "index": "37,37,37,37",
+            "lanes": "205,206,207,208",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth38"
+                ],
+                "2x200G[100G]": [
+                    "Eth38/1",
+                    "Eth38/2"
+                ]
+            }
+        },
+        "Ethernet153": {
+            "index": "38,38,38,38",
+            "lanes": "97,98,99,100",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth39"
+                ],
+                "2x200G[100G]": [
+                    "Eth39/1",
+                    "Eth39/2"
+                ]
+            }
+        },
+        "Ethernet157": {
+            "index": "39,39,39,39",
+            "lanes": "101,102,103,104",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth40"
+                ],
+                "2x200G[100G]": [
+                    "Eth40/1",
+                    "Eth40/2"
+                ]
+            }
+        },
+        "Ethernet161": {
+            "index": "40,40,40,40",
+            "lanes": "121,122,123,124",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth41"
+                ],
+                "2x200G[100G]": [
+                    "Eth41/1",
+                    "Eth41/2"
+                ]
+            }
+        },
+        "Ethernet165": {
+            "index": "41,41,41,41",
+            "lanes": "125,126,127,128",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth42"
+                ],
+                "2x200G[100G]": [
+                    "Eth42/1",
+                    "Eth42/2"
+                ]
+            }
+        },
+        "Ethernet169": {
+            "index": "42,42,42,42",
+            "lanes": "217,218,219,220",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth43"
+                ],
+                "2x200G[100G]": [
+                    "Eth43/1",
+                    "Eth43/2"
+                ]
+            }
+        },
+        "Ethernet173": {
+            "index": "43,43,43,43",
+            "lanes": "221,222,223,224",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth44"
+                ],
+                "2x200G[100G]": [
+                    "Eth44/1",
+                    "Eth44/2"
+                ]
+            }
+        },
+        "Ethernet177": {
+            "index": "44,44,44,44",
+            "lanes": "113,114,115,116",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth45"
+                ],
+                "2x200G[100G]": [
+                    "Eth45/1",
+                    "Eth45/2"
+                ]
+            }
+        },
+        "Ethernet181": {
+            "index": "45,45,45,45",
+            "lanes": "117,118,119,120",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth46"
+                ],
+                "2x200G[100G]": [
+                    "Eth46/1",
+                    "Eth46/2"
+                ]
+            }
+        },
+        "Ethernet185": {
+            "index": "46,46,46,46",
+            "lanes": "105,106,107,108",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth47"
+                ],
+                "2x200G[100G]": [
+                    "Eth47/1",
+                    "Eth47/2"
+                ]
+            }
+        },
+        "Ethernet189": {
+            "index": "47,47,47,47",
+            "lanes": "109,110,111,112",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth48"
+                ],
+                "2x200G[100G]": [
+                    "Eth48/1",
+                    "Eth48/2"
+                ]
+            }
+        },
+        "Ethernet193": {
+            "index": "48,48,48,48",
+            "lanes": "225,226,227,228",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth49"
+                ],
+                "2x200G[100G]": [
+                    "Eth49/1",
+                    "Eth49/2"
+                ]
+            }
+        },
+        "Ethernet197": {
+            "index": "49,49,49,49",
+            "lanes": "229,230,231,232",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth50"
+                ],
+                "2x200G[100G]": [
+                    "Eth50/1",
+                    "Eth50/2"
+                ]
+            }
+        },
+        "Ethernet201": {
+            "index": "50,50,50,50",
+            "lanes": "233,234,235,236",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth51"
+                ],
+                "2x200G[100G]": [
+                    "Eth51/1",
+                    "Eth51/2"
+                ]
+            }
+        },
+        "Ethernet205": {
+            "index": "51,51,51,51",
+            "lanes": "237,238,239,240",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth52"
+                ],
+                "2x200G[100G]": [
+                    "Eth52/1",
+                    "Eth52/2"
+                ]
+            }
+        },
+        "Ethernet209": {
+            "index": "52,52,52,52",
+            "lanes": "89,90,91,92",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth53"
+                ],
+                "2x200G[100G]": [
+                    "Eth53/1",
+                    "Eth53/2"
+                ]
+            }
+        },
+        "Ethernet213": {
+            "index": "53,53,53,53",
+            "lanes": "93,94,95,96",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth54"
+                ],
+                "2x200G[100G]": [
+                    "Eth54/1",
+                    "Eth54/2"
+                ]
+            }
+        },
+        "Ethernet217": {
+            "index": "54,54,54,54",
+            "lanes": "241,242,243,244",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth55"
+                ],
+                "2x200G[100G]": [
+                    "Eth55/1",
+                    "Eth55/2"
+                ]
+            }
+        },
+        "Ethernet221": {
+            "index": "55,55,55,55",
+            "lanes": "245,246,247,248",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth56"
+                ],
+                "2x200G[100G]": [
+                    "Eth56/1",
+                    "Eth56/2"
+                ]
+            }
+        },
+        "Ethernet225": {
+            "index": "56,56,56,56",
+            "lanes": "249,250,251,252",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth57"
+                ],
+                "2x200G[100G]": [
+                    "Eth57/1",
+                    "Eth57/2"
+                ]
+            }
+        },
+        "Ethernet229": {
+            "index": "57,57,57,57",
+            "lanes": "253,254,255,256",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth58"
+                ],
+                "2x200G[100G]": [
+                    "Eth58/1",
+                    "Eth58/2"
+                ]
+            }
+        },
+        "Ethernet233": {
+            "index": "58,58,58,58",
+            "lanes": "73,74,75,76",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth59"
+                ],
+                "2x200G[100G]": [
+                    "Eth59/1",
+                    "Eth59/2"
+                ]
+            }
+        },
+        "Ethernet237": {
+            "index": "59,59,59,59",
+            "lanes": "77,78,79,80",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth60"
+                ],
+                "2x200G[100G]": [
+                    "Eth60/1",
+                    "Eth60/2"
+                ]
+            }
+        },
+        "Ethernet241": {
+            "index": "60,60,60,60",
+            "lanes": "257,258,259,260",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth61"
+                ],
+                "2x200G[100G]": [
+                    "Eth61/1",
+                    "Eth61/2"
+                ]
+            }
+        },
+        "Ethernet245": {
+            "index": "61,61,61,61",
+            "lanes": "261,262,263,264",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth62"
+                ],
+                "2x200G[100G]": [
+                    "Eth62/1",
+                    "Eth62/2"
+                ]
+            }
+        },
+        "Ethernet249": {
+            "index": "62,62,62,62",
+            "lanes": "265,266,267,268",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth63"
+                ],
+                "2x200G[100G]": [
+                    "Eth63/1",
+                    "Eth63/2"
+                ]
+            }
+        },
+        "Ethernet253": {
+            "index": "63,63,63,63",
+            "lanes": "269,270,271,272",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth64"
+                ],
+                "2x200G[100G]": [
+                    "Eth64/1",
+                    "Eth64/2"
+                ]
+            }
+        },
+        "Ethernet257": {
+            "index": "64,64,64,64",
+            "lanes": "433,434,435,436",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth65"
+                ],
+                "2x200G[100G]": [
+                    "Eth65/1",
+                    "Eth65/2"
+                ]
+            }
+        },
+        "Ethernet261": {
+            "index": "65,65,65,65",
+            "lanes": "437,438,439,440",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth66"
+                ],
+                "2x200G[100G]": [
+                    "Eth66/1",
+                    "Eth66/2"
+                ]
+            }
+        },
+        "Ethernet265": {
+            "index": "66,66,66,66",
+            "lanes": "273,274,275,276",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth67"
+                ],
+                "2x200G[100G]": [
+                    "Eth67/1",
+                    "Eth67/2"
+                ]
+            }
+        },
+        "Ethernet269": {
+            "index": "67,67,67,67",
+            "lanes": "277,278,279,280",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth68"
+                ],
+                "2x200G[100G]": [
+                    "Eth68/1",
+                    "Eth68/2"
+                ]
+            }
+        },
+        "Ethernet273": {
+            "index": "68,68,68,68",
+            "lanes": "281,282,283,284",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth69"
+                ],
+                "2x200G[100G]": [
+                    "Eth69/1",
+                    "Eth69/2"
+                ]
+            }
+        },
+        "Ethernet277": {
+            "index": "69,69,69,69",
+            "lanes": "285,286,287,288",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth70"
+                ],
+                "2x200G[100G]": [
+                    "Eth70/1",
+                    "Eth70/2"
+                ]
+            }
+        },
+        "Ethernet281": {
+            "index": "70,70,70,70",
+            "lanes": "417,418,419,420",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth71"
+                ],
+                "2x200G[100G]": [
+                    "Eth71/1",
+                    "Eth71/2"
+                ]
+            }
+        },
+        "Ethernet285": {
+            "index": "71,71,71,71",
+            "lanes": "421,422,423,424",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth72"
+                ],
+                "2x200G[100G]": [
+                    "Eth72/1",
+                    "Eth72/2"
+                ]
+            }
+        },
+        "Ethernet289": {
+            "index": "72,72,72,72",
+            "lanes": "393,394,395,396",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth73"
+                ],
+                "2x200G[100G]": [
+                    "Eth73/1",
+                    "Eth73/2"
+                ]
+            }
+        },
+        "Ethernet293": {
+            "index": "73,73,73,73",
+            "lanes": "397,398,399,400",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth74"
+                ],
+                "2x200G[100G]": [
+                    "Eth74/1",
+                    "Eth74/2"
+                ]
+            }
+        },
+        "Ethernet297": {
+            "index": "74,74,74,74",
+            "lanes": "289,290,291,292",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth75"
+                ],
+                "2x200G[100G]": [
+                    "Eth75/1",
+                    "Eth75/2"
+                ]
+            }
+        },
+        "Ethernet301": {
+            "index": "75,75,75,75",
+            "lanes": "293,294,295,296",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth76"
+                ],
+                "2x200G[100G]": [
+                    "Eth76/1",
+                    "Eth76/2"
+                ]
+            }
+        },
+        "Ethernet305": {
+            "index": "76,76,76,76",
+            "lanes": "401,402,403,404",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth77"
+                ],
+                "2x200G[100G]": [
+                    "Eth77/1",
+                    "Eth77/2"
+                ]
+            }
+        },
+        "Ethernet309": {
+            "index": "77,77,77,77",
+            "lanes": "405,406,407,408",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth78"
+                ],
+                "2x200G[100G]": [
+                    "Eth78/1",
+                    "Eth78/2"
+                ]
+            }
+        },
+        "Ethernet313": {
+            "index": "78,78,78,78",
+            "lanes": "409,410,411,412",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth79"
+                ],
+                "2x200G[100G]": [
+                    "Eth79/1",
+                    "Eth79/2"
+                ]
+            }
+        },
+        "Ethernet317": {
+            "index": "79,79,79,79",
+            "lanes": "413,414,415,416",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth80"
+                ],
+                "2x200G[100G]": [
+                    "Eth80/1",
+                    "Eth80/2"
+                ]
+            }
+        },
+        "Ethernet321": {
+            "index": "80,80,80,80",
+            "lanes": "305,306,307,308",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth81"
+                ],
+                "2x200G[100G]": [
+                    "Eth81/1",
+                    "Eth81/2"
+                ]
+            }
+        },
+        "Ethernet325": {
+            "index": "81,81,81,81",
+            "lanes": "309,310,311,312",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth82"
+                ],
+                "2x200G[100G]": [
+                    "Eth82/1",
+                    "Eth82/2"
+                ]
+            }
+        },
+        "Ethernet329": {
+            "index": "82,82,82,82",
+            "lanes": "385,386,387,388",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth83"
+                ],
+                "2x200G[100G]": [
+                    "Eth83/1",
+                    "Eth83/2"
+                ]
+            }
+        },
+        "Ethernet333": {
+            "index": "83,83,83,83",
+            "lanes": "389,390,391,392",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth84"
+                ],
+                "2x200G[100G]": [
+                    "Eth84/1",
+                    "Eth84/2"
+                ]
+            }
+        },
+        "Ethernet337": {
+            "index": "84,84,84,84",
+            "lanes": "425,426,427,428",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth85"
+                ],
+                "2x200G[100G]": [
+                    "Eth85/1",
+                    "Eth85/2"
+                ]
+            }
+        },
+        "Ethernet341": {
+            "index": "85,85,85,85",
+            "lanes": "429,430,431,432",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth86"
+                ],
+                "2x200G[100G]": [
+                    "Eth86/1",
+                    "Eth86/2"
+                ]
+            }
+        },
+        "Ethernet345": {
+            "index": "86,86,86,86",
+            "lanes": "321,322,323,324",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth87"
+                ],
+                "2x200G[100G]": [
+                    "Eth87/1",
+                    "Eth87/2"
+                ]
+            }
+        },
+        "Ethernet349": {
+            "index": "87,87,87,87",
+            "lanes": "325,326,327,328",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth88"
+                ],
+                "2x200G[100G]": [
+                    "Eth88/1",
+                    "Eth88/2"
+                ]
+            }
+        },
+        "Ethernet353": {
+            "index": "88,88,88,88",
+            "lanes": "313,314,315,316",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth89"
+                ],
+                "2x200G[100G]": [
+                    "Eth89/1",
+                    "Eth89/2"
+                ]
+            }
+        },
+        "Ethernet357": {
+            "index": "89,89,89,89",
+            "lanes": "317,318,319,320",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth90"
+                ],
+                "2x200G[100G]": [
+                    "Eth90/1",
+                    "Eth90/2"
+                ]
+            }
+        },
+        "Ethernet361": {
+            "index": "90,90,90,90",
+            "lanes": "441,442,443,444",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth91"
+                ],
+                "2x200G[100G]": [
+                    "Eth91/1",
+                    "Eth91/2"
+                ]
+            }
+        },
+        "Ethernet365": {
+            "index": "91,91,91,91",
+            "lanes": "445,446,447,448",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth92"
+                ],
+                "2x200G[100G]": [
+                    "Eth92/1",
+                    "Eth92/2"
+                ]
+            }
+        },
+        "Ethernet369": {
+            "index": "92,92,92,92",
+            "lanes": "337,338,339,340",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth93"
+                ],
+                "2x200G[100G]": [
+                    "Eth93/1",
+                    "Eth93/2"
+                ]
+            }
+        },
+        "Ethernet373": {
+            "index": "93,93,93,93",
+            "lanes": "341,342,343,344",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth94"
+                ],
+                "2x200G[100G]": [
+                    "Eth94/1",
+                    "Eth94/2"
+                ]
+            }
+        },
+        "Ethernet377": {
+            "index": "94,94,94,94",
+            "lanes": "297,298,299,300",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth95"
+                ],
+                "2x200G[100G]": [
+                    "Eth95/1",
+                    "Eth95/2"
+                ]
+            }
+        },
+        "Ethernet381": {
+            "index": "95,95,95,95",
+            "lanes": "301,302,303,304",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth96"
+                ],
+                "2x200G[100G]": [
+                    "Eth96/1",
+                    "Eth96/2"
+                ]
+            }
+        },
+        "Ethernet385": {
+            "index": "96,96,96,96",
+            "lanes": "457,458,459,460",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth97"
+                ],
+                "2x200G[100G]": [
+                    "Eth97/1",
+                    "Eth97/2"
+                ]
+            }
+        },
+        "Ethernet389": {
+            "index": "97,97,97,97",
+            "lanes": "461,462,463,464",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth98"
+                ],
+                "2x200G[100G]": [
+                    "Eth98/1",
+                    "Eth98/2"
+                ]
+            }
+        },
+        "Ethernet393": {
+            "index": "98,98,98,98",
+            "lanes": "353,354,355,356",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth99"
+                ],
+                "2x200G[100G]": [
+                    "Eth99/1",
+                    "Eth99/2"
+                ]
+            }
+        },
+        "Ethernet397": {
+            "index": "99,99,99,99",
+            "lanes": "357,358,359,360",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth100"
+                ],
+                "2x200G[100G]": [
+                    "Eth100/1",
+                    "Eth100/2"
+                ]
+            }
+        },
+        "Ethernet401": {
+            "index": "100,100,100,100",
+            "lanes": "329,330,331,332",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth101"
+                ],
+                "2x200G[100G]": [
+                    "Eth101/1",
+                    "Eth101/2"
+                ]
+            }
+        },
+        "Ethernet405": {
+            "index": "101,101,101,101",
+            "lanes": "333,334,335,336",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth102"
+                ],
+                "2x200G[100G]": [
+                    "Eth102/1",
+                    "Eth102/2"
+                ]
+            }
+        },
+        "Ethernet409": {
+            "index": "102,102,102,102",
+            "lanes": "473,474,475,476",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth103"
+                ],
+                "2x200G[100G]": [
+                    "Eth103/1",
+                    "Eth103/2"
+                ]
+            }
+        },
+        "Ethernet413": {
+            "index": "103,103,103,103",
+            "lanes": "477,478,479,480",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth104"
+                ],
+                "2x200G[100G]": [
+                    "Eth104/1",
+                    "Eth104/2"
+                ]
+            }
+        },
+        "Ethernet417": {
+            "index": "104,104,104,104",
+            "lanes": "369,370,371,372",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth105"
+                ],
+                "2x200G[100G]": [
+                    "Eth105/1",
+                    "Eth105/2"
+                ]
+            }
+        },
+        "Ethernet421": {
+            "index": "105,105,105,105",
+            "lanes": "373,374,375,376",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth106"
+                ],
+                "2x200G[100G]": [
+                    "Eth106/1",
+                    "Eth106/2"
+                ]
+            }
+        },
+        "Ethernet425": {
+            "index": "106,106,106,106",
+            "lanes": "345,346,347,348",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth107"
+                ],
+                "2x200G[100G]": [
+                    "Eth107/1",
+                    "Eth107/2"
+                ]
+            }
+        },
+        "Ethernet429": {
+            "index": "107,107,107,107",
+            "lanes": "349,350,351,352",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth108"
+                ],
+                "2x200G[100G]": [
+                    "Eth108/1",
+                    "Eth108/2"
+                ]
+            }
+        },
+        "Ethernet433": {
+            "index": "108,108,108,108",
+            "lanes": "449,450,451,452",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth109"
+                ],
+                "2x200G[100G]": [
+                    "Eth109/1",
+                    "Eth109/2"
+                ]
+            }
+        },
+        "Ethernet437": {
+            "index": "109,109,109,109",
+            "lanes": "453,454,455,456",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth110"
+                ],
+                "2x200G[100G]": [
+                    "Eth110/1",
+                    "Eth110/2"
+                ]
+            }
+        },
+        "Ethernet441": {
+            "index": "110,110,110,110",
+            "lanes": "465,466,467,468",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth111"
+                ],
+                "2x200G[100G]": [
+                    "Eth111/1",
+                    "Eth111/2"
+                ]
+            }
+        },
+        "Ethernet445": {
+            "index": "111,111,111,111",
+            "lanes": "469,470,471,472",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth112"
+                ],
+                "2x200G[100G]": [
+                    "Eth112/1",
+                    "Eth112/2"
+                ]
+            }
+        },
+        "Ethernet449": {
+            "index": "112,112,112,112",
+            "lanes": "361,362,363,364",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth113"
+                ],
+                "2x200G[100G]": [
+                    "Eth113/1",
+                    "Eth113/2"
+                ]
+            }
+        },
+        "Ethernet453": {
+            "index": "113,113,113,113",
+            "lanes": "365,366,367,368",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth114"
+                ],
+                "2x200G[100G]": [
+                    "Eth114/1",
+                    "Eth114/2"
+                ]
+            }
+        },
+        "Ethernet457": {
+            "index": "114,114,114,114",
+            "lanes": "489,490,491,492",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth115"
+                ],
+                "2x200G[100G]": [
+                    "Eth115/1",
+                    "Eth115/2"
+                ]
+            }
+        },
+        "Ethernet461": {
+            "index": "115,115,115,115",
+            "lanes": "493,494,495,496",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth116"
+                ],
+                "2x200G[100G]": [
+                    "Eth116/1",
+                    "Eth116/2"
+                ]
+            }
+        },
+        "Ethernet465": {
+            "index": "116,116,116,116",
+            "lanes": "481,482,483,484",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth117"
+                ],
+                "2x200G[100G]": [
+                    "Eth117/1",
+                    "Eth117/2"
+                ]
+            }
+        },
+        "Ethernet469": {
+            "index": "117,117,117,117",
+            "lanes": "485,486,487,488",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth118"
+                ],
+                "2x200G[100G]": [
+                    "Eth118/1",
+                    "Eth118/2"
+                ]
+            }
+        },
+        "Ethernet473": {
+            "index": "118,118,118,118",
+            "lanes": "377,378,379,380",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth119"
+                ],
+                "2x200G[100G]": [
+                    "Eth119/1",
+                    "Eth119/2"
+                ]
+            }
+        },
+        "Ethernet477": {
+            "index": "119,119,119,119",
+            "lanes": "381,382,383,384",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth120"
+                ],
+                "2x200G[100G]": [
+                    "Eth120/1",
+                    "Eth120/2"
+                ]
+            }
+        },
+        "Ethernet481": {
+            "index": "120,120,120,120",
+            "lanes": "505,506,507,508",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth121"
+                ],
+                "2x200G[100G]": [
+                    "Eth121/1",
+                    "Eth121/2"
+                ]
+            }
+        },
+        "Ethernet485": {
+            "index": "121,121,121,121",
+            "lanes": "509,510,511,512",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth122"
+                ],
+                "2x200G[100G]": [
+                    "Eth122/1",
+                    "Eth122/2"
+                ]
+            }
+        },
+        "Ethernet489": {
+            "index": "122,122,122,122",
+            "lanes": "497,498,499,500",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth123"
+                ],
+                "2x200G[100G]": [
+                    "Eth123/1",
+                    "Eth123/2"
+                ]
+            }
+        },
+        "Ethernet493": {
+            "index": "123,123,123,123",
+            "lanes": "501,502,503,504",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth124"
+                ],
+                "2x200G[100G]": [
+                    "Eth124/1",
+                    "Eth124/2"
+                ]
+            }
+        },
+        "Ethernet497": {
+            "index": "124,124,124,124",
+            "lanes": "9,10,11,12",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth125"
+                ],
+                "2x200G[100G]": [
+                    "Eth125/1",
+                    "Eth125/2"
+                ]
+            }
+        },
+        "Ethernet501": {
+            "index": "125,125,125,125",
+            "lanes": "13,14,15,16",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth126"
+                ],
+                "2x200G[100G]": [
+                    "Eth126/1",
+                    "Eth126/2"
+                ]
+            }
+        },
+        "Ethernet505": {
+            "index": "126,126,126,126",
+            "lanes": "1,2,3,4",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth127"
+                ],
+                "2x200G[100G]": [
+                    "Eth127/1",
+                    "Eth127/2"
+                ]
+            }
+        },
+        "Ethernet509": {
+            "index": "127,127,127,127",
+            "lanes": "5,6,7,8",
+            "breakout_modes": {
+                "1x400G": [
+                    "Eth128"
+                ],
+                "2x200G[100G]": [
+                    "Eth128/1",
+                    "Eth128/2"
+                ]
+            }
+        }
+    }
+}
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_asic b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_asic
new file mode 100644
index 000000000000..960467652765
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_components.json
new file mode 100644
index 000000000000..fa52c3a1bbb9
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_components.json
@@ -0,0 +1,20 @@
+{
+    "chassis": {
+        "M2-W6940-128QC": {
+            "component": {
+                "BASE_CPLD": { },
+                "FAN_CPLD": { },
+                "CPU_CPLD": { },
+                "MISC_CPLD": { },
+                "MAC_CPLDA": { },
+                "MAC_CPLDB": { },
+                "LC_CPLD": { },
+                "MAC FPGA": { },
+                "BIOS": { },
+                "BMC": { },
+                "ALTBMC": { }
+            }
+        }
+    }
+}
+
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_env.conf b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_env.conf
new file mode 100644
index 000000000000..fc119184d5c1
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/platform_env.conf
@@ -0,0 +1,2 @@
+is_ltsw_chip=1
+SYNCD_SHM_SIZE=1g
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6940-128qc-r0/plugins/sfputil.py
new file mode 100644
index 000000000000..e3d6bb82e069
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/plugins/sfputil.py
@@ -0,0 +1,363 @@
+# sfputil.py
+#
+# Platform-specific SFP transceiver interface for SONiC
+#
+
+try:
+    import time
+    import re
+    import os
+    import threading
+    import traceback
+    import subprocess
+    from ctypes import create_string_buffer
+    from sonic_sfp.sfputilbase import SfpUtilBase
+    from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom
+except ImportError as e:
+    raise ImportError("%s - required module not found" % str(e))
+
+class SfpUtil(SfpUtilBase):
+    """Platform-specific SfpUtil class"""
+
+    PORT_START = 0
+    PORT_END = 127
+    PORTS_IN_BLOCK = 128
+
+    EEPROM_OFFSET = 25
+    SFP_DEVICE_TYPE = "optoe2"
+    QSFP_DEVICE_TYPE = "optoe1"
+    QSFP_DD_DEVICE_TYPE = "optoe3"
+    I2C_MAX_ATTEMPT = 3
+
+    OPTOE_TYPE1 = 1
+    OPTOE_TYPE2 = 2
+    OPTOE_TYPE3 = 3
+
+    SFP_STATUS_INSERTED = '1'
+    SFP_STATUS_REMOVED = '0'
+
+    _port_to_eeprom_mapping = {}
+    port_to_i2cbus_mapping ={}
+    port_dict = {}
+
+    qsfp_ports_list = []
+    qsfp_dd_ports_list = []
+
+    @property
+    def port_start(self):
+        return self.PORT_START
+
+    @property
+    def port_end(self):
+        return self.PORT_END
+
+    @property
+    def qsfp_ports(self):
+        return self.qsfp_ports_list
+
+    @property
+    def qsfp_dd_ports(self):
+        return self.qsfp_dd_ports_list
+
+    @property
+    def port_to_eeprom_mapping(self):
+        return self._port_to_eeprom_mapping
+
+    def __init__(self):
+        self.qsfp_ports_list = []
+        self.qsfp_dd_ports_list = []
+        for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+            self.port_to_i2cbus_mapping[x] = (x + self.EEPROM_OFFSET)
+            if self.get_presence(x):
+                self.port_dict[x] = self.SFP_STATUS_INSERTED
+            else:
+                self.port_dict[x] = self.SFP_STATUS_REMOVED
+
+            if (self.check_is_qsfpdd(x)):
+                self.qsfp_dd_ports_list.append(x)
+                self.check_optoe_type(x, self.OPTOE_TYPE3)
+            else:
+                self.qsfp_ports_list.append(x)
+                self.check_optoe_type(x, self.OPTOE_TYPE1)
+        SfpUtilBase.__init__(self)
+
+    def _sfp_read_file_path(self, file_path, offset, num_bytes):
+        attempts = 0
+        while attempts < self.I2C_MAX_ATTEMPT:
+            try:
+                file_path.seek(offset)
+                read_buf = file_path.read(num_bytes)
+            except:
+                attempts += 1
+                time.sleep(0.05)
+            else:
+                return True, read_buf
+        return False, None
+
+    def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset):
+        """Tries to read the eeprom file to determine if the
+        device/sfp is present or not. If sfp present, the read returns
+        valid bytes. If not, read returns error 'Connection timed out"""
+
+        if not os.path.exists(sysfs_sfp_i2c_client_eeprompath):
+            return False
+        else:
+            with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile:
+                rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1)
+                return rv
+
+    def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype):
+        try:
+            sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path
+
+            # Write device address to new_device file
+            nd_file = open(sysfs_nd_path, "w")
+            nd_str = "%s %s" % (devtype, hex(devaddr))
+            nd_file.write(nd_str)
+            nd_file.close()
+
+        except Exception as err:
+            print("Error writing to new device file: %s" % str(err))
+            return 1
+        else:
+            return 0
+
+    def _get_port_eeprom_path(self, port_num, devid):
+        sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+        if port_num in self.port_to_eeprom_mapping.keys():
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num]
+        else:
+            sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+            i2c_adapter_id = self._get_port_i2c_adapter_id(port_num)
+            if i2c_adapter_id is None:
+                print("Error getting i2c bus num")
+                return None
+
+            # Get i2c virtual bus path for the sfp
+            sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path,
+                                                        str(i2c_adapter_id))
+
+            # If i2c bus for port does not exist
+            if not os.path.exists(sysfs_sfp_i2c_adapter_path):
+                print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path)
+                return None
+
+            sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path,
+                                                        str(i2c_adapter_id),
+                                                        hex(devid)[-2:])
+
+            # If sfp device is not present on bus, Add it
+            if not os.path.exists(sysfs_sfp_i2c_client_path):
+                if port_num in self.qsfp_dd_ports:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DD_DEVICE_TYPE)
+                elif  port_num in self.qsfp_ports:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE)
+                else:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE)
+                if ret != 0:
+                    print("Error adding sfp device")
+                    return None
+
+            sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path
+
+        return sysfs_sfp_i2c_client_eeprom_path
+
+    def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes):
+        eeprom_raw = []
+        for i in range(0, num_bytes):
+            eeprom_raw.append("0x00")
+
+        rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes)
+        if rv == False:
+            return None
+
+        try:
+            for n in range(0, num_bytes):
+                eeprom_raw[n] = hex(raw[n])[2:].zfill(2)
+        except:
+            return None
+
+        return eeprom_raw
+
+    def get_eeprom_dom_raw(self, port_num):
+        if port_num in self.qsfp_ports:
+            # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw
+            return None
+        else:
+            # Read dom eeprom at addr 0x51
+            return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256)
+
+    def get_presence(self, port_num):
+        # Check for invalid port_num
+        if port_num < self.port_start or port_num > self.port_end:
+            return False
+        cmd = "cat /sys/wb_plat/sff/sff{}/present".format(str(port_num+1))
+        ret, output = subprocess.getstatusoutput(cmd)
+        if ret != 0:
+            return False
+        if output == "1":
+            return True
+        return False
+
+    def check_is_qsfpdd(self, port_num):
+        try:
+            if self.get_presence(port_num) == False:
+                return False
+
+            eeprom_path = self._get_port_eeprom_path(port_num, 0x50)
+            with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+                eeprom_raw = self._read_eeprom_specific_bytes(eeprom, 0, 1)
+                # according to sff-8024 A0h Byte 0 is '1e' or '18' means the transceiver is qsfpdd
+                if (eeprom_raw[0] == '1e' or eeprom_raw[0] == '18'):
+                    return True
+        except Exception as e:
+            print(traceback.format_exc())
+
+        return False
+
+    def check_optoe_type(self, port_num, optoe_type):
+        if self.get_presence(port_num) == False:
+            return True
+        try:
+            eeprom_path = self._get_port_eeprom_path(port_num, 0x50)
+            dev_class_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/dev_class'
+            i2c_path = dev_class_path.format(str(self.port_to_i2cbus_mapping[port_num]))
+            cmd = "cat " + i2c_path
+            ret, output = subprocess.getstatusoutput(cmd)
+            if ret != 0:
+                print("cmd: %s execution fail, output:%s" % (cmd, output))
+                return False
+            if int(output) != optoe_type:
+                cmd = "echo " + str(optoe_type) + " > " + i2c_path
+                ret, output = subprocess.getstatusoutput(cmd)
+                if ret != 0:
+                    print("cmd: %s execution fail, output:%s" % (cmd, output))
+                    return False
+            return True
+
+        except Exception as e:
+            print(traceback.format_exc())
+            return False
+
+    def get_low_power_mode(self, port_num):
+        # Check for invalid port_num
+
+        return True
+
+    def set_low_power_mode(self, port_num, lpmode):
+        # Check for invalid port_num
+
+        return True
+
+    def reset(self, port_num):
+        # Check for invalid port_num
+        if port_num < self.port_start or port_num > self.port_end:
+            return False
+
+        return True
+
+    def get_transceiver_change_event(self, timeout=0):
+
+        start_time = time.time()
+        current_port_dict = {}
+        forever = False
+
+        if timeout == 0:
+            forever = True
+        elif timeout > 0:
+            timeout = timeout / float(1000) # Convert to secs
+        else:
+            print ("get_transceiver_change_event:Invalid timeout value", timeout)
+            return False, {}
+
+        end_time = start_time + timeout
+        if start_time > end_time:
+            print ('get_transceiver_change_event:' \
+                       'time wrap / invalid timeout value', timeout)
+
+            return False, {} # Time wrap or possibly incorrect timeout
+
+        while timeout >= 0:
+            # Check for OIR events and return updated port_dict
+            for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+                if self.get_presence(x):
+                    current_port_dict[x] = self.SFP_STATUS_INSERTED
+                else:
+                    current_port_dict[x] = self.SFP_STATUS_REMOVED
+            if (current_port_dict == self.port_dict):
+                if forever:
+                    time.sleep(1)
+                else:
+                    timeout = end_time - time.time()
+                    if timeout >= 1:
+                        time.sleep(1) # We poll at 1 second granularity
+                    else:
+                        if timeout > 0:
+                            time.sleep(timeout)
+                        return True, {}
+            else:
+                # Update reg value
+                self.port_dict = current_port_dict
+                return True, self.port_dict
+        print ("get_transceiver_change_event: Should not reach here.")
+        return False, {}
+
+    def get_highest_temperature(self):
+        offset = 0
+        hightest_temperature = -9999
+
+        presence_flag = False
+        read_eeprom_flag = False
+        temperature_valid_flag = False
+
+        for port in range(self.PORT_START, self.PORTS_IN_BLOCK):
+            if self.get_presence(port) == False:
+                continue
+
+            presence_flag = True
+
+            if port in self.qsfp_dd_ports:
+                offset = 14
+            elif port in self.qsfp_ports:
+                offset = 22
+            else:
+                offset = 96
+
+            eeprom_path = self._get_port_eeprom_path(port, 0x50)
+            try:
+                with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+                    read_eeprom_flag = True
+                    eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2)
+                    if len(eeprom_raw) != 0:
+                        msb = int(eeprom_raw[0], 16)
+                        lsb = int(eeprom_raw[1], 16)
+
+                        result = (msb << 8) | (lsb & 0xff)
+                        result = float(result / 256.0)
+                        if -50 <= result <= 200:
+                            temperature_valid_flag = True
+                            if hightest_temperature < result:
+                                hightest_temperature = result
+            except Exception as e:
+                pass
+
+        # all port not presence
+        if presence_flag == False:
+            hightest_temperature = -10000
+
+        # all port read eeprom fail
+        elif read_eeprom_flag == False:
+            hightest_temperature = -9999
+
+        # all port temperature invalid
+        elif read_eeprom_flag == True and temperature_valid_flag == False:
+            hightest_temperature = -10000
+
+        hightest_temperature = round(hightest_temperature, 2)
+
+        return hightest_temperature
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6940-128qc-r0/plugins/ssd_util.py
new file mode 100755
index 000000000000..e8cf2e1a7cbc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/plugins/ssd_util.py
@@ -0,0 +1,318 @@
+#
+# ssd_util.py
+#
+# Generic implementation of the SSD health API
+# SSD models supported:
+#  - InnoDisk
+#  - StorFly
+#  - Virtium
+
+try:
+    import re
+    import os
+    import subprocess
+    from sonic_platform_base.sonic_storage.storage_base import StorageBase
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+SMARTCTL = "smartctl {} -a"
+INNODISK = "iSmart -d {}"
+VIRTIUM  = "SmartCmd -m {}"
+DISK_LIST_CMD = "fdisk -l -o Device"
+DISK_FREE_CMD = "df -h"
+MOUNT_CMD = "mount"
+
+NOT_AVAILABLE = "N/A"
+PE_CYCLE = 3000
+FAIL_PERCENT = 95
+
+# Set Vendor Specific IDs
+INNODISK_HEALTH_ID = 169
+INNODISK_TEMPERATURE_ID = 194
+
+class SsdUtil(StorageBase):
+    """
+    Generic implementation of the SSD health API
+    """
+    model = NOT_AVAILABLE
+    serial = NOT_AVAILABLE
+    firmware = NOT_AVAILABLE
+    temperature = NOT_AVAILABLE
+    health = NOT_AVAILABLE
+    remaining_life = NOT_AVAILABLE
+    sata_rate = NOT_AVAILABLE
+    ssd_info = NOT_AVAILABLE
+    vendor_ssd_info = NOT_AVAILABLE
+
+    def __init__(self, diskdev):
+        self.vendor_ssd_utility = {
+            "Generic"  : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info },
+            "InnoDisk" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+            "M.2"      : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+            "StorFly"  : { "utility" : VIRTIUM,  "parser" : self.parse_virtium_info },
+            "Virtium"  : { "utility" : VIRTIUM,  "parser" : self.parse_virtium_info }
+        }
+
+        """
+        The dict model_attr keys relate the vendors
+        LITEON : "ER2-GD","AF2MA31DTDLT"
+        Intel  : "SSDSCKKB"
+        SMI    : "SM619GXC"
+        samsung: "MZNLH"
+        ADATA  : "IM2S3134N"
+        """
+        self.model_attr = {
+             "ER2-GD"       : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+             "AF2MA31DTDLT" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+             "SSDSCK"       : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n233\s+(.+?)\n" },
+             "SM619GXC"     : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n169\s+(.+?)\n" },
+             "MZNLH"        : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n245\s+(.+?)\n" },
+             "IM2S3134N"    : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n231\s+(.+?)\n" },
+             "MTFDDAV240TCB-1AR1ZABAA"    : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }
+        }
+
+        self.key_list = list(self.model_attr.keys())
+        self.attr_info_rule = "[\s\S]*SMART Attributes Data Structure revision number: 1|SMART Error Log Version[\s\S]*"
+        self.dev = diskdev
+        # Generic part
+        self.fetch_generic_ssd_info(diskdev)
+        self.parse_generic_ssd_info()
+        self.fetch_vendor_ssd_info(diskdev, "Generic")
+        
+        # Known vendor part
+        if self.model:
+            model_short = self.model.split()[0]
+            if model_short in self.vendor_ssd_utility:
+                self.fetch_vendor_ssd_info(diskdev, model_short)
+                self.parse_vendor_ssd_info(model_short)
+            else:
+                # No handler registered for this disk model
+                pass
+        else:
+            # Failed to get disk model
+            self.model = "Unknown"
+
+    def _execute_shell(self, cmd):
+        process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE)
+        output, error = process.communicate()
+        exit_code = process.returncode
+        if exit_code:
+            return None
+        return output
+
+    def _parse_re(self, pattern, buffer):
+        res_list = re.findall(pattern, str(buffer))
+        return res_list[0] if res_list else NOT_AVAILABLE
+
+    def fetch_generic_ssd_info(self, diskdev):
+        self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev))
+
+    # Health and temperature values may be overwritten with vendor specific data
+    def parse_generic_ssd_info(self):
+        if "nvme" in self.dev:
+            self.model = self._parse_re('Model Number:\s*(.+?)\n', self.ssd_info)
+
+            health_raw = self._parse_re('Percentage Used\s*(.+?)\n', self.ssd_info)
+            if health_raw == NOT_AVAILABLE:
+                self.health = NOT_AVAILABLE
+            else:
+                health_raw = health_raw.split()[-1]
+                self.health = 100 - float(health_raw.strip('%'))
+
+            temp_raw = self._parse_re('Temperature\s*(.+?)\n', self.ssd_info)
+            if temp_raw == NOT_AVAILABLE:
+                self.temperature = NOT_AVAILABLE
+            else:
+                temp_raw = temp_raw.split()[-2]
+                self.temperature = float(temp_raw)
+        else:
+            self.model = self._parse_re('Device Model:\s*(.+?)\n', self.ssd_info)
+            model_key = ""
+            for key in self.key_list:
+                if re.search(key, self.model):
+                    model_key = key
+                    break
+            if  model_key != "":
+                self.remaining_life = self._parse_re(self.model_attr[model_key]["remainingLife"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[2]
+                self.temperature = self._parse_re(self.model_attr[model_key]["temperature"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[8]
+                self.health = self.remaining_life
+            # Get the LITEON ssd health value by (PE CYCLE - AVG ERASE CYCLE )/(PE CYCLE)
+            if model_key in ["ER2-GD", "AF2MA31DTDLT"]:
+                avg_erase = int(self._parse_re('\n173\s+(.+?)\n' ,re.sub(self.attr_info_rule,"",self.ssd_info)).split()[-1])
+                self.health = int(round((PE_CYCLE - avg_erase)/PE_CYCLE*100,0))
+            if self.remaining_life != NOT_AVAILABLE and  int(self.remaining_life) < FAIL_PERCENT:
+                self.remaining_life = "Fail"
+        self.sata_rate = self._parse_re('SATA Version is:.*current: (.+?)\)\n', self.ssd_info)
+        self.serial = self._parse_re('Serial Number:\s*(.+?)\n', self.ssd_info)
+        self.firmware = self._parse_re('Firmware Version:\s*(.+?)\n', self.ssd_info)
+
+    def parse_innodisk_info(self):
+        if self.vendor_ssd_info:
+            self.health = self._parse_re('Health:\s*(.+?)%', self.vendor_ssd_info)
+            self.temperature = self._parse_re('Temperature\s*\[\s*(.+?)\]', self.vendor_ssd_info)
+        else:
+            if self.health == NOT_AVAILABLE:
+                health_raw = self.parse_id_number(INNODISK_HEALTH_ID)
+                self.health = health_raw.split()[-1]
+            if self.temperature == NOT_AVAILABLE:
+                temp_raw = self.parse_id_number(INNODISK_TEMPERATURE_ID)
+                self.temperature = temp_raw.split()[-6]
+
+    def parse_virtium_info(self):
+        if self.vendor_ssd_info:
+            self.temperature = self._parse_re('Temperature_Celsius\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            nand_endurance = self._parse_re('NAND_Endurance\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            avg_erase_count = self._parse_re('Average_Erase_Count\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            try:
+                self.health = 100 - (float(avg_erase_count) * 100 / float(nand_endurance))
+            except (ValueError, ZeroDivisionError):
+                # Invalid avg_erase_count or nand_endurance.
+                pass
+
+    def fetch_vendor_ssd_info(self, diskdev, model):
+        self.vendor_ssd_info = self._execute_shell(self.vendor_ssd_utility[model]["utility"].format(diskdev))
+
+    def parse_vendor_ssd_info(self, model):
+        self.vendor_ssd_utility[model]["parser"]()
+
+    def check_readonly2(self, partition, filesystem):
+        # parse mount cmd output info
+        mount_info = self._execute_shell(MOUNT_CMD)
+        for line in mount_info.split('\n'):
+            column_list = line.split()
+            if line == '':
+                continue
+            if column_list[0] == partition and column_list[2] == filesystem:
+                if column_list[5].split(',')[0][1:] == "ro":
+                    return partition
+                else:
+                    return NOT_AVAILABLE
+        return NOT_AVAILABLE
+
+    def check_readonly(self, partition, filesystem):
+        ret = os.access(filesystem, os.W_OK)
+        if ret == False:
+            return partition
+        else:
+            return NOT_AVAILABLE
+        
+    def get_health(self):
+        """
+        Retrieves current disk health in percentages
+
+        Returns:
+            A float number of current ssd health
+            e.g. 83.5
+        """
+        if self.health == 'N/A':
+            return "NA"
+        else:
+            return float(self.health)
+
+    def get_temperature(self):
+        """
+        Retrieves current disk temperature in Celsius
+
+        Returns:
+            A float number of current temperature in Celsius
+            e.g. 40.1
+        """
+        if self.temperature == 'N/A':
+            return 'NA'
+        else:
+            return float(self.temperature)
+
+    def get_model(self):
+        """
+        Retrieves model for the given disk device
+
+        Returns:
+            A string holding disk model as provided by the manufacturer
+        """
+        return self.model
+
+    def get_firmware(self):
+        """
+        Retrieves firmware version for the given disk device
+
+        Returns:
+            A string holding disk firmware version as provided by the manufacturer
+        """
+        return self.firmware
+
+    def get_serial(self):
+        """
+        Retrieves serial number for the given disk device
+
+        Returns:
+            A string holding disk serial number as provided by the manufacturer
+        """
+        return self.serial
+    def get_sata_rate(self):
+        """
+        Retrieves SATA rate for the given disk device
+        Returns:
+            A string holding current SATA rate as provided by the manufacturer
+        """
+        return self.sata_rate
+    def get_remaining_life(self):
+        """
+        Retrieves remaining life for the given disk device
+        Returns:
+            A string holding disk remaining life as provided by the manufacturer
+        """
+        return self.remaining_life
+    def get_vendor_output(self):
+        """
+        Retrieves vendor specific data for the given disk device
+
+        Returns:
+            A string holding some vendor specific disk information
+        """
+        return self.vendor_ssd_info
+
+    def parse_id_number(self, id):
+        return self._parse_re('{}\s*(.+?)\n'.format(id), self.ssd_info)
+
+    def get_readonly_partition(self):
+        """
+        Check the partition mount filesystem is readonly status,then output the result.
+        Returns:
+            The readonly partition list
+        """
+
+        ro_partition_list = []
+        partition_list = []
+
+        # parse fdisk cmd output info
+        disk_info = self._execute_shell(DISK_LIST_CMD)
+        begin_flag = False
+        for line in disk_info.split('\n'):
+            if line == "Device":
+                begin_flag = True
+                continue
+            if begin_flag:
+                if line != "":
+                    partition_list.append(line)
+                else:
+                    break
+
+        # parse df cmd output info
+        disk_free = self._execute_shell(DISK_FREE_CMD)
+        disk_dict = {}
+        line_num = 0
+        for line in disk_free.split('\n'):
+            line_num = line_num + 1
+            if line_num == 1 or line == "":
+                continue
+            column_list = line.split()
+            disk_dict[column_list[0]] = column_list[5]
+
+        # get partition which is readonly
+        for partition in partition_list:
+            if partition in disk_dict:
+                ret = self.check_readonly(partition, disk_dict[partition])
+                if (ret != NOT_AVAILABLE):
+                    ro_partition_list.append(ret)
+
+        return ro_partition_list
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6940-128qc-r0/pmon_daemon_control.json
new file mode 100644
index 000000000000..94592fa8cebc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/pmon_daemon_control.json
@@ -0,0 +1,3 @@
+{
+    "skip_ledd": true
+}
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/postinit_cmd_file.soc b/device/micas/x86_64-micas_m2-w6940-128qc-r0/postinit_cmd_file.soc
new file mode 100644
index 000000000000..01d06fc34fc7
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/postinit_cmd_file.soc
@@ -0,0 +1,4 @@
+led load /usr/share/sonic/platform/custom_led.bin
+led auto on
+led start
+linkscan SwPortBitMap=xe,ce,cd
diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/system_health_monitoring_config.json b/device/micas/x86_64-micas_m2-w6940-128qc-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000000..e69de29bb2d1
diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk
index 51e7b6a56cfe..dca377930acf 100755
--- a/platform/broadcom/one-image.mk
+++ b/platform/broadcom/one-image.mk
@@ -100,6 +100,7 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \
                                $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE) \
 			       $(MICAS_M2_W6510_48GT4V_PLATFORM_MODULE) \
 			       $(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE) \
+			       $(MICAS_M2_W6940_128QC_PLATFORM_MODULE) \
 			       $(MICAS_M2_W6930_64QC_PLATFORM_MODULE) \
 			       $(MICAS_M2_W6940_64OC_PLATFORM_MODULE) \
 			       $(MICAS_M2_W6920_32QC2X_PLATFORM_MODULE) \
diff --git a/platform/broadcom/platform-modules-micas.mk b/platform/broadcom/platform-modules-micas.mk
index a2121ba55e2b..7e70b5c670dc 100644
--- a/platform/broadcom/platform-modules-micas.mk
+++ b/platform/broadcom/platform-modules-micas.mk
@@ -25,6 +25,14 @@ MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE = platform-modules-micas-m2-w6520-24dc8qc
 $(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6520-24dc8qc-r0
 $(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE)))
 
+## M2-W6940-128QC
+MICAS_M2_W6940_128QC_PLATFORM_MODULE_VERSION = 1.0
+export MICAS_M2_W6940_128QC_PLATFORM_MODULE_VERSION
+
+MICAS_M2_W6940_128QC_PLATFORM_MODULE = platform-modules-micas-m2-w6940-128qc_$(MICAS_M2_W6940_128QC_PLATFORM_MODULE_VERSION)_amd64.deb
+$(MICAS_M2_W6940_128QC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6940-128qc-r0
+$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6940_128QC_PLATFORM_MODULE)))
+
 ## M2-W6930-64QC
 MICAS_M2_W6930_64QC_PLATFORM_MODULE_VERSION = 1.0
 export MICAS_M2_W6930_64QC_PLATFORM_MODULE_VERSION
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/control b/platform/broadcom/sonic-platform-modules-micas/debian/control
index 5e7c9c5bed52..3df20d5b4be0 100644
--- a/platform/broadcom/sonic-platform-modules-micas/debian/control
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/control
@@ -16,6 +16,10 @@ Package: platform-modules-micas-m2-w6520-24dc8qc
 Architecture: amd64
 Description: kernel modules for platform devices such as fan, led, sfp
 
+Package: platform-modules-micas-m2-w6940-128qc
+Architecture: amd64
+Description: kernel modules for platform devices such as fan, led, sfp
+
 Package: platform-modules-micas-m2-w6930-64qc
 Architecture: amd64
 Description: kernel modules for platform devices such as fan, led, sfp
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128qc.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128qc.install
new file mode 100644
index 000000000000..3247b8cdd083
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128qc.install
@@ -0,0 +1 @@
+m2-w6940-128qc/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6940-128qc-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128qc.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128qc.postinst
new file mode 100644
index 000000000000..a8132f4f65a9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128qc.postinst
@@ -0,0 +1,10 @@
+#!/bin/sh
+# postinst
+
+kernel_version=$(uname -r)
+
+if [ -e /boot/System.map-${kernel_version} ]; then
+    depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
+fi
+
+#DEBHELPER#
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
index a6b04f7443a6..66e05fe8104c 100644
--- a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
@@ -3,6 +3,7 @@ currentdir = $(shell pwd)
 MODULE_DIRS := m2-w6510-48v8c
 MODULE_DIRS += m2-w6510-48gt4v
 MODULE_DIRS += m2-w6520-24dc8qc
+MODULE_DIRS += m2-w6940-128qc
 MODULE_DIRS += m2-w6930-64qc
 MODULE_DIRS += m2-w6940-64oc
 MODULE_DIRS += m2-w6920-32qc2x
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/Makefile
new file mode 100644
index 000000000000..0ddc80aae7d2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/Makefile
@@ -0,0 +1,30 @@
+PWD		= $(shell pwd)
+DIR_KERNEL_SRC = $(PWD)/modules/driver
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+SUB_BUILD_DIR = $(PWD)/build
+INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)
+INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin
+INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages
+INSTALL_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/plat_sysfs_cfg
+INSTALL_SERVICE_DIR = $(SUB_BUILD_DIR)/lib/systemd/system
+
+all:
+	$(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules
+	@if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi
+	cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR)
+	@if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi
+	cp -r $(PWD)/config/*  $(INSTALL_SCRIPT_DIR)
+	@if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi
+	@if [ -d $(PWD)/sonic_platform/ ]; then rm -rf ${INSTALL_LIB_DIR}/sonic_platform ;fi
+	@if [ -d $(PWD)/sonic_platform/ ]; then cp -rf $(PWD)/sonic_platform ${INSTALL_LIB_DIR} ;fi
+	@if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi
+	@if [ ! -d ${INSTALL_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_SYSFS_CFG_DIR} ;fi
+	@if [ -d $(PWD)/plat_sysfs_cfg/ ]; then cp -r $(PWD)/plat_sysfs_cfg/* ${INSTALL_SYSFS_CFG_DIR} ;fi
+	@if [ ! -d ${INSTALL_SERVICE_DIR} ]; then mkdir -p ${INSTALL_SERVICE_DIR} ;fi
+	@if [ -d $(PWD)/service/ ]; then cp -r $(PWD)/service/* ${INSTALL_SERVICE_DIR} ;fi
+clean:
+	rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd
+	rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order
+	rm -rf ${DIR_KERNEL_SRC}/.tmp_versions
+	rm -rf $(SUB_BUILD_DIR)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/config/x86_64_micas_m2_w6940_128qc_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/config/x86_64_micas_m2_w6940_128qc_r0_config.py
new file mode 100755
index 000000000000..58ec348834ab
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/config/x86_64_micas_m2_w6940_128qc_r0_config.py
@@ -0,0 +1,779 @@
+#!/usr/bin/python
+# -*- coding: UTF-8 -*-
+from platform_common import *
+
+STARTMODULE = {
+    "hal_fanctrl": 0,
+    "hal_ledctrl":0,
+    "avscontrol": 0,
+    "dev_monitor": 0,
+    "reboot_cause": 0,
+    "pmon_syslog": 0,
+    "sff_temp_polling": 0,
+}
+
+MANUINFO_CONF = {
+    "bios": {
+        "key": "BIOS",
+        "head": True,
+        "next": "onie"
+    },
+    "bios_vendor": {
+        "parent": "bios",
+        "key": "Vendor",
+        "cmd": "dmidecode -t 0 |grep Vendor",
+        "pattern": r".*Vendor",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "bios_version": {
+        "parent": "bios",
+        "key": "Version",
+        "cmd": "dmidecode -t 0 |grep Version",
+        "pattern": r".*Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "bios_date": {
+        "parent": "bios",
+        "key": "Release Date",
+        "cmd": "dmidecode -t 0 |grep Release",
+        "pattern": r".*Release Date",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+    "onie": {
+        "key": "ONIE",
+        "next": "cpu"
+    },
+    "onie_date": {
+        "parent": "onie",
+        "key": "Build Date",
+        "file": "/host/machine.conf",
+        "pattern": r"^onie_build_date",
+        "separator": "=",
+        "arrt_index": 1,
+    },
+    "onie_version": {
+        "parent": "onie",
+        "key": "Version",
+        "file": "/host/machine.conf",
+        "pattern": r"^onie_version",
+        "separator": "=",
+        "arrt_index": 2,
+    },
+
+    "cpu": {
+        "key": "CPU",
+        "next": "ssd"
+    },
+    "cpu_vendor": {
+        "parent": "cpu",
+        "key": "Vendor",
+        "cmd": "dmidecode --type processor |grep Manufacturer",
+        "pattern": r".*Manufacturer",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "cpu_model": {
+        "parent": "cpu",
+        "key": "Device Model",
+        "cmd": "dmidecode --type processor | grep Version",
+        "pattern": r".*Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "cpu_core": {
+        "parent": "cpu",
+        "key": "Core Count",
+        "cmd": "dmidecode --type processor | grep \"Core Count\"",
+        "pattern": r".*Core Count",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+    "cpu_thread": {
+        "parent": "cpu",
+        "key": "Thread Count",
+        "cmd": "dmidecode --type processor | grep \"Thread Count\"",
+        "pattern": r".*Thread Count",
+        "separator": ":",
+        "arrt_index": 4,
+    },
+    "ssd": {
+        "key": "SSD",
+        "next": "cpld"
+    },
+    "ssd_model": {
+        "parent": "ssd",
+        "key": "Device Model",
+        "cmd": "smartctl -i /dev/sda |grep \"Device Model\"",
+        "pattern": r".*Device Model",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "ssd_fw": {
+        "parent": "ssd",
+        "key": "Firmware Version",
+        "cmd": "smartctl -i /dev/sda |grep \"Firmware Version\"",
+        "pattern": r".*Firmware Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "ssd_user_cap": {
+        "parent": "ssd",
+        "key": "User Capacity",
+        "cmd": "smartctl -i /dev/sda |grep \"User Capacity\"",
+        "pattern": r".*User Capacity",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+
+    "cpld": {
+        "key": "CPLD",
+        "next": "fpga"
+    },
+
+    "cpld1": {
+        "key": "CPLD1",
+        "parent": "cpld",
+        "arrt_index": 1,
+    },
+    "cpld1_model": {
+        "key": "Device Model",
+        "parent": "cpld1",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld1_vender": {
+        "key": "Vendor",
+        "parent": "cpld1",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld1_desc": {
+        "key": "Description",
+        "parent": "cpld1",
+        "config": "CPU CPLD",
+        "arrt_index": 3,
+    },
+    "cpld1_version": {
+        "key": "Firmware Version",
+        "parent": "cpld1",
+        "reg": {
+            "loc": "/dev/port",
+            "offset": 0xa00,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld2": {
+        "key": "CPLD2",
+        "parent": "cpld",
+        "arrt_index": 2,
+    },
+    "cpld2_model": {
+        "key": "Device Model",
+        "parent": "cpld2",
+        "config": "LCMXO3LF-4300C-6BG324I",
+        "arrt_index": 1,
+    },
+    "cpld2_vender": {
+        "key": "Vendor",
+        "parent": "cpld2",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld2_desc": {
+        "key": "Description",
+        "parent": "cpld2",
+        "config": "BASE CPLD",
+        "arrt_index": 3,
+    },
+    "cpld2_version": {
+        "key": "Firmware Version",
+        "parent": "cpld2",
+        "reg": {
+            "loc": "/dev/port",
+            "offset": 0x900,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld3": {
+        "key": "CPLD3",
+        "parent": "cpld",
+        "arrt_index": 3,
+    },
+    "cpld3_model": {
+        "key": "Device Model",
+        "parent": "cpld3",
+        "config": "LCMXO3LF-4300C-6BG324I",
+        "arrt_index": 1,
+    },
+    "cpld3_vender": {
+        "key": "Vendor",
+        "parent": "cpld3",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld3_desc": {
+        "key": "Description",
+        "parent": "cpld3",
+        "config": "LC CPLD",
+        "arrt_index": 3,
+    },
+    "cpld3_version": {
+        "key": "Firmware Version",
+        "parent": "cpld3",
+        "i2c": {
+            "bus": "17",
+            "loc": "0x30",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld4": {
+        "key": "CPLD4",
+        "parent": "cpld",
+        "arrt_index": 4,
+    },
+    "cpld4_model": {
+        "key": "Device Model",
+        "parent": "cpld4",
+        "config": "LCMXO3LF-4300C-6BG324I",
+        "arrt_index": 1,
+    },
+    "cpld4_vender": {
+        "key": "Vendor",
+        "parent": "cpld4",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld4_desc": {
+        "key": "Description",
+        "parent": "cpld4",
+        "config": "MAC CPLDA",
+        "arrt_index": 3,
+    },
+    "cpld4_version": {
+        "key": "Firmware Version",
+        "parent": "cpld4",
+        "i2c": {
+            "bus": "18",
+            "loc": "0x30",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld5": {
+        "key": "CPLD5",
+        "parent": "cpld",
+        "arrt_index": 5,
+    },
+    "cpld5_model": {
+        "key": "Device Model",
+        "parent": "cpld5",
+        "config": "LCMXO3LF-4300C-6BG324I",
+        "arrt_index": 1,
+    },
+    "cpld5_vender": {
+        "key": "Vendor",
+        "parent": "cpld5",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld5_desc": {
+        "key": "Description",
+        "parent": "cpld5",
+        "config": "MAC CPLDB",
+        "arrt_index": 3,
+    },
+    "cpld5_version": {
+        "key": "Firmware Version",
+        "parent": "cpld5",
+        "i2c": {
+            "bus": "19",
+            "loc": "0x30",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "i210": {
+        "key": "NIC",
+        "next": "fpga"
+    },
+    "i210_model": {
+        "parent": "i210",
+        "config": "NA",
+        "key": "Device Model",
+        "arrt_index": 1,
+    },
+    "i210_vendor": {
+        "parent": "i210",
+        "config": "INTEL",
+        "key": "Vendor",
+        "arrt_index": 2,
+    },
+    "i210_version": {
+        "parent": "i210",
+        "cmd": "ethtool -i eth0",
+        "pattern": r"firmware-version",
+        "separator": ":",
+        "key": "Firmware Version",
+        "arrt_index": 3,
+    },
+
+    "fpga": {
+        "key": "FPGA",
+    },
+    "fpga_model": {
+        "parent": "fpga",
+        "config": "XC7A50T-2FGG484I",
+        "key": "Device Model",
+        "arrt_index": 1,
+    },
+    "fpga_vendor": {
+        "parent": "fpga",
+        "config": "XILINX",
+        "key": "Vendor",
+        "arrt_index": 2,
+    },
+    "fpga_desc": {
+        "parent": "fpga",
+        "config": "NA",
+        "key": "Description",
+        "arrt_index": 3,
+    },
+    "fpga_hw_version": {
+        "parent": "fpga",
+        "config": "NA",
+        "key": "Hardware Version",
+        "arrt_index": 4,
+    },
+    "fpga_fw_version": {
+        "parent": "fpga",
+        "pci": {
+            "bus": 3,
+            "slot": 0,
+            "fn": 0,
+            "bar": 0,
+            "offset": 0
+        },
+        "key": "Firmware Version",
+        "arrt_index": 5,
+    },
+    "fpga_date": {
+        "parent": "fpga",
+        "pci": {
+            "bus": 3,
+            "slot": 0,
+            "fn": 0,
+            "bar": 0,
+            "offset": 4
+        },
+        "key": "Build Date",
+        "arrt_index": 6,
+    },
+}
+
+PMON_SYSLOG_STATUS = {
+    "polling_time": 3,
+    "sffs": {
+        "present": {"path": ["/sys/wb_plat/sff/*/present"], "ABSENT": 0},
+        "nochangedmsgflag": 0,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 1,
+        "alias": {
+            "sff49": "Ethernet49",
+            "sff50": "Ethernet50",
+            "sff51": "Ethernet51",
+            "sff52": "Ethernet52"
+        }
+    },
+    "fans": {
+        "present": {"path": ["/sys/wb_plat/fan/*/present"], "ABSENT": 0},
+        "status": [
+            {"path": "/sys/wb_plat/fan/%s/motor0/status", 'okval': 1},
+        ],
+        "nochangedmsgflag": 1,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 0,
+        "alias": {
+            "fan1": "FAN1",
+            "fan2": "FAN2"
+        }
+    },
+    "psus": {
+        "present": {"path": ["/sys/wb_plat/psu/*/present"], "ABSENT": 0},
+        "status": [
+            {"path": "/sys/wb_plat/psu/%s/output", "okval": 1},
+            {"path": "/sys/wb_plat/psu/%s/alert", "okval": 0},
+        ],
+        "nochangedmsgflag": 1,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 0,
+        "alias": {
+            "psu1": "PSU1",
+            "psu2": "PSU2"
+        }
+    }
+}
+
+##################### MAC Voltage adjust####################################
+MAC_DEFAULT_PARAM = [
+    {
+        "name": "mac_core",              # AVS name
+        "type": 0,                       # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range
+        "default": 0x01,                 # default value, if rov value not in range
+        "rov_source": 0,                 # 0: get rov value from cpld, 1: get rov value from SDK
+        "cpld_avs": {"io_addr": 0x956, "gettype": "io"},
+        "set_avs": {
+            "loc": "/sys/bus/i2c/devices/17-0058/hwmon/hwmon*/avs0_vout",
+            "gettype": "sysfs", "formula": "int((%f)*1000000)"
+        },
+        "mac_avs_param": {
+            0x08: 0.875,
+            0x04: 0.850,
+            0x02: 0.825,
+            0x01: 0.800
+        }
+    }
+]
+
+
+DRIVERLISTS = [
+    {"name": "r8169", "delay": 0, "removable": 0},
+    {"name": "ice", "delay": 0, "removable": 0},
+    {"name": "i2c_i801", "delay": 0},
+    {"name": "i2c_dev", "delay": 0},
+    {"name": "i2c_mux", "delay": 0},
+    {"name": "platform_common dfd_my_type=0x40c7", "delay": 0},
+    {"name": "wb_io_dev", "delay": 0},
+    {"name": "wb_io_dev_device", "delay": 0},
+    {"name": "wb_fpga_pcie", "delay": 0},
+    {"name": "wb_pcie_dev", "delay": 0},
+    {"name": "wb_pcie_dev_device", "delay": 0},
+    {"name": "wb_i2c_dev", "delay": 0},
+    {"name": "wb_i2c_ocores", "delay": 0},
+    {"name": "wb_i2c_ocores_device", "delay": 0},
+    {"name": "wb_i2c_mux_pca9641", "delay": 0},
+    {"name": "wb_i2c_mux_pca954x", "delay": 0},
+    {"name": "wb_i2c_mux_pca954x_device", "delay": 0},
+    {"name": "wb_i2c_dev_device", "delay": 0},
+    {"name": "optoe", "delay": 0},
+    {"name": "at24", "delay": 0},
+]
+
+DEVICE = [
+    {"name": "24c02", "bus": 0, "loc": 0x56},
+]
+
+OPTOE = [
+    {"name": "optoe3", "startbus": 25, "endbus": 152},
+]
+
+REBOOT_CTRL_PARAM = {
+    #"cpu": {"io_addr": 0x910, "rst_val": 0x10, "rst_delay": 0, "gettype": "io"},
+    #"mac": {"io_addr": 0x930, "rst_val": 0xbf, "rst_delay": 1, "unlock_rst_val": 0xff, "unlock_rst_delay": 1, "gettype": "io"},
+    #"phy": {"io_addr": 0x930, "rst_val": 0xf7, "rst_delay": 1, "unlock_rst_val": 0xff, "unlock_rst_delay": 1, "gettype": "io"},
+}
+
+DEV_MONITOR_PARAM = {
+    "polling_time": 10,
+    "psus": [
+        {
+            "name": "psu1",
+            "present": {"gettype": "io", "io_addr": 0xb10, "presentbit": 0, "okval": 0},
+            "device": [
+                {"id": "psu1frue2", "name": "24c02", "bus": 7, "loc": 0x56, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "psu2",
+            "present": {"gettype": "io", "io_addr": 0xb10, "presentbit": 1, "okval": 0},
+            "device": [
+                {"id": "psu2frue2", "name": "24c02", "bus": 7, "loc": 0x57, "attr": "eeprom"},
+            ],
+        },
+    ],
+    "fans": [
+        {
+            "name": "fan1",
+            "present": {"gettype": "io", "io_addr": 0x994, "presentbit": 0, "okval": 0},
+            "device": [
+                {"id": "fan1frue2", "name": "24c02", "bus": 8, "loc": 0x53, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan2",
+            "present": {"gettype": "io", "io_addr": 0x994, "presentbit": 1, "okval": 0},
+            "device": [
+                {"id": "fan2frue2", "name": "24c02", "bus": 9, "loc": 0x53, "attr": "eeprom"},
+            ],
+        },
+    ],
+    "others": [
+        {
+            "name": "eeprom",
+            "device": [
+                {"id": "eeprom_1", "name": "24c02", "bus": 2, "loc": 0x56, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "tmp275",
+            "device": [
+                {"id": "tmp275_1", "name": "wb_tmp275", "bus": 6, "loc": 0x48, "attr": "hwmon"},
+                {"id": "tmp275_2", "name": "wb_tmp275", "bus": 6, "loc": 0x49, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "mac_bsc",
+            "device": [
+                {"id": "mac_bsc_1", "name": "wb_mac_bsc_td3_x2", "bus": 18, "loc": 0x44, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "ina3221",
+            "device": [
+                {"id": "ina3221_1", "name": "wb_ina3221", "bus": 3, "loc": 0x40, "attr": "hwmon"},
+                {"id": "ina3221_2", "name": "wb_ina3221", "bus": 3, "loc": 0x41, "attr": "hwmon"},
+                {"id": "ina3221_3", "name": "wb_ina3221", "bus": 3, "loc": 0x42, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "xdpe12284",
+            "device": [
+                {"id": "xdpe12284_1", "name": "wb_xdpe12284", "bus": 0, "loc": 0x68, "attr": "hwmon"},
+                {"id": "xdpe12284_2", "name": "wb_xdpe12284", "bus": 0, "loc": 0x6e, "attr": "hwmon"},
+                {"id": "xdpe12284_2", "name": "wb_xdpe12284", "bus": 0, "loc": 0x5e, "attr": "hwmon"},
+                {"id": "xdpe12284_2", "name": "wb_xdpe12284", "bus": 17, "loc": 0x58, "attr": "hwmon"},
+            ],
+        },
+    ],
+}
+
+INIT_PARAM_PRE = []
+
+INIT_COMMAND_PRE = []
+
+INIT_PARAM = []
+
+INIT_COMMAND = [
+    # set sysled
+    "dfd_debug io_wr 0x950 0x04",
+    # mac led reset
+    "dfd_debug sysfs_data_wr /dev/fpga0 0x40 0x98 0x00 0x00 0x00",
+    "dfd_debug sysfs_data_wr /dev/fpga0 0x44 0x98 0x00 0x00 0x00",
+    "dfd_debug sysfs_data_wr /dev/fpga0 0x48 0x98 0x00 0x00 0x00",
+    "dfd_debug sysfs_data_wr /dev/fpga0 0x4c 0x98 0x00 0x00 0x00",
+    # enable root port PCIe AER
+    "setpci -s 00:10.0 0x5c.b=0x1f",
+    "setpci -s 00:12.0 0x5c.b=0x1f",
+    "setpci -s 00:14.0 0x5c.b=0x1f",
+    "setpci -s 14:02.0 0x5c.b=0x1f",
+    "setpci -s 14:03.0 0x5c.b=0x1f",
+    "setpci -s 14:04.0 0x5c.b=0x1f",
+    "setpci -s 14:05.0 0x5c.b=0x1f"
+]
+
+REBOOT_CAUSE_PARA = {
+    "reboot_cause_list": [
+        {
+            "name": "wdt_reboot",
+            "monitor_point": {"gettype": "io", "io_addr": 0x76b, "okval": 1},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Watchdog, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Watchdog, ",
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size":1*1024*1024}
+            ],
+            "finish_operation": [
+                {"gettype": "io", "io_addr": 0x76b, "value": 0x00},
+            ]
+        },
+        {
+            "name": "otp_switch_reboot",
+            "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ",
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+            ],
+            "finish_operation": [
+                {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"},
+            ]
+        },
+        {
+            "name": "otp_other_reboot",
+            "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ",
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+            ],
+            "finish_operation": [
+                {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"},
+            ]
+        },
+    ],
+    "other_reboot_cause_record": [
+        {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+        {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+    ],
+}
+
+
+WARM_UPGRADE_PARAM = {
+    "slot0": {
+        "VME": {
+            "chain1": [
+                {"name": "CPU_CPLD",
+                    "refresh_file_judge_flag": 1,
+                    "refresh_file": "/etc/.cpld_refresh/refresh_cpu_cpld_header.vme",
+                    "init_cmd": [
+                        {"cmd": "echo 98 > /sys/class/gpio/export", "gettype": "cmd"},
+                        {"cmd": "echo high > /sys/class/gpio/gpio98/direction", "gettype": "cmd"},
+                        {"io_addr": 0x7a5, "value": 0, "gettype": "io"},
+                    ],
+                    "rw_recover_reg": [
+                        {"io_addr": 0x721, "value": None, "gettype": "io"},
+                        {"io_addr": 0x765, "value": None, "gettype": "io"},
+                        {"io_addr": 0x766, "value": None, "gettype": "io"},
+                        {"io_addr": 0x768, "value": None, "gettype": "io"},
+                    ],
+                    "after_upgrade_delay": 1,
+                    "after_upgrade_delay_timeout": 30,
+                    "refresh_finish_flag_check": {"io_addr":0x7a5, "value":0x01, "gettype":"io"},
+                    "access_check_reg": {"io_addr": 0x705, "value": 0x5a, "gettype": "io"},
+                    "finish_cmd": [
+                        {"cmd": "echo 0 > /sys/class/gpio/gpio98/value", "gettype": "cmd"},
+                        {"cmd": "echo 98 > /sys/class/gpio/unexport", "gettype": "cmd"},
+                    ],
+                },
+            ],
+        },
+    },
+    "stop_services_cmd": [
+        "/usr/local/bin/platform_process.py stop",
+    ],
+    "start_services_cmd": [
+        "/usr/local/bin/platform_process.py start",
+    ],
+}
+
+UPGRADE_SUMMARY = {
+    "devtype": 0x40c7,
+
+    "slot0": {
+        "subtype": 0,
+        "VME": {
+            "chain1": {
+                "name": "CPU_CPLD",
+                "is_support_warm_upg": 0,
+            },
+            "chain2": {
+                "name": "BASE_CPLD",
+                "is_support_warm_upg": 0,
+            },
+            "chain3": {
+                "name": "LC_CPLD",
+                "is_support_warm_upg": 0,
+            },
+            "chain4": {
+                "name": "MAC_CPLDA",
+                "is_support_warm_upg": 0,
+            },
+            "chain5": {
+                "name": "MAC_CPLDB",
+                "is_support_warm_upg": 0,
+            },
+            "chain6": {
+                "name": "FCB_CPLD",
+                "is_support_warm_upg": 0,
+            },
+            "chain7": {
+                "name": "MISC_CPLD",
+                "is_support_warm_upg": 0,
+            },
+            "chain8": {
+                "name": "PCIE_CPLD",
+                "is_support_warm_upg": 0,
+            },
+        },
+
+        "SPI-LOGIC-DEV": {
+            "chain1": {
+                "name": "FPGA",
+                "is_support_warm_upg": 0,
+            },
+        },
+
+        "MTD": {
+            "chain2": {
+                "name": "BIOS",
+                "is_support_warm_upg": 0,
+                "filesizecheck": 20480,  # bios check file size, Unit: K
+                "init_cmd": [
+                    {"cmd": "modprobe mtd", "gettype": "cmd"},
+                    {"cmd": "modprobe spi_nor", "gettype": "cmd"},
+                    {"cmd": "modprobe ofpart", "gettype": "cmd"},
+                    {"cmd": "modprobe spi_intel writeable=1", "gettype": "cmd"},
+                    {"cmd": "modprobe intel_spi_pci", "gettype": "cmd"},
+                ],
+                "finish_cmd": [
+                    {"cmd": "rmmod intel_spi_pci", "gettype": "cmd"},
+                    {"cmd": "rmmod spi_intel", "gettype": "cmd"},
+                    {"cmd": "rmmod ofpart", "gettype": "cmd"},
+                    {"cmd": "rmmod spi_nor", "gettype": "cmd"},
+                    {"cmd": "rmmod mtd", "gettype": "cmd"},
+                ],
+            },
+        },
+
+        "TEST": {
+            "fpga": [
+                {"chain": 1, "file": "/etc/.upgrade_test/fpga_test_header.bin", "display_name": "FPGA"},
+            ],
+            "cpld": [
+                {"chain": 1, "file": "/etc/.upgrade_test/cpu_cpld_test_header.vme", "display_name": "CPU_CPLD"},
+                {"chain": 2, "file": "/etc/.upgrade_test/base_cpld_test_header.vme", "display_name": "BASE_CPLD"},
+                {"chain": 3, "file": "/etc/.upgrade_test/lc_cpld_test_header.vme", "display_name": "LC_CPLD"},
+                {"chain": 4, "file": "/etc/.upgrade_test/mac_cplda_test_header.vme", "display_name": "MAC_CPLDA"},
+                {"chain": 5, "file": "/etc/.upgrade_test/mac_cpldb_test_header.vme", "display_name": "MAC_CPLDB"},
+                {"chain": 6, "file": "/etc/.upgrade_test/fcb_cpld_test_header.vme", "display_name": "FCB_CPLD"},
+                {"chain": 7, "file": "/etc/.upgrade_test/misc_cpld_test_header.vme", "display_name": "MISC_CPLD"},
+                #{"chain": 8, "file": "/etc/.upgrade_test/pcie_cpld_test_header.vme", "display_name": "PCIe_CPLD"},
+            ],
+        },
+    },
+}
+
+
+PLATFORM_E2_CONF = {
+    "fan": [
+        #{"name": "fan1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/8-0053/eeprom"},
+        #{"name": "fan2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/9-0053/eeprom"},
+    ],
+    "psu": [
+        #{"name": "psu1", "e2_type": "custfru", "e2_path": "/sys/bus/i2c/devices/7-0056/eeprom"},
+        #{"name": "psu2", "e2_type": "custfru", "e2_path": "/sys/bus/i2c/devices/7-0057/eeprom"},
+    ],
+    "syseeprom": [
+        {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/0-0056/eeprom"},
+    ],
+}
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/config/x86_64_micas_m2_w6940_128qc_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/config/x86_64_micas_m2_w6940_128qc_r0_port_config.py
new file mode 100755
index 000000000000..58bf1b9b4042
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/config/x86_64_micas_m2_w6940_128qc_r0_port_config.py
@@ -0,0 +1,136 @@
+#!/usr/bin/python3
+# -*- coding: UTF-8 -*-
+
+PLATFORM_INTF_OPTOE = {
+    "port_num": 128,
+    "port_bus_map": {
+        1: 25,
+        2: 26,
+        3: 27,
+        4: 28,
+        7: 29,
+        8: 30,
+        9: 31,
+        10: 32,
+        13: 33,
+        14: 34,
+        15: 35,
+        16: 36,
+        19: 37,
+        20: 38,
+        21: 39,
+        22: 40,
+        25: 41,
+        26: 42,
+        27: 43,
+        28: 44,
+        31: 45,
+        32: 46,
+        33: 47,
+        34: 48,
+        37: 49,
+        38: 50,
+        39: 51,
+        40: 52,
+        43: 53,
+        44: 54,
+        45: 55,
+        46: 56,
+        49: 57,
+        50: 58,
+        51: 59,
+        52: 60,
+        55: 61,
+        56: 62,
+        57: 63,
+        58: 64,
+        61: 65,
+        62: 66,
+        63: 67,
+        64: 68,
+        67: 69,
+        68: 70,
+        69: 71,
+        70: 72,
+        73: 73,
+        74: 74,
+        75: 75,
+        76: 76,
+        79: 77,
+        80: 78,
+        81: 79,
+        82: 80,
+        85: 81,
+        86: 82,
+        87: 83,
+        88: 84,
+        91: 85,
+        92: 86,
+        93: 87,
+        94: 88,
+        97: 89,
+        98: 90,
+        99: 91,
+        100: 92,
+        103: 93,
+        104: 94,
+        105: 95,
+        106: 96,
+        109: 97,
+        110: 98,
+        111: 99,
+        112: 100,
+        115: 101,
+        116: 102,
+        117: 103,
+        118: 104,
+        121: 105,
+        122: 106,
+        123: 107,
+        124: 108,
+        125: 109,
+        126: 110,
+        127: 111,
+        128: 112,
+        5: 113,
+        6: 114,
+        11: 115,
+        12: 116,
+        17: 117,
+        18: 118,
+        23: 119,
+        24: 120,
+        29: 121,
+        30: 122,
+        35: 123,
+        36: 124,
+        41: 125,
+        42: 126,
+        47: 127,
+        48: 128,
+        53: 129,
+        54: 130,
+        59: 131,
+        60: 132,
+        65: 133,
+        66: 134,
+        71: 135,
+        72: 136,
+        77: 137,
+        78: 138,
+        83: 139,
+        84: 140,
+        89: 141,
+        90: 142,
+        95: 143,
+        96: 144,
+        101: 145,
+        102: 146,
+        107: 147,
+        108: 148,
+        113: 149,
+        114: 150,
+        119: 151,
+        120: 152,
+    }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/hal-config/x86_64_micas_m2_w6940_128qc_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/hal-config/x86_64_micas_m2_w6940_128qc_r0_device.py
new file mode 100755
index 000000000000..ac42fa245697
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/hal-config/x86_64_micas_m2_w6940_128qc_r0_device.py
@@ -0,0 +1,186 @@
+#!/usr/bin/python3
+
+psu_fan_airflow = {
+    "intake": ['GW-CRPS2000DWA']
+}
+
+fanairflow = {
+    "intake": ['FAN80-01-F'],
+}
+
+psu_display_name = {
+    "PA2000I-F": ['GW-CRPS2000DWA'],
+}
+
+psutypedecode = {
+    0x00: 'N/A',
+    0x01: 'AC',
+    0x02: 'DC',
+}
+
+class Description:
+    CPLD = "Used for managing IO modules, SFP+ modules and system LEDs"
+    BIOS = "Performs initialization of hardware components during booting"
+    FPGA = "Platform management controller for on-board temperature monitoring, in-chassis power"
+
+
+devices = {
+    "onie_e2": [
+        {
+            "name": "ONIE_E2",
+            "e2loc": {"loc": "/sys/bus/i2c/devices/0-0056/eeprom", "way": "sysfs"},
+            "airflow": "intake"
+        },
+    ],
+    
+    "thermal_config": {
+        "number": 10,
+    },
+    
+    "fan_config": {
+        "num_fantrays": 5,
+        "num_fans_pertray": 2,
+    },
+
+    "psu_config": {
+        "number": 4
+    },
+
+    "cpld_config": {
+        "number": 7
+    },
+
+    "bmc_config": {
+        "number": 1
+    },
+
+    "fpga_config": {
+        "number": 1,
+        "fpgas": [
+            {
+                "name": "fpga0",
+                "alias": "MAC FPGA",
+                "type": "XC7A50T-2FGG484I",
+                "firmware_version": {
+                    "dev_path": "/dev/fpga0",
+                    "offset": 0x00,
+                    "len": 4
+                },
+                "board_version": {
+                    "dev_path": "/dev/fpga0",
+                    "offset": 0x04,
+                    "len": 4
+                }
+            }
+        ]
+    },
+
+    "bios_config": {
+        "number": 1,
+        "bios": [
+            {
+                "name": "bios0",
+                "alias": "BIOS",
+                "type": {
+                    "cmd": "dmidecode -t 0 |grep Vendor |awk -F\": \"  \'{ print $2 }\'",
+                    "gettype": "cmd"
+                },
+                "firmware_version": {
+                    "cmd": "dmidecode -t 0 |grep Version |awk -F\": \"  \'{ print $2 }\'",
+                    "gettype": "cmd"
+                },
+                "board_version": {
+                    "cmd": "dmidecode -t 0 |grep Version |awk -F\": \"  \'{ print $2 }\'",
+                    "gettype": "cmd"
+                }
+            }
+        ]
+    },
+
+    "cpu": [
+        {
+            "name": "cpu",
+            "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"
+        }
+    ],
+    "sfps": {
+        "ver": '1.0',
+        "port_index_start": 0,
+        "port_num": 128,
+        "log_level": 2,
+        "eeprom_retry_times": 5,
+        "eeprom_retry_break_sec": 0.2,
+        "presence_cpld": {
+            "dev_id": {
+                3: {
+                    "offset": {
+                        0x30: "1-4, 7-10",
+                        0x31: "13-16, 19-22",
+                        0x32: "25-28, 31-34",
+                        0x33: "37-40, 43-46",
+                        0x34: "49-52, 55-58",
+                        0x35: "61-64",
+                    },
+                },
+                4: {
+                    "offset": {
+                        0x30: "67-70, 73-76",
+                        0x31: "79-82, 85-88",
+                        0x32: "91-94, 97-100",
+                        0x33: "103-106, 109-112",
+                        0x34: "115-118, 121-124",
+                        0x35: "125-128",
+                    },
+                },
+                2: {
+                    "offset": {
+                        0x30: "5-6, 11-12, 17-18, 23-24",
+                        0x31: "29-30, 35-36, 41-42, 47-48",
+                        0x32: "53-54, 59-60, 65-66, 71-72",
+                        0x33: "77-78, 83-84, 89-90, 95-96",
+                        0x34: "101-102, 107-108, 113-114, 119-120",
+                    },
+                },
+            },
+        },
+        "presence_val_is_present": 0,
+        "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom",
+        "eeprom_path_key": list(range(25, 153)),
+        "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class",
+        "optoe_driver_key": list(range(25, 153)),
+        "reset_cpld": {
+            "dev_id": {
+                3: {
+                    "offset": {
+                        0x90: "1-4, 7-10",
+                        0x91: "13-16, 19-22",
+                        0x92: "25-28, 31-34",
+                        0x93: "37-40, 43-46",
+                        0x94: "49-52, 55-58",
+                        0x95: "61-64",
+                    },
+                },
+                4: {
+                    "offset": {
+                        0x90: "67-70, 73-76",
+                        0x91: "79-82, 85-88",
+                        0x92: "91-94, 97-100",
+                        0x93: "103-106, 109-112",
+                        0x94: "115-118, 121-124",
+                        0x95: "125-128",
+                    },
+                },
+                2: {
+                    "offset": {
+                        0x90: "5-6, 11-12, 17-18, 23-24",
+                        0x91: "29-30, 35-36, 41-42, 47-48",
+                        0x92: "53-54, 59-60, 65-66, 71-72",
+                        0x93: "77-78, 83-84, 89-90, 95-96",
+                        0x94: "101-102, 107-108, 113-114, 119-120",
+                    },
+                },
+            },
+        },
+        "reset_val_is_reset": 0,
+    }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/hal-config/x86_64_micas_m2_w6940_128qc_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/hal-config/x86_64_micas_m2_w6940_128qc_r0_monitor.py
new file mode 100755
index 000000000000..6d68e1a5f9ee
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/hal-config/x86_64_micas_m2_w6940_128qc_r0_monitor.py
@@ -0,0 +1,141 @@
+# coding:utf-8
+
+
+monitor = {
+    "openloop": {
+        "linear": {
+            "name": "linear",
+            "flag": 0,
+            "pwm_min": 0x55,
+            "pwm_max": 0xff,
+            "K": 11,
+            "tin_min": 38,
+        },
+        "curve": {
+            "name": "curve",
+            "flag": 1,
+            "pwm_min": 0x55,
+            "pwm_max": 0xff,
+            "a": -0.05,
+            "b": 11.32,
+            "c": -166,
+            "tin_min": 25,
+        },
+    },
+
+    "pid": {
+        "CPU_TEMP": {
+            "name": "CPU_TEMP",
+            "flag": 0,
+            "type": "duty",
+            "pwm_min": 0x55,
+            "pwm_max": 0xff,
+            "Kp": 1,
+            "Ki": 0.4,
+            "Kd": 0,
+            "target": 80,
+            "value": [None, None, None],
+        },
+        "SWITCH_TEMP": {
+            "name": "SWITCH_TEMP",
+            "flag": 0,
+            "type": "duty",
+            "pwm_min": 0x55,
+            "pwm_max": 0xff,
+            "Kp": 1,
+            "Ki": 0.4,
+            "Kd": 0.3,
+            "target": 90,
+            "value": [None, None, None],
+        },
+        "OUTLET_TEMP": {
+            "name": "OUTLET_TEMP",
+            "flag": 0,
+            "type": "duty",
+            "pwm_min": 0x55,
+            "pwm_max": 0xff,
+            "Kp": 2,
+            "Ki": 0.4,
+            "Kd": 0.3,
+            "target": 60,
+            "value": [None, None, None],
+        },
+        "SFF_TEMP": {
+            "name": "SFF_TEMP",
+            "flag": 0,
+            "type": "duty",
+            "pwm_min": 0x55,
+            "pwm_max": 0xff,
+            "Kp": 1,
+            "Ki": 1,
+            "Kd": 0.3,
+            "target": 65,
+            "value": [None, None, None],
+        },
+    },
+
+    "temps_threshold": {
+        "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 105, "critical": 110},
+        "INLET_TEMP": {"name": "INLET_TEMP", "warning": 55, "critical": 60},
+        "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75},
+        "CPU_TEMP": {"name": "CPU_TEMP", "warning": 85, "critical": 91},
+        "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999},
+    },
+
+    "fancontrol_para": {
+        "interval": 5,
+        "fan_air_flow_monitor": 1,
+        "psu_air_flow_monitor": 1,
+        "max_pwm": 0xff,
+        "min_pwm": 0x55,
+        "abnormal_pwm": 0xff,
+        "warning_pwm": 0xff,
+        "temp_invalid_pid_pwm": 0x55,
+        "temp_error_pid_pwm": 0x55,
+        "temp_fail_num": 3,
+        "check_temp_fail": [
+            {"temp_name": "INLET_TEMP"},
+            {"temp_name": "SWITCH_TEMP"},
+            {"temp_name": "CPU_TEMP"},
+        ],
+        "temp_warning_num": 3,  # temp over warning 3 times continuously
+        "temp_critical_num": 3,  # temp over critical 3 times continuously
+        "temp_warning_countdown": 60,  # 5 min warning speed after not warning
+        "temp_critical_countdown": 60,  # 5 min full speed after not critical
+        "rotor_error_count": 6,  # fan rotor error 6 times continuously
+        "inlet_mac_diff": 999,
+        "check_crit_reboot_flag": 1,
+        "check_crit_reboot_num": 3,
+        "check_crit_sleep_time": 20,
+        "psu_absent_fullspeed_num": 1,
+        "fan_absent_fullspeed_num": 1,
+        "rotor_error_fullspeed_num": 1,
+        "psu_fan_control": 0,
+    },
+
+    "ledcontrol_para": {
+        "interval": 5,
+        "checkpsu": 0,  # 0: sys led don't follow psu led
+        "checkfan": 0,  # 0: sys led don't follow fan led
+        "psu_amber_num": 1,
+        "fan_amber_num": 1,
+        "board_sys_led": [
+            {"led_name": "FRONT_SYS_LED"},
+        ],
+        "board_psu_led": [
+            {"led_name": "FRONT_PSU_LED"},
+        ],
+        "board_fan_led": [
+            {"led_name": "FRONT_FAN_LED"},
+        ],
+        "psu_air_flow_monitor": 1,
+        "fan_air_flow_monitor": 1,
+        "psu_air_flow_amber_num": 1,
+        "fan_air_flow_amber_num": 1,
+    },
+
+    "otp_reboot_judge_file": {
+        "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag",
+        "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag",
+    },
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/Makefile
new file mode 100644
index 000000000000..912c4f82c6e5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/Makefile
@@ -0,0 +1,10 @@
+MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
+MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules)
+
+EXTRA_CFLAGS+= -I$(MODULES_DIR)
+
+obj-m := wb_pcie_dev_device.o
+obj-m += wb_i2c_ocores_device.o
+obj-m += wb_i2c_mux_pca954x_device.o
+obj-m += wb_i2c_dev_device.o
+obj-m += wb_io_dev_device.o
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_dev_device.c
new file mode 100644
index 000000000000..c0a7e6c00211
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_dev_device.c
@@ -0,0 +1,161 @@
+/*
+ * An wb_i2c_dev_device driver for i2c dev device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_i2c_dev.h>
+
+static int g_wb_i2c_dev_device_debug = 0;
+static int g_wb_i2c_dev_device_error = 0;
+
+module_param(g_wb_i2c_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_i2c_dev_device_debug) { \
+        printk(KERN_INFO "[WB_I2C_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_I2C_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_i2c_dev_device_error) { \
+        printk(KERN_ERR "[WB_I2C_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static i2c_dev_device_t i2c_dev_device_data0 = {
+    .i2c_bus = 17,
+    .i2c_addr = 0x30,
+    .i2c_name = "cpld2",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data1 = {
+    .i2c_bus = 18,
+    .i2c_addr = 0x30,
+    .i2c_name = "cpld3",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data2 = {
+    .i2c_bus = 19,
+    .i2c_addr = 0x30,
+    .i2c_name = "cpld4",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data3 = {
+    .i2c_bus = 20,
+    .i2c_addr = 0x30,
+    .i2c_name = "cpld5",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+
+struct i2c_board_info i2c_dev_device_info[] = {
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data0,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data1,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data2,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data3,
+    },
+};
+
+static int __init wb_i2c_dev_device_init(void)
+{
+    int i;
+    struct i2c_adapter *adap;
+    struct i2c_client *client;
+    i2c_dev_device_t *i2c_dev_device_data;
+
+    WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(i2c_dev_device_info); i++) {
+        i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+        i2c_dev_device_info[i].addr = i2c_dev_device_data->i2c_addr;
+        adap = i2c_get_adapter(i2c_dev_device_data->i2c_bus);
+        if (adap == NULL) {
+            i2c_dev_device_data->client = NULL;
+            printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_dev_device_data->i2c_bus);
+            continue;
+        }
+        client = i2c_new_client_device(adap, &i2c_dev_device_info[i]);
+        if (!client) {
+            i2c_dev_device_data->client = NULL;
+            printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n",
+                i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus);
+        } else {
+            i2c_dev_device_data->client = client;
+        }
+        i2c_put_adapter(adap);
+    }
+    return 0;
+}
+
+static void __exit wb_i2c_dev_device_exit(void)
+{
+    int i;
+    i2c_dev_device_t *i2c_dev_device_data;
+
+    WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(i2c_dev_device_info) - 1; i >= 0; i--) {
+        i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+        if (i2c_dev_device_data->client) {
+            i2c_unregister_device(i2c_dev_device_data->client);
+            i2c_dev_device_data->client = NULL;
+        }
+    }
+}
+
+module_init(wb_i2c_dev_device_init);
+module_exit(wb_i2c_dev_device_exit);
+MODULE_DESCRIPTION("I2C DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_mux_pca954x_device.c
new file mode 100644
index 000000000000..6d96bb56590b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_mux_pca954x_device.c
@@ -0,0 +1,539 @@
+/*
+ * An wb_i2c_mux_pca954x_device driver for pca954x i2c load device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_i2c_mux_pca954x.h>
+
+static int g_wb_i2c_mux_pca954x_device_debug = 0;
+static int g_wb_i2c_mux_pca954x_device_error = 0;
+
+module_param(g_wb_i2c_mux_pca954x_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_mux_pca954x_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_i2c_mux_pca954x_device_debug) { \
+        printk(KERN_INFO "[WB_I2C_MUX_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_i2c_mux_pca954x_device_error) { \
+        printk(KERN_ERR "[WB_I2C_MUX_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data0 = {
+    .i2c_bus                        = 1,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 25,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x84,
+        .file_attr.mask             = 0x00000001,
+        .file_attr.reset_on         = 0x00000000,
+        .file_attr.reset_off        = 0x00000001,
+        .file_attr.width            = 4,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data1 = {
+    .i2c_bus                        = 2,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 33,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x84,
+        .file_attr.mask             = 0x00000002,
+        .file_attr.reset_on         = 0x00000000,
+        .file_attr.reset_off        = 0x00000002,
+        .file_attr.width            = 4,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data2 = {
+    .i2c_bus                        = 3,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 41,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x84,
+        .file_attr.mask             = 0x00000004,
+        .file_attr.reset_on         = 0x00000000,
+        .file_attr.reset_off        = 0x00000004,
+        .file_attr.width            = 4,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data3 = {
+    .i2c_bus                        = 4,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 49,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x84,
+        .file_attr.mask             = 0x00000008,
+        .file_attr.reset_on         = 0x00000000,
+        .file_attr.reset_off        = 0x00000008,
+        .file_attr.width            = 4,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data4 = {
+    .i2c_bus                        = 5,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 57,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x84,
+        .file_attr.mask             = 0x00000010,
+        .file_attr.reset_on         = 0x00000000,
+        .file_attr.reset_off        = 0x00000010,
+        .file_attr.width            = 4,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data5 = {
+    .i2c_bus                        = 6,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 65,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x84,
+        .file_attr.mask             = 0x00000020,
+        .file_attr.reset_on         = 0x00000000,
+        .file_attr.reset_off        = 0x00000020,
+        .file_attr.width            = 4,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data6 = {
+    .i2c_bus                        = 7,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 73,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x84,
+        .file_attr.mask             = 0x00000040,
+        .file_attr.reset_on         = 0x00000000,
+        .file_attr.reset_off        = 0x00000040,
+        .file_attr.width            = 4,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data7 = {
+    .i2c_bus                        = 8,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 81,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x84,
+        .file_attr.mask             = 0x00000080,
+        .file_attr.reset_on         = 0x00000000,
+        .file_attr.reset_off        = 0x00000080,
+        .file_attr.width            = 4,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data8 = {
+    .i2c_bus                        = 9,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 89,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x84,
+        .file_attr.mask             = 0x00000100,
+        .file_attr.reset_on         = 0x00000000,
+        .file_attr.reset_off        = 0x00000100,
+        .file_attr.width            = 4,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data9 = {
+    .i2c_bus                        = 10,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 97,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x84,
+        .file_attr.mask             = 0x00000200,
+        .file_attr.reset_on         = 0x00000000,
+        .file_attr.reset_off        = 0x00000200,
+        .file_attr.width            = 4,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data10 = {
+    .i2c_bus                        = 11,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 105,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x84,
+        .file_attr.mask             = 0x00000400,
+        .file_attr.reset_on         = 0x00000000,
+        .file_attr.reset_off        = 0x00000400,
+        .file_attr.width            = 4,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data11 = {
+    .i2c_bus                        = 12,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 113,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x84,
+        .file_attr.mask             = 0x00000800,
+        .file_attr.reset_on         = 0x00000000,
+        .file_attr.reset_off        = 0x00000800,
+        .file_attr.width            = 4,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data12 = {
+    .i2c_bus                        = 13,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 121,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x84,
+        .file_attr.mask             = 0x00001000,
+        .file_attr.reset_on         = 0x00000000,
+        .file_attr.reset_off        = 0x00001000,
+        .file_attr.width            = 4,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data13 = {
+    .i2c_bus                        = 14,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 129,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x84,
+        .file_attr.mask             = 0x00002000,
+        .file_attr.reset_on         = 0x00000000,
+        .file_attr.reset_off        = 0x00002000,
+        .file_attr.width            = 4,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data14 = {
+    .i2c_bus                        = 15,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 137,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x84,
+        .file_attr.mask             = 0x00004000,
+        .file_attr.reset_on         = 0x00000000,
+        .file_attr.reset_off        = 0x00004000,
+        .file_attr.width            = 4,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data15 = {
+    .i2c_bus                        = 16,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 145,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x84,
+        .file_attr.mask             = 0x00008000,
+        .file_attr.reset_on         = 0x00000000,
+        .file_attr.reset_off        = 0x00008000,
+        .file_attr.width            = 4,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data16 = {
+    .i2c_bus                        = 21,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 153,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x84,
+        .file_attr.mask             = 0x00010000,
+        .file_attr.reset_on         = 0x00000000,
+        .file_attr.reset_off        = 0x00010000,
+        .file_attr.width            = 4,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data17 = {
+    .i2c_bus                        = 22,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 161,
+};
+
+
+struct i2c_board_info i2c_mux_pca954x_device_info[] = {
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data0,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data1,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data2,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data3,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data4,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data5,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data6,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data7,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data8,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data9,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data10,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data11,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data12,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data13,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data14,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data15,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data16,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data17,
+    },
+};
+
+static int __init wb_i2c_mux_pca954x_device_init(void)
+{
+    int i;
+    struct i2c_adapter *adap;
+    struct i2c_client *client;
+    i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data;
+
+    WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(i2c_mux_pca954x_device_info); i++) {
+        i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data;
+        i2c_mux_pca954x_device_info[i].addr = i2c_mux_pca954x_device_data->i2c_addr;
+        adap = i2c_get_adapter(i2c_mux_pca954x_device_data->i2c_bus);
+        if (adap == NULL) {
+            i2c_mux_pca954x_device_data->client = NULL;
+            printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_mux_pca954x_device_data->i2c_bus);
+            continue;
+        }
+        client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]);
+        if (!client) {
+            i2c_mux_pca954x_device_data->client = NULL;
+            printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n",
+                i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus);
+        } else {
+            i2c_mux_pca954x_device_data->client = client;
+        }
+        i2c_put_adapter(adap);
+    }
+    return 0;
+}
+
+static void __exit wb_i2c_mux_pca954x_device_exit(void)
+{
+    int i;
+    i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data;
+
+    WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(i2c_mux_pca954x_device_info) - 1; i >= 0; i--) {
+        i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data;
+        if (i2c_mux_pca954x_device_data->client) {
+            i2c_unregister_device(i2c_mux_pca954x_device_data->client);
+            i2c_mux_pca954x_device_data->client = NULL;
+        }
+    }
+}
+
+module_init(wb_i2c_mux_pca954x_device_init);
+module_exit(wb_i2c_mux_pca954x_device_exit);
+MODULE_DESCRIPTION("I2C MUX PCA954X Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_ocores_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_ocores_device.c
new file mode 100644
index 000000000000..c6635de2d320
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_ocores_device.c
@@ -0,0 +1,717 @@
+/*
+ * An wb_i2c_ocores_device driver for i2c ocores device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_i2c_ocores.h>
+
+static int g_wb_i2c_ocores_device_debug = 0;
+static int g_wb_i2c_ocores_device_error = 0;
+
+module_param(g_wb_i2c_ocores_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_ocores_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_i2c_ocores_device_debug) { \
+        printk(KERN_INFO "[WB_I2C_OCORE_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_I2C_OCORE_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_i2c_ocores_device_error) { \
+        printk(KERN_ERR "[WB_I2C_OCORE_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static i2c_ocores_device_t i2c_ocores_device_data0 = {
+    .adap_nr = 1,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0800,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 0,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data1 = {
+    .adap_nr = 2,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0820,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 1,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data2 = {
+    .adap_nr = 3,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0840,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 2,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data3 = {
+    .adap_nr = 4,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0860,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 3,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data4 = {
+    .adap_nr = 5,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0880,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 4,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data5 = {
+    .adap_nr = 6,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x08a0,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 5,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data6 = {
+    .adap_nr = 7,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x08c0,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 6,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data7 = {
+    .adap_nr = 8,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x08e0,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 7,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data8 = {
+    .adap_nr = 9,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0900,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 8,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data9 = {
+    .adap_nr = 10,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0920,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 9,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data10 = {
+    .adap_nr = 11,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0940,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 10,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data11 = {
+    .adap_nr = 12,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0960,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 11,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data12 = {
+    .adap_nr = 13,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0980,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 12,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data13 = {
+    .adap_nr = 14,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x09a0,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 13,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data14 = {
+    .adap_nr = 15,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x09c0,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 14,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data15 = {
+    .adap_nr = 16,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x09e0,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 15,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data16 = {
+    .adap_nr = 17,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0a00,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 16,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data17 = {
+    .adap_nr = 18,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0a20,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 17,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data18 = {
+    .adap_nr = 19,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0a40,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 18,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data19 = {
+    .adap_nr = 20,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0a60,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 19,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data20 = {
+    .adap_nr = 21,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0a80,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 20,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data21 = {
+    .adap_nr = 22,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0aa0,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 21,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data22 = {
+    .adap_nr = 23,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0ac0,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 22,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data23 = {
+    .adap_nr = 24,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0ae0,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_type =1,
+    .irq_offset = 23,
+    .pci_domain = 0,
+    .pci_bus = 3,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static void wb_i2c_ocores_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device i2c_ocores_device[] = {
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data0,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data1,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 3,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data2,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 4,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data3,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 5,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data4,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 6,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data5,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 7,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data6,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 8,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data7,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 9,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data8,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 10,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data9,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 11,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data10,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 12,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data11,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 13,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data12,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 14,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data13,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 15,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data14,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 16,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data15,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 17,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data16,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 18,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data17,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 19,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data18,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 20,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data19,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 21,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data20,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 22,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data21,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 23,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data22,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 24,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data23,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+};
+
+static int __init wb_i2c_ocores_device_init(void)
+{
+    int i;
+    int ret = 0;
+    i2c_ocores_device_t *i2c_ocores_device_data;
+
+    WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(i2c_ocores_device); i++) {
+        i2c_ocores_device_data = i2c_ocores_device[i].dev.platform_data;
+        ret = platform_device_register(&i2c_ocores_device[i]);
+        if (ret < 0) {
+            i2c_ocores_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-ocores-i2c.%d register failed!\n", i + 1);
+        } else {
+            i2c_ocores_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_i2c_ocores_device_exit(void)
+{
+    int i;
+    i2c_ocores_device_t *i2c_ocores_device_data;
+
+    WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(i2c_ocores_device) - 1; i >= 0; i--) {
+        i2c_ocores_device_data = i2c_ocores_device[i].dev.platform_data;
+        if (i2c_ocores_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&i2c_ocores_device[i]);
+        }
+    }
+}
+
+module_init(wb_i2c_ocores_device_init);
+module_exit(wb_i2c_ocores_device_exit);
+MODULE_DESCRIPTION("I2C OCORES Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_io_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_io_dev_device.c
new file mode 100644
index 000000000000..e4b1dde8bcae
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_io_dev_device.c
@@ -0,0 +1,125 @@
+/*
+ * An wb_io_dev_device driver for io device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_io_dev.h>
+
+static int g_wb_io_dev_device_debug = 0;
+static int g_wb_io_dev_device_error = 0;
+
+module_param(g_wb_io_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_io_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_IO_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_io_dev_device_debug) { \
+        printk(KERN_INFO "[WB_IO_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_IO_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_io_dev_device_error) { \
+        printk(KERN_ERR "[WB_IO_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+/* CPU_CPLD */
+static io_dev_device_t io_dev_device_data0 = {
+    .io_dev_name = "cpld0",
+    .io_base = 0xa00,
+    .io_len = 0x100,
+    .indirect_addr = 0,
+};
+
+/* BASE CPLD */
+static io_dev_device_t io_dev_device_data1 = {
+    .io_dev_name = "cpld1",
+    .io_base = 0x900,
+    .io_len = 0x100,
+    .indirect_addr = 0,
+};
+
+static void wb_io_dev_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device io_dev_device[] = {
+    {
+        .name   = "wb-io-dev",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &io_dev_device_data0,
+            .release = wb_io_dev_device_release,
+        },
+    },
+    {
+        .name   = "wb-io-dev",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &io_dev_device_data1,
+            .release = wb_io_dev_device_release,
+        },
+    },
+};
+
+static int __init wb_io_dev_device_init(void)
+{
+    int i;
+    int ret = 0;
+    io_dev_device_t *io_dev_device_data;
+
+    WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(io_dev_device); i++) {
+        io_dev_device_data = io_dev_device[i].dev.platform_data;
+        ret = platform_device_register(&io_dev_device[i]);
+        if (ret < 0) {
+            io_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-io-dev.%d register failed!\n", i + 1);
+        } else {
+            io_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_io_dev_device_exit(void)
+{
+    int i;
+    io_dev_device_t *io_dev_device_data;
+
+    WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(io_dev_device) - 1; i >= 0; i--) {
+        io_dev_device_data = io_dev_device[i].dev.platform_data;
+        if (io_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&io_dev_device[i]);
+        }
+    }
+}
+
+module_init(wb_io_dev_device_init);
+module_exit(wb_io_dev_device_exit);
+MODULE_DESCRIPTION("IO DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_pcie_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_pcie_dev_device.c
new file mode 100644
index 000000000000..aff6ed5f798a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_pcie_dev_device.c
@@ -0,0 +1,111 @@
+/*
+ * An wb_pcie_dev_device driver for pcie device function
+ *
+ * Copyright (C) 2024 Micas Networks Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_pcie_dev.h>
+
+static int g_wb_pcie_dev_device_debug = 0;
+static int g_wb_pcie_dev_device_error = 0;
+
+module_param(g_wb_pcie_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_pcie_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_pcie_dev_device_debug) { \
+        printk(KERN_INFO "[WB_PCIE_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_PCIE_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_pcie_dev_device_error) { \
+        printk(KERN_ERR "[WB_PCIE_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static pci_dev_device_t pcie_dev_device_data0 = {
+    .pci_dev_name = "fpga0",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x03,
+    .pci_slot = 0x00,
+    .pci_fn = 0,
+    .pci_bar = 0,
+    .bus_width = 4,
+};
+
+static void wb_pcie_dev_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device pcie_dev_device[] = {
+    {
+        .name   = "wb-pci-dev",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &pcie_dev_device_data0,
+            .release = wb_pcie_dev_device_release,
+        },
+    },
+};
+
+static int __init wb_pcie_dev_device_init(void)
+{
+    int i;
+    int ret = 0;
+    pci_dev_device_t *pcie_dev_device_data;
+
+    WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(pcie_dev_device); i++) {
+        pcie_dev_device_data = pcie_dev_device[i].dev.platform_data;
+        ret = platform_device_register(&pcie_dev_device[i]);
+        if (ret < 0) {
+            pcie_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-pci-dev.%d register failed!\n", i + 1);
+        } else {
+            pcie_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_pcie_dev_device_exit(void)
+{
+    int i;
+    pci_dev_device_t *pcie_dev_device_data;
+
+    WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(pcie_dev_device) - 1; i >= 0; i--) {
+        pcie_dev_device_data = pcie_dev_device[i].dev.platform_data;
+        if (pcie_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&pcie_dev_device[i]);
+        }
+    }
+}
+
+module_init(wb_pcie_dev_device_init);
+module_exit(wb_pcie_dev_device_exit);
+MODULE_DESCRIPTION("PCIE DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
new file mode 100644
index 000000000000..2c10ab9bbb28
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
@@ -0,0 +1,40 @@
+# configuration item: I2C address of CPLD
+# format: cpld_i2c_dev.bus_[cpld_slot]_[cpld_id] cpld_i2c_dev.addr_[cpld_slot]_[cpld_id]
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+# bus: I2C bus number of CPLD
+# addr: I2C address of CPLD
+cpld_i2c_dev.bus_0_3=0
+cpld_i2c_dev.addr_0_3=0x0d
+cpld_i2c_dev.bus_0_4=15
+cpld_i2c_dev.addr_0_4=0x51
+cpld_i2c_dev.bus_0_5=16
+cpld_i2c_dev.addr_0_5=0x52
+
+
+# configuration item: LPC address of CPLD
+# format: cpld_lpc_addr_[cpld_slot]_[cpld_id]
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+cpld_lpc_dev_0_0=0x700
+cpld_lpc_dev_0_1=0x900
+cpld_lpc_dev_0_2=0xb00
+
+
+# configuration item: CPLD access method, lpc or i2c
+# format: mode_cpld_[cpld_slot][cpld_slot]=lpc/i2c
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+mode_cpld_0_0=lpc
+mode_cpld_0_1=lpc
+mode_cpld_0_2=lpc
+mode_cpld_0_3=i2c
+mode_cpld_0_4=i2c
+mode_cpld_0_5=i2c
+
+
+# configuration item: the number of CPLD
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: CPLD main_dev is 4
+# minor_dev: CPLD minor_dev not exist
+dev_num_4_0=6
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg
new file mode 100644
index 000000000000..eb2d7faf58c8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_FAN.cfg
@@ -0,0 +1,112 @@
+# configuration item: the number of fans
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: fan main_dev is 1
+# minor_dev: fan minor_dev not exist(0)
+dev_num_1_0=2
+
+
+# configuration item: the number of rotors
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: rotor main_dev is 1
+# minor_dev: rotor minor_dev is 5
+dev_num_1_5=1
+
+
+# configuration item: fan presence status
+# format: dev_present_status_[main_dev_id][fan_index]
+# main_dev_id: fan main_dev_id is 1
+# fan_index: start from 1
+dev_present_status.mode_1_1=config
+dev_present_status.src_1_1=cpld
+dev_present_status.frmt_1_1=bit
+dev_present_status.pola_1_1=negative
+dev_present_status.addr_1_1=0x00010094
+dev_present_status.len_1_1=1
+dev_present_status.bit_offset_1_1=0
+
+dev_present_status.mode_1_2=config
+dev_present_status.src_1_2=cpld
+dev_present_status.frmt_1_2=bit
+dev_present_status.pola_1_2=negative
+dev_present_status.addr_1_2=0x00010094
+dev_present_status.len_1_2=1
+dev_present_status.bit_offset_1_2=1
+
+
+# configuration item: fan rotor status
+# format: fan_roll_status_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_roll_status.mode_1_0=config
+fan_roll_status.int_cons_1_0=
+fan_roll_status.src_1_0=cpld
+fan_roll_status.frmt_1_0=bit
+fan_roll_status.pola_1_0=positive
+fan_roll_status.fpath_1_0=
+fan_roll_status.addr_1_0=0x00010095
+fan_roll_status.len_1_0=1
+fan_roll_status.bit_offset_1_0=0
+
+
+fan_roll_status.mode_2_0=config
+fan_roll_status.int_cons_2_0=
+fan_roll_status.src_2_0=cpld
+fan_roll_status.frmt_2_0=bit
+fan_roll_status.pola_2_0=positive
+fan_roll_status.fpath_2_0=
+fan_roll_status.addr_2_0=0x00010095
+fan_roll_status.len_2_0=1
+fan_roll_status.bit_offset_2_0=1
+
+
+# configuration item: fan speed
+# format: fan_speed_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_speed.mode_1_0=config
+fan_speed.int_cons_1_0=
+fan_speed.src_1_0=cpld
+fan_speed.frmt_1_0=byte
+fan_speed.pola_1_0=
+fan_speed.fpath_1_0=
+fan_speed.addr_1_0=0x00010098
+fan_speed.len_1_0=1
+fan_speed.bit_offset_1_0=
+fan_speed.int_extra1_1_0=1
+
+
+fan_speed.mode_2_0=config
+fan_speed.int_cons_2_0=
+fan_speed.src_2_0=cpld
+fan_speed.frmt_2_0=byte
+fan_speed.pola_2_0=
+fan_speed.fpath_2_0=
+fan_speed.addr_2_0=0x00010099
+fan_speed.len_2_0=1
+fan_speed.bit_offset_2_0=
+fan_speed.int_extra1_2_0=1
+
+
+# configuration item: fan pwm
+# format: fan_ratio_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_ratio.mode_1_0=config
+fan_ratio.int_cons_1_0=
+fan_ratio.src_1_0=cpld
+fan_ratio.frmt_1_0=byte
+fan_ratio.pola_1_0=
+fan_ratio.fpath_1_0=
+fan_ratio.addr_1_0=0x00010090
+fan_ratio.len_1_0=1
+fan_ratio.bit_offset_1_0=
+
+fan_ratio.mode_2_0=config
+fan_ratio.int_cons_2_0=
+fan_ratio.src_2_0=cpld
+fan_ratio.frmt_2_0=byte
+fan_ratio.pola_2_0=
+fan_ratio.fpath_2_0=
+fan_ratio.addr_2_0=0x00010091
+fan_ratio.len_2_0=1
+fan_ratio.bit_offset_2_0=
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg
new file mode 100644
index 000000000000..8b2d41974eb3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_PSU.cfg
@@ -0,0 +1,64 @@
+# configuration item: the number of psus
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: psu main_dev is 2
+# minor_dev: psu minor_dev not exist(0)
+dev_num_2_0=2
+
+
+# configuration item: psu status
+# format: psu_status_[psu_index]_[status_id]
+# psu_index: start from 1
+# status_id: 0: presence 1: output 2: alert
+# psu1 presence status
+psu_status.mode_1_0=config
+psu_status.src_1_0=cpld
+psu_status.frmt_1_0=bit
+psu_status.pola_1_0=negative
+psu_status.addr_1_0=0x00020010
+psu_status.len_1_0=1
+psu_status.bit_offset_1_0=0
+
+# psu1 output status
+psu_status.mode_1_1=config
+psu_status.src_1_1=cpld
+psu_status.frmt_1_1=bit
+psu_status.pola_1_1=positive
+psu_status.addr_1_1=0x00020011
+psu_status.len_1_1=1
+psu_status.bit_offset_1_1=0
+
+# psu1 alert status
+psu_status.mode_1_2=config
+psu_status.src_1_2=cpld
+psu_status.frmt_1_2=bit
+psu_status.pola_1_2=negative
+psu_status.addr_1_2=0x00020011
+psu_status.len_1_2=1
+psu_status.bit_offset_1_2=0
+
+# psu2 presence status
+psu_status.mode_2_0=config
+psu_status.src_2_0=cpld
+psu_status.frmt_2_0=bit
+psu_status.pola_2_0=negative
+psu_status.addr_2_0=0x00020010
+psu_status.len_2_0=1
+psu_status.bit_offset_2_0=1
+
+# psu2 output status
+psu_status.mode_2_1=config
+psu_status.src_2_1=cpld
+psu_status.frmt_2_1=bit
+psu_status.pola_2_1=positive
+psu_status.addr_2_1=0x00020011
+psu_status.len_2_1=1
+psu_status.bit_offset_2_1=1
+
+# psu2 alert status
+psu_status.mode_2_2=config
+psu_status.src_2_2=cpld
+psu_status.frmt_2_2=bit
+psu_status.pola_2_2=negative
+psu_status.addr_2_2=0x00020011
+psu_status.len_2_2=1
+psu_status.bit_offset_2_2=1
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg
new file mode 100644
index 000000000000..9cfdcd29eb8f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/WB_PLAT_SFF.cfg
@@ -0,0 +1,54 @@
+# configuration item: the number of sffs
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: sff main_dev is 3
+# minor_dev: sff minor_dev not exist(0)
+dev_num_3_0=4
+
+
+# configuration item: The directory name of sff sysfs
+# format: sff_dir_name_[sff_index]
+# sff_index: start from 1
+sff_dir_name_1 =sff49
+sff_dir_name_2 =sff50
+sff_dir_name_3 =sff51
+sff_dir_name_4 =sff52
+
+
+# configuration item: sff cpld register status
+# format: sff_cpld_reg_[sff_index]_[cpld_reg]
+# sff_index: start from 1
+# cpld_reg: 1: power_on, 2: tx_fault, 3: tx_dis, 4:pre_n, 5:rx_los
+# 6: reset, 7: lpmode, 8: module_present, 9: interrupt
+
+# sff cpld presence status
+sff_cpld_reg.mode_1_8=config
+sff_cpld_reg.src_1_8=cpld
+sff_cpld_reg.frmt_1_8=bit
+sff_cpld_reg.pola_1_8=negative
+sff_cpld_reg.addr_1_8=0x00020030
+sff_cpld_reg.len_1_8=1
+sff_cpld_reg.bit_offset_1_8=1
+
+sff_cpld_reg.mode_2_8=config
+sff_cpld_reg.src_2_8=cpld
+sff_cpld_reg.frmt_2_8=bit
+sff_cpld_reg.pola_2_8=negative
+sff_cpld_reg.addr_2_8=0x00020030
+sff_cpld_reg.len_2_8=1
+sff_cpld_reg.bit_offset_2_8=0
+
+sff_cpld_reg.mode_3_8=config
+sff_cpld_reg.src_3_8=cpld
+sff_cpld_reg.frmt_3_8=bit
+sff_cpld_reg.pola_3_8=negative
+sff_cpld_reg.addr_3_8=0x00020030
+sff_cpld_reg.len_3_8=1
+sff_cpld_reg.bit_offset_3_8=3
+
+sff_cpld_reg.mode_4_8=config
+sff_cpld_reg.src_4_8=cpld
+sff_cpld_reg.frmt_4_8=bit
+sff_cpld_reg.pola_4_8=negative
+sff_cpld_reg.addr_4_8=0x00020030
+sff_cpld_reg.len_4_8=1
+sff_cpld_reg.bit_offset_4_8=2
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/cfg_file_name b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/cfg_file_name
new file mode 100644
index 000000000000..5f49420441a5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/plat_sysfs_cfg/cfg_file_name
@@ -0,0 +1,4 @@
+WB_PLAT_CPLD
+WB_PLAT_FAN
+WB_PLAT_PSU
+WB_PLAT_SFF
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/service/subnetwork.service b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/service/subnetwork.service
new file mode 100644
index 000000000000..666046592116
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/service/subnetwork.service
@@ -0,0 +1,13 @@
+[Unit]
+Description=Configuration eth0.4088 subnetwork
+After=network.target
+DefaultDependencies=no
+
+[Service]
+Type=oneshot
+ExecStart=/usr/local/bin/subnetwork.py start
+ExecStop=/usr/local/bin/subnetwork.py stop
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/setup.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/setup.py
new file mode 100755
index 000000000000..a3be1cd61fbb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/setup.py
@@ -0,0 +1,40 @@
+from setuptools import setup
+
+setup(
+    name='sonic-platform',
+    version='1.0',
+    description='SONiC platform API implementation',
+    license='Apache 2.0',
+    author='SONiC Team',
+    author_email='support',
+    url='',
+    maintainer='support',
+    maintainer_email='',
+    packages=[
+        'sonic_platform',
+        'plat_hal',
+        'wbutil',
+        'eepromutil',
+        'restful_util',
+        'hal-config',
+        'config',
+    ],
+    py_modules=[
+        'hal_pltfm',
+        'platform_util',
+        'platform_intf',
+    ],
+    classifiers=[
+        'Development Status :: 3 - Alpha',
+        'Environment :: Plugins',
+        'Intended Audience :: Developers',
+        'Intended Audience :: Information Technology',
+        'Intended Audience :: System Administrators',
+        'License :: OSI Approved :: Apache Software License',
+        'Natural Language :: English',
+        'Operating System :: POSIX :: Linux',
+        'Programming Language :: Python :: 3.7',
+        'Topic :: Utilities',
+    ],
+    keywords='sonic SONiC platform PLATFORM',
+)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/__init__.py
new file mode 100644
index 000000000000..b70995a582fc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/__init__.py
@@ -0,0 +1,2 @@
+__all__ = ["platform", "chassis", "sfp", "eeprom", "component", "thermal", "psu", "fan", "fan_drawer", "watchdog"]
+from . import platform
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/chassis.py
new file mode 100644
index 000000000000..96855d0d57ff
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/chassis.py
@@ -0,0 +1,480 @@
+#!/usr/bin/env python3
+
+#############################################################################
+#
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
+#
+#############################################################################
+
+try:
+    import time
+    import sys
+    from sonic_platform_base.chassis_base import ChassisBase
+    from sonic_platform.sfp import Sfp
+    from sonic_platform.psu import Psu
+    # from sonic_platform.fan import Fan
+    from sonic_platform.fan_drawer import FanDrawer
+    from sonic_platform.thermal import Thermal
+    # from sonic_platform.watchdog import Watchdog
+    from sonic_platform.component import Component
+    from sonic_platform.eeprom import Eeprom
+    from plat_hal.baseutil import baseutil
+
+    from plat_hal.interface import interface
+    from .restful_interface import RestfulApi
+
+except ImportError as error:
+    raise ImportError(str(error) + "- required module not found")from error
+
+
+class Chassis(ChassisBase):
+    """
+    Platform-specific Chassis class
+    """
+    # List of Dcdc objects representing all dcdc
+    # available on the chassis
+    _dcdc_list = None
+
+    STATUS_INSERTED = "1"
+    STATUS_REMOVED = "0"
+    STATUS_NORMAL = "0"
+    STATUS_ABNORMAL = "1"
+    sfp_present_dict = {}
+    fan_present_dict = {}
+    voltage_status_dict = {}
+
+    def __init__(self):
+        ChassisBase.__init__(self)
+        self.int_case = interface()
+        self.restful = RestfulApi()
+
+        self.led_map = {
+            "0": self.STATUS_LED_COLOR_OFF,
+            "1": self.STATUS_LED_COLOR_GREEN,
+            "2": self.STATUS_LED_COLOR_AMBER,
+            "3": self.STATUS_LED_COLOR_RED
+        }
+
+        # Initialize SFP list
+
+        # sfp.py will read eeprom contents and retrive the eeprom data.
+        # It will also provide support sfp controls like reset and setting
+        # low power mode.
+        # We pass the eeprom path and sfp control path from chassis.py
+        # So that sfp.py implementation can be generic to all platforms
+        try:
+            self._sfp_list = []
+            self.port_num = baseutil.get_config().get("sfps", None).get("port_num", 0)
+            self.port_start_index = baseutil.get_config().get("sfps", None).get("port_index_start", 0)
+            # fix problem with first index is 1, we add a fake sfp node
+            if self.port_start_index == 1:
+                self._sfp_list.append(Sfp(1))
+
+            # sfp id always start at 1
+            for index in range(1, self.port_num + 1):
+                self._sfp_list.append(Sfp(index))
+
+            for i in range(self.port_start_index, self.port_start_index + self.port_num):
+                self.sfp_present_dict[i] = self.STATUS_REMOVED
+
+        except Exception as err:
+            print("SFP init error: %s" % str(err))
+
+        try:
+            self._eeprom = Eeprom(self.int_case)
+        except Exception as err:
+            print("EEPROM INIT ERROR %s" % str(err))
+
+        # Initialize watchdog
+        # self._watchdog = Watchdog()
+        fantray_num = self.restful.get_fan_total_number()
+        for index in range(fantray_num):
+            fandrawer = FanDrawer(self.restful, index + 1)
+            self._fan_drawer_list.append(fandrawer)
+            self._fan_list.extend(fandrawer._fan_list)
+
+        psu_num = self.restful.get_psu_total_number()
+        for index in range(psu_num):
+            psuobj = Psu(self.restful, index + 1)
+            self._psu_list.append(psuobj)
+
+        thermal_num = self.restful.get_thermal_total_number()
+        for index in range(thermal_num):
+            self._thermal_list.append(Thermal(self.restful, index))
+
+        cpld_num = self.restful.get_cpld_total_number()
+        for index in range(cpld_num):
+            self._component_list.append(Component(self.restful, index, "cpld"))
+        fpga_num = self.restful.get_fpga_total_number()
+        for index in range(fpga_num):
+            self._component_list.append(Component(self.restful, index, "fpga"))
+        bois_num = self.restful.get_bios_total_number()
+        for index in range(bois_num):
+            self._component_list.append(Component(self.restful, index, "bios"))
+        bmc_num = self.restful.get_bmc_total_number()
+        for index in range(bmc_num):
+            self._component_list.append(Component(self.restful, index, "bmc"))
+
+    def get_name(self):
+        """
+        Retrieves the name of the chassis
+        Returns:
+            string: The name of the chassis
+        """
+        name = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        name = sys_eeprom.modelstr(e)
+        if name is None:
+            return ''
+        return name
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the chassis
+        Returns:
+            bool: True if chassis is present, False if not
+        """
+        return True
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the chassis
+        Returns:
+            string: Model/part number of chassis
+        """
+        model = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        model = sys_eeprom.modelnumber(e)
+        if model is None:
+            return ''
+        return model
+
+    def get_serial_number(self):
+        """
+        Retrieves the hardware serial number for the chassis
+
+        Returns:
+            A string containing the hardware serial number for this chassis.
+        """
+        serial_number = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        serial_number = sys_eeprom.serial_number_str(e)
+        if serial_number is None:
+            return ''
+
+        return serial_number
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        device_version = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        device_version = sys_eeprom.deviceversion(e)
+        if device_version is None:
+            return ''
+
+        return device_version
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the chassis (Service tag)
+        Returns:
+            string: Serial number of chassis
+        """
+        return self.get_serial_number()
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the chassis
+        Returns:
+            bool: A boolean value, True if chassis is operating properly
+            False if not
+        """
+        return True
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
+
+    def initizalize_system_led(self):
+        return True
+
+    def set_status_led(self, color):
+        return False
+
+    def get_status_led(self):
+        """
+        Gets the state of the system LED
+
+        Returns:
+            A string, one of the valid LED color strings which could be vendor
+            specified.
+        """
+        led_status = None
+        led_status = self.restful.get_sysled()
+        if led_status is None:
+            return 'N/A'
+        return self.led_map.get(led_status, "unknown status %s" % led_status)
+
+    def get_base_mac(self):
+        """
+        Retrieves the base MAC address for the chassis
+
+        Returns:
+            A string containing the MAC address in the format
+            'XX:XX:XX:XX:XX:XX'
+        """
+        base_mac = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        base_mac = sys_eeprom.base_mac_addr(e)
+        if base_mac is None:
+            return ''
+
+        return base_mac.upper()
+
+    def get_system_eeprom_info(self):
+        """
+        Retrieves the full content of system EEPROM information for the chassis
+
+        Returns:
+            A dictionary where keys are the type code defined in
+            OCP ONIE TlvInfo EEPROM format and values are their corresponding
+            values.
+            Ex. { '0x21':'AG9064', '0x22':'V1.0', '0x23':'AG9064-0109867821',
+                  '0x24':'001c0f000fcd0a', '0x25':'02/03/2018 16:22:00',
+                  '0x26':'01', '0x27':'REV01', '0x28':'AG9064-C2358-16G'}
+        """
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return {}
+        return sys_eeprom.system_eeprom_info()
+
+    def get_thermal_manager(self):
+        """
+        Retrieves thermal manager class on this chassis
+        :return: A class derived from ThermalManagerBase representing the
+        specified thermal manager. ThermalManagerBase is returned as default
+        """
+        return False
+
+    def get_reboot_cause(self):
+        """
+        Retrieves the cause of the previous reboot
+        Returns:
+            A tuple (string, string) where the first element is a string
+            containing the cause of the previous reboot. This string must be
+            one of the predefined strings in this class. If the first string
+            is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
+            to pass a description of the reboot cause.
+        """
+        reboot_cause_msg = self.int_case.get_cpu_reboot_cause()
+        if "Power Loss" in reboot_cause_msg:
+            reboot_cause_type = self.REBOOT_CAUSE_POWER_LOSS
+        elif "Watchdog" in reboot_cause_msg:
+            reboot_cause_type = self.REBOOT_CAUSE_WATCHDOG
+        elif "BMC reboot" in reboot_cause_msg or "BMC powerdown" in reboot_cause_msg:
+            reboot_cause_type = self.REBOOT_CAUSE_HARDWARE_OTHER
+        elif "Thermal Overload: ASIC" in reboot_cause_msg:
+            reboot_cause_type = self.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC
+        elif "Thermal Overload: Other" in reboot_cause_msg:
+            reboot_cause_type = self.REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER
+        elif "Other" in reboot_cause_msg:
+            reboot_cause_type = self.REBOOT_CAUSE_NON_HARDWARE
+        else:
+            reboot_cause_type = self.REBOOT_CAUSE_NON_HARDWARE
+        return (reboot_cause_type, reboot_cause_msg)
+
+    def get_module(self, index):
+        """
+        Retrieves module represented by (0-based) index <index>
+
+        Args:
+            index: An integer, the index (0-based) of the module to
+            retrieve
+
+        Returns:
+            An object dervied from ModuleBase representing the specified
+            module
+        """
+        module = None
+
+        try:
+            if self.get_num_modules():
+                module = self._module_list[index]
+        except IndexError:
+            sys.stderr.write("Module index {} out of range (0-{})\n".format(
+                             index, len(self._module_list) - 1))
+
+        return module
+
+    def get_fan_drawer(self, index):
+        """
+        Retrieves fan drawers represented by (0-based) index <index>
+
+        Args:
+            index: An integer, the index (0-based) of the fan drawer to
+            retrieve
+
+        Returns:
+            An object dervied from FanDrawerBase representing the specified fan
+            drawer
+        """
+        fan_drawer = None
+
+        try:
+            if self.get_num_fan_drawers():
+                fan_drawer = self._fan_drawer_list[index]
+        except IndexError:
+            sys.stderr.write("Fan drawer index {} out of range (0-{})\n".format(
+                             index, len(self._fan_drawer_list) - 1))
+
+        return fan_drawer
+
+    def get_change_event(self, timeout=0):
+        """
+        Returns a nested dictionary containing all devices which have
+        experienced a change at chassis level
+
+        Args:
+            timeout: Timeout in milliseconds (optional). If timeout == 0,
+                this method will block until a change is detected.
+
+        Returns:
+            (bool, dict):
+                - bool: True if call successful, False if not;
+                - dict: A nested dictionary where key is a device type,
+                        value is a dictionary with key:value pairs in the format of
+                        {'device_id':'device_event'}, where device_id is the device ID
+                        for this device and device_event.
+                        The known devices's device_id and device_event was defined as table below.
+                         -----------------------------------------------------------------
+                         device   |     device_id       |  device_event  |  annotate
+                         -----------------------------------------------------------------
+                         'fan'          '<fan number>'     '0'              Fan removed
+                                                           '1'              Fan inserted
+
+                         'sfp'          '<sfp number>'     '0'              Sfp removed
+                                                           '1'              Sfp inserted
+                                                           '2'              I2C bus stuck
+                                                           '3'              Bad eeprom
+                                                           '4'              Unsupported cable
+                                                           '5'              High Temperature
+                                                           '6'              Bad cable
+
+                         'voltage'      '<monitor point>'  '0'              Vout normal
+                                                           '1'              Vout abnormal
+                         --------------------------------------------------------------------
+                  Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0', '12':'1'},
+                       'voltage':{'U20':'0', 'U21':'1'}}
+                  Indicates that:
+                     fan 0 has been removed, fan 2 has been inserted.
+                     sfp 11 has been removed, sfp 12 has been inserted.
+                     monitored voltage U20 became normal, voltage U21 became abnormal.
+                  Note: For sfp, when event 3-6 happened, the module will not be avalaible,
+                        XCVRD shall stop to read eeprom before SFP recovered from error status.
+        """
+
+        change_event_dict = {"fan": {}, "sfp": {}, "voltage": {}}
+
+        start_time = time.time()
+        forever = False
+
+        if timeout == 0:
+            forever = True
+        elif timeout > 0:
+            timeout = timeout / float(1000)  # Convert to secs
+        else:
+            print("get_change_event:Invalid timeout value: %s" % timeout)
+            return False, change_event_dict
+
+        end_time = start_time + timeout
+        if start_time > end_time:
+            print("get_change_event:time wrap / invalid timeout value: %s" % timeout)
+            return False, change_event_dict  # Time wrap or possibly incorrect timeout
+        try:
+            while timeout >= 0:
+                # check for sfp
+                sfp_change_dict = self.get_transceiver_change_event()
+
+                if sfp_change_dict:
+                    change_event_dict["sfp"] = sfp_change_dict
+                    return True, change_event_dict
+                if forever:
+                    time.sleep(1)
+                else:
+                    timeout = end_time - time.time()
+                    if timeout >= 1:
+                        time.sleep(1)  # We poll at 1 second granularity
+                    else:
+                        if timeout > 0:
+                            time.sleep(timeout)
+                        return True, change_event_dict
+        except Exception as e:
+            print(e)
+        print("get_change_event: Should not reach here.")
+        return False, change_event_dict
+
+    def get_transceiver_change_event(self):
+        current_sfp_present_dict = {}
+        ret_dict = {}
+
+        # Check for OIR events and return ret_dict
+        for i in range(self.port_start_index, self.port_start_index + self.port_num):
+            sfp = self._sfp_list[i]
+            if sfp.get_presence():
+                current_sfp_present_dict[i] = self.STATUS_INSERTED
+
+            else:
+                current_sfp_present_dict[i] = self.STATUS_REMOVED
+
+        # Update reg value
+        if current_sfp_present_dict == self.sfp_present_dict:
+            return ret_dict
+
+        for index, status in current_sfp_present_dict.items():
+            if self.sfp_present_dict[index] != status:
+                ret_dict[index] = status
+
+        self.sfp_present_dict = current_sfp_present_dict
+
+        return ret_dict
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/component.py
new file mode 100644
index 000000000000..85f27a016fb2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/component.py
@@ -0,0 +1,173 @@
+#!/usr/bin/env python3
+
+########################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the Components' (e.g., BIOS, CPLD, FPGA, etc.) available in
+# the platform
+#
+########################################################################
+
+try:
+    import time
+    import subprocess
+    import os
+    from sonic_platform_base.component_base import ComponentBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+
+FIRMWARE_UPDATE_DIR = "/tmp/.firmwareupdate/"
+
+class Component(ComponentBase):
+    """Platform-specific Component class"""
+
+    def __init__(self, interface_obj, index, fw_type):
+
+        self.restful = interface_obj
+        self.fw_id = fw_type + str(index)
+
+    def get_fw_info(self):
+        return self.restful.get_fw_by_id(self.fw_id)
+
+    def get_name(self):
+        """
+        Retrieves the name of the component
+
+        Returns:
+            A string containing the name of the component
+        """
+        fw_dict = self.get_fw_info()
+        if not fw_dict:
+            return "N/A"
+        return fw_dict.get("alias", "N/A")
+
+    def get_description(self):
+        """
+        Retrieves the description of the component
+
+        Returns:
+            A string containing the description of the component
+        """
+        fw_dict = self.get_fw_info()
+        if not fw_dict:
+            return "N/A"
+        return fw_dict.get("type", "N/A")
+
+    def get_firmware_version(self):
+        """
+        Retrieves the firmware version of the component
+
+        Note: the firmware version will be read from HW
+
+        Returns:
+            A string containing the firmware version of the component
+        """
+        fw_dict = self.get_fw_info()
+        if not fw_dict:
+            return "N/A"
+        return fw_dict.get("firmware_version", "N/A")
+
+    def get_available_firmware_version(self, image_path):
+        """
+        Retrieves the available firmware version of the component
+
+        Note: the firmware version will be read from image
+
+        Args:
+            image_path: A string, path to firmware image
+
+        Returns:
+            A string containing the available firmware version of the component
+        """
+        raise NotImplementedError
+
+    def get_firmware_update_notification(self, image_path):
+        """
+        Retrieves a notification on what should be done in order to complete
+        the component firmware update
+
+        Args:
+            image_path: A string, path to firmware image
+
+        Returns:
+            A string containing the component firmware update notification if required.
+            By default 'None' value will be used, which indicates that no actions are required
+        """
+        return None
+
+    def install_firmware(self, image_path):
+        """
+        Installs firmware to the component
+
+        This API performs firmware installation only: this may/may not be the same as firmware update.
+        In case platform component requires some extra steps (apart from calling Low Level Utility)
+        to load the installed firmware (e.g, reboot, power cycle, etc.) - this must be done manually by user
+
+        Note: in case immediate actions are required to complete the component firmware update
+        (e.g., reboot, power cycle, etc.) - will be done automatically by API and no return value provided
+
+        Args:
+            image_path: A string, path to firmware image
+
+        Returns:
+            A boolean, True if install was successful, False if not
+        """
+        if not os.path.isfile(image_path):
+            print("ERROR: %s not found" % image_path)
+            return False
+        cmdstr = "upgrade.py cold %s %d" % (image_path, 0)
+        status, output = subprocess.getstatusoutput(cmdstr)
+        if status == 0:
+            print("INFO: %s firmware install succeeded" % self.get_name())
+            return True
+        print("%s install failed. status:%d, output:\n%s" % (self.get_name(), status, output))
+        return False
+
+    def update_firmware(self, image_path):
+        """
+        Updates firmware of the component
+
+        This API performs firmware update: it assumes firmware installation and loading in a single call.
+        In case platform component requires some extra steps (apart from calling Low Level Utility)
+        to load the installed firmware (e.g, reboot, power cycle, etc.) - this will be done automatically by API
+
+        Args:
+            image_path: A string, path to firmware image
+
+        Raises:
+            RuntimeError: update failed
+        """
+        raise RuntimeError("not support")
+
+    def auto_update_firmware(self, image_path, boot_type):
+        """
+        Updates firmware of the component
+
+        This API performs firmware update automatically based on boot_type: it assumes firmware installation
+        and/or creating a loading task during the reboot, if needed, in a single call.
+        In case platform component requires some extra steps (apart from calling Low Level Utility)
+        to load the installed firmware (e.g, reboot, power cycle, etc.) - this will be done automatically during the reboot.
+        The loading task will be created by API.
+
+        Args:
+            image_path: A string, path to firmware image
+            boot_type: A string, reboot type following the upgrade
+                         - none/fast/warm/cold
+
+        Returns:
+            Output: A return code
+                return_code: An integer number, status of component firmware auto-update
+                    - return code of a positive number indicates successful auto-update
+                        - status_installed = 1
+                        - status_updated = 2
+                        - status_scheduled = 3
+                    - return_code of a negative number indicates failed auto-update
+                        - status_err_boot_type = -1
+                        - status_err_image = -2
+                        - status_err_unknown = -3
+
+        Raises:
+            RuntimeError: auto-update failure cause
+        """
+        raise RuntimeError("not support")
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/eeprom.py
new file mode 100644
index 000000000000..05fcc3c25678
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/eeprom.py
@@ -0,0 +1,92 @@
+#!/usr/bin/env python3
+########################################################################
+#
+# Module contains platform specific implementation of SONiC Platform
+# Base API and provides the EEPROMs' information.
+#
+# The different EEPROMs available are as follows:
+# - System EEPROM : Contains Serial number, Service tag, Base MA
+#                   address, etc. in ONIE TlvInfo EEPROM format.
+# - PSU EEPROM : Contains Serial number, Part number, Service Tag,
+#                PSU type, Revision.
+# - Fan EEPROM : Contains Serial number, Part number, Service Tag,
+#                Fan type, Number of Fans in Fantray, Revision.
+########################################################################
+
+try:
+    from sonic_eeprom import eeprom_tlvinfo
+except ImportError as error:
+    raise ImportError(str(error) + "- required module not found") from error
+
+
+class Eeprom(eeprom_tlvinfo.TlvInfoDecoder):
+
+    def __init__(self, interface_obj):
+        self.int_case = interface_obj
+        self.name = "ONIE_E2"
+
+        eeprom_path = self.int_case.get_onie_e2_path(self.name)
+        if eeprom_path is None:
+            raise ValueError("get eeprom path failed")
+
+        super().__init__(eeprom_path, 0, "", True)
+
+    def modelnumber(self, e):
+        '''
+        Returns the value field of the model(part) number TLV as a string
+        '''
+        (is_valid, t) = self.get_tlv_field(e, self._TLV_CODE_PART_NUMBER)
+        if not is_valid:
+            return super().part_number_str(e)
+
+        return t[2].decode("ascii")
+
+    def deviceversion(self, e):
+        '''
+        Returns the value field of the Device Version as a string
+        '''
+        (is_valid, t) = self.get_tlv_field(e, self._TLV_CODE_DEVICE_VERSION)
+        if not is_valid:
+            return "N/A"
+
+        return str(ord(t[2]))
+
+    def system_eeprom_info(self):
+        '''
+        Retrieves the full content of system EEPROM information for the chassis
+
+        Returns:
+            A dictionary where keys are the type code defined in
+            OCP ONIE TlvInfo EEPROM format and values are their corresponding
+            values.
+            Ex. { '0x21':'AG9064', '0x22':'V1.0', '0x23':'AG9064-0109867821',
+                  '0x24':'001c0f000fcd0a', '0x25':'02/03/2018 16:22:00',
+                  '0x26':'01', '0x27':'REV01', '0x28':'AG9064-C2358-16G'}
+        '''
+        sys_eeprom_dict = {}
+        e = self.read_eeprom()
+        if self._TLV_HDR_ENABLED:
+            if not self.is_valid_tlvinfo_header(e):
+                return {}
+            total_len = (e[9] << 8) | e[10]
+            tlv_index = self._TLV_INFO_HDR_LEN
+            tlv_end = self._TLV_INFO_HDR_LEN + total_len
+        else:
+            tlv_index = self.eeprom_start
+            tlv_end = self._TLV_INFO_MAX_LEN
+
+        while (tlv_index + 2) < len(e) and tlv_index < tlv_end:
+            if not self.is_valid_tlv(e[tlv_index:]):
+                break
+
+            tlv = e[tlv_index:tlv_index + 2 + e[tlv_index + 1]]
+            code = "0x%02X" % tlv[0]
+            name, value = self.decoder(None, tlv)
+            sys_eeprom_dict[code] = value
+
+            if e[tlv_index] == self._TLV_CODE_QUANTA_CRC or \
+                    e[tlv_index] == self._TLV_CODE_CRC_32:
+                break
+            tlv_index += e[tlv_index + 1] + 2
+
+        return sys_eeprom_dict
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/fan.py
new file mode 100644
index 000000000000..d4735bb98126
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/fan.py
@@ -0,0 +1,324 @@
+#!/usr/bin/env python3
+########################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the Fans' information which are available in the platform.
+#
+########################################################################
+
+try:
+    import time
+    from sonic_platform_base.fan_base import FanBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+PSU_NOT_PRESENCE = 0x01
+
+class Fan(FanBase):
+    """Platform-specific Fan class"""
+
+    def __init__(self, interface_obj, fantray_index, fan_index, psu_fan=False, psu_index=0):
+        self.restful = interface_obj
+        self.fantray_index = fantray_index
+        self.fan_index = fan_index
+        self.psu_index = psu_index
+        self.is_psu_fan = psu_fan
+        if not self.is_psu_fan:
+            self.name = "fan" + str(fantray_index)
+        else:
+            self.name = "psu" + str(psu_index)
+
+        self.led_map = {
+            "0": self.STATUS_LED_COLOR_OFF,
+            "1": self.STATUS_LED_COLOR_GREEN,
+            "2": self.STATUS_LED_COLOR_AMBER,
+            "3": self.STATUS_LED_COLOR_RED
+        }
+
+    def fan_dict_update(self):
+        if not self.is_psu_fan:
+            return self.restful.get_fan_info(self.name)
+        else:
+            return self.restful.get_psu_info(self.name)
+
+    def get_name(self):
+        """
+        Retrieves the fan name
+        Returns:
+            string: The name of the device
+        """
+        if not self.is_psu_fan:
+            return "Fantray{}_{}".format(self.fantray_index, self.fan_index)
+        return "PSU{}_FAN{}".format(self.psu_index, self.fan_index)
+
+    def get_model(self):
+        """
+        Retrieves the part number of the FAN
+        Returns:
+            string: Part number of FAN
+        """
+        if not self.is_psu_fan:
+            fan_info = self.fan_dict_update()
+            if fan_info is None:
+                return 'N/A'
+            return fan_info.get("model_name", 'N/A')
+        else:
+            return 'N/A'
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the FAN
+        Returns:
+            string: Serial number of FAN
+        """
+        if not self.is_psu_fan:
+            fan_info = self.fan_dict_update()
+            if fan_info is None:
+                return 'N/A'
+            return fan_info.get("serial_number", 'N/A')
+        else:
+            return 'N/A'
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the FAN
+        Returns:
+            bool: True if fan is present, False if not
+        """
+        if not self.is_psu_fan:
+            fan_info = self.fan_dict_update()
+            if fan_info is None:
+                return False
+            status = fan_info.get('status', None)
+            if status is None:
+                return False
+            if status == '1' or status == '2':
+                return True
+            return False
+        else:
+            psu_info = self.fan_dict_update()
+            if psu_info is None:
+                return False
+            status = psu_info.get('status', None)
+            if status is None or status in self.restful.restful_err_str:
+                return False
+            if int(status, 16) & PSU_NOT_PRESENCE == 0:
+                return True
+            return False
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the FAN
+        Returns:
+            bool: True if FAN is operating properly, False if not
+        """
+        if not self.get_presence():
+            return False
+
+        if not self.is_psu_fan:
+            fan_info = self.fan_dict_update()
+            if fan_info is not None:
+                status = fan_info.get('status', None)
+                if status == '1':
+                    return True
+                else:
+                    return False
+        else:
+            psu_info = self.fan_dict_update()
+            if psu_info is None:
+                return False
+            status = psu_info.get('status', None)
+            if status is None or status in self.restful.restful_err_str:
+                return False
+            status = int(status, 16)
+            if status != 0:
+                return False
+            return True
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return True
+
+    def get_direction(self):
+        """
+        Retrieves the fan airflow direction
+        Returns:
+            A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
+            depending on fan direction
+
+        Notes:
+            - Forward/Exhaust : Air flows from Port side to Fan side.
+            - Reverse/Intake  : Air flows from Fan side to Port side.
+        """
+        fan_info = self.fan_dict_update()
+        if fan_info is None:
+            return self.FAN_DIRECTION_NOT_APPLICABLE
+        if not self.is_psu_fan:
+            air_flow = fan_info.get("direction", "2")
+        else:
+            air_flow = fan_info.get("fan_direction", "2")
+        if air_flow == "0":
+            return self.FAN_DIRECTION_INTAKE
+        elif air_flow == "1":
+            return self.FAN_DIRECTION_EXHAUST
+        else:
+            return self.FAN_DIRECTION_NOT_APPLICABLE
+
+    def get_speed(self):
+        """
+        Retrieves the speed of fan as a percentage of full speed
+
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        if not self.get_presence():
+            return 0
+
+        if not self.is_psu_fan:
+            fan_info = self.fan_dict_update()
+            if fan_info is not None:
+                motor = fan_info.get('motor{}'.format(self.fan_index))
+                value = motor.get('speed')
+                max_speed = motor.get('speed_max')
+        else:
+            psu_info = self.fan_dict_update()
+            if psu_info is not None:
+                value = psu_info.get('fan_speed', None)
+                max_speed = psu_info.get('fan_speed_max', None)
+        if value is None or value in self.restful.restful_err_str:
+            return None
+        if max_speed is None or max_speed in self.restful.restful_err_str:
+            return None
+        if isinstance(value, str):
+            value = int(value)
+            max_speed = int(max_speed)
+        pwm = value * 100 / max_speed
+        if pwm > 100:
+            pwm = 100
+        elif pwm < 0:
+            pwm = 0
+        return int(pwm)
+
+    def get_speed_tolerance(self):
+        """
+        Retrieves the speed tolerance of the fan
+        Returns:
+            An integer, the percentage of variance from target speed which is
+        considered tolerable
+        """
+        # The default tolerance value is fixed as 30%
+        return 30
+
+    def set_speed(self, speed):
+        """
+        Set fan speed to expected value
+        Args:
+            speed: An integer, the percentage of full fan speed to set fan to,
+                   in the range 0 (off) to 100 (full speed)
+        Returns:
+            bool: True if set success, False if fail.
+        """
+        return True
+
+    def set_status_led(self, color):
+        """
+        Set led to expected color
+        Args:
+            color: A string representing the color with which to set the
+                   fan module status LED
+        Returns:
+            bool: True if set success, False if fail.
+        """
+        # not supported
+        return False
+
+    def get_status_led(self):
+        """
+        Gets the state of the Fan status LED
+
+        Returns:
+            A string, one of the predefined STATUS_LED_COLOR_* strings.
+        """
+        if self.is_psu_fan:
+            # No LED available for PSU Fan
+            return 'N/A'
+
+        if not self.get_presence():
+            return 'N/A'
+
+        fan_info = self.fan_dict_update()
+        if fan_info is None:
+            return 'N/A'
+
+        led_status = fan_info.get('led_status', None)
+        if led_status is None:
+            return 'N/A'
+
+        return self.led_map.get(led_status, 'N/A')
+
+    def get_target_speed(self):
+        """
+        Retrieves the target (expected) speed of the fan
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        pwm = 0
+        if not self.get_presence():
+            return 0
+
+        if not self.is_psu_fan:
+            fan_info = self.fan_dict_update()
+            if fan_info is not None:
+                pwm = fan_info.get('pwm')
+        else:
+            psu_info = self.fan_dict_update()
+            if psu_info is not None:
+                pwm = psu_info.get('fan_ratio')
+        if pwm is None or pwm in self.restful.restful_err_str:
+            return None
+        return int(pwm)
+
+    def get_vendor(self):
+        """
+        Retrieves the vendor name of the fan
+
+        Returns:
+            string: Vendor name of fan
+        """
+        if not self.is_psu_fan:
+            fan_info = self.fan_dict_update()
+            if fan_info is None:
+                return 'N/A'
+            return fan_info.get("vendor", 'N/A')
+        else:
+            return 'N/A'
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        if not self.is_psu_fan:
+            fan_info = self.fan_dict_update()
+            if fan_info is None:
+                return 'N/A'
+            return fan_info.get("part_number", 'N/A')
+        else:
+            return 'N/A'
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/fan_drawer.py
new file mode 100644
index 000000000000..0d61f0142ab8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/fan_drawer.py
@@ -0,0 +1,184 @@
+#!/usr/bin/env python3
+#
+# fan_drawer_base.py
+#
+# Abstract base class for implementing a platform-specific class with which
+# to interact with a fan drawer module in SONiC
+#
+
+try:
+    import time
+    from sonic_platform_base.fan_drawer_base import FanDrawerBase
+    from sonic_platform.fan import Fan
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+
+class FanDrawer(FanDrawerBase):
+    """
+    Abstract base class for interfacing with a fan drawer
+    """
+    # Device type definition. Note, this is a constant.
+    DEVICE_TYPE = "fan_drawer"
+
+    def __init__(self, interface_obj, fantray_index):
+        FanDrawerBase.__init__(self)
+        self.fantray_index = fantray_index
+        self.restful = interface_obj
+        self.fantrayname = "fan" + str(fantray_index)
+        self.num_fans_per_fantray = self.restful.get_fan_rotor_number(self.fantrayname)
+        for i in range(self.num_fans_per_fantray):
+            self._fan_list.append(Fan(interface_obj, fantray_index, i + 1))
+
+    def fantray_dict_update(self):
+        return self.restful.get_fan_info(self.fantrayname)
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+        Returns:
+            string: The name of the device
+        """
+        return "Fantray{}".format(self.fantray_index)
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the FAN
+        Returns:
+            bool: True if fan is present, False if not
+        """
+        fan_info = self.fantray_dict_update()
+        if fan_info is None:
+            return False
+        status = fan_info.get('status', None)
+        if status is None or status in self.restful.restful_err_str:
+            return False
+        if status == '1' or status == '2':
+            return True
+        return False
+
+    def get_model(self):
+        """
+        Retrieves the part number of the FAN
+        Returns:
+            string: Part number of FAN
+        """
+        fan_info = self.fantray_dict_update()
+        if fan_info is None:
+            return 'N/A'
+        return fan_info.get("model_name", 'N/A')
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the FAN
+        Returns:
+            string: Serial number of FAN
+        """
+        fan_info = self.fantray_dict_update()
+        if fan_info is None:
+            return 'N/A'
+        return fan_info.get("serial_number", 'N/A')
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        fan_info = self.fantray_dict_update()
+        if fan_info is None:
+            return 'N/A'
+        return fan_info.get("part_number", 'N/A')
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the FAN
+        Returns:
+            bool: True if FAN is operating properly, False if not
+        """
+        for i in range(self.num_fans_per_fantray):
+            if self._fan_list[i].get_status() is False:
+                return False
+        return True
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return True
+
+    def get_num_fans(self):
+        """
+        Retrieves the number of fans available on this fan drawer
+        Returns:
+            An integer, the number of fan modules available on this fan drawer
+        """
+        return len(self._fan_list)
+
+    def get_all_fans(self):
+        """
+        Retrieves all fan modules available on this fan drawer
+        Returns:
+            A list of objects derived from FanBase representing all fan
+            modules available on this fan drawer
+        """
+        return self._fan_list
+
+    def set_status_led(self, *args):
+        """
+        Sets the state of the fan drawer status LED
+        Args:
+            color: A string representing the color with which to set the
+                   fan drawer status LED
+        Returns:
+            bool: True if status LED state is set successfully, False if not
+        """
+        # not supported
+        return False
+
+    def get_status_led(self):
+        """
+        Gets the state of the Fan status LED
+
+        Returns:
+            A string, one of the predefined STATUS_LED_COLOR_* strings.
+        """
+        return 'N/A'
+
+    def get_maximum_consumed_power(self):
+        """
+        Retrives the maximum power drawn by Fan Drawer
+
+        Returns:
+            A float, with value of the maximum consumable power of the
+            component.
+        """
+        return 'N/A'
+
+    def get_service_tag(self):
+        """
+        Retrieves the service tag of the device
+        Returns:
+            string: The service tag of the device
+        """
+        return 'N/A'
+
+    def get_mfr_id(self):
+        """
+        Retrieves the manufacturer's name (or ID) of the device
+        Returns:
+            string: Manufacturer's id of device
+        """
+        return "Micas"
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/pcie.py
new file mode 100644
index 000000000000..8ea66f339e96
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/pcie.py
@@ -0,0 +1,21 @@
+#!/usr/bin/env python3
+# -*- coding: utf-8 -*-
+
+########################################################################
+#
+# Module contains a platform specific implementation of SONiC Platform
+# Base PCIe class
+#
+########################################################################
+
+try:
+    from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+
+class Pcie(PcieUtil):
+    """Platform-specific Pcie class"""
+
+    def __init__(self, platform_path):
+        PcieUtil.__init__(self, platform_path)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/platform.py
new file mode 100644
index 000000000000..4d6fe03d93ac
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/platform.py
@@ -0,0 +1,24 @@
+#!/usr/bin/env python3
+
+#############################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
+#
+#############################################################################
+
+try:
+    from sonic_platform_base.platform_base import PlatformBase
+    from sonic_platform.chassis import Chassis
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+
+class Platform(PlatformBase):
+    """
+    Platform-specific class
+    """
+
+    def __init__(self):
+        PlatformBase.__init__(self)
+        self._chassis = Chassis()
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/psu.py
new file mode 100644
index 000000000000..9d6d06a39824
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/psu.py
@@ -0,0 +1,615 @@
+#!/usr/bin/env python3
+########################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the PSUs' information which are available in the platform
+#
+########################################################################
+
+
+try:
+    import time
+    from sonic_platform_base.psu_base import PsuBase
+    from sonic_platform.fan import Fan
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+PSU_NOT_PRESENCE = 0x01
+PSU_POWER_LOSS = 0x02
+PSU_FAN_FAULT = 0x04
+PSU_VOL_FAULT = 0x08
+PSU_CUR_FAULT = 0x10
+PSU_PWR_FAULT = 0x20
+PSU_TEMP_FAULT = 0x40
+
+PSU_ERR_VALUE = -999999
+
+class Psu(PsuBase):
+    """Platform-specific PSU class"""
+
+    def __init__(self, interface_obj, index):
+        self._fan_list = []
+        self._thermal_list = []
+        self.restful = interface_obj
+        self.index = index
+        self.name = "psu" + str(index)
+
+        self._fan_list.append(Fan(self.restful, 1, 1, psu_fan=True, psu_index=index))
+
+        self.led_map = {
+            "0": self.STATUS_LED_COLOR_OFF,
+            "1": self.STATUS_LED_COLOR_GREEN,
+            "2": self.STATUS_LED_COLOR_AMBER,
+            "3": self.STATUS_LED_COLOR_RED
+        }
+
+    def _get_value(self, value):
+        return round(float(value) / 1000, 1)
+
+    def psu_dict_update(self):
+        return self.restful.get_psu_info(self.name)
+
+    def psu_status_dict_update(self):
+        psu_info = self.psu_dict_update()
+        if psu_info is None:
+            return None
+        status = psu_info.get('status', None)
+        psu_status_dict = {}
+        psu_status_dict['InputStatus'] = False
+        psu_status_dict['FanStatus'] = False
+        psu_status_dict['TempStatus'] = False
+        psu_status_dict['OutputStatus'] = False
+        psu_status_dict['Temperature'] = {}
+        psu_status_dict['Temperature']['Value'] = PSU_ERR_VALUE
+        psu_status_dict['Temperature']['Max'] = PSU_ERR_VALUE
+        psu_status_dict['FanSpeed'] = {}
+        psu_status_dict['FanSpeed']['Value'] = 0
+        psu_status_dict['FanSpeed']['Ratio'] = 0
+        psu_status_dict['FanSpeed']['Max'] = 0
+        if status is None or status in self.restful.restful_err_str:
+            return psu_status_dict
+        status = int(status, 16)
+        if status & PSU_POWER_LOSS == 0:
+            psu_status_dict['InputStatus'] = True
+        if status & PSU_FAN_FAULT == 0:
+            psu_status_dict['FanStatus'] = True
+            if psu_info.get('fan_speed') not in self.restful.restful_err_str:
+                psu_status_dict['FanSpeed']['Value'] = int(psu_info.get('fan_speed'))
+            if psu_info.get('fan_ratio') not in self.restful.restful_err_str:
+                psu_status_dict['FanSpeed']['Ratio'] = int(psu_info.get('fan_ratio'))
+            if psu_info.get('fan_speed_max') not in self.restful.restful_err_str:
+                psu_status_dict['FanSpeed']['Max'] = int(psu_info.get('fan_speed_max'))
+        if status & PSU_TEMP_FAULT == 0:
+            psu_status_dict['TempStatus'] = True
+        if status & PSU_VOL_FAULT == 0:
+            psu_status_dict['OutputStatus'] = True
+
+        psu_temp = psu_info.get('temp0', None)
+        if psu_temp is not None:
+            if psu_temp.get('value') not in self.restful.restful_err_str:
+                psu_status_dict['Temperature']['Value'] = float(psu_temp.get('value'))
+            if psu_temp.get('max') not in self.restful.restful_err_str:
+                psu_status_dict['Temperature']['Max'] = float(psu_temp.get('max'))
+        return psu_status_dict
+
+    def psu_power_dict_update(self):
+        psu_info = self.psu_dict_update()
+        if psu_info is None:
+            return None
+        psu_power_dict = {}
+        psu_power_dict['Outputs'] = {}
+        psu_power_dict['Outputs']['Voltage'] = {}
+        psu_power_dict['Outputs']['Current'] = {}
+        psu_power_dict['Outputs']['Power'] = {}
+        psu_power_dict['Outputs']['Max_Power'] = {}
+        psu_power_dict['Inputs'] = {}
+        psu_power_dict['Inputs']['Voltage'] = {}
+        psu_power_dict['Inputs']['Current'] = {}
+        psu_power_dict['Inputs']['Power'] = {}
+        psu_power_dict['Outputs']['Voltage']['Value'] = psu_info.get('out_vol', PSU_ERR_VALUE)
+        psu_power_dict['Outputs']['Current']['Value'] = psu_info.get('out_cur', PSU_ERR_VALUE)
+        psu_power_dict['Outputs']['Power']['Value'] = psu_info.get('out_power', PSU_ERR_VALUE)
+        psu_power_dict['Outputs']['Max_Power']['Value'] = psu_info.get('out_max_power', PSU_ERR_VALUE)
+        psu_power_dict['Outputs']['Voltage']['HighAlarm'] = psu_info.get('out_cur', PSU_ERR_VALUE)
+        psu_power_dict['Outputs']['Voltage']['LowAlarm'] = psu_info.get('out_cur', PSU_ERR_VALUE)
+        psu_power_dict['Inputs']['Voltage']['Value'] = psu_info.get('in_vol', PSU_ERR_VALUE)
+        psu_power_dict['Inputs']['Current']['Value'] = psu_info.get('in_cur', PSU_ERR_VALUE)
+        psu_power_dict['Inputs']['Power']['Value'] = psu_info.get('in_power', PSU_ERR_VALUE)
+        psu_power_dict['Inputs']['Type'] = psu_info.get('type', "N/A")
+        return psu_power_dict
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+
+        Returns:
+            string: The name of the device
+        """
+        return "Psu{}".format(self.index)
+
+    def get_mfr_id(self):
+        """
+        Retrieves the manufacturer's name (or ID) of the device
+        Returns:
+            string: Manufacturer's id of device
+        """
+        psu_info = self.psu_dict_update()
+        if psu_info is None:
+            return "N/A"
+        val = psu_info.get("vendor", "")
+        if val == "":
+            return "N/A"
+        return val.rstrip('#')
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the Power Supply Unit (PSU)
+
+        Returns:
+            bool: True if PSU is present, False if not
+        """
+        psu_info = self.psu_dict_update()
+        if psu_info is None:
+            return False
+        status = psu_info.get('present', None)
+        if status is not None:
+            if status in self.restful.restful_err_str:
+                return False
+            if int(status) == 0:
+                return False
+            return True
+        # present is None, try to read status
+        status = psu_info.get('status', None)
+        if status is None or status in self.restful.restful_err_str:
+            return False
+        if int(status, 16) & PSU_NOT_PRESENCE == 0:
+            return True
+        return False
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+
+        Returns:
+            string: Model/part number of device
+        """
+        psu_info = self.psu_dict_update()
+        if psu_info is None:
+            return "N/A"
+        val = psu_info.get("model_name", "")
+        if val == "":
+            return "N/A"
+        return val
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the PSU
+
+        Returns:
+            string: Serial number of PSU
+        """
+        psu_info = self.psu_dict_update()
+        if psu_info is None:
+            return "N/A"
+        val = psu_info.get("serial_number", "")
+        if val == "":
+            return "N/A"
+        return val.rstrip('#')
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the PSU
+
+        Returns:
+            bool: True if PSU is operating properly, False if not
+        """
+        if not self.get_presence():
+            return False
+        psu_info = self.psu_dict_update()
+        if psu_info is None:
+            return False
+        status = psu_info.get('status', None)
+        if status is None or status in self.restful.restful_err_str:
+            return False
+        status = int(status, 16)
+        if status != 0:
+            return False
+        return True
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return True
+
+    def get_voltage(self):
+        """
+        Retrieves current PSU voltage output
+
+        Returns:
+            A float number, the output voltage in volts,
+            e.g. 12.1
+        """
+        psu_status_dict = self.psu_status_dict_update()
+        if psu_status_dict is None:
+            return 0
+        if psu_status_dict.get("InputStatus", False) is False:
+            value = 0
+        else:
+            psu_power_dict = self.psu_power_dict_update()
+            if psu_power_dict is None:
+                return 0
+            cur_psu_output = psu_power_dict.get("Outputs", None)
+            if cur_psu_output is None:
+                return 0
+            tmp = cur_psu_output.get("Voltage", None)
+            if tmp is None:
+                return 0
+            value = tmp.get("Value", 0)
+            if value in self.restful.restful_err_str:
+                return 0
+        return self._get_value(value)
+
+    def get_current(self):
+        """
+        Retrieves present electric current supplied by PSU
+
+        Returns:
+            A float number, electric current in amperes,
+            e.g. 15.4
+        """
+        psu_status_dict = self.psu_status_dict_update()
+        if psu_status_dict is None:
+            return 0
+        if psu_status_dict.get("InputStatus", False) is False:
+            value = 0
+        else:
+            psu_power_dict = self.psu_power_dict_update()
+            if psu_power_dict is None:
+                return 0
+            cur_psu_output = psu_power_dict.get("Outputs", None)
+            if cur_psu_output is None:
+                return 0
+            tmp = cur_psu_output.get("Current", None)
+            if tmp is None:
+                return 0
+            value = tmp.get("Value", 0)
+            if value in self.restful.restful_err_str:
+                return 0
+        return self._get_value(value)
+
+    def get_power(self):
+        """
+        Retrieves current energy supplied by PSU
+
+        Returns:
+            A float number, the power in watts,
+            e.g. 302.6
+        """
+        psu_status_dict = self.psu_status_dict_update()
+        if psu_status_dict is None:
+            return 0
+        if psu_status_dict.get("InputStatus", False) is False:
+            value = 0
+        else:
+            psu_power_dict = self.psu_power_dict_update()
+            if psu_power_dict is None:
+                return 0
+            cur_psu_output = psu_power_dict.get("Outputs", None)
+            if cur_psu_output is None:
+                return 0
+            tmp = cur_psu_output.get("Power", None)
+            if tmp is None:
+                return 0
+            value = tmp.get("Value", 0)
+            if value in self.restful.restful_err_str:
+                return 0
+            value = round(float(value) / 1000, 1)
+        return self._get_value(value)
+
+
+    def get_powergood_status(self):
+        """
+        Retrieves the powergood status of PSU
+
+        Returns:
+            A boolean, True if PSU has stablized its output voltages and
+            passed all its internal self-tests, False if not.
+        """
+        if not self.get_presence():
+            return False
+        psu_info = self.psu_dict_update()
+        if psu_info is None:
+            return False
+        status = psu_info.get('status', None)
+        if status is None or status in self.restful.restful_err_str:
+            return False
+        status = int(status, 16)
+        if status != 0:
+            return False
+        return True
+
+    def get_status_led(self):
+        """
+        Gets the state of the PSU status LED
+
+        Returns:
+            A string, one of the predefined STATUS_LED_COLOR_* strings.
+        """
+        psu_info = self.psu_dict_update()
+        if psu_info is None:
+            return self.STATUS_LED_COLOR_OFF
+        led_status = psu_info.get('led_status', None)
+        if led_status is None:
+            return self.STATUS_LED_COLOR_OFF
+
+        return self.led_map.get(led_status, "unknown status %s" % led_status)
+
+    def set_status_led(self, color):
+        """
+        Sets the state of the PSU status LED
+        Args:
+            color: A string representing the color with which to set the
+                   PSU status LED
+        Returns:
+            bool: True if status LED state is set successfully, False if
+                  not
+        """
+        # not supported
+        return False
+
+    def get_temperature(self):
+        """
+        Retrieves current temperature reading from PSU
+
+        Returns:
+            A float number of current temperature in Celsius up to nearest thousandth
+            of one degree Celsius, e.g. 30.125
+        """
+        psu_status_dict = self.psu_status_dict_update()
+        if psu_status_dict is None:
+            return 0
+        cur_psu_temp = psu_status_dict.get("Temperature", None)
+        if cur_psu_temp is None:
+            return 0
+        value = cur_psu_temp.get("Value", None)
+        if value is None or value in self.restful.restful_err_str:
+            return 0
+        return self._get_value(value)
+
+    def get_temperature_high_threshold(self):
+        """
+        Retrieves the high threshold temperature of PSU
+
+        Returns:
+            A float number, the high threshold temperature of PSU in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        psu_status_dict = self.psu_status_dict_update()
+        if psu_status_dict is None:
+            return 0
+        cur_psu_temp = psu_status_dict.get("Temperature", None)
+        if cur_psu_temp is None:
+            return 0
+        value = cur_psu_temp.get("Max", None)
+        if value is None or value in self.restful.restful_err_str:
+            return 0
+        return self._get_value(value)
+
+    def get_voltage_high_threshold(self):
+        """
+        Retrieves the high threshold PSU voltage output
+
+        Returns:
+            A float number, the high threshold output voltage in volts,
+            e.g. 12.1
+        """
+        return 13.0
+
+    def get_voltage_low_threshold(self):
+        """
+        Retrieves the low threshold PSU voltage output
+
+        Returns:
+            A float number, the low threshold output voltage in volts,
+            e.g. 12.1
+        """
+        return 11.8
+
+    def get_input_voltage(self):
+        """
+        Get the input voltage of the PSU
+
+        Returns:
+            A float number, the input voltage in volts,
+        """
+        psu_status_dict = self.psu_status_dict_update()
+        if psu_status_dict is None:
+            return 0
+        if psu_status_dict.get("InputStatus", False) is False:
+            value = 0
+        else:
+            psu_power_dict = self.psu_power_dict_update()
+            if psu_power_dict is None:
+                return 0
+            cur_psu_input = psu_power_dict.get("Inputs", None)
+            if cur_psu_input is None:
+                return 0
+            tmp = cur_psu_input.get("Voltage", None)
+            if tmp is None:
+                return 0
+            value = tmp.get("Value", 0)
+            if value in self.restful.restful_err_str:
+                return 0
+        return self._get_value(value)
+
+    def get_input_current(self):
+        """
+        Get the input electric current of the PSU
+
+        Returns:
+            A float number, the input current in amperes, e.g 220.3
+        """
+        psu_status_dict = self.psu_status_dict_update()
+        if psu_status_dict is None:
+            return 0
+        if psu_status_dict.get("InputStatus", False) is False:
+            value = 0
+        else:
+            psu_power_dict = self.psu_power_dict_update()
+            if psu_power_dict is None:
+                return 0
+            cur_psu_input = psu_power_dict.get("Inputs", None)
+            if cur_psu_input is None:
+                return 0
+            tmp = cur_psu_input.get("Current", None)
+            if tmp is None:
+                return 0
+            value = tmp.get("Value", 0)
+            if value in self.restful.restful_err_str:
+                return 0
+        return self._get_value(value)
+
+    def get_input_power(self):
+        """
+        Get the input current energy of the PSU
+
+        Returns:
+            A float number, the input power in watts, e.g. 302.6
+        """
+        psu_status_dict = self.psu_status_dict_update()
+        if psu_status_dict is None:
+            return 0
+        if psu_status_dict.get("InputStatus", False) is False:
+            value = 0
+        else:
+            psu_power_dict = self.psu_power_dict_update()
+            if psu_power_dict is None:
+                return 0
+            cur_psu_input = psu_power_dict.get("Inputs", None)
+            if cur_psu_input is None:
+                return 0
+            tmp = cur_psu_input.get("Power", None)
+            if tmp is None:
+                return 0
+            value = tmp.get("Value", 0)
+            if value in self.restful.restful_err_str:
+                return 0
+            value = round(float(value) / 1000, 1)
+        return self._get_value(value)
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        psu_info = self.psu_dict_update()
+        if psu_info is None:
+            return "N/A"
+        val = psu_info.get("hardware_version", "")
+        if val == "":
+            return "N/A"
+        return val
+
+    def get_vendor(self):
+        """
+        Retrieves the vendor name of the psu
+
+        Returns:
+            string: Vendor name of psu
+        """
+        psu_info = self.psu_dict_update()
+        if psu_info is None:
+            return "N/A"
+        val = psu_info.get("vendor", "")
+        if val == "":
+            return "N/A"
+        return val.rstrip('#')
+
+    def get_maximum_supplied_power(self):
+        """
+        Retrieves the maximum supplied power by PSU
+
+        Returns:
+            A float number, the maximum power output in Watts.
+            e.g. 1200.1
+        """
+        psu_power_dict = self.psu_power_dict_update()
+        if psu_power_dict is None:
+            return 0
+        cur_psu_output = psu_power_dict.get("Outputs", None)
+        if cur_psu_output is None:
+            return 0
+        tmp = cur_psu_output.get("Max_Power", None)
+        if tmp is None:
+            return 0
+        value = tmp.get("Value", 0)
+        if value in self.restful.restful_err_str:
+            return 0
+        value = round(float(value) / 1000, 1)
+        return self._get_value(value)
+
+
+    def get_thermal(self, index):
+        """
+        Retrieves thermal unit represented by (0-based) index <index>
+
+        Args:
+            index: An integer, the index (0-based) of the thermal to
+            retrieve
+
+        Returns:
+            An object dervied from ThermalBase representing the specified thermal
+        """
+        return False
+
+    def get_capacity(self):
+        """
+        Gets the capacity (maximum output power) of the PSU in watts
+        Returns:
+            An integer, the capacity of PSU
+        """
+        return int(self.get_maximum_supplied_power())
+
+    def get_type(self):
+        """
+         Gets the type of the PSU
+         Returns:
+             A string, the type of PSU (AC/DC)
+        """
+        psu_power_dict = self.psu_power_dict_update()
+        if psu_power_dict is None:
+            return "N/A"
+        psu_inputs = psu_power_dict.get("Inputs", None)
+        if psu_inputs is None:
+            return "N/A"
+        tmp = psu_inputs.get("Type", None)
+        if tmp is None:
+            return "N/A"
+        if tmp == "0":
+            return "DC"
+        if tmp == "1":
+            return "AC"
+        return "N/A"
+
+    def get_service_tag(self):
+        """
+        Retrieves the service tag of the device
+        Returns:
+            string: The service tag of the device
+        """
+        return 'N/A'
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/restful_interface.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/restful_interface.py
new file mode 100644
index 000000000000..49cdda394333
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/restful_interface.py
@@ -0,0 +1,459 @@
+from restful_util.restful_api import RestfulApiClient
+from platform_util import exec_os_cmd, get_value, dev_file_read
+from plat_hal.baseutil import baseutil
+import time
+import sys
+PY3K = sys.version_info >= (3, 0)
+if PY3K:
+    from time import monotonic as _time
+else:
+    from monotonic import monotonic as _time
+
+PSU_NOT_PRESENCE = 0x01
+PSU_POWER_LOSS = 0x02
+PSU_FAN_FAULT = 0x04
+PSU_VOL_FAULT = 0x08
+PSU_CUR_FAULT = 0x10
+PSU_PWR_FAULT = 0x20
+PSU_TEMP_FAULT = 0x40
+
+PSU_ERR_VALUE = -999999
+
+
+def RestfulInfoUpdate():
+    def decorator(func):
+        def wrapper(self, *args, **kwargs):
+            self.update_restful_info(func.__name__)
+            return func(self, *args, **kwargs)
+        return wrapper
+    return decorator
+
+
+class RestfulApi(RestfulApiClient):
+
+    func_map = {
+        "get_psu_total_number": "psu",
+        "get_psu_info": "psu",
+        "get_fan_total_number": "fan",
+        "get_fan_rotor_number": "fan",
+        "get_fan_info": "fan",
+        "get_all_dcdc_sensors": "sensor",
+        "get_dcdc_sensor_by_id": "sensor",
+        "get_all_temp_sensors": "temp_sensor",
+        "get_temp_sensor_by_id": "temp_sensor",
+        "get_all_vol_sensors": "vol_sensor",
+        "get_vol_sensor_by_id": "vol_sensor",
+        "get_all_cur_sensors": "cur_sensor",
+        "get_cur_sensor_by_id": "cur_sensor",
+        "get_cpld_total_number": "fw",
+        "get_cpld_by_id": "fw",
+        "get_bmc_by_id": "fw",
+        "get_bmc_total_number": "fw",
+        "get_sysled": "led",
+    }
+
+    def __init__(self, default_gap=3):
+        self.gap = default_gap
+        self.config = baseutil.get_config()
+        self.eeprom_config = self.config.get("onie_e2", None)
+        self.reboot_cause_config = self.config.get("reboot_cause", None)
+        self.fpga_config = self.config.get("fpga_config", {})
+        self.bios_config = self.config.get("bios_config", {})
+        self.sw_config = self.config.get("switch_config", {})
+        self.cpld_config = self.config.get("cpld_config", {})
+        self.bmc_config = self.config.get("bmc_config", {})
+        self.fan_config = self.config.get("fan_config", {})
+        self.psu_config = self.config.get("psu_config", {})
+        self.thermal_config = self.config.get("thermal_config", {})
+        self.restful_ready = 0
+        self.dcdc_sensors = None
+        self.fans = None
+        self.psus = None
+        self.temp_sensors = None
+        self.vol_sensors = None
+        self.cur_sensors = None
+        self.cplds = None
+        self.bmc = None
+        self.sysled = None
+        self.temp_filter = {
+            "temp0": "INLET_TEMP_PDB",
+            "temp1": "INLET_TEMP_LC",
+            "temp2": "OUTLET_2_TEMP",
+            "temp3": "OUTLET_1_TEMP",
+            "temp4": "ASIC_TEMP",
+            "temp5": "CPU",
+            "temp6": "PSU1_TEMP",
+            "temp7": "PSU2_TEMP",
+            "temp8": "PSU3_TEMP",
+            "temp9": "PSU4_TEMP",
+        }
+        self.restful_update_map = {
+            "psu": {
+                "update_time": 0,
+                "update_func": self.update_psus,
+                "url": self.PsusUrl
+            },
+            "fan": {
+                "update_time": 0,
+                "update_func": self.update_fans,
+                "url": self.FansUrl
+            },
+            "fw": {
+                "update_time": 0,
+                "update_func": self.update_firmwares,
+                "url": self.FirmwaresUrl
+            },
+            "sensor": {
+                "update_time": 0,
+                "update_func": self.update_sensors,
+                "url": self.SensorsUrl
+            },
+            "temp_sensor": {
+                "update_time": 0,
+                "update_func": self.update_temp_sensors,
+                "url": self.TempSensorsUrl
+            },
+            "vol_sensor": {
+                "update_time": 0,
+                "update_func": self.update_vol_sensors,
+                "url": self.VolSensorsUrl
+            },
+            "cur_sensor": {
+                "update_time": 0,
+                "update_func": self.update_cur_sensors,
+                "url": self.CurSensorsUrl
+            },
+            "led": {
+                "update_time": 0,
+                "update_func": self.update_sysled,
+                "url": self.LEDsUrl
+            },
+        }
+        self.restful_err_str = ("ACCESS FAILED", "NA", "N/A")
+
+    def restful_check_ready(self):
+        if self.restful_ready == 1:
+            return True
+        retry = 60
+        while retry >= 0:
+            tmp = self.get_request(self.HostnameUrl)
+            if tmp is None:
+                time.sleep(5)
+                continue
+            ret = tmp.get('message', 'Not OK')
+            code = tmp.get('code', 0)
+            if ret == 'OK' and code == 200:
+                self.restful_ready = 1
+                return True
+        return False
+
+    def update_restful_info(self, func_name):
+        tmp = self.restful_update_map.get(self.func_map.get(func_name, None))
+        if tmp is not None:
+            last_time = tmp.get("update_time", 0)
+            local_time = _time()
+            func = tmp.get("update_func", None)
+            url = tmp.get("url", None)
+            if func is not None and local_time - last_time > self.gap:
+                ret, data = self.restful_request(url)
+                if ret:
+                    func(data)
+                    tmp["update_time"] = _time()
+
+    def restful_request(self, url):
+        try:
+            tmp = self.get_request(url)
+            if not tmp:
+                return False, None
+            ret = tmp.get('message', 'Not OK')
+            code = tmp.get('code', 0)
+            if ret == 'OK' and code == 200:
+                data = tmp.get('data', None)
+                return True, data
+            return False, None
+        except Exception as e:
+            return False, None
+
+    def update_firmwares(self, val):
+        try:
+            self.cplds = val.get('cpld', None)
+            self.bmc = val.get('bmc', None)
+        except Exception as e:
+            self.cplds = None
+            self.bmc = None
+
+    def update_sysled(self, val):
+        try:
+            self.sysled = val.get('sysled', None)
+        except Exception as e:
+            self.sysled = None
+
+    def update_psus(self, val):
+        try:
+            self.psus = val.get('psu', None)
+        except Exception as e:
+            self.psus = None
+
+    def update_fans(self, val):
+        try:
+            self.fans = val.get('fan', None)
+        except Exception as e:
+            self.fans = None
+
+    def update_sensors(self, val):
+        try:
+            cur_sensors = val.get('cur_sensor', None)
+            vol_sensors = val.get('vol_sensor', None)
+            temp_sensors = val.get('temp_sensor', None)
+            self.dcdc_sensors = {}
+            self.temp_sensors = {}
+            if cur_sensors is not None:
+                for name, data in cur_sensors.items():
+                    if isinstance(data, dict):
+                        self.dcdc_sensors[name] = data
+            if vol_sensors is not None:
+                for name, data in vol_sensors.items():
+                    if isinstance(data, dict):
+                        self.dcdc_sensors[name] = data
+            if temp_sensors is not None:
+                for name, data in temp_sensors.items():
+                    if isinstance(data, dict):
+                        if name in self.temp_filter:
+                            self.temp_sensors[name] = data
+                            self.temp_sensors[name]["alias"] = self.temp_filter[name]
+        except Exception as e:
+            self.dcdc_sensors = None
+            self.temp_sensors = None
+
+    def update_temp_sensors(self, val):
+        try:
+            temp_sensors = val.get('temp_sensor', None)
+            self.temp_sensors = {}
+            if temp_sensors is not None:
+                for name, data in temp_sensors.items():
+                    if isinstance(data, dict):
+                        if name in self.temp_filter:
+                            self.temp_sensors[name] = data
+                            self.temp_sensors[name]["alias"] = self.temp_filter[name]
+        except Exception as e:
+            self.temp_sensors = None
+
+    def update_vol_sensors(self, val):
+        try:
+            vol_sensors = val.get('vol_sensor', None)
+            self.vol_sensors = {}
+            if vol_sensors is not None:
+                for name, data in vol_sensors.items():
+                    if isinstance(data, dict):
+                        self.vol_sensors[name] = data
+        except Exception as e:
+            self.vol_sensors = None
+
+    def update_cur_sensors(self, val):
+        try:
+            cur_sensors = val.get('cur_sensor', None)
+            self.cur_sensors = {}
+            if cur_sensors is not None:
+                for name, data in cur_sensors.items():
+                    if isinstance(data, dict):
+                        self.cur_sensors[name] = data
+        except Exception as e:
+            self.cur_sensors = None
+
+    # Interface for Psu
+    def get_psu_total_number(self):
+        psu_num = self.psu_config.get("number", 0)
+        return psu_num
+
+
+    @RestfulInfoUpdate()
+    def get_psu_info(self, psu_name):
+        if self.psus is None:
+            return None
+        return self.psus.get(psu_name)
+
+    # Interface for Fan
+    def get_fan_total_number(self):
+        fan_num = self.fan_config.get("num_fantrays", 0)
+        return fan_num
+
+    def get_fan_rotor_number(self, fan_name):
+        rotor_number = self.fan_config.get("num_fans_pertray", 0)
+        return rotor_number
+
+    @RestfulInfoUpdate()
+    def get_fan_info(self, fan_name):
+        if self.fans is None:
+            return None
+        return self.fans.get(fan_name)
+
+    @RestfulInfoUpdate()
+    def get_all_dcdc_sensors(self):
+        return self.dcdc_sensors
+
+    # Interface for dcdc
+    @RestfulInfoUpdate()
+    def get_dcdc_sensor_by_id(self, dcdc_id):
+        if not self.dcdc_sensors:
+            return None
+        return self.dcdc_sensors.get(dcdc_id, None)
+
+    def get_thermal_total_number(self):
+        thermal_num = self.thermal_config.get("number", 0)
+        return thermal_num
+
+    @RestfulInfoUpdate()
+    def get_all_temp_sensors(self):
+        return self.temp_sensors
+
+    @RestfulInfoUpdate()
+    def get_temp_sensor_by_id(self, temp_id):
+        if not self.temp_sensors:
+            return None
+        return self.temp_sensors.get(temp_id, None)
+
+    @RestfulInfoUpdate()
+    def get_all_vol_sensors(self):
+        return self.vol_sensors
+
+    @RestfulInfoUpdate()
+    def get_vol_sensor_by_id(self, vol_id):
+        if not self.vol_sensors:
+            return None
+        return self.vol_sensors.get(vol_id, None)
+
+    @RestfulInfoUpdate()
+    def get_all_cur_sensors(self):
+        return self.cur_sensors
+
+    @RestfulInfoUpdate()
+    def get_cur_sensor_by_id(self, cur_id):
+        if not self.cur_sensors:
+            return None
+        return self.cur_sensors.get(cur_id, None)
+
+    def get_cpld_total_number(self):
+        cpld_num = self.cpld_config.get("number", 0)
+        return cpld_num
+
+    def get_fw_by_id(self, fw_name):
+        if "cpld" in fw_name:
+            return self.get_cpld_by_id(fw_name)
+        elif "bmc" in fw_name:
+            return self.get_bmc_by_id(fw_name)
+        elif "switch" in fw_name:
+            return self.get_switch_by_id(fw_name)
+        elif "bios" in fw_name:
+            return self.get_bios_by_id(fw_name)
+        elif "fpga" in fw_name:
+            return self.get_fpga_by_id(fw_name)
+
+    @RestfulInfoUpdate()
+    def get_cpld_by_id(self, fw_type):
+        if self.cplds is not None:
+            cpld = self.cplds.get(fw_type, None)
+            return cpld
+        return None
+
+    @RestfulInfoUpdate()
+    def get_sysled(self):
+        return self.sysled
+
+    def _get_value(self, config):
+        if config["gettype"] == "cmd":
+            ret, output = exec_os_cmd(config["cmd"])
+            return output
+
+    def get_fpga_total_number(self):
+        fpga_num = self.fpga_config.get("number", 0)
+        return fpga_num
+
+    def get_fpga_reg(self, config):
+        if config is None:
+            return "N/A"
+        ret, tmp = dev_file_read(config["dev_path"], config["offset"], config["len"])
+        if ret != True:
+            return "N/A"
+        reg = ""
+        for index in range(len(tmp) - 1, -1, -1):
+            val = hex(tmp[index]).replace("0x", "")
+            reg = reg + val
+        return reg
+
+    def get_fpga_by_id(self, fw_type):
+        fw_dict = {}
+        fpgas = self.fpga_config.get("fpgas", [])
+        for i in fpgas:
+            if fw_type == i["name"]:
+                fw_dict['alias'] = i.get('alias', None)
+                fw_dict['board_version'] = self.get_fpga_reg(i.get("board_version", None))
+                fw_dict['firmware_version'] = self.get_fpga_reg(i.get("firmware_version", None))
+                fw_dict['type'] = i.get('type', None)
+                break
+        return fw_dict
+
+    def get_bios_by_id(self, fw_type):
+        fw_dict = {}
+        bios = self.bios_config.get("bios", [])
+        for i in bios:
+            if fw_type == i["name"]:
+                fw_dict['alias'] = i.get('alias', None)
+                fw_dict['board_version'] = self._get_value(i.get("board_version", None))
+                fw_dict['firmware_version'] = self._get_value(i.get("firmware_version", None))
+                fw_dict['type'] = self._get_value(i.get("type", None))
+                break
+        return fw_dict
+
+    def get_switch_by_id(self, fw_type):
+        fw_dict = {}
+        sw = self.sw_config.get("switchs", [])
+        for i in sw:
+            if fw_type == i["name"]:
+                for cmd in i.get("init_cmd", []):
+                    exec_os_cmd(cmd)
+                fw_dict['alias'] = i.get('alias', None)
+                fw_dict['board_version'] = self._get_value(i.get("board_version", None)).split(" ")[0]
+                fw_dict['firmware_version'] = self._get_value(i.get("firmware_version", None)).split(" ")[0]
+                fw_dict['type'] = i.get('type', None)
+                for cmd in i.get("deinit_cmd", []):
+                    exec_os_cmd(cmd)
+                break
+        return fw_dict
+
+    @RestfulInfoUpdate()
+    def get_bmc_by_id(self, fw_type):
+        fw_dict = {}
+        if self.bmc is not None:
+            bmc = self.bmc.get(fw_type)
+            fw_dict['board_version'] = bmc.get('board_version', None)
+            fw_dict['alias'] = bmc.get('alias', None)
+            fw_dict['firmware_version'] = bmc.get('firmware_version', None)
+            fw_dict['type'] = bmc.get('type', None)
+        return fw_dict
+
+    def get_bmc_total_number(self):
+        bmc_num = self.bmc_config.get("number", 0)
+        return bmc_num
+
+    def get_bios_total_number(self):
+        num = self.bios_config.get("number", 0)
+        return num
+
+    def get_sw_total_number(self):
+        num = self.sw_config.get("number", 0)
+        return num
+
+    def get_onie_e2_path(self, e2_name):
+        if self.eeprom_config is None:
+            return "/sys/bus/i2c/devices/1-0056/eeprom"
+        return self.eeprom_config.get("e2loc").get("loc")
+
+    def get_cpu_reboot_cause(self):
+        if self.reboot_cause_config is None:
+            return 0
+        check_point = self.reboot_cause_config.get('check_point', None)
+        if check_point is not None:
+            ret, val = get_value(check_point)
+            if ret == True:
+                return val
+        return 0
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/sfp.py
new file mode 100644
index 000000000000..5c17530a5c8b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/sfp.py
@@ -0,0 +1,634 @@
+#!/usr/bin/python
+# -*- coding: UTF-8 -*-
+
+#############################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
+#
+#
+# *_device.py config version instruction:
+#      ver 1.0 - platform api:
+#           "presence_cpld": {
+#               "dev_id": {
+#                   [dev_id]: {
+#                       "offset": {
+#                           [offset]: [port_id]
+#                       }
+#                    }
+#                 }
+#              }
+#           "reset_cpld": {
+#               "dev_id": {
+#                   [dev_id]: {
+#                       "offset": {
+#                           [offset]: [port_id]
+#                       }
+#                    }
+#                 }
+#           }
+#      ver 2.0 - wb_plat:
+#               "presence_path": "/xx/wb_plat/xx[port_id]/present"
+#               "eeprom_path": "/sys/bus/i2c/devices/i2c-[bus]/[bus]-0050/eeprom"
+#               "reset_path": "/xx/wb_plat/xx[port_id]/reset"
+#############################################################################
+import sys
+import time
+import syslog
+import traceback
+from abc import abstractmethod
+
+configfile_pre = "/usr/local/bin/"
+sys.path.append(configfile_pre)
+
+try:
+    from platform_intf import *
+    from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase
+    from plat_hal.baseutil import baseutil
+
+except ImportError as error:
+    raise ImportError(str(error) + "- required module not found") from error
+
+LOG_DEBUG_LEVEL = 1
+LOG_WARNING_LEVEL = 2
+LOG_ERROR_LEVEL = 3
+
+
+class Sfp(SfpOptoeBase):
+
+    OPTOE_DRV_TYPE1 = 1
+    OPTOE_DRV_TYPE2 = 2
+    OPTOE_DRV_TYPE3 = 3
+
+    # index must start at 1
+    def __init__(self, index):
+        SfpOptoeBase.__init__(self)
+        self.sfp_type = None
+        sfp_config = baseutil.get_config().get("sfps", None)
+        self.log_level_config = sfp_config.get("log_level", LOG_WARNING_LEVEL)
+        # Init instance of SfpCust
+        ver = sfp_config.get("ver", None)
+        if ver is None:
+            self._sfplog(LOG_ERROR_LEVEL, "Get Ver Config Error!")
+        vers = int(float(ver))
+        if vers == 1:
+            self._sfp_api = SfpV1(index)
+        elif vers == 2:
+            self._sfp_api = SfpV2(index)
+        else:
+            self._sfplog(LOG_ERROR_LEVEL, "Get SfpVer Error!")
+
+    def get_eeprom_path(self):
+        return self._sfp_api._get_eeprom_path()
+
+    def read_eeprom(self, offset, num_bytes):
+        return self._sfp_api.read_eeprom(offset, num_bytes)
+
+    def get_presence(self):
+        return self._sfp_api.get_presence()
+
+    def get_transceiver_info(self):
+        # temporary solution for a sonic202111 bug
+        transceiver_info = super().get_transceiver_info()
+        try:
+            if transceiver_info == None:
+                return None
+            if transceiver_info['cable_type'] == None:
+                transceiver_info['cable_type'] = 'N/A'
+            if transceiver_info["vendor_rev"] is not None:
+                transceiver_info["hardware_rev"] = transceiver_info["vendor_rev"]
+        except BaseException:
+            print(traceback.format_exc())
+            return None
+        return transceiver_info
+
+    def get_reset_status(self):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'SFP':
+            self._sfplog(LOG_ERROR_LEVEL, 'SFP does not support reset')
+            return False
+
+        ret = self._sfp_api.get_reset_status()
+        return ret
+
+    def reset(self):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'SFP':
+            self._sfplog(LOG_ERROR_LEVEL, 'SFP does not support reset')
+            return False
+
+        self._sfplog(LOG_DEBUG_LEVEL, 'resetting...')
+        ret = self._sfp_api.set_reset(True)
+        if ret:
+            time.sleep(0.5)
+            ret = self._sfp_api.set_reset(False)
+
+        return ret
+
+    def get_lpmode(self):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'QSFP' or self.sfp_type == 'QSFP_DD':
+            return SfpOptoeBase.get_lpmode(self)
+
+            self._sfplog(LOG_WARNING_LEVEL, 'SFP does not support lpmode')
+            return False
+
+    def set_lpmode(self, lpmode):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None or self._xcvr_api is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'QSFP_DD' or self.sfp_type == 'QSFP':
+            return SfpOptoeBase.set_lpmode(self, lpmode)
+
+        self._sfplog(LOG_WARNING_LEVEL, 'SFP does not support lpmode')
+        return False
+
+    def get_tx_disable(self):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'SFP':
+            return self._sfp_api.get_tx_disable()
+
+        return SfpOptoeBase.get_tx_disable(self)
+
+    def get_tx_disable_channel(self):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'SFP':
+            return self._sfp_api.get_tx_disable_channel()
+
+        return SfpOptoeBase.get_tx_disable_channel(self)
+
+    def tx_disable(self, tx_disable):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'SFP':
+            return self._sfp_api.set_tx_disable(tx_disable)
+
+        return SfpOptoeBase.tx_disable(self, tx_disable)
+
+    def tx_disable_channel(self, channel, disable):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'SFP':
+            self._sfplog(LOG_WARNING_LEVEL, 'SFP does not support tx disable channel')
+            return False
+
+        return SfpOptoeBase.tx_disable_channel(self, channel, disable)
+
+    def set_optoe_write_max(self, write_max):
+        """
+        This func is declared and implemented by SONiC but we're not supported
+        so override it as NotImplemented
+        """
+        self._sfplog(LOG_DEBUG_LEVEL, "set_optoe_write_max NotImplemented")
+
+    def refresh_xcvr_api(self):
+        """
+        Updates the XcvrApi associated with this SFP
+        """
+        self._xcvr_api = self._xcvr_api_factory.create_xcvr_api()
+        class_name = self._xcvr_api.__class__.__name__
+        optoe_type = None
+        # set sfp_type
+        if 'CmisApi' in class_name:
+            self.sfp_type = 'QSFP_DD'
+            optoe_type = self.OPTOE_DRV_TYPE3
+        elif 'Sff8472Api' in class_name:
+            self.sfp_type = 'SFP'
+            optoe_type = self.OPTOE_DRV_TYPE2
+        elif ('Sff8636Api' in class_name or 'Sff8436Api' in class_name):
+            self.sfp_type = 'QSFP'
+            optoe_type = self.OPTOE_DRV_TYPE1
+        # set optoe driver
+        if optoe_type is not None:
+            self._sfp_api.set_optoe_type(optoe_type)
+
+    def _sfplog(self, log_level, msg):
+        if log_level >= self.log_level_config:
+            try:
+                syslog.openlog("Sfp")
+                if log_level == LOG_DEBUG_LEVEL:
+                    syslog.syslog(syslog.LOG_DEBUG, msg)
+                elif log_level == LOG_WARNING_LEVEL:
+                    syslog.syslog(syslog.LOG_DEBUG, msg)
+                elif log_level == LOG_ERROR_LEVEL:
+                    syslog.syslog(syslog.LOG_ERR, msg)
+                syslog.closelog()
+
+            except BaseException:
+                print(traceback.format_exc())
+
+
+class SfpCust():
+    def __init__(self, index):
+        self.eeprom_path = None
+        self._init_config(index)
+
+    def _init_config(self, index):
+        sfp_config = baseutil.get_config().get("sfps", None)
+        self.log_level_config = sfp_config.get("log_level", LOG_WARNING_LEVEL)
+        self._port_id = index
+        self.eeprom_retry_times = sfp_config.get("eeprom_retry_times", 0)
+        self.eeprom_retry_break_sec = sfp_config.get("eeprom_retry_break_sec", 0)
+
+    def _get_eeprom_path(self):
+        return self.eeprom_path or None
+
+    @abstractmethod
+    def get_presence(self):
+        pass
+
+    def read_eeprom(self, offset, num_bytes):
+        try:
+            for i in range(self.eeprom_retry_times):
+                with open(self._get_eeprom_path(), mode='rb', buffering=0) as f:
+                    f.seek(offset)
+                    result = f.read(num_bytes)
+                    # temporary solution for a sonic202111 bug
+                    if len(result) < num_bytes:
+                        result = result[::-1].zfill(num_bytes)[::-1]
+                    if result is not None:
+                        return bytearray(result)
+                    time.sleep(self.eeprom_retry_break_sec)
+                    continue
+
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+        return None
+
+    def write_eeprom(self, offset, num_bytes, write_buffer):
+        try:
+            for i in range(self.eeprom_retry_times):
+                ret = SfpOptoeBase.write_eeprom(self, offset, num_bytes, write_buffer)
+                if ret is False:
+                    time.sleep(self.eeprom_retry_break_sec)
+                    continue
+                break
+
+            return ret
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+
+    @abstractmethod
+    def set_optoe_type(self, optoe_type):
+        pass
+
+    @abstractmethod
+    def set_reset(self, reset):
+        pass
+
+    def _convert_str_range_to_int_arr(self, range_str):
+        if not range_str:
+            return []
+
+        int_range_strs = range_str.split(',')
+        range_res = []
+        for int_range_str in int_range_strs:
+            if '-' in int_range_str:
+                range_s = int(int_range_str.split('-')[0])
+                range_e = int(int_range_str.split('-')[1]) + 1
+            else:
+                range_s = int(int_range_str)
+                range_e = int(int_range_str) + 1
+
+            range_res = range_res + list(range(range_s, range_e))
+
+        return range_res
+
+    def _sfplog(self, log_level, msg):
+        if log_level >= self.log_level_config:
+            try:
+                syslog.openlog("SfpCust")
+                if log_level == LOG_DEBUG_LEVEL:
+                    syslog.syslog(syslog.LOG_DEBUG, msg)
+                elif log_level == LOG_WARNING_LEVEL:
+                    syslog.syslog(syslog.LOG_DEBUG, msg)
+                elif log_level == LOG_ERROR_LEVEL:
+                    syslog.syslog(syslog.LOG_ERR, msg)
+                syslog.closelog()
+
+            except BaseException:
+                print(traceback.format_exc())
+
+
+class SfpV1(SfpCust):
+    def _init_config(self, index):
+        super()._init_config(index)
+        # init presence path
+        sfp_config = baseutil.get_config().get("sfps", None)
+
+        eeprom_path_config = sfp_config.get("eeprom_path", None)
+        eeprom_path_key = sfp_config.get("eeprom_path_key")[self._port_id - 1]
+        self.eeprom_path = None if eeprom_path_config is None else eeprom_path_config % (
+            eeprom_path_key, eeprom_path_key)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init eeprom path: %s" % self.eeprom_path)
+
+        self.presence_cpld = sfp_config.get("presence_cpld", None)
+        self.presence_val_is_present = sfp_config.get("presence_val_is_present", 0)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init presence path")
+
+        # init reset path
+        self.reset_cpld = sfp_config.get("reset_cpld", None)
+        self.reset_val_is_reset = sfp_config.get("reset_val_is_reset", 0)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init cpld path")
+
+        # init tx_disable path
+        self.txdis_cpld = sfp_config.get("txdis_cpld", None)
+        self.txdisable_val_is_on = sfp_config.get("txdisable_val_is_on", 0)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init cpld tx_disable path")
+
+    def get_presence(self):
+        if self.presence_cpld is None:
+            self._sfplog(LOG_ERROR_LEVEL, "presence_cpld is None!")
+            return False
+        try:
+            dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.presence_cpld)
+            if dev_id == -1:
+                return False
+            ret, info = platform_reg_read(0, dev_id, offset, 1)
+            if (ret is False
+                    or info is None):
+                return False
+            return info[0] & (1 << offset_bit) == self.presence_val_is_present
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+
+    def get_reset_status(self):
+        if self.reset_cpld is None:
+            self._sfplog(LOG_ERROR_LEVEL, "reset_cpld is None!")
+            return False
+        try:
+            dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.reset_cpld)
+            if dev_id == -1:
+                return False
+            ret, info = platform_reg_read(0, dev_id, offset, 1)
+            if (ret is False
+                    or info is None):
+                self._sfplog(LOG_ERROR_LEVEL, "platform_reg_read error!")
+                return False
+
+            return (info[0] & (1 << offset_bit) == self.reset_val_is_reset)
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+
+    def get_tx_disable(self):
+        if self.reset_cpld is None:
+            self._sfplog(LOG_ERROR_LEVEL, "txdis_cpld is None!")
+            return None
+
+        try:
+            tx_disable_list = []
+            dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.txdis_cpld)
+            if dev_id == -1:
+                return False
+            ret, info = platform_reg_read(0, dev_id, offset, 1)
+            if (ret is False
+                    or info is None):
+                self._sfplog(LOG_ERROR_LEVEL, "platform_reg_read error!")
+                return None
+            if self.txdisable_val_is_on == 1:
+                tx_disable_list.append(info[0] & (1 << offset_bit) != 0)
+            else:
+                tx_disable_list.append(info[0] & (1 << offset_bit) == 0)
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return None
+
+        return tx_disable_list
+
+    def get_tx_disable_channel(self):
+        tx_disable_list = []
+        tx_disable_list = self.get_tx_disable()
+        if tx_disable_list is None:
+            return 0
+
+        tx_disabled = 0
+        for i in range(len(tx_disable_list)):
+            if tx_disable_list[i]:
+                tx_disabled |= 1 << i
+
+        return tx_disabled
+
+    def read_eeprom(self, offset, num_bytes):
+        try:
+            for i in range(self.eeprom_retry_times):
+                ret, info = platform_sfp_read(self._port_id, offset, num_bytes)
+                if (ret is False
+                        or info is None):
+                    time.sleep(self.eeprom_retry_break_sec)
+                    continue
+                eeprom_raw = []
+                for i in range(0, num_bytes):
+                    eeprom_raw.append(0)
+                for n in range(0, len(info)):
+                    eeprom_raw[n] = info[n]
+                # temporary solution for a sonic202111 bug
+                if len(eeprom_raw) < num_bytes:
+                    eeprom_raw = eeprom_raw[::-1].zfill(num_bytes)[::-1]
+                return bytearray(eeprom_raw)
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+        return None
+
+    def set_optoe_type(self, optoe_type):
+        ret, info = platform_get_optoe_type(self._port_id)
+        if ret is True and info != optoe_type:
+            try:
+                ret, _ = platform_set_optoe_type(self._port_id, optoe_type)
+            except Exception as err:
+                self._sfplog(LOG_ERROR_LEVEL, "Set optoe err %s" % err)
+
+    def set_reset(self, reset):
+        if self.reset_cpld is None:
+            self._sfplog(LOG_ERROR_LEVEL, "reset_cpld is None!")
+            return False
+        try:
+            val = []
+            dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.reset_cpld)
+            if dev_id == -1:
+                return False
+            ret, info = platform_reg_read(0, dev_id, offset, 1)
+            if (ret is False
+                    or info is None):
+                self._sfplog(LOG_ERROR_LEVEL, "platform_reg_read error!")
+                return False
+
+            if self.reset_val_is_reset == 0:
+                if reset:
+                    val.append(info[0] & (~(1 << offset_bit)))
+                else:
+                    val.append(info[0] | (1 << offset_bit))
+            else:
+                if reset:
+                    val.append(info[0] | (1 << offset_bit))
+                else:
+                    val.append(info[0] & (~(1 << offset_bit)))
+
+            ret, info = platform_reg_write(0, dev_id, offset, val)
+            if ret is False:
+                self._sfplog(LOG_ERROR_LEVEL, "platform_reg_write error!")
+                return False
+
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+
+        return True
+
+    def set_tx_disable(self, tx_disable):
+        if self.txdis_cpld is None:
+            self._sfplog(LOG_ERROR_LEVEL, "txdis_cpld is None!")
+            return False
+        try:
+            val = []
+            dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.txdis_cpld)
+            if dev_id == -1:
+                return False
+            ret, info = platform_reg_read(0, dev_id, offset, 1)
+            if (ret is False
+                    or info is None):
+                self._sfplog(LOG_ERROR_LEVEL, "platform_reg_read error!")
+                return False
+
+            if self.txdisable_val_is_on == 0:
+                if tx_disable:
+                    val.append(info[0] & (~(1 << offset_bit)))
+                else:
+                    val.append(info[0] | (1 << offset_bit))
+            else:
+                if tx_disable:
+                    val.append(info[0] | (1 << offset_bit))
+                else:
+                    val.append(info[0] & (~(1 << offset_bit)))
+
+            ret, info = platform_reg_write(0, dev_id, offset, val)
+            if ret is False:
+                self._sfplog(LOG_ERROR_LEVEL, "platform_reg_write error!")
+                return False
+
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+
+        return True
+
+    def _get_sfp_cpld_info(self, cpld_config):
+        dev_id = -1
+        offset = -1
+        offset_bit = -1
+        for dev_id_temp in cpld_config["dev_id"]:
+            for offset_temp in cpld_config["dev_id"][dev_id_temp]["offset"]:
+                port_range_str = cpld_config["dev_id"][dev_id_temp]["offset"][offset_temp]
+                port_range_int = self._convert_str_range_to_int_arr(port_range_str)
+                if self._port_id in port_range_int:
+                    dev_id = dev_id_temp
+                    offset = offset_temp
+                    offset_bit = port_range_int.index(self._port_id)
+                    break
+
+        return dev_id, offset, offset_bit
+
+
+class SfpV2(SfpCust):
+    def _init_config(self, index):
+        super()._init_config(index)
+        # init eeprom path
+        sfp_config = baseutil.get_config().get("sfps", None)
+        eeprom_path_config = sfp_config.get("eeprom_path", None)
+        eeprom_path_key = sfp_config.get("eeprom_path_key")[self._port_id - 1]
+        self.eeprom_path = None if eeprom_path_config is None else eeprom_path_config % (
+            eeprom_path_key, eeprom_path_key)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init eeprom path: %s" % self.eeprom_path)
+
+        # init presence path
+        self.presence_path = None if sfp_config.get("presence_path",
+                                                    None) is None else sfp_config.get("presence_path") % self._port_id
+        self.presence_val_is_present = sfp_config.get("presence_val_is_present", 0)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init presence path: %s" % self.presence_path)
+
+        # init optoe driver path
+        optoe_driver_path = sfp_config.get("optoe_driver_path", None)
+        optoe_driver_key = sfp_config.get("optoe_driver_key")[self._port_id - 1]
+        self.dev_class_path = None if optoe_driver_path is None else optoe_driver_path % (
+            optoe_driver_key, optoe_driver_key)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init optoe driver path: %s" % self.dev_class_path)
+
+        # init reset path
+        self.reset_path = None if sfp_config.get(
+            "reset_path",
+            None) is None else sfp_config.get(
+            "reset_path",
+            None) % self._port_id
+        self.reset_val_is_reset = sfp_config.get("reset_val_is_reset", 0)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init reset path: %s" % self.reset_path)
+
+    def get_presence(self):
+        if self.presence_path is None:
+            self._sfplog(LOG_ERROR_LEVEL, "presence_path is None!")
+            return False
+        try:
+            with open(self.presence_path, "rb") as data:
+                sysfs_data = data.read(1)
+                if sysfs_data != "":
+                    result = int(sysfs_data, 16)
+            return result == self.presence_val_is_present
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+
+    def set_reset(self, reset):
+        return True
+
+    def set_optoe_type(self, optoe_type):
+        if self.dev_class_path is None:
+            self._sfplog(LOG_ERROR_LEVEL, "dev_class_path is None!")
+            return False
+        try:
+            with open(self.dev_class_path, "r+") as dc_file:
+                dc_file_val = dc_file.read(1)
+                if int(dc_file_val) != optoe_type:
+                    dc_str = "%s" % str(optoe_type)
+                    dc_file.write(dc_str)
+                    # dc_file.close()
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+        return True
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/thermal.py
new file mode 100644
index 000000000000..516c86260e7c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/thermal.py
@@ -0,0 +1,282 @@
+#!/usr/bin/env python3
+
+########################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the Thermals' information which are available in the platform
+#
+########################################################################
+
+
+try:
+    import time
+    from sonic_platform_base.thermal_base import ThermalBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+
+class Thermal(ThermalBase):
+
+    def __init__(self, interface_obj, index):
+
+        self.restful = interface_obj
+        self.temp_id = "temp" + str(index)
+
+    def get_service_tag(self):
+        """
+        Retrieves the service tag of the device
+        Returns:
+            string: The service tag of the device
+        """
+        return 'N/A'
+
+    def get_mfr_id(self):
+        """
+        Retrieves the manufacturer's name (or ID) of the device
+        Returns:
+            string: Manufacturer's id of device
+        """
+        return 'N/A'
+
+    def get_sensor(self):
+        temp_info = {}
+        info = self.restful.get_temp_sensor_by_id(self.temp_id)
+        if info is None:
+            return None
+
+        name = info.get("alias", "N/A")
+        temp_info['alias'] = info.get('alias', "N/A")
+        temp_info['type'] = info.get('type', "N/A")
+        value = info.get('value')
+        if value is None or value in self.restful.restful_err_str:
+            temp_info['value'] = None
+        else:
+            temp_info['value'] = float(value) / 1000
+        max =info.get('max')
+        if max is None or max in self.restful.restful_err_str:
+            temp_info['max'] = None
+        else:
+            temp_info['max'] = float(max) / 1000
+        min = info.get('min')
+        if min is None or min in self.restful.restful_err_str:
+            temp_info['min'] = None
+        else:
+            temp_info['min'] = float(min) / 1000
+        return temp_info
+
+    def get_name(self):
+        """
+        Retrieves the name of the thermal
+
+        Returns:
+            string: The name of the thermal
+        """
+        temp_dict = self.get_sensor()
+        if temp_dict is None:
+            return "N/A"
+        name = temp_dict.get("alias", "N/A")
+        return name
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the thermal
+
+        Returns:
+            bool: True if thermal is present, False if not
+        """
+        return True
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the Thermal
+
+        Returns:
+            string: Model/part number of Thermal
+        """
+        return "N/A"
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the Thermal
+
+        Returns:
+            string: Serial number of Thermal
+        """
+        return "N/A"
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        return "N/A"
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the thermal
+
+        Returns:
+            A boolean value, True if thermal is operating properly,
+            False if not
+        """
+        temp_dict = self.get_sensor()
+        if temp_dict is None:
+            return False
+        if temp_dict.get("value") is None or temp_dict.get("max") is None or temp_dict.get("min") is None:
+            return False
+        if (temp_dict.get("value", -1) >= temp_dict.get("max", 0)
+            ) or (temp_dict.get("value", 0) <= temp_dict.get("min", -1)):
+            return False
+
+        return True
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
+
+    def get_temperature(self):
+        """
+        Retrieves current temperature reading from thermal
+
+        Returns:
+            A float number of current temperature in Celsius up to nearest thousandth
+            of one degree Celsius, e.g. 30.125
+        """
+        temp_dict = self.get_sensor()
+        if temp_dict is None:
+            return None
+        value = temp_dict.get("value", None)
+        if value is None:
+            return None
+        if value < -200:
+            return None
+        return round(float(value), 1)
+
+    def get_high_threshold(self):
+        """
+        Retrieves the high threshold temperature of thermal
+
+        Returns:
+            A float number, the high threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        temp_dict = self.get_sensor()
+        if temp_dict is None:
+            return None
+        value = temp_dict.get("max", None)
+        if value is None:
+            return None
+        return round(float(value), 1)
+
+    def get_low_threshold(self):
+        """
+        Retrieves the low threshold temperature of thermal
+
+        Returns:
+            A float number, the low threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        temp_dict = self.get_sensor()
+        if temp_dict is None:
+            return None
+        value = temp_dict.get("min", None)
+        if value is None:
+            return None
+        return round(float(value), 1)
+
+    def set_high_threshold(self, temperature):
+        """
+        Sets the high threshold temperature of thermal
+
+        Args :
+            temperature: A float number up to nearest thousandth of one degree Celsius,
+            e.g. 30.125
+
+        Returns:
+            A boolean, True if threshold is set successfully, False if not
+        """
+        # not supported
+        return False
+
+    def set_low_threshold(self, temperature):
+        """
+        Sets the low threshold temperature of thermal
+
+        Args :
+            temperature: A float number up to nearest thousandth of one degree Celsius,
+            e.g. 30.125
+
+        Returns:
+            A boolean, True if threshold is set successfully, False if not
+        """
+        # not supported
+        return False
+
+    def get_high_critical_threshold(self):
+        """
+        Retrieves the high critical threshold temperature of thermal
+
+        Returns:
+            A float number, the high critical threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        temp_dict = self.get_sensor()
+        if temp_dict is None:
+            return None
+        value = temp_dict.get("max", None)
+        if value is None:
+            return None
+        return round(float(value), 1)
+
+    def get_low_critical_threshold(self):
+        """
+        Retrieves the low critical threshold temperature of thermal
+
+        Returns:
+            A float number, the low critical threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        temp_dict = self.get_sensor()
+        if temp_dict is None:
+            return None
+        value = temp_dict.get("min", None)
+        if value is None:
+            return None
+        return round(float(value), 1)
+
+    def get_minimum_recorded(self):
+        """
+        Retrieves the minimum recorded temperature of thermal
+
+        Returns:
+            A float number, the minimum recorded temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        # not supported
+        return False
+
+    def get_maximum_recorded(self):
+        """
+        Retrieves the maximum recorded temperature of thermal
+
+        Returns:
+            A float number, the maximum recorded temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        # not supported
+        return False
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/watchdog.py
new file mode 100644
index 000000000000..948337f47a9a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/sonic_platform/watchdog.py
@@ -0,0 +1,236 @@
+#!/usr/bin/env python3
+
+########################################################################
+#
+#
+# Abstract base class for implementing a platform-specific class with
+# which to interact with a hardware watchdog module in SONiC
+#
+########################################################################
+
+import fcntl
+import os
+import array
+
+try:
+    from sonic_platform_base.watchdog_base import WatchdogBase
+except ImportError as error:
+    raise ImportError(str(error) + "- required module not found") from error
+
+
+# ioctl constants
+IO_WRITE = 0x40000000
+IO_READ = 0x80000000
+IO_READ_WRITE = 0xC0000000
+IO_SIZE_INT = 0x00040000
+IO_SIZE_40 = 0x00280000
+IO_TYPE_WATCHDOG = ord('W') << 8
+
+WDR_INT = IO_READ | IO_SIZE_INT | IO_TYPE_WATCHDOG
+WDR_40 = IO_READ | IO_SIZE_40 | IO_TYPE_WATCHDOG
+WDWR_INT = IO_READ_WRITE | IO_SIZE_INT | IO_TYPE_WATCHDOG
+
+# Watchdog ioctl command
+WDIOC_GETSUPPORT = 0 | WDR_40
+WDIOC_GETSTATUS = 1 | WDR_INT
+WDIOC_GETBOOTSTATUS = 2 | WDR_INT
+WDIOC_GETTEMP = 3 | WDR_INT
+WDIOC_SETOPTIONS = 4 | WDR_INT
+WDIOC_KEEPALIVE = 5 | WDR_INT
+WDIOC_SETTIMEOUT = 6 | WDWR_INT
+WDIOC_GETTIMEOUT = 7 | WDR_INT
+WDIOC_SETPRETIMEOUT = 8 | WDWR_INT
+WDIOC_GETPRETIMEOUT = 9 | WDR_INT
+WDIOC_GETTIMELEFT = 10 | WDR_INT
+
+# Watchdog status constants
+WDIOS_DISABLECARD = 0x0001
+WDIOS_ENABLECARD = 0x0002
+
+WDT_COMMON_ERROR = -1
+WDT_IDENTITY = "CPLD Watchdog"
+WDT_SYSFS_PATH = "/sys/class/watchdog/"
+
+DEFAULT_TIMEOUT = 180
+
+
+class Watchdog(WatchdogBase):
+    """
+    Abstract base class for interfacing with a hardware watchdog module
+    """
+
+    def __init__(self):
+        self.watchdog, self.wdt_main_dev_name = self._get_wdt()
+        self.status_path = "/sys/class/watchdog/%s/status" % self.wdt_main_dev_name
+        self.state_path = "/sys/class/watchdog/%s/state" % self.wdt_main_dev_name
+        self.timeout_path = "/sys/class/watchdog/%s/timeout" % self.wdt_main_dev_name
+        # Set default value
+        self._disable()
+        self.armed = False
+        self.timeout = self._gettimeout()
+
+    def _is_wd_main(self, dev):
+        """
+        Checks watchdog identity
+        """
+        identity = self._read_file(
+            "{}/{}/identity".format(WDT_SYSFS_PATH, dev))
+        return identity == WDT_IDENTITY
+
+    def _get_wdt(self):
+        """
+        Retrieves watchdog device
+        """
+        wdt_main_dev_list = [dev for dev in os.listdir(
+            "/dev/") if dev.startswith("watchdog") and self._is_wd_main(dev)]
+        if not wdt_main_dev_list:
+            return None
+        wdt_main_dev_name = wdt_main_dev_list[0]
+        watchdog_device_path = "/dev/{}".format(wdt_main_dev_name)
+        watchdog = os.open(watchdog_device_path, os.O_RDWR)
+        return watchdog, wdt_main_dev_name
+
+    def _read_file(self, file_path):
+        """
+        Read text file
+        """
+        try:
+            with open(file_path, "r") as fd:
+                txt = fd.read()
+        except IOError:
+            return WDT_COMMON_ERROR
+        return txt.strip()
+
+    def _enable(self):
+        """
+        Turn on the watchdog timer
+        """
+        req = array.array('h', [WDIOS_ENABLECARD])
+        fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False)
+
+    def _disable(self):
+        """
+        Turn off the watchdog timer
+        """
+        req = array.array('h', [WDIOS_DISABLECARD])
+        fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False)
+
+    def _keepalive(self):
+        """
+        Keep alive watchdog timer
+        """
+        fcntl.ioctl(self.watchdog, WDIOC_KEEPALIVE)
+
+    def _settimeout(self, seconds):
+        """
+        Set watchdog timer timeout
+        @param seconds - timeout in seconds
+        @return is the actual set timeout
+        """
+        req = array.array('I', [seconds])
+        fcntl.ioctl(self.watchdog, WDIOC_SETTIMEOUT, req, True)
+        return int(req[0])
+
+    def _gettimeout(self):
+        """
+        Get watchdog timeout
+        @return watchdog timeout
+        """
+        req = array.array('I', [0])
+        fcntl.ioctl(self.watchdog, WDIOC_GETTIMEOUT, req, True)
+
+        return int(req[0])
+
+    def _gettimeleft(self):
+        """
+        Get time left before watchdog timer expires
+        @return time left in seconds
+        """
+        req = array.array('I', [0])
+        fcntl.ioctl(self.watchdog, WDIOC_GETTIMELEFT, req, True)
+
+        return int(req[0])
+
+    def arm(self, seconds):
+        """
+        Arm the hardware watchdog with a timeout of <seconds> seconds.
+        If the watchdog is currently armed, calling this function will
+        simply reset the timer to the provided value. If the underlying
+        hardware does not support the value provided in <seconds>, this
+        method should arm the watchdog with the *next greater* available
+        value.
+
+        Returns:
+            An integer specifying the *actual* number of seconds the watchdog
+            was armed with. On failure returns -1.
+        """
+        ret = WDT_COMMON_ERROR
+        if seconds < 0:
+            return ret
+
+        try:
+            if self.timeout != seconds:
+                self.timeout = self._settimeout(seconds)
+            if self.armed:
+                self._keepalive()
+            else:
+                self._settimeout(seconds)
+                self._enable()
+                self.armed = True
+            ret = self.timeout
+        except IOError:
+            pass
+
+        return ret
+
+    def disarm(self):
+        """
+        Disarm the hardware watchdog
+
+        Returns:
+            A boolean, True if watchdog is disarmed successfully, False if not
+        """
+        disarmed = False
+        if self.is_armed():
+            try:
+                self._disable()
+                self.armed = False
+                disarmed = True
+            except IOError:
+                pass
+
+        return disarmed
+
+    def is_armed(self):
+        """
+        Retrieves the armed state of the hardware watchdog.
+
+        Returns:
+            A boolean, True if watchdog is armed, False if not
+        """
+        return self.armed
+
+    def get_remaining_time(self):
+        """
+        If the watchdog is armed, retrieve the number of seconds remaining on
+        the watchdog timer
+
+        Returns:
+            An integer specifying the number of seconds remaining on thei
+            watchdog timer. If the watchdog is not armed, returns -1.
+        """
+        timeleft = WDT_COMMON_ERROR
+
+        if self.armed:
+            try:
+                timeleft = self._gettimeleft()
+            except IOError:
+                pass
+
+        return timeleft
+
+    def __del__(self):
+        """
+        Close watchdog
+        """
+        os.close(self.watchdog)

From 3146bfa98885e26e6d38779c94131e34dcb0c676 Mon Sep 17 00:00:00 2001
From: Arvindsrinivasan Lakshmi Narasimhan
 <55814491+arlakshm@users.noreply.github.com>
Date: Mon, 25 Nov 2024 20:37:58 -0800
Subject: [PATCH 273/364] add startup_tsa_tsb_service_files (#20804)

---
 device/arista/x86_64-arista_7800r3_48cq2_lc/services.conf        | 1 +
 device/arista/x86_64-arista_7800r3_48cq2_lc/startup-tsa-tsb.conf | 1 +
 device/arista/x86_64-arista_7800r3_48cqm2_lc/services.conf       | 1 +
 .../arista/x86_64-arista_7800r3_48cqm2_lc/startup-tsa-tsb.conf   | 1 +
 device/arista/x86_64-arista_7800r3a_36d2_lc/services.conf        | 1 +
 device/arista/x86_64-arista_7800r3a_36d2_lc/startup-tsa-tsb.conf | 1 +
 6 files changed, 6 insertions(+)
 create mode 100644 device/arista/x86_64-arista_7800r3_48cq2_lc/services.conf
 create mode 100644 device/arista/x86_64-arista_7800r3_48cq2_lc/startup-tsa-tsb.conf
 create mode 100644 device/arista/x86_64-arista_7800r3_48cqm2_lc/services.conf
 create mode 100644 device/arista/x86_64-arista_7800r3_48cqm2_lc/startup-tsa-tsb.conf
 create mode 100644 device/arista/x86_64-arista_7800r3a_36d2_lc/services.conf
 create mode 100644 device/arista/x86_64-arista_7800r3a_36d2_lc/startup-tsa-tsb.conf

diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/services.conf b/device/arista/x86_64-arista_7800r3_48cq2_lc/services.conf
new file mode 100644
index 000000000000..2a0a236a8afe
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/services.conf
@@ -0,0 +1 @@
+startup_tsa_tsb.service
diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/startup-tsa-tsb.conf b/device/arista/x86_64-arista_7800r3_48cq2_lc/startup-tsa-tsb.conf
new file mode 100644
index 000000000000..150337493256
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/startup-tsa-tsb.conf
@@ -0,0 +1 @@
+STARTUP_TSB_TIMER=900
diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/services.conf b/device/arista/x86_64-arista_7800r3_48cqm2_lc/services.conf
new file mode 100644
index 000000000000..2a0a236a8afe
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/services.conf
@@ -0,0 +1 @@
+startup_tsa_tsb.service
diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/startup-tsa-tsb.conf b/device/arista/x86_64-arista_7800r3_48cqm2_lc/startup-tsa-tsb.conf
new file mode 100644
index 000000000000..150337493256
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/startup-tsa-tsb.conf
@@ -0,0 +1 @@
+STARTUP_TSB_TIMER=900
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/services.conf b/device/arista/x86_64-arista_7800r3a_36d2_lc/services.conf
new file mode 100644
index 000000000000..2a0a236a8afe
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/services.conf
@@ -0,0 +1 @@
+startup_tsa_tsb.service
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/startup-tsa-tsb.conf b/device/arista/x86_64-arista_7800r3a_36d2_lc/startup-tsa-tsb.conf
new file mode 100644
index 000000000000..150337493256
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/startup-tsa-tsb.conf
@@ -0,0 +1 @@
+STARTUP_TSB_TIMER=900

From b4034fca92c4897409877ace30345d8e1b6778aa Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 26 Nov 2024 19:01:22 +0800
Subject: [PATCH 274/364] [submodule] Update submodule sonic-swss to the latest
 HEAD automatically (#20920)

#### Why I did it
src/sonic-swss
```
* 04255e06 - (HEAD -> master, origin/master, origin/HEAD) Skip route group immutable test (#3393) (2 hours ago) [Lawrence Lee]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 1847195cf02a..04255e069d1d 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 1847195cf02a2baa478a664a671adc95c704a810
+Subproject commit 04255e069d1dd337b945bc7c68a13498d128f611

From 8455f9b41d387fecb12085683c6fca056443d4c4 Mon Sep 17 00:00:00 2001
From: Feng-msft <fenpan@microsoft.com>
Date: Tue, 26 Nov 2024 22:00:41 +0800
Subject: [PATCH 275/364] Add bmp dynamic feature switch in frr side config.
 (#20895)

Why I did it
Add bmp dynamic feature switch in frr side config, later will update liquid template to control bmp feature based on version.

Work item tracking
Microsoft ADO (number only):27588893
How I did it
Update bgpd.conf and supervisord.conf template to monitor the feature switch, and turn on corresponding section. Later once we want to turn on bmp feature, we will assign specific version on NDM liquid template, and on the rollout-ed host it will require a new config reload to take effect.

How to verify it
Added unit test cases.
---
 .../docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 | 13 +++
 .../frr/supervisord/supervisord.conf.j2       |  4 +
 .../tests/sample_output/py2/bgpd_frr_bmp.conf | 89 +++++++++++++++++++
 .../tests/sample_output/py3/bgpd_frr_bmp.conf | 89 +++++++++++++++++++
 src/sonic-config-engine/tests/test_frr.py     |  4 +
 5 files changed, 199 insertions(+)
 create mode 100644 src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_bmp.conf
 create mode 100644 src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_bmp.conf

diff --git a/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2
index da6358a00ca6..db11d662a3af 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2
@@ -88,6 +88,19 @@ router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }}
   bgp graceful-restart select-defer-time {{ constants.bgp.graceful_restart.select_defer_time | default(45) }}
 {% endif %}
 !
+{# set bmp info #}
+{% if (FEATURE is defined) and ('bmp' in FEATURE) and ('state' in FEATURE['bmp']) and (FEATURE['bmp']['state'] == 'enabled') %}
+!
+  bmp mirror buffer-limit 4294967214
+!
+  bmp targets sonic-bmp
+  bmp stats interval 1000
+  bmp monitor ipv4 unicast pre-policy
+  bmp monitor ipv6 unicast pre-policy
+  bmp connect 127.0.0.1 port 5000 min-retry 1000 max-retry 2000
+!
+!
+{% endif %}
 {# set router-id #}
 {% if DEVICE_METADATA['localhost']['sub_role'] == 'BackEnd' or DEVICE_METADATA['localhost']['switch_type'] == 'voq' or DEVICE_METADATA['localhost']['switch_type'] == 'chassis-packet' %}
 {% if 'bgp_router_id' in DEVICE_METADATA['localhost'] %}
diff --git a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
index 15aa2ed55110..445dbf08688a 100644
--- a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
+++ b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
@@ -77,7 +77,11 @@ dependent_startup_wait_for=zebra:running
 {% endif %}
 
 [program:bgpd]
+{% if FEATURE is defined and FEATURE.bmp is defined and FEATURE.bmp.state is defined and FEATURE.bmp.state == "enabled" %}
+command=/usr/lib/frr/bgpd -A 127.0.0.1 -M snmp -M bmp
+{% else %}
 command=/usr/lib/frr/bgpd -A 127.0.0.1 -M snmp
+{% endif %}
 priority=5
 stopsignal=KILL
 autostart=false
diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_bmp.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_bmp.conf
new file mode 100644
index 000000000000..8a6ceb39e6ba
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_bmp.conf
@@ -0,0 +1,89 @@
+!
+! template: bgpd/bgpd.conf.j2
+!
+!
+! =========== Managed by sonic-cfggen DO NOT edit manually! ====================
+! generated by templates/quagga/bgpd.conf.j2 with config DB data
+! file: bgpd.conf
+!
+!
+! template: common/daemons.common.conf.j2
+!
+hostname switch-t0
+password zebra
+enable password zebra
+!
+log syslog informational
+log facility local4
+!
+! end of template: common/daemons.common.conf.j2!
+agentx
+!
+!
+!
+! template: bgpd/bgpd.main.conf.j2
+!
+! bgp multiple-instance
+!
+! BGP configuration
+!
+! TSA configuration
+!
+ip prefix-list PL_LoopbackV4 permit 10.1.0.32/32
+!
+ipv6 prefix-list PL_LoopbackV6 permit fc00:1::/64
+!
+ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 5 permit 192.168.0.0/27
+!
+ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.200.0/27
+!
+!
+!
+router bgp 65100
+!
+  bgp log-neighbor-changes
+  bgp suppress-fib-pending
+  no bgp default ipv4-unicast
+  no bgp ebgp-requires-policy
+!
+  bgp bestpath as-path multipath-relax
+!
+  bgp graceful-restart restart-time 240
+  bgp graceful-restart
+  bgp graceful-restart preserve-fw-state
+  bgp graceful-restart select-defer-time 45
+!
+!
+  bmp mirror buffer-limit 4294967214
+!
+  bmp targets sonic-bmp
+  bmp stats interval 1000
+  bmp monitor ipv4 unicast pre-policy
+  bmp monitor ipv6 unicast pre-policy
+  bmp connect 127.0.0.1 port 5000 min-retry 1000 max-retry 2000
+!
+!
+  bgp router-id 10.1.0.32
+!
+  network 10.1.0.32/32
+!
+  address-family ipv6
+    network fc00:1::32/64
+  exit-address-family
+!
+  network 192.168.0.1/27
+  network 192.168.200.1/27
+!
+!
+!
+  address-family ipv4
+    maximum-paths 64
+  exit-address-family
+  address-family ipv6
+    maximum-paths 64
+  exit-address-family
+!
+! end of template: bgpd/bgpd.main.conf.j2
+!!
+! end of template: bgpd/bgpd.conf.j2
+!
diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_bmp.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_bmp.conf
new file mode 100644
index 000000000000..8a6ceb39e6ba
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_bmp.conf
@@ -0,0 +1,89 @@
+!
+! template: bgpd/bgpd.conf.j2
+!
+!
+! =========== Managed by sonic-cfggen DO NOT edit manually! ====================
+! generated by templates/quagga/bgpd.conf.j2 with config DB data
+! file: bgpd.conf
+!
+!
+! template: common/daemons.common.conf.j2
+!
+hostname switch-t0
+password zebra
+enable password zebra
+!
+log syslog informational
+log facility local4
+!
+! end of template: common/daemons.common.conf.j2!
+agentx
+!
+!
+!
+! template: bgpd/bgpd.main.conf.j2
+!
+! bgp multiple-instance
+!
+! BGP configuration
+!
+! TSA configuration
+!
+ip prefix-list PL_LoopbackV4 permit 10.1.0.32/32
+!
+ipv6 prefix-list PL_LoopbackV6 permit fc00:1::/64
+!
+ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 5 permit 192.168.0.0/27
+!
+ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.200.0/27
+!
+!
+!
+router bgp 65100
+!
+  bgp log-neighbor-changes
+  bgp suppress-fib-pending
+  no bgp default ipv4-unicast
+  no bgp ebgp-requires-policy
+!
+  bgp bestpath as-path multipath-relax
+!
+  bgp graceful-restart restart-time 240
+  bgp graceful-restart
+  bgp graceful-restart preserve-fw-state
+  bgp graceful-restart select-defer-time 45
+!
+!
+  bmp mirror buffer-limit 4294967214
+!
+  bmp targets sonic-bmp
+  bmp stats interval 1000
+  bmp monitor ipv4 unicast pre-policy
+  bmp monitor ipv6 unicast pre-policy
+  bmp connect 127.0.0.1 port 5000 min-retry 1000 max-retry 2000
+!
+!
+  bgp router-id 10.1.0.32
+!
+  network 10.1.0.32/32
+!
+  address-family ipv6
+    network fc00:1::32/64
+  exit-address-family
+!
+  network 192.168.0.1/27
+  network 192.168.200.1/27
+!
+!
+!
+  address-family ipv4
+    maximum-paths 64
+  exit-address-family
+  address-family ipv6
+    maximum-paths 64
+  exit-address-family
+!
+! end of template: bgpd/bgpd.main.conf.j2
+!!
+! end of template: bgpd/bgpd.conf.j2
+!
diff --git a/src/sonic-config-engine/tests/test_frr.py b/src/sonic-config-engine/tests/test_frr.py
index 92deef922752..5a7ca109b30f 100644
--- a/src/sonic-config-engine/tests/test_frr.py
+++ b/src/sonic-config-engine/tests/test_frr.py
@@ -78,3 +78,7 @@ def test_bgpd_frr_dualtor(self):
     def test_zebra_frr_dualtor(self):
         extra_data = {"DEVICE_METADATA": {"localhost": {"subtype": "DualToR"}}}
         self.assertTrue(*self.run_case('zebra/zebra.conf.j2', 'zebra_frr_dualtor.conf', extra_data=extra_data))
+
+    def test_bgpd_frr_bmp(self):
+        extra_data = {"FEATURE": {"bmp": {"state": "enabled"}}}
+        self.assertTrue(*self.run_case('bgpd/bgpd.conf.j2', 'bgpd_frr_bmp.conf', extra_data=extra_data))
\ No newline at end of file

From 5cc485b265629f56ae673128b1cee9fc62b2ca9c Mon Sep 17 00:00:00 2001
From: Vasundhara Volam <163894573+vvolam@users.noreply.github.com>
Date: Tue, 26 Nov 2024 08:41:49 -0800
Subject: [PATCH 276/364] [SmartSwitch] Define DPU helper functions (#20724)

Why I did it
Add new DPU helper functions to avoid code duplication

How I did it
Define new is_dpu, get_num_dpus helpers.
Define get_platform_json_data and get_dpu_info helper function for common code and refactor code accordingly.

How to verify it
Verified the changes on smart switch
---
 .../sonic_py_common/device_info.py            | 125 ++++++++++---
 src/sonic-py-common/tests/device_info_test.py | 171 ++++++++++++++++++
 2 files changed, 268 insertions(+), 28 deletions(-)

diff --git a/src/sonic-py-common/sonic_py_common/device_info.py b/src/sonic-py-common/sonic_py_common/device_info.py
index 75e8dcb5761a..238ab8dcdfdc 100644
--- a/src/sonic-py-common/sonic_py_common/device_info.py
+++ b/src/sonic-py-common/sonic_py_common/device_info.py
@@ -168,6 +168,34 @@ def get_platform_and_hwsku():
     return (platform, hwsku)
 
 
+def get_platform_json_data():
+    """
+    Retrieve the data from platform.json file
+
+    Returns:
+        A dictionary containing the key/value pairs as found in the platform.json file
+    """
+    platform = get_platform()
+    if not platform:
+        return None
+
+    platform_path = get_path_to_platform_dir()
+    if not platform_path:
+        return None
+
+    platform_json = os.path.join(platform_path, PLATFORM_JSON_FILE)
+    if not os.path.isfile(platform_json):
+        return None
+
+    try:
+        with open(platform_json, 'r') as f:
+            platform_data = json.loads(f.read())
+            return platform_data
+    except (json.JSONDecodeError, IOError, TypeError, ValueError):
+        # Handle any file reading and JSON parsing errors
+        return None
+
+
 def get_asic_conf_file_path():
     """
     Retrieves the path to the ASIC configuration file on the device
@@ -582,15 +610,30 @@ def is_smartswitch():
     if not platform:
         return False
 
-    # get platform.json file path
-    platform_json = os.path.join(HOST_DEVICE_PATH, platform, "platform.json")
-    try:
-        with open(platform_json, 'r') as f:
-            platform_cfg = json.loads(f.read())
-            return "DPUS" in platform_cfg
-    except IOError:
+    # Retrieve platform.json data
+    platform_data = get_platform_json_data()
+    if platform_data:
+        return "DPUS" in platform_data
+
+    return False
+
+
+def is_dpu():
+    # Get platform
+    platform = get_platform()
+    if not platform:
         return False
 
+    if not is_smartswitch():
+        return False
+
+    # Retrieve platform.json data
+    platform_data = get_platform_json_data()
+    if platform_data:
+        return 'DPU' in platform_data
+
+    return False
+
 
 def is_supervisor():
     platform_env_conf_file_path = get_platform_env_conf_file_path()
@@ -892,37 +935,63 @@ def is_frontend_port_present_in_host():
     return True
 
 
+def get_dpu_info():
+    """
+    Retrieves the DPU information from platform.json file.
+
+    Returns:
+        A dictionary containing the DPU information.
+    """
+
+    platform = get_platform()
+    if not platform:
+        return {}
+
+    # Retrieve platform.json data
+    platform_data = get_platform_json_data()
+    if not platform_data:
+        return {}
+
+    if "DPUS" in platform_data:
+        return platform_data["DPUS"]
+    elif 'DPU' in platform_data:
+        return platform_data['DPU']
+    else:
+        return {}
+
+
 def get_num_dpus():
     """
     Retrieves the number of DPUs from platform.json file.
 
-    Args:
-
     Returns:
         A integer to indicate the number of DPUs.
     """
 
-    platform = get_platform()
-    if not platform:
+    if is_dpu():
         return 0
 
-    # Get Platform path.
-    platform_path = get_path_to_platform_dir()
+    dpu_info = get_dpu_info()
+    if dpu_info is not None and len(dpu_info) > 0:
+        return len(dpu_info)
 
-    if os.path.isfile(os.path.join(platform_path, PLATFORM_JSON_FILE)):
-        json_file = os.path.join(platform_path, PLATFORM_JSON_FILE)
+    return 0
 
-        try:
-            with open(json_file, 'r') as file:
-                platform_data = json.load(file)
-        except (json.JSONDecodeError, IOError, TypeError, ValueError):
-            # Handle any file reading and JSON parsing errors
-            return 0
-
-        # Convert to lower case avoid case sensitive.
-        data = {k.lower(): v for k, v in platform_data.items()}
-        DPUs = data.get('dpus', None)
-        if DPUs is not None and len(DPUs) > 0:
-            return len(DPUs)
 
-    return 0
+def get_dpu_list():
+    """
+    Retrieves the list of DPUs from platform.json file.
+
+    Returns:
+        A list indicating the list of DPUs.
+        For example, ['dpu0', 'dpu1', 'dpu2']
+    """
+
+    if is_dpu():
+        return []
+
+    dpu_info = get_dpu_info()
+    if dpu_info is not None and len(dpu_info) > 0:
+        return list(dpu_info)
+
+    return []
diff --git a/src/sonic-py-common/tests/device_info_test.py b/src/sonic-py-common/tests/device_info_test.py
index 8596acd178db..e7ac9e88c3c2 100644
--- a/src/sonic-py-common/tests/device_info_test.py
+++ b/src/sonic-py-common/tests/device_info_test.py
@@ -10,6 +10,7 @@
     import mock
 
 import pytest
+import json
 
 from sonic_py_common import device_info
 
@@ -162,6 +163,176 @@ def test_get_platform_info(self, mock_hwsku, mock_machine_info, mock_sonic_ver,
         assert mock_hwsku.called_once()
         mock_cfg_inst.get_table.assert_called_once_with("DEVICE_METADATA")
 
+    @mock.patch("os.path.isfile")
+    @mock.patch("{}.open".format(BUILTINS))
+    @mock.patch("sonic_py_common.device_info.get_path_to_platform_dir")
+    @mock.patch("sonic_py_common.device_info.get_platform")
+    def test_get_platform_json_data(self, mock_get_platform, mock_get_path_to_platform_dir, mock_open, mock_isfile):
+        mock_get_platform.return_value = "x86_64-mlnx_msn2700-r0"
+        mock_get_path_to_platform_dir.return_value = "/usr/share/sonic/device"
+        mock_isfile.return_value = True
+        platform_json_data = {
+            "chassis": {
+                "name": "MSN2700"
+            }
+        }
+        open_mocked = mock.mock_open(read_data=json.dumps(platform_json_data))
+        mock_open.side_effect = open_mocked
+
+        result = device_info.get_platform_json_data()
+        assert result == platform_json_data
+        assert mock_open.call_count == 1
+
+        # Test case where platform is None
+        mock_get_platform.return_value = None
+        result = device_info.get_platform_json_data()
+        assert result is None
+
+        # Test case where platform path is None
+        mock_get_platform.return_value = "x86_64-mlnx_msn2700-r0"
+        mock_get_path_to_platform_dir.return_value = None
+        result = device_info.get_platform_json_data()
+        assert result is None
+
+        # Test case where platform.json file does not exist
+        mock_get_path_to_platform_dir.return_value = "/usr/share/sonic/device"
+        mock_isfile.return_value = False
+        result = device_info.get_platform_json_data()
+        assert result is None
+
+        # Test case where JSON decoding fails
+        mock_isfile.return_value = True
+        open_mocked = mock.mock_open(read_data="invalid json")
+        mock_open.side_effect = open_mocked
+        result = device_info.get_platform_json_data()
+        assert result is None
+
+    @mock.patch("sonic_py_common.device_info.get_platform_json_data")
+    @mock.patch("sonic_py_common.device_info.get_platform")
+    def test_is_smartswitch(self, mock_get_platform, mock_get_platform_json_data):
+        # Test case where platform is None
+        mock_get_platform.return_value = None
+        assert device_info.is_smartswitch() == False
+
+        # Test case where platform.json data is None
+        mock_get_platform.return_value="x86_64-mlnx_msn2700-r0"
+        mock_get_platform_json_data.return_value=None
+        assert device_info.is_smartswitch() == False
+
+        # Test case where platform.json data does not contain "DPUS"
+        mock_get_platform_json_data.return_value={}
+        assert device_info.is_smartswitch() == False
+
+        # Test case where platform.json data contains "DPUS"
+        mock_get_platform_json_data.return_value={"DPUS": {}}
+        assert device_info.is_smartswitch() == True
+
+    @mock.patch("sonic_py_common.device_info.get_platform_json_data")
+    @mock.patch("sonic_py_common.device_info.is_smartswitch")
+    @mock.patch("sonic_py_common.device_info.get_platform")
+    def test_is_dpu(self, mock_get_platform, mock_is_smartswitch, mock_get_platform_json_data):
+        # Test case where platform is None
+        mock_get_platform.return_value=None
+        assert device_info.is_dpu() == False
+
+        # Test case where platform is not a smart switch
+        mock_get_platform.return_value="x86_64-mlnx_msn2700-r0"
+        mock_is_smartswitch.return_value=False
+        assert device_info.is_dpu() == False
+
+        # Test case where platform is a smart switch but no DPU data in platform.json
+        mock_is_smartswitch.return_value=True
+        mock_get_platform_json_data.return_value={}
+        assert device_info.is_dpu() == False
+
+        # Test case where platform is a smart switch and DPU data is present in platform.json
+        mock_get_platform_json_data.return_value={"DPU": {}}
+        assert device_info.is_dpu() == True
+
+        # Test case where platform is a smart switch and DPU data is present in platform.json
+        mock_get_platform_json_data.return_value={"DPUS": {}}
+        assert device_info.is_dpu() == False
+
+    @mock.patch("sonic_py_common.device_info.get_platform_json_data")
+    @mock.patch("sonic_py_common.device_info.get_platform")
+    def test_get_dpu_info(self, mock_get_platform, mock_get_platform_json_data):
+        # Test case where platform is None
+        mock_get_platform.return_value = None
+        assert device_info.get_dpu_info() == {}
+
+        # Test case where platform.json data is None
+        mock_get_platform.return_value = "x86_64-mlnx_msn2700-r0"
+        mock_get_platform_json_data.return_value = None
+        assert device_info.get_dpu_info() == {}
+
+        # Test case where platform.json data does not contain "DPUS" or "DPU"
+        mock_get_platform_json_data.return_value = {}
+        assert device_info.get_dpu_info() == {}
+
+        # Test case where platform.json data contains "DPUS"
+        mock_get_platform_json_data.return_value = {"DPUS": {"dpu0": {}, "dpu1": {}}}
+        assert device_info.get_dpu_info() == {"dpu0": {}, "dpu1": {}}
+
+        # Test case where platform.json data contains "DPU"
+        mock_get_platform_json_data.return_value = {"DPU": {"dpu0": {}}}
+        assert device_info.get_dpu_info() == {"dpu0": {}}
+
+        # Test case where platform.json data does not contain "DPU" or "DPUS"
+        mock_get_platform_json_data.return_value = {"chassis": {}}
+        assert device_info.get_dpu_info() == {}
+
+    @mock.patch("sonic_py_common.device_info.get_platform_json_data")
+    @mock.patch("sonic_py_common.device_info.is_dpu")
+    @mock.patch("sonic_py_common.device_info.get_platform")
+    def test_get_num_dpus(self, mock_get_platform, mock_is_dpu, mock_get_platform_json_data):
+        # Test case where platform is None
+        mock_get_platform.return_value = None
+        assert device_info.get_num_dpus() == 0
+
+        # Test case where platform is a DPU
+        mock_get_platform.return_value = "x86_64-mlnx_msn2700-r0"
+        mock_is_dpu.return_value = True
+        assert device_info.get_num_dpus() == 0
+
+        # Test case where platform.json data is None
+        mock_is_dpu.return_value = False
+        mock_get_platform_json_data.return_value = None
+        assert device_info.get_num_dpus() == 0
+
+        # Test case where platform.json data does not contain DPUs
+        mock_get_platform_json_data.return_value = {}
+        assert device_info.get_num_dpus() == 0
+
+        # Test case where platform.json data contains DPUs
+        mock_get_platform_json_data.return_value = {"DPUS": {"dpu0": {}, "dpu1": {}}}
+        assert device_info.get_num_dpus() == 2
+
+    @mock.patch("sonic_py_common.device_info.get_platform_json_data")
+    @mock.patch("sonic_py_common.device_info.is_dpu")
+    @mock.patch("sonic_py_common.device_info.get_platform")
+    def test_get_dpu_list(self, mock_get_platform, mock_is_dpu, mock_get_platform_json_data):
+        # Test case where platform is None
+        mock_get_platform.return_value = None
+        assert device_info.get_dpu_list() == []
+
+        # Test case where platform is a DPU
+        mock_get_platform.return_value = "x86_64-mlnx_msn2700-r0"
+        mock_is_dpu.return_value = True
+        assert device_info.get_dpu_list() == []
+
+        # Test case where platform.json data is None
+        mock_is_dpu.return_value = False
+        mock_get_platform_json_data.return_value = None
+        assert device_info.get_dpu_list() == []
+
+        # Test case where platform.json data does not contain DPUs
+        mock_get_platform_json_data.return_value = {}
+        assert device_info.get_dpu_list() == []
+
+        # Test case where platform.json data contains DPUs
+        mock_get_platform_json_data.return_value = {"DPUS": {"dpu0": {}, "dpu1": {}}}
+        assert device_info.get_dpu_list() == ["dpu0", "dpu1"]
+
     @classmethod
     def teardown_class(cls):
         print("TEARDOWN")

From 8d016e755972ea16d400163ee56b8ab17abb776c Mon Sep 17 00:00:00 2001
From: vdahiya12 <67608553+vdahiya12@users.noreply.github.com>
Date: Tue, 26 Nov 2024 13:39:23 -0800
Subject: [PATCH 277/364] [yang] add Yang model for GRPCCLIENT (#20902)

Why I did it
Adding yang model for CONFIG_DB table GRPCCLIENT
Introduced by
https://github.com/sonic-net/sonic-platform-daemons/blob/b276e415d85f3e8a7c64532d95821c9000c9418d/sonic-ycabled/ycable/ycable_utilities/y_cable_helper.py#L407
---
 src/sonic-yang-models/doc/Configuration.md    |  1 +
 src/sonic-yang-models/setup.py                |  1 +
 .../tests/files/sample_config_db.json         | 13 +++
 .../yang_model_tests/tests/grpcclient.json    |  5 ++
 .../tests_config/grpcclient.json              | 12 +++
 .../yang-models/sonic-grpcclient.yang         | 79 +++++++++++++++++++
 6 files changed, 111 insertions(+)
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests/grpcclient.json
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests_config/grpcclient.json
 create mode 100644 src/sonic-yang-models/yang-models/sonic-grpcclient.yang

diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index 02108310f4f0..1f45b32a3e83 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -42,6 +42,7 @@ Table of Contents
          * [FABRIC_MONITOR](#fabric-monitor)
          * [FABRIC_PORT](#fabric-port)
          * [FLEX_COUNTER_TABLE](#flex_counter_table)
+         * [GRPCCLIENT](#grpcclient)
          * [Hash](#hash)
          * [IPv6 Link-local] (#ipv6-link-local)
          * [KDUMP](#kdump)
diff --git a/src/sonic-yang-models/setup.py b/src/sonic-yang-models/setup.py
index 5e130854eeba..04b652208ec7 100644
--- a/src/sonic-yang-models/setup.py
+++ b/src/sonic-yang-models/setup.py
@@ -204,6 +204,7 @@ def run(self):
                          './yang-models/sonic-bgp-sentinel.yang',
                          './yang-models/sonic-bmp.yang',
                          './yang-models/sonic-xcvrd-log.yang',
+                         './yang-models/sonic-grpcclient.yang',
                          './yang-models/sonic-serial-console.yang',
                          './yang-models/sonic-smart-switch.yang',]),
         ('cvlyang-models', ['./cvlyang-models/sonic-acl.yang',
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 7298cdec9c22..5d22bc3f81cc 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -2762,6 +2762,19 @@
 		"log_verbosity": "notice"
 	    }
 	},
+	"GRPCCLIENT": {
+            "config": {
+                "type": "secure",
+                "auth_level": "server",
+                "log_level": "info"
+            },
+            "certs": {
+                "client_crt": "grpcclient.crt",
+                "client_key": "grpcclient.key",
+                "ca_crt": "root.pem",
+                "grpc_ssl_credential": "azureclient.ms"
+            } 
+	},
         "BANNER_MESSAGE": {
             "global": {
                 "state": "enabled",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/grpcclient.json b/src/sonic-yang-models/tests/yang_model_tests/tests/grpcclient.json
new file mode 100644
index 000000000000..fd1a3a2ccd3a
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/grpcclient.json
@@ -0,0 +1,5 @@
+{
+    "GRPCCLIENT_CONFIG_CHANGE_VERBOSITY_LEVEL": {
+        "desc": "Consume verbosity level config changes. "
+    }
+}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/grpcclient.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/grpcclient.json
new file mode 100644
index 000000000000..79d92d1212aa
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/grpcclient.json
@@ -0,0 +1,12 @@
+{
+    "GRPCCLIENT_CONFIG_CHANGE_VERBOSITY_LEVEL": {
+        "sonic-grpcclient:sonic-grpcclient": {
+            "sonic-grpcclient:GRPCCLIENT": {
+                "sonic-grpcclient:config": 
+                    {
+                        "log_level": "info"
+                    }
+            }
+        }
+    }
+}
diff --git a/src/sonic-yang-models/yang-models/sonic-grpcclient.yang b/src/sonic-yang-models/yang-models/sonic-grpcclient.yang
new file mode 100644
index 000000000000..69d7b83d2672
--- /dev/null
+++ b/src/sonic-yang-models/yang-models/sonic-grpcclient.yang
@@ -0,0 +1,79 @@
+module sonic-grpcclient {
+    namespace "http://github.com/sonic-net/sonic-grpcclient";
+    prefix grpcclient;
+    yang-version 1.1;
+
+    organization
+        "SONiC";
+
+    contact
+        "SONiC";
+
+    description
+        "SONiC DualToR grpc client configuration data";
+
+    revision 2024-10-14 {
+        description
+            "Initial revision";
+    }
+
+    container sonic-grpcclient {
+
+        container GRPCCLIENT {
+
+            container config {
+
+                leaf type {
+                    type enumeration {
+                        enum secure;
+                        enum insecure;
+                    }
+                    description "grpc client security level. ";
+                }
+
+                leaf auth_level {
+                    type enumeration {
+                        enum server;
+                        enum client;
+                    }
+                    description "grpc client auth level. ";
+                }
+
+                leaf log_level {
+                    type enumeration {
+                        enum info;
+                        enum notice;
+                        enum debug;
+                        enum warning;
+                        enum critical;
+                    }
+                    description "grpc client log level. ";
+                }
+            }
+
+            container certs {
+
+                leaf client_crt {
+                    type string;
+                    description "grpc client certificate file name ";
+
+                }
+
+                leaf client_key {
+                    type string;
+                    description "grpc client key file name ";
+                }
+
+                leaf ca_crt {
+                    type string;
+                    description "grpc client root cert";
+                }
+
+                leaf grpc_ssl_credential {
+                    type string;
+                    description "grpc client ssl credential";
+                }
+            }
+        }
+    }
+}

From 8f69124ba5bd0158465a5388c233a0d3a109214d Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 27 Nov 2024 16:07:13 +0800
Subject: [PATCH 278/364] [submodule] Update submodule sonic-swss to the latest
 HEAD automatically (#20932)

#### Why I did it
src/sonic-swss
```
* 3da2e676 - (HEAD -> master, origin/master, origin/HEAD) [dualtor] Fix standby neighbor inconsistency after warm reboot (#3356) (2 hours ago) [Longxiang Lyu]
* 8bf38aff - [Chassis][LAG_ID] Address the same lagid been used in two different LCs issue (#3303) (2 hours ago) [Marty Y. Lok]
* a9080f78 - Fixed narrowing conversion issues. (#3395) (2 hours ago) [mramezani95]
* 98303af0 - [fpmsyncd] support pipeline to flush with a timer (#3241) (2 hours ago) [Yijiao Qin]
* a8c358fc - [Dash] Handle FC update for existing ENI objects (#3373) (6 hours ago) [Vivek]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 04255e069d1d..3da2e676ab64 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 04255e069d1dd337b945bc7c68a13498d128f611
+Subproject commit 3da2e676ab646be76d75ba443e8e8af60c0d217d

From 22ff854e7f6ae060545e65aa16063470ff514dd9 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 27 Nov 2024 19:00:53 +0800
Subject: [PATCH 279/364] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#20919)

#### Why I did it
src/sonic-sairedis
```
* c7ff2bcc - (HEAD -> master, origin/master, origin/HEAD) Add Flex counters bulk Dash meter stats fetch support in syncd (#1460) (26 hours ago) [Mukesh Moopath Velayudhan]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index e6ec1424788b..c7ff2bcc8936 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit e6ec1424788b887bcb04947486e16a1d770dc2c3
+Subproject commit c7ff2bcc893624b76bf5716157d6d99768f771da

From ccc278e18c130dc303888cde947c2d393645dc59 Mon Sep 17 00:00:00 2001
From: Gagan Punathil Ellath <gpunathilell@nvidia.com>
Date: Wed, 27 Nov 2024 04:06:59 -0800
Subject: [PATCH 280/364] [Mellanox] Platform update for DPU communication
 (#20817)

- Why I did it
The dpu_tty.py cli tool requires some platform specific configuration for communication to DPU using picocom.

- How I did it
The corresponding configuration is added to the platform.json to enable this tool for the smartswitch

- How to verify it
dpu_tty.py -n dpu0
---
 .../x86_64-nvidia_sn4280-r0/platform.json        | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json b/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json
index d2a798d25fce..c9370bd6d7f4 100644
--- a/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json
@@ -653,6 +653,10 @@
             "interface": {
                 "Ethernet224": "Ethernet0"
             },
+            "serial-console": {
+                "device": "ttyUSB0",
+                "baud-rate": "115200"
+            },
             "rshim_info": "rshim0",
             "bus_info": "0000:08:00.0"
         },
@@ -661,6 +665,10 @@
             "interface": {
                 "Ethernet232": "Ethernet0"
             },
+            "serial-console": {
+                "device": "ttyUSB1",
+                "baud-rate": "115200"
+            },
             "rshim_info": "rshim1",
             "bus_info": "0000:07:00.0"
         },
@@ -669,6 +677,10 @@
             "interface": {
                 "Ethernet240": "Ethernet0"
             },
+            "serial-console": {
+                "device": "ttyUSB2",
+                "baud-rate": "115200"
+            },
             "rshim_info": "rshim2",
             "bus_info": "0000:01:00.0"
         },
@@ -677,6 +689,10 @@
             "interface": {
                 "Ethernet248": "Ethernet0"
             },
+            "serial-console": {
+                "device": "ttyUSB3",
+                "baud-rate": "115200"
+            },
             "rshim_info": "rshim3",
             "bus_info": "0000:02:00.0"
         }

From a958dcd6bec1ec38955b104ceb3ead2af181c6bd Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E8=B3=93=E5=B0=91=E9=88=BA?=
 <51807939+geans-pin@users.noreply.github.com>
Date: Thu, 28 Nov 2024 00:37:26 +0800
Subject: [PATCH 281/364] merge common config files from broadcom sonic
 (#20802)

* merge common config files from broadcom sonic

* merge common config files from broadcom sonic

* keep a minimal set of configs in the common files

* add other settings back
---
 .../broadcom-sonic-td3.config.bcm             |  9 ++++
 .../broadcom-sonic-td3.config.bcm             | 25 ++++++++++
 .../broadcom-sonic-td3.config.bcm             | 26 ++++++++--
 .../broadcom-sonic-td4.config.bcm             | 19 +++++++
 .../broadcom-sonic-td2.config.bcm             |  6 ++-
 .../broadcom-sonic-td3.config.bcm             | 49 ++++++++++++++++++-
 .../broadcom-sonic-td4.config.bcm             | 18 +++++++
 .../broadcom-sonic-th.config.bcm              |  8 ++-
 .../broadcom-sonic-th2.config.bcm             | 13 +++--
 .../broadcom-sonic-th3.config.bcm             | 10 +++-
 .../broadcom-sonic-th4.config.bcm             | 19 +++++++
 src/sonic-device-data/tests/permitted_list    |  2 +
 12 files changed, 189 insertions(+), 15 deletions(-)
 create mode 100644 device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b27/broadcom-sonic-td3.config.bcm
 create mode 100644 device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b37/broadcom-sonic-td3.config.bcm
 create mode 100644 device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b78/broadcom-sonic-td4.config.bcm
 create mode 100644 device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b88/broadcom-sonic-td4.config.bcm
 create mode 100644 device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b99/broadcom-sonic-th4.config.bcm

diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b27/broadcom-sonic-td3.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b27/broadcom-sonic-td3.config.bcm
new file mode 100644
index 000000000000..18009ef9f3e7
--- /dev/null
+++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b27/broadcom-sonic-td3.config.bcm
@@ -0,0 +1,9 @@
+[Low Inheritance Precedence]
+mem_cache_enable=1
+l3_mem_entries=16384
+l3_alpm_enable=0
+riot_enable=0
+l2xmsg_mode=1
+l2_mem_entries=32768
+lpm_scaling_enable=0
+ipv6_lpm_128b_enable=0x1
\ No newline at end of file
diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b37/broadcom-sonic-td3.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b37/broadcom-sonic-td3.config.bcm
new file mode 100644
index 000000000000..574ba37ba09c
--- /dev/null
+++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b37/broadcom-sonic-td3.config.bcm
@@ -0,0 +1,25 @@
+[Low Inheritance Precedence]
+sai_tunnel_support=1
+flow_init_mode=1
+riot_enable=1
+vlan_xlate_1_mem_entries=16384
+vlan_xlate_2_mem_entries=2048
+mem_cache_enable=1
+sai_load_hw_config=/usr/lib/cancun/
+l2_entry_used_as_my_station=1
+core_clock_frequency=893
+use_all_splithorizon_groups=1
+riot_overlay_l3_intf_mem_size=4096
+riot_overlay_l3_egress_mem_size=8192
+l3_ecmp_levels=2
+riot_overlay_ecmp_resilient_hash_size=16384
+mpls_mem_entries=2048
+sai_fast_convergence_support=1
+bcm_num_cos=8
+sai_brcm_sonic_trap_group=1
+host_as_route_disable=1
+multi_hash_recurse_depth_l3=6
+sai_stats_support_mask=0x1
+
+# CPU Tx HW replication
+sai_hostif_netif_iff_up_set=1
diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b77/broadcom-sonic-td3.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b77/broadcom-sonic-td3.config.bcm
index 9dc71f839d16..0f71fda24322 100644
--- a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b77/broadcom-sonic-td3.config.bcm
+++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b77/broadcom-sonic-td3.config.bcm
@@ -1,12 +1,32 @@
-mem_cache_enable=0
+[Low Inheritance Precedence]
+mem_cache_enable=1
+flow_init_mode=1
+mpls_mem_entries=16384
+vlan_xlate_1_mem_entries=65536
+vlan_xlate_2_mem_entries=16384
+riot_enable=1
 ifp_inports_support_enable=1
 ipv6_lpm_128b_enable=0x1
 l3_max_ecmp_mode=1
 lpm_scaling_enable=0
 bcm_num_cos=10
-default_cpu_tx_queue=9
 mmu_lossless=0
 host_as_route_disable=1
 sai_eapp_config_file=/etc/broadcom/eapps_cfg.json
 sai_fast_convergence_support=1
-flow_init_mode=1
+sai_load_hw_config=/usr/lib/cancun/
+sai_nbr_bcast_ifp_optimized=1
+sai_brcm_sonic_acl_enhancements=1
+# Reduced Trap Group QSET for BRCM Sonic
+sai_brcm_sonic_trap_group=1
+l2_entry_used_as_my_station=1
+multi_hash_recurse_depth_l3=3
+sai_stats_support_mask=0x1
+
+#l3 common setting
+riot_overlay_ecmp_resilient_hash_size=16384
+riot_overlay_l3_egress_mem_size=32768
+riot_overlay_l3_intf_mem_size=8192
+
+l3_alpm_ipv6_128b_bkt_rsvd=1
+l3_ecmp_levels=2
diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b78/broadcom-sonic-td4.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b78/broadcom-sonic-td4.config.bcm
new file mode 100644
index 000000000000..55f78671c2e9
--- /dev/null
+++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b78/broadcom-sonic-td4.config.bcm
@@ -0,0 +1,19 @@
+[Low Inheritance Precedence]
+sai_tunnel_support: 1
+riot_enable: 1
+pktio_mode: 1
+vlan_flooding_l2mc_num_reserved: 0
+shared_block_mask_section: uc_bc
+ctr_evict_enable: 0
+sai_brcm_sonic_acl_enhancements: 1
+sai_field_group_auto_prioritize: 1
+sai_modify_hash_flexdigest: 1
+sai_fast_convergence_support: 1
+sai_port_queue_ecn_counter: 1
+l2_table_default_view: 1
+flexctr_action_reserved_ipmc_hitbit: 1
+default_cpu_tx_queue: 7
+max_vp_lags: 1024
+multi_network_groups: 1
+bcm_tunnel_term_compatible_mode: 1
+use_all_splithorizon_groups: 1
\ No newline at end of file
diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b85/broadcom-sonic-td2.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b85/broadcom-sonic-td2.config.bcm
index 01d767530da3..3093c2fce147 100644
--- a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b85/broadcom-sonic-td2.config.bcm
+++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b85/broadcom-sonic-td2.config.bcm
@@ -1,6 +1,10 @@
+[Low Inheritance Precedence]
 mmu_lossless=0
 #PTP
-num_queues_pci=24
+num_queues_pci=30
 num_queues_uc0=1
 num_queues_uc1=19
 sai_fast_convergence_support=1
+sai_nbr_bcast_ifp_optimized=1
+# Reduced Trap Group QSET for BRCM Sonic
+sai_brcm_sonic_trap_group=1
\ No newline at end of file
diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b87/broadcom-sonic-td3.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b87/broadcom-sonic-td3.config.bcm
index 1439c8d875a5..84cc04f9e295 100644
--- a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b87/broadcom-sonic-td3.config.bcm
+++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b87/broadcom-sonic-td3.config.bcm
@@ -1,8 +1,53 @@
-mem_cache_enable=0
+[Low Inheritance Precedence]
+mem_cache_enable=1
+mpls_mem_entries=16384
+vlan_xlate_1_mem_entries=65536
+vlan_xlate_2_mem_entries=16384
+flow_init_mode=1
+sai_tunnel_support=1
 ifp_inports_support_enable=1
 ipv6_lpm_128b_enable=0x1
 l3_max_ecmp_mode=1
 lpm_scaling_enable=0
 bcm_num_cos=10
-default_cpu_tx_queue=9
 mmu_lossless=0
+sai_nbr_bcast_ifp_optimized=1
+l2_entry_used_as_my_station=1
+multi_hash_recurse_depth_l3=3
+# Drop monitor and IFA configuration
+flowtracker_enable=2
+flowtracker_max_flows=48000
+flowtracker_drop_monitor_enable=1
+flowtracker_export_interval_usecs=1000000
+flowtracker_max_export_pkt_length=9000
+flowtracker_fsp_reinject_max_length=128
+host_as_route_disable=1
+num_queues_pci=46
+num_queues_uc0=1
+num_queues_uc1=1
+sai_eapp_config_file=/etc/broadcom/eapps_cfg.json
+ifa_enable=1
+sai_load_hw_config=/usr/lib/cancun/
+sai_fast_convergence_support=1
+sai_brcm_sonic_acl_enhancements=1
+# Reduced Trap Group QSET for BRCM Sonic
+sai_brcm_sonic_trap_group=1
+sai_stats_support_mask=0x1
+
+# MMU Lossless configurations 
+sai_optimized_mmu=1
+sai_mmu_tc_to_pg_config=1
+buf.map.egress_pool0.ingress_pool=0
+buf.map.egress_pool1.ingress_pool=0
+buf.map.egress_pool2.ingress_pool=1
+
+#Tunnels
+use_all_splithorizon_groups=1
+bcm_tunnel_term_compatible_mode=1
+
+#RIOT Enable
+riot_enable=1
+riot_overlay_l3_intf_mem_size=8192
+riot_overlay_l3_egress_mem_size=32768
+l3_ecmp_levels=2
+riot_overlay_ecmp_resilient_hash_size=16384
\ No newline at end of file
diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b88/broadcom-sonic-td4.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b88/broadcom-sonic-td4.config.bcm
new file mode 100644
index 000000000000..39d8492228fe
--- /dev/null
+++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b88/broadcom-sonic-td4.config.bcm
@@ -0,0 +1,18 @@
+[Low Inheritance Precedence]
+sai_tunnel_support: 1
+l2_table_default_view: 1
+riot_enable: 1
+pktio_mode: 1
+vlan_flooding_l2mc_num_reserved: 0
+shared_block_mask_section: uc_bc
+ctr_evict_enable: 0
+sai_brcm_sonic_acl_enhancements: 1
+sai_field_group_auto_prioritize: 1
+sai_modify_hash_flexdigest: 1
+sai_fast_convergence_support: 1
+sai_port_queue_ecn_counter: 1
+flexctr_action_reserved_ipmc_hitbit: 1
+default_cpu_tx_queue: 7
+multi_network_groups: 1
+bcm_tunnel_term_compatible_mode: 1
+use_all_splithorizon_groups: 1
\ No newline at end of file
diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b96/broadcom-sonic-th.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b96/broadcom-sonic-th.config.bcm
index e8b5b7d88517..48c1330831e2 100644
--- a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b96/broadcom-sonic-th.config.bcm
+++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b96/broadcom-sonic-th.config.bcm
@@ -1,9 +1,13 @@
+[Low Inheritance Precedence]
 mmu_lossless=0
 bcm_num_cos=10
 default_cpu_tx_queue=9
 #PTP
-num_queues_pci=24
+num_queues_pci=30
 num_queues_uc0=1
 num_queues_uc1=1
 sai_fast_convergence_support=1
-
+sai_nbr_bcast_ifp_optimized=1
+# Reduced Trap Group QSET for BRCM Sonic
+sai_brcm_sonic_trap_group=1
+sai_stats_support_mask=0x1
\ No newline at end of file
diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b97/broadcom-sonic-th2.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b97/broadcom-sonic-th2.config.bcm
index 039932b58f20..b9c9474190da 100644
--- a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b97/broadcom-sonic-th2.config.bcm
+++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b97/broadcom-sonic-th2.config.bcm
@@ -1,5 +1,8 @@
-schan_intr_enable=0
+[Low Inheritance Precedence]
 l2xmsg_mode=1
+max_vp_lags=0
+flow_init_mode=1
+schan_intr_enable=0
 mmu_lossless=0
 arl_clean_timeout_usec=15000000
 asf_mem_profile=2
@@ -9,12 +12,10 @@ cdma_timeout_usec=15000000
 dma_desc_timeout_usec=15000000
 ipv6_lpm_128b_enable=1
 lpm_scaling_enable=0
-max_vp_lags=0
 miim_intr_enable=0
 module_64ports=1
 oversubscribe_mode=1
 bcm_num_cos=10
-default_cpu_tx_queue=9
 # Drop monitor configuration
 flowtracker_enable=2
 flowtracker_max_flows=48000
@@ -22,10 +23,12 @@ flowtracker_drop_monitor_enable=1
 flowtracker_export_interval_usecs=1000000
 flowtracker_max_export_pkt_length=9000
 flowtracker_fsp_reinject_max_length=128
-flow_init_mode=1
 num_queues_pci=46
 num_queues_uc0=1
 num_queues_uc1=1
 sai_eapp_config_file=/etc/broadcom/eapps_cfg.json
 sai_fast_convergence_support=1
-
+sai_nbr_bcast_ifp_optimized=1
+# Reduced Trap Group QSET for BRCM Sonic
+sai_brcm_sonic_trap_group=1
+sai_stats_support_mask=0x1
\ No newline at end of file
diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b98/broadcom-sonic-th3.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b98/broadcom-sonic-th3.config.bcm
index 460fb5186b4a..4dad54ceb1a4 100644
--- a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b98/broadcom-sonic-th3.config.bcm
+++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b98/broadcom-sonic-th3.config.bcm
@@ -1,10 +1,12 @@
+[Low Inheritance Precedence]
+l2xmsg_mode.0=1
+flow_init_mode=1
 phy_null=1
 pll_bypass=1
 core_clock_frequency=1325
 dpr_clock_frequency=1000
 device_clock_frequency=1325
 port_flex_enable=1
-l2xmsg_mode.0=1
 mmu_port_num_mc_queue.0=1
 module_64ports.0=1
 multicast_l2_range.0=511
@@ -19,10 +21,14 @@ flowtracker_drop_monitor_enable=1
 flowtracker_export_interval_usecs=1000000
 flowtracker_max_export_pkt_length=9000
 flowtracker_fsp_reinject_max_length=128
-flow_init_mode=1
 num_queues_pci=46
 num_queues_uc0=1
 num_queues_uc1=1
 sai_eapp_config_file=/etc/broadcom/eapps_cfg.json
 sai_fast_convergence_support=1
+sai_nbr_bcast_ifp_optimized=1
+# Reduced Trap Group QSET for BRCM Sonic
+sai_brcm_sonic_trap_group=1
 
+# MMU Lossless configurations
+sai_optimized_mmu=1
\ No newline at end of file
diff --git a/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b99/broadcom-sonic-th4.config.bcm b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b99/broadcom-sonic-th4.config.bcm
new file mode 100644
index 000000000000..90954d6332fe
--- /dev/null
+++ b/device/broadcom/x86_64-broadcom_common/x86_64-broadcom_b99/broadcom-sonic-th4.config.bcm
@@ -0,0 +1,19 @@
+[Low Inheritance Precedence]
+sai_tunnel_support: 2
+#System Configs
+pktio_mode: 1
+pfc_deadlock_seq_control : 1
+default_cpu_tx_queue: 7
+vlan_flooding_l2mc_num_reserved: 0
+shared_block_mask_section: uc_bc
+
+#L3 Configs
+ipv6_lpm_128b_enable: 1
+skip_protocol_default_entries: 1
+l3_alpm_template: 1
+l3_alpm_hit_skip: 1
+l3_ecmp_member_first_lkup_mem_size: 12288
+l3_intf_vlan_split_egress : 1
+bcm_tunnel_term_compatible_mode: 1
+sai_field_group_auto_prioritize: 1
+sai_port_queue_ecn_counter: 1
diff --git a/src/sonic-device-data/tests/permitted_list b/src/sonic-device-data/tests/permitted_list
index a4c904a3e125..ff0f433b0917 100644
--- a/src/sonic-device-data/tests/permitted_list
+++ b/src/sonic-device-data/tests/permitted_list
@@ -351,3 +351,5 @@ cache_coherency_check
 core_clock_to_pm_clock_factor
 flowtracker_ipfix_observation_domain_id
 flowtracker_num_unique_user_entry_keys
+sai_mmu_tc_to_pg_config
+sai_hostif_netif_iff_up_set

From ca4ed25743cb9eb521434890f9e14513945138cc Mon Sep 17 00:00:00 2001
From: saksarav-nokia <sakthivadivu.saravanaraj@nokia.com>
Date: Wed, 27 Nov 2024 17:56:32 -0500
Subject: [PATCH 282/364] [Nokia][Device] Set the BCM linkscan interval via bcm
 config (#20858)

Increased the linkscan interval and stat interval

Signed-off-by: saksarav <sakthivadivu.saravanaraj@nokia.com>
---
 .../0/jr2cp-nokia-18x100g-4x25g-config.bcm                     | 1 +
 .../1/jr2cp-nokia-18x100g-4x25g-config.bcm                     | 1 +
 .../Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm    | 1 +
 .../Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm    | 1 +
 .../Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm               | 3 ++-
 .../Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm               | 3 ++-
 .../Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm              | 3 ++-
 .../Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm              | 3 ++-
 .../Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm              | 3 ++-
 .../Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm              | 3 ++-
 .../Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm              | 3 ++-
 .../Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm              | 3 ++-
 .../Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm               | 3 ++-
 .../Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm               | 3 ++-
 .../Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm               | 3 ++-
 .../Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm               | 3 ++-
 .../Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm               | 3 ++-
 .../Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm               | 3 ++-
 .../Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm               | 3 ++-
 .../Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm               | 3 ++-
 20 files changed, 36 insertions(+), 16 deletions(-)

diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm
index 6f07539f976c..010367478088 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm
@@ -1267,6 +1267,7 @@ polled_irq_delay.BCM8885X=5
 polled_irq_mode.BCM8885X=0
 port_fec_fabric.BCM8885X=7
 bcm_stat_interval.BCM8885X=1000000
+bcm_linkscan_interval=500000
 
 
 port_init_cl72_256=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm
index a1419db8fd64..034b80def8ed 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm
@@ -1267,6 +1267,7 @@ polled_irq_delay.BCM8885X=5
 polled_irq_mode.BCM8885X=0
 port_fec_fabric.BCM8885X=7
 bcm_stat_interval.BCM8885X=1000000
+bcm_linkscan_interval=500000
 
 
 port_init_cl72_1=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm
index fa5849f4549f..2c241bcfff4a 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm
@@ -1268,6 +1268,7 @@ polled_irq_delay.BCM8885X=5
 polled_irq_mode.BCM8885X=0
 port_fec_fabric.BCM8885X=7
 bcm_stat_interval.BCM8885X=1000000
+bcm_linkscan_interval=500000
 
 
 port_init_cl72_1=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm
index ccb87e9ad0e9..1ec4a9074523 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm
@@ -1268,6 +1268,7 @@ polled_irq_delay.BCM8885X=5
 polled_irq_mode.BCM8885X=0
 port_fec_fabric.BCM8885X=7
 bcm_stat_interval.BCM8885X=1000000
+bcm_linkscan_interval=500000
 
 
 port_init_cl72_1=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm
index 12a0b532fd84..c9036f36c9ec 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm
@@ -2,7 +2,8 @@
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=1
 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
 custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm
index 59106ba59387..8c0517292d4a 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm
@@ -2,7 +2,8 @@
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=2
 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
 custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm
index a481d75a94bf..dc5a99c09533 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm
@@ -2,7 +2,8 @@
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=11
 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
 custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm
index 2c315e84ac4c..12f59db6b93d 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm
@@ -2,7 +2,8 @@
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=12
 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
 custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm
index 581b5d76a914..e7769dbe80af 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm
@@ -2,7 +2,8 @@
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=13
 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
 custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm
index 364690e7ae40..276b576485a6 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm
@@ -2,7 +2,8 @@
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=14
 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
 custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm
index d12d791c83e2..bd35d4a44eac 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm
@@ -2,7 +2,8 @@
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=15
 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
 custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm
index 86d9af38e0b2..140d21415fff 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm
@@ -2,7 +2,8 @@
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=16
 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
 custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm
index 0c4b5403bf51..fbcfc7a8ed07 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm
@@ -2,7 +2,8 @@
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=3
 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
 custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm
index 1617c40e6ca2..8c485dffa120 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm
@@ -2,7 +2,8 @@
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=4
 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
 custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm
index f905a66b2e97..7d73ac75aeec 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm
@@ -2,7 +2,8 @@
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=5
 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
 custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm
index f25c8b10d2a8..95d9b4117409 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm
@@ -2,7 +2,8 @@
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=6
 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
 custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm
index 5a824fcde8aa..ddbe158e4d5c 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm
@@ -2,7 +2,8 @@
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=7
 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
 custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm
index d27ebd282729..26595b410621 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm
@@ -2,7 +2,8 @@
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=8
 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
 custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm
index cb8307452b6a..a845cc4cb0f1 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm
@@ -2,7 +2,8 @@
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=9
 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
 custom_feature_access_only.BCM8879X=0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm
index 184d1136033e..953da5cc9245 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm
@@ -2,7 +2,8 @@
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=10
 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
-bcm_stat_interval.BCM8879X=5000000
+bcm_stat_interval.BCM8879X=15000000
+bcm_linkscan_interval=500000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
 custom_feature_access_only.BCM8879X=0

From 13079525724024e254bb4af285d01452cc4c6979 Mon Sep 17 00:00:00 2001
From: Stephen Sun <5379172+stephenxs@users.noreply.github.com>
Date: Thu, 28 Nov 2024 10:19:45 +0800
Subject: [PATCH 283/364] Support new field "supporting_bulk_counter_groups" in
 DEVICE_METADATA|localhost for Mellanox-SN5600-V256 (#20548)

Why I did it
Support new field "supporting_bulk_counter_groups" in DEVICE_METADATA|localhost for Mellanox-SN5600-V256
---
 .../Mellanox-SN5600-V256/supporting_bulk_counter_groups  | 1 +
 files/build_templates/docker_image_ctl.j2                | 4 ++++
 files/build_templates/swss_vars.j2                       | 3 +++
 .../tests/yang_model_tests/tests/device_metadata.json    | 3 +++
 .../yang_model_tests/tests_config/device_metadata.json   | 9 +++++++++
 .../yang-models/sonic-device_metadata.yang               | 5 +++++
 6 files changed, 25 insertions(+)
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/supporting_bulk_counter_groups

diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/supporting_bulk_counter_groups b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/supporting_bulk_counter_groups
new file mode 100644
index 000000000000..178f0575d049
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/supporting_bulk_counter_groups
@@ -0,0 +1 @@
+QUEUE_WATERMARK_STAT_COUNTER,PG_WATERMARK_STAT_COUNTER,PFC_WD
diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 294dd46ce1e7..4f7c31147f9a 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -444,6 +444,10 @@ start() {
         if [ -f "$CREATE_ONLY_CONFIG_DB_BUFFERS_JSON" ]; then
             $SONIC_DB_CLI CONFIG_DB HSET 'DEVICE_METADATA|localhost' create_only_config_db_buffers true
         fi
+        SUPPORTING_BULK_COUNTER_GROUPS="$HWSKU_FOLDER/supporting_bulk_counter_groups"
+        if [ -f "$SUPPORTING_BULK_COUNTER_GROUPS" ]; then
+            $SONIC_DB_CLI CONFIG_DB HSET 'DEVICE_METADATA|localhost' supporting_bulk_counter_groups@ $(cat $SUPPORTING_BULK_COUNTER_GROUPS)
+        fi
     fi
     {%- endif %}
 
diff --git a/files/build_templates/swss_vars.j2 b/files/build_templates/swss_vars.j2
index f35d0fc080ad..53639f01f7f1 100644
--- a/files/build_templates/swss_vars.j2
+++ b/files/build_templates/swss_vars.j2
@@ -7,6 +7,9 @@
     "mac": "{{ DEVICE_METADATA.localhost.mac }}",
     "resource_type": "{{ DEVICE_METADATA.localhost.resource_type }}",
     "synchronous_mode": {% if DEVICE_METADATA.localhost.synchronous_mode == "disable" %}"disable"{% else %}"enable"{% endif %},
+    {%if DEVICE_METADATA.localhost.supporting_bulk_counter_groups is defined and DEVICE_METADATA.localhost.supporting_bulk_counter_groups != '' -%}
+    "supporting_bulk_counter_groups": "{{ DEVICE_METADATA.localhost.supporting_bulk_counter_groups|join(',') }}",
+    {% endif -%}
     "dual_tor": {% if DEVICE_METADATA.localhost.type == "ToRRouter" and DEVICE_METADATA.localhost.subtype == "DualToR" %}"enable"{% else %}"disable"{% endif %},
     "dscp_remapping": {% if SYSTEM_DEFAULTS is defined and SYSTEM_DEFAULTS.tunnel_qos_remap is defined and SYSTEM_DEFAULTS.tunnel_qos_remap.status == "enabled" %}"enable"{% else %}"disable"{% endif %}
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
index 99310fecc6ab..8e834ed08a90 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
@@ -175,6 +175,9 @@
         "desc": "Verifying invalid create_only_config_db_buffers value",
         "eStrKey": "InvalidValue"
     },
+    "DEVICE_METADATA_VALID_SUPPORTING_BULK_COUNTER_GROUPS": {
+        "desc": "Verifying the supporting_bulk_counter_groups value"
+    },
     "DEVICE_METADATA_VALID_BGP_ROUTER_ID": {
         "desc": "Verifying bgp_router_id configuration."
     },
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
index 44f0966c8b18..9662741046b6 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
@@ -482,6 +482,15 @@
             }
         }
     },
+    "DEVICE_METADATA_VALID_SUPPORTING_BULK_COUNTER_GROUPS": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "supporting_bulk_counter_groups": ["QUEUE_WATERMARK_STAT_COUNTER","PG_WATERMARK_STAT_COUNTER"]
+                }
+            }
+        }
+    },
     "DEVICE_METADATA_VALID_BGP_ROUTER_ID": {
         "sonic-device_metadata:sonic-device_metadata": {
             "sonic-device_metadata:DEVICE_METADATA": {
diff --git a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
index 0d0607fd3cab..0f2f53e8d583 100644
--- a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
+++ b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
@@ -250,6 +250,11 @@ module sonic-device_metadata {
                                  created, regardless of the CONFIG_DB buffers configuration.";
                 }
 
+                leaf-list supporting_bulk_counter_groups {
+                    type string;
+                    description "This field contains a list of counter groups that support bulk operation.";
+                }
+
                 leaf bgp_router_id {
                     type inet:ipv4-address;
                     description "BGP Router identifier";

From 17acc84e386bdd5e9ae3202c2caa2f5240b09626 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 28 Nov 2024 16:01:42 +0800
Subject: [PATCH 284/364] [submodule] Update submodule sonic-stp to the latest
 HEAD automatically (#20959)

#### Why I did it
src/sonic-stp
```
* ea85d65 - (HEAD -> master, origin/master, origin/HEAD) [ci] Add arm64 build on PR validation. (#41) (20 hours ago) [Xin Wang]
* 6cdf964 - fix (25 hours ago) [Shilong Liu]
* 40cd2d5 - fix (2 days ago) [Shilong Liu]
* 0bfbed4 - makefile (2 days ago) [Shilong Liu]
* 837b0ce - makefile (2 days ago) [Shilong Liu]
* 0ef306e - fix (2 days ago) [Shilong Liu]
* 859374c - fix (2 days ago) [Shilong Liu]
* 7d65161 - fix (2 days ago) [Shilong Liu]
* 6580a62 - fix (2 days ago) [Shilong Liu]
* 017f2a9 - fix (2 days ago) [Shilong Liu]
* a26b6c2 - [ci] Try building on arm agent. (2 days ago) [Shilong Liu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-stp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-stp b/src/sonic-stp
index 69b241d76881..ea85d654d23f 160000
--- a/src/sonic-stp
+++ b/src/sonic-stp
@@ -1 +1 @@
-Subproject commit 69b241d768816507960142e494edfd5bdf5fbe04
+Subproject commit ea85d654d23f17a6b628f70adf7ae27ff772dae1

From f832b55042dd52a31642be0ad50e0c6d995ab808 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 28 Nov 2024 19:39:26 +0800
Subject: [PATCH 285/364] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#20958)

#### Why I did it
src/sonic-sairedis
```
* 7817c3b1 - (HEAD -> master, origin/master, origin/HEAD) Use temp view also in fast-reboot (#1401) (15 hours ago) [Aryeh Feigin]
* 7835026d - [syncd] Introduce VendorSaiOptions class (#1472) (15 hours ago) [Kamil Cudnik]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index c7ff2bcc8936..7817c3b1e421 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit c7ff2bcc893624b76bf5716157d6d99768f771da
+Subproject commit 7817c3b1e421b59e90729d45cb6da3f26a70af3c

From 24fb3e192ab67a51efe19ff79f8bfaab602ad4ec Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 28 Nov 2024 19:39:31 +0800
Subject: [PATCH 286/364] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#20957)

#### Why I did it
src/sonic-platform-daemons
```
* 57f0448 - (HEAD -> master, origin/master, origin/HEAD) [lag_id] Add lagid to free_list when LC absent for 30 minutes (#542) (9 hours ago) [Marty Y. Lok]
* 3624cb7 - [stormond] Added new dynamic field 'last_sync_time' to STATE_DB (#535) (21 hours ago) [Ashwin Srinivasan]
* 0431fa3 - Addition of DPU Chassis for thermalctld (#564) (24 hours ago) [Gagan Punathil Ellath]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index b276e415d85f..57f0448f564a 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit b276e415d85f3e8a7c64532d95821c9000c9418d
+Subproject commit 57f0448f564a35568ab9b803f638c29b41760b39

From dd2ec2cdc68886b94dbd38fb7ed2f1f984fa6b0d Mon Sep 17 00:00:00 2001
From: Feng-msft <fenpan@microsoft.com>
Date: Fri, 29 Nov 2024 12:48:29 +0800
Subject: [PATCH 287/364] Fix bmpcfgd daemon integration bug (#20922)

Why I did it
Fix bmpcfgd daemon integration bug

Work item tracking
Microsoft ADO (number only):27511095
How I did it
updated corresponding script code.

How to verify it
Verified on DUT, bmpcfgd observes config db and behave as expected, with syslog output.
---
 rules/docker-bmp.mk                           |  3 +-
 .../{scripts => bmpcfgd}/__init__.py          |  0
 .../{scripts/bmpcfgd => bmpcfgd/bmpcfgd.py}   | 20 +++++----
 src/sonic-bmpcfgd/setup.py                    | 42 +++++--------------
 src/sonic-bmpcfgd/tests/bmpcfgd_test.py       | 22 +++++-----
 5 files changed, 34 insertions(+), 53 deletions(-)
 rename src/sonic-bmpcfgd/{scripts => bmpcfgd}/__init__.py (100%)
 rename src/sonic-bmpcfgd/{scripts/bmpcfgd => bmpcfgd/bmpcfgd.py} (77%)

diff --git a/rules/docker-bmp.mk b/rules/docker-bmp.mk
index 419f1ed2eccd..b38718a161c6 100644
--- a/rules/docker-bmp.mk
+++ b/rules/docker-bmp.mk
@@ -9,8 +9,7 @@ $(DOCKER_BMP)_PATH = $(DOCKERS_PATH)/$(DOCKER_BMP_STEM)
 $(DOCKER_BMP)_DEPENDS += $(LIBSWSSCOMMON) \
                          $(SONIC_BMPD)
 
-$(DOCKER_BMP)_INSTALL_PYTHON_WHEELS = $(SONIC_BMPCFGD) \
-                                      $(SONIC_UTILITIES_PY3)
+$(DOCKER_BMP)_PYTHON_WHEELS = $(SONIC_BMPCFGD)
 $(DOCKER_BMP)_INSTALL_DEBS = $(LIBSWSSCOMMON) \
                              $(SONIC_BMPD) \
                              $(PYTHON3_SWSSCOMMON) \
diff --git a/src/sonic-bmpcfgd/scripts/__init__.py b/src/sonic-bmpcfgd/bmpcfgd/__init__.py
similarity index 100%
rename from src/sonic-bmpcfgd/scripts/__init__.py
rename to src/sonic-bmpcfgd/bmpcfgd/__init__.py
diff --git a/src/sonic-bmpcfgd/scripts/bmpcfgd b/src/sonic-bmpcfgd/bmpcfgd/bmpcfgd.py
similarity index 77%
rename from src/sonic-bmpcfgd/scripts/bmpcfgd
rename to src/sonic-bmpcfgd/bmpcfgd/bmpcfgd.py
index d6dd296b81bf..f8fa35fe253f 100644
--- a/src/sonic-bmpcfgd/scripts/bmpcfgd
+++ b/src/sonic-bmpcfgd/bmpcfgd/bmpcfgd.py
@@ -11,7 +11,7 @@
 import signal
 from shutil import copy2
 from datetime import datetime
-from sonic_py_common import device_info
+from sonic_py_common import logger
 from sonic_py_common.general import check_output_pipe
 from swsscommon.swsscommon import ConfigDBConnector, DBConnector, Table
 from swsscommon import swsscommon
@@ -22,6 +22,7 @@
 REDIS_HOSTIP = "127.0.0.1"
 BMP_TABLE = "BMP"
 SYSLOG_IDENTIFIER = "bmpcfgd"
+logger = logger.Logger(SYSLOG_IDENTIFIER)
 
 def is_true(val):
     return str(val).lower() == 'true'
@@ -40,7 +41,7 @@ def load(self, data={}):
         self.bgp_neighbor_table = is_true(common_config.get('bgp_neighbor_table', 'false'))
         self.bgp_rib_in_table = is_true(common_config.get('bgp_rib_in_table', 'false'))
         self.bgp_rib_out_table = is_true(common_config.get('bgp_rib_out_table', 'false'))
-        self.log_info(f'BMPCfg: update : {self.bgp_neighbor_table}, {self.bgp_rib_in_table}, {self.bgp_rib_out_table}')
+        logger.log_notice(f'bmpcfgd: config update : {self.bgp_neighbor_table}, {self.bgp_rib_in_table}, {self.bgp_rib_out_table}')
 
         # reset bmp table state once config is changed.
         self.stop_bmp()
@@ -53,20 +54,20 @@ def cfg_handler(self, data):
 
 
     def stop_bmp(self):
-        self.log_info('BMPCfg: stop bmp daemon')
-        subprocess.call(["supervisorctl", "stop", "openbmpd"])
+        logger.log_notice('bmpcfgd: stop bmp daemon')
+        subprocess.call(["supervisorctl", "stop", "sonic-bmp:openbmpd"])
 
 
     def reset_bmp_table(self):
-        self.log_info('BMPCfg: Reset bmp table from state_db')
+        logger.log_notice('bmpcfgd: Reset bmp table from state_db')
         self.state_db_conn.delete_all_by_pattern(BMP_STATE_DB, 'BGP_NEIGHBOR*')
         self.state_db_conn.delete_all_by_pattern(BMP_STATE_DB, 'BGP_RIB_IN_TABLE*')
         self.state_db_conn.delete_all_by_pattern(BMP_STATE_DB, 'BGP_RIB_OUT_TABLE*')
 
 
     def start_bmp(self):
-        self.log_info('BMPCfg: start bmp daemon')
-        subprocess.call(["supervisorctl", "start", "openbmpd"])
+        logger.log_notice('bmpcfgd: start bmp daemon')
+        subprocess.call(["supervisorctl", "start", "sonic-bmp:openbmpd"])
 
 
 class BMPCfgDaemon:
@@ -77,14 +78,15 @@ def __init__(self):
         self.config_db.connect(wait_for_init=True, retry_on=True)
         self.bmpcfg = BMPCfg(self.state_db_conn)
 
-    def bmp_handler(self, key, op, data):
+    def bmp_handler(self, key, data):
         data = self.config_db.get_table(BMP_TABLE)
         self.bmpcfg.cfg_handler(data)
 
     def register_callbacks(self):
         self.config_db.subscribe(BMP_TABLE,
                                  lambda table, key, data:
-                                     self.bmp_handler(key, op, data))
+                                     self.bmp_handler(key, data))
+        self.config_db.listen(init_data_handler=self.bmpcfg.load)
 
 def main():
     daemon = BMPCfgDaemon()
diff --git a/src/sonic-bmpcfgd/setup.py b/src/sonic-bmpcfgd/setup.py
index 7c76da07e2dd..193b2094722e 100644
--- a/src/sonic-bmpcfgd/setup.py
+++ b/src/sonic-bmpcfgd/setup.py
@@ -1,10 +1,11 @@
-from __future__ import print_function
-import sys
-from setuptools import setup
-import pkg_resources
-from packaging import version
+import setuptools
 
-setup(
+
+dependencies = [
+    'sonic_py_common',
+]
+
+setuptools.setup(
     name = 'sonic-bmpcfgd-services',
     version = '1.0',
     description = 'Python services which run in the bmp container',
@@ -14,8 +15,9 @@
     url = 'https://github.com/Azure/sonic-buildimage',
     maintainer = 'Feng Pan',
     maintainer_email = 'fenpan@microsoft.com',
-    scripts = [
-        'scripts/bmpcfgd'
+    packages=[
+        'bmpcfgd',
+        'tests'
     ],
     install_requires = [
         'jinja2>=2.10',
@@ -25,7 +27,7 @@
     ],
     entry_points={
         'console_scripts': [
-            'bmpcfgd = scripts.bmpcfgd:main',
+            'bmpcfgd = bmpcfgd.bmpcfgd:main',
         ]
     },
     setup_requires = [
@@ -39,26 +41,4 @@
         'sonic-py-common',
         'pytest-cov'
     ],
-    extras_require = {
-        "testing": [
-            'parameterized',
-            'pytest',
-            'pyfakefs',
-            'sonic-py-common'
-        ]
-    },
-    classifiers = [
-        'Development Status :: 3 - Alpha',
-        'Environment :: Console',
-        'Intended Audience :: Developers',
-        'Intended Audience :: Information Technology',
-        'Intended Audience :: System Administrators',
-        'License :: OSI Approved :: Apache Software License',
-        'Natural Language :: English',
-        'Operating System :: POSIX :: Linux',
-        'Programming Language :: Python :: 3.7',
-        'Topic :: System',
-    ],
-    keywords = 'SONiC bmp config daemon',
-    test_suite = 'setup.get_test_suite'
 )
diff --git a/src/sonic-bmpcfgd/tests/bmpcfgd_test.py b/src/sonic-bmpcfgd/tests/bmpcfgd_test.py
index ce6fbcf2a02f..f43ba77cf780 100644
--- a/src/sonic-bmpcfgd/tests/bmpcfgd_test.py
+++ b/src/sonic-bmpcfgd/tests/bmpcfgd_test.py
@@ -19,11 +19,11 @@
 
 test_path = os.path.dirname(os.path.abspath(__file__))
 modules_path = os.path.dirname(test_path)
-scripts_path = os.path.join(modules_path, "scripts")
+scripts_path = os.path.join(modules_path, "bmpcfgd")
 sys.path.insert(0, modules_path)
 
 # Load the file under test
-bmpcfgd_path = os.path.join(scripts_path, 'bmpcfgd')
+bmpcfgd_path = os.path.join(scripts_path, 'bmpcfgd.py')
 bmpcfgd = load_module_from_source('bmpcfgd', bmpcfgd_path)
 
 
@@ -51,10 +51,10 @@ def test_bmpcfgd_neighbor_enable(self, mock_call, mock_log_info):
         MockConfigDb.set_config_db(self.test_data)
         bmp_config_daemon = bmpcfgd.BMPCfgDaemon()
         bmp_config_daemon.register_callbacks()
-        bmp_config_daemon.bmp_handler("BMP", '', self.test_data)
+        bmp_config_daemon.bmp_handler("BMP", self.test_data)
         expected_calls = [
-            mock.call(["supervisorctl", "stop", "openbmpd"]),
-            mock.call(["supervisorctl", "start", "openbmpd"])
+            mock.call(["supervisorctl", "stop", "sonic-bmp:openbmpd"]),
+            mock.call(["supervisorctl", "start", "sonic-bmp:openbmpd"])
         ]
         mock_log_info.assert_has_calls(expected_calls)
 
@@ -64,10 +64,10 @@ def test_bmpcfgd_bgp_rib_in_enable(self, mock_call, mock_log_info):
         self.test_data['BMP']['table']['bgp_rib_in_table'] = 'true'
         MockConfigDb.set_config_db(self.test_data)
         bmp_config_daemon = bmpcfgd.BMPCfgDaemon()
-        bmp_config_daemon.bmp_handler("BMP", '', self.test_data)
+        bmp_config_daemon.bmp_handler("BMP", self.test_data)
         expected_calls = [
-            mock.call(["supervisorctl", "stop", "openbmpd"]),
-            mock.call(["supervisorctl", "start", "openbmpd"])
+            mock.call(["supervisorctl", "stop", "sonic-bmp:openbmpd"]),
+            mock.call(["supervisorctl", "start", "sonic-bmp:openbmpd"])
         ]
         mock_log_info.assert_has_calls(expected_calls)
 
@@ -77,9 +77,9 @@ def test_bmpcfgd_bgp_rib_out_enable(self, mock_call, mock_log_info):
         self.test_data['BMP']['table']['bgp_rib_out_table'] = 'true'
         MockConfigDb.set_config_db(self.test_data)
         bmp_config_daemon = bmpcfgd.BMPCfgDaemon()
-        bmp_config_daemon.bmp_handler("BMP", '', self.test_data)
+        bmp_config_daemon.bmp_handler("BMP", self.test_data)
         expected_calls = [
-            mock.call(["supervisorctl", "stop", "openbmpd"]),
-            mock.call(["supervisorctl", "start", "openbmpd"])
+            mock.call(["supervisorctl", "stop", "sonic-bmp:openbmpd"]),
+            mock.call(["supervisorctl", "start", "sonic-bmp:openbmpd"])
         ]
         mock_log_info.assert_has_calls(expected_calls)
\ No newline at end of file

From 96d7461f4c972e849b4d33c93c17bde0de76d65e Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 29 Nov 2024 16:01:47 +0800
Subject: [PATCH 288/364] [submodule] Update submodule sonic-bmp to the latest
 HEAD automatically (#20955)

#### Why I did it
src/sonic-bmp
```
* 4dcef92 - (HEAD -> master, origin/master, origin/HEAD) Merge pull request #16 from FengPan-Frank/fix1 (25 hours ago) [Feng-msft]
* 4735a94 - Bug fixing during integration test (35 hours ago) [Feng Pan]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-bmp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-bmp b/src/sonic-bmp
index a2d576b22acc..4dcef923824a 160000
--- a/src/sonic-bmp
+++ b/src/sonic-bmp
@@ -1 +1 @@
-Subproject commit a2d576b22accd83505b0081068c34be0a2c49264
+Subproject commit 4dcef923824ad199fe820d54a4aebd8ca1dbfd10

From 2e3e028f2f4eef20441e64e5b39ba58a48588eee Mon Sep 17 00:00:00 2001
From: Linsongnan <815683079@qq.com>
Date: Sat, 30 Nov 2024 02:36:57 +0800
Subject: [PATCH 289/364] [sonic-frr-mgmt-framework]: refactor the way of load
 srv6 locator opcode config (#20954)

[sonic-frr-mgmt-framework]: refactor the way of load srv6 locator opcode config

Signed-off-by: linsongnan <linsongnan.lsn@alibaba-inc.com>
---
 src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py b/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py
index bca005817371..ef74754ceda6 100755
--- a/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py
+++ b/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py
@@ -2078,7 +2078,7 @@ class BGPConfigDaemon:
                              ('icmo_ttl', 'ttl {}', handle_ip_sla_common),
                              ('icmp_tos', 'tos {}', handle_ip_sla_common),
                            ]
-    srv6_locator_key_map = [(['opcode_prefix', 'opcode_act', 'opcode_vrf'], '{no:no-prefix}opcode {} {} vrf {}', hdl_srv6_locator)]
+    srv6_locator_key_map = [(['opcode_prefix', 'opcode_act', 'opcode_data'], '{no:no-prefix}opcode {} {} {}', hdl_srv6_locator)]
 
 
     tbl_to_key_map = {'BGP_GLOBALS':                    global_key_map,

From f57851aa245433a9f074d729d296b8969c603098 Mon Sep 17 00:00:00 2001
From: DavidZagury <32644413+DavidZagury@users.noreply.github.com>
Date: Sun, 1 Dec 2024 07:06:27 +0200
Subject: [PATCH 290/364] [Mellanox] Support SKU Mellanox-SN5600-C224O8
 (#20705)

- Why I did it
Support Mellanox-SN5600-C224O8

- How I did it
Add relevant files to support the new SKU

- How to verify it
Regression / QoS tests

---------

Co-authored-by: Shay Schlafman <sschlafman@nvidia.com>
Co-authored-by: noaOrMlnx <noaor@nvidia.com>
---
 .../Mellanox-SN5600-C224O8/buffers.json.j2    |   1 +
 .../buffers_defaults_objects.j2               | 310 ++++++++++
 .../buffers_defaults_t0.j2                    |  48 ++
 .../buffers_defaults_t1.j2                    |  55 ++
 .../buffers_dynamic.json.j2                   |   1 +
 .../create_only_config_db_buffers.json        |   7 +
 .../media_settings.json                       |   1 +
 .../optics_si_settings.json                   |   1 +
 .../pg_profile_lookup.ini                     |  51 ++
 .../pmon_daemon_control.json                  |   5 +
 .../Mellanox-SN5600-C224O8/port_config.ini    | 252 ++++++++
 .../Mellanox-SN5600-C224O8/qos.json.j2        |   1 +
 .../Mellanox-SN5600-C224O8/sai.profile        |   4 +
 .../sai_5600_256x100g.xml                     | 561 ++++++++++++++++++
 .../supporting_bulk_counter_groups            |   1 +
 15 files changed, 1299 insertions(+)
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers.json.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_objects.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t0.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t1.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_dynamic.json.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/create_only_config_db_buffers.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/media_settings.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/optics_si_settings.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pg_profile_lookup.ini
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pmon_daemon_control.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/port_config.ini
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/qos.json.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai.profile
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai_5600_256x100g.xml
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/supporting_bulk_counter_groups

diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers.json.j2
new file mode 120000
index 000000000000..add8bf8bb7c2
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_objects.j2
new file mode 100644
index 000000000000..05f6cd29a50c
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_objects.j2
@@ -0,0 +1,310 @@
+{#
+    SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+    SPDX-License-Identifier: Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+    "BUFFER_POOL": {
+        {% if dynamic_mode is not defined and port_names_inactive|length > 0 -%}
+        "ingress_zero_pool" : {
+            "mode": "static",
+            "type": "ingress",
+            "size": "0"
+        },
+        {% endif -%}
+        "ingress_lossless_pool": {
+            {% if dynamic_mode is not defined -%}
+            "size": "{{ ingress_lossless_pool_size }}",
+            "xoff": "{{ ingress_lossless_pool_xoff }}",
+            {% endif -%}
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_lossless_pool": {
+            "size": "{{ egress_lossless_pool_size }}",
+            "type": "egress",
+            "mode": "dynamic"
+        },
+        "egress_lossy_pool": {
+            {% if dynamic_mode is not defined -%}
+            "size": "{{ egress_lossy_pool_size }}",
+            {% endif -%}
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        {% if dynamic_mode is not defined and port_names_inactive|length > 0 -%}
+        "ingress_lossy_pg_zero_profile" : {
+          "pool":"ingress_zero_pool",
+          "size":"0",
+          "static_th":"0"
+        },
+        "ingress_lossless_zero_profile" : {
+          "pool":"ingress_lossless_pool",
+          "size":"0",
+          "dynamic_th":"-8"
+        },
+        "egress_lossless_zero_profile" : {
+          "pool":"egress_lossless_pool",
+          "size":"0",
+          "dynamic_th":"-8"
+        },
+        "egress_lossy_zero_profile" : {
+          "pool":"egress_lossy_pool",
+          "size":"0",
+          "dynamic_th":"-8"
+        },
+        {% endif -%}
+        "ingress_lossless_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"7"
+        },
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"7"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_lossy_pool",
+            "size":"9216",
+            "dynamic_th":"7"
+        },
+        "q_lossy_profile": {
+            "pool":"egress_lossy_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
+
+{%- macro generate_profile_lists(port_names_active, port_names_inactive) %}
+    "BUFFER_PORT_INGRESS_PROFILE_LIST": {
+{% for port in port_names_active.split(',') %}
+        "{{ port }}": {
+            "profile_list" : "ingress_lossless_profile"
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% if port_names_inactive|length > 0 %}
+,
+{% for port in port_names_inactive.split(',') %}
+        "{{ port }}": {
+{% if dynamic_mode is defined %}
+            "profile_list" : "ingress_lossless_profile"
+{% else %}
+            "profile_list" : "ingress_lossless_zero_profile"
+{% endif %}
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% endif %}
+    },
+    "BUFFER_PORT_EGRESS_PROFILE_LIST": {
+{% for port in port_names_active.split(',') %}
+        "{{ port }}": {
+            "profile_list" : "egress_lossless_profile,egress_lossy_profile"
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% if port_names_inactive|length > 0 %}
+,
+{% for port in port_names_inactive.split(',') %}
+        "{{ port }}": {
+{% if dynamic_mode is defined %}
+            "profile_list" : "egress_lossless_profile,egress_lossy_profile"
+{% else %}
+            "profile_list" : "egress_lossless_zero_profile,egress_lossy_zero_profile"
+{% endif %}
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% endif %}
+    }
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) %}
+    "BUFFER_QUEUE": {
+{% set q_loop = namespace(last_valid=false) %}
+{% for port in port_names_active.split(',') %}
+{% if port not in port_names_extra_queues.split(',') %}
+        "{{ port }}|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+{% endif %}
+{% endfor %}
+{% for port in port_names_active.split(',') %}
+{% if port not in port_names_extra_queues.split(',') %}
+        "{{ port }}|0-2": {
+            "profile" : "q_lossy_profile"
+        },
+{% endif %}
+{% endfor %}
+{% for port in port_names_active.split(',') %}
+{% if port not in port_names_extra_queues.split(',') %}
+{% if port_names_extra_queues|length > 0 %}
+        "{{ port }}|5-7": {
+{% else %}
+        "{{ port }}|5-6": {
+{% endif %}
+            "profile" : "q_lossy_profile"
+        }{% if not loop.last %},{% endif %}
+
+{% set q_loop.last_valid = true %}
+{% else %}
+{% set q_loop.last_valid = false %}
+{% endif %}
+{% endfor %}
+{% if port_names_extra_queues|length > 0 %}
+{% if q_loop.last_valid %},{% endif %}
+{% for port in port_names_extra_queues.split(',') %}
+        "{{ port }}|0-1": {
+            "profile" : "q_lossy_profile"
+        },
+        "{{ port }}|2-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "{{ port }}|5": {
+            "profile" : "q_lossy_profile"
+        },
+        "{{ port }}|6": {
+            "profile" : "egress_lossless_profile"
+        },
+        "{{ port }}|7": {
+            "profile" : "q_lossy_profile"
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% endif %}
+{% if port_names_inactive|length > 0 %}
+,
+{% if dynamic_mode is defined %}
+{% for port in port_names_inactive.split(',') %}
+        "{{ port }}|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+{% endfor %}
+{% for port in port_names_inactive.split(',') %}
+        "{{ port }}|0-2": {
+            "profile" : "q_lossy_profile"
+        },
+{% endfor %}
+{% for port in port_names_inactive.split(',') %}
+{% if port_names_extra_queues|length > 0 %}
+        "{{ port }}|5-7": {
+{% else %}
+        "{{ port }}|5-6": {
+{% endif %}
+            "profile" : "q_lossy_profile"
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% else %}
+{% for port in port_names_inactive.split(',') %}
+        "{{ port }}|3-4": {
+            "profile" : "egress_lossless_zero_profile"
+        },
+{% endfor %}
+{% for port in port_names_inactive.split(',') %}
+        "{{ port }}|0-2": {
+            "profile" : "egress_lossy_zero_profile"
+        },
+{% endfor %}
+{% for port in port_names_inactive.split(',') %}
+{% if port_names_extra_queues|length > 0 %}
+        "{{ port }}|5-7": {
+{% else %}
+        "{{ port }}|5-6": {
+{% endif %}
+            "profile" : "egress_lossy_zero_profile"
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% endif %}
+{% endif %}
+    }
+{%- endmacro %}
+
+{%- macro generate_queue_buffers(port_names_active, port_names_inactive) %}
+{{ generate_queue_buffers_with_extra_lossless_queues(port_names_active, "", port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+    "BUFFER_PG": {
+{% set pg_loop = namespace(last_valid=false) %}
+{% for port in port_names_active.split(',') %}
+{% if port not in port_names_extra_pgs.split(',') %}
+{% if dynamic_mode is defined %}
+        "{{ port }}|3-4": {
+            "profile" : "NULL"
+        },
+{% endif %}
+        "{{ port }}|0": {
+            "profile" : "ingress_lossy_profile"
+        }{% if not loop.last %},{% endif %}
+
+{% set pg_loop.last_valid = true %}
+{% else %}
+{% set pg_loop.last_valid = false %}
+{% endif %}
+{% endfor %}
+{% if port_names_extra_pgs|length > 0 %}
+{% if pg_loop.last_valid %},{% endif %}
+{% for port in port_names_extra_pgs.split(',') %}
+{% if dynamic_mode is defined %}
+        "{{ port }}|2-4": {
+            "profile" : "NULL"
+        },
+        "{{ port }}|6": {
+            "profile" : "NULL"
+        },
+{% endif %}
+        "{{ port }}|0": {
+            "profile" : "ingress_lossy_profile"
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% endif %}
+{% if port_names_inactive|length > 0 %}
+{%- for port in port_names_inactive.split(',') %}
+       {%- if loop.first -%},{%- endif -%}
+{% if dynamic_mode is defined %}
+        "{{ port }}|3-4": {
+            "profile" : "NULL"
+        },
+{% endif %}
+       "{{ port }}|0": {
+{% if dynamic_mode is defined %}
+            "profile" : "ingress_lossy_profile"
+{% else %}
+            "profile" : "ingress_lossy_pg_zero_profile"
+{% endif %}
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% endif %}
+    }
+{%- endmacro %}
+
+{%- macro generate_pg_profiles(port_names_active, port_names_inactive) %}
+{{ generate_pg_profiles_with_extra_lossless_pgs(port_names_active, "", port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t0.j2
new file mode 100644
index 000000000000..c20859c33f34
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t0.j2
@@ -0,0 +1,48 @@
+{#
+    SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '40m' %}
+{% set ingress_lossless_pool_size =  '113722268' %}
+{% set ingress_lossless_pool_xoff =  '19062784' %}
+{% set egress_lossless_pool_size =  '158229504' %}
+{% set egress_lossy_pool_size =  '113722268' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t1.j2
new file mode 100644
index 000000000000..94ba1b680915
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t1.j2
@@ -0,0 +1,55 @@
+{#
+    SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '250m' %}
+{% set ingress_lossless_pool_size =  '113722368' %}
+{% set ingress_lossless_pool_xoff =  '19062784' %}
+{% set egress_lossless_pool_size =  '158229504' %}
+{% set egress_lossy_pool_size =  '113722368' %}
+
+{%-set ports2cable = {
+            'torrouter_server'       : '40m',
+            'leafrouter_torrouter'   : '250m',
+            'spinerouter_leafrouter' : '1000m'
+       }
+-%}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_dynamic.json.j2
new file mode 120000
index 000000000000..8c4117c66214
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_dynamic.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_dynamic.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/create_only_config_db_buffers.json
new file mode 100644
index 000000000000..6feb156714fe
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/create_only_config_db_buffers.json
@@ -0,0 +1,7 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "create_only_config_db_buffers": "true"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/media_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/media_settings.json
new file mode 120000
index 000000000000..2f4f358b3ba1
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/media_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN5600-V256/media_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/optics_si_settings.json
new file mode 120000
index 000000000000..f0e582a4d772
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/optics_si_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN5600-V256/optics_si_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pg_profile_lookup.ini
new file mode 100644
index 000000000000..a87d3445ed35
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pg_profile_lookup.ini
@@ -0,0 +1,51 @@
+##
+## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+#  PG lossless profiles.
+# speed cable  size   xon    xoff   threshold
+  10000    5m 19456   19456  20480         0
+  25000    5m 19456   19456  21504         0
+  40000    5m 19456   19456  24576         0
+  50000    5m 19456   19456  26624         0
+ 100000    5m 19456   19456  44032         0
+ 200000    5m 19456   19456  50176         0
+ 400000    5m 19456  19456  86016         0
+ 800000    5m 38912  38912  95232         0
+  10000   40m 19456   19456  20480         0
+  25000   40m 19456   19456  22528         0
+  40000   40m 19456   19456  25600         0
+  50000   40m 19456   19456  28672         0
+ 100000   40m 19456   19456  49152         0
+ 200000   40m 19456   19456  60416         0
+ 400000   40m 19456  19456  104448        0
+ 800000   40m 38912  38912  132096        0
+  10000  250m 19456   19456  14336         0
+  25000  250m 19456   19456  20480         0
+  40000  250m 19456   19456  28672         0
+  50000  250m 19456   19456  33792         0
+ 100000  250m 19456  19456  68608         0
+ 200000  250m 19456  19456  107520        0
+ 400000  250m 19456  19456  208896        0
+ 800000  250m 38912  38912  349184        0
+  10000  1000m 19456   19456  24576         0
+  25000  1000m 19456   19456  46080         0
+  40000  1000m 19456   19456  68608         0
+  50000  1000m 19456   19456  83968         0
+ 100000  1000m 19456  19456  168960         0
+ 200000  1000m 19456  19456  308224        0
+ 400000  1000m 19456  19456  610304        0
+ 800000  1000m 38912  38912  1153024        0
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pmon_daemon_control.json
new file mode 100644
index 000000000000..281b96b71cc6
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pmon_daemon_control.json
@@ -0,0 +1,5 @@
+{
+    "skip_ledd": true,
+    "skip_fancontrol": true,
+    "skip_xcvrd_cmis_mgr": false
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/port_config.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/port_config.ini
new file mode 100644
index 000000000000..2cc6ff80714f
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/port_config.ini
@@ -0,0 +1,252 @@
+##
+## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+# name         lanes                                  alias     index    speed    fec   autoneg subport
+Ethernet0      0                                      etp1a     1        100000   rs    off     1
+Ethernet1      1                                      etp1b     1        100000   rs    off     2
+Ethernet2      2                                      etp1c     1        100000   rs    off     3
+Ethernet3      3                                      etp1d     1        100000   rs    off     4
+Ethernet4      4                                      etp1e     1        100000   rs    off     5
+Ethernet5      5                                      etp1f     1        100000   rs    off     6
+Ethernet6      6                                      etp1g     1        100000   rs    off     7
+Ethernet7      7                                      etp1h     1        100000   rs    off     8
+Ethernet16     16                                     etp3a     3        100000   rs    off     1
+Ethernet17     17                                     etp3b     3        100000   rs    off     2
+Ethernet18     18                                     etp3c     3        100000   rs    off     3
+Ethernet19     19                                     etp3d     3        100000   rs    off     4
+Ethernet20     20                                     etp3e     3        100000   rs    off     5
+Ethernet21     21                                     etp3f     3        100000   rs    off     6
+Ethernet22     22                                     etp3g     3        100000   rs    off     7
+Ethernet23     23                                     etp3h     3        100000   rs    off     8
+Ethernet32     32                                     etp5a     5        100000   rs    off     1
+Ethernet33     33                                     etp5b     5        100000   rs    off     2
+Ethernet34     34                                     etp5c     5        100000   rs    off     3
+Ethernet35     35                                     etp5d     5        100000   rs    off     4
+Ethernet36     36                                     etp5e     5        100000   rs    off     5
+Ethernet37     37                                     etp5f     5        100000   rs    off     6
+Ethernet38     38                                     etp5g     5        100000   rs    off     7
+Ethernet39     39                                     etp5h     5        100000   rs    off     8
+Ethernet48     48                                     etp7a     7        100000   rs    off     1
+Ethernet49     49                                     etp7b     7        100000   rs    off     2
+Ethernet50     50                                     etp7c     7        100000   rs    off     3
+Ethernet51     51                                     etp7d     7        100000   rs    off     4
+Ethernet52     52                                     etp7e     7        100000   rs    off     5
+Ethernet53     53                                     etp7f     7        100000   rs    off     6
+Ethernet54     54                                     etp7g     7        100000   rs    off     7
+Ethernet55     55                                     etp7h     7        100000   rs    off     8
+Ethernet64     64                                     etp9a     9        100000   rs    off     1
+Ethernet65     65                                     etp9b     9        100000   rs    off     2
+Ethernet66     66                                     etp9c     9        100000   rs    off     3
+Ethernet67     67                                     etp9d     9        100000   rs    off     4
+Ethernet68     68                                     etp9e     9        100000   rs    off     5
+Ethernet69     69                                     etp9f     9        100000   rs    off     6
+Ethernet70     70                                     etp9g     9        100000   rs    off     7
+Ethernet71     71                                     etp9h     9        100000   rs    off     8
+Ethernet80     80                                     etp11a    11       100000   rs    off     1
+Ethernet81     81                                     etp11b    11       100000   rs    off     2
+Ethernet82     82                                     etp11c    11       100000   rs    off     3
+Ethernet83     83                                     etp11d    11       100000   rs    off     4
+Ethernet84     84                                     etp11e    11       100000   rs    off     5
+Ethernet85     85                                     etp11f    11       100000   rs    off     6
+Ethernet86     86                                     etp11g    11       100000   rs    off     7
+Ethernet87     87                                     etp11h    11       100000   rs    off     8
+Ethernet96     96,97,98,99                            etp13a    13       400000   rs    off     1
+Ethernet100    100,101,102,103                        etp13b    13       400000   rs    off     2
+Ethernet112    112                                    etp15a    15       100000   rs    off     1
+Ethernet113    113                                    etp15b    15       100000   rs    off     2
+Ethernet114    114                                    etp15c    15       100000   rs    off     3
+Ethernet115    115                                    etp15d    15       100000   rs    off     4
+Ethernet116    116                                    etp15e    15       100000   rs    off     5
+Ethernet117    117                                    etp15f    15       100000   rs    off     6
+Ethernet118    118                                    etp15g    15       100000   rs    off     7
+Ethernet119    119                                    etp15h    15       100000   rs    off     8
+Ethernet128    128,129,130,131                        etp17a    17       400000   rs    off     1
+Ethernet132    132,133,134,135                        etp17b    17       400000   rs    off     2
+Ethernet144    144                                    etp19a    19       100000   rs    off     1
+Ethernet145    145                                    etp19b    19       100000   rs    off     2
+Ethernet146    146                                    etp19c    19       100000   rs    off     3
+Ethernet147    147                                    etp19d    19       100000   rs    off     4
+Ethernet148    148                                    etp19e    19       100000   rs    off     5
+Ethernet149    149                                    etp19f    19       100000   rs    off     6
+Ethernet150    150                                    etp19g    19       100000   rs    off     7
+Ethernet151    151                                    etp19h    19       100000   rs    off     8
+Ethernet160    160                                    etp21a    21       100000   rs    off     1
+Ethernet161    161                                    etp21b    21       100000   rs    off     2
+Ethernet162    162                                    etp21c    21       100000   rs    off     3
+Ethernet163    163                                    etp21d    21       100000   rs    off     4
+Ethernet164    164                                    etp21e    21       100000   rs    off     5
+Ethernet165    165                                    etp21f    21       100000   rs    off     6
+Ethernet166    166                                    etp21g    21       100000   rs    off     7
+Ethernet167    167                                    etp21h    21       100000   rs    off     8
+Ethernet176    176                                    etp23a    23       100000   rs    off     1
+Ethernet177    177                                    etp23b    23       100000   rs    off     2
+Ethernet178    178                                    etp23c    23       100000   rs    off     3
+Ethernet179    179                                    etp23d    23       100000   rs    off     4
+Ethernet180    180                                    etp23e    23       100000   rs    off     5
+Ethernet181    181                                    etp23f    23       100000   rs    off     6
+Ethernet182    182                                    etp23g    23       100000   rs    off     7
+Ethernet183    183                                    etp23h    23       100000   rs    off     8
+Ethernet192    192                                    etp25a    25       100000   rs    off     1
+Ethernet193    193                                    etp25b    25       100000   rs    off     2
+Ethernet194    194                                    etp25c    25       100000   rs    off     3
+Ethernet195    195                                    etp25d    25       100000   rs    off     4
+Ethernet196    196                                    etp25e    25       100000   rs    off     5
+Ethernet197    197                                    etp25f    25       100000   rs    off     6
+Ethernet198    198                                    etp25g    25       100000   rs    off     7
+Ethernet199    199                                    etp25h    25       100000   rs    off     8
+Ethernet208    208                                    etp27a    27       100000   rs    off     1
+Ethernet209    209                                    etp27b    27       100000   rs    off     2
+Ethernet210    210                                    etp27c    27       100000   rs    off     3
+Ethernet211    211                                    etp27d    27       100000   rs    off     4
+Ethernet212    212                                    etp27e    27       100000   rs    off     5
+Ethernet213    213                                    etp27f    27       100000   rs    off     6
+Ethernet214    214                                    etp27g    27       100000   rs    off     7
+Ethernet215    215                                    etp27h    27       100000   rs    off     8
+Ethernet224    224                                    etp29a    29       100000   rs    off     1
+Ethernet225    225                                    etp29b    29       100000   rs    off     2
+Ethernet226    226                                    etp29c    29       100000   rs    off     3
+Ethernet227    227                                    etp29d    29       100000   rs    off     4
+Ethernet228    228                                    etp29e    29       100000   rs    off     5
+Ethernet229    229                                    etp29f    29       100000   rs    off     6
+Ethernet230    230                                    etp29g    29       100000   rs    off     7
+Ethernet231    231                                    etp29h    29       100000   rs    off     8
+Ethernet240    240                                    etp31a    31       100000   rs    off     1
+Ethernet241    241                                    etp31b    31       100000   rs    off     2
+Ethernet242    242                                    etp31c    31       100000   rs    off     3
+Ethernet243    243                                    etp31d    31       100000   rs    off     4
+Ethernet244    244                                    etp31e    31       100000   rs    off     5
+Ethernet245    245                                    etp31f    31       100000   rs    off     6
+Ethernet246    246                                    etp31g    31       100000   rs    off     7
+Ethernet247    247                                    etp31h    31       100000   rs    off     8
+Ethernet256    256                                    etp33a    33       100000   rs    off     1
+Ethernet257    257                                    etp33b    33       100000   rs    off     2
+Ethernet258    258                                    etp33c    33       100000   rs    off     3
+Ethernet259    259                                    etp33d    33       100000   rs    off     4
+Ethernet260    260                                    etp33e    33       100000   rs    off     5
+Ethernet261    261                                    etp33f    33       100000   rs    off     6
+Ethernet262    262                                    etp33g    33       100000   rs    off     7
+Ethernet263    263                                    etp33h    33       100000   rs    off     8
+Ethernet272    272                                    etp35a    35       100000   rs    off     1
+Ethernet273    273                                    etp35b    35       100000   rs    off     2
+Ethernet274    274                                    etp35c    35       100000   rs    off     3
+Ethernet275    275                                    etp35d    35       100000   rs    off     4
+Ethernet276    276                                    etp35e    35       100000   rs    off     5
+Ethernet277    277                                    etp35f    35       100000   rs    off     6
+Ethernet278    278                                    etp35g    35       100000   rs    off     7
+Ethernet279    279                                    etp35h    35       100000   rs    off     8
+Ethernet288    288                                    etp37a    37       100000   rs    off     1
+Ethernet289    289                                    etp37b    37       100000   rs    off     2
+Ethernet290    290                                    etp37c    37       100000   rs    off     3
+Ethernet291    291                                    etp37d    37       100000   rs    off     4
+Ethernet292    292                                    etp37e    37       100000   rs    off     5
+Ethernet293    293                                    etp37f    37       100000   rs    off     6
+Ethernet294    294                                    etp37g    37       100000   rs    off     7
+Ethernet295    295                                    etp37h    37       100000   rs    off     8
+Ethernet304    304                                    etp39a    39       100000   rs    off     1
+Ethernet305    305                                    etp39b    39       100000   rs    off     2
+Ethernet306    306                                    etp39c    39       100000   rs    off     3
+Ethernet307    307                                    etp39d    39       100000   rs    off     4
+Ethernet308    308                                    etp39e    39       100000   rs    off     5
+Ethernet309    309                                    etp39f    39       100000   rs    off     6
+Ethernet310    310                                    etp39g    39       100000   rs    off     7
+Ethernet311    311                                    etp39h    39       100000   rs    off     8
+Ethernet320    320                                    etp41a    41       100000   rs    off     1
+Ethernet321    321                                    etp41b    41       100000   rs    off     2
+Ethernet322    322                                    etp41c    41       100000   rs    off     3
+Ethernet323    323                                    etp41d    41       100000   rs    off     4
+Ethernet324    324                                    etp41e    41       100000   rs    off     5
+Ethernet325    325                                    etp41f    41       100000   rs    off     6
+Ethernet326    326                                    etp41g    41       100000   rs    off     7
+Ethernet327    327                                    etp41h    41       100000   rs    off     8
+Ethernet336    336                                    etp43a    43       100000   rs    off     1
+Ethernet337    337                                    etp43b    43       100000   rs    off     2
+Ethernet338    338                                    etp43c    43       100000   rs    off     3
+Ethernet339    339                                    etp43d    43       100000   rs    off     4
+Ethernet340    340                                    etp43e    43       100000   rs    off     5
+Ethernet341    341                                    etp43f    43       100000   rs    off     6
+Ethernet342    342                                    etp43g    43       100000   rs    off     7
+Ethernet343    343                                    etp43h    43       100000   rs    off     8
+Ethernet352    352,353,354,355                        etp45a    45       400000   rs    off     1
+Ethernet356    356,357,358,359                        etp45b    45       400000   rs    off     2
+Ethernet368    368                                    etp47a    47       100000   rs    off     1
+Ethernet369    369                                    etp47b    47       100000   rs    off     2
+Ethernet370    370                                    etp47c    47       100000   rs    off     3
+Ethernet371    371                                    etp47d    47       100000   rs    off     4
+Ethernet372    372                                    etp47e    47       100000   rs    off     5
+Ethernet373    373                                    etp47f    47       100000   rs    off     6
+Ethernet374    374                                    etp47g    47       100000   rs    off     7
+Ethernet375    375                                    etp47h    47       100000   rs    off     8
+Ethernet384    384,385,386,387                        etp49a    49       400000   rs    off     1
+Ethernet388    388,389,390,391                        etp49b    49       400000   rs    off     2
+Ethernet400    400                                    etp51a    51       100000   rs    off     1
+Ethernet401    401                                    etp51b    51       100000   rs    off     2
+Ethernet402    402                                    etp51c    51       100000   rs    off     3
+Ethernet403    403                                    etp51d    51       100000   rs    off     4
+Ethernet404    404                                    etp51e    51       100000   rs    off     5
+Ethernet405    405                                    etp51f    51       100000   rs    off     6
+Ethernet406    406                                    etp51g    51       100000   rs    off     7
+Ethernet407    407                                    etp51h    51       100000   rs    off     8
+Ethernet416    416                                    etp53a    53       100000   rs    off     1
+Ethernet417    417                                    etp53b    53       100000   rs    off     2
+Ethernet418    418                                    etp53c    53       100000   rs    off     3
+Ethernet419    419                                    etp53d    53       100000   rs    off     4
+Ethernet420    420                                    etp53e    53       100000   rs    off     5
+Ethernet421    421                                    etp53f    53       100000   rs    off     6
+Ethernet422    422                                    etp53g    53       100000   rs    off     7
+Ethernet423    423                                    etp53h    53       100000   rs    off     8
+Ethernet432    432                                    etp55a    55       100000   rs    off     1
+Ethernet433    433                                    etp55b    55       100000   rs    off     2
+Ethernet434    434                                    etp55c    55       100000   rs    off     3
+Ethernet435    435                                    etp55d    55       100000   rs    off     4
+Ethernet436    436                                    etp55e    55       100000   rs    off     5
+Ethernet437    437                                    etp55f    55       100000   rs    off     6
+Ethernet438    438                                    etp55g    55       100000   rs    off     7
+Ethernet439    439                                    etp55h    55       100000   rs    off     8
+Ethernet448    448                                    etp57a    57       100000   rs    off     1
+Ethernet449    449                                    etp57b    57       100000   rs    off     2
+Ethernet450    450                                    etp57c    57       100000   rs    off     3
+Ethernet451    451                                    etp57d    57       100000   rs    off     4
+Ethernet452    452                                    etp57e    57       100000   rs    off     5
+Ethernet453    453                                    etp57f    57       100000   rs    off     6
+Ethernet454    454                                    etp57g    57       100000   rs    off     7
+Ethernet455    455                                    etp57h    57       100000   rs    off     8
+Ethernet464    464                                    etp59a    59       100000   rs    off     1
+Ethernet465    465                                    etp59b    59       100000   rs    off     2
+Ethernet466    466                                    etp59c    59       100000   rs    off     3
+Ethernet467    467                                    etp59d    59       100000   rs    off     4
+Ethernet468    468                                    etp59e    59       100000   rs    off     5
+Ethernet469    469                                    etp59f    59       100000   rs    off     6
+Ethernet470    470                                    etp59g    59       100000   rs    off     7
+Ethernet471    471                                    etp59h    59       100000   rs    off     8
+Ethernet480    480                                    etp61a    61       100000   rs    off     1
+Ethernet481    481                                    etp61b    61       100000   rs    off     2
+Ethernet482    482                                    etp61c    61       100000   rs    off     3
+Ethernet483    483                                    etp61d    61       100000   rs    off     4
+Ethernet484    484                                    etp61e    61       100000   rs    off     5
+Ethernet485    485                                    etp61f    61       100000   rs    off     6
+Ethernet486    486                                    etp61g    61       100000   rs    off     7
+Ethernet487    487                                    etp61h    61       100000   rs    off     8
+Ethernet496    496                                    etp63a    63       100000   rs    off     1
+Ethernet497    497                                    etp63b    63       100000   rs    off     2
+Ethernet498    498                                    etp63c    63       100000   rs    off     3
+Ethernet499    499                                    etp63d    63       100000   rs    off     4
+Ethernet500    500                                    etp63e    63       100000   rs    off     5
+Ethernet501    501                                    etp63f    63       100000   rs    off     6
+Ethernet502    502                                    etp63g    63       100000   rs    off     7
+Ethernet503    503                                    etp63h    63       100000   rs    off     8
+Ethernet512    512                                    etp65     65        10000   rs
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/qos.json.j2
new file mode 120000
index 000000000000..eccf286dc879
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/qos.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai.profile
new file mode 100644
index 000000000000..271c8cf70fd8
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai.profile
@@ -0,0 +1,4 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5600_256x100g.xml
+SAI_INDEPENDENT_MODULE_MODE=1
+SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai_5600_256x100g.xml b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai_5600_256x100g.xml
new file mode 100644
index 000000000000..8a97aefdc615
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai_5600_256x100g.xml
@@ -0,0 +1,561 @@
+<?xml version="1.0"?>
+<!--
+  SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+  Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+  Apache-2.0
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+  http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+-->
+<root>
+    <platform_info type="5600">
+
+        <!-- Device MAC address  -->
+        <device-mac-address>00:02:03:04:05:00</device-mac-address>
+
+        <!-- ISSU enabled -->
+        <issu-enabled>0</issu-enabled>
+
+        <!-- Number of ports in the following port list -->
+        <number-of-physical-ports>65</number-of-physical-ports>
+
+        <!-- Global port late create -->
+        <late-create-all-ports>1</late-create-all-ports>
+
+        <!-- List of ports in the device -->
+        <ports-list>
+            <port-info>
+                <local-port>1</local-port>
+                <width>8</width>
+                <module>34</module>
+
+                <!-- 0 none, 1=2, 2=4, 3=2,4 -->
+                <breakout-modes>3</breakout-modes>
+
+                <!-- (BITMASK) 2 - 1Gb , 16 - 10Gb , 32 - 40Gb , 384 - 50Gb , 4096 - 100Gb , 4096 - 200Gb, 32768 - 400G, 262144 - 800G -->
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>5</local-port>
+                <width>8</width>
+                <module>35</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>9</local-port>
+                <width>8</width>
+                <module>33</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>13</local-port>
+                <width>8</width>
+                <module>32</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>17</local-port>
+                <width>8</width>
+                <module>38</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>21</local-port>
+                <width>8</width>
+                <module>39</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>25</local-port>
+                <width>8</width>
+                <module>37</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>29</local-port>
+                <width>8</width>
+                <module>36</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>33</local-port>
+                <width>8</width>
+                <module>42</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>37</local-port>
+                <width>8</width>
+                <module>43</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>41</local-port>
+                <width>8</width>
+                <module>41</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>45</local-port>
+                <width>8</width>
+                <module>40</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>49</local-port>
+                <width>8</width>
+                <module>46</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>53</local-port>
+                <width>8</width>
+                <module>47</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>57</local-port>
+                <width>8</width>
+                <module>45</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>61</local-port>
+                <width>8</width>
+                <module>44</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>65</local-port>
+                <width>8</width>
+                <module>51</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>69</local-port>
+                <width>8</width>
+                <module>50</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>73</local-port>
+                <width>8</width>
+                <module>48</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>77</local-port>
+                <width>8</width>
+                <module>49</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>81</local-port>
+                <width>8</width>
+                <module>55</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>85</local-port>
+                <width>8</width>
+                <module>54</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>89</local-port>
+                <width>8</width>
+                <module>52</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>93</local-port>
+                <width>8</width>
+                <module>53</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>97</local-port>
+                <width>8</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>101</local-port>
+                <width>8</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>105</local-port>
+                <width>8</width>
+                <module>56</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>109</local-port>
+                <width>8</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>113</local-port>
+                <width>8</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>117</local-port>
+                <width>8</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>121</local-port>
+                <width>8</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>125</local-port>
+                <width>8</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>129</local-port>
+                <width>8</width>
+                <module>29</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>133</local-port>
+                <width>8</width>
+                <module>28</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>137</local-port>
+                <width>8</width>
+                <module>30</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>141</local-port>
+                <width>8</width>
+                <module>31</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>145</local-port>
+                <width>8</width>
+                <module>25</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>149</local-port>
+                <width>8</width>
+                <module>24</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>153</local-port>
+                <width>8</width>
+                <module>26</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>157</local-port>
+                <width>8</width>
+                <module>27</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>161</local-port>
+                <width>8</width>
+                <module>21</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>165</local-port>
+                <width>8</width>
+                <module>20</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>169</local-port>
+                <width>8</width>
+                <module>22</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>173</local-port>
+                <width>8</width>
+                <module>23</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>177</local-port>
+                <width>8</width>
+                <module>17</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>181</local-port>
+                <width>8</width>
+                <module>16</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>185</local-port>
+                <width>8</width>
+                <module>18</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>189</local-port>
+                <width>8</width>
+                <module>19</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>193</local-port>
+                <width>8</width>
+                <module>12</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>197</local-port>
+                <width>8</width>
+                <module>13</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>201</local-port>
+                <width>8</width>
+                <module>15</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>205</local-port>
+                <width>8</width>
+                <module>14</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>209</local-port>
+                <width>8</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>213</local-port>
+                <width>8</width>
+                <module>9</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>217</local-port>
+                <width>8</width>
+                <module>11</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>221</local-port>
+                <width>8</width>
+                <module>10</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>225</local-port>
+                <width>8</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>229</local-port>
+                <width>8</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>233</local-port>
+                <width>8</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>237</local-port>
+                <width>8</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>241</local-port>
+                <width>8</width>
+                <module>0</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>245</local-port>
+                <width>8</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>249</local-port>
+                <width>8</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>253</local-port>
+                <width>8</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>257</local-port>
+                <width>1</width>
+                <module>64</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>64</port-speed>
+            </port-info>
+        </ports-list>
+    </platform_info>
+</root>
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/supporting_bulk_counter_groups b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/supporting_bulk_counter_groups
new file mode 100644
index 000000000000..178f0575d049
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/supporting_bulk_counter_groups
@@ -0,0 +1 @@
+QUEUE_WATERMARK_STAT_COUNTER,PG_WATERMARK_STAT_COUNTER,PFC_WD

From 948f838c26f1e3b94478ba3db0ee496e34451b40 Mon Sep 17 00:00:00 2001
From: Tomer Shalvi <116184476+tshalvi@users.noreply.github.com>
Date: Sun, 1 Dec 2024 12:03:57 +0200
Subject: [PATCH 291/364] [Mellanox] Update Spectrum-4 ASIC SI settings for
 OSFP modules (#20908)

- Why I did it
To add ASIC SI settings for applications supported by Innolight modules.

- How I did it
Updated Spectrum-4 media_settings.json with the relevant application SI data.

- How to verify it
Manual testing.
---
 .../Mellanox-SN5600-V256/media_settings.json  | 312 +++++++++++++++++-
 1 file changed, 311 insertions(+), 1 deletion(-)

diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json
index 6b48c7b70adc..377d4116c10c 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json
@@ -2,6 +2,316 @@
     "GLOBAL_MEDIA_SETTINGS": {
         "1-64": {
             "OSFP-8X-sm_media_interface": {
+                "speed:100GAUI-1-L": {
+                    "pre3": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "pre2": {
+                        "lane0": "0x00000005",
+                        "lane1": "0x00000005",
+                        "lane2": "0x00000005",
+                        "lane3": "0x00000005",
+                        "lane4": "0x00000005",
+                        "lane5": "0x00000005",
+                        "lane6": "0x00000005",
+                        "lane7": "0x00000005"
+                    },
+                    "pre1": {
+                        "lane0": "0xfffffff1",
+                        "lane1": "0xfffffff1",
+                        "lane2": "0xfffffff1",
+                        "lane3": "0xfffffff1",
+                        "lane4": "0xfffffff1",
+                        "lane5": "0xfffffff1",
+                        "lane6": "0xfffffff1",
+                        "lane7": "0xfffffff1"
+                    },
+                    "main": {
+                        "lane0": "0x0000002b",
+                        "lane1": "0x0000002b",
+                        "lane2": "0x0000002b",
+                        "lane3": "0x0000002b",
+                        "lane4": "0x0000002b",
+                        "lane5": "0x0000002b",
+                        "lane6": "0x0000002b",
+                        "lane7": "0x0000002b"
+                    },
+                    "post1": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "idriver": {
+                        "lane0": "0x00000032",
+                        "lane1": "0x00000032",
+                        "lane2": "0x00000032",
+                        "lane3": "0x00000032",
+                        "lane4": "0x00000032",
+                        "lane5": "0x00000032",
+                        "lane6": "0x00000032",
+                        "lane7": "0x00000032"
+                    }
+                },
+                "speed:100GAUI-1-S": {
+                    "pre3": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "pre2": {
+                        "lane0": "0x00000005",
+                        "lane1": "0x00000005",
+                        "lane2": "0x00000005",
+                        "lane3": "0x00000005",
+                        "lane4": "0x00000005",
+                        "lane5": "0x00000005",
+                        "lane6": "0x00000005",
+                        "lane7": "0x00000005"
+                    },
+                    "pre1": {
+                        "lane0": "0xfffffff1",
+                        "lane1": "0xfffffff1",
+                        "lane2": "0xfffffff1",
+                        "lane3": "0xfffffff1",
+                        "lane4": "0xfffffff1",
+                        "lane5": "0xfffffff1",
+                        "lane6": "0xfffffff1",
+                        "lane7": "0xfffffff1"
+                    },
+                    "main": {
+                        "lane0": "0x0000002b",
+                        "lane1": "0x0000002b",
+                        "lane2": "0x0000002b",
+                        "lane3": "0x0000002b",
+                        "lane4": "0x0000002b",
+                        "lane5": "0x0000002b",
+                        "lane6": "0x0000002b",
+                        "lane7": "0x0000002b"
+                    },
+                    "post1": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "idriver": {
+                        "lane0": "0x00000032",
+                        "lane1": "0x00000032",
+                        "lane2": "0x00000032",
+                        "lane3": "0x00000032",
+                        "lane4": "0x00000032",
+                        "lane5": "0x00000032",
+                        "lane6": "0x00000032",
+                        "lane7": "0x00000032"
+                    }
+                },
+                "speed:200GAUI-2-S": {
+                    "pre3": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "pre2": {
+                        "lane0": "0x00000005",
+                        "lane1": "0x00000005",
+                        "lane2": "0x00000005",
+                        "lane3": "0x00000005",
+                        "lane4": "0x00000005",
+                        "lane5": "0x00000005",
+                        "lane6": "0x00000005",
+                        "lane7": "0x00000005"
+                    },
+                    "pre1": {
+                        "lane0": "0xfffffff1",
+                        "lane1": "0xfffffff1",
+                        "lane2": "0xfffffff1",
+                        "lane3": "0xfffffff1",
+                        "lane4": "0xfffffff1",
+                        "lane5": "0xfffffff1",
+                        "lane6": "0xfffffff1",
+                        "lane7": "0xfffffff1"
+                    },
+                    "main": {
+                        "lane0": "0x0000002b",
+                        "lane1": "0x0000002b",
+                        "lane2": "0x0000002b",
+                        "lane3": "0x0000002b",
+                        "lane4": "0x0000002b",
+                        "lane5": "0x0000002b",
+                        "lane6": "0x0000002b",
+                        "lane7": "0x0000002b"
+                    },
+                    "post1": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "idriver": {
+                        "lane0": "0x00000032",
+                        "lane1": "0x00000032",
+                        "lane2": "0x00000032",
+                        "lane3": "0x00000032",
+                        "lane4": "0x00000032",
+                        "lane5": "0x00000032",
+                        "lane6": "0x00000032",
+                        "lane7": "0x00000032"
+                    }
+                },
+                "speed:200GAUI-2-L": {
+                    "pre3": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "pre2": {
+                        "lane0": "0x00000005",
+                        "lane1": "0x00000005",
+                        "lane2": "0x00000005",
+                        "lane3": "0x00000005",
+                        "lane4": "0x00000005",
+                        "lane5": "0x00000005",
+                        "lane6": "0x00000005",
+                        "lane7": "0x00000005"
+                    },
+                    "pre1": {
+                        "lane0": "0xfffffff1",
+                        "lane1": "0xfffffff1",
+                        "lane2": "0xfffffff1",
+                        "lane3": "0xfffffff1",
+                        "lane4": "0xfffffff1",
+                        "lane5": "0xfffffff1",
+                        "lane6": "0xfffffff1",
+                        "lane7": "0xfffffff1"
+                    },
+                    "main": {
+                        "lane0": "0x0000002b",
+                        "lane1": "0x0000002b",
+                        "lane2": "0x0000002b",
+                        "lane3": "0x0000002b",
+                        "lane4": "0x0000002b",
+                        "lane5": "0x0000002b",
+                        "lane6": "0x0000002b",
+                        "lane7": "0x0000002b"
+                    },
+                    "post1": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "idriver": {
+                        "lane0": "0x00000032",
+                        "lane1": "0x00000032",
+                        "lane2": "0x00000032",
+                        "lane3": "0x00000032",
+                        "lane4": "0x00000032",
+                        "lane5": "0x00000032",
+                        "lane6": "0x00000032",
+                        "lane7": "0x00000032"
+                    }
+                },
+                "speed:200GAUI-4": {
+                    "pre3": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "pre2": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "pre1": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "main": {
+                        "lane0": "0x0000003f",
+                        "lane1": "0x0000003f",
+                        "lane2": "0x0000003f",
+                        "lane3": "0x0000003f",
+                        "lane4": "0x0000003f",
+                        "lane5": "0x0000003f",
+                        "lane6": "0x0000003f",
+                        "lane7": "0x0000003f"
+                    },
+                    "post1": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "idriver": {
+                        "lane0": "0x0000003f",
+                        "lane1": "0x0000003f",
+                        "lane2": "0x0000003f",
+                        "lane3": "0x0000003f",
+                        "lane4": "0x0000003f",
+                        "lane5": "0x0000003f",
+                        "lane6": "0x0000003f",
+                        "lane7": "0x0000003f"
+                    }
+                },
                 "speed:400GAUI-4-L": {
                     "pre3": {
                         "lane0": "0x00000000",
@@ -190,7 +500,7 @@
                 }
             },
             "OSFP-8X-nm_850_media_interface": {
-		"speed:800G": {
+                "speed:800G": {
                     "pre3": {
                         "lane0": "0x00000000",
                         "lane1": "0x00000000",

From 3ca6e7b42c1a1546f222e37f85a52caf8b87367c Mon Sep 17 00:00:00 2001
From: rameshraghupathy <43161235+rameshraghupathy@users.noreply.github.com>
Date: Sun, 1 Dec 2024 21:11:24 -0800
Subject: [PATCH 292/364] Mounting /host/reboot-cause on pmon so that the
 modules can persist (#20916)

Mounting /host/reboot-cause on pmon so that the modules can persist their reboot cause history

Why I did it
In SmartSwitch each DPU module's reboot-cause history needs to be persisted on the host

How I did it
By mounting "/host/reboot-cause" volume on pmon

How to verify it
Once the host boot up check the path on the pmon containe
---
 rules/docker-platform-monitor.mk | 1 +
 1 file changed, 1 insertion(+)

diff --git a/rules/docker-platform-monitor.mk b/rules/docker-platform-monitor.mk
index 71f9678b5f6a..baf4282517d3 100644
--- a/rules/docker-platform-monitor.mk
+++ b/rules/docker-platform-monitor.mk
@@ -54,6 +54,7 @@ $(DOCKER_PLATFORM_MONITOR)_CONTAINER_NAME = pmon
 $(DOCKER_PLATFORM_MONITOR)_RUN_OPT += --privileged -t
 $(DOCKER_PLATFORM_MONITOR)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
 $(DOCKER_PLATFORM_MONITOR)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro 
+$(DOCKER_PLATFORM_MONITOR)_RUN_OPT += -v /host/reboot-cause:/host/reboot-cause:rw
 $(DOCKER_PLATFORM_MONITOR)_RUN_OPT += -v /host/pmon/stormond:/usr/share/stormond:rw
 $(DOCKER_PLATFORM_MONITOR)_RUN_OPT += -v /var/run/platform_cache:/var/run/platform_cache:ro
 $(DOCKER_PLATFORM_MONITOR)_RUN_OPT += -v /usr/share/sonic/device/pddf:/usr/share/sonic/device/pddf:ro

From a98bee6f2d2447aa548820051da15bcb5e6f5363 Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Sun, 1 Dec 2024 21:58:07 -0800
Subject: [PATCH 293/364] Fix Broadcom RPC build following syncd container
 upgrade to Bookworm (#20949)

Why I did it
With the syncd container upgrade to Bookworm in #19712, the RPC containers started failing to build. There are some additional changes needed to the RPC container build and to use a newer version of the PTF package.

Work item tracking
Microsoft ADO (number only): 30368269
How I did it
Modify the RPC dockerfiles to use Python 3, and to use the existing nanomsg package in Debian.

Also, enable the Broadcom RPC image build as part of PRs.
---
 azure-pipelines.yml                           |  2 +
 .../broadcom/docker-syncd-brcm-dnx-rpc.mk     |  3 +-
 .../docker-syncd-brcm-dnx-rpc/Dockerfile.j2   | 79 +++++++++++--------
 platform/broadcom/docker-syncd-brcm-rpc.mk    |  3 +-
 .../docker-syncd-brcm-rpc/Dockerfile.j2       | 78 ++++++++++--------
 platform/broadcom/libsaithrift-dev.mk         |  6 --
 platform/broadcom/rules.mk                    |  2 +
 7 files changed, 100 insertions(+), 73 deletions(-)

diff --git a/azure-pipelines.yml b/azure-pipelines.yml
index 3956a7c94448..4af6d03fea36 100644
--- a/azure-pipelines.yml
+++ b/azure-pipelines.yml
@@ -70,6 +70,8 @@ stages:
       - name: broadcom
         variables:
           swi_image: yes
+          docker_syncd_rpc_image: yes
+          platform_rpc: brcm
           INCLUDE_RESTAPI: y
       - name: mellanox
         variables:
diff --git a/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk b/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk
index 0416007a2c25..88c04a3136d8 100644
--- a/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk
+++ b/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk
@@ -3,13 +3,14 @@
 DOCKER_SYNCD_BRCM_DNX_RPC = docker-syncd-brcm-dnx-rpc.gz
 DOCKER_SYNCD_DNX_BASE = docker-syncd-brcm-dnx.gz
 $(DOCKER_SYNCD_BRCM_DNX_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-brcm-dnx-rpc
-$(DOCKER_SYNCD_BRCM_DNX_RPC)_DEPENDS += $(SYNCD_RPC) $(LIBTHRIFT) $(PTF)
+$(DOCKER_SYNCD_BRCM_DNX_RPC)_DEPENDS += $(SYNCD_RPC)
 ifeq ($(INSTALL_DEBUG_TOOLS), y)
 $(DOCKER_SYNCD_BRCM_DNX_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \
                                     $(LIBSWSSCOMMON_DBG) \
                                     $(LIBSAIMETADATA_DBG) \
                                     $(LIBSAIREDIS_DBG)
 endif
+$(DOCKER_SYNCD_BRCM_DNX_RPC)_PYTHON_WHEELS += $(PTF_PY3)
 $(DOCKER_SYNCD_BRCM_DNX_RPC)_FILES += $(DSSERVE) $(BCMCMD) $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
 $(DOCKER_SYNCD_BRCM_DNX_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_DNX_BASE)
 SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_BRCM_DNX_RPC)
diff --git a/platform/broadcom/docker-syncd-brcm-dnx-rpc/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm-dnx-rpc/Dockerfile.j2
index ca85d74083ea..b5ed2b720e93 100644
--- a/platform/broadcom/docker-syncd-brcm-dnx-rpc/Dockerfile.j2
+++ b/platform/broadcom/docker-syncd-brcm-dnx-rpc/Dockerfile.j2
@@ -1,58 +1,71 @@
+{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
 FROM docker-syncd-brcm-dnx-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ## Make apt-get non-interactive
 ENV DEBIAN_FRONTEND=noninteractive
 
-COPY \
-{% for deb in docker_syncd_brcm_dnx_rpc_debs.split(' ') -%}
-debs/{{ deb }}{{' '}}
-{%- endfor -%}
-debs/
-
 RUN apt-get purge -y syncd
 
 ## Pre-install the fundamental packages
 RUN apt-get update \
  && apt-get -y install  \
     net-tools           \
-    python3-pip          \
-    python-setuptools   \
+    python3-pip         \
+    python3-dev         \
+    python-is-python3   \
+    python3-scapy       \
     build-essential     \
     libssl-dev          \
     libffi-dev          \
-    python-dev          \
     wget                \
     cmake               \
-    libqt5core5a        \
-    libqt5network5      \
-    libboost-atomic1.74.0
-
-RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \
-{% for deb in docker_syncd_brcm_dnx_rpc_debs.split(' ') -%}
-dpkg_apt debs/{{ deb }}{{'; '}}
-{%- endfor %}
-
-RUN wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \
- && tar xvfz 1.0.0.tar.gz \
- && cd nanomsg-1.0.0    \
- && mkdir -p build      \
- && cmake .             \
- && make install        \
- && ldconfig            \
- && cd ..               \
- && rm -fr nanomsg-1.0.0 \
- && rm -f 1.0.0.tar.gz  \
- && pip2 install cffi==1.7.0    \
- && pip2 install --upgrade cffi==1.7.0 \
- && pip2 install wheel  \
- && pip2 install nnpy   \
+    libnanomsg5         \
+    libnanomsg-dev
+
+{% if docker_syncd_brcm_dnx_rpc_debs.strip() -%}
+# Copy locally-built Debian package dependencies
+{{ copy_files("debs/", docker_syncd_brcm_dnx_rpc_debs.split(' '), "/debs/") }}
+{% endif %}
+
+{% if docker_syncd_brcm_dnx_rpc_pydebs.strip() -%}
+# Copy locally-built Debian package dependencies
+{{ copy_files("python-debs/", docker_syncd_brcm_dnx_rpc_pydebs.split(' '), "/debs/") }}
+{% endif %}
+
+{% if docker_syncd_brcm_dnx_rpc_debs.strip() -%}
+# Install locally-built Debian packages and implicitly install their dependencies
+{{ install_debian_packages(docker_syncd_brcm_dnx_rpc_debs.split(' ')) }}
+{% endif %}
+
+{% if docker_syncd_brcm_dnx_rpc_pydebs.strip() -%}
+# Install locally-built Debian packages and implicitly install their dependencies
+{{ install_debian_packages(docker_syncd_brcm_dnx_rpc_pydebs.split(' ')) }}
+{% endif %}
+
+RUN pip3 install cffi==1.16.0    \
+ && pip3 install wheel  \
+ && pip3 install nnpy   \
  && mkdir -p /opt       \
  && cd /opt             \
  && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \
- && mkdir ptf && cd ptf && wget https://raw.githubusercontent.com/p4lang/ptf/master/src/ptf/afpacket.py && touch __init__.py \
  && apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y \
  && rm -rf /root/deps
 
 COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"]
 
+## Clean up
+RUN apt-get -y purge \
+    cmake            \
+    libssl-dev       \
+    libffi-dev       \
+    python3-dev      \
+    python3-pip      \
+    libthrift-dev    \
+    build-essential
+
+RUN apt-get clean -y && \
+    apt-get autoclean -y && \
+    apt-get autoremove -y && \
+    rm -rf /debs
+
 ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/platform/broadcom/docker-syncd-brcm-rpc.mk b/platform/broadcom/docker-syncd-brcm-rpc.mk
index 929642331598..98e443a9f130 100644
--- a/platform/broadcom/docker-syncd-brcm-rpc.mk
+++ b/platform/broadcom/docker-syncd-brcm-rpc.mk
@@ -2,13 +2,14 @@
 
 DOCKER_SYNCD_BRCM_RPC = docker-syncd-brcm-rpc.gz
 $(DOCKER_SYNCD_BRCM_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-brcm-rpc
-$(DOCKER_SYNCD_BRCM_RPC)_DEPENDS += $(SYNCD_RPC) $(LIBTHRIFT) $(PTF)
+$(DOCKER_SYNCD_BRCM_RPC)_DEPENDS += $(SYNCD_RPC)
 ifeq ($(INSTALL_DEBUG_TOOLS), y)
 $(DOCKER_SYNCD_BRCM_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \
                                     $(LIBSWSSCOMMON_DBG) \
                                     $(LIBSAIMETADATA_DBG) \
                                     $(LIBSAIREDIS_DBG)
 endif
+$(DOCKER_SYNCD_BRCM_RPC)_PYTHON_WHEELS += $(PTF_PY3)
 $(DOCKER_SYNCD_BRCM_RPC)_FILES += $(DSSERVE) $(BCMCMD) $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
 $(DOCKER_SYNCD_BRCM_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE)
 SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_BRCM_RPC)
diff --git a/platform/broadcom/docker-syncd-brcm-rpc/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm-rpc/Dockerfile.j2
index 3517b037a40a..82e2e510ea98 100644
--- a/platform/broadcom/docker-syncd-brcm-rpc/Dockerfile.j2
+++ b/platform/broadcom/docker-syncd-brcm-rpc/Dockerfile.j2
@@ -1,51 +1,50 @@
+{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
 FROM docker-syncd-brcm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ## Make apt-get non-interactive
 ENV DEBIAN_FRONTEND=noninteractive
 
-COPY \
-{% for deb in docker_syncd_brcm_rpc_debs.split(' ') -%}
-debs/{{ deb }}{{' '}}
-{%- endfor -%}
-debs/
-
 RUN apt-get purge -y syncd
 
 ## Pre-install the fundamental packages
 RUN apt-get update \
  && apt-get -y install  \
     net-tools           \
-    python3-pip          \
-    python-setuptools   \
+    python3-pip         \
+    python3-dev         \
+    python-is-python3   \
+    python3-scapy       \
     build-essential     \
     libssl-dev          \
     libffi-dev          \
-    python-dev          \
     wget                \
     cmake               \
-    libqt5core5a        \
-    libqt5network5      \
-    libboost-atomic1.74.0
-
-RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \
-{% for deb in docker_syncd_brcm_rpc_debs.split(' ') -%}
-dpkg_apt debs/{{ deb }}{{'; '}}
-{%- endfor %}
-
-RUN wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \
- && tar xvfz 1.0.0.tar.gz \
- && cd nanomsg-1.0.0    \
- && mkdir -p build      \
- && cmake .             \
- && make install        \
- && ldconfig            \
- && cd ..               \
- && rm -fr nanomsg-1.0.0 \
- && rm -f 1.0.0.tar.gz  \
- && pip2 install cffi==1.7.0    \
- && pip2 install --upgrade cffi==1.7.0 \
- && pip2 install wheel  \
- && pip2 install nnpy   \
+    libnanomsg5         \
+    libnanomsg-dev
+
+{% if docker_syncd_brcm_rpc_debs.strip() -%}
+# Copy locally-built Debian package dependencies
+{{ copy_files("debs/", docker_syncd_brcm_rpc_debs.split(' '), "/debs/") }}
+{% endif %}
+
+{% if docker_syncd_brcm_rpc_pydebs.strip() -%}
+# Copy locally-built Debian package dependencies
+{{ copy_files("python-debs/", docker_syncd_brcm_rpc_pydebs.split(' '), "/debs/") }}
+{% endif %}
+
+{% if docker_syncd_brcm_rpc_debs.strip() -%}
+# Install locally-built Debian packages and implicitly install their dependencies
+{{ install_debian_packages(docker_syncd_brcm_rpc_debs.split(' ')) }}
+{% endif %}
+
+{% if docker_syncd_brcm_rpc_pydebs.strip() -%}
+# Install locally-built Debian packages and implicitly install their dependencies
+{{ install_debian_packages(docker_syncd_brcm_rpc_pydebs.split(' ')) }}
+{% endif %}
+
+RUN pip3 install cffi==1.16.0    \
+ && pip3 install wheel  \
+ && pip3 install nnpy   \
  && mkdir -p /opt       \
  && cd /opt             \
  && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \
@@ -54,4 +53,19 @@ RUN wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \
 
 COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"]
 
+## Clean up
+RUN apt-get -y purge \
+    cmake            \
+    libssl-dev       \
+    libffi-dev       \
+    python3-dev      \
+    python3-pip      \
+    libthrift-dev    \
+    build-essential
+
+RUN apt-get clean -y && \
+    apt-get autoclean -y && \
+    apt-get autoremove -y && \
+    rm -rf /debs
+
 ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/platform/broadcom/libsaithrift-dev.mk b/platform/broadcom/libsaithrift-dev.mk
index ec4e1f6e6da6..037f12f03501 100644
--- a/platform/broadcom/libsaithrift-dev.mk
+++ b/platform/broadcom/libsaithrift-dev.mk
@@ -4,14 +4,8 @@ SAI_VER = 0.9.4
 
 LIBSAITHRIFT_DEV = libsaithrift$(SAITHRIFT_VER)-dev_$(SAI_VER)_amd64.deb
 $(LIBSAITHRIFT_DEV)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI
-#Support two different versions of thrift
 ifeq ($(SAITHRIFT_V2),y)
-$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBTHRIFT_0_14_1) $(LIBTHRIFT_0_14_1_DEV) $(PYTHON3_THRIFT_0_14_1) $(THRIFT_0_14_1_COMPILER)
-$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBTHRIFT_0_14_1)
 $(LIBSAITHRIFT_DEV)_BUILD_ENV = SAITHRIFTV2=true SAITHRIFT_VER=v2
-else
-$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(PYTHON_THRIFT) $(THRIFT_COMPILER)
-$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBTHRIFT)
 endif
 $(LIBSAITHRIFT_DEV)_DEPENDS += $(BRCM_XGS_SAI) $(BRCM_XGS_SAI_DEV)
 $(LIBSAITHRIFT_DEV)_RDEPENDS += $(BRCM_XGS_SAI)
diff --git a/platform/broadcom/rules.mk b/platform/broadcom/rules.mk
index 4070f7be06ae..e3f0e46ccccc 100755
--- a/platform/broadcom/rules.mk
+++ b/platform/broadcom/rules.mk
@@ -56,5 +56,7 @@ $(SYNCD)_DEPENDS += $(BRCM_XGS_SAI) $(BRCM_XGS_SAI_DEV)
 $(SYNCD)_UNINSTALLS += $(BRCM_XGS_SAI_DEV) $(BRCM_XGS_SAI)
 
 ifeq ($(ENABLE_SYNCD_RPC),y)
+# Remove the libthrift_0.11.0 dependency injected by rules/syncd.mk
+$(SYNCD)_DEPENDS := $(filter-out $(LIBTHRIFT_DEV),$($(SYNCD)_DEPENDS))
 $(SYNCD)_DEPENDS += $(LIBSAITHRIFT_DEV)
 endif

From 56c07d2336f295a44ae01ece67f49986b8770dc9 Mon Sep 17 00:00:00 2001
From: Stepan Blyshchak <38952541+stepanblyschak@users.noreply.github.com>
Date: Mon, 2 Dec 2024 08:45:43 +0200
Subject: [PATCH 294/364] [healthd] fix healthd shutdown race (#19504)

#### Why I did it

To fix errors that happen when writing to the queue:

```
Jun  5 23:04:41.798613 r-leopard-56 NOTICE healthd: Caught SIGTERM - exiting...
Jun  5 23:04:41.798985 r-leopard-56 NOTICE healthd: Caught SIGTERM - exiting...
Jun  5 23:04:41.799535 r-leopard-56 NOTICE healthd: Caught SIGTERM - exiting...
Jun  5 23:04:41.806010 r-leopard-56 NOTICE healthd: Caught SIGTERM - exiting...
Jun  5 23:04:41.814075 r-leopard-56 ERR healthd: system_service[Errno 104] Connection reset by peer
Jun  5 23:04:41.824135 r-leopard-56 ERR healthd: Traceback (most recent call last):#012  File "/usr/local/lib/python3.9/dist-packages/health_checker/sysmonitor.py", line 484, in system_service#012    msg = self.myQ.get(timeout=QUEUE_TIMEOUT)#012  File "<string>", line 2, in get#012  File "/usr/lib/python3.9/multiprocessing/managers.py", line 809, in _callmethod#012    kind, result = conn.recv()#012  File "/usr/lib/python3.9/multiprocessing/connection.py", line 255, in recv#012    buf = self._recv_bytes()#012  File "/usr/lib/python3.9/multiprocessing/connection.py", line 419, in _recv_bytes#012    buf = self._recv(4)#012  File "/usr/lib/python3.9/multiprocessing/connection.py", line 384, in _recv#012    chunk = read(handle, remaining)#012ConnectionResetError: [Errno 104] Connection reset by peer
Jun  5 23:04:41.826489 r-leopard-56 INFO healthd[8494]: ERROR:dbus.connection:Exception in handler for D-Bus signal:
Jun  5 23:04:41.826591 r-leopard-56 INFO healthd[8494]: Traceback (most recent call last):
Jun  5 23:04:41.826640 r-leopard-56 INFO healthd[8494]:   File "/usr/lib/python3/dist-packages/dbus/connection.py", line 232, in maybe_handle_message
Jun  5 23:04:41.826686 r-leopard-56 INFO healthd[8494]:     self._handler(*args, **kwargs)
Jun  5 23:04:41.826738 r-leopard-56 INFO healthd[8494]:   File "/usr/local/lib/python3.9/dist-packages/health_checker/sysmonitor.py", line 82, in on_job_removed
Jun  5 23:04:41.826785 r-leopard-56 INFO healthd[8494]:     self.task_notify(msg)
Jun  5 23:04:41.826831 r-leopard-56 INFO healthd[8494]:   File "/usr/local/lib/python3.9/dist-packages/health_checker/sysmonitor.py", line 110, in task_notify
Jun  5 23:04:41.826877 r-leopard-56 INFO healthd[8494]:     self.task_queue.put(msg)
Jun  5 23:04:41.826923 r-leopard-56 INFO healthd[8494]:   File "<string>", line 2, in put
Jun  5 23:04:41.826973 r-leopard-56 INFO healthd[8494]:   File "/usr/lib/python3.9/multiprocessing/managers.py", line 808, in _callmethod
Jun  5 23:04:41.827018 r-leopard-56 INFO healthd[8494]:     conn.send((self._id, methodname, args, kwds))
Jun  5 23:04:41.827065 r-leopard-56 INFO healthd[8494]:   File "/usr/lib/python3.9/multiprocessing/connection.py", line 211, in send
Jun  5 23:04:41.827115 r-leopard-56 INFO healthd[8494]:     self._send_bytes(_ForkingPickler.dumps(obj))
Jun  5 23:04:41.827158 r-leopard-56 INFO healthd[8494]:   File "/usr/lib/python3.9/multiprocessing/connection.py", line 416, in _send_bytes
Jun  5 23:04:41.827199 r-leopard-56 INFO healthd[8494]:     self._send(header + buf)
Jun  5 23:04:41.827254 r-leopard-56 INFO healthd[8494]:   File "/usr/lib/python3.9/multiprocessing/connection.py", line 373, in _send
Jun  5 23:04:41.827322 r-leopard-56 INFO healthd[8494]:     n = write(self._handle, buf)
Jun  5 23:04:41.827368 r-leopard-56 INFO healthd[8494]: BrokenPipeError: [Errno 32] Broken pipe
Jun  5 23:04:42.800216 r-leopard-56 NOTICE healthd: Caught SIGTERM - exiting...
```

When the multiprocessing.Manager is shutdown the queue will raise the above errors. This happens during shutdown - fast-reboot, warm-reboot.


With the fix, system-health service does not hang:

```
root@sonic:/home/admin# sudo systemctl start system-health ; sleep 10; echo "$(date): Stopping..."; sudo systemctl stop system-health; echo "$(date): Stopped"
Thu Oct 17 01:07:56 PM IDT 2024: Stopping...
Thu Oct 17 01:07:58 PM IDT 2024: Stopped
root@sonic:/home/admin# sudo systemctl start system-health ; sleep 10; echo "$(date): Stopping..."; sudo systemctl stop system-health; echo "$(date): Stopped"
Thu Oct 17 01:08:13 PM IDT 2024: Stopping...
Thu Oct 17 01:08:14 PM IDT 2024: Stopped
root@sonic:/home/admin# sudo systemctl start system-health ; sleep 10; echo "$(date): Stopping..."; sudo systemctl stop system-health; echo "$(date): Stopped"
Thu Oct 17 01:09:05 PM IDT 2024: Stopping...
Thu Oct 17 01:09:06 PM IDT 2024: Stopped
```

##### Work item tracking
- Microsoft ADO **(number only)**:

#### How I did it

Remove the call to shutdown, the cleanup will happen automatically when GC runs as per documentation - https://docs.python.org/3/library/multiprocessing.html

#### How to verify it

<!--
If PR needs to be backported, then the PR must be tested against the base branch and the earliest backport release branch and provide tested image version on these two branches. For example, if the PR is requested for master, 202211 and 202012, then the requester needs to provide test results on master and 202012.
-->

Run warm-reboot, fast-reboot multiple times and verify no errors in the log.

#### Which release branch to backport (provide reason below if selected)

<!--
- Note we only backport fixes to a release branch, *not* features!
- Please also provide a reason for the backporting below.
- e.g.
- [x] 202006
-->

- [ ] 201811
- [ ] 201911
- [ ] 202006
- [ ] 202012
- [ ] 202106
- [ ] 202111
- [x] 202205
- [x] 202311
- [x] 202405

#### Tested branch (Please provide the tested image version)

<!--
- Please provide tested image version
- e.g.
- [x] 20201231.100
-->

- [ ] <!-- image version 1 -->
- [ ] <!-- image version 2 -->

#### Description for the changelog
<!--
Write a short (one line) summary that describes the changes in this
pull request for inclusion in the changelog:
-->

<!--
 Ensure to add label/tag for the feature raised. example - PR#2174 under sonic-utilities repo. where, Generic Config and Update feature has been labelled as GCU.
-->

#### Link to config_db schema for YANG module changes
<!--
Provide a link to config_db schema for the table for which YANG model
is defined
Link should point to correct section on https://github.com/Azure/sonic-buildimage/blob/master/src/sonic-yang-models/doc/Configuration.md
-->

#### A picture of a cute animal (not mandatory but encouraged)
---
 .../health_checker/sysmonitor.py              | 24 +++++++++----------
 1 file changed, 11 insertions(+), 13 deletions(-)

diff --git a/src/system-health/health_checker/sysmonitor.py b/src/system-health/health_checker/sysmonitor.py
index c07b58b5489b..1f95006befcf 100755
--- a/src/system-health/health_checker/sysmonitor.py
+++ b/src/system-health/health_checker/sysmonitor.py
@@ -104,6 +104,11 @@ def task_worker(self):
         logger.log_info("Start Listening to systemd bus (pid {0})".format(os.getpid()))
         self.subscribe_sysbus()
 
+    def task_stop(self):
+        # FIXME: Gracefully stop `loop.run()`.
+        self._task_process.kill()
+        return True
+
     def task_notify(self, msg):
         if self.task_stopping_event.is_set():
             return
@@ -481,9 +486,11 @@ def system_service(self):
 
         from queue import Empty
         # Queue to receive the STATEDB and Systemd state change event
-        while not self.task_stopping_event.is_set():
+        while True:
             try:
                 msg = self.myQ.get(timeout=QUEUE_TIMEOUT)
+                if msg == "stop":
+                    break
                 event = msg["unit"]
                 event_src = msg["evt_src"]
                 event_time = msg["time"]
@@ -503,15 +510,10 @@ def system_service(self):
         monitor_statedb_table.task_stop()
 
     def task_worker(self):
-        if self.task_stopping_event.is_set():
-            return
         self.system_service()
 
     def task_stop(self):
-        # Signal the process to stop
-        self.task_stopping_event.set()
-        #Clear the resources of mpmgr- Queue
-        self.mpmgr.shutdown()
+        self.myQ.put("stop")
 
         # Wait for the process to exit
         self._task_process.join(self._stop_timeout_secs)
@@ -519,12 +521,8 @@ def task_stop(self):
         # If the process didn't exit, attempt to kill it
         if self._task_process.is_alive():
             logger.log_notice("Attempting to kill sysmon main process with pid {}".format(self._task_process.pid))
-            os.kill(self._task_process.pid, signal.SIGKILL)
-
-        if self._task_process.is_alive():
-            logger.log_error("Sysmon main process with pid {} could not be killed".format(self._task_process.pid))
+            self._task_process.kill()
+            self._task_process.join()
             return False
 
         return True
-
-

From 6506a6e290f15f8a9a211a3209043c500cb8c0ad Mon Sep 17 00:00:00 2001
From: Gagan Punathil Ellath <gpunathilell@nvidia.com>
Date: Sun, 1 Dec 2024 22:55:49 -0800
Subject: [PATCH 295/364] Debug dump utility dash objects update (#19440)

Why I did it
This PR is required for the changes in sonic-net/sonic-utilities#3387. Adds libdashapi in the image and adds dependency of libdashapi to sonic-utilities

Work item tracking
Microsoft ADO (number only):
How I did it
Changed files/build_templates/sonic_debian_extension.j2 to install libdashapi to the image and changed rules/sonic-utilities.mk to add the dependency
---
 files/build_templates/sonic_debian_extension.j2 | 5 +++++
 rules/sonic-utilities.mk                        | 3 +++
 2 files changed, 8 insertions(+)

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index e0ede21e5490..18658ab0184f 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -1137,7 +1137,12 @@ sudo cp {{platform_api_py3_wheel_path}} $FILESYSTEM_ROOT/$SONIC_PLATFORM_PY3_WHE
 sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install $SONIC_PLATFORM_PY3_WHEEL_NAME
 sudo rm -rf $FILESYSTEM_ROOT/$SONIC_PLATFORM_PY3_WHEEL_NAME
 
+
+sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/libdashapi_*.deb || \
+    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+
 sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install xmlstarlet
+
 {% endif %}
 
 {%- if SONIC_ROUTING_STACK == "frr" %}
diff --git a/rules/sonic-utilities.mk b/rules/sonic-utilities.mk
index 64db62c49f53..d0dec73e90e5 100644
--- a/rules/sonic-utilities.mk
+++ b/rules/sonic-utilities.mk
@@ -21,4 +21,7 @@ $(SONIC_UTILITIES_PY3)_DEBS_DEPENDS = $(LIBYANG) \
                                       $(LIBYANG_PY3) \
                                       $(LIBSWSSCOMMON) \
                                       $(PYTHON3_SWSSCOMMON)
+ifeq ($(CONFIGURED_PLATFORM),nvidia-bluefield)
+$(SONIC_UTILITIES_PY3)_DEBS_DEPENDS += $(LIB_SONIC_DASH_API)
+endif
 SONIC_PYTHON_WHEELS += $(SONIC_UTILITIES_PY3)

From 22159b9af4d280ac8a4d265f4224bffba8a697fd Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 2 Dec 2024 19:01:32 +0800
Subject: [PATCH 296/364] [submodule] Update submodule sonic-swss-common to the
 latest HEAD automatically (#20983)

#### Why I did it
src/sonic-swss-common
```
* aa1021f - (HEAD -> master, origin/master, origin/HEAD) Update redispipeline.h (#954) (30 minutes ago) [Yijiao Qin]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 6bac82be1884..aa1021fb14bd 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 6bac82be1884f8e2c7e43aef2c8a9e6ee20c440f
+Subproject commit aa1021fb14bd79c01e34ea99733b2213da70029a

From 3bf26956f1fb7a31ed673656ace417455de2e64d Mon Sep 17 00:00:00 2001
From: Stephen Sun <5379172+stephenxs@users.noreply.github.com>
Date: Tue, 3 Dec 2024 01:24:14 +0800
Subject: [PATCH 297/364] [Dynamic buffer] Reduce small packet percentage to
 50% (#20632)

[Dynamic buffer] Reduce small packet percentage to 50%

Signed-off-by: Stephen Sun <stephens@nvidia.com>
---
 files/build_templates/buffers_config.j2                         | 2 +-
 .../tests/sample_output/py2/buffers-mellanox2410-dynamic.json   | 2 +-
 .../tests/sample_output/py3/buffers-mellanox2410-dynamic.json   | 2 +-
 .../py3/buffers-mellanox4600c-t0-dynamic-remap-disabled.json    | 2 +-
 .../sample_output/py3/buffers-mellanox4600c-t0-dynamic.json     | 2 +-
 .../py3/buffers-mellanox4600c-t1-dynamic-remap-disabled.json    | 2 +-
 .../sample_output/py3/buffers-mellanox4600c-t1-dynamic.json     | 2 +-
 7 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/files/build_templates/buffers_config.j2 b/files/build_templates/buffers_config.j2
index 9787bec1bd68..8ad98b89c1c6 100644
--- a/files/build_templates/buffers_config.j2
+++ b/files/build_templates/buffers_config.j2
@@ -302,7 +302,7 @@ def
     "LOSSLESS_TRAFFIC_PATTERN": {
         "AZURE": {
             "mtu": "1024",
-            "small_packet_percentage": "100"
+            "small_packet_percentage": "50"
         }
     }
 {% endif %}
diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffers-mellanox2410-dynamic.json b/src/sonic-config-engine/tests/sample_output/py2/buffers-mellanox2410-dynamic.json
index 1cb60747fc3e..2f6fa6584cb3 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/buffers-mellanox2410-dynamic.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/buffers-mellanox2410-dynamic.json
@@ -1302,7 +1302,7 @@
     "LOSSLESS_TRAFFIC_PATTERN": {
         "AZURE": {
             "mtu": "1024",
-            "small_packet_percentage": "100"
+            "small_packet_percentage": "50"
         }
     }
 }
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox2410-dynamic.json b/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox2410-dynamic.json
index 109389c95047..40e57b993e37 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox2410-dynamic.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox2410-dynamic.json
@@ -1302,7 +1302,7 @@
     "LOSSLESS_TRAFFIC_PATTERN": {
         "AZURE": {
             "mtu": "1024",
-            "small_packet_percentage": "100"
+            "small_packet_percentage": "50"
         }
     }
 }
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t0-dynamic-remap-disabled.json b/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t0-dynamic-remap-disabled.json
index c70d257b3a8d..44dce5912819 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t0-dynamic-remap-disabled.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t0-dynamic-remap-disabled.json
@@ -2002,7 +2002,7 @@
     "LOSSLESS_TRAFFIC_PATTERN": {
         "AZURE": {
             "mtu": "1024",
-            "small_packet_percentage": "100"
+            "small_packet_percentage": "50"
         }
     }
 }
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t0-dynamic.json b/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t0-dynamic.json
index a784d0e0cff3..d653ef10eacf 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t0-dynamic.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t0-dynamic.json
@@ -2038,7 +2038,7 @@
     "LOSSLESS_TRAFFIC_PATTERN": {
         "AZURE": {
             "mtu": "1024",
-            "small_packet_percentage": "100"
+            "small_packet_percentage": "50"
         }
     }
 }
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t1-dynamic-remap-disabled.json b/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t1-dynamic-remap-disabled.json
index 4adfa363eed7..5d34084e44d1 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t1-dynamic-remap-disabled.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t1-dynamic-remap-disabled.json
@@ -1475,7 +1475,7 @@
     "LOSSLESS_TRAFFIC_PATTERN": {
         "AZURE": {
             "mtu": "1024",
-            "small_packet_percentage": "100"
+            "small_packet_percentage": "50"
         }
     }
 }
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t1-dynamic.json b/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t1-dynamic.json
index d036b2d723bb..670cb7cd1568 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t1-dynamic.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffers-mellanox4600c-t1-dynamic.json
@@ -1654,7 +1654,7 @@
     "LOSSLESS_TRAFFIC_PATTERN": {
         "AZURE": {
             "mtu": "1024",
-            "small_packet_percentage": "100"
+            "small_packet_percentage": "50"
         }
     }
 }

From 73982cff67b4f211c23f5b9b127750f99ff522ad Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Mon, 2 Dec 2024 09:58:05 -0800
Subject: [PATCH 298/364] [Mellanox]Updating SAI Version to SAIBuild2405.30.0.1
 (#20934)

- Why I did it
Fix issue found

- How I did it
update the makefile to point to newer versions

- How to verify it
sonic-mgmt test
---
 platform/mellanox/mlnx-sai.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/mellanox/mlnx-sai.mk b/platform/mellanox/mlnx-sai.mk
index 96cf4019f23a..92b6382312f7 100644
--- a/platform/mellanox/mlnx-sai.mk
+++ b/platform/mellanox/mlnx-sai.mk
@@ -1,6 +1,6 @@
 # Mellanox SAI
 
-MLNX_SAI_VERSION = SAIBuild2405.30.0.0
+MLNX_SAI_VERSION = SAIBuild2405.30.0.1
 MLNX_SAI_ASSETS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins
 MLNX_SAI_ASSETS_RELEASE_TAG = sai-$(MLNX_SAI_VERSION)-$(BLDENV)-$(CONFIGURED_ARCH)
 MLNX_SAI_ASSETS_URL = $(MLNX_SAI_ASSETS_GITHUB_URL)/releases/download/$(MLNX_SAI_ASSETS_RELEASE_TAG)

From a6b9e1af61d0737ad133fb4a79cf53ffa0adbcba Mon Sep 17 00:00:00 2001
From: krismarvell <108510436+krismarvell@users.noreply.github.com>
Date: Tue, 3 Dec 2024 00:18:06 +0530
Subject: [PATCH 299/364] [ci]: Fix pipeline build platform name for
 marvell-teralynx (#20936)

To Fix newly renamed marvell-teralynx pipeline build failures after #19829
---
 .azure-pipelines/azure-pipelines-build.yml | 2 +-
 README.md                                  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/.azure-pipelines/azure-pipelines-build.yml b/.azure-pipelines/azure-pipelines-build.yml
index 642f356083bc..57819513073c 100644
--- a/.azure-pipelines/azure-pipelines-build.yml
+++ b/.azure-pipelines/azure-pipelines-build.yml
@@ -82,7 +82,7 @@ jobs:
           variables:
             dbg_image: yes
 
-        - name: innovium
+        - name: marvell-teralynx
           variables:
             dbg_image: yes
 
diff --git a/README.md b/README.md
index 5799352af345..aebacea58ca4 100644
--- a/README.md
+++ b/README.md
@@ -3,7 +3,7 @@
 [![Broadcom](https://dev.azure.com/mssonic/build/_apis/build/status/broadcom/Azure.sonic-buildimage.official.broadcom?branchName=master&label=Broadcom)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=138&branchName=master)
 [![Centec](https://dev.azure.com/mssonic/build/_apis/build/status/centec/Azure.sonic-buildimage.official.centec?branchName=master&label=Centec)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=143&branchName=master)
 [![Centec(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/centec/Azure.sonic-buildimage.official.centec-arm64?branchName=master&label=Centec-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=140&branchName=master)
-[![Marvell-Teralynx](https://dev.azure.com/mssonic/build/_apis/build/status/marvell-teralynx/Azure.sonic-buildimage.official.innovium?branchName=master&label=Marvell-Teralynx)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=148&branchName=master)
+[![Marvell-Teralynx](https://dev.azure.com/mssonic/build/_apis/build/status/marvell-teralynx/Azure.sonic-buildimage.official.marvell-teralynx?branchName=master&label=Marvell-Teralynx)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=148&branchName=master)
 [![Mellanox](https://dev.azure.com/mssonic/build/_apis/build/status/mellanox/Azure.sonic-buildimage.official.mellanox?branchName=master&label=Mellanox)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=139&branchName=master)
 [![Marvell(armhf)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-armhf?branchName=master&label=Marvell-armhf)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=141&branchName=master)
 [![Marvell(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-arm64?branchName=master&label=Marvell-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=999&branchName=master)

From f94d4f81c7234c74108cc0aed899e9f5da6cc91e Mon Sep 17 00:00:00 2001
From: Stepan Blyshchak <38952541+stepanblyschak@users.noreply.github.com>
Date: Tue, 3 Dec 2024 00:11:11 +0200
Subject: [PATCH 300/364] [system-health] delay system-health service start
 (#20771)

Why I did it
To improve boot time and stabilize boot time as well as fast-reboot downtime consistency.

How I did it
Delay system-health daemon till boot is finished, same as other daemons.

Signed-off-by: Stepan Blyschak <stepanb@nvidia.com>
---
 src/system-health/scripts/healthd             | 3 +++
 src/system-health/tests/test_system_health.py | 7 ++++---
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/src/system-health/scripts/healthd b/src/system-health/scripts/healthd
index 28bffeb7129b..3d250be6a8ef 100644
--- a/src/system-health/scripts/healthd
+++ b/src/system-health/scripts/healthd
@@ -5,6 +5,9 @@
     System health monitor daemon for SONiC
 """
 
+from swsscommon.swsscommon import RestartWaiter
+RestartWaiter.waitAdvancedBootDone()
+
 import signal
 import threading
 import time
diff --git a/src/system-health/tests/test_system_health.py b/src/system-health/tests/test_system_health.py
index 4aeb3b18f041..179971844907 100644
--- a/src/system-health/tests/test_system_health.py
+++ b/src/system-health/tests/test_system_health.py
@@ -22,6 +22,7 @@
 from .mock_connector import MockConnector
 
 swsscommon.SonicV2Connector = MockConnector
+swsscommon.RestartWaiter = MagicMock()
 
 test_path = os.path.dirname(os.path.abspath(__file__))
 telemetry_path = os.path.join(test_path, 'telemetry')
@@ -48,7 +49,7 @@
 snmp-subagent               EXITED    Oct 19 01:53 AM
 """
 device_info.get_platform = MagicMock(return_value='unittest')
- 
+
 device_runtime_metadata = {"DEVICE_RUNTIME_METADATA": {"ETHERNET_PORTS_PRESENT":True}}
 
 def no_op(*args, **kwargs):
@@ -843,7 +844,7 @@ def test_publish_system_status_allowed_status():
     sysmon = Sysmonitor()
     sysmon.publish_system_status('UP')
     sysmon.publish_system_status('DOWN')
-    
+
     expected_calls = [
         (("UP",), {}),
         (("DOWN",), {})
@@ -856,7 +857,7 @@ def test_publish_system_status():
     sysmon = Sysmonitor()
     sysmon.publish_system_status('UP')
     result = swsscommon.SonicV2Connector.get(MockConnector, 0, "SYSTEM_READY|SYSTEM_STATE", 'Status')
-    assert result == "UP" 
+    assert result == "UP"
 
 @patch('health_checker.sysmonitor.Sysmonitor.get_all_system_status', test_get_all_system_status_ok())
 @patch('health_checker.sysmonitor.Sysmonitor.publish_system_status', test_publish_system_status())

From a8b2dca3b688f57dfdafa536dfc758ecb5c7b3e8 Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Mon, 2 Dec 2024 18:32:32 -0800
Subject: [PATCH 301/364] Upgrade docker-sonic-vs to bookworm (#20697)

Why I did it
This updates the docker-sonic-vs container to be based on Bookworm.
---
 .azure-pipelines/template-variables.yml       |    2 +-
 platform/vs/docker-gbsyncd-vs.mk              |    4 +-
 platform/vs/docker-gbsyncd-vs/Dockerfile.j2   |    4 +-
 platform/vs/docker-sonic-vs.mk                |    4 +-
 platform/vs/docker-sonic-vs/Dockerfile.j2     |   30 +-
 platform/vs/docker-syncd-vs.mk                |    4 +-
 platform/vs/docker-syncd-vs/Dockerfile.j2     |    4 +-
 rules/libnl3.mk                               |   27 +-
 src/libnl3/Makefile                           |   35 +-
 src/libnl3/debian/README.Debian               |   17 -
 src/libnl3/debian/README.source               |   10 -
 src/libnl3/debian/changelog                   | 1043 ---------
 src/libnl3/debian/compat                      |    1 -
 src/libnl3/debian/control                     |  206 --
 src/libnl3/debian/copyright                   |  160 --
 src/libnl3/debian/gbp.conf                    |   16 -
 src/libnl3/debian/libnl-3-200.install         |    3 -
 src/libnl3/debian/libnl-3-200.symbols         |  661 ------
 src/libnl3/debian/libnl-3-dev.install         |    5 -
 src/libnl3/debian/libnl-cli-3-200.install     |    4 -
 src/libnl3/debian/libnl-cli-3-200.symbols     |  226 --
 src/libnl3/debian/libnl-cli-3-dev.install     |    3 -
 src/libnl3/debian/libnl-genl-3-200.install    |    2 -
 src/libnl3/debian/libnl-genl-3-200.symbols    |   88 -
 src/libnl3/debian/libnl-genl-3-dev.install    |    4 -
 src/libnl3/debian/libnl-idiag-3-200.install   |    1 -
 src/libnl3/debian/libnl-idiag-3-200.symbols   |  206 --
 src/libnl3/debian/libnl-idiag-3-dev.install   |    3 -
 src/libnl3/debian/libnl-nf-3-200.install      |    1 -
 src/libnl3/debian/libnl-nf-3-200.symbols      |  620 -----
 src/libnl3/debian/libnl-nf-3-dev.install      |    3 -
 src/libnl3/debian/libnl-route-3-200.install   |    1 -
 src/libnl3/debian/libnl-route-3-200.symbols   | 2051 -----------------
 src/libnl3/debian/libnl-route-3-dev.install   |    3 -
 src/libnl3/debian/libnl-utils.install         |    1 -
 src/libnl3/debian/libnl-utils.manpages        |    1 -
 src/libnl3/debian/libnl-xfrm-3-200.install    |    1 -
 src/libnl3/debian/libnl-xfrm-3-200.symbols    |  484 ----
 src/libnl3/debian/libnl-xfrm-3-dev.install    |    3 -
 src/libnl3/debian/patches/series              |    0
 src/libnl3/debian/rules                       |    4 -
 src/libnl3/debian/source/format               |    1 -
 src/libnl3/debian/watch                       |    2 -
 .../patch/0001-mpls-encap-accessors.patch     |   77 -
 .../0002-mpls-remove-nl_addr_valid.patch      |   63 -
 ...ding-support-for-RTA_NH_ID-attribute.patch |    2 +-
 .../keep-symbol-versions-in-libraries.patch   |   91 +
 src/libnl3/patch/series                       |    5 +-
 src/libnl3/patch/switch-to-debhelper.patch    |  263 +++
 src/libnl3/patch/update-changelog.patch       |   30 +
 50 files changed, 446 insertions(+), 6034 deletions(-)
 delete mode 100644 src/libnl3/debian/README.Debian
 delete mode 100644 src/libnl3/debian/README.source
 delete mode 100644 src/libnl3/debian/changelog
 delete mode 100644 src/libnl3/debian/compat
 delete mode 100644 src/libnl3/debian/control
 delete mode 100644 src/libnl3/debian/copyright
 delete mode 100644 src/libnl3/debian/gbp.conf
 delete mode 100755 src/libnl3/debian/libnl-3-200.install
 delete mode 100644 src/libnl3/debian/libnl-3-200.symbols
 delete mode 100755 src/libnl3/debian/libnl-3-dev.install
 delete mode 100755 src/libnl3/debian/libnl-cli-3-200.install
 delete mode 100644 src/libnl3/debian/libnl-cli-3-200.symbols
 delete mode 100644 src/libnl3/debian/libnl-cli-3-dev.install
 delete mode 100755 src/libnl3/debian/libnl-genl-3-200.install
 delete mode 100644 src/libnl3/debian/libnl-genl-3-200.symbols
 delete mode 100755 src/libnl3/debian/libnl-genl-3-dev.install
 delete mode 100644 src/libnl3/debian/libnl-idiag-3-200.install
 delete mode 100644 src/libnl3/debian/libnl-idiag-3-200.symbols
 delete mode 100644 src/libnl3/debian/libnl-idiag-3-dev.install
 delete mode 100644 src/libnl3/debian/libnl-nf-3-200.install
 delete mode 100644 src/libnl3/debian/libnl-nf-3-200.symbols
 delete mode 100644 src/libnl3/debian/libnl-nf-3-dev.install
 delete mode 100644 src/libnl3/debian/libnl-route-3-200.install
 delete mode 100644 src/libnl3/debian/libnl-route-3-200.symbols
 delete mode 100644 src/libnl3/debian/libnl-route-3-dev.install
 delete mode 100644 src/libnl3/debian/libnl-utils.install
 delete mode 100644 src/libnl3/debian/libnl-utils.manpages
 delete mode 100644 src/libnl3/debian/libnl-xfrm-3-200.install
 delete mode 100644 src/libnl3/debian/libnl-xfrm-3-200.symbols
 delete mode 100644 src/libnl3/debian/libnl-xfrm-3-dev.install
 delete mode 100644 src/libnl3/debian/patches/series
 delete mode 100755 src/libnl3/debian/rules
 delete mode 100644 src/libnl3/debian/source/format
 delete mode 100644 src/libnl3/debian/watch
 delete mode 100644 src/libnl3/patch/0001-mpls-encap-accessors.patch
 delete mode 100644 src/libnl3/patch/0002-mpls-remove-nl_addr_valid.patch
 create mode 100644 src/libnl3/patch/keep-symbol-versions-in-libraries.patch
 create mode 100644 src/libnl3/patch/switch-to-debhelper.patch
 create mode 100644 src/libnl3/patch/update-changelog.patch

diff --git a/.azure-pipelines/template-variables.yml b/.azure-pipelines/template-variables.yml
index 934693196807..e8aa4f60c604 100644
--- a/.azure-pipelines/template-variables.yml
+++ b/.azure-pipelines/template-variables.yml
@@ -1,6 +1,6 @@
 variables:
   DEFAULT_CONTAINER_REGISTRY: 'publicmirror.azurecr.io'
-  COMMON_LIB_BUILD_ENVS: 'bullseye'
+  COMMON_LIB_BUILD_ENVS: 'bookworm'
   SONIC_SLAVE_DOCKER_DRIVER: 'overlay2'
   SONIC_BUILD_RETRY_COUNT: 3
   SONIC_BUILD_RETRY_INTERVAL: 600
diff --git a/platform/vs/docker-gbsyncd-vs.mk b/platform/vs/docker-gbsyncd-vs.mk
index f3cd8a139e8f..9433a28a06bb 100644
--- a/platform/vs/docker-gbsyncd-vs.mk
+++ b/platform/vs/docker-gbsyncd-vs.mk
@@ -3,7 +3,9 @@
 DOCKER_GBSYNCD_PLATFORM_CODE = vs
 include $(PLATFORM_PATH)/../template/docker-gbsyncd-bookworm.mk
 
-$(DOCKER_GBSYNCD_BASE)_DEPENDS += $(SYNCD_VS)
+$(DOCKER_GBSYNCD_BASE)_DEPENDS += $(SYNCD_VS) \
+                              $(LIBNL3_DEV) \
+                              $(LIBNL3)
 
 $(DOCKER_GBSYNCD_BASE)_DBG_DEPENDS += $(SYNCD_VS_DBG) \
                                 $(LIBSWSSCOMMON_DBG) \
diff --git a/platform/vs/docker-gbsyncd-vs/Dockerfile.j2 b/platform/vs/docker-gbsyncd-vs/Dockerfile.j2
index 1c28688ca7c3..59bafc9c920b 100644
--- a/platform/vs/docker-gbsyncd-vs/Dockerfile.j2
+++ b/platform/vs/docker-gbsyncd-vs/Dockerfile.j2
@@ -11,8 +11,8 @@ RUN apt-get install -f -y iproute2 libcap2-bin
 
 # For DASH engine
 
-COPY debs/libnl-3-dev_3.5.0-1_amd64.deb debs/libnl-route-3-dev_3.5.0-1_amd64.deb debs/
-RUN dpkg -i debs/libnl-3-dev_3.5.0-1_amd64.deb debs/libnl-route-3-dev_3.5.0-1_amd64.deb
+COPY debs/libnl-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb debs/libnl-route-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb debs/
+RUN dpkg -i debs/libnl-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb debs/libnl-route-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb
 
 RUN apt-get install -f -y libabsl20220623 libc-ares2 python3-six libboost-thread1.74.0 libboost-dev libboost-system-dev libboost-thread-dev libboost-filesystem1.74.0 libboost-program-options1.74.0 libboost-thread1.74.0 libnanomsg5 libpcap0.8 libthrift-0.17.0 libboost-dev libboost-filesystem-dev libboost-program-options-dev libgmp-dev libnanomsg-dev libpcap-dev libtool pkg-config libthrift-dev python3-thrift thrift-compiler libboost-iostreams1.74.0 libgc1 cpp libboost-dev libboost-all-dev libboost-graph-dev libboost-iostreams-dev libfl-dev libgc-dev libgmp-dev libbpf-dev tcpdump libelf-dev llvm clang python3-pyroute2 python3-ply python3-scapy python3-setuptools python3-thrift libthrift-0.17.0 libgrpc++1.51 libgrpc29 libprotobuf32 libboost-dev libboost-system-dev libboost-thread-dev libprotoc-dev protobuf-compiler python3-protobuf libgrpc++-dev libgrpc-dev protobuf-compiler-grpc python3-grpcio 
 
diff --git a/platform/vs/docker-sonic-vs.mk b/platform/vs/docker-sonic-vs.mk
index 53735eb980cf..3e66e94546ad 100644
--- a/platform/vs/docker-sonic-vs.mk
+++ b/platform/vs/docker-sonic-vs.mk
@@ -46,7 +46,7 @@ $(DOCKER_SONIC_VS)_FILES += $(CONFIGDB_LOAD_SCRIPT) \
                             $(UPDATE_CHASSISDB_CONFIG_SCRIPT) \
                             $(COPP_CONFIG_TEMPLATE)
 
-$(DOCKER_SONIC_VS)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BULLSEYE)
+$(DOCKER_SONIC_VS)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BOOKWORM)
 SONIC_DOCKER_IMAGES += $(DOCKER_SONIC_VS)
 
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_SONIC_VS)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_SONIC_VS)
diff --git a/platform/vs/docker-sonic-vs/Dockerfile.j2 b/platform/vs/docker-sonic-vs/Dockerfile.j2
index 6caa69b301f9..54b408b50bd2 100644
--- a/platform/vs/docker-sonic-vs/Dockerfile.j2
+++ b/platform/vs/docker-sonic-vs/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
-FROM docker-swss-layer-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-swss-layer-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 
@@ -12,24 +12,18 @@ ENV DEBIAN_FRONTEND=noninteractive
 RUN apt-get update && apt-get install -y gnupg
 
 RUN apt-get install -y net-tools \
+                       iproute2 \
                        arping \
                        ndisc6 \
                        ethtool \
                        tcpdump \
                        ifupdown \
                        bridge-utils \
-                       python-ply \
-                       libqt5core5a \
-                       libqt5network5 \
-                       libgmp10 \
                        libjudydebian1 \
                        openssh-client \
                        openssh-server \
                        libc-ares2 \
-                       grub2-common \
                        bash-completion \
-                       libelf1 \
-                       libmnl0 \
                        logrotate \
                        apt-utils \
                        psmisc \
@@ -37,7 +31,6 @@ RUN apt-get install -y net-tools \
                        conntrack \
                        iptables \
                        jq \
-                       libzmq5 \
                        uuid-dev \
                        # For installing Python m2crypto package
                        # (these can be uninstalled after installation)
@@ -69,8 +62,6 @@ RUN apt-get install -y net-tools \
                        libgssrpc4 \
                        libkdb5-10
 
-RUN apt-get install -y -t bullseye-backports iproute2
-
 # For sonic-config-engine Python 3 package
 # Install pyangbind here, outside sonic-config-engine dependencies, as pyangbind causes enum34 to be installed.
 # Then immediately uninstall enum34, as enum34 should not be installed for Python >= 3.4, as it causes a
@@ -120,14 +111,15 @@ RUN apt-get autoclean -y
 RUN apt-get autoremove -y
 RUN rm -rf /debs ~/.cache
 
-RUN sed -ri 's/^(save .*$)/# \1/g;                                                      \
-             s/^daemonize yes$/daemonize no/;                                           \
-             s/^logfile .*$/logfile ""/;                                                \
-             s/^# syslog-enabled no$/syslog-enabled no/;                                \
-             s/^# unixsocket/unixsocket/;                                               \
-             s/notify-keyspace-events ""/notify-keyspace-events AKE/;                   \
-             s/redis-server.sock/redis.sock/g;                                          \
-             s/^client-output-buffer-limit pubsub [0-9]+mb [0-9]+mb [0-9]+/client-output-buffer-limit pubsub 0 0 0/ \
+RUN sed -ri 's/^# save ""$/save ""/g;                    \
+             s/^daemonize yes$/daemonize no/;            \
+             s/^logfile .*$/logfile ""/;                 \
+             s/^# syslog-enabled no$/syslog-enabled no/; \
+             s/^# unixsocket/unixsocket/;                \
+             s/redis-server.sock/redis.sock/g;           \
+             s/^client-output-buffer-limit pubsub [0-9]+mb [0-9]+mb [0-9]+/client-output-buffer-limit pubsub 0 0 0/; \
+             s/^notify-keyspace-events ""$/notify-keyspace-events AKE/; \
+             s/^databases [0-9]+$/databases 100/ \
             ' /etc/redis/redis.conf
 
 COPY ["50-default.conf", "/etc/rsyslog.d/"]
diff --git a/platform/vs/docker-syncd-vs.mk b/platform/vs/docker-syncd-vs.mk
index a9656f291f24..9ca9746bd7c4 100644
--- a/platform/vs/docker-syncd-vs.mk
+++ b/platform/vs/docker-syncd-vs.mk
@@ -3,7 +3,9 @@
 DOCKER_SYNCD_PLATFORM_CODE = vs
 include $(PLATFORM_PATH)/../template/docker-syncd-bookworm.mk
 
-$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD_VS)
+$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD_VS) \
+                              $(LIBNL3_DEV) \
+                              $(LIBNL3)
 
 $(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_VS_DBG) \
                                 $(LIBSWSSCOMMON_DBG) \
diff --git a/platform/vs/docker-syncd-vs/Dockerfile.j2 b/platform/vs/docker-syncd-vs/Dockerfile.j2
index 6e40fd8225bf..b23c1c234817 100644
--- a/platform/vs/docker-syncd-vs/Dockerfile.j2
+++ b/platform/vs/docker-syncd-vs/Dockerfile.j2
@@ -12,8 +12,8 @@ RUN apt-get install -f -y iproute2 libcap2-bin
 
 # For DASH engine
 
-COPY debs/libnl-3-dev_3.5.0-1_amd64.deb debs/libnl-route-3-dev_3.5.0-1_amd64.deb debs/
-RUN dpkg -i debs/libnl-3-dev_3.5.0-1_amd64.deb debs/libnl-route-3-dev_3.5.0-1_amd64.deb
+COPY debs/libnl-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb debs/libnl-route-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb debs/
+RUN dpkg -i debs/libnl-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb debs/libnl-route-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb
 
 RUN apt-get install -f -y libabsl20220623 libc-ares2 python3-six libboost-thread1.74.0 libboost-dev libboost-system-dev libboost-thread-dev libboost-filesystem1.74.0 libboost-program-options1.74.0 libboost-thread1.74.0 libnanomsg5 libpcap0.8 libthrift-0.17.0 libboost-dev libboost-filesystem-dev libboost-program-options-dev libgmp-dev libnanomsg-dev libpcap-dev libtool pkg-config libthrift-dev python3-thrift thrift-compiler libboost-iostreams1.74.0 libgc1 cpp libboost-dev libboost-all-dev libboost-graph-dev libboost-iostreams-dev libfl-dev libgc-dev libgmp-dev libbpf-dev tcpdump libelf-dev llvm clang python3-pyroute2 python3-ply python3-scapy python3-setuptools python3-thrift libthrift-0.17.0 libgrpc++1.51 libgrpc29 libprotobuf32 libboost-dev libboost-system-dev libboost-thread-dev libprotoc-dev protobuf-compiler python3-protobuf libgrpc++-dev libgrpc-dev protobuf-compiler-grpc python3-grpcio 
 
diff --git a/rules/libnl3.mk b/rules/libnl3.mk
index cdd807b2f5c8..a40392e77840 100644
--- a/rules/libnl3.mk
+++ b/rules/libnl3.mk
@@ -1,49 +1,52 @@
 # libnl3
 
-LIBNL3_VERSION_BASE = 3.5.0
-LIBNL3_VERSION = $(LIBNL3_VERSION_BASE)-1
+LIBNL3_VERSION_BASE = 3.7.0
+LIBNL3_VERSION = $(LIBNL3_VERSION_BASE)-0.2
+LIBNL3_VERSION_SONIC = $(LIBNL3_VERSION_BASE)-0.2+b1sonic1
 
 export LIBNL3_VERSION_BASE
 export LIBNL3_VERSION
+export LIBNL3_VERSION_SONIC
 
-LIBNL3 = libnl-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb
+LIBNL3 = libnl-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
 $(LIBNL3)_SRC_PATH = $(SRC_PATH)/libnl3
 SONIC_MAKE_DEBS += $(LIBNL3)
 
-LIBNL3_DEV = libnl-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb
+LIBNL3_DEV = libnl-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
+$(LIBNL3_DEV)_DEPENDS += $(LIBNL3)
 $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL3_DEV)))
 
-LIBNL_GENL3 = libnl-genl-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb
+LIBNL_GENL3 = libnl-genl-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
 $(LIBNL_GENL3)_RDEPENDS += $(LIBNL3)
 $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_GENL3)))
 
-LIBNL_GENL3_DEV = libnl-genl-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb
+LIBNL_GENL3_DEV = libnl-genl-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
 $(LIBNL_GENL3_DEV)_DEPENDS += $(LIBNL_GENL3) $(LIBNL3_DEV)
 $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_GENL3_DEV)))
 
-LIBNL_ROUTE3 = libnl-route-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb
+LIBNL_ROUTE3 = libnl-route-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
 $(LIBNL_ROUTE3)_RDEPENDS += $(LIBNL3)
 $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_ROUTE3)))
 
-LIBNL_ROUTE3_DEV = libnl-route-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb
+LIBNL_ROUTE3_DEV = libnl-route-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
 $(LIBNL_ROUTE3_DEV)_DEPENDS += $(LIBNL_ROUTE3) $(LIBNL3_DEV)
 $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_ROUTE3_DEV)))
 
-LIBNL_NF3 = libnl-nf-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb
+LIBNL_NF3 = libnl-nf-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
 $(LIBNL_NF3)_DEPENDS += $(LIBNL_ROUTE3_DEV)
 $(LIBNL_NF3)_RDEPENDS += $(LIBNL_ROUTE3)
 $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_NF3)))
 
-LIBNL_NF3_DEV = libnl-nf-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb
+LIBNL_NF3_DEV = libnl-nf-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
 $(LIBNL_NF3_DEV)_DEPENDS += $(LIBNL_NF3)
 $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_NF3_DEV)))
 
-LIBNL_CLI = libnl-cli-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb
+LIBNL_CLI = libnl-cli-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
 $(LIBNL_CLI)_DEPENDS += $(LIBNL_GENL3_DEV) $(LIBNL_NF3_DEV) $(LIBNL_ROUTE3_DEV)
 $(LIBNL_CLI)_RDEPENDS += $(LIBNL_GENL3) $(LIBNL_NF3) $(LIBNL_ROUTE3)
 $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_CLI)))
 
-LIBNL_CLI_DEV = libnl-cli-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb
+LIBNL_CLI_DEV = libnl-cli-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
 $(LIBNL_CLI_DEV)_DEPENDS += $(LIBNL_CLI) $(LIBNL_GENL3_DEV) $(LIBNL_NF3_DEV) $(LIBNL_ROUTE3_DEV)
 $(eval $(call add_derived_package,$(LIBNL3),$(LIBNL_CLI_DEV)))
 
diff --git a/src/libnl3/Makefile b/src/libnl3/Makefile
index e510363df7e9..34a40d5d2371 100644
--- a/src/libnl3/Makefile
+++ b/src/libnl3/Makefile
@@ -2,33 +2,36 @@
 SHELL = /bin/bash
 .SHELLFLAGS += -e
 
-MAIN_TARGET = libnl-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb
-DERIVED_TARGETS = libnl-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \
-		  libnl-genl-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \
-		  libnl-genl-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \
-		  libnl-route-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \
-		  libnl-route-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb  \
-		  libnl-nf-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \
-		  libnl-nf-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \
-		  libnl-cli-3-200_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb \
-		  libnl-cli-3-dev_$(LIBNL3_VERSION)_$(CONFIGURED_ARCH).deb
+MAIN_TARGET = libnl-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
+DERIVED_TARGETS = libnl-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \
+		  libnl-genl-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \
+		  libnl-genl-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \
+		  libnl-route-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \
+		  libnl-route-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb  \
+		  libnl-nf-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \
+		  libnl-nf-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \
+		  libnl-cli-3-200_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb \
+		  libnl-cli-3-dev_$(LIBNL3_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	# Obtaining the libnl3
 	rm -rf ./libnl3-$(LIBNL3_VERSION_BASE)
-	git clone https://github.com/thom311/libnl libnl3-$(LIBNL3_VERSION_BASE)
+	dget https://deb.debian.org/debian/pool/main/libn/libnl3/libnl3_$(LIBNL3_VERSION).dsc
 	pushd libnl3-$(LIBNL3_VERSION_BASE)
-	git checkout tags/libnl$(subst .,_,$(LIBNL3_VERSION_BASE))
 
-	git checkout -b sonic
+	# Create a git repository here for stg to apply patches
+	git init
+	git add -f *
+	git commit -qm "initial commit"
+
+	# Apply patch series
 	stg init
 	stg import -s ../patch/series
 
-	cp -r ../debian debian
 ifeq ($(CROSS_BUILD_ENVIRON), y)
-	dpkg-buildpackage -rfakeroot -b -us -uc -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+	DPKG_GENSYMBOLS_CHECK_LEVEL=0 dpkg-buildpackage -rfakeroot -b -us -uc -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
 else
-	dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+	DPKG_GENSYMBOLS_CHECK_LEVEL=0 dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
 endif
 
 	popd
diff --git a/src/libnl3/debian/README.Debian b/src/libnl3/debian/README.Debian
deleted file mode 100644
index 002e249bbfcb..000000000000
--- a/src/libnl3/debian/README.Debian
+++ /dev/null
@@ -1,17 +0,0 @@
-
-libnl versions explained
-========================
-
-Once libnl3 hits the archive there will exist 3 versions of libnl.
-libnl1 with libnl-dev  - up until March 2011 the stable version
-libnl2 with libnl2-dev - development version that resulted in
-libnl3 with libnl3-dev - the new stable (API and ABI wise) version
-
-libnl1 has currently a lot of users in the archive and a lot of changes
-happened since its last upstream release in 2008-01.
-
-The plan is therefore to introduce libnl3, port the two users of libnl2
-(freesmartphone.org libs and powertop) to it, remove libnl2 and don't touch
-libnl1 and libnl-dev for now.
-
- -- Heiko Stuebner <mmind@debian.org>  Sat, 21 May 2011 19:25:13 +0200
diff --git a/src/libnl3/debian/README.source b/src/libnl3/debian/README.source
deleted file mode 100644
index f6e8ee70da94..000000000000
--- a/src/libnl3/debian/README.source
+++ /dev/null
@@ -1,10 +0,0 @@
-This package uses the simple-patchsys of cdbs.
-
-The following patches are used:
-0001:	Fixes the header inclusion in the Makefiles.
-	This for example make distcheck
-0002:	Includes all generated libraries as linktargets in the pkg-config file.
-	Reason: Currently libnl3 generates a bunch of child libraries.
-	These don't get individual .pc files from upstream at the moment but
-	programs linking against libnl3 using the .pc file mostly need these
-	additional libraries too.
diff --git a/src/libnl3/debian/changelog b/src/libnl3/debian/changelog
deleted file mode 100644
index 58b68510576d..000000000000
--- a/src/libnl3/debian/changelog
+++ /dev/null
@@ -1,1043 +0,0 @@
-libnl3 (3.5.0-1) unstable; urgency=low
-
-  [ skuklinski ]
-  * route/link: IFLA_VLAN_PROTOCOL added to vlan_put_attrs
-
-  [ Thomas Haller ]
-  * rtnl/link: indicate capability NL_CAPABILITY_RTNL_LINK_VLAN_PROTOCOL_SERIALZE
-
-  [ David Ahern ]
-  * route/vrf: add VRF support
-  * neigh: add support for NTF_SELF
-
-  [ Beniamino Galvani ]
-  * route/link: fix parsing of 'remote' attribute for GRE links
-
-  [ Thomas Haller ]
-  * route/vlan: allow clearing vlan ingress map
-
-  [ David Ahern ]
-  * link/neigh: add flags option to link and neighbor caches
-
-  [ Thomas Haller ]
-  * gitignore: ignore test binaries in "tests/"
-
-  [ Beniamino Galvani ]
-  * route/link: add macvtap support
-  * route/link: fix dump of parent link for some link types
-  * route/link: add ipv6 support to vxlan links
-
-  [ Tobias Jungel ]
-  * route/link: corrected array size for inet_policy
-
-  [ David Ahern ]
-  * route/link: add link info compare operation
-  * route/link/vxlan: trivial rename VXLAN_HAS_ prefix and vxi_mask
-  * route/link/vxlan: add support for link_info compare
-
-  [ Andrew Vagin ]
-  * libnl: don't use out-of-scope buffer in nl_send_iovec()
-
-  [ David Ahern ]
-  * link: add AF operation to append attributes to a GETLINK message
-  * lib: handle family-based parsing of IFLA_AF_SPEC attribute
-
-  [ Thomas Haller ]
-  * include/linux: update copy of kernel headers
-
-  [ David Ahern ]
-  * bridge: add support for VLANs
-
-  [ Tobias Jungel ]
-  * route/link: handle RTEXT_FILTER_BRVLAN_COMPRESSED
-  * route/link/bridge: fixed return type
-
-  [ Quentin Armitage ]
-  * route/link: add support for IN6_ADDR_GEN_MODE_STABLE_PRIVACY
-
-  [ Amit Khatri ]
-  * lib/route: potential memory leak in pktloc.c
-
-  [ Nick Lewycky ]
-  * remove null dereference from netlink/link.h
-
-  [ David Ahern ]
-  * lib: update ce-mask to uint64_t
-
-  [ Thomas Haller ]
-  * libnl: add nl_object_diff64() to libnl-3.sym
-  * lib/utils: add NL_CAPABILITY_NL_OBJECT_DIFF64 capability
-
-  [ Przemyslaw Szczerbik ]
-  * lib: add type casting for nla_for_each_nested macro
-
-  [ Tobias Klauser ]
-  * build: move -rdynamic from CPPFLAGS to LDFLAGS
-
-  [ Thomas Haller ]
-  * route: sort entries in libnl-route-3.sym by name
-
-  [ Haishuang Yan ]
-  * ipgre: add support for gretap tunnel
-
-  [ Thadeu Lima de Souza Cascardo ]
-  * sit: add 6RD support
-
-  [ Thomas Haller ]
-  * sit/trivial: whitespace
-  * sit: don't print ip6rd_prefix as integer in sit_dump_details()
-  * sit: refactor IS_SIT_LINK_ASSERT()
-  * sit: fix invalid declaration of rtnl_link_sit_get_proto() in sit.h
-  * sit: add public API for sit 6RD support
-
-  [ Jonas Johansson ]
-  * neigh: support neighbour flag NTF_SELF
-  * neigh: add function to look up neighbour (fdb) by ifindex, mac and vlan
-
-  [ Jef Oliver ]
-  * link: support RTEXT_FILTER_VF
-
-  [ Thomas Haller ]
-  * link: allow overwriting IFLA_EXT_MASK flag in ao_get_af() function
-
-  [ Przemyslaw Szczerbik ]
-  * lib: return error on Netlink attribute length overflow
-
-  [ Thomas Egerer ]
-  * xfrm: fix buffer overflow when copying keys
-  * xfrm: check length of alg_name before strcpying it
-  * xfrm: make character pointers in setters const
-  * xfrm: fix segfault when using encapsulation templates
-
-  [ Thomas Haller ]
-  * xfrm: reuse encap data in xfrmnl_sa_set_encap_tmpl()
-
-  [ Thomas Egerer ]
-  * xfrm: fix memory leak for encap original address
-  * xfrm: attach only one xfrm alg attribute to netlink message
-
-  [ Thomas Haller ]
-  * xfrm: fix memleak in build_xfrm_sa_message() error-path
-
-  [ Sabrina Dubroca ]
-  * pass flags through ->io_compare op
-  * vxlan: properly handle LOOSE_COMPARISON in ->io_compare
-  * import macsec uapi headers
-  * lib/route: add macsec support
-
-  [ Thomas Haller ]
-  * xfrm: allow avoiding buffer overflow for key in xfrmnl_sa_get_*_params()
-  * route/addr: fix ID comparison for AF_INET and AF_INET6 addresses
-  * route/addr: fix handling peer addresses for IPv4 addresses
-  * route/addr: add capability NL_CAPABILITY_RTNL_ADDR_PEER_FIX to indicate address fixes
-  * build: fix adding macsec files to include/Makefile.am
-  * libnl-3.2.28-rc1 release
-  * libnl-3.2.28 release
-
-  [ Craig Gallek ]
-  * build: fixup headers for C++ inclusion
-
-  [ Peter Wu ]
-  * trivial: whitespace-only fixes for src and lib
-  * cli: add noreturn attributes
-  * xfrm: fix memleak in another error path of build_xfrm_sa_message
-  * exp: fix a GCC 6 -Wmisleading-indentation warning
-  * doc: fix URLs and typo
-
-  [ Tobias Jungel ]
-  * route/addr: address attributes based on object
-
-  [ Thomas Haller ]
-  * lib: capability NL_CAPABILITY_RTNL_ADDR_PEER_ID_FIX for ID comparison of v4 addresses
-  * nl-addr: avoid read-out-of-bound in nl_addr_fill_sockaddr()
-
-  [ André Draszik ]
-  * lib: add utility function nl_strerror_l()
-  * lib: switch to using strerror_l() instead of strerror_r()
-  * src: switch to using strerror_l() instead of strerror_r()
-
-  [ Jeff Squyres ]
-  * compat: add linux/socket.h for __kernel_sa_family_t
-
-  [ Jef Oliver ]
-  * lib/route: allow override of message type during link change
-  * lib/route: set IFLA_PROTINFO attribute in request message
-  * lib/route: modify link/bridge to set attributes
-
-  [ Davide Caratti ]
-  * macsec: fix endianness of 'sci' parameter
-  * macsec: fix maximum ICV length
-  * remove multiple implementations of htonll(), ntohll()
-
-  [ Jef Oliver ]
-  * lib/route: Fix appending IFLA_BRPORT_FASTLEAVE
-  * lib/route: Add port state translation functions
-  * lib/route: Extend Bridge Flags
-  * lib/route: Allow override of IFLA_AF_SPEC nesting
-  * lib/route: Support IFLA_BRIDGE_MODE
-
-  [ Thomas Haller ]
-  * trivial: whitespace
-  * bridge: change return values for rtnl_link_bridge_get_hwmode()
-
-  [ Michael Braun ]
-  * macvlan: add support for "source" mode
-
-  [ Thomas Haller ]
-  * macvlan: adjust types and merge MACVLAN_HAS_MACCOUNT and MACVLAN_HAS_MACDATA
-
-  [ Brandon Carpenter ]
-  * vxlan: add support for additional VXLAN attributes.
-
-  [ Thomas Haller ]
-  * vxlan: fix exporting new symbols
-  * vxlan: remove redundant enable/disable API from vxlan
-  * vxlan: restore previous VXLAN_ATTR flag values
-  * vxlan: don't store vxlan flags as ce_mask
-  * vxlan: refactor setting/getting vxlan flags
-  * vxlan: fix error code for missing attribute
-
-  [ Jef Oliver ]
-  * lib/route: Export correct ipgre functionality
-
-  [ Thomas Haller ]
-  * lib/route: preserve old ABI for rtnl_link_get_pmtudisc()
-
-  [ Thomas Egerer ]
-  * xfrm: fix xfrm security context management
-  * xfrm: add capability reference to xfrmnl_sa_set_*
-
-  [ Thomas Haller ]
-  * xfrm: remove unused struct xfrmnl_sec_ctx from header files
-
-  [ Jef Oliver ]
-  * lib/route: SRIOV Parse and Read support
-  * lib/route: SRIOV Clone Support
-  * lib/route: SRIOV Utility Functions
-  * lib/route: SRIOV Info Dump Functions
-  * lib/route: SRIOV Set Functionality
-
-  [ Thomas Haller ]
-  * route: remove symbols of internal API from ABI
-
-  [ Tobias Klauser ]
-  * lib/route: keep link stats minlen compatible with kernel < 4.6
-
-  [ Thomas Haller ]
-  * utils: add internal _nl_offset_plus_sizeof() macro
-  * lib/route: use _nl_offset_plus_sizeof() macro for minlen field for rtln_link_policy
-
-  [ Jonas Johansson ]
-  * Add PPP support
-  * ppp: update code after review
-  * ppp: rename local struct ppp_info* variables; pi -> info
-  * ppp: fix type of file descriptor; uint32_t -> int32_t
-
-  [ Thomas Haller ]
-  * ppp: fix API in ppp.h header
-
-  [ Sushma Sitaram ]
-  * route/cls: support setting of selector fields
-
-  [ Tobias Klauser ]
-  * src: nl-link-stats: use correct rtnl link stats maximum
-  * lib/route: add rx_nohandler link stats field
-
-  [ Thomas Haller ]
-  * nl-link-stats: prefer RTNL_LINK_STATS_MAX over __RTNL_LINK_STATS_MAX
-  * lib/route: pass sizeof() argument to nl_memcpy()
-  * link: set ifi_change flags for rtnl_link_build_add_request()
-  * lib: use MSG_PEEK by default for nl_recvmsgs()
-
-  [ Tobias Jungel ]
-  * cache_mngr: add include callback v2
-
-  [ Tobias Klauser ]
-  * cache: fix GCC warning and avoid variable shadowing
-
-  [ Sushma Sitaram ]
-  * route/act: add gact tc action
-
-  [ Tobias Klauser ]
-  * link: add support for IFLA_CARRIER_CHANGES
-  * link: add support for IFLA_PHYS_PORT_NAME
-  * link: add support for IFLA_PHYS_SWITCH_ID
-  * link: add support for IFLA_GSO_MAX_SEGS and IFLA_GSO_MAX_SIZE
-  * link: fix documentation for rtnl_link_get_carrier_changes
-
-  [ Thomas Haller ]
-  * libnl-3.2.29-rc1 release
-  * utils/trivial: rename internal _nl_offset_plus_sizeof() macro to _nl_offsetofend()
-
-  [ Beniamino Galvani ]
-  * Revert "macsec: fix endianness of 'sci' parameter"
-  * macsec: document byte order for the SCI and port attributes
-
-  [ Thomas Haller ]
-  * macsec: fix endianness of sci during dump()
-  * libnl-3.2.29 release
-
-  [ Tobias Klauser ]
-  * route/tc: Remove unused function tca_set_kind()
-
-  [ Laine Stump ]
-  * sriov: fix crash in rtnl_link_sriov_parse_vflist
-
-  [ Thomas Haller ]
-  * sriov: avoid buffer overrun in rtnl_link_sriov_parse_vflist()
-
-  [ Nick Kralevich ]
-  * lib/utils.c: lazy initialize user_hz and psched_hz
-
-  [ Thomas Haller ]
-  * lib/utils.c: ensure calling get_psched_settings() for nl_us2ticks()/nl_ticks2us()
-  * lib/utils.c: add mutex to get_psched_settings()
-
-  [ Nick Kralevich ]
-  * fopen: add O_CLOEXEC
-
-  [ Thomas Haller ]
-  * lib/attr.c: check for valid length argument in nla_reserve()
-
-  [ Tobias Klauser ]
-  * sit: Fix invalid function prototypes in public header
-  * sriov: Add missing prototype for rtnl_link_vf_vlan_free()
-  * qdisc/red: Add missing prototypes for rtnl_red_set_limit() and rtnl_red_get_limit()
-  * fib_lookup: Add missing prototypes to public header
-  * link/inet6: Include own public header for function prototypes
-  * link/ipip: Include own public header for function prototypes
-  * link/ipip: Add missing prototype for rtnl_link_is_ipip()
-  * link/ipvti: Include own public header for function prototypes
-  * link/ipvti: Fix and add function prototypes in public header
-  * link/macsec: Include own public header for function prototypes
-  * link/sit: Add missing prototype for rtnl_link_is_sit()
-  * link/ipgre: Add prototype for ABI-preserving wrapper rtnl_link_get_pmtudisc()
-  * netfilter/queue: Add missing prototype for nfnl_queue_msg_build_verdict_batch()
-  * netfilter/exp: Add missing function prototypes
-  * idiag/req: Add missing function prototype
-  * xfrm/ae: Include own public header for function prototypes
-  * xfrm/lifetime: Include own public header for function prototypes
-  * xfrm/sa: Include own public header for function prototypes
-  * xfrm/selector: Include own public header for function prototypes
-  * xfrm/template: Include own public header for function prototypes
-  * pktloc: Add missing function prototypes
-  * ematch: Add missing function prototypes
-  * build: Add -Wmissing-prototypes to CPPFLAGS
-
-  [ Jeroen Roovers ]
-  * build: distribute in.h in6.h libc-compat.h
-
-  [ Thomas Haller ]
-  * lib: fix comment for nl_recv() about return value for non-blocking read
-  * lib: check for integer-overflow in nlmsg_reserve()
-  * build: cleanup top-level Makefile.am
-  * build: merge include/Makefile.am into top-level makefile
-  * build: merge lib/Makefile.am into top-level makefile
-  * build: merge man/Makefile.am into top-level makefile
-  * build: merge python/Makefile.am into top-level makefile
-  * build: merge tests/Makefile.am into top-level makefile
-  * build: merge src/lib/Makefile.am into top-level makefile
-  * build: merge src/Makefile.am into top-level makefile
-  * build: enable building cli during tests
-  * build: move compiler warning flags to separate autoconf variable
-  * all: enable -Wmissing-prototype warning for all components
-  * build: enable more warnings
-
-  [ Roopa Prabhu ]
-  * route: neigh: use NDA_MASTER for neigh->n_master if available
-
-  [ Simon Buttgereit ]
-  * fix build_xfrm_sp_message index condition
-  * fix xfrmnl_sp_set_sec_ctx length attributes
-  * little style fixes.
-  * update sp_attr condition in build_xfrm_sp_message
-  * add possibity to delete policy without index
-  * update documentation of xfrmnl_sp_get_sec_ctx
-  * fix of boolean operators
-
-  [ Thomas Haller ]
-  * xfrm: allow quering optional arguments from xfrmnl_sp_get_sec_ctx()
-  * xfrm: NUL terminate the ctx_str buffer in xfrmnl_sa_set_sec_ctx()
-  * build: ensure build directory for generated sources exist
-  * build: pass --disable-dependency-tracking to `make distcheck`
-  * build: fix creating directories for generated sources
-  * build: style cleanup in doc/Makefile.am
-  * build: reorder checks in configure.ac
-  * build: add tools/build_release.sh script
-  * include: don't include kernel headers in public libnl3 headers
-  * include: restore linux header includes in public headers
-  * libnl-3.3.0-rc1 release
-
-  [ Alexey Brodkin ]
-  * lib: escape usage of strerror_l() if it doesn't exist in libc
-
-  [ Thomas Haller ]
-  * all: don't use math.h or link with libm.so
-  * libnl-3.3.0 release
-  * tools: fix building doc in build_release.sh
-
-  [ Markus Trapp ]
-  * route/link: add accessor API for IPv6 flags
-
-  [ Santhosh Kumar ]
-  * Provide accessors for actions (rtnl_act).
-  * Do not increment refcount in rtnl_*_get_action APIs.
-
-  [ Thomas Haller ]
-  * route: fix symbol versioning
-
-  [ David Ahern ]
-  * route: Add support for netconf
-  * nl-monitor: All user to specify line format
-  * nl-monitor: Add support for netconf caches
-  * route: Add support for MPLS to netconf
-  * Update fib_rules.h to latest kernel
-  * rule: Add support for l3mdev in FIB rules
-
-  [ Thomas Haller ]
-  * rule: change API for setting/getting l3mdev rule property
-
-  [ Tobias Klauser ]
-  * addr: add AF_VSOCK to translation table
-
-  [ Thomas Haller ]
-  * build: don't build cli libraries by default
-  * build: allow building cli without dynamic librarires support
-
-  [ Tobias Klauser ]
-  * genl: drop usage of GENL_ID_GENERATE
-
-  [ Rasmus Villemoes ]
-  * lib/cache_mngr.c: avoid memleak if realloc fails
-  * lib/cache_mgr.c: remove pointless goto
-  * lib/data.c: avoid memleak if realloc fails
-  * lib/route/cls/u32.c: remove pointless nl_data_append calls
-  * lib/route/cls/u32.c: avoid overflowing an unsigned char
-  * lib/route/cls/u32.c: let the compiler do pointer arithmetic
-  * lib/route/cls/u32.c: remove bogus comment
-  * lib/route/qdisc/netem.c: avoid memory leak if realloc fails
-
-  [ Thomas Haller ]
-  * lib/route/cls/u32.c: use UCHAR_MAX define instead of numeric 255
-  * lib/route/qdisc/netem.c/trivial: fix whitespace and indentation in netem_msg_fill_raw()
-  * lib/route/qdisc/netem.c/trivial: don't use braces for one-line blocks
-
-  [ Rasmus Villemoes ]
-  * lib/xfrm/ae.c: fix memcpy(dst, dst) bug
-  * lib/genl/family.c: fix if (x) y; else y;
-
-  [ Thomas Haller ]
-  * all: avoid compiler warnings -Wimplicit-fallthrough
-  * lib/route: add /usr/lib64/tc/ search path for netem dist file
-
-  [ David Ahern ]
-  * Update rtnetlink.h from kernel tree
-  * Import mpls header from kernel tree
-
-  [ Thomas Haller ]
-  * build: add include/linux-private/linux/mpls.h to Makefile.am
-
-  [ David Ahern ]
-  * addr: Add implementations for mpls_ntop and mpls_pton
-  * addr: Add support for AF_MPLS
-  * route: Add support for MPLS address family
-  * route: Add support for ttl propagation in MPLS routes
-  * Add support for label stack in nl-route commands
-  * Import lwtunnel encap files from kernel
-  * route: Add support for lwtunnel encapsulations
-  * route: Add support for MPLS encap
-
-  [ Thomas Haller ]
-  * build: add new include/netlink-private/route/*.h files to Makefile.am
-
-  [ Amit Khatri ]
-  * Potential memory leak becaue of wrong variable check.
-
-  [ Tobias Klauser ]
-  * cli: include sys/select.h for select(2)
-
-  [ Thomas Haller ]
-  * libnl-3.4.0-rc1 release
-
-  [ David Ahern ]
-  * netconf: Put nc reference in msg_parser
-
-  [ Jeroen Roovers ]
-  * build: add missing headers for issue #152
-
-  [ Thomas Haller ]
-  * libnl-3.4.0 release
-  * nl: add "const" specifier for nla_policy argument of parse functions  [ Roopa Prabhu ]
-  * route: link: add family to dump messages
-  * route: neigh: print family in neigh dumps
-
-  [ Sebastian Bixl ]
-  * route/vlan: fix memory corruption in rtnl_link_vlan_set_egress_map
-
-  [ Thomas Haller ]
-  * route/vlan: fix cloning vlan link in vlan_clone()
-  * route/vlan: grow buffer exponentially in rtnl_link_vlan_set_egress_map()
-  * route/vlan: add capability to indicate heap overflow fix in rtnl_link_vlan_set_egress_map()
-  * route: fix handling old_nh in rtnl_route_parse() and avoid leak
-
-  [ Jef Oliver ]
-  * Change rtnl_link_af_ops.ao_override_rtm behavior
-
-  [ Chris Grahn ]
-  * tests: fix bug in test-create-bridge.c
-
-  [ Steffen Vogel ]
-  * route: add separate function to set netem qdisc delay distribution
-
-  [ Thomas Haller ]
-  * all: declare all variables at the beginning of scope (-Wdeclaration-after-statement)
-  * route: add rtnl_netem_set_delay_distribution_data() to linker script
-  * route: mark data argument for rtnl_netem_set_delay_distribution_data() as const
-  * route: fix memleak in rtnl_netem_set_delay_distribution_data()
-  * route: free previous data in rtnl_netem_set_delay_distribution_data()
-  * travis: enable more warnings during build
-
-  [ Marcos Paulo de Souza ]
-  * tests: Add test to {de}activate loopback interface
-  * lib/veth.c: Disassociate link name of peer name
-
-  [ d0u9 ]
-  * Coding style format
-  * Add new function for setting ifindex and parent of a classifier cache.
-
-  [ Thomas Haller ]
-  * route: rename rtnl_cls_cache_set_tcm_params() and fix symbol versioning
-
-  [ d0u9 ]
-  * Fix for cgroup filter addition problem.
-
-  [ Thomas Haller ]
-  * lib: merge implementations of nl_attr_end() and nl_attr_keep_empty()
-
-  [ Wang Jian ]
-  * link: add Geneve support.
-
-  [ Thomas Haller ]
-  * lib/rtnl: rename public define RTNL_GENEVE_ID_MAX
-
-  [ Roopa Prabhu ]
-  * lib: route: rule: add rule_groups to cache ops
-
-  [ Jonas Johansson ]
-  * route/vrf: initalize clone destination with NULL in vrf_clone()
-
-  [ David Ahern ]
-  * Update fib_rules.h to latest kernel
-  * rule: Add support for protocol and port ranges
-
-  [ Lukáš Karas ]
-  * add demo program for listen conntrack events
-  * nf-ct-add typo
-
-  [ Thomas Haller ]
-  * build: sort entries in Makefile.am and .gitignore by name
-  * build: indent libnl-route-3.sym with tabs
-
-  [ Tobias Jungel ]
-  * neigh: set correct AF for NDA_DST
-  * neigh: support bridge entries for vxlan interfaces
-
-  [ Tuetuopay ]
-  * cache: make "result" output argument for nl_cache_mngr_add() optional
-
-  [ Volodymyr Bendiuga ]
-  * include: copy entire pkt_cls.h from linux
-  * route:cls: add matchall classifier
-
-  [ Thomas Haller ]
-  * route/mall: fix deep cloning mall
-
-  [ Tuetuopay ]
-  * route/link: fix sequence number handling in rtnl_link_change()
-
-  [ Thomas Haller ]
-  * route/link: assert in rtnl_link_change() that the sequence number is set as expected
-  * nl-msg: explicitly initialize nlmsg_seq and nlmsg_pid field in nlmsg_alloc_simple()
-
-  [ d0u9 ]
-  * route/class: add new api rtnl_class_get_by_parent()
-
-  [ Tobias Jungel ]
-  * neigh: correct symbol exposed
-
-  [ Matthieu Baerts ]
-  * nl: fix function name in debug msg
-
-  [ Tobias Jungel ]
-  * neigh: cache updates as well query AF_BRIDGE neigh
-  * whitespace cleanup
-  * nl-neigh-list: free allocated items
-  * neigh: add get/set functions for NEIGH_ATTR_MASTER
-  * neigh_dump_line: dump master as well
-
-  [ d0u9 ]
-  * Add support for cloning cgroup filter object.
-
-  [ Tuetuopay ]
-  * route/link/vxlan: Fix IPv4 set_local resetting ce_mask
-
-  [ Tobias Jungel ]
-  * neigh: update neighbour.h and add missing flags
-
-  [ Thomas Winter ]
-  * ipgre: Fix wrong array size initialization
-  * ipvti: Fix wrong array size initialization
-  * if_tunnel: Update IFLA defines up to FWMARK
-
-  [ Thomas Haller ]
-  * include/linux: update copy of kernel headers
-
-  [ Volodymyr Bendiuga ]
-  * include: import linux header pkt_sched.h
-  * route:qdisc: add MQPRIO Qdisc
-
-  [ Thomas Haller ]
-  * build: cleanup Makefile.am
-  * lib/tc: ensure correct error code in rtnl_tc_msg_build()
-  * lib/qdisc: style fixes in "lib/route/qdisc/mqprio.c"
-  * lib/qdisc: avoid BUG() in "lib/route/qdisc/mqprio.c"
-  * build: sort entries in libnl-route-3.sym
-  * lib/tc: fix uninitalized err variable in rtnl_tc_msg_build()
-
-  [ Volodymyr Bendiuga ]
-  * route:tc: allow to set chain index for tc objects
-
-  [ Thomas Haller ]
-  * route/tc: return error code from rtnl_tc_get_chain()
-
-  [ Volodymyr Bendiuga ]
-  * include: import tc_vlan.h
-  * route:act: add vlan action
-
-  [ Thomas Haller ]
-  * route/act: style fixes in "lib/route/act/vlan.c"
-  * route/act: return error code from act-vlan getters
-
-  [ Ilya Pronin ]
-  * route/cls: fix potential memory leak
-
-  [ Patrick Havelange ]
-  * nla_ok: fix overrun in attribute iteration.
-
-  [ Wang Jian ]
-  * link: macvlan fixes
-
-  [ Thomas Haller ]
-  * route/macvlan: style fixes in "lib/route/link/macvlan.c"
-
-  [ Tobias Jungel ]
-  * route/link: expose IFLA_INFO_SLAVE_KIND
-
-  [ Thomas Haller ]
-  * route/link: avoid dangling pointer in rtnl_link_set_slave_type()
-
-  [ Byeonggon Lee ]
-  * tests: use nl_send_auto() instead of deprecated nl_send_auto_complete() in test-genl.c
-
-  [ Thomas Haller ]
-  * doc: fix typos in example in documentation
-  * attr: mark nested attributes as NLA_F_NESTED
-
-  [ xinbao ]
-  * Add CTA_LABELS and CTA_LABELS_MASK to ctattr_type according to the new kernel
-
-  [ Thomas Haller ]
-  * route: fix strncpy() warning from coverity about unterminated string
-  * link/sriov: fix memleak in rtnl_link_sriov_clone()
-  * utils: add internal helper macros for cleanup
-  * lib/genl: avoid VLA in cmd_msg_parser()
-  * travis: enable -Wvla compiler warning in tests
-  * travis: build tests with NL_MORE_ASSERTS enabled
-  * xfrm: fix memory corruption (dangling pointer) when when setting xfrmnl_sa
-  * route/inet6: fix strncpy() in inet6_dump_details()
-  * route/tc: ensure not string truncation in rtnl_tc_set_kind()
-  * genl: reject invalid group names in genl_family_add_grp()
-
-  [ Yegor Yefremov ]
-  * Add SPDX identifiers
-
-  [ Thomas Haller ]
-  * lib/genl: fix allocating buffer of too small size in cmd_msg_parser()
-
-  [ Michael Forney ]
-  * dbg: Use __func__ instead of __PRETTY_FUNCTION__
-  * all: Avoid pointer arithmetic on `void *`
-  * lib: Don't return expression in function returning void
-  * lib: Don't omit second operand to `?` operator
-  * all: Use __typeof__ instead of typeof
-  * route: Remove stray `;` at top-level
-  * Sync linux headers to 4.19.66
-
-  [ Thomas Haller ]
-  * idiag: workaround and add comment about idiagnl_send_simple() only handling 8 bit flags
-  * lib: accept %NULL arguments for nl_addr_cmp()
-  * lib: fix error code from nfnl_exp_build_message()
-
-  [ Eyal Birger ]
-  * doc/route: fix example code comments
-  * xfrmi: introduce XFRM interfaces support
-
-  [ Thomas Haller ]
-  * xfrmi: return error code from getters for XFRM links
-  * route/trivial: sort entries in "libnl-route-3.sym" asciibetically
-
-  [ d0u9 ]
-  * Add 64bit rate/ceil support for htb class
-
-  [ Thomas Haller ]
-  * route/qdisc: adjust API for 64 bit rate/ceil support for htb class
-  * libnl-3.5.0 release
-
- -- Tamer Ahmed <tamer.ahmed@microsoft.com>  Thu, 02 Jan 2020 10:25:18 -0800
-
-libnl3 (3.2.27-2) unstable; urgency=low
-
-  * Add upstream fix for CVE-2017-0553 (Closes: #859948)
-
- -- Heiko Stuebner <mmind@debian.org>  Mon, 10 Apr 2017 11:48:23 +0200
-
-libnl3 (3.2.27-1) unstable; urgency=low
-
-  * New upstream release
-    Including fixes for unusable sockets after a failed portid
-    generation (Closes: #808213)
-
- -- Heiko Stuebner <mmind@debian.org>  Sun, 24 Jan 2016 23:54:47 +0100
-
-libnl3 (3.2.26-1) unstable; urgency=low
-
-  * New upstream release
-  * Provide Multiarch:same dev packages
-  * Add new libnl-xfrm library handling packet transformations
-  * Update standards to 3.9.6
-
- -- Heiko Stuebner <mmind@debian.org>  Mon, 13 Jul 2015 14:16:22 +0200
-
-libnl3 (3.2.24-2) unstable; urgency=low
-
-  * Backport two upstream fixes to prevent issues with older kernels:
-    - dfd0a80ec845 (route: don't enforce minlen in inet6_parse_protinfo()
-      (IFLA_PROTINFO) and inet_parse_af() (IFLA_AF_SPEC)
-    - 5206c050504f (route/addr: only sent IFA_FLAGS when needed to workaround
-      picky older kernels)
-
- -- Heiko Stuebner <mmind@debian.org>  Fri, 18 Apr 2014 17:19:37 +0200
-
-libnl3 (3.2.24-1) unstable; urgency=low
-
-  * New upstream release
-  * Add new libnl-idiag library handling inetdiag requests
-
- -- Heiko Stuebner <mmind@debian.org>  Sun, 16 Feb 2014 14:23:26 +0100
-
-libnl3 (3.2.21-1) unstable; urgency=low
-
-  * New upstream release (Closes: #707081)
-    Including CAN support (Closes: #698954)
-  * Add symbols files (Closes: #654758)
-  * Provide static libraries (Closes: #693939, #693940)
-  * Update standards to 3.9.4
-  * Removed doc package. Libnl3 documentation is released
-    separately now.
-
- -- Heiko Stuebner <mmind@debian.org>  Tue, 21 May 2013 11:39:13 +0200
-
-libnl3 (3.2.7-4) unstable; urgency=low
-
-  * Add watch file (Closes: #679473)
-  * Use dh-autoreconf to update the build system (Closes: 679474)
-
- -- Heiko Stuebner <mmind@debian.org>  Sat, 30 Jun 2012 15:54:25 +0200
-
-libnl3 (3.2.7-3) unstable; urgency=low
-
-  * Fix FTBFS due to failing gen-tags.sh (Closes: #674322)
-  * Convert to Multi-Arch (Closes: #676611)
-  * Update standards to 3.9.3 - no changes
-  * Switch to dpkg-source format 3.0 (quilt)
-
- -- Heiko Stuebner <mmind@debian.org>  Mon, 18 Jun 2012 21:19:30 +0200
-
-libnl3 (3.2.7-2) unstable; urgency=low
-
-  * Force doxygen dot-threads to 1 to circumvent segfaults on armel
-  * Add missing build-dependency on ghostscript
-
- -- Heiko Stuebner <mmind@debian.org>  Mon, 05 Mar 2012 23:29:10 +0100
-
-libnl3 (3.2.7-1) unstable; urgency=low
-
-  * New upstream release
-  * Build-depend on source-highlight (Closes: #657254)
-
- -- Heiko Stuebner <mmind@debian.org>  Mon, 13 Feb 2012 18:59:30 +0100
-
-libnl3 (3.2.3-2) unstable; urgency=low
-
-  * Upload to unstable
-  * Split split udeb to be in line with regular packages
-  * Move libnl and libnl-genl to /lib for iw and wpa_supplicant.
-
- -- Heiko Stuebner <mmind@debian.org>  Mon, 19 Dec 2011 20:43:21 +0100
-
-libnl3 (3.2.3-1) experimental; urgency=low
-
-  * Upload to experimental to not break debian-installer
-  * Split library and dev packages for the individual libraries
-  * Add utils package
-
-  [Mathieu Trudel-Lapierre <mathieu-tl@ubuntu.com>]
-  * New upstream release (Closes: #648819)
-  * debian/patches/0001-fix-headers.patch,
-    debian/patches/0002-link-sub-libs.patch,
-    debian/patches/0003-fix-out-of-tree-build.patch: dropped.
-  * debian/patches/0004-more-out-of-tree-build-fixes.patch: new patch; adjust
-    Makefiles some more to properly deal with the out-of-tree build when
-    generating headers and documentation.
-  * debian/control:
-    - rename packages to follow upstream soname.
-    - add python-pygments, xmlstarlet, texlive-latex-base and asciidoc to
-      Build-Depends.
-  * debian/rules: update due to upstream soname changes.
-  * debian/*.install: rename and update due to upstream soname changes.
-  * debian/libnl-3-200.install: netlink config files should be installed to
-    /etc/libnl, not /etc/libnl3.
-  * debian/libnl-3-doc.install,
-    debian/libnl-3-doc.doc-base: update to take into account new paths.
-
- -- Heiko Stuebner <mmind@debian.org>  Tue, 06 Nov 2011 21:23:12 +0200
-
-libnl3 (3.0-2) unstable; urgency=low
-
-  * Acknowledge NMU
-  * Install config-files to /etc/libnl3 (Closes: #632790)
-
- -- Heiko Stuebner <mmind@debian.org>  Mon, 26 Sep 2011 20:27:45 +0200
-
-libnl3 (3.0-1.1) unstable; urgency=low
-
-  * Non-maintainer upload with agreement from Heiko Stuebner
-  * Add libnl3-udeb package with seperate build for
-    debian-installer (Closes: #635962).
-
- -- Gaudenz Steinlin <gaudenz@debian.org>  Fri, 29 Jul 2011 23:25:48 +0200
-
-libnl3 (3.0-1) unstable; urgency=low
-
-  * New upstream release (Closes: #626098)
-    see README.Debian for version explanation.
-  * Update standards to 3.9.2
-
- -- Heiko Stuebner <mmind@debian.org>  Sat, 21 May 2011 19:25:13 +0200
-
-libnl2 (2.0-1) unstable; urgency=low
-
-  * New upstream release (Closes: #603765)
-  * Fix compilation with binutils-gold or ld --no-add-needed
-    (Closes: #615745)
-  * Update standards
-  * Update build dependencies - tetex-live is not necessary
-    anymore (Closes: #616260)
-
- -- Heiko Stuebner <mmind@debian.org>  Sun, 06 Mar 2011 18:20:47 +0100
-
-libnl2 (1.99+git20091216-2) unstable; urgency=low
-
-  * add README.source describing the patches in use.
-  * remove libnl*-provides - libnl2 should stay sepparate
-    from libnl1 for now
-
- -- Heiko Stuebner <heiko@sntech.de>  Wed, 10 Mar 2010 18:03:35 +0100
-
-libnl2 (1.99+git20091216-1) unstable; urgency=low
-
-  * New upstream snapshot
-  * New source name to enable installing libnl and libnl2 side by side
-  * Set myself as new maintainer for libnl2 according to agreement
-    with Michael Biebl
-  * Add debug package
-  * README.Debian warns of possible breakage in this snapshot
-  * Add Patch 0001 which fixes some errors in the build system
-  * Add Patch 0002 which adds libnl-?? libs to linker statement
-    until I can resolve this with upstream
-
- -- Heiko Stuebner <heiko@sntech.de>  Mon, 15 Feb 2010 21:50:35 +0100
-
-libnl (1.1-5) unstable; urgency=low
-
-  * Add symbols file for libnl1.
-
- -- Michael Biebl <biebl@debian.org>  Wed, 25 Feb 2009 00:26:05 +0100
-
-libnl (1.1-4) unstable; urgency=low
-
-  * debian/control
-    - Add ${misc:Depends} to all binary packages.
-    - Bump Build-Depends on debhelper to (>= 7).
-  * debian/compat
-    - Bump debhelper compat level to 7.
-  * debian/rules
-    - Include debhelper.mk before other files as recommended by the cdbs
-      documentation.
-
- -- Michael Biebl <biebl@debian.org>  Wed, 18 Feb 2009 13:26:53 +0100
-
-libnl (1.1-3) unstable; urgency=low
-
-  * debian/control
-    - Bump Standards-Version to 3.8.0.
-  * Switch to quilt for patch management.
-  * Add README.source which refers to the quilt documentation.
-  * debian/patches/limits.patch
-    - Add missing include to limits.h. This is required when compiling against
-      glibc 2.8. Thanks to Kees Cook for the patch. Closes: #501485
-
- -- Michael Biebl <biebl@debian.org>  Wed, 08 Oct 2008 21:34:34 +0200
-
-libnl (1.1-2) unstable; urgency=low
-
-  * debian/libnl-doc.doc-base
-    - Register the API documentation with doc-base.
-  * debian/control
-    - Add Suggests: doc-base to libnl-doc.
-
- -- Michael Biebl <biebl@debian.org>  Wed, 05 Mar 2008 00:42:54 +0100
-
-libnl (1.1-1) unstable; urgency=low
-
-  * New stable upstream release.
-  * debian/patches/01-ip_mg_alg_internal_only.patch
-    - Removed, merged upstream.
-  * debian/control
-    - Rename binary package libnl1-pre8 to libnl1.
-    - [libnl1] Add Conflicts/Replaces: libnl1-pre8.
-    - [libnl-dev] Change Depends to libnl1.
-  * Rename debian/libnl1-pre8.install to debian/libnl1.install
-  * debian/copyright
-    - Minor updates and additions.
-
- -- Michael Biebl <biebl@debian.org>  Thu, 10 Jan 2008 16:58:12 +0100
-
-libnl (1.0~pre8-1) unstable; urgency=low
-
-  * New upstream release. Closes: #456175
-  * debian/control
-    - Bump Standards-Version to 3.7.3. No further changes required.
-    - The Vcs-* fields are now officially supported, so remove the XS- prefix.
-    - Rename binary package libnl1-pre6 to libnl1-pre8.
-    - [libnl1-pre8] Add Conflicts/Replaces: libnl1-pre6. The two versions are
-       not coinstallable.
-    - [libnl-dev] Change Depends to libnl1-pre8.
-  * Rename debian/libnl1-pre6.install to debian/libnl1-pre8.install.
-  * debian/patches/10-amd64-linux-types.patch
-    - Removed, merged upstream.
-  * debian/patches/01-ip_mg_alg_internal_only.patch
-    - Pull a fix from upstream. The header linux/ip_mp_alg.h is no longer part
-      of the linux kernel headers (i.e. linux-libc-dev) so remove it from
-      netlink/netlink.h.
-
- -- Michael Biebl <biebl@debian.org>  Thu, 20 Dec 2007 07:45:03 +0100
-
-libnl (1.0~pre6-6) unstable; urgency=low
-
-  * debian/control
-    - Use the new "Homepage:" field to specify the upstream URL.
-    - Replace deprecated ${Source-Version} substvar with ${binary:Version}.
-    - Change Build-Depends: gs-gpl | gs-esp to Build-Depends: ghostscript.
-
- -- Michael Biebl <biebl@debian.org>  Mon, 22 Oct 2007 07:15:29 +0200
-
-libnl (1.0~pre6-5) unstable; urgency=low
-
-  * debian/control
-    - Add XS-Vcs-* fields.
-    - Replace Build-Depends: tetex-bin with texlive-latex-base. teTeX is now
-      gone, superseded by texlive.
-    - Add Build-Depends: graphviz, gs-gpl | gs-esp.
-      The "dot" program is needed for generating the diagram image and "gs"
-      for the ps to png conversion.
-
- -- Michael Biebl <biebl@debian.org>  Sun, 15 Apr 2007 15:45:48 +0200
-
-libnl (1.0~pre6-4) unstable; urgency=medium
-
-  * Autobuilders do not distinguish between build-arch and build-indep, they
-    simply run build. So we have to move doxygen and tetex-bin from
-    Build-Depends-Indep to Build-Depends. Closes: #408719
-  * Urgency medium, as it fixes a FTBFS bug.
-
- -- Michael Biebl <biebl@debian.org>  Fri, 12 Jan 2007 11:23:52 +0100
-
-libnl (1.0~pre6-3) unstable; urgency=low
-
-  * Build and package the API documentation. Closes: #406497
-  * debian/control
-    - Add Build-Depends-Indep on doxygen and tetex-bin (dvips).
-    - Add new package libnl-doc.
-    - Add a "Suggests: libnl-doc" to libnl-dev.
-  * debian/rules
-    - Call "make gendoc" to build the API documentation.
-  * debian/libnl-doc.install
-    - Added. List the files that should be installed.
-
- -- Michael Biebl <biebl@debian.org>  Fri, 12 Jan 2007 10:30:40 +0100
-
-libnl (1.0~pre6-2) unstable; urgency=low
-
-  * Update maintainer email address to biebl@debian.org.
-
- -- Michael Biebl <biebl@debian.org>  Thu, 19 Oct 2006 20:16:09 +0200
-
-libnl (1.0~pre6-1) unstable; urgency=low
-
-  * New upstream release.
-  * Removed 20-autoconf-dirs.patch, merged upstream.
-  * Updated debian/copyright, libnl is now licensed under the LGPL 2.1.
-  * Updated debian/watch.
-
- -- Michael Biebl <biebl@teco.edu>  Fri, 18 Aug 2006 00:40:34 +0200
-
-libnl (1.0~pre6~svn30-1) unstable; urgency=low
-
-  * Updated to svn revision 30.
-  * Bumped Standards-Version to 3.7.2, no further changes required.
-  * Now that dak officially supports ~ in the version number, let's make use
-    of it.
-  * Some install directories were not set correctly, 20-autoconf-dirs.patch
-    fixes that.
-
- -- Michael Biebl <biebl@teco.edu>  Thu, 10 Aug 2006 19:51:42 +0200
-
-libnl (0.99+1.0.svn21-4) unstable; urgency=low
-
-  * Do not create bogus /usr/lib/pkg-config directory. Closes: #364601
-
- -- Michael Biebl <biebl@teco.edu>  Mon, 24 Apr 2006 15:40:23 +0200
-
-libnl (0.99+1.0.svn21-3) unstable; urgency=low
-
-  * Include simple-patchsys.mk in debian/rules.
-  * Merged debian/patches/10-amd64-linux-types.patch from Ubuntu which fixes
-    the FTBFS error on AMD64. Closes: #358887
-    Thanks to Scott James Remnant for this patch.
-
- -- Michael Biebl <biebl@teco.edu>  Sat,  1 Apr 2006 04:52:13 +0200
-
-libnl (0.99+1.0.svn21-2) unstable; urgency=low
-
-  * Initial upload to unstable.
-  * Renamed libnl1 to libnl1-pre6 to match the currently used so-name.
-    Otherwise dependent packages like NM will break on upgrades of libnl.
-
- -- Michael Biebl <biebl@teco.edu>  Tue,  7 Mar 2006 21:22:09 +0100
-
-libnl (0.99+1.0.svn21-1) experimental; urgency=low
-
-  * Initial release. Closes: #286847
-
- -- Michael Biebl <biebl@teco.edu>  Tue, 21 Feb 2006 18:36:35 +0100
diff --git a/src/libnl3/debian/compat b/src/libnl3/debian/compat
deleted file mode 100644
index f599e28b8ab0..000000000000
--- a/src/libnl3/debian/compat
+++ /dev/null
@@ -1 +0,0 @@
-10
diff --git a/src/libnl3/debian/control b/src/libnl3/debian/control
deleted file mode 100644
index 2431ad85cf2d..000000000000
--- a/src/libnl3/debian/control
+++ /dev/null
@@ -1,206 +0,0 @@
-Source: libnl3
-Section: net
-Priority: optional
-Maintainer: Heiko Stuebner <mmind@debian.org>
-Build-Depends: debhelper (>= 9), dh-exec (>= 0.3), cdbs (>= 0.4.93~), bison, flex,
- automake, autoconf, dh-autoreconf, linux-libc-dev (>= 3.2.41), pkg-config
-Standards-Version: 3.9.6
-Homepage: http://www.infradead.org/~tgr/libnl/
-#Vcs-Git: https://github.com/thom311/libnl/
-#Vcs-Browser: https://github.com/thom311/libnl/
-
-Package: libnl-3-200
-Architecture: linux-any
-Section: libs
-Pre-Depends: ${misc:Pre-Depends}
-Depends: ${misc:Depends}, ${shlibs:Depends}
-Multi-Arch: same
-Description: library for dealing with netlink sockets
- This is a library for applications dealing with netlink sockets.
- The library provides an interface for raw netlink messaging and various
- netlink family specific interfaces.
-
-Package: libnl-cli-3-200
-Architecture: linux-any
-Section: libs
-Pre-Depends: ${misc:Pre-Depends}
-Depends: libnl-3-200 (= ${binary:Version}), libnl-genl-3-200 (= ${binary:Version}), libnl-nf-3-200 (= ${binary:Version}), libnl-route-3-200 (= ${binary:Version}), ${misc:Depends}, ${shlibs:Depends}
-Multi-Arch: same
-Description: library for dealing with netlink sockets - cli helpers
- This is a library for applications dealing with netlink sockets.
- The library provides an interface for raw netlink messaging and various
- netlink family specific interfaces.
- .
- Library for cli helpers in libnl-utils.
-
-Package: libnl-utils
-Architecture: linux-any
-Section: libs
-Depends: libnl-cli-3-200 (= ${binary:Version}), libnl-idiag-3-200 (= ${binary:Version}), ${misc:Depends}, ${shlibs:Depends}
-Description: Utilities for dealing with netlink sockets
- This is a library for applications dealing with netlink sockets.
- The library provides an interface for raw netlink messaging and various
- netlink family specific interfaces.
- .
- These utilities help dealing with netlink sockets.
-
-Package: libnl-genl-3-200
-Architecture: linux-any
-Section: libs
-Pre-Depends: ${misc:Pre-Depends}
-Depends: libnl-3-200 (= ${binary:Version}), ${misc:Depends}, ${shlibs:Depends}
-Multi-Arch: same
-Description: library for dealing with netlink sockets - generic netlink
- This is a library for applications dealing with netlink sockets.
- The library provides an interface for raw netlink messaging and various
- netlink family specific interfaces.
- .
- API to the generic netlink protocol, an extended version of the netlink
- protocol.
-
-Package: libnl-idiag-3-200
-Architecture: linux-any
-Section: libs
-Pre-Depends: ${misc:Pre-Depends}
-Depends: libnl-3-200 (= ${binary:Version}), ${misc:Depends}, ${shlibs:Depends}
-Multi-Arch: same
-Description: library for dealing with netlink sockets - inetdiag interface
- This is a library for applications dealing with netlink sockets.
- The library provides an interface for raw netlink messaging and various
- netlink family specific interfaces.
- .
- API to the inetdiag netlink protocol, handling inetdiag requests
-
-Package: libnl-nf-3-200
-Architecture: linux-any
-Section: libs
-Pre-Depends: ${misc:Pre-Depends}
-Depends: libnl-3-200 (= ${binary:Version}), libnl-route-3-200 (= ${binary:Version}), ${misc:Depends}, ${shlibs:Depends}
-Multi-Arch: same
-Description: library for dealing with netlink sockets - netfilter interface
- This is a library for applications dealing with netlink sockets.
- The library provides an interface for raw netlink messaging and various
- netlink family specific interfaces.
- .
- API to netlink based netfilter configuration and monitoring interfaces.
-
-Package: libnl-route-3-200
-Architecture: linux-any
-Section: libs
-Pre-Depends: ${misc:Pre-Depends}
-Depends: libnl-3-200 (= ${binary:Version}), ${misc:Depends}, ${shlibs:Depends}
-Multi-Arch: same
-Description: library for dealing with netlink sockets - route interface
- This is a library for applications dealing with netlink sockets.
- The library provides an interface for raw netlink messaging and various
- netlink family specific interfaces.
- .
- API to the configuration interfaces of the NETLINK_ROUTE family.
-
-Package: libnl-xfrm-3-200
-Architecture: linux-any
-Section: libs
-Pre-Depends: ${misc:Pre-Depends}
-Depends: libnl-3-200 (= ${binary:Version}), ${misc:Depends}, ${shlibs:Depends}
-Multi-Arch: same
-Description: library for dealing with netlink sockets - package transformations
- This is a library for applications dealing with netlink sockets.
- The library provides an interface for raw netlink messaging and various
- netlink family specific interfaces.
- .
- API to netlink based package transformations (such as encrypting
- their payloads).
-
-Package: libnl-3-dev
-Architecture: linux-any
-Section: libdevel
-Depends: libnl-3-200 (= ${binary:Version}), ${misc:Depends}
-Conflicts: libnl-dev, libnl2-dev
-Breaks: libnl3-dev
-Replaces: libnl3-dev
-Multi-Arch: same
-Description: development library and headers for libnl-3
- This is a library for applications dealing with netlink sockets.
- The library provides an interface for raw netlink messaging and various
- netlink family specific interfaces.
- .
- This package contains the headers needed by all libraries and the  files
- that are needed to build applications using libnl3.
-
-Package: libnl-cli-3-dev
-Architecture: linux-any
-Section: libdevel
-Depends: libnl-3-dev (= ${binary:Version}), libnl-genl-3-dev (= ${binary:Version}), libnl-nf-3-dev (= ${binary:Version}), libnl-route-3-dev (= ${binary:Version}), libnl-cli-3-200 (= ${binary:Version}), ${misc:Depends}
-Multi-Arch: same
-Description: development library and headers for libnl-cli-3
- This is a library for applications dealing with netlink sockets.
- The library provides an interface for raw netlink messaging and various
- netlink family specific interfaces.
- .
- This package contains the files that are needed to build applications using
- libnl-cli-3.
-
-Package: libnl-genl-3-dev
-Architecture: linux-any
-Section: libdevel
-Depends: libnl-3-dev (= ${binary:Version}), libnl-genl-3-200 (= ${binary:Version}), ${misc:Depends}
-Multi-Arch: same
-Description: development library and headers for libnl-genl-3
- This is a library for applications dealing with netlink sockets.
- The library provides an interface for raw netlink messaging and various
- netlink family specific interfaces.
- .
- This package contains the files that are needed to build applications using
- libnl-genl-3.
-
-Package: libnl-idiag-3-dev
-Architecture: linux-any
-Section: libdevel
-Depends: libnl-3-dev (= ${binary:Version}), libnl-idiag-3-200 (= ${binary:Version}), ${misc:Depends}
-Multi-Arch: same
-Description: development library and headers for libnl-genl-3
- This is a library for applications dealing with netlink sockets.
- The library provides an interface for raw netlink messaging and various
- netlink family specific interfaces.
- .
- This package contains the files that are needed to build applications using
- libnl-idiag-3.
-
-Package: libnl-nf-3-dev
-Architecture: linux-any
-Section: libdevel
-Depends: libnl-3-dev (= ${binary:Version}), libnl-route-3-dev (= ${binary:Version}), libnl-nf-3-200 (= ${binary:Version}), ${misc:Depends}
-Multi-Arch: same
-Description: development library and headers for libnl-nf-3
- This is a library for applications dealing with netlink sockets.
- The library provides an interface for raw netlink messaging and various
- netlink family specific interfaces.
- .
- This package contains the files that are needed to build applications using
- libnl-nf-3.
-
-Package: libnl-route-3-dev
-Architecture: linux-any
-Section: libdevel
-Depends: libnl-3-dev (= ${binary:Version}), libnl-route-3-200 (= ${binary:Version}), ${misc:Depends}
-Multi-Arch: same
-Description: development library and headers for libnl-route-3
- This is a library for applications dealing with netlink sockets.
- The library provides an interface for raw netlink messaging and various
- netlink family specific interfaces.
- .
- This package contains the files that are needed to build applications using
- libnl-route-3.
-
-Package: libnl-xfrm-3-dev
-Architecture: linux-any
-Section: libdevel
-Depends: libnl-3-dev (= ${binary:Version}), libnl-xfrm-3-200 (= ${binary:Version}), ${misc:Depends}
-Multi-Arch: same
-Description: development library and headers for libnl-xfrm-3
- This is a library for applications dealing with netlink sockets.
- The library provides an interface for raw netlink messaging and various
- netlink family specific interfaces.
- .
- This package contains the files that are needed to build applications using
- libnl-xfrm-3.
diff --git a/src/libnl3/debian/copyright b/src/libnl3/debian/copyright
deleted file mode 100644
index a654869d8098..000000000000
--- a/src/libnl3/debian/copyright
+++ /dev/null
@@ -1,160 +0,0 @@
-This package was debianized by Tamer Ahmed <tamer.ahmed@microsoft.com> on
-Tue, 31 Decn 2019 12:00:46 +0000.
-The packaging is based on Heiko Stuebner's <heiko@sntech.de> original packaging
-of libnl1.
-
-It was downloaded from https://github.com/thom311/libnl/releases
-
-Upstream Author:
-   Thomas Graf <tgraf@suug.ch>
-
-
-Copyright:
-
-lib/route/addr.c
-include/netlink/route/addr.h
-
-   Copyright (c) Thomas Graf <tgraf@suug.ch>
-                 Baruch Even <baruch@ev-en.org>
-
-
-lib/route/cls/u32.c
-lib/route/cls/fw.c
-lib/route/sch/htb.c
-include/netlink/route/cls/fw.h
-include/netlink/route/sch/htb.h
-
-   Copyright (c) Thomas Graf <tgraf@suug.ch>
-   Copyright (c) Petr Gotthard <petr.gotthard@siemens.com>
-   Copyright (c) Siemens AG Oesterreich
-
-
-
-lib/netfilter/log_msg.c
-lib/netfilter/ct.c
-include/netlink/netfilter/log_msg.h
-include/netlink/netfilter/log.h
-lib/netfilter/log_obj.c
-
-   Copyright (c) Thomas Graf <tgraf@suug.ch>
-   Copyright (c) Philip Craig <philipc@snapgear.com>
-   Copyright (c) Patrick McHardy <kaber@trash.net>
-   Copyright (c) Secure Computing Corporation
-
-
-
-include/netlink/netfilter/queue_msg.h
-lib/netfilter/queue_msg_obj.c
-lib/netfilter/queue_msg.c
-lib/netfilter/queue.c
-lib/netfilter/netfilter.c
-lib/netfilter/queue_obj.c
-include/netlink/netfilter/netfilter.h
-include/netlink/netfilter/queue.h
-src/nf-queue.c
-
-   Copyright (c) Patrick McHardy <kaber@trash.net>
-
-
-
-include/netlink/xfrm/selector.h
-include/netlink/xfrm/sa.h
-include/netlink/xfrm/ae.h
-include/netlink/xfrm/sp.h
-include/netlink/xfrm/template.h
-include/netlink/xfrm/lifetime.h
-lib/xfrm/sa.c
-lib/xfrm/template.c
-lib/xfrm/ae.c
-lib/xfrm/sp.c
-lib/xfrm/selector.c
-lib/xfrm/lifetime.c
-
-   Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
-
-
-All other *.c and *.h files not mentioned above are copyright of:
-
-   Copyright (c) 2003-2006 Thomas Graf <tgraf@suug.ch>
-
-
-License:
-
-src/nl-addr-add.c
-src/nl-addr-list.c
-src/nl-cls-add.c
-src/cls/utils.c
-src/cls/cgroup.c
-src/cls/utils.h
-src/cls/basic.c
-src/nl-addr-delete.c:
-
-   This library is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published
-   by the Free Software Foundation version 2 of the License.
-
-   This program is distributed in the hope that it will be useful, but
-   WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-   General Public License for more details.
-
-On Debian GNU/Linux systems, the complete text of the GNU General
-Public License can be found in /usr/share/common-licenses/GPL-2
-
-
-include/netlink/xfrm/selector.h
-include/netlink/xfrm/sa.h
-include/netlink/xfrm/ae.h
-include/netlink/xfrm/sp.h
-include/netlink/xfrm/template.h
-include/netlink/xfrm/lifetime.h
-lib/xfrm/sa.c
-lib/xfrm/template.c
-lib/xfrm/ae.c
-lib/xfrm/sp.c
-lib/xfrm/selector.c
-lib/xfrm/lifetime.c
-
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions
-   are met:
-
-     Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-
-     Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the
-     distribution.
-
-     Neither the name of Texas Instruments Incorporated nor the names of
-     its contributors may be used to endorse or promote products derived
-     from this software without specific prior written permission.
-
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-
-All other *.c and *.h files not mentioned above:
-
-   This library is free software; you can redistribute it and/or modify
-   it under the terms of the GNU Lesser General Public License as published
-   by the Free Software Foundation version 2.1 of the License.
-
-   This program is distributed in the hope that it will be useful, but
-   WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-   General Public License for more details.
-
-On Debian GNU/Linux systems, the complete text of the GNU Lesser General
-Public License can be found in /usr/share/common-licenses/LGPL-2.1
-
diff --git a/src/libnl3/debian/gbp.conf b/src/libnl3/debian/gbp.conf
deleted file mode 100644
index a504bacc7748..000000000000
--- a/src/libnl3/debian/gbp.conf
+++ /dev/null
@@ -1,16 +0,0 @@
-# Configuration file for git-buildpackage and friends
-
-[DEFAULT]
-# the default build command:
-#builder = debuild -i -I
-# the default clean command:
-#cleaner = debuild clean
-# the default branch for upstream sources:
-upstream-branch = upstream-dist
-# the default branch for the debian patch:
-#debian-branch = master
-# the default tag formats used:
-#upstream-tag = upstream/%(version)s
-#debian-tag = debian/%(version)s
-# use pristine-tar:
-pristine-tar = true
diff --git a/src/libnl3/debian/libnl-3-200.install b/src/libnl3/debian/libnl-3-200.install
deleted file mode 100755
index 0a6aa3850b2c..000000000000
--- a/src/libnl3/debian/libnl-3-200.install
+++ /dev/null
@@ -1,3 +0,0 @@
-#!/usr/bin/dh-exec
-debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-3*.so.* lib/${DEB_HOST_MULTIARCH}/
-debian/tmp/etc/libnl/* etc/libnl-3
diff --git a/src/libnl3/debian/libnl-3-200.symbols b/src/libnl3/debian/libnl-3-200.symbols
deleted file mode 100644
index 119e0554920f..000000000000
--- a/src/libnl3/debian/libnl-3-200.symbols
+++ /dev/null
@@ -1,661 +0,0 @@
-libnl-3.so.200 libnl-3-200 #MINVER#
- __flags2str@Base 3.5.0-1
- __flags2str@libnl_3 3.5.0-1
- __list_str2type@Base 3.5.0-1
- __list_str2type@libnl_3 3.5.0-1
- __list_type2str@Base 3.5.0-1
- __list_type2str@libnl_3 3.5.0-1
- __nl_cache_mngt_require@Base 3.5.0-1
- __nl_cache_mngt_require@libnl_3 3.5.0-1
- __nl_cache_ops_lookup@Base 3.5.0-1
- __nl_read_num_str_file@Base 3.5.0-1
- __nl_read_num_str_file@libnl_3 3.5.0-1
- __str2flags@Base 3.5.0-1
- __str2flags@libnl_3 3.5.0-1
- __str2type@Base 3.5.0-1
- __str2type@libnl_3 3.5.0-1
- __trans_list_add@Base 3.5.0-1
- __trans_list_add@libnl_3 3.5.0-1
- __trans_list_clear@Base 3.5.0-1
- __trans_list_clear@libnl_3 3.5.0-1
- __type2str@Base 3.5.0-1
- __type2str@libnl_3 3.5.0-1
- _nl_socket_generate_local_port_no_release@Base 3.5.0-1
- _nl_socket_is_local_port_unspecified@Base 3.5.0-1
- _nl_socket_set_local_port_no_release@Base 3.5.0-1
- _nl_socket_used_ports_release_all@Base 3.5.0-1
- _nl_socket_used_ports_set@Base 3.5.0-1
- dump_from_ops@Base 3.5.0-1
- libnl_3@libnl_3 3.5.0-1
- libnl_3_2_26@libnl_3_2_26 3.5.0-1
- libnl_3_2_27@libnl_3_2_27 3.5.0-1
- libnl_3_2_28@libnl_3_2_28 3.5.0-1
- libnl_3_2_29@libnl_3_2_29 3.5.0-1
- libnl_3_5@libnl_3_5 3.5.0-1
- nl_addr2str@Base 3.5.0-1
- nl_addr2str@libnl_3 3.5.0-1
- nl_addr_alloc@Base 3.5.0-1
- nl_addr_alloc@libnl_3 3.5.0-1
- nl_addr_alloc_attr@Base 3.5.0-1
- nl_addr_alloc_attr@libnl_3 3.5.0-1
- nl_addr_build@Base 3.5.0-1
- nl_addr_build@libnl_3 3.5.0-1
- nl_addr_clone@Base 3.5.0-1
- nl_addr_clone@libnl_3 3.5.0-1
- nl_addr_cmp@Base 3.5.0-1
- nl_addr_cmp@libnl_3 3.5.0-1
- nl_addr_cmp_prefix@Base 3.5.0-1
- nl_addr_cmp_prefix@libnl_3 3.5.0-1
- nl_addr_fill_sockaddr@Base 3.5.0-1
- nl_addr_fill_sockaddr@libnl_3 3.5.0-1
- nl_addr_get@Base 3.5.0-1
- nl_addr_get@libnl_3 3.5.0-1
- nl_addr_get_binary_addr@Base 3.5.0-1
- nl_addr_get_binary_addr@libnl_3 3.5.0-1
- nl_addr_get_family@Base 3.5.0-1
- nl_addr_get_family@libnl_3 3.5.0-1
- nl_addr_get_len@Base 3.5.0-1
- nl_addr_get_len@libnl_3 3.5.0-1
- nl_addr_get_prefixlen@Base 3.5.0-1
- nl_addr_get_prefixlen@libnl_3 3.5.0-1
- nl_addr_guess_family@Base 3.5.0-1
- nl_addr_guess_family@libnl_3 3.5.0-1
- nl_addr_info@Base 3.5.0-1
- nl_addr_info@libnl_3 3.5.0-1
- nl_addr_iszero@Base 3.5.0-1
- nl_addr_iszero@libnl_3 3.5.0-1
- nl_addr_parse@Base 3.5.0-1
- nl_addr_parse@libnl_3 3.5.0-1
- nl_addr_put@Base 3.5.0-1
- nl_addr_put@libnl_3 3.5.0-1
- nl_addr_resolve@Base 3.5.0-1
- nl_addr_resolve@libnl_3 3.5.0-1
- nl_addr_set_binary_addr@Base 3.5.0-1
- nl_addr_set_binary_addr@libnl_3 3.5.0-1
- nl_addr_set_family@Base 3.5.0-1
- nl_addr_set_family@libnl_3 3.5.0-1
- nl_addr_set_prefixlen@Base 3.5.0-1
- nl_addr_set_prefixlen@libnl_3 3.5.0-1
- nl_addr_shared@Base 3.5.0-1
- nl_addr_shared@libnl_3 3.5.0-1
- nl_addr_valid@Base 3.5.0-1
- nl_addr_valid@libnl_3 3.5.0-1
- nl_af2str@Base 3.5.0-1
- nl_af2str@libnl_3 3.5.0-1
- nl_auto_complete@Base 3.5.0-1
- nl_auto_complete@libnl_3 3.5.0-1
- nl_cache_add@Base 3.5.0-1
- nl_cache_add@libnl_3 3.5.0-1
- nl_cache_alloc@Base 3.5.0-1
- nl_cache_alloc@libnl_3 3.5.0-1
- nl_cache_alloc_and_fill@Base 3.5.0-1
- nl_cache_alloc_and_fill@libnl_3 3.5.0-1
- nl_cache_alloc_name@Base 3.5.0-1
- nl_cache_alloc_name@libnl_3 3.5.0-1
- nl_cache_clear@Base 3.5.0-1
- nl_cache_clear@libnl_3 3.5.0-1
- nl_cache_clone@Base 3.5.0-1
- nl_cache_clone@libnl_3 3.5.0-1
- nl_cache_dump@Base 3.5.0-1
- nl_cache_dump@libnl_3 3.5.0-1
- nl_cache_dump_filter@Base 3.5.0-1
- nl_cache_dump_filter@libnl_3 3.5.0-1
- nl_cache_find@Base 3.5.0-1
- nl_cache_find@libnl_3 3.5.0-1
- nl_cache_foreach@Base 3.5.0-1
- nl_cache_foreach@libnl_3 3.5.0-1
- nl_cache_foreach_filter@Base 3.5.0-1
- nl_cache_foreach_filter@libnl_3 3.5.0-1
- nl_cache_free@Base 3.5.0-1
- nl_cache_free@libnl_3 3.5.0-1
- nl_cache_get@Base 3.5.0-1
- nl_cache_get@libnl_3 3.5.0-1
- nl_cache_get_first@Base 3.5.0-1
- nl_cache_get_first@libnl_3 3.5.0-1
- nl_cache_get_last@Base 3.5.0-1
- nl_cache_get_last@libnl_3 3.5.0-1
- nl_cache_get_next@Base 3.5.0-1
- nl_cache_get_next@libnl_3 3.5.0-1
- nl_cache_get_ops@Base 3.5.0-1
- nl_cache_get_ops@libnl_3 3.5.0-1
- nl_cache_get_prev@Base 3.5.0-1
- nl_cache_get_prev@libnl_3 3.5.0-1
- nl_cache_include@Base 3.5.0-1
- nl_cache_include@libnl_3 3.5.0-1
- nl_cache_include_v2@libnl_3_2_29 3.5.0-1
- nl_cache_is_empty@Base 3.5.0-1
- nl_cache_is_empty@libnl_3 3.5.0-1
- nl_cache_mark_all@Base 3.5.0-1
- nl_cache_mark_all@libnl_3 3.5.0-1
- nl_cache_mngr_add@Base 3.5.0-1
- nl_cache_mngr_add@libnl_3 3.5.0-1
- nl_cache_mngr_add_cache@Base 3.5.0-1
- nl_cache_mngr_add_cache@libnl_3 3.5.0-1
- nl_cache_mngr_add_cache_v2@libnl_3_2_29 3.5.0-1
- nl_cache_mngr_alloc@Base 3.5.0-1
- nl_cache_mngr_alloc@libnl_3 3.5.0-1
- nl_cache_mngr_data_ready@Base 3.5.0-1
- nl_cache_mngr_data_ready@libnl_3 3.5.0-1
- nl_cache_mngr_free@Base 3.5.0-1
- nl_cache_mngr_free@libnl_3 3.5.0-1
- nl_cache_mngr_get_fd@Base 3.5.0-1
- nl_cache_mngr_get_fd@libnl_3 3.5.0-1
- nl_cache_mngr_info@Base 3.5.0-1
- nl_cache_mngr_info@libnl_3 3.5.0-1
- nl_cache_mngr_poll@Base 3.5.0-1
- nl_cache_mngr_poll@libnl_3 3.5.0-1
- nl_cache_mngt_provide@Base 3.5.0-1
- nl_cache_mngt_provide@libnl_3 3.5.0-1
- nl_cache_mngt_register@Base 3.5.0-1
- nl_cache_mngt_register@libnl_3 3.5.0-1
- nl_cache_mngt_require@Base 3.5.0-1
- nl_cache_mngt_require@libnl_3 3.5.0-1
- nl_cache_mngt_require_safe@Base 3.5.0-1
- nl_cache_mngt_require_safe@libnl_3 3.5.0-1
- nl_cache_mngt_unprovide@Base 3.5.0-1
- nl_cache_mngt_unprovide@libnl_3 3.5.0-1
- nl_cache_mngt_unregister@Base 3.5.0-1
- nl_cache_mngt_unregister@libnl_3 3.5.0-1
- nl_cache_move@Base 3.5.0-1
- nl_cache_move@libnl_3 3.5.0-1
- nl_cache_nitems@Base 3.5.0-1
- nl_cache_nitems@libnl_3 3.5.0-1
- nl_cache_nitems_filter@Base 3.5.0-1
- nl_cache_nitems_filter@libnl_3 3.5.0-1
- nl_cache_ops_associate@Base 3.5.0-1
- nl_cache_ops_associate@libnl_3 3.5.0-1
- nl_cache_ops_associate_safe@Base 3.5.0-1
- nl_cache_ops_associate_safe@libnl_3 3.5.0-1
- nl_cache_ops_foreach@Base 3.5.0-1
- nl_cache_ops_foreach@libnl_3 3.5.0-1
- nl_cache_ops_get@Base 3.5.0-1
- nl_cache_ops_get@libnl_3 3.5.0-1
- nl_cache_ops_lookup@Base 3.5.0-1
- nl_cache_ops_lookup@libnl_3 3.5.0-1
- nl_cache_ops_lookup_safe@Base 3.5.0-1
- nl_cache_ops_lookup_safe@libnl_3 3.5.0-1
- nl_cache_ops_put@Base 3.5.0-1
- nl_cache_ops_put@libnl_3 3.5.0-1
- nl_cache_ops_set_flags@Base 3.5.0-1
- nl_cache_ops_set_flags@libnl_3 3.5.0-1
- nl_cache_parse@Base 3.5.0-1
- nl_cache_parse@libnl_3 3.5.0-1
- nl_cache_parse_and_add@Base 3.5.0-1
- nl_cache_parse_and_add@libnl_3 3.5.0-1
- nl_cache_pickup@Base 3.5.0-1
- nl_cache_pickup@libnl_3 3.5.0-1
- nl_cache_pickup_checkdup@Base 3.5.0-1
- nl_cache_pickup_checkdup@libnl_3 3.5.0-1
- nl_cache_put@Base 3.5.0-1
- nl_cache_put@libnl_3 3.5.0-1
- nl_cache_refill@Base 3.5.0-1
- nl_cache_refill@libnl_3 3.5.0-1
- nl_cache_remove@Base 3.5.0-1
- nl_cache_remove@libnl_3 3.5.0-1
- nl_cache_resync@Base 3.5.0-1
- nl_cache_resync@libnl_3 3.5.0-1
- nl_cache_search@Base 3.5.0-1
- nl_cache_search@libnl_3 3.5.0-1
- nl_cache_set_arg1@Base 3.5.0-1
- nl_cache_set_arg1@libnl_3 3.5.0-1
- nl_cache_set_arg2@Base 3.5.0-1
- nl_cache_set_arg2@libnl_3 3.5.0-1
- nl_cache_set_flags@Base 3.5.0-1
- nl_cache_set_flags@libnl_3 3.5.0-1
- nl_cache_subset@Base 3.5.0-1
- nl_cache_subset@libnl_3 3.5.0-1
- nl_cancel_down_bits@Base 3.5.0-1
- nl_cancel_down_bits@libnl_3 3.5.0-1
- nl_cancel_down_bytes@Base 3.5.0-1
- nl_cancel_down_bytes@libnl_3 3.5.0-1
- nl_cancel_down_us@Base 3.5.0-1
- nl_cancel_down_us@libnl_3 3.5.0-1
- nl_cb_active_type@Base 3.5.0-1
- nl_cb_active_type@libnl_3 3.5.0-1
- nl_cb_alloc@Base 3.5.0-1
- nl_cb_alloc@libnl_3 3.5.0-1
- nl_cb_clone@Base 3.5.0-1
- nl_cb_clone@libnl_3 3.5.0-1
- nl_cb_err@Base 3.5.0-1
- nl_cb_err@libnl_3 3.5.0-1
- nl_cb_get@Base 3.5.0-1
- nl_cb_get@libnl_3 3.5.0-1
- nl_cb_overwrite_recv@Base 3.5.0-1
- nl_cb_overwrite_recv@libnl_3 3.5.0-1
- nl_cb_overwrite_recvmsgs@Base 3.5.0-1
- nl_cb_overwrite_recvmsgs@libnl_3 3.5.0-1
- nl_cb_overwrite_send@Base 3.5.0-1
- nl_cb_overwrite_send@libnl_3 3.5.0-1
- nl_cb_put@Base 3.5.0-1
- nl_cb_put@libnl_3 3.5.0-1
- nl_cb_set@Base 3.5.0-1
- nl_cb_set@libnl_3 3.5.0-1
- nl_cb_set_all@Base 3.5.0-1
- nl_cb_set_all@libnl_3 3.5.0-1
- nl_close@Base 3.5.0-1
- nl_close@libnl_3 3.5.0-1
- nl_complete_msg@Base 3.5.0-1
- nl_complete_msg@libnl_3 3.5.0-1
- nl_connect@Base 3.5.0-1
- nl_connect@libnl_3 3.5.0-1
- nl_data_alloc@Base 3.5.0-1
- nl_data_alloc@libnl_3 3.5.0-1
- nl_data_alloc_attr@Base 3.5.0-1
- nl_data_alloc_attr@libnl_3 3.5.0-1
- nl_data_append@Base 3.5.0-1
- nl_data_append@libnl_3 3.5.0-1
- nl_data_clone@Base 3.5.0-1
- nl_data_clone@libnl_3 3.5.0-1
- nl_data_cmp@Base 3.5.0-1
- nl_data_cmp@libnl_3 3.5.0-1
- nl_data_free@Base 3.5.0-1
- nl_data_free@libnl_3 3.5.0-1
- nl_data_get@Base 3.5.0-1
- nl_data_get@libnl_3 3.5.0-1
- nl_data_get_size@Base 3.5.0-1
- nl_data_get_size@libnl_3 3.5.0-1
- nl_debug@Base 3.5.0-1
- nl_debug@libnl_3 3.5.0-1
- nl_debug_dp@Base 3.5.0-1
- nl_debug_dp@libnl_3 3.5.0-1
- nl_dump@Base 3.5.0-1
- nl_dump@libnl_3 3.5.0-1
- nl_dump_line@Base 3.5.0-1
- nl_dump_line@libnl_3 3.5.0-1
- nl_ether_proto2str@Base 3.5.0-1
- nl_ether_proto2str@libnl_3 3.5.0-1
- nl_get_psched_hz@Base 3.5.0-1
- nl_get_psched_hz@libnl_3 3.5.0-1
- nl_get_user_hz@Base 3.5.0-1
- nl_get_user_hz@libnl_3 3.5.0-1
- nl_geterror@Base 3.5.0-1
- nl_geterror@libnl_3 3.5.0-1
- nl_has_capability@Base 3.5.0-1
- nl_has_capability@libnl_3 3.5.0-1
- nl_hash@Base 3.5.0-1
- nl_hash@libnl_3 3.5.0-1
- nl_hash_any@Base 3.5.0-1
- nl_hash_any@libnl_3 3.5.0-1
- nl_hash_table_add@Base 3.5.0-1
- nl_hash_table_add@libnl_3 3.5.0-1
- nl_hash_table_alloc@Base 3.5.0-1
- nl_hash_table_alloc@libnl_3 3.5.0-1
- nl_hash_table_del@Base 3.5.0-1
- nl_hash_table_del@libnl_3 3.5.0-1
- nl_hash_table_free@Base 3.5.0-1
- nl_hash_table_free@libnl_3 3.5.0-1
- nl_hash_table_lookup@Base 3.5.0-1
- nl_hash_table_lookup@libnl_3 3.5.0-1
- nl_ip_proto2str@Base 3.5.0-1
- nl_ip_proto2str@libnl_3 3.5.0-1
- nl_join_groups@Base 3.5.0-1
- nl_join_groups@libnl_3 3.5.0-1
- nl_llproto2str@Base 3.5.0-1
- nl_llproto2str@libnl_3 3.5.0-1
- nl_msec2str@Base 3.5.0-1
- nl_msec2str@libnl_3 3.5.0-1
- nl_msg_dump@Base 3.5.0-1
- nl_msg_dump@libnl_3 3.5.0-1
- nl_msg_parse@Base 3.5.0-1
- nl_msg_parse@libnl_3 3.5.0-1
- nl_msgtype_lookup@Base 3.5.0-1
- nl_msgtype_lookup@libnl_3 3.5.0-1
- nl_new_line@Base 3.5.0-1
- nl_new_line@libnl_3 3.5.0-1
- nl_nlfamily2str@Base 3.5.0-1
- nl_nlfamily2str@libnl_3 3.5.0-1
- nl_nlmsg_flags2str@Base 3.5.0-1
- nl_nlmsg_flags2str@libnl_3 3.5.0-1
- nl_nlmsgtype2str@Base 3.5.0-1
- nl_nlmsgtype2str@libnl_3 3.5.0-1
- nl_object_alloc@Base 3.5.0-1
- nl_object_alloc@libnl_3 3.5.0-1
- nl_object_alloc_name@Base 3.5.0-1
- nl_object_alloc_name@libnl_3 3.5.0-1
- nl_object_attr_list@Base 3.5.0-1
- nl_object_attr_list@libnl_3 3.5.0-1
- nl_object_attrs2str@Base 3.5.0-1
- nl_object_attrs2str@libnl_3 3.5.0-1
- nl_object_clone@Base 3.5.0-1
- nl_object_clone@libnl_3 3.5.0-1
- nl_object_diff64@libnl_3_2_28 3.5.0-1
- nl_object_diff@Base 3.5.0-1
- nl_object_diff@libnl_3 3.5.0-1
- nl_object_dump@Base 3.5.0-1
- nl_object_dump@libnl_3 3.5.0-1
- nl_object_dump_buf@Base 3.5.0-1
- nl_object_dump_buf@libnl_3 3.5.0-1
- nl_object_free@Base 3.5.0-1
- nl_object_free@libnl_3 3.5.0-1
- nl_object_get@Base 3.5.0-1
- nl_object_get@libnl_3 3.5.0-1
- nl_object_get_cache@Base 3.5.0-1
- nl_object_get_cache@libnl_3 3.5.0-1
- nl_object_get_id_attrs@Base 3.5.0-1
- nl_object_get_id_attrs@libnl_3 3.5.0-1
- nl_object_get_msgtype@Base 3.5.0-1
- nl_object_get_msgtype@libnl_3 3.5.0-1
- nl_object_get_ops@Base 3.5.0-1
- nl_object_get_ops@libnl_3 3.5.0-1
- nl_object_get_refcnt@Base 3.5.0-1
- nl_object_get_refcnt@libnl_3 3.5.0-1
- nl_object_get_type@Base 3.5.0-1
- nl_object_get_type@libnl_3 3.5.0-1
- nl_object_identical@Base 3.5.0-1
- nl_object_identical@libnl_3 3.5.0-1
- nl_object_is_marked@Base 3.5.0-1
- nl_object_is_marked@libnl_3 3.5.0-1
- nl_object_keygen@Base 3.5.0-1
- nl_object_keygen@libnl_3 3.5.0-1
- nl_object_mark@Base 3.5.0-1
- nl_object_mark@libnl_3 3.5.0-1
- nl_object_match_filter@Base 3.5.0-1
- nl_object_match_filter@libnl_3 3.5.0-1
- nl_object_put@Base 3.5.0-1
- nl_object_put@libnl_3 3.5.0-1
- nl_object_shared@Base 3.5.0-1
- nl_object_shared@libnl_3 3.5.0-1
- nl_object_unmark@Base 3.5.0-1
- nl_object_unmark@libnl_3 3.5.0-1
- nl_object_update@Base 3.5.0-1
- nl_object_update@libnl_3 3.5.0-1
- nl_perror@Base 3.5.0-1
- nl_perror@libnl_3 3.5.0-1
- nl_pickup@Base 3.5.0-1
- nl_pickup@libnl_3 3.5.0-1
- nl_pickup_keep_syserr@Base 3.5.0-1
- nl_pickup_keep_syserr@libnl_3 3.5.0-1
- nl_prob2int@Base 3.5.0-1
- nl_prob2int@libnl_3 3.5.0-1
- nl_rate2str@Base 3.5.0-1
- nl_rate2str@libnl_3 3.5.0-1
- nl_recv@Base 3.5.0-1
- nl_recv@libnl_3 3.5.0-1
- nl_recvmsgs@Base 3.5.0-1
- nl_recvmsgs@libnl_3 3.5.0-1
- nl_recvmsgs_default@Base 3.5.0-1
- nl_recvmsgs_default@libnl_3 3.5.0-1
- nl_recvmsgs_report@Base 3.5.0-1
- nl_recvmsgs_report@libnl_3 3.5.0-1
- nl_send@Base 3.5.0-1
- nl_send@libnl_3 3.5.0-1
- nl_send_auto@Base 3.5.0-1
- nl_send_auto@libnl_3 3.5.0-1
- nl_send_auto_complete@Base 3.5.0-1
- nl_send_auto_complete@libnl_3 3.5.0-1
- nl_send_iovec@Base 3.5.0-1
- nl_send_iovec@libnl_3 3.5.0-1
- nl_send_simple@Base 3.5.0-1
- nl_send_simple@libnl_3 3.5.0-1
- nl_send_sync@Base 3.5.0-1
- nl_send_sync@libnl_3 3.5.0-1
- nl_sendmsg@Base 3.5.0-1
- nl_sendmsg@libnl_3 3.5.0-1
- nl_sendto@Base 3.5.0-1
- nl_sendto@libnl_3 3.5.0-1
- nl_size2int@Base 3.5.0-1
- nl_size2int@libnl_3 3.5.0-1
- nl_size2str@Base 3.5.0-1
- nl_size2str@libnl_3 3.5.0-1
- nl_socket_add_membership@Base 3.5.0-1
- nl_socket_add_membership@libnl_3 3.5.0-1
- nl_socket_add_memberships@Base 3.5.0-1
- nl_socket_add_memberships@libnl_3 3.5.0-1
- nl_socket_alloc@Base 3.5.0-1
- nl_socket_alloc@libnl_3 3.5.0-1
- nl_socket_alloc_cb@Base 3.5.0-1
- nl_socket_alloc_cb@libnl_3 3.5.0-1
- nl_socket_disable_auto_ack@Base 3.5.0-1
- nl_socket_disable_auto_ack@libnl_3 3.5.0-1
- nl_socket_disable_msg_peek@Base 3.5.0-1
- nl_socket_disable_msg_peek@libnl_3 3.5.0-1
- nl_socket_disable_seq_check@Base 3.5.0-1
- nl_socket_disable_seq_check@libnl_3 3.5.0-1
- nl_socket_drop_membership@Base 3.5.0-1
- nl_socket_drop_membership@libnl_3 3.5.0-1
- nl_socket_drop_memberships@Base 3.5.0-1
- nl_socket_drop_memberships@libnl_3 3.5.0-1
- nl_socket_enable_auto_ack@Base 3.5.0-1
- nl_socket_enable_auto_ack@libnl_3 3.5.0-1
- nl_socket_enable_msg_peek@Base 3.5.0-1
- nl_socket_enable_msg_peek@libnl_3 3.5.0-1
- nl_socket_free@Base 3.5.0-1
- nl_socket_free@libnl_3 3.5.0-1
- nl_socket_get_cb@Base 3.5.0-1
- nl_socket_get_cb@libnl_3 3.5.0-1
- nl_socket_get_fd@Base 3.5.0-1
- nl_socket_get_fd@libnl_3 3.5.0-1
- nl_socket_get_local_port@Base 3.5.0-1
- nl_socket_get_local_port@libnl_3 3.5.0-1
- nl_socket_get_msg_buf_size@Base 3.5.0-1
- nl_socket_get_msg_buf_size@libnl_3 3.5.0-1
- nl_socket_get_peer_groups@Base 3.5.0-1
- nl_socket_get_peer_groups@libnl_3 3.5.0-1
- nl_socket_get_peer_port@Base 3.5.0-1
- nl_socket_get_peer_port@libnl_3 3.5.0-1
- nl_socket_modify_cb@Base 3.5.0-1
- nl_socket_modify_cb@libnl_3 3.5.0-1
- nl_socket_modify_err_cb@Base 3.5.0-1
- nl_socket_modify_err_cb@libnl_3 3.5.0-1
- nl_socket_recv_pktinfo@Base 3.5.0-1
- nl_socket_recv_pktinfo@libnl_3 3.5.0-1
- nl_socket_set_buffer_size@Base 3.5.0-1
- nl_socket_set_buffer_size@libnl_3 3.5.0-1
- nl_socket_set_cb@Base 3.5.0-1
- nl_socket_set_cb@libnl_3 3.5.0-1
- nl_socket_set_fd@Base 3.5.0-1
- nl_socket_set_fd@libnl_3_2_26 3.5.0-1
- nl_socket_set_local_port@Base 3.5.0-1
- nl_socket_set_local_port@libnl_3 3.5.0-1
- nl_socket_set_msg_buf_size@Base 3.5.0-1
- nl_socket_set_msg_buf_size@libnl_3 3.5.0-1
- nl_socket_set_nonblocking@Base 3.5.0-1
- nl_socket_set_nonblocking@libnl_3 3.5.0-1
- nl_socket_set_passcred@Base 3.5.0-1
- nl_socket_set_passcred@libnl_3 3.5.0-1
- nl_socket_set_peer_groups@Base 3.5.0-1
- nl_socket_set_peer_groups@libnl_3 3.5.0-1
- nl_socket_set_peer_port@Base 3.5.0-1
- nl_socket_set_peer_port@libnl_3 3.5.0-1
- nl_socket_use_seq@Base 3.5.0-1
- nl_socket_use_seq@libnl_3 3.5.0-1
- nl_str2af@Base 3.5.0-1
- nl_str2af@libnl_3 3.5.0-1
- nl_str2ether_proto@Base 3.5.0-1
- nl_str2ether_proto@libnl_3 3.5.0-1
- nl_str2ip_proto@Base 3.5.0-1
- nl_str2ip_proto@libnl_3 3.5.0-1
- nl_str2llproto@Base 3.5.0-1
- nl_str2llproto@libnl_3 3.5.0-1
- nl_str2msec@Base 3.5.0-1
- nl_str2msec@libnl_3 3.5.0-1
- nl_str2nlfamily@Base 3.5.0-1
- nl_str2nlfamily@libnl_3 3.5.0-1
- nl_str2nlmsgtype@Base 3.5.0-1
- nl_str2nlmsgtype@libnl_3 3.5.0-1
- nl_strerror_l@libnl_3_2_29 3.5.0-1
- nl_syserr2nlerr@Base 3.5.0-1
- nl_syserr2nlerr@libnl_3 3.5.0-1
- nl_ticks2us@Base 3.5.0-1
- nl_ticks2us@libnl_3 3.5.0-1
- nl_us2ticks@Base 3.5.0-1
- nl_us2ticks@libnl_3 3.5.0-1
- nl_ver_maj@Base 3.5.0-1
- nl_ver_maj@libnl_3 3.5.0-1
- nl_ver_mic@Base 3.5.0-1
- nl_ver_mic@libnl_3 3.5.0-1
- nl_ver_min@Base 3.5.0-1
- nl_ver_min@libnl_3 3.5.0-1
- nl_ver_num@Base 3.5.0-1
- nl_ver_num@libnl_3 3.5.0-1
- nl_wait_for_ack@Base 3.5.0-1
- nl_wait_for_ack@libnl_3 3.5.0-1
- nla_attr_size@Base 3.5.0-1
- nla_attr_size@libnl_3 3.5.0-1
- nla_data@Base 3.5.0-1
- nla_data@libnl_3 3.5.0-1
- nla_find@Base 3.5.0-1
- nla_find@libnl_3 3.5.0-1
- nla_get_flag@Base 3.5.0-1
- nla_get_flag@libnl_3 3.5.0-1
- nla_get_msecs@Base 3.5.0-1
- nla_get_msecs@libnl_3 3.5.0-1
- nla_get_s16@Base 3.5.0-1
- nla_get_s16@libnl_3_2_27 3.5.0-1
- nla_get_s32@Base 3.5.0-1
- nla_get_s32@libnl_3_2_27 3.5.0-1
- nla_get_s64@Base 3.5.0-1
- nla_get_s64@libnl_3_2_27 3.5.0-1
- nla_get_s8@Base 3.5.0-1
- nla_get_s8@libnl_3_2_27 3.5.0-1
- nla_get_string@Base 3.5.0-1
- nla_get_string@libnl_3 3.5.0-1
- nla_get_u16@Base 3.5.0-1
- nla_get_u16@libnl_3 3.5.0-1
- nla_get_u32@Base 3.5.0-1
- nla_get_u32@libnl_3 3.5.0-1
- nla_get_u64@Base 3.5.0-1
- nla_get_u64@libnl_3 3.5.0-1
- nla_get_u8@Base 3.5.0-1
- nla_get_u8@libnl_3 3.5.0-1
- nla_is_nested@Base 3.5.0-1
- nla_is_nested@libnl_3 3.5.0-1
- nla_len@Base 3.5.0-1
- nla_len@libnl_3 3.5.0-1
- nla_memcmp@Base 3.5.0-1
- nla_memcmp@libnl_3 3.5.0-1
- nla_memcpy@Base 3.5.0-1
- nla_memcpy@libnl_3 3.5.0-1
- nla_nest_cancel@Base 3.5.0-1
- nla_nest_cancel@libnl_3 3.5.0-1
- nla_nest_end@Base 3.5.0-1
- nla_nest_end@libnl_3 3.5.0-1
- nla_nest_end_keep_empty@libnl_3_5 3.5.0-1
- nla_nest_start@Base 3.5.0-1
- nla_nest_start@libnl_3 3.5.0-1
- nla_next@Base 3.5.0-1
- nla_next@libnl_3 3.5.0-1
- nla_ok@Base 3.5.0-1
- nla_ok@libnl_3 3.5.0-1
- nla_padlen@Base 3.5.0-1
- nla_padlen@libnl_3 3.5.0-1
- nla_parse@Base 3.5.0-1
- nla_parse@libnl_3 3.5.0-1
- nla_parse_nested@Base 3.5.0-1
- nla_parse_nested@libnl_3 3.5.0-1
- nla_put@Base 3.5.0-1
- nla_put@libnl_3 3.5.0-1
- nla_put_addr@Base 3.5.0-1
- nla_put_addr@libnl_3 3.5.0-1
- nla_put_data@Base 3.5.0-1
- nla_put_data@libnl_3 3.5.0-1
- nla_put_flag@Base 3.5.0-1
- nla_put_flag@libnl_3 3.5.0-1
- nla_put_msecs@Base 3.5.0-1
- nla_put_msecs@libnl_3 3.5.0-1
- nla_put_nested@Base 3.5.0-1
- nla_put_nested@libnl_3 3.5.0-1
- nla_put_s16@Base 3.5.0-1
- nla_put_s16@libnl_3_2_27 3.5.0-1
- nla_put_s32@Base 3.5.0-1
- nla_put_s32@libnl_3_2_27 3.5.0-1
- nla_put_s64@Base 3.5.0-1
- nla_put_s64@libnl_3_2_27 3.5.0-1
- nla_put_s8@Base 3.5.0-1
- nla_put_s8@libnl_3_2_27 3.5.0-1
- nla_put_string@Base 3.5.0-1
- nla_put_string@libnl_3 3.5.0-1
- nla_put_u16@Base 3.5.0-1
- nla_put_u16@libnl_3 3.5.0-1
- nla_put_u32@Base 3.5.0-1
- nla_put_u32@libnl_3 3.5.0-1
- nla_put_u64@Base 3.5.0-1
- nla_put_u64@libnl_3 3.5.0-1
- nla_put_u8@Base 3.5.0-1
- nla_put_u8@libnl_3 3.5.0-1
- nla_reserve@Base 3.5.0-1
- nla_reserve@libnl_3 3.5.0-1
- nla_strcmp@Base 3.5.0-1
- nla_strcmp@libnl_3 3.5.0-1
- nla_strdup@Base 3.5.0-1
- nla_strdup@libnl_3 3.5.0-1
- nla_strlcpy@Base 3.5.0-1
- nla_strlcpy@libnl_3 3.5.0-1
- nla_total_size@Base 3.5.0-1
- nla_total_size@libnl_3 3.5.0-1
- nla_type@Base 3.5.0-1
- nla_type@libnl_3 3.5.0-1
- nla_validate@Base 3.5.0-1
- nla_validate@libnl_3 3.5.0-1
- nlmsg_alloc@Base 3.5.0-1
- nlmsg_alloc@libnl_3 3.5.0-1
- nlmsg_alloc_simple@Base 3.5.0-1
- nlmsg_alloc_simple@libnl_3 3.5.0-1
- nlmsg_alloc_size@Base 3.5.0-1
- nlmsg_alloc_size@libnl_3 3.5.0-1
- nlmsg_append@Base 3.5.0-1
- nlmsg_append@libnl_3 3.5.0-1
- nlmsg_attrdata@Base 3.5.0-1
- nlmsg_attrdata@libnl_3 3.5.0-1
- nlmsg_attrlen@Base 3.5.0-1
- nlmsg_attrlen@libnl_3 3.5.0-1
- nlmsg_convert@Base 3.5.0-1
- nlmsg_convert@libnl_3 3.5.0-1
- nlmsg_data@Base 3.5.0-1
- nlmsg_data@libnl_3 3.5.0-1
- nlmsg_datalen@Base 3.5.0-1
- nlmsg_datalen@libnl_3 3.5.0-1
- nlmsg_expand@Base 3.5.0-1
- nlmsg_expand@libnl_3 3.5.0-1
- nlmsg_find_attr@Base 3.5.0-1
- nlmsg_find_attr@libnl_3 3.5.0-1
- nlmsg_free@Base 3.5.0-1
- nlmsg_free@libnl_3 3.5.0-1
- nlmsg_get@Base 3.5.0-1
- nlmsg_get@libnl_3 3.5.0-1
- nlmsg_get_creds@Base 3.5.0-1
- nlmsg_get_creds@libnl_3 3.5.0-1
- nlmsg_get_dst@Base 3.5.0-1
- nlmsg_get_dst@libnl_3 3.5.0-1
- nlmsg_get_max_size@Base 3.5.0-1
- nlmsg_get_max_size@libnl_3 3.5.0-1
- nlmsg_get_proto@Base 3.5.0-1
- nlmsg_get_proto@libnl_3 3.5.0-1
- nlmsg_get_src@Base 3.5.0-1
- nlmsg_get_src@libnl_3 3.5.0-1
- nlmsg_hdr@Base 3.5.0-1
- nlmsg_hdr@libnl_3 3.5.0-1
- nlmsg_inherit@Base 3.5.0-1
- nlmsg_inherit@libnl_3 3.5.0-1
- nlmsg_next@Base 3.5.0-1
- nlmsg_next@libnl_3 3.5.0-1
- nlmsg_ok@Base 3.5.0-1
- nlmsg_ok@libnl_3 3.5.0-1
- nlmsg_padlen@Base 3.5.0-1
- nlmsg_padlen@libnl_3 3.5.0-1
- nlmsg_parse@Base 3.5.0-1
- nlmsg_parse@libnl_3 3.5.0-1
- nlmsg_put@Base 3.5.0-1
- nlmsg_put@libnl_3 3.5.0-1
- nlmsg_reserve@Base 3.5.0-1
- nlmsg_reserve@libnl_3 3.5.0-1
- nlmsg_set_creds@Base 3.5.0-1
- nlmsg_set_creds@libnl_3 3.5.0-1
- nlmsg_set_default_size@Base 3.5.0-1
- nlmsg_set_default_size@libnl_3 3.5.0-1
- nlmsg_set_dst@Base 3.5.0-1
- nlmsg_set_dst@libnl_3 3.5.0-1
- nlmsg_set_proto@Base 3.5.0-1
- nlmsg_set_proto@libnl_3 3.5.0-1
- nlmsg_set_src@Base 3.5.0-1
- nlmsg_set_src@libnl_3 3.5.0-1
- nlmsg_size@Base 3.5.0-1
- nlmsg_size@libnl_3 3.5.0-1
- nlmsg_tail@Base 3.5.0-1
- nlmsg_tail@libnl_3 3.5.0-1
- nlmsg_total_size@Base 3.5.0-1
- nlmsg_total_size@libnl_3 3.5.0-1
- nlmsg_valid_hdr@Base 3.5.0-1
- nlmsg_valid_hdr@libnl_3 3.5.0-1
- nlmsg_validate@Base 3.5.0-1
- nlmsg_validate@libnl_3 3.5.0-1
diff --git a/src/libnl3/debian/libnl-3-dev.install b/src/libnl3/debian/libnl-3-dev.install
deleted file mode 100755
index 3715b8b22bbd..000000000000
--- a/src/libnl3/debian/libnl-3-dev.install
+++ /dev/null
@@ -1,5 +0,0 @@
-#!/usr/bin/dh-exec
-debian/tmp/usr/include/*
-debian/tmp/usr/lib/*/pkgconfig/libnl-3*
-debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-3.so lib/${DEB_HOST_MULTIARCH}/
-debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-3.a lib/${DEB_HOST_MULTIARCH}/
diff --git a/src/libnl3/debian/libnl-cli-3-200.install b/src/libnl3/debian/libnl-cli-3-200.install
deleted file mode 100755
index 6735ec9d14b1..000000000000
--- a/src/libnl3/debian/libnl-cli-3-200.install
+++ /dev/null
@@ -1,4 +0,0 @@
-#!/usr/bin/dh-exec
-debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-cli-3*.so.*
-debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl/cli/cls/*.so usr/lib/${DEB_HOST_MULTIARCH}/libnl-3/cli/cls
-debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl/cli/qdisc/*.so usr/lib/${DEB_HOST_MULTIARCH}/libnl-3/cli/qdisc
diff --git a/src/libnl3/debian/libnl-cli-3-200.symbols b/src/libnl3/debian/libnl-cli-3-200.symbols
deleted file mode 100644
index 2d21c139623c..000000000000
--- a/src/libnl3/debian/libnl-cli-3-200.symbols
+++ /dev/null
@@ -1,226 +0,0 @@
-basic.so libnl-cli-3-200 #MINVER#
-bfifo.so libnl-cli-3-200 #MINVER#
-blackhole.so libnl-cli-3-200 #MINVER#
-cgroup.so libnl-cli-3-200 #MINVER#
-fq_codel.so libnl-cli-3-200 #MINVER#
-hfsc.so libnl-cli-3-200 #MINVER#
-htb.so libnl-cli-3-200 #MINVER#
-ingress.so libnl-cli-3-200 #MINVER#
-libnl-cli-3.so.200 libnl-cli-3-200 #MINVER#
- libnl_3@libnl_3 3.5.0-1
- libnl_3_2_28@libnl_3_2_28 3.5.0-1
- nl_cli_addr_alloc@Base 3.5.0-1
- nl_cli_addr_alloc@libnl_3 3.5.0-1
- nl_cli_addr_parse@Base 3.5.0-1
- nl_cli_addr_parse@libnl_3 3.5.0-1
- nl_cli_addr_parse_broadcast@Base 3.5.0-1
- nl_cli_addr_parse_broadcast@libnl_3 3.5.0-1
- nl_cli_addr_parse_dev@Base 3.5.0-1
- nl_cli_addr_parse_dev@libnl_3 3.5.0-1
- nl_cli_addr_parse_family@Base 3.5.0-1
- nl_cli_addr_parse_family@libnl_3 3.5.0-1
- nl_cli_addr_parse_label@Base 3.5.0-1
- nl_cli_addr_parse_label@libnl_3 3.5.0-1
- nl_cli_addr_parse_local@Base 3.5.0-1
- nl_cli_addr_parse_local@libnl_3 3.5.0-1
- nl_cli_addr_parse_peer@Base 3.5.0-1
- nl_cli_addr_parse_peer@libnl_3 3.5.0-1
- nl_cli_addr_parse_preferred@Base 3.5.0-1
- nl_cli_addr_parse_preferred@libnl_3 3.5.0-1
- nl_cli_addr_parse_scope@Base 3.5.0-1
- nl_cli_addr_parse_scope@libnl_3 3.5.0-1
- nl_cli_addr_parse_valid@Base 3.5.0-1
- nl_cli_addr_parse_valid@libnl_3 3.5.0-1
- nl_cli_alloc_cache@Base 3.5.0-1
- nl_cli_alloc_cache@libnl_3 3.5.0-1
- nl_cli_alloc_cache_flags@libnl_3_2_28 3.5.0-1
- nl_cli_alloc_socket@Base 3.5.0-1
- nl_cli_alloc_socket@libnl_3 3.5.0-1
- nl_cli_class_alloc@Base 3.5.0-1
- nl_cli_class_alloc@libnl_3 3.5.0-1
- nl_cli_class_alloc_cache@Base 3.5.0-1
- nl_cli_class_alloc_cache@libnl_3 3.5.0-1
- nl_cli_cls_alloc@Base 3.5.0-1
- nl_cli_cls_alloc@libnl_3 3.5.0-1
- nl_cli_cls_alloc_cache@Base 3.5.0-1
- nl_cli_cls_alloc_cache@libnl_3 3.5.0-1
- nl_cli_cls_parse_ematch@Base 3.5.0-1
- nl_cli_cls_parse_ematch@libnl_3 3.5.0-1
- nl_cli_cls_parse_proto@Base 3.5.0-1
- nl_cli_cls_parse_proto@libnl_3 3.5.0-1
- nl_cli_confirm@Base 3.5.0-1
- nl_cli_confirm@libnl_3 3.5.0-1
- nl_cli_connect@Base 3.5.0-1
- nl_cli_connect@libnl_3 3.5.0-1
- nl_cli_ct_alloc@Base 3.5.0-1
- nl_cli_ct_alloc@libnl_3 3.5.0-1
- nl_cli_ct_alloc_cache@Base 3.5.0-1
- nl_cli_ct_alloc_cache@libnl_3 3.5.0-1
- nl_cli_ct_parse_dst@Base 3.5.0-1
- nl_cli_ct_parse_dst@libnl_3 3.5.0-1
- nl_cli_ct_parse_dst_port@Base 3.5.0-1
- nl_cli_ct_parse_dst_port@libnl_3 3.5.0-1
- nl_cli_ct_parse_family@Base 3.5.0-1
- nl_cli_ct_parse_family@libnl_3 3.5.0-1
- nl_cli_ct_parse_id@Base 3.5.0-1
- nl_cli_ct_parse_id@libnl_3 3.5.0-1
- nl_cli_ct_parse_mark@Base 3.5.0-1
- nl_cli_ct_parse_mark@libnl_3 3.5.0-1
- nl_cli_ct_parse_protocol@Base 3.5.0-1
- nl_cli_ct_parse_protocol@libnl_3 3.5.0-1
- nl_cli_ct_parse_src@Base 3.5.0-1
- nl_cli_ct_parse_src@libnl_3 3.5.0-1
- nl_cli_ct_parse_src_port@Base 3.5.0-1
- nl_cli_ct_parse_src_port@libnl_3 3.5.0-1
- nl_cli_ct_parse_status@Base 3.5.0-1
- nl_cli_ct_parse_status@libnl_3 3.5.0-1
- nl_cli_ct_parse_tcp_state@Base 3.5.0-1
- nl_cli_ct_parse_tcp_state@libnl_3 3.5.0-1
- nl_cli_ct_parse_timeout@Base 3.5.0-1
- nl_cli_ct_parse_timeout@libnl_3 3.5.0-1
- nl_cli_ct_parse_use@Base 3.5.0-1
- nl_cli_ct_parse_use@libnl_3 3.5.0-1
- nl_cli_ct_parse_zone@Base 3.5.0-1
- nl_cli_ct_parse_zone@libnl_3 3.5.0-1
- nl_cli_exp_alloc@Base 3.5.0-1
- nl_cli_exp_alloc@libnl_3 3.5.0-1
- nl_cli_exp_alloc_cache@Base 3.5.0-1
- nl_cli_exp_alloc_cache@libnl_3 3.5.0-1
- nl_cli_exp_parse_class@Base 3.5.0-1
- nl_cli_exp_parse_class@libnl_3 3.5.0-1
- nl_cli_exp_parse_dst@Base 3.5.0-1
- nl_cli_exp_parse_dst@libnl_3 3.5.0-1
- nl_cli_exp_parse_dst_port@Base 3.5.0-1
- nl_cli_exp_parse_dst_port@libnl_3 3.5.0-1
- nl_cli_exp_parse_family@Base 3.5.0-1
- nl_cli_exp_parse_family@libnl_3 3.5.0-1
- nl_cli_exp_parse_flags@Base 3.5.0-1
- nl_cli_exp_parse_flags@libnl_3 3.5.0-1
- nl_cli_exp_parse_fn@Base 3.5.0-1
- nl_cli_exp_parse_fn@libnl_3 3.5.0-1
- nl_cli_exp_parse_helper_name@Base 3.5.0-1
- nl_cli_exp_parse_helper_name@libnl_3 3.5.0-1
- nl_cli_exp_parse_icmp_code@Base 3.5.0-1
- nl_cli_exp_parse_icmp_code@libnl_3 3.5.0-1
- nl_cli_exp_parse_icmp_id@Base 3.5.0-1
- nl_cli_exp_parse_icmp_id@libnl_3 3.5.0-1
- nl_cli_exp_parse_icmp_type@Base 3.5.0-1
- nl_cli_exp_parse_icmp_type@libnl_3 3.5.0-1
- nl_cli_exp_parse_id@Base 3.5.0-1
- nl_cli_exp_parse_id@libnl_3 3.5.0-1
- nl_cli_exp_parse_l4protonum@Base 3.5.0-1
- nl_cli_exp_parse_l4protonum@libnl_3 3.5.0-1
- nl_cli_exp_parse_nat_dir@Base 3.5.0-1
- nl_cli_exp_parse_nat_dir@libnl_3 3.5.0-1
- nl_cli_exp_parse_src@Base 3.5.0-1
- nl_cli_exp_parse_src@libnl_3 3.5.0-1
- nl_cli_exp_parse_src_port@Base 3.5.0-1
- nl_cli_exp_parse_src_port@libnl_3 3.5.0-1
- nl_cli_exp_parse_timeout@Base 3.5.0-1
- nl_cli_exp_parse_timeout@libnl_3 3.5.0-1
- nl_cli_exp_parse_zone@Base 3.5.0-1
- nl_cli_exp_parse_zone@libnl_3 3.5.0-1
- nl_cli_fatal@Base 3.5.0-1
- nl_cli_fatal@libnl_3 3.5.0-1
- nl_cli_link_alloc@Base 3.5.0-1
- nl_cli_link_alloc@libnl_3 3.5.0-1
- nl_cli_link_alloc_cache@Base 3.5.0-1
- nl_cli_link_alloc_cache@libnl_3 3.5.0-1
- nl_cli_link_alloc_cache_family@Base 3.5.0-1
- nl_cli_link_alloc_cache_family@libnl_3 3.5.0-1
- nl_cli_link_alloc_cache_family_flags@libnl_3_2_28 3.5.0-1
- nl_cli_link_alloc_cache_flags@libnl_3_2_28 3.5.0-1
- nl_cli_link_parse_family@Base 3.5.0-1
- nl_cli_link_parse_family@libnl_3 3.5.0-1
- nl_cli_link_parse_ifalias@Base 3.5.0-1
- nl_cli_link_parse_ifalias@libnl_3 3.5.0-1
- nl_cli_link_parse_ifindex@Base 3.5.0-1
- nl_cli_link_parse_ifindex@libnl_3 3.5.0-1
- nl_cli_link_parse_mtu@Base 3.5.0-1
- nl_cli_link_parse_mtu@libnl_3 3.5.0-1
- nl_cli_link_parse_name@Base 3.5.0-1
- nl_cli_link_parse_name@libnl_3 3.5.0-1
- nl_cli_link_parse_txqlen@Base 3.5.0-1
- nl_cli_link_parse_txqlen@libnl_3 3.5.0-1
- nl_cli_link_parse_weight@Base 3.5.0-1
- nl_cli_link_parse_weight@libnl_3 3.5.0-1
- nl_cli_load_module@Base 3.5.0-1
- nl_cli_load_module@libnl_3 3.5.0-1
- nl_cli_neigh_alloc@Base 3.5.0-1
- nl_cli_neigh_alloc@libnl_3 3.5.0-1
- nl_cli_neigh_parse_dev@Base 3.5.0-1
- nl_cli_neigh_parse_dev@libnl_3 3.5.0-1
- nl_cli_neigh_parse_dst@Base 3.5.0-1
- nl_cli_neigh_parse_dst@libnl_3 3.5.0-1
- nl_cli_neigh_parse_family@Base 3.5.0-1
- nl_cli_neigh_parse_family@libnl_3 3.5.0-1
- nl_cli_neigh_parse_lladdr@Base 3.5.0-1
- nl_cli_neigh_parse_lladdr@libnl_3 3.5.0-1
- nl_cli_neigh_parse_state@Base 3.5.0-1
- nl_cli_neigh_parse_state@libnl_3 3.5.0-1
- nl_cli_parse_dumptype@Base 3.5.0-1
- nl_cli_parse_dumptype@libnl_3 3.5.0-1
- nl_cli_parse_u32@Base 3.5.0-1
- nl_cli_parse_u32@libnl_3 3.5.0-1
- nl_cli_print_version@Base 3.5.0-1
- nl_cli_print_version@libnl_3 3.5.0-1
- nl_cli_qdisc_alloc@Base 3.5.0-1
- nl_cli_qdisc_alloc@libnl_3 3.5.0-1
- nl_cli_route_alloc@Base 3.5.0-1
- nl_cli_route_alloc@libnl_3 3.5.0-1
- nl_cli_route_alloc_cache@Base 3.5.0-1
- nl_cli_route_alloc_cache@libnl_3 3.5.0-1
- nl_cli_route_parse_dst@Base 3.5.0-1
- nl_cli_route_parse_dst@libnl_3 3.5.0-1
- nl_cli_route_parse_family@Base 3.5.0-1
- nl_cli_route_parse_family@libnl_3 3.5.0-1
- nl_cli_route_parse_iif@Base 3.5.0-1
- nl_cli_route_parse_iif@libnl_3 3.5.0-1
- nl_cli_route_parse_metric@Base 3.5.0-1
- nl_cli_route_parse_metric@libnl_3 3.5.0-1
- nl_cli_route_parse_nexthop@Base 3.5.0-1
- nl_cli_route_parse_nexthop@libnl_3 3.5.0-1
- nl_cli_route_parse_pref_src@Base 3.5.0-1
- nl_cli_route_parse_pref_src@libnl_3 3.5.0-1
- nl_cli_route_parse_prio@Base 3.5.0-1
- nl_cli_route_parse_prio@libnl_3 3.5.0-1
- nl_cli_route_parse_protocol@Base 3.5.0-1
- nl_cli_route_parse_protocol@libnl_3 3.5.0-1
- nl_cli_route_parse_scope@Base 3.5.0-1
- nl_cli_route_parse_scope@libnl_3 3.5.0-1
- nl_cli_route_parse_src@Base 3.5.0-1
- nl_cli_route_parse_src@libnl_3 3.5.0-1
- nl_cli_route_parse_table@Base 3.5.0-1
- nl_cli_route_parse_table@libnl_3 3.5.0-1
- nl_cli_route_parse_type@Base 3.5.0-1
- nl_cli_route_parse_type@libnl_3 3.5.0-1
- nl_cli_rule_alloc@Base 3.5.0-1
- nl_cli_rule_alloc@libnl_3 3.5.0-1
- nl_cli_rule_alloc_cache@Base 3.5.0-1
- nl_cli_rule_alloc_cache@libnl_3 3.5.0-1
- nl_cli_rule_parse_family@Base 3.5.0-1
- nl_cli_rule_parse_family@libnl_3 3.5.0-1
- nl_cli_tc_lookup@Base 3.5.0-1
- nl_cli_tc_lookup@libnl_3 3.5.0-1
- nl_cli_tc_parse_dev@Base 3.5.0-1
- nl_cli_tc_parse_dev@libnl_3 3.5.0-1
- nl_cli_tc_parse_handle@Base 3.5.0-1
- nl_cli_tc_parse_handle@libnl_3 3.5.0-1
- nl_cli_tc_parse_kind@Base 3.5.0-1
- nl_cli_tc_parse_kind@libnl_3 3.5.0-1
- nl_cli_tc_parse_linktype@Base 3.5.0-1
- nl_cli_tc_parse_linktype@libnl_3 3.5.0-1
- nl_cli_tc_parse_mpu@Base 3.5.0-1
- nl_cli_tc_parse_mpu@libnl_3 3.5.0-1
- nl_cli_tc_parse_mtu@Base 3.5.0-1
- nl_cli_tc_parse_mtu@libnl_3 3.5.0-1
- nl_cli_tc_parse_overhead@Base 3.5.0-1
- nl_cli_tc_parse_overhead@libnl_3 3.5.0-1
- nl_cli_tc_parse_parent@Base 3.5.0-1
- nl_cli_tc_parse_parent@libnl_3 3.5.0-1
- nl_cli_tc_register@Base 3.5.0-1
- nl_cli_tc_register@libnl_3 3.5.0-1
- nl_cli_tc_unregister@Base 3.5.0-1
- nl_cli_tc_unregister@libnl_3 3.5.0-1
-pfifo.so libnl-cli-3-200 #MINVER#
-plug.so libnl-cli-3-200 #MINVER#
diff --git a/src/libnl3/debian/libnl-cli-3-dev.install b/src/libnl3/debian/libnl-cli-3-dev.install
deleted file mode 100644
index 66aa3b3d9457..000000000000
--- a/src/libnl3/debian/libnl-cli-3-dev.install
+++ /dev/null
@@ -1,3 +0,0 @@
-debian/tmp/usr/lib/*/pkgconfig/libnl-cli-3*
-debian/tmp/usr/lib/*/libnl-cli-3*.so
-debian/tmp/usr/lib/*/libnl-cli-3*.a
diff --git a/src/libnl3/debian/libnl-genl-3-200.install b/src/libnl3/debian/libnl-genl-3-200.install
deleted file mode 100755
index d9d6fae40b21..000000000000
--- a/src/libnl3/debian/libnl-genl-3-200.install
+++ /dev/null
@@ -1,2 +0,0 @@
-#!/usr/bin/dh-exec
-debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-genl-3*.so.* lib/${DEB_HOST_MULTIARCH}/
diff --git a/src/libnl3/debian/libnl-genl-3-200.symbols b/src/libnl3/debian/libnl-genl-3-200.symbols
deleted file mode 100644
index 0eb2e3be4460..000000000000
--- a/src/libnl3/debian/libnl-genl-3-200.symbols
+++ /dev/null
@@ -1,88 +0,0 @@
-libnl-genl-3.so.200 libnl-genl-3-200 #MINVER#
- genl_connect@Base 3.5.0-1
- genl_connect@libnl_3 3.5.0-1
- genl_ctrl_alloc_cache@Base 3.5.0-1
- genl_ctrl_alloc_cache@libnl_3 3.5.0-1
- genl_ctrl_resolve@Base 3.5.0-1
- genl_ctrl_resolve@libnl_3 3.5.0-1
- genl_ctrl_resolve_grp@Base 3.5.0-1
- genl_ctrl_resolve_grp@libnl_3 3.5.0-1
- genl_ctrl_search@Base 3.5.0-1
- genl_ctrl_search@libnl_3 3.5.0-1
- genl_ctrl_search_by_name@Base 3.5.0-1
- genl_ctrl_search_by_name@libnl_3 3.5.0-1
- genl_family_add_grp@Base 3.5.0-1
- genl_family_add_grp@libnl_3 3.5.0-1
- genl_family_add_op@Base 3.5.0-1
- genl_family_add_op@libnl_3 3.5.0-1
- genl_family_alloc@Base 3.5.0-1
- genl_family_alloc@libnl_3 3.5.0-1
- genl_family_get_hdrsize@Base 3.5.0-1
- genl_family_get_hdrsize@libnl_3 3.5.0-1
- genl_family_get_id@Base 3.5.0-1
- genl_family_get_id@libnl_3 3.5.0-1
- genl_family_get_maxattr@Base 3.5.0-1
- genl_family_get_maxattr@libnl_3 3.5.0-1
- genl_family_get_name@Base 3.5.0-1
- genl_family_get_name@libnl_3 3.5.0-1
- genl_family_get_version@Base 3.5.0-1
- genl_family_get_version@libnl_3 3.5.0-1
- genl_family_ops@Base 3.5.0-1
- genl_family_ops@libnl_3 3.5.0-1
- genl_family_put@Base 3.5.0-1
- genl_family_put@libnl_3 3.5.0-1
- genl_family_set_hdrsize@Base 3.5.0-1
- genl_family_set_hdrsize@libnl_3 3.5.0-1
- genl_family_set_id@Base 3.5.0-1
- genl_family_set_id@libnl_3 3.5.0-1
- genl_family_set_maxattr@Base 3.5.0-1
- genl_family_set_maxattr@libnl_3 3.5.0-1
- genl_family_set_name@Base 3.5.0-1
- genl_family_set_name@libnl_3 3.5.0-1
- genl_family_set_version@Base 3.5.0-1
- genl_family_set_version@libnl_3 3.5.0-1
- genl_handle_msg@Base 3.5.0-1
- genl_handle_msg@libnl_3 3.5.0-1
- genl_mngt_resolve@Base 3.5.0-1
- genl_mngt_resolve@libnl_3 3.5.0-1
- genl_op2name@Base 3.5.0-1
- genl_op2name@libnl_3 3.5.0-1
- genl_ops_resolve@Base 3.5.0-1
- genl_ops_resolve@libnl_3 3.5.0-1
- genl_register@Base 3.5.0-1
- genl_register@libnl_3 3.5.0-1
- genl_register_family@Base 3.5.0-1
- genl_register_family@libnl_3 3.5.0-1
- genl_resolve_id@Base 3.5.0-1
- genl_resolve_id@libnl_3 3.5.0-1
- genl_send_simple@Base 3.5.0-1
- genl_send_simple@libnl_3 3.5.0-1
- genl_unregister@Base 3.5.0-1
- genl_unregister@libnl_3 3.5.0-1
- genl_unregister_family@Base 3.5.0-1
- genl_unregister_family@libnl_3 3.5.0-1
- genlmsg_attrdata@Base 3.5.0-1
- genlmsg_attrdata@libnl_3 3.5.0-1
- genlmsg_attrlen@Base 3.5.0-1
- genlmsg_attrlen@libnl_3 3.5.0-1
- genlmsg_data@Base 3.5.0-1
- genlmsg_data@libnl_3 3.5.0-1
- genlmsg_hdr@Base 3.5.0-1
- genlmsg_hdr@libnl_3 3.5.0-1
- genlmsg_len@Base 3.5.0-1
- genlmsg_len@libnl_3 3.5.0-1
- genlmsg_parse@Base 3.5.0-1
- genlmsg_parse@libnl_3 3.5.0-1
- genlmsg_put@Base 3.5.0-1
- genlmsg_put@libnl_3 3.5.0-1
- genlmsg_user_data@Base 3.5.0-1
- genlmsg_user_data@libnl_3 3.5.0-1
- genlmsg_user_datalen@Base 3.5.0-1
- genlmsg_user_datalen@libnl_3 3.5.0-1
- genlmsg_user_hdr@Base 3.5.0-1
- genlmsg_user_hdr@libnl_3 3.5.0-1
- genlmsg_valid_hdr@Base 3.5.0-1
- genlmsg_valid_hdr@libnl_3 3.5.0-1
- genlmsg_validate@Base 3.5.0-1
- genlmsg_validate@libnl_3 3.5.0-1
- libnl_3@libnl_3 3.5.0-1
diff --git a/src/libnl3/debian/libnl-genl-3-dev.install b/src/libnl3/debian/libnl-genl-3-dev.install
deleted file mode 100755
index cbc6b51ef474..000000000000
--- a/src/libnl3/debian/libnl-genl-3-dev.install
+++ /dev/null
@@ -1,4 +0,0 @@
-#!/usr/bin/dh-exec
-debian/tmp/usr/lib/*/pkgconfig/libnl-genl-3*
-debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-genl-3*.so lib/${DEB_HOST_MULTIARCH}/
-debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-genl-3*.a lib/${DEB_HOST_MULTIARCH}/
diff --git a/src/libnl3/debian/libnl-idiag-3-200.install b/src/libnl3/debian/libnl-idiag-3-200.install
deleted file mode 100644
index f6d6b8064e5f..000000000000
--- a/src/libnl3/debian/libnl-idiag-3-200.install
+++ /dev/null
@@ -1 +0,0 @@
-debian/tmp/usr/lib/*/libnl-idiag-3*.so.*
diff --git a/src/libnl3/debian/libnl-idiag-3-200.symbols b/src/libnl3/debian/libnl-idiag-3-200.symbols
deleted file mode 100644
index 13cf27c7c8ac..000000000000
--- a/src/libnl3/debian/libnl-idiag-3-200.symbols
+++ /dev/null
@@ -1,206 +0,0 @@
-libnl-idiag-3.so.200 libnl-idiag-3-200 #MINVER#
- idiagnl_attrs2str@Base 3.5.0-1
- idiagnl_attrs2str@libnl_3 3.5.0-1
- idiagnl_connect@Base 3.5.0-1
- idiagnl_connect@libnl_3 3.5.0-1
- idiagnl_exts2str@Base 3.5.0-1
- idiagnl_exts2str@libnl_3 3.5.0-1
- idiagnl_meminfo_alloc@Base 3.5.0-1
- idiagnl_meminfo_alloc@libnl_3 3.5.0-1
- idiagnl_meminfo_get@Base 3.5.0-1
- idiagnl_meminfo_get@libnl_3 3.5.0-1
- idiagnl_meminfo_get_fmem@Base 3.5.0-1
- idiagnl_meminfo_get_fmem@libnl_3 3.5.0-1
- idiagnl_meminfo_get_rmem@Base 3.5.0-1
- idiagnl_meminfo_get_rmem@libnl_3 3.5.0-1
- idiagnl_meminfo_get_tmem@Base 3.5.0-1
- idiagnl_meminfo_get_tmem@libnl_3 3.5.0-1
- idiagnl_meminfo_get_wmem@Base 3.5.0-1
- idiagnl_meminfo_get_wmem@libnl_3 3.5.0-1
- idiagnl_meminfo_obj_ops@Base 3.5.0-1
- idiagnl_meminfo_obj_ops@libnl_3 3.5.0-1
- idiagnl_meminfo_put@Base 3.5.0-1
- idiagnl_meminfo_put@libnl_3 3.5.0-1
- idiagnl_meminfo_set_fmem@Base 3.5.0-1
- idiagnl_meminfo_set_fmem@libnl_3 3.5.0-1
- idiagnl_meminfo_set_rmem@Base 3.5.0-1
- idiagnl_meminfo_set_rmem@libnl_3 3.5.0-1
- idiagnl_meminfo_set_tmem@Base 3.5.0-1
- idiagnl_meminfo_set_tmem@libnl_3 3.5.0-1
- idiagnl_meminfo_set_wmem@Base 3.5.0-1
- idiagnl_meminfo_set_wmem@libnl_3 3.5.0-1
- idiagnl_msg_alloc@Base 3.5.0-1
- idiagnl_msg_alloc@libnl_3 3.5.0-1
- idiagnl_msg_alloc_cache@Base 3.5.0-1
- idiagnl_msg_alloc_cache@libnl_3 3.5.0-1
- idiagnl_msg_get@Base 3.5.0-1
- idiagnl_msg_get@libnl_3 3.5.0-1
- idiagnl_msg_get_cong@Base 3.5.0-1
- idiagnl_msg_get_cong@libnl_3 3.5.0-1
- idiagnl_msg_get_dport@Base 3.5.0-1
- idiagnl_msg_get_dport@libnl_3 3.5.0-1
- idiagnl_msg_get_dst@Base 3.5.0-1
- idiagnl_msg_get_dst@libnl_3 3.5.0-1
- idiagnl_msg_get_expires@Base 3.5.0-1
- idiagnl_msg_get_expires@libnl_3 3.5.0-1
- idiagnl_msg_get_family@Base 3.5.0-1
- idiagnl_msg_get_family@libnl_3 3.5.0-1
- idiagnl_msg_get_ifindex@Base 3.5.0-1
- idiagnl_msg_get_ifindex@libnl_3 3.5.0-1
- idiagnl_msg_get_inode@Base 3.5.0-1
- idiagnl_msg_get_inode@libnl_3 3.5.0-1
- idiagnl_msg_get_meminfo@Base 3.5.0-1
- idiagnl_msg_get_meminfo@libnl_3 3.5.0-1
- idiagnl_msg_get_retrans@Base 3.5.0-1
- idiagnl_msg_get_retrans@libnl_3 3.5.0-1
- idiagnl_msg_get_rqueue@Base 3.5.0-1
- idiagnl_msg_get_rqueue@libnl_3 3.5.0-1
- idiagnl_msg_get_shutdown@Base 3.5.0-1
- idiagnl_msg_get_shutdown@libnl_3 3.5.0-1
- idiagnl_msg_get_sport@Base 3.5.0-1
- idiagnl_msg_get_sport@libnl_3 3.5.0-1
- idiagnl_msg_get_src@Base 3.5.0-1
- idiagnl_msg_get_src@libnl_3 3.5.0-1
- idiagnl_msg_get_state@Base 3.5.0-1
- idiagnl_msg_get_state@libnl_3 3.5.0-1
- idiagnl_msg_get_tclass@Base 3.5.0-1
- idiagnl_msg_get_tclass@libnl_3 3.5.0-1
- idiagnl_msg_get_tcpinfo@Base 3.5.0-1
- idiagnl_msg_get_tcpinfo@libnl_3 3.5.0-1
- idiagnl_msg_get_timer@Base 3.5.0-1
- idiagnl_msg_get_timer@libnl_3 3.5.0-1
- idiagnl_msg_get_tos@Base 3.5.0-1
- idiagnl_msg_get_tos@libnl_3 3.5.0-1
- idiagnl_msg_get_uid@Base 3.5.0-1
- idiagnl_msg_get_uid@libnl_3 3.5.0-1
- idiagnl_msg_get_vegasinfo@Base 3.5.0-1
- idiagnl_msg_get_vegasinfo@libnl_3 3.5.0-1
- idiagnl_msg_get_wqueue@Base 3.5.0-1
- idiagnl_msg_get_wqueue@libnl_3 3.5.0-1
- idiagnl_msg_obj_ops@Base 3.5.0-1
- idiagnl_msg_obj_ops@libnl_3 3.5.0-1
- idiagnl_msg_parse@Base 3.5.0-1
- idiagnl_msg_parse@libnl_3 3.5.0-1
- idiagnl_msg_put@Base 3.5.0-1
- idiagnl_msg_put@libnl_3 3.5.0-1
- idiagnl_msg_set_cong@Base 3.5.0-1
- idiagnl_msg_set_cong@libnl_3 3.5.0-1
- idiagnl_msg_set_dport@Base 3.5.0-1
- idiagnl_msg_set_dport@libnl_3 3.5.0-1
- idiagnl_msg_set_dst@Base 3.5.0-1
- idiagnl_msg_set_dst@libnl_3 3.5.0-1
- idiagnl_msg_set_expires@Base 3.5.0-1
- idiagnl_msg_set_expires@libnl_3 3.5.0-1
- idiagnl_msg_set_family@Base 3.5.0-1
- idiagnl_msg_set_family@libnl_3 3.5.0-1
- idiagnl_msg_set_ifindex@Base 3.5.0-1
- idiagnl_msg_set_ifindex@libnl_3 3.5.0-1
- idiagnl_msg_set_inode@Base 3.5.0-1
- idiagnl_msg_set_inode@libnl_3 3.5.0-1
- idiagnl_msg_set_meminfo@Base 3.5.0-1
- idiagnl_msg_set_meminfo@libnl_3 3.5.0-1
- idiagnl_msg_set_retrans@Base 3.5.0-1
- idiagnl_msg_set_retrans@libnl_3 3.5.0-1
- idiagnl_msg_set_rqueue@Base 3.5.0-1
- idiagnl_msg_set_rqueue@libnl_3 3.5.0-1
- idiagnl_msg_set_shutdown@Base 3.5.0-1
- idiagnl_msg_set_shutdown@libnl_3 3.5.0-1
- idiagnl_msg_set_sport@Base 3.5.0-1
- idiagnl_msg_set_sport@libnl_3 3.5.0-1
- idiagnl_msg_set_src@Base 3.5.0-1
- idiagnl_msg_set_src@libnl_3 3.5.0-1
- idiagnl_msg_set_state@Base 3.5.0-1
- idiagnl_msg_set_state@libnl_3 3.5.0-1
- idiagnl_msg_set_tclass@Base 3.5.0-1
- idiagnl_msg_set_tclass@libnl_3 3.5.0-1
- idiagnl_msg_set_tcpinfo@Base 3.5.0-1
- idiagnl_msg_set_tcpinfo@libnl_3 3.5.0-1
- idiagnl_msg_set_timer@Base 3.5.0-1
- idiagnl_msg_set_timer@libnl_3 3.5.0-1
- idiagnl_msg_set_tos@Base 3.5.0-1
- idiagnl_msg_set_tos@libnl_3 3.5.0-1
- idiagnl_msg_set_uid@Base 3.5.0-1
- idiagnl_msg_set_uid@libnl_3 3.5.0-1
- idiagnl_msg_set_vegasinfo@Base 3.5.0-1
- idiagnl_msg_set_vegasinfo@libnl_3 3.5.0-1
- idiagnl_msg_set_wqueue@Base 3.5.0-1
- idiagnl_msg_set_wqueue@libnl_3 3.5.0-1
- idiagnl_req_alloc@Base 3.5.0-1
- idiagnl_req_alloc@libnl_3 3.5.0-1
- idiagnl_req_get@Base 3.5.0-1
- idiagnl_req_get@libnl_3 3.5.0-1
- idiagnl_req_get_dbs@Base 3.5.0-1
- idiagnl_req_get_dbs@libnl_3 3.5.0-1
- idiagnl_req_get_dst@Base 3.5.0-1
- idiagnl_req_get_dst@libnl_3 3.5.0-1
- idiagnl_req_get_ext@Base 3.5.0-1
- idiagnl_req_get_ext@libnl_3 3.5.0-1
- idiagnl_req_get_family@Base 3.5.0-1
- idiagnl_req_get_family@libnl_3 3.5.0-1
- idiagnl_req_get_ifindex@Base 3.5.0-1
- idiagnl_req_get_ifindex@libnl_3 3.5.0-1
- idiagnl_req_get_src@Base 3.5.0-1
- idiagnl_req_get_src@libnl_3 3.5.0-1
- idiagnl_req_get_states@Base 3.5.0-1
- idiagnl_req_get_states@libnl_3 3.5.0-1
- idiagnl_req_obj_ops@Base 3.5.0-1
- idiagnl_req_obj_ops@libnl_3 3.5.0-1
- idiagnl_req_parse@Base 3.5.0-1
- idiagnl_req_parse@libnl_3 3.5.0-1
- idiagnl_req_put@Base 3.5.0-1
- idiagnl_req_put@libnl_3 3.5.0-1
- idiagnl_req_set_dbs@Base 3.5.0-1
- idiagnl_req_set_dbs@libnl_3 3.5.0-1
- idiagnl_req_set_dst@Base 3.5.0-1
- idiagnl_req_set_dst@libnl_3 3.5.0-1
- idiagnl_req_set_ext@Base 3.5.0-1
- idiagnl_req_set_ext@libnl_3 3.5.0-1
- idiagnl_req_set_family@Base 3.5.0-1
- idiagnl_req_set_family@libnl_3 3.5.0-1
- idiagnl_req_set_ifindex@Base 3.5.0-1
- idiagnl_req_set_ifindex@libnl_3 3.5.0-1
- idiagnl_req_set_src@Base 3.5.0-1
- idiagnl_req_set_src@libnl_3 3.5.0-1
- idiagnl_req_set_states@Base 3.5.0-1
- idiagnl_req_set_states@libnl_3 3.5.0-1
- idiagnl_send_simple@Base 3.5.0-1
- idiagnl_send_simple@libnl_3 3.5.0-1
- idiagnl_shutdown2str@Base 3.5.0-1
- idiagnl_shutdown2str@libnl_3 3.5.0-1
- idiagnl_state2str@Base 3.5.0-1
- idiagnl_state2str@libnl_3 3.5.0-1
- idiagnl_str2state@Base 3.5.0-1
- idiagnl_str2state@libnl_3 3.5.0-1
- idiagnl_str2timer@Base 3.5.0-1
- idiagnl_str2timer@libnl_3 3.5.0-1
- idiagnl_tcpopts2str@Base 3.5.0-1
- idiagnl_tcpopts2str@libnl_3 3.5.0-1
- idiagnl_tcpstate2str@Base 3.5.0-1
- idiagnl_tcpstate2str@libnl_3 3.5.0-1
- idiagnl_timer2str@Base 3.5.0-1
- idiagnl_timer2str@libnl_3 3.5.0-1
- idiagnl_vegasinfo_alloc@Base 3.5.0-1
- idiagnl_vegasinfo_alloc@libnl_3 3.5.0-1
- idiagnl_vegasinfo_get@Base 3.5.0-1
- idiagnl_vegasinfo_get@libnl_3 3.5.0-1
- idiagnl_vegasinfo_get_enabled@Base 3.5.0-1
- idiagnl_vegasinfo_get_enabled@libnl_3 3.5.0-1
- idiagnl_vegasinfo_get_minrtt@Base 3.5.0-1
- idiagnl_vegasinfo_get_minrtt@libnl_3 3.5.0-1
- idiagnl_vegasinfo_get_rtt@Base 3.5.0-1
- idiagnl_vegasinfo_get_rtt@libnl_3 3.5.0-1
- idiagnl_vegasinfo_get_rttcnt@Base 3.5.0-1
- idiagnl_vegasinfo_get_rttcnt@libnl_3 3.5.0-1
- idiagnl_vegasinfo_obj_ops@Base 3.5.0-1
- idiagnl_vegasinfo_obj_ops@libnl_3 3.5.0-1
- idiagnl_vegasinfo_put@Base 3.5.0-1
- idiagnl_vegasinfo_put@libnl_3 3.5.0-1
- idiagnl_vegasinfo_set_enabled@Base 3.5.0-1
- idiagnl_vegasinfo_set_enabled@libnl_3 3.5.0-1
- idiagnl_vegasinfo_set_minrtt@Base 3.5.0-1
- idiagnl_vegasinfo_set_minrtt@libnl_3 3.5.0-1
- idiagnl_vegasinfo_set_rtt@Base 3.5.0-1
- idiagnl_vegasinfo_set_rtt@libnl_3 3.5.0-1
- idiagnl_vegasinfo_set_rttcnt@Base 3.5.0-1
- idiagnl_vegasinfo_set_rttcnt@libnl_3 3.5.0-1
- libnl_3@libnl_3 3.5.0-1
diff --git a/src/libnl3/debian/libnl-idiag-3-dev.install b/src/libnl3/debian/libnl-idiag-3-dev.install
deleted file mode 100644
index 6f19a6e83d61..000000000000
--- a/src/libnl3/debian/libnl-idiag-3-dev.install
+++ /dev/null
@@ -1,3 +0,0 @@
-debian/tmp/usr/lib/*/pkgconfig/libnl-idiag-3*
-debian/tmp/usr/lib/*/libnl-idiag-3*.so
-debian/tmp/usr/lib/*/libnl-idiag-3*.a
diff --git a/src/libnl3/debian/libnl-nf-3-200.install b/src/libnl3/debian/libnl-nf-3-200.install
deleted file mode 100644
index 6d65611ed34e..000000000000
--- a/src/libnl3/debian/libnl-nf-3-200.install
+++ /dev/null
@@ -1 +0,0 @@
-debian/tmp/usr/lib/*/libnl-nf-3*.so.*
diff --git a/src/libnl3/debian/libnl-nf-3-200.symbols b/src/libnl3/debian/libnl-nf-3-200.symbols
deleted file mode 100644
index 2ce4d2ad0ffc..000000000000
--- a/src/libnl3/debian/libnl-nf-3-200.symbols
+++ /dev/null
@@ -1,620 +0,0 @@
-libnl-nf-3.so.200 libnl-nf-3-200 #MINVER#
- ct_obj_ops@Base 3.5.0-1
- ct_obj_ops@libnl_3 3.5.0-1
- exp_obj_ops@Base 3.5.0-1
- exp_obj_ops@libnl_3 3.5.0-1
- libnl_3@libnl_3 3.5.0-1
- log_msg_obj_ops@Base 3.5.0-1
- log_msg_obj_ops@libnl_3 3.5.0-1
- log_obj_ops@Base 3.5.0-1
- log_obj_ops@libnl_3 3.5.0-1
- nfnl_connect@Base 3.5.0-1
- nfnl_connect@libnl_3 3.5.0-1
- nfnl_ct_add@Base 3.5.0-1
- nfnl_ct_add@libnl_3 3.5.0-1
- nfnl_ct_alloc@Base 3.5.0-1
- nfnl_ct_alloc@libnl_3 3.5.0-1
- nfnl_ct_alloc_cache@Base 3.5.0-1
- nfnl_ct_alloc_cache@libnl_3 3.5.0-1
- nfnl_ct_build_add_request@Base 3.5.0-1
- nfnl_ct_build_add_request@libnl_3 3.5.0-1
- nfnl_ct_build_delete_request@Base 3.5.0-1
- nfnl_ct_build_delete_request@libnl_3 3.5.0-1
- nfnl_ct_build_query_request@Base 3.5.0-1
- nfnl_ct_build_query_request@libnl_3 3.5.0-1
- nfnl_ct_del@Base 3.5.0-1
- nfnl_ct_del@libnl_3 3.5.0-1
- nfnl_ct_dump_request@Base 3.5.0-1
- nfnl_ct_dump_request@libnl_3 3.5.0-1
- nfnl_ct_get@Base 3.5.0-1
- nfnl_ct_get@libnl_3 3.5.0-1
- nfnl_ct_get_bytes@Base 3.5.0-1
- nfnl_ct_get_bytes@libnl_3 3.5.0-1
- nfnl_ct_get_dst@Base 3.5.0-1
- nfnl_ct_get_dst@libnl_3 3.5.0-1
- nfnl_ct_get_dst_port@Base 3.5.0-1
- nfnl_ct_get_dst_port@libnl_3 3.5.0-1
- nfnl_ct_get_family@Base 3.5.0-1
- nfnl_ct_get_family@libnl_3 3.5.0-1
- nfnl_ct_get_icmp_code@Base 3.5.0-1
- nfnl_ct_get_icmp_code@libnl_3 3.5.0-1
- nfnl_ct_get_icmp_id@Base 3.5.0-1
- nfnl_ct_get_icmp_id@libnl_3 3.5.0-1
- nfnl_ct_get_icmp_type@Base 3.5.0-1
- nfnl_ct_get_icmp_type@libnl_3 3.5.0-1
- nfnl_ct_get_id@Base 3.5.0-1
- nfnl_ct_get_id@libnl_3 3.5.0-1
- nfnl_ct_get_mark@Base 3.5.0-1
- nfnl_ct_get_mark@libnl_3 3.5.0-1
- nfnl_ct_get_packets@Base 3.5.0-1
- nfnl_ct_get_packets@libnl_3 3.5.0-1
- nfnl_ct_get_proto@Base 3.5.0-1
- nfnl_ct_get_proto@libnl_3 3.5.0-1
- nfnl_ct_get_src@Base 3.5.0-1
- nfnl_ct_get_src@libnl_3 3.5.0-1
- nfnl_ct_get_src_port@Base 3.5.0-1
- nfnl_ct_get_src_port@libnl_3 3.5.0-1
- nfnl_ct_get_status@Base 3.5.0-1
- nfnl_ct_get_status@libnl_3 3.5.0-1
- nfnl_ct_get_tcp_state@Base 3.5.0-1
- nfnl_ct_get_tcp_state@libnl_3 3.5.0-1
- nfnl_ct_get_timeout@Base 3.5.0-1
- nfnl_ct_get_timeout@libnl_3 3.5.0-1
- nfnl_ct_get_timestamp@Base 3.5.0-1
- nfnl_ct_get_timestamp@libnl_3 3.5.0-1
- nfnl_ct_get_use@Base 3.5.0-1
- nfnl_ct_get_use@libnl_3 3.5.0-1
- nfnl_ct_get_zone@Base 3.5.0-1
- nfnl_ct_get_zone@libnl_3 3.5.0-1
- nfnl_ct_put@Base 3.5.0-1
- nfnl_ct_put@libnl_3 3.5.0-1
- nfnl_ct_query@Base 3.5.0-1
- nfnl_ct_query@libnl_3 3.5.0-1
- nfnl_ct_set_bytes@Base 3.5.0-1
- nfnl_ct_set_bytes@libnl_3 3.5.0-1
- nfnl_ct_set_dst@Base 3.5.0-1
- nfnl_ct_set_dst@libnl_3 3.5.0-1
- nfnl_ct_set_dst_port@Base 3.5.0-1
- nfnl_ct_set_dst_port@libnl_3 3.5.0-1
- nfnl_ct_set_family@Base 3.5.0-1
- nfnl_ct_set_family@libnl_3 3.5.0-1
- nfnl_ct_set_icmp_code@Base 3.5.0-1
- nfnl_ct_set_icmp_code@libnl_3 3.5.0-1
- nfnl_ct_set_icmp_id@Base 3.5.0-1
- nfnl_ct_set_icmp_id@libnl_3 3.5.0-1
- nfnl_ct_set_icmp_type@Base 3.5.0-1
- nfnl_ct_set_icmp_type@libnl_3 3.5.0-1
- nfnl_ct_set_id@Base 3.5.0-1
- nfnl_ct_set_id@libnl_3 3.5.0-1
- nfnl_ct_set_mark@Base 3.5.0-1
- nfnl_ct_set_mark@libnl_3 3.5.0-1
- nfnl_ct_set_packets@Base 3.5.0-1
- nfnl_ct_set_packets@libnl_3 3.5.0-1
- nfnl_ct_set_proto@Base 3.5.0-1
- nfnl_ct_set_proto@libnl_3 3.5.0-1
- nfnl_ct_set_src@Base 3.5.0-1
- nfnl_ct_set_src@libnl_3 3.5.0-1
- nfnl_ct_set_src_port@Base 3.5.0-1
- nfnl_ct_set_src_port@libnl_3 3.5.0-1
- nfnl_ct_set_status@Base 3.5.0-1
- nfnl_ct_set_status@libnl_3 3.5.0-1
- nfnl_ct_set_tcp_state@Base 3.5.0-1
- nfnl_ct_set_tcp_state@libnl_3 3.5.0-1
- nfnl_ct_set_timeout@Base 3.5.0-1
- nfnl_ct_set_timeout@libnl_3 3.5.0-1
- nfnl_ct_set_timestamp@Base 3.5.0-1
- nfnl_ct_set_timestamp@libnl_3 3.5.0-1
- nfnl_ct_set_use@Base 3.5.0-1
- nfnl_ct_set_use@libnl_3 3.5.0-1
- nfnl_ct_set_zone@Base 3.5.0-1
- nfnl_ct_set_zone@libnl_3 3.5.0-1
- nfnl_ct_status2str@Base 3.5.0-1
- nfnl_ct_status2str@libnl_3 3.5.0-1
- nfnl_ct_str2status@Base 3.5.0-1
- nfnl_ct_str2status@libnl_3 3.5.0-1
- nfnl_ct_str2tcp_state@Base 3.5.0-1
- nfnl_ct_str2tcp_state@libnl_3 3.5.0-1
- nfnl_ct_tcp_state2str@Base 3.5.0-1
- nfnl_ct_tcp_state2str@libnl_3 3.5.0-1
- nfnl_ct_test_bytes@Base 3.5.0-1
- nfnl_ct_test_bytes@libnl_3 3.5.0-1
- nfnl_ct_test_dst_port@Base 3.5.0-1
- nfnl_ct_test_dst_port@libnl_3 3.5.0-1
- nfnl_ct_test_icmp_code@Base 3.5.0-1
- nfnl_ct_test_icmp_code@libnl_3 3.5.0-1
- nfnl_ct_test_icmp_id@Base 3.5.0-1
- nfnl_ct_test_icmp_id@libnl_3 3.5.0-1
- nfnl_ct_test_icmp_type@Base 3.5.0-1
- nfnl_ct_test_icmp_type@libnl_3 3.5.0-1
- nfnl_ct_test_id@Base 3.5.0-1
- nfnl_ct_test_id@libnl_3 3.5.0-1
- nfnl_ct_test_mark@Base 3.5.0-1
- nfnl_ct_test_mark@libnl_3 3.5.0-1
- nfnl_ct_test_packets@Base 3.5.0-1
- nfnl_ct_test_packets@libnl_3 3.5.0-1
- nfnl_ct_test_proto@Base 3.5.0-1
- nfnl_ct_test_proto@libnl_3 3.5.0-1
- nfnl_ct_test_src_port@Base 3.5.0-1
- nfnl_ct_test_src_port@libnl_3 3.5.0-1
- nfnl_ct_test_status@Base 3.5.0-1
- nfnl_ct_test_status@libnl_3 3.5.0-1
- nfnl_ct_test_tcp_state@Base 3.5.0-1
- nfnl_ct_test_tcp_state@libnl_3 3.5.0-1
- nfnl_ct_test_timeout@Base 3.5.0-1
- nfnl_ct_test_timeout@libnl_3 3.5.0-1
- nfnl_ct_test_timestamp@Base 3.5.0-1
- nfnl_ct_test_timestamp@libnl_3 3.5.0-1
- nfnl_ct_test_use@Base 3.5.0-1
- nfnl_ct_test_use@libnl_3 3.5.0-1
- nfnl_ct_test_zone@Base 3.5.0-1
- nfnl_ct_test_zone@libnl_3 3.5.0-1
- nfnl_ct_unset_status@Base 3.5.0-1
- nfnl_ct_unset_status@libnl_3 3.5.0-1
- nfnl_exp_add@Base 3.5.0-1
- nfnl_exp_add@libnl_3 3.5.0-1
- nfnl_exp_alloc@Base 3.5.0-1
- nfnl_exp_alloc@libnl_3 3.5.0-1
- nfnl_exp_alloc_cache@Base 3.5.0-1
- nfnl_exp_alloc_cache@libnl_3 3.5.0-1
- nfnl_exp_build_add_request@Base 3.5.0-1
- nfnl_exp_build_add_request@libnl_3 3.5.0-1
- nfnl_exp_build_delete_request@Base 3.5.0-1
- nfnl_exp_build_delete_request@libnl_3 3.5.0-1
- nfnl_exp_build_query_request@Base 3.5.0-1
- nfnl_exp_build_query_request@libnl_3 3.5.0-1
- nfnl_exp_del@Base 3.5.0-1
- nfnl_exp_del@libnl_3 3.5.0-1
- nfnl_exp_dump_request@Base 3.5.0-1
- nfnl_exp_dump_request@libnl_3 3.5.0-1
- nfnl_exp_flags2str@Base 3.5.0-1
- nfnl_exp_flags2str@libnl_3 3.5.0-1
- nfnl_exp_get@Base 3.5.0-1
- nfnl_exp_get@libnl_3 3.5.0-1
- nfnl_exp_get_class@Base 3.5.0-1
- nfnl_exp_get_class@libnl_3 3.5.0-1
- nfnl_exp_get_dst@Base 3.5.0-1
- nfnl_exp_get_dst@libnl_3 3.5.0-1
- nfnl_exp_get_dst_port@Base 3.5.0-1
- nfnl_exp_get_dst_port@libnl_3 3.5.0-1
- nfnl_exp_get_family@Base 3.5.0-1
- nfnl_exp_get_family@libnl_3 3.5.0-1
- nfnl_exp_get_flags@Base 3.5.0-1
- nfnl_exp_get_flags@libnl_3 3.5.0-1
- nfnl_exp_get_fn@Base 3.5.0-1
- nfnl_exp_get_fn@libnl_3 3.5.0-1
- nfnl_exp_get_helper_name@Base 3.5.0-1
- nfnl_exp_get_helper_name@libnl_3 3.5.0-1
- nfnl_exp_get_icmp_code@Base 3.5.0-1
- nfnl_exp_get_icmp_code@libnl_3 3.5.0-1
- nfnl_exp_get_icmp_id@Base 3.5.0-1
- nfnl_exp_get_icmp_id@libnl_3 3.5.0-1
- nfnl_exp_get_icmp_type@Base 3.5.0-1
- nfnl_exp_get_icmp_type@libnl_3 3.5.0-1
- nfnl_exp_get_id@Base 3.5.0-1
- nfnl_exp_get_id@libnl_3 3.5.0-1
- nfnl_exp_get_l4protonum@Base 3.5.0-1
- nfnl_exp_get_l4protonum@libnl_3 3.5.0-1
- nfnl_exp_get_nat_dir@Base 3.5.0-1
- nfnl_exp_get_nat_dir@libnl_3 3.5.0-1
- nfnl_exp_get_src@Base 3.5.0-1
- nfnl_exp_get_src@libnl_3 3.5.0-1
- nfnl_exp_get_src_port@Base 3.5.0-1
- nfnl_exp_get_src_port@libnl_3 3.5.0-1
- nfnl_exp_get_timeout@Base 3.5.0-1
- nfnl_exp_get_timeout@libnl_3 3.5.0-1
- nfnl_exp_get_zone@Base 3.5.0-1
- nfnl_exp_get_zone@libnl_3 3.5.0-1
- nfnl_exp_put@Base 3.5.0-1
- nfnl_exp_put@libnl_3 3.5.0-1
- nfnl_exp_query@Base 3.5.0-1
- nfnl_exp_query@libnl_3 3.5.0-1
- nfnl_exp_set_class@Base 3.5.0-1
- nfnl_exp_set_class@libnl_3 3.5.0-1
- nfnl_exp_set_dst@Base 3.5.0-1
- nfnl_exp_set_dst@libnl_3 3.5.0-1
- nfnl_exp_set_family@Base 3.5.0-1
- nfnl_exp_set_family@libnl_3 3.5.0-1
- nfnl_exp_set_flags@Base 3.5.0-1
- nfnl_exp_set_flags@libnl_3 3.5.0-1
- nfnl_exp_set_fn@Base 3.5.0-1
- nfnl_exp_set_fn@libnl_3 3.5.0-1
- nfnl_exp_set_helper_name@Base 3.5.0-1
- nfnl_exp_set_helper_name@libnl_3 3.5.0-1
- nfnl_exp_set_icmp@Base 3.5.0-1
- nfnl_exp_set_icmp@libnl_3 3.5.0-1
- nfnl_exp_set_id@Base 3.5.0-1
- nfnl_exp_set_id@libnl_3 3.5.0-1
- nfnl_exp_set_l4protonum@Base 3.5.0-1
- nfnl_exp_set_l4protonum@libnl_3 3.5.0-1
- nfnl_exp_set_nat_dir@Base 3.5.0-1
- nfnl_exp_set_nat_dir@libnl_3 3.5.0-1
- nfnl_exp_set_ports@Base 3.5.0-1
- nfnl_exp_set_ports@libnl_3 3.5.0-1
- nfnl_exp_set_src@Base 3.5.0-1
- nfnl_exp_set_src@libnl_3 3.5.0-1
- nfnl_exp_set_timeout@Base 3.5.0-1
- nfnl_exp_set_timeout@libnl_3 3.5.0-1
- nfnl_exp_set_zone@Base 3.5.0-1
- nfnl_exp_set_zone@libnl_3 3.5.0-1
- nfnl_exp_str2flags@Base 3.5.0-1
- nfnl_exp_str2flags@libnl_3 3.5.0-1
- nfnl_exp_test_class@Base 3.5.0-1
- nfnl_exp_test_class@libnl_3 3.5.0-1
- nfnl_exp_test_dst@Base 3.5.0-1
- nfnl_exp_test_dst@libnl_3 3.5.0-1
- nfnl_exp_test_flags@Base 3.5.0-1
- nfnl_exp_test_flags@libnl_3 3.5.0-1
- nfnl_exp_test_fn@Base 3.5.0-1
- nfnl_exp_test_fn@libnl_3 3.5.0-1
- nfnl_exp_test_helper_name@Base 3.5.0-1
- nfnl_exp_test_helper_name@libnl_3 3.5.0-1
- nfnl_exp_test_icmp@Base 3.5.0-1
- nfnl_exp_test_icmp@libnl_3 3.5.0-1
- nfnl_exp_test_id@Base 3.5.0-1
- nfnl_exp_test_id@libnl_3 3.5.0-1
- nfnl_exp_test_l4protonum@Base 3.5.0-1
- nfnl_exp_test_l4protonum@libnl_3 3.5.0-1
- nfnl_exp_test_nat_dir@Base 3.5.0-1
- nfnl_exp_test_nat_dir@libnl_3 3.5.0-1
- nfnl_exp_test_ports@Base 3.5.0-1
- nfnl_exp_test_ports@libnl_3 3.5.0-1
- nfnl_exp_test_src@Base 3.5.0-1
- nfnl_exp_test_src@libnl_3 3.5.0-1
- nfnl_exp_test_timeout@Base 3.5.0-1
- nfnl_exp_test_timeout@libnl_3 3.5.0-1
- nfnl_exp_test_zone@Base 3.5.0-1
- nfnl_exp_test_zone@libnl_3 3.5.0-1
- nfnl_exp_unset_flags@Base 3.5.0-1
- nfnl_exp_unset_flags@libnl_3 3.5.0-1
- nfnl_inet_hook2str@Base 3.5.0-1
- nfnl_inet_hook2str@libnl_3 3.5.0-1
- nfnl_log_alloc@Base 3.5.0-1
- nfnl_log_alloc@libnl_3 3.5.0-1
- nfnl_log_build_change_request@Base 3.5.0-1
- nfnl_log_build_change_request@libnl_3 3.5.0-1
- nfnl_log_build_create_request@Base 3.5.0-1
- nfnl_log_build_create_request@libnl_3 3.5.0-1
- nfnl_log_build_delete_request@Base 3.5.0-1
- nfnl_log_build_delete_request@libnl_3 3.5.0-1
- nfnl_log_build_pf_bind@Base 3.5.0-1
- nfnl_log_build_pf_bind@libnl_3 3.5.0-1
- nfnl_log_build_pf_unbind@Base 3.5.0-1
- nfnl_log_build_pf_unbind@libnl_3 3.5.0-1
- nfnl_log_change@Base 3.5.0-1
- nfnl_log_change@libnl_3 3.5.0-1
- nfnl_log_copy_mode2str@Base 3.5.0-1
- nfnl_log_copy_mode2str@libnl_3 3.5.0-1
- nfnl_log_create@Base 3.5.0-1
- nfnl_log_create@libnl_3 3.5.0-1
- nfnl_log_delete@Base 3.5.0-1
- nfnl_log_delete@libnl_3 3.5.0-1
- nfnl_log_flags2str@Base 3.5.0-1
- nfnl_log_flags2str@libnl_3 3.5.0-1
- nfnl_log_get@Base 3.5.0-1
- nfnl_log_get@libnl_3 3.5.0-1
- nfnl_log_get_alloc_size@Base 3.5.0-1
- nfnl_log_get_alloc_size@libnl_3 3.5.0-1
- nfnl_log_get_copy_mode@Base 3.5.0-1
- nfnl_log_get_copy_mode@libnl_3 3.5.0-1
- nfnl_log_get_copy_range@Base 3.5.0-1
- nfnl_log_get_copy_range@libnl_3 3.5.0-1
- nfnl_log_get_flush_timeout@Base 3.5.0-1
- nfnl_log_get_flush_timeout@libnl_3 3.5.0-1
- nfnl_log_get_group@Base 3.5.0-1
- nfnl_log_get_group@libnl_3 3.5.0-1
- nfnl_log_get_queue_threshold@Base 3.5.0-1
- nfnl_log_get_queue_threshold@libnl_3 3.5.0-1
- nfnl_log_msg_alloc@Base 3.5.0-1
- nfnl_log_msg_alloc@libnl_3 3.5.0-1
- nfnl_log_msg_get@Base 3.5.0-1
- nfnl_log_msg_get@libnl_3 3.5.0-1
- nfnl_log_msg_get_family@Base 3.5.0-1
- nfnl_log_msg_get_family@libnl_3 3.5.0-1
- nfnl_log_msg_get_gid@Base 3.5.0-1
- nfnl_log_msg_get_gid@libnl_3 3.5.0-1
- nfnl_log_msg_get_hook@Base 3.5.0-1
- nfnl_log_msg_get_hook@libnl_3 3.5.0-1
- nfnl_log_msg_get_hwaddr@Base 3.5.0-1
- nfnl_log_msg_get_hwaddr@libnl_3 3.5.0-1
- nfnl_log_msg_get_hwproto@Base 3.5.0-1
- nfnl_log_msg_get_hwproto@libnl_3 3.5.0-1
- nfnl_log_msg_get_indev@Base 3.5.0-1
- nfnl_log_msg_get_indev@libnl_3 3.5.0-1
- nfnl_log_msg_get_mark@Base 3.5.0-1
- nfnl_log_msg_get_mark@libnl_3 3.5.0-1
- nfnl_log_msg_get_outdev@Base 3.5.0-1
- nfnl_log_msg_get_outdev@libnl_3 3.5.0-1
- nfnl_log_msg_get_payload@Base 3.5.0-1
- nfnl_log_msg_get_payload@libnl_3 3.5.0-1
- nfnl_log_msg_get_physindev@Base 3.5.0-1
- nfnl_log_msg_get_physindev@libnl_3 3.5.0-1
- nfnl_log_msg_get_physoutdev@Base 3.5.0-1
- nfnl_log_msg_get_physoutdev@libnl_3 3.5.0-1
- nfnl_log_msg_get_prefix@Base 3.5.0-1
- nfnl_log_msg_get_prefix@libnl_3 3.5.0-1
- nfnl_log_msg_get_seq@Base 3.5.0-1
- nfnl_log_msg_get_seq@libnl_3 3.5.0-1
- nfnl_log_msg_get_seq_global@Base 3.5.0-1
- nfnl_log_msg_get_seq_global@libnl_3 3.5.0-1
- nfnl_log_msg_get_timestamp@Base 3.5.0-1
- nfnl_log_msg_get_timestamp@libnl_3 3.5.0-1
- nfnl_log_msg_get_uid@Base 3.5.0-1
- nfnl_log_msg_get_uid@libnl_3 3.5.0-1
- nfnl_log_msg_put@Base 3.5.0-1
- nfnl_log_msg_put@libnl_3 3.5.0-1
- nfnl_log_msg_set_family@Base 3.5.0-1
- nfnl_log_msg_set_family@libnl_3 3.5.0-1
- nfnl_log_msg_set_gid@Base 3.5.0-1
- nfnl_log_msg_set_gid@libnl_3 3.5.0-1
- nfnl_log_msg_set_hook@Base 3.5.0-1
- nfnl_log_msg_set_hook@libnl_3 3.5.0-1
- nfnl_log_msg_set_hwaddr@Base 3.5.0-1
- nfnl_log_msg_set_hwaddr@libnl_3 3.5.0-1
- nfnl_log_msg_set_hwproto@Base 3.5.0-1
- nfnl_log_msg_set_hwproto@libnl_3 3.5.0-1
- nfnl_log_msg_set_indev@Base 3.5.0-1
- nfnl_log_msg_set_indev@libnl_3 3.5.0-1
- nfnl_log_msg_set_mark@Base 3.5.0-1
- nfnl_log_msg_set_mark@libnl_3 3.5.0-1
- nfnl_log_msg_set_outdev@Base 3.5.0-1
- nfnl_log_msg_set_outdev@libnl_3 3.5.0-1
- nfnl_log_msg_set_payload@Base 3.5.0-1
- nfnl_log_msg_set_payload@libnl_3 3.5.0-1
- nfnl_log_msg_set_physindev@Base 3.5.0-1
- nfnl_log_msg_set_physindev@libnl_3 3.5.0-1
- nfnl_log_msg_set_physoutdev@Base 3.5.0-1
- nfnl_log_msg_set_physoutdev@libnl_3 3.5.0-1
- nfnl_log_msg_set_prefix@Base 3.5.0-1
- nfnl_log_msg_set_prefix@libnl_3 3.5.0-1
- nfnl_log_msg_set_seq@Base 3.5.0-1
- nfnl_log_msg_set_seq@libnl_3 3.5.0-1
- nfnl_log_msg_set_seq_global@Base 3.5.0-1
- nfnl_log_msg_set_seq_global@libnl_3 3.5.0-1
- nfnl_log_msg_set_timestamp@Base 3.5.0-1
- nfnl_log_msg_set_timestamp@libnl_3 3.5.0-1
- nfnl_log_msg_set_uid@Base 3.5.0-1
- nfnl_log_msg_set_uid@libnl_3 3.5.0-1
- nfnl_log_msg_test_gid@Base 3.5.0-1
- nfnl_log_msg_test_gid@libnl_3 3.5.0-1
- nfnl_log_msg_test_hook@Base 3.5.0-1
- nfnl_log_msg_test_hook@libnl_3 3.5.0-1
- nfnl_log_msg_test_hwproto@Base 3.5.0-1
- nfnl_log_msg_test_hwproto@libnl_3 3.5.0-1
- nfnl_log_msg_test_mark@Base 3.5.0-1
- nfnl_log_msg_test_mark@libnl_3 3.5.0-1
- nfnl_log_msg_test_seq@Base 3.5.0-1
- nfnl_log_msg_test_seq@libnl_3 3.5.0-1
- nfnl_log_msg_test_seq_global@Base 3.5.0-1
- nfnl_log_msg_test_seq_global@libnl_3 3.5.0-1
- nfnl_log_msg_test_uid@Base 3.5.0-1
- nfnl_log_msg_test_uid@libnl_3 3.5.0-1
- nfnl_log_pf_bind@Base 3.5.0-1
- nfnl_log_pf_bind@libnl_3 3.5.0-1
- nfnl_log_pf_unbind@Base 3.5.0-1
- nfnl_log_pf_unbind@libnl_3 3.5.0-1
- nfnl_log_put@Base 3.5.0-1
- nfnl_log_put@libnl_3 3.5.0-1
- nfnl_log_set_alloc_size@Base 3.5.0-1
- nfnl_log_set_alloc_size@libnl_3 3.5.0-1
- nfnl_log_set_copy_mode@Base 3.5.0-1
- nfnl_log_set_copy_mode@libnl_3 3.5.0-1
- nfnl_log_set_copy_range@Base 3.5.0-1
- nfnl_log_set_copy_range@libnl_3 3.5.0-1
- nfnl_log_set_flags@Base 3.5.0-1
- nfnl_log_set_flags@libnl_3 3.5.0-1
- nfnl_log_set_flush_timeout@Base 3.5.0-1
- nfnl_log_set_flush_timeout@libnl_3 3.5.0-1
- nfnl_log_set_group@Base 3.5.0-1
- nfnl_log_set_group@libnl_3 3.5.0-1
- nfnl_log_set_queue_threshold@Base 3.5.0-1
- nfnl_log_set_queue_threshold@libnl_3 3.5.0-1
- nfnl_log_str2copy_mode@Base 3.5.0-1
- nfnl_log_str2copy_mode@libnl_3 3.5.0-1
- nfnl_log_str2flags@Base 3.5.0-1
- nfnl_log_str2flags@libnl_3 3.5.0-1
- nfnl_log_test_alloc_size@Base 3.5.0-1
- nfnl_log_test_alloc_size@libnl_3 3.5.0-1
- nfnl_log_test_copy_mode@Base 3.5.0-1
- nfnl_log_test_copy_mode@libnl_3 3.5.0-1
- nfnl_log_test_copy_range@Base 3.5.0-1
- nfnl_log_test_copy_range@libnl_3 3.5.0-1
- nfnl_log_test_flush_timeout@Base 3.5.0-1
- nfnl_log_test_flush_timeout@libnl_3 3.5.0-1
- nfnl_log_test_group@Base 3.5.0-1
- nfnl_log_test_group@libnl_3 3.5.0-1
- nfnl_log_test_queue_threshold@Base 3.5.0-1
- nfnl_log_test_queue_threshold@libnl_3 3.5.0-1
- nfnl_log_unset_flags@Base 3.5.0-1
- nfnl_log_unset_flags@libnl_3 3.5.0-1
- nfnl_queue_alloc@Base 3.5.0-1
- nfnl_queue_alloc@libnl_3 3.5.0-1
- nfnl_queue_build_change_request@Base 3.5.0-1
- nfnl_queue_build_change_request@libnl_3 3.5.0-1
- nfnl_queue_build_create_request@Base 3.5.0-1
- nfnl_queue_build_create_request@libnl_3 3.5.0-1
- nfnl_queue_build_delete_request@Base 3.5.0-1
- nfnl_queue_build_delete_request@libnl_3 3.5.0-1
- nfnl_queue_build_pf_bind@Base 3.5.0-1
- nfnl_queue_build_pf_bind@libnl_3 3.5.0-1
- nfnl_queue_build_pf_unbind@Base 3.5.0-1
- nfnl_queue_build_pf_unbind@libnl_3 3.5.0-1
- nfnl_queue_change@Base 3.5.0-1
- nfnl_queue_change@libnl_3 3.5.0-1
- nfnl_queue_copy_mode2str@Base 3.5.0-1
- nfnl_queue_copy_mode2str@libnl_3 3.5.0-1
- nfnl_queue_create@Base 3.5.0-1
- nfnl_queue_create@libnl_3 3.5.0-1
- nfnl_queue_delete@Base 3.5.0-1
- nfnl_queue_delete@libnl_3 3.5.0-1
- nfnl_queue_get@Base 3.5.0-1
- nfnl_queue_get@libnl_3 3.5.0-1
- nfnl_queue_get_copy_mode@Base 3.5.0-1
- nfnl_queue_get_copy_mode@libnl_3 3.5.0-1
- nfnl_queue_get_copy_range@Base 3.5.0-1
- nfnl_queue_get_copy_range@libnl_3 3.5.0-1
- nfnl_queue_get_group@Base 3.5.0-1
- nfnl_queue_get_group@libnl_3 3.5.0-1
- nfnl_queue_get_maxlen@Base 3.5.0-1
- nfnl_queue_get_maxlen@libnl_3 3.5.0-1
- nfnl_queue_msg_alloc@Base 3.5.0-1
- nfnl_queue_msg_alloc@libnl_3 3.5.0-1
- nfnl_queue_msg_build_verdict@Base 3.5.0-1
- nfnl_queue_msg_build_verdict@libnl_3 3.5.0-1
- nfnl_queue_msg_build_verdict_batch@Base 3.5.0-1
- nfnl_queue_msg_build_verdict_batch@libnl_3 3.5.0-1
- nfnl_queue_msg_get@Base 3.5.0-1
- nfnl_queue_msg_get@libnl_3 3.5.0-1
- nfnl_queue_msg_get_family@Base 3.5.0-1
- nfnl_queue_msg_get_family@libnl_3 3.5.0-1
- nfnl_queue_msg_get_group@Base 3.5.0-1
- nfnl_queue_msg_get_group@libnl_3 3.5.0-1
- nfnl_queue_msg_get_hook@Base 3.5.0-1
- nfnl_queue_msg_get_hook@libnl_3 3.5.0-1
- nfnl_queue_msg_get_hwaddr@Base 3.5.0-1
- nfnl_queue_msg_get_hwaddr@libnl_3 3.5.0-1
- nfnl_queue_msg_get_hwproto@Base 3.5.0-1
- nfnl_queue_msg_get_hwproto@libnl_3 3.5.0-1
- nfnl_queue_msg_get_indev@Base 3.5.0-1
- nfnl_queue_msg_get_indev@libnl_3 3.5.0-1
- nfnl_queue_msg_get_mark@Base 3.5.0-1
- nfnl_queue_msg_get_mark@libnl_3 3.5.0-1
- nfnl_queue_msg_get_outdev@Base 3.5.0-1
- nfnl_queue_msg_get_outdev@libnl_3 3.5.0-1
- nfnl_queue_msg_get_packetid@Base 3.5.0-1
- nfnl_queue_msg_get_packetid@libnl_3 3.5.0-1
- nfnl_queue_msg_get_payload@Base 3.5.0-1
- nfnl_queue_msg_get_payload@libnl_3 3.5.0-1
- nfnl_queue_msg_get_physindev@Base 3.5.0-1
- nfnl_queue_msg_get_physindev@libnl_3 3.5.0-1
- nfnl_queue_msg_get_physoutdev@Base 3.5.0-1
- nfnl_queue_msg_get_physoutdev@libnl_3 3.5.0-1
- nfnl_queue_msg_get_timestamp@Base 3.5.0-1
- nfnl_queue_msg_get_timestamp@libnl_3 3.5.0-1
- nfnl_queue_msg_get_verdict@Base 3.5.0-1
- nfnl_queue_msg_get_verdict@libnl_3 3.5.0-1
- nfnl_queue_msg_put@Base 3.5.0-1
- nfnl_queue_msg_put@libnl_3 3.5.0-1
- nfnl_queue_msg_send_verdict@Base 3.5.0-1
- nfnl_queue_msg_send_verdict@libnl_3 3.5.0-1
- nfnl_queue_msg_send_verdict_batch@Base 3.5.0-1
- nfnl_queue_msg_send_verdict_batch@libnl_3 3.5.0-1
- nfnl_queue_msg_send_verdict_payload@Base 3.5.0-1
- nfnl_queue_msg_send_verdict_payload@libnl_3 3.5.0-1
- nfnl_queue_msg_set_family@Base 3.5.0-1
- nfnl_queue_msg_set_family@libnl_3 3.5.0-1
- nfnl_queue_msg_set_group@Base 3.5.0-1
- nfnl_queue_msg_set_group@libnl_3 3.5.0-1
- nfnl_queue_msg_set_hook@Base 3.5.0-1
- nfnl_queue_msg_set_hook@libnl_3 3.5.0-1
- nfnl_queue_msg_set_hwaddr@Base 3.5.0-1
- nfnl_queue_msg_set_hwaddr@libnl_3 3.5.0-1
- nfnl_queue_msg_set_hwproto@Base 3.5.0-1
- nfnl_queue_msg_set_hwproto@libnl_3 3.5.0-1
- nfnl_queue_msg_set_indev@Base 3.5.0-1
- nfnl_queue_msg_set_indev@libnl_3 3.5.0-1
- nfnl_queue_msg_set_mark@Base 3.5.0-1
- nfnl_queue_msg_set_mark@libnl_3 3.5.0-1
- nfnl_queue_msg_set_outdev@Base 3.5.0-1
- nfnl_queue_msg_set_outdev@libnl_3 3.5.0-1
- nfnl_queue_msg_set_packetid@Base 3.5.0-1
- nfnl_queue_msg_set_packetid@libnl_3 3.5.0-1
- nfnl_queue_msg_set_payload@Base 3.5.0-1
- nfnl_queue_msg_set_payload@libnl_3 3.5.0-1
- nfnl_queue_msg_set_physindev@Base 3.5.0-1
- nfnl_queue_msg_set_physindev@libnl_3 3.5.0-1
- nfnl_queue_msg_set_physoutdev@Base 3.5.0-1
- nfnl_queue_msg_set_physoutdev@libnl_3 3.5.0-1
- nfnl_queue_msg_set_timestamp@Base 3.5.0-1
- nfnl_queue_msg_set_timestamp@libnl_3 3.5.0-1
- nfnl_queue_msg_set_verdict@Base 3.5.0-1
- nfnl_queue_msg_set_verdict@libnl_3 3.5.0-1
- nfnl_queue_msg_test_family@Base 3.5.0-1
- nfnl_queue_msg_test_family@libnl_3 3.5.0-1
- nfnl_queue_msg_test_group@Base 3.5.0-1
- nfnl_queue_msg_test_group@libnl_3 3.5.0-1
- nfnl_queue_msg_test_hook@Base 3.5.0-1
- nfnl_queue_msg_test_hook@libnl_3 3.5.0-1
- nfnl_queue_msg_test_hwaddr@Base 3.5.0-1
- nfnl_queue_msg_test_hwaddr@libnl_3 3.5.0-1
- nfnl_queue_msg_test_hwproto@Base 3.5.0-1
- nfnl_queue_msg_test_hwproto@libnl_3 3.5.0-1
- nfnl_queue_msg_test_indev@Base 3.5.0-1
- nfnl_queue_msg_test_indev@libnl_3 3.5.0-1
- nfnl_queue_msg_test_mark@Base 3.5.0-1
- nfnl_queue_msg_test_mark@libnl_3 3.5.0-1
- nfnl_queue_msg_test_outdev@Base 3.5.0-1
- nfnl_queue_msg_test_outdev@libnl_3 3.5.0-1
- nfnl_queue_msg_test_packetid@Base 3.5.0-1
- nfnl_queue_msg_test_packetid@libnl_3 3.5.0-1
- nfnl_queue_msg_test_payload@Base 3.5.0-1
- nfnl_queue_msg_test_payload@libnl_3 3.5.0-1
- nfnl_queue_msg_test_physindev@Base 3.5.0-1
- nfnl_queue_msg_test_physindev@libnl_3 3.5.0-1
- nfnl_queue_msg_test_physoutdev@Base 3.5.0-1
- nfnl_queue_msg_test_physoutdev@libnl_3 3.5.0-1
- nfnl_queue_msg_test_timestamp@Base 3.5.0-1
- nfnl_queue_msg_test_timestamp@libnl_3 3.5.0-1
- nfnl_queue_msg_test_verdict@Base 3.5.0-1
- nfnl_queue_msg_test_verdict@libnl_3 3.5.0-1
- nfnl_queue_pf_bind@Base 3.5.0-1
- nfnl_queue_pf_bind@libnl_3 3.5.0-1
- nfnl_queue_pf_unbind@Base 3.5.0-1
- nfnl_queue_pf_unbind@libnl_3 3.5.0-1
- nfnl_queue_put@Base 3.5.0-1
- nfnl_queue_put@libnl_3 3.5.0-1
- nfnl_queue_set_copy_mode@Base 3.5.0-1
- nfnl_queue_set_copy_mode@libnl_3 3.5.0-1
- nfnl_queue_set_copy_range@Base 3.5.0-1
- nfnl_queue_set_copy_range@libnl_3 3.5.0-1
- nfnl_queue_set_group@Base 3.5.0-1
- nfnl_queue_set_group@libnl_3 3.5.0-1
- nfnl_queue_set_maxlen@Base 3.5.0-1
- nfnl_queue_set_maxlen@libnl_3 3.5.0-1
- nfnl_queue_socket_alloc@Base 3.5.0-1
- nfnl_queue_socket_alloc@libnl_3 3.5.0-1
- nfnl_queue_str2copy_mode@Base 3.5.0-1
- nfnl_queue_str2copy_mode@libnl_3 3.5.0-1
- nfnl_queue_test_copy_mode@Base 3.5.0-1
- nfnl_queue_test_copy_mode@libnl_3 3.5.0-1
- nfnl_queue_test_copy_range@Base 3.5.0-1
- nfnl_queue_test_copy_range@libnl_3 3.5.0-1
- nfnl_queue_test_group@Base 3.5.0-1
- nfnl_queue_test_group@libnl_3 3.5.0-1
- nfnl_queue_test_maxlen@Base 3.5.0-1
- nfnl_queue_test_maxlen@libnl_3 3.5.0-1
- nfnl_send_simple@Base 3.5.0-1
- nfnl_send_simple@libnl_3 3.5.0-1
- nfnl_str2inet_hook@Base 3.5.0-1
- nfnl_str2inet_hook@libnl_3 3.5.0-1
- nfnl_str2verdict@Base 3.5.0-1
- nfnl_str2verdict@libnl_3 3.5.0-1
- nfnl_verdict2str@Base 3.5.0-1
- nfnl_verdict2str@libnl_3 3.5.0-1
- nfnlmsg_alloc_simple@Base 3.5.0-1
- nfnlmsg_alloc_simple@libnl_3 3.5.0-1
- nfnlmsg_ct_group@Base 3.5.0-1
- nfnlmsg_ct_group@libnl_3 3.5.0-1
- nfnlmsg_ct_parse@Base 3.5.0-1
- nfnlmsg_ct_parse@libnl_3 3.5.0-1
- nfnlmsg_exp_group@Base 3.5.0-1
- nfnlmsg_exp_group@libnl_3 3.5.0-1
- nfnlmsg_exp_parse@Base 3.5.0-1
- nfnlmsg_exp_parse@libnl_3 3.5.0-1
- nfnlmsg_family@Base 3.5.0-1
- nfnlmsg_family@libnl_3 3.5.0-1
- nfnlmsg_log_msg_parse@Base 3.5.0-1
- nfnlmsg_log_msg_parse@libnl_3 3.5.0-1
- nfnlmsg_put@Base 3.5.0-1
- nfnlmsg_put@libnl_3 3.5.0-1
- nfnlmsg_queue_msg_parse@Base 3.5.0-1
- nfnlmsg_queue_msg_parse@libnl_3 3.5.0-1
- nfnlmsg_res_id@Base 3.5.0-1
- nfnlmsg_res_id@libnl_3 3.5.0-1
- nfnlmsg_subsys@Base 3.5.0-1
- nfnlmsg_subsys@libnl_3 3.5.0-1
- nfnlmsg_subtype@Base 3.5.0-1
- nfnlmsg_subtype@libnl_3 3.5.0-1
- queue_msg_obj_ops@Base 3.5.0-1
- queue_msg_obj_ops@libnl_3 3.5.0-1
- queue_obj_ops@Base 3.5.0-1
- queue_obj_ops@libnl_3 3.5.0-1
diff --git a/src/libnl3/debian/libnl-nf-3-dev.install b/src/libnl3/debian/libnl-nf-3-dev.install
deleted file mode 100644
index d1307c751b84..000000000000
--- a/src/libnl3/debian/libnl-nf-3-dev.install
+++ /dev/null
@@ -1,3 +0,0 @@
-debian/tmp/usr/lib/*/pkgconfig/libnl-nf-3*
-debian/tmp/usr/lib/*/libnl-nf-3*.so
-debian/tmp/usr/lib/*/libnl-nf-3*.a
diff --git a/src/libnl3/debian/libnl-route-3-200.install b/src/libnl3/debian/libnl-route-3-200.install
deleted file mode 100644
index 44c7ec8cdfad..000000000000
--- a/src/libnl3/debian/libnl-route-3-200.install
+++ /dev/null
@@ -1 +0,0 @@
-debian/tmp/usr/lib/*/libnl-route-3*.so.*
diff --git a/src/libnl3/debian/libnl-route-3-200.symbols b/src/libnl3/debian/libnl-route-3-200.symbols
deleted file mode 100644
index e11157ba4e88..000000000000
--- a/src/libnl3/debian/libnl-route-3-200.symbols
+++ /dev/null
@@ -1,2051 +0,0 @@
-libnl-route-3.so.200 libnl-route-3-200 #MINVER#
- ematch__create_buffer@Base 3.5.0-1
- ematch__delete_buffer@Base 3.5.0-1
- ematch__flush_buffer@Base 3.5.0-1
- ematch__scan_buffer@Base 3.5.0-1
- ematch__scan_bytes@Base 3.5.0-1
- ematch__scan_string@Base 3.5.0-1
- ematch__switch_to_buffer@Base 3.5.0-1
- ematch_alloc@Base 3.5.0-1
- ematch_free@Base 3.5.0-1
- ematch_get_column@Base 3.5.0-1
- ematch_get_debug@Base 3.5.0-1
- ematch_get_extra@Base 3.5.0-1
- ematch_get_in@Base 3.5.0-1
- ematch_get_leng@Base 3.5.0-1
- ematch_get_lineno@Base 3.5.0-1
- ematch_get_lval@Base 3.5.0-1
- ematch_get_out@Base 3.5.0-1
- ematch_get_text@Base 3.5.0-1
- ematch_lex@Base 3.5.0-1
- ematch_lex_destroy@Base 3.5.0-1
- ematch_lex_init@Base 3.5.0-1
- ematch_lex_init_extra@Base 3.5.0-1
- ematch_parse@Base 3.5.0-1
- ematch_pop_buffer_state@Base 3.5.0-1
- ematch_push_buffer_state@Base 3.5.0-1
- ematch_realloc@Base 3.5.0-1
- ematch_restart@Base 3.5.0-1
- ematch_set_column@Base 3.5.0-1
- ematch_set_debug@Base 3.5.0-1
- ematch_set_extra@Base 3.5.0-1
- ematch_set_in@Base 3.5.0-1
- ematch_set_lineno@Base 3.5.0-1
- ematch_set_lval@Base 3.5.0-1
- ematch_set_out@Base 3.5.0-1
- flnl_lookup@Base 3.5.0-1
- flnl_lookup@libnl_3 3.5.0-1
- flnl_lookup_build_request@Base 3.5.0-1
- flnl_lookup_build_request@libnl_3 3.5.0-1
- flnl_request_alloc@Base 3.5.0-1
- flnl_request_alloc@libnl_3 3.5.0-1
- flnl_request_get_addr@Base 3.5.0-1
- flnl_request_get_addr@libnl_3 3.5.0-1
- flnl_request_get_fwmark@Base 3.5.0-1
- flnl_request_get_fwmark@libnl_3 3.5.0-1
- flnl_request_get_scope@Base 3.5.0-1
- flnl_request_get_scope@libnl_3 3.5.0-1
- flnl_request_get_table@Base 3.5.0-1
- flnl_request_get_table@libnl_3 3.5.0-1
- flnl_request_get_tos@Base 3.5.0-1
- flnl_request_get_tos@libnl_3 3.5.0-1
- flnl_request_set_addr@Base 3.5.0-1
- flnl_request_set_addr@libnl_3 3.5.0-1
- flnl_request_set_fwmark@Base 3.5.0-1
- flnl_request_set_fwmark@libnl_3 3.5.0-1
- flnl_request_set_scope@Base 3.5.0-1
- flnl_request_set_scope@libnl_3 3.5.0-1
- flnl_request_set_table@Base 3.5.0-1
- flnl_request_set_table@libnl_3 3.5.0-1
- flnl_request_set_tos@Base 3.5.0-1
- flnl_request_set_tos@libnl_3 3.5.0-1
- flnl_result_alloc@Base 3.5.0-1
- flnl_result_alloc@libnl_3 3.5.0-1
- flnl_result_alloc_cache@Base 3.5.0-1
- flnl_result_alloc_cache@libnl_3 3.5.0-1
- flnl_result_get_error@Base 3.5.0-1
- flnl_result_get_error@libnl_3 3.5.0-1
- flnl_result_get_nexthop_sel@Base 3.5.0-1
- flnl_result_get_nexthop_sel@libnl_3 3.5.0-1
- flnl_result_get_prefixlen@Base 3.5.0-1
- flnl_result_get_prefixlen@libnl_3 3.5.0-1
- flnl_result_get_scope@Base 3.5.0-1
- flnl_result_get_scope@libnl_3 3.5.0-1
- flnl_result_get_table_id@Base 3.5.0-1
- flnl_result_get_table_id@libnl_3 3.5.0-1
- flnl_result_get_type@Base 3.5.0-1
- flnl_result_get_type@libnl_3 3.5.0-1
- flnl_result_put@Base 3.5.0-1
- flnl_result_put@libnl_3 3.5.0-1
- libnl_3@libnl_3 3.5.0-1
- libnl_3_2_26@libnl_3_2_26 3.5.0-1
- libnl_3_2_27@libnl_3_2_27 3.5.0-1
- libnl_3_2_28@libnl_3_2_28 3.5.0-1
- libnl_3_2_29@libnl_3_2_29 3.5.0-1
- libnl_3_4@libnl_3_4 3.5.0-1
- libnl_3_5@libnl_3_5 3.5.0-1
- nl_ovl_strategy2str@Base 3.5.0-1
- nl_ovl_strategy2str@libnl_3 3.5.0-1
- nl_police2str@Base 3.5.0-1
- nl_police2str@libnl_3 3.5.0-1
- nl_rtgen_request@Base 3.5.0-1
- nl_rtgen_request@libnl_3 3.5.0-1
- nl_rtntype2str@Base 3.5.0-1
- nl_rtntype2str@libnl_3 3.5.0-1
- nl_str2ovl_strategy@Base 3.5.0-1
- nl_str2ovl_strategy@libnl_3 3.5.0-1
- nl_str2police@Base 3.5.0-1
- nl_str2police@libnl_3 3.5.0-1
- nl_str2rtntype@Base 3.5.0-1
- nl_str2rtntype@libnl_3 3.5.0-1
- pktloc__create_buffer@Base 3.5.0-1
- pktloc__delete_buffer@Base 3.5.0-1
- pktloc__flush_buffer@Base 3.5.0-1
- pktloc__scan_buffer@Base 3.5.0-1
- pktloc__scan_bytes@Base 3.5.0-1
- pktloc__scan_string@Base 3.5.0-1
- pktloc__switch_to_buffer@Base 3.5.0-1
- pktloc_alloc@Base 3.5.0-1
- pktloc_free@Base 3.5.0-1
- pktloc_get_column@Base 3.5.0-1
- pktloc_get_debug@Base 3.5.0-1
- pktloc_get_extra@Base 3.5.0-1
- pktloc_get_in@Base 3.5.0-1
- pktloc_get_leng@Base 3.5.0-1
- pktloc_get_lineno@Base 3.5.0-1
- pktloc_get_lloc@Base 3.5.0-1
- pktloc_get_lval@Base 3.5.0-1
- pktloc_get_out@Base 3.5.0-1
- pktloc_get_text@Base 3.5.0-1
- pktloc_lex@Base 3.5.0-1
- pktloc_lex_destroy@Base 3.5.0-1
- pktloc_lex_init@Base 3.5.0-1
- pktloc_lex_init_extra@Base 3.5.0-1
- pktloc_parse@Base 3.5.0-1
- pktloc_pop_buffer_state@Base 3.5.0-1
- pktloc_push_buffer_state@Base 3.5.0-1
- pktloc_realloc@Base 3.5.0-1
- pktloc_restart@Base 3.5.0-1
- pktloc_set_column@Base 3.5.0-1
- pktloc_set_debug@Base 3.5.0-1
- pktloc_set_extra@Base 3.5.0-1
- pktloc_set_in@Base 3.5.0-1
- pktloc_set_lineno@Base 3.5.0-1
- pktloc_set_lloc@Base 3.5.0-1
-
- pktloc_set_lval@Base 3.5.0-1
- pktloc_set_out@Base 3.5.0-1
- route_obj_ops@Base 3.5.0-1
- route_obj_ops@libnl_3 3.5.0-1
- rtln_link_policy@Base 3.5.0-1
- rtln_link_policy@libnl_3 3.5.0-1
- rtnl_act_add@Base 3.5.0-1
- rtnl_act_add@libnl_3 3.5.0-1
- rtnl_act_alloc@Base 3.5.0-1
- rtnl_act_alloc@libnl_3 3.5.0-1
- rtnl_act_append@Base 3.5.0-1
- rtnl_act_append@libnl_3 3.5.0-1
- rtnl_act_build_add_request@Base 3.5.0-1
- rtnl_act_build_add_request@libnl_3 3.5.0-1
- rtnl_act_build_change_request@Base 3.5.0-1
- rtnl_act_build_change_request@libnl_3 3.5.0-1
- rtnl_act_build_delete_request@Base 3.5.0-1
- rtnl_act_build_delete_request@libnl_3 3.5.0-1
- rtnl_act_change@Base 3.5.0-1
- rtnl_act_change@libnl_3 3.5.0-1
- rtnl_act_delete@Base 3.5.0-1
- rtnl_act_delete@libnl_3 3.5.0-1
- rtnl_act_fill@Base 3.5.0-1
- rtnl_act_fill@libnl_3 3.5.0-1
- rtnl_act_get@Base 3.5.0-1
- rtnl_act_get@libnl_3 3.5.0-1
- rtnl_act_next@libnl_3_4 3.5.0-1
- rtnl_act_parse@Base 3.5.0-1
- rtnl_act_parse@libnl_3 3.5.0-1
- rtnl_act_put@Base 3.5.0-1
- rtnl_act_put@libnl_3 3.5.0-1
- rtnl_act_put_all@Base 3.5.0-1
- rtnl_act_put_all@libnl_3 3.5.0-1
- rtnl_act_remove@Base 3.5.0-1
- rtnl_act_remove@libnl_3 3.5.0-1
- rtnl_addr_add@Base 3.5.0-1
- rtnl_addr_add@libnl_3 3.5.0-1
- rtnl_addr_alloc@Base 3.5.0-1
- rtnl_addr_alloc@libnl_3 3.5.0-1
- rtnl_addr_alloc_cache@Base 3.5.0-1
- rtnl_addr_alloc_cache@libnl_3 3.5.0-1
- rtnl_addr_build_add_request@Base 3.5.0-1
- rtnl_addr_build_add_request@libnl_3 3.5.0-1
- rtnl_addr_build_delete_request@Base 3.5.0-1
- rtnl_addr_build_delete_request@libnl_3 3.5.0-1
- rtnl_addr_delete@Base 3.5.0-1
- rtnl_addr_delete@libnl_3 3.5.0-1
- rtnl_addr_flags2str@Base 3.5.0-1
- rtnl_addr_flags2str@libnl_3 3.5.0-1
- rtnl_addr_get@Base 3.5.0-1
- rtnl_addr_get@libnl_3 3.5.0-1
- rtnl_addr_get_anycast@Base 3.5.0-1
- rtnl_addr_get_anycast@libnl_3 3.5.0-1
- rtnl_addr_get_broadcast@Base 3.5.0-1
- rtnl_addr_get_broadcast@libnl_3 3.5.0-1
- rtnl_addr_get_create_time@Base 3.5.0-1
- rtnl_addr_get_create_time@libnl_3 3.5.0-1
- rtnl_addr_get_family@Base 3.5.0-1
- rtnl_addr_get_family@libnl_3 3.5.0-1
- rtnl_addr_get_flags@Base 3.5.0-1
- rtnl_addr_get_flags@libnl_3 3.5.0-1
- rtnl_addr_get_ifindex@Base 3.5.0-1
- rtnl_addr_get_ifindex@libnl_3 3.5.0-1
- rtnl_addr_get_label@Base 3.5.0-1
- rtnl_addr_get_label@libnl_3 3.5.0-1
- rtnl_addr_get_last_update_time@Base 3.5.0-1
- rtnl_addr_get_last_update_time@libnl_3 3.5.0-1
- rtnl_addr_get_link@Base 3.5.0-1
- rtnl_addr_get_link@libnl_3 3.5.0-1
- rtnl_addr_get_local@Base 3.5.0-1
- rtnl_addr_get_local@libnl_3 3.5.0-1
- rtnl_addr_get_multicast@Base 3.5.0-1
- rtnl_addr_get_multicast@libnl_3 3.5.0-1
- rtnl_addr_get_peer@Base 3.5.0-1
- rtnl_addr_get_peer@libnl_3 3.5.0-1
- rtnl_addr_get_preferred_lifetime@Base 3.5.0-1
- rtnl_addr_get_preferred_lifetime@libnl_3 3.5.0-1
- rtnl_addr_get_prefixlen@Base 3.5.0-1
- rtnl_addr_get_prefixlen@libnl_3 3.5.0-1
- rtnl_addr_get_scope@Base 3.5.0-1
- rtnl_addr_get_scope@libnl_3 3.5.0-1
- rtnl_addr_get_valid_lifetime@Base 3.5.0-1
- rtnl_addr_get_valid_lifetime@libnl_3 3.5.0-1
- rtnl_addr_put@Base 3.5.0-1
- rtnl_addr_put@libnl_3 3.5.0-1
- rtnl_addr_set_anycast@Base 3.5.0-1
- rtnl_addr_set_anycast@libnl_3 3.5.0-1
- rtnl_addr_set_broadcast@Base 3.5.0-1
- rtnl_addr_set_broadcast@libnl_3 3.5.0-1
- rtnl_addr_set_family@Base 3.5.0-1
- rtnl_addr_set_family@libnl_3 3.5.0-1
- rtnl_addr_set_flags@Base 3.5.0-1
- rtnl_addr_set_flags@libnl_3 3.5.0-1
- rtnl_addr_set_ifindex@Base 3.5.0-1
- rtnl_addr_set_ifindex@libnl_3 3.5.0-1
- rtnl_addr_set_label@Base 3.5.0-1
- rtnl_addr_set_label@libnl_3 3.5.0-1
- rtnl_addr_set_link@Base 3.5.0-1
- rtnl_addr_set_link@libnl_3 3.5.0-1
- rtnl_addr_set_local@Base 3.5.0-1
- rtnl_addr_set_local@libnl_3 3.5.0-1
- rtnl_addr_set_multicast@Base 3.5.0-1
- rtnl_addr_set_multicast@libnl_3 3.5.0-1
- rtnl_addr_set_peer@Base 3.5.0-1
- rtnl_addr_set_peer@libnl_3 3.5.0-1
- rtnl_addr_set_preferred_lifetime@Base 3.5.0-1
- rtnl_addr_set_preferred_lifetime@libnl_3 3.5.0-1
- rtnl_addr_set_prefixlen@Base 3.5.0-1
- rtnl_addr_set_prefixlen@libnl_3 3.5.0-1
- rtnl_addr_set_scope@Base 3.5.0-1
- rtnl_addr_set_scope@libnl_3 3.5.0-1
- rtnl_addr_set_valid_lifetime@Base 3.5.0-1
- rtnl_addr_set_valid_lifetime@libnl_3 3.5.0-1
- rtnl_addr_str2flags@Base 3.5.0-1
- rtnl_addr_str2flags@libnl_3 3.5.0-1
- rtnl_addr_unset_flags@Base 3.5.0-1
- rtnl_addr_unset_flags@libnl_3 3.5.0-1
- rtnl_basic_add_action@Base 3.5.0-1
- rtnl_basic_add_action@libnl_3 3.5.0-1
- rtnl_basic_del_action@Base 3.5.0-1
- rtnl_basic_del_action@libnl_3 3.5.0-1
- rtnl_basic_get_action@libnl_3_4 3.5.0-1
- rtnl_basic_get_ematch@Base 3.5.0-1
- rtnl_basic_get_ematch@libnl_3 3.5.0-1
- rtnl_basic_get_target@Base 3.5.0-1
- rtnl_basic_get_target@libnl_3 3.5.0-1
- rtnl_basic_set_ematch@Base 3.5.0-1
- rtnl_basic_set_ematch@libnl_3 3.5.0-1
- rtnl_basic_set_target@Base 3.5.0-1
- rtnl_basic_set_target@libnl_3 3.5.0-1
- rtnl_cgroup_get_ematch@Base 3.5.0-1
- rtnl_cgroup_get_ematch@libnl_3 3.5.0-1
- rtnl_cgroup_set_ematch@Base 3.5.0-1
- rtnl_cgroup_set_ematch@libnl_3 3.5.0-1
- rtnl_class_add@Base 3.5.0-1
- rtnl_class_add@libnl_3 3.5.0-1
- rtnl_class_alloc@Base 3.5.0-1
- rtnl_class_alloc@libnl_3 3.5.0-1
- rtnl_class_alloc_cache@Base 3.5.0-1
- rtnl_class_alloc_cache@libnl_3 3.5.0-1
- rtnl_class_build_add_request@Base 3.5.0-1
- rtnl_class_build_add_request@libnl_3 3.5.0-1
- rtnl_class_build_delete_request@Base 3.5.0-1
- rtnl_class_build_delete_request@libnl_3 3.5.0-1
- rtnl_class_delete@Base 3.5.0-1
- rtnl_class_delete@libnl_3 3.5.0-1
- rtnl_class_dsmark_get_bitmask@Base 3.5.0-1
- rtnl_class_dsmark_get_bitmask@libnl_3 3.5.0-1
- rtnl_class_dsmark_get_value@Base 3.5.0-1
- rtnl_class_dsmark_get_value@libnl_3 3.5.0-1
- rtnl_class_dsmark_set_bitmask@Base 3.5.0-1
- rtnl_class_dsmark_set_bitmask@libnl_3 3.5.0-1
- rtnl_class_dsmark_set_value@Base 3.5.0-1
- rtnl_class_dsmark_set_value@libnl_3 3.5.0-1
- rtnl_class_foreach_child@Base 3.5.0-1
- rtnl_class_foreach_child@libnl_3 3.5.0-1
- rtnl_class_foreach_cls@Base 3.5.0-1
- rtnl_class_foreach_cls@libnl_3 3.5.0-1
- rtnl_class_get@Base 3.5.0-1
- rtnl_class_get@libnl_3 3.5.0-1
- rtnl_class_get_by_parent@libnl_3_5 3.5.0-1
- rtnl_class_hfsc_get_fsc@Base 3.5.0-1
- rtnl_class_hfsc_get_fsc@libnl_3 3.5.0-1
- rtnl_class_hfsc_get_rsc@Base 3.5.0-1
- rtnl_class_hfsc_get_rsc@libnl_3 3.5.0-1
- rtnl_class_hfsc_get_usc@Base 3.5.0-1
- rtnl_class_hfsc_get_usc@libnl_3 3.5.0-1
- rtnl_class_hfsc_set_fsc@Base 3.5.0-1
- rtnl_class_hfsc_set_fsc@libnl_3 3.5.0-1
- rtnl_class_hfsc_set_rsc@Base 3.5.0-1
- rtnl_class_hfsc_set_rsc@libnl_3 3.5.0-1
- rtnl_class_hfsc_set_usc@Base 3.5.0-1
- rtnl_class_hfsc_set_usc@libnl_3 3.5.0-1
- rtnl_class_leaf_qdisc@Base 3.5.0-1
- rtnl_class_leaf_qdisc@libnl_3 3.5.0-1
- rtnl_class_put@Base 3.5.0-1
- rtnl_class_put@libnl_3 3.5.0-1
- rtnl_classid_generate@Base 3.5.0-1
- rtnl_classid_generate@libnl_3 3.5.0-1
- rtnl_cls_add@Base 3.5.0-1
- rtnl_cls_add@libnl_3 3.5.0-1
- rtnl_cls_alloc@Base 3.5.0-1
- rtnl_cls_alloc@libnl_3 3.5.0-1
- rtnl_cls_alloc_cache@Base 3.5.0-1
- rtnl_cls_alloc_cache@libnl_3 3.5.0-1
- rtnl_cls_build_add_request@Base 3.5.0-1
- rtnl_cls_build_add_request@libnl_3 3.5.0-1
- rtnl_cls_build_change_request@Base 3.5.0-1
- rtnl_cls_build_change_request@libnl_3 3.5.0-1
- rtnl_cls_build_delete_request@Base 3.5.0-1
- rtnl_cls_build_delete_request@libnl_3 3.5.0-1
- rtnl_cls_cache_set_tc_params@libnl_3_5 3.5.0-1
- rtnl_cls_change@Base 3.5.0-1
- rtnl_cls_change@libnl_3 3.5.0-1
- rtnl_cls_delete@Base 3.5.0-1
- rtnl_cls_delete@libnl_3 3.5.0-1
- rtnl_cls_get_prio@Base 3.5.0-1
- rtnl_cls_get_prio@libnl_3 3.5.0-1
- rtnl_cls_get_protocol@Base 3.5.0-1
- rtnl_cls_get_protocol@libnl_3 3.5.0-1
- rtnl_cls_put@Base 3.5.0-1
- rtnl_cls_put@libnl_3 3.5.0-1
- rtnl_cls_set_prio@Base 3.5.0-1
- rtnl_cls_set_prio@libnl_3 3.5.0-1
- rtnl_cls_set_protocol@Base 3.5.0-1
- rtnl_cls_set_protocol@libnl_3 3.5.0-1
- rtnl_ematch_add_child@Base 3.5.0-1
- rtnl_ematch_add_child@libnl_3 3.5.0-1
- rtnl_ematch_alloc@Base 3.5.0-1
- rtnl_ematch_alloc@libnl_3 3.5.0-1
- rtnl_ematch_cmp_get@Base 3.5.0-1
- rtnl_ematch_cmp_get@libnl_3 3.5.0-1
- rtnl_ematch_cmp_set@Base 3.5.0-1
- rtnl_ematch_cmp_set@libnl_3 3.5.0-1
- rtnl_ematch_data@Base 3.5.0-1
- rtnl_ematch_data@libnl_3 3.5.0-1
- rtnl_ematch_fill_attr@Base 3.5.0-1
- rtnl_ematch_fill_attr@libnl_3 3.5.0-1
- rtnl_ematch_free@Base 3.5.0-1
- rtnl_ematch_free@libnl_3 3.5.0-1
- rtnl_ematch_get_flags@Base 3.5.0-1
- rtnl_ematch_get_flags@libnl_3 3.5.0-1
- rtnl_ematch_lookup_ops@Base 3.5.0-1
- rtnl_ematch_lookup_ops@libnl_3 3.5.0-1
- rtnl_ematch_lookup_ops_by_name@Base 3.5.0-1
- rtnl_ematch_lookup_ops_by_name@libnl_3 3.5.0-1
- rtnl_ematch_meta_set_lvalue@Base 3.5.0-1
- rtnl_ematch_meta_set_lvalue@libnl_3 3.5.0-1
- rtnl_ematch_meta_set_operand@Base 3.5.0-1
- rtnl_ematch_meta_set_operand@libnl_3 3.5.0-1
- rtnl_ematch_meta_set_rvalue@Base 3.5.0-1
- rtnl_ematch_meta_set_rvalue@libnl_3 3.5.0-1
- rtnl_ematch_nbyte_get_layer@Base 3.5.0-1
- rtnl_ematch_nbyte_get_layer@libnl_3 3.5.0-1
- rtnl_ematch_nbyte_get_len@Base 3.5.0-1
- rtnl_ematch_nbyte_get_len@libnl_3 3.5.0-1
- rtnl_ematch_nbyte_get_offset@Base 3.5.0-1
- rtnl_ematch_nbyte_get_offset@libnl_3 3.5.0-1
- rtnl_ematch_nbyte_get_pattern@Base 3.5.0-1
- rtnl_ematch_nbyte_get_pattern@libnl_3 3.5.0-1
- rtnl_ematch_nbyte_set_offset@Base 3.5.0-1
- rtnl_ematch_nbyte_set_offset@libnl_3 3.5.0-1
- rtnl_ematch_nbyte_set_pattern@Base 3.5.0-1
- rtnl_ematch_nbyte_set_pattern@libnl_3 3.5.0-1
- rtnl_ematch_offset2txt@Base 3.5.0-1
- rtnl_ematch_offset2txt@libnl_3 3.5.0-1
- rtnl_ematch_opnd2txt@Base 3.5.0-1
- rtnl_ematch_opnd2txt@libnl_3 3.5.0-1
- rtnl_ematch_parse_attr@Base 3.5.0-1
- rtnl_ematch_parse_attr@libnl_3 3.5.0-1
- rtnl_ematch_parse_expr@Base 3.5.0-1
- rtnl_ematch_parse_expr@libnl_3 3.5.0-1
- rtnl_ematch_register@Base 3.5.0-1
- rtnl_ematch_register@libnl_3 3.5.0-1
- rtnl_ematch_set_flags@Base 3.5.0-1
- rtnl_ematch_set_flags@libnl_3 3.5.0-1
- rtnl_ematch_set_kind@Base 3.5.0-1
- rtnl_ematch_set_kind@libnl_3 3.5.0-1
- rtnl_ematch_set_name@Base 3.5.0-1
- rtnl_ematch_set_name@libnl_3 3.5.0-1
- rtnl_ematch_set_ops@Base 3.5.0-1
- rtnl_ematch_set_ops@libnl_3 3.5.0-1
- rtnl_ematch_text_get_algo@Base 3.5.0-1
- rtnl_ematch_text_get_algo@libnl_3 3.5.0-1
- rtnl_ematch_text_get_from_layer@Base 3.5.0-1
- rtnl_ematch_text_get_from_layer@libnl_3 3.5.0-1
- rtnl_ematch_text_get_from_offset@Base 3.5.0-1
- rtnl_ematch_text_get_from_offset@libnl_3 3.5.0-1
- rtnl_ematch_text_get_len@Base 3.5.0-1
- rtnl_ematch_text_get_len@libnl_3 3.5.0-1
- rtnl_ematch_text_get_pattern@Base 3.5.0-1
- rtnl_ematch_text_get_pattern@libnl_3 3.5.0-1
- rtnl_ematch_text_get_to_layer@Base 3.5.0-1
- rtnl_ematch_text_get_to_layer@libnl_3 3.5.0-1
- rtnl_ematch_text_get_to_offset@Base 3.5.0-1
- rtnl_ematch_text_get_to_offset@libnl_3 3.5.0-1
- rtnl_ematch_text_set_algo@Base 3.5.0-1
- rtnl_ematch_text_set_algo@libnl_3 3.5.0-1
- rtnl_ematch_text_set_from@Base 3.5.0-1
- rtnl_ematch_text_set_from@libnl_3 3.5.0-1
- rtnl_ematch_text_set_pattern@Base 3.5.0-1
- rtnl_ematch_text_set_pattern@libnl_3 3.5.0-1
- rtnl_ematch_text_set_to@Base 3.5.0-1
- rtnl_ematch_text_set_to@libnl_3 3.5.0-1
- rtnl_ematch_tree_add@Base 3.5.0-1
- rtnl_ematch_tree_add@libnl_3 3.5.0-1
- rtnl_ematch_tree_alloc@Base 3.5.0-1
- rtnl_ematch_tree_alloc@libnl_3 3.5.0-1
- rtnl_ematch_tree_clone@libnl_3_5 3.5.0-1
- rtnl_ematch_tree_dump@Base 3.5.0-1
- rtnl_ematch_tree_dump@libnl_3 3.5.0-1
- rtnl_ematch_tree_free@Base 3.5.0-1
- rtnl_ematch_tree_free@libnl_3 3.5.0-1
- rtnl_ematch_unlink@Base 3.5.0-1
- rtnl_ematch_unlink@libnl_3 3.5.0-1
- rtnl_ematch_unset_flags@Base 3.5.0-1
- rtnl_ematch_unset_flags@libnl_3 3.5.0-1
- rtnl_fw_set_classid@Base 3.5.0-1
- rtnl_fw_set_classid@libnl_3 3.5.0-1
- rtnl_fw_set_mask@Base 3.5.0-1
- rtnl_fw_set_mask@libnl_3 3.5.0-1
- rtnl_gact_get_action@libnl_3_2_29 3.5.0-1
- rtnl_gact_set_action@libnl_3_2_29 3.5.0-1
- rtnl_htb_get_cbuffer@Base 3.5.0-1
- rtnl_htb_get_cbuffer@libnl_3 3.5.0-1
- rtnl_htb_get_ceil64@libnl_3_5 3.5.0-1
- rtnl_htb_get_ceil@Base 3.5.0-1
- rtnl_htb_get_ceil@libnl_3 3.5.0-1
- rtnl_htb_get_defcls@Base 3.5.0-1
- rtnl_htb_get_defcls@libnl_3 3.5.0-1
- rtnl_htb_get_level@Base 3.5.0-1
- rtnl_htb_get_level@libnl_3 3.5.0-1
- rtnl_htb_get_prio@Base 3.5.0-1
- rtnl_htb_get_prio@libnl_3 3.5.0-1
- rtnl_htb_get_quantum@Base 3.5.0-1
- rtnl_htb_get_quantum@libnl_3 3.5.0-1
- rtnl_htb_get_rate2quantum@Base 3.5.0-1
- rtnl_htb_get_rate2quantum@libnl_3 3.5.0-1
- rtnl_htb_get_rate64@libnl_3_5 3.5.0-1
- rtnl_htb_get_rate@Base 3.5.0-1
- rtnl_htb_get_rate@libnl_3 3.5.0-1
- rtnl_htb_get_rbuffer@Base 3.5.0-1
- rtnl_htb_get_rbuffer@libnl_3 3.5.0-1
- rtnl_htb_set_cbuffer@Base 3.5.0-1
- rtnl_htb_set_cbuffer@libnl_3 3.5.0-1
- rtnl_htb_set_ceil64@libnl_3_5 3.5.0-1
- rtnl_htb_set_ceil@Base 3.5.0-1
- rtnl_htb_set_ceil@libnl_3 3.5.0-1
- rtnl_htb_set_defcls@Base 3.5.0-1
- rtnl_htb_set_defcls@libnl_3 3.5.0-1
- rtnl_htb_set_level@Base 3.5.0-1
- rtnl_htb_set_level@libnl_3 3.5.0-1
- rtnl_htb_set_prio@Base 3.5.0-1
- rtnl_htb_set_prio@libnl_3 3.5.0-1
- rtnl_htb_set_quantum@Base 3.5.0-1
- rtnl_htb_set_quantum@libnl_3 3.5.0-1
- rtnl_htb_set_rate2quantum@Base 3.5.0-1
- rtnl_htb_set_rate2quantum@libnl_3 3.5.0-1
- rtnl_htb_set_rate64@libnl_3_5 3.5.0-1
- rtnl_htb_set_rate@Base 3.5.0-1
- rtnl_htb_set_rate@libnl_3 3.5.0-1
- rtnl_htb_set_rbuffer@Base 3.5.0-1
- rtnl_htb_set_rbuffer@libnl_3 3.5.0-1
- rtnl_link_add@Base 3.5.0-1
- rtnl_link_add@libnl_3 3.5.0-1
- rtnl_link_af_alloc@Base 3.5.0-1
- rtnl_link_af_alloc@libnl_3 3.5.0-1
- rtnl_link_af_data@Base 3.5.0-1
- rtnl_link_af_data@libnl_3 3.5.0-1
- rtnl_link_af_data_compare@Base 3.5.0-1
- rtnl_link_af_data_compare@libnl_3 3.5.0-1
- rtnl_link_af_ops_lookup@Base 3.5.0-1
- rtnl_link_af_ops_lookup@libnl_3 3.5.0-1
- rtnl_link_af_ops_put@Base 3.5.0-1
- rtnl_link_af_ops_put@libnl_3 3.5.0-1
- rtnl_link_af_register@Base 3.5.0-1
- rtnl_link_af_register@libnl_3 3.5.0-1
- rtnl_link_af_unregister@Base 3.5.0-1
- rtnl_link_af_unregister@libnl_3 3.5.0-1
- rtnl_link_alloc@Base 3.5.0-1
- rtnl_link_alloc@libnl_3 3.5.0-1
- rtnl_link_alloc_cache@Base 3.5.0-1
- rtnl_link_alloc_cache@libnl_3 3.5.0-1
- rtnl_link_alloc_cache_flags@libnl_3_2_28 3.5.0-1
- rtnl_link_bond_add@Base 3.5.0-1
- rtnl_link_bond_add@libnl_3 3.5.0-1
- rtnl_link_bond_alloc@Base 3.5.0-1
- rtnl_link_bond_alloc@libnl_3 3.5.0-1
- rtnl_link_bond_enslave@Base 3.5.0-1
- rtnl_link_bond_enslave@libnl_3 3.5.0-1
- rtnl_link_bond_enslave_ifindex@Base 3.5.0-1
- rtnl_link_bond_enslave_ifindex@libnl_3 3.5.0-1
- rtnl_link_bond_release@Base 3.5.0-1
- rtnl_link_bond_release@libnl_3 3.5.0-1
- rtnl_link_bond_release_ifindex@Base 3.5.0-1
- rtnl_link_bond_release_ifindex@libnl_3 3.5.0-1
- rtnl_link_bridge_add@Base 3.5.0-1
- rtnl_link_bridge_add@libnl_3 3.5.0-1
- rtnl_link_bridge_alloc@Base 3.5.0-1
- rtnl_link_bridge_alloc@libnl_3 3.5.0-1
- rtnl_link_bridge_flags2str@Base 3.5.0-1
- rtnl_link_bridge_flags2str@libnl_3 3.5.0-1
- rtnl_link_bridge_get_cost@Base 3.5.0-1
- rtnl_link_bridge_get_cost@libnl_3 3.5.0-1
- rtnl_link_bridge_get_flags@Base 3.5.0-1
- rtnl_link_bridge_get_flags@libnl_3 3.5.0-1
- rtnl_link_bridge_get_hwmode@libnl_3_2_29 3.5.0-1
- rtnl_link_bridge_get_port_state@Base 3.5.0-1
- rtnl_link_bridge_get_port_state@libnl_3 3.5.0-1
- rtnl_link_bridge_get_port_vlan@libnl_3_2_28 3.5.0-1
- rtnl_link_bridge_get_priority@Base 3.5.0-1
- rtnl_link_bridge_get_priority@libnl_3 3.5.0-1
- rtnl_link_bridge_has_ext_info@Base 3.5.0-1
- rtnl_link_bridge_has_ext_info@libnl_3 3.5.0-1
- rtnl_link_bridge_has_vlan@libnl_3_2_28 3.5.0-1
- rtnl_link_bridge_hwmode2str@libnl_3_2_29 3.5.0-1
- rtnl_link_bridge_portstate2str@libnl_3_2_29 3.5.0-1
- rtnl_link_bridge_pvid@libnl_3_2_28 3.5.0-1
- rtnl_link_bridge_set_cost@Base 3.5.0-1
- rtnl_link_bridge_set_cost@libnl_3 3.5.0-1
- rtnl_link_bridge_set_flags@Base 3.5.0-1
- rtnl_link_bridge_set_flags@libnl_3 3.5.0-1
- rtnl_link_bridge_set_hwmode@libnl_3_2_29 3.5.0-1
- rtnl_link_bridge_set_port_state@Base 3.5.0-1
- rtnl_link_bridge_set_port_state@libnl_3 3.5.0-1
- rtnl_link_bridge_set_priority@Base 3.5.0-1
- rtnl_link_bridge_set_priority@libnl_3 3.5.0-1
- rtnl_link_bridge_set_self@libnl_3_2_29 3.5.0-1
- rtnl_link_bridge_str2flags@Base 3.5.0-1
- rtnl_link_bridge_str2flags@libnl_3 3.5.0-1
- rtnl_link_bridge_str2hwmode@libnl_3_2_29 3.5.0-1
- rtnl_link_bridge_str2portstate@libnl_3_2_29 3.5.0-1
- rtnl_link_bridge_unset_flags@Base 3.5.0-1
- rtnl_link_bridge_unset_flags@libnl_3 3.5.0-1
- rtnl_link_build_add_request@Base 3.5.0-1
- rtnl_link_build_add_request@libnl_3 3.5.0-1
- rtnl_link_build_change_request@Base 3.5.0-1
- rtnl_link_build_change_request@libnl_3 3.5.0-1
- rtnl_link_build_delete_request@Base 3.5.0-1
- rtnl_link_build_delete_request@libnl_3 3.5.0-1
- rtnl_link_build_get_request@Base 3.5.0-1
- rtnl_link_build_get_request@libnl_3 3.5.0-1
- rtnl_link_can_berr@Base 3.5.0-1
- rtnl_link_can_berr@libnl_3 3.5.0-1
- rtnl_link_can_berr_rx@Base 3.5.0-1
- rtnl_link_can_berr_rx@libnl_3 3.5.0-1
- rtnl_link_can_berr_tx@Base 3.5.0-1
- rtnl_link_can_berr_tx@libnl_3 3.5.0-1
- rtnl_link_can_ctrlmode2str@Base 3.5.0-1
- rtnl_link_can_ctrlmode2str@libnl_3 3.5.0-1
- rtnl_link_can_freq@Base 3.5.0-1
- rtnl_link_can_freq@libnl_3 3.5.0-1
- rtnl_link_can_get_bitrate@Base 3.5.0-1
- rtnl_link_can_get_bitrate@libnl_3 3.5.0-1
- rtnl_link_can_get_bittiming@Base 3.5.0-1
- rtnl_link_can_get_bittiming@libnl_3 3.5.0-1
- rtnl_link_can_get_bt_const@Base 3.5.0-1
- rtnl_link_can_get_bt_const@libnl_3 3.5.0-1
- rtnl_link_can_get_ctrlmode@Base 3.5.0-1
- rtnl_link_can_get_ctrlmode@libnl_3 3.5.0-1
- rtnl_link_can_get_restart_ms@Base 3.5.0-1
- rtnl_link_can_get_restart_ms@libnl_3 3.5.0-1
- rtnl_link_can_get_sample_point@Base 3.5.0-1
- rtnl_link_can_get_sample_point@libnl_3 3.5.0-1
- rtnl_link_can_restart@Base 3.5.0-1
- rtnl_link_can_restart@libnl_3 3.5.0-1
- rtnl_link_can_set_bitrate@Base 3.5.0-1
- rtnl_link_can_set_bitrate@libnl_3 3.5.0-1
- rtnl_link_can_set_bittiming@Base 3.5.0-1
- rtnl_link_can_set_bittiming@libnl_3 3.5.0-1
- rtnl_link_can_set_ctrlmode@Base 3.5.0-1
- rtnl_link_can_set_ctrlmode@libnl_3 3.5.0-1
- rtnl_link_can_set_restart_ms@Base 3.5.0-1
- rtnl_link_can_set_restart_ms@libnl_3 3.5.0-1
- rtnl_link_can_set_sample_point@Base 3.5.0-1
- rtnl_link_can_set_sample_point@libnl_3 3.5.0-1
- rtnl_link_can_state@Base 3.5.0-1
- rtnl_link_can_state@libnl_3 3.5.0-1
- rtnl_link_can_str2ctrlmode@Base 3.5.0-1
- rtnl_link_can_str2ctrlmode@libnl_3 3.5.0-1
- rtnl_link_can_unset_ctrlmode@Base 3.5.0-1
- rtnl_link_can_unset_ctrlmode@libnl_3 3.5.0-1
- rtnl_link_carrier2str@Base 3.5.0-1
- rtnl_link_carrier2str@libnl_3 3.5.0-1
- rtnl_link_change@Base 3.5.0-1
- rtnl_link_change@libnl_3 3.5.0-1
- rtnl_link_delete@Base 3.5.0-1
- rtnl_link_delete@libnl_3 3.5.0-1
- rtnl_link_enslave@Base 3.5.0-1
- rtnl_link_enslave@libnl_3 3.5.0-1
- rtnl_link_enslave_ifindex@Base 3.5.0-1
- rtnl_link_enslave_ifindex@libnl_3 3.5.0-1
- rtnl_link_fill_info@Base 3.5.0-1
- rtnl_link_fill_info@libnl_3 3.5.0-1
- rtnl_link_flags2str@Base 3.5.0-1
- rtnl_link_flags2str@libnl_3 3.5.0-1
- rtnl_link_geneve_alloc@libnl_3_5 3.5.0-1
- rtnl_link_geneve_get_flags@libnl_3_5 3.5.0-1
- rtnl_link_geneve_get_id@libnl_3_5 3.5.0-1
- rtnl_link_geneve_get_label@libnl_3_5 3.5.0-1
- rtnl_link_geneve_get_port@libnl_3_5 3.5.0-1
- rtnl_link_geneve_get_remote@libnl_3_5 3.5.0-1
- rtnl_link_geneve_get_tos@libnl_3_5 3.5.0-1
- rtnl_link_geneve_get_ttl@libnl_3_5 3.5.0-1
- rtnl_link_geneve_get_udp_csum@libnl_3_5 3.5.0-1
- rtnl_link_geneve_get_udp_zero_csum6_rx@libnl_3_5 3.5.0-1
- rtnl_link_geneve_get_udp_zero_csum6_tx@libnl_3_5 3.5.0-1
- rtnl_link_geneve_set_flags@libnl_3_5 3.5.0-1
- rtnl_link_geneve_set_id@libnl_3_5 3.5.0-1
- rtnl_link_geneve_set_label@libnl_3_5 3.5.0-1
- rtnl_link_geneve_set_port@libnl_3_5 3.5.0-1
- rtnl_link_geneve_set_remote@libnl_3_5 3.5.0-1
- rtnl_link_geneve_set_tos@libnl_3_5 3.5.0-1
- rtnl_link_geneve_set_ttl@libnl_3_5 3.5.0-1
- rtnl_link_geneve_set_udp_csum@libnl_3_5 3.5.0-1
- rtnl_link_geneve_set_udp_zero_csum6_rx@libnl_3_5 3.5.0-1
- rtnl_link_geneve_set_udp_zero_csum6_tx@libnl_3_5 3.5.0-1
- rtnl_link_get@Base 3.5.0-1
- rtnl_link_get@libnl_3 3.5.0-1
- rtnl_link_get_addr@Base 3.5.0-1
- rtnl_link_get_addr@libnl_3 3.5.0-1
- rtnl_link_get_arptype@Base 3.5.0-1
- rtnl_link_get_arptype@libnl_3 3.5.0-1
- rtnl_link_get_broadcast@Base 3.5.0-1
- rtnl_link_get_broadcast@libnl_3 3.5.0-1
- rtnl_link_get_by_name@Base 3.5.0-1
- rtnl_link_get_by_name@libnl_3 3.5.0-1
- rtnl_link_get_carrier@Base 3.5.0-1
- rtnl_link_get_carrier@libnl_3 3.5.0-1
- rtnl_link_get_carrier_changes@libnl_3_2_29 3.5.0-1
- rtnl_link_get_family@Base 3.5.0-1
- rtnl_link_get_family@libnl_3 3.5.0-1
- rtnl_link_get_flags@Base 3.5.0-1
- rtnl_link_get_flags@libnl_3 3.5.0-1
- rtnl_link_get_group@Base 3.5.0-1
- rtnl_link_get_group@libnl_3 3.5.0-1
- rtnl_link_get_gso_max_segs@libnl_3_2_29 3.5.0-1
- rtnl_link_get_gso_max_size@libnl_3_2_29 3.5.0-1
- rtnl_link_get_ifalias@Base 3.5.0-1
- rtnl_link_get_ifalias@libnl_3 3.5.0-1
- rtnl_link_get_ifindex@Base 3.5.0-1
- rtnl_link_get_ifindex@libnl_3 3.5.0-1
- rtnl_link_get_info_type@Base 3.5.0-1
- rtnl_link_get_info_type@libnl_3 3.5.0-1
- rtnl_link_get_kernel@Base 3.5.0-1
- rtnl_link_get_kernel@libnl_3 3.5.0-1
- rtnl_link_get_link@Base 3.5.0-1
- rtnl_link_get_link@libnl_3 3.5.0-1
- rtnl_link_get_link_netnsid@Base 3.5.0-1
- rtnl_link_get_link_netnsid@libnl_3_2_27 3.5.0-1
- rtnl_link_get_linkmode@Base 3.5.0-1
- rtnl_link_get_linkmode@libnl_3 3.5.0-1
- rtnl_link_get_master@Base 3.5.0-1
- rtnl_link_get_master@libnl_3 3.5.0-1
- rtnl_link_get_mtu@Base 3.5.0-1
- rtnl_link_get_mtu@libnl_3 3.5.0-1
- rtnl_link_get_name@Base 3.5.0-1
- rtnl_link_get_name@libnl_3 3.5.0-1
- rtnl_link_get_ns_fd@Base 3.5.0-1
- rtnl_link_get_ns_fd@libnl_3 3.5.0-1
- rtnl_link_get_ns_pid@Base 3.5.0-1
- rtnl_link_get_ns_pid@libnl_3 3.5.0-1
- rtnl_link_get_num_rx_queues@Base 3.5.0-1
- rtnl_link_get_num_rx_queues@libnl_3 3.5.0-1
- rtnl_link_get_num_tx_queues@Base 3.5.0-1
- rtnl_link_get_num_tx_queues@libnl_3 3.5.0-1
- rtnl_link_get_num_vf@Base 3.5.0-1
- rtnl_link_get_num_vf@libnl_3 3.5.0-1
- rtnl_link_get_operstate@Base 3.5.0-1
- rtnl_link_get_operstate@libnl_3 3.5.0-1
- rtnl_link_get_phys_port_id@Base 3.5.0-1
- rtnl_link_get_phys_port_id@libnl_3 3.5.0-1
- rtnl_link_get_phys_port_name@libnl_3_2_29 3.5.0-1
- rtnl_link_get_phys_switch_id@libnl_3_2_29 3.5.0-1
- rtnl_link_get_pmtudisc@Base 3.5.0-1
- rtnl_link_get_pmtudisc@libnl_3 3.5.0-1
- rtnl_link_get_promiscuity@Base 3.5.0-1
- rtnl_link_get_promiscuity@libnl_3 3.5.0-1
- rtnl_link_get_qdisc@Base 3.5.0-1
- rtnl_link_get_qdisc@libnl_3 3.5.0-1
- rtnl_link_get_slave_type@libnl_3_5 3.5.0-1
- rtnl_link_get_stat@Base 3.5.0-1
- rtnl_link_get_stat@libnl_3 3.5.0-1
- rtnl_link_get_txqlen@Base 3.5.0-1
- rtnl_link_get_txqlen@libnl_3 3.5.0-1
- rtnl_link_get_type@Base 3.5.0-1
- rtnl_link_get_type@libnl_3 3.5.0-1
- rtnl_link_get_weight@Base 3.5.0-1
- rtnl_link_get_weight@libnl_3 3.5.0-1
- rtnl_link_has_vf_list@libnl_3_2_29 3.5.0-1
- rtnl_link_i2name@Base 3.5.0-1
- rtnl_link_i2name@libnl_3 3.5.0-1
- rtnl_link_inet6_addrgenmode2str@Base 3.5.0-1
- rtnl_link_inet6_addrgenmode2str@libnl_3 3.5.0-1
- rtnl_link_inet6_flags2str@libnl_3_4 3.5.0-1
- rtnl_link_inet6_get_addr_gen_mode@Base 3.5.0-1
- rtnl_link_inet6_get_addr_gen_mode@libnl_3 3.5.0-1
- rtnl_link_inet6_get_flags@libnl_3_4 3.5.0-1
- rtnl_link_inet6_get_token@Base 3.5.0-1
- rtnl_link_inet6_get_token@libnl_3 3.5.0-1
- rtnl_link_inet6_set_addr_gen_mode@Base 3.5.0-1
- rtnl_link_inet6_set_addr_gen_mode@libnl_3 3.5.0-1
- rtnl_link_inet6_set_flags@libnl_3_4 3.5.0-1
- rtnl_link_inet6_set_token@Base 3.5.0-1
- rtnl_link_inet6_set_token@libnl_3 3.5.0-1
- rtnl_link_inet6_str2addrgenmode@Base 3.5.0-1
- rtnl_link_inet6_str2addrgenmode@libnl_3 3.5.0-1
- rtnl_link_inet6_str2flags@libnl_3_4 3.5.0-1
- rtnl_link_inet_devconf2str@Base 3.5.0-1
- rtnl_link_inet_devconf2str@libnl_3 3.5.0-1
- rtnl_link_inet_get_conf@Base 3.5.0-1
- rtnl_link_inet_get_conf@libnl_3 3.5.0-1
- rtnl_link_inet_set_conf@Base 3.5.0-1
- rtnl_link_inet_set_conf@libnl_3 3.5.0-1
- rtnl_link_inet_str2devconf@Base 3.5.0-1
- rtnl_link_inet_str2devconf@libnl_3 3.5.0-1
- rtnl_link_info_ops_lookup@Base 3.5.0-1
- rtnl_link_info_ops_lookup@libnl_3 3.5.0-1
- rtnl_link_info_ops_put@Base 3.5.0-1
- rtnl_link_info_ops_put@libnl_3 3.5.0-1
- rtnl_link_info_parse@Base 3.5.0-1
- rtnl_link_info_parse@libnl_3 3.5.0-1
- rtnl_link_ip6_tnl_add@Base 3.5.0-1
- rtnl_link_ip6_tnl_add@libnl_3 3.5.0-1
- rtnl_link_ip6_tnl_alloc@Base 3.5.0-1
- rtnl_link_ip6_tnl_alloc@libnl_3 3.5.0-1
- rtnl_link_ip6_tnl_get_encaplimit@Base 3.5.0-1
- rtnl_link_ip6_tnl_get_encaplimit@libnl_3 3.5.0-1
- rtnl_link_ip6_tnl_get_flags@Base 3.5.0-1
- rtnl_link_ip6_tnl_get_flags@libnl_3 3.5.0-1
- rtnl_link_ip6_tnl_get_flowinfo@Base 3.5.0-1
- rtnl_link_ip6_tnl_get_flowinfo@libnl_3 3.5.0-1
- rtnl_link_ip6_tnl_get_link@Base 3.5.0-1
- rtnl_link_ip6_tnl_get_link@libnl_3 3.5.0-1
- rtnl_link_ip6_tnl_get_local@Base 3.5.0-1
- rtnl_link_ip6_tnl_get_local@libnl_3 3.5.0-1
- rtnl_link_ip6_tnl_get_proto@Base 3.5.0-1
- rtnl_link_ip6_tnl_get_proto@libnl_3 3.5.0-1
- rtnl_link_ip6_tnl_get_remote@Base 3.5.0-1
- rtnl_link_ip6_tnl_get_remote@libnl_3 3.5.0-1
- rtnl_link_ip6_tnl_get_tos@Base 3.5.0-1
- rtnl_link_ip6_tnl_get_tos@libnl_3 3.5.0-1
- rtnl_link_ip6_tnl_get_ttl@Base 3.5.0-1
- rtnl_link_ip6_tnl_get_ttl@libnl_3 3.5.0-1
- rtnl_link_ip6_tnl_set_encaplimit@Base 3.5.0-1
- rtnl_link_ip6_tnl_set_encaplimit@libnl_3 3.5.0-1
- rtnl_link_ip6_tnl_set_flags@Base 3.5.0-1
- rtnl_link_ip6_tnl_set_flags@libnl_3 3.5.0-1
- rtnl_link_ip6_tnl_set_flowinfo@Base 3.5.0-1
- rtnl_link_ip6_tnl_set_flowinfo@libnl_3 3.5.0-1
- rtnl_link_ip6_tnl_set_link@Base 3.5.0-1
- rtnl_link_ip6_tnl_set_link@libnl_3 3.5.0-1
- rtnl_link_ip6_tnl_set_local@Base 3.5.0-1
- rtnl_link_ip6_tnl_set_local@libnl_3 3.5.0-1
- rtnl_link_ip6_tnl_set_proto@Base 3.5.0-1
- rtnl_link_ip6_tnl_set_proto@libnl_3 3.5.0-1
- rtnl_link_ip6_tnl_set_remote@Base 3.5.0-1
- rtnl_link_ip6_tnl_set_remote@libnl_3 3.5.0-1
- rtnl_link_ip6_tnl_set_tos@Base 3.5.0-1
- rtnl_link_ip6_tnl_set_tos@libnl_3 3.5.0-1
- rtnl_link_ip6_tnl_set_ttl@Base 3.5.0-1
- rtnl_link_ip6_tnl_set_ttl@libnl_3 3.5.0-1
- rtnl_link_ipgre_add@Base 3.5.0-1
- rtnl_link_ipgre_add@libnl_3 3.5.0-1
- rtnl_link_ipgre_alloc@Base 3.5.0-1
- rtnl_link_ipgre_alloc@libnl_3 3.5.0-1
- rtnl_link_ipgre_get_iflags@Base 3.5.0-1
- rtnl_link_ipgre_get_iflags@libnl_3 3.5.0-1
- rtnl_link_ipgre_get_ikey@Base 3.5.0-1
- rtnl_link_ipgre_get_ikey@libnl_3 3.5.0-1
- rtnl_link_ipgre_get_link@Base 3.5.0-1
- rtnl_link_ipgre_get_link@libnl_3 3.5.0-1
- rtnl_link_ipgre_get_local@Base 3.5.0-1
- rtnl_link_ipgre_get_local@libnl_3 3.5.0-1
- rtnl_link_ipgre_get_oflags@Base 3.5.0-1
- rtnl_link_ipgre_get_oflags@libnl_3 3.5.0-1
- rtnl_link_ipgre_get_okey@Base 3.5.0-1
- rtnl_link_ipgre_get_okey@libnl_3 3.5.0-1
- rtnl_link_ipgre_get_pmtudisc@libnl_3_2_29 3.5.0-1
- rtnl_link_ipgre_get_remote@Base 3.5.0-1
- rtnl_link_ipgre_get_remote@libnl_3 3.5.0-1
- rtnl_link_ipgre_get_tos@Base 3.5.0-1
- rtnl_link_ipgre_get_tos@libnl_3 3.5.0-1
- rtnl_link_ipgre_get_ttl@Base 3.5.0-1
- rtnl_link_ipgre_get_ttl@libnl_3 3.5.0-1
- rtnl_link_ipgre_set_iflags@Base 3.5.0-1
- rtnl_link_ipgre_set_iflags@libnl_3 3.5.0-1
- rtnl_link_ipgre_set_ikey@Base 3.5.0-1
- rtnl_link_ipgre_set_ikey@libnl_3 3.5.0-1
- rtnl_link_ipgre_set_link@Base 3.5.0-1
- rtnl_link_ipgre_set_link@libnl_3 3.5.0-1
- rtnl_link_ipgre_set_local@Base 3.5.0-1
- rtnl_link_ipgre_set_local@libnl_3 3.5.0-1
- rtnl_link_ipgre_set_oflags@Base 3.5.0-1
- rtnl_link_ipgre_set_oflags@libnl_3 3.5.0-1
- rtnl_link_ipgre_set_okey@Base 3.5.0-1
- rtnl_link_ipgre_set_okey@libnl_3 3.5.0-1
- rtnl_link_ipgre_set_pmtudisc@Base 3.5.0-1
- rtnl_link_ipgre_set_pmtudisc@libnl_3 3.5.0-1
- rtnl_link_ipgre_set_remote@Base 3.5.0-1
- rtnl_link_ipgre_set_remote@libnl_3 3.5.0-1
- rtnl_link_ipgre_set_tos@Base 3.5.0-1
- rtnl_link_ipgre_set_tos@libnl_3 3.5.0-1
- rtnl_link_ipgre_set_ttl@Base 3.5.0-1
- rtnl_link_ipgre_set_ttl@libnl_3 3.5.0-1
- rtnl_link_ipgretap_add@libnl_3_2_28 3.5.0-1
- rtnl_link_ipgretap_alloc@libnl_3_2_28 3.5.0-1
- rtnl_link_ipip_add@Base 3.5.0-1
- rtnl_link_ipip_add@libnl_3 3.5.0-1
- rtnl_link_ipip_alloc@Base 3.5.0-1
- rtnl_link_ipip_alloc@libnl_3 3.5.0-1
- rtnl_link_ipip_get_link@Base 3.5.0-1
- rtnl_link_ipip_get_link@libnl_3 3.5.0-1
- rtnl_link_ipip_get_local@Base 3.5.0-1
- rtnl_link_ipip_get_local@libnl_3 3.5.0-1
- rtnl_link_ipip_get_pmtudisc@Base 3.5.0-1
- rtnl_link_ipip_get_pmtudisc@libnl_3 3.5.0-1
- rtnl_link_ipip_get_remote@Base 3.5.0-1
- rtnl_link_ipip_get_remote@libnl_3 3.5.0-1
- rtnl_link_ipip_get_tos@Base 3.5.0-1
- rtnl_link_ipip_get_tos@libnl_3 3.5.0-1
- rtnl_link_ipip_get_ttl@Base 3.5.0-1
- rtnl_link_ipip_get_ttl@libnl_3 3.5.0-1
- rtnl_link_ipip_set_link@Base 3.5.0-1
- rtnl_link_ipip_set_link@libnl_3 3.5.0-1
- rtnl_link_ipip_set_local@Base 3.5.0-1
- rtnl_link_ipip_set_local@libnl_3 3.5.0-1
- rtnl_link_ipip_set_pmtudisc@Base 3.5.0-1
- rtnl_link_ipip_set_pmtudisc@libnl_3 3.5.0-1
- rtnl_link_ipip_set_remote@Base 3.5.0-1
- rtnl_link_ipip_set_remote@libnl_3 3.5.0-1
- rtnl_link_ipip_set_tos@Base 3.5.0-1
- rtnl_link_ipip_set_tos@libnl_3 3.5.0-1
- rtnl_link_ipip_set_ttl@Base 3.5.0-1
- rtnl_link_ipip_set_ttl@libnl_3 3.5.0-1
- rtnl_link_ipvlan_alloc@Base 3.5.0-1
- rtnl_link_ipvlan_alloc@libnl_3_2_27 3.5.0-1
- rtnl_link_ipvlan_get_mode@Base 3.5.0-1
- rtnl_link_ipvlan_get_mode@libnl_3_2_27 3.5.0-1
- rtnl_link_ipvlan_mode2str@Base 3.5.0-1
- rtnl_link_ipvlan_mode2str@libnl_3_2_27 3.5.0-1
- rtnl_link_ipvlan_set_mode@Base 3.5.0-1
- rtnl_link_ipvlan_set_mode@libnl_3_2_27 3.5.0-1
- rtnl_link_ipvlan_str2mode@Base 3.5.0-1
- rtnl_link_ipvlan_str2mode@libnl_3_2_27 3.5.0-1
- rtnl_link_ipvti_add@Base 3.5.0-1
- rtnl_link_ipvti_add@libnl_3 3.5.0-1
- rtnl_link_ipvti_alloc@Base 3.5.0-1
- rtnl_link_ipvti_alloc@libnl_3 3.5.0-1
- rtnl_link_ipvti_get_ikey@Base 3.5.0-1
- rtnl_link_ipvti_get_ikey@libnl_3 3.5.0-1
- rtnl_link_ipvti_get_link@Base 3.5.0-1
- rtnl_link_ipvti_get_link@libnl_3 3.5.0-1
- rtnl_link_ipvti_get_local@Base 3.5.0-1
- rtnl_link_ipvti_get_local@libnl_3 3.5.0-1
- rtnl_link_ipvti_get_okey@Base 3.5.0-1
- rtnl_link_ipvti_get_okey@libnl_3 3.5.0-1
- rtnl_link_ipvti_get_remote@Base 3.5.0-1
- rtnl_link_ipvti_get_remote@libnl_3 3.5.0-1
- rtnl_link_ipvti_set_ikey@Base 3.5.0-1
- rtnl_link_ipvti_set_ikey@libnl_3 3.5.0-1
- rtnl_link_ipvti_set_link@Base 3.5.0-1
- rtnl_link_ipvti_set_link@libnl_3 3.5.0-1
- rtnl_link_ipvti_set_local@Base 3.5.0-1
- rtnl_link_ipvti_set_local@libnl_3 3.5.0-1
- rtnl_link_ipvti_set_okey@Base 3.5.0-1
- rtnl_link_ipvti_set_okey@libnl_3 3.5.0-1
- rtnl_link_ipvti_set_remote@Base 3.5.0-1
- rtnl_link_ipvti_set_remote@libnl_3 3.5.0-1
- rtnl_link_is_bridge@Base 3.5.0-1
- rtnl_link_is_bridge@libnl_3 3.5.0-1
- rtnl_link_is_can@Base 3.5.0-1
- rtnl_link_is_can@libnl_3 3.5.0-1
- rtnl_link_is_geneve@libnl_3_5 3.5.0-1
- rtnl_link_is_ip6_tnl@Base 3.5.0-1
- rtnl_link_is_ip6_tnl@libnl_3 3.5.0-1
- rtnl_link_is_ipgre@Base 3.5.0-1
- rtnl_link_is_ipgre@libnl_3 3.5.0-1
- rtnl_link_is_ipgretap@libnl_3_2_29 3.5.0-1
- rtnl_link_is_ipip@Base 3.5.0-1
- rtnl_link_is_ipip@libnl_3 3.5.0-1
- rtnl_link_is_ipvlan@Base 3.5.0-1
- rtnl_link_is_ipvlan@libnl_3_2_27 3.5.0-1
- rtnl_link_is_ipvti@Base 3.5.0-1
- rtnl_link_is_ipvti@libnl_3 3.5.0-1
- rtnl_link_is_macvlan@Base 3.5.0-1
- rtnl_link_is_macvlan@libnl_3 3.5.0-1
- rtnl_link_is_macvtap@libnl_3_2_28 3.5.0-1
- rtnl_link_is_sit@Base 3.5.0-1
- rtnl_link_is_sit@libnl_3 3.5.0-1
- rtnl_link_is_veth@Base 3.5.0-1
- rtnl_link_is_veth@libnl_3 3.5.0-1
- rtnl_link_is_vlan@Base 3.5.0-1
- rtnl_link_is_vlan@libnl_3 3.5.0-1
- rtnl_link_is_vrf@libnl_3_2_28 3.5.0-1
- rtnl_link_is_vxlan@Base 3.5.0-1
- rtnl_link_is_vxlan@libnl_3 3.5.0-1
- rtnl_link_is_xfrmi@libnl_3_5 3.5.0-1
- rtnl_link_macsec_alloc@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_get_cipher_suite@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_get_encoding_sa@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_get_encrypt@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_get_end_station@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_get_icv_len@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_get_port@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_get_protect@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_get_replay_protect@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_get_scb@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_get_sci@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_get_send_sci@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_get_validation_type@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_get_window@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_set_cipher_suite@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_set_encoding_sa@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_set_encrypt@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_set_end_station@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_set_icv_len@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_set_port@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_set_protect@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_set_replay_protect@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_set_scb@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_set_sci@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_set_send_sci@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_set_validation_type@libnl_3_2_28 3.5.0-1
- rtnl_link_macsec_set_window@libnl_3_2_28 3.5.0-1
- rtnl_link_macvlan_add_macaddr@libnl_3_2_29 3.5.0-1
- rtnl_link_macvlan_alloc@Base 3.5.0-1
- rtnl_link_macvlan_alloc@libnl_3 3.5.0-1
- rtnl_link_macvlan_count_macaddr@libnl_3_2_29 3.5.0-1
- rtnl_link_macvlan_del_macaddr@libnl_3_2_29 3.5.0-1
- rtnl_link_macvlan_flags2str@Base 3.5.0-1
- rtnl_link_macvlan_flags2str@libnl_3 3.5.0-1
- rtnl_link_macvlan_get_flags@Base 3.5.0-1
- rtnl_link_macvlan_get_flags@libnl_3 3.5.0-1
- rtnl_link_macvlan_get_macaddr@libnl_3_2_29 3.5.0-1
- rtnl_link_macvlan_get_macmode@libnl_3_2_29 3.5.0-1
- rtnl_link_macvlan_get_mode@Base 3.5.0-1
- rtnl_link_macvlan_get_mode@libnl_3 3.5.0-1
- rtnl_link_macvlan_macmode2str@libnl_3_2_29 3.5.0-1
- rtnl_link_macvlan_mode2str@Base 3.5.0-1
- rtnl_link_macvlan_mode2str@libnl_3 3.5.0-1
- rtnl_link_macvlan_set_flags@Base 3.5.0-1
- rtnl_link_macvlan_set_flags@libnl_3 3.5.0-1
- rtnl_link_macvlan_set_macmode@libnl_3_2_29 3.5.0-1
- rtnl_link_macvlan_set_mode@Base 3.5.0-1
- rtnl_link_macvlan_set_mode@libnl_3 3.5.0-1
- rtnl_link_macvlan_str2flags@Base 3.5.0-1
- rtnl_link_macvlan_str2flags@libnl_3 3.5.0-1
- rtnl_link_macvlan_str2macmode@libnl_3_2_29 3.5.0-1
- rtnl_link_macvlan_str2mode@Base 3.5.0-1
- rtnl_link_macvlan_str2mode@libnl_3 3.5.0-1
- rtnl_link_macvlan_unset_flags@Base 3.5.0-1
- rtnl_link_macvlan_unset_flags@libnl_3 3.5.0-1
- rtnl_link_macvtap_alloc@libnl_3_2_28 3.5.0-1
- rtnl_link_macvtap_flags2str@libnl_3_2_28 3.5.0-1
- rtnl_link_macvtap_get_flags@libnl_3_2_28 3.5.0-1
- rtnl_link_macvtap_get_mode@libnl_3_2_28 3.5.0-1
- rtnl_link_macvtap_mode2str@libnl_3_2_28 3.5.0-1
- rtnl_link_macvtap_set_flags@libnl_3_2_28 3.5.0-1
- rtnl_link_macvtap_set_mode@libnl_3_2_28 3.5.0-1
- rtnl_link_macvtap_str2flags@libnl_3_2_28 3.5.0-1
- rtnl_link_macvtap_str2mode@libnl_3_2_28 3.5.0-1
- rtnl_link_macvtap_unset_flags@libnl_3_2_28 3.5.0-1
- rtnl_link_mode2str@Base 3.5.0-1
- rtnl_link_mode2str@libnl_3 3.5.0-1
- rtnl_link_name2i@Base 3.5.0-1
- rtnl_link_name2i@libnl_3 3.5.0-1
- rtnl_link_operstate2str@Base 3.5.0-1
- rtnl_link_operstate2str@libnl_3 3.5.0-1
- rtnl_link_ppp_alloc@libnl_3_2_29 3.5.0-1
- rtnl_link_ppp_get_fd@libnl_3_2_29 3.5.0-1
- rtnl_link_ppp_set_fd@libnl_3_2_29 3.5.0-1
- rtnl_link_put@Base 3.5.0-1
- rtnl_link_put@libnl_3 3.5.0-1
- rtnl_link_register_info@Base 3.5.0-1
- rtnl_link_register_info@libnl_3 3.5.0-1
- rtnl_link_release@Base 3.5.0-1
- rtnl_link_release@libnl_3 3.5.0-1
- rtnl_link_release_ifindex@Base 3.5.0-1
- rtnl_link_release_ifindex@libnl_3 3.5.0-1
- rtnl_link_set_addr@Base 3.5.0-1
- rtnl_link_set_addr@libnl_3 3.5.0-1
- rtnl_link_set_arptype@Base 3.5.0-1
- rtnl_link_set_arptype@libnl_3 3.5.0-1
- rtnl_link_set_broadcast@Base 3.5.0-1
- rtnl_link_set_broadcast@libnl_3 3.5.0-1
- rtnl_link_set_carrier@Base 3.5.0-1
- rtnl_link_set_carrier@libnl_3 3.5.0-1
- rtnl_link_set_family@Base 3.5.0-1
- rtnl_link_set_family@libnl_3 3.5.0-1
- rtnl_link_set_flags@Base 3.5.0-1
- rtnl_link_set_flags@libnl_3 3.5.0-1
- rtnl_link_set_group@Base 3.5.0-1
- rtnl_link_set_group@libnl_3 3.5.0-1
- rtnl_link_set_ifalias@Base 3.5.0-1
- rtnl_link_set_ifalias@libnl_3 3.5.0-1
- rtnl_link_set_ifindex@Base 3.5.0-1
- rtnl_link_set_ifindex@libnl_3 3.5.0-1
- rtnl_link_set_info_type@Base 3.5.0-1
- rtnl_link_set_info_type@libnl_3 3.5.0-1
- rtnl_link_set_link@Base 3.5.0-1
- rtnl_link_set_link@libnl_3 3.5.0-1
- rtnl_link_set_link_netnsid@Base 3.5.0-1
- rtnl_link_set_link_netnsid@libnl_3_2_27 3.5.0-1
- rtnl_link_set_linkmode@Base 3.5.0-1
- rtnl_link_set_linkmode@libnl_3 3.5.0-1
- rtnl_link_set_master@Base 3.5.0-1
- rtnl_link_set_master@libnl_3 3.5.0-1
- rtnl_link_set_mtu@Base 3.5.0-1
- rtnl_link_set_mtu@libnl_3 3.5.0-1
- rtnl_link_set_name@Base 3.5.0-1
- rtnl_link_set_name@libnl_3 3.5.0-1
- rtnl_link_set_ns_fd@Base 3.5.0-1
- rtnl_link_set_ns_fd@libnl_3 3.5.0-1
- rtnl_link_set_ns_pid@Base 3.5.0-1
- rtnl_link_set_ns_pid@libnl_3 3.5.0-1
- rtnl_link_set_num_rx_queues@Base 3.5.0-1
- rtnl_link_set_num_rx_queues@libnl_3 3.5.0-1
- rtnl_link_set_num_tx_queues@Base 3.5.0-1
- rtnl_link_set_num_tx_queues@libnl_3 3.5.0-1
- rtnl_link_set_operstate@Base 3.5.0-1
- rtnl_link_set_operstate@libnl_3 3.5.0-1
- rtnl_link_set_promiscuity@Base 3.5.0-1
- rtnl_link_set_promiscuity@libnl_3 3.5.0-1
- rtnl_link_set_qdisc@Base 3.5.0-1
- rtnl_link_set_qdisc@libnl_3 3.5.0-1
- rtnl_link_set_slave_type@libnl_3_5 3.5.0-1
- rtnl_link_set_stat@Base 3.5.0-1
- rtnl_link_set_stat@libnl_3 3.5.0-1
- rtnl_link_set_txqlen@Base 3.5.0-1
- rtnl_link_set_txqlen@libnl_3 3.5.0-1
- rtnl_link_set_type@Base 3.5.0-1
- rtnl_link_set_type@libnl_3 3.5.0-1
- rtnl_link_set_vf_list@libnl_3_2_29 3.5.0-1
- rtnl_link_set_weight@Base 3.5.0-1
- rtnl_link_set_weight@libnl_3 3.5.0-1
- rtnl_link_sit_add@Base 3.5.0-1
- rtnl_link_sit_add@libnl_3 3.5.0-1
- rtnl_link_sit_alloc@Base 3.5.0-1
- rtnl_link_sit_alloc@libnl_3 3.5.0-1
- rtnl_link_sit_get_flags@Base 3.5.0-1
- rtnl_link_sit_get_flags@libnl_3 3.5.0-1
- rtnl_link_sit_get_ip6rd_prefix@libnl_3_2_28 3.5.0-1
- rtnl_link_sit_get_ip6rd_prefixlen@libnl_3_2_28 3.5.0-1
- rtnl_link_sit_get_ip6rd_relay_prefix@libnl_3_2_28 3.5.0-1
- rtnl_link_sit_get_ip6rd_relay_prefixlen@libnl_3_2_28 3.5.0-1
- rtnl_link_sit_get_link@Base 3.5.0-1
- rtnl_link_sit_get_link@libnl_3 3.5.0-1
- rtnl_link_sit_get_local@Base 3.5.0-1
- rtnl_link_sit_get_local@libnl_3 3.5.0-1
- rtnl_link_sit_get_pmtudisc@Base 3.5.0-1
- rtnl_link_sit_get_pmtudisc@libnl_3 3.5.0-1
- rtnl_link_sit_get_proto@Base 3.5.0-1
- rtnl_link_sit_get_proto@libnl_3 3.5.0-1
- rtnl_link_sit_get_remote@Base 3.5.0-1
- rtnl_link_sit_get_remote@libnl_3 3.5.0-1
- rtnl_link_sit_get_tos@Base 3.5.0-1
- rtnl_link_sit_get_tos@libnl_3 3.5.0-1
- rtnl_link_sit_get_ttl@Base 3.5.0-1
- rtnl_link_sit_get_ttl@libnl_3 3.5.0-1
- rtnl_link_sit_set_flags@Base 3.5.0-1
- rtnl_link_sit_set_flags@libnl_3 3.5.0-1
- rtnl_link_sit_set_ip6rd_prefix@libnl_3_2_28 3.5.0-1
- rtnl_link_sit_set_ip6rd_prefixlen@libnl_3_2_28 3.5.0-1
- rtnl_link_sit_set_ip6rd_relay_prefix@libnl_3_2_28 3.5.0-1
- rtnl_link_sit_set_ip6rd_relay_prefixlen@libnl_3_2_28 3.5.0-1
- rtnl_link_sit_set_link@Base 3.5.0-1
- rtnl_link_sit_set_link@libnl_3 3.5.0-1
- rtnl_link_sit_set_local@Base 3.5.0-1
- rtnl_link_sit_set_local@libnl_3 3.5.0-1
- rtnl_link_sit_set_pmtudisc@Base 3.5.0-1
- rtnl_link_sit_set_pmtudisc@libnl_3 3.5.0-1
- rtnl_link_sit_set_proto@Base 3.5.0-1
- rtnl_link_sit_set_proto@libnl_3 3.5.0-1
- rtnl_link_sit_set_remote@Base 3.5.0-1
- rtnl_link_sit_set_remote@libnl_3 3.5.0-1
- rtnl_link_sit_set_tos@Base 3.5.0-1
- rtnl_link_sit_set_tos@libnl_3 3.5.0-1
- rtnl_link_sit_set_ttl@Base 3.5.0-1
- rtnl_link_sit_set_ttl@libnl_3 3.5.0-1
- rtnl_link_stat2str@Base 3.5.0-1
- rtnl_link_stat2str@libnl_3 3.5.0-1
- rtnl_link_str2carrier@Base 3.5.0-1
- rtnl_link_str2carrier@libnl_3 3.5.0-1
- rtnl_link_str2flags@Base 3.5.0-1
- rtnl_link_str2flags@libnl_3 3.5.0-1
- rtnl_link_str2mode@Base 3.5.0-1
- rtnl_link_str2mode@libnl_3 3.5.0-1
- rtnl_link_str2operstate@Base 3.5.0-1
- rtnl_link_str2operstate@libnl_3 3.5.0-1
- rtnl_link_str2stat@Base 3.5.0-1
- rtnl_link_str2stat@libnl_3 3.5.0-1
- rtnl_link_unregister_info@Base 3.5.0-1
- rtnl_link_unregister_info@libnl_3 3.5.0-1
- rtnl_link_unset_flags@Base 3.5.0-1
- rtnl_link_unset_flags@libnl_3 3.5.0-1
- rtnl_link_unset_vf_list@libnl_3_2_29 3.5.0-1
- rtnl_link_veth_add@Base 3.5.0-1
- rtnl_link_veth_add@libnl_3 3.5.0-1
- rtnl_link_veth_alloc@Base 3.5.0-1
- rtnl_link_veth_alloc@libnl_3 3.5.0-1
- rtnl_link_veth_get_peer@Base 3.5.0-1
- rtnl_link_veth_get_peer@libnl_3 3.5.0-1
- rtnl_link_veth_release@Base 3.5.0-1
- rtnl_link_veth_release@libnl_3 3.5.0-1
- rtnl_link_vf_add@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_alloc@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_free@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_get@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_get_addr@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_get_index@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_get_linkstate@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_get_rate@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_get_rss_query_en@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_get_spoofchk@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_get_stat@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_get_trust@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_get_vlans@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_linkstate2str@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_put@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_set_addr@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_set_ib_node_guid@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_set_ib_port_guid@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_set_index@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_set_linkstate@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_set_rate@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_set_rss_query_en@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_set_spoofchk@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_set_trust@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_set_vlans@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_str2guid@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_str2linkstate@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_str2vlanproto@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_vlan_alloc@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_vlan_free@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_vlan_put@libnl_3_2_29 3.5.0-1
- rtnl_link_vf_vlanproto2str@libnl_3_2_29 3.5.0-1
- rtnl_link_vlan_alloc@Base 3.5.0-1
- rtnl_link_vlan_alloc@libnl_3 3.5.0-1
- rtnl_link_vlan_flags2str@Base 3.5.0-1
- rtnl_link_vlan_flags2str@libnl_3 3.5.0-1
- rtnl_link_vlan_get_egress_map@Base 3.5.0-1
- rtnl_link_vlan_get_egress_map@libnl_3 3.5.0-1
- rtnl_link_vlan_get_flags@Base 3.5.0-1
- rtnl_link_vlan_get_flags@libnl_3 3.5.0-1
- rtnl_link_vlan_get_id@Base 3.5.0-1
- rtnl_link_vlan_get_id@libnl_3 3.5.0-1
- rtnl_link_vlan_get_ingress_map@Base 3.5.0-1
- rtnl_link_vlan_get_ingress_map@libnl_3 3.5.0-1
- rtnl_link_vlan_get_protocol@Base 3.5.0-1
- rtnl_link_vlan_get_protocol@libnl_3 3.5.0-1
- rtnl_link_vlan_set_egress_map@Base 3.5.0-1
- rtnl_link_vlan_set_egress_map@libnl_3 3.5.0-1
- rtnl_link_vlan_set_flags@Base 3.5.0-1
- rtnl_link_vlan_set_flags@libnl_3 3.5.0-1
- rtnl_link_vlan_set_id@Base 3.5.0-1
- rtnl_link_vlan_set_id@libnl_3 3.5.0-1
- rtnl_link_vlan_set_ingress_map@Base 3.5.0-1
- rtnl_link_vlan_set_ingress_map@libnl_3 3.5.0-1
- rtnl_link_vlan_set_protocol@Base 3.5.0-1
- rtnl_link_vlan_set_protocol@libnl_3 3.5.0-1
- rtnl_link_vlan_str2flags@Base 3.5.0-1
- rtnl_link_vlan_str2flags@libnl_3 3.5.0-1
- rtnl_link_vlan_unset_flags@Base 3.5.0-1
- rtnl_link_vlan_unset_flags@libnl_3 3.5.0-1
- rtnl_link_vrf_alloc@libnl_3_2_28 3.5.0-1
- rtnl_link_vrf_get_tableid@libnl_3_2_28 3.5.0-1
- rtnl_link_vrf_set_tableid@libnl_3_2_28 3.5.0-1
- rtnl_link_vxlan_alloc@Base 3.5.0-1
- rtnl_link_vxlan_alloc@libnl_3 3.5.0-1
- rtnl_link_vxlan_disable_l2miss@Base 3.5.0-1
- rtnl_link_vxlan_disable_l2miss@libnl_3 3.5.0-1
- rtnl_link_vxlan_disable_l3miss@Base 3.5.0-1
- rtnl_link_vxlan_disable_l3miss@libnl_3 3.5.0-1
- rtnl_link_vxlan_disable_learning@Base 3.5.0-1
- rtnl_link_vxlan_disable_learning@libnl_3 3.5.0-1
- rtnl_link_vxlan_disable_proxy@Base 3.5.0-1
- rtnl_link_vxlan_disable_proxy@libnl_3 3.5.0-1
- rtnl_link_vxlan_disable_rsc@Base 3.5.0-1
- rtnl_link_vxlan_disable_rsc@libnl_3 3.5.0-1
- rtnl_link_vxlan_enable_l2miss@Base 3.5.0-1
- rtnl_link_vxlan_enable_l2miss@libnl_3 3.5.0-1
- rtnl_link_vxlan_enable_l3miss@Base 3.5.0-1
- rtnl_link_vxlan_enable_l3miss@libnl_3 3.5.0-1
- rtnl_link_vxlan_enable_learning@Base 3.5.0-1
- rtnl_link_vxlan_enable_learning@libnl_3 3.5.0-1
- rtnl_link_vxlan_enable_proxy@Base 3.5.0-1
- rtnl_link_vxlan_enable_proxy@libnl_3 3.5.0-1
- rtnl_link_vxlan_enable_rsc@Base 3.5.0-1
- rtnl_link_vxlan_enable_rsc@libnl_3 3.5.0-1
- rtnl_link_vxlan_get_ageing@Base 3.5.0-1
- rtnl_link_vxlan_get_ageing@libnl_3 3.5.0-1
- rtnl_link_vxlan_get_collect_metadata@libnl_3_2_29 3.5.0-1
- rtnl_link_vxlan_get_flags@libnl_3_2_29 3.5.0-1
- rtnl_link_vxlan_get_group@Base 3.5.0-1
- rtnl_link_vxlan_get_group@libnl_3 3.5.0-1
- rtnl_link_vxlan_get_id@Base 3.5.0-1
- rtnl_link_vxlan_get_id@libnl_3 3.5.0-1
- rtnl_link_vxlan_get_l2miss@Base 3.5.0-1
- rtnl_link_vxlan_get_l2miss@libnl_3 3.5.0-1
- rtnl_link_vxlan_get_l3miss@Base 3.5.0-1
- rtnl_link_vxlan_get_l3miss@libnl_3 3.5.0-1
- rtnl_link_vxlan_get_label@libnl_3_2_29 3.5.0-1
- rtnl_link_vxlan_get_learning@Base 3.5.0-1
- rtnl_link_vxlan_get_learning@libnl_3 3.5.0-1
- rtnl_link_vxlan_get_limit@Base 3.5.0-1
- rtnl_link_vxlan_get_limit@libnl_3 3.5.0-1
- rtnl_link_vxlan_get_link@Base 3.5.0-1
- rtnl_link_vxlan_get_link@libnl_3 3.5.0-1
- rtnl_link_vxlan_get_local@Base 3.5.0-1
- rtnl_link_vxlan_get_local@libnl_3 3.5.0-1
- rtnl_link_vxlan_get_port@libnl_3_2_29 3.5.0-1
- rtnl_link_vxlan_get_port_range@Base 3.5.0-1
- rtnl_link_vxlan_get_port_range@libnl_3 3.5.0-1
- rtnl_link_vxlan_get_proxy@Base 3.5.0-1
- rtnl_link_vxlan_get_proxy@libnl_3 3.5.0-1
- rtnl_link_vxlan_get_remcsum_rx@libnl_3_2_29 3.5.0-1
- rtnl_link_vxlan_get_remcsum_tx@libnl_3_2_29 3.5.0-1
- rtnl_link_vxlan_get_rsc@Base 3.5.0-1
- rtnl_link_vxlan_get_rsc@libnl_3 3.5.0-1
- rtnl_link_vxlan_get_tos@Base 3.5.0-1
- rtnl_link_vxlan_get_tos@libnl_3 3.5.0-1
- rtnl_link_vxlan_get_ttl@Base 3.5.0-1
- rtnl_link_vxlan_get_ttl@libnl_3 3.5.0-1
- rtnl_link_vxlan_get_udp_csum@libnl_3_2_29 3.5.0-1
- rtnl_link_vxlan_get_udp_zero_csum6_rx@libnl_3_2_29 3.5.0-1
- rtnl_link_vxlan_get_udp_zero_csum6_tx@libnl_3_2_29 3.5.0-1
- rtnl_link_vxlan_set_ageing@Base 3.5.0-1
- rtnl_link_vxlan_set_ageing@libnl_3 3.5.0-1
- rtnl_link_vxlan_set_collect_metadata@libnl_3_2_29 3.5.0-1
- rtnl_link_vxlan_set_flags@libnl_3_2_29 3.5.0-1
- rtnl_link_vxlan_set_group@Base 3.5.0-1
- rtnl_link_vxlan_set_group@libnl_3 3.5.0-1
- rtnl_link_vxlan_set_id@Base 3.5.0-1
- rtnl_link_vxlan_set_id@libnl_3 3.5.0-1
- rtnl_link_vxlan_set_l2miss@Base 3.5.0-1
- rtnl_link_vxlan_set_l2miss@libnl_3 3.5.0-1
- rtnl_link_vxlan_set_l3miss@Base 3.5.0-1
- rtnl_link_vxlan_set_l3miss@libnl_3 3.5.0-1
- rtnl_link_vxlan_set_label@libnl_3_2_29 3.5.0-1
- rtnl_link_vxlan_set_learning@Base 3.5.0-1
- rtnl_link_vxlan_set_learning@libnl_3 3.5.0-1
- rtnl_link_vxlan_set_limit@Base 3.5.0-1
- rtnl_link_vxlan_set_limit@libnl_3 3.5.0-1
- rtnl_link_vxlan_set_link@Base 3.5.0-1
- rtnl_link_vxlan_set_link@libnl_3 3.5.0-1
- rtnl_link_vxlan_set_local@Base 3.5.0-1
- rtnl_link_vxlan_set_local@libnl_3 3.5.0-1
- rtnl_link_vxlan_set_port@libnl_3_2_29 3.5.0-1
- rtnl_link_vxlan_set_port_range@Base 3.5.0-1
- rtnl_link_vxlan_set_port_range@libnl_3 3.5.0-1
- rtnl_link_vxlan_set_proxy@Base 3.5.0-1
- rtnl_link_vxlan_set_proxy@libnl_3 3.5.0-1
- rtnl_link_vxlan_set_remcsum_rx@libnl_3_2_29 3.5.0-1
- rtnl_link_vxlan_set_remcsum_tx@libnl_3_2_29 3.5.0-1
- rtnl_link_vxlan_set_rsc@Base 3.5.0-1
- rtnl_link_vxlan_set_rsc@libnl_3 3.5.0-1
- rtnl_link_vxlan_set_tos@Base 3.5.0-1
- rtnl_link_vxlan_set_tos@libnl_3 3.5.0-1
- rtnl_link_vxlan_set_ttl@Base 3.5.0-1
- rtnl_link_vxlan_set_ttl@libnl_3 3.5.0-1
- rtnl_link_vxlan_set_udp_csum@libnl_3_2_29 3.5.0-1
- rtnl_link_vxlan_set_udp_zero_csum6_rx@libnl_3_2_29 3.5.0-1
- rtnl_link_vxlan_set_udp_zero_csum6_tx@libnl_3_2_29 3.5.0-1
- rtnl_link_xfrmi_alloc@libnl_3_5 3.5.0-1
- rtnl_link_xfrmi_get_if_id@libnl_3_5 3.5.0-1
- rtnl_link_xfrmi_get_link@libnl_3_5 3.5.0-1
- rtnl_link_xfrmi_set_if_id@libnl_3_5 3.5.0-1
- rtnl_link_xfrmi_set_link@libnl_3_5 3.5.0-1
- rtnl_mall_append_action@libnl_3_5 3.5.0-1
- rtnl_mall_del_action@libnl_3_5 3.5.0-1
- rtnl_mall_get_classid@libnl_3_5 3.5.0-1
- rtnl_mall_get_first_action@libnl_3_5 3.5.0-1
- rtnl_mall_get_flags@libnl_3_5 3.5.0-1
- rtnl_mall_set_classid@libnl_3_5 3.5.0-1
- rtnl_mall_set_flags@libnl_3_5 3.5.0-1
- rtnl_meta_value_alloc_id@Base 3.5.0-1
- rtnl_meta_value_alloc_id@libnl_3 3.5.0-1
- rtnl_meta_value_alloc_int@Base 3.5.0-1
- rtnl_meta_value_alloc_int@libnl_3 3.5.0-1
- rtnl_meta_value_alloc_var@Base 3.5.0-1
- rtnl_meta_value_alloc_var@libnl_3 3.5.0-1
- rtnl_meta_value_put@Base 3.5.0-1
- rtnl_meta_value_put@libnl_3 3.5.0-1
- rtnl_mirred_get_action@Base 3.5.0-1
- rtnl_mirred_get_action@libnl_3 3.5.0-1
- rtnl_mirred_get_ifindex@Base 3.5.0-1
- rtnl_mirred_get_ifindex@libnl_3 3.5.0-1
- rtnl_mirred_get_policy@Base 3.5.0-1
- rtnl_mirred_get_policy@libnl_3 3.5.0-1
- rtnl_mirred_set_action@Base 3.5.0-1
- rtnl_mirred_set_action@libnl_3 3.5.0-1
- rtnl_mirred_set_ifindex@Base 3.5.0-1
- rtnl_mirred_set_ifindex@libnl_3 3.5.0-1
- rtnl_mirred_set_policy@Base 3.5.0-1
- rtnl_mirred_set_policy@libnl_3 3.5.0-1
- rtnl_neigh_add@Base 3.5.0-1
- rtnl_neigh_add@libnl_3 3.5.0-1
- rtnl_neigh_alloc@Base 3.5.0-1
- rtnl_neigh_alloc@libnl_3 3.5.0-1
- rtnl_neigh_alloc_cache@Base 3.5.0-1
- rtnl_neigh_alloc_cache@libnl_3 3.5.0-1
- rtnl_neigh_alloc_cache_flags@libnl_3_2_28 3.5.0-1
- rtnl_neigh_build_add_request@Base 3.5.0-1
- rtnl_neigh_build_add_request@libnl_3 3.5.0-1
- rtnl_neigh_build_delete_request@Base 3.5.0-1
- rtnl_neigh_build_delete_request@libnl_3 3.5.0-1
- rtnl_neigh_delete@Base 3.5.0-1
- rtnl_neigh_delete@libnl_3 3.5.0-1
- rtnl_neigh_flags2str@Base 3.5.0-1
- rtnl_neigh_flags2str@libnl_3 3.5.0-1
- rtnl_neigh_get@Base 3.5.0-1
- rtnl_neigh_get@libnl_3 3.5.0-1
- rtnl_neigh_get_by_vlan@libnl_3_5 3.5.0-1
- rtnl_neigh_get_dst@Base 3.5.0-1
- rtnl_neigh_get_dst@libnl_3 3.5.0-1
- rtnl_neigh_get_family@Base 3.5.0-1
- rtnl_neigh_get_family@libnl_3 3.5.0-1
- rtnl_neigh_get_flags@Base 3.5.0-1
- rtnl_neigh_get_flags@libnl_3 3.5.0-1
- rtnl_neigh_get_ifindex@Base 3.5.0-1
- rtnl_neigh_get_ifindex@libnl_3 3.5.0-1
- rtnl_neigh_get_lladdr@Base 3.5.0-1
- rtnl_neigh_get_lladdr@libnl_3 3.5.0-1
- rtnl_neigh_get_master@libnl_3_5 3.5.0-1
- rtnl_neigh_get_state@Base 3.5.0-1
- rtnl_neigh_get_state@libnl_3 3.5.0-1
- rtnl_neigh_get_type@Base 3.5.0-1
- rtnl_neigh_get_type@libnl_3 3.5.0-1
- rtnl_neigh_get_vlan@Base 3.5.0-1
- rtnl_neigh_get_vlan@libnl_3_2_26 3.5.0-1
- rtnl_neigh_parse@Base 3.5.0-1
- rtnl_neigh_parse@libnl_3 3.5.0-1
- rtnl_neigh_put@Base 3.5.0-1
- rtnl_neigh_put@libnl_3 3.5.0-1
- rtnl_neigh_set_dst@Base 3.5.0-1
- rtnl_neigh_set_dst@libnl_3 3.5.0-1
- rtnl_neigh_set_family@Base 3.5.0-1
- rtnl_neigh_set_family@libnl_3 3.5.0-1
- rtnl_neigh_set_flags@Base 3.5.0-1
- rtnl_neigh_set_flags@libnl_3 3.5.0-1
- rtnl_neigh_set_ifindex@Base 3.5.0-1
- rtnl_neigh_set_ifindex@libnl_3 3.5.0-1
- rtnl_neigh_set_lladdr@Base 3.5.0-1
- rtnl_neigh_set_lladdr@libnl_3 3.5.0-1
- rtnl_neigh_set_master@libnl_3_5 3.5.0-1
- rtnl_neigh_set_state@Base 3.5.0-1
- rtnl_neigh_set_state@libnl_3 3.5.0-1
- rtnl_neigh_set_type@Base 3.5.0-1
- rtnl_neigh_set_type@libnl_3 3.5.0-1
- rtnl_neigh_set_vlan@Base 3.5.0-1
- rtnl_neigh_set_vlan@libnl_3_2_26 3.5.0-1
- rtnl_neigh_state2str@Base 3.5.0-1
- rtnl_neigh_state2str@libnl_3 3.5.0-1
- rtnl_neigh_str2flag@Base 3.5.0-1
- rtnl_neigh_str2flag@libnl_3 3.5.0-1
- rtnl_neigh_str2state@Base 3.5.0-1
- rtnl_neigh_str2state@libnl_3 3.5.0-1
- rtnl_neigh_unset_flags@Base 3.5.0-1
- rtnl_neigh_unset_flags@libnl_3 3.5.0-1
- rtnl_neigh_unset_state@Base 3.5.0-1
- rtnl_neigh_unset_state@libnl_3 3.5.0-1
- rtnl_neightbl_alloc@Base 3.5.0-1
- rtnl_neightbl_alloc@libnl_3 3.5.0-1
- rtnl_neightbl_alloc_cache@Base 3.5.0-1
- rtnl_neightbl_alloc_cache@libnl_3 3.5.0-1
- rtnl_neightbl_build_change_request@Base 3.5.0-1
- rtnl_neightbl_build_change_request@libnl_3 3.5.0-1
- rtnl_neightbl_change@Base 3.5.0-1
- rtnl_neightbl_change@libnl_3 3.5.0-1
- rtnl_neightbl_get@Base 3.5.0-1
- rtnl_neightbl_get@libnl_3 3.5.0-1
- rtnl_neightbl_put@Base 3.5.0-1
- rtnl_neightbl_put@libnl_3 3.5.0-1
- rtnl_neightbl_set_anycast_delay@Base 3.5.0-1
- rtnl_neightbl_set_anycast_delay@libnl_3 3.5.0-1
- rtnl_neightbl_set_app_probes@Base 3.5.0-1
- rtnl_neightbl_set_app_probes@libnl_3 3.5.0-1
- rtnl_neightbl_set_base_reachable_time@Base 3.5.0-1
- rtnl_neightbl_set_base_reachable_time@libnl_3 3.5.0-1
- rtnl_neightbl_set_delay_probe_time@Base 3.5.0-1
- rtnl_neightbl_set_delay_probe_time@libnl_3 3.5.0-1
- rtnl_neightbl_set_dev@Base 3.5.0-1
- rtnl_neightbl_set_dev@libnl_3 3.5.0-1
- rtnl_neightbl_set_family@Base 3.5.0-1
- rtnl_neightbl_set_family@libnl_3 3.5.0-1
- rtnl_neightbl_set_gc_interval@Base 3.5.0-1
- rtnl_neightbl_set_gc_interval@libnl_3 3.5.0-1
- rtnl_neightbl_set_gc_stale_time@Base 3.5.0-1
- rtnl_neightbl_set_gc_stale_time@libnl_3 3.5.0-1
- rtnl_neightbl_set_gc_tresh1@Base 3.5.0-1
- rtnl_neightbl_set_gc_tresh1@libnl_3 3.5.0-1
- rtnl_neightbl_set_gc_tresh2@Base 3.5.0-1
- rtnl_neightbl_set_gc_tresh2@libnl_3 3.5.0-1
- rtnl_neightbl_set_gc_tresh3@Base 3.5.0-1
- rtnl_neightbl_set_gc_tresh3@libnl_3 3.5.0-1
- rtnl_neightbl_set_locktime@Base 3.5.0-1
- rtnl_neightbl_set_locktime@libnl_3 3.5.0-1
- rtnl_neightbl_set_mcast_probes@Base 3.5.0-1
- rtnl_neightbl_set_mcast_probes@libnl_3 3.5.0-1
- rtnl_neightbl_set_name@Base 3.5.0-1
- rtnl_neightbl_set_name@libnl_3 3.5.0-1
- rtnl_neightbl_set_proxy_delay@Base 3.5.0-1
- rtnl_neightbl_set_proxy_delay@libnl_3 3.5.0-1
- rtnl_neightbl_set_proxy_queue_len@Base 3.5.0-1
- rtnl_neightbl_set_proxy_queue_len@libnl_3 3.5.0-1
- rtnl_neightbl_set_queue_len@Base 3.5.0-1
- rtnl_neightbl_set_queue_len@libnl_3 3.5.0-1
- rtnl_neightbl_set_retrans_time@Base 3.5.0-1
- rtnl_neightbl_set_retrans_time@libnl_3 3.5.0-1
- rtnl_neightbl_set_ucast_probes@Base 3.5.0-1
- rtnl_neightbl_set_ucast_probes@libnl_3 3.5.0-1
- rtnl_netconf_get_all@libnl_3_4 3.5.0-1
- rtnl_netconf_get_by_idx@libnl_3_4 3.5.0-1
- rtnl_netconf_get_default@libnl_3_4 3.5.0-1
- rtnl_netconf_get_family@libnl_3_4 3.5.0-1
- rtnl_netconf_get_forwarding@libnl_3_4 3.5.0-1
- rtnl_netconf_get_ifindex@libnl_3_4 3.5.0-1
- rtnl_netconf_get_input@libnl_3_4 3.5.0-1
- rtnl_netconf_get_mc_forwarding@libnl_3_4 3.5.0-1
- rtnl_netconf_get_rp_filter@libnl_3_4 3.5.0-1
- rtnl_netconf_put@libnl_3_4 3.5.0-1
- rtnl_netem_get_corruption_correlation@Base 3.5.0-1
- rtnl_netem_get_corruption_correlation@libnl_3 3.5.0-1
- rtnl_netem_get_corruption_probability@Base 3.5.0-1
- rtnl_netem_get_corruption_probability@libnl_3 3.5.0-1
- rtnl_netem_get_delay@Base 3.5.0-1
- rtnl_netem_get_delay@libnl_3 3.5.0-1
- rtnl_netem_get_delay_correlation@Base 3.5.0-1
- rtnl_netem_get_delay_correlation@libnl_3 3.5.0-1
- rtnl_netem_get_delay_distribution@Base 3.5.0-1
- rtnl_netem_get_delay_distribution@libnl_3 3.5.0-1
- rtnl_netem_get_delay_distribution_size@Base 3.5.0-1
- rtnl_netem_get_delay_distribution_size@libnl_3 3.5.0-1
- rtnl_netem_get_duplicate@Base 3.5.0-1
- rtnl_netem_get_duplicate@libnl_3 3.5.0-1
- rtnl_netem_get_duplicate_correlation@Base 3.5.0-1
- rtnl_netem_get_duplicate_correlation@libnl_3 3.5.0-1
- rtnl_netem_get_gap@Base 3.5.0-1
- rtnl_netem_get_gap@libnl_3 3.5.0-1
- rtnl_netem_get_jitter@Base 3.5.0-1
- rtnl_netem_get_jitter@libnl_3 3.5.0-1
- rtnl_netem_get_limit@Base 3.5.0-1
- rtnl_netem_get_limit@libnl_3 3.5.0-1
- rtnl_netem_get_loss@Base 3.5.0-1
- rtnl_netem_get_loss@libnl_3 3.5.0-1
- rtnl_netem_get_loss_correlation@Base 3.5.0-1
- rtnl_netem_get_loss_correlation@libnl_3 3.5.0-1
- rtnl_netem_get_reorder_correlation@Base 3.5.0-1
- rtnl_netem_get_reorder_correlation@libnl_3 3.5.0-1
- rtnl_netem_get_reorder_probability@Base 3.5.0-1
- rtnl_netem_get_reorder_probability@libnl_3 3.5.0-1
- rtnl_netem_set_corruption_correlation@Base 3.5.0-1
- rtnl_netem_set_corruption_correlation@libnl_3 3.5.0-1
- rtnl_netem_set_corruption_probability@Base 3.5.0-1
- rtnl_netem_set_corruption_probability@libnl_3 3.5.0-1
- rtnl_netem_set_delay@Base 3.5.0-1
- rtnl_netem_set_delay@libnl_3 3.5.0-1
- rtnl_netem_set_delay_correlation@Base 3.5.0-1
- rtnl_netem_set_delay_correlation@libnl_3 3.5.0-1
- rtnl_netem_set_delay_distribution@Base 3.5.0-1
- rtnl_netem_set_delay_distribution@libnl_3 3.5.0-1
- rtnl_netem_set_delay_distribution_data@libnl_3_5 3.5.0-1
- rtnl_netem_set_duplicate@Base 3.5.0-1
- rtnl_netem_set_duplicate@libnl_3 3.5.0-1
- rtnl_netem_set_duplicate_correlation@Base 3.5.0-1
- rtnl_netem_set_duplicate_correlation@libnl_3 3.5.0-1
- rtnl_netem_set_gap@Base 3.5.0-1
- rtnl_netem_set_gap@libnl_3 3.5.0-1
- rtnl_netem_set_jitter@Base 3.5.0-1
- rtnl_netem_set_jitter@libnl_3 3.5.0-1
- rtnl_netem_set_limit@Base 3.5.0-1
- rtnl_netem_set_limit@libnl_3 3.5.0-1
- rtnl_netem_set_loss@Base 3.5.0-1
- rtnl_netem_set_loss@libnl_3 3.5.0-1
- rtnl_netem_set_loss_correlation@Base 3.5.0-1
- rtnl_netem_set_loss_correlation@libnl_3 3.5.0-1
- rtnl_netem_set_reorder_correlation@Base 3.5.0-1
- rtnl_netem_set_reorder_correlation@libnl_3 3.5.0-1
- rtnl_netem_set_reorder_probability@Base 3.5.0-1
- rtnl_netem_set_reorder_probability@libnl_3 3.5.0-1
- rtnl_pktloc_add@Base 3.5.0-1
- rtnl_pktloc_add@libnl_3 3.5.0-1
- rtnl_pktloc_alloc@Base 3.5.0-1
- rtnl_pktloc_alloc@libnl_3 3.5.0-1
- rtnl_pktloc_foreach@Base 3.5.0-1
- rtnl_pktloc_foreach@libnl_3 3.5.0-1
- rtnl_pktloc_lookup@Base 3.5.0-1
- rtnl_pktloc_lookup@libnl_3 3.5.0-1
- rtnl_pktloc_put@Base 3.5.0-1
- rtnl_pktloc_put@libnl_3 3.5.0-1
- rtnl_prio2str@Base 3.5.0-1
- rtnl_prio2str@libnl_3 3.5.0-1
- rtnl_qdisc_add@Base 3.5.0-1
- rtnl_qdisc_add@libnl_3 3.5.0-1
- rtnl_qdisc_alloc@Base 3.5.0-1
- rtnl_qdisc_alloc@libnl_3 3.5.0-1
- rtnl_qdisc_alloc_cache@Base 3.5.0-1
- rtnl_qdisc_alloc_cache@libnl_3 3.5.0-1
- rtnl_qdisc_build_add_request@Base 3.5.0-1
- rtnl_qdisc_build_add_request@libnl_3 3.5.0-1
- rtnl_qdisc_build_change_request@Base 3.5.0-1
- rtnl_qdisc_build_change_request@libnl_3 3.5.0-1
- rtnl_qdisc_build_delete_request@Base 3.5.0-1
- rtnl_qdisc_build_delete_request@libnl_3 3.5.0-1
- rtnl_qdisc_build_update_request@Base 3.5.0-1
- rtnl_qdisc_build_update_request@libnl_3 3.5.0-1
- rtnl_qdisc_change@Base 3.5.0-1
- rtnl_qdisc_change@libnl_3 3.5.0-1
- rtnl_qdisc_delete@Base 3.5.0-1
- rtnl_qdisc_delete@libnl_3 3.5.0-1
- rtnl_qdisc_dsmark_get_default_index@Base 3.5.0-1
- rtnl_qdisc_dsmark_get_default_index@libnl_3 3.5.0-1
- rtnl_qdisc_dsmark_get_indices@Base 3.5.0-1
- rtnl_qdisc_dsmark_get_indices@libnl_3 3.5.0-1
- rtnl_qdisc_dsmark_get_set_tc_index@Base 3.5.0-1
- rtnl_qdisc_dsmark_get_set_tc_index@libnl_3 3.5.0-1
- rtnl_qdisc_dsmark_set_default_index@Base 3.5.0-1
- rtnl_qdisc_dsmark_set_default_index@libnl_3 3.5.0-1
- rtnl_qdisc_dsmark_set_indices@Base 3.5.0-1
- rtnl_qdisc_dsmark_set_indices@libnl_3 3.5.0-1
- rtnl_qdisc_dsmark_set_set_tc_index@Base 3.5.0-1
- rtnl_qdisc_dsmark_set_set_tc_index@libnl_3 3.5.0-1
- rtnl_qdisc_fifo_get_limit@Base 3.5.0-1
- rtnl_qdisc_fifo_get_limit@libnl_3 3.5.0-1
- rtnl_qdisc_fifo_set_limit@Base 3.5.0-1
- rtnl_qdisc_fifo_set_limit@libnl_3 3.5.0-1
- rtnl_qdisc_foreach_child@Base 3.5.0-1
- rtnl_qdisc_foreach_child@libnl_3 3.5.0-1
- rtnl_qdisc_foreach_cls@Base 3.5.0-1
- rtnl_qdisc_foreach_cls@libnl_3 3.5.0-1
- rtnl_qdisc_fq_codel_get_ecn@Base 3.5.0-1
- rtnl_qdisc_fq_codel_get_ecn@libnl_3 3.5.0-1
- rtnl_qdisc_fq_codel_get_flows@Base 3.5.0-1
- rtnl_qdisc_fq_codel_get_flows@libnl_3 3.5.0-1
- rtnl_qdisc_fq_codel_get_interval@Base 3.5.0-1
- rtnl_qdisc_fq_codel_get_interval@libnl_3 3.5.0-1
- rtnl_qdisc_fq_codel_get_limit@Base 3.5.0-1
- rtnl_qdisc_fq_codel_get_limit@libnl_3 3.5.0-1
- rtnl_qdisc_fq_codel_get_quantum@Base 3.5.0-1
- rtnl_qdisc_fq_codel_get_quantum@libnl_3 3.5.0-1
- rtnl_qdisc_fq_codel_get_target@Base 3.5.0-1
- rtnl_qdisc_fq_codel_get_target@libnl_3 3.5.0-1
- rtnl_qdisc_fq_codel_set_ecn@Base 3.5.0-1
- rtnl_qdisc_fq_codel_set_ecn@libnl_3 3.5.0-1
- rtnl_qdisc_fq_codel_set_flows@Base 3.5.0-1
- rtnl_qdisc_fq_codel_set_flows@libnl_3 3.5.0-1
- rtnl_qdisc_fq_codel_set_interval@Base 3.5.0-1
- rtnl_qdisc_fq_codel_set_interval@libnl_3 3.5.0-1
- rtnl_qdisc_fq_codel_set_limit@Base 3.5.0-1
- rtnl_qdisc_fq_codel_set_limit@libnl_3 3.5.0-1
- rtnl_qdisc_fq_codel_set_quantum@Base 3.5.0-1
- rtnl_qdisc_fq_codel_set_quantum@libnl_3 3.5.0-1
- rtnl_qdisc_fq_codel_set_target@Base 3.5.0-1
- rtnl_qdisc_fq_codel_set_target@libnl_3 3.5.0-1
- rtnl_qdisc_get@Base 3.5.0-1
- rtnl_qdisc_get@libnl_3 3.5.0-1
- rtnl_qdisc_get_by_parent@Base 3.5.0-1
- rtnl_qdisc_get_by_parent@libnl_3 3.5.0-1
- rtnl_qdisc_hfsc_get_defcls@Base 3.5.0-1
- rtnl_qdisc_hfsc_get_defcls@libnl_3 3.5.0-1
- rtnl_qdisc_hfsc_set_defcls@Base 3.5.0-1
- rtnl_qdisc_hfsc_set_defcls@libnl_3 3.5.0-1
- rtnl_qdisc_mqprio_get_hw_offload@libnl_3_5 3.5.0-1
- rtnl_qdisc_mqprio_get_max_rate@libnl_3_5 3.5.0-1
- rtnl_qdisc_mqprio_get_min_rate@libnl_3_5 3.5.0-1
- rtnl_qdisc_mqprio_get_mode@libnl_3_5 3.5.0-1
- rtnl_qdisc_mqprio_get_num_tc@libnl_3_5 3.5.0-1
- rtnl_qdisc_mqprio_get_priomap@libnl_3_5 3.5.0-1
- rtnl_qdisc_mqprio_get_queue@libnl_3_5 3.5.0-1
- rtnl_qdisc_mqprio_get_shaper@libnl_3_5 3.5.0-1
- rtnl_qdisc_mqprio_hw_offload@libnl_3_5 3.5.0-1
- rtnl_qdisc_mqprio_set_max_rate@libnl_3_5 3.5.0-1
- rtnl_qdisc_mqprio_set_min_rate@libnl_3_5 3.5.0-1
- rtnl_qdisc_mqprio_set_mode@libnl_3_5 3.5.0-1
- rtnl_qdisc_mqprio_set_num_tc@libnl_3_5 3.5.0-1
- rtnl_qdisc_mqprio_set_priomap@libnl_3_5 3.5.0-1
- rtnl_qdisc_mqprio_set_queue@libnl_3_5 3.5.0-1
- rtnl_qdisc_mqprio_set_shaper@libnl_3_5 3.5.0-1
- rtnl_qdisc_plug_buffer@Base 3.5.0-1
- rtnl_qdisc_plug_buffer@libnl_3 3.5.0-1
- rtnl_qdisc_plug_release_indefinite@Base 3.5.0-1
- rtnl_qdisc_plug_release_indefinite@libnl_3 3.5.0-1
- rtnl_qdisc_plug_release_one@Base 3.5.0-1
- rtnl_qdisc_plug_release_one@libnl_3 3.5.0-1
- rtnl_qdisc_plug_set_limit@Base 3.5.0-1
- rtnl_qdisc_plug_set_limit@libnl_3 3.5.0-1
- rtnl_qdisc_prio_get_bands@Base 3.5.0-1
- rtnl_qdisc_prio_get_bands@libnl_3 3.5.0-1
- rtnl_qdisc_prio_get_priomap@Base 3.5.0-1
- rtnl_qdisc_prio_get_priomap@libnl_3 3.5.0-1
- rtnl_qdisc_prio_set_bands@Base 3.5.0-1
- rtnl_qdisc_prio_set_bands@libnl_3 3.5.0-1
- rtnl_qdisc_prio_set_priomap@Base 3.5.0-1
- rtnl_qdisc_prio_set_priomap@libnl_3 3.5.0-1
- rtnl_qdisc_put@Base 3.5.0-1
- rtnl_qdisc_put@libnl_3 3.5.0-1
- rtnl_qdisc_tbf_get_limit@Base 3.5.0-1
- rtnl_qdisc_tbf_get_limit@libnl_3 3.5.0-1
- rtnl_qdisc_tbf_get_peakrate@Base 3.5.0-1
- rtnl_qdisc_tbf_get_peakrate@libnl_3 3.5.0-1
- rtnl_qdisc_tbf_get_peakrate_bucket@Base 3.5.0-1
- rtnl_qdisc_tbf_get_peakrate_bucket@libnl_3 3.5.0-1
- rtnl_qdisc_tbf_get_peakrate_cell@Base 3.5.0-1
- rtnl_qdisc_tbf_get_peakrate_cell@libnl_3 3.5.0-1
- rtnl_qdisc_tbf_get_rate@Base 3.5.0-1
- rtnl_qdisc_tbf_get_rate@libnl_3 3.5.0-1
- rtnl_qdisc_tbf_get_rate_bucket@Base 3.5.0-1
- rtnl_qdisc_tbf_get_rate_bucket@libnl_3 3.5.0-1
- rtnl_qdisc_tbf_get_rate_cell@Base 3.5.0-1
- rtnl_qdisc_tbf_get_rate_cell@libnl_3 3.5.0-1
- rtnl_qdisc_tbf_set_limit@Base 3.5.0-1
- rtnl_qdisc_tbf_set_limit@libnl_3 3.5.0-1
- rtnl_qdisc_tbf_set_limit_by_latency@Base 3.5.0-1
- rtnl_qdisc_tbf_set_limit_by_latency@libnl_3 3.5.0-1
- rtnl_qdisc_tbf_set_peakrate@Base 3.5.0-1
- rtnl_qdisc_tbf_set_peakrate@libnl_3 3.5.0-1
- rtnl_qdisc_tbf_set_rate@Base 3.5.0-1
- rtnl_qdisc_tbf_set_rate@libnl_3 3.5.0-1
- rtnl_qdisc_update@Base 3.5.0-1
- rtnl_qdisc_update@libnl_3 3.5.0-1
- rtnl_realms2str@Base 3.5.0-1
- rtnl_realms2str@libnl_3 3.5.0-1
- rtnl_red_get_limit@Base 3.5.0-1
- rtnl_red_get_limit@libnl_3 3.5.0-1
- rtnl_red_set_limit@Base 3.5.0-1
- rtnl_red_set_limit@libnl_3 3.5.0-1
- rtnl_route_add@Base 3.5.0-1
- rtnl_route_add@libnl_3 3.5.0-1
- rtnl_route_add_nexthop@Base 3.5.0-1
- rtnl_route_add_nexthop@libnl_3 3.5.0-1
- rtnl_route_alloc@Base 3.5.0-1
- rtnl_route_alloc@libnl_3 3.5.0-1
- rtnl_route_alloc_cache@Base 3.5.0-1
- rtnl_route_alloc_cache@libnl_3 3.5.0-1
- rtnl_route_build_add_request@Base 3.5.0-1
- rtnl_route_build_add_request@libnl_3 3.5.0-1
- rtnl_route_build_del_request@Base 3.5.0-1
- rtnl_route_build_del_request@libnl_3 3.5.0-1
- rtnl_route_build_msg@Base 3.5.0-1
- rtnl_route_build_msg@libnl_3 3.5.0-1
- rtnl_route_delete@Base 3.5.0-1
- rtnl_route_delete@libnl_3 3.5.0-1
- rtnl_route_foreach_nexthop@Base 3.5.0-1
- rtnl_route_foreach_nexthop@libnl_3 3.5.0-1
- rtnl_route_get@Base 3.5.0-1
- rtnl_route_get@libnl_3 3.5.0-1
- rtnl_route_get_dst@Base 3.5.0-1
- rtnl_route_get_dst@libnl_3 3.5.0-1
- rtnl_route_get_family@Base 3.5.0-1
- rtnl_route_get_family@libnl_3 3.5.0-1
- rtnl_route_get_flags@Base 3.5.0-1
- rtnl_route_get_flags@libnl_3 3.5.0-1
- rtnl_route_get_iif@Base 3.5.0-1
- rtnl_route_get_iif@libnl_3 3.5.0-1
- rtnl_route_get_metric@Base 3.5.0-1
- rtnl_route_get_metric@libnl_3 3.5.0-1
- rtnl_route_get_nexthops@Base 3.5.0-1
- rtnl_route_get_nexthops@libnl_3 3.5.0-1
- rtnl_route_get_nnexthops@Base 3.5.0-1
- rtnl_route_get_nnexthops@libnl_3 3.5.0-1
- rtnl_route_get_pref_src@Base 3.5.0-1
- rtnl_route_get_pref_src@libnl_3 3.5.0-1
- rtnl_route_get_priority@Base 3.5.0-1
- rtnl_route_get_priority@libnl_3 3.5.0-1
- rtnl_route_get_protocol@Base 3.5.0-1
- rtnl_route_get_protocol@libnl_3 3.5.0-1
- rtnl_route_get_scope@Base 3.5.0-1
- rtnl_route_get_scope@libnl_3 3.5.0-1
- rtnl_route_get_src@Base 3.5.0-1
- rtnl_route_get_src@libnl_3 3.5.0-1
- rtnl_route_get_table@Base 3.5.0-1
- rtnl_route_get_table@libnl_3 3.5.0-1
- rtnl_route_get_tos@Base 3.5.0-1
- rtnl_route_get_tos@libnl_3 3.5.0-1
- rtnl_route_get_ttl_propagate@libnl_3_4 3.5.0-1
- rtnl_route_get_type@Base 3.5.0-1
- rtnl_route_get_type@libnl_3 3.5.0-1
- rtnl_route_guess_scope@Base 3.5.0-1
- rtnl_route_guess_scope@libnl_3 3.5.0-1
- rtnl_route_metric2str@Base 3.5.0-1
- rtnl_route_metric2str@libnl_3 3.5.0-1
- rtnl_route_nexthop_n@Base 3.5.0-1
- rtnl_route_nexthop_n@libnl_3 3.5.0-1
- rtnl_route_nh_alloc@Base 3.5.0-1
- rtnl_route_nh_alloc@libnl_3 3.5.0-1
- rtnl_route_nh_clone@Base 3.5.0-1
- rtnl_route_nh_clone@libnl_3 3.5.0-1
- rtnl_route_nh_compare@Base 3.5.0-1
- rtnl_route_nh_compare@libnl_3 3.5.0-1
- rtnl_route_nh_dump@Base 3.5.0-1
- rtnl_route_nh_dump@libnl_3 3.5.0-1
- rtnl_route_nh_encap_mpls@libnl_3_4 3.5.0-1
- rtnl_route_nh_flags2str@Base 3.5.0-1
- rtnl_route_nh_flags2str@libnl_3 3.5.0-1
- rtnl_route_nh_free@Base 3.5.0-1
- rtnl_route_nh_free@libnl_3 3.5.0-1
- rtnl_route_nh_get_flags@Base 3.5.0-1
- rtnl_route_nh_get_flags@libnl_3 3.5.0-1
- rtnl_route_nh_get_gateway@Base 3.5.0-1
- rtnl_route_nh_get_gateway@libnl_3 3.5.0-1
- rtnl_route_nh_get_ifindex@Base 3.5.0-1
- rtnl_route_nh_get_ifindex@libnl_3 3.5.0-1
- rtnl_route_nh_get_newdst@libnl_3_4 3.5.0-1
- rtnl_route_nh_get_realms@Base 3.5.0-1
- rtnl_route_nh_get_realms@libnl_3 3.5.0-1
- rtnl_route_nh_get_via@libnl_3_4 3.5.0-1
- rtnl_route_nh_get_weight@Base 3.5.0-1
- rtnl_route_nh_get_weight@libnl_3 3.5.0-1
- rtnl_route_nh_set_flags@Base 3.5.0-1
- rtnl_route_nh_set_flags@libnl_3 3.5.0-1
- rtnl_route_nh_set_gateway@Base 3.5.0-1
- rtnl_route_nh_set_gateway@libnl_3 3.5.0-1
- rtnl_route_nh_set_ifindex@Base 3.5.0-1
- rtnl_route_nh_set_ifindex@libnl_3 3.5.0-1
- rtnl_route_nh_set_newdst@libnl_3_4 3.5.0-1
- rtnl_route_nh_set_realms@Base 3.5.0-1
- rtnl_route_nh_set_realms@libnl_3 3.5.0-1
- rtnl_route_nh_set_via@libnl_3_4 3.5.0-1
- rtnl_route_nh_set_weight@Base 3.5.0-1
- rtnl_route_nh_set_weight@libnl_3 3.5.0-1
- rtnl_route_nh_str2flags@Base 3.5.0-1
- rtnl_route_nh_str2flags@libnl_3 3.5.0-1
- rtnl_route_nh_unset_flags@Base 3.5.0-1
- rtnl_route_nh_unset_flags@libnl_3 3.5.0-1
- rtnl_route_parse@Base 3.5.0-1
- rtnl_route_parse@libnl_3 3.5.0-1
- rtnl_route_proto2str@Base 3.5.0-1
- rtnl_route_proto2str@libnl_3 3.5.0-1
- rtnl_route_put@Base 3.5.0-1
- rtnl_route_put@libnl_3 3.5.0-1
- rtnl_route_read_protocol_names@Base 3.5.0-1
- rtnl_route_read_protocol_names@libnl_3 3.5.0-1
- rtnl_route_read_table_names@Base 3.5.0-1
- rtnl_route_read_table_names@libnl_3 3.5.0-1
- rtnl_route_remove_nexthop@Base 3.5.0-1
- rtnl_route_remove_nexthop@libnl_3 3.5.0-1
- rtnl_route_set_dst@Base 3.5.0-1
- rtnl_route_set_dst@libnl_3 3.5.0-1
- rtnl_route_set_family@Base 3.5.0-1
- rtnl_route_set_family@libnl_3 3.5.0-1
- rtnl_route_set_flags@Base 3.5.0-1
- rtnl_route_set_flags@libnl_3 3.5.0-1
- rtnl_route_set_iif@Base 3.5.0-1
- rtnl_route_set_iif@libnl_3 3.5.0-1
- rtnl_route_set_metric@Base 3.5.0-1
- rtnl_route_set_metric@libnl_3 3.5.0-1
- rtnl_route_set_pref_src@Base 3.5.0-1
- rtnl_route_set_pref_src@libnl_3 3.5.0-1
- rtnl_route_set_priority@Base 3.5.0-1
- rtnl_route_set_priority@libnl_3 3.5.0-1
- rtnl_route_set_protocol@Base 3.5.0-1
- rtnl_route_set_protocol@libnl_3 3.5.0-1
- rtnl_route_set_scope@Base 3.5.0-1
- rtnl_route_set_scope@libnl_3 3.5.0-1
- rtnl_route_set_src@Base 3.5.0-1
- rtnl_route_set_src@libnl_3 3.5.0-1
- rtnl_route_set_table@Base 3.5.0-1
- rtnl_route_set_table@libnl_3 3.5.0-1
- rtnl_route_set_tos@Base 3.5.0-1
- rtnl_route_set_tos@libnl_3 3.5.0-1
- rtnl_route_set_ttl_propagate@libnl_3_4 3.5.0-1
- rtnl_route_set_type@Base 3.5.0-1
- rtnl_route_set_type@libnl_3 3.5.0-1
- rtnl_route_str2metric@Base 3.5.0-1
- rtnl_route_str2metric@libnl_3 3.5.0-1
- rtnl_route_str2proto@Base 3.5.0-1
- rtnl_route_str2proto@libnl_3 3.5.0-1
- rtnl_route_str2table@Base 3.5.0-1
- rtnl_route_str2table@libnl_3 3.5.0-1
- rtnl_route_table2str@Base 3.5.0-1
- rtnl_route_table2str@libnl_3 3.5.0-1
- rtnl_route_unset_flags@Base 3.5.0-1
- rtnl_route_unset_flags@libnl_3 3.5.0-1
- rtnl_route_unset_metric@Base 3.5.0-1
- rtnl_route_unset_metric@libnl_3 3.5.0-1
- rtnl_rule_add@Base 3.5.0-1
- rtnl_rule_add@libnl_3 3.5.0-1
- rtnl_rule_alloc@Base 3.5.0-1
- rtnl_rule_alloc@libnl_3 3.5.0-1
- rtnl_rule_alloc_cache@Base 3.5.0-1
- rtnl_rule_alloc_cache@libnl_3 3.5.0-1
- rtnl_rule_build_add_request@Base 3.5.0-1
- rtnl_rule_build_add_request@libnl_3 3.5.0-1
- rtnl_rule_build_delete_request@Base 3.5.0-1
- rtnl_rule_build_delete_request@libnl_3 3.5.0-1
- rtnl_rule_delete@Base 3.5.0-1
- rtnl_rule_delete@libnl_3 3.5.0-1
- rtnl_rule_get_action@Base 3.5.0-1
- rtnl_rule_get_action@libnl_3 3.5.0-1
- rtnl_rule_get_dport@libnl_3_5 3.5.0-1
- rtnl_rule_get_dsfield@Base 3.5.0-1
- rtnl_rule_get_dsfield@libnl_3 3.5.0-1
- rtnl_rule_get_dst@Base 3.5.0-1
- rtnl_rule_get_dst@libnl_3 3.5.0-1
- rtnl_rule_get_family@Base 3.5.0-1
- rtnl_rule_get_family@libnl_3 3.5.0-1
- rtnl_rule_get_goto@Base 3.5.0-1
- rtnl_rule_get_goto@libnl_3 3.5.0-1
- rtnl_rule_get_iif@Base 3.5.0-1
- rtnl_rule_get_iif@libnl_3 3.5.0-1
- rtnl_rule_get_ipproto@libnl_3_5 3.5.0-1
- rtnl_rule_get_l3mdev@libnl_3_4 3.5.0-1
- rtnl_rule_get_mark@Base 3.5.0-1
- rtnl_rule_get_mark@libnl_3 3.5.0-1
- rtnl_rule_get_mask@Base 3.5.0-1
- rtnl_rule_get_mask@libnl_3 3.5.0-1
- rtnl_rule_get_oif@Base 3.5.0-1
- rtnl_rule_get_oif@libnl_3 3.5.0-1
- rtnl_rule_get_prio@Base 3.5.0-1
- rtnl_rule_get_prio@libnl_3 3.5.0-1
- rtnl_rule_get_protocol@libnl_3_5 3.5.0-1
- rtnl_rule_get_realms@Base 3.5.0-1
- rtnl_rule_get_realms@libnl_3 3.5.0-1
- rtnl_rule_get_sport@libnl_3_5 3.5.0-1
- rtnl_rule_get_src@Base 3.5.0-1
- rtnl_rule_get_src@libnl_3 3.5.0-1
- rtnl_rule_get_table@Base 3.5.0-1
- rtnl_rule_get_table@libnl_3 3.5.0-1
- rtnl_rule_put@Base 3.5.0-1
- rtnl_rule_put@libnl_3 3.5.0-1
- rtnl_rule_set_action@Base 3.5.0-1
- rtnl_rule_set_action@libnl_3 3.5.0-1
- rtnl_rule_set_dport@libnl_3_5 3.5.0-1
- rtnl_rule_set_dport_range@libnl_3_5 3.5.0-1
- rtnl_rule_set_dsfield@Base 3.5.0-1
- rtnl_rule_set_dsfield@libnl_3 3.5.0-1
- rtnl_rule_set_dst@Base 3.5.0-1
- rtnl_rule_set_dst@libnl_3 3.5.0-1
- rtnl_rule_set_family@Base 3.5.0-1
- rtnl_rule_set_family@libnl_3 3.5.0-1
- rtnl_rule_set_goto@Base 3.5.0-1
- rtnl_rule_set_goto@libnl_3 3.5.0-1
- rtnl_rule_set_iif@Base 3.5.0-1
- rtnl_rule_set_iif@libnl_3 3.5.0-1
- rtnl_rule_set_ipproto@libnl_3_5 3.5.0-1
- rtnl_rule_set_l3mdev@libnl_3_4 3.5.0-1
- rtnl_rule_set_mark@Base 3.5.0-1
- rtnl_rule_set_mark@libnl_3 3.5.0-1
- rtnl_rule_set_mask@Base 3.5.0-1
- rtnl_rule_set_mask@libnl_3 3.5.0-1
- rtnl_rule_set_oif@Base 3.5.0-1
- rtnl_rule_set_oif@libnl_3 3.5.0-1
- rtnl_rule_set_prio@Base 3.5.0-1
- rtnl_rule_set_prio@libnl_3 3.5.0-1
- rtnl_rule_set_protocol@libnl_3_5 3.5.0-1
- rtnl_rule_set_realms@Base 3.5.0-1
- rtnl_rule_set_realms@libnl_3 3.5.0-1
- rtnl_rule_set_sport@libnl_3_5 3.5.0-1
- rtnl_rule_set_sport_range@libnl_3_5 3.5.0-1
- rtnl_rule_set_src@Base 3.5.0-1
- rtnl_rule_set_src@libnl_3 3.5.0-1
- rtnl_rule_set_table@Base 3.5.0-1
- rtnl_rule_set_table@libnl_3 3.5.0-1
- rtnl_scope2str@Base 3.5.0-1
- rtnl_scope2str@libnl_3 3.5.0-1
- rtnl_sfq_get_divisor@Base 3.5.0-1
- rtnl_sfq_get_divisor@libnl_3 3.5.0-1
- rtnl_sfq_get_limit@Base 3.5.0-1
- rtnl_sfq_get_limit@libnl_3 3.5.0-1
- rtnl_sfq_get_perturb@Base 3.5.0-1
- rtnl_sfq_get_perturb@libnl_3 3.5.0-1
- rtnl_sfq_get_quantum@Base 3.5.0-1
- rtnl_sfq_get_quantum@libnl_3 3.5.0-1
- rtnl_sfq_set_limit@Base 3.5.0-1
- rtnl_sfq_set_limit@libnl_3 3.5.0-1
- rtnl_sfq_set_perturb@Base 3.5.0-1
- rtnl_sfq_set_perturb@libnl_3 3.5.0-1
- rtnl_sfq_set_quantum@Base 3.5.0-1
- rtnl_sfq_set_quantum@libnl_3 3.5.0-1
- rtnl_skbedit_get_action@Base 3.5.0-1
- rtnl_skbedit_get_action@libnl_3_2_26 3.5.0-1
- rtnl_skbedit_get_mark@Base 3.5.0-1
- rtnl_skbedit_get_mark@libnl_3_2_26 3.5.0-1
- rtnl_skbedit_get_priority@Base 3.5.0-1
- rtnl_skbedit_get_priority@libnl_3_2_26 3.5.0-1
- rtnl_skbedit_get_queue_mapping@Base 3.5.0-1
- rtnl_skbedit_get_queue_mapping@libnl_3_2_26 3.5.0-1
- rtnl_skbedit_set_action@Base 3.5.0-1
- rtnl_skbedit_set_action@libnl_3_2_26 3.5.0-1
- rtnl_skbedit_set_mark@Base 3.5.0-1
- rtnl_skbedit_set_mark@libnl_3_2_26 3.5.0-1
- rtnl_skbedit_set_priority@Base 3.5.0-1
- rtnl_skbedit_set_priority@libnl_3_2_26 3.5.0-1
- rtnl_skbedit_set_queue_mapping@Base 3.5.0-1
- rtnl_skbedit_set_queue_mapping@libnl_3_2_26 3.5.0-1
- rtnl_str2prio@Base 3.5.0-1
- rtnl_str2prio@libnl_3 3.5.0-1
- rtnl_str2scope@Base 3.5.0-1
- rtnl_str2scope@libnl_3 3.5.0-1
- rtnl_tc_build_rate_table@Base 3.5.0-1
- rtnl_tc_build_rate_table@libnl_3 3.5.0-1
- rtnl_tc_calc_bufsize@Base 3.5.0-1
- rtnl_tc_calc_bufsize@libnl_3 3.5.0-1
- rtnl_tc_calc_cell_log@Base 3.5.0-1
- rtnl_tc_calc_cell_log@libnl_3 3.5.0-1
- rtnl_tc_calc_txtime@Base 3.5.0-1
- rtnl_tc_calc_txtime@libnl_3 3.5.0-1
- rtnl_tc_clone@Base 3.5.0-1
- rtnl_tc_clone@libnl_3 3.5.0-1
- rtnl_tc_compare@Base 3.5.0-1
- rtnl_tc_compare@libnl_3 3.5.0-1
- rtnl_tc_data@Base 3.5.0-1
- rtnl_tc_data@libnl_3 3.5.0-1
- rtnl_tc_data_check@Base 3.5.0-1
- rtnl_tc_data_check@libnl_3 3.5.0-1
- rtnl_tc_data_peek@Base 3.5.0-1
- rtnl_tc_dump_details@Base 3.5.0-1
- rtnl_tc_dump_details@libnl_3 3.5.0-1
- rtnl_tc_dump_line@Base 3.5.0-1
- rtnl_tc_dump_line@libnl_3 3.5.0-1
- rtnl_tc_dump_stats@Base 3.5.0-1
- rtnl_tc_dump_stats@libnl_3 3.5.0-1
- rtnl_tc_free_data@Base 3.5.0-1
- rtnl_tc_free_data@libnl_3 3.5.0-1
- rtnl_tc_get_chain@libnl_3_5 3.5.0-1
- rtnl_tc_get_handle@Base 3.5.0-1
- rtnl_tc_get_handle@libnl_3 3.5.0-1
- rtnl_tc_get_ifindex@Base 3.5.0-1
- rtnl_tc_get_ifindex@libnl_3 3.5.0-1
- rtnl_tc_get_kind@Base 3.5.0-1
- rtnl_tc_get_kind@libnl_3 3.5.0-1
- rtnl_tc_get_link@Base 3.5.0-1
- rtnl_tc_get_link@libnl_3 3.5.0-1
- rtnl_tc_get_linktype@Base 3.5.0-1
- rtnl_tc_get_linktype@libnl_3 3.5.0-1
- rtnl_tc_get_mpu@Base 3.5.0-1
- rtnl_tc_get_mpu@libnl_3 3.5.0-1
- rtnl_tc_get_mtu@Base 3.5.0-1
- rtnl_tc_get_mtu@libnl_3 3.5.0-1
- rtnl_tc_get_ops@Base 3.5.0-1
- rtnl_tc_get_ops@libnl_3 3.5.0-1
- rtnl_tc_get_overhead@Base 3.5.0-1
- rtnl_tc_get_overhead@libnl_3 3.5.0-1
- rtnl_tc_get_parent@Base 3.5.0-1
- rtnl_tc_get_parent@libnl_3 3.5.0-1
- rtnl_tc_get_stat@Base 3.5.0-1
- rtnl_tc_get_stat@libnl_3 3.5.0-1
- rtnl_tc_handle2str@Base 3.5.0-1
- rtnl_tc_handle2str@libnl_3 3.5.0-1
- rtnl_tc_lookup_ops@Base 3.5.0-1
- rtnl_tc_lookup_ops@libnl_3 3.5.0-1
- rtnl_tc_msg_build@Base 3.5.0-1
- rtnl_tc_msg_build@libnl_3 3.5.0-1
- rtnl_tc_msg_parse@Base 3.5.0-1
- rtnl_tc_msg_parse@libnl_3 3.5.0-1
- rtnl_tc_read_classid_file@Base 3.5.0-1
- rtnl_tc_read_classid_file@libnl_3 3.5.0-1
- rtnl_tc_register@Base 3.5.0-1
- rtnl_tc_register@libnl_3 3.5.0-1
- rtnl_tc_set_chain@libnl_3_5 3.5.0-1
- rtnl_tc_set_handle@Base 3.5.0-1
- rtnl_tc_set_handle@libnl_3 3.5.0-1
- rtnl_tc_set_ifindex@Base 3.5.0-1
- rtnl_tc_set_ifindex@libnl_3 3.5.0-1
- rtnl_tc_set_kind@Base 3.5.0-1
- rtnl_tc_set_kind@libnl_3 3.5.0-1
- rtnl_tc_set_link@Base 3.5.0-1
- rtnl_tc_set_link@libnl_3 3.5.0-1
- rtnl_tc_set_linktype@Base 3.5.0-1
- rtnl_tc_set_linktype@libnl_3 3.5.0-1
- rtnl_tc_set_mpu@Base 3.5.0-1
- rtnl_tc_set_mpu@libnl_3 3.5.0-1
- rtnl_tc_set_mtu@Base 3.5.0-1
- rtnl_tc_set_mtu@libnl_3 3.5.0-1
- rtnl_tc_set_overhead@Base 3.5.0-1
- rtnl_tc_set_overhead@libnl_3 3.5.0-1
- rtnl_tc_set_parent@Base 3.5.0-1
- rtnl_tc_set_parent@libnl_3 3.5.0-1
- rtnl_tc_stat2str@Base 3.5.0-1
- rtnl_tc_stat2str@libnl_3_2_26 3.5.0-1
- rtnl_tc_str2handle@Base 3.5.0-1
- rtnl_tc_str2handle@libnl_3 3.5.0-1
- rtnl_tc_str2stat@Base 3.5.0-1
- rtnl_tc_str2stat@libnl_3_2_26 3.5.0-1
- rtnl_tc_type_register@Base 3.5.0-1
- rtnl_tc_type_register@libnl_3 3.5.0-1
- rtnl_tc_type_unregister@Base 3.5.0-1
- rtnl_tc_type_unregister@libnl_3 3.5.0-1
- rtnl_tc_unregister@Base 3.5.0-1
- rtnl_tc_unregister@libnl_3 3.5.0-1
- rtnl_u32_add_action@Base 3.5.0-1
- rtnl_u32_add_action@libnl_3 3.5.0-1
- rtnl_u32_add_key@Base 3.5.0-1
- rtnl_u32_add_key@libnl_3 3.5.0-1
- rtnl_u32_add_key_in6_addr@Base 3.5.0-1
- rtnl_u32_add_key_in6_addr@libnl_3 3.5.0-1
- rtnl_u32_add_key_in_addr@Base 3.5.0-1
- rtnl_u32_add_key_in_addr@libnl_3 3.5.0-1
- rtnl_u32_add_key_uint16@Base 3.5.0-1
- rtnl_u32_add_key_uint16@libnl_3 3.5.0-1
- rtnl_u32_add_key_uint32@Base 3.5.0-1
- rtnl_u32_add_key_uint32@libnl_3 3.5.0-1
- rtnl_u32_add_key_uint8@Base 3.5.0-1
- rtnl_u32_add_key_uint8@libnl_3 3.5.0-1
- rtnl_u32_add_mark@Base 3.5.0-1
- rtnl_u32_add_mark@libnl_3 3.5.0-1
- rtnl_u32_del_action@Base 3.5.0-1
- rtnl_u32_del_action@libnl_3 3.5.0-1
- rtnl_u32_del_mark@Base 3.5.0-1
- rtnl_u32_del_mark@libnl_3 3.5.0-1
- rtnl_u32_get_action@libnl_3_4 3.5.0-1
- rtnl_u32_get_classid@Base 3.5.0-1
- rtnl_u32_get_classid@libnl_3_2_26 3.5.0-1
- rtnl_u32_get_key@Base 3.5.0-1
- rtnl_u32_get_key@libnl_3 3.5.0-1
- rtnl_u32_set_classid@Base 3.5.0-1
- rtnl_u32_set_classid@libnl_3 3.5.0-1
- rtnl_u32_set_cls_terminal@Base 3.5.0-1
- rtnl_u32_set_cls_terminal@libnl_3 3.5.0-1
- rtnl_u32_set_divisor@Base 3.5.0-1
- rtnl_u32_set_divisor@libnl_3 3.5.0-1
- rtnl_u32_set_flags@Base 3.5.0-1
- rtnl_u32_set_flags@libnl_3 3.5.0-1
- rtnl_u32_set_handle@Base 3.5.0-1
- rtnl_u32_set_handle@libnl_3 3.5.0-1
- rtnl_u32_set_hashmask@Base 3.5.0-1
- rtnl_u32_set_hashmask@libnl_3 3.5.0-1
- rtnl_u32_set_hashtable@Base 3.5.0-1
- rtnl_u32_set_hashtable@libnl_3 3.5.0-1
- rtnl_u32_set_link@Base 3.5.0-1
- rtnl_u32_set_link@libnl_3 3.5.0-1
- rtnl_u32_set_selector@libnl_3_2_29 3.5.0-1
- rtnl_vlan_get_action@libnl_3_5 3.5.0-1
- rtnl_vlan_get_mode@libnl_3_5 3.5.0-1
- rtnl_vlan_get_protocol@libnl_3_5 3.5.0-1
- rtnl_vlan_get_vlan_id@libnl_3_5 3.5.0-1
- rtnl_vlan_get_vlan_prio@libnl_3_5 3.5.0-1
- rtnl_vlan_set_action@libnl_3_5 3.5.0-1
- rtnl_vlan_set_mode@libnl_3_5 3.5.0-1
- rtnl_vlan_set_protocol@libnl_3_5 3.5.0-1
- rtnl_vlan_set_vlan_id@libnl_3_5 3.5.0-1
- rtnl_vlan_set_vlan_prio@libnl_3_5 3.5.0-1
- tc_groups@Base 3.5.0-1
- tca_parse@Base 3.5.0-1
- tca_set_kind@Base 3.5.0-1
diff --git a/src/libnl3/debian/libnl-route-3-dev.install b/src/libnl3/debian/libnl-route-3-dev.install
deleted file mode 100644
index 37e248c3ed5b..000000000000
--- a/src/libnl3/debian/libnl-route-3-dev.install
+++ /dev/null
@@ -1,3 +0,0 @@
-debian/tmp/usr/lib/*/pkgconfig/libnl-route-3*
-debian/tmp/usr/lib/*/libnl-route-3*.so
-debian/tmp/usr/lib/*/libnl-route-3*.a
diff --git a/src/libnl3/debian/libnl-utils.install b/src/libnl3/debian/libnl-utils.install
deleted file mode 100644
index 8ffdce84e93a..000000000000
--- a/src/libnl3/debian/libnl-utils.install
+++ /dev/null
@@ -1 +0,0 @@
-debian/tmp/usr/bin/*
diff --git a/src/libnl3/debian/libnl-utils.manpages b/src/libnl3/debian/libnl-utils.manpages
deleted file mode 100644
index 0b2dcacf5b84..000000000000
--- a/src/libnl3/debian/libnl-utils.manpages
+++ /dev/null
@@ -1 +0,0 @@
-debian/tmp/usr/share/man/man8/*
diff --git a/src/libnl3/debian/libnl-xfrm-3-200.install b/src/libnl3/debian/libnl-xfrm-3-200.install
deleted file mode 100644
index 89b2d4e0c9e0..000000000000
--- a/src/libnl3/debian/libnl-xfrm-3-200.install
+++ /dev/null
@@ -1 +0,0 @@
-debian/tmp/usr/lib/*/libnl-xfrm-3*.so.*
diff --git a/src/libnl3/debian/libnl-xfrm-3-200.symbols b/src/libnl3/debian/libnl-xfrm-3-200.symbols
deleted file mode 100644
index 3704a7aa4384..000000000000
--- a/src/libnl3/debian/libnl-xfrm-3-200.symbols
+++ /dev/null
@@ -1,484 +0,0 @@
-libnl-xfrm-3.so.200 libnl-xfrm-3-200 #MINVER#
- libnl_3@libnl_3 3.5.0-1
- xfrmnl_ae_alloc@Base 3.5.0-1
- xfrmnl_ae_alloc@libnl_3 3.5.0-1
- xfrmnl_ae_build_get_request@Base 3.5.0-1
- xfrmnl_ae_build_get_request@libnl_3 3.5.0-1
- xfrmnl_ae_flags2str@Base 3.5.0-1
- xfrmnl_ae_flags2str@libnl_3 3.5.0-1
- xfrmnl_ae_get_curlifetime@Base 3.5.0-1
- xfrmnl_ae_get_curlifetime@libnl_3 3.5.0-1
- xfrmnl_ae_get_daddr@Base 3.5.0-1
- xfrmnl_ae_get_daddr@libnl_3 3.5.0-1
- xfrmnl_ae_get_family@Base 3.5.0-1
- xfrmnl_ae_get_family@libnl_3 3.5.0-1
- xfrmnl_ae_get_flags@Base 3.5.0-1
- xfrmnl_ae_get_flags@libnl_3 3.5.0-1
- xfrmnl_ae_get_kernel@Base 3.5.0-1
- xfrmnl_ae_get_kernel@libnl_3 3.5.0-1
- xfrmnl_ae_get_mark@Base 3.5.0-1
- xfrmnl_ae_get_mark@libnl_3 3.5.0-1
- xfrmnl_ae_get_proto@Base 3.5.0-1
- xfrmnl_ae_get_proto@libnl_3 3.5.0-1
- xfrmnl_ae_get_replay_maxage@Base 3.5.0-1
- xfrmnl_ae_get_replay_maxage@libnl_3 3.5.0-1
- xfrmnl_ae_get_replay_maxdiff@Base 3.5.0-1
- xfrmnl_ae_get_replay_maxdiff@libnl_3 3.5.0-1
- xfrmnl_ae_get_replay_state@Base 3.5.0-1
- xfrmnl_ae_get_replay_state@libnl_3 3.5.0-1
- xfrmnl_ae_get_replay_state_esn@Base 3.5.0-1
- xfrmnl_ae_get_replay_state_esn@libnl_3 3.5.0-1
- xfrmnl_ae_get_reqid@Base 3.5.0-1
- xfrmnl_ae_get_reqid@libnl_3 3.5.0-1
- xfrmnl_ae_get_saddr@Base 3.5.0-1
- xfrmnl_ae_get_saddr@libnl_3 3.5.0-1
- xfrmnl_ae_get_spi@Base 3.5.0-1
- xfrmnl_ae_get_spi@libnl_3 3.5.0-1
- xfrmnl_ae_parse@Base 3.5.0-1
- xfrmnl_ae_parse@libnl_3 3.5.0-1
- xfrmnl_ae_put@Base 3.5.0-1
- xfrmnl_ae_put@libnl_3 3.5.0-1
- xfrmnl_ae_set@Base 3.5.0-1
- xfrmnl_ae_set@libnl_3 3.5.0-1
- xfrmnl_ae_set_curlifetime@Base 3.5.0-1
- xfrmnl_ae_set_curlifetime@libnl_3 3.5.0-1
- xfrmnl_ae_set_daddr@Base 3.5.0-1
- xfrmnl_ae_set_daddr@libnl_3 3.5.0-1
- xfrmnl_ae_set_family@Base 3.5.0-1
- xfrmnl_ae_set_family@libnl_3 3.5.0-1
- xfrmnl_ae_set_flags@Base 3.5.0-1
- xfrmnl_ae_set_flags@libnl_3 3.5.0-1
- xfrmnl_ae_set_mark@Base 3.5.0-1
- xfrmnl_ae_set_mark@libnl_3 3.5.0-1
- xfrmnl_ae_set_proto@Base 3.5.0-1
- xfrmnl_ae_set_proto@libnl_3 3.5.0-1
- xfrmnl_ae_set_replay_maxage@Base 3.5.0-1
- xfrmnl_ae_set_replay_maxage@libnl_3 3.5.0-1
- xfrmnl_ae_set_replay_maxdiff@Base 3.5.0-1
- xfrmnl_ae_set_replay_maxdiff@libnl_3 3.5.0-1
- xfrmnl_ae_set_replay_state@Base 3.5.0-1
- xfrmnl_ae_set_replay_state@libnl_3 3.5.0-1
- xfrmnl_ae_set_replay_state_esn@Base 3.5.0-1
- xfrmnl_ae_set_replay_state_esn@libnl_3 3.5.0-1
- xfrmnl_ae_set_reqid@Base 3.5.0-1
- xfrmnl_ae_set_reqid@libnl_3 3.5.0-1
- xfrmnl_ae_set_saddr@Base 3.5.0-1
- xfrmnl_ae_set_saddr@libnl_3 3.5.0-1
- xfrmnl_ae_set_spi@Base 3.5.0-1
- xfrmnl_ae_set_spi@libnl_3 3.5.0-1
- xfrmnl_ae_str2flag@Base 3.5.0-1
- xfrmnl_ae_str2flag@libnl_3 3.5.0-1
- xfrmnl_ltime_cfg_alloc@Base 3.5.0-1
- xfrmnl_ltime_cfg_alloc@libnl_3 3.5.0-1
- xfrmnl_ltime_cfg_clone@Base 3.5.0-1
- xfrmnl_ltime_cfg_clone@libnl_3 3.5.0-1
- xfrmnl_ltime_cfg_cmp@Base 3.5.0-1
- xfrmnl_ltime_cfg_cmp@libnl_3 3.5.0-1
- xfrmnl_ltime_cfg_get@Base 3.5.0-1
- xfrmnl_ltime_cfg_get@libnl_3 3.5.0-1
- xfrmnl_ltime_cfg_get_hard_addexpires@Base 3.5.0-1
- xfrmnl_ltime_cfg_get_hard_addexpires@libnl_3 3.5.0-1
- xfrmnl_ltime_cfg_get_hard_bytelimit@Base 3.5.0-1
- xfrmnl_ltime_cfg_get_hard_bytelimit@libnl_3 3.5.0-1
- xfrmnl_ltime_cfg_get_hard_packetlimit@Base 3.5.0-1
- xfrmnl_ltime_cfg_get_hard_packetlimit@libnl_3 3.5.0-1
- xfrmnl_ltime_cfg_get_hard_useexpires@Base 3.5.0-1
- xfrmnl_ltime_cfg_get_hard_useexpires@libnl_3 3.5.0-1
- xfrmnl_ltime_cfg_get_soft_addexpires@Base 3.5.0-1
- xfrmnl_ltime_cfg_get_soft_addexpires@libnl_3 3.5.0-1
- xfrmnl_ltime_cfg_get_soft_bytelimit@Base 3.5.0-1
- xfrmnl_ltime_cfg_get_soft_bytelimit@libnl_3 3.5.0-1
- xfrmnl_ltime_cfg_get_soft_packetlimit@Base 3.5.0-1
- xfrmnl_ltime_cfg_get_soft_packetlimit@libnl_3 3.5.0-1
- xfrmnl_ltime_cfg_get_soft_useexpires@Base 3.5.0-1
- xfrmnl_ltime_cfg_get_soft_useexpires@libnl_3 3.5.0-1
- xfrmnl_ltime_cfg_put@Base 3.5.0-1
- xfrmnl_ltime_cfg_put@libnl_3 3.5.0-1
- xfrmnl_ltime_cfg_set_hard_addexpires@Base 3.5.0-1
- xfrmnl_ltime_cfg_set_hard_addexpires@libnl_3 3.5.0-1
- xfrmnl_ltime_cfg_set_hard_bytelimit@Base 3.5.0-1
- xfrmnl_ltime_cfg_set_hard_bytelimit@libnl_3 3.5.0-1
- xfrmnl_ltime_cfg_set_hard_packetlimit@Base 3.5.0-1
- xfrmnl_ltime_cfg_set_hard_packetlimit@libnl_3 3.5.0-1
- xfrmnl_ltime_cfg_set_hard_useexpires@Base 3.5.0-1
- xfrmnl_ltime_cfg_set_hard_useexpires@libnl_3 3.5.0-1
- xfrmnl_ltime_cfg_set_soft_addexpires@Base 3.5.0-1
- xfrmnl_ltime_cfg_set_soft_addexpires@libnl_3 3.5.0-1
- xfrmnl_ltime_cfg_set_soft_bytelimit@Base 3.5.0-1
- xfrmnl_ltime_cfg_set_soft_bytelimit@libnl_3 3.5.0-1
- xfrmnl_ltime_cfg_set_soft_packetlimit@Base 3.5.0-1
- xfrmnl_ltime_cfg_set_soft_packetlimit@libnl_3 3.5.0-1
- xfrmnl_ltime_cfg_set_soft_useexpires@Base 3.5.0-1
- xfrmnl_ltime_cfg_set_soft_useexpires@libnl_3 3.5.0-1
- xfrmnl_ltime_cfg_shared@Base 3.5.0-1
- xfrmnl_ltime_cfg_shared@libnl_3 3.5.0-1
- xfrmnl_sa_add@Base 3.5.0-1
- xfrmnl_sa_add@libnl_3 3.5.0-1
- xfrmnl_sa_alloc@Base 3.5.0-1
- xfrmnl_sa_alloc@libnl_3 3.5.0-1
- xfrmnl_sa_alloc_cache@Base 3.5.0-1
- xfrmnl_sa_alloc_cache@libnl_3 3.5.0-1
- xfrmnl_sa_build_add_request@Base 3.5.0-1
- xfrmnl_sa_build_add_request@libnl_3 3.5.0-1
- xfrmnl_sa_build_delete_request@Base 3.5.0-1
- xfrmnl_sa_build_delete_request@libnl_3 3.5.0-1
- xfrmnl_sa_build_get_request@Base 3.5.0-1
- xfrmnl_sa_build_get_request@libnl_3 3.5.0-1
- xfrmnl_sa_build_update_request@Base 3.5.0-1
- xfrmnl_sa_build_update_request@libnl_3 3.5.0-1
- xfrmnl_sa_delete@Base 3.5.0-1
- xfrmnl_sa_delete@libnl_3 3.5.0-1
- xfrmnl_sa_flags2str@Base 3.5.0-1
- xfrmnl_sa_flags2str@libnl_3 3.5.0-1
- xfrmnl_sa_get@Base 3.5.0-1
- xfrmnl_sa_get@libnl_3 3.5.0-1
- xfrmnl_sa_get_aead_params@Base 3.5.0-1
- xfrmnl_sa_get_aead_params@libnl_3 3.5.0-1
- xfrmnl_sa_get_auth_params@Base 3.5.0-1
- xfrmnl_sa_get_auth_params@libnl_3 3.5.0-1
- xfrmnl_sa_get_coaddr@Base 3.5.0-1
- xfrmnl_sa_get_coaddr@libnl_3 3.5.0-1
- xfrmnl_sa_get_comp_params@Base 3.5.0-1
- xfrmnl_sa_get_comp_params@libnl_3 3.5.0-1
- xfrmnl_sa_get_crypto_params@Base 3.5.0-1
- xfrmnl_sa_get_crypto_params@libnl_3 3.5.0-1
- xfrmnl_sa_get_curlifetime@Base 3.5.0-1
- xfrmnl_sa_get_curlifetime@libnl_3 3.5.0-1
- xfrmnl_sa_get_daddr@Base 3.5.0-1
- xfrmnl_sa_get_daddr@libnl_3 3.5.0-1
- xfrmnl_sa_get_encap_tmpl@Base 3.5.0-1
- xfrmnl_sa_get_encap_tmpl@libnl_3 3.5.0-1
- xfrmnl_sa_get_family@Base 3.5.0-1
- xfrmnl_sa_get_family@libnl_3 3.5.0-1
- xfrmnl_sa_get_flags@Base 3.5.0-1
- xfrmnl_sa_get_flags@libnl_3 3.5.0-1
- xfrmnl_sa_get_kernel@Base 3.5.0-1
- xfrmnl_sa_get_kernel@libnl_3 3.5.0-1
- xfrmnl_sa_get_lifetime_cfg@Base 3.5.0-1
- xfrmnl_sa_get_lifetime_cfg@libnl_3 3.5.0-1
- xfrmnl_sa_get_mark@Base 3.5.0-1
- xfrmnl_sa_get_mark@libnl_3 3.5.0-1
- xfrmnl_sa_get_mode@Base 3.5.0-1
- xfrmnl_sa_get_mode@libnl_3 3.5.0-1
- xfrmnl_sa_get_proto@Base 3.5.0-1
- xfrmnl_sa_get_proto@libnl_3 3.5.0-1
- xfrmnl_sa_get_replay_maxage@Base 3.5.0-1
- xfrmnl_sa_get_replay_maxage@libnl_3 3.5.0-1
- xfrmnl_sa_get_replay_maxdiff@Base 3.5.0-1
- xfrmnl_sa_get_replay_maxdiff@libnl_3 3.5.0-1
- xfrmnl_sa_get_replay_state@Base 3.5.0-1
- xfrmnl_sa_get_replay_state@libnl_3 3.5.0-1
- xfrmnl_sa_get_replay_state_esn@Base 3.5.0-1
- xfrmnl_sa_get_replay_state_esn@libnl_3 3.5.0-1
- xfrmnl_sa_get_replay_window@Base 3.5.0-1
- xfrmnl_sa_get_replay_window@libnl_3 3.5.0-1
- xfrmnl_sa_get_reqid@Base 3.5.0-1
- xfrmnl_sa_get_reqid@libnl_3 3.5.0-1
- xfrmnl_sa_get_saddr@Base 3.5.0-1
- xfrmnl_sa_get_saddr@libnl_3 3.5.0-1
- xfrmnl_sa_get_sec_ctx@Base 3.5.0-1
- xfrmnl_sa_get_sec_ctx@libnl_3 3.5.0-1
- xfrmnl_sa_get_sel@Base 3.5.0-1
- xfrmnl_sa_get_sel@libnl_3 3.5.0-1
- xfrmnl_sa_get_seq@Base 3.5.0-1
- xfrmnl_sa_get_seq@libnl_3 3.5.0-1
- xfrmnl_sa_get_spi@Base 3.5.0-1
- xfrmnl_sa_get_spi@libnl_3 3.5.0-1
- xfrmnl_sa_get_stats@Base 3.5.0-1
- xfrmnl_sa_get_stats@libnl_3 3.5.0-1
- xfrmnl_sa_get_tfcpad@Base 3.5.0-1
- xfrmnl_sa_get_tfcpad@libnl_3 3.5.0-1
- xfrmnl_sa_is_expiry_reached@Base 3.5.0-1
- xfrmnl_sa_is_expiry_reached@libnl_3 3.5.0-1
- xfrmnl_sa_is_hardexpiry_reached@Base 3.5.0-1
- xfrmnl_sa_is_hardexpiry_reached@libnl_3 3.5.0-1
- xfrmnl_sa_mode2str@Base 3.5.0-1
- xfrmnl_sa_mode2str@libnl_3 3.5.0-1
- xfrmnl_sa_parse@Base 3.5.0-1
- xfrmnl_sa_parse@libnl_3 3.5.0-1
- xfrmnl_sa_put@Base 3.5.0-1
- xfrmnl_sa_put@libnl_3 3.5.0-1
- xfrmnl_sa_set_aead_params@Base 3.5.0-1
- xfrmnl_sa_set_aead_params@libnl_3 3.5.0-1
- xfrmnl_sa_set_auth_params@Base 3.5.0-1
- xfrmnl_sa_set_auth_params@libnl_3 3.5.0-1
- xfrmnl_sa_set_coaddr@Base 3.5.0-1
- xfrmnl_sa_set_coaddr@libnl_3 3.5.0-1
- xfrmnl_sa_set_comp_params@Base 3.5.0-1
- xfrmnl_sa_set_comp_params@libnl_3 3.5.0-1
- xfrmnl_sa_set_crypto_params@Base 3.5.0-1
- xfrmnl_sa_set_crypto_params@libnl_3 3.5.0-1
- xfrmnl_sa_set_daddr@Base 3.5.0-1
- xfrmnl_sa_set_daddr@libnl_3 3.5.0-1
- xfrmnl_sa_set_encap_tmpl@Base 3.5.0-1
- xfrmnl_sa_set_encap_tmpl@libnl_3 3.5.0-1
- xfrmnl_sa_set_family@Base 3.5.0-1
- xfrmnl_sa_set_family@libnl_3 3.5.0-1
- xfrmnl_sa_set_flags@Base 3.5.0-1
- xfrmnl_sa_set_flags@libnl_3 3.5.0-1
- xfrmnl_sa_set_lifetime_cfg@Base 3.5.0-1
- xfrmnl_sa_set_lifetime_cfg@libnl_3 3.5.0-1
- xfrmnl_sa_set_mark@Base 3.5.0-1
- xfrmnl_sa_set_mark@libnl_3 3.5.0-1
- xfrmnl_sa_set_mode@Base 3.5.0-1
- xfrmnl_sa_set_mode@libnl_3 3.5.0-1
- xfrmnl_sa_set_proto@Base 3.5.0-1
- xfrmnl_sa_set_proto@libnl_3 3.5.0-1
- xfrmnl_sa_set_replay_maxage@Base 3.5.0-1
- xfrmnl_sa_set_replay_maxage@libnl_3 3.5.0-1
- xfrmnl_sa_set_replay_maxdiff@Base 3.5.0-1
- xfrmnl_sa_set_replay_maxdiff@libnl_3 3.5.0-1
- xfrmnl_sa_set_replay_state@Base 3.5.0-1
- xfrmnl_sa_set_replay_state@libnl_3 3.5.0-1
- xfrmnl_sa_set_replay_state_esn@Base 3.5.0-1
- xfrmnl_sa_set_replay_state_esn@libnl_3 3.5.0-1
- xfrmnl_sa_set_replay_window@Base 3.5.0-1
- xfrmnl_sa_set_replay_window@libnl_3 3.5.0-1
- xfrmnl_sa_set_reqid@Base 3.5.0-1
- xfrmnl_sa_set_reqid@libnl_3 3.5.0-1
- xfrmnl_sa_set_saddr@Base 3.5.0-1
- xfrmnl_sa_set_saddr@libnl_3 3.5.0-1
- xfrmnl_sa_set_sec_ctx@Base 3.5.0-1
- xfrmnl_sa_set_sec_ctx@libnl_3 3.5.0-1
- xfrmnl_sa_set_sel@Base 3.5.0-1
- xfrmnl_sa_set_sel@libnl_3 3.5.0-1
- xfrmnl_sa_set_spi@Base 3.5.0-1
- xfrmnl_sa_set_spi@libnl_3 3.5.0-1
- xfrmnl_sa_set_tfcpad@Base 3.5.0-1
- xfrmnl_sa_set_tfcpad@libnl_3 3.5.0-1
- xfrmnl_sa_str2flag@Base 3.5.0-1
- xfrmnl_sa_str2flag@libnl_3 3.5.0-1
- xfrmnl_sa_str2mode@Base 3.5.0-1
- xfrmnl_sa_str2mode@libnl_3 3.5.0-1
- xfrmnl_sa_update@Base 3.5.0-1
- xfrmnl_sa_update@libnl_3 3.5.0-1
- xfrmnl_sel_alloc@Base 3.5.0-1
- xfrmnl_sel_alloc@libnl_3 3.5.0-1
- xfrmnl_sel_clone@Base 3.5.0-1
- xfrmnl_sel_clone@libnl_3 3.5.0-1
- xfrmnl_sel_cmp@Base 3.5.0-1
- xfrmnl_sel_cmp@libnl_3 3.5.0-1
- xfrmnl_sel_dump@Base 3.5.0-1
- xfrmnl_sel_dump@libnl_3 3.5.0-1
- xfrmnl_sel_get@Base 3.5.0-1
- xfrmnl_sel_get@libnl_3 3.5.0-1
- xfrmnl_sel_get_daddr@Base 3.5.0-1
- xfrmnl_sel_get_daddr@libnl_3 3.5.0-1
- xfrmnl_sel_get_dport@Base 3.5.0-1
- xfrmnl_sel_get_dport@libnl_3 3.5.0-1
- xfrmnl_sel_get_dportmask@Base 3.5.0-1
- xfrmnl_sel_get_dportmask@libnl_3 3.5.0-1
- xfrmnl_sel_get_family@Base 3.5.0-1
- xfrmnl_sel_get_family@libnl_3 3.5.0-1
- xfrmnl_sel_get_ifindex@Base 3.5.0-1
- xfrmnl_sel_get_ifindex@libnl_3 3.5.0-1
- xfrmnl_sel_get_prefixlen_d@Base 3.5.0-1
- xfrmnl_sel_get_prefixlen_d@libnl_3 3.5.0-1
- xfrmnl_sel_get_prefixlen_s@Base 3.5.0-1
- xfrmnl_sel_get_prefixlen_s@libnl_3 3.5.0-1
- xfrmnl_sel_get_proto@Base 3.5.0-1
- xfrmnl_sel_get_proto@libnl_3 3.5.0-1
- xfrmnl_sel_get_saddr@Base 3.5.0-1
- xfrmnl_sel_get_saddr@libnl_3 3.5.0-1
- xfrmnl_sel_get_sport@Base 3.5.0-1
- xfrmnl_sel_get_sport@libnl_3 3.5.0-1
- xfrmnl_sel_get_sportmask@Base 3.5.0-1
- xfrmnl_sel_get_sportmask@libnl_3 3.5.0-1
- xfrmnl_sel_get_userid@Base 3.5.0-1
- xfrmnl_sel_get_userid@libnl_3 3.5.0-1
- xfrmnl_sel_put@Base 3.5.0-1
- xfrmnl_sel_put@libnl_3 3.5.0-1
- xfrmnl_sel_set_daddr@Base 3.5.0-1
- xfrmnl_sel_set_daddr@libnl_3 3.5.0-1
- xfrmnl_sel_set_dport@Base 3.5.0-1
- xfrmnl_sel_set_dport@libnl_3 3.5.0-1
- xfrmnl_sel_set_dportmask@Base 3.5.0-1
- xfrmnl_sel_set_dportmask@libnl_3 3.5.0-1
- xfrmnl_sel_set_family@Base 3.5.0-1
- xfrmnl_sel_set_family@libnl_3 3.5.0-1
- xfrmnl_sel_set_ifindex@Base 3.5.0-1
- xfrmnl_sel_set_ifindex@libnl_3 3.5.0-1
- xfrmnl_sel_set_prefixlen_d@Base 3.5.0-1
- xfrmnl_sel_set_prefixlen_d@libnl_3 3.5.0-1
- xfrmnl_sel_set_prefixlen_s@Base 3.5.0-1
- xfrmnl_sel_set_prefixlen_s@libnl_3 3.5.0-1
- xfrmnl_sel_set_proto@Base 3.5.0-1
- xfrmnl_sel_set_proto@libnl_3 3.5.0-1
- xfrmnl_sel_set_saddr@Base 3.5.0-1
- xfrmnl_sel_set_saddr@libnl_3 3.5.0-1
- xfrmnl_sel_set_sport@Base 3.5.0-1
- xfrmnl_sel_set_sport@libnl_3 3.5.0-1
- xfrmnl_sel_set_sportmask@Base 3.5.0-1
- xfrmnl_sel_set_sportmask@libnl_3 3.5.0-1
- xfrmnl_sel_set_userid@Base 3.5.0-1
- xfrmnl_sel_set_userid@libnl_3 3.5.0-1
- xfrmnl_sel_shared@Base 3.5.0-1
- xfrmnl_sel_shared@libnl_3 3.5.0-1
- xfrmnl_sp_action2str@Base 3.5.0-1
- xfrmnl_sp_action2str@libnl_3 3.5.0-1
- xfrmnl_sp_add@Base 3.5.0-1
- xfrmnl_sp_add@libnl_3 3.5.0-1
- xfrmnl_sp_add_usertemplate@Base 3.5.0-1
- xfrmnl_sp_add_usertemplate@libnl_3 3.5.0-1
- xfrmnl_sp_alloc@Base 3.5.0-1
- xfrmnl_sp_alloc@libnl_3 3.5.0-1
- xfrmnl_sp_alloc_cache@Base 3.5.0-1
- xfrmnl_sp_alloc_cache@libnl_3 3.5.0-1
- xfrmnl_sp_build_add_request@Base 3.5.0-1
- xfrmnl_sp_build_add_request@libnl_3 3.5.0-1
- xfrmnl_sp_build_delete_request@Base 3.5.0-1
- xfrmnl_sp_build_delete_request@libnl_3 3.5.0-1
- xfrmnl_sp_build_get_request@Base 3.5.0-1
- xfrmnl_sp_build_get_request@libnl_3 3.5.0-1
- xfrmnl_sp_build_update_request@Base 3.5.0-1
- xfrmnl_sp_build_update_request@libnl_3 3.5.0-1
- xfrmnl_sp_delete@Base 3.5.0-1
- xfrmnl_sp_delete@libnl_3 3.5.0-1
- xfrmnl_sp_dir2str@Base 3.5.0-1
- xfrmnl_sp_dir2str@libnl_3 3.5.0-1
- xfrmnl_sp_flags2str@Base 3.5.0-1
- xfrmnl_sp_flags2str@libnl_3 3.5.0-1
- xfrmnl_sp_foreach_usertemplate@Base 3.5.0-1
- xfrmnl_sp_foreach_usertemplate@libnl_3 3.5.0-1
- xfrmnl_sp_get@Base 3.5.0-1
- xfrmnl_sp_get@libnl_3 3.5.0-1
- xfrmnl_sp_get_action@Base 3.5.0-1
- xfrmnl_sp_get_action@libnl_3 3.5.0-1
- xfrmnl_sp_get_curlifetime@Base 3.5.0-1
- xfrmnl_sp_get_curlifetime@libnl_3 3.5.0-1
- xfrmnl_sp_get_dir@Base 3.5.0-1
- xfrmnl_sp_get_dir@libnl_3 3.5.0-1
- xfrmnl_sp_get_flags@Base 3.5.0-1
- xfrmnl_sp_get_flags@libnl_3 3.5.0-1
- xfrmnl_sp_get_index@Base 3.5.0-1
- xfrmnl_sp_get_index@libnl_3 3.5.0-1
- xfrmnl_sp_get_kernel@Base 3.5.0-1
- xfrmnl_sp_get_kernel@libnl_3 3.5.0-1
- xfrmnl_sp_get_lifetime_cfg@Base 3.5.0-1
- xfrmnl_sp_get_lifetime_cfg@libnl_3 3.5.0-1
- xfrmnl_sp_get_mark@Base 3.5.0-1
- xfrmnl_sp_get_mark@libnl_3 3.5.0-1
- xfrmnl_sp_get_nusertemplates@Base 3.5.0-1
- xfrmnl_sp_get_nusertemplates@libnl_3 3.5.0-1
- xfrmnl_sp_get_priority@Base 3.5.0-1
- xfrmnl_sp_get_priority@libnl_3 3.5.0-1
- xfrmnl_sp_get_sec_ctx@Base 3.5.0-1
- xfrmnl_sp_get_sec_ctx@libnl_3 3.5.0-1
- xfrmnl_sp_get_sel@Base 3.5.0-1
- xfrmnl_sp_get_sel@libnl_3 3.5.0-1
- xfrmnl_sp_get_share@Base 3.5.0-1
- xfrmnl_sp_get_share@libnl_3 3.5.0-1
- xfrmnl_sp_get_userpolicy_type@Base 3.5.0-1
- xfrmnl_sp_get_userpolicy_type@libnl_3 3.5.0-1
- xfrmnl_sp_get_usertemplates@Base 3.5.0-1
- xfrmnl_sp_get_usertemplates@libnl_3 3.5.0-1
- xfrmnl_sp_index2dir@Base 3.5.0-1
- xfrmnl_sp_index2dir@libnl_3 3.5.0-1
- xfrmnl_sp_parse@Base 3.5.0-1
- xfrmnl_sp_parse@libnl_3 3.5.0-1
- xfrmnl_sp_put@Base 3.5.0-1
- xfrmnl_sp_put@libnl_3 3.5.0-1
- xfrmnl_sp_remove_usertemplate@Base 3.5.0-1
- xfrmnl_sp_remove_usertemplate@libnl_3 3.5.0-1
- xfrmnl_sp_set_action@Base 3.5.0-1
- xfrmnl_sp_set_action@libnl_3 3.5.0-1
- xfrmnl_sp_set_dir@Base 3.5.0-1
- xfrmnl_sp_set_dir@libnl_3 3.5.0-1
- xfrmnl_sp_set_flags@Base 3.5.0-1
- xfrmnl_sp_set_flags@libnl_3 3.5.0-1
- xfrmnl_sp_set_index@Base 3.5.0-1
- xfrmnl_sp_set_index@libnl_3 3.5.0-1
- xfrmnl_sp_set_lifetime_cfg@Base 3.5.0-1
- xfrmnl_sp_set_lifetime_cfg@libnl_3 3.5.0-1
- xfrmnl_sp_set_mark@Base 3.5.0-1
- xfrmnl_sp_set_mark@libnl_3 3.5.0-1
- xfrmnl_sp_set_priority@Base 3.5.0-1
- xfrmnl_sp_set_priority@libnl_3 3.5.0-1
- xfrmnl_sp_set_sec_ctx@Base 3.5.0-1
- xfrmnl_sp_set_sec_ctx@libnl_3 3.5.0-1
- xfrmnl_sp_set_sel@Base 3.5.0-1
- xfrmnl_sp_set_sel@libnl_3 3.5.0-1
- xfrmnl_sp_set_share@Base 3.5.0-1
- xfrmnl_sp_set_share@libnl_3 3.5.0-1
- xfrmnl_sp_set_userpolicy_type@Base 3.5.0-1
- xfrmnl_sp_set_userpolicy_type@libnl_3 3.5.0-1
- xfrmnl_sp_share2str@Base 3.5.0-1
- xfrmnl_sp_share2str@libnl_3 3.5.0-1
- xfrmnl_sp_str2action@Base 3.5.0-1
- xfrmnl_sp_str2action@libnl_3 3.5.0-1
- xfrmnl_sp_str2dir@Base 3.5.0-1
- xfrmnl_sp_str2dir@libnl_3 3.5.0-1
- xfrmnl_sp_str2flag@Base 3.5.0-1
- xfrmnl_sp_str2flag@libnl_3 3.5.0-1
- xfrmnl_sp_str2share@Base 3.5.0-1
- xfrmnl_sp_str2share@libnl_3 3.5.0-1
- xfrmnl_sp_str2type@Base 3.5.0-1
- xfrmnl_sp_str2type@libnl_3 3.5.0-1
- xfrmnl_sp_type2str@Base 3.5.0-1
- xfrmnl_sp_type2str@libnl_3 3.5.0-1
- xfrmnl_sp_update@Base 3.5.0-1
- xfrmnl_sp_update@libnl_3 3.5.0-1
- xfrmnl_sp_usertemplate_n@Base 3.5.0-1
- xfrmnl_sp_usertemplate_n@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_alloc@Base 3.5.0-1
- xfrmnl_user_tmpl_alloc@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_clone@Base 3.5.0-1
- xfrmnl_user_tmpl_clone@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_cmp@Base 3.5.0-1
- xfrmnl_user_tmpl_cmp@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_dump@Base 3.5.0-1
- xfrmnl_user_tmpl_dump@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_free@Base 3.5.0-1
- xfrmnl_user_tmpl_free@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_get_aalgos@Base 3.5.0-1
- xfrmnl_user_tmpl_get_aalgos@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_get_calgos@Base 3.5.0-1
- xfrmnl_user_tmpl_get_calgos@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_get_daddr@Base 3.5.0-1
- xfrmnl_user_tmpl_get_daddr@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_get_ealgos@Base 3.5.0-1
- xfrmnl_user_tmpl_get_ealgos@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_get_family@Base 3.5.0-1
- xfrmnl_user_tmpl_get_family@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_get_mode@Base 3.5.0-1
- xfrmnl_user_tmpl_get_mode@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_get_optional@Base 3.5.0-1
- xfrmnl_user_tmpl_get_optional@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_get_proto@Base 3.5.0-1
- xfrmnl_user_tmpl_get_proto@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_get_reqid@Base 3.5.0-1
- xfrmnl_user_tmpl_get_reqid@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_get_saddr@Base 3.5.0-1
- xfrmnl_user_tmpl_get_saddr@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_get_share@Base 3.5.0-1
- xfrmnl_user_tmpl_get_share@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_get_spi@Base 3.5.0-1
- xfrmnl_user_tmpl_get_spi@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_mode2str@Base 3.5.0-1
- xfrmnl_user_tmpl_mode2str@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_set_aalgos@Base 3.5.0-1
- xfrmnl_user_tmpl_set_aalgos@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_set_calgos@Base 3.5.0-1
- xfrmnl_user_tmpl_set_calgos@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_set_daddr@Base 3.5.0-1
- xfrmnl_user_tmpl_set_daddr@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_set_ealgos@Base 3.5.0-1
- xfrmnl_user_tmpl_set_ealgos@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_set_family@Base 3.5.0-1
- xfrmnl_user_tmpl_set_family@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_set_mode@Base 3.5.0-1
- xfrmnl_user_tmpl_set_mode@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_set_optional@Base 3.5.0-1
- xfrmnl_user_tmpl_set_optional@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_set_proto@Base 3.5.0-1
- xfrmnl_user_tmpl_set_proto@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_set_reqid@Base 3.5.0-1
- xfrmnl_user_tmpl_set_reqid@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_set_saddr@Base 3.5.0-1
- xfrmnl_user_tmpl_set_saddr@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_set_share@Base 3.5.0-1
- xfrmnl_user_tmpl_set_share@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_set_spi@Base 3.5.0-1
- xfrmnl_user_tmpl_set_spi@libnl_3 3.5.0-1
- xfrmnl_user_tmpl_str2mode@Base 3.5.0-1
- xfrmnl_user_tmpl_str2mode@libnl_3 3.5.0-1
diff --git a/src/libnl3/debian/libnl-xfrm-3-dev.install b/src/libnl3/debian/libnl-xfrm-3-dev.install
deleted file mode 100644
index f57e152c5aae..000000000000
--- a/src/libnl3/debian/libnl-xfrm-3-dev.install
+++ /dev/null
@@ -1,3 +0,0 @@
-debian/tmp/usr/lib/*/pkgconfig/libnl-xfrm-3*
-debian/tmp/usr/lib/*/libnl-xfrm-3*.so
-debian/tmp/usr/lib/*/libnl-xfrm-3*.a
diff --git a/src/libnl3/debian/patches/series b/src/libnl3/debian/patches/series
deleted file mode 100644
index e69de29bb2d1..000000000000
diff --git a/src/libnl3/debian/rules b/src/libnl3/debian/rules
deleted file mode 100755
index 2d33f6ac8992..000000000000
--- a/src/libnl3/debian/rules
+++ /dev/null
@@ -1,4 +0,0 @@
-#!/usr/bin/make -f
-
-%:
-	dh $@
diff --git a/src/libnl3/debian/source/format b/src/libnl3/debian/source/format
deleted file mode 100644
index 163aaf8d82b6..000000000000
--- a/src/libnl3/debian/source/format
+++ /dev/null
@@ -1 +0,0 @@
-3.0 (quilt)
diff --git a/src/libnl3/debian/watch b/src/libnl3/debian/watch
deleted file mode 100644
index 9939913ca0e0..000000000000
--- a/src/libnl3/debian/watch
+++ /dev/null
@@ -1,2 +0,0 @@
-version=3
-https://github.com/thom311/libnl/releases/libnl-(.*)\.tar\.gz
diff --git a/src/libnl3/patch/0001-mpls-encap-accessors.patch b/src/libnl3/patch/0001-mpls-encap-accessors.patch
deleted file mode 100644
index 2fb6a19314ec..000000000000
--- a/src/libnl3/patch/0001-mpls-encap-accessors.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 701122c539d6da3fbd3367be6e62141328ebeb07 Mon Sep 17 00:00:00 2001
-From: Ann Pokora <apokora@juniper.net>
-Date: Tue, 25 May 2021 18:07:37 -0700
-Subject: [PATCH 1/2] mpls encap accessors
-
-Signed-off-by: Ann Pokora <apokora@juniper.net>
----
- include/netlink/route/nexthop.h |  2 ++
- lib/route/nh_encap_mpls.c       | 28 ++++++++++++++++++++++++++++
- libnl-route-3.sym               |  2 ++
- 3 files changed, 32 insertions(+)
-
-diff --git a/include/netlink/route/nexthop.h b/include/netlink/route/nexthop.h
-index 5b422dd..a502005 100644
---- a/include/netlink/route/nexthop.h
-+++ b/include/netlink/route/nexthop.h
-@@ -70,6 +70,8 @@ extern int		rtnl_route_nh_str2flags(const char *);
- extern int		rtnl_route_nh_encap_mpls(struct rtnl_nexthop *nh,
- 						 struct nl_addr *addr,
- 						 uint8_t ttl);
-+extern struct nl_addr *	rtnl_route_nh_get_encap_mpls_dst(struct rtnl_nexthop *);
-+extern uint8_t		rtnl_route_nh_get_encap_mpls_ttl(struct rtnl_nexthop *);
- #ifdef __cplusplus
- }
- #endif
-diff --git a/lib/route/nh_encap_mpls.c b/lib/route/nh_encap_mpls.c
-index 081661e..18336ac 100644
---- a/lib/route/nh_encap_mpls.c
-+++ b/lib/route/nh_encap_mpls.c
-@@ -133,3 +133,31 @@ int rtnl_route_nh_encap_mpls(struct rtnl_nexthop *nh,
- 
- 	return 0;
- }
-+
-+struct nl_addr *rtnl_route_nh_get_encap_mpls_dst(struct rtnl_nexthop *nh)
-+{
-+	struct mpls_iptunnel_encap *mpls_encap;
-+
-+	if (!nh->rtnh_encap || nh->rtnh_encap->ops->encap_type != LWTUNNEL_ENCAP_MPLS)
-+		return NULL;
-+
-+	mpls_encap = (struct mpls_iptunnel_encap *)nh->rtnh_encap->priv;
-+	if (!mpls_encap)
-+		return NULL;
-+
-+	return mpls_encap->dst;
-+}
-+
-+uint8_t rtnl_route_nh_get_encap_mpls_ttl(struct rtnl_nexthop *nh)
-+{
-+	struct mpls_iptunnel_encap *mpls_encap;
-+
-+	if (!nh->rtnh_encap || nh->rtnh_encap->ops->encap_type != LWTUNNEL_ENCAP_MPLS)
-+		return 0;
-+
-+	mpls_encap = (struct mpls_iptunnel_encap *)nh->rtnh_encap->priv;
-+	if (!mpls_encap)
-+		return 0;
-+
-+	return mpls_encap->ttl;
-+}
-diff --git a/libnl-route-3.sym b/libnl-route-3.sym
-index 4a65503..ce6d714 100644
---- a/libnl-route-3.sym
-+++ b/libnl-route-3.sym
-@@ -1127,6 +1127,8 @@ global:
- 	rtnl_qdisc_mqprio_set_priomap;
- 	rtnl_qdisc_mqprio_set_queue;
- 	rtnl_qdisc_mqprio_set_shaper;
-+	rtnl_route_nh_get_encap_mpls_dst;
-+	rtnl_route_nh_get_encap_mpls_ttl;
- 	rtnl_rule_get_dport;
- 	rtnl_rule_get_ipproto;
- 	rtnl_rule_get_protocol;
--- 
-2.7.4
-
diff --git a/src/libnl3/patch/0002-mpls-remove-nl_addr_valid.patch b/src/libnl3/patch/0002-mpls-remove-nl_addr_valid.patch
deleted file mode 100644
index 9231aa2cd983..000000000000
--- a/src/libnl3/patch/0002-mpls-remove-nl_addr_valid.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From c89d1a129f71d3d2f76e6cbadb11ef41d8941a73 Mon Sep 17 00:00:00 2001
-From: Ann Pokora <apokora@juniper.net>
-Date: Tue, 25 May 2021 18:10:04 -0700
-Subject: [PATCH 2/2] mpls remove nl_addr_valid
-
-The removed calls to nl_addr_valid() are passing in a pointer to a binary address
-and the length of the binary address, which does not match expected arguments for
-nl_addr_valid().
-nl_addr_valid() expects a pointer to an ASCII string and the address family of
-the string format.
-The incorrect arguments cause unexpected failures and the expected arguments are
-not available in the context.
-
-Signed-off-by: Ann Pokora <apokora@juniper.net>
----
- lib/route/nexthop.c       | 8 --------
- lib/route/nh_encap_mpls.c | 4 ----
- 2 files changed, 12 deletions(-)
-
-diff --git a/lib/route/nexthop.c b/lib/route/nexthop.c
-index 7a9904c..ac0095e 100644
---- a/lib/route/nexthop.c
-+++ b/lib/route/nexthop.c
-@@ -351,10 +351,6 @@ int rtnl_route_nh_set_newdst(struct rtnl_nexthop *nh, struct nl_addr *addr)
- {
- 	struct nl_addr *old = nh->rtnh_newdst;
- 
--	if (!nl_addr_valid(nl_addr_get_binary_addr(addr),
--			   nl_addr_get_len(addr)))
--		return -NLE_INVAL;
--
- 	if (addr) {
- 		nh->rtnh_newdst = nl_addr_get(addr);
- 		nh->ce_mask |= NH_ATTR_NEWDST;
-@@ -378,10 +374,6 @@ int rtnl_route_nh_set_via(struct rtnl_nexthop *nh, struct nl_addr *addr)
- {
- 	struct nl_addr *old = nh->rtnh_via;
- 
--	if (!nl_addr_valid(nl_addr_get_binary_addr(addr),
--			   nl_addr_get_len(addr)))
--		return -NLE_INVAL;
--
- 	if (addr) {
- 		nh->rtnh_via = nl_addr_get(addr);
- 		nh->ce_mask |= NH_ATTR_VIA;
-diff --git a/lib/route/nh_encap_mpls.c b/lib/route/nh_encap_mpls.c
-index 18336ac..6c5a3c7 100644
---- a/lib/route/nh_encap_mpls.c
-+++ b/lib/route/nh_encap_mpls.c
-@@ -109,10 +109,6 @@ int rtnl_route_nh_encap_mpls(struct rtnl_nexthop *nh,
- 	if (!addr)
- 		return -NLE_INVAL;
- 
--	if (!nl_addr_valid(nl_addr_get_binary_addr(addr),
--			   nl_addr_get_len(addr)))
--		return -NLE_INVAL;
--
- 	rtnh_encap = calloc(1, sizeof(*rtnh_encap));
- 	if (!rtnh_encap)
- 		return -NLE_NOMEM;
--- 
-2.7.4
-
diff --git a/src/libnl3/patch/0003-Adding-support-for-RTA_NH_ID-attribute.patch b/src/libnl3/patch/0003-Adding-support-for-RTA_NH_ID-attribute.patch
index 80f94a2a02b7..3c1fa22cceac 100644
--- a/src/libnl3/patch/0003-Adding-support-for-RTA_NH_ID-attribute.patch
+++ b/src/libnl3/patch/0003-Adding-support-for-RTA_NH_ID-attribute.patch
@@ -98,7 +98,7 @@ index bacabe8..5d9d4ce 100644
  
  static int parse_multipath(struct rtnl_route *route, struct nlattr *attr)
 @@ -1201,6 +1218,9 @@ int rtnl_route_parse(struct nlmsghdr *nlh, struct rtnl_route **result)
- 		nl_addr_put(addr);
+ 		rtnl_route_set_pref_src(route, addr);
  	}
  
 +	if (tb[RTA_NH_ID])
diff --git a/src/libnl3/patch/keep-symbol-versions-in-libraries.patch b/src/libnl3/patch/keep-symbol-versions-in-libraries.patch
new file mode 100644
index 000000000000..d4cef01e45a1
--- /dev/null
+++ b/src/libnl3/patch/keep-symbol-versions-in-libraries.patch
@@ -0,0 +1,91 @@
+From 3f7655c4e4ff042f77c0bbab8b3afc11470456b6 Mon Sep 17 00:00:00 2001
+From: Saikrishna Arcot <sarcot@microsoft.com>
+Date: Wed, 6 Nov 2024 13:45:13 -0800
+Subject: [PATCH] Keep symbol versions in libraries
+
+Libraries/binaries that were compiled against the older libnl3 library
+(or for other environments) have the symbol versions, and removing them
+will cause breakage. For now, kepp the symbol versions.
+
+Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
+---
+ Makefile.am | 21 ++++++++++++++-------
+ 1 file changed, 14 insertions(+), 7 deletions(-)
+
+diff --git a/Makefile.am b/Makefile.am
+index 7debff9..58e9e87 100644
+--- a/Makefile.am
++++ b/Makefile.am
+@@ -370,7 +370,8 @@ EXTRA_lib_libnl_3_la_DEPENDENCIES = \
+ lib_libnl_3_la_CPPFLAGS = \
+ 	$(lib_cppflags)
+ lib_libnl_3_la_LDFLAGS = \
+-	-version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE)
++	-version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE) \
++	-Wl,--version-script=$(srcdir)/libnl-3.sym
+ 
+ lib_LTLIBRARIES += lib/libnl-route-3.la
+ 
+@@ -466,7 +467,8 @@ EXTRA_lib_libnl_route_3_la_DEPENDENCIES = \
+ lib_libnl_route_3_la_CPPFLAGS = \
+ 	$(lib_cppflags)
+ lib_libnl_route_3_la_LDFLAGS = \
+-	-version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE)
++	-version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE) \
++	-Wl,--version-script=$(srcdir)/libnl-route-3.sym
+ lib_libnl_route_3_la_LIBADD = \
+ 	lib/libnl-3.la
+ 
+@@ -486,7 +488,8 @@ EXTRA_lib_libnl_idiag_3_la_DEPENDENCIES = \
+ lib_libnl_idiag_3_la_CPPFLAGS = \
+ 	$(lib_cppflags)
+ lib_libnl_idiag_3_la_LDFLAGS = \
+-	-version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE)
++	-version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE) \
++	-Wl,--version-script=$(srcdir)/libnl-idiag-3.sym
+ lib_libnl_idiag_3_la_LIBADD = \
+ 	lib/libnl-3.la
+ 
+@@ -503,7 +506,8 @@ EXTRA_lib_libnl_genl_3_la_DEPENDENCIES = \
+ lib_libnl_genl_3_la_CPPFLAGS = \
+ 	$(lib_cppflags)
+ lib_libnl_genl_3_la_LDFLAGS = \
+-	-version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE)
++	-version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE) \
++	-Wl,--version-script=$(srcdir)/libnl-genl-3.sym
+ lib_libnl_genl_3_la_LIBADD = \
+ 	lib/libnl-3.la
+ 
+@@ -530,7 +534,8 @@ lib_libnl_nf_3_la_CPPFLAGS = \
+ EXTRA_lib_libnl_nf_3_la_DEPENDENCIES = \
+ 	libnl-nf-3.sym
+ lib_libnl_nf_3_la_LDFLAGS = \
+-	-version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE)
++	-version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE) \
++	-Wl,--version-script=$(srcdir)/libnl-nf-3.sym
+ lib_libnl_nf_3_la_LIBADD  = \
+ 	lib/libnl-3.la \
+ 	lib/libnl-route-3.la
+@@ -548,7 +553,8 @@ lib_libnl_xfrm_3_la_SOURCES = \
+ lib_libnl_xfrm_3_la_CPPFLAGS = \
+ 	$(lib_cppflags)
+ lib_libnl_xfrm_3_la_LDFLAGS = \
+-	-version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE)
++	-version-info $(LT_CURRENT):$(LT_REVISION):$(LT_AGE) \
++	-Wl,--version-script=$(srcdir)/libnl-xfrm-3.sym
+ EXTRA_lib_libnl_xfrm_3_la_DEPENDENCIES = \
+ 	libnl-xfrm-3.sym
+ lib_libnl_xfrm_3_la_LIBADD = \
+@@ -640,7 +646,8 @@ src_lib_libnl_cli_3_la_CPPFLAGS = \
+ 	-I$(srcdir)/include \
+ 	-I$(builddir)/include
+ src_lib_libnl_cli_3_la_LDFLAGS = \
+-	$(src_lib_ldflags)
++	$(src_lib_ldflags) \
++	-Wl,--version-script=$(srcdir)/libnl-cli-3.sym
+ src_lib_libnl_cli_3_la_LIBADD = \
+ 	lib/libnl-3.la \
+ 	lib/libnl-route-3.la \
+-- 
+2.34.1
+
diff --git a/src/libnl3/patch/series b/src/libnl3/patch/series
index 4c7c2d8e25a5..92317908c4f9 100644
--- a/src/libnl3/patch/series
+++ b/src/libnl3/patch/series
@@ -1,3 +1,4 @@
-0001-mpls-encap-accessors.patch
-0002-mpls-remove-nl_addr_valid.patch
 0003-Adding-support-for-RTA_NH_ID-attribute.patch
+switch-to-debhelper.patch
+keep-symbol-versions-in-libraries.patch
+update-changelog.patch
diff --git a/src/libnl3/patch/switch-to-debhelper.patch b/src/libnl3/patch/switch-to-debhelper.patch
new file mode 100644
index 000000000000..4f6f1227f40f
--- /dev/null
+++ b/src/libnl3/patch/switch-to-debhelper.patch
@@ -0,0 +1,263 @@
+From 051dc6f003bf57fd41f75317281ab3bab776e6f1 Mon Sep 17 00:00:00 2001
+From: Saikrishna Arcot <sarcot@microsoft.com>
+Date: Wed, 30 Oct 2024 09:16:47 -0700
+Subject: [PATCH] Switch to debhelper build infra
+
+This makes it easier to have it use the latest compat level when
+building.
+
+Also remove the udeb packages, as SONiC doesn't need udeb packages here.
+---
+ debian/compat                        |  2 +-
+ debian/control                       | 40 +-------------------------
+ debian/libnl-3-200-udeb.install      |  1 -
+ debian/libnl-3-200.install           |  1 -
+ debian/libnl-3-dev.install           |  3 +-
+ debian/libnl-cli-3-200.install       |  1 -
+ debian/libnl-cli-3-dev.install       |  8 ++++--
+ debian/libnl-genl-3-200-udeb.install |  2 --
+ debian/libnl-genl-3-200.install      |  1 -
+ debian/libnl-genl-3-dev.install      |  3 +-
+ debian/libnl-route-3-dev.install     |  6 ++--
+ debian/libnl-xfrm-3-dev.install      |  6 ++--
+ debian/not-installed                 |  3 ++
+ debian/rules                         | 43 ++--------------------------
+ 14 files changed, 20 insertions(+), 100 deletions(-)
+ delete mode 100644 debian/libnl-3-200-udeb.install
+ mode change 100755 => 100644 debian/libnl-3-200.install
+ mode change 100755 => 100644 debian/libnl-3-dev.install
+ mode change 100755 => 100644 debian/libnl-cli-3-200.install
+ delete mode 100755 debian/libnl-genl-3-200-udeb.install
+ mode change 100755 => 100644 debian/libnl-genl-3-200.install
+ mode change 100755 => 100644 debian/libnl-genl-3-dev.install
+ create mode 100644 debian/not-installed
+
+diff --git a/debian/compat b/debian/compat
+index ec63514..b1bd38b 100644
+--- a/debian/compat
++++ b/debian/compat
+@@ -1 +1 @@
+-9
++13
+diff --git a/debian/control b/debian/control
+index 7b22e69..c954b03 100644
+--- a/debian/control
++++ b/debian/control
+@@ -2,7 +2,7 @@ Source: libnl3
+ Section: net
+ Priority: optional
+ Maintainer: Heiko Stuebner <mmind@debian.org>
+-Build-Depends: debhelper (>= 9), dh-exec (>= 0.3), cdbs (>= 0.4.93~), bison, flex,
++Build-Depends: debhelper (>= 13), bison, flex,
+  automake, autoconf, dh-autoreconf, linux-libc-dev (>= 3.2.41), pkg-config
+ Standards-Version: 4.1.4
+ Homepage: http://www.infradead.org/~tgr/libnl/
+@@ -204,41 +204,3 @@ Description: development library and headers for libnl-xfrm-3
+  .
+  This package contains the files that are needed to build applications using
+  libnl-xfrm-3.
+-
+-Package: libnl-3-200-dbg
+-Architecture: linux-any
+-Section: debug
+-Depends: libnl-3-200 (= ${binary:Version}), ${misc:Depends}
+-Description: debug symbols for libnl3
+- This is a library for applications dealing with netlink sockets.
+- The library provides an interface for raw netlink messaging and various
+- netlink family specific interfaces.
+- .
+- This package contains unstripped shared libraries. It is provided primarily
+- to provide a backtrace with names in a debugger, this makes it somewhat easier
+- to interpret core dumps. The libraries are installed in /usr/lib/debug and
+- are automatically used by gdb.
+-
+-Package: libnl-3-200-udeb
+-Architecture: linux-any
+-XC-Package-Type: udeb
+-Section: debian-installer
+-Depends: ${misc:Depends}, ${shlibs:Depends}
+-Description: library for dealing with netlink sockets 
+- This is a library for applications dealing with netlink sockets.
+- The library provides an interface for raw netlink messaging and various
+- netlink family specific interfaces.
+- .
+- This package is a udeb. It's only useful inside of debian-installer.
+-
+-Package: libnl-genl-3-200-udeb
+-Architecture: linux-any
+-XC-Package-Type: udeb
+-Section: debian-installer
+-Depends: libnl-3-200-udeb (= ${binary:Version}), ${misc:Depends}, ${shlibs:Depends}
+-Description: library for dealing with netlink sockets - generic netlink
+- This is a library for applications dealing with netlink sockets.
+- The library provides an interface for raw netlink messaging and various
+- netlink family specific interfaces.
+- .
+- This package is a udeb. It's only useful inside of debian-installer.
+diff --git a/debian/libnl-3-200-udeb.install b/debian/libnl-3-200-udeb.install
+deleted file mode 100644
+index 4b3a77c..0000000
+--- a/debian/libnl-3-200-udeb.install
++++ /dev/null
+@@ -1 +0,0 @@
+-usr/lib/*/libnl-3.so.* lib
+diff --git a/debian/libnl-3-200.install b/debian/libnl-3-200.install
+old mode 100755
+new mode 100644
+index dab89da..4685c79
+--- a/debian/libnl-3-200.install
++++ b/debian/libnl-3-200.install
+@@ -1,3 +1,2 @@
+-#!/usr/bin/dh-exec
+ debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-3*.so.* lib/${DEB_HOST_MULTIARCH}/
+ debian/tmp/etc/libnl-3/* etc/libnl-3
+diff --git a/debian/libnl-3-dev.install b/debian/libnl-3-dev.install
+old mode 100755
+new mode 100644
+index 3715b8b..5f56b4a
+--- a/debian/libnl-3-dev.install
++++ b/debian/libnl-3-dev.install
+@@ -1,5 +1,4 @@
+-#!/usr/bin/dh-exec
+ debian/tmp/usr/include/*
+-debian/tmp/usr/lib/*/pkgconfig/libnl-3*
++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/pkgconfig/libnl-3*
+ debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-3.so lib/${DEB_HOST_MULTIARCH}/
+ debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-3.a lib/${DEB_HOST_MULTIARCH}/
+diff --git a/debian/libnl-cli-3-200.install b/debian/libnl-cli-3-200.install
+old mode 100755
+new mode 100644
+index 6735ec9..4e21828
+--- a/debian/libnl-cli-3-200.install
++++ b/debian/libnl-cli-3-200.install
+@@ -1,4 +1,3 @@
+-#!/usr/bin/dh-exec
+ debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-cli-3*.so.*
+ debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl/cli/cls/*.so usr/lib/${DEB_HOST_MULTIARCH}/libnl-3/cli/cls
+ debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl/cli/qdisc/*.so usr/lib/${DEB_HOST_MULTIARCH}/libnl-3/cli/qdisc
+diff --git a/debian/libnl-cli-3-dev.install b/debian/libnl-cli-3-dev.install
+index 66aa3b3..cfa7abe 100644
+--- a/debian/libnl-cli-3-dev.install
++++ b/debian/libnl-cli-3-dev.install
+@@ -1,3 +1,5 @@
+-debian/tmp/usr/lib/*/pkgconfig/libnl-cli-3*
+-debian/tmp/usr/lib/*/libnl-cli-3*.so
+-debian/tmp/usr/lib/*/libnl-cli-3*.a
++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/pkgconfig/libnl-cli-3*
++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-cli-3*.so
++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-cli-3*.a
++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl/cli/cls/*.a
++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl/cli/qdisc/*.a
+diff --git a/debian/libnl-genl-3-200-udeb.install b/debian/libnl-genl-3-200-udeb.install
+deleted file mode 100755
+index cb5597b..0000000
+--- a/debian/libnl-genl-3-200-udeb.install
++++ /dev/null
+@@ -1,2 +0,0 @@
+-#!/usr/bin/dh-exec
+-usr/lib/${DEB_HOST_MULTIARCH}/libnl-genl-3.so.* lib/${DEB_HOST_MULTIARCH}/
+diff --git a/debian/libnl-genl-3-200.install b/debian/libnl-genl-3-200.install
+old mode 100755
+new mode 100644
+index d9d6fae..e79fbf1
+--- a/debian/libnl-genl-3-200.install
++++ b/debian/libnl-genl-3-200.install
+@@ -1,2 +1 @@
+-#!/usr/bin/dh-exec
+ debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-genl-3*.so.* lib/${DEB_HOST_MULTIARCH}/
+diff --git a/debian/libnl-genl-3-dev.install b/debian/libnl-genl-3-dev.install
+old mode 100755
+new mode 100644
+index cbc6b51..68148a0
+--- a/debian/libnl-genl-3-dev.install
++++ b/debian/libnl-genl-3-dev.install
+@@ -1,4 +1,3 @@
+-#!/usr/bin/dh-exec
+-debian/tmp/usr/lib/*/pkgconfig/libnl-genl-3*
++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/pkgconfig/libnl-genl-3*
+ debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-genl-3*.so lib/${DEB_HOST_MULTIARCH}/
+ debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-genl-3*.a lib/${DEB_HOST_MULTIARCH}/
+diff --git a/debian/libnl-route-3-dev.install b/debian/libnl-route-3-dev.install
+index 37e248c..c3f0e4e 100644
+--- a/debian/libnl-route-3-dev.install
++++ b/debian/libnl-route-3-dev.install
+@@ -1,3 +1,3 @@
+-debian/tmp/usr/lib/*/pkgconfig/libnl-route-3*
+-debian/tmp/usr/lib/*/libnl-route-3*.so
+-debian/tmp/usr/lib/*/libnl-route-3*.a
++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/pkgconfig/libnl-route-3*
++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-route-3*.so
++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-route-3*.a
+diff --git a/debian/libnl-xfrm-3-dev.install b/debian/libnl-xfrm-3-dev.install
+index f57e152..51d78d1 100644
+--- a/debian/libnl-xfrm-3-dev.install
++++ b/debian/libnl-xfrm-3-dev.install
+@@ -1,3 +1,3 @@
+-debian/tmp/usr/lib/*/pkgconfig/libnl-xfrm-3*
+-debian/tmp/usr/lib/*/libnl-xfrm-3*.so
+-debian/tmp/usr/lib/*/libnl-xfrm-3*.a
++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/pkgconfig/libnl-xfrm-3*
++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-xfrm-3*.so
++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-xfrm-3*.a
+diff --git a/debian/not-installed b/debian/not-installed
+new file mode 100644
+index 0000000..079a795
+--- /dev/null
++++ b/debian/not-installed
+@@ -0,0 +1,3 @@
++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl-*.la
++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl/cli/cls/*.la
++debian/tmp/usr/lib/${DEB_HOST_MULTIARCH}/libnl/cli/qdisc/*.la
+diff --git a/debian/rules b/debian/rules
+index aafca20..2d33f6a 100755
+--- a/debian/rules
++++ b/debian/rules
+@@ -1,43 +1,4 @@
+ #!/usr/bin/make -f
+ 
+-DEB_BUILDDIR = debian/build
+-DEB_MAKE_FLAVORS = main udeb
+-
+-udeb_libnl=libnl-3-200-udeb
+-udeb_libnl_genl=libnl-genl-3-200-udeb
+-
+-TG_BRANCHES := debian/etc-libnl-3,debian/out-of-tree,debian/no-symvers
+-
+--include /usr/share/topgit/tg2quilt.mk
+-
+-# to export the patch series use
+-#	debian/rules tg-clean
+-#	debian/rules tg-export
+-
+-
+-include /usr/share/cdbs/1/rules/debhelper.mk
+-include /usr/share/cdbs/1/rules/autoreconf.mk
+-include /usr/share/cdbs/1/class/autotools.mk
+-
+-# FIXME: not honoured
+-#CFLAGS_udeb += $(CFLAGS) -Os
+-CFLAGS += $(if $(findstring udeb,$(cdbs_make_curflavor)),-Os)
+-
+-DEB_DH_STRIP_ARGS := --dbg-package=libnl-3-200-dbg
+-DEB_DH_MAKESHLIBS_ARGS_libnl-3-200 := --add-udeb=$(udeb_libnl)
+-DEB_DH_MAKESHLIBS_ARGS_libnl-genl-3-200 := --add-udeb=$(udeb_libnl_genl)
+-
+-DEB_MAKE_DESTDIRSKEL = $(CURDIR)/debian/tmp
+-DEB_MAKE_DESTDIRSKEL_udeb = $(CURDIR)/debian/tmp/udeb
+-
+-DEB_DH_INSTALL_ARGS_$(udeb) += --sourcedir=debian/tmp/udeb
+-
+-DEB_CONFIGURE_EXTRA_FLAGS += --libdir=\$${prefix}/lib/$(DEB_HOST_MULTIARCH)
+-
+-# Dodge debhelper's #1015263, pulling sgml-base for udebs:
+-DEB_DH_GENCONTROL_ARGS_$(udeb_libnl) = -- -Vmisc:Depends=
+-DEB_DH_GENCONTROL_ARGS_$(udeb_libnl_genl) = -- -Vmisc:Depends=
+-
+-clean::
+-	# from some unknown reason CDBS does not remove the builddir
+-	rm -rf $(DEB_BUILDDIR)
++%:
++	dh $@
+-- 
+2.34.1
+
diff --git a/src/libnl3/patch/update-changelog.patch b/src/libnl3/patch/update-changelog.patch
new file mode 100644
index 000000000000..75a6b263b91b
--- /dev/null
+++ b/src/libnl3/patch/update-changelog.patch
@@ -0,0 +1,30 @@
+From 62e7fbb3b7f47c686d918f67bbba17f77e1ed217 Mon Sep 17 00:00:00 2001
+From: Saikrishna Arcot <sarcot@microsoft.com>
+Date: Mon, 4 Nov 2024 16:26:03 -0800
+Subject: [PATCH] Update changelog
+
+Add changelog entry to force different timestamps, so that docker's
+overlay2 diff code doesn't have issues.
+
+Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
+---
+ debian/changelog | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/debian/changelog b/debian/changelog
+index b8b08d7..48e33f0 100644
+--- a/debian/changelog
++++ b/debian/changelog
+@@ -1,3 +1,9 @@
++libnl3 (3.7.0-0.2+b1sonic1) unstable; urgency=medium
++
++  * Add support to get/set the nexthop ID
++
++ -- SONiC Build <sonic-dev@lists.sonicfoundation.dev>  Tue, 05 Nov 2024 00:20:23 +0000
++
+ libnl3 (3.7.0-0.2) unstable; urgency=medium
+ 
+   * Non-maintainer upload.
+-- 
+2.34.1
+

From e41fdb3b96a61535f81e704277df7960d49106ac Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 3 Dec 2024 19:01:15 +0800
Subject: [PATCH 302/364] [submodule] Update submodule sonic-platform-common to
 the latest HEAD automatically (#21000)

#### Why I did it
src/sonic-platform-common
```
* 0f2e22f - (HEAD -> master, origin/master, origin/HEAD) Fall back to generic info if vendor specific parser fails (#517) (22 hours ago) [Ashwin Srinivasan]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 9fc9c855e230..0f2e22faccd0 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 9fc9c855e230098ad24791b5368574357a8711ab
+Subproject commit 0f2e22faccd093a1e5d18235fe119a860be7855e

From 961cdc0374a6d71826636319834a1b4159beef11 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 3 Dec 2024 19:01:25 +0800
Subject: [PATCH 303/364] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#20998)

#### Why I did it
src/sonic-host-services
```
* 438e54a - (HEAD -> master, origin/master, origin/HEAD) [Logrotate] Update log rotate configuration via ConfigDB (#61) (9 hours ago) [Yevhen Fastiuk]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index 89aead2c34eb..438e54aca685 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit 89aead2c34eb95102328c4730fce534190ee5dac
+Subproject commit 438e54aca68507d70b37100d00e4be3647c7f59f

From d06ef9a26655b3923c0477e687e0bb34273cd7df Mon Sep 17 00:00:00 2001
From: noaOrMlnx <58519608+noaOrMlnx@users.noreply.github.com>
Date: Tue, 3 Dec 2024 18:54:21 +0200
Subject: [PATCH 304/364] [Mellanox] [SN5640] Add sensors.conf, pcie.yaml
 files, and update platform.json for simx (#20987)

- Why I did it
Add platform support for SN5640 under simulation

- How I did it
Added needed files to SN5640 SimX platform

- How to verify it
Run platform simulation tests
---
 .../x86_64-nvidia_sn5640_simx-r0/pcie.yaml    |  91 ++++
 .../platform.json                             |  18 +-
 .../x86_64-nvidia_sn5640_simx-r0/sensors.conf | 494 ++++++++++++++++++
 3 files changed, 602 insertions(+), 1 deletion(-)
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/pcie.yaml
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/sensors.conf

diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/pcie.yaml b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/pcie.yaml
new file mode 100644
index 000000000000..0c0e1241b16c
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/pcie.yaml
@@ -0,0 +1,91 @@
+##
+## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+## Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+## SPDX-License-Identifier: Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: '1237'
+  name: 'Host bridge: Intel Corporation 440FX - 82441FX PMC [Natoma] (rev 02)'
+- bus: '00'
+  dev: '01'
+  fn: '0'
+  id: '7000'
+  name: 'ISA bridge: Intel Corporation 82371SB PIIX3 ISA [Natoma/Triton II]'
+- bus: '00'
+  dev: '01'
+  fn: '1'
+  id: '7010'
+  name: 'IDE interface: Intel Corporation 82371SB PIIX3 IDE [Natoma/Triton II]'
+- bus: '00'
+  dev: '01'
+  fn: '2'
+  id: '7020'
+  name: 'USB controller: Intel Corporation 82371SB PIIX3 USB [Natoma/Triton II] (rev
+    01)'
+- bus: '00'
+  dev: '01'
+  fn: '3'
+  id: '7113'
+  name: 'Bridge: Intel Corporation 82371AB/EB/MB PIIX4 ACPI (rev 03)'
+- bus: '00'
+  dev: '02'
+  fn: '0'
+  id: 00b8
+  name: 'VGA compatible controller: Cirrus Logic GD 5446'
+- bus: '00'
+  dev: '03'
+  fn: '0'
+  id: 100e
+  name: 'Ethernet controller: Intel Corporation 82540EM Gigabit Ethernet Controller
+    (rev 03)'
+- bus: '00'
+  dev: '04'
+  fn: '0'
+  id: '1002'
+  name: 'Unclassified device [00ff]: Red Hat, Inc. Virtio memory balloon'
+- bus: '00'
+  dev: '05'
+  fn: '0'
+  id: '1009'
+  name: 'Unclassified device [0002]: Red Hat, Inc. Virtio filesystem'
+- bus: '00'
+  dev: '06'
+  fn: '0'
+  id: '2922'
+  name: 'SATA controller: Intel Corporation 82801IR/IO/IH (ICH9R/DO/DH) 6 port SATA
+    Controller [AHCI mode] (rev 02)'
+- bus: '00'
+  dev: '07'
+  fn: '0'
+  id: '0001'
+  name: 'PCI bridge: Red Hat, Inc. QEMU PCI-PCI bridge'
+- bus: '00'
+  dev: 0c
+  fn: '0'
+  id: '1009'
+  name: 'Unclassified device [0002]: Red Hat, Inc. Virtio filesystem'
+- bus: '00'
+  dev: 0e
+  fn: '0'
+  id: '1001'
+  name: 'System peripheral: NVIDIA Corporation GK110B [GeForce GTX TITAN Z] (rev 01)'
+- bus: '01'
+  dev: '10'
+  fn: '0'
+  id: cf82
+  name: 'Ethernet controller: Mellanox Technologies Spectrum-4L'
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json
index d866c6a23ec2..755c7e03b629 100644
--- a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json
@@ -1,6 +1,6 @@
 {
     "chassis": {
-        "name": "SN5600_SIMX",
+        "name": "SN5640_SIMX",
         "components": [
             {
                 "name": "ONIE"
@@ -634,6 +634,22 @@
                         "name": "xSFP module 64 Temp"
                     }
                 ]
+            },
+            {
+                "name": "sfp65",
+                "thermals": [
+                    {
+                        "name": "xSFP module 65 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp66",
+                "thermals": [
+                    {
+                        "name": "xSFP module 66 Temp"
+                    }
+                ]
             }
         ]
     },
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/sensors.conf b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/sensors.conf
new file mode 100644
index 000000000000..6ef2195aac57
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/sensors.conf
@@ -0,0 +1,494 @@
+##################################################################################
+# Copyright (c) 2019 - 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+#
+# Platform specific sensors config for SN5600
+##################################################################################
+
+# Temperature sensors
+chip "mlxsw-i2c-*-48"
+    label temp1 "Ambient ASIC Temp"
+
+chip "tmp102-i2c-6-49"
+        label temp1 "Ambient Fan Side Temp (air intake)"
+chip "adt75-i2c-6-49"
+    label temp1 "Ambient Fan Side Temp (air intake)"
+chip "stts751-i2c-6-49"
+    label temp1 "Ambient Fan Side Temp (air intake)"
+chip "tmp102-i2c-7-4a"
+    label temp1 "Ambient Port Side Temp (air exhaust)"
+chip "adt75-i2c-7-4a"
+    label temp1 "Ambient Port Side Temp (air exhaust)"
+chip "stts751-i2c-7-4a"
+    label temp1 "Ambient Port Side Temp (air exhaust)"
+chip "tmp411-i2c-7-4c"
+    label temp1 "Ambient External Temp"
+
+# Power controllers
+chip "mp2891-i2c-*-62"
+    label in1      "PMIC-1 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-1 VDD_M ADJ Rail (out1)"
+    ignore in3
+    label temp1    "PMIC-1 VDD_M ADJ Temp 1"
+    ignore temp2
+    label power1   "PMIC-1 13V5 VDD_M (in)"
+    label power2   "PMIC-1 VDD_M Rail Pwr (out1)"
+    ignore power3
+    label curr1    "PMIC-1 13V5 VDD_M Rail Curr (in1)"
+    label curr2    "PMIC-1 VDD_M Rail Curr (out1)"
+    ignore curr3
+    ignore curr4
+    ignore curr5
+    ignore curr6
+    ignore curr7
+    ignore curr8
+    ignore curr9
+    ignore curr10
+chip "xdpe1a2g7-i2c-*-62"
+    label in1      "PMIC-1 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-1 VDD_M ADJ Rail (out1)"
+    ignore in3
+    label temp1    "PMIC-1 VDD_M ADJ Temp 1"
+    ignore temp2
+    label power1   "PMIC-1 13V5 VDD_M (in)"
+    label power2   "PMIC-1 VDD_M Rail Pwr (out1)"
+    ignore power3
+    label curr1    "PMIC-1 13V5 VDD_M Rail Curr (in1)"
+    label curr2    "PMIC-1 VDD_M Rail Curr (out1)"
+    ignore curr3
+    ignore curr4
+    ignore curr5
+    ignore curr6
+    ignore curr7
+    ignore curr8
+    ignore curr9
+    ignore curr10
+
+chip "mp2891-i2c-*-63"
+    label in1      "PMIC-2 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-2 VDD_T0 ADJ Rail (out1)"
+    label in3      "PMIC-2 VDD_T1 ADJ Rail (out2)"
+    label temp1    "PMIC-2 VDD_T0 ADJ Temp 1"
+    label temp2    "PMIC-2 VDD_T1 ADJ Temp 2"
+    label power1   "PMIC-2 13V5 VDD_T0 VDD_T1 (in)"
+    label power2   "PMIC-2 VDD_T0 Rail Pwr (out1)"
+    label power3   "PMIC-2 VDD_T1 Rail Pwr (out2)"
+    label curr1    "PMIC-2 13V5 VDD_T0 VDD_T1 Rail Curr (in1)"
+    label curr2    "PMIC-2 VDD_T0 Rail Curr (out1)"
+    label curr3    "PMIC-2 VDD_T1 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+chip "xdpe1a2g7-i2c-*-63"
+    label in1      "PMIC-2 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-2 VDD_T0 ADJ Rail (out1)"
+    label in3      "PMIC-2 VDD_T1 ADJ Rail (out2)"
+    label temp1    "PMIC-2 VDD_T0 ADJ Temp 1"
+    label temp2    "PMIC-2 VDD_T1 ADJ Temp 2"
+    label power1   "PMIC-2 13V5 VDD_T0 VDD_T1 (in)"
+    label power2   "PMIC-2 VDD_T0 Rail Pwr (out1)"
+    label power3   "PMIC-2 VDD_T1 Rail Pwr (out2)"
+    label curr1    "PMIC-2 13V5 VDD_T0 VDD_T1 Rail Curr (in1)"
+    label curr2    "PMIC-2 VDD_T0 Rail Curr (out1)"
+    label curr3    "PMIC-2 VDD_T1 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+
+chip "mp2891-i2c-*-64"
+    label in1      "PMIC-3 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-3 VDD_T2 ADJ Rail (out1)"
+    label in3      "PMIC-3 VDD_T3 ADJ Rail (out2)"
+    label temp1    "PMIC-3 VDD_T2 ADJ Temp 1"
+    label temp2    "PMIC-3 VDD_T3 ADJ Temp 2"
+    label power1   "PMIC-3 13V5 VDD_T2 VDD_T3 (in)"
+    label power2   "PMIC-3 VDD_T2 Rail Pwr (out1)"
+    label power3   "PMIC-3 VDD_T3 Rail Pwr (out2)"
+    label curr1    "PMIC-3 13V5 VDD_T2 VDD_T3 Rail Curr (in1)"
+    label curr2    "PMIC-3 VDD_T2 Rail Curr (out1)"
+    label curr3    "PMIC-3 VDD_T3 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+chip "xdpe1a2g7-i2c-*-64"
+    label in1      "PMIC-3 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-3 VDD_T2 ADJ Rail (out1)"
+    label in3      "PMIC-3 VDD_T3 ADJ Rail (out2)"
+    label temp1    "PMIC-3 VDD_T2 ADJ Temp 1"
+    label temp2    "PMIC-3 VDD_T3 ADJ Temp 2"
+    label power1   "PMIC-3 13V5 VDD_T2 VDD_T3 (in)"
+    label power2   "PMIC-3 VDD_T2 Rail Pwr (out1)"
+    label power3   "PMIC-3 VDD_T3 Rail Pwr (out2)"
+    label curr1    "PMIC-3 13V5 VDD_T2 VDD_T3 Rail Curr (in1)"
+    label curr2    "PMIC-3 VDD_T2 Rail Curr (out1)"
+    label curr3    "PMIC-3 VDD_T3 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+
+chip "mp2891-i2c-*-65"
+    label in1      "PMIC-4 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-4 VDD_T4 ADJ Rail (out1)"
+    label in3      "PMIC-4 VDD_T5 ADJ Rail (out2)"
+    label temp1    "PMIC-4 VDD_T4 ADJ Temp 1"
+    label temp2    "PMIC-4 VDD_T5 ADJ Temp 2"
+    label power1   "PMIC-4 13V5 VDD_T4 VDD_T5 (in)"
+    label power2   "PMIC-4 VDD_T4 Rail Pwr (out1)"
+    label power3   "PMIC-4 VDD_T5 Rail Pwr (out2)"
+    label curr1    "PMIC-4 13V5 VDD_T4 VDD_T5 Rail Curr (in1)"
+    label curr2    "PMIC-4 VDD_T4 Rail Curr (out1)"
+    label curr3    "PMIC-4 VDD_T5 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+chip "xdpe1a2g7-i2c-*-65"
+    label in1      "PMIC-4 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-4 VDD_T4 ADJ Rail (out1)"
+    label in3      "PMIC-4 VDD_T5 ADJ Rail (out2)"
+    label temp1    "PMIC-4 VDD_T4 ADJ Temp 1"
+    label temp2    "PMIC-4 VDD_T5 ADJ Temp 2"
+    label power1   "PMIC-4 13V5 VDD_T4 VDD_T5 (in)"
+    label power2   "PMIC-4 VDD_T4 Rail Pwr (out1)"
+    label power3   "PMIC-4 VDD_T5 Rail Pwr (out2)"
+    label curr1    "PMIC-4 13V5 VDD_T4 VDD_T5 Rail Curr (in1)"
+    label curr2    "PMIC-4 VDD_T4 Rail Curr (out1)"
+    label curr3    "PMIC-4 VDD_T5 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+
+chip "mp2891-i2c-*-66"
+    label in1      "PMIC-5 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-5 VDD_T6 ADJ Rail (out1)"
+    label in3      "PMIC-5 VDD_T7 ADJ Rail (out2)"
+    label temp1    "PMIC-5 VDD_T6 ADJ Temp 1"
+    label temp2    "PMIC-5 VDD_T7 ADJ Temp 2"
+    label power1   "PMIC-5 13V5 VDD_T6 VDD_T7 (in)"
+    label power2   "PMIC-5 VDD_T6 Rail Pwr (out1)"
+    label power3   "PMIC-5 VDD_T7 Rail Pwr (out2)"
+    label curr1    "PMIC-5 13V5 VDD_T6 VDD_T7 Rail Curr (in1)"
+    label curr2    "PMIC-5 VDD_T6 Rail Curr (out1)"
+    label curr3    "PMIC-5 VDD_T7 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+chip "xdpe1a2g7-i2c-*-66"
+    label in1      "PMIC-5 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-5 VDD_T6 ADJ Rail (out1)"
+    label in3      "PMIC-5 VDD_T7 ADJ Rail (out2)"
+    label temp1    "PMIC-5 VDD_T6 ADJ Temp 1"
+    label temp2    "PMIC-5 VDD_T7 ADJ Temp 2"
+    label power1   "PMIC-5 13V5 VDD_T6 VDD_T7 (in)"
+    label power2   "PMIC-5 VDD_T6 Rail Pwr (out1)"
+    label power3   "PMIC-5 VDD_T7 Rail Pwr (out2)"
+    label curr1    "PMIC-5 13V5 VDD_T6 VDD_T7 Rail Curr (in1)"
+    label curr2    "PMIC-5 VDD_T6 Rail Curr (out1)"
+    label curr3    "PMIC-5 VDD_T7 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+
+chip "mp2891-i2c-*-67"
+    label in1      "PMIC-6 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-6 DVDD_T0 ADJ Rail (out1)"
+    label in3      "PMIC-6 DVDD_T1 ADJ Rail (out2)"
+    label temp1    "PMIC-6 DVDD_T0 ADJ Temp 1"
+    label temp2    "PMIC-6 DVDD_T1 ADJ Temp 2"
+    label power1   "PMIC-6 13V5 DVDD_T0 DVDD_T1 (in)"
+    label power2   "PMIC-6 DVDD_T0 Rail Pwr (out1)"
+    label power3   "PMIC-6 DVDD_T1 Rail Pwr (out2)"
+    label curr1    "PMIC-6 13V5 DVDD_T0 DVDD_T1 Rail Curr (in1)"
+    label curr2    "PMIC-6 DVDD_T0 Rail Curr (out1)"
+    label curr3    "PMIC-6 DVDD_T1 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+chip "xdpe1a2g7-i2c-*-67"
+    label in1      "PMIC-6 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-6 DVDD_T0 ADJ Rail (out1)"
+    label in3      "PMIC-6 DVDD_T1 ADJ Rail (out2)"
+    label temp1    "PMIC-6 DVDD_T0 ADJ Temp 1"
+    label temp2    "PMIC-6 DVDD_T1 ADJ Temp 2"
+    label power1   "PMIC-6 13V5 DVDD_T0 DVDD_T1 (in)"
+    label power2   "PMIC-6 DVDD_T0 Rail Pwr (out1)"
+    label power3   "PMIC-6 DVDD_T1 Rail Pwr (out2)"
+    label curr1    "PMIC-6 13V5 DVDD_T0 DVDD_T1 Rail Curr (in1)"
+    label curr2    "PMIC-6 DVDD_T0 Rail Curr (out1)"
+    label curr3    "PMIC-6 DVDD_T1 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+
+chip "mp2891-i2c-*-68"
+    label in1      "PMIC-7 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-7 DVDD_T2 ADJ Rail (out1)"
+    label in3      "PMIC-7 DVDD_T3 ADJ Rail (out2)"
+    label temp1    "PMIC-7 DVDD_T2 ADJ Temp 1"
+    label temp2    "PMIC-7 DVDD_T3 ADJ Temp 2"
+    label power1   "PMIC-7 13V5 DVDD_T2 DVDD_T3 (in)"
+    label power2   "PMIC-7 DVDD_T2 Rail Pwr (out1)"
+    label power3   "PMIC-7 DVDD_T3 Rail Pwr (out2)"
+    label curr1    "PMIC-7 13V5 DVDD_T2 DVDD_T3 Rail Curr (in1)"
+    label curr2    "PMIC-7 DVDD_T2 Rail Curr (out1)"
+    label curr3    "PMIC-7 DVDD_T3 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+chip "xdpe1a2g7-i2c-*-68"
+    label in1      "PMIC-7 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-7 DVDD_T2 ADJ Rail (out1)"
+    label in3      "PMIC-7 DVDD_T3 ADJ Rail (out2)"
+    label temp1    "PMIC-7 DVDD_T2 ADJ Temp 1"
+    label temp2    "PMIC-7 DVDD_T3 ADJ Temp 2"
+    label power1   "PMIC-7 13V5 DVDD_T2 DVDD_T3 (in)"
+    label power2   "PMIC-7 DVDD_T2 Rail Pwr (out1)"
+    label power3   "PMIC-7 DVDD_T3 Rail Pwr (out2)"
+    label curr1    "PMIC-7 13V5 DVDD_T2 DVDD_T3 Rail Curr (in1)"
+    label curr2    "PMIC-7 DVDD_T2 Rail Curr (out1)"
+    label curr3    "PMIC-7 DVDD_T3 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+
+chip "mp2891-i2c-*-69"
+    label in1      "PMIC-8 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-8 DVDD_T4 ADJ Rail (out1)"
+    label in3      "PMIC-8 DVDD_T5 ADJ Rail (out2)"
+    label temp1    "PMIC-8 DVDD_T4 ADJ Temp 1"
+    label temp2    "PMIC-8 DVDD_T5 ADJ Temp 2"
+    label power1   "PMIC-8 13V5 DVDD_T4 DVDD_T5 (in)"
+    label power2   "PMIC-8 DVDD_T4 Rail Pwr (out1)"
+    label power3   "PMIC-8 DVDD_T5 Rail Pwr (out2)"
+    label curr1    "PMIC-8 13V5 DVDD_T4 DVDD_T5 Rail Curr (in1)"
+    label curr2    "PMIC-8 DVDD_T4 Rail Curr (out1)"
+    label curr3    "PMIC-8 DVDD_T5 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+chip "xdpe1a2g7-i2c-*-69"
+    label in1      "PMIC-8 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-8 DVDD_T4 ADJ Rail (out1)"
+    label in3      "PMIC-8 DVDD_T5 ADJ Rail (out2)"
+    label temp1    "PMIC-8 DVDD_T4 ADJ Temp 1"
+    label temp2    "PMIC-8 DVDD_T5 ADJ Temp 2"
+    label power1   "PMIC-8 13V5 DVDD_T4 DVDD_T5 (in)"
+    label power2   "PMIC-8 DVDD_T4 Rail Pwr (out1)"
+    label power3   "PMIC-8 DVDD_T5 Rail Pwr (out2)"
+    label curr1    "PMIC-8 13V5 DVDD_T4 DVDD_T5 Rail Curr (in1)"
+    label curr2    "PMIC-8 DVDD_T4 Rail Curr (out1)"
+    label curr3    "PMIC-8 DVDD_T5 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+
+chip "mp2891-i2c-*-6a"
+    label in1      "PMIC-9 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-9 DVDD_T6 ADJ Rail (out1)"
+    label in3      "PMIC-9 DVDD_T7 ADJ Rail (out2)"
+    label temp1    "PMIC-9 DVDD_T6 ADJ Temp 1"
+    label temp2    "PMIC-9 DVDD_T7 ADJ Temp 2"
+    label power1   "PMIC-9 13V5 DVDD_T6 DVDD_T7 (in)"
+    label power2   "PMIC-9 DVDD_T6 Rail Pwr (out1)"
+    label power3   "PMIC-9 DVDD_T7 Rail Pwr (out2)"
+    label curr1    "PMIC-9 13V5 DVDD_T6 DVDD_T7 Rail Curr (in1)"
+    label curr2    "PMIC-9 DVDD_T6 Rail Curr (out1)"
+    label curr3    "PMIC-9 DVDD_T7 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+chip "xdpe1a2g7-i2c-*-6a"
+    label in1      "PMIC-9 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-9 DVDD_T6 ADJ Rail (out1)"
+    label in3      "PMIC-9 DVDD_T7 ADJ Rail (out2)"
+    label temp1    "PMIC-9 DVDD_T6 ADJ Temp 1"
+    label temp2    "PMIC-9 DVDD_T7 ADJ Temp 2"
+    label power1   "PMIC-9 13V5 DVDD_T6 DVDD_T7 (in)"
+    label power2   "PMIC-9 DVDD_T6 Rail Pwr (out1)"
+    label power3   "PMIC-9 DVDD_T7 Rail Pwr (out2)"
+    label curr1    "PMIC-9 13V5 DVDD_T6 DVDD_T7 Rail Curr (in1)"
+    label curr2    "PMIC-9 DVDD_T6 Rail Curr (out1)"
+    label curr3    "PMIC-9 DVDD_T7 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+
+chip "mp2891-i2c-*-6c"
+    label in1      "PMIC-10 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-10 HVDD_T03 1V2 Rail (out1)"
+    label in3      "PMIC-10 HVDD_T47 1V2 Rail (out2)"
+    label temp1    "PMIC-10 HVDD_T03 1V2 Temp 1"
+    label temp2    "PMIC-10 HVDD_T47 1V2 Temp 2"
+    label power1   "PMIC-10 13V5 HVDD_T03 HVDD_T47 (in)"
+    label power2   "PMIC-10 HVDD_T03 Rail Pwr (out1)"
+    label power3   "PMIC-10 HVDD_T47 Rail Pwr (out2)"
+    label curr1    "PMIC-10 13V5 HVDD_T03 HVDD_T47 Rail Curr (in1)"
+    label curr2    "PMIC-10 HVDD_T03 Rail Curr (out1)"
+    label curr3    "PMIC-10 HVDD_T47 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+    ignore curr7
+    ignore curr8
+    ignore curr9
+    ignore curr10
+    ignore curr11
+chip "xdpe1a2g7-i2c-*-6c"
+    label in1      "PMIC-10 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-10 HVDD_T03 1V2 Rail (out1)"
+    label in3      "PMIC-10 HVDD_T47 1V2 Rail (out2)"
+    label temp1    "PMIC-10 HVDD_T03 1V2 Temp 1"
+    label temp2    "PMIC-10 HVDD_T47 1V2 Temp 2"
+    label power1   "PMIC-10 13V5 HVDD_T03 HVDD_T47 (in)"
+    label power2   "PMIC-10 HVDD_T03 Rail Pwr (out1)"
+    label power3   "PMIC-10 HVDD_T47 Rail Pwr (out2)"
+    label curr1    "PMIC-10 13V5 HVDD_T03 HVDD_T47 Rail Curr (in1)"
+    label curr2    "PMIC-10 HVDD_T03 Rail Curr (out1)"
+    label curr3    "PMIC-10 HVDD_T47 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+    ignore curr7
+    ignore curr8
+    ignore curr9
+    ignore curr10
+    ignore curr11
+    
+chip "mp2891-i2c-*-6e"
+    label in1      "PMIC-11 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-11 VDDSCC 0V75 Rail (out1)"
+    label in3      "PMIC-11 DVDD_M ADJ Rail (out2)"
+    label temp1    "PMIC-11 VDDSCC 1V2 Temp 1"
+    label temp2    "PMIC-11 DVDD_M 0V75 Temp 2"
+    label power1   "PMIC-11 13V5 VDDSCC DVDD_M (in)"
+    label power2   "PMIC-11 VDDSCC Rail Pwr (out1)"
+    label power3   "PMIC-11 DVDD_M Rail Pwr (out2)"
+    label curr1    "PMIC-11 13V5 VDDSCC DVDD_M Rail Curr (in1)"
+    label curr2    "PMIC-11 VDDSCC Rail Curr (out1)"
+    label curr3    "PMIC-11 DVDD_M Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+chip "xdpe1a2g7-i2c-*-6e"
+    label in1      "PMIC-11 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-11 VDDSCC 0V75 Rail (out1)"
+    label in3      "PMIC-11 DVDD_M ADJ Rail (out2)"
+    label temp1    "PMIC-11 VDDSCC 1V2 Temp 1"
+    label temp2    "PMIC-11 DVDD_M 0V75 Temp 2"
+    label power1   "PMIC-11 13V5 VDDSCC DVDD_M (in)"
+    label power2   "PMIC-11 VDDSCC Rail Pwr (out1)"
+    label power3   "PMIC-11 DVDD_M Rail Pwr (out2)"
+    label curr1    "PMIC-11 13V5 VDDSCC DVDD_M Rail Curr (in1)"
+    label curr2    "PMIC-11 VDDSCC Rail Curr (out1)"
+    label curr3    "PMIC-11 DVDD_M Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+
+# Power supplies
+chip "dps460-i2c-*-59"
+    label in1 "PSU-1(L) 220V Rail (in)"
+    ignore in2
+    label in3 "PSU-1(L) 54V Rail (out)"
+    ignore fan2
+    ignore fan3
+    label fan1 "PSU-1(L) Fan 1"
+    label temp1 "PSU-1(L) Temp 1"
+    label temp2 "PSU-1(L) Temp 2"
+    label temp3 "PSU-1(L) Temp 3"
+    label power1 "PSU-1(L) 220V Rail Pwr (in)"
+    label power2 "PSU-1(L) 54V Rail Pwr (out)"
+    label curr1 "PSU-1(L) 220V Rail Curr (in)"
+    label curr2 "PSU-1(L) 54V Rail Curr (out)"
+    set power2_cap 0
+chip "dps460-i2c-*-58"
+    label in1 "PSU-2(R) 220V Rail (in)"
+    ignore in2
+    label in3 "PSU-2(R) 54V Rail (out)"
+    ignore fan2
+    ignore fan3
+    label fan1 "PSU-2(R) Fan 1"
+    label temp1 "PSU-2(R) Temp 1"
+    label temp2 "PSU-2(R) Temp 2"
+    label temp3 "PSU-2(R) Temp 3"
+    label power1 "PSU-2(R) 220V Rail Pwr (in)"
+    label power2 "PSU-2(R) 54V Rail Pwr (out)"
+    label curr1 "PSU-2(R) 220V Rail Curr (in)"
+    label curr2 "PSU-2(R) 54V Rail Curr (out)"
+    set power2_cap 0
+chip "dps460-i2c-*-5b"
+    label in1 "PSU-3(R) 220V Rail (in)"
+    ignore in2
+    label in3 "PSU-3(R) 54V Rail (out)"
+    ignore fan2
+    ignore fan3
+    label fan1 "PSU-3(R) Fan 1"
+    label temp1 "PSU-3(R) Temp 1"
+    label temp2 "PSU-3(R) Temp 2"
+    label temp3 "PSU-3(R) Temp 3"
+    label power1 "PSU-3(R) 220V Rail Pwr (in)"
+    label power2 "PSU-3(R) 54V Rail Pwr (out)"
+    label curr1 "PSU-3(R) 220V Rail Curr (in)"
+    label curr2 "PSU-3(R) 54V Rail Curr (out)"
+    set power2_cap 0
+chip "dps460-i2c-*-5a"
+    label in1 "PSU-4(R) 220V Rail (in)"
+    ignore in2
+    label in3 "PSU-4(R) 54V Rail (out)"
+    ignore fan2
+    ignore fan3
+    label fan1 "PSU-4(R) Fan 1"
+    label temp1 "PSU-4(R) Temp 1"
+    label temp2 "PSU-4(R) Temp 2"
+    label temp3 "PSU-4(R) Temp 3"
+    label power1 "PSU-4(R) 220V Rail Pwr (in)"
+    label power2 "PSU-4(R) 54V Rail Pwr (out)"
+    label curr1 "PSU-4(R) 220V Rail Curr (in)"
+    label curr2 "PSU-4(R) 54V Rail Curr (out)"
+    set power2_cap 0
+
+# AMD Comex
+bus "i2c-68" "i2c-9-mux (chan_id 6)"
+        chip "mp2855-i2c-*-69"
+            label in1 "PMIC-12 COMEX (in) VDDCR INPUT VOLT"
+            label in2 "PMIC-12 COMEX (out) VDDCR_CPU VOLT"
+            label in3 "PMIC-12 COMEX (out2) VDDCR_SOC VOLT"
+            label temp1 "PMIC-12 COMEX VDDCR_CPU PHASE TEMP"
+            label temp2 "PMIC-12 COMEX VDDCR_SOC PHASE TEMP"
+            label curr1 "PMIC-12 COMEX VDDCR_CPU CURR"
+            label curr2 "PMIC-12 COMEX VDDCR_SOC CURR"
+
+bus "i2c-69" "i2c-9-mux (chan_id 6)"
+        chip "mp2975-i2c-*-6a"
+            label in1 "PMIC-13 COMEX VDD_MEM INPUT VOLT"
+            label in2 "PMIC-13 COMEX VDD_MEM OUTPUT VOLT"
+            label temp1 "PMIC-13 COMEX VDD_MEM PHASE TEMP"
+            label curr1 "PMIC-13 COMEX VDD_MEM INPUT CURR"
+            label curr2 "PMIC-13 COMEX VDD_MEM OUTPUT CURR"
+            ignore curr3
+            ignore curr4
+            label power1 "PMIC-13 COMEX VDD_MEM INPUT POWER"
+            label power2 "PMIC-13 COMEX VDD_MEM OUTPUT POWER"
+
+#bus "i2c-0" "Synopsys DesignWare I2C adapter"
+chip "jc42-i2c-*-1a"
+    label temp1 "SODIMM1 Temp"
+
+chip "jc42-i2c-*-1b"
+    label temp1 "SODIMM2 Temp"
+
+chip "jc42-i2c-*-1e"
+    label temp1 "SODIMM3 Temp"
+
+chip "jc42-i2c-*-1f"
+    label temp1 "SODIMM4 Temp"
+
+chip "k10temp-pci-*"
+    label temp1 "CPU PACKAGE TEMP"
+    label temp2 "CPU DIE0 TEMP"
+
+chip "nvme-pci-*"
+    label temp1 "SSD Temp"
+    ignore temp2
+    ignore temp3
+
+chip "00000500400-mdio-5"
+   label temp1 "PHY TEMP"

From 9e64ebe9d0a6777ce6898f75235e19286568524d Mon Sep 17 00:00:00 2001
From: Kebo Liu <kebol@nvidia.com>
Date: Wed, 4 Dec 2024 00:55:50 +0800
Subject: [PATCH 305/364] [Mellanox] [SFP API] Add support to the
 get_error_description function for when CMIS cable host management is
 enabled. (#20964)

- Why I did it
get_error_description is not supported when CMIS cable host mgmt. enabled, now enable this function and use the community common implementation.

- How I did it
When CMIS cable host mgmt. enabled, call the common platform API. Keep using original implementation in FW control mode.

- How to verify it
Test this API on different platforms in different modes.
Run SFP related sonic-mgmt test cases

Signed-off-by: Kebo Liu <kebol@nvidia.com>
---
 platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py | 6 ++++--
 platform/mellanox/mlnx-platform-api/tests/test_sfp.py     | 6 ++++--
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index aa3e188ae5f7..0e76f947b839 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -1,5 +1,6 @@
 #
-# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -675,7 +676,8 @@ def get_error_description(self):
         """
         try:
             if self.is_sw_control():
-                return 'Not supported'
+                api = self.get_xcvr_api()
+                return api.get_error_description() if api else None
         except:
             return self.SFP_STATUS_INITIALIZING
 
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
index 092179f03fff..fecfadc1d93c 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
@@ -1,5 +1,6 @@
 #
-# Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -59,6 +60,7 @@ def test_sfp_index(self, mock_max_port):
     @mock.patch('sonic_platform.sfp.SFP._get_module_info')
     @mock.patch('sonic_platform.chassis.Chassis.get_num_sfps', mock.MagicMock(return_value=2))
     @mock.patch('sonic_platform.chassis.extract_RJ45_ports_index', mock.MagicMock(return_value=[]))
+    @mock.patch('sonic_platform.sfp.SFP.get_xcvr_api', mock.MagicMock(return_value=None))
     def test_sfp_get_error_status(self, mock_get_error_code, mock_control):
         sfp = SFP(1)
         mock_control.return_value = False
@@ -87,7 +89,7 @@ def test_sfp_get_error_status(self, mock_get_error_code, mock_control):
 
         mock_control.return_value = True
         description = sfp.get_error_description()
-        assert description == 'Not supported'
+        assert description == None
 
         mock_control.side_effect = RuntimeError('')
         description = sfp.get_error_description()

From e108423c4673fe588e909d546171a23ad1278c49 Mon Sep 17 00:00:00 2001
From: Arham-Nasir <100487254+Arham-Nasir@users.noreply.github.com>
Date: Wed, 4 Dec 2024 00:17:38 +0500
Subject: [PATCH 306/364] Add YANG Model and Configuration Support for Memory
 Statistics (#20354)

This PR introduces a new YANG model for configuring memory statistics in SONiC, along with necessary updates to the configuration database and test cases. The following changes have been made:

YANG Model:

Created a new YANG module sonic-memory-statistics.yang for managing memory statistics configuration parameters, including:
enabled: Boolean flag to enable or disable memory statistics collection.
sampling_interval: Configurable time interval for sampling memory statistics.
retention_period: Configurable retention period for memory statistics data.
Configuration Database:

Updated sample_config_db.json to include default values for the memory statistics configuration, ensuring seamless integration with the existing configuration management.
Test Cases:

Added comprehensive test cases in memory_statistics.json to validate the configuration parameters, including valid configurations and error scenarios for invalid sampling intervals and retention periods.
These changes aim to enhance the monitoring capabilities of SONiC by providing a structured way to configure memory statistics, thereby improving overall system performance and resource management.
---
 src/sonic-yang-models/doc/Configuration.md    | 20 ++++++++
 src/sonic-yang-models/setup.py                |  2 +
 .../tests/files/sample_config_db.json         |  7 +++
 .../tests/memory_statistics.json              | 18 +++++++
 .../tests_config/memory_statistics.json       | 47 +++++++++++++++++++
 .../yang-models/sonic-memory-statistics.yang  | 47 +++++++++++++++++++
 6 files changed, 141 insertions(+)
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests/memory_statistics.json
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests_config/memory_statistics.json
 create mode 100644 src/sonic-yang-models/yang-models/sonic-memory-statistics.yang

diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index 1f45b32a3e83..60a4222721f0 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -50,6 +50,7 @@ Table of Contents
          * [L2 Neighbors](#l2-neighbors)
          * [Loopback Interface](#loopback-interface)
          * [LOSSLESS_TRAFFIC_PATTERN](#LOSSLESS_TRAFFIC_PATTERN)
+         * [Memory Statistics](#memory-statistics)
          * [Management Interface](#management-interface)
          * [Management port](#management-port)
          * [Management VRF](#management-vrf)
@@ -1482,6 +1483,25 @@ lossless traffic for dynamic buffer calculation
 }
 ```
 
+### Memory Statistics
+The memory statistics configuration is stored in the **MEMORY_STATISTICS** table. This table is used by the memory statistics daemon to manage memory monitoring settings. The configuration allows enabling or disabling memory collection, specifying how frequently memory statistics are sampled, and defining how long the memory data is retained. 
+
+```
+{
+    "MEMORY_STATISTICS": {
+        "memory_statistics": {
+            "enabled": "false",
+            "sampling_interval": "5",
+            "retention_period":  "15"
+        }
+    }
+}
+
+```
+- **enabled**: Defines whether the memory statistics collection is active (true or false).
+- **sampling_interval**: Interval between data collection.
+- **retention_period**: Time to retain collected data.
+
 ### Management Interface
 
 Management interfaces are defined in **MGMT_INTERFACE** table. Object
diff --git a/src/sonic-yang-models/setup.py b/src/sonic-yang-models/setup.py
index 04b652208ec7..60dba6c410aa 100644
--- a/src/sonic-yang-models/setup.py
+++ b/src/sonic-yang-models/setup.py
@@ -137,6 +137,7 @@ def run(self):
                          './yang-models/sonic-kubernetes_master.yang',
                          './yang-models/sonic-loopback-interface.yang',
                          './yang-models/sonic-lossless-traffic-pattern.yang',
+                         './yang-models/sonic-memory-statistics.yang',
                          './yang-models/sonic-mgmt_interface.yang',
                          './yang-models/sonic-mgmt_port.yang',
                          './yang-models/sonic-mgmt_vrf.yang',
@@ -242,6 +243,7 @@ def run(self):
                          './cvlyang-models/sonic-kubernetes_master.yang',
                          './cvlyang-models/sonic-loopback-interface.yang',
                          './cvlyang-models/sonic-mgmt_interface.yang',
+                         './cvlyang-models/sonic-memory-statistics.yang',
                          './cvlyang-models/sonic-mgmt_port.yang',
                          './cvlyang-models/sonic-mgmt_vrf.yang',
                          './cvlyang-models/sonic-ntp.yang',
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 5d22bc3f81cc..4c76237ddb46 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -2782,6 +2782,13 @@
                 "motd": "Some message of the day",
                 "logout": "Some logout message"
             }
+        },
+        "MEMORY_STATISTICS": {
+            "memory_statistics": {
+                "enabled": "false",
+                "sampling_interval": "5",
+                "retention_period": "15"
+            }
         }
     },
     "SAMPLE_CONFIG_DB_UNKNOWN": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/memory_statistics.json b/src/sonic-yang-models/tests/yang_model_tests/tests/memory_statistics.json
new file mode 100644
index 000000000000..e466e9cf92c6
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/memory_statistics.json
@@ -0,0 +1,18 @@
+{
+    "MEMORY_STATISTICS_VALID_CONFIG": {
+        "desc": "Configuring memory statistics with valid values."
+    },
+    "MEMORY_STATISTICS_WITH_INVALID_SAMPLING_INTERVAL": {
+        "desc": "Configuring memory statistics with an invalid sampling_interval ( out of acceptable range).",
+        "eStrKey": "Range",
+        "eStr": "3..15"
+    },
+    "MEMORY_STATISTICS_WITH_INVALID_RETENTION_PERIOD": {
+        "desc": "Configuring memory statistics with an invalid retention_period (out of acceptable range).",
+        "eStrKey": "Range",
+        "eStr": "1..30"
+    },
+    "MEMORY_STATISTICS_WITH_ENABLE_FEATURE": {
+        "desc": "Enabling memory statistics feature with valid values."
+    }
+}
\ No newline at end of file
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/memory_statistics.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/memory_statistics.json
new file mode 100644
index 000000000000..22529187c958
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/memory_statistics.json
@@ -0,0 +1,47 @@
+{
+    "MEMORY_STATISTICS_VALID_CONFIG": {
+        "sonic-memory-statistics:sonic-memory-statistics": {          
+            "sonic-memory-statistics:MEMORY_STATISTICS": {
+                "memory_statistics":{
+                    "enabled": "false",
+                    "sampling_interval": "5",
+                    "retention_period": "15"
+                }
+            }
+        }
+    },
+    "MEMORY_STATISTICS_WITH_INVALID_SAMPLING_INTERVAL": {
+        "sonic-memory-statistics:sonic-memory-statistics": {
+            "sonic-memory-statistics:MEMORY_STATISTICS": {
+                "memory_statistics":{
+                    "enabled": "true",
+                    "sampling_interval": "45",
+                    "retention_period": "20"
+                }    
+            }
+        }
+    },
+    "MEMORY_STATISTICS_WITH_INVALID_RETENTION_PERIOD": {
+        "sonic-memory-statistics:sonic-memory-statistics": {
+            "sonic-memory-statistics:MEMORY_STATISTICS": {
+                "memory_statistics":{
+                    "enabled": "true",
+                    "sampling_interval": "5",
+                    "retention_period": "45"
+                }    
+            }
+        }
+    },
+    "MEMORY_STATISTICS_WITH_ENABLE_FEATURE": {
+        "sonic-memory-statistics:sonic-memory-statistics": {
+            "sonic-memory-statistics:MEMORY_STATISTICS": {
+                "memory_statistics":{
+                    "enabled": "true",
+                    "sampling_interval": "5",
+                    "retention_period": "30"
+                }    
+           }
+        }
+    }   
+
+}
\ No newline at end of file
diff --git a/src/sonic-yang-models/yang-models/sonic-memory-statistics.yang b/src/sonic-yang-models/yang-models/sonic-memory-statistics.yang
new file mode 100644
index 000000000000..f69344db53b5
--- /dev/null
+++ b/src/sonic-yang-models/yang-models/sonic-memory-statistics.yang
@@ -0,0 +1,47 @@
+module sonic-memory-statistics {
+    yang-version 1.1;
+
+    namespace "http://github.com/sonic-net/sonic-memory-statistics";
+    prefix memstats;
+
+    import sonic-types {
+        prefix stypes;
+    }
+
+    description "YANG module for configuring memory statistics in SONiC-based OS.";
+
+    revision 2024-07-22 {
+        description "First Revision";
+    }
+
+    container sonic-memory-statistics {
+        container MEMORY_STATISTICS {
+            description "Memory statistics configuration parameters.";
+            container memory_statistics{
+                leaf enabled {
+                    type boolean;
+                    default false;
+                    description "Flag to enable or disable memory statistics collection. If set to false, the memory statistics collection will stop.";
+                }
+
+                leaf sampling_interval {
+                    type uint8 {
+                        range "3..15";
+                    }
+                    units "minutes";
+                    default 5;
+                    description "Time interval in minutes for sampling memory statistics. Valid range, is between 3 minutes to 30 minutes.";
+                }
+
+                leaf retention_period {
+                    type uint8 {
+                        range "1..30";
+                    }
+                    units "days";
+                    default 15;
+                    description "Retention period for memory statistics data, defined in days. Valid range is from 1 day to 30 days.";
+                }
+            }    
+        }
+    }
+}
\ No newline at end of file

From f9e186ca27042da705850a2f76788661411366f6 Mon Sep 17 00:00:00 2001
From: sudhanshukumar22 <51457531+sudhanshukumar22@users.noreply.github.com>
Date: Wed, 4 Dec 2024 05:47:07 +0530
Subject: [PATCH 307/364] [FRR]: upgrade FRR to version 10.0.1, upgrade
 libyang2 to 2.1.148. (#20269)

FRR upgrade in community from 8.5.4 to 10.0.1. Upgraded libyang to 2.1.148.
Tested using BGP docker, BGP neighborship with route learning worked fine.
---
 .gitmodules                                   |    2 +-
 .../frr/supervisord/supervisord.conf.j2       |   11 +
 platform/vs/docker-sonic-vs/Dockerfile.j2     |    4 +-
 .../vs/docker-sonic-vs/supervisord.conf.j2    |    8 +
 rules/frr.mk                                  |    6 +-
 rules/libyang2.mk                             |   10 +-
 sonic-slave-bookworm/Dockerfile.j2            |    2 +
 sonic-slave-bullseye/Dockerfile.j2            |    2 +
 sonic-slave-buster/Dockerfile.j2              |    2 +
 src/libyang2/Makefile                         |    6 +-
 src/sonic-frr/Makefile                        |    1 +
 .../dplane_fpm_sonic/dplane_fpm_sonic.c       |  264 +-
 src/sonic-frr/frr                             |    2 +-
 ...008-Use-vrf_id-for-vrf-not-tabled_id.patch |   33 +-
 ...ress-fib-pending-works-with-network-.patch |  132 -
 ...og-level-for-graceful-restart-events.patch |   91 +-
 ...tes-async-notification-do-not-need-t.patch |   99 -
 ..._lookup_by_tableid-to-zebra_vrf_look.patch |  147 --
 ...ove-protodown_r_bit-to-a-better-spot.patch |  181 --
 ...bra-Remove-unused-dplane_intf_delete.patch |   48 -
 ...015-zebra-Remove-unused-add-variable.patch |   53 -
 ...licate-function-for-netlink-interfac.patch |  301 ---
 ...o-get-set-interface-to-pass-up-from-.patch |  809 -------
 ...e-zebra-dplane-for-RTM-link-and-addr.patch | 2154 -----------------
 ...icated-nexthops-when-sending-fpm-msg.patch |   30 -
 ...non-notification-of-better-admin-won.patch |   76 -
 ...lane_fpm_nl-return-path-leaks-memory.patch |   58 -
 ...-use-snmp-s-large-fd-sets-for-agentx.patch |  143 --
 .../0025-bgp-community-memory-leak-fix.patch  |  370 +--
 .../0026-bgp-fib-suppress-announce-fix.patch  |  122 -
 ...rt-EVPN-prefixes-into-IPv4-IPv6-if-n.patch |   77 -
 .../patch/0029-zebra-nhg-fix-on-intf-up.patch |  338 ---
 ...re-Zebra-push-back-on-Buffer-Stream-.patch |   45 +-
 ...e-Add-a-typesafe-list-for-Zebra-Anno.patch |   83 +-
 ...g-ipv6-flowspec-entries-when-peering.patch |  158 --
 ...ssure-cleanup-bgp_zebra_XX-func-args.patch |   83 +-
 ...e-Handle-BGP-Zebra-Install-evt-Creat.patch |  175 +-
 ...e-Handle-BGP-Zebra-EPVN-Install-evt-.patch | 1816 +++++++++++---
 ...stall-uninstall-speed-of-evpn-vpn-vn.patch |   41 +-
 ...e-Fix-to-withdraw-evpn-type-5-routes.patch |   26 +-
 ...-Use-built-in-data-structure-counter.patch |   60 +-
 ...w-zebra-dplane-providers-to-give-mor.patch |   40 +-
 ...e-fix-to-properly-remove-dest-for-bg.patch |   22 +-
 ...pd-backpressure-Avoid-use-after-free.patch |   16 +-
 ...for-outgoing-connections-on-listener.patch |   14 -
 ... 0054-build-dplane-fpm-sonic-module.patch} |   34 +-
 ...-SID-structure-in-seg6local-nexthop.patch} |  142 +-
 ...ebra-do-not-send-local-routes-to-fpm.patch |   80 +
 ...o-write-ip-nht-resolve-via-default-c.patch |   85 +
 ...-config-replayed-we-cannot-handle-th.patch |   71 +
 ...n-suppress-fib-pending-configuration.patch |   32 +
 ...th-nexthop-information-NEXTHOP-and-N.patch |  106 +
 src/sonic-frr/patch/series                    |   27 +-
 53 files changed, 2419 insertions(+), 6319 deletions(-)
 delete mode 100644 src/sonic-frr/patch/0009-bgpd-Ensure-suppress-fib-pending-works-with-network-.patch
 delete mode 100644 src/sonic-frr/patch/0011-zebra-Static-routes-async-notification-do-not-need-t.patch
 delete mode 100644 src/sonic-frr/patch/0012-zebra-Rename-vrf_lookup_by_tableid-to-zebra_vrf_look.patch
 delete mode 100644 src/sonic-frr/patch/0013-zebra-Move-protodown_r_bit-to-a-better-spot.patch
 delete mode 100644 src/sonic-frr/patch/0014-zebra-Remove-unused-dplane_intf_delete.patch
 delete mode 100644 src/sonic-frr/patch/0015-zebra-Remove-unused-add-variable.patch
 delete mode 100644 src/sonic-frr/patch/0016-zebra-Remove-duplicate-function-for-netlink-interfac.patch
 delete mode 100644 src/sonic-frr/patch/0017-zebra-Add-code-to-get-set-interface-to-pass-up-from-.patch
 delete mode 100644 src/sonic-frr/patch/0018-zebra-Use-zebra-dplane-for-RTM-link-and-addr.patch
 delete mode 100644 src/sonic-frr/patch/0019-zebra-remove-duplicated-nexthops-when-sending-fpm-msg.patch
 delete mode 100644 src/sonic-frr/patch/0020-zebra-Fix-non-notification-of-better-admin-won.patch
 delete mode 100644 src/sonic-frr/patch/0023-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch
 delete mode 100644 src/sonic-frr/patch/0024-lib-use-snmp-s-large-fd-sets-for-agentx.patch
 delete mode 100644 src/sonic-frr/patch/0026-bgp-fib-suppress-announce-fix.patch
 delete mode 100644 src/sonic-frr/patch/0027-lib-Do-not-convert-EVPN-prefixes-into-IPv4-IPv6-if-n.patch
 delete mode 100644 src/sonic-frr/patch/0029-zebra-nhg-fix-on-intf-up.patch
 delete mode 100644 src/sonic-frr/patch/0032-bgpd-fix-flushing-ipv6-flowspec-entries-when-peering.patch
 delete mode 100644 src/sonic-frr/patch/0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch
 rename src/sonic-frr/patch/{build-dplane-fpm-sonic-module.patch => 0054-build-dplane-fpm-sonic-module.patch} (62%)
 rename src/sonic-frr/patch/{bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch => 0055-bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch} (54%)
 create mode 100644 src/sonic-frr/patch/0056-zebra-do-not-send-local-routes-to-fpm.patch
 create mode 100644 src/sonic-frr/patch/0057-Adding-changes-to-write-ip-nht-resolve-via-default-c.patch
 create mode 100644 src/sonic-frr/patch/0058-When-the-file-is-config-replayed-we-cannot-handle-th.patch
 create mode 100644 src/sonic-frr/patch/0059-Fix-BGP-reset-on-suppress-fib-pending-configuration.patch
 create mode 100644 src/sonic-frr/patch/0060-bgpd-Validate-both-nexthop-information-NEXTHOP-and-N.patch

diff --git a/.gitmodules b/.gitmodules
index 1b7aed9f145f..b76f589bdfa8 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -46,7 +46,7 @@
 [submodule "src/sonic-frr/frr"]
 	path = src/sonic-frr/frr
 	url = https://github.com/sonic-net/sonic-frr.git
-	branch = frr/8.5
+	branch = frr-10.0.1
 [submodule "platform/p4/p4-hlir/p4-hlir-v1.1"]
 	path = platform/p4/p4-hlir/p4-hlir-v1.1
 	url = https://github.com/p4lang/p4-hlir.git
diff --git a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
index 445dbf08688a..0a26dd51c3fa 100644
--- a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
+++ b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
@@ -29,6 +29,17 @@ stdout_logfile=syslog
 stderr_logfile=syslog
 dependent_startup=true
 
+[program:mgmtd]
+command=/usr/lib/frr/mgmtd -A 127.0.0.1
+priority=4
+autostart=false
+autorestart=true
+startsecs=0
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=rsyslogd:running
+
 [program:zebra]
 command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_sonic -M snmp --asic-offload=notify_on_offload
 priority=4
diff --git a/platform/vs/docker-sonic-vs/Dockerfile.j2 b/platform/vs/docker-sonic-vs/Dockerfile.j2
index 54b408b50bd2..e2fd50bfcfba 100644
--- a/platform/vs/docker-sonic-vs/Dockerfile.j2
+++ b/platform/vs/docker-sonic-vs/Dockerfile.j2
@@ -60,7 +60,9 @@ RUN apt-get install -y net-tools \
                        # For libkrb5-dev
                        comerr-dev \
                        libgssrpc4 \
-                       libkdb5-10
+                       libkdb5-10 \
+                       libprotobuf-c-dev \
+                       protobuf-c-compiler
 
 # For sonic-config-engine Python 3 package
 # Install pyangbind here, outside sonic-config-engine dependencies, as pyangbind causes enum34 to be installed.
diff --git a/platform/vs/docker-sonic-vs/supervisord.conf.j2 b/platform/vs/docker-sonic-vs/supervisord.conf.j2
index d8d9ce390cb8..d389f28311cf 100644
--- a/platform/vs/docker-sonic-vs/supervisord.conf.j2
+++ b/platform/vs/docker-sonic-vs/supervisord.conf.j2
@@ -163,6 +163,14 @@ stderr_logfile=syslog
 environment=ASAN_OPTIONS="log_path=/var/log/asan/teammgrd-asan.log{{ asan_extra_options }}"
 {% endif %}
 
+[program:mgmtd]
+command=/usr/lib/frr/mgmtd -A 127.0.0.1
+priority=13
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+
 [program:zebra]
 command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_sonic --asic-offload=notify_on_offload
 priority=13
diff --git a/rules/frr.mk b/rules/frr.mk
index da42179a0312..ff3c3ea4ab17 100644
--- a/rules/frr.mk
+++ b/rules/frr.mk
@@ -1,9 +1,9 @@
 # FRRouting (frr) package
 
-FRR_VERSION = 8.5.4
+FRR_VERSION = 10.0.1
 FRR_SUBVERSION = 0
-FRR_BRANCH = frr/8.5
-FRR_TAG = frr-8.5.4
+FRR_BRANCH = frr-10.0.1
+FRR_TAG = frr-10.0.1
 export FRR_VERSION FRR_SUBVERSION FRR_BRANCH FRR_TAG
 
 
diff --git a/rules/libyang2.mk b/rules/libyang2.mk
index ca6d611b52ee..e683ff05eb1f 100644
--- a/rules/libyang2.mk
+++ b/rules/libyang2.mk
@@ -1,8 +1,8 @@
 # libyang2
 
-LIBYANG2_VERSION_BASE = 2.0
-LIBYANG2_VERSION = $(LIBYANG2_VERSION_BASE).112
-LIBYANG2_SUBVERSION = 6
+LIBYANG2_VERSION_BASE = 2.1
+LIBYANG2_VERSION = $(LIBYANG2_VERSION_BASE).148
+LIBYANG2_SUBVERSION = 0.2
 LIBYANG2_FULLVERSION = $(LIBYANG2_VERSION)-$(LIBYANG2_SUBVERSION)
 
 export LIBYANG2_VERSION_BASE
@@ -10,14 +10,14 @@ export LIBYANG2_VERSION
 export LIBYANG2_SUBVERSION
 export LIBYANG2_FULLVERSION
 
-LIBYANG2 = libyang2_$(LIBYANG2_FULLVERSION)_$(CONFIGURED_ARCH).deb
+LIBYANG2 = libyang2t64_$(LIBYANG2_FULLVERSION)_$(CONFIGURED_ARCH).deb
 $(LIBYANG2)_SRC_PATH = $(SRC_PATH)/libyang2
 SONIC_MAKE_DEBS += $(LIBYANG2)
 
 LIBYANG2_DEV = libyang2-dev_$(LIBYANG2_FULLVERSION)_$(CONFIGURED_ARCH).deb
 $(eval $(call add_derived_package,$(LIBYANG2),$(LIBYANG2_DEV)))
 
-LIBYANG2_DBG = libyang2-dbgsym_$(LIBYANG2_FULLVERSION)_$(CONFIGURED_ARCH).deb
+LIBYANG2_DBG = libyang2t64-dbgsym_$(LIBYANG2_FULLVERSION)_$(CONFIGURED_ARCH).deb
 $(eval $(call add_derived_package,$(LIBYANG2),$(LIBYANG2_DBG)))
 
 
diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index 8416c3166fe0..ed995079552b 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -145,6 +145,8 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install
         libjson-c-dev \
         libsystemd-dev \
         libcmocka-dev \
+        libprotobuf-c-dev \
+        protobuf-c-compiler \
 #{%- if CROSS_BUILD_ENVIRON != "y" %}
         python3-all-dev \
         python3-all-dbg \
diff --git a/sonic-slave-bullseye/Dockerfile.j2 b/sonic-slave-bullseye/Dockerfile.j2
index 1aca2a0ba5e3..b1a98863d3fc 100644
--- a/sonic-slave-bullseye/Dockerfile.j2
+++ b/sonic-slave-bullseye/Dockerfile.j2
@@ -148,6 +148,8 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install
         libsystemd-dev \
         python3-ipaddr \
         libcmocka-dev \
+        libprotobuf-c-dev \
+        protobuf-c-compiler \
 #{%- if CROSS_BUILD_ENVIRON != "y" %}
         python3-all-dev \
         python3-all-dbg \
diff --git a/sonic-slave-buster/Dockerfile.j2 b/sonic-slave-buster/Dockerfile.j2
index dce6daa520a0..b65a1a08957c 100644
--- a/sonic-slave-buster/Dockerfile.j2
+++ b/sonic-slave-buster/Dockerfile.j2
@@ -144,6 +144,8 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install
         libsystemd-dev \
         python-ipaddr \
         libcmocka-dev \
+        libprotobuf-c-dev \
+        protobuf-c-compiler \
 {%- if CROSS_BUILD_ENVIRON != "y" %}
         python3-all-dev \
         python3-all-dbg \
diff --git a/src/libyang2/Makefile b/src/libyang2/Makefile
index fab24590a340..16d80587573e 100644
--- a/src/libyang2/Makefile
+++ b/src/libyang2/Makefile
@@ -5,7 +5,7 @@ SHELL = /bin/bash
 LIBYANG_URL = https://sonicstorage.blob.core.windows.net/debian/pool/main/liby/libyang
 
 DSC_FILE = libyang2_$(LIBYANG2_FULLVERSION).dsc
-ORIG_FILE = libyang2_$(LIBYANG2_VERSION).orig.tar.gz
+ORIG_FILE = libyang2_$(LIBYANG2_VERSION).orig.tar.xz
 DEBIAN_FILE = libyang2_$(LIBYANG2_FULLVERSION).debian.tar.xz
 
 DSC_FILE_URL = $(LIBYANG_URL)/$(DSC_FILE)
@@ -26,6 +26,10 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	dpkg-source -x libyang2_$(LIBYANG2_FULLVERSION).dsc
 
 	pushd libyang2-$(LIBYANG2_VERSION)
+	#The package libyang2.1.148 is taken from debian trixie, which only has dpkg-dev version 1.21.22
+	#The bullseye package has dpkg-dev version 1.20.13
+	#The VS package has dpkg-dev version 1.19.8
+	sed -i 's/dpkg-dev (>= 1.22.5)/dpkg-dev (>= 1.19.8)/' debian/control
 	#sed -i 's/set(LIBYANG_MAJOR_SOVERSION 1)/set(LIBYANG_MAJOR_SOVERSION 2)/' CMakeLists.txt
 	#sed -i 's/libyang2/libyang2/' debian/libyang2.install
 	# Enable large file support for 32-bit arch
diff --git a/src/sonic-frr/Makefile b/src/sonic-frr/Makefile
index 307089d91eae..6462af5ac6e4 100644
--- a/src/sonic-frr/Makefile
+++ b/src/sonic-frr/Makefile
@@ -36,6 +36,7 @@ endif
 ifeq ($(CROSS_BUILD_ENVIRON), y)
 	git reset --hard
 endif
+	git branch -f master origin/$(FRR_BRANCH)
 	git checkout master
 	git branch -D $(FRR_BRANCH)
 	popd
diff --git a/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c b/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c
index f01c647d4a67..6627e9331e87 100644
--- a/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c
+++ b/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c
@@ -32,6 +32,7 @@
 #include <string.h>
 
 #include "lib/zebra.h"
+#include <linux/rtnetlink.h>
 #include "lib/json.h"
 #include "lib/libfrr.h"
 #include "lib/frratomic.h"
@@ -45,8 +46,6 @@
 #include "zebra/zebra_dplane.h"
 #include "zebra/zebra_mpls.h"
 #include "zebra/zebra_router.h"
-#include "zebra/zebra_evpn.h"
-#include "zebra/zebra_evpn_mac.h"
 #include "zebra/zebra_vxlan_private.h"
 #include "zebra/kernel_netlink.h"
 #include "zebra/rt_netlink.h"
@@ -165,22 +164,22 @@ struct fpm_nl_ctx {
 	/* data plane events. */
 	struct zebra_dplane_provider *prov;
 	struct frr_pthread *fthread;
-	struct thread *t_connect;
-	struct thread *t_read;
-	struct thread *t_write;
-	struct thread *t_event;
-	struct thread *t_nhg;
-	struct thread *t_dequeue;
+	struct event *t_connect;
+	struct event *t_read;
+	struct event *t_write;
+	struct event *t_event;
+	struct event *t_nhg;
+	struct event *t_dequeue;
 
 	/* zebra events. */
-	struct thread *t_lspreset;
-	struct thread *t_lspwalk;
-	struct thread *t_nhgreset;
-	struct thread *t_nhgwalk;
-	struct thread *t_ribreset;
-	struct thread *t_ribwalk;
-	struct thread *t_rmacreset;
-	struct thread *t_rmacwalk;
+	struct event *t_lspreset;
+	struct event *t_lspwalk;
+	struct event *t_nhgreset;
+	struct event *t_nhgwalk;
+	struct event *t_ribreset;
+	struct event *t_ribwalk;
+	struct event *t_rmacreset;
+	struct event *t_rmacwalk;
 
 	/* Statistic counters. */
 	struct {
@@ -238,26 +237,26 @@ enum fpm_nl_events {
 };
 
 #define FPM_RECONNECT(fnc)                                                     \
-	thread_add_event((fnc)->fthread->master, fpm_process_event, (fnc),     \
+	event_add_event((fnc)->fthread->master, fpm_process_event, (fnc),     \
 			 FNE_INTERNAL_RECONNECT, &(fnc)->t_event)
 
 #define WALK_FINISH(fnc, ev)                                                   \
-	thread_add_event((fnc)->fthread->master, fpm_process_event, (fnc),     \
+	event_add_event((fnc)->fthread->master, fpm_process_event, (fnc),     \
 			 (ev), NULL)
 
 /*
  * Prototypes.
  */
-static void fpm_process_event(struct thread *t);
+static void fpm_process_event(struct event *t);
 static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx);
-static void fpm_lsp_send(struct thread *t);
-static void fpm_lsp_reset(struct thread *t);
-static void fpm_nhg_send(struct thread *t);
-static void fpm_nhg_reset(struct thread *t);
-static void fpm_rib_send(struct thread *t);
-static void fpm_rib_reset(struct thread *t);
-static void fpm_rmac_send(struct thread *t);
-static void fpm_rmac_reset(struct thread *t);
+static void fpm_lsp_send(struct event *t);
+static void fpm_lsp_reset(struct event *t);
+static void fpm_nhg_send(struct event *t);
+static void fpm_nhg_reset(struct event *t);
+static void fpm_rib_send(struct event *t);
+static void fpm_rib_reset(struct event *t);
+static void fpm_rmac_send(struct event *t);
+static void fpm_rmac_reset(struct event *t);
 
 /*
  * CLI.
@@ -313,7 +312,7 @@ DEFUN(fpm_set_address, fpm_set_address_cmd,
 	memcpy(&sin6->sin6_addr, naddr, sizeof(sin6->sin6_addr));
 
 ask_reconnect:
-	thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc,
+	event_add_event(gfnc->fthread->master, fpm_process_event, gfnc,
 			 FNE_RECONNECT, &gfnc->t_event);
 	return CMD_SUCCESS;
 }
@@ -328,7 +327,7 @@ DEFUN(no_fpm_set_address, no_fpm_set_address_cmd,
       "FPM remote listening server port\n"
       "Remote FPM server port\n")
 {
-	thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc,
+	event_add_event(gfnc->fthread->master, fpm_process_event, gfnc,
 			 FNE_DISABLE, &gfnc->t_event);
 	return CMD_SUCCESS;
 }
@@ -342,7 +341,7 @@ DEFUN(fpm_use_nhg, fpm_use_nhg_cmd,
 	if (gfnc->use_nhg)
 		return CMD_SUCCESS;
 
-	thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc,
+	event_add_event(gfnc->fthread->master, fpm_process_event, gfnc,
 			 FNE_TOGGLE_NHG, &gfnc->t_nhg);
 
 	return CMD_SUCCESS;
@@ -358,7 +357,7 @@ DEFUN(no_fpm_use_nhg, no_fpm_use_nhg_cmd,
 	if (!gfnc->use_nhg)
 		return CMD_SUCCESS;
 
-	thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc,
+	event_add_event(gfnc->fthread->master, fpm_process_event, gfnc,
 			 FNE_TOGGLE_NHG, &gfnc->t_nhg);
 
 	return CMD_SUCCESS;
@@ -370,7 +369,7 @@ DEFUN(fpm_reset_counters, fpm_reset_counters_cmd,
       FPM_STR
       "FPM statistic counters\n")
 {
-	thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc,
+	event_add_event(gfnc->fthread->master, fpm_process_event, gfnc,
 			 FNE_RESET_COUNTERS, &gfnc->t_event);
 	return CMD_SUCCESS;
 }
@@ -491,19 +490,19 @@ static struct cmd_node fpm_node = {
 /*
  * FPM functions.
  */
-static void fpm_connect(struct thread *t);
+static void fpm_connect(struct event *t);
 
 static void fpm_reconnect(struct fpm_nl_ctx *fnc)
 {
 	/* Cancel all zebra threads first. */
-	thread_cancel_async(zrouter.master, &fnc->t_lspreset, NULL);
-	thread_cancel_async(zrouter.master, &fnc->t_lspwalk, NULL);
-	thread_cancel_async(zrouter.master, &fnc->t_nhgreset, NULL);
-	thread_cancel_async(zrouter.master, &fnc->t_nhgwalk, NULL);
-	thread_cancel_async(zrouter.master, &fnc->t_ribreset, NULL);
-	thread_cancel_async(zrouter.master, &fnc->t_ribwalk, NULL);
-	thread_cancel_async(zrouter.master, &fnc->t_rmacreset, NULL);
-	thread_cancel_async(zrouter.master, &fnc->t_rmacwalk, NULL);
+	event_cancel_async(zrouter.master, &fnc->t_lspreset, NULL);
+	event_cancel_async(zrouter.master, &fnc->t_lspwalk, NULL);
+	event_cancel_async(zrouter.master, &fnc->t_nhgreset, NULL);
+	event_cancel_async(zrouter.master, &fnc->t_nhgwalk, NULL);
+	event_cancel_async(zrouter.master, &fnc->t_ribreset, NULL);
+	event_cancel_async(zrouter.master, &fnc->t_ribwalk, NULL);
+	event_cancel_async(zrouter.master, &fnc->t_rmacreset, NULL);
+	event_cancel_async(zrouter.master, &fnc->t_rmacwalk, NULL);
 
 	/*
 	 * Grab the lock to empty the streams (data plane might try to
@@ -519,20 +518,20 @@ static void fpm_reconnect(struct fpm_nl_ctx *fnc)
 
 	stream_reset(fnc->ibuf);
 	stream_reset(fnc->obuf);
-	THREAD_OFF(fnc->t_read);
-	THREAD_OFF(fnc->t_write);
+	EVENT_OFF(fnc->t_read);
+	EVENT_OFF(fnc->t_write);
 
 	/* FPM is disabled, don't attempt to connect. */
 	if (fnc->disabled)
 		return;
 
-	thread_add_timer(fnc->fthread->master, fpm_connect, fnc, 3,
+	event_add_timer(fnc->fthread->master, fpm_connect, fnc, 3,
 			 &fnc->t_connect);
 }
 
-static void fpm_read(struct thread *t)
+static void fpm_read(struct event *t)
 {
-	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	struct fpm_nl_ctx *fnc = EVENT_ARG(t);
 	fpm_msg_hdr_t fpm;
 	ssize_t rv;
 	char buf[65535];
@@ -564,7 +563,7 @@ static void fpm_read(struct thread *t)
 	}
 
 	/* Schedule the next read */
-	thread_add_read(fnc->fthread->master, fpm_read, fnc, fnc->socket,
+	event_add_read(fnc->fthread->master, fpm_read, fnc, fnc->socket,
 			&fnc->t_read);
 
 	/* We've got an interruption. */
@@ -693,9 +692,9 @@ static void fpm_read(struct thread *t)
 	stream_reset(fnc->ibuf);
 }
 
-static void fpm_write(struct thread *t)
+static void fpm_write(struct event *t)
 {
-	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	struct fpm_nl_ctx *fnc = EVENT_ARG(t);
 	socklen_t statuslen;
 	ssize_t bwritten;
 	int rv, status;
@@ -729,11 +728,11 @@ static void fpm_write(struct thread *t)
 		 * Starting with LSPs walk all FPM objects, marking them
 		 * as unsent and then replaying them.
 		 */
-		thread_add_timer(zrouter.master, fpm_lsp_reset, fnc, 0,
+		event_add_timer(zrouter.master, fpm_lsp_reset, fnc, 0,
 				 &fnc->t_lspreset);
 
 		/* Permit receiving messages now. */
-		thread_add_read(fnc->fthread->master, fpm_read, fnc,
+		event_add_read(fnc->fthread->master, fpm_read, fnc,
 				fnc->socket, &fnc->t_read);
 	}
 
@@ -791,15 +790,15 @@ static void fpm_write(struct thread *t)
 	/* Stream is not empty yet, we must schedule more writes. */
 	if (STREAM_READABLE(fnc->obuf)) {
 		stream_pulldown(fnc->obuf);
-		thread_add_write(fnc->fthread->master, fpm_write, fnc,
+		event_add_write(fnc->fthread->master, fpm_write, fnc,
 				 fnc->socket, &fnc->t_write);
 		return;
 	}
 }
 
-static void fpm_connect(struct thread *t)
+static void fpm_connect(struct event *t)
 {
-	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	struct fpm_nl_ctx *fnc = EVENT_ARG(t);
 	struct sockaddr_in *sin = (struct sockaddr_in *)&fnc->addr;
 	struct sockaddr_in6 *sin6 = (struct sockaddr_in6 *)&fnc->addr;
 	socklen_t slen;
@@ -810,7 +809,7 @@ static void fpm_connect(struct thread *t)
 	if (sock == -1) {
 		zlog_err("%s: fpm socket failed: %s", __func__,
 			 strerror(errno));
-		thread_add_timer(fnc->fthread->master, fpm_connect, fnc, 3,
+		event_add_timer(fnc->fthread->master, fpm_connect, fnc, 3,
 				 &fnc->t_connect);
 		return;
 	}
@@ -836,7 +835,7 @@ static void fpm_connect(struct thread *t)
 		close(sock);
 		zlog_warn("%s: fpm connection failed: %s", __func__,
 			  strerror(errno));
-		thread_add_timer(fnc->fthread->master, fpm_connect, fnc, 3,
+		event_add_timer(fnc->fthread->master, fpm_connect, fnc, 3,
 				 &fnc->t_connect);
 		return;
 	}
@@ -844,9 +843,9 @@ static void fpm_connect(struct thread *t)
 	fnc->connecting = (errno == EINPROGRESS);
 	fnc->socket = sock;
 	if (!fnc->connecting)
-		thread_add_read(fnc->fthread->master, fpm_read, fnc, sock,
+		event_add_read(fnc->fthread->master, fpm_read, fnc, sock,
 				&fnc->t_read);
-	thread_add_write(fnc->fthread->master, fpm_write, fnc, sock,
+	event_add_write(fnc->fthread->master, fpm_write, fnc, sock,
 			 &fnc->t_write);
 
 	/*
@@ -856,7 +855,7 @@ static void fpm_connect(struct thread *t)
 	 * If we are not connected, then delay the objects reset/send.
 	 */
 	if (!fnc->connecting)
-		thread_add_timer(zrouter.master, fpm_lsp_reset, fnc, 0,
+		event_add_timer(zrouter.master, fpm_lsp_reset, fnc, 0,
 				 &fnc->t_lspreset);
 }
 
@@ -886,9 +885,9 @@ static struct zebra_vrf *vrf_lookup_by_table_id(uint32_t table_id)
 /**
  * Resets the SRv6 routes FPM flags so we send all SRv6 routes again.
  */
-static void fpm_srv6_route_reset(struct thread *t)
+static void fpm_srv6_route_reset(struct event *t)
 {
-	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	struct fpm_nl_ctx *fnc = EVENT_ARG(t);
 	rib_dest_t *dest;
 	struct route_node *rn;
 	struct route_entry *re;
@@ -910,14 +909,14 @@ static void fpm_srv6_route_reset(struct thread *t)
 
 			nexthop = re->nhe->nhg.nexthop;
 			if (nexthop && nexthop->nh_srv6 &&
-					!sid_zero(&nexthop->nh_srv6->seg6_segs))
+					!sid_zero((const struct seg6_seg_stack *)nexthop->nh_srv6->seg6_segs))
 				/* Unset FPM installation flag so it gets installed again. */
 				UNSET_FLAG(dest->flags, RIB_DEST_UPDATE_FPM);
 		}
 	}
 
 	/* Schedule next step: send RIB routes. */
-	thread_add_event(zrouter.master, fpm_rib_send, fnc, 0, &fnc->t_ribwalk);
+	event_add_event(zrouter.master, fpm_rib_send, fnc, 0, &fnc->t_ribwalk);
 }
 
 /*
@@ -975,7 +974,7 @@ static ssize_t netlink_srv6_localsid_msg_encode(int cmd,
 	req->n.nlmsg_flags = NLM_F_CREATE | NLM_F_REQUEST;
 
 	if ((cmd == RTM_NEWSRV6LOCALSID) &&
-		(v6_rr_semantics))
+		(zrouter.v6_rr_semantics))
 		req->n.nlmsg_flags |= NLM_F_REPLACE;
 
 	req->n.nlmsg_type = cmd;
@@ -1202,8 +1201,9 @@ static ssize_t netlink_srv6_vpn_route_msg_encode(int cmd,
 	uint32_t table_id;
 	struct interface *ifp;
 	struct in6_addr encap_src_addr = {};
-	struct listnode *node;
 	struct connected *connected;
+	struct vrf *vrf;
+	struct prefix *cp;
 
 	struct {
 		struct nlmsghdr n;
@@ -1212,7 +1212,7 @@ static ssize_t netlink_srv6_vpn_route_msg_encode(int cmd,
 	} *req = (void *)data;
 
 	nexthop = dplane_ctx_get_ng(ctx)->nexthop;
-	if (!nexthop || !nexthop->nh_srv6 || sid_zero(&nexthop->nh_srv6->seg6_segs))
+	if (!nexthop || !nexthop->nh_srv6 || sid_zero((const struct seg6_seg_stack *)nexthop->nh_srv6->seg6_segs))
 		return -1;
 
 	p = dplane_ctx_get_dest(ctx);
@@ -1230,7 +1230,7 @@ static ssize_t netlink_srv6_vpn_route_msg_encode(int cmd,
 	req->n.nlmsg_flags = NLM_F_CREATE | NLM_F_REQUEST;
 
 	if ((cmd == RTM_NEWROUTE) &&
-	    ((p->family == AF_INET) || v6_rr_semantics))
+	    ((p->family == AF_INET) || zrouter.v6_rr_semantics))
 		req->n.nlmsg_flags |= NLM_F_REPLACE;
 
 	req->n.nlmsg_type = cmd;
@@ -1291,13 +1291,19 @@ static ssize_t netlink_srv6_vpn_route_msg_encode(int cmd,
 	 * if it is valid
 	 */
 	ifp = if_lookup_by_name("lo", VRF_DEFAULT);
+	vrf = vrf_lookup_by_name(VRF_DEFAULT_NAME);
+	if (!vrf)
+		return false;
 	if (ifp) {
-		FOR_ALL_INTERFACES_ADDRESSES(ifp, connected, node) {
-			if (connected->address->family == AF_INET6 &&
-					!IN6_IS_ADDR_LOOPBACK(&connected->address->u.prefix6) &&
-					!IN6_IS_ADDR_LINKLOCAL(&connected->address->u.prefix6)) {
-				encap_src_addr = connected->address->u.prefix6;
-				break;
+		FOR_ALL_INTERFACES (vrf, ifp) {
+			frr_each (if_connected, ifp->connected, connected) {
+				cp = connected->address;
+				if (cp->family == AF_INET6 &&
+						!IN6_IS_ADDR_LOOPBACK(&cp->u.prefix6) &&
+						!IN6_IS_ADDR_LINKLOCAL(&cp->u.prefix6)) {
+					encap_src_addr = cp->u.prefix6;
+					break;
+				}
 			}
 		}
 	}
@@ -1348,7 +1354,7 @@ static ssize_t netlink_srv6_msg_encode(int cmd,
 		if (!netlink_srv6_localsid_msg_encode(
 				cmd, ctx, data, datalen, fpm, force_nhg))
 			return 0;
-	} else if (!sid_zero(&nexthop->nh_srv6->seg6_segs)) {
+	} else if (!sid_zero(nexthop->nh_srv6->seg6_segs)) {
 		if (!netlink_srv6_vpn_route_msg_encode(
 				cmd, ctx, data, datalen, fpm, force_nhg))
 			return 0;
@@ -1417,7 +1423,7 @@ static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx)
 		} else {
 			rv = netlink_route_multipath_msg_encode(RTM_DELROUTE, ctx,
 								nl_buf, sizeof(nl_buf),
-								true, fnc->use_nhg);
+								true, fnc->use_nhg, false);
 			if (rv <= 0) {
 				zlog_err(
 					"%s: netlink_route_multipath_msg_encode failed",
@@ -1448,7 +1454,7 @@ static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx)
 		} else {
 			rv = netlink_route_multipath_msg_encode(
 				RTM_NEWROUTE, ctx, &nl_buf[nl_buf_len],
-				sizeof(nl_buf) - nl_buf_len, true, fnc->use_nhg);
+				sizeof(nl_buf) - nl_buf_len, true, fnc->use_nhg, false);
 			if (rv <= 0) {
 				zlog_err(
 					"%s: netlink_route_multipath_msg_encode failed",
@@ -1513,7 +1519,7 @@ static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx)
 	case DPLANE_OP_ADDR_INSTALL:
 	case DPLANE_OP_ADDR_UNINSTALL:
 		if (strmatch(dplane_ctx_get_ifname(ctx), "lo"))
-			thread_add_timer(fnc->fthread->master, fpm_srv6_route_reset,
+			event_add_timer(fnc->fthread->master, fpm_srv6_route_reset,
 				 fnc, 0, &fnc->t_ribreset);
 		break;
 
@@ -1610,7 +1616,7 @@ static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx)
 				      memory_order_relaxed);
 
 	/* Tell the thread to start writing. */
-	thread_add_write(fnc->fthread->master, fpm_write, fnc, fnc->socket,
+	event_add_write(fnc->fthread->master, fpm_write, fnc, fnc->socket,
 			 &fnc->t_write);
 
 	return 0;
@@ -1647,9 +1653,9 @@ static int fpm_lsp_send_cb(struct hash_bucket *bucket, void *arg)
 	return HASHWALK_CONTINUE;
 }
 
-static void fpm_lsp_send(struct thread *t)
+static void fpm_lsp_send(struct event *t)
 {
-	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	struct fpm_nl_ctx *fnc = EVENT_ARG(t);
 	struct zebra_vrf *zvrf = vrf_info_lookup(VRF_DEFAULT);
 	struct fpm_lsp_arg fla;
 
@@ -1665,11 +1671,11 @@ static void fpm_lsp_send(struct thread *t)
 		WALK_FINISH(fnc, FNE_LSP_FINISHED);
 
 		/* Now move onto routes */
-		thread_add_timer(zrouter.master, fpm_nhg_reset, fnc, 0,
+		event_add_timer(zrouter.master, fpm_nhg_reset, fnc, 0,
 				 &fnc->t_nhgreset);
 	} else {
 		/* Didn't finish - reschedule LSP walk */
-		thread_add_timer(zrouter.master, fpm_lsp_send, fnc, 0,
+		event_add_timer(zrouter.master, fpm_lsp_send, fnc, 0,
 				 &fnc->t_lspwalk);
 	}
 }
@@ -1707,9 +1713,9 @@ static int fpm_nhg_send_cb(struct hash_bucket *bucket, void *arg)
 	return HASHWALK_CONTINUE;
 }
 
-static void fpm_nhg_send(struct thread *t)
+static void fpm_nhg_send(struct event *t)
 {
-	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	struct fpm_nl_ctx *fnc = EVENT_ARG(t);
 	struct fpm_nhg_arg fna;
 
 	fna.fnc = fnc;
@@ -1726,19 +1732,19 @@ static void fpm_nhg_send(struct thread *t)
 	/* We are done sending next hops, lets install the routes now. */
 	if (fna.complete) {
 		WALK_FINISH(fnc, FNE_NHG_FINISHED);
-		thread_add_timer(zrouter.master, fpm_rib_reset, fnc, 0,
+		event_add_timer(zrouter.master, fpm_rib_reset, fnc, 0,
 				 &fnc->t_ribreset);
 	} else /* Otherwise reschedule next hop group again. */
-		thread_add_timer(zrouter.master, fpm_nhg_send, fnc, 0,
+		event_add_timer(zrouter.master, fpm_nhg_send, fnc, 0,
 				 &fnc->t_nhgwalk);
 }
 
 /**
  * Send all RIB installed routes to the connected data plane.
  */
-static void fpm_rib_send(struct thread *t)
+static void fpm_rib_send(struct event *t)
 {
-	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	struct fpm_nl_ctx *fnc = EVENT_ARG(t);
 	rib_dest_t *dest;
 	struct route_node *rn;
 	struct route_table *rt;
@@ -1768,7 +1774,7 @@ static void fpm_rib_send(struct thread *t)
 				/* Free the temporary allocated context. */
 				dplane_ctx_fini(&ctx);
 
-				thread_add_timer(zrouter.master, fpm_rib_send,
+				event_add_timer(zrouter.master, fpm_rib_send,
 						 fnc, 1, &fnc->t_ribwalk);
 				return;
 			}
@@ -1785,7 +1791,7 @@ static void fpm_rib_send(struct thread *t)
 	WALK_FINISH(fnc, FNE_RIB_FINISHED);
 
 	/* Schedule next event: RMAC reset. */
-	thread_add_event(zrouter.master, fpm_rmac_reset, fnc, 0,
+	event_add_event(zrouter.master, fpm_rmac_reset, fnc, 0,
 			 &fnc->t_rmacreset);
 }
 
@@ -1805,6 +1811,7 @@ static void fpm_enqueue_rmac_table(struct hash_bucket *bucket, void *arg)
 	struct zebra_mac *zrmac = bucket->data;
 	struct zebra_if *zif = fra->zl3vni->vxlan_if->info;
 	const struct zebra_l2info_vxlan *vxl = &zif->l2info.vxl;
+	struct zebra_vxlan_vni *vni;
 	struct zebra_if *br_zif;
 	vlanid_t vid;
 	bool sticky;
@@ -1816,16 +1823,17 @@ static void fpm_enqueue_rmac_table(struct hash_bucket *bucket, void *arg)
 	sticky = !!CHECK_FLAG(zrmac->flags,
 			      (ZEBRA_MAC_STICKY | ZEBRA_MAC_REMOTE_DEF_GW));
 	br_zif = (struct zebra_if *)(zif->brslave_info.br_if->info);
-	vid = IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(br_zif) ? vxl->access_vlan : 0;
+	vni = zebra_vxlan_if_vni_find(zif, fra->zl3vni->vni);
+	vid = IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(br_zif) ? vxl->vni_info.vni.access_vlan : 0;
 
 	dplane_ctx_reset(fra->ctx);
 	dplane_ctx_set_op(fra->ctx, DPLANE_OP_MAC_INSTALL);
 	dplane_mac_init(fra->ctx, fra->zl3vni->vxlan_if,
 			zif->brslave_info.br_if, vid,
-			&zrmac->macaddr, zrmac->fwd_info.r_vtep_ip, sticky,
+			&zrmac->macaddr, vni->vni, zrmac->fwd_info.r_vtep_ip, sticky,
 			0 /*nhg*/, 0 /*update_flags*/);
 	if (fpm_nl_enqueue(fra->fnc, fra->ctx) == -1) {
-		thread_add_timer(zrouter.master, fpm_rmac_send,
+		event_add_timer(zrouter.master, fpm_rmac_send,
 				 fra->fnc, 1, &fra->fnc->t_rmacwalk);
 		fra->complete = false;
 	}
@@ -1840,11 +1848,11 @@ static void fpm_enqueue_l3vni_table(struct hash_bucket *bucket, void *arg)
 	hash_iterate(zl3vni->rmac_table, fpm_enqueue_rmac_table, zl3vni);
 }
 
-static void fpm_rmac_send(struct thread *t)
+static void fpm_rmac_send(struct event *t)
 {
 	struct fpm_rmac_arg fra;
 
-	fra.fnc = THREAD_ARG(t);
+	fra.fnc = EVENT_ARG(t);
 	fra.ctx = dplane_ctx_alloc();
 	fra.complete = true;
 	hash_iterate(zrouter.l3vni_table, fpm_enqueue_l3vni_table, &fra);
@@ -1866,14 +1874,14 @@ static void fpm_nhg_reset_cb(struct hash_bucket *bucket, void *arg)
 	UNSET_FLAG(nhe->flags, NEXTHOP_GROUP_FPM);
 }
 
-static void fpm_nhg_reset(struct thread *t)
+static void fpm_nhg_reset(struct event *t)
 {
-	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	struct fpm_nl_ctx *fnc = EVENT_ARG(t);
 
 	hash_iterate(zrouter.nhgs_id, fpm_nhg_reset_cb, NULL);
 
 	/* Schedule next step: send next hop groups. */
-	thread_add_event(zrouter.master, fpm_nhg_send, fnc, 0, &fnc->t_nhgwalk);
+	event_add_event(zrouter.master, fpm_nhg_send, fnc, 0, &fnc->t_nhgwalk);
 }
 
 /*
@@ -1886,23 +1894,23 @@ static void fpm_lsp_reset_cb(struct hash_bucket *bucket, void *arg)
 	UNSET_FLAG(lsp->flags, LSP_FLAG_FPM);
 }
 
-static void fpm_lsp_reset(struct thread *t)
+static void fpm_lsp_reset(struct event *t)
 {
-	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	struct fpm_nl_ctx *fnc = EVENT_ARG(t);
 	struct zebra_vrf *zvrf = vrf_info_lookup(VRF_DEFAULT);
 
 	hash_iterate(zvrf->lsp_table, fpm_lsp_reset_cb, NULL);
 
 	/* Schedule next step: send LSPs */
-	thread_add_event(zrouter.master, fpm_lsp_send, fnc, 0, &fnc->t_lspwalk);
+	event_add_event(zrouter.master, fpm_lsp_send, fnc, 0, &fnc->t_lspwalk);
 }
 
 /**
  * Resets the RIB FPM flags so we send all routes again.
  */
-static void fpm_rib_reset(struct thread *t)
+static void fpm_rib_reset(struct event *t)
 {
-	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	struct fpm_nl_ctx *fnc = EVENT_ARG(t);
 	rib_dest_t *dest;
 	struct route_node *rn;
 	struct route_table *rt;
@@ -1921,7 +1929,7 @@ static void fpm_rib_reset(struct thread *t)
 	}
 
 	/* Schedule next step: send RIB routes. */
-	thread_add_event(zrouter.master, fpm_rib_send, fnc, 0, &fnc->t_ribwalk);
+	event_add_event(zrouter.master, fpm_rib_send, fnc, 0, &fnc->t_ribwalk);
 }
 
 /*
@@ -1941,20 +1949,20 @@ static void fpm_unset_l3vni_table(struct hash_bucket *bucket, void *arg)
 	hash_iterate(zl3vni->rmac_table, fpm_unset_rmac_table, zl3vni);
 }
 
-static void fpm_rmac_reset(struct thread *t)
+static void fpm_rmac_reset(struct event *t)
 {
-	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	struct fpm_nl_ctx *fnc = EVENT_ARG(t);
 
 	hash_iterate(zrouter.l3vni_table, fpm_unset_l3vni_table, NULL);
 
 	/* Schedule next event: send RMAC entries. */
-	thread_add_event(zrouter.master, fpm_rmac_send, fnc, 0,
+	event_add_event(zrouter.master, fpm_rmac_send, fnc, 0,
 			 &fnc->t_rmacwalk);
 }
 
-static void fpm_process_queue(struct thread *t)
+static void fpm_process_queue(struct event *t)
 {
-	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	struct fpm_nl_ctx *fnc = EVENT_ARG(t);
 	struct zebra_dplane_ctx *ctx;
 	bool no_bufs = false;
 	uint64_t processed_contexts = 0;
@@ -1997,7 +2005,7 @@ static void fpm_process_queue(struct thread *t)
 
 	/* Re-schedule if we ran out of buffer space */
 	if (no_bufs)
-		thread_add_timer(fnc->fthread->master, fpm_process_queue,
+		event_add_timer(fnc->fthread->master, fpm_process_queue,
 				 fnc, 0, &fnc->t_dequeue);
 
 	/*
@@ -2013,10 +2021,10 @@ static void fpm_process_queue(struct thread *t)
 /**
  * Handles external (e.g. CLI, data plane or others) events.
  */
-static void fpm_process_event(struct thread *t)
+static void fpm_process_event(struct event *t)
 {
-	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
-	enum fpm_nl_events event = THREAD_VAL(t);
+	struct fpm_nl_ctx *fnc = EVENT_ARG(t);
+	enum fpm_nl_events event = EVENT_VAL(t);
 
 	switch (event) {
 	case FNE_DISABLE:
@@ -2100,19 +2108,19 @@ static int fpm_nl_start(struct zebra_dplane_provider *prov)
 static int fpm_nl_finish_early(struct fpm_nl_ctx *fnc)
 {
 	/* Disable all events and close socket. */
-	THREAD_OFF(fnc->t_lspreset);
-	THREAD_OFF(fnc->t_lspwalk);
-	THREAD_OFF(fnc->t_nhgreset);
-	THREAD_OFF(fnc->t_nhgwalk);
-	THREAD_OFF(fnc->t_ribreset);
-	THREAD_OFF(fnc->t_ribwalk);
-	THREAD_OFF(fnc->t_rmacreset);
-	THREAD_OFF(fnc->t_rmacwalk);
-	THREAD_OFF(fnc->t_event);
-	THREAD_OFF(fnc->t_nhg);
-	thread_cancel_async(fnc->fthread->master, &fnc->t_read, NULL);
-	thread_cancel_async(fnc->fthread->master, &fnc->t_write, NULL);
-	thread_cancel_async(fnc->fthread->master, &fnc->t_connect, NULL);
+	EVENT_OFF(fnc->t_lspreset);
+	EVENT_OFF(fnc->t_lspwalk);
+	EVENT_OFF(fnc->t_nhgreset);
+	EVENT_OFF(fnc->t_nhgwalk);
+	EVENT_OFF(fnc->t_ribreset);
+	EVENT_OFF(fnc->t_ribwalk);
+	EVENT_OFF(fnc->t_rmacreset);
+	EVENT_OFF(fnc->t_rmacwalk);
+	EVENT_OFF(fnc->t_event);
+	EVENT_OFF(fnc->t_nhg);
+	event_cancel_async(fnc->fthread->master, &fnc->t_read, NULL);
+	event_cancel_async(fnc->fthread->master, &fnc->t_write, NULL);
+	event_cancel_async(fnc->fthread->master, &fnc->t_connect, NULL);
 
 	if (fnc->socket != -1) {
 		close(fnc->socket);
@@ -2201,7 +2209,7 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov)
 	if (atomic_load_explicit(&fnc->counters.ctxqueue_len,
 				 memory_order_relaxed)
 	    > 0)
-		thread_add_timer(fnc->fthread->master, fpm_process_queue,
+		event_add_timer(fnc->fthread->master, fpm_process_queue,
 				 fnc, 0, &fnc->t_dequeue);
 
 	/* Ensure dataplane thread is rescheduled if we hit the work limit */
@@ -2211,7 +2219,7 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov)
 	return 0;
 }
 
-static int fpm_nl_new(struct thread_master *tm)
+static int fpm_nl_new(struct event_loop *tm)
 {
 	struct zebra_dplane_provider *prov = NULL;
 	int rv;
diff --git a/src/sonic-frr/frr b/src/sonic-frr/frr
index de0e358b877a..3fbd709d888a 160000
--- a/src/sonic-frr/frr
+++ b/src/sonic-frr/frr
@@ -1 +1 @@
-Subproject commit de0e358b877ac9b595e7fb387a302c960a4c02d1
+Subproject commit 3fbd709d888ab94db178e44a5b9d67c3653e0b17
diff --git a/src/sonic-frr/patch/0008-Use-vrf_id-for-vrf-not-tabled_id.patch b/src/sonic-frr/patch/0008-Use-vrf_id-for-vrf-not-tabled_id.patch
index ae8b05f06bd0..bf5dce51c9a3 100644
--- a/src/sonic-frr/patch/0008-Use-vrf_id-for-vrf-not-tabled_id.patch
+++ b/src/sonic-frr/patch/0008-Use-vrf_id-for-vrf-not-tabled_id.patch
@@ -5,15 +5,14 @@ Subject: [PATCH] From 349e3f758860be0077b69919c39764d3486ec44a Mon Sep 17
  00:00:00 2001 Subject: [PATCH] use vrf id instead of table id
 
 Signed-off-by: Stepan Blyschak <stepanb@nvidia.com>
-
 diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c
-index 325199eff..587045eac 100644
+index b8d097e58..b81a9db6d 100644
 --- a/zebra/rt_netlink.c
 +++ b/zebra/rt_netlink.c
-@@ -406,6 +406,30 @@ vrf_id_t vrf_lookup_by_table(uint32_t table_id, ns_id_t ns_id)
- 	return VRF_DEFAULT;
+@@ -385,6 +385,31 @@ static inline int proto2zebra(int proto, int family, bool is_nexthop)
+ 	return proto;
  }
- 
+
 +static uint32_t table_lookup_by_vrf(vrf_id_t vrf_id, ns_id_t ns_id)
 +{
 +	struct vrf *vrf;
@@ -37,14 +36,15 @@ index 325199eff..587045eac 100644
 +
 +	return RT_TABLE_UNSPEC;
 +}
++
 +
  /**
   * @parse_encap_mpls() - Parses encapsulated mpls attributes
   * @tb:         Pointer to rtattr to look for nested items in.
-@@ -782,14 +806,26 @@ int netlink_route_change_read_unicast_internal(struct nlmsghdr *h,
+@@ -817,14 +842,26 @@ int netlink_route_change_read_unicast_internal(struct nlmsghdr *h,
  	if (rtm->rtm_family == AF_MPLS)
  		return 0;
- 
+
 -	/* Table corresponding to route. */
 -	if (tb[RTA_TABLE])
 -		table = *(int *)RTA_DATA(tb[RTA_TABLE]);
@@ -58,7 +58,7 @@ index 325199eff..587045eac 100644
 +			table = rtm->rtm_table;
 +
 +		/* Map to VRF */
-+		vrf_id = vrf_lookup_by_table(table, ns_id);
++		vrf_id = zebra_vrf_lookup_by_table(table, ns_id);
 +	} else {
 +		/* With FPM, rtm_table contains vrf id, see netlink_route_multipath_msg_encode */
 +		if (tb[RTA_TABLE])
@@ -69,14 +69,14 @@ index 325199eff..587045eac 100644
 +		/* Map to table */
 +		table = table_lookup_by_vrf(vrf_id, ns_id);
 +	}
- 
+
 -	/* Map to VRF */
--	vrf_id = vrf_lookup_by_table(table, ns_id);
+-	vrf_id = zebra_vrf_lookup_by_table(table, ns_id);
  	if (vrf_id == VRF_DEFAULT) {
  		if (!is_zebra_valid_kernel_table(table)
  		    && !is_zebra_main_routing_table(table))
-@@ -2102,12 +2138,24 @@ ssize_t netlink_route_multipath_msg_encode(int cmd,
- 
+@@ -2283,13 +2320,25 @@ ssize_t netlink_route_multipath_msg_encode(int cmd, struct zebra_dplane_ctx *ctx
+
  	/* Table corresponding to this route. */
  	table_id = dplane_ctx_get_table(ctx);
 -	if (table_id < 256)
@@ -85,6 +85,7 @@ index 325199eff..587045eac 100644
 -		req->r.rtm_table = RT_TABLE_UNSPEC;
 -		if (!nl_attr_put32(&req->n, datalen, RTA_TABLE, table_id))
 -			return 0;
+-	}
 +	if (!fpm) {
 +		if (table_id < 256)
 +			req->r.rtm_table = table_id;
@@ -103,9 +104,7 @@ index 325199eff..587045eac 100644
 +			if (!nl_attr_put32(&req->n, datalen, RTA_TABLE, vrf))
 +				return 0;
 +		}
- 	}
- 
- 	if (IS_ZEBRA_DEBUG_KERNEL)
--- 
-2.17.1
++	}
 
+ 	if (IS_ZEBRA_DEBUG_KERNEL)
+ 		zlog_debug(
diff --git a/src/sonic-frr/patch/0009-bgpd-Ensure-suppress-fib-pending-works-with-network-.patch b/src/sonic-frr/patch/0009-bgpd-Ensure-suppress-fib-pending-works-with-network-.patch
deleted file mode 100644
index a276f9ba5b49..000000000000
--- a/src/sonic-frr/patch/0009-bgpd-Ensure-suppress-fib-pending-works-with-network-.patch
+++ /dev/null
@@ -1,132 +0,0 @@
-From c4a198c977168a6bd420197d19c8a4c0f4eacc8a Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Wed, 22 Mar 2023 11:35:28 -0400
-Subject: [PATCH] From 5a1d3c9e24791ebdb7e375a02afe9c5f6146c488 Mon Sep 17
- 00:00:00 2001 Subject: [PATCH] bgpd: Ensure suppress-fib-pending works with
- network  statements
-
-The flag for telling BGP that a route is expected to be installed
-first before notifying a peer was always being set upon receipt
-of a path that could be accepted as bestpath.  This is not correct:
-imagine that you have a peer sending you a route and you have a
-network statement that covers the same route.  Irrelevant if the
-network statement would win the flag on the dest was being set
-in bgp_update.  Thus you could get into a situation where
-the network statement path wins but since the flag is set on
-the node, it will never be announced to a peer.
-
-Let's just move the setting of the flag into bgp_zebra_announce
-and _withdraw.  In _announce set the flag to TRUE when suppress-fib
-is enabled.  In _withdraw just always unset the flag as that a withdrawal
-does not need to wait for rib removal before announcing.  This will
-cover the case when a network statement is added after the route has
-been learned from a peer.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-
-diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index f00c54c40..a7a5c9849 100644
---- a/bgpd/bgp_route.c
-+++ b/bgpd/bgp_route.c
-@@ -3203,11 +3203,6 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
- 			if (bgp_fibupd_safi(safi)
- 			    && !bgp_option_check(BGP_OPT_NO_FIB)) {
- 
--				if (BGP_SUPPRESS_FIB_ENABLED(bgp)
--				    && new_select->sub_type == BGP_ROUTE_NORMAL)
--					SET_FLAG(dest->flags,
--						 BGP_NODE_FIB_INSTALL_PENDING);
--
- 				if (new_select->type == ZEBRA_ROUTE_BGP
- 				    && (new_select->sub_type == BGP_ROUTE_NORMAL
- 					|| new_select->sub_type
-@@ -3313,10 +3308,6 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
- 			|| new_select->sub_type == BGP_ROUTE_AGGREGATE
- 			|| new_select->sub_type == BGP_ROUTE_IMPORTED)) {
- 
--			if (BGP_SUPPRESS_FIB_ENABLED(bgp))
--				SET_FLAG(dest->flags,
--					 BGP_NODE_FIB_INSTALL_PENDING);
--
- 			/* if this is an evpn imported type-5 prefix,
- 			 * we need to withdraw the route first to clear
- 			 * the nh neigh and the RMAC entry.
-@@ -4261,18 +4252,6 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id,
- 		bgp_attr_flush(&new_attr);
- 		goto filtered;
- 	}
--	/* The flag BGP_NODE_FIB_INSTALL_PENDING is for the following
--	 * condition :
--	 * Suppress fib is enabled
--	 * BGP_OPT_NO_FIB is not enabled
--	 * Route type is BGP_ROUTE_NORMAL (peer learnt routes)
--	 * Route is being installed first time (BGP_NODE_FIB_INSTALLED not set)
--	 */
--	if (bgp_fibupd_safi(safi) && BGP_SUPPRESS_FIB_ENABLED(bgp)
--	    && (sub_type == BGP_ROUTE_NORMAL)
--	    && (!bgp_option_check(BGP_OPT_NO_FIB))
--	    && (!CHECK_FLAG(dest->flags, BGP_NODE_FIB_INSTALLED)))
--		SET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING);
- 
- 	/* If neighbor soo is configured, tag all incoming routes with
- 	 * this SoO tag and then filter out advertisements in
-diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
-index 95e80ba1b..efcf49785 100644
---- a/bgpd/bgp_zebra.c
-+++ b/bgpd/bgp_zebra.c
-@@ -1322,6 +1322,14 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
- 	uint32_t bos = 0;
- 	uint32_t exp = 0;
- 
-+	/*
-+	 * BGP is installing this route and bgp has been configured
-+	 * to suppress announcements until the route has been installed
-+	 * let's set the fact that we expect this route to be installed
-+	 */
-+	if (BGP_SUPPRESS_FIB_ENABLED(bgp))
-+		SET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING);
-+
- 	/* Don't try to install if we're not connected to Zebra or Zebra doesn't
- 	 * know of this instance.
- 	 */
-@@ -1758,6 +1766,12 @@ void bgp_zebra_withdraw(const struct prefix *p, struct bgp_path_info *info,
- 	struct zapi_route api;
- 	struct peer *peer;
- 
-+	/*
-+	 * If we are withdrawing the route, we don't need to have this
-+	 * flag set.  So unset it.
-+	 */
-+	UNSET_FLAG(info->net->flags, BGP_NODE_FIB_INSTALL_PENDING);
-+
- 	/* Don't try to install if we're not connected to Zebra or Zebra doesn't
- 	 * know of this instance.
- 	 */
-diff --git a/tests/topotests/bgp_suppress_fib/test_bgp_suppress_fib.py b/tests/topotests/bgp_suppress_fib/test_bgp_suppress_fib.py
-index 6d2b65a61..7bcb28166 100644
---- a/tests/topotests/bgp_suppress_fib/test_bgp_suppress_fib.py
-+++ b/tests/topotests/bgp_suppress_fib/test_bgp_suppress_fib.py
-@@ -230,6 +230,20 @@ def test_bgp_allow_as_in():
-     assertmsg = '"r2" 192.168.1.1/32 route should be gone'
-     assert result is None, assertmsg
- 
-+def test_local_vs_non_local():
-+    tgen = get_topogen()
-+
-+    if tgen.routers_have_failure():
-+        pytest.skip(tgen.errors)
-+
-+    r2 = tgen.gears["r2"]
-+
-+    output = json.loads(r2.vtysh_cmd("show bgp ipv4 uni 60.0.0.0/24 json"))
-+    paths = output["paths"]
-+    for i in range(len(paths)):
-+        if "fibPending" in paths[i]:
-+            assert(False),  "Route 60.0.0.0/24 should not have fibPending"
-+
- 
- if __name__ == "__main__":
-     args = ["-s"] + sys.argv[1:]
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0010-bgpd-Change-log-level-for-graceful-restart-events.patch b/src/sonic-frr/patch/0010-bgpd-Change-log-level-for-graceful-restart-events.patch
index 54fcc1575a75..be4bbb6a8602 100644
--- a/src/sonic-frr/patch/0010-bgpd-Change-log-level-for-graceful-restart-events.patch
+++ b/src/sonic-frr/patch/0010-bgpd-Change-log-level-for-graceful-restart-events.patch
@@ -3,49 +3,43 @@ From: stormliang <stormliang@microsoft.com>
 Date: Mon, 19 Jun 2023 13:57:01 +0000
 Subject: [PATCH] From c423bce4db804c1d07d65ce3d06a9e62c4eceb2b Mon Sep 17
  00:00:00 2001 Subject: [PATCH] change log level for graceful restart events
-
-
 diff --git a/bgpd/bgp_fsm.c b/bgpd/bgp_fsm.c
-index 9624adfbe..74b4dfc4a 100644
+index 504343994..f58ab7c02 100644
 --- a/bgpd/bgp_fsm.c
 +++ b/bgpd/bgp_fsm.c
-@@ -778,10 +778,10 @@ static void bgp_graceful_restart_timer_expire(struct thread *thread)
- 
- 	peer = THREAD_ARG(thread);
- 
+@@ -739,9 +739,9 @@ static void bgp_graceful_restart_timer_expire(struct event *thread)
+ 	afi_t afi;
+ 	safi_t safi;
+
 -	if (bgp_debug_neighbor_events(peer)) {
 -		zlog_debug("%pBP graceful restart timer expired", peer);
 -		zlog_debug("%pBP graceful restart stalepath timer stopped",
--			   peer);
 +	if (peer) {
 +		zlog_info("%pBP graceful restart timer expired", peer);
 +		zlog_info("%pBP graceful restart stalepath timer stopped",
-+			  peer);
+ 			   peer);
  	}
- 
- 	FOREACH_AFI_SAFI (afi, safi) {
-@@ -842,8 +842,8 @@ static void bgp_graceful_stale_timer_expire(struct thread *thread)
- 
- 	peer = THREAD_ARG(thread);
- 
+
+@@ -801,8 +801,8 @@ static void bgp_graceful_stale_timer_expire(struct event *thread)
+ 	afi_t afi;
+ 	safi_t safi;
+
 -	if (bgp_debug_neighbor_events(peer))
 -		zlog_debug("%pBP graceful restart stalepath timer expired",
 +	if (peer)
 +		zlog_info("%pBP graceful restart stalepath timer expired",
  			   peer);
- 
+
  	/* NSF delete stale route */
-@@ -1412,20 +1412,17 @@ enum bgp_fsm_state_progress bgp_stop(struct peer *peer)
+@@ -1380,20 +1380,17 @@ enum bgp_fsm_state_progress bgp_stop(struct peer_connection *connection)
  		/* graceful restart */
- 		if (peer->t_gr_stale) {
- 			THREAD_OFF(peer->t_gr_stale);
+ 		if (connection->t_gr_stale) {
+ 			EVENT_OFF(connection->t_gr_stale);
 -			if (bgp_debug_neighbor_events(peer))
 -				zlog_debug(
--					"%pBP graceful restart stalepath timer stopped",
--					peer);
-+			zlog_info(
-+				"%pBP graceful restart stalepath timer stopped",
-+				peer);
++				zlog_info(
+ 					"%pBP graceful restart stalepath timer stopped",
+ 					peer);
  		}
  		if (CHECK_FLAG(peer->sflags, PEER_STATUS_NSF_WAIT)) {
 -			if (bgp_debug_neighbor_events(peer)) {
@@ -62,55 +56,46 @@ index 9624adfbe..74b4dfc4a 100644
 +			zlog_info(
 +				"%pBP graceful restart stalepath timer started for %d sec",
 +				peer, peer->bgp->stalepath_time);
- 			BGP_TIMER_ON(peer->t_gr_restart,
+ 			BGP_TIMER_ON(connection->t_gr_restart,
  				     bgp_graceful_restart_timer_expire,
  				     peer->v_gr_restart);
-@@ -2225,17 +2222,15 @@ static enum bgp_fsm_state_progress bgp_establish(struct peer *peer)
+@@ -2216,8 +2213,7 @@ bgp_establish(struct peer_connection *connection)
  		UNSET_FLAG(peer->sflags, PEER_STATUS_NSF_MODE);
- 		if (peer->t_gr_stale) {
- 			THREAD_OFF(peer->t_gr_stale);
+ 		if (connection->t_gr_stale) {
+ 			EVENT_OFF(connection->t_gr_stale);
 -			if (bgp_debug_neighbor_events(peer))
 -				zlog_debug(
--					"%pBP graceful restart stalepath timer stopped",
--					peer);
 +			zlog_info(
-+				"%pBP graceful restart stalepath timer stopped",
-+				peer);
+ 					"%pBP graceful restart stalepath timer stopped",
+ 					peer);
  		}
- 	}
- 
- 	if (peer->t_gr_restart) {
- 		THREAD_OFF(peer->t_gr_restart);
+@@ -2225,8 +2221,7 @@ bgp_establish(struct peer_connection *connection)
+
+ 	if (connection->t_gr_restart) {
+ 		EVENT_OFF(connection->t_gr_restart);
 -		if (bgp_debug_neighbor_events(peer))
 -			zlog_debug("%pBP graceful restart timer stopped", peer);
 +		zlog_info("%pBP graceful restart timer stopped", peer);
  	}
- 
+
  	/* Reset uptime, turn on keepalives, send current table. */
 diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
-index 8b3a1e3dd..2f3b837a5 100644
+index d6d874be2..337879a2d 100644
 --- a/bgpd/bgpd.c
 +++ b/bgpd/bgpd.c
-@@ -2453,15 +2453,13 @@ void peer_nsf_stop(struct peer *peer)
- 
- 	if (peer->t_gr_restart) {
- 		THREAD_OFF(peer->t_gr_restart);
+@@ -2629,13 +2629,11 @@ void peer_nsf_stop(struct peer *peer)
+
+ 	if (peer->connection->t_gr_restart) {
+ 		EVENT_OFF(peer->connection->t_gr_restart);
 -		if (bgp_debug_neighbor_events(peer))
 -			zlog_debug("%pBP graceful restart timer stopped", peer);
 +		zlog_info("%pBP graceful restart timer stopped", peer);
  	}
- 	if (peer->t_gr_stale) {
- 		THREAD_OFF(peer->t_gr_stale);
+ 	if (peer->connection->t_gr_stale) {
+ 		EVENT_OFF(peer->connection->t_gr_stale);
 -		if (bgp_debug_neighbor_events(peer))
 -			zlog_debug(
--				"%pBP graceful restart stalepath timer stopped",
--				peer);
 +		zlog_info(
-+			"%pBP graceful restart stalepath timer stopped",
-+			peer);
+ 				"%pBP graceful restart stalepath timer stopped",
+ 				peer);
  	}
- 	bgp_clear_route_all(peer);
- }
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0011-zebra-Static-routes-async-notification-do-not-need-t.patch b/src/sonic-frr/patch/0011-zebra-Static-routes-async-notification-do-not-need-t.patch
deleted file mode 100644
index 6b633badf97b..000000000000
--- a/src/sonic-frr/patch/0011-zebra-Static-routes-async-notification-do-not-need-t.patch
+++ /dev/null
@@ -1,99 +0,0 @@
-From 56d349ef47ba24bcf838488b1e40474755655259 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Thu, 29 Jun 2023 09:35:00 -0400
-Subject: [PATCH] zebra: Static routes async notification do not need this test
-
-When using asic_offload with an asynchronous notification the
-rib_route_match_ctx function is testing for distance and tag
-being correct against the re.
-
-Normal route notification for static routes is this(well really all routes):
-a) zebra dplane generates a ctx to send to the dplane for route install
-b) dplane installs it in the kernel
-c) if the dplane_fpm_nl.c module is being used it installs it.
-d) The context's success code is set to it worked and passes the context
-back up to zebra for processing.
-e) Zebra master receives this and checks the distance and tag are correct
-for static routes and accepts the route and marks it installed.
-
-If the operator is using a wait for install mechansim where the dplane
-is asynchronously sending the result back up at a future time *and*
-it is using the dplane_fpm_nl.c code where it uses the rt_netlink.c
-route parsing code, then there is no way to set distance as that we
-do not pass distance to the kernel.
-
-As such static routes were never being properly handled since the re and
-context would not match and the route would still be marked as queued.
-
-Modify the code such that the asynchronous path notification for static
-routes ignores the distance and tag's as that there is no way to test
-for this data from that path at this point in time.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-
-diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c
-index fd6df441c6..039c44cc09 100644
---- a/zebra/zebra_rib.c
-+++ b/zebra/zebra_rib.c
-@@ -1465,7 +1465,7 @@ static void zebra_rib_evaluate_mpls(struct route_node *rn)
-  */
- static bool rib_route_match_ctx(const struct route_entry *re,
- 				const struct zebra_dplane_ctx *ctx,
--				bool is_update)
-+				bool is_update, bool async)
- {
- 	bool result = false;
- 
-@@ -1481,13 +1481,12 @@ static bool rib_route_match_ctx(const struct route_entry *re,
- 			/* We use an extra test for statics, and another for
- 			 * kernel routes.
- 			 */
--			if (re->type == ZEBRA_ROUTE_STATIC &&
-+			if (re->type == ZEBRA_ROUTE_STATIC && !async &&
- 			    (re->distance != dplane_ctx_get_old_distance(ctx) ||
- 			     re->tag != dplane_ctx_get_old_tag(ctx))) {
- 				result = false;
- 			} else if (re->type == ZEBRA_ROUTE_KERNEL &&
--				   re->metric !=
--				   dplane_ctx_get_old_metric(ctx)) {
-+				   re->metric != dplane_ctx_get_old_metric(ctx)) {
- 				result = false;
- 			}
- 		}
-@@ -1509,7 +1508,7 @@ static bool rib_route_match_ctx(const struct route_entry *re,
- 			/* We use an extra test for statics, and another for
- 			 * kernel routes.
- 			 */
--			if (re->type == ZEBRA_ROUTE_STATIC &&
-+			if (re->type == ZEBRA_ROUTE_STATIC && !async &&
- 			    (re->distance != dplane_ctx_get_distance(ctx) ||
- 			     re->tag != dplane_ctx_get_tag(ctx))) {
- 				result = false;
-@@ -1973,13 +1972,13 @@ static void rib_process_result(struct zebra_dplane_ctx *ctx)
- 	RNODE_FOREACH_RE(rn, rib) {
- 
- 		if (re == NULL) {
--			if (rib_route_match_ctx(rib, ctx, false))
-+			if (rib_route_match_ctx(rib, ctx, false, false))
- 				re = rib;
- 		}
- 
- 		/* Check for old route match */
- 		if (is_update && (old_re == NULL)) {
--			if (rib_route_match_ctx(rib, ctx, true /*is_update*/))
-+			if (rib_route_match_ctx(rib, ctx, true, false))
- 				old_re = rib;
- 		}
- 
-@@ -2247,7 +2246,7 @@ static void rib_process_dplane_notify(struct zebra_dplane_ctx *ctx)
- 	 * info.
- 	 */
- 	RNODE_FOREACH_RE(rn, re) {
--		if (rib_route_match_ctx(re, ctx, false /*!update*/))
-+		if (rib_route_match_ctx(re, ctx, false, true))
- 			break;
- 	}
- 
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0012-zebra-Rename-vrf_lookup_by_tableid-to-zebra_vrf_look.patch b/src/sonic-frr/patch/0012-zebra-Rename-vrf_lookup_by_tableid-to-zebra_vrf_look.patch
deleted file mode 100644
index ca6517fbf655..000000000000
--- a/src/sonic-frr/patch/0012-zebra-Rename-vrf_lookup_by_tableid-to-zebra_vrf_look.patch
+++ /dev/null
@@ -1,147 +0,0 @@
-From 2b9c7592a9857ddccc77b9d3f178e0c5bd5f19ed Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Wed, 26 Apr 2023 23:25:27 -0400
-Subject: [PATCH] zebra: Rename vrf_lookup_by_tableid to zebra_vrf_lookup..
-
-Rename the vrf_lookup_by_id function to zebra_vrf_lookup_by_id
-and move to zebra_vrf.c where it nominally belongs, as that
-we need zebra specific data to find this vrf_id and as such
-it does not belong in vrf.c
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-
-diff --git a/zebra/if_netlink.c b/zebra/if_netlink.c
-index 81347b550a..4599121261 100644
---- a/zebra/if_netlink.c
-+++ b/zebra/if_netlink.c
-@@ -342,7 +342,8 @@ static void netlink_vrf_change(struct nlmsghdr *h, struct rtattr *tb,
- 		if (!vrf_lookup_by_id((vrf_id_t)ifi->ifi_index)) {
- 			vrf_id_t exist_id;
- 
--			exist_id = vrf_lookup_by_table(nl_table_id, ns_id);
-+			exist_id =
-+				zebra_vrf_lookup_by_table(nl_table_id, ns_id);
- 			if (exist_id != VRF_DEFAULT) {
- 				vrf = vrf_lookup_by_id(exist_id);
- 
-diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c
-index 587045eac2..6b9b047858 100644
---- a/zebra/rt_netlink.c
-+++ b/zebra/rt_netlink.c
-@@ -379,33 +379,6 @@ static inline int proto2zebra(int proto, int family, bool is_nexthop)
- 	return proto;
- }
- 
--/*
--Pending: create an efficient table_id (in a tree/hash) based lookup)
-- */
--vrf_id_t vrf_lookup_by_table(uint32_t table_id, ns_id_t ns_id)
--{
--	struct vrf *vrf;
--	struct zebra_vrf *zvrf;
--
--	RB_FOREACH (vrf, vrf_id_head, &vrfs_by_id) {
--		zvrf = vrf->info;
--		if (zvrf == NULL)
--			continue;
--		/* case vrf with netns : match the netnsid */
--		if (vrf_is_backend_netns()) {
--			if (ns_id == zvrf_id(zvrf))
--				return zvrf_id(zvrf);
--		} else {
--			/* VRF is VRF_BACKEND_VRF_LITE */
--			if (zvrf->table_id != table_id)
--				continue;
--			return zvrf_id(zvrf);
--		}
--	}
--
--	return VRF_DEFAULT;
--}
--
- static uint32_t table_lookup_by_vrf(vrf_id_t vrf_id, ns_id_t ns_id)
- {
- 	struct vrf *vrf;
-@@ -814,7 +787,7 @@ int netlink_route_change_read_unicast_internal(struct nlmsghdr *h,
- 			table = rtm->rtm_table;
- 
- 		/* Map to VRF */
--		vrf_id = vrf_lookup_by_table(table, ns_id);
-+		vrf_id = zebra_vrf_lookup_by_table(table, ns_id);
- 	} else {
- 		/* With FPM, rtm_table contains vrf id, see netlink_route_multipath_msg_encode */
- 		if (tb[RTA_TABLE])
-@@ -1114,7 +1087,7 @@ static int netlink_route_change_read_multicast(struct nlmsghdr *h,
- 	else
- 		table = rtm->rtm_table;
- 
--	vrf = vrf_lookup_by_table(table, ns_id);
-+	vrf = zebra_vrf_lookup_by_table(table, ns_id);
- 
- 	if (tb[RTA_IIF])
- 		iif = *(int *)RTA_DATA(tb[RTA_IIF]);
-diff --git a/zebra/rt_netlink.h b/zebra/rt_netlink.h
-index 8506367ae4..364aac0f6b 100644
---- a/zebra/rt_netlink.h
-+++ b/zebra/rt_netlink.h
-@@ -102,7 +102,6 @@ extern int netlink_macfdb_read_specific_mac(struct zebra_ns *zns,
- 					    uint16_t vid);
- extern int netlink_neigh_read_specific_ip(const struct ipaddr *ip,
- 					  struct interface *vlan_if);
--extern vrf_id_t vrf_lookup_by_table(uint32_t table_id, ns_id_t ns_id);
- 
- struct nl_batch;
- extern enum netlink_msg_status
-diff --git a/zebra/zebra_vrf.c b/zebra/zebra_vrf.c
-index be5e91495f..c59cb7c0a7 100644
---- a/zebra/zebra_vrf.c
-+++ b/zebra/zebra_vrf.c
-@@ -389,6 +389,33 @@ struct zebra_vrf *zebra_vrf_alloc(struct vrf *vrf)
- 	return zvrf;
- }
- 
-+/*
-+Pending: create an efficient table_id (in a tree/hash) based lookup)
-+ */
-+vrf_id_t zebra_vrf_lookup_by_table(uint32_t table_id, ns_id_t ns_id)
-+{
-+	struct vrf *vrf;
-+	struct zebra_vrf *zvrf;
-+
-+	RB_FOREACH (vrf, vrf_id_head, &vrfs_by_id) {
-+		zvrf = vrf->info;
-+		if (zvrf == NULL)
-+			continue;
-+		/* case vrf with netns : match the netnsid */
-+		if (vrf_is_backend_netns()) {
-+			if (ns_id == zvrf_id(zvrf))
-+				return zvrf_id(zvrf);
-+		} else {
-+			/* VRF is VRF_BACKEND_VRF_LITE */
-+			if (zvrf->table_id != table_id)
-+				continue;
-+			return zvrf_id(zvrf);
-+		}
-+	}
-+
-+	return VRF_DEFAULT;
-+}
-+
- /* Lookup VRF by identifier.  */
- struct zebra_vrf *zebra_vrf_lookup_by_id(vrf_id_t vrf_id)
- {
-diff --git a/zebra/zebra_vrf.h b/zebra/zebra_vrf.h
-index 02e3c197c9..937e7fb144 100644
---- a/zebra/zebra_vrf.h
-+++ b/zebra/zebra_vrf.h
-@@ -252,6 +252,7 @@ extern struct route_table *zebra_vrf_get_table_with_table_id(afi_t afi,
- extern void zebra_vrf_update_all(struct zserv *client);
- extern struct zebra_vrf *zebra_vrf_lookup_by_id(vrf_id_t vrf_id);
- extern struct zebra_vrf *zebra_vrf_lookup_by_name(const char *);
-+extern vrf_id_t zebra_vrf_lookup_by_table(uint32_t table_id, ns_id_t ns_id);
- extern struct zebra_vrf *zebra_vrf_alloc(struct vrf *vrf);
- extern struct route_table *zebra_vrf_table(afi_t, safi_t, vrf_id_t);
- 
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0013-zebra-Move-protodown_r_bit-to-a-better-spot.patch b/src/sonic-frr/patch/0013-zebra-Move-protodown_r_bit-to-a-better-spot.patch
deleted file mode 100644
index cd88419fcbd6..000000000000
--- a/src/sonic-frr/patch/0013-zebra-Move-protodown_r_bit-to-a-better-spot.patch
+++ /dev/null
@@ -1,181 +0,0 @@
-From c43808ca6daa59d533e14790ffc7f2e11b508924 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Thu, 27 Apr 2023 07:37:58 -0400
-Subject: [PATCH] zebra: Move protodown_r_bit to a better spot
-
-Since we are moving some code handling out of the dataplane
-and into zebra proper, lets move the protodown r bit as well.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-
-diff --git a/zebra/if_netlink.c b/zebra/if_netlink.c
-index 4599121261..95889e22fd 100644
---- a/zebra/if_netlink.c
-+++ b/zebra/if_netlink.c
-@@ -78,7 +78,6 @@
- #include "zebra/zebra_trace.h"
- 
- extern struct zebra_privs_t zserv_privs;
--uint8_t frr_protodown_r_bit = FRR_PROTODOWN_REASON_DEFAULT_BIT;
- 
- /* Note: on netlink systems, there should be a 1-to-1 mapping between interface
-    names and ifindex values. */
-@@ -819,9 +818,7 @@ static int netlink_bridge_interface(struct nlmsghdr *h, int len, ns_id_t ns_id,
- 
- static bool is_if_protodown_reason_only_frr(uint32_t rc_bitfield)
- {
--	/* This shouldn't be possible */
--	assert(frr_protodown_r_bit < 32);
--	return (rc_bitfield == (((uint32_t)1) << frr_protodown_r_bit));
-+	return (rc_bitfield == (((uint32_t)1) << if_netlink_get_frr_protodown_r_bit()));
- }
- 
- /*
-@@ -2247,9 +2244,10 @@ ssize_t netlink_intf_msg_encode(uint16_t cmd,
- 		return -1;
- 
- 	nl_attr_put32(&req->n, buflen, IFLA_PROTO_DOWN_REASON_MASK,
--		      (1 << frr_protodown_r_bit));
-+		      (1 << if_netlink_get_frr_protodown_r_bit()));
- 	nl_attr_put32(&req->n, buflen, IFLA_PROTO_DOWN_REASON_VALUE,
--		      ((int)pd_reason_val) << frr_protodown_r_bit);
-+		      ((int)pd_reason_val)
-+			      << if_netlink_get_frr_protodown_r_bit());
- 
- 	nl_attr_nest_end(&req->n, nest_protodown_reason);
- 
-@@ -2274,37 +2272,6 @@ void interface_list(struct zebra_ns *zns)
- 	interface_addr_lookup_netlink(zns);
- }
- 
--void if_netlink_set_frr_protodown_r_bit(uint8_t bit)
--{
--	if (IS_ZEBRA_DEBUG_KERNEL)
--		zlog_debug(
--			"Protodown reason bit index changed: bit-index %u -> bit-index %u",
--			frr_protodown_r_bit, bit);
--
--	frr_protodown_r_bit = bit;
--}
--
--void if_netlink_unset_frr_protodown_r_bit(void)
--{
--	if (IS_ZEBRA_DEBUG_KERNEL)
--		zlog_debug(
--			"Protodown reason bit index changed: bit-index %u -> bit-index %u",
--			frr_protodown_r_bit, FRR_PROTODOWN_REASON_DEFAULT_BIT);
--
--	frr_protodown_r_bit = FRR_PROTODOWN_REASON_DEFAULT_BIT;
--}
--
--
--bool if_netlink_frr_protodown_r_bit_is_set(void)
--{
--	return (frr_protodown_r_bit != FRR_PROTODOWN_REASON_DEFAULT_BIT);
--}
--
--uint8_t if_netlink_get_frr_protodown_r_bit(void)
--{
--	return frr_protodown_r_bit;
--}
--
- /**
-  * netlink_request_tunneldump() - Request all tunnels from the linux kernel
-  *
-diff --git a/zebra/if_netlink.h b/zebra/if_netlink.h
-index 21ae1713be..f5a170a609 100644
---- a/zebra/if_netlink.h
-+++ b/zebra/if_netlink.h
-@@ -54,17 +54,6 @@ extern int netlink_tunneldump_read(struct zebra_ns *zns);
- extern enum netlink_msg_status
- netlink_put_intf_update_msg(struct nl_batch *bth, struct zebra_dplane_ctx *ctx);
- 
--#define FRR_PROTODOWN_REASON_DEFAULT_BIT 7
--/* Protodown bit setter/getter
-- *
-- * Allow users to change the bit if it conflicts with another
-- * on their system.
-- */
--extern void if_netlink_set_frr_protodown_r_bit(uint8_t bit);
--extern void if_netlink_unset_frr_protodown_r_bit(void);
--extern bool if_netlink_frr_protodown_r_bit_is_set(void);
--extern uint8_t if_netlink_get_frr_protodown_r_bit(void);
--
- #ifdef __cplusplus
- }
- #endif
-diff --git a/zebra/zebra_router.c b/zebra/zebra_router.c
-index a9a7b66ce7..12689804ea 100644
---- a/zebra/zebra_router.c
-+++ b/zebra/zebra_router.c
-@@ -280,6 +280,8 @@ void zebra_router_init(bool asic_offload, bool notify_on_ack)
- {
- 	zrouter.sequence_num = 0;
- 
-+	zrouter.protodown_r_bit = FRR_PROTODOWN_REASON_DEFAULT_BIT;
-+
- 	zrouter.allow_delete = false;
- 
- 	zrouter.packets_to_process = ZEBRA_ZAPI_PACKETS_TO_PROCESS;
-diff --git a/zebra/zebra_router.h b/zebra/zebra_router.h
-index e0ef86f082..61bde4ac2a 100644
---- a/zebra/zebra_router.h
-+++ b/zebra/zebra_router.h
-@@ -244,6 +244,8 @@ struct zebra_router {
- 
- 	/* Should we allow non FRR processes to delete our routes */
- 	bool allow_delete;
-+
-+	uint8_t protodown_r_bit;
- };
- 
- #define GRACEFUL_RESTART_TIME 60
-@@ -302,6 +304,32 @@ static inline bool zebra_router_in_shutdown(void)
- 	return atomic_load_explicit(&zrouter.in_shutdown, memory_order_relaxed);
- }
- 
-+#define FRR_PROTODOWN_REASON_DEFAULT_BIT 7
-+/* Protodown bit setter/getter
-+ *
-+ * Allow users to change the bit if it conflicts with another
-+ * on their system.
-+ */
-+static inline void if_netlink_set_frr_protodown_r_bit(uint8_t bit)
-+{
-+	zrouter.protodown_r_bit = bit;
-+}
-+
-+static inline void if_netlink_unset_frr_protodown_r_bit(void)
-+{
-+	zrouter.protodown_r_bit = FRR_PROTODOWN_REASON_DEFAULT_BIT;
-+}
-+
-+static inline bool if_netlink_frr_protodown_r_bit_is_set(void)
-+{
-+	return (zrouter.protodown_r_bit != FRR_PROTODOWN_REASON_DEFAULT_BIT);
-+}
-+
-+static inline uint8_t if_netlink_get_frr_protodown_r_bit(void)
-+{
-+	return zrouter.protodown_r_bit;
-+}
-+
- /* zebra_northbound.c */
- extern const struct frr_yang_module_info frr_zebra_info;
- 
-diff --git a/zebra/zebra_vrf.c b/zebra/zebra_vrf.c
-index c59cb7c0a7..9c5b38b96b 100644
---- a/zebra/zebra_vrf.c
-+++ b/zebra/zebra_vrf.c
-@@ -390,7 +390,7 @@ struct zebra_vrf *zebra_vrf_alloc(struct vrf *vrf)
- }
- 
- /*
--Pending: create an efficient table_id (in a tree/hash) based lookup)
-+ * Pending: create an efficient table_id (in a tree/hash) based lookup)
-  */
- vrf_id_t zebra_vrf_lookup_by_table(uint32_t table_id, ns_id_t ns_id)
- {
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0014-zebra-Remove-unused-dplane_intf_delete.patch b/src/sonic-frr/patch/0014-zebra-Remove-unused-dplane_intf_delete.patch
deleted file mode 100644
index 756e0cf97419..000000000000
--- a/src/sonic-frr/patch/0014-zebra-Remove-unused-dplane_intf_delete.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 88f7441f56bf61008a52adda97525ffb20f9543d Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Fri, 14 Apr 2023 07:43:19 -0400
-Subject: [PATCH] zebra: Remove unused dplane_intf_delete
-
-There is no need for this functionality and it is
-not used.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-
-diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c
-index 4927af5625..a6c08f7371 100644
---- a/zebra/zebra_dplane.c
-+++ b/zebra/zebra_dplane.c
-@@ -4648,18 +4648,6 @@ enum zebra_dplane_result dplane_intf_update(const struct interface *ifp)
- 	return ret;
- }
- 
--/*
-- * Enqueue a interface delete for the dataplane.
-- */
--enum zebra_dplane_result dplane_intf_delete(const struct interface *ifp)
--{
--	enum zebra_dplane_result ret = ZEBRA_DPLANE_REQUEST_FAILURE;
--
--	if (ifp)
--		ret = dplane_intf_update_internal(ifp, DPLANE_OP_INTF_DELETE);
--	return ret;
--}
--
- /*
-  * Enqueue vxlan/evpn mac add (or update).
-  */
-diff --git a/zebra/zebra_dplane.h b/zebra/zebra_dplane.h
-index ae13243a16..9ef0afd3a8 100644
---- a/zebra/zebra_dplane.h
-+++ b/zebra/zebra_dplane.h
-@@ -758,7 +758,6 @@ enum zebra_dplane_result dplane_intf_addr_unset(const struct interface *ifp,
-  */
- enum zebra_dplane_result dplane_intf_add(const struct interface *ifp);
- enum zebra_dplane_result dplane_intf_update(const struct interface *ifp);
--enum zebra_dplane_result dplane_intf_delete(const struct interface *ifp);
- 
- /*
-  * Enqueue tc link changes for the dataplane.
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0015-zebra-Remove-unused-add-variable.patch b/src/sonic-frr/patch/0015-zebra-Remove-unused-add-variable.patch
deleted file mode 100644
index dc263d3d94c0..000000000000
--- a/src/sonic-frr/patch/0015-zebra-Remove-unused-add-variable.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 4cc6c7af6f7c72ddf18ab562f4e2c2b25e32f1b5 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Sat, 15 Apr 2023 08:04:51 -0400
-Subject: [PATCH] zebra: Remove unused add variable
-
-Function was not using the add variable.  Remove it.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-
-diff --git a/zebra/if_netlink.c b/zebra/if_netlink.c
-index 95889e22fd..e54fb09022 100644
---- a/zebra/if_netlink.c
-+++ b/zebra/if_netlink.c
-@@ -670,7 +670,7 @@ static void netlink_interface_update_l2info(struct interface *ifp,
- 		struct zebra_l2info_bridge bridge_info;
- 
- 		netlink_extract_bridge_info(link_data, &bridge_info);
--		zebra_l2_bridge_add_update(ifp, &bridge_info, add);
-+		zebra_l2_bridge_add_update(ifp, &bridge_info);
- 	} else if (IS_ZEBRA_IF_VLAN(ifp)) {
- 		struct zebra_l2info_vlan vlan_info;
- 
-diff --git a/zebra/zebra_l2.c b/zebra/zebra_l2.c
-index 8a9f3dffe3..07bbc6e3bc 100644
---- a/zebra/zebra_l2.c
-+++ b/zebra/zebra_l2.c
-@@ -258,8 +258,7 @@ void zebra_l2if_update_bond(struct interface *ifp, bool add)
-  * map slaves (if any) to the bridge.
-  */
- void zebra_l2_bridge_add_update(struct interface *ifp,
--				struct zebra_l2info_bridge *bridge_info,
--				int add)
-+				struct zebra_l2info_bridge *bridge_info)
- {
- 	struct zebra_if *zif;
- 
-diff --git a/zebra/zebra_l2.h b/zebra/zebra_l2.h
-index 1c3e98158d..8fef008f52 100644
---- a/zebra/zebra_l2.h
-+++ b/zebra/zebra_l2.h
-@@ -109,8 +109,7 @@ extern void zebra_l2_map_slave_to_bridge(struct zebra_l2info_brslave *br_slave,
- extern void
- zebra_l2_unmap_slave_from_bridge(struct zebra_l2info_brslave *br_slave);
- extern void zebra_l2_bridge_add_update(struct interface *ifp,
--				       struct zebra_l2info_bridge *bridge_info,
--				       int add);
-+				       struct zebra_l2info_bridge *bridge_info);
- extern void zebra_l2_bridge_del(struct interface *ifp);
- extern void zebra_l2_vlanif_update(struct interface *ifp,
- 				   struct zebra_l2info_vlan *vlan_info);
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0016-zebra-Remove-duplicate-function-for-netlink-interfac.patch b/src/sonic-frr/patch/0016-zebra-Remove-duplicate-function-for-netlink-interfac.patch
deleted file mode 100644
index 8f13d20f0052..000000000000
--- a/src/sonic-frr/patch/0016-zebra-Remove-duplicate-function-for-netlink-interfac.patch
+++ /dev/null
@@ -1,301 +0,0 @@
-From e12ffa6871d33712b03fc2ca28de278913e95bce Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Thu, 13 Apr 2023 16:43:27 -0400
-Subject: [PATCH] zebra: Remove duplicate function for netlink interface
- changes
-
-Turns out FRR has 2 functions one specifically for startup
-and one for normal day to day operations.  There were only
-a couple of minor differences from what I could tell, and
-where they were different the after startup functionality should
-have been updated too.  I cannot figure out why we have 2.
-
-Non-startup handling of bonds appears to be incorrect
-so let's fix that.  Additionally the speed was not
-properly being set in non-startup situations.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-
-diff --git a/zebra/if_netlink.c b/zebra/if_netlink.c
-index e54fb09022..ed5b3c4a66 100644
---- a/zebra/if_netlink.c
-+++ b/zebra/if_netlink.c
-@@ -938,178 +938,6 @@ static void if_sweep_protodown(struct zebra_if *zif)
- 	dplane_intf_update(zif->ifp);
- }
- 
--/*
-- * Called from interface_lookup_netlink().  This function is only used
-- * during bootstrap.
-- */
--static int netlink_interface(struct nlmsghdr *h, ns_id_t ns_id, int startup)
--{
--	int len;
--	struct ifinfomsg *ifi;
--	struct rtattr *tb[IFLA_MAX + 1];
--	struct rtattr *linkinfo[IFLA_MAX + 1];
--	struct interface *ifp;
--	char *name = NULL;
--	char *kind = NULL;
--	char *desc = NULL;
--	char *slave_kind = NULL;
--	struct zebra_ns *zns = NULL;
--	vrf_id_t vrf_id = VRF_DEFAULT;
--	enum zebra_iftype zif_type = ZEBRA_IF_OTHER;
--	enum zebra_slave_iftype zif_slave_type = ZEBRA_IF_SLAVE_NONE;
--	ifindex_t bridge_ifindex = IFINDEX_INTERNAL;
--	ifindex_t link_ifindex = IFINDEX_INTERNAL;
--	ifindex_t bond_ifindex = IFINDEX_INTERNAL;
--	struct zebra_if *zif;
--	ns_id_t link_nsid = ns_id;
--	uint8_t bypass = 0;
--
--	frrtrace(3, frr_zebra, netlink_interface, h, ns_id, startup);
--
--	zns = zebra_ns_lookup(ns_id);
--	ifi = NLMSG_DATA(h);
--
--	if (h->nlmsg_type != RTM_NEWLINK)
--		return 0;
--
--	len = h->nlmsg_len - NLMSG_LENGTH(sizeof(struct ifinfomsg));
--	if (len < 0) {
--		zlog_err(
--			"%s: Message received from netlink is of a broken size: %d %zu",
--			__func__, h->nlmsg_len,
--			(size_t)NLMSG_LENGTH(sizeof(struct ifinfomsg)));
--		return -1;
--	}
--
--	/* We are interested in some AF_BRIDGE notifications. */
--	if (ifi->ifi_family == AF_BRIDGE)
--		return netlink_bridge_interface(h, len, ns_id, startup);
--
--	/* Looking up interface name. */
--	memset(linkinfo, 0, sizeof(linkinfo));
--	netlink_parse_rtattr_flags(tb, IFLA_MAX, IFLA_RTA(ifi), len,
--				   NLA_F_NESTED);
--
--	/* check for wireless messages to ignore */
--	if ((tb[IFLA_WIRELESS] != NULL) && (ifi->ifi_change == 0)) {
--		if (IS_ZEBRA_DEBUG_KERNEL)
--			zlog_debug("%s: ignoring IFLA_WIRELESS message",
--				   __func__);
--		return 0;
--	}
--
--	if (tb[IFLA_IFNAME] == NULL)
--		return -1;
--	name = (char *)RTA_DATA(tb[IFLA_IFNAME]);
--
--	if (tb[IFLA_IFALIAS])
--		desc = (char *)RTA_DATA(tb[IFLA_IFALIAS]);
--
--	if (tb[IFLA_LINKINFO]) {
--		netlink_parse_rtattr_nested(linkinfo, IFLA_INFO_MAX,
--					    tb[IFLA_LINKINFO]);
--
--		if (linkinfo[IFLA_INFO_KIND])
--			kind = RTA_DATA(linkinfo[IFLA_INFO_KIND]);
--
--		if (linkinfo[IFLA_INFO_SLAVE_KIND])
--			slave_kind = RTA_DATA(linkinfo[IFLA_INFO_SLAVE_KIND]);
--
--		if ((slave_kind != NULL) && strcmp(slave_kind, "bond") == 0)
--			netlink_determine_zebra_iftype("bond_slave", &zif_type);
--		else
--			netlink_determine_zebra_iftype(kind, &zif_type);
--	}
--
--	/* If VRF, create the VRF structure itself. */
--	if (zif_type == ZEBRA_IF_VRF && !vrf_is_backend_netns()) {
--		netlink_vrf_change(h, tb[IFLA_LINKINFO], ns_id, name);
--		vrf_id = (vrf_id_t)ifi->ifi_index;
--	}
--
--	if (tb[IFLA_MASTER]) {
--		if (slave_kind && (strcmp(slave_kind, "vrf") == 0)
--		    && !vrf_is_backend_netns()) {
--			zif_slave_type = ZEBRA_IF_SLAVE_VRF;
--			vrf_id = *(uint32_t *)RTA_DATA(tb[IFLA_MASTER]);
--		} else if (slave_kind && (strcmp(slave_kind, "bridge") == 0)) {
--			zif_slave_type = ZEBRA_IF_SLAVE_BRIDGE;
--			bridge_ifindex =
--				*(ifindex_t *)RTA_DATA(tb[IFLA_MASTER]);
--		} else if (slave_kind && (strcmp(slave_kind, "bond") == 0)) {
--			zif_slave_type = ZEBRA_IF_SLAVE_BOND;
--			bond_ifindex = *(ifindex_t *)RTA_DATA(tb[IFLA_MASTER]);
--			bypass = netlink_parse_lacp_bypass(linkinfo);
--		} else
--			zif_slave_type = ZEBRA_IF_SLAVE_OTHER;
--	}
--	if (vrf_is_backend_netns())
--		vrf_id = (vrf_id_t)ns_id;
--
--	/* If linking to another interface, note it. */
--	if (tb[IFLA_LINK])
--		link_ifindex = *(ifindex_t *)RTA_DATA(tb[IFLA_LINK]);
--
--	if (tb[IFLA_LINK_NETNSID]) {
--		link_nsid = *(ns_id_t *)RTA_DATA(tb[IFLA_LINK_NETNSID]);
--		link_nsid = ns_id_get_absolute(ns_id, link_nsid);
--	}
--
--	ifp = if_get_by_name(name, vrf_id, NULL);
--	set_ifindex(ifp, ifi->ifi_index, zns); /* add it to ns struct */
--
--	ifp->flags = ifi->ifi_flags & 0x0000fffff;
--	ifp->mtu6 = ifp->mtu = *(uint32_t *)RTA_DATA(tb[IFLA_MTU]);
--	ifp->metric = 0;
--	ifp->speed = get_iflink_speed(ifp, NULL);
--	ifp->ptm_status = ZEBRA_PTM_STATUS_UNKNOWN;
--
--	/* Set zebra interface type */
--	zebra_if_set_ziftype(ifp, zif_type, zif_slave_type);
--	if (IS_ZEBRA_IF_VRF(ifp))
--		SET_FLAG(ifp->status, ZEBRA_INTERFACE_VRF_LOOPBACK);
--
--	/*
--	 * Just set the @link/lower-device ifindex. During nldump interfaces are
--	 * not ordered in any fashion so we may end up getting upper devices
--	 * before lower devices. We will setup the real linkage once the dump
--	 * is complete.
--	 */
--	zif = (struct zebra_if *)ifp->info;
--	zif->link_ifindex = link_ifindex;
--
--	if (desc) {
--		XFREE(MTYPE_ZIF_DESC, zif->desc);
--		zif->desc = XSTRDUP(MTYPE_ZIF_DESC, desc);
--	}
--
--	/* Hardware type and address. */
--	ifp->ll_type = netlink_to_zebra_link_type(ifi->ifi_type);
--
--	netlink_interface_update_hw_addr(tb, ifp);
--
--	if_add_update(ifp);
--
--	/* Extract and save L2 interface information, take additional actions.
--	 */
--	netlink_interface_update_l2info(ifp, linkinfo[IFLA_INFO_DATA],
--					1, link_nsid);
--	if (IS_ZEBRA_IF_BOND(ifp))
--		zebra_l2if_update_bond(ifp, true);
--	if (IS_ZEBRA_IF_BRIDGE_SLAVE(ifp))
--		zebra_l2if_update_bridge_slave(ifp, bridge_ifindex, ns_id,
--					       ZEBRA_BRIDGE_NO_ACTION);
--	else if (IS_ZEBRA_IF_BOND_SLAVE(ifp))
--		zebra_l2if_update_bond_slave(ifp, bond_ifindex, !!bypass);
--
--	if (tb[IFLA_PROTO_DOWN]) {
--		netlink_proc_dplane_if_protodown(zif, tb);
--		if_sweep_protodown(zif);
--	}
--
--	return 0;
--}
--
- /* Request for specific interface or address information from the kernel */
- static int netlink_request_intf_addr(struct nlsock *netlink_cmd, int family,
- 				     int type, uint32_t filter_mask)
-@@ -1165,7 +993,7 @@ int interface_lookup_netlink(struct zebra_ns *zns)
- 	ret = netlink_request_intf_addr(netlink_cmd, AF_PACKET, RTM_GETLINK, 0);
- 	if (ret < 0)
- 		return ret;
--	ret = netlink_parse_info(netlink_interface, netlink_cmd, &dp_info, 0,
-+	ret = netlink_parse_info(netlink_link_change, netlink_cmd, &dp_info, 0,
- 				 true);
- 	if (ret < 0)
- 		return ret;
-@@ -1175,7 +1003,7 @@ int interface_lookup_netlink(struct zebra_ns *zns)
- 					RTEXT_FILTER_BRVLAN);
- 	if (ret < 0)
- 		return ret;
--	ret = netlink_parse_info(netlink_interface, netlink_cmd, &dp_info, 0,
-+	ret = netlink_parse_info(netlink_link_change, netlink_cmd, &dp_info, 0,
- 				 true);
- 	if (ret < 0)
- 		return ret;
-@@ -1816,6 +1644,8 @@ int netlink_link_change(struct nlmsghdr *h, ns_id_t ns_id, int startup)
- 	ifindex_t master_infindex = IFINDEX_INTERNAL;
- 	uint8_t bypass = 0;
- 
-+	frrtrace(3, frr_zebra, netlink_interface, h, ns_id, startup);
-+
- 	zns = zebra_ns_lookup(ns_id);
- 	ifi = NLMSG_DATA(h);
- 
-@@ -1884,7 +1714,10 @@ int netlink_link_change(struct nlmsghdr *h, ns_id_t ns_id, int startup)
- 		if (linkinfo[IFLA_INFO_SLAVE_KIND])
- 			slave_kind = RTA_DATA(linkinfo[IFLA_INFO_SLAVE_KIND]);
- 
--		netlink_determine_zebra_iftype(kind, &zif_type);
-+		if ((slave_kind != NULL) && strcmp(slave_kind, "bond") == 0)
-+			netlink_determine_zebra_iftype("bond_slave", &zif_type);
-+		else
-+			netlink_determine_zebra_iftype(kind, &zif_type);
- 	}
- 
- 	/* If linking to another interface, note it. */
-@@ -1961,6 +1794,7 @@ int netlink_link_change(struct nlmsghdr *h, ns_id_t ns_id, int startup)
- 			}
- 			ifp->mtu6 = ifp->mtu = *(int *)RTA_DATA(tb[IFLA_MTU]);
- 			ifp->metric = 0;
-+			ifp->speed = get_iflink_speed(ifp, NULL);
- 			ifp->ptm_status = ZEBRA_PTM_STATUS_UNKNOWN;
- 
- 			/* Set interface type */
-@@ -1972,6 +1806,16 @@ int netlink_link_change(struct nlmsghdr *h, ns_id_t ns_id, int startup)
- 			/* Update link. */
- 			zebra_if_update_link(ifp, link_ifindex, link_nsid);
- 
-+			/*
-+			 * Just set the @link/lower-device ifindex. During
-+			 * nldump interfaces are not ordered in any fashion so
-+			 * we may end up getting upper devices before lower
-+			 * devices. We will setup the real linkage once the dump
-+			 * is complete.
-+			 */
-+			zif = (struct zebra_if *)ifp->info;
-+			zif->link_ifindex = link_ifindex;
-+
- 			ifp->ll_type =
- 				netlink_to_zebra_link_type(ifi->ifi_type);
- 			netlink_interface_update_hw_addr(tb, ifp);
-@@ -1984,6 +1828,8 @@ int netlink_link_change(struct nlmsghdr *h, ns_id_t ns_id, int startup)
- 			netlink_interface_update_l2info(
- 				ifp, linkinfo[IFLA_INFO_DATA],
- 				1, link_nsid);
-+			if (IS_ZEBRA_IF_BOND(ifp))
-+				zebra_l2if_update_bond(ifp, true);
- 			if (IS_ZEBRA_IF_BRIDGE_SLAVE(ifp))
- 				zebra_l2if_update_bridge_slave(
- 					ifp, bridge_ifindex, ns_id,
-@@ -1992,10 +1838,12 @@ int netlink_link_change(struct nlmsghdr *h, ns_id_t ns_id, int startup)
- 				zebra_l2if_update_bond_slave(ifp, bond_ifindex,
- 							     !!bypass);
- 
--			if (tb[IFLA_PROTO_DOWN])
-+			if (tb[IFLA_PROTO_DOWN]) {
- 				netlink_proc_dplane_if_protodown(ifp->info, tb);
-+				if (startup)
-+					if_sweep_protodown(zif);
-+			}
- 			if (IS_ZEBRA_IF_BRIDGE(ifp)) {
--				zif = ifp->info;
- 				if (IS_ZEBRA_DEBUG_KERNEL)
- 					zlog_debug(
- 						"RTM_NEWLINK ADD for %s(%u), vlan-aware %d",
-@@ -2329,7 +2177,7 @@ int netlink_tunneldump_read(struct zebra_ns *zns)
- 		if (ret < 0)
- 			return ret;
- 
--		ret = netlink_parse_info(netlink_interface, netlink_cmd,
-+		ret = netlink_parse_info(netlink_link_change, netlink_cmd,
- 					 &dp_info, 0, true);
- 
- 		if (ret < 0)
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0017-zebra-Add-code-to-get-set-interface-to-pass-up-from-.patch b/src/sonic-frr/patch/0017-zebra-Add-code-to-get-set-interface-to-pass-up-from-.patch
deleted file mode 100644
index c46c29737a0e..000000000000
--- a/src/sonic-frr/patch/0017-zebra-Add-code-to-get-set-interface-to-pass-up-from-.patch
+++ /dev/null
@@ -1,809 +0,0 @@
-From 1b576b080613cd545ecd742b6a16146ab781695f Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Thu, 20 Apr 2023 08:51:42 -0400
-Subject: [PATCH] zebra: Add code to get/set interface to pass up from dplane
-
-1) Add a bunch of get/set functions and associated data
-structure in zebra_dplane to allow the setting and retrieval
-of interface netlink data up into the master pthread.
-
-2) Add a bit of code to breakup startup into stages.  This is
-because FRR currently has a mix of dplane and non dplane interactions
-and the code needs to be paused before continuing on.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-
-diff --git a/zebra/dplane_fpm_nl.c b/zebra/dplane_fpm_nl.c
-index 804eb43a44..0d629fe0b9 100644
---- a/zebra/dplane_fpm_nl.c
-+++ b/zebra/dplane_fpm_nl.c
-@@ -955,6 +955,7 @@ static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx)
- 	case DPLANE_OP_TC_FILTER_DELETE:
- 	case DPLANE_OP_TC_FILTER_UPDATE:
- 	case DPLANE_OP_NONE:
-+	case DPLANE_OP_STARTUP_STAGE:
- 		break;
- 
- 	}
-diff --git a/zebra/interface.c b/zebra/interface.c
-index 84e52d4b43..a05b9690ef 100644
---- a/zebra/interface.c
-+++ b/zebra/interface.c
-@@ -1590,6 +1590,7 @@ void zebra_if_dplane_result(struct zebra_dplane_ctx *ctx)
- 	case DPLANE_OP_TC_FILTER_ADD:
- 	case DPLANE_OP_TC_FILTER_DELETE:
- 	case DPLANE_OP_TC_FILTER_UPDATE:
-+	case DPLANE_OP_STARTUP_STAGE:
- 		break; /* should never hit here */
- 	}
- }
-diff --git a/zebra/kernel_netlink.c b/zebra/kernel_netlink.c
-index 42afe61469..4cd84cada2 100644
---- a/zebra/kernel_netlink.c
-+++ b/zebra/kernel_netlink.c
-@@ -1632,6 +1632,7 @@ static enum netlink_msg_status nl_put_msg(struct nl_batch *bth,
- 	case DPLANE_OP_IPSET_DELETE:
- 	case DPLANE_OP_IPSET_ENTRY_ADD:
- 	case DPLANE_OP_IPSET_ENTRY_DELETE:
-+	case DPLANE_OP_STARTUP_STAGE:
- 		return FRR_NETLINK_ERROR;
- 
- 	case DPLANE_OP_GRE_SET:
-diff --git a/zebra/kernel_socket.c b/zebra/kernel_socket.c
-index 684ccc3ed5..f3462b9f22 100644
---- a/zebra/kernel_socket.c
-+++ b/zebra/kernel_socket.c
-@@ -1631,6 +1631,7 @@ void kernel_update_multi(struct dplane_ctx_list_head *ctx_list)
- 		case DPLANE_OP_GRE_SET:
- 		case DPLANE_OP_INTF_ADDR_ADD:
- 		case DPLANE_OP_INTF_ADDR_DEL:
-+		case DPLANE_OP_STARTUP_STAGE:
- 			zlog_err("Unhandled dplane data for %s",
- 				 dplane_op2str(dplane_ctx_get_op(ctx)));
- 			res = ZEBRA_DPLANE_REQUEST_FAILURE;
-diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c
-index a6c08f7371..0b33a5189c 100644
---- a/zebra/zebra_dplane.c
-+++ b/zebra/zebra_dplane.c
-@@ -193,10 +193,43 @@ struct dplane_br_port_info {
-  */
- struct dplane_intf_info {
- 
-+	enum zebra_iftype zif_type;
-+	ifindex_t bond_ifindex;
-+	ifindex_t link_ifindex;
-+	int32_t mtu;
-+	vrf_id_t vrf_id;
-+	enum zebra_slave_iftype zif_slave_type;
-+	ifindex_t master_ifindex;
-+	ifindex_t bridge_ifindex;
-+	ns_id_t link_nsid;
-+	enum zebra_slave_iftype zslave_type;
-+	uint8_t bypass;
-+	enum zebra_link_type zltype;
-+	bool startup;
-+	uint8_t family;
-+	struct zebra_vxlan_vni_array *vniarray;
-+	struct zebra_dplane_bridge_vlan_info bvinfo;
-+	struct zebra_dplane_bridge_vlan_info_array *bvarray;
-+
-+	char desc[128];
-+
-+	int32_t hw_addr_len;
-+	uint8_t hw_addr[INTERFACE_HWADDR_MAX];
-+
-+	uint32_t table_id;
-+
-+	struct zebra_l2info_bridge binfo;
-+	struct zebra_l2info_vlan vinfo;
-+	struct zebra_l2info_vxlan vxinfo;
-+	struct zebra_l2info_gre grinfo;
-+
-+	uint32_t rc_bitfield;
-+
- 	uint32_t metric;
- 	uint32_t flags;
- 
- 	bool protodown;
-+	bool protodown_set;
- 	bool pd_reason_val;
- 
- #define DPLANE_INTF_CONNECTED   (1 << 0) /* Connected peer, p2p */
-@@ -408,6 +441,7 @@ struct zebra_dplane_ctx {
- 		struct dplane_neigh_table neightable;
- 		struct dplane_gre_ctx gre;
- 		struct dplane_netconf_info netconf;
-+		enum zebra_dplane_startup_notifications spot;
- 	} u;
- 
- 	/* Namespace info, used especially for netlink kernel communication */
-@@ -820,8 +854,14 @@ static void dplane_ctx_free_internal(struct zebra_dplane_ctx *ctx)
- 	case DPLANE_OP_NONE:
- 	case DPLANE_OP_IPSET_ADD:
- 	case DPLANE_OP_IPSET_DELETE:
-+		break;
- 	case DPLANE_OP_INTF_INSTALL:
- 	case DPLANE_OP_INTF_UPDATE:
-+		if (ctx->u.intf.vniarray)
-+			XFREE(MTYPE_TMP, ctx->u.intf.vniarray);
-+		if (ctx->u.intf.bvarray)
-+			XFREE(MTYPE_TMP, ctx->u.intf.bvarray);
-+		break;
- 	case DPLANE_OP_INTF_DELETE:
- 	case DPLANE_OP_TC_QDISC_INSTALL:
- 	case DPLANE_OP_TC_QDISC_UNINSTALL:
-@@ -845,6 +885,7 @@ static void dplane_ctx_free_internal(struct zebra_dplane_ctx *ctx)
- 		break;
- 	case DPLANE_OP_GRE_SET:
- 	case DPLANE_OP_INTF_NETCONFIG:
-+	case DPLANE_OP_STARTUP_STAGE:
- 		break;
- 	}
- }
-@@ -1168,6 +1209,8 @@ const char *dplane_op2str(enum dplane_op_e op)
- 	case DPLANE_OP_TC_FILTER_UPDATE:
- 		ret = "TC__FILTER_UPDATE";
- 		break;
-+	case DPLANE_OP_STARTUP_STAGE:
-+		ret = "STARTUP_STAGE";
- 	}
- 
- 	return ret;
-@@ -1309,6 +1352,422 @@ const char *dplane_ctx_get_ifname(const struct zebra_dplane_ctx *ctx)
- 	return ctx->zd_ifname;
- }
- 
-+void dplane_ctx_set_ifp_bridge_vlan_info_array(
-+	struct zebra_dplane_ctx *ctx,
-+	struct zebra_dplane_bridge_vlan_info_array *bvarray)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.bvarray = bvarray;
-+}
-+
-+const struct zebra_dplane_bridge_vlan_info_array *
-+dplane_ctx_get_ifp_bridge_vlan_info_array(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.bvarray;
-+}
-+
-+void dplane_ctx_set_ifp_vxlan_vni_array(struct zebra_dplane_ctx *ctx,
-+					struct zebra_vxlan_vni_array *vniarray)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.vniarray = vniarray;
-+}
-+
-+const struct zebra_vxlan_vni_array *
-+dplane_ctx_get_ifp_vxlan_vni_array(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.vniarray;
-+}
-+
-+void dplane_ctx_set_ifp_bridge_vlan_info(
-+	struct zebra_dplane_ctx *ctx,
-+	struct zebra_dplane_bridge_vlan_info *bvinfo)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.bvinfo = *bvinfo;
-+}
-+
-+const struct zebra_dplane_bridge_vlan_info *
-+dplane_ctx_get_ifp_bridge_vlan_info(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return &ctx->u.intf.bvinfo;
-+}
-+
-+void dplane_ctx_set_ifp_family(struct zebra_dplane_ctx *ctx, uint8_t family)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.family = family;
-+}
-+
-+uint8_t dplane_ctx_get_ifp_family(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.family;
-+}
-+
-+void dplane_ctx_set_ifp_zltype(struct zebra_dplane_ctx *ctx,
-+			       enum zebra_link_type zltype)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.zltype = zltype;
-+}
-+
-+enum zebra_link_type
-+dplane_ctx_get_ifp_zltype(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.zltype;
-+}
-+
-+void dplane_ctx_set_ifp_link_ifindex(struct zebra_dplane_ctx *ctx,
-+				     ifindex_t link_ifindex)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.link_ifindex = link_ifindex;
-+}
-+
-+ifindex_t dplane_ctx_get_ifp_link_ifindex(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.link_ifindex;
-+}
-+
-+void dplane_ctx_set_ifp_desc(struct zebra_dplane_ctx *ctx, const char *desc)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	strlcpy(ctx->u.intf.desc, desc, sizeof(ctx->u.intf.desc));
-+}
-+
-+char *dplane_ctx_get_ifp_desc(struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.desc;
-+}
-+
-+void dplane_ctx_set_ifp_flags(struct zebra_dplane_ctx *ctx, uint64_t flags)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.flags = flags;
-+}
-+
-+uint64_t dplane_ctx_get_ifp_flags(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.flags;
-+}
-+
-+void dplane_ctx_set_ifp_bypass(struct zebra_dplane_ctx *ctx, uint8_t bypass)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.bypass = bypass;
-+}
-+
-+uint8_t dplane_ctx_get_ifp_bypass(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.bypass;
-+}
-+
-+void dplane_ctx_set_ifp_bridge_ifindex(struct zebra_dplane_ctx *ctx,
-+				       ifindex_t bridge_ifindex)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.bridge_ifindex = bridge_ifindex;
-+}
-+
-+ifindex_t dplane_ctx_get_ifp_bridge_ifindex(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.bridge_ifindex;
-+}
-+
-+void dplane_ctx_set_ifp_zif_slave_type(struct zebra_dplane_ctx *ctx,
-+				       enum zebra_slave_iftype zslave_type)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.zslave_type = zslave_type;
-+}
-+
-+enum zebra_slave_iftype
-+dplane_ctx_get_ifp_zif_slave_type(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.zslave_type;
-+}
-+
-+void dplane_ctx_set_ifp_master_ifindex(struct zebra_dplane_ctx *ctx,
-+				       ifindex_t master_ifindex)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.master_ifindex = master_ifindex;
-+}
-+
-+ifindex_t dplane_ctx_get_ifp_master_ifindex(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.master_ifindex;
-+}
-+
-+void dplane_ctx_set_ifp_mtu(struct zebra_dplane_ctx *ctx, uint32_t mtu)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.mtu = mtu;
-+}
-+
-+uint32_t dplane_ctx_get_ifp_mtu(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.mtu;
-+}
-+
-+void dplane_ctx_set_ifp_vrf_id(struct zebra_dplane_ctx *ctx, vrf_id_t vrf_id)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.vrf_id = vrf_id;
-+}
-+
-+vrf_id_t dplane_ctx_get_ifp_vrf_id(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.vrf_id;
-+}
-+
-+void dplane_ctx_set_ifp_link_nsid(struct zebra_dplane_ctx *ctx,
-+				  ns_id_t link_nsid)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.link_nsid = link_nsid;
-+}
-+
-+ns_id_t dplane_ctx_get_ifp_link_nsid(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.link_nsid;
-+}
-+
-+void dplane_ctx_set_ifp_startup(struct zebra_dplane_ctx *ctx, bool startup)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.startup = startup;
-+}
-+
-+bool dplane_ctx_get_ifp_startup(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.startup;
-+}
-+
-+void dplane_ctx_set_ifp_protodown_set(struct zebra_dplane_ctx *ctx, bool set)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.protodown_set = set;
-+}
-+
-+bool dplane_ctx_get_ifp_protodown_set(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.protodown_set;
-+}
-+
-+void dplane_ctx_set_ifp_protodown(struct zebra_dplane_ctx *ctx, bool protodown)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.protodown = protodown;
-+}
-+
-+bool dplane_ctx_get_ifp_protodown(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.protodown;
-+}
-+
-+ifindex_t dplane_ctx_get_ifp_bond_ifindex(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.bond_ifindex;
-+}
-+
-+void dplane_ctx_set_ifp_rc_bitfield(struct zebra_dplane_ctx *ctx,
-+				    uint32_t rc_bitfield)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.rc_bitfield = rc_bitfield;
-+}
-+
-+uint32_t dplane_ctx_get_ifp_rc_bitfield(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.rc_bitfield;
-+}
-+
-+void dplane_ctx_set_ifp_gre_info(struct zebra_dplane_ctx *ctx,
-+				 struct zebra_l2info_gre *grinfo)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.grinfo = *grinfo;
-+}
-+
-+const struct zebra_l2info_gre *
-+dplane_ctx_get_ifp_gre_info(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return &ctx->u.intf.grinfo;
-+}
-+
-+void dplane_ctx_set_ifp_vxlan_info(struct zebra_dplane_ctx *ctx,
-+				   struct zebra_l2info_vxlan *vxinfo)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.vxinfo = *vxinfo;
-+}
-+
-+const struct zebra_l2info_vxlan *
-+dplane_ctx_get_ifp_vxlan_info(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return &ctx->u.intf.vxinfo;
-+}
-+
-+void dplane_ctx_set_ifp_vlan_info(struct zebra_dplane_ctx *ctx,
-+				  struct zebra_l2info_vlan *vinfo)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.vinfo = *vinfo;
-+}
-+
-+const struct zebra_l2info_vlan *
-+dplane_ctx_get_ifp_vlan_info(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return &ctx->u.intf.vinfo;
-+}
-+
-+void dplane_ctx_set_ifp_bridge_info(struct zebra_dplane_ctx *ctx,
-+				    struct zebra_l2info_bridge *binfo)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.binfo = *binfo;
-+}
-+
-+const struct zebra_l2info_bridge *
-+dplane_ctx_get_ifp_bridge_info(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return &ctx->u.intf.binfo;
-+}
-+
-+void dplane_ctx_set_ifp_table_id(struct zebra_dplane_ctx *ctx,
-+				 uint32_t table_id)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.table_id = table_id;
-+}
-+
-+uint32_t dplane_ctx_get_ifp_table_id(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.table_id;
-+}
-+
-+void dplane_ctx_set_ifp_hw_addr(struct zebra_dplane_ctx *ctx,
-+				int32_t hw_addr_len, uint8_t *hw_addr)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.hw_addr_len = hw_addr_len;
-+	memcpy(ctx->u.intf.hw_addr, hw_addr, hw_addr_len);
-+}
-+
-+int32_t dplane_ctx_get_ifp_hw_addr_len(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.hw_addr_len;
-+}
-+
-+const uint8_t *dplane_ctx_get_ifp_hw_addr(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.hw_addr;
-+}
-+
-+void dplane_ctx_set_ifp_bond_ifindex(struct zebra_dplane_ctx *ctx,
-+				     ifindex_t bond_ifindex)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.bond_ifindex = bond_ifindex;
-+}
-+
-+enum zebra_iftype
-+dplane_ctx_get_ifp_zif_type(const struct zebra_dplane_ctx *ctx)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	return ctx->u.intf.zif_type;
-+}
-+
-+void dplane_ctx_set_ifp_zif_type(struct zebra_dplane_ctx *ctx,
-+				 enum zebra_iftype zif_type)
-+{
-+	DPLANE_CTX_VALID(ctx);
-+
-+	ctx->u.intf.zif_type = zif_type;
-+}
-+
- void dplane_ctx_set_ifname(struct zebra_dplane_ctx *ctx, const char *ifname)
- {
- 	DPLANE_CTX_VALID(ctx);
-@@ -6102,6 +6561,7 @@ static void kernel_dplane_log_detail(struct zebra_dplane_ctx *ctx)
- 	case DPLANE_OP_TC_FILTER_ADD:
- 	case DPLANE_OP_TC_FILTER_DELETE:
- 	case DPLANE_OP_TC_FILTER_UPDATE:
-+	case DPLANE_OP_STARTUP_STAGE:
- 		break;
- 	}
- }
-@@ -6274,6 +6734,7 @@ static void kernel_dplane_handle_result(struct zebra_dplane_ctx *ctx)
- 		break;
- 
- 	case DPLANE_OP_NONE:
-+	case DPLANE_OP_STARTUP_STAGE:
- 		if (res != ZEBRA_DPLANE_REQUEST_SUCCESS)
- 			atomic_fetch_add_explicit(&zdplane_info.dg_other_errors,
- 						  1, memory_order_relaxed);
-@@ -6966,6 +7427,25 @@ void zebra_dplane_start(void)
- 	frr_pthread_run(zdplane_info.dg_pthread, NULL);
- }
- 
-+enum zebra_dplane_startup_notifications
-+dplane_ctx_get_startup_spot(struct zebra_dplane_ctx *ctx)
-+{
-+	return ctx->u.spot;
-+}
-+
-+void zebra_dplane_startup_stage(struct zebra_ns *zns,
-+				enum zebra_dplane_startup_notifications spot)
-+{
-+	struct zebra_dplane_ctx *ctx = dplane_ctx_alloc();
-+
-+	ctx->zd_op = DPLANE_OP_STARTUP_STAGE;
-+	ctx->zd_status = ZEBRA_DPLANE_REQUEST_QUEUED;
-+
-+	ctx->u.spot = spot;
-+	dplane_ctx_set_ns_id(ctx, zns->ns_id);
-+
-+	dplane_provider_enqueue_to_zebra(ctx);
-+}
- /*
-  * Initialize the dataplane module at startup; called by zebra rib_init()
-  */
-diff --git a/zebra/zebra_dplane.h b/zebra/zebra_dplane.h
-index 9ef0afd3a8..c10482ed96 100644
---- a/zebra/zebra_dplane.h
-+++ b/zebra/zebra_dplane.h
-@@ -100,6 +100,11 @@ enum zebra_dplane_result {
- 	ZEBRA_DPLANE_REQUEST_FAILURE,
- };
- 
-+enum zebra_dplane_startup_notifications {
-+	ZEBRA_DPLANE_INTERFACES_READ,
-+	ZEBRA_DPLANE_TUNNELS_READ,
-+	ZEBRA_DPLANE_ADDRESSES_READ,
-+};
- /*
-  * API between the zebra dataplane system and the main zebra processing
-  * context.
-@@ -201,7 +206,10 @@ enum dplane_op_e {
- 	DPLANE_OP_TC_CLASS_UPDATE,
- 	DPLANE_OP_TC_FILTER_ADD,
- 	DPLANE_OP_TC_FILTER_DELETE,
--	DPLANE_OP_TC_FILTER_UPDATE
-+	DPLANE_OP_TC_FILTER_UPDATE,
-+
-+	/* Startup Control */
-+	DPLANE_OP_STARTUP_STAGE,
- };
- 
- /*
-@@ -336,6 +344,105 @@ const char *dplane_ctx_get_ifname(const struct zebra_dplane_ctx *ctx);
- void dplane_ctx_set_ifname(struct zebra_dplane_ctx *ctx, const char *ifname);
- ifindex_t dplane_ctx_get_ifindex(const struct zebra_dplane_ctx *ctx);
- void dplane_ctx_set_ifindex(struct zebra_dplane_ctx *ctx, ifindex_t ifindex);
-+void dplane_ctx_set_ifp_bond_ifindex(struct zebra_dplane_ctx *ctx,
-+				     ifindex_t ifindex);
-+ifindex_t dplane_ctx_get_ifp_bond_ifindex(const struct zebra_dplane_ctx *ctx);
-+enum zebra_iftype
-+dplane_ctx_get_ifp_zif_type(const struct zebra_dplane_ctx *ctx);
-+void dplane_ctx_set_ifp_zif_type(struct zebra_dplane_ctx *ctx,
-+				 enum zebra_iftype zif_type);
-+void dplane_ctx_set_ifp_table_id(struct zebra_dplane_ctx *ctx,
-+				 uint32_t table_id);
-+uint32_t dplane_ctx_get_ifp_table_id(const struct zebra_dplane_ctx *ctx);
-+void dplane_ctx_set_ifp_hw_addr(struct zebra_dplane_ctx *ctx,
-+				int32_t hw_addr_len, uint8_t *hw_addr);
-+int32_t dplane_ctx_get_ifp_hw_addr_len(const struct zebra_dplane_ctx *ctx);
-+const uint8_t *dplane_ctx_get_ifp_hw_addr(const struct zebra_dplane_ctx *ctx);
-+struct zebra_l2info_bridge;
-+void dplane_ctx_set_ifp_bridge_info(struct zebra_dplane_ctx *ctx,
-+				    struct zebra_l2info_bridge *binfo);
-+const struct zebra_l2info_bridge *
-+dplane_ctx_get_ifp_bridge_info(const struct zebra_dplane_ctx *ctx);
-+struct zebra_l2info_vlan;
-+void dplane_ctx_set_ifp_vlan_info(struct zebra_dplane_ctx *ctx,
-+				  struct zebra_l2info_vlan *vinfo);
-+const struct zebra_l2info_vlan *
-+dplane_ctx_get_ifp_vlan_info(const struct zebra_dplane_ctx *ctx);
-+struct zebra_l2info_vxlan;
-+void dplane_ctx_set_ifp_vxlan_info(struct zebra_dplane_ctx *ctx,
-+				   struct zebra_l2info_vxlan *vxinfo);
-+const struct zebra_l2info_vxlan *
-+dplane_ctx_get_ifp_vxlan_info(const struct zebra_dplane_ctx *ctx);
-+struct zebra_l2info_gre;
-+void dplane_ctx_set_ifp_gre_info(struct zebra_dplane_ctx *ctx,
-+				 struct zebra_l2info_gre *greinfo);
-+const struct zebra_l2info_gre *
-+dplane_ctx_get_ifp_gre_info(const struct zebra_dplane_ctx *ctx);
-+void dplane_ctx_set_ifp_zltype(struct zebra_dplane_ctx *ctx,
-+			       enum zebra_link_type zlt);
-+enum zebra_link_type
-+dplane_ctx_get_ifp_zltype(const struct zebra_dplane_ctx *ctx);
-+void dplane_ctx_set_ifp_link_nsid(struct zebra_dplane_ctx *ctx, ns_id_t ns_id);
-+ns_id_t dplane_ctx_get_ifp_link_nsid(const struct zebra_dplane_ctx *ctx);
-+void dplane_ctx_set_ifp_desc(struct zebra_dplane_ctx *ctx, const char *desc);
-+char *dplane_ctx_get_ifp_desc(struct zebra_dplane_ctx *ctx);
-+void dplane_ctx_set_ifp_mtu(struct zebra_dplane_ctx *ctx, uint32_t mtu);
-+uint32_t dplane_ctx_get_ifp_mtu(const struct zebra_dplane_ctx *ctx);
-+void dplane_ctx_set_ifp_vrf_id(struct zebra_dplane_ctx *ctx, vrf_id_t vrf_id);
-+vrf_id_t dplane_ctx_get_ifp_vrf_id(const struct zebra_dplane_ctx *ctx);
-+enum zebra_slave_iftype;
-+void dplane_ctx_set_ifp_zif_slave_type(struct zebra_dplane_ctx *ctx,
-+				       enum zebra_slave_iftype zslave_type);
-+enum zebra_slave_iftype
-+dplane_ctx_get_ifp_zif_slave_type(const struct zebra_dplane_ctx *ctx);
-+void dplane_ctx_set_ifp_master_ifindex(struct zebra_dplane_ctx *ctx,
-+				       ifindex_t master_ifindex);
-+ifindex_t dplane_ctx_get_ifp_master_ifindex(const struct zebra_dplane_ctx *ctx);
-+void dplane_ctx_set_ifp_bridge_ifindex(struct zebra_dplane_ctx *ctx,
-+				       ifindex_t bridge_ifindex);
-+ifindex_t dplane_ctx_get_ifp_bridge_ifindex(const struct zebra_dplane_ctx *ctx);
-+void dplane_ctx_set_ifp_bypass(struct zebra_dplane_ctx *ctx, uint8_t bypass);
-+uint8_t dplane_ctx_get_ifp_bypass(const struct zebra_dplane_ctx *ctx);
-+void dplane_ctx_set_ifp_flags(struct zebra_dplane_ctx *ctx, uint64_t flags);
-+uint64_t dplane_ctx_get_ifp_flags(const struct zebra_dplane_ctx *ctx);
-+void dplane_ctx_set_ifp_protodown(struct zebra_dplane_ctx *ctx, bool protodown);
-+bool dplane_ctx_get_ifp_protodown(const struct zebra_dplane_ctx *ctx);
-+void dplane_ctx_set_ifp_startup(struct zebra_dplane_ctx *ctx, bool startup);
-+bool dplane_ctx_get_ifp_startup(const struct zebra_dplane_ctx *ctx);
-+void dplane_ctx_set_ifp_protodown_set(struct zebra_dplane_ctx *ctx, bool set);
-+bool dplane_ctx_get_ifp_protodown_set(const struct zebra_dplane_ctx *ctx);
-+void dplane_ctx_set_ifp_rc_bitfield(struct zebra_dplane_ctx *ctx,
-+				    uint32_t rc_bitfield);
-+uint32_t dplane_ctx_get_ifp_rc_bitfield(const struct zebra_dplane_ctx *ctx);
-+void dplane_ctx_set_ifp_link_ifindex(struct zebra_dplane_ctx *ctx,
-+				     ifindex_t link_ifindex);
-+ifindex_t dplane_ctx_get_ifp_link_ifindex(const struct zebra_dplane_ctx *ctx);
-+void dplane_ctx_set_ifp_family(struct zebra_dplane_ctx *ctx, uint8_t family);
-+uint8_t dplane_ctx_get_ifp_family(const struct zebra_dplane_ctx *ctx);
-+struct zebra_vxlan_vni_array;
-+void dplane_ctx_set_ifp_vxlan_vni_array(struct zebra_dplane_ctx *ctx,
-+					struct zebra_vxlan_vni_array *vniarray);
-+const struct zebra_vxlan_vni_array *
-+dplane_ctx_get_ifp_vxlan_vni_array(const struct zebra_dplane_ctx *ctx);
-+struct zebra_dplane_bridge_vlan_info {
-+	uint16_t flags;
-+	uint16_t vid;
-+};
-+void dplane_ctx_set_ifp_bridge_vlan_info(
-+	struct zebra_dplane_ctx *ctx,
-+	struct zebra_dplane_bridge_vlan_info *bvinfo);
-+const struct zebra_dplane_bridge_vlan_info *
-+dplane_ctx_get_ifp_bridge_vlan_info(const struct zebra_dplane_ctx *ctx);
-+
-+struct zebra_dplane_bridge_vlan_info_array {
-+	int count;
-+	struct zebra_dplane_bridge_vlan_info array[0];
-+};
-+void dplane_ctx_set_ifp_bridge_vlan_info_array(
-+	struct zebra_dplane_ctx *ctx,
-+	struct zebra_dplane_bridge_vlan_info_array *bvarray);
-+const struct zebra_dplane_bridge_vlan_info_array *
-+dplane_ctx_get_ifp_bridge_vlan_info_array(const struct zebra_dplane_ctx *ctx);
- 
- /* Retrieve last/current provider id */
- uint32_t dplane_ctx_get_provider(const struct zebra_dplane_ctx *ctx);
-@@ -1083,6 +1190,9 @@ void zebra_dplane_pre_finish(void);
- void zebra_dplane_finish(void);
- void zebra_dplane_shutdown(void);
- 
-+void zebra_dplane_startup_stage(struct zebra_ns *zns,
-+				enum zebra_dplane_startup_notifications spot);
-+
- /*
-  * decision point for sending a routing update through the old
-  * straight to zebra master pthread or through the dplane to
-@@ -1093,6 +1203,9 @@ void dplane_rib_add_multipath(afi_t afi, safi_t safi, struct prefix *p,
- 			      struct nexthop_group *ng, int startup,
- 			      struct zebra_dplane_ctx *ctx);
- 
-+enum zebra_dplane_startup_notifications
-+dplane_ctx_get_startup_spot(struct zebra_dplane_ctx *ctx);
-+
- #ifdef __cplusplus
- }
- #endif
-diff --git a/zebra/zebra_nhg.c b/zebra/zebra_nhg.c
-index 758fed7280..8f686eb5f8 100644
---- a/zebra/zebra_nhg.c
-+++ b/zebra/zebra_nhg.c
-@@ -3177,6 +3177,7 @@ void zebra_nhg_dplane_result(struct zebra_dplane_ctx *ctx)
- 	case DPLANE_OP_TC_FILTER_ADD:
- 	case DPLANE_OP_TC_FILTER_DELETE:
- 	case DPLANE_OP_TC_FILTER_UPDATE:
-+	case DPLANE_OP_STARTUP_STAGE:
- 		break;
- 	}
- }
-diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c
-index 5e50d720a6..201fc761ae 100644
---- a/zebra/zebra_rib.c
-+++ b/zebra/zebra_rib.c
-@@ -4770,6 +4770,7 @@ static void rib_process_dplane_results(struct thread *thread)
- 			case DPLANE_OP_NEIGH_TABLE_UPDATE:
- 			case DPLANE_OP_GRE_SET:
- 			case DPLANE_OP_NONE:
-+			case DPLANE_OP_STARTUP_STAGE:
- 				break;
- 
- 			} /* Dispatch by op code */
-diff --git a/zebra/zebra_script.c b/zebra/zebra_script.c
-index 5c67ad4f16..22c1824b5a 100644
---- a/zebra/zebra_script.c
-+++ b/zebra/zebra_script.c
-@@ -428,6 +428,7 @@ void lua_pushzebra_dplane_ctx(lua_State *L, const struct zebra_dplane_ctx *ctx)
- 		/* Not currently handled */
- 	case DPLANE_OP_INTF_NETCONFIG: /*NYI*/
- 	case DPLANE_OP_NONE:
-+	case DPLANE_OP_STARTUP_STAGE:
- 		break;
- 	} /* Dispatch by op code */
- }
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0018-zebra-Use-zebra-dplane-for-RTM-link-and-addr.patch b/src/sonic-frr/patch/0018-zebra-Use-zebra-dplane-for-RTM-link-and-addr.patch
deleted file mode 100644
index 98f3b224a75e..000000000000
--- a/src/sonic-frr/patch/0018-zebra-Use-zebra-dplane-for-RTM-link-and-addr.patch
+++ /dev/null
@@ -1,2154 +0,0 @@
-From 2c33b9ab847a53d8006687e89c0cbd589fe7071f Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Wed, 26 Apr 2023 23:02:09 -0400
-Subject: [PATCH] zebra: Use zebra dplane for RTM link and addr
-
-a) Move the reads of link and address information
-into the dplane
-b) Move the startup read of data into the dplane
-as well.
-c) Break up startup reading of the linux kernel data
-into multiple phases.  As that we have implied ordering
-of data that must be read first and if the dplane has
-taken over some data reading then we must delay initial
-read-in of other data.
-
-Fixes: #13288
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-
-diff --git a/zebra/if_netlink.c b/zebra/if_netlink.c
-index ed5b3c4a66..7613f5fcc4 100644
---- a/zebra/if_netlink.c
-+++ b/zebra/if_netlink.c
-@@ -79,64 +79,21 @@
- 
- extern struct zebra_privs_t zserv_privs;
- 
--/* Note: on netlink systems, there should be a 1-to-1 mapping between interface
--   names and ifindex values. */
--static void set_ifindex(struct interface *ifp, ifindex_t ifi_index,
--			struct zebra_ns *zns)
--{
--	struct interface *oifp;
--
--	if (((oifp = if_lookup_by_index_per_ns(zns, ifi_index)) != NULL)
--	    && (oifp != ifp)) {
--		if (ifi_index == IFINDEX_INTERNAL)
--			flog_err(
--				EC_LIB_INTERFACE,
--				"Netlink is setting interface %s ifindex to reserved internal value %u",
--				ifp->name, ifi_index);
--		else {
--			if (IS_ZEBRA_DEBUG_KERNEL)
--				zlog_debug(
--					"interface index %d was renamed from %s to %s",
--					ifi_index, oifp->name, ifp->name);
--			if (if_is_up(oifp))
--				flog_err(
--					EC_LIB_INTERFACE,
--					"interface rename detected on up interface: index %d was renamed from %s to %s, results are uncertain!",
--					ifi_index, oifp->name, ifp->name);
--			if_delete_update(&oifp);
--		}
--	}
--	if_set_index(ifp, ifi_index);
--}
--
- /* Utility function to parse hardware link-layer address and update ifp */
- static void netlink_interface_update_hw_addr(struct rtattr **tb,
--					     struct interface *ifp)
-+					     struct zebra_dplane_ctx *ctx)
- {
--	int i;
--
- 	if (tb[IFLA_ADDRESS]) {
- 		int hw_addr_len;
- 
- 		hw_addr_len = RTA_PAYLOAD(tb[IFLA_ADDRESS]);
- 
- 		if (hw_addr_len > INTERFACE_HWADDR_MAX)
--			zlog_debug("Hardware address is too large: %d",
--				   hw_addr_len);
--		else {
--			ifp->hw_addr_len = hw_addr_len;
--			memcpy(ifp->hw_addr, RTA_DATA(tb[IFLA_ADDRESS]),
--			       hw_addr_len);
--
--			for (i = 0; i < hw_addr_len; i++)
--				if (ifp->hw_addr[i] != 0)
--					break;
--
--			if (i == hw_addr_len)
--				ifp->hw_addr_len = 0;
--			else
--				ifp->hw_addr_len = hw_addr_len;
--		}
-+			zlog_warn("Hardware address is too large: %d",
-+				  hw_addr_len);
-+		else
-+			dplane_ctx_set_ifp_hw_addr(ctx, hw_addr_len,
-+						   RTA_DATA(tb[IFLA_ADDRESS]));
- 	}
- }
- 
-@@ -251,26 +208,6 @@ static enum zebra_link_type netlink_to_zebra_link_type(unsigned int hwt)
- 	}
- }
- 
--static inline void zebra_if_set_ziftype(struct interface *ifp,
--					enum zebra_iftype zif_type,
--					enum zebra_slave_iftype zif_slave_type)
--{
--	struct zebra_if *zif;
--
--	zif = (struct zebra_if *)ifp->info;
--	zif->zif_slave_type = zif_slave_type;
--
--	if (zif->zif_type != zif_type) {
--		zif->zif_type = zif_type;
--		/* If the if_type has been set to bond initialize ES info
--		 * against it. XXX - note that we don't handle the case where
--		 * a zif changes from bond to non-bond; it is really
--		 * an unexpected/error condition.
--		 */
--		zebra_evpn_if_init(zif);
--	}
--}
--
- static void netlink_determine_zebra_iftype(const char *kind,
- 					   enum zebra_iftype *zif_type)
- {
-@@ -300,16 +237,11 @@ static void netlink_determine_zebra_iftype(const char *kind,
- }
- 
- static void netlink_vrf_change(struct nlmsghdr *h, struct rtattr *tb,
--			       uint32_t ns_id, const char *name)
-+			       uint32_t ns_id, const char *name,
-+			       struct zebra_dplane_ctx *ctx)
- {
--	struct ifinfomsg *ifi;
- 	struct rtattr *linkinfo[IFLA_INFO_MAX + 1];
- 	struct rtattr *attr[IFLA_VRF_MAX + 1];
--	struct vrf *vrf = NULL;
--	struct zebra_vrf *zvrf;
--	uint32_t nl_table_id;
--
--	ifi = NLMSG_DATA(h);
- 
- 	netlink_parse_rtattr_nested(linkinfo, IFLA_INFO_MAX, tb);
- 
-@@ -331,75 +263,8 @@ static void netlink_vrf_change(struct nlmsghdr *h, struct rtattr *tb,
- 		return;
- 	}
- 
--	nl_table_id = *(uint32_t *)RTA_DATA(attr[IFLA_VRF_TABLE]);
--
--	if (h->nlmsg_type == RTM_NEWLINK) {
--		if (IS_ZEBRA_DEBUG_KERNEL)
--			zlog_debug("RTM_NEWLINK for VRF %s(%u) table %u", name,
--				   ifi->ifi_index, nl_table_id);
--
--		if (!vrf_lookup_by_id((vrf_id_t)ifi->ifi_index)) {
--			vrf_id_t exist_id;
--
--			exist_id =
--				zebra_vrf_lookup_by_table(nl_table_id, ns_id);
--			if (exist_id != VRF_DEFAULT) {
--				vrf = vrf_lookup_by_id(exist_id);
--
--				flog_err(
--					EC_ZEBRA_VRF_MISCONFIGURED,
--					"VRF %s id %u table id overlaps existing vrf %s, misconfiguration exiting",
--					name, ifi->ifi_index, vrf->name);
--				exit(-1);
--			}
--		}
--
--		vrf = vrf_update((vrf_id_t)ifi->ifi_index, name);
--		if (!vrf) {
--			flog_err(EC_LIB_INTERFACE, "VRF %s id %u not created",
--				 name, ifi->ifi_index);
--			return;
--		}
--
--		/*
--		 * This is the only place that we get the actual kernel table_id
--		 * being used.  We need it to set the table_id of the routes
--		 * we are passing to the kernel.... And to throw some totally
--		 * awesome parties. that too.
--		 *
--		 * At this point we *must* have a zvrf because the vrf_create
--		 * callback creates one.  We *must* set the table id
--		 * before the vrf_enable because of( at the very least )
--		 * static routes being delayed for installation until
--		 * during the vrf_enable callbacks.
--		 */
--		zvrf = (struct zebra_vrf *)vrf->info;
--		zvrf->table_id = nl_table_id;
--
--		/* Enable the created VRF. */
--		if (!vrf_enable(vrf)) {
--			flog_err(EC_LIB_INTERFACE,
--				 "Failed to enable VRF %s id %u", name,
--				 ifi->ifi_index);
--			return;
--		}
--
--	} else // h->nlmsg_type == RTM_DELLINK
--	{
--		if (IS_ZEBRA_DEBUG_KERNEL)
--			zlog_debug("RTM_DELLINK for VRF %s(%u)", name,
--				   ifi->ifi_index);
--
--		vrf = vrf_lookup_by_id((vrf_id_t)ifi->ifi_index);
--
--		if (!vrf) {
--			flog_warn(EC_ZEBRA_VRF_NOT_FOUND, "%s: vrf not found",
--				  __func__);
--			return;
--		}
--
--		vrf_delete(vrf);
--	}
-+	dplane_ctx_set_ifp_table_id(
-+		ctx, *(uint32_t *)RTA_DATA(attr[IFLA_VRF_TABLE]));
- }
- 
- static uint32_t get_iflink_speed(struct interface *interface, int *error)
-@@ -659,58 +524,120 @@ static int netlink_extract_vxlan_info(struct rtattr *link_data,
-  * bridge interface is added or updated, take further actions to map
-  * its members. Likewise, for VxLAN interface.
-  */
--static void netlink_interface_update_l2info(struct interface *ifp,
-+static void netlink_interface_update_l2info(struct zebra_dplane_ctx *ctx,
-+					    enum zebra_iftype zif_type,
- 					    struct rtattr *link_data, int add,
- 					    ns_id_t link_nsid)
- {
-+	struct zebra_l2info_bridge bridge_info;
-+	struct zebra_l2info_vlan vlan_info;
-+	struct zebra_l2info_vxlan vxlan_info;
-+	struct zebra_l2info_gre gre_info;
-+
- 	if (!link_data)
- 		return;
- 
--	if (IS_ZEBRA_IF_BRIDGE(ifp)) {
--		struct zebra_l2info_bridge bridge_info;
--
-+	switch (zif_type) {
-+	case ZEBRA_IF_BRIDGE:
- 		netlink_extract_bridge_info(link_data, &bridge_info);
--		zebra_l2_bridge_add_update(ifp, &bridge_info);
--	} else if (IS_ZEBRA_IF_VLAN(ifp)) {
--		struct zebra_l2info_vlan vlan_info;
--
-+		dplane_ctx_set_ifp_bridge_info(ctx, &bridge_info);
-+		break;
-+	case ZEBRA_IF_VLAN:
- 		netlink_extract_vlan_info(link_data, &vlan_info);
--		zebra_l2_vlanif_update(ifp, &vlan_info);
--		zebra_evpn_acc_bd_svi_set(ifp->info, NULL,
--					  !!if_is_operative(ifp));
--	} else if (IS_ZEBRA_IF_VXLAN(ifp)) {
--		struct zebra_l2info_vxlan vxlan_info;
--
-+		dplane_ctx_set_ifp_vlan_info(ctx, &vlan_info);
-+		break;
-+	case ZEBRA_IF_VXLAN:
- 		netlink_extract_vxlan_info(link_data, &vxlan_info);
- 		vxlan_info.link_nsid = link_nsid;
--		zebra_l2_vxlanif_add_update(ifp, &vxlan_info, add);
--		if (link_nsid != NS_UNKNOWN &&
--		    vxlan_info.ifindex_link)
--			zebra_if_update_link(ifp, vxlan_info.ifindex_link,
--					     link_nsid);
--	} else if (IS_ZEBRA_IF_GRE(ifp)) {
--		struct zebra_l2info_gre gre_info;
--
-+		dplane_ctx_set_ifp_vxlan_info(ctx, &vxlan_info);
-+		break;
-+	case ZEBRA_IF_GRE:
- 		netlink_extract_gre_info(link_data, &gre_info);
- 		gre_info.link_nsid = link_nsid;
--		zebra_l2_greif_add_update(ifp, &gre_info, add);
--		if (link_nsid != NS_UNKNOWN &&
--		    gre_info.ifindex_link)
--			zebra_if_update_link(ifp, gre_info.ifindex_link,
--					     link_nsid);
-+		dplane_ctx_set_ifp_gre_info(ctx, &gre_info);
-+		break;
-+	case ZEBRA_IF_OTHER:
-+	case ZEBRA_IF_VRF:
-+	case ZEBRA_IF_MACVLAN:
-+	case ZEBRA_IF_VETH:
-+	case ZEBRA_IF_BOND:
-+	case ZEBRA_IF_BOND_SLAVE:
-+		break;
- 	}
- }
- 
--static int netlink_bridge_vxlan_update(struct interface *ifp,
--		struct rtattr *af_spec)
-+#if 0
-+static int
-+netlink_bridge_vxlan_vlan_vni_map_update(struct zebra_dplane_ctx *ctx,
-+					 struct rtattr *af_spec)
-+{
-+	int rem;
-+	uint16_t flags;
-+	struct rtattr *i;
-+	struct zebra_vxlan_vni_array *vniarray = NULL;
-+	struct zebra_vxlan_vni vni_end;
-+	struct zebra_vxlan_vni vni_start;
-+	struct rtattr *aftb[IFLA_BRIDGE_VLAN_TUNNEL_MAX + 1];
-+	int32_t count = 0;
-+
-+	memset(&vni_start, 0, sizeof(vni_start));
-+	memset(&vni_end, 0, sizeof(vni_end));
-+
-+	for (i = RTA_DATA(af_spec), rem = RTA_PAYLOAD(af_spec); RTA_OK(i, rem);
-+	     i = RTA_NEXT(i, rem)) {
-+
-+		if (i->rta_type != IFLA_BRIDGE_VLAN_TUNNEL_INFO)
-+			continue;
-+
-+		memset(aftb, 0, sizeof(aftb));
-+		netlink_parse_rtattr_nested(aftb, IFLA_BRIDGE_VLAN_TUNNEL_MAX,
-+					    i);
-+		if (!aftb[IFLA_BRIDGE_VLAN_TUNNEL_ID] ||
-+		    !aftb[IFLA_BRIDGE_VLAN_TUNNEL_VID])
-+			/* vlan-vni info missing */
-+			return 0;
-+
-+		count++;
-+		flags = 0;
-+		vniarray = XREALLOC(
-+			MTYPE_TMP, vniarray,
-+			sizeof(struct zebra_vxlan_vni_array) +
-+				count * sizeof(struct zebra_vxlan_vni));
-+
-+		memset(&vniarray->vnis[count - 1], 0,
-+		       sizeof(struct zebra_vxlan_vni));
-+
-+		vniarray->vnis[count - 1].vni =
-+			*(vni_t *)RTA_DATA(aftb[IFLA_BRIDGE_VLAN_TUNNEL_ID]);
-+		vniarray->vnis[count - 1].access_vlan = *(vlanid_t *)RTA_DATA(
-+			aftb[IFLA_BRIDGE_VLAN_TUNNEL_VID]);
-+
-+		if (aftb[IFLA_BRIDGE_VLAN_TUNNEL_FLAGS])
-+			flags = *(uint16_t *)RTA_DATA(
-+				aftb[IFLA_BRIDGE_VLAN_TUNNEL_FLAGS]);
-+
-+		vniarray->vnis[count - 1].flags = flags;
-+	}
-+
-+	if (count) {
-+		vniarray->count = count;
-+		dplane_ctx_set_ifp_vxlan_vni_array(ctx, vniarray);
-+	}
-+	return 0;
-+}
-+#endif
-+static int netlink_bridge_vxlan_update(struct zebra_dplane_ctx *ctx,
-+				       struct rtattr *af_spec)
- {
- 	struct rtattr *aftb[IFLA_BRIDGE_MAX + 1];
- 	struct bridge_vlan_info *vinfo;
--	vlanid_t access_vlan;
-+	struct zebra_dplane_bridge_vlan_info bvinfo;
- 
- 	if (!af_spec)
- 		return 0;
- 
-+	//netlink_bridge_vxlan_vlan_vni_map_update(ctx, af_spec);
-+
- 	/* There is a 1-to-1 mapping of VLAN to VxLAN - hence
- 	 * only 1 access VLAN is accepted.
- 	 */
-@@ -719,119 +646,73 @@ static int netlink_bridge_vxlan_update(struct interface *ifp,
- 		return 0;
- 
- 	vinfo = RTA_DATA(aftb[IFLA_BRIDGE_VLAN_INFO]);
--	if (!(vinfo->flags & BRIDGE_VLAN_INFO_PVID))
--		return 0;
-+	bvinfo.flags = vinfo->flags;
-+	bvinfo.vid = vinfo->vid;
- 
--	access_vlan = (vlanid_t)vinfo->vid;
--	if (IS_ZEBRA_DEBUG_KERNEL)
--		zlog_debug("Access VLAN %u for VxLAN IF %s(%u)", access_vlan,
--				ifp->name, ifp->ifindex);
--	zebra_l2_vxlanif_update_access_vlan(ifp, access_vlan);
-+	dplane_ctx_set_ifp_bridge_vlan_info(ctx, &bvinfo);
- 	return 0;
- }
- 
--static void netlink_bridge_vlan_update(struct interface *ifp,
--		struct rtattr *af_spec)
-+static void netlink_bridge_vlan_update(struct zebra_dplane_ctx *ctx,
-+				       struct rtattr *af_spec)
- {
- 	struct rtattr *i;
- 	int rem;
--	uint16_t vid_range_start = 0;
--	struct zebra_if *zif;
--	bitfield_t old_vlan_bitmap;
- 	struct bridge_vlan_info *vinfo;
--
--	zif = (struct zebra_if *)ifp->info;
--
--	/* cache the old bitmap addrs */
--	old_vlan_bitmap = zif->vlan_bitmap;
--	/* create a new bitmap space for re-eval */
--	bf_init(zif->vlan_bitmap, IF_VLAN_BITMAP_MAX);
-+	struct zebra_dplane_bridge_vlan_info_array *bvarray = NULL;
-+	int32_t count = 0;
- 
- 	if (af_spec) {
- 		for (i = RTA_DATA(af_spec), rem = RTA_PAYLOAD(af_spec);
- 		     RTA_OK(i, rem); i = RTA_NEXT(i, rem)) {
--
- 			if (i->rta_type != IFLA_BRIDGE_VLAN_INFO)
- 				continue;
- 
--			vinfo = RTA_DATA(i);
--
--			if (vinfo->flags & BRIDGE_VLAN_INFO_RANGE_BEGIN) {
--				vid_range_start = vinfo->vid;
--				continue;
--			}
-+			count++;
-+			bvarray = XREALLOC(
-+				MTYPE_TMP, bvarray,
-+				sizeof(struct
-+				       zebra_dplane_bridge_vlan_info_array) +
-+					count * sizeof(struct
-+						       zebra_dplane_bridge_vlan_info));
- 
--			if (!(vinfo->flags & BRIDGE_VLAN_INFO_RANGE_END))
--				vid_range_start = vinfo->vid;
--
--			zebra_vlan_bitmap_compute(ifp, vid_range_start,
--						  vinfo->vid);
-+			vinfo = RTA_DATA(i);
-+			bvarray->array[count - 1].flags = vinfo->flags;
-+			bvarray->array[count - 1].vid = vinfo->vid;
- 		}
- 	}
- 
--	zebra_vlan_mbr_re_eval(ifp, old_vlan_bitmap);
--
--	bf_free(old_vlan_bitmap);
-+	if (count) {
-+		bvarray->count = count;
-+		dplane_ctx_set_ifp_bridge_vlan_info_array(ctx, bvarray);
-+	}
- }
- 
--static int netlink_bridge_interface(struct nlmsghdr *h, int len, ns_id_t ns_id,
--				    int startup)
-+static int netlink_bridge_interface(struct zebra_dplane_ctx *ctx,
-+				    struct rtattr *af_spec, int startup)
- {
--	char *name = NULL;
--	struct ifinfomsg *ifi;
--	struct rtattr *tb[IFLA_MAX + 1];
--	struct interface *ifp;
--	struct zebra_if *zif;
--	struct rtattr *af_spec;
- 
--	/* Fetch name and ifindex */
--	ifi = NLMSG_DATA(h);
--	netlink_parse_rtattr(tb, IFLA_MAX, IFLA_RTA(ifi), len);
--
--	if (tb[IFLA_IFNAME] == NULL)
--		return -1;
--	name = (char *)RTA_DATA(tb[IFLA_IFNAME]);
--
--	/* The interface should already be known, if not discard. */
--	ifp = if_lookup_by_index_per_ns(zebra_ns_lookup(ns_id), ifi->ifi_index);
--	if (!ifp) {
--		zlog_debug("Cannot find bridge IF %s(%u)", name,
--			   ifi->ifi_index);
--		return 0;
--	}
--
--	/* We are only interested in the access VLAN i.e., AF_SPEC */
--	af_spec = tb[IFLA_AF_SPEC];
--
--	if (IS_ZEBRA_IF_VXLAN(ifp))
--		return netlink_bridge_vxlan_update(ifp, af_spec);
-+	netlink_bridge_vxlan_update(ctx, af_spec);
- 
- 	/* build vlan bitmap associated with this interface if that
- 	 * device type is interested in the vlans
- 	 */
--	zif = (struct zebra_if *)ifp->info;
--	if (bf_is_inited(zif->vlan_bitmap))
--		netlink_bridge_vlan_update(ifp, af_spec);
-+	netlink_bridge_vlan_update(ctx, af_spec);
- 
-+	dplane_provider_enqueue_to_zebra(ctx);
- 	return 0;
- }
- 
--static bool is_if_protodown_reason_only_frr(uint32_t rc_bitfield)
--{
--	return (rc_bitfield == (((uint32_t)1) << if_netlink_get_frr_protodown_r_bit()));
--}
--
- /*
-  * Process interface protodown dplane update.
-  *
-  * If the interface is an es bond member then it must follow EVPN's
-  * protodown setting.
-  */
--static void netlink_proc_dplane_if_protodown(struct zebra_if *zif,
-+static void netlink_proc_dplane_if_protodown(struct zebra_dplane_ctx *ctx,
- 					     struct rtattr **tb)
- {
- 	bool protodown;
--	bool old_protodown;
- 	uint32_t rc_bitfield = 0;
- 	struct rtattr *pd_reason_info[IFLA_MAX + 1];
- 
-@@ -846,59 +727,9 @@ static void netlink_proc_dplane_if_protodown(struct zebra_if *zif,
- 				pd_reason_info[IFLA_PROTO_DOWN_REASON_VALUE]);
- 	}
- 
--	/*
--	 * Set our reason code to note it wasn't us.
--	 * If the reason we got from the kernel is ONLY frr though, don't
--	 * set it.
--	 */
--	COND_FLAG(zif->protodown_rc, ZEBRA_PROTODOWN_EXTERNAL,
--		  protodown && rc_bitfield &&
--			  !is_if_protodown_reason_only_frr(rc_bitfield));
--
--
--	old_protodown = !!ZEBRA_IF_IS_PROTODOWN(zif);
--	if (protodown == old_protodown)
--		return;
--
--	if (IS_ZEBRA_DEBUG_EVPN_MH_ES || IS_ZEBRA_DEBUG_KERNEL)
--		zlog_debug("interface %s dplane change, protdown %s",
--			   zif->ifp->name, protodown ? "on" : "off");
--
--	/* Set protodown, respectively */
--	COND_FLAG(zif->flags, ZIF_FLAG_PROTODOWN, protodown);
--
--	if (zebra_evpn_is_es_bond_member(zif->ifp)) {
--		/* Check it's not already being sent to the dplane first */
--		if (protodown &&
--		    CHECK_FLAG(zif->flags, ZIF_FLAG_SET_PROTODOWN)) {
--			if (IS_ZEBRA_DEBUG_EVPN_MH_ES || IS_ZEBRA_DEBUG_KERNEL)
--				zlog_debug(
--					"bond mbr %s protodown on recv'd but already sent protodown on to the dplane",
--					zif->ifp->name);
--			return;
--		}
--
--		if (!protodown &&
--		    CHECK_FLAG(zif->flags, ZIF_FLAG_UNSET_PROTODOWN)) {
--			if (IS_ZEBRA_DEBUG_EVPN_MH_ES || IS_ZEBRA_DEBUG_KERNEL)
--				zlog_debug(
--					"bond mbr %s protodown off recv'd but already sent protodown off to the dplane",
--					zif->ifp->name);
--			return;
--		}
--
--		if (IS_ZEBRA_DEBUG_EVPN_MH_ES || IS_ZEBRA_DEBUG_KERNEL)
--			zlog_debug(
--				"bond mbr %s reinstate protodown %s in the dplane",
--				zif->ifp->name, old_protodown ? "on" : "off");
--
--		if (old_protodown)
--			SET_FLAG(zif->flags, ZIF_FLAG_SET_PROTODOWN);
--		else
--			SET_FLAG(zif->flags, ZIF_FLAG_UNSET_PROTODOWN);
--
--		dplane_intf_update(zif->ifp);
--	}
-+	dplane_ctx_set_ifp_rc_bitfield(ctx, rc_bitfield);
-+	dplane_ctx_set_ifp_protodown(ctx, protodown);
-+	dplane_ctx_set_ifp_protodown_set(ctx, true);
- }
- 
- static uint8_t netlink_parse_lacp_bypass(struct rtattr **linkinfo)
-@@ -915,29 +746,6 @@ static uint8_t netlink_parse_lacp_bypass(struct rtattr **linkinfo)
- 	return bypass;
- }
- 
--/*
-- * Only called at startup to cleanup leftover protodown reasons we may
-- * have not cleaned up. We leave protodown set though.
-- */
--static void if_sweep_protodown(struct zebra_if *zif)
--{
--	bool protodown;
--
--	protodown = !!ZEBRA_IF_IS_PROTODOWN(zif);
--
--	if (!protodown)
--		return;
--
--	if (IS_ZEBRA_DEBUG_KERNEL)
--		zlog_debug("interface %s sweeping protodown %s reason 0x%x",
--			   zif->ifp->name, protodown ? "on" : "off",
--			   zif->protodown_rc);
--
--	/* Only clear our reason codes, leave external if it was set */
--	UNSET_FLAG(zif->protodown_rc, ZEBRA_PROTODOWN_ALL);
--	dplane_intf_update(zif->ifp);
--}
--
- /* Request for specific interface or address information from the kernel */
- static int netlink_request_intf_addr(struct nlsock *netlink_cmd, int family,
- 				     int type, uint32_t filter_mask)
-@@ -984,7 +792,7 @@ int interface_lookup_netlink(struct zebra_ns *zns)
- {
- 	int ret;
- 	struct zebra_dplane_info dp_info;
--	struct nlsock *netlink_cmd = &zns->netlink_cmd;
-+	struct nlsock *netlink_cmd = &zns->netlink_dplane_out;
- 
- 	/* Capture key info from ns struct */
- 	zebra_dplane_info_from_zns(&dp_info, zns, true /*is_cmd*/);
-@@ -1008,6 +816,13 @@ int interface_lookup_netlink(struct zebra_ns *zns)
- 	if (ret < 0)
- 		return ret;
- 
-+	return ret;
-+}
-+
-+void interface_list_tunneldump(struct zebra_ns *zns)
-+{
-+	int ret;
-+
- 	/*
- 	 * So netlink_tunneldump_read will initiate a request
- 	 * per tunnel to get data.  If we are on a kernel that
-@@ -1020,13 +835,12 @@ int interface_lookup_netlink(struct zebra_ns *zns)
- 	 */
- 	ret = netlink_tunneldump_read(zns);
- 	if (ret < 0)
--		return ret;
-+		return;
- 
--	/* fixup linkages */
--	zebra_if_update_all_links(zns);
--	return 0;
-+	zebra_dplane_startup_stage(zns, ZEBRA_DPLANE_TUNNELS_READ);
- }
- 
-+
- /**
-  * interface_addr_lookup_netlink() - Look up interface addresses
-  *
-@@ -1046,8 +860,8 @@ static int interface_addr_lookup_netlink(struct zebra_ns *zns)
- 	ret = netlink_request_intf_addr(netlink_cmd, AF_INET, RTM_GETADDR, 0);
- 	if (ret < 0)
- 		return ret;
--	ret = netlink_parse_info(netlink_interface_addr, netlink_cmd, &dp_info,
--				 0, true);
-+	ret = netlink_parse_info(netlink_interface_addr_dplane, netlink_cmd,
-+				 &dp_info, 0, true);
- 	if (ret < 0)
- 		return ret;
- 
-@@ -1055,8 +869,8 @@ static int interface_addr_lookup_netlink(struct zebra_ns *zns)
- 	ret = netlink_request_intf_addr(netlink_cmd, AF_INET6, RTM_GETADDR, 0);
- 	if (ret < 0)
- 		return ret;
--	ret = netlink_parse_info(netlink_interface_addr, netlink_cmd, &dp_info,
--				 0, true);
-+	ret = netlink_parse_info(netlink_interface_addr_dplane, netlink_cmd,
-+				 &dp_info, 0, true);
- 	if (ret < 0)
- 		return ret;
- 
-@@ -1616,7 +1430,6 @@ int netlink_interface_addr_dplane(struct nlmsghdr *h, ns_id_t ns_id,
- 
- 	/* Enqueue ctx for main pthread to process */
- 	dplane_provider_enqueue_to_zebra(ctx);
--
- 	return 0;
- }
- 
-@@ -1626,27 +1439,21 @@ int netlink_link_change(struct nlmsghdr *h, ns_id_t ns_id, int startup)
- 	struct ifinfomsg *ifi;
- 	struct rtattr *tb[IFLA_MAX + 1];
- 	struct rtattr *linkinfo[IFLA_MAX + 1];
--	struct interface *ifp;
- 	char *name = NULL;
- 	char *kind = NULL;
--	char *desc = NULL;
- 	char *slave_kind = NULL;
--	struct zebra_ns *zns;
- 	vrf_id_t vrf_id = VRF_DEFAULT;
- 	enum zebra_iftype zif_type = ZEBRA_IF_OTHER;
- 	enum zebra_slave_iftype zif_slave_type = ZEBRA_IF_SLAVE_NONE;
- 	ifindex_t bridge_ifindex = IFINDEX_INTERNAL;
- 	ifindex_t bond_ifindex = IFINDEX_INTERNAL;
- 	ifindex_t link_ifindex = IFINDEX_INTERNAL;
--	uint8_t old_hw_addr[INTERFACE_HWADDR_MAX];
--	struct zebra_if *zif;
- 	ns_id_t link_nsid = ns_id;
- 	ifindex_t master_infindex = IFINDEX_INTERNAL;
- 	uint8_t bypass = 0;
- 
- 	frrtrace(3, frr_zebra, netlink_interface, h, ns_id, startup);
- 
--	zns = zebra_ns_lookup(ns_id);
- 	ifi = NLMSG_DATA(h);
- 
- 	/* assume if not default zns, then new VRF */
-@@ -1675,10 +1482,6 @@ int netlink_link_change(struct nlmsghdr *h, ns_id_t ns_id, int startup)
- 		return -1;
- 	}
- 
--	/* We are interested in some AF_BRIDGE notifications. */
--	if (ifi->ifi_family == AF_BRIDGE)
--		return netlink_bridge_interface(h, len, ns_id, startup);
--
- 	/* Looking up interface name. */
- 	memset(linkinfo, 0, sizeof(linkinfo));
- 	netlink_parse_rtattr_flags(tb, IFLA_MAX, IFLA_RTA(ifi), len,
-@@ -1728,18 +1531,47 @@ int netlink_link_change(struct nlmsghdr *h, ns_id_t ns_id, int startup)
- 		link_nsid = *(ns_id_t *)RTA_DATA(tb[IFLA_LINK_NETNSID]);
- 		link_nsid = ns_id_get_absolute(ns_id, link_nsid);
- 	}
--	if (tb[IFLA_IFALIAS]) {
--		desc = (char *)RTA_DATA(tb[IFLA_IFALIAS]);
--	}
- 
--	/* See if interface is present. */
--	ifp = if_lookup_by_name_per_ns(zns, name);
-+	struct zebra_dplane_ctx *ctx = dplane_ctx_alloc();
-+	dplane_ctx_set_ns_id(ctx, ns_id);
-+	dplane_ctx_set_ifp_link_nsid(ctx, link_nsid);
-+	dplane_ctx_set_ifp_zif_type(ctx, zif_type);
-+	dplane_ctx_set_ifindex(ctx, ifi->ifi_index);
-+	dplane_ctx_set_ifname(ctx, name);
-+	dplane_ctx_set_ifp_startup(ctx, startup);
-+	dplane_ctx_set_ifp_family(ctx, ifi->ifi_family);
-+
-+	/* We are interested in some AF_BRIDGE notifications. */
-+#ifndef AF_BRIDGE
-+#define AF_BRIDGE 7
-+#endif
-+	if (ifi->ifi_family == AF_BRIDGE) {
-+		dplane_ctx_set_op(ctx, DPLANE_OP_INTF_INSTALL);
-+		return netlink_bridge_interface(ctx, tb[IFLA_AF_SPEC], startup);
-+	}
- 
- 	if (h->nlmsg_type == RTM_NEWLINK) {
-+		dplane_ctx_set_ifp_link_ifindex(ctx, link_ifindex);
-+		dplane_ctx_set_op(ctx, DPLANE_OP_INTF_INSTALL);
-+		dplane_ctx_set_status(ctx, ZEBRA_DPLANE_REQUEST_QUEUED);
-+		if (tb[IFLA_IFALIAS]) {
-+			dplane_ctx_set_ifp_desc(ctx,
-+						RTA_DATA(tb[IFLA_IFALIAS]));
-+		}
-+		if (!tb[IFLA_MTU]) {
-+			if (IS_ZEBRA_DEBUG_KERNEL)
-+				zlog_debug(
-+					"RTM_NEWLINK for interface %s(%u) without MTU set",
-+					name, ifi->ifi_index);
-+			return 0;
-+		}
-+		dplane_ctx_set_ifp_mtu(ctx, *(int *)RTA_DATA(tb[IFLA_MTU]));
-+
- 		/* If VRF, create or update the VRF structure itself. */
- 		if (zif_type == ZEBRA_IF_VRF && !vrf_is_backend_netns()) {
--			netlink_vrf_change(h, tb[IFLA_LINKINFO], ns_id, name);
--			vrf_id = (vrf_id_t)ifi->ifi_index;
-+			netlink_vrf_change(h, tb[IFLA_LINKINFO], ns_id, name,
-+					   ctx);
-+			vrf_id = ifi->ifi_index;
- 		}
- 
- 		if (tb[IFLA_MASTER]) {
-@@ -1762,279 +1594,45 @@ int netlink_link_change(struct nlmsghdr *h, ns_id_t ns_id, int startup)
- 			} else
- 				zif_slave_type = ZEBRA_IF_SLAVE_OTHER;
- 		}
-+		dplane_ctx_set_ifp_zif_slave_type(ctx, zif_slave_type);
-+		dplane_ctx_set_ifp_vrf_id(ctx, vrf_id);
-+		dplane_ctx_set_ifp_master_ifindex(ctx, master_infindex);
-+		dplane_ctx_set_ifp_bridge_ifindex(ctx, bridge_ifindex);
-+		dplane_ctx_set_ifp_bond_ifindex(ctx, bond_ifindex);
-+		dplane_ctx_set_ifp_bypass(ctx, bypass);
-+		dplane_ctx_set_ifp_zltype(
-+			ctx, netlink_to_zebra_link_type(ifi->ifi_type));
-+
- 		if (vrf_is_backend_netns())
--			vrf_id = (vrf_id_t)ns_id;
--		if (ifp == NULL
--		    || !CHECK_FLAG(ifp->status, ZEBRA_INTERFACE_ACTIVE)) {
--			/* Add interface notification from kernel */
--			if (IS_ZEBRA_DEBUG_KERNEL)
--				zlog_debug(
--					"RTM_NEWLINK ADD for %s(%u) vrf_id %u type %d sl_type %d master %u flags 0x%x",
--					name, ifi->ifi_index, vrf_id, zif_type,
--					zif_slave_type, master_infindex,
--					ifi->ifi_flags);
--
--			if (ifp == NULL) {
--				/* unknown interface */
--				ifp = if_get_by_name(name, vrf_id, NULL);
--			} else {
--				/* pre-configured interface, learnt now */
--				if (ifp->vrf->vrf_id != vrf_id)
--					if_update_to_new_vrf(ifp, vrf_id);
--			}
--
--			/* Update interface information. */
--			set_ifindex(ifp, ifi->ifi_index, zns);
--			ifp->flags = ifi->ifi_flags & 0x0000fffff;
--			if (!tb[IFLA_MTU]) {
--				zlog_debug(
--					"RTM_NEWLINK for interface %s(%u) without MTU set",
--					name, ifi->ifi_index);
--				return 0;
--			}
--			ifp->mtu6 = ifp->mtu = *(int *)RTA_DATA(tb[IFLA_MTU]);
--			ifp->metric = 0;
--			ifp->speed = get_iflink_speed(ifp, NULL);
--			ifp->ptm_status = ZEBRA_PTM_STATUS_UNKNOWN;
--
--			/* Set interface type */
--			zebra_if_set_ziftype(ifp, zif_type, zif_slave_type);
--			if (IS_ZEBRA_IF_VRF(ifp))
--				SET_FLAG(ifp->status,
--					 ZEBRA_INTERFACE_VRF_LOOPBACK);
--
--			/* Update link. */
--			zebra_if_update_link(ifp, link_ifindex, link_nsid);
--
--			/*
--			 * Just set the @link/lower-device ifindex. During
--			 * nldump interfaces are not ordered in any fashion so
--			 * we may end up getting upper devices before lower
--			 * devices. We will setup the real linkage once the dump
--			 * is complete.
--			 */
--			zif = (struct zebra_if *)ifp->info;
--			zif->link_ifindex = link_ifindex;
--
--			ifp->ll_type =
--				netlink_to_zebra_link_type(ifi->ifi_type);
--			netlink_interface_update_hw_addr(tb, ifp);
--
--			/* Inform clients, install any configured addresses. */
--			if_add_update(ifp);
--
--			/* Extract and save L2 interface information, take
--			 * additional actions. */
--			netlink_interface_update_l2info(
--				ifp, linkinfo[IFLA_INFO_DATA],
--				1, link_nsid);
--			if (IS_ZEBRA_IF_BOND(ifp))
--				zebra_l2if_update_bond(ifp, true);
--			if (IS_ZEBRA_IF_BRIDGE_SLAVE(ifp))
--				zebra_l2if_update_bridge_slave(
--					ifp, bridge_ifindex, ns_id,
--					ZEBRA_BRIDGE_NO_ACTION);
--			else if (IS_ZEBRA_IF_BOND_SLAVE(ifp))
--				zebra_l2if_update_bond_slave(ifp, bond_ifindex,
--							     !!bypass);
--
--			if (tb[IFLA_PROTO_DOWN]) {
--				netlink_proc_dplane_if_protodown(ifp->info, tb);
--				if (startup)
--					if_sweep_protodown(zif);
--			}
--			if (IS_ZEBRA_IF_BRIDGE(ifp)) {
--				if (IS_ZEBRA_DEBUG_KERNEL)
--					zlog_debug(
--						"RTM_NEWLINK ADD for %s(%u), vlan-aware %d",
--						name, ifp->ifindex,
--						IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(
--							zif));
--			}
--		} else if (ifp->vrf->vrf_id != vrf_id) {
--			/* VRF change for an interface. */
--			if (IS_ZEBRA_DEBUG_KERNEL)
--				zlog_debug(
--					"RTM_NEWLINK vrf-change for %s(%u) vrf_id %u -> %u flags 0x%x",
--					name, ifp->ifindex, ifp->vrf->vrf_id,
--					vrf_id, ifi->ifi_flags);
-+			dplane_ctx_set_ifp_vrf_id(ctx, ns_id);
- 
--			if_handle_vrf_change(ifp, vrf_id);
--		} else {
--			bool was_bridge_slave, was_bond_slave;
--			uint8_t chgflags = ZEBRA_BRIDGE_NO_ACTION;
--			zif = ifp->info;
-+		dplane_ctx_set_ifp_flags(ctx, ifi->ifi_flags & 0x0000fffff);
- 
--			/* Interface update. */
--			if (IS_ZEBRA_DEBUG_KERNEL)
--				zlog_debug(
--					"RTM_NEWLINK update for %s(%u) sl_type %d master %u flags 0x%x",
--					name, ifp->ifindex, zif_slave_type,
--					master_infindex, ifi->ifi_flags);
-+		if (tb[IFLA_PROTO_DOWN]) {
-+			dplane_ctx_set_ifp_protodown_set(ctx, true);
-+			netlink_proc_dplane_if_protodown(ctx, tb);
-+		} else
-+			dplane_ctx_set_ifp_protodown_set(ctx, false);
- 
--			set_ifindex(ifp, ifi->ifi_index, zns);
--			if (!tb[IFLA_MTU]) {
--				zlog_debug(
--					"RTM_NEWLINK for interface %s(%u) without MTU set",
--					name, ifi->ifi_index);
--				return 0;
--			}
--			ifp->mtu6 = ifp->mtu = *(int *)RTA_DATA(tb[IFLA_MTU]);
--			ifp->metric = 0;
--
--			/* Update interface type - NOTE: Only slave_type can
--			 * change. */
--			was_bridge_slave = IS_ZEBRA_IF_BRIDGE_SLAVE(ifp);
--			was_bond_slave = IS_ZEBRA_IF_BOND_SLAVE(ifp);
--			zebra_if_set_ziftype(ifp, zif_type, zif_slave_type);
--
--			memcpy(old_hw_addr, ifp->hw_addr, INTERFACE_HWADDR_MAX);
--
--			/* Update link. */
--			zebra_if_update_link(ifp, link_ifindex, link_nsid);
--
--			ifp->ll_type =
--				netlink_to_zebra_link_type(ifi->ifi_type);
--			netlink_interface_update_hw_addr(tb, ifp);
--
--			if (tb[IFLA_PROTO_DOWN])
--				netlink_proc_dplane_if_protodown(ifp->info, tb);
--
--			if (if_is_no_ptm_operative(ifp)) {
--				bool is_up = if_is_operative(ifp);
--				ifp->flags = ifi->ifi_flags & 0x0000fffff;
--				if (!if_is_no_ptm_operative(ifp) ||
--				    CHECK_FLAG(zif->flags,
--					       ZIF_FLAG_PROTODOWN)) {
--					if (IS_ZEBRA_DEBUG_KERNEL)
--						zlog_debug(
--							"Intf %s(%u) has gone DOWN",
--							name, ifp->ifindex);
--					if_down(ifp);
--					rib_update(RIB_UPDATE_KERNEL);
--				} else if (if_is_operative(ifp)) {
--					bool mac_updated = false;
--
--					/* Must notify client daemons of new
--					 * interface status. */
--					if (IS_ZEBRA_DEBUG_KERNEL)
--						zlog_debug(
--							"Intf %s(%u) PTM up, notifying clients",
--							name, ifp->ifindex);
--					if_up(ifp, !is_up);
--
--					/* Update EVPN VNI when SVI MAC change
--					 */
--					if (memcmp(old_hw_addr, ifp->hw_addr,
--						   INTERFACE_HWADDR_MAX))
--						mac_updated = true;
--					if (IS_ZEBRA_IF_VLAN(ifp)
--					    && mac_updated) {
--						struct interface *link_if;
--
--						link_if =
--						if_lookup_by_index_per_ns(
--						zebra_ns_lookup(NS_DEFAULT),
--								link_ifindex);
--						if (link_if)
--							zebra_vxlan_svi_up(ifp,
--								link_if);
--					} else if (mac_updated
--						   && IS_ZEBRA_IF_BRIDGE(ifp)) {
--						zlog_debug(
--							"Intf %s(%u) bridge changed MAC address",
--							name, ifp->ifindex);
--						chgflags =
--							ZEBRA_BRIDGE_MASTER_MAC_CHANGE;
--					}
--				}
--			} else {
--				ifp->flags = ifi->ifi_flags & 0x0000fffff;
--				if (if_is_operative(ifp) &&
--				    !CHECK_FLAG(zif->flags,
--						ZIF_FLAG_PROTODOWN)) {
--					if (IS_ZEBRA_DEBUG_KERNEL)
--						zlog_debug(
--							"Intf %s(%u) has come UP",
--							name, ifp->ifindex);
--					if_up(ifp, true);
--					if (IS_ZEBRA_IF_BRIDGE(ifp))
--						chgflags =
--							ZEBRA_BRIDGE_MASTER_UP;
--				} else {
--					if (IS_ZEBRA_DEBUG_KERNEL)
--						zlog_debug(
--							"Intf %s(%u) has gone DOWN",
--							name, ifp->ifindex);
--					if_down(ifp);
--					rib_update(RIB_UPDATE_KERNEL);
--				}
--			}
--
--			/* Extract and save L2 interface information, take
--			 * additional actions. */
--			netlink_interface_update_l2info(
--				ifp, linkinfo[IFLA_INFO_DATA],
--				0, link_nsid);
--			if (IS_ZEBRA_IF_BRIDGE(ifp))
--				zebra_l2if_update_bridge(ifp, chgflags);
--			if (IS_ZEBRA_IF_BOND(ifp))
--				zebra_l2if_update_bond(ifp, true);
--			if (IS_ZEBRA_IF_BRIDGE_SLAVE(ifp) || was_bridge_slave)
--				zebra_l2if_update_bridge_slave(
--					ifp, bridge_ifindex, ns_id, chgflags);
--			else if (IS_ZEBRA_IF_BOND_SLAVE(ifp) || was_bond_slave)
--				zebra_l2if_update_bond_slave(ifp, bond_ifindex,
--							     !!bypass);
--			if (IS_ZEBRA_IF_BRIDGE(ifp)) {
--				if (IS_ZEBRA_DEBUG_KERNEL)
--					zlog_debug(
--						"RTM_NEWLINK update for %s(%u), vlan-aware %d",
--						name, ifp->ifindex,
--						IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(
--							zif));
--			}
--		}
-+		netlink_interface_update_hw_addr(tb, ctx);
- 
--		zif = ifp->info;
--		if (zif) {
--			XFREE(MTYPE_ZIF_DESC, zif->desc);
--			if (desc)
--				zif->desc = XSTRDUP(MTYPE_ZIF_DESC, desc);
--		}
-+		/* Extract and save L2 interface information, take
-+		 * additional actions. */
-+		netlink_interface_update_l2info(
-+			ctx, zif_type, linkinfo[IFLA_INFO_DATA], 1, link_nsid);
- 	} else {
--		/* Delete interface notification from kernel */
--		if (ifp == NULL) {
--			if (IS_ZEBRA_DEBUG_KERNEL)
--				zlog_debug(
--					"RTM_DELLINK for unknown interface %s(%u)",
--					name, ifi->ifi_index);
--			return 0;
--		}
--
- 		if (IS_ZEBRA_DEBUG_KERNEL)
--			zlog_debug("RTM_DELLINK for %s(%u)", name,
--				   ifp->ifindex);
--
--		UNSET_FLAG(ifp->status, ZEBRA_INTERFACE_VRF_LOOPBACK);
--
--		if (IS_ZEBRA_IF_BOND(ifp))
--			zebra_l2if_update_bond(ifp, false);
--		if (IS_ZEBRA_IF_BOND_SLAVE(ifp))
--			zebra_l2if_update_bond_slave(ifp, bond_ifindex, false);
--		/* Special handling for bridge or VxLAN interfaces. */
--		if (IS_ZEBRA_IF_BRIDGE(ifp))
--			zebra_l2_bridge_del(ifp);
--		else if (IS_ZEBRA_IF_VXLAN(ifp))
--			zebra_l2_vxlanif_del(ifp);
--
--		if_delete_update(&ifp);
--
--		/* If VRF, delete the VRF structure itself. */
--		if (zif_type == ZEBRA_IF_VRF && !vrf_is_backend_netns())
--			netlink_vrf_change(h, tb[IFLA_LINKINFO], ns_id, name);
-+			zlog_debug("RTM_DELLINK for %s(%u), enqueuing to zebra",
-+				   name, ifi->ifi_index);
-+
-+		dplane_ctx_set_op(ctx, DPLANE_OP_INTF_DELETE);
-+		dplane_ctx_set_status(ctx, ZEBRA_DPLANE_REQUEST_QUEUED);
-+
-+		dplane_ctx_set_ifp_bond_ifindex(ctx, bond_ifindex);
- 	}
- 
-+	dplane_provider_enqueue_to_zebra(ctx);
-+
- 	return 0;
- }
- 
-@@ -2111,6 +1709,13 @@ ssize_t netlink_intf_msg_encode(uint16_t cmd,
- void interface_list(struct zebra_ns *zns)
- {
- 	interface_lookup_netlink(zns);
-+
-+	zebra_dplane_startup_stage(zns, ZEBRA_DPLANE_INTERFACES_READ);
-+}
-+
-+void interface_list_second(struct zebra_ns *zns)
-+{
-+	zebra_if_update_all_links(zns);
- 	/* We add routes for interface address,
- 	 * so we need to get the nexthop info
- 	 * from the kernel before we can do that
-@@ -2118,6 +1723,8 @@ void interface_list(struct zebra_ns *zns)
- 	netlink_nexthop_read(zns);
- 
- 	interface_addr_lookup_netlink(zns);
-+
-+	zebra_dplane_startup_stage(zns, ZEBRA_DPLANE_ADDRESSES_READ);
- }
- 
- /**
-diff --git a/zebra/interface.c b/zebra/interface.c
-index a05b9690ef..bfe7a06896 100644
---- a/zebra/interface.c
-+++ b/zebra/interface.c
-@@ -1298,6 +1298,9 @@ static void zebra_if_addr_update_ctx(struct zebra_dplane_ctx *ctx,
- 	const struct prefix *addr, *dest = NULL;
- 	enum dplane_op_e op;
- 
-+	if (!ifp)
-+		return;
-+
- 	op = dplane_ctx_get_op(ctx);
- 	addr = dplane_ctx_get_intf_addr(ctx);
- 
-@@ -1416,6 +1419,13 @@ static void zebra_if_netconf_update_ctx(struct zebra_dplane_ctx *ctx,
- 	enum dplane_netconf_status_e mpls, mcast_on, linkdown;
- 	bool *mcast_set, *linkdown_set;
- 
-+	if (!ifp && ifindex != -1 && ifindex != -2) {
-+		if (IS_ZEBRA_DEBUG_KERNEL)
-+			zlog_debug("%s: Can't find ifp(%u)", __func__, ifindex);
-+
-+		return;
-+	}
-+
- 	afi = dplane_ctx_get_afi(ctx);
- 	mpls = dplane_ctx_get_netconf_mpls(ctx);
- 	linkdown = dplane_ctx_get_netconf_linkdown(ctx);
-@@ -1485,6 +1495,686 @@ static void zebra_if_netconf_update_ctx(struct zebra_dplane_ctx *ctx,
- 			(*linkdown_set ? "ON" : "OFF"));
- }
- 
-+static void interface_vrf_change(enum dplane_op_e op, ifindex_t ifindex,
-+				 const char *name, uint32_t tableid,
-+				 ns_id_t ns_id)
-+{
-+	struct vrf *vrf;
-+	struct zebra_vrf *zvrf = NULL;
-+
-+	if (op == DPLANE_OP_INTF_DELETE) {
-+		if (IS_ZEBRA_DEBUG_DPLANE)
-+			zlog_debug("DPLANE_OP_INTF_DELETE for VRF %s(%u)", name,
-+				   ifindex);
-+
-+		vrf = vrf_lookup_by_id((vrf_id_t)ifindex);
-+		if (!vrf) {
-+			flog_warn(EC_ZEBRA_VRF_NOT_FOUND,
-+				  "%s(%u): vrf not found", name, ifindex);
-+			return;
-+		}
-+
-+		vrf_delete(vrf);
-+	} else {
-+		if (IS_ZEBRA_DEBUG_DPLANE)
-+			zlog_debug(
-+				"DPLANE_OP_INTF_UPDATE for VRF %s(%u) table %u",
-+				name, ifindex, tableid);
-+
-+		if (!vrf_lookup_by_id((vrf_id_t)ifindex)) {
-+			vrf_id_t exist_id;
-+
-+			exist_id = zebra_vrf_lookup_by_table(tableid, ns_id);
-+			if (exist_id != VRF_DEFAULT) {
-+				vrf = vrf_lookup_by_id(exist_id);
-+
-+				flog_err(
-+					EC_ZEBRA_VRF_MISCONFIGURED,
-+					"VRF %s id %u table id overlaps existing vrf %s(%d), misconfiguration exiting",
-+					name, ifindex, vrf->name, vrf->vrf_id);
-+				exit(-1);
-+			}
-+		}
-+
-+		vrf = vrf_update((vrf_id_t)ifindex, name);
-+		if (!vrf) {
-+			flog_err(EC_LIB_INTERFACE, "VRF %s id %u not created",
-+				 name, ifindex);
-+			return;
-+		}
-+
-+		/*
-+		 * This is the only place that we get the actual kernel table_id
-+		 * being used.  We need it to set the table_id of the routes
-+		 * we are passing to the kernel.... And to throw some totally
-+		 * awesome parties. that too.
-+		 *
-+		 * At this point we *must* have a zvrf because the vrf_create
-+		 * callback creates one.  We *must* set the table id
-+		 * before the vrf_enable because of( at the very least )
-+		 * static routes being delayed for installation until
-+		 * during the vrf_enable callbacks.
-+		 */
-+		zvrf = (struct zebra_vrf *)vrf->info;
-+		zvrf->table_id = tableid;
-+
-+		/* Enable the created VRF. */
-+		if (!vrf_enable(vrf)) {
-+			flog_err(EC_LIB_INTERFACE,
-+				 "Failed to enable VRF %s id %u", name,
-+				 ifindex);
-+			return;
-+		}
-+	}
-+}
-+
-+/*
-+ *  Note: on netlink systems, there should be a 1-to-1 mapping
-+ * between interface names and ifindex values.
-+ */
-+static void set_ifindex(struct interface *ifp, ifindex_t ifi_index,
-+			struct zebra_ns *zns)
-+{
-+	struct interface *oifp;
-+
-+	oifp = if_lookup_by_index_per_ns(zns, ifi_index);
-+	if ((oifp != NULL) && (oifp != ifp)) {
-+		if (ifi_index == IFINDEX_INTERNAL)
-+			flog_err(
-+				EC_LIB_INTERFACE,
-+				"Netlink is setting interface %s ifindex to reserved internal value %u",
-+				ifp->name, ifi_index);
-+		else {
-+			if (IS_ZEBRA_DEBUG_KERNEL)
-+				zlog_debug(
-+					"interface index %d was renamed from %s to %s",
-+					ifi_index, oifp->name, ifp->name);
-+			if (if_is_up(oifp))
-+				flog_err(
-+					EC_LIB_INTERFACE,
-+					"interface rename detected on up interface: index %d was renamed from %s to %s, results are uncertain!",
-+					ifi_index, oifp->name, ifp->name);
-+			if_delete_update(&oifp);
-+		}
-+	}
-+	if_set_index(ifp, ifi_index);
-+}
-+
-+static inline void zebra_if_set_ziftype(struct interface *ifp,
-+					enum zebra_iftype zif_type,
-+					enum zebra_slave_iftype zif_slave_type)
-+{
-+	struct zebra_if *zif;
-+
-+	zif = (struct zebra_if *)ifp->info;
-+	zif->zif_slave_type = zif_slave_type;
-+
-+	if (zif->zif_type != zif_type) {
-+		zif->zif_type = zif_type;
-+		/* If the if_type has been set to bond initialize ES info
-+		 * against it. XXX - note that we don't handle the case where
-+		 * a zif changes from bond to non-bond; it is really
-+		 * an unexpected/error condition.
-+		 */
-+		zebra_evpn_if_init(zif);
-+	}
-+}
-+
-+static void interface_update_hw_addr(struct zebra_dplane_ctx *ctx,
-+				     struct interface *ifp)
-+{
-+	int i;
-+
-+	ifp->hw_addr_len = dplane_ctx_get_ifp_hw_addr_len(ctx);
-+	memcpy(ifp->hw_addr, dplane_ctx_get_ifp_hw_addr(ctx), ifp->hw_addr_len);
-+
-+	for (i = 0; i < ifp->hw_addr_len; i++)
-+		if (ifp->hw_addr[i] != 0)
-+			break;
-+
-+	if (i == ifp->hw_addr_len)
-+		ifp->hw_addr_len = 0;
-+}
-+
-+static void interface_update_l2info(struct zebra_dplane_ctx *ctx,
-+				    struct interface *ifp,
-+				    enum zebra_iftype zif_type, int add,
-+				    ns_id_t link_nsid)
-+{
-+	const struct zebra_l2info_vxlan *vxlan_info;
-+	const struct zebra_l2info_gre *gre_info;
-+
-+	switch (zif_type) {
-+	case ZEBRA_IF_BRIDGE:
-+		zebra_l2_bridge_add_update(ifp,
-+					   dplane_ctx_get_ifp_bridge_info(ctx));
-+		break;
-+	case ZEBRA_IF_VLAN:
-+		zebra_l2_vlanif_update(ifp, dplane_ctx_get_ifp_vlan_info(ctx));
-+		zebra_evpn_acc_bd_svi_set(ifp->info, NULL,
-+					  !!if_is_operative(ifp));
-+		break;
-+	case ZEBRA_IF_VXLAN:
-+		vxlan_info = dplane_ctx_get_ifp_vxlan_info(ctx);
-+		zebra_l2_vxlanif_add_update(ifp, vxlan_info, add);
-+		if (link_nsid != NS_UNKNOWN && vxlan_info->ifindex_link)
-+			zebra_if_update_link(ifp, vxlan_info->ifindex_link,
-+					     link_nsid);
-+		break;
-+	case ZEBRA_IF_GRE:
-+		gre_info = dplane_ctx_get_ifp_gre_info(ctx);
-+		zebra_l2_greif_add_update(ifp, gre_info, add);
-+		if (link_nsid != NS_UNKNOWN && gre_info->ifindex_link)
-+			zebra_if_update_link(ifp, gre_info->ifindex_link,
-+					     link_nsid);
-+		break;
-+	case ZEBRA_IF_OTHER:
-+	case ZEBRA_IF_VRF:
-+	case ZEBRA_IF_MACVLAN:
-+	case ZEBRA_IF_VETH:
-+	case ZEBRA_IF_BOND:
-+	case ZEBRA_IF_BOND_SLAVE:
-+		break;
-+	}
-+}
-+
-+static bool is_if_protodown_reason_only_frr(uint32_t rc_bitfield)
-+{
-+	uint8_t frr_protodown_r_bit = if_netlink_get_frr_protodown_r_bit();
-+
-+	return (rc_bitfield == (((uint32_t)1) << frr_protodown_r_bit));
-+}
-+
-+static void interface_if_protodown(struct interface *ifp, bool protodown,
-+				   uint32_t rc_bitfield)
-+{
-+	struct zebra_if *zif = ifp->info;
-+	bool old_protodown;
-+
-+	/*
-+	 * Set our reason code to note it wasn't us.
-+	 * If the reason we got from the kernel is ONLY frr though, don't
-+	 * set it.
-+	 */
-+	COND_FLAG(zif->protodown_rc, ZEBRA_PROTODOWN_EXTERNAL,
-+		  protodown && rc_bitfield &&
-+			  !is_if_protodown_reason_only_frr(rc_bitfield));
-+
-+
-+	old_protodown = !!ZEBRA_IF_IS_PROTODOWN(zif);
-+	if (protodown == old_protodown)
-+		return;
-+
-+	if (IS_ZEBRA_DEBUG_EVPN_MH_ES || IS_ZEBRA_DEBUG_DPLANE)
-+		zlog_debug("interface %s dplane change, protodown %s",
-+			   ifp->name, protodown ? "on" : "off");
-+
-+	/* Set protodown, respectively */
-+	COND_FLAG(zif->flags, ZIF_FLAG_PROTODOWN, protodown);
-+
-+	if (zebra_evpn_is_es_bond_member(ifp)) {
-+		/* Check it's not already being sent to the dplane first */
-+		if (protodown &&
-+		    CHECK_FLAG(zif->flags, ZIF_FLAG_SET_PROTODOWN)) {
-+			if (IS_ZEBRA_DEBUG_EVPN_MH_ES || IS_ZEBRA_DEBUG_KERNEL)
-+				zlog_debug(
-+					"bond mbr %s protodown on recv'd but already sent protodown on to the dplane",
-+					ifp->name);
-+			return;
-+		}
-+
-+		if (!protodown &&
-+		    CHECK_FLAG(zif->flags, ZIF_FLAG_UNSET_PROTODOWN)) {
-+			if (IS_ZEBRA_DEBUG_EVPN_MH_ES || IS_ZEBRA_DEBUG_KERNEL)
-+				zlog_debug(
-+					"bond mbr %s protodown off recv'd but already sent protodown off to the dplane",
-+					ifp->name);
-+			return;
-+		}
-+
-+		if (IS_ZEBRA_DEBUG_EVPN_MH_ES || IS_ZEBRA_DEBUG_KERNEL)
-+			zlog_debug(
-+				"bond mbr %s reinstate protodown %s in the dplane",
-+				ifp->name, old_protodown ? "on" : "off");
-+
-+		if (old_protodown)
-+			SET_FLAG(zif->flags, ZIF_FLAG_SET_PROTODOWN);
-+		else
-+			SET_FLAG(zif->flags, ZIF_FLAG_UNSET_PROTODOWN);
-+
-+		dplane_intf_update(zif->ifp);
-+	}
-+}
-+
-+static void if_sweep_protodown(struct zebra_if *zif)
-+{
-+	bool protodown;
-+
-+	protodown = !!ZEBRA_IF_IS_PROTODOWN(zif);
-+
-+	if (!protodown)
-+		return;
-+
-+	if (IS_ZEBRA_DEBUG_KERNEL)
-+		zlog_debug("interface %s sweeping protodown %s reason 0x%x",
-+			   zif->ifp->name, protodown ? "on" : "off",
-+			   zif->protodown_rc);
-+
-+	/* Only clear our reason codes, leave external if it was set */
-+	UNSET_FLAG(zif->protodown_rc, ZEBRA_PROTODOWN_ALL);
-+	dplane_intf_update(zif->ifp);
-+}
-+
-+static void interface_bridge_vxlan_update(struct zebra_dplane_ctx *ctx,
-+					  struct interface *ifp)
-+{
-+	const struct zebra_dplane_bridge_vlan_info *bvinfo;
-+
-+	bvinfo = dplane_ctx_get_ifp_bridge_vlan_info(ctx);
-+
-+	if (!(bvinfo->flags & DPLANE_BRIDGE_VLAN_INFO_PVID))
-+		return;
-+
-+	if (IS_ZEBRA_DEBUG_DPLANE)
-+		zlog_debug("Access VLAN %u for VxLAN IF %s(%u)", bvinfo->vid,
-+			   ifp->name, ifp->ifindex);
-+
-+	zebra_l2_vxlanif_update_access_vlan(ifp, bvinfo->vid);
-+}
-+
-+static void interface_bridge_vlan_update(struct zebra_dplane_ctx *ctx,
-+					 struct interface *ifp)
-+{
-+	struct zebra_if *zif = ifp->info;
-+	const struct zebra_dplane_bridge_vlan_info_array *bvarray;
-+	struct zebra_dplane_bridge_vlan_info bvinfo;
-+	bitfield_t old_vlan_bitmap;
-+	uint16_t vid_range_start = 0;
-+	int32_t i;
-+
-+	/* cache the old bitmap addrs */
-+	old_vlan_bitmap = zif->vlan_bitmap;
-+	/* create a new bitmap space for re-eval */
-+	bf_init(zif->vlan_bitmap, IF_VLAN_BITMAP_MAX);
-+
-+	/* Could we have multiple bridge vlan infos? */
-+	bvarray = dplane_ctx_get_ifp_bridge_vlan_info_array(ctx);
-+	if (!bvarray)
-+		return;
-+
-+	for (i = 0; i < bvarray->count; i++) {
-+		bvinfo = bvarray->array[i];
-+
-+		if (bvinfo.flags & DPLANE_BRIDGE_VLAN_INFO_RANGE_BEGIN) {
-+			vid_range_start = bvinfo.vid;
-+			continue;
-+		}
-+
-+		if (!(bvinfo.flags & DPLANE_BRIDGE_VLAN_INFO_RANGE_END))
-+			vid_range_start = bvinfo.vid;
-+
-+		zebra_vlan_bitmap_compute(ifp, vid_range_start, bvinfo.vid);
-+	}
-+
-+	zebra_vlan_mbr_re_eval(ifp, old_vlan_bitmap);
-+	bf_free(old_vlan_bitmap);
-+}
-+
-+static void interface_bridge_handling(struct zebra_dplane_ctx *ctx,
-+				      struct interface *ifp,
-+				      enum zebra_iftype zif_type)
-+{
-+	struct zebra_if *zif;
-+
-+	if (!ifp) {
-+		zlog_warn("Cannot find bridge if %s(%u)",
-+			  dplane_ctx_get_ifname(ctx),
-+			  dplane_ctx_get_ifindex(ctx));
-+		return;
-+	}
-+
-+	if (IS_ZEBRA_IF_VXLAN(ifp))
-+		return interface_bridge_vxlan_update(ctx, ifp);
-+
-+	/*
-+	 * build vlan bitmap associated with this interface if that
-+	 * device type is interested in the vlans
-+	 */
-+	zif = ifp->info;
-+	if (bf_is_inited(zif->vlan_bitmap))
-+		interface_bridge_vlan_update(ctx, ifp);
-+}
-+
-+static void zebra_if_dplane_ifp_handling(struct zebra_dplane_ctx *ctx)
-+{
-+	enum dplane_op_e op = dplane_ctx_get_op(ctx);
-+	const char *name = dplane_ctx_get_ifname(ctx);
-+	ns_id_t ns_id = dplane_ctx_get_ns_id(ctx);
-+	ifindex_t ifindex = dplane_ctx_get_ifindex(ctx);
-+	ifindex_t bond_ifindex = dplane_ctx_get_ifp_bond_ifindex(ctx);
-+	uint32_t tableid = dplane_ctx_get_ifp_table_id(ctx);
-+	enum zebra_iftype zif_type = dplane_ctx_get_ifp_zif_type(ctx);
-+	struct interface *ifp;
-+	struct zebra_ns *zns;
-+
-+	zns = zebra_ns_lookup(ns_id);
-+	if (!zns) {
-+		zlog_err("Where is our namespace?");
-+		return;
-+	}
-+
-+	if (IS_ZEBRA_DEBUG_DPLANE)
-+		zlog_debug("%s for %s(%u)", dplane_op2str(op), name, ifindex);
-+
-+	ifp = if_lookup_by_name_per_ns(zns, name);
-+	if (op == DPLANE_OP_INTF_DELETE) {
-+		/* Delete interface notification from kernel */
-+		if (ifp == NULL) {
-+			if (IS_ZEBRA_DEBUG_EVENT)
-+				zlog_debug(
-+					"Delete LINK received for unknown interface %s(%u)",
-+					name, ifindex);
-+			return;
-+		}
-+
-+		if (IS_ZEBRA_IF_BOND(ifp))
-+			zebra_l2if_update_bond(ifp, false);
-+		if (IS_ZEBRA_IF_BOND_SLAVE(ifp))
-+			zebra_l2if_update_bond_slave(ifp, bond_ifindex, false);
-+		/* Special handling for bridge or VxLAN interfaces. */
-+		if (IS_ZEBRA_IF_BRIDGE(ifp))
-+			zebra_l2_bridge_del(ifp);
-+		else if (IS_ZEBRA_IF_VXLAN(ifp))
-+			zebra_l2_vxlanif_del(ifp);
-+
-+		if_delete_update(&ifp);
-+
-+		if (zif_type == ZEBRA_IF_VRF && !vrf_is_backend_netns())
-+			interface_vrf_change(op, ifindex, name, tableid, ns_id);
-+	} else {
-+		ifindex_t master_ifindex, bridge_ifindex, bond_ifindex,
-+			link_ifindex;
-+		enum zebra_slave_iftype zif_slave_type;
-+		uint8_t bypass;
-+		uint64_t flags;
-+		vrf_id_t vrf_id;
-+		uint32_t mtu;
-+		ns_id_t link_nsid;
-+		struct zebra_if *zif;
-+		bool protodown, protodown_set, startup;
-+		uint32_t rc_bitfield;
-+		uint8_t old_hw_addr[INTERFACE_HWADDR_MAX];
-+		char *desc;
-+		uint8_t family;
-+
-+		/* If VRF, create or update the VRF structure itself. */
-+		if (zif_type == ZEBRA_IF_VRF && !vrf_is_backend_netns())
-+			interface_vrf_change(op, ifindex, name, tableid, ns_id);
-+
-+		master_ifindex = dplane_ctx_get_ifp_master_ifindex(ctx);
-+		zif_slave_type = dplane_ctx_get_ifp_zif_slave_type(ctx);
-+		bridge_ifindex = dplane_ctx_get_ifp_bridge_ifindex(ctx);
-+		bond_ifindex = dplane_ctx_get_ifp_bond_ifindex(ctx);
-+		bypass = dplane_ctx_get_ifp_bypass(ctx);
-+		flags = dplane_ctx_get_ifp_flags(ctx);
-+		vrf_id = dplane_ctx_get_ifp_vrf_id(ctx);
-+		mtu = dplane_ctx_get_ifp_mtu(ctx);
-+		link_ifindex = dplane_ctx_get_ifp_link_ifindex(ctx);
-+		link_nsid = dplane_ctx_get_ifp_link_nsid(ctx);
-+		protodown_set = dplane_ctx_get_ifp_protodown_set(ctx);
-+		protodown = dplane_ctx_get_ifp_protodown(ctx);
-+		rc_bitfield = dplane_ctx_get_ifp_rc_bitfield(ctx);
-+		startup = dplane_ctx_get_ifp_startup(ctx);
-+		desc = dplane_ctx_get_ifp_desc(ctx);
-+		family = dplane_ctx_get_ifp_family(ctx);
-+
-+#ifndef AF_BRIDGE
-+		/*
-+		 * Work around to make free bsd happy at the moment
-+		 */
-+#define AF_BRIDGE 7
-+#endif
-+		if (family == AF_BRIDGE)
-+			return interface_bridge_handling(ctx, ifp, zif_type);
-+
-+		if (ifp == NULL ||
-+		    !CHECK_FLAG(ifp->status, ZEBRA_INTERFACE_ACTIVE)) {
-+			/* Add interface notification from kernel */
-+			if (IS_ZEBRA_DEBUG_KERNEL)
-+				zlog_debug(
-+					"RTM_NEWLINK ADD for %s(%u) vrf_id %u type %d sl_type %d master %u",
-+					name, ifindex, vrf_id, zif_type,
-+					zif_slave_type, master_ifindex);
-+
-+			if (ifp == NULL) {
-+				/* unknown interface */
-+				ifp = if_get_by_name(name, vrf_id, NULL);
-+			} else {
-+				/* pre-configured interface, learnt now */
-+				if (ifp->vrf->vrf_id != vrf_id)
-+					if_update_to_new_vrf(ifp, vrf_id);
-+			}
-+
-+			/* Update interface information. */
-+			set_ifindex(ifp, ifindex, zns);
-+			ifp->flags = flags;
-+			ifp->mtu6 = ifp->mtu = mtu;
-+			ifp->metric = 0;
-+			ifp->speed = kernel_get_speed(ifp, NULL);
-+			ifp->ptm_status = ZEBRA_PTM_STATUS_UNKNOWN;
-+
-+			/* Set interface type */
-+			zebra_if_set_ziftype(ifp, zif_type, zif_slave_type);
-+			if (IS_ZEBRA_IF_VRF(ifp))
-+				SET_FLAG(ifp->status,
-+					 ZEBRA_INTERFACE_VRF_LOOPBACK);
-+
-+			/* Update link. */
-+			zebra_if_update_link(ifp, link_ifindex, link_nsid);
-+
-+			/*
-+			 * Just set the @link/lower-device ifindex. During
-+			 * nldump interfaces are not ordered in any fashion so
-+			 * we may end up getting upper devices before lower
-+			 * devices. We will setup the real linkage once the dump
-+			 * is complete.
-+			 */
-+			zif = (struct zebra_if *)ifp->info;
-+			zif->link_ifindex = link_ifindex;
-+
-+			ifp->ll_type = dplane_ctx_get_ifp_zltype(ctx);
-+			interface_update_hw_addr(ctx, ifp);
-+
-+			/* Inform clients, install any configured addresses. */
-+			if_add_update(ifp);
-+
-+			/*
-+			 * Extract and save L2 interface information, take
-+			 * additional actions.
-+			 */
-+			interface_update_l2info(ctx, ifp, zif_type, 1,
-+						link_nsid);
-+			if (IS_ZEBRA_IF_BOND(ifp))
-+				zebra_l2if_update_bond(ifp, true);
-+			if (IS_ZEBRA_IF_BRIDGE_SLAVE(ifp))
-+				zebra_l2if_update_bridge_slave(
-+					ifp, bridge_ifindex, ns_id,
-+					ZEBRA_BRIDGE_NO_ACTION);
-+			else if (IS_ZEBRA_IF_BOND_SLAVE(ifp))
-+				zebra_l2if_update_bond_slave(ifp, bond_ifindex,
-+							     !!bypass);
-+
-+			if (protodown_set) {
-+				interface_if_protodown(ifp, protodown,
-+						       rc_bitfield);
-+				if (startup)
-+					if_sweep_protodown(zif);
-+			}
-+
-+			if (IS_ZEBRA_IF_BRIDGE(ifp)) {
-+				if (IS_ZEBRA_DEBUG_KERNEL)
-+					zlog_debug(
-+						"RTM_NEWLINK ADD for %s(%u), vlan-aware %d",
-+						name, ifp->ifindex,
-+						IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(
-+							zif));
-+			}
-+		} else if (ifp->vrf->vrf_id != vrf_id) {
-+			/* VRF change for an interface. */
-+			if (IS_ZEBRA_DEBUG_KERNEL)
-+				zlog_debug(
-+					"RTM_NEWLINK vrf-change for %s(%u) vrf_id %u -> %u",
-+					name, ifp->ifindex, ifp->vrf->vrf_id,
-+					vrf_id);
-+
-+			if_handle_vrf_change(ifp, vrf_id);
-+		} else {
-+			bool was_bridge_slave, was_bond_slave;
-+			uint8_t chgflags = ZEBRA_BRIDGE_NO_ACTION;
-+
-+			zif = ifp->info;
-+
-+			/* Interface update. */
-+			if (IS_ZEBRA_DEBUG_KERNEL)
-+				zlog_debug(
-+					"RTM_NEWLINK update for %s(%u) sl_type %d master %u",
-+					name, ifp->ifindex, zif_slave_type,
-+					master_ifindex);
-+
-+			set_ifindex(ifp, ifindex, zns);
-+			ifp->mtu6 = ifp->mtu = mtu;
-+			ifp->metric = 0;
-+
-+			/*
-+			 * Update interface type - NOTE: Only slave_type can
-+			 * change.
-+			 */
-+			was_bridge_slave = IS_ZEBRA_IF_BRIDGE_SLAVE(ifp);
-+			was_bond_slave = IS_ZEBRA_IF_BOND_SLAVE(ifp);
-+			zebra_if_set_ziftype(ifp, zif_type, zif_slave_type);
-+
-+			memcpy(old_hw_addr, ifp->hw_addr, INTERFACE_HWADDR_MAX);
-+
-+			/* Update link. */
-+			zebra_if_update_link(ifp, link_ifindex, link_nsid);
-+
-+			ifp->ll_type = dplane_ctx_get_ifp_zltype(ctx);
-+			interface_update_hw_addr(ctx, ifp);
-+
-+			if (protodown_set)
-+				interface_if_protodown(ifp, protodown,
-+						       rc_bitfield);
-+
-+			if (if_is_no_ptm_operative(ifp)) {
-+				bool is_up = if_is_operative(ifp);
-+
-+				ifp->flags = flags;
-+				if (!if_is_no_ptm_operative(ifp) ||
-+				    CHECK_FLAG(zif->flags,
-+					       ZIF_FLAG_PROTODOWN)) {
-+					if (IS_ZEBRA_DEBUG_KERNEL)
-+						zlog_debug(
-+							"Intf %s(%u) has gone DOWN",
-+							name, ifp->ifindex);
-+					if_down(ifp);
-+					rib_update(RIB_UPDATE_KERNEL);
-+				} else if (if_is_operative(ifp)) {
-+					bool mac_updated = false;
-+
-+					/*
-+					 * Must notify client daemons of new
-+					 * interface status.
-+					 */
-+					if (IS_ZEBRA_DEBUG_KERNEL)
-+						zlog_debug(
-+							"Intf %s(%u) PTM up, notifying clients",
-+							name, ifp->ifindex);
-+					if_up(ifp, !is_up);
-+
-+					/*
-+					 * Update EVPN VNI when SVI MAC change
-+					 */
-+					if (memcmp(old_hw_addr, ifp->hw_addr,
-+						   INTERFACE_HWADDR_MAX))
-+						mac_updated = true;
-+					if (IS_ZEBRA_IF_VLAN(ifp) &&
-+					    mac_updated) {
-+						struct interface *link_if;
-+
-+						link_if = if_lookup_by_index_per_ns(
-+							zebra_ns_lookup(
-+								NS_DEFAULT),
-+							link_ifindex);
-+						if (link_if)
-+							zebra_vxlan_svi_up(
-+								ifp, link_if);
-+					} else if (mac_updated &&
-+						   IS_ZEBRA_IF_BRIDGE(ifp)) {
-+						zlog_debug(
-+							"Intf %s(%u) bridge changed MAC address",
-+							name, ifp->ifindex);
-+						chgflags =
-+							ZEBRA_BRIDGE_MASTER_MAC_CHANGE;
-+					}
-+				}
-+			} else {
-+				ifp->flags = flags;
-+				if (if_is_operative(ifp) &&
-+				    !CHECK_FLAG(zif->flags,
-+						ZIF_FLAG_PROTODOWN)) {
-+					if (IS_ZEBRA_DEBUG_KERNEL)
-+						zlog_debug(
-+							"Intf %s(%u) has come UP",
-+							name, ifp->ifindex);
-+					if_up(ifp, true);
-+					if (IS_ZEBRA_IF_BRIDGE(ifp))
-+						chgflags =
-+							ZEBRA_BRIDGE_MASTER_UP;
-+				} else {
-+					if (IS_ZEBRA_DEBUG_KERNEL)
-+						zlog_debug(
-+							"Intf %s(%u) has gone DOWN",
-+							name, ifp->ifindex);
-+					if_down(ifp);
-+					rib_update(RIB_UPDATE_KERNEL);
-+				}
-+			}
-+
-+			/*
-+			 * Extract and save L2 interface information, take
-+			 * additional actions.
-+			 */
-+			interface_update_l2info(ctx, ifp, zif_type, 0,
-+						link_nsid);
-+			if (IS_ZEBRA_IF_BRIDGE(ifp))
-+				zebra_l2if_update_bridge(ifp, chgflags);
-+			if (IS_ZEBRA_IF_BOND(ifp))
-+				zebra_l2if_update_bond(ifp, true);
-+			if (IS_ZEBRA_IF_BRIDGE_SLAVE(ifp) || was_bridge_slave)
-+				zebra_l2if_update_bridge_slave(
-+					ifp, bridge_ifindex, ns_id, chgflags);
-+			else if (IS_ZEBRA_IF_BOND_SLAVE(ifp) || was_bond_slave)
-+				zebra_l2if_update_bond_slave(ifp, bond_ifindex,
-+							     !!bypass);
-+			if (IS_ZEBRA_IF_BRIDGE(ifp)) {
-+				if (IS_ZEBRA_DEBUG_KERNEL)
-+					zlog_debug(
-+						"RTM_NEWLINK update for %s(%u), vlan-aware %d",
-+						name, ifp->ifindex,
-+						IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(
-+							zif));
-+			}
-+		}
-+
-+		zif = ifp->info;
-+		if (zif) {
-+			XFREE(MTYPE_ZIF_DESC, zif->desc);
-+			if (desc[0])
-+				zif->desc = XSTRDUP(MTYPE_ZIF_DESC, desc);
-+		}
-+	}
-+}
-+
- void zebra_if_dplane_result(struct zebra_dplane_ctx *ctx)
- {
- 	struct zebra_ns *zns;
-@@ -1514,17 +2204,6 @@ void zebra_if_dplane_result(struct zebra_dplane_ctx *ctx)
- 	}
- 
- 	ifp = if_lookup_by_index_per_ns(zns, ifindex);
--	if (ifp == NULL) {
--		if (op != DPLANE_OP_INTF_NETCONFIG ||
--		    (ifindex != -1 && ifindex != -2)) {
--			if (IS_ZEBRA_DEBUG_KERNEL)
--				zlog_debug(
--					"%s: can't find ifp at nsid %u index %d",
--					__func__, ns_id, ifindex);
--
--			return;
--		}
--	}
- 
- 	switch (op) {
- 	case DPLANE_OP_INTF_ADDR_ADD:
-@@ -1535,7 +2214,15 @@ void zebra_if_dplane_result(struct zebra_dplane_ctx *ctx)
- 	case DPLANE_OP_INTF_INSTALL:
- 	case DPLANE_OP_INTF_UPDATE:
- 	case DPLANE_OP_INTF_DELETE:
--		zebra_if_update_ctx(ctx, ifp);
-+		/*
-+		 * Queued from the dplane means it is something
-+		 * that we need to handle( create/delete the
-+		 * interface as needed )
-+		 */
-+		if (dp_res == ZEBRA_DPLANE_REQUEST_QUEUED)
-+			zebra_if_dplane_ifp_handling(ctx);
-+		else
-+			zebra_if_update_ctx(ctx, ifp);
- 		break;
- 
- 	case DPLANE_OP_INTF_NETCONFIG:
-diff --git a/zebra/kernel_netlink.c b/zebra/kernel_netlink.c
-index 4cd84cada2..3756a4ab0c 100644
---- a/zebra/kernel_netlink.c
-+++ b/zebra/kernel_netlink.c
-@@ -410,7 +410,7 @@ static int netlink_information_fetch(struct nlmsghdr *h, ns_id_t ns_id,
- 	case RTM_NEWLINK:
- 		return netlink_link_change(h, ns_id, startup);
- 	case RTM_DELLINK:
--		return netlink_link_change(h, ns_id, startup);
-+		return 0;
- 	case RTM_NEWNEIGH:
- 	case RTM_DELNEIGH:
- 	case RTM_GETNEIGH:
-@@ -482,6 +482,7 @@ static int dplane_netlink_information_fetch(struct nlmsghdr *h, ns_id_t ns_id,
- 
- 	case RTM_NEWLINK:
- 	case RTM_DELLINK:
-+		return netlink_link_change(h, ns_id, startup);
- 
- 	default:
- 		break;
-@@ -1170,7 +1171,6 @@ int netlink_parse_info(int (*filter)(struct nlmsghdr *, ns_id_t, int),
- 					h->nlmsg_type, h->nlmsg_len,
- 					h->nlmsg_seq, h->nlmsg_pid);
- 
--
- 			/*
- 			 * Ignore messages that maybe sent from
- 			 * other actors besides the kernel
-@@ -1774,17 +1774,11 @@ void kernel_init(struct zebra_ns *zns)
- 	 * lead to confusion, so we need to convert the
- 	 * RTNLGRP_XXX to a bit position for ourself
- 	 */
--	groups = RTMGRP_LINK                   |
--			RTMGRP_IPV4_ROUTE              |
--			RTMGRP_IPV4_IFADDR             |
--			RTMGRP_IPV6_ROUTE              |
--			RTMGRP_IPV6_IFADDR             |
--			RTMGRP_IPV4_MROUTE             |
--			RTMGRP_NEIGH                   |
--			((uint32_t) 1 << (RTNLGRP_IPV4_RULE - 1)) |
--			((uint32_t) 1 << (RTNLGRP_IPV6_RULE - 1)) |
--			((uint32_t) 1 << (RTNLGRP_NEXTHOP - 1))   |
--			((uint32_t) 1 << (RTNLGRP_TC - 1));
-+	groups = RTMGRP_IPV4_ROUTE | RTMGRP_IPV6_ROUTE | RTMGRP_IPV4_MROUTE |
-+		 RTMGRP_NEIGH | ((uint32_t)1 << (RTNLGRP_IPV4_RULE - 1)) |
-+		 ((uint32_t)1 << (RTNLGRP_IPV6_RULE - 1)) |
-+		 ((uint32_t)1 << (RTNLGRP_NEXTHOP - 1)) |
-+		 ((uint32_t)1 << (RTNLGRP_TC - 1));
- 
- 	dplane_groups = (RTMGRP_LINK            |
- 			 RTMGRP_IPV4_IFADDR     |
-diff --git a/zebra/kernel_socket.c b/zebra/kernel_socket.c
-index f3462b9f22..98553edae6 100644
---- a/zebra/kernel_socket.c
-+++ b/zebra/kernel_socket.c
-@@ -1482,6 +1482,14 @@ static void routing_socket(struct zebra_ns *zns)
- 	thread_add_read(zrouter.master, kernel_read, NULL, routing_sock, NULL);
- }
- 
-+void interface_list_second(struct zebra_ns *zns)
-+{
-+}
-+
-+void interface_list_tunneldump(struct zebra_ns *zns)
-+{
-+}
-+
- /* Exported interface function.  This function simply calls
-    routing_socket (). */
- void kernel_init(struct zebra_ns *zns)
-diff --git a/zebra/rt.h b/zebra/rt.h
-index 6f4dd48a54..3e91cdfffa 100644
---- a/zebra/rt.h
-+++ b/zebra/rt.h
-@@ -99,6 +99,8 @@ extern int kernel_get_ipmr_sg_stats(struct zebra_vrf *zvrf, void *mroute);
-  * state.
-  */
- extern void interface_list(struct zebra_ns *zns);
-+extern void interface_list_tunneldump(struct zebra_ns *zns);
-+extern void interface_list_second(struct zebra_ns *zns);
- extern void kernel_init(struct zebra_ns *zns);
- extern void kernel_terminate(struct zebra_ns *zns, bool complete);
- extern void macfdb_read(struct zebra_ns *zns);
-diff --git a/zebra/rule_netlink.c b/zebra/rule_netlink.c
-index 135f065428..4cc4281c1e 100644
---- a/zebra/rule_netlink.c
-+++ b/zebra/rule_netlink.c
-@@ -416,6 +416,7 @@ int netlink_rules_read(struct zebra_ns *zns)
- 
- 	ret = netlink_parse_info(netlink_rule_change, &zns->netlink_cmd,
- 				 &dp_info, 0, true);
-+
- 	return ret;
- }
- 
-diff --git a/zebra/zebra_dplane.h b/zebra/zebra_dplane.h
-index c10482ed96..9f9496c8f4 100644
---- a/zebra/zebra_dplane.h
-+++ b/zebra/zebra_dplane.h
-@@ -422,6 +422,19 @@ uint8_t dplane_ctx_get_ifp_family(const struct zebra_dplane_ctx *ctx);
- struct zebra_vxlan_vni_array;
- void dplane_ctx_set_ifp_vxlan_vni_array(struct zebra_dplane_ctx *ctx,
- 					struct zebra_vxlan_vni_array *vniarray);
-+
-+/*
-+ * These defines mirror the values for bridge values in linux
-+ * at this point since we only have a linux implementation
-+ * we don't need to do any type of translation.  Let's just
-+ * pass these through and use them
-+ */
-+#define DPLANE_BRIDGE_VLAN_INFO_PVID                                           \
-+	(1 << 1) /* VLAN is PVID, ingress untagged */
-+#define DPLANE_BRIDGE_VLAN_INFO_RANGE_BEGIN                                    \
-+	(1 << 3) /* VLAN is start of vlan range */
-+#define DPLANE_BRIDGE_VLAN_INFO_RANGE_END                                      \
-+	(1 << 4) /* VLAN is end of vlan range */
- const struct zebra_vxlan_vni_array *
- dplane_ctx_get_ifp_vxlan_vni_array(const struct zebra_dplane_ctx *ctx);
- struct zebra_dplane_bridge_vlan_info {
-diff --git a/zebra/zebra_l2.c b/zebra/zebra_l2.c
-index 07bbc6e3bc..4ad262a21d 100644
---- a/zebra/zebra_l2.c
-+++ b/zebra/zebra_l2.c
-@@ -258,7 +258,7 @@ void zebra_l2if_update_bond(struct interface *ifp, bool add)
-  * map slaves (if any) to the bridge.
-  */
- void zebra_l2_bridge_add_update(struct interface *ifp,
--				struct zebra_l2info_bridge *bridge_info)
-+				const struct zebra_l2info_bridge *bridge_info)
- {
- 	struct zebra_if *zif;
- 
-@@ -293,7 +293,7 @@ void zebra_l2if_update_bridge(struct interface *ifp, uint8_t chgflags)
-  * VLAN Id and this cannot change.
-  */
- void zebra_l2_vlanif_update(struct interface *ifp,
--			    struct zebra_l2info_vlan *vlan_info)
-+			    const struct zebra_l2info_vlan *vlan_info)
- {
- 	struct zebra_if *zif;
- 
-@@ -310,7 +310,7 @@ void zebra_l2_vlanif_update(struct interface *ifp,
-  * clients about GRE information.
-  */
- void zebra_l2_greif_add_update(struct interface *ifp,
--			       struct zebra_l2info_gre *gre_info, int add)
-+			       const struct zebra_l2info_gre *gre_info, int add)
- {
- 	struct zebra_if *zif;
- 	struct in_addr old_vtep_ip;
-@@ -337,7 +337,8 @@ void zebra_l2_greif_add_update(struct interface *ifp,
-  * IP and VLAN mapping, but the latter is handled separately.
-  */
- void zebra_l2_vxlanif_add_update(struct interface *ifp,
--				 struct zebra_l2info_vxlan *vxlan_info, int add)
-+				 const struct zebra_l2info_vxlan *vxlan_info,
-+				 int add)
- {
- 	struct zebra_if *zif;
- 	struct in_addr old_vtep_ip;
-diff --git a/zebra/zebra_l2.h b/zebra/zebra_l2.h
-index 8fef008f52..e3c5544f8f 100644
---- a/zebra/zebra_l2.h
-+++ b/zebra/zebra_l2.h
-@@ -71,6 +71,18 @@ struct zebra_l2info_gre {
- 	ns_id_t link_nsid;
- };
- 
-+struct zebra_vxlan_vni {
-+	vni_t vni;	      /* VNI */
-+	vlanid_t access_vlan; /* Access VLAN - for VLAN-aware bridge. */
-+	struct in_addr mcast_grp;
-+	uint16_t flags;
-+};
-+
-+struct zebra_vxlan_vni_array {
-+	uint16_t count;
-+	struct zebra_vxlan_vni vnis[0];
-+};
-+
- /* zebra L2 interface information - VXLAN interface */
- struct zebra_l2info_vxlan {
- 	vni_t vni;		/* VNI */
-@@ -108,17 +120,19 @@ extern void zebra_l2_map_slave_to_bridge(struct zebra_l2info_brslave *br_slave,
- 					 struct zebra_ns *zns);
- extern void
- zebra_l2_unmap_slave_from_bridge(struct zebra_l2info_brslave *br_slave);
--extern void zebra_l2_bridge_add_update(struct interface *ifp,
--				       struct zebra_l2info_bridge *bridge_info);
-+extern void
-+zebra_l2_bridge_add_update(struct interface *ifp,
-+			   const struct zebra_l2info_bridge *bridge_info);
- extern void zebra_l2_bridge_del(struct interface *ifp);
- extern void zebra_l2_vlanif_update(struct interface *ifp,
--				   struct zebra_l2info_vlan *vlan_info);
-+				   const struct zebra_l2info_vlan *vlan_info);
- extern void zebra_l2_greif_add_update(struct interface *ifp,
--				      struct zebra_l2info_gre *vxlan_info,
-+				      const struct zebra_l2info_gre *vxlan_info,
- 				      int add);
--extern void zebra_l2_vxlanif_add_update(struct interface *ifp,
--					struct zebra_l2info_vxlan *vxlan_info,
--					int add);
-+extern void
-+zebra_l2_vxlanif_add_update(struct interface *ifp,
-+			    const struct zebra_l2info_vxlan *vxlan_info,
-+			    int add);
- extern void zebra_l2_vxlanif_update_access_vlan(struct interface *ifp,
- 						vlanid_t access_vlan);
- extern void zebra_l2_greif_del(struct interface *ifp);
-diff --git a/zebra/zebra_ns.c b/zebra/zebra_ns.c
-index 7b076b8a4a..4714cdbff8 100644
---- a/zebra/zebra_ns.c
-+++ b/zebra/zebra_ns.c
-@@ -38,6 +38,7 @@
- #include "rib.h"
- #include "table_manager.h"
- #include "zebra_errors.h"
-+#include "zebra_dplane.h"
- 
- extern struct zebra_privs_t zserv_privs;
- 
-@@ -116,6 +117,35 @@ int zebra_ns_disabled(struct ns *ns)
- 	return zebra_ns_disable_internal(zns, true);
- }
- 
-+void zebra_ns_startup_continue(struct zebra_dplane_ctx *ctx)
-+{
-+	struct zebra_ns *zns = zebra_ns_lookup(dplane_ctx_get_ns_id(ctx));
-+	enum zebra_dplane_startup_notifications spot;
-+
-+	if (!zns) {
-+		zlog_err("%s: No Namespace associated with %u", __func__,
-+			 dplane_ctx_get_ns_id(ctx));
-+		return;
-+	}
-+
-+	spot = dplane_ctx_get_startup_spot(ctx);
-+
-+	switch (spot) {
-+	case ZEBRA_DPLANE_INTERFACES_READ:
-+		interface_list_tunneldump(zns);
-+		break;
-+	case ZEBRA_DPLANE_TUNNELS_READ:
-+		interface_list_second(zns);
-+		break;
-+	case ZEBRA_DPLANE_ADDRESSES_READ:
-+		route_read(zns);
-+
-+		kernel_read_pbr_rules(zns);
-+		kernel_read_tc_qdisc(zns);
-+		break;
-+	}
-+}
-+
- /* Do global enable actions - open sockets, read kernel config etc. */
- int zebra_ns_enable(ns_id_t ns_id, void **info)
- {
-@@ -126,9 +156,6 @@ int zebra_ns_enable(ns_id_t ns_id, void **info)
- 	kernel_init(zns);
- 	zebra_dplane_ns_enable(zns, true);
- 	interface_list(zns);
--	route_read(zns);
--	kernel_read_pbr_rules(zns);
--	kernel_read_tc_qdisc(zns);
- 
- 	return 0;
- }
-diff --git a/zebra/zebra_ns.h b/zebra/zebra_ns.h
-index 7a0ffbc1ee..3d7d96c83f 100644
---- a/zebra/zebra_ns.h
-+++ b/zebra/zebra_ns.h
-@@ -83,6 +83,8 @@ int zebra_ns_final_shutdown(struct ns *ns,
- 			    void **param_out __attribute__((unused)));
- int zebra_ns_config_write(struct vty *vty, struct ns *ns);
- 
-+void zebra_ns_startup_continue(struct zebra_dplane_ctx *ctx);
-+
- #ifdef __cplusplus
- }
- #endif
-diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c
-index 201fc761ae..fd6df441c6 100644
---- a/zebra/zebra_rib.c
-+++ b/zebra/zebra_rib.c
-@@ -4770,7 +4770,9 @@ static void rib_process_dplane_results(struct thread *thread)
- 			case DPLANE_OP_NEIGH_TABLE_UPDATE:
- 			case DPLANE_OP_GRE_SET:
- 			case DPLANE_OP_NONE:
-+				break;
- 			case DPLANE_OP_STARTUP_STAGE:
-+				zebra_ns_startup_continue(ctx);
- 				break;
- 
- 			} /* Dispatch by op code */
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0019-zebra-remove-duplicated-nexthops-when-sending-fpm-msg.patch b/src/sonic-frr/patch/0019-zebra-remove-duplicated-nexthops-when-sending-fpm-msg.patch
deleted file mode 100644
index 834ef899e72f..000000000000
--- a/src/sonic-frr/patch/0019-zebra-remove-duplicated-nexthops-when-sending-fpm-msg.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 4aa1aace3e32039b668c04cd682b01e0397144ea Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?=E6=81=AD=E7=AE=80?= <gongjian.lhr@alibaba-inc.com>
-Date: Wed, 26 Jul 2023 09:51:51 +0800
-Subject: [PATCH] zebra: remove duplicated nexthops when sending fpm msg
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-When zebra send msg to fpm client, it doesn't handle duplicated nexthops especially, which means if zebra has a route with NUM1 recursive nexthops, each resolved to the same NUM2 connected nexthops, it will send to fpm client a route with NUM1*NUM2 nexthops. But actually there are only NUM2 useful nexthops, the left NUM1*NUM2-NUM2 nexthops are all duplicated nexthops. By the way, zebra has duplicated nexthop remove logic when sending msg to kernel.
-Add duplicated nexthop remove logic to zebra when sending msg to fpm client.
-
-Signed-off-by: 恭简 <gongjian.lhr@alibaba-inc.com>
-
----
- zebra/zebra_fpm_netlink.c |    2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/zebra/zebra_fpm_netlink.c b/zebra/zebra_fpm_netlink.c
-index 06c45578a..231047143 100644
---- a/zebra/zebra_fpm_netlink.c
-+++ b/zebra/zebra_fpm_netlink.c
-@@ -305,6 +305,8 @@ static int netlink_route_info_fill(struct netlink_route_info *ri, int cmd,
- 
- 		if (CHECK_FLAG(nexthop->flags, NEXTHOP_FLAG_RECURSIVE))
- 			continue;
-+		if (CHECK_FLAG(nexthop->flags, NEXTHOP_FLAG_DUPLICATE))
-+			continue;
- 
- 		if (nexthop->type == NEXTHOP_TYPE_BLACKHOLE) {
- 			switch (nexthop->bh_type) {
diff --git a/src/sonic-frr/patch/0020-zebra-Fix-non-notification-of-better-admin-won.patch b/src/sonic-frr/patch/0020-zebra-Fix-non-notification-of-better-admin-won.patch
deleted file mode 100644
index 324242a48770..000000000000
--- a/src/sonic-frr/patch/0020-zebra-Fix-non-notification-of-better-admin-won.patch
+++ /dev/null
@@ -1,76 +0,0 @@
-From 9513d3a158e493623a6bc1e5e3e44b6ed277ac28 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Tue, 14 Nov 2023 10:15:42 -0500
-Subject: [PATCH] zebra: Fix non-notification of better admin won
-
-If there happens to be a entry in the zebra rib
-that has a lower admin distance then a newly received
-re, zebra would not notify the upper level protocol
-about this happening.  Imagine a case where there
-is a connected route for say a /32 and bgp receives
-a route from a peer that is the same route as the
-connected.  Since BGP has no network statement and
-perceives the route as being `good` bgp will install
-the route into zebra.  Zebra will look at the new
-bgp re and correctly identify that the re is not
-something that it will use and do nothing.  This
-change notices this and sends up a BETTER_ADMIN_WON
-route notification.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-
-diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c
-index 2c3bb28d6..d37fe98f8 100644
---- a/zebra/zebra_rib.c
-+++ b/zebra/zebra_rib.c
-@@ -1227,6 +1227,7 @@ static void rib_process(struct route_node *rn)
- 	rib_dest_t *dest;
- 	struct zebra_vrf *zvrf = NULL;
- 	struct vrf *vrf;
-+	struct route_entry *proto_re_changed = NULL;
- 
- 	vrf_id_t vrf_id = VRF_UNKNOWN;
- 
-@@ -1296,6 +1297,7 @@ static void rib_process(struct route_node *rn)
- 		 * skip it.
- 		 */
- 		if (CHECK_FLAG(re->status, ROUTE_ENTRY_CHANGED)) {
-+			proto_re_changed = re;
- 			if (!nexthop_active_update(rn, re)) {
- 				const struct prefix *p;
- 				struct rib_table_info *info;
-@@ -1381,6 +1383,8 @@ static void rib_process(struct route_node *rn)
- 	 * new_selected --- RE entry that is newly SELECTED
- 	 * old_fib      --- RE entry currently in kernel FIB
- 	 * new_fib      --- RE entry that is newly to be in kernel FIB
-+	 * proto_re_changed -- RE that is the last changed entry in the
-+	 *                     list of RE's.
- 	 *
- 	 * new_selected will get SELECTED flag, and is going to be redistributed
- 	 * the zclients. new_fib (which can be new_selected) will be installed
-@@ -1435,6 +1439,22 @@ static void rib_process(struct route_node *rn)
- 		}
- 	}
- 
-+	/*
-+	 * If zebra has a new_selected and a proto_re_changed
-+	 * entry that was not the old selected and the protocol
-+	 * is different, zebra should notify the upper level
-+	 * protocol that the sent down entry was not selected
-+	 */
-+	if (new_selected && proto_re_changed &&
-+	    proto_re_changed != old_selected &&
-+	    new_selected->type != proto_re_changed->type) {
-+		struct rib_table_info *info = srcdest_rnode_table_info(rn);
-+
-+		zsend_route_notify_owner(rn, proto_re_changed,
-+					 ZAPI_ROUTE_BETTER_ADMIN_WON, info->afi,
-+					 info->safi);
-+	}
-+
- 	/* Update fib according to selection results */
- 	if (new_fib && old_fib)
- 		rib_process_update_fib(zvrf, rn, old_fib, new_fib);
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0023-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch b/src/sonic-frr/patch/0023-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch
deleted file mode 100644
index 980f1d87cdf7..000000000000
--- a/src/sonic-frr/patch/0023-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From bcb608d988b3de282ff832fd398e95080be8ad86 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Mon, 11 Dec 2023 13:41:36 -0500
-Subject: [PATCH] zebra: The dplane_fpm_nl return path leaks memory
-
-The route entry created when using a ctx to pass route
-entry data backup to the master pthread in zebra is
-being leaked.  Prevent this from happening.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-(cherry picked from commit 7f9c5c7fa2d927033549a806fd9025a9459f22bc)
-
-diff --git a/zebra/rib.h b/zebra/rib.h
-index a02a461e8..2e62148ea 100644
---- a/zebra/rib.h
-+++ b/zebra/rib.h
-@@ -352,6 +352,8 @@ extern void _route_entry_dump(const char *func, union prefixconstptr pp,
- 			      union prefixconstptr src_pp,
- 			      const struct route_entry *re);
- 
-+void zebra_rib_route_entry_free(struct route_entry *re);
-+
- struct route_entry *
- zebra_rib_route_entry_new(vrf_id_t vrf_id, int type, uint8_t instance,
- 			  uint32_t flags, uint32_t nhe_id, uint32_t table_id,
-diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c
-index 6bdc15592..fc9e8c457 100644
---- a/zebra/rt_netlink.c
-+++ b/zebra/rt_netlink.c
-@@ -1001,6 +1001,8 @@ int netlink_route_change_read_unicast_internal(struct nlmsghdr *h,
- 						 re, ng, startup, ctx);
- 			if (ng)
- 				nexthop_group_delete(&ng);
-+			if (ctx)
-+				zebra_rib_route_entry_free(re);
- 		} else {
- 			/*
- 			 * I really don't see how this is possible
-diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c
-index 2b47e229a..1ff3d9854 100644
---- a/zebra/zebra_rib.c
-+++ b/zebra/zebra_rib.c
-@@ -4178,6 +4178,12 @@ struct route_entry *zebra_rib_route_entry_new(vrf_id_t vrf_id, int type,
- 
- 	return re;
- }
-+
-+void zebra_rib_route_entry_free(struct route_entry *re)
-+{
-+	XFREE(MTYPE_RE, re);
-+}
-+
- /*
-  * Internal route-add implementation; there are a couple of different public
-  * signatures. Callers in this path are responsible for the memory they
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0024-lib-use-snmp-s-large-fd-sets-for-agentx.patch b/src/sonic-frr/patch/0024-lib-use-snmp-s-large-fd-sets-for-agentx.patch
deleted file mode 100644
index ad3da2a0ad2e..000000000000
--- a/src/sonic-frr/patch/0024-lib-use-snmp-s-large-fd-sets-for-agentx.patch
+++ /dev/null
@@ -1,143 +0,0 @@
-From 7e1857bf4315ae01e065fc8bc881338977c1ef87 Mon Sep 17 00:00:00 2001
-From: Edwin Brossette <edwin.brossette@6wind.com>
-Date: Fri, 8 Dec 2023 16:02:11 +0100
-Subject: [PATCH] lib: use snmp's large fd sets for agentx
-
-The maximum number of file descriptors in an fd set is limited by
-FD_SETSIZE. This limitation is important because the libc macros
-FD_SET(), FD_CLR() and FD_ISSET() will invoke a sigabort if the size of
-the fd set given to them is above FD_SETSIZE.
-
-We ran into such a sigabort with bgpd because snmp can return an fd set
-of size higher than FD_SETSIZE when calling snmp_select_info(). An
-unfortunate FD_ISSET() call later causes the following abort:
-
-Received signal 6 at 1701115534 (si_addr 0xb94, PC 0x7ff289a16a7c); aborting...
-/lib/x86_64-linux-gnu/libfrr.so.0(zlog_backtrace_sigsafe+0xb3) [0x7ff289d62bba]
-/lib/x86_64-linux-gnu/libfrr.so.0(zlog_signal+0x1b4) [0x7ff289d62a1f]
-/lib/x86_64-linux-gnu/libfrr.so.0(+0x102860) [0x7ff289da4860]
-/lib/x86_64-linux-gnu/libc.so.6(+0x42520) [0x7ff2899c2520]
-/lib/x86_64-linux-gnu/libc.so.6(pthread_kill+0x12c) [0x7ff289a16a7c]
-/lib/x86_64-linux-gnu/libc.so.6(raise+0x16) [0x7ff2899c2476]
-/lib/x86_64-linux-gnu/libc.so.6(abort+0xd3) [0x7ff2899a87f3]
-/lib/x86_64-linux-gnu/libc.so.6(+0x896f6) [0x7ff289a096f6]
-/lib/x86_64-linux-gnu/libc.so.6(__fortify_fail+0x2a) [0x7ff289ab676a]
-/lib/x86_64-linux-gnu/libc.so.6(+0x1350c6) [0x7ff289ab50c6]
-/lib/x86_64-linux-gnu/libc.so.6(+0x1366ab) [0x7ff289ab66ab]
-/lib/x86_64-linux-gnu/libfrrsnmp.so.0(+0x36f5) [0x7ff2897736f5]
-/lib/x86_64-linux-gnu/libfrrsnmp.so.0(+0x3c27) [0x7ff289773c27]
-/lib/x86_64-linux-gnu/libfrr.so.0(thread_call+0x1c2) [0x7ff289dbe105]
-/lib/x86_64-linux-gnu/libfrr.so.0(frr_run+0x257) [0x7ff289d56e69]
-/usr/bin/bgpd(main+0x4f4) [0x560965c40488]
-/lib/x86_64-linux-gnu/libc.so.6(+0x29d90) [0x7ff2899a9d90]
-/lib/x86_64-linux-gnu/libc.so.6(__libc_start_main+0x80) [0x7ff2899a9e40]
-/usr/bin/bgpd(_start+0x25) [0x560965c3e965]
-in thread agentx_timeout scheduled from /build/make-pkg/output/_packages/cp-routing/src/lib/agentx.c:122 agentx_events_update()
-
-Also, the following error is logged by snmp just before the abort:
-snmp[err]: Use snmp_sess_select_info2() for processing large file descriptors
-
-snmp uses a custom struct netsnmp_large_fd_set to work above the limit
-imposed by FD_SETSIZE. It is noteworthy that, when calling
-snmp_select_info() instead of snmp_select_info2(), snmp uses the same
-code working with its custom, large structs, and copy/paste the result
-to a regular, libc compatible fd_set. So there should be no downside
-working with snmp_select_info2() instead of snmp_select_info().
-
-Replace every use of the libc file descriptors sets by snmp's extended
-file descriptors sets in agentx to acommodate for the high number of
-file descriptors that can come out of snmp. This should prevent the
-abort seen above.
-
-Signed-off-by: Edwin Brossette <edwin.brossette@6wind.com>
-
-diff --git a/lib/agentx.c b/lib/agentx.c
-index 5f6245980..be8277c53 100644
---- a/lib/agentx.c
-+++ b/lib/agentx.c
-@@ -25,6 +25,7 @@
- #include <net-snmp/net-snmp-includes.h>
- #include <net-snmp/agent/net-snmp-agent-includes.h>
- #include <net-snmp/agent/snmp_vars.h>
-+#include <net-snmp/library/large_fd_set.h>
- 
- #include "command.h"
- #include "smux.h"
-@@ -58,7 +59,7 @@ static void agentx_timeout(struct thread *t)
- 
- static void agentx_read(struct thread *t)
- {
--	fd_set fds;
-+	netsnmp_large_fd_set lfds;
- 	int flags, new_flags = 0;
- 	int nonblock = false;
- 	struct listnode *ln = THREAD_ARG(t);
-@@ -83,9 +84,9 @@ static void agentx_read(struct thread *t)
- 		flog_err(EC_LIB_SYSTEM_CALL, "Failed to set snmp fd non blocking: %s(%d)",
- 			 strerror(errno), errno);
- 
--	FD_ZERO(&fds);
--	FD_SET(THREAD_FD(t), &fds);
--	snmp_read(&fds);
-+	netsnmp_large_fd_set_init(&lfds, FD_SETSIZE);
-+	netsnmp_large_fd_setfd(t->u.fd, &lfds);
-+	snmp_read2(&lfds);
- 
- 	/* Reset the flag */
- 	if (!nonblock) {
-@@ -100,6 +101,7 @@ static void agentx_read(struct thread *t)
- 
- 	netsnmp_check_outstanding_agent_requests();
- 	agentx_events_update();
-+	netsnmp_large_fd_set_cleanup(&lfds);
- }
- 
- static void agentx_events_update(void)
-@@ -107,15 +109,15 @@ static void agentx_events_update(void)
- 	int maxfd = 0;
- 	int block = 1;
- 	struct timeval timeout = {.tv_sec = 0, .tv_usec = 0};
--	fd_set fds;
-+	netsnmp_large_fd_set lfds;
- 	struct listnode *ln;
- 	struct thread **thr;
- 	int fd, thr_fd;
- 
- 	thread_cancel(&timeout_thr);
- 
--	FD_ZERO(&fds);
--	snmp_select_info(&maxfd, &fds, &timeout, &block);
-+	netsnmp_large_fd_set_init(&lfds, FD_SETSIZE);
-+	snmp_select_info2(&maxfd, &lfds, &timeout, &block);
- 
- 	if (!block) {
- 		thread_add_timer_tv(agentx_tm, agentx_timeout, NULL, &timeout,
-@@ -133,7 +135,7 @@ static void agentx_events_update(void)
- 		/* caught up */
- 		if (thr_fd == fd) {
- 			struct listnode *nextln = listnextnode(ln);
--			if (!FD_ISSET(fd, &fds)) {
-+			if (!netsnmp_large_fd_is_set(fd, &lfds)) {
- 				thread_cancel(thr);
- 				XFREE(MTYPE_TMP, thr);
- 				list_delete_node(events, ln);
-@@ -143,7 +145,7 @@ static void agentx_events_update(void)
- 			thr_fd = thr ? THREAD_FD(*thr) : -1;
- 		}
- 		/* need listener, but haven't hit one where it would be */
--		else if (FD_ISSET(fd, &fds)) {
-+		else if (netsnmp_large_fd_is_set(fd, &lfds)) {
- 			struct listnode *newln;
- 			thr = XCALLOC(MTYPE_TMP, sizeof(struct thread *));
- 
-@@ -162,6 +164,7 @@ static void agentx_events_update(void)
- 		list_delete_node(events, ln);
- 		ln = nextln;
- 	}
-+	netsnmp_large_fd_set_cleanup(&lfds);
- }
- 
- /* AgentX node. */
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0025-bgp-community-memory-leak-fix.patch b/src/sonic-frr/patch/0025-bgp-community-memory-leak-fix.patch
index f8215e07f0f8..99ce9c3e8ca3 100644
--- a/src/sonic-frr/patch/0025-bgp-community-memory-leak-fix.patch
+++ b/src/sonic-frr/patch/0025-bgp-community-memory-leak-fix.patch
@@ -18,378 +18,16 @@ and the system will crash.
 
 Signed-off-by: Donald Sharp <sharpd@nvidia.com>
 ---
- bgpd/bgp_updgrp_adv.c | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/bgpd/bgp_updgrp_adv.c b/bgpd/bgp_updgrp_adv.c
-index de2b3206b7..dcde4263da 100644
---- a/bgpd/bgp_updgrp_adv.c
-+++ b/bgpd/bgp_updgrp_adv.c
-@@ -813,6 +813,7 @@ void subgroup_default_originate(struct update_subgroup *subgrp, int withdraw)
- 	struct bgp *bgp;
- 	struct attr attr;
- 	struct attr *new_attr = &attr;
-+	struct aspath *aspath;
- 	struct prefix p;
- 	struct peer *from;
- 	struct bgp_dest *dest;
-@@ -850,6 +851,7 @@ void subgroup_default_originate(struct update_subgroup *subgrp, int withdraw)
- 	/* make coverity happy */
- 	assert(attr.aspath);
- 
-+	aspath = attr.aspath;
- 	attr.med = 0;
- 	attr.flag |= ATTR_FLAG_BIT(BGP_ATTR_MULTI_EXIT_DISC);
- 
-@@ -1005,7 +1007,7 @@ void subgroup_default_originate(struct update_subgroup *subgrp, int withdraw)
- 		}
- 	}
- 
--	aspath_unintern(&attr.aspath);
-+	aspath_unintern(&aspath);
- }
- 
- /*
--- 
-2.14.1
-
-
-From 07545c1879775f155f228c81393eed9697b699de Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Sat, 2 Mar 2024 09:42:30 -0500
-Subject: [PATCH 2/3] bgpd: Include unsuppress-map as a valid outgoing policy
-
-If unsuppress-map is setup for outgoing peers, consider that
-policy is being applied as for RFC 8212.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- bgpd/bgp_route.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index 473168d9be..fb14fc7f20 100644
---- a/bgpd/bgp_route.c
-+++ b/bgpd/bgp_route.c
-@@ -5816,10 +5816,10 @@ bool bgp_outbound_policy_exists(struct peer *peer, struct bgp_filter *filter)
- 	if (peer->sort == BGP_PEER_IBGP)
- 		return true;
- 
--	if (peer->sort == BGP_PEER_EBGP
--	    && (ROUTE_MAP_OUT_NAME(filter) || PREFIX_LIST_OUT_NAME(filter)
--		|| FILTER_LIST_OUT_NAME(filter)
--		|| DISTRIBUTE_OUT_NAME(filter)))
-+	if (peer->sort == BGP_PEER_EBGP &&
-+	    (ROUTE_MAP_OUT_NAME(filter) || PREFIX_LIST_OUT_NAME(filter) ||
-+	     FILTER_LIST_OUT_NAME(filter) || DISTRIBUTE_OUT_NAME(filter) ||
-+	     UNSUPPRESS_MAP_NAME(filter)))
- 		return true;
- 	return false;
- }
--- 
-2.14.1
-
-
-From e3493d5be0156fa9c8c522b818ae6448dbe371f2 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Sat, 2 Mar 2024 09:50:38 -0500
-Subject: [PATCH 3/3] bgpd: Ensure community data is freed in some cases.
-
-Customer has this valgrind trace:
-
-Direct leak of 2829120 byte(s) in 70728 object(s) allocated from:
-  0 in community_new ../bgpd/bgp_community.c:39
-  1 in community_uniq_sort ../bgpd/bgp_community.c:170
-  2 in route_set_community ../bgpd/bgp_routemap.c:2342
-  3 in route_map_apply_ext ../lib/routemap.c:2673
-  4 in subgroup_announce_check ../bgpd/bgp_route.c:2367
-  5 in subgroup_process_announce_selected ../bgpd/bgp_route.c:2914
-  6 in group_announce_route_walkcb ../bgpd/bgp_updgrp_adv.c:199
-  7 in hash_walk ../lib/hash.c:285
-  8 in update_group_af_walk ../bgpd/bgp_updgrp.c:2061
-  9 in group_announce_route ../bgpd/bgp_updgrp_adv.c:1059
- 10 in bgp_process_main_one ../bgpd/bgp_route.c:3221
- 11 in bgp_process_wq ../bgpd/bgp_route.c:3221
- 12 in work_queue_run ../lib/workqueue.c:282
-
-The above leak detected by valgrind was from a screenshot so I copied it
-by hand.  Any mistakes in line numbers are purely from my transcription.
-Additionally this is against a slightly modified 8.5.1 version of FRR.
-Code inspection of 8.5.1 -vs- latest master shows the same problem
-exists.  Code should be able to be followed from there to here.
-
-What is happening:
-
-There is a route-map being applied that modifes the outgoing community
-to a peer.  This is saved in the attr copy created in
-subgroup_process_announce_selected.  This community pointer is not
-interned.  So the community->refcount is still 0.  Normally when
-a prefix is announced, the attr and the prefix are placed on a
-adjency out structure where the attribute is interned.  This will
-cause the community to be saved in the community hash list as well.
-In a non-normal operation when the decision to send is aborted after
-the route-map application, the attribute is just dropped and the
-pointer to the community is just dropped too, leading to situations
-where the memory is leaked.  The usage of bgp suppress-fib would
-would be a case where the community is caused to be leaked.
-Additionally the previous commit where an unsuppress-map is used
-to modify the outgoing attribute but since unsuppress-map was
-not considered part of outgoing policy the attribute would be dropped as
-well.  This pointer drop also extends to any dynamically allocated
-memory saved by the attribute pointer that was not interned yet as well.
-
-So let's modify the return case where the decision is made to
-not send the prefix to the peer to always just flush the attribute
-to ensure memory is not leaked.
-
-Fixes: #15459
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- bgpd/bgp_conditional_adv.c |  5 ++--
- bgpd/bgp_route.c           | 30 +++++++++++++-----------
- bgpd/bgp_updgrp.h          |  2 +-
- bgpd/bgp_updgrp_adv.c      | 58 +++++++++++++++++++++++++---------------------
- 4 files changed, 51 insertions(+), 44 deletions(-)
-
-diff --git a/bgpd/bgp_conditional_adv.c b/bgpd/bgp_conditional_adv.c
-index 24d822a745..edb9bc8bb7 100644
---- a/bgpd/bgp_conditional_adv.c
-+++ b/bgpd/bgp_conditional_adv.c
-@@ -135,8 +135,9 @@ static void bgp_conditional_adv_routes(struct peer *peer, afi_t afi,
- 			if (update_type == UPDATE_TYPE_ADVERTISE &&
- 			    subgroup_announce_check(dest, pi, subgrp, dest_p,
- 						    &attr, &advmap_attr)) {
--				bgp_adj_out_set_subgroup(dest, subgrp, &attr,
--							 pi);
-+				if (!bgp_adj_out_set_subgroup(dest, subgrp,
-+							      &attr, pi))
-+					bgp_attr_flush(&attr);
- 			} else {
- 				/* If default originate is enabled for
- 				 * the peer, do not send explicit
 diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index fb14fc7f20..2976042dda 100644
+index fc776a4fd..a0113c04e 100644
 --- a/bgpd/bgp_route.c
 +++ b/bgpd/bgp_route.c
-@@ -2879,7 +2879,7 @@ void subgroup_process_announce_selected(struct update_subgroup *subgrp,
- {
- 	const struct prefix *p;
- 	struct peer *onlypeer;
--	struct attr attr;
-+	struct attr attr = {0}, *pattr = &attr;
- 	afi_t afi;
- 	safi_t safi;
- 	struct bgp *bgp;
-@@ -2900,7 +2900,7 @@ void subgroup_process_announce_selected(struct update_subgroup *subgrp,
+@@ -3012,7 +3012,7 @@ void subgroup_process_announce_selected(struct update_subgroup *subgrp,
  				   PEER_STATUS_ORF_WAIT_REFRESH))
  		return;
- 
+
 -	memset(&attr, 0, sizeof(attr));
 +	memset(pattr, 0, sizeof(*pattr));
  	/* It's initialized in bgp_announce_check() */
- 
- 	/* Announcement to the subgroup. If the route is filtered withdraw it.
-@@ -2911,32 +2911,34 @@ void subgroup_process_announce_selected(struct update_subgroup *subgrp,
- 	advertise = bgp_check_advertise(bgp, dest);
- 
- 	if (selected) {
--		if (subgroup_announce_check(dest, selected, subgrp, p, &attr,
-+		if (subgroup_announce_check(dest, selected, subgrp, p, pattr,
- 					    NULL)) {
- 			/* Route is selected, if the route is already installed
- 			 * in FIB, then it is advertised
- 			 */
- 			if (advertise) {
- 				if (!bgp_check_withdrawal(bgp, dest)) {
--					struct attr *adv_attr =
--						bgp_attr_intern(&attr);
--
--					bgp_adj_out_set_subgroup(dest, subgrp,
--								 adv_attr,
--								 selected);
--				} else
-+					if (!bgp_adj_out_set_subgroup(
-+						    dest, subgrp, pattr,
-+						    selected))
-+						bgp_attr_flush(pattr);
-+				} else {
- 					bgp_adj_out_unset_subgroup(
- 						dest, subgrp, 1, addpath_tx_id);
--			}
--		} else
-+					bgp_attr_flush(pattr);
-+				}
-+			} else
-+				bgp_attr_flush(pattr);
-+		} else {
- 			bgp_adj_out_unset_subgroup(dest, subgrp, 1,
- 						   addpath_tx_id);
-+			bgp_attr_flush(pattr);
-+		}
- 	}
- 
- 	/* If selected is NULL we must withdraw the path using addpath_tx_id */
--	else {
-+	else
- 		bgp_adj_out_unset_subgroup(dest, subgrp, 1, addpath_tx_id);
--	}
- }
- 
- /*
-diff --git a/bgpd/bgp_updgrp.h b/bgpd/bgp_updgrp.h
-index e27c1e7b67..b7b6aa07e9 100644
---- a/bgpd/bgp_updgrp.h
-+++ b/bgpd/bgp_updgrp.h
-@@ -458,7 +458,7 @@ extern struct bgp_adj_out *bgp_adj_out_alloc(struct update_subgroup *subgrp,
- extern void bgp_adj_out_remove_subgroup(struct bgp_dest *dest,
- 					struct bgp_adj_out *adj,
- 					struct update_subgroup *subgrp);
--extern void bgp_adj_out_set_subgroup(struct bgp_dest *dest,
-+extern bool bgp_adj_out_set_subgroup(struct bgp_dest *dest,
- 				     struct update_subgroup *subgrp,
- 				     struct attr *attr,
- 				     struct bgp_path_info *path);
-diff --git a/bgpd/bgp_updgrp_adv.c b/bgpd/bgp_updgrp_adv.c
-index dcde4263da..7902d40bd9 100644
---- a/bgpd/bgp_updgrp_adv.c
-+++ b/bgpd/bgp_updgrp_adv.c
-@@ -454,7 +454,7 @@ bgp_advertise_clean_subgroup(struct update_subgroup *subgrp,
- 	return next;
- }
- 
--void bgp_adj_out_set_subgroup(struct bgp_dest *dest,
-+bool bgp_adj_out_set_subgroup(struct bgp_dest *dest,
- 			      struct update_subgroup *subgrp, struct attr *attr,
- 			      struct bgp_path_info *path)
- {
-@@ -474,7 +474,7 @@ void bgp_adj_out_set_subgroup(struct bgp_dest *dest,
- 	bgp = SUBGRP_INST(subgrp);
- 
- 	if (DISABLE_BGP_ANNOUNCE)
--		return;
-+		return false;
- 
- 	/* Look for adjacency information. */
- 	adj = adj_lookup(
-@@ -490,7 +490,7 @@ void bgp_adj_out_set_subgroup(struct bgp_dest *dest,
- 			bgp_addpath_id_for_peer(peer, afi, safi,
- 						&path->tx_addpath));
- 		if (!adj)
--			return;
-+			return false;
- 
- 		subgrp->pscount++;
- 	}
-@@ -529,7 +529,7 @@ void bgp_adj_out_set_subgroup(struct bgp_dest *dest,
- 		 * will never be able to coalesce the 3rd peer down
- 		 */
- 		subgrp->version = MAX(subgrp->version, dest->version);
--		return;
-+		return false;
- 	}
- 
- 	if (adj->adv)
-@@ -576,6 +576,8 @@ void bgp_adj_out_set_subgroup(struct bgp_dest *dest,
- 	bgp_adv_fifo_add_tail(&subgrp->sync->update, adv);
- 
- 	subgrp->version = MAX(subgrp->version, dest->version);
-+
-+	return true;
- }
- 
- /* The only time 'withdraw' will be false is if we are sending
-@@ -668,7 +670,7 @@ void subgroup_announce_table(struct update_subgroup *subgrp,
- {
- 	struct bgp_dest *dest;
- 	struct bgp_path_info *ri;
--	struct attr attr;
-+	struct attr attr = {0}, *pattr = &attr;
- 	struct peer *peer;
- 	afi_t afi;
- 	safi_t safi;
-@@ -712,24 +714,25 @@ void subgroup_announce_table(struct update_subgroup *subgrp,
- 				continue;
- 
- 			if (subgroup_announce_check(dest, ri, subgrp, dest_p,
--						    &attr, NULL)) {
-+						    pattr, NULL)) {
- 				/* Check if route can be advertised */
- 				if (advertise) {
- 					if (!bgp_check_withdrawal(bgp, dest)) {
--						struct attr *adv_attr =
--							bgp_attr_intern(&attr);
--
--						bgp_adj_out_set_subgroup(
--							dest, subgrp, adv_attr,
--							ri);
--					} else
-+						if (!bgp_adj_out_set_subgroup(
-+							    dest, subgrp, pattr,
-+							    ri))
-+							bgp_attr_flush(pattr);
-+					} else {
- 						bgp_adj_out_unset_subgroup(
- 							dest, subgrp, 1,
- 							bgp_addpath_id_for_peer(
- 								peer, afi,
- 								safi_rib,
- 								&ri->tx_addpath));
--				}
-+						bgp_attr_flush(pattr);
-+					}
-+				} else
-+					bgp_attr_flush(pattr);
- 			} else {
- 				/* If default originate is enabled for
- 				 * the peer, do not send explicit
-@@ -748,6 +751,7 @@ void subgroup_announce_table(struct update_subgroup *subgrp,
- 					bgp_addpath_id_for_peer(
- 						peer, afi, safi_rib,
- 						&ri->tx_addpath));
-+				bgp_attr_flush(pattr);
- 			}
- 		}
- 	}
-@@ -811,7 +815,7 @@ void subgroup_announce_route(struct update_subgroup *subgrp)
- void subgroup_default_originate(struct update_subgroup *subgrp, int withdraw)
- {
- 	struct bgp *bgp;
--	struct attr attr;
-+	struct attr attr = {0};
- 	struct attr *new_attr = &attr;
- 	struct aspath *aspath;
- 	struct prefix p;
-@@ -952,18 +956,18 @@ void subgroup_default_originate(struct update_subgroup *subgrp, int withdraw)
- 		if (dest) {
- 			for (pi = bgp_dest_get_bgp_path_info(dest); pi;
- 			     pi = pi->next) {
--				if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED))
--					if (subgroup_announce_check(
--						    dest, pi, subgrp,
--						    bgp_dest_get_prefix(dest),
--						    &attr, NULL)) {
--						struct attr *default_attr =
--							bgp_attr_intern(&attr);
--
--						bgp_adj_out_set_subgroup(
--							dest, subgrp,
--							default_attr, pi);
--					}
-+				if (!CHECK_FLAG(pi->flags, BGP_PATH_SELECTED))
-+					continue;
-+
-+				if (subgroup_announce_check(
-+					    dest, pi, subgrp,
-+					    bgp_dest_get_prefix(dest), &attr,
-+					    NULL)) {
-+					if (!bgp_adj_out_set_subgroup(
-+						    dest, subgrp, &attr, pi))
-+						bgp_attr_flush(&attr);
-+				} else
-+					bgp_attr_flush(&attr);
- 			}
- 			bgp_dest_unlock_node(dest);
- 		}
--- 
-2.14.1
 
+ 	/* Announcement to the subgroup. If the route is filtered withdraw it.
diff --git a/src/sonic-frr/patch/0026-bgp-fib-suppress-announce-fix.patch b/src/sonic-frr/patch/0026-bgp-fib-suppress-announce-fix.patch
deleted file mode 100644
index a6e9d4d4633e..000000000000
--- a/src/sonic-frr/patch/0026-bgp-fib-suppress-announce-fix.patch
+++ /dev/null
@@ -1,122 +0,0 @@
-From bf292bfd8b4e2d7ba181ce6efde4e43e066d1a88 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Thu, 28 Mar 2024 12:25:05 -0400
-Subject: [PATCH 1/2] bgpd: Note when receiving but not understanding a route
- notification
-
-When BGP has been asked to wait for FIB installation, on route
-removal a return call is likely to not have the dest since BGP
-will have cleaned up the node, entirely.  Let's just note that
-the prefix cannot be found if debugs are turned on and move on.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- bgpd/bgp_zebra.c | 6 +++++-
- 1 file changed, 5 insertions(+), 1 deletion(-)
-
-diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
-index efcf497850..ff79746b4c 100644
---- a/bgpd/bgp_zebra.c
-+++ b/bgpd/bgp_zebra.c
-@@ -2610,8 +2610,12 @@ static int bgp_zebra_route_notify_owner(int command, struct zclient *zclient,
- 	/* Find the bgp route node */
- 	dest = bgp_afi_node_lookup(bgp->rib[afi][safi], afi, safi, &p,
- 				   &bgp->vrf_prd);
--	if (!dest)
-+	if (!dest) {
-+		if (BGP_DEBUG(zebra, ZEBRA))
-+			zlog_debug("%s: %pFX does not exist in the BGP table, nothing to do for %u",
-+				   __func__, &p, note);
- 		return -1;
-+	}
- 
- 	switch (note) {
- 	case ZAPI_ROUTE_INSTALLED:
--- 
-2.17.1
-
-
-From ada2e1099373e69e0eb29f4b1f3ba79c0cacf75a Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Thu, 28 Mar 2024 12:27:38 -0400
-Subject: [PATCH 2/2] bgpd: Arrange peer notification to after zebra announce
-
-Currently BGP attempts to send route change information
-to it's peers *before* the route is installed into zebra.
-This creates a bug in suppress-fib-pending in the following
-scenario:
-
-a) bgp suppress-fib-pending and bgp has a route with
-2 way ecmp.
-b) bgp receives a route withdraw from peer 1.  BGP
-will send the route to zebra and mark the route as
-FIB_INSTALL_PENDING.
-c) bgp receives a route withdraw from peer 2.  BGP
-will see the route has the FIB_INSTALL_PENDING and
-not send the withdrawal of the route to the peer.
-bgp will then send the route deletion to zebra and
-clean up the bgp_path_info's.
-
-At this point BGP is stuck where it has not sent
-a route withdrawal to downstream peers.
-
-Let's modify the code in bgp_process_main_one to
-send the route notification to zebra first before
-attempting to announce the route.  The route withdrawal
-will remove the FIB_INSTALL_PENDING flag from the dest
-and this will allow group_announce_route to believe
-it can send the route withdrawal.
-
-For the master branch this is ok because the recent
-backpressure commits are in place and nothing is going
-to change from an ordering perspective in that regards.
-Ostensibly this fix is also for operators of Sonic and
-will be backported to the 8.5 branch as well.  This will
-change the order of the send to peers to be after the
-zebra installation but sonic users are using suppress-fib-pending
-anyways so updates won't go out until rib ack has been
-received anyways.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- bgpd/bgp_route.c | 17 +++++++++--------
- 1 file changed, 9 insertions(+), 8 deletions(-)
-
-diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index 2976042dda..fbff57634a 100644
---- a/bgpd/bgp_route.c
-+++ b/bgpd/bgp_route.c
-@@ -3297,14 +3297,6 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
- 	}
- #endif
- 
--	group_announce_route(bgp, afi, safi, dest, new_select);
--
--	/* unicast routes must also be annouced to labeled-unicast update-groups
--	 */
--	if (safi == SAFI_UNICAST)
--		group_announce_route(bgp, afi, SAFI_LABELED_UNICAST, dest,
--				     new_select);
--
- 	/* FIB update. */
- 	if (bgp_fibupd_safi(safi) && (bgp->inst_type != BGP_INSTANCE_TYPE_VIEW)
- 	    && !bgp_option_check(BGP_OPT_NO_FIB)) {
-@@ -3334,6 +3326,15 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
- 		}
- 	}
- 
-+	group_announce_route(bgp, afi, safi, dest, new_select);
-+
-+	/* unicast routes must also be annouced to labeled-unicast update-groups
-+	 */
-+	if (safi == SAFI_UNICAST)
-+		group_announce_route(bgp, afi, SAFI_LABELED_UNICAST, dest,
-+				     new_select);
-+
-+
- 	bgp_process_evpn_route_injection(bgp, afi, safi, dest, new_select,
- 					 old_select);
- 
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0027-lib-Do-not-convert-EVPN-prefixes-into-IPv4-IPv6-if-n.patch b/src/sonic-frr/patch/0027-lib-Do-not-convert-EVPN-prefixes-into-IPv4-IPv6-if-n.patch
deleted file mode 100644
index fd9ec4608dff..000000000000
--- a/src/sonic-frr/patch/0027-lib-Do-not-convert-EVPN-prefixes-into-IPv4-IPv6-if-n.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 37204cdc64999f8215deb99d4a5aa1a4222389af Mon Sep 17 00:00:00 2001
-From: Donatas Abraitis <donatas@opensourcerouting.org>
-Date: Thu, 15 Feb 2024 12:07:43 +0200
-Subject: [PATCH] lib: Do not convert EVPN prefixes into IPv4/IPv6 if not
- needed
-
-Convert only when this is really needed, e.g. `match ip address prefix-list ...`.
-
-Otherwise, we can't have mixed match clauses, like:
-
-```
-match ip address prefix-list p1
-match evpn route-type prefix
-```
-
-This won't work, because the prefix is already converted, and we can't extract
-route type, vni, etc. from the original EVPN prefix.
-
-Signed-off-by: Donatas Abraitis <donatas@opensourcerouting.org>
-(cherry picked from commit 439b739495e86912c8b9ec36b84e55311c549ba0)
-
-diff --git a/lib/routemap.c b/lib/routemap.c
-index 683943eb6d..ed7c4ed72c 100644
---- a/lib/routemap.c
-+++ b/lib/routemap.c
-@@ -2553,7 +2553,6 @@ route_map_result_t route_map_apply_ext(struct route_map *map,
- 	struct route_map_index *index = NULL;
- 	struct route_map_rule *set = NULL;
- 	bool skip_match_clause = false;
--	struct prefix conv;
- 
- 	if (recursion > RMAP_RECURSION_LIMIT) {
- 		flog_warn(
-@@ -2571,27 +2570,14 @@ route_map_result_t route_map_apply_ext(struct route_map *map,
- 
- 	map->applied++;
- 
--	/*
--	 * Handling for matching evpn_routes in the prefix table.
--	 *
--	 * We convert type2/5 prefix to ipv4/6 prefix to do longest
--	 * prefix matching on.
--	 */
- 	if (prefix->family == AF_EVPN) {
--		if (evpn_prefix2prefix(prefix, &conv) != 0) {
--			zlog_debug(
--				"Unable to convert EVPN prefix %pFX into IPv4/IPv6 prefix. Falling back to non-optimized route-map lookup",
--				prefix);
--		} else {
--			zlog_debug(
--				"Converted EVPN prefix %pFX into %pFX for optimized route-map lookup",
--				prefix, &conv);
--
--			prefix = &conv;
--		}
-+		index = map->head;
-+	} else {
-+		skip_match_clause = true;
-+		index = route_map_get_index(map, prefix, match_object,
-+					    &match_ret);
- 	}
- 
--	index = route_map_get_index(map, prefix, match_object, &match_ret);
- 	if (index) {
- 		index->applied++;
- 		if (rmap_debug)
-@@ -2615,7 +2601,6 @@ route_map_result_t route_map_apply_ext(struct route_map *map,
- 			ret = RMAP_DENYMATCH;
- 		goto route_map_apply_end;
- 	}
--	skip_match_clause = true;
- 
- 	for (; index; index = index->next) {
- 		if (!skip_match_clause) {
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0029-zebra-nhg-fix-on-intf-up.patch b/src/sonic-frr/patch/0029-zebra-nhg-fix-on-intf-up.patch
deleted file mode 100644
index 64e8ac5d5713..000000000000
--- a/src/sonic-frr/patch/0029-zebra-nhg-fix-on-intf-up.patch
+++ /dev/null
@@ -1,338 +0,0 @@
-From 4a58bc9e856c4ca953474548d61f06aad2fdf45b Mon Sep 17 00:00:00 2001
-From: Ashwini Reddy <ashred@nvidia.com>
-Date: Wed, 19 Apr 2023 11:35:25 -0700
-Subject: [PATCH 1/3] zebra: re-install nhg on interface up
-
-Intermittently zebra and kernel are out of sync
-when interface flaps and the add's/dels are in
-same processing queue and zebra assumes no change in nexthop.
-Hence we need to bring in a reinstall to kernel
-of the nexthops and routes to sync their states.
-
-Upon interface flap kernel would have deleted NHGs
-associated to a interface (the one flapped),
-zebra retains NHGs for 3 mins even though upper
-layer protocol removes the nexthops (associated NHG).
-As part of interface address add ,
-re-add singleton NHGs associated to interface.
-
-Ticket: #3173663
-Issue: 3173663
-
-Signed-off-by: Ashwini Reddy <ashred@nvidia.com>
-Signed-off-by: Chirag Shah <chirag@nvidia.com>
----
- lib/nexthop.c        |  9 +++++++++
- lib/nexthop.h        |  3 +++
- zebra/redistribute.c |  4 ++++
- zebra/zebra_nhg.c    | 46 ++++++++++++++++++++++++++++++++++++++++++++
- zebra/zebra_nhg.h    |  1 +
- 5 files changed, 63 insertions(+)
-
-diff --git a/lib/nexthop.c b/lib/nexthop.c
-index 52679388fd..e3bdbfb9e8 100644
---- a/lib/nexthop.c
-+++ b/lib/nexthop.c
-@@ -1093,3 +1093,12 @@ static ssize_t printfrr_nh(struct fbuf *buf, struct printfrr_eargs *ea,
- 	}
- 	return -1;
- }
-+
-+bool nexthop_is_ifindex_type(const struct nexthop *nh)
-+{
-+	if (nh->type == NEXTHOP_TYPE_IFINDEX ||
-+	    nh->type == NEXTHOP_TYPE_IPV4_IFINDEX ||
-+	    nh->type == NEXTHOP_TYPE_IPV6_IFINDEX)
-+		return true;
-+	return false;
-+}
-diff --git a/lib/nexthop.h b/lib/nexthop.h
-index f6fb6ec2b7..a52ae02172 100644
---- a/lib/nexthop.h
-+++ b/lib/nexthop.h
-@@ -260,6 +260,9 @@ extern struct nexthop *nexthop_dup(const struct nexthop *nexthop,
- extern struct nexthop *nexthop_dup_no_recurse(const struct nexthop *nexthop,
- 					      struct nexthop *rparent);
- 
-+/* Check nexthop of IFINDEX type */
-+extern bool nexthop_is_ifindex_type(const struct nexthop *nh);
-+
- /*
-  * Parse one or more backup index values, as comma-separated numbers,
-  * into caller's array of uint8_ts. The array must be NEXTHOP_MAX_BACKUPS
-diff --git a/zebra/redistribute.c b/zebra/redistribute.c
-index 4a8fe938ed..fccbee7d85 100644
---- a/zebra/redistribute.c
-+++ b/zebra/redistribute.c
-@@ -561,6 +561,10 @@ void zebra_interface_address_add_update(struct interface *ifp,
- 						client, ifp, ifc);
- 		}
- 	}
-+	/* interface associated NHGs may have been deleted,
-+	 * re-sync zebra -> dplane NHGs
-+	 */
-+	zebra_interface_nhg_reinstall(ifp);
- }
- 
- /* Interface address deletion. */
-diff --git a/zebra/zebra_nhg.c b/zebra/zebra_nhg.c
-index 54c66fbf18..753efef7f8 100644
---- a/zebra/zebra_nhg.c
-+++ b/zebra/zebra_nhg.c
-@@ -3003,6 +3003,12 @@ void zebra_nhg_install_kernel(struct nhg_hash_entry *nhe)
- 	/* Resolve it first */
- 	nhe = zebra_nhg_resolve(nhe);
- 
-+	if (zebra_nhg_set_valid_if_active(nhe)) {
-+		if (IS_ZEBRA_DEBUG_NHG_DETAIL)
-+			zlog_debug("%s: valid flag set for nh %pNG", __func__,
-+				   nhe);
-+	}
-+
- 	/* Make sure all depends are installed/queued */
- 	frr_each(nhg_connected_tree, &nhe->nhg_depends, rb_node_dep) {
- 		zebra_nhg_install_kernel(rb_node_dep->nhe);
-@@ -3586,3 +3592,43 @@ static ssize_t printfrr_nhghe(struct fbuf *buf, struct printfrr_eargs *ea,
- 	ret += bputs(buf, "]");
- 	return ret;
- }
-+
-+/*
-+ * On interface add the nexthop that resolves to this intf needs
-+ * a re-install. There are following scenarios when the nexthop group update
-+ * gets skipped:
-+ * 1. When upper level protocol sends removal of NHG, there is
-+ * timer running to keep NHG for 180 seconds, during this interval, same route
-+ * with same set of nexthops installation is given , the same NHG is used
-+ * but since NHG is not reinstalled on interface address add, it is not aware
-+ * in Dplan/Kernel.
-+ * 2. Due to a quick port flap due to interface add and delete
-+ * to be processed in same queue one after another. Zebra believes that
-+ * there is no change in nhg in this case. Hence this re-install will
-+ * make sure the nexthop group gets updated to Dplan/Kernel.
-+ */
-+void zebra_interface_nhg_reinstall(struct interface *ifp)
-+{
-+	struct nhg_connected *rb_node_dep = NULL;
-+	struct zebra_if *zif = ifp->info;
-+	struct nexthop *nh;
-+
-+	if (IS_ZEBRA_DEBUG_NHG_DETAIL)
-+		zlog_debug(
-+			"%s: Installing interface %s associated NHGs into kernel",
-+			__func__, ifp->name);
-+
-+	frr_each (nhg_connected_tree, &zif->nhg_dependents, rb_node_dep) {
-+		nh = rb_node_dep->nhe->nhg.nexthop;
-+		if (zebra_nhg_set_valid_if_active(rb_node_dep->nhe)) {
-+			if (IS_ZEBRA_DEBUG_NHG_DETAIL)
-+				zlog_debug(
-+					"%s: Setting the valid flag for nhe %pNG, interface: %s",
-+					__func__, rb_node_dep->nhe, ifp->name);
-+		}
-+		/* Check for singleton NHG associated to interface */
-+		if (nexthop_is_ifindex_type(nh) &&
-+		    zebra_nhg_depends_is_empty(rb_node_dep->nhe))
-+			zebra_nhg_install_kernel(rb_node_dep->nhe);
-+	}
-+}
-diff --git a/zebra/zebra_nhg.h b/zebra/zebra_nhg.h
-index 9b925bf10f..18914b7856 100644
---- a/zebra/zebra_nhg.h
-+++ b/zebra/zebra_nhg.h
-@@ -374,6 +374,7 @@ extern uint8_t zebra_nhg_nhe2grp(struct nh_grp *grp, struct nhg_hash_entry *nhe,
- /* Dataplane install/uninstall */
- extern void zebra_nhg_install_kernel(struct nhg_hash_entry *nhe);
- extern void zebra_nhg_uninstall_kernel(struct nhg_hash_entry *nhe);
-+extern void zebra_interface_nhg_reinstall(struct interface *ifp);
- 
- /* Forward ref of dplane update context type */
- struct zebra_dplane_ctx;
--- 
-2.17.1
-
-
-From 2b99f5ccf7768eff1393e07db2b77abc104dbbd7 Mon Sep 17 00:00:00 2001
-From: Chirag Shah <chirag@nvidia.com>
-Date: Fri, 28 Apr 2023 19:09:55 -0700
-Subject: [PATCH 2/3] zebra:re-install dependent nhgs on interface up
-
-Upon interface up associated singleton NHG's
-dependent NHGs needs to be reinstalled as
-kernel would have deleted if there is no route
-referencing it.
-
-Ticket:#3416477
-Issue:3416477
-Testing Done:
-flap interfaces which are part of route NHG,
-upon interfaces up event, NHGs are resynced
-into dplane.
-
-Signed-off-by: Chirag Shah <chirag@nvidia.com>
----
- zebra/zebra_nhg.c | 43 ++++++++++++++++++++++++++++++++++++++-----
- 1 file changed, 38 insertions(+), 5 deletions(-)
-
-diff --git a/zebra/zebra_nhg.c b/zebra/zebra_nhg.c
-index 753efef7f8..e5efbf8d5f 100644
---- a/zebra/zebra_nhg.c
-+++ b/zebra/zebra_nhg.c
-@@ -1140,13 +1140,23 @@ static void zebra_nhg_handle_uninstall(struct nhg_hash_entry *nhe)
- 	zebra_nhg_free(nhe);
- }
- 
--static void zebra_nhg_handle_install(struct nhg_hash_entry *nhe)
-+static void zebra_nhg_handle_install(struct nhg_hash_entry *nhe, bool install)
- {
- 	/* Update validity of groups depending on it */
- 	struct nhg_connected *rb_node_dep;
- 
--	frr_each_safe(nhg_connected_tree, &nhe->nhg_dependents, rb_node_dep)
-+	frr_each_safe (nhg_connected_tree, &nhe->nhg_dependents, rb_node_dep) {
- 		zebra_nhg_set_valid(rb_node_dep->nhe);
-+		/* install dependent NHG into kernel */
-+		if (install) {
-+			if (IS_ZEBRA_DEBUG_NHG_DETAIL)
-+				zlog_debug(
-+					"%s nh id %u (flags 0x%x) associated dependent NHG %pNG install",
-+					__func__, nhe->id, nhe->flags,
-+					rb_node_dep->nhe);
-+			zebra_nhg_install_kernel(rb_node_dep->nhe);
-+		}
-+	}
- }
- 
- /*
-@@ -3035,7 +3045,7 @@ void zebra_nhg_install_kernel(struct nhg_hash_entry *nhe)
- 			break;
- 		case ZEBRA_DPLANE_REQUEST_SUCCESS:
- 			SET_FLAG(nhe->flags, NEXTHOP_GROUP_INSTALLED);
--			zebra_nhg_handle_install(nhe);
-+			zebra_nhg_handle_install(nhe, false);
- 			break;
- 		}
- 	}
-@@ -3109,7 +3119,7 @@ void zebra_nhg_dplane_result(struct zebra_dplane_ctx *ctx)
- 		if (status == ZEBRA_DPLANE_REQUEST_SUCCESS) {
- 			SET_FLAG(nhe->flags, NEXTHOP_GROUP_VALID);
- 			SET_FLAG(nhe->flags, NEXTHOP_GROUP_INSTALLED);
--			zebra_nhg_handle_install(nhe);
-+			zebra_nhg_handle_install(nhe, true);
- 
- 			/* If daemon nhg, send it an update */
- 			if (PROTO_OWNED(nhe))
-@@ -3628,7 +3638,30 @@ void zebra_interface_nhg_reinstall(struct interface *ifp)
- 		}
- 		/* Check for singleton NHG associated to interface */
- 		if (nexthop_is_ifindex_type(nh) &&
--		    zebra_nhg_depends_is_empty(rb_node_dep->nhe))
-+		    zebra_nhg_depends_is_empty(rb_node_dep->nhe)) {
-+			struct nhg_connected *rb_node_dependent;
-+
-+			if (IS_ZEBRA_DEBUG_NHG)
-+				zlog_debug(
-+					"%s install nhe %pNG nh type %u flags 0x%x",
-+					__func__, rb_node_dep->nhe, nh->type,
-+					rb_node_dep->nhe->flags);
- 			zebra_nhg_install_kernel(rb_node_dep->nhe);
-+
-+			/* mark depedent uninstall, when interface associated
-+			 * singleton is installed, install depedent
-+			 */
-+			frr_each_safe (nhg_connected_tree,
-+				       &rb_node_dep->nhe->nhg_dependents,
-+				       rb_node_dependent) {
-+				if (IS_ZEBRA_DEBUG_NHG)
-+					zlog_debug(
-+						"%s dependent nhe %pNG unset installed flag",
-+						__func__,
-+						rb_node_dependent->nhe);
-+				UNSET_FLAG(rb_node_dependent->nhe->flags,
-+					   NEXTHOP_GROUP_INSTALLED);
-+			}
-+		}
- 	}
- }
--- 
-2.17.1
-
-
-From be767bd66143c2dcdd564a40a852400ae9e251e5 Mon Sep 17 00:00:00 2001
-From: Donald Sharp <sharpd@nvidia.com>
-Date: Fri, 19 Apr 2024 12:13:32 -0400
-Subject: [PATCH 3/3] lib, zebra: Check for not being a blackhole route
-
-In zebra_interface_nhg_reinstall zebra is checking that the
-nhg is a singleton and not a blackhole nhg.  This was originally
-done with checking that the nexthop is a NEXTHOP_TYPE_IFINDEX,
-NEXTHOP_TYPE_IPV4_IFINDEX and NEXTHOP_TYPE_IPV6_IFINDEX.  This
-was excluding NEXTHOP_TYPE_IPV4 and NEXTHOP_TYPE_IPV6.  These
-were both possible to be received and maintained from the upper
-level protocol for when a route is being recursively resolved.
-If we have gotten to this point in zebra_interface_nhg_reinstall
-the nexthop group has already been installed at least once
-and we *know* that it is actually a valid nexthop.  What the
-test is really trying to do is ensure that we are not reinstalling
-a blackhole nexthop group( Which is not possible to even be
-here by the way, but safety first! ).  So let's change
-to test for that instead.
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
----
- lib/nexthop.c     | 8 ++------
- lib/nexthop.h     | 4 ++--
- zebra/zebra_nhg.c | 3 ++-
- 3 files changed, 6 insertions(+), 9 deletions(-)
-
-diff --git a/lib/nexthop.c b/lib/nexthop.c
-index e3bdbfb9e8..884255f158 100644
---- a/lib/nexthop.c
-+++ b/lib/nexthop.c
-@@ -1094,11 +1094,7 @@ static ssize_t printfrr_nh(struct fbuf *buf, struct printfrr_eargs *ea,
- 	return -1;
- }
- 
--bool nexthop_is_ifindex_type(const struct nexthop *nh)
-+bool nexthop_is_blackhole(const struct nexthop *nh)
- {
--	if (nh->type == NEXTHOP_TYPE_IFINDEX ||
--	    nh->type == NEXTHOP_TYPE_IPV4_IFINDEX ||
--	    nh->type == NEXTHOP_TYPE_IPV6_IFINDEX)
--		return true;
--	return false;
-+	return nh->type == NEXTHOP_TYPE_BLACKHOLE;
- }
-diff --git a/lib/nexthop.h b/lib/nexthop.h
-index a52ae02172..bd1c0514fc 100644
---- a/lib/nexthop.h
-+++ b/lib/nexthop.h
-@@ -260,8 +260,8 @@ extern struct nexthop *nexthop_dup(const struct nexthop *nexthop,
- extern struct nexthop *nexthop_dup_no_recurse(const struct nexthop *nexthop,
- 					      struct nexthop *rparent);
- 
--/* Check nexthop of IFINDEX type */
--extern bool nexthop_is_ifindex_type(const struct nexthop *nh);
-+/* Is this nexthop a blackhole? */
-+extern bool nexthop_is_blackhole(const struct nexthop *nh);
- 
- /*
-  * Parse one or more backup index values, as comma-separated numbers,
-diff --git a/zebra/zebra_nhg.c b/zebra/zebra_nhg.c
-index e5efbf8d5f..33d2344f51 100644
---- a/zebra/zebra_nhg.c
-+++ b/zebra/zebra_nhg.c
-@@ -3636,8 +3636,9 @@ void zebra_interface_nhg_reinstall(struct interface *ifp)
- 					"%s: Setting the valid flag for nhe %pNG, interface: %s",
- 					__func__, rb_node_dep->nhe, ifp->name);
- 		}
-+
- 		/* Check for singleton NHG associated to interface */
--		if (nexthop_is_ifindex_type(nh) &&
-+		if (!nexthop_is_blackhole(nh) &&
- 		    zebra_nhg_depends_is_empty(rb_node_dep->nhe)) {
- 			struct nhg_connected *rb_node_dependent;
- 
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch b/src/sonic-frr/patch/0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch
index 0bebd1ea12ba..f6de465595a5 100644
--- a/src/sonic-frr/patch/0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch
+++ b/src/sonic-frr/patch/0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch
@@ -50,10 +50,10 @@ Signed-off-by: Donald Sharp <sharpd@nvidia.com>
 Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
 
 diff --git a/zebra/zserv.c b/zebra/zserv.c
-index 2024f34534..de6e404fc4 100644
+index 6a64176d9..488712397 100644
 --- a/zebra/zserv.c
 +++ b/zebra/zserv.c
-@@ -318,6 +318,14 @@ zwrite_fail:
+@@ -306,6 +306,14 @@ zwrite_fail:
   * this task reschedules itself.
   *
   * Any failure in any of these actions is handled by terminating the client.
@@ -66,9 +66,9 @@ index 2024f34534..de6e404fc4 100644
 + * The main thread processes the items in ibuf_fifo and always signals the
 + * client IO thread.
   */
- static void zserv_read(struct thread *thread)
+ static void zserv_read(struct event *thread)
  {
-@@ -325,15 +333,25 @@ static void zserv_read(struct thread *thread)
+@@ -313,16 +321,26 @@ static void zserv_read(struct event *thread)
  	int sock;
  	size_t already;
  	struct stream_fifo *cache;
@@ -80,7 +80,7 @@ index 2024f34534..de6e404fc4 100644
 +	int p2p_avail;	    /* How much space is available for p2p */
  	struct zmsghdr hdr;
 +	size_t client_ibuf_fifo_cnt = stream_fifo_count_safe(client->ibuf_fifo);
- 
+
  	p2p_orig = atomic_load_explicit(&zrouter.packets_to_process,
  					memory_order_relaxed);
 +	p2p_avail = p2p_orig - client_ibuf_fifo_cnt;
@@ -95,19 +95,21 @@ index 2024f34534..de6e404fc4 100644
 +	p2p = p2p_avail;
  	cache = stream_fifo_new();
 -	p2p = p2p_orig;
- 	sock = THREAD_FD(thread);
- 
+-	sock = EVENT_FD(thread);
++	sock = EVENT_FD(thread);
+
  	while (p2p) {
-@@ -433,7 +451,7 @@ static void zserv_read(struct thread *thread)
+ 		ssize_t nb;
+@@ -421,7 +439,7 @@ static void zserv_read(struct event *thread)
  		p2p--;
  	}
- 
+
 -	if (p2p < p2p_orig) {
 +	if (p2p < (uint32_t)p2p_avail) {
  		uint64_t time_now = monotime(NULL);
- 
+
  		/* update session statistics */
-@@ -447,19 +465,23 @@ static void zserv_read(struct thread *thread)
+@@ -435,19 +453,23 @@ static void zserv_read(struct event *thread)
  			while (cache->head)
  				stream_fifo_push(client->ibuf_fifo,
  						 stream_fifo_pop(cache));
@@ -115,28 +117,28 @@ index 2024f34534..de6e404fc4 100644
 +			client_ibuf_fifo_cnt =
 +				stream_fifo_count_safe(client->ibuf_fifo);
  		}
- 
+
  		/* Schedule job to process those packets */
  		zserv_event(client, ZSERV_PROCESS_MESSAGES);
 -
  	}
- 
+
  	if (IS_ZEBRA_DEBUG_PACKET)
 -		zlog_debug("Read %d packets from client: %s", p2p_orig - p2p,
 -			   zebra_route_string(client->proto));
 +		zlog_debug("Read %d packets from client: %s. Current ibuf fifo count: %zu. Conf P2p %d",
 +			   p2p_avail - p2p, zebra_route_string(client->proto),
 +			   client_ibuf_fifo_cnt, p2p_orig);
- 
+
 -	/* Reschedule ourselves */
 -	zserv_client_event(client, ZSERV_CLIENT_READ);
 +	/* Reschedule ourselves since we have space in ibuf_fifo */
 +	if (client_ibuf_fifo_cnt < p2p_orig)
 +		zserv_client_event(client, ZSERV_CLIENT_READ);
- 
+
  	stream_fifo_free(cache);
- 
-@@ -495,14 +517,20 @@ static void zserv_client_event(struct zserv *client,
+
+@@ -483,14 +505,20 @@ static void zserv_client_event(struct zserv *client,
   * as the task argument.
   *
   * Each message is popped off the client's input queue and the action associated
@@ -157,9 +159,9 @@ index 2024f34534..de6e404fc4 100644
 + *    items to the ibuf_fifo (until max limit)
 + *  - the hidden config change (zebra zapi-packets <>) is taken into account.
   */
- static void zserv_process_messages(struct thread *thread)
+ static void zserv_process_messages(struct event *thread)
  {
-@@ -538,6 +566,9 @@ static void zserv_process_messages(struct thread *thread)
+@@ -524,6 +552,9 @@ static void zserv_process_messages(struct event *thread)
  	/* Reschedule ourselves if necessary */
  	if (need_resched)
  		zserv_event(client, ZSERV_PROCESS_MESSAGES);
@@ -167,8 +169,5 @@ index 2024f34534..de6e404fc4 100644
 +	/* Ensure to include the read socket in the select/poll/etc.. */
 +	zserv_client_event(client, ZSERV_CLIENT_READ);
  }
- 
- int zserv_send_message(struct zserv *client, struct stream *msg)
--- 
-2.17.1
 
+ int zserv_send_message(struct zserv *client, struct stream *msg)
diff --git a/src/sonic-frr/patch/0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch b/src/sonic-frr/patch/0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch
index 21a2b90f44f4..142ca6d0eff0 100644
--- a/src/sonic-frr/patch/0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch
+++ b/src/sonic-frr/patch/0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch
@@ -15,12 +15,12 @@ Signed-off-by: Donald Sharp <sharpd@nvidia.com>
 Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
 
 diff --git a/bgpd/bgp_main.c b/bgpd/bgp_main.c
-index 90ae580bab..e28dde5d16 100644
+index 851c4880c..44d5ee68c 100644
 --- a/bgpd/bgp_main.c
 +++ b/bgpd/bgp_main.c
-@@ -214,6 +214,8 @@ static __attribute__((__noreturn__)) void bgp_exit(int status)
+@@ -207,6 +207,8 @@ static __attribute__((__noreturn__)) void bgp_exit(int status)
  	bgp_evpn_mh_finish();
- 	bgp_l3nhg_finish();
+ 	bgp_nhg_finish();
  
 +	zebra_announce_fini(&bm->zebra_announce_head);
 +
@@ -28,19 +28,28 @@ index 90ae580bab..e28dde5d16 100644
  	bgp_dump_finish();
  
 diff --git a/bgpd/bgp_table.h b/bgpd/bgp_table.h
-index 121afc481f..d43bf86eb9 100644
+index 5b4c3be21..67431ea4f 100644
 --- a/bgpd/bgp_table.h
 +++ b/bgpd/bgp_table.h
-@@ -101,6 +101,8 @@ struct bgp_node {
+@@ -75,6 +75,9 @@ struct bgp_dest {
+ 	struct bgp_dest *pdest;
  
  	STAILQ_ENTRY(bgp_dest) pq;
- 
-+	struct zebra_announce_item zai;
++	struct bgp_path_info *za_bgp_pi;
 +
++	struct zebra_announce_item zai;
+ 
  	uint64_t version;
  
- 	mpls_label_t local_label;
-@@ -121,6 +123,8 @@ struct bgp_node {
+@@ -91,12 +94,16 @@ struct bgp_dest {
+ #define BGP_NODE_LABEL_REQUESTED        (1 << 7)
+ #define BGP_NODE_SOFT_RECONFIG (1 << 8)
+ #define BGP_NODE_PROCESS_CLEAR (1 << 9)
++#define BGP_NODE_SCHEDULE_FOR_INSTALL (1 << 10)
++#define BGP_NODE_SCHEDULE_FOR_DELETE (1 << 11)
+ 
+ 	struct bgp_addpath_node_data tx_addpath;
+ 
  	enum bgp_path_selection_reason reason;
  };
  
@@ -50,10 +59,31 @@ index 121afc481f..d43bf86eb9 100644
  /*
   * bgp_table_iter_t
 diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
-index 023047050b..392423e028 100644
+index 337879a2d..88d4201a9 100644
 --- a/bgpd/bgpd.c
 +++ b/bgpd/bgpd.c
-@@ -8017,6 +8017,8 @@ void bgp_master_init(struct thread_master *master, const int buffer_size,
+@@ -3867,10 +3867,20 @@ int bgp_delete(struct bgp *bgp)
+ 	afi_t afi;
+ 	safi_t safi;
+ 	int i;
++	struct bgp_dest *dest = NULL;
+ 	struct graceful_restart_info *gr_info;
+ 
+ 	assert(bgp);
+ 
++	while (zebra_announce_count(&bm->zebra_announce_head)) {
++		dest = zebra_announce_pop(&bm->zebra_announce_head);
++		if (dest->za_bgp_pi->peer->bgp == bgp) {
++			bgp_path_info_unlock(dest->za_bgp_pi);
++			bgp_dest_unlock_node(dest);
++		} else
++			zebra_announce_add_tail(&bm->zebra_announce_head, dest);
++	}
++
+ 	bgp_soft_reconfig_table_task_cancel(bgp, NULL, NULL);
+ 
+ 	/* make sure we withdraw any exported routes */
+@@ -8296,6 +8306,8 @@ void bgp_master_init(struct event_loop *master, const int buffer_size,
  	memset(&bgp_master, 0, sizeof(bgp_master));
  
  	bm = &bgp_master;
@@ -62,23 +92,46 @@ index 023047050b..392423e028 100644
  	bm->bgp = list_new();
  	bm->listen_sockets = list_new();
  	bm->port = BGP_PORT_DEFAULT;
+@@ -8314,6 +8326,7 @@ void bgp_master_init(struct event_loop *master, const int buffer_size,
+ 	bm->outq_limit = BM_DEFAULT_Q_LIMIT;
+ 	bm->t_bgp_sync_label_manager = NULL;
+ 	bm->t_bgp_start_label_manager = NULL;
++	bm->t_bgp_zebra_route = NULL;
+ 
+ 	bgp_mac_init();
+ 	/* init the rd id space.
+@@ -8564,6 +8577,7 @@ void bgp_terminate(void)
+ 	EVENT_OFF(bm->t_rmap_update);
+ 	EVENT_OFF(bm->t_bgp_sync_label_manager);
+ 	EVENT_OFF(bm->t_bgp_start_label_manager);
++	EVENT_OFF(bm->t_bgp_zebra_route);
+ 
+ 	bgp_mac_finish();
+ }
 diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h
-index 72b5b50fb4..55f53bf9d3 100644
+index 0f6909532..a6b398a44 100644
 --- a/bgpd/bgpd.h
 +++ b/bgpd/bgpd.h
-@@ -32,6 +32,8 @@
- #include "srv6.h"
+@@ -18,6 +18,8 @@
  #include "iana_afi.h"
+ #include "asn.h"
  
 +PREDECL_LIST(zebra_announce);
 +
  /* For union sockunion.  */
  #include "queue.h"
  #include "sockunion.h"
-@@ -180,6 +182,9 @@ struct bgp_master {
+@@ -170,11 +172,16 @@ struct bgp_master {
  	uint32_t inq_limit;
  	uint32_t outq_limit;
  
++	struct event *t_bgp_zebra_route;
++
+ 	struct event *t_bgp_sync_label_manager;
+ 	struct event *t_bgp_start_label_manager;
+ 
+ 	bool v6_with_v4_nexthops;
+ 
 +	/* To preserve ordering of installations into zebra across all Vrfs */
 +	struct zebra_announce_head zebra_announce_head;
 +
diff --git a/src/sonic-frr/patch/0032-bgpd-fix-flushing-ipv6-flowspec-entries-when-peering.patch b/src/sonic-frr/patch/0032-bgpd-fix-flushing-ipv6-flowspec-entries-when-peering.patch
deleted file mode 100644
index bfefccceff10..000000000000
--- a/src/sonic-frr/patch/0032-bgpd-fix-flushing-ipv6-flowspec-entries-when-peering.patch
+++ /dev/null
@@ -1,158 +0,0 @@
-From 69e38aa82f325129ebad4535be5d834c599b5c0b Mon Sep 17 00:00:00 2001
-From: Philippe Guibert <philippe.guibert@6wind.com>
-Date: Wed, 7 Feb 2024 22:34:34 +0100
-Subject: [PATCH 04/11] bgpd: fix flushing ipv6 flowspec entries when peering
- stops
-
-When a BGP flowspec peering stops, the BGP RIB entries for IPv6
-flowspec entries are removed, but not the ZEBRA RIB IPv6 entries.
-
-Actually, when calling bgp_zebra_withdraw() function call, only
-the AFI_IP parameter is passed to the bgp_pbr_update_entry() function
-in charge of the Flowspec add/delete in zebra. Fix this by passing
-the AFI parameter to the bgp_zebra_withdraw() function.
-
-Note that using topotest does not show up the problem as the
-flowspec driver code is not present and was refused. Without that,
-routes are not installed, and can not be uninstalled.
-
-Fixes: 529efa234655 ("bgpd: allow flowspec entries to be announced to zebra")
-Link: https://github.com/FRRouting/frr/pull/2025
-
-Signed-off-by: Philippe Guibert <philippe.guibert@6wind.com>
-
-diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index fbff57634a..455cd6cdbb 100644
---- a/bgpd/bgp_route.c
-+++ b/bgpd/bgp_route.c
-@@ -3312,7 +3312,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
- 			 */
- 			if (old_select &&
- 			    is_route_parent_evpn(old_select))
--				bgp_zebra_withdraw(p, old_select, bgp, safi);
-+				bgp_zebra_withdraw(p, old_select, bgp, afi,
-+						   safi);
- 
- 			bgp_zebra_announce(dest, p, new_select, bgp, afi, safi);
- 		} else {
-@@ -3322,7 +3323,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
- 				|| old_select->sub_type == BGP_ROUTE_AGGREGATE
- 				|| old_select->sub_type == BGP_ROUTE_IMPORTED))
- 
--				bgp_zebra_withdraw(p, old_select, bgp, safi);
-+				bgp_zebra_withdraw(p, old_select, bgp, afi,
-+						   safi);
- 		}
- 	}
- 
-@@ -4201,7 +4203,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id,
- 	if (pi && pi->attr->rmap_table_id != new_attr.rmap_table_id) {
- 		if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED))
- 			/* remove from RIB previous entry */
--			bgp_zebra_withdraw(p, pi, bgp, safi);
-+			bgp_zebra_withdraw(p, pi, bgp, afi, safi);
- 	}
- 
- 	if (peer->sort == BGP_PEER_EBGP) {
-@@ -5841,7 +5843,7 @@ bool bgp_inbound_policy_exists(struct peer *peer, struct bgp_filter *filter)
- }
- 
- static void bgp_cleanup_table(struct bgp *bgp, struct bgp_table *table,
--			      safi_t safi)
-+			      afi_t afi, safi_t safi)
- {
- 	struct bgp_dest *dest;
- 	struct bgp_path_info *pi;
-@@ -5865,7 +5867,8 @@ static void bgp_cleanup_table(struct bgp *bgp, struct bgp_table *table,
- 				|| pi->sub_type == BGP_ROUTE_IMPORTED)) {
- 
- 				if (bgp_fibupd_safi(safi))
--					bgp_zebra_withdraw(p, pi, bgp, safi);
-+					bgp_zebra_withdraw(p, pi, bgp, afi,
-+							   safi);
- 			}
- 
- 			bgp_path_info_reap(dest, pi);
-@@ -5882,7 +5885,7 @@ void bgp_cleanup_routes(struct bgp *bgp)
- 	for (afi = AFI_IP; afi < AFI_MAX; ++afi) {
- 		if (afi == AFI_L2VPN)
- 			continue;
--		bgp_cleanup_table(bgp, bgp->rib[afi][SAFI_UNICAST],
-+		bgp_cleanup_table(bgp, bgp->rib[afi][SAFI_UNICAST], afi,
- 				  SAFI_UNICAST);
- 		/*
- 		 * VPN and ENCAP and EVPN tables are two-level (RD is top level)
-@@ -5894,7 +5897,7 @@ void bgp_cleanup_routes(struct bgp *bgp)
- 			     dest = bgp_route_next(dest)) {
- 				table = bgp_dest_get_bgp_table_info(dest);
- 				if (table != NULL) {
--					bgp_cleanup_table(bgp, table, safi);
-+					bgp_cleanup_table(bgp, table, afi, safi);
- 					bgp_table_finish(&table);
- 					bgp_dest_set_bgp_table_info(dest, NULL);
- 					bgp_dest_unlock_node(dest);
-@@ -5905,7 +5908,7 @@ void bgp_cleanup_routes(struct bgp *bgp)
- 			     dest = bgp_route_next(dest)) {
- 				table = bgp_dest_get_bgp_table_info(dest);
- 				if (table != NULL) {
--					bgp_cleanup_table(bgp, table, safi);
-+					bgp_cleanup_table(bgp, table, afi, safi);
- 					bgp_table_finish(&table);
- 					bgp_dest_set_bgp_table_info(dest, NULL);
- 					bgp_dest_unlock_node(dest);
-@@ -5917,7 +5920,7 @@ void bgp_cleanup_routes(struct bgp *bgp)
- 	     dest = bgp_route_next(dest)) {
- 		table = bgp_dest_get_bgp_table_info(dest);
- 		if (table != NULL) {
--			bgp_cleanup_table(bgp, table, SAFI_EVPN);
-+			bgp_cleanup_table(bgp, table, afi, SAFI_EVPN);
- 			bgp_table_finish(&table);
- 			bgp_dest_set_bgp_table_info(dest, NULL);
- 			bgp_dest_unlock_node(dest);
-diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
-index ff79746b4c..69240a3b83 100644
---- a/bgpd/bgp_zebra.c
-+++ b/bgpd/bgp_zebra.c
-@@ -1761,7 +1761,7 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
- }
- 
- void bgp_zebra_withdraw(const struct prefix *p, struct bgp_path_info *info,
--			struct bgp *bgp, safi_t safi)
-+			struct bgp *bgp, afi_t afi, safi_t safi)
- {
- 	struct zapi_route api;
- 	struct peer *peer;
-@@ -1780,7 +1780,7 @@ void bgp_zebra_withdraw(const struct prefix *p, struct bgp_path_info *info,
- 
- 	if (safi == SAFI_FLOWSPEC) {
- 		peer = info->peer;
--		bgp_pbr_update_entry(peer->bgp, p, info, AFI_IP, safi, false);
-+		bgp_pbr_update_entry(peer->bgp, p, info, afi, safi, false);
- 		return;
- 	}
- 
-@@ -1821,7 +1821,7 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa
- 			if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)
- 			    && (pi->type == ZEBRA_ROUTE_BGP))
- 				bgp_zebra_withdraw(bgp_dest_get_prefix(dest),
--						   pi, bgp, safi);
-+						   pi, bgp, afi, safi);
- 		}
- 	}
- }
-diff --git a/bgpd/bgp_zebra.h b/bgpd/bgp_zebra.h
-index 0a41069411..a5fe8d7ace 100644
---- a/bgpd/bgp_zebra.h
-+++ b/bgpd/bgp_zebra.h
-@@ -49,7 +49,7 @@ extern void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
- extern void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi);
- extern void bgp_zebra_withdraw(const struct prefix *p,
- 			       struct bgp_path_info *path, struct bgp *bgp,
--			       safi_t safi);
-+			       afi_t afi, safi_t safi);
- 
- /* Announce routes of any bgp subtype of a table to zebra */
- extern void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch b/src/sonic-frr/patch/0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch
index 16383dc95caa..126d3d05d669 100644
--- a/src/sonic-frr/patch/0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch
+++ b/src/sonic-frr/patch/0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch
@@ -15,10 +15,10 @@ Signed-off-by: Donald Sharp <sharpd@nvidia.com>
 Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
 
 diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index 455cd6cdbb..d19f27110e 100644
+index a0113c04e..99fb021b1 100644
 --- a/bgpd/bgp_route.c
 +++ b/bgpd/bgp_route.c
-@@ -3214,8 +3214,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+@@ -3419,8 +3419,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
  					|| new_select->sub_type
  						   == BGP_ROUTE_IMPORTED))
  
@@ -29,7 +29,7 @@ index 455cd6cdbb..d19f27110e 100644
  			}
  		}
  
-@@ -3312,10 +3312,9 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+@@ -3529,10 +3529,9 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
  			 */
  			if (old_select &&
  			    is_route_parent_evpn(old_select))
@@ -42,7 +42,7 @@ index 455cd6cdbb..d19f27110e 100644
  		} else {
  			/* Withdraw the route from the kernel. */
  			if (old_select && old_select->type == ZEBRA_ROUTE_BGP
-@@ -3323,8 +3322,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+@@ -3540,8 +3539,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
  				|| old_select->sub_type == BGP_ROUTE_AGGREGATE
  				|| old_select->sub_type == BGP_ROUTE_IMPORTED))
  
@@ -52,7 +52,7 @@ index 455cd6cdbb..d19f27110e 100644
  		}
  	}
  
-@@ -4203,7 +4201,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id,
+@@ -4446,7 +4444,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id,
  	if (pi && pi->attr->rmap_table_id != new_attr.rmap_table_id) {
  		if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED))
  			/* remove from RIB previous entry */
@@ -61,7 +61,7 @@ index 455cd6cdbb..d19f27110e 100644
  	}
  
  	if (peer->sort == BGP_PEER_EBGP) {
-@@ -5867,8 +5865,7 @@ static void bgp_cleanup_table(struct bgp *bgp, struct bgp_table *table,
+@@ -6072,8 +6070,7 @@ static void bgp_cleanup_table(struct bgp *bgp, struct bgp_table *table,
  				|| pi->sub_type == BGP_ROUTE_IMPORTED)) {
  
  				if (bgp_fibupd_safi(safi))
@@ -70,13 +70,13 @@ index 455cd6cdbb..d19f27110e 100644
 +					bgp_zebra_withdraw(dest, pi, bgp);
  			}
  
- 			bgp_path_info_reap(dest, pi);
+ 			dest = bgp_path_info_reap(dest, pi);
 diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
-index 69240a3b83..920df835a4 100644
+index fe29662e2..9b4b46b40 100644
 --- a/bgpd/bgp_zebra.c
 +++ b/bgpd/bgp_zebra.c
-@@ -1292,9 +1292,8 @@ static bool bgp_zebra_use_nhop_weighted(struct bgp *bgp, struct attr *attr,
- 	return true;
+@@ -1507,9 +1507,8 @@ static void bgp_debug_zebra_nh(struct zapi_route *api)
+ 	}
  }
  
 -void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
@@ -85,18 +85,18 @@ index 69240a3b83..920df835a4 100644
 +void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info,
 +			struct bgp *bgp)
  {
+ 	struct bgp_path_info *bpi_ultimate;
  	struct zapi_route api = { 0 };
- 	struct zapi_nexthop *api_nh;
-@@ -1321,6 +1320,8 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
- 	uint32_t ttl = 0;
- 	uint32_t bos = 0;
- 	uint32_t exp = 0;
+@@ -1522,6 +1521,8 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
+ 	bool is_add;
+ 	uint32_t nhg_id = 0;
+ 	uint32_t recursion_flag = 0;
 +	struct bgp_table *table = bgp_dest_table(dest);
 +	const struct prefix *p = bgp_dest_get_prefix(dest);
  
  	/*
  	 * BGP is installing this route and bgp has been configured
-@@ -1339,9 +1340,9 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
+@@ -1540,16 +1541,16 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
  	if (bgp->main_zebra_update_hold)
  		return;
  
@@ -105,11 +105,10 @@ index 69240a3b83..920df835a4 100644
 -				     safi, true);
 +	if (table->safi == SAFI_FLOWSPEC) {
 +		bgp_pbr_update_entry(bgp, p, info, table->afi, table->safi,
-+				     true);
++							true);
  		return;
  	}
  
-@@ -1354,7 +1355,7 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
  	/* Make Zebra API structure. */
  	api.vrf_id = bgp->vrf_id;
  	api.type = ZEBRA_ROUTE_BGP;
@@ -118,23 +117,16 @@ index 69240a3b83..920df835a4 100644
  	api.prefix = *p;
  	SET_FLAG(api.message, ZAPI_MESSAGE_NEXTHOP);
  
-@@ -1458,12 +1459,13 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
- 			}
- 		}
+@@ -1586,7 +1587,7 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
+ 	metric = info->attr->med;
  
--		if (bgp->table_map[afi][safi].name) {
-+		if (bgp->table_map[table->afi][table->safi].name) {
- 			/* Copy info and attributes, so the route-map
- 			   apply doesn't modify the BGP route info. */
- 			local_attr = *mpinfo->attr;
- 			mpinfo_cp->attr = &local_attr;
--			if (!bgp_table_map_apply(bgp->table_map[afi][safi].map,
-+			if (!bgp_table_map_apply(bgp->table_map[table->afi]
-+						 [table->safi].map,
- 						 p, mpinfo_cp))
- 				continue;
- 
-@@ -1619,7 +1621,7 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
+ 	bgp_zebra_announce_parse_nexthop(info, p, bgp, &api, &valid_nh_count,
+-					 afi, safi, &nhg_id, &metric, &tag,
++					 table->afi, table->safi, &nhg_id, &metric, &tag,
+ 					 &allow_recursion);
+ 
+ 	is_add = (valid_nh_count || nhg_id) ? true : false;
+@@ -1640,7 +1641,7 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
  		api.tag = tag;
  	}
  
@@ -143,7 +135,7 @@ index 69240a3b83..920df835a4 100644
  	if (distance) {
  		SET_FLAG(api.message, ZAPI_MESSAGE_DISTANCE);
  		api.distance = distance;
-@@ -1731,9 +1733,7 @@ void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi)
+@@ -1689,9 +1690,7 @@ void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi)
  			     && (pi->sub_type == BGP_ROUTE_NORMAL
  				 || pi->sub_type == BGP_ROUTE_IMPORTED)))
  
@@ -154,7 +146,7 @@ index 69240a3b83..920df835a4 100644
  }
  
  /* Announce routes of any bgp subtype of a table to zebra */
-@@ -1755,16 +1755,16 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
+@@ -1713,17 +1712,16 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
  		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next)
  			if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) &&
  			    pi->type == ZEBRA_ROUTE_BGP)
@@ -171,12 +163,13 @@ index 69240a3b83..920df835a4 100644
  {
  	struct zapi_route api;
  	struct peer *peer;
+-
 +	struct bgp_table *table = bgp_dest_table(dest);
 +	const struct prefix *p = bgp_dest_get_prefix(dest);
- 
  	/*
  	 * If we are withdrawing the route, we don't need to have this
-@@ -1778,16 +1778,17 @@ void bgp_zebra_withdraw(const struct prefix *p, struct bgp_path_info *info,
+ 	 * flag set.  So unset it.
+@@ -1736,16 +1734,16 @@ void bgp_zebra_withdraw(const struct prefix *p, struct bgp_path_info *info,
  	if (!bgp_install_info_to_zebra(bgp))
  		return;
  
@@ -184,8 +177,7 @@ index 69240a3b83..920df835a4 100644
 +	if (table->safi == SAFI_FLOWSPEC) {
  		peer = info->peer;
 -		bgp_pbr_update_entry(peer->bgp, p, info, afi, safi, false);
-+		bgp_pbr_update_entry(peer->bgp, p, info, table->afi,
-+				     table->safi, false);
++		bgp_pbr_update_entry(peer->bgp, p, info, table->afi, table->safi, false);
  		return;
  	}
  
@@ -197,7 +189,7 @@ index 69240a3b83..920df835a4 100644
  	api.prefix = *p;
  
  	if (info->attr->rmap_table_id) {
-@@ -1820,8 +1821,7 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa
+@@ -1778,8 +1776,7 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa
  		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) {
  			if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)
  			    && (pi->type == ZEBRA_ROUTE_BGP))
@@ -208,11 +200,11 @@ index 69240a3b83..920df835a4 100644
  	}
  }
 diff --git a/bgpd/bgp_zebra.h b/bgpd/bgp_zebra.h
-index a5fe8d7ace..b77e423f8f 100644
+index 396c8335f..0facef5cc 100644
 --- a/bgpd/bgp_zebra.h
 +++ b/bgpd/bgp_zebra.h
-@@ -43,13 +43,11 @@ extern void bgp_zebra_destroy(void);
- extern int bgp_zebra_get_table_range(uint32_t chunk_size,
+@@ -28,13 +28,12 @@ extern void bgp_zebra_destroy(void);
+ extern int bgp_zebra_get_table_range(struct zclient *zc, uint32_t chunk_size,
  				     uint32_t *start, uint32_t *end);
  extern int bgp_if_update_all(void);
 -extern void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
@@ -220,6 +212,7 @@ index a5fe8d7ace..b77e423f8f 100644
 -			       afi_t afi, safi_t safi);
 +extern void bgp_zebra_announce(struct bgp_dest *dest,
 +			       struct bgp_path_info *path, struct bgp *bgp);
++
  extern void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi);
 -extern void bgp_zebra_withdraw(const struct prefix *p,
 -			       struct bgp_path_info *path, struct bgp *bgp,
@@ -230,5 +223,5 @@ index a5fe8d7ace..b77e423f8f 100644
  /* Announce routes of any bgp subtype of a table to zebra */
  extern void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
 -- 
-2.17.1
+2.39.4
 
diff --git a/src/sonic-frr/patch/0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch b/src/sonic-frr/patch/0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch
index 724cf1297a59..ff1dc62228d7 100644
--- a/src/sonic-frr/patch/0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch
+++ b/src/sonic-frr/patch/0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch
@@ -36,46 +36,45 @@ Ticket: #3390099
 
 Signed-off-by: Donald Sharp <sharpd@nvidia.com>
 Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
+---
 
 diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index d19f27110e..c29442d96c 100644
+index 99fb021b1..e45d4b1ff 100644
 --- a/bgpd/bgp_route.c
 +++ b/bgpd/bgp_route.c
-@@ -3214,8 +3214,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+@@ -3419,8 +3419,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
  					|| new_select->sub_type
  						   == BGP_ROUTE_IMPORTED))
  
 -					bgp_zebra_announce(dest, old_select,
 -							   bgp);
-+					bgp_zebra_route_install(
-+						dest, old_select, bgp, true);
++					bgp_zebra_route_install(dest, old_select,
++							   bgp, true);
  			}
  		}
  
-@@ -3312,9 +3312,10 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+@@ -3529,9 +3529,9 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
  			 */
  			if (old_select &&
  			    is_route_parent_evpn(old_select))
 -				bgp_zebra_withdraw(dest, old_select, bgp);
-+				bgp_zebra_route_install(dest, old_select, bgp,
-+							false);
++				bgp_zebra_route_install(dest, old_select, bgp, false);
  
 -			bgp_zebra_announce(dest, new_select, bgp);
 +			bgp_zebra_route_install(dest, new_select, bgp, true);
  		} else {
  			/* Withdraw the route from the kernel. */
  			if (old_select && old_select->type == ZEBRA_ROUTE_BGP
-@@ -3322,7 +3323,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+@@ -3539,7 +3539,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
  				|| old_select->sub_type == BGP_ROUTE_AGGREGATE
  				|| old_select->sub_type == BGP_ROUTE_IMPORTED))
  
 -				bgp_zebra_withdraw(dest, old_select, bgp);
-+				bgp_zebra_route_install(dest, old_select, bgp,
-+							false);
++				bgp_zebra_route_install(dest, old_select, bgp, false);
  		}
  	}
  
-@@ -4201,7 +4203,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id,
+@@ -4444,7 +4444,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id,
  	if (pi && pi->attr->rmap_table_id != new_attr.rmap_table_id) {
  		if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED))
  			/* remove from RIB previous entry */
@@ -84,43 +83,21 @@ index d19f27110e..c29442d96c 100644
  	}
  
  	if (peer->sort == BGP_PEER_EBGP) {
-@@ -5865,7 +5867,8 @@ static void bgp_cleanup_table(struct bgp *bgp, struct bgp_table *table,
+@@ -6070,7 +6070,7 @@ static void bgp_cleanup_table(struct bgp *bgp, struct bgp_table *table,
  				|| pi->sub_type == BGP_ROUTE_IMPORTED)) {
  
  				if (bgp_fibupd_safi(safi))
 -					bgp_zebra_withdraw(dest, pi, bgp);
-+					bgp_zebra_withdraw_actual(dest, pi,
-+								  bgp);
++					bgp_zebra_withdraw_actual(dest, pi, bgp);
  			}
  
- 			bgp_path_info_reap(dest, pi);
-diff --git a/bgpd/bgp_table.h b/bgpd/bgp_table.h
-index d43bf86eb9..45d61f8dfd 100644
---- a/bgpd/bgp_table.h
-+++ b/bgpd/bgp_table.h
-@@ -102,6 +102,7 @@ struct bgp_node {
- 	STAILQ_ENTRY(bgp_dest) pq;
- 
- 	struct zebra_announce_item zai;
-+	struct bgp_path_info *za_bgp_pi;
- 
- 	uint64_t version;
- 
-@@ -117,6 +118,8 @@ struct bgp_node {
- #define BGP_NODE_FIB_INSTALLED          (1 << 6)
- #define BGP_NODE_LABEL_REQUESTED        (1 << 7)
- #define BGP_NODE_SOFT_RECONFIG (1 << 8)
-+#define BGP_NODE_SCHEDULE_FOR_INSTALL (1 << 10)
-+#define BGP_NODE_SCHEDULE_FOR_DELETE (1 << 11)
- 
- 	struct bgp_addpath_node_data tx_addpath;
- 
+ 			dest = bgp_path_info_reap(dest, pi);
 diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
-index 920df835a4..1162941ef1 100644
+index 9b4b46b40..31d981191 100644
 --- a/bgpd/bgp_zebra.c
 +++ b/bgpd/bgp_zebra.c
-@@ -1292,8 +1292,9 @@ static bool bgp_zebra_use_nhop_weighted(struct bgp *bgp, struct attr *attr,
- 	return true;
+@@ -1507,8 +1507,9 @@ static void bgp_debug_zebra_nh(struct zapi_route *api)
+ 	}
  }
  
 -void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info,
@@ -129,9 +106,9 @@ index 920df835a4..1162941ef1 100644
 +bgp_zebra_announce_actual(struct bgp_dest *dest, struct bgp_path_info *info,
 +			  struct bgp *bgp)
  {
+ 	struct bgp_path_info *bpi_ultimate;
  	struct zapi_route api = { 0 };
- 	struct zapi_nexthop *api_nh;
-@@ -1323,27 +1324,10 @@ void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info,
+@@ -1524,27 +1525,10 @@ void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info,
  	struct bgp_table *table = bgp_dest_table(dest);
  	const struct prefix *p = bgp_dest_get_prefix(dest);
  
@@ -154,27 +131,22 @@ index 920df835a4..1162941ef1 100644
 -
  	if (table->safi == SAFI_FLOWSPEC) {
  		bgp_pbr_update_entry(bgp, p, info, table->afi, table->safi,
- 				     true);
+ 							true);
 -		return;
 +		return ZCLIENT_SEND_SUCCESS;
  	}
  
- 	/*
-@@ -1704,10 +1688,11 @@ void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info,
+ 	/* Make Zebra API structure. */
+@@ -1661,7 +1645,7 @@ void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info,
  		zlog_debug("%s: %pFX: announcing to zebra (recursion %sset)",
  			   __func__, p, (recursion_flag ? "" : "NOT "));
  	}
 -	zclient_route_send(is_add ? ZEBRA_ROUTE_ADD : ZEBRA_ROUTE_DELETE,
--			   zclient, &api);
 +	return zclient_route_send(is_add ? ZEBRA_ROUTE_ADD : ZEBRA_ROUTE_DELETE,
-+				  zclient, &api);
+ 			   zclient, &api);
  }
  
-+
- /* Announce all routes of a table to zebra */
- void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi)
- {
-@@ -1733,7 +1718,7 @@ void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi)
+@@ -1690,7 +1674,7 @@ void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi)
  			     && (pi->sub_type == BGP_ROUTE_NORMAL
  				 || pi->sub_type == BGP_ROUTE_IMPORTED)))
  
@@ -183,7 +155,7 @@ index 920df835a4..1162941ef1 100644
  }
  
  /* Announce routes of any bgp subtype of a table to zebra */
-@@ -1755,34 +1740,23 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
+@@ -1712,32 +1696,23 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
  		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next)
  			if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) &&
  			    pi->type == ZEBRA_ROUTE_BGP)
@@ -193,6 +165,7 @@ index 920df835a4..1162941ef1 100644
  
 -void bgp_zebra_withdraw(struct bgp_dest *dest, struct bgp_path_info *info,
 -			struct bgp *bgp)
++
 +enum zclient_send_status bgp_zebra_withdraw_actual(struct bgp_dest *dest,
 +						   struct bgp_path_info *info,
 +						   struct bgp *bgp)
@@ -201,7 +174,6 @@ index 920df835a4..1162941ef1 100644
  	struct peer *peer;
  	struct bgp_table *table = bgp_dest_table(dest);
  	const struct prefix *p = bgp_dest_get_prefix(dest);
- 
 -	/*
 -	 * If we are withdrawing the route, we don't need to have this
 -	 * flag set.  So unset it.
@@ -213,17 +185,16 @@ index 920df835a4..1162941ef1 100644
 -	 */
 -	if (!bgp_install_info_to_zebra(bgp))
 -		return;
--
+ 
  	if (table->safi == SAFI_FLOWSPEC) {
  		peer = info->peer;
- 		bgp_pbr_update_entry(peer->bgp, p, info, table->afi,
- 				     table->safi, false);
+ 		bgp_pbr_update_entry(peer->bgp, p, info, table->afi, table->safi, false);
 -		return;
 +		return ZCLIENT_SEND_SUCCESS;
  	}
  
  	memset(&api, 0, sizeof(api));
-@@ -1800,7 +1774,172 @@ void bgp_zebra_withdraw(struct bgp_dest *dest, struct bgp_path_info *info,
+@@ -1755,7 +1730,172 @@ void bgp_zebra_withdraw(struct bgp_dest *dest, struct bgp_path_info *info,
  		zlog_debug("Tx route delete VRF %u %pFX", bgp->vrf_id,
  			   &api.prefix);
  
@@ -291,7 +262,7 @@ index 920df835a4..1162941ef1 100644
 +
 +	if (status != ZCLIENT_SEND_BUFFERED &&
 +	    zebra_announce_count(&bm->zebra_announce_head))
-+		thread_add_event(bm->master,
++		event_add_event(bm->master,
 +				 bgp_handle_route_announcements_to_zebra, NULL,
 +				 0, &bm->t_bgp_zebra_route);
 +}
@@ -392,12 +363,12 @@ index 920df835a4..1162941ef1 100644
 +		SET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE);
 +	}
 +
-+	thread_add_event(bm->master, bgp_handle_route_announcements_to_zebra,
++	event_add_event(bm->master, bgp_handle_route_announcements_to_zebra,
 +			 NULL, 0, &bm->t_bgp_zebra_route);
  }
  
  /* Withdraw all entries in a BGP instances RIB table from Zebra */
-@@ -1821,7 +1960,7 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa
+@@ -1776,7 +1916,7 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa
  		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) {
  			if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)
  			    && (pi->type == ZEBRA_ROUTE_BGP))
@@ -406,20 +377,20 @@ index 920df835a4..1162941ef1 100644
  		}
  	}
  }
-@@ -3470,6 +3609,7 @@ void bgp_zebra_init(struct thread_master *master, unsigned short instance)
+@@ -3449,6 +3589,7 @@ void bgp_zebra_init(struct event_loop *master, unsigned short instance)
  	zclient = zclient_new(master, &zclient_options_default, bgp_handlers,
  			      array_size(bgp_handlers));
  	zclient_init(zclient, ZEBRA_ROUTE_BGP, 0, &bgpd_privs);
 +	zclient->zebra_buffer_write_ready = bgp_zebra_buffer_write_ready;
  	zclient->zebra_connected = bgp_zebra_connected;
- 	zclient->instance = instance;
- }
+ 	zclient->zebra_capabilities = bgp_zebra_capabilities;
+ 	zclient->nexthop_update = bgp_nexthop_update;
 diff --git a/bgpd/bgp_zebra.h b/bgpd/bgp_zebra.h
-index b77e423f8f..45fcf7f514 100644
+index 0facef5cc..6bfa74f4c 100644
 --- a/bgpd/bgp_zebra.h
 +++ b/bgpd/bgp_zebra.h
-@@ -43,11 +43,10 @@ extern void bgp_zebra_destroy(void);
- extern int bgp_zebra_get_table_range(uint32_t chunk_size,
+@@ -28,12 +28,14 @@ extern void bgp_zebra_destroy(void);
+ extern int bgp_zebra_get_table_range(struct zclient *zc, uint32_t chunk_size,
  				     uint32_t *start, uint32_t *end);
  extern int bgp_if_update_all(void);
 -extern void bgp_zebra_announce(struct bgp_dest *dest,
@@ -427,80 +398,22 @@ index b77e423f8f..45fcf7f514 100644
 +extern void bgp_zebra_route_install(struct bgp_dest *dest,
 +				    struct bgp_path_info *path, struct bgp *bgp,
 +				    bool install);
+ 
  extern void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi);
 -extern void bgp_zebra_withdraw(struct bgp_dest *dest,
 -			       struct bgp_path_info *path, struct bgp *bgp);
- 
- /* Announce routes of any bgp subtype of a table to zebra */
- extern void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
-@@ -131,4 +130,7 @@ extern int bgp_zebra_update(afi_t afi, safi_t safi, vrf_id_t vrf_id, int type);
- extern int bgp_zebra_stale_timer_update(struct bgp *bgp);
- extern int bgp_zebra_srv6_manager_get_locator_chunk(const char *name);
- extern int bgp_zebra_srv6_manager_release_locator_chunk(const char *name);
 +extern enum zclient_send_status
 +bgp_zebra_withdraw_actual(struct bgp_dest *dest, struct bgp_path_info *info,
 +			  struct bgp *bgp);
- #endif /* _QUAGGA_BGP_ZEBRA_H */
-diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
-index 392423e028..da133d71c1 100644
---- a/bgpd/bgpd.c
-+++ b/bgpd/bgpd.c
-@@ -3688,10 +3688,20 @@ int bgp_delete(struct bgp *bgp)
- 	afi_t afi;
- 	safi_t safi;
- 	int i;
-+	struct bgp_dest *dest = NULL;
- 	struct graceful_restart_info *gr_info;
- 
- 	assert(bgp);
- 
-+	while (zebra_announce_count(&bm->zebra_announce_head)) {
-+		dest = zebra_announce_pop(&bm->zebra_announce_head);
-+		if (dest->za_bgp_pi->peer->bgp == bgp) {
-+			bgp_path_info_unlock(dest->za_bgp_pi);
-+			bgp_dest_unlock_node(dest);
-+		} else
-+			zebra_announce_add_tail(&bm->zebra_announce_head, dest);
-+	}
-+
- 	bgp_soft_reconfig_table_task_cancel(bgp, NULL, NULL);
- 
- 	/* make sure we withdraw any exported routes */
-@@ -8035,6 +8045,7 @@ void bgp_master_init(struct thread_master *master, const int buffer_size,
- 	bm->tcp_dscp = IPTOS_PREC_INTERNETCONTROL;
- 	bm->inq_limit = BM_DEFAULT_Q_LIMIT;
- 	bm->outq_limit = BM_DEFAULT_Q_LIMIT;
-+	bm->t_bgp_zebra_route = NULL;
- 
- 	bgp_mac_init();
- 	/* init the rd id space.
-@@ -8278,6 +8289,7 @@ void bgp_terminate(void)
- 		list_delete(&bm->listen_sockets);
- 
- 	THREAD_OFF(bm->t_rmap_update);
-+	THREAD_OFF(bm->t_bgp_zebra_route);
- 
- 	bgp_mac_finish();
- }
-diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h
-index 55f53bf9d3..bdf31f5161 100644
---- a/bgpd/bgpd.h
-+++ b/bgpd/bgpd.h
-@@ -182,6 +182,8 @@ struct bgp_master {
- 	uint32_t inq_limit;
- 	uint32_t outq_limit;
- 
-+	struct thread *t_bgp_zebra_route;
-+
- 	/* To preserve ordering of installations into zebra across all Vrfs */
- 	struct zebra_announce_head zebra_announce_head;
  
+ /* Announce routes of any bgp subtype of a table to zebra */
+ extern void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
 diff --git a/lib/zclient.c b/lib/zclient.c
-index 0082b21485..c48c1c6ee4 100644
+index 6b35b569d..64515c754 100644
 --- a/lib/zclient.c
 +++ b/lib/zclient.c
-@@ -285,6 +285,7 @@ static void zclient_flush_data(struct thread *thread)
- 				 zclient->sock, &zclient->t_write);
+@@ -282,6 +282,7 @@ static void zclient_flush_data(struct event *thread)
+ 				zclient->sock, &zclient->t_write);
  		break;
  	case BUFFER_EMPTY:
 +		/* Currently only Sharpd and Bgpd has callbacks defined */
@@ -508,5 +421,5 @@ index 0082b21485..c48c1c6ee4 100644
  			(*zclient->zebra_buffer_write_ready)();
  		break;
 -- 
-2.17.1
+2.39.4
 
diff --git a/src/sonic-frr/patch/0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch b/src/sonic-frr/patch/0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch
index e83526b6e8ef..1ef5f9c849d7 100644
--- a/src/sonic-frr/patch/0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch
+++ b/src/sonic-frr/patch/0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch
@@ -18,29 +18,315 @@ Ticket: #3390099
 Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
 
 diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c
-index 2b2cfa0f4c..622fd6afd2 100644
+index a846484f0..79e16d8f9 100644
 --- a/bgpd/bgp_evpn.c
 +++ b/bgpd/bgp_evpn.c
-@@ -863,11 +863,10 @@ struct bgp_dest *bgp_evpn_vni_node_lookup(const struct bgpevpn *vpn,
+@@ -55,27 +55,25 @@ DEFINE_MTYPE_STATIC(BGPD, VRF_ROUTE_TARGET, "L3 Route Target");
+ /*
+  * Static function declarations
+  */
+-static void bgp_evpn_remote_ip_hash_init(struct bgpevpn *evpn);
+-static void bgp_evpn_remote_ip_hash_destroy(struct bgpevpn *evpn);
+-static void bgp_evpn_remote_ip_hash_add(struct bgpevpn *vpn,
++void bgp_evpn_remote_ip_hash_init(struct bgpevpn *evpn);
++void bgp_evpn_remote_ip_hash_destroy(struct bgpevpn *evpn);
++void bgp_evpn_remote_ip_hash_add(struct bgpevpn *vpn,
+ 					struct bgp_path_info *pi);
+-static void bgp_evpn_remote_ip_hash_del(struct bgpevpn *vpn,
++void bgp_evpn_remote_ip_hash_del(struct bgpevpn *vpn,
+ 					struct bgp_path_info *pi);
+-static void bgp_evpn_remote_ip_hash_iterate(struct bgpevpn *vpn,
+-					    void (*func)(struct hash_bucket *,
+-							 void *),
+-					    void *arg);
+-static void bgp_evpn_link_to_vni_svi_hash(struct bgp *bgp, struct bgpevpn *vpn);
+-static void bgp_evpn_unlink_from_vni_svi_hash(struct bgp *bgp,
++void bgp_evpn_remote_ip_hash_iterate(struct bgpevpn *vpn,
++					    void (*func)(struct hash_bucket *,void *), void *arg);
++void bgp_evpn_link_to_vni_svi_hash(struct bgp *bgp, struct bgpevpn *vpn);
++void bgp_evpn_unlink_from_vni_svi_hash(struct bgp *bgp,
+ 					      struct bgpevpn *vpn);
+-static unsigned int vni_svi_hash_key_make(const void *p);
+-static bool vni_svi_hash_cmp(const void *p1, const void *p2);
+-static void bgp_evpn_remote_ip_process_nexthops(struct bgpevpn *vpn,
++unsigned int  vni_svi_hash_key_make(const void *p);
++bool vni_svi_hash_cmp(const void *p1, const void *p2);
++void bgp_evpn_remote_ip_process_nexthops(struct bgpevpn *vpn,
+ 						struct ipaddr *addr,
+ 						bool resolve);
+-static void bgp_evpn_remote_ip_hash_link_nexthop(struct hash_bucket *bucket,
++void bgp_evpn_remote_ip_hash_link_nexthop(struct hash_bucket *bucket,
+ 						 void *args);
+-static void bgp_evpn_remote_ip_hash_unlink_nexthop(struct hash_bucket *bucket,
++void bgp_evpn_remote_ip_hash_unlink_nexthop(struct hash_bucket *bucket,
+ 						   void *args);
+ static struct in_addr zero_vtep_ip;
+
+@@ -86,7 +84,7 @@ static struct in_addr zero_vtep_ip;
+ /*
+  * Make vni hash key.
+  */
+-static unsigned int vni_hash_key_make(const void *p)
++unsigned int  vni_hash_key_make(const void *p)
+ {
+ 	const struct bgpevpn *vpn = p;
+ 	return (jhash_1word(vpn->vni, 0));
+@@ -95,7 +93,7 @@ static unsigned int vni_hash_key_make(const void *p)
+ /*
+  * Comparison function for vni hash
+  */
+-static bool vni_hash_cmp(const void *p1, const void *p2)
++bool vni_hash_cmp(const void *p1, const void *p2)
+ {
+ 	const struct bgpevpn *vpn1 = p1;
+ 	const struct bgpevpn *vpn2 = p2;
+@@ -114,7 +112,7 @@ int vni_list_cmp(void *p1, void *p2)
+ /*
+  * Make vrf import route target hash key.
+  */
+-static unsigned int vrf_import_rt_hash_key_make(const void *p)
++unsigned int  vrf_import_rt_hash_key_make(const void *p)
+ {
+ 	const struct vrf_irt_node *irt = p;
+ 	const char *pnt = irt->rt.val;
+@@ -125,7 +123,7 @@ static unsigned int vrf_import_rt_hash_key_make(const void *p)
+ /*
+  * Comparison function for vrf import rt hash
+  */
+-static bool vrf_import_rt_hash_cmp(const void *p1, const void *p2)
++bool vrf_import_rt_hash_cmp(const void *p1, const void *p2)
+ {
+ 	const struct vrf_irt_node *irt1 = p1;
+ 	const struct vrf_irt_node *irt2 = p2;
+@@ -136,7 +134,7 @@ static bool vrf_import_rt_hash_cmp(const void *p1, const void *p2)
+ /*
+  * Create a new vrf import_rt in evpn instance
+  */
+-static struct vrf_irt_node *vrf_import_rt_new(struct ecommunity_val *rt)
++struct vrf_irt_node *vrf_import_rt_new(struct ecommunity_val *rt)
+ {
+ 	struct bgp *bgp_evpn = NULL;
+ 	struct vrf_irt_node *irt;
+@@ -163,7 +161,7 @@ static struct vrf_irt_node *vrf_import_rt_new(struct ecommunity_val *rt)
+ /*
+  * Free the vrf import rt node
+  */
+-static void vrf_import_rt_free(struct vrf_irt_node *irt)
++void vrf_import_rt_free(struct vrf_irt_node *irt)
+ {
+ 	struct bgp *bgp_evpn = NULL;
+
+@@ -179,7 +177,7 @@ static void vrf_import_rt_free(struct vrf_irt_node *irt)
+ 	XFREE(MTYPE_BGP_EVPN_VRF_IMPORT_RT, irt);
+ }
+
+-static void hash_vrf_import_rt_free(struct vrf_irt_node *irt)
++void hash_vrf_import_rt_free(struct vrf_irt_node *irt)
+ {
+ 	XFREE(MTYPE_BGP_EVPN_VRF_IMPORT_RT, irt);
+ }
+@@ -188,7 +186,7 @@ static void hash_vrf_import_rt_free(struct vrf_irt_node *irt)
+  * Function to lookup Import RT node - used to map a RT to set of
+  * VNIs importing routes with that RT.
+  */
+-static struct vrf_irt_node *lookup_vrf_import_rt(struct ecommunity_val *rt)
++struct vrf_irt_node *lookup_vrf_import_rt(struct ecommunity_val *rt)
+ {
+ 	struct bgp *bgp_evpn = NULL;
+ 	struct vrf_irt_node *irt;
+@@ -211,7 +209,7 @@ static struct vrf_irt_node *lookup_vrf_import_rt(struct ecommunity_val *rt)
+ /*
+  * Is specified VRF present on the RT's list of "importing" VRFs?
+  */
+-static int is_vrf_present_in_irt_vrfs(struct list *vrfs, struct bgp *bgp_vrf)
++int is_vrf_present_in_irt_vrfs(struct list *vrfs, struct bgp *bgp_vrf)
+ {
+ 	struct listnode *node = NULL, *nnode = NULL;
+ 	struct bgp *tmp_bgp_vrf = NULL;
+@@ -226,7 +224,7 @@ static int is_vrf_present_in_irt_vrfs(struct list *vrfs, struct bgp *bgp_vrf)
+ /*
+  * Make import route target hash key.
+  */
+-static unsigned int import_rt_hash_key_make(const void *p)
++unsigned int  import_rt_hash_key_make(const void *p)
+ {
+ 	const struct irt_node *irt = p;
+ 	const char *pnt = irt->rt.val;
+@@ -237,7 +235,7 @@ static unsigned int import_rt_hash_key_make(const void *p)
+ /*
+  * Comparison function for import rt hash
+  */
+-static bool import_rt_hash_cmp(const void *p1, const void *p2)
++bool import_rt_hash_cmp(const void *p1, const void *p2)
+ {
+ 	const struct irt_node *irt1 = p1;
+ 	const struct irt_node *irt2 = p2;
+@@ -248,7 +246,7 @@ static bool import_rt_hash_cmp(const void *p1, const void *p2)
+ /*
+  * Create a new import_rt
+  */
+-static struct irt_node *import_rt_new(struct bgp *bgp,
++struct irt_node *import_rt_new(struct bgp *bgp,
+ 				      struct ecommunity_val *rt)
+ {
+ 	struct irt_node *irt;
+@@ -267,14 +265,14 @@ static struct irt_node *import_rt_new(struct bgp *bgp,
+ /*
+  * Free the import rt node
+  */
+-static void import_rt_free(struct bgp *bgp, struct irt_node *irt)
++void import_rt_free(struct bgp *bgp, struct irt_node *irt)
+ {
+ 	hash_release(bgp->import_rt_hash, irt);
+ 	list_delete(&irt->vnis);
+ 	XFREE(MTYPE_BGP_EVPN_IMPORT_RT, irt);
+ }
+
+-static void hash_import_rt_free(struct irt_node *irt)
++void hash_import_rt_free(struct irt_node *irt)
+ {
+ 	XFREE(MTYPE_BGP_EVPN_IMPORT_RT, irt);
+ }
+@@ -283,7 +281,7 @@ static void hash_import_rt_free(struct irt_node *irt)
+  * Function to lookup Import RT node - used to map a RT to set of
+  * VNIs importing routes with that RT.
+  */
+-static struct irt_node *lookup_import_rt(struct bgp *bgp,
++struct irt_node *lookup_import_rt(struct bgp *bgp,
+ 					 struct ecommunity_val *rt)
+ {
+ 	struct irt_node *irt;
+@@ -298,7 +296,7 @@ static struct irt_node *lookup_import_rt(struct bgp *bgp,
+ /*
+  * Is specified VNI present on the RT's list of "importing" VNIs?
+  */
+-static int is_vni_present_in_irt_vnis(struct list *vnis, struct bgpevpn *vpn)
++int is_vni_present_in_irt_vnis(struct list *vnis, struct bgpevpn *vpn)
+ {
+ 	struct listnode *node, *nnode;
+ 	struct bgpevpn *tmp_vpn;
+@@ -384,7 +382,7 @@ int bgp_evpn_route_target_cmp(struct ecommunity *ecom1,
+ /*
+  * Compare L3 Route Targets.
+  */
+-static int evpn_vrf_route_target_cmp(struct vrf_route_target *rt1,
++int evpn_vrf_route_target_cmp(struct vrf_route_target *rt1,
+ 				     struct vrf_route_target *rt2)
+ {
+ 	return bgp_evpn_route_target_cmp(rt1->ecom, rt2->ecom);
+@@ -399,7 +397,7 @@ void bgp_evpn_xxport_delete_ecomm(void *val)
+ /*
+  * Delete l3 Route Target.
+  */
+-static void evpn_vrf_rt_del(void *val)
++void evpn_vrf_rt_del(void *val)
+ {
+ 	struct vrf_route_target *l3rt = val;
+
+@@ -411,7 +409,7 @@ static void evpn_vrf_rt_del(void *val)
+ /*
+  * Allocate a new l3 Route Target.
+  */
+-static struct vrf_route_target *evpn_vrf_rt_new(struct ecommunity *ecom)
++struct vrf_route_target *evpn_vrf_rt_new(struct ecommunity *ecom)
+ {
+ 	struct vrf_route_target *l3rt;
+
+@@ -446,7 +444,7 @@ static inline void mask_ecom_global_admin(struct ecommunity_val *dst,
+  * Converts the RT to Ecommunity Value and adjusts masking based
+  * on flags set for RT.
+  */
+-static void vrf_rt2ecom_val(struct ecommunity_val *to_eval,
++void vrf_rt2ecom_val(struct ecommunity_val *to_eval,
+ 			    const struct vrf_route_target *l3rt, int iter)
+ {
+ 	const struct ecommunity_val *eval;
+@@ -470,7 +468,7 @@ static void vrf_rt2ecom_val(struct ecommunity_val *to_eval,
+  * Map one RT to specified VRF.
+  * bgp_vrf = BGP vrf instance
+  */
+-static void map_vrf_to_rt(struct bgp *bgp_vrf, struct vrf_route_target *l3rt)
++void map_vrf_to_rt(struct bgp *bgp_vrf, struct vrf_route_target *l3rt)
+ {
+ 	uint32_t i = 0;
+
+@@ -499,7 +497,7 @@ static void map_vrf_to_rt(struct bgp *bgp_vrf, struct vrf_route_target *l3rt)
+  * VRFs for this RT, then the RT hash is deleted.
+  * bgp_vrf: BGP VRF specific instance
+  */
+-static void unmap_vrf_from_rt(struct bgp *bgp_vrf,
++void unmap_vrf_from_rt(struct bgp *bgp_vrf,
+ 			      struct vrf_route_target *l3rt)
+ {
+ 	uint32_t i;
+@@ -527,7 +525,7 @@ static void unmap_vrf_from_rt(struct bgp *bgp_vrf,
+ /*
+  * Map one RT to specified VNI.
+  */
+-static void map_vni_to_rt(struct bgp *bgp, struct bgpevpn *vpn,
++void map_vni_to_rt(struct bgp *bgp, struct bgpevpn *vpn,
+ 			  struct ecommunity_val *eval)
+ {
+ 	struct irt_node *irt;
+@@ -558,7 +556,7 @@ static void map_vni_to_rt(struct bgp *bgp, struct bgpevpn *vpn,
+  * Unmap specified VNI from specified RT. If there are no other
+  * VNIs for this RT, then the RT hash is deleted.
+  */
+-static void unmap_vni_from_rt(struct bgp *bgp, struct bgpevpn *vpn,
++void unmap_vni_from_rt(struct bgp *bgp, struct bgpevpn *vpn,
+ 			      struct irt_node *irt)
+ {
+ 	/* Delete VNI from hash list for this RT. */
+@@ -568,7 +566,7 @@ static void unmap_vni_from_rt(struct bgp *bgp, struct bgpevpn *vpn,
+ 	}
+ }
+
+-static void bgp_evpn_get_rmac_nexthop(struct bgpevpn *vpn,
++void bgp_evpn_get_rmac_nexthop(struct bgpevpn *vpn,
+ 				      const struct prefix_evpn *p,
+ 				      struct attr *attr, uint8_t flags)
+ {
+@@ -609,7 +607,7 @@ static void bgp_evpn_get_rmac_nexthop(struct bgpevpn *vpn,
+  * VNIs but the same across routers (in the same AS) for a particular
+  * VNI.
+  */
+-static void form_auto_rt(struct bgp *bgp, vni_t vni, struct list *rtl,
++void form_auto_rt(struct bgp *bgp, vni_t vni, struct list *rtl,
+ 			 bool is_l3)
+ {
+ 	struct ecommunity_val eval;
+@@ -657,7 +655,7 @@ static void form_auto_rt(struct bgp *bgp, vni_t vni, struct list *rtl,
+  * Derive RD and RT for a VNI automatically. Invoked at the time of
+  * creation of a VNI.
+  */
+-static void derive_rd_rt_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
++void derive_rd_rt_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
+ {
+ 	bgp_evpn_derive_auto_rd(bgp, vpn);
+ 	bgp_evpn_derive_auto_rt_import(bgp, vpn);
+@@ -667,7 +665,7 @@ static void derive_rd_rt_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
+ /*
+  * Convert nexthop (remote VTEP IP) into an IPv6 address.
+  */
+-static void evpn_convert_nexthop_to_ipv6(struct attr *attr)
++void evpn_convert_nexthop_to_ipv6(struct attr *attr)
+ {
+ 	if (BGP_ATTR_NEXTHOP_AFI_IP6(attr))
+ 		return;
+@@ -892,7 +890,7 @@ struct bgp_dest *bgp_evpn_vni_node_lookup(const struct bgpevpn *vpn,
  /*
   * Add (update) or delete MACIP from zebra.
   */
 -static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn,
--				       const struct prefix_evpn *p,
--				       const struct ethaddr *mac,
--				       struct in_addr remote_vtep_ip, int add,
--				       uint8_t flags, uint32_t seq, esi_t *esi)
-+static enum zclient_send_status bgp_zebra_send_remote_macip(
-+	struct bgp *bgp, struct bgpevpn *vpn, const struct prefix_evpn *p,
-+	const struct ethaddr *mac, struct in_addr remote_vtep_ip, int add,
-+	uint8_t flags, uint32_t seq, esi_t *esi)
- {
- 	struct stream *s;
- 	uint16_t ipa_len;
-@@ -875,8 +874,12 @@ static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn,
++enum zclient_send_status bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn,
+ 				       const struct prefix_evpn *p,
+ 				       const struct ethaddr *mac,
+ 				       struct in_addr remote_vtep_ip, int add,
+@@ -903,9 +901,12 @@ static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn,
+ 	static struct in_addr zero_remote_vtep_ip;
  	bool esi_valid;
- 
- 	/* Check socket. */
+
+-	/* Check socket. */
 -	if (!zclient || zclient->sock < 0)
 -		return 0;
 +	if (!zclient || zclient->sock < 0) {
@@ -49,33 +335,30 @@ index 2b2cfa0f4c..622fd6afd2 100644
 +				   __func__);
 +		return ZCLIENT_SEND_SUCCESS;
 +	}
- 
+
  	/* Don't try to register if Zebra doesn't know of this instance. */
  	if (!IS_BGP_INST_KNOWN_TO_ZEBRA(bgp)) {
-@@ -884,7 +887,7 @@ static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn,
+@@ -913,7 +914,7 @@ static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn,
  			zlog_debug(
  				"%s: No zebra instance to talk to, not installing remote macip",
  				__func__);
 -		return 0;
 +		return ZCLIENT_SEND_SUCCESS;
  	}
- 
+
  	if (!esi)
-@@ -956,15 +959,20 @@ static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn,
+@@ -988,15 +989,18 @@ static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn,
  /*
   * Add (update) or delete remote VTEP from zebra.
   */
 -static int bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn,
--				      const struct prefix_evpn *p,
--				      int flood_control, int add)
-+static enum zclient_send_status
-+bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn,
-+			   const struct prefix_evpn *p, int flood_control,
-+			   int add)
++enum zclient_send_status bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn,
+ 				      const struct prefix_evpn *p,
+ 				      int flood_control, int add)
  {
  	struct stream *s;
- 
- 	/* Check socket. */
+
+-	/* Check socket. */
 -	if (!zclient || zclient->sock < 0)
 -		return 0;
 +	if (!zclient || zclient->sock < 0) {
@@ -84,83 +367,95 @@ index 2b2cfa0f4c..622fd6afd2 100644
 +				   __func__);
 +		return ZCLIENT_SEND_SUCCESS;
 +	}
- 
+
  	/* Don't try to register if Zebra doesn't know of this instance. */
  	if (!IS_BGP_INST_KNOWN_TO_ZEBRA(bgp)) {
-@@ -972,7 +980,7 @@ static int bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn,
+@@ -1004,7 +1008,7 @@ static int bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn,
  			zlog_debug(
  				"%s: No zebra instance to talk to, not installing remote vtep",
  				__func__);
 -		return 0;
 +		return ZCLIENT_SEND_SUCCESS;
  	}
- 
+
  	s = zclient->obuf;
-@@ -989,7 +997,7 @@ static int bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn,
+@@ -1021,7 +1025,7 @@ static int bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn,
  			EC_BGP_VTEP_INVALID,
  			"Bad remote IP when trying to %s remote VTEP for VNI %u",
- 			add ? "ADD" : "DEL", vpn->vni);
+ 			add ? "ADD" : "DEL", (vpn ? vpn->vni : 0));
 -		return -1;
 +		return ZCLIENT_SEND_FAILURE;
  	}
  	stream_putl(s, flood_control);
- 
-@@ -1222,14 +1230,15 @@ static void add_mac_mobility_to_attr(uint32_t seq_num, struct attr *attr)
+
+@@ -1043,7 +1047,7 @@ static int bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn,
+ /*
+  * Build extended communities for EVPN prefix route.
+  */
+-static void build_evpn_type5_route_extcomm(struct bgp *bgp_vrf,
++void build_evpn_type5_route_extcomm(struct bgp *bgp_vrf,
+ 					   struct attr *attr)
+ {
+ 	struct ecommunity ecom_encap;
+@@ -1100,7 +1104,7 @@ static void build_evpn_type5_route_extcomm(struct bgp *bgp_vrf,
+  * added, if present, based on passed settings - only for non-link-local
+  * type-2 routes.
+  */
+-static void build_evpn_route_extcomm(struct bgpevpn *vpn, struct attr *attr,
++void build_evpn_route_extcomm(struct bgpevpn *vpn, struct attr *attr,
+ 				     int add_l3_ecomm,
+ 				     struct ecommunity *macvrf_soo)
+ {
+@@ -1209,7 +1213,7 @@ static void build_evpn_route_extcomm(struct bgpevpn *vpn, struct attr *attr,
+ /*
+  * Add MAC mobility extended community to attribute.
+  */
+-static void add_mac_mobility_to_attr(uint32_t seq_num, struct attr *attr)
++void add_mac_mobility_to_attr(uint32_t seq_num, struct attr *attr)
+ {
+ 	struct ecommunity ecom_tmp;
+ 	struct ecommunity_val eval;
+@@ -1263,14 +1267,14 @@ static void add_mac_mobility_to_attr(uint32_t seq_num, struct attr *attr)
  }
- 
+
  /* Install EVPN route into zebra. */
 -static int evpn_zebra_install(struct bgp *bgp, struct bgpevpn *vpn,
--			      const struct prefix_evpn *p,
--			      struct bgp_path_info *pi)
-+enum zclient_send_status evpn_zebra_install(struct bgp *bgp,
-+					    struct bgpevpn *vpn,
-+					    const struct prefix_evpn *p,
-+					    struct bgp_path_info *pi)
++enum zclient_send_status  evpn_zebra_install(struct bgp *bgp, struct bgpevpn *vpn,
+ 			      const struct prefix_evpn *p,
+ 			      struct bgp_path_info *pi)
  {
 -	int ret;
  	uint8_t flags;
- 	int flood_control;
+ 	int flood_control = VXLAN_FLOOD_DISABLED;
  	uint32_t seq;
 +	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
- 
+
  	if (p->prefix.route_type == BGP_EVPN_MAC_IP_ROUTE) {
  		flags = 0;
-@@ -1302,6 +1311,7 @@ static int evpn_zebra_install(struct bgp *bgp, struct bgpevpn *vpn,
- 			flood_control = VXLAN_FLOOD_DISABLED;
- 			break;
- 		}
-+
- 		ret = bgp_zebra_send_remote_vtep(bgp, vpn, p, flood_control, 1);
- 	}
- 
-@@ -1309,11 +1319,13 @@ static int evpn_zebra_install(struct bgp *bgp, struct bgpevpn *vpn,
+@@ -1355,11 +1359,11 @@ static int evpn_zebra_install(struct bgp *bgp, struct bgpevpn *vpn,
  }
- 
+
  /* Uninstall EVPN route from zebra. */
 -static int evpn_zebra_uninstall(struct bgp *bgp, struct bgpevpn *vpn,
--				const struct prefix_evpn *p,
--				struct bgp_path_info *pi, bool is_sync)
-+enum zclient_send_status evpn_zebra_uninstall(struct bgp *bgp,
-+					      struct bgpevpn *vpn,
-+					      const struct prefix_evpn *p,
-+					      struct bgp_path_info *pi,
-+					      bool is_sync)
++enum zclient_send_status evpn_zebra_uninstall(struct bgp *bgp, struct bgpevpn *vpn,
+ 				const struct prefix_evpn *p,
+ 				struct bgp_path_info *pi, bool is_sync)
  {
 -	int ret;
 +	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
- 
+
  	if (p->prefix.route_type == BGP_EVPN_MAC_IP_ROUTE)
  		ret = bgp_zebra_send_remote_macip(
-@@ -1328,7 +1340,7 @@ static int evpn_zebra_uninstall(struct bgp *bgp, struct bgpevpn *vpn,
- 		ret = bgp_evpn_remote_es_evi_del(bgp, vpn, p);
- 	else
- 		ret = bgp_zebra_send_remote_vtep(bgp, vpn, p,
--					VXLAN_FLOOD_DISABLED, 0);
-+						 VXLAN_FLOOD_DISABLED, 0);
- 
- 	return ret;
- }
-@@ -1419,12 +1431,18 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
+@@ -1384,7 +1388,7 @@ static int evpn_zebra_uninstall(struct bgp *bgp, struct bgpevpn *vpn,
+  * by a "remote" best route. The prior route has to be deleted and withdrawn
+  * from peers.
+  */
+-static void evpn_delete_old_local_route(struct bgp *bgp, struct bgpevpn *vpn,
++void evpn_delete_old_local_route(struct bgp *bgp, struct bgpevpn *vpn,
+ 					struct bgp_dest *dest,
+ 					struct bgp_path_info *old_local,
+ 					struct bgp_path_info *new_select)
+@@ -1465,12 +1469,17 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
  	    && !CHECK_FLAG(dest->flags, BGP_NODE_USER_CLEAR)
  	    && !CHECK_FLAG(old_select->flags, BGP_PATH_ATTR_CHANGED)
  	    && !bgp_addpath_is_addpath_used(&bgp->tx_addpath, afi, safi)) {
@@ -181,11 +476,10 @@ index 2b2cfa0f4c..622fd6afd2 100644
 +				bgp_zebra_route_install(dest, old_select, bgp,
 +							true, vpn, false);
 +		}
-+
  		UNSET_FLAG(old_select->flags, BGP_PATH_MULTIPATH_CHG);
  		UNSET_FLAG(old_select->flags, BGP_PATH_LINK_BW_CHG);
  		bgp_zebra_clear_route_change_flags(dest);
-@@ -1456,10 +1474,14 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
+@@ -1502,10 +1511,14 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
  	if (new_select && new_select->type == ZEBRA_ROUTE_BGP
  	    && (new_select->sub_type == BGP_ROUTE_IMPORTED ||
  			bgp_evpn_attr_is_sync(new_select->attr))) {
@@ -201,10 +495,10 @@ index 2b2cfa0f4c..622fd6afd2 100644
 +		else
 +			bgp_zebra_route_install(dest, new_select, bgp, true,
 +						vpn, false);
- 
+
  		/* If an old best existed and it was a "local" route, the only
  		 * reason
-@@ -1476,13 +1498,20 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
+@@ -1522,13 +1535,20 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
  			evpn_delete_old_local_route(bgp, vpn, dest,
  					old_select, new_select);
  	} else {
@@ -230,9 +524,72 @@ index 2b2cfa0f4c..622fd6afd2 100644
 +							false, vpn, false);
 +		}
  	}
- 
+
  	/* Clear any route change flags. */
-@@ -2012,9 +2041,19 @@ static void evpn_zebra_reinstall_best_route(struct bgp *bgp,
+@@ -1541,7 +1561,7 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
+ 	return ret;
+ }
+
+-static struct bgp_path_info *bgp_evpn_route_get_local_path(
++struct bgp_path_info *bgp_evpn_route_get_local_path(
+ 		struct bgp *bgp, struct bgp_dest *dest)
+ {
+ 	struct bgp_path_info *tmp_pi;
+@@ -1558,7 +1578,7 @@ static struct bgp_path_info *bgp_evpn_route_get_local_path(
+ 	return local_pi;
+ }
+
+-static int update_evpn_type5_route_entry(struct bgp *bgp_evpn,
++int update_evpn_type5_route_entry(struct bgp *bgp_evpn,
+ 					 struct bgp *bgp_vrf, afi_t afi,
+ 					 safi_t safi, struct bgp_dest *dest,
+ 					 struct attr *attr, int *route_changed)
+@@ -1627,7 +1647,7 @@ static int update_evpn_type5_route_entry(struct bgp *bgp_evpn,
+ }
+
+ /* update evpn type-5 route entry */
+-static int update_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp,
++int update_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp,
+ 				   struct attr *src_attr, afi_t src_afi,
+ 				   safi_t src_safi)
+ {
+@@ -1732,7 +1752,7 @@ static int update_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp,
+ 	return 0;
+ }
+
+-static void bgp_evpn_get_sync_info(struct bgp *bgp, esi_t *esi,
++void bgp_evpn_get_sync_info(struct bgp *bgp, esi_t *esi,
+ 				   struct bgp_dest *dest, uint32_t loc_seq,
+ 				   uint32_t *max_sync_seq, bool *active_on_peer,
+ 				   bool *peer_router, bool *proxy_from_peer,
+@@ -1809,7 +1829,7 @@ static void bgp_evpn_get_sync_info(struct bgp *bgp, esi_t *esi,
+  * Note: The local path can only exist as a best path in the
+  * VPN route table. It will take precedence over all sync paths.
+  */
+-static void update_evpn_route_entry_sync_info(struct bgp *bgp,
++void update_evpn_route_entry_sync_info(struct bgp *bgp,
+ 					      struct bgp_dest *dest,
+ 					      struct attr *attr,
+ 					      uint32_t loc_seq, bool setup_sync,
+@@ -1879,7 +1899,7 @@ static void update_evpn_route_entry_sync_info(struct bgp *bgp,
+  * Create or update EVPN route entry. This could be in the VNI route tables
+  * or the global route table.
+  */
+-static int update_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
++int update_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
+ 				   afi_t afi, safi_t safi,
+ 				   struct bgp_dest *dest, struct attr *attr,
+ 				   const struct ethaddr *mac,
+@@ -2044,7 +2064,7 @@ static int update_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
+ 	return route_change;
+ }
+
+-static void evpn_zebra_reinstall_best_route(struct bgp *bgp,
++void evpn_zebra_reinstall_best_route(struct bgp *bgp,
+ 					    struct bgpevpn *vpn,
+ 					    struct bgp_dest *dest)
+ {
+@@ -2062,9 +2082,19 @@ static void evpn_zebra_reinstall_best_route(struct bgp *bgp,
  	if (curr_select && curr_select->type == ZEBRA_ROUTE_BGP
  			&& (curr_select->sub_type == BGP_ROUTE_IMPORTED ||
  				bgp_evpn_attr_is_sync(curr_select->attr)))
@@ -253,9 +610,36 @@ index 2b2cfa0f4c..622fd6afd2 100644
 +							true, vpn, false);
 +		}
  }
- 
+
  /*
-@@ -2189,8 +2228,16 @@ static int update_evpn_route(struct bgp *bgp, struct bgpevpn *vpn,
+@@ -2081,7 +2111,7 @@ static void evpn_zebra_reinstall_best_route(struct bgp *bgp,
+  * additional handling to prevent bgp from injecting and holding on to a
+  * non-best local path.
+  */
+-static struct bgp_dest *
++struct bgp_dest *
+ evpn_cleanup_local_non_best_route(struct bgp *bgp, struct bgpevpn *vpn,
+ 				  struct bgp_dest *dest,
+ 				  struct bgp_path_info *local_pi)
+@@ -2099,7 +2129,7 @@ evpn_cleanup_local_non_best_route(struct bgp *bgp, struct bgpevpn *vpn,
+ 	return bgp_path_info_reap(dest, local_pi);
+ }
+
+-static inline bool bgp_evpn_route_add_l3_ecomm_ok(struct bgpevpn *vpn,
++inline bool bgp_evpn_route_add_l3_ecomm_ok(struct bgpevpn *vpn,
+ 						  const struct prefix_evpn *p,
+ 						  esi_t *esi)
+ {
+@@ -2116,7 +2146,7 @@ static inline bool bgp_evpn_route_add_l3_ecomm_ok(struct bgpevpn *vpn,
+  * Create or update EVPN route (of type based on prefix) for specified VNI
+  * and schedule for processing.
+  */
+-static int update_evpn_route(struct bgp *bgp, struct bgpevpn *vpn,
++int update_evpn_route(struct bgp *bgp, struct bgpevpn *vpn,
+ 			     struct prefix_evpn *p, uint8_t flags,
+ 			     uint32_t seq, esi_t *esi)
+ {
+@@ -2245,8 +2275,16 @@ static int update_evpn_route(struct bgp *bgp, struct bgpevpn *vpn,
  			 * has been removed.
  			 */
  			new_is_sync = bgp_evpn_attr_is_sync(pi->attr);
@@ -274,7 +658,33 @@ index 2b2cfa0f4c..622fd6afd2 100644
  		}
  	}
  	bgp_path_info_unlock(pi);
-@@ -2444,8 +2491,16 @@ void bgp_evpn_update_type2_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
+@@ -2308,7 +2346,7 @@ void delete_evpn_route_entry(struct bgp *bgp, afi_t afi, safi_t safi,
+ }
+
+ /* Delete EVPN type5 route */
+-static int delete_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp)
++int delete_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp)
+ {
+ 	afi_t afi = AFI_L2VPN;
+ 	safi_t safi = SAFI_EVPN;
+@@ -2339,7 +2377,7 @@ static int delete_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp)
+  * Delete EVPN route (of type based on prefix) for specified VNI and
+  * schedule for processing.
+  */
+-static int delete_evpn_route(struct bgp *bgp, struct bgpevpn *vpn,
++int delete_evpn_route(struct bgp *bgp, struct bgpevpn *vpn,
+ 			     struct prefix_evpn *p)
+ {
+ 	struct bgp_dest *dest, *global_dest;
+@@ -2408,6 +2446,7 @@ void bgp_evpn_update_type2_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
+ 	int route_change;
+ 	bool old_is_sync = false;
+ 	struct ecommunity *macvrf_soo = NULL;
++	struct prefix_evpn p;
+
+ 	if (CHECK_FLAG(local_pi->flags, BGP_PATH_REMOVED))
+ 		return;
+@@ -2512,8 +2551,16 @@ void bgp_evpn_update_type2_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
  			 * has been removed.
  			 */
  			new_is_sync = bgp_evpn_attr_is_sync(pi->attr);
@@ -283,8 +693,8 @@ index 2b2cfa0f4c..622fd6afd2 100644
 +			if (!new_is_sync && old_is_sync) {
 +				if (CHECK_FLAG(bgp->flags,
 +					       BGP_FLAG_DELETE_IN_PROGRESS))
-+					(void)evpn_zebra_uninstall(
-+						bgp, vpn, &evp, pi, true);
++					evpn_zebra_uninstall(bgp, vpn, &p, pi,
++							     true);
 +				else
 +					bgp_zebra_route_install(dest, pi, bgp,
 +								false, vpn,
@@ -292,10 +702,100 @@ index 2b2cfa0f4c..622fd6afd2 100644
 +			}
  		}
  	}
- 
-@@ -2701,7 +2756,22 @@ static int delete_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
+
+@@ -2541,7 +2588,7 @@ void bgp_evpn_update_type2_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
+ 	aspath_unintern(&attr.aspath);
+ }
+
+-static void update_type2_route(struct bgp *bgp, struct bgpevpn *vpn,
++void update_type2_route(struct bgp *bgp, struct bgpevpn *vpn,
+ 			       struct bgp_dest *dest)
+ {
+ 	struct bgp_path_info *tmp_pi;
+@@ -2571,7 +2618,7 @@ static void update_type2_route(struct bgp *bgp, struct bgpevpn *vpn,
+  * Update all type-2 (MACIP) local routes for this VNI - these should also
+  * be scheduled for advertise to peers.
+  */
+-static void update_all_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
++void update_all_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
+ {
+ 	struct bgp_dest *dest;
+
+@@ -2592,7 +2639,7 @@ static void update_all_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
+  * Delete all type-2 (MACIP) local routes for this VNI - only from the
+  * global routing table. These are also scheduled for withdraw from peers.
+  */
+-static void delete_global_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
++void delete_global_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
+ {
+ 	afi_t afi;
+ 	safi_t safi;
+@@ -2626,7 +2673,7 @@ static void delete_global_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
+ 	}
+ }
+
+-static struct bgp_dest *delete_vni_type2_route(struct bgp *bgp,
++struct bgp_dest *delete_vni_type2_route(struct bgp *bgp,
+ 					       struct bgp_dest *dest)
+ {
+ 	struct bgp_path_info *pi;
+@@ -2648,7 +2695,7 @@ static struct bgp_dest *delete_vni_type2_route(struct bgp *bgp,
+ 	return dest;
+ }
+
+-static void delete_vni_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
++void delete_vni_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
+ {
+ 	struct bgp_dest *dest;
+
+@@ -2672,7 +2719,7 @@ static void delete_vni_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
+  * Delete all type-2 (MACIP) local routes for this VNI - from the global
+  * table as well as the per-VNI route table.
+  */
+-static void delete_all_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
++void delete_all_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
+ {
+ 	/* First, walk the global route table for this VNI's type-2 local
+ 	 * routes.
+@@ -2685,7 +2732,7 @@ static void delete_all_type2_routes(struct bgp *bgp, struct bgpevpn *vpn)
+ /*
+  * Delete all routes in the per-VNI route table.
+  */
+-static void delete_all_vni_routes(struct bgp *bgp, struct bgpevpn *vpn)
++void delete_all_vni_routes(struct bgp *bgp, struct bgpevpn *vpn)
+ {
+ 	struct bgp_dest *dest;
+ 	struct bgp_path_info *pi, *nextpi;
+@@ -2716,7 +2763,7 @@ static void delete_all_vni_routes(struct bgp *bgp, struct bgpevpn *vpn)
+ }
+
+ /* BUM traffic flood mode per-l2-vni */
+-static int bgp_evpn_vni_flood_mode_get(struct bgp *bgp,
++int bgp_evpn_vni_flood_mode_get(struct bgp *bgp,
+ 					struct bgpevpn *vpn)
+ {
+ 	/* if flooding has been globally disabled per-vni mode is
+@@ -2766,7 +2813,7 @@ int update_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
+ /* Update Type-2/3 Routes for L2VNI.
+  * Called by hash_iterate()
+  */
+-static void update_routes_for_vni_hash(struct hash_bucket *bucket,
++void update_routes_for_vni_hash(struct hash_bucket *bucket,
+ 				       struct bgp *bgp)
+ {
+ 	struct bgpevpn *vpn;
+@@ -2784,7 +2831,7 @@ static void update_routes_for_vni_hash(struct hash_bucket *bucket,
+  * the per-VNI table. Invoked upon the VNI being deleted or EVPN
+  * (advertise-all-vni) being disabled.
+  */
+-static int delete_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
++int delete_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
+ {
+ 	int ret;
+ 	struct prefix_evpn p;
+@@ -2795,7 +2842,22 @@ static int delete_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
  	delete_all_type2_routes(bgp, vpn);
- 
+
  	build_evpn_type3_prefix(&p, vpn->originator_ip);
 +
 +	/*
@@ -315,8 +815,519 @@ index 2b2cfa0f4c..622fd6afd2 100644
 +	UNSET_FLAG(bgp->flags, BGP_FLAG_VNI_DOWN);
  	if (ret)
  		return ret;
- 
-@@ -6028,6 +6098,17 @@ struct bgpevpn *bgp_evpn_new(struct bgp *bgp, vni_t vni,
+
+@@ -2809,7 +2871,7 @@ static int delete_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
+  * remove the type-3 route if any. A new type-3 route will be generated
+  * post tunnel_ip update if the new flood mode is head-end-replication.
+  */
+-static int bgp_evpn_mcast_grp_change(struct bgp *bgp, struct bgpevpn *vpn,
++int bgp_evpn_mcast_grp_change(struct bgp *bgp, struct bgpevpn *vpn,
+ 		struct in_addr mcast_grp)
+ {
+ 	struct prefix_evpn p;
+@@ -2833,7 +2895,7 @@ static int bgp_evpn_mcast_grp_change(struct bgp *bgp, struct bgpevpn *vpn,
+  * Note: Route re-advertisement happens elsewhere after other processing
+  * other changes.
+  */
+-static void handle_tunnel_ip_change(struct bgp *bgp_vrf, struct bgp *bgp_evpn,
++void handle_tunnel_ip_change(struct bgp *bgp_vrf, struct bgp *bgp_evpn,
+ 				    struct bgpevpn *vpn,
+ 				    struct in_addr originator_ip)
+ {
+@@ -2882,7 +2944,7 @@ static void handle_tunnel_ip_change(struct bgp *bgp_vrf, struct bgp *bgp_evpn,
+ 	return;
+ }
+
+-static struct bgp_path_info *
++struct bgp_path_info *
+ bgp_create_evpn_bgp_path_info(struct bgp_path_info *parent_pi,
+ 			      struct bgp_dest *dest, struct attr *attr)
+ {
+@@ -2918,7 +2980,7 @@ bgp_create_evpn_bgp_path_info(struct bgp_path_info *parent_pi,
+ /*
+  * Install route entry into the VRF routing table and invoke route selection.
+  */
+-static int install_evpn_route_entry_in_vrf(struct bgp *bgp_vrf,
++int install_evpn_route_entry_in_vrf(struct bgp *bgp_vrf,
+ 					   const struct prefix_evpn *evp,
+ 					   struct bgp_path_info *parent_pi)
+ {
+@@ -3102,7 +3164,7 @@ static int install_evpn_route_entry_in_vrf(struct bgp *bgp_vrf,
+ /*
+  * Common handling for vni route tables install/selection.
+  */
+-static int install_evpn_route_entry_in_vni_common(
++int install_evpn_route_entry_in_vni_common(
+ 	struct bgp *bgp, struct bgpevpn *vpn, const struct prefix_evpn *p,
+ 	struct bgp_dest *dest, struct bgp_path_info *parent_pi)
+ {
+@@ -3202,7 +3264,7 @@ static int install_evpn_route_entry_in_vni_common(
+ /*
+  * Common handling for vni route tables uninstall/selection.
+  */
+-static int uninstall_evpn_route_entry_in_vni_common(
++int uninstall_evpn_route_entry_in_vni_common(
+ 	struct bgp *bgp, struct bgpevpn *vpn, const struct prefix_evpn *p,
+ 	struct bgp_dest *dest, struct bgp_path_info *parent_pi)
+ {
+@@ -3243,7 +3305,7 @@ static int uninstall_evpn_route_entry_in_vni_common(
+ /*
+  * Install route entry into VNI IP table and invoke route selection.
+  */
+-static int install_evpn_route_entry_in_vni_ip(struct bgp *bgp,
++int install_evpn_route_entry_in_vni_ip(struct bgp *bgp,
+ 					      struct bgpevpn *vpn,
+ 					      const struct prefix_evpn *p,
+ 					      struct bgp_path_info *parent_pi)
+@@ -3270,7 +3332,7 @@ static int install_evpn_route_entry_in_vni_ip(struct bgp *bgp,
+ /*
+  * Install route entry into VNI MAC table and invoke route selection.
+  */
+-static int install_evpn_route_entry_in_vni_mac(struct bgp *bgp,
++int install_evpn_route_entry_in_vni_mac(struct bgp *bgp,
+ 					       struct bgpevpn *vpn,
+ 					       const struct prefix_evpn *p,
+ 					       struct bgp_path_info *parent_pi)
+@@ -3296,7 +3358,7 @@ static int install_evpn_route_entry_in_vni_mac(struct bgp *bgp,
+ /*
+  * Uninstall route entry from VNI IP table and invoke route selection.
+  */
+-static int uninstall_evpn_route_entry_in_vni_ip(struct bgp *bgp,
++int uninstall_evpn_route_entry_in_vni_ip(struct bgp *bgp,
+ 						struct bgpevpn *vpn,
+ 						const struct prefix_evpn *p,
+ 						struct bgp_path_info *parent_pi)
+@@ -3325,7 +3387,7 @@ static int uninstall_evpn_route_entry_in_vni_ip(struct bgp *bgp,
+ /*
+  * Uninstall route entry from VNI IP table and invoke route selection.
+  */
+-static int
++int
+ uninstall_evpn_route_entry_in_vni_mac(struct bgp *bgp, struct bgpevpn *vpn,
+ 				      const struct prefix_evpn *p,
+ 				      struct bgp_path_info *parent_pi)
+@@ -3353,7 +3415,7 @@ uninstall_evpn_route_entry_in_vni_mac(struct bgp *bgp, struct bgpevpn *vpn,
+  * Uninstall route entry from the VRF routing table and send message
+  * to zebra, if appropriate.
+  */
+-static int uninstall_evpn_route_entry_in_vrf(struct bgp *bgp_vrf,
++int uninstall_evpn_route_entry_in_vrf(struct bgp *bgp_vrf,
+ 					     const struct prefix_evpn *evp,
+ 					     struct bgp_path_info *parent_pi)
+ {
+@@ -3445,7 +3507,7 @@ static int uninstall_evpn_route_entry_in_vrf(struct bgp *bgp_vrf,
+ /*
+  * Install route entry into the VNI routing tables.
+  */
+-static int install_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
++int install_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
+ 				    const struct prefix_evpn *p,
+ 				    struct bgp_path_info *parent_pi)
+ {
+@@ -3484,7 +3546,7 @@ static int install_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
+ /*
+  * Uninstall route entry from the VNI routing tables.
+  */
+-static int uninstall_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
++int uninstall_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
+ 				      const struct prefix_evpn *p,
+ 				      struct bgp_path_info *parent_pi)
+ {
+@@ -3524,7 +3586,7 @@ static int uninstall_evpn_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
+  * Given a route entry and a VRF, see if this route entry should be
+  * imported into the VRF i.e., RTs match + Site-of-Origin check passes.
+  */
+-static int is_route_matching_for_vrf(struct bgp *bgp_vrf,
++int is_route_matching_for_vrf(struct bgp *bgp_vrf,
+ 				     struct bgp_path_info *pi)
+ {
+ 	struct attr *attr = pi->attr;
+@@ -3591,7 +3653,7 @@ static int is_route_matching_for_vrf(struct bgp *bgp_vrf,
+  * Given a route entry and a VNI, see if this route entry should be
+  * imported into the VNI i.e., RTs match.
+  */
+-static int is_route_matching_for_vni(struct bgp *bgp, struct bgpevpn *vpn,
++int is_route_matching_for_vni(struct bgp *bgp, struct bgpevpn *vpn,
+ 				     struct bgp_path_info *pi)
+ {
+ 	struct attr *attr = pi->attr;
+@@ -3654,7 +3716,7 @@ static int is_route_matching_for_vni(struct bgp *bgp, struct bgpevpn *vpn,
+ 	return 0;
+ }
+
+-static bool bgp_evpn_route_matches_macvrf_soo(struct bgp_path_info *pi,
++bool bgp_evpn_route_matches_macvrf_soo(struct bgp_path_info *pi,
+ 					      const struct prefix_evpn *evp)
+ {
+ 	struct bgp *bgp_evpn = bgp_get_evpn();
+@@ -3693,7 +3755,7 @@ static bool bgp_evpn_route_matches_macvrf_soo(struct bgp_path_info *pi,
+  * macthes with bgp instance router mac. It avoid installing
+  * route into bgp vrf table and remote rmac in bridge table.
+  */
+-static int bgp_evpn_route_rmac_self_check(struct bgp *bgp_vrf,
++int bgp_evpn_route_rmac_self_check(struct bgp *bgp_vrf,
+ 					  const struct prefix_evpn *evp,
+ 					  struct bgp_path_info *pi)
+ {
+@@ -3722,7 +3784,7 @@ static int bgp_evpn_route_rmac_self_check(struct bgp *bgp_vrf,
+ }
+
+ /* don't import hosts that are locally attached */
+-static inline bool
++inline bool
+ bgp_evpn_skip_vrf_import_of_local_es(struct bgp *bgp_vrf,
+ 				     const struct prefix_evpn *evp,
+ 				     struct bgp_path_info *pi, int install)
+@@ -3799,7 +3861,7 @@ int bgp_evpn_route_entry_install_if_vrf_match(struct bgp *bgp_vrf,
+  * Install or uninstall mac-ip routes are appropriate for this
+  * particular VRF.
+  */
+-static int install_uninstall_routes_for_vrf(struct bgp *bgp_vrf, int install)
++int install_uninstall_routes_for_vrf(struct bgp *bgp_vrf, int install)
+ {
+ 	afi_t afi;
+ 	safi_t safi;
+@@ -3862,7 +3924,7 @@ static int install_uninstall_routes_for_vrf(struct bgp *bgp_vrf, int install)
+  * Install or uninstall routes of specified type that are appropriate for this
+  * particular VNI.
+  */
+-static int install_uninstall_routes_for_vni(struct bgp *bgp,
++int install_uninstall_routes_for_vni(struct bgp *bgp,
+ 					    struct bgpevpn *vpn,
+ 					    bgp_evpn_route_type rtype,
+ 					    int install)
+@@ -3948,7 +4010,7 @@ static int install_uninstall_routes_for_vni(struct bgp *bgp,
+ /* Install any existing remote routes applicable for this VRF into VRF RIB. This
+  * is invoked upon l3vni-add or l3vni import rt change
+  */
+-static int install_routes_for_vrf(struct bgp *bgp_vrf)
++int install_routes_for_vrf(struct bgp *bgp_vrf)
+ {
+ 	install_uninstall_routes_for_vrf(bgp_vrf, 1);
+ 	return 0;
+@@ -3959,7 +4021,7 @@ static int install_routes_for_vrf(struct bgp *bgp_vrf)
+  * routing table. This is invoked when a VNI becomes "live" or its Import
+  * RT is changed.
+  */
+-static int install_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
++int install_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
+ {
+ 	int ret;
+
+@@ -3981,7 +4043,7 @@ static int install_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
+ }
+
+ /* uninstall routes from l3vni vrf. */
+-static int uninstall_routes_for_vrf(struct bgp *bgp_vrf)
++int uninstall_routes_for_vrf(struct bgp *bgp_vrf)
+ {
+ 	install_uninstall_routes_for_vrf(bgp_vrf, 0);
+ 	return 0;
+@@ -3991,7 +4053,7 @@ static int uninstall_routes_for_vrf(struct bgp *bgp_vrf)
+  * Uninstall any existing remote routes for this VNI. One scenario in which
+  * this is invoked is upon an import RT change.
+  */
+-static int uninstall_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
++int uninstall_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
+ {
+ 	int ret;
+
+@@ -4017,7 +4079,7 @@ static int uninstall_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
+ /*
+  * Install or uninstall route in matching VRFs (list).
+  */
+-static int install_uninstall_route_in_vrfs(struct bgp *bgp_def, afi_t afi,
++int install_uninstall_route_in_vrfs(struct bgp *bgp_def, afi_t afi,
+ 					   safi_t safi, struct prefix_evpn *evp,
+ 					   struct bgp_path_info *pi,
+ 					   struct list *vrfs, int install)
+@@ -4066,7 +4128,7 @@ static int install_uninstall_route_in_vrfs(struct bgp *bgp_def, afi_t afi,
+ /*
+  * Install or uninstall route in matching VNIs (list).
+  */
+-static int install_uninstall_route_in_vnis(struct bgp *bgp, afi_t afi,
++int install_uninstall_route_in_vnis(struct bgp *bgp, afi_t afi,
+ 					   safi_t safi, struct prefix_evpn *evp,
+ 					   struct bgp_path_info *pi,
+ 					   struct list *vnis, int install)
+@@ -4103,7 +4165,7 @@ static int install_uninstall_route_in_vnis(struct bgp *bgp, afi_t afi,
+ /*
+  * Install or uninstall route for appropriate VNIs/ESIs.
+  */
+-static int bgp_evpn_install_uninstall_table(struct bgp *bgp, afi_t afi,
++int bgp_evpn_install_uninstall_table(struct bgp *bgp, afi_t afi,
+ 					    safi_t safi, const struct prefix *p,
+ 					    struct bgp_path_info *pi,
+ 					    int import, bool in_vni_rt,
+@@ -4246,7 +4308,7 @@ static int bgp_evpn_install_uninstall_table(struct bgp *bgp, afi_t afi,
+ /*
+  * Install or uninstall route for appropriate VNIs/ESIs.
+  */
+-static int install_uninstall_evpn_route(struct bgp *bgp, afi_t afi, safi_t safi,
++int install_uninstall_evpn_route(struct bgp *bgp, afi_t afi, safi_t safi,
+ 					const struct prefix *p,
+ 					struct bgp_path_info *pi, int import)
+ {
+@@ -4270,7 +4332,7 @@ void bgp_evpn_import_type2_route(struct bgp_path_info *pi, int import)
+  * delete and withdraw all ipv4 and ipv6 routes in the vrf table as type-5
+  * routes
+  */
+-static void delete_withdraw_vrf_routes(struct bgp *bgp_vrf)
++void delete_withdraw_vrf_routes(struct bgp *bgp_vrf)
+ {
+ 	/* Delete ipv4 default route and withdraw from peers */
+ 	if (evpn_default_originate_set(bgp_vrf, AFI_IP, SAFI_UNICAST))
+@@ -4329,7 +4391,7 @@ void update_advertise_vrf_routes(struct bgp *bgp_vrf)
+  * done in the global route table using the routes which already exist in the
+  * VRF routing table
+  */
+-static void update_router_id_vrf(struct bgp *bgp_vrf)
++void update_router_id_vrf(struct bgp *bgp_vrf)
+ {
+ 	/* skip if the RD is configured */
+ 	if (is_vrf_rd_configured(bgp_vrf))
+@@ -4347,7 +4409,7 @@ static void update_router_id_vrf(struct bgp *bgp_vrf)
+  * This is invoked upon VRF RD change. The processing is done only from global
+  * table.
+  */
+-static void withdraw_router_id_vrf(struct bgp *bgp_vrf)
++void withdraw_router_id_vrf(struct bgp *bgp_vrf)
+ {
+ 	/* skip if the RD is configured */
+ 	if (is_vrf_rd_configured(bgp_vrf))
+@@ -4357,7 +4419,7 @@ static void withdraw_router_id_vrf(struct bgp *bgp_vrf)
+ 	delete_withdraw_vrf_routes(bgp_vrf);
+ }
+
+-static void update_advertise_vni_route(struct bgp *bgp, struct bgpevpn *vpn,
++void update_advertise_vni_route(struct bgp *bgp, struct bgpevpn *vpn,
+ 				       struct bgp_dest *dest)
+ {
+ 	struct bgp_dest *global_dest;
+@@ -4440,7 +4502,7 @@ static void update_advertise_vni_route(struct bgp *bgp, struct bgpevpn *vpn,
+  * change. Note that the processing is done only on the global route table
+  * using routes that already exist in the per-VNI table.
+  */
+-static void update_advertise_vni_routes(struct bgp *bgp, struct bgpevpn *vpn)
++void update_advertise_vni_routes(struct bgp *bgp, struct bgpevpn *vpn)
+ {
+ 	struct prefix_evpn p;
+ 	struct bgp_dest *dest, *global_dest;
+@@ -4501,7 +4563,7 @@ static void update_advertise_vni_routes(struct bgp *bgp, struct bgpevpn *vpn)
+  * Delete (and withdraw) local routes for a VNI - only from the global
+  * table. Invoked upon router-id change.
+  */
+-static int delete_withdraw_vni_routes(struct bgp *bgp, struct bgpevpn *vpn)
++int delete_withdraw_vni_routes(struct bgp *bgp, struct bgpevpn *vpn)
+ {
+ 	struct prefix_evpn p;
+ 	struct bgp_dest *global_dest;
+@@ -4541,7 +4603,7 @@ static int delete_withdraw_vni_routes(struct bgp *bgp, struct bgpevpn *vpn)
+  * router-id. The routes in the per-VNI table are used to create routes in
+  * the global table and schedule them.
+  */
+-static void update_router_id_vni(struct hash_bucket *bucket, struct bgp *bgp)
++void update_router_id_vni(struct hash_bucket *bucket, struct bgp *bgp)
+ {
+ 	struct bgpevpn *vpn = (struct bgpevpn *)bucket->data;
+
+@@ -4559,7 +4621,7 @@ static void update_router_id_vni(struct hash_bucket *bucket, struct bgp *bgp)
+  * the router-id and is done only on the global route table, the routes
+  * are needed in the per-VNI table to re-advertise with new router id.
+  */
+-static void withdraw_router_id_vni(struct hash_bucket *bucket, struct bgp *bgp)
++void withdraw_router_id_vni(struct hash_bucket *bucket, struct bgp *bgp)
+ {
+ 	struct bgpevpn *vpn = (struct bgpevpn *)bucket->data;
+
+@@ -4574,7 +4636,7 @@ static void withdraw_router_id_vni(struct hash_bucket *bucket, struct bgp *bgp)
+  * Create RT-3 for a VNI and schedule for processing and advertisement.
+  * This is invoked upon flooding mode changing to head-end replication.
+  */
+-static void create_advertise_type3(struct hash_bucket *bucket, void *data)
++void create_advertise_type3(struct hash_bucket *bucket, void *data)
+ {
+ 	struct bgpevpn *vpn = bucket->data;
+ 	struct bgp *bgp = data;
+@@ -4595,7 +4657,7 @@ static void create_advertise_type3(struct hash_bucket *bucket, void *data)
+  * Delete RT-3 for a VNI and schedule for processing and withdrawal.
+  * This is invoked upon flooding mode changing to drop BUM packets.
+  */
+-static void delete_withdraw_type3(struct hash_bucket *bucket, void *data)
++void delete_withdraw_type3(struct hash_bucket *bucket, void *data)
+ {
+ 	struct bgpevpn *vpn = bucket->data;
+ 	struct bgp *bgp = data;
+@@ -4611,7 +4673,7 @@ static void delete_withdraw_type3(struct hash_bucket *bucket, void *data)
+ /*
+  * Process received EVPN type-2 route (advertise or withdraw).
+  */
+-static int process_type2_route(struct peer *peer, afi_t afi, safi_t safi,
++int process_type2_route(struct peer *peer, afi_t afi, safi_t safi,
+ 			       struct attr *attr, uint8_t *pfx, int psize,
+ 			       uint32_t addpath_id)
+ {
+@@ -4740,7 +4802,7 @@ done:
+ /*
+  * Process received EVPN type-3 route (advertise or withdraw).
+  */
+-static int process_type3_route(struct peer *peer, afi_t afi, safi_t safi,
++int process_type3_route(struct peer *peer, afi_t afi, safi_t safi,
+ 			       struct attr *attr, uint8_t *pfx, int psize,
+ 			       uint32_t addpath_id)
+ {
+@@ -4821,7 +4883,7 @@ static int process_type3_route(struct peer *peer, afi_t afi, safi_t safi,
+ /*
+  * Process received EVPN type-5 route (advertise or withdraw).
+  */
+-static int process_type5_route(struct peer *peer, afi_t afi, safi_t safi,
++int process_type5_route(struct peer *peer, afi_t afi, safi_t safi,
+ 			       struct attr *attr, uint8_t *pfx, int psize,
+ 			       uint32_t addpath_id)
+ {
+@@ -4963,7 +5025,7 @@ static int process_type5_route(struct peer *peer, afi_t afi, safi_t safi,
+ 	return 0;
+ }
+
+-static void evpn_mpattr_encode_type5(struct stream *s, const struct prefix *p,
++void evpn_mpattr_encode_type5(struct stream *s, const struct prefix *p,
+ 				     const struct prefix_rd *prd,
+ 				     mpls_label_t *label, uint32_t num_labels,
+ 				     struct attr *attr)
+@@ -5022,7 +5084,7 @@ static void evpn_mpattr_encode_type5(struct stream *s, const struct prefix *p,
+ /*
+  * Cleanup specific VNI upon EVPN (advertise-all-vni) being disabled.
+  */
+-static void cleanup_vni_on_disable(struct hash_bucket *bucket, struct bgp *bgp)
++void cleanup_vni_on_disable(struct hash_bucket *bucket, struct bgp *bgp)
+ {
+ 	struct bgpevpn *vpn = (struct bgpevpn *)bucket->data;
+
+@@ -5038,7 +5100,7 @@ static void cleanup_vni_on_disable(struct hash_bucket *bucket, struct bgp *bgp)
+ /*
+  * Free a VNI entry; iterator function called during cleanup.
+  */
+-static void free_vni_entry(struct hash_bucket *bucket, struct bgp *bgp)
++void free_vni_entry(struct hash_bucket *bucket, struct bgp *bgp)
+ {
+ 	struct bgpevpn *vpn = (struct bgpevpn *)bucket->data;
+
+@@ -5049,7 +5111,7 @@ static void free_vni_entry(struct hash_bucket *bucket, struct bgp *bgp)
+ /*
+  * Derive AUTO import RT for BGP VRF - L3VNI
+  */
+-static void evpn_auto_rt_import_add_for_vrf(struct bgp *bgp_vrf)
++void evpn_auto_rt_import_add_for_vrf(struct bgp *bgp_vrf)
+ {
+ 	struct bgp *bgp_evpn = NULL;
+
+@@ -5067,7 +5129,7 @@ static void evpn_auto_rt_import_add_for_vrf(struct bgp *bgp_vrf)
+ /*
+  * Delete AUTO import RT from BGP VRF - L3VNI
+  */
+-static void evpn_auto_rt_import_delete_for_vrf(struct bgp *bgp_vrf)
++void evpn_auto_rt_import_delete_for_vrf(struct bgp *bgp_vrf)
+ {
+ 	evpn_rt_delete_auto(bgp_vrf, bgp_vrf->l3vni, bgp_vrf->vrf_import_rtl,
+ 			    true);
+@@ -5076,7 +5138,7 @@ static void evpn_auto_rt_import_delete_for_vrf(struct bgp *bgp_vrf)
+ /*
+  * Derive AUTO export RT for BGP VRF - L3VNI
+  */
+-static void evpn_auto_rt_export_add_for_vrf(struct bgp *bgp_vrf)
++void evpn_auto_rt_export_add_for_vrf(struct bgp *bgp_vrf)
+ {
+ 	form_auto_rt(bgp_vrf, bgp_vrf->l3vni, bgp_vrf->vrf_export_rtl, true);
+ }
+@@ -5084,13 +5146,13 @@ static void evpn_auto_rt_export_add_for_vrf(struct bgp *bgp_vrf)
+ /*
+  * Delete AUTO export RT from BGP VRF - L3VNI
+  */
+-static void evpn_auto_rt_export_delete_for_vrf(struct bgp *bgp_vrf)
++void evpn_auto_rt_export_delete_for_vrf(struct bgp *bgp_vrf)
+ {
+ 	evpn_rt_delete_auto(bgp_vrf, bgp_vrf->l3vni, bgp_vrf->vrf_export_rtl,
+ 			    true);
+ }
+
+-static void bgp_evpn_handle_export_rt_change_for_vrf(struct bgp *bgp_vrf)
++void bgp_evpn_handle_export_rt_change_for_vrf(struct bgp *bgp_vrf)
+ {
+ 	struct bgp *bgp_evpn = NULL;
+ 	struct listnode *node = NULL;
+@@ -5111,7 +5173,7 @@ static void bgp_evpn_handle_export_rt_change_for_vrf(struct bgp *bgp_vrf)
+ /*
+  * Handle autort change for a given VNI.
+  */
+-static void update_autort_vni(struct hash_bucket *bucket, struct bgp *bgp)
++void update_autort_vni(struct hash_bucket *bucket, struct bgp *bgp)
+ {
+ 	struct bgpevpn *vpn = bucket->data;
+
+@@ -5135,7 +5197,7 @@ static void update_autort_vni(struct hash_bucket *bucket, struct bgp *bgp)
+ /*
+  * Handle autort change for L3VNI.
+  */
+-static void update_autort_l3vni(struct bgp *bgp)
++void update_autort_l3vni(struct bgp *bgp)
+ {
+ 	if ((CHECK_FLAG(bgp->vrf_flags, BGP_VRF_IMPORT_RT_CFGD))
+ 	    && (CHECK_FLAG(bgp->vrf_flags, BGP_VRF_EXPORT_RT_CFGD)))
+@@ -5330,7 +5392,7 @@ void bgp_evpn_advertise_type5_routes(struct bgp *bgp_vrf, afi_t afi,
+ 	}
+ }
+
+-static void rt_list_remove_node(struct list *rt_list,
++void rt_list_remove_node(struct list *rt_list,
+ 				struct ecommunity *ecomdel, bool is_l3)
+ {
+ 	struct listnode *node = NULL, *nnode = NULL, *node_to_del = NULL;
+@@ -5379,7 +5441,7 @@ void evpn_rt_delete_auto(struct bgp *bgp, vni_t vni, struct list *rtl,
+ 	ecommunity_free(&ecom_auto);
+ }
+
+-static void evpn_vrf_rt_routes_map(struct bgp *bgp_vrf)
++void evpn_vrf_rt_routes_map(struct bgp *bgp_vrf)
+ {
+ 	/* map VRFs to its RTs and install routes matching this new RT */
+ 	if (is_l3vni_live(bgp_vrf)) {
+@@ -5388,7 +5450,7 @@ static void evpn_vrf_rt_routes_map(struct bgp *bgp_vrf)
+ 	}
+ }
+
+-static void evpn_vrf_rt_routes_unmap(struct bgp *bgp_vrf)
++void evpn_vrf_rt_routes_unmap(struct bgp *bgp_vrf)
+ {
+ 	/* uninstall routes from vrf */
+ 	if (is_l3vni_live(bgp_vrf))
+@@ -5398,7 +5460,7 @@ static void evpn_vrf_rt_routes_unmap(struct bgp *bgp_vrf)
+ 	bgp_evpn_unmap_vrf_from_its_rts(bgp_vrf);
+ }
+
+-static bool rt_list_has_cfgd_rt(struct list *rt_list)
++bool rt_list_has_cfgd_rt(struct list *rt_list)
+ {
+ 	struct listnode *node = NULL, *nnode = NULL;
+ 	struct vrf_route_target *l3rt = NULL;
+@@ -5411,7 +5473,7 @@ static bool rt_list_has_cfgd_rt(struct list *rt_list)
+ 	return false;
+ }
+
+-static void unconfigure_import_rt_for_vrf_fini(struct bgp *bgp_vrf)
++void unconfigure_import_rt_for_vrf_fini(struct bgp *bgp_vrf)
+ {
+ 	if (!bgp_vrf->vrf_import_rtl)
+ 		return; /* this should never fail */
+@@ -5424,7 +5486,7 @@ static void unconfigure_import_rt_for_vrf_fini(struct bgp *bgp_vrf)
+ 		evpn_auto_rt_import_add_for_vrf(bgp_vrf);
+ }
+
+-static void unconfigure_export_rt_for_vrf_fini(struct bgp *bgp_vrf)
++void unconfigure_export_rt_for_vrf_fini(struct bgp *bgp_vrf)
+ {
+
+ 	if (!bgp_vrf->vrf_export_rtl)
+@@ -6262,6 +6324,16 @@ struct bgpevpn *bgp_evpn_new(struct bgp *bgp, vni_t vni,
   */
  void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn)
  {
@@ -330,52 +1341,240 @@ index 2b2cfa0f4c..622fd6afd2 100644
 +		} else
 +			zebra_announce_add_tail(&bm->zebra_announce_head, dest);
 +	}
-+
  	bgp_evpn_remote_ip_hash_destroy(vpn);
  	bgp_evpn_vni_es_cleanup(vpn);
  	bgpevpn_unlink_from_l3vni(vpn);
+@@ -6279,7 +6351,7 @@ void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn)
+ 	XFREE(MTYPE_BGP_EVPN, vpn);
+ }
+
+-static void hash_evpn_free(struct bgpevpn *vpn)
++void hash_evpn_free(struct bgpevpn *vpn)
+ {
+ 	XFREE(MTYPE_BGP_EVPN, vpn);
+ }
+@@ -6646,7 +6718,7 @@ int bgp_evpn_local_macip_add(struct bgp *bgp, vni_t vni, struct ethaddr *mac,
+ 	return 0;
+ }
+
+-static void link_l2vni_hash_to_l3vni(struct hash_bucket *bucket,
++void link_l2vni_hash_to_l3vni(struct hash_bucket *bucket,
+ 				     struct bgp *bgp_vrf)
+ {
+ 	struct bgpevpn *vpn = (struct bgpevpn *)bucket->data;
+@@ -7265,7 +7337,7 @@ bool bgp_evpn_is_prefix_nht_supported(const struct prefix *pfx)
+ 	return false;
+ }
+
+-static void *bgp_evpn_remote_ip_hash_alloc(void *p)
++void *bgp_evpn_remote_ip_hash_alloc(void *p)
+ {
+ 	const struct evpn_remote_ip *key = (const struct evpn_remote_ip *)p;
+ 	struct evpn_remote_ip *ip;
+@@ -7277,7 +7349,7 @@ static void *bgp_evpn_remote_ip_hash_alloc(void *p)
+ 	return ip;
+ }
+
+-static unsigned int bgp_evpn_remote_ip_hash_key_make(const void *p)
++unsigned int  bgp_evpn_remote_ip_hash_key_make(const void *p)
+ {
+ 	const struct evpn_remote_ip *ip = p;
+ 	const struct ipaddr *addr = &ip->addr;
+@@ -7289,7 +7361,7 @@ static unsigned int bgp_evpn_remote_ip_hash_key_make(const void *p)
+ 		      array_size(addr->ipaddr_v6.s6_addr32), 0);
+ }
+
+-static bool bgp_evpn_remote_ip_hash_cmp(const void *p1, const void *p2)
++bool bgp_evpn_remote_ip_hash_cmp(const void *p1, const void *p2)
+ {
+ 	const struct evpn_remote_ip *ip1 = p1;
+ 	const struct evpn_remote_ip *ip2 = p2;
+@@ -7297,7 +7369,7 @@ static bool bgp_evpn_remote_ip_hash_cmp(const void *p1, const void *p2)
+ 	return !ipaddr_cmp(&ip1->addr, &ip2->addr);
+ }
+
+-static void bgp_evpn_remote_ip_hash_init(struct bgpevpn *vpn)
++void bgp_evpn_remote_ip_hash_init(struct bgpevpn *vpn)
+ {
+ 	if (!evpn_resolve_overlay_index())
+ 		return;
+@@ -7307,7 +7379,7 @@ static void bgp_evpn_remote_ip_hash_init(struct bgpevpn *vpn)
+ 					  "BGP EVPN remote IP hash");
+ }
+
+-static void bgp_evpn_remote_ip_hash_free(struct hash_bucket *bucket, void *args)
++void bgp_evpn_remote_ip_hash_free(struct hash_bucket *bucket, void *args)
+ {
+ 	struct evpn_remote_ip *ip = (struct evpn_remote_ip *)bucket->data;
+ 	struct bgpevpn *vpn = (struct bgpevpn *)args;
+@@ -7320,7 +7392,7 @@ static void bgp_evpn_remote_ip_hash_free(struct hash_bucket *bucket, void *args)
+ 	XFREE(MTYPE_EVPN_REMOTE_IP, ip);
+ }
+
+-static void bgp_evpn_remote_ip_hash_destroy(struct bgpevpn *vpn)
++void bgp_evpn_remote_ip_hash_destroy(struct bgpevpn *vpn)
+ {
+ 	if (!evpn_resolve_overlay_index() || vpn->remote_ip_hash == NULL)
+ 		return;
+@@ -7334,7 +7406,7 @@ static void bgp_evpn_remote_ip_hash_destroy(struct bgpevpn *vpn)
+ }
+
+ /* Add a remote MAC/IP route to hash table */
+-static void bgp_evpn_remote_ip_hash_add(struct bgpevpn *vpn,
++void bgp_evpn_remote_ip_hash_add(struct bgpevpn *vpn,
+ 					struct bgp_path_info *pi)
+ {
+ 	struct evpn_remote_ip tmp;
+@@ -7371,7 +7443,7 @@ static void bgp_evpn_remote_ip_hash_add(struct bgpevpn *vpn,
+ }
+
+ /* Delete a remote MAC/IP route from hash table */
+-static void bgp_evpn_remote_ip_hash_del(struct bgpevpn *vpn,
++void bgp_evpn_remote_ip_hash_del(struct bgpevpn *vpn,
+ 					struct bgp_path_info *pi)
+ {
+ 	struct evpn_remote_ip tmp;
+@@ -7403,7 +7475,7 @@ static void bgp_evpn_remote_ip_hash_del(struct bgpevpn *vpn,
+ 	}
+ }
+
+-static void bgp_evpn_remote_ip_hash_iterate(struct bgpevpn *vpn,
++void bgp_evpn_remote_ip_hash_iterate(struct bgpevpn *vpn,
+ 					    void (*func)(struct hash_bucket *,
+ 							 void *),
+ 					    void *arg)
+@@ -7414,7 +7486,7 @@ static void bgp_evpn_remote_ip_hash_iterate(struct bgpevpn *vpn,
+ 	hash_iterate(vpn->remote_ip_hash, func, arg);
+ }
+
+-static void show_remote_ip_entry(struct hash_bucket *bucket, void *args)
++void show_remote_ip_entry(struct hash_bucket *bucket, void *args)
+ {
+ 	char buf[INET6_ADDRSTRLEN];
+ 	struct listnode *node = NULL;
+@@ -7442,7 +7514,7 @@ void bgp_evpn_show_remote_ip_hash(struct hash_bucket *bucket, void *args)
+ 	vty_out(vty, "\n");
+ }
+
+-static void bgp_evpn_remote_ip_hash_link_nexthop(struct hash_bucket *bucket,
++void bgp_evpn_remote_ip_hash_link_nexthop(struct hash_bucket *bucket,
+ 						 void *args)
+ {
+ 	struct evpn_remote_ip *ip = (struct evpn_remote_ip *)bucket->data;
+@@ -7451,7 +7523,7 @@ static void bgp_evpn_remote_ip_hash_link_nexthop(struct hash_bucket *bucket,
+ 	bgp_evpn_remote_ip_process_nexthops(vpn, &ip->addr, true);
+ }
+
+-static void bgp_evpn_remote_ip_hash_unlink_nexthop(struct hash_bucket *bucket,
++void bgp_evpn_remote_ip_hash_unlink_nexthop(struct hash_bucket *bucket,
+ 						   void *args)
+ {
+ 	struct evpn_remote_ip *ip = (struct evpn_remote_ip *)bucket->data;
+@@ -7460,14 +7532,14 @@ static void bgp_evpn_remote_ip_hash_unlink_nexthop(struct hash_bucket *bucket,
+ 	bgp_evpn_remote_ip_process_nexthops(vpn, &ip->addr, false);
+ }
+
+-static unsigned int vni_svi_hash_key_make(const void *p)
++unsigned int  vni_svi_hash_key_make(const void *p)
+ {
+ 	const struct bgpevpn *vpn = p;
+
+ 	return jhash_1word(vpn->svi_ifindex, 0);
+ }
+
+-static bool vni_svi_hash_cmp(const void *p1, const void *p2)
++bool vni_svi_hash_cmp(const void *p1, const void *p2)
+ {
+ 	const struct bgpevpn *vpn1 = p1;
+ 	const struct bgpevpn *vpn2 = p2;
+@@ -7475,7 +7547,7 @@ static bool vni_svi_hash_cmp(const void *p1, const void *p2)
+ 	return (vpn1->svi_ifindex == vpn2->svi_ifindex);
+ }
+
+-static struct bgpevpn *bgp_evpn_vni_svi_hash_lookup(struct bgp *bgp,
++struct bgpevpn *bgp_evpn_vni_svi_hash_lookup(struct bgp *bgp,
+ 						    ifindex_t svi)
+ {
+ 	struct bgpevpn *vpn;
+@@ -7487,7 +7559,7 @@ static struct bgpevpn *bgp_evpn_vni_svi_hash_lookup(struct bgp *bgp,
+ 	return vpn;
+ }
+
+-static void bgp_evpn_link_to_vni_svi_hash(struct bgp *bgp, struct bgpevpn *vpn)
++void bgp_evpn_link_to_vni_svi_hash(struct bgp *bgp, struct bgpevpn *vpn)
+ {
+ 	if (vpn->svi_ifindex == 0)
+ 		return;
+@@ -7495,7 +7567,7 @@ static void bgp_evpn_link_to_vni_svi_hash(struct bgp *bgp, struct bgpevpn *vpn)
+ 	(void)hash_get(bgp->vni_svi_hash, vpn, hash_alloc_intern);
+ }
+
+-static void bgp_evpn_unlink_from_vni_svi_hash(struct bgp *bgp,
++void bgp_evpn_unlink_from_vni_svi_hash(struct bgp *bgp,
+ 					      struct bgpevpn *vpn)
+ {
+ 	if (vpn->svi_ifindex == 0)
+@@ -7572,7 +7644,7 @@ bool bgp_evpn_is_gateway_ip_resolved(struct bgp_nexthop_cache *bnc)
+ }
+
+ /* Resolve/Unresolve nexthops when a MAC/IP route is added/deleted */
+-static void bgp_evpn_remote_ip_process_nexthops(struct bgpevpn *vpn,
++void bgp_evpn_remote_ip_process_nexthops(struct bgpevpn *vpn,
+ 						struct ipaddr *addr,
+ 						bool resolve)
+ {
+@@ -7695,7 +7767,7 @@ vni_t bgp_evpn_path_info_get_l3vni(const struct bgp_path_info *pi)
+ /*
+  * Returns true if the l3vni of any of this path doesn't match vrf's l3vni.
+  */
+-static bool bgp_evpn_path_is_dvni(const struct bgp *bgp_vrf,
++bool bgp_evpn_path_is_dvni(const struct bgp *bgp_vrf,
+ 				  const struct bgp_path_info *pi)
+ {
+ 	vni_t vni = 0;
+@@ -7781,4 +7853,5 @@ void bgp_aggr_supp_withdraw_from_evpn(struct bgp *bgp, afi_t afi, safi_t safi)
+ 			}
+ 		}
+ 	}
+-}
++	return;
++}
+\ No newline at end of file
 diff --git a/bgpd/bgp_evpn.h b/bgpd/bgp_evpn.h
-index 3cbc5af5af..bf1943a2db 100644
+index c641a64f6..db05293a4 100644
 --- a/bgpd/bgp_evpn.h
 +++ b/bgpd/bgp_evpn.h
-@@ -230,4 +230,12 @@ extern void
+@@ -176,6 +176,14 @@ bgp_evpn_handle_resolve_overlay_index_set(struct hash_bucket *bucket,
+ extern void
  bgp_evpn_handle_resolve_overlay_index_unset(struct hash_bucket *bucket,
  					    void *arg);
- 
 +extern enum zclient_send_status evpn_zebra_install(struct bgp *bgp,
-+						   struct bgpevpn *vpn,
-+						   const struct prefix_evpn *p,
-+						   struct bgp_path_info *pi);
++					   struct bgpevpn *vpn,
++					   const struct prefix_evpn *p,
++					   struct bgp_path_info *pi);
 +extern enum zclient_send_status
 +evpn_zebra_uninstall(struct bgp *bgp, struct bgpevpn *vpn,
 +		     const struct prefix_evpn *p, struct bgp_path_info *pi,
 +		     bool is_sync);
- #endif /* _QUAGGA_BGP_EVPN_H */
+ extern mpls_label_t *bgp_evpn_path_info_labels_get_l3vni(mpls_label_t *labels,
+ 							 uint32_t num_labels);
+ extern vni_t bgp_evpn_path_info_get_l3vni(const struct bgp_path_info *pi);
 diff --git a/bgpd/bgp_evpn_mh.c b/bgpd/bgp_evpn_mh.c
-index 552365959d..40687c558d 100644
+index d88c52d1f..f36d109b6 100644
 --- a/bgpd/bgp_evpn_mh.c
 +++ b/bgpd/bgp_evpn_mh.c
-@@ -56,13 +56,14 @@ static void bgp_evpn_local_es_down(struct bgp *bgp,
- 		struct bgp_evpn_es *es);
- static void bgp_evpn_local_type1_evi_route_del(struct bgp *bgp,
- 		struct bgp_evpn_es *es);
--static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_add(struct bgp *bgp,
-+static struct bgp_evpn_es_vtep *
-+bgp_evpn_es_vtep_add(struct bgp *bgp, struct bgp_evpn_es *es,
-+		     struct in_addr vtep_ip, bool esr, uint8_t df_alg,
-+		     uint16_t df_pref, int *zret);
-+static enum zclient_send_status bgp_evpn_es_vtep_del(struct bgp *bgp,
+@@ -49,8 +49,8 @@ static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_add(struct bgp *bgp,
  						     struct bgp_evpn_es *es,
  						     struct in_addr vtep_ip,
--						     bool esr, uint8_t df_alg,
+ 						     bool esr, uint8_t df_alg,
 -						     uint16_t df_pref);
 -static void bgp_evpn_es_vtep_del(struct bgp *bgp,
--		struct bgp_evpn_es *es, struct in_addr vtep_ip, bool esr);
-+						     bool esr);
++						     uint16_t df_pref, int *zret);
++static enum zclient_send_status bgp_evpn_es_vtep_del(struct bgp *bgp,
+ 		struct bgp_evpn_es *es, struct in_addr vtep_ip, bool esr);
  static void bgp_evpn_es_cons_checks_pend_add(struct bgp_evpn_es *es);
  static void bgp_evpn_es_cons_checks_pend_del(struct bgp_evpn_es *es);
- static struct bgp_evpn_es_evi *
-@@ -105,6 +106,7 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp,
+@@ -94,6 +94,7 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp,
  					    struct bgp_dest *dest)
  {
  	int ret = 0;
@@ -383,7 +1582,7 @@ index 552365959d..40687c558d 100644
  	afi_t afi = AFI_L2VPN;
  	safi_t safi = SAFI_EVPN;
  	struct bgp_path_info *old_select; /* old best */
-@@ -131,7 +133,7 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp,
+@@ -120,7 +121,7 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp,
  			bgp_evpn_es_vtep_add(bgp, es, old_select->attr->nexthop,
  					     true /*esr*/,
  					     old_select->attr->df_alg,
@@ -392,7 +1591,7 @@ index 552365959d..40687c558d 100644
  		}
  		UNSET_FLAG(old_select->flags, BGP_PATH_MULTIPATH_CHG);
  		bgp_zebra_clear_route_change_flags(dest);
-@@ -160,7 +162,7 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp,
+@@ -149,7 +150,7 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp,
  			&& new_select->sub_type == BGP_ROUTE_IMPORTED) {
  		bgp_evpn_es_vtep_add(bgp, es, new_select->attr->nexthop,
  				     true /*esr */, new_select->attr->df_alg,
@@ -401,30 +1600,19 @@ index 552365959d..40687c558d 100644
  	} else {
  		if (old_select && old_select->type == ZEBRA_ROUTE_BGP
  				&& old_select->sub_type == BGP_ROUTE_IMPORTED)
-@@ -447,7 +449,7 @@ int bgp_evpn_mh_route_update(struct bgp *bgp, struct bgp_evpn_es *es,
- 				&attr->mp_nexthop_global_in);
- 	}
- 
--	/* Return back the route entry. */
-+	/* Return back th*e route entry. */
- 	*ri = tmp_pi;
- 	return 0;
- }
-@@ -1366,23 +1368,28 @@ static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_find(struct bgp_evpn_es *es,
+@@ -1371,23 +1372,26 @@ static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_find(struct bgp_evpn_es *es,
  }
- 
+
  /* Send the remote ES to zebra for NHG programming */
 -static int bgp_zebra_send_remote_es_vtep(struct bgp *bgp,
--		struct bgp_evpn_es_vtep *es_vtep, bool add)
-+static enum zclient_send_status
-+bgp_zebra_send_remote_es_vtep(struct bgp *bgp, struct bgp_evpn_es_vtep *es_vtep,
-+			      bool add)
++static enum zclient_send_status bgp_zebra_send_remote_es_vtep(struct bgp *bgp,
+ 		struct bgp_evpn_es_vtep *es_vtep, bool add)
  {
  	struct bgp_evpn_es *es = es_vtep->es;
  	struct stream *s;
  	uint32_t flags = 0;
- 
- 	/* Check socket. */
+
+-	/* Check socket. */
 -	if (!zclient || zclient->sock < 0)
 -		return 0;
 +	if (!zclient || zclient->sock < 0) {
@@ -433,7 +1621,7 @@ index 552365959d..40687c558d 100644
 +				   __func__);
 +		return ZCLIENT_SEND_SUCCESS;
 +	}
- 
+
  	/* Don't try to register if Zebra doesn't know of this instance. */
  	if (!IS_BGP_INST_KNOWN_TO_ZEBRA(bgp)) {
  		if (BGP_DEBUG(zebra, ZEBRA))
@@ -442,263 +1630,230 @@ index 552365959d..40687c558d 100644
 -		return 0;
 +		return ZCLIENT_SEND_SUCCESS;
  	}
- 
+
  	if (es_vtep->flags & BGP_EVPNES_VTEP_ESR)
-@@ -1413,12 +1420,12 @@ static int bgp_zebra_send_remote_es_vtep(struct bgp *bgp,
+@@ -1418,12 +1422,13 @@ static int bgp_zebra_send_remote_es_vtep(struct bgp *bgp,
  	return zclient_send_message(zclient);
  }
- 
+
 -static void bgp_evpn_es_vtep_re_eval_active(struct bgp *bgp,
--					    struct bgp_evpn_es_vtep *es_vtep,
--					    bool param_change)
-+static enum zclient_send_status bgp_evpn_es_vtep_re_eval_active(
-+	struct bgp *bgp, struct bgp_evpn_es_vtep *es_vtep, bool param_change)
++static enum zclient_send_status bgp_evpn_es_vtep_re_eval_active(struct bgp *bgp,
+ 					    struct bgp_evpn_es_vtep *es_vtep,
+ 					    bool param_change)
  {
  	bool old_active;
  	bool new_active;
 +	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
- 
+
  	old_active = CHECK_FLAG(es_vtep->flags, BGP_EVPNES_VTEP_ACTIVE);
  	/* currently we need an active EVI reference to use the VTEP as
-@@ -1440,7 +1447,7 @@ static void bgp_evpn_es_vtep_re_eval_active(struct bgp *bgp,
+@@ -1445,7 +1450,7 @@ static void bgp_evpn_es_vtep_re_eval_active(struct bgp *bgp,
  				   es_vtep->df_alg, es_vtep->df_pref);
- 
+
  		/* send remote ES to zebra */
 -		bgp_zebra_send_remote_es_vtep(bgp, es_vtep, new_active);
 +		ret = bgp_zebra_send_remote_es_vtep(bgp, es_vtep, new_active);
- 
+
  		/* The NHG is updated first for efficient failover handling.
  		 * Note the NHG can be de-activated while there are bgp
-@@ -1452,13 +1459,14 @@ static void bgp_evpn_es_vtep_re_eval_active(struct bgp *bgp,
+@@ -1457,13 +1462,14 @@ static void bgp_evpn_es_vtep_re_eval_active(struct bgp *bgp,
  		/* queue up the es for background consistency checks */
  		bgp_evpn_es_cons_checks_pend_add(es_vtep->es);
  	}
-+
 +	return ret;
  }
- 
--static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_add(struct bgp *bgp,
--						     struct bgp_evpn_es *es,
--						     struct in_addr vtep_ip,
--						     bool esr, uint8_t df_alg,
+
+ static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_add(struct bgp *bgp,
+ 						     struct bgp_evpn_es *es,
+ 						     struct in_addr vtep_ip,
+ 						     bool esr, uint8_t df_alg,
 -						     uint16_t df_pref)
-+static struct bgp_evpn_es_vtep *
-+bgp_evpn_es_vtep_add(struct bgp *bgp, struct bgp_evpn_es *es,
-+		     struct in_addr vtep_ip, bool esr, uint8_t df_alg,
-+		     uint16_t df_pref, int *zret)
++						     uint16_t df_pref, int *zret)
  {
  	struct bgp_evpn_es_vtep *es_vtep;
  	bool param_change = false;
-@@ -1485,15 +1493,17 @@ static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_add(struct bgp *bgp,
+@@ -1490,15 +1496,16 @@ static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_add(struct bgp *bgp,
  		++es_vtep->evi_cnt;
  	}
- 
+
 -	bgp_evpn_es_vtep_re_eval_active(bgp, es_vtep, param_change);
 +	*zret = bgp_evpn_es_vtep_re_eval_active(bgp, es_vtep, param_change);
- 
+
  	return es_vtep;
  }
- 
+
 -static void bgp_evpn_es_vtep_do_del(struct bgp *bgp,
--		struct bgp_evpn_es_vtep *es_vtep, bool esr)
-+static enum zclient_send_status
-+bgp_evpn_es_vtep_do_del(struct bgp *bgp, struct bgp_evpn_es_vtep *es_vtep,
-+			bool esr)
++static enum zclient_send_status bgp_evpn_es_vtep_do_del(struct bgp *bgp,
+ 		struct bgp_evpn_es_vtep *es_vtep, bool esr)
  {
  	bool param_change = false;
 +	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
- 
+
  	if (BGP_DEBUG(evpn_mh, EVPN_MH_ES))
  		zlog_debug("es %s vtep %pI4 del %s", es_vtep->es->esi_str,
-@@ -1510,18 +1520,25 @@ static void bgp_evpn_es_vtep_do_del(struct bgp *bgp,
+@@ -1515,18 +1522,21 @@ static void bgp_evpn_es_vtep_do_del(struct bgp *bgp,
  			--es_vtep->evi_cnt;
  	}
- 
+
 -	bgp_evpn_es_vtep_re_eval_active(bgp, es_vtep, param_change);
 +	ret = bgp_evpn_es_vtep_re_eval_active(bgp, es_vtep, param_change);
  	bgp_evpn_es_vtep_free(es_vtep);
-+
 +	return ret;
  }
- 
+
 -static void bgp_evpn_es_vtep_del(struct bgp *bgp,
--		struct bgp_evpn_es *es, struct in_addr vtep_ip, bool esr)
 +static enum zclient_send_status bgp_evpn_es_vtep_del(struct bgp *bgp,
-+						     struct bgp_evpn_es *es,
-+						     struct in_addr vtep_ip,
-+						     bool esr)
+ 		struct bgp_evpn_es *es, struct in_addr vtep_ip, bool esr)
  {
  	struct bgp_evpn_es_vtep *es_vtep;
 +	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
- 
+
  	es_vtep = bgp_evpn_es_vtep_find(es, vtep_ip);
  	if (es_vtep)
 -		bgp_evpn_es_vtep_do_del(bgp, es_vtep, esr);
 +		ret = bgp_evpn_es_vtep_do_del(bgp, es_vtep, esr);
-+
 +	return ret;
  }
- 
+
  /********************** ES MAC-IP paths *************************************
-@@ -3382,12 +3399,14 @@ static struct bgp_evpn_es_evi_vtep *bgp_evpn_es_evi_vtep_find(
+@@ -3399,12 +3409,13 @@ static struct bgp_evpn_es_evi_vtep *bgp_evpn_es_evi_vtep_find(
  /* A VTEP can be added as "active" attach to an ES if EAD-per-ES and
   * EAD-per-EVI routes are rxed from it.
   */
 -static void bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp,
--		struct bgp_evpn_es_evi_vtep *evi_vtep)
-+static enum zclient_send_status
-+bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp,
-+				    struct bgp_evpn_es_evi_vtep *evi_vtep)
++static enum zclient_send_status bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp,
+ 		struct bgp_evpn_es_evi_vtep *evi_vtep)
  {
  	bool old_active;
  	bool new_active;
  	uint32_t ead_activity_flags;
 +	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
- 
+
  	old_active = CHECK_FLAG(evi_vtep->flags, BGP_EVPN_EVI_VTEP_ACTIVE);
- 
-@@ -3408,7 +3427,7 @@ static void bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp,
+
+@@ -3425,7 +3436,7 @@ static void bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp,
  	new_active = CHECK_FLAG(evi_vtep->flags, BGP_EVPN_EVI_VTEP_ACTIVE);
- 
+
  	if (old_active == new_active)
 -		return;
 +		return ret;
- 
+
  	if (BGP_DEBUG(evpn_mh, EVPN_MH_ES))
  		zlog_debug("es %s evi %u vtep %pI4 %s",
-@@ -3417,24 +3436,26 @@ static void bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp,
- 			   new_active ? "active" : "inactive");
- 
- 	/* add VTEP to parent es */
--	if (new_active)
-+	if (new_active) {
+@@ -3437,19 +3448,20 @@ static void bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp,
+ 	if (new_active)
  		evi_vtep->es_vtep = bgp_evpn_es_vtep_add(
  			bgp, evi_vtep->es_evi->es, evi_vtep->vtep_ip,
 -			false /*esr*/, 0, 0);
--	else {
 +			false /*esr*/, 0, 0, &ret);
-+	} else {
+ 	else {
  		if (evi_vtep->es_vtep) {
 -			bgp_evpn_es_vtep_do_del(bgp, evi_vtep->es_vtep,
--					false /*esr*/);
 +			ret = bgp_evpn_es_vtep_do_del(bgp, evi_vtep->es_vtep,
-+						      false /*esr*/);
+ 					false /*esr*/);
  			evi_vtep->es_vtep = NULL;
  		}
  	}
  	/* queue up the parent es for background consistency checks */
  	bgp_evpn_es_cons_checks_pend_add(evi_vtep->es_evi->es);
-+
 +	return ret;
  }
- 
+
 -static void bgp_evpn_es_evi_vtep_add(struct bgp *bgp,
--		struct bgp_evpn_es_evi *es_evi, struct in_addr vtep_ip,
--		bool ead_es)
-+static enum zclient_send_status
-+bgp_evpn_es_evi_vtep_add(struct bgp *bgp, struct bgp_evpn_es_evi *es_evi,
-+			 struct in_addr vtep_ip, bool ead_es)
++static enum zclient_send_status bgp_evpn_es_evi_vtep_add(struct bgp *bgp,
+ 		struct bgp_evpn_es_evi *es_evi, struct in_addr vtep_ip,
+ 		bool ead_es)
  {
- 	struct bgp_evpn_es_evi_vtep *evi_vtep;
- 
-@@ -3454,18 +3475,19 @@ static void bgp_evpn_es_evi_vtep_add(struct bgp *bgp,
+@@ -3475,18 +3487,19 @@ static void bgp_evpn_es_evi_vtep_add(struct bgp *bgp,
  	else
  		SET_FLAG(evi_vtep->flags, BGP_EVPN_EVI_VTEP_EAD_PER_EVI);
- 
+
 -	bgp_evpn_es_evi_vtep_re_eval_active(bgp, evi_vtep);
 +	return bgp_evpn_es_evi_vtep_re_eval_active(bgp, evi_vtep);
  }
- 
+
 -static void bgp_evpn_es_evi_vtep_del(struct bgp *bgp,
--		struct bgp_evpn_es_evi *es_evi, struct in_addr vtep_ip,
--		bool ead_es)
-+static enum zclient_send_status
-+bgp_evpn_es_evi_vtep_del(struct bgp *bgp, struct bgp_evpn_es_evi *es_evi,
-+			 struct in_addr vtep_ip, bool ead_es)
++static enum zclient_send_status bgp_evpn_es_evi_vtep_del(struct bgp *bgp,
+ 		struct bgp_evpn_es_evi *es_evi, struct in_addr vtep_ip,
+ 		bool ead_es)
  {
  	struct bgp_evpn_es_evi_vtep *evi_vtep;
 +	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
- 
+
  	evi_vtep = bgp_evpn_es_evi_vtep_find(es_evi, vtep_ip);
  	if (!evi_vtep)
 -		return;
 +		return ret;
- 
+
  	if (BGP_DEBUG(evpn_mh, EVPN_MH_ES))
  		zlog_debug("del es %s evi %u vtep %pI4 %s",
-@@ -3478,8 +3500,10 @@ static void bgp_evpn_es_evi_vtep_del(struct bgp *bgp,
+@@ -3503,8 +3516,9 @@ static void bgp_evpn_es_evi_vtep_del(struct bgp *bgp,
  	else
  		UNSET_FLAG(evi_vtep->flags, BGP_EVPN_EVI_VTEP_EAD_PER_EVI);
- 
+
 -	bgp_evpn_es_evi_vtep_re_eval_active(bgp, evi_vtep);
 +	ret = bgp_evpn_es_evi_vtep_re_eval_active(bgp, evi_vtep);
  	bgp_evpn_es_evi_vtep_free(evi_vtep);
-+
 +	return ret;
  }
- 
+
  /* compare ES-IDs for the ES-EVI RB tree maintained per-VNI */
-@@ -3755,18 +3779,20 @@ int bgp_evpn_local_es_evi_add(struct bgp *bgp, esi_t *esi, vni_t vni)
+@@ -3780,7 +3794,7 @@ int bgp_evpn_local_es_evi_add(struct bgp *bgp, esi_t *esi, vni_t vni)
  /* Add remote ES-EVI entry. This is actually the remote VTEP add and the
   * ES-EVI is implicity created on first VTEP's reference.
   */
 -int bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn,
--		const struct prefix_evpn *p)
-+enum zclient_send_status bgp_evpn_remote_es_evi_add(struct bgp *bgp,
-+						    struct bgpevpn *vpn,
-+						    const struct prefix_evpn *p)
++enum zclient_send_status bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn,
+ 		const struct prefix_evpn *p)
  {
  	char buf[ESI_STR_LEN];
- 	struct bgp_evpn_es *es;
+@@ -3788,10 +3802,11 @@ int bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn,
  	struct bgp_evpn_es_evi *es_evi;
  	bool ead_es;
  	const esi_t *esi = &p->prefix.ead_addr.esi;
 +	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
- 
+
  	if (!vpn)
  		/* local EAD-ES need not be sent back to zebra */
 -		return 0;
 +		return ret;
- 
+
  	if (BGP_DEBUG(evpn_mh, EVPN_MH_ES))
  		zlog_debug("add remote %s es %s evi %u vtep %pI4",
-@@ -3783,27 +3809,29 @@ int bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn,
+@@ -3808,27 +3823,28 @@ int bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn,
  		es_evi = bgp_evpn_es_evi_new(es, vpn);
- 
+
  	ead_es = !!p->prefix.ead_addr.eth_tag;
 -	bgp_evpn_es_evi_vtep_add(bgp, es_evi, p->prefix.ead_addr.ip.ipaddr_v4,
--			ead_es);
-+	ret = bgp_evpn_es_evi_vtep_add(bgp, es_evi,
-+				       p->prefix.ead_addr.ip.ipaddr_v4, ead_es);
- 
++	ret = bgp_evpn_es_evi_vtep_add(bgp, es_evi, p->prefix.ead_addr.ip.ipaddr_v4,
+ 			ead_es);
+
  	bgp_evpn_es_evi_remote_info_re_eval(es_evi);
 -	return 0;
 +	return ret;
  }
- 
+
  /* A remote VTEP has withdrawn. The es-evi-vtep will be deleted and the
   * parent es-evi freed up implicitly in last VTEP's deref.
   */
 -int bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn,
--		const struct prefix_evpn *p)
-+enum zclient_send_status bgp_evpn_remote_es_evi_del(struct bgp *bgp,
-+						    struct bgpevpn *vpn,
-+						    const struct prefix_evpn *p)
++enum zclient_send_status bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn,
+ 		const struct prefix_evpn *p)
  {
  	char buf[ESI_STR_LEN];
  	struct bgp_evpn_es *es;
  	struct bgp_evpn_es_evi *es_evi;
  	bool ead_es;
 +	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
- 
+
  	if (!vpn)
  		/* local EAD-ES need not be sent back to zebra */
 -		return 0;
 +		return ret;
- 
+
  	if (BGP_DEBUG(evpn_mh, EVPN_MH_ES))
  		zlog_debug(
-@@ -3822,7 +3850,7 @@ int bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn,
+@@ -3847,7 +3863,7 @@ int bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn,
  				esi_to_str(&p->prefix.ead_addr.esi, buf,
  					   sizeof(buf)),
  				vpn->vni, &p->prefix.ead_addr.ip.ipaddr_v4);
@@ -707,31 +1862,29 @@ index 552365959d..40687c558d 100644
  	}
  	es_evi = bgp_evpn_es_evi_find(es, vpn);
  	if (!es_evi) {
-@@ -3835,14 +3863,15 @@ int bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn,
+@@ -3860,14 +3876,14 @@ int bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn,
  					   sizeof(buf)),
  				vpn->vni,
  				&p->prefix.ead_addr.ip.ipaddr_v4);
 -		return 0;
 +		return ret;
  	}
- 
+
  	ead_es = !!p->prefix.ead_addr.eth_tag;
 -	bgp_evpn_es_evi_vtep_del(bgp, es_evi, p->prefix.ead_addr.ip.ipaddr_v4,
--			ead_es);
-+	ret = bgp_evpn_es_evi_vtep_del(bgp, es_evi,
-+				       p->prefix.ead_addr.ip.ipaddr_v4, ead_es);
++	ret = bgp_evpn_es_evi_vtep_del(bgp, es_evi, p->prefix.ead_addr.ip.ipaddr_v4,
+ 			ead_es);
  	bgp_evpn_es_evi_remote_info_re_eval(es_evi);
 -	return 0;
-+
 +	return ret;
  }
- 
+
  /* If a VNI is being deleted we need to force del all remote VTEPs */
 diff --git a/bgpd/bgp_evpn_mh.h b/bgpd/bgp_evpn_mh.h
-index 11030e323f..d6e77e982f 100644
+index cebabb9fd..5d393c37a 100644
 --- a/bgpd/bgp_evpn_mh.h
 +++ b/bgpd/bgp_evpn_mh.h
-@@ -434,10 +434,12 @@ extern int bgp_evpn_local_es_add(struct bgp *bgp, esi_t *esi,
+@@ -418,10 +418,12 @@ extern int bgp_evpn_local_es_add(struct bgp *bgp, esi_t *esi,
  extern int bgp_evpn_local_es_del(struct bgp *bgp, esi_t *esi);
  extern int bgp_evpn_local_es_evi_add(struct bgp *bgp, esi_t *esi, vni_t vni);
  extern int bgp_evpn_local_es_evi_del(struct bgp *bgp, esi_t *esi, vni_t vni);
@@ -749,99 +1902,89 @@ index 11030e323f..d6e77e982f 100644
  extern void bgp_evpn_mh_finish(void);
  void bgp_evpn_vni_es_init(struct bgpevpn *vpn);
 diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index c29442d96c..679abba463 100644
+index e45d4b1ff..3dff073a3 100644
 --- a/bgpd/bgp_route.c
 +++ b/bgpd/bgp_route.c
-@@ -3213,9 +3213,9 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
- 				    && (new_select->sub_type == BGP_ROUTE_NORMAL
- 					|| new_select->sub_type
+@@ -3420,7 +3420,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
  						   == BGP_ROUTE_IMPORTED))
--
- 					bgp_zebra_route_install(
--						dest, old_select, bgp, true);
-+						dest, old_select, bgp, true,
-+						NULL, false);
+
+ 					bgp_zebra_route_install(dest, old_select,
+-							   bgp, true);
++							   bgp, true, NULL, false);
  			}
  		}
- 
-@@ -3313,9 +3313,10 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+
+@@ -3529,9 +3529,9 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+ 			 */
  			if (old_select &&
  			    is_route_parent_evpn(old_select))
- 				bgp_zebra_route_install(dest, old_select, bgp,
--							false);
-+							false, NULL, false);
- 
+-				bgp_zebra_route_install(dest, old_select, bgp, false);
++				bgp_zebra_route_install(dest, old_select, bgp, false, NULL, false);
+
 -			bgp_zebra_route_install(dest, new_select, bgp, true);
-+			bgp_zebra_route_install(dest, new_select, bgp, true,
-+						NULL, false);
++			bgp_zebra_route_install(dest, new_select, bgp, true, NULL, false);
  		} else {
  			/* Withdraw the route from the kernel. */
  			if (old_select && old_select->type == ZEBRA_ROUTE_BGP
-@@ -3324,7 +3325,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+@@ -3539,7 +3539,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+ 				|| old_select->sub_type == BGP_ROUTE_AGGREGATE
  				|| old_select->sub_type == BGP_ROUTE_IMPORTED))
- 
- 				bgp_zebra_route_install(dest, old_select, bgp,
--							false);
-+							false, NULL, false);
+
+-				bgp_zebra_route_install(dest, old_select, bgp, false);
++				bgp_zebra_route_install(dest, old_select, bgp, false, NULL, false);
  		}
  	}
- 
-@@ -4203,7 +4204,8 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id,
+
+@@ -4444,7 +4444,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id,
  	if (pi && pi->attr->rmap_table_id != new_attr.rmap_table_id) {
  		if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED))
  			/* remove from RIB previous entry */
 -			bgp_zebra_route_install(dest, pi, bgp, false);
-+			bgp_zebra_route_install(dest, pi, bgp, false, NULL,
-+						false);
++			bgp_zebra_route_install(dest, pi, bgp, false, NULL, false);
  	}
- 
+
  	if (peer->sort == BGP_PEER_EBGP) {
 diff --git a/bgpd/bgp_table.h b/bgpd/bgp_table.h
-index 45d61f8dfd..9eb681ea3f 100644
+index 67431ea4f..1550d00ad 100644
 --- a/bgpd/bgp_table.h
 +++ b/bgpd/bgp_table.h
-@@ -103,6 +103,8 @@ struct bgp_node {
- 
+@@ -75,10 +75,10 @@ struct bgp_dest {
+ 	struct bgp_dest *pdest;
+
+ 	STAILQ_ENTRY(bgp_dest) pq;
+-	struct bgp_path_info *za_bgp_pi;
+-
  	struct zebra_announce_item zai;
- 	struct bgp_path_info *za_bgp_pi;
+-
++	struct bgp_path_info *za_bgp_pi;
 +	struct bgpevpn *za_vpn;
 +	bool za_is_sync;
- 
  	uint64_t version;
- 
+
+ 	mpls_label_t local_label;
 diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
-index 1162941ef1..b81acaf8ec 100644
+index 064f23350..cab758fca 100644
 --- a/bgpd/bgp_zebra.c
 +++ b/bgpd/bgp_zebra.c
-@@ -1713,12 +1713,11 @@ void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi)
- 	for (dest = bgp_table_top(table); dest; dest = bgp_route_next(dest))
- 		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next)
- 			if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) &&
--
--			    (pi->type == ZEBRA_ROUTE_BGP
--			     && (pi->sub_type == BGP_ROUTE_NORMAL
--				 || pi->sub_type == BGP_ROUTE_IMPORTED)))
--
+@@ -1674,7 +1674,7 @@ void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi)
+ 			     && (pi->sub_type == BGP_ROUTE_NORMAL
+ 				 || pi->sub_type == BGP_ROUTE_IMPORTED)))
+
 -				bgp_zebra_route_install(dest, pi, bgp, true);
-+			    (pi->type == ZEBRA_ROUTE_BGP &&
-+			     (pi->sub_type == BGP_ROUTE_NORMAL ||
-+			      pi->sub_type == BGP_ROUTE_IMPORTED)))
-+				bgp_zebra_route_install(dest, pi, bgp, true,
-+							NULL, false);
++				bgp_zebra_route_install(dest, pi, bgp, true, NULL, false);
  }
- 
+
  /* Announce routes of any bgp subtype of a table to zebra */
-@@ -1740,7 +1739,8 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
+@@ -1696,7 +1696,7 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
  		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next)
  			if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) &&
  			    pi->type == ZEBRA_ROUTE_BGP)
 -				bgp_zebra_route_install(dest, pi, bgp, true);
-+				bgp_zebra_route_install(dest, pi, bgp, true,
-+							NULL, false);
++				bgp_zebra_route_install(dest, pi, bgp, true, NULL, false);
  }
- 
- enum zclient_send_status bgp_zebra_withdraw_actual(struct bgp_dest *dest,
-@@ -1793,6 +1793,7 @@ enum zclient_send_status bgp_zebra_withdraw_actual(struct bgp_dest *dest,
+
+
+@@ -1749,6 +1749,7 @@ enum zclient_send_status bgp_zebra_withdraw_actual(struct bgp_dest *dest,
  #define ZEBRA_ANNOUNCEMENTS_LIMIT 1000
  static void bgp_handle_route_announcements_to_zebra(struct thread *e)
  {
@@ -849,19 +1992,19 @@ index 1162941ef1..b81acaf8ec 100644
  	uint32_t count = 0;
  	struct bgp_dest *dest = NULL;
  	struct bgp_table *table = NULL;
-@@ -1808,6 +1809,9 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e)
+@@ -1764,6 +1765,9 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e)
  		table = bgp_dest_table(dest);
  		install =
  			CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL);
 +		if (table && table->afi == AFI_L2VPN &&
 +		    table->safi == SAFI_EVPN)
 +			is_evpn = true;
- 
+
  		if (BGP_DEBUG(zebra, ZEBRA))
  			zlog_debug(
-@@ -1816,17 +1820,33 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e)
+@@ -1772,17 +1776,32 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e)
  				table->bgp->name_pretty, dest, dest->flags);
- 
+
  		if (install) {
 -			status = bgp_zebra_announce_actual(
 -				dest, dest->za_bgp_pi, table->bgp);
@@ -887,23 +2030,21 @@ index 1162941ef1..b81acaf8ec 100644
 +			else
 +				status = bgp_zebra_withdraw_actual(
 +					dest, dest->za_bgp_pi, table->bgp);
-+
  			UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE);
  		}
- 
+
  		bgp_path_info_unlock(dest->za_bgp_pi);
  		dest->za_bgp_pi = NULL;
 +		dest->za_vpn = NULL;
  		bgp_dest_unlock_node(dest);
- 
+
  		if (status == ZCLIENT_SEND_BUFFERED)
-@@ -1880,8 +1900,16 @@ static void bgp_zebra_buffer_write_ready(void)
+@@ -1836,8 +1855,14 @@ static void bgp_zebra_buffer_write_ready(void)
   *                                     withdrawn.
   */
  void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
 -			     struct bgp *bgp, bool install)
-+			     struct bgp *bgp, bool install, struct bgpevpn *vpn,
-+			     bool is_sync)
++			     struct bgp *bgp, bool install, struct bgpevpn *vpn, bool is_sync)
  {
 +	bool is_evpn = false;
 +	struct bgp_table *table = NULL;
@@ -911,41 +2052,40 @@ index 1162941ef1..b81acaf8ec 100644
 +	table = bgp_dest_table(dest);
 +	if (table && table->afi == AFI_L2VPN && table->safi == SAFI_EVPN)
 +		is_evpn = true;
-+
  	/*
  	 * BGP is installing this route and bgp has been configured
  	 * to suppress announcements until the route has been installed
-@@ -1891,7 +1919,7 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
+@@ -1847,7 +1872,7 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
  		if (BGP_SUPPRESS_FIB_ENABLED(bgp))
  			SET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING);
- 
+
 -		if (bgp->main_zebra_update_hold)
 +		if (bgp->main_zebra_update_hold && !is_evpn)
  			return;
  	} else {
  		UNSET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING);
-@@ -1901,7 +1929,7 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
+@@ -1857,7 +1882,7 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
  	 * Don't try to install if we're not connected to Zebra or Zebra doesn't
  	 * know of this instance.
  	 */
 -	if (!bgp_install_info_to_zebra(bgp))
 +	if (!bgp_install_info_to_zebra(bgp) && !is_evpn)
  		return;
- 
+
  	if (!CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL) &&
-@@ -1922,7 +1950,7 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
+@@ -1878,7 +1903,7 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
  		dest->za_bgp_pi = info;
  	} else if (CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE)) {
  		assert(dest->za_bgp_pi);
 -		if (install)
 +		if (install & !is_evpn)
  			bgp_zebra_withdraw_actual(dest, dest->za_bgp_pi, bgp);
- 
+
  		bgp_path_info_unlock(dest->za_bgp_pi);
-@@ -1930,6 +1958,11 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
+@@ -1886,6 +1911,11 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
  		dest->za_bgp_pi = info;
  	}
- 
+
 +	if (is_evpn) {
 +		dest->za_vpn = vpn;
 +		dest->za_is_sync = is_sync;
@@ -954,42 +2094,40 @@ index 1162941ef1..b81acaf8ec 100644
  	if (install) {
  		UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE);
  		SET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL);
-@@ -1960,7 +1993,8 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa
+@@ -1916,7 +1946,7 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa
  		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) {
  			if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)
  			    && (pi->type == ZEBRA_ROUTE_BGP))
 -				bgp_zebra_route_install(dest, pi, bgp, false);
-+				bgp_zebra_route_install(dest, pi, bgp, false,
-+							NULL, false);
++				bgp_zebra_route_install(dest, pi, bgp, false, NULL, false);
  		}
  	}
  }
 diff --git a/bgpd/bgp_zebra.h b/bgpd/bgp_zebra.h
-index 45fcf7f514..5186b7454e 100644
+index 83197c28e..92971b51f 100644
 --- a/bgpd/bgp_zebra.h
 +++ b/bgpd/bgp_zebra.h
-@@ -45,7 +45,8 @@ extern int bgp_zebra_get_table_range(uint32_t chunk_size,
+@@ -30,7 +30,7 @@ extern int bgp_zebra_get_table_range(struct zclient *zc, uint32_t chunk_size,
  extern int bgp_if_update_all(void);
  extern void bgp_zebra_route_install(struct bgp_dest *dest,
  				    struct bgp_path_info *path, struct bgp *bgp,
 -				    bool install);
-+				    bool install, struct bgpevpn *vpn,
-+				    bool is_sync);
++				    bool install, struct bgpevpn *vpn, bool is_sync);
+
  extern void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi);
- 
- /* Announce routes of any bgp subtype of a table to zebra */
+ extern enum zclient_send_status
 diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h
-index bdf31f5161..dc660fb8f0 100644
+index a088a2e11..214a2f9b0 100644
 --- a/bgpd/bgpd.h
 +++ b/bgpd/bgpd.h
-@@ -512,6 +512,7 @@ struct bgp {
- #define BGP_FLAG_HARD_ADMIN_RESET (1ULL << 31)
- /* Evaluate the AIGP attribute during the best path selection process */
- #define BGP_FLAG_COMPARE_AIGP (1ULL << 32)
+@@ -529,6 +529,7 @@ struct bgp {
+ #define BGP_FLAG_LU_IPV6_EXPLICIT_NULL (1ULL << 34)
+ #define BGP_FLAG_SOFT_VERSION_CAPABILITY (1ULL << 35)
+ #define BGP_FLAG_ENFORCE_FIRST_AS (1ULL << 36)
 +#define BGP_FLAG_VNI_DOWN (1ULL << 38)
- 
+
  	/* BGP default address-families.
  	 * New peers inherit enabled afi/safis from bgp instance.
--- 
-2.17.1
+--
+2.39.4
 
diff --git a/src/sonic-frr/patch/0037-bgpd-Increase-install-uninstall-speed-of-evpn-vpn-vn.patch b/src/sonic-frr/patch/0037-bgpd-Increase-install-uninstall-speed-of-evpn-vpn-vn.patch
index a360a3101599..fa1a742b1a88 100644
--- a/src/sonic-frr/patch/0037-bgpd-Increase-install-uninstall-speed-of-evpn-vpn-vn.patch
+++ b/src/sonic-frr/patch/0037-bgpd-Increase-install-uninstall-speed-of-evpn-vpn-vn.patch
@@ -19,21 +19,18 @@ Signed-off-by: Rajasekar Raja <rajasekarr@vndia.com>
 Signed-off-by: Donald Sharp <sharpd@nvidia.com>
 
 diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c
-index 622fd6afd2..eb5aa9f077 100644
+index 79e16d8f9..00a45a819 100644
 --- a/bgpd/bgp_evpn.c
 +++ b/bgpd/bgp_evpn.c
-@@ -3752,9 +3752,7 @@ static int install_uninstall_routes_for_vrf(struct bgp *bgp_vrf, int install)
-  * particular VNI.
+@@ -3926,7 +3926,6 @@ int install_uninstall_routes_for_vrf(struct bgp *bgp_vrf, int install)
   */
- static int install_uninstall_routes_for_vni(struct bgp *bgp,
--					    struct bgpevpn *vpn,
+ int install_uninstall_routes_for_vni(struct bgp *bgp,
+ 					    struct bgpevpn *vpn,
 -					    bgp_evpn_route_type rtype,
--					    int install)
-+					    struct bgpevpn *vpn, int install)
+ 					    int install)
  {
  	afi_t afi;
- 	safi_t safi;
-@@ -3785,7 +3783,9 @@ static int install_uninstall_routes_for_vni(struct bgp *bgp,
+@@ -3958,7 +3957,9 @@ int install_uninstall_routes_for_vni(struct bgp *bgp,
  				(const struct prefix_evpn *)bgp_dest_get_prefix(
  					dest);
  
@@ -44,19 +41,19 @@ index 622fd6afd2..eb5aa9f077 100644
  				continue;
  
  			for (pi = bgp_dest_get_bgp_path_info(dest); pi;
-@@ -3812,7 +3812,8 @@ static int install_uninstall_routes_for_vni(struct bgp *bgp,
- 							bgp->vrf_id,
- 							install ? "install"
- 								: "uninstall",
--							rtype == BGP_EVPN_MAC_IP_ROUTE
+@@ -3991,7 +3992,8 @@ int install_uninstall_routes_for_vni(struct bgp *bgp,
+ 						bgp->vrf_id,
+ 						install ? "install"
+ 							: "uninstall",
+-						rtype == BGP_EVPN_MAC_IP_ROUTE
 +							evp->prefix.route_type ==
 +									BGP_EVPN_MAC_IP_ROUTE
- 								? "MACIP"
- 								: "IMET",
- 							vpn->vni);
-@@ -3845,23 +3846,11 @@ static int install_routes_for_vrf(struct bgp *bgp_vrf)
+ 							? "MACIP"
+ 							: "IMET",
+ 						vpn->vni);
+@@ -4023,23 +4025,11 @@ int install_routes_for_vrf(struct bgp *bgp_vrf)
   */
- static int install_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
+ int install_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
  {
 -	int ret;
 -
@@ -81,9 +78,9 @@ index 622fd6afd2..eb5aa9f077 100644
  }
  
  /* uninstall routes from l3vni vrf. */
-@@ -3877,25 +3866,11 @@ static int uninstall_routes_for_vrf(struct bgp *bgp_vrf)
+@@ -4055,25 +4045,11 @@ int uninstall_routes_for_vrf(struct bgp *bgp_vrf)
   */
- static int uninstall_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
+ int uninstall_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
  {
 -	int ret;
 -
@@ -112,5 +109,5 @@ index 622fd6afd2..eb5aa9f077 100644
  
  /*
 -- 
-2.17.1
+2.39.4
 
diff --git a/src/sonic-frr/patch/0040-bgpd-backpressure-Fix-to-withdraw-evpn-type-5-routes.patch b/src/sonic-frr/patch/0040-bgpd-backpressure-Fix-to-withdraw-evpn-type-5-routes.patch
index b74d86881ae5..9c4be324fb6a 100644
--- a/src/sonic-frr/patch/0040-bgpd-backpressure-Fix-to-withdraw-evpn-type-5-routes.patch
+++ b/src/sonic-frr/patch/0040-bgpd-backpressure-Fix-to-withdraw-evpn-type-5-routes.patch
@@ -17,38 +17,38 @@ Signed-off-by: Donald Sharp <sharpd@nvidia.com>
 Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
 
 diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
-index 679abba463..e28069767f 100644
+index 3dff073a3..26089e326 100644
 --- a/bgpd/bgp_route.c
 +++ b/bgpd/bgp_route.c
-@@ -3312,8 +3312,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+@@ -3529,7 +3529,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
  			 */
  			if (old_select &&
  			    is_route_parent_evpn(old_select))
--				bgp_zebra_route_install(dest, old_select, bgp,
--							false, NULL, false);
+-				bgp_zebra_route_install(dest, old_select, bgp, false, NULL, false);
 +				bgp_zebra_withdraw_actual(dest, old_select, bgp);
- 
- 			bgp_zebra_route_install(dest, new_select, bgp, true,
- 						NULL, false);
+
+ 			bgp_zebra_route_install(dest, new_select, bgp, true, NULL, false);
+ 		} else {
 diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
-index 524551b1e0..5d5525156b 100644
+index f0fe0ec5c..c0733dfe3 100644
 --- a/bgpd/bgp_zebra.c
 +++ b/bgpd/bgp_zebra.c
-@@ -1889,11 +1889,9 @@ static void bgp_zebra_buffer_write_ready(void)
+@@ -1844,11 +1844,10 @@ static void bgp_zebra_buffer_write_ready(void)
   *                                     save new pi, mark as going to be
   *                                     withdrawan, remove install flag
   *
 - *    Withdrawal       Install         Special case, send withdrawal immediately
 - *                                     Leave dest on list, release old pi,
++ *
 + *    Withdrawal       Install         Leave dest on list, release old pi,
   *                                     save new pi, mark as going to be
 - *                                     installed.  <see note about evpn
 - *                                     in bgp_route.c in bgp_process_main_one>
-+ *                                     installed.
++ *									   installed
   *    Withdrawal       Withdrawal      Leave dest on list, release old pi,
   *                                     save new pi, mark as going to be
   *                                     withdrawn.
-@@ -1949,9 +1947,6 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
+@@ -1902,9 +1901,6 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
  		dest->za_bgp_pi = info;
  	} else if (CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE)) {
  		assert(dest->za_bgp_pi);
@@ -58,6 +58,6 @@ index 524551b1e0..5d5525156b 100644
  		bgp_path_info_unlock(dest->za_bgp_pi);
  		bgp_path_info_lock(info);
  		dest->za_bgp_pi = info;
--- 
-2.43.2
+--
+2.39.4
 
diff --git a/src/sonic-frr/patch/0042-zebra-Use-built-in-data-structure-counter.patch b/src/sonic-frr/patch/0042-zebra-Use-built-in-data-structure-counter.patch
index 3401dae27158..b5dac2ba5897 100644
--- a/src/sonic-frr/patch/0042-zebra-Use-built-in-data-structure-counter.patch
+++ b/src/sonic-frr/patch/0042-zebra-Use-built-in-data-structure-counter.patch
@@ -12,19 +12,19 @@ to the queue.
 Signed-off-by: Donald Sharp <sharpd@nvidia.com>
 
 diff --git a/zebra/dplane_fpm_nl.c b/zebra/dplane_fpm_nl.c
-index caa2f988e2..bc9815bb10 100644
+index b2fee4ff7..f45003cd2 100644
 --- a/zebra/dplane_fpm_nl.c
 +++ b/zebra/dplane_fpm_nl.c
-@@ -135,8 +135,6 @@ struct fpm_nl_ctx {
- 
+@@ -133,8 +133,6 @@ struct fpm_nl_ctx {
+
  		/* Amount of data plane context processed. */
  		_Atomic uint32_t dplane_contexts;
 -		/* Amount of data plane contexts enqueued. */
 -		_Atomic uint32_t ctxqueue_len;
  		/* Peak amount of data plane contexts enqueued. */
  		_Atomic uint32_t ctxqueue_len_peak;
- 
-@@ -311,6 +309,12 @@ DEFUN(fpm_show_counters, fpm_show_counters_cmd,
+
+@@ -328,6 +326,12 @@ DEFUN(fpm_show_counters, fpm_show_counters_cmd,
        FPM_STR
        "FPM statistic counters\n")
  {
@@ -35,9 +35,9 @@ index caa2f988e2..bc9815bb10 100644
 +	}
 +
  	vty_out(vty, "%30s\n%30s\n", "FPM counters", "============");
- 
+
  #define SHOW_COUNTER(label, counter) \
-@@ -324,8 +328,7 @@ DEFUN(fpm_show_counters, fpm_show_counters_cmd,
+@@ -341,8 +345,7 @@ DEFUN(fpm_show_counters, fpm_show_counters_cmd,
  	SHOW_COUNTER("Connection errors", gfnc->counters.connection_errors);
  	SHOW_COUNTER("Data plane items processed",
  		     gfnc->counters.dplane_contexts);
@@ -47,7 +47,7 @@ index caa2f988e2..bc9815bb10 100644
  	SHOW_COUNTER("Data plane items queue peak",
  		     gfnc->counters.ctxqueue_len_peak);
  	SHOW_COUNTER("Buffer full hits", gfnc->counters.buffer_full);
-@@ -344,6 +347,12 @@ DEFUN(fpm_show_counters_json, fpm_show_counters_json_cmd,
+@@ -361,6 +364,12 @@ DEFUN(fpm_show_counters_json, fpm_show_counters_json_cmd,
        "FPM statistic counters\n"
        JSON_STR)
  {
@@ -58,9 +58,9 @@ index caa2f988e2..bc9815bb10 100644
 +	}
 +
  	struct json_object *jo;
- 
+
  	jo = json_object_new_object();
-@@ -357,8 +366,7 @@ DEFUN(fpm_show_counters_json, fpm_show_counters_json_cmd,
+@@ -374,8 +383,7 @@ DEFUN(fpm_show_counters_json, fpm_show_counters_json_cmd,
  			    gfnc->counters.connection_errors);
  	json_object_int_add(jo, "data-plane-contexts",
  			    gfnc->counters.dplane_contexts);
@@ -70,25 +70,25 @@ index caa2f988e2..bc9815bb10 100644
  	json_object_int_add(jo, "data-plane-contexts-queue-peak",
  			    gfnc->counters.ctxqueue_len_peak);
  	json_object_int_add(jo, "buffer-full-hits", gfnc->counters.buffer_full);
-@@ -1380,8 +1388,6 @@ static void fpm_process_queue(struct thread *t)
- 
+@@ -1427,8 +1435,6 @@ static void fpm_process_queue(struct event *t)
+
  		/* Account the processed entries. */
  		processed_contexts++;
 -		atomic_fetch_sub_explicit(&fnc->counters.ctxqueue_len, 1,
 -					  memory_order_relaxed);
- 
+
  		dplane_ctx_set_status(ctx, ZEBRA_DPLANE_REQUEST_SUCCESS);
  		dplane_provider_enqueue_out_ctx(fnc->prov, ctx);
-@@ -1550,7 +1556,7 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov)
+@@ -1602,7 +1608,7 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov)
  	struct zebra_dplane_ctx *ctx;
  	struct fpm_nl_ctx *fnc;
  	int counter, limit;
 -	uint64_t cur_queue, peak_queue = 0, stored_peak_queue;
 +	uint64_t cur_queue = 0, peak_queue = 0, stored_peak_queue;
- 
+
  	fnc = dplane_provider_get_data(prov);
  	limit = dplane_provider_get_work_limit(prov);
-@@ -1564,20 +1570,12 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov)
+@@ -1616,20 +1622,12 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov)
  		 * anyway.
  		 */
  		if (fnc->socket != -1 && fnc->connecting == false) {
@@ -104,32 +104,32 @@ index caa2f988e2..bc9815bb10 100644
 +				cur_queue =
 +					dplane_ctx_queue_count(&fnc->ctxqueue);
  			}
- 
+
 -			cur_queue = atomic_load_explicit(
 -				&fnc->counters.ctxqueue_len,
 -				memory_order_relaxed);
  			if (peak_queue < cur_queue)
  				peak_queue = cur_queue;
  			continue;
-@@ -1594,9 +1592,7 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov)
+@@ -1646,9 +1644,7 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov)
  		atomic_store_explicit(&fnc->counters.ctxqueue_len_peak,
  				      peak_queue, memory_order_relaxed);
- 
+
 -	if (atomic_load_explicit(&fnc->counters.ctxqueue_len,
 -				 memory_order_relaxed)
 -	    > 0)
 +	if (cur_queue > 0)
- 		thread_add_timer(fnc->fthread->master, fpm_process_queue,
- 				 fnc, 0, &fnc->t_dequeue);
- 
+ 		event_add_event(fnc->fthread->master, fpm_process_queue, fnc, 0,
+ 				&fnc->t_dequeue);
+
 diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c
-index 59b8d6cc63..c252a370b8 100644
+index 70ce555b1..a53bf8b25 100644
 --- a/zebra/zebra_dplane.c
 +++ b/zebra/zebra_dplane.c
-@@ -969,6 +969,11 @@ struct zebra_dplane_ctx *dplane_ctx_dequeue(struct dplane_ctx_list_head *q)
+@@ -956,6 +956,11 @@ struct zebra_dplane_ctx *dplane_ctx_dequeue(struct dplane_ctx_list_head *q)
  	return ctx;
  }
- 
+
 +uint32_t dplane_ctx_queue_count(struct dplane_ctx_list_head *q)
 +{
 +	return dplane_ctx_list_count(q);
@@ -139,18 +139,18 @@ index 59b8d6cc63..c252a370b8 100644
   * Accessors for information from the context object
   */
 diff --git a/zebra/zebra_dplane.h b/zebra/zebra_dplane.h
-index 9f9496c8f4..c29e05bbc9 100644
+index 2f7d21850..51c1bff5d 100644
 --- a/zebra/zebra_dplane.h
 +++ b/zebra/zebra_dplane.h
-@@ -324,6 +324,8 @@ struct zebra_dplane_ctx *dplane_ctx_get_head(struct dplane_ctx_list_head *q);
+@@ -316,6 +316,8 @@ struct zebra_dplane_ctx *dplane_ctx_get_head(struct dplane_ctx_list_head *q);
  /* Init a list of contexts */
  void dplane_ctx_q_init(struct dplane_ctx_list_head *q);
- 
+
 +uint32_t dplane_ctx_queue_count(struct dplane_ctx_list_head *q);
 +
  /*
   * Accessors for information from the context object
   */
--- 
-2.43.2
+--
+2.39.4
 
diff --git a/src/sonic-frr/patch/0046-zebra-Modify-show-zebra-dplane-providers-to-give-mor.patch b/src/sonic-frr/patch/0046-zebra-Modify-show-zebra-dplane-providers-to-give-mor.patch
index e865b861d192..847a63797fd3 100644
--- a/src/sonic-frr/patch/0046-zebra-Modify-show-zebra-dplane-providers-to-give-mor.patch
+++ b/src/sonic-frr/patch/0046-zebra-Modify-show-zebra-dplane-providers-to-give-mor.patch
@@ -20,42 +20,42 @@ r1#
 Signed-off-by: Donald Sharp <sharpd@nvidia.com>
 
 diff --git a/zebra/rib.h b/zebra/rib.h
-index 2e62148ea0..b78cd218f6 100644
+index a721f4bac..15f877b66 100644
 --- a/zebra/rib.h
 +++ b/zebra/rib.h
-@@ -630,6 +630,7 @@ static inline struct nexthop_group *rib_get_fib_backup_nhg(
- }
- 
+@@ -628,6 +628,7 @@ extern int rib_add_gr_run(afi_t afi, vrf_id_t vrf_id, uint8_t proto,
+ 			  uint8_t instance);
+
  extern void zebra_vty_init(void);
 +extern uint32_t zebra_rib_dplane_results_count(void);
- 
+
  extern pid_t pid;
- 
+
 diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c
-index f0e1ff6f27..21c73a3796 100644
+index e077c28d1..efa795331 100644
 --- a/zebra/zebra_dplane.c
 +++ b/zebra/zebra_dplane.c
-@@ -5998,12 +5998,14 @@ int dplane_show_provs_helper(struct vty *vty, bool detailed)
+@@ -6089,12 +6089,14 @@ int dplane_show_provs_helper(struct vty *vty, bool detailed)
  	struct zebra_dplane_provider *prov;
  	uint64_t in, in_q, in_max, out, out_q, out_max;
- 
+
 -	vty_out(vty, "Zebra dataplane providers:\n");
 -
  	DPLANE_LOCK();
  	prov = dplane_prov_list_first(&zdplane_info.dg_providers);
 +	in = dplane_ctx_queue_count(&zdplane_info.dg_update_list);
  	DPLANE_UNLOCK();
- 
+
 +	vty_out(vty, "dataplane Incoming Queue from Zebra: %" PRIu64 "\n", in);
 +	vty_out(vty, "Zebra dataplane providers:\n");
 +
  	/* Show counters, useful info from each registered provider */
  	while (prov) {
  		dplane_provider_lock(prov);
-@@ -6022,13 +6024,19 @@ int dplane_show_provs_helper(struct vty *vty, bool detailed)
+@@ -6113,13 +6115,19 @@ int dplane_show_provs_helper(struct vty *vty, bool detailed)
  		out_max = atomic_load_explicit(&prov->dp_out_max,
  					       memory_order_relaxed);
- 
+
 -		vty_out(vty, "%s (%u): in: %"PRIu64", q: %"PRIu64", q_max: %"PRIu64", out: %"PRIu64", q: %"PRIu64", q_max: %"PRIu64"\n",
 -			prov->dp_name, prov->dp_id, in, in_q, in_max,
 -			out, out_q, out_max);
@@ -65,24 +65,24 @@ index f0e1ff6f27..21c73a3796 100644
 +			", q_max: %" PRIu64 "\n",
 +			prov->dp_name, prov->dp_id, in, in_q, in_max, out,
 +			out_q, out_max);
- 
+
  		prov = dplane_prov_list_next(&zdplane_info.dg_providers, prov);
  	}
- 
+
 +	out = zebra_rib_dplane_results_count();
 +	vty_out(vty, "dataplane Outgoing Queue to Zebra: %" PRIu64 "\n", out);
 +
  	return CMD_SUCCESS;
  }
- 
+
 diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c
-index 1ff3d98545..ae051d37eb 100644
+index 5b95d8668..430878daf 100644
 --- a/zebra/zebra_rib.c
 +++ b/zebra/zebra_rib.c
-@@ -4874,6 +4874,17 @@ static int rib_dplane_results(struct dplane_ctx_list_head *ctxlist)
+@@ -5001,6 +5001,17 @@ static int rib_dplane_results(struct dplane_ctx_list_head *ctxlist)
  	return 0;
  }
- 
+
 +uint32_t zebra_rib_dplane_results_count(void)
 +{
 +	uint32_t count;
@@ -97,6 +97,6 @@ index 1ff3d98545..ae051d37eb 100644
  /*
   * Ensure there are no empty slots in the route_info array.
   * Every route type in zebra should be present there.
--- 
-2.43.2
+--
+2.39.4
 
diff --git a/src/sonic-frr/patch/0048-bgpd-backpressure-fix-to-properly-remove-dest-for-bg.patch b/src/sonic-frr/patch/0048-bgpd-backpressure-fix-to-properly-remove-dest-for-bg.patch
index 1731b6d21f31..e98f867fa9af 100644
--- a/src/sonic-frr/patch/0048-bgpd-backpressure-fix-to-properly-remove-dest-for-bg.patch
+++ b/src/sonic-frr/patch/0048-bgpd-backpressure-fix-to-properly-remove-dest-for-bg.patch
@@ -22,16 +22,16 @@ Signed-off-by: Chirag Shah <chirag @nvidia.com>
 Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
 
 diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c
-index 2243ffdc77..b1f8f19594 100644
+index 5e62854ed..c517a67f5 100644
 --- a/bgpd/bgp_evpn.c
 +++ b/bgpd/bgp_evpn.c
-@@ -6074,16 +6074,16 @@ struct bgpevpn *bgp_evpn_new(struct bgp *bgp, vni_t vni,
+@@ -6301,16 +6301,16 @@ struct bgpevpn *bgp_evpn_new(struct bgp *bgp, vni_t vni,
  void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn)
  {
  	struct bgp_dest *dest = NULL;
 -	uint32_t ann_count = zebra_announce_count(&bm->zebra_announce_head);
 +	struct bgp_dest *dest_next = NULL;
- 
+
 -	while (ann_count) {
 -		dest = zebra_announce_pop(&bm->zebra_announce_head);
 -		ann_count--;
@@ -46,13 +46,13 @@ index 2243ffdc77..b1f8f19594 100644
 +			zebra_announce_del(&bm->zebra_announce_head, dest);
 +		}
  	}
- 
  	bgp_evpn_remote_ip_hash_destroy(vpn);
+ 	bgp_evpn_vni_es_cleanup(vpn);
 diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
-index 492566f8c8..e16a58b443 100644
+index 4348a60c5..24577768f 100644
 --- a/bgpd/bgpd.c
 +++ b/bgpd/bgpd.c
-@@ -3689,19 +3689,25 @@ int bgp_delete(struct bgp *bgp)
+@@ -3868,19 +3868,25 @@ int bgp_delete(struct bgp *bgp)
  	safi_t safi;
  	int i;
  	struct bgp_dest *dest = NULL;
@@ -60,9 +60,9 @@ index 492566f8c8..e16a58b443 100644
 +	struct bgp_table *dest_table = NULL;
  	struct graceful_restart_info *gr_info;
 -	uint32_t ann_count = zebra_announce_count(&bm->zebra_announce_head);
- 
+
  	assert(bgp);
- 
+
 -	while (ann_count) {
 -		dest = zebra_announce_pop(&bm->zebra_announce_head);
 -		ann_count--;
@@ -83,8 +83,8 @@ index 492566f8c8..e16a58b443 100644
 +			zebra_announce_del(&bm->zebra_announce_head, dest);
 +		}
  	}
- 
+
  	bgp_soft_reconfig_table_task_cancel(bgp, NULL, NULL);
--- 
-2.43.2
+--
+2.39.4
 
diff --git a/src/sonic-frr/patch/0050-bgpd-backpressure-Avoid-use-after-free.patch b/src/sonic-frr/patch/0050-bgpd-backpressure-Avoid-use-after-free.patch
index 878d60eb5e37..f4f1b6b3b42c 100644
--- a/src/sonic-frr/patch/0050-bgpd-backpressure-Avoid-use-after-free.patch
+++ b/src/sonic-frr/patch/0050-bgpd-backpressure-Avoid-use-after-free.patch
@@ -14,10 +14,10 @@ Ticket :#4001204
 Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
 
 diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c
-index b1f8f19594..bb3cd62950 100644
+index c517a67f5..63e2e1c05 100644
 --- a/bgpd/bgp_evpn.c
 +++ b/bgpd/bgp_evpn.c
-@@ -6080,9 +6080,9 @@ void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn)
+@@ -6307,9 +6307,9 @@ void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn)
  	     dest = dest_next) {
  		dest_next = zebra_announce_next(&bm->zebra_announce_head, dest);
  		if (dest->za_vpn == vpn) {
@@ -27,12 +27,12 @@ index b1f8f19594..bb3cd62950 100644
 -			zebra_announce_del(&bm->zebra_announce_head, dest);
  		}
  	}
- 
+ 	bgp_evpn_remote_ip_hash_destroy(vpn);
 diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
-index 2e1c5e555b..342982069b 100644
+index 8132d0515..8ebfde10c 100644
 --- a/bgpd/bgpd.c
 +++ b/bgpd/bgpd.c
-@@ -3706,9 +3706,9 @@ int bgp_delete(struct bgp *bgp)
+@@ -3885,9 +3885,9 @@ int bgp_delete(struct bgp *bgp)
  		dest_next = zebra_announce_next(&bm->zebra_announce_head, dest);
  		dest_table = bgp_dest_table(dest);
  		if (dest_table->bgp == bgp) {
@@ -42,7 +42,7 @@ index 2e1c5e555b..342982069b 100644
 -			zebra_announce_del(&bm->zebra_announce_head, dest);
  		}
  	}
- 
--- 
-2.43.2
+
+--
+2.39.4
 
diff --git a/src/sonic-frr/patch/0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch b/src/sonic-frr/patch/0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch
deleted file mode 100644
index 791f52de3966..000000000000
--- a/src/sonic-frr/patch/0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch
+++ /dev/null
@@ -1,14 +0,0 @@
-diff --git a/bgpd/bgp_network.c b/bgpd/bgp_network.c
-index 76bb9949d..974a57ef2 100644
---- a/bgpd/bgp_network.c
-+++ b/bgpd/bgp_network.c
-@@ -774,6 +774,9 @@ int bgp_connect(struct peer *peer)
- 					     ? IPV4_MAX_BITLEN
- 					     : IPV6_MAX_BITLEN;
- 
-+		if (!BGP_PEER_SU_UNSPEC(peer))
-+			bgp_md5_set(peer);
-+
- 		bgp_md5_set_connect(peer->fd, &peer->su, prefixlen,
- 				    peer->password);
- 	}
diff --git a/src/sonic-frr/patch/build-dplane-fpm-sonic-module.patch b/src/sonic-frr/patch/0054-build-dplane-fpm-sonic-module.patch
similarity index 62%
rename from src/sonic-frr/patch/build-dplane-fpm-sonic-module.patch
rename to src/sonic-frr/patch/0054-build-dplane-fpm-sonic-module.patch
index 1ada5d9604df..03af6cad3143 100644
--- a/src/sonic-frr/patch/build-dplane-fpm-sonic-module.patch
+++ b/src/sonic-frr/patch/0054-build-dplane-fpm-sonic-module.patch
@@ -1,43 +1,46 @@
-Build dplane_fpm_sonic module
+From 9e789e450003b9d2c7347c9f9b0d29d9b84d525f Mon Sep 17 00:00:00 2001
+From: sudhanshukumar22 <sudhanshu.kumar@broadcom.com>
+Date: Tue, 1 Oct 2024 02:28:17 -0700
+Subject: [PATCH] Build dplane_fpm_sonic module
 
 From: Carmine Scarpitta <cscarpit@cisco.com>
 
 Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
 ---
- debian/frr.install |    1 +
- redhat/frr.spec.in |    1 +
- zebra/subdir.am    |    6 ++++++
+ debian/frr.install | 1 +
+ redhat/frr.spec.in | 1 +
+ zebra/subdir.am    | 6 ++++++
  3 files changed, 8 insertions(+)
 
 diff --git a/debian/frr.install b/debian/frr.install
-index 044b48498..f53b874e3 100644
+index d4b904b6e..375f0dadd 100644
 --- a/debian/frr.install
 +++ b/debian/frr.install
-@@ -10,6 +10,7 @@ usr/lib/*/frr/libfrrcares.*
- usr/lib/*/frr/libfrrospfapiclient.*
+@@ -11,6 +11,7 @@ usr/lib/*/frr/libfrrospfapiclient.*
+ usr/lib/*/frr/libmgmt_be_nb.*
  usr/lib/*/frr/modules/bgpd_bmp.so
  usr/lib/*/frr/modules/dplane_fpm_nl.so
 +usr/lib/*/frr/modules/dplane_fpm_sonic.so
  usr/lib/*/frr/modules/zebra_cumulus_mlag.so
  usr/lib/*/frr/modules/zebra_fpm.so
- usr/lib/*/frr/modules/zebra_irdp.so
+ usr/lib/*/frr/modules/pathd_pcep.so
 diff --git a/redhat/frr.spec.in b/redhat/frr.spec.in
-index 4afd562a8..2eab817c9 100644
+index 13d5b8689..ffbe872c4 100644
 --- a/redhat/frr.spec.in
 +++ b/redhat/frr.spec.in
-@@ -714,6 +714,7 @@ fi
+@@ -723,6 +723,7 @@ fi
  %endif
  %{_libdir}/frr/modules/zebra_cumulus_mlag.so
  %{_libdir}/frr/modules/dplane_fpm_nl.so
 +%{_libdir}/frr/modules/dplane_fpm_sonic.so
- %{_libdir}/frr/modules/zebra_irdp.so
  %{_libdir}/frr/modules/bgpd_bmp.so
- %{_bindir}/*
+ %{_libdir}/libfrr_pb.so*
+ %{_libdir}/libfrrfpm_pb.so*
 diff --git a/zebra/subdir.am b/zebra/subdir.am
-index 5c4a87b93..3f1807d26 100644
+index d9c8d9045..ecc7195ae 100644
 --- a/zebra/subdir.am
 +++ b/zebra/subdir.am
-@@ -236,6 +236,12 @@ zebra_dplane_fpm_nl_la_LDFLAGS = $(MODULE_LDFLAGS)
+@@ -245,6 +245,12 @@ zebra_dplane_fpm_nl_la_LDFLAGS = $(MODULE_LDFLAGS)
  zebra_dplane_fpm_nl_la_LIBADD  =
  endif
  
@@ -50,3 +53,6 @@ index 5c4a87b93..3f1807d26 100644
  if NETLINK_DEBUG
  zebra_zebra_SOURCES += \
  	zebra/debug_nl.c \
+-- 
+2.39.4
+
diff --git a/src/sonic-frr/patch/bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch b/src/sonic-frr/patch/0055-bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch
similarity index 54%
rename from src/sonic-frr/patch/bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch
rename to src/sonic-frr/patch/0055-bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch
index 161a0454b3c5..ce4ee66ab317 100644
--- a/src/sonic-frr/patch/bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch
+++ b/src/sonic-frr/patch/0055-bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch
@@ -6,47 +6,12 @@ Subject: [PATCH 1/5] lib: Include SID structure in seg6local nexthop
 Include SID structure information in seg6local nexthop data structure.
 
 Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
----
- lib/srv6.h | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/lib/srv6.h b/lib/srv6.h
-index acfb0631cc..3749b01563 100644
---- a/lib/srv6.h
-+++ b/lib/srv6.h
-@@ -72,6 +72,10 @@ struct seg6local_context {
- 	struct in_addr nh4;
- 	struct in6_addr nh6;
- 	uint32_t table;
-+	uint8_t block_len;
-+	uint8_t node_len;
-+	uint8_t function_len;
-+	uint8_t argument_len;
- };
- 
- struct srv6_locator {
--- 
-2.45.2
-
-
-From ebea171cadaae63d89c41fdd5e4d507cf9084e42 Mon Sep 17 00:00:00 2001
-From: Carmine Scarpitta <cscarpit@cisco.com>
-Date: Sun, 15 Sep 2024 18:53:35 +0200
-Subject: [PATCH 2/5] bgpd: Include structure when installing End.DT4/6 SID
-
-Include SID structure information when installing an SRv6 End.DT6 or End.DT4 SID
-in the forwarding plane.
-
-Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
----
- bgpd/bgp_mplsvpn.c | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
 
 diff --git a/bgpd/bgp_mplsvpn.c b/bgpd/bgp_mplsvpn.c
-index 2af553d982..b9eef35812 100644
+index 58e3097e1..ef8ca39e8 100644
 --- a/bgpd/bgp_mplsvpn.c
 +++ b/bgpd/bgp_mplsvpn.c
-@@ -393,6 +393,18 @@ void vpn_leak_zebra_vrf_sid_update_per_af(struct bgp *bgp, afi_t afi)
+@@ -381,6 +381,19 @@ void vpn_leak_zebra_vrf_sid_update_per_af(struct bgp *bgp, afi_t afi)
  	if (!vrf)
  		return;
  
@@ -62,31 +27,11 @@ index 2af553d982..b9eef35812 100644
 +			bgp->vpn_policy[afi]
 +				.tovpn_sid_locator->argument_bits_length;
 +	}
++
  	ctx.table = vrf->data.l.table_id;
  	act = afi == AFI_IP ? ZEBRA_SEG6_LOCAL_ACTION_END_DT4
  		: ZEBRA_SEG6_LOCAL_ACTION_END_DT6;
--- 
-2.45.2
-
-
-From f5c7cf0edc25905d357effe54ece27ed5db0ae6b Mon Sep 17 00:00:00 2001
-From: Carmine Scarpitta <cscarpit@cisco.com>
-Date: Sun, 15 Sep 2024 18:54:55 +0200
-Subject: [PATCH 3/5] bgpd: Include structure when installing End.DT46 SID
-
-Include SID structure information when installing an SRv6 End.DT46 SID
-in the forwarding plane.
-
-Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
----
- bgpd/bgp_mplsvpn.c | 6 ++++++
- 1 file changed, 6 insertions(+)
-
-diff --git a/bgpd/bgp_mplsvpn.c b/bgpd/bgp_mplsvpn.c
-index b9eef35812..005a54ec1b 100644
---- a/bgpd/bgp_mplsvpn.c
-+++ b/bgpd/bgp_mplsvpn.c
-@@ -453,6 +453,12 @@ void vpn_leak_zebra_vrf_sid_update_per_vrf(struct bgp *bgp)
+@@ -432,6 +445,13 @@ void vpn_leak_zebra_vrf_sid_update_per_vrf(struct bgp *bgp)
  	if (!vrf)
  		return;
  
@@ -96,31 +41,11 @@ index b9eef35812..005a54ec1b 100644
 +		ctx.function_len = bgp->tovpn_sid_locator->function_bits_length;
 +		ctx.argument_len = bgp->tovpn_sid_locator->argument_bits_length;
 +	}
++
  	ctx.table = vrf->data.l.table_id;
  	act = ZEBRA_SEG6_LOCAL_ACTION_END_DT46;
  	zclient_send_localsid(zclient, tovpn_sid, bgp->vrf_id, act, &ctx);
--- 
-2.45.2
-
-
-From e2428a573321cb5909a3858008df2968b655a086 Mon Sep 17 00:00:00 2001
-From: Carmine Scarpitta <cscarpit@cisco.com>
-Date: Sun, 15 Sep 2024 18:56:21 +0200
-Subject: [PATCH 4/5] bgpd: Include structure when removing End.DT4/6 SID
-
-Include SID structure information when removing an SRv6 End.DT4 or End.DT6 SID
-from the forwarding plane.
-
-Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
----
- bgpd/bgp_mplsvpn.c | 18 ++++++++++++++++--
- 1 file changed, 16 insertions(+), 2 deletions(-)
-
-diff --git a/bgpd/bgp_mplsvpn.c b/bgpd/bgp_mplsvpn.c
-index 005a54ec1b..aba1b4febe 100644
---- a/bgpd/bgp_mplsvpn.c
-+++ b/bgpd/bgp_mplsvpn.c
-@@ -495,6 +495,7 @@ void vpn_leak_zebra_vrf_sid_update(struct bgp *bgp, afi_t afi)
+@@ -470,6 +490,7 @@ void vpn_leak_zebra_vrf_sid_update(struct bgp *bgp, afi_t afi)
  void vpn_leak_zebra_vrf_sid_withdraw_per_af(struct bgp *bgp, afi_t afi)
  {
  	int debug = BGP_DEBUG(vpn, VPN_LEAK_LABEL);
@@ -128,7 +53,7 @@ index 005a54ec1b..aba1b4febe 100644
  
  	if (bgp->vrf_id == VRF_UNKNOWN) {
  		if (debug)
-@@ -507,9 +508,22 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_af(struct bgp *bgp, afi_t afi)
+@@ -482,9 +503,23 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_af(struct bgp *bgp, afi_t afi)
  		zlog_debug("%s: deleting sid for vrf %s afi (id=%d)", __func__,
  			   bgp->name_pretty, bgp->vrf_id);
  
@@ -144,37 +69,17 @@ index 005a54ec1b..aba1b4febe 100644
 +			bgp->vpn_policy[afi]
 +				.tovpn_sid_locator->argument_bits_length;
 +	}
++
  	zclient_send_localsid(zclient,
 -		bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent,
 -		bgp->vrf_id, ZEBRA_SEG6_LOCAL_ACTION_UNSPEC, NULL);
-+			      bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent,
-+			      bgp->vrf_id, ZEBRA_SEG6_LOCAL_ACTION_UNSPEC,
-+			      &seg6localctx);
++	      bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent,
++	      bgp->vrf_id, ZEBRA_SEG6_LOCAL_ACTION_UNSPEC,
++	      &seg6localctx);
  	XFREE(MTYPE_BGP_SRV6_SID,
  	      bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent);
- }
--- 
-2.45.2
-
-
-From 8d148b738cdf8b987a67e13979331d91337494f3 Mon Sep 17 00:00:00 2001
-From: Carmine Scarpitta <cscarpit@cisco.com>
-Date: Sun, 15 Sep 2024 18:56:48 +0200
-Subject: [PATCH 5/5] bgpd: Include structure when removing End.DT46 SID
-
-Include SID structure information when removing an SRv6 End.DT46 SID
-from the forwarding plane.
-
-Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
----
- bgpd/bgp_mplsvpn.c | 12 +++++++++++-
- 1 file changed, 11 insertions(+), 1 deletion(-)
-
-diff --git a/bgpd/bgp_mplsvpn.c b/bgpd/bgp_mplsvpn.c
-index aba1b4febe..6589f3e388 100644
---- a/bgpd/bgp_mplsvpn.c
-+++ b/bgpd/bgp_mplsvpn.c
-@@ -535,6 +535,7 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_af(struct bgp *bgp, afi_t afi)
+ 	bgp->vpn_policy[afi].tovpn_zebra_vrf_sid_last_sent = NULL;
+@@ -497,6 +532,7 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_af(struct bgp *bgp, afi_t afi)
  void vpn_leak_zebra_vrf_sid_withdraw_per_vrf(struct bgp *bgp)
  {
  	int debug = BGP_DEBUG(vpn, VPN_LEAK_LABEL);
@@ -182,7 +87,7 @@ index aba1b4febe..6589f3e388 100644
  
  	if (bgp->vrf_id == VRF_UNKNOWN) {
  		if (debug)
-@@ -548,9 +549,18 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_vrf(struct bgp *bgp)
+@@ -510,9 +546,19 @@ void vpn_leak_zebra_vrf_sid_withdraw_per_vrf(struct bgp *bgp)
  		zlog_debug("%s: deleting sid for vrf %s (id=%d)", __func__,
  			   bgp->name_pretty, bgp->vrf_id);
  
@@ -195,13 +100,26 @@ index aba1b4febe..6589f3e388 100644
 +		seg6localctx.argument_len =
 +			bgp->tovpn_sid_locator->argument_bits_length;
 +	}
++
  	zclient_send_localsid(zclient, bgp->tovpn_zebra_vrf_sid_last_sent,
  			      bgp->vrf_id, ZEBRA_SEG6_LOCAL_ACTION_UNSPEC,
 -			      NULL);
 +			      &seg6localctx);
  	XFREE(MTYPE_BGP_SRV6_SID, bgp->tovpn_zebra_vrf_sid_last_sent);
+ 	bgp->tovpn_zebra_vrf_sid_last_sent = NULL;
  }
+diff --git a/lib/srv6.h b/lib/srv6.h
+index 433c5c14f..53f5119aa 100644
+--- a/lib/srv6.h
++++ b/lib/srv6.h
+@@ -103,6 +103,10 @@ struct seg6local_context {
+ 	struct in_addr nh4;
+ 	struct in6_addr nh6;
+ 	uint32_t table;
++	uint8_t block_len;
++	uint8_t node_len;
++	uint8_t function_len;
++	uint8_t argument_len;
+ 	struct seg6local_flavors_info flv;
+ };
  
--- 
-2.45.2
-
diff --git a/src/sonic-frr/patch/0056-zebra-do-not-send-local-routes-to-fpm.patch b/src/sonic-frr/patch/0056-zebra-do-not-send-local-routes-to-fpm.patch
new file mode 100644
index 000000000000..85f98f58ea41
--- /dev/null
+++ b/src/sonic-frr/patch/0056-zebra-do-not-send-local-routes-to-fpm.patch
@@ -0,0 +1,80 @@
+From 94d88c9e9155756fce152141e0d0d86e64a6981d Mon Sep 17 00:00:00 2001
+From: sudhanshukumar22 <sudhanshu.kumar@broadcom.com>
+Date: Mon, 25 Nov 2024 01:32:36 -0800
+Subject: [PATCH]  https://github.com/FRRouting/frr/pull/12600, we are now
+ installing a new host  route for every connected route (along with the subnet
+ route). However, the  orchagent already installs a host route for a connected
+ interface address.  Hence, not sending the connected host route to the FPM.
+
+---
+ zebra/connected.c |  4 ++--
+ zebra/zebra_rib.c | 16 ++++++++++++++--
+ 2 files changed, 16 insertions(+), 4 deletions(-)
+
+diff --git a/zebra/connected.c b/zebra/connected.c
+index 404f892f6..2c698bed1 100644
+--- a/zebra/connected.c
++++ b/zebra/connected.c
+@@ -191,7 +191,7 @@ void connected_up(struct interface *ifp, struct connected *ifc)
+ 	uint32_t flags = 0;
+ 	uint32_t count = 0;
+ 	struct connected *c;
+-	bool install_local = true;
++	bool install_local = false;
+ 
+ 	zvrf = ifp->vrf->info;
+ 	if (!zvrf) {
+@@ -394,7 +394,7 @@ void connected_down(struct interface *ifp, struct connected *ifc)
+ 	struct zebra_vrf *zvrf;
+ 	uint32_t count = 0;
+ 	struct connected *c;
+-	bool remove_local = true;
++	bool remove_local = false;
+ 
+ 	zvrf = ifp->vrf->info;
+ 	if (!zvrf) {
+diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c
+index 5b95d8668..b0921f657 100644
+--- a/zebra/zebra_rib.c
++++ b/zebra/zebra_rib.c
+@@ -701,6 +701,12 @@ void rib_install_kernel(struct route_node *rn, struct route_entry *re,
+ 	/* Update fib selection */
+ 	dest->selected_fib = re;
+ 
++	/* Do not install local routes to FIB */
++	if (re->type == ZEBRA_ROUTE_LOCAL) {
++		zlog_debug("Not installing local route re %p (%s)",
++		 re, zebra_route_string(re->type));
++		return;
++	}
+ 	/*
+ 	 * Make sure we update the FPM any time we send new information to
+ 	 * the kernel.
+@@ -762,6 +768,12 @@ void rib_uninstall_kernel(struct route_node *rn, struct route_entry *re)
+ 		return;
+ 	}
+ 
++	/* Do not uninstall local routes to FIB */
++	if (re->type == ZEBRA_ROUTE_LOCAL) {
++		zlog_debug("Not uninstalling local route re %p (%s)",
++		 re, zebra_route_string(re->type));
++		return;
++	}
+ 	/*
+ 	 * Make sure we update the FPM any time we send new information to
+ 	 * the dataplane.
+@@ -1196,9 +1208,9 @@ static struct route_entry *rib_choose_best(struct route_entry *current,
+ 	 * or loopback interface.  If not, pick the last connected
+ 	 * route of the set of lowest metric connected routes.
+ 	 */
+-	possible = rib_choose_best_type(ZEBRA_ROUTE_LOCAL, current, alternate);
++	/*possible = rib_choose_best_type(ZEBRA_ROUTE_LOCAL, current, alternate);
+ 	if (possible)
+-		return possible;
++		return possible; */
+ 
+ 	possible = rib_choose_best_type(ZEBRA_ROUTE_CONNECT, current, alternate);
+ 	if (possible)
+-- 
+2.39.4
+
diff --git a/src/sonic-frr/patch/0057-Adding-changes-to-write-ip-nht-resolve-via-default-c.patch b/src/sonic-frr/patch/0057-Adding-changes-to-write-ip-nht-resolve-via-default-c.patch
new file mode 100644
index 000000000000..1e832b803e78
--- /dev/null
+++ b/src/sonic-frr/patch/0057-Adding-changes-to-write-ip-nht-resolve-via-default-c.patch
@@ -0,0 +1,85 @@
+From 274386fbefc83dc4f2f3184637db3c973f8200b6 Mon Sep 17 00:00:00 2001
+From: sudhanshukumar22 <sudhanshu.kumar@broadcom.com>
+Date: Wed, 13 Nov 2024 23:12:22 -0800
+Subject: [PATCH] Adding changes to write ip nht resolve-via-default
+ configuration for VRF in zebra
+
+---
+ zebra/zebra_vrf.c | 34 +++++++++++++++++++++++++++++++++++
+ zebra/zebra_vrf.h |  1 +
+ zebra/zebra_vty.c |  2 ++
+ 3 files changed, 37 insertions(+)
+
+diff --git a/zebra/zebra_vrf.c b/zebra/zebra_vrf.c
+index e464e47b1..ae8624a5e 100644
+--- a/zebra/zebra_vrf.c
++++ b/zebra/zebra_vrf.c
+@@ -541,6 +541,40 @@ int zebra_vrf_netns_handler_create(struct vty *vty, struct vrf *vrf,
+ 	return CMD_SUCCESS;
+ }
+ 
++void zebra_vrf_config_write(struct vty *vty)
++{
++	struct vrf *vrf;
++	struct zebra_vrf *zvrf;
++
++	RB_FOREACH (vrf, vrf_name_head, &vrfs_by_name) {
++		zvrf = vrf->info;
++
++		if (!zvrf)
++			continue;
++
++		if (zvrf_id(zvrf) == VRF_DEFAULT) {
++			if (zvrf->zebra_rnh_ip_default_route)
++				vty_out(vty, "ip nht resolve-via-default\n");
++
++			if (zvrf->zebra_rnh_ipv6_default_route)
++				vty_out(vty, "ipv6 nht resolve-via-default\n");
++		} else {
++			vty_frame(vty, "vrf %s\n", zvrf_name(zvrf));
++			if (zvrf->zebra_rnh_ip_default_route)
++				vty_out(vty, " ip nht resolve-via-default\n");
++
++			if (zvrf->zebra_rnh_ipv6_default_route)
++				vty_out(vty, " ipv6 nht resolve-via-default\n");
++		}
++		if (zvrf_id(zvrf) != VRF_DEFAULT)
++			vty_endframe(vty, "exit-vrf\n!\n");
++		else
++			vty_out(vty, "!\n");
++	}
++	return 0;
++
++}
++
+ /* Zebra VRF initialization. */
+ void zebra_vrf_init(void)
+ {
+diff --git a/zebra/zebra_vrf.h b/zebra/zebra_vrf.h
+index 5cbfab1dd..36f42a3db 100644
+--- a/zebra/zebra_vrf.h
++++ b/zebra/zebra_vrf.h
+@@ -246,6 +246,7 @@ extern struct zebra_vrf *zebra_vrf_lookup_by_name(const char *);
+ extern vrf_id_t zebra_vrf_lookup_by_table(uint32_t table_id, ns_id_t ns_id);
+ extern struct zebra_vrf *zebra_vrf_alloc(struct vrf *vrf);
+ extern struct route_table *zebra_vrf_table(afi_t, safi_t, vrf_id_t);
++extern void zebra_vrf_config_write(struct vty *vty);
+ 
+ /*
+  * API to associate a VRF with a NETNS.
+diff --git a/zebra/zebra_vty.c b/zebra/zebra_vty.c
+index 9a68d5ae9..ce772b818 100644
+--- a/zebra/zebra_vty.c
++++ b/zebra/zebra_vty.c
+@@ -3809,6 +3809,8 @@ static int config_write_protocol(struct vty *vty)
+ 
+ 	zebra_pbr_config_write(vty);
+ 
++	zebra_vrf_config_write(vty);
++
+ 	if (!zebra_vxlan_get_accept_bgp_seq())
+ 		vty_out(vty, "no evpn accept-bgp-seq\n");
+ 
+-- 
+2.39.4
+
diff --git a/src/sonic-frr/patch/0058-When-the-file-is-config-replayed-we-cannot-handle-th.patch b/src/sonic-frr/patch/0058-When-the-file-is-config-replayed-we-cannot-handle-th.patch
new file mode 100644
index 000000000000..a952c0a609b3
--- /dev/null
+++ b/src/sonic-frr/patch/0058-When-the-file-is-config-replayed-we-cannot-handle-th.patch
@@ -0,0 +1,71 @@
+From 83714071c68c588c66972fc0fe0f5f2a57a7dd55 Mon Sep 17 00:00:00 2001
+From: sudhanshukumar22 <sudhanshu.kumar@broadcom.com>
+Date: Thu, 21 Nov 2024 20:57:11 -0800
+Subject: [PATCH] When the file is config replayed, we cannot handle the errors
+  in command execution. We would let all commands in the file to complete, 
+ irrespective of some of them failing. Also, certain protocols like RIP, RIPng
+ are not supported in SONIC. So, it is expected that their configuration files
+ will not be present.
+
+---
+ lib/vty.c               | 16 +++++++++++++---
+ mgmtd/mgmt_be_adapter.c |  2 +-
+ 2 files changed, 14 insertions(+), 4 deletions(-)
+
+diff --git a/lib/vty.c b/lib/vty.c
+index 1c9cff478..017e0c7c4 100644
+--- a/lib/vty.c
++++ b/lib/vty.c
+@@ -2654,7 +2654,9 @@ void vty_read_file_finish(struct vty *vty, struct nb_config *config)
+ 		nl = strchr(ve->error_buf, '\n');
+ 		if (nl)
+ 			*nl = '\0';
+-		flog_err(EC_LIB_VTY, "%s on config line %u: %s", message,
++		/* When the file is config replayed, we cannot handle the errors in command execution.
++			We would let all commands in the file to complete, irrespective of some of them failing. */
++		flog_warn(EC_LIB_VTY, "%s on config line %u: %s", message,
+ 			 ve->line_num, ve->error_buf);
+ 	}
+ 
+@@ -2773,7 +2775,11 @@ FILE *vty_open_config(const char *config_file, char *config_default_dir)
+ 				flog_warn(EC_LIB_BACKUP_CONFIG,
+ 					  "using backup configuration file!");
+ 			else {
+-				flog_err(
++				/* There are few protocols e.g. RIP, RIPng, which are ununsed in SONIC.
++				   So, there will not be any config file for them.
++				   Flagging error, will be considered a breakage by loganalyzer, whereas
++				   it is valid for these protocol config file to be not present. */
++				flog_warn(
+ 					EC_LIB_VTY,
+ 					"%s: can't open configuration file [%s]",
+ 					__func__, config_file);
+@@ -2822,7 +2828,11 @@ FILE *vty_open_config(const char *config_file, char *config_default_dir)
+ 					  "using backup configuration file!");
+ 				fullpath = config_default_dir;
+ 			} else {
+-				flog_err(EC_LIB_VTY,
++				/* There are few protocols e.g. RIP, RIPng, which are ununsed in SONIC.
++				   So, there will not be any config file for them.
++				   Flagging error, will be considered a breakage by loganalyzer, whereas
++				   it is valid for these protocol config file to be not present. */
++				flog_warn(EC_LIB_VTY,
+ 					 "can't open configuration file [%s]",
+ 					 config_default_dir);
+ 				goto tmp_free_and_out;
+diff --git a/mgmtd/mgmt_be_adapter.c b/mgmtd/mgmt_be_adapter.c
+index b311bf469..58f866115 100644
+--- a/mgmtd/mgmt_be_adapter.c
++++ b/mgmtd/mgmt_be_adapter.c
+@@ -732,7 +732,7 @@ static void mgmt_be_adapter_conn_init(struct event *thread)
+ 	 * transaction in progress.
+ 	 */
+ 	if (mgmt_txn_notify_be_adapter_conn(adapter, true) != 0) {
+-		zlog_err("XXX txn in progress, retry init");
++		zlog_warn("XXX txn in progress, retry init");
+ 		mgmt_be_adapter_sched_init_event(adapter);
+ 		return;
+ 	}
+-- 
+2.39.4
+
diff --git a/src/sonic-frr/patch/0059-Fix-BGP-reset-on-suppress-fib-pending-configuration.patch b/src/sonic-frr/patch/0059-Fix-BGP-reset-on-suppress-fib-pending-configuration.patch
new file mode 100644
index 000000000000..9d3962f55183
--- /dev/null
+++ b/src/sonic-frr/patch/0059-Fix-BGP-reset-on-suppress-fib-pending-configuration.patch
@@ -0,0 +1,32 @@
+From 8f6adef67c93d04a9eefa1404db0c8de9877fb38 Mon Sep 17 00:00:00 2001
+From: sudhanshukumar22 <sudhanshu.kumar@broadcom.com>
+Date: Tue, 26 Nov 2024 00:40:46 -0800
+Subject: [PATCH] Pull request: https://github.com/FRRouting/frr/pull/17487
+ bgpd: Do not reset peers on suppress-fib toggling If the desired state is the
+ same - do nothing instead of resetting once again.
+
+Fixes: bdb5ae8 (bgpd: Make suppress-fib-pending clear peering)
+
+Signed-off-by: Donatas Abraitis <donatas@opensourcerouting.org>
+---
+ bgpd/bgpd.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
+index d6d874be2..0b2bf821e 100644
+--- a/bgpd/bgpd.c
++++ b/bgpd/bgpd.c
+@@ -461,6 +461,10 @@ void bgp_suppress_fib_pending_set(struct bgp *bgp, bool set)
+ 	if (bgp->inst_type == BGP_INSTANCE_TYPE_VIEW)
+ 		return;
+ 
++	/* Do nothing if already in a desired state */
++	if (set == !!CHECK_FLAG(bgp->flags, BGP_FLAG_SUPPRESS_FIB_PENDING))
++		return;
++
+ 	if (set) {
+ 		SET_FLAG(bgp->flags, BGP_FLAG_SUPPRESS_FIB_PENDING);
+ 		/* Send msg to zebra for the first instance of bgp enabled
+-- 
+2.39.4
+
diff --git a/src/sonic-frr/patch/0060-bgpd-Validate-both-nexthop-information-NEXTHOP-and-N.patch b/src/sonic-frr/patch/0060-bgpd-Validate-both-nexthop-information-NEXTHOP-and-N.patch
new file mode 100644
index 000000000000..c1088df457b9
--- /dev/null
+++ b/src/sonic-frr/patch/0060-bgpd-Validate-both-nexthop-information-NEXTHOP-and-N.patch
@@ -0,0 +1,106 @@
+From 4e3f27fec6a3b4c0b853ad30f73bf0d34003e23f Mon Sep 17 00:00:00 2001
+From: sk408845 <sk408845@contoso.com>
+Date: Tue, 26 Nov 2024 07:33:58 +0000
+Subject: [PATCH] Port https://github.com/FRRouting/frr/pull/17435/ bgpd:
+ Validate both nexthop information (NEXTHOP and NLRI) If we receive an IPv6
+ prefix e.g.: 2001:db8:100::/64 with nextop: 0.0.0.0, and mp_nexthop: fc00::2,
+ we should not treat this with an invalid nexthop because of 0.0.0.0. We MUST
+ check for MP_REACH attribute also and decide later if we have at least one a
+ valid nexthop.
+
+Signed-off-by: Donatas Abraitis <donatas@opensourcerouting.org>
+---
+ bgpd/bgp_route.c | 50 ++++++++++++++++++++++--------------------------
+ 1 file changed, 23 insertions(+), 27 deletions(-)
+
+diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
+index 26089e326..e05507c52 100644
+--- a/bgpd/bgp_route.c
++++ b/bgpd/bgp_route.c
+@@ -4032,7 +4032,7 @@ bool bgp_update_martian_nexthop(struct bgp *bgp, afi_t afi, safi_t safi,
+ 				uint8_t type, uint8_t stype, struct attr *attr,
+ 				struct bgp_dest *dest)
+ {
+-	bool ret = false;
++	bool nh_invalid = false;
+ 	bool is_bgp_static_route =
+ 		(type == ZEBRA_ROUTE_BGP && stype == BGP_ROUTE_STATIC) ? true
+ 								       : false;
+@@ -4054,12 +4054,16 @@ bool bgp_update_martian_nexthop(struct bgp *bgp, afi_t afi, safi_t safi,
+ 	    (safi != SAFI_UNICAST && safi != SAFI_MULTICAST && safi != SAFI_EVPN))
+ 		return false;
+ 
+-	/* If NEXT_HOP is present, validate it. */
+-	if (attr->flag & ATTR_FLAG_BIT(BGP_ATTR_NEXT_HOP)) {
+-		if (!ipv4_unicast_valid(&attr->nexthop) ||
+-		    bgp_nexthop_self(bgp, afi, type, stype, attr, dest))
+-			return true;
+-	}
++	/* If NEXT_HOP is present, validate it:
++	 * The route can have both nexthop + mp_nexthop encoded as multiple NLRIs,
++	 * and we MUST check if at least one of them is valid.
++	 * E.g.: IPv6 prefix can be with nexthop: 0.0.0.0, and mp_nexthop: fc00::1.
++	 */
++	if (CHECK_FLAG(attr->flag, ATTR_FLAG_BIT(BGP_ATTR_NEXT_HOP)))
++		nh_invalid = (attr->nexthop.s_addr == INADDR_ANY ||
++			      !ipv4_unicast_valid(&attr->nexthop) ||
++			      bgp_nexthop_self(bgp, afi, type, stype, attr, dest));
++
+ 
+ 	/* If MP_NEXTHOP is present, validate it. */
+ 	/* Note: For IPv6 nexthops, we only validate the global (1st) nexthop;
+@@ -4074,39 +4078,31 @@ bool bgp_update_martian_nexthop(struct bgp *bgp, afi_t afi, safi_t safi,
+ 		switch (attr->mp_nexthop_len) {
+ 		case BGP_ATTR_NHLEN_IPV4:
+ 		case BGP_ATTR_NHLEN_VPNV4:
+-			ret = (attr->mp_nexthop_global_in.s_addr ==
+-				       INADDR_ANY ||
+-			       !ipv4_unicast_valid(
+-				       &attr->mp_nexthop_global_in) ||
+-			       bgp_nexthop_self(bgp, afi, type, stype, attr,
+-						dest));
++			nh_invalid = (attr->mp_nexthop_global_in.s_addr == INADDR_ANY ||
++				      !ipv4_unicast_valid(&attr->mp_nexthop_global_in) ||
++				      bgp_nexthop_self(bgp, afi, type, stype, attr, dest));
+ 			break;
+ 
+ 		case BGP_ATTR_NHLEN_IPV6_GLOBAL:
+ 		case BGP_ATTR_NHLEN_VPNV6_GLOBAL:
+-			ret = (IN6_IS_ADDR_UNSPECIFIED(
+-					&attr->mp_nexthop_global)
+-			       || IN6_IS_ADDR_LOOPBACK(&attr->mp_nexthop_global)
+-			       || IN6_IS_ADDR_MULTICAST(
+-				       &attr->mp_nexthop_global)
+-			       || bgp_nexthop_self(bgp, afi, type, stype, attr,
+-						   dest));
++			nh_invalid = (IN6_IS_ADDR_UNSPECIFIED(&attr->mp_nexthop_global) ||
++				      IN6_IS_ADDR_LOOPBACK(&attr->mp_nexthop_global) ||
++				      IN6_IS_ADDR_MULTICAST(&attr->mp_nexthop_global) ||
++				      bgp_nexthop_self(bgp, afi, type, stype, attr, dest));
+ 			break;
+ 		case BGP_ATTR_NHLEN_IPV6_GLOBAL_AND_LL:
+-			ret = (IN6_IS_ADDR_LOOPBACK(&attr->mp_nexthop_global)
+-			       || IN6_IS_ADDR_MULTICAST(
+-				       &attr->mp_nexthop_global)
+-			       || bgp_nexthop_self(bgp, afi, type, stype, attr,
+-						   dest));
++			nh_invalid = (IN6_IS_ADDR_LOOPBACK(&attr->mp_nexthop_global) ||
++				      IN6_IS_ADDR_MULTICAST(&attr->mp_nexthop_global) ||
++				      bgp_nexthop_self(bgp, afi, type, stype, attr, dest));
+ 			break;
+ 
+ 		default:
+-			ret = true;
++			nh_invalid = true;
+ 			break;
+ 		}
+ 	}
+ 
+-	return ret;
++	return nh_invalid;
+ }
+ 
+ static void bgp_attr_add_no_export_community(struct attr *attr)
+-- 
+2.20.1
+
diff --git a/src/sonic-frr/patch/series b/src/sonic-frr/patch/series
index 0cb3259b47d9..e84597a45aed 100644
--- a/src/sonic-frr/patch/series
+++ b/src/sonic-frr/patch/series
@@ -6,30 +6,13 @@
 0006-Link-local-scope-was-not-set-while-binding-socket-for-bgp-ipv6-link-local-neighbors.patch
 0007-ignore-route-from-default-table.patch
 0008-Use-vrf_id-for-vrf-not-tabled_id.patch
-0009-bgpd-Ensure-suppress-fib-pending-works-with-network-.patch
 0010-bgpd-Change-log-level-for-graceful-restart-events.patch
-0011-zebra-Static-routes-async-notification-do-not-need-t.patch
-0012-zebra-Rename-vrf_lookup_by_tableid-to-zebra_vrf_look.patch
-0013-zebra-Move-protodown_r_bit-to-a-better-spot.patch
-0014-zebra-Remove-unused-dplane_intf_delete.patch
-0015-zebra-Remove-unused-add-variable.patch
-0016-zebra-Remove-duplicate-function-for-netlink-interfac.patch
-0017-zebra-Add-code-to-get-set-interface-to-pass-up-from-.patch
-0018-zebra-Use-zebra-dplane-for-RTM-link-and-addr.patch
-0019-zebra-remove-duplicated-nexthops-when-sending-fpm-msg.patch
-0020-zebra-Fix-non-notification-of-better-admin-won.patch
 0021-Disable-ipv6-src-address-test-in-pceplib.patch
 0022-cross-compile-changes.patch
-0023-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch
-0024-lib-use-snmp-s-large-fd-sets-for-agentx.patch
 0025-bgp-community-memory-leak-fix.patch
-0026-bgp-fib-suppress-announce-fix.patch
-0027-lib-Do-not-convert-EVPN-prefixes-into-IPv4-IPv6-if-n.patch
 0028-zebra-fix-parse-attr-problems-for-encap.patch
-0029-zebra-nhg-fix-on-intf-up.patch
 0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch
 0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch
-0032-bgpd-fix-flushing-ipv6-flowspec-entries-when-peering.patch
 0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch
 0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch
 0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch
@@ -50,6 +33,10 @@
 0050-bgpd-backpressure-Avoid-use-after-free.patch
 0051-bgpd-backpressure-fix-ret-value-evpn_route_select_in.patch
 0052-bgpd-backpressure-log-error-for-evpn-when-route-inst.patch
-0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch
-build-dplane-fpm-sonic-module.patch
-bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch
+0054-build-dplane-fpm-sonic-module.patch
+0055-bgpd-lib-Include-SID-structure-in-seg6local-nexthop.patch
+0056-zebra-do-not-send-local-routes-to-fpm.patch
+0057-Adding-changes-to-write-ip-nht-resolve-via-default-c.patch
+0058-When-the-file-is-config-replayed-we-cannot-handle-th.patch
+0059-Fix-BGP-reset-on-suppress-fib-pending-configuration.patch
+0060-bgpd-Validate-both-nexthop-information-NEXTHOP-and-N.patch

From 6756ed901a4993c24c9416f98baad2cd657f0d2b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 4 Dec 2024 22:01:18 +0800
Subject: [PATCH 308/364] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#21013)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

#### Why I did it
src/sonic-sairedis
```
* 8ba9448f - (HEAD -> master, origin/master, origin/HEAD) modify syncd init script for supporting yml (#1474) (8 hours ago) [賓少鈺]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 7817c3b1e421..8ba9448f4df9 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 7817c3b1e421b59e90729d45cb6da3f26a70af3c
+Subproject commit 8ba9448f4df94eb54185dad5c28ce96798022476

From 9ba6d5b69273a8c785f365611cd27d52cabf80ff Mon Sep 17 00:00:00 2001
From: anamehra <54692434+anamehra@users.noreply.github.com>
Date: Wed, 4 Dec 2024 07:34:35 -0800
Subject: [PATCH 309/364] Update cisco-8000.ini to 202405.0.11 release (#21009)

Signed-off-by: Anand Mehra anamehra@cisco.com

Fixed SDK for Cisco 8122 platform
---
 platform/checkout/cisco-8000.ini | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/checkout/cisco-8000.ini b/platform/checkout/cisco-8000.ini
index ff86bdc5e57d..fe56217a0a5f 100644
--- a/platform/checkout/cisco-8000.ini
+++ b/platform/checkout/cisco-8000.ini
@@ -1,3 +1,3 @@
 [module]
 repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git
-ref=202405.0.9
+ref=202405.0.11

From 335f40ad12234734938f9e81c98c319287ba61ff Mon Sep 17 00:00:00 2001
From: DavidZagury <32644413+DavidZagury@users.noreply.github.com>
Date: Wed, 4 Dec 2024 18:51:39 +0200
Subject: [PATCH 310/364] [Mellanox] Integrate HW-MGMT 7.0040.2000 Changes
 (#21006)

---
 platform/mellanox/hw-management.mk               |  5 +++--
 ...termine-reboot-cause-service-start-afte.patch | 16 ++++++++--------
 ...ealth-service-starts-after-hw-managemen.patch | 16 ++++++++--------
 platform/mellanox/hw-management/hw-mgmt          |  2 +-
 4 files changed, 20 insertions(+), 19 deletions(-)

diff --git a/platform/mellanox/hw-management.mk b/platform/mellanox/hw-management.mk
index 6255e17cef33..ce6e883af3de 100644
--- a/platform/mellanox/hw-management.mk
+++ b/platform/mellanox/hw-management.mk
@@ -1,5 +1,6 @@
 #
-# Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -16,7 +17,7 @@
 #
 # Mellanox HW Management
 
-MLNX_HW_MANAGEMENT_VERSION = 7.0040.1011
+MLNX_HW_MANAGEMENT_VERSION = 7.0040.2000
 
 export MLNX_HW_MANAGEMENT_VERSION
 
diff --git a/platform/mellanox/hw-management/0001-Make-SONiC-determine-reboot-cause-service-start-afte.patch b/platform/mellanox/hw-management/0001-Make-SONiC-determine-reboot-cause-service-start-afte.patch
index a8fb95786bdb..8642d8fa3469 100644
--- a/platform/mellanox/hw-management/0001-Make-SONiC-determine-reboot-cause-service-start-afte.patch
+++ b/platform/mellanox/hw-management/0001-Make-SONiC-determine-reboot-cause-service-start-afte.patch
@@ -1,7 +1,7 @@
-From 5a7bf8934772b94a2414f54cb3e343d0d1d81efd Mon Sep 17 00:00:00 2001
-From: keboliu <kebol@mellanox.com>
-Date: Fri, 15 Jan 2021 14:41:16 +0800
-Subject: [PATCH 1/3] Make SONiC determine-reboot-cause service start after
+From e588b87a2e80de284ea6e63563e27684acb2f56e Mon Sep 17 00:00:00 2001
+From: davidza <davidza@nvidia.com>
+Date: Tue, 15 Oct 2024 09:44:05 +0300
+Subject: [PATCH 1/3] Make SONiC determine-reboot-cause service start after 
  hw-mgmt service
 
 Signed-off-by: Kebo Liu <kebol@nvidia.com>
@@ -10,17 +10,17 @@ Signed-off-by: Kebo Liu <kebol@nvidia.com>
  1 file changed, 1 insertion(+)
 
 diff --git a/debian/hw-management.hw-management.service b/debian/hw-management.hw-management.service
-index 8bdcaef5..1c25ffb2 100755
+index 4bc1780e..1a50dc3c 100755
 --- a/debian/hw-management.hw-management.service
 +++ b/debian/hw-management.hw-management.service
-@@ -1,6 +1,7 @@
- [Unit]
+@@ -2,6 +2,7 @@
  Description=Chassis HW management service of Mellanox systems
  Documentation=man:hw-management.service(8)
+ Wants=hw-management-sync.service
 +Before=determine-reboot-cause.service
  
  [Service]
  Type=oneshot
 -- 
-2.30.2
+2.34.1
 
diff --git a/platform/mellanox/hw-management/0003-Make-system-health-service-starts-after-hw-managemen.patch b/platform/mellanox/hw-management/0003-Make-system-health-service-starts-after-hw-managemen.patch
index 5cbecf742955..18efb60f2821 100644
--- a/platform/mellanox/hw-management/0003-Make-system-health-service-starts-after-hw-managemen.patch
+++ b/platform/mellanox/hw-management/0003-Make-system-health-service-starts-after-hw-managemen.patch
@@ -1,7 +1,7 @@
-From e45320c61765b07f5d73f6c207f9f1d3b4d21721 Mon Sep 17 00:00:00 2001
-From: Stephen Sun <stephens@nvidia.com>
-Date: Mon, 28 Nov 2022 03:55:14 +0000
-Subject: [PATCH 3/3] Make system-health service starts after hw-management to
+From 69d083e05e39dc82567a338a59a2cefdcd022034 Mon Sep 17 00:00:00 2001
+From: davidza <davidza@nvidia.com>
+Date: Tue, 15 Oct 2024 09:51:11 +0300
+Subject: [PATCH 3/3] Make system-health service starts after hw-management to 
  avoid failures
 
 On SN2410, it can fail to read the file led_status_capability if it starts from ONIE
@@ -12,18 +12,18 @@ Signed-off-by: Stephen Sun <stephens@nvidia.com>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/debian/hw-management.hw-management.service b/debian/hw-management.hw-management.service
-index 1c25ffb2..639bd3cd 100755
+index 1a50dc3c..8a5c0423 100755
 --- a/debian/hw-management.hw-management.service
 +++ b/debian/hw-management.hw-management.service
-@@ -1,7 +1,7 @@
- [Unit]
+@@ -2,7 +2,7 @@
  Description=Chassis HW management service of Mellanox systems
  Documentation=man:hw-management.service(8)
+ Wants=hw-management-sync.service
 -Before=determine-reboot-cause.service
 +Before=determine-reboot-cause.service system-health.service watchdog-control.service
  
  [Service]
  Type=oneshot
 -- 
-2.30.2
+2.34.1
 
diff --git a/platform/mellanox/hw-management/hw-mgmt b/platform/mellanox/hw-management/hw-mgmt
index 164c9ef66b10..6e2f3609d968 160000
--- a/platform/mellanox/hw-management/hw-mgmt
+++ b/platform/mellanox/hw-management/hw-mgmt
@@ -1 +1 @@
-Subproject commit 164c9ef66b10eb88bad20225d200c048449033cb
+Subproject commit 6e2f3609d968e68ae9355339c4478c185ada8896

From 3cc4c110b22449b79517fd231e164478db5e75cb Mon Sep 17 00:00:00 2001
From: Gagan Punathil Ellath <gpunathilell@nvidia.com>
Date: Wed, 4 Dec 2024 08:53:49 -0800
Subject: [PATCH 311/364] [Mellanox][Smartswitch] Add no_wait option for dpu
 reboot and add platform information parsing   (#20943)

- Why I did it
Changes for dpuctlplat.py:
1. Added option to invoke systemctl rshim start/stop from the pmon container (Using dbus)
2. Added no_wait option for reboot (Since we do not need to wait for the dpu to be ready if NPU+DPU reboot is ongoing)
3. Added platform JSON parsing for rshim and pcie information

- How I did it
Changed dpuctlplat.py to support systemctl commands from pmon container using the dbus-send command
---
 .../sonic_platform/device_data.py             |  37 +++-
 .../sonic_platform/dpu_vpd_parser.py          |  46 +++++
 .../sonic_platform/dpuctlplat.py              | 151 +++++++++++-----
 .../tests/test_device_data.py                 |  81 ++++++++-
 .../tests/test_dpuctlplat.py                  | 171 +++++++++++++++---
 5 files changed, 401 insertions(+), 85 deletions(-)
 create mode 100644 platform/mellanox/mlnx-platform-api/sonic_platform/dpu_vpd_parser.py

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
index e0592fd58feb..2f2eee7b871c 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
@@ -1,6 +1,7 @@
 #
-# Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES.
-# Apache-2.0
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
 # you may not use this file except in compliance with the License.
@@ -19,12 +20,22 @@
 import os
 import time
 import re
+from enum import Enum
 
 from . import utils
 from sonic_py_common.general import check_output_pipe
 
 DEFAULT_WD_PERIOD = 65535
 
+
+class DpuInterfaceEnum(Enum):
+    MIDPLANE_INT = "midplane_interface"
+    RSHIM_INT = "rshim_info"
+    PCIE_INT = "bus_info"
+
+
+dpu_interface_values = [item.value for item in DpuInterfaceEnum]
+
 DEVICE_DATA = {
     'x86_64-mlnx_msn2700-r0': {
         'thermal': {
@@ -271,16 +282,26 @@ def get_linecard_max_port_count(cls):
     @classmethod
     @utils.read_only_cache()
     def get_platform_dpus_data(cls):
-        json_data = cls.get_platform_json_data()
+        from sonic_py_common import device_info
+        platform_path = device_info.get_path_to_platform_dir()
+        platform_json_path = os.path.join(platform_path, 'platform.json')
+        json_data = utils.load_json_file(platform_json_path)
         return json_data.get('DPUS', None)
 
+    @classmethod
+    def get_dpu_interface(cls, dpu, interface):
+        dpu_data = cls.get_platform_dpus_data()
+        if (not dpu_data) or (interface not in dpu_interface_values):
+            return None
+        return dpu_data.get(dpu, {}).get(interface)
+
     @classmethod
     @utils.read_only_cache()
-    def get_platform_json_data(cls):
-        from sonic_py_common import device_info
-        platform_path = device_info.get_path_to_platform_dir()
-        platform_json_path = os.path.join(platform_path, 'platform.json')
-        return utils.load_json_file(platform_json_path)
+    def get_dpu_count(cls):
+        dpu_data = cls.get_platform_dpus_data()
+        if not dpu_data:
+            return 0
+        return len(dpu_data)
 
     @classmethod
     def get_bios_component(cls):
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/dpu_vpd_parser.py b/platform/mellanox/mlnx-platform-api/sonic_platform/dpu_vpd_parser.py
new file mode 100644
index 000000000000..3347a55aa560
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/dpu_vpd_parser.py
@@ -0,0 +1,46 @@
+#
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+from .vpd_parser import VpdParser
+
+
+class DpuVpdParser(VpdParser):
+    """DPU Specific VPD parser"""
+    def __init__(self, file_path, dpu_name):
+        super(DpuVpdParser, self).__init__(file_path=file_path)
+        self.dpu_name = dpu_name
+
+    def get_dpu_data(self, key=None):
+        """Retrieves VPD Entry for DPU Specific Key"""
+        return self.get_entry_value(f"{self.dpu_name}_{key}")
+
+    def get_dpu_base_mac(self):
+        """Retrieves VPD Entry for DPU Specific Mac Address"""
+        return self.get_dpu_data("BASE_MAC")
+
+    def get_dpu_serial(self):
+        """Retrieves VPD Entry for DPU Specific Serial Number"""
+        return self.get_dpu_data("SN")
+
+    def get_dpu_revision(self):
+        """Retrieves VPD Entry for DPU Specific Revision"""
+        return self.get_dpu_data("REV")
+
+    def get_dpu_model(self):
+        """Retrieves VPD Entry for DPU Specific Model Number"""
+        return self.get_dpu_data("PN")
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py b/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py
index 12281db1e789..b66f1be2daad 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py
@@ -1,5 +1,6 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -28,6 +29,7 @@
     from .inotify_helper import InotifyHelper
     from sonic_py_common.syslogger import SysLogger
     from . import utils
+    from .device_data import DeviceDataManager, DpuInterfaceEnum
 except ImportError as e:
     raise ImportError(str(e)) from e
 
@@ -48,6 +50,7 @@ class OperationType(Enum):
     CLR = "0"
     SET = "1"
 
+
 class BootProgEnum(Enum):
     RST = 0
     BL2 = 1
@@ -63,20 +66,13 @@ class BootProgEnum(Enum):
     FW_FAULT_DONE = 11
     SW_INACTIVE = 15
 
-# The rshim services are in a different order as compared to the DPU names
-dpu_map = {
-    "dpu1": {"pci_id": "0000:08:00.0", "rshim": "rshim@0"},
-    "dpu2": {"pci_id": "0000:07:00.0", "rshim": "rshim@1"},
-    "dpu3": {"pci_id": "0000:01:00.0", "rshim": "rshim@2"},
-    "dpu4": {"pci_id": "0000:02:00.0", "rshim": "rshim@3"},
-}
-
 
 class DpuCtlPlat():
     """Class for Per DPU API Call"""
     def __init__(self, dpu_name):
         self.dpu_name = dpu_name
         self._name = self.get_hwmgmt_name()
+        self.dpu_id = int(self.dpu_name[3:])
         self.rst_path = os.path.join(SYSTEM_BASE,
                                      f"{self._name}_rst")
         self.pwr_path = os.path.join(SYSTEM_BASE,
@@ -89,9 +85,6 @@ def __init__(self, dpu_name):
                                              f"{self._name}_shtdn_ready")
         self.boot_prog_path = os.path.join(HW_BASE,
                                            f"{self._name}/system/boot_progress")
-        self.pci_dev_path = os.path.join(PCI_DEV_BASE,
-                                         dpu_map[self._name]["pci_id"],
-                                         "remove")
         self.boot_prog_map = {
             BootProgEnum.RST.value: "Reset/Boot-ROM",
             BootProgEnum.BL2.value: "BL2 (from ATF image on eMMC partition)",
@@ -111,6 +104,10 @@ def __init__(self, dpu_name):
         self.shtdn_state = None
         self.dpu_ready_state = None
         self.setup_logger()
+        self.pci_dev_path = None
+        self.rshim_interface = None
+        # Use systemd dbus to execute start and stop rshim service
+        os.environ['DBUS_SESSION_BUS_ADDRESS'] = 'unix:path=/run/dbus/system_bus_socket'
         self.verbosity = False
 
     def setup_logger(self, use_print=False):
@@ -125,8 +122,7 @@ def setup_logger(self, use_print=False):
 
     def log_debug(self, msg=None):
         # Print only in verbose mode
-        if self.verbosity:
-            self.logger_debug(f"{self.dpu_name}: {msg}")
+        self.logger_debug(f"{self.dpu_name}: {msg}")
 
     def log_info(self, msg=None):
         self.logger_info(f"{self.dpu_name}: {msg}")
@@ -134,32 +130,56 @@ def log_info(self, msg=None):
     def log_error(self, msg=None):
         self.logger_error(f"{self.dpu_name}: {msg}")
 
-    def run_cmd_output(self, cmd):
+    def run_cmd_output(self, cmd, raise_exception=True):
         try:
-            subprocess.check_output(cmd)
+            return subprocess.check_output(cmd).decode().strip()
         except Exception as err:
-            self.log_error(f"Failed to run cmd {' '.join(cmd)}")
-            raise err
+            if raise_exception:
+                raise err
+            else:
+                self.log_debug(f"Failed to run cmd {' '.join(cmd)}")
 
     def dpu_pre_shutdown(self):
         """Method to execute shutdown activities for the DPU"""
-        self.dpu_rshim_service_control("stop")
-        self.dpu_pci_remove()
+        rshim_op = self.dpu_rshim_service_control("stop")
+        pci_rem_op = self.dpu_pci_remove()
+        return rshim_op and pci_rem_op
 
     def dpu_post_startup(self):
         """Method to execute all post startup activities for the DPU"""
-        self.dpu_pci_scan()
-        self.wait_for_pci()
-        self.dpu_rshim_service_control("start")
-
-    def dpu_rshim_service_control(self, set_state):
+        pci_scan_op = self.dpu_pci_scan()
+        rshim_op = None
+        if self.wait_for_pci():
+            rshim_op = self.dpu_rshim_service_control("start")
+        if rshim_op and pci_scan_op:
+            return True
+        return False
+
+    def get_rshim_interface(self):
+        """Parse the rshim interface from platform.json, raise Runtime error if the device id is not available"""
+        if not self.rshim_interface:
+                interface_name = DeviceDataManager.get_dpu_interface(self.dpu_name, DpuInterfaceEnum.RSHIM_INT.value)
+                if not interface_name:
+                    raise RuntimeError(f"Unable to Parse rshim information for {self.dpu_name} from Platform.json")
+                # rshim1 -> rshim@1
+                self.rshim_interface = interface_name[:5] + "@" + interface_name[5:]
+        return self.rshim_interface
+
+    def dpu_rshim_service_control(self, op):
         """Start/Stop the RSHIM service for the current DPU"""
         try:
-            cmd = ['systemctl', set_state, dpu_map[self.get_hwmgmt_name()]['rshim'] + ".service"]
-            self.run_cmd_output(cmd)
-            self.log_debug(f"Executed rshim service command: {' '.join(cmd)}")
-        except Exception:
-            self.log_error(f"Failed to start rshim!")
+            rshim_cmd = ["dbus-send", "--dest=org.freedesktop.systemd1", "--type=method_call",
+                         "--print-reply", "--reply-timeout=2000",
+                         "/org/freedesktop/systemd1",
+                         f"org.freedesktop.systemd1.Manager.{op.capitalize()}Unit",
+                         f"string:{self.get_rshim_interface()}.service",
+                         "string:replace"]
+            self.run_cmd_output(rshim_cmd)
+            # If command fails execution exception is raised , return true if control is still in try block
+            return True
+        except Exception as e:
+            self.log_error(f"Failed to {op} rshim!: {e}")
+        return False
 
     @contextmanager
     def get_open_fd(self, path, flag):
@@ -169,11 +189,20 @@ def get_open_fd(self, path, flag):
         finally:
             os.close(fd)
 
+    def get_pci_dev_path(self):
+        """Parse the PCIE device ID from platform.json, raise Runtime error if the device id is not available"""
+        if not self.pci_dev_path:
+            pci_dev_id = DeviceDataManager.get_dpu_interface(self.dpu_name, DpuInterfaceEnum.PCIE_INT.value)
+            if not pci_dev_id:
+                raise RuntimeError(f"Unable to obtain pci device id for {self.dpu_name} from platform.json")
+            self.pci_dev_path = os.path.join(PCI_DEV_BASE, pci_dev_id, "remove")
+        return self.pci_dev_path
+
     def wait_for_pci(self):
         """Wait for the PCI device folder in the PCI Path, required before starting rshim"""
         try:
             with self.get_open_fd(PCI_DEV_BASE, os.O_RDONLY) as dir_fd:
-                if os.path.exists(os.path.dirname(self.pci_dev_path)):
+                if os.path.exists(os.path.dirname(self.get_pci_dev_path())):
                     return True
                 poll_obj = poll()
                 poll_obj.register(dir_fd, POLLIN)
@@ -181,11 +210,11 @@ def wait_for_pci(self):
                 while (time.time() - start) < WAIT_FOR_PCI_DEV:
                     events = poll_obj.poll(WAIT_FOR_PCI_DEV * 1000)
                     if events:
-                        if os.path.exists(os.path.dirname(self.pci_dev_path)):
+                        if os.path.exists(os.path.dirname(self.get_pci_dev_path())):
                             return True
-                return os.path.exists(os.path.dirname(self.pci_dev_path))
-        except Exception:
-            self.log_error("Unable to wait for PCI device")
+                return os.path.exists(os.path.dirname(self.get_pci_dev_path()))
+        except Exception as e:
+            self.log_error(f"Unable to wait for PCI device:{e}")
 
     def write_file(self, file_name, content_towrite):
         """Write given value to file only if file exists"""
@@ -229,12 +258,15 @@ def _power_off_force(self):
         self.log_info(f"Force Power Off complete")
         return True
 
-    def _power_on_force(self, count=4):
+    def _power_on_force(self, count=4, no_wait=False):
         """Per DPU Power on with force private function"""
         if count < 4:
             self.log_error(f"Failed Force Power on! Retry {4-count}..")
         self.write_file(self.pwr_f_path, OperationType.SET.value)
         self.write_file(self.rst_path, OperationType.SET.value)
+        if no_wait:
+            self.log_debug("Exiting without checking result of reboot command")
+            return True
         get_rdy_inotify = InotifyHelper(self.dpu_rdy_path)
         with self.time_check_context("power on force"):
             dpu_rdy = get_rdy_inotify.wait_watch(WAIT_FOR_DPU_READY, 1)
@@ -265,20 +297,30 @@ def _power_on(self):
     def dpu_pci_remove(self):
         """Per DPU PCI remove API"""
         try:
-            self.write_file(self.pci_dev_path, OperationType.SET.value)
+            self.write_file(self.get_pci_dev_path(), OperationType.SET.value)
+            return True
         except Exception:
             self.log_info(f"Failed PCI Removal!")
+        return False
 
     def dpu_pci_scan(self):
         """PCI Scan API"""
-        pci_scan_path = "/sys/bus/pci/rescan"
-        self.write_file(pci_scan_path, OperationType.SET.value)
+        try:
+            pci_scan_path = "/sys/bus/pci/rescan"
+            self.write_file(pci_scan_path, OperationType.SET.value)
+            return True
+        except Exception:
+            self.log_info(f"Failed to rescan")
+        return False
 
     def dpu_power_on(self, forced=False):
         """Per DPU Power on API"""
         with self.boot_prog_context():
             self.log_info(f"Power on with force = {forced}")
-            if forced:
+            if self.read_boot_prog() == BootProgEnum.OS_RUN.value:
+                self.log_info(f"Skipping DPU power on as DPU is already powered on")
+                return_value = True
+            elif forced:
                 return_value = self._power_on_force()
             else:
                 return_value = self._power_on()
@@ -290,18 +332,24 @@ def dpu_power_off(self, forced=False):
         with self.boot_prog_context():
             self.dpu_pre_shutdown()
             self.log_info(f"Power off with force = {forced}")
-            if forced:
+            if self.read_boot_prog() == BootProgEnum.RST.value:
+                self.log_info(f"Skipping DPU power off as DPU is already powered off")
+                return True
+            elif forced:
                 return self._power_off_force()
             elif self.read_boot_prog() != BootProgEnum.OS_RUN.value:
                 self.log_info(f"Power off with force = True since since OS is not in running state on DPU")
                 return self._power_off_force()
             return self._power_off()
 
-    def _reboot(self):
+    def _reboot(self, no_wait):
         """Per DPU Reboot Private function API"""
         if not self.dpu_go_down():
             self._power_off_force()
         self.write_file(self.rst_path, OperationType.SET.value)
+        if no_wait:
+            self.log_debug("Exiting without checking result of reboot command")
+            return True
         get_rdy_inotify = InotifyHelper(self.dpu_rdy_path)
         with self.time_check_context("power on"):
             dpu_rdy = get_rdy_inotify.wait_watch(WAIT_FOR_DPU_READY, 1)
@@ -311,25 +359,28 @@ def _reboot(self):
             return_value = self._power_on_force()
         return return_value
 
-    def _reboot_force(self):
+    def _reboot_force(self, no_wait):
         """Per DPU Force Reboot Private function API"""
         self._power_off_force()
-        return_value = self._power_on_force()
+        return_value = self._power_on_force(no_wait=no_wait)
         return return_value
 
-    def dpu_reboot(self, forced=False):
+    def dpu_reboot(self, forced=False, no_wait=False, skip_pre_post=False):
         """Per DPU Power on API"""
         with self.boot_prog_context():
-            self.dpu_pre_shutdown()
+            if not skip_pre_post:
+                self.dpu_pre_shutdown()
             self.log_info(f"Reboot with force = {forced}")
             if forced:
-                return_value = self._reboot_force()
+                return_value = self._reboot_force(no_wait)
             elif self.read_boot_prog() != BootProgEnum.OS_RUN.value:
                 self.log_info(f"Reboot with force = True since OS is not in running state on DPU")
-                return_value = self._reboot_force()
+                return_value = self._reboot_force(no_wait)
             else:
-                return_value = self._reboot()
-            self.dpu_post_startup()
+                return_value = self._reboot(no_wait)
+            # No Post startup as well for no_wait call
+            if (not no_wait) and (not skip_pre_post):
+                self.dpu_post_startup()
             if return_value:
                 self.log_info("Reboot Complete")
             return return_value
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_device_data.py b/platform/mellanox/mlnx-platform-api/tests/test_device_data.py
index f67793419091..f34cb4e471e7 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_device_data.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_device_data.py
@@ -1,6 +1,7 @@
 #
-# Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
-# Apache-2.0
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
 # you may not use this file except in compliance with the License.
@@ -28,7 +29,7 @@
 modules_path = os.path.dirname(test_path)
 sys.path.insert(0, modules_path)
 
-from sonic_platform.device_data import DeviceDataManager
+from sonic_platform.device_data import DeviceDataManager, DpuInterfaceEnum, dpu_interface_values
 
 
 class TestDeviceData:
@@ -83,3 +84,77 @@ def test_wait_platform_ready(self, mock_is_indep, mock_exists):
         assert DeviceDataManager.wait_platform_ready()
         mock_exists.return_value = False
         assert not DeviceDataManager.wait_platform_ready()
+
+    @mock.patch('sonic_py_common.device_info.get_path_to_platform_dir', mock.MagicMock(return_value='/tmp'))
+    @mock.patch('sonic_platform.device_data.utils.load_json_file')
+    def test_dpu_count(self, mock_load_json):
+        mock_value = {
+            "DPUS": {
+                "dpu1": {
+                    "interface": {"Ethernet224": "Ethernet0"}
+                },
+                "dpu2": {
+                    "interface": {"Ethernet232": "Ethernet0"}
+                },
+                "dpu3": {
+                    "interface": {"EthernetX": "EthernetY"}
+                }
+            },
+        }
+        mock_load_json.return_value = mock_value
+        return_dict = DeviceDataManager.get_platform_dpus_data()
+        dpu_data = mock_value["DPUS"]
+        assert dpu_data == return_dict
+        mock_load_json.return_value = {}
+        # Data is Cached
+        assert DeviceDataManager.get_platform_dpus_data() == mock_value["DPUS"]
+        assert DeviceDataManager.get_dpu_count() == 3
+
+    @mock.patch('sonic_py_common.device_info.get_path_to_platform_dir', mock.MagicMock(return_value='/tmp'))
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.get_platform_dpus_data')
+    def test_dpu_interface_data(self, mock_load_json):
+        mock_value = {
+            "dpu0": {
+                "midplane_interface": "dpu0",
+                "interface": {
+                    "Ethernet224": "Ethernet0"
+                },
+                "rshim_info": "rshim0",
+                "bus_info": "0000:08:00.0"
+            },
+            "dpu1": {
+                "midplane_interface": "dpu1",
+                "interface": {
+                    "Ethernet232": "Ethernet0"
+                },
+                "rshim_info": "rshim1",
+                "bus_info": "0000:07:00.0"
+            },
+            "dpu2": {
+                "midplane_interface": "dpu2",
+                "interface": {
+                    "Ethernet240": "Ethernet0"
+                },
+                "rshim_info": "rshim2",
+                "bus_info": "0000:01:00.0"
+            },
+            "dpu3": {
+                "midplane_interface": "dpu3",
+                "interface": {
+                    "Ethernet248": "Ethernet0"
+                },
+                "rshim_info": "rshim3",
+                "bus_info": "0000:02:00.0"
+            }
+        }
+        mock_load_json.return_value = mock_value
+        for dpu_name in mock_value:
+            for dpu_interface in dpu_interface_values:
+                assert DeviceDataManager.get_dpu_interface(dpu_name, dpu_interface) == mock_value[dpu_name][dpu_interface]
+        invalid_dpu_names = ["dpu4", "", "dpu"]
+        invalid_interface_names = ["midplane", "rshim", "bus"]
+        for interface_name in invalid_interface_names:
+            assert not DeviceDataManager.get_dpu_interface("dpu0", interface_name)
+        for dpu_name in invalid_dpu_names:
+            assert not DeviceDataManager.get_dpu_interface(dpu_name, DpuInterfaceEnum.MIDPLANE_INT.value)
+        assert not DeviceDataManager.get_dpu_interface("", "")
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py b/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py
index 7340a0041953..34c7870cfd85 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py
@@ -1,5 +1,6 @@
 #
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -19,7 +20,8 @@
 import os
 import sys
 import pytest
-from sonic_platform.dpuctlplat import DpuCtlPlat, dpu_map, BootProgEnum
+import sonic_platform
+from sonic_platform.dpuctlplat import DpuCtlPlat, BootProgEnum, PCI_DEV_BASE
 
 from unittest.mock import MagicMock, patch, Mock, call
 
@@ -45,6 +47,9 @@ def create_dpu_list():
 
 obj = create_dpu_list()
 
+rshim_interface = "rshim@0"
+pci_dev_path = os.path.join(PCI_DEV_BASE, "0000:08:00.0", 'remove')
+
 
 class TestDpuClass:
     """Tests for dpuctl Platform API Wrapper"""
@@ -53,6 +58,9 @@ def setup_class(cls):
         """Setup function for all tests for dpuctl implementation"""
         os.environ["PATH"] += os.pathsep + scripts_path
         os.environ["MLNX_PLATFORM_API_DPUCTL_UNIT_TESTING"] = "2"
+        dpuctl_obj = obj["dpuctl_list"][0]
+        dpuctl_obj.rshim_interface = rshim_interface
+        dpuctl_obj.pci_dev_path = pci_dev_path
 
     @patch('os.path.exists', MagicMock(return_value=True))
     @patch('multiprocessing.Process.start', MagicMock(return_value=True))
@@ -74,8 +82,8 @@ def mock_write_file(file_name, content_towrite):
         with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
              patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_RUN.value)):
             assert dpuctl_obj.dpu_power_off(True)
-            assert written_data[0]["file"].endswith(
-                f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove")
+            print(f"{written_data}")
+            assert written_data[0]["file"].endswith(f"{pci_dev_path}")
             assert "1" == written_data[0]["data"]
             assert "0" == written_data[1]["data"]
             assert written_data[1]["file"].endswith(
@@ -88,7 +96,7 @@ def mock_write_file(file_name, content_towrite):
             assert mock_inotify.call_args.args[0].endswith(
                 f"{dpuctl_obj.get_hwmgmt_name()}_shtdn_ready")
             assert written_data[0]["file"].endswith(
-                f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove")
+                f"{pci_dev_path}")
             assert "1" == written_data[0]["data"]
             assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
             assert "0" == written_data[1]["data"]
@@ -100,7 +108,7 @@ def mock_write_file(file_name, content_towrite):
             assert mock_inotify.call_args.args[0].endswith(
                 f"{dpuctl_obj.get_hwmgmt_name()}_shtdn_ready")
             assert written_data[0]["file"].endswith(
-                f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove")
+                f"{pci_dev_path}")
             assert "1" == written_data[0]["data"]
             assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
             assert "0" == written_data[1]["data"]
@@ -108,7 +116,7 @@ def mock_write_file(file_name, content_towrite):
             assert "0" == written_data[2]["data"]
             assert written_data[3]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
             assert "0" == written_data[3]["data"]
-        # Test whether value of boot_progress changes power off to force_power_off
+        # Test whether value of boot_progress skips power off
         with patch.object(dpuctl_obj, 'read_boot_prog') as mock_boot_prog, \
              patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
              patch.object(dpuctl_obj, '_power_off_force') as mock_power_off_force, \
@@ -117,6 +125,16 @@ def mock_write_file(file_name, content_towrite):
             mock_boot_prog.return_value = BootProgEnum.RST.value
             mock_add_watch.return_value = True
             assert dpuctl_obj.dpu_power_off(False)
+            assert mock_obj.call_args_list[1].args[0] == "Skipping DPU power off as DPU is already powered off"
+        # Test whether value of boot_progress changes power off to force_power_off
+        with patch.object(dpuctl_obj, 'read_boot_prog') as mock_boot_prog, \
+             patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
+             patch.object(dpuctl_obj, '_power_off_force') as mock_power_off_force, \
+             patch.object(dpuctl_obj, '_power_off') as mock_power_off, \
+             patch.object(dpuctl_obj, 'log_info') as mock_obj:
+            mock_boot_prog.return_value = BootProgEnum.OS_CRASH_PROG.value
+            mock_add_watch.return_value = True
+            assert dpuctl_obj.dpu_power_off(False)
             assert mock_obj.call_args_list[1].args[0] == "Power off with force = True since since OS is not in running state on DPU"
             mock_power_off_force.assert_called_once()
             mock_power_off.assert_not_called()
@@ -126,7 +144,6 @@ def mock_write_file(file_name, content_towrite):
             assert dpuctl_obj.dpu_power_off(False)
             mock_power_off_force.assert_not_called()
             mock_power_off.assert_called_once()
-            
 
     @patch('os.path.exists', MagicMock(return_value=True))
     @patch('multiprocessing.Process.start', MagicMock(return_value=True))
@@ -147,7 +164,8 @@ def mock_write_file(file_name, content_towrite):
             return True
         with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
              patch.object(dpuctl_obj, 'wait_for_pci', wraps=MagicMock(return_value=None)), \
-             patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)):
+             patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)), \
+             patch.object(dpuctl_obj, 'read_boot_prog', wraps=MagicMock(return_value=BootProgEnum.RST.value)):
             assert dpuctl_obj.dpu_power_on(True)
             assert mock_inotify.call_args.args[0].endswith(
                 f"{dpuctl_obj.get_hwmgmt_name()}_ready")
@@ -186,7 +204,7 @@ def mock_write_file(file_name, content_towrite):
             assert "1" == written_data[18]["data"]
 
     @patch('os.path.exists', MagicMock(return_value=True))
-    @patch('multiprocessing.Process.start', MagicMock(return_value=True))
+    @patch('multiprocessing.Process.start', MagicMock(return_value=None))
     @patch('multiprocessing.Process.is_alive', MagicMock(return_value=False))
     @patch('sonic_platform.inotify_helper.InotifyHelper.wait_watch')
     @patch('sonic_platform.inotify_helper.InotifyHelper.__init__')
@@ -207,7 +225,7 @@ def mock_write_file(file_name, content_towrite):
             dpuctl_obj.write_file = mock_write_file
             assert dpuctl_obj.dpu_reboot(False)
             assert len(written_data) == 4
-            assert written_data[0]["file"].endswith(f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove")
+            assert written_data[0]["file"].endswith(f"{pci_dev_path}")
             assert "1" == written_data[0]["data"]
             assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
             assert "0" == written_data[1]["data"]
@@ -221,7 +239,7 @@ def mock_write_file(file_name, content_towrite):
             written_data = []
             assert not dpuctl_obj.dpu_reboot()
             assert len(written_data) == 22
-            assert written_data[0]["file"].endswith(f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove")
+            assert written_data[0]["file"].endswith(f"{pci_dev_path}")
             assert "1" == written_data[0]["data"]
             assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
             assert "0" == written_data[1]["data"]
@@ -246,7 +264,7 @@ def mock_write_file(file_name, content_towrite):
         mock_inotify.reset_mock()
         mock_add_watch.return_value = True
         mock_inotify.return_value = None
-        written_data=[]
+        written_data = []
         with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
              patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_RUN.value)), \
              patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)):
@@ -254,7 +272,7 @@ def mock_write_file(file_name, content_towrite):
             assert dpuctl_obj.dpu_reboot(True)
             mock_add_watch.return_value = None
             assert len(written_data) == 6
-            assert written_data[0]["file"].endswith(f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove")
+            assert written_data[0]["file"].endswith(f"{pci_dev_path}")
             assert "1" == written_data[0]["data"]
             assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
             assert "0" == written_data[1]["data"]
@@ -272,7 +290,7 @@ def mock_write_file(file_name, content_towrite):
             written_data = []
             assert not dpuctl_obj.dpu_reboot(True)
             assert len(written_data) == 18
-            assert written_data[0]["file"].endswith(f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove")
+            assert written_data[0]["file"].endswith(f"{pci_dev_path}")
             assert "1" == written_data[0]["data"]
             assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
             assert "0" == written_data[1]["data"]
@@ -312,6 +330,60 @@ def mock_write_file(file_name, content_towrite):
             assert dpuctl_obj.dpu_reboot(False)
             mock_reset_force.assert_not_called()
             mock_reset.assert_called_once()
+        written_data = []
+        mock_inotify.reset_mock()
+        mock_add_watch.reset_mock()
+        mock_inotify.return_value = None
+        mock_add_watch.return_value = True
+        with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
+             patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_RUN.value)), \
+             patch.object(dpuctl_obj, 'dpu_rshim_service_control') as mock_rshim:
+            assert dpuctl_obj.dpu_reboot(forced=False, no_wait=True)
+            # Rshim service is only stopped and not started
+            mock_rshim.assert_called_once()
+            mock_rshim.call_args.args[0] == "stop"
+            assert written_data[0]["file"].endswith(f"{pci_dev_path}")
+            assert "1" == written_data[0]["data"]
+            assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+            assert "0" == written_data[1]["data"]
+            assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+            assert "1" == written_data[2]["data"]
+            mock_inotify.called_once()
+            mock_add_watch.called_once()
+        written_data = []
+        mock_inotify.reset_mock()
+        mock_add_watch.reset_mock()
+        mock_inotify.return_value = None
+        mock_add_watch.return_value = True
+        with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
+             patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_START.value)), \
+             patch.object(dpuctl_obj, 'dpu_rshim_service_control') as mock_rshim:
+            assert dpuctl_obj.dpu_reboot(forced=False, no_wait=True)
+            mock_rshim.assert_called_once()
+            mock_rshim.call_args.args[0] == "stop"
+            assert written_data[0]["file"].endswith(f"{pci_dev_path}")
+            assert "1" == written_data[0]["data"]
+            assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+            assert "0" == written_data[1]["data"]
+            assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
+            assert "0" == written_data[2]["data"]
+            assert written_data[3]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
+            assert "1" == written_data[3]["data"]
+            assert written_data[4]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+            assert "1" == written_data[4]["data"]
+            mock_inotify.called_once()
+            mock_add_watch.called_once()
+        # Skip pre startup and post shutdown
+        written_data = []
+        with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
+             patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_START.value)), \
+             patch.object(dpuctl_obj, 'dpu_rshim_service_control') as mock_rshim:
+            assert dpuctl_obj.dpu_reboot(skip_pre_post=True)
+            mock_rshim.assert_not_called()
+            # We skip writing PCI data
+            assert written_data[0]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+            assert "0" == written_data[0]["data"]
+            assert not written_data[-1]["file"].endswith("rescan")
 
     def test_prog_update(self):
         dpuctl_obj = obj["dpuctl_list"][0]
@@ -392,7 +464,8 @@ def mock_time_diff():
         with patch("time.time", wraps=mock_time_diff):
             # PCI Device is not recognized
             assert not dpuctl_obj.wait_for_pci()
-            assert f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}" in mock_exists.call_args.args[0]
+            pci_parent_path = os.path.dirname(pci_dev_path)
+            assert pci_parent_path == mock_exists.call_args.args[0]
             mock_obj.register.assert_called_once()
             mock_obj.poll.assert_called_once()
             # PCI device is recognized immediately
@@ -400,7 +473,7 @@ def mock_time_diff():
             mock_exists.reset_mock()
             mock_exists.return_value = True
             assert dpuctl_obj.wait_for_pci()
-            assert f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}" in mock_exists.call_args.args[0]
+            assert pci_parent_path == mock_exists.call_args.args[0]
             mock_obj.register.assert_not_called()
             mock_obj.poll.assert_not_called()
             # PCI device is added later (Detected in Loop)
@@ -420,9 +493,22 @@ def mock_time_diff():
             assert dpuctl_obj.wait_for_pci()
             mock_obj.register.assert_called_once()
             mock_obj.poll.assert_not_called()
-        with patch.object(dpuctl_obj, '_name', "dpua"), patch.object(dpuctl_obj, 'log_error') as mock_obj:
+        with patch.object(dpuctl_obj, 'pci_dev_path', None), \
+             patch('sonic_platform.device_data.DeviceDataManager.get_dpu_interface') as mock_int,\
+             patch.object(dpuctl_obj, 'log_error') as mock_obj:
+            mock_int.return_value = None
+            dpuctl_obj.wait_for_pci()
+            mock_obj.assert_called_once_with("Unable to wait for PCI device:Unable to obtain pci device id for dpu0 from platform.json")
+            new_pci_dev_id = "0000:05:00.0"
+            mock_int.return_value = new_pci_dev_id
+            dpuctl_obj.wait_for_pci()
+            assert dpuctl_obj.pci_dev_path.endswith(f"{new_pci_dev_id}/remove")
+            # pci dev_path is cached
+            mock_int.reset_mock()
+            mock_int.return_value = "None"
             dpuctl_obj.wait_for_pci()
-            mock_obj.assert_called_once_with("Unable to wait for PCI device")
+            mock_int.assert_not_called()
+            assert dpuctl_obj.pci_dev_path.endswith(f"{new_pci_dev_id}/remove")
 
     def test_rshim_service(self):
         dpuctl_obj = obj["dpuctl_list"][0]
@@ -430,16 +516,32 @@ def test_rshim_service(self):
             dpuctl_obj.dpu_rshim_service_control('start')
             mock_method.assert_called_once()
             cmd_string = ' '.join(mock_method.call_args.args[0])
-            cmd_string == f"systemctl start {dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('rshim')}.service"
+            service_name = rshim_interface
+            operation = "Start"
+            assert (operation in cmd_string) and (service_name in cmd_string)
             mock_method.reset_mock()
+            operation = "Stop"
             dpuctl_obj.dpu_rshim_service_control('stop')
-            cmd_string == f"systemctl stop {dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('rshim')}.service"
+            cmd_string = ' '.join(mock_method.call_args.args[0])
+            assert (operation in cmd_string) and (service_name in cmd_string)
             mock_method.assert_called_once()
             with pytest.raises(TypeError):
                 dpuctl_obj.dpu_rshim_service_control()
-            with patch.object(dpuctl_obj, 'get_hwmgmt_name', return_value="dpu5"), patch.object(dpuctl_obj, 'log_error') as mock_obj:
+            with patch.object(dpuctl_obj, 'rshim_interface', None), \
+                 patch('sonic_platform.device_data.DeviceDataManager.get_dpu_interface') as mock_int,\
+                 patch.object(dpuctl_obj, 'log_error') as mock_obj:
+                mock_int.return_value = None
+                dpuctl_obj.dpu_rshim_service_control('start')
+                mock_obj.assert_called_once_with("Failed to start rshim!: Unable to Parse rshim information for dpu0 from Platform.json")
+                mock_int.return_value = "rshim1"
+                dpuctl_obj.dpu_rshim_service_control('start')
+                assert dpuctl_obj.rshim_interface == "rshim@1"
+                mock_int.reset_mock()
+                mock_int.return_value = "rshim20"
                 dpuctl_obj.dpu_rshim_service_control('start')
-                mock_obj.assert_called_once_with("Failed to start rshim!")
+                # Rshim name is cached
+                mock_int.assert_not_called()
+                assert dpuctl_obj.rshim_interface == "rshim@1"
 
     def test_pre_and_post(self):
         dpuctl_obj = obj["dpuctl_list"][0]
@@ -447,12 +549,17 @@ def test_pre_and_post(self):
             manager_mock = Mock()
             manager_mock.attach_mock(mock_rshim, 'rshim')
             manager_mock.attach_mock(mock_write, 'write')
-            dpuctl_obj.dpu_pre_shutdown()
+            mock_rshim.return_value = True
+            mock_write.return_value = True
+            assert dpuctl_obj.dpu_pre_shutdown()
             mock_rshim.assert_called_once()
             mock_write.assert_called_once()
             # Confirm the order of calls and the parameters
             manager_mock.mock_calls[0] == call.rshim('stop')
             manager_mock.mock_calls[1] == call.rshim(dpuctl_obj.pci_dev_path, '1')
+            mock_rshim.return_value = False
+            assert not dpuctl_obj.dpu_pre_shutdown()
+            mock_rshim.return_value = True
             # Test post startup
             mock_rshim.reset_mock()
             mock_write.reset_mock()
@@ -469,6 +576,22 @@ def test_pre_and_post(self):
                 manager_mock.mock_calls[0] == call.rshim('/sys/bus/pci/rescan', '1')
                 manager_mock.mock_calls[1] == call.pci()
                 manager_mock.mock_calls[2] == call.rshim('start')
+                mock_rshim.return_value = False
+                assert not dpuctl_obj.dpu_post_startup()
+        with patch.object(dpuctl_obj, 'write_file', side_effect=Exception("Mock")), \
+             patch.object(dpuctl_obj, 'run_cmd_output', MagicMock(return_value=True)):
+            assert not dpuctl_obj.dpu_pre_shutdown()
+        with patch.object(dpuctl_obj, 'run_cmd_output', side_effect=Exception("Mock")), \
+             patch.object(dpuctl_obj, 'dpu_pci_remove', MagicMock(return_value=True)):
+            assert not dpuctl_obj.dpu_pre_shutdown()
+        with patch.object(dpuctl_obj, 'write_file', side_effect=Exception("Mock")), \
+             patch.object(dpuctl_obj, 'wait_for_pci', MagicMock(return_value=True)), \
+             patch.object(dpuctl_obj, 'run_cmd_output', MagicMock(return_value=True)):
+            assert not dpuctl_obj.dpu_post_startup()
+        with patch.object(dpuctl_obj, 'run_cmd_output', side_effect=Exception("Mock")), \
+             patch.object(dpuctl_obj, 'wait_for_pci', MagicMock(return_value=True)), \
+             patch.object(dpuctl_obj, 'dpu_pci_scan', MagicMock(return_value=True)):
+            assert not dpuctl_obj.dpu_post_startup()
 
     @classmethod
     def teardown_class(cls):

From 3a09f616762c8ec4ebee8a699a698854206a4f9c Mon Sep 17 00:00:00 2001
From: Zain Budhwani <99770260+zbud-msft@users.noreply.github.com>
Date: Wed, 4 Dec 2024 09:02:14 -0800
Subject: [PATCH 312/364] Revert "Move eventd enabled check from build time to
 runtime (#20248)" (#20947)

Reverts #20248 and fixes #20544

This reverts commit 561479ec176910d1bee740e3f52732f3f29e3263.
---
 dockers/docker-dhcp-relay/Dockerfile.j2         | 15 +++++++++------
 dockers/docker-dhcp-relay/docker_init.sh        |  3 ---
 dockers/docker-fpm-frr/Dockerfile.j2            | 13 +++++++------
 dockers/docker-fpm-frr/docker_init.sh           |  3 ---
 dockers/docker-orchagent/Dockerfile.j2          | 15 +++++++++------
 dockers/docker-orchagent/docker-init.j2         |  3 ---
 files/build_templates/docker_image_ctl.j2       |  5 -----
 files/build_templates/rsyslog_plugin.conf.j2    |  4 ++--
 files/build_templates/sonic_debian_extension.j2 | 11 ++++++-----
 9 files changed, 33 insertions(+), 39 deletions(-)

diff --git a/dockers/docker-dhcp-relay/Dockerfile.j2 b/dockers/docker-dhcp-relay/Dockerfile.j2
index e7b70a954ce2..5b0dc82c314b 100644
--- a/dockers/docker-dhcp-relay/Dockerfile.j2
+++ b/dockers/docker-dhcp-relay/Dockerfile.j2
@@ -50,11 +50,14 @@ COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
 COPY ["critical_processes", "/etc/supervisor"]
 COPY ["cli", "/cli/"]
 
-RUN mkdir -p /usr/share/sonic/templates/rsyslog_plugin
-
-# Copy rsyslog plugin configuration file and regexes to docker
-COPY ["dhcp_relay_regex.json", "/etc/rsyslog.d/"]
-COPY ["events_info.json", "/usr/share/sonic/templates/rsyslog_plugin/"]
-COPY ["files/rsyslog_plugin.conf.j2", "/usr/share/sonic/templates/rsyslog_plugin/"]
+{% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
+# Copy regex json and rsyslog_plugin.conf file into rsyslog.d
+COPY ["*.json", "/etc/rsyslog.d/"]
+COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"]
+# Create dhcp_relay_regex.conf
+RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json  > /etc/rsyslog.d/dhcp_relay_events.conf
+RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2
+RUN rm -f /etc/rsyslog.d/events_info.json
+{% endif %}
 
 ENTRYPOINT ["/usr/bin/docker_init.sh"]
diff --git a/dockers/docker-dhcp-relay/docker_init.sh b/dockers/docker-dhcp-relay/docker_init.sh
index 94e2ddff0622..1ff0e936ff68 100755
--- a/dockers/docker-dhcp-relay/docker_init.sh
+++ b/dockers/docker-dhcp-relay/docker_init.sh
@@ -21,7 +21,4 @@ chmod +x /usr/bin/wait_for_intf.sh
 # The docker container should start this script as PID 1, so now that supervisord is
 # properly configured, we exec /usr/local/bin/supervisord so that it runs as PID 1 for the
 # duration of the container's lifetime
-export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state')
-j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json  > /etc/rsyslog.d/dhcp_relay_events.conf
-
 exec /usr/local/bin/supervisord
diff --git a/dockers/docker-fpm-frr/Dockerfile.j2 b/dockers/docker-fpm-frr/Dockerfile.j2
index e39ffdadf4cc..98c4593811f7 100644
--- a/dockers/docker-fpm-frr/Dockerfile.j2
+++ b/dockers/docker-fpm-frr/Dockerfile.j2
@@ -59,11 +59,12 @@ RUN chmod a+x /usr/bin/TSA && \
     chmod a+x /usr/bin/TSC && \
     chmod a+x /usr/bin/zsocket.sh
 
-RUN mkdir -p /usr/share/sonic/templates/rsyslog_plugin
-
-# Copy rsyslog plugin configuration file and regexes to docker
-COPY ["bgp_regex.json", "/etc/rsyslog.d/"]
-COPY ["events_info.json", "/usr/share/sonic/templates/rsyslog_plugin/"]
-COPY ["files/rsyslog_plugin.conf.j2", "/usr/share/sonic/templates/rsyslog_plugin/"]
+{% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
+COPY ["*.json", "/etc/rsyslog.d/"]
+COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"]
+RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json  > /etc/rsyslog.d/bgp_events.conf
+RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2
+RUN rm -f /etc/rsyslog.d/events_info.json
+{% endif %}
 
 ENTRYPOINT ["/usr/bin/docker_init.sh"]
diff --git a/dockers/docker-fpm-frr/docker_init.sh b/dockers/docker-fpm-frr/docker_init.sh
index fbbcee8bd66c..662a78b5adcf 100755
--- a/dockers/docker-fpm-frr/docker_init.sh
+++ b/dockers/docker-fpm-frr/docker_init.sh
@@ -112,7 +112,4 @@ TZ=$(cat /etc/timezone)
 rm -rf /etc/localtime
 ln -sf /usr/share/zoneinfo/$TZ /etc/localtime
 
-export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state')
-j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json  > /etc/rsyslog.d/bgp_events.conf
-
 exec /usr/local/bin/supervisord
diff --git a/dockers/docker-orchagent/Dockerfile.j2 b/dockers/docker-orchagent/Dockerfile.j2
index b3a7e49c3254..fb90b4f09c22 100755
--- a/dockers/docker-orchagent/Dockerfile.j2
+++ b/dockers/docker-orchagent/Dockerfile.j2
@@ -80,11 +80,14 @@ RUN sonic-cfggen -a "{\"ENABLE_ASAN\":\"{{ENABLE_ASAN}}\"}" -t /usr/share/sonic/
 RUN rm -f /usr/share/sonic/templates/docker-init.j2
 RUN chmod 755 /usr/bin/docker-init.sh
 
-RUN mkdir -p /usr/share/sonic/templates/rsyslog_plugin
-
-# Copy rsyslog plugin configuration file and regexes to docker
-COPY ["swss_regex.json", "/etc/rsyslog.d/"]
-COPY ["events_info.json", "/usr/share/sonic/templates/rsyslog_plugin/"]
-COPY ["files/rsyslog_plugin.conf.j2", "/usr/share/sonic/templates/rsyslog_plugin/"]
+{% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
+# Copy all regex json files and rsyslog_plugin.conf to rsyslog.d
+COPY ["*.json", "/etc/rsyslog.d/"]
+COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"]
+# Create swss rsyslog_plugin conf file
+RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json  > /etc/rsyslog.d/swss_events.conf
+RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2
+RUN rm -f /etc/rsyslog.d/events_info.json
+{% endif %}
 
 ENTRYPOINT ["/usr/bin/docker-init.sh"]
diff --git a/dockers/docker-orchagent/docker-init.j2 b/dockers/docker-orchagent/docker-init.j2
index 143c9bd5229f..41dbe27285f1 100755
--- a/dockers/docker-orchagent/docker-init.j2
+++ b/dockers/docker-orchagent/docker-init.j2
@@ -74,7 +74,4 @@ TZ=$(cat /etc/timezone)
 rm -rf /etc/localtime
 ln -sf /usr/share/zoneinfo/$TZ /etc/localtime
 
-export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state')
-j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json  > /etc/rsyslog.d/swss_events.conf
-
 exec /usr/local/bin/supervisord
diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 4f7c31147f9a..dac3469727d9 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -336,11 +336,6 @@ function postStartAction()
             docker cp $PSENSOR pmon:/usr/bin/
         fi
     fi
-{%- elif docker_container_name == "eventd" %}
-    export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state')
-    j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json  > /etc/rsyslog.d/host_events.conf
-    j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/syncd_events_info.json  > /etc/rsyslog.d/syncd_events.conf
-    systemctl restart rsyslog
 {%- else %}
     : # nothing
 {%- endif %}
diff --git a/files/build_templates/rsyslog_plugin.conf.j2 b/files/build_templates/rsyslog_plugin.conf.j2
index f69e58cf4313..56ec0f71d3f1 100644
--- a/files/build_templates/rsyslog_plugin.conf.j2
+++ b/files/build_templates/rsyslog_plugin.conf.j2
@@ -1,6 +1,7 @@
 ## rsyslog-plugin for streaming telemetry via gnmi
 
-{% if ENVIRONMENT['EVENTD_STATE'] == "enabled" %}
+
+
 template(name="prog_msg" type="list") {
     property(name="msg")
     constant(value="\n")
@@ -15,4 +16,3 @@ if re_match($programname, "{{ proc.name }}") then {
         template="prog_msg")
 }
 {% endfor %}
-{% endif %}
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 18658ab0184f..c41d32a47ca3 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -358,16 +358,13 @@ sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-db-cli_*.deb || \
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
 
 
-{% if include_system_eventd == "y" %}
+{% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
 # Install sonic-rsyslog-plugin
 sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-rsyslog-plugin_*.deb || \
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
 
 # Generate host conf for rsyslog_plugin
-sudo mkdir -p $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin
-sudo cp $BUILD_TEMPLATES/rsyslog_plugin.conf.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin/
-sudo cp $BUILD_TEMPLATES/events_info.json $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin/
-sudo cp $BUILD_TEMPLATES/syncd_events_info.json $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin/
+j2 -f json $BUILD_TEMPLATES/rsyslog_plugin.conf.j2 $BUILD_TEMPLATES/events_info.json | sudo tee $FILESYSTEM_ROOT_ETC/rsyslog.d/host_events.conf
 sudo cp $BUILD_TEMPLATES/monit_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
 sudo cp $BUILD_TEMPLATES/sshd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
 sudo cp $BUILD_TEMPLATES/systemd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
@@ -376,7 +373,11 @@ sudo cp $BUILD_TEMPLATES/dockerd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
 sudo cp $BUILD_TEMPLATES/seu_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
 sudo cp $BUILD_TEMPLATES/zebra_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
 sudo cp $BUILD_TEMPLATES/bgpd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
+
+
+j2 -f json $BUILD_TEMPLATES/rsyslog_plugin.conf.j2 $BUILD_TEMPLATES/syncd_events_info.json | sudo tee $FILESYSTEM_ROOT_ETC/rsyslog.d/syncd_events.conf
 sudo cp $BUILD_TEMPLATES/syncd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
+
 {% endif %}
 
 # Install custom-built monit package and SONiC configuration files

From d647a88e64480798652ed667cc2874f82ee6b8d0 Mon Sep 17 00:00:00 2001
From: Volodymyr Samotiy <volodymyrs@nvidia.com>
Date: Wed, 4 Dec 2024 23:48:47 +0200
Subject: [PATCH 313/364] [Mellanox] Update SDK/FW to 4.7.2110/2014.2110
 (#21024)

Signed-off-by: Volodymyr Samotiy <volodymyrs@nvidia.com>
---
 platform/mellanox/fw.mk  | 10 +++++-----
 platform/mellanox/sdk.mk |  2 +-
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/platform/mellanox/fw.mk b/platform/mellanox/fw.mk
index 72e837b767fa..1f36ad96ef52 100644
--- a/platform/mellanox/fw.mk
+++ b/platform/mellanox/fw.mk
@@ -25,29 +25,29 @@ SIMX_VERSION = 24.10-1100
 
 FW_FROM_URL = y
 
-MLNX_FW_ASSETS_RELEASE_TAG = fw-2014.2092
+MLNX_FW_ASSETS_RELEASE_TAG = fw-2014.2110
 MLNX_FW_ASSETS_URL = $(MLNX_ASSETS_GITHUB_URL)/releases/download/$(MLNX_FW_ASSETS_RELEASE_TAG)
 
 ifeq ($(MLNX_FW_BASE_URL), )
 MLNX_FW_BASE_URL = $(MLNX_FW_ASSETS_URL)
 endif
 
-MLNX_SPC_FW_VERSION = 13.2014.2092
+MLNX_SPC_FW_VERSION = 13.2014.2110
 MLNX_SPC_FW_FILE = fw-SPC-rel-$(subst .,_,$(MLNX_SPC_FW_VERSION))-EVB.mfa
 $(MLNX_SPC_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC_FW_FILE)
 
-MLNX_SPC2_FW_VERSION = 29.2014.2092
+MLNX_SPC2_FW_VERSION = 29.2014.2110
 MLNX_SPC2_FW_FILE = fw-SPC2-rel-$(subst .,_,$(MLNX_SPC2_FW_VERSION))-EVB.mfa
 $(MLNX_SPC2_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC2_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC2_FW_FILE)
 
-MLNX_SPC3_FW_VERSION = 30.2014.2092
+MLNX_SPC3_FW_VERSION = 30.2014.2110
 MLNX_SPC3_FW_FILE = fw-SPC3-rel-$(subst .,_,$(MLNX_SPC3_FW_VERSION))-EVB.mfa
 $(MLNX_SPC3_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC3_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC3_FW_FILE)
 
-MLNX_SPC4_FW_VERSION = 34.2014.2092
+MLNX_SPC4_FW_VERSION = 34.2014.2110
 MLNX_SPC4_FW_FILE = fw-SPC4-rel-$(subst .,_,$(MLNX_SPC4_FW_VERSION))-EVB.mfa
 $(MLNX_SPC4_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC4_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC4_FW_FILE)
diff --git a/platform/mellanox/sdk.mk b/platform/mellanox/sdk.mk
index 3c9c3181a964..718d5ede3352 100644
--- a/platform/mellanox/sdk.mk
+++ b/platform/mellanox/sdk.mk
@@ -14,7 +14,7 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 #
-MLNX_SDK_VERSION = 4.7.2092
+MLNX_SDK_VERSION = 4.7.2110
 MLNX_SDK_ISSU_VERSION = 101
 
 MLNX_SDK_DRIVERS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers

From 82669227f2e2f63ac9ba7b797f59b5dc8a81a4fe Mon Sep 17 00:00:00 2001
From: Patrick MacArthur <pmacarthur@arista.com>
Date: Wed, 4 Dec 2024 16:52:19 -0500
Subject: [PATCH 314/364] [broadcom-dnx]: Install rdb-cli on syncd-dnx (#20948)

This was missed on the original PR and caused show_techsupport sonic-mgmt tests to fail.

Why I did it
PR #19268 replaced redis-rdb-tool with rdb-cli in the Broadcom XGS syncd container. However, it did not do the same for the DNX syncd container, leading to sonic-mgmt failures in show_techsupport tests on DNX platforms.

How I did it
I applied the same change to the Broadcom DNX syncd container.

How to verify it
Run sonic-mgmt show_techsupport tests on a Broadcom DNX DUT.
---
 platform/broadcom/docker-syncd-brcm-dnx.mk            | 2 +-
 platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2 | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/platform/broadcom/docker-syncd-brcm-dnx.mk b/platform/broadcom/docker-syncd-brcm-dnx.mk
index 4276e1125445..febb19c49315 100644
--- a/platform/broadcom/docker-syncd-brcm-dnx.mk
+++ b/platform/broadcom/docker-syncd-brcm-dnx.mk
@@ -24,7 +24,7 @@ endif
 
 $(DOCKER_SYNCD_DNX_BASE)_DEPENDS += $(SYNCD)
 $(DOCKER_SYNCD_DNX_BASE)_DEPENDS += $(BRCM_DNX_SAI)
-$(DOCKER_SYNCD_DNX_BASE)_FILES += $(DSSERVE) $(BCMCMD)
+$(DOCKER_SYNCD_DNX_BASE)_FILES += $(DSSERVE) $(BCMCMD) $(RDB-CLI)
 
 ifeq ($(INSTALL_DEBUG_TOOLS), y)
 $(DOCKER_SYNCD_DNX_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \
diff --git a/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2
index 160a1380140f..6bceef873d59 100755
--- a/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2
+++ b/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2
@@ -23,8 +23,8 @@ RUN apt-get install -yf kmod
 ## BRCM uses ethtool to set host interface speed
 RUN apt-get install -y ethtool
 
-COPY ["files/dsserve", "files/bcmcmd", "start.sh", "start_led.sh", "bcmsh", "/usr/bin/"]
-RUN chmod +x /usr/bin/dsserve /usr/bin/bcmcmd
+COPY ["files/dsserve", "files/bcmcmd", "start.sh", "start_led.sh", "bcmsh", "files/rdb-cli", "/usr/bin/"]
+RUN chmod +x /usr/bin/dsserve /usr/bin/bcmcmd /usr/bin/rdb-cli
 
 COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
 COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]

From 8df0930ad771a0a307f802238e9f86d8e445be31 Mon Sep 17 00:00:00 2001
From: "Marty Y. Lok" <76118573+mlok-nokia@users.noreply.github.com>
Date: Wed, 4 Dec 2024 17:23:35 -0500
Subject: [PATCH 315/364] [Nokia]{asic-sensors] Modify the platform.json to
 enable the asic_sensors polling on Nokia Platforms (#20979)

Enable and use the asic_sensors polling on the Nokia platforms:
arm64-nokia_ixs7215_52xb-r0
x86_64-nokia_ixr7220_h4-r0
x86_64-nokia_ixr7220_h4_32d-r0
x86_64-nokia_ixr7220_h5_64d-r0
Fixes Nokia-ION/ndk#36

Signed-off-by: mlok <marty.lok@nokia.com>
---
 device/nokia/arm64-nokia_ixs7215_52xb-r0/platform.json     | 6 +++++-
 device/nokia/x86_64-nokia_ixr7220_h4-r0/platform.json      | 6 +++++-
 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform.json  | 7 ++++++-
 device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform.json  | 6 +++++-
 .../nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform.json   | 6 +++++-
 5 files changed, 26 insertions(+), 5 deletions(-)

diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform.json b/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform.json
index 89a7a3e9ddf8..16e104341cdf 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform.json
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform.json
@@ -275,5 +275,9 @@
             }
        	]
     },
-    "interfaces": {}
+    "interfaces": {},
+    "asic_sensors": {
+        "poll_interval": "10",
+        "poll_admin_status": "enable"
+    }
 }
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform.json b/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform.json
index 29e11388382c..4c0acf7eb890 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform.json
+++ b/device/nokia/x86_64-nokia_ixr7220_h4-r0/platform.json
@@ -495,5 +495,9 @@
             }
        	]
     },
-    "interfaces": {}
+    "interfaces": {},
+    "asic_sensors": {
+        "poll_interval": "10",
+        "poll_admin_status": "enable"
+    }
 }
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform.json b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform.json
index b40c5fe9498d..99562f3deb5a 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform.json
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform.json
@@ -447,5 +447,10 @@
             }
        	]
     },
-    "interfaces": {}
+    "interfaces": {},
+
+    "asic_sensors": {
+        "poll_interval": "10",
+        "poll_admin_status": "enable"
+    }
 }
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform.json b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform.json
index 63f55d3eb01a..b330c66ff380 100644
--- a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform.json
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform.json
@@ -460,5 +460,9 @@
             }
        	]
     },
-    "interfaces": {}
+    "interfaces": {},
+    "asic_sensors": {
+        "poll_interval": "10",
+        "poll_admin_status": "enable"
+    }
 }
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform.json b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform.json
index ab881c4ccfdd..4d34218672e9 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform.json
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform.json
@@ -275,5 +275,9 @@
             }
         ]
     },
-    "interfaces": {}
+    "interfaces": {},
+    "asic_sensors": {
+        "poll_interval": "10",
+        "poll_admin_status": "enable"
+    }
 }

From 1eb11a554d61485f0a38d22bd17959bf1f54941d Mon Sep 17 00:00:00 2001
From: Stepan Blyshchak <38952541+stepanblyschak@users.noreply.github.com>
Date: Thu, 5 Dec 2024 01:41:54 +0200
Subject: [PATCH 316/364] [FC] remove FC delay status field (#20495)

Related to sonic-net/sonic-swss#3326.

Why I did it
Simplify approach to delaying counters on warm boot and fast boot. Removed FLEX_COUNTER_DELAY_STATUS_FIELD and instead postpone all FC processing to happen after apply view to not delay data plane configuration.

The CONFIG_DB should not be updated in runtime anymore for counters to be delayed.

To address #20302.

Work item tracking
Microsoft ADO (number only):
How I did it
Removed FLEX_COUNTER_DELAY_STATUS_FIELD set in enable_counters.py.

How to verify it
Run warm-boot - make sure FC orch runs only after APPLY_VIEW.
---
 dockers/docker-orchagent/enable_counters.py                    | 3 ---
 files/build_templates/init_cfg.json.j2                         | 1 -
 src/sonic-config-engine/config_samples.py                      | 2 --
 src/sonic-config-engine/data/l1intf.j2                         | 2 --
 src/sonic-config-engine/data/l2switch.j2                       | 1 -
 src/sonic-config-engine/data/l3intf.j2                         | 1 -
 src/sonic-config-engine/tests/data/rsyslog/config_db.json      | 2 --
 src/sonic-config-engine/tests/sample_output/py2/l1_intfs.json  | 1 -
 src/sonic-config-engine/tests/sample_output/py2/l2switch.json  | 1 -
 .../tests/sample_output/py2/l2switch_dualtor.json              | 1 -
 src/sonic-config-engine/tests/sample_output/py2/l3_intfs.json  | 1 -
 src/sonic-config-engine/tests/sample_output/py3/l1_intfs.json  | 1 -
 src/sonic-config-engine/tests/sample_output/py3/l2switch.json  | 1 -
 .../tests/sample_output/py3/l2switch_dualtor.json              | 1 -
 src/sonic-config-engine/tests/sample_output/py3/l3_intfs.json  | 1 -
 .../tests/sample_output/t1-smartswitch-dpu.json                | 1 -
 .../tests/sample_output/t1-smartswitch.json                    | 1 -
 17 files changed, 22 deletions(-)

diff --git a/dockers/docker-orchagent/enable_counters.py b/dockers/docker-orchagent/enable_counters.py
index 5867787e0aa7..9569284bc74a 100755
--- a/dockers/docker-orchagent/enable_counters.py
+++ b/dockers/docker-orchagent/enable_counters.py
@@ -18,9 +18,6 @@ def enable_counter_group(db, name):
         info = {}
         info['FLEX_COUNTER_STATUS'] = 'enable'
         db.mod_entry("FLEX_COUNTER_TABLE", name, info)
-    else:
-        entry_info.update({"FLEX_COUNTER_DELAY_STATUS":"false"})
-        db.mod_entry("FLEX_COUNTER_TABLE", name, entry_info)
 
 def enable_rates():
     # set the default interval for rates
diff --git a/files/build_templates/init_cfg.json.j2 b/files/build_templates/init_cfg.json.j2
index 622087a5521d..1d1c1817b49d 100644
--- a/files/build_templates/init_cfg.json.j2
+++ b/files/build_templates/init_cfg.json.j2
@@ -24,7 +24,6 @@
     "FLEX_COUNTER_TABLE": {
         "ACL": {
             "FLEX_COUNTER_STATUS": "enable",
-            "FLEX_COUNTER_DELAY_STATUS": "true",
             "POLL_INTERVAL": "10000"
         },
         "PORT": {
diff --git a/src/sonic-config-engine/config_samples.py b/src/sonic-config-engine/config_samples.py
index d72925c843c0..353e28e94ace 100644
--- a/src/sonic-config-engine/config_samples.py
+++ b/src/sonic-config-engine/config_samples.py
@@ -16,7 +16,6 @@ def generate_common_config(data):
     data['FLEX_COUNTER_TABLE'] = {
         'ACL': {
             'FLEX_COUNTER_STATUS': 'disable',
-            'FLEX_COUNTER_DELAY_STATUS': 'true',
             'POLL_INTERVAL': '10000'
         }
     }
@@ -270,4 +269,3 @@ def get_available_config():
 def generate_sample_config(data, setting_name):
     data = generate_common_config(data)
     return _sample_generators[setting_name.lower()](data)
-
diff --git a/src/sonic-config-engine/data/l1intf.j2 b/src/sonic-config-engine/data/l1intf.j2
index 68ffc3ee4ece..b2f218ea82cb 100644
--- a/src/sonic-config-engine/data/l1intf.j2
+++ b/src/sonic-config-engine/data/l1intf.j2
@@ -7,7 +7,6 @@
     "FLEX_COUNTER_TABLE": {
         "ACL": {
             "FLEX_COUNTER_STATUS": "disable",
-            "FLEX_COUNTER_DELAY_STATUS": "true",
             "POLL_INTERVAL": "10000"
         }
     },
@@ -30,4 +29,3 @@
 
     }
 }
-
diff --git a/src/sonic-config-engine/data/l2switch.j2 b/src/sonic-config-engine/data/l2switch.j2
index 37c343867a10..359525763f71 100644
--- a/src/sonic-config-engine/data/l2switch.j2
+++ b/src/sonic-config-engine/data/l2switch.j2
@@ -3,7 +3,6 @@
     "FLEX_COUNTER_TABLE": {
         "ACL": {
             "FLEX_COUNTER_STATUS": "disable",
-            "FLEX_COUNTER_DELAY_STATUS": "true",
             "POLL_INTERVAL": "10000"
         }
     },
diff --git a/src/sonic-config-engine/data/l3intf.j2 b/src/sonic-config-engine/data/l3intf.j2
index 45fba9f692ef..06cc720bc1b4 100644
--- a/src/sonic-config-engine/data/l3intf.j2
+++ b/src/sonic-config-engine/data/l3intf.j2
@@ -7,7 +7,6 @@
     "FLEX_COUNTER_TABLE": {
         "ACL": {
             "FLEX_COUNTER_STATUS": "disable",
-            "FLEX_COUNTER_DELAY_STATUS": "true",
             "POLL_INTERVAL": "10000"
         }
     },
diff --git a/src/sonic-config-engine/tests/data/rsyslog/config_db.json b/src/sonic-config-engine/tests/data/rsyslog/config_db.json
index 7cc58a131576..ede8d7f6600a 100644
--- a/src/sonic-config-engine/tests/data/rsyslog/config_db.json
+++ b/src/sonic-config-engine/tests/data/rsyslog/config_db.json
@@ -393,7 +393,6 @@
     },
     "FLEX_COUNTER_TABLE": {
         "ACL": {
-            "FLEX_COUNTER_DELAY_STATUS": "false",
             "FLEX_COUNTER_STATUS": "enable",
             "POLL_INTERVAL": "10000"
         }
@@ -911,4 +910,3 @@
         }
     }
 }
-
diff --git a/src/sonic-config-engine/tests/sample_output/py2/l1_intfs.json b/src/sonic-config-engine/tests/sample_output/py2/l1_intfs.json
index 634b936fede0..b789c792069b 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/l1_intfs.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/l1_intfs.json
@@ -261,7 +261,6 @@
     "FLEX_COUNTER_TABLE": {
         "ACL": {
             "FLEX_COUNTER_STATUS": "disable",
-            "FLEX_COUNTER_DELAY_STATUS": "true",
             "POLL_INTERVAL": "10000"
         }
     }
diff --git a/src/sonic-config-engine/tests/sample_output/py2/l2switch.json b/src/sonic-config-engine/tests/sample_output/py2/l2switch.json
index 5c38ba7201fd..de774b0ae58d 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/l2switch.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/l2switch.json
@@ -268,7 +268,6 @@
     "FLEX_COUNTER_TABLE": {
         "ACL": {
             "FLEX_COUNTER_STATUS": "disable",
-            "FLEX_COUNTER_DELAY_STATUS": "true",
             "POLL_INTERVAL": "10000"
         }
     }
diff --git a/src/sonic-config-engine/tests/sample_output/py2/l2switch_dualtor.json b/src/sonic-config-engine/tests/sample_output/py2/l2switch_dualtor.json
index 606a30672d9e..f09874d6e645 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/l2switch_dualtor.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/l2switch_dualtor.json
@@ -647,7 +647,6 @@
     "FLEX_COUNTER_TABLE": {
         "ACL": {
             "FLEX_COUNTER_STATUS": "disable",
-            "FLEX_COUNTER_DELAY_STATUS": "true",
             "POLL_INTERVAL": "10000"
         }
     }
diff --git a/src/sonic-config-engine/tests/sample_output/py2/l3_intfs.json b/src/sonic-config-engine/tests/sample_output/py2/l3_intfs.json
index 7357c28fbef1..81dd3afeab33 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/l3_intfs.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/l3_intfs.json
@@ -301,7 +301,6 @@
     "FLEX_COUNTER_TABLE": {
         "ACL": {
             "FLEX_COUNTER_STATUS": "disable",
-            "FLEX_COUNTER_DELAY_STATUS": "true",
             "POLL_INTERVAL": "10000"
         }
     }
diff --git a/src/sonic-config-engine/tests/sample_output/py3/l1_intfs.json b/src/sonic-config-engine/tests/sample_output/py3/l1_intfs.json
index 634b936fede0..b789c792069b 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/l1_intfs.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/l1_intfs.json
@@ -261,7 +261,6 @@
     "FLEX_COUNTER_TABLE": {
         "ACL": {
             "FLEX_COUNTER_STATUS": "disable",
-            "FLEX_COUNTER_DELAY_STATUS": "true",
             "POLL_INTERVAL": "10000"
         }
     }
diff --git a/src/sonic-config-engine/tests/sample_output/py3/l2switch.json b/src/sonic-config-engine/tests/sample_output/py3/l2switch.json
index fa3363ab749c..0ed50c624b25 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/l2switch.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/l2switch.json
@@ -268,7 +268,6 @@
     "FLEX_COUNTER_TABLE": {
         "ACL": {
             "FLEX_COUNTER_STATUS": "disable",
-            "FLEX_COUNTER_DELAY_STATUS": "true",
             "POLL_INTERVAL": "10000"
         }
     }
diff --git a/src/sonic-config-engine/tests/sample_output/py3/l2switch_dualtor.json b/src/sonic-config-engine/tests/sample_output/py3/l2switch_dualtor.json
index 606a30672d9e..f09874d6e645 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/l2switch_dualtor.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/l2switch_dualtor.json
@@ -647,7 +647,6 @@
     "FLEX_COUNTER_TABLE": {
         "ACL": {
             "FLEX_COUNTER_STATUS": "disable",
-            "FLEX_COUNTER_DELAY_STATUS": "true",
             "POLL_INTERVAL": "10000"
         }
     }
diff --git a/src/sonic-config-engine/tests/sample_output/py3/l3_intfs.json b/src/sonic-config-engine/tests/sample_output/py3/l3_intfs.json
index 7357c28fbef1..81dd3afeab33 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/l3_intfs.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/l3_intfs.json
@@ -301,7 +301,6 @@
     "FLEX_COUNTER_TABLE": {
         "ACL": {
             "FLEX_COUNTER_STATUS": "disable",
-            "FLEX_COUNTER_DELAY_STATUS": "true",
             "POLL_INTERVAL": "10000"
         }
     }
diff --git a/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json b/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json
index 9421f40c3493..400d36127a7a 100644
--- a/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json
+++ b/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json
@@ -20,7 +20,6 @@
     "FLEX_COUNTER_TABLE": {
         "ACL": {
             "FLEX_COUNTER_STATUS": "disable",
-            "FLEX_COUNTER_DELAY_STATUS": "true",
             "POLL_INTERVAL": "10000"
         }
     },
diff --git a/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json b/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json
index fc305243fb0e..c6232d7f8be0 100644
--- a/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json
+++ b/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json
@@ -374,7 +374,6 @@
 	},
 	"FLEX_COUNTER_TABLE": {
 		"ACL": {
-			"FLEX_COUNTER_DELAY_STATUS": "true",
 			"FLEX_COUNTER_STATUS": "disable",
 			"POLL_INTERVAL": "10000"
 		}

From 214fa2e91d468ebbfc96a71450df9be9b742de54 Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Wed, 4 Dec 2024 16:59:41 -0800
Subject: [PATCH 317/364] [database]: Add `--protected-mode no` flag to
 redis-chassis (#21010)

Redis-chassis doesn't bind to the localhost address intentionally.
Because of this, Redis blocks TCP connections that are connecting to
non-loopback interface addresses when there's no password set (which is
the case for us) unless `--protected-mode no` is set. This has already
been done for docker-database, but now needs to be done for
docker-sonic-vs following the upgrade to Bookworm.

Therefore, in the supervisord.conf file, add `--protected-mode no` to
the arguments passed in for redis-chassis.

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 platform/vs/docker-sonic-vs/supervisord.conf.j2 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/vs/docker-sonic-vs/supervisord.conf.j2 b/platform/vs/docker-sonic-vs/supervisord.conf.j2
index d389f28311cf..019f95c6060d 100644
--- a/platform/vs/docker-sonic-vs/supervisord.conf.j2
+++ b/platform/vs/docker-sonic-vs/supervisord.conf.j2
@@ -29,7 +29,7 @@ stdout_logfile=syslog
 stderr_logfile=syslog
 
 [program:redis-chassis]
-command=/bin/bash -c "{ [[ -s /var/lib/redis_chassis/dump.rdb ]] || rm -f /var/lib/redis_chassis/dump.rdb; } && mkdir -p /var/lib/redis_chassis && exec /usr/bin/redis-server /etc/redis/redis.conf --bind redis_chassis.server --port 6380 --unixsocket /var/run/redis/redis_chassis.sock --pidfile /var/run/redis/redis_chassis.pid --dir /var/lib/redis_chassis"
+command=/bin/bash -c "{ [[ -s /var/lib/redis_chassis/dump.rdb ]] || rm -f /var/lib/redis_chassis/dump.rdb; } && mkdir -p /var/lib/redis_chassis && exec /usr/bin/redis-server /etc/redis/redis.conf --bind redis_chassis.server --port 6380 --protected-mode no --unixsocket /var/run/redis/redis_chassis.sock --pidfile /var/run/redis/redis_chassis.pid --dir /var/lib/redis_chassis"
 priority=3
 autostart=false
 autorestart=false

From 368ace2a190e2a67283556effb7e3e681881dea7 Mon Sep 17 00:00:00 2001
From: vincentpcng <129542523+vincentpcng@users.noreply.github.com>
Date: Wed, 4 Dec 2024 18:44:24 -0800
Subject: [PATCH 318/364] Platform DCS-7060DX5-64S misc update (#20323)

Why I did it
This is to add the HWSKU DCS-7060DX5-64S misc update. This is a must have for the platform support. This should get into the master branch as soon as possible and back port to the needed releases.

Work item tracking
Microsoft ADO (number only):
How I did it
Adding additional media, port config settings etc needed for the HWSKU.
This is an updated version of an older PR #19109 for 202305 which is closed. This PR should replace the older PR#19109 and should be cast to all active releases. This PR has the latest chip configuration base on Arista lab setting and the most up to date SI setting for optical transceivers.

How to verify it
We have verified it in house using the sonic mgmt test.
In additional, we have verify all the SI value which match our HW database for optical deployment.
This changes has been verified in Arista lab with 202305 , 202311, 202405 releases.
---
 ...th4-a7060dx5-32-200Gx48-100Gx32.config.bcm |    1 +
 ...7060dx5-32-25Gx96-100Gx8-200Gx8.config.bcm |    1 +
 .../th4-a7060dx5-32.config.bcm                |    1 +
 .../Arista-7060DX5-64S/blackhawk.xml          |  380 +-
 .../Arista-7060DX5-64S/media_settings.json    | 4790 +++++++++++++++++
 .../Arista-7060DX5-64S/port_config.ini        |  130 +-
 .../th4-a7060dx5-64s.config.bcm               |    1 +
 .../x86_64-arista_7060dx5_64s/platform.json   |  195 +-
 .../platform_components.json                  |   12 +
 .../Arista-7060PX5-64S/gearbox_config.json    |   16 +-
 10 files changed, 5359 insertions(+), 168 deletions(-)
 mode change 120000 => 100644 device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml
 create mode 100644 device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/media_settings.json
 create mode 100644 device/arista/x86_64-arista_7060dx5_64s/platform_components.json

diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-200Gx48-100Gx32/th4-a7060dx5-32-200Gx48-100Gx32.config.bcm b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-200Gx48-100Gx32/th4-a7060dx5-32-200Gx48-100Gx32.config.bcm
index ae51822fc619..027509541e29 100644
--- a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-200Gx48-100Gx32/th4-a7060dx5-32-200Gx48-100Gx32.config.bcm
+++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-200Gx48-100Gx32/th4-a7060dx5-32-200Gx48-100Gx32.config.bcm
@@ -19,6 +19,7 @@ bcm_device:
     0:
         global:
             pktio_mode: 1
+            default_cpu_tx_queue: 7
             vlan_flooding_l2mc_num_reserved: 0
             ipv6_lpm_128b_enable: 1
             shared_block_mask_section: uc_bc
diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/th4-a7060dx5-32-25Gx96-100Gx8-200Gx8.config.bcm b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/th4-a7060dx5-32-25Gx96-100Gx8-200Gx8.config.bcm
index b1f524185899..a196ad2a2bc0 100644
--- a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/th4-a7060dx5-32-25Gx96-100Gx8-200Gx8.config.bcm
+++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/th4-a7060dx5-32-25Gx96-100Gx8-200Gx8.config.bcm
@@ -23,6 +23,7 @@ bcm_device:
     0:
         global:
             pktio_mode: 1
+            default_cpu_tx_queue: 7
             vlan_flooding_l2mc_num_reserved: 0
             ipv6_lpm_128b_enable: 1
             shared_block_mask_section: uc_bc
diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/th4-a7060dx5-32.config.bcm b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/th4-a7060dx5-32.config.bcm
index 65b289963d79..f4f77baf443a 100644
--- a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/th4-a7060dx5-32.config.bcm
+++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/th4-a7060dx5-32.config.bcm
@@ -23,6 +23,7 @@ bcm_device:
     0:
         global:
             pktio_mode: 1
+            default_cpu_tx_queue: 7
             vlan_flooding_l2mc_num_reserved: 0
             ipv6_lpm_128b_enable: 1
             shared_block_mask_section: uc_bc
diff --git a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml
deleted file mode 120000
index d8e2cb69d236..000000000000
--- a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml
+++ /dev/null
@@ -1 +0,0 @@
-../../x86_64-arista_7060px5_64s/Arista-7060PX5-64S/blackhawk.xml
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml
new file mode 100644
index 000000000000..11bfbc5b6811
--- /dev/null
+++ b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml
@@ -0,0 +1,379 @@
+<?xml version="1.0"?>
+<root version="2">
+    <name>CSDK-BH</name>
+    <mode>retimer</mode>
+    <phy context_id="1">
+        <phy_addr>0</phy_addr>
+        <topology>1</topology>
+
+        <PAM4>
+            <lane id="0" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="1" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="2" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="3" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="4" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="5" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="6" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="7" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="8" tx-taps="0, 0, -5, 111, -10, -1, 0" />
+            <lane id="9" tx-taps="0, 0, -5, 111, -10, -1, 0" />
+            <lane id="10" tx-taps="0, 0, -5, 111, -10, -1, 0" />
+            <lane id="11" tx-taps="0, 0, -5, 111, -10, -1, 0" />
+            <lane id="12" tx-taps="0, 0, -5, 111, -10, -1, 0" />
+            <lane id="13" tx-taps="0, 0, -5, 111, -10, -1, 0" />
+            <lane id="14" tx-taps="0, 0, -5, 111, -10, -1, 0" />
+            <lane id="15" tx-taps="0, 0, -5, 111, -10, -1, 0" />
+        </PAM4>
+
+        <lane id="0" tx-polarity="0" rx-polarity="0" />
+        <lane id="1" tx-polarity="0" rx-polarity="0" />
+        <lane id="2" tx-polarity="0" rx-polarity="0" />
+        <lane id="3" tx-polarity="0" rx-polarity="0" />
+        <lane id="4" tx-polarity="0" rx-polarity="0" />
+        <lane id="5" tx-polarity="0" rx-polarity="0" />
+        <lane id="6" tx-polarity="0" rx-polarity="0" />
+        <lane id="7" tx-polarity="0" rx-polarity="0" />
+        <lane id="8" tx-polarity="0" rx-polarity="0" />
+        <lane id="9" tx-polarity="0" rx-polarity="0" />
+        <lane id="10" tx-polarity="0" rx-polarity="0" />
+        <lane id="11" tx-polarity="0" rx-polarity="0" />
+        <lane id="12" tx-polarity="0" rx-polarity="0" />
+        <lane id="13" tx-polarity="0" rx-polarity="0" />
+        <lane id="14" tx-polarity="0" rx-polarity="0" />
+        <lane id="15" tx-polarity="0" rx-polarity="0" />
+
+        <port-connector>
+            <macsec-mode>bypass</macsec-mode>
+            <system-side lane-number="0,1,2,3,4,5,6,7" speed="400000" fec="rs544" />
+            <line-side lane-number="8,9,10,11,12,13,14,15" speed="400000" fec="rs544" />
+        </port-connector>
+    </phy>
+
+    <phy context_id="2">
+        <phy_addr>1</phy_addr>
+        <topology>1</topology>
+        <PAM4>
+            <lane id="0" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="1" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="2" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="3" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="4" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="5" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="6" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="7" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="8" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="9" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="10" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="11" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="12" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="13" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="14" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="15" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+        </PAM4>
+
+        <lane id="0" tx-polarity="0" rx-polarity="0" />
+        <lane id="1" tx-polarity="0" rx-polarity="0" />
+        <lane id="2" tx-polarity="0" rx-polarity="0" />
+        <lane id="3" tx-polarity="0" rx-polarity="0" />
+        <lane id="4" tx-polarity="0" rx-polarity="0" />
+        <lane id="5" tx-polarity="0" rx-polarity="0" />
+        <lane id="6" tx-polarity="0" rx-polarity="0" />
+        <lane id="7" tx-polarity="0" rx-polarity="0" />
+        <lane id="8" tx-polarity="0" rx-polarity="0" />
+        <lane id="9" tx-polarity="0" rx-polarity="0" />
+        <lane id="10" tx-polarity="0" rx-polarity="0" />
+        <lane id="11" tx-polarity="0" rx-polarity="0" />
+        <lane id="12" tx-polarity="0" rx-polarity="0" />
+        <lane id="13" tx-polarity="0" rx-polarity="0" />
+        <lane id="14" tx-polarity="0" rx-polarity="0" />
+        <lane id="15" tx-polarity="0" rx-polarity="0" />
+
+        <port-connector>
+            <macsec-mode>bypass</macsec-mode>
+            <system-side lane-number="0,1,2,3,4,5,6,7" speed="400000" fec="rs544" />
+            <line-side lane-number="8,9,10,11,12,13,14,15" speed="400000" fec="rs544" />
+        </port-connector>
+    </phy>
+
+    <phy context_id="3">
+        <phy_addr>2</phy_addr>
+        <topology>1</topology>
+
+        <PAM4>
+            <lane id="0" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="1" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="2" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="3" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="4" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="5" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="6" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="7" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="8" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="9" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="10" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="11" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="12" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="13" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="14" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="15" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+        </PAM4>
+
+        <lane id="0" tx-polarity="0" rx-polarity="0" />
+        <lane id="1" tx-polarity="0" rx-polarity="0" />
+        <lane id="2" tx-polarity="0" rx-polarity="0" />
+        <lane id="3" tx-polarity="0" rx-polarity="0" />
+        <lane id="4" tx-polarity="0" rx-polarity="0" />
+        <lane id="5" tx-polarity="0" rx-polarity="0" />
+        <lane id="6" tx-polarity="0" rx-polarity="0" />
+        <lane id="7" tx-polarity="0" rx-polarity="0" />
+        <lane id="8" tx-polarity="0" rx-polarity="0" />
+        <lane id="9" tx-polarity="0" rx-polarity="0" />
+        <lane id="10" tx-polarity="0" rx-polarity="0" />
+        <lane id="11" tx-polarity="0" rx-polarity="0" />
+        <lane id="12" tx-polarity="0" rx-polarity="0" />
+        <lane id="13" tx-polarity="0" rx-polarity="0" />
+        <lane id="14" tx-polarity="0" rx-polarity="0" />
+        <lane id="15" tx-polarity="0" rx-polarity="0" />
+
+        <port-connector>
+            <macsec-mode>bypass</macsec-mode>
+            <system-side lane-number="0,1,2,3,4,5,6,7" speed="400000" fec="rs544" />
+            <line-side lane-number="8,9,10,11,12,13,14,15" speed="400000" fec="rs544" />
+        </port-connector>
+    </phy>
+
+    <phy context_id="4">
+        <phy_addr>3</phy_addr>
+        <topology>1</topology>
+
+        <PAM4>
+            <lane id="0" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="1" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="2" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="3" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="4" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="5" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="6" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="7" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="8" tx-taps="0, 0, -6, 121, 0, 0, 0" />
+            <lane id="9" tx-taps="0, 0, -6, 121, 0, 0, 0" />
+            <lane id="10" tx-taps="0, 0, -6, 121, 0, 0, 0" />
+            <lane id="11" tx-taps="0, 0, -6, 121, 0, 0, 0" />
+            <lane id="12" tx-taps="0, 0, -6, 121, 0, 0, 0" />
+            <lane id="13" tx-taps="0, 0, -6, 121, 0, 0, 0" />
+            <lane id="14" tx-taps="0, 0, -6, 121, 0, 0, 0" />
+            <lane id="15" tx-taps="0, 0, -6, 121, 0, 0, 0" />
+        </PAM4>
+
+        <lane id="0" tx-polarity="0" rx-polarity="0" />
+        <lane id="1" tx-polarity="0" rx-polarity="0" />
+        <lane id="2" tx-polarity="0" rx-polarity="0" />
+        <lane id="3" tx-polarity="0" rx-polarity="0" />
+        <lane id="4" tx-polarity="0" rx-polarity="0" />
+        <lane id="5" tx-polarity="0" rx-polarity="0" />
+        <lane id="6" tx-polarity="0" rx-polarity="0" />
+        <lane id="7" tx-polarity="0" rx-polarity="0" />
+        <lane id="8" tx-polarity="0" rx-polarity="0" />
+        <lane id="9" tx-polarity="0" rx-polarity="0" />
+        <lane id="10" tx-polarity="0" rx-polarity="0" />
+        <lane id="11" tx-polarity="0" rx-polarity="0" />
+        <lane id="12" tx-polarity="0" rx-polarity="0" />
+        <lane id="13" tx-polarity="0" rx-polarity="0" />
+        <lane id="14" tx-polarity="0" rx-polarity="0" />
+        <lane id="15" tx-polarity="0" rx-polarity="0" />
+
+        <port-connector>
+            <macsec-mode>bypass</macsec-mode>
+            <system-side lane-number="0,1,2,3,4,5,6,7" speed="400000" fec="rs544" />
+            <line-side lane-number="8,9,10,11,12,13,14,15" speed="400000" fec="rs544" />
+        </port-connector>
+    </phy>
+
+    <phy context_id="5">
+        <phy_addr>4</phy_addr>
+        <topology>1</topology>
+
+        <PAM4>
+            <lane id="0" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="1" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="2" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="3" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="4" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="5" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="6" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="7" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="8" tx-taps="0, 0, -5, 111, -10, -1, 0" />
+            <lane id="9" tx-taps="0, 0, -5, 111, -10, -1, 0" />
+            <lane id="10" tx-taps="0, 0, -5, 111, -10, -1, 0" />
+            <lane id="11" tx-taps="0, 0, -5, 111, -10, -1, 0" />
+            <lane id="12" tx-taps="0, 0, -5, 111, -10, -1, 0" />
+            <lane id="13" tx-taps="0, 0, -5, 111, -10, -1, 0" />
+            <lane id="14" tx-taps="0, 0, -5, 111, -10, -1, 0" />
+            <lane id="15" tx-taps="0, 0, -5, 111, -10, -1, 0" />
+        </PAM4>
+
+        <lane id="0" tx-polarity="0" rx-polarity="0" />
+        <lane id="1" tx-polarity="0" rx-polarity="0" />
+        <lane id="2" tx-polarity="0" rx-polarity="0" />
+        <lane id="3" tx-polarity="0" rx-polarity="0" />
+        <lane id="4" tx-polarity="0" rx-polarity="0" />
+        <lane id="5" tx-polarity="0" rx-polarity="0" />
+        <lane id="6" tx-polarity="0" rx-polarity="0" />
+        <lane id="7" tx-polarity="0" rx-polarity="0" />
+        <lane id="8" tx-polarity="0" rx-polarity="0" />
+        <lane id="9" tx-polarity="0" rx-polarity="0" />
+        <lane id="10" tx-polarity="0" rx-polarity="0" />
+        <lane id="11" tx-polarity="0" rx-polarity="0" />
+        <lane id="12" tx-polarity="0" rx-polarity="0" />
+        <lane id="13" tx-polarity="0" rx-polarity="0" />
+        <lane id="14" tx-polarity="0" rx-polarity="0" />
+        <lane id="15" tx-polarity="0" rx-polarity="0" />
+
+        <port-connector>
+            <macsec-mode>bypass</macsec-mode>
+            <system-side lane-number="0,1,2,3,4,5,6,7" speed="400000" fec="rs544" />
+            <line-side lane-number="8,9,10,11,12,13,14,15" speed="400000" fec="rs544" />
+        </port-connector>
+    </phy>
+
+    <phy context_id="6">
+        <phy_addr>5</phy_addr>
+        <topology>1</topology>
+        <PAM4>
+            <lane id="0" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="1" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="2" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="3" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="4" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="5" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="6" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="7" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="8" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="9" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="10" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="11" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="12" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="13" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="14" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="15" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+        </PAM4>
+
+        <lane id="0" tx-polarity="0" rx-polarity="0" />
+        <lane id="1" tx-polarity="0" rx-polarity="0" />
+        <lane id="2" tx-polarity="0" rx-polarity="0" />
+        <lane id="3" tx-polarity="0" rx-polarity="0" />
+        <lane id="4" tx-polarity="0" rx-polarity="0" />
+        <lane id="5" tx-polarity="0" rx-polarity="0" />
+        <lane id="6" tx-polarity="0" rx-polarity="0" />
+        <lane id="7" tx-polarity="0" rx-polarity="0" />
+        <lane id="8" tx-polarity="0" rx-polarity="0" />
+        <lane id="9" tx-polarity="0" rx-polarity="0" />
+        <lane id="10" tx-polarity="0" rx-polarity="0" />
+        <lane id="11" tx-polarity="0" rx-polarity="0" />
+        <lane id="12" tx-polarity="0" rx-polarity="0" />
+        <lane id="13" tx-polarity="0" rx-polarity="0" />
+        <lane id="14" tx-polarity="0" rx-polarity="0" />
+        <lane id="15" tx-polarity="0" rx-polarity="0" />
+
+        <port-connector>
+            <macsec-mode>bypass</macsec-mode>
+            <system-side lane-number="0,1,2,3,4,5,6,7" speed="400000" fec="rs544" />
+            <line-side lane-number="8,9,10,11,12,13,14,15" speed="400000" fec="rs544" />
+        </port-connector>
+    </phy>
+
+    <phy context_id="7">
+        <phy_addr>6</phy_addr>
+        <topology>1</topology>
+
+        <PAM4>
+            <lane id="0" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="1" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="2" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="3" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="4" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="5" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="6" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="7" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="8" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="9" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="10" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="11" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="12" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="13" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="14" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+            <lane id="15" tx-taps="0, 0, -6, 112, -8, -1, 0" />
+        </PAM4>
+
+        <lane id="0" tx-polarity="0" rx-polarity="0" />
+        <lane id="1" tx-polarity="0" rx-polarity="0" />
+        <lane id="2" tx-polarity="0" rx-polarity="0" />
+        <lane id="3" tx-polarity="0" rx-polarity="0" />
+        <lane id="4" tx-polarity="0" rx-polarity="0" />
+        <lane id="5" tx-polarity="0" rx-polarity="0" />
+        <lane id="6" tx-polarity="0" rx-polarity="0" />
+        <lane id="7" tx-polarity="0" rx-polarity="0" />
+        <lane id="8" tx-polarity="0" rx-polarity="0" />
+        <lane id="9" tx-polarity="0" rx-polarity="0" />
+        <lane id="10" tx-polarity="0" rx-polarity="0" />
+        <lane id="11" tx-polarity="0" rx-polarity="0" />
+        <lane id="12" tx-polarity="0" rx-polarity="0" />
+        <lane id="13" tx-polarity="0" rx-polarity="0" />
+        <lane id="14" tx-polarity="0" rx-polarity="0" />
+        <lane id="15" tx-polarity="0" rx-polarity="0" />
+
+        <port-connector>
+            <macsec-mode>bypass</macsec-mode>
+            <system-side lane-number="0,1,2,3,4,5,6,7" speed="400000" fec="rs544" />
+            <line-side lane-number="8,9,10,11,12,13,14,15" speed="400000" fec="rs544" />
+        </port-connector>
+    </phy>
+
+    <phy context_id="8">
+        <phy_addr>7</phy_addr>
+        <topology>1</topology>
+
+        <PAM4>
+            <lane id="0" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="1" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="2" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="3" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="4" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="5" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="6" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="7" tx-taps="0, 0, -12, 80, 0, 0, 0" />
+            <lane id="8" tx-taps="0, 0, -6, 121, 0, 0, 0" />
+            <lane id="9" tx-taps="0, 0, -6, 121, 0, 0, 0" />
+            <lane id="10" tx-taps="0, 0, -6, 121, 0, 0, 0" />
+            <lane id="11" tx-taps="0, 0, -6, 121, 0, 0, 0" />
+            <lane id="12" tx-taps="0, 0, -6, 121, 0, 0, 0" />
+            <lane id="13" tx-taps="0, 0, -6, 121, 0, 0, 0" />
+            <lane id="14" tx-taps="0, 0, -6, 121, 0, 0, 0" />
+            <lane id="15" tx-taps="0, 0, -6, 121, 0, 0, 0" />
+        </PAM4>
+
+        <lane id="0" tx-polarity="0" rx-polarity="0" />
+        <lane id="1" tx-polarity="0" rx-polarity="0" />
+        <lane id="2" tx-polarity="0" rx-polarity="0" />
+        <lane id="3" tx-polarity="0" rx-polarity="0" />
+        <lane id="4" tx-polarity="0" rx-polarity="0" />
+        <lane id="5" tx-polarity="0" rx-polarity="0" />
+        <lane id="6" tx-polarity="0" rx-polarity="0" />
+        <lane id="7" tx-polarity="0" rx-polarity="0" />
+        <lane id="8" tx-polarity="0" rx-polarity="0" />
+        <lane id="9" tx-polarity="0" rx-polarity="0" />
+        <lane id="10" tx-polarity="0" rx-polarity="0" />
+        <lane id="11" tx-polarity="0" rx-polarity="0" />
+        <lane id="12" tx-polarity="0" rx-polarity="0" />
+        <lane id="13" tx-polarity="0" rx-polarity="0" />
+        <lane id="14" tx-polarity="0" rx-polarity="0" />
+        <lane id="15" tx-polarity="0" rx-polarity="0" />
+
+        <port-connector>
+            <macsec-mode>bypass</macsec-mode>
+            <system-side lane-number="0,1,2,3,4,5,6,7" speed="400000" fec="rs544" />
+            <line-side lane-number="8,9,10,11,12,13,14,15" speed="400000" fec="rs544" />
+        </port-connector>
+    </phy>
+
+</root>
diff --git a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/media_settings.json b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/media_settings.json
new file mode 100644
index 000000000000..2ec71a30a6c8
--- /dev/null
+++ b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/media_settings.json
@@ -0,0 +1,4790 @@
+{
+    "PORT_MEDIA_SETTINGS": {
+        "1": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9a",
+                    "lane1": "0x9a",
+                    "lane2": "0x9a",
+                    "lane3": "0x9a",
+                    "lane4": "0x9a",
+                    "lane5": "0x9a",
+                    "lane6": "0x9a",
+                    "lane7": "0x9a"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "2": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9a",
+                    "lane1": "0x9a",
+                    "lane2": "0x9a",
+                    "lane3": "0x9a",
+                    "lane4": "0x9a",
+                    "lane5": "0x9a",
+                    "lane6": "0x9a",
+                    "lane7": "0x9a"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "3": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8a",
+                    "lane1": "0x8b",
+                    "lane2": "0x8b",
+                    "lane3": "0x8a",
+                    "lane4": "0x8a",
+                    "lane5": "0x8b",
+                    "lane6": "0x8a",
+                    "lane7": "0x8b"
+                },
+                "post1": {
+                    "lane0": "0xfffffff6",
+                    "lane1": "0xfffffff5",
+                    "lane2": "0xfffffff5",
+                    "lane3": "0xfffffff6",
+                    "lane4": "0xfffffff6",
+                    "lane5": "0xfffffff5",
+                    "lane6": "0xfffffff6",
+                    "lane7": "0xfffffff5"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xffffffff"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff1",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff1",
+                    "lane5": "0xfffffff1",
+                    "lane6": "0xfffffff1",
+                    "lane7": "0xfffffff1"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x1",
+                    "lane2": "0x1",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x1",
+                    "lane6": "0x2",
+                    "lane7": "0x1"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "4": {
+            "Default": {
+                "main": {
+                    "lane0": "0x96",
+                    "lane1": "0x8b",
+                    "lane2": "0x96",
+                    "lane3": "0x8b",
+                    "lane4": "0x8b",
+                    "lane5": "0x8b",
+                    "lane6": "0x8b",
+                    "lane7": "0x8b"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0xfffffff5",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffff5",
+                    "lane4": "0xfffffff5",
+                    "lane5": "0xfffffff5",
+                    "lane6": "0xfffffff5",
+                    "lane7": "0xfffffff5"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff1",
+                    "lane5": "0xfffffff1",
+                    "lane6": "0xfffffff1",
+                    "lane7": "0xfffffff1"
+                },
+                "pre2": {
+                    "lane0": "0x1",
+                    "lane1": "0x1",
+                    "lane2": "0x1",
+                    "lane3": "0x1",
+                    "lane4": "0x1",
+                    "lane5": "0x1",
+                    "lane6": "0x1",
+                    "lane7": "0x1"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "5": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8a",
+                    "lane1": "0x8b",
+                    "lane2": "0x8b",
+                    "lane3": "0x8a",
+                    "lane4": "0x8a",
+                    "lane5": "0x8b",
+                    "lane6": "0x8a",
+                    "lane7": "0x8b"
+                },
+                "post1": {
+                    "lane0": "0xfffffff6",
+                    "lane1": "0xfffffff5",
+                    "lane2": "0xfffffff5",
+                    "lane3": "0xfffffff6",
+                    "lane4": "0xfffffff6",
+                    "lane5": "0xfffffff5",
+                    "lane6": "0xfffffff6",
+                    "lane7": "0xfffffff5"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xffffffff"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff1",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff1",
+                    "lane5": "0xfffffff1",
+                    "lane6": "0xfffffff1",
+                    "lane7": "0xfffffff1"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x1",
+                    "lane2": "0x1",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x1",
+                    "lane6": "0x2",
+                    "lane7": "0x1"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "6": {
+            "Default": {
+                "main": {
+                    "lane0": "0x96",
+                    "lane1": "0x8b",
+                    "lane2": "0x96",
+                    "lane3": "0x8b",
+                    "lane4": "0x8b",
+                    "lane5": "0x96",
+                    "lane6": "0x8b",
+                    "lane7": "0x96"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0xfffffff5",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffff5",
+                    "lane4": "0xfffffff5",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffff5",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff1",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff1",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x1",
+                    "lane1": "0x1",
+                    "lane2": "0x1",
+                    "lane3": "0x1",
+                    "lane4": "0x1",
+                    "lane5": "0x1",
+                    "lane6": "0x1",
+                    "lane7": "0x1"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "7": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9f",
+                    "lane1": "0x8b",
+                    "lane2": "0x9f",
+                    "lane3": "0x8a",
+                    "lane4": "0x9f",
+                    "lane5": "0x8b",
+                    "lane6": "0x9f",
+                    "lane7": "0x9f"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0xfffffff5",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffff6",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffff5",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff1",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x1",
+                    "lane2": "0x0",
+                    "lane3": "0x2",
+                    "lane4": "0x0",
+                    "lane5": "0x1",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "8": {
+            "Default": {
+                "main": {
+                    "lane0": "0x96",
+                    "lane1": "0x8b",
+                    "lane2": "0x96",
+                    "lane3": "0x8b",
+                    "lane4": "0x96",
+                    "lane5": "0x96",
+                    "lane6": "0x96",
+                    "lane7": "0x96"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0xfffffff5",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffff5",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x1",
+                    "lane1": "0x1",
+                    "lane2": "0x1",
+                    "lane3": "0x1",
+                    "lane4": "0x1",
+                    "lane5": "0x1",
+                    "lane6": "0x1",
+                    "lane7": "0x1"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "9": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9f",
+                    "lane1": "0x9f",
+                    "lane2": "0x9f",
+                    "lane3": "0x9f",
+                    "lane4": "0x9f",
+                    "lane5": "0x9f",
+                    "lane6": "0x9f",
+                    "lane7": "0x9f"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "10": {
+            "Default": {
+                "main": {
+                    "lane0": "0x96",
+                    "lane1": "0x96",
+                    "lane2": "0x96",
+                    "lane3": "0x96",
+                    "lane4": "0x96",
+                    "lane5": "0x96",
+                    "lane6": "0x96",
+                    "lane7": "0x96"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x1",
+                    "lane1": "0x1",
+                    "lane2": "0x1",
+                    "lane3": "0x1",
+                    "lane4": "0x1",
+                    "lane5": "0x1",
+                    "lane6": "0x1",
+                    "lane7": "0x1"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "11": {
+            "Default": {
+                "main": {
+                    "lane0": "0x90",
+                    "lane1": "0x9f",
+                    "lane2": "0x90",
+                    "lane3": "0x9f",
+                    "lane4": "0x90",
+                    "lane5": "0x9f",
+                    "lane6": "0x90",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0x0",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0x0",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff7",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff7",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff7",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff7",
+                    "lane7": "0xfffffff7"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "12": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8f",
+                    "lane1": "0x96",
+                    "lane2": "0x8f",
+                    "lane3": "0x96",
+                    "lane4": "0x8f",
+                    "lane5": "0x96",
+                    "lane6": "0x8f",
+                    "lane7": "0x96"
+                },
+                "post1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0x0",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff3",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff3",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff3",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff3",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x1",
+                    "lane2": "0x3",
+                    "lane3": "0x1",
+                    "lane4": "0x3",
+                    "lane5": "0x1",
+                    "lane6": "0x3",
+                    "lane7": "0x1"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "13": {
+            "Default": {
+                "main": {
+                    "lane0": "0x90",
+                    "lane1": "0x90",
+                    "lane2": "0x90",
+                    "lane3": "0x90",
+                    "lane4": "0x90",
+                    "lane5": "0x90",
+                    "lane6": "0x90",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff7",
+                    "lane1": "0xfffffff7",
+                    "lane2": "0xfffffff7",
+                    "lane3": "0xfffffff7",
+                    "lane4": "0xfffffff7",
+                    "lane5": "0xfffffff7",
+                    "lane6": "0xfffffff7",
+                    "lane7": "0xfffffff7"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "14": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8f",
+                    "lane1": "0x8f",
+                    "lane2": "0x8f",
+                    "lane3": "0x8f",
+                    "lane4": "0x8f",
+                    "lane5": "0x8f",
+                    "lane6": "0x8f",
+                    "lane7": "0x8f"
+                },
+                "post1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff9"
+                },
+                "post2": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff3",
+                    "lane1": "0xfffffff3",
+                    "lane2": "0xfffffff3",
+                    "lane3": "0xfffffff3",
+                    "lane4": "0xfffffff3",
+                    "lane5": "0xfffffff3",
+                    "lane6": "0xfffffff3",
+                    "lane7": "0xfffffff3"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x3",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x3",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x3"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "15": {
+            "Default": {
+                "main": {
+                    "lane0": "0x90",
+                    "lane1": "0x90",
+                    "lane2": "0x90",
+                    "lane3": "0x90",
+                    "lane4": "0x90",
+                    "lane5": "0x90",
+                    "lane6": "0x90",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff7",
+                    "lane1": "0xfffffff7",
+                    "lane2": "0xfffffff7",
+                    "lane3": "0xfffffff7",
+                    "lane4": "0xfffffff7",
+                    "lane5": "0xfffffff7",
+                    "lane6": "0xfffffff7",
+                    "lane7": "0xfffffff7"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "16": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8f",
+                    "lane1": "0x8f",
+                    "lane2": "0x8f",
+                    "lane3": "0x8f",
+                    "lane4": "0x8f",
+                    "lane5": "0x8f",
+                    "lane6": "0x8f",
+                    "lane7": "0x8f"
+                },
+                "post1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff9"
+                },
+                "post2": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff3",
+                    "lane1": "0xfffffff3",
+                    "lane2": "0xfffffff3",
+                    "lane3": "0xfffffff3",
+                    "lane4": "0xfffffff3",
+                    "lane5": "0xfffffff3",
+                    "lane6": "0xfffffff3",
+                    "lane7": "0xfffffff3"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x3",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x3",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x3"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "17": {
+            "Default": {
+                "main": {
+                    "lane0": "0x90",
+                    "lane1": "0x90",
+                    "lane2": "0x90",
+                    "lane3": "0x90",
+                    "lane4": "0x90",
+                    "lane5": "0x90",
+                    "lane6": "0x90",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff7",
+                    "lane1": "0xfffffff7",
+                    "lane2": "0xfffffff7",
+                    "lane3": "0xfffffff7",
+                    "lane4": "0xfffffff7",
+                    "lane5": "0xfffffff7",
+                    "lane6": "0xfffffff7",
+                    "lane7": "0xfffffff7"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "18": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8f",
+                    "lane1": "0x8f",
+                    "lane2": "0x8f",
+                    "lane3": "0x8f",
+                    "lane4": "0x8f",
+                    "lane5": "0x8f",
+                    "lane6": "0x8f",
+                    "lane7": "0x8f"
+                },
+                "post1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff9"
+                },
+                "post2": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff3",
+                    "lane1": "0xfffffff3",
+                    "lane2": "0xfffffff3",
+                    "lane3": "0xfffffff3",
+                    "lane4": "0xfffffff3",
+                    "lane5": "0xfffffff3",
+                    "lane6": "0xfffffff3",
+                    "lane7": "0xfffffff3"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x3",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x3",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x3"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "19": {
+            "Default": {
+                "main": {
+                    "lane0": "0x90",
+                    "lane1": "0x90",
+                    "lane2": "0x90",
+                    "lane3": "0x90",
+                    "lane4": "0x90",
+                    "lane5": "0x90",
+                    "lane6": "0x90",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff7",
+                    "lane1": "0xfffffff7",
+                    "lane2": "0xfffffff7",
+                    "lane3": "0xfffffff7",
+                    "lane4": "0xfffffff7",
+                    "lane5": "0xfffffff7",
+                    "lane6": "0xfffffff7",
+                    "lane7": "0xfffffff7"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "20": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8f",
+                    "lane1": "0x8f",
+                    "lane2": "0x8f",
+                    "lane3": "0x8f",
+                    "lane4": "0x8f",
+                    "lane5": "0x8f",
+                    "lane6": "0x8f",
+                    "lane7": "0x8f"
+                },
+                "post1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff9"
+                },
+                "post2": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff3",
+                    "lane1": "0xfffffff3",
+                    "lane2": "0xfffffff3",
+                    "lane3": "0xfffffff3",
+                    "lane4": "0xfffffff3",
+                    "lane5": "0xfffffff3",
+                    "lane6": "0xfffffff3",
+                    "lane7": "0xfffffff3"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x3",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x3",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x3"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "21": {
+            "Default": {
+                "main": {
+                    "lane0": "0x90",
+                    "lane1": "0x90",
+                    "lane2": "0x90",
+                    "lane3": "0x90",
+                    "lane4": "0x90",
+                    "lane5": "0x90",
+                    "lane6": "0x90",
+                    "lane7": "0x90"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff7",
+                    "lane1": "0xfffffff7",
+                    "lane2": "0xfffffff7",
+                    "lane3": "0xfffffff7",
+                    "lane4": "0xfffffff7",
+                    "lane5": "0xfffffff7",
+                    "lane6": "0xfffffff7",
+                    "lane7": "0xfffffff7"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "22": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8f",
+                    "lane1": "0x8f",
+                    "lane2": "0x8f",
+                    "lane3": "0x8f",
+                    "lane4": "0x8f",
+                    "lane5": "0x8f",
+                    "lane6": "0x8f",
+                    "lane7": "0x8f"
+                },
+                "post1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff9"
+                },
+                "post2": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff3",
+                    "lane1": "0xfffffff3",
+                    "lane2": "0xfffffff3",
+                    "lane3": "0xfffffff3",
+                    "lane4": "0xfffffff3",
+                    "lane5": "0xfffffff3",
+                    "lane6": "0xfffffff3",
+                    "lane7": "0xfffffff3"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x3",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x3",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x3"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "23": {
+            "Default": {
+                "main": {
+                    "lane0": "0x90",
+                    "lane1": "0x9f",
+                    "lane2": "0x9f",
+                    "lane3": "0x9f",
+                    "lane4": "0x90",
+                    "lane5": "0x9f",
+                    "lane6": "0x9f",
+                    "lane7": "0x9f"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff7",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff7",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "24": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8f",
+                    "lane1": "0x96",
+                    "lane2": "0x96",
+                    "lane3": "0x96",
+                    "lane4": "0x96",
+                    "lane5": "0x96",
+                    "lane6": "0x96",
+                    "lane7": "0x96"
+                },
+                "post1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff3",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x1",
+                    "lane2": "0x1",
+                    "lane3": "0x1",
+                    "lane4": "0x1",
+                    "lane5": "0x1",
+                    "lane6": "0x1",
+                    "lane7": "0x1"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "25": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9f",
+                    "lane1": "0x9f",
+                    "lane2": "0x9f",
+                    "lane3": "0x9f",
+                    "lane4": "0x9f",
+                    "lane5": "0x9f",
+                    "lane6": "0x9f",
+                    "lane7": "0x9f"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffff8"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "26": {
+            "Default": {
+                "main": {
+                    "lane0": "0x96",
+                    "lane1": "0x96",
+                    "lane2": "0x96",
+                    "lane3": "0x96",
+                    "lane4": "0x96",
+                    "lane5": "0x96",
+                    "lane6": "0x96",
+                    "lane7": "0x96"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x1",
+                    "lane1": "0x1",
+                    "lane2": "0x1",
+                    "lane3": "0x1",
+                    "lane4": "0x1",
+                    "lane5": "0x1",
+                    "lane6": "0x1",
+                    "lane7": "0x1"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "27": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9f",
+                    "lane1": "0x8b",
+                    "lane2": "0x8b",
+                    "lane3": "0x8a",
+                    "lane4": "0x9f",
+                    "lane5": "0x8b",
+                    "lane6": "0x8a",
+                    "lane7": "0x8b"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0xfffffff5",
+                    "lane2": "0xfffffff5",
+                    "lane3": "0xfffffff6",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffff5",
+                    "lane6": "0xfffffff6",
+                    "lane7": "0xfffffff5"
+                },
+                "post2": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xffffffff"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff1",
+                    "lane6": "0xfffffff1",
+                    "lane7": "0xfffffff1"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x1",
+                    "lane2": "0x1",
+                    "lane3": "0x2",
+                    "lane4": "0x0",
+                    "lane5": "0x1",
+                    "lane6": "0x2",
+                    "lane7": "0x1"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "28": {
+            "Default": {
+                "main": {
+                    "lane0": "0x96",
+                    "lane1": "0x8b",
+                    "lane2": "0x96",
+                    "lane3": "0x8b",
+                    "lane4": "0x96",
+                    "lane5": "0x96",
+                    "lane6": "0x8b",
+                    "lane7": "0x96"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0xfffffff5",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffff5",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffff5",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff1",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x1",
+                    "lane1": "0x1",
+                    "lane2": "0x1",
+                    "lane3": "0x1",
+                    "lane4": "0x1",
+                    "lane5": "0x1",
+                    "lane6": "0x1",
+                    "lane7": "0x1"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "29": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8a",
+                    "lane1": "0x8b",
+                    "lane2": "0x8b",
+                    "lane3": "0x8a",
+                    "lane4": "0x8a",
+                    "lane5": "0x8b",
+                    "lane6": "0x8a",
+                    "lane7": "0x8b"
+                },
+                "post1": {
+                    "lane0": "0xfffffff6",
+                    "lane1": "0xfffffff5",
+                    "lane2": "0xfffffff5",
+                    "lane3": "0xfffffff6",
+                    "lane4": "0xfffffff6",
+                    "lane5": "0xfffffff5",
+                    "lane6": "0xfffffff6",
+                    "lane7": "0xfffffff5"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xffffffff"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff1",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff1",
+                    "lane5": "0xfffffff1",
+                    "lane6": "0xfffffff1",
+                    "lane7": "0xfffffff1"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x1",
+                    "lane2": "0x1",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x1",
+                    "lane6": "0x2",
+                    "lane7": "0x1"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "30": {
+            "Default": {
+                "main": {
+                    "lane0": "0x96",
+                    "lane1": "0x8b",
+                    "lane2": "0x96",
+                    "lane3": "0x8b",
+                    "lane4": "0x8b",
+                    "lane5": "0x96",
+                    "lane6": "0x8b",
+                    "lane7": "0x96"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0xfffffff5",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffff5",
+                    "lane4": "0xfffffff5",
+                    "lane5": "0x0",
+                    "lane6": "0xfffffff5",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff1",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff1",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x1",
+                    "lane1": "0x1",
+                    "lane2": "0x1",
+                    "lane3": "0x1",
+                    "lane4": "0x1",
+                    "lane5": "0x1",
+                    "lane6": "0x1",
+                    "lane7": "0x1"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "31": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9a",
+                    "lane1": "0x9a",
+                    "lane2": "0x9a",
+                    "lane3": "0x9a",
+                    "lane4": "0x9a",
+                    "lane5": "0x9a",
+                    "lane6": "0x9a",
+                    "lane7": "0x9a"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "32": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9a",
+                    "lane1": "0x9a",
+                    "lane2": "0x9a",
+                    "lane3": "0x9a",
+                    "lane4": "0x9a",
+                    "lane5": "0x9a",
+                    "lane6": "0x9a",
+                    "lane7": "0x9a"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "33": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9a",
+                    "lane1": "0x9a",
+                    "lane2": "0x9a",
+                    "lane3": "0x9a",
+                    "lane4": "0x9a",
+                    "lane5": "0x9a",
+                    "lane6": "0x9a",
+                    "lane7": "0x9a"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "34": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9a",
+                    "lane1": "0x9a",
+                    "lane2": "0x9a",
+                    "lane3": "0x9a",
+                    "lane4": "0x9a",
+                    "lane5": "0x9a",
+                    "lane6": "0x9a",
+                    "lane7": "0x9a"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "35": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8e",
+                    "lane1": "0x8f",
+                    "lane2": "0x8f",
+                    "lane3": "0x8e",
+                    "lane4": "0x8e",
+                    "lane5": "0x8f",
+                    "lane6": "0x8e",
+                    "lane7": "0x8f"
+                },
+                "post1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffffb",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffc"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff1",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff1"
+                },
+                "pre2": {
+                    "lane0": "0x1",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x1",
+                    "lane4": "0x1",
+                    "lane5": "0x2",
+                    "lane6": "0x1",
+                    "lane7": "0x2"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "36": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9f",
+                    "lane1": "0x9f",
+                    "lane2": "0x9f",
+                    "lane3": "0x9f",
+                    "lane4": "0x9f",
+                    "lane5": "0x9f",
+                    "lane6": "0x9f",
+                    "lane7": "0x9f"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff9"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "37": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8e",
+                    "lane1": "0x8f",
+                    "lane2": "0x8f",
+                    "lane3": "0x8e",
+                    "lane4": "0x8e",
+                    "lane5": "0x8f",
+                    "lane6": "0x8e",
+                    "lane7": "0x8f"
+                },
+                "post1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffffb",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffc"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff1",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff1"
+                },
+                "pre2": {
+                    "lane0": "0x1",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x1",
+                    "lane4": "0x1",
+                    "lane5": "0x2",
+                    "lane6": "0x1",
+                    "lane7": "0x2"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "38": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9f",
+                    "lane1": "0x9f",
+                    "lane2": "0x9f",
+                    "lane3": "0x9f",
+                    "lane4": "0x9f",
+                    "lane5": "0x9f",
+                    "lane6": "0x9f",
+                    "lane7": "0x9f"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff9"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "39": {
+            "Default": {
+                "main": {
+                    "lane0": "0x99",
+                    "lane1": "0x99",
+                    "lane2": "0x99",
+                    "lane3": "0x99",
+                    "lane4": "0x99",
+                    "lane5": "0x99",
+                    "lane6": "0x99",
+                    "lane7": "0x8f"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff1"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x2"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "40": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9f",
+                    "lane1": "0x9f",
+                    "lane2": "0x9f",
+                    "lane3": "0x9f",
+                    "lane4": "0x9f",
+                    "lane5": "0x9f",
+                    "lane6": "0x9f",
+                    "lane7": "0x9f"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff9"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "41": {
+            "Default": {
+                "main": {
+                    "lane0": "0x99",
+                    "lane1": "0x99",
+                    "lane2": "0x99",
+                    "lane3": "0x99",
+                    "lane4": "0x99",
+                    "lane5": "0x99",
+                    "lane6": "0x99",
+                    "lane7": "0x99"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "42": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9f",
+                    "lane1": "0x9f",
+                    "lane2": "0x9f",
+                    "lane3": "0x9f",
+                    "lane4": "0x9f",
+                    "lane5": "0x9f",
+                    "lane6": "0x9f",
+                    "lane7": "0x9f"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff9"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "43": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8f",
+                    "lane1": "0x8f",
+                    "lane2": "0x8f",
+                    "lane3": "0x8f",
+                    "lane4": "0x8f",
+                    "lane5": "0x8f",
+                    "lane6": "0x8f",
+                    "lane7": "0x99"
+                },
+                "post1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff3",
+                    "lane1": "0xfffffff3",
+                    "lane2": "0xfffffff3",
+                    "lane3": "0xfffffff3",
+                    "lane4": "0xfffffff3",
+                    "lane5": "0xfffffff3",
+                    "lane6": "0xfffffff3",
+                    "lane7": "0xfffffff4"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x3",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x3",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "44": {
+            "Default": {
+                "main": {
+                    "lane0": "0x91",
+                    "lane1": "0x91",
+                    "lane2": "0x91",
+                    "lane3": "0x91",
+                    "lane4": "0x91",
+                    "lane5": "0x91",
+                    "lane6": "0x91",
+                    "lane7": "0x91"
+                },
+                "post1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffffb",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffffb"
+                },
+                "post2": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "post3": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x3",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x3",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x3"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "45": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8f",
+                    "lane1": "0x8f",
+                    "lane2": "0x8f",
+                    "lane3": "0x8f",
+                    "lane4": "0x8f",
+                    "lane5": "0x8f",
+                    "lane6": "0x8f",
+                    "lane7": "0x8f"
+                },
+                "post1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff9"
+                },
+                "post2": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff3",
+                    "lane1": "0xfffffff3",
+                    "lane2": "0xfffffff3",
+                    "lane3": "0xfffffff3",
+                    "lane4": "0xfffffff3",
+                    "lane5": "0xfffffff3",
+                    "lane6": "0xfffffff3",
+                    "lane7": "0xfffffff3"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x3",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x3",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x3"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "46": {
+            "Default": {
+                "main": {
+                    "lane0": "0x91",
+                    "lane1": "0x91",
+                    "lane2": "0x91",
+                    "lane3": "0x91",
+                    "lane4": "0x91",
+                    "lane5": "0x91",
+                    "lane6": "0x91",
+                    "lane7": "0x91"
+                },
+                "post1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffffb",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffffb"
+                },
+                "post2": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "post3": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x3",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x3",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x3"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "47": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8f",
+                    "lane1": "0x8f",
+                    "lane2": "0x8f",
+                    "lane3": "0x8f",
+                    "lane4": "0x8f",
+                    "lane5": "0x8f",
+                    "lane6": "0x8f",
+                    "lane7": "0x8f"
+                },
+                "post1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff9"
+                },
+                "post2": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff3",
+                    "lane1": "0xfffffff3",
+                    "lane2": "0xfffffff3",
+                    "lane3": "0xfffffff3",
+                    "lane4": "0xfffffff3",
+                    "lane5": "0xfffffff3",
+                    "lane6": "0xfffffff3",
+                    "lane7": "0xfffffff3"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x3",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x3",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x3"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "48": {
+            "Default": {
+                "main": {
+                    "lane0": "0x91",
+                    "lane1": "0x91",
+                    "lane2": "0x91",
+                    "lane3": "0x91",
+                    "lane4": "0x91",
+                    "lane5": "0x91",
+                    "lane6": "0x91",
+                    "lane7": "0x91"
+                },
+                "post1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffffb",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffffb"
+                },
+                "post2": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "post3": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x3",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x3",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x3"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "49": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8f",
+                    "lane1": "0x8f",
+                    "lane2": "0x8f",
+                    "lane3": "0x8f",
+                    "lane4": "0x8f",
+                    "lane5": "0x8f",
+                    "lane6": "0x8f",
+                    "lane7": "0x8f"
+                },
+                "post1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff9"
+                },
+                "post2": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff3",
+                    "lane1": "0xfffffff3",
+                    "lane2": "0xfffffff3",
+                    "lane3": "0xfffffff3",
+                    "lane4": "0xfffffff3",
+                    "lane5": "0xfffffff3",
+                    "lane6": "0xfffffff3",
+                    "lane7": "0xfffffff3"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x3",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x3",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x3"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "50": {
+            "Default": {
+                "main": {
+                    "lane0": "0x91",
+                    "lane1": "0x91",
+                    "lane2": "0x91",
+                    "lane3": "0x91",
+                    "lane4": "0x91",
+                    "lane5": "0x91",
+                    "lane6": "0x91",
+                    "lane7": "0x91"
+                },
+                "post1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffffb",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffffb"
+                },
+                "post2": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "post3": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x3",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x3",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x3"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "51": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8f",
+                    "lane1": "0x8f",
+                    "lane2": "0x8f",
+                    "lane3": "0x99",
+                    "lane4": "0x8f",
+                    "lane5": "0x8f",
+                    "lane6": "0x8f",
+                    "lane7": "0x99"
+                },
+                "post1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0x0",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff3",
+                    "lane1": "0xfffffff3",
+                    "lane2": "0xfffffff3",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff3",
+                    "lane5": "0xfffffff3",
+                    "lane6": "0xfffffff3",
+                    "lane7": "0xfffffff4"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x3",
+                    "lane2": "0x3",
+                    "lane3": "0x0",
+                    "lane4": "0x3",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "52": {
+            "Default": {
+                "main": {
+                    "lane0": "0x91",
+                    "lane1": "0x91",
+                    "lane2": "0x91",
+                    "lane3": "0x91",
+                    "lane4": "0x91",
+                    "lane5": "0x91",
+                    "lane6": "0x91",
+                    "lane7": "0x91"
+                },
+                "post1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffffb",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffffb"
+                },
+                "post2": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "post3": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x3",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x3",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x3"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "53": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8f",
+                    "lane1": "0x99",
+                    "lane2": "0x8f",
+                    "lane3": "0x99",
+                    "lane4": "0x99",
+                    "lane5": "0x8f",
+                    "lane6": "0x8f",
+                    "lane7": "0x99"
+                },
+                "post1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0x0",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff3",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff3",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff3",
+                    "lane6": "0xfffffff3",
+                    "lane7": "0xfffffff4"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x0",
+                    "lane2": "0x3",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "54": {
+            "Default": {
+                "main": {
+                    "lane0": "0x91",
+                    "lane1": "0x91",
+                    "lane2": "0x91",
+                    "lane3": "0x9f",
+                    "lane4": "0x91",
+                    "lane5": "0x91",
+                    "lane6": "0x91",
+                    "lane7": "0x91"
+                },
+                "post1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0x0",
+                    "lane4": "0xfffffffb",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffffb"
+                },
+                "post2": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "post3": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x3",
+                    "lane2": "0x3",
+                    "lane3": "0x0",
+                    "lane4": "0x3",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x3"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "55": {
+            "Default": {
+                "main": {
+                    "lane0": "0x99",
+                    "lane1": "0x99",
+                    "lane2": "0x99",
+                    "lane3": "0x99",
+                    "lane4": "0x99",
+                    "lane5": "0x99",
+                    "lane6": "0x99",
+                    "lane7": "0x99"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffe"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "56": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9f",
+                    "lane1": "0x9f",
+                    "lane2": "0x9f",
+                    "lane3": "0x9f",
+                    "lane4": "0x9f",
+                    "lane5": "0x9f",
+                    "lane6": "0x9f",
+                    "lane7": "0x9f"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff9"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "57": {
+            "Default": {
+                "main": {
+                    "lane0": "0x99",
+                    "lane1": "0x8f",
+                    "lane2": "0x99",
+                    "lane3": "0x8e",
+                    "lane4": "0x99",
+                    "lane5": "0x99",
+                    "lane6": "0x99",
+                    "lane7": "0x8f"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0x0",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff1"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x2",
+                    "lane2": "0x0",
+                    "lane3": "0x1",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x2"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "58": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9f",
+                    "lane1": "0x9f",
+                    "lane2": "0x9f",
+                    "lane3": "0x9f",
+                    "lane4": "0x9f",
+                    "lane5": "0x9f",
+                    "lane6": "0x9f",
+                    "lane7": "0x9f"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff9"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "59": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8e",
+                    "lane1": "0x8f",
+                    "lane2": "0x8f",
+                    "lane3": "0x8e",
+                    "lane4": "0x8e",
+                    "lane5": "0x8f",
+                    "lane6": "0x8e",
+                    "lane7": "0x8f"
+                },
+                "post1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffffb",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffc"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff1",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff1"
+                },
+                "pre2": {
+                    "lane0": "0x1",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x1",
+                    "lane4": "0x1",
+                    "lane5": "0x2",
+                    "lane6": "0x1",
+                    "lane7": "0x2"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "60": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9f",
+                    "lane1": "0x9f",
+                    "lane2": "0x9f",
+                    "lane3": "0x9f",
+                    "lane4": "0x9f",
+                    "lane5": "0x9f",
+                    "lane6": "0x9f",
+                    "lane7": "0x9f"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff9"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "61": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8e",
+                    "lane1": "0x8f",
+                    "lane2": "0x8f",
+                    "lane3": "0x8e",
+                    "lane4": "0x8e",
+                    "lane5": "0x8f",
+                    "lane6": "0x8e",
+                    "lane7": "0x8f"
+                },
+                "post1": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffffb",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffffd"
+                },
+                "post2": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffc"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff1",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff1"
+                },
+                "pre2": {
+                    "lane0": "0x1",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x1",
+                    "lane4": "0x1",
+                    "lane5": "0x2",
+                    "lane6": "0x1",
+                    "lane7": "0x2"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "62": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9f",
+                    "lane1": "0x9f",
+                    "lane2": "0x9f",
+                    "lane3": "0x9f",
+                    "lane4": "0x9f",
+                    "lane5": "0x9f",
+                    "lane6": "0x9f",
+                    "lane7": "0x9f"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "post3": {
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xffffffff"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff9"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "63": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9a",
+                    "lane1": "0x9a",
+                    "lane2": "0x9a",
+                    "lane3": "0x9a",
+                    "lane4": "0x9a",
+                    "lane5": "0x9a",
+                    "lane6": "0x9a",
+                    "lane7": "0x9a"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "64": {
+            "Default": {
+                "main": {
+                    "lane0": "0x9a",
+                    "lane1": "0x9a",
+                    "lane2": "0x9a",
+                    "lane3": "0x9a",
+                    "lane4": "0x9a",
+                    "lane5": "0x9a",
+                    "lane6": "0x9a",
+                    "lane7": "0x9a"
+                },
+                "post1": {
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xfffffffc"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "65": {
+            "Default": {
+                "main": {
+                    "lane0": "0x32"
+                },
+                "post1": {
+                    "lane0": "0x5"
+                },
+                "post2": {
+                    "lane0": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0x5"
+                },
+                "pre2": {
+                    "lane0": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0"
+                }
+            }
+        },
+        "66": {
+            "Default": {
+                "main": {
+                    "lane0": "0x32"
+                },
+                "post1": {
+                    "lane0": "0x5"
+                },
+                "post2": {
+                    "lane0": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0x5"
+                },
+                "pre2": {
+                    "lane0": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0"
+                }
+            }
+        }
+    }
+}
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/port_config.ini b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/port_config.ini
index c7bdcf79be6a..ef35708de118 100644
--- a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/port_config.ini
+++ b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/port_config.ini
@@ -1,67 +1,67 @@
 # name          lanes                           alias        index  speed     fec
-Ethernet0       9,10,11,12,13,14,15,16          Ethernet1/1  1      400000    rs
-Ethernet8       5,6,7,8,9,10,11,12              Ethernet2/1  2      400000    rs
-Ethernet16      25,26,27,28,29,30,31,32         Ethernet3/1  3      400000    rs
-Ethernet24      17,18,19,20,21,22,23,24         Ethernet4/1  4      400000    rs
-Ethernet32      41,42,43,44,45,46,47,48         Ethernet5/1  5      400000    rs
-Ethernet40      33,34,35,36,37,38,39,40         Ethernet6/1  6      400000    rs
-Ethernet48      57,58,59,60,61,62,63,64         Ethernet7/1  7      400000    rs
-Ethernet56      49,50,51,52,53,54,55,56         Ethernet8/1  8      400000    rs
-Ethernet64      73,74,75,76,77,78,79,80         Ethernet9/1  9      400000    rs
-Ethernet72      65,66,67,68,69,70,71,72         Ethernet10/1 10     400000    rs
-Ethernet80      89,90,91,92,93,94,95,96         Ethernet11/1 11     400000    rs
-Ethernet88      81,82,83,84,85,86,87,88         Ethernet12/1 12     400000    rs
-Ethernet96      105,106,107,108,109,110,111,112 Ethernet13/1 13     400000    rs
-Ethernet104     97,98,99,100,101,102,103,104    Ethernet14/1 14     400000    rs
-Ethernet112     121,122,123,124,125,126,127,128 Ethernet15/1 15     400000    rs
-Ethernet120     117,118,119,120,121,122,123,124 Ethernet16/1 16     400000    rs
-Ethernet128     141,142,143,144,145,146,147,148 Ethernet17/1 17     400000    rs
-Ethernet136     129,130,131,132,133,134,135,136 Ethernet18/1 18     400000    rs
-Ethernet144     153,154,155,156,157,158,159,160 Ethernet19/1 19     400000    rs
-Ethernet152     145,146,147,148,149,150,151,152 Ethernet20/1 20     400000    rs
-Ethernet160     169,170,171,172,173,174,175,176 Ethernet21/1 21     400000    rs
-Ethernet168     161,162,163,164,165,166,167,168 Ethernet22/1 22     400000    rs
-Ethernet176     185,186,187,188,189,190,191,192 Ethernet23/1 23     400000    rs
-Ethernet184     177,178,179,180,181,182,183,184 Ethernet24/1 24     400000    rs
-Ethernet192     201,202,203,204,205,206,207,208 Ethernet25/1 25     400000    rs
-Ethernet200     193,194,195,196,197,198,199,200 Ethernet26/1 26     400000    rs
-Ethernet208     217,218,219,220,221,222,223,224 Ethernet27/1 27     400000    rs
-Ethernet216     209,210,211,212,213,214,215,216 Ethernet28/1 28     400000    rs
-Ethernet224     233,234,235,236,237,238,239,240 Ethernet29/1 29     400000    rs
-Ethernet232     225,226,227,228,229,230,231,232 Ethernet30/1 30     400000    rs
-Ethernet240     241,242,243,244,245,246,247,248 Ethernet31/1 31     400000    rs
-Ethernet248     253,254,255,256,257,258,259,260 Ethernet32/1 32     400000    rs
+Ethernet0       17,18,19,20,21,22,23,24         Ethernet1/1  1      400000    rs
+Ethernet8       9,10,11,12,13,14,15,16          Ethernet2/1  2      400000    rs
+Ethernet16      49,50,51,52,53,54,55,56         Ethernet3/1  3      400000    rs
+Ethernet24      33,34,35,36,37,38,39,40         Ethernet4/1  4      400000    rs
+Ethernet32      81,82,83,84,85,86,87,88         Ethernet5/1  5      400000    rs
+Ethernet40      65,66,67,68,69,70,71,72         Ethernet6/1  6      400000    rs
+Ethernet48      113,114,115,116,117,118,119,120 Ethernet7/1  7      400000    rs
+Ethernet56      97,98,99,100,101,102,103,104    Ethernet8/1  8      400000    rs
+Ethernet64      145,146,147,148,149,150,151,152 Ethernet9/1  9      400000    rs
+Ethernet72      129,130,131,132,133,134,135,136 Ethernet10/1 10     400000    rs
+Ethernet80      177,178,179,180,181,182,183,184 Ethernet11/1 11     400000    rs
+Ethernet88      161,162,163,164,165,166,167,168 Ethernet12/1 12     400000    rs
+Ethernet96      209,210,211,212,213,214,215,216 Ethernet13/1 13     400000    rs
+Ethernet104     193,194,195,196,197,198,199,200 Ethernet14/1 14     400000    rs
+Ethernet112     241,242,243,244,245,246,247,248 Ethernet15/1 15     400000    rs
+Ethernet120     233,234,235,236,237,238,239,240 Ethernet16/1 16     400000    rs
+Ethernet128     281,282,283,284,285,286,287,288 Ethernet17/1 17     400000    rs
+Ethernet136     257,258,259,260,261,262,263,264 Ethernet18/1 18     400000    rs
+Ethernet144     305,306,307,308,309,310,311,312 Ethernet19/1 19     400000    rs
+Ethernet152     289,290,291,292,293,294,295,296 Ethernet20/1 20     400000    rs
+Ethernet160     337,338,339,340,341,342,343,344 Ethernet21/1 21     400000    rs
+Ethernet168     321,322,323,324,325,326,327,328 Ethernet22/1 22     400000    rs
+Ethernet176     369,370,371,372,373,374,375,376 Ethernet23/1 23     400000    rs
+Ethernet184     353,354,355,356,357,358,359,360 Ethernet24/1 24     400000    rs
+Ethernet192     401,402,403,404,405,406,407,408 Ethernet25/1 25     400000    rs
+Ethernet200     385,386,387,388,389,390,391,392 Ethernet26/1 26     400000    rs
+Ethernet208     433,434,435,436,437,438,439,440 Ethernet27/1 27     400000    rs
+Ethernet216     417,418,419,420,421,422,423,424 Ethernet28/1 28     400000    rs
+Ethernet224     465,466,467,468,469,470,471,472 Ethernet29/1 29     400000    rs
+Ethernet232     449,450,451,452,453,454,455,456 Ethernet30/1 30     400000    rs
+Ethernet240     481,482,483,484,485,486,487,488 Ethernet31/1 31     400000    rs
+Ethernet248     505,506,507,508,509,510,511,512 Ethernet32/1 32     400000    rs
 Ethernet256     1,2,3,4,5,6,7,8                 Ethernet33/1 33     400000    rs
-Ethernet264     13,14,15,16,17,18,19,20         Ethernet34/1 34     400000    rs
-Ethernet272     29,30,31,32,33,34,35,36         Ethernet35/1 35     400000    rs
-Ethernet280     21,22,23,24,25,26,27,28         Ethernet36/1 36     400000    rs
-Ethernet288     45,46,47,48,49,50,51,52         Ethernet37/1 37     400000    rs
-Ethernet296     37,38,39,40,41,42,43,44         Ethernet38/1 38     400000    rs
-Ethernet304     61,62,63,64,65,66,67,68         Ethernet39/1 39     400000    rs
-Ethernet312     53,54,55,56,57,58,59,60         Ethernet40/1 40     400000    rs
-Ethernet320     77,78,79,80,81,82,83,84         Ethernet41/1 41     400000    rs
-Ethernet328     69,70,71,72,73,74,75,76         Ethernet42/1 42     400000    rs
-Ethernet336     93,94,95,96,97,98,99,100        Ethernet43/1 43     400000    rs
-Ethernet344     85,86,87,88,89,90,91,92         Ethernet44/1 44     400000    rs
-Ethernet352     109,110,111,112,113,114,115,116 Ethernet45/1 45     400000    rs
-Ethernet360     101,102,103,104,105,106,107,108 Ethernet46/1 46     400000    rs
-Ethernet368     125,126,127,128,129,130,131,132 Ethernet47/1 47     400000    rs
-Ethernet376     113,114,115,116,117,118,119,120 Ethernet48/1 48     400000    rs
-Ethernet384     137,138,139,140,141,142,143,144 Ethernet49/1 49     400000    rs
-Ethernet392     133,134,135,136,137,138,139,140 Ethernet50/1 50     400000    rs
-Ethernet400     157,158,159,160,161,162,163,164 Ethernet51/1 51     400000    rs
-Ethernet408     149,150,151,152,153,154,155,156 Ethernet52/1 52     400000    rs
-Ethernet416     173,174,175,176,177,178,179,180 Ethernet53/1 53     400000    rs
-Ethernet424     165,166,167,168,169,170,171,172 Ethernet54/1 54     400000    rs
-Ethernet432     189,190,191,192,193,194,195,196 Ethernet55/1 55     400000    rs
-Ethernet440     181,182,183,184,185,186,187,188 Ethernet56/1 56     400000    rs
-Ethernet448     205,206,207,208,209,210,211,212 Ethernet57/1 57     400000    rs
-Ethernet456     197,198,199,200,201,202,203,204 Ethernet58/1 58     400000    rs
-Ethernet464     221,222,223,224,225,226,227,228 Ethernet59/1 59     400000    rs
-Ethernet472     213,214,215,216,217,218,219,220 Ethernet60/1 60     400000    rs
-Ethernet480     237,238,239,240,241,242,243,244 Ethernet61/1 61     400000    rs
-Ethernet488     229,230,231,232,233,234,235,236 Ethernet62/1 62     400000    rs
-Ethernet496     249,250,251,252,253,254,255,256 Ethernet63/1 63     400000    rs
-Ethernet504     245,246,247,248,249,250,251,252 Ethernet64/1 64     400000    rs
-Ethernet512     258                             Ethernet65   65     10000     none
-Ethernet513     257                             Ethernet66   66     10000     none
+Ethernet264     25,26,27,28,29,30,31,32         Ethernet34/1 34     400000    rs
+Ethernet272     57,58,59,60,61,62,63,64         Ethernet35/1 35     400000    rs
+Ethernet280     41,42,43,44,45,46,47,48         Ethernet36/1 36     400000    rs
+Ethernet288     89,90,91,92,93,94,95,96         Ethernet37/1 37     400000    rs
+Ethernet296     73,74,75,76,77,78,79,80         Ethernet38/1 38     400000    rs
+Ethernet304     121,122,123,124,125,126,127,128 Ethernet39/1 39     400000    rs
+Ethernet312     105,106,107,108,109,110,111,112 Ethernet40/1 40     400000    rs
+Ethernet320     153,154,155,156,157,158,159,160 Ethernet41/1 41     400000    rs
+Ethernet328     137,138,139,140,141,142,143,144 Ethernet42/1 42     400000    rs
+Ethernet336     185,186,187,188,189,190,191,192 Ethernet43/1 43     400000    rs
+Ethernet344     169,170,171,172,173,174,175,176 Ethernet44/1 44     400000    rs
+Ethernet352     217,218,219,220,221,222,223,224 Ethernet45/1 45     400000    rs
+Ethernet360     201,202,203,204,205,206,207,208 Ethernet46/1 46     400000    rs
+Ethernet368     249,250,251,252,253,254,255,256 Ethernet47/1 47     400000    rs
+Ethernet376     225,226,227,228,229,230,231,232 Ethernet48/1 48     400000    rs
+Ethernet384     273,274,275,276,277,278,279,280 Ethernet49/1 49     400000    rs
+Ethernet392     265,266,267,268,269,270,271,272 Ethernet50/1 50     400000    rs
+Ethernet400     313,314,315,316,317,318,319,320 Ethernet51/1 51     400000    rs
+Ethernet408     297,298,299,300,301,302,303,304 Ethernet52/1 52     400000    rs
+Ethernet416     345,346,347,348,349,350,351,352 Ethernet53/1 53     400000    rs
+Ethernet424     329,330,331,332,333,334,335,336 Ethernet54/1 54     400000    rs
+Ethernet432     377,378,379,380,381,382,383,384 Ethernet55/1 55     400000    rs
+Ethernet440     361,362,363,364,365,366,367,368 Ethernet56/1 56     400000    rs
+Ethernet448     409,410,411,412,413,414,415,416 Ethernet57/1 57     400000    rs
+Ethernet456     393,394,395,396,397,398,399,400 Ethernet58/1 58     400000    rs
+Ethernet464     441,442,443,444,445,446,447,448 Ethernet59/1 59     400000    rs
+Ethernet472     425,426,427,428,429,430,431,432 Ethernet60/1 60     400000    rs
+Ethernet480     473,474,475,476,477,478,479,480 Ethernet61/1 61     400000    rs
+Ethernet488     457,458,459,460,461,462,463,464 Ethernet62/1 62     400000    rs
+Ethernet496     497,498,499,500,501,502,503,504 Ethernet63/1 63     400000    rs
+Ethernet504     489,490,491,492,493,494,495,496 Ethernet64/1 64     400000    rs
+Ethernet512     515                             Ethernet65   65     10000     none
+Ethernet513     513                             Ethernet66   66     10000     none
diff --git a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/th4-a7060dx5-64s.config.bcm b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/th4-a7060dx5-64s.config.bcm
index 1d5894498362..ec5f4d9f0f4a 100644
--- a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/th4-a7060dx5-64s.config.bcm
+++ b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/th4-a7060dx5-64s.config.bcm
@@ -23,6 +23,7 @@ bcm_device:
     0:
         global:
             pktio_mode: 1
+            default_cpu_tx_queue: 7
             vlan_flooding_l2mc_num_reserved: 0
             ipv6_lpm_128b_enable: 1
             shared_block_mask_section: uc_bc
diff --git a/device/arista/x86_64-arista_7060dx5_64s/platform.json b/device/arista/x86_64-arista_7060dx5_64s/platform.json
index fa89a17687b5..a006f48dae4c 100644
--- a/device/arista/x86_64-arista_7060dx5_64s/platform.json
+++ b/device/arista/x86_64-arista_7060dx5_64s/platform.json
@@ -1,7 +1,20 @@
 {
     "chassis": {
         "name": "DCS-7060DX5-64S",
-        "components": [],
+        "components": [
+            {
+                "name": "Aboot()"
+            },
+            {
+                "name": "Scd(addr=0000:00:18.7)"
+            },
+            {
+                "name": "Scd(addr=0000:01:00.0)"
+            },
+            {
+                "name": "LorikeetSysCpld(addr=13-0023)"
+            }
+        ],
         "fans": [],
         "fan_drawers": [
             {
@@ -40,24 +53,30 @@
         "psus": [
             {
                 "name": "psu1",
-                "fans": []
+                "fans": [
+                    {
+                        "name": "psu1/1",
+                        "speed": {
+                            "controllable": false
+                        }
+                    }
+                ]
             },
             {
                 "name": "psu2",
-                "fans": []
+                "fans": [
+                    {
+                        "name": "psu2/1",
+                        "speed": {
+                            "controllable": false
+                        }
+                    }
+                ]
             }
         ],
         "thermals": [
             {
-                "name": "Board sensor",
-                "controllable": false
-            },
-            {
-                "name": "TH4 exhaust temp sensor",
-                "controllable": false
-            },
-            {
-                "name": "Inlet temp sensor",
+                "name": "Cpu temp sensor",
                 "controllable": false
             },
             {
@@ -65,35 +84,23 @@
                 "controllable": false
             },
             {
-                "name": "Back panel temp sensor",
+                "name": "Back-panel temp sensor",
                 "controllable": false
             },
             {
-                "name": "Front panel temp sensor",
+                "name": "Switch card",
                 "controllable": false
             },
             {
-                "name": "Power supply 1 hotspot sensor",
+                "name": "Air outlet",
                 "controllable": false
             },
             {
-                "name": "Power supply 1 inlet temp sensor",
+                "name": "Air inlet",
                 "controllable": false
             },
             {
-                "name": "Power supply 1 exhaust temp sensor",
-                "controllable": false
-            },
-            {
-                "name": "Power supply 2 hotspot sensor",
-                "controllable": false
-            },
-            {
-                "name": "Power supply 2 inlet temp sensor",
-                "controllable": false
-            },
-            {
-                "name": "Power supply 2 exhaust temp sensor",
+                "name": "Front-panel temp sensor",
                 "controllable": false
             }
         ],
@@ -301,7 +308,7 @@
     "interfaces": {
         "Ethernet0": {
             "index": "1,1,1,1,1,1,1,1",
-            "lanes": "9,10,11,12,13,14,15,16",
+            "lanes": "17,18,19,20,21,22,23,24",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet1/1"
@@ -330,7 +337,7 @@
         },
         "Ethernet8": {
             "index": "2,2,2,2,2,2,2,2",
-            "lanes": "5,6,7,8,9,10,11,12",
+            "lanes": "9,10,11,12,13,14,15,16",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet2/1"
@@ -359,7 +366,7 @@
         },
         "Ethernet16": {
             "index": "3,3,3,3,3,3,3,3",
-            "lanes": "25,26,27,28,29,30,31,32",
+            "lanes": "49,50,51,52,53,54,55,56",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet3/1"
@@ -388,7 +395,7 @@
         },
         "Ethernet24": {
             "index": "4,4,4,4,4,4,4,4",
-            "lanes": "17,18,19,20,21,22,23,24",
+            "lanes": "33,34,35,36,37,38,39,40",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet4/1"
@@ -417,7 +424,7 @@
         },
         "Ethernet32": {
             "index": "5,5,5,5,5,5,5,5",
-            "lanes": "41,42,43,44,45,46,47,48",
+            "lanes": "81,82,83,84,85,86,87,88",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet5/1"
@@ -446,7 +453,7 @@
         },
         "Ethernet40": {
             "index": "6,6,6,6,6,6,6,6",
-            "lanes": "33,34,35,36,37,38,39,40",
+            "lanes": "65,66,67,68,69,70,71,72",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet6/1"
@@ -475,7 +482,7 @@
         },
         "Ethernet48": {
             "index": "7,7,7,7,7,7,7,7",
-            "lanes": "57,58,59,60,61,62,63,64",
+            "lanes": "113,114,115,116,117,118,119,120",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet7/1"
@@ -504,7 +511,7 @@
         },
         "Ethernet56": {
             "index": "8,8,8,8,8,8,8,8",
-            "lanes": "49,50,51,52,53,54,55,56",
+            "lanes": "97,98,99,100,101,102,103,104",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet8/1"
@@ -533,7 +540,7 @@
         },
         "Ethernet64": {
             "index": "9,9,9,9,9,9,9,9",
-            "lanes": "73,74,75,76,77,78,79,80",
+            "lanes": "145,146,147,148,149,150,151,152",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet9/1"
@@ -562,7 +569,7 @@
         },
         "Ethernet72": {
             "index": "10,10,10,10,10,10,10,10",
-            "lanes": "65,66,67,68,69,70,71,72",
+            "lanes": "129,130,131,132,133,134,135,136",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet10/1"
@@ -591,7 +598,7 @@
         },
         "Ethernet80": {
             "index": "11,11,11,11,11,11,11,11",
-            "lanes": "89,90,91,92,93,94,95,96",
+            "lanes": "177,178,179,180,181,182,183,184",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet11/1"
@@ -620,7 +627,7 @@
         },
         "Ethernet88": {
             "index": "12,12,12,12,12,12,12,12",
-            "lanes": "81,82,83,84,85,86,87,88",
+            "lanes": "161,162,163,164,165,166,167,168",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet12/1"
@@ -649,7 +656,7 @@
         },
         "Ethernet96": {
             "index": "13,13,13,13,13,13,13,13",
-            "lanes": "105,106,107,108,109,110,111,112",
+            "lanes": "209,210,211,212,213,214,215,216",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet13/1"
@@ -678,7 +685,7 @@
         },
         "Ethernet104": {
             "index": "14,14,14,14,14,14,14,14",
-            "lanes": "97,98,99,100,101,102,103,104",
+            "lanes": "193,194,195,196,197,198,199,200",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet14/1"
@@ -707,7 +714,7 @@
         },
         "Ethernet112": {
             "index": "15,15,15,15,15,15,15,15",
-            "lanes": "121,122,123,124,125,126,127,128",
+            "lanes": "241,242,243,244,245,246,247,248",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet15/1"
@@ -736,7 +743,7 @@
         },
         "Ethernet120": {
             "index": "16,16,16,16,16,16,16,16",
-            "lanes": "117,118,119,120,121,122,123,124",
+            "lanes": "233,234,235,236,237,238,239,240",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet16/1"
@@ -765,7 +772,7 @@
         },
         "Ethernet128": {
             "index": "17,17,17,17,17,17,17,17",
-            "lanes": "141,142,143,144,145,146,147,148",
+            "lanes": "281,282,283,284,285,286,287,288",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet17/1"
@@ -794,7 +801,7 @@
         },
         "Ethernet136": {
             "index": "18,18,18,18,18,18,18,18",
-            "lanes": "129,130,131,132,133,134,135,136",
+            "lanes": "257,258,259,260,261,262,263,264",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet18/1"
@@ -823,7 +830,7 @@
         },
         "Ethernet144": {
             "index": "19,19,19,19,19,19,19,19",
-            "lanes": "153,154,155,156,157,158,159,160",
+            "lanes": "305,306,307,308,309,310,311,312",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet19/1"
@@ -852,7 +859,7 @@
         },
         "Ethernet152": {
             "index": "20,20,20,20,20,20,20,20",
-            "lanes": "145,146,147,148,149,150,151,152",
+            "lanes": "289,290,291,292,293,294,295,296",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet20/1"
@@ -881,7 +888,7 @@
         },
         "Ethernet160": {
             "index": "21,21,21,21,21,21,21,21",
-            "lanes": "169,170,171,172,173,174,175,176",
+            "lanes": "337,338,339,340,341,342,343,344",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet21/1"
@@ -910,7 +917,7 @@
         },
         "Ethernet168": {
             "index": "22,22,22,22,22,22,22,22",
-            "lanes": "161,162,163,164,165,166,167,168",
+            "lanes": "321,322,323,324,325,326,327,328",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet22/1"
@@ -939,7 +946,7 @@
         },
         "Ethernet176": {
             "index": "23,23,23,23,23,23,23,23",
-            "lanes": "185,186,187,188,189,190,191,192",
+            "lanes": "369,370,371,372,373,374,375,376",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet23/1"
@@ -968,7 +975,7 @@
         },
         "Ethernet184": {
             "index": "24,24,24,24,24,24,24,24",
-            "lanes": "177,178,179,180,181,182,183,184",
+            "lanes": "353,354,355,356,357,358,359,360",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet24/1"
@@ -997,7 +1004,7 @@
         },
         "Ethernet192": {
             "index": "25,25,25,25,25,25,25,25",
-            "lanes": "201,202,203,204,205,206,207,208",
+            "lanes": "401,402,403,404,405,406,407,408",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet25/1"
@@ -1026,7 +1033,7 @@
         },
         "Ethernet200": {
             "index": "26,26,26,26,26,26,26,26",
-            "lanes": "193,194,195,196,197,198,199,200",
+            "lanes": "385,386,387,388,389,390,391,392",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet26/1"
@@ -1055,7 +1062,7 @@
         },
         "Ethernet208": {
             "index": "27,27,27,27,27,27,27,27",
-            "lanes": "217,218,219,220,221,222,223,224",
+            "lanes": "433,434,435,436,437,438,439,440",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet27/1"
@@ -1084,7 +1091,7 @@
         },
         "Ethernet216": {
             "index": "28,28,28,28,28,28,28,28",
-            "lanes": "209,210,211,212,213,214,215,216",
+            "lanes": "417,418,419,420,421,422,423,424",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet28/1"
@@ -1113,7 +1120,7 @@
         },
         "Ethernet224": {
             "index": "29,29,29,29,29,29,29,29",
-            "lanes": "233,234,235,236,237,238,239,240",
+            "lanes": "465,466,467,468,469,470,471,472",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet29/1"
@@ -1142,7 +1149,7 @@
         },
         "Ethernet232": {
             "index": "30,30,30,30,30,30,30,30",
-            "lanes": "225,226,227,228,229,230,231,232",
+            "lanes": "449,450,451,452,453,454,455,456",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet30/1"
@@ -1171,7 +1178,7 @@
         },
         "Ethernet240": {
             "index": "31,31,31,31,31,31,31,31",
-            "lanes": "241,242,243,244,245,246,247,248",
+            "lanes": "481,482,483,484,485,486,487,488",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet31/1"
@@ -1200,7 +1207,7 @@
         },
         "Ethernet248": {
             "index": "32,32,32,32,32,32,32,32",
-            "lanes": "253,254,255,256,257,258,259,260",
+            "lanes": "505,506,507,508,509,510,511,512",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet32/1"
@@ -1258,7 +1265,7 @@
         },
         "Ethernet264": {
             "index": "34,34,34,34,34,34,34,34",
-            "lanes": "13,14,15,16,17,18,19,20",
+            "lanes": "25,26,27,28,29,30,31,32",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet34/1"
@@ -1287,7 +1294,7 @@
         },
         "Ethernet272": {
             "index": "35,35,35,35,35,35,35,35",
-            "lanes": "29,30,31,32,33,34,35,36",
+            "lanes": "57,58,59,60,61,62,63,64",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet35/1"
@@ -1316,7 +1323,7 @@
         },
         "Ethernet280": {
             "index": "36,36,36,36,36,36,36,36",
-            "lanes": "21,22,23,24,25,26,27,28",
+            "lanes": "41,42,43,44,45,46,47,48",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet36/1"
@@ -1345,7 +1352,7 @@
         },
         "Ethernet288": {
             "index": "37,37,37,37,37,37,37,37",
-            "lanes": "45,46,47,48,49,50,51,52",
+            "lanes": "89,90,91,92,93,94,95,96",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet37/1"
@@ -1374,7 +1381,7 @@
         },
         "Ethernet296": {
             "index": "38,38,38,38,38,38,38,38",
-            "lanes": "37,38,39,40,41,42,43,44",
+            "lanes": "73,74,75,76,77,78,79,80",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet38/1"
@@ -1403,7 +1410,7 @@
         },
         "Ethernet304": {
             "index": "39,39,39,39,39,39,39,39",
-            "lanes": "61,62,63,64,65,66,67,68",
+            "lanes": "121,122,123,124,125,126,127,128",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet39/1"
@@ -1432,7 +1439,7 @@
         },
         "Ethernet312": {
             "index": "40,40,40,40,40,40,40,40",
-            "lanes": "53,54,55,56,57,58,59,60",
+            "lanes": "105,106,107,108,109,110,111,112",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet40/1"
@@ -1461,7 +1468,7 @@
         },
         "Ethernet320": {
             "index": "41,41,41,41,41,41,41,41",
-            "lanes": "77,78,79,80,81,82,83,84",
+            "lanes": "153,154,155,156,157,158,159,160",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet41/1"
@@ -1490,7 +1497,7 @@
         },
         "Ethernet328": {
             "index": "42,42,42,42,42,42,42,42",
-            "lanes": "69,70,71,72,73,74,75,76",
+            "lanes": "137,138,139,140,141,142,143,144",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet42/1"
@@ -1519,7 +1526,7 @@
         },
         "Ethernet336": {
             "index": "43,43,43,43,43,43,43,43",
-            "lanes": "93,94,95,96,97,98,99,100",
+            "lanes": "185,186,187,188,189,190,191,192",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet43/1"
@@ -1548,7 +1555,7 @@
         },
         "Ethernet344": {
             "index": "44,44,44,44,44,44,44,44",
-            "lanes": "85,86,87,88,89,90,91,92",
+            "lanes": "169,170,171,172,173,174,175,176",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet44/1"
@@ -1577,7 +1584,7 @@
         },
         "Ethernet352": {
             "index": "45,45,45,45,45,45,45,45",
-            "lanes": "109,110,111,112,113,114,115,116",
+            "lanes": "217,218,219,220,221,222,223,224",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet45/1"
@@ -1606,7 +1613,7 @@
         },
         "Ethernet360": {
             "index": "46,46,46,46,46,46,46,46",
-            "lanes": "101,102,103,104,105,106,107,108",
+            "lanes": "201,202,203,204,205,206,207,208",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet46/1"
@@ -1635,7 +1642,7 @@
         },
         "Ethernet368": {
             "index": "47,47,47,47,47,47,47,47",
-            "lanes": "125,126,127,128,129,130,131,132",
+            "lanes": "249,250,251,252,253,254,255,256",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet47/1"
@@ -1664,7 +1671,7 @@
         },
         "Ethernet376": {
             "index": "48,48,48,48,48,48,48,48",
-            "lanes": "113,114,115,116,117,118,119,120",
+            "lanes": "225,226,227,228,229,230,231,232",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet48/1"
@@ -1693,7 +1700,7 @@
         },
         "Ethernet384": {
             "index": "49,49,49,49,49,49,49,49",
-            "lanes": "137,138,139,140,141,142,143,144",
+            "lanes": "273,274,275,276,277,278,279,280",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet49/1"
@@ -1722,7 +1729,7 @@
         },
         "Ethernet392": {
             "index": "50,50,50,50,50,50,50,50",
-            "lanes": "133,134,135,136,137,138,139,140",
+            "lanes": "265,266,267,268,269,270,271,272",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet50/1"
@@ -1751,7 +1758,7 @@
         },
         "Ethernet400": {
             "index": "51,51,51,51,51,51,51,51",
-            "lanes": "157,158,159,160,161,162,163,164",
+            "lanes": "313,314,315,316,317,318,319,320",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet51/1"
@@ -1780,7 +1787,7 @@
         },
         "Ethernet408": {
             "index": "52,52,52,52,52,52,52,52",
-            "lanes": "149,150,151,152,153,154,155,156",
+            "lanes": "297,298,299,300,301,302,303,304",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet52/1"
@@ -1809,7 +1816,7 @@
         },
         "Ethernet416": {
             "index": "53,53,53,53,53,53,53,53",
-            "lanes": "173,174,175,176,177,178,179,180",
+            "lanes": "345,346,347,348,349,350,351,352",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet53/1"
@@ -1838,7 +1845,7 @@
         },
         "Ethernet424": {
             "index": "54,54,54,54,54,54,54,54",
-            "lanes": "165,166,167,168,169,170,171,172",
+            "lanes": "329,330,331,332,333,334,335,336",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet54/1"
@@ -1867,7 +1874,7 @@
         },
         "Ethernet432": {
             "index": "55,55,55,55,55,55,55,55",
-            "lanes": "189,190,191,192,193,194,195,196",
+            "lanes": "377,378,379,380,381,382,383,384",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet55/1"
@@ -1896,7 +1903,7 @@
         },
         "Ethernet440": {
             "index": "56,56,56,56,56,56,56,56",
-            "lanes": "181,182,183,184,185,186,187,188",
+            "lanes": "361,362,363,364,365,366,367,368",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet56/1"
@@ -1925,7 +1932,7 @@
         },
         "Ethernet448": {
             "index": "57,57,57,57,57,57,57,57",
-            "lanes": "205,206,207,208,209,210,211,212",
+            "lanes": "409,410,411,412,413,414,415,416",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet57/1"
@@ -1954,7 +1961,7 @@
         },
         "Ethernet456": {
             "index": "58,58,58,58,58,58,58,58",
-            "lanes": "197,198,199,200,201,202,203,204",
+            "lanes": "393,394,395,396,397,398,399,400",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet58/1"
@@ -1983,7 +1990,7 @@
         },
         "Ethernet464": {
             "index": "59,59,59,59,59,59,59,59",
-            "lanes": "221,222,223,224,225,226,227,228",
+            "lanes": "441,442,443,444,445,446,447,448",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet59/1"
@@ -2012,7 +2019,7 @@
         },
         "Ethernet472": {
             "index": "60,60,60,60,60,60,60,60",
-            "lanes": "213,214,215,216,217,218,219,220",
+            "lanes": "425,426,427,428,429,430,431,432",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet60/1"
@@ -2041,7 +2048,7 @@
         },
         "Ethernet480": {
             "index": "61,61,61,61,61,61,61,61",
-            "lanes": "237,238,239,240,241,242,243,244",
+            "lanes": "473,474,475,476,477,478,479,480",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet61/1"
@@ -2070,7 +2077,7 @@
         },
         "Ethernet488": {
             "index": "62,62,62,62,62,62,62,62",
-            "lanes": "229,230,231,232,233,234,235,236",
+            "lanes": "457,458,459,460,461,462,463,464",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet62/1"
@@ -2099,7 +2106,7 @@
         },
         "Ethernet496": {
             "index": "63,63,63,63,63,63,63,63",
-            "lanes": "249,250,251,252,253,254,255,256",
+            "lanes": "497,498,499,500,501,502,503,504",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet63/1"
@@ -2128,7 +2135,7 @@
         },
         "Ethernet504": {
             "index": "64,64,64,64,64,64,64,64",
-            "lanes": "245,246,247,248,249,250,251,252",
+            "lanes": "489,490,491,492,493,494,495,496",
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": [
                     "Ethernet64/1"
@@ -2157,7 +2164,7 @@
         },
         "Ethernet512": {
             "index": "65",
-            "lanes": "258",
+            "lanes": "515",
             "breakout_modes": {
                 "1x10G": [
                     "Ethernet65"
@@ -2166,7 +2173,7 @@
         },
         "Ethernet513": {
             "index": "66",
-            "lanes": "257",
+            "lanes": "513",
             "breakout_modes": {
                 "1x10G": [
                     "Ethernet66"
diff --git a/device/arista/x86_64-arista_7060dx5_64s/platform_components.json b/device/arista/x86_64-arista_7060dx5_64s/platform_components.json
new file mode 100644
index 000000000000..2012dc63aa49
--- /dev/null
+++ b/device/arista/x86_64-arista_7060dx5_64s/platform_components.json
@@ -0,0 +1,12 @@
+{
+    "chassis": {
+        "DCS-7060DX5-64S": {
+            "component": {
+                "Aboot()": {},
+                "Scd(addr=0000:00:18.7)": {},
+                "Scd(addr=0000:01:00.0)": {},
+                "LorikeetSysCpld(addr=13-0023)": {}
+            }
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/gearbox_config.json b/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/gearbox_config.json
index b6d090ec6ef0..853ad935e8c3 100644
--- a/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/gearbox_config.json
+++ b/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/gearbox_config.json
@@ -5,7 +5,7 @@
       "name": "phy1_1",
       "address": "1",
       "lib_name": "",
-      "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin",
+      "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin",
       "config_file": "/usr/share/sonic/hwsku/phy1_config.json",
       "sai_init_config_file": "",
       "phy_access": "mdio",
@@ -18,7 +18,7 @@
       "name": "phy1_2",
       "address": "2",
       "lib_name": "",
-      "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin",
+      "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin",
       "config_file": "/usr/share/sonic/hwsku/phy2_config.json",
       "sai_init_config_file": "",
       "phy_access": "mdio",
@@ -31,7 +31,7 @@
       "name": "phy2_1",
       "address": "3",
       "lib_name": "",
-      "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin",
+      "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin",
       "config_file": "/usr/share/sonic/hwsku/phy3_config.json",
       "sai_init_config_file": "",
       "phy_access": "mdio",
@@ -44,7 +44,7 @@
       "name": "phy2_2",
       "address": "4",
       "lib_name": "",
-      "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin",
+      "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin",
       "config_file": "/usr/share/sonic/hwsku/phy4_config.json",
       "sai_init_config_file": "",
       "phy_access": "mdio",
@@ -57,7 +57,7 @@
       "name": "phy3_1",
       "address": "5",
       "lib_name": "",
-      "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin",
+      "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin",
       "config_file": "/usr/share/sonic/hwsku/phy5_config.json",
       "sai_init_config_file": "",
       "phy_access": "mdio",
@@ -70,7 +70,7 @@
       "name": "phy3_2",
       "address": "6",
       "lib_name": "",
-      "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin",
+      "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin",
       "config_file": "/usr/share/sonic/hwsku/phy6_config.json",
       "sai_init_config_file": "",
       "phy_access": "mdio",
@@ -83,7 +83,7 @@
       "name": "phy4_1",
       "address": "7",
       "lib_name": "",
-      "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin",
+      "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin",
       "config_file": "/usr/share/sonic/hwsku/phy7_config.json",
       "sai_init_config_file": "",
       "phy_access": "mdio",
@@ -96,7 +96,7 @@
       "name": "phy4_2",
       "address": "8",
       "lib_name": "",
-      "firmware_path": "/usr/etc/credo/firmware/blackhawk.lz4.fw.0.1.17.bin",
+      "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin",
       "config_file": "/usr/share/sonic/hwsku/phy8_config.json",
       "sai_init_config_file": "",
       "phy_access": "mdio",

From f222ff949b4b77b0c17de75e7d50a4184b26865e Mon Sep 17 00:00:00 2001
From: Bobby McGonigle <bobbymcgonigle@arista.com>
Date: Wed, 4 Dec 2024 18:56:22 -0800
Subject: [PATCH 319/364] Fix optional params not applying to all interfaces
 (#20313)

Currently optional params only get applied to the first child port in group. We want optional parameters to apply to all child ports in group.

For example:

        "Ethernet0": {
            "default_brkout_mode": "2x400G",
            "autoneg": "on"
        },
In this scenario we want autoneg on to be in the config_db entry for
both interfaces that belong to the group; Ethernet0 and Ethernet4.

Currently this only gets applied to Ethernet0:

(Pdb++) pp child_ports
{'Ethernet0': {'alias': 'Ethernet1/1',
               'autoneg': 'on',
               'index': '1',
               'lanes': '17,18,19,20',
               'speed': '400000',
               'subport': '1'},
 'Ethernet4': {'alias': 'Ethernet1/5',
               'index': '1',
               'lanes': '21,22,23,24',
               'speed': '400000',
               'subport': '2'}}
With this change it now gets applied to all interfaces in the group as expected

(Pdb) pp child_ports
{'Ethernet0': {'alias': 'Ethernet1/1',
               'autoneg': 'on',
               'index': '1',
               'lanes': '17,18,19,20',
               'speed': '400000',
               'subport': '1'},
 'Ethernet4': {'alias': 'Ethernet1/5',
               'autoneg': 'on',
               'index': '1',
               'lanes': '21,22,23,24',
               'speed': '400000',
               'subport': '2'}}
Why I did it
I need to apply optional hwsku params for a group of interfaces.

How I did it
Just changed to iterate over every child port in group.

How to verify it
Introduction to the problem shows verification of the solution. Check the output manually and also fixed the unit test to correspond and pass.
---
 src/sonic-config-engine/portconfig.py                       | 3 ++-
 .../tests/sample_output/platform_output.json                | 6 ++++--
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/src/sonic-config-engine/portconfig.py b/src/sonic-config-engine/portconfig.py
index 788774d34969..b2550b12125f 100644
--- a/src/sonic-config-engine/portconfig.py
+++ b/src/sonic-config-engine/portconfig.py
@@ -430,7 +430,8 @@ def parse_platform_json_file(hwsku_json_file, platform_json_file):
             if child_port in hwsku_entry:
                 for key, item in hwsku_entry[child_port].items():
                     if key in OPTIONAL_HWSKU_ATTRIBUTES:
-                        child_ports.get(child_port)[key] = item
+                        for child in child_ports:
+                            child_ports.get(child)[key] = item
 
         ports.update(child_ports)
 
diff --git a/src/sonic-config-engine/tests/sample_output/platform_output.json b/src/sonic-config-engine/tests/sample_output/platform_output.json
index 51c26754e982..b820717499a1 100644
--- a/src/sonic-config-engine/tests/sample_output/platform_output.json
+++ b/src/sonic-config-engine/tests/sample_output/platform_output.json
@@ -976,7 +976,8 @@
     "alias": "Eth36/1",
     "pfc_asym": "off",
     "subport": "1",
-    "speed": "25000"
+    "speed": "25000",
+    "role": "Dpc"
   },
   "Ethernet141": {
     "index": "36",
@@ -987,7 +988,8 @@
     "alias": "Eth36/2",
     "pfc_asym": "off",
     "speed": "25000",
-    "subport": "2"
+    "subport": "2",
+    "role": "Dpc"
   },
   "Ethernet142": {
     "index": "36",

From 69b476419af7349e2756fa18a0ada93ec0ae92ef Mon Sep 17 00:00:00 2001
From: arista-nwolfe <94405414+arista-nwolfe@users.noreply.github.com>
Date: Thu, 5 Dec 2024 00:06:34 -0500
Subject: [PATCH 320/364] Set `xoff` of `x86_64-arista_7800r3_48cq2_lc` to the
 same as`x86_64-arista_7800r3_48cqm2_lc` (#20926)

* Set xoff of x86_64-arista_7800r3_48cq2_lc to the same as
x86_64-arista_7800r3_48cqm2_lc

* Updating CW2 sample_output for unit tests

* Updating the py3 sample_output file as well
---
 .../Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2              | 2 +-
 .../tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json   | 2 +-
 .../tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json   | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2
index b036683d1dba..38ee97c304e8 100644
--- a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2
@@ -22,7 +22,7 @@
             "size": "6441610000",
             "type": "both",
             "mode": "dynamic",
-            "xoff": "20761804"
+            "xoff": "1056256819"
         }
     },
     "BUFFER_PROFILE": {
diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json
index 661fd8cc28c5..8a1163f95f72 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json
@@ -57,7 +57,7 @@
             "size": "6441610000",
             "type": "both",
             "mode": "dynamic",
-            "xoff": "20761804"
+            "xoff": "1056256819"
         }
     },
     "BUFFER_PROFILE": {
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json
index 661fd8cc28c5..8a1163f95f72 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json
@@ -57,7 +57,7 @@
             "size": "6441610000",
             "type": "both",
             "mode": "dynamic",
-            "xoff": "20761804"
+            "xoff": "1056256819"
         }
     },
     "BUFFER_PROFILE": {

From 8e0f1c66b1d49463b984b18dd417ec37fb5af24a Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 5 Dec 2024 16:01:37 +0800
Subject: [PATCH 321/364] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#21043)

#### Why I did it
src/sonic-platform-daemons
```
* 1962fca - (HEAD -> master, origin/master, origin/HEAD) Fixed bug in chassisd causing incorrect number of ASICs in CHASSIS_STATE_DB (#560) (4 hours ago) [Vivek Verma]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 57f0448f564a..1962fca3a257 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 57f0448f564a35568ab9b803f638c29b41760b39
+Subproject commit 1962fca3a257acc40702565be0cb95fe93068bcb

From 7c9f85e145ebd1474ccd1e8e395e440825ddee58 Mon Sep 17 00:00:00 2001
From: Gagan Punathil Ellath <gpunathilell@nvidia.com>
Date: Thu, 5 Dec 2024 06:49:11 -0800
Subject: [PATCH 322/364] [Smartswitch][Mellanox] Enable thermal updater class
 for DPUs on switch (#20945)

- Why I did it
In order to use the thermal data from DPUs to be used by hw-mgmt algorithms for controlling the speed of the fans.
Changes in

thermal_manager.py : Updated condition to consider if DPUs are present along with host management mode
thermal_updater.py: Added new APIs for DPUs and made configuration to update start and stop based on the initialization

- How I did it
Parse the DPUs information from the chassis_instance modules, get the temperature information from the module.get_temperature_dict information, This will be added to the Platform API PR

- How i tested it
Added new unit test to cover the thermal algo.
---
 .../smartswitch_thermal_updater.py            | 152 ++++++++++++
 .../sonic_platform/thermal_manager.py         |  20 +-
 .../test_smartswsitch_thermal_updater.py      | 220 ++++++++++++++++++
 .../tests/test_thermal_manager.py             |  67 ++++++
 4 files changed, 454 insertions(+), 5 deletions(-)
 create mode 100644 platform/mellanox/mlnx-platform-api/sonic_platform/smartswitch_thermal_updater.py
 create mode 100644 platform/mellanox/mlnx-platform-api/tests/test_smartswsitch_thermal_updater.py
 create mode 100644 platform/mellanox/mlnx-platform-api/tests/test_thermal_manager.py

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/smartswitch_thermal_updater.py b/platform/mellanox/mlnx-platform-api/sonic_platform/smartswitch_thermal_updater.py
new file mode 100644
index 000000000000..da2253e77c3e
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/smartswitch_thermal_updater.py
@@ -0,0 +1,152 @@
+#
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+from . import utils
+from .thermal_updater import ThermalUpdater
+from sonic_py_common import logger
+
+import sys
+
+sys.path.append('/run/hw-management/bin')
+
+try:
+    import hw_management_dpu_thermal_update
+except ImportError:
+    # For unit test and for non-smartswitch systems, these functions should not be called
+    from unittest import mock
+    hw_management_dpu_thermal_update = mock.MagicMock()
+    hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_set = mock.MagicMock()
+    hw_management_dpu_thermal_update.thermal_data_dpu_ddr_set = mock.MagicMock()
+    hw_management_dpu_thermal_update.thermal_data_dpu_drive_set = mock.MagicMock()
+    hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_clear = mock.MagicMock()
+    hw_management_dpu_thermal_update.thermal_data_dpu_ddr_clear = mock.MagicMock()
+    hw_management_dpu_thermal_update.thermal_data_dpu_drive_clear = mock.MagicMock()
+
+CRIT_THRESH = "critical_high_threshold"
+HIGH_THRESH = "high_threshold"
+TEMPERATURE_DATA = "temperature"
+DPU_STATUS_OFFLINE = "Offline"
+DPU_STATUS_ONLINE = "Online"
+CPU_FIELD = "CPU"
+NVME_FIELD = "NVME"
+DDR_FIELD = "DDR"
+dpu_func_dict = {
+                    CPU_FIELD: hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_set,
+                    NVME_FIELD: hw_management_dpu_thermal_update.thermal_data_dpu_drive_set,
+                    DDR_FIELD: hw_management_dpu_thermal_update.thermal_data_dpu_ddr_set,
+                 }
+
+ERROR_READ_THERMAL_DATA = 254000
+
+TC_CONFIG_FILE = '/run/hw-management/config/tc_config.json'
+logger = logger.Logger('smart-switch-thermal-updater')
+
+
+class SmartswitchThermalUpdater(ThermalUpdater):
+    def __init__(self, sfp_list, dpu_list, is_host_mgmt_mode=True):
+        super().__init__(sfp_list=sfp_list)
+        self._dpu_list = dpu_list
+        self._dpu_status = {}
+        self.host_mgmt_mode = is_host_mgmt_mode
+
+    def load_tc_config_dpu(self):
+        dpu_poll_interval = 3
+        data = utils.load_json_file(TC_CONFIG_FILE, log_func=None)
+        if data:
+            dev_parameters = data.get('dev_parameters', {})
+            dpu_parameter = dev_parameters.get('dpu\\d+_module', {})
+            dpu_poll_interval_config = dpu_parameter.get('poll_time')
+            dpu_poll_interval = int(dpu_poll_interval_config) / 2 if dpu_poll_interval_config else dpu_poll_interval
+        else:
+            logger.log_notice(f'{TC_CONFIG_FILE} does not exist, use default polling interval')
+        logger.log_notice(f'DPU polling interval: {dpu_poll_interval}')
+        self._timer.schedule(dpu_poll_interval, self.update_dpu)
+
+    def start(self):
+        self.clean_thermal_data_dpu()
+        self.load_tc_config_dpu()
+        if self.host_mgmt_mode:
+            super().start()
+        else:
+            self._timer.start()
+
+    def stop(self):
+        if self.host_mgmt_mode:
+            super().stop()
+        else:
+            self._timer.stop()
+
+    def clean_thermal_data_dpu(self):
+        for dpu in self._dpu_list:
+            self.thermal_data_dpu_clear(dpu.get_hw_mgmt_id())
+
+    def thermal_data_dpu_clear(self, dpu_index):
+        hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_clear(dpu_index)
+        hw_management_dpu_thermal_update.thermal_data_dpu_ddr_clear(dpu_index)
+        hw_management_dpu_thermal_update.thermal_data_dpu_drive_clear(dpu_index)
+
+    def get_dpu_temperature_data_from_dict_obj(self, dpu_component_temperature_data, field_name):
+        value = dpu_component_temperature_data.get(field_name)
+        fault_state = False
+        if not value:
+            fault_state = True
+            return 0, fault_state
+        try:
+            int_value = int(float(value))
+        except ValueError:
+            logger.log_error(f"Unable to obtain temperature data for DPU {field_name}: {value}")
+            int_value = 0
+            fault_state = True
+        return int_value, fault_state
+
+    def get_dpu_component_temperature_data(self, dpu_temperature_data, component_name):
+        dpu_component_temperature_data = dpu_temperature_data.get(component_name, {})
+        output_dict = {}
+        output_false_state = False
+        for value in [TEMPERATURE_DATA, HIGH_THRESH, CRIT_THRESH]:
+            output_dict[value], fault_state = self.get_dpu_temperature_data_from_dict_obj(dpu_component_temperature_data, value)
+            output_false_state = output_false_state or fault_state
+        return output_dict[TEMPERATURE_DATA], output_dict[HIGH_THRESH], output_dict[CRIT_THRESH], ERROR_READ_THERMAL_DATA if output_false_state else 0
+
+    def update_dpu_temperature(self, dpu, fault_state=False):
+        dpu_temperature_data = dpu.get_temperature_dict() if not fault_state else {}
+        for key, func in dpu_func_dict.items():
+            temp_data, temp_thresh, temp_crit_thresh, fault_val = self.get_dpu_component_temperature_data(dpu_temperature_data, key)
+            return_val = func(dpu.get_hw_mgmt_id(), temp_data, temp_thresh, temp_crit_thresh, fault_val)
+            if not return_val:
+                logger.log_error(f"Unable to update Temperature data to hw-mgmt for {key} for {dpu.get_name()}")
+
+    def update_single_dpu(self, dpu):
+        try:
+            dpu_oper_status = dpu.get_oper_status()
+            pre_oper_status = self._dpu_status.get(dpu.get_name())
+            if dpu_oper_status == DPU_STATUS_ONLINE:
+                self.update_dpu_temperature(dpu)
+            elif pre_oper_status != dpu_oper_status:
+                # If dpu is shutdown from previous execution
+                self.thermal_data_dpu_clear(dpu.get_hw_mgmt_id())
+            if pre_oper_status != dpu_oper_status:
+                # If there is a change in oper_status (irrespective of type of change)
+                self._dpu_status[dpu.get_name()] = dpu_oper_status
+        except Exception as e:
+            logger.log_error(f'Failed to update DPU {dpu.get_hw_mgmt_id()} thermal data - {e}')
+            self.update_dpu_temperature(dpu, fault_state=True)
+
+    def update_dpu(self):
+        for dpu in self._dpu_list:
+            self.update_single_dpu(dpu)
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py
index 3512a0cf52e5..813c5e8eefb0 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py
@@ -15,7 +15,8 @@
 # limitations under the License.
 #
 from sonic_platform_base.sonic_thermal_control.thermal_manager_base import ThermalManagerBase
-from . import thermal_updater
+from . import thermal_updater 
+from . import smartswitch_thermal_updater 
 from .device_data import DeviceDataManager
 
 
@@ -33,12 +34,21 @@ def initialize(cls):
         and any other vendor specific initialization.
         :return:
         """
-        if DeviceDataManager.is_module_host_management_mode():
+        dpus_present = DeviceDataManager.get_platform_dpus_data()
+        host_mgmt_mode = DeviceDataManager.is_module_host_management_mode()
+        if not dpus_present and host_mgmt_mode:
+            # Non smart switch behaviour has highest priority
             from .chassis import Chassis
-            cls.thermal_updater_task = thermal_updater.ThermalUpdater(Chassis.chassis_instance.get_all_sfps())
+            cls.thermal_updater_task = thermal_updater.ThermalUpdater(sfp_list=Chassis.chassis_instance.get_all_sfps())
+        elif dpus_present:
+            from .chassis import Chassis
+            dpus = Chassis.chassis_instance.get_all_modules()
+            cls.thermal_updater_task = smartswitch_thermal_updater.SmartswitchThermalUpdater(sfp_list=Chassis.chassis_instance.get_all_sfps(),
+                                                                                             dpu_list=dpus,
+                                                                                             is_host_mgmt_mode=host_mgmt_mode)
+        if cls.thermal_updater_task:
             cls.thermal_updater_task.start()
 
-
     @classmethod
     def deinitialize(cls):
         """
@@ -46,5 +56,5 @@ def deinitialize(cls):
         is a no-op.
         :return:
         """
-        if DeviceDataManager.is_module_host_management_mode() and cls.thermal_updater_task:
+        if cls.thermal_updater_task:
             cls.thermal_updater_task.stop()
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_smartswsitch_thermal_updater.py b/platform/mellanox/mlnx-platform-api/tests/test_smartswsitch_thermal_updater.py
new file mode 100644
index 000000000000..ce87afa6dddb
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/tests/test_smartswsitch_thermal_updater.py
@@ -0,0 +1,220 @@
+#
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+from unittest import mock
+import copy
+
+from sonic_platform.thermal_updater import hw_management_independent_mode_update
+from sonic_platform.smartswitch_thermal_updater import SmartswitchThermalUpdater, hw_management_dpu_thermal_update
+from sonic_platform.thermal_updater import ERROR_READ_THERMAL_DATA
+
+
+mock_tc_config = """
+{
+    "dev_parameters": {
+        "asic": {
+            "pwm_min": 20,
+            "pwm_max": 100,
+            "val_min": "!70000",
+            "val_max": "!105000",
+            "poll_time": 3
+        },
+        "module\\\\d+": {
+            "pwm_min": 20,
+            "pwm_max": 100,
+            "val_min": 60000,
+            "val_max": 80000,
+            "poll_time": 20
+        },
+        "dpu\\\\d+_module": {
+            "child_sensors_list": ["cx_amb", "voltmon1", "voltmon2"],
+            "poll_time": 24
+        }
+    }
+}
+"""
+
+
+class TestSmartSwitchThermalUpdater:
+    @mock.patch('sonic_platform.utils.write_file')
+    def test_configuration(self, mock_write):
+        dpu = mock.MagicMock()
+        mock_sfp = mock.MagicMock()
+        mock_sfp.sdk_index = 1
+        self.reset_hw_mgmt_mocks()
+        mock_os_open = mock.mock_open(read_data=mock_tc_config)
+        updater = SmartswitchThermalUpdater([mock_sfp], dpu_list=[dpu])
+        """ Expectation on start - Clean is called for sfp, asic, DPU
+        suspend -> 1 and load config for all 3 along with start of timer"""
+        updater._timer = mock.MagicMock()
+        mock_os_open = mock.mock_open(read_data=mock_tc_config)
+        with mock.patch('sonic_platform.utils.open', mock_os_open):
+            updater.start()
+        hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_clear.assert_called_once_with(dpu.get_hw_mgmt_id())
+        hw_management_dpu_thermal_update.thermal_data_dpu_ddr_clear.assert_called_once_with(dpu.get_hw_mgmt_id())
+        hw_management_dpu_thermal_update.thermal_data_dpu_drive_clear.assert_called_once_with(dpu.get_hw_mgmt_id())
+        hw_management_independent_mode_update.thermal_data_clean_asic.assert_called_once()
+        hw_management_independent_mode_update.thermal_data_clean_module.assert_called_once()
+        mock_write.assert_called_once_with('/run/hw-management/config/suspend', 0)
+        assert updater._timer.schedule.call_count == 3
+        # Called for DPU with time 24/2 = 12
+        assert updater._timer.schedule.call_args_list[0][0][0] == 12
+        # Expectation on stop - timer stop and suspend = 1
+        mock_write.reset_mock()
+        updater.stop()
+        updater._timer.stop.assert_called_once()
+        mock_write.assert_called_once_with('/run/hw-management/config/suspend', 1)
+        mock_write.reset_mock()
+        self.reset_hw_mgmt_mocks()
+        updater = SmartswitchThermalUpdater(None, dpu_list=[dpu], is_host_mgmt_mode=False)
+        """ Expectation on start - Clean is called for DPU
+        load config for DPU along with start of timer"""
+        updater._timer = mock.MagicMock()
+        updater.start()
+        mock_write.assert_not_called()
+        hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_clear.assert_called_once_with(dpu.get_hw_mgmt_id())
+        hw_management_dpu_thermal_update.thermal_data_dpu_ddr_clear.assert_called_once_with(dpu.get_hw_mgmt_id())
+        hw_management_dpu_thermal_update.thermal_data_dpu_drive_clear.assert_called_once_with(dpu.get_hw_mgmt_id())
+        hw_management_independent_mode_update.thermal_data_clean_asic.assert_not_called()
+        hw_management_independent_mode_update.thermal_data_clean_module.assert_not_called()
+        # Expectation on stop - timer stop
+        updater.stop()
+        updater._timer.stop.assert_called_once()
+        mock_write.assert_not_called()
+
+    def test_update_dpu(self):
+        self.reset_hw_mgmt_mocks()
+        mock_dpu = mock.MagicMock()
+        mock_dpu.get_hw_mgmt_id = mock.MagicMock(return_value=1)
+        mock_dpu.get_name = mock.MagicMock(return_value="DPU0")
+        mock_dpu.get_oper_status = mock.MagicMock(return_value="Online")
+        temp_data = {
+            "DDR":  {'temperature': '75.0', 'high_threshold': '95', 'critical_high_threshold': '100'},
+            "CPU":  {'temperature': '82.0', 'high_threshold': '90', 'critical_high_threshold': '100'},
+            "NVME":  {'temperature': '91', 'high_threshold': '95', 'critical_high_threshold': '98'}
+        }
+        mock_dpu.get_temperature_dict = mock.MagicMock(return_value=temp_data)
+        print(f"{mock_dpu.get_temperature_dict()}")
+        updater = SmartswitchThermalUpdater(sfp_list=None, dpu_list=[mock_dpu], is_host_mgmt_mode=False)
+        updater.update_dpu()
+        hw_management_dpu_thermal_update.thermal_data_dpu_ddr_set.assert_called_once_with(1, 75, 95, 100, 0)
+        hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_set.assert_called_once_with(1, 82, 90, 100, 0)
+        hw_management_dpu_thermal_update.thermal_data_dpu_drive_set.assert_called_once_with(1, 91, 95, 98, 0)
+        mock_dpu.get_temperature_dict = mock.MagicMock(return_value={})
+        self.reset_hw_mgmt_mocks()
+        updater.update_dpu()
+        hw_management_dpu_thermal_update.thermal_data_dpu_ddr_set.assert_called_once_with(1, 0, 0, 0, ERROR_READ_THERMAL_DATA)
+        hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_set.assert_called_once_with(1, 0, 0, 0, ERROR_READ_THERMAL_DATA)
+        hw_management_dpu_thermal_update.thermal_data_dpu_drive_set.assert_called_once_with(1, 0, 0, 0, ERROR_READ_THERMAL_DATA)
+        func_dict = {
+            "DDR": hw_management_dpu_thermal_update.thermal_data_dpu_ddr_set,
+            "CPU": hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_set,
+            "NVME": hw_management_dpu_thermal_update.thermal_data_dpu_drive_set,
+                     }
+        for value in ["DDR", "CPU", "NVME"]:
+            temp_data_without_entry = copy.deepcopy(temp_data)
+            # One of the values in DDR, CPU and NVME is set to empty
+            temp_data_without_entry[value] = {}
+            mock_dpu.get_temperature_dict = mock.MagicMock(return_value=temp_data_without_entry)
+            self.reset_hw_mgmt_mocks()
+            updater.update_dpu()
+            for key, func in func_dict.items():
+                if key == value:
+                    func.assert_called_once_with(1, 0, 0, 0, ERROR_READ_THERMAL_DATA)
+                else:
+                    func.assert_called_once_with(
+                        1,
+                        int(float(temp_data[key]['temperature'])),
+                        int(float(temp_data[key]['high_threshold'])),
+                        int(float(temp_data[key]['critical_high_threshold'])),
+                        0)
+            # One of the values in DDR, CPU and NVME is set to a string, can not convert to integer
+            for field in ["temperature", "high_threshold", "critical_high_threshold"]:
+                temp_data_invalid = copy.deepcopy(temp_data)
+                temp_data_orig = copy.deepcopy(temp_data)
+                temp_data_invalid[value][field] = "N/A"
+                mock_dpu.get_temperature_dict = mock.MagicMock(return_value=temp_data_invalid)
+                self.reset_hw_mgmt_mocks()
+                updater.update_dpu()
+                for key, func in func_dict.items():
+                    temp_data_orig[value][field] = 0
+                    func.assert_called_once_with(
+                        1,
+                        int(float(temp_data_orig[key]['temperature'])),
+                        int(float(temp_data_orig[key]['high_threshold'])),
+                        int(float(temp_data_orig[key]['critical_high_threshold'])),
+                        ERROR_READ_THERMAL_DATA if value == key else 0)
+        self.reset_hw_mgmt_mocks()
+        mock_dpu.get_oper_status = mock.MagicMock(return_value="Offline")
+        updater.update_dpu()
+        hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_clear.assert_called_once_with(1)
+        hw_management_dpu_thermal_update.thermal_data_dpu_ddr_clear.assert_called_once_with(1)
+        hw_management_dpu_thermal_update.thermal_data_dpu_drive_clear.assert_called_once_with(1)
+        hw_management_dpu_thermal_update.thermal_data_dpu_ddr_set.assert_not_called()
+        hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_set.assert_not_called()
+        hw_management_dpu_thermal_update.thermal_data_dpu_drive_set.assert_not_called()
+        # Clear is called only once
+        updater.update_dpu()
+        updater.update_dpu()
+        hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_clear.assert_called_once_with(1)
+        hw_management_dpu_thermal_update.thermal_data_dpu_ddr_clear.assert_called_once_with(1)
+        hw_management_dpu_thermal_update.thermal_data_dpu_drive_clear.assert_called_once_with(1)
+        self.reset_hw_mgmt_mocks()
+        mock_dpu.get_oper_status = mock.MagicMock(return_value="Online")
+        mock_dpu.get_temperature_dict = mock.MagicMock(return_value=temp_data)
+        updater.update_dpu()
+        hw_management_dpu_thermal_update.thermal_data_dpu_ddr_set.assert_called_once_with(1, 75, 95, 100, 0)
+        hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_set.assert_called_once_with(1, 82, 90, 100, 0)
+        hw_management_dpu_thermal_update.thermal_data_dpu_drive_set.assert_called_once_with(1, 91, 95, 98, 0)
+        # Multiple dpus
+        mock_dpu1 = mock.MagicMock()
+        mock_dpu1.get_hw_mgmt_id = mock.MagicMock(return_value=2)
+        mock_dpu1.get_name = mock.MagicMock(return_value="DPU1")
+        mock_dpu1.get_oper_status = mock.MagicMock(return_value="Online")
+        temp_data_1 = copy.deepcopy(temp_data)
+        temp_data_1["DDR"]["temperature"] = "52.0"
+        temp_data_1["CPU"]["temperature"] = "20.0"
+        temp_data_1["NVME"]["temperature"] = "100.0"
+        mock_dpu1.get_temperature_dict = mock.MagicMock(return_value=temp_data_1)
+        updater = SmartswitchThermalUpdater(sfp_list=None, dpu_list=[mock_dpu, mock_dpu1], is_host_mgmt_mode=False)
+        self.reset_hw_mgmt_mocks()
+        updater.update_dpu()
+        assert hw_management_dpu_thermal_update.thermal_data_dpu_ddr_set.call_count == 2
+        assert hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_set.call_count == 2
+        assert hw_management_dpu_thermal_update.thermal_data_dpu_drive_set.call_count == 2
+        assert hw_management_dpu_thermal_update.thermal_data_dpu_ddr_set.call_args_list \
+            == [mock.call(1, 75, 95, 100, 0), mock.call(2, 52, 95, 100, 0)]
+        assert hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_set.call_args_list \
+            == [mock.call(1, 82, 90, 100, 0), mock.call(2, 20, 90, 100, 0)]
+        assert hw_management_dpu_thermal_update.thermal_data_dpu_drive_set.call_args_list \
+            == [mock.call(1, 91, 95, 98, 0), mock.call(2, 100, 95, 98, 0)]
+
+    def reset_hw_mgmt_mocks(self):
+        hw_management_independent_mode_update.reset_mock()
+        hw_management_independent_mode_update.thermal_data_clean_module.reset_mock()
+        hw_management_independent_mode_update.thermal_data_clean_asic.reset_mock()
+        hw_management_independent_mode_update.module_data_set_module_counter.reset_mock()
+        hw_management_independent_mode_update.thermal_data_set_asic.reset_mock()
+        hw_management_independent_mode_update.thermal_data_set_module.reset_mock()
+        hw_management_dpu_thermal_update.reset_mock()
+        hw_management_dpu_thermal_update.thermal_data_clean_module.reset_mock()
+        hw_management_dpu_thermal_update.thermal_data_dpu_drive_clear.reset_mock()
+        hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_clear.reset_mock()
+        hw_management_dpu_thermal_update.thermal_data_dpu_ddr_set.reset_mock()
+        hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_set.reset_mock()
+        hw_management_dpu_thermal_update.thermal_data_dpu_drive_set.reset_mock()
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_thermal_manager.py b/platform/mellanox/mlnx-platform-api/tests/test_thermal_manager.py
new file mode 100644
index 000000000000..2f39b1cd1a8b
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/tests/test_thermal_manager.py
@@ -0,0 +1,67 @@
+#
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+from unittest import mock
+from sonic_platform.thermal_manager import ThermalManager
+
+
+class TestThermalManager:
+
+    @mock.patch('sonic_platform.chassis.Chassis.chassis_instance', new_callable=mock.MagicMock)
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode')
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.get_platform_dpus_data')
+    def test_updater_init(self, mock_dpus_data, mock_management_mode, mock_chassis_instance):
+        mock_dpus_data.return_value = {}
+        mock_management_mode.return_value = True
+        sfp_mock = mock.MagicMock()
+        mod_mock = mock.MagicMock()
+        mock_chassis_instance.get_all_sfps = sfp_mock
+        mock_chassis_instance.get_all_modules = mod_mock
+        sfp_mock.return_value = ['sfp1', 'sfp2']
+        mod_mock.return_value = ['dpu1', 'dpu2']
+
+        with mock.patch('sonic_platform.thermal_updater.ThermalUpdater') as mock_thermal, \
+          mock.patch('sonic_platform.smartswitch_thermal_updater.SmartswitchThermalUpdater') as mock_sm_thermal:
+            # Host mgmt mode, no DPUs are used for init
+            mgr = ThermalManager()
+            mgr.initialize()
+            mock_thermal.assert_called_once_with(sfp_list=['sfp1', 'sfp2'])
+            mgr.deinitialize()
+            mgr.thermal_updater_task.stop.assert_called_once()
+            # Not initialized if no DPUs and not in host mgmt mode
+            mock_management_mode.return_value = False
+            mock_thermal.reset_mock()
+            mgr.initialize()
+            mock_thermal.assert_not_called()
+            mgr.deinitialize()
+            mgr.thermal_updater_task.stop.assert_called_once()
+            # Initialized with DPUs if DPUs are present
+            mock_dpus_data.return_value = {'DPUS': 'dpu1'}
+            mock_thermal.reset_mock()
+            mgr.initialize()
+            mock_sm_thermal.assert_called_once_with(sfp_list=['sfp1', 'sfp2'], dpu_list=['dpu1', 'dpu2'], is_host_mgmt_mode=False)
+            mgr.deinitialize()
+            mgr.thermal_updater_task.stop.assert_called_once()
+            # Host mgmt mode, with DPUS
+            mock_thermal.reset_mock()
+            mock_sm_thermal.reset_mock()
+            mock_management_mode.return_value = True
+            mgr.initialize()
+            mock_sm_thermal.assert_called_once_with(sfp_list=['sfp1', 'sfp2'], dpu_list=['dpu1', 'dpu2'], is_host_mgmt_mode=True)
+            mgr.deinitialize()
+            mgr.thermal_updater_task.stop.assert_called_once()

From e736a839fd93284a7ad7055176e4d2912ec7483a Mon Sep 17 00:00:00 2001
From: Vivek <vivekreddykarri98@gmail.com>
Date: Thu, 5 Dec 2024 06:51:09 -0800
Subject: [PATCH 323/364] [SmartSwitch] Skip xcvrd on the DPU (#20960)

- Why I did it
Data port on the DPU is of type "Dpc" i..e no xcvr is present on it. Thus xcvrd can effectively be skipped on this platform

- How I did it
change the pmon configuration
"skip_ycabled": true,
"skip_xcvrd": true

- How to verify it
Manual test to ensure xcrvd is skipped for this type of ports.
Load and check if xcvrd is not started
---
 .../arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json           | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json
index ef069d2e13de..f65c8d4a8cfa 100644
--- a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json
+++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json
@@ -3,5 +3,6 @@
     "skip_psud": true,
     "skip_fancontrol": true,
     "skip_chassisd": false,
-    "skip_ycabled": true
+    "skip_ycabled": true,
+    "skip_xcvrd": true
 }

From f43d3506c4ebc34737fe20f050b18e94b8466ea0 Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Thu, 5 Dec 2024 06:54:15 -0800
Subject: [PATCH 324/364] [FRR]Setting multipath size to 514 and disabling
 bgp-vnc for optimization (#20744)

- Why I did it
Increased the max multipath to 512. In addition removed bgp-vnc as this feature is not used by SONiC .
https://docs.frrouting.org/en/latest/vnc.html#vnc-and-vnc-gw
This feature adds overhead in general and removing this improves bgp convergence time for scale.

- How I did it
Added a patch modify debian rules.

- How to verify it
Run BGP tests in scaled topology.
---
 ...-514-and-disable-bgp-vnc-for-optimiz.patch | 23 +++++++++++++++++++
 src/sonic-frr/patch/series                    |  1 +
 2 files changed, 24 insertions(+)
 create mode 100644 src/sonic-frr/patch/0061-Set-multipath-to-514-and-disable-bgp-vnc-for-optimiz.patch

diff --git a/src/sonic-frr/patch/0061-Set-multipath-to-514-and-disable-bgp-vnc-for-optimiz.patch b/src/sonic-frr/patch/0061-Set-multipath-to-514-and-disable-bgp-vnc-for-optimiz.patch
new file mode 100644
index 000000000000..63bbf717025d
--- /dev/null
+++ b/src/sonic-frr/patch/0061-Set-multipath-to-514-and-disable-bgp-vnc-for-optimiz.patch
@@ -0,0 +1,23 @@
+From 501f267ec4c7359fc518ba31c5d63045c935045c Mon Sep 17 00:00:00 2001
+From: dgsudharsan <sudharsand@nvidia.com>
+Date: Wed, 4 Dec 2024 20:39:46 +0000
+Subject: [PATCH] Set multipath to 514 and disable bgp-vnc for optimization
+
+
+diff --git a/debian/rules b/debian/rules
+index 5a8199afb7..3d762e6df1 100755
+--- a/debian/rules
++++ b/debian/rules
+@@ -66,8 +66,7 @@ override_dh_auto_configure:
+ 		--disable-protobuf \
+ 		--disable-zeromq \
+ 		--enable-ospfapi \
+-		--enable-bgp-vnc \
+-		--enable-multipath=256 \
++		--enable-multipath=514 \
+ 		\
+ 		--enable-user=frr \
+ 		--enable-group=frr \
+-- 
+2.43.2
+
diff --git a/src/sonic-frr/patch/series b/src/sonic-frr/patch/series
index e84597a45aed..557105858b33 100644
--- a/src/sonic-frr/patch/series
+++ b/src/sonic-frr/patch/series
@@ -40,3 +40,4 @@
 0058-When-the-file-is-config-replayed-we-cannot-handle-th.patch
 0059-Fix-BGP-reset-on-suppress-fib-pending-configuration.patch
 0060-bgpd-Validate-both-nexthop-information-NEXTHOP-and-N.patch
+0061-Set-multipath-to-514-and-disable-bgp-vnc-for-optimiz.patch

From b25a06fbb5acfc2a6b8c27d10d24d2aba6745495 Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Thu, 5 Dec 2024 06:55:40 -0800
Subject: [PATCH 325/364] [BGP]Increasing maximum-paths to 514 (#20745)

- Why I did it
This PR follows #20744
Increasing the maximum-paths to 514. Currently value of 64 restricts the maximum paths that can created by BGP.

- How I did it
Updated constants file.

- How to verify it
Modified UT to verify.
---
 .../bgpd.spine_chassis_frontend_router.conf.j2 |  2 +-
 files/image_config/constants/constants.yml     |  4 ++--
 .../vs/tests/bgp/files/gr_livelock/bgpd.conf   |  4 ++--
 .../vs/tests/bgp/files/no_export/bgpd.conf     |  4 ++--
 .../base.conf                                  |  4 ++--
 .../tests/sample_output/py2/bgpd_frr.conf      |  4 ++--
 .../py2/bgpd_frr_backend_asic.conf             |  4 ++--
 .../tests/sample_output/py2/bgpd_frr_bmp.conf  |  4 ++--
 .../sample_output/py2/bgpd_frr_dualtor.conf    |  4 ++--
 .../py2/bgpd_frr_frontend_asic.conf            |  4 ++--
 .../tests/sample_output/py2/bgpd_quagga.conf   | 18 +++++++++---------
 .../tests/sample_output/py2/frr.conf           |  4 ++--
 .../sample_output/py2/t2-chassis-fe-bgpd.conf  |  6 +++---
 .../tests/sample_output/py3/bgpd_frr.conf      |  4 ++--
 .../py3/bgpd_frr_backend_asic.conf             |  4 ++--
 .../tests/sample_output/py3/bgpd_frr_bmp.conf  |  4 ++--
 .../sample_output/py3/bgpd_frr_dualtor.conf    |  4 ++--
 .../py3/bgpd_frr_frontend_asic.conf            |  4 ++--
 .../tests/sample_output/py3/bgpd_quagga.conf   | 18 +++++++++---------
 .../tests/sample_output/py3/frr.conf           |  4 ++--
 .../sample_output/py3/t2-chassis-fe-bgpd.conf  |  6 +++---
 21 files changed, 57 insertions(+), 57 deletions(-)

diff --git a/dockers/docker-fpm-frr/frr/bgpd/bgpd.spine_chassis_frontend_router.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/bgpd.spine_chassis_frontend_router.conf.j2
index 94dacbc3af78..2df0cd4a4270 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/bgpd.spine_chassis_frontend_router.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/bgpd.spine_chassis_frontend_router.conf.j2
@@ -49,7 +49,7 @@ router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }} vrf {{ vnet_name }}
   address-family ipv4 unicast
     neighbor {{ neighbor_addr }} activate
     neighbor {{ neighbor_addr }} soft-reconfiguration inbound
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
 {%      endif %}
   address-family l2vpn evpn
diff --git a/files/image_config/constants/constants.yml b/files/image_config/constants/constants.yml
index 01fb02deadf4..781055ba49b2 100644
--- a/files/image_config/constants/constants.yml
+++ b/files/image_config/constants/constants.yml
@@ -22,8 +22,8 @@ constants:
       enabled: true
     maximum_paths:
       enabled: true
-      ipv4: 64
-      ipv6: 64
+      ipv4: 514
+      ipv6: 514
     allow_list:
       enabled: true
       default_action: "permit"   # or "deny"
diff --git a/platform/vs/tests/bgp/files/gr_livelock/bgpd.conf b/platform/vs/tests/bgp/files/gr_livelock/bgpd.conf
index dc861ed46934..e52c771a1dae 100644
--- a/platform/vs/tests/bgp/files/gr_livelock/bgpd.conf
+++ b/platform/vs/tests/bgp/files/gr_livelock/bgpd.conf
@@ -6,10 +6,10 @@ router bgp 65501
   neighbor 10.0.0.1 remote-as 65502
   address-family ipv4
     neighbor 10.0.0.1 activate
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   neighbor 10.0.0.3 remote-as 65503
   address-family ipv4
     neighbor 10.0.0.3 activate
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
diff --git a/platform/vs/tests/bgp/files/no_export/bgpd.conf b/platform/vs/tests/bgp/files/no_export/bgpd.conf
index cd87c330c299..be97c1c37abc 100644
--- a/platform/vs/tests/bgp/files/no_export/bgpd.conf
+++ b/platform/vs/tests/bgp/files/no_export/bgpd.conf
@@ -5,10 +5,10 @@ router bgp 65501
   neighbor 10.0.0.1 remote-as 65502
   address-family ipv4
     neighbor 10.0.0.1 activate
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   neighbor 10.0.0.3 remote-as 65503
   address-family ipv4
     neighbor 10.0.0.3 activate
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.spine_chassis_frontend_router.conf.j2/base.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.spine_chassis_frontend_router.conf.j2/base.conf
index 581eb107ec23..b7e9e7101605 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.spine_chassis_frontend_router.conf.j2/base.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.spine_chassis_frontend_router.conf.j2/base.conf
@@ -13,7 +13,7 @@ router bgp 555 vrf First
   address-family ipv4 unicast
     neighbor 10.10.10.1 activate
     neighbor 10.10.10.1 soft-reconfiguration inbound
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   address-family l2vpn evpn
     advertise ipv4 unicast
@@ -31,7 +31,7 @@ router bgp 555 vrf Second
   address-family ipv4 unicast
     neighbor 20.20.20.1 activate
     neighbor 20.20.20.1 soft-reconfiguration inbound
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   address-family l2vpn evpn
     advertise ipv4 unicast
diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr.conf
index 3828af13fd71..11272757855b 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr.conf
@@ -67,10 +67,10 @@ router bgp 65100
 !
 !
   address-family ipv4
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   address-family ipv6
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
 !
 ! end of template: bgpd/bgpd.main.conf.j2
diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_backend_asic.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_backend_asic.conf
index 45cd03a540a8..ab7f99d43cdf 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_backend_asic.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_backend_asic.conf
@@ -76,10 +76,10 @@ router bgp 65100
 !
 !
   address-family ipv4
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   address-family ipv6
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
 !
 ! end of template: bgpd/bgpd.main.conf.j2
diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_bmp.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_bmp.conf
index 8a6ceb39e6ba..827b287e57f1 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_bmp.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_bmp.conf
@@ -77,10 +77,10 @@ router bgp 65100
 !
 !
   address-family ipv4
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   address-family ipv6
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
 !
 ! end of template: bgpd/bgpd.main.conf.j2
diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_dualtor.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_dualtor.conf
index eda11ab9f285..fb1af604c40e 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_dualtor.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_dualtor.conf
@@ -68,10 +68,10 @@ router bgp 65100
 !
 !
   address-family ipv4
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   address-family ipv6
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
 !
 ! end of template: bgpd/bgpd.main.conf.j2
diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_frontend_asic.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_frontend_asic.conf
index 8daeff2a61e9..b84ff10f590d 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_frontend_asic.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_frontend_asic.conf
@@ -82,10 +82,10 @@ router bgp 65100
   exit-address-family
 !
   address-family ipv4
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   address-family ipv6
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
 !
 ! end of template: bgpd/bgpd.main.conf.j2
diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_quagga.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_quagga.conf
index 43e8ade6a302..fb8bd1d9d9d9 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_quagga.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_quagga.conf
@@ -35,7 +35,7 @@ router bgp 65100
     neighbor 10.0.0.59 allowas-in 1
     neighbor 10.0.0.59 activate
     neighbor 10.0.0.59 soft-reconfiguration inbound
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   neighbor 10.0.0.61 remote-as 64600
   neighbor 10.0.0.61 description ARISTA03T1
@@ -43,7 +43,7 @@ router bgp 65100
     neighbor 10.0.0.61 allowas-in 1
     neighbor 10.0.0.61 activate
     neighbor 10.0.0.61 soft-reconfiguration inbound
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   neighbor 10.0.0.63 remote-as 64600
   neighbor 10.0.0.63 description ARISTA04T1
@@ -51,7 +51,7 @@ router bgp 65100
     neighbor 10.0.0.63 allowas-in 1
     neighbor 10.0.0.63 activate
     neighbor 10.0.0.63 soft-reconfiguration inbound
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   neighbor fc00::7e remote-as 64600
   neighbor fc00::7e description ARISTA04T1
@@ -59,7 +59,7 @@ router bgp 65100
     neighbor fc00::7e allowas-in 1
     neighbor fc00::7e activate
     neighbor fc00::7e soft-reconfiguration inbound
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   neighbor fc00::7a remote-as 64600
   neighbor fc00::7a description ARISTA03T1
@@ -67,7 +67,7 @@ router bgp 65100
     neighbor fc00::7a allowas-in 1
     neighbor fc00::7a activate
     neighbor fc00::7a soft-reconfiguration inbound
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   neighbor 10.0.0.57 remote-as 64600
   neighbor 10.0.0.57 description ARISTA01T1
@@ -75,7 +75,7 @@ router bgp 65100
     neighbor 10.0.0.57 allowas-in 1
     neighbor 10.0.0.57 activate
     neighbor 10.0.0.57 soft-reconfiguration inbound
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   neighbor fc00::76 remote-as 64600
   neighbor fc00::76 description ARISTA02T1
@@ -83,7 +83,7 @@ router bgp 65100
     neighbor fc00::76 allowas-in 1
     neighbor fc00::76 activate
     neighbor fc00::76 soft-reconfiguration inbound
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   neighbor fc00::72 remote-as 64600
   neighbor fc00::72 description ARISTA01T1
@@ -91,10 +91,10 @@ router bgp 65100
     neighbor fc00::72 allowas-in 1
     neighbor fc00::72 activate
     neighbor fc00::72 soft-reconfiguration inbound
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
 !
-maximum-paths 64
+maximum-paths 514
 !
 route-map ISOLATE permit 10
 set as-path prepend 65100
diff --git a/src/sonic-config-engine/tests/sample_output/py2/frr.conf b/src/sonic-config-engine/tests/sample_output/py2/frr.conf
index 032adb8c5106..679871f68a2a 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/frr.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/frr.conf
@@ -87,10 +87,10 @@ router bgp 65100
 !
 !
   address-family ipv4
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   address-family ipv6
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
 !
 ! end of template: bgpd/bgpd.main.conf.j2
diff --git a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-bgpd.conf b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-bgpd.conf
index 32a9abf88bac..0b0446aad9e2 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-bgpd.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-bgpd.conf
@@ -35,7 +35,7 @@ router bgp 4000 vrf VnetFE
   address-family ipv4 unicast
     neighbor 192.168.0.1 activate
     neighbor 192.168.0.1 soft-reconfiguration inbound
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   address-family l2vpn evpn
     advertise ipv4 unicast
@@ -74,10 +74,10 @@ router bgp 4000
 !
 !
   address-family ipv4
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   address-family ipv6
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
 !
 ! end of template: bgpd/bgpd.main.conf.j2
diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr.conf
index e5ad8964454a..5db248ab8521 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr.conf
@@ -67,10 +67,10 @@ router bgp 65100
 !
 !
   address-family ipv4
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   address-family ipv6
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
 !
 ! end of template: bgpd/bgpd.main.conf.j2
diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_backend_asic.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_backend_asic.conf
index 45cd03a540a8..ab7f99d43cdf 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_backend_asic.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_backend_asic.conf
@@ -76,10 +76,10 @@ router bgp 65100
 !
 !
   address-family ipv4
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   address-family ipv6
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
 !
 ! end of template: bgpd/bgpd.main.conf.j2
diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_bmp.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_bmp.conf
index 8a6ceb39e6ba..827b287e57f1 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_bmp.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_bmp.conf
@@ -77,10 +77,10 @@ router bgp 65100
 !
 !
   address-family ipv4
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   address-family ipv6
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
 !
 ! end of template: bgpd/bgpd.main.conf.j2
diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_dualtor.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_dualtor.conf
index 0ada9a4f8d60..2d769fc05dd1 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_dualtor.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_dualtor.conf
@@ -68,10 +68,10 @@ router bgp 65100
 !
 !
   address-family ipv4
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   address-family ipv6
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
 !
 ! end of template: bgpd/bgpd.main.conf.j2
diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_frontend_asic.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_frontend_asic.conf
index 8daeff2a61e9..b84ff10f590d 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_frontend_asic.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_frontend_asic.conf
@@ -82,10 +82,10 @@ router bgp 65100
   exit-address-family
 !
   address-family ipv4
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   address-family ipv6
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
 !
 ! end of template: bgpd/bgpd.main.conf.j2
diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_quagga.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_quagga.conf
index 72988e555261..6c2734473939 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_quagga.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_quagga.conf
@@ -35,7 +35,7 @@ router bgp 65100
     neighbor 10.0.0.57 allowas-in 1
     neighbor 10.0.0.57 activate
     neighbor 10.0.0.57 soft-reconfiguration inbound
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   neighbor fc00::72 remote-as 64600
   neighbor fc00::72 description ARISTA01T1
@@ -43,7 +43,7 @@ router bgp 65100
     neighbor fc00::72 allowas-in 1
     neighbor fc00::72 activate
     neighbor fc00::72 soft-reconfiguration inbound
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   neighbor 10.0.0.59 remote-as 64600
   neighbor 10.0.0.59 description ARISTA02T1
@@ -51,7 +51,7 @@ router bgp 65100
     neighbor 10.0.0.59 allowas-in 1
     neighbor 10.0.0.59 activate
     neighbor 10.0.0.59 soft-reconfiguration inbound
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   neighbor fc00::76 remote-as 64600
   neighbor fc00::76 description ARISTA02T1
@@ -59,7 +59,7 @@ router bgp 65100
     neighbor fc00::76 allowas-in 1
     neighbor fc00::76 activate
     neighbor fc00::76 soft-reconfiguration inbound
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   neighbor 10.0.0.61 remote-as 64600
   neighbor 10.0.0.61 description ARISTA03T1
@@ -67,7 +67,7 @@ router bgp 65100
     neighbor 10.0.0.61 allowas-in 1
     neighbor 10.0.0.61 activate
     neighbor 10.0.0.61 soft-reconfiguration inbound
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   neighbor fc00::7a remote-as 64600
   neighbor fc00::7a description ARISTA03T1
@@ -75,7 +75,7 @@ router bgp 65100
     neighbor fc00::7a allowas-in 1
     neighbor fc00::7a activate
     neighbor fc00::7a soft-reconfiguration inbound
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   neighbor 10.0.0.63 remote-as 64600
   neighbor 10.0.0.63 description ARISTA04T1
@@ -83,7 +83,7 @@ router bgp 65100
     neighbor 10.0.0.63 allowas-in 1
     neighbor 10.0.0.63 activate
     neighbor 10.0.0.63 soft-reconfiguration inbound
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   neighbor fc00::7e remote-as 64600
   neighbor fc00::7e description ARISTA04T1
@@ -91,10 +91,10 @@ router bgp 65100
     neighbor fc00::7e allowas-in 1
     neighbor fc00::7e activate
     neighbor fc00::7e soft-reconfiguration inbound
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
 !
-maximum-paths 64
+maximum-paths 514
 !
 route-map ISOLATE permit 10
 set as-path prepend 65100
diff --git a/src/sonic-config-engine/tests/sample_output/py3/frr.conf b/src/sonic-config-engine/tests/sample_output/py3/frr.conf
index d0821f1b11ca..17d7f561db03 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/frr.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/frr.conf
@@ -87,10 +87,10 @@ router bgp 65100
 !
 !
   address-family ipv4
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   address-family ipv6
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
 !
 ! end of template: bgpd/bgpd.main.conf.j2
diff --git a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-bgpd.conf b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-bgpd.conf
index 32a9abf88bac..0b0446aad9e2 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-bgpd.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-bgpd.conf
@@ -35,7 +35,7 @@ router bgp 4000 vrf VnetFE
   address-family ipv4 unicast
     neighbor 192.168.0.1 activate
     neighbor 192.168.0.1 soft-reconfiguration inbound
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   address-family l2vpn evpn
     advertise ipv4 unicast
@@ -74,10 +74,10 @@ router bgp 4000
 !
 !
   address-family ipv4
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
   address-family ipv6
-    maximum-paths 64
+    maximum-paths 514
   exit-address-family
 !
 ! end of template: bgpd/bgpd.main.conf.j2

From 590c9a3294931dc25b8a6e1ccf46083d7ba74a55 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 6 Dec 2024 01:01:02 +0800
Subject: [PATCH 326/364] [submodule] Update submodule sonic-dbsyncd to the
 latest HEAD automatically (#21040)

#### Why I did it
src/sonic-dbsyncd
```
* 7ad34f6 - (HEAD -> master, origin/master, origin/HEAD) [ci] Fix pipeline issue caused by dist upgrade (#72) (53 minutes ago) [Liu Shilong]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-dbsyncd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-dbsyncd b/src/sonic-dbsyncd
index d5fa7937a4e3..7ad34f6f961f 160000
--- a/src/sonic-dbsyncd
+++ b/src/sonic-dbsyncd
@@ -1 +1 @@
-Subproject commit d5fa7937a4e38ce0356368977ab4ba89090b2209
+Subproject commit 7ad34f6f961ff9dc22c6b382d64ebb249d8ec593

From d1c7c2792c137bc4ff8bf5f11156a0268d93769f Mon Sep 17 00:00:00 2001
From: jhli-cisco <93410383+jhli-cisco@users.noreply.github.com>
Date: Thu, 5 Dec 2024 09:01:40 -0800
Subject: [PATCH 327/364] add express-boot support (#17369)

Add express-boot support
---
 files/build_templates/docker_image_ctl.j2               | 7 +++++--
 files/image_config/watchdog-control/watchdog-control.sh | 3 +++
 files/scripts/syncd_common.sh                           | 3 +++
 3 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index dac3469727d9..48e387e23cd3 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -73,6 +73,9 @@ function getBootType()
     *SONIC_BOOT_TYPE=fastfast*)
         TYPE='fastfast'
         ;;
+    *SONIC_BOOT_TYPE=express*)
+        TYPE='express'
+        ;;
     *SONIC_BOOT_TYPE=fast*|*fast-reboot*)
         TYPE='fast'
         ;;
@@ -87,7 +90,7 @@ function preStartAction()
 {%- if docker_container_name == "database" %}
     WARM_DIR=/host/warmboot
     if [ "$DATABASE_TYPE" != "chassisdb" ]; then
-        if [[ ("$BOOT_TYPE" == "warm" || "$BOOT_TYPE" == "fastfast" || "$BOOT_TYPE" == "fast")  && -f $WARM_DIR/dump.rdb ]]; then
+        if [[ ("$BOOT_TYPE" == "warm" || "$BOOT_TYPE" == "fastfast" || "$BOOT_TYPE" == "express" || "$BOOT_TYPE" == "fast")  && -f $WARM_DIR/dump.rdb ]]; then
             # Load redis content from /host/warmboot/dump.rdb
             docker cp $WARM_DIR/dump.rdb database$DEV:/var/lib/redis/dump.rdb
         else
@@ -235,7 +238,7 @@ function postStartAction()
           sleep 1;
         done
 
-        if [[ ("$BOOT_TYPE" == "warm" || "$BOOT_TYPE" == "fastfast" || "$BOOT_TYPE" == "fast") && -f $WARM_DIR/dump.rdb ]]; then
+        if [[ ("$BOOT_TYPE" == "warm" || "$BOOT_TYPE" == "fastfast" || "$BOOT_TYPE" == "express" || "$BOOT_TYPE" == "fast") && -f $WARM_DIR/dump.rdb ]]; then
             # retain the dump file from last boot for debugging purposes
             mv $WARM_DIR/dump.rdb $WARM_DIR/dump.rdb.old
         else
diff --git a/files/image_config/watchdog-control/watchdog-control.sh b/files/image_config/watchdog-control/watchdog-control.sh
index 892039964620..f01b21d7e695 100755
--- a/files/image_config/watchdog-control/watchdog-control.sh
+++ b/files/image_config/watchdog-control/watchdog-control.sh
@@ -22,6 +22,9 @@ function getBootType()
     *SONIC_BOOT_TYPE=fastfast*)
         TYPE='fastfast'
         ;;
+    *SONIC_BOOT_TYPE=express*)
+        TYPE='express'
+        ;;
     *SONIC_BOOT_TYPE=fast*|*fast-reboot*)
         TYPE='fast'
         ;;
diff --git a/files/scripts/syncd_common.sh b/files/scripts/syncd_common.sh
index 826cdd731ba6..d3a8b0df7c42 100755
--- a/files/scripts/syncd_common.sh
+++ b/files/scripts/syncd_common.sh
@@ -81,6 +81,9 @@ function getBootType()
     *SONIC_BOOT_TYPE=fastfast*)
         TYPE='fastfast'
         ;;
+    *SONIC_BOOT_TYPE=express*)
+        TYPE='express'
+        ;;
     *SONIC_BOOT_TYPE=fast*|*fast-reboot*)
         # check that the key exists
         SYSTEM_FAST_REBOOT=`sonic-db-cli STATE_DB hget "FAST_RESTART_ENABLE_TABLE|system" enable`

From f7014a3cbab56d1c7e1d0f078565378b2684085a Mon Sep 17 00:00:00 2001
From: guoguojia2021 <guozhongfeng.gzf@alibaba-inc.com>
Date: Fri, 6 Dec 2024 01:23:36 +0800
Subject: [PATCH 328/364] [FRR] Enable pathd in frr (#20683)

[FRR] Enable pathd in frr

Signed-off-by: guozhongfeng.gzf@alibaba-inc.com
---
 .../frr/supervisord/critical_processes.j2          |  1 +
 .../frr/supervisord/supervisord.conf.j2            | 14 ++++++++++++++
 platform/vs/docker-sonic-vs/supervisord.conf.j2    |  8 ++++++++
 3 files changed, 23 insertions(+)

diff --git a/dockers/docker-fpm-frr/frr/supervisord/critical_processes.j2 b/dockers/docker-fpm-frr/frr/supervisord/critical_processes.j2
index 69f4e8e6931e..eea54fcfd55f 100644
--- a/dockers/docker-fpm-frr/frr/supervisord/critical_processes.j2
+++ b/dockers/docker-fpm-frr/frr/supervisord/critical_processes.j2
@@ -6,6 +6,7 @@ program:fpmsyncd
 program:bfdd
 program:ospfd
 program:pimd
+program:pathd
 program:frrcfgd
 {%- else %}
 program:bgpcfgd
diff --git a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
index 0a26dd51c3fa..113289af3b78 100644
--- a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
+++ b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
@@ -208,3 +208,17 @@ stderr_logfile=syslog
 dependent_startup=true
 dependent_startup_wait_for=bgpd:running
 {% endif %}
+
+{% if DEVICE_METADATA.localhost.frr_mgmt_framework_config is defined and DEVICE_METADATA.localhost.frr_mgmt_framework_config == "true" %}
+[program:pathd]
+command=/usr/lib/frr/pathd -A 127.0.0.1
+priority=5
+stopsignal=KILL
+autostart=false
+autorestart=false
+startsecs=0
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=zebra:running
+{% endif %}
diff --git a/platform/vs/docker-sonic-vs/supervisord.conf.j2 b/platform/vs/docker-sonic-vs/supervisord.conf.j2
index 019f95c6060d..8f0524338a09 100644
--- a/platform/vs/docker-sonic-vs/supervisord.conf.j2
+++ b/platform/vs/docker-sonic-vs/supervisord.conf.j2
@@ -206,6 +206,14 @@ stderr_logfile=syslog
 environment=ASAN_OPTIONS="log_path=/var/log/asan/fpmsyncd-asan.log{{ asan_extra_options }}"
 {% endif %}
 
+[program:pathd]
+command=/usr/lib/frr/pathd -A 127.0.0.1
+priority=14
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+
 [program:arp_update]
 command=/usr/bin/arp_update
 priority=16

From 8dbec05f2ee9eb3fdf97f2c4ea032dba8f94b294 Mon Sep 17 00:00:00 2001
From: Ashwin Srinivasan <93744978+assrinivasan@users.noreply.github.com>
Date: Thu, 5 Dec 2024 13:51:01 -0800
Subject: [PATCH 329/364] Code optimizations to reduce disk writes on SONiC
 switches (#20640)

Why I did it
This PR contains various optimizations to reduce disk writes on SONiC switches as mentioned in the High-level Design.

This contributes to the overall reduction in data written to the disk over time, which can help extend the life of the disk and reduce the risk of disk failure.

Work item tracking
Microsoft ADO (number only): 28300356

How I did it
Moved supervisord logs within swss to tmpfs
Optimized away repeated disk writes by vtysh in the bgp container
Moved monit and logrotate writers to tmpfs

How to verify it
Flash image with these optimizations onto a sonic switch and check the following:

Within swss container, supervisord logs are written to /dev/shm/supervisor/
Within bgp container, verify that ~/.history_frr file is not written into repeatedly with show bgp summary json
Verify that monit state file is in /dev/shm/monit
Verify that logrotate status file is in /dev/shm/logrotate
---
 dockers/docker-orchagent/docker-init.j2             | 2 +-
 files/build_templates/docker_image_ctl.j2           | 1 +
 files/build_templates/sonic_debian_extension.j2     | 5 +++++
 files/image_config/logrotate/logrotateOverride.conf | 6 +++++-
 files/image_config/monit/monitrc                    | 6 +++---
 files/initramfs-tools/union-mount.j2                | 3 +++
 src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py           | 2 +-
 src/sonic-bgpcfgd/bgpmon/bgpmon.py                  | 2 +-
 src/sonic-bgpcfgd/tests/test_bgp.py                 | 2 +-
 9 files changed, 21 insertions(+), 8 deletions(-)

diff --git a/dockers/docker-orchagent/docker-init.j2 b/dockers/docker-orchagent/docker-init.j2
index 41dbe27285f1..af37252a7a71 100755
--- a/dockers/docker-orchagent/docker-init.j2
+++ b/dockers/docker-orchagent/docker-init.j2
@@ -3,7 +3,7 @@
 mkdir -p /etc/swss/config.d/
 mkdir -p /etc/supervisor/
 mkdir -p /etc/supervisor/conf.d/
-
+mkdir -p /dev/shm/supervisor/
 
 CFGGEN_PARAMS=" \
     -d \
diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 48e387e23cd3..3a7159d9e4ff 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -633,6 +633,7 @@ start() {
 {%- endif %}
         -e RUNTIME_OWNER=local \
         --uts=host \{# W/A: this should be set per-docker, for those dockers which really need host's UTS namespace #}
+	--tmpfs /var/log/supervisor:rw \
 {%- if install_debug_image == "y" %}
         -v /src:/src:ro -v /debug:/debug:rw \
 {%- endif %}
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index c41d32a47ca3..2217859dd827 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -104,6 +104,11 @@ sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-nettools_*.deb || \
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
 sudo setcap 'cap_net_raw=+ep' $FILESYSTEM_ROOT/usr/bin/wol
 
+# This is needed for moving monit logs, state and logrotate status to tmpfs
+sudo bash -c "echo \"d	/dev/shm/monit/ 0755 root root\" > $FILESYSTEM_ROOT/etc/tmpfiles.d/tmpfs-monit.conf"
+sudo bash -c "echo \"d	/dev/shm/logrotate/ 0755 root root\" > $FILESYSTEM_ROOT/etc/tmpfiles.d/tmpfs-logrotate.conf"
+
+
 # Install a patched version of ifupdown2  (and its dependencies via 'apt-get -y install -f')
 sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/ifupdown2_*.deb || \
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
diff --git a/files/image_config/logrotate/logrotateOverride.conf b/files/image_config/logrotate/logrotateOverride.conf
index adc85ff306b5..64e181aa7c4a 100644
--- a/files/image_config/logrotate/logrotateOverride.conf
+++ b/files/image_config/logrotate/logrotateOverride.conf
@@ -1,2 +1,6 @@
 [Unit]
-Requires=logrotate-config.service
\ No newline at end of file
+Requires=logrotate-config.service
+
+[Service]
+ExecStart=
+ExecStart=/usr/sbin/logrotate --state /dev/shm/logrotate/status /etc/logrotate.conf
diff --git a/files/image_config/monit/monitrc b/files/image_config/monit/monitrc
index 74068f12d3f8..e3b252fcea75 100644
--- a/files/image_config/monit/monitrc
+++ b/files/image_config/monit/monitrc
@@ -38,7 +38,7 @@
 ## default the file is placed in $HOME/.monit.id.
 #
 # set idfile /var/.monit.id
-  set idfile /var/lib/monit/id
+  set idfile /dev/shm/monit/id
 #
 ## Set the location of the Monit state file which saves monitoring states
 ## on each cycle. By default the file is placed in $HOME/.monit.state. If
@@ -46,7 +46,7 @@
 ## the monitoring state across reboots. If it is on temporary filesystem, the
 ## state will be lost on reboot which may be convenient in some situations.
 #
-  set statefile /var/lib/monit/state
+  set statefile /dev/shm/monit/state
 #
 #
 
@@ -91,7 +91,7 @@
 ## available in the back end filesystem).
 #
   set eventqueue
-      basedir /var/lib/monit/events # set the base directory where events will be stored
+      basedir /dev/shm/monit/events # set the base directory where events will be stored
       slots 100                     # optionally limit the queue size
 #
 #
diff --git a/files/initramfs-tools/union-mount.j2 b/files/initramfs-tools/union-mount.j2
index fccd21f415ef..8f8abb8f6af5 100644
--- a/files/initramfs-tools/union-mount.j2
+++ b/files/initramfs-tools/union-mount.j2
@@ -212,6 +212,9 @@ mkdir -p ${rootmnt}/boot
 mkdir -p ${rootmnt}/host/$image_dir/boot
 mount --bind ${rootmnt}/host/$image_dir/boot ${rootmnt}/boot
 
+## Mount the /tmp directory as tmpfs
+mount -t tmpfs -o rw,nosuid,nodev,size=25% tmpfs ${rootmnt}/tmp
+
 ## Mount loop device or tmpfs for /var/log
 if $logs_inram; then
     # NOTE: some platforms, when reaching initramfs stage, have a small
diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
index 0b07f9cbcda7..19e478578c1d 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
@@ -387,7 +387,7 @@ def load_peers():
         Load peers from FRR.
         :return: set of peers, which are already installed in FRR
         """
-        command = ["vtysh", "-c", "show bgp vrfs json"]
+        command = ["vtysh", "-H", "/dev/null", "-c", "show bgp vrfs json"]
         ret_code, out, err = run_command(command)
         if ret_code == 0:
             js_vrf = json.loads(out)
diff --git a/src/sonic-bgpcfgd/bgpmon/bgpmon.py b/src/sonic-bgpcfgd/bgpmon/bgpmon.py
index 26a5b245413e..2623ec62482f 100755
--- a/src/sonic-bgpcfgd/bgpmon/bgpmon.py
+++ b/src/sonic-bgpcfgd/bgpmon/bgpmon.py
@@ -77,7 +77,7 @@ def update_new_peer_states(self, peer_dict):
 
     # Get a new snapshot of BGP neighbors and store them in the "new" location
     def get_all_neigh_states(self):
-        cmd = ["vtysh", "-c", 'show bgp summary json']
+        cmd = ["vtysh", "-H", "/dev/null",  "-c", 'show bgp summary json']
         retry_attempt = 0
 
         while retry_attempt < self.MAX_RETRY_ATTEMPTS:
diff --git a/src/sonic-bgpcfgd/tests/test_bgp.py b/src/sonic-bgpcfgd/tests/test_bgp.py
index 5b494af4d79a..b9240cccb8e0 100644
--- a/src/sonic-bgpcfgd/tests/test_bgp.py
+++ b/src/sonic-bgpcfgd/tests/test_bgp.py
@@ -32,7 +32,7 @@ def constructor(constants_path, bgp_router_id="", peer_type="general", with_lo0_
     }
 
     return_value_map = {
-        "['vtysh', '-c', 'show bgp vrfs json']": (0, "{\"vrfs\": {\"default\": {}}}", ""),
+        "['vtysh', '-H', '/dev/null', '-c', 'show bgp vrfs json']": (0, "{\"vrfs\": {\"default\": {}}}", ""),
         "['vtysh', '-c', 'show bgp vrf default neighbors json']": (0, "{\"10.10.10.1\": {}, \"20.20.20.1\": {}, \"fc00:10::1\": {}}", "")
     }
 

From c57f7271283a0ecce67b4ca24d32f176dbbaf992 Mon Sep 17 00:00:00 2001
From: Gagan Punathil Ellath <gpunathilell@nvidia.com>
Date: Thu, 5 Dec 2024 15:09:44 -0800
Subject: [PATCH 330/364] [Mellanox][Smartswitch] Platform API for Smartswtich
 (#20944)

[Mellanox][Smartswitch] Platform API for Smartswtich
---
 .../sonic_platform/chassis.py                 | 152 +++++++++
 .../sonic_platform/module.py                  | 303 +++++++++++++++++-
 .../sonic_platform/platform.py                |  11 +-
 .../mlnx-platform-api/sonic_platform/utils.py |   7 +-
 .../mlnx-platform-api/tests/test_chassis.py   |  82 ++++-
 .../mlnx-platform-api/tests/test_module.py    | 235 +++++++++++++-
 6 files changed, 772 insertions(+), 18 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
index bb7eb6a43288..74b096c1e8ce 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
@@ -1198,3 +1198,155 @@ def get_sfp(self, index):
             return None
 
         return module.get_sfp(sfp_index - 1)
+
+class SmartSwitchChassis(Chassis):
+    def __init__(self):
+        super(SmartSwitchChassis, self).__init__()
+        self.module_initialized_count = 0
+        self.module_name_index_map = {}
+        self.initialize_modules()
+
+    def is_modular_chassis(self):
+        """
+        Retrieves whether the sonic instance is part of modular chassis
+
+        Returns:
+            A bool value, should return False by default or for fixed-platforms.
+            Should return True for supervisor-cards, line-cards etc running as part
+            of modular-chassis.
+            For SmartSwitch platforms this should return True even if they are
+            fixed-platforms, as they are treated like a modular chassis as the
+            DPU cards are treated like line-cards of a modular-chassis.
+        """
+        return False
+
+    ##############################################
+    # Module methods
+    ##############################################
+    def initialize_single_module(self, index):
+        count = self.get_num_modules()
+        if index < 0:
+            raise RuntimeError(f"Invalid index = {index} for module initialization with total module count = {count}")
+        if index >= count:
+            return
+        if not self._module_list:
+            self._module_list = [None] * count
+        if not self._module_list[index]:
+            from .module import DpuModule
+            module = DpuModule(index)
+            self._module_list[index] = module
+            self.module_name_index_map[module.get_name()] = index
+            self.module_initialized_count += 1
+
+    def initialize_modules(self):
+        count = self.get_num_modules()
+        for index in range(count):
+            self.initialize_single_module(index=index)
+
+    def get_num_modules(self):
+        """
+        Retrieves the number of modules available on this chassis
+        On a SmarSwitch chassis this includes the number of DPUs.
+
+        Returns:
+            An integer, the number of modules available on this chassis
+        """
+        return DeviceDataManager.get_dpu_count()
+
+    def get_all_modules(self):
+        """
+        Retrieves all modules available on this chassis. On a SmarSwitch
+        chassis this includes the number of DPUs.
+
+        Returns:
+            A list of objects derived from ModuleBase representing all
+            modules available on this chassis
+        """
+        self.initialize_modules()
+        return self._module_list
+
+    def get_module(self, index):
+        """
+        Retrieves module represented by (0-based) index <index>
+        On a SmartSwitch index:0 will fetch switch, index:1 will fetch
+        DPU0 and so on
+
+        Args:
+            index: An integer, the index (0-based) of the module to
+            retrieve
+
+        Returns:
+            An object dervied from ModuleBase representing the specified
+            module
+        """
+        self.initialize_single_module(index)
+        return super(SmartSwitchChassis, self).get_module(index)
+
+    def get_module_index(self, module_name):
+        """
+        Retrieves module index from the module name
+
+        Args:
+            module_name: A string, prefixed by SUPERVISOR, LINE-CARD or FABRIC-CARD
+            Ex. SUPERVISOR0, LINE-CARD1, FABRIC-CARD5
+            SmartSwitch Example: SWITCH, DPU1, DPU2 ... DPUX
+
+        Returns:
+            An integer, the index of the ModuleBase object in the module_list
+        """
+        return self.module_name_index_map[module_name.upper()]
+
+    ##############################################
+    # SmartSwitch methods
+    ##############################################
+
+    def get_dpu_id(self, name):
+        """
+        Retrieves the DPU ID for the given dpu-module name.
+        Returns None for non-smartswitch chassis.
+        Returns:
+            An integer, indicating the DPU ID Ex: name:DPU0 return value 1,
+            name:DPU1 return value 2, name:DPUX return value X+1
+        """
+        module = self.get_module(self.get_module_index(name))
+        return module.get_dpu_id()
+
+    def is_smartswitch(self):
+        """
+        Retrieves whether the sonic instance is part of smartswitch
+        Returns:
+            Returns:True for SmartSwitch and False for other platforms
+        """
+        return True
+
+    def init_midplane_switch(self):
+        """
+        Initializes the midplane functionality of the modular chassis. For
+        example, any validation of midplane, populating any lookup tables etc
+        can be done here. The expectation is that the required kernel modules,
+        ip-address assignment etc are done before the pmon, database dockers
+        are up.
+
+        Returns:
+            A bool value, should return True if the midplane initialized
+            successfully.
+        """
+        return True
+
+    def get_module_dpu_data_port(self, index):
+        """
+        Retrieves the DPU data port NPU-DPU association represented for
+        the DPU index. Platforms that need to overwrite the platform.json
+        file will use this API. This is valid only on the Switch and not on DPUs
+        Args:
+        index: An integer, the index of the module to retrieve
+        Returns:
+            A string giving the NPU-DPU port association:
+            Ex: For index: 1 will return the dup0 port association which is
+            "Ethernet-BP0: Ethernet0" where the string left of ":" (Ethernet-BP0)
+            is the NPU port and the string right of ":" (Ethernet0) is the DPU port
+        """
+        platform_dpus_data = DeviceDataManager.get_platform_dpus_data()
+        module = self._module_list[index]
+        module_name = module.get_name()
+        return platform_dpus_data[module_name.lower()]["interface"]
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/module.py b/platform/mellanox/mlnx-platform-api/sonic_platform/module.py
index 765314d7baf0..7dc5167473e5 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/module.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/module.py
@@ -1,6 +1,7 @@
 #
-# Copyright (c) 2021 NVIDIA CORPORATION & AFFILIATES.
-# Apache-2.0
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
 # you may not use this file except in compliance with the License.
@@ -18,14 +19,19 @@
 import redis
 import threading
 from sonic_platform_base.module_base import ModuleBase
-from sonic_py_common.logger import Logger
+from sonic_platform_base.chassis_base import ChassisBase
+from sonic_py_common.syslogger import SysLogger
+from .dpuctlplat import DpuCtlPlat, BootProgEnum
+import subprocess
 
 from . import utils
-from .device_data import DeviceDataManager
+from .device_data import DeviceDataManager, DpuInterfaceEnum
 from .vpd_parser import VpdParser
+from .dpu_vpd_parser import DpuVpdParser
+from swsscommon.swsscommon import ConfigDBConnector, SonicV2Connector
 
 # Global logger class instance
-logger = Logger()
+logger = SysLogger()
 
 
 class Module(ModuleBase):
@@ -247,3 +253,290 @@ def get_sfp(self, index):
         with self.lock:
             self.initialize_single_sfp(index)
             return super(Module, self).get_sfp(index)
+
+
+class DpuModule(ModuleBase):
+
+    def __init__(self, dpu_id):
+        super(DpuModule, self).__init__()
+        self.dpu_id = dpu_id
+        self._name = f"DPU{self.dpu_id}"
+        self.dpuctl_obj = DpuCtlPlat(self._name.lower())
+        self.fault_state = False
+        self.dpu_vpd_parser = DpuVpdParser('/var/run/hw-management/eeprom/vpd_data', self.dpuctl_obj._name.upper())
+        self.CONFIG_DB_NAME = "CONFIG_DB"
+        self.DHCP_SERVER_HASH = f"DHCP_SERVER_IPV4_PORT|bridge-midplane|{self._name.lower()}"
+        self.DHCP_IP_ADDRESS_KEY = "ips@"
+        self.config_db = ConfigDBConnector(use_unix_socket_path=True)
+        self.config_db.connect()
+        self.midplane_ip = None
+        self.midplane_interface = None
+        self.bus_info = None
+        self.reboot_base_path = f"/var/run/hw-management/{self.dpuctl_obj._name}/system/"
+        self.reboot_cause_map = {
+            f'{self.reboot_base_path}reset_aux_pwr_or_reload':
+                (ChassisBase.REBOOT_CAUSE_POWER_LOSS, 'power auxiliary outage or reload'),
+            f'{self.reboot_base_path}reset_comex_pwr_fail':
+                (ChassisBase.REBOOT_CAUSE_POWER_LOSS, 'Power failed to comex module'),
+            f'{self.reboot_base_path}reset_from_main_board':
+                (ChassisBase.REBOOT_CAUSE_NON_HARDWARE, 'Reset from Main board'),
+            f'{self.reboot_base_path}reset_dpu_thermal':
+                (ChassisBase.REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER, 'Thermal shutdown of the DPU'),
+        }
+        self.chassis_state_db = SonicV2Connector(host="127.0.0.1")
+        self.chassis_state_db.connect(self.chassis_state_db.CHASSIS_STATE_DB)
+
+    def get_base_mac(self):
+        """
+        Retrieves the base MAC address for the module
+
+        Returns:
+            A string containing the MAC address in the format
+            'XX:XX:XX:XX:XX:XX'
+        """
+        return self.dpu_vpd_parser.get_dpu_base_mac()
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+
+        Returns:
+            string: Model/part number of device
+        """
+        return self.dpu_vpd_parser.get_dpu_model()
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+
+        Returns:
+            string: Serial number of device
+        """
+        return self.dpu_vpd_parser.get_dpu_serial()
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        return self.dpu_vpd_parser.get_dpu_revision()
+
+    def reboot(self, reboot_type=ModuleBase.MODULE_REBOOT_DPU):
+        """
+        Request to reboot the module
+
+        Args:
+            reboot_type: A string, the type of reboot requested from one of the
+            predefined reboot types: MODULE_REBOOT_DEFAULT, MODULE_REBOOT_CPU_COMPLEX,
+            MODULE_REBOOT_FPGA_COMPLEX or MODULE_REBOOT_DPU
+
+            MODULE_REBOOT_DPU is only applicable for smartswitch chassis.
+
+        Returns:
+            bool: True if the request has been issued successfully, False if not
+        """
+        # Skip pre shutdown and Post startup, handled by pci_detach and pci_reattach
+        if reboot_type == ModuleBase.MODULE_REBOOT_DPU:
+            return self.dpuctl_obj.dpu_reboot(skip_pre_post=True)
+        elif reboot_type == ModuleBase.MODULE_REBOOT_SMARTSWITCH:
+            # Do not wait for result if we are rebooting NPU + DPUs
+            return self.dpuctl_obj.dpu_reboot(no_wait=True, skip_pre_post=True)
+        raise RuntimeError(f"Invalid Reboot Type provided for {self._name}: {reboot_type}")
+
+    def set_admin_state(self, up):
+        """
+        Request to keep the card in administratively up/down state.
+        The down state will power down the module and the status should show
+        MODULE_STATUS_OFFLINE.
+        The up state will take the module to MODULE_STATUS_FAULT or
+        MODULE_STATUS_ONLINE states.
+
+        Args:
+            up: A boolean, True to set the admin-state to UP. False to set the
+            admin-state to DOWN.
+
+        Returns:
+            bool: True if the request has been issued successfully, False if not
+        """
+        if up:
+            if self.dpuctl_obj.dpu_power_on():
+                return True
+            logger.log_error(f"Failed to set the admin state for {self._name}")
+            return False
+        return self.dpuctl_obj.dpu_power_off()
+
+    def get_type(self):
+        """
+        Retrieves the type of the module.
+
+        Returns:
+            A string, the module-type from one of the predefined types:
+            MODULE_TYPE_SUPERVISOR, MODULE_TYPE_LINE or MODULE_TYPE_FABRIC
+            or MODULE_TYPE_DPU or MODULE_TYPE_SWITCH
+        """
+        return ModuleBase.MODULE_TYPE_DPU
+
+    def get_name(self):
+        """
+        Retrieves the type of the module.
+
+        Returns:
+            A string, the module-type from one of the predefined types:
+            MODULE_TYPE_SUPERVISOR, MODULE_TYPE_LINE or MODULE_TYPE_FABRIC
+            or MODULE_TYPE_DPU
+        """
+        return self._name
+
+    def get_description(self):
+        """
+        Retrieves the platform vendor's product description of the module
+
+        Returns:
+            A string, providing the vendor's product description of the module.
+        """
+        return "NVIDIA BlueField-3 DPU"
+
+    def get_oper_status(self):
+        boot_prog = self.dpuctl_obj.read_boot_prog()
+        if boot_prog == BootProgEnum.OS_RUN.value:
+            return ModuleBase.MODULE_STATUS_ONLINE
+        return ModuleBase.MODULE_STATUS_OFFLINE
+
+    ##############################################
+    # SmartSwitch methods
+    ##############################################
+
+    def get_dpu_id(self):
+        """
+        Retrieves the DPU ID. Returns None for non-smartswitch chassis.
+
+        Returns:
+            An integer, indicating the DPU ID. DPU0 returns 0, DPUX returns X
+            DPU ID can be greater than or equal to 0.
+        """
+        return self.dpu_id
+
+    def get_reboot_cause(self):
+        """
+        Retrieves the cause of the previous reboot of the DPU module
+        Returns:
+            A tuple (string, string) where the first element is a string
+            containing the cause of the previous reboot. This string must
+            be one of the predefined strings in this class. If the first
+            string is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be
+            used to pass a description of the reboot cause.
+            Some more causes are appended to the existing list to handle other
+            modules such as DPUs.
+            Ex: REBOOT_CAUSE_POWER_LOSS, REBOOT_CAUSE_HOST_RESET_DPU,
+            REBOOT_CAUSE_HOST_POWERCYCLED_DPU, REBOOT_CAUSE_SW_THERMAL,
+            REBOOT_CAUSE_DPU_SELF_REBOOT
+        """
+        for f, rd in self.reboot_cause_map.items():
+            if utils.read_int_from_file(f) == 1:
+                return rd
+        return ChassisBase.REBOOT_CAUSE_NON_HARDWARE, ''
+
+    def get_midplane_ip(self):
+        """
+        Retrieves the midplane IP-address of the module in a modular chassis
+        When called from the Supervisor, the module could represent the
+        line-card and return the midplane IP-address of the line-card.
+        When called from the line-card, the module will represent the
+        Supervisor and return its midplane IP-address.
+        When called from the DPU, returns the midplane IP-address of the dpu-card.
+        When called from the Switch returns the midplane IP-address of Switch.
+        Returns:
+            A string, the IP-address of the module reachable over the midplane
+        """
+        if not self.midplane_ip:
+            self.midplane_ip = self.config_db.get(self.CONFIG_DB_NAME, self.DHCP_SERVER_HASH, self.DHCP_IP_ADDRESS_KEY)
+        return self.midplane_ip
+
+    def is_midplane_reachable(self):
+        """
+        Retrieves the reachability status of the module from the Supervisor or
+        of the Supervisor from the module via the midplane of the modular chassis
+        Returns:
+            A bool value, should return True if module is reachable via midplane
+        """
+        if not self._is_midplane_up():
+            return False
+        command = ['ping', '-c', '1', '-W', '1', self.get_midplane_ip()]
+        try:
+            return subprocess.call(command, stdout=subprocess.DEVNULL, stderr=subprocess.DEVNULL) == 0
+        except Exception as e:
+            logger.log_error(f"Failed to check midplane reachability for {self.get_name()}! {e}")
+            return False
+
+    def get_midplane_interface(self):
+        if not self.midplane_interface:
+            # Cache the data to prevent multiple platform.json parsing
+            self.midplane_interface = DeviceDataManager.get_dpu_interface(self.get_name().lower(), DpuInterfaceEnum.MIDPLANE_INT.value)
+            # If we are unable to parse platform.json for midplane interface raise RunTimeError
+            if not self.midplane_interface:
+                raise RuntimeError(f"Unable to obtain midplane interface information from platform.json for {self.get_name()}")
+        return self.midplane_interface
+
+    def _is_midplane_up(self):
+        # If rshim is not activated then the interface does not exist, do not log the error
+        return utils.read_int_from_file(f'/sys/class/net/{self.get_midplane_interface()}/carrier', log_func=None) == 1
+
+    def get_pci_bus_info(self):
+        """
+        Retrieves the bus information.
+
+        Returns:
+            Returns the PCI bus information in BDF format like "[DDDD:]BB:SS:F"
+        """
+        if not self.bus_info:
+            # Cache the data to prevent multiple platform.json parsing
+            self.bus_info = DeviceDataManager.get_dpu_interface(self.get_name().lower(), DpuInterfaceEnum.PCIE_INT.value)
+            # If we are unable to parse platform.json for midplane interface raise RunTimeError
+            if not self.bus_info:
+                raise RuntimeError(f"Unable to obtain bus info from platform.json for {self.get_name()}")
+        return self.bus_info
+
+    def pci_detach(self):
+        """
+        Detaches the DPU PCI device specified by "module_name" on a SmartSwitch.
+
+        Returns: True once the PCI is successfully detached.
+        """
+        return self.dpuctl_obj.dpu_pre_shutdown()
+
+    def pci_reattach(self):
+        """
+        Rescans and reconnects the DPU PCI device specified by "module_name" on a SmartSwitch.
+
+        Returns: True once the PCI is successfully reconnected.
+        """
+        return self.dpuctl_obj.dpu_post_startup()
+
+    def get_hw_mgmt_id(self):
+        """
+        Obtains the id used by hw-mgmt API, so that we can use different APIs and access sysfs files provided
+        """
+        return self.dpu_id + 1
+
+    def get_temperature_dict(self):
+        """
+        This function is used to obtain the TEMPERATURE INFO TABLE from CHASSIS_STATE_DB
+        """
+        chassis_state_db_name = "CHASSIS_STATE_DB"
+        ddr = "DDR"
+        nvme = "NVME"
+        cpu = "CPU"
+        dpu_ddr_temperature_info_table = f"TEMPERATURE_INFO_{self.dpu_id}|{ddr}"
+        dpu_cpu_temperature_info_table = f"TEMPERATURE_INFO_{self.dpu_id}|{cpu}"
+        dpu_drive_temperature_info_table = f"TEMPERATURE_INFO_{self.dpu_id}|{nvme}"
+        return_dict = {}
+        try:
+            return_dict[ddr] = self.chassis_state_db.get_all(chassis_state_db_name, dpu_ddr_temperature_info_table)
+            return_dict[cpu] = self.chassis_state_db.get_all(chassis_state_db_name, dpu_cpu_temperature_info_table)
+            return_dict[nvme] = self.chassis_state_db.get_all(chassis_state_db_name, dpu_drive_temperature_info_table)
+        except Exception as e:
+            logger.log_error(f"Failed to check obtain DPU temperature informatoin for {self.get_name()}! {e}")
+            return {}
+        return return_dict
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/platform.py b/platform/mellanox/mlnx-platform-api/sonic_platform/platform.py
index 9100e8fb2f26..eb60329e7e04 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/platform.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/platform.py
@@ -1,6 +1,7 @@
 #
-# Copyright (c) 2019-2021 NVIDIA CORPORATION & AFFILIATES.
-# Apache-2.0
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
 # you may not use this file except in compliance with the License.
@@ -22,7 +23,7 @@
 
 try:
     from sonic_platform_base.platform_base import PlatformBase
-    from .chassis import Chassis, ModularChassis
+    from .chassis import Chassis, ModularChassis, SmartSwitchChassis
     from .device_data import DeviceDataManager
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
@@ -30,7 +31,9 @@
 class Platform(PlatformBase):
     def __init__(self):
         PlatformBase.__init__(self)
-        if DeviceDataManager.get_linecard_count() == 0:
+        if DeviceDataManager.get_dpu_count():
+            self._chassis = SmartSwitchChassis()
+        elif DeviceDataManager.get_linecard_count() == 0:
             self._chassis = Chassis()
         else:
             self._chassis = ModularChassis()
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py b/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py
index 77aad4a315c7..190299d3733e 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py
@@ -1,6 +1,7 @@
 #
-# Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES.
-# Apache-2.0
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
 # you may not use this file except in compliance with the License.
@@ -105,7 +106,7 @@ def read_float_from_file(file_path, default=0.0, raise_exception=False, log_func
 def _key_value_converter(content, delimeter):
     ret = {}
     for line in content.splitlines():
-        k,v = line.split(delimeter)
+        k,v = line.split(delimeter, 1)
         ret[k.strip()] = v.strip()
     return ret
 
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_chassis.py b/platform/mellanox/mlnx-platform-api/tests/test_chassis.py
index 19ceb7f29951..f07f164b7305 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_chassis.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_chassis.py
@@ -1,6 +1,7 @@
 #
-# Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES.
-# Apache-2.0
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
 # you may not use this file except in compliance with the License.
@@ -20,6 +21,7 @@
 import sys
 import subprocess
 import threading
+import pytest
 
 from mock import MagicMock
 if sys.version_info.major == 3:
@@ -33,7 +35,7 @@
 
 import sonic_platform.chassis
 from sonic_platform_base.sfp_base import SfpBase
-from sonic_platform.chassis import Chassis
+from sonic_platform.chassis import Chassis, SmartSwitchChassis
 from sonic_platform.device_data import DeviceDataManager
 
 sonic_platform.chassis.extract_RJ45_ports_index = mock.MagicMock(return_value=[])
@@ -342,3 +344,77 @@ def test_parse_vpd(self):
         chassis = Chassis()
         content = chassis._parse_vpd_data(os.path.join(test_path, 'vpd_data_file'))
         assert content.get('REV') == 'A7'
+
+    @mock.patch('sonic_platform.module.SonicV2Connector', mock.MagicMock())
+    @mock.patch('sonic_platform.module.ConfigDBConnector', mock.MagicMock())
+    def test_smartswitch(self):
+        orig_dpu_count = DeviceDataManager.get_dpu_count
+        DeviceDataManager.get_dpu_count = mock.MagicMock(return_value=4)
+        chassis = SmartSwitchChassis()
+
+        assert not chassis.is_modular_chassis()
+        assert chassis.is_smartswitch()
+        assert chassis.init_midplane_switch()
+
+        chassis._module_list = None
+        chassis.module_initialized_count = 0
+        chassis.module_name_index_map = {}
+        with pytest.raises(RuntimeError, match="Invalid index = -1 for module"
+                           " initialization with total module count = 4"):
+            chassis.initialize_single_module(-1)
+            chassis.get_module(-1)
+        with pytest.raises(KeyError):
+            chassis.get_module_index('DPU1')
+            chassis.get_module_index('DPU2')
+            chassis.get_dpu_id("DPU1")
+            chassis.get_dpu_id("DPU2")
+            chassis.get_dpu_id("DPU3")
+
+        DeviceDataManager.get_dpu_count = mock.MagicMock(return_value=0)
+        assert chassis.get_num_modules() == 0
+        with pytest.raises(TypeError):
+            chassis.get_module(0)
+        chassis.initialize_modules()
+        assert chassis.get_all_modules() is None
+
+        DeviceDataManager.get_dpu_count = mock.MagicMock(return_value=4)
+        from sonic_platform.module import DpuModule
+        assert isinstance(chassis.get_module(0), DpuModule)
+        assert chassis.get_module(4) is None
+
+        chassis.initialize_modules()
+        assert chassis.get_module_index('DPU0') == 0
+        assert chassis.get_module_index('DPU3') == 3
+        with pytest.raises(KeyError):
+            chassis.get_module_index('DPU10')
+            chassis.get_module_index('ABC')
+
+        assert chassis.get_num_modules() == 4
+        module_list = chassis.get_all_modules()
+        assert len(module_list) == 4
+        pl_data = {
+            "dpu0": {
+                "interface": {"Ethernet224": "Ethernet0"}
+            },
+            "dpu1": {
+                "interface": {"Ethernet232": "Ethernet0"}
+            },
+            "dpu2": {
+                "interface": {"EthernetX": "EthernetY"}
+            }
+        }
+        orig_dpus_data = DeviceDataManager.get_platform_dpus_data
+        DeviceDataManager.get_platform_dpus_data = mock.MagicMock(return_value=pl_data)
+        chassis.get_module_dpu_data_port(0) == str({"Ethernet232": "Ethernet0"})
+        with pytest.raises(IndexError):
+            assert chassis.get_module_dpu_data_port(5)
+            assert chassis.get_module_dpu_data_port(-1)
+
+        assert chassis.get_dpu_id("DPU1") == 1
+        assert chassis.get_dpu_id("DPU3") == 3
+        assert chassis.get_dpu_id("DPU2") == 2
+        with pytest.raises(KeyError):
+            chassis.get_dpu_id('DPU15')
+            chassis.get_dpu_id('ABC')
+        DeviceDataManager.get_platform_dpus_data = orig_dpus_data
+        DeviceDataManager.get_dpu_count = orig_dpu_count
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_module.py b/platform/mellanox/mlnx-platform-api/tests/test_module.py
index 4cba90ac95f4..f80eb602053a 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_module.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_module.py
@@ -1,6 +1,7 @@
 #
-# Copyright (c) 2021 NVIDIA CORPORATION & AFFILIATES.
-# Apache-2.0
+# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+# Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
 # you may not use this file except in compliance with the License.
@@ -17,6 +18,10 @@
 
 import os
 import sys
+import pytest
+import sonic_platform.utils
+import subprocess
+from mock import patch
 if sys.version_info.major == 3:
     from unittest import mock
 else:
@@ -28,9 +33,12 @@
 
 import sonic_platform.chassis
 from sonic_platform import utils
-from sonic_platform.chassis import ModularChassis
+from sonic_platform.chassis import ModularChassis, SmartSwitchChassis
 from sonic_platform.device_data import DeviceDataManager
 from sonic_platform.module import Module
+from sonic_platform_base.module_base import ModuleBase
+from sonic_platform_base.chassis_base import ChassisBase
+
 
 
 class TestModule:
@@ -39,6 +47,7 @@ def setup_class(cls):
         DeviceDataManager.get_linecard_sfp_count = mock.MagicMock(return_value=2)
         DeviceDataManager.get_linecard_count = mock.MagicMock(return_value=2)
         sonic_platform.chassis.extract_RJ45_ports_index = mock.MagicMock(return_value=[])
+        DeviceDataManager.get_dpu_count = mock.MagicMock(return_value=4)
 
     def test_chassis_get_num_sfp(self):
         chassis = ModularChassis()
@@ -49,6 +58,12 @@ def test_chassis_get_all_sfps(self):
         chassis = ModularChassis()
         assert len(chassis.get_all_sfps()) == 4
 
+    @patch('sonic_platform.module.SonicV2Connector', mock.MagicMock())
+    @patch('sonic_platform.module.ConfigDBConnector', mock.MagicMock())
+    def test_chassis_get_num_modules(self):
+        chassis = SmartSwitchChassis()
+        assert chassis.get_num_modules() == 4
+
     @mock.patch('sonic_platform.device_data.DeviceDataManager.get_linecard_max_port_count', mock.MagicMock(return_value=16))
     def test_chassis_get_sfp(self):
         utils.read_int_from_file = mock.MagicMock(return_value=1)
@@ -167,6 +182,8 @@ def test_check_state(self):
         assert len(m._sfp_list) == 0
         assert len(m._thermal_list) == 0
 
+    @patch('sonic_platform.module.SonicV2Connector', mock.MagicMock())
+    @patch('sonic_platform.module.ConfigDBConnector', mock.MagicMock())
     def test_module_vpd(self):
         m = Module(1)
         m.vpd_parser.vpd_file = os.path.join(test_path, 'mock_psu_vpd')
@@ -185,3 +202,215 @@ def test_module_vpd(self):
         assert m.get_model() == 'MTEF-PSF-AC-C'
         assert m.get_serial() == 'MT1946X07684'
         assert m.get_revision() == 'A3'
+
+        from sonic_platform.module import DpuModule
+        dm = DpuModule(2)
+        dm.dpu_vpd_parser.vpd_file_last_mtime = None
+        dm.dpu_vpd_parser.vpd_file = os.path.join(test_path, 'mock_psu_vpd_dpu')
+        # dpu2 in pmon = DPU3 in eeprom (1 based indexing is used in HW)
+        dpu_data = {
+            "DPU3_SN": "MT4431X26022",
+            "DPU3_PN": "SN4280BF3DPU2",
+            "DPU3_REV": "A0",
+            "DPU3_BASE_MAC": "90:0A:84:C6:00:B1"
+        }
+        dm.dpu_vpd_parser.vpd_data = dpu_data
+        with patch.object(dm.dpu_vpd_parser, '_get_data', wraps=mock.MagicMock(return_value=True)):
+            assert dm.get_base_mac() == "90:0A:84:C6:00:B1"
+            assert dm.get_model() == "SN4280BF3DPU2"
+            assert dm.get_serial() == "MT4431X26022"
+            assert dm.get_revision() == "A0"
+
+        dm.dpu_vpd_parser = None
+        with pytest.raises(AttributeError):
+            dm.get_base_mac()
+            dm.get_model()
+            dm.get_serial()
+            dm.get_revision()
+
+        dm = DpuModule(3)
+        # DPU4 is not present in the VPD Parser output
+        dm.dpu_vpd_parser.vpd_data = dpu_data
+        assert dm.get_base_mac() == "N/A"
+        assert dm.get_model() == "N/A"
+        assert dm.get_serial() == "N/A"
+        assert dm.get_revision() == "N/A"
+
+    @patch('sonic_platform.module.SonicV2Connector', mock.MagicMock())
+    @patch('swsscommon.swsscommon.ConfigDBConnector.connect', mock.MagicMock())
+    @mock.patch('swsscommon.swsscommon.ConfigDBConnector.get')
+    @mock.patch('subprocess.call')
+    def test_dpu_module(self, mock_call, mock_get):
+        from sonic_platform.module import DpuModule
+        m = DpuModule(3)
+        assert m.get_type() == ModuleBase.MODULE_TYPE_DPU
+        assert m.get_name() == "DPU3"
+        assert m.get_description() == "NVIDIA BlueField-3 DPU"
+        assert m.get_dpu_id() == 3
+        with patch.object(m.dpuctl_obj, "dpu_reboot") as mock_obj:
+            mock_obj.return_value = True
+            assert m.reboot() is True
+            mock_obj.assert_called_once_with(skip_pre_post=True)
+            mock_obj.reset_mock()
+            m.reboot(reboot_type=ModuleBase.MODULE_REBOOT_SMARTSWITCH)
+            mock_obj.assert_called_once_with(no_wait=True, skip_pre_post=True)
+            with pytest.raises(RuntimeError):
+                m.reboot("None")
+        with patch('sonic_py_common.syslogger.SysLogger.log_error') as mock_method:
+            m.dpuctl_obj.dpu_power_on = mock.MagicMock(return_value=True)
+            assert m.set_admin_state(True)
+            mock_method.assert_not_called()
+            m.dpuctl_obj.dpu_power_on = mock.MagicMock(return_value=False)
+            assert not m.set_admin_state(True)
+            mock_method.assert_called_once_with("Failed to set the admin state for DPU3")
+        m.dpuctl_obj.dpu_power_off = mock.MagicMock(return_value=True)
+        assert m.set_admin_state(False)
+        midplane_ips = {
+            "dpu0": "169.254.200.1",
+            "dpu1": "169.254.200.2",
+            "dpu2": "169.254.200.3",
+            "dpu3": "169.254.200.4"
+        }
+        def get_midplane_ip(DB_NAME, _hash, key):
+            dpu_name = _hash.split("|")[-1]
+            return midplane_ips.get(dpu_name)
+        mock_get.side_effect = get_midplane_ip
+        assert m.get_midplane_ip() == "169.254.200.4"
+        assert m.midplane_ip == "169.254.200.4"
+        mock_get.assert_called_with('CONFIG_DB', 'DHCP_SERVER_IPV4_PORT|bridge-midplane|dpu3', 'ips@')
+        m1 = DpuModule(2)
+        assert m1.get_midplane_ip() == "169.254.200.3"
+        assert m1.midplane_ip == "169.254.200.3"
+        mock_get.assert_called_with('CONFIG_DB', 'DHCP_SERVER_IPV4_PORT|bridge-midplane|dpu2', 'ips@')
+        mock_get.reset_mock()
+        mock_get.return_value = None
+        mock_get.side_effect = None
+        # We check for the IP only once in CONFIG_DB after initialization
+        assert m.get_midplane_ip() == "169.254.200.4"
+        mock_get.assert_not_called()
+        m.midplane_ip = None
+        m1.midplane_ip = None
+        assert not m.get_midplane_ip()
+        assert not m1.get_midplane_ip()
+        mock_get.side_effect = get_midplane_ip
+        with patch.object(m, '_is_midplane_up', ) as mock_midplane_m, \
+             patch.object(m1, '_is_midplane_up',) as mock_midplane_m1:
+            mock_midplane_m.return_value = True
+            mock_midplane_m1.return_value = True
+            m.midplane_ip = None
+            midplane_ips["dpu3"] = "169.254.200.244"
+            command = ['ping', '-c', '1', '-W', '1', "169.254.200.244"]
+            mock_call.return_value = 0
+            assert m.is_midplane_reachable()
+            mock_call.assert_called_with(command, stdout=subprocess.DEVNULL, stderr=subprocess.DEVNULL)
+            mock_call.return_value = 1
+            assert not m.is_midplane_reachable()
+            mock_call.assert_called_with(command, stdout=subprocess.DEVNULL, stderr=subprocess.DEVNULL)
+            mock_call.side_effect = subprocess.CalledProcessError(1, command)
+            assert not m.is_midplane_reachable()
+            assert not m1.is_midplane_reachable()
+            mock_call.reset_mock()
+            mock_call.side_effect = None
+            mock_midplane_m.return_value = False
+            mock_midplane_m1.return_value = False
+            assert not m.is_midplane_reachable()
+            assert not m1.is_midplane_reachable()
+            mock_call.assert_not_called()
+
+        m.fault_state = False
+        test_file_path = ""
+        pl_data = {
+            "dpu0": {
+                "interface": {"Ethernet224": "Ethernet0"},
+                "midplane_interface": "dpu0_mid",
+                "bus_info": "0000:08:0.0"
+            },
+            "dpu1": {
+                "interface": {"Ethernet232": "Ethernet1"},
+                "midplane_interface": "dpu1_mid",
+                "bus_info": "0000:08:0.0"
+            },
+            "dpu2": {
+                "interface": {"Ethernet236": "Ethernet2"},
+                "midplane_interface": "dpu2_mid",
+                "bus_info": "0000:08:0.0"
+            },
+        }
+        DeviceDataManager.get_platform_dpus_data = mock.MagicMock(return_value=pl_data)
+
+        def mock_read_int_from_file(file_path, default=0, raise_exception=False, log_func=None):
+            if file_path.endswith(test_file_path):
+                return 1
+            else:
+                return 0
+        file_name_list = ['reset_aux_pwr_or_reload', 'reset_comex_pwr_fail', 'reset_from_main_board', 'reset_dpu_thermal', 'None']
+        reboot_cause_list = [
+            (ChassisBase.REBOOT_CAUSE_POWER_LOSS, 'power auxiliary outage or reload'),
+            (ChassisBase.REBOOT_CAUSE_POWER_LOSS, 'Power failed to comex module'),
+            (ChassisBase.REBOOT_CAUSE_NON_HARDWARE, 'Reset from Main board'),
+            (ChassisBase.REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER, 'Thermal shutdown of the DPU'),
+            (ChassisBase.REBOOT_CAUSE_NON_HARDWARE, ''),
+        ]
+        with patch("sonic_platform.utils.read_int_from_file", wraps=mock_read_int_from_file):
+            for index, file_name in enumerate(file_name_list):
+                test_file_path = file_name
+                assert m.get_reboot_cause() == reboot_cause_list[index]
+        m1 = DpuModule(0)
+        m2 = DpuModule(1)
+        m3 = DpuModule(2)
+        m4 = DpuModule(3)
+        # DPU0 in PMON = dpu1 in hw-mgmt
+        m1.get_hw_mgmt_id() == 1
+        m2.get_hw_mgmt_id() == 2
+        m3.get_hw_mgmt_id() == 3
+        m4.get_hw_mgmt_id() == 4
+        assert not m1.midplane_interface
+        with patch("sonic_platform.utils.read_int_from_file", wraps=mock.MagicMock(return_value=1)):
+            assert m1._is_midplane_up()
+            assert m2._is_midplane_up()
+            assert m3._is_midplane_up()
+            assert m1.get_pci_bus_info() == pl_data["dpu0"]['bus_info']
+            assert m2.get_pci_bus_info() == pl_data["dpu1"]['bus_info']
+            assert m3.get_pci_bus_info() == pl_data["dpu2"]['bus_info']
+            with pytest.raises(RuntimeError):
+                m4._is_midplane_up()
+                m4.get_pci_bus_info()
+            assert m1.midplane_interface == "dpu0_mid"
+            assert m2.midplane_interface == "dpu1_mid"
+            assert m3.midplane_interface == "dpu2_mid"
+        with patch("sonic_platform.utils.read_str_from_file", wraps=mock.MagicMock(return_value=0)):
+            assert not m1._is_midplane_up()
+            assert not m2._is_midplane_up()
+            assert not m3._is_midplane_up()
+
+        with patch.object(m1.dpuctl_obj, "read_boot_prog") as mock_obj:
+            mock_obj.return_value = 5
+            m1.get_oper_status() == ModuleBase.MODULE_STATUS_ONLINE
+            mock_obj.return_value = 0
+            m1.get_oper_status() == ModuleBase.MODULE_STATUS_OFFLINE
+            mock_obj.return_value = 2
+            m1.get_oper_status() == ModuleBase.MODULE_STATUS_OFFLINE
+            mock_obj.return_value = 4
+            m1.get_oper_status() == ModuleBase.MODULE_STATUS_OFFLINE
+
+        temp_data = {
+            f"TEMPERATURE_INFO_{m.get_dpu_id()}|DDR": {"temperature": "45.0", "high_threshold":"90", "critical_high_threshold": "100"},
+            f"TEMPERATURE_INFO_{m.get_dpu_id()}|NVME": {"temperature": "100.0", "high_threshold":"85", "critical_high_threshold": "110"},
+            f"TEMPERATURE_INFO_{m.get_dpu_id()}|CPU": {"temperature": "75.0", "high_threshold":"80", "critical_high_threshold": "95"}
+        }
+        def new_get_all(db_name, table_name):
+            return temp_data[table_name]
+        
+        with patch.object(m.chassis_state_db, 'get_all', wraps=new_get_all):
+            output_dict = m.get_temperature_dict()
+            assert output_dict['DDR'] == temp_data[f"TEMPERATURE_INFO_{m.get_dpu_id()}|DDR"]
+            assert output_dict['CPU'] == temp_data[f"TEMPERATURE_INFO_{m.get_dpu_id()}|CPU"]
+            assert output_dict['NVME'] == temp_data[f"TEMPERATURE_INFO_{m.get_dpu_id()}|NVME"]
+            temp_data[f"TEMPERATURE_INFO_{m.get_dpu_id()}|CPU"] = {}
+            output_dict = m.get_temperature_dict()
+            assert output_dict['DDR'] == temp_data[f"TEMPERATURE_INFO_{m.get_dpu_id()}|DDR"]
+            assert output_dict['CPU'] == {}
+            assert output_dict['NVME'] == temp_data[f"TEMPERATURE_INFO_{m.get_dpu_id()}|NVME"]
+            del temp_data[f"TEMPERATURE_INFO_{m.get_dpu_id()}|CPU"]
+            assert m.get_temperature_dict() == {}
+

From ed935d136b2edb02af6a98142a46db4bb8831033 Mon Sep 17 00:00:00 2001
From: jingwenxie <jingwenxie@microsoft.com>
Date: Fri, 6 Dec 2024 10:20:42 +0800
Subject: [PATCH 331/364] Disable change on minigraph and init_cfg.json
 (#19597)

Why I did it
The further change of minigraph.py and init_cfg.json should be blocked to align with PROD env.

How I did it
Add checker to block change

How to verify it
PR test
---
 .github/workflows/protect-file.yml | 37 ++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)
 create mode 100644 .github/workflows/protect-file.yml

diff --git a/.github/workflows/protect-file.yml b/.github/workflows/protect-file.yml
new file mode 100644
index 000000000000..bc7e0ae1de1a
--- /dev/null
+++ b/.github/workflows/protect-file.yml
@@ -0,0 +1,37 @@
+name: Protect certain files to avoid further changes
+
+on:
+  push:
+    branches:
+      - 'master'
+      - '202[2-9][0-9][0-9]'
+  pull_request:
+    branches:
+      - 'master'
+      - '202[2-9][0-9][0-9]'
+
+jobs:
+  check-file:
+    runs-on: ubuntu-latest
+    steps:
+      - name: Checkout repository
+        uses: actions/checkout@v3
+
+      - name: Fetch base branch
+        run: |
+          git fetch origin ${GITHUB_BASE_REF}
+
+      - name: Check protected files
+        run: |
+          echo "Starting file check step"
+          protected_files=('src/sonic-config-engine/minigraph.py' 'files/build_templates/init_cfg.json.j2')
+          base_branch=$(git rev-parse origin/${GITHUB_BASE_REF})
+          
+          for protected_file in "${protected_files[@]}"; do
+            echo "Checking ${protected_file}"
+            if git diff --name-only $base_branch | grep -q "^${protected_file}\$"; then
+              echo "Error: You are trying to modify ${protected_file}, which is protected."
+              exit 1
+            fi
+          done
+          echo "No changes detected in protected files"

From 9293b8c52aab66f1660db05b9198bb0f7b836c97 Mon Sep 17 00:00:00 2001
From: Brad House <brad@brad-house.com>
Date: Fri, 6 Dec 2024 04:41:45 -0500
Subject: [PATCH 332/364] [yang] LOGGER missing require_manual_refresh (#20969)

Why I did it
YANG failures during config replace with default configuration.

As of #19611 and sonic-net/sonic-utilities#3428 a new database field of require_manual_refresh was added.

This leads to YANG failures in the factory-default configuration for the xcvrd log entry which by default is written as true.

Work item tracking
How I did it
Updated YANG file for new field.

How to verify it
Verify config replace works with factory default configuration.
---
 src/sonic-yang-models/yang-models/sonic-logger.yang | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/sonic-yang-models/yang-models/sonic-logger.yang b/src/sonic-yang-models/yang-models/sonic-logger.yang
index 76c7afde8834..691bbb59cf8c 100644
--- a/src/sonic-yang-models/yang-models/sonic-logger.yang
+++ b/src/sonic-yang-models/yang-models/sonic-logger.yang
@@ -67,6 +67,11 @@ module sonic-logger{
                     }
                     default SYSLOG;
                 }
+
+                leaf require_manual_refresh {
+                    type stypes:boolean_type;
+                    description "When updating the log level, will refresh configuration via SIGHUP sent to the process.";
+                }
             }/* end of list LOGGER_LIST */
         }/* end of LOGGER container */
     }/* end of sonic-logger container */

From d7aa06c853ec0c4df570e5b08552398ba55b3a98 Mon Sep 17 00:00:00 2001
From: anamehra <54692434+anamehra@users.noreply.github.com>
Date: Fri, 6 Dec 2024 09:53:25 -0800
Subject: [PATCH 333/364] Update cisco-8000.ini to 202405.0.13 release (#21051)

Release Notes:

Fixed MIGSMSFT-752: missing LC data from "show chassis module status" CLI output
Fixed MIGSMSFT-504: FC serial number update issue after FC swap/change
Fixed MIGSMSFT-780: fix the issue: show_techsupport & saidump errors. Included rib-cli in syncd docker.
Fixed MIGSMSFT-761: cardevent.py error due to connection reset
Fixed syncd grpcpp srv crash

Signed-off-by: Anand Mehra anamehra@cisco.com
---
 platform/checkout/cisco-8000.ini | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/checkout/cisco-8000.ini b/platform/checkout/cisco-8000.ini
index fe56217a0a5f..f8d6454d27b8 100644
--- a/platform/checkout/cisco-8000.ini
+++ b/platform/checkout/cisco-8000.ini
@@ -1,3 +1,3 @@
 [module]
 repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git
-ref=202405.0.11
+ref=202405.0.13

From 8feb45f5d80f95fdbdd1e072a32185ae751b0ad2 Mon Sep 17 00:00:00 2001
From: zitingguo-ms <zitingguo@microsoft.com>
Date: Fri, 6 Dec 2024 10:00:53 -0800
Subject: [PATCH 334/364] Upgrade xgs SAI version tio 11.2.16.2 (#21068)

Why I did it
Upgrade SAI xgs version to 11.2.16.2 to fix #20725

Work item tracking
Microsoft ADO (number only): 30445459

How I did it
Update xgs SAI version to 11.2.16.2 in the sai.mk file.

How to verify it
load the built image to the DUT, swss starts fine.

Signed-off-by: zitingguo-ms <zitingguo@microsoft.com>
---
 platform/broadcom/sai.mk | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index 5fb3667a883d..4127bb58d6b0 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,6 +1,6 @@
-LIBSAIBCM_XGS_VERSION = 11.2.13.1
+LIBSAIBCM_XGS_VERSION = 11.2.16.2
 LIBSAIBCM_DNX_VERSION = 11.2.13.1-1
-LIBSAIBCM_XGS_BRANCH_NAME = SAI_11.2.0_GA
+LIBSAIBCM_XGS_BRANCH_NAME = SAI_11.2.16.2
 LIBSAIBCM_DNX_BRANCH_NAME = SAI_11.2.0_GA
 LIBSAIBCM_XGS_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_XGS_BRANCH_NAME)/$(LIBSAIBCM_XGS_VERSION)/xgs"
 LIBSAIBCM_DNX_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_DNX_BRANCH_NAME)/$(LIBSAIBCM_DNX_VERSION)/dnx"

From c1c725f653222bfd437cea35577af2fb26b6c7dd Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 7 Dec 2024 02:02:16 +0800
Subject: [PATCH 335/364] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#21066)

src/sonic-sairedis

* 4f7eed0a - (HEAD -> master, origin/master, origin/HEAD) Revert back to SAI version 1 15 (#1481) (80 minutes ago) [Ying X
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 8ba9448f4df9..4f7eed0aac95 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 8ba9448f4df94eb54185dad5c28ce96798022476
+Subproject commit 4f7eed0aac95288077fa9959dc61eacd2f3938d6

From 6ebe76c6cff0639f75764cfe9ad795f46cc12db9 Mon Sep 17 00:00:00 2001
From: Dror Prital <76714716+dprital@users.noreply.github.com>
Date: Fri, 6 Dec 2024 22:35:16 +0200
Subject: [PATCH 336/364] [Mellanox] Change NVIDIA SDK build to cmake method
 (#19810)

- Why I did it

Up to now, building Mellanox SDK debian packages was done by "autotools" method.
Lately, Mellanox SDK team added the support to build by "cmake" method.
The benefit of using "cmake" is with decrease time of SDK build as "cmake" make it faster then "auto build".

When moving to "cmake" method, all SDK debians:

applibs
sx-complib
sx-example
sx-gen-utils
sx-scew
sxd-libs
python-sdk-api
sx-acl-helper
wjh-libs
sx-hash-calc
sx-obj-desc-lib
sxd-libs
will be replaced by single debian - sys_sdk.

- How I did it

Update cmake version on sonic slave dockers (bookworm and bullseye)
Change SDK Makefiles, delete all Makefiles of removed debians and add new Makefile for building sys_sdk.
Change sdk.mk and sdk.dep acordingly.
sx-kernel package was remain since it is consumed by the host as well and I didn't want to consume sys_sdk in host.

- How to verify it

Enter syncd docker and verify the list of SDK packages are sx-kernel and sys-sdk only
Run regression tests and verify there is no degradation
Install the debian that include dbg-symbols and verify there are debug symbols by setting relevant breakpoints
Test the build time when using "cmake" for building SDK packages, compare to "auto build"
---
 platform/mellanox/issu-version.mk             |   2 +-
 platform/mellanox/sdk-src/applibs/Makefile    |  30 ---
 .../mellanox/sdk-src/sx-acl-helper/Makefile   |  29 ---
 platform/mellanox/sdk-src/sx-complib/Makefile |  29 ---
 .../mellanox/sdk-src/sx-examples/Makefile     |  27 ---
 .../mellanox/sdk-src/sx-gen-utils/Makefile    |  27 ---
 .../mellanox/sdk-src/sx-hash-calc/Makefile    |  27 ---
 .../mellanox/sdk-src/sx-obj-desc-lib/Makefile |  29 ---
 platform/mellanox/sdk-src/sx-scew/Makefile    |  29 ---
 platform/mellanox/sdk-src/sxd-libs/Makefile   |  29 ---
 platform/mellanox/sdk-src/sys-sdk/Makefile    |  30 +++
 platform/mellanox/sdk.dep                     | 198 ------------------
 platform/mellanox/sdk.mk                      | 126 ++---------
 sonic-slave-bookworm/Dockerfile.j2            |   8 +
 sonic-slave-bullseye/Dockerfile.j2            |   8 +
 15 files changed, 60 insertions(+), 568 deletions(-)
 delete mode 100644 platform/mellanox/sdk-src/applibs/Makefile
 delete mode 100644 platform/mellanox/sdk-src/sx-acl-helper/Makefile
 delete mode 100644 platform/mellanox/sdk-src/sx-complib/Makefile
 delete mode 100644 platform/mellanox/sdk-src/sx-examples/Makefile
 delete mode 100644 platform/mellanox/sdk-src/sx-gen-utils/Makefile
 delete mode 100644 platform/mellanox/sdk-src/sx-hash-calc/Makefile
 delete mode 100644 platform/mellanox/sdk-src/sx-obj-desc-lib/Makefile
 delete mode 100644 platform/mellanox/sdk-src/sx-scew/Makefile
 delete mode 100644 platform/mellanox/sdk-src/sxd-libs/Makefile
 create mode 100644 platform/mellanox/sdk-src/sys-sdk/Makefile

diff --git a/platform/mellanox/issu-version.mk b/platform/mellanox/issu-version.mk
index ee0855c56ced..756ebfb2019f 100644
--- a/platform/mellanox/issu-version.mk
+++ b/platform/mellanox/issu-version.mk
@@ -19,7 +19,7 @@
 ISSU_VERSION_FILE = issu-version
 $(ISSU_VERSION_FILE)_SRC_PATH = $(PLATFORM_PATH)/issu-version
 
-$(ISSU_VERSION_FILE)_DEPENDS += $(APPLIBS)
+$(ISSU_VERSION_FILE)_DEPENDS += $(SYSSDK)
 
 SONIC_MAKE_FILES += $(ISSU_VERSION_FILE)
 
diff --git a/platform/mellanox/sdk-src/applibs/Makefile b/platform/mellanox/sdk-src/applibs/Makefile
deleted file mode 100644
index 47e4f5388dbe..000000000000
--- a/platform/mellanox/sdk-src/applibs/Makefile
+++ /dev/null
@@ -1,30 +0,0 @@
-.ONESHELL:
-SHELL = /bin/bash
-
-MAIN_TARGET = applibs_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-DERIVED_TARGETS = applibs-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb applibs-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-PACKAGE_NAME = applibs
-
-$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
-	# get sources
-	rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION)
-
-	wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz
-
-	# build
-	pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION)
-
-	sed -i "s/sx-libnl/$(LIBNL3)/g" ./debian/control
-	sed -i "s/-Werror//g" ./configure.in
-
-	if [ -f autogen.sh ]; then
-		./autogen.sh
-	fi
-
-	debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS)
-
-	popd
-
-	mv $(DERIVED_TARGETS) $* $(DEST)/
-
-$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/platform/mellanox/sdk-src/sx-acl-helper/Makefile b/platform/mellanox/sdk-src/sx-acl-helper/Makefile
deleted file mode 100644
index 42109c74e0bb..000000000000
--- a/platform/mellanox/sdk-src/sx-acl-helper/Makefile
+++ /dev/null
@@ -1,29 +0,0 @@
-.ONESHELL:
-SHELL = /bin/bash
-
-MAIN_TARGET = sx-acl-helper_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-DERIVED_TARGETS = sx-acl-helper-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb \
-				  sx-acl-helper-dev-static_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb \
-				  sx-acl-helper-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-PACKAGE_NAME = sx_acl_helper
-
-$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
-	# get sources
-	rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION)
-
-	wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz
-
-	# build
-	pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION)
-
-	if [ -f autogen.sh ]; then
-		./autogen.sh
-	fi
-
-	debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS)
-
-	popd
-
-	mv $(DERIVED_TARGETS) $* $(DEST)/
-
-$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/platform/mellanox/sdk-src/sx-complib/Makefile b/platform/mellanox/sdk-src/sx-complib/Makefile
deleted file mode 100644
index c717ffda93c0..000000000000
--- a/platform/mellanox/sdk-src/sx-complib/Makefile
+++ /dev/null
@@ -1,29 +0,0 @@
-.ONESHELL:
-SHELL = /bin/bash
-
-MAIN_TARGET = sx-complib_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-DERIVED_TARGETS = sx-complib-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb \
-				  sx-complib-dev-static_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb \
-				  sx-complib-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-PACKAGE_NAME = sx_complib
-
-$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
-	# get sources
-	rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION)
-
-	wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz
-
-	# build
-	pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION)
-
-	if [ -f autogen.sh ]; then
-		./autogen.sh
-	fi
-
-	debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS)
-
-	popd
-
-	mv $(DERIVED_TARGETS) $* $(DEST)/
-
-$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/platform/mellanox/sdk-src/sx-examples/Makefile b/platform/mellanox/sdk-src/sx-examples/Makefile
deleted file mode 100644
index 2084e397f981..000000000000
--- a/platform/mellanox/sdk-src/sx-examples/Makefile
+++ /dev/null
@@ -1,27 +0,0 @@
-.ONESHELL:
-SHELL = /bin/bash
-
-MAIN_TARGET = sx-examples_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-DERIVED_TARGETS = sx-examples-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb sx-examples-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-PACKAGE_NAME = sx_examples
-
-$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
-	# get sources
-	rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION)
-
-	wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz
-
-	# build
-	pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION)
-
-	if [ -f autogen.sh ]; then
-		./autogen.sh
-	fi
-
-	debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS)
-
-	popd
-
-	mv $(DERIVED_TARGETS) $* $(DEST)/
-
-$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/platform/mellanox/sdk-src/sx-gen-utils/Makefile b/platform/mellanox/sdk-src/sx-gen-utils/Makefile
deleted file mode 100644
index 66d2fb6b453e..000000000000
--- a/platform/mellanox/sdk-src/sx-gen-utils/Makefile
+++ /dev/null
@@ -1,27 +0,0 @@
-.ONESHELL:
-SHELL = /bin/bash
-
-MAIN_TARGET = sx-gen-utils_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-DERIVED_TARGETS = sx-gen-utils-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb sx-gen-utils-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-PACKAGE_NAME = sx_gen_utils
-
-$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
-	# get sources
-	rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION)
-
-	wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz
-
-	# build
-	pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION)
-
-	if [ -f autogen.sh ]; then
-		./autogen.sh
-	fi
-
-	debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS)
-
-	popd
-
-	mv $(DERIVED_TARGETS) $* $(DEST)/
-
-$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/platform/mellanox/sdk-src/sx-hash-calc/Makefile b/platform/mellanox/sdk-src/sx-hash-calc/Makefile
deleted file mode 100644
index 927d4bc892a7..000000000000
--- a/platform/mellanox/sdk-src/sx-hash-calc/Makefile
+++ /dev/null
@@ -1,27 +0,0 @@
-.ONESHELL:
-SHELL = /bin/bash
-
-MAIN_TARGET = sx-hash-calc_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb
-DERIVED_TARGETS = sx-hash-calc-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb
-PACKAGE_NAME = sx_hash_calc
-
-$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
-	# get sources
-	rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION)
-
-	wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz
-
-	# build
-	pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION)
-
-	if [ -f autogen.sh ]; then
-		./autogen.sh
-	fi
-
-	debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS)
-
-	popd
-
-	mv $(DERIVED_TARGETS) $* $(DEST)/
-
-$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/platform/mellanox/sdk-src/sx-obj-desc-lib/Makefile b/platform/mellanox/sdk-src/sx-obj-desc-lib/Makefile
deleted file mode 100644
index 26d1f65ca720..000000000000
--- a/platform/mellanox/sdk-src/sx-obj-desc-lib/Makefile
+++ /dev/null
@@ -1,29 +0,0 @@
-.ONESHELL:
-SHELL = /bin/bash
-
-MAIN_TARGET = sx-obj-desc-lib_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-DERIVED_TARGETS = sx-obj-desc-lib-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb \
-				  sx-obj-desc-lib-dev-static_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb \
-				  sx-obj-desc-lib-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-PACKAGE_NAME = sx_obj_desc_lib
-
-$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
-	# get sources
-	rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION)
-
-	wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz
-
-	# build
-	pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION)
-
-	if [ -f autogen.sh ]; then
-		./autogen.sh
-	fi
-
-	debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS)
-
-	popd
-
-	mv $(DERIVED_TARGETS) $* $(DEST)/
-
-$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/platform/mellanox/sdk-src/sx-scew/Makefile b/platform/mellanox/sdk-src/sx-scew/Makefile
deleted file mode 100644
index 8bb61fcda67c..000000000000
--- a/platform/mellanox/sdk-src/sx-scew/Makefile
+++ /dev/null
@@ -1,29 +0,0 @@
-.ONESHELL:
-SHELL = /bin/bash
-
-MAIN_TARGET = sx-scew_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-DERIVED_TARGETS = sx-scew-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb \
-				  sx-scew-dev-static_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb \
-				  sx-scew-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-PACKAGE_NAME = sx_scew
-
-$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
-	# get sources
-	rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION)
-
-	wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz
-
-	# build
-	pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION)
-
-	if [ -f autogen.sh ]; then
-		./autogen.sh
-	fi
-
-	debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS)
-
-	popd
-
-	mv $(DERIVED_TARGETS) $* $(DEST)/
-
-$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/platform/mellanox/sdk-src/sxd-libs/Makefile b/platform/mellanox/sdk-src/sxd-libs/Makefile
deleted file mode 100644
index 0472056c9874..000000000000
--- a/platform/mellanox/sdk-src/sxd-libs/Makefile
+++ /dev/null
@@ -1,29 +0,0 @@
-.ONESHELL:
-SHELL = /bin/bash
-
-MAIN_TARGET = sxd-libs_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-DERIVED_TARGETS = sxd-libs-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb \
-				  sxd-libs-dev-static_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb \
-				  sxd-libs-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-PACKAGE_NAME = sxd_libs
-
-$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
-	# get sources
-	rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION)
-
-	wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz
-
-	# build
-	pushd $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION)
-
-	if [ -f autogen.sh ]; then
-		./autogen.sh
-	fi
-
-	debuild -e 'configure_options=--enable-sniffer=yes' -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS)
-
-	popd
-
-	mv $(DERIVED_TARGETS) $* $(DEST)/
-
-$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/platform/mellanox/sdk-src/sys-sdk/Makefile b/platform/mellanox/sdk-src/sys-sdk/Makefile
new file mode 100644
index 000000000000..0bd78f6901d8
--- /dev/null
+++ b/platform/mellanox/sdk-src/sys-sdk/Makefile
@@ -0,0 +1,30 @@
+.ONESHELL:
+SHELL = /bin/bash
+
+MAIN_TARGET = sys-sdk_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
+DERIVED_TARGETS = sys-sdk_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH)-dev.deb sys-sdk_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH)-dbgsym.ddeb
+
+PACKAGE_NAME = sys_sdk
+
+$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
+        # get sources
+	rm -rf $(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION)
+	
+	@echo  'wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz'
+	
+	wget -c $(MLNX_SDK_SOURCE_BASE_URL)/$(PACKAGE_NAME)-$(MLNX_SDK_VERSION)-$(MLNX_SDK_ISSU_VERSION).tar.gz -O - | tar -xz
+
+        # build
+	rm -rf builds/cmake
+
+	cmake -B builds/cmake -DCMAKE_SYSTEM_VERSION=$(shell ls -t /lib/modules |head -1) -DPYTHON_INTERPRETERS=python3 -DSKIP_UNINSTALL_INSTALL_DEPENDENCY=on -DSKIP_DEPMOD_IN_INSTALL_PHASE=on -DUSE_API_TESTER=OFF -DUSE_KERNEL=OFF -DCMAKE_PROJECT_VERSION=$(MLNX_SDK_DEB_VERSION)
+	
+	cmake --build builds/cmake -j$(SONIC_CONFIG_MAKE_JOBS)
+	
+	cd builds/cmake
+	
+	cpack -G DEB
+
+	mv $(DERIVED_TARGETS) $* $(DEST)/
+
+$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/platform/mellanox/sdk.dep b/platform/mellanox/sdk.dep
index 122548192c6c..97ad0b25acfa 100644
--- a/platform/mellanox/sdk.dep
+++ b/platform/mellanox/sdk.dep
@@ -10,204 +10,6 @@
 # SONIC_OVERRIDE_BUILD_VARS.
 MLNX_SDK_COMMON_FLAGS_LIST = $(SONIC_COMMON_FLAGS_LIST) $(MLNX_SDK_DEB_VERSION)
 
-# APPLIBS
-
-SPATH := $($(APPLIBS)_SRC_PATH)
-DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/sdk.mk $(PLATFORM_PATH)/sdk.dep
-DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES += $(shell git ls-files -- $(SPATH))
-
-$(APPLIBS)_CACHE_MODE := GIT_CONTENT_SHA
-$(APPLIBS)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(APPLIBS)_DEP_FILES := $(DEP_FILES)
-
-$(APPLIBS_DEV)_CACHE_MODE := GIT_CONTENT_SHA
-$(APPLIBS_DEV)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(APPLIBS_DEV)_DEP_FILES := $(DEP_FILES)
-
-ifeq ($(SDK_FROM_SRC),y)
-$(APPLIBS_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA
-$(APPLIBS_DBGSYM)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(APPLIBS_DBGSYM)_DEP_FILES := $(DEP_FILES)
-endif
-
-# SX_COMPLIB
-
-SPATH := $($(SX_COMPLIB)_SRC_PATH)
-DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/sdk.mk $(PLATFORM_PATH)/sdk.dep
-DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES += $(shell git ls-files -- $(SPATH))
-
-$(SX_COMPLIB)_CACHE_MODE := GIT_CONTENT_SHA
-$(SX_COMPLIB)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(SX_COMPLIB)_DEP_FILES := $(DEP_FILES)
-
-$(SX_COMPLIB_DEV)_CACHE_MODE := GIT_CONTENT_SHA
-$(SX_COMPLIB_DEV)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(SX_COMPLIB_DEV)_DEP_FILES := $(DEP_FILES)
-
-ifeq ($(SDK_FROM_SRC),y)
-$(SX_COMPLIB_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA
-$(SX_COMPLIB_DBGSYM)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(SX_COMPLIB_DBGSYM)_DEP_FILES := $(DEP_FILES)
-endif
-
-# SX_EXAMPLES
-
-SPATH := $($(SX_EXAMPLES)_SRC_PATH)
-DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/sdk.mk $(PLATFORM_PATH)/sdk.dep
-DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES += $(shell git ls-files -- $(SPATH))
-
-$(SX_EXAMPLES)_CACHE_MODE := GIT_CONTENT_SHA
-$(SX_EXAMPLES)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(SX_EXAMPLES)_DEP_FILES := $(DEP_FILES)
-
-$(SX_EXAMPLES_DEV)_CACHE_MODE := GIT_CONTENT_SHA
-$(SX_EXAMPLES_DEV)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(SX_EXAMPLES_DEV)_DEP_FILES := $(DEP_FILES)
-
-ifeq ($(SDK_FROM_SRC),y)
-$(SX_EXAMPLES_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA
-$(SX_EXAMPLES_DBGSYM)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(SX_EXAMPLES_DBGSYM)_DEP_FILES := $(DEP_FILES)
-endif
-
-# SX_GEN_UTILS
-
-SPATH := $($(SX_GEN_UTILS)_SRC_PATH)
-DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/sdk.mk $(PLATFORM_PATH)/sdk.dep
-DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES += $(shell git ls-files -- $(SPATH))
-
-$(SX_GEN_UTILS)_CACHE_MODE := GIT_CONTENT_SHA
-$(SX_GEN_UTILS)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(SX_GEN_UTILS)_DEP_FILES := $(DEP_FILES)
-
-$(SX_GEN_UTILS_DEV)_CACHE_MODE := GIT_CONTENT_SHA
-$(SX_GEN_UTILS_DEV)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(SX_GEN_UTILS_DEV)_DEP_FILES := $(DEP_FILES)
-
-ifeq ($(SDK_FROM_SRC),y)
-$(SX_GEN_UTILS_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA
-$(SX_GEN_UTILS_DBGSYM)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(SX_GEN_UTILS_DBGSYM)_DEP_FILES := $(DEP_FILES)
-endif
-
-# SXD_LIBS
-
-SPATH := $($(SXD_LIBS)_SRC_PATH)
-DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/sdk.mk $(PLATFORM_PATH)/sdk.dep
-DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES += $(shell git ls-files -- $(SPATH))
-
-$(SXD_LIBS)_CACHE_MODE := GIT_CONTENT_SHA
-$(SXD_LIBS)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(SXD_LIBS)_DEP_FILES := $(DEP_FILES)
-
-$(SXD_LIBS_DEV)_CACHE_MODE := GIT_CONTENT_SHA
-$(SXD_LIBS_DEV)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(SXD_LIBS_DEV)_DEP_FILES := $(DEP_FILES)
-
-ifeq ($(SDK_FROM_SRC),y)
-$(SXD_LIBS_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA
-$(SXD_LIBS_DBGSYM)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(SXD_LIBS_DBGSYM)_DEP_FILES := $(DEP_FILES)
-endif
-
-# PYTHON_SDK_API
-
-SPATH := $($(PYTHON_SDK_API)_SRC_PATH)
-DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/sdk.mk $(PLATFORM_PATH)/sdk.dep
-DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES += $(shell git ls-files -- $(SPATH))
-
-$(PYTHON_SDK_API)_CACHE_MODE := GIT_CONTENT_SHA
-$(PYTHON_SDK_API)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(PYTHON_SDK_API)_DEP_FILES := $(DEP_FILES)
-
-ifeq ($(SDK_FROM_SRC),y)
-$(PYTHON_SDK_API_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA
-$(PYTHON_SDK_API_DBGSYM)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(PYTHON_SDK_API_DBGSYM)_DEP_FILES := $(DEP_FILES)
-endif
-
-# SX_ACL_HELPER
-
-SPATH := $($(SX_ACL_HELPER)_SRC_PATH)
-DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/sdk.mk $(PLATFORM_PATH)/sdk.dep
-DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES += $(shell git ls-files -- $(SPATH))
-
-$(SX_ACL_HELPER)_CACHE_MODE := GIT_CONTENT_SHA
-$(SX_ACL_HELPER)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(SX_ACL_HELPER)_DEP_FILES := $(DEP_FILES)
-
-$(SX_ACL_HELPER_DEV)_CACHE_MODE := GIT_CONTENT_SHA
-$(SX_ACL_HELPER_DEV)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(SX_ACL_HELPER_DEV)_DEP_FILES := $(DEP_FILES)
-
-ifeq ($(SDK_FROM_SRC),y)
-$(SX_ACL_HELPER_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA
-$(SX_ACL_HELPER_DBGSYM)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(SX_ACL_HELPER_DBGSYM)_DEP_FILES := $(DEP_FILES)
-endif
-
-# WJH_LIBS
-
-SPATH := $($(WJH_LIBS)_SRC_PATH)
-DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/sdk.mk $(PLATFORM_PATH)/sdk.dep
-DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES += $(shell git ls-files -- $(SPATH))
-
-$(WJH_LIBS)_CACHE_MODE := GIT_CONTENT_SHA
-$(WJH_LIBS)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(WJH_LIBS)_DEP_FILES := $(DEP_FILES)
-
-$(WJH_LIBS_DEV)_CACHE_MODE := GIT_CONTENT_SHA
-$(WJH_LIBS_DEV)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(WJH_LIBS_DEV)_DEP_FILES := $(DEP_FILES)
-
-ifeq ($(SDK_FROM_SRC),y)
-$(WJH_LIBS_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA
-$(WJH_LIBS_DBGSYM)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(WJH_LIBS_DBGSYM)_DEP_FILES := $(DEP_FILES)
-endif
-
-# SX_HASH_CALC
-
-SPATH := $($(SX_HASH_CALC)_SRC_PATH)
-DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/sdk.mk $(PLATFORM_PATH)/sdk.dep
-DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES += $(shell git ls-files -- $(SPATH))
-
-$(SX_HASH_CALC)_CACHE_MODE := GIT_CONTENT_SHA
-$(SX_HASH_CALC)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(SX_HASH_CALC)_DEP_FILES := $(DEP_FILES)
-
-ifeq ($(SDK_FROM_SRC),y)
-$(SX_HASH_CALC_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA
-$(SX_HASH_CALC_DBGSYM)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(SX_HASH_CALC_DBGSYM)_DEP_FILES := $(DEP_FILES)
-endif
-
-# SX_OBJ_DESC_LIB
-
-SPATH := $($(SX_OBJ_DESC_LIB)_SRC_PATH)
-DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/sdk.mk $(PLATFORM_PATH)/sdk.dep
-DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES += $(shell git ls-files -- $(SPATH))
-
-$(SX_OBJ_DESC_LIB)_CACHE_MODE := GIT_CONTENT_SHA
-$(SX_OBJ_DESC_LIB)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(SX_OBJ_DESC_LIB)_DEP_FILES := $(DEP_FILES)
-
-ifeq ($(SDK_FROM_SRC),y)
-$(SX_OBJ_DESC_LIB_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA
-$(SX_OBJ_DESC_LIB_DBGSYM)_DEP_FLAGS := $(MLNX_SDK_COMMON_FLAGS_LIST)
-$(SX_OBJ_DESC_LIB_DBGSYM)_DEP_FILES := $(DEP_FILES)
-endif
-
 # SX_KERNEL
 
 SPATH := $($(SX_KERNEL)_SRC_PATH)
diff --git a/platform/mellanox/sdk.mk b/platform/mellanox/sdk.mk
index 718d5ede3352..d7fc79a1c047 100644
--- a/platform/mellanox/sdk.mk
+++ b/platform/mellanox/sdk.mk
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -34,123 +34,23 @@ endif
 
 export MLNX_SDK_SOURCE_BASE_URL MLNX_SDK_VERSION MLNX_SDK_ISSU_VERSION MLNX_SDK_DEB_VERSION MLNX_ASSETS_GITHUB_URL MLNX_SDK_DRIVERS_GITHUB_URL
 
-MLNX_SDK_RDEBS += $(APPLIBS) $(SX_COMPLIB) $(SX_EXAMPLES) \
-                  $(SX_GEN_UTILS) $(SXD_LIBS) $(WJH_LIBS) $(SX_ACL_HELPER) \
-                  $(SX_HASH_CALC) $(SX_OBJ_DESC_LIB)
-
-MLNX_SDK_DEBS += $(APPLIBS_DEV) $(SX_COMPLIB_DEV) \
-                 $(SX_COMPLIB_DEV_STATIC) $(SX_EXAMPLES_DEV) $(SX_GEN_UTILS_DEV) \
-                 $(SXD_LIBS_DEV) $(SXD_LIBS_DEV_STATIC) $(WJH_LIBS_DEV) $(SX_ACL_HELPER_DEV) \
-                 $(SX_HASH_CALC) $(SX_OBJ_DESC_LIB_DEV)
-
-MLNX_SDK_DBG_DEBS += $(APPLIBS_DBGSYM) $(SX_COMPLIB_DBGSYM) \
-         $(SX_EXAMPLES_DBGSYM) $(SX_GEN_UTILS_DBGSYM) \
-         $(SXD_LIBS_DBGSYM) $(WJH_LIBS_DBGSYM) $(SX_ACL_HELPER_DBGSYM) \
-         $(SX_HASH_CALC_DBGSYM) $(SX_OBJ_DESC_LIB_DBGSYM)
-
-APPLIBS = applibs_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-$(APPLIBS)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/applibs
-$(APPLIBS)_DEPENDS += $(SX_COMPLIB_DEV) $(SX_GEN_UTILS_DEV) $(SXD_LIBS_DEV) $(LIBNL3_DEV) $(LIBNL_GENL3_DEV)
-$(APPLIBS)_RDEPENDS += $(SX_COMPLIB) $(SX_GEN_UTILS) $(SXD_LIBS) $(LIBNL3) $(LIBNL_GENL3)
-APPLIBS_DEV = applibs-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-$(eval $(call add_derived_package,$(APPLIBS),$(APPLIBS_DEV)))
-APPLIBS_DBGSYM = applibs-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
+MLNX_SDK_RDEBS += $(SYSSDK)
+MLNX_SDK_DEBS += $(SYSSDK_DEV)
+MLNX_SDK_DBG_DEBS += $(SYSSDK_DBGSYM)
+
+SYSSDK = sys-sdk_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
+$(SYSSDK)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/sys-sdk
+$(SYSSDK)_DEPENDS += $(LIBNL3_DEV) $(LIBNL_GENL3_DEV)
+$(SYSSDK)_RDEPENDS += $(LIBNL3) $(LIBNL_GENL3)
+SYSSDK_DEV = sys-sdk_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH)-dev.deb
+$(eval $(call add_derived_package,$(SYSSDK),$(SYSSDK_DEV)))
+SYSSDK_DBGSYM = sys-sdk_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH)-dbgsym.ddeb
 ifeq ($(SDK_FROM_SRC),y)
-$(eval $(call add_derived_package,$(APPLIBS),$(APPLIBS_DBGSYM)))
+$(eval $(call add_derived_package,$(SYSSDK),$(SYSSDK_DBGSYM)))
 endif
 
-SX_COMPLIB = sx-complib_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-$(SX_COMPLIB)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/sx-complib
-SX_COMPLIB_DEV = sx-complib-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-$(eval $(call add_derived_package,$(SX_COMPLIB),$(SX_COMPLIB_DEV)))
-SX_COMPLIB_DBGSYM = sx-complib-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-ifeq ($(SDK_FROM_SRC),y)
-$(eval $(call add_derived_package,$(SX_COMPLIB),$(SX_COMPLIB_DBGSYM)))
-endif
-
-SX_EXAMPLES = sx-examples_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-$(SX_EXAMPLES)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/sx-examples
-$(SX_EXAMPLES)_DEPENDS += $(APPLIBS_DEV) $(SXD_LIBS_DEV)
-$(SX_EXAMPLES)_RDEPENDS += $(APPLIBS) $(SXD_LIBS)
-SX_EXAMPLES_DEV = sx-examples-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-$(eval $(call add_derived_package,$(SX_EXAMPLES),$(SX_EXAMPLES_DEV)))
-SX_EXAMPLES_DBGSYM = sx-examples-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-ifeq ($(SDK_FROM_SRC),y)
-$(eval $(call add_derived_package,$(SX_EXAMPLES),$(SX_EXAMPLES_DBGSYM)))
-endif
-
-SX_GEN_UTILS = sx-gen-utils_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-$(SX_GEN_UTILS)_SRC_PATH += $(PLATFORM_PATH)/sdk-src/sx-gen-utils
-$(SX_GEN_UTILS)_DEPENDS += $(SX_COMPLIB_DEV)
-$(SX_GEN_UTILS)_RDEPENDS += $(SX_COMPLIB)
-SX_GEN_UTILS_DEV = sx-gen-utils-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-$(eval $(call add_derived_package,$(SX_GEN_UTILS),$(SX_GEN_UTILS_DEV)))
-SX_GEN_UTILS_DBGSYM = sx-gen-utils-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-ifeq ($(SDK_FROM_SRC),y)
-$(eval $(call add_derived_package,$(SX_GEN_UTILS),$(SX_GEN_UTILS_DBGSYM)))
-endif
-
-SXD_LIBS = sxd-libs_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-$(SXD_LIBS)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/sxd-libs
-$(SXD_LIBS)_DEPENDS += $(SX_COMPLIB_DEV) $(SX_GEN_UTILS_DEV)
-SXD_LIBS_DEV = sxd-libs-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-$(eval $(call add_derived_package,$(SXD_LIBS),$(SXD_LIBS_DEV)))
-SXD_LIBS_DBGSYM = sxd-libs-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-ifeq ($(SDK_FROM_SRC),y)
-$(eval $(call add_derived_package,$(SXD_LIBS),$(SXD_LIBS_DBGSYM)))
-endif
 
 #packages that are required for runtime only
-PYTHON_SDK_API = python-sdk-api_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-$(PYTHON_SDK_API)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/python-sdk-api
-$(PYTHON_SDK_API)_DEPENDS += $(APPLIBS_DEV) $(SXD_LIBS_DEV) $(SWIG)
-$(PYTHON_SDK_API)_RDEPENDS += $(APPLIBS) $(SXD_LIBS)
-PYTHON_SDK_API_DBGSYM = python-sdk-api-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-ifeq ($(SDK_FROM_SRC),y)
-$(eval $(call add_derived_package,$(PYTHON_SDK_API),$(PYTHON_SDK_API_DBGSYM)))
-endif
-
-SX_ACL_HELPER = sx-acl-helper_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-$(SX_ACL_HELPER)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/sx-acl-helper
-$(SX_ACL_HELPER)_DEPENDS += $(SX_COMPLIB_DEV) $(SXD_LIBS_DEV) $(APPLIBS_DEV)
-$(SX_ACL_HELPER)_RDEPENDS += $(SX_COMPLIB) $(PYTHON_SDK_API)
-SX_ACL_HELPER_DEV = sx-acl-helper-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-$(eval $(call add_derived_package,$(SX_ACL_HELPER),$(SX_ACL_HELPER_DEV)))
-SX_ACL_HELPER_DBGSYM = sx-acl-helper-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-ifeq ($(SDK_FROM_SRC),y)
-$(eval $(call add_derived_package,$(SX_ACL_HELPER),$(SX_ACL_HELPER_DBGSYM)))
-endif
-
-SX_OBJ_DESC_LIB = sx-obj-desc-lib_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-$(SX_OBJ_DESC_LIB)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/sx-obj-desc-lib
-$(SX_OBJ_DESC_LIB)_DEPENDS += $(APPLIBS_DEV) $(SX_COMPLIB_DEV) $(SXD_LIBS_DEV)
-$(SX_OBJ_DESC_LIB)_RDEPENDS += $(APPLIBS) $(SX_COMPLIB) $(PYTHON_SDK_API)
-SX_OBJ_DESC_LIB_DEV = sx-obj-desc-lib-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-$(eval $(call add_derived_package,$(SX_OBJ_DESC_LIB),$(SX_OBJ_DESC_LIB_DEV)))
-SX_OBJ_DESC_LIB_DBGSYM = sx-obj-desc-lib-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-ifeq ($(SDK_FROM_SRC),y)
-$(eval $(call add_derived_package,$(SX_OBJ_DESC_LIB),$(SX_OBJ_DESC_LIB_DBGSYM)))
-endif
-
-WJH_LIBS = wjh-libs_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-$(WJH_LIBS)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/wjh-libs
-$(WJH_LIBS)_DEPENDS += $(SX_COMPLIB_DEV) $(SXD_LIBS_DEV) $(APPLIBS_DEV) $(SX_ACL_HELPER_DEV)
-$(WJH_LIBS)_RDEPENDS += $(SX_COMPLIB) $(PYTHON_SDK_API) $(SX_ACL_HELPER)
-WJH_LIBS_DEV = wjh-libs-dev_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-$(eval $(call add_derived_package,$(WJH_LIBS),$(WJH_LIBS_DEV)))
-WJH_LIBS_DBGSYM = wjh-libs-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
-ifeq ($(SDK_FROM_SRC),y)
-$(eval $(call add_derived_package,$(WJH_LIBS),$(WJH_LIBS_DBGSYM)))
-endif
-
-SX_HASH_CALC = sx-hash-calc_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb
-$(SX_HASH_CALC)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/sx-hash-calc
-$(SX_HASH_CALC)_DEPENDS += $(SX_COMPLIB_DEV) $(SXD_LIBS_DEV) $(APPLIBS_DEV) $(SX_GEN_UTILS_DEV)
-$(SX_HASH_CALC)_RDEPENDS += $(SX_COMPLIB) $(SXD_LIBS) $(APPLIBS)
-SX_HASH_CALC_DBGSYM = sx-hash-calc-dbgsym_1.mlnx.$(MLNX_SDK_DEB_VERSION)_amd64.deb
-ifeq ($(SDK_FROM_SRC),y)
-$(eval $(call add_derived_package,$(SX_HASH_CALC),$(SX_HASH_CALC_DBGSYM)))
-endif
 
 SX_KERNEL = sx-kernel_1.mlnx.$(MLNX_SDK_DEB_VERSION)_$(CONFIGURED_ARCH).deb
 $(SX_KERNEL)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index ed995079552b..4e2c5e1eb424 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -489,6 +489,14 @@ RUN eatmydata apt-get install -y \
         python3-thrift
 {%- endif %}
 
+{%- if CONFIGURED_ARCH == "amd64" %}
+# Upgrade CMAKE version
+RUN wget https://github.com/Kitware/CMake/releases/download/v3.27.6/cmake-3.27.6-linux-x86_64.sh
+RUN chmod +x cmake-3.27.6-linux-x86_64.sh
+RUN sudo ./cmake-3.27.6-linux-x86_64.sh --skip-license --prefix=/usr
+RUN sudo apt-get update -y
+{%- endif %}
+
 {%- if CROSS_BUILD_ENVIRON == "y" %}
 # Arm vs. amd64 versions conflict - remove amd64 packages
 RUN apt-get remove -y libnl-3-200
diff --git a/sonic-slave-bullseye/Dockerfile.j2 b/sonic-slave-bullseye/Dockerfile.j2
index b1a98863d3fc..06f8cb1e65a9 100644
--- a/sonic-slave-bullseye/Dockerfile.j2
+++ b/sonic-slave-bullseye/Dockerfile.j2
@@ -460,6 +460,14 @@ RUN eatmydata apt install -y \
         libabsl20200923 libc-ares2 python3-six libboost-thread1.74.0 libboost-dev libboost-system-dev libboost-thread-dev libboost-filesystem1.74.0 libboost-program-options1.74.0 libboost-thread1.74.0 libnanomsg5 libpcap0.8 libthrift-0.13.0 libboost-dev libboost-filesystem-dev libboost-program-options-dev libgmp-dev libnanomsg-dev libpcap-dev libtool pkg-config libthrift-dev python3-thrift thrift-compiler libboost-iostreams1.74.0 libgc1 cpp libboost-dev libboost-all-dev libboost-graph-dev libboost-iostreams-dev libfl-dev libgc-dev libgmp-dev libbpf-dev tcpdump libelf-dev llvm clang python3-pyroute2 python3-ply python3-scapy python3-setuptools python3-thrift libthrift-0.13.0
 {%- endif %}
 
+{%- if CONFIGURED_ARCH == "amd64" %}
+# Upgrade CMAKE version
+RUN wget https://github.com/Kitware/CMake/releases/download/v3.27.6/cmake-3.27.6-linux-x86_64.sh
+RUN chmod +x cmake-3.27.6-linux-x86_64.sh
+RUN sudo ./cmake-3.27.6-linux-x86_64.sh --skip-license --prefix=/usr
+RUN sudo apt-get update -y
+{%- endif %}
+
 {%- if CROSS_BUILD_ENVIRON == "y" %}
 # Arm vs. amd64 versions conflict - remove amd64 packages
 RUN apt-get remove -y libnl-3-200

From 8579233280bcaf6a2b20fa5c8233ad843c0c2ad2 Mon Sep 17 00:00:00 2001
From: Peter Bailey <peterbailey@arista.com>
Date: Fri, 6 Dec 2024 13:37:35 -0800
Subject: [PATCH 337/364] Enable SFF Manger on Arista linecards by default
 (#20886)

SFF Manager in xcvrd needs to run to take non-cmis transceivers out of
lpmode as part of the fix for these transceivers remaining in down state.
---
 .../x86_64-arista_common/pmon_daemon_control_linecard.json     | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/device/arista/x86_64-arista_common/pmon_daemon_control_linecard.json b/device/arista/x86_64-arista_common/pmon_daemon_control_linecard.json
index e31cf596f380..a5d08afdc367 100644
--- a/device/arista/x86_64-arista_common/pmon_daemon_control_linecard.json
+++ b/device/arista/x86_64-arista_common/pmon_daemon_control_linecard.json
@@ -1,5 +1,6 @@
 {
     "skip_fancontrol": true,
-    "skip_pcied": true
+    "skip_pcied": true,
+    "enable_xcvrd_sff_mgr": true
 }
 

From cf878ca4ce3764e8f43285f7d199090622c06793 Mon Sep 17 00:00:00 2001
From: Stephen Sun <5379172+stephenxs@users.noreply.github.com>
Date: Sat, 7 Dec 2024 09:28:13 +0800
Subject: [PATCH 338/364] Support bulk chunk size in bulk counter polling
 operation (#20754)

Why I did it
Added a new field in FLEX_COUNTER_TABLE to represent the bulk chunk size for bulk counter polling.
---
 .../yang_model_tests/tests/flex_counter.json  |   8 +
 .../tests_config/flex_counter.json            | 144 ++++++++++++++++++
 .../yang-models/sonic-flex_counter.yang       |  24 +++
 3 files changed, 176 insertions(+)

diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/flex_counter.json b/src/sonic-yang-models/tests/yang_model_tests/tests/flex_counter.json
index 92d96b54f3a1..a508400f26d5 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/flex_counter.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/flex_counter.json
@@ -7,6 +7,14 @@
         "eStrKey": "Range",
         "eStr": "100..4294967295"
     },
+    "FLEX_COUNTER_TABLE_WITH_VALID_BULK_CHUNK_SIZE": {
+        "desc": "FLEX_COUNTER_TABLE_WITH_VALID_BULK_CHUNK_SIZE no failure."
+    },
+    "FLEX_COUNTER_TABLE_WITH_INVALID_BULK_CHUNK_SIZE": {
+        "desc": "Out of range bulk chunk size.",
+        "eStrKey": "Range",
+        "eStr": "1..4294967295"
+    },
     "FLOW_COUNTER_ROUTE_PATTERN_TABLE_WITH_VRF": {
         "desc": "FLOW_COUNTER_ROUTE_PATTERN_TABLE_WITH_VRF no failure."
     },
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json
index 60386bdd72ea..cd39cd899c78 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json
@@ -137,6 +137,150 @@
             }
         }
     },
+    "FLEX_COUNTER_TABLE_WITH_VALID_BULK_CHUNK_SIZE": {
+        "sonic-flex_counter:sonic-flex_counter": {
+            "sonic-flex_counter:FLEX_COUNTER_TABLE": {
+                "BUFFER_POOL_WATERMARK": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "POLL_INTERVAL": 10000
+                },
+                "DEBUG_COUNTER": {
+                    "FLEX_COUNTER_STATUS": "enable"
+                },
+                "PFCWD": {
+                    "FLEX_COUNTER_STATUS": "enable"
+                },
+                "PG_DROP": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "BULK_CHUNK_SIZE": 100,
+                    "POLL_INTERVAL": 10000
+                },
+                "PG_WATERMARK": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "BULK_CHUNK_SIZE": 100,
+                    "POLL_INTERVAL": 10000
+                },
+                "PORT": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "BULK_CHUNK_SIZE": 100,
+                    "POLL_INTERVAL": 1000
+                },
+                "PORT_BUFFER_DROP": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "POLL_INTERVAL": 60000
+                },
+                "PORT_RATES": {
+                    "FLEX_COUNTER_STATUS": "enable"
+                },
+                "QUEUE": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "BULK_CHUNK_SIZE": 100,
+                    "POLL_INTERVAL": 10000
+                },
+                "QUEUE_WATERMARK": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "BULK_CHUNK_SIZE": 100,
+                    "POLL_INTERVAL": 10000
+                },
+                "ACL": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "POLL_INTERVAL": 10000
+                },
+                "TUNNEL": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "POLL_INTERVAL": 10000
+                },
+                "FLOW_CNT_TRAP": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "POLL_INTERVAL": 10000
+                },
+                "FLOW_CNT_ROUTE": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "POLL_INTERVAL": 10000
+                },
+                "WRED_ECN_QUEUE": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "POLL_INTERVAL": 10000
+                },
+                "WRED_ECN_PORT": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "POLL_INTERVAL": 1000
+                }
+            }
+        }
+    },
+    "FLEX_COUNTER_TABLE_WITH_INVALID_BULK_CHUNK_SIZE": {
+        "sonic-flex_counter:sonic-flex_counter": {
+            "sonic-flex_counter:FLEX_COUNTER_TABLE": {
+                "BUFFER_POOL_WATERMARK": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "POLL_INTERVAL": 10000
+                },
+                "DEBUG_COUNTER": {
+                    "FLEX_COUNTER_STATUS": "enable"
+                },
+                "PFCWD": {
+                    "FLEX_COUNTER_STATUS": "enable"
+                },
+                "PG_DROP": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "BULK_CHUNK_SIZE": 0,
+                    "POLL_INTERVAL": 10000
+                },
+                "PG_WATERMARK": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "BULK_CHUNK_SIZE": 0,
+                    "POLL_INTERVAL": 10000
+                },
+                "PORT": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "BULK_CHUNK_SIZE": 0,
+                    "POLL_INTERVAL": 1000
+                },
+                "PORT_BUFFER_DROP": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "POLL_INTERVAL": 60000
+                },
+                "PORT_RATES": {
+                    "FLEX_COUNTER_STATUS": "enable"
+                },
+                "QUEUE": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "BULK_CHUNK_SIZE": 0,
+                    "POLL_INTERVAL": 10000
+                },
+                "QUEUE_WATERMARK": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "BULK_CHUNK_SIZE": 0,
+                    "POLL_INTERVAL": 10000
+                },
+                "ACL": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "POLL_INTERVAL": 10000
+                },
+                "TUNNEL": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "POLL_INTERVAL": 10000
+                },
+                "FLOW_CNT_TRAP": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "POLL_INTERVAL": 10000
+                },
+                "FLOW_CNT_ROUTE": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "POLL_INTERVAL": 10000
+                },
+                "WRED_ECN_QUEUE": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "POLL_INTERVAL": 10000
+                },
+                "WRED_ECN_PORT": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "POLL_INTERVAL": 1000
+                }
+            }
+        }
+    },
     "FLOW_COUNTER_ROUTE_PATTERN_TABLE_WITH_VRF": {
         "sonic-vrf:sonic-vrf":{
             "sonic-vrf:VRF": {
diff --git a/src/sonic-yang-models/yang-models/sonic-flex_counter.yang b/src/sonic-yang-models/yang-models/sonic-flex_counter.yang
index 11e09f9f2a9f..9f4a10feddba 100644
--- a/src/sonic-yang-models/yang-models/sonic-flex_counter.yang
+++ b/src/sonic-yang-models/yang-models/sonic-flex_counter.yang
@@ -41,6 +41,12 @@ module sonic-flex_counter {
                 }
             }
 
+            typedef bulk_chunk_size {
+                type uint32 {
+                    range 1..4294967295;
+                }
+            }
+
             description "FLEX_COUNTER_TABLE part of config_db.json";
 
             /* below are in alphabetical order */
@@ -102,6 +108,9 @@ module sonic-flex_counter {
                 leaf POLL_INTERVAL {
                     type poll_interval;
                 }
+                leaf BULK_CHUNK_SIZE {
+                    type bulk_chunk_size;
+                }
             }
 
             container PG_WATERMARK {
@@ -115,6 +124,9 @@ module sonic-flex_counter {
                 leaf POLL_INTERVAL {
                     type poll_interval;
                 }
+                leaf BULK_CHUNK_SIZE {
+                    type bulk_chunk_size;
+                }
             }
 
             container PORT {
@@ -128,6 +140,9 @@ module sonic-flex_counter {
                 leaf POLL_INTERVAL {
                     type poll_interval;
                 }
+                leaf BULK_CHUNK_SIZE {
+                    type bulk_chunk_size;
+                }
             }
 
             container PORT_RATES {
@@ -151,6 +166,9 @@ module sonic-flex_counter {
                 leaf POLL_INTERVAL {
                     type poll_interval;
                 }
+                leaf BULK_CHUNK_SIZE {
+                    type bulk_chunk_size;
+                }
             }
 
             container QUEUE {
@@ -164,6 +182,9 @@ module sonic-flex_counter {
                 leaf POLL_INTERVAL {
                     type poll_interval;
                 }
+                leaf BULK_CHUNK_SIZE {
+                    type bulk_chunk_size;
+                }
             }
 
             container QUEUE_WATERMARK {
@@ -177,6 +198,9 @@ module sonic-flex_counter {
                 leaf POLL_INTERVAL {
                     type poll_interval;
                 }
+                leaf BULK_CHUNK_SIZE {
+                    type bulk_chunk_size;
+                }
             }
 
             container RIF {

From f5637c0a8ca5e0b3d2a3fe3e632796705eaf030e Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 7 Dec 2024 19:01:25 +0800
Subject: [PATCH 339/364] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#21084)

#### Why I did it
src/sonic-platform-daemons
```
* 60e7224 - (HEAD -> master, origin/test_202411_20, origin/test_202411_100, origin/master, origin/kperumal_202411, origin/HEAD, origin/202411) thermalctld: Add support for fans on non-CPU modules (#555) (9 hours ago) [Patrick MacArthur]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 1962fca3a257..60e7224c7d0d 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 1962fca3a257acc40702565be0cb95fe93068bcb
+Subproject commit 60e7224c7d0d398a8bbb055796d19e0a556f1916

From e5e23d91a5d3fb33d4a6b44cd32b3d566ef0e7e4 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 8 Dec 2024 01:01:06 +0800
Subject: [PATCH 340/364] [submodule] Update submodule sonic-dbsyncd to the
 latest HEAD automatically (#21065)

#### Why I did it
src/sonic-dbsyncd
```
* b0ea01f - (HEAD -> master, origin/test_202411_20, origin/test_202411_100, origin/master, origin/kperumal_202411, origin/HEAD, origin/202411) [lldp]Fix the issue of only one field lldp_rem_time_mark in APPL_DB (#71) (2 days ago) [Zhaohui Sun]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-dbsyncd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-dbsyncd b/src/sonic-dbsyncd
index 7ad34f6f961f..b0ea01fb70a6 160000
--- a/src/sonic-dbsyncd
+++ b/src/sonic-dbsyncd
@@ -1 +1 @@
-Subproject commit 7ad34f6f961ff9dc22c6b382d64ebb249d8ec593
+Subproject commit b0ea01fb70a668b6d828f98a320a271dc76dc300

From f23c8e8ed42c4e0edd584dc51d8da3c684415a7e Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 8 Dec 2024 16:20:44 +0800
Subject: [PATCH 341/364] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#21085)

#### Why I did it
src/sonic-sairedis
```
* 92322be7 - (HEAD -> master, origin/master, origin/kperumal_202411, origin/HEAD, origin/202411) Update the Azure Pipeline build to use Bookworm (#1452) (29 hours ago) [Saikrishna Arcot]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 4f7eed0aac95..92322be787a7 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 4f7eed0aac95288077fa9959dc61eacd2f3938d6
+Subproject commit 92322be787a7b9e972810ba8f250700c4b8182ef

From 8c941fb029128b8b60b03fdcb9cb6559e9d33dc3 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 8 Dec 2024 19:01:25 +0800
Subject: [PATCH 342/364] [submodule] Update submodule sonic-swss-common to the
 latest HEAD automatically (#21014)

#### Why I did it
src/sonic-swss-common
```
* 7425c42 - (HEAD -> master, origin/master, origin/HEAD, origin/202411) Update the Azure Pipeline build to use Bookworm and Ubuntu 22.04 (#937) (26 hours ago) [Saikrishna Arcot]
* fb6ce44 - (origin/test_202411_20, origin/test_202411_100, origin/kperumal_202411) Add definition for MEMORY_STATISTICS table in schema (#898) (4 days ago) [Arham-Nasir]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index aa1021fb14bd..7425c4237b06 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit aa1021fb14bd79c01e34ea99733b2213da70029a
+Subproject commit 7425c4237b06c9c7b553a9a3bcb540c2f7720fcf

From 410d06ec2974dd5cee0ce1072de66b389975a570 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 8 Dec 2024 19:01:30 +0800
Subject: [PATCH 343/364] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#21011)

#### Why I did it
src/sonic-linux-kernel
```
* c281fc9 - (HEAD -> master, origin/test_202411_20, origin/test_202411_100, origin/master, origin/kperumal_202411, origin/HEAD, origin/202411) Integrate HW-MGMT 7.0040.2000 Changes (#446) (4 days ago) [DavidZagury]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index fe78170347f9..c281fc9e153a 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit fe78170347f947f67828f94b75d3ff8e12f7fd43
+Subproject commit c281fc9e153aa1c91d1f6876c1360bf77f82108c

From d53d86d4ac689bc4b88ceb8bc69e0bcc27ee0833 Mon Sep 17 00:00:00 2001
From: sophiek <skravitz@nvidia.com>
Date: Mon, 9 Dec 2024 10:04:50 +0200
Subject: [PATCH 344/364] [Mellanox] removed component_versions.dep file
 (#19982)

- Why I did it
The component versions file that is created during compilation was not being updated because it was being cached, even when some of the versions on it should have been updated.

- How I did it
Removed component-versions.dep
---
 platform/mellanox/component-versions.dep | 10 ----------
 platform/mellanox/rules.dep              |  1 -
 2 files changed, 11 deletions(-)
 delete mode 100644 platform/mellanox/component-versions.dep

diff --git a/platform/mellanox/component-versions.dep b/platform/mellanox/component-versions.dep
deleted file mode 100644
index 5457ab3d4919..000000000000
--- a/platform/mellanox/component-versions.dep
+++ /dev/null
@@ -1,10 +0,0 @@
-# DPKG FRK
-
-SPATH := $($(COMPONENT_VERSIONS_FILE)_SRC_PATH)
-DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/component-versions.mk $(PLATFORM_PATH)/component-versions.dep
-DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES += $(shell git ls-files -- $(SPATH))
-
-$(COMPONENT_VERSIONS_FILE)_CACHE_MODE := GIT_CONTENT_SHA
-$(COMPONENT_VERSIONS_FILE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST)
-$(COMPONENT_VERSIONS_FILE)_DEP_FILES := $(DEP_FILES)
diff --git a/platform/mellanox/rules.dep b/platform/mellanox/rules.dep
index 725331b0f526..cffb61f0da1c 100644
--- a/platform/mellanox/rules.dep
+++ b/platform/mellanox/rules.dep
@@ -16,5 +16,4 @@ include $(PLATFORM_PATH)/issu-version.dep
 include $(PLATFORM_PATH)/mlnx-onie-fw-update.dep
 include $(PLATFORM_PATH)/mlnx-ssd-fw-update.dep
 include $(PLATFORM_PATH)/install-pending-fw.dep
-include $(PLATFORM_PATH)/component-versions.dep
 include $(PLATFORM_PATH)/rshim.dep

From 11343f95d66dd82d304bc239b563e91ae61d8d4d Mon Sep 17 00:00:00 2001
From: Sai Kiran <110003254+opcoder0@users.noreply.github.com>
Date: Tue, 10 Dec 2024 11:29:26 +1100
Subject: [PATCH 345/364] Build and include tacacs+ for PTF Py3 only image
 (#20701)

Why I did it
The "tacacs+" package is not available in the apt repository for Debian Bullseye and beyond. The sonic-mgmt tests require tacacs+ and this PR builds it from source and adds it to the PY3 only image.

Work item tracking
Microsoft ADO (number only): 29946202

How I did it
Clone tacacs+ from https://github.com/robot527/tac_plus build and install it.

How to verify it
By running sonic-mgmt restart-ptf step with newly built image.

Tested branch (Please provide the tested image version)
Not applicable.

Description for the changelog
[docker-ptf]: Build and include tacacs+ for py3only image

The "tacacs+" package is not available in the apt repository for Debian Bullseye and beyond. The sonic-mgmt tests require tacacs+ and this commit builds it from source and adds it to the PY3 only image.
Link to config_db schema for YANG module changes
Not applicable.
---
 dockers/docker-ptf/Dockerfile.j2 | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/dockers/docker-ptf/Dockerfile.j2 b/dockers/docker-ptf/Dockerfile.j2
index 5148dd1125f1..8dbc1a2ce89e 100644
--- a/dockers/docker-ptf/Dockerfile.j2
+++ b/dockers/docker-ptf/Dockerfile.j2
@@ -52,6 +52,11 @@ RUN apt-get update          \
         libboost-atomic1.71.0 \
 {% else %}
         libboost-atomic1.74.0 \
+        flex                  \
+        bison                 \
+        tcpd                  \
+        libwrap0              \
+        libwrap0-dev          \
 {% endif %}
         less                \
         git                 \
@@ -73,8 +78,6 @@ RUN apt-get update          \
         python3-scapy       \
         python3-six         \
         libpcap-dev         \
-# TODO check if tacacs+ is required by tests
-# tacacs+ has been dropped from bullseye
 {% if PTF_ENV_PY_VER == "mixed" %}
         tacacs+             \
 {% endif %}
@@ -168,6 +171,16 @@ RUN rm -rf /debs \
     && cd /opt             \
     && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py
 
+{% if PTF_ENV_PY_VER == "py3" %}
+RUN git clone https://github.com/facebook/tac_plus \
+    && cd tac_plus \
+    && cd tacacs-F4.0.4.28 \
+    && ./configure \
+    && make install \
+    && ln -s /usr/local/sbin/tac_plus /usr/sbin/tac_plus \
+    && ln -s /usr/local/bin/tac_pwd /usr/sbin/tac_pwd
+{% endif %}
+
 {% if PTF_ENV_PY_VER == "mixed" %}
 RUN python3 -m venv --system-site-packages env-python3
 # Activating a virtualenv. The virtualenv automatically works for RUN, ENV and CMD.

From cc93c9044a52f3b8f4ac0c06e82327cbd104b9ff Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 10 Dec 2024 16:02:09 +0800
Subject: [PATCH 346/364] [submodule] Update submodule sonic-gnmi to the latest
 HEAD automatically (#21105)

#### Why I did it
src/sonic-gnmi
```
* 6eade51 - (HEAD -> master, origin/master, origin/HEAD) Merge pull request #319 from hdwhdw/upgrade (7 hours ago) [Dawei Huang]
* 5d68f51 - Merge branch 'sonic-net:master' into upgrade (2 weeks ago) [Dawei Huang]
* d62df54 - format fix. (5 weeks ago) [Dawei Huang]
* 874c6ec - Merge branch 'master' into upgrade (5 weeks ago) [Dawei Huang]
* 2a11f04 - DBUS client code and unit test. (5 weeks ago) [Dawei Huang]
* 2846d28 - Add dbus image counter (5 weeks ago) [Dawei Huang]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 2c4b9c85833b..6eade5116b9e 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 2c4b9c85833b4b71b35fd1099271bd67aaa3b3b3
+Subproject commit 6eade5116b9e2446e37b39cc46e6671b0176f6f4

From 92bf86ab1719b66baa118f4fcb37d8db0d40ba87 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 10 Dec 2024 19:01:02 +0800
Subject: [PATCH 347/364] [submodule] Update submodule sonic-platform-common to
 the latest HEAD automatically (#21108)

#### Why I did it
src/sonic-platform-common
```
* e955e58 - (HEAD -> master, origin/master, origin/HEAD) get_error_description should return 'OK' instead of None when there is no error (#518) (18 hours ago) [Kebo Liu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 0f2e22faccd0..e955e584ebf1 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 0f2e22faccd093a1e5d18235fe119a860be7855e
+Subproject commit e955e584ebf1b2fc9d9eb640b24aad4819612439

From 7f79b02cb83a8de0bd4da08952b8b5aef11f0a39 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 11 Dec 2024 01:01:19 +0800
Subject: [PATCH 348/364] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20573)

#### Why I did it
src/sonic-utilities
```
* 32e6de7f - (HEAD -> master, origin/master, origin/HEAD) Update DB migrator script to next branch 202505 (#3664) (3 days ago) [Kumaresh Perumal]
* 8d00aba7 - (origin/test_202411_20, origin/test_202411_100, origin/kperumal_202411, origin/202411) Fix save_file command in generate_dump (#3647) (4 days ago) [DavidZagury]
* 038aaa5f - Revert "Speed up route_check script" (#3653) (4 days ago) [xwjiang-ms]
* 032a0e03 - [config]Restrict YANG validation to Golden Config (#3656) (4 days ago) [jingwenxie]
* 47b79bea - Update gcu_field_operation_validators.conf.json with Arista-7260CX3-D108C10 (#3650) (4 days ago) [Dev Ojha]
* 845f46ef - Update PR checker pipeline to point to bookworm (#3651) (4 days ago) [bingwang-ms]
* 28e645f4 - [show_tech] Filter out a list of commands in generate_dump script which are not applicable to Supervisor (#3646) (5 days ago) [Marty Y. Lok]
* b767cb86 - [cisco|express-boot]: Add support for cisco express boot in sonic-utilities (#3056) (6 days ago) [jhli-cisco]
* f6b9912c - Fix show command column change issue (#3645) (8 days ago) [Feng-msft]
* 9cd6c8de - Debug dump utility dash objects update (#3387) (8 days ago) [Gagan Punathil Ellath]
* f705c456 - Validate interface name length in CLI (#3580) (8 days ago) [Stepan Blyshchak]
* 3d78cb16 - [Mellanox] Update the save_file command in generate_dump to handle folders (#3631) (13 days ago) [DavidZagury]
* 5086a43b - Fix counterpoll show for ENI Counters (#3618) (13 days ago) [Vivek]
* 70f81397 - Extra delay between running firmware and updating firmware version (#3610) (2 weeks ago) [Stephen Sun]
* 636f7f1d - Add port FEC BER show changes (#3607) (2 weeks ago) [vincentpcng]
* 5e60031b - Supports FRR-VRRP configuration (#2949) (3 weeks ago) [Philo]
* 9bd37dc6 - [ARM64][Warm-Reboot]: Get boot arguments from uboot environment (#3613) (3 weeks ago) [Parthiv Shah]
* 171b16c2 - platform/innovium renaming to platform/marvell-teralynx (#3474) (3 weeks ago) [krismarvell]
* 2cbfcc91 - [Mellanox] Add Mellanox-SN5600-C224O8 to gcu_field.json (#3612) (4 weeks ago) [noaOrMlnx]
* a8f7bde0 - PVST Feature commit (#3567) (4 weeks ago) [Divya Kumaran Chandralekha]
* 0e188076 - Refresh dump file modify timestamp before cleanup call (#3595) (4 weeks ago) [anamehra]
* 8f3c5ef5 - [warm-reboot] Add support to pass extra kernel cmdline parameters (#3192) (4 weeks ago) [Pavan Naregundi]
* 96774477 - Run yang validation in db migrator (#3102) (4 weeks ago) [ganglv]
* 9708f52b - [Mellanox] Update C256X1 SKU to be C256S1 in gcu_field.json (#3611) (4 weeks ago) [noaOrMlnx]
* 093ed4aa - [SPM] Add logic to disable the feature before stopping it and enabling it before starting (#3344) (4 weeks ago) [Vadym Hlushko]
* 7d013dff - Fix slash in path. (#3573) (5 weeks ago) [Xincun Li]
* 0af4386e - Consolidate the get running config way. (#3585) (5 weeks ago) [Xincun Li]
* 964b4895 - Fix for integer overflow of counter value if its too large (#3596) (5 weeks ago) [harjotsinghpawra]
* 3354d08a - [config] Bypass standard input for reload (#3597) (5 weeks ago) [jingwenxie]
* 7cbcfda5 - Speed up route_check script (#3544) (5 weeks ago) [Deepak Singhal]
* 329fc223 - Add support of the pensando-dpu platform to generate-dump utility. (#3557) (6 weeks ago) [BHUKYA SIDDHU]
* 0ae2ec1e - Add CLI for bmp configdb entity Enable/Disable (#3286) (6 weeks ago) [Feng-msft]
* 5b37ee6c - Vnet_route_check TCP socket for DB connection. (#3578) (6 weeks ago) [siqbal1986]
* d64a90a0 - Adds logic to get default disk and check disk type (#3399) (6 weeks ago) [Ashwin Srinivasan]
* b2b97340 - [Banner] Added CLI commands to configure Banner and display current configuration (#3021) (6 weeks ago) [Sviatoslav Boichuk]
* d0aa94a1 - Revert "Record and warn tables which not covered by YANG (#3583)" (#3588) (7 weeks ago) [jingwenxie]
* aeda86a1 - Record and warn tables which not covered by YANG (#3583) (7 weeks ago) [jingwenxie]
* dd34d7c4 - Revert "Skip default lanes dup check (#3489)" (#3572) (7 weeks ago) [Xincun Li]
* 6c8007fa - [Mellanox]Remove deprecated sdk sniffer cli and collect sdk dump in show techsupport (#3491) (7 weeks ago) [Yuanzhe]
* 89bb87ad - Add YANG validation for config reload if file is given (#3576) (7 weeks ago) [jingwenxie]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 4a6d12180763..32e6de7ff86f 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 4a6d12180763af3a62c8ae773f140737052d0011
+Subproject commit 32e6de7ff86fc6bd5abeddb408152fec006798b6

From 7a7be63e9566dbab49f42d3b26107734604f90f9 Mon Sep 17 00:00:00 2001
From: arista-nwolfe <94405414+arista-nwolfe@users.noreply.github.com>
Date: Tue, 10 Dec 2024 14:21:02 -0500
Subject: [PATCH 349/364] Update Arista SKU lag_id_end to 1023 (#21097)

The following PRs made 1024 incorrect:
https://github.com/sonic-net/sonic-buildimage/pull/20369
https://github.com/sonic-net/sonic-swss/pull/3303

This fixes:
https://github.com/sonic-net/sonic-buildimage/issues/21096
---
 device/arista/x86_64-arista_7800_sup/chassisdb.conf | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/device/arista/x86_64-arista_7800_sup/chassisdb.conf b/device/arista/x86_64-arista_7800_sup/chassisdb.conf
index ebf71d01b165..f336d0cdb994 100644
--- a/device/arista/x86_64-arista_7800_sup/chassisdb.conf
+++ b/device/arista/x86_64-arista_7800_sup/chassisdb.conf
@@ -3,4 +3,4 @@ chassis_db_address=127.100.1.1
 midplane_subnet=127.100.0.0/16
 
 lag_id_start=1
-lag_id_end=1024
+lag_id_end=1023

From c715dffc8c5690f084bbf801d0d0101098ec5c00 Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Tue, 10 Dec 2024 13:05:04 -0800
Subject: [PATCH 350/364] [FRR]Fixing zebra to use internal rbtree per NS tree
 of ifps (#21095)

Adding the below fix from FRR FRRouting/frr#17297

This is to fix the following crash which is a statistical issue

[Thread debugging using libthread_db enabled]
Using host libthread_db library "/lib/x86_64-linux-gnu/libthread_db.so.1".
Core was generated by `/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_nl -M snmp'.
Program terminated with signal SIGABRT, Aborted.
#0  0x00007fccd7351e2c in ?? () from /lib/x86_64-linux-gnu/libc.so.6
[Current thread is 1 (Thread 0x7fccd6faf7c0 (LWP 36))]
(gdb) bt
#0  0x00007fccd7351e2c in ?? () from /lib/x86_64-linux-gnu/libc.so.6
#1  0x00007fccd7302fb2 in raise () from /lib/x86_64-linux-gnu/libc.so.6
#2  0x00007fccd72ed472 in abort () from /lib/x86_64-linux-gnu/libc.so.6
#3  0x00007fccd75bb3a9 in _zlog_assert_failed (xref=xref@entry=0x7fccd7652380 <_xref.16>, extra=extra@entry=0x0) at ../lib/zlog.c:678
#4  0x00007fccd759b2fe in route_node_delete (node=<optimized out>) at ../lib/table.c:352
#5  0x00007fccd759b445 in route_unlock_node (node=0x0) at ../lib/table.h:258
#6  route_next (node=<optimized out>) at ../lib/table.c:436
#7  route_next (node=node@entry=0x56029d89e560) at ../lib/table.c:410
#8  0x000056029b6b6b7a in if_lookup_by_name_per_ns (ns=ns@entry=0x56029d873d90, ifname=ifname@entry=0x7fccc0029340 "PortChannel1020")
    at ../zebra/interface.c:312
#9  0x000056029b6b8b36 in zebra_if_dplane_ifp_handling (ctx=0x7fccc0029310) at ../zebra/interface.c:1867
#10 zebra_if_dplane_result (ctx=0x7fccc0029310) at ../zebra/interface.c:2221
#11 0x000056029b7137a9 in rib_process_dplane_results (thread=<optimized out>) at ../zebra/zebra_rib.c:4810
#12 0x00007fccd75a0e0d in thread_call (thread=thread@entry=0x7ffe8e553cc0) at ../lib/thread.c:1990
#13 0x00007fccd7559368 in frr_run (master=0x56029d65a040) at ../lib/libfrr.c:1198
#14 0x000056029b6ac317 in main (argc=9, argv=0x7ffe8e5540d8) at ../zebra/main.c:478
---
 ...zebra-lib-use-internal-rbtree-per-ns.patch | 1826 +++++++++++++++++
 src/sonic-frr/patch/series                    |    1 +
 2 files changed, 1827 insertions(+)
 create mode 100644 src/sonic-frr/patch/0062-zebra-lib-use-internal-rbtree-per-ns.patch

diff --git a/src/sonic-frr/patch/0062-zebra-lib-use-internal-rbtree-per-ns.patch b/src/sonic-frr/patch/0062-zebra-lib-use-internal-rbtree-per-ns.patch
new file mode 100644
index 000000000000..4fb56f6094f5
--- /dev/null
+++ b/src/sonic-frr/patch/0062-zebra-lib-use-internal-rbtree-per-ns.patch
@@ -0,0 +1,1826 @@
+From a4eb079b5d87dbc6720ac9788ad3bec5a25aa519 Mon Sep 17 00:00:00 2001
+From: Mark Stapp <mjs@cisco.com>
+Date: Tue, 15 Oct 2024 11:31:22 -0400
+Subject: [PATCH 1/9] zebra: make a zif MTYPE internal/static
+
+Make an MTYPE used in zifs internal/static
+
+Signed-off-by: Mark Stapp <mjs@cisco.com>
+---
+ zebra/interface.c | 2 +-
+ zebra/interface.h | 3 ---
+ 2 files changed, 1 insertion(+), 4 deletions(-)
+
+diff --git a/zebra/interface.c b/zebra/interface.c
+index 5ce222cc04..bbdc62c1c2 100644
+--- a/zebra/interface.c
++++ b/zebra/interface.c
+@@ -44,7 +44,7 @@ DEFINE_MTYPE_STATIC(ZEBRA, ZINFO, "Zebra Interface Information");
+ DEFINE_HOOK(zebra_if_extra_info, (struct vty * vty, struct interface *ifp),
+ 	    (vty, ifp));
+ 
+-DEFINE_MTYPE(ZEBRA, ZIF_DESC, "Intf desc");
++DEFINE_MTYPE_STATIC(ZEBRA, ZIF_DESC, "Intf desc");
+ 
+ static void if_down_del_nbr_connected(struct interface *ifp);
+ 
+diff --git a/zebra/interface.h b/zebra/interface.h
+index 7d633f32d2..4cbec83cce 100644
+--- a/zebra/interface.h
++++ b/zebra/interface.h
+@@ -94,9 +94,6 @@ enum zebra_if_flags {
+ #define ZEBRA_IF_IS_PROTODOWN_ONLY_EXTERNAL(zif)                               \
+ 	((zif)->protodown_rc == ZEBRA_PROTODOWN_EXTERNAL)
+ 
+-/* Mem type for zif desc */
+-DECLARE_MTYPE(ZIF_DESC);
+-
+ /* `zebra' daemon local interface structure. */
+ struct zebra_if {
+ 	/* back pointer to the interface */
+-- 
+2.43.2
+
+
+From ccc18a117a74b3d7caec9db926b0d52e9180ef13 Mon Sep 17 00:00:00 2001
+From: Mark Stapp <mjs@cisco.com>
+Date: Tue, 22 Oct 2024 15:20:54 -0700
+Subject: [PATCH 2/9] zebra: add new per-NS tree of interfaces
+
+Add new per-NS interface typerb tree, using external linkage, to
+replace the use of the if_table table.
+Add apis to iterate the per-NS collection - which is not public.
+
+Signed-off-by: Mark Stapp <mjs@cisco.com>
+---
+ zebra/zebra_ns.c | 188 +++++++++++++++++++++++++++++++++++++++++++++++
+ zebra/zebra_ns.h |  34 +++++++++
+ 2 files changed, 222 insertions(+)
+
+diff --git a/zebra/zebra_ns.c b/zebra/zebra_ns.c
+index 803d8f0034..c6b279a9d7 100644
+--- a/zebra/zebra_ns.c
++++ b/zebra/zebra_ns.c
+@@ -28,9 +28,185 @@
+ extern struct zebra_privs_t zserv_privs;
+ 
+ DEFINE_MTYPE_STATIC(ZEBRA, ZEBRA_NS, "Zebra Name Space");
++DEFINE_MTYPE_STATIC(ZEBRA, ZNS_IFP, "Zebra NS Ifp");
++
++static int ifp_tree_cmp(const struct ifp_tree_link *a, const struct ifp_tree_link *b);
++
++DECLARE_RBTREE_UNIQ(ifp_tree, struct ifp_tree_link, link, ifp_tree_cmp);
+ 
+ static struct zebra_ns *dzns;
+ 
++static int ifp_tree_cmp(const struct ifp_tree_link *a, const struct ifp_tree_link *b)
++{
++	return (a->ifindex - b->ifindex);
++}
++
++/*
++ * Link an ifp into its parent NS
++ */
++void zebra_ns_link_ifp(struct zebra_ns *zns, struct interface *ifp)
++{
++	struct zebra_if *zif;
++	struct ifp_tree_link *link, tlink = {};
++
++	zif = ifp->info;
++	assert(zif != NULL);
++
++	if (zif->ns_tree_link) {
++		assert(zif->ns_tree_link->zns == zns);
++		assert(zif->ns_tree_link->ifp == ifp);
++		return;
++	}
++
++	/* Lookup first - already linked? */
++	tlink.ifindex = ifp->ifindex;
++	link = ifp_tree_find(&zns->ifp_tree, &tlink);
++	if (link) {
++		assert(link->ifp == ifp);
++		return;
++	}
++
++	/* Allocate new linkage struct and add */
++	link = XCALLOC(MTYPE_ZNS_IFP, sizeof(struct ifp_tree_link));
++	link->ifp = ifp;
++	link->ifindex = ifp->ifindex;
++	link->zns = zns;
++
++	ifp_tree_add(&zns->ifp_tree, link);
++
++	zif->ns_tree_link = link;
++}
++
++/*
++ * Unlink an ifp from its parent NS (probably because the ifp is being deleted)
++ */
++void zebra_ns_unlink_ifp(struct interface *ifp)
++{
++	struct zebra_if *zif;
++	struct ifp_tree_link *link;
++	struct zebra_ns *zns;
++
++	zif = ifp->info;
++	if (zif && zif->ns_tree_link) {
++		link = zif->ns_tree_link;
++		zns = link->zns;
++
++		ifp_tree_del(&zns->ifp_tree, link);
++
++		zif->ns_tree_link = NULL;
++
++		XFREE(MTYPE_ZNS_IFP, link);
++	}
++}
++
++/*
++ * ifp lookup apis
++ */
++struct interface *zebra_ns_lookup_ifp(struct zebra_ns *zns, uint32_t ifindex)
++{
++	struct interface *ifp = NULL;
++	struct ifp_tree_link *link, tlink = {};
++
++	/* Init temp struct for lookup */
++	tlink.ifindex = ifindex;
++
++	link = ifp_tree_find(&zns->ifp_tree, &tlink);
++	if (link)
++		ifp = link->ifp;
++
++	return ifp;
++}
++
++static int lookup_ifp_name_cb(struct interface *ifp, void *arg);
++
++struct ifp_name_ctx {
++	const char *ifname;
++	struct interface *ifp;
++};
++
++struct interface *zebra_ns_lookup_ifp_name(struct zebra_ns *zns, const char *ifname)
++{
++	struct ifp_name_ctx ctx = {};
++
++	/* Hand context struct into walker function for use in its callback */
++	ctx.ifname = ifname;
++	zebra_ns_ifp_walk(zns, lookup_ifp_name_cb, &ctx);
++
++	return ctx.ifp;
++}
++
++static int lookup_ifp_name_cb(struct interface *ifp, void *arg)
++{
++	struct ifp_name_ctx *pctx = arg;
++
++	if (strcmp(ifp->name, pctx->ifname) == 0) {
++		pctx->ifp = ifp;
++		return NS_WALK_STOP;
++	}
++
++	return NS_WALK_CONTINUE;
++}
++
++/* Iterate collection of ifps, calling application's callback. Callback uses
++ * return semantics from lib/ns.h: return NS_WALK_STOP to stop the iteration.
++ * Caller's 'arg' is included in each callback.
++ */
++int zebra_ns_ifp_walk(struct zebra_ns *zns,
++		      int (*func)(struct interface *ifp, void *arg), void *arg)
++{
++	struct ifp_tree_link *link;
++	int ret = NS_WALK_CONTINUE;
++
++	frr_each (ifp_tree, &zns->ifp_tree, link) {
++		ret = (func)(link->ifp, arg);
++		if (ret == NS_WALK_STOP)
++			break;
++	}
++
++	if (ret == NS_WALK_STOP)
++		return NS_WALK_STOP;
++	else
++		return NS_WALK_CONTINUE;
++}
++
++/*
++ * Walk all NSes, and all ifps for each NS.
++ */
++struct ns_ifp_walk_ctx {
++	int (*func)(struct interface *ifp, void *arg);
++	void *arg;
++	int ret;
++};
++
++static int ns_ifp_walker(struct ns *ns, void *in_param, void **unused);
++
++void zebra_ns_ifp_walk_all(int (*func)(struct interface *ifp, void *arg), void *arg)
++{
++	struct ns_ifp_walk_ctx ctx = {};
++
++	ctx.func = func;
++	ctx.arg = arg;
++
++	ns_walk_func(ns_ifp_walker, &ctx, NULL);
++}
++
++static int ns_ifp_walker(struct ns *ns, void *in_param, void **unused)
++{
++	struct zebra_ns *zns;
++	struct ns_ifp_walk_ctx *ctx = in_param;
++	int ret = NS_WALK_CONTINUE;
++
++	zns = ns->info;
++	if (zns == NULL)
++		goto done;
++
++	ret = zebra_ns_ifp_walk(zns, ctx->func, ctx->arg);
++
++done:
++
++	return ret;
++}
++
+ static int zebra_ns_disable_internal(struct zebra_ns *zns, bool complete);
+ 
+ struct zebra_ns *zebra_ns_lookup(ns_id_t ns_id)
+@@ -59,6 +235,7 @@ static int zebra_ns_new(struct ns *ns)
+ 
+ 	/* Do any needed per-NS data structure allocation. */
+ 	zns->if_table = route_table_init();
++	ifp_tree_init(&zns->ifp_tree);
+ 
+ 	return 0;
+ }
+@@ -66,11 +243,22 @@ static int zebra_ns_new(struct ns *ns)
+ static int zebra_ns_delete(struct ns *ns)
+ {
+ 	struct zebra_ns *zns = (struct zebra_ns *)ns->info;
++	struct zebra_if *zif;
++	struct ifp_tree_link *link;
+ 
+ 	if (IS_ZEBRA_DEBUG_EVENT)
+ 		zlog_info("ZNS %s with id %u (deleted)", ns->name, ns->ns_id);
+ 	if (!zns)
+ 		return 0;
++
++	/* Clean up ifp tree */
++	while ((link = ifp_tree_pop(&zns->ifp_tree)) != NULL) {
++		zif = link->ifp->info;
++
++		zif->ns_tree_link = NULL;
++		XFREE(MTYPE_ZNS_IFP, link);
++	}
++
+ 	XFREE(MTYPE_ZEBRA_NS, ns->info);
+ 	return 0;
+ }
+diff --git a/zebra/zebra_ns.h b/zebra/zebra_ns.h
+index 8d988c3f82..1ddecc8252 100644
+--- a/zebra/zebra_ns.h
++++ b/zebra/zebra_ns.h
+@@ -32,6 +32,20 @@ struct nlsock {
+ };
+ #endif
+ 
++/* Tree of interfaces: external linkage struct, and rbtree */
++PREDECL_RBTREE_UNIQ(ifp_tree);
++
++struct ifp_tree_link {
++	struct ifp_tree_item link;
++
++	ifindex_t ifindex;
++
++	struct interface *ifp;
++
++	/* Backpointer */
++	struct zebra_ns *zns;
++};
++
+ struct zebra_ns {
+ 	/* net-ns name.  */
+ 	char name[VRF_NAMSIZ];
+@@ -55,12 +69,32 @@ struct zebra_ns {
+ 
+ 	struct route_table *if_table;
+ 
++	/* Tree of interfaces in this ns */
++	struct ifp_tree_head ifp_tree;
++
+ 	/* Back pointer */
+ 	struct ns *ns;
+ };
+ 
+ struct zebra_ns *zebra_ns_lookup(ns_id_t ns_id);
+ 
++/* Manage collection of ifps per-NS */
++void zebra_ns_link_ifp(struct zebra_ns *zns, struct interface *ifp);
++void zebra_ns_unlink_ifp(struct interface *ifp);
++struct interface *zebra_ns_lookup_ifp(struct zebra_ns *zns, uint32_t ifindex);
++struct interface *zebra_ns_lookup_ifp_name(struct zebra_ns *zns, const char *ifname);
++
++/* Iterate collection of ifps, calling application's callback. Callback uses
++ * return semantics from lib/ns.h: return NS_WALK_STOP to stop the iteration.
++ * Caller's 'arg' is included in each callback.
++ * The iterator returns STOP or CONTINUE also.
++ */
++int zebra_ns_ifp_walk(struct zebra_ns *zns,
++		      int (*func)(struct interface *ifp, void *arg), void *arg);
++
++/* Walk all NSes, and all ifps for each NS. */
++void zebra_ns_ifp_walk_all(int (*func)(struct interface *ifp, void *arg), void *arg);
++
+ int zebra_ns_init(void);
+ int zebra_ns_enable(ns_id_t ns_id, void **info);
+ int zebra_ns_disabled(struct ns *ns);
+-- 
+2.43.2
+
+
+From 24957f224f8a9918e451d152917feb5cf5ce0d2f Mon Sep 17 00:00:00 2001
+From: Mark Stapp <mjs@cisco.com>
+Date: Tue, 22 Oct 2024 15:23:17 -0700
+Subject: [PATCH 3/9] zebra: use new per-NS interface iteration
+
+Replace use of the old if_table with the new per-NS ifp
+iteration apis.
+
+Signed-off-by: Mark Stapp <mjs@cisco.com>
+---
+ zebra/if_netlink.c | 61 +++++++++++++++++++++++++++++++---------------
+ 1 file changed, 41 insertions(+), 20 deletions(-)
+
+diff --git a/zebra/if_netlink.c b/zebra/if_netlink.c
+index 5f096e3039..f7567f06d0 100644
+--- a/zebra/if_netlink.c
++++ b/zebra/if_netlink.c
+@@ -1775,6 +1775,15 @@ static int netlink_request_tunneldump(struct zebra_ns *zns, int family,
+ 	return netlink_request(&zns->netlink_cmd, &req);
+ }
+ 
++/* Prototype for tunneldump walker */
++static int tunneldump_walk_cb(struct interface *ifp, void *arg);
++
++struct tunneldump_ctx {
++	struct zebra_ns *zns;
++	struct zebra_dplane_info *dp_info;
++	int ret;
++};
++
+ /*
+  * Currently we only ask for vxlan l3svd vni information.
+  * In the future this can be expanded.
+@@ -1782,35 +1791,47 @@ static int netlink_request_tunneldump(struct zebra_ns *zns, int family,
+ int netlink_tunneldump_read(struct zebra_ns *zns)
+ {
+ 	int ret = 0;
++	struct tunneldump_ctx ctx = {};
+ 	struct zebra_dplane_info dp_info;
+-	struct route_node *rn;
+-	struct interface *tmp_if = NULL;
+-	struct zebra_if *zif;
+-	struct nlsock *netlink_cmd = &zns->netlink_cmd;
+ 
+ 	zebra_dplane_info_from_zns(&dp_info, zns, true /*is_cmd*/);
+ 
+-	for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) {
+-		tmp_if = (struct interface *)rn->info;
+-		if (!tmp_if)
+-			continue;
+-		zif = tmp_if->info;
+-		if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
+-			continue;
++	/* Set up context and call iterator */
++	ctx.zns = zns;
++	ctx.dp_info = &dp_info;
+ 
+-		ret = netlink_request_tunneldump(zns, PF_BRIDGE,
+-						 tmp_if->ifindex);
+-		if (ret < 0)
+-			return ret;
++	zebra_ns_ifp_walk(zns, tunneldump_walk_cb, &ctx);
++	ret = ctx.ret;
+ 
+-		ret = netlink_parse_info(netlink_link_change, netlink_cmd,
+-					 &dp_info, 0, true);
++	return ret;
++}
+ 
+-		if (ret < 0)
+-			return ret;
++static int tunneldump_walk_cb(struct interface *ifp, void *arg)
++{
++	int ret;
++	struct tunneldump_ctx *ctx = arg;
++	struct zebra_if *zif;
++
++	zif = ifp->info;
++	if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
++		goto done;
++
++	ret = netlink_request_tunneldump(ctx->zns, PF_BRIDGE, ifp->ifindex);
++	if (ret < 0) {
++		ctx->ret = ret;
++		return NS_WALK_STOP;
+ 	}
+ 
+-	return 0;
++	ret = netlink_parse_info(netlink_link_change, &(ctx->zns->netlink_cmd),
++				 ctx->dp_info, 0, true);
++
++	if (ret < 0) {
++		ctx->ret = ret;
++		return NS_WALK_STOP;
++	}
++
++done:
++	return NS_WALK_CONTINUE;
+ }
+ 
+ static const char *port_state2str(uint8_t state)
+-- 
+2.43.2
+
+
+From 8504e1119d084deef326a72f930873e6f7d921a6 Mon Sep 17 00:00:00 2001
+From: Mark Stapp <mjs@cisco.com>
+Date: Tue, 22 Oct 2024 15:56:11 -0700
+Subject: [PATCH 4/9] isisd: add include file
+
+Add an include to an isis header so it's self-contained.
+
+Signed-off-by: Mark Stapp <mjs@cisco.com>
+---
+ isisd/isis_route.h | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/isisd/isis_route.h b/isisd/isis_route.h
+index 4d49a5ae9c..d9572336af 100644
+--- a/isisd/isis_route.h
++++ b/isisd/isis_route.h
+@@ -12,6 +12,7 @@
+ #ifndef _ZEBRA_ISIS_ROUTE_H
+ #define _ZEBRA_ISIS_ROUTE_H
+ 
++#include "lib/table.h"
+ #include "lib/nexthop.h"
+ 
+ struct isis_nexthop {
+-- 
+2.43.2
+
+
+From eb75106d9a0e5bc689f914e5ff9ebd3528fd3b7a Mon Sep 17 00:00:00 2001
+From: Mark Stapp <mjs@cisco.com>
+Date: Tue, 22 Oct 2024 15:57:53 -0700
+Subject: [PATCH 5/9] zebra: removing use of per-NS if_table
+
+Remove use of the per-NS if_table from zebra/interface
+module. Use new add, lookup, and iteration apis.
+
+Signed-off-by: Mark Stapp <mjs@cisco.com>
+---
+ zebra/interface.c | 144 +++++++++++++++-------------------------------
+ zebra/interface.h |   5 +-
+ 2 files changed, 49 insertions(+), 100 deletions(-)
+
+diff --git a/zebra/interface.c b/zebra/interface.c
+index bbdc62c1c2..7ec80cb259 100644
+--- a/zebra/interface.c
++++ b/zebra/interface.c
+@@ -233,62 +233,14 @@ static int if_zebra_delete_hook(struct interface *ifp)
+ 	return 0;
+ }
+ 
+-/* Build the table key */
+-static void if_build_key(uint32_t ifindex, struct prefix *p)
+-{
+-	p->family = AF_INET;
+-	p->prefixlen = IPV4_MAX_BITLEN;
+-	p->u.prefix4.s_addr = ifindex;
+-}
+-
+-/* Link an interface in a per NS interface tree */
+-struct interface *if_link_per_ns(struct zebra_ns *ns, struct interface *ifp)
+-{
+-	struct prefix p;
+-	struct route_node *rn;
+-
+-	if (ifp->ifindex == IFINDEX_INTERNAL)
+-		return NULL;
+-
+-	if_build_key(ifp->ifindex, &p);
+-	rn = route_node_get(ns->if_table, &p);
+-	if (rn->info) {
+-		ifp = (struct interface *)rn->info;
+-		route_unlock_node(rn); /* get */
+-		return ifp;
+-	}
+-
+-	rn->info = ifp;
+-	ifp->node = rn;
+-
+-	return ifp;
+-}
+-
+-/* Delete a VRF. This is called in vrf_terminate(). */
+-void if_unlink_per_ns(struct interface *ifp)
+-{
+-	if (!ifp->node)
+-		return;
+-
+-	ifp->node->info = NULL;
+-	route_unlock_node(ifp->node);
+-	ifp->node = NULL;
+-}
+-
+ /* Look up an interface by identifier within a NS */
+ struct interface *if_lookup_by_index_per_ns(struct zebra_ns *ns,
+ 					    uint32_t ifindex)
+ {
+-	struct prefix p;
+-	struct route_node *rn;
+ 	struct interface *ifp = NULL;
+ 
+-	if_build_key(ifindex, &p);
+-	rn = route_node_lookup(ns->if_table, &p);
+-	if (rn) {
+-		ifp = (struct interface *)rn->info;
+-		route_unlock_node(rn); /* lookup */
+-	}
++	ifp = zebra_ns_lookup_ifp(ns, ifindex);
++
+ 	return ifp;
+ }
+ 
+@@ -296,18 +248,11 @@ struct interface *if_lookup_by_index_per_ns(struct zebra_ns *ns,
+ struct interface *if_lookup_by_name_per_ns(struct zebra_ns *ns,
+ 					   const char *ifname)
+ {
+-	struct route_node *rn;
+ 	struct interface *ifp;
+ 
+-	for (rn = route_top(ns->if_table); rn; rn = route_next(rn)) {
+-		ifp = (struct interface *)rn->info;
+-		if (ifp && strcmp(ifp->name, ifname) == 0) {
+-			route_unlock_node(rn);
+-			return (ifp);
+-		}
+-	}
++	ifp = zebra_ns_lookup_ifp_name(ns, ifname);
+ 
+-	return NULL;
++	return ifp;
+ }
+ 
+ struct interface *if_lookup_by_index_per_nsid(ns_id_t ns_id, uint32_t ifindex)
+@@ -579,7 +524,8 @@ void if_add_update(struct interface *ifp)
+ 		zns = zvrf->zns;
+ 	else
+ 		zns = zebra_ns_lookup(NS_DEFAULT);
+-	if_link_per_ns(zns, ifp);
++
++	zebra_ns_link_ifp(zns, ifp);
+ 	if_data = ifp->info;
+ 	assert(if_data);
+ 
+@@ -784,7 +730,7 @@ void if_delete_update(struct interface **pifp)
+ 	/* Send out notification on interface delete. */
+ 	zebra_interface_delete_update(ifp);
+ 
+-	if_unlink_per_ns(ifp);
++	zebra_ns_unlink_ifp(ifp);
+ 
+ 	/* Update ifindex after distributing the delete message.  This is in
+ 	   case any client needs to have the old value of ifindex available
+@@ -1121,50 +1067,52 @@ void zebra_if_update_link(struct interface *ifp, ifindex_t link_ifindex,
+ }
+ 
+ /*
+- * during initial link dump kernel does not order lower devices before
+- * upper devices so we need to fixup link dependencies at the end of dump
++ * Callback for per-ns link fixup iteration
+  */
+-void zebra_if_update_all_links(struct zebra_ns *zns)
++static int zif_link_fixup_cb(struct interface *ifp, void *arg)
+ {
+-	struct route_node *rn;
+-	struct interface *ifp;
+ 	struct zebra_if *zif;
+ 
+-	if (IS_ZEBRA_DEBUG_KERNEL)
+-		zlog_info("fixup link dependencies");
++	zif = ifp->info;
++	/* update bond-member to bond linkages */
++	if ((IS_ZEBRA_IF_BOND_SLAVE(ifp)) &&
++	    (zif->bondslave_info.bond_ifindex != IFINDEX_INTERNAL) &&
++	    !zif->bondslave_info.bond_if) {
++		if (IS_ZEBRA_DEBUG_EVPN_MH_ES || IS_ZEBRA_DEBUG_KERNEL)
++			zlog_debug("bond mbr %s map to bond %d", zif->ifp->name,
++				   zif->bondslave_info.bond_ifindex);
++		zebra_l2_map_slave_to_bond(zif, ifp->vrf->vrf_id);
++	}
+ 
+-	for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) {
+-		ifp = (struct interface *)rn->info;
+-		if (!ifp)
+-			continue;
+-		zif = ifp->info;
+-		/* update bond-member to bond linkages */
+-		if ((IS_ZEBRA_IF_BOND_SLAVE(ifp))
+-		    && (zif->bondslave_info.bond_ifindex != IFINDEX_INTERNAL)
+-		    && !zif->bondslave_info.bond_if) {
+-			if (IS_ZEBRA_DEBUG_EVPN_MH_ES || IS_ZEBRA_DEBUG_KERNEL)
+-				zlog_debug("bond mbr %s map to bond %d",
+-					   zif->ifp->name,
+-					   zif->bondslave_info.bond_ifindex);
+-			zebra_l2_map_slave_to_bond(zif, ifp->vrf->vrf_id);
+-		}
++	/* update SVI linkages */
++	if ((zif->link_ifindex != IFINDEX_INTERNAL) && !zif->link) {
++		zif->link = if_lookup_by_index_per_nsid(zif->link_nsid,
++							zif->link_ifindex);
++		if (IS_ZEBRA_DEBUG_KERNEL)
++			zlog_debug("interface %s/%d's lower fixup to %s/%d",
++				   ifp->name, ifp->ifindex,
++				   zif->link ? zif->link->name : "unk",
++				   zif->link_ifindex);
++	}
+ 
+-		/* update SVI linkages */
+-		if ((zif->link_ifindex != IFINDEX_INTERNAL) && !zif->link) {
+-			zif->link = if_lookup_by_index_per_nsid(
+-				zif->link_nsid, zif->link_ifindex);
+-			if (IS_ZEBRA_DEBUG_KERNEL)
+-				zlog_debug("interface %s/%d's lower fixup to %s/%d",
+-						ifp->name, ifp->ifindex,
+-						zif->link?zif->link->name:"unk",
+-						zif->link_ifindex);
+-		}
++	/* Update VLAN<=>SVI map */
++	if (IS_ZEBRA_IF_VLAN(ifp))
++		zebra_evpn_acc_bd_svi_set(zif, NULL,
++					  !!if_is_operative(ifp));
+ 
+-		/* Update VLAN<=>SVI map */
+-		if (IS_ZEBRA_IF_VLAN(ifp))
+-			zebra_evpn_acc_bd_svi_set(zif, NULL,
+-						  !!if_is_operative(ifp));
+-	}
++	return NS_WALK_CONTINUE;
++}
++
++/*
++ * during initial link dump kernel does not order lower devices before
++ * upper devices so we need to fixup link dependencies at the end of dump
++ */
++void zebra_if_update_all_links(struct zebra_ns *zns)
++{
++	if (IS_ZEBRA_DEBUG_KERNEL)
++		zlog_debug("fixup link dependencies");
++
++	zebra_ns_ifp_walk(zns, zif_link_fixup_cb, NULL);
+ }
+ 
+ static bool if_ignore_set_protodown(const struct interface *ifp, bool new_down,
+diff --git a/zebra/interface.h b/zebra/interface.h
+index 4cbec83cce..4f768e0217 100644
+--- a/zebra/interface.h
++++ b/zebra/interface.h
+@@ -212,6 +212,9 @@ struct zebra_if {
+ 	char neigh_mac[6];
+ 	struct in6_addr v6_2_v4_ll_addr6;
+ 
++	/* Linkage for per-vrf/per-NS ifp container */
++	struct ifp_tree_link *ns_tree_link;
++
+ 	/* The description of the interface */
+ 	char *desc;
+ };
+@@ -259,12 +262,10 @@ extern void zebra_if_init(void);
+ extern struct interface *if_lookup_by_index_per_ns(struct zebra_ns *, uint32_t);
+ extern struct interface *if_lookup_by_name_per_ns(struct zebra_ns *,
+ 						  const char *);
+-extern struct interface *if_link_per_ns(struct zebra_ns *, struct interface *);
+ extern struct interface *if_lookup_by_index_per_nsid(ns_id_t nsid,
+ 						     uint32_t ifindex);
+ extern const char *ifindex2ifname_per_ns(struct zebra_ns *, unsigned int);
+ 
+-extern void if_unlink_per_ns(struct interface *);
+ extern void if_nbr_mac_to_ipv4ll_neigh_update(struct interface *fip,
+ 					      char mac[6],
+ 					      struct in6_addr *address,
+-- 
+2.43.2
+
+
+From 3f951796fcd65edba9fa41e5f094f0e79e9583b9 Mon Sep 17 00:00:00 2001
+From: Mark Stapp <mjs@cisco.com>
+Date: Wed, 23 Oct 2024 12:34:36 -0700
+Subject: [PATCH 6/9] zebra: use new per-NS iteration in zebra_evpn
+
+Use the new per-NS interface iteration apis in the evpn
+module.
+
+Signed-off-by: Mark Stapp <mjs@cisco.com>
+---
+ zebra/zebra_evpn.c | 245 +++++++++++++++++++--------------------------
+ zebra/zebra_evpn.h |   2 +
+ 2 files changed, 103 insertions(+), 144 deletions(-)
+
+diff --git a/zebra/zebra_evpn.c b/zebra/zebra_evpn.c
+index 147f5b93fa..1122b5a2c0 100644
+--- a/zebra/zebra_evpn.c
++++ b/zebra/zebra_evpn.c
+@@ -644,70 +644,47 @@ void zebra_evpn_svi_macip_del_for_evpn_hash(struct hash_bucket *bucket,
+ 	return;
+ }
+ 
+-static int zebra_evpn_map_vlan_ns(struct ns *ns,
+-				  void *_in_param,
+-				  void **_p_zevpn)
++/* Callback for per-NS ifp walk */
++static int zebra_evpn_map_vlan_ns(struct interface *tmp_if, void *_in_param)
+ {
+-	int found = 0;
+-	struct zebra_ns *zns = ns->info;
+-	struct route_node *rn;
++	bool found = false;
+ 	struct interface *br_if;
+-	struct zebra_evpn **p_zevpn = (struct zebra_evpn **)_p_zevpn;
+ 	struct zebra_evpn *zevpn;
+-	struct interface *tmp_if = NULL;
+ 	struct zebra_if *zif;
+-	struct zebra_from_svi_param *in_param =
+-		(struct zebra_from_svi_param *)_in_param;
+-	vlanid_t vid;
++	struct zebra_from_svi_param *in_param = _in_param;
+ 	vni_t vni_id = 0;
+-	uint8_t bridge_vlan_aware;
+ 
+-	assert(p_zevpn && in_param);
++	assert(in_param);
+ 
+ 	br_if = in_param->br_if;
+ 	assert(br_if);
+ 	zif = in_param->zif;
+ 	assert(zif);
+-	vid = in_param->vid;
+-	bridge_vlan_aware = in_param->bridge_vlan_aware;
+ 
+-	if (bridge_vlan_aware) {
+-		vni_id = zebra_l2_bridge_if_vni_find(zif, vid);
+-		if (vni_id)
+-			found = 1;
+-	} else {
+-		/*
+-		 * See if this interface (or interface plus VLAN Id) maps to a
+-		 * VxLAN
+-		 */
+-		/* TODO: Optimize with a hash. */
+-		for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) {
+-			tmp_if = (struct interface *)rn->info;
+-			if (!tmp_if)
+-				continue;
+-			zif = tmp_if->info;
+-			if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
+-				continue;
+-			if (!if_is_operative(tmp_if))
+-				continue;
+-
+-			if (zif->brslave_info.br_if != br_if)
+-				continue;
+-
+-			vni_id =
+-				zebra_vxlan_if_access_vlan_vni_find(zif, br_if);
+-			if (vni_id) {
+-				found = 1;
+-				break;
+-			}
+-		}
+-	}
++	/*
++	 * See if this interface (or interface plus VLAN Id) maps to a
++	 * VxLAN
++	 */
++	/* TODO: Optimize with a hash. */
++	zif = tmp_if->info;
++	if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
++		goto done;
++	if (!if_is_operative(tmp_if))
++		goto done;
++
++	if (zif->brslave_info.br_if != br_if)
++		goto done;
++
++	vni_id = zebra_vxlan_if_access_vlan_vni_find(zif, br_if);
++	if (vni_id)
++		found = true;
+ 
++done:
+ 	if (!found)
+ 		return NS_WALK_CONTINUE;
+ 
+ 	zevpn = zebra_evpn_lookup(vni_id);
+-	*p_zevpn = zevpn;
++	in_param->zevpn = zevpn;
+ 	return NS_WALK_STOP;
+ }
+ 
+@@ -719,44 +696,39 @@ struct zebra_evpn *zebra_evpn_map_vlan(struct interface *ifp,
+ 				       struct interface *br_if, vlanid_t vid)
+ {
+ 	struct zebra_if *zif;
+-	struct zebra_evpn **p_zevpn;
+-	struct zebra_evpn *zevpn = NULL;
+-	struct zebra_from_svi_param in_param;
++	struct zebra_from_svi_param in_param = {};
++	vni_t vni_id = 0;
+ 
+ 	/* Determine if bridge is VLAN-aware or not */
+ 	zif = br_if->info;
+ 	assert(zif);
+-	in_param.bridge_vlan_aware = IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(zif);
++
++	/* Special case for vlan */
++	if (IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(zif)) {
++		vni_id = zebra_l2_bridge_if_vni_find(zif, vid);
++		if (vni_id)
++			return zebra_evpn_lookup(vni_id);
++	}
++
+ 	in_param.vid = vid;
+ 	in_param.br_if = br_if;
+ 	in_param.zif = zif;
+-	p_zevpn = &zevpn;
+ 
+-	ns_walk_func(zebra_evpn_map_vlan_ns,
+-		     (void *)&in_param,
+-		     (void **)p_zevpn);
+-	return zevpn;
++	zebra_ns_ifp_walk_all(zebra_evpn_map_vlan_ns, &in_param);
++
++	return in_param.zevpn;
+ }
+ 
+-static int zebra_evpn_from_svi_ns(struct ns *ns,
+-				  void *_in_param,
+-				  void **_p_zevpn)
++/* Callback for from_svi ifp walker */
++static int zebra_evpn_from_svi_ns(struct interface *tmp_if, void *_in_param)
+ {
+-	struct zebra_ns *zns = ns->info;
+-	struct route_node *rn;
+ 	struct interface *br_if;
+-	struct zebra_evpn **p_zevpn = (struct zebra_evpn **)_p_zevpn;
+ 	struct zebra_evpn *zevpn;
+-	struct interface *tmp_if = NULL;
+ 	struct zebra_if *zif;
+ 	struct zebra_if *br_zif;
+-	struct zebra_l2_bridge_vlan *bvlan;
+-	struct zebra_from_svi_param *in_param =
+-		(struct zebra_from_svi_param *)_in_param;
+-	int found = 0;
++	struct zebra_from_svi_param *in_param = _in_param;
++	bool found = false;
+ 	vni_t vni_id = 0;
+-	vlanid_t vid = 0;
+-	uint8_t bridge_vlan_aware;
+ 
+ 	if (!in_param)
+ 		return NS_WALK_STOP;
+@@ -764,47 +736,30 @@ static int zebra_evpn_from_svi_ns(struct ns *ns,
+ 	br_if = in_param->br_if;
+ 	zif = in_param->zif;
+ 	assert(zif);
+-	bridge_vlan_aware = in_param->bridge_vlan_aware;
+-	vid = in_param->vid;
+ 	br_zif = br_if->info;
+ 	assert(br_zif);
+ 
+-	if (bridge_vlan_aware) {
+-		bvlan = zebra_l2_bridge_if_vlan_find(br_zif, vid);
+-		if (bvlan && bvlan->access_bd && bvlan->access_bd->vni) {
+-			found = 1;
+-			vni_id = bvlan->access_bd->vni;
+-		}
+-	} else {
+-		/* TODO: Optimize with a hash. */
+-		for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) {
+-			tmp_if = (struct interface *)rn->info;
+-			if (!tmp_if)
+-				continue;
+-			zif = tmp_if->info;
+-			if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
+-				continue;
+-			if (!if_is_operative(tmp_if))
+-				continue;
+-
+-			if (zif->brslave_info.br_if != br_if)
+-				continue;
+-
+-			vni_id =
+-				zebra_vxlan_if_access_vlan_vni_find(zif, br_if);
+-			if (vni_id) {
+-				found = 1;
+-				break;
+-			}
+-		}
+-	}
++	if (!tmp_if)
++		goto done;
++	zif = tmp_if->info;
++	if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
++		goto done;
++	if (!if_is_operative(tmp_if))
++		goto done;
++
++	if (zif->brslave_info.br_if != br_if)
++		goto done;
++
++	vni_id = zebra_vxlan_if_access_vlan_vni_find(zif, br_if);
++	if (vni_id)
++		found = true;
+ 
++done:
+ 	if (!found)
+ 		return NS_WALK_CONTINUE;
+ 
+ 	zevpn = zebra_evpn_lookup(vni_id);
+-	if (p_zevpn)
+-		*p_zevpn = zevpn;
++	in_param->zevpn = zevpn;
+ 	return NS_WALK_STOP;
+ }
+ 
+@@ -815,17 +770,21 @@ static int zebra_evpn_from_svi_ns(struct ns *ns,
+ struct zebra_evpn *zebra_evpn_from_svi(struct interface *ifp,
+ 				       struct interface *br_if)
+ {
+-	struct zebra_evpn *zevpn = NULL;
+-	struct zebra_evpn **p_zevpn;
+ 	struct zebra_if *zif;
+-	struct zebra_from_svi_param in_param;
++	struct zebra_l2_bridge_vlan *bvlan;
++	struct zebra_from_svi_param in_param = {};
++	vni_t vni_id = 0;
++	struct zebra_evpn *zevpn;
++	struct zebra_l2info_vlan *vl;
+ 
+ 	if (!br_if)
+ 		return NULL;
+ 
+ 	/* Make sure the linked interface is a bridge. */
+-	if (!IS_ZEBRA_IF_BRIDGE(br_if))
++	if (!IS_ZEBRA_IF_BRIDGE(br_if)) {
++		zlog_debug("%s: br_if NOT a bridge", __func__);
+ 		return NULL;
++	}
+ 
+ 	/* Determine if bridge is VLAN-aware or not */
+ 	zif = br_if->info;
+@@ -833,58 +792,60 @@ struct zebra_evpn *zebra_evpn_from_svi(struct interface *ifp,
+ 	in_param.bridge_vlan_aware = IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(zif);
+ 	in_param.vid = 0;
+ 
++	/* Don't need to search in this case */
+ 	if (in_param.bridge_vlan_aware) {
+-		struct zebra_l2info_vlan *vl;
+-
+ 		if (!IS_ZEBRA_IF_VLAN(ifp))
+ 			return NULL;
+ 
++		zevpn = NULL;
++
+ 		zif = ifp->info;
+ 		assert(zif);
+ 		vl = &zif->l2info.vl;
+ 		in_param.vid = vl->vid;
++
++		bvlan = zebra_l2_bridge_if_vlan_find(br_if->info, vl->vid);
++		if (bvlan && bvlan->access_bd && bvlan->access_bd->vni) {
++			vni_id = bvlan->access_bd->vni;
++			zevpn = zebra_evpn_lookup(vni_id);
++		}
++
++		return zevpn;
+ 	}
+ 
++	/* See if this interface (or interface plus VLAN Id) maps to a VxLAN:
++	 * search all NSes
++	 */
+ 	in_param.br_if = br_if;
+ 	in_param.zif = zif;
+-	p_zevpn = &zevpn;
+-	/* See if this interface (or interface plus VLAN Id) maps to a VxLAN */
+-	ns_walk_func(zebra_evpn_from_svi_ns, (void *)&in_param,
+-		     (void **)p_zevpn);
+-	return zevpn;
++	zebra_ns_ifp_walk_all(zebra_evpn_from_svi_ns, &in_param);
++
++	return in_param.zevpn;
+ }
+ 
+-static int zvni_map_to_macvlan_ns(struct ns *ns,
+-				  void *_in_param,
+-				  void **_p_ifp)
++static int zvni_map_to_macvlan_ns(struct interface *tmp_if, void *_in_param)
+ {
+-	struct zebra_ns *zns = ns->info;
+-	struct zebra_from_svi_param *in_param =
+-		(struct zebra_from_svi_param *)_in_param;
+-	struct interface **p_ifp = (struct interface **)_p_ifp;
+-	struct route_node *rn;
+-	struct interface *tmp_if = NULL;
++	struct zebra_from_svi_param *in_param = _in_param;
+ 	struct zebra_if *zif;
+ 
+-	assert(in_param && p_ifp);
++	assert(in_param);
+ 
+ 	/* Identify corresponding VLAN interface. */
+-	for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) {
+-		tmp_if = (struct interface *)rn->info;
+-		/* Check oper status of the SVI. */
+-		if (!tmp_if || !if_is_operative(tmp_if))
+-			continue;
+-		zif = tmp_if->info;
+ 
+-		if (!zif || zif->zif_type != ZEBRA_IF_MACVLAN)
+-			continue;
++	/* Check oper status of the SVI. */
++	if (!tmp_if || !if_is_operative(tmp_if))
++		goto done;
+ 
+-		if (zif->link == in_param->svi_if) {
+-			*p_ifp = tmp_if;
+-			return NS_WALK_STOP;
+-		}
++	zif = tmp_if->info;
++	if (!zif || zif->zif_type != ZEBRA_IF_MACVLAN)
++		goto done;
++
++	if (zif->link == in_param->svi_if) {
++		in_param->ret_ifp = tmp_if;
++		return NS_WALK_STOP;
+ 	}
+ 
++done:
+ 	return NS_WALK_CONTINUE;
+ }
+ 
+@@ -893,17 +854,16 @@ static int zvni_map_to_macvlan_ns(struct ns *ns,
+ struct interface *zebra_evpn_map_to_macvlan(struct interface *br_if,
+ 					    struct interface *svi_if)
+ {
+-	struct interface *tmp_if = NULL;
+ 	struct zebra_if *zif;
+-	struct interface **p_ifp;
+-	struct zebra_from_svi_param in_param;
++	struct zebra_from_svi_param in_param = {};
+ 
+ 	/* Defensive check, caller expected to invoke only with valid bridge. */
+ 	if (!br_if)
+ 		return NULL;
+ 
+ 	if (!svi_if) {
+-		zlog_debug("svi_if is not passed.");
++		if (IS_ZEBRA_DEBUG_VXLAN)
++			zlog_debug("%s: svi_if is not passed.", __func__);
+ 		return NULL;
+ 	}
+ 
+@@ -915,13 +875,10 @@ struct interface *zebra_evpn_map_to_macvlan(struct interface *br_if,
+ 	in_param.br_if = br_if;
+ 	in_param.zif = NULL;
+ 	in_param.svi_if = svi_if;
+-	p_ifp = &tmp_if;
+ 
+ 	/* Identify corresponding VLAN interface. */
+-	ns_walk_func(zvni_map_to_macvlan_ns,
+-		     (void *)&in_param,
+-		     (void **)p_ifp);
+-	return tmp_if;
++	zebra_ns_ifp_walk_all(zvni_map_to_macvlan_ns, &in_param);
++	return in_param.ret_ifp;
+ }
+ 
+ /*
+diff --git a/zebra/zebra_evpn.h b/zebra/zebra_evpn.h
+index c946425dd5..85bdf54272 100644
+--- a/zebra/zebra_evpn.h
++++ b/zebra/zebra_evpn.h
+@@ -116,7 +116,9 @@ struct zebra_evpn {
+ struct zebra_from_svi_param {
+ 	struct interface *br_if;
+ 	struct interface *svi_if;
++	struct interface *ret_ifp;
+ 	struct zebra_if *zif;
++	struct zebra_evpn *zevpn;
+ 	uint8_t bridge_vlan_aware;
+ 	vlanid_t vid;
+ };
+-- 
+2.43.2
+
+
+From 8a9d5ecbbcdf04894de461662e83df8c5dcb7ab4 Mon Sep 17 00:00:00 2001
+From: Mark Stapp <mjs@cisco.com>
+Date: Thu, 24 Oct 2024 14:49:28 -0700
+Subject: [PATCH 7/9] lib,zebra: remove table node from ifp struct
+
+Finish removing the table route_node from the ifp struct.
+
+Signed-off-by: Mark Stapp <mjs@cisco.com>
+---
+ lib/if.c          | 6 ------
+ lib/if.h          | 2 --
+ zebra/interface.c | 3 ++-
+ 3 files changed, 2 insertions(+), 9 deletions(-)
+
+diff --git a/lib/if.c b/lib/if.c
+index a8ceac7243..bde35a3460 100644
+--- a/lib/if.c
++++ b/lib/if.c
+@@ -1003,12 +1003,6 @@ void if_terminate(struct vrf *vrf)
+ 
+ 	while (!RB_EMPTY(if_name_head, &vrf->ifaces_by_name)) {
+ 		ifp = RB_ROOT(if_name_head, &vrf->ifaces_by_name);
+-
+-		if (ifp->node) {
+-			ifp->node->info = NULL;
+-			route_unlock_node(ifp->node);
+-			ifp->node = NULL;
+-		}
+ 		if_delete(&ifp);
+ 	}
+ }
+diff --git a/lib/if.h b/lib/if.h
+index 0dc56bd210..c2ec73378d 100644
+--- a/lib/if.h
++++ b/lib/if.h
+@@ -295,8 +295,6 @@ struct interface {
+ 	struct if_data stats;
+ #endif /* HAVE_NET_RT_IFLIST */
+ 
+-	struct route_node *node;
+-
+ 	struct vrf *vrf;
+ 
+ 	/*
+diff --git a/zebra/interface.c b/zebra/interface.c
+index 7ec80cb259..237ad2340d 100644
+--- a/zebra/interface.c
++++ b/zebra/interface.c
+@@ -223,6 +223,8 @@ static int if_zebra_delete_hook(struct interface *ifp)
+ 		if_nhg_dependents_release(ifp);
+ 		zebra_if_nhg_dependents_free(zebra_if);
+ 
++		zebra_ns_unlink_ifp(ifp);
++
+ 		XFREE(MTYPE_ZIF_DESC, zebra_if->desc);
+ 
+ 		EVENT_OFF(zebra_if->speed_update);
+@@ -738,7 +740,6 @@ void if_delete_update(struct interface **pifp)
+ 	   for setting ifindex to IFINDEX_INTERNAL after processing the
+ 	   interface deletion message. */
+ 	if_set_index(ifp, IFINDEX_INTERNAL);
+-	ifp->node = NULL;
+ 
+ 	UNSET_FLAG(ifp->status, ZEBRA_INTERFACE_VRF_LOOPBACK);
+ 
+-- 
+2.43.2
+
+
+From bf41170c63771c5bda25476ccbab56383d9c74a6 Mon Sep 17 00:00:00 2001
+From: Mark Stapp <mjs@cisco.com>
+Date: Thu, 24 Oct 2024 14:50:12 -0700
+Subject: [PATCH 8/9] zebra: use new per-NS ifp iterators in vxlan code
+
+Replace use of the old if_table with the new per-NS ifp
+iterator apis in the zebra vxlan code.
+
+Signed-off-by: Mark Stapp <mjs@cisco.com>
+---
+ zebra/zebra_evpn.h  |   1 +
+ zebra/zebra_vxlan.c | 368 ++++++++++++++++++++------------------------
+ 2 files changed, 172 insertions(+), 197 deletions(-)
+
+diff --git a/zebra/zebra_evpn.h b/zebra/zebra_evpn.h
+index 85bdf54272..0ffebdd277 100644
+--- a/zebra/zebra_evpn.h
++++ b/zebra/zebra_evpn.h
+@@ -119,6 +119,7 @@ struct zebra_from_svi_param {
+ 	struct interface *ret_ifp;
+ 	struct zebra_if *zif;
+ 	struct zebra_evpn *zevpn;
++	struct zebra_l3vni *zl3vni;
+ 	uint8_t bridge_vlan_aware;
+ 	vlanid_t vid;
+ };
+diff --git a/zebra/zebra_vxlan.c b/zebra/zebra_vxlan.c
+index 0b75ec261e..28646a7a6a 100644
+--- a/zebra/zebra_vxlan.c
++++ b/zebra/zebra_vxlan.c
+@@ -862,39 +862,30 @@ static void zl3vni_print_hash_detail(struct hash_bucket *bucket, void *data)
+ 		vty_out(vty, "\n");
+ }
+ 
+-static int zvni_map_to_svi_ns(struct ns *ns,
+-			      void *_in_param,
+-			      void **_p_ifp)
++static int zvni_map_to_svi_ns(struct interface *tmp_if, void *_in_param)
+ {
+-	struct zebra_ns *zns = ns->info;
+-	struct route_node *rn;
+-	struct zebra_from_svi_param *in_param =
+-		(struct zebra_from_svi_param *)_in_param;
++	struct zebra_from_svi_param *in_param = _in_param;
+ 	struct zebra_l2info_vlan *vl;
+-	struct interface *tmp_if = NULL;
+-	struct interface **p_ifp = (struct interface **)_p_ifp;
+ 	struct zebra_if *zif;
+ 
+-	assert(in_param && p_ifp);
++	assert(in_param);
+ 
+ 	/* TODO: Optimize with a hash. */
+-	for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) {
+-		tmp_if = (struct interface *)rn->info;
+-		/* Check oper status of the SVI. */
+-		if (!tmp_if || !if_is_operative(tmp_if))
+-			continue;
+-		zif = tmp_if->info;
+-		if (!zif || zif->zif_type != ZEBRA_IF_VLAN
+-		    || zif->link != in_param->br_if)
+-			continue;
+-		vl = (struct zebra_l2info_vlan *)&zif->l2info.vl;
+-
+-		if (vl->vid == in_param->vid) {
+-			*p_ifp = tmp_if;
+-			route_unlock_node(rn);
+-			return NS_WALK_STOP;
+-		}
++
++	/* Check oper status of the SVI. */
++	if (!tmp_if || !if_is_operative(tmp_if))
++		goto done;
++	zif = tmp_if->info;
++	if (!zif || zif->zif_type != ZEBRA_IF_VLAN || zif->link != in_param->br_if)
++		goto done;
++	vl = (struct zebra_l2info_vlan *)&zif->l2info.vl;
++
++	if (vl->vid == in_param->vid) {
++		in_param->ret_ifp = tmp_if;
++		return NS_WALK_STOP;
+ 	}
++
++done:
+ 	return NS_WALK_CONTINUE;
+ }
+ 
+@@ -907,10 +898,9 @@ static int zvni_map_to_svi_ns(struct ns *ns,
+  */
+ struct interface *zvni_map_to_svi(vlanid_t vid, struct interface *br_if)
+ {
+-	struct interface *tmp_if = NULL;
+ 	struct zebra_if *zif;
+-	struct zebra_from_svi_param in_param;
+-	struct interface **p_ifp;
++	struct zebra_from_svi_param in_param = {};
++
+ 	/* Defensive check, caller expected to invoke only with valid bridge. */
+ 	if (!br_if)
+ 		return NULL;
+@@ -925,12 +915,11 @@ struct interface *zvni_map_to_svi(vlanid_t vid, struct interface *br_if)
+ 
+ 	in_param.vid = vid;
+ 	in_param.br_if = br_if;
+-	in_param.zif = NULL;
+-	p_ifp = &tmp_if;
++
+ 	/* Identify corresponding VLAN interface. */
+-	ns_walk_func(zvni_map_to_svi_ns, (void *)&in_param,
+-		     (void **)p_ifp);
+-	return tmp_if;
++	zebra_ns_ifp_walk_all(zvni_map_to_svi_ns, &in_param);
++
++	return in_param.ret_ifp;
+ }
+ 
+ int zebra_evpn_vxlan_del(struct zebra_evpn *zevpn)
+@@ -1010,9 +999,9 @@ static int zevpn_build_vni_hash_table(struct zebra_if *zif,
+ 		 */
+ 		zevpn = zebra_evpn_lookup(vni);
+ 		if (zevpn) {
+-			zlog_debug(
+-				"EVPN hash already present for IF %s(%u) L2-VNI %u",
+-				ifp->name, ifp->ifindex, vni);
++			if (IS_ZEBRA_DEBUG_VXLAN)
++				zlog_debug("EVPN hash already present for IF %s(%u) L2-VNI %u",
++					   ifp->name, ifp->ifindex, vni);
+ 
+ 			/*
+ 			 * Inform BGP if intf is up and mapped to
+@@ -1075,48 +1064,32 @@ static int zevpn_build_vni_hash_table(struct zebra_if *zif,
+ 	return 0;
+ }
+ 
+-static int zevpn_build_hash_table_zns(struct ns *ns,
+-				     void *param_in __attribute__((unused)),
+-				     void **param_out __attribute__((unused)))
++static int zevpn_build_hash_table_zns(struct interface *ifp, void *arg)
+ {
+-	struct zebra_ns *zns = ns->info;
+-	struct route_node *rn;
+-	struct interface *ifp;
+-	struct zebra_vrf *zvrf;
+-
+-	zvrf = zebra_vrf_get_evpn();
++	struct zebra_vrf *zvrf = arg;
++	struct zebra_if *zif;
++	struct zebra_l2info_vxlan *vxl;
+ 
+-	/* Walk VxLAN interfaces and create EVPN hash. */
+-	for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) {
+-		struct zebra_if *zif;
+-		struct zebra_l2info_vxlan *vxl;
++	zif = ifp->info;
++	if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
++		goto done;
+ 
+-		ifp = (struct interface *)rn->info;
+-		if (!ifp)
+-			continue;
+-		zif = ifp->info;
+-		if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
+-			continue;
++	vxl = &zif->l2info.vxl;
++	/* link of VXLAN interface should be in zebra_evpn_vrf */
++	if (zvrf->zns->ns_id != vxl->link_nsid) {
++		if (IS_ZEBRA_DEBUG_VXLAN)
++			zlog_debug("Intf %s(%u) link not in same namespace as BGP EVPN core instance",
++				   ifp->name, ifp->ifindex);
++		goto done;
++	}
+ 
+-		vxl = &zif->l2info.vxl;
+-		/* link of VXLAN interface should be in zebra_evpn_vrf */
+-		if (zvrf->zns->ns_id != vxl->link_nsid) {
+-			if (IS_ZEBRA_DEBUG_VXLAN)
+-				zlog_debug(
+-					"Intf %s(%u) link not in same "
+-					"namespace than BGP EVPN core instance ",
+-					ifp->name, ifp->ifindex);
+-			continue;
+-		}
++	if (IS_ZEBRA_DEBUG_VXLAN)
++		zlog_debug("Building vni table for %s-if %s",
++			   IS_ZEBRA_VXLAN_IF_VNI(zif) ? "vni" : "svd", ifp->name);
+ 
+-		if (IS_ZEBRA_DEBUG_VXLAN)
+-			zlog_debug("Building vni table for %s-if %s",
+-				   IS_ZEBRA_VXLAN_IF_VNI(zif) ? "vni" : "svd",
+-				   ifp->name);
++	zebra_vxlan_if_vni_iterate(zif, zevpn_build_vni_hash_table, NULL);
+ 
+-		zebra_vxlan_if_vni_iterate(zif, zevpn_build_vni_hash_table,
+-					   NULL);
+-	}
++done:
+ 	return NS_WALK_CONTINUE;
+ }
+ 
+@@ -1127,7 +1100,13 @@ static int zevpn_build_hash_table_zns(struct ns *ns,
+ 
+ static void zevpn_build_hash_table(void)
+ {
+-	ns_walk_func(zevpn_build_hash_table_zns, NULL, NULL);
++	struct zebra_vrf *zvrf;
++
++	zvrf = zebra_vrf_get_evpn();
++	if (zvrf == NULL)
++		return;
++
++	zebra_ns_ifp_walk_all(zevpn_build_hash_table_zns, zvrf);
+ }
+ 
+ /*
+@@ -1966,70 +1945,63 @@ static int zl3vni_del(struct zebra_l3vni *zl3vni)
+ 	return 0;
+ }
+ 
+-static int zl3vni_map_to_vxlan_if_ns(struct ns *ns,
+-				     void *_zl3vni,
+-				     void **_pifp)
+-{
+-	struct zebra_ns *zns = ns->info;
+-	struct zebra_l3vni *zl3vni = (struct zebra_l3vni *)_zl3vni;
+-	struct route_node *rn = NULL;
+-	struct interface *ifp = NULL;
++/* Context arg for zl3vni map iteration */
++struct zl3vni_map_arg {
+ 	struct zebra_vrf *zvrf;
++	struct zebra_l3vni *zl3vni;
++	struct interface *ret_ifp;
++};
+ 
+-	zvrf = zebra_vrf_get_evpn();
+-
+-	assert(_pifp);
+-
+-	/* loop through all vxlan-interface */
+-	for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) {
++static int zl3vni_map_to_vxlan_if_ns(struct interface *ifp, void *arg)
++{
++	struct zl3vni_map_arg *ctx = arg;
++	struct zebra_l3vni *zl3vni = ctx->zl3vni;
++	struct zebra_vrf *zvrf = ctx->zvrf;
++	struct zebra_if *zif = NULL;
++	struct zebra_l2info_vxlan *vxl;
++	struct zebra_vxlan_vni *vni = NULL;
+ 
+-		struct zebra_if *zif = NULL;
+-		struct zebra_l2info_vxlan *vxl;
+-		struct zebra_vxlan_vni *vni = NULL;
++	/* look for vxlan-interface */
+ 
+-		ifp = (struct interface *)rn->info;
+-		if (!ifp)
+-			continue;
+-
+-		zif = ifp->info;
+-		if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
+-			continue;
++	zif = ifp->info;
++	if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
++		goto done;
+ 
+-		vxl = &zif->l2info.vxl;
+-		vni = zebra_vxlan_if_vni_find(zif, zl3vni->vni);
+-		if (!vni || vni->vni != zl3vni->vni)
+-			continue;
++	vxl = &zif->l2info.vxl;
++	vni = zebra_vxlan_if_vni_find(zif, zl3vni->vni);
++	if (!vni || vni->vni != zl3vni->vni)
++		goto done;
+ 
+-		/* link of VXLAN interface should be in zebra_evpn_vrf */
+-		if (zvrf->zns->ns_id != vxl->link_nsid) {
+-			if (IS_ZEBRA_DEBUG_VXLAN)
+-				zlog_debug(
+-					"Intf %s(%u) VNI %u, link not in same "
+-					"namespace than BGP EVPN core instance ",
+-					ifp->name, ifp->ifindex, vni->vni);
+-			continue;
+-		}
++	/* link of VXLAN interface should be in zebra_evpn_vrf */
++	if (zvrf->zns->ns_id != vxl->link_nsid) {
++		if (IS_ZEBRA_DEBUG_VXLAN)
++			zlog_debug("Intf %s(%u) VNI %u, link not in same namespace as BGP EVPN core instance",
++				   ifp->name, ifp->ifindex, vni->vni);
++		goto done;
++	}
+ 
++	zl3vni->local_vtep_ip = zif->l2info.vxl.vtep_ip;
++	ctx->ret_ifp = ifp;
+ 
+-		zl3vni->local_vtep_ip = zif->l2info.vxl.vtep_ip;
+-		*_pifp = (void *)ifp;
+-		route_unlock_node(rn);
+-		return NS_WALK_STOP;
+-	}
++	return NS_WALK_STOP;
+ 
++done:
+ 	return NS_WALK_CONTINUE;
+ }
+ 
+ struct interface *zl3vni_map_to_vxlan_if(struct zebra_l3vni *zl3vni)
+ {
+-	struct interface **p_ifp;
+-	struct interface *ifp = NULL;
++	struct zl3vni_map_arg arg = {};
+ 
+-	p_ifp = &ifp;
++	arg.zl3vni = zl3vni;
++	arg.zvrf = zebra_vrf_get_evpn();
+ 
+-	ns_walk_func(zl3vni_map_to_vxlan_if_ns,
+-		     (void *)zl3vni, (void **)p_ifp);
+-	return ifp;
++	if (arg.zvrf == NULL)
++		return NULL;
++
++	zebra_ns_ifp_walk_all(zl3vni_map_to_vxlan_if_ns, &arg);
++
++	return arg.ret_ifp;
+ }
+ 
+ struct interface *zl3vni_map_to_svi_if(struct zebra_l3vni *zl3vni)
+@@ -2084,57 +2056,35 @@ struct zebra_l3vni *zl3vni_from_vrf(vrf_id_t vrf_id)
+ 	return zl3vni_lookup(zvrf->l3vni);
+ }
+ 
+-static int zl3vni_from_svi_ns(struct ns *ns, void *_in_param, void **_p_zl3vni)
++/* loop through all vxlan-interface */
++static int zl3vni_from_svi_ns(struct interface *tmp_if, void *_in_param)
+ {
+ 	int found = 0;
+ 	vni_t vni_id = 0;
+-	struct zebra_ns *zns = ns->info;
+-	struct zebra_l3vni **p_zl3vni = (struct zebra_l3vni **)_p_zl3vni;
+-	struct zebra_from_svi_param *in_param =
+-		(struct zebra_from_svi_param *)_in_param;
+-	struct route_node *rn = NULL;
+-	struct interface *tmp_if = NULL;
++	struct zebra_from_svi_param *in_param = _in_param;
+ 	struct zebra_if *zif = NULL;
+-	struct zebra_if *br_zif = NULL;
+ 
+-	assert(in_param && p_zl3vni);
++	assert(in_param);
+ 
+-	br_zif = in_param->br_if->info;
+-	assert(br_zif);
++	zif = tmp_if->info;
++	if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
++		goto done;
++	if (!if_is_operative(tmp_if))
++		goto done;
+ 
+-	if (in_param->bridge_vlan_aware) {
+-		vni_id = zebra_l2_bridge_if_vni_find(br_zif, in_param->vid);
+-		if (vni_id)
+-			found = 1;
+-	} else {
+-		/* loop through all vxlan-interface */
+-		for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) {
+-			tmp_if = (struct interface *)rn->info;
+-			if (!tmp_if)
+-				continue;
+-			zif = tmp_if->info;
+-			if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
+-				continue;
+-			if (!if_is_operative(tmp_if))
+-				continue;
+-
+-			if (zif->brslave_info.br_if != in_param->br_if)
+-				continue;
+-
+-			vni_id = zebra_vxlan_if_access_vlan_vni_find(
+-				zif, in_param->br_if);
+-			if (vni_id) {
+-				found = 1;
+-				route_unlock_node(rn);
+-				break;
+-			}
+-		}
++	if (zif->brslave_info.br_if != in_param->br_if)
++		goto done;
++
++	vni_id = zebra_vxlan_if_access_vlan_vni_find(zif, in_param->br_if);
++	if (vni_id) {
++		in_param->zl3vni = zl3vni_lookup(vni_id);
++		found = 1;
+ 	}
+ 
++done:
+ 	if (!found)
+ 		return NS_WALK_CONTINUE;
+ 
+-	*p_zl3vni = zl3vni_lookup(vni_id);
+ 	return NS_WALK_STOP;
+ }
+ 
+@@ -2145,10 +2095,11 @@ static int zl3vni_from_svi_ns(struct ns *ns, void *_in_param, void **_p_zl3vni)
+ static struct zebra_l3vni *zl3vni_from_svi(struct interface *ifp,
+ 					   struct interface *br_if)
+ {
+-	struct zebra_l3vni *zl3vni = NULL;
+ 	struct zebra_if *zif = NULL;
++	vni_t vni_id = 0;
++	struct zebra_if *br_zif = NULL;
+ 	struct zebra_from_svi_param in_param = {};
+-	struct zebra_l3vni **p_zl3vni;
++	struct zebra_l2info_vlan *vl;
+ 
+ 	if (!br_if)
+ 		return NULL;
+@@ -2156,15 +2107,15 @@ static struct zebra_l3vni *zl3vni_from_svi(struct interface *ifp,
+ 	/* Make sure the linked interface is a bridge. */
+ 	if (!IS_ZEBRA_IF_BRIDGE(br_if))
+ 		return NULL;
++
+ 	in_param.br_if = br_if;
+ 
+ 	/* Determine if bridge is VLAN-aware or not */
+-	zif = br_if->info;
+-	assert(zif);
+-	in_param.bridge_vlan_aware = IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(zif);
+-	if (in_param.bridge_vlan_aware) {
+-		struct zebra_l2info_vlan *vl;
++	br_zif = br_if->info;
++	assert(br_zif);
+ 
++	in_param.bridge_vlan_aware = IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(br_zif);
++	if (in_param.bridge_vlan_aware) {
+ 		if (!IS_ZEBRA_IF_VLAN(ifp))
+ 			return NULL;
+ 
+@@ -2172,15 +2123,18 @@ static struct zebra_l3vni *zl3vni_from_svi(struct interface *ifp,
+ 		assert(zif);
+ 		vl = &zif->l2info.vl;
+ 		in_param.vid = vl->vid;
++
++		vni_id = zebra_l2_bridge_if_vni_find(br_zif, in_param.vid);
++		if (vni_id)
++			return zl3vni_lookup(vni_id);
+ 	}
+ 
+ 	/* See if this interface (or interface plus VLAN Id) maps to a VxLAN */
+ 	/* TODO: Optimize with a hash. */
+ 
+-	p_zl3vni = &zl3vni;
++	zebra_ns_ifp_walk_all(zl3vni_from_svi_ns, &in_param);
+ 
+-	ns_walk_func(zl3vni_from_svi_ns, (void *)&in_param, (void **)p_zl3vni);
+-	return zl3vni;
++	return in_param.zl3vni;
+ }
+ 
+ vni_t vni_id_from_svi(struct interface *ifp, struct interface *br_if)
+@@ -2334,6 +2288,36 @@ static void zevpn_add_to_l3vni_list(struct hash_bucket *bucket, void *ctxt)
+ 		listnode_add_sort(zl3vni->l2vnis, zevpn);
+ }
+ 
++/* Helper for vni transition iterator */
++
++struct vni_trans_ctx {
++	vni_t vni;
++	struct zebra_vxlan_vni *vnip;
++	struct interface *ret_ifp;
++};
++
++static int vni_trans_cb(struct interface *ifp, void *arg)
++{
++	struct vni_trans_ctx *ctx = arg;
++	struct zebra_if *zif;
++	struct zebra_vxlan_vni *vnip;
++
++	/* Find VxLAN interface for this VNI. */
++	zif = ifp->info;
++	if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
++		goto done;
++
++	vnip = zebra_vxlan_if_vni_find(zif, ctx->vni);
++	if (vnip) {
++		ctx->ret_ifp = ifp;
++		ctx->vnip = vnip;
++		return NS_WALK_STOP;
++	}
++
++done:
++	return NS_WALK_CONTINUE;
++}
++
+ /*
+  * Handle transition of vni from l2 to l3 and vice versa.
+  * This function handles only the L2VNI add/delete part of
+@@ -2384,39 +2368,25 @@ static int zebra_vxlan_handle_vni_transition(struct zebra_vrf *zvrf, vni_t vni,
+ 			return -1;
+ 		}
+ 	} else {
+-		struct zebra_ns *zns;
+-		struct route_node *rn;
+-		struct interface *ifp;
+-		struct zebra_if *zif;
+ 		struct zebra_vxlan_vni *vnip;
+ 		struct zebra_l2info_vxlan *vxl;
+ 		struct interface *vlan_if;
+-		bool found = false;
++		struct zebra_if *zif;
++		struct zebra_ns *zns;
++		struct vni_trans_ctx ctx = {};
+ 
+ 		if (IS_ZEBRA_DEBUG_VXLAN)
+ 			zlog_debug("Adding L2-VNI %u - transition from L3-VNI",
+ 				   vni);
+ 
+-		/* Find VxLAN interface for this VNI. */
+ 		zns = zebra_ns_lookup(NS_DEFAULT);
+-		for (rn = route_top(zns->if_table); rn; rn = route_next(rn)) {
+-			ifp = (struct interface *)rn->info;
+-			if (!ifp)
+-				continue;
+-			zif = ifp->info;
+-			if (!zif || zif->zif_type != ZEBRA_IF_VXLAN)
+-				continue;
+-
+-			vxl = &zif->l2info.vxl;
+-			vnip = zebra_vxlan_if_vni_find(zif, vni);
+-			if (vnip) {
+-				found = true;
+-				route_unlock_node(rn);
+-				break;
+-			}
+-		}
+ 
+-		if (!found) {
++		ctx.vni = vni;
++
++		/* Find VxLAN interface for this VNI. */
++		zebra_ns_ifp_walk(zns, vni_trans_cb, &ctx);
++
++		if (ctx.ret_ifp == NULL) {
+ 			if (IS_ZEBRA_DEBUG_VXLAN)
+ 				zlog_err(
+ 					"Adding L2-VNI - Failed to find VxLAN interface for VNI %u",
+@@ -2429,6 +2399,10 @@ static int zebra_vxlan_handle_vni_transition(struct zebra_vrf *zvrf, vni_t vni,
+ 		if (zevpn)
+ 			return 0;
+ 
++		zif = ctx.ret_ifp->info;
++		vnip = ctx.vnip;
++		vxl = &zif->l2info.vxl;
++
+ 		zevpn = zebra_evpn_add(vni);
+ 
+ 		/* Find bridge interface for the VNI */
+@@ -2441,13 +2415,13 @@ static int zebra_vxlan_handle_vni_transition(struct zebra_vrf *zvrf, vni_t vni,
+ 				listnode_add_sort_nodup(zl3vni->l2vnis, zevpn);
+ 		}
+ 
+-		zevpn->vxlan_if = ifp;
++		zevpn->vxlan_if = ctx.ret_ifp;
+ 		zevpn->local_vtep_ip = vxl->vtep_ip;
+ 
+ 		/* Inform BGP if the VNI is up and mapped to a bridge. */
+-		if (if_is_operative(ifp) && zif->brslave_info.br_if) {
++		if (if_is_operative(ctx.ret_ifp) && zif->brslave_info.br_if) {
+ 			zebra_evpn_send_add_to_client(zevpn);
+-			zebra_evpn_read_mac_neigh(zevpn, ifp);
++			zebra_evpn_read_mac_neigh(zevpn, ctx.ret_ifp);
+ 		}
+ 	}
+ 
+-- 
+2.43.2
+
+
+From 328f2f83feed43f0871669f47aa4206e9cd7a065 Mon Sep 17 00:00:00 2001
+From: Mark Stapp <mjs@cisco.com>
+Date: Thu, 24 Oct 2024 14:52:21 -0700
+Subject: [PATCH 9/9] zebra: remove if_table from the zebra NS
+
+Finish removing the if_table from the zebra NS struct.
+
+Signed-off-by: Mark Stapp <mjs@cisco.com>
+---
+ zebra/zebra_ns.c | 5 -----
+ zebra/zebra_ns.h | 2 --
+ 2 files changed, 7 deletions(-)
+
+diff --git a/zebra/zebra_ns.c b/zebra/zebra_ns.c
+index c6b279a9d7..578dee7b7e 100644
+--- a/zebra/zebra_ns.c
++++ b/zebra/zebra_ns.c
+@@ -234,7 +234,6 @@ static int zebra_ns_new(struct ns *ns)
+ 	zns->ns_id = ns->ns_id;
+ 
+ 	/* Do any needed per-NS data structure allocation. */
+-	zns->if_table = route_table_init();
+ 	ifp_tree_init(&zns->ifp_tree);
+ 
+ 	return 0;
+@@ -334,10 +333,6 @@ int zebra_ns_enable(ns_id_t ns_id, void **info)
+  */
+ static int zebra_ns_disable_internal(struct zebra_ns *zns, bool complete)
+ {
+-	if (zns->if_table)
+-		route_table_finish(zns->if_table);
+-	zns->if_table = NULL;
+-
+ 	zebra_dplane_ns_enable(zns, false /*Disable*/);
+ 
+ 	kernel_terminate(zns, complete);
+diff --git a/zebra/zebra_ns.h b/zebra/zebra_ns.h
+index 1ddecc8252..96b78d4745 100644
+--- a/zebra/zebra_ns.h
++++ b/zebra/zebra_ns.h
+@@ -67,8 +67,6 @@ struct zebra_ns {
+ 	struct nlsock ge_netlink_cmd; /* command channel for generic netlink */
+ #endif
+ 
+-	struct route_table *if_table;
+-
+ 	/* Tree of interfaces in this ns */
+ 	struct ifp_tree_head ifp_tree;
+ 
+-- 
+2.43.2
+
diff --git a/src/sonic-frr/patch/series b/src/sonic-frr/patch/series
index 557105858b33..86ec826af8c0 100644
--- a/src/sonic-frr/patch/series
+++ b/src/sonic-frr/patch/series
@@ -41,3 +41,4 @@
 0059-Fix-BGP-reset-on-suppress-fib-pending-configuration.patch
 0060-bgpd-Validate-both-nexthop-information-NEXTHOP-and-N.patch
 0061-Set-multipath-to-514-and-disable-bgp-vnc-for-optimiz.patch
+0062-zebra-lib-use-internal-rbtree-per-ns.patch

From c6df4b0c2c0b6fcd61afb274add79df60db13aa3 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Tue, 10 Dec 2024 14:35:33 -0800
Subject: [PATCH 351/364] [smart-switch][dpu] Do not run dhclient on the eth0
 interface. (#21062)

[smart-switch][dpu] Do not run dhclient on the eth0 interface.
---
 files/image_config/interfaces/interfaces.j2 | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/files/image_config/interfaces/interfaces.j2 b/files/image_config/interfaces/interfaces.j2
index cfdd322c4543..ea04fa80e931 100644
--- a/files/image_config/interfaces/interfaces.j2
+++ b/files/image_config/interfaces/interfaces.j2
@@ -131,6 +131,7 @@ iface {{ name }} {{ 'inet' if prefix | ipv4 else 'inet6' }} static
 {# TODO: COPP policy type rules #}
 {% endfor %}
 {% else %}
+{% if not (DEVICE_METADATA['localhost']['subtype'] == 'SmartSwitch' and DEVICE_METADATA['localhost']['switch_type'] == 'dpu') %}
 auto eth0
 iface eth0 inet dhcp
     metric 202
@@ -142,6 +143,7 @@ iface eth0 inet6 dhcp
     down sysctl net.ipv6.conf.eth0.accept_ra=0
 {% endif %}
 {% endif %}
+{% endif %}
 #
 source /etc/network/interfaces.d/*
 #

From 3ddd02f47b57129b750506a8a3b47a85f99d337f Mon Sep 17 00:00:00 2001
From: anamehra <54692434+anamehra@users.noreply.github.com>
Date: Tue, 10 Dec 2024 16:14:39 -0800
Subject: [PATCH 352/364] Update cisco-8000.ini to 202405.0.14 release (#21119)

Signed-off-by: Anand Mehra anamehra@cisco.com

Fixed SDK version info
---
 platform/checkout/cisco-8000.ini | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/checkout/cisco-8000.ini b/platform/checkout/cisco-8000.ini
index f8d6454d27b8..5efe23c4dcfd 100644
--- a/platform/checkout/cisco-8000.ini
+++ b/platform/checkout/cisco-8000.ini
@@ -1,3 +1,3 @@
 [module]
 repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git
-ref=202405.0.13
+ref=202405.0.14

From 4e466eb21db9c731bc1eb3d40bdf29ecd0971618 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 11 Dec 2024 10:01:31 +0800
Subject: [PATCH 353/364] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#21124)

#### Why I did it
src/sonic-utilities
```
* 03d83351 - (HEAD -> master, origin/master, origin/HEAD) Support empty golden config file for multi-asic (#3670) (14 hours ago) [ganglv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 32e6de7ff86f..03d833511eb5 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 32e6de7ff86fc6bd5abeddb408152fec006798b6
+Subproject commit 03d833511eb55eb2d979d6f67bf3576a6152ab42

From 148ec51ddda36a9ec11697874566568e13f328c4 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 11 Dec 2024 10:01:40 +0800
Subject: [PATCH 354/364] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#21122)

#### Why I did it
src/sonic-sairedis
```
* 98bb52eb - (HEAD -> master, origin/master, origin/HEAD) [syncd] Implement bulk set support (#1422) (9 hours ago) [Stepan Blyshchak]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 92322be787a7..98bb52ebe92d 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 92322be787a7b9e972810ba8f250700c4b8182ef
+Subproject commit 98bb52ebe92dd47edf0bb12321886df2388e026f

From def516699ab941b22e3b35850d117f6903c60195 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 11 Dec 2024 10:02:04 +0800
Subject: [PATCH 355/364] [submodule] Update submodule linkmgrd to the latest
 HEAD automatically (#21104)

#### Why I did it
src/linkmgrd
```
* ccd52d0 - (HEAD -> master, origin/master, origin/HEAD) Enforce switchover when target state is `standby` AND mux mode is `standby` (#281) (26 hours ago) [Jing Zhang]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/linkmgrd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/linkmgrd b/src/linkmgrd
index f3fbf091ae64..ccd52d06acf8 160000
--- a/src/linkmgrd
+++ b/src/linkmgrd
@@ -1 +1 @@
-Subproject commit f3fbf091ae644549675e68818f0dc8680483aff5
+Subproject commit ccd52d06acf802e960939bf7a29d819607985652

From 7bdf8d4bb26709001cf95397c6a8e617986dd7fd Mon Sep 17 00:00:00 2001
From: abdosi <58047199+abdosi@users.noreply.github.com>
Date: Wed, 11 Dec 2024 08:23:18 +0530
Subject: [PATCH 356/364] Update internal template peer-group.conf.j2 for
 ttl-security hops command. (#21117)

What I did:
Fixes: #21116

Why I did:
FRR behavior change w.r.t to command ttl-security hops <> from being removed from address-family .
---
 .../frr/bgpd/templates/internal/peer-group.conf.j2        | 4 ++--
 .../tests/data/internal/peer-group.conf/result_back.conf  | 2 --
 .../internal/peer-group.conf/result_chasiss_packet.conf   | 8 ++++----
 .../peer-group.conf/result_chassis_packet_isolate.conf    | 8 ++++----
 .../peer-group.conf/result_chassis_packet_unisolate.conf  | 8 ++++----
 .../tests/data/internal/peer-group.conf/result_front.conf | 2 --
 6 files changed, 14 insertions(+), 18 deletions(-)

diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/internal/peer-group.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/internal/peer-group.conf.j2
index d2d2be87e7f3..0e5c7aed3a32 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/templates/internal/peer-group.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/templates/internal/peer-group.conf.j2
@@ -5,6 +5,7 @@
   neighbor INTERNAL_PEER_V6 peer-group
 {% if CONFIG_DB__DEVICE_METADATA['localhost']['switch_type'] == 'chassis-packet' %}
   neighbor INTERNAL_PEER_V4 update-source Loopback4096
+  neighbor INTERNAL_PEER_V4 ttl-security hops 1
 {% endif %}
   address-family ipv4
 {% if CONFIG_DB__DEVICE_METADATA['localhost']['sub_role'] == 'BackEnd' %}
@@ -15,10 +16,10 @@
     neighbor INTERNAL_PEER_V4 route-map FROM_BGP_INTERNAL_PEER_V4 in
     neighbor INTERNAL_PEER_V4 route-map TO_BGP_INTERNAL_PEER_V4 out
     neighbor INTERNAL_PEER_V4 send-community
-    neighbor INTERNAL_PEER_V4 ttl-security hops 1
   exit-address-family
 {% if CONFIG_DB__DEVICE_METADATA['localhost']['switch_type'] == 'chassis-packet' %}
   neighbor INTERNAL_PEER_V6 update-source Loopback4096
+  neighbor INTERNAL_PEER_V6 ttl-security hops 1
 {% endif %}
   address-family ipv6
 {% if CONFIG_DB__DEVICE_METADATA['localhost']['sub_role'] == 'BackEnd' %}
@@ -29,7 +30,6 @@
     neighbor INTERNAL_PEER_V6 route-map FROM_BGP_INTERNAL_PEER_V6 in
     neighbor INTERNAL_PEER_V6 route-map TO_BGP_INTERNAL_PEER_V6 out
     neighbor INTERNAL_PEER_V6 send-community
-    neighbor INTERNAL_PEER_V6 ttl-security hops 1
   exit-address-family
 !
 ! end of template: bgpd/templates/internal/peer-group.conf.j2
diff --git a/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_back.conf b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_back.conf
index da0e6b77339e..c6acef329eff 100644
--- a/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_back.conf
+++ b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_back.conf
@@ -10,7 +10,6 @@
     neighbor INTERNAL_PEER_V4 route-map FROM_BGP_INTERNAL_PEER_V4 in
     neighbor INTERNAL_PEER_V4 route-map TO_BGP_INTERNAL_PEER_V4 out
     neighbor INTERNAL_PEER_V4 send-community
-    neighbor INTERNAL_PEER_V4 ttl-security hops 1
   exit-address-family
   address-family ipv6
     neighbor INTERNAL_PEER_V6 route-reflector-client
@@ -19,7 +18,6 @@
     neighbor INTERNAL_PEER_V6 route-map FROM_BGP_INTERNAL_PEER_V6 in
     neighbor INTERNAL_PEER_V6 route-map TO_BGP_INTERNAL_PEER_V6 out
     neighbor INTERNAL_PEER_V6 send-community
-    neighbor INTERNAL_PEER_V6 ttl-security hops 1
   exit-address-family
 !
 ! end of template: bgpd/templates/internal/peer-group.conf.j2
diff --git a/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chasiss_packet.conf b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chasiss_packet.conf
index 64b30e514d8c..30d8ef576b33 100644
--- a/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chasiss_packet.conf
+++ b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chasiss_packet.conf
@@ -3,23 +3,23 @@
 !
   neighbor INTERNAL_PEER_V4 peer-group
   neighbor INTERNAL_PEER_V6 peer-group
-  neighbor INTERNAL_PEER_V4 update-source Loopback4096 
+  neighbor INTERNAL_PEER_V4 update-source Loopback4096
+  neighbor INTERNAL_PEER_V4 ttl-security hops 1
   address-family ipv4
     neighbor INTERNAL_PEER_V4 soft-reconfiguration inbound
     neighbor INTERNAL_PEER_V4 allowas-in 1
     neighbor INTERNAL_PEER_V4 route-map FROM_BGP_INTERNAL_PEER_V4 in
     neighbor INTERNAL_PEER_V4 route-map TO_BGP_INTERNAL_PEER_V4 out
     neighbor INTERNAL_PEER_V4 send-community
-    neighbor INTERNAL_PEER_V4 ttl-security hops 1
   exit-address-family
-  neighbor INTERNAL_PEER_V6 update-source Loopback4096 
+  neighbor INTERNAL_PEER_V6 update-source Loopback4096
+  neighbor INTERNAL_PEER_V6 ttl-security hops 1
   address-family ipv6
     neighbor INTERNAL_PEER_V6 soft-reconfiguration inbound
     neighbor INTERNAL_PEER_V6 allowas-in 1
     neighbor INTERNAL_PEER_V6 route-map FROM_BGP_INTERNAL_PEER_V6 in
     neighbor INTERNAL_PEER_V6 route-map TO_BGP_INTERNAL_PEER_V6 out
     neighbor INTERNAL_PEER_V6 send-community
-    neighbor INTERNAL_PEER_V6 ttl-security hops 1
   exit-address-family
 !
 ! end of template: bgpd/templates/internal/peer-group.conf.j2
diff --git a/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_isolate.conf b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_isolate.conf
index cfb47916e655..1fcf6fab2be1 100644
--- a/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_isolate.conf
+++ b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_isolate.conf
@@ -3,23 +3,23 @@
 !
   neighbor INTERNAL_PEER_V4 peer-group
   neighbor INTERNAL_PEER_V6 peer-group
-  neighbor INTERNAL_PEER_V4 update-source Loopback4096 
+  neighbor INTERNAL_PEER_V4 update-source Loopback4096
+  neighbor INTERNAL_PEER_V4 ttl-security hops 1
   address-family ipv4
     neighbor INTERNAL_PEER_V4 soft-reconfiguration inbound
     neighbor INTERNAL_PEER_V4 allowas-in 1
     neighbor INTERNAL_PEER_V4 route-map FROM_BGP_INTERNAL_PEER_V4 in
     neighbor INTERNAL_PEER_V4 route-map TO_BGP_INTERNAL_PEER_V4 out
     neighbor INTERNAL_PEER_V4 send-community
-    neighbor INTERNAL_PEER_V4 ttl-security hops 1
   exit-address-family
-  neighbor INTERNAL_PEER_V6 update-source Loopback4096 
+  neighbor INTERNAL_PEER_V6 update-source Loopback4096
+  neighbor INTERNAL_PEER_V6 ttl-security hops 1
   address-family ipv6
     neighbor INTERNAL_PEER_V6 soft-reconfiguration inbound
     neighbor INTERNAL_PEER_V6 allowas-in 1
     neighbor INTERNAL_PEER_V6 route-map FROM_BGP_INTERNAL_PEER_V6 in
     neighbor INTERNAL_PEER_V6 route-map TO_BGP_INTERNAL_PEER_V6 out
     neighbor INTERNAL_PEER_V6 send-community
-    neighbor INTERNAL_PEER_V6 ttl-security hops 1
   exit-address-family
 !
 ! end of template: bgpd/templates/internal/peer-group.conf.j2
diff --git a/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_unisolate.conf b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_unisolate.conf
index 2711f46d567b..6842ce66ea6c 100644
--- a/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_unisolate.conf
+++ b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_unisolate.conf
@@ -3,23 +3,23 @@
 !
   neighbor INTERNAL_PEER_V4 peer-group
   neighbor INTERNAL_PEER_V6 peer-group
-  neighbor INTERNAL_PEER_V4 update-source Loopback4096 
+  neighbor INTERNAL_PEER_V4 update-source Loopback4096
+  neighbor INTERNAL_PEER_V4 ttl-security hops 1
   address-family ipv4
     neighbor INTERNAL_PEER_V4 soft-reconfiguration inbound
     neighbor INTERNAL_PEER_V4 allowas-in 1
     neighbor INTERNAL_PEER_V4 route-map FROM_BGP_INTERNAL_PEER_V4 in
     neighbor INTERNAL_PEER_V4 route-map TO_BGP_INTERNAL_PEER_V4 out
     neighbor INTERNAL_PEER_V4 send-community
-    neighbor INTERNAL_PEER_V4 ttl-security hops 1
   exit-address-family
-  neighbor INTERNAL_PEER_V6 update-source Loopback4096 
+  neighbor INTERNAL_PEER_V6 update-source Loopback4096
+  neighbor INTERNAL_PEER_V6 ttl-security hops 1
   address-family ipv6
     neighbor INTERNAL_PEER_V6 soft-reconfiguration inbound
     neighbor INTERNAL_PEER_V6 allowas-in 1
     neighbor INTERNAL_PEER_V6 route-map FROM_BGP_INTERNAL_PEER_V6 in
     neighbor INTERNAL_PEER_V6 route-map TO_BGP_INTERNAL_PEER_V6 out
     neighbor INTERNAL_PEER_V6 send-community
-    neighbor INTERNAL_PEER_V6 ttl-security hops 1
   exit-address-family
 !
 ! end of template: bgpd/templates/internal/peer-group.conf.j2
diff --git a/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_front.conf b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_front.conf
index 363040eb12f5..7b6ee2667de9 100644
--- a/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_front.conf
+++ b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_front.conf
@@ -9,7 +9,6 @@
     neighbor INTERNAL_PEER_V4 route-map FROM_BGP_INTERNAL_PEER_V4 in
     neighbor INTERNAL_PEER_V4 route-map TO_BGP_INTERNAL_PEER_V4 out
     neighbor INTERNAL_PEER_V4 send-community
-    neighbor INTERNAL_PEER_V4 ttl-security hops 1
   exit-address-family
   address-family ipv6
     neighbor INTERNAL_PEER_V6 soft-reconfiguration inbound
@@ -17,7 +16,6 @@
     neighbor INTERNAL_PEER_V6 route-map FROM_BGP_INTERNAL_PEER_V6 in
     neighbor INTERNAL_PEER_V6 route-map TO_BGP_INTERNAL_PEER_V6 out
     neighbor INTERNAL_PEER_V6 send-community
-    neighbor INTERNAL_PEER_V6 ttl-security hops 1
   exit-address-family
 !
 ! end of template: bgpd/templates/internal/peer-group.conf.j2

From 58d7e134ea0a1983e732b2644c71a0403ab7910e Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Tue, 10 Dec 2024 23:12:48 -0800
Subject: [PATCH 357/364] [build]: Add an artificial dependency between two
 modules for centec-arm64 (#19914)

For centec-arm64, both platform-modules-fs and platform-modules-e530 try
to compile the same directory of kernel sources. If both compilations
are running at the same time, then this is going to lead to errors.

Fix this by introducing an artificial dependency between the two so that
the compilations are forced to be serialized.

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 platform/centec-arm64/platform-modules-fs.mk | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/platform/centec-arm64/platform-modules-fs.mk b/platform/centec-arm64/platform-modules-fs.mk
index 5942eabe2069..8bfff5c9dad0 100644
--- a/platform/centec-arm64/platform-modules-fs.mk
+++ b/platform/centec-arm64/platform-modules-fs.mk
@@ -9,4 +9,8 @@ FS_S5800_48T4S_PLATFORM_MODULE = platform-modules-s5800-48t4s_$(FS_S5800_48T4S_P
 $(FS_S5800_48T4S_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-fs
 $(FS_S5800_48T4S_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
 $(FS_S5800_48T4S_PLATFORM_MODULE)_PLATFORM = arm64-fs_s5800_48t4s-r0
+# Both this and the e530 modules compile ../centec/centec-dal/, which causes a problem
+# if both are being compiled at the same time. To get around that, add an artificial
+# dependency here so that this part is serialized.
+$(FS_S5800_48T4S_PLATFORM_MODULE)_AFTER = $(CENTEC_E530_48T4X_P_PLATFORM_MODULE)
 SONIC_DPKG_DEBS += $(FS_S5800_48T4S_PLATFORM_MODULE)

From 5d9e561708f75216ab8b3f51fe8e765ca94a065e Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Wed, 11 Dec 2024 00:04:11 -0800
Subject: [PATCH 358/364] [nvidia-bluefield] Remove the virtual smart switch
 leftovers. (#21050)

- Why I did it
Remove the virtual smart switch leftovers from the Nvidia DPU initialization flow.

- How I did it
Remove unused code from the bash script.
---
 .../bluefield-platform-modules/bin/bfnet.sh   | 26 -------------------
 1 file changed, 26 deletions(-)

diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh b/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh
index e05761675336..c82ce3023d4e 100755
--- a/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh
@@ -17,25 +17,6 @@
 #
 
 pci_iface=eth0-midplane
-cp_iface=Ethernet0
-pidfile=/run/dhcl-internal.$cp_iface.pid
-leasefile=/var/lib/dhcp/dhcl-internal.$cp_iface.leases
-
-stop_cp_dhclient()
-{
-    if [[ -f $pidfile ]]; then
-        kill $(cat $pidfile)
-	rm -f $pidfile
-    fi
-    rm -f $leasefile
-}
-
-start_cp_dhclient()
-{
-    stop_cp_dhclient
-
-    /sbin/dhclient -pf $pidfile -lf $leasefile $cp_iface -nw
-}
 
 start()
 {
@@ -46,17 +27,10 @@ start()
     if [[ $? != "0" ]]; then
         exit 1
     fi
-
-    hwsku=$(sonic-cfggen -d -v 'DEVICE_METADATA["localhost"]["hwsku"]')
-    if [[ $hwsku == *"-C1" ]]; then
-        start_cp_dhclient
-    fi
 }
 
 stop()
 {
-    stop_cp_dhclient
-
     /usr/bin/mst stop
     rmmod mlx5_ib mlx5_core
 }

From cd7f25f4a09e4a696bae2a5af9e886faf6f2508a Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 11 Dec 2024 19:01:31 +0800
Subject: [PATCH 359/364] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#21128)

#### Why I did it
src/sonic-utilities
```
* d5cbe464 - (HEAD -> master, origin/master, origin/HEAD) [GCU] Add data acl table and rule check (#3668) (3 minutes ago) [jingwenxie]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 03d833511eb5..d5cbe4641d1c 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 03d833511eb55eb2d979d6f67bf3576a6152ab42
+Subproject commit d5cbe4641d1c1a616ec5c6376cc75fc862f357c7

From 1b5edaaa4abe391dea57acd57493c159310151d6 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 11 Dec 2024 19:01:46 +0800
Subject: [PATCH 360/364] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#21106)

#### Why I did it
src/sonic-host-services
```
* b0b3ca5 - (HEAD -> master, origin/master, origin/HEAD) Support for Memory Statistics Host-Services (#167) (14 hours ago) [kanza-latif]
* d455924 - Update pipeline to Bookworm (#193) (33 hours ago) [Saikrishna Arcot]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index 438e54aca685..b0b3ca54614a 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit 438e54aca68507d70b37100d00e4be3647c7f59f
+Subproject commit b0b3ca54614ac6fd350f2609f1ebd74757b72f14

From 1a536dff35e27205b8a59f471f44f6eb97e07f96 Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Thu, 12 Dec 2024 00:48:16 +0800
Subject: [PATCH 361/364] [build] Enable reproducible build options to reduce
 community build failures. (#21115)

---
 rules/config | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/rules/config b/rules/config
index 3d3a81ce60f2..3b4fd5851a3b 100644
--- a/rules/config
+++ b/rules/config
@@ -264,7 +264,7 @@ TRUSTED_GPG_URLS = https://packages.trafficmanager.net/debian/public_key.gpg,htt
 #   web   : web packages, downloaded by wget, curl
 #   git   : git repositories, donloaded by git clone
 #   docker: docker base images
-SONIC_VERSION_CONTROL_COMPONENTS ?= none
+SONIC_VERSION_CONTROL_COMPONENTS ?= deb,py2,py3,web,git,docker
 
 ifeq ($(SONIC_VERSION_CONTROL_COMPONENTS),all)
 override MIRROR_SNAPSHOT = y
@@ -303,7 +303,7 @@ INCLUDE_MUX = y
 ENABLE_ASAN ?= n
 
 # reset default container registry from dockerhub to other
-DEFAULT_CONTAINER_REGISTRY ?=
+DEFAULT_CONTAINER_REGISTRY ?= publicmirror.azurecr.io
 
 # INCLUDE_BOOTCHART - install systemd-bootchart
 INCLUDE_BOOTCHART = y

From 10afa2edd67ea40b02c0d3ec813b908f2e557a38 Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Wed, 11 Dec 2024 08:58:35 -0800
Subject: [PATCH 362/364] Fix docker-sonic-vs following upgrade to Bookworm
 (#21063)

FRR 10.0.1 upgrade (#20269) brought in a mgmtd daemon for FRR. This needs to be started up in docker-sonic-vs as part of the other daemons in this container.

Additionally, Debian Bookworm provides version 2.5.0 of scapy, but the pip3 command later in the file downgraded it to 2.4.5, which does not work in Bookworm. Fix this by removing the pip3 installation for scapy, and updating the other packages installed via pip3.

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 platform/vs/docker-sonic-vs/Dockerfile.j2 | 5 ++---
 platform/vs/docker-sonic-vs/start.sh      | 2 ++
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/platform/vs/docker-sonic-vs/Dockerfile.j2 b/platform/vs/docker-sonic-vs/Dockerfile.j2
index e2fd50bfcfba..92ba5b06dbd1 100644
--- a/platform/vs/docker-sonic-vs/Dockerfile.j2
+++ b/platform/vs/docker-sonic-vs/Dockerfile.j2
@@ -74,9 +74,8 @@ RUN pip3 uninstall -y enum34
 
 # Dependencies of restore_neighbors.py
 RUN pip3 install \
-         scapy==2.4.4 \
-         pyroute2==0.5.14 \
-         netifaces==0.10.9
+         pyroute2==0.7.2 \
+         netifaces==0.11.0
 
 {% if docker_sonic_vs_debs.strip() -%}
 # Copy built Debian packages
diff --git a/platform/vs/docker-sonic-vs/start.sh b/platform/vs/docker-sonic-vs/start.sh
index f28f05f3707d..f7dbde8dcff7 100755
--- a/platform/vs/docker-sonic-vs/start.sh
+++ b/platform/vs/docker-sonic-vs/start.sh
@@ -160,6 +160,8 @@ supervisorctl start vlanmgrd
 
 supervisorctl start zebra
 
+supervisorctl start mgmtd
+
 supervisorctl start staticd
 
 supervisorctl start buffermgrd

From 5258772d4adcfe8590560b9115d91ab67257e585 Mon Sep 17 00:00:00 2001
From: Patrick MacArthur <pmacarthur@arista.com>
Date: Wed, 11 Dec 2024 12:00:08 -0500
Subject: [PATCH 363/364] [Arista] Update platform library submodules (#20929)

(this is a replacement for PR #20603; this PR includes a revert for the "Disable lpmode for chassis" change)

Add support for new psus
Add support for new fan modules
Report fan information from all fabric cards
Fix psud warning due to invalid pmbus threshold reported
---
 platform/barefoot/sonic-platform-modules-arista | 2 +-
 platform/broadcom/sonic-platform-modules-arista | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/barefoot/sonic-platform-modules-arista b/platform/barefoot/sonic-platform-modules-arista
index ed942d617ddd..2e2acb67f9ea 160000
--- a/platform/barefoot/sonic-platform-modules-arista
+++ b/platform/barefoot/sonic-platform-modules-arista
@@ -1 +1 @@
-Subproject commit ed942d617ddde8e63b5190ad3a7d8171c1dbde9a
+Subproject commit 2e2acb67f9ea20366f5d26c1c61b6952810d6d88
diff --git a/platform/broadcom/sonic-platform-modules-arista b/platform/broadcom/sonic-platform-modules-arista
index ed942d617ddd..2e2acb67f9ea 160000
--- a/platform/broadcom/sonic-platform-modules-arista
+++ b/platform/broadcom/sonic-platform-modules-arista
@@ -1 +1 @@
-Subproject commit ed942d617ddde8e63b5190ad3a7d8171c1dbde9a
+Subproject commit 2e2acb67f9ea20366f5d26c1c61b6952810d6d88

From c0ff0678ad3106d0b9a04c178abc996d8d3550c0 Mon Sep 17 00:00:00 2001
From: yue-fred-gao <132678244+yue-fred-gao@users.noreply.github.com>
Date: Wed, 11 Dec 2024 12:58:56 -0500
Subject: [PATCH 364/364] [vpp]: add platform vpp (#20841)

Why I did it
Add platform vpp to sonic-buildimage to enable building sonic-vpp as other platforms.

How I did it
Add vpp submodule from https://github.com/sonic-net/sonic-platform-vpp

How to verify it
git clone --recurse-submodules https://github.com/sonic-net/sonic-buildimage.git
make init
make configure PLATFORM=vpp
make SONIC_BUILD_JOBS=4 target/sonic-vpp.img.gz

Signed-off-by: Yue Gao <yuega2@cisco.com>
---
 .gitmodules  | 3 +++
 platform/vpp | 1 +
 2 files changed, 4 insertions(+)
 create mode 160000 platform/vpp

diff --git a/.gitmodules b/.gitmodules
index b76f589bdfa8..f8d10f3af4ab 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -130,3 +130,6 @@
 [submodule "platform/marvell-teralynx/sonic-platform-marvell-teralynx"]
 	path = platform/marvell-teralynx/sonic-platform-marvell-teralynx
 	url = https://github.com/Marvell-switching/sonic-platform-marvell.git
+[submodule "platform/vpp"]
+	path = platform/vpp
+	url = https://github.com/sonic-net/sonic-platform-vpp.git
\ No newline at end of file
diff --git a/platform/vpp b/platform/vpp
new file mode 160000
index 000000000000..fbda3bd10348
--- /dev/null
+++ b/platform/vpp
@@ -0,0 +1 @@
+Subproject commit fbda3bd10348381886038790f11cc2641bf972b9